iLLD_TC26B: IFX Low Level Drivers

iLLD User Documentation
Device:TC26B Version: 1.0.1.11.0
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IFX Low Level Drivers

Introduction

The aim of the IFX Low Level Driver library (iLLD) is to provide access and configuration functions for the integrated peripherals of Infineon microcontrollers - from a simple timer register access up to 3 phases PWM driver for inverter applications. Together with SFR header files they are a fundamental part of the infrastructure for tests and applications which are developed by several teams at IFX ATV.

All drivers follow the same coding style to ensure a common "Look&Feel". The application interfaces (APIs) are defined and implemented by Hardware/Software experts, already tested pre-silicon with a virtual prototype or in RTL simulations, and then shared by all teams which are involved in programming software:

iLLD Usage at Infineon

This cross usage model should not only help to reduce development efforts, but also improve the quality/reliability of the drivers.

The strict iLLD coding guidelines allow layering of drivers for multi-dimensional system scenarios. There is no dependency between the peripheral drivers. Optionally they can be isolated from the library and provided as a separate package (e.g. for application notes delivered to customers).

iLLDs are currently planned for Aurix and Aurix 2G derivatives.

Each derivative has its own set of iLLD sources, which are located in GIT. Versionized packages are also distributed via MyICP.

Table Of Contents

  • General Structure of iLLDs
  • iLLD APIs
  • Naming Conventions
  • Coding rules
  • Doxygen rules
  • Files and Configuration
  • Package versioning
  • Do's and don't

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iLLD User Manual
Release
Copyright © Infineon Technologies AG 2019
www.infineon.com
Version 1.0.1.11.0
2019


iLLD_TC26B: General Structure of iLLDs

General Structure of iLLDs

We can basically differ between two types of iLLDs:

Unifunctional Peripheral Drivers

Unifunctional peripheral drivers are simple modules where the target peripheral is able to carry out one type of functionality.

Example: VADC peripheral for analog-to-digital conversion. Multican for CAN protocol communication, DMA for DMA functionality, etc.

Unifunctional Peripheral Driver

Multifunctional Peripheral Drivers

These kind of peripheral drivers are complex to handle, and here the target peripheral can carry out multiple functionalities ("use cases").

Example: AscLin peripheral can be configured as a common UART, but also as a LIN or even a SPI.
GTM TOM/ATOM can be used as PWM generator, complex waveform generator and any generic timer, etc.

Multifunctional Peripheral Driver

Content of Peripheral Drivers

iLLDs consist of following components:

  • Peripheral Register Memory Map (SFR header file)
  • a Standard Layer with (verbose) access functions to SFRs which are changed during application runtime
  • an Interface Layer with configuration and handling functions
    Multiple Interface Layers could be available if the peripheral is used for different purposes.
  • Pinmaps to configure I/O multiplexers

Configuration Data Structures

A configuration structure, which is part of an interface layer, holds the parameters to configure the driver. Depending on the iLLD and its associated peripheral there could be multiple levels of configuration data structures. As in case of VADC there could be data structure to configure the VADC module, a structure for the configuring the group and another for the channels.

The data structure shall be defined in a memory optimised way considering the structures are non-packed in the memory map. All the structure elements shall be organised in a way that they are ordered in the descending order of their physical memory size.

Usage: In normal cases configuration data structures are locally stored (on the stack) inside specific initialization routines. They can also be placed in the flash/ROM

Example for a configuration struct:

typedef struct
{
const IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
IfxVadc_GroupId master; /**< \brief Specifies the master group if own group is different master slave is configured */
IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Specifies arbiter configuration */
IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUMBER_OF_INPUTCLASS]; /**< \brief Specifies conversion settings one and two */
IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
IfxVadc_Adc_ScanConfig backgroundScanReq; /**< \brief Specifies back ground scan configuration */
boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
} IfxVadc_Adc_GroupConfig;

Runtime Variables (Handles)

Runtime variables are usually stored in so called "handles". This structure is separated from the configuration structure mentioned above (because such structures are only needed during initialization phase).

Handles are used to reference resources of a peripheral by interface functions without unnecessary calculation or parameter passing overhead. A handle struct contains at least a pointer to the base address of the peripheral which should be accessed, pointers to peripheral subcomponents where required, and/or indices (such as a channel or timer number).

Handles are to be instantiated per instance of the used peripheral. Higher SW layers store knows number of instances required for the intended application and it reserves the memory for these many data structures.

The data structure must be made to be available in the DMI RAM of the Cpu from which lld API calls are more frequently done.

Example for an handle:

typedef struct
{
IfxVadc_Adc module; /**< \brief The VADC handle structure */
Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
} IfxVadc_Adc_Group;

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iLLD User Manual


iLLD_TC26B: iLLD APIs

iLLD APIs

This section provides the generic overview of APIs required for a iLLD

iLLD Init APIs

iLLDs which need the user configuration data, shall declare the data type for configuration. These data structures are instantiated by the higher level software. Following are the requirements for the driver.

Initialization of configuration data structure

Any driver which uses the configuration data structure shall provide an interface to initialize these data structure elements to their default values. Main used case of such implementation is, when a driver is upgraded with an additional configuration parameter, such initialization would provide correct value to the variable so that the driver works correctly when used with legacy application software which used the previous version of the driver. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.

Data structure shall be instantiated per HW instance for which the driver is targeted

The generic prototype shall be as
<Driver Prefix>_initConfig(<Driver Prefix>_Config *cfg);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

Driver Initialization

The iLLD shall provide an API to initialize the driver peripheral based on the user configuration. Configuration data shall be previously initialized to default values with init config interface. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.

The driver initialization API shall initialize the peripheral registers to make the peripheral to work as drivers functionality. This API shall also initialize the driver internal data structure to their required init values.

The generic prototype shall be as
<Driver Prefix>_init(<Driver Prefix>_Handle *handle, <Driver Prefix>_Config *cfg);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

Driver De-Initialization

iLLD may provide an API to reset the driver to default reset state and to make to consume least power. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. The generic prototype shall be as
<Driver Prefix>_deInit(<Driver Prefix>_Handle *handle);
where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

iLLD functional APIs

iLLD shall provide API for each of the needed functionality the user may use. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. For each of the peripherals instances the parameter passed will be deferring.

The generic prototype shall be as
<Driver Prefix>_<functionality>(<Driver Prefix>_Handle *handle); where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.

iLLD internal methods

For better modularisation readability reasons the driver implementations shall use the internal static functions. In such cases the function definitions shall be defined in the similar way as iLLD functional APIs

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iLLD_TC26B: Naming Conventions

Naming Conventions

This section provides the naming convention to be followed during development.

As general rule all the "exported" types/definitions/class/objects (i.e. Function, enum, typedef, constant, variable, ...) should start with the filename + underscore "_".

Example: in file IfxScuWdt.c/h the function shall be:

  • IfxScuWdt_enableEndinit()
  • IfxScuWdt_disableEndinit()

iLLD Files

Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special][sub SW module name].c/h

Example:

  • 1) With HW module only without sub-module: IfxPort.c/.h
  • 2) With HW module and sub-module: IfxScuWdt.c/.h
  • 3) With HW module sub-module and SW driver: IfxGtmTom_Pwm.c/.h
  • 4) With HW module sub-module and SW driver + SW sub module: IfxGtmTom_PwmHl.c/.h (only if it makes sense to split the 10:files to make it modular)

Important things to check during review/ or with static code check tools:

  • 1) Prefix: Ifx (in title case)
  • 2) <module name>[<HW Sub module name>] (in camel case)
  • 3) [_SW Driver if special] (an underscore to separate and title case SW driver name)
  • 4) .c and .h in the small case

Data Types

typedef <standard type> Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<user type name>;

<Standard type> structure/union/enum definitions with its elements, and other C data types

Example:

typedef struct
{
uint32 pllFreqInHz;
uint32 stepFreqInHz;
uint8 stepPerIn_uSec;
uint8 pDivider;
uint8 nDivider;
uint8 k2Divider;
} IfxScu_Pll_Config;

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2) _<user type name >: an underscore to separate with the rest and Camel case letters (first letter also capital).

Structures

To define structure types the convention shall be followed as in type defines above.

For structure elements simple name with camel case letters with first letter small shall be used.

Refer to the example for naming convention for type defines

Enum

To define enum types the convention shall be followed as in type defines above.

For enum elements following naming convention to be followed:
Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<Enum Name>_<Enum element>

<Enum element> camel case letter <Enum Name> Camel case letter

Example:

typedef enum {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPriority;

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2) _<Enum Element>: an underscore to separate with the rest and Camel case letters (first letter lower case).

#define Constants or Macros

#define IFX<MODULE>[<HW SUB MODULE NAME>][SW DRIVER]<FUNCTIONALITY NAME>

<FUNCTIONALITY NAME>: Meaningful name to represent the functionality. With "_" to separate words

Example:

#define IFXSCUCCU_PLL_FREE_RUNNING_FREQ (100000000U)

Important things to check:

  • 1) all capital letters

Functions

All exported functions: Ifx<HW Module name>[<HW Sub module name>][SW Driver if special]<Functionality>

Example:

IfxGtmTom_Pwm_setDutyCycle(..)

Important things to check:

  • 1) Points 1 to 3 for filenames
  • 2)_<Functionality>: an underscore to separate and Camel case letters with first letter small. (Convention used with object oriented programming). Functionality shall start with the main action (verb) to be fulfilled with the interface.

For example:

  • An interface to set pin level high, the function name is setPinHigh.
  • An interface to read the result of ADC conversion is readResult
  • An interface to send the data byte over communication peripheral sendByte

Function's parameter & struct members

Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.

Examples:

typedef struct
{
boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Inline Functions

All inline functions as:
IFX_INLINE <function definition>

Shall follow the naming conventions as in Functions

Infineon definitions for Standard Data Types

Located in Cpu/Std/Platform_Types.h

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iLLD_TC26B: Coding rules

Coding rules
  1. Code formating
  2. General rules
  3. Code checking
  4. APIs common to many module drivers

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iLLD_TC26B: Code formating

Code formating

Auto-formating

Only use the code formating as defined by following script: $VERIF_LLD/bin/indent_rec

Ignore auto-formating

In case the source code shall not be formated by the formating tool the following command can be used:

// *INDENT-OFF* Note: this file was indented manually by the author.
... place here code that shall not be formated by the tool
// *INDENT-ON*

File structure

The source code in a file should be grouped using doxygen groups. Groups should be sorted in the file by alphabetical order of the group name. Inside a group, code shall be sorted by alphabetical order of the API names.

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iLLD_TC26B: General rules

General rules

Always use curly braces for if, for, while, do, ...

Correct:
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl != 0)
{
channel->SHADR.U = config->shadowAddress;
}
}

Wrong:

static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl != 0)
channel->SHADR.U = config->shadowAddress;
}

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iLLD_TC26B: Code checking

Code checking

Parameter check

In case the parameter can not be checked by the compiler for valid values, it shall be checked using the assertion function.

Example:

IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
{
IFX_ASSERT(VERBOSE_LEVEL_ERROR,transferCount < 32);
}

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iLLD_TC26B: APIs common to many module drivers

APIs common to many module drivers

<modue>_get<Interrupt>Src()

For each interrupt service request control register, an API that returns the register address shall be available. The API syntax is as follow: volatile Ifx_SRC_SRCR* <driverName>_get<Interrupt>Src(<ModuleType>*module);

Example: The transmit interrupt of the QSPI driver has the following API:

volatile Ifx_SRC_SRCR* IfxQspi_getTransmitSrc(Ifx_QSPI* module);

<modue>_getIndex()

The API Ifx<Module>_getIndex(Ifx_<MODULE>* module) shall be implemented in the file Ifx<Module>.c/h and use an array define in Ifx<Module>_cfg.c/h;

Example:

In file Ifxcpu.h

IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);

In file Ifxcpu.c

// brief Return cpu index
//
// \param cpu Specifies cpu module
//
// \return Return cpu index.
//
IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu)
{
IfxCpu_ResourceCpu result = IfxCpu_ResourceCpu_none, index;
for (index = 0; index < IFXCPU_COUNT; index++)
{
if (IfxCpu_cfg_indexMap[index].module == cpu)
{
result = IfxCpu_cfg_indexMap[index].index;
break;
}
}
return result;
}

In file Ifxcpu_cfg.h

// List of the available CPU resources
typedef enum
{
IfxCpu_ResourceCpu_0 = 0, // CPU 0
IfxCpu_ResourceCpu_1, // CPU 1
IfxCpu_ResourceCpu_2, // CPU 2
IfxCpu_ResourceCpu_none // None of the CPU
} IfxCpu_ResourceCpu;
IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);

In file Ifxcpu_cfg.c

const IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_COUNT] =
{
{&MODULE_CPU0, IfxCpu_ResourceCpu_0},
{&MODULE_CPU1, IfxCpu_ResourceCpu_1},
{&MODULE_CPU2, IfxCpu_ResourceCpu_2},
};

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iLLD_TC26B: Doxygen rules

Doxygen rules

Microcontroller root group

The microcontroller documentation root group is IfxLld. The group is defined in the file info.dox located in the microcontroller derivative root directory.

Example:

\defgroup IfxLld TC27x B-Step Microcontroller

Modules group

Module's group names have the follwing syntax: '\defgroup IfxLld_<Module>'. The group is direct child of the Microcontroller root group.

v <Module> is the module short name in with the 1st letter upper case and then lower case. The group name is defined in the Ifx<Module>_regdef.h file. Example:

\defgroup IfxLld_Dma DMA
\ingroup IfxLld

The following groups are also defined in the Ifx<Module>_regdef.h file for each modules:

  • IfxLld_<Module>_Bitfields : Bitfield macro definition
  • IfxLld_<Module>_Union : module union types
  • IfxLld_<Module>_Struct : module struct types

Module standard driver group

Module's standard driver group have the follwing syntax: '\defgroup IfxLld_<Module>_Std'. The group is direct child of the Modules group.

Example:

\defgroup IfxLld_Asclin_Std Basic functionality
\ingroup IfxLld_Asclin

Module interface driver group

Module's interface driver group have the follwing syntax: '\defgroup IfxLld_<Module>_<Interface>'. The group is direct child of the Modules group.

<Interface> is the interface driver name.

Example:

\defgroup IfxLld_Asclin_AscIf ASC interface driver
Implements the standard ASC interface
\ingroup IfxLld_Asclin

General rules

  • As group name are global names, a group name shall start with the parent group name.
  • Group names are 1st letter upper case, then camel case, group levels are separated by underscore

Example:

  • |–IfxLld
  • | |–IfxLld_Dma
  • | | |–IfxLld_Dma_Std
  • | | |–IfxLld_Dma_Std_ChannelTransaction
  • | | |–IfxLld_Dma_Dma

Documentation of return values

The return value shall be documented using \return when docuementation is provided for a single case.

The return value shall be documented using \retval when docuementation is provided for a multiple case.

Example (single case):

\return Return the raw converted analog value.

Output:

Returns
Return the raw converted analog value.

Example (multiple case):

\retval TRUE in case of success
\retval FALSE in case of error

Output:

Return values
TRUE | in case of success
FALSE | in case of error

parameterDocumentation

Documentation shall provide range for parameters when not entirely defined.

Example:

// \param transferCount Number of transaction, Range=[0,32]
IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
{ ... }

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iLLD_TC26B: Files and Configuration

Files and Configuration

Folder structure

Starting from Src/BaseSw/: iLLD contains the iLLD files for all derivatives

  1. Inside Src/BaseSw/iLLD/<DUT>/Tricore:
  2. _Build contains the set of files to be included to build the specific driver. Mostly used by internal tools
  3. _Impl contains derivative specific configuration which could also be adapted by the user
  4. _PinMap contains I/O configurations in pin tables
  5. _Lib contains derivative dependent library functions
  6. <module> contains the actual peripheral driver

Infra contains the header files for all derivatives, compiler specific files and application start-up software files for Aurix2G derivatives

  1. Inside Src/BaseSw/Infra/Platform/Tricore/Compilers contains the compiler specific files
  2. Inside Src/BaseSw/Infra/Sfr/<DUT> contains the header files
  3. Inside Src/BaseSw/Infra/Ssw/<DUT>/Tricore contains the application start-up software files

Service contains derivative independent service software sources

VERIF_DUT stands for the derivative which should be selected

Ifx_Cfg.h

Please create a configuration file with the name "Ifx_Cfg.h" in your application to configure the iLLD library components.

Currently it only requires to select the external oscillator frequency (XTAL) and the desired system frequency.

In addition, this file allows you to specify how assertions should be print out.

Minimal Ifx_Cfg.h file:

#ifndef IFX_CFG_H
#define IFX_CFG_H
// XTAL/PLL frequency
#define IFX_CFG_SCU_XTAL_FREQUENCY (20000000)
#define IFX_CFG_SCU_PLL_FREQUENCY (200000000)
// Assertions
#define IFX_ASSERT(level, expr)
#endif /* IFX_CFG_H */

The configuration macros mentioned below can be overridden in Ifx_Cfg.h:

  • IFX_CFG_DISABLE_DEFAULT_INTRINSICS - IFX_CFG_DISABLE_DEFAULT_INTRINSICS shall be defined in Ifx_Cfg.h to disable the default intrinsics provided For Ex. NOP,CRC
  • IFX_CFG_USE_COMPILER_DEFAULT_LINKER - IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h to use the default compiler provided linker varaibles and startup
  • IFX_USE_SW_MANAGED_INT - IFX_USE_SW_MANAGED_INT shall be defined in Ifx_Cfg.h to use the software based interrupts SCU related Macros:
  • IFX_CFG_SCU_XTAL_FREQUENCY - IFX_CFG_SCU_XTAL_FREQUENCY shall be defined to respective XTAL frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL_FREQUENCY - IFX_CFG_SCU_PLL_FREQUENCY shall be defined to desired PLL frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL1_FREQUENCY - IFX_CFG_SCU_PLL1_FREQUENCY shall be defined to desired PLL1 frequency in Ifx_Cfg.h
  • IFX_CFG_SCU_PLL2_FREQUENCY - IFX_CFG_SCU_PLL2_FREQUENCY shall be defined to desired PLL2 frequency in Ifx_Cfg.h
  • Applicable for only Aurix2G devices:
  • Application Start-up related Macros:
  • IFX_CFG_SSW_ENABLE_TRICOREx (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx shall be defined to 0 in Ifx_Cfg.h to disable the CPUx.
  • IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE shall be defined to 0 in Ifx_Cfg.h to disable the PCACHE of CPUx
  • IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE shall be defined to 0 in Ifx_Cfg.h to disable the DCACHE of CPUx

Example for Assertion output via printf:

#ifdef __cplusplus
extern "C" {
#endif
// defined in main.c
extern const char* verboseLevelStr[6];
#define IFX_ASSERT(level, expr) (((expr) || (level > IFX_VERBOSE_LEVEL_ERROR)) ? ((void)0) : (void)printf("[ASSERT:%s] '%s' in %s:%d (function '%s')\n", verboseLevelStr[level], #expr, __FILE__, __LINE__, __func__))
#endif

And in your main.c file (or somewhere else):

//! this global array is used by IFX_ASSERT of iLLDs
const char* verboseLevelStr[6] = {
"OFF",
"FAILURE",
"ERROR",
"WARNING",
"INFO",
"DEBUG"
};

Minimal Set of Driver sources

If you prefer to use (resp. compile) only a minimal set of drivers for your application, please add at least following "infrastructural resources":

  • Src/BaseSw/Infra/Sfr/<DUT>/_Reg directory
  • Src/BaseSw/iLLD/<DUT>/Tricore/_Lib directory
  • Src/BaseSw/Service directory
  • CPU driver: Src/BaseSw/iLLD/<DUT>/Tricore/Cpu and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxCpu_cfg.*
  • DMA driver: Src/BaseSw/iLLD/<DUT>/Tricore/Dma and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxDma_cfg.*
  • Port driver: Src/BaseSw/iLLD/<DUT>/Tricore/Port, Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxPort_cfg.* and src/ifx/$(VERIF_DUT)/_PinMap/IfxPort_PinMap.*
  • SCU driver: Src/BaseSw/iLLD/<DUT>/Tricore/Scu and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxScu_cfg.*
  • Src driver: Src/BaseSw/iLLD/<DUT>/Tricore/Src and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxSrc_cfg.*
  • Stm driver: Src/BaseSw/iLLD/<DUT>/Tricore/Stm and Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxStm_cfg.*

Whenever additional drivers should be added, you typically have to copy following files/directories:

  • Src/BaseSw/iLLD/<DUT>/Tricore/<driver>
  • Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/<driver>_cfg.*
  • Src/BaseSw/iLLD/<DUT>/Tricore/_PinMap/<driver>_cfg.*
  • For more information you can refer the BIFACES User Manual.

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iLLD_TC26B: Package versioning

Package versioning

Package version number

Each released package is assigned a unique identifier that consists of four numbers that represent the major and the minor version numbers separated by underscores '_'.

For example: version 1_0_0_0_0

With each new release:

  • either the minor version is incremented
  • or the major version number is incremented and the minor and "major update" version number reset

the increment step for the minor and major number is >= 1.

Note
The package version number is independent from the clearcase file version numbers

The version number is available in the IfxLldVersion.h header file, so that it can be referenced (and compared) by application software. The content:

#define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
#define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
#define IFX_LLD_VERSION_MAJOR_UPDATE 0 /**< \brief Informs about a release for a new derivative without further API changes */
#define IFX_LLD_VERSION_MINOR 0 /**< \brief Informs about new additions to the library */
#define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */

Change significance

Change in the major version number

Change in the major version number indicates that the version may not be fully compatible with other major version numbers. The reason for the incompatibility could be:

  • changes in the API names, parameters...

Change in the "major update" version number

This part of the version number indicates that the library has been released for a new derivative without further API changes.

Change in the minor version number

Change in the minor version number indicates that the version is backward compatible with smaller minor version number with identical major version number. The difference between minor version number are:

  • new feature introduced
  • bug fix
  • update of documentation

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iLLD_TC26B: Do's and don't

Do's and don't
  1. Naming convention
  2. Coding rules
  3. Documentation
  4. Optimisation
  5. Usage of enums

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iLLD_TC26B: Naming convention

Naming convention

Enum

[link: Enum]

   Enumeration items must be prefixed with the enumeration type.

   Correct:
typedef enum
{
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPriority;

Wrong (IfxDma_ChannelPrioritySelect):

typedef enum
{
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium,
IfxDma_ChannelPriority_high
} IfxDma_ChannelPrioritySelect;

Directory name

[link: Directory name]

   Dirtectory shall have the same name as the driver name without the Ifx prefix.

       Correct:
       - Dma
           - Dma
               - IfxDma.c
               - IfxDma.h

       Wrong:
       - Dma
           - <SPAN style="color:red">Interface</SPAN>
               - IfxDma.c
               - IfxDma.h

Function's parameter & struct members

[link: Function's parameter & struct members]

Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.

Correct:

typedef struct
{
boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Wrong(enableHardwareRequest):

typedef struct
{
boolean enableHardwareRequest; // \brief Enabling the hardware channel request
} IfxDma_Dma_ChannelConfig;

Static function names shall also be prefixed

[link: Static function names shall also be prefixed]

Correct:
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)

Wrong:

static void configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)

Do not explicitely use 'handle' in the parameter name

[link: Do not explicitely use 'handle' in the parameter name]

Remove the name ‘handle’ from the parameter’s name, even we hnow that it is an handle. It does not add information but increase the source code length.

Correct:

IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dma);

Wrong(dmaHandle):

IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dmaHandle);

[Previous page] [Next page]


iLLD_TC26B: Coding rules

Coding rules

Type assumption

[link: Type assumption]

Bitfield values should not be assumed as Boolean.

Correct:

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
{
return dma->CH[channelId].CHCSR.B.LXO != 0;
}

Wrong:

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
{
return dma->CH[channelId].CHCSR.B.LXO;
}

Variable names

[link: Variable names]

   Use explicit names for variable.
   Example:
   With
Ifx_DMA* dma;
dma->source = 0x123;

the code can be easier understand than with

Ifx_DMA* baseAddr;
baseAddr->source = 0x123;

Avoid numbers, use constant instead

[link: Avoid numbers, use constant instead]

Correct:
#define IFXDMA_DMA_ENABLE_SHADOW_ADDRESS (2) // Position of the shadow address enable bit
static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl & (1 << IFXDMA_DMA_ENABLE_SHADOW_ADDRESS) )
{
channel->SHADR.U = config->shadowAddress;
}
}

Wrong:

static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
{
...
if( config->shadowControl & (1 << 2) )
{
channel->SHADR.U = config->shadowAddress;
}
}

. Example(1 << 2) below

[Previous page] [Next page]


iLLD_TC26B: Documentation

Documentation

Avoid 'the same' in documentation

[link: Avoid 'the same' in documentation]

Correct:

boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request

Wrong(for the same):

boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request for the same

[Previous page] [Next page]


iLLD_TC26B: Optimisation

Optimisation

Module register access (array)

[link: Module register access (array)]

   Code should be optimised by using array index instead of if..else.

   Correct:
dma->BLK[index]. ...

Wrong:

if( moveEngine == IfxDma_MoveEngine_1 )
{
dma->BLK1. ...
}
else
{
dma->BLK0. ...
}

In case the array is not available in the module structure definition, please request for implementation. The reasons could be:

  • it has been forgotten to build the array during the register header file generation
  • the module address map does not currently supports the array access

Module register access (read modify write)

[link: Module register access (read modify write)]

   Runtime optimisation should be done by utilizing a local variable when more than one bitfield of a register is to be modified.

   Correct:
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
{
Ifx_DMA_BLK_ME_ADICR adicr;
adicr.U = dma->CH[channelId].ADICR.U;
adicr.B.SMF = incStep;
adicr.B.INCS = direction;
adicr.B.CBLS = size;
dma->CH[channelId].ADICR.U = adicr.U;
}

Wrong:

IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
{
dma->CH[channelId].ADICR.B.SMF = incStep;
dma->CH[channelId].ADICR.B.INCS = direction;
dma->CH[channelId].ADICR.B.CBLS = size;
}

[Previous page] [Next page]


iLLD_TC26B: Usage of enums

Usage of enums

enum convention in microcontroller /Std drivers

[link: enum convention in microcontroller /Std drivers]

    In case an enum represents a register bitfield value, then the following rules apply:
    - The enum type shall have an explicit name. The name shall not include register or bitfield short names. This is to abstract the setting when passed as a parameter to a function in the same way the function APIs names does.
    - Each enum member shall define explicitly an enum value with '='.
    - The enum documentation shall state for which register bitfield the enum has been defined with "Definition for <ModuleType>.<REGISTER NAME>.B.<BITFIELDNAME>", this to avoid misuse of the enum.
    - Each of the member shall have a documentation, that explain to users what is the enum for without reading the user manual.
    - Only enum defined in the current Std or base drivers shall be used.

    Correct:
// File Std/IfxQspi.h
// QSPI controller mode
// Definition for Ifx_QSPI.GLOBALCON.B.MS
typedef enum
{
IfxQspi_Mode_master = 0, // QSPI in "master" mode
IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
} IfxQspi_Mode;
void IfxQspi_foo(IfxQSPI* module)
{
if (module->GLOBALCON.B.MS != IfxQspi_Mode_slave)
{ //...
}
else
{ // ...
}
}

Wrong:

// File 1_SrvSw/If/SscIf.h
// SSC operation modes
typedef enum
{
SscIf_Mode_master, // Master mode
SscIf_Mode_slave, // Slave mode
SscIf_Mode_undefined // Undefined mode
} SscIf_Mode;
// File Std/IfxQspi.h
// QSPI controller mode
typedef enum
{
IfxQspi_GLOBALCON_MS_master = 0, // Corresponds with GLOBALCON.B.MS == 0
IfxQspi_GLOBALCON_MS_pwmOverSpi, // Corresponds with GLOBALCON.B.MS == 1
IfxQspi_GLOBALCON_MS_slave // Corresponds with GLOBALCON.B.MS == 2
} IfxQspi_GLOBALCON_MS;
void IfxQspi_foo(IfxQSPI* module)
{
if (module->GLOBALCON.B.MS != SscIf_Mode_slave)
{ //...
}
else
{ // ...
}
}

Usage of enums in microcontroller interface drivers

[link: Usage of enums in microcontroller interface drivers]

    The code dependencies shall be limited to the microcontroller HAL and service software interface /1_SrvSw/If, therefore only enums from this files can be used.
// File 1_SrvSw/If/SscIf.h
// SSC operation modes
typedef enum
{
SscIf_Mode_master, // Master mode
SscIf_Mode_slave, // Slave mode
SscIf_Mode_undefined // Undefined mode
} SscIf_Mode;
// File Ssc/IfxQspi_Ssc.h
// QSPI controller mode
// Definition for Ifx_QSPI.GLOBALCON.B.MS
typedef enum
{
IfxQspi_Mode_master = 0, // QSPI in "master" mode
IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
} IfxQspi_Mode;
SscIf_Mode IfxQspi_Ssc_foo(void)
{
SscIf_Mode mode;
switch ( IfxQspi_getMode(&MODULE_QSPI0))
{
case IfxQspi_Mode_master:
mode = SscIf_Mode_master;
break;
case IfxQspi_Mode_slave:
mode = IfxQspi_Mode_slave;
break;
default:
mode = SscIf_Mode_undefined;
break;
}
}

Enum name with index

[link: Enum name with index]

Do not use left zero padding for enum names, because the highest index number can not be assumed to be fixed.

Correct:

typedef enum
{
Dma_Channel_0 = 0,
Dma_Channel_1 = 1,
Dma_Channel_2 = 2,
Dma_Channel_3 = 3
} IfxQspi_Mode;

Wrong:

typedef enum
{
Dma_Channel_00 = 0,
Dma_Channel_01 = 1,
Dma_Channel_02 = 2,
Dma_Channel_03 = 3
} IfxQspi_Mode;

Enum members shall be prefixed with the enum type

[link: Enum members shall be prefixed with the enum type]

Correct:
typedef enum
{
IfxDma_Channel_0 = 0,
} IfxDma_Channel;

Wrong(IfxDma_ChannelId):

typedef enum
{
Dma_Channel_0 = 0,
} IfxDma_ChannelId;

[Previous page]


iLLD_TC26B: Resolver-to-digital Converter with DSADC

Resolver-to-digital Converter with DSADC

Table of Contents

  • Carrier generation
  • Signal acquisition and carrier cancellation
  • Timestamp acquisition
  • Angle tracking observer
    • Group delay estimation
  • Fault detection

One of the popular rotor positioning sensor used by electric motor drive is resolver. A resolver device modulates carrier signal R1-R2 by the SINE and COSINE function of actual angle and feeds it back into the controller unit (S1-S3, S2-S6).

AURIX family provides support for resolver-to-digital converter (RDC) by providing the following functionalities:

  • Carrier generation (DSADC hardware)
  • Signal acquisition and carrier cancellation (DSADC hardware)
  • Timestamp acquisition (GTM TIM hardware)

Additionally, the following functionalities are provided by software:

  • Angle tracking observer function
  • Fault detection

This page contains concept documentation of the driver software (DSADC RDC), especially implemented in files: IfxDsadc_Rdc.h and IfxDsadc_Rdc.c

Carrier generation

DSADC hardware supports the generation of resolver excitation carrier by providing PWM pin outputs which can be simply filtered by low-pass filter circuit to obtain a pair of differential signal.

Common configuration of the positive and negative signals are:

  • carrier signal frequency
  • bit-reversed PWM (optional, but recommended)
  • waveform mode: square, triangle, or sinusoidal

Those configuration are set by IfxDsadc_initCarrierGen() function which is called in the context of IfxDsadc_Rdc_init() function. Therefore, user only needs to call IfxDsadc_Rdc_init().

For each pin output (positive and negative), a low-pass filter and amplifier circuitry is required to drive a resolver device. Example of such circuitry can be seen in the figure below.

TODO: add picture

Signal acquisition and carrier cancellation

Two differential signals are generated from a resolver device (Sin+, Sin-, Cos+, Cos- or some write also as S1-S3, S2-S6). These signals basically can be connected directly into the two channels of DSADC, where each DSADC channel has P and N inputs.

Single DSADC channel and carrier cancelation configuration is done by function IfxDsadc_initChannel() which is called in the context of IfxDsadc_Rdc_init() function. Therefore, user only needs to call IfxDsadc_Rdc_init().

Common configuration items for each DSADC channel are:

  • modulator frequency (default: 10MHz)
  • CIC filter type (default: COMB3)
  • CIC decimation factor (default: 32)
  • FIR0 and FIR1 blocks (default: disabled)

Common configuration items of the carrier cancelation in each DSADC channel are:

  • offset compensation block (default: enabled)
  • integration count (default: 32)

With above default values (modulator frequency 10MHz, CIC decimation factor = 32, both FIRs disabled and integration count = 32), the output sample rate is: 10MHz / (32 * 32) = ~9.7kHz

In each acquired sample, interrupt service is requested by the first DSADC channel initialised by IfxDsadc_Rdc_init(). User's application shall provide an interrupt service routine (ISR) to handle this request. In the ISR, or an OS task which is synchronised to the event, user shall call IfxDsadc_Rdc_onEventA() function in order to update all necessary driver data related to this event.

Timestamp acquisition

Typically, user's application run at different sampling rate than DSADC output sampling rate. For example, motor control PWM interrupt occurs with 10 kHz sampling whereas the DSADC interrupt runs with ~9.7 kHz. This condition creates situation where the sampled resolver position is already aged with a few timer ticks, but can be significant to the motor control algorithm.

Therefore, timestamp which indicates the elapsed time since last DSADC channel sampling is required for compensating or computing the missing rotor position. In addition, this timestamp is also used for compensating the group delay which is inherent property of DSADC.

The implementation of timestamp acquisition uses following hardware resources:

  • one timebase unit or global timer (free-running), i.e. GTM TBU
  • first timer capture unit, to capture the time at the DSADC sample output event, i.e. using GTM TIM channel
  • second timer capture unit, to capture the time at the application sample point (e.g. PWM event), i.e. using GTM TIM channel.

Those resources are initialised by IfxDsadc_Rdc_initHwTimestamp() function which is called in the context of IfxDsadc_Rdc_init() function. Therefore, user doesn't need to call IfxDsadc_Rdc_initHwTimestamp() separately.

The user shall call IfxDsadc_Rdc_update() function in order to execute:

  • timestamp and group delay compensation
  • angle tracking observer
  • fault-detection

Angle tracking observer

Output samples acquired by DSADC channel and carrier cancelation are the envelope of SINE and COSINE resolver signals. In principle, ATAN2 function can be used to calculate the rotor position (angle), but in this driver a Ifx_AngleTrkF32 module is used.

When user's application calls function IfxDsadc_Rdc_update(), function Ifx_AngleTrkF32_step() is also called which contains implementation of:

  • ATAN2,
  • 3rd order angle tracking observer

The following figure shows the idea:

TODO: add picture

ATAN2 function computes the initial angle for the observer. Additional phase is computed from the timestamp and group delay to compensate 'missing' rotor position (angle). The combined initial angle and phase are used as reference for the first integrator for estimating acceleration. The second integrator estimates speed. The final integrator estimates the output angle.

The output angle is normally more 'smooth' in steady-state than the angle from ATAN2 function, albeit some settling time and overshoot which occur during transient. The dynamic performance depends on the gain constants set in the integrators. By default, the constants are calculated using formula from proceeding's paper Design of advanced resolver-to-digital converters, by Auger, et.al, in Electrimacs 2011, CergyPontoise (France), 6-8 june 2011.

Group delay estimation

It is shown in previous figure that group delay is required to estimate the actual position based on the angular speed and measured position.

The group delay of itself is estimated to be the sum of group delay of components of the DSADC channel used for acquisition such as CIC filter, FIR0, FIR1, and Integrator blocks.

The following formulas are used to estimate the group delays:

CIC group delay:
FIR0 group delay:
FIR1 group delay:
Integrator group delay:

The function IfxDsadc_getMainGroupDelay() implements those formulas, invoked by IfxDsadc_Rdc_update().

Fault detection

When application calls function IfxDsadc_Rdc_update(), fault detection implemented in Ifx_AngleTrkF32 module is also executed. The fault-detection is based on simple trigonometry equation:

With some tolerance, whenever the amplitude of one of SINE or COSINE signal is outside the allowed band, then fault flag is set. "SignalLoss" flag is set when the amplitude is below lower boundary. "SignalDegradation" flag is set when the amplitude is higher than upper boundary.

In addition, the flag "TrackingLoss" is set when the internal error value of the angle tracking observer is above a threshold.

Functions IfxDsadc_Rdc_getFault() can be used to check the error flags.

Configuration of the fault-detection (tolerance) boundary values and threshold are done by user's call to IfxDsadc_Rdc_init().


iLLD_TC26B: Modules

Modules
Here is a list of all modules:
[detail level 123456]
▼ iLLD |
▼ ASCLIN |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Operative Functions |
Utility Functions |
Configuration Functions |
External Functions |
IO Pin Configuration Functions |
ASCLIN Pin Mapping |
How to use the ASCLIN ASC Interface driver? |
▼ ASC |
Data Structures |
Interrupt Functions |
Simple Communication |
Stream based Communication (STDIO) |
Module Functions |
How to use the ASCLIN LIN Interface driver? |
▼ LIN |
Data Structures |
Elementary Transactions |
Module Functions |
Error Handling Functions |
Interrupt Functions |
Enumerations |
How to use the ASCLIN SPI Interface driver? |
▼ SPI |
Data Structures |
Module Functions |
Interrupt Functions |
Communication Functions |
▼ CCU6 |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Operative Functions |
Utility Functions |
Configuration Functions |
IO Pin Configuration Functions |
CCU6 Pin Mapping |
▼ ICU Interface driver |
How to use the CCU6 ICU Interface driver? |
Data Structures |
Module Initialize Functions |
Capture Control Functions |
Channel Initialize Functions |
▼ PWMBC Interface driver |
How to use the CCU6 PWMBC Interface driver? |
Data Structures |
Module Initialize Functions |
Modulation Control Functions |
Hall Pattern Functions |
▼ PWM Interface Driver |
How to use the CCU6 PWM Driver |
Data Structures |
PwmHl Functions |
StdIf Functions |
▼ TIMER Interface driver |
How to use the CCU6 TIMER Interface driver? |
Data Structures |
Module Initialize Functions |
Timer Control Functions |
▼ TimerWithTrigger Interface driver |
How to use the CCU6 TimerWithTrigger Interface driver? |
Data Structures |
Timer StdIf Functions |
Timer Functions |
▼ TPWM Interface driver |
How to use the CCU6 TPWM Interface driver? |
Data Structures |
Module Initialize Functions |
Modultion Control Functions |
▼ CIF |
Implementation |
▼ Standard Driver |
Standard Enumerations |
ISP Enumerations |
Standard Functions |
ISP Functions |
Linear Downscaler Functions |
Linear Downscaler Enumerations |
Memory Interface Functions |
Memory Interface Enumerations |
JPEG Encoder Functions |
JPEG Encoder Enumerations |
Security Watchdog Functions |
Security Watchdog Enumerations |
ISP Image Stabilization Functions |
ISP Image Stabilization Enumerations |
Extra Path Functions |
Extra Path Enumerations |
Debug Path Functions |
Debug Path Enumerations |
CIF Pin Mapping |
▼ CAM |
Camera Enumerations |
Camera Functions |
Camera Structures |
▼ CPU |
Implementation |
▼ Standard Driver |
Cpu Core Functions |
Interrupt Utility Functions |
Cache Management Functions |
Performance Counter Functions |
Synchronization Functions |
Cpu Utility Functions |
Enumerations |
Data Structures |
▼ Intrinsics |
▼ intrinsics for DCC compiler |
Minimum and Maximum of (Short) Integers |
Cross type arithmetic operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Intrinsics for GNU compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Insert Single Assembly Instruction |
▼ Intrinsics for GNU compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Minimum and Maximum of (sint16) Integers |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Intrinsics for TASKING compiler |
Cross type arithmetic operation |
Signed integer operation |
Unsigned integer operation |
Floating point operation |
Fractional Arithmetic Support |
Insert / Extract Bit-fields and Bits |
Interrupt Handling |
Miscellaneous Intrinsic Functions |
Packed Data Type Support |
Register Handling |
Saturation Arithmetic Support |
Insert Single Assembly Instruction |
▼ Core Startup Functions |
Startup Sequence |
How to enable cache during startup? |
How to enable CPUs during startup? |
▼ Interrupt Functions |
How to define Interrupts? |
Functions |
▼ Trap Functions |
Trap Function Hooks |
How to use the Trap Function Hooks? | Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?
▼ DMA |
Implementation |
▼ Standard Driver |
Enumerations |
Reset Functions |
Channel Transaction Functions |
Move Engine functions |
Channel configuration Functions |
Channel Halt Functions |
Double Buffer functions |
Interrupt functions |
How to use the DMA Interface driver? |
▼ DMA |
Data Structures |
Module Initialization |
Channel Initialization |
Linked Lists |
Channel Transactions |
▼ DSADC |
Implementation |
▼ Standard Driver |
Enumerations |
Operative Functions |
Support Functions |
Interrupt Functions |
IO Pin Configuration Functions |
DSADC Pin Mapping |
How to use the DSADC Interface driver? |
▼ DSADC |
Data Structures |
Module Functions |
Channel Functions |
Operative Functions |
Result Functions |
Interrupt Functions |
▼ RDC |
Variables |
Configuration Functions |
StdIf Functions |
▼ Structures |
Configuration Functions |
StdIf Functions |
Utility Functions |
Utility Functions |
▼ DTS |
Implementation |
▼ Standard Driver |
Control functions |
Status functions |
How to use the DTS Interface driver? |
▼ DTS |
Data Structures |
Module Initialisation functions |
Sensor Functions |
Conversion Functions |
▼ EMEM |
Implementation |
▼ Standard Driver |
Enumerations |
Module Functions |
▼ ERAY |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Interrupt Functions |
IO Pin Configuration Functions |
Module Functions |
Status Functions |
Configuration Functions |
Data Structures |
Operative Functions |
ERAY Pin Mapping |
How to use the ERAY Interface driver? |
▼ ERAY |
Data Structures |
Module Initialisation Functions |
Node Initialisation Functions |
Operative Functions |
Status Functions |
Interrupt Functions |
▼ ETH |
Implementation |
▼ Standard Driver |
Data Structures |
Unions |
Configuration Functions |
Utility Functions |
Initialisation Functions |
Enumerations |
ETH Pin Mapping |
▼ PHY_PEF7071 |
Functions |
▼ FCE |
Implementation |
▼ Standard Driver |
Enumerations |
Module Functions |
Support Function |
Interrupt Status Functions |
How to use the FCE CRC Interface driver? |
▼ CRC |
Data Structures |
Module Initialise Functions |
CRC Operation Functions |
Interrupt Status Function |
▼ FFT |
Implementation |
▼ Standard Driver |
Enumerations |
Utility Functions |
How to use the FFT driver? |
▼ FFT |
Data Structures |
Module Functions |
Interrupt Functions |
Transform Funtions |
▼ FLASH |
Implementation |
▼ Standard Driver |
Enumerations |
CommandSequence Functions |
Error Tracking Functions |
Global Definitions |
▼ GPT12 |
Implementation |
▼ Standard Driver |
Enumerations |
Interrupt Functions |
Configuration Functions |
Utility Functions |
Operative Functions |
GPT12 Pin Mapping |
▼ INCRENC |
How to use the GPT12 Incremental Encoder Driver |
Data structures |
Functions |
StdIf Functions |
▼ GTM |
▼ Implementation |
Enumerations |
Data Structures |
▼ Standard Driver |
Basic Functions |
Enumerations |
▼ Atom Basic Functionality |
ATOM Enumerations |
ATOM Channel Functions |
ATOM AGC Functions |
▼ Cmu Basic Functionality |
CMU Enumerations |
CMU Basic Functions |
▼ Dpll Basic Functionality |
DPLL Basic Functions |
▼ Tbu Basic Functionality |
TBU Enumerations |
TBU Basic Functions |
▼ Tim Basic Functionality |
TIM Enumerations |
TIM Channel Functions |
▼ Tom Basic Functionality |
TOM Enumerations |
TOM Channel Functions |
TOM TGC Functions |
▼ Atom Interface Drivers |
▼ ATOM PWM Interface Driver |
How to use the GTM ATOM PWM Driver |
ATOM PWM DataStructures |
Pwm Functions |
▼ ATOM PWM HL Interface Driver |
How to use the GTM ATOM PWM Driver |
Data Structures |
PwmHl Functions |
PwmHl StdIf Functions |
▼ ATOM Timer Interface Driver |
How to use the GTM ATOM Timer Driver |
Timer StdIf Functions |
Timer Functions |
Data Structures |
▼ TOM Interface Drivers |
▼ TOM PWM Interface Driver |
How to use the GTM TOM PWM Driver |
TOM PWM DataStructures |
Pwm Functions |
▼ TOM PWM HL Interface Driver |
How to use the GTM TOM PWM Driver |
Data Structures |
PwmHl Functions |
PwmHl StdIf Functions |
▼ TOM Timer Interface Driver |
How to use the GTM TOM Timer Driver |
Data Structures |
Timer Functions |
Timer StdIf Functions |
▼ Tim Interface Drivers |
▼ TIM Input Interface |
Data Structures |
Enumerations |
Funtions |
GTM Pin Mapping |
▼ GTM Trigger Configuration |
Enumerations |
Data Structures |
Trigger Functions |
▼ HSSL |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Hsct Functions |
Data Structures |
Hssl Functions |
How to use the HSSL Interface driver? |
▼ HSSL |
Data Structures |
Enumerations |
Module Functions |
Channel Functions |
Simple Communication |
Error Handling |
Streaming Communication |
▼ I2C |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Functions |
Data Structures |
I2C Pin Mapping |
How to use the I2c driver? |
▼ I2C |
Module Functions |
Enumerations |
Data Structures |
▼ IOM |
▼ Implementation |
Enum input signals |
Enumeration inputs |
▼ Standard Driver |
Enumeration |
Utility Functions |
Enumeration Obsolete (NOt recommended for use) |
Module Functions Obsolete (NOt recommended for use) |
▼ IOM Driver |
Driver Functions |
Structures |
▼ MSC |
▼ Implementation |
Enumerations |
▼ Standard Driver |
Enumerations |
Configure Flags |
Set Command Target |
Set Data |
Get Data |
Enable Module |
Reset Module |
Baud Calculator |
IO Pin Configuration Functions |
Module Functions |
MSC Pin Mapping |
How to use the MSC Interface driver? |
▼ MSC |
Enumerations |
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iLLD_TC26B: iLLD

Modules | Files
iLLD
Collaboration diagram for iLLD:

Modules

ASCLIN
CCU6
CIF
CPU
DMA
DSADC
DTS
EMEM
ERAY
ETH
FCE
FFT
FLASH
Global Definitions
GPT12
GTM
HSSL
I2C
IOM
MSC
MTU
MULTICAN
PORTS
PSI5
PSI5S
QSPI
SCU
SENT
SMU
SRC
STM
VADC
General functionalities

Files

file IfxStdIf.h
Standard interface types.

Detailed Description


iLLD_TC26B: ASCLIN

Modules | Files
ASCLIN
iLLD
Collaboration diagram for ASCLIN:

Modules

Implementation
Standard Driver
ASCLIN Pin Mapping
How to use the ASCLIN ASC Interface driver?
ASC
How to use the ASCLIN LIN Interface driver?
LIN
How to use the ASCLIN SPI Interface driver?
SPI

Files

file | IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
file | IfxAsclin_PinMap.c
ASCLIN I/O map.
file | IfxAsclin_PinMap.h
ASCLIN I/O map.
file | IfxAsclin_Asc.h
ASCLIN ASC details.
file | IfxAsclin_Lin.h
ASCLIN LIN details.
file | IfxAsclin_Spi.h
ASCLIN SPI details.
file | IfxAsclin.h
ASCLIN basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » ASCLIN
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Index {
IfxAsclin_Index_none = -1,
IfxAsclin_Index_0 = 0,
IfxAsclin_Index_1,
IfxAsclin_Index_2,
IfxAsclin_Index_3
}
List of the available Asclin resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Index

enum IfxAsclin_Index

List of the available Asclin resources.

Enumerator
IfxAsclin_Index_none | Not Selected.
IfxAsclin_Index_0 | ASCLIN Index 0.
IfxAsclin_Index_1 | ASCLIN Index 1.
IfxAsclin_Index_2 | ASCLIN Index 2.
IfxAsclin_Index_3 | ASCLIN Index 3.

Definition at line 58 of file IfxAsclin_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » ASCLIN
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Utility Functions
Configuration Functions
External Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Checksum {
IfxAsclin_Checksum_classic = 0,
IfxAsclin_Checksum_enhanced = 1
}
Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM. More...
enum IfxAsclin_ChecksumInjection {
IfxAsclin_ChecksumInjection_notWritten = 0,
IfxAsclin_ChecksumInjection_written = 1
}
Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI. More...
enum IfxAsclin_ClockPolarity {
IfxAsclin_ClockPolarity_idleLow = 0,
IfxAsclin_ClockPolarity_idleHigh = 1
}
CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL. More...
enum IfxAsclin_ClockSource {
IfxAsclin_ClockSource_noClock = 0,
IfxAsclin_ClockSource_kernelClock = 1,
IfxAsclin_ClockSource_oscillatorClock = 2,
IfxAsclin_ClockSource_flexRayClock = 4,
IfxAsclin_ClockSource_ascFastClock = 8,
IfxAsclin_ClockSource_ascSlowClock = 16
}
Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL. More...
enum IfxAsclin_CtsInputSelect {
IfxAsclin_CtsInputSelect_0,
IfxAsclin_CtsInputSelect_1,
IfxAsclin_CtsInputSelect_2,
IfxAsclin_CtsInputSelect_3
}
CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS. More...
enum IfxAsclin_DataLength {
IfxAsclin_DataLength_1 = 0,
IfxAsclin_DataLength_2,
IfxAsclin_DataLength_3,
IfxAsclin_DataLength_4,
IfxAsclin_DataLength_5,
IfxAsclin_DataLength_6,
IfxAsclin_DataLength_7,
IfxAsclin_DataLength_8,
IfxAsclin_DataLength_9,
IfxAsclin_DataLength_10,
IfxAsclin_DataLength_11,
IfxAsclin_DataLength_12,
IfxAsclin_DataLength_13,
IfxAsclin_DataLength_14,
IfxAsclin_DataLength_15,
IfxAsclin_DataLength_16
}
Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN. More...
enum IfxAsclin_FrameMode {
IfxAsclin_FrameMode_initialise = 0,
IfxAsclin_FrameMode_asc = 1,
IfxAsclin_FrameMode_spi = 2,
IfxAsclin_FrameMode_lin = 3
}
Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE. More...
enum IfxAsclin_HeaderResponseSelect {
IfxAsclin_HeaderResponseSelect_headerAndResponse = 0,
IfxAsclin_HeaderResponseSelect_headerOnly = 1
}
Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO. More...
enum IfxAsclin_IdleDelay {
IfxAsclin_IdleDelay_0,
IfxAsclin_IdleDelay_1,
IfxAsclin_IdleDelay_2,
IfxAsclin_IdleDelay_3,
IfxAsclin_IdleDelay_4,
IfxAsclin_IdleDelay_5,
IfxAsclin_IdleDelay_6,
IfxAsclin_IdleDelay_7
}
Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE. More...
enum IfxAsclin_LeadDelay {
IfxAsclin_LeadDelay_0,
IfxAsclin_LeadDelay_1,
IfxAsclin_LeadDelay_2,
IfxAsclin_LeadDelay_3,
IfxAsclin_LeadDelay_4,
IfxAsclin_LeadDelay_5,
IfxAsclin_LeadDelay_6,
IfxAsclin_LeadDelay_7
}
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD. More...
enum IfxAsclin_LinMode {
IfxAsclin_LinMode_slave = 0,
IfxAsclin_LinMode_master = 1
}
Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS. More...
enum IfxAsclin_LinResponseTimeoutMode {
IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0,
IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1
}
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM. More...
enum IfxAsclin_OversamplingFactor {
IfxAsclin_OversamplingFactor_4 = 3,
IfxAsclin_OversamplingFactor_5 = 4,
IfxAsclin_OversamplingFactor_6 = 5,
IfxAsclin_OversamplingFactor_7 = 6,
IfxAsclin_OversamplingFactor_8 = 7,
IfxAsclin_OversamplingFactor_9 = 8,
IfxAsclin_OversamplingFactor_10 = 9,
IfxAsclin_OversamplingFactor_11 = 10,
IfxAsclin_OversamplingFactor_12 = 11,
IfxAsclin_OversamplingFactor_13 = 12,
IfxAsclin_OversamplingFactor_14 = 13,
IfxAsclin_OversamplingFactor_15 = 14,
IfxAsclin_OversamplingFactor_16 = 15
}
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING. More...
enum IfxAsclin_ParityType {
IfxAsclin_ParityType_even = 0,
IfxAsclin_ParityType_odd = 1
}
Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD. More...
enum IfxAsclin_ReceiveBufferMode {
IfxAsclin_ReceiveBufferMode_rxFifo = 0,
IfxAsclin_ReceiveBufferMode_rxBuffer = 1
}
Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF. More...
enum IfxAsclin_RtsCtsPolarity {
IfxAsclin_RtsCtsPolarity_activeHigh = 0,
IfxAsclin_RtsCtsPolarity_activeLow = 1
}
Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL. More...
enum IfxAsclin_RxFifoInterruptLevel {
IfxAsclin_RxFifoInterruptLevel_1,
IfxAsclin_RxFifoInterruptLevel_2,
IfxAsclin_RxFifoInterruptLevel_3,
IfxAsclin_RxFifoInterruptLevel_4,
IfxAsclin_RxFifoInterruptLevel_5,
IfxAsclin_RxFifoInterruptLevel_6,
IfxAsclin_RxFifoInterruptLevel_7,
IfxAsclin_RxFifoInterruptLevel_8,
IfxAsclin_RxFifoInterruptLevel_9,
IfxAsclin_RxFifoInterruptLevel_10,
IfxAsclin_RxFifoInterruptLevel_11,
IfxAsclin_RxFifoInterruptLevel_12,
IfxAsclin_RxFifoInterruptLevel_13,
IfxAsclin_RxFifoInterruptLevel_14,
IfxAsclin_RxFifoInterruptLevel_15,
IfxAsclin_RxFifoInterruptLevel_16
}
Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL. More...
enum IfxAsclin_RxFifoOutletWidth {
IfxAsclin_RxFifoOutletWidth_0,
IfxAsclin_RxFifoOutletWidth_1,
IfxAsclin_RxFifoOutletWidth_2,
IfxAsclin_RxFifoOutletWidth_3
}
Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW. More...
enum IfxAsclin_RxInputSelect {
IfxAsclin_RxInputSelect_0,
IfxAsclin_RxInputSelect_1,
IfxAsclin_RxInputSelect_2,
IfxAsclin_RxInputSelect_3,
IfxAsclin_RxInputSelect_4,
IfxAsclin_RxInputSelect_5,
IfxAsclin_RxInputSelect_6,
IfxAsclin_RxInputSelect_7
}
Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI. More...
enum IfxAsclin_SamplePointPosition {
IfxAsclin_SamplePointPosition_1 = 1,
IfxAsclin_SamplePointPosition_2 = 2,
IfxAsclin_SamplePointPosition_3 = 3,
IfxAsclin_SamplePointPosition_4 = 4,
IfxAsclin_SamplePointPosition_5 = 5,
IfxAsclin_SamplePointPosition_6 = 6,
IfxAsclin_SamplePointPosition_7 = 7,
IfxAsclin_SamplePointPosition_8 = 8,
IfxAsclin_SamplePointPosition_9 = 9,
IfxAsclin_SamplePointPosition_10 = 10,
IfxAsclin_SamplePointPosition_11 = 11,
IfxAsclin_SamplePointPosition_12 = 12,
IfxAsclin_SamplePointPosition_13 = 13,
IfxAsclin_SamplePointPosition_14 = 14,
IfxAsclin_SamplePointPosition_15 = 15
}
Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT. More...
enum IfxAsclin_SamplesPerBit {
IfxAsclin_SamplesPerBit_one = 0,
IfxAsclin_SamplesPerBit_three = 1
}
Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM. More...
enum IfxAsclin_ShiftDirection {
IfxAsclin_ShiftDirection_lsbFirst = 0,
IfxAsclin_ShiftDirection_msbFirst = 1
}
SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB. More...
enum IfxAsclin_SlavePolarity {
IfxAsclin_SlavePolarity_idleLow = 0,
IfxAsclin_SlavePolarity_idlehigh = 1
}
Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL. More...
enum IfxAsclin_SleepMode {
IfxAsclin_SleepMode_enable = 0,
IfxAsclin_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS. More...
enum IfxAsclin_Status {
IfxAsclin_Status_configurationError = 0,
IfxAsclin_Status_noError = 1
}
Error status. More...
enum IfxAsclin_StopBit {
IfxAsclin_StopBit_0,
IfxAsclin_StopBit_1,
IfxAsclin_StopBit_2,
IfxAsclin_StopBit_3,
IfxAsclin_StopBit_4,
IfxAsclin_StopBit_5,
IfxAsclin_StopBit_6,
IfxAsclin_StopBit_7
}
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP. More...
enum IfxAsclin_SuspendMode {
IfxAsclin_SuspendMode_none = 0,
IfxAsclin_SuspendMode_hard = 1,
IfxAsclin_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxAsclin_TxFifoInletWidth {
IfxAsclin_TxFifoInletWidth_0,
IfxAsclin_TxFifoInletWidth_1,
IfxAsclin_TxFifoInletWidth_2,
IfxAsclin_TxFifoInletWidth_3
}
Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW. More...
enum IfxAsclin_TxFifoInterruptLevel {
IfxAsclin_TxFifoInterruptLevel_0,
IfxAsclin_TxFifoInterruptLevel_1,
IfxAsclin_TxFifoInterruptLevel_2,
IfxAsclin_TxFifoInterruptLevel_3,
IfxAsclin_TxFifoInterruptLevel_4,
IfxAsclin_TxFifoInterruptLevel_5,
IfxAsclin_TxFifoInterruptLevel_6,
IfxAsclin_TxFifoInterruptLevel_7,
IfxAsclin_TxFifoInterruptLevel_8,
IfxAsclin_TxFifoInterruptLevel_9,
IfxAsclin_TxFifoInterruptLevel_10,
IfxAsclin_TxFifoInterruptLevel_11,
IfxAsclin_TxFifoInterruptLevel_12,
IfxAsclin_TxFifoInterruptLevel_13,
IfxAsclin_TxFifoInterruptLevel_14,
IfxAsclin_TxFifoInterruptLevel_15
}
Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL. More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Checksum

enum IfxAsclin_Checksum

Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM.

Enumerator
IfxAsclin_Checksum_classic | classic checksum
IfxAsclin_Checksum_enhanced | enhanced checksum

Definition at line 62 of file IfxAsclin.h.

◆ IfxAsclin_ChecksumInjection

enum IfxAsclin_ChecksumInjection

Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI.

Enumerator
IfxAsclin_ChecksumInjection_notWritten | checksum byte is not written
IfxAsclin_ChecksumInjection_written | checksum byte is written

Definition at line 71 of file IfxAsclin.h.

◆ IfxAsclin_ClockPolarity

enum IfxAsclin_ClockPolarity

CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL.

Enumerator
IfxAsclin_ClockPolarity_idleLow | idle low
IfxAsclin_ClockPolarity_idleHigh | idle high

Definition at line 81 of file IfxAsclin.h.

◆ IfxAsclin_ClockSource

enum IfxAsclin_ClockSource

Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL.

Enumerator
IfxAsclin_ClockSource_noClock | no clock will be supplied
IfxAsclin_ClockSource_kernelClock | f clc will be supplied
IfxAsclin_ClockSource_oscillatorClock | XTAL oscillator clock foso0 will be supplied.
IfxAsclin_ClockSource_flexRayClock | f eray will be supplied
IfxAsclin_ClockSource_ascFastClock | f asclinf wiil be supplied
IfxAsclin_ClockSource_ascSlowClock | f asclins will be supplied

Definition at line 90 of file IfxAsclin.h.

◆ IfxAsclin_CtsInputSelect

enum IfxAsclin_CtsInputSelect

CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS.

Enumerator
IfxAsclin_CtsInputSelect_0 | CTS input pin 0.
IfxAsclin_CtsInputSelect_1 | CTS input pin 1.
IfxAsclin_CtsInputSelect_2 | CTS input pin 2.
IfxAsclin_CtsInputSelect_3 | CTS input pin 3.

Definition at line 103 of file IfxAsclin.h.

◆ IfxAsclin_DataLength

enum IfxAsclin_DataLength

Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.

Enumerator
IfxAsclin_DataLength_1 | number of bits per transfer 0
IfxAsclin_DataLength_2 | number of bits per transfer 1
IfxAsclin_DataLength_3 | number of bits per transfer 2
IfxAsclin_DataLength_4 | number of bits per transfer 3
IfxAsclin_DataLength_5 | number of bits per transfer 4
IfxAsclin_DataLength_6 | number of bits per transfer 5
IfxAsclin_DataLength_7 | number of bits per transfer 6
IfxAsclin_DataLength_8 | number of bits per transfer 7
IfxAsclin_DataLength_9 | number of bits per transfer 8
IfxAsclin_DataLength_10 | number of bits per transfer 9
IfxAsclin_DataLength_11 | number of bits per transfer 10
IfxAsclin_DataLength_12 | number of bits per transfer 11
IfxAsclin_DataLength_13 | number of bits per transfer 12
IfxAsclin_DataLength_14 | number of bits per transfer 13
IfxAsclin_DataLength_15 | number of bits per transfer 14
IfxAsclin_DataLength_16 | number of bits per transfer 15

Definition at line 114 of file IfxAsclin.h.

◆ IfxAsclin_FrameMode

enum IfxAsclin_FrameMode

Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE.

Enumerator
IfxAsclin_FrameMode_initialise | initialise mode
IfxAsclin_FrameMode_asc | asc mode
IfxAsclin_FrameMode_spi | spi mode
IfxAsclin_FrameMode_lin | lin mode

Definition at line 137 of file IfxAsclin.h.

◆ IfxAsclin_HeaderResponseSelect

enum IfxAsclin_HeaderResponseSelect

Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO.

Enumerator
IfxAsclin_HeaderResponseSelect_headerAndResponse | header and response expected
IfxAsclin_HeaderResponseSelect_headerOnly | header only expected

Definition at line 148 of file IfxAsclin.h.

◆ IfxAsclin_IdleDelay

enum IfxAsclin_IdleDelay

Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE.

Enumerator
IfxAsclin_IdleDelay_0 | idle delay in 0 bit times
IfxAsclin_IdleDelay_1 | idle delay in 1 bit times
IfxAsclin_IdleDelay_2 | idle delay in 2 bit times
IfxAsclin_IdleDelay_3 | idle delay in 3 bit times
IfxAsclin_IdleDelay_4 | idle delay in 4 bit times
IfxAsclin_IdleDelay_5 | idle delay in 5 bit times
IfxAsclin_IdleDelay_6 | idle delay in 6 bit times
IfxAsclin_IdleDelay_7 | idle delay in 7 bit times

Definition at line 159 of file IfxAsclin.h.

◆ IfxAsclin_LeadDelay

enum IfxAsclin_LeadDelay

Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD.

Enumerator
IfxAsclin_LeadDelay_0 | lead delay in 0 bit times
IfxAsclin_LeadDelay_1 | lead delay in 1 bit times
IfxAsclin_LeadDelay_2 | lead delay in 2 bit times
IfxAsclin_LeadDelay_3 | lead delay in 3 bit times
IfxAsclin_LeadDelay_4 | lead delay in 4 bit times
IfxAsclin_LeadDelay_5 | lead delay in 5 bit times
IfxAsclin_LeadDelay_6 | lead delay in 6 bit times
IfxAsclin_LeadDelay_7 | lead delay in 7 bit times

Definition at line 175 of file IfxAsclin.h.

◆ IfxAsclin_LinMode

enum IfxAsclin_LinMode

Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS.

Enumerator
IfxAsclin_LinMode_slave | operates in slave mode
IfxAsclin_LinMode_master | operates in master mode

Definition at line 190 of file IfxAsclin.h.

◆ IfxAsclin_LinResponseTimeoutMode

enum IfxAsclin_LinResponseTimeoutMode

Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM.

Enumerator
IfxAsclin_LinResponseTimeoutMode_frameTimeout | timeout threshold is for frame
IfxAsclin_LinResponseTimeoutMode_responseTimeout | timeout threshold is for reponse

Definition at line 199 of file IfxAsclin.h.

◆ IfxAsclin_OversamplingFactor

enum IfxAsclin_OversamplingFactor

Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING.

Enumerator
IfxAsclin_OversamplingFactor_4 | oversampling factor 4
IfxAsclin_OversamplingFactor_5 | oversampling factor 5
IfxAsclin_OversamplingFactor_6 | oversampling factor 6
IfxAsclin_OversamplingFactor_7 | oversampling factor 7
IfxAsclin_OversamplingFactor_8 | oversampling factor 8
IfxAsclin_OversamplingFactor_9 | oversampling factor 9
IfxAsclin_OversamplingFactor_10 | oversampling factor 10
IfxAsclin_OversamplingFactor_11 | oversampling factor 11
IfxAsclin_OversamplingFactor_12 | oversampling factor 12
IfxAsclin_OversamplingFactor_13 | oversampling factor 13
IfxAsclin_OversamplingFactor_14 | oversampling factor 14
IfxAsclin_OversamplingFactor_15 | oversampling factor 15
IfxAsclin_OversamplingFactor_16 | oversampling factor 16

Definition at line 208 of file IfxAsclin.h.

◆ IfxAsclin_ParityType

enum IfxAsclin_ParityType

Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD.

Enumerator
IfxAsclin_ParityType_even | even parity
IfxAsclin_ParityType_odd | odd parity

Definition at line 228 of file IfxAsclin.h.

◆ IfxAsclin_ReceiveBufferMode

enum IfxAsclin_ReceiveBufferMode

Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.

Enumerator
IfxAsclin_ReceiveBufferMode_rxFifo | RxFIFO mode.
IfxAsclin_ReceiveBufferMode_rxBuffer | single stage Rx buffer

Definition at line 237 of file IfxAsclin.h.

◆ IfxAsclin_RtsCtsPolarity

enum IfxAsclin_RtsCtsPolarity

Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL.

Enumerator
IfxAsclin_RtsCtsPolarity_activeHigh | ready/clear are active-high
IfxAsclin_RtsCtsPolarity_activeLow | ready/clear are active-low

Definition at line 246 of file IfxAsclin.h.

◆ IfxAsclin_RxFifoInterruptLevel

enum IfxAsclin_RxFifoInterruptLevel

Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL.

Enumerator
IfxAsclin_RxFifoInterruptLevel_1 | RX FIFO level 1.
IfxAsclin_RxFifoInterruptLevel_2 | RX FIFO level 2.
IfxAsclin_RxFifoInterruptLevel_3 | RX FIFO level 3.
IfxAsclin_RxFifoInterruptLevel_4 | RX FIFO level 4.
IfxAsclin_RxFifoInterruptLevel_5 | RX FIFO level 5.
IfxAsclin_RxFifoInterruptLevel_6 | RX FIFO level 6.
IfxAsclin_RxFifoInterruptLevel_7 | RX FIFO level 7.
IfxAsclin_RxFifoInterruptLevel_8 | RX FIFO level 8.
IfxAsclin_RxFifoInterruptLevel_9 | RX FIFO level 9.
IfxAsclin_RxFifoInterruptLevel_10 | RX FIFO level 10.
IfxAsclin_RxFifoInterruptLevel_11 | RX FIFO level 11.
IfxAsclin_RxFifoInterruptLevel_12 | RX FIFO level 12.
IfxAsclin_RxFifoInterruptLevel_13 | RX FIFO level 13.
IfxAsclin_RxFifoInterruptLevel_14 | RX FIFO level 14.
IfxAsclin_RxFifoInterruptLevel_15 | RX FIFO level 15.
IfxAsclin_RxFifoInterruptLevel_16 | RX FIFO level 16.

Definition at line 255 of file IfxAsclin.h.

◆ IfxAsclin_RxFifoOutletWidth

enum IfxAsclin_RxFifoOutletWidth

Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW.

Enumerator
IfxAsclin_RxFifoOutletWidth_0 | number of bytes 0
IfxAsclin_RxFifoOutletWidth_1 | number of bytes 1
IfxAsclin_RxFifoOutletWidth_2 | number of bytes 2
IfxAsclin_RxFifoOutletWidth_3 | number of bytes 3

Definition at line 278 of file IfxAsclin.h.

◆ IfxAsclin_RxInputSelect

enum IfxAsclin_RxInputSelect

Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI.

Enumerator
IfxAsclin_RxInputSelect_0 | alternate input selection 0
IfxAsclin_RxInputSelect_1 | alternate input selection 1
IfxAsclin_RxInputSelect_2 | alternate input selection 2
IfxAsclin_RxInputSelect_3 | alternate input selection 3
IfxAsclin_RxInputSelect_4 | alternate input selection 4
IfxAsclin_RxInputSelect_5 | alternate input selection 5
IfxAsclin_RxInputSelect_6 | alternate input selection 6
IfxAsclin_RxInputSelect_7 | alternate input selection 7

Definition at line 289 of file IfxAsclin.h.

◆ IfxAsclin_SamplePointPosition

enum IfxAsclin_SamplePointPosition

Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.

Enumerator
IfxAsclin_SamplePointPosition_1 | sample point position at 1
IfxAsclin_SamplePointPosition_2 | sample point position at 2
IfxAsclin_SamplePointPosition_3 | sample point position at 3
IfxAsclin_SamplePointPosition_4 | sample point position at 4
IfxAsclin_SamplePointPosition_5 | sample point position at 5
IfxAsclin_SamplePointPosition_6 | sample point position at 6
IfxAsclin_SamplePointPosition_7 | sample point position at 7
IfxAsclin_SamplePointPosition_8 | sample point position at 8
IfxAsclin_SamplePointPosition_9 | sample point position at 9
IfxAsclin_SamplePointPosition_10 | sample point position at 10
IfxAsclin_SamplePointPosition_11 | sample point position at 11
IfxAsclin_SamplePointPosition_12 | sample point position at 12
IfxAsclin_SamplePointPosition_13 | sample point position at 13
IfxAsclin_SamplePointPosition_14 | sample point position at 14
IfxAsclin_SamplePointPosition_15 | sample point position at 15

Definition at line 304 of file IfxAsclin.h.

◆ IfxAsclin_SamplesPerBit

enum IfxAsclin_SamplesPerBit

Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM.

Enumerator
IfxAsclin_SamplesPerBit_one | one sample per bit
IfxAsclin_SamplesPerBit_three | three samples per bit

Definition at line 326 of file IfxAsclin.h.

◆ IfxAsclin_ShiftDirection

enum IfxAsclin_ShiftDirection

SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB.

Enumerator
IfxAsclin_ShiftDirection_lsbFirst | LSB first.
IfxAsclin_ShiftDirection_msbFirst | MSB first.

Definition at line 336 of file IfxAsclin.h.

◆ IfxAsclin_SlavePolarity

enum IfxAsclin_SlavePolarity

Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL.

Enumerator
IfxAsclin_SlavePolarity_idleLow | idle low
IfxAsclin_SlavePolarity_idlehigh | idle high

Definition at line 346 of file IfxAsclin.h.

◆ IfxAsclin_SleepMode

enum IfxAsclin_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS.

Enumerator
IfxAsclin_SleepMode_enable | enables sleep mode
IfxAsclin_SleepMode_disable | disables sleep mode

Definition at line 355 of file IfxAsclin.h.

◆ IfxAsclin_Status

enum IfxAsclin_Status

Error status.

Enumerator
IfxAsclin_Status_configurationError | Configuration error.
IfxAsclin_Status_noError | No error.

Definition at line 363 of file IfxAsclin.h.

◆ IfxAsclin_StopBit

enum IfxAsclin_StopBit

ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP.

Enumerator
IfxAsclin_StopBit_0 | number of stop bits 0
IfxAsclin_StopBit_1 | number of stop bits 1
IfxAsclin_StopBit_2 | number of stop bits 2
IfxAsclin_StopBit_3 | number of stop bits 3
IfxAsclin_StopBit_4 | number of stop bits 4
IfxAsclin_StopBit_5 | number of stop bits 5
IfxAsclin_StopBit_6 | number of stop bits 6
IfxAsclin_StopBit_7 | number of stop bits 7

Definition at line 372 of file IfxAsclin.h.

◆ IfxAsclin_SuspendMode

enum IfxAsclin_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxAsclin_SuspendMode_none | No suspend.
IfxAsclin_SuspendMode_hard | Hard Suspend.
IfxAsclin_SuspendMode_soft | Soft Suspend.

Definition at line 386 of file IfxAsclin.h.

◆ IfxAsclin_TxFifoInletWidth

enum IfxAsclin_TxFifoInletWidth

Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW.

Enumerator
IfxAsclin_TxFifoInletWidth_0 | number of bytes 0
IfxAsclin_TxFifoInletWidth_1 | number of bytes 1
IfxAsclin_TxFifoInletWidth_2 | number of bytes 2
IfxAsclin_TxFifoInletWidth_3 | number of bytes 3

Definition at line 396 of file IfxAsclin.h.

◆ IfxAsclin_TxFifoInterruptLevel

enum IfxAsclin_TxFifoInterruptLevel

Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL.

Enumerator
IfxAsclin_TxFifoInterruptLevel_0 | TX FIFO level 0.
IfxAsclin_TxFifoInterruptLevel_1 | TX FIFO level 1.
IfxAsclin_TxFifoInterruptLevel_2 | TX FIFO level 2.
IfxAsclin_TxFifoInterruptLevel_3 | TX FIFO level 3.
IfxAsclin_TxFifoInterruptLevel_4 | TX FIFO level 4.
IfxAsclin_TxFifoInterruptLevel_5 | TX FIFO level 5.
IfxAsclin_TxFifoInterruptLevel_6 | TX FIFO level 6.
IfxAsclin_TxFifoInterruptLevel_7 | TX FIFO level 7.
IfxAsclin_TxFifoInterruptLevel_8 | TX FIFO level 8.
IfxAsclin_TxFifoInterruptLevel_9 | TX FIFO level 9.
IfxAsclin_TxFifoInterruptLevel_10 | TX FIFO level 10.
IfxAsclin_TxFifoInterruptLevel_11 | TX FIFO level 11.
IfxAsclin_TxFifoInterruptLevel_12 | TX FIFO level 12.
IfxAsclin_TxFifoInterruptLevel_13 | TX FIFO level 13.
IfxAsclin_TxFifoInterruptLevel_14 | TX FIFO level 14.
IfxAsclin_TxFifoInterruptLevel_15 | TX FIFO level 15.

Definition at line 407 of file IfxAsclin.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxAsclin_clearAllFlags (Ifx_ASCLIN *asclin)
clears all the flags More...
IFX_INLINE void | IfxAsclin_clearBreakDetectedFlag (Ifx_ASCLIN *asclin)
Clears the break detected flag. More...
IFX_INLINE void | IfxAsclin_clearCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the collision detection error flag. More...
IFX_INLINE void | IfxAsclin_clearFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearFrameErrorFlag (Ifx_ASCLIN *asclin)
Clears the frame error flag. More...
IFX_INLINE void | IfxAsclin_clearHeaderTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the header timeout flag. More...
IFX_INLINE void | IfxAsclin_clearKernelResetStatus (Ifx_ASCLIN *asclin)
Clears the kernel reset status. More...
IFX_INLINE void | IfxAsclin_clearLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_clearLinChecksumErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_clearLinParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_clearParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the parity error flag. More...
IFX_INLINE void | IfxAsclin_clearRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearResponseTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the response timeout flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoUnderflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the receive header end flag. More...
IFX_INLINE void | IfxAsclin_clearRxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the receive response end flag. More...
IFX_INLINE void | IfxAsclin_clearTransmissionCompletedFlag (Ifx_ASCLIN *asclin)
Clears the transmission pending flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearTxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit header end flag. More...
IFX_INLINE void | IfxAsclin_clearTxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit response end flag. More...
IFX_INLINE void | IfxAsclin_flushRxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO. More...
IFX_INLINE void | IfxAsclin_flushTxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO. More...
IFX_INLINE void | IfxAsclin_setBrdLowerlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's lower limit. More...
IFX_INLINE void | IfxAsclin_setBrdUpperlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's upper limit. More...
IFX_INLINE void | IfxAsclin_setChecksumInjection (Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection. More...
IFX_INLINE void | IfxAsclin_setChecksumMode (Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode. More...
IFX_INLINE void | IfxAsclin_setDataLength (Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer) More...
IFX_INLINE void | IfxAsclin_setDenominator (Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setDisableModuleRequest (Ifx_ASCLIN *asclin)
Sets the disable module request. More...
IFX_INLINE void | IfxAsclin_setEnableModuleRequest (Ifx_ASCLIN *asclin)
Sets the enable module request. More...
IFX_INLINE void | IfxAsclin_setFilterDepth (Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth. More...
IFX_INLINE void | IfxAsclin_setHeaderResponseSelect (Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection. More...
IFX_INLINE void | IfxAsclin_setIdleDelay (Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay. More...
IFX_INLINE void | IfxAsclin_setKernelResetOne (Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1. More...
IFX_INLINE void | IfxAsclin_setKernelResetZero (Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0. More...
IFX_INLINE void | IfxAsclin_setLeadDelay (Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay. More...
IFX_INLINE void | IfxAsclin_setLinBreakLength (Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length. More...
IFX_INLINE void | IfxAsclin_setLinHeaderTimeout (Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout. More...
IFX_INLINE void | IfxAsclin_setLinMode (Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutMode (Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutThreshold (Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold. More...
IFX_INLINE void | IfxAsclin_setNumerator (Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setOversampling (Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider. More...
IFX_INLINE void | IfxAsclin_setParityType (Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type. More...
IFX_INLINE void | IfxAsclin_setPrescaler (Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler) More...
IFX_INLINE void | IfxAsclin_setRxBufferMode (Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode. More...
IFX_INLINE void | IfxAsclin_setRxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE void | IfxAsclin_setRxFifoOutletWidth (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width. More...
IFX_INLINE void | IfxAsclin_setSampleMode (Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter) More...
IFX_INLINE void | IfxAsclin_setSamplePointPosition (Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position. More...
IFX_INLINE void | IfxAsclin_setShiftDirection (Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction. More...
IFX_INLINE void | IfxAsclin_setStopBit (Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits. More...
IFX_INLINE void | IfxAsclin_setTransmitHeaderRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit header request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitResponseRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit response request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitWakeRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmission wake request flag. More...
IFX_INLINE void | IfxAsclin_setTxFifoInletWidth (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width. More...
IFX_INLINE void | IfxAsclin_setTxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...

Detailed Description

Function Documentation

◆ IfxAsclin_clearAllFlags()

IFX_INLINE void IfxAsclin_clearAllFlags ( Ifx_ASCLIN * asclin )

clears all the flags

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1576 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_clearBreakDetectedFlag()

IFX_INLINE void IfxAsclin_clearBreakDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the break detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1582 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearCollisionDetectionErrorFlag()

IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag ( Ifx_ASCLIN * asclin )

Clears the collision detection error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1588 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearFallingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the falling edge detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1594 of file IfxAsclin.h.

◆ IfxAsclin_clearFrameErrorFlag()

IFX_INLINE void IfxAsclin_clearFrameErrorFlag ( Ifx_ASCLIN * asclin )

Clears the frame error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1600 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearHeaderTimeoutFlag()

IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag ( Ifx_ASCLIN * asclin )

Clears the header timeout flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1606 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearKernelResetStatus()

IFX_INLINE void IfxAsclin_clearKernelResetStatus ( Ifx_ASCLIN * asclin )

Clears the kernel reset status.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1612 of file IfxAsclin.h.

◆ IfxAsclin_clearLinAutoBaudDetectionErrorFlag()

IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag ( Ifx_ASCLIN * asclin )

Clears the auto baudrate detection error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1618 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearLinChecksumErrorFlag()

IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag ( Ifx_ASCLIN * asclin )

Clears the LIN checksum error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1624 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearLinParityErrorFlag()

IFX_INLINE void IfxAsclin_clearLinParityErrorFlag ( Ifx_ASCLIN * asclin )

Clears the LIN parity error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1630 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearParityErrorFlag()

IFX_INLINE void IfxAsclin_clearParityErrorFlag ( Ifx_ASCLIN * asclin )

Clears the parity error flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1636 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError().

◆ IfxAsclin_clearRaisingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag ( Ifx_ASCLIN * asclin )

Clears the raising edge detected flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1642 of file IfxAsclin.h.

◆ IfxAsclin_clearResponseTimeoutFlag()

IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag ( Ifx_ASCLIN * asclin )

Clears the response timeout flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1648 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearRxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO level flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1654 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_isrReceive().

◆ IfxAsclin_clearRxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO overflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1660 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearRxFifoUnderflowFlag()

IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag ( Ifx_ASCLIN * asclin )

Clears the Rx FIFO underflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1666 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearRxHeaderEndFlag()

IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag ( Ifx_ASCLIN * asclin )

Clears the receive header end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1672 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_clearRxResponseEndFlag()

IFX_INLINE void IfxAsclin_clearRxResponseEndFlag ( Ifx_ASCLIN * asclin )

Clears the receive response end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1678 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_clearTransmissionCompletedFlag()

IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag ( Ifx_ASCLIN * asclin )

Clears the transmission pending flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1684 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_isrError().

◆ IfxAsclin_clearTxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag ( Ifx_ASCLIN * asclin )

Clears the Tx FIFO level flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1690 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_isrTransmit().

◆ IfxAsclin_clearTxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag ( Ifx_ASCLIN * asclin )

Clears the Tx FIFO overflow flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1696 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_clearTxHeaderEndFlag()

IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag ( Ifx_ASCLIN * asclin )

Clears the transmit header end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1702 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_clearTxResponseEndFlag()

IFX_INLINE void IfxAsclin_clearTxResponseEndFlag ( Ifx_ASCLIN * asclin )

Clears the transmit response end flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1708 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_flushRxFifo()

IFX_INLINE void IfxAsclin_flushRxFifo ( Ifx_ASCLIN * asclin )

Flushes (empties) the Rx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1894 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_clearRx(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_flushTxFifo()

IFX_INLINE void IfxAsclin_flushTxFifo ( Ifx_ASCLIN * asclin )

Flushes (empties) the Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1900 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_clearTx(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setBrdLowerlimt()

IFX_INLINE void IfxAsclin_setBrdLowerlimt | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | limit
 | ) |  |

Sets the baudrate detection's lower limit.

Parameters
asclin | pointer to ASCLIN registers
limit | value of the lower limit
Returns
None

Definition at line 2167 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setBrdUpperlimt()

IFX_INLINE void IfxAsclin_setBrdUpperlimt | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | limit
 | ) |  |

Sets the baudrate detection's upper limit.

Parameters
asclin | pointer to ASCLIN registers
limit | value of the upper limit
Returns
None

Definition at line 2173 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setChecksumInjection()

IFX_INLINE void IfxAsclin_setChecksumInjection | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ChecksumInjection | csi
 | ) |  |

Sets the checksum injection.

Parameters
asclin | pointer to ASCLIN registers
csi | checksum injection selection (not written / written)
Returns
None

Definition at line 2179 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setChecksumMode()

IFX_INLINE void IfxAsclin_setChecksumMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_Checksum | mode
 | ) |  |

Sets the checksum mode.

Parameters
asclin | pointer to ASCLIN registers
mode | checksum mode selection (classic / enhanced)
Returns
None

Definition at line 2185 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Lin_sendFrame().

◆ IfxAsclin_setDataLength()

IFX_INLINE void IfxAsclin_setDataLength | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_DataLength | length
 | ) |  |

Sets the data length (number of bits per transfer)

Parameters
asclin | pointer to ASCLIN registers
length | data length selection
Returns
None

Definition at line 2203 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setDenominator()

IFX_INLINE void IfxAsclin_setDenominator | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | denominator
 | ) |  |

Sets the denominator of the fractional divider.

Parameters
asclin | pointer to ASCLIN registers
denominator | value of the denominator
Returns
None

Definition at line 2209 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setDisableModuleRequest()

IFX_INLINE void IfxAsclin_setDisableModuleRequest ( Ifx_ASCLIN * asclin )

Sets the disable module request.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2215 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_Lin_disableModule(), and IfxAsclin_Spi_disableModule().

◆ IfxAsclin_setEnableModuleRequest()

IFX_INLINE void IfxAsclin_setEnableModuleRequest ( Ifx_ASCLIN * asclin )

Sets the enable module request.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2221 of file IfxAsclin.h.

Referenced by IfxAsclin_enableModule().

◆ IfxAsclin_setFilterDepth()

IFX_INLINE void IfxAsclin_setFilterDepth | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | depth
 | ) |  |

Sets digital glitch filter depth.

Parameters
asclin | pointer to ASCLIN registers
depth | digital glitch filter depth selection (1 to 63)
Returns
None

Definition at line 2227 of file IfxAsclin.h.

◆ IfxAsclin_setHeaderResponseSelect()

IFX_INLINE void IfxAsclin_setHeaderResponseSelect | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_HeaderResponseSelect | type
 | ) |  |

Sets the header response selection.

Parameters
asclin | pointer to ASCLIN registers
type | type of selection (header and response or header only)
Returns
None

Definition at line 2239 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_ignoreHeader(), and IfxAsclin_Lin_initModule().

◆ IfxAsclin_setIdleDelay()

IFX_INLINE void IfxAsclin_setIdleDelay | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_IdleDelay | delay
 | ) |  |

Sets the idle delay.

Parameters
asclin | pointer to ASCLIN registers
delay | idle delay selection
Returns
None

Definition at line 2245 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setKernelResetOne()

IFX_INLINE void IfxAsclin_setKernelResetOne ( Ifx_ASCLIN * asclin )

Sets the kernal reset of the KRST1.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2251 of file IfxAsclin.h.

◆ IfxAsclin_setKernelResetZero()

IFX_INLINE void IfxAsclin_setKernelResetZero ( Ifx_ASCLIN * asclin )

Sets the kernel reset of the KRST0.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2257 of file IfxAsclin.h.

◆ IfxAsclin_setLeadDelay()

IFX_INLINE void IfxAsclin_setLeadDelay | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LeadDelay | delay
 | ) |  |

Sets the lead delay.

Parameters
asclin | pointer to ASCLIN registers
delay | lead delay selection
Returns
None

Definition at line 2263 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setLinBreakLength()

IFX_INLINE void IfxAsclin_setLinBreakLength | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | length
 | ) |  |

Sets the LIN break length.

Parameters
asclin | pointer to ASCLIN registers
length | value of the break length
Returns
None

Definition at line 2269 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinHeaderTimeout()

IFX_INLINE void IfxAsclin_setLinHeaderTimeout | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 | timeout
 | ) |  |

Sets the LIN header timeout.

Parameters
asclin | pointer to ASCLIN registers
timeout | value of the header timeout
Returns
None

Definition at line 2275 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinMode()

IFX_INLINE void IfxAsclin_setLinMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LinMode | mode
 | ) |  |

Sets the LIN mode of operation.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selection (slave / master)
Returns
None

Definition at line 2281 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinResponseTimeoutMode()

IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_LinResponseTimeoutMode | mode
 | ) |  |

Sets the LIN response timeout mode.

Parameters
asclin | pointer to ASCLIN registers
mode | LIN response timeout mode selection
Returns
None

Definition at line 2287 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setLinResponseTimeoutThreshold()

IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | threshold
 | ) |  |

Sets the LIN response timeout threshold.

Parameters
asclin | pointer to ASCLIN registers
threshold | value of the tomeout threshold (1 to 256 bit times)
Returns
None

Definition at line 2293 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_setNumerator()

IFX_INLINE void IfxAsclin_setNumerator | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | numerator
 | ) |  |

Sets the numerator of the fractional divider.

Parameters
asclin | pointer to ASCLIN registers
numerator | value of the numerator
Returns
None

Definition at line 2299 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setOversampling()

IFX_INLINE void IfxAsclin_setOversampling | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_OversamplingFactor | ovsFactor
 | ) |  |

Sets the division ratio of the baudrate post divider.

Parameters
asclin | pointer to ASCLIN registers
ovsFactor | value of oversampling factor
Returns
None

Definition at line 2305 of file IfxAsclin.h.

Referenced by IfxAsclin_setBaudrateBitFields().

◆ IfxAsclin_setParityType()

IFX_INLINE void IfxAsclin_setParityType | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ParityType | type
 | ) |  |

Sets the parity type.

Parameters
asclin | pointer to ASCLIN registers
type | parity type selction (even / odd)
Returns
None

Definition at line 2311 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Lin_initModule().

◆ IfxAsclin_setPrescaler()

IFX_INLINE void IfxAsclin_setPrescaler | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | prescaler
 | ) |  |

Sets the division ratio of the predivider (prescaler)

Parameters
asclin | pointer to ASCLIN registers
prescaler | value of prescaler
Returns
None

Definition at line 2317 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_setBaudrateBitFields(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxBufferMode()

IFX_INLINE void IfxAsclin_setRxBufferMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ReceiveBufferMode | mode
 | ) |  |

Sets the receive buffer mode.

Parameters
asclin | pointer to ASCLIN registers
mode | receive buffer mode selection (Rx FIFO or single stage Rx buffer)
Returns
None

Definition at line 2329 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxFifoInterruptLevel()

IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxFifoInterruptLevel | level
 | ) |  |

Sets the Tx FIFO interrupt level.

Parameters
asclin | pointer to ASCLIN registers
level | interrupt level selection
Returns
None

Definition at line 2335 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRxFifoOutletWidth()

IFX_INLINE void IfxAsclin_setRxFifoOutletWidth | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxFifoOutletWidth | width
 | ) |  |

Sets the receive FIFO outlet width.

Parameters
asclin | pointer to ASCLIN registers
width | number of bytes read to the Rx FIFO with one FPI bus read
Returns
None

Definition at line 2341 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSampleMode()

IFX_INLINE void IfxAsclin_setSampleMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SamplesPerBit | medianFilter
 | ) |  |

Sets the sample mode (number of samples per bit / median filter)

Parameters
asclin | pointer to ASCLIN registers
medianFilter | value of the median filter
Returns
None

Definition at line 2353 of file IfxAsclin.h.

◆ IfxAsclin_setSamplePointPosition()

IFX_INLINE void IfxAsclin_setSamplePointPosition | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SamplePointPosition | spPosition
 | ) |  |

Sets the sampling point position.

Parameters
asclin | pointer to ASCLIN registers
spPosition | sample point position selection
Returns
None

Definition at line 2359 of file IfxAsclin.h.

◆ IfxAsclin_setShiftDirection()

IFX_INLINE void IfxAsclin_setShiftDirection | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ShiftDirection | dir
 | ) |  |

Sets the shift direction.

Parameters
asclin | pointer to ASCLIN registers
dir | shift direction selection (LSB / MSB first)
Returns
None

Definition at line 2365 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setStopBit()

IFX_INLINE void IfxAsclin_setStopBit | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_StopBit | stopBit
 | ) |  |

Sets the number of stop bits.

Parameters
asclin | pointer to ASCLIN registers
stopBit | number of stop bits selection
Returns
None

Definition at line 2386 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setTransmitHeaderRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmit header request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2403 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_sendHeader().

◆ IfxAsclin_setTransmitResponseRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmit response request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2409 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_sendResponse().

◆ IfxAsclin_setTransmitWakeRequestFlag()

IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag ( Ifx_ASCLIN * asclin )

Sets the transmission wake request flag.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 2415 of file IfxAsclin.h.

◆ IfxAsclin_setTxFifoInletWidth()

IFX_INLINE void IfxAsclin_setTxFifoInletWidth | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_TxFifoInletWidth | width
 | ) |  |

Sets the transmit FIFO inlet width.

Parameters
asclin | pointer to ASCLIN registers
width | number of bytes written to the Tx FIFO with one FPI bus write
Returns
None

Definition at line 2421 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setTxFifoInterruptLevel()

IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_TxFifoInterruptLevel | level
 | ) |  |

Sets the Tx FIFO interrupt level.

Parameters
asclin | pointer to ASCLIN registers
level | interrupt level selection
Returns
None

Definition at line 2427 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE boolean | IfxAsclin_getBreakDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the break detected flag status. More...
IFX_INLINE uint8 | IfxAsclin_getClockSource (Ifx_ASCLIN *asclin)
Returns the clock source. More...
IFX_INLINE boolean | IfxAsclin_getClockStatus (Ifx_ASCLIN *asclin)
Returns the clock status. More...
IFX_INLINE boolean | IfxAsclin_getCollisionDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the collision detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getFallingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getFrameErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the frame error flag status. More...
IFX_INLINE boolean | IfxAsclin_getHeaderTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the header timeout flag status. More...
IFX_INLINE boolean | IfxAsclin_getKernelResetStatus (Ifx_ASCLIN *asclin)
Returns the kernel reset status. More...
IFX_INLINE boolean | IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinChecksumErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status. More...
IFX_INLINE boolean | IfxAsclin_getModuleStatus (Ifx_ASCLIN *asclin)
Returns the module status. More...
IFX_INLINE boolean | IfxAsclin_getParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the parity error flag status. More...
IFX_INLINE uint16 | IfxAsclin_getPrescaler (Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler) More...
IFX_INLINE boolean | IfxAsclin_getRaisingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getReceiveSignalStatus (Ifx_ASCLIN *asclin)
Returns the received signal status. More...
IFX_INLINE boolean | IfxAsclin_getResponseTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the response timeout flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoOutletWidth (Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoUnderflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive response end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmissionCompletedFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmission pending flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmitSignalStatus (Ifx_ASCLIN *asclin)
Returns the transmit signal status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoInletWidth (Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit response end flag status. More...
IFX_INLINE void | IfxAsclin_setSleepMode (Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
IFX_EXTERN float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IFX_EXTERN IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
IFX_EXTERN float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
IFX_EXTERN float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
IFX_EXTERN float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
IFX_EXTERN void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...

Detailed Description

Function Documentation

◆ IfxAsclin_getAddress()

IFX_EXTERN Ifx_ASCLIN* IfxAsclin_getAddress ( IfxAsclin_Index asclin )

API to get the address for ASCLIN HW module register memory map.

Parameters
asclin Resource index of the ASCLIN
Returns
ASCLIN module register address

Definition at line 60 of file IfxAsclin.c.

◆ IfxAsclin_getBreakDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the break detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
break detected flag status

Definition at line 1906 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getClockSource()

IFX_INLINE uint8 IfxAsclin_getClockSource ( Ifx_ASCLIN * asclin )

Returns the clock source.

Parameters
asclin pointer to ASCLIN registers
Returns
clock source

Definition at line 1912 of file IfxAsclin.h.

Referenced by IfxAsclin_getFaFrequency(), IfxAsclin_setBaudrateBitFields(), and IfxAsclin_setBitTiming().

◆ IfxAsclin_getClockStatus()

IFX_INLINE boolean IfxAsclin_getClockStatus ( Ifx_ASCLIN * asclin )

Returns the clock status.

Parameters
asclin pointer to ASCLIN registers
Returns
clock status (off / on)

Definition at line 1918 of file IfxAsclin.h.

Referenced by IfxAsclin_setClockSource().

◆ IfxAsclin_getCollisionDetectionErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the collision detection error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
collision detection error flag status

Definition at line 1924 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getFaFrequency()

IFX_EXTERN float32 IfxAsclin_getFaFrequency ( Ifx_ASCLIN * asclin )

Returns the ASCLIN module FA frequency in Hz.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module FA frequency in Hz

Definition at line 77 of file IfxAsclin.c.

Referenced by IfxAsclin_getPdFrequency().

◆ IfxAsclin_getFallingEdgeDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the falling edge detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
falling edge detected flag status

Definition at line 1930 of file IfxAsclin.h.

◆ IfxAsclin_getFrameErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the frame error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
frame error flag status

Definition at line 1936 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getHeaderTimeoutFlagStatus()

IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus ( Ifx_ASCLIN * asclin )

Returns the header timeout flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
header timeout flag status

Definition at line 1942 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getIndex()

IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex ( Ifx_ASCLIN * asclin )

API to get the resource index of the ASCLIN specified.

Returns
asclin resource index

Definition at line 111 of file IfxAsclin.c.

Referenced by IfxAsclin_getSrcPointerEr(), IfxAsclin_getSrcPointerRx(), and IfxAsclin_getSrcPointerTx().

◆ IfxAsclin_getKernelResetStatus()

IFX_INLINE boolean IfxAsclin_getKernelResetStatus ( Ifx_ASCLIN * asclin )

Returns the kernel reset status.

Parameters
asclin pointer to ASCLIN registers
Returns
kernel reset status

Definition at line 1948 of file IfxAsclin.h.

◆ IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN auto baudrate detection error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN auto baudrate detection error flag status

Definition at line 1954 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getLinChecksumErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN checksum error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN checksum error flag status

Definition at line 1960 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getLinParityErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the LIN parity error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
LIN parity error flag status

Definition at line 1966 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getModuleStatus()

IFX_INLINE boolean IfxAsclin_getModuleStatus ( Ifx_ASCLIN * asclin )

Returns the module status.

Parameters
asclin pointer to ASCLIN registers
Returns
module status (enabled / disabled)

Definition at line 1972 of file IfxAsclin.h.

◆ IfxAsclin_getOvsFrequency()

IFX_EXTERN float32 IfxAsclin_getOvsFrequency ( Ifx_ASCLIN * asclin )

Returns the OVS frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module OVS frequency in Hz

Definition at line 131 of file IfxAsclin.c.

Referenced by IfxAsclin_getShiftFrequency().

◆ IfxAsclin_getParityErrorFlagStatus()

IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus ( Ifx_ASCLIN * asclin )

Returns the parity error flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
parity error flag status

Definition at line 1978 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError().

◆ IfxAsclin_getPdFrequency()

IFX_EXTERN float32 IfxAsclin_getPdFrequency ( Ifx_ASCLIN * asclin )

Returns the PD frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module PD frequency in Hz

Definition at line 137 of file IfxAsclin.c.

Referenced by IfxAsclin_getOvsFrequency(), and IfxAsclin_setBitTiming().

◆ IfxAsclin_getPrescaler()

IFX_INLINE uint16 IfxAsclin_getPrescaler ( Ifx_ASCLIN * asclin )

Returns the division ratio of the predivider (prescaler)

Parameters
asclin pointer to ASCLIN registers
Returns
value of prescaler

Definition at line 1984 of file IfxAsclin.h.

◆ IfxAsclin_getRaisingEdgeDetectedFlagStatus()

IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the raising edge detected flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
raising edge detected flag status

Definition at line 1990 of file IfxAsclin.h.

◆ IfxAsclin_getReceiveSignalStatus()

IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus ( Ifx_ASCLIN * asclin )

Returns the received signal status.

Parameters
asclin pointer to ASCLIN registers
Returns
received signal status (0 is low & 1 is high)

Definition at line 1996 of file IfxAsclin.h.

◆ IfxAsclin_getResponseTimeoutFlagStatus()

IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus ( Ifx_ASCLIN * asclin )

Returns the response timeout flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
response timeout flag status

Definition at line 2002 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrError().

◆ IfxAsclin_getRxFifoFillLevel()

IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel ( Ifx_ASCLIN * asclin )

Returns the current filling level of Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
current filling level of Rx FIFO

Definition at line 2008 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrReceive(), and IfxAsclin_Spi_read().

◆ IfxAsclin_getRxFifoFillLevelFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO level flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO level flag status

Definition at line 2014 of file IfxAsclin.h.

◆ IfxAsclin_getRxFifoOutletWidth()

IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth ( Ifx_ASCLIN * asclin )

Returns the receive FIFO inlet width.

Parameters
asclin pointer to ASCLIN registers
Returns
number of bytes read to the Rx FIFO with one FPI bus read

Definition at line 2020 of file IfxAsclin.h.

◆ IfxAsclin_getRxFifoOverflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO overflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO overflow flag status

Definition at line 2026 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForReceivedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getRxFifoUnderflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Rx FIFO underflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Rx FIFO underflow flag status

Definition at line 2032 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getRxHeaderEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the receive header end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
receive header end flag status

Definition at line 2038 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedHeaderFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_getRxResponseEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the receive response end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
receive response end flag status

Definition at line 2044 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForReceivedResponseFlags(), and IfxAsclin_Lin_isrReceive().

◆ IfxAsclin_getShiftFrequency()

IFX_EXTERN float32 IfxAsclin_getShiftFrequency ( Ifx_ASCLIN * asclin )

Returns the SHIFT frequency.

Parameters
asclin pointer to ASCLIN registers
Returns
Returns the ASCLIN module SHIFT frequency in Hz

Definition at line 143 of file IfxAsclin.c.

◆ IfxAsclin_getTransmissionCompletedFlagStatus()

IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmission pending flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmission pending flag status

Definition at line 2050 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_isrError().

◆ IfxAsclin_getTransmitSignalStatus()

IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus ( Ifx_ASCLIN * asclin )

Returns the transmit signal status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit signal status (0 is low & 1 is high)

Definition at line 2056 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoFillLevel()

IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel ( Ifx_ASCLIN * asclin )

Returns the current filling level of Tx FIFO.

Parameters
asclin pointer to ASCLIN registers
Returns
current filling level of Tx FIFO

Definition at line 2062 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_flushTx(), IfxAsclin_Asc_isrTransmit(), and IfxAsclin_Spi_write().

◆ IfxAsclin_getTxFifoFillLevelFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Tx FIFO level flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Tx FIFO level flag status

Definition at line 2068 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoInletWidth()

IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth ( Ifx_ASCLIN * asclin )

Returns the transmit FIFO inlet width.

Parameters
asclin pointer to ASCLIN registers
Returns
number of bytes written to the Tx FIFO with one FPI bus write

Definition at line 2074 of file IfxAsclin.h.

◆ IfxAsclin_getTxFifoOverflowFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus ( Ifx_ASCLIN * asclin )

Returns the Tx FIFO overflow flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
Tx FIFO overflow flag status

Definition at line 2080 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_isrError(), IfxAsclin_Lin_checkForTransmittedResponseFlags(), IfxAsclin_Lin_isrError(), and IfxAsclin_Spi_isrError().

◆ IfxAsclin_getTxHeaderEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmit header end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit header end flag status

Definition at line 2086 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedHeaderFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_getTxResponseEndFlagStatus()

IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus ( Ifx_ASCLIN * asclin )

Returns the transmit response end flag status.

Parameters
asclin pointer to ASCLIN registers
Returns
transmit response end flag status

Definition at line 2092 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_checkForTransmittedResponseFlags(), and IfxAsclin_Lin_isrTransmit().

◆ IfxAsclin_resetModule()

IFX_EXTERN void IfxAsclin_resetModule ( Ifx_ASCLIN * asclin )

resets Asclin kernel

Parameters
asclin pointer to ASCLIN resgisters
Returns
None

Definition at line 209 of file IfxAsclin.c.

◆ IfxAsclin_setSleepMode()

IFX_INLINE void IfxAsclin_setSleepMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 2377 of file IfxAsclin.h.


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxAsclin_disableAllFlags (Ifx_ASCLIN *asclin)
disables all flags More...
IFX_INLINE void | IfxAsclin_enableAutoBaudrateDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection. More...
IFX_INLINE void | IfxAsclin_enableBreakDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag. More...
IFX_INLINE void | IfxAsclin_enableCts (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS. More...
IFX_INLINE void | IfxAsclin_enableFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableFrameErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag. More...
IFX_INLINE void | IfxAsclin_enableHardwareChecksum (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum. More...
IFX_INLINE void | IfxAsclin_enableHeaderTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag. More...
IFX_INLINE void | IfxAsclin_enableLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_enableLinChecksumErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_enableLinParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_enableLoopBackMode (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode. More...
IFX_INLINE void | IfxAsclin_enableParity (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits. More...
IFX_INLINE void | IfxAsclin_enableParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag. More...
IFX_INLINE void | IfxAsclin_enableRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableResponseTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoInlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register. More...
IFX_INLINE void | IfxAsclin_enableRxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoUnderflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag. More...
IFX_INLINE void | IfxAsclin_enableRxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag. More...
IFX_INLINE void | IfxAsclin_enableTransmissionCompletedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOutlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableTxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag. More...
IFX_INLINE void | IfxAsclin_enableTxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag. More...
IFX_INLINE boolean | IfxAsclin_isModuleSuspended (Ifx_ASCLIN *asclin)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxAsclin_setClockPolarity (Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity. More...
IFX_INLINE void | IfxAsclin_setCtsInput (Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin. More...
IFX_INLINE void | IfxAsclin_setFrameMode (Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module's mode of operation. More...
IFX_INLINE void | IfxAsclin_setRtsCtsPolarity (Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity. More...
IFX_INLINE void | IfxAsclin_setRxInput (Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE void | IfxAsclin_setSlavePolarity (Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity. More...
IFX_INLINE void | IfxAsclin_setSuspendMode (Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...

Detailed Description

Function Documentation

◆ IfxAsclin_disableAllFlags()

IFX_INLINE void IfxAsclin_disableAllFlags ( Ifx_ASCLIN * asclin )

disables all flags

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 1714 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableAutoBaudrateDetection()

IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the auto baudrate detection.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1720 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableBreakDetectedFlag()

IFX_INLINE void IfxAsclin_enableBreakDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables break detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1726 of file IfxAsclin.h.

◆ IfxAsclin_enableCollisionDetection()

IFX_INLINE void IfxAsclin_enableCollisionDetection | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the collision detection.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1732 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableCollisionDetectionErrorFlag()

IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN collision detection error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1738 of file IfxAsclin.h.

◆ IfxAsclin_enableCts()

IFX_INLINE void IfxAsclin_enableCts | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables CTS.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1744 of file IfxAsclin.h.

Referenced by IfxAsclin_initCtsPin().

◆ IfxAsclin_enableFallingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables falling edge detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1750 of file IfxAsclin.h.

◆ IfxAsclin_enableFrameErrorFlag()

IFX_INLINE void IfxAsclin_enableFrameErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables frame error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1756 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableHardwareChecksum()

IFX_INLINE void IfxAsclin_enableHardwareChecksum | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the hardware checksum.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1762 of file IfxAsclin.h.

Referenced by IfxAsclin_Lin_initModule().

◆ IfxAsclin_enableHeaderTimeoutFlag()

IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables header timeout flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1768 of file IfxAsclin.h.

◆ IfxAsclin_enableLinAutoBaudDetectionErrorFlag()

IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN auto baudrate detection error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1774 of file IfxAsclin.h.

◆ IfxAsclin_enableLinChecksumErrorFlag()

IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN checksum error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1780 of file IfxAsclin.h.

◆ IfxAsclin_enableLinParityErrorFlag()

IFX_INLINE void IfxAsclin_enableLinParityErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables LIN parity error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1786 of file IfxAsclin.h.

◆ IfxAsclin_enableLoopBackMode()

IFX_INLINE void IfxAsclin_enableLoopBackMode | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the loop back mode.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1792 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableParity()

IFX_INLINE void IfxAsclin_enableParity | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the parity bit attachment to tha data bits.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1798 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableParityErrorFlag()

IFX_INLINE void IfxAsclin_enableParityErrorFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables parity error flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1804 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_enableAscErrorFlags().

◆ IfxAsclin_enableRaisingEdgeDetectedFlag()

IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables raising edge detected flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1810 of file IfxAsclin.h.

◆ IfxAsclin_enableResponseTimeoutFlag()

IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables response timeout flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1816 of file IfxAsclin.h.

◆ IfxAsclin_enableRxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO level flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1822 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableRxFifoInlet()

IFX_INLINE void IfxAsclin_enableRxFifoInlet | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1828 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableRxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO overflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1834 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_enableAscErrorFlags().

◆ IfxAsclin_enableRxFifoUnderflowFlag()

IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Rx FIFO underflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1840 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_enableRxHeaderEndFlag()

IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables receive header end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1846 of file IfxAsclin.h.

◆ IfxAsclin_enableRxResponseEndFlag()

IFX_INLINE void IfxAsclin_enableRxResponseEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables receive response end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1852 of file IfxAsclin.h.

◆ IfxAsclin_enableTransmissionCompletedFlag()

IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmission completed flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1858 of file IfxAsclin.h.

◆ IfxAsclin_enableTxFifoFillLevelFlag()

IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Tx FIFO level flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1864 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableTxFifoOutlet()

IFX_INLINE void IfxAsclin_enableTxFifoOutlet | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables the transmit FIFO outlet to allow transmission.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable/disable)
Returns
None

Definition at line 1870 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_enableTxFifoOverflowFlag()

IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables Tx FIFO overflow flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1876 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_enableTxHeaderEndFlag()

IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmit header end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1882 of file IfxAsclin.h.

◆ IfxAsclin_enableTxResponseEndFlag()

IFX_INLINE void IfxAsclin_enableTxResponseEndFlag | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | enable
 | ) |  |

Enables/disables transmit response end flag.

Parameters
asclin | pointer to ASCLIN registers
enable | choice (enable / disable)
Returns
None

Definition at line 1888 of file IfxAsclin.h.

◆ IfxAsclin_isModuleSuspended()

IFX_INLINE boolean IfxAsclin_isModuleSuspended ( Ifx_ASCLIN * asclin )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
asclin Pointer to ASCLIN module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 2149 of file IfxAsclin.h.

◆ IfxAsclin_setBitTiming()

IFX_EXTERN boolean IfxAsclin_setBitTiming | ( | Ifx_ASCLIN * | asclin,
 |  | float32 | baudrate,
 |  | IfxAsclin_OversamplingFactor | oversampling,
 |  | IfxAsclin_SamplePointPosition | samplepoint,
 |  | IfxAsclin_SamplesPerBit | medianFilter
 | ) |  |

Set the bit timing.

Note
this function required FA source and the PD frequency to be set to their final values
Parameters
asclin | pointer to ASCLIN registers
baudrate | Required baudrate
oversampling | The oversampling factor
samplepoint | The sample point position
medianFilter | Number of samples per bit (median filter)
Returns
TRUE if configuration was successfull

Definition at line 240 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setClockPolarity()

IFX_INLINE void IfxAsclin_setClockPolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ClockPolarity | cpol
 | ) |  |

Selects the clock polarity.

Parameters
asclin | pointer to ASCLIN registers
cpol | CPOL selection
Returns
None

Definition at line 2191 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_setCtsInput()

IFX_INLINE void IfxAsclin_setCtsInput | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_CtsInputSelect | ctsi
 | ) |  |

Selects the CTS input pin.

Parameters
asclin | pointer to ASCLIN registers
ctsi | CTS input pin selection
Returns
None

Definition at line 2197 of file IfxAsclin.h.

Referenced by IfxAsclin_initCtsPin().

◆ IfxAsclin_setFrameMode()

IFX_INLINE void IfxAsclin_setFrameMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_FrameMode | mode
 | ) |  |

Selects the module's mode of operation.

Parameters
asclin | pointer to ASCLIN registers
mode | mode selction
Returns
None

Definition at line 2233 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setRtsCtsPolarity()

IFX_INLINE void IfxAsclin_setRtsCtsPolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RtsCtsPolarity | rcpol
 | ) |  |

Selects the RTS/CTS polarity.

Parameters
asclin | pointer to ASCLIN registers
rcpol | RCPOL selection
Returns
None

Definition at line 2323 of file IfxAsclin.h.

◆ IfxAsclin_setRxInput()

IFX_INLINE void IfxAsclin_setRxInput | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_RxInputSelect | alti
 | ) |  |

Selects the alternate input for Rx signal.

Parameters
asclin | pointer to ASCLIN registers
alti | alternate input selection of Rx signal
Returns
None

Definition at line 2347 of file IfxAsclin.h.

Referenced by IfxAsclin_initRxPin(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSlavePolarity()

IFX_INLINE void IfxAsclin_setSlavePolarity | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SlavePolarity | spol
 | ) |  |

Selects the slave polarity.

Parameters
asclin | pointer to ASCLIN registers
spol | SPOL selection
Returns
None

Definition at line 2371 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_setSuspendMode()

IFX_INLINE void IfxAsclin_setSuspendMode | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
asclin | Pointer to ASCLIN module registers
mode | Module suspend mode
Returns
None

Definition at line 2392 of file IfxAsclin.h.


iLLD_TC26B: External Functions

Functions
External Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for External Functions:

Functions

IFX_EXTERN void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
IFX_EXTERN void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
IFX_EXTERN void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
IFX_EXTERN uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
IFX_EXTERN void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
IFX_EXTERN void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
IFX_EXTERN uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...

Detailed Description

Function Documentation

◆ IfxAsclin_disableModule()

IFX_EXTERN void IfxAsclin_disableModule ( Ifx_ASCLIN * asclin )

Disables the module.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 35 of file IfxAsclin.c.

◆ IfxAsclin_enableAscErrorFlags()

IFX_EXTERN void IfxAsclin_enableAscErrorFlags | ( | Ifx_ASCLIN * | asclin,
 |  | boolean | parEnable,
 |  | boolean | rfoEnable
 | ) |  |

Enables the ASC error interrupt Flags.

Parameters
asclin | pointer to ASCLIN registers
parEnable | parity error
rfoEnable | Rx FIFO overflow error
Returns
None

Definition at line 44 of file IfxAsclin.c.

◆ IfxAsclin_enableModule()

IFX_EXTERN void IfxAsclin_enableModule ( Ifx_ASCLIN * asclin )

Enables the module.

Parameters
asclin pointer to ASCLIN registers
Returns
None

Definition at line 51 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerEr()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerEr ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for ERR.

Parameters
asclin pointer to ASCLIN registers

Definition at line 149 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerRx()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerRx ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for Rx.

Parameters
asclin pointer to ASCLIN registers

Definition at line 155 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_getSrcPointerTx()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxAsclin_getSrcPointerTx ( Ifx_ASCLIN * asclin )

Returns the SRC pointer for Tx.

Parameters
asclin pointer to ASCLIN registers

Definition at line 161 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_read16()

IFX_EXTERN uint32 IfxAsclin_read16 | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 16 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 167 of file IfxAsclin.c.

Referenced by IfxAsclin_Spi_read().

◆ IfxAsclin_read32()

IFX_EXTERN uint32 IfxAsclin_read32 | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 32 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 181 of file IfxAsclin.c.

◆ IfxAsclin_read8()

IFX_EXTERN uint32 IfxAsclin_read8 | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 * | data,
 |  | uint32 | count
 | ) |  |

Reads data up to 8 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array where the read data shall be stored
count | number of items to read
Returns
number of items that could not be read

Definition at line 195 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_isrReceive(), IfxAsclin_Lin_readHeader(), IfxAsclin_Lin_readResponse(), and IfxAsclin_Spi_read().

◆ IfxAsclin_setBaudrateBitFields()

IFX_EXTERN void IfxAsclin_setBaudrateBitFields | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 | prescaler,
 |  | uint16 | numerator,
 |  | uint16 | denominator,
 |  | IfxAsclin_OversamplingFactor | oversampling
 | ) |  |

Sets the baudrate bit fields.

Parameters
asclin | pointer to ASCLIN registers
prescaler | division ratio of the predivider
numerator | numerator of the fractional divider
denominator | denominator of the fractional divider
oversampling | division ratio of the baudrate postdivider
Returns
None

Definition at line 228 of file IfxAsclin.c.

◆ IfxAsclin_setClockSource()

IFX_EXTERN void IfxAsclin_setClockSource | ( | Ifx_ASCLIN * | asclin,
 |  | IfxAsclin_ClockSource | clockSource
 | ) |  |

Sets the clock source.

Parameters
asclin | pointer to ASCLIN registers
clockSource | clock source selection
Returns
None

Definition at line 339 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_setBaudrateBitFields(), IfxAsclin_setBitTiming(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_write16()

IFX_EXTERN uint32 IfxAsclin_write16 | ( | Ifx_ASCLIN * | asclin,
 |  | uint16 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 16 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 357 of file IfxAsclin.c.

Referenced by IfxAsclin_Spi_write().

◆ IfxAsclin_write32()

IFX_EXTERN uint32 IfxAsclin_write32 | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 32 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 371 of file IfxAsclin.c.

◆ IfxAsclin_write8()

IFX_EXTERN uint32 IfxAsclin_write8 | ( | Ifx_ASCLIN * | asclin,
 |  | uint8 * | data,
 |  | uint32 | count
 | ) |  |

Writes data up to 8 bits.

Parameters
asclin | pointer to ASCLIN registers
data | Array of data to be send
count | number of items to be send
Returns
the number of items that could not be send

Definition at line 385 of file IfxAsclin.c.

Referenced by IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrTransmit(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), and IfxAsclin_Spi_write().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » ASCLIN » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxAsclin_initCtsPin (const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input. More...
IFX_INLINE void | IfxAsclin_initRtsPin (const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output. More...
IFX_INLINE void | IfxAsclin_initRxPin (const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxAsclin_initSclkPin (const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxAsclin_initSlsoPin (const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxAsclin_initTxPin (const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...

Detailed Description

Function Documentation

◆ IfxAsclin_initCtsPin()

IFX_INLINE void IfxAsclin_initCtsPin | ( | const IfxAsclin_Cts_In * | cts,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CTS input.

Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.

This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);

After the function call, the current clock can be enabled again.

Parameters
cts | the CTS Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2098 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_initRtsPin()

IFX_INLINE void IfxAsclin_initRtsPin | ( | const IfxAsclin_Rts_Out * | rts,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RTS output.

Parameters
rts | the RTS Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2110 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule().

◆ IfxAsclin_initRxPin()

IFX_INLINE void IfxAsclin_initRxPin | ( | const IfxAsclin_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.

This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);

After the function call, the current clock can be enabled again.

Parameters
rx | the RX Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2117 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().

◆ IfxAsclin_initSclkPin()

IFX_INLINE void IfxAsclin_initSclkPin | ( | const IfxAsclin_Sclk_Out * | sclk,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SCLK output.

Parameters
sclk | the SCLK Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2128 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_initSlsoPin()

IFX_INLINE void IfxAsclin_initSlsoPin | ( | const IfxAsclin_Slso_Out * | slso,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SLSO output.

Parameters
slso | the SLSO Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2135 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_initModule().

◆ IfxAsclin_initTxPin()

IFX_INLINE void IfxAsclin_initTxPin | ( | const IfxAsclin_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2142 of file IfxAsclin.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), and IfxAsclin_Spi_initModule().


iLLD_TC26B: ASCLIN Pin Mapping

Data Structures | Macros | Variables
ASCLIN Pin Mapping
iLLD » ASCLIN
Collaboration diagram for ASCLIN Pin Mapping:

Data Structures

struct | IfxAsclin_Cts_In
CTS pin mapping structure. More...
struct | IfxAsclin_Rx_In
RX pin mapping structure. More...
struct | IfxAsclin_Rts_Out
RTS pin mapping structure. More...
struct | IfxAsclin_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxAsclin_Slso_Out
SLSO pin mapping structure. More...
struct | IfxAsclin_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXASCLIN_PINMAP_NUM_MODULES 4
Table dimensions. More...
#define | IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7
#define | IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9
#define | IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5
#define | IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10

Variables

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
ASCLIN0_CTSA: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
ASCLIN1_CTSA: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
ASCLIN1_CTSB: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
ASCLIN2_CTSA: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
ASCLIN2_CTSB: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
ASCLIN3_CTSA: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
ASCLIN0_RTS: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
ASCLIN1_RTS: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
ASCLIN1_RTS: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
ASCLIN2_RTS: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
ASCLIN2_RTS: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
ASCLIN3_RTS: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
ASCLIN0_RXA: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
ASCLIN0_RXB: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
ASCLIN1_RXA: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
ASCLIN1_RXB: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
ASCLIN1_RXC: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
ASCLIN1_RXD: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
ASCLIN1_RXE: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
ASCLIN1_RXF: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
ASCLIN1_RXG: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
ASCLIN2_RXA: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
ASCLIN2_RXB: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
ASCLIN2_RXD: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
ASCLIN2_RXE: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
ASCLIN2_RXG: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
ASCLIN3_RXA: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
ASCLIN3_RXC: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
ASCLIN3_RXD: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
ASCLIN3_RXE: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
ASCLIN3_RXF: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
ASCLIN0_SCLK: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
ASCLIN0_SCLK: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
ASCLIN0_TX: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
ASCLIN0_TX: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table. More...
IFX_EXTERN const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table. More...
IFX_EXTERN const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table. More...
IFX_EXTERN const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table. More...
IFX_EXTERN const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table. More...
IFX_EXTERN const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Cts_In

struct IfxAsclin_Cts_In

CTS pin mapping structure.

Definition at line 39 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Cts_In:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxAsclin_Rx_In

struct IfxAsclin_Rx_In

RX pin mapping structure.

Definition at line 47 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Rx_In:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxAsclin_Rts_Out

struct IfxAsclin_Rts_Out

RTS pin mapping structure.

Definition at line 55 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Rts_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Sclk_Out

struct IfxAsclin_Sclk_Out

SCLK pin mapping structure.

Definition at line 63 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Sclk_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Slso_Out

struct IfxAsclin_Slso_Out

SLSO pin mapping structure.

Definition at line 71 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Slso_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxAsclin_Tx_Out

struct IfxAsclin_Tx_Out

TX pin mapping structure.

Definition at line 79 of file IfxAsclin_PinMap.h.

Collaboration diagram for IfxAsclin_Tx_Out:
[legend]
Data Fields
Ifx_ASCLIN * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS

#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2

Definition at line 180 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_NUM_MODULES

#define IFXASCLIN_PINMAP_NUM_MODULES 4

Table dimensions.

Definition at line 179 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2

Definition at line 181 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS

#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7

Definition at line 182 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9

Definition at line 183 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5

Definition at line 184 of file IfxAsclin_PinMap.h.

◆ IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS

#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10

Definition at line 185 of file IfxAsclin_PinMap.h.

Variable Documentation

◆ IfxAsclin0_CTSA_P14_9_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN

ASCLIN0_CTSA: ASCLIN0 input.

Definition at line 86 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RTS_P14_7_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT

ASCLIN0_RTS: ASCLIN0 output.

Definition at line 92 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXA_P14_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN

ASCLIN0_RXA: ASCLIN0 input.

Definition at line 98 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_RXB_P15_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN

ASCLIN0_RXB: ASCLIN0 input.

Definition at line 99 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_SCLK_P14_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT

ASCLIN0_SCLK: ASCLIN0 output.

Definition at line 117 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_SCLK_P15_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT

ASCLIN0_SCLK: ASCLIN0 output.

Definition at line 118 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P14_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT

ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin.

Definition at line 148 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P14_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT

ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin.

Definition at line 149 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P15_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT

ASCLIN0_TX: ASCLIN0 output.

Definition at line 150 of file IfxAsclin_PinMap.h.

◆ IfxAsclin0_TX_P15_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT

ASCLIN0_TX: ASCLIN0 output.

Definition at line 151 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_CTSA_P20_7_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN

ASCLIN1_CTSA: ASCLIN1 input.

Definition at line 87 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_CTSB_P32_4_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN

ASCLIN1_CTSB: ASCLIN1 input.

Definition at line 88 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RTS_P20_6_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT

ASCLIN1_RTS: ASCLIN1 output.

Definition at line 93 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RTS_P23_1_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT

ASCLIN1_RTS: ASCLIN1 output.

Definition at line 94 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXA_P15_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN

ASCLIN1_RXA: ASCLIN1 input.

Definition at line 100 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXB_P15_5_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN

ASCLIN1_RXB: ASCLIN1 input.

Definition at line 101 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXC_P20_9_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN

ASCLIN1_RXC: ASCLIN1 input.

Definition at line 102 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXD_P14_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN

ASCLIN1_RXD: ASCLIN1 input.

Definition at line 103 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXE_P11_10_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN

ASCLIN1_RXE: ASCLIN1 input.

Definition at line 104 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXF_P33_13_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN

ASCLIN1_RXF: ASCLIN1 input.

Definition at line 105 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_RXG_P02_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN

ASCLIN1_RXG: ASCLIN1 input.

Definition at line 106 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P15_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT

ASCLIN1_SCLK: ASCLIN1 output.

Definition at line 119 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P20_10_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT

ASCLIN1_SCLK: ASCLIN1 output.

Definition at line 120 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P33_11_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT

ASCLIN1_SCLK: ASCLIN1 output.

Definition at line 121 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SCLK_P33_12_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT

ASCLIN1_SCLK: ASCLIN1 output.

Definition at line 122 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P14_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT

ASCLIN1_SLSO: ASCLIN1 output.

Definition at line 137 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P20_8_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT

ASCLIN1_SLSO: ASCLIN1 output.

Definition at line 138 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_SLSO_P33_10_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT

ASCLIN1_SLSO: ASCLIN1 output.

Definition at line 139 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P02_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 152 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P11_12_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 153 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P14_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 154 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 155 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 156 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_4_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 157 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P15_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 158 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P20_10_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 159 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P33_12_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 160 of file IfxAsclin_PinMap.h.

◆ IfxAsclin1_TX_P33_13_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT

ASCLIN1_TX: ASCLIN1 output.

Definition at line 161 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_CTSA_P10_7_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN

ASCLIN2_CTSA: ASCLIN2 input.

Definition at line 89 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_CTSB_P33_5_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN

ASCLIN2_CTSB: ASCLIN2 input.

Definition at line 90 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RTS_P10_8_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT

ASCLIN2_RTS: ASCLIN2 output.

Definition at line 95 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RTS_P33_4_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT

ASCLIN2_RTS: ASCLIN2 output.

Definition at line 96 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXA_P14_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN

ASCLIN2_RXA: ASCLIN2 input.

Definition at line 107 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXB_P02_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN

ASCLIN2_RXB: ASCLIN2 input.

Definition at line 108 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXD_P10_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN

ASCLIN2_RXD: ASCLIN2 input.

Definition at line 109 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXE_P33_8_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN

ASCLIN2_RXE: ASCLIN2 input.

Definition at line 110 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_RXG_P02_0_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN

ASCLIN2_RXG: ASCLIN2 input.

Definition at line 111 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P02_4_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 123 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P10_6_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 124 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P14_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 125 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P33_7_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 126 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SCLK_P33_9_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT

ASCLIN2_SCLK: ASCLIN2 output.

Definition at line 127 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P02_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT

ASCLIN2_SLSO: ASCLIN2 output.

Definition at line 140 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P10_5_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT

ASCLIN2_SLSO: ASCLIN2 output.

Definition at line 141 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_SLSO_P33_6_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT

ASCLIN2_SLSO: ASCLIN2 output.

Definition at line 142 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P02_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 162 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P10_5_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 163 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P14_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 164 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P14_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 165 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P33_8_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 166 of file IfxAsclin_PinMap.h.

◆ IfxAsclin2_TX_P33_9_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT

ASCLIN2_TX: ASCLIN2 output.

Definition at line 167 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_CTSA_P00_12_IN

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN

ASCLIN3_CTSA: ASCLIN3 input.

Definition at line 91 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RTS_P00_9_OUT

IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT

ASCLIN3_RTS: ASCLIN3 output.

Definition at line 97 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXA_P15_7_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN

ASCLIN3_RXA: ASCLIN3 input.

Definition at line 112 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXC_P20_3_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN

ASCLIN3_RXC: ASCLIN3 input.

Definition at line 113 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXD_P32_2_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN

ASCLIN3_RXD: ASCLIN3 input.

Definition at line 114 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXE_P00_1_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN

ASCLIN3_RXE: ASCLIN3 input.

Definition at line 115 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_RXF_P21_6_IN

IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN

ASCLIN3_RXF: ASCLIN3 input.

Definition at line 116 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P00_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 128 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P00_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 129 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P15_6_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 130 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P15_8_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 131 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P20_0_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 132 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P21_5_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 133 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P21_7_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 134 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P32_3_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 135 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SCLK_P33_2_OUT

IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT

ASCLIN3_SCLK: ASCLIN3 output.

Definition at line 136 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P00_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 143 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P14_3_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 144 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P21_2_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 145 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P21_6_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 146 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_SLSO_P33_1_OUT

IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT

ASCLIN3_SLSO: ASCLIN3 output.

Definition at line 147 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P00_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 168 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P00_1_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 169 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P15_6_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 170 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P15_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 171 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P20_0_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 172 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P20_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 173 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P21_7_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 174 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P32_2_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 175 of file IfxAsclin_PinMap.h.

◆ IfxAsclin3_TX_P32_3_OUT

IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT

ASCLIN3_TX: ASCLIN3 output.

Definition at line 176 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Cts_In_pinTable

IFX_EXTERN const IfxAsclin_Cts_In* IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]

IfxAsclin_Cts_In table.

Definition at line 189 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Rts_Out_pinTable

IFX_EXTERN const IfxAsclin_Rts_Out* IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]

IfxAsclin_Rts_Out table.

Definition at line 192 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Rx_In_pinTable

IFX_EXTERN const IfxAsclin_Rx_In* IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]

IfxAsclin_Rx_In table.

Definition at line 195 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Sclk_Out_pinTable

IFX_EXTERN const IfxAsclin_Sclk_Out* IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]

IfxAsclin_Sclk_Out table.

Definition at line 198 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Slso_Out_pinTable

IFX_EXTERN const IfxAsclin_Slso_Out* IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]

IfxAsclin_Slso_Out table.

Definition at line 201 of file IfxAsclin_PinMap.h.

◆ IfxAsclin_Tx_Out_pinTable

IFX_EXTERN const IfxAsclin_Tx_Out* IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

IfxAsclin_Tx_Out table.

Definition at line 204 of file IfxAsclin_PinMap.h.


iLLD_TC26B: How to use the ASCLIN ASC Interface driver?

How to use the ASCLIN ASC Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN ASC Interface driver?:

The ASC interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.

Data transfers are buffered by the hardware based FIFOs, and in addition by software based FIFOs with a configurable size. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Asc/IfxAsclin_Asc.h>

Variables

Declare the ASC handle and the FIFOs as global variables in your C code:

// used globally
static IfxAsclin_Asc asc;
#define ASC_TX_BUFFER_SIZE 64
static uint8 ascTxBuffer[ASC_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
#define ASC_RX_BUFFER_SIZE 64
static uint8 ascRxBuffer[ASC_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];

As you can see above, the transfer buffers allocate not only memory for the data itself, but also for FIFO runtime variables. 8 bytes have to be added to ensure a proper circular buffer handling independent from the address to which the buffers have been located.

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_ASCLIN0_TX 1
#define IFX_INTPRIO_ASCLIN0_RX 2
#define IFX_INTPRIO_ASCLIN0_ER 3

Add the interrupt service routines to your C code. They have to call the ASC interrupt handlers by passing the asc handle:

IFX_INTERRUPT(asclin0TxISR, 0, IFX_INTPRIO_ASCLIN0_TX)
{
IfxAsclin_Asc_isrTransmit(&asc);
}
IFX_INTERRUPT(asclin0RxISR, 0, IFX_INTPRIO_ASCLIN0_RX)
{
IfxAsclin_Asc_isrReceive(&asc);
}
IFX_INTERRUPT(asclin0ErISR, 0, IFX_INTPRIO_ASCLIN0_ER)
{
IfxAsclin_Asc_isrError(&asc);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&asclin0TxISR, IFX_INTPRIO_ASCLIN0_TX);
IfxCpu_Irq_installInterruptHandler(&asclin0RxISR, IFX_INTPRIO_ASCLIN0_RX);
IfxCpu_Irq_installInterruptHandler(&asclin0ErISR, IFX_INTPRIO_ASCLIN0_ER);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxAsclin_Asc_Config ascConfig;
IfxAsclin_Asc_initModuleConfig(&ascConfig, &MODULE_ASCLIN0);
// set the desired baudrate
ascConfig.baudrate.prescaler = 1;
ascConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
// ISR priorities and interrupt target
ascConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN0_TX;
ascConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN0_RX;
ascConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN0_ER;
ascConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// FIFO configuration
ascConfig.txBuffer = &ascTxBuffer;
ascConfig.txBufferSize = ASC_TX_BUFFER_SIZE;
ascConfig.rxBuffer = &ascRxBuffer;
ascConfig.rxBufferSize = ASC_RX_BUFFER_SIZE;
// pin configuration
const IfxAsclin_Asc_Pins pins = {
NULL, IfxPort_InputMode_pullUp, // CTS pin not used
&IfxAsclin0_RXA_P14_1_IN, IfxPort_InputMode_pullUp, // Rx pin
NULL, IfxPort_OutputMode_pushPull, // RTS pin not used
&IfxAsclin0_TX_P14_0_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
ascConfig.pins = &pins;
// initialize module
//IfxAsclin_Asc asc; // defined globally
IfxAsclin_Asc_initModule(&asc, &ascConfig);

The ASC is ready for use now!

Data Transfers

Simple Transfers

The ASC driver provides simple to use transfer functions, which are blocking.

This means: you can send as much data as you want without taking care for the fill state of the FIFO. If the FIFO is full, the blocking function will wait until the next byte has been transfered to ASCLIN before putting the new byte into the FIFO:

// send 3 bytes
IfxAsclin_Asc_blockingWrite(&asc, 0x01);
IfxAsclin_Asc_blockingWrite(&asc, 0x02);
IfxAsclin_Asc_blockingWrite(&asc, 0x03);

A simple to use receive function is available as well. If no data is in the receive FIFO, it will wait until the next byte has been received:

// receive a byte
uint8 data = IfxAsclin_Asc_blockingRead(&asc);

Streamed Transfers

Streamed transfers are handled faster by the ASC driver and therefore they are recommended whenever a large bulk of data should be sent. Here an example:

uint8 txData[9] = { 0x49, 0x6e, 0x66, 0x69, 0x6e, 0x65, 0x6f, 0x6e, 0x0a };
{
Ifx_SizeT count = 9;
IfxAsclin_Asc_write(&asc, txData, &count, TIME_INFINITE);
}

Data can be received the following way:

uint8 rxData[5];
{
// wait until 5 bytes have been received
Ifx_SizeT count = 5;
IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
}

Or alternatively with:

uint8 rxData[5];
{
// how many bytes have been received?
Ifx_SizeT count = IfxAsclin_Asc_getReadCount(&asc);
// limit to our buffer size
count = count < 5 ? count : 5;
// transfer received data into buffer
IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
}


iLLD_TC26B: ASC

Modules
ASC
iLLD » ASCLIN
Collaboration diagram for ASC:

Modules

Data Structures
Interrupt Functions
Simple Communication
Stream based Communication (STDIO)
Module Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » ASC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Asc_BaudRate
Structure for baudrate. More...
struct | IfxAsclin_Asc_BitTimingControl
Structure for bit timings. More...
struct | IfxAsclin_Asc_FifoControl
Structure for FIFO control. More...
struct | IfxAsclin_Asc_FrameControl
Structure for frame control. More...
struct | IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Asc_Pins
Structure for ASC pin configuration. More...
struct | IfxAsclin_Asc
Module Handle. More...
struct | IfxAsclin_Asc_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Asc_BaudRate

struct IfxAsclin_Asc_BaudRate

Structure for baudrate.

Definition at line 245 of file IfxAsclin_Asc.h.

Data Fields
float32 | baudrate | value of the required baudrate
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
uint16 | prescaler | BITCON.PRESCALER, the division ratio of the predevider.

◆ IfxAsclin_Asc_BitTimingControl

struct IfxAsclin_Asc_BitTimingControl

Structure for bit timings.

Definition at line 254 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_SamplesPerBit | medianFilter | BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
IfxAsclin_SamplePointPosition | samplePointPosition | BITCON.SAMPLEPOINT, sample point position.

◆ IfxAsclin_Asc_FifoControl

struct IfxAsclin_Asc_FifoControl

Structure for FIFO control.

Definition at line 262 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.
IfxAsclin_RxFifoInterruptLevel | rxFifoInterruptLevel | RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
IfxAsclin_TxFifoInterruptLevel | txFifoInterruptLevel | TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.

◆ IfxAsclin_Asc_FrameControl

struct IfxAsclin_Asc_FrameControl

Structure for frame control.

Definition at line 273 of file IfxAsclin_Asc.h.

Data Fields
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module.
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
boolean | parityBit | FRAMECON.PEN, parity enable.
IfxAsclin_ParityType | parityType | FRAMECON.ODD, parity type (even or odd)
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Asc_InterruptConfig

struct IfxAsclin_Asc_InterruptConfig

Structure for interrupt configuration.

Definition at line 286 of file IfxAsclin_Asc.h.

Data Fields
uint16 | erPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Asc_Pins

struct IfxAsclin_Asc_Pins

Structure for ASC pin configuration.

Definition at line 296 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_Pins:
[legend]
Data Fields
IFX_CONST IfxAsclin_Cts_In * | cts | ASC clear to send (CTS) pin.
IfxPort_InputMode | ctsMode | Cts pin as input.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rts_Out * | rts | ASC (request to send) RTS pin.
IfxPort_OutputMode | rtsMode | Rts as output.
IFX_CONST IfxAsclin_Rx_In * | rx | ASC Rx pin.
IfxPort_InputMode | rxMode | Rx pin as input.
IFX_CONST IfxAsclin_Tx_Out * | tx | ASC Tx pin.
IfxPort_OutputMode | txMode | Tx as output.

◆ IfxAsclin_Asc

struct IfxAsclin_Asc

Module Handle.

Definition at line 323 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
Ifx_DataBufferMode | dataBufferMode | Rx buffer mode.
IfxAsclin_Asc_ErrorFlagsUnion | errorFlags | error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Ifx_Fifo * | rx | Receive FIFO buffer.
volatile boolean | rxSwFifoOverflow | Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
volatile uint32 | sendCount | Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount()
Ifx_Fifo * | tx | Transmit FIFO buffer.
volatile boolean | txInProgress | Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isrTransmit.
volatile Ifx_TickTime | txTimestamp | Time stamp of the latest send byte.

◆ IfxAsclin_Asc_Config

struct IfxAsclin_Asc_Config

Configuration structure of the module.

Definition at line 338 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_Config:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Asc_BaudRate | baudrate | structure for baudrate
IfxAsclin_Asc_BitTimingControl | bitTiming | structure for bit timings
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
Ifx_DataBufferMode | dataBufferMode | Rx buffer mode.
IfxAsclin_Asc_ErrorFlagsUnion | errorFlags | structure for error flags
IfxAsclin_Asc_FifoControl | fifo | structure for FIFO control
IfxAsclin_Asc_FrameControl | frame | structure for frame control
IfxAsclin_Asc_InterruptConfig | interrupt | structure for interrupt configuration
boolean | loopBack | IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
IFX_CONST IfxAsclin_Asc_Pins * | pins | structure for ASC pins
void * | rxBuffer | The buffer parameter must point on a free memory location where the buffer object will be Initialised. The Size of this area must be at least equals to "rxBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior. If set to NULL, the buffer will be allocated dynamically according to rxBufferSize
Ifx_SizeT | rxBufferSize | Size of the rx buffer.
void * | txBuffer | The buffer parameter must point on a free memory location where the buffer object will be Initialised. The Size of this area must be at least equals to "txBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior. If set to NULL_PTR, the buffer will be allocated dynamically according to txBufferSize
Ifx_SizeT | txBufferSize | Size of the tx buffer.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » ASC
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_isrError()

IFX_EXTERN void IfxAsclin_Asc_isrError ( IfxAsclin_Asc * asclin )

ISR error routine.

See also
IfxSdtIf_DPipe_OnError

Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happened. The user software could react on these flags, e.g. it could re-initialize the module.

Parameters
asclin module handler
Returns
None

Definition at line 416 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_isrReceive()

IFX_EXTERN void IfxAsclin_Asc_isrReceive ( IfxAsclin_Asc * asclin )

ISR receive routine.

See also
IfxSdtIf_DPipe_OnReceive
Parameters
asclin module handler
Returns
None

Definition at line 453 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_isrTransmit()

IFX_EXTERN void IfxAsclin_Asc_isrTransmit ( IfxAsclin_Asc * asclin )

ISR transmit routine.

See also
IfxSdtIf_DPipe_OnTransmit
Parameters
asclin module handler
Returns
None

Definition at line 495 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().


iLLD_TC26B: Simple Communication

Functions
Simple Communication
iLLD » ASCLIN » ASC
Collaboration diagram for Simple Communication:

Functions

IFX_EXTERN uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_blockingRead()

IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead ( IfxAsclin_Asc * asclin )

Reads data from the Rx FIFO.

Parameters
asclin module handle
Returns
number of received data words

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 36 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_blockingWrite()

IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite | ( | IfxAsclin_Asc * | asclin,
 |  | uint8 | data
 | ) |  |

Writes data into the Tx FIFO.

Parameters
asclin | module handle
data | the data byte which should be sent
Returns
Returns TRUE if data could be written

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 48 of file IfxAsclin_Asc.c.


iLLD_TC26B: Stream based Communication (STDIO)

Functions
Stream based Communication (STDIO)
iLLD » ASCLIN » ASC
Collaboration diagram for Stream based Communication (STDIO):

Functions

IFX_EXTERN boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
IFX_EXTERN void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
IFX_EXTERN sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
IFX_EXTERN sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_canReadCount()

IFX_EXTERN boolean IfxAsclin_Asc_canReadCount | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_CanReadCount
Parameters
asclin | module handle
count | Count of data which should be checked (in bytes)
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count.

Definition at line 56 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_canWriteCount()

IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_CanWriteCount
Parameters
asclin | module handle
count | Count of data which should be checked (in bytes)
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 62 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_clearRx()

IFX_EXTERN void IfxAsclin_Asc_clearRx ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ClearRx
Parameters
asclin module handle
Returns
None

Definition at line 68 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_clearTx()

IFX_EXTERN void IfxAsclin_Asc_clearTx ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ClearTx
Parameters
asclin module handle
Returns
None

Definition at line 75 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_flushTx()

IFX_EXTERN boolean IfxAsclin_Asc_flushTx | ( | IfxAsclin_Asc * | asclin,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_FlushTx
Parameters
asclin | module handle
timeout | in system timer ticks
Returns
Returns TRUE if the FIFO is empty

Definition at line 92 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getReadCount()

IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetReadCount
Parameters
asclin module handle
Returns
The number of bytes in the rx buffer

Definition at line 113 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getReadEvent()

IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent ( IfxAsclin_Asc * asclin )
See also
IIfxStdIf_DPipe_GetReadEvent
Parameters
asclin module handle
Returns
Read event object

Definition at line 119 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getSendCount()

IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetSendCount
Parameters
asclin module handle
Returns
number of bytes send

Definition at line 125 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getTxTimeStamp()

IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetTxTimeStamp
Parameters
asclin module handle
Returns
Time in ticks

Definition at line 131 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getWriteCount()

IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_GetWriteCount
Parameters
asclin module handle
Returns
The number of free bytes in the tx buffer

Definition at line 137 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_getWriteEvent()

IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent ( IfxAsclin_Asc * asclin )
See also
IIfxStdIf_DPipe_GetWriteEvent
Parameters
asclin module handle
Returns
Write event object

Definition at line 143 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_read()

IFX_EXTERN boolean IfxAsclin_Asc_read | ( | IfxAsclin_Asc * | asclin,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_Read
Parameters
asclin | module handle
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if all items could be read
Returns FALSE if not all the items could be read

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 547 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_blockingRead(), and IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_resetSendCount()

IFX_EXTERN void IfxAsclin_Asc_resetSendCount ( IfxAsclin_Asc * asclin )
See also
IfxStdIf_DPipe_ResetSendCount
Parameters
asclin module handle
Returns
None

Definition at line 557 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_stdIfDPipeInit().

◆ IfxAsclin_Asc_write()

IFX_EXTERN boolean IfxAsclin_Asc_write | ( | IfxAsclin_Asc * | asclin,
 |  | const void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |
See also
IfxStdIf_DPipe_Write
Parameters
asclin | module handle
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if all items could be written
Returns FALSE if not all the items could be written

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 592 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_blockingWrite(), and IfxAsclin_Asc_stdIfDPipeInit().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » ASCLIN » ASC
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Asc_disableModule()

IFX_EXTERN void IfxAsclin_Asc_disableModule ( IfxAsclin_Asc * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 82 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule | ( | IfxAsclin_Asc * | asclin,
 |  | const IfxAsclin_Asc_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 149 of file IfxAsclin_Asc.c.

◆ IfxAsclin_Asc_initModuleConfig()

IFX_EXTERN void IfxAsclin_Asc_initModuleConfig | ( | IfxAsclin_Asc_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 332 of file IfxAsclin_Asc.c.


iLLD_TC26B: How to use the ASCLIN LIN Interface driver?

How to use the ASCLIN LIN Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN LIN Interface driver?:

The LIN interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines. It supports all four elementary LIN transactions in polling mode. TxH - Transmission of Header TxR - Transmission of Response RxH - Reception of Header RxR - Reception of Response

The driver also provides a LIN Master to be configured in Interrupt mode. In interrupt mode, following Lin frame transactions are provided. 1.Transmit Header only. 2.Transmit both Header and Response. 3.Transmit Header and Receive Response.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Lin/IfxAsclin_Lin.h>

Variables

Declare the LIN handle as global variable in your C code:

// used globally
static IfxAsclin_Lin linMaster;
static IfxAsclin_Lin linSlave;

Interrupt Handler Installation

Define priorities for the Interrrupt handlers.

#define IFX_INTPRIO_ASCLIN1_RX 4 // Define the LIN1 receive interrupt priority.
#define IFX_INTPRIO_ASCLIN1_TX 8 // Define the LIN1 transmit interrupt priority.
#define IFX_INTPRIO_ASCLIN1_EX 12 // Define the LIN1 error interrupt priority.

Add the interrupt service routines to your C code. They have to call the LIN interrupt handlers by passing the lin handle:

IFX_INTERRUPT(ISR_Lin1_rx, 0, IFX_INTPRIO_ASCLIN1_RX);
IFX_INTERRUPT(ISR_Lin1_tx, 0, IFX_INTPRIO_ASCLIN1_TX);
IFX_INTERRUPT(ISR_Lin1_ex, 0, IFX_INTPRIO_ASCLIN1_EX);
void ISR_Lin1_rx(void)
{
IfxAsclin_Lin_isrReceive(&linMaster);
}
void ISR_Lin1_tx(void)
{
IfxAsclin_Lin_isrTransmit(&linMaster);
}
void ISR_Lin1_ex(void)
{
IfxAsclin_Lin_isrError(&linMaster);
}

Module Initialisation

The module can be initialised as either Master or Slave. Here an example:

Module Initialisation as Master

// create module config
IfxAsclin_Lin_Config linMasterConfig;
IfxAsclin_Lin_initModuleConfig(&linMasterConfig, &MODULE_ASCLIN1);
// set the lin mode of operation
linMasterConfig.linMode = IfxAsclin_LinMode_master;
// set the desired baudrate
linMasterConfig.btc.prescaler = 4;
linMasterConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
// pin configuration
const IfxAsclin_Lin_Pins pins = {
&IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
linMasterConfig.pins = &pins;
//Lin Master Interrupt Config. Only needed for interrupt mode.
linConfig.isInterruptMode = TRUE;
linConfig.interrupt.rxPriority = ISR_PRIORITY(INTERRUPT_LIN1_RX);
linConfig.interrupt.txPriority = ISR_PRIORITY(INTERRUPT_LIN1_TX);
linConfig.interrupt.exPriority = ISR_PRIORITY(INTERRUPT_LIN1_EX);
//Optionally, if any interrupt has to be enabled during initialisation it can be done as follows.
//Otherwise the driver will enable required interrupts during run time.
linConfig.interrupt.enabledInterrupt.exCollisionDetectionError = TRUE; //This is optional example.
linConfig.lin.csi = FALSE;//checksum injection not written into RxFIFO
// initialize module
IfxAsclin_Lin_initModule(&linMaster, &linMasterConfig);

Module Initialisation as Slave

// create module config
IfxAsclin_Lin_Config linSlaveConfig;
IfxAsclin_Lin_initModuleConfig(&linSlaveConfig, &MODULE_ASCLIN1);
// set the lin mode of operation
linSlaveConfig.linMode = IfxAsclin_LinMode_slave;
// set the desired baudrate
linSlaveConfig.btc.prescaler = 4;
linSlaveConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
// choose the auto baudrate detection configuration
linSlaveConfig.brd.abd = FALSE;
linSlaveConfig.brd.lowerLimit = 0x4;
linSlaveConfig.brd.upperLimit = 0xF0;
// pin configuration
const IfxAsclin_Lin_Pins pins = {
&IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
linSlaveConfig.pins = &pins;
// initialize module
//IfxAsclin_Lin linSlave; // defined globally
IfxAsclin_Lin_initModule(&linSlave, &linSlaveConfig);

The LIN is ready for use now!

Data Transfers

Master Transfers

The LIN driver provides all three master elementary transfers.

This means: you can send a header and based on the id byte, after transmission of header you can send or receive response and also can ignore the header based on the id:

// set the id bytes
uint8 txId = 0x80; // for sending respose after header
uint8 rxId = 0xC1; // for receiving respose after header
// prepare transmit bytes incase of sending response
uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
// prepare receive buffer incase of receiving response
uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
uint32 size = 8;
//Polling mode APIs
//send response case
IfxAsclin_Lin_sendHeader(&linMaster, &txId);
if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
{
IfxAsclin_Lin_sendResponse(&linMaster, txData, size);
}
//receive response case
IfxAsclin_Lin_sendHeader(&linMaster, &rxId);
if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
{
IfxAsclin_Lin_receiveResponse(&linMaster, rxData, size);
}
//Interrupt mode APIs
IfxAsclin_Lin_PduType pdu;
pdu.pid = 0x42;
pdu.checksumMode = IfxAsclin_Checksum_enhanced;
pdu.dataLength = 8;
pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndResponse; //Transmits both Header and Response
pdu.dataPtr = &txData[0];
IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
//Here Poll for linMaster.acknowledgmentFlags.txResponseEnd to detect end of transmission of frame.
pdu.pid = 0xC4;
pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse; //Transmits Header and expects slave to respond
IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
//Here Poll for linMaster.acknowledgmentFlags.rxResponseEnd
//linMaster.linFrameData.rxResponseData[8] will have received response data if slave replies.

Slave Transfers

Same as master the LIN driver provides all three slave elemnatry tranfers.

This means: you can receive a header and based on the id byte received, you can send or receive response and can also ignore the header based on the id:

uint8 id; // for storing received id byte
// prepare transmit bytes incase of sending response
uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
// prepare receive buffer incase of receiving response
uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
uint32 size = 8;
// receive header
IfxAsclin_Lin_receiveHeader(&linSlave, &id);
// if data is requsted by master
if(id == txId)
{
IfxAsclin_Lin_sendResponse(&linSlave, txData, size); // send response
}
// if header is follwed by response
else if(id == rxId)
{
IfxAsclin_Lin_receiveResponse(&linSlave, rxData, size); // receive response
}
// if header is not for this slave
else
{
IfxAsclin_Lin_ignoreHeader(&linSlave);
}


iLLD_TC26B: LIN

Modules
LIN
iLLD » ASCLIN
Collaboration diagram for LIN:

Modules

Data Structures
Elementary Transactions
Module Functions
Error Handling Functions
Interrupt Functions
Enumerations

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » LIN
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation. More...
struct | IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags. More...
struct | IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags. More...
struct | IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection. More...
struct | IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation. More...
struct | IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing. More...
struct | IfxAsclin_Lin_DataControl
Structure for Data Control. More...
struct | IfxAsclin_Lin_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Lin_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Lin_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags. More...
struct | IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration. More...
struct | IfxAsclin_Lin_LinControl
Structure for lin Control. More...
struct | IfxAsclin_Lin_Pins
Structure for LIN pin configuration. More...
struct | IfxAsclin_Lin
struct | IfxAsclin_Lin_Config
Configuration structure of the module. More...
struct | IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Lin_EnabledInterrupts

struct IfxAsclin_Lin_EnabledInterrupts

Structure to store interrupts which are enabled during initialisation.

Definition at line 327 of file IfxAsclin_Lin.h.

Data Fields
uint16 | exBreakDetected: 1 | Break Detected.
uint16 | exCollisionDetectionError: 1 | Collision Detection Error.
uint16 | exFramingError: 1 | Framing Error.
uint16 | exHeaderTimeout: 1 | Header Timeout.
uint16 | exLinAutobaudDetectionError: 1 | Lin Autobaud Detection Error.
uint16 | exLinChecksumError: 1 | Lin Checksum Error.
uint16 | exLinParityError: 1 | Lin Parity Error.
uint16 | exReceiveFIFOOverflow: 1 | Receive FIFO Overflow.
uint16 | exResponseTimeout: 1 | Response Timeout.
uint16 | exTransmissionCompleted: 1 | Transmission Completed.
uint16 | exTransmitFIFOOverflow: 1 | Transmit FIFO Overflow.
uint16 | rxReceivedHeader: 1 | Received Header.
uint16 | rxReceivedResponse: 1 | Received Response.
uint16 | txTransmittedHeader: 1 | Transmitted Header.
uint16 | txTransmittedResponse: 1 | Transmitted Response.

◆ IfxAsclin_Lin_FrameControlFlags

struct IfxAsclin_Lin_FrameControlFlags

Structure for Lin Frame Control flags.

Definition at line 348 of file IfxAsclin_Lin.h.

Data Fields
uint16 | rxHeaderErrorOccurred: 1 | Flag to indicate error occurred during reception of Header.
uint16 | rxHeaderInProgress: 1 | Flag to indicate Header reception is initiated and is in progress.
uint16 | rxResponseErrorOccurred: 1 | Flag to indicate error occurred during reception of Response.
uint16 | rxResponseInProgress: 1 | Flag to indicate Response reception is initiated and is in progress.
uint16 | txHeaderErrorOccurred: 1 | Flag to indicate error occurred during transmission of Header.
uint16 | txHeaderInProgress: 1 | Flag to indicate Header transmission is initiated and is in progress.
uint16 | txResponseErrorOccurred: 1 | Flag to indicate error occurred during transmission of Response.
uint16 | txResponseInProgress: 1 | Flag to indicate Response transmission is initiated and is in progress.
uint16 | txSendHeaderOnly: 1 | Flag indicating that only Header is transmitted.
uint16 | txSendResponse: 1 | Flag to indicate Response is transmitted.

◆ IfxAsclin_Lin_AcknowledgementFlags

struct IfxAsclin_Lin_AcknowledgementFlags

Structure for Acknowledgement Flags.

Definition at line 368 of file IfxAsclin_Lin.h.

Data Fields
uint8 | rxHeaderEnd: 1 | receive header end
uint8 | rxResponseEnd: 1 | receive response end
uint8 | txCompleted: 1 | transmission completed
uint8 | txHeaderEnd: 1 | transmit header end
uint8 | txResponseEnd: 1 | transmit response end

◆ IfxAsclin_Lin_BaudrateDetection

struct IfxAsclin_Lin_BaudrateDetection

Structure for Baudrate Detection.

Definition at line 379 of file IfxAsclin_Lin.h.

Data Fields
boolean | abd | LINCON.ABD, autobaud detection enable.
uint8 | lowerLimit | BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
uint8 | measured | BRD.MEASURED, measured time interval between the first and the fifth falling edge of the sync byte.
uint8 | upperLimit | BRD.UPPERLIMIT, auto baudrate detection upperlimit.

◆ IfxAsclin_Lin_BaudrateGeneration

struct IfxAsclin_Lin_BaudrateGeneration

Structure for Baudrate Generation.

Definition at line 390 of file IfxAsclin_Lin.h.

Data Fields
float32 | baudrate | value of the required baudrate
uint16 | denominator | BRG.DENOMINATOR, defines the denominator of fractional divider.
uint16 | numerator | BRG.NUMERATOR, defines the numerator of fractional divider.

◆ IfxAsclin_Lin_BitSamplingControl

struct IfxAsclin_Lin_BitSamplingControl

Structure for Bit Sampling.

Definition at line 399 of file IfxAsclin_Lin.h.

Data Fields
uint8 | filterDepth | IOCR.DEPTH, digital glitch filter depth.
IfxAsclin_SamplesPerBit | medianFilter | BITCON.SM, no. of samples per bit 1 or 3.
IfxAsclin_SamplePointPosition | samplePointPosition | BITCON.SAMPLEPOINT, sample point position.

◆ IfxAsclin_Lin_BitTimingControl

struct IfxAsclin_Lin_BitTimingControl

Structure for Bit Timing.

Definition at line 408 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, postdivider, used for oversampling.
uint16 | prescaler | BITCON.PRESCALER, predivider to generate the baud rate.

◆ IfxAsclin_Lin_DataControl

struct IfxAsclin_Lin_DataControl

Structure for Data Control.

Definition at line 416 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_Checksum | checksum | DATCON.CSM, checksum mode (classic or enhanced)
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_HeaderResponseSelect | headerOnly | DATCON.HO, Lin frame with header and response or header only.
uint16 | responseTimeout | DATCON.RESPONSE, timeout limit.
IfxAsclin_LinResponseTimeoutMode | responseTimeoutMode | DATCON.RM, response mode (response or frame timeout threshold)

◆ IfxAsclin_Lin_ErrorFlags

struct IfxAsclin_Lin_ErrorFlags

Structure for Error Flags.

Definition at line 427 of file IfxAsclin_Lin.h.

Data Fields
uint8 | breakDetected: 1 | break detected
uint8 | collisionDetectionError: 1 | collision detection error
uint8 | frameError: 1 | frame error
uint8 | headerTimeout: 1 | header timeout
uint8 | linAutobaudDetectionError: 1 | lin autobaud detection error
uint8 | linChecksumError: 1 | lin checksum error
uint8 | linParityError: 1 | lin parity error
uint8 | responseTimeout: 1 | response timeout
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Lin_FifoControl

struct IfxAsclin_Lin_FifoControl

Structure for FIFO Control.

Definition at line 443 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.

◆ IfxAsclin_Lin_FrameControl

struct IfxAsclin_Lin_FrameControl

Structure for Frame Control.

Definition at line 452 of file IfxAsclin_Lin.h.

Data Fields
boolean | collisionDetectionEnable | FRAMECON.CEN, collision detection enable.
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
IfxAsclin_LeadDelay | leadDelay | FRAMECON.LEAD, lead delay.
boolean | parityEnable | FRAMECON.PEN, parity enable.
IfxAsclin_ParityType | parityType | FRAMECON.ODD, parity type (even or odd)
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Lin_FrameDataControl

struct IfxAsclin_Lin_FrameDataControl

Structure for Frame Data and Control flags.

Definition at line 465 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_FrameDataControl:
[legend]
Data Fields
IfxAsclin_Lin_FrameControlFlags | flags | LIN frame control flags.
uint8 | headerID | header ID
uint8 | rxResponseData[8] | Array to store received response data.
uint8 | rxResponseLength | Length of received response.
uint8 | txResponseLength | Length of transmitted response.

◆ IfxAsclin_Lin_InterruptConfig

struct IfxAsclin_Lin_InterruptConfig

Structure for LIN Interrupt Configuration.

Definition at line 476 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_InterruptConfig:
[legend]
Data Fields
IfxAsclin_Lin_EnabledInterrupts | enabledInterrupt | Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
uint16 | exPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Lin_LinControl

struct IfxAsclin_Lin_LinControl

Structure for lin Control.

Definition at line 487 of file IfxAsclin_Lin.h.

Data Fields
uint8 | breakLength | LINBTIMER.BREAK, break pulse generation and detection length.
boolean | csEnable | LINCON.CSEN, hardware checksum generation and checking.
IfxAsclin_ChecksumInjection | csi | LINCON.CSI, checksum injection (not written or written) into RxFIFO.
uint8 | headerTimeout | LINHTIMER.HEADER, header timeout threshold value.

◆ IfxAsclin_Lin_Pins

struct IfxAsclin_Lin_Pins

Structure for LIN pin configuration.

Definition at line 497 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_Pins:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rx_In * | rx | LIN Rx pin.
IfxPort_InputMode | rxMode | rx pin as input
IFX_CONST IfxAsclin_Tx_Out * | tx | LIN Tx pin.
IfxPort_OutputMode | txMode | tx as output

◆ IfxAsclin_Lin

struct IfxAsclin_Lin

Definition at line 510 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin:
[legend]
Data Fields
IfxAsclin_Lin_AcknowledgementFlags | acknowledgmentFlags | structure for acknowledgement flags
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Lin_ErrorFlags | errorFlagsStatus | structure for error flags status
boolean | isInterruptMode | Value to indicate if APIs work in Polling mode or Interrupt mode.
IfxAsclin_Lin_FrameDataControl | linFrameData | Structure for Lin Frame Data and Control.
IfxAsclin_LinMode | linMode | LINCON.MS, lin mode of operation (master or slave)
boolean | receiveIdEnable | setting to receive Id in Rx Fifo after sending it

◆ IfxAsclin_Lin_Config

struct IfxAsclin_Lin_Config

Configuration structure of the module.

Definition at line 523 of file IfxAsclin_Lin.h.

Collaboration diagram for IfxAsclin_Lin_Config:
[legend]
Data Fields
IfxAsclin_RxInputSelect | alti | IOCR.ALTI, Rx input (alternate input) pin selection.
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Lin_BaudrateDetection | brd | structure for baudrate detection
IfxAsclin_Lin_BaudrateGeneration | brg | structure for baudrate generation
IfxAsclin_Lin_BitSamplingControl | bsc | structure for bit sampling
IfxAsclin_Lin_BitTimingControl | btc | structure for bit timings
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
IfxAsclin_Lin_DataControl | data | structure for data control
IfxAsclin_Lin_FifoControl | fifo | structure for FIFO control
IfxAsclin_Lin_FrameControl | frame | structure for frame control
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
IfxAsclin_Lin_InterruptConfig | interrupt | structure for lin interrupt configuration
boolean | isInterruptMode | flag to indicate Interrupt Mode (TRUE) or Polling Mode (FALSE)
IfxAsclin_Lin_LinControl | lin | structure for lin control
IfxAsclin_LinMode | linMode | LINCON.MS, lin mode of operation (master or slave)
IFX_CONST IfxAsclin_Lin_Pins * | pins | structure for LIN pins
boolean | receiveIdEnable | setting to receive Id in Rx Fifo after sending it

◆ IfxAsclin_Lin_PduType

struct IfxAsclin_Lin_PduType

Structure to hold Lin Pdu data.

Definition at line 546 of file IfxAsclin_Lin.h.

Data Fields
IfxAsclin_Checksum | checksumMode | LIN Checksum Mode.
uint8 | dataLength | Length of LIN Response.
uint8 * | dataPtr | Pointer for LIN Response data.
IfxAsclin_Lin_Direction | direction | Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response)
uint8 | pid | PID of LIN Header.


iLLD_TC26B: Elementary Transactions

Functions
Elementary Transactions
iLLD » ASCLIN » LIN
Collaboration diagram for Elementary Transactions:

Functions

IFX_INLINE void | IfxAsclin_Lin_prepareHeaderReception (IfxAsclin_Lin *asclin)
Prepares the module to receive the header. More...
IFX_INLINE void | IfxAsclin_Lin_prepareResponseReception (IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response. More...
IFX_INLINE void | IfxAsclin_Lin_readHeader (IfxAsclin_Lin *asclin, uint8 *id)
Reads the header. More...
IFX_INLINE void | IfxAsclin_Lin_readResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response. More...
IFX_EXTERN void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
IFX_EXTERN void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
IFX_EXTERN void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_ignoreHeader()

IFX_EXTERN void IfxAsclin_Lin_ignoreHeader ( IfxAsclin_Lin * asclin )

Ignores the latest header.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 238 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_prepareHeaderReception()

IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception ( IfxAsclin_Lin * asclin )

Prepares the module to receive the header.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 803 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_prepareResponseReception()

IFX_INLINE void IfxAsclin_Lin_prepareResponseReception | ( | IfxAsclin_Lin * | asclin,
 |  | uint32 | length
 | ) |  |

Prepares the module to Receive the response.

Parameters
asclin | module handle
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 813 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_readHeader()

IFX_INLINE void IfxAsclin_Lin_readHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Reads the header.

Parameters
asclin | module handle
id | the id byte which should be received
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 824 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_isrReceive(), and IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_readResponse()

IFX_INLINE void IfxAsclin_Lin_readResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

Reads the response.

Parameters
asclin | module handle
data | Pointer to the start of data which should be received
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 831 of file IfxAsclin_Lin.h.

Referenced by IfxAsclin_Lin_isrReceive(), and IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_receiveHeader()

IFX_EXTERN void IfxAsclin_Lin_receiveHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Receives the header.

Parameters
asclin | module handle
id | the id byte which should be received
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 497 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_receiveResponse()

IFX_EXTERN void IfxAsclin_Lin_receiveResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

Receives the response.

Parameters
asclin | module handle
data | Pointer to the start of data which should be received
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 514 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_sendHeader()

IFX_EXTERN void IfxAsclin_Lin_sendHeader | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | id
 | ) |  |

Sends the header.

Parameters
asclin | module handle
id | the id byte which should be sent
Returns
None

A coding example of send header in polling mode can be found in How to use the ASCLIN LIN Interface driver?. For interrupt mode, this fuction is internally used by IfxAsclin_Lin_sendFrame API and the the polling part is bypassed.

Definition at line 531 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendFrame().

◆ IfxAsclin_Lin_sendResponse()

IFX_EXTERN void IfxAsclin_Lin_sendResponse | ( | IfxAsclin_Lin * | asclin,
 |  | uint8 * | data,
 |  | uint32 | length
 | ) |  |

sends the response

Parameters
asclin | module handle
data | Pointer to the start of data which should be sent
length | count of data (in bytes).
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 570 of file IfxAsclin_Lin.c.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_disableModule()

IFX_EXTERN void IfxAsclin_Lin_disableModule ( IfxAsclin_Lin * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 228 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule | ( | IfxAsclin_Lin * | asclin,
 |  | const IfxAsclin_Lin_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 247 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_initModuleConfig()

IFX_EXTERN void IfxAsclin_Lin_initModuleConfig | ( | IfxAsclin_Lin_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the config structure with default values.

Parameters
config | predefined configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN LIN Interface driver?

Definition at line 420 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_sendFrame()

IFX_EXTERN void IfxAsclin_Lin_sendFrame | ( | IfxAsclin_Lin * | asclin,
 |  | IfxAsclin_Lin_PduType * | pduptr
 | ) |  |

This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response.

Parameters
asclin | asclin module handle
pduptr | lin pdu configuration
Returns
None

A coding example of sendFrame in interrupt mode can be found in How to use the ASCLIN LIN Interface driver?.

Definition at line 855 of file IfxAsclin_Lin.c.


iLLD_TC26B: Error Handling Functions

Functions
Error Handling Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Error Handling Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
IFX_EXTERN void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_checkForReceivedHeaderFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for received header

Parameters
asclin module handle
Returns
None

Definition at line 35 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForReceivedHeader().

◆ IfxAsclin_Lin_checkForReceivedResponseFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for received response

Parameters
asclin module handle
Returns
None

Definition at line 79 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForReceivedResponse().

◆ IfxAsclin_Lin_checkForTransmittedHeaderFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for transmitted header

Parameters
asclin module handle
Returns
None

Definition at line 129 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForTransmittedHeader().

◆ IfxAsclin_Lin_checkForTransmittedResponseFlags()

IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags ( IfxAsclin_Lin * asclin )

checks for acknowledgement and error flags for transmitted response

Parameters
asclin module handle
Returns
None

Definition at line 167 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_waitForTransmittedResponse().

◆ IfxAsclin_Lin_clearFlagsStatus()

IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus ( IfxAsclin_Lin * asclin )

clears the flags status structures

Parameters
asclin module handle
Returns
None

Definition at line 205 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_waitForReceivedHeader(), IfxAsclin_Lin_waitForReceivedResponse(), IfxAsclin_Lin_waitForTransmittedHeader(), and IfxAsclin_Lin_waitForTransmittedResponse().

◆ IfxAsclin_Lin_waitForReceivedHeader()

IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader ( IfxAsclin_Lin * asclin )

waits until receive header end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 590 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_receiveHeader().

◆ IfxAsclin_Lin_waitForReceivedResponse()

IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse ( IfxAsclin_Lin * asclin )

waits until receive response end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 615 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_receiveResponse().

◆ IfxAsclin_Lin_waitForTransmittedHeader()

IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader ( IfxAsclin_Lin * asclin )

waits until transmit header end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 641 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendHeader().

◆ IfxAsclin_Lin_waitForTransmittedResponse()

IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse ( IfxAsclin_Lin * asclin )

waits until transmit response end acknowledgemnet or an error has been detected

Parameters
asclin module handle
Returns
Result, TRUE: if error, FALSE: is no error

Definition at line 665 of file IfxAsclin_Lin.c.

Referenced by IfxAsclin_Lin_sendResponse().


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » LIN
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Lin_isrError()

IFX_EXTERN void IfxAsclin_Lin_isrError ( IfxAsclin_Lin * asclin )

ISR error routine.

Parameters
asclin module handle
Returns
None

Definition at line 689 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_isrReceive()

IFX_EXTERN void IfxAsclin_Lin_isrReceive ( IfxAsclin_Lin * asclin )

ISR receive routine.

Parameters
asclin module handle
Returns
None

Definition at line 811 of file IfxAsclin_Lin.c.

◆ IfxAsclin_Lin_isrTransmit()

IFX_EXTERN void IfxAsclin_Lin_isrTransmit ( IfxAsclin_Lin * asclin )

ISR transmit routine.

Parameters
asclin module handle
Returns
None

Definition at line 834 of file IfxAsclin_Lin.c.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ASCLIN » LIN
Collaboration diagram for Enumerations:

Enumerations

enum IfxAsclin_Lin_Direction {
IfxAsclin_Lin_Direction_TransmitHeader = 0,
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1,
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2
}
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response). More...

Detailed Description

Enumeration Type Documentation

◆ IfxAsclin_Lin_Direction

enum IfxAsclin_Lin_Direction

Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response).

Enumerator
IfxAsclin_Lin_Direction_TransmitHeader | Transmit Header.
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse | Transmit both Header and Response.
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse | Transmit Header and Receive Response.

Definition at line 310 of file IfxAsclin_Lin.h.


iLLD_TC26B: How to use the ASCLIN SPI Interface driver?

How to use the ASCLIN SPI Interface driver?
iLLD » ASCLIN
Collaboration diagram for How to use the ASCLIN SPI Interface driver?:

The SPI interface driver provides a default ASCLIN configuration for synchronous serial communication in 8 and 16 bit mode, and a set of data transfer routines.

Data transfers are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.

The SPI interface driver works only as Master

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Asclin/Spi/IfxAsclin_Spi.h>

Variables

Declare the Spi handle as global variable in your C code:

// used globally
static IfxAsclin_Spi spi;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_ASCLIN1_TX 1
#define IFX_INTPRIO_ASCLIN1_RX 2
#define IFX_INTPRIO_ASCLIN1_ER 3

Add the interrupt service routines to your C code. They have to call the SPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(asclin1TxISR, 0, IFX_INTPRIO_ASCLIN1_TX)
{
IfxAsclin_Spi_isrTransmit(&spi);
}
IFX_INTERRUPT(asclin1RxISR, 0, IFX_INTPRIO_ASCLIN1_RX)
{
IfxAsclin_Spi_isrReceive(&spi);
}
IFX_INTERRUPT(asclin1ErISR, 0, IFX_INTPRIO_ASCLIN1_ER)
{
IfxAsclin_Spi_isrError(&spi);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&asclin1TxISR, IFX_INTPRIO_ASCLIN1_TX);
IfxCpu_Irq_installInterruptHandler(&asclin1RxISR, IFX_INTPRIO_ASCLIN1_RX);
IfxCpu_Irq_installInterruptHandler(&asclin1ErISR, IFX_INTPRIO_ASCLIN1_ER);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxAsclin_Spi_Config spiConfig;
IfxAsclin_Spi_initModuleConfig(&spiConfig, &MODULE_ASCLIN1);
// set the desired baudrate
spiConfig.baudrate.prescaler = 1;
spiConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
// ISR priorities and interrupt target
spiConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN1_TX; // see also \ref IfxLld_Asclin
spiConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN1_RX; // see also \ref IfxLld_Asclin
spiConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN1_ER; // see also \ref IfxLld_Asclin
spiConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxAsclin_Spi_Pins pins = {
&IfxAsclin1_SCLK_P15_0_OUT, IfxPort_OutputMode_pushPull, // Clock out pin
&IfxAsclin1_RXA_P15_1_IN, IfxPort_InputMode_pullUp, // Rx pin
&IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
&IfxAsclin1_SLSO_P20_8_OUT, IfxPort_OutputMode_pushPull, // Slave select pin
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiConfig.pins = &pins;
// initialize module
//IfxAsclin_Spi spi; // defined globally
IfxAsclin_Spi_initModule(&spi, &spiConfig);

The SPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// load the data buffers
int i;
for (i = 0; i < SPI_BUFFER_SIZE; i++)
{
spiTxBuffer[i] = i + 1;
spiRxBuffer[i] = 0;
}

Sending and Receiving a data stream:

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// send/receive new stream
IfxAsclin_Spi_exchange(&spi, spiTxBuffer, spiRxBuffer, 8);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// send new stream
IfxAsclin_Spi_exchange(&spi, spiTxBuffer, NULL_PTR, 8);

Receive only, send all 1's

// wait until transfer of previous data stream is finished
while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
// receive new stream
IfxAsclin_Spi_exchange(&spi, NULL_PTR, spiRxBuffer, 8);


iLLD_TC26B: SPI

Modules
SPI
iLLD » ASCLIN
Collaboration diagram for SPI:

Modules

Data Structures
Module Functions
Interrupt Functions
Communication Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ASCLIN » SPI
Collaboration diagram for Data Structures:

Data Structures

struct | IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation. More...
struct | IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Spi_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Spi_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Spi_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Spi_InputOutputControl
Structure for input output control. More...
struct | IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Spi_Job
Structure for data transfer jobs. More...
struct | IfxAsclin_Spi_Pins
Structure for SPI pin configuration. More...
struct | IfxAsclin_Spi
Module handle. More...
struct | IfxAsclin_Spi_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxAsclin_Spi_Baudrate

struct IfxAsclin_Spi_Baudrate

Structure for Baudrate Generation.

Definition at line 227 of file IfxAsclin_Spi.h.

Data Fields
float32 | baudrate | value of the required baudrate
IfxAsclin_OversamplingFactor | oversampling | BITCON.OVERSAMPLING, postdivider, used for oversampling.
uint16 | prescaler | BITCON.PRESCALER, predivider to generate the baud rate.

◆ IfxAsclin_Spi_BitSamplingControl

struct IfxAsclin_Spi_BitSamplingControl

Structure for Bit Sampling.

Definition at line 236 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_SamplesPerBit medianFilter BITCON.SM, no. of samples per bit 1 or 3.

◆ IfxAsclin_Spi_ErrorFlags

struct IfxAsclin_Spi_ErrorFlags

Structure for Error Flags.

Definition at line 243 of file IfxAsclin_Spi.h.

Data Fields
uint8 | frameError: 1 | frame error
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | rxFifoUnderflow: 1 | receive FIFO underflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Spi_FifoControl

struct IfxAsclin_Spi_FifoControl

Structure for FIFO Control.

Definition at line 253 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_ReceiveBufferMode | buffMode | RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
IfxAsclin_TxFifoInletWidth | inWidth | TXFIFOCON.INW, transmit FIFO inlet width.
IfxAsclin_RxFifoOutletWidth | outWidth | RXFIFOCON.OTW, receive FIFO oulet width.
IfxAsclin_RxFifoInterruptLevel | rxFifoInterruptLevel | RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
IfxAsclin_TxFifoInterruptLevel | txFifoInterruptLevel | TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.

◆ IfxAsclin_Spi_FrameControl

struct IfxAsclin_Spi_FrameControl

Structure for Frame Control.

Definition at line 264 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_IdleDelay | idleDelay | FRAMECON.IDLE, idle delay.
IfxAsclin_LeadDelay | leadDelay | FRAMECON.LEAD, lead delay.
IfxAsclin_ShiftDirection | shiftDir | FRAMECON.MSB, shift direction.
IfxAsclin_StopBit | stopBit | FRAMECON.STOP, number of stop bits.

◆ IfxAsclin_Spi_InputOutputControl

struct IfxAsclin_Spi_InputOutputControl

Structure for input output control.

Definition at line 274 of file IfxAsclin_Spi.h.

Data Fields
IfxAsclin_RxInputSelect | alti | IOCR.ALTI, Rx input (alternate input) pin selection.
IfxAsclin_ClockPolarity | cpol | IOCR.CPOL clock polarity selection.
boolean | loopBack | IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
IfxAsclin_SlavePolarity | spol | IOCR.SPOL slave polarity selection.

◆ IfxAsclin_Spi_InterruptConfig

struct IfxAsclin_Spi_InterruptConfig

Structure for interrupt configuration.

Definition at line 284 of file IfxAsclin_Spi.h.

Data Fields
uint16 | erPriority | error interrupt priority
uint16 | rxPriority | receive interrupt priority
uint16 | txPriority | transmit interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxAsclin_Spi_Job

struct IfxAsclin_Spi_Job

Structure for data transfer jobs.

Definition at line 294 of file IfxAsclin_Spi.h.

Data Fields
void * | data | pointer to user data
uint32 | pending | job remaining (count of the data)

◆ IfxAsclin_Spi_Pins

struct IfxAsclin_Spi_Pins

Structure for SPI pin configuration.

Definition at line 302 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi_Pins:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxAsclin_Rx_In * | rx | SPI Rx pin.
IfxPort_InputMode | rxMode | rx pin as input
IFX_CONST IfxAsclin_Sclk_Out * | sclk | SPI clock select pin.
IfxPort_OutputMode | sclkMode | sclk as output
IFX_CONST IfxAsclin_Slso_Out * | slso | SPI slave select pin.
IfxPort_OutputMode | slsoMode | slso as output
IFX_CONST IfxAsclin_Tx_Out * | tx | SPI Tx pin.
IfxPort_OutputMode | txMode | tx as output

◆ IfxAsclin_Spi

struct IfxAsclin_Spi

Module handle.

Definition at line 321 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
uint8 | dataWidth | width of the data in bytes
IfxAsclin_Spi_ErrorFlags | errorFlags | structure for error flags status
IfxAsclin_Spi_Job | rxJob | structure for Rx job
uint32 | sending | sending in progress status
boolean | transferInProgress | status of the transfer In progress
IfxAsclin_Spi_Job | txJob | structure for Tx job

◆ IfxAsclin_Spi_Config

struct IfxAsclin_Spi_Config

Configuration structure of the module.

Definition at line 334 of file IfxAsclin_Spi.h.

Collaboration diagram for IfxAsclin_Spi_Config:
[legend]
Data Fields
Ifx_ASCLIN * | asclin | pointer to ASCLIN registers
IfxAsclin_Spi_Baudrate | baudrate | structure for baudrate
IfxAsclin_Spi_BitSamplingControl | bitSampling | structure for bit sampling
IfxAsclin_ClockSource | clockSource | CSR.CLKSEL, clock source selection.
IfxAsclin_DataLength | dataLength | DATCON.DATALENGTH, data length, number of bits per transfer.
IfxAsclin_Spi_FifoControl | fifo | structure for FIFO control
IfxAsclin_Spi_FrameControl | frame | structure for frame control
IfxAsclin_FrameMode | frameMode | FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
IfxAsclin_Spi_InputOutputControl | inputOutput | structure for input output control
IfxAsclin_Spi_InterruptConfig | interrupt | structure for interrupt configuration
IFX_CONST IfxAsclin_Spi_Pins * | pins | structure for SPI pins


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_disableModule()

IFX_EXTERN void IfxAsclin_Spi_disableModule ( IfxAsclin_Spi * asclin )

Disables the module.

Parameters
asclin module handle
Returns
None

Definition at line 51 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_initModule()

IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule | ( | IfxAsclin_Spi * | asclin,
 |  | const IfxAsclin_Spi_Config * | config
 | ) |  |

Initialises the module.

Parameters
asclin | module handle
config | predefined configuration structure of the module
Returns
Status

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 93 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_initModuleConfig()

IFX_EXTERN void IfxAsclin_Spi_initModuleConfig | ( | IfxAsclin_Spi_Config * | config,
 |  | Ifx_ASCLIN * | asclin
 | ) |  |

Fills the configuration structure with default values.

Parameters
config | predefined configuration structure of the module
asclin | pointer to ASCLIN registers
Returns
None

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 238 of file IfxAsclin_Spi.c.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_isrError()

IFX_EXTERN void IfxAsclin_Spi_isrError ( IfxAsclin_Spi * asclin )

ISR error routine.

Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happens. The user software could react on these flags, e.g. re-initialising the module.

Parameters
asclin module handle
Returns
None

Definition at line 304 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_isrReceive()

IFX_EXTERN void IfxAsclin_Spi_isrReceive ( IfxAsclin_Spi * asclin )

ISR receive routine.

Parameters
asclin module handle
Returns
None

Definition at line 335 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_isrTransmit()

IFX_EXTERN void IfxAsclin_Spi_isrTransmit ( IfxAsclin_Spi * asclin )

ISR transmit routine.

Parameters
asclin module handle
Returns
None

Definition at line 343 of file IfxAsclin_Spi.c.


iLLD_TC26B: Communication Functions

Functions
Communication Functions
iLLD » ASCLIN » SPI
Collaboration diagram for Communication Functions:

Functions

IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IFX_EXTERN void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
IFX_EXTERN void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...

Detailed Description

Function Documentation

◆ IfxAsclin_Spi_exchange()

IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange | ( | IfxAsclin_Spi * | asclin,
 |  | void * | src,
 |  | void * | dest,
 |  | uint32 | count
 | ) |  |

starts the data exchange

Parameters
asclin | module handle
src | pointer to transmit data buffer
dest | pointer to receive data buffer
count | count of the data
Returns
status

A coding example can be found in How to use the ASCLIN SPI Interface driver?

Definition at line 61 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_read()

IFX_EXTERN void IfxAsclin_Spi_read ( IfxAsclin_Spi * asclin )

Reads data from the Rx FIFO based on the outlet width.

Parameters
asclin module handle
Returns
None

Definition at line 358 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_isrReceive().

◆ IfxAsclin_Spi_write()

IFX_EXTERN void IfxAsclin_Spi_write ( IfxAsclin_Spi * asclin )

Writes data into the Tx FIFO based on the inlet width.

Parameters
asclin module handle
Returns
None

Definition at line 409 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_exchange(), and IfxAsclin_Spi_isrTransmit().


iLLD_TC26B: IfxAsclin_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxAsclin_cfg.h File Reference
iLLD » ASCLIN

ASCLIN on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxAsclin_reg.h"
Include dependency graph for IfxAsclin_cfg.h:

Go to the source code of this file.

Macros

#define IFXASCLIN_NUM_MODULES (4)

Enumerations

enum IfxAsclin_Index {
IfxAsclin_Index_none = -1,
IfxAsclin_Index_0 = 0,
IfxAsclin_Index_1,
IfxAsclin_Index_2,
IfxAsclin_Index_3
}
List of the available Asclin resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap [IFXASCLIN_NUM_MODULES]

Detailed Description

ASCLIN on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_cfg.h.

Macro Definition Documentation

◆ IFXASCLIN_NUM_MODULES

#define IFXASCLIN_NUM_MODULES (4)

Definition at line 48 of file IfxAsclin_cfg.h.

Referenced by IfxAsclin_getAddress(), and IfxAsclin_getIndex().

Variable Documentation

◆ IfxAsclin_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]

Definition at line 73 of file IfxAsclin_cfg.h.


iLLD_TC26B: IfxAsclin_PinMap.c File Reference

  • _PinMap
Variables
IfxAsclin_PinMap.c File Reference
iLLD » ASCLIN

ASCLIN I/O map. More...

#include "IfxAsclin_PinMap.h"
Include dependency graph for IfxAsclin_PinMap.c:

Go to the source code of this file.

Variables

IfxAsclin_Cts_In | IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b}
IfxAsclin_Cts_In | IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a}
IfxAsclin_Cts_In | IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxAsclin_Cts_In | IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a}
IfxAsclin_Rts_Out | IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Rts_Out | IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3}
IfxAsclin_Rx_In | IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f}
IfxAsclin_Rx_In | IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g}
IfxAsclin_Rx_In | IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b}
IfxAsclin_Rx_In | IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g}
IfxAsclin_Rx_In | IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a}
IfxAsclin_Rx_In | IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c}
IfxAsclin_Rx_In | IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d}
IfxAsclin_Rx_In | IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e}
IfxAsclin_Rx_In | IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f}
IfxAsclin_Sclk_Out | IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4}
IfxAsclin_Sclk_Out | IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6}
IfxAsclin_Slso_Out | IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Slso_Out | IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2}
IfxAsclin_Tx_Out | IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2}
const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

ASCLIN I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_PinMap.c.

Variable Documentation

◆ IfxAsclin0_CTSA_P14_9_IN

IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a}

Definition at line 28 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RTS_P14_7_OUT

IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2}

Definition at line 34 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXA_P14_1_IN

IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a}

Definition at line 40 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_RXB_P15_3_IN

IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b}

Definition at line 41 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_SCLK_P14_0_OUT

IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6}

Definition at line 59 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_SCLK_P15_2_OUT

IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6}

Definition at line 60 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P14_0_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2}

Definition at line 90 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P14_1_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2}

Definition at line 91 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P15_2_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2}

Definition at line 92 of file IfxAsclin_PinMap.c.

◆ IfxAsclin0_TX_P15_3_OUT

IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2}

Definition at line 93 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_CTSA_P20_7_IN

IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a}

Definition at line 29 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_CTSB_P32_4_IN

IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b}

Definition at line 30 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RTS_P20_6_OUT

IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2}

Definition at line 35 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RTS_P23_1_OUT

IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2}

Definition at line 36 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXA_P15_1_IN

IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a}

Definition at line 42 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXB_P15_5_IN

IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b}

Definition at line 43 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXC_P20_9_IN

IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c}

Definition at line 44 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXD_P14_8_IN

IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d}

Definition at line 45 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXE_P11_10_IN

IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e}

Definition at line 46 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXF_P33_13_IN

IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f}

Definition at line 47 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_RXG_P02_3_IN

IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g}

Definition at line 48 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P15_0_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6}

Definition at line 61 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P20_10_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6}

Definition at line 62 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P33_11_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2}

Definition at line 63 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SCLK_P33_12_OUT

IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4}

Definition at line 64 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P14_3_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4}

Definition at line 79 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P20_8_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2}

Definition at line 80 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_SLSO_P33_10_OUT

IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4}

Definition at line 81 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P02_2_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2}

Definition at line 94 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P11_12_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2}

Definition at line 95 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P14_10_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4}

Definition at line 96 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_0_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2}

Definition at line 97 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_1_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2}

Definition at line 98 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_4_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2}

Definition at line 99 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P15_5_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2}

Definition at line 100 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P20_10_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2}

Definition at line 101 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P33_12_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2}

Definition at line 102 of file IfxAsclin_PinMap.c.

◆ IfxAsclin1_TX_P33_13_OUT

IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2}

Definition at line 103 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_CTSA_P10_7_IN

IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a}

Definition at line 31 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_CTSB_P33_5_IN

IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 32 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RTS_P10_8_OUT

IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2}

Definition at line 37 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RTS_P33_4_OUT

IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2}

Definition at line 38 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXA_P14_3_IN

IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a}

Definition at line 49 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXB_P02_1_IN

IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b}

Definition at line 50 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXD_P10_6_IN

IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d}

Definition at line 51 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXE_P33_8_IN

IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e}

Definition at line 52 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_RXG_P02_0_IN

IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g}

Definition at line 53 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P02_4_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2}

Definition at line 65 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P10_6_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2}

Definition at line 66 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P14_2_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6}

Definition at line 67 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P33_7_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2}

Definition at line 68 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SCLK_P33_9_OUT

IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4}

Definition at line 69 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P02_3_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2}

Definition at line 82 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P10_5_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6}

Definition at line 83 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_SLSO_P33_6_OUT

IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2}

Definition at line 84 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P02_0_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2}

Definition at line 104 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P10_5_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2}

Definition at line 105 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P14_2_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2}

Definition at line 106 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P14_3_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2}

Definition at line 107 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P33_8_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2}

Definition at line 108 of file IfxAsclin_PinMap.c.

◆ IfxAsclin2_TX_P33_9_OUT

IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2}

Definition at line 109 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_CTSA_P00_12_IN

IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a}

Definition at line 33 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RTS_P00_9_OUT

IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3}

Definition at line 39 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXA_P15_7_IN

IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a}

Definition at line 54 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXC_P20_3_IN

IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c}

Definition at line 55 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXD_P32_2_IN

IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d}

Definition at line 56 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXE_P00_1_IN

IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e}

Definition at line 57 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_RXF_P21_6_IN

IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f}

Definition at line 58 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P00_0_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2}

Definition at line 70 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P00_2_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2}

Definition at line 71 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P15_6_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6}

Definition at line 72 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P15_8_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6}

Definition at line 73 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P20_0_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3}

Definition at line 74 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P21_5_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2}

Definition at line 75 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P21_7_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3}

Definition at line 76 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P32_3_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4}

Definition at line 77 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SCLK_P33_2_OUT

IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2}

Definition at line 78 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P00_3_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2}

Definition at line 85 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P14_3_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5}

Definition at line 86 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P21_2_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2}

Definition at line 87 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P21_6_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2}

Definition at line 88 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_SLSO_P33_1_OUT

IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2}

Definition at line 89 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P00_0_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3}

Definition at line 110 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P00_1_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2}

Definition at line 111 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P15_6_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2}

Definition at line 112 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P15_7_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2}

Definition at line 113 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P20_0_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2}

Definition at line 114 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P20_3_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2}

Definition at line 115 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P21_7_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2}

Definition at line 116 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P32_2_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2}

Definition at line 117 of file IfxAsclin_PinMap.c.

◆ IfxAsclin3_TX_P32_3_OUT

IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2}

Definition at line 118 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Cts_In_pinTable

const IfxAsclin_Cts_In* IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxAsclin0_CTSA_P14_9_IN,
NULL_PTR
},
{
&IfxAsclin1_CTSA_P20_7_IN,
&IfxAsclin1_CTSB_P32_4_IN
},
{
&IfxAsclin2_CTSA_P10_7_IN,
&IfxAsclin2_CTSB_P33_5_IN
},
{
&IfxAsclin3_CTSA_P00_12_IN,
NULL_PTR
}
}
IfxAsclin1_CTSB_P32_4_IN
IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
Definition: IfxAsclin_PinMap.c:30
IfxAsclin2_CTSA_P10_7_IN
IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
Definition: IfxAsclin_PinMap.c:31
IfxAsclin0_CTSA_P14_9_IN
IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
Definition: IfxAsclin_PinMap.c:28
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxAsclin1_CTSA_P20_7_IN
IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
Definition: IfxAsclin_PinMap.c:29
IfxAsclin3_CTSA_P00_12_IN
IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
Definition: IfxAsclin_PinMap.c:33
IfxAsclin2_CTSB_P33_5_IN
IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
Definition: IfxAsclin_PinMap.c:32

Definition at line 121 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Rts_Out_pinTable

const IfxAsclin_Rts_Out* IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxAsclin0_RTS_P14_7_OUT,
NULL_PTR
},
{
&IfxAsclin1_RTS_P20_6_OUT,
&IfxAsclin1_RTS_P23_1_OUT
},
{
&IfxAsclin2_RTS_P10_8_OUT,
&IfxAsclin2_RTS_P33_4_OUT
},
{
&IfxAsclin3_RTS_P00_9_OUT,
NULL_PTR
}
}
IfxAsclin1_RTS_P23_1_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
Definition: IfxAsclin_PinMap.c:36
IfxAsclin2_RTS_P10_8_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
Definition: IfxAsclin_PinMap.c:37
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxAsclin2_RTS_P33_4_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
Definition: IfxAsclin_PinMap.c:38
IfxAsclin3_RTS_P00_9_OUT
IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
Definition: IfxAsclin_PinMap.c:39
IfxAsclin1_RTS_P20_6_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
Definition: IfxAsclin_PinMap.c:35
IfxAsclin0_RTS_P14_7_OUT
IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
Definition: IfxAsclin_PinMap.c:34

Definition at line 140 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Rx_In_pinTable

const IfxAsclin_Rx_In* IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]

Definition at line 159 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Sclk_Out_pinTable

const IfxAsclin_Sclk_Out* IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]

Definition at line 198 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Slso_Out_pinTable

const IfxAsclin_Slso_Out* IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxAsclin1_SLSO_P14_3_OUT,
&IfxAsclin1_SLSO_P20_8_OUT,
&IfxAsclin1_SLSO_P33_10_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxAsclin2_SLSO_P02_3_OUT,
&IfxAsclin2_SLSO_P10_5_OUT,
&IfxAsclin2_SLSO_P33_6_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxAsclin3_SLSO_P00_3_OUT,
&IfxAsclin3_SLSO_P14_3_OUT,
&IfxAsclin3_SLSO_P21_2_OUT,
&IfxAsclin3_SLSO_P21_6_OUT,
&IfxAsclin3_SLSO_P33_1_OUT
}
}
IfxAsclin3_SLSO_P21_2_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
Definition: IfxAsclin_PinMap.c:87
IfxAsclin2_SLSO_P33_6_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
Definition: IfxAsclin_PinMap.c:84
IfxAsclin1_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:79
IfxAsclin2_SLSO_P02_3_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
Definition: IfxAsclin_PinMap.c:82
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxAsclin3_SLSO_P21_6_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
Definition: IfxAsclin_PinMap.c:88
IfxAsclin1_SLSO_P20_8_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
Definition: IfxAsclin_PinMap.c:80
IfxAsclin3_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:86
IfxAsclin3_SLSO_P33_1_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
Definition: IfxAsclin_PinMap.c:89
IfxAsclin2_SLSO_P10_5_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
Definition: IfxAsclin_PinMap.c:83
IfxAsclin3_SLSO_P00_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
Definition: IfxAsclin_PinMap.c:85
IfxAsclin1_SLSO_P33_10_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
Definition: IfxAsclin_PinMap.c:81

Definition at line 245 of file IfxAsclin_PinMap.c.

◆ IfxAsclin_Tx_Out_pinTable

const IfxAsclin_Tx_Out* IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]

Definition at line 276 of file IfxAsclin_PinMap.c.


iLLD_TC26B: IfxAsclin_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxAsclin_PinMap.h File Reference
iLLD » ASCLIN

ASCLIN I/O map. More...

#include <IfxAsclin_reg.h>
#include <_Impl/IfxAsclin_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxAsclin_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Cts_In
CTS pin mapping structure. More...
struct | IfxAsclin_Rx_In
RX pin mapping structure. More...
struct | IfxAsclin_Rts_Out
RTS pin mapping structure. More...
struct | IfxAsclin_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxAsclin_Slso_Out
SLSO pin mapping structure. More...
struct | IfxAsclin_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXASCLIN_PINMAP_NUM_MODULES 4
Table dimensions. More...
#define | IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
#define | IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7
#define | IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9
#define | IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5
#define | IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10

Variables

IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
ASCLIN0_CTSA: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
ASCLIN1_CTSA: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
ASCLIN1_CTSB: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
ASCLIN2_CTSA: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
ASCLIN2_CTSB: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
ASCLIN3_CTSA: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
ASCLIN0_RTS: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
ASCLIN1_RTS: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
ASCLIN1_RTS: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
ASCLIN2_RTS: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
ASCLIN2_RTS: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
ASCLIN3_RTS: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
ASCLIN0_RXA: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
ASCLIN0_RXB: ASCLIN0 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
ASCLIN1_RXA: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
ASCLIN1_RXB: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
ASCLIN1_RXC: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
ASCLIN1_RXD: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
ASCLIN1_RXE: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
ASCLIN1_RXF: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
ASCLIN1_RXG: ASCLIN1 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
ASCLIN2_RXA: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
ASCLIN2_RXB: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
ASCLIN2_RXD: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
ASCLIN2_RXE: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
ASCLIN2_RXG: ASCLIN2 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
ASCLIN3_RXA: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
ASCLIN3_RXC: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
ASCLIN3_RXD: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
ASCLIN3_RXE: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
ASCLIN3_RXF: ASCLIN3 input. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
ASCLIN0_SCLK: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
ASCLIN0_SCLK: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
ASCLIN1_SCLK: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
ASCLIN2_SCLK: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
ASCLIN3_SCLK: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
ASCLIN1_SLSO: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
ASCLIN2_SLSO: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
ASCLIN3_SLSO: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
ASCLIN0_TX: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
ASCLIN0_TX: ASCLIN0 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
ASCLIN1_TX: ASCLIN1 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
ASCLIN2_TX: ASCLIN2 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
ASCLIN3_TX: ASCLIN3 output. More...
IFX_EXTERN const IfxAsclin_Cts_In * | IfxAsclin_Cts_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table. More...
IFX_EXTERN const IfxAsclin_Rts_Out * | IfxAsclin_Rts_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table. More...
IFX_EXTERN const IfxAsclin_Rx_In * | IfxAsclin_Rx_In_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table. More...
IFX_EXTERN const IfxAsclin_Sclk_Out * | IfxAsclin_Sclk_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table. More...
IFX_EXTERN const IfxAsclin_Slso_Out * | IfxAsclin_Slso_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table. More...
IFX_EXTERN const IfxAsclin_Tx_Out * | IfxAsclin_Tx_Out_pinTable [IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table. More...

Detailed Description

ASCLIN I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_PinMap.h.


iLLD_TC26B: IfxAsclin_Asc.h File Reference

  • Asclin
  • Asc
Data Structures | Functions
IfxAsclin_Asc.h File Reference
iLLD » ASCLIN

ASCLIN ASC details. More...

#include "Asclin/Std/IfxAsclin.h"
#include "_Lib/DataHandling/Ifx_Fifo.h"
#include "SysSe/Bsp/Bsp.h"
#include "StdIf/IfxStdIf_DPipe.h"
Include dependency graph for IfxAsclin_Asc.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Asc_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Asc_BaudRate
Structure for baudrate. More...
struct | IfxAsclin_Asc_BitTimingControl
Structure for bit timings. More...
struct | IfxAsclin_Asc_FifoControl
Structure for FIFO control. More...
struct | IfxAsclin_Asc_FrameControl
Structure for frame control. More...
struct | IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Asc_Pins
Structure for ASC pin configuration. More...
union | IfxAsclin_Asc_ErrorFlagsUnion
This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxAsclin_Asc
Module Handle. More...
struct | IfxAsclin_Asc_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...
IFX_EXTERN uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...
IFX_EXTERN boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
IFX_EXTERN void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
IFX_EXTERN sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
IFX_EXTERN sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IFX_EXTERN IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
IFX_EXTERN boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
IFX_EXTERN void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Asc_initiateTransmission (IfxAsclin_Asc *asclin)
Initiate the data transmission. More...
IFX_EXTERN boolean | IfxAsclin_Asc_stdIfDPipeInit (IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver. More...

Detailed Description

ASCLIN ASC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_Asc.h.

Data Structure Documentation

◆ IfxAsclin_Asc_ErrorFlags

struct IfxAsclin_Asc_ErrorFlags

Structure for Error Flags.

Definition at line 232 of file IfxAsclin_Asc.h.

Data Fields
uint8 | frameError: 1 | transmit complete/pending error
uint8 | parityError: 1 | parity error
uint8 | rxFifoOverflow: 1 | receive FIFO overflow error
uint8 | rxFifoUnderflow: 1 | receive FIFO underflow error
uint8 | txFifoOverflow: 1 | transmit FIFO overflow error

◆ IfxAsclin_Asc_ErrorFlagsUnion

union IfxAsclin_Asc_ErrorFlagsUnion

This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member.

Definition at line 313 of file IfxAsclin_Asc.h.

Collaboration diagram for IfxAsclin_Asc_ErrorFlagsUnion:
[legend]
Data Fields
uint8 | ALL
IfxAsclin_Asc_ErrorFlags | flags

Function Documentation

◆ IfxAsclin_Asc_initiateTransmission()

IFX_EXTERN void IfxAsclin_Asc_initiateTransmission ( IfxAsclin_Asc * asclin )

Initiate the data transmission.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 385 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_write().

◆ IfxAsclin_Asc_stdIfDPipeInit()

IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit | ( | IfxStdIf_DPipe * | stdif,
 |  | IfxAsclin_Asc * | asclin
 | ) |  |

Initialize the standard interface to the device driver.

Parameters
stdif | standard interface object, will be initialized by the function
asclin | device driver object used by the standard interface. must be initialised separately
Returns
TRUE on success, else FALSE

Definition at line 563 of file IfxAsclin_Asc.c.


iLLD_TC26B: IfxAsclin_Lin.h File Reference

  • Asclin
  • Lin
Data Structures | Macros | Enumerations | Functions
IfxAsclin_Lin.h File Reference
iLLD » ASCLIN

ASCLIN LIN details. More...

#include "Asclin/Std/IfxAsclin.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxAsclin_Lin.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation. More...
struct | IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags. More...
struct | IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags. More...
struct | IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection. More...
struct | IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation. More...
struct | IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing. More...
struct | IfxAsclin_Lin_DataControl
Structure for Data Control. More...
struct | IfxAsclin_Lin_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Lin_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Lin_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags. More...
struct | IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration. More...
struct | IfxAsclin_Lin_LinControl
Structure for lin Control. More...
struct | IfxAsclin_Lin_Pins
Structure for LIN pin configuration. More...
struct | IfxAsclin_Lin
struct | IfxAsclin_Lin_Config
Configuration structure of the module. More...
struct | IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data. More...

Macros

#define | IFXASCLIN_LIN_SEND_RESPONSE (0x80)
#define | IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)

Enumerations

enum IfxAsclin_Lin_Direction {
IfxAsclin_Lin_Direction_TransmitHeader = 0,
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1,
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2
}
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Transmit Header and Receive Response). More...

Functions

IFX_INLINE void | IfxAsclin_Lin_prepareHeaderReception (IfxAsclin_Lin *asclin)
Prepares the module to receive the header. More...
IFX_INLINE void | IfxAsclin_Lin_prepareResponseReception (IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response. More...
IFX_INLINE void | IfxAsclin_Lin_readHeader (IfxAsclin_Lin *asclin, uint8 *id)
Reads the header. More...
IFX_INLINE void | IfxAsclin_Lin_readResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response. More...
IFX_EXTERN void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
IFX_EXTERN void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
IFX_EXTERN void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
IFX_EXTERN void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...
IFX_EXTERN void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
IFX_EXTERN void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
IFX_EXTERN void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
IFX_EXTERN boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...
IFX_EXTERN void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...

Detailed Description

ASCLIN LIN details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_Lin.h.

Macro Definition Documentation

◆ IFXASCLIN_LIN_RECEIVE_RESPONSE

#define IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)

Definition at line 297 of file IfxAsclin_Lin.h.

◆ IFXASCLIN_LIN_SEND_RESPONSE

#define IFXASCLIN_LIN_SEND_RESPONSE (0x80)

Definition at line 295 of file IfxAsclin_Lin.h.


iLLD_TC26B: IfxAsclin_Spi.h File Reference

  • Asclin
  • Spi
Data Structures | Enumerations | Functions
IfxAsclin_Spi.h File Reference
iLLD » ASCLIN

ASCLIN SPI details. More...

#include "Asclin/Std/IfxAsclin.h"
Include dependency graph for IfxAsclin_Spi.h:

Go to the source code of this file.

Data Structures

struct | IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation. More...
struct | IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling. More...
struct | IfxAsclin_Spi_ErrorFlags
Structure for Error Flags. More...
struct | IfxAsclin_Spi_FifoControl
Structure for FIFO Control. More...
struct | IfxAsclin_Spi_FrameControl
Structure for Frame Control. More...
struct | IfxAsclin_Spi_InputOutputControl
Structure for input output control. More...
struct | IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxAsclin_Spi_Job
Structure for data transfer jobs. More...
struct | IfxAsclin_Spi_Pins
Structure for SPI pin configuration. More...
struct | IfxAsclin_Spi
Module handle. More...
struct | IfxAsclin_Spi_Config
Configuration structure of the module. More...

Enumerations

enum IfxAsclin_Spi_Status {
IfxAsclin_Spi_Status_ok = 0,
IfxAsclin_Spi_Status_busy = 1,
IfxAsclin_Spi_Status_unknown = 2
}
Enumeration for job status. More...

Functions

IFX_EXTERN void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IFX_EXTERN IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...
IFX_EXTERN void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
IFX_EXTERN void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...
IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IFX_EXTERN void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
IFX_EXTERN void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...
IFX_EXTERN IfxAsclin_Spi_Status | IfxAsclin_Spi_getStatus (IfxAsclin_Spi *asclin)

Detailed Description

ASCLIN SPI details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_Spi.h.

Enumeration Type Documentation

◆ IfxAsclin_Spi_Status

enum IfxAsclin_Spi_Status

Enumeration for job status.

Enumerator
IfxAsclin_Spi_Status_ok
IfxAsclin_Spi_Status_busy
IfxAsclin_Spi_Status_unknown

Definition at line 212 of file IfxAsclin_Spi.h.

Function Documentation

◆ IfxAsclin_Spi_getStatus()

IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 80 of file IfxAsclin_Spi.c.


iLLD_TC26B: IfxAsclin.h File Reference

  • Asclin
  • Std
Enumerations | Functions
IfxAsclin.h File Reference
iLLD » ASCLIN

ASCLIN basic functionality. More...

#include "_Impl/IfxAsclin_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxAsclin_reg.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxAsclin_PinMap.h"
Include dependency graph for IfxAsclin.h:

Go to the source code of this file.

Enumerations

enum IfxAsclin_Checksum {
IfxAsclin_Checksum_classic = 0,
IfxAsclin_Checksum_enhanced = 1
}
Defines if the classic or the enhanced checksum will be calculated by the checksum block.
Definition in Ifx_ASCLIN.DATCON.B.CSM. More...
enum IfxAsclin_ChecksumInjection {
IfxAsclin_ChecksumInjection_notWritten = 0,
IfxAsclin_ChecksumInjection_written = 1
}
Defines if the received checksum byte is written into the RXFifo or not.
Definition in Ifx_ASCLIN.LIN.CON.B.CSI. More...
enum IfxAsclin_ClockPolarity {
IfxAsclin_ClockPolarity_idleLow = 0,
IfxAsclin_ClockPolarity_idleHigh = 1
}
CPOL defines the idle level of the clock signal in the SPI mode.
Idle level is the level outside the data transmission time intervals.
Definition in Ifx_ASCLIN.IOCR.B.CPOL. More...
enum IfxAsclin_ClockSource {
IfxAsclin_ClockSource_noClock = 0,
IfxAsclin_ClockSource_kernelClock = 1,
IfxAsclin_ClockSource_oscillatorClock = 2,
IfxAsclin_ClockSource_flexRayClock = 4,
IfxAsclin_ClockSource_ascFastClock = 8,
IfxAsclin_ClockSource_ascSlowClock = 16
}
Selection of clock source
Definition in Ifx_ASCLIN.CSR.B.CLKSEL. More...
enum IfxAsclin_CtsInputSelect {
IfxAsclin_CtsInputSelect_0,
IfxAsclin_CtsInputSelect_1,
IfxAsclin_CtsInputSelect_2,
IfxAsclin_CtsInputSelect_3
}
CTS input pin selection
Definition in Ifx_ASCLIN.IOCR.B.CTS. More...
enum IfxAsclin_DataLength {
IfxAsclin_DataLength_1 = 0,
IfxAsclin_DataLength_2,
IfxAsclin_DataLength_3,
IfxAsclin_DataLength_4,
IfxAsclin_DataLength_5,
IfxAsclin_DataLength_6,
IfxAsclin_DataLength_7,
IfxAsclin_DataLength_8,
IfxAsclin_DataLength_9,
IfxAsclin_DataLength_10,
IfxAsclin_DataLength_11,
IfxAsclin_DataLength_12,
IfxAsclin_DataLength_13,
IfxAsclin_DataLength_14,
IfxAsclin_DataLength_15,
IfxAsclin_DataLength_16
}
Number of bits per transfer
Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN. More...
enum IfxAsclin_FrameMode {
IfxAsclin_FrameMode_initialise = 0,
IfxAsclin_FrameMode_asc = 1,
IfxAsclin_FrameMode_spi = 2,
IfxAsclin_FrameMode_lin = 3
}
Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.
Definition in Ifx_ASCLIN.FRAMECON.B.MODE. More...
enum IfxAsclin_HeaderResponseSelect {
IfxAsclin_HeaderResponseSelect_headerAndResponse = 0,
IfxAsclin_HeaderResponseSelect_headerOnly = 1
}
Defines if LIN frame shall consist of a header and response or of a header only.
Definition in Ifx_ASCLIN.DATCON.B.HO. More...
enum IfxAsclin_IdleDelay {
IfxAsclin_IdleDelay_0,
IfxAsclin_IdleDelay_1,
IfxAsclin_IdleDelay_2,
IfxAsclin_IdleDelay_3,
IfxAsclin_IdleDelay_4,
IfxAsclin_IdleDelay_5,
IfxAsclin_IdleDelay_6,
IfxAsclin_IdleDelay_7
}
Defines the duration of the IDLE delay in bit times.
SPI mode: this is the idle time between the frames.
ASC and LIN mode: this is the pause inserted between transmission of bytes.
Definition in Ifx_ASCLIN.FRAMECON.B.IDLE. More...
enum IfxAsclin_LeadDelay {
IfxAsclin_LeadDelay_0,
IfxAsclin_LeadDelay_1,
IfxAsclin_LeadDelay_2,
IfxAsclin_LeadDelay_3,
IfxAsclin_LeadDelay_4,
IfxAsclin_LeadDelay_5,
IfxAsclin_LeadDelay_6,
IfxAsclin_LeadDelay_7
}
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.
LIN mode: delay between the end of the break and the start of the sync character.
Definition in Ifx_ASCLIN.FRAMECON.B.LEAD. More...
enum IfxAsclin_LinMode {
IfxAsclin_LinMode_slave = 0,
IfxAsclin_LinMode_master = 1
}
Configures if the module in LIN mode operates as master or slave
Definition in Ifx_ASCLIN.LIN.CON.B.MS. More...
enum IfxAsclin_LinResponseTimeoutMode {
IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0,
IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1
}
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.
Definition in Ifx_ASCLIN.DATCON.B.RM. More...
enum IfxAsclin_OversamplingFactor {
IfxAsclin_OversamplingFactor_4 = 3,
IfxAsclin_OversamplingFactor_5 = 4,
IfxAsclin_OversamplingFactor_6 = 5,
IfxAsclin_OversamplingFactor_7 = 6,
IfxAsclin_OversamplingFactor_8 = 7,
IfxAsclin_OversamplingFactor_9 = 8,
IfxAsclin_OversamplingFactor_10 = 9,
IfxAsclin_OversamplingFactor_11 = 10,
IfxAsclin_OversamplingFactor_12 = 11,
IfxAsclin_OversamplingFactor_13 = 12,
IfxAsclin_OversamplingFactor_14 = 13,
IfxAsclin_OversamplingFactor_15 = 14,
IfxAsclin_OversamplingFactor_16 = 15
}
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed
Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING. More...
enum IfxAsclin_ParityType {
IfxAsclin_ParityType_even = 0,
IfxAsclin_ParityType_odd = 1
}
Type of parity bit attached to data bits
Definition in Ifx_ASCLIN.FRAMECON.B.ODD. More...
enum IfxAsclin_ReceiveBufferMode {
IfxAsclin_ReceiveBufferMode_rxFifo = 0,
IfxAsclin_ReceiveBufferMode_rxBuffer = 1
}
Receive buffer mode
Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF. More...
enum IfxAsclin_RtsCtsPolarity {
IfxAsclin_RtsCtsPolarity_activeHigh = 0,
IfxAsclin_RtsCtsPolarity_activeLow = 1
}
Polarity of the RTS and CTS signals
Definition in Ifx_ASCLIN.IOCR.B.RCPOL. More...
enum IfxAsclin_RxFifoInterruptLevel {
IfxAsclin_RxFifoInterruptLevel_1,
IfxAsclin_RxFifoInterruptLevel_2,
IfxAsclin_RxFifoInterruptLevel_3,
IfxAsclin_RxFifoInterruptLevel_4,
IfxAsclin_RxFifoInterruptLevel_5,
IfxAsclin_RxFifoInterruptLevel_6,
IfxAsclin_RxFifoInterruptLevel_7,
IfxAsclin_RxFifoInterruptLevel_8,
IfxAsclin_RxFifoInterruptLevel_9,
IfxAsclin_RxFifoInterruptLevel_10,
IfxAsclin_RxFifoInterruptLevel_11,
IfxAsclin_RxFifoInterruptLevel_12,
IfxAsclin_RxFifoInterruptLevel_13,
IfxAsclin_RxFifoInterruptLevel_14,
IfxAsclin_RxFifoInterruptLevel_15,
IfxAsclin_RxFifoInterruptLevel_16
}
Defines the filling level that triggers a drain (RX) interrupt or DMA access
Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL. More...
enum IfxAsclin_RxFifoOutletWidth {
IfxAsclin_RxFifoOutletWidth_0,
IfxAsclin_RxFifoOutletWidth_1,
IfxAsclin_RxFifoOutletWidth_2,
IfxAsclin_RxFifoOutletWidth_3
}
Defines the number of bytes read from the Rx FIFO with one FPI bus read
Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW. More...
enum IfxAsclin_RxInputSelect {
IfxAsclin_RxInputSelect_0,
IfxAsclin_RxInputSelect_1,
IfxAsclin_RxInputSelect_2,
IfxAsclin_RxInputSelect_3,
IfxAsclin_RxInputSelect_4,
IfxAsclin_RxInputSelect_5,
IfxAsclin_RxInputSelect_6,
IfxAsclin_RxInputSelect_7
}
Alternate input selection for Rx signal.
Definition in Ifx_ASCLIN.IOCR.B.ALTI. More...
enum IfxAsclin_SamplePointPosition {
IfxAsclin_SamplePointPosition_1 = 1,
IfxAsclin_SamplePointPosition_2 = 2,
IfxAsclin_SamplePointPosition_3 = 3,
IfxAsclin_SamplePointPosition_4 = 4,
IfxAsclin_SamplePointPosition_5 = 5,
IfxAsclin_SamplePointPosition_6 = 6,
IfxAsclin_SamplePointPosition_7 = 7,
IfxAsclin_SamplePointPosition_8 = 8,
IfxAsclin_SamplePointPosition_9 = 9,
IfxAsclin_SamplePointPosition_10 = 10,
IfxAsclin_SamplePointPosition_11 = 11,
IfxAsclin_SamplePointPosition_12 = 12,
IfxAsclin_SamplePointPosition_13 = 13,
IfxAsclin_SamplePointPosition_14 = 14,
IfxAsclin_SamplePointPosition_15 = 15
}
Sample point position
Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT. More...
enum IfxAsclin_SamplesPerBit {
IfxAsclin_SamplesPerBit_one = 0,
IfxAsclin_SamplesPerBit_three = 1
}
Number of samples per bit, sample mode/medianfilter
Definition in Ifx_ASCLIN.BITCON.B.SM. More...
enum IfxAsclin_ShiftDirection {
IfxAsclin_ShiftDirection_lsbFirst = 0,
IfxAsclin_ShiftDirection_msbFirst = 1
}
SPI mode: defines the shift direction of the shift register.
ASC and LIN mode: should be set to 0.
Definition in Ifx_ASCLIN.FRAMECON.B.MSB. More...
enum IfxAsclin_SlavePolarity {
IfxAsclin_SlavePolarity_idleLow = 0,
IfxAsclin_SlavePolarity_idlehigh = 1
}
Defines the idle level of the SLSO signal, which is the level.
Outside the data transmission, leading and trailing time intervals.
Definition in Ifx_ASCLIN.IOCR.B.SPOL. More...
enum IfxAsclin_SleepMode {
IfxAsclin_SleepMode_enable = 0,
IfxAsclin_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ASCLIN.CLC.B.EDIS. More...
enum IfxAsclin_Status {
IfxAsclin_Status_configurationError = 0,
IfxAsclin_Status_noError = 1
}
Error status. More...
enum IfxAsclin_StopBit {
IfxAsclin_StopBit_0,
IfxAsclin_StopBit_1,
IfxAsclin_StopBit_2,
IfxAsclin_StopBit_3,
IfxAsclin_StopBit_4,
IfxAsclin_StopBit_5,
IfxAsclin_StopBit_6,
IfxAsclin_StopBit_7
}
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.
Definition in Ifx_ASCLIN.FRAMECON.B.STOP. More...
enum IfxAsclin_SuspendMode {
IfxAsclin_SuspendMode_none = 0,
IfxAsclin_SuspendMode_hard = 1,
IfxAsclin_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxAsclin_TxFifoInletWidth {
IfxAsclin_TxFifoInletWidth_0,
IfxAsclin_TxFifoInletWidth_1,
IfxAsclin_TxFifoInletWidth_2,
IfxAsclin_TxFifoInletWidth_3
}
Defines the number of bytes written to the Tx FIFO with one FPI bus write
Definition in Ifx_ASCLIN.TXFIFOCON.B.INW. More...
enum IfxAsclin_TxFifoInterruptLevel {
IfxAsclin_TxFifoInterruptLevel_0,
IfxAsclin_TxFifoInterruptLevel_1,
IfxAsclin_TxFifoInterruptLevel_2,
IfxAsclin_TxFifoInterruptLevel_3,
IfxAsclin_TxFifoInterruptLevel_4,
IfxAsclin_TxFifoInterruptLevel_5,
IfxAsclin_TxFifoInterruptLevel_6,
IfxAsclin_TxFifoInterruptLevel_7,
IfxAsclin_TxFifoInterruptLevel_8,
IfxAsclin_TxFifoInterruptLevel_9,
IfxAsclin_TxFifoInterruptLevel_10,
IfxAsclin_TxFifoInterruptLevel_11,
IfxAsclin_TxFifoInterruptLevel_12,
IfxAsclin_TxFifoInterruptLevel_13,
IfxAsclin_TxFifoInterruptLevel_14,
IfxAsclin_TxFifoInterruptLevel_15
}
Defines the filling level that triggers a refill (TX) interrupt or DMA access
Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL. More...

Functions

IFX_INLINE void | IfxAsclin_clearAllFlags (Ifx_ASCLIN *asclin)
clears all the flags More...
IFX_INLINE void | IfxAsclin_clearBreakDetectedFlag (Ifx_ASCLIN *asclin)
Clears the break detected flag. More...
IFX_INLINE void | IfxAsclin_clearCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the collision detection error flag. More...
IFX_INLINE void | IfxAsclin_clearFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearFrameErrorFlag (Ifx_ASCLIN *asclin)
Clears the frame error flag. More...
IFX_INLINE void | IfxAsclin_clearHeaderTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the header timeout flag. More...
IFX_INLINE void | IfxAsclin_clearKernelResetStatus (Ifx_ASCLIN *asclin)
Clears the kernel reset status. More...
IFX_INLINE void | IfxAsclin_clearLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_clearLinChecksumErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_clearLinParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_clearParityErrorFlag (Ifx_ASCLIN *asclin)
Clears the parity error flag. More...
IFX_INLINE void | IfxAsclin_clearRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin)
Clears the raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_clearResponseTimeoutFlag (Ifx_ASCLIN *asclin)
Clears the response timeout flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxFifoUnderflowFlag (Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_clearRxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the receive header end flag. More...
IFX_INLINE void | IfxAsclin_clearRxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the receive response end flag. More...
IFX_INLINE void | IfxAsclin_clearTransmissionCompletedFlag (Ifx_ASCLIN *asclin)
Clears the transmission pending flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoFillLevelFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_clearTxFifoOverflowFlag (Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_clearTxHeaderEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit header end flag. More...
IFX_INLINE void | IfxAsclin_clearTxResponseEndFlag (Ifx_ASCLIN *asclin)
Clears the transmit response end flag. More...
IFX_INLINE void | IfxAsclin_flushRxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO. More...
IFX_INLINE void | IfxAsclin_flushTxFifo (Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO. More...
IFX_INLINE void | IfxAsclin_setBrdLowerlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's lower limit. More...
IFX_INLINE void | IfxAsclin_setBrdUpperlimt (Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection's upper limit. More...
IFX_INLINE void | IfxAsclin_setChecksumInjection (Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection. More...
IFX_INLINE void | IfxAsclin_setChecksumMode (Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode. More...
IFX_INLINE void | IfxAsclin_setDataLength (Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer) More...
IFX_INLINE void | IfxAsclin_setDenominator (Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setDisableModuleRequest (Ifx_ASCLIN *asclin)
Sets the disable module request. More...
IFX_INLINE void | IfxAsclin_setEnableModuleRequest (Ifx_ASCLIN *asclin)
Sets the enable module request. More...
IFX_INLINE void | IfxAsclin_setFilterDepth (Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth. More...
IFX_INLINE void | IfxAsclin_setHeaderResponseSelect (Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection. More...
IFX_INLINE void | IfxAsclin_setIdleDelay (Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay. More...
IFX_INLINE void | IfxAsclin_setKernelResetOne (Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1. More...
IFX_INLINE void | IfxAsclin_setKernelResetZero (Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0. More...
IFX_INLINE void | IfxAsclin_setLeadDelay (Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay. More...
IFX_INLINE void | IfxAsclin_setLinBreakLength (Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length. More...
IFX_INLINE void | IfxAsclin_setLinHeaderTimeout (Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout. More...
IFX_INLINE void | IfxAsclin_setLinMode (Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutMode (Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode. More...
IFX_INLINE void | IfxAsclin_setLinResponseTimeoutThreshold (Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold. More...
IFX_INLINE void | IfxAsclin_setNumerator (Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider. More...
IFX_INLINE void | IfxAsclin_setOversampling (Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider. More...
IFX_INLINE void | IfxAsclin_setParityType (Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type. More...
IFX_INLINE void | IfxAsclin_setPrescaler (Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler) More...
IFX_INLINE void | IfxAsclin_setRxBufferMode (Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode. More...
IFX_INLINE void | IfxAsclin_setRxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE void | IfxAsclin_setRxFifoOutletWidth (Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width. More...
IFX_INLINE void | IfxAsclin_setSampleMode (Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter) More...
IFX_INLINE void | IfxAsclin_setSamplePointPosition (Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position. More...
IFX_INLINE void | IfxAsclin_setShiftDirection (Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction. More...
IFX_INLINE void | IfxAsclin_setStopBit (Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits. More...
IFX_INLINE void | IfxAsclin_setTransmitHeaderRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit header request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitResponseRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmit response request flag. More...
IFX_INLINE void | IfxAsclin_setTransmitWakeRequestFlag (Ifx_ASCLIN *asclin)
Sets the transmission wake request flag. More...
IFX_INLINE void | IfxAsclin_setTxFifoInletWidth (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width. More...
IFX_INLINE void | IfxAsclin_setTxFifoInterruptLevel (Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level. More...
IFX_INLINE boolean | IfxAsclin_getBreakDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the break detected flag status. More...
IFX_INLINE uint8 | IfxAsclin_getClockSource (Ifx_ASCLIN *asclin)
Returns the clock source. More...
IFX_INLINE boolean | IfxAsclin_getClockStatus (Ifx_ASCLIN *asclin)
Returns the clock status. More...
IFX_INLINE boolean | IfxAsclin_getCollisionDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the collision detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getFallingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getFrameErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the frame error flag status. More...
IFX_INLINE boolean | IfxAsclin_getHeaderTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the header timeout flag status. More...
IFX_INLINE boolean | IfxAsclin_getKernelResetStatus (Ifx_ASCLIN *asclin)
Returns the kernel reset status. More...
IFX_INLINE boolean | IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinChecksumErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status. More...
IFX_INLINE boolean | IfxAsclin_getLinParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status. More...
IFX_INLINE boolean | IfxAsclin_getModuleStatus (Ifx_ASCLIN *asclin)
Returns the module status. More...
IFX_INLINE boolean | IfxAsclin_getParityErrorFlagStatus (Ifx_ASCLIN *asclin)
Returns the parity error flag status. More...
IFX_INLINE uint16 | IfxAsclin_getPrescaler (Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler) More...
IFX_INLINE boolean | IfxAsclin_getRaisingEdgeDetectedFlagStatus (Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status. More...
IFX_INLINE boolean | IfxAsclin_getReceiveSignalStatus (Ifx_ASCLIN *asclin)
Returns the received signal status. More...
IFX_INLINE boolean | IfxAsclin_getResponseTimeoutFlagStatus (Ifx_ASCLIN *asclin)
Returns the response timeout flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getRxFifoOutletWidth (Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxFifoUnderflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getRxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the receive response end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmissionCompletedFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmission pending flag status. More...
IFX_INLINE boolean | IfxAsclin_getTransmitSignalStatus (Ifx_ASCLIN *asclin)
Returns the transmit signal status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoFillLevel (Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoFillLevelFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status. More...
IFX_INLINE uint8 | IfxAsclin_getTxFifoInletWidth (Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width. More...
IFX_INLINE boolean | IfxAsclin_getTxFifoOverflowFlagStatus (Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxHeaderEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit header end flag status. More...
IFX_INLINE boolean | IfxAsclin_getTxResponseEndFlagStatus (Ifx_ASCLIN *asclin)
Returns the transmit response end flag status. More...
IFX_INLINE void | IfxAsclin_setSleepMode (Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
IFX_EXTERN float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IFX_EXTERN IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
IFX_EXTERN float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
IFX_EXTERN float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
IFX_EXTERN float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
IFX_EXTERN void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...
IFX_INLINE void | IfxAsclin_disableAllFlags (Ifx_ASCLIN *asclin)
disables all flags More...
IFX_INLINE void | IfxAsclin_enableAutoBaudrateDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection. More...
IFX_INLINE void | IfxAsclin_enableBreakDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetection (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection. More...
IFX_INLINE void | IfxAsclin_enableCollisionDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag. More...
IFX_INLINE void | IfxAsclin_enableCts (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS. More...
IFX_INLINE void | IfxAsclin_enableFallingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableFrameErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag. More...
IFX_INLINE void | IfxAsclin_enableHardwareChecksum (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum. More...
IFX_INLINE void | IfxAsclin_enableHeaderTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag. More...
IFX_INLINE void | IfxAsclin_enableLinAutoBaudDetectionErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag. More...
IFX_INLINE void | IfxAsclin_enableLinChecksumErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag. More...
IFX_INLINE void | IfxAsclin_enableLinParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag. More...
IFX_INLINE void | IfxAsclin_enableLoopBackMode (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode. More...
IFX_INLINE void | IfxAsclin_enableParity (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits. More...
IFX_INLINE void | IfxAsclin_enableParityErrorFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag. More...
IFX_INLINE void | IfxAsclin_enableRaisingEdgeDetectedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag. More...
IFX_INLINE void | IfxAsclin_enableResponseTimeoutFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoInlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register. More...
IFX_INLINE void | IfxAsclin_enableRxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxFifoUnderflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag. More...
IFX_INLINE void | IfxAsclin_enableRxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag. More...
IFX_INLINE void | IfxAsclin_enableRxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag. More...
IFX_INLINE void | IfxAsclin_enableTransmissionCompletedFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoFillLevelFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOutlet (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission. More...
IFX_INLINE void | IfxAsclin_enableTxFifoOverflowFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag. More...
IFX_INLINE void | IfxAsclin_enableTxHeaderEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag. More...
IFX_INLINE void | IfxAsclin_enableTxResponseEndFlag (Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag. More...
IFX_INLINE boolean | IfxAsclin_isModuleSuspended (Ifx_ASCLIN *asclin)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxAsclin_setClockPolarity (Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity. More...
IFX_INLINE void | IfxAsclin_setCtsInput (Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin. More...
IFX_INLINE void | IfxAsclin_setFrameMode (Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module's mode of operation. More...
IFX_INLINE void | IfxAsclin_setRtsCtsPolarity (Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity. More...
IFX_INLINE void | IfxAsclin_setRxInput (Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE void | IfxAsclin_setSlavePolarity (Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity. More...
IFX_INLINE void | IfxAsclin_setSuspendMode (Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...
IFX_EXTERN void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
IFX_EXTERN void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
IFX_EXTERN void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
IFX_EXTERN uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
IFX_EXTERN void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
IFX_EXTERN void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
IFX_EXTERN uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
IFX_EXTERN uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...
IFX_INLINE void | IfxAsclin_initCtsPin (const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input. More...
IFX_INLINE void | IfxAsclin_initRtsPin (const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output. More...
IFX_INLINE void | IfxAsclin_initRxPin (const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxAsclin_initSclkPin (const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxAsclin_initSlsoPin (const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxAsclin_initTxPin (const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE uint32 | IfxAsclin_readRxData (Ifx_ASCLIN *asclin)
IFX_INLINE void | IfxAsclin_writeTxData (Ifx_ASCLIN *asclin, uint32 data)
IFX_INLINE uint16 | IfxAsclin_getAllErrorFlagsStatus (Ifx_ASCLIN *asclin)
Returns the status of all error flags. More...

Detailed Description

ASCLIN basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin.h.

Function Documentation

◆ IfxAsclin_getAllErrorFlagsStatus()

IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus ( Ifx_ASCLIN * asclin )

Returns the status of all error flags.

Parameters
asclin pointer to ASCLIN registers
Returns
status

Definition at line 2439 of file IfxAsclin.h.

◆ IfxAsclin_readRxData()

IFX_INLINE uint32 IfxAsclin_readRxData ( Ifx_ASCLIN * asclin )
Parameters
asclin pointer to ASCLIN registers
Returns
returns the value of RxDATA register

Definition at line 2161 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_read().

◆ IfxAsclin_writeTxData()

IFX_INLINE void IfxAsclin_writeTxData | ( | Ifx_ASCLIN * | asclin,
 |  | uint32 | data
 | ) |  |
Parameters
asclin | pointer to ASCLIN registers
data | data to be written
Returns
None

Definition at line 2433 of file IfxAsclin.h.

Referenced by IfxAsclin_Spi_write().


iLLD_TC26B: CCU6

Modules | Files
CCU6
iLLD
Collaboration diagram for CCU6:

Modules

Implementation
Standard Driver
CCU6 Pin Mapping
ICU Interface driver
PWMBC Interface driver
PWM Interface Driver
TIMER Interface driver
TimerWithTrigger Interface driver
TPWM Interface driver

Files

file | IfxCcu6_cfg.h
CCU6 on-chip implementation data.
file | IfxCcu6_PinMap.c
CCU6 I/O map.
file | IfxCcu6_PinMap.h
CCU6 I/O map.
file | IfxCcu6_Icu.h
CCU6 ICU details.
file | IfxCcu6_PwmBc.h
CCU6 PWMBC details.
file | IfxCcu6_PwmHl.h
CCU6 PWMHL details.
file | IfxCcu6.h
CCU6 basic functionality.
file | IfxCcu6_Timer.h
CCU6 TIMER details.
file | IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
file | IfxCcu6_TPwm.h
CCU6 TPWM details.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » CCU6
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
iLLD » CCU6 » Implementation
Collaboration diagram for Enumerations:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » CCU6
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Utility Functions
Configuration Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » CCU6 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxCcu6_CaptureCompareInput {
IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF,
IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF,
IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF,
IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF,
IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF,
IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF,
IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF
}
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0. More...
enum IfxCcu6_CaptureCompareInputSignal {
IfxCcu6_CaptureCompareInputSignal_a = 0,
IfxCcu6_CaptureCompareInputSignal_b = 1,
IfxCcu6_CaptureCompareInputSignal_c = 2,
IfxCcu6_CaptureCompareInputSignal_d = 3
}
Selection of actual input signal for the capture compare inputs. More...
enum IfxCcu6_CaptureCompareState {
IfxCcu6_CaptureCompareState_set = 0,
IfxCcu6_CaptureCompareState_clear = 1,
IfxCcu6_CaptureCompareState_toggle = 2
}
capture/compare state to set / clear the CC6xST-bits More...
enum IfxCcu6_ChannelOut {
IfxCcu6_ChannelOut_cc0 = 0,
IfxCcu6_ChannelOut_cout0 = 1,
IfxCcu6_ChannelOut_cc1 = 2,
IfxCcu6_ChannelOut_cout1 = 3,
IfxCcu6_ChannelOut_cc2 = 4,
IfxCcu6_ChannelOut_cout2 = 5,
IfxCcu6_ChannelOut_cout3 = 6
}
Capture compare output pins. More...
enum IfxCcu6_CountingInputMode {
IfxCcu6_CountingInputMode_internal = 0,
IfxCcu6_CountingInputMode_manual = 1,
IfxCcu6_CountingInputMode_externalRising = 2,
IfxCcu6_CountingInputMode_externalFalling = 3
}
Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13. More...
enum IfxCcu6_DelayBypass {
IfxCcu6_DelayBypass_notActive = 0,
IfxCcu6_DelayBypass_active = 1
}
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP. More...
enum IfxCcu6_ExternalTriggerMode {
IfxCcu6_ExternalTriggerMode_disable = 0,
IfxCcu6_ExternalTriggerMode_risingEdge = 1,
IfxCcu6_ExternalTriggerMode_fallingEdge = 2,
IfxCcu6_ExternalTriggerMode_anyEdge = 3
}
Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL. More...
enum IfxCcu6_HallSensorTriggerMode {
IfxCcu6_HallSensorTriggerMode_permanentCheck = 0,
IfxCcu6_HallSensorTriggerMode_cM63 = 1,
IfxCcu6_HallSensorTriggerMode_t13PM = 2,
IfxCcu6_HallSensorTriggerMode_off = 3,
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4,
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5,
IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6,
IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7
}
Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC. More...
enum IfxCcu6_InterruptSource {
IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF,
IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF,
IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF,
IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF,
IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF,
IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF,
IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF,
IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF,
IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF,
IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF,
IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF,
IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF,
IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF
}
Interrupt source selection Description in Ifx_CCU.IEN. More...
enum IfxCcu6_MultiChannelSwitchingSelect {
IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0,
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1,
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2,
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3,
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4,
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5
}
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL. More...
enum IfxCcu6_MultiChannelSwitchingSync {
IfxCcu6_MultiChannelSwitchingSync_direct = 0,
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1,
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2
}
Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN. More...
enum IfxCcu6_ServiceRequest {
IfxCcu6_ServiceRequest_0 = 0,
IfxCcu6_ServiceRequest_1,
IfxCcu6_ServiceRequest_2,
IfxCcu6_ServiceRequest_3
}
Selection of service request outputs. More...
enum IfxCcu6_SleepMode {
IfxCcu6_SleepMode_enable = 0,
IfxCcu6_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS. More...
enum IfxCcu6_SuspendMode {
IfxCcu6_SuspendMode_none = 0,
IfxCcu6_SuspendMode_hard = 1,
IfxCcu6_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxCcu6_T12Channel {
IfxCcu6_T12Channel_0 = 0,
IfxCcu6_T12Channel_1,
IfxCcu6_T12Channel_2
}
Capture compare channel of Timer12. More...
enum IfxCcu6_T12ChannelMode {
IfxCcu6_T12ChannelMode_off = 0,
IfxCcu6_T12ChannelMode_compareMode = 1,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7,
IfxCcu6_T12ChannelMode_hallSensor = 8,
IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9,
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10,
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11,
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12,
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13,
IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14
}
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x. More...
enum IfxCcu6_T12CountDirection {
IfxCcu6_T12CountDirection_up = 0,
IfxCcu6_T12CountDirection_down = 1
}
Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR. More...
enum IfxCcu6_T12CountMode {
IfxCcu6_T12CountMode_edgeAligned = 0,
IfxCcu6_T12CountMode_centerAligned = 1
}
Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM. More...
enum IfxCcu6_T13TriggerDirection {
IfxCcu6_T13TriggerDirection_noAction = 0,
IfxCcu6_T13TriggerDirection_onT12CountingUp = 1,
IfxCcu6_T13TriggerDirection_onT12CountingDown = 2,
IfxCcu6_T13TriggerDirection_anyT12 = 3
}
Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED. More...
enum IfxCcu6_T13TriggerEvent {
IfxCcu6_T13TriggerEvent_noAction = 0,
IfxCcu6_T13TriggerEvent_onCC60RCompare = 1,
IfxCcu6_T13TriggerEvent_onCC61RCompare = 2,
IfxCcu6_T13TriggerEvent_onCC62RCompare = 3,
IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4,
IfxCcu6_T13TriggerEvent_onT12Period = 5,
IfxCcu6_T13TriggerEvent_onT12Zero = 6,
IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7
}
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC. More...
enum IfxCcu6_TimerId {
IfxCcu6_TimerId_t12 = 0,
IfxCcu6_TimerId_t13 = 1
}
Timer number ( T12 / T13 ) More...
enum IfxCcu6_TimerInputClock {
IfxCcu6_TimerInputClock_fcc6 = 0,
IfxCcu6_TimerInputClock_fcc6By2 = 1,
IfxCcu6_TimerInputClock_fcc6By4 = 2,
IfxCcu6_TimerInputClock_fcc6By8 = 3,
IfxCcu6_TimerInputClock_fcc6By16 = 4,
IfxCcu6_TimerInputClock_fcc6By32 = 5,
IfxCcu6_TimerInputClock_fcc6By64 = 6,
IfxCcu6_TimerInputClock_fcc6By128 = 7
}
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK. More...
enum IfxCcu6_TimerInputSignal {
IfxCcu6_TimerInputSignal_a = 0,
IfxCcu6_TimerInputSignal_b = 1,
IfxCcu6_TimerInputSignal_c = 2,
IfxCcu6_TimerInputSignal_d = 3,
IfxCcu6_TimerInputSignal_e = 0,
IfxCcu6_TimerInputSignal_f = 1,
IfxCcu6_TimerInputSignal_g = 2,
IfxCcu6_TimerInputSignal_h = 3
}
Selection of actual input signal for the timer inputs. More...
enum IfxCcu6_TimerRunStatus {
IfxCcu6_TimerRunStatus_stopped = 0,
IfxCcu6_TimerRunStatus_running = 1
}
Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R. More...
enum IfxCcu6_TrapMode {
IfxCcu6_TrapMode_automatic = 0,
IfxCcu6_TrapMode_manual = 1
}
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2. More...
enum IfxCcu6_TrapState {
IfxCcu6_TrapState_t12Sync = 0,
IfxCcu6_TrapState_t13Sync = 1,
IfxCcu6_TrapState_immediate = 3
}
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1) More...

Detailed Description

Enumeration Type Documentation

◆ IfxCcu6_CaptureCompareInput

enum IfxCcu6_CaptureCompareInput

Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0.

Enumerator
IfxCcu6_CaptureCompareInput_cC60 | CC60 capture input.
IfxCcu6_CaptureCompareInput_cC61 | CC61 capture input.
IfxCcu6_CaptureCompareInput_cC62 | CC62 capture input.
IfxCcu6_CaptureCompareInput_cTRAP | CTRAP input.
IfxCcu6_CaptureCompareInput_cCPOS0 | CCPOS0 input.
IfxCcu6_CaptureCompareInput_cCPOS1 | CCPOS1 input.
IfxCcu6_CaptureCompareInput_cCPOS2 | CCPOS2 input.

Definition at line 61 of file IfxCcu6.h.

◆ IfxCcu6_CaptureCompareInputSignal

enum IfxCcu6_CaptureCompareInputSignal

Selection of actual input signal for the capture compare inputs.

Enumerator
IfxCcu6_CaptureCompareInputSignal_a | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_b | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_c | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_CaptureCompareInputSignal_d | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.

Definition at line 74 of file IfxCcu6.h.

◆ IfxCcu6_CaptureCompareState

enum IfxCcu6_CaptureCompareState

capture/compare state to set / clear the CC6xST-bits

Enumerator
IfxCcu6_CaptureCompareState_set | Bit CC6xST is set.
IfxCcu6_CaptureCompareState_clear | Bit CC6xST is cleared.
IfxCcu6_CaptureCompareState_toggle | Bit CC6xST is toggled.

Definition at line 84 of file IfxCcu6.h.

◆ IfxCcu6_ChannelOut

enum IfxCcu6_ChannelOut

Capture compare output pins.

Enumerator
IfxCcu6_ChannelOut_cc0 | CC60 compare output CC0.
IfxCcu6_ChannelOut_cout0 | CC60 compare output COUT0.
IfxCcu6_ChannelOut_cc1 | CC61 compare output CC1.
IfxCcu6_ChannelOut_cout1 | CC61 compare output COUT1.
IfxCcu6_ChannelOut_cc2 | CC62 compare output CC2.
IfxCcu6_ChannelOut_cout2 | CC62 compare output COUT2.
IfxCcu6_ChannelOut_cout3 | CC63 compare output COUT3.

Definition at line 93 of file IfxCcu6.h.

◆ IfxCcu6_CountingInputMode

enum IfxCcu6_CountingInputMode

Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13.

Enumerator
IfxCcu6_CountingInputMode_internal | The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account.
IfxCcu6_CountingInputMode_manual | Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account.
IfxCcu6_CountingInputMode_externalRising | The timer T1x is counting each rising edge detected in the selected T1xHR signal.
IfxCcu6_CountingInputMode_externalFalling | The timer T1x is counting each falling edge detected in the selected T1xHR signal.

Definition at line 107 of file IfxCcu6.h.

◆ IfxCcu6_DelayBypass

enum IfxCcu6_DelayBypass

Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP.

Enumerator
IfxCcu6_DelayBypass_notActive | Dead-Time Counter 0 is generating a delay after the source signal becomes active.
IfxCcu6_DelayBypass_active | Dead-Time Counter 0 is not used for a delay.

Definition at line 122 of file IfxCcu6.h.

◆ IfxCcu6_ExternalTriggerMode

enum IfxCcu6_ExternalTriggerMode

Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL.

Enumerator
IfxCcu6_ExternalTriggerMode_disable | The external setting of T1xR is disabled.
IfxCcu6_ExternalTriggerMode_risingEdge | Bit T1xR is set if a rising edge of signal T1xHR is detected.
IfxCcu6_ExternalTriggerMode_fallingEdge | Bit T1xR is set if a falling edge of signal T1xHR is detected.
IfxCcu6_ExternalTriggerMode_anyEdge | Bit T1xR is set if an edge of signal T1xHR is detected.

Definition at line 132 of file IfxCcu6.h.

◆ IfxCcu6_HallSensorTriggerMode

enum IfxCcu6_HallSensorTriggerMode

Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC.

Enumerator
IfxCcu6_HallSensorTriggerMode_permanentCheck | Any edge at any of the inputs CCPOSx, independent from any PWM signal.
IfxCcu6_HallSensorTriggerMode_cM63 | A T13 Compare-Match.
IfxCcu6_HallSensorTriggerMode_t13PM | A T13 Period-Match.
IfxCcu6_HallSensorTriggerMode_off | Hall sampling triggered by HW sources is switched off.
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp | A T12 Period-Match while counting up (T12_PM and CDIR = 0)
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown | A T12 One-Match while counting down (T12_PM and CDIR = 1)
IfxCcu6_HallSensorTriggerMode_cM61CountingUp | A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0)
IfxCcu6_HallSensorTriggerMode_cM61CountingDown | A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1)

Definition at line 146 of file IfxCcu6.h.

◆ IfxCcu6_InterruptSource

enum IfxCcu6_InterruptSource

Interrupt source selection Description in Ifx_CCU.IEN.

Enumerator
IfxCcu6_InterruptSource_cc60RisingEdge | Capture compare match rising edge interrupt enable for channel CC60.
IfxCcu6_InterruptSource_cc60FallingEdge | Capture compare match falling edge interrupt enable for channel CC60.
IfxCcu6_InterruptSource_cc61RisingEdge | Capture compare match rising edge interrupt enable for channel CC61.
IfxCcu6_InterruptSource_cc61FallingEdge | Capture compare match falling edge interrupt enable for channel CC61.
IfxCcu6_InterruptSource_cc62RisingEdge | Capture compare match rising edge interrupt enable for channel CC62.
IfxCcu6_InterruptSource_cc62FallingEdge | Capture compare match falling edge interrupt enable for channel CC62.
IfxCcu6_InterruptSource_t12OneMatch | Interrupt enable for T12 one-match.
IfxCcu6_InterruptSource_t12PeriodMatch | Interrupt enable for T12 period-match.
IfxCcu6_InterruptSource_t13CompareMatch | Interrupt enable for T13 compare-match.
IfxCcu6_InterruptSource_t13PeriodMatch | Interrupt enable for T13 period-match.
IfxCcu6_InterruptSource_trap | Interrupt enable for trap flag.
IfxCcu6_InterruptSource_correctHallEvent | Interrupt enable for correct hall event.
IfxCcu6_InterruptSource_wrongHallEvent | Interrupt enable for wrong hall event.

Definition at line 162 of file IfxCcu6.h.

◆ IfxCcu6_MultiChannelSwitchingSelect

enum IfxCcu6_MultiChannelSwitchingSelect

Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL.

Enumerator
IfxCcu6_MultiChannelSwitchingSelect_noEvent | No trigger request will be generated.
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent | Correct Hall pattern detected (CM_CHE)
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch | T13 period-match detected (while counting up)
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch | T12 one-match (while counting down)
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch | T12 channel 1 compare-match detected (phase delay function)
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch | T12 period match detected (while counting up)

Definition at line 188 of file IfxCcu6.h.

◆ IfxCcu6_MultiChannelSwitchingSync

enum IfxCcu6_MultiChannelSwitchingSync

Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN.

Enumerator
IfxCcu6_MultiChannelSwitchingSync_direct | Direct, the trigger event immediately leads to the shadow transfer.
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch | A T13 zero-match triggers the shadow transfer.
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch | A T12 zero-match (while counting up) triggers the shadow transfer.

Definition at line 202 of file IfxCcu6.h.

◆ IfxCcu6_ServiceRequest

enum IfxCcu6_ServiceRequest

Selection of service request outputs.

Enumerator
IfxCcu6_ServiceRequest_0 | Service request output SR0.
IfxCcu6_ServiceRequest_1 | Service request output SR1.
IfxCcu6_ServiceRequest_2 | Service request output SR2.
IfxCcu6_ServiceRequest_3 | Service request output SR3.

Definition at line 213 of file IfxCcu6.h.

◆ IfxCcu6_SleepMode

enum IfxCcu6_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS.

Enumerator
IfxCcu6_SleepMode_enable | enables sleep mode
IfxCcu6_SleepMode_disable | disables sleep mode

Definition at line 224 of file IfxCcu6.h.

◆ IfxCcu6_SuspendMode

enum IfxCcu6_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxCcu6_SuspendMode_none | No suspend.
IfxCcu6_SuspendMode_hard | Hard Suspend.
IfxCcu6_SuspendMode_soft | Soft Suspend.

Definition at line 232 of file IfxCcu6.h.

◆ IfxCcu6_T12Channel

enum IfxCcu6_T12Channel

Capture compare channel of Timer12.

Enumerator
IfxCcu6_T12Channel_0 | T12 channel CC60.
IfxCcu6_T12Channel_1 | T12 channel CC61.
IfxCcu6_T12Channel_2 | T12 channel CC62.

Definition at line 241 of file IfxCcu6.h.

◆ IfxCcu6_T12ChannelMode

enum IfxCcu6_T12ChannelMode

The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.

Enumerator
IfxCcu6_T12ChannelMode_off | Capture/Compare modes switched off.
IfxCcu6_T12ChannelMode_compareMode | Compare mode.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling | CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising | CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling | CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny | CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_hallSensor | Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programmed to Hall Sensor mode.
IfxCcu6_T12ChannelMode_hysteresisLikecompare | Hysteresis-like compare mode.
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling | CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising | CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising | CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling | CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
IfxCcu6_T12ChannelMode_multiInputCaptureAny | CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR.

Definition at line 250 of file IfxCcu6.h.

◆ IfxCcu6_T12CountDirection

enum IfxCcu6_T12CountDirection

Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR.

Enumerator
IfxCcu6_T12CountDirection_up | Counting up.
IfxCcu6_T12CountDirection_down | Counting down.

Definition at line 271 of file IfxCcu6.h.

◆ IfxCcu6_T12CountMode

enum IfxCcu6_T12CountMode

Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM.

Enumerator
IfxCcu6_T12CountMode_edgeAligned | T12 always counts up and continues counting from zero after reaching the period value.
IfxCcu6_T12CountMode_centerAligned | T12 counts down after detecting a period-match and counts up after detecting a one-match.

Definition at line 280 of file IfxCcu6.h.

◆ IfxCcu6_T13TriggerDirection

enum IfxCcu6_T13TriggerDirection

Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED.

Enumerator
IfxCcu6_T13TriggerDirection_noAction | no action
IfxCcu6_T13TriggerDirection_onT12CountingUp | while T12 is counting up
IfxCcu6_T13TriggerDirection_onT12CountingDown | while T12 is counting down
IfxCcu6_T13TriggerDirection_anyT12 | independent on the count direction of T12

Definition at line 291 of file IfxCcu6.h.

◆ IfxCcu6_T13TriggerEvent

enum IfxCcu6_T13TriggerEvent

Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC.

Enumerator
IfxCcu6_T13TriggerEvent_noAction | no action
IfxCcu6_T13TriggerEvent_onCC60RCompare | set T13R on a T12 compare event on channel 0
IfxCcu6_T13TriggerEvent_onCC61RCompare | set T13R on a T12 compare event on channel 1
IfxCcu6_T13TriggerEvent_onCC62RCompare | set T13R on a T12 compare event on channel 2
IfxCcu6_T13TriggerEvent_onAnyT12Compare | set T13R on any T12 compare event (ch. 0, 1, 2)
IfxCcu6_T13TriggerEvent_onT12Period | set T13R upon a period-match of T12
IfxCcu6_T13TriggerEvent_onT12Zero | set T13R upon a zero-match of T12 (while counting up)
IfxCcu6_T13TriggerEvent_onCCPOSxEdge | set T13R on any edge of inputs CCPOSx

Definition at line 302 of file IfxCcu6.h.

◆ IfxCcu6_TimerId

enum IfxCcu6_TimerId

Timer number ( T12 / T13 )

Enumerator
IfxCcu6_TimerId_t12 | Timer 12.
IfxCcu6_TimerId_t13 | Timer 13.

Definition at line 317 of file IfxCcu6.h.

◆ IfxCcu6_TimerInputClock

enum IfxCcu6_TimerInputClock

Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK.

Enumerator
IfxCcu6_TimerInputClock_fcc6 | fcc6
IfxCcu6_TimerInputClock_fcc6By2 | fcc6 / 2
IfxCcu6_TimerInputClock_fcc6By4 | fcc6 / 4
IfxCcu6_TimerInputClock_fcc6By8 | fcc6 / 8
IfxCcu6_TimerInputClock_fcc6By16 | fcc6 / 16
IfxCcu6_TimerInputClock_fcc6By32 | fcc6 / 32
IfxCcu6_TimerInputClock_fcc6By64 | fcc6 / 64
IfxCcu6_TimerInputClock_fcc6By128 | fcc6 / 128

Definition at line 326 of file IfxCcu6.h.

◆ IfxCcu6_TimerInputSignal

enum IfxCcu6_TimerInputSignal

Selection of actual input signal for the timer inputs.

Enumerator
IfxCcu6_TimerInputSignal_a | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_b | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_c | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_d | defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
IfxCcu6_TimerInputSignal_e | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_f | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_g | defines the input signal used as T1xHR input.
IfxCcu6_TimerInputSignal_h | defines the input signal used as T1xHR input.

Definition at line 340 of file IfxCcu6.h.

◆ IfxCcu6_TimerRunStatus

enum IfxCcu6_TimerRunStatus

Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R.

Enumerator
IfxCcu6_TimerRunStatus_stopped | Timer T1x is stopped.
IfxCcu6_TimerRunStatus_running | Timer T1x is running.

Definition at line 355 of file IfxCcu6.h.

◆ IfxCcu6_TrapMode

enum IfxCcu6_TrapMode

Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2.

Enumerator
IfxCcu6_TrapMode_automatic | Bit TRPF is cleared by HW.
IfxCcu6_TrapMode_manual | Bit TRPF stays 0, It has to be cleared by SW by writing ISR.RTRPF = 1.

Definition at line 364 of file IfxCcu6.h.

◆ IfxCcu6_TrapState

enum IfxCcu6_TrapState

Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1)

Enumerator
IfxCcu6_TrapState_t12Sync | The trap state is left when a zero-match of T12 (while counting up) is detected.
IfxCcu6_TrapState_t13Sync | The trap state is left when a zeromatch of T13 is detected.
IfxCcu6_TrapState_immediate | The trap state is left immediately without any synchronization to T12 or T13.

Definition at line 374 of file IfxCcu6.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxCcu6_clearCounter (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_clearDeadTimeCounters (Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero. More...
IFX_INLINE void | IfxCcu6_clearInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_clearT12OneNotification (Ifx_CCU6 *ccu6)
Clears the T12 One notification. More...
IFX_INLINE void | IfxCcu6_clearT12PeriodNotification (Ifx_CCU6 *ccu6)
Clears the T12 period notification. More...
IFX_INLINE void | IfxCcu6_clearT13CompareNotification (Ifx_CCU6 *ccu6)
Clears the T13 compare notification. More...
IFX_INLINE volatile uint32 * | IfxCcu6_getT12TimerPointer (Ifx_CCU6 *ccu6)
Returns the Timer pointer. More...
IFX_INLINE boolean | IfxCcu6_isModuleEnabled (Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxCcu6_isT12OneNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 one notification. More...
IFX_INLINE boolean | IfxCcu6_isT12PeriodNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 period notification. More...
IFX_INLINE boolean | IfxCcu6_isT13CompareNotification (Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification. More...
IFX_INLINE void | IfxCcu6_setCountingInputMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13). More...
IFX_INLINE void | IfxCcu6_setCurrentHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setDeadTimeValue (Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (dead time) More...
IFX_INLINE void | IfxCcu6_setExpectedHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setExternalRunMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW. More...
IFX_INLINE void | IfxCcu6_setHallSensorTriggerMode (Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields. More...
IFX_INLINE void | IfxCcu6_setInputClockFrequency (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13) More...
IFX_INLINE void | IfxCcu6_setInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_setMultiChannelPwmPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingMode (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP. More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingSync (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1. More...
IFX_INLINE void | IfxCcu6_setOutputPassiveState (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state. More...
IFX_INLINE void | IfxCcu6_setSingleShotModeEnable (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_setT12ChannelMode (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels. More...
IFX_INLINE void | IfxCcu6_setT12CountMode (Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
IFX_INLINE void | IfxCcu6_setT12CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12. More...
IFX_INLINE void | IfxCcu6_setT12PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13CompareValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setT13CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13. More...
IFX_INLINE void | IfxCcu6_setT13PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventDirection (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventMode (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals) More...
IFX_INLINE void | IfxCcu6_setTrapMode (Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid. More...
IFX_INLINE void | IfxCcu6_setTrapState (Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again. More...
IFX_INLINE void | IfxCcu6_startTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_stopTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_updateHallPattern (Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write. More...
IFX_EXTERN void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
IFX_EXTERN void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
IFX_EXTERN void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
IFX_EXTERN void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
IFX_EXTERN void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
IFX_EXTERN float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_EXTERN void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
IFX_EXTERN float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...

Detailed Description

Function Documentation

◆ IfxCcu6_clearCounter()

IFX_INLINE void IfxCcu6_clearCounter | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Clears the counters of the Timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1385 of file IfxCcu6.h.

◆ IfxCcu6_clearDeadTimeCounters()

IFX_INLINE void IfxCcu6_clearDeadTimeCounters ( Ifx_CCU6 * ccu6 )

Clears all the three dead-time counter channels to zero.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1395 of file IfxCcu6.h.

◆ IfxCcu6_clearInterruptStatusFlag()

IFX_INLINE void IfxCcu6_clearInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Clears the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1401 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_clearT12OneNotification()

IFX_INLINE void IfxCcu6_clearT12OneNotification ( Ifx_CCU6 * ccu6 )

Clears the T12 One notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1408 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq().

◆ IfxCcu6_clearT12PeriodNotification()

IFX_INLINE void IfxCcu6_clearT12PeriodNotification ( Ifx_CCU6 * ccu6 )

Clears the T12 period notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1414 of file IfxCcu6.h.

◆ IfxCcu6_clearT13CompareNotification()

IFX_INLINE void IfxCcu6_clearT13CompareNotification ( Ifx_CCU6 * ccu6 )

Clears the T13 compare notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1420 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq().

◆ IfxCcu6_connectTrigger()

IFX_EXTERN void IfxCcu6_connectTrigger | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrigOut | outputLine,
 |  | IfxCcu6_TrigSel | selectedTrigger
 | ) |  |
Parameters
ccu6 | Specifies Ccu6 module
outputLine | Output Line
selectedTrigger | Trigger selection
Returns
None

Definition at line 36 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getT12TimerPointer()

IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer ( Ifx_CCU6 * ccu6 )

Returns the Timer pointer.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Timer pointer

Definition at line 1686 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_getPointer().

◆ IfxCcu6_isModuleEnabled()

IFX_INLINE boolean IfxCcu6_isModuleEnabled ( Ifx_CCU6 * ccu6 )

Returns the status of module enabled or disabled.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1897 of file IfxCcu6.h.

Referenced by IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_isT12OneNotification()

IFX_INLINE boolean IfxCcu6_isT12OneNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T12 one notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1915 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq().

◆ IfxCcu6_isT12PeriodNotification()

IFX_INLINE boolean IfxCcu6_isT12PeriodNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T12 period notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1921 of file IfxCcu6.h.

◆ IfxCcu6_isT13CompareNotification()

IFX_INLINE boolean IfxCcu6_isT13CompareNotification ( Ifx_CCU6 * ccu6 )

Returns the status of T13 compare notification.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1927 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq().

◆ IfxCcu6_routeInterruptNode()

IFX_EXTERN void IfxCcu6_routeInterruptNode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source,
 |  | IfxCcu6_ServiceRequest | serviceRequest
 | ) |  |

Routes the interrupt node pointer to the selected service requests.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
serviceRequest | Selection of service request outputs
Returns
None

Definition at line 266 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setCountingInputMode()

IFX_INLINE void IfxCcu6_setCountingInputMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_CountingInputMode | mode
 | ) |  |

Sets the input event leading to a counting action of Timers (T12 / T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
mode | Input event leading to a counting action of the timer (T12 / T13)
Returns
None

Definition at line 1941 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setCurrentHallPattern()

IFX_INLINE void IfxCcu6_setCurrentHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the current hall pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Current hall pattern
Returns
None

Definition at line 1949 of file IfxCcu6.h.

◆ IfxCcu6_setDeadTimeValue()

IFX_INLINE void IfxCcu6_setDeadTimeValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | value
 | ) |  |

Sets the delay between switching from the passive state to the active state of the selected outputs (dead time)

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Value of the dead time to be induced
Returns
None

Definition at line 1955 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setDeadtime(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setExpectedHallPattern()

IFX_INLINE void IfxCcu6_setExpectedHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the expected hall pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Expected hall pattern
Returns
None

Definition at line 1961 of file IfxCcu6.h.

◆ IfxCcu6_setExternalRunMode()

IFX_INLINE void IfxCcu6_setExternalRunMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ExternalTriggerMode | mode
 | ) |  |

Sets the event of signal T1xHR that can set the run bit T1xR by HW.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
mode | External trigger mode
Returns
None

Definition at line 1967 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TPwm_start(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setHallSensorTriggerMode()

IFX_INLINE void IfxCcu6_setHallSensorTriggerMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_HallSensorTriggerMode | mode
 | ) |  |

Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Hall sensor input trigger event
Returns
None

Definition at line 1975 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_setInputClockFrequency()

IFX_INLINE void IfxCcu6_setInputClockFrequency | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_TimerInputClock | frequency
 | ) |  |

Sets the input clock for timers (T12 or T13)

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
frequency | Input clock for timers (T12 or T13)
Returns
None

Definition at line 1983 of file IfxCcu6.h.

Referenced by IfxCcu6_setT12Frequency(), and IfxCcu6_setT13Frequency().

◆ IfxCcu6_setInterruptStatusFlag()

IFX_INLINE void IfxCcu6_setInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Sets the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1991 of file IfxCcu6.h.

◆ IfxCcu6_setMultiChannelPwmPattern()

IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | pattern
 | ) |  |

Sets the output pattern for the multichannel mode (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
pattern | Output pattern for the multichannel mode.
Returns
None

Definition at line 1998 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmHl_setupChannels().

◆ IfxCcu6_setMultiChannelSwitchingMode()

IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_MultiChannelSwitchingSelect | mode
 | ) |  |

Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Trigger request source (next multi-channel event) for the shadow transfer MCM_ST
Returns
None

Definition at line 2004 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_PwmHl_init().

◆ IfxCcu6_setMultiChannelSwitchingSync()

IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_MultiChannelSwitchingSync | sync
 | ) |  |

Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1.

Parameters
ccu6 | Pointer to the base of CCU6 registers
sync | Synchronization mechanism of the shadow transfer event MCM_ST
Returns
None

Definition at line 2010 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_PwmHl_init().

◆ IfxCcu6_setOutputPassiveLevel()

IFX_EXTERN void IfxCcu6_setOutputPassiveLevel | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut,
 |  | boolean | state
 | ) |  |

Sets the passive state level of the PWM outputs of the module.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
state | FALSE: The passive level is 0. TRUE : The passive level is 1.
Returns
None

Definition at line 303 of file IfxCcu6.c.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_setOutputPassiveState()

IFX_INLINE void IfxCcu6_setOutputPassiveState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut,
 |  | boolean | state
 | ) |  |

Sets the state of the corresponding compare channel, that is considered to be the passive state.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
state FALSE: passive state when CC6xST == 0
TRUE : passive state when CC6xST == 1
Returns
None

Definition at line 2016 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setSingleShotModeEnable()

IFX_INLINE void IfxCcu6_setSingleShotModeEnable | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 2024 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_init().

◆ IfxCcu6_setT12CaptureCompareState()

IFX_EXTERN void IfxCcu6_setT12CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | IfxCcu6_CaptureCompareState | state
 | ) |  |

Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
state | capture/compare state selection (set / clear / toggle)
Returns
None

Definition at line 318 of file IfxCcu6.c.

◆ IfxCcu6_setT12ChannelMode()

IFX_INLINE void IfxCcu6_setT12ChannelMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | IfxCcu6_T12ChannelMode | mode
 | ) |  |

Sets the operating mode of the Timer12 capture/compare channels.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
mode | The operating mode for the T12 channels
Returns
None

Definition at line 2054 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CompareValue()

IFX_EXTERN void IfxCcu6_setT12CompareValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit compare value of Timer12 (writes into shadow registers)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
value | Compare value
Returns
None

Definition at line 343 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOnTime(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CounterValue()

IFX_INLINE void IfxCcu6_setT12CounterValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit counter value of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Counter value
Returns
None

Definition at line 2068 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12CountMode()

IFX_INLINE void IfxCcu6_setT12CountMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12CountMode | mode
 | ) |  |
Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Operating mode of Timer 12
Returns
None

Definition at line 2062 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_setT12Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12Frequency()

IFX_EXTERN float32 IfxCcu6_setT12Frequency | ( | Ifx_CCU6 * | ccu6,
 |  | float32 | frequency,
 |  | Ifx_TimerValue | period,
 |  | IfxCcu6_T12CountMode | countMode
 | ) |  |

Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency.

Parameters
ccu6 | Pointer to the base of CCU6 registers
frequency | Requested timer frequency in Hz
period | period value to be configured
countMode | Counting mode of Timer12
Returns
Zero, if the function failed to fulfill requested frequency and resolution
Positive, if the function can find settings close to the requested frequency and resolution above the requested

Definition at line 360 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT12InputSignal()

IFX_EXTERN void IfxCcu6_setT12InputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12hr_In * | extInput
 | ) |  |

selects the actual input signal for the timer inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
extInput | External input signal for the Timer 12
Returns
None

Definition at line 409 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_Icu_startCapture(), IfxCcu6_initT12hrPin(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_setT12PeriodValue()

IFX_INLINE void IfxCcu6_setT12PeriodValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the period value that leads Timer12 counter value to a period-match.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Period value
Returns
None

Definition at line 2074 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_setT12Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_setPeriod(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13CaptureCompareState()

IFX_EXTERN void IfxCcu6_setT13CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_CaptureCompareState | state
 | ) |  |

Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST.

Parameters
ccu6 | Pointer to the base of CCU6 registers
state | capture/compare state selection (set / clear / toggle)
Returns
None

Definition at line 418 of file IfxCcu6.c.

◆ IfxCcu6_setT13CompareValue()

IFX_INLINE void IfxCcu6_setT13CompareValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit compare value of Timer13 (writes into shadow register)

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | Compare value
Returns
None

Definition at line 2080 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13CounterValue()

IFX_INLINE void IfxCcu6_setT13CounterValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the 16-bit counter value of Timer13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | counter value
Returns
None

Definition at line 2086 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13Frequency()

IFX_EXTERN float32 IfxCcu6_setT13Frequency | ( | Ifx_CCU6 * | ccu6,
 |  | float32 | frequency,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency.

Parameters
ccu6 | Pointer to the base of CCU6 registers
frequency | Requested timer frequency in Hz
period | period value to be configured
Returns
Zero, if the function failed to fulfill requested frequency and resolution
Positive, if the function can find settings close to the requested frequency and resolution above the requested
Return values
IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the required frequency

Definition at line 444 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13InputSignal()

IFX_EXTERN void IfxCcu6_setT13InputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13hr_In * | extInput
 | ) |  |

selects the actual input signal for the timer inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
extInput | External input signal for the Timer 13
Returns
None

Definition at line 493 of file IfxCcu6.c.

Referenced by IfxCcu6_initT13hrPin(), IfxCcu6_initT13hrPinWithPadLevel(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_setT13PeriodValue()

IFX_INLINE void IfxCcu6_setT13PeriodValue | ( | Ifx_CCU6 * | ccu6,
 |  | uint16 | value
 | ) |  |

Sets the period value that leads Timer13 counter value to a period-match.

Parameters
ccu6 | Pointer to the base of CCU6 registers
value | period value
Returns
None

Definition at line 2092 of file IfxCcu6.h.

Referenced by IfxCcu6_setT13Frequency(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_setT13TriggerEventDirection()

IFX_INLINE void IfxCcu6_setT13TriggerEventDirection | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13TriggerDirection | direction
 | ) |  |

Sets the Timer13 trigger event direction.

Parameters
ccu6 | Pointer to the base of CCU6 registers
direction | T13 trigger event direction
Returns
None

Definition at line 2098 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setT13TriggerEventMode()

IFX_INLINE void IfxCcu6_setT13TriggerEventMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T13TriggerEvent | mode
 | ) |  |

Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals)

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | The trigger event to start T13
Returns
None

Definition at line 2104 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_setTrapMode()

IFX_INLINE void IfxCcu6_setTrapMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrapMode | mode
 | ) |  |

Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid.

Parameters
ccu6 | Pointer to the base of CCU6 registers
mode | Trap mode selection
Returns
None

Definition at line 2110 of file IfxCcu6.h.

◆ IfxCcu6_setTrapState()

IFX_INLINE void IfxCcu6_setTrapState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TrapState | state
 | ) |  |

Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again.

Parameters
ccu6 | Pointer to the base of CCU6 registers
state | Trap state selection
Returns
None

Definition at line 2116 of file IfxCcu6.h.

◆ IfxCcu6_startTimer()

IFX_INLINE void IfxCcu6_startTimer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

starts the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 start choice (enable / disable)
t13 | Timer13 start choice (enable / disable)
Returns
None

Definition at line 2123 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_TimerWithTrigger_run(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_stopTimer()

IFX_INLINE void IfxCcu6_stopTimer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

starts the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 stop choice (enable / disable)
t13 | Timer13 stop choice (enable / disable)
Returns
None

Definition at line 2133 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStop(), IfxCcu6_TimerWithTrigger_stop(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_updateHallPattern()

IFX_INLINE void IfxCcu6_updateHallPattern | ( | Ifx_CCU6 * | ccu6,
 |  | uint8 | currentHall,
 |  | uint8 | expectedHall,
 |  | uint8 | output
 | ) |  |

Updates the hall pattern (current hall, expected hall, moduleation output), in a single write.

Parameters
ccu6 | Pointer to the base of CCU6 registers
currentHall | Current hall pattern
expectedHall | Expected hall pattern
output | Output pattern for the multichannel mode.
Returns
None

Definition at line 2143 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_updateHallPattern().


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE boolean | IfxCcu6_getDeadTimeStatus (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12. More...
IFX_INLINE boolean | IfxCcu6_getHallPatternSampleState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value. More...
IFX_INLINE boolean | IfxCcu6_getInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag. More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelModeAvailabilityStatus (Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus (Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP. More...
IFX_INLINE boolean | IfxCcu6_getShadowTransferStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status. More...
IFX_INLINE boolean | IfxCcu6_getT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2) More...
IFX_INLINE IfxCcu6_T12CountDirection | IfxCcu6_getT12CountDirection (Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12. More...
IFX_INLINE boolean | IfxCcu6_getT13CaptureCompareState (Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST. More...
IFX_INLINE boolean | IfxCcu6_getTimerAvailabilityStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability More...
IFX_INLINE IfxCcu6_TimerRunStatus | IfxCcu6_getTimerRunStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status. More...
IFX_INLINE boolean | IfxCcu6_isModuleSuspended (Ifx_CCU6 *ccu6)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxCcu6_setSuspendMode (Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IFX_EXTERN IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
IFX_EXTERN uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...

Detailed Description

Function Documentation

◆ IfxCcu6_getAddress()

IFX_EXTERN Ifx_CCU6* IfxCcu6_getAddress ( IfxCcu6_Index ccu6 )

Returns the module index of the selected CCU6 module.

Parameters
ccu6 Pointer to CCU6 module registers
Returns
CCU6 module register address

Definition at line 141 of file IfxCcu6.c.

◆ IfxCcu6_getCaptureRegisterValue()

IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the capture register value of the selected channel.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
current value of the capture register of a selected channel

Definition at line 158 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_getMotorSpeed().

◆ IfxCcu6_getCaptureShadowRegisterValue()

IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the capture shadow register value of the selected channel.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
current value of the capture shadow register of a selected channel

Definition at line 179 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_getTimeStamp(), and IfxCcu6_PwmBc_getMotorSpeed().

◆ IfxCcu6_getDeadTimeStatus()

IFX_INLINE boolean IfxCcu6_getDeadTimeStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status TRUE or FALSE

Definition at line 1630 of file IfxCcu6.h.

◆ IfxCcu6_getHallPatternSampleState()

IFX_INLINE boolean IfxCcu6_getHallPatternSampleState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status
TRUE : The input CCPOSx has been sampled as 0
FALSE : The input CCPOSx has been sampled as 1

Definition at line 1638 of file IfxCcu6.h.

◆ IfxCcu6_getIndex()

IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex ( Ifx_CCU6 * ccu6 )

Returns CCU6 index.

Parameters
ccu6 Specifies the pointer to the base of CCU6 registers
Returns
Returns index. returns -1 in case of unknown index

Definition at line 200 of file IfxCcu6.c.

Referenced by IfxCcu6_getSrcAddress().

◆ IfxCcu6_getInterruptStatusFlag()

IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Gets the status of the selected interrupt flag.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
Status (TRUE / FALSE)

Definition at line 1646 of file IfxCcu6.h.

◆ IfxCcu6_getMultiChannelModeAvailabilityStatus()

IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus ( Ifx_CCU6 * ccu6 )

indicates if the multi-channel mode functionality is available

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status (TRUE / FALSE)

Definition at line 1653 of file IfxCcu6.h.

◆ IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus()

IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus ( Ifx_CCU6 * ccu6 )

Gets the status of the shadow transfer request from MCMPS to MCMP.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status
FALSE: A shadow transfer MCM_ST is not requested
TRUE: A shadow transfer MCM_ST is requested, but has not yet been executed

Definition at line 1659 of file IfxCcu6.h.

◆ IfxCcu6_getShadowTransferStatus()

IFX_INLINE boolean IfxCcu6_getShadowTransferStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the Timer (T12 / T13) shadow transfer enable status.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (TRUE: enable / FALSE: disable)

Definition at line 1665 of file IfxCcu6.h.

◆ IfxCcu6_getSrcAddress()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxCcu6_getSrcAddress | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ServiceRequest | serviceRequest
 | ) |  |

Returns the service request register.

Parameters
ccu6 | Specifies Ccu6 module
serviceRequest | Selection of service request outputs
Returns
The service request register

Definition at line 220 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getT12CaptureCompareState()

IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
Status TRUE or FALSE

Definition at line 1673 of file IfxCcu6.h.

◆ IfxCcu6_getT12CountDirection()

IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection ( Ifx_CCU6 * ccu6 )

Returns the current counting direction of Timer12.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
direction (up / down)

Definition at line 1680 of file IfxCcu6.h.

◆ IfxCcu6_getT13CaptureCompareState()

IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState ( Ifx_CCU6 * ccu6 )

Returns the state of the Timer13 capture/compare channel CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
Status TRUE or FALSE

Definition at line 1692 of file IfxCcu6.h.

◆ IfxCcu6_getTimerAvailabilityStatus()

IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

indicates the Timer blocks (T12 / T13) availability

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (TRUE / FALSE)

Definition at line 1698 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_getTimerRunStatus()

IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the Timer (T12 / T13) run status.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
Status (stopped / running)

Definition at line 1705 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture().

◆ IfxCcu6_isModuleSuspended()

IFX_INLINE boolean IfxCcu6_isModuleSuspended ( Ifx_CCU6 * ccu6 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
ccu6 Pointer to CCU6 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1903 of file IfxCcu6.h.

◆ IfxCcu6_readTimer()

IFX_EXTERN uint32 IfxCcu6_readTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Returns the current value of the timer register.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
current value of the timer register

Definition at line 230 of file IfxCcu6.c.

◆ IfxCcu6_setSuspendMode()

IFX_INLINE void IfxCcu6_setSuspendMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
ccu6 | Pointer to CCU6 module registers
mode | Module suspend mode
Returns
None

Definition at line 2043 of file IfxCcu6.h.


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxCcu6_clearAllInterruptStatusFlags (Ifx_CCU6 *ccu6)
Clears all Interrupt flags. More...
IFX_INLINE void | IfxCcu6_disableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_disableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_disableDelayBypass (Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) More...
IFX_INLINE void | IfxCcu6_disableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_disableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored. More...
IFX_INLINE void | IfxCcu6_disableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_disableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_disableT13InvertedModulation (Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_disableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored. More...
IFX_INLINE void | IfxCcu6_disableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_disableTrapPin (Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_enableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_enableCountEvent (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13). More...
IFX_INLINE void | IfxCcu6_enableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_enableDelayBypass (Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0. More...
IFX_INLINE void | IfxCcu6_enableHallPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS. More...
IFX_INLINE void | IfxCcu6_enableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelModeAvailability (Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelPwmPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected. More...
IFX_INLINE void | IfxCcu6_enableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_enableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_enableT13InvertedModulation (Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_enableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed. More...
IFX_INLINE void | IfxCcu6_enableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_enableTrapPin (Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_setCaptureCompareInputSignal (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs. More...
IFX_EXTERN void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
IFX_EXTERN void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...

Detailed Description

Function Documentation

◆ IfxCcu6_clearAllInterruptStatusFlags()

IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags ( Ifx_CCU6 * ccu6 )

Clears all Interrupt flags.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1379 of file IfxCcu6.h.

◆ IfxCcu6_disableAdditionalPrescaler()

IFX_INLINE void IfxCcu6_disableAdditionalPrescaler | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1426 of file IfxCcu6.h.

◆ IfxCcu6_disableDeadTime()

IFX_INLINE void IfxCcu6_disableDeadTime | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Disables the dead time generation for each compare channel (0, 1, 2) of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
None

Definition at line 1434 of file IfxCcu6.h.

◆ IfxCcu6_disableDelayBypass()

IFX_INLINE void IfxCcu6_disableDelayBypass ( Ifx_CCU6 * ccu6 )

Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1442 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_disableInterrupt()

IFX_INLINE void IfxCcu6_disableInterrupt | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Disables the selected interrupt.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1448 of file IfxCcu6.h.

◆ IfxCcu6_disableModulationOutput()

IFX_EXTERN void IfxCcu6_disableModulationOutput | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
channelOut | Capture compare output selection
Returns
None

Definition at line 53 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_stop(), IfxCcu6_TPwm_pause(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_disableModule()

IFX_EXTERN void IfxCcu6_disableModule ( Ifx_CCU6 * ccu6 )

Disables the selected CCU6 kernel.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 84 of file IfxCcu6.c.

◆ IfxCcu6_disableMultiChannelMode()

IFX_INLINE void IfxCcu6_disableMultiChannelMode ( Ifx_CCU6 * ccu6 )

Sets multi channel mode unavailable, A write access to MCMOUTS is ignored.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1455 of file IfxCcu6.h.

◆ IfxCcu6_disableShadowTransfer()

IFX_INLINE void IfxCcu6_disableShadowTransfer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Disables shadow transfers of the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1461 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_stop(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStop(), and IfxCcu6_TPwm_stop().

◆ IfxCcu6_disableSingleShotMode()

IFX_INLINE void IfxCcu6_disableSingleShotMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Disables the single shot-mode of Timers (T12 T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1471 of file IfxCcu6.h.

Referenced by IfxCcu6_TimerWithTrigger_setSingleMode().

◆ IfxCcu6_disableT13InvertedModulation()

IFX_INLINE void IfxCcu6_disableT13InvertedModulation ( Ifx_CCU6 * ccu6 )

Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1478 of file IfxCcu6.h.

◆ IfxCcu6_disableTimer()

IFX_INLINE void IfxCcu6_disableTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Sets Timer12 block unavailable, A write access to T12PR is ignored.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1484 of file IfxCcu6.h.

◆ IfxCcu6_disableTrap()

IFX_INLINE void IfxCcu6_disableTrap | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Disables the trap functionality for the corresponding output signals.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
Returns
None

Definition at line 1491 of file IfxCcu6.h.

◆ IfxCcu6_disableTrapPin()

IFX_INLINE void IfxCcu6_disableTrapPin ( Ifx_CCU6 * ccu6 )

Disables the input (pin) function for the trap generation.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1499 of file IfxCcu6.h.

◆ IfxCcu6_enableAdditionalPrescaler()

IFX_INLINE void IfxCcu6_enableAdditionalPrescaler | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1505 of file IfxCcu6.h.

Referenced by IfxCcu6_setT12Frequency(), and IfxCcu6_setT13Frequency().

◆ IfxCcu6_enableCountEvent()

IFX_INLINE void IfxCcu6_enableCountEvent | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Sets the single shot-mode of Timers (T12, T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1513 of file IfxCcu6.h.

Referenced by IfxCcu6_Timer_countOneStep().

◆ IfxCcu6_enableDeadTime()

IFX_INLINE void IfxCcu6_enableDeadTime | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_T12Channel | channel
 | ) |  |

Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channel | Timer12 Capture compare channel number
Returns
None

Definition at line 1523 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableDelayBypass()

IFX_INLINE void IfxCcu6_enableDelayBypass ( Ifx_CCU6 * ccu6 )

Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1531 of file IfxCcu6.h.

◆ IfxCcu6_enableHallPatternShadowTransfer()

IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer ( Ifx_CCU6 * ccu6 )

Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1537 of file IfxCcu6.h.

◆ IfxCcu6_enableInterrupt()

IFX_INLINE void IfxCcu6_enableInterrupt | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_InterruptSource | source
 | ) |  |

Enables the selected interrupt.

Parameters
ccu6 | Pointer to the base of CCU6 registers
source | Interrupt source selection
Returns
None

Definition at line 1543 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableModulationOutput()

IFX_EXTERN void IfxCcu6_enableModulationOutput | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
channelOut | Capture compare output selection
Returns
None

Definition at line 97 of file IfxCcu6.c.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), and IfxCcu6_TPwm_resume().

◆ IfxCcu6_enableModule()

IFX_EXTERN void IfxCcu6_enableModule ( Ifx_CCU6 * ccu6 )

Enables the selected CCU6 kernel.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 128 of file IfxCcu6.c.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableMultiChannelMode()

IFX_INLINE void IfxCcu6_enableMultiChannelMode ( Ifx_CCU6 * ccu6 )

Sets multi channel mode available, A write access to MCMOUTS is executed.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1550 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelModeAvailability()

IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability ( Ifx_CCU6 * ccu6 )

Enables the Multi Channel Mode Availability.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1556 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelPwmPatternShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer ( Ifx_CCU6 * ccu6 )

Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1562 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1568 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1574 of file IfxCcu6.h.

◆ IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer()

IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer ( Ifx_CCU6 * ccu6 )

Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1580 of file IfxCcu6.h.

◆ IfxCcu6_enableShadowTransfer()

IFX_INLINE void IfxCcu6_enableShadowTransfer | ( | Ifx_CCU6 * | ccu6,
 |  | boolean | t12,
 |  | boolean | t13
 | ) |  |

Enables shadow transfers of the timers (T12, T13 individually or together based on the selection)

Parameters
ccu6 | Pointer to the base of CCU6 registers
t12 | Timer12 choice (enable / disable)
t13 | Timer13 choice (enable / disable)
Returns
None

Definition at line 1586 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_start(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_TimerWithTrigger_applyUpdate(), and IfxCcu6_TPwm_start().

◆ IfxCcu6_enableSingleShotMode()

IFX_INLINE void IfxCcu6_enableSingleShotMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Enables the single shot-mode of Timers (T12 T13).

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1596 of file IfxCcu6.h.

Referenced by IfxCcu6_Timer_startSingleShotMode(), and IfxCcu6_TimerWithTrigger_setSingleMode().

◆ IfxCcu6_enableT13InvertedModulation()

IFX_INLINE void IfxCcu6_enableT13InvertedModulation ( Ifx_CCU6 * ccu6 )

Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1603 of file IfxCcu6.h.

◆ IfxCcu6_enableTimer()

IFX_INLINE void IfxCcu6_enableTimer | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_TimerId | timer
 | ) |  |

Sets Timer12 block available, A write access to T12PR is executed.

Parameters
ccu6 | Pointer to the base of CCU6 registers
timer | Timer selection, ( Timer12 / Timer13 )
Returns
None

Definition at line 1609 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initModule(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_enableTrap()

IFX_INLINE void IfxCcu6_enableTrap | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_ChannelOut | channelOut
 | ) |  |

Enables the trap functionality for the corresponding output signals.

Parameters
ccu6 | Pointer to the base of CCU6 registers
channelOut | Capture compare output selection
Returns
None

Definition at line 1616 of file IfxCcu6.h.

◆ IfxCcu6_enableTrapPin()

IFX_INLINE void IfxCcu6_enableTrapPin ( Ifx_CCU6 * ccu6 )

Enables the input (pin) function for the trap generation.

Parameters
ccu6 Pointer to the base of CCU6 registers
Returns
None

Definition at line 1624 of file IfxCcu6.h.

◆ IfxCcu6_setCaptureCompareInputSignal()

IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_CaptureCompareInput | input,
 |  | IfxCcu6_CaptureCompareInputSignal | signal
 | ) |  |

selects the actual input signal for the capture compare inputs.

Parameters
ccu6 | Pointer to the base of CCU6 registers
input | Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
signal | selection of actual input signal for the module inputs
Returns
None

Definition at line 1933 of file IfxCcu6.h.

Referenced by IfxCcu6_initCc60InPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc61InPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc62InPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCcpos0Pin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1Pin(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2Pin(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCtrapPin(), and IfxCcu6_initCtrapPinWithPadLevel().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » CCU6 » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxCcu6_initCc60InPin (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin. More...
IFX_INLINE void | IfxCcu6_initCc60OutPin (const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin. More...
IFX_INLINE void | IfxCcu6_initCc61InPin (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin. More...
IFX_INLINE void | IfxCcu6_initCc61OutPin (const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin. More...
IFX_INLINE void | IfxCcu6_initCc62InPin (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin. More...
IFX_INLINE void | IfxCcu6_initCc62OutPin (const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin. More...
IFX_INLINE void | IfxCcu6_initCcpos0Pin (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos1Pin (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos2Pin (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCout60Pin (const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin. More...
IFX_INLINE void | IfxCcu6_initCout61Pin (const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin. More...
IFX_INLINE void | IfxCcu6_initCout62Pin (const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin. More...
IFX_INLINE void | IfxCcu6_initCout63Pin (const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin. More...
IFX_INLINE void | IfxCcu6_initCtrapPin (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin. More...
IFX_INLINE void | IfxCcu6_initT12hrPin (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin. More...
IFX_INLINE void | IfxCcu6_initT13hrPin (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin. More...

Detailed Description

Function Documentation

◆ IfxCcu6_initCc60InPin()

IFX_INLINE void IfxCcu6_initCc60InPin | ( | const IfxCcu6_Cc60in_In * | cc60In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC60 input pin.

Parameters
cc60In | CC60 capture input CC60IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1713 of file IfxCcu6.h.

◆ IfxCcu6_initCc60OutPin()

IFX_INLINE void IfxCcu6_initCc60OutPin | ( | const IfxCcu6_Cc60_Out * | cc60Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC60 output pin.

Parameters
cc60Out | CC60 compare output CC0
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1728 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCc61InPin()

IFX_INLINE void IfxCcu6_initCc61InPin | ( | const IfxCcu6_Cc61in_In * | cc61In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC61 input pin.

Parameters
cc61In | CC61 capture input CC61IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1735 of file IfxCcu6.h.

◆ IfxCcu6_initCc61OutPin()

IFX_INLINE void IfxCcu6_initCc61OutPin | ( | const IfxCcu6_Cc61_Out * | cc61Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC61 output pin.

Parameters
cc61Out | CC61 compare output CC1
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1750 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCc62InPin()

IFX_INLINE void IfxCcu6_initCc62InPin | ( | const IfxCcu6_Cc62in_In * | cc62In,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CC62 input pin.

Parameters
cc62In | CC62 capture input CC62IN
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1757 of file IfxCcu6.h.

◆ IfxCcu6_initCc62OutPin()

IFX_INLINE void IfxCcu6_initCc62OutPin | ( | const IfxCcu6_Cc62_Out * | cc62Out,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a CC62 output pin.

Parameters
cc62Out | CC62 compare output CC2
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1772 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCcpos0Pin()

IFX_INLINE void IfxCcu6_initCcpos0Pin | ( | const IfxCcu6_Ccpos0_In * | ccpos0,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS0 input pin.

Parameters
ccpos0 | CC60 capture input CCPOS0
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1779 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCcpos1Pin()

IFX_INLINE void IfxCcu6_initCcpos1Pin | ( | const IfxCcu6_Ccpos1_In * | ccpos1,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS1 input pin.

Parameters
ccpos1 | CC61 capture input CCPOS1
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1794 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCcpos2Pin()

IFX_INLINE void IfxCcu6_initCcpos2Pin | ( | const IfxCcu6_Ccpos2_In * | ccpos2,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CCPOS0 input pin.

Parameters
ccpos2 | CC62 capture input CCPOS2
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1809 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_initCout60Pin()

IFX_INLINE void IfxCcu6_initCout60Pin | ( | const IfxCcu6_Cout60_Out * | cout60,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT60 output pin.

Parameters
cout60 | CC60 compare output COUT0
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1824 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout61Pin()

IFX_INLINE void IfxCcu6_initCout61Pin | ( | const IfxCcu6_Cout61_Out * | cout61,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT61 output pin.

Parameters
cout61 | CC61 compare output COUT1
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1831 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout62Pin()

IFX_INLINE void IfxCcu6_initCout62Pin | ( | const IfxCcu6_Cout62_Out * | cout62,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT62 output pin.

Parameters
cout62 | CC62 compare output COUT2
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1838 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_setOutputPins(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCout63Pin()

IFX_INLINE void IfxCcu6_initCout63Pin | ( | const IfxCcu6_Cout63_Out * | cout63,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initialises a COUT63 output pin.

Parameters
cout63 | CC63 compare output COUT3
outputMode | The pin output mode which should be configured
padDriver | The pad driver mode which should be configured
Returns
None

Definition at line 1845 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initCtrapPin()

IFX_INLINE void IfxCcu6_initCtrapPin | ( | const IfxCcu6_Ctrap_In * | ctrap,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a CTRAP input pin.

Parameters
ctrap | CTRAP input
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1852 of file IfxCcu6.h.

◆ IfxCcu6_initT12hrPin()

IFX_INLINE void IfxCcu6_initT12hrPin | ( | const IfxCcu6_T12hr_In * | t12hrIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a T12HR input pin.

Parameters
t12hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1867 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().

◆ IfxCcu6_initT13hrPin()

IFX_INLINE void IfxCcu6_initT13hrPin | ( | const IfxCcu6_T13hr_In * | t13hrIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises a T13HR input pin.

Parameters
t13hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
Returns
None

Definition at line 1882 of file IfxCcu6.h.

Referenced by IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), and IfxCcu6_TPwm_initModule().


iLLD_TC26B: CCU6 Pin Mapping

Data Structures | Macros | Variables
CCU6 Pin Mapping
iLLD » CCU6
Collaboration diagram for CCU6 Pin Mapping:

Data Structures

struct | IfxCcu6_Cc60in_In
CC60IN pin mapping structure. More...
struct | IfxCcu6_Cc61in_In
CC61IN pin mapping structure. More...
struct | IfxCcu6_Cc62in_In
CC62IN pin mapping structure. More...
struct | IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure. More...
struct | IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure. More...
struct | IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure. More...
struct | IfxCcu6_Ctrap_In
CTRAP pin mapping structure. More...
struct | IfxCcu6_T12hr_In
T12HR pin mapping structure. More...
struct | IfxCcu6_T13hr_In
T13HR pin mapping structure. More...
struct | IfxCcu6_Cc60_Out
CC60 pin mapping structure. More...
struct | IfxCcu6_Cc61_Out
CC61 pin mapping structure. More...
struct | IfxCcu6_Cc62_Out
CC62 pin mapping structure. More...
struct | IfxCcu6_Cout60_Out
COUT60 pin mapping structure. More...
struct | IfxCcu6_Cout61_Out
COUT61 pin mapping structure. More...
struct | IfxCcu6_Cout62_Out
COUT62 pin mapping structure. More...
struct | IfxCcu6_Cout63_Out
COUT63 pin mapping structure. More...

Macros

#define | IFXCCU6_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Variables

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
CCU60_CC60INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
CCU60_CC60INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
CCU60_CC60INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
CCU61_CC60INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
CCU61_CC60INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
CCU61_CC60INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
CCU60_CC61INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
CCU60_CC61INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
CCU60_CC61INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
CCU61_CC61INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
CCU61_CC61INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
CCU61_CC61INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
CCU60_CC62INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
CCU60_CC62INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
CCU60_CC62INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
CCU61_CC62INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
CCU61_CC62INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
CCU61_CC62INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
CCU60_CCPOS0A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
CCU60_CCPOS0C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
CCU60_CCPOS0D: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
CCU61_CCPOS0A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
CCU61_CCPOS0C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
CCU60_CCPOS1A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
CCU60_CCPOS1B: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
CCU60_CCPOS1C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
CCU60_CCPOS1D: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
CCU61_CCPOS1A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
CCU61_CCPOS1B: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
CCU61_CCPOS1C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
CCU61_CCPOS1D: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
CCU60_CCPOS2A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
CCU60_CCPOS2B: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
CCU60_CCPOS2C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
CCU61_CCPOS2A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
CCU61_CCPOS2B: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
CCU61_CCPOS2C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
CCU61_CCPOS2D: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
CCU60_CTRAPA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
CCU61_CTRAPA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
CCU61_CTRAPC: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
CCU60_T12HRB: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
CCU60_T12HRC: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
CCU60_T12HRE: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
CCU61_T12HRB: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
CCU61_T12HRC: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
CCU61_T12HRE: CCU61 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
CCU60_T13HRB: CCU60 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
CCU60_T13HRC: CCU60 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
CCU61_T13HRB: CCU61 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
CCU61_T13HRC: CCU61 input. More...
IFX_EXTERN const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table. More...
IFX_EXTERN const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table. More...
IFX_EXTERN const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table. More...
IFX_EXTERN const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table. More...
IFX_EXTERN const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table. More...
IFX_EXTERN const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table. More...
IFX_EXTERN const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table. More...
IFX_EXTERN const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table. More...
IFX_EXTERN const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table. More...
IFX_EXTERN const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table. More...
IFX_EXTERN const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table. More...
IFX_EXTERN const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table. More...
IFX_EXTERN const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Cc60in_In

struct IfxCcu6_Cc60in_In

CC60IN pin mapping structure.

Definition at line 39 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc60in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc61in_In

struct IfxCcu6_Cc61in_In

CC61IN pin mapping structure.

Definition at line 47 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc61in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc62in_In

struct IfxCcu6_Cc62in_In

CC62IN pin mapping structure.

Definition at line 55 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc62in_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos0_In

struct IfxCcu6_Ccpos0_In

CCPOS0 pin mapping structure.

Definition at line 63 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos0_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos1_In

struct IfxCcu6_Ccpos1_In

CCPOS1 pin mapping structure.

Definition at line 71 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos1_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ccpos2_In

struct IfxCcu6_Ccpos2_In

CCPOS2 pin mapping structure.

Definition at line 79 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ccpos2_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Ctrap_In

struct IfxCcu6_Ctrap_In

CTRAP pin mapping structure.

Definition at line 87 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Ctrap_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_T12hr_In

struct IfxCcu6_T12hr_In

T12HR pin mapping structure.

Definition at line 95 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_T12hr_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_T13hr_In

struct IfxCcu6_T13hr_In

T13HR pin mapping structure.

Definition at line 103 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_T13hr_In:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxCcu6_Cc60_Out

struct IfxCcu6_Cc60_Out

CC60 pin mapping structure.

Definition at line 111 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc60_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cc61_Out

struct IfxCcu6_Cc61_Out

CC61 pin mapping structure.

Definition at line 119 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc61_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cc62_Out

struct IfxCcu6_Cc62_Out

CC62 pin mapping structure.

Definition at line 127 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cc62_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout60_Out

struct IfxCcu6_Cout60_Out

COUT60 pin mapping structure.

Definition at line 135 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout60_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout61_Out

struct IfxCcu6_Cout61_Out

COUT61 pin mapping structure.

Definition at line 143 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout61_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout62_Out

struct IfxCcu6_Cout62_Out

COUT62 pin mapping structure.

Definition at line 151 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout62_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxCcu6_Cout63_Out

struct IfxCcu6_Cout63_Out

COUT63 pin mapping structure.

Definition at line 159 of file IfxCcu6_PinMap.h.

Collaboration diagram for IfxCcu6_Cout63_Out:
[legend]
Data Fields
Ifx_CCU6 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4

Definition at line 269 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3

Definition at line 270 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4

Definition at line 271 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3

Definition at line 272 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4

Definition at line 273 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3

Definition at line 274 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4

Definition at line 275 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4

Definition at line 276 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4

Definition at line 277 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3

Definition at line 278 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3

Definition at line 279 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3

Definition at line 280 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS

#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4

Definition at line 281 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3

Definition at line 282 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_NUM_MODULES

#define IFXCCU6_PINMAP_NUM_MODULES 2

Table dimensions.

Definition at line 268 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5

Definition at line 283 of file IfxCcu6_PinMap.h.

◆ IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS

#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Definition at line 284 of file IfxCcu6_PinMap.h.

Variable Documentation

◆ IfxCcu60_CC60_P02_0_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT

CCU60_CC60: CCU60 output.

Definition at line 166 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P02_6_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT

CCU60_CC60: CCU60 output.

Definition at line 167 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P11_12_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT

CCU60_CC60: CCU60 output.

Definition at line 168 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60_P15_6_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT

CCU60_CC60: CCU60 output.

Definition at line 169 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INA_P02_0_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN

CCU60_CC60INA: CCU60 input.

Definition at line 174 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INB_P00_1_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN

CCU60_CC60INB: CCU60 input.

Definition at line 175 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC60INC_P02_6_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN

CCU60_CC60INC: CCU60 input.

Definition at line 176 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P02_2_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT

CCU60_CC61: CCU60 output.

Definition at line 180 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P02_7_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT

CCU60_CC61: CCU60 output.

Definition at line 181 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P11_11_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT

CCU60_CC61: CCU60 output.

Definition at line 182 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61_P15_5_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT

CCU60_CC61: CCU60 output.

Definition at line 183 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INA_P02_2_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN

CCU60_CC61INA: CCU60 input.

Definition at line 188 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INB_P00_3_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN

CCU60_CC61INB: CCU60 input.

Definition at line 189 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC61INC_P02_7_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN

CCU60_CC61INC: CCU60 input.

Definition at line 190 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P02_4_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT

CCU60_CC62: CCU60 output.

Definition at line 194 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P02_8_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT

CCU60_CC62: CCU60 output.

Definition at line 195 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P11_10_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT

CCU60_CC62: CCU60 output.

Definition at line 196 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62_P15_4_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT

CCU60_CC62: CCU60 output.

Definition at line 197 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INA_P02_4_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN

CCU60_CC62INA: CCU60 input.

Definition at line 202 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INB_P00_5_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN

CCU60_CC62INB: CCU60 input.

Definition at line 203 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CC62INC_P02_8_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN

CCU60_CC62INC: CCU60 input.

Definition at line 204 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0A_P02_6_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN

CCU60_CCPOS0A: CCU60 input.

Definition at line 208 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0C_P10_4_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN

CCU60_CCPOS0C: CCU60 input.

Definition at line 209 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS0D_P40_0_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN

CCU60_CCPOS0D: CCU60 input.

Definition at line 210 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1A_P02_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN

CCU60_CCPOS1A: CCU60 input.

Definition at line 213 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1B_P40_1_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN

CCU60_CCPOS1B: CCU60 input.

Definition at line 214 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1C_P10_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN

CCU60_CCPOS1C: CCU60 input.

Definition at line 215 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS1D_P40_2_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN

CCU60_CCPOS1D: CCU60 input.

Definition at line 216 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2A_P02_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN

CCU60_CCPOS2A: CCU60 input.

Definition at line 221 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2B_P40_3_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN

CCU60_CCPOS2B: CCU60 input.

Definition at line 222 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CCPOS2C_P10_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN

CCU60_CCPOS2C: CCU60 input.

Definition at line 223 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P02_1_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT

CCU60_COUT60: CCU60 output.

Definition at line 228 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P11_9_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT

CCU60_COUT60: CCU60 output.

Definition at line 229 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT60_P15_7_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT

CCU60_COUT60: CCU60 output.

Definition at line 230 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P02_3_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT

CCU60_COUT61: CCU60 output.

Definition at line 234 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P11_6_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT

CCU60_COUT61: CCU60 output.

Definition at line 235 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT61_P15_8_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT

CCU60_COUT61: CCU60 output.

Definition at line 236 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P02_5_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT

CCU60_COUT62: CCU60 output.

Definition at line 240 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P11_3_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT

CCU60_COUT62: CCU60 output.

Definition at line 241 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT62_P14_0_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT

CCU60_COUT62: CCU60 output.

Definition at line 242 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P00_0_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT

CCU60_COUT63: CCU60 output.

Definition at line 246 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P11_2_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT

CCU60_COUT63: CCU60 output.

Definition at line 247 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P14_1_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT

CCU60_COUT63: CCU60 output.

Definition at line 248 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_COUT63_P32_4_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT

CCU60_COUT63: CCU60 output.

Definition at line 249 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_CTRAPA_P00_11_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN

CCU60_CTRAPA: CCU60 input.

Definition at line 253 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRB_P00_7_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN

CCU60_T12HRB: CCU60 input.

Definition at line 256 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRC_P00_9_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN

CCU60_T12HRC: CCU60 input.

Definition at line 257 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T12HRE_P00_0_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN

CCU60_T12HRE: CCU60 input.

Definition at line 258 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T13HRB_P00_8_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN

CCU60_T13HRB: CCU60 input.

Definition at line 262 of file IfxCcu6_PinMap.h.

◆ IfxCcu60_T13HRC_P00_9_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN

CCU60_T13HRC: CCU60 input.

Definition at line 263 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P00_1_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT

CCU61_CC60: CCU61 output.

Definition at line 170 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P00_7_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT

CCU61_CC60: CCU61 output.

Definition at line 171 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P20_8_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT

CCU61_CC60: CCU61 output.

Definition at line 172 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60_P33_13_OUT

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT

CCU61_CC60: CCU61 output.

Definition at line 173 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INA_P00_1_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN

CCU61_CC60INA: CCU61 input.

Definition at line 177 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INB_P02_0_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN

CCU61_CC60INB: CCU61 input.

Definition at line 178 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC60INC_P00_7_IN

IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN

CCU61_CC60INC: CCU61 input.

Definition at line 179 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P00_3_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT

CCU61_CC61: CCU61 output.

Definition at line 184 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P00_8_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT

CCU61_CC61: CCU61 output.

Definition at line 185 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P20_9_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT

CCU61_CC61: CCU61 output.

Definition at line 186 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61_P33_11_OUT

IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT

CCU61_CC61: CCU61 output.

Definition at line 187 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INA_P00_3_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN

CCU61_CC61INA: CCU61 input.

Definition at line 191 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INB_P02_2_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN

CCU61_CC61INB: CCU61 input.

Definition at line 192 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC61INC_P00_8_IN

IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN

CCU61_CC61INC: CCU61 input.

Definition at line 193 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P00_5_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT

CCU61_CC62: CCU61 output.

Definition at line 198 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P00_9_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT

CCU61_CC62: CCU61 output.

Definition at line 199 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P20_10_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT

CCU61_CC62: CCU61 output.

Definition at line 200 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62_P33_9_OUT

IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT

CCU61_CC62: CCU61 output.

Definition at line 201 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INA_P00_5_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN

CCU61_CC62INA: CCU61 input.

Definition at line 205 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INB_P02_4_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN

CCU61_CC62INB: CCU61 input.

Definition at line 206 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CC62INC_P00_9_IN

IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN

CCU61_CC62INC: CCU61 input.

Definition at line 207 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS0A_P00_7_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN

CCU61_CCPOS0A: CCU61 input.

Definition at line 211 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS0C_P33_7_IN

IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN

CCU61_CCPOS0C: CCU61 input.

Definition at line 212 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1A_P00_8_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN

CCU61_CCPOS1A: CCU61 input.

Definition at line 217 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1B_P40_6_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN

CCU61_CCPOS1B: CCU61 input.

Definition at line 218 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1C_P33_6_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN

CCU61_CCPOS1C: CCU61 input.

Definition at line 219 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS1D_P40_7_IN

IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN

CCU61_CCPOS1D: CCU61 input.

Definition at line 220 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2A_P00_9_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN

CCU61_CCPOS2A: CCU61 input.

Definition at line 224 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2B_P40_8_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN

CCU61_CCPOS2B: CCU61 input.

Definition at line 225 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2C_P33_5_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN

CCU61_CCPOS2C: CCU61 input.

Definition at line 226 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CCPOS2D_P40_9_IN

IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN

CCU61_CCPOS2D: CCU61 input.

Definition at line 227 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P00_2_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT

CCU61_COUT60: CCU61 output.

Definition at line 231 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P20_11_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT

CCU61_COUT60: CCU61 output.

Definition at line 232 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT60_P33_12_OUT

IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT

CCU61_COUT60: CCU61 output.

Definition at line 233 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P00_4_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT

CCU61_COUT61: CCU61 output.

Definition at line 237 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P20_12_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT

CCU61_COUT61: CCU61 output.

Definition at line 238 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT61_P33_10_OUT

IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT

CCU61_COUT61: CCU61 output.

Definition at line 239 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P00_6_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT

CCU61_COUT62: CCU61 output.

Definition at line 243 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P20_13_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT

CCU61_COUT62: CCU61 output.

Definition at line 244 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT62_P33_8_OUT

IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT

CCU61_COUT62: CCU61 output.

Definition at line 245 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P00_10_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT

CCU61_COUT63: CCU61 output.

Definition at line 250 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P00_12_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT

CCU61_COUT63: CCU61 output.

Definition at line 251 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_COUT63_P20_7_OUT

IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT

CCU61_COUT63: CCU61 output.

Definition at line 252 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CTRAPA_P00_0_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN

CCU61_CTRAPA: CCU61 input.

Definition at line 254 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_CTRAPC_P33_4_IN

IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN

CCU61_CTRAPC: CCU61 input.

Definition at line 255 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRB_P02_6_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN

CCU61_T12HRB: CCU61 input.

Definition at line 259 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRC_P02_8_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN

CCU61_T12HRC: CCU61 input.

Definition at line 260 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T12HRE_P00_11_IN

IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN

CCU61_T12HRE: CCU61 input.

Definition at line 261 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T13HRB_P02_7_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN

CCU61_T13HRB: CCU61 input.

Definition at line 264 of file IfxCcu6_PinMap.h.

◆ IfxCcu61_T13HRC_P02_8_IN

IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN

CCU61_T13HRC: CCU61 input.

Definition at line 265 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc60_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc60_Out* IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]

IfxCcu6_Cc60_Out table.

Definition at line 288 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc60in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc60in_In* IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]

IfxCcu6_Cc60in_In table.

Definition at line 291 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc61_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc61_Out* IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]

IfxCcu6_Cc61_Out table.

Definition at line 294 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc61in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc61in_In* IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]

IfxCcu6_Cc61in_In table.

Definition at line 297 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc62_Out_pinTable

IFX_EXTERN const IfxCcu6_Cc62_Out* IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]

IfxCcu6_Cc62_Out table.

Definition at line 300 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cc62in_In_pinTable

IFX_EXTERN const IfxCcu6_Cc62in_In* IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]

IfxCcu6_Cc62in_In table.

Definition at line 303 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos0_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos0_In* IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]

IfxCcu6_Ccpos0_In table.

Definition at line 306 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos1_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos1_In* IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]

IfxCcu6_Ccpos1_In table.

Definition at line 309 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ccpos2_In_pinTable

IFX_EXTERN const IfxCcu6_Ccpos2_In* IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]

IfxCcu6_Ccpos2_In table.

Definition at line 312 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout60_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout60_Out* IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]

IfxCcu6_Cout60_Out table.

Definition at line 315 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout61_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout61_Out* IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]

IfxCcu6_Cout61_Out table.

Definition at line 318 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout62_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout62_Out* IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]

IfxCcu6_Cout62_Out table.

Definition at line 321 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Cout63_Out_pinTable

IFX_EXTERN const IfxCcu6_Cout63_Out* IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]

IfxCcu6_Cout63_Out table.

Definition at line 324 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_Ctrap_In_pinTable

IFX_EXTERN const IfxCcu6_Ctrap_In* IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]

IfxCcu6_Ctrap_In table.

Definition at line 327 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_T12hr_In_pinTable

IFX_EXTERN const IfxCcu6_T12hr_In* IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]

IfxCcu6_T12hr_In table.

Definition at line 330 of file IfxCcu6_PinMap.h.

◆ IfxCcu6_T13hr_In_pinTable

IFX_EXTERN const IfxCcu6_T13hr_In* IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]

IfxCcu6_T13hr_In table.

Definition at line 333 of file IfxCcu6_PinMap.h.


iLLD_TC26B: ICU Interface driver

Modules
ICU Interface driver
iLLD » CCU6
Collaboration diagram for ICU Interface driver:

Modules

How to use the CCU6 ICU Interface driver?
Data Structures
Module Initialize Functions
Capture Control Functions
Channel Initialize Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 ICU Interface driver?

How to use the CCU6 ICU Interface driver?
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for How to use the CCU6 ICU Interface driver?:

The ICU interface driver provides a default CCU6 configuration for capturing the input from the selected channel

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/Icu/IfxCcu6_Icu.h>

Variables

Declare the ICU handle and channel handle as global variables in your C code:

// used globally
static IfxCcu6_Icu icu;
static IfxCcu6_IcuChannel icuChannel;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_Icu, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Icu, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module can be initialised in two ways, as a stand alone driver or in conjunction with Timer driver The module initialisation can be done in the same function. Here an example:

// ---- when not using inconjunction with Timer driver ---- //
// create configuration
IfxCcu6_Icu_Config icuConfig;
IfxCcu6_Icu_initModuleConfig(&icuConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
icuConfig.frequency = 400000;
// configure the period of the timer
icuConfig.period = 100;
// configure the clock for internal mode
icuConfig.clock.extClockEnabled = FALSE;
icuConfig.clock.extClockInput = NULL_PTR;
icuConfig.clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure count operation
icuConfig.countMode = IfxCcu6_T12CountMode_edgeAligned;
icuConfig.counterValue = 0;
// initialize the module
IfxCcu6_Icu_initModule(&icu, &icuConfig);
// -------------------------------------------------------- //
// ---- when not using inconjunction with Timer driver ---- //
// after initialising the timer
IfxCcu6_Timer timer;
IfxCcu6_TimerConfig timerConfig;
IfxCcu6_Timer_initModule(&timer, &timerConfig); // e.g. Timer 12 is specified previously in timerConfig.
// -------------------------------------------------------- //
// create Icu channel config
IfxCcu6_Icu_channelConfig icuChannelConfig;
IfxCcu6_Icu_initChannelConfig(&icuChannelConfig, &MODULE_CCU60);
// ---- when using inconjunction with Timer driver ---- //
icuChannelConfig.timer = (Timer*)&timer;
// ---------------------------------------------------- //
// configure the channel
icuChannelConfig.channelNumber = IfxCcu6_T12Channel_0;
icuChannelConfig.channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising;
// configure the interrupts
icuChannelConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc60RisingEdge;
icuChannelConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
icuChannelConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
icuChannelConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// ---- when not using inconjunction with Timer driver ---- //
// configure input and output triggers
icuChannelConfig.trigger.extInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
icuChannelConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
// -------------------------------------------------------- //
// pin configuration, in case of multi input capture mode select the respective CC6xIn and CCPOSxIn pins of the selected channel
const IfxCcu6_Icu_Pins pins = {
IfxCcu60_CC60INA_P02_0_IN, // CC60In pin
NULL, // CC61In pin not used
NULL, // CC62In pin not used
NULL, // CCPOS0In pin not used
NULL, // CCPOS1In pin not used
NULL, // CCPOS2In pin not used
IfxPort_InputMode_pullUp,
IfxPort_InputMode_pullUp
};
IcuConfig.pins = &pins;
// configure multi input capture mode
icuChannelConfig->multiInputCaptureEnabled = FALSE;
// initialize the channel
IfxCcu6_Icu_initChannel(&icuChannel, &icuChannelConfig);

The Icu is ready for use now!

Control

The ICU driver provides simple to use Capture Control functions

This means: you can start and stop the capture process, and you can also get a time stamp at any point of time during the capture process

Start Capture

IfxCcu6_Icu_startCapture(&icuChannel);

Stop Capture

IfxCcu6_Icu_stopCapture(&icuChannel);

Get time stamp at any point of time during the capture process (can also be used in ISR)

// assumed to be declared globally
// uint32 timeStamp[100] = 0;
// store the time stamp in an array
timeStamp[i] = IfxCcu6_Icu_getTimeStamp(&icuChannel);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_Icu_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Icu_Pins
Structure for capture input pins. More...
struct | IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Icu
Module handle. More...
struct | IfxCcu6_Icu_Channel
Channel handle. More...
struct | IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel. More...
struct | IfxCcu6_Icu_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Icu_Clock

struct IfxCcu6_Icu_Clock

Structure for clock configuration.

Definition at line 230 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | countingInputMode | Input event leading to a counting action of the timer T12.
boolean | extClockEnabled | external clock enable / disable selection
IfxCcu6_T12hr_In * | extClockInput | External input signal selection for timer 12.

◆ IfxCcu6_Icu_InterruptConfig

struct IfxCcu6_Icu_InterruptConfig

Structure for interrupt configuration.

Definition at line 239 of file IfxCcu6_Icu.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_Icu_Pins

struct IfxCcu6_Icu_Pins

Structure for capture input pins.

Definition at line 249 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60in_In * | cc60In | CC60 input signal.
IFX_CONST IfxCcu6_Cc61in_In * | cc61In | CC61 input signal.
IFX_CONST IfxCcu6_Cc62in_In * | cc62In | CC62 input signal.
IfxPort_InputMode | cc6xInputMode | The CC6x pin input mode which should be configured.
IFX_CONST IfxCcu6_Ccpos0_In * | ccpos0 | CCPOS0 input signal.
IFX_CONST IfxCcu6_Ccpos1_In * | ccpos1 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Ccpos2_In * | ccpos2 | CCPOS2 input signal.
IfxPort_InputMode | ccposxInputMode | The CCPOSx pin input mode which should be configured.
IfxPort_PadDriver | pinDriver | Pad Driver.
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_Icu_TriggerConfig

struct IfxCcu6_Icu_TriggerConfig

Configuration structure for external triggers.

Definition at line 267 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_TriggerConfig:
[legend]
Data Fields
IfxCcu6_T12hr_In * | extInputTrigger | External input signal selection for timer.
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T12HR that can set the run bit T12R by HW.

◆ IfxCcu6_Icu

struct IfxCcu6_Icu

Module handle.

Definition at line 279 of file IfxCcu6_Icu.h.

Data Fields
float32 | captureFrequency | Configured CCU6 capture frequency ( set to 0 for external counting mode)
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.

◆ IfxCcu6_Icu_Channel

struct IfxCcu6_Icu_Channel

Channel handle.

Definition at line 287 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Channel:
[legend]
Data Fields
Icu | base | Base ICU object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_Icu_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Icu_ChannelConfig

struct IfxCcu6_Icu_ChannelConfig

Configuration structure of the channel.

Definition at line 298 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_ChannelConfig:
[legend]
Data Fields
Icu_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_Icu_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_Icu_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
boolean | multiInputCaptureEnabled | Choice of multi input capture.
IfxCcu6_Icu_Pins * | pins | Structure for capture input pins.
IfxCcu6_Timer | timer | Timer handle.
IfxCcu6_Icu_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Icu_Config

struct IfxCcu6_Icu_Config

Configuration structure of the module.

Definition at line 316 of file IfxCcu6_Icu.h.

Collaboration diagram for IfxCcu6_Icu_Config:
[legend]
Data Fields
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_Icu_Clock | clock | Structure for clock configuration.
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.
float32 | frequency | Specify expected PWM frequency in Hertz.
Ifx_TimerValue | period | PWM period in ticks.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_initModule()

IFX_EXTERN void IfxCcu6_Icu_initModule | ( | IfxCcu6_Icu * | icu,
 |  | const IfxCcu6_Icu_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
icu | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 211 of file IfxCcu6_Icu.c.

◆ IfxCcu6_Icu_initModuleConfig()

IFX_EXTERN void IfxCcu6_Icu_initModuleConfig | ( | IfxCcu6_Icu_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 274 of file IfxCcu6_Icu.c.


iLLD_TC26B: Capture Control Functions

Functions
Capture Control Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Capture Control Functions:

Functions

IFX_EXTERN uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
IFX_EXTERN void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_getTimeStamp()

IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp ( IfxCcu6_Icu_Channel * channel )

Returns the cuurent value stored in the Compare Shadow register (current time stamp)

Parameters
channel Channel handle
Returns
timeStamp (cuurent CC6xSR register value)

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 36 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_Icu_startCapture()

IFX_EXTERN void IfxCcu6_Icu_startCapture ( IfxCcu6_Icu_Channel * channel )

Starts the input capture.

Parameters
channel Channel handle
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 290 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_Icu_stopCapture()

IFX_EXTERN void IfxCcu6_Icu_stopCapture ( IfxCcu6_Icu_Channel * channel )

Stops the input capture.

Parameters
channel Channel handle
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 316 of file IfxCcu6_Icu.c.

Referenced by IfxCcu6_Icu_initChannel().


iLLD_TC26B: Channel Initialize Functions

Functions
Channel Initialize Functions
iLLD » CCU6 » ICU Interface driver
Collaboration diagram for Channel Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Icu_initChannel()

IFX_EXTERN void IfxCcu6_Icu_initChannel | ( | IfxCcu6_Icu_Channel * | channel,
 |  | const IfxCcu6_Icu_ChannelConfig * | channelConfig
 | ) |  |

Initialises the channel.

Parameters
channel | Channel handle
channelConfig | Configuration structure of the channel
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 46 of file IfxCcu6_Icu.c.

◆ IfxCcu6_Icu_initChannelConfig()

IFX_EXTERN void IfxCcu6_Icu_initChannelConfig | ( | IfxCcu6_Icu_ChannelConfig * | channelConfig,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the channel config structure with default values.

Parameters
channelConfig | Configuration structure of the channel
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 ICU Interface driver?

Definition at line 175 of file IfxCcu6_Icu.c.


iLLD_TC26B: PWMBC Interface driver

Modules
PWMBC Interface driver
iLLD » CCU6
Collaboration diagram for PWMBC Interface driver:

Modules

How to use the CCU6 PWMBC Interface driver?
Data Structures
Module Initialize Functions
Modulation Control Functions
Hall Pattern Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 PWMBC Interface driver?

How to use the CCU6 PWMBC Interface driver?
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for How to use the CCU6 PWMBC Interface driver?:

The PWMBC interface driver provides a default CCU6 configuration specifically for running a Brush Less DC Motor using hall sensor inputs, by utilising both the timers

After evaluating the hall input pattern at every T13 period match, new out pattern is given to the module after the phase delay at the T13 zero match

User has to prepare the control table for the respective motor he/she is using,

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/PwmBc/IfxCcu6_PwmBc.h>

Variables

Declare the PWMBC handle and the motor control table as global variables in your C code:

// used globally
static IfxCcu6_PwmBc pwmBc;
// prepare the control table
uint8 controlTable[6][3] = {{1, 5, 17} ,
{2, 3, 36} ,
{3, 1, 6} ,
{4, 6, 18} ,
{5, 4, 24} ,
{6, 2, 9}};
// to store value of the speed
uint32 speed = 0;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_PwmBc, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_PwmBc, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_PwmBc_Config pwmBcConfig;
IfxCcu6_PwmBc_initModuleConfig(&pwmBcConfig, &MODULE_CCU60);
// configure the frequencies of both the timers
pwmBcConfig.base.t12Frequency = 400000;
pwmBcConfig.base.t13Frequency = 400000;
// configure the periods of both the timers
pwmBcConfig.base.t12Period = 100;
pwmBcConfig.base.t13Period = 100;
// configure the phase delay and noise filter for hall input
pwmBcConfig.base.phaseDelay = 20;
pwmBcConfig.base.noiseFilter = 10;
// select the active state of the output
pwmBcConfig.base.activeState = Ifx_ActiveState_high;
// configure timer12
pwmBcConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
pwmBcConfig.timer12.counterValue = 0;
// configure timer13
pwmBcConfig.timer13.counterValue = 0;
pwmBcConfig.timer13.compareValue = 100;
// configure the syncronisation, in case of sync start with T12
pwmBcConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
pwmBcConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
// configure hall sync event that starts the hall input pattern evaluation
pwmBcConfig.hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
// configure multi channel control
pwmBcConfig.multiChannelControl.switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
pwmBcConfig.multiChannelControl.switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
// pin configuration
const IfxCcu6_PwmBc_Pins pins = {
IfxCcu60_CC60_P02_0_OUT, // CC60Out pin
IfxCcu60_CC61_P02_2_OUT, // CC61Out pin
IfxCcu60_CC62_P02_4_OUT, // CC62Out pin
IfxCcu60_COUT60_P02_1_OUT, // COUT60 pin
IfxCcu60_COUT60_P02_3_OUT, // COUT61 pin
IfxCcu60_COUT60_P02_5_OUT, // COUT62 pin
NULL, // COUT63 pin not used
IfxCcu60_COUT60_P02_6_OUT // CCPOS0In pin
IfxCcu60_COUT60_P02_7_OUT // CCPOS1In pin
IfxCcu60_COUT60_P02_8_OUT // CCPOS2In pin
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1,
IfxPort_InputMode_pullUp
};
pwmBcConfig.pins = &pins;
// configure the interrupts
pwmBcConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc61FallingEdge;
pwmBcConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
pwmBcConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
pwmBcConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
pwmBcConfig.trigger.t12ExtInputTrigger = NULL_PTR;
pwmBcConfig.trigger.t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
pwmBcConfig.trigger.t13ExtInputTrigger = NULL_PTR;
pwmBcConfig.trigger.t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
pwmBcConfig.trigger.t13InSyncWithT12 = FALSE;
pwmBcConfig.trigger.outputTriggerEnabled = TRUE;
pwmBcConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
pwmBcConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
// initialize the module
IfxCcu6_PwmBc_initModule(&pwmBc, &pwmBcConfig);

The PwmBc is ready for use now!

Modulation Control

The PWMBC driver provides simple to use Motor Control functions

This means: you can start, stop, the BLDC motor once the module is initialised with the appropriate configuration You can optionally get the speed of the motor at any point of time

Start the motor

IfxCcu6_PwmBc_start(&pwmBc);

Stop the motor

IfxCcu6_PwmBc_stop(&pwmBc);

Update the output pattern

// prepare the control table
// assumed to be declared globally
uint8 controlTable[6][3] = {{1, 5, 17} ,
{2, 3, 36} ,
{3, 1, 6} ,
{4, 6, 18} ,
{5, 4, 24} ,
{6, 2, 9}};
// update the output pattern
IfxCcu6_PwmBc_updateHallPattern(&pwmBc, controlTable[6][3]);

Get the current motor speed (can also be called in ISR)

// assumed to be declared globally
uint32 speed = 0;
// get the current motor speed
speed = IfxCcu6_PwmBc_getMotorSpeed(&pwmBc);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control. More...
struct | IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_PwmBc_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_PwmBc_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_PwmBc
Module handle. More...
struct | IfxCcu6_PwmBc_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_PwmBc_InterruptConfig

struct IfxCcu6_PwmBc_InterruptConfig

Structure for interrupt configuration.

Definition at line 255 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_PwmBc_MultiChannelControl

struct IfxCcu6_PwmBc_MultiChannelControl

Structure for multichannel mode control.

Definition at line 265 of file IfxCcu6_PwmBc.h.

Data Fields
IfxCcu6_MultiChannelSwitchingSelect | switchingSelect | Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP.
IfxCcu6_MultiChannelSwitchingSync | switchingSync | Synchronization selection for the shadow transfer event MCM_ST.

◆ IfxCcu6_PwmBc_Pins

struct IfxCcu6_PwmBc_Pins

Structure for CCU6 output pin configuration.

Definition at line 273 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60_Out * | cc60Out | CC60 compare output CC0.
IFX_CONST IfxCcu6_Cc61_Out * | cc61Out | CC61 compare output CC1.
IFX_CONST IfxCcu6_Cc62_Out * | cc62Out | CC62 compare output CC2.
IFX_CONST IfxCcu6_Ccpos0_In * | ccpos0 | CCPOS0 input signal.
IFX_CONST IfxCcu6_Ccpos1_In * | ccpos1 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Ccpos2_In * | ccpos2 | CCPOS2 input signal.
IFX_CONST IfxCcu6_Cout60_Out * | cout60 | CC60 compare output COUT0.
IFX_CONST IfxCcu6_Cout61_Out * | cout61 | CC61 compare output COUT1.
IFX_CONST IfxCcu6_Cout62_Out * | cout62 | CC62 compare output COUT2.
IFX_CONST IfxCcu6_Cout63_Out * | cout63 | CC63 compare output COUT3.
IfxPort_InputMode | inputMode | The CCPOSx pin input mode which should be configured.
IfxPort_OutputMode | outputMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_PwmBc_Timer12

struct IfxCcu6_PwmBc_Timer12

Structure for Timer 12.

Definition at line 295 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.

◆ IfxCcu6_PwmBc_Timer13

struct IfxCcu6_PwmBc_Timer13

Structure for Timer 13.

Definition at line 303 of file IfxCcu6_PwmBc.h.

Data Fields
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_PwmBc_TriggerConfig

struct IfxCcu6_PwmBc_TriggerConfig

Configuration structure for external triggers.

Definition at line 313 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_TriggerConfig:
[legend]
Data Fields
IfxCcu6_TrigOut | outputLine | Trigger out selection.
IfxCcu6_TrigSel | outputTrigger | Trigger selection.
boolean | outputTriggerEnabled | Output trigger connection to VADC enable / disable choice.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External input signal selection for timer 12.
IfxCcu6_ExternalTriggerMode | t12ExtInputTriggerMode | Event of signal T12HR that can set the run bit T12R by HW.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External input signal selection for timer 13.
IfxCcu6_ExternalTriggerMode | t13ExtInputTriggerMode | Event of signal T13HR that can set the run bit T13R by HW.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_PwmBc

struct IfxCcu6_PwmBc

Module handle.

Definition at line 331 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc:
[legend]
Data Fields
PwmHl | base | Base PWMHL object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
uint8 | hallPatternIndex | Hall pattern index of motor control table.
IfxCcu6_PwmBc_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_PwmBc_Config

struct IfxCcu6_PwmBc_Config

Configuration structure of the module.

Definition at line 341 of file IfxCcu6_PwmBc.h.

Collaboration diagram for IfxCcu6_PwmBc_Config:
[legend]
Data Fields
PwmHl_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
uint8 | hallPatternIndex | Hall pattern index of motor control table.
IfxCcu6_HallSensorTriggerMode | hallSyncEvent | Hall pattern evaluation trigger selection (HSYNC)
IfxCcu6_PwmBc_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_PwmBc_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_PwmBc_MultiChannelControl | multiChannelControl | Structure for multichannel mode control.
IfxCcu6_PwmBc_Pins * | pins | Structure for CCU6 output pin configuration.
IfxCcu6_PwmBc_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_PwmBc_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_PwmBc_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_initModule()

IFX_EXTERN void IfxCcu6_PwmBc_initModule | ( | IfxCcu6_PwmBc * | pwmBc,
 |  | const IfxCcu6_PwmBc_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
pwmBc | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 51 of file IfxCcu6_PwmBc.c.

◆ IfxCcu6_PwmBc_initModuleConfig()

IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig | ( | IfxCcu6_PwmBc_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 316 of file IfxCcu6_PwmBc.c.


iLLD_TC26B: Modulation Control Functions

Functions
Modulation Control Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Modulation Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
IFX_EXTERN void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_start()

IFX_EXTERN void IfxCcu6_PwmBc_start ( IfxCcu6_PwmBc * pwmBc )

Starts the Hall sensored based PWM.

Parameters
pwmBc Module handle
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 403 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_PwmBc_stop()

IFX_EXTERN void IfxCcu6_PwmBc_stop ( IfxCcu6_PwmBc * pwmBc )

Stops the Hall sensored based PWM.

Parameters
pwmBc Module handle
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 456 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().


iLLD_TC26B: Hall Pattern Functions

Functions
Hall Pattern Functions
iLLD » CCU6 » PWMBC Interface driver
Collaboration diagram for Hall Pattern Functions:

Functions

IFX_EXTERN uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
IFX_EXTERN void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmBc_getMotorSpeed()

IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed ( IfxCcu6_PwmBc * pwmBc )

returns the current motor speed

Parameters
pwmBc Module handle
Returns
speed

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 36 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().

◆ IfxCcu6_PwmBc_updateHallPattern()

IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern | ( | IfxCcu6_PwmBc * | pwmBc,
 |  | uint8 | controlTable[6][3]
 | ) |  |

Updates the Hall pattern.

Parameters
pwmBc | Module handle
controlTable | Motor Control table
Returns
None

A coding example can be found in How to use the CCU6 PWMBC Interface driver?

Definition at line 494 of file IfxCcu6_PwmBc.c.

Referenced by IfxCcu6_PwmBc_initModule().


iLLD_TC26B: PWM Interface Driver

Modules
PWM Interface Driver
iLLD » CCU6
Collaboration diagram for PWM Interface Driver:

Modules

How to use the CCU6 PWM Driver
Data Structures
PwmHl Functions
StdIf Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 PWM Driver

How to use the CCU6 PWM Driver
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for How to use the CCU6 PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

For a detailed configuration of the microcontroller, see IfxCcu6_PwmHl_init().


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration. More...
struct | IfxCcu6_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxCcu6_PwmHl_s
CCU6 PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_PwmHl_Base

struct IfxCcu6_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 79 of file IfxCcu6_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxCcu6_PwmHl_Config

struct IfxCcu6_PwmHl_Config

CCU6: PWM HL configuration.

Definition at line 98 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_Config:
[legend]
Data Fields
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IfxCcu6_Cc60_Out * | cc0 | CC0 channel used.
IfxCcu6_Cc61_Out * | cc1 | CC1 channel used.
IfxCcu6_Cc62_Out * | cc2 | CC2 channel used.
IfxCcu6_Cout60_Out * | cout0 | COUT0 channel used.
IfxCcu6_Cout61_Out * | cout1 | COUT1 channel used.
IfxCcu6_Cout62_Out * | cout2 | COUT2 channel used.
IfxCcu6_TimerWithTrigger * | timer | Pointer to the linked timer object.

◆ IfxCcu6_PwmHl_Mode

struct IfxCcu6_PwmHl_Mode

Structure for PWM configuration.

Definition at line 112 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | pwm mode
IfxCcu6_PwmHl_Update | update | update call back function for the selected mode

◆ IfxCcu6_PwmHl_s

struct IfxCcu6_PwmHl_s

CCU6 PWM driver.

Definition at line 121 of file IfxCcu6_PwmHl.h.

Collaboration diagram for IfxCcu6_PwmHl_s:
[legend]
Data Fields
IfxCcu6_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxCcu6_TimerWithTrigger * | timer | Pointer to the linked timer object.
IfxCcu6_PwmHl_Update | update | Update function for actual selected mode.


iLLD_TC26B: PwmHl Functions

Functions
PwmHl Functions
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
IFX_EXTERN void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmHl_init()

IFX_EXTERN boolean IfxCcu6_PwmHl_init | ( | IfxCcu6_PwmHl * | driver,
 |  | const IfxCcu6_PwmHl_Config * | config
 | ) |  |

Initializes the timer object.

Note
To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Initialise the CCU6 module for PWM generation of high- and low switches usage, e.g.
  • electric motor drive
  • half-bridge switches

It is assumed that the whole CCU6 module is only used for purposes mentioned at the IfxCcu6_PwmHl API. No part of CCU6 module is used for other purpose.

The timer used should configure the T12 as PWM base timer and T13 as trigger.

Parameters
driver | CCU6 PWM driver
config | CCU6 : PWM HL configuration
Returns
TRUE on success else FALSE
  • All T12 channels (0,1,2) are set in compare mode
  • Enable T12 modulation mode

Definition at line 184 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_initConfig()

IFX_EXTERN void IfxCcu6_PwmHl_initConfig ( IfxCcu6_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 273 of file IfxCcu6_PwmHl.c.


iLLD_TC26B: StdIf Functions

Functions
StdIf Functions
iLLD » CCU6 » PWM Interface Driver
Collaboration diagram for StdIf Functions:

Functions

IFX_STATIC void | IfxCcu6_PwmHl_disable (IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_enable (IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_setOutputPins (Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateCenterAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateEdgeAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxCcu6_PwmHl_updateOff (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_INLINE Ifx_ActiveState | IfxCcu6_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
IFX_EXTERN void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxCcu6_PwmHl_disable()

IFX_STATIC void IfxCcu6_PwmHl_disable ( IfxCcu6_PwmHl * driver )

Turn-off the complementary PWM generation mode.

Note
The changes are not applied until Timer->applyUpdate() is called.
This function will set the ON time to ZERO, overriding previous call to IfxCcu6_PwmHl_setOnTime().
This function will disable PWM in all channels, overriding previous call to IfxCcu6_PwmHl_setupChannels().
Parameters
driver CCU6 PWM driver
Returns
None
  • All TOP and BOTTOM channel (COUTx) states equals CC6xST

Definition at line 109 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().

◆ IfxCcu6_PwmHl_enable()

IFX_STATIC void IfxCcu6_PwmHl_enable ( IfxCcu6_PwmHl * driver )

Turn-on the complementary PWM generation mode.

Note
The changes are not applied until Timer->applyUpdate() is called.
This function will disable PWM in all channels, overriding previous call to IfxCcu6_PwmHl_setupChannels().
Parameters
driver CCU6 PWM driver
Returns
None
  • All TOP and BOTTOM channel (COUTx) states equals CC6xST

Definition at line 140 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().

◆ IfxCcu6_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime ( IfxCcu6_PwmHl * driver )

Returns the dead time.

Parameters
driver CCU6 PWM driver
Returns
Dead Time
See also
IfxStdIf_PwmHl_GetDeadtime

Definition at line 166 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse ( IfxCcu6_PwmHl * driver )

Returns the minimum pulse.

Parameters
driver CCU6 PWM driver
Returns
Min Pulse
See also
IfxStdIf_PwmHl_GetMinPulse

Definition at line 172 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode ( IfxCcu6_PwmHl * driver )

Returns Pwm mode.

Parameters
driver CCU6 PWM driver
Returns
Pwm mode
See also
IfxStdIf_PwmHl_GetMode

Definition at line 178 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 284 of file IfxCcu6_PwmHl.h.

◆ IfxCcu6_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime | ( | IfxCcu6_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

Note
The changes are not applied until Timer->applyUpdate() is called.
Parameters
driver | CCU6 PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetDeadtime

Definition at line 286 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse | ( | IfxCcu6_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

Parameters
driver | CCU6 PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetMinPulse

Definition at line 297 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setMode()

IFX_EXTERN boolean IfxCcu6_PwmHl_setMode | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

Parameters
driver | CCU6 PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
See also
IfxStdIf_PwmHl_SetMode

Definition at line 308 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_setOnTime()

IFX_EXTERN void IfxCcu6_PwmHl_setOnTime | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary.

Note
The changes are not applied until Timer->applyUpdate() is called.
Parameters
driver | CCU6 PWM driver
tOn | ON time
Returns
None
See also
IfxStdIf_PwmHl_SetOnTime

Definition at line 340 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_disable(), IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxCcu6_PwmHl_updateCenterAligned(), and IfxCcu6_PwmHl_updateEdgeAligned().

◆ IfxCcu6_PwmHl_setOutputPins()

IFX_STATIC void IfxCcu6_PwmHl_setOutputPins | ( | Ifx_CCU6 * | module,
 |  | const IfxCcu6_PwmHl_Config * | config
 | ) |  |

Sets up the output pins.

Parameters
module | Pointer to register base
config | CCU6 : PWM HL configuration
Returns
None

Definition at line 388 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init().

◆ IfxCcu6_PwmHl_setupChannels()

IFX_EXTERN void IfxCcu6_PwmHl_setupChannels | ( | IfxCcu6_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set channels which are generating PWM or in "stuck-at" state.

Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom
Parameters
driver | CCU6 PWM driver
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Returns
None
See also
IfxStdIf_PwmHl_SetupChannels

Definition at line 424 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_disable(), and IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxCcu6_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 460 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateCenterAligned()

IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 483 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 489 of file IfxCcu6_PwmHl.c.

◆ IfxCcu6_PwmHl_updateOff()

IFX_STATIC void IfxCcu6_PwmHl_updateOff | ( | IfxCcu6_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | CCU6 PWM driver
tOn | T on
Returns
None

Definition at line 495 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_init().


iLLD_TC26B: TIMER Interface driver

Modules
TIMER Interface driver
iLLD » CCU6
Collaboration diagram for TIMER Interface driver:

Modules

How to use the CCU6 TIMER Interface driver?
Data Structures
Module Initialize Functions
Timer Control Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 TIMER Interface driver?

How to use the CCU6 TIMER Interface driver?
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for How to use the CCU6 TIMER Interface driver?:

The TIMER interface driver provides a default CCU6 configuration for runnung the selected timer block.

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/Timer/IfxCcu6_Timer.h>

Variables

Declare the TIMER handle as global variable in your C code:

// used globally
static IfxCcu6_Timer timer;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_Timer, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Timer, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_Timer_Config timerConfig;
IfxCcu6_Timer_initModuleConfig(&timerConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
// this frequency will be set for the timer block selected later
timerConfig.base.frequency = 400000;
// configure the period of the timer
timerConfig.base.period = 100;
// configure the waiting time in case of delayed T13 start in sync with T12
timerConfig.base.waitingTime = 0;
// select the timer that needs to be started
timerConfig.timer = IfxCcu6_TimerId_t12;
// select the synchronous operation if both timers need to be start at the same time
// previous selection of timer block can be ignored in this mode
timerConfig.synchronousOperation = TRUE;
// configure the clock for internal mode
timerConfig.clock.t12ExtClockEnabled = FALSE;
timerConfig.clock.t12ExtClockInput = NULL_PTR;
timerConfig.clock.t12countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure the selcted timer block
timerConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
timerConfig.timer12.counterValue = 0;
// configure the interrupts
timerConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t12PeriodMatch;
timerConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
timerConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
timerConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
timerConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
timerConfig.trigger.t13ExtInputTrigger = NULL_PTR;
timerConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
timerConfig.trigger.t13InSyncWithT12 = FALSE;
// initialize the module
IfxCcu6_Timer_initModule(&timer, &timerConfig);

The Timer is ready for use now!

Control

The TIMER driver provides simple to use timer Control functions

This means: In addition to start and stop a single timer, you can start and stop both the timer blocks at the same time you can also run the timer in single shot mode and finally you an manually make the timer count each step

Start the timer

IfxCcu6_Timer_start(&timer);

Stop the timer

IfxCcu6_Timer_stop(&timer);

Start both the timers synchronously, when the synchronousOperation mode is selected in the configuration

IfxCcu6_Timer_synchronousStart(&timer);

Stop both the timers synchronously, when the synchronousOperation mode is selected in the configuration

IfxCcu6_Timer_synchronousStop(&timer);

Start the selected timer in single shot mode

IfxCcu6_Timer_startSingleShotMode(&timer);

Make the timer count each step manually

uint8 i;
for (i=0; i<50; i++)
{
IfxCcu6_Timer_countOneStep(&timer);
}


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_Timer_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Timer_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_Timer_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Timer
Module handle. More...
struct | IfxCcu6_Timer_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_Timer_Clock

struct IfxCcu6_Timer_Clock

Structure for clock configuration.

Definition at line 214 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | t12countingInputMode | Input event leading to a counting action of the timer T12.
boolean | t12ExtClockEnabled | Timer 12 external clock enable / disable selection.
IfxCcu6_T12hr_In * | t12ExtClockInput | External input signal selection for timer 12.
IfxCcu6_CountingInputMode | t13countingInputMode | Input event leading to a counting action of the timer T13.
boolean | t13ExtClockEnabled | Timer 13 external clock enable / disable selection.
IfxCcu6_T13hr_In * | t13ExtClockInput | External input signal selection for timer 13.

◆ IfxCcu6_Timer_InterruptConfig

struct IfxCcu6_Timer_InterruptConfig

Structure for interrupt configuration.

Definition at line 226 of file IfxCcu6_Timer.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_Timer_Timer12

struct IfxCcu6_Timer_Timer12

Structure for Timer 12.

Definition at line 236 of file IfxCcu6_Timer.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.

◆ IfxCcu6_Timer_Timer13

struct IfxCcu6_Timer_Timer13

Structure for Timer 13.

Definition at line 244 of file IfxCcu6_Timer.h.

Data Fields
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_Timer_TriggerConfig

struct IfxCcu6_Timer_TriggerConfig

Configuration structure for external triggers.

Definition at line 253 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_TriggerConfig:
[legend]
Data Fields
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T1xHR that can set the run bit T1xR by HW.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External input signal selection for timer 12.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External input signal selection for timer 13.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_Timer

struct IfxCcu6_Timer

Module handle.

Definition at line 276 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer:
[legend]
Data Fields
Timer | base | Base Timer object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_Timer_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_Timer_Config

struct IfxCcu6_Timer_Config

Configuration structure of the module.

Definition at line 286 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Config:
[legend]
Data Fields
Timer_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_Timer_Clock | clock | Structure for clock configuration.
IfxCcu6_Timer_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_Timer_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_Timer_Pins * | pins | Structure for CCU6 output pin configuration.
boolean | synchronousOperation | Synchronous operation selection (starting / stopping both the timers at the same time)
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_Timer_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_Timer_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_Timer_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Timer_initModule()

IFX_EXTERN void IfxCcu6_Timer_initModule | ( | IfxCcu6_Timer * | timer,
 |  | const IfxCcu6_Timer_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
timer | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 59 of file IfxCcu6_Timer.c.

◆ IfxCcu6_Timer_initModuleConfig()

IFX_EXTERN void IfxCcu6_Timer_initModuleConfig | ( | IfxCcu6_Timer_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 263 of file IfxCcu6_Timer.c.


iLLD_TC26B: Timer Control Functions

Functions
Timer Control Functions
iLLD » CCU6 » TIMER Interface driver
Collaboration diagram for Timer Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
IFX_EXTERN void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

Function Documentation

◆ IfxCcu6_Timer_countOneStep()

IFX_EXTERN void IfxCcu6_Timer_countOneStep ( IfxCcu6_Timer * timer )

Counts the timer one step.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 36 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_start()

IFX_EXTERN void IfxCcu6_Timer_start ( IfxCcu6_Timer * timer )

Starts the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 347 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_startSingleShotMode()

IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode ( IfxCcu6_Timer * timer )

Starts the single shot mode of the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 402 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_stop()

IFX_EXTERN void IfxCcu6_Timer_stop ( IfxCcu6_Timer * timer )

Stops the timer.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 462 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_synchronousStart()

IFX_EXTERN void IfxCcu6_Timer_synchronousStart ( IfxCcu6_Timer * timer )

Starts both the timers together.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 507 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().

◆ IfxCcu6_Timer_synchronousStop()

IFX_EXTERN void IfxCcu6_Timer_synchronousStop ( IfxCcu6_Timer * timer )

Starts both the timers together.

Parameters
timer Module handle
Returns
None

A coding example can be found in How to use the CCU6 TIMER Interface driver?

Definition at line 517 of file IfxCcu6_Timer.c.

Referenced by IfxCcu6_Timer_initModule().


iLLD_TC26B: TimerWithTrigger Interface driver

Modules
TimerWithTrigger Interface driver
iLLD » CCU6
Collaboration diagram for TimerWithTrigger Interface driver:

Modules

How to use the CCU6 TimerWithTrigger Interface driver?
Data Structures
Timer StdIf Functions
Timer Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 TimerWithTrigger Interface driver?

How to use the CCU6 TimerWithTrigger Interface driver?
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for How to use the CCU6 TimerWithTrigger Interface driver?:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxCcu6_TimerWithTrigger_Base
Structure for the timer base. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_TimerWithTrigger_Base

struct IfxCcu6_TimerWithTrigger_Base

Structure for the timer base.

Definition at line 58 of file IfxCcu6_TimerWithTrigger.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.


iLLD_TC26B: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq ( IfxCcu6_TimerWithTrigger * driver )

Returns the timer event.

Parameters
driver CCU6 Timer interface Handle
Returns
Timer event
See also
IfxStdIf_Timer_AckTimerIrq

Definition at line 38 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq ( IfxCcu6_TimerWithTrigger * driver )

Returns the trigger event.

Parameters
driver CCU6 Timer interface Handle
Returns
Timer event
See also
IfxStdIf_Timer_AckTriggerIrq

Definition at line 54 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_applyUpdate()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate ( IfxCcu6_TimerWithTrigger * driver )

Enable the transfer of the shadow registers.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_ApplyUpdate

Definition at line 70 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_PwmHl_init(), IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_disableUpdate()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate ( IfxCcu6_TimerWithTrigger * driver )

Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_DisableUpdate

Definition at line 76 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getFrequency()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency ( IfxCcu6_TimerWithTrigger * driver )

Returns the frequency.

Parameters
driver CCU6 Timer interface Handle
Returns
Frequency
See also
IfxStdIf_Timer_GetFrequency

Definition at line 82 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getInputFrequency()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency ( IfxCcu6_TimerWithTrigger * driver )

Returns the Input frequncy.

Parameters
driver CCU6 Timer interface Handle
Returns
Frequency
See also
IfxStdIf_Timer_GetInputFrequency

Definition at line 88 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod ( IfxCcu6_TimerWithTrigger * driver )

Returns the period of the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
Period
See also
IfxStdIf_Timer_GetPeriod

Definition at line 94 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_getResolution()

IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution ( IfxCcu6_TimerWithTrigger * driver )

Returns the resolution.

Parameters
driver CCU6 Timer interface Handle
Returns
Resolution
See also
IfxStdIf_Timer_GetResolution

Definition at line 106 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_run()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_run ( IfxCcu6_TimerWithTrigger * driver )

Runs the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_Run

Definition at line 275 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setFrequency()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

Parameters
driver | CCU6 Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE
See also
IfxStdIf_Timer_SetFrequency

Definition at line 281 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setPeriod()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

Parameters
driver | CCU6 Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE
See also
IfxStdIf_Timer_SetPeriod

Definition at line 289 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_setFrequency(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setSingleMode()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

Parameters
driver | CCU6 Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None
See also
IfxStdIf_Timer_SetSingleMode

Definition at line 299 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_setTrigger()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

Parameters
driver | CCU6 Timer interface Handle
triggerPoint | Trigger point value
Returns
None
See also
IfxStdIf_Timer_SetTrigger

Definition at line 312 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_stdIfTimerInit()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxCcu6_TimerWithTrigger * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | CCU6 Timer interface Handle
Returns
TRUE on success else FALSE

Definition at line 318 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_PwmHl_stdIfPwmHlInit().

◆ IfxCcu6_TimerWithTrigger_stop()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop ( IfxCcu6_TimerWithTrigger * driver )

Stops the timer.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_Stop

Definition at line 347 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_stdIfTimerInit().

◆ IfxCcu6_TimerWithTrigger_updateInputFrequency()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency ( IfxCcu6_TimerWithTrigger * driver )

Updates the input frequency.

Parameters
driver CCU6 Timer interface Handle
Returns
None
See also
IfxStdIf_Timer_UpdateInputFrequency

Definition at line 353 of file IfxCcu6_TimerWithTrigger.c.

Referenced by IfxCcu6_TimerWithTrigger_init(), and IfxCcu6_TimerWithTrigger_stdIfTimerInit().


iLLD_TC26B: Timer Functions

Functions
Timer Functions
iLLD » CCU6 » TimerWithTrigger Interface driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TimerWithTrigger_getPointer()

IFX_EXTERN volatile uint32* IfxCcu6_TimerWithTrigger_getPointer ( IfxCcu6_TimerWithTrigger * driver )

Returns the pointer to timer channel.

Parameters
driver CCU6 Timer interface Handle
Returns
Pointer
See also
IfxStdIf_Timer_DisableUpdate

Definition at line 100 of file IfxCcu6_TimerWithTrigger.c.

◆ IfxCcu6_TimerWithTrigger_init()

IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init | ( | IfxCcu6_TimerWithTrigger * | driver,
 |  | IfxCcu6_TimerWithTrigger_Config * | config
 | ) |  |

Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
.

Parameters
driver | CCU6 Timer interface Handle
config | Configuration structure for Timer
Returns
TRUE on success else FALSE
  • Enable/initialise the CCU6 if it has not been enabled. See IfxCcu6_isModuleEnabled()

    Return values
    IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the required frequency
  • The T13 is used to generate additional PWM for internal trigger purpose (e.g. ADC) or external trigger purpose (e.g. sensor synchronisation).

Definition at line 112 of file IfxCcu6_TimerWithTrigger.c.

◆ IfxCcu6_TimerWithTrigger_initConfig()

IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig | ( | IfxCcu6_TimerWithTrigger_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for Timer
ccu6 | Pointer to CCU6 module
Returns
None

Definition at line 265 of file IfxCcu6_TimerWithTrigger.c.


iLLD_TC26B: TPWM Interface driver

Modules
TPWM Interface driver
iLLD » CCU6
Collaboration diagram for TPWM Interface driver:

Modules

How to use the CCU6 TPWM Interface driver?
Data Structures
Module Initialize Functions
Modultion Control Functions

Detailed Description


iLLD_TC26B: How to use the CCU6 TPWM Interface driver?

How to use the CCU6 TPWM Interface driver?
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for How to use the CCU6 TPWM Interface driver?:

The TPWM interface driver provides a default CCU6 configuration for PWM modulation output through the selected timer block.

User can select the various configuration options that hardware allows

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Ccu6/TPwm/IfxCcu6_TPwm.h>

Variables

Declare the TPWM handle as global variable in your C code:

// used globally
static IfxCcu6_TPwm tPwm;

Interrupt Handler Installation

See also How to define Interrupts?

Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_CCU6 1

Add the interrupt service routine to your C code.

IFX_INTERRUPT(ccu60ISR_TPwm, 0, IFX_INTPRIO_CCU6)
{
//user code
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ccu60ISR_TPwm, IFX_INTPRIO_CCU6);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create configuration
IfxCcu6_TPwm_Config tPwmConfig;
IfxCcu6_TPwm_initModuleConfig(&tPwmConfig, &MODULE_CCU60);
// configure the frequency of the timer in case of internal start
// this frequency will be set for the timer block selected later
tPwmConfig.base.frequency = 400000;
// configure the period of the timer
tPwmConfig.base.period = 100;
// configure the waiting time in case of delayed T13 start in sync with T12
tPwmConfig.base.waitingTime = 20;
// select the active state of the output
tPwmConfig.base.activeState = Ifx_ActiveState_high;
// select the timer through which PWM is to be generated
tPwmConfig.timer = IfxCcu6_TimerId_t13;
// configure the clock for internal mode
tPwmConfig.clock.t13ExtClockEnabled = FALSE;
tPwmConfig.clock.t13ExtClockInput = NULL_PTR;
tPwmConfig.clock.t13countingInputMode = IfxCcu6_CountingInputMode_internal;
// configure the selcted timer block
tPwmConfig.timer13.counterValue = 0;
tPwmConfig.timer13.compareValue = 100;
// configure the syncronisation, in case of sync start with T12
tPwmConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
tPwmConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
//select the channel out for modulation
tPwmConfig.channelOut = IfxCcu6_ChannelOut_cout3;
// pin configuration
const IfxCcu6_TPwm_Pins pins = {
NULL, // CC60Out pin not used
NULL, // CC61Out pin not used
NULL, // CC62Out pin not used
NULL, // COUT60 pin not used
NULL, // COUT61 pin not used
NULL, // COUT62 pin not used
IfxCcu60_COUT63_P00_0_OUT, // COUT63 pin
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
tPwmConfig.pins = &pins;
// configure the interrupts
tPwmConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t13CompareMatch;
tPwmConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
tPwmConfig.interrupt1.priority = IFX_INTPRIO_CCU6;
tPwmConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
// configure input and output triggers
tPwmConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
tPwmConfig.trigger.t13ExtInputTrigger = NULL_PTR;
tPwmConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
tPwmConfig.trigger.t13InSyncWithT12 = TRUE;
tPwmConfig.trigger.outputTriggerEnabled = TRUE;
tPwmConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
tPwmConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
// initialize the module
IfxCcu6_TPwm_initModule(&tPwm, &tPwmConfig);

The TPWM is ready for use now!

Modulation Control

The TPWM driver provides simple to use Modulation Control functions

This means: you can start, stop, pause and resume the modulation once the module is initialised with the appropriate configuration

Start the modulation

IfxCcu6_TPwm_start(&tPwm);

Stop the modulation

IfxCcu6_TPwm_stop(&tPwm);

Pause the modulation

IfxCcu6_TPwm_pause(&tPwm);

Resume the modulation

IfxCcu6_TPwm_resume(&tPwm);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCcu6_TPwm_Clock
Structure for clock configuration. More...
struct | IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_TPwm_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_TPwm_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_TPwm
Module handle. More...
struct | IfxCcu6_TPwm_Config
Configuration structure of the module. More...

Detailed Description

Data Structure Documentation

◆ IfxCcu6_TPwm_Clock

struct IfxCcu6_TPwm_Clock

Structure for clock configuration.

Definition at line 212 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Clock:
[legend]
Data Fields
IfxCcu6_CountingInputMode | t12countingInputMode | Input event leading to a counting action of the timer T12.
boolean | t12ExtClockEnabled | Timer 12 external clock enable / disable selection.
IfxCcu6_T12hr_In * | t12ExtClockInput | External input signal selection for timer 12.
IfxCcu6_CountingInputMode | t13countingInputMode | Input event leading to a counting action of the timer T13.
boolean | t13ExtClockEnabled | Timer 13 external clock enable / disable selection.
IfxCcu6_T13hr_In * | t13ExtClockInput | External input signal selection for timer 13.

◆ IfxCcu6_TPwm_InterruptConfig

struct IfxCcu6_TPwm_InterruptConfig

Structure for interrupt configuration.

Definition at line 224 of file IfxCcu6_TPwm.h.

Data Fields
uint16 | priority | Interrupt priority.
IfxCcu6_ServiceRequest | serviceRequest | Selection of service request outputs.
IfxCcu6_InterruptSource | source | Interrupt source selection.
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxCcu6_TPwm_Pins

struct IfxCcu6_TPwm_Pins

Structure for CCU6 output pin configuration.

Definition at line 234 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_Cc60_Out * | cc60Out | CC60 compare output CC0.
IFX_CONST IfxCcu6_Cc61_Out * | cc61Out | CC61 compare output CC1.
IFX_CONST IfxCcu6_Cc62_Out * | cc62Out | CC62 compare output CC2.
IFX_CONST IfxCcu6_Cout60_Out * | cout60 | CC60 compare output COUT0.
IFX_CONST IfxCcu6_Cout61_Out * | cout61 | CC61 compare output COUT1.
IFX_CONST IfxCcu6_Cout62_Out * | cout62 | CC62 compare output COUT2.
IFX_CONST IfxCcu6_Cout63_Out * | cout63 | CC63 compare output COUT3.
IfxPort_OutputMode | outputMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.

◆ IfxCcu6_TPwm_Timer12

struct IfxCcu6_TPwm_Timer12

Structure for Timer 12.

Definition at line 252 of file IfxCcu6_TPwm.h.

Data Fields
IfxCcu6_T12Channel | channelId | Capture compare channel of the Timer12.
IfxCcu6_T12ChannelMode | channelMode | The operating mode for the T12 channel.
IfxCcu6_TimerInputClock | clockInput | Input clock selection (prescaler)
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer12
IfxCcu6_T12CountMode | countMode | Operating mode of Timer 12.
uint8 | deadTimeValue | Value of the dead time to be induced.

◆ IfxCcu6_TPwm_Timer13

struct IfxCcu6_TPwm_Timer13

Structure for Timer 13.

Definition at line 265 of file IfxCcu6_TPwm.h.

Data Fields
IfxCcu6_TimerInputClock | clockInput | Input clock selection (prescaler)
uint16 | compareValue | 16-bit comapre value of Timer12
uint16 | counterValue | 16-bit counter value of Timer13
IfxCcu6_T13TriggerDirection | t12SyncDirection | Additional information to control trigger event selection.
IfxCcu6_T13TriggerEvent | t12SyncEvent | T12 sync trigger event to start T13.

◆ IfxCcu6_TPwm_TriggerConfig

struct IfxCcu6_TPwm_TriggerConfig

Configuration structure for external triggers.

Definition at line 276 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_TriggerConfig:
[legend]
Data Fields
IfxCcu6_ExternalTriggerMode | extInputTriggerMode | Event of signal T1xHR that can set the run bit T1xR by HW.
IfxCcu6_TrigOut | outputLine | Trigger out selection.
IfxCcu6_TrigSel | outputTrigger | Output Trigger selection.
boolean | outputTriggerEnabled | Output trigger connection to VADC enable / disable choice.
IfxCcu6_T12hr_In * | t12ExtInputTrigger | External trigger input signal selection to start the timer 12.
IfxCcu6_T13hr_In * | t13ExtInputTrigger | External trigger input signal selection to start the timer 13.
boolean | t13InSyncWithT12 | Selection of Timer 13 start in sync with T12.

◆ IfxCcu6_TPwm

struct IfxCcu6_TPwm

Module handle.

Definition at line 293 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm:
[legend]
Data Fields
TPwm | base | Base TPWM object.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_ChannelOut | channelOut | Capture compare output pin selection.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_TPwm_TriggerConfig | trigger | Structure for trigger configuration.

◆ IfxCcu6_TPwm_Config

struct IfxCcu6_TPwm_Config

Configuration structure of the module.

Definition at line 304 of file IfxCcu6_TPwm.h.

Collaboration diagram for IfxCcu6_TPwm_Config:
[legend]
Data Fields
TPwm_Config | base | Base configuration.
Ifx_CCU6 * | ccu6 | Pointer to the base of CCU6 registers.
IfxCcu6_ChannelOut | channelOut | Capture compare output pin selection.
IfxCcu6_TPwm_Clock | clock | Structure for clock configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt1 | Structure for first interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt2 | Structure for second interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt3 | Structure for third interrupt configuration.
IfxCcu6_TPwm_InterruptConfig | interrupt4 | Structure for fourth interrupt configuration.
IfxCcu6_TPwm_Pins * | pins | Structure for CCU6 output pin configuration.
IfxCcu6_TimerId | timer | Timer number (T12 / T13)
IfxCcu6_TPwm_Timer12 | timer12 | Structure for Timer 12.
IfxCcu6_TPwm_Timer13 | timer13 | Structure for Timer 13.
IfxCcu6_TPwm_TriggerConfig | trigger | Structure for trigger configuration.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TPwm_initModuleConfig()

IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig | ( | IfxCcu6_TPwm_Config * | config,
 |  | Ifx_CCU6 * | ccu6
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
ccu6 | Pointer to the base of CCU6 registers
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 325 of file IfxCcu6_TPwm.c.


iLLD_TC26B: Modultion Control Functions

Functions
Modultion Control Functions
iLLD » CCU6 » TPWM Interface driver
Collaboration diagram for Modultion Control Functions:

Functions

IFX_EXTERN void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

Function Documentation

◆ IfxCcu6_TPwm_initModule()

IFX_EXTERN void IfxCcu6_TPwm_initModule | ( | IfxCcu6_TPwm * | tPwm,
 |  | const IfxCcu6_TPwm_Config * | config
 | ) |  |

Initialises the module with default configuration.

Parameters
tPwm | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 36 of file IfxCcu6_TPwm.c.

◆ IfxCcu6_TPwm_pause()

IFX_EXTERN void IfxCcu6_TPwm_pause ( IfxCcu6_TPwm * tPwm )

Pauses the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 418 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_resume()

IFX_EXTERN void IfxCcu6_TPwm_resume ( IfxCcu6_TPwm * tPwm )

Resumes the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 424 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_start()

IFX_EXTERN void IfxCcu6_TPwm_start ( IfxCcu6_TPwm * tPwm )

Starts the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 430 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().

◆ IfxCcu6_TPwm_stop()

IFX_EXTERN void IfxCcu6_TPwm_stop ( IfxCcu6_TPwm * tPwm )

Stops the triggered PWM.

Parameters
tPwm Module handle
Returns
None

A coding example can be found in How to use the CCU6 TPWM Interface driver?

Definition at line 485 of file IfxCcu6_TPwm.c.

Referenced by IfxCcu6_TPwm_initModule().


iLLD_TC26B: IfxCcu6_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxCcu6_cfg.h File Reference
iLLD » CCU6

CCU6 on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxCcu6_reg.h"
#include "IfxCcu6_bf.h"
Include dependency graph for IfxCcu6_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCCU6_NUM_MODULES (2)
#define | IFXCCU6_NUM_SERVICE_REQUESTS (4)
#define | IFXCCU6_NUM_T12_CHANNELS (3)
#define | IFXCCU6_NUM_T13_CHANNELS (1)

Enumerations

enum IfxCcu6_Index {
IfxCcu6_Index_none = -1,
IfxCcu6_Index_0 = 0,
IfxCcu6_Index_1
}
List of the available CCU6 resources. More...
enum IfxCcu6_TrigOut {
IfxCcu6_TrigOut_0 = IFX_CCU6_MOSEL_TRIG0SEL_OFF,
IfxCcu6_TrigOut_1 = IFX_CCU6_MOSEL_TRIG1SEL_OFF,
IfxCcu6_TrigOut_2 = IFX_CCU6_MOSEL_TRIG2SEL_OFF
}
enum IfxCcu6_TrigSel {
IfxCcu6_TrigSel_cout63 = 0,
IfxCcu6_TrigSel_cc60 = 1,
IfxCcu6_TrigSel_cc61 = 1,
IfxCcu6_TrigSel_cc62 = 1,
IfxCcu6_TrigSel_sr1 = 2,
IfxCcu6_TrigSel_sr3 = 3
}

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap [IFXCCU6_NUM_MODULES]

Detailed Description

CCU6 on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_cfg.h.

Macro Definition Documentation

◆ IFXCCU6_NUM_MODULES

#define IFXCCU6_NUM_MODULES (2)

Definition at line 49 of file IfxCcu6_cfg.h.

Referenced by IfxCcu6_getAddress(), and IfxCcu6_getIndex().

◆ IFXCCU6_NUM_SERVICE_REQUESTS

#define IFXCCU6_NUM_SERVICE_REQUESTS (4)

Definition at line 51 of file IfxCcu6_cfg.h.

◆ IFXCCU6_NUM_T12_CHANNELS

#define IFXCCU6_NUM_T12_CHANNELS (3)

Definition at line 53 of file IfxCcu6_cfg.h.

◆ IFXCCU6_NUM_T13_CHANNELS

#define IFXCCU6_NUM_T13_CHANNELS (1)

Definition at line 55 of file IfxCcu6_cfg.h.

Enumeration Type Documentation

◆ IfxCcu6_Index

enum IfxCcu6_Index

List of the available CCU6 resources.

Enumerator
IfxCcu6_Index_none | Not Selected.
IfxCcu6_Index_0 | CCU6 index 0.
IfxCcu6_Index_1 | CCU6 index 1.

Definition at line 63 of file IfxCcu6_cfg.h.

◆ IfxCcu6_TrigOut

enum IfxCcu6_TrigOut
Enumerator
IfxCcu6_TrigOut_0 | Output Trigger Select for CCU6061 TRIG0.
IfxCcu6_TrigOut_1 | Output Trigger Select for CCU6061 TRIG1.
IfxCcu6_TrigOut_2 | Output Trigger Select for CCU6061 TRIG2.

Definition at line 70 of file IfxCcu6_cfg.h.

◆ IfxCcu6_TrigSel

enum IfxCcu6_TrigSel
Enumerator
IfxCcu6_TrigSel_cout63
IfxCcu6_TrigSel_cc60
IfxCcu6_TrigSel_cc61
IfxCcu6_TrigSel_cc62
IfxCcu6_TrigSel_sr1
IfxCcu6_TrigSel_sr3

Definition at line 77 of file IfxCcu6_cfg.h.

Variable Documentation

◆ IfxCcu6_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]

Definition at line 91 of file IfxCcu6_cfg.h.


iLLD_TC26B: IfxCcu6_PinMap.c File Reference

  • _PinMap
Variables
IfxCcu6_PinMap.c File Reference
iLLD » CCU6

CCU6 I/O map. More...

#include "IfxCcu6_PinMap.h"
Include dependency graph for IfxCcu6_PinMap.c:

Go to the source code of this file.

Variables

IfxCcu6_Cc60_Out | IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60_Out | IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b}
IfxCcu6_Cc60in_In | IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b}
IfxCcu6_Cc60in_In | IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61_Out | IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b}
IfxCcu6_Cc61in_In | IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b}
IfxCcu6_Cc61in_In | IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62_Out | IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b}
IfxCcu6_Cc62in_In | IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b}
IfxCcu6_Cc62in_In | IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c}
IfxCcu6_Ccpos0_In | IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d}
IfxCcu6_Ccpos0_In | IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a}
IfxCcu6_Ccpos0_In | IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c}
IfxCcu6_Ccpos1_In | IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c}
IfxCcu6_Ccpos1_In | IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b}
IfxCcu6_Ccpos2_In | IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxCcu6_Ccpos2_In | IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout60_Out | IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout61_Out | IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout62_Out | IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7}
IfxCcu6_Cout63_Out | IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7}
IfxCcu6_Ctrap_In | IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a}
IfxCcu6_Ctrap_In | IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a}
IfxCcu6_Ctrap_In | IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b}
IfxCcu6_T12hr_In | IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e}
IfxCcu6_T12hr_In | IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b}
IfxCcu6_T12hr_In | IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxCcu6_T12hr_In | IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e}
IfxCcu6_T13hr_In | IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b}
IfxCcu6_T13hr_In | IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}
IfxCcu6_T13hr_In | IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxCcu6_T13hr_In | IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}
const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]

Detailed Description

CCU6 I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_PinMap.c.

Variable Documentation

◆ IfxCcu60_CC60_P02_0_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7}

Definition at line 28 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P02_6_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7}

Definition at line 29 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P11_12_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7}

Definition at line 30 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60_P15_6_OUT

IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7}

Definition at line 31 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INA_P02_0_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a}

Definition at line 36 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INB_P00_1_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b}

Definition at line 37 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC60INC_P02_6_IN

IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c}

Definition at line 38 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P02_2_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7}

Definition at line 42 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P02_7_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7}

Definition at line 43 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P11_11_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7}

Definition at line 44 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61_P15_5_OUT

IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7}

Definition at line 45 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INA_P02_2_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a}

Definition at line 50 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INB_P00_3_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b}

Definition at line 51 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC61INC_P02_7_IN

IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c}

Definition at line 52 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P02_4_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7}

Definition at line 56 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P02_8_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7}

Definition at line 57 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P11_10_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7}

Definition at line 58 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62_P15_4_OUT

IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7}

Definition at line 59 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INA_P02_4_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a}

Definition at line 64 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INB_P00_5_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b}

Definition at line 65 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CC62INC_P02_8_IN

IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 66 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0A_P02_6_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 70 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0C_P10_4_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c}

Definition at line 71 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS0D_P40_0_IN

IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d}

Definition at line 72 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1A_P02_7_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 75 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1B_P40_1_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b}

Definition at line 76 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1C_P10_7_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c}

Definition at line 77 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS1D_P40_2_IN

IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d}

Definition at line 78 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2A_P02_8_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a}

Definition at line 83 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2B_P40_3_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b}

Definition at line 84 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CCPOS2C_P10_8_IN

IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c}

Definition at line 85 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P02_1_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7}

Definition at line 90 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P11_9_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7}

Definition at line 91 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT60_P15_7_OUT

IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7}

Definition at line 92 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P02_3_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7}

Definition at line 96 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P11_6_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7}

Definition at line 97 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT61_P15_8_OUT

IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7}

Definition at line 98 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P02_5_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7}

Definition at line 102 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P11_3_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7}

Definition at line 103 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT62_P14_0_OUT

IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7}

Definition at line 104 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P00_0_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7}

Definition at line 108 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P11_2_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7}

Definition at line 109 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P14_1_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7}

Definition at line 110 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_COUT63_P32_4_OUT

IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7}

Definition at line 111 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_CTRAPA_P00_11_IN

IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a}

Definition at line 115 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRB_P00_7_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b}

Definition at line 118 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRC_P00_9_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 119 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T12HRE_P00_0_IN

IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e}

Definition at line 120 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T13HRB_P00_8_IN

IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b}

Definition at line 124 of file IfxCcu6_PinMap.c.

◆ IfxCcu60_T13HRC_P00_9_IN

IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 125 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P00_1_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7}

Definition at line 32 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P00_7_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7}

Definition at line 33 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P20_8_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7}

Definition at line 34 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60_P33_13_OUT

IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7}

Definition at line 35 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INA_P00_1_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 39 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INB_P02_0_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b}

Definition at line 40 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC60INC_P00_7_IN

IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c}

Definition at line 41 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P00_3_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7}

Definition at line 46 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P00_8_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7}

Definition at line 47 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P20_9_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7}

Definition at line 48 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61_P33_11_OUT

IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7}

Definition at line 49 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INA_P00_3_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 53 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INB_P02_2_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b}

Definition at line 54 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC61INC_P00_8_IN

IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c}

Definition at line 55 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P00_5_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7}

Definition at line 60 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P00_9_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7}

Definition at line 61 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P20_10_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7}

Definition at line 62 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62_P33_9_OUT

IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7}

Definition at line 63 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INA_P00_5_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 67 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INB_P02_4_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b}

Definition at line 68 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CC62INC_P00_9_IN

IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c}

Definition at line 69 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS0A_P00_7_IN

IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a}

Definition at line 73 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS0C_P33_7_IN

IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c}

Definition at line 74 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1A_P00_8_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a}

Definition at line 79 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1B_P40_6_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b}

Definition at line 80 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1C_P33_6_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c}

Definition at line 81 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS1D_P40_7_IN

IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d}

Definition at line 82 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2A_P00_9_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a}

Definition at line 86 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2B_P40_8_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b}

Definition at line 87 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2C_P33_5_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 88 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CCPOS2D_P40_9_IN

IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d}

Definition at line 89 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P00_2_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7}

Definition at line 93 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P20_11_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7}

Definition at line 94 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT60_P33_12_OUT

IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7}

Definition at line 95 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P00_4_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7}

Definition at line 99 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P20_12_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7}

Definition at line 100 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT61_P33_10_OUT

IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7}

Definition at line 101 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P00_6_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7}

Definition at line 105 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P20_13_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7}

Definition at line 106 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT62_P33_8_OUT

IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7}

Definition at line 107 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P00_10_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7}

Definition at line 112 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P00_12_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7}

Definition at line 113 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_COUT63_P20_7_OUT

IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7}

Definition at line 114 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CTRAPA_P00_0_IN

IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a}

Definition at line 116 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_CTRAPC_P33_4_IN

IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c}

Definition at line 117 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRB_P02_6_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b}

Definition at line 121 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRC_P02_8_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 122 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T12HRE_P00_11_IN

IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e}

Definition at line 123 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T13HRB_P02_7_IN

IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 126 of file IfxCcu6_PinMap.c.

◆ IfxCcu61_T13HRC_P02_8_IN

IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 127 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc60_Out_pinTable

const IfxCcu6_Cc60_Out* IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC60_P02_0_OUT,
&IfxCcu60_CC60_P02_6_OUT,
&IfxCcu60_CC60_P11_12_OUT,
&IfxCcu60_CC60_P15_6_OUT
},
{
&IfxCcu61_CC60_P00_1_OUT,
&IfxCcu61_CC60_P00_7_OUT,
&IfxCcu61_CC60_P20_8_OUT,
&IfxCcu61_CC60_P33_13_OUT
}
}
IfxCcu60_CC60_P02_0_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
Definition: IfxCcu6_PinMap.c:28
IfxCcu61_CC60_P33_13_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
Definition: IfxCcu6_PinMap.c:35
IfxCcu60_CC60_P02_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
Definition: IfxCcu6_PinMap.c:29
IfxCcu61_CC60_P00_7_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
Definition: IfxCcu6_PinMap.c:33
IfxCcu61_CC60_P00_1_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
Definition: IfxCcu6_PinMap.c:32
IfxCcu60_CC60_P11_12_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
Definition: IfxCcu6_PinMap.c:30
IfxCcu61_CC60_P20_8_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
Definition: IfxCcu6_PinMap.c:34
IfxCcu60_CC60_P15_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
Definition: IfxCcu6_PinMap.c:31

Definition at line 130 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc60in_In_pinTable

const IfxCcu6_Cc60in_In* IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC60INA_P02_0_IN,
&IfxCcu60_CC60INB_P00_1_IN,
&IfxCcu60_CC60INC_P02_6_IN
},
{
&IfxCcu61_CC60INA_P00_1_IN,
&IfxCcu61_CC60INB_P02_0_IN,
&IfxCcu61_CC60INC_P00_7_IN
}
}
IfxCcu60_CC60INC_P02_6_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
Definition: IfxCcu6_PinMap.c:38
IfxCcu61_CC60INC_P00_7_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
Definition: IfxCcu6_PinMap.c:41
IfxCcu60_CC60INA_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
Definition: IfxCcu6_PinMap.c:36
IfxCcu61_CC60INB_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
Definition: IfxCcu6_PinMap.c:40
IfxCcu61_CC60INA_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
Definition: IfxCcu6_PinMap.c:39
IfxCcu60_CC60INB_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
Definition: IfxCcu6_PinMap.c:37

Definition at line 145 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc61_Out_pinTable

const IfxCcu6_Cc61_Out* IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC61_P02_2_OUT,
&IfxCcu60_CC61_P02_7_OUT,
&IfxCcu60_CC61_P11_11_OUT,
&IfxCcu60_CC61_P15_5_OUT
},
{
&IfxCcu61_CC61_P00_3_OUT,
&IfxCcu61_CC61_P00_8_OUT,
&IfxCcu61_CC61_P20_9_OUT,
&IfxCcu61_CC61_P33_11_OUT
}
}
IfxCcu60_CC61_P02_2_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
Definition: IfxCcu6_PinMap.c:42
IfxCcu60_CC61_P02_7_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
Definition: IfxCcu6_PinMap.c:43
IfxCcu60_CC61_P11_11_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
Definition: IfxCcu6_PinMap.c:44
IfxCcu61_CC61_P00_3_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
Definition: IfxCcu6_PinMap.c:46
IfxCcu61_CC61_P33_11_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
Definition: IfxCcu6_PinMap.c:49
IfxCcu61_CC61_P00_8_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
Definition: IfxCcu6_PinMap.c:47
IfxCcu61_CC61_P20_9_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
Definition: IfxCcu6_PinMap.c:48
IfxCcu60_CC61_P15_5_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
Definition: IfxCcu6_PinMap.c:45

Definition at line 158 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc61in_In_pinTable

const IfxCcu6_Cc61in_In* IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC61INA_P02_2_IN,
&IfxCcu60_CC61INB_P00_3_IN,
&IfxCcu60_CC61INC_P02_7_IN
},
{
&IfxCcu61_CC61INA_P00_3_IN,
&IfxCcu61_CC61INB_P02_2_IN,
&IfxCcu61_CC61INC_P00_8_IN
}
}
IfxCcu60_CC61INB_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
Definition: IfxCcu6_PinMap.c:51
IfxCcu60_CC61INA_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
Definition: IfxCcu6_PinMap.c:50
IfxCcu60_CC61INC_P02_7_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
Definition: IfxCcu6_PinMap.c:52
IfxCcu61_CC61INB_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
Definition: IfxCcu6_PinMap.c:54
IfxCcu61_CC61INC_P00_8_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
Definition: IfxCcu6_PinMap.c:55
IfxCcu61_CC61INA_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
Definition: IfxCcu6_PinMap.c:53

Definition at line 173 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc62_Out_pinTable

const IfxCcu6_Cc62_Out* IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC62_P02_4_OUT,
&IfxCcu60_CC62_P02_8_OUT,
&IfxCcu60_CC62_P11_10_OUT,
&IfxCcu60_CC62_P15_4_OUT
},
{
&IfxCcu61_CC62_P00_5_OUT,
&IfxCcu61_CC62_P00_9_OUT,
&IfxCcu61_CC62_P20_10_OUT,
&IfxCcu61_CC62_P33_9_OUT
}
}
IfxCcu61_CC62_P33_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
Definition: IfxCcu6_PinMap.c:63
IfxCcu61_CC62_P00_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
Definition: IfxCcu6_PinMap.c:61
IfxCcu61_CC62_P20_10_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
Definition: IfxCcu6_PinMap.c:62
IfxCcu61_CC62_P00_5_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
Definition: IfxCcu6_PinMap.c:60
IfxCcu60_CC62_P02_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
Definition: IfxCcu6_PinMap.c:56
IfxCcu60_CC62_P15_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
Definition: IfxCcu6_PinMap.c:59
IfxCcu60_CC62_P02_8_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
Definition: IfxCcu6_PinMap.c:57
IfxCcu60_CC62_P11_10_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
Definition: IfxCcu6_PinMap.c:58

Definition at line 186 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cc62in_In_pinTable

const IfxCcu6_Cc62in_In* IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CC62INA_P02_4_IN,
&IfxCcu60_CC62INB_P00_5_IN,
&IfxCcu60_CC62INC_P02_8_IN
},
{
&IfxCcu61_CC62INA_P00_5_IN,
&IfxCcu61_CC62INB_P02_4_IN,
&IfxCcu61_CC62INC_P00_9_IN
}
}
IfxCcu61_CC62INB_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
Definition: IfxCcu6_PinMap.c:68
IfxCcu60_CC62INC_P02_8_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
Definition: IfxCcu6_PinMap.c:66
IfxCcu61_CC62INC_P00_9_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
Definition: IfxCcu6_PinMap.c:69
IfxCcu60_CC62INB_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
Definition: IfxCcu6_PinMap.c:65
IfxCcu60_CC62INA_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
Definition: IfxCcu6_PinMap.c:64
IfxCcu61_CC62INA_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
Definition: IfxCcu6_PinMap.c:67

Definition at line 201 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos0_In_pinTable

const IfxCcu6_Ccpos0_In* IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS0A_P02_6_IN,
NULL_PTR,
&IfxCcu60_CCPOS0C_P10_4_IN,
&IfxCcu60_CCPOS0D_P40_0_IN
},
{
&IfxCcu61_CCPOS0A_P00_7_IN,
NULL_PTR,
&IfxCcu61_CCPOS0C_P33_7_IN,
NULL_PTR
}
}
IfxCcu60_CCPOS0A_P02_6_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Definition: IfxCcu6_PinMap.c:70
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu61_CCPOS0C_P33_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Definition: IfxCcu6_PinMap.c:74
IfxCcu60_CCPOS0C_P10_4_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Definition: IfxCcu6_PinMap.c:71
IfxCcu61_CCPOS0A_P00_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Definition: IfxCcu6_PinMap.c:73
IfxCcu60_CCPOS0D_P40_0_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Definition: IfxCcu6_PinMap.c:72

Definition at line 214 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos1_In_pinTable

const IfxCcu6_Ccpos1_In* IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS1A_P02_7_IN,
&IfxCcu60_CCPOS1B_P40_1_IN,
&IfxCcu60_CCPOS1C_P10_7_IN,
&IfxCcu60_CCPOS1D_P40_2_IN
},
{
&IfxCcu61_CCPOS1A_P00_8_IN,
&IfxCcu61_CCPOS1B_P40_6_IN,
&IfxCcu61_CCPOS1C_P33_6_IN,
&IfxCcu61_CCPOS1D_P40_7_IN
}
}
IfxCcu61_CCPOS1A_P00_8_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Definition: IfxCcu6_PinMap.c:79
IfxCcu60_CCPOS1C_P10_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Definition: IfxCcu6_PinMap.c:77
IfxCcu60_CCPOS1A_P02_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Definition: IfxCcu6_PinMap.c:75
IfxCcu61_CCPOS1C_P33_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Definition: IfxCcu6_PinMap.c:81
IfxCcu60_CCPOS1B_P40_1_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Definition: IfxCcu6_PinMap.c:76
IfxCcu61_CCPOS1B_P40_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Definition: IfxCcu6_PinMap.c:80
IfxCcu61_CCPOS1D_P40_7_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Definition: IfxCcu6_PinMap.c:82
IfxCcu60_CCPOS1D_P40_2_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Definition: IfxCcu6_PinMap.c:78

Definition at line 229 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ccpos2_In_pinTable

const IfxCcu6_Ccpos2_In* IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CCPOS2A_P02_8_IN,
&IfxCcu60_CCPOS2B_P40_3_IN,
&IfxCcu60_CCPOS2C_P10_8_IN,
NULL_PTR
},
{
&IfxCcu61_CCPOS2A_P00_9_IN,
&IfxCcu61_CCPOS2B_P40_8_IN,
&IfxCcu61_CCPOS2C_P33_5_IN,
&IfxCcu61_CCPOS2D_P40_9_IN
}
}
IfxCcu60_CCPOS2A_P02_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Definition: IfxCcu6_PinMap.c:83
IfxCcu61_CCPOS2D_P40_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Definition: IfxCcu6_PinMap.c:89
IfxCcu61_CCPOS2B_P40_8_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Definition: IfxCcu6_PinMap.c:87
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu61_CCPOS2A_P00_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Definition: IfxCcu6_PinMap.c:86
IfxCcu60_CCPOS2C_P10_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Definition: IfxCcu6_PinMap.c:85
IfxCcu61_CCPOS2C_P33_5_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Definition: IfxCcu6_PinMap.c:88
IfxCcu60_CCPOS2B_P40_3_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Definition: IfxCcu6_PinMap.c:84

Definition at line 244 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout60_Out_pinTable

const IfxCcu6_Cout60_Out* IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT60_P02_1_OUT,
&IfxCcu60_COUT60_P11_9_OUT,
&IfxCcu60_COUT60_P15_7_OUT
},
{
&IfxCcu61_COUT60_P00_2_OUT,
&IfxCcu61_COUT60_P20_11_OUT,
&IfxCcu61_COUT60_P33_12_OUT
}
}
IfxCcu61_COUT60_P00_2_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
Definition: IfxCcu6_PinMap.c:93
IfxCcu61_COUT60_P33_12_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
Definition: IfxCcu6_PinMap.c:95
IfxCcu60_COUT60_P11_9_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
Definition: IfxCcu6_PinMap.c:91
IfxCcu60_COUT60_P02_1_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
Definition: IfxCcu6_PinMap.c:90
IfxCcu61_COUT60_P20_11_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
Definition: IfxCcu6_PinMap.c:94
IfxCcu60_COUT60_P15_7_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
Definition: IfxCcu6_PinMap.c:92

Definition at line 259 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout61_Out_pinTable

const IfxCcu6_Cout61_Out* IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT61_P02_3_OUT,
&IfxCcu60_COUT61_P11_6_OUT,
&IfxCcu60_COUT61_P15_8_OUT
},
{
&IfxCcu61_COUT61_P00_4_OUT,
&IfxCcu61_COUT61_P20_12_OUT,
&IfxCcu61_COUT61_P33_10_OUT
}
}
IfxCcu61_COUT61_P20_12_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
Definition: IfxCcu6_PinMap.c:100
IfxCcu60_COUT61_P11_6_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
Definition: IfxCcu6_PinMap.c:97
IfxCcu60_COUT61_P02_3_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
Definition: IfxCcu6_PinMap.c:96
IfxCcu60_COUT61_P15_8_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
Definition: IfxCcu6_PinMap.c:98
IfxCcu61_COUT61_P00_4_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
Definition: IfxCcu6_PinMap.c:99
IfxCcu61_COUT61_P33_10_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
Definition: IfxCcu6_PinMap.c:101

Definition at line 272 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout62_Out_pinTable

const IfxCcu6_Cout62_Out* IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT62_P02_5_OUT,
&IfxCcu60_COUT62_P11_3_OUT,
&IfxCcu60_COUT62_P14_0_OUT
},
{
&IfxCcu61_COUT62_P00_6_OUT,
&IfxCcu61_COUT62_P20_13_OUT,
&IfxCcu61_COUT62_P33_8_OUT
}
}
IfxCcu61_COUT62_P00_6_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
Definition: IfxCcu6_PinMap.c:105
IfxCcu60_COUT62_P02_5_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
Definition: IfxCcu6_PinMap.c:102
IfxCcu60_COUT62_P14_0_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
Definition: IfxCcu6_PinMap.c:104
IfxCcu60_COUT62_P11_3_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
Definition: IfxCcu6_PinMap.c:103
IfxCcu61_COUT62_P33_8_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
Definition: IfxCcu6_PinMap.c:107
IfxCcu61_COUT62_P20_13_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
Definition: IfxCcu6_PinMap.c:106

Definition at line 285 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Cout63_Out_pinTable

const IfxCcu6_Cout63_Out* IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_COUT63_P00_0_OUT,
&IfxCcu60_COUT63_P11_2_OUT,
&IfxCcu60_COUT63_P14_1_OUT,
&IfxCcu60_COUT63_P32_4_OUT
},
{
&IfxCcu61_COUT63_P00_10_OUT,
&IfxCcu61_COUT63_P00_12_OUT,
&IfxCcu61_COUT63_P20_7_OUT,
NULL_PTR
}
}
IfxCcu60_COUT63_P11_2_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
Definition: IfxCcu6_PinMap.c:109
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu60_COUT63_P14_1_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
Definition: IfxCcu6_PinMap.c:110
IfxCcu60_COUT63_P00_0_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
Definition: IfxCcu6_PinMap.c:108
IfxCcu61_COUT63_P20_7_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
Definition: IfxCcu6_PinMap.c:114
IfxCcu61_COUT63_P00_12_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
Definition: IfxCcu6_PinMap.c:113
IfxCcu60_COUT63_P32_4_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
Definition: IfxCcu6_PinMap.c:111
IfxCcu61_COUT63_P00_10_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
Definition: IfxCcu6_PinMap.c:112

Definition at line 298 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_Ctrap_In_pinTable

const IfxCcu6_Ctrap_In* IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxCcu60_CTRAPA_P00_11_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxCcu61_CTRAPA_P00_0_IN,
NULL_PTR,
&IfxCcu61_CTRAPC_P33_4_IN
}
}
IfxCcu60_CTRAPA_P00_11_IN
IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Definition: IfxCcu6_PinMap.c:115
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu61_CTRAPA_P00_0_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Definition: IfxCcu6_PinMap.c:116
IfxCcu61_CTRAPC_P33_4_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Definition: IfxCcu6_PinMap.c:117

Definition at line 313 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_T12hr_In_pinTable

const IfxCcu6_T12hr_In* IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxCcu60_T12HRB_P00_7_IN,
&IfxCcu60_T12HRC_P00_9_IN,
NULL_PTR,
&IfxCcu60_T12HRE_P00_0_IN
},
{
NULL_PTR,
&IfxCcu61_T12HRB_P02_6_IN,
&IfxCcu61_T12HRC_P02_8_IN,
NULL_PTR,
&IfxCcu61_T12HRE_P00_11_IN
}
}
IfxCcu61_T12HRB_P02_6_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
Definition: IfxCcu6_PinMap.c:121
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu60_T12HRB_P00_7_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
Definition: IfxCcu6_PinMap.c:118
IfxCcu60_T12HRC_P00_9_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:119
IfxCcu60_T12HRE_P00_0_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
Definition: IfxCcu6_PinMap.c:120
IfxCcu61_T12HRC_P02_8_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:122
IfxCcu61_T12HRE_P00_11_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
Definition: IfxCcu6_PinMap.c:123

Definition at line 326 of file IfxCcu6_PinMap.c.

◆ IfxCcu6_T13hr_In_pinTable

const IfxCcu6_T13hr_In* IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxCcu60_T13HRB_P00_8_IN,
&IfxCcu60_T13HRC_P00_9_IN
},
{
NULL_PTR,
&IfxCcu61_T13HRB_P02_7_IN,
&IfxCcu61_T13HRC_P02_8_IN
}
}
IfxCcu60_T13HRB_P00_8_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
Definition: IfxCcu6_PinMap.c:124
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu60_T13HRC_P00_9_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:125
IfxCcu61_T13HRC_P02_8_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:127
IfxCcu61_T13HRB_P02_7_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
Definition: IfxCcu6_PinMap.c:126

Definition at line 343 of file IfxCcu6_PinMap.c.


iLLD_TC26B: IfxCcu6_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxCcu6_PinMap.h File Reference
iLLD » CCU6

CCU6 I/O map. More...

#include <IfxCcu6_reg.h>
#include <_Impl/IfxCcu6_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxCcu6_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Cc60in_In
CC60IN pin mapping structure. More...
struct | IfxCcu6_Cc61in_In
CC61IN pin mapping structure. More...
struct | IfxCcu6_Cc62in_In
CC62IN pin mapping structure. More...
struct | IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure. More...
struct | IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure. More...
struct | IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure. More...
struct | IfxCcu6_Ctrap_In
CTRAP pin mapping structure. More...
struct | IfxCcu6_T12hr_In
T12HR pin mapping structure. More...
struct | IfxCcu6_T13hr_In
T13HR pin mapping structure. More...
struct | IfxCcu6_Cc60_Out
CC60 pin mapping structure. More...
struct | IfxCcu6_Cc61_Out
CC61 pin mapping structure. More...
struct | IfxCcu6_Cc62_Out
CC62 pin mapping structure. More...
struct | IfxCcu6_Cout60_Out
COUT60 pin mapping structure. More...
struct | IfxCcu6_Cout61_Out
COUT61 pin mapping structure. More...
struct | IfxCcu6_Cout62_Out
COUT62 pin mapping structure. More...
struct | IfxCcu6_Cout63_Out
COUT63 pin mapping structure. More...

Macros

#define | IFXCCU6_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4
#define | IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
#define | IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
#define | IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3

Variables

IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
CCU60_CC60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
CCU61_CC60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
CCU60_CC60INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
CCU60_CC60INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
CCU60_CC60INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
CCU61_CC60INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
CCU61_CC60INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
CCU61_CC60INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
CCU60_CC61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
CCU61_CC61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
CCU60_CC61INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
CCU60_CC61INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
CCU60_CC61INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
CCU61_CC61INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
CCU61_CC61INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
CCU61_CC61INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
CCU60_CC62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
CCU61_CC62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
CCU60_CC62INA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
CCU60_CC62INB: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
CCU60_CC62INC: CCU60 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
CCU61_CC62INA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
CCU61_CC62INB: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
CCU61_CC62INC: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
CCU60_CCPOS0A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
CCU60_CCPOS0C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
CCU60_CCPOS0D: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
CCU61_CCPOS0A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
CCU61_CCPOS0C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
CCU60_CCPOS1A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
CCU60_CCPOS1B: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
CCU60_CCPOS1C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
CCU60_CCPOS1D: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
CCU61_CCPOS1A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
CCU61_CCPOS1B: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
CCU61_CCPOS1C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
CCU61_CCPOS1D: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
CCU60_CCPOS2A: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
CCU60_CCPOS2B: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
CCU60_CCPOS2C: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
CCU61_CCPOS2A: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
CCU61_CCPOS2B: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
CCU61_CCPOS2C: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
CCU61_CCPOS2D: CCU61 input. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
CCU60_COUT60: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
CCU61_COUT60: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
CCU60_COUT61: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
CCU61_COUT61: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
CCU60_COUT62: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
CCU61_COUT62: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
CCU60_COUT63: CCU60 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
CCU61_COUT63: CCU61 output. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
CCU60_CTRAPA: CCU60 input. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
CCU61_CTRAPA: CCU61 input. More...
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
CCU61_CTRAPC: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
CCU60_T12HRB: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
CCU60_T12HRC: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
CCU60_T12HRE: CCU60 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
CCU61_T12HRB: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
CCU61_T12HRC: CCU61 input. More...
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
CCU61_T12HRE: CCU61 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
CCU60_T13HRB: CCU60 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
CCU60_T13HRC: CCU60 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
CCU61_T13HRB: CCU61 input. More...
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
CCU61_T13HRC: CCU61 input. More...
IFX_EXTERN const IfxCcu6_Cc60_Out * | IfxCcu6_Cc60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table. More...
IFX_EXTERN const IfxCcu6_Cc60in_In * | IfxCcu6_Cc60in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table. More...
IFX_EXTERN const IfxCcu6_Cc61_Out * | IfxCcu6_Cc61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table. More...
IFX_EXTERN const IfxCcu6_Cc61in_In * | IfxCcu6_Cc61in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table. More...
IFX_EXTERN const IfxCcu6_Cc62_Out * | IfxCcu6_Cc62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table. More...
IFX_EXTERN const IfxCcu6_Cc62in_In * | IfxCcu6_Cc62in_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos0_In * | IfxCcu6_Ccpos0_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos1_In * | IfxCcu6_Ccpos1_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table. More...
IFX_EXTERN const IfxCcu6_Ccpos2_In * | IfxCcu6_Ccpos2_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table. More...
IFX_EXTERN const IfxCcu6_Cout60_Out * | IfxCcu6_Cout60_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table. More...
IFX_EXTERN const IfxCcu6_Cout61_Out * | IfxCcu6_Cout61_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table. More...
IFX_EXTERN const IfxCcu6_Cout62_Out * | IfxCcu6_Cout62_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table. More...
IFX_EXTERN const IfxCcu6_Cout63_Out * | IfxCcu6_Cout63_Out_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table. More...
IFX_EXTERN const IfxCcu6_Ctrap_In * | IfxCcu6_Ctrap_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table. More...
IFX_EXTERN const IfxCcu6_T12hr_In * | IfxCcu6_T12hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table. More...
IFX_EXTERN const IfxCcu6_T13hr_In * | IfxCcu6_T13hr_In_pinTable [IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table. More...

Detailed Description

CCU6 I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_PinMap.h.


iLLD_TC26B: IfxCcu6_Icu.h File Reference

  • Ccu6
  • Icu
Data Structures | Functions
IfxCcu6_Icu.h File Reference
iLLD » CCU6

CCU6 ICU details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/Icu.h"
#include "Ccu6/Timer/IfxCcu6_Timer.h"
Include dependency graph for IfxCcu6_Icu.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Icu_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Icu_Pins
Structure for capture input pins. More...
struct | IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Icu
Module handle. More...
struct | IfxCcu6_Icu_Channel
Channel handle. More...
struct | IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel. More...
struct | IfxCcu6_Icu_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
IFX_EXTERN void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...

Detailed Description

CCU6 ICU details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_Icu.h.


iLLD_TC26B: IfxCcu6_PwmBc.h File Reference

  • Ccu6
  • PwmBc
Data Structures | Functions
IfxCcu6_PwmBc.h File Reference
iLLD » CCU6

CCU6 PWMBC details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/PwmHl.h"
Include dependency graph for IfxCcu6_PwmBc.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control. More...
struct | IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_PwmBc_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_PwmBc_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_PwmBc
Module handle. More...
struct | IfxCcu6_PwmBc_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
IFX_EXTERN void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...
IFX_EXTERN uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
IFX_EXTERN void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

CCU6 PWMBC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_PwmBc.h.


iLLD_TC26B: IfxCcu6_PwmHl.h File Reference

  • Ccu6
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxCcu6_PwmHl.h File Reference
iLLD » CCU6

CCU6 PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h"
Include dependency graph for IfxCcu6_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration. More...
struct | IfxCcu6_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxCcu6_PwmHl_s
CCU6 PWM driver. More...

Macros

#define IFXCCU6_PWMHL_MAX_CHANNELS (3)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output. More...

Typedefs

typedef struct IfxCcu6_PwmHl_s | IfxCcu6_PwmHl
typedef void(* | IfxCcu6_PwmHl_Update) (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)

Functions

IFX_EXTERN boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
IFX_EXTERN void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_INLINE Ifx_ActiveState | IfxCcu6_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
IFX_EXTERN void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_EXTERN boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

CCU6 PWMHL details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_PwmHl.h.

Macro Definition Documentation

◆ IFXCCU6_PWMHL_MAX_CHANNELS

#define IFXCCU6_PWMHL_MAX_CHANNELS (3)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output.

Definition at line 61 of file IfxCcu6_PwmHl.h.

Referenced by IfxCcu6_PwmHl_init().

Typedef Documentation

◆ IfxCcu6_PwmHl

typedef struct IfxCcu6_PwmHl_s IfxCcu6_PwmHl

Definition at line 67 of file IfxCcu6_PwmHl.h.

◆ IfxCcu6_PwmHl_Update

typedef void(* IfxCcu6_PwmHl_Update) (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 69 of file IfxCcu6_PwmHl.h.


iLLD_TC26B: IfxCcu6.h File Reference

  • Ccu6
  • Std
Enumerations | Functions
IfxCcu6.h File Reference
iLLD » CCU6

CCU6 basic functionality. More...

#include "_Impl/IfxCcu6_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_Utilities/Ifx_Assert.h"
#include "_PinMap/IfxCcu6_PinMap.h"
Include dependency graph for IfxCcu6.h:

Go to the source code of this file.

Enumerations

enum IfxCcu6_CaptureCompareInput {
IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF,
IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF,
IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF,
IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF,
IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF,
IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF,
IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF
}
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
Definition in Ifx_CCU.PISEL0. More...
enum IfxCcu6_CaptureCompareInputSignal {
IfxCcu6_CaptureCompareInputSignal_a = 0,
IfxCcu6_CaptureCompareInputSignal_b = 1,
IfxCcu6_CaptureCompareInputSignal_c = 2,
IfxCcu6_CaptureCompareInputSignal_d = 3
}
Selection of actual input signal for the capture compare inputs. More...
enum IfxCcu6_CaptureCompareState {
IfxCcu6_CaptureCompareState_set = 0,
IfxCcu6_CaptureCompareState_clear = 1,
IfxCcu6_CaptureCompareState_toggle = 2
}
capture/compare state to set / clear the CC6xST-bits More...
enum IfxCcu6_ChannelOut {
IfxCcu6_ChannelOut_cc0 = 0,
IfxCcu6_ChannelOut_cout0 = 1,
IfxCcu6_ChannelOut_cc1 = 2,
IfxCcu6_ChannelOut_cout1 = 3,
IfxCcu6_ChannelOut_cc2 = 4,
IfxCcu6_ChannelOut_cout2 = 5,
IfxCcu6_ChannelOut_cout3 = 6
}
Capture compare output pins. More...
enum IfxCcu6_CountingInputMode {
IfxCcu6_CountingInputMode_internal = 0,
IfxCcu6_CountingInputMode_manual = 1,
IfxCcu6_CountingInputMode_externalRising = 2,
IfxCcu6_CountingInputMode_externalFalling = 3
}
Defines the input event leading to a counting action of the timer (T12 / T13)
Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13. More...
enum IfxCcu6_DelayBypass {
IfxCcu6_DelayBypass_notActive = 0,
IfxCcu6_DelayBypass_active = 1
}
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0
Definition in Ifx_CCU.T12MSEL.B.DBYP. More...
enum IfxCcu6_ExternalTriggerMode {
IfxCcu6_ExternalTriggerMode_disable = 0,
IfxCcu6_ExternalTriggerMode_risingEdge = 1,
IfxCcu6_ExternalTriggerMode_fallingEdge = 2,
IfxCcu6_ExternalTriggerMode_anyEdge = 3
}
Defines the event of signal T1xHR that can set the run bit T1xR by HW
Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL. More...
enum IfxCcu6_HallSensorTriggerMode {
IfxCcu6_HallSensorTriggerMode_permanentCheck = 0,
IfxCcu6_HallSensorTriggerMode_cM63 = 1,
IfxCcu6_HallSensorTriggerMode_t13PM = 2,
IfxCcu6_HallSensorTriggerMode_off = 3,
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4,
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5,
IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6,
IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7
}
Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
Definition in Ifx_CCU.T12MSEL.HSYNC. More...
enum IfxCcu6_InterruptSource {
IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF,
IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF,
IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF,
IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF,
IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF,
IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF,
IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF,
IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF,
IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF,
IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF,
IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF,
IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF,
IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF
}
Interrupt source selection Description in Ifx_CCU.IEN. More...
enum IfxCcu6_MultiChannelSwitchingSelect {
IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0,
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1,
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2,
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3,
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4,
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5
}
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
Definition in Ifx_CCU.MCMCTR.B.SWSEL. More...
enum IfxCcu6_MultiChannelSwitchingSync {
IfxCcu6_MultiChannelSwitchingSync_direct = 0,
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1,
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2
}
Selection of the synchronization mechanism for the shadow transfer event MCM_ST
Definition in Ifx_CCU.MCMCTR.B.SWSYN. More...
enum IfxCcu6_ServiceRequest {
IfxCcu6_ServiceRequest_0 = 0,
IfxCcu6_ServiceRequest_1,
IfxCcu6_ServiceRequest_2,
IfxCcu6_ServiceRequest_3
}
Selection of service request outputs. More...
enum IfxCcu6_SleepMode {
IfxCcu6_SleepMode_enable = 0,
IfxCcu6_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CCU6.CLC.B.EDIS. More...
enum IfxCcu6_SuspendMode {
IfxCcu6_SuspendMode_none = 0,
IfxCcu6_SuspendMode_hard = 1,
IfxCcu6_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxCcu6_T12Channel {
IfxCcu6_T12Channel_0 = 0,
IfxCcu6_T12Channel_1,
IfxCcu6_T12Channel_2
}
Capture compare channel of Timer12. More...
enum IfxCcu6_T12ChannelMode {
IfxCcu6_T12ChannelMode_off = 0,
IfxCcu6_T12ChannelMode_compareMode = 1,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6,
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7,
IfxCcu6_T12ChannelMode_hallSensor = 8,
IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9,
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10,
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11,
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12,
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13,
IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14
}
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x. More...
enum IfxCcu6_T12CountDirection {
IfxCcu6_T12CountDirection_up = 0,
IfxCcu6_T12CountDirection_down = 1
}
Counting direction of Timer12
Definition in Ifx_CCU.TCTR0.B.CDIR. More...
enum IfxCcu6_T12CountMode {
IfxCcu6_T12CountMode_edgeAligned = 0,
IfxCcu6_T12CountMode_centerAligned = 1
}
Operating mode of Timer 12
Definition in Ifx_CCU.TCTR0.B.CTM. More...
enum IfxCcu6_T13TriggerDirection {
IfxCcu6_T13TriggerDirection_noAction = 0,
IfxCcu6_T13TriggerDirection_onT12CountingUp = 1,
IfxCcu6_T13TriggerDirection_onT12CountingDown = 2,
IfxCcu6_T13TriggerDirection_anyT12 = 3
}
Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.
Definition in Ifx_CCU.TCTR2.B.T13TED. More...
enum IfxCcu6_T13TriggerEvent {
IfxCcu6_T13TriggerEvent_noAction = 0,
IfxCcu6_T13TriggerEvent_onCC60RCompare = 1,
IfxCcu6_T13TriggerEvent_onCC61RCompare = 2,
IfxCcu6_T13TriggerEvent_onCC62RCompare = 3,
IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4,
IfxCcu6_T13TriggerEvent_onT12Period = 5,
IfxCcu6_T13TriggerEvent_onT12Zero = 6,
IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7
}
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)
Definition in Ifx_CCU.TCTR2.B.T13TEC. More...
enum IfxCcu6_TimerId {
IfxCcu6_TimerId_t12 = 0,
IfxCcu6_TimerId_t13 = 1
}
Timer number ( T12 / T13 ) More...
enum IfxCcu6_TimerInputClock {
IfxCcu6_TimerInputClock_fcc6 = 0,
IfxCcu6_TimerInputClock_fcc6By2 = 1,
IfxCcu6_TimerInputClock_fcc6By4 = 2,
IfxCcu6_TimerInputClock_fcc6By8 = 3,
IfxCcu6_TimerInputClock_fcc6By16 = 4,
IfxCcu6_TimerInputClock_fcc6By32 = 5,
IfxCcu6_TimerInputClock_fcc6By64 = 6,
IfxCcu6_TimerInputClock_fcc6By128 = 7
}
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation
Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK. More...
enum IfxCcu6_TimerInputSignal {
IfxCcu6_TimerInputSignal_a = 0,
IfxCcu6_TimerInputSignal_b = 1,
IfxCcu6_TimerInputSignal_c = 2,
IfxCcu6_TimerInputSignal_d = 3,
IfxCcu6_TimerInputSignal_e = 0,
IfxCcu6_TimerInputSignal_f = 1,
IfxCcu6_TimerInputSignal_g = 2,
IfxCcu6_TimerInputSignal_h = 3
}
Selection of actual input signal for the timer inputs. More...
enum IfxCcu6_TimerRunStatus {
IfxCcu6_TimerRunStatus_stopped = 0,
IfxCcu6_TimerRunStatus_running = 1
}
Timer (T12 / T13) run status
Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R. More...
enum IfxCcu6_TrapMode {
IfxCcu6_TrapMode_automatic = 0,
IfxCcu6_TrapMode_manual = 1
}
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)
Definition in Ifx_CCU.TRPCTR.B.TRPM2. More...
enum IfxCcu6_TrapState {
IfxCcu6_TrapState_t12Sync = 0,
IfxCcu6_TrapState_t13Sync = 1,
IfxCcu6_TrapState_immediate = 3
}
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again
Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1) More...

Functions

IFX_INLINE void | IfxCcu6_clearCounter (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_clearDeadTimeCounters (Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero. More...
IFX_INLINE void | IfxCcu6_clearInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_clearT12OneNotification (Ifx_CCU6 *ccu6)
Clears the T12 One notification. More...
IFX_INLINE void | IfxCcu6_clearT12PeriodNotification (Ifx_CCU6 *ccu6)
Clears the T12 period notification. More...
IFX_INLINE void | IfxCcu6_clearT13CompareNotification (Ifx_CCU6 *ccu6)
Clears the T13 compare notification. More...
IFX_INLINE volatile uint32 * | IfxCcu6_getT12TimerPointer (Ifx_CCU6 *ccu6)
Returns the Timer pointer. More...
IFX_INLINE boolean | IfxCcu6_isModuleEnabled (Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxCcu6_isT12OneNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 one notification. More...
IFX_INLINE boolean | IfxCcu6_isT12PeriodNotification (Ifx_CCU6 *ccu6)
Returns the status of T12 period notification. More...
IFX_INLINE boolean | IfxCcu6_isT13CompareNotification (Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification. More...
IFX_INLINE void | IfxCcu6_setCountingInputMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13). More...
IFX_INLINE void | IfxCcu6_setCurrentHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setDeadTimeValue (Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (dead time) More...
IFX_INLINE void | IfxCcu6_setExpectedHallPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setExternalRunMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW. More...
IFX_INLINE void | IfxCcu6_setHallSensorTriggerMode (Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields. More...
IFX_INLINE void | IfxCcu6_setInputClockFrequency (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13) More...
IFX_INLINE void | IfxCcu6_setInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag. More...
IFX_INLINE void | IfxCcu6_setMultiChannelPwmPattern (Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingMode (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP. More...
IFX_INLINE void | IfxCcu6_setMultiChannelSwitchingSync (Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST
if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1. More...
IFX_INLINE void | IfxCcu6_setOutputPassiveState (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state. More...
IFX_INLINE void | IfxCcu6_setSingleShotModeEnable (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_setT12ChannelMode (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels. More...
IFX_INLINE void | IfxCcu6_setT12CountMode (Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
IFX_INLINE void | IfxCcu6_setT12CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12. More...
IFX_INLINE void | IfxCcu6_setT12PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13CompareValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register) More...
IFX_INLINE void | IfxCcu6_setT13CounterValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13. More...
IFX_INLINE void | IfxCcu6_setT13PeriodValue (Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventDirection (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction. More...
IFX_INLINE void | IfxCcu6_setT13TriggerEventMode (Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals) More...
IFX_INLINE void | IfxCcu6_setTrapMode (Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid. More...
IFX_INLINE void | IfxCcu6_setTrapState (Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again. More...
IFX_INLINE void | IfxCcu6_startTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_stopTimer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_updateHallPattern (Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write. More...
IFX_EXTERN void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
IFX_EXTERN void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
IFX_EXTERN void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
IFX_EXTERN void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
IFX_EXTERN void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
IFX_EXTERN float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_EXTERN void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
IFX_EXTERN float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
IFX_EXTERN void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...
IFX_INLINE boolean | IfxCcu6_getDeadTimeStatus (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12. More...
IFX_INLINE boolean | IfxCcu6_getHallPatternSampleState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)
that has been compared to the current and expected value. More...
IFX_INLINE boolean | IfxCcu6_getInterruptStatusFlag (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag. More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelModeAvailabilityStatus (Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available More...
IFX_INLINE boolean | IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus (Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP. More...
IFX_INLINE boolean | IfxCcu6_getShadowTransferStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status. More...
IFX_INLINE boolean | IfxCcu6_getT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2) More...
IFX_INLINE IfxCcu6_T12CountDirection | IfxCcu6_getT12CountDirection (Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12. More...
IFX_INLINE boolean | IfxCcu6_getT13CaptureCompareState (Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST. More...
IFX_INLINE boolean | IfxCcu6_getTimerAvailabilityStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability More...
IFX_INLINE IfxCcu6_TimerRunStatus | IfxCcu6_getTimerRunStatus (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status. More...
IFX_INLINE boolean | IfxCcu6_isModuleSuspended (Ifx_CCU6 *ccu6)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxCcu6_setSuspendMode (Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
IFX_EXTERN uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IFX_EXTERN IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
IFX_EXTERN uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...
IFX_INLINE void | IfxCcu6_clearAllInterruptStatusFlags (Ifx_CCU6 *ccu6)
Clears all Interrupt flags. More...
IFX_INLINE void | IfxCcu6_disableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_disableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_disableDelayBypass (Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) More...
IFX_INLINE void | IfxCcu6_disableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_disableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored. More...
IFX_INLINE void | IfxCcu6_disableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_disableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_disableT13InvertedModulation (Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_disableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored. More...
IFX_INLINE void | IfxCcu6_disableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_disableTrapPin (Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_enableAdditionalPrescaler (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies. More...
IFX_INLINE void | IfxCcu6_enableCountEvent (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13). More...
IFX_INLINE void | IfxCcu6_enableDeadTime (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12. More...
IFX_INLINE void | IfxCcu6_enableDelayBypass (Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0. More...
IFX_INLINE void | IfxCcu6_enableHallPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS. More...
IFX_INLINE void | IfxCcu6_enableInterrupt (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelMode (Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelModeAvailability (Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelPwmPatternShadowTransfer (Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 one match is detected while counting down. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or
becomes set while a T12 period match is detected while counting up. More...
IFX_INLINE void | IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer (Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or
becomes set while a T13 period match is detected. More...
IFX_INLINE void | IfxCcu6_enableShadowTransfer (Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) More...
IFX_INLINE void | IfxCcu6_enableSingleShotMode (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13). More...
IFX_INLINE void | IfxCcu6_enableT13InvertedModulation (Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals
T13 output CC63_O is equal to CC63ST. More...
IFX_INLINE void | IfxCcu6_enableTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed. More...
IFX_INLINE void | IfxCcu6_enableTrap (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals. More...
IFX_INLINE void | IfxCcu6_enableTrapPin (Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation. More...
IFX_INLINE void | IfxCcu6_setCaptureCompareInputSignal (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs. More...
IFX_EXTERN void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
IFX_EXTERN void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
IFX_EXTERN void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...
IFX_INLINE void | IfxCcu6_initCc60InPin (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin. More...
IFX_INLINE void | IfxCcu6_initCc60OutPin (const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin. More...
IFX_INLINE void | IfxCcu6_initCc61InPin (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin. More...
IFX_INLINE void | IfxCcu6_initCc61OutPin (const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin. More...
IFX_INLINE void | IfxCcu6_initCc62InPin (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin. More...
IFX_INLINE void | IfxCcu6_initCc62OutPin (const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin. More...
IFX_INLINE void | IfxCcu6_initCcpos0Pin (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos1Pin (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin. More...
IFX_INLINE void | IfxCcu6_initCcpos2Pin (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin. More...
IFX_INLINE void | IfxCcu6_initCout60Pin (const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin. More...
IFX_INLINE void | IfxCcu6_initCout61Pin (const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin. More...
IFX_INLINE void | IfxCcu6_initCout62Pin (const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin. More...
IFX_INLINE void | IfxCcu6_initCout63Pin (const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin. More...
IFX_INLINE void | IfxCcu6_initCtrapPin (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin. More...
IFX_INLINE void | IfxCcu6_initT12hrPin (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin. More...
IFX_INLINE void | IfxCcu6_initT13hrPin (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin. More...
IFX_INLINE void | IfxCcu6_initCc60InPinWithPadLevel (const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCc61InPinWithPadLevel (const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCc62InPinWithPadLevel (const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos0PinWithPadLevel (const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos1PinWithPadLevel (const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCcpos2PinWithPadLevel (const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initCtrapPinWithPadLevel (const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initT12hrPinWithPadLevel (const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_initT13hrPinWithPadLevel (const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxCcu6_setSleepMode (Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxCcu6_resetModule (Ifx_CCU6 *ccu6)

Detailed Description

CCU6 basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6.h.

Function Documentation

◆ IfxCcu6_initCc60InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel | ( | const IfxCcu6_Cc60in_In * | cc60In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC60 pin direction as input and configuring pad driver.

Parameters
cc60In | CC60 capture input CC60IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1720 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCc61InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel | ( | const IfxCcu6_Cc61in_In * | cc61In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC61 pin direction as input and configuring pad driver.

Parameters
cc61In | CC61 capture input CC61IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1742 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCc62InPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel | ( | const IfxCcu6_Cc62in_In * | cc62In,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CC62 pin direction as input and configuring pad driver.

Parameters
cc62In | CC62 capture input CC62IN
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1764 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos0PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel | ( | const IfxCcu6_Ccpos0_In * | ccpos0,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver.

Parameters
ccpos0 | CC60 capture input CCPOS0
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1786 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos1PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel | ( | const IfxCcu6_Ccpos1_In * | ccpos1,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver.

Parameters
ccpos1 | CC61 capture input CCPOS1
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1801 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCcpos2PinWithPadLevel()

IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel | ( | const IfxCcu6_Ccpos2_In * | ccpos2,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver.

Parameters
ccpos2 | CC62 capture input CCPOS2
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1816 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initCtrapPinWithPadLevel()

IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel | ( | const IfxCcu6_Ctrap_In * | ctrap,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver.

Parameters
ctrap | CTRAP input
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1859 of file IfxCcu6.h.

◆ IfxCcu6_initT12hrPinWithPadLevel()

IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel | ( | const IfxCcu6_T12hr_In * | t12hrIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of T12HR pin direction as input and configuring pad driver.

Parameters
t12hrIn | Timer 12 HR input T12HR
inputMode | The pin input mode which should be configured
padDriver | Pad driver
Returns
None

Definition at line 1874 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_initT13hrPinWithPadLevel()

IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel | ( | const IfxCcu6_T13hr_In * | t13hrIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of T13HR pin direction as input and configuring pad driver.

Parameters
t13hrIn | Timer 13 HR input T13HR
inputMode | The pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1889 of file IfxCcu6.h.

Referenced by IfxCcu6_Icu_initChannel().

◆ IfxCcu6_resetModule()

IFX_EXTERN void IfxCcu6_resetModule ( Ifx_CCU6 * ccu6 )
Parameters
ccu6 pointer to ccu6 registers
Returns
None

Definition at line 247 of file IfxCcu6.c.

◆ IfxCcu6_setSleepMode()

IFX_INLINE void IfxCcu6_setSleepMode | ( | Ifx_CCU6 * | ccu6,
 |  | IfxCcu6_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
ccu6 | pointer to CCU6 registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 2034 of file IfxCcu6.h.


iLLD_TC26B: IfxCcu6_Timer.h File Reference

  • Ccu6
  • Timer
Data Structures | Functions
IfxCcu6_Timer.h File Reference
iLLD » CCU6

CCU6 TIMER details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/Timer.h"
Include dependency graph for IfxCcu6_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_Timer_Clock
Structure for clock configuration. More...
struct | IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_Timer_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_Timer_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_Timer
Module handle. More...
struct | IfxCcu6_Timer_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
IFX_EXTERN void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
IFX_EXTERN void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

CCU6 TIMER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_Timer.h.

Data Structure Documentation

◆ IfxCcu6_Timer_Pins

struct IfxCcu6_Timer_Pins

Structure for CCU6 output pin configuration.

Definition at line 265 of file IfxCcu6_Timer.h.

Collaboration diagram for IfxCcu6_Timer_Pins:
[legend]
Data Fields
IFX_CONST IfxCcu6_T12hr_In * | t12hr | T12HR input signal.
IFX_CONST IfxCcu6_T13hr_In * | t13hr | T13HR input signal.
IfxPort_InputMode | t1xhrInputMode | The T1xHR pin input mode which should be configured.


iLLD_TC26B: IfxCcu6_TimerWithTrigger.h File Reference

  • Ccu6
  • TimerWithTrigger
Data Structures | Functions
IfxCcu6_TimerWithTrigger.h File Reference
iLLD » CCU6

CCU6 TIMERWITHTRIGGER details. More...

#include "_PinMap/IfxCcu6_PinMap.h"
#include "Ccu6/Std/IfxCcu6.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxCcu6_TimerWithTrigger.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_TimerWithTrigger_Base
Structure for the timer base. More...
struct | IfxCcu6_TimerWithTrigger
CCU6 Timer interface. More...
struct | IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer. More...

Functions

IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...
IFX_EXTERN volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
IFX_EXTERN void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...

Detailed Description

CCU6 TIMERWITHTRIGGER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_TimerWithTrigger.h.

Data Structure Documentation

◆ IfxCcu6_TimerWithTrigger

struct IfxCcu6_TimerWithTrigger

CCU6 Timer interface.

Definition at line 70 of file IfxCcu6_TimerWithTrigger.h.

Collaboration diagram for IfxCcu6_TimerWithTrigger:
[legend]
Data Fields
IfxCcu6_TimerWithTrigger_Base | base | Timer base structure.
Ifx_CCU6 * | ccu6 | CCU6 module used for the timer functionality.

◆ IfxCcu6_TimerWithTrigger_Config

struct IfxCcu6_TimerWithTrigger_Config

Configuration structure for T12 and T13 Timer.

Definition at line 78 of file IfxCcu6_TimerWithTrigger.h.

Collaboration diagram for IfxCcu6_TimerWithTrigger_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
Ifx_CCU6 * | ccu6 | CCU6 module used for the timer functionality.
IfxCcu6_ServiceRequest | serviceReqNrPeriod | Service request used for the period.
IfxCcu6_ServiceRequest | serviceReqNrTrigger | Service request used for the Trigger.
IfxCcu6_Cout63_Out * | triggerOut |


iLLD_TC26B: IfxCcu6_TPwm.h File Reference

  • Ccu6
  • TPwm
Data Structures | Functions
IfxCcu6_TPwm.h File Reference
iLLD » CCU6

CCU6 TPWM details. More...

#include "Ccu6/Std/IfxCcu6.h"
#include "If/Ccu6If/TPwm.h"
Include dependency graph for IfxCcu6_TPwm.h:

Go to the source code of this file.

Data Structures

struct | IfxCcu6_TPwm_Clock
Structure for clock configuration. More...
struct | IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration. More...
struct | IfxCcu6_TPwm_Timer12
Structure for Timer 12. More...
struct | IfxCcu6_TPwm_Timer13
Structure for Timer 13. More...
struct | IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers. More...
struct | IfxCcu6_TPwm
Module handle. More...
struct | IfxCcu6_TPwm_Config
Configuration structure of the module. More...

Functions

IFX_EXTERN void | IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
IFX_EXTERN void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
IFX_EXTERN void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

CCU6 TPWM details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_TPwm.h.


iLLD_TC26B: CIF

Modules | Files
CIF
iLLD
Collaboration diagram for CIF:

Modules

Implementation
Standard Driver
CIF Pin Mapping
CAM

Files

file | IfxCif_cfg.h
CIF on-chip implementation data.
file | IfxCif_PinMap.c
CIF I/O map.
file | IfxCif_PinMap.h
CIF I/O map.
file | IfxCif_Cam.h
CIF CAM details.
file | IfxCif.h
CIF basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » CIF
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » CIF
Collaboration diagram for Standard Driver:

Modules

Standard Enumerations
ISP Enumerations
Standard Functions
ISP Functions
Linear Downscaler Functions
Linear Downscaler Enumerations
Memory Interface Functions
Memory Interface Enumerations
JPEG Encoder Functions
JPEG Encoder Enumerations
Security Watchdog Functions
Security Watchdog Enumerations
ISP Image Stabilization Functions
ISP Image Stabilization Enumerations
Extra Path Functions
Extra Path Enumerations
Debug Path Functions
Debug Path Enumerations

Detailed Description


iLLD_TC26B: Standard Enumerations

Enumerations
Standard Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Standard Enumerations:

Enumerations

enum IfxCif_DataPathSelectorForMainPath {
IfxCif_DataPathSelectorForMainPath_Disabled = 0,
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed = 1,
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder = 2
}
Enumerator for data path of main path. More...
enum IfxCif_ErrorState {
IfxCif_ErrorState_NoError = 0,
IfxCif_ErrorState_Error = 1
}
Enumerator for the state of an error. More...
enum IfxCif_ExtraPath {
IfxCif_ExtraPath_1 = 0,
IfxCif_ExtraPath_2 = 1,
IfxCif_ExtraPath_3 = 2,
IfxCif_ExtraPath_4 = 3,
IfxCif_ExtraPath_5 = 4
}
Enumerator for the extra paths. More...
enum IfxCif_ImageTiers {
IfxCif_ImageTiers_Horizontal = 0,
IfxCif_ImageTiers_Vertical = 1
}
Enumerator for tiers. More...
enum IfxCif_InputInterface { IfxCif_InputInterface_ParallelInterface = 0 }
Enumerator for input interfaces supported by the CIF interface. More...
enum IfxCif_InterruptTriggeredState {
IfxCif_InterruptTriggeredState_NotTriggered = 0,
IfxCif_InterruptTriggeredState_Triggered = 1
}
Enumerator for the state of an interrupt. More...
enum IfxCif_PortInputSelection {
IfxCif_PortInputSelection_PinMapping0 = 0,
IfxCif_PortInputSelection_PinMapping1 = 1
}
Enumerator for port input selections. More...
enum IfxCif_State {
IfxCif_State_Disabled = 0,
IfxCif_State_Enabled = 1
}
Enumerator for states. More...
enum IfxCif_Submodules {
IfxCif_Submodules_AllModules = 0,
IfxCif_Submodules_Debug = 1,
IfxCif_Submodules_ExtraPaths = 2,
IfxCif_Submodules_LinearDownscaler = 3,
IfxCif_Submodules_SecurityWatchdog = 4,
IfxCif_Submodules_MemoryInterface = 5,
IfxCif_Submodules_JpegEncoder = 6,
IfxCif_Submodules_ImageSignalProcessing = 7,
IfxCif_Submodules_YCSplitter = 8
}
Enumerator for submodules of the CIF interface. More...
enum IfxCif_YCSplitterChannelMode {
IfxCif_YCSplitterChannelMode_Disabled = 0,
IfxCif_YCSplitterChannelMode_MainPathAndRawMode = 1
}
Enumerator for channel mode of Y/C splitter. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_DataPathSelectorForMainPath

enum IfxCif_DataPathSelectorForMainPath

Enumerator for data path of main path.

Enumerator
IfxCif_DataPathSelectorForMainPath_Disabled | Main path is disabled.
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed | Main path is routed to the Memory Interface.
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder | Main path is routed to the JPEG encoder.

Definition at line 83 of file IfxCif.h.

◆ IfxCif_ErrorState

enum IfxCif_ErrorState

Enumerator for the state of an error.

Enumerator
IfxCif_ErrorState_NoError | No error occurred.
IfxCif_ErrorState_Error | Error occurred.

Definition at line 92 of file IfxCif.h.

◆ IfxCif_ExtraPath

enum IfxCif_ExtraPath

Enumerator for the extra paths.

Enumerator
IfxCif_ExtraPath_1
IfxCif_ExtraPath_2
IfxCif_ExtraPath_3
IfxCif_ExtraPath_4
IfxCif_ExtraPath_5

Definition at line 100 of file IfxCif.h.

◆ IfxCif_ImageTiers

enum IfxCif_ImageTiers

Enumerator for tiers.

Enumerator
IfxCif_ImageTiers_Horizontal | Horizontal tier.
IfxCif_ImageTiers_Vertical | Vertical tier.

Definition at line 111 of file IfxCif.h.

◆ IfxCif_InputInterface

enum IfxCif_InputInterface

Enumerator for input interfaces supported by the CIF interface.

Enumerator
IfxCif_InputInterface_ParallelInterface

Parallel interface (currently the only supported input interface)

Definition at line 119 of file IfxCif.h.

◆ IfxCif_InterruptTriggeredState

enum IfxCif_InterruptTriggeredState

Enumerator for the state of an interrupt.

Enumerator
IfxCif_InterruptTriggeredState_NotTriggered | Interrupt was not triggered.
IfxCif_InterruptTriggeredState_Triggered | Interrupt was triggered.

Definition at line 126 of file IfxCif.h.

◆ IfxCif_PortInputSelection

enum IfxCif_PortInputSelection

Enumerator for port input selections.

Enumerator
IfxCif_PortInputSelection_PinMapping0 | pin mapping 0
IfxCif_PortInputSelection_PinMapping1 | pin mapping 1

Definition at line 134 of file IfxCif.h.

◆ IfxCif_State

enum IfxCif_State

Enumerator for states.

Enumerator
IfxCif_State_Disabled | Disabled state.
IfxCif_State_Enabled | Enabled state.

Definition at line 142 of file IfxCif.h.

◆ IfxCif_Submodules

enum IfxCif_Submodules

Enumerator for submodules of the CIF interface.

Enumerator
IfxCif_Submodules_AllModules | All submodules.
IfxCif_Submodules_Debug | Debug submodule.
IfxCif_Submodules_ExtraPaths | Extra Paths submodule.
IfxCif_Submodules_LinearDownscaler | Linear Downscaler submodule.
IfxCif_Submodules_SecurityWatchdog | Security Watchdog submodule.
IfxCif_Submodules_MemoryInterface | Memory Interface submodule.
IfxCif_Submodules_JpegEncoder | JPEG Encoder submodule.
IfxCif_Submodules_ImageSignalProcessing | Image Signal Processing submodule.
IfxCif_Submodules_YCSplitter | Y/C-Splitter submodule.

Definition at line 150 of file IfxCif.h.

◆ IfxCif_YCSplitterChannelMode

enum IfxCif_YCSplitterChannelMode

Enumerator for channel mode of Y/C splitter.

Enumerator
IfxCif_YCSplitterChannelMode_Disabled | Y/C splitter is disabled.
IfxCif_YCSplitterChannelMode_MainPathAndRawMode | Y/C splitter is enabled for main path and RAW mode.

Definition at line 165 of file IfxCif.h.


iLLD_TC26B: ISP Enumerations

Enumerations
ISP Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for ISP Enumerations:

Enumerations

enum IfxCif_IspCcirSequence {
IfxCif_IspCcirSequence_YCbYCr = 0,
IfxCif_IspCcirSequence_YCrYCb = 1,
IfxCif_IspCcirSequence_CbYCrY = 2
}
Enumerator for the ISP CCIR sequence. More...
enum IfxCif_IspColorSpaceMatrixCrominanceClippingRange {
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 = 0,
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 = 1
}
Enumerator for the clipping range of the crominance for the ISP output. More...
enum IfxCif_IspColorSpaceMatrixLuminanceClippingRange {
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 = 0,
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 = 1
}
Enumerator for the clipping range of the luminance for the ISP output. More...
enum IfxCif_IspErrorSources {
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule = 0,
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule = 1,
IfxCif_IspErrorSources_SizeErrorInInformSubmodule = 2
}
Enumerator for error sources of the ISP module. More...
enum IfxCif_IspFieldSelection {
IfxCif_IspFieldSelection_AllFields = 0,
IfxCif_IspFieldSelection_OnlyEvenFields = 1,
IfxCif_IspFieldSelection_OnlyOddFields = 2
}
Enumerator for the sampled input fields. More...
enum IfxCif_IspInformFieldInformation {
IfxCif_IspInformFieldInformation_Odd = 0,
IfxCif_IspInformFieldInformation_Even = 1
}
Enumerator for current field information. More...
enum IfxCif_IspInputInterface {
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb = 0,
IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros = 1,
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb = 2,
IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros = 3,
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb = 4,
IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros = 5,
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb = 6,
IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros = 7,
IfxCif_IspInputInterface_16BitExternalInterface = 8
}
Enumerator for the supported input interfaces of the ISP. More...
enum IfxCif_IspInterruptSources {
IfxCif_IspInterruptSources_SecurityWatchdogTimeout = 0,
IfxCif_IspInterruptSources_StartEdgeOfHSync = 1,
IfxCif_IspInterruptSources_StartEdgeOfVSync = 2,
IfxCif_IspInterruptSources_SampledInputFrameComplete = 3,
IfxCif_IspInterruptSources_PictureSizeViolationOccurred = 4,
IfxCif_IspInterruptSources_LossOfData = 5,
IfxCif_IspInterruptSources_FrameCompletelyPutOut = 6,
IfxCif_IspInterruptSources_IspTurnedOff = 7
}
Enumerator for interrupt sources of the ISP submodule. More...
enum IfxCif_IspMode {
IfxCif_IspMode_RawPicture = 0,
IfxCif_IspMode_ItuRBT656 = 1,
IfxCif_IspMode_ItuRBT601 = 2,
IfxCif_IspMode_DataMode = 4,
IfxCif_IspMode_RawPictureWithItuRBT656Sync = 6
}
Enumerator for the ISP mode. More...
enum IfxCif_IspSamplingEdge {
IfxCif_IspSamplingEdge_NegativeEdge = 0,
IfxCif_IspSamplingEdge_PositiveEdge = 1
}
Enumerator for ISP sampling edge. More...
enum IfxCif_IspSyncPolarity {
IfxCif_IspSyncPolarity_HighActive = 0,
IfxCif_IspSyncPolarity_LowActive = 1
}

Detailed Description

Enumeration Type Documentation

◆ IfxCif_IspCcirSequence

enum IfxCif_IspCcirSequence

Enumerator for the ISP CCIR sequence.

Enumerator
IfxCif_IspCcirSequence_YCbYCr | YCbYCr.
IfxCif_IspCcirSequence_YCrYCb | YCrYCb.
IfxCif_IspCcirSequence_CbYCrY | CbYCrY.

Definition at line 177 of file IfxCif.h.

◆ IfxCif_IspColorSpaceMatrixCrominanceClippingRange

enum IfxCif_IspColorSpaceMatrixCrominanceClippingRange

Enumerator for the clipping range of the crominance for the ISP output.

Enumerator
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 | CbCr range 16..240 according to ITU-R BT.601 standard.
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 | full UV range 0..255

Definition at line 186 of file IfxCif.h.

◆ IfxCif_IspColorSpaceMatrixLuminanceClippingRange

enum IfxCif_IspColorSpaceMatrixLuminanceClippingRange

Enumerator for the clipping range of the luminance for the ISP output.

Enumerator
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 | Y range 16..235 according to ITU-R BT.601 standard.
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 | full Y range 0..255

Definition at line 194 of file IfxCif.h.

◆ IfxCif_IspErrorSources

enum IfxCif_IspErrorSources

Enumerator for error sources of the ISP module.

Enumerator
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule | Size error is generated in outmux submodule.
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule | Size error is generated in image stabilization submodule.
IfxCif_IspErrorSources_SizeErrorInInformSubmodule | ize error is generated in inform submodule

Definition at line 202 of file IfxCif.h.

◆ IfxCif_IspFieldSelection

enum IfxCif_IspFieldSelection

Enumerator for the sampled input fields.

Enumerator
IfxCif_IspFieldSelection_AllFields | sample all fields (don't care about fields)
IfxCif_IspFieldSelection_OnlyEvenFields | sample only even fields
IfxCif_IspFieldSelection_OnlyOddFields | sample only odd fields

Definition at line 211 of file IfxCif.h.

◆ IfxCif_IspInformFieldInformation

enum IfxCif_IspInformFieldInformation

Enumerator for current field information.

Enumerator
IfxCif_IspInformFieldInformation_Odd | Odd field.
IfxCif_IspInformFieldInformation_Even | Even field.

Definition at line 220 of file IfxCif.h.

◆ IfxCif_IspInputInterface

enum IfxCif_IspInputInterface

Enumerator for the supported input interfaces of the ISP.

Enumerator
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb | 8-bit external Interface if enabled append 8 MSBs as LSBs
IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros | 8-bit external Interface if enabled append 8 zeroes as LSBs
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb | 10-bit external Interface if enabled append 6 MSBs as LSBs
IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros | 10-bit external Interface if enabled append 6 zeroes as LSBs
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb | 12-bit external Interface if enabled append 4 MSBs as LSBs
IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros | 12-bit external Interface if enabled append 4 zeroes as LSBs
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb | 14-bit external Interface if enabled append 2 MSBs as LSBs
IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros | 14-bit external Interface if enabled append 2 zeroes as LSBs
IfxCif_IspInputInterface_16BitExternalInterface | 16-bit external Interface

Definition at line 228 of file IfxCif.h.

◆ IfxCif_IspInterruptSources

enum IfxCif_IspInterruptSources

Enumerator for interrupt sources of the ISP submodule.

Enumerator
IfxCif_IspInterruptSources_SecurityWatchdogTimeout | A watchdog timeout was triggered at the ISP input.
IfxCif_IspInterruptSources_StartEdgeOfHSync | Start Edge of h_sync.
IfxCif_IspInterruptSources_StartEdgeOfVSync | Start Edge of v_sync.
IfxCif_IspInterruptSources_SampledInputFrameComplete | Sampled Input Frame is Complete.
IfxCif_IspInterruptSources_PictureSizeViolationOccurred | Picture Size Violation Occurred.
IfxCif_IspInterruptSources_LossOfData | Loss of Data.
IfxCif_IspInterruptSources_FrameCompletelyPutOut | Frame was Completely Put Out.
IfxCif_IspInterruptSources_IspTurnedOff | Isp was Turned Off (vsynced)

Definition at line 243 of file IfxCif.h.

◆ IfxCif_IspMode

enum IfxCif_IspMode

Enumerator for the ISP mode.

Enumerator
IfxCif_IspMode_RawPicture | RAW picture.
IfxCif_IspMode_ItuRBT656 | ITU-R BT.656 (YUV with embedded sync)
IfxCif_IspMode_ItuRBT601 | ITU-R BT.601 (YUV input with H and Vsync signals)
IfxCif_IspMode_DataMode | datamode (ISP bypass, sync signals interpreted as data enable)
IfxCif_IspMode_RawPictureWithItuRBT656Sync | RAW picture mode with ITU-R BT.656 synchronization.

Definition at line 257 of file IfxCif.h.

◆ IfxCif_IspSamplingEdge

enum IfxCif_IspSamplingEdge

Enumerator for ISP sampling edge.

Enumerator
IfxCif_IspSamplingEdge_NegativeEdge | negative edge sampling
IfxCif_IspSamplingEdge_PositiveEdge | positive edge sampling

Definition at line 268 of file IfxCif.h.

◆ IfxCif_IspSyncPolarity

enum IfxCif_IspSyncPolarity
Enumerator
IfxCif_IspSyncPolarity_HighActive | high active sync polarity
IfxCif_IspSyncPolarity_LowActive | low active sync polarity

Definition at line 276 of file IfxCif.h.


iLLD_TC26B: Standard Functions

Functions
Standard Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Standard Functions:

Functions

IFX_INLINE void | IfxCif_clearKernelResetState (void)
Function to clear the kernel reset state. More...
IFX_INLINE uint16 | IfxCif_getCifModuleId (void)
Function to query the CIF module ID. More...
IFX_INLINE IfxCif_PortInputSelection | IfxCif_getCifModulePortInputSelection (void)
Function to query the port input selection. More...
IFX_INLINE uint8 | IfxCif_getCifModuleRevision (void)
Function to query the CIF module revision. More...
IFX_INLINE uint8 | IfxCif_getCifModuleType (void)
Function to query the CIF module ID. More...
IFX_INLINE IfxCif_State | IfxCif_getClockControlLogicState (void)
Function to query the clock distribution enabled state. More...
IFX_INLINE IfxCif_DataPathSelectorForMainPath | IfxCif_getDataPathSelectorForMainPath (void)
Function to query the data path for main path. More...
IFX_INLINE IfxCif_InputInterface | IfxCif_getInputInterface (void)
Function to query the input interface of the CIF interface. More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputPortSHSyncState (void)
Function to query the current level of the ISP input port s_hsync (for testing purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getKernelResetStatus (void)
Function to query the kernel reset status. More...
IFX_INLINE uint16 | IfxCif_getModuleNumber (void)
Function to query the module number. More...
IFX_INLINE uint8 | IfxCif_getModuleRevisionNumber (void)
Function to query the revision number of the CIF interface. More...
IFX_INLINE IfxCif_State | IfxCif_getModuleState (void)
Function to query the state of the CIF module. More...
IFX_INLINE uint8 | IfxCif_getModuleType (void)
Function to query the module type. More...
IFX_INLINE IfxCif_YCSplitterChannelMode | IfxCif_getYCSplitterChannelMode (void)
Function to query the Y/C splitter channel mode. More...
IFX_INLINE void | IfxCif_setClockControlLogicState (IfxCif_State clockControlLogicState)
Function to enable or disable the clock distribution to all CIF submodules. More...
IFX_INLINE void | IfxCif_setDataPathSelectorForMainPath (IfxCif_DataPathSelectorForMainPath pathSelector)
Function to set the data path for main path. More...
IFX_INLINE void | IfxCif_setInputInterface (IfxCif_InputInterface interface)
Function to set the input interface of the CIF interface. More...
IFX_INLINE void | IfxCif_setKernelResetRequestState (IfxCif_State state)
Function to request a kernel reset or reset the request bit. More...
IFX_INLINE void | IfxCif_setYCSplitterChannelMode (IfxCif_YCSplitterChannelMode mode)
Function to set the Y/C splitter channel mode. More...
IFX_EXTERN IfxCif_State | IfxCif_getInternalClockMode (IfxCif_Submodules submodule)
Function to query the clock state of a submodule. More...
IFX_EXTERN IfxCif_State | IfxCif_getKernelResetRequestState (void)
Function to query the state of the kernel reset request bit. More...
IFX_EXTERN IfxCif_State | IfxCif_getSoftwareResetMode (IfxCif_Submodules submodule)
Function to query the reset mode of a submodule. More...
IFX_EXTERN void | IfxCif_resetModule (Ifx_CIF_BBB *cifBbb)
resets CIF kernel More...
IFX_EXTERN void | IfxCif_setInternalClockMode (IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule. More...
IFX_EXTERN void | IfxCif_setModuleStateRequest (IfxCif_State state)
Function to request enabling or disabling of the CIF module. More...
IFX_EXTERN void | IfxCif_setSoftwareResetMode (IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule. More...

Detailed Description

Function Documentation

◆ IfxCif_clearKernelResetState()

IFX_INLINE void IfxCif_clearKernelResetState ( void )

Function to clear the kernel reset state.

Returns
None

Definition at line 2350 of file IfxCif.h.

◆ IfxCif_getCifModuleId()

IFX_INLINE uint16 IfxCif_getCifModuleId ( void )

Function to query the CIF module ID.

Returns
CIF module ID

Definition at line 2380 of file IfxCif.h.

◆ IfxCif_getCifModulePortInputSelection()

IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection ( void )

Function to query the port input selection.

Returns
Always IfxCif_PortInputSelection_PinMapping0

Definition at line 2386 of file IfxCif.h.

◆ IfxCif_getCifModuleRevision()

IFX_INLINE uint8 IfxCif_getCifModuleRevision ( void )

Function to query the CIF module revision.

Returns
CIF module revision

Definition at line 2392 of file IfxCif.h.

◆ IfxCif_getCifModuleType()

IFX_INLINE uint8 IfxCif_getCifModuleType ( void )

Function to query the CIF module ID.

Returns
CIF module type

Definition at line 2398 of file IfxCif.h.

◆ IfxCif_getClockControlLogicState()

IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState ( void )

Function to query the clock distribution enabled state.

Returns
IfxCif_State_Enabled if clock distribution is enabled, IfxCif_State_Disabled otherwise

Definition at line 2404 of file IfxCif.h.

◆ IfxCif_getDataPathSelectorForMainPath()

IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath ( void )

Function to query the data path for main path.

Returns
Selector for the main data path (one member of IfxCif_DataPathSelectorForMainPath)

Definition at line 2429 of file IfxCif.h.

◆ IfxCif_getInputInterface()

IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface ( void )

Function to query the input interface of the CIF interface.

Returns
IfxCif_InputInterface Type of the configured interface

Definition at line 2447 of file IfxCif.h.

◆ IfxCif_getInternalClockMode()

IFX_EXTERN IfxCif_State IfxCif_getInternalClockMode ( IfxCif_Submodules submodule )

Function to query the clock state of a submodule.

Parameters
submodule Identifier of the submodule
Returns
IfxCif_State_Enabled if the clock of the submodule is enabled, IfxCif_State_Disabled otherwise

Definition at line 1129 of file IfxCif.c.

◆ IfxCif_getIspInputPortSHSyncState()

IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState ( void )

Function to query the current level of the ISP input port s_hsync (for testing purposes only)

Returns
IfxCif_State_Enabled if s_hsync is high, IfxCif_State_Disabled if s_hsync is low

Definition at line 2507 of file IfxCif.h.

◆ IfxCif_getKernelResetRequestState()

IFX_EXTERN IfxCif_State IfxCif_getKernelResetRequestState ( void )

Function to query the state of the kernel reset request bit.

Returns
IfxCif_State_Enabled if the kernel reset requets bit is set, IfxCif_State_Disabled otherwise

Definition at line 1668 of file IfxCif.c.

◆ IfxCif_getKernelResetStatus()

IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus ( void )

Function to query the kernel reset status.

Returns
IfxCif_State_Enabled if kernel reset was executed, IfxCif_State_Disabled otherwise

Definition at line 2609 of file IfxCif.h.

◆ IfxCif_getModuleNumber()

IFX_INLINE uint16 IfxCif_getModuleNumber ( void )

Function to query the module number.

Returns
Module number of the CIF interface

Definition at line 2665 of file IfxCif.h.

◆ IfxCif_getModuleRevisionNumber()

IFX_INLINE uint8 IfxCif_getModuleRevisionNumber ( void )

Function to query the revision number of the CIF interface.

Returns
Revision number of the CIF interface

Definition at line 2671 of file IfxCif.h.

◆ IfxCif_getModuleState()

IFX_INLINE IfxCif_State IfxCif_getModuleState ( void )

Function to query the state of the CIF module.

Returns
IfxCif_State_Enabled if the module is currently enabled, IfxCif_State_Disabled otherwise

Definition at line 2677 of file IfxCif.h.

Referenced by IfxCif_Cam_init().

◆ IfxCif_getModuleType()

IFX_INLINE uint8 IfxCif_getModuleType ( void )

Function to query the module type.

Returns
Module type of the CIF interface

Definition at line 2684 of file IfxCif.h.

◆ IfxCif_getSoftwareResetMode()

IFX_EXTERN IfxCif_State IfxCif_getSoftwareResetMode ( IfxCif_Submodules submodule )

Function to query the reset mode of a submodule.

Parameters
submodule Identifier of the submodule
Returns
IfxCif_State_Enabled if the reset mode of the submodule is enabled, IfxCif_State_Disabled otherwise

Definition at line 2538 of file IfxCif.c.

◆ IfxCif_getYCSplitterChannelMode()

IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode ( void )

Function to query the Y/C splitter channel mode.

Returns
Configured mode of the Y/C splitter (one member of IfxCif_YCSplitterChannelMode)

Definition at line 2708 of file IfxCif.h.

◆ IfxCif_resetModule()

IFX_EXTERN void IfxCif_resetModule ( Ifx_CIF_BBB * cifBbb )

resets CIF kernel

Parameters
cifBbb pointer to CIF_BBB registers
Returns
None

Definition at line 2662 of file IfxCif.c.

◆ IfxCif_setClockControlLogicState()

IFX_INLINE void IfxCif_setClockControlLogicState ( IfxCif_State clockControlLogicState )

Function to enable or disable the clock distribution to all CIF submodules.

Parameters
clockControlLogicState IfxCif_State_Enabled to enable clock distribution, IfxCif_State_Disabled to disable clock distribution
Returns
None

Definition at line 2732 of file IfxCif.h.

◆ IfxCif_setDataPathSelectorForMainPath()

IFX_INLINE void IfxCif_setDataPathSelectorForMainPath ( IfxCif_DataPathSelectorForMainPath pathSelector )

Function to set the data path for main path.

Parameters
pathSelector Selector for the main data path
Returns
None

Definition at line 2739 of file IfxCif.h.

Referenced by IfxCif_Cam_disableJpegEncoder(), and IfxCif_Cam_enableJpegEncoder().

◆ IfxCif_setInputInterface()

IFX_INLINE void IfxCif_setInputInterface ( IfxCif_InputInterface interface )

Function to set the input interface of the CIF interface.

Parameters
interface Type of interface
Returns
None

Definition at line 2757 of file IfxCif.h.

◆ IfxCif_setInternalClockMode()

IFX_EXTERN void IfxCif_setInternalClockMode | ( | IfxCif_Submodules | submodule,
 |  | IfxCif_State | clockState
 | ) |  |

Function to enable or disable the clock of a submodule.

Parameters
submodule | Identifier of the submodule to enable or disable
clockState | IfxCif_State_Enabled to enable the clock, IfxCif_State_Disabled to disable the clock
Returns
None

Definition at line 3155 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifDownscaler(), IfxCif_Cam_initCifExtraPath(), IfxCif_Cam_initCifIspUnit(), IfxCif_Cam_initCifJpegEncoder(), and IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setKernelResetRequestState()

IFX_INLINE void IfxCif_setKernelResetRequestState ( IfxCif_State state )

Function to request a kernel reset or reset the request bit.

Parameters
state IfxCif_State_Enabled to request a reset, IfxCif_State_Disabled to reset the request bit before a reset was performed
Returns
None

Definition at line 2945 of file IfxCif.h.

Referenced by IfxCif_Cam_init().

◆ IfxCif_setModuleStateRequest()

IFX_EXTERN void IfxCif_setModuleStateRequest ( IfxCif_State state )

Function to request enabling or disabling of the CIF module.

Parameters
state IfxCif_State_Enabled to request the enabling of the module, IfxCif_State_Disabled otherwise
Returns
None

Definition at line 3798 of file IfxCif.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_setSoftwareResetMode()

IFX_EXTERN void IfxCif_setSoftwareResetMode | ( | IfxCif_Submodules | submodule,
 |  | IfxCif_State | resetMode
 | ) |  |

Function to enable or disable the reset mode of a submodule.

Parameters
submodule | Identifier of the submodule
resetMode | IfxCif_State_Enabled to enable the reset of the submodule, IfxCif_State_Disabled to disable the reset
Returns
None

Definition at line 3902 of file IfxCif.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_setYCSplitterChannelMode()

IFX_INLINE void IfxCif_setYCSplitterChannelMode ( IfxCif_YCSplitterChannelMode mode )

Function to set the Y/C splitter channel mode.

Parameters
mode Mode of the Y/C splitter to set
Returns
None

Definition at line 3008 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().


iLLD_TC26B: ISP Functions

Functions
ISP Functions
iLLD » CIF » Standard Driver
Collaboration diagram for ISP Functions:

Functions

IFX_INLINE void | IfxCif_generateIspFrameSynchronousConfigUpdateSignal (void)
Function to generate a frame synchronous ISP configuration update signal. More...
IFX_INLINE void | IfxCif_generateIspImmediateConfigUpdateSignal (void)
Function to generate an immediate ISP configuration update signal. More...
IFX_INLINE uint16 | IfxCif_getCurrentIspFrameCount (void)
Function to query the current ISP frame count. More...
IFX_INLINE IfxCif_IspInformFieldInformation | IfxCif_getCurrentIspInformFieldInformation (void)
Function to query the current field information. More...
IFX_INLINE IfxCif_State | IfxCif_getCurrentIspInputFormatterState (void)
Function to query the current state of the ISP formatter. More...
IFX_INLINE IfxCif_IspCcirSequence | IfxCif_getIspCcirSequence (void)
Function to query the currently set CCIR sequence. More...
IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange | IfxCif_getIspColorSpaceMatrixCrominanceClippingRange (void)
Function to query the clipping range of the crominance of the ISP output. More...
IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange | IfxCif_getIspColorSpaceMatrixLuminanceClippingRange (void)
Function to query the clipping range of the luminance of the ISP output. More...
IFX_INLINE IfxCif_State | IfxCif_getIspFieldInvertState (void)
Function to query the state of field ID inversion. More...
IFX_INLINE IfxCif_IspFieldSelection | IfxCif_getIspFieldSelection (void)
Function to query the currently set field sample mode. More...
IFX_INLINE IfxCif_IspSyncPolarity | IfxCif_getIspHSyncPolarity (void)
Function to query the currently set polarity of the HSYNC signal. More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputFormatterState (void)
Function to query the current state of the ISP input formatter. More...
IFX_INLINE IfxCif_IspInputInterface | IfxCif_getIspInputInterface (void)
Function to query the ISP input interface bit width. More...
IFX_INLINE uint16 | IfxCif_getIspInputPortSDataState (void)
Function to query the current value of the ISP input port s_data (for test purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputPortSVSyncState (void)
Function to query the current level of the ISP input port s_vsync (for test purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getIspMode (void)
Function to query the currently set ISP mode. More...
IFX_INLINE IfxCif_State | IfxCif_getIspOutputState (void)
Function to query the ISP output state. More...
IFX_INLINE IfxCif_IspSamplingEdge | IfxCif_getIspSamplingEdge (void)
Function to query the currently set ISP sampling edge. More...
IFX_INLINE IfxCif_State | IfxCif_getIspState (void)
Function to query the current state of the ISP. More...
IFX_INLINE IfxCif_IspSyncPolarity | IfxCif_getIspVSyncPolarity (void)
Function to query the currently set polarity of the VSYNC signal. More...
IFX_INLINE uint16 | IfxCif_getNumberOfAcquisitionFrames (void)
Function to query the number of acquisition frames. More...
IFX_INLINE void | IfxCif_setIspAcquisitionOffsets (uint16 hOffset, uint16 vOffset)
Function to set the ISP acquisition offsets. More...
IFX_INLINE void | IfxCif_setIspAcquisitionSizes (uint16 hSize, uint16 vSize)
Function to set the ISP acquisition sizes. More...
IFX_INLINE void | IfxCif_setIspCcirSequence (IfxCif_IspCcirSequence sequence)
Function to set the CCIR sequence. More...
IFX_INLINE void | IfxCif_setIspColorSpaceMatrixCrominanceClippingRange (IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
Function to set the clipping range of the crominance of the ISP output. More...
IFX_INLINE void | IfxCif_setIspColorSpaceMatrixLuminanceClippingRange (IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
Function to set the clipping range of the luminance of the ISP output. More...
IFX_INLINE void | IfxCif_setIspFieldInvertState (IfxCif_State fieldInvertState)
Function to enable or disable inversion of the field ID. More...
IFX_INLINE void | IfxCif_setIspFieldSelection (IfxCif_IspFieldSelection selection)
Function to select fields to sample. More...
IFX_INLINE void | IfxCif_setIspHSyncPolarity (IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the HSYNC signal. More...
IFX_INLINE void | IfxCif_setIspInputFormatterState (IfxCif_State inputFormatterState)
Function to enable or disable the ISP input formatter. More...
IFX_INLINE void | IfxCif_setIspInputInterface (IfxCif_IspInputInterface input)
Function to set the ISP input interface bit width. More...
IFX_INLINE void | IfxCif_setIspMode (IfxCif_IspMode mode)
Function to set the ISP mode. More...
IFX_INLINE void | IfxCif_setIspOutputState (IfxCif_State ispOutputState)
Function to enable or disable the ISP output. More...
IFX_INLINE void | IfxCif_setIspOutputWindowOffsets (uint16 hOffset, uint16 vOffset)
Function to set the ISP output window offsets. More...
IFX_INLINE void | IfxCif_setIspPictureSizes (uint16 hSize, uint16 vSize)
Function to set the ISP picture sizes. More...
IFX_INLINE void | IfxCif_setIspSamplingEdge (IfxCif_IspSamplingEdge edge)
Function to set the ISP sampling edge. More...
IFX_INLINE void | IfxCif_setIspVSyncPolarity (IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the VSYNC signal. More...
IFX_INLINE void | IfxCif_setNumberOfAcquisitionFrames (uint16 numberOfFrames)
Function to set the number of acquisition frames. More...
IFX_EXTERN void | IfxCif_clearIspError (IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source. More...
IFX_EXTERN void | IfxCif_clearIspInterrupt (IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getCurrentIspPictureOffset (IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier. More...
IFX_EXTERN uint16 | IfxCif_getCurrentIspPictureSize (IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspAcquisitionOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspAcquisitionSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getIspErrorState (IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspInputSelectionAppendState (void)
Function to query the append state. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getIspOutputWindowOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspPictureSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setIspAcquisitionOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier. More...
IFX_EXTERN void | IfxCif_setIspAcquisitionSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier. More...
IFX_EXTERN void | IfxCif_setIspInputSelectionAppendState (IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal. More...
IFX_EXTERN void | IfxCif_setIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setIspInterruptRequestBit (IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setIspOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier. More...
IFX_EXTERN void | IfxCif_setIspPictureSize (IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier. More...

Detailed Description

Function Documentation

◆ IfxCif_clearIspError()

IFX_EXTERN void IfxCif_clearIspError ( IfxCif_IspErrorSources errorSource )

Function to clear the error status bit for an error source.

Parameters
errorSource Error source
Returns
None

Definition at line 77 of file IfxCif.c.

◆ IfxCif_clearIspInterrupt()

IFX_EXTERN void IfxCif_clearIspInterrupt ( IfxCif_IspInterruptSources interruptSource )

Function to clear an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 98 of file IfxCif.c.

◆ IfxCif_generateIspFrameSynchronousConfigUpdateSignal()

IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal ( void )

Function to generate a frame synchronous ISP configuration update signal.

Returns
None

Definition at line 2356 of file IfxCif.h.

Referenced by IfxCif_Cam_restartCapture().

◆ IfxCif_generateIspImmediateConfigUpdateSignal()

IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal ( void )

Function to generate an immediate ISP configuration update signal.

Returns
None

Definition at line 2362 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit(), IfxCif_Cam_startCapture(), and IfxCif_Cam_stopCapture().

◆ IfxCif_getCurrentIspFrameCount()

IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount ( void )

Function to query the current ISP frame count.

Returns
Current ISP frame count

Definition at line 2411 of file IfxCif.h.

◆ IfxCif_getCurrentIspInformFieldInformation()

IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation ( void )

Function to query the current field information.

Returns
IfxCif_IspInformFieldInformation_Odd for odd fields, IfxCif_IspInformFieldInformation_Even for even fields

Definition at line 2417 of file IfxCif.h.

◆ IfxCif_getCurrentIspInputFormatterState()

IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState ( void )

Function to query the current state of the ISP formatter.

Returns
IfxCif_State_Enabled if the ISP input formatter is currently enabled, IfxCif_State_Disabled if the ISP input formatter is currently disabled

Definition at line 2423 of file IfxCif.h.

◆ IfxCif_getCurrentIspPictureOffset()

IFX_EXTERN uint16 IfxCif_getCurrentIspPictureOffset ( IfxCif_ImageTiers tier )

Function to query the current ISP picture offset for one tier.

Parameters
tier Tier for which to query the current ISP picture offset
Returns
Current ISP picture offset

Definition at line 332 of file IfxCif.c.

◆ IfxCif_getCurrentIspPictureSize()

IFX_EXTERN uint16 IfxCif_getCurrentIspPictureSize ( IfxCif_ImageTiers tier )

Function to query the current ISP picture size for one tier.

Parameters
tier Tier for which to query the current ISP picture size
Returns
Current ISP picture size

Definition at line 353 of file IfxCif.c.

◆ IfxCif_getIspAcquisitionOffset()

IFX_EXTERN uint16 IfxCif_getIspAcquisitionOffset ( IfxCif_ImageTiers tier )

Function to query the currently set ISP acquisition offset of one tier.

Parameters
tier Tier for which to query the ISP acquisition offset
Returns
Currently set ISP acquisition offset

Definition at line 1192 of file IfxCif.c.

◆ IfxCif_getIspAcquisitionSize()

IFX_EXTERN uint16 IfxCif_getIspAcquisitionSize ( IfxCif_ImageTiers tier )

Function to query the currently set ISP acquisition size of one tier.

Parameters
tier Tier for which to query the ISP acquisition size
Returns
Currently set acquisition size

Definition at line 1213 of file IfxCif.c.

◆ IfxCif_getIspCcirSequence()

IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence ( void )

Function to query the currently set CCIR sequence.

Returns
Currently set CCIR sequence (one member of IfxCif_IspCcirSequence)

Definition at line 2453 of file IfxCif.h.

◆ IfxCif_getIspColorSpaceMatrixCrominanceClippingRange()

IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange ( void )

Function to query the clipping range of the crominance of the ISP output.

Returns
Currently set clipping range (one member of IfxCif_IspColorSpaceMatrixCrominanceClippingRange)

Definition at line 2459 of file IfxCif.h.

◆ IfxCif_getIspColorSpaceMatrixLuminanceClippingRange()

IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange ( void )

Function to query the clipping range of the luminance of the ISP output.

Returns
Currently set clipping range (one member of IfxCif_IspColorSpaceMatrixLuminanceClippingRange)

Definition at line 2465 of file IfxCif.h.

◆ IfxCif_getIspErrorState()

IFX_EXTERN IfxCif_ErrorState IfxCif_getIspErrorState ( IfxCif_IspErrorSources errorSource )

Function to query the error state of an error source.

Parameters
errorSource errorSource Error source to query
Returns
IfxCif_ErrorState_Error if the error occured, IfxCif_ErrorState_NoError if the error did not occur

Definition at line 1234 of file IfxCif.c.

◆ IfxCif_getIspFieldInvertState()

IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState ( void )

Function to query the state of field ID inversion.

Returns
IfxCif_State_Enabled if field ID inversion is enabled, IfxCif_State_Disabled otherwise

Definition at line 2471 of file IfxCif.h.

◆ IfxCif_getIspFieldSelection()

IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection ( void )

Function to query the currently set field sample mode.

Returns
Currently set fields sample mode (one member of IfxCif_IspFieldSelection)

Definition at line 2477 of file IfxCif.h.

◆ IfxCif_getIspHSyncPolarity()

IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity ( void )

Function to query the currently set polarity of the HSYNC signal.

Returns
IfxCif_IspSyncPolarity_HighActive if HSYNC is configured as high active, IfxCif_IspSyncPolarity_LowActive if HSYNC is configured as low active

Definition at line 2483 of file IfxCif.h.

◆ IfxCif_getIspInputFormatterState()

IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState ( void )

Function to query the current state of the ISP input formatter.

Returns
IfxCif_State_Enabled if the ISP input formatter is enabled, IfxCif_State_Disabled otherwise

Definition at line 2489 of file IfxCif.h.

◆ IfxCif_getIspInputInterface()

IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface ( void )

Function to query the ISP input interface bit width.

Returns
Configured ISP input interface bit width (one member of IfxCif_IspInputInterface)

Definition at line 2495 of file IfxCif.h.

◆ IfxCif_getIspInputPortSDataState()

IFX_INLINE uint16 IfxCif_getIspInputPortSDataState ( void )

Function to query the current value of the ISP input port s_data (for test purposes only)

Returns
Current value of s_data

Definition at line 2501 of file IfxCif.h.

◆ IfxCif_getIspInputPortSVSyncState()

IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState ( void )

Function to query the current level of the ISP input port s_vsync (for test purposes only)

Returns
IfxCif_State_Enabled if s_vsync is high, IfxCif_State_Disabled if s_vsync is low

Definition at line 2513 of file IfxCif.h.

◆ IfxCif_getIspInputSelectionAppendState()

IFX_EXTERN IfxCif_State IfxCif_getIspInputSelectionAppendState ( void )

Function to query the append state.

Returns
IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise

Definition at line 1268 of file IfxCif.c.

◆ IfxCif_getIspInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getIspInterruptEnableState ( IfxCif_IspInterruptSources interruptSource )

Function to query the enabled state of an interrupt.

Parameters
interruptSource interruptSource Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 1285 of file IfxCif.c.

◆ IfxCif_getIspMode()

IFX_INLINE IfxCif_State IfxCif_getIspMode ( void )

Function to query the currently set ISP mode.

Returns
Current ISP mode (one member of IfxCif_IspMode)

Definition at line 2519 of file IfxCif.h.

◆ IfxCif_getIspOutputState()

IFX_INLINE IfxCif_State IfxCif_getIspOutputState ( void )

Function to query the ISP output state.

Returns
IfxCif_State_Enabled if the ISP output is enabled, IfxCif_State_Disabled otherwise

Definition at line 2525 of file IfxCif.h.

◆ IfxCif_getIspOutputWindowOffset()

IFX_EXTERN uint16 IfxCif_getIspOutputWindowOffset ( IfxCif_ImageTiers tier )

Function to query the currently set ISP output window offset for one tier.

Parameters
tier Tier for which to query the ISP output window offset
Returns
Currently set ISP output window offset

Definition at line 1350 of file IfxCif.c.

◆ IfxCif_getIspPictureSize()

IFX_EXTERN uint16 IfxCif_getIspPictureSize ( IfxCif_ImageTiers tier )

Function to query the currently set ISP picture size of one tier.

Parameters
tier Tier for which to query the ISP picture size
Returns
Currently set ISP picture size

Definition at line 1371 of file IfxCif.c.

◆ IfxCif_getIspSamplingEdge()

IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge ( void )

Function to query the currently set ISP sampling edge.

Returns
IfxCif_IspSamplingEdge_NegativeEdge if negative clock edge is configured as sampling edge, IfxCif_IspSamplingEdge_PositiveEdge if positive clock edge is configured as sampling edge

Definition at line 2531 of file IfxCif.h.

◆ IfxCif_getIspState()

IFX_INLINE IfxCif_State IfxCif_getIspState ( void )

Function to query the current state of the ISP.

Returns
IfxCif_State_Enabled if the ISP is currently enabled, IfxCif_State_Disabled if the ISP is currently disabled

Definition at line 2537 of file IfxCif.h.

◆ IfxCif_getIspVSyncPolarity()

IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity ( void )

Function to query the currently set polarity of the VSYNC signal.

Returns
IfxCif_IspSyncPolarity_HighActive if VSYNC is configured as high active, IfxCif_IspSyncPolarity_LowActive if VSYNC is configured as low active

Definition at line 2543 of file IfxCif.h.

◆ IfxCif_getMaskedIspInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState ( IfxCif_IspInterruptSources interruptSource )

Function to query the masked state of an interrupt.

Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1795 of file IfxCif.c.

◆ IfxCif_getNumberOfAcquisitionFrames()

IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames ( void )

Function to query the number of acquisition frames.

Returns
Currently set number of acquisition frames

Definition at line 2690 of file IfxCif.h.

◆ IfxCif_getRawIspInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState ( IfxCif_IspInterruptSources interruptSource )

Function to query the raw state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2294 of file IfxCif.c.

◆ IfxCif_setIspAcquisitionOffset()

IFX_EXTERN void IfxCif_setIspAcquisitionOffset | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | offset
 | ) |  |

Function to set the ISP acquisition offset of one tier.

Parameters
tier | Tier for which to set the ISP acquisition offset
offset | Acquisition offset to set
Returns
None

Definition at line 3196 of file IfxCif.c.

◆ IfxCif_setIspAcquisitionOffsets()

IFX_INLINE void IfxCif_setIspAcquisitionOffsets | ( | uint16 | hOffset,
 |  | uint16 | vOffset
 | ) |  |

Function to set the ISP acquisition offsets.

Parameters
hOffset | Acquisition horizontal offset to set
vOffset | Acquisition vertical offset to set
Returns
None

Definition at line 2764 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspAcquisitionSize()

IFX_EXTERN void IfxCif_setIspAcquisitionSize | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | size
 | ) |  |

Function to set the ISP acquisition size of one tier.

Parameters
tier | Tier for which to set the ISP acquisition size
size | Acquisition size to set
Returns
None

Definition at line 3213 of file IfxCif.c.

◆ IfxCif_setIspAcquisitionSizes()

IFX_INLINE void IfxCif_setIspAcquisitionSizes | ( | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the ISP acquisition sizes.

Parameters
hSize | Acquisition horizontal size to set
vSize | Acquisition vertical size to set
Returns
None

Definition at line 2771 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspCcirSequence()

IFX_INLINE void IfxCif_setIspCcirSequence ( IfxCif_IspCcirSequence sequence )

Function to set the CCIR sequence.

Parameters
sequence CCIR sequence to set
Returns
None

Definition at line 2778 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspColorSpaceMatrixCrominanceClippingRange()

IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange ( IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange )

Function to set the clipping range of the crominance of the ISP output.

Parameters
clippingRange Clipping range to set
Returns
None

Definition at line 2784 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspColorSpaceMatrixLuminanceClippingRange()

IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange ( IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange )

Function to set the clipping range of the luminance of the ISP output.

Parameters
clippingRange Clipping range to set
Returns
None

Definition at line 2790 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspFieldInvertState()

IFX_INLINE void IfxCif_setIspFieldInvertState ( IfxCif_State fieldInvertState )

Function to enable or disable inversion of the field ID.

Parameters
fieldInvertState IfxCif_State_Enabled to enable field ID inversion, IfxCif_State_Disabled to disable field ID inversion
Returns
None

Definition at line 2796 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspFieldSelection()

IFX_INLINE void IfxCif_setIspFieldSelection ( IfxCif_IspFieldSelection selection )

Function to select fields to sample.

Parameters
selection Sampled fields selector
Returns
None

Definition at line 2802 of file IfxCif.h.

◆ IfxCif_setIspHSyncPolarity()

IFX_INLINE void IfxCif_setIspHSyncPolarity ( IfxCif_IspSyncPolarity polarity )

Function to set the polarity of the HSYNC signal.

Parameters
polarity IfxCif_IspSyncPolarity_HighActive for high active HSYNC signal, IfxCif_IspSyncPolarity_LowActive for low active HSYNC signal
Returns
None

Definition at line 2808 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspInputFormatterState()

IFX_INLINE void IfxCif_setIspInputFormatterState ( IfxCif_State inputFormatterState )

Function to enable or disable the ISP input formatter.

Parameters
inputFormatterState IfxCif_State_Enabled to enable the ISP input formatter, IfxCif_State_Disabled to disable it
Returns
None

Definition at line 2814 of file IfxCif.h.

Referenced by IfxCif_Cam_startCapture().

◆ IfxCif_setIspInputInterface()

IFX_INLINE void IfxCif_setIspInputInterface ( IfxCif_IspInputInterface input )

Function to set the ISP input interface bit width.

Parameters
input ISP input interface bit width to set
Returns
None

Definition at line 2820 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspInputSelectionAppendState()

IFX_EXTERN void IfxCif_setIspInputSelectionAppendState ( IfxCif_State appendState )

Function to enable or disable appending of bits to the input signal.

Parameters
appendState IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise
Returns
None

Definition at line 3230 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspInterruptEnableState()

IFX_EXTERN void IfxCif_setIspInterruptEnableState | ( | IfxCif_IspInterruptSources | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
interruptSource | interruptSource Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3244 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspInterruptRequestBit()

IFX_EXTERN void IfxCif_setIspInterruptRequestBit ( IfxCif_IspInterruptSources interruptSource )

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 3281 of file IfxCif.c.

◆ IfxCif_setIspMode()

IFX_INLINE void IfxCif_setIspMode ( IfxCif_IspMode mode )

Function to set the ISP mode.

Parameters
mode Mode to set
Returns
None

Definition at line 2826 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspOutputState()

IFX_INLINE void IfxCif_setIspOutputState ( IfxCif_State ispOutputState )

Function to enable or disable the ISP output.

Parameters
ispOutputState ispOutputState IfxCif_State_Enabled to enable the ISP output, IfxCif_State_Disabled to disable it
Returns
None

Definition at line 2832 of file IfxCif.h.

Referenced by IfxCif_Cam_restartCapture(), IfxCif_Cam_startCapture(), and IfxCif_Cam_stopCapture().

◆ IfxCif_setIspOutputWindowOffset()

IFX_EXTERN void IfxCif_setIspOutputWindowOffset | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | offset
 | ) |  |

Function to set the ISP output window offset for one tier.

Parameters
tier | Tier for which to query the ISP output window offset
offset | Offset to set
Returns
None

Definition at line 3318 of file IfxCif.c.

◆ IfxCif_setIspOutputWindowOffsets()

IFX_INLINE void IfxCif_setIspOutputWindowOffsets | ( | uint16 | hOffset,
 |  | uint16 | vOffset
 | ) |  |

Function to set the ISP output window offsets.

Parameters
hOffset | Offset horizontal to set
vOffset | Offset vertical to set
Returns
None

Definition at line 2838 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspPictureSize()

IFX_EXTERN void IfxCif_setIspPictureSize | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | pictureSize
 | ) |  |

Function to set the ISP picture size of one tier.

Parameters
tier | Tier for which to set the ISP picture size
pictureSize | Picture size to set
Returns
None

Definition at line 3335 of file IfxCif.c.

◆ IfxCif_setIspPictureSizes()

IFX_INLINE void IfxCif_setIspPictureSizes | ( | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the ISP picture sizes.

Parameters
hSize | Picture horizontal size to set
vSize | Picture vertical size to set
Returns
None

Definition at line 2845 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspSamplingEdge()

IFX_INLINE void IfxCif_setIspSamplingEdge ( IfxCif_IspSamplingEdge edge )

Function to set the ISP sampling edge.

Parameters
edge IfxCif_IspSamplingEdge_NegativeEdge to sample at negative clock edges, IfxCif_IspSamplingEdge_PositiveEdge to sample at positive clock edges
Returns
None

Definition at line 2852 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspVSyncPolarity()

IFX_INLINE void IfxCif_setIspVSyncPolarity ( IfxCif_IspSyncPolarity polarity )

Function to set the polarity of the VSYNC signal.

Parameters
polarity IfxCif_IspSyncPolarity_HighActive for high active VSYNC signal, IfxCif_IspSyncPolarity_LowActive for low active VSYNC signal
Returns
None

Definition at line 2858 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setNumberOfAcquisitionFrames()

IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames ( uint16 numberOfFrames )

Function to set the number of acquisition frames.

Parameters
numberOfFrames Number of acquisition frames to set
Returns
None

Definition at line 2990 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit(), IfxCif_Cam_restartCapture(), and IfxCif_Cam_startCapture().


iLLD_TC26B: Linear Downscaler Functions

Functions
Linear Downscaler Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Linear Downscaler Functions:

Functions

IFX_EXTERN IfxCif_State | IfxCif_getLinearDownscalerEnableState (IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier. More...
IFX_EXTERN uint8 | IfxCif_getLinearDownscalerScalingFactor (IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier. More...
IFX_EXTERN IfxCif_LinearDownscalerScalingMode | IfxCif_getLinearDownscalerScalingMode (IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerEnableState (IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingFactor (IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingFactors (uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingMode (IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingModes (IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier. More...

Detailed Description

Function Documentation

◆ IfxCif_getLinearDownscalerEnableState()

IFX_EXTERN IfxCif_State IfxCif_getLinearDownscalerEnableState ( IfxCif_ImageTiers tier )

Function to query the current state of the linear downscaler for one tier.

Parameters
tier Tier for which to query the state of the linear downscaler
Returns
IfxCif_State_Enabled if the linear downscaler is enabled, IfxCif_State_Disabled if the linear downscaler is disabled

Definition at line 1681 of file IfxCif.c.

◆ IfxCif_getLinearDownscalerScalingFactor()

IFX_EXTERN uint8 IfxCif_getLinearDownscalerScalingFactor ( IfxCif_ImageTiers tier )

Function to query the currently set scaling factor of the linear downscaler of one tier.

Parameters
tier Tier for which to query the scaling factor
Returns
Current set scaling factor

Definition at line 1702 of file IfxCif.c.

◆ IfxCif_getLinearDownscalerScalingMode()

IFX_EXTERN IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode ( IfxCif_ImageTiers tier )

Function to query the currently set scaling mode of one tier.

Parameters
tier Tier for which to query the scaling mode
Returns
Currently set scaling mode (one member of IfxCif_LinearDownscalerScalingMode)

Definition at line 1723 of file IfxCif.c.

◆ IfxCif_setLinearDownscalerEnableState()

IFX_EXTERN void IfxCif_setLinearDownscalerEnableState | ( | IfxCif_ImageTiers | tier,
 |  | IfxCif_State | enableState
 | ) |  |

Function to enable or disable the linear downscaler for one tier.

Parameters
tier | Tier for which to enable or disable the linear downscaler
enableState | IfxCif_State_Enabled to enable the linear downscaler, IfxCif_State_Disabled to disable the linear downscaler
Returns
None

Definition at line 3541 of file IfxCif.c.

◆ IfxCif_setLinearDownscalerScalingFactor()

IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactor | ( | IfxCif_ImageTiers | tier,
 |  | uint8 | factor
 | ) |  |

Function to set the scaling factor of the linear downscaler of one tier.

Parameters
tier | Tier for which to set the scaling factor
factor | Factor to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
Returns
None

Definition at line 3562 of file IfxCif.c.

◆ IfxCif_setLinearDownscalerScalingFactors()

IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactors | ( | uint8 | horizFactor,
 |  | uint8 | vertFactor
 | ) |  |

Function to set the scaling factors of the linear downscaler.

Parameters
horizFactor | Factor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
vertFactor | actor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
Returns
None

Definition at line 3583 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifDownscaler().

◆ IfxCif_setLinearDownscalerScalingMode()

IFX_EXTERN void IfxCif_setLinearDownscalerScalingMode | ( | IfxCif_ImageTiers | tier,
 |  | IfxCif_LinearDownscalerScalingMode | mode
 | ) |  |

Function to set the scaling mode of one tier.

Parameters
tier | Tier for which to set the scaling mode
mode | Scaling mode to set
Returns
None

Definition at line 3593 of file IfxCif.c.

◆ IfxCif_setLinearDownscalerScalingModes()

IFX_EXTERN void IfxCif_setLinearDownscalerScalingModes | ( | IfxCif_LinearDownscalerScalingMode | horizMode,
 |  | IfxCif_LinearDownscalerScalingMode | vertMode
 | ) |  |

Function to set the scaling mode of one tier.

Parameters
horizMode | Scaling mode to set for horizontal If the horizMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the horizontal scaling will be enabled.
vertMode | Scaling mode to set for vertical If the vertMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the vertical scaling will be enabled.
Returns
None

Definition at line 3614 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifDownscaler().


iLLD_TC26B: Linear Downscaler Enumerations

Enumerations
Linear Downscaler Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Linear Downscaler Enumerations:

Enumerations

enum IfxCif_LinearDownscalerScalingMode {
IfxCif_LinearDownscalerScalingMode_SingleSkip = 0,
IfxCif_LinearDownscalerScalingMode_DoubleSkip = 1,
IfxCif_LinearDownscalerScalingMode_SinglePass = 2,
IfxCif_LinearDownscalerScalingMode_DoublePass = 3,
IfxCif_LinearDownscalerScalingMode_Disabled = -1
}
Enumerator for scaling mode of linear downscaler. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_LinearDownscalerScalingMode

enum IfxCif_LinearDownscalerScalingMode

Enumerator for scaling mode of linear downscaler.

Enumerator
IfxCif_LinearDownscalerScalingMode_SingleSkip | Scaling mode single skip.
IfxCif_LinearDownscalerScalingMode_DoubleSkip | Scaling mode double skip.
IfxCif_LinearDownscalerScalingMode_SinglePass | Scaling mode single pass.
IfxCif_LinearDownscalerScalingMode_DoublePass | Scaling mode double pass.
IfxCif_LinearDownscalerScalingMode_Disabled | Disabled.

Definition at line 288 of file IfxCif.h.


iLLD_TC26B: Memory Interface Functions

Functions
Memory Interface Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Memory Interface Functions:

Functions

IFX_INLINE void | IfxCif_generateMiImmediateConfigUpdateSignal (void)
Function to generate an immediate configuration update signal for the memory interface submodule. More...
IFX_INLINE IfxCif_State | IfxCif_getBaseAddressInitializationEnableState (void)
Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values. More...
IFX_INLINE uint32 | IfxCif_getMiByteCount (void)
Function to query the number of JPEG or RAW data bytes of the last transmitted frame. More...
IFX_INLINE IfxCif_State | IfxCif_getMiByteSwapEnableState (void)
Function to query the current state of the change of byte order of the 32 bit output word. More...
IFX_INLINE IfxCif_MiBurstLength | IfxCif_getMiChrominanceBurstLength (void)
Function to query the currently set burst length for Cb and Cr data. More...
IFX_INLINE IfxCif_MiBurstLength | IfxCif_getMiLuminanceBurstLength (void)
Function to query the currently set burst length for Y, JPEG, or RAW data. More...
IFX_INLINE IfxCif_MiMainPictureWriteFormat | IfxCif_getMiMainPictureWriteFormat (void)
Function to query the currently set write format of the main picture path of the memory interface. More...
IFX_INLINE uint32 | IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset (void)
Function to query the filling level that triggers an interrupt of main picture path Y component. More...
IFX_INLINE uint32 | IfxCif_getMiMainPictureYInterruptOffset (void)
Function to query the filling level of the main picture Y component that triggers an interrupt. More...
IFX_INLINE IfxCif_State | IfxCif_getMiOffsetCounterInitializationEnableState (void)
Function to query the enabled state of the update signal of the offset counter shadow registers. More...
IFX_INLINE void | IfxCif_miSkipPicture (void)
Function to skip the current or next starting main data path picture. More...
IFX_INLINE void | IfxCif_setMiBaseAddressInitializationEnableState (IfxCif_State state)
Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port) More...
IFX_INLINE void | IfxCif_setMiByteSwapEnableState (IfxCif_State enableState)
Function to enable or disable the change of byte order of the 32 bit output word. More...
IFX_INLINE void | IfxCif_setMiChrominanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Cb and Cr data. More...
IFX_INLINE void | IfxCif_setMiMainPictureWriteFormat (IfxCif_MiMainPictureWriteFormat format)
Function to set the write format of the main picture path of the memory interface. More...
IFX_INLINE void | IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset (uint32 interruptOffset)
Function to set the filling level to trigger an interrupt for main picture path Y component. More...
IFX_INLINE void | IfxCif_setMiOffsetCounterInitializationEnableState (IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port) More...
IFX_EXTERN void | IfxCif_clearMiInterrupt (IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN void | IfxCif_clearMiStatus (IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule. More...
IFX_EXTERN uint32 | IfxCif_getMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiDataPathInputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiDataPathOutputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiFeatureEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentBaseAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentOffsetCounterStart (IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentSize (IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getMiStatusInformation (IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface module. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setMiFeatureEnableState (IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path. More...
IFX_EXTERN void | IfxCif_setMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setMiInterruptRequestBit (IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setMiLuminanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component. More...

Detailed Description

Function Documentation

◆ IfxCif_clearMiInterrupt()

IFX_EXTERN void IfxCif_clearMiInterrupt ( IfxCif_MiInterruptSources interruptSource )

Function to clear an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 168 of file IfxCif.c.

◆ IfxCif_clearMiStatus()

IFX_EXTERN void IfxCif_clearMiStatus ( IfxCif_MiStatusClearSources source )

Function to clear the status information of one status clear source of the memory interface submodule.

Parameters
source Status information source for which to clear the status
Returns
None

Definition at line 205 of file IfxCif.c.

◆ IfxCif_generateMiImmediateConfigUpdateSignal()

IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal ( void )

Function to generate an immediate configuration update signal for the memory interface submodule.

Returns
None

Definition at line 2368 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifMemInterface(), and IfxCif_Cam_startCapture().

◆ IfxCif_getBaseAddressInitializationEnableState()

IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState ( void )

Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values.

Returns
IfxCif_State_Enabled if update of the base address and buffer size shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), IfxCif_State_Disabled if update of the base address and buffer size shadow registers is disabled

Definition at line 2374 of file IfxCif.h.

◆ IfxCif_getMainPictureComponentBaseInitAddress()

IFX_EXTERN uint32 IfxCif_getMainPictureComponentBaseInitAddress ( IfxCif_MiMainPicturePathComponents component )

Function to query the initial base address of the ring buffer of one main picture path component.

Parameters
component Main picture path component for which to query the initial base address
Returns
Initial base address of the main picture path component

Definition at line 1744 of file IfxCif.c.

◆ IfxCif_getMaskedMiInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState ( IfxCif_MiInterruptSources interruptSource )

Function to query the masked state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1901 of file IfxCif.c.

◆ IfxCif_getMiByteCount()

IFX_INLINE uint32 IfxCif_getMiByteCount ( void )

Function to query the number of JPEG or RAW data bytes of the last transmitted frame.

Returns
Number of JPEG or RAW data bytes of the last transmitted frame (updated at frame end)

Definition at line 2615 of file IfxCif.h.

◆ IfxCif_getMiByteSwapEnableState()

IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState ( void )

Function to query the current state of the change of byte order of the 32 bit output word.

Returns
IfxCif_State_Enabled if byte swapping is enabled, IfxCif_State_Disabled if byte swapping is disabled

Definition at line 2621 of file IfxCif.h.

◆ IfxCif_getMiChrominanceBurstLength()

IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength ( void )

Function to query the currently set burst length for Cb and Cr data.

Returns
IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred

Definition at line 2627 of file IfxCif.h.

◆ IfxCif_getMiDataPathInputEnableState()

IFX_EXTERN IfxCif_State IfxCif_getMiDataPathInputEnableState ( IfxCif_MiDataPaths dataPath )

Function to query the enabled state of one main data path component at the memory interface input.

Parameters
dataPath Main data path component for which to query the enabled state
Returns
IfxCif_State_Enabled if the main data path component is enabled, IfxCif_State_Disabled if the main data path component is disabled

Definition at line 1971 of file IfxCif.c.

◆ IfxCif_getMiDataPathOutputEnableState()

IFX_EXTERN IfxCif_State IfxCif_getMiDataPathOutputEnableState ( IfxCif_MiDataPaths dataPath )

Function to query the enabled state of one main data path component at the memory interface output.

Parameters
dataPath Main data path component for which to query the enabled state
Returns
IfxCif_State_Enabled if the main data path component is enabled, IfxCif_State_Disabled if the main data path component is disabled

Definition at line 1996 of file IfxCif.c.

◆ IfxCif_getMiFeatureEnableState()

IFX_EXTERN IfxCif_State IfxCif_getMiFeatureEnableState ( IfxCif_MiDataPaths dataPath )

Function to query the enabled state of a memory interface data path.

Parameters
dataPath Data path to query
Returns
IfxCif_State_Enabled if the memory interface data path is enabled, IfxCif_State_Disabled if the data path is disabled

Definition at line 2021 of file IfxCif.c.

◆ IfxCif_getMiInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getMiInterruptEnableState ( IfxCif_MiInterruptSources interruptSource )

Function to query the enabled state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 2046 of file IfxCif.c.

◆ IfxCif_getMiLuminanceBurstLength()

IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength ( void )

Function to query the currently set burst length for Y, JPEG, or RAW data.

Returns
IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred

Definition at line 2633 of file IfxCif.h.

◆ IfxCif_getMiMainPictureComponentBaseAddress()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentBaseAddress ( IfxCif_MiMainPicturePathComponents component )

Function to query the current base address of the ring buffer of one main picture path component.

Parameters
component Main Picture path component for which to query the base address
Returns
Current base address of the ring buffer of the main picture path component

Definition at line 2087 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentInitialOffsetCounter()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter ( IfxCif_MiMainPicturePathComponents component )

Function to query the initial offset counter inside the ring buffer of one main picture path compoent.

Parameters
component Main picture path component for which to query the initial offset counter
Returns
Initial offset counter value of the main picture path component

Definition at line 2139 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentInitSize()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitSize ( IfxCif_MiMainPicturePathComponents component )

Function to query the initial size of the ring buffer of one main picture path component.

Parameters
component Main picture path component for which to query the intial size
Returns
Initial size of the main picture path component

Definition at line 2112 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentOffsetCounter()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounter ( IfxCif_MiMainPicturePathComponents component )

Function to query the current offset counter within the ring buffer of one main picture path component.

Parameters
component Main picture path component for which to query the offest counter value
Returns
Current offset counter within the ring buffer of the main picture path component

Definition at line 2166 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentOffsetCounterStart()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart ( IfxCif_MiMainPicturePathComponents component )

Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component.

Parameters
component Main picture path component for which to query the offset counter value
Returns
Offset counter value pointing to the start address of the previously processed picture

Definition at line 2191 of file IfxCif.c.

◆ IfxCif_getMiMainPictureComponentSize()

IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentSize ( IfxCif_MiMainPicturePathComponents component )

Function to query the current size of the ring buffer of one main picture path component.

Parameters
component Main Picture path component for which to query the size
Returns
Current size of the ring buffer of the main picture path component

Definition at line 2218 of file IfxCif.c.

◆ IfxCif_getMiMainPictureWriteFormat()

IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat ( void )

Function to query the currently set write format of the main picture path of the memory interface.

Returns
Currently set write format (one member of IfxCif_MiMainPictureWriteFormat)

Definition at line 2639 of file IfxCif.h.

◆ IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset()

IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset ( void )

Function to query the filling level that triggers an interrupt of main picture path Y component.

Returns
Filling level that triggers an interrupt

Definition at line 2645 of file IfxCif.h.

◆ IfxCif_getMiMainPictureYInterruptOffset()

IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset ( void )

Function to query the filling level of the main picture Y component that triggers an interrupt.

Returns
Filling level of the main picture Y component that triggers an interrupt

Definition at line 2653 of file IfxCif.h.

◆ IfxCif_getMiOffsetCounterInitializationEnableState()

IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState ( void )

Function to query the enabled state of the update signal of the offset counter shadow registers.

Returns
IfxCif_State_Enabled if update of the offset counter shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), IfxCif_State_Disabled if update of the offset counter shadow registers is disabled

Definition at line 2659 of file IfxCif.h.

◆ IfxCif_getMiStatusInformation()

IFX_EXTERN IfxCif_ErrorState IfxCif_getMiStatusInformation ( IfxCif_MiStatusInformationSources source )

Function to query the status information of one status information source of the memory interface module.

Parameters
source Status information source for which to query the status information
Returns
IfxCif_ErrorState_NoError if the error has occured since the last clear, IfxCif_ErrorState_Error if the error has occured since the last clear

Definition at line 2243 of file IfxCif.c.

◆ IfxCif_getRawMiInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState ( IfxCif_MiInterruptSources interruptSource )

Function to query the raw state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2396 of file IfxCif.c.

◆ IfxCif_miSkipPicture()

IFX_INLINE void IfxCif_miSkipPicture ( void )

Function to skip the current or next starting main data path picture.

Returns
None

Definition at line 2726 of file IfxCif.h.

Referenced by IfxCif_Cam_skipPicture().

◆ IfxCif_setMiBaseAddressInitializationEnableState()

IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState ( IfxCif_State state )

Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)

Parameters
state IfxCif_State_Enabled to enable the generation of the update signal, IfxCif_State_Disabled to disable the generation of the update signal
Returns
None

Definition at line 2952 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiByteSwapEnableState()

IFX_INLINE void IfxCif_setMiByteSwapEnableState ( IfxCif_State enableState )

Function to enable or disable the change of byte order of the 32 bit output word.

Parameters
enableState IfxCif_State_Enabled to enable byte swapping, IfxCif_State_Disabled to disable byte swapping
Returns
None

Definition at line 2958 of file IfxCif.h.

◆ IfxCif_setMiChrominanceBurstLength()

IFX_INLINE void IfxCif_setMiChrominanceBurstLength ( IfxCif_MiBurstLength burstLength )

Function to set the burst length for Cb and Cr data.

Parameters
burstLength Burst length to set
Returns
None

Definition at line 2964 of file IfxCif.h.

◆ IfxCif_setMiFeatureEnableState()

IFX_EXTERN void IfxCif_setMiFeatureEnableState | ( | IfxCif_MiDataPaths | dataPath,
 |  | IfxCif_State | enableState
 | ) |  |

Function to enable or disable one memory interface data path.

Parameters
dataPath | Data path to enable or disable
enableState | IfxCif_State_Enabled to enable the data path, IfxCif_State_Disabled to disable the data path
Returns
None

Definition at line 3626 of file IfxCif.c.

Referenced by IfxCif_Cam_disableJpegEncoder(), IfxCif_Cam_enableJpegEncoder(), and IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiInterruptEnableState()

IFX_EXTERN void IfxCif_setMiInterruptEnableState | ( | IfxCif_MiInterruptSources | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
interruptSource | Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3647 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiInterruptRequestBit()

IFX_EXTERN void IfxCif_setMiInterruptRequestBit ( IfxCif_MiInterruptSources interruptSource )

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 3684 of file IfxCif.c.

◆ IfxCif_setMiLuminanceBurstLength()

IFX_EXTERN void IfxCif_setMiLuminanceBurstLength ( IfxCif_MiBurstLength burstLength )

Function to set the burst length for Y, JPEG, or RAW data.

Parameters
burstLength Burst length to set
Returns
None

Definition at line 3721 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiMainPictureComponentBaseInitAddress()

IFX_EXTERN void IfxCif_setMiMainPictureComponentBaseInitAddress | ( | IfxCif_MiMainPicturePathComponents | component,
 |  | Ifx_AddressValue | address
 | ) |  |

Function to set the initial base address of the ring buffer for one main picture path component.

Parameters
component | Main picture path component for which to set the initial base address
address | Base address to set (must be word aligned)
Returns
None

Definition at line 3727 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiMainPictureComponentInitialOffsetCounter()

IFX_EXTERN void IfxCif_setMiMainPictureComponentInitialOffsetCounter | ( | IfxCif_MiMainPicturePathComponents | component,
 |  | uint32 | offsetCounter
 | ) |  |

Function to set the initial offset counter inside the ring buffer for one main picture path component.

Parameters
component | Main picture path component for which to set the initial offest counter
offsetCounter | Offset counter value to set (must be word aligned)
Returns
None

Definition at line 3775 of file IfxCif.c.

◆ IfxCif_setMiMainPictureComponentInitSize()

IFX_EXTERN void IfxCif_setMiMainPictureComponentInitSize | ( | IfxCif_MiMainPicturePathComponents | component,
 |  | uint32 | size
 | ) |  |

Function to set the initial size of the ring buffer for one main picture path component.

Parameters
component | Main picture path component for which to set the initial size
size | Size to set (must be word aligned)
Returns
None

Definition at line 3752 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiMainPictureWriteFormat()

IFX_INLINE void IfxCif_setMiMainPictureWriteFormat ( IfxCif_MiMainPictureWriteFormat format )

Function to set the write format of the main picture path of the memory interface.

Parameters
format Format to set
Returns
None

Definition at line 2970 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifMemInterface().

◆ IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset()

IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset ( uint32 interruptOffset )

Function to set the filling level to trigger an interrupt for main picture path Y component.

Parameters
interruptOffset Filling level to set
Returns
None

Definition at line 2976 of file IfxCif.h.

◆ IfxCif_setMiOffsetCounterInitializationEnableState()

IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState ( IfxCif_State state )

Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)

Parameters
state IfxCif_State_Enabled to enable the generation of the update signal, IfxCif_State_Disabled to disable the generation of the update signal
Returns
None

Definition at line 2984 of file IfxCif.h.

Referenced by IfxCif_Cam_skipPicture(), and IfxCif_Cam_startCapture().


iLLD_TC26B: Memory Interface Enumerations

Enumerations
Memory Interface Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Memory Interface Enumerations:

Enumerations

enum IfxCif_MiBurstLength {
IfxCif_MiBurstLength_4BeatBursts = 0,
IfxCif_MiBurstLength_8BeatBursts = 1
}
Enumerator for burst length affecting the write port of the memory interface. More...
enum IfxCif_MiDataPaths {
IfxCif_MiDataPaths_RawData = 0,
IfxCif_MiDataPaths_JpegData = 1,
IfxCif_MiDataPaths_MainPictureData = 2
}
Enumerator for data paths of the memory interface. More...
enum IfxCif_MiInterruptSources {
IfxCif_MiInterruptSources_BusError = 0,
IfxCif_MiInterruptSources_WrapMainPictureCr = 1,
IfxCif_MiInterruptSources_WrapMainPictureCb = 2,
IfxCif_MiInterruptSources_WrapMainPictureY = 3,
IfxCif_MiInterruptSources_FillMainPictureY = 4,
IfxCif_MiInterruptSources_MacroBlockLine = 5,
IfxCif_MiInterruptSources_MainPictureFrameEnd = 6
}
Enumerator for interrupt sources of the memory interface submodule. More...
enum IfxCif_MiMainPicturePathComponents {
IfxCif_MiMainPicturePathComponents_Y = 0,
IfxCif_MiMainPicturePathComponents_Cb = 1,
IfxCif_MiMainPicturePathComponents_Cr = 2
}
Enumerator for main picture path components of the memory interface. More...
enum IfxCif_MiMainPictureWriteFormat {
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit = 0,
IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit = 1,
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit = 2
}
Enumerator for write formats of data written into memory. More...
enum IfxCif_MiStatusClearSources {
IfxCif_MiStatusClearSources_ExtraPath5FifoFull = 0,
IfxCif_MiStatusClearSources_ExtraPath4FifoFull = 1,
IfxCif_MiStatusClearSources_ExtraPath3FifoFull = 2,
IfxCif_MiStatusClearSources_ExtraPath2FifoFull = 3,
IfxCif_MiStatusClearSources_ExtraPath1FifoFull = 4,
IfxCif_MiStatusClearSources_BusWriteError = 5,
IfxCif_MiStatusClearSources_MainPictureCrFifoFull = 6,
IfxCif_MiStatusClearSources_MainPictureCbFifoFull = 7,
IfxCif_MiStatusClearSources_MainPictureYFifoFull = 8
}
Enumerator for status clear sources of the memory interface module. More...
enum IfxCif_MiStatusInformationSources {
IfxCif_MiStatusInformationSources_BusWriteError = 0,
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull = 1,
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull = 2,
IfxCif_MiStatusInformationSources_MainPictureYFifoFull = 3
}
Enumerator for status information sources of the memory interface submodule. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_MiBurstLength

enum IfxCif_MiBurstLength

Enumerator for burst length affecting the write port of the memory interface.

Enumerator
IfxCif_MiBurstLength_4BeatBursts | 4-beat bursts
IfxCif_MiBurstLength_8BeatBursts | 8-beat bursts

Definition at line 303 of file IfxCif.h.

◆ IfxCif_MiDataPaths

enum IfxCif_MiDataPaths

Enumerator for data paths of the memory interface.

Enumerator
IfxCif_MiDataPaths_RawData | RAW data path.
IfxCif_MiDataPaths_JpegData | JPEG data path.
IfxCif_MiDataPaths_MainPictureData | main picture data path

Definition at line 311 of file IfxCif.h.

◆ IfxCif_MiInterruptSources

enum IfxCif_MiInterruptSources

Enumerator for interrupt sources of the memory interface submodule.

Enumerator
IfxCif_MiInterruptSources_BusError | Bus write or read error interrupt (from handshake target interfaces)
IfxCif_MiInterruptSources_WrapMainPictureCr | Main picture Cr address wrap interrupt.
IfxCif_MiInterruptSources_WrapMainPictureCb | Main picture Cb address wrap interrupt.
IfxCif_MiInterruptSources_WrapMainPictureY | Main picture Y address wrap interrupt.
IfxCif_MiInterruptSources_FillMainPictureY | Main picture Y address wrap interrupt.
IfxCif_MiInterruptSources_MacroBlockLine | Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written into RAM)
IfxCif_MiInterruptSources_MainPictureFrameEnd | Picture end of frame interrupt.

Definition at line 320 of file IfxCif.h.

◆ IfxCif_MiMainPicturePathComponents

enum IfxCif_MiMainPicturePathComponents

Enumerator for main picture path components of the memory interface.

Enumerator
IfxCif_MiMainPicturePathComponents_Y | Y-component.
IfxCif_MiMainPicturePathComponents_Cb | Cb-component.
IfxCif_MiMainPicturePathComponents_Cr | Cr-component.

Definition at line 333 of file IfxCif.h.

◆ IfxCif_MiMainPictureWriteFormat

enum IfxCif_MiMainPictureWriteFormat

Enumerator for write formats of data written into memory.

Enumerator
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit | planar (YCbCr mode) / RAW & data mode (8 bit)
IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit | semi-planar for YCbCr 4:2:x / RAW 8 bit
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit | interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit)

Definition at line 342 of file IfxCif.h.

◆ IfxCif_MiStatusClearSources

enum IfxCif_MiStatusClearSources

Enumerator for status clear sources of the memory interface module.

Enumerator
IfxCif_MiStatusClearSources_ExtraPath5FifoFull | FIFO full flag in extra path 5.
IfxCif_MiStatusClearSources_ExtraPath4FifoFull | FIFO full flag in extra path 4.
IfxCif_MiStatusClearSources_ExtraPath3FifoFull | FIFO full flag in extra path 3.
IfxCif_MiStatusClearSources_ExtraPath2FifoFull | FIFO full flag in extra path 2.
IfxCif_MiStatusClearSources_ExtraPath1FifoFull | FIFO full flag in extra path 1.
IfxCif_MiStatusClearSources_BusWriteError | Bus write error flag.
IfxCif_MiStatusClearSources_MainPictureCrFifoFull | Cr FIFO full flag in main path.
IfxCif_MiStatusClearSources_MainPictureCbFifoFull | Cb FIFO full flag in main path.
IfxCif_MiStatusClearSources_MainPictureYFifoFull | Y FIFO full flag in main path.

Definition at line 351 of file IfxCif.h.

◆ IfxCif_MiStatusInformationSources

enum IfxCif_MiStatusInformationSources

Enumerator for status information sources of the memory interface submodule.

Enumerator
IfxCif_MiStatusInformationSources_BusWriteError | An Bus error occurred while writing to the Bus (main/self path) since last clear.
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull | FIFO full flag of Cr FIFO in main path asserted since last clear.
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull | FIFO full flag of Cb FIFO in main path asserted since last clear.
IfxCif_MiStatusInformationSources_MainPictureYFifoFull | FIFO full flag of Y FIFO in main path asserted since last clear.

Definition at line 366 of file IfxCif.h.


iLLD_TC26B: JPEG Encoder Functions

Functions
JPEG Encoder Functions
iLLD » CIF » Standard Driver
Collaboration diagram for JPEG Encoder Functions:

Functions

IFX_INLINE IfxCif_JpeHeaderGenerationMode | IfxCif_getJpeHeaderGenerationMode (void)
Function to query the current header generation debug control mode. More...
IFX_INLINE IfxCif_JpeHeaderMode | IfxCif_getJpeHeaderMode (void)
Function to query the currently set JPE header mode. More...
IFX_INLINE IfxCif_State | IfxCif_getJpeMode (void)
Function to query the JPE encode mode. More...
IFX_INLINE uint16 | IfxCif_getJpeRestartInterval (void)
Function to query the current restart interval. More...
IFX_INLINE IfxCif_JpeState | IfxCif_getJpeState (void)
Function to get the current JPEG codec state. More...
IFX_INLINE IfxCif_JpeTableId | IfxCif_getJpeTableId (void)
Function to query the current JPE Table ID. More...
IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode | IfxCif_getJpegJfifStreamEncoderContinuousMode (void)
Function to query the current encoder continuous mode. More...
IFX_INLINE IfxCif_JpegPictureEncodingFormat | IfxCif_getJpegPictureEncodingFormat (void)
Function to query the current picture encoding format. More...
IFX_INLINE void | IfxCif_initJpegEncoder (void)
Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder. More...
IFX_INLINE void | IfxCif_jpeGenerateHeader (void)
Function to start to generate JPEG stream header. Auto reset after one clock cycle. More...
IFX_INLINE void | IfxCif_setJpeHeaderGenerationMode (IfxCif_JpeHeaderGenerationMode headerGenerationMode)
Function to set the header generation debug control mode. More...
IFX_INLINE void | IfxCif_setJpeHeaderMode (IfxCif_JpeHeaderMode headerMode)
Function to set the JPE header mode. More...
IFX_INLINE void | IfxCif_setJpeRestartInterval (uint16 interval)
Function to set the restart interval. More...
IFX_INLINE void | IfxCif_setJpeTableDataLsb (uint8 data)
Function to set the JPE Table LSB. More...
IFX_INLINE void | IfxCif_setJpeTableDataMsb (uint8 data)
Function to set the JPE Table MSB. More...
IFX_INLINE void | IfxCif_setJpeTableId (IfxCif_JpeTableId tableId)
Function to set the JPE Table ID. More...
IFX_INLINE void | IfxCif_setJpegCodecImageSizes (uint16 hSize, uint16 vSize)
Function to set the JPEG codec image sizes. More...
IFX_INLINE void | IfxCif_setJpegJfifStreamEncoderContinuousMode (IfxCif_JpegJfifStreamEncoderContinuousMode mode)
Function to set the stream encoder continuous mode. More...
IFX_INLINE void | IfxCif_setJpegPictureEncodingFormat (IfxCif_JpegPictureEncodingFormat format)
Function to set the picture encoding format. More...
IFX_INLINE void | IfxCif_startJpegJfifStreamEncoder (void)
Function to start JFIF stream encoding. Auto reset after one clock cycle. More...
IFX_EXTERN void | IfxCif_clearJpeInterrupt (IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN uint8 | IfxCif_getHuffmanAcTableLength (IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values. More...
IFX_EXTERN IfxCif_State | IfxCif_getHuffmanAcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values. More...
IFX_EXTERN uint8 | IfxCif_getHuffmanDcTableLength (IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values. More...
IFX_EXTERN IfxCif_State | IfxCif_getHuffmanDcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values. More...
IFX_EXTERN IfxCif_JpeDebugSignalState | IfxCif_getJpeDebugSignalState (IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source. More...
IFX_EXTERN IfxCif_State | IfxCif_getJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN IfxCif_JpeQTableSelector | IfxCif_getJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component. More...
IFX_EXTERN IfxCif_State | IfxCif_getJpeScalingEnableState (IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source. More...
IFX_EXTERN uint16 | IfxCif_getJpegCodecImageSize (IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_programJpeTable (IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
IFX_EXTERN void | IfxCif_setHuffmanAcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values. More...
IFX_EXTERN void | IfxCif_setHuffmanAcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values. More...
IFX_EXTERN void | IfxCif_setHuffmanDcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values. More...
IFX_EXTERN void | IfxCif_setHuffmanDcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values. More...
IFX_EXTERN void | IfxCif_setJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setJpeInterruptRequestBit (IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component. More...
IFX_EXTERN void | IfxCif_setJpeScalingEnableState (IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source. More...
IFX_EXTERN void | IfxCif_setJpegCodecImageSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier. More...

Detailed Description

Function Documentation

◆ IfxCif_clearJpeInterrupt()

IFX_EXTERN void IfxCif_clearJpeInterrupt ( IfxCif_JpeInterruptSources interruptSource )

Function to clear an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 135 of file IfxCif.c.

◆ IfxCif_getHuffmanAcTableLength()

IFX_EXTERN uint8 IfxCif_getHuffmanAcTableLength ( IfxCif_HuffmanTables table )

Function to query the currently set Huffman Table length for AC values.

Parameters
table Huffman Table for which to query the current length
Returns
Current length of Huffman Table

Definition at line 1033 of file IfxCif.c.

◆ IfxCif_getHuffmanAcTableSelectorState()

IFX_EXTERN IfxCif_State IfxCif_getHuffmanAcTableSelectorState | ( | IfxCif_HuffmanTables | table,
 |  | IfxCif_HuffmanTableComponents | component
 | ) |  |

Function to check if a Huffman Table and a Huffman Table component is enabled for AC values.

Parameters
table | Huffman Table to check
component | Huffman Table component to check
Returns
IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, IfxCif_State_Disabled otherwise

Definition at line 1054 of file IfxCif.c.

◆ IfxCif_getHuffmanDcTableLength()

IFX_EXTERN uint8 IfxCif_getHuffmanDcTableLength ( IfxCif_HuffmanTables table )

Function to query the current Huffman Table length for DC values.

Parameters
table Huffman Table for which to query the current length
Returns
Current length of Huffman Table

Definition at line 1081 of file IfxCif.c.

◆ IfxCif_getHuffmanDcTableSelectorState()

IFX_EXTERN IfxCif_State IfxCif_getHuffmanDcTableSelectorState | ( | IfxCif_HuffmanTables | table,
 |  | IfxCif_HuffmanTableComponents | component
 | ) |  |

Function to check if a Huffman Table and a Huffman Table component is enabled for DC values.

Parameters
table | Huffman Table to check
component | Huffman Table component to check
Returns
IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, IfxCif_State_Disabled otherwise

Definition at line 1102 of file IfxCif.c.

◆ IfxCif_getJpeDebugSignalState()

IFX_EXTERN IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState ( IfxCif_JpeDebugSignalSources source )

Function to query the state of one JPE debug signal source.

Parameters
source Signal source for which to query the debug signal state
Returns
IfxCif_JpeDebugSignalState_Inactive if the debug signal is currently inactive, IfxCif_JpeDebugSignalState_Active if the debug signal is currently active

Definition at line 1531 of file IfxCif.c.

◆ IfxCif_getJpegCodecImageSize()

IFX_EXTERN uint16 IfxCif_getJpegCodecImageSize ( IfxCif_ImageTiers tier )

Function to query the currently set JPEG codec image size of one tier.

Parameters
tier Tier for which to query the JPEG codec image size
Returns
Currently set image size for R2B and SGEN blocks

Definition at line 1647 of file IfxCif.c.

◆ IfxCif_getJpegJfifStreamEncoderContinuousMode()

IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode ( void )

Function to query the current encoder continuous mode.

Returns
Current encoder continuous mode (one member of IfxCif_JpegJfifStreamEncoderContinuousMode)

Definition at line 2597 of file IfxCif.h.

◆ IfxCif_getJpegPictureEncodingFormat()

IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat ( void )

Function to query the current picture encoding format.

Returns
Current picture encoding format

Definition at line 2603 of file IfxCif.h.

◆ IfxCif_getJpeHeaderGenerationMode()

IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode ( void )

Function to query the current header generation debug control mode.

Returns
Currently set header generation debug control mode (one member of IfxCif_JpeHeaderGenerationMode)

Definition at line 2561 of file IfxCif.h.

◆ IfxCif_getJpeHeaderMode()

IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode ( void )

Function to query the currently set JPE header mode.

Returns
Currently set JPE header mode (one member of IfxCif_JpeHeaderMode)

Definition at line 2567 of file IfxCif.h.

◆ IfxCif_getJpeInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getJpeInterruptEnableState ( IfxCif_JpeInterruptSources interruptSource )

Function to query the enabled state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 1564 of file IfxCif.c.

◆ IfxCif_getJpeMode()

IFX_INLINE IfxCif_State IfxCif_getJpeMode ( void )

Function to query the JPE encode mode.

Returns
Always 1, because this is the encoder only edition

Definition at line 2573 of file IfxCif.h.

◆ IfxCif_getJpeQTableSelector()

IFX_EXTERN IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector ( IfxCif_JpeQTableSelectorComponents component )

Function to query the currently selected Q-Table for one component.

Parameters
component Component for which to query the currently selected Q-Table
Returns
Currently selected Q-Table

Definition at line 1601 of file IfxCif.c.

◆ IfxCif_getJpeRestartInterval()

IFX_INLINE uint16 IfxCif_getJpeRestartInterval ( void )

Function to query the current restart interval.

Returns
Current restart interval

Definition at line 2579 of file IfxCif.h.

◆ IfxCif_getJpeScalingEnableState()

IFX_EXTERN IfxCif_State IfxCif_getJpeScalingEnableState ( IfxCif_JpeScalingValueSources source )

Function to query the current enabled state of the scaling of an input value source.

Parameters
source Input value source for which to query the enabled state
Returns
IfxCif_State_Enabled if scaling is enabled, IfxCif_State_Disabled if scaling is disabled

Definition at line 1626 of file IfxCif.c.

◆ IfxCif_getJpeState()

IFX_INLINE IfxCif_JpeState IfxCif_getJpeState ( void )

Function to get the current JPEG codec state.

Returns
IfxCif_JpeState_Busy if the JPEG codec is currently processing, IfxCif_JpeState_Free if the JPEG codec is currently free

Definition at line 2585 of file IfxCif.h.

◆ IfxCif_getJpeTableId()

IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId ( void )

Function to query the current JPE Table ID.

Returns
Current JPE Table ID

Definition at line 2591 of file IfxCif.h.

◆ IfxCif_getMaskedJpeInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState ( IfxCif_JpeInterruptSources interruptSource )

Function to query the masked state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1864 of file IfxCif.c.

◆ IfxCif_getRawJpeInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState ( IfxCif_JpeInterruptSources interruptSource )

Function to query the raw state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2359 of file IfxCif.c.

◆ IfxCif_initJpegEncoder()

IFX_INLINE void IfxCif_initJpegEncoder ( void )

Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder.

Returns
None

Definition at line 2714 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_jpeGenerateHeader()

IFX_INLINE void IfxCif_jpeGenerateHeader ( void )

Function to start to generate JPEG stream header. Auto reset after one clock cycle.

Returns
None

Definition at line 2720 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_programJpeTable()

IFX_EXTERN void IfxCif_programJpeTable | ( | IfxCif_JpeTableId | tableId,
 |  | const uint8 * | tableEntry,
 |  | uint8 | length
 | ) |  |
Returns
None

Definition at line 2614 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setHuffmanAcTableLength()

IFX_EXTERN void IfxCif_setHuffmanAcTableLength | ( | IfxCif_HuffmanTables | table,
 |  | uint8 | length
 | ) |  |

Function to set the Huffman Table length for AC values.

Parameters
table | Huffman Table for which to set the length
length | Length to set
Returns
None

Definition at line 3087 of file IfxCif.c.

Referenced by IfxCif_programJpeTable().

◆ IfxCif_setHuffmanAcTableSelector()

IFX_EXTERN void IfxCif_setHuffmanAcTableSelector | ( | IfxCif_HuffmanTables | table,
 |  | IfxCif_HuffmanTableComponents | component
 | ) |  |

Function to set the Huffman Table selector for AC Values.

Parameters
table | Huffman Table to select
component | Huffman Table component to select
Returns
None

Definition at line 3104 of file IfxCif.c.

◆ IfxCif_setHuffmanDcTableLength()

IFX_EXTERN void IfxCif_setHuffmanDcTableLength | ( | IfxCif_HuffmanTables | table,
 |  | uint8 | length
 | ) |  |

Function to set the Huffman Table length for DC values.

Parameters
table | Huffman Table for which to set the length
length | Length to set
Returns
None

Definition at line 3121 of file IfxCif.c.

Referenced by IfxCif_programJpeTable().

◆ IfxCif_setHuffmanDcTableSelector()

IFX_EXTERN void IfxCif_setHuffmanDcTableSelector | ( | IfxCif_HuffmanTables | table,
 |  | IfxCif_HuffmanTableComponents | component
 | ) |  |

Function to set the Huffman Table selector for DC values.

Parameters
table | Huffman Table to select
component | Huffman Table component to select
Returns
None

Definition at line 3138 of file IfxCif.c.

◆ IfxCif_setJpegCodecImageSize()

IFX_EXTERN void IfxCif_setJpegCodecImageSize | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | size
 | ) |  |

Function to set the JPEG codec image size of one tier.

Parameters
tier | Tier for which to set the JPEG codec image size
size | Image size for R2B and SGEN blocks
Returns
None

Definition at line 3524 of file IfxCif.c.

◆ IfxCif_setJpegCodecImageSizes()

IFX_INLINE void IfxCif_setJpegCodecImageSizes | ( | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the JPEG codec image sizes.

Parameters
hSize | Image horizontal size
vSize | Image vertical size
Returns
None

Definition at line 2926 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpegJfifStreamEncoderContinuousMode()

IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode ( IfxCif_JpegJfifStreamEncoderContinuousMode mode )

Function to set the stream encoder continuous mode.

Parameters
mode Encoder continuous mode to set
Returns
None

Definition at line 2933 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpegPictureEncodingFormat()

IFX_INLINE void IfxCif_setJpegPictureEncodingFormat ( IfxCif_JpegPictureEncodingFormat format )

Function to set the picture encoding format.

Parameters
format Encoding format to set
Returns
None

Definition at line 2939 of file IfxCif.h.

◆ IfxCif_setJpeHeaderGenerationMode()

IFX_INLINE void IfxCif_setJpeHeaderGenerationMode ( IfxCif_JpeHeaderGenerationMode headerGenerationMode )

Function to set the header generation debug control mode.

Parameters
headerGenerationMode Header generation debug control mode to set
Returns
None

Definition at line 2890 of file IfxCif.h.

◆ IfxCif_setJpeHeaderMode()

IFX_INLINE void IfxCif_setJpeHeaderMode ( IfxCif_JpeHeaderMode headerMode )

Function to set the JPE header mode.

Parameters
headerMode Header mode to set
Returns
None

Definition at line 2896 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpeInterruptEnableState()

IFX_EXTERN void IfxCif_setJpeInterruptEnableState | ( | IfxCif_JpeInterruptSources | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
interruptSource | Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3420 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpeInterruptRequestBit()

IFX_EXTERN void IfxCif_setJpeInterruptRequestBit ( IfxCif_JpeInterruptSources interruptSource )

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 3453 of file IfxCif.c.

◆ IfxCif_setJpeQTableSelector()

IFX_EXTERN void IfxCif_setJpeQTableSelector | ( | IfxCif_JpeQTableSelectorComponents | component,
 |  | IfxCif_JpeQTableSelector | selector
 | ) |  |

Function to set the Q-Table selector for one component.

Parameters
component | Component for which to select the Q-Table
selector | Q-Table to select
Returns
None

Definition at line 3486 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifJpegEncoder().

◆ IfxCif_setJpeRestartInterval()

IFX_INLINE void IfxCif_setJpeRestartInterval ( uint16 interval )

Function to set the restart interval.

Parameters
interval Restart interval to set
Returns
None

Definition at line 2902 of file IfxCif.h.

◆ IfxCif_setJpeScalingEnableState()

IFX_EXTERN void IfxCif_setJpeScalingEnableState | ( | IfxCif_JpeScalingValueSources | source,
 |  | IfxCif_State | scalingEnable
 | ) |  |

Function to enable or disable scaling of one input value source.

Parameters
source | Input value source for which to query the enabled state
scalingEnable | IfxCif_State_Enabled to enable scaling, IfxCif_State_Disabled to disable scaling
Returns
None

Definition at line 3507 of file IfxCif.c.

◆ IfxCif_setJpeTableDataLsb()

IFX_INLINE void IfxCif_setJpeTableDataLsb ( uint8 data )

Function to set the JPE Table LSB.

Parameters
data Value to set for the JPE Table LSB
Returns
None

Definition at line 2908 of file IfxCif.h.

◆ IfxCif_setJpeTableDataMsb()

IFX_INLINE void IfxCif_setJpeTableDataMsb ( uint8 data )

Function to set the JPE Table MSB.

Parameters
data Value to set for the JPE Table MSB
Returns
None

Definition at line 2914 of file IfxCif.h.

◆ IfxCif_setJpeTableId()

IFX_INLINE void IfxCif_setJpeTableId ( IfxCif_JpeTableId tableId )

Function to set the JPE Table ID.

Parameters
tableId tableId Table ID to set
Returns
None

Definition at line 2920 of file IfxCif.h.

◆ IfxCif_startJpegJfifStreamEncoder()

IFX_INLINE void IfxCif_startJpegJfifStreamEncoder ( void )

Function to start JFIF stream encoding. Auto reset after one clock cycle.

Returns
None

Definition at line 3014 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifJpegEncoder().


iLLD_TC26B: JPEG Encoder Enumerations

Enumerations
JPEG Encoder Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for JPEG Encoder Enumerations:

Enumerations

enum IfxCif_HuffmanTableComponents {
IfxCif_HuffmanTableComponents_Component0 = 0,
IfxCif_HuffmanTableComponents_Component1 = 1,
IfxCif_HuffmanTableComponents_Component2 = 2
}
Enumerator for the Huffman Table components. More...
enum IfxCif_HuffmanTables {
IfxCif_HuffmanTables_Table0 = 0,
IfxCif_HuffmanTables_Table1 = 1
}
Enumerator for the Huffman Tables. More...
enum IfxCif_JpeDebugSignalSources {
IfxCif_JpeDebugSignalSources_BadTableAccess = 0,
IfxCif_JpeDebugSignalSources_VlcTableBusy = 1,
IfxCif_JpeDebugSignalSources_R2BMemoryFull = 2,
IfxCif_JpeDebugSignalSources_VlcEncodeBusy = 3,
IfxCif_JpeDebugSignalSources_QiqTableAccess = 4
}
Enumerator for the debug signal sources. More...
enum IfxCif_JpeDebugSignalState {
IfxCif_JpeDebugSignalState_Inactive = 0,
IfxCif_JpeDebugSignalState_Active = 1
}
Enumerator for the debug signal state. More...
enum IfxCif_JpeHeaderGenerationMode {
IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage = 0,
IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes = 1
}
Enumerator for the header generation debug control. More...
enum IfxCif_JpeHeaderMode {
IfxCif_JpeHeaderMode_NoAppnHeader = 0,
IfxCif_JpeHeaderMode_JfifHeader = 2
}
Enumerator for the JPE header mode. More...
enum IfxCif_JpeInterruptSources {
IfxCif_JpeInterruptSources_VlcTableError = 0,
IfxCif_JpeInterruptSources_R2BImageSizeError = 1,
IfxCif_JpeInterruptSources_DcTableError = 2,
IfxCif_JpeInterruptSources_VlcSymbolError = 3,
IfxCif_JpeInterruptSources_HeaderGenerationComplete = 4,
IfxCif_JpeInterruptSources_EncodingComplete = 5
}
Enumerator for interrupt sources of the JPEG encoder module. More...
enum IfxCif_JpeQTableSelector {
IfxCif_JpeQTableSelector_Table0 = 0,
IfxCif_JpeQTableSelector_Table1 = 1,
IfxCif_JpeQTableSelector_Table2 = 2,
IfxCif_JpeQTableSelector_Table3 = 3
}
Enumerator for the Q-Table selector. More...
enum IfxCif_JpeQTableSelectorComponents {
IfxCif_JpeQTableSelectorComponents_Y = 0,
IfxCif_JpeQTableSelectorComponents_U = 1,
IfxCif_JpeQTableSelectorComponents_V = 2
}
Enumerator for the components to select Q-Tables. More...
enum IfxCif_JpeScalingValueSources {
IfxCif_JpeScalingValueSources_Y = 0,
IfxCif_JpeScalingValueSources_CbCr = 1
}
Enumerator for the input scaling values of the JPEG encoder. More...
enum IfxCif_JpeState {
IfxCif_JpeState_Free = 0,
IfxCif_JpeState_Busy = 1
}
Enumerator for the codec state. More...
enum IfxCif_JpeTableId {
IfxCif_JpeTableId_QTable0 = 0,
IfxCif_JpeTableId_QTable1 = 1,
IfxCif_JpeTableId_QTable2 = 2,
IfxCif_JpeTableId_QTable3 = 3,
IfxCif_JpeTableId_VlcDcTable0 = 4,
IfxCif_JpeTableId_VlcAcTable0 = 5,
IfxCif_JpeTableId_VlcDcTable1 = 6,
IfxCif_JpeTableId_VlcAcTable1 = 7
}
Enumerator for the JPE Tables. More...
enum IfxCif_JpegJfifStreamEncoderContinuousMode {
IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd = 0,
IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically = 1,
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically = 3
}
Enumerator for the JFIF stream encoder continuous mode. More...
enum IfxCif_JpegPictureEncodingFormat {
IfxCif_JpegPictureEncodingFormat_422 = 0,
IfxCif_JpegPictureEncodingFormat_400 = 1
}
Enumerator for the picture encoding format. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_HuffmanTableComponents

enum IfxCif_HuffmanTableComponents

Enumerator for the Huffman Table components.

Enumerator
IfxCif_HuffmanTableComponents_Component0 | Component 0.
IfxCif_HuffmanTableComponents_Component1 | Component 1.
IfxCif_HuffmanTableComponents_Component2 | Component 2.

Definition at line 380 of file IfxCif.h.

◆ IfxCif_HuffmanTables

enum IfxCif_HuffmanTables

Enumerator for the Huffman Tables.

Enumerator
IfxCif_HuffmanTables_Table0 | Huffman Table 0.
IfxCif_HuffmanTables_Table1 | Huffman Table 1.

Definition at line 389 of file IfxCif.h.

◆ IfxCif_JpeDebugSignalSources

enum IfxCif_JpeDebugSignalSources

Enumerator for the debug signal sources.

Enumerator
IfxCif_JpeDebugSignalSources_BadTableAccess | Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed, when the JPEG_ENCODER is busy)
IfxCif_JpeDebugSignalSources_VlcTableBusy | Debug VLC Table Busy (vlc access to hufftables)
IfxCif_JpeDebugSignalSources_R2BMemoryFull | R2B Memory Full (line memory status of r2b)
IfxCif_JpeDebugSignalSources_VlcEncodeBusy | VLC Encode Busy (vlc encode processing active)
IfxCif_JpeDebugSignalSources_QiqTableAccess | QiqTableAccess.

Definition at line 397 of file IfxCif.h.

◆ IfxCif_JpeDebugSignalState

enum IfxCif_JpeDebugSignalState

Enumerator for the debug signal state.

Enumerator
IfxCif_JpeDebugSignalState_Inactive | Debug signal is inactive.
IfxCif_JpeDebugSignalState_Active | Debug signal is active.

Definition at line 408 of file IfxCif.h.

◆ IfxCif_JpegJfifStreamEncoderContinuousMode

enum IfxCif_JpegJfifStreamEncoderContinuousMode

Enumerator for the JFIF stream encoder continuous mode.

Enumerator
IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd | encoder stops at frame end
IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically | encoder starts automatically to encode the next frame
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically | encoder first generates next header and then encodes automatically the next frame

Definition at line 493 of file IfxCif.h.

◆ IfxCif_JpegPictureEncodingFormat

enum IfxCif_JpegPictureEncodingFormat

Enumerator for the picture encoding format.

Enumerator
IfxCif_JpegPictureEncodingFormat_422 | 4:2:2 format
IfxCif_JpegPictureEncodingFormat_400 | 4:0:0 format

Definition at line 502 of file IfxCif.h.

◆ IfxCif_JpeHeaderGenerationMode

enum IfxCif_JpeHeaderGenerationMode

Enumerator for the header generation debug control.

Enumerator
IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage | wait for encoded image data to fill output buffer
IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes | immediately transmit last header bytes

Definition at line 416 of file IfxCif.h.

◆ IfxCif_JpeHeaderMode

enum IfxCif_JpeHeaderMode

Enumerator for the JPE header mode.

Enumerator
IfxCif_JpeHeaderMode_NoAppnHeader | no APPn header
IfxCif_JpeHeaderMode_JfifHeader | JFIF header.

Definition at line 424 of file IfxCif.h.

◆ IfxCif_JpeInterruptSources

enum IfxCif_JpeInterruptSources

Enumerator for interrupt sources of the JPEG encoder module.

Enumerator
IfxCif_JpeInterruptSources_VlcTableError | VLC table error.
IfxCif_JpeInterruptSources_R2BImageSizeError | R2B image size error.
IfxCif_JpeInterruptSources_DcTableError | DC Table error.
IfxCif_JpeInterruptSources_VlcSymbolError | VLC symbol error.
IfxCif_JpeInterruptSources_HeaderGenerationComplete | Header generation complete.
IfxCif_JpeInterruptSources_EncodingComplete | Encoding complete.

Definition at line 432 of file IfxCif.h.

◆ IfxCif_JpeQTableSelector

enum IfxCif_JpeQTableSelector

Enumerator for the Q-Table selector.

Enumerator
IfxCif_JpeQTableSelector_Table0 | Q-Table 0.
IfxCif_JpeQTableSelector_Table1 | Q-Table 1.
IfxCif_JpeQTableSelector_Table2 | Q-Table 2.
IfxCif_JpeQTableSelector_Table3 | Q-Table 3.

Definition at line 444 of file IfxCif.h.

◆ IfxCif_JpeQTableSelectorComponents

enum IfxCif_JpeQTableSelectorComponents

Enumerator for the components to select Q-Tables.

Enumerator
IfxCif_JpeQTableSelectorComponents_Y | Y-component.
IfxCif_JpeQTableSelectorComponents_U | U-component.
IfxCif_JpeQTableSelectorComponents_V | V-component.

Definition at line 454 of file IfxCif.h.

◆ IfxCif_JpeScalingValueSources

enum IfxCif_JpeScalingValueSources

Enumerator for the input scaling values of the JPEG encoder.

Enumerator
IfxCif_JpeScalingValueSources_Y | scaling Y input from [16..235] to [0..255]
IfxCif_JpeScalingValueSources_CbCr | scaling Cb/Cr input from [16..240] to [0..255]

Definition at line 463 of file IfxCif.h.

◆ IfxCif_JpeState

enum IfxCif_JpeState

Enumerator for the codec state.

Enumerator
IfxCif_JpeState_Free | Codec is free (not busy)
IfxCif_JpeState_Busy | JPEG codec in process.

Definition at line 471 of file IfxCif.h.

◆ IfxCif_JpeTableId

enum IfxCif_JpeTableId

Enumerator for the JPE Tables.

Enumerator
IfxCif_JpeTableId_QTable0 | Q-Table 0.
IfxCif_JpeTableId_QTable1 | Q-Table 1.
IfxCif_JpeTableId_QTable2 | Q-Table 2.
IfxCif_JpeTableId_QTable3 | Q-Table 3.
IfxCif_JpeTableId_VlcDcTable0 | VLC DC Table 0.
IfxCif_JpeTableId_VlcAcTable0 | VLC AC Table 0.
IfxCif_JpeTableId_VlcDcTable1 | VLC DC Table 1.
IfxCif_JpeTableId_VlcAcTable1 | VLC AC Table 1.

Definition at line 479 of file IfxCif.h.


iLLD_TC26B: Security Watchdog Functions

Functions
Security Watchdog Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Security Watchdog Functions:

Functions

IFX_INLINE uint16 | IfxCif_getSecurityWatchdogCounterPredivider (void)
Function to query the currently set watchdog predivider. More...
IFX_INLINE IfxCif_State | IfxCif_getSecurityWatchdogEnableState (void)
Function to query the enabled state of the watchdog unit. More...
IFX_INLINE void | IfxCif_setSecurityWatchdogCounterPredivider (uint16 predivider)
Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle) More...
IFX_INLINE void | IfxCif_setSecurityWatchdogEnableState (IfxCif_State enableState)
Function to enable or disable the watchdog unit. More...
IFX_EXTERN void | IfxCif_clearSecurityWatchdogInterrupt (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt. More...
IFX_EXTERN IfxCif_State | IfxCif_getSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier. More...
IFX_EXTERN void | IfxCif_resetSecurityWatchdogCounter (IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter. More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogInterruptRequestBit (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout. More...

Detailed Description

Function Documentation

◆ IfxCif_clearSecurityWatchdogInterrupt()

IFX_EXTERN void IfxCif_clearSecurityWatchdogInterrupt ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to clear an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 250 of file IfxCif.c.

◆ IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to get the masked state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1942 of file IfxCif.c.

◆ IfxCif_getRawSecurityWatchdogInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to get the raw state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2437 of file IfxCif.c.

◆ IfxCif_getSecurityWatchdogCounterPredivider()

IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider ( void )

Function to query the currently set watchdog predivider.

Returns
Currently set predivider

Definition at line 2696 of file IfxCif.h.

◆ IfxCif_getSecurityWatchdogEnableState()

IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState ( void )

Function to query the enabled state of the watchdog unit.

Returns
IfxCif_State_Enabled if the watchdog unit is enabled, IfxCif_State_Disabled if the watchdog unit is disabled

Definition at line 2702 of file IfxCif.h.

◆ IfxCif_getSecurityWatchdogInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to query the enabled state of an interrupt.

Parameters
interruptSource Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 2466 of file IfxCif.c.

◆ IfxCif_getSecurityWatchdogTimeout()

IFX_EXTERN uint16 IfxCif_getSecurityWatchdogTimeout | ( | IfxCif_ImageTiers | tier,
 |  | IfxCif_SecurityWatchdogTimeoutCounters | timeoutCounter
 | ) |  |

Function to query the current value of a timeout counter of one tier.

Parameters
tier | Tier for which to query the timeout counter
timeoutCounter | Timeout counter to query
Returns
Current timeout

Definition at line 2495 of file IfxCif.c.

◆ IfxCif_resetSecurityWatchdogCounter()

IFX_EXTERN void IfxCif_resetSecurityWatchdogCounter ( IfxCif_SecurityWatchdogCounters counter )

Function to reset one watchdog counter.

Parameters
counter Counter to reset
Returns
None

Definition at line 2681 of file IfxCif.c.

◆ IfxCif_setSecurityWatchdogCounterPredivider()

IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider ( uint16 predivider )

Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle)

Parameters
predivider Predivider to set
Returns
None

Definition at line 2996 of file IfxCif.h.

◆ IfxCif_setSecurityWatchdogEnableState()

IFX_INLINE void IfxCif_setSecurityWatchdogEnableState ( IfxCif_State enableState )

Function to enable or disable the watchdog unit.

Parameters
enableState IfxCif_State_Enabled to enable the watchdog unit, IfxCif_State_Disabled to disable the watchdog unit
Returns
None

Definition at line 3002 of file IfxCif.h.

◆ IfxCif_setSecurityWatchdogInterruptEnableState()

IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptEnableState | ( | IfxCif_SecurityWatchdogInterruptSources | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
interruptSource | Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3813 of file IfxCif.c.

◆ IfxCif_setSecurityWatchdogInterruptRequestBit()

IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptRequestBit ( IfxCif_SecurityWatchdogInterruptSources interruptSource )

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
interruptSource Source of the interrupt
Returns
None

Definition at line 3838 of file IfxCif.c.

◆ IfxCif_setSecurityWatchdogTimeout()

IFX_EXTERN void IfxCif_setSecurityWatchdogTimeout | ( | IfxCif_ImageTiers | tier,
 |  | IfxCif_SecurityWatchdogTimeoutCounters | timeoutCounter,
 |  | uint16 | timeout
 | ) |  |

Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout.

Parameters
tier | Tier for which to set the timeout
timeoutCounter | Timeout counter for which to set the timeout
timeout | Timeout to set
Returns
None

Definition at line 3863 of file IfxCif.c.


iLLD_TC26B: Security Watchdog Enumerations

Enumerations
Security Watchdog Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Security Watchdog Enumerations:

Enumerations

enum IfxCif_SecurityWatchdogCounters {
IfxCif_SecurityWatchdogCounters_Predivider = 0,
IfxCif_SecurityWatchdogCounters_Vertical = 1,
IfxCif_SecurityWatchdogCounters_Horizontal = 2
}
Enumerator for watchdog counters. More...
enum IfxCif_SecurityWatchdogInterruptSources {
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout = 0,
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout = 1,
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout = 2,
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout = 3
}
Enumerator for interrupt sources of the security watchdog submodule. More...
enum IfxCif_SecurityWatchdogTimeoutCounters {
IfxCif_SecurityWatchdogTimeoutCounters_EndStart = 0,
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd = 1
}
Enumerator for watchdog timeout counters. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_SecurityWatchdogCounters

enum IfxCif_SecurityWatchdogCounters

Enumerator for watchdog counters.

Enumerator
IfxCif_SecurityWatchdogCounters_Predivider | Predivider counter.
IfxCif_SecurityWatchdogCounters_Vertical | Vertical counter.
IfxCif_SecurityWatchdogCounters_Horizontal | Horizontal counter.

Definition at line 514 of file IfxCif.h.

◆ IfxCif_SecurityWatchdogInterruptSources

enum IfxCif_SecurityWatchdogInterruptSources

Enumerator for interrupt sources of the security watchdog submodule.

Enumerator
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout | Vertical End Start Interrupt.
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout | Vertical Start End Interrupt.
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout | Horizontal End Start Interrupt.
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout | Horizontal Start End Interrupt.

Definition at line 523 of file IfxCif.h.

◆ IfxCif_SecurityWatchdogTimeoutCounters

enum IfxCif_SecurityWatchdogTimeoutCounters

Enumerator for watchdog timeout counters.

Enumerator
IfxCif_SecurityWatchdogTimeoutCounters_EndStart | Timeout counter for End Start phase.
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd | Timeout counter for Start End phase.

Definition at line 533 of file IfxCif.h.


iLLD_TC26B: ISP Image Stabilization Functions

Functions
ISP Image Stabilization Functions
iLLD » CIF » Standard Driver
Collaboration diagram for ISP Image Stabilization Functions:

Functions

IFX_INLINE IfxCif_State | IfxCif_getIspisEnableState (void)
Function to query the enabled state of image stabilization. More...
IFX_INLINE uint8 | IfxCif_getIspisRecenterValue (void)
Function to query the current image stabilization recenter value. More...
IFX_INLINE void | IfxCif_setIspisEnableState (IfxCif_State enableState)
Function to enable or disable image stabilization. More...
IFX_INLINE void | IfxCif_setIspisOutputWindowOffsets (IfxCif_ImageTiers hOffset, uint16 vOffset)
Function to set the image stabilization offsets of the output window. More...
IFX_INLINE void | IfxCif_setIspisPictureSizes (uint16 hSize, uint16 vSize)
Function to set the picture size. More...
IFX_INLINE void | IfxCif_setIspisRecenterValue (uint8 value)
Function to set the image stabilization recenter value. More...
IFX_EXTERN uint16 | IfxCif_getIspisCameraDisplacement (IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisCurrentPictureOffset (IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisCurrentPictureSize (IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisMaximumDisplacement (IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisOffsetOutputWindow (IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisPictureSize (IfxCif_ImageTiers tier)
Function to query the current picture size for one tier. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspisRecenterEnableState (void)
Function to query the enabled state of image stabilization recenter feature. More...
IFX_EXTERN void | IfxCif_setIspisCameraDisplacement (uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier. More...
IFX_EXTERN void | IfxCif_setIspisMaximumDisplacement (IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier. More...
IFX_EXTERN void | IfxCif_setIspisOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier. More...
IFX_EXTERN void | IfxCif_setIspisPictureSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier. More...

Detailed Description

Function Documentation

◆ IfxCif_getIspisCameraDisplacement()

IFX_EXTERN uint16 IfxCif_getIspisCameraDisplacement ( IfxCif_ImageTiers tier )

Function to query the current camera displacement for one tier.

Parameters
tier Tier for which to query the camera displacement
Returns
Current camera displacement

Definition at line 1392 of file IfxCif.c.

◆ IfxCif_getIspisCurrentPictureOffset()

IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureOffset ( IfxCif_ImageTiers tier )

Function to query the offset of the current picture for one tier.

Parameters
tier Tier for which to query the offset
Returns
Offset of the current picture

Definition at line 1413 of file IfxCif.c.

◆ IfxCif_getIspisCurrentPictureSize()

IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureSize ( IfxCif_ImageTiers tier )

Function to query the picture size of the current picture for one tier.

Parameters
tier Tier for which to query the picture size
Returns
Picture size of the current picture

Definition at line 1434 of file IfxCif.c.

◆ IfxCif_getIspisEnableState()

IFX_INLINE IfxCif_State IfxCif_getIspisEnableState ( void )

Function to query the enabled state of image stabilization.

Returns
IfxCif_State_Enabled if image stabilization is enabled, IfxCif_State_Disabled if image stabilization is disabled

Definition at line 2549 of file IfxCif.h.

◆ IfxCif_getIspisMaximumDisplacement()

IFX_EXTERN uint16 IfxCif_getIspisMaximumDisplacement ( IfxCif_ImageTiers tier )

Function to query the current maximum displacement for one tier.

Parameters
tier Tier for which to query the maximum displacement
Returns
Current maximum displacement

Definition at line 1455 of file IfxCif.c.

◆ IfxCif_getIspisOffsetOutputWindow()

IFX_EXTERN uint16 IfxCif_getIspisOffsetOutputWindow ( IfxCif_ImageTiers tier )

Function to query the current image stabilization offset of the output window of one tier.

Parameters
tier Tier for which to query the offset
Returns
Current offset

Definition at line 1476 of file IfxCif.c.

◆ IfxCif_getIspisPictureSize()

IFX_EXTERN uint16 IfxCif_getIspisPictureSize ( IfxCif_ImageTiers tier )

Function to query the current picture size for one tier.

Parameters
tier Tier for which to query the picture size
Returns
Current picture size

Definition at line 1497 of file IfxCif.c.

◆ IfxCif_getIspisRecenterEnableState()

IFX_EXTERN IfxCif_State IfxCif_getIspisRecenterEnableState ( void )

Function to query the enabled state of image stabilization recenter feature.

Returns
IfxCif_State_Enabled if the image stabilization recenter feature is enabled, IfxCif_State_Disabled if the image stabilization recenter feature is disabled

Definition at line 1518 of file IfxCif.c.

◆ IfxCif_getIspisRecenterValue()

IFX_INLINE uint8 IfxCif_getIspisRecenterValue ( void )

Function to query the current image stabilization recenter value.

Returns
Current image stabilization recenter value

Definition at line 2555 of file IfxCif.h.

◆ IfxCif_setIspisCameraDisplacement()

IFX_EXTERN void IfxCif_setIspisCameraDisplacement | ( | uint16 | tier,
 |  | uint16 | displacement
 | ) |  |

Function to set the camera displacement for one tier.

Parameters
tier | Tier for which to set the camera displacement
displacement | Camera displacement to set
Returns
None

Definition at line 3352 of file IfxCif.c.

◆ IfxCif_setIspisEnableState()

IFX_INLINE void IfxCif_setIspisEnableState ( IfxCif_State enableState )

Function to enable or disable image stabilization.

Parameters
enableState IfxCif_State_Enabled to enable image stabilization, IfxCif_State_Disabled to disable image stabilization
Returns
None

Definition at line 2864 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspisMaximumDisplacement()

IFX_EXTERN void IfxCif_setIspisMaximumDisplacement | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | displacement
 | ) |  |

Function to set the maximum displacement for one tier.

Parameters
tier | Tier for which to set the maximum displacement
displacement | Displacement to set
Returns
None

Definition at line 3369 of file IfxCif.c.

◆ IfxCif_setIspisOutputWindowOffset()

IFX_EXTERN void IfxCif_setIspisOutputWindowOffset | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | offset
 | ) |  |

Function to set the image stabilization offset of the output window of one tier.

Parameters
tier | Tier for which to set the offset
offset | Offset to set
Returns
None

Definition at line 3386 of file IfxCif.c.

◆ IfxCif_setIspisOutputWindowOffsets()

IFX_INLINE void IfxCif_setIspisOutputWindowOffsets | ( | IfxCif_ImageTiers | hOffset,
 |  | uint16 | vOffset
 | ) |  |

Function to set the image stabilization offsets of the output window.

Parameters
hOffset | Horizontal Offset
vOffset | Vertical Offset
Returns
None

Definition at line 2870 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspisPictureSize()

IFX_EXTERN void IfxCif_setIspisPictureSize | ( | IfxCif_ImageTiers | tier,
 |  | uint16 | size
 | ) |  |

Function to set the picture size for one tier.

Parameters
tier | Tier for which to set the picture size
size | Size to set
Returns
None

Definition at line 3403 of file IfxCif.c.

◆ IfxCif_setIspisPictureSizes()

IFX_INLINE void IfxCif_setIspisPictureSizes | ( | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the picture size.

Parameters
hSize | Horizontal Picture Size
vSize | Vertical Picture Size
Returns
None

Definition at line 2877 of file IfxCif.h.

Referenced by IfxCif_Cam_initCifIspUnit().

◆ IfxCif_setIspisRecenterValue()

IFX_INLINE void IfxCif_setIspisRecenterValue ( uint8 value )

Function to set the image stabilization recenter value.

Parameters
value Recenter value to set (0 to disabled recenter value, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2 power(recenter))
Returns
None

Definition at line 2884 of file IfxCif.h.


iLLD_TC26B: ISP Image Stabilization Enumerations

ISP Image Stabilization Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for ISP Image Stabilization Enumerations:


iLLD_TC26B: Extra Path Functions

Functions
Extra Path Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Extra Path Functions:

Functions

IFX_EXTERN void | IfxCif_clearEpError (IfxCif_EpErrorClearSources source)
Function to clear one extra path error. More...
IFX_EXTERN void | IfxCif_clearEpInterrupt (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN void | IfxCif_epForceConfigurationUpdate (IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path. More...
IFX_EXTERN void | IfxCif_epSkipPicture (IfxCif_ExtraPath z)
Function to skip one picture of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpBaseAddress (IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpBaseInitAddress (IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCurrentPictureOffset (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCurrentPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpCroppingEnableState (IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpCroppingRecenterState (IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getEpErrorState (IfxCif_EpErrorSources source)
Function to query the state of an extra path error source. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitSize (IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitialFillLevelInterruptOffset (IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitialOffsetCounter (IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpInputEnableState (IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint32 | IfxCif_getEpInterruptOffset (IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpOffsetCounter (IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpOffsetCounterStart (IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpOutputEnableState (IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path. More...
IFX_EXTERN uint8 | IfxCif_getEpRecenterValue (IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpSize (IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path. More...
IFX_EXTERN IfxCif_EpWriteFormat | IfxCif_getEpWriteFormat (IfxCif_ExtraPath z)
Function to query the write format of one extra path. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setEpBaseInitAddress (IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingEnableState (IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingOffsetsOutputWindow (IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingPictureSizes (IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path. More...
IFX_EXTERN void | IfxCif_setEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitSize (IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitialFillLevelInterruptOffset (uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitialOffsetCounter (IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setEpInterruptRequestBit (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setEpOffsetCounterStart (uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path. More...
IFX_EXTERN void | IfxCif_setEpRecenterValue (IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter)) More...
IFX_EXTERN void | IfxCif_setEpWriteFormat (IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path. More...

Detailed Description

Function Documentation

◆ IfxCif_clearEpError()

IFX_EXTERN void IfxCif_clearEpError ( IfxCif_EpErrorClearSources source )

Function to clear one extra path error.

Parameters
source Extra path error to clear
Returns
None

Definition at line 35 of file IfxCif.c.

◆ IfxCif_clearEpInterrupt()

IFX_EXTERN void IfxCif_clearEpInterrupt | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to clear an interrupt.

Parameters
z | Extra path for which to clear the interrupt
interruptSource | Source of the interrupt
Returns
None

Definition at line 64 of file IfxCif.c.

◆ IfxCif_epForceConfigurationUpdate()

IFX_EXTERN void IfxCif_epForceConfigurationUpdate ( IfxCif_ExtraPath z )

Function to trigger an immediate configuration update for one extra path.

Parameters
z Function to trigger an immediate configuration update for one extra path
Returns
None

Definition at line 300 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_epSkipPicture()

IFX_EXTERN void IfxCif_epSkipPicture ( IfxCif_ExtraPath z )

Function to skip one picture of one extra path.

Parameters
z Extra path for which to skip one picture
Returns
None

Definition at line 316 of file IfxCif.c.

◆ IfxCif_getEpBaseAddress()

IFX_EXTERN uint32 IfxCif_getEpBaseAddress ( IfxCif_ExtraPath z )

Function to query the current base address of the ring buffer of one extra path.

Parameters
z Extra path for which to query the current base address of the ring buffer
Returns
Current base address of the ring buffer

Definition at line 477 of file IfxCif.c.

◆ IfxCif_getEpBaseInitAddress()

IFX_EXTERN uint32 IfxCif_getEpBaseInitAddress ( IfxCif_ExtraPath z )

Function to query the initial base address of the ring buffer of one extra path.

Parameters
z Extra path for which to query the initial base address
Returns
Initial base address of the ring buffer of the extra path

Definition at line 496 of file IfxCif.c.

◆ IfxCif_getEpCroppingCameraDisplacement()

IFX_EXTERN uint16 IfxCif_getEpCroppingCameraDisplacement | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the image cropping camera displacement of one tier of one extra path.

Parameters
z | Extra path for which to query the image cropping camera displacement
tier | Tier for which to query the image cropping camera displacement
Returns
Current image cropping camera displacement

Definition at line 515 of file IfxCif.c.

◆ IfxCif_getEpCroppingCurrentPictureOffset()

IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureOffset | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the current image cropping picture offset of one tier of one extra path.

Parameters
z | Extra path for which to query the current image cropping picture offset
tier | Tier for which to query the current image cropping picture offset
Returns
Current image cropping picture offset

Definition at line 543 of file IfxCif.c.

◆ IfxCif_getEpCroppingCurrentPictureSize()

IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureSize | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the current image cropping picture size of one tier of one extra path.

Parameters
z | Extra path for which to query the current image cropping picture size
tier | Tier for which to query the current image cropping picture size
Returns
Current image cropping picture size

Definition at line 571 of file IfxCif.c.

◆ IfxCif_getEpCroppingEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpCroppingEnableState ( IfxCif_ExtraPath z )

Function to query the image cropping enabled state of one extra path.

Parameters
z Extra path for which to query the image cropping enabled state
Returns
IfxCif_State_Enabled if image cropping is enabled, IfxCif_State_Disabled otherwise

Definition at line 599 of file IfxCif.c.

◆ IfxCif_getEpCroppingMaximumDisplacement()

IFX_EXTERN uint16 IfxCif_getEpCroppingMaximumDisplacement | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the maximum displacement of one tier of one extra path.

Parameters
z | Extra path for which to query the maximum displacement
tier | Tier for which to query the maximum displacement
Returns
Current maximum displacement

Definition at line 616 of file IfxCif.c.

◆ IfxCif_getEpCroppingOffsetOutputWindow()

IFX_EXTERN uint16 IfxCif_getEpCroppingOffsetOutputWindow | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the image cropping offset of the output window of one tier of one extra path.

Parameters
z | Extra path for which to query the image cropping offset of the output window
tier | Tier for which to query the image cropping offset of the output window
Returns
Current image cropping offset of the output window

Definition at line 644 of file IfxCif.c.

◆ IfxCif_getEpCroppingPictureSize()

IFX_EXTERN uint16 IfxCif_getEpCroppingPictureSize | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier
 | ) |  |

Function to query the image cropping picture size of one tier of one extra path.

Parameters
z | Extra path for which to query the image cropping picture size
tier | Tier for which to query the image cropping picture size of one tier of one extra path

Definition at line 672 of file IfxCif.c.

◆ IfxCif_getEpCroppingRecenterState()

IFX_EXTERN IfxCif_State IfxCif_getEpCroppingRecenterState ( IfxCif_ExtraPath z )

Function to query the enabled state of the recenter feature of one extra path.

Parameters
z Extra path for which to query the enabled state of the recenter feature
Returns
IfxCif_State_Enabled if the recenter feature is enabled, IfxCif_State_Disabled otherwise

Definition at line 700 of file IfxCif.c.

◆ IfxCif_getEpErrorState()

IFX_EXTERN IfxCif_ErrorState IfxCif_getEpErrorState ( IfxCif_EpErrorSources source )

Function to query the state of an extra path error source.

Parameters
source Error source for which to query the state
Returns
IfxCif_ErrorState_NoError if the error did not occur, IfxCif_ErrorState_Error if the error occured

Definition at line 720 of file IfxCif.c.

◆ IfxCif_getEpFeatureEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpFeatureEnableState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpFeatures | feature
 | ) |  |

Function to query the enabled state of one feature of one extra path.

Parameters
z | Extra path for which to query the enabled state of the feature
feature | Feature which to query
Returns
IfxCif_State_Enabled if the feature of the extra path is enabled, IfxCif_State_Disabled if the feature of the extra path is disabled

Definition at line 773 of file IfxCif.c.

◆ IfxCif_getEpInitialFillLevelInterruptOffset()

IFX_EXTERN uint32 IfxCif_getEpInitialFillLevelInterruptOffset ( IfxCif_ExtraPath z )

Function to query the initial filling level interrupt offset of one extra path.

Parameters
z Extra path for which to query the initial filling level interrupt offset
Returns
Initial filling level interrupt offset of the extra path

Definition at line 829 of file IfxCif.c.

◆ IfxCif_getEpInitialOffsetCounter()

IFX_EXTERN uint32 IfxCif_getEpInitialOffsetCounter ( IfxCif_ExtraPath z )

Function to query the initial offset counter of one extra path.

Parameters
z Extra path for which to query the initial offset counter
Returns
Initial offset counter of the extra path

Definition at line 848 of file IfxCif.c.

◆ IfxCif_getEpInitSize()

IFX_EXTERN uint32 IfxCif_getEpInitSize ( IfxCif_ExtraPath z )

Function to query the initial size of the ring buffer of one extra path.

Parameters
z Extra path for which to query the initial size
Returns
Initial size of the ring buffer of the extra path

Definition at line 810 of file IfxCif.c.

◆ IfxCif_getEpInputEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpInputEnableState ( IfxCif_ExtraPath z )

Function to query the current input enable state of one extra path.

Parameters
z Extra path for which to query the current input enable state
Returns
IfxCif_State_Enabled if the extra path is used in module MI_IN, IfxCif_State_Disabled if the extra path is not used in module MI_IN

Definition at line 867 of file IfxCif.c.

◆ IfxCif_getEpInterruptEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpInterruptEnableState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to query the enabled state of an interrupt.

Parameters
z | Extra path for which to query the enabled state of the interrupt
interruptSource | Source of the interrupt
Returns
IfxCif_State_Enabled if the interrupt is enabled, IfxCif_State_Disabled if the interrupt is disabled

Definition at line 884 of file IfxCif.c.

◆ IfxCif_getEpInterruptOffset()

IFX_EXTERN uint32 IfxCif_getEpInterruptOffset ( IfxCif_ExtraPath z )

Function to query the current interrupt offset of one extra path.

Parameters
z Extra path for which to query the current interrupt offset
Returns
Current interrupt offset

Definition at line 906 of file IfxCif.c.

◆ IfxCif_getEpOffsetCounter()

IFX_EXTERN uint32 IfxCif_getEpOffsetCounter ( IfxCif_ExtraPath z )

Function to query the current offset counter of one extra path.

Parameters
z Extra path for which to query the current offset counter
Returns
Current offset counter

Definition at line 925 of file IfxCif.c.

◆ IfxCif_getEpOffsetCounterStart()

IFX_EXTERN uint32 IfxCif_getEpOffsetCounterStart ( IfxCif_ExtraPath z )

Function to query the initial offset counter start value of one extra path.

Parameters
z Extra path for which to query the initial offset counter start value
Returns
Initial offset counter start value of the extra path

Definition at line 944 of file IfxCif.c.

◆ IfxCif_getEpOutputEnableState()

IFX_EXTERN IfxCif_State IfxCif_getEpOutputEnableState ( IfxCif_ExtraPath z )

Function to query the current output enable state of one extra path.

Parameters
z Extra path for which to query the current output enable state
Returns
IfxCif_State_Enabled if the extra path is used in module MI_OUT, IfxCif_State_Disabled if the extra path is not used in module MI_OUT

Definition at line 963 of file IfxCif.c.

◆ IfxCif_getEpRecenterValue()

IFX_EXTERN uint8 IfxCif_getEpRecenterValue ( IfxCif_ExtraPath z )

Function to query the current recenter value of one extra path.

Parameters
z Extra path for which to query the current recenter value
Returns
Current recenter value

Definition at line 980 of file IfxCif.c.

◆ IfxCif_getEpSize()

IFX_EXTERN uint32 IfxCif_getEpSize ( IfxCif_ExtraPath z )

Function to query the current ring buffer size of one extra path.

Parameters
z Extra path for which to query the ring buffer size
Returns
Current ring buffer size

Definition at line 997 of file IfxCif.c.

◆ IfxCif_getEpWriteFormat()

IFX_EXTERN IfxCif_EpWriteFormat IfxCif_getEpWriteFormat ( IfxCif_ExtraPath z )

Function to query the write format of one extra path.

Parameters
z Extra path for which to query the write format
Returns
Set write format of the extra path (one member of IfxCif_EpWriteFormat)

Definition at line 1016 of file IfxCif.c.

◆ IfxCif_getMaskedEpInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to get the masked state of an interrupt.

Parameters
z | Extra path for which to query the interrupt state
interruptSource | Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled

Definition at line 1771 of file IfxCif.c.

◆ IfxCif_getRawEpInterruptTriggeredState()

IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to query the raw state of an interrupt.

Parameters
z | Extra path for which to query the interrupt state
interruptSource | Source of the interrupt
Returns
IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set

Definition at line 2272 of file IfxCif.c.

◆ IfxCif_setEpBaseInitAddress()

IFX_EXTERN void IfxCif_setEpBaseInitAddress | ( | IfxCif_ExtraPath | z,
 |  | Ifx_AddressValue | baseAddress
 | ) |  |

Function to set the initial base address of the ring buffer of one extra path.

Parameters
z | Extra path for which to set the initial base address
baseAddress | Initial base address of the ring buffer to set
Returns
None

Definition at line 2782 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpCroppingCameraDisplacement()

IFX_EXTERN void IfxCif_setEpCroppingCameraDisplacement | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier,
 |  | uint16 | displacement
 | ) |  |

Function to set the image cropping camera displacement of one tier of one extra path.

Parameters
z | Extra path for which to set the image cropping camera displacement
tier | Tier for which to set the image cropping camera displacement
displacement | Image cropping camera displacement to set
Returns
None

Definition at line 2797 of file IfxCif.c.

◆ IfxCif_setEpCroppingEnableState()

IFX_EXTERN void IfxCif_setEpCroppingEnableState | ( | IfxCif_ExtraPath | z,
 |  | uint32 | enableState
 | ) |  |

Function to enable or disable image cropping of one extra path.

Parameters
z | Extra path for which to enable or disable image cropping
enableState | IfxCif_State_Enabled to enable image cropping, IfxCif_State_Disabled to disable image cropping
Returns
None

Definition at line 2821 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpCroppingMaximumDisplacement()

IFX_EXTERN void IfxCif_setEpCroppingMaximumDisplacement | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier,
 |  | uint16 | displacement
 | ) |  |

Function to set the maximum displacement of one tier of one extra path.

Parameters
z | Extra path for which to set the maximum displacement
tier | Tier for which to set the maximum displacement
displacement | Maximum displacement to set
Returns
None

Definition at line 2834 of file IfxCif.c.

◆ IfxCif_setEpCroppingOffsetOutputWindow()

IFX_EXTERN void IfxCif_setEpCroppingOffsetOutputWindow | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier,
 |  | uint16 | offset
 | ) |  |

Function to set the image cropping offset of the output window of one tier of one extra path.

Parameters
z | Extra path for which to set the image cropping offset of the output window
tier | Tier for which to set the image cropping offset of the output window
offset | Offset to set
Returns
None

Definition at line 2858 of file IfxCif.c.

◆ IfxCif_setEpCroppingOffsetsOutputWindow()

IFX_EXTERN void IfxCif_setEpCroppingOffsetsOutputWindow | ( | IfxCif_ExtraPath | z,
 |  | uint16 | hOffset,
 |  | uint16 | vOffset
 | ) |  |

Function to set the image cropping offsets of the output window of one extra path.

Parameters
z | Extra path for which to set the image cropping offset of the output window
hOffset | Offset horizontal to set
vOffset | Offset vertical to set
Returns
None

Definition at line 2882 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpCroppingPictureSize()

IFX_EXTERN void IfxCif_setEpCroppingPictureSize | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_ImageTiers | tier,
 |  | uint16 | size
 | ) |  |

Function to set the image cropping picture size of one tier of one extra path.

Parameters
z | Extra path for which to set the image cropping picture size
tier | Tier for which to set the image cropping picture size
size | Image cropping picture size to set
Returns
None

Definition at line 2896 of file IfxCif.c.

◆ IfxCif_setEpCroppingPictureSizes()

IFX_EXTERN void IfxCif_setEpCroppingPictureSizes | ( | IfxCif_ExtraPath | z,
 |  | uint16 | hSize,
 |  | uint16 | vSize
 | ) |  |

Function to set the image cropping picture sizes one extra path.

Parameters
z | Extra path for which to set the image cropping picture size
hSize | Image cropping picture horizontal size to set
vSize | Image cropping picture vertical size to set
Returns
None

Definition at line 2920 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpFeatureEnableState()

IFX_EXTERN void IfxCif_setEpFeatureEnableState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpFeatures | feature,
 |  | IfxCif_State | enableState
 | ) |  |

Function to enable or disable one feature of one extra path.

Parameters
z | Extra path for which to enable or disable one feature
feature | Feature to enable or disable
enableState | IfxCif_State_Enabled to enable the feature, IfxCif_State_Disabled to disable the feature
Returns
None

Definition at line 2934 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpInitialFillLevelInterruptOffset()

IFX_EXTERN void IfxCif_setEpInitialFillLevelInterruptOffset | ( | uint32 | z,
 |  | uint32 | interruptOffset
 | ) |  |

Function to set the initial filling level interrupt offset of one extra path.

Parameters
z | Extra path for which to set the initial filling level interrupt offset
interruptOffset | Initial filling level interrupt offset to set
Returns
None

Definition at line 2981 of file IfxCif.c.

◆ IfxCif_setEpInitialOffsetCounter()

IFX_EXTERN void IfxCif_setEpInitialOffsetCounter | ( | IfxCif_ExtraPath | z,
 |  | uint32 | offsetCounter
 | ) |  |

Function to set the initial offset counter of one extra path.

Parameters
z | Extra path for which to set the initial offset counter
offsetCounter | Initial offset counter to set
Returns
None

Definition at line 2996 of file IfxCif.c.

◆ IfxCif_setEpInitSize()

IFX_EXTERN void IfxCif_setEpInitSize | ( | IfxCif_ExtraPath | z,
 |  | uint32 | size
 | ) |  |

Function to set the initial size of the ring buffer of one extra path.

Parameters
z | Extra path for which to set the initial size of the ring buffer
size | Initial size of the ring buffer to se
Returns
None

Definition at line 2966 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().

◆ IfxCif_setEpInterruptEnableState()

IFX_EXTERN void IfxCif_setEpInterruptEnableState | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource,
 |  | IfxCif_State | interruptEnableState
 | ) |  |

Function to enable or disable an interrupt.

Parameters
z | Extra path for which to enable or disable the interrupt
interruptSource | Source of the interrupt to enable or disable
interruptEnableState | IfxCif_State_Enabled to enable the interrupt, IfxCif_State_Disabled to disable the interrupt
Returns
None

Definition at line 3011 of file IfxCif.c.

◆ IfxCif_setEpInterruptRequestBit()

IFX_EXTERN void IfxCif_setEpInterruptRequestBit | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpInterrupts | interruptSource
 | ) |  |

Function to set an interrupt request bit (does not necessarily trigger an interrupt)

Parameters
z | Function to set an interrupt request bit (does not necessarily trigger an interrupt)
interruptSource | Extra path for which to set the interrupt request bit
Returns
None

Definition at line 3033 of file IfxCif.c.

◆ IfxCif_setEpOffsetCounterStart()

IFX_EXTERN void IfxCif_setEpOffsetCounterStart | ( | uint32 | z,
 |  | uint32 | offsetCounter
 | ) |  |

Function to set the initial offset counter start value of one extra path.

Parameters
z | Extra path for which to set the initial offset counter start value
offsetCounter | Initial offset counter start value to set
Returns
None

Definition at line 3046 of file IfxCif.c.

◆ IfxCif_setEpRecenterValue()

IFX_EXTERN void IfxCif_setEpRecenterValue | ( | IfxCif_ExtraPath | z,
 |  | uint8 | value
 | ) |  |

Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter))

Parameters
z | Extra path for which to set the recenter value
value | Recenter value to set
Returns
None

Definition at line 3061 of file IfxCif.c.

◆ IfxCif_setEpWriteFormat()

IFX_EXTERN void IfxCif_setEpWriteFormat | ( | IfxCif_ExtraPath | z,
 |  | IfxCif_EpWriteFormat | writeFormat
 | ) |  |

Function to set the write format for one extra path.

Parameters
z | Extra path for which to set the write format
writeFormat | Write format to set
Returns
None

Definition at line 3074 of file IfxCif.c.

Referenced by IfxCif_Cam_initCifExtraPath().


iLLD_TC26B: Extra Path Enumerations

Enumerations
Extra Path Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Extra Path Enumerations:

Enumerations

enum IfxCif_EpErrorClearSources {
IfxCif_EpErrorClearSources_ExtraPath5SizeError = 0,
IfxCif_EpErrorClearSources_ExtraPath4SizeError = 1,
IfxCif_EpErrorClearSources_ExtraPath3SizeError = 2,
IfxCif_EpErrorClearSources_ExtraPath2SizeError = 3,
IfxCif_EpErrorClearSources_ExtraPath1SizeError = 4
}
Enumerator for error sources that can be cleared in the extra paths registers. More...
enum IfxCif_EpErrorSources {
IfxCif_EpErrorSources_ExtraPath5FifoFull = 0,
IfxCif_EpErrorSources_ExtraPath4FifoFull = 1,
IfxCif_EpErrorSources_ExtraPath3FifoFull = 2,
IfxCif_EpErrorSources_ExtraPath2FifoFull = 3,
IfxCif_EpErrorSources_ExtraPath1FifoFull = 4,
IfxCif_EpErrorSources_ExtraPath5SizeError = 5,
IfxCif_EpErrorSources_ExtraPath4SizeError = 6,
IfxCif_EpErrorSources_ExtraPath3SizeError = 7,
IfxCif_EpErrorSources_ExtraPath2SizeError = 8,
IfxCif_EpErrorSources_ExtraPath1SizeError = 9
}
Enumerator for error sources of extra paths. More...
enum IfxCif_EpFeatures {
IfxCif_EpFeatures_InitOffsetCounter = 0,
IfxCif_EpFeatures_InitBaseAddress = 1,
IfxCif_EpFeatures_ByteSwap = 2,
IfxCif_EpFeatures_PictureDataPath = 3
}
Enumerator for extra path features. More...
enum IfxCif_EpInterrupts {
IfxCif_EpInterrupts_FrameEnd = IFX_CIF_MIEP_MIS_FRAME_END_EP_1_OFF,
IfxCif_EpInterrupts_FillLevel = IFX_CIF_MIEP_MIS_FILL_EP_1_OFF,
IfxCif_EpInterrupts_WrapAround = IFX_CIF_MIEP_MIS_WRAP_EP_1_OFF,
IfxCif_EpInterrupts_MacroBlockLine = IFX_CIF_MIEP_MIS_MBLK_LINE_EP_1_OFF,
IfxCif_EpInterrupts_Count = 4
}
Enumerator for interrupt sources of the extra paths module. More...
enum IfxCif_EpWriteFormat {
IfxCif_EpWriteFormat_RawAndData = 0,
IfxCif_EpWriteFormat_Raw8Bit = 1,
IfxCif_EpWriteFormat_RawGreater = 2,
IfxCif_EpWriteFormat_YCbCr = 3
}
Enumerator for write formats of extra paths. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_EpErrorClearSources

enum IfxCif_EpErrorClearSources

Enumerator for error sources that can be cleared in the extra paths registers.

Enumerator
IfxCif_EpErrorClearSources_ExtraPath5SizeError | Size error in image cropping unit of extra path 5.
IfxCif_EpErrorClearSources_ExtraPath4SizeError | Size error in image cropping unit of extra path 4.
IfxCif_EpErrorClearSources_ExtraPath3SizeError | Size error in image cropping unit of extra path 3.
IfxCif_EpErrorClearSources_ExtraPath2SizeError | Size error in image cropping unit of extra path 2.
IfxCif_EpErrorClearSources_ExtraPath1SizeError | Size error in image cropping unit of extra path 1.

Definition at line 545 of file IfxCif.h.

◆ IfxCif_EpErrorSources

enum IfxCif_EpErrorSources

Enumerator for error sources of extra paths.

Enumerator
IfxCif_EpErrorSources_ExtraPath5FifoFull | FIFO of extra path 5 is full.
IfxCif_EpErrorSources_ExtraPath4FifoFull | FIFO of extra path 4 is full.
IfxCif_EpErrorSources_ExtraPath3FifoFull | FIFO of extra path 3 is full.
IfxCif_EpErrorSources_ExtraPath2FifoFull | FIFO of extra path 2 is full.
IfxCif_EpErrorSources_ExtraPath1FifoFull | FIFO of extra path 1 is full.
IfxCif_EpErrorSources_ExtraPath5SizeError | Size error in image cropping unit of extra path 5.
IfxCif_EpErrorSources_ExtraPath4SizeError | Size error in image cropping unit of extra path 4.
IfxCif_EpErrorSources_ExtraPath3SizeError | Size error in image cropping unit of extra path 3.
IfxCif_EpErrorSources_ExtraPath2SizeError | Size error in image cropping unit of extra path 2.
IfxCif_EpErrorSources_ExtraPath1SizeError | Size error in image cropping unit of extra path 1.

Definition at line 556 of file IfxCif.h.

◆ IfxCif_EpFeatures

enum IfxCif_EpFeatures

Enumerator for extra path features.

Enumerator
IfxCif_EpFeatures_InitOffsetCounter | Init offest counter.
IfxCif_EpFeatures_InitBaseAddress | Init buffer base address.
IfxCif_EpFeatures_ByteSwap | Byte swap feature.
IfxCif_EpFeatures_PictureDataPath | enables the extra path picture data path

Definition at line 572 of file IfxCif.h.

◆ IfxCif_EpInterrupts

enum IfxCif_EpInterrupts

Enumerator for interrupt sources of the extra paths module.

Enumerator
IfxCif_EpInterrupts_FrameEnd | Picture end of frame interrupt.
IfxCif_EpInterrupts_FillLevel | Fill level interrupt.
IfxCif_EpInterrupts_WrapAround | Address wrap interrupt.
IfxCif_EpInterrupts_MacroBlockLine | Macroblock line interrupt.
IfxCif_EpInterrupts_Count | Total number of interrupt sources for one extra path.

Definition at line 582 of file IfxCif.h.

◆ IfxCif_EpWriteFormat

enum IfxCif_EpWriteFormat

Enumerator for write formats of extra paths.

Enumerator
IfxCif_EpWriteFormat_RawAndData | Raw and data mode (8 bit)
IfxCif_EpWriteFormat_Raw8Bit | Raw 8 bit mode.
IfxCif_EpWriteFormat_RawGreater | RAW & data mode (greater 8 up to 16 bit)
IfxCif_EpWriteFormat_YCbCr | YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths.

Definition at line 593 of file IfxCif.h.


iLLD_TC26B: Debug Path Functions

Functions
Debug Path Functions
iLLD » CIF » Standard Driver
Collaboration diagram for Debug Path Functions:

Functions

IFX_INLINE IfxCif_State | IfxCif_getDpEnableState (void)
Function to query the debug path enabled state. More...
IFX_INLINE IfxCif_DpSourcePath | IfxCif_getDpSourcePath (void)
Function to query the selected debug path source path. More...
IFX_INLINE void | IfxCif_setDpEnableState (IfxCif_State enableState)
Function to enable or disable the debug path. More...
IFX_INLINE void | IfxCif_setDpSourcePath (IfxCif_DpSourcePath sourcePath)
Function to select one debug path source path. More...
IFX_EXTERN void | IfxCif_dpResetCounter (IfxCif_DpCounters counter)
Function to reset one debug path counter. More...
IFX_EXTERN IfxCif_State | IfxCif_getDpControlEnableState (IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source. More...
IFX_EXTERN uint32 | IfxCif_getDpCounter (IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter. More...
IFX_EXTERN uint16 | IfxCif_getDpUserDefinedSymbol (uint8 x)
Function to query the value of one user defined debug symbol. More...
IFX_EXTERN void | IfxCif_setDpControlEnableState (IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source. More...
IFX_EXTERN void | IfxCif_setDpCounter (IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value. More...
IFX_EXTERN void | IfxCif_setDpUserDefinedSymbol (uint8 x, uint16 value)
Function to set one user defined debug symbol. More...

Detailed Description

Function Documentation

◆ IfxCif_dpResetCounter()

IFX_EXTERN void IfxCif_dpResetCounter ( IfxCif_DpCounters counter )

Function to reset one debug path counter.

Parameters
counter Debug path counter to reset
Returns
None

Definition at line 275 of file IfxCif.c.

◆ IfxCif_getDpControlEnableState()

IFX_EXTERN IfxCif_State IfxCif_getDpControlEnableState ( IfxCif_DpControlSources source )

Function to query the transmission enabled state of one debug path control source.

Parameters
source Source for which to query the transmission enabled state
Returns
IfxCif_State_Enabled if transmission is enabled, IfxCif_State_Disabled if transmission is disabled

Definition at line 374 of file IfxCif.c.

◆ IfxCif_getDpCounter()

IFX_EXTERN uint32 IfxCif_getDpCounter ( IfxCif_DpCounters counter )

Function to query the current counter value of one debug path counter.

Parameters
counter Counter for which to query the value
Returns
Current counter value

Definition at line 431 of file IfxCif.c.

◆ IfxCif_getDpEnableState()

IFX_INLINE IfxCif_State IfxCif_getDpEnableState ( void )

Function to query the debug path enabled state.

Returns
IfxCif_State_Enabled if the debug path is enabled, IfxCif_State_Disabled if the debug path is disabled

Definition at line 2435 of file IfxCif.h.

◆ IfxCif_getDpSourcePath()

IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath ( void )

Function to query the selected debug path source path.

Returns
Currently selected debug path source path (one member of IfxCif_DpSourcePath)

Definition at line 2441 of file IfxCif.h.

◆ IfxCif_getDpUserDefinedSymbol()

IFX_EXTERN uint16 IfxCif_getDpUserDefinedSymbol ( uint8 x )

Function to query the value of one user defined debug symbol.

Parameters
x User defined symbol to query
Returns
Value of the user defined debug symbol

Definition at line 460 of file IfxCif.c.

◆ IfxCif_setDpControlEnableState()

IFX_EXTERN void IfxCif_setDpControlEnableState | ( | IfxCif_DpControlSources | source,
 |  | IfxCif_State | enableState
 | ) |  |

Function to enable or disable transmission of one debug path control source.

Parameters
source | Source for which to enable or disable transmission
enableState | IfxCif_State_Enabled to enable transmission, IfxCif_State_Disabled to disable transmission
Returns
None

Definition at line 2702 of file IfxCif.c.

◆ IfxCif_setDpCounter()

IFX_EXTERN void IfxCif_setDpCounter | ( | IfxCif_DpCounters | counter,
 |  | uint32 | counterValue
 | ) |  |

Function to set one debug path counter to a counter value.

Parameters
counter | Counter to set
counterValue | Counter value to set
Returns
None

Definition at line 2755 of file IfxCif.c.

◆ IfxCif_setDpEnableState()

IFX_INLINE void IfxCif_setDpEnableState ( IfxCif_State enableState )

Function to enable or disable the debug path.

Parameters
enableState IfxCif_State_Enabled to enable the debug path, IfxCif_State_Disabled to disable the debug path
Returns
None

Definition at line 2745 of file IfxCif.h.

◆ IfxCif_setDpSourcePath()

IFX_INLINE void IfxCif_setDpSourcePath ( IfxCif_DpSourcePath sourcePath )

Function to select one debug path source path.

Parameters
sourcePath Source path to select
Returns
None

Definition at line 2751 of file IfxCif.h.

◆ IfxCif_setDpUserDefinedSymbol()

IFX_EXTERN void IfxCif_setDpUserDefinedSymbol | ( | uint8 | x,
 |  | uint16 | value
 | ) |  |

Function to set one user defined debug symbol.

Parameters
x | User defined symbol to set
value | Value to set
Returns
None

Definition at line 2769 of file IfxCif.c.


iLLD_TC26B: Debug Path Enumerations

Enumerations
Debug Path Enumerations
iLLD » CIF » Standard Driver
Collaboration diagram for Debug Path Enumerations:

Enumerations

enum IfxCif_DpControlSources {
IfxCif_DpControlSources_UserDefinedSymbol8 = 0,
IfxCif_DpControlSources_UserDefinedSymbol7 = 1,
IfxCif_DpControlSources_UserDefinedSymbol6 = 2,
IfxCif_DpControlSources_UserDefinedSymbol5 = 3,
IfxCif_DpControlSources_UserDefinedSymbol4 = 4,
IfxCif_DpControlSources_UserDefinedSymbol3 = 5,
IfxCif_DpControlSources_UserDefinedSymbol2 = 6,
IfxCif_DpControlSources_UserDefinedSymbol1 = 7,
IfxCif_DpControlSources_TimestampCounter = 8,
IfxCif_DpControlSources_LineNumberCounter = 9,
IfxCif_DpControlSources_FrameNumberCounter = 10
}
Enumerator for debug path control sources. More...
enum IfxCif_DpCounters {
IfxCif_DpCounters_PredividerCounter = 0,
IfxCif_DpCounters_TimestampCounter = 1,
IfxCif_DpCounters_LineNumberCounter = 2,
IfxCif_DpCounters_FrameNumberCounter = 3
}
Enumerator for debug path counters. More...
enum IfxCif_DpSourcePath {
IfxCif_DpSourcePath_MainPath = 0,
IfxCif_DpSourcePath_ExtraPath1 = 1,
IfxCif_DpSourcePath_ExtraPath2 = 2,
IfxCif_DpSourcePath_ExtraPath4 = 4,
IfxCif_DpSourcePath_ExtraPath5 = 5
}
Enumerator for debug path source paths. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCif_DpControlSources

enum IfxCif_DpControlSources

Enumerator for debug path control sources.

Enumerator
IfxCif_DpControlSources_UserDefinedSymbol8 | User defined symbol 8.
IfxCif_DpControlSources_UserDefinedSymbol7 | User defined symbol 7.
IfxCif_DpControlSources_UserDefinedSymbol6 | User defined symbol 6.
IfxCif_DpControlSources_UserDefinedSymbol5 | User defined symbol 5.
IfxCif_DpControlSources_UserDefinedSymbol4 | ser defined symbol 4
IfxCif_DpControlSources_UserDefinedSymbol3 | User defined symbol 3.
IfxCif_DpControlSources_UserDefinedSymbol2 | User defined symbol 2.
IfxCif_DpControlSources_UserDefinedSymbol1 | User defined symbol 1.
IfxCif_DpControlSources_TimestampCounter | Timestamp counter.
IfxCif_DpControlSources_LineNumberCounter | Line number counter.
IfxCif_DpControlSources_FrameNumberCounter | Frame number counter.

Definition at line 607 of file IfxCif.h.

◆ IfxCif_DpCounters

enum IfxCif_DpCounters

Enumerator for debug path counters.

Enumerator
IfxCif_DpCounters_PredividerCounter | Predivider counter.
IfxCif_DpCounters_TimestampCounter | Timestamp counter.
IfxCif_DpCounters_LineNumberCounter | Line number counter.
IfxCif_DpCounters_FrameNumberCounter | Frame number counter.

Definition at line 624 of file IfxCif.h.

◆ IfxCif_DpSourcePath

enum IfxCif_DpSourcePath

Enumerator for debug path source paths.

Enumerator
IfxCif_DpSourcePath_MainPath | Main data path.
IfxCif_DpSourcePath_ExtraPath1 | Extra path 1.
IfxCif_DpSourcePath_ExtraPath2 | Extra path 2.
IfxCif_DpSourcePath_ExtraPath4 | Extra path 4.
IfxCif_DpSourcePath_ExtraPath5 | Extra path 5.

Definition at line 634 of file IfxCif.h.


iLLD_TC26B: CIF Pin Mapping

Data Structures | Variables
CIF Pin Mapping
iLLD » CIF
Collaboration diagram for CIF Pin Mapping:

Data Structures

struct | IfxCif_Clk_In
CLK pin mapping structure. More...
struct | IfxCif_D_In
D pin mapping structure. More...
struct | IfxCif_Hsnc_In
HSNC pin mapping structure. More...
struct | IfxCif_Vsnc_In
VSNC pin mapping structure. More...

Variables

IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN
CIF_CLK: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN
CIF_D0: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN
CIF_D10: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN
CIF_D11: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN
CIF_D12: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN
CIF_D13: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN
CIF_D14: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN
CIF_D15: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN
CIF_D1: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN
CIF_D2: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN
CIF_D3: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN
CIF_D4: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN
CIF_D5: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN
CIF_D6: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN
CIF_D7: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN
CIF_D8: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN
CIF_D9: CIF input. More...
IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN
CIF_HSNC: CIF input. More...
IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN
CIF_VSNC: CIF input. More...

Detailed Description

Data Structure Documentation

◆ IfxCif_Clk_In

struct IfxCif_Clk_In

CLK pin mapping structure.

Definition at line 39 of file IfxCif_PinMap.h.

Collaboration diagram for IfxCif_Clk_In:
[legend]
Data Fields
Ifx_CIF * | module | Base address.
IfxPort_Pin | pin | Port pin.

◆ IfxCif_D_In

struct IfxCif_D_In

D pin mapping structure.

Definition at line 46 of file IfxCif_PinMap.h.

Collaboration diagram for IfxCif_D_In:
[legend]
Data Fields
Ifx_CIF * | module | Base address.
IfxPort_Pin | pin | Port pin.

◆ IfxCif_Hsnc_In

struct IfxCif_Hsnc_In

HSNC pin mapping structure.

Definition at line 53 of file IfxCif_PinMap.h.

Collaboration diagram for IfxCif_Hsnc_In:
[legend]
Data Fields
Ifx_CIF * | module | Base address.
IfxPort_Pin | pin | Port pin.

◆ IfxCif_Vsnc_In

struct IfxCif_Vsnc_In

VSNC pin mapping structure.

Definition at line 60 of file IfxCif_PinMap.h.

Collaboration diagram for IfxCif_Vsnc_In:
[legend]
Data Fields
Ifx_CIF * | module | Base address.
IfxPort_Pin | pin | Port pin.

Variable Documentation

◆ IfxCif_CLK_P00_7_IN

IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN

CIF_CLK: CIF input.

Definition at line 66 of file IfxCif_PinMap.h.

◆ IfxCif_D0_P02_0_IN

IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN

CIF_D0: CIF input.

Definition at line 67 of file IfxCif_PinMap.h.

◆ IfxCif_D10_P00_1_IN

IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN

CIF_D10: CIF input.

Definition at line 68 of file IfxCif_PinMap.h.

◆ IfxCif_D11_P00_2_IN

IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN

CIF_D11: CIF input.

Definition at line 69 of file IfxCif_PinMap.h.

◆ IfxCif_D12_P00_3_IN

IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN

CIF_D12: CIF input.

Definition at line 70 of file IfxCif_PinMap.h.

◆ IfxCif_D13_P00_4_IN

IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN

CIF_D13: CIF input.

Definition at line 71 of file IfxCif_PinMap.h.

◆ IfxCif_D14_P00_5_IN

IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN

CIF_D14: CIF input.

Definition at line 72 of file IfxCif_PinMap.h.

◆ IfxCif_D15_P00_6_IN

IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN

CIF_D15: CIF input.

Definition at line 73 of file IfxCif_PinMap.h.

◆ IfxCif_D1_P02_1_IN

IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN

CIF_D1: CIF input.

Definition at line 74 of file IfxCif_PinMap.h.

◆ IfxCif_D2_P02_2_IN

IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN

CIF_D2: CIF input.

Definition at line 75 of file IfxCif_PinMap.h.

◆ IfxCif_D3_P02_3_IN

IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN

CIF_D3: CIF input.

Definition at line 76 of file IfxCif_PinMap.h.

◆ IfxCif_D4_P02_4_IN

IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN

CIF_D4: CIF input.

Definition at line 77 of file IfxCif_PinMap.h.

◆ IfxCif_D5_P02_5_IN

IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN

CIF_D5: CIF input.

Definition at line 78 of file IfxCif_PinMap.h.

◆ IfxCif_D6_P02_6_IN

IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN

CIF_D6: CIF input.

Definition at line 79 of file IfxCif_PinMap.h.

◆ IfxCif_D7_P02_7_IN

IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN

CIF_D7: CIF input.

Definition at line 80 of file IfxCif_PinMap.h.

◆ IfxCif_D8_P02_8_IN

IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN

CIF_D8: CIF input.

Definition at line 81 of file IfxCif_PinMap.h.

◆ IfxCif_D9_P00_0_IN

IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN

CIF_D9: CIF input.

Definition at line 82 of file IfxCif_PinMap.h.

◆ IfxCif_HSNC_P00_9_IN

IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN

CIF_HSNC: CIF input.

Definition at line 83 of file IfxCif_PinMap.h.

◆ IfxCif_VSNC_P00_8_IN

IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN

CIF_VSNC: CIF input.

Definition at line 84 of file IfxCif_PinMap.h.


iLLD_TC26B: CAM

Modules
CAM
iLLD » CIF
Collaboration diagram for CAM:

Modules

Camera Enumerations
Camera Functions
Camera Structures

Detailed Description


iLLD_TC26B: Camera Enumerations

Enumerations | Functions
Camera Enumerations
iLLD » CIF » CAM
Collaboration diagram for Camera Enumerations:

Enumerations

enum IfxCif_Cam_IspMode {
IfxCif_Cam_IspMode_undefined = -1,
IfxCif_Cam_IspMode_raw = 0,
IfxCif_Cam_IspMode_yuvInterleaved = 1,
IfxCif_Cam_IspMode_yuvPlanar = 2
}
CIF ISP mode. More...
enum IfxCif_Cam_State {
IfxCif_Cam_State_stopped = 0,
IfxCif_Cam_State_running = 1
}
Driver acquisition state. More...
enum IfxCif_Cam_Status {
IfxCif_Cam_Status_ok = 0,
IfxCif_Cam_Status_notEnoughMemory = 1,
IfxCif_Cam_Status_cameraCommError = 2,
IfxCif_Cam_Status_notAvailable = 3
}
Driver status. More...

Functions

IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize (IfxCif_Cam *cam, const IfxCif_Cam_Config *config)

Detailed Description

Enumeration Type Documentation

◆ IfxCif_Cam_IspMode

enum IfxCif_Cam_IspMode

CIF ISP mode.

Enumerator
IfxCif_Cam_IspMode_undefined | undefined
IfxCif_Cam_IspMode_raw | raw
IfxCif_Cam_IspMode_yuvInterleaved | yuv interleaved
IfxCif_Cam_IspMode_yuvPlanar | yuv planar

Definition at line 63 of file IfxCif_Cam.h.

◆ IfxCif_Cam_State

enum IfxCif_Cam_State

Driver acquisition state.

Enumerator
IfxCif_Cam_State_stopped | stopped
IfxCif_Cam_State_running | running

Definition at line 73 of file IfxCif_Cam.h.

◆ IfxCif_Cam_Status

enum IfxCif_Cam_Status

Driver status.

Enumerator
IfxCif_Cam_Status_ok | ok
IfxCif_Cam_Status_notEnoughMemory | not enough Memory
IfxCif_Cam_Status_cameraCommError | camera comm Error
IfxCif_Cam_Status_notAvailable | not available

Definition at line 81 of file IfxCif_Cam.h.

Function Documentation

◆ IfxCif_Cam_initMemSize()

IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize | ( | IfxCif_Cam * | cam,
 |  | const IfxCif_Cam_Config * | config
 | ) |  |
Parameters
cam cam handle

Definition at line 668 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().


iLLD_TC26B: Camera Functions

Functions
Camera Functions
iLLD » CIF » CAM
Collaboration diagram for Camera Functions:

Functions

IFX_INLINE uint32 | IfxCif_Cam_calcMem (uint32 bytes, float32 frames)
IFX_INLINE void | IfxCif_Cam_initPictInfo (IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
IFX_INLINE void | IfxCif_Cam_initPortPins (IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
initializes GPIO Ports for image capturing More...
IFX_INLINE boolean | IfxCif_Cam_isEmulationExtensionAvailable (void)
IFX_INLINE uint32 | IfxCif_Cam_yuvMemSize (const IfxCif_Cam *cam)
IFX_STATIC IfxCif_Cam_Status | IfxCif_Cam_initCamera (const IfxCif_Cam_Config *config)
OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash. More...
IFX_STATIC void | IfxCif_Cam_initCif (const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Initialises the CIF for image capturing. More...
IFX_STATIC void | IfxCif_Cam_initCifDownscaler (const IfxCif_Cam_Downscaling *ds)
IFX_STATIC void | IfxCif_Cam_initCifExtraPath (const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifIspUnit (const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifJpegEncoder (const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifMemInterface (const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initEmem (void)
Enables CIF and EMEM and initialises all memory to 0. More...
IFX_INLINE void | IfxCif_Cam_clearFrameReceptionFlag (const IfxCif_Cam *cam)
Clear the frame reception flag. More...
IFX_INLINE void | IfxCif_Cam_clearJpegEncodingCompleteFlag (const IfxCif_Cam *cam)
Clear the JPEG encoder completed flag. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getBbbAddress (const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
Convert the CPU address into BBB address. More...
IFX_INLINE uint32 | IfxCif_Cam_getExtraFrameSize (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the size (in bytes) of one last acquired extra-path image data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getExtraPathMemInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
IFX_INLINE uint32 | IfxCif_Cam_getFrameSize (const IfxCif_Cam *cam)
Returns the size (in bytes) of last acquired main-path image data. More...
IFX_INLINE uint32 | IfxCif_Cam_getJpegEncodedSize (const IfxCif_Cam *cam)
Returns the size (in bytes) of last encoded main-path image data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getLastExtraAddress (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the address location of last acquired extra-path image frame data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getLastExtraCaptureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getLastFrameAddress (const IfxCif_Cam *cam)
Returns the address location of last acquired main-path image frame data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getLastFrameCaptureInfo (const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getNextFrameAddress (const IfxCif_Cam *cam)
Returns the address location of next acquired main-path image frame data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getNextJpegFrameAddress (IfxCif_Cam *cam)
Returns the address location of next acquired JPEG image frame data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_incrementAddress (const IfxCif_Cam *cam, Ifx_AddressValue address)
Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size. More...
IFX_INLINE boolean | IfxCif_Cam_isFrameReceptionComplete (const IfxCif_Cam *cam)
Returns TRUE if JPEG encoding is completed. More...
IFX_INLINE boolean | IfxCif_Cam_isJpegEncodingComplete (const IfxCif_Cam *cam)
IFX_INLINE void | IfxCif_Cam_skipPicture (const IfxCif_Cam *cam)
IFX_EXTERN void | IfxCif_Cam_clearAllFlags (const IfxCif_Cam *cam)
Clear all CIF module notification flags. More...
IFX_EXTERN void | IfxCif_Cam_disableJpegEncoder (const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path. More...
IFX_EXTERN void | IfxCif_Cam_enableJpegEncoder (const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly. More...
IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo * | IfxCif_Cam_getExtraPathPictureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path. More...
IFX_EXTERN boolean | IfxCif_Cam_getLastJpegEncodingInfo (IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process. More...
IFX_EXTERN IfxCif_Cam_Status | IfxCif_Cam_init (IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself. More...
IFX_EXTERN void | IfxCif_Cam_restartCapture (const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output. More...
IFX_EXTERN void | IfxCif_Cam_startCapture (const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter. More...
IFX_EXTERN void | IfxCif_Cam_stopCapture (const IfxCif_Cam *cam)
Stop capture by disabling the ISP output. More...

Detailed Description

Function Documentation

◆ IfxCif_Cam_calcMem()

IFX_INLINE uint32 IfxCif_Cam_calcMem | ( | uint32 | bytes,
 |  | float32 | frames
 | ) |  |

Definition at line 135 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initMemSize().

◆ IfxCif_Cam_clearAllFlags()

IFX_EXTERN void IfxCif_Cam_clearAllFlags ( const IfxCif_Cam * cam )

Clear all CIF module notification flags.

Parameters
cam cam handle
Returns
None

Definition at line 188 of file IfxCif_Cam.c.

◆ IfxCif_Cam_clearFrameReceptionFlag()

IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag ( const IfxCif_Cam * cam )

Clear the frame reception flag.

Parameters
cam cam handle
Returns
None

Definition at line 437 of file IfxCif_Cam.h.

◆ IfxCif_Cam_clearJpegEncodingCompleteFlag()

IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag ( const IfxCif_Cam * cam )

Clear the JPEG encoder completed flag.

Parameters
cam cam handle
Returns
None

Definition at line 444 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_disableJpegEncoder()

IFX_EXTERN void IfxCif_Cam_disableJpegEncoder ( const IfxCif_Cam * cam )

Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path.

Parameters
cam cam handle
Returns
None

Definition at line 197 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_enableJpegEncoder()

IFX_EXTERN void IfxCif_Cam_enableJpegEncoder ( const IfxCif_Cam * cam )

Enable the JPEG encoder and route the acquisition path accordingly.

Parameters
cam cam handle
Returns
None

Definition at line 213 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_getBbbAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress | ( | const IfxCif_Cam * | cam,
 |  | Ifx_AddressValue | cpuAddress
 | ) |  |

Convert the CPU address into BBB address.

Parameters
cam | cam handle
cpuAddress | Address value

Definition at line 451 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_initCifExtraPath(), and IfxCif_Cam_initCifMemInterface().

◆ IfxCif_Cam_getExtraFrameSize()

IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z
 | ) |  |

Returns the size (in bytes) of one last acquired extra-path image data.

Parameters
cam | cam handle
z | Extra path

Definition at line 459 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastExtraCaptureInfo().

◆ IfxCif_Cam_getExtraPathMemInfo()

IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getExtraPathMemInfo | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z
 | ) |  |
Parameters
cam | cam handle
z | Extra path

Definition at line 481 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastExtraCaptureInfo().

◆ IfxCif_Cam_getExtraPathPictureInfo()

IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo* IfxCif_Cam_getExtraPathPictureInfo | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z
 | ) |  |

Returns pointer to the variable storing picture info of an extra-path.

Parameters
cam | cam handle
z | Extra Path
Returns
pointer to the variable storing picture info of an extra-path

Definition at line 223 of file IfxCif_Cam.c.

◆ IfxCif_Cam_getFrameSize()

IFX_INLINE uint32 IfxCif_Cam_getFrameSize ( const IfxCif_Cam * cam )

Returns the size (in bytes) of last acquired main-path image data.

Parameters
cam cam handle

Definition at line 487 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getJpegEncodedSize(), and IfxCif_Cam_getLastFrameCaptureInfo().

◆ IfxCif_Cam_getJpegEncodedSize()

IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize ( const IfxCif_Cam * cam )

Returns the size (in bytes) of last encoded main-path image data.

Parameters
cam cam handle

Definition at line 501 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_getLastExtraAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z
 | ) |  |

Returns the address location of last acquired extra-path image frame data.

Parameters
cam | cam handle
z | Extra path

Definition at line 510 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastExtraCaptureInfo().

◆ IfxCif_Cam_getLastExtraCaptureInfo()

IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getLastExtraCaptureInfo | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | z,
 |  | Ifx_AddressValue * | address,
 |  | uint32 * | size
 | ) |  |
Parameters
cam | cam handle
z | Extra path
address | Address Value
size | const IfxCif_Cam_MemInfo *m; *size = IfxCif_Cam_getExtraFrameSize(cam, z); *address = IfxCif_Cam_getLastExtraAddress(cam, z); m = IfxCif_Cam_getExtraPathMemInfo(cam, z); return m;

Definition at line 523 of file IfxCif_Cam.h.

◆ IfxCif_Cam_getLastFrameAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress ( const IfxCif_Cam * cam )

Returns the address location of last acquired main-path image frame data.

Parameters
cam cam handle
Returns
address location of last acquired main-path image frame data

Definition at line 533 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastFrameCaptureInfo(), and IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_getLastFrameCaptureInfo()

IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getLastFrameCaptureInfo | ( | const IfxCif_Cam * | cam,
 |  | Ifx_AddressValue * | address,
 |  | uint32 * | size
 | ) |  |
Parameters
cam | cam handle
address | Address value
size | Size

Definition at line 541 of file IfxCif_Cam.h.

◆ IfxCif_Cam_getLastJpegEncodingInfo()

IFX_EXTERN boolean IfxCif_Cam_getLastJpegEncodingInfo | ( | IfxCif_Cam * | cam,
 |  | Ifx_AddressValue * | address,
 |  | sint32 * | size
 | ) |  |

Returns pointer to the memory structure storing last JPEG encoding process.

Parameters
cam | cam handle
address | EMEM address which stores the JPEG frame
size | size of JPEG frame
Returns
TRUE if there was new frame encoded, else FALSE

Definition at line 236 of file IfxCif_Cam.c.

◆ IfxCif_Cam_getNextFrameAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress ( const IfxCif_Cam * cam )

Returns the address location of next acquired main-path image frame data.

Parameters
cam cam handle

Definition at line 551 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getNextJpegFrameAddress().

◆ IfxCif_Cam_getNextJpegFrameAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress ( IfxCif_Cam * cam )

Returns the address location of next acquired JPEG image frame data.

Parameters
cam cam handle

Definition at line 559 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_incrementAddress()

IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress | ( | const IfxCif_Cam * | cam,
 |  | Ifx_AddressValue | address
 | ) |  |

Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size.

Parameters
cam | cam handle
address | Address value

Definition at line 567 of file IfxCif_Cam.h.

◆ IfxCif_Cam_init()

IFX_EXTERN IfxCif_Cam_Status IfxCif_Cam_init | ( | IfxCif_Cam * | cam,
 |  | const IfxCif_Cam_Config * | config,
 |  | boolean | initCam
 | ) |  |

Initialise the CIF, EMEM, PORT, I2C and the camera itself.

Parameters
cam | cam handel
config | configurations structure
initCam | if TRUE camera will be reconfigured, else camera will not be reconfigured.

Definition at line 261 of file IfxCif_Cam.c.

◆ IfxCif_Cam_initCamera()

IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera ( const IfxCif_Cam_Config * config )

OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash.

Definition at line 300 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_initCif()

IFX_STATIC void IfxCif_Cam_initCif | ( | const IfxCif_Cam * | cam,
 |  | const IfxCif_Cam_Config * | config
 | ) |  |

Initialises the CIF for image capturing.

Parameters
cam cam handel
Returns
None

Definition at line 353 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_initCifDownscaler()

IFX_STATIC void IfxCif_Cam_initCifDownscaler ( const IfxCif_Cam_Downscaling * ds )
Returns
None

Definition at line 389 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initCifExtraPath()

IFX_STATIC void IfxCif_Cam_initCifExtraPath | ( | const IfxCif_Cam * | cam,
 |  | IfxCif_ExtraPath | ep,
 |  | const IfxCif_Cam_Config * | config
 | ) |  |
Parameters
cam cam handle
Returns
None

Definition at line 401 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initCifIspUnit()

IFX_STATIC void IfxCif_Cam_initCifIspUnit ( const IfxCif_Cam_Config * config )
Returns
None

Definition at line 447 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initCifJpegEncoder()

IFX_STATIC void IfxCif_Cam_initCifJpegEncoder ( const IfxCif_Cam_Config * config )
Returns
None

Definition at line 540 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initCifMemInterface()

IFX_STATIC void IfxCif_Cam_initCifMemInterface | ( | const IfxCif_Cam * | cam,
 |  | const IfxCif_Cam_Config * | config
 | ) |  |
Parameters
cam cam handle
Returns
None

Definition at line 595 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initCif().

◆ IfxCif_Cam_initEmem()

IFX_STATIC void IfxCif_Cam_initEmem ( void )

Enables CIF and EMEM and initialises all memory to 0.

Returns
None

Definition at line 634 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_initPictInfo()

IFX_INLINE void IfxCif_Cam_initPictInfo | ( | IfxCif_Cam_PictureInfo * | m,
 |  | const IfxCif_Cam_MemConfig * | mcfg
 | ) |  |
Returns
None

Definition at line 144 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initMemSize().

◆ IfxCif_Cam_initPortPins()

IFX_INLINE void IfxCif_Cam_initPortPins | ( | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

initializes GPIO Ports for image capturing

Returns
None

Definition at line 153 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_isEmulationExtensionAvailable()

IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable ( void )

Definition at line 172 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_init().

◆ IfxCif_Cam_isFrameReceptionComplete()

IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete ( const IfxCif_Cam * cam )

Returns TRUE if JPEG encoding is completed.

Parameters
cam cam handle
Returns
TRUE if one frame reception is completed

Definition at line 580 of file IfxCif_Cam.h.

◆ IfxCif_Cam_isJpegEncodingComplete()

IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete ( const IfxCif_Cam * cam )
Parameters
cam cam handle
Returns
TRUE if JPEG encoding is completed

Definition at line 588 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_getLastJpegEncodingInfo().

◆ IfxCif_Cam_restartCapture()

IFX_EXTERN void IfxCif_Cam_restartCapture | ( | const IfxCif_Cam * | cam,
 |  | uint8 | frames
 | ) |  |

Restart capture by enabling the ISP output.

Parameters
cam | cam handle
frames | Number of acquisitions. Set to zero for continuous acquisition
Returns
None

Definition at line 802 of file IfxCif_Cam.c.

◆ IfxCif_Cam_skipPicture()

IFX_INLINE void IfxCif_Cam_skipPicture ( const IfxCif_Cam * cam )
Parameters
cam cam handle
Returns
None

Definition at line 596 of file IfxCif_Cam.h.

◆ IfxCif_Cam_startCapture()

IFX_EXTERN void IfxCif_Cam_startCapture | ( | const IfxCif_Cam * | cam,
 |  | uint8 | frames
 | ) |  |

Start capture by enabling the ISP output and initialising the MI counter.

Parameters
cam | cam handle
frames | Number of acquisitions. Set to zero for continuous acquisition
Returns
None

Definition at line 811 of file IfxCif_Cam.c.

◆ IfxCif_Cam_stopCapture()

IFX_EXTERN void IfxCif_Cam_stopCapture ( const IfxCif_Cam * cam )

Stop capture by disabling the ISP output.

Parameters
cam cam handle
Returns
None

Definition at line 823 of file IfxCif_Cam.c.

◆ IfxCif_Cam_yuvMemSize()

IFX_INLINE uint32 IfxCif_Cam_yuvMemSize ( const IfxCif_Cam * cam )
Parameters
cam cam handle

Definition at line 178 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initMemSize().


iLLD_TC26B: Camera Structures

Data Structures
Camera Structures
iLLD » CIF » CAM
Collaboration diagram for Camera Structures:

Data Structures

struct | IfxCif_Cam_TableInfo
struct | IfxCif_Cam_JpegTable
Single component JPEG tables. More...
struct | IfxCif_Cam_PictureInfo
Picture info. More...
struct | IfxCif_Cam_JpegTables
JPEG tables for all components. More...
struct | IfxCif_Cam_MemConfig
Single path memory interface configuration (used in initialisation/configuration) More...
struct | IfxCif_Cam_MemInfo
Single path memory interface information (used in Runtime) More...
struct | IfxCif_Cam_Common
Common configuration. More...
struct | IfxCif_Cam_Downscaling
Downscaler configuration. More...
struct | IfxCif_Cam_JfifHeader
JPEG JFIF header structure. More...
struct | IfxCif_Cam_MemAreas
All paths memory partitioning. More...
struct | IfxCif_Cam
Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations. More...
struct | IfxCif_Cam_Config
Camera specific configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxCif_Cam_TableInfo

struct IfxCif_Cam_TableInfo

Definition at line 97 of file IfxCif_Cam.h.

Data Fields
IFX_CONST uint8 * | entry | entry
uint8 | length | length

◆ IfxCif_Cam_JpegTable

struct IfxCif_Cam_JpegTable

Single component JPEG tables.

Definition at line 109 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_JpegTable:
[legend]
Data Fields
IfxCif_Cam_TableInfo | ac | ac
IfxCif_Cam_TableInfo | dc | dc
IfxCif_Cam_TableInfo | q | q

◆ IfxCif_Cam_PictureInfo

struct IfxCif_Cam_PictureInfo

Picture info.

Definition at line 118 of file IfxCif_Cam.h.

Data Fields
uint16 | hOffset | horizontal offset
uint16 | hSize | horizontal (number of pixel)
uint16 | vOffset | vertical offset
uint16 | vSize | vertical (number of lines)

◆ IfxCif_Cam_JpegTables

struct IfxCif_Cam_JpegTables

JPEG tables for all components.

Definition at line 132 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_JpegTables:
[legend]
Data Fields
IfxCif_Cam_JpegTable | uv | uv
IfxCif_Cam_JpegTable | y | y

◆ IfxCif_Cam_MemConfig

struct IfxCif_Cam_MemConfig

Single path memory interface configuration (used in initialisation/configuration)

Definition at line 140 of file IfxCif_Cam.h.

Data Fields
boolean | byteSwap | byte swapping
uint16 | hOffset | horizontal offset
uint16 | hSize | horizontal (number of pixel)
float32 | memFactor | multiples of frame count for memory allocation
uint16 | vOffset | vertical offset
uint16 | vSize | vertical (number of lines)

◆ IfxCif_Cam_MemInfo

struct IfxCif_Cam_MemInfo

Single path memory interface information (used in Runtime)

Definition at line 152 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_MemInfo:
[legend]
Data Fields
IfxCif_Cam_PictureInfo | image | image
uint32 | size | size in bytes
Ifx_AddressValue | start | start address

◆ IfxCif_Cam_Common

struct IfxCif_Cam_Common

Common configuration.

Definition at line 165 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_Common:
[legend]
Data Fields
boolean | debugPathEnabled | debug path enabled
IfxCif_Cam_MemConfig | extraPaths[IFXCIF_EXTRA_PATHS] | extra paths
IfxCif_InputInterface | inputInterface | input interface
IfxCif_Cam_PictureInfo | ispIn | ispIn
Ifx_IsrSetting | ispInterrupt | isp interrupt
boolean | jpegEnabled | jpeg enabled
IFX_CONST IfxCif_Cam_JpegTables * | jpegTables | jpeg tables
IfxCif_Cam_MemConfig | mainPath | main path
boolean | watchdogEnabled | watchdog enabled

◆ IfxCif_Cam_Downscaling

struct IfxCif_Cam_Downscaling

Downscaler configuration.

Definition at line 180 of file IfxCif_Cam.h.

Data Fields
boolean | enabled | enable
uint8 | hFactor | horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors()
IfxCif_LinearDownscalerScalingMode | hMode | hMode
uint8 | sizeFactor | memory size factor, e.g. half in both H and V usually gives factor of 4
uint8 | vFactor | vertical factor to program into IfxCif_setLinearDownscalerScalingFactors()
IfxCif_LinearDownscalerScalingMode | vMode | vMode

◆ IfxCif_Cam_JfifHeader

struct IfxCif_Cam_JfifHeader

JPEG JFIF header structure.

Definition at line 192 of file IfxCif_Cam.h.

Data Fields
uint16 | app0 | app0
uint8 | density | density
uint16 | densityX | densityX
uint16 | densityY | densityY
uint8 | ident[5] | ident
uint16 | length | length
uint8 | thumbData[20] | thumbData
uint8 | thumbX | thumbX
uint8 | thumbY | thumbY
uint16 | unknown | unknown
uint16 | version | version

◆ IfxCif_Cam_MemAreas

struct IfxCif_Cam_MemAreas

All paths memory partitioning.

Definition at line 209 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_MemAreas:
[legend]
Data Fields
IfxCif_Cam_MemInfo | cb | cb
IfxCif_Cam_MemInfo | cr | cr
IfxCif_Cam_MemInfo | ep[IFXCIF_EXTRA_PATHS] | ep
IfxCif_Cam_MemInfo | y | y

◆ IfxCif_Cam

struct IfxCif_Cam

Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations.

Definition at line 224 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam:
[legend]
Data Fields
uint32 | availMemSize | total available RAM space left (in bytes)
Ifx_CIF * | cif | pointer to base address of CIF module SFRs
IfxCif_Cam_Status | configResult | status of last configuration (or initialisation)
Ifx_EMEM * | emem | pointer to base address of EMEM module SFRs
boolean | ispBpp | byte per pixel
IfxCif_Cam_IspMode | ispMode | actual ISP mode
IfxCif_Cam_JfifHeader * | jfif | pointer to the last acquired JPEG header
IfxCif_Cam_MemAreas | memAreas | memory area definition
Ifx_AddressValue | nextFreeAddress | next free storage address
uint32 | totalMemSize | total occupied memory area (in bytes)

◆ IfxCif_Cam_Config

struct IfxCif_Cam_Config

Camera specific configuration.

Definition at line 240 of file IfxCif_Cam.h.

Collaboration diagram for IfxCif_Cam_Config:
[legend]
Data Fields
IFX_CONST IfxCif_Cam_Common * | common | pointer to common configuration
IFX_CONST IfxCif_Cam_Downscaling * | downscaling | downscaling settings for ExtraPath 1
IfxCif_IspSyncPolarity | hSyncPolarity | polarity of HSYNC signal
IfxCif_Cam_IspMode | ispMode | ISP mode.
uint16 | ispRawBpp | bytes per pixel of the input stream
IfxCif_IspSamplingEdge | samplingEdge | sampling edge
uint16 | setupDataCount | number of camera-specific configuration data (in DWORDS)
IFX_CONST uint32 * | setupDataTable | pointer to the first entry of camera-specific configuration data
IfxCif_IspSyncPolarity | vSyncPolarity | polarity of VSYNC signal


iLLD_TC26B: IfxCif_cfg.h File Reference

  • _Impl
Macros
IfxCif_cfg.h File Reference
iLLD » CIF

CIF on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxCif_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCIF_DEBUG __debug()
#define | IFXCIF_EXTRA_PATHS (5)
Number of extra phats. More...
#define | IFXCIF_MAX_I2CNAK (16)
#define | IFXCIF_NUM_MODULES (1)

Detailed Description

CIF on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCif_cfg.h.

Macro Definition Documentation

◆ IFXCIF_DEBUG

#define IFXCIF_DEBUG __debug()

Definition at line 46 of file IfxCif_cfg.h.

Referenced by IfxCif_Cam_getExtraFrameSize(), IfxCif_Cam_initCifExtraPath(), IfxCif_Cam_initCifIspUnit(), IfxCif_Cam_initCifJpegEncoder(), IfxCif_Cam_initCifMemInterface(), IfxCif_Cam_initMemSize(), IfxCif_clearEpError(), IfxCif_clearEpInterrupt(), IfxCif_clearIspError(), IfxCif_clearJpeInterrupt(), IfxCif_clearMiInterrupt(), IfxCif_clearMiStatus(), IfxCif_clearSecurityWatchdogInterrupt(), IfxCif_dpResetCounter(), IfxCif_epForceConfigurationUpdate(), IfxCif_epSkipPicture(), IfxCif_getCurrentIspPictureOffset(), IfxCif_getCurrentIspPictureSize(), IfxCif_getDpControlEnableState(), IfxCif_getDpCounter(), IfxCif_getDpUserDefinedSymbol(), IfxCif_getEpBaseAddress(), IfxCif_getEpBaseInitAddress(), IfxCif_getEpCroppingCameraDisplacement(), IfxCif_getEpCroppingCurrentPictureOffset(), IfxCif_getEpCroppingCurrentPictureSize(), IfxCif_getEpCroppingEnableState(), IfxCif_getEpCroppingMaximumDisplacement(), IfxCif_getEpCroppingOffsetOutputWindow(), IfxCif_getEpCroppingPictureSize(), IfxCif_getEpCroppingRecenterState(), IfxCif_getEpErrorState(), IfxCif_getEpFeatureEnableState(), IfxCif_getEpInitialFillLevelInterruptOffset(), IfxCif_getEpInitialOffsetCounter(), IfxCif_getEpInitSize(), IfxCif_getEpInputEnableState(), IfxCif_getEpInterruptEnableState(), IfxCif_getEpInterruptOffset(), IfxCif_getEpOffsetCounter(), IfxCif_getEpOffsetCounterStart(), IfxCif_getEpOutputEnableState(), IfxCif_getEpRecenterValue(), IfxCif_getEpSize(), IfxCif_getEpWriteFormat(), IfxCif_getHuffmanAcTableLength(), IfxCif_getHuffmanAcTableSelectorState(), IfxCif_getHuffmanDcTableLength(), IfxCif_getHuffmanDcTableSelectorState(), IfxCif_getInternalClockMode(), IfxCif_getIspAcquisitionOffset(), IfxCif_getIspAcquisitionSize(), IfxCif_getIspErrorState(), IfxCif_getIspInputSelectionAppendState(), IfxCif_getIspisCameraDisplacement(), IfxCif_getIspisCurrentPictureOffset(), IfxCif_getIspisCurrentPictureSize(), IfxCif_getIspisMaximumDisplacement(), IfxCif_getIspisOffsetOutputWindow(), IfxCif_getIspisPictureSize(), IfxCif_getIspOutputWindowOffset(), IfxCif_getIspPictureSize(), IfxCif_getJpeDebugSignalState(), IfxCif_getJpegCodecImageSize(), IfxCif_getJpeInterruptEnableState(), IfxCif_getJpeQTableSelector(), IfxCif_getJpeScalingEnableState(), IfxCif_getLinearDownscalerEnableState(), IfxCif_getLinearDownscalerScalingFactor(), IfxCif_getLinearDownscalerScalingMode(), IfxCif_getMainPictureComponentBaseInitAddress(), IfxCif_getMaskedEpInterruptTriggeredState(), IfxCif_getMaskedIspInterruptTriggeredState(), IfxCif_getMaskedJpeInterruptTriggeredState(), IfxCif_getMaskedMiInterruptTriggeredState(), IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(), IfxCif_getMiDataPathInputEnableState(), IfxCif_getMiDataPathOutputEnableState(), IfxCif_getMiFeatureEnableState(), IfxCif_getMiInterruptEnableState(), IfxCif_getMiMainPictureComponentBaseAddress(), IfxCif_getMiMainPictureComponentInitialOffsetCounter(), IfxCif_getMiMainPictureComponentInitSize(), IfxCif_getMiMainPictureComponentOffsetCounter(), IfxCif_getMiMainPictureComponentOffsetCounterStart(), IfxCif_getMiMainPictureComponentSize(), IfxCif_getMiStatusInformation(), IfxCif_getRawEpInterruptTriggeredState(), IfxCif_getRawJpeInterruptTriggeredState(), IfxCif_getRawMiInterruptTriggeredState(), IfxCif_getRawSecurityWatchdogInterruptTriggeredState(), IfxCif_getSecurityWatchdogInterruptEnableState(), IfxCif_getSecurityWatchdogTimeout(), IfxCif_getSoftwareResetMode(), IfxCif_programJpeTable(), IfxCif_resetSecurityWatchdogCounter(), IfxCif_setDpControlEnableState(), IfxCif_setDpCounter(), IfxCif_setDpUserDefinedSymbol(), IfxCif_setEpBaseInitAddress(), IfxCif_setEpCroppingCameraDisplacement(), IfxCif_setEpCroppingEnableState(), IfxCif_setEpCroppingMaximumDisplacement(), IfxCif_setEpCroppingOffsetOutputWindow(), IfxCif_setEpCroppingOffsetsOutputWindow(), IfxCif_setEpCroppingPictureSize(), IfxCif_setEpCroppingPictureSizes(), IfxCif_setEpFeatureEnableState(), IfxCif_setEpInitialFillLevelInterruptOffset(), IfxCif_setEpInitialOffsetCounter(), IfxCif_setEpInitSize(), IfxCif_setEpInterruptEnableState(), IfxCif_setEpInterruptRequestBit(), IfxCif_setEpOffsetCounterStart(), IfxCif_setEpRecenterValue(), IfxCif_setEpWriteFormat(), IfxCif_setHuffmanAcTableLength(), IfxCif_setHuffmanAcTableSelector(), IfxCif_setHuffmanDcTableLength(), IfxCif_setHuffmanDcTableSelector(), IfxCif_setInternalClockMode(), IfxCif_setIspAcquisitionOffset(), IfxCif_setIspAcquisitionSize(), IfxCif_setIspisCameraDisplacement(), IfxCif_setIspisMaximumDisplacement(), IfxCif_setIspisOutputWindowOffset(), IfxCif_setIspisPictureSize(), IfxCif_setIspOutputWindowOffset(), IfxCif_setIspPictureSize(), IfxCif_setJpegCodecImageSize(), IfxCif_setJpeInterruptEnableState(), IfxCif_setJpeInterruptRequestBit(), IfxCif_setJpeQTableSelector(), IfxCif_setJpeScalingEnableState(), IfxCif_setLinearDownscalerEnableState(), IfxCif_setLinearDownscalerScalingFactor(), IfxCif_setLinearDownscalerScalingMode(), IfxCif_setMiFeatureEnableState(), IfxCif_setMiInterruptEnableState(), IfxCif_setMiInterruptRequestBit(), IfxCif_setMiMainPictureComponentBaseInitAddress(), IfxCif_setMiMainPictureComponentInitialOffsetCounter(), IfxCif_setMiMainPictureComponentInitSize(), IfxCif_setSecurityWatchdogInterruptEnableState(), IfxCif_setSecurityWatchdogInterruptRequestBit(), IfxCif_setSecurityWatchdogTimeout(), and IfxCif_setSoftwareResetMode().

◆ IFXCIF_EXTRA_PATHS

#define IFXCIF_EXTRA_PATHS (5)

Number of extra phats.

Definition at line 51 of file IfxCif_cfg.h.

◆ IFXCIF_MAX_I2CNAK

#define IFXCIF_MAX_I2CNAK (16)

Definition at line 54 of file IfxCif_cfg.h.

Referenced by IfxCif_Cam_initCamera().

◆ IFXCIF_NUM_MODULES

#define IFXCIF_NUM_MODULES (1)

Definition at line 57 of file IfxCif_cfg.h.


iLLD_TC26B: IfxCif_PinMap.c File Reference

  • _PinMap
Variables
IfxCif_PinMap.c File Reference
iLLD » CIF

CIF I/O map. More...

#include "IfxCif_PinMap.h"
Include dependency graph for IfxCif_PinMap.c:

Go to the source code of this file.

Variables

IfxCif_Clk_In | IfxCif_CLK_P00_7_IN = {&MODULE_CIF, {&MODULE_P00, 7}}
IfxCif_D_In | IfxCif_D0_P02_0_IN = {&MODULE_CIF, {&MODULE_P02, 0}}
IfxCif_D_In | IfxCif_D10_P00_1_IN = {&MODULE_CIF, {&MODULE_P00, 1}}
IfxCif_D_In | IfxCif_D11_P00_2_IN = {&MODULE_CIF, {&MODULE_P00, 2}}
IfxCif_D_In | IfxCif_D12_P00_3_IN = {&MODULE_CIF, {&MODULE_P00, 3}}
IfxCif_D_In | IfxCif_D13_P00_4_IN = {&MODULE_CIF, {&MODULE_P00, 4}}
IfxCif_D_In | IfxCif_D14_P00_5_IN = {&MODULE_CIF, {&MODULE_P00, 5}}
IfxCif_D_In | IfxCif_D15_P00_6_IN = {&MODULE_CIF, {&MODULE_P00, 6}}
IfxCif_D_In | IfxCif_D1_P02_1_IN = {&MODULE_CIF, {&MODULE_P02, 1}}
IfxCif_D_In | IfxCif_D2_P02_2_IN = {&MODULE_CIF, {&MODULE_P02, 2}}
IfxCif_D_In | IfxCif_D3_P02_3_IN = {&MODULE_CIF, {&MODULE_P02, 3}}
IfxCif_D_In | IfxCif_D4_P02_4_IN = {&MODULE_CIF, {&MODULE_P02, 4}}
IfxCif_D_In | IfxCif_D5_P02_5_IN = {&MODULE_CIF, {&MODULE_P02, 5}}
IfxCif_D_In | IfxCif_D6_P02_6_IN = {&MODULE_CIF, {&MODULE_P02, 6}}
IfxCif_D_In | IfxCif_D7_P02_7_IN = {&MODULE_CIF, {&MODULE_P02, 7}}
IfxCif_D_In | IfxCif_D8_P02_8_IN = {&MODULE_CIF, {&MODULE_P02, 8}}
IfxCif_D_In | IfxCif_D9_P00_0_IN = {&MODULE_CIF, {&MODULE_P00, 0}}
IfxCif_Hsnc_In | IfxCif_HSNC_P00_9_IN = {&MODULE_CIF, {&MODULE_P00, 9}}
IfxCif_Vsnc_In | IfxCif_VSNC_P00_8_IN = {&MODULE_CIF, {&MODULE_P00, 8}}

Detailed Description

CIF I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCif_PinMap.c.

Variable Documentation

◆ IfxCif_CLK_P00_7_IN

IfxCif_Clk_In IfxCif_CLK_P00_7_IN = {&MODULE_CIF, {&MODULE_P00, 7}}

Definition at line 28 of file IfxCif_PinMap.c.

◆ IfxCif_D0_P02_0_IN

IfxCif_D_In IfxCif_D0_P02_0_IN = {&MODULE_CIF, {&MODULE_P02, 0}}

Definition at line 29 of file IfxCif_PinMap.c.

◆ IfxCif_D10_P00_1_IN

IfxCif_D_In IfxCif_D10_P00_1_IN = {&MODULE_CIF, {&MODULE_P00, 1}}

Definition at line 30 of file IfxCif_PinMap.c.

◆ IfxCif_D11_P00_2_IN

IfxCif_D_In IfxCif_D11_P00_2_IN = {&MODULE_CIF, {&MODULE_P00, 2}}

Definition at line 31 of file IfxCif_PinMap.c.

◆ IfxCif_D12_P00_3_IN

IfxCif_D_In IfxCif_D12_P00_3_IN = {&MODULE_CIF, {&MODULE_P00, 3}}

Definition at line 32 of file IfxCif_PinMap.c.

◆ IfxCif_D13_P00_4_IN

IfxCif_D_In IfxCif_D13_P00_4_IN = {&MODULE_CIF, {&MODULE_P00, 4}}

Definition at line 33 of file IfxCif_PinMap.c.

◆ IfxCif_D14_P00_5_IN

IfxCif_D_In IfxCif_D14_P00_5_IN = {&MODULE_CIF, {&MODULE_P00, 5}}

Definition at line 34 of file IfxCif_PinMap.c.

◆ IfxCif_D15_P00_6_IN

IfxCif_D_In IfxCif_D15_P00_6_IN = {&MODULE_CIF, {&MODULE_P00, 6}}

Definition at line 35 of file IfxCif_PinMap.c.

◆ IfxCif_D1_P02_1_IN

IfxCif_D_In IfxCif_D1_P02_1_IN = {&MODULE_CIF, {&MODULE_P02, 1}}

Definition at line 36 of file IfxCif_PinMap.c.

◆ IfxCif_D2_P02_2_IN

IfxCif_D_In IfxCif_D2_P02_2_IN = {&MODULE_CIF, {&MODULE_P02, 2}}

Definition at line 37 of file IfxCif_PinMap.c.

◆ IfxCif_D3_P02_3_IN

IfxCif_D_In IfxCif_D3_P02_3_IN = {&MODULE_CIF, {&MODULE_P02, 3}}

Definition at line 38 of file IfxCif_PinMap.c.

◆ IfxCif_D4_P02_4_IN

IfxCif_D_In IfxCif_D4_P02_4_IN = {&MODULE_CIF, {&MODULE_P02, 4}}

Definition at line 39 of file IfxCif_PinMap.c.

◆ IfxCif_D5_P02_5_IN

IfxCif_D_In IfxCif_D5_P02_5_IN = {&MODULE_CIF, {&MODULE_P02, 5}}

Definition at line 40 of file IfxCif_PinMap.c.

◆ IfxCif_D6_P02_6_IN

IfxCif_D_In IfxCif_D6_P02_6_IN = {&MODULE_CIF, {&MODULE_P02, 6}}

Definition at line 41 of file IfxCif_PinMap.c.

◆ IfxCif_D7_P02_7_IN

IfxCif_D_In IfxCif_D7_P02_7_IN = {&MODULE_CIF, {&MODULE_P02, 7}}

Definition at line 42 of file IfxCif_PinMap.c.

◆ IfxCif_D8_P02_8_IN

IfxCif_D_In IfxCif_D8_P02_8_IN = {&MODULE_CIF, {&MODULE_P02, 8}}

Definition at line 43 of file IfxCif_PinMap.c.

◆ IfxCif_D9_P00_0_IN

IfxCif_D_In IfxCif_D9_P00_0_IN = {&MODULE_CIF, {&MODULE_P00, 0}}

Definition at line 44 of file IfxCif_PinMap.c.

◆ IfxCif_HSNC_P00_9_IN

IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN = {&MODULE_CIF, {&MODULE_P00, 9}}

Definition at line 45 of file IfxCif_PinMap.c.

◆ IfxCif_VSNC_P00_8_IN

IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN = {&MODULE_CIF, {&MODULE_P00, 8}}

Definition at line 46 of file IfxCif_PinMap.c.


iLLD_TC26B: IfxCif_PinMap.h File Reference

  • _PinMap
Data Structures | Variables
IfxCif_PinMap.h File Reference
iLLD » CIF

CIF I/O map. More...

#include <IfxCif_reg.h>
#include <_Impl/IfxCif_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxCif_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxCif_Clk_In
CLK pin mapping structure. More...
struct | IfxCif_D_In
D pin mapping structure. More...
struct | IfxCif_Hsnc_In
HSNC pin mapping structure. More...
struct | IfxCif_Vsnc_In
VSNC pin mapping structure. More...

Variables

IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN
CIF_CLK: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN
CIF_D0: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN
CIF_D10: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN
CIF_D11: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN
CIF_D12: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN
CIF_D13: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN
CIF_D14: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN
CIF_D15: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN
CIF_D1: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN
CIF_D2: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN
CIF_D3: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN
CIF_D4: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN
CIF_D5: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN
CIF_D6: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN
CIF_D7: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN
CIF_D8: CIF input. More...
IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN
CIF_D9: CIF input. More...
IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN
CIF_HSNC: CIF input. More...
IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN
CIF_VSNC: CIF input. More...

Detailed Description

CIF I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCif_PinMap.h.


iLLD_TC26B: IfxCif_Cam.h File Reference

  • Cif
  • Cam
Data Structures | Macros | Enumerations | Functions
IfxCif_Cam.h File Reference
iLLD » CIF

CIF CAM details. More...

#include "Cif/Std/IfxCif.h"
#include "_PinMap/IfxCif_PinMap.h"
#include "Emem/Std/IfxEmem.h"
#include "I2c/I2c/IfxI2c_I2c.h"
#include "string.h"
Include dependency graph for IfxCif_Cam.h:

Go to the source code of this file.

Data Structures

struct | IfxCif_Cam_TableInfo
struct | IfxCif_Cam_JpegTable
Single component JPEG tables. More...
struct | IfxCif_Cam_PictureInfo
Picture info. More...
struct | IfxCif_Cam_JpegTables
JPEG tables for all components. More...
struct | IfxCif_Cam_MemConfig
Single path memory interface configuration (used in initialisation/configuration) More...
struct | IfxCif_Cam_MemInfo
Single path memory interface information (used in Runtime) More...
struct | IfxCif_Cam_Common
Common configuration. More...
struct | IfxCif_Cam_Downscaling
Downscaler configuration. More...
struct | IfxCif_Cam_JfifHeader
JPEG JFIF header structure. More...
struct | IfxCif_Cam_MemAreas
All paths memory partitioning. More...
struct | IfxCif_Cam
Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations. More...
struct | IfxCif_Cam_Config
Camera specific configuration. More...

Macros

#define | IFXCIF_CAM_MEM_ALIGN_SIZE (64)
#define | IFXCIF_CAM_MEM_GAPSIZE 0x0

Enumerations

enum IfxCif_Cam_IspMode {
IfxCif_Cam_IspMode_undefined = -1,
IfxCif_Cam_IspMode_raw = 0,
IfxCif_Cam_IspMode_yuvInterleaved = 1,
IfxCif_Cam_IspMode_yuvPlanar = 2
}
CIF ISP mode. More...
enum IfxCif_Cam_State {
IfxCif_Cam_State_stopped = 0,
IfxCif_Cam_State_running = 1
}
Driver acquisition state. More...
enum IfxCif_Cam_Status {
IfxCif_Cam_Status_ok = 0,
IfxCif_Cam_Status_notEnoughMemory = 1,
IfxCif_Cam_Status_cameraCommError = 2,
IfxCif_Cam_Status_notAvailable = 3
}
Driver status. More...

Functions

IFX_INLINE void | IfxCif_Cam_clearFrameReceptionFlag (const IfxCif_Cam *cam)
Clear the frame reception flag. More...
IFX_INLINE void | IfxCif_Cam_clearJpegEncodingCompleteFlag (const IfxCif_Cam *cam)
Clear the JPEG encoder completed flag. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getBbbAddress (const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
Convert the CPU address into BBB address. More...
IFX_INLINE uint32 | IfxCif_Cam_getExtraFrameSize (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the size (in bytes) of one last acquired extra-path image data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getExtraPathMemInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
IFX_INLINE uint32 | IfxCif_Cam_getFrameSize (const IfxCif_Cam *cam)
Returns the size (in bytes) of last acquired main-path image data. More...
IFX_INLINE uint32 | IfxCif_Cam_getJpegEncodedSize (const IfxCif_Cam *cam)
Returns the size (in bytes) of last encoded main-path image data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getLastExtraAddress (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the address location of last acquired extra-path image frame data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getLastExtraCaptureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getLastFrameAddress (const IfxCif_Cam *cam)
Returns the address location of last acquired main-path image frame data. More...
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * | IfxCif_Cam_getLastFrameCaptureInfo (const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getNextFrameAddress (const IfxCif_Cam *cam)
Returns the address location of next acquired main-path image frame data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_getNextJpegFrameAddress (IfxCif_Cam *cam)
Returns the address location of next acquired JPEG image frame data. More...
IFX_INLINE Ifx_AddressValue | IfxCif_Cam_incrementAddress (const IfxCif_Cam *cam, Ifx_AddressValue address)
Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size. More...
IFX_INLINE boolean | IfxCif_Cam_isFrameReceptionComplete (const IfxCif_Cam *cam)
Returns TRUE if JPEG encoding is completed. More...
IFX_INLINE boolean | IfxCif_Cam_isJpegEncodingComplete (const IfxCif_Cam *cam)
IFX_INLINE void | IfxCif_Cam_skipPicture (const IfxCif_Cam *cam)
IFX_EXTERN void | IfxCif_Cam_clearAllFlags (const IfxCif_Cam *cam)
Clear all CIF module notification flags. More...
IFX_EXTERN void | IfxCif_Cam_disableJpegEncoder (const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path. More...
IFX_EXTERN void | IfxCif_Cam_enableJpegEncoder (const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly. More...
IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo * | IfxCif_Cam_getExtraPathPictureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path. More...
IFX_EXTERN boolean | IfxCif_Cam_getLastJpegEncodingInfo (IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process. More...
IFX_EXTERN IfxCif_Cam_Status | IfxCif_Cam_init (IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself. More...
IFX_EXTERN void | IfxCif_Cam_restartCapture (const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output. More...
IFX_EXTERN void | IfxCif_Cam_startCapture (const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter. More...
IFX_EXTERN void | IfxCif_Cam_stopCapture (const IfxCif_Cam *cam)
Stop capture by disabling the ISP output. More...

Detailed Description

CIF CAM details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCif_Cam.h.

Macro Definition Documentation

◆ IFXCIF_CAM_MEM_ALIGN_SIZE

#define IFXCIF_CAM_MEM_ALIGN_SIZE (64)

Definition at line 51 of file IfxCif_Cam.h.

◆ IFXCIF_CAM_MEM_GAPSIZE

#define IFXCIF_CAM_MEM_GAPSIZE 0x0

Definition at line 53 of file IfxCif_Cam.h.

Referenced by IfxCif_Cam_initMemSize().


iLLD_TC26B: IfxCif.h File Reference

  • Cif
  • Std
Enumerations | Functions
IfxCif.h File Reference
iLLD » CIF

CIF basic functionality. More...

#include "_Impl/IfxCif_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxCif_bf.h"
#include "IfxCif_reg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxCif.h:

Go to the source code of this file.

Enumerations

enum IfxCif_DataPathSelectorForMainPath {
IfxCif_DataPathSelectorForMainPath_Disabled = 0,
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed = 1,
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder = 2
}
Enumerator for data path of main path. More...
enum IfxCif_ErrorState {
IfxCif_ErrorState_NoError = 0,
IfxCif_ErrorState_Error = 1
}
Enumerator for the state of an error. More...
enum IfxCif_ExtraPath {
IfxCif_ExtraPath_1 = 0,
IfxCif_ExtraPath_2 = 1,
IfxCif_ExtraPath_3 = 2,
IfxCif_ExtraPath_4 = 3,
IfxCif_ExtraPath_5 = 4
}
Enumerator for the extra paths. More...
enum IfxCif_ImageTiers {
IfxCif_ImageTiers_Horizontal = 0,
IfxCif_ImageTiers_Vertical = 1
}
Enumerator for tiers. More...
enum IfxCif_InputInterface { IfxCif_InputInterface_ParallelInterface = 0 }
Enumerator for input interfaces supported by the CIF interface. More...
enum IfxCif_InterruptTriggeredState {
IfxCif_InterruptTriggeredState_NotTriggered = 0,
IfxCif_InterruptTriggeredState_Triggered = 1
}
Enumerator for the state of an interrupt. More...
enum IfxCif_PortInputSelection {
IfxCif_PortInputSelection_PinMapping0 = 0,
IfxCif_PortInputSelection_PinMapping1 = 1
}
Enumerator for port input selections. More...
enum IfxCif_State {
IfxCif_State_Disabled = 0,
IfxCif_State_Enabled = 1
}
Enumerator for states. More...
enum IfxCif_Submodules {
IfxCif_Submodules_AllModules = 0,
IfxCif_Submodules_Debug = 1,
IfxCif_Submodules_ExtraPaths = 2,
IfxCif_Submodules_LinearDownscaler = 3,
IfxCif_Submodules_SecurityWatchdog = 4,
IfxCif_Submodules_MemoryInterface = 5,
IfxCif_Submodules_JpegEncoder = 6,
IfxCif_Submodules_ImageSignalProcessing = 7,
IfxCif_Submodules_YCSplitter = 8
}
Enumerator for submodules of the CIF interface. More...
enum IfxCif_YCSplitterChannelMode {
IfxCif_YCSplitterChannelMode_Disabled = 0,
IfxCif_YCSplitterChannelMode_MainPathAndRawMode = 1
}
Enumerator for channel mode of Y/C splitter. More...
enum IfxCif_IspCcirSequence {
IfxCif_IspCcirSequence_YCbYCr = 0,
IfxCif_IspCcirSequence_YCrYCb = 1,
IfxCif_IspCcirSequence_CbYCrY = 2
}
Enumerator for the ISP CCIR sequence. More...
enum IfxCif_IspColorSpaceMatrixCrominanceClippingRange {
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 = 0,
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 = 1
}
Enumerator for the clipping range of the crominance for the ISP output. More...
enum IfxCif_IspColorSpaceMatrixLuminanceClippingRange {
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 = 0,
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 = 1
}
Enumerator for the clipping range of the luminance for the ISP output. More...
enum IfxCif_IspErrorSources {
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule = 0,
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule = 1,
IfxCif_IspErrorSources_SizeErrorInInformSubmodule = 2
}
Enumerator for error sources of the ISP module. More...
enum IfxCif_IspFieldSelection {
IfxCif_IspFieldSelection_AllFields = 0,
IfxCif_IspFieldSelection_OnlyEvenFields = 1,
IfxCif_IspFieldSelection_OnlyOddFields = 2
}
Enumerator for the sampled input fields. More...
enum IfxCif_IspInformFieldInformation {
IfxCif_IspInformFieldInformation_Odd = 0,
IfxCif_IspInformFieldInformation_Even = 1
}
Enumerator for current field information. More...
enum IfxCif_IspInputInterface {
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb = 0,
IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros = 1,
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb = 2,
IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros = 3,
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb = 4,
IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros = 5,
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb = 6,
IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros = 7,
IfxCif_IspInputInterface_16BitExternalInterface = 8
}
Enumerator for the supported input interfaces of the ISP. More...
enum IfxCif_IspInterruptSources {
IfxCif_IspInterruptSources_SecurityWatchdogTimeout = 0,
IfxCif_IspInterruptSources_StartEdgeOfHSync = 1,
IfxCif_IspInterruptSources_StartEdgeOfVSync = 2,
IfxCif_IspInterruptSources_SampledInputFrameComplete = 3,
IfxCif_IspInterruptSources_PictureSizeViolationOccurred = 4,
IfxCif_IspInterruptSources_LossOfData = 5,
IfxCif_IspInterruptSources_FrameCompletelyPutOut = 6,
IfxCif_IspInterruptSources_IspTurnedOff = 7
}
Enumerator for interrupt sources of the ISP submodule. More...
enum IfxCif_IspMode {
IfxCif_IspMode_RawPicture = 0,
IfxCif_IspMode_ItuRBT656 = 1,
IfxCif_IspMode_ItuRBT601 = 2,
IfxCif_IspMode_DataMode = 4,
IfxCif_IspMode_RawPictureWithItuRBT656Sync = 6
}
Enumerator for the ISP mode. More...
enum IfxCif_IspSamplingEdge {
IfxCif_IspSamplingEdge_NegativeEdge = 0,
IfxCif_IspSamplingEdge_PositiveEdge = 1
}
Enumerator for ISP sampling edge. More...
enum IfxCif_IspSyncPolarity {
IfxCif_IspSyncPolarity_HighActive = 0,
IfxCif_IspSyncPolarity_LowActive = 1
}
enum IfxCif_LinearDownscalerScalingMode {
IfxCif_LinearDownscalerScalingMode_SingleSkip = 0,
IfxCif_LinearDownscalerScalingMode_DoubleSkip = 1,
IfxCif_LinearDownscalerScalingMode_SinglePass = 2,
IfxCif_LinearDownscalerScalingMode_DoublePass = 3,
IfxCif_LinearDownscalerScalingMode_Disabled = -1
}
Enumerator for scaling mode of linear downscaler. More...
enum IfxCif_MiBurstLength {
IfxCif_MiBurstLength_4BeatBursts = 0,
IfxCif_MiBurstLength_8BeatBursts = 1
}
Enumerator for burst length affecting the write port of the memory interface. More...
enum IfxCif_MiDataPaths {
IfxCif_MiDataPaths_RawData = 0,
IfxCif_MiDataPaths_JpegData = 1,
IfxCif_MiDataPaths_MainPictureData = 2
}
Enumerator for data paths of the memory interface. More...
enum IfxCif_MiInterruptSources {
IfxCif_MiInterruptSources_BusError = 0,
IfxCif_MiInterruptSources_WrapMainPictureCr = 1,
IfxCif_MiInterruptSources_WrapMainPictureCb = 2,
IfxCif_MiInterruptSources_WrapMainPictureY = 3,
IfxCif_MiInterruptSources_FillMainPictureY = 4,
IfxCif_MiInterruptSources_MacroBlockLine = 5,
IfxCif_MiInterruptSources_MainPictureFrameEnd = 6
}
Enumerator for interrupt sources of the memory interface submodule. More...
enum IfxCif_MiMainPicturePathComponents {
IfxCif_MiMainPicturePathComponents_Y = 0,
IfxCif_MiMainPicturePathComponents_Cb = 1,
IfxCif_MiMainPicturePathComponents_Cr = 2
}
Enumerator for main picture path components of the memory interface. More...
enum IfxCif_MiMainPictureWriteFormat {
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit = 0,
IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit = 1,
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit = 2
}
Enumerator for write formats of data written into memory. More...
enum IfxCif_MiStatusClearSources {
IfxCif_MiStatusClearSources_ExtraPath5FifoFull = 0,
IfxCif_MiStatusClearSources_ExtraPath4FifoFull = 1,
IfxCif_MiStatusClearSources_ExtraPath3FifoFull = 2,
IfxCif_MiStatusClearSources_ExtraPath2FifoFull = 3,
IfxCif_MiStatusClearSources_ExtraPath1FifoFull = 4,
IfxCif_MiStatusClearSources_BusWriteError = 5,
IfxCif_MiStatusClearSources_MainPictureCrFifoFull = 6,
IfxCif_MiStatusClearSources_MainPictureCbFifoFull = 7,
IfxCif_MiStatusClearSources_MainPictureYFifoFull = 8
}
Enumerator for status clear sources of the memory interface module. More...
enum IfxCif_MiStatusInformationSources {
IfxCif_MiStatusInformationSources_BusWriteError = 0,
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull = 1,
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull = 2,
IfxCif_MiStatusInformationSources_MainPictureYFifoFull = 3
}
Enumerator for status information sources of the memory interface submodule. More...
enum IfxCif_HuffmanTableComponents {
IfxCif_HuffmanTableComponents_Component0 = 0,
IfxCif_HuffmanTableComponents_Component1 = 1,
IfxCif_HuffmanTableComponents_Component2 = 2
}
Enumerator for the Huffman Table components. More...
enum IfxCif_HuffmanTables {
IfxCif_HuffmanTables_Table0 = 0,
IfxCif_HuffmanTables_Table1 = 1
}
Enumerator for the Huffman Tables. More...
enum IfxCif_JpeDebugSignalSources {
IfxCif_JpeDebugSignalSources_BadTableAccess = 0,
IfxCif_JpeDebugSignalSources_VlcTableBusy = 1,
IfxCif_JpeDebugSignalSources_R2BMemoryFull = 2,
IfxCif_JpeDebugSignalSources_VlcEncodeBusy = 3,
IfxCif_JpeDebugSignalSources_QiqTableAccess = 4
}
Enumerator for the debug signal sources. More...
enum IfxCif_JpeDebugSignalState {
IfxCif_JpeDebugSignalState_Inactive = 0,
IfxCif_JpeDebugSignalState_Active = 1
}
Enumerator for the debug signal state. More...
enum IfxCif_JpeHeaderGenerationMode {
IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage = 0,
IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes = 1
}
Enumerator for the header generation debug control. More...
enum IfxCif_JpeHeaderMode {
IfxCif_JpeHeaderMode_NoAppnHeader = 0,
IfxCif_JpeHeaderMode_JfifHeader = 2
}
Enumerator for the JPE header mode. More...
enum IfxCif_JpeInterruptSources {
IfxCif_JpeInterruptSources_VlcTableError = 0,
IfxCif_JpeInterruptSources_R2BImageSizeError = 1,
IfxCif_JpeInterruptSources_DcTableError = 2,
IfxCif_JpeInterruptSources_VlcSymbolError = 3,
IfxCif_JpeInterruptSources_HeaderGenerationComplete = 4,
IfxCif_JpeInterruptSources_EncodingComplete = 5
}
Enumerator for interrupt sources of the JPEG encoder module. More...
enum IfxCif_JpeQTableSelector {
IfxCif_JpeQTableSelector_Table0 = 0,
IfxCif_JpeQTableSelector_Table1 = 1,
IfxCif_JpeQTableSelector_Table2 = 2,
IfxCif_JpeQTableSelector_Table3 = 3
}
Enumerator for the Q-Table selector. More...
enum IfxCif_JpeQTableSelectorComponents {
IfxCif_JpeQTableSelectorComponents_Y = 0,
IfxCif_JpeQTableSelectorComponents_U = 1,
IfxCif_JpeQTableSelectorComponents_V = 2
}
Enumerator for the components to select Q-Tables. More...
enum IfxCif_JpeScalingValueSources {
IfxCif_JpeScalingValueSources_Y = 0,
IfxCif_JpeScalingValueSources_CbCr = 1
}
Enumerator for the input scaling values of the JPEG encoder. More...
enum IfxCif_JpeState {
IfxCif_JpeState_Free = 0,
IfxCif_JpeState_Busy = 1
}
Enumerator for the codec state. More...
enum IfxCif_JpeTableId {
IfxCif_JpeTableId_QTable0 = 0,
IfxCif_JpeTableId_QTable1 = 1,
IfxCif_JpeTableId_QTable2 = 2,
IfxCif_JpeTableId_QTable3 = 3,
IfxCif_JpeTableId_VlcDcTable0 = 4,
IfxCif_JpeTableId_VlcAcTable0 = 5,
IfxCif_JpeTableId_VlcDcTable1 = 6,
IfxCif_JpeTableId_VlcAcTable1 = 7
}
Enumerator for the JPE Tables. More...
enum IfxCif_JpegJfifStreamEncoderContinuousMode {
IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd = 0,
IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically = 1,
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically = 3
}
Enumerator for the JFIF stream encoder continuous mode. More...
enum IfxCif_JpegPictureEncodingFormat {
IfxCif_JpegPictureEncodingFormat_422 = 0,
IfxCif_JpegPictureEncodingFormat_400 = 1
}
Enumerator for the picture encoding format. More...
enum IfxCif_SecurityWatchdogCounters {
IfxCif_SecurityWatchdogCounters_Predivider = 0,
IfxCif_SecurityWatchdogCounters_Vertical = 1,
IfxCif_SecurityWatchdogCounters_Horizontal = 2
}
Enumerator for watchdog counters. More...
enum IfxCif_SecurityWatchdogInterruptSources {
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout = 0,
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout = 1,
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout = 2,
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout = 3
}
Enumerator for interrupt sources of the security watchdog submodule. More...
enum IfxCif_SecurityWatchdogTimeoutCounters {
IfxCif_SecurityWatchdogTimeoutCounters_EndStart = 0,
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd = 1
}
Enumerator for watchdog timeout counters. More...
enum IfxCif_EpErrorClearSources {
IfxCif_EpErrorClearSources_ExtraPath5SizeError = 0,
IfxCif_EpErrorClearSources_ExtraPath4SizeError = 1,
IfxCif_EpErrorClearSources_ExtraPath3SizeError = 2,
IfxCif_EpErrorClearSources_ExtraPath2SizeError = 3,
IfxCif_EpErrorClearSources_ExtraPath1SizeError = 4
}
Enumerator for error sources that can be cleared in the extra paths registers. More...
enum IfxCif_EpErrorSources {
IfxCif_EpErrorSources_ExtraPath5FifoFull = 0,
IfxCif_EpErrorSources_ExtraPath4FifoFull = 1,
IfxCif_EpErrorSources_ExtraPath3FifoFull = 2,
IfxCif_EpErrorSources_ExtraPath2FifoFull = 3,
IfxCif_EpErrorSources_ExtraPath1FifoFull = 4,
IfxCif_EpErrorSources_ExtraPath5SizeError = 5,
IfxCif_EpErrorSources_ExtraPath4SizeError = 6,
IfxCif_EpErrorSources_ExtraPath3SizeError = 7,
IfxCif_EpErrorSources_ExtraPath2SizeError = 8,
IfxCif_EpErrorSources_ExtraPath1SizeError = 9
}
Enumerator for error sources of extra paths. More...
enum IfxCif_EpFeatures {
IfxCif_EpFeatures_InitOffsetCounter = 0,
IfxCif_EpFeatures_InitBaseAddress = 1,
IfxCif_EpFeatures_ByteSwap = 2,
IfxCif_EpFeatures_PictureDataPath = 3
}
Enumerator for extra path features. More...
enum IfxCif_EpInterrupts {
IfxCif_EpInterrupts_FrameEnd = IFX_CIF_MIEP_MIS_FRAME_END_EP_1_OFF,
IfxCif_EpInterrupts_FillLevel = IFX_CIF_MIEP_MIS_FILL_EP_1_OFF,
IfxCif_EpInterrupts_WrapAround = IFX_CIF_MIEP_MIS_WRAP_EP_1_OFF,
IfxCif_EpInterrupts_MacroBlockLine = IFX_CIF_MIEP_MIS_MBLK_LINE_EP_1_OFF,
IfxCif_EpInterrupts_Count = 4
}
Enumerator for interrupt sources of the extra paths module. More...
enum IfxCif_EpWriteFormat {
IfxCif_EpWriteFormat_RawAndData = 0,
IfxCif_EpWriteFormat_Raw8Bit = 1,
IfxCif_EpWriteFormat_RawGreater = 2,
IfxCif_EpWriteFormat_YCbCr = 3
}
Enumerator for write formats of extra paths. More...
enum IfxCif_DpControlSources {
IfxCif_DpControlSources_UserDefinedSymbol8 = 0,
IfxCif_DpControlSources_UserDefinedSymbol7 = 1,
IfxCif_DpControlSources_UserDefinedSymbol6 = 2,
IfxCif_DpControlSources_UserDefinedSymbol5 = 3,
IfxCif_DpControlSources_UserDefinedSymbol4 = 4,
IfxCif_DpControlSources_UserDefinedSymbol3 = 5,
IfxCif_DpControlSources_UserDefinedSymbol2 = 6,
IfxCif_DpControlSources_UserDefinedSymbol1 = 7,
IfxCif_DpControlSources_TimestampCounter = 8,
IfxCif_DpControlSources_LineNumberCounter = 9,
IfxCif_DpControlSources_FrameNumberCounter = 10
}
Enumerator for debug path control sources. More...
enum IfxCif_DpCounters {
IfxCif_DpCounters_PredividerCounter = 0,
IfxCif_DpCounters_TimestampCounter = 1,
IfxCif_DpCounters_LineNumberCounter = 2,
IfxCif_DpCounters_FrameNumberCounter = 3
}
Enumerator for debug path counters. More...
enum IfxCif_DpSourcePath {
IfxCif_DpSourcePath_MainPath = 0,
IfxCif_DpSourcePath_ExtraPath1 = 1,
IfxCif_DpSourcePath_ExtraPath2 = 2,
IfxCif_DpSourcePath_ExtraPath4 = 4,
IfxCif_DpSourcePath_ExtraPath5 = 5
}
Enumerator for debug path source paths. More...

Functions

IFX_INLINE void | IfxCif_clearKernelResetState (void)
Function to clear the kernel reset state. More...
IFX_INLINE uint16 | IfxCif_getCifModuleId (void)
Function to query the CIF module ID. More...
IFX_INLINE IfxCif_PortInputSelection | IfxCif_getCifModulePortInputSelection (void)
Function to query the port input selection. More...
IFX_INLINE uint8 | IfxCif_getCifModuleRevision (void)
Function to query the CIF module revision. More...
IFX_INLINE uint8 | IfxCif_getCifModuleType (void)
Function to query the CIF module ID. More...
IFX_INLINE IfxCif_State | IfxCif_getClockControlLogicState (void)
Function to query the clock distribution enabled state. More...
IFX_INLINE IfxCif_DataPathSelectorForMainPath | IfxCif_getDataPathSelectorForMainPath (void)
Function to query the data path for main path. More...
IFX_INLINE IfxCif_InputInterface | IfxCif_getInputInterface (void)
Function to query the input interface of the CIF interface. More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputPortSHSyncState (void)
Function to query the current level of the ISP input port s_hsync (for testing purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getKernelResetStatus (void)
Function to query the kernel reset status. More...
IFX_INLINE uint16 | IfxCif_getModuleNumber (void)
Function to query the module number. More...
IFX_INLINE uint8 | IfxCif_getModuleRevisionNumber (void)
Function to query the revision number of the CIF interface. More...
IFX_INLINE IfxCif_State | IfxCif_getModuleState (void)
Function to query the state of the CIF module. More...
IFX_INLINE uint8 | IfxCif_getModuleType (void)
Function to query the module type. More...
IFX_INLINE IfxCif_YCSplitterChannelMode | IfxCif_getYCSplitterChannelMode (void)
Function to query the Y/C splitter channel mode. More...
IFX_INLINE void | IfxCif_setClockControlLogicState (IfxCif_State clockControlLogicState)
Function to enable or disable the clock distribution to all CIF submodules. More...
IFX_INLINE void | IfxCif_setDataPathSelectorForMainPath (IfxCif_DataPathSelectorForMainPath pathSelector)
Function to set the data path for main path. More...
IFX_INLINE void | IfxCif_setInputInterface (IfxCif_InputInterface interface)
Function to set the input interface of the CIF interface. More...
IFX_INLINE void | IfxCif_setKernelResetRequestState (IfxCif_State state)
Function to request a kernel reset or reset the request bit. More...
IFX_INLINE void | IfxCif_setYCSplitterChannelMode (IfxCif_YCSplitterChannelMode mode)
Function to set the Y/C splitter channel mode. More...
IFX_EXTERN IfxCif_State | IfxCif_getInternalClockMode (IfxCif_Submodules submodule)
Function to query the clock state of a submodule. More...
IFX_EXTERN IfxCif_State | IfxCif_getKernelResetRequestState (void)
Function to query the state of the kernel reset request bit. More...
IFX_EXTERN IfxCif_State | IfxCif_getSoftwareResetMode (IfxCif_Submodules submodule)
Function to query the reset mode of a submodule. More...
IFX_EXTERN void | IfxCif_resetModule (Ifx_CIF_BBB *cifBbb)
resets CIF kernel More...
IFX_EXTERN void | IfxCif_setInternalClockMode (IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule. More...
IFX_EXTERN void | IfxCif_setModuleStateRequest (IfxCif_State state)
Function to request enabling or disabling of the CIF module. More...
IFX_EXTERN void | IfxCif_setSoftwareResetMode (IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule. More...
IFX_INLINE void | IfxCif_generateIspFrameSynchronousConfigUpdateSignal (void)
Function to generate a frame synchronous ISP configuration update signal. More...
IFX_INLINE void | IfxCif_generateIspImmediateConfigUpdateSignal (void)
Function to generate an immediate ISP configuration update signal. More...
IFX_INLINE uint16 | IfxCif_getCurrentIspFrameCount (void)
Function to query the current ISP frame count. More...
IFX_INLINE IfxCif_IspInformFieldInformation | IfxCif_getCurrentIspInformFieldInformation (void)
Function to query the current field information. More...
IFX_INLINE IfxCif_State | IfxCif_getCurrentIspInputFormatterState (void)
Function to query the current state of the ISP formatter. More...
IFX_INLINE IfxCif_IspCcirSequence | IfxCif_getIspCcirSequence (void)
Function to query the currently set CCIR sequence. More...
IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange | IfxCif_getIspColorSpaceMatrixCrominanceClippingRange (void)
Function to query the clipping range of the crominance of the ISP output. More...
IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange | IfxCif_getIspColorSpaceMatrixLuminanceClippingRange (void)
Function to query the clipping range of the luminance of the ISP output. More...
IFX_INLINE IfxCif_State | IfxCif_getIspFieldInvertState (void)
Function to query the state of field ID inversion. More...
IFX_INLINE IfxCif_IspFieldSelection | IfxCif_getIspFieldSelection (void)
Function to query the currently set field sample mode. More...
IFX_INLINE IfxCif_IspSyncPolarity | IfxCif_getIspHSyncPolarity (void)
Function to query the currently set polarity of the HSYNC signal. More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputFormatterState (void)
Function to query the current state of the ISP input formatter. More...
IFX_INLINE IfxCif_IspInputInterface | IfxCif_getIspInputInterface (void)
Function to query the ISP input interface bit width. More...
IFX_INLINE uint16 | IfxCif_getIspInputPortSDataState (void)
Function to query the current value of the ISP input port s_data (for test purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getIspInputPortSVSyncState (void)
Function to query the current level of the ISP input port s_vsync (for test purposes only) More...
IFX_INLINE IfxCif_State | IfxCif_getIspMode (void)
Function to query the currently set ISP mode. More...
IFX_INLINE IfxCif_State | IfxCif_getIspOutputState (void)
Function to query the ISP output state. More...
IFX_INLINE IfxCif_IspSamplingEdge | IfxCif_getIspSamplingEdge (void)
Function to query the currently set ISP sampling edge. More...
IFX_INLINE IfxCif_State | IfxCif_getIspState (void)
Function to query the current state of the ISP. More...
IFX_INLINE IfxCif_IspSyncPolarity | IfxCif_getIspVSyncPolarity (void)
Function to query the currently set polarity of the VSYNC signal. More...
IFX_INLINE uint16 | IfxCif_getNumberOfAcquisitionFrames (void)
Function to query the number of acquisition frames. More...
IFX_INLINE void | IfxCif_setIspAcquisitionOffsets (uint16 hOffset, uint16 vOffset)
Function to set the ISP acquisition offsets. More...
IFX_INLINE void | IfxCif_setIspAcquisitionSizes (uint16 hSize, uint16 vSize)
Function to set the ISP acquisition sizes. More...
IFX_INLINE void | IfxCif_setIspCcirSequence (IfxCif_IspCcirSequence sequence)
Function to set the CCIR sequence. More...
IFX_INLINE void | IfxCif_setIspColorSpaceMatrixCrominanceClippingRange (IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
Function to set the clipping range of the crominance of the ISP output. More...
IFX_INLINE void | IfxCif_setIspColorSpaceMatrixLuminanceClippingRange (IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
Function to set the clipping range of the luminance of the ISP output. More...
IFX_INLINE void | IfxCif_setIspFieldInvertState (IfxCif_State fieldInvertState)
Function to enable or disable inversion of the field ID. More...
IFX_INLINE void | IfxCif_setIspFieldSelection (IfxCif_IspFieldSelection selection)
Function to select fields to sample. More...
IFX_INLINE void | IfxCif_setIspHSyncPolarity (IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the HSYNC signal. More...
IFX_INLINE void | IfxCif_setIspInputFormatterState (IfxCif_State inputFormatterState)
Function to enable or disable the ISP input formatter. More...
IFX_INLINE void | IfxCif_setIspInputInterface (IfxCif_IspInputInterface input)
Function to set the ISP input interface bit width. More...
IFX_INLINE void | IfxCif_setIspMode (IfxCif_IspMode mode)
Function to set the ISP mode. More...
IFX_INLINE void | IfxCif_setIspOutputState (IfxCif_State ispOutputState)
Function to enable or disable the ISP output. More...
IFX_INLINE void | IfxCif_setIspOutputWindowOffsets (uint16 hOffset, uint16 vOffset)
Function to set the ISP output window offsets. More...
IFX_INLINE void | IfxCif_setIspPictureSizes (uint16 hSize, uint16 vSize)
Function to set the ISP picture sizes. More...
IFX_INLINE void | IfxCif_setIspSamplingEdge (IfxCif_IspSamplingEdge edge)
Function to set the ISP sampling edge. More...
IFX_INLINE void | IfxCif_setIspVSyncPolarity (IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the VSYNC signal. More...
IFX_INLINE void | IfxCif_setNumberOfAcquisitionFrames (uint16 numberOfFrames)
Function to set the number of acquisition frames. More...
IFX_EXTERN void | IfxCif_clearIspError (IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source. More...
IFX_EXTERN void | IfxCif_clearIspInterrupt (IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getCurrentIspPictureOffset (IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier. More...
IFX_EXTERN uint16 | IfxCif_getCurrentIspPictureSize (IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspAcquisitionOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspAcquisitionSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getIspErrorState (IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspInputSelectionAppendState (void)
Function to query the append state. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getIspOutputWindowOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspPictureSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setIspAcquisitionOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier. More...
IFX_EXTERN void | IfxCif_setIspAcquisitionSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier. More...
IFX_EXTERN void | IfxCif_setIspInputSelectionAppendState (IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal. More...
IFX_EXTERN void | IfxCif_setIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setIspInterruptRequestBit (IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setIspOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier. More...
IFX_EXTERN void | IfxCif_setIspPictureSize (IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier. More...
IFX_EXTERN IfxCif_State | IfxCif_getLinearDownscalerEnableState (IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier. More...
IFX_EXTERN uint8 | IfxCif_getLinearDownscalerScalingFactor (IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier. More...
IFX_EXTERN IfxCif_LinearDownscalerScalingMode | IfxCif_getLinearDownscalerScalingMode (IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerEnableState (IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingFactor (IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingFactors (uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingMode (IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier. More...
IFX_EXTERN void | IfxCif_setLinearDownscalerScalingModes (IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier. More...
IFX_INLINE void | IfxCif_generateMiImmediateConfigUpdateSignal (void)
Function to generate an immediate configuration update signal for the memory interface submodule. More...
IFX_INLINE IfxCif_State | IfxCif_getBaseAddressInitializationEnableState (void)
Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values. More...
IFX_INLINE uint32 | IfxCif_getMiByteCount (void)
Function to query the number of JPEG or RAW data bytes of the last transmitted frame. More...
IFX_INLINE IfxCif_State | IfxCif_getMiByteSwapEnableState (void)
Function to query the current state of the change of byte order of the 32 bit output word. More...
IFX_INLINE IfxCif_MiBurstLength | IfxCif_getMiChrominanceBurstLength (void)
Function to query the currently set burst length for Cb and Cr data. More...
IFX_INLINE IfxCif_MiBurstLength | IfxCif_getMiLuminanceBurstLength (void)
Function to query the currently set burst length for Y, JPEG, or RAW data. More...
IFX_INLINE IfxCif_MiMainPictureWriteFormat | IfxCif_getMiMainPictureWriteFormat (void)
Function to query the currently set write format of the main picture path of the memory interface. More...
IFX_INLINE uint32 | IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset (void)
Function to query the filling level that triggers an interrupt of main picture path Y component. More...
IFX_INLINE uint32 | IfxCif_getMiMainPictureYInterruptOffset (void)
Function to query the filling level of the main picture Y component that triggers an interrupt. More...
IFX_INLINE IfxCif_State | IfxCif_getMiOffsetCounterInitializationEnableState (void)
Function to query the enabled state of the update signal of the offset counter shadow registers. More...
IFX_INLINE void | IfxCif_miSkipPicture (void)
Function to skip the current or next starting main data path picture. More...
IFX_INLINE void | IfxCif_setMiBaseAddressInitializationEnableState (IfxCif_State state)
Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port) More...
IFX_INLINE void | IfxCif_setMiByteSwapEnableState (IfxCif_State enableState)
Function to enable or disable the change of byte order of the 32 bit output word. More...
IFX_INLINE void | IfxCif_setMiChrominanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Cb and Cr data. More...
IFX_INLINE void | IfxCif_setMiMainPictureWriteFormat (IfxCif_MiMainPictureWriteFormat format)
Function to set the write format of the main picture path of the memory interface. More...
IFX_INLINE void | IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset (uint32 interruptOffset)
Function to set the filling level to trigger an interrupt for main picture path Y component. More...
IFX_INLINE void | IfxCif_setMiOffsetCounterInitializationEnableState (IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port) More...
IFX_EXTERN void | IfxCif_clearMiInterrupt (IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN void | IfxCif_clearMiStatus (IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule. More...
IFX_EXTERN uint32 | IfxCif_getMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiDataPathInputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiDataPathOutputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiFeatureEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path. More...
IFX_EXTERN IfxCif_State | IfxCif_getMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentBaseAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentOffsetCounterStart (IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component. More...
IFX_EXTERN uint32 | IfxCif_getMiMainPictureComponentSize (IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getMiStatusInformation (IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface module. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setMiFeatureEnableState (IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path. More...
IFX_EXTERN void | IfxCif_setMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setMiInterruptRequestBit (IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setMiLuminanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component. More...
IFX_EXTERN void | IfxCif_setMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component. More...
IFX_INLINE IfxCif_JpeHeaderGenerationMode | IfxCif_getJpeHeaderGenerationMode (void)
Function to query the current header generation debug control mode. More...
IFX_INLINE IfxCif_JpeHeaderMode | IfxCif_getJpeHeaderMode (void)
Function to query the currently set JPE header mode. More...
IFX_INLINE IfxCif_State | IfxCif_getJpeMode (void)
Function to query the JPE encode mode. More...
IFX_INLINE uint16 | IfxCif_getJpeRestartInterval (void)
Function to query the current restart interval. More...
IFX_INLINE IfxCif_JpeState | IfxCif_getJpeState (void)
Function to get the current JPEG codec state. More...
IFX_INLINE IfxCif_JpeTableId | IfxCif_getJpeTableId (void)
Function to query the current JPE Table ID. More...
IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode | IfxCif_getJpegJfifStreamEncoderContinuousMode (void)
Function to query the current encoder continuous mode. More...
IFX_INLINE IfxCif_JpegPictureEncodingFormat | IfxCif_getJpegPictureEncodingFormat (void)
Function to query the current picture encoding format. More...
IFX_INLINE void | IfxCif_initJpegEncoder (void)
Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder. More...
IFX_INLINE void | IfxCif_jpeGenerateHeader (void)
Function to start to generate JPEG stream header. Auto reset after one clock cycle. More...
IFX_INLINE void | IfxCif_setJpeHeaderGenerationMode (IfxCif_JpeHeaderGenerationMode headerGenerationMode)
Function to set the header generation debug control mode. More...
IFX_INLINE void | IfxCif_setJpeHeaderMode (IfxCif_JpeHeaderMode headerMode)
Function to set the JPE header mode. More...
IFX_INLINE void | IfxCif_setJpeRestartInterval (uint16 interval)
Function to set the restart interval. More...
IFX_INLINE void | IfxCif_setJpeTableDataLsb (uint8 data)
Function to set the JPE Table LSB. More...
IFX_INLINE void | IfxCif_setJpeTableDataMsb (uint8 data)
Function to set the JPE Table MSB. More...
IFX_INLINE void | IfxCif_setJpeTableId (IfxCif_JpeTableId tableId)
Function to set the JPE Table ID. More...
IFX_INLINE void | IfxCif_setJpegCodecImageSizes (uint16 hSize, uint16 vSize)
Function to set the JPEG codec image sizes. More...
IFX_INLINE void | IfxCif_setJpegJfifStreamEncoderContinuousMode (IfxCif_JpegJfifStreamEncoderContinuousMode mode)
Function to set the stream encoder continuous mode. More...
IFX_INLINE void | IfxCif_setJpegPictureEncodingFormat (IfxCif_JpegPictureEncodingFormat format)
Function to set the picture encoding format. More...
IFX_INLINE void | IfxCif_startJpegJfifStreamEncoder (void)
Function to start JFIF stream encoding. Auto reset after one clock cycle. More...
IFX_EXTERN void | IfxCif_clearJpeInterrupt (IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN uint8 | IfxCif_getHuffmanAcTableLength (IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values. More...
IFX_EXTERN IfxCif_State | IfxCif_getHuffmanAcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values. More...
IFX_EXTERN uint8 | IfxCif_getHuffmanDcTableLength (IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values. More...
IFX_EXTERN IfxCif_State | IfxCif_getHuffmanDcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values. More...
IFX_EXTERN IfxCif_JpeDebugSignalState | IfxCif_getJpeDebugSignalState (IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source. More...
IFX_EXTERN IfxCif_State | IfxCif_getJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN IfxCif_JpeQTableSelector | IfxCif_getJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component. More...
IFX_EXTERN IfxCif_State | IfxCif_getJpeScalingEnableState (IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source. More...
IFX_EXTERN uint16 | IfxCif_getJpegCodecImageSize (IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_programJpeTable (IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
IFX_EXTERN void | IfxCif_setHuffmanAcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values. More...
IFX_EXTERN void | IfxCif_setHuffmanAcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values. More...
IFX_EXTERN void | IfxCif_setHuffmanDcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values. More...
IFX_EXTERN void | IfxCif_setHuffmanDcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values. More...
IFX_EXTERN void | IfxCif_setJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setJpeInterruptRequestBit (IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component. More...
IFX_EXTERN void | IfxCif_setJpeScalingEnableState (IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source. More...
IFX_EXTERN void | IfxCif_setJpegCodecImageSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier. More...
IFX_INLINE uint16 | IfxCif_getSecurityWatchdogCounterPredivider (void)
Function to query the currently set watchdog predivider. More...
IFX_INLINE IfxCif_State | IfxCif_getSecurityWatchdogEnableState (void)
Function to query the enabled state of the watchdog unit. More...
IFX_INLINE void | IfxCif_setSecurityWatchdogCounterPredivider (uint16 predivider)
Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle) More...
IFX_INLINE void | IfxCif_setSecurityWatchdogEnableState (IfxCif_State enableState)
Function to enable or disable the watchdog unit. More...
IFX_EXTERN void | IfxCif_clearSecurityWatchdogInterrupt (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt. More...
IFX_EXTERN IfxCif_State | IfxCif_getSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint16 | IfxCif_getSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier. More...
IFX_EXTERN void | IfxCif_resetSecurityWatchdogCounter (IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter. More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogInterruptRequestBit (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout. More...
IFX_INLINE IfxCif_State | IfxCif_getIspisEnableState (void)
Function to query the enabled state of image stabilization. More...
IFX_INLINE uint8 | IfxCif_getIspisRecenterValue (void)
Function to query the current image stabilization recenter value. More...
IFX_INLINE void | IfxCif_setIspisEnableState (IfxCif_State enableState)
Function to enable or disable image stabilization. More...
IFX_INLINE void | IfxCif_setIspisOutputWindowOffsets (IfxCif_ImageTiers hOffset, uint16 vOffset)
Function to set the image stabilization offsets of the output window. More...
IFX_INLINE void | IfxCif_setIspisPictureSizes (uint16 hSize, uint16 vSize)
Function to set the picture size. More...
IFX_INLINE void | IfxCif_setIspisRecenterValue (uint8 value)
Function to set the image stabilization recenter value. More...
IFX_EXTERN uint16 | IfxCif_getIspisCameraDisplacement (IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisCurrentPictureOffset (IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisCurrentPictureSize (IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisMaximumDisplacement (IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisOffsetOutputWindow (IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier. More...
IFX_EXTERN uint16 | IfxCif_getIspisPictureSize (IfxCif_ImageTiers tier)
Function to query the current picture size for one tier. More...
IFX_EXTERN IfxCif_State | IfxCif_getIspisRecenterEnableState (void)
Function to query the enabled state of image stabilization recenter feature. More...
IFX_EXTERN void | IfxCif_setIspisCameraDisplacement (uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier. More...
IFX_EXTERN void | IfxCif_setIspisMaximumDisplacement (IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier. More...
IFX_EXTERN void | IfxCif_setIspisOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier. More...
IFX_EXTERN void | IfxCif_setIspisPictureSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier. More...
IFX_EXTERN void | IfxCif_clearEpError (IfxCif_EpErrorClearSources source)
Function to clear one extra path error. More...
IFX_EXTERN void | IfxCif_clearEpInterrupt (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt. More...
IFX_EXTERN void | IfxCif_epForceConfigurationUpdate (IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path. More...
IFX_EXTERN void | IfxCif_epSkipPicture (IfxCif_ExtraPath z)
Function to skip one picture of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpBaseAddress (IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpBaseInitAddress (IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCurrentPictureOffset (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingCurrentPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpCroppingEnableState (IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path. More...
IFX_EXTERN uint16 | IfxCif_getEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpCroppingRecenterState (IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path. More...
IFX_EXTERN IfxCif_ErrorState | IfxCif_getEpErrorState (IfxCif_EpErrorSources source)
Function to query the state of an extra path error source. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitSize (IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitialFillLevelInterruptOffset (IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpInitialOffsetCounter (IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpInputEnableState (IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt. More...
IFX_EXTERN uint32 | IfxCif_getEpInterruptOffset (IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpOffsetCounter (IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpOffsetCounterStart (IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path. More...
IFX_EXTERN IfxCif_State | IfxCif_getEpOutputEnableState (IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path. More...
IFX_EXTERN uint8 | IfxCif_getEpRecenterValue (IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path. More...
IFX_EXTERN uint32 | IfxCif_getEpSize (IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path. More...
IFX_EXTERN IfxCif_EpWriteFormat | IfxCif_getEpWriteFormat (IfxCif_ExtraPath z)
Function to query the write format of one extra path. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getMaskedEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt. More...
IFX_EXTERN IfxCif_InterruptTriggeredState | IfxCif_getRawEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt. More...
IFX_EXTERN void | IfxCif_setEpBaseInitAddress (IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingEnableState (IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingOffsetsOutputWindow (IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path. More...
IFX_EXTERN void | IfxCif_setEpCroppingPictureSizes (IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path. More...
IFX_EXTERN void | IfxCif_setEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitSize (IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitialFillLevelInterruptOffset (uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInitialOffsetCounter (IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path. More...
IFX_EXTERN void | IfxCif_setEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
IFX_EXTERN void | IfxCif_setEpInterruptRequestBit (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
IFX_EXTERN void | IfxCif_setEpOffsetCounterStart (uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path. More...
IFX_EXTERN void | IfxCif_setEpRecenterValue (IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter)) More...
IFX_EXTERN void | IfxCif_setEpWriteFormat (IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path. More...
IFX_INLINE IfxCif_State | IfxCif_getDpEnableState (void)
Function to query the debug path enabled state. More...
IFX_INLINE IfxCif_DpSourcePath | IfxCif_getDpSourcePath (void)
Function to query the selected debug path source path. More...
IFX_INLINE void | IfxCif_setDpEnableState (IfxCif_State enableState)
Function to enable or disable the debug path. More...
IFX_INLINE void | IfxCif_setDpSourcePath (IfxCif_DpSourcePath sourcePath)
Function to select one debug path source path. More...
IFX_EXTERN void | IfxCif_dpResetCounter (IfxCif_DpCounters counter)
Function to reset one debug path counter. More...
IFX_EXTERN IfxCif_State | IfxCif_getDpControlEnableState (IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source. More...
IFX_EXTERN uint32 | IfxCif_getDpCounter (IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter. More...
IFX_EXTERN uint16 | IfxCif_getDpUserDefinedSymbol (uint8 x)
Function to query the value of one user defined debug symbol. More...
IFX_EXTERN void | IfxCif_setDpControlEnableState (IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source. More...
IFX_EXTERN void | IfxCif_setDpCounter (IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value. More...
IFX_EXTERN void | IfxCif_setDpUserDefinedSymbol (uint8 x, uint16 value)
Function to set one user defined debug symbol. More...

Detailed Description

CIF basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCif.h.


iLLD_TC26B: CPU

Modules | Files
CPU
iLLD
Collaboration diagram for CPU:

Modules

Implementation
Standard Driver
Core Startup Functions
Interrupt Functions
Trap Functions

Files

file | IfxCpu_cfg.h
CPU on-chip implementation data.
file | IfxCpu.h
CPU basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » CPU
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » CPU
Collaboration diagram for Standard Driver:

Modules

Cpu Core Functions
Interrupt Utility Functions
Cache Management Functions
Performance Counter Functions
Synchronization Functions
Cpu Utility Functions
Enumerations
Data Structures
Intrinsics

Detailed Description


iLLD_TC26B: Cpu Core Functions

Functions
Cpu Core Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cpu Core Functions:

Functions

IFX_INLINE Ifx_CPU * | IfxCpu_getAddress (IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map. More...
IFX_INLINE IfxCpu_Id | IfxCpu_getCoreId (void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no. More...
IFX_INLINE IfxCpu_ResourceCpu | IfxCpu_getCoreIndex (void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed. More...
IFX_INLINE void | IfxCpu_initCSA (uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called. More...
IFX_INLINE void | IfxCpu_setSafetyTaskIdentifier (boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU. More...
IFX_INLINE void | IfxCpu_triggerSwReset (void)
Triggers Software Reset. More...
IFX_EXTERN IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
IFX_EXTERN boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
IFX_EXTERN boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...

Detailed Description

Function Documentation

◆ IfxCpu_getAddress()

IFX_INLINE Ifx_CPU * IfxCpu_getAddress ( IfxCpu_ResourceCpu cpu )

API to get the address for CPU HW module register memory map.

Parameters
cpu Resource index of the CPU
Returns
CPU module register address

Definition at line 724 of file IfxCpu.h.

Referenced by IfxCpu_setProgramCounter().

◆ IfxCpu_getCoreId()

IFX_INLINE IfxCpu_Id IfxCpu_getCoreId ( void )

API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no.

Returns
Resource index of the CPU.

Definition at line 753 of file IfxCpu.h.

Referenced by IfxCpu_Trap_extractTrapInfo(), IfxEth_RxDescr_setBuffer(), IfxEth_setReceiveBuffer1RingMode(), IfxEth_setReceiveBuffer2RingMode(), IfxEth_setTransmitBuffer1RingMode(), IfxEth_setTransmitBuffer2RingMode(), IfxEth_TxDescr_setBuffer(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxCpu_getCoreIndex()

IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex ( void )

API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed.

Returns
Resource index of the CPU.

Definition at line 761 of file IfxCpu.h.

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_getCoreMode(), IfxCpu_setCoreMode(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxCpu_setProgramCounter(), IfxScuWdt_changeCpuWatchdogPassword(), IfxScuWdt_changeCpuWatchdogReload(), IfxScuWdt_clearCpuEndinit(), IfxScuWdt_disableCpuWatchdog(), IfxScuWdt_enableCpuWatchdog(), IfxScuWdt_getCpuWatchdogEndInit(), IfxScuWdt_getCpuWatchdogPassword(), and IfxScuWdt_setCpuEndinit().

◆ IfxCpu_getCoreMode()

IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode ( Ifx_CPU * cpu )

API to get current mode of CPU.

Parameters
cpu Pointer to the CPU HW module (register memory map)
Returns
Current mode of the CPU

Definition at line 57 of file IfxCpu.c.

Referenced by IfxCpu_startCore().

◆ IfxCpu_getIndex()

IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex ( Ifx_CPU * cpu )

API to get current mode of CPU.

Parameters
cpu Pointer to the CPU HW module (register memory map)
Returns
Resource index of the CPU

Definition at line 111 of file IfxCpu.c.

Referenced by IfxCpu_getCoreMode(), and IfxCpu_setCoreMode().

◆ IfxCpu_initCSA()

IFX_INLINE void IfxCpu_initCSA | ( | uint32 * | csaBegin,
 |  | uint32 * | csaEnd
 | ) |  |

API to initialize the context save area of the CPU where this is called.

This API can initialize the CSA of the host CPU where this API is called. This API shall not be used to initialize the CSA of another CPU

Parameters
csaBegin | Pointer to start of context save area
csaEnd | Pointer to end of context save area
Returns
None

Definition at line 839 of file IfxCpu.h.

Referenced by _Core0_start(), and _Core1_start().

◆ IfxCpu_setCoreMode()

IFX_EXTERN boolean IfxCpu_setCoreMode | ( | Ifx_CPU * | cpu,
 |  | IfxCpu_CoreMode | mode
 | ) |  |

API to set mode of the CPU.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
mode | CPU mode to be set by this API
Returns
Success status of the activity (setting the core mode).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed.

Definition at line 206 of file IfxCpu.c.

Referenced by _Core0_start(), and IfxCpu_startCore().

◆ IfxCpu_setProgramCounter()

IFX_EXTERN boolean IfxCpu_setProgramCounter | ( | Ifx_CPU * | cpu,
 |  | uint32 | programCounter
 | ) |  |

API to set the program counter for the CPU specified.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
programCounter | Program counter value to be set
Returns
success status of the activity (setting program counter value).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed

Definition at line 245 of file IfxCpu.c.

Referenced by IfxCpu_startCore().

◆ IfxCpu_setSafetyTaskIdentifier()

IFX_INLINE void IfxCpu_setSafetyTaskIdentifier ( boolean safetyId )

Set/Clear safety task identifier (PSW.S) on current CPU.

Returns
None

Definition at line 978 of file IfxCpu.h.

◆ IfxCpu_startCore()

IFX_EXTERN boolean IfxCpu_startCore | ( | Ifx_CPU * | cpu,
 |  | uint32 | programCounter
 | ) |  |

API to set the program counter for the CPU specified and start the CPU.

Parameters
cpu | Pointer to the CPU HW module (register memory map)
programCounter | Program counter value to start the CPU
Returns
success status of the activity (setting program counter value).
Return values
TRUE | If the activity successfully be performed.
FALSE | If the activity can't be performed

Definition at line 290 of file IfxCpu.c.

Referenced by _Core0_start().

◆ IfxCpu_triggerSwReset()

IFX_INLINE void IfxCpu_triggerSwReset ( void )

Triggers Software Reset.

Returns
None

Definition at line 1026 of file IfxCpu.h.


iLLD_TC26B: Interrupt Utility Functions

Macros | Functions
Interrupt Utility Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Interrupt Utility Functions:

Macros

#define IFX_INTERRUPT(isr, vectabNum, prio)
Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?. More...

Functions

IFX_INLINE boolean | IfxCpu_areInterruptsEnabled (void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called. More...
IFX_INLINE boolean | IfxCpu_disableInterrupts (void)
API to disable global interrupt and return the previous status. More...
IFX_INLINE void | IfxCpu_enableInterrupts (void)
API to enable global interrupt. This API simply enables the global interrupt. More...
IFX_INLINE void | IfxCpu_forceDisableInterrupts (void)
Disable the Global Interrupt. More...
IFX_INLINE void | IfxCpu_restoreInterrupts (boolean enabled)
API to restore global interrupt with that of the passed parameter. More...

Detailed Description

Macro Definition Documentation

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |

Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?.

Parameters
isr | Name of the Isr function.
vectabNum | Vector table number.
prio | Interrupt priority. Refer Usage of Interrupt Macro for more details.

Definition at line 91 of file Compilers.h.

Function Documentation

◆ IfxCpu_areInterruptsEnabled()

IFX_INLINE boolean IfxCpu_areInterruptsEnabled ( void )

API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called.

Returns
Status of global interrupt enable bit.
Return values
TRUE | Global interrupts enabled.
FALSE | Global interrupts disabled

Definition at line 631 of file IfxCpu.h.

Referenced by areInterruptsEnabled(), IfxCpu_disableInterrupts(), and IfxQspi_SpiMaster_write().

◆ IfxCpu_disableInterrupts()

IFX_INLINE boolean IfxCpu_disableInterrupts ( void )

API to disable global interrupt and return the previous status.

This API can be used only to disable the global interrupts of caller CPU. It cannot be used for this activity towards other CPUs

Returns
Previous status of global interrupt enable bit.
Return values
TRUE | Previously, global interrupts enabled.
FALSE | Previously, global interrupts disabled

Definition at line 639 of file IfxCpu.h.

Referenced by disableInterrupts(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), IfxAsclin_Spi_write(), IfxGtm_Tim_In_getDutyPercent(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), and IfxStm_Timer_run().

◆ IfxCpu_enableInterrupts()

IFX_INLINE void IfxCpu_enableInterrupts ( void )

API to enable global interrupt. This API simply enables the global interrupt.

Returns
None

Definition at line 649 of file IfxCpu.h.

Referenced by enableInterrupts().

◆ IfxCpu_forceDisableInterrupts()

IFX_INLINE void IfxCpu_forceDisableInterrupts ( void )

Disable the Global Interrupt.

Returns
None

Definition at line 717 of file IfxCpu.h.

Referenced by forceDisableInterrupts().

◆ IfxCpu_restoreInterrupts()

IFX_INLINE void IfxCpu_restoreInterrupts ( boolean enabled )

API to restore global interrupt with that of the passed parameter.

This API can be used only to disable the global interrupts of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enabled Previous status of the global interrupt enable bit
Returns
None

Definition at line 916 of file IfxCpu.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), IfxAsclin_Spi_write(), IfxGtm_Tim_In_getDutyPercent(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), IfxStm_Timer_run(), and restoreInterrupts().


iLLD_TC26B: Cache Management Functions

Functions
Cache Management Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cache Management Functions:

Functions

IFX_INLINE void | IfxCpu_enableSegmentSpecificDataAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificInstructionAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_invalidateProgramCache (void)
API to invalidate the program cache. More...
IFX_INLINE boolean | IfxCpu_isAddressCachable (void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section. More...
IFX_INLINE void | IfxCpu_setDataCache (boolean enable)
API to enable or bypass the data cache for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_setProgramCache (boolean enable)
API to enable or bypass the program cache for the CPU which calls this API. More...

Detailed Description

Function Documentation

◆ IfxCpu_enableSegmentSpecificDataAccessCacheability()

IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability | ( | uint16 | segmentNumberMask,
 |  | boolean | enable
 | ) |  |

API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before.

Parameters
segmentNumberMask | Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
enable | TRUE: to enable the cacheability for selected segment, FALSE: to disable.
Returns
None

Definition at line 655 of file IfxCpu.h.

◆ IfxCpu_enableSegmentSpecificInstructionAccessCacheability()

IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability | ( | uint16 | segmentNumberMask,
 |  | boolean | enable
 | ) |  |

API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before.

Parameters
segmentNumberMask | Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
enable | TRUE: to enable the cacheability for selected segment, FALSE: to disable.
Returns
None

Definition at line 686 of file IfxCpu.h.

◆ IfxCpu_invalidateProgramCache()

IFX_INLINE void IfxCpu_invalidateProgramCache ( void )

API to invalidate the program cache.

Returns
None

Definition at line 873 of file IfxCpu.h.

◆ IfxCpu_isAddressCachable()

IFX_INLINE boolean IfxCpu_isAddressCachable ( void * address )

API to determine if an address is in a cachable or non-cachable Flash/LMU section.

Parameters
address Address
Returns
Status TRUE/FALSE

Definition at line 887 of file IfxCpu.h.

◆ IfxCpu_setDataCache()

IFX_INLINE void IfxCpu_setDataCache ( boolean enable )

API to enable or bypass the data cache for the CPU which calls this API.

This API can be used only to enable or bypass the data cache of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enable Command to enable or bypass the data cache TRUE: Enable the data cache. FALSE: Bypass the data cache.
Returns
None

Definition at line 925 of file IfxCpu.h.

Referenced by _Core0_start(), and _Core1_start().

◆ IfxCpu_setProgramCache()

IFX_INLINE void IfxCpu_setProgramCache ( boolean enable )

API to enable or bypass the program cache for the CPU which calls this API.

This API can be used only to enable or bypass the program cache of caller CPU. It cannot be used for this activity towards other CPUs

Parameters
enable Command to enable or bypass the program cache. TRUE: Enable the program cache. FALSE: Bypass the program cache
Returns
None

Definition at line 952 of file IfxCpu.h.

Referenced by _Core0_start(), and _Core1_start().


iLLD_TC26B: Performance Counter Functions

Functions
Performance Counter Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Performance Counter Functions:

Functions

IFX_INLINE uint32 | IfxCpu_getClockCounter (void)
API to read the clock counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getClockCounterStickyOverflow (void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getInstructionCounter (void)
API to read the instruction counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getInstructionCounterStickyOverflow (void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getPerformanceCounter (uint16 address)
API to read the performance counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getPerformanceCounterStickyOverflow (uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters. More...
IFX_INLINE void | IfxCpu_resetAndStartCounters (IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters. More...
IFX_INLINE void | IfxCpu_setPerformanceCountersEnableBit (uint32 enable)
API to enable or disable performance counter for the CPU which calls this API. More...
IFX_INLINE IfxCpu_Perf | IfxCpu_stopCounters (void)
Stop instruction and clock counters, return their values. More...
IFX_INLINE void | IfxCpu_updateClockCounter (uint32 count)
API to update clock counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updateInstructionCounter (uint32 count)
API to update Instruction counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updatePerformanceCounter (uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters. More...

Detailed Description

Function Documentation

◆ IfxCpu_getClockCounter()

IFX_INLINE uint32 IfxCpu_getClockCounter ( void )

API to read the clock counter for the CPU which calls this API.

This API can be used to read clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Returns
Counter value. 0 to 0x7FFFFFFF.

Definition at line 741 of file IfxCpu.h.

◆ IfxCpu_getClockCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow ( void )

API to get sticky overflow bit of clock counter for the CPU, which calls this API.

This API can be used to get sticky overflow bit of clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs. This API also clears the sticky overflow after the read. While reading the sticky bit this API disables the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after reading the counter

Returns
Status of sticky overflow bit.
Return values
TRUE | Sticky overflow bit is set.
FALSE | Sticky overflow bit is reset

Definition at line 747 of file IfxCpu.h.

◆ IfxCpu_getInstructionCounter()

IFX_INLINE uint32 IfxCpu_getInstructionCounter ( void )

API to read the instruction counter for the CPU which calls this API.

This API can be used to read instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs

Returns
Counter value. 0 to 0x7FFFFFFF.

Definition at line 769 of file IfxCpu.h.

◆ IfxCpu_getInstructionCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow ( void )

API to get sticky overflow bit of Instruction counter for the CPU, which calls this API.

This API can be used to get sticky overflow bit of Instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs. This API also clears the sticky overflow after the read. While reading the sticky bit this API disables the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after reading the counter

Returns
Status of sticky overflow bit.
Return values
TRUE | Sticky overflow bit is set.
FALSE | Sticky overflow bit is reset

Definition at line 775 of file IfxCpu.h.

◆ IfxCpu_getPerformanceCounter()

IFX_INLINE uint32 IfxCpu_getPerformanceCounter ( uint16 address )

API to read the performance counter for the CPU which calls this API.

Parameters
address Address
Returns
counter value

Definition at line 781 of file IfxCpu.h.

Referenced by IfxCpu_getClockCounter(), and IfxCpu_getInstructionCounter().

◆ IfxCpu_getPerformanceCounterStickyOverflow()

IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow ( uint16 address )

API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters.

Parameters
address Address
Returns
Status

Definition at line 810 of file IfxCpu.h.

Referenced by IfxCpu_getClockCounterStickyOverflow(), and IfxCpu_getInstructionCounterStickyOverflow().

◆ IfxCpu_resetAndStartCounters()

IFX_INLINE void IfxCpu_resetAndStartCounters ( IfxCpu_CounterMode mode )

Reset and start instruction, clock and multi counters.

Reset and start CCNT, ICNT, M1CNT, M2CNT, M3CNT. the overflow bits are cleared.

Parameters
mode Counter mode
Returns
None

Definition at line 894 of file IfxCpu.h.

◆ IfxCpu_setPerformanceCountersEnableBit()

IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit ( uint32 enable )

API to enable or disable performance counter for the CPU which calls this API.

This API can be used to enable or disable performance counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
enable enable Command to enable or disable the performance counter. TRUE: Enable the performance counter. FALSE: Disable the performance counter
Returns
None

Definition at line 943 of file IfxCpu.h.

◆ IfxCpu_stopCounters()

IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters ( void )

Stop instruction and clock counters, return their values.

Stop CCNT, ICNT, M1CNT, M2CNT, M3CNT and return their values; The CCTRL is reset to 0, for more accurate measurements and has to be initialized again before strating the next performance measurement.

Returns
Performance counter result

Definition at line 989 of file IfxCpu.h.

◆ IfxCpu_updateClockCounter()

IFX_INLINE void IfxCpu_updateClockCounter ( uint32 count )

API to update clock counter for the CPU which calls this API.

This API can be used to update clock counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
count Counter value to be updated. 0 to 0x7FFFFFFF
Returns
None

Definition at line 1036 of file IfxCpu.h.

◆ IfxCpu_updateInstructionCounter()

IFX_INLINE void IfxCpu_updateInstructionCounter ( uint32 count )

API to update Instruction counter for the CPU which calls this API.

This API can be used to update Instruction counter of only the caller CPU. It cannot be used for this activity towards other CPUs.

Parameters
count Counter value to be updated. 0 to 0x7FFFFFFF
Returns
None

Definition at line 1042 of file IfxCpu.h.

◆ IfxCpu_updatePerformanceCounter()

IFX_INLINE void IfxCpu_updatePerformanceCounter | ( | uint32 | address,
 |  | uint32 | count
 | ) |  |

API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters.

Parameters
address | Address
count | Count
Returns
None

Definition at line 1048 of file IfxCpu.h.

Referenced by IfxCpu_updateClockCounter(), and IfxCpu_updateInstructionCounter().


iLLD_TC26B: Synchronization Functions

Functions
Synchronization Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Synchronization Functions:

Functions

IFX_EXTERN boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
IFX_EXTERN void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
IFX_EXTERN void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
IFX_EXTERN boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...

Detailed Description

Function Documentation

◆ IfxCpu_acquireMutex()

IFX_EXTERN boolean IfxCpu_acquireMutex ( IfxCpu_mutexLock * lock )

API to acquire the mutex (binary semaphore).

This API can be used to acquire/get the mutex.

Parameters
lock lock pointer
Returns
TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
IfxCpu_mutexLock resourceLock;
boolean flag = IfxCpu_acquireMutex(&resourceLock);
if (flag){
// critical section
IfxCpu_releaseMutex(&resourceLock);
}

Definition at line 36 of file IfxCpu.c.

◆ IfxCpu_releaseMutex()

IFX_EXTERN void IfxCpu_releaseMutex ( IfxCpu_mutexLock * lock )

API to unlock the mutex .

This API can be used to unlock the previously acquired mutex

Parameters
lock lock pointer
Returns
None
IfxCpu_mutexLock resourceLock;
boolean flag = IfxCpu_acquireMutex(&resourceLock);
if (flag){
// critical section
IfxCpu_releaseMutex(&resourceLock);
}

Definition at line 192 of file IfxCpu.c.

◆ IfxCpu_resetSpinLock()

IFX_EXTERN void IfxCpu_resetSpinLock ( IfxCpu_spinLock * lock )

API to unlock the resource .

This API can be used to unlock the previously acquired lock

Parameters
lock lock pointer
Returns
None

Definition at line 199 of file IfxCpu.c.

◆ IfxCpu_setSpinLock()

IFX_EXTERN boolean IfxCpu_setSpinLock | ( | IfxCpu_spinLock * | lock,
 |  | uint32 | timeoutCount
 | ) |  |

API to lock the resource in spin mode with the given timeout.

This API can be used to spin lock for the lock for the given timeout period.

Parameters
lock | lock pointer
timeoutCount | loop counter value used for timeout to acquire lock
Returns
TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
IfxCpu_spinLock resourceLock;
boolean flag = IfxCpu_setSpinLock(&resourceLock, 0xFFFF);
if (flag){
// critical section
IfxCpu_resetSpinLock(&resourceLock);
}

Definition at line 262 of file IfxCpu.c.


iLLD_TC26B: Cpu Utility Functions

Functions
Cpu Utility Functions
iLLD » CPU » Standard Driver
Collaboration diagram for Cpu Utility Functions:

Functions

IFX_EXTERN uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
IFX_EXTERN boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
IFX_EXTERN void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...

Detailed Description

Function Documentation

◆ IfxCpu_emitEvent()

IFX_EXTERN void IfxCpu_emitEvent ( IfxCpu_syncEvent * event )

This function sets a bit corresponding to the core in the event.

Parameters
event Synchronous Event
Returns
None

A coding example can be found in IfxCpu_waitEvent

Definition at line 339 of file IfxCpu.c.

◆ IfxCpu_getRandomValue()

IFX_EXTERN uint32 IfxCpu_getRandomValue ( uint32 * seed )

API to get random value.

Parameters
seed Pointer to seed value
Returns
random value

Definition at line 130 of file IfxCpu.c.

Referenced by IfxCpu_getRandomValueWithinRange().

◆ IfxCpu_getRandomValueWithinRange()

IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange | ( | uint32 * | seed,
 |  | uint32 | min,
 |  | uint32 | max
 | ) |  |

API to get random value with in the range.

Parameters
seed | Pointer to seed value
min | minimum range value
max | maximum range value
Returns
random value

Definition at line 169 of file IfxCpu.c.

◆ IfxCpu_waitEvent()

IFX_EXTERN boolean IfxCpu_waitEvent | ( | IfxCpu_syncEvent * | event,
 |  | uint32 | timeoutMilliSec
 | ) |  |

This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.

e.g:

  1. Check for synchronisation between core 0 and core 5

    define 0x41U

  1. Check for synchronisation between core 0 to core 5

    define 0x5FU

Note: Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro. Core 0: 0 Core 1: 1 Core 2: 2 Core 3: 3 Core 4: 4 Core 5: 6

Parameters
event | Synchronous Event
timeoutMilliSec | timeout in millisec
Returns
Error condition

The functions IfxCpu_waitEvent and IfxCpu_emitEvent are used to achieve synchronisation between all cores (i.e individual cores wait till all cores have reached the synchronisation point). The IfxCpu_waitEvent returns 1 incase a timeout occurs.

// Global variable. preferably located in shared memory.
IfxCpu_syncEvent event;
boolean errorVal;
// Below code should be repeated in Each core
// Upon reaching Synchonisation point
IfxCpu_emitEvent(&event);
errorVal = IfxCpu_waitEvent(&event, timeoutMilliSec); // timeoutMilliSec is timeout value to wait

Definition at line 308 of file IfxCpu.c.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » CPU » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxCpu_CoreMode {
IfxCpu_CoreMode_halt,
IfxCpu_CoreMode_run,
IfxCpu_CoreMode_idle,
IfxCpu_CoreMode_sleep,
IfxCpu_CoreMode_stby,
IfxCpu_CoreMode_unknown
}
Enumeration for the Cpu mode. More...
enum IfxCpu_CounterMode {
IfxCpu_CounterMode_normal = 0,
IfxCpu_CounterMode_task = 1
}
Performance conunter modes. More...

Detailed Description

Enumeration Type Documentation

◆ IfxCpu_CoreMode

enum IfxCpu_CoreMode

Enumeration for the Cpu mode.

Enumerator
IfxCpu_CoreMode_halt
IfxCpu_CoreMode_run
IfxCpu_CoreMode_idle
IfxCpu_CoreMode_sleep
IfxCpu_CoreMode_stby
IfxCpu_CoreMode_unknown

Definition at line 112 of file IfxCpu.h.

◆ IfxCpu_CounterMode

enum IfxCpu_CounterMode

Performance conunter modes.

Enumerator
IfxCpu_CounterMode_normal | Normal counter mode:the counter increments on their respective triggers.
IfxCpu_CounterMode_task | Normal counter mode:additional gating control from the debug unit which allows the data gathered in the performance counters to be filtered by some specific criteria.

Definition at line 124 of file IfxCpu.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » CPU » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxCpu_Counter
counter More...
struct | IfxCpu_Perf
Performance counter result. More...

Detailed Description

Data Structure Documentation

◆ IfxCpu_Counter

struct IfxCpu_Counter

counter

Definition at line 140 of file IfxCpu.h.

Data Fields
uint32 | counter | Counter value.
boolean | overlfow | sticky overlfow

◆ IfxCpu_Perf

struct IfxCpu_Perf

Performance counter result.

Definition at line 152 of file IfxCpu.h.

Collaboration diagram for IfxCpu_Perf:
[legend]
Data Fields
IfxCpu_Counter | clock | CPU clock counter.
IfxCpu_Counter | counter1 | Multi counter 1.
IfxCpu_Counter | counter2 | Multi counter 2.
IfxCpu_Counter | counter3 | Multi counter 3.
IfxCpu_Counter | instruction | Instruction counter.


iLLD_TC26B: Intrinsics

Modules | Files
Intrinsics
iLLD » CPU » Standard Driver
Collaboration diagram for Intrinsics:

Modules

intrinsics for DCC compiler
Intrinsics for GNU compiler
Intrinsics for GNU compiler
Intrinsics for TASKING compiler

Files

file IfxCpu_Intrinsics.h

Detailed Description


iLLD_TC26B: intrinsics for DCC compiler

Modules
intrinsics for DCC compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for intrinsics for DCC compiler:

Modules

Minimum and Maximum of (Short) Integers
Cross type arithmetic operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC26B: Minimum and Maximum of (Short) Integers

Functions
Minimum and Maximum of (Short) Integers
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Minimum and Maximum of (Short) Integers:

Functions

asm volatile void | Ifx__non_return_call (void(*fun)(void))
asm volatile void | Ifx__jump_and_link (void(*fun)(void))

Detailed Description

These intrinsic functions return the minimum or maximum of a signed integer, unsigned integer or short integer.

Function Documentation

◆ Ifx__jump_and_link()

asm volatile void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 49 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__non_return_call()

asm volatile void Ifx__non_return_call ( void(*)(void) fun )

Function call without return

Definition at line 41 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__jumpToFunction().


iLLD_TC26B: Cross type arithmetic operation

Macros | Functions | Variables
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__min __min
#define | Ifx__mins __mins
#define | Ifx__minu __minu
#define | Ifx__max __max
#define | Ifx__maxs __maxs
#define | Ifx__maxu __maxu

Functions

sint32 | __min (sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32 | __mins (sint32, sint32) __attribute__((intrinsic_function(0x10b
uint32 | __minu (uint32, uint32) __attribute__((intrinsic_pseudo(3
sint32 | __max (sint32, sint32) __attribute__((intrinsic_pseudo(3
uint32 | __maxs (uint32, uint32) __attribute__((intrinsic_function(0x10b
uint32 | __maxu (uint32, uint32) __attribute__((intrinsic_pseudo(3

Variables

sint32 min
sint32 min h
uint32 min u
sint32 max

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 110 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__max

#define Ifx__max __max

Definition at line 134 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxs

#define Ifx__maxs __maxs

Definition at line 140 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxu

#define Ifx__maxu __maxu

Definition at line 146 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxX

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 108 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__min

#define Ifx__min __min

Definition at line 116 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mins

#define Ifx__mins __mins

Definition at line 122 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minu

#define Ifx__minu __minu

Definition at line 128 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minX

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 107 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturateX

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 109 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __max()

sint32 __max | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return maximum of two integers

Referenced by Ifx_Fifo_canWriteCount(), Ifx_Shell_process(), IfxQspi_calculateDelayConstants(), and IfxQspi_calculateTimeQuantumLength().

◆ __maxs()

uint32 __maxs | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return maximum of two short integers

◆ __maxu()

uint32 __maxu | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return maximum of two unsigned integers

Referenced by IfxAsclin_setBitTiming(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setSpbFrequency(), and IfxScuCcu_setSriFrequency().

◆ __min()

sint32 __min | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return minimum of two integers

Referenced by Ifx_Console_printAlign(), Ifx_Shell_parseToken(), IfxAsclin_Spi_read(), IfxAsclin_Spi_write(), IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_write(), IfxQspi_SpiSlave_read(), and IfxQspi_SpiSlave_write().

◆ __mins()

sint32 __mins | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return minimum of two short integers

◆ __minu()

uint32 __minu | ( | uint32 | ,
 |  | uint32 |
 | ) |  |

Return minimum of two unsigned integers

Referenced by IfxAsclin_setFilterDepth(), IfxAsclin_setLinResponseTimeoutThreshold(), IfxAsclin_setRxFifoInterruptLevel(), IfxAsclin_setSamplePointPosition(), IfxAsclin_setTxFifoInterruptLevel(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setDeadtime(), IfxVadc_calculateSampleTime(), IfxVadc_initializeFAdcD(), and IfxVadc_initializeFAdcI().

Variable Documentation

◆ h

uint32 max h

Definition at line 120 of file IfxCpu_IntrinsicsDcc.h.

◆ max

sint32 max

Definition at line 132 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_getRandomValueWithinRange().

◆ min

sint32 min

Definition at line 114 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__minb(), Ifx__minbu(), Ifx__minh(), Ifx__minhu(), and IfxCpu_getRandomValueWithinRange().

◆ u

uint32 extr u

Definition at line 126 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxVadc_clearAllResultRequests(), and IfxVadc_setArbiterPriority().


iLLD_TC26B: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__saturate(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 167 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absf

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 161 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__checkrange

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 158 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__checkrangef

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 165 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__geqf

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 174 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__leqf

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 173 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__max_stdreal

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 169 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__maxf

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 163 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__min_stdreal

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 168 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minf

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 162 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__neqf

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 172 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__roundf

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 160 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturate

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minf(__maxf(X, Min), Max) )

Definition at line 154 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturate_stdreal

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 170 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__saturatef

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minf(__maxf(X, Min), Max) )

Definition at line 164 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sqrf

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 156 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sqrtf

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 157 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Fractional Arithmetic Support

Macros | Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define Ifx__fract_to_sfract Ifx__round16

Functions

asm short | Ifx__clssf (sfract a)
asm fract | Ifx__float_to_fract (float a)
asm float | Ifx__fract_to_float (fract a)
Convert fract to float. More...
asm fract | Ifx__getfract (laccum a)
asm sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
asm sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
asm long | Ifx__mulfractfract (fract a, fract b)
asm long | Ifx__mulfractlong (fract a, long b)
asm sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | __float_to_sfract (float a)
asm sfract | Ifx__s16_to_sfract (short a)
asm short | Ifx__sfract_to_s16 (sfract a)
asm volatile uint16 | Ifx__sfract_to_u16 (sfract a)
asm laccum | Ifx__shaaccum (laccum a, sint32 b)
asm fract | Ifx__shafracts (fract a, sint32 b)
asm sfract | Ifx__shasfracts (sfract a, sint32 b)
asm sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract

#define Ifx__fract_to_sfract Ifx__round16

Definition at line 280 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __float_to_sfract().

Function Documentation

◆ __float_to_sfract()

IFX_INLINE sfract __float_to_sfract ( float a )

Convert float to sfract

Definition at line 284 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clssf()

asm short Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 188 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__float_to_fract()

asm fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 198 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __float_to_sfract().

◆ Ifx__fract_to_float()

asm float Ifx__fract_to_float ( fract a )

Convert fract to float.

Definition at line 208 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getfract()

asm fract Ifx__getfract ( laccum a )

Convert __laccum to fract

Definition at line 218 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mac_r_sf()

asm sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 230 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mac_sf()

asm sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 243 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulfractfract()

asm long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 253 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulfractlong()

asm long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 262 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__round16()

asm sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 271 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__s16_to_sfract()

asm sfract Ifx__s16_to_sfract ( short a )

Convert signed short to sfract

Definition at line 292 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sfract_to_s16()

asm short Ifx__sfract_to_s16 ( sfract a )

Convert sfract to signed short

Definition at line 302 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sfract_to_u16()

asm volatile uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 311 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shaaccum()

asm laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an __laccum

Definition at line 321 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shafracts()

asm fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 341 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__shasfracts()

asm sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 354 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__u16_to_sfract()

asm sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 364 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Insert / Extract Bit-fields and Bits

Macros | Functions | Variables
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__extr __extr
#define | Ifx__extru __extru
#define | Ifx__getbit(address, bitoffset) __extru( *(address), bitoffset, 1 )
#define | Ifx__ins __ins
#define | Ifx__insert __insert
#define | Ifx__insn __insn
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)

Functions

sint32 | __extr (sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __extru (uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __ins (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
uint32 | __insert (uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
uint32 | __insn (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
asm volatile void | Ifx__imaskldmst (void *a, sint32 b, sint32 p, const sint32 w)

Variables

sint32 extr
uint32 ins t
uint32 insert

Detailed Description

Macro Definition Documentation

◆ Ifx__extr

#define Ifx__extr __extr

Definition at line 383 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extru

#define Ifx__extru __extru

Definition at line 389 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbit

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | __extru( *(address), bitoffset, 1 )

Load a single bit.

Definition at line 393 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ins

#define Ifx__ins __ins

Definition at line 399 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insert

#define Ifx__insert __insert

Definition at line 406 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insn

#define Ifx__insn __insn

Definition at line 412 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__putbit

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address,value,bitoffset,1)

Store a single bit.

Definition at line 430 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __extr()

sint32 __extr | ( | sint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

◆ __extru()

uint32 __extru | ( | uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Referenced by __addr_to_cx(), and __cx_to_addr().

◆ __ins()

uint32 __ins | ( | uint32 | ,
 |  | const uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Return trg but replace trgbit by srcbit in src.

◆ __insert()

uint32 __insert | ( | uint32 | ,
 |  | uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Extract bit-field (width w bits starting at bit 0) from a and insert it in b at position p.

Referenced by __cx_to_addr().

◆ __insn()

uint32 __insn | ( | uint32 | ,
 |  | const uint32 | ,
 |  | uint32 | ,
 |  | const uint32 |
 | ) |  |

Return trg but replace trgbit by inverse of srcbit in src.

◆ Ifx__imaskldmst()

asm volatile void Ifx__imaskldmst | ( | void * | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Atomic load-modify-store.

Definition at line 419 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_emitEvent().

Variable Documentation

◆ extr

sint32 extr

Definition at line 381 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __initcirc(), Ifx__extractbyte1(), Ifx__extractbyte2(), Ifx__extractbyte3(), Ifx__extractbyte4(), Ifx__extracthw1(), Ifx__extracthw2(), Ifx__extractubyte1(), Ifx__extractubyte2(), Ifx__extractubyte3(), Ifx__extractubyte4(), Ifx__extractuhw1(), Ifx__extractuhw2(), Ifx__getbyte1(), Ifx__getbyte2(), Ifx__getbyte3(), Ifx__getbyte4(), Ifx__gethw1(), Ifx__gethw2(), Ifx__getubyte1(), Ifx__getubyte2(), Ifx__getubyte3(), Ifx__getubyte4(), Ifx__getuhw1(), Ifx__getuhw2(), and Ifx__round16().

◆ insert

uint32 insert

Definition at line 404 of file IfxCpu_IntrinsicsDcc.h.

Referenced by __initcirc(), Ifx__fabs(), Ifx__fabsf(), Ifx__initpackb(), Ifx__initpackhw(), Ifx__initupackb(), Ifx__initupackhw(), Ifx__insertbyte1(), Ifx__insertbyte2(), Ifx__insertbyte3(), Ifx__insertbyte4(), Ifx__inserthw1(), Ifx__inserthw2(), Ifx__insertubyte1(), Ifx__insertubyte2(), Ifx__insertubyte3(), Ifx__insertubyte4(), Ifx__insertuhw1(), Ifx__insertuhw2(), Ifx__setbyte1(), Ifx__setbyte2(), Ifx__setbyte3(), Ifx__setbyte4(), Ifx__sethw1(), Ifx__sethw2(), Ifx__setubyte1(), Ifx__setubyte2(), Ifx__setubyte3(), Ifx__setubyte4(), Ifx__setuhw1(), and Ifx__setuhw2().

◆ t

uint32 insn t

Definition at line 397 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), and IfxGtm_Cmu_setGclkFrequency().


iLLD_TC26B: Interrupt Handling

Macros | Functions | Variables
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__bisr __bisr
#define | Ifx__disable __disable
#define | Ifx__enable __enable
#define | Ifx__restore __restore
#define | Ifx__syscall __syscall

Functions

void | __bisr (const uint32) __attribute__((intrinsic_function(0x100
void | __disable (void) __attribute__((intrinsic_function(0x103
void | __enable (void) __attribute__((intrinsic_function(0x103
void | __restore (sint32) __attribute__((intrinsic_function(0x104
void | __syscall (const uint32) __attribute__((intrinsic_function(0x100

Variables

void | bisr
void | disable
void | enable
void | restore
void | syscall

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__bisr

#define Ifx__bisr __bisr

Definition at line 444 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__disable

#define Ifx__disable __disable

Definition at line 450 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__enable

#define Ifx__enable __enable

Definition at line 462 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__restore

#define Ifx__restore __restore

Definition at line 468 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__syscall

#define Ifx__syscall __syscall

Definition at line 474 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __bisr()

void __bisr ( const uint32 )

Set CPU priority number 0..255 and enable interrupts immediately at function entry

◆ __disable()

void __disable ( void )

Disable interrupts. Only supported for TriCore1

Referenced by IfxCpu_disableInterrupts(), and IfxCpu_forceDisableInterrupts().

◆ __enable()

void __enable ( void )

Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1Enable interrupts immediately at function entry

Referenced by IfxCpu_enableInterrupts(), and IfxCpu_restoreInterrupts().

◆ __restore()

void __restore ( sint32 )

Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1

◆ __syscall()

void __syscall ( const uint32 )

Call a system call function number

Variable Documentation

◆ bisr

void bisr

Definition at line 442 of file IfxCpu_IntrinsicsDcc.h.

◆ disable

void disable

Definition at line 448 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxFlash_disableCorrectableErrorTracking(), IfxFlash_disableUncorrectableErrorTracking(), and IfxVadc_disablePostCalibration().

◆ enable

void enable

Definition at line 460 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxAsclin_enableAutoBaudrateDetection(), IfxAsclin_enableBreakDetectedFlag(), IfxAsclin_enableCollisionDetection(), IfxAsclin_enableCollisionDetectionErrorFlag(), IfxAsclin_enableCts(), IfxAsclin_enableFallingEdgeDetectedFlag(), IfxAsclin_enableFrameErrorFlag(), IfxAsclin_enableHardwareChecksum(), IfxAsclin_enableHeaderTimeoutFlag(), IfxAsclin_enableLinAutoBaudDetectionErrorFlag(), IfxAsclin_enableLinChecksumErrorFlag(), IfxAsclin_enableLinParityErrorFlag(), IfxAsclin_enableLoopBackMode(), IfxAsclin_enableParity(), IfxAsclin_enableParityErrorFlag(), IfxAsclin_enableRaisingEdgeDetectedFlag(), IfxAsclin_enableResponseTimeoutFlag(), IfxAsclin_enableRxFifoFillLevelFlag(), IfxAsclin_enableRxFifoInlet(), IfxAsclin_enableRxFifoOverflowFlag(), IfxAsclin_enableRxFifoUnderflowFlag(), IfxAsclin_enableRxHeaderEndFlag(), IfxAsclin_enableRxResponseEndFlag(), IfxAsclin_enableTransmissionCompletedFlag(), IfxAsclin_enableTxFifoFillLevelFlag(), IfxAsclin_enableTxFifoOutlet(), IfxAsclin_enableTxFifoOverflowFlag(), IfxAsclin_enableTxHeaderEndFlag(), IfxAsclin_enableTxResponseEndFlag(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setProgramCache(), IfxDma_setChannelSuspendEnable(), IfxGpt12_T3_enableOutput(), IfxMtu_enableErrorTracking(), IfxQspi_enableLoopbackMode(), IfxQspi_enablePT1Event(), IfxQspi_enablePT2Event(), and IfxQspi_enableUsrEvent().

◆ restore

void restore

Definition at line 466 of file IfxCpu_IntrinsicsDcc.h.

◆ syscall

void syscall

Definition at line 472 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Miscellaneous Intrinsic Functions

Macros | Functions | Variables
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Macros

#define Ifx__cacheawi __cacheawi

Functions

void | __cacheawi (void *) __attribute__((intrinsic_function(0x110
asm volatile uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
asm volatile void | Ifx__cacheiwi (uint8 *p)
asm circ_t | __initcirc (void *buf, uint16 bufsize, uint16 byteindex)
asm volatile sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
asm volatile uint32 | Ifx__rol (uint32 operand, uint32 count)
asm volatile uint32 | Ifx__ror (uint32 operand, uint32 count)

Variables

void cachea wi

Detailed Description

Macro Definition Documentation

◆ Ifx__cacheawi

#define Ifx__cacheawi __cacheawi

Definition at line 487 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __cacheawi()

void __cacheawi ( void * )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

◆ __initcirc()

asm circ_t __initcirc | ( | void * | buf,
 |  | uint16 | bufsize,
 |  | uint16 | byteindex
 | ) |  |

Initialize a circular pointer with a dynamically allocated buffer at run-time.

Definition at line 511 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cacheawi_bo_post_inc()

asm volatile uint8* Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 492 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cacheiwi()

asm volatile void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 502 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mulsc()

asm volatile sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 525 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__rol()

asm volatile uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 535 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ror()

asm volatile uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 544 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ wi

void cachea wi

Definition at line 485 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Packed Data Type Support:

Functions

asm __packb | Ifx__absb (__packb a)
asm __packhw | Ifx__absh (__packhw a)
asm __packhw | Ifx__abssh (__packhw a)
asm sint8 | Ifx__extractbyte1 (__packb a)
Extract first byte from a __packb. More...
asm sint8 | Ifx__extractbyte2 (__packb a)
Extract second byte from a __packb. More...
asm sint8 | Ifx__extractbyte3 (__packb a)
Extract third byte from a __packb. More...
asm sint8 | Ifx__extractbyte4 (__packb a)
Extract fourth byte from a __packb. More...
asm short | Ifx__extracthw1 (__packhw a)
Extract first short from a __packhw. More...
asm short | Ifx__extracthw2 (__packhw a)
Extract second short from a __packhw. More...
asm volatile uint8 | Ifx__extractubyte1 (__upackb a)
asm volatile uint8 | Ifx__extractubyte2 (__upackb a)
asm volatile uint8 | Ifx__extractubyte3 (__upackb a)
asm volatile uint8 | Ifx__extractubyte4 (__upackb a)
asm volatile uint16 | Ifx__extractuhw1 (__upackhw a)
asm volatile uint16 | Ifx__extractuhw2 (__upackhw a)
asm sint8 | Ifx__getbyte1 (__packb *a)
asm sint8 | Ifx__getbyte2 (__packb *a)
asm sint8 | Ifx__getbyte3 (__packb *a)
asm sint8 | Ifx__getbyte4 (__packb *a)
asm short | Ifx__gethw1 (__packhw *a)
asm short | Ifx__gethw2 (__packhw *a)
asm volatile uint8 | Ifx__getubyte1 (__upackb *a)
asm volatile uint8 | Ifx__getubyte2 (__upackb *a)
asm volatile uint8 | Ifx__getubyte3 (__upackb *a)
asm volatile uint8 | Ifx__getubyte4 (__upackb *a)
asm volatile uint16 | Ifx__getuhw1 (__upackhw *a)
asm volatile uint16 | Ifx__getuhw2 (__upackhw *a)
asm __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
asm __packb | Ifx__initpackbl (long a)
asm __packhw | Ifx__initpackhw (short a, short b)
Initialize __packhw with two integers. More...
asm __packhw | Ifx__initpackhwl (long a)
asm __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
asm __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
asm __packb | Ifx__insertbyte1 (__packb a, sint8 b)
Insert sint8 into first byte of a __packb. More...
asm __packb | Ifx__insertbyte2 (__packb a, sint8 b)
Insert sint8 into second byte of a __packb. More...
asm __packb | Ifx__insertbyte3 (__packb a, sint8 b)
Insert sint8 into third byte of a __packb. More...
asm __packb | Ifx__insertbyte4 (__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb. More...
asm __packhw | Ifx__inserthw1 (__packhw a, short b)
asm __packhw | Ifx__inserthw2 (__packhw a, short b)
asm __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb. More...
asm __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
asm __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
asm __packb | Ifx__minb (__packb a, __packb b)
asm __upackb | Ifx__minbu (__upackb a, __upackb b)
asm __packhw | Ifx__minh (__packhw a, __packhw b)
asm __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
asm volatile void | Ifx__setbyte1 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte2 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte3 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte4 (__packb *a, sint8 b)
asm volatile void | Ifx__sethw1 (__packhw *a, short b)
asm volatile void | Ifx__sethw2 (__packhw *a, short b)
asm volatile void | Ifx__setubyte1 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte2 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte3 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte4 (__upackb *a, uint8 b)
asm volatile void | Ifx__setuhw1 (__upackhw *a, uint16 b)
asm volatile void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__absb()

asm __packb Ifx__absb ( __packb a )

Absolute value of __packb

Definition at line 562 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absh()

asm __packhw Ifx__absh ( __packhw a )

Absolute value of __packhw

Definition at line 571 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__abssh()

asm __packhw Ifx__abssh ( __packhw a )

Absolute value of __packhw using saturation

Definition at line 580 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractbyte1()

asm sint8 Ifx__extractbyte1 ( __packb a )

Extract first byte from a __packb.

Definition at line 589 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractbyte2()

asm sint8 Ifx__extractbyte2 ( __packb a )

Extract second byte from a __packb.

Definition at line 598 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractbyte3()

asm sint8 Ifx__extractbyte3 ( __packb a )

Extract third byte from a __packb.

Definition at line 607 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractbyte4()

asm sint8 Ifx__extractbyte4 ( __packb a )

Extract fourth byte from a __packb.

Definition at line 616 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extracthw1()

asm short Ifx__extracthw1 ( __packhw a )

Extract first short from a __packhw.

Definition at line 625 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extracthw2()

asm short Ifx__extracthw2 ( __packhw a )

Extract second short from a __packhw.

Definition at line 634 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte1()

asm volatile uint8 Ifx__extractubyte1 ( __upackb a )

Extract first unsigned byte from a __packb

Definition at line 643 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte2()

asm volatile uint8 Ifx__extractubyte2 ( __upackb a )

Extract second unsigned byte from a __packb

Definition at line 652 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte3()

asm volatile uint8 Ifx__extractubyte3 ( __upackb a )

Extract third unsigned byte from a __packb

Definition at line 661 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractubyte4()

asm volatile uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth unsigned byte from a __packb

Definition at line 670 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractuhw1()

asm volatile uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 679 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__extractuhw2()

asm volatile uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 688 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte1()

asm sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 697 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte2()

asm sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 707 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte3()

asm sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 717 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getbyte4()

asm sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 727 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__gethw1()

asm short Ifx__gethw1 ( __packhw * a )

Extract first short from a __packhw

Definition at line 737 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__gethw2()

asm short Ifx__gethw2 ( __packhw * a )

Extract second short from a __packhw

Definition at line 747 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte1()

asm volatile uint8 Ifx__getubyte1 ( __upackb * a )

Extract first unsigned byte from a __packb

Definition at line 757 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte2()

asm volatile uint8 Ifx__getubyte2 ( __upackb * a )

Extract second unsigned byte from a __packb

Definition at line 767 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte3()

asm volatile uint8 Ifx__getubyte3 ( __upackb * a )

Extract third unsigned byte from a __packb

Definition at line 777 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getubyte4()

asm volatile uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth unsigned byte from a __packb

Definition at line 787 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getuhw1()

asm volatile uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 797 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getuhw2()

asm volatile uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 807 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackb()

asm __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 817 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackbl()

asm __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 828 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackhw()

asm __packhw Ifx__initpackhw | ( | short | a,
 |  | short | b
 | ) |  |

Initialize __packhw with two integers.

Definition at line 837 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initpackhwl()

asm __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 846 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initupackb()

asm __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 855 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__initupackhw()

asm __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 866 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertbyte1()

asm __packb Ifx__insertbyte1 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb.

Definition at line 875 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertbyte2()

asm __packb Ifx__insertbyte2 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb.

Definition at line 884 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertbyte3()

asm __packb Ifx__insertbyte3 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb.

Definition at line 893 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertbyte4()

asm __packb Ifx__insertbyte4 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb.

Definition at line 902 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__inserthw1()

asm __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | short | b
 | ) |  |

Insert short into first halfword of a __packhw

Definition at line 911 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__inserthw2()

asm __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | short | b
 | ) |  |

Insert short into second halfword of a __packhw

Definition at line 920 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertubyte1()

asm __upackb Ifx__insertubyte1 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first unsigned byte of a __packb.

Definition at line 929 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertubyte2()

asm __upackb Ifx__insertubyte2 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second unsigned byte of a __packb.

Definition at line 938 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertubyte3()

asm __upackb Ifx__insertubyte3 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third unsigned byte of a __packb.

Definition at line 947 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertubyte4()

asm __upackb Ifx__insertubyte4 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth unsigned byte of a __packb.

Definition at line 956 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertuhw1()

asm __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 965 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__insertuhw2()

asm __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 974 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minb()

asm __packb Ifx__minb | ( | __packb | a,
 |  | __packb | b
 | ) |  |

Minimum of two __packb values

Definition at line 986 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minbu()

asm __upackb Ifx__minbu | ( | __upackb | a,
 |  | __upackb | b
 | ) |  |

Minimum of two __upackb values

Definition at line 996 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minh()

asm __packhw Ifx__minh | ( | __packhw | a,
 |  | __packhw | b
 | ) |  |

Minimum of two __packhw values

Definition at line 1005 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__minhu()

asm __upackhw Ifx__minhu | ( | __upackhw | a,
 |  | __upackhw | b
 | ) |  |

Minimum of two __upackhw values

Definition at line 1014 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte1()

asm volatile void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 1023 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte2()

asm volatile void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 1034 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte3()

asm volatile void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 1045 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setbyte4()

asm volatile void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 1056 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sethw1()

asm volatile void Ifx__sethw1 | ( | __packhw * | a,
 |  | short | b
 | ) |  |

Insert short into first halfword of a __packhw

Definition at line 1067 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sethw2()

asm volatile void Ifx__sethw2 | ( | __packhw * | a,
 |  | short | b
 | ) |  |

Insert short into second halfword of a __packhw

Definition at line 1078 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte1()

asm volatile void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 1089 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte2()

asm volatile void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 1100 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte3()

asm volatile void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 1111 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setubyte4()

asm volatile void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 1122 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setuhw1()

asm volatile void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1133 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setuhw2()

asm volatile void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1144 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Register Handling

Macros | Functions | Variables
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Register Handling:

Macros

#define | Ifx__abs __abs
#define | Ifx__absdif __absdif
#define | Ifx__abss __abss
#define | Ifx__clo __clo
#define | Ifx__cls __cls
#define | Ifx__clz __clz
#define | Ifx__mfcr __mfcr
#define | Ifx__mtcr __mtcr

Functions

sint32 | __abs (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __absdif (sint32, sint32) __attribute__((intrinsic_pseudo(1
sint32 | __abss (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clo (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __cls (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clz (sint32) __attribute__((intrinsic_pseudo(1
asm double | Ifx__fabs (double d)
asm float | Ifx__fabsf (float f)
sint32 | __mfcr (const uint32) __attribute__((intrinsic_function(0x101
void | __mtcr (const uint32, sint32) __attribute__((intrinsic_function(0x102
asm volatile sint32 | Ifx__parity (sint32 a)
asm sint8 | Ifx__satb (sint32 a)
asm volatile uint8 | Ifx__satbu (sint32 a)
asm short | Ifx__sath (sint32 a)
asm volatile uint16 | Ifx__sathu (sint32 a)

Variables

sint32 abs
sint32 absdif
sint32 abss
sint32 clo
sint32 cls
sint32 clz
sint32 mfcr
void mtcr

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__abs

#define Ifx__abs __abs

Definition at line 1165 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__absdif

#define Ifx__absdif __absdif

Definition at line 1171 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__abss

#define Ifx__abss __abss

Definition at line 1177 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clo

#define Ifx__clo __clo

Definition at line 1183 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__cls

#define Ifx__cls __cls

Definition at line 1189 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__clz

#define Ifx__clz __clz

Definition at line 1195 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mfcr

#define Ifx__mfcr __mfcr

Definition at line 1219 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mtcr

#define Ifx__mtcr __mtcr

Definition at line 1225 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __abs()

sint32 __abs ( sint32 )

Return absolute value

Referenced by IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), and IfxMultican_Node_setNominalBitTiming().

◆ __absdif()

sint32 __absdif | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

Return absolue difference of two integers

◆ __abss()

sint32 __abss ( sint32 )

Return absolute value with saturation

◆ __clo()

sint32 __clo ( sint32 )

Count leading ones in int

◆ __cls()

sint32 __cls ( sint32 )

Count number of redundant sign bits (all consecutive bits with the same value as bit 31

◆ __clz()

sint32 __clz ( sint32 )

Count leading zeros in int

Referenced by Ifx_FftF32_radix2(), Ifx_FftF32_radix2I(), IfxDma_getCircularRangeCode(), IfxFft_getLengthCode(), IfxSmu_getAlarm(), and IfxStm_Timer_init().

◆ __mfcr()

sint32 __mfcr ( const uint32 )

Move contents of the addressed core SFR into a data register

Referenced by _Core0_start(), _Core1_start(), IfxCpu_areInterruptsEnabled(), IfxCpu_emitEvent(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_getCoreId(), IfxCpu_getCoreIndex(), IfxCpu_getCoreMode(), IfxCpu_getPerformanceCounter(), IfxCpu_getPerformanceCounterStickyOverflow(), IfxCpu_invalidateProgramCache(), IfxCpu_resetAndStartCounters(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setSafetyTaskIdentifier(), IfxCpu_stopCounters(), IfxCpu_updatePerformanceCounter(), and IfxCpu_waitEvent().

◆ __mtcr()

void __mtcr | ( | const uint32 | ,
 |  | sint32 |
 | ) |  |

Move contents of a data register (second sint32) to the addressed core SFR (first sint32)

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_initCSA(), IfxCpu_invalidateProgramCache(), IfxCpu_resetAndStartCounters(), IfxCpu_setDataCache(), IfxCpu_setPerformanceCountersEnableBit(), IfxCpu_setProgramCache(), IfxCpu_setSafetyTaskIdentifier(), and IfxCpu_updatePerformanceCounter().

◆ Ifx__fabs()

asm double Ifx__fabs ( double d )

Return absolute double precision floating-point value

Definition at line 1199 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__fabsf()

asm float Ifx__fabsf ( float f )

Return absolute floating-point value

Definition at line 1208 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__parity()

asm volatile sint32 Ifx__parity ( sint32 a )

Return parity

Definition at line 1229 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__satb()

asm sint8 Ifx__satb ( sint32 a )

Return saturated byte

Definition at line 1238 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__satbu()

asm volatile uint8 Ifx__satbu ( sint32 a )

Return saturated unsigned byte

Definition at line 1247 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sath()

asm short Ifx__sath ( sint32 a )

Return saturated halfword

Definition at line 1256 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__sathu()

asm volatile uint16 Ifx__sathu ( sint32 a )

Return saturated unsignedhalfword

Definition at line 1265 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ abs

sint32 abs

Definition at line 1163 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__absb(), and Ifx__absh().

◆ absdif

sint32 absdif

Definition at line 1169 of file IfxCpu_IntrinsicsDcc.h.

◆ abss

sint32 abss

Definition at line 1175 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__abssh().

◆ clo

sint32 clo

Definition at line 1181 of file IfxCpu_IntrinsicsDcc.h.

◆ cls

sint32 cls

Definition at line 1187 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__clssf().

◆ clz

sint32 clz

Definition at line 1193 of file IfxCpu_IntrinsicsDcc.h.

◆ mfcr

sint32 mfcr

Definition at line 1217 of file IfxCpu_IntrinsicsDcc.h.

◆ mtcr

void mtcr

Definition at line 1223 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__stopPerfCounters().


iLLD_TC26B: Saturation Arithmetic Support

Macros | Functions | Variables
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Saturation Arithmetic Support:

Macros

#define Ifx__adds __adds

Functions

sint32 | __adds (sint32, sint32) __attribute__((intrinsic_pseudo(1
asm volatile uint32 | Ifx__addsu (uint32 a, uint32 b)
asm volatile sint32 | Ifx__subs (sint32 a, sint32 b)
asm volatile uint32 | Ifx__subsu (uint32 a, uint32 b)

Variables

sint32 adds

Detailed Description

These intrinsics support saturation arithmetic

Macro Definition Documentation

◆ Ifx__adds

#define Ifx__adds __adds

Definition at line 1283 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __adds()

sint32 __adds | ( | sint32 | ,
 |  | sint32 |
 | ) |  |

add signed with saturation

◆ Ifx__addsu()

asm volatile uint32 Ifx__addsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

add unsigned with saturation

Definition at line 1287 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__subs()

asm volatile sint32 Ifx__subs | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

substract signed with saturation

Definition at line 1296 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__subsu()

asm volatile uint32 Ifx__subsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

substract unsigned with saturation

Definition at line 1305 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ adds

sint32 adds

Definition at line 1281 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__addsu(), and Ifx__round16().


iLLD_TC26B: Insert Single Assembly Instruction

Macros | Functions | Variables
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » intrinsics for DCC compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__debug __debug
#define | Ifx__dsync __dsync
#define | Ifx__isync __isync
#define | Ifx__mem_barrier __scheduling_barrier
#define | Ifx__nop __nop
#define | Ifx__NOP __nops
#define | Ifx__rslcx
#define | Ifx__svlcx

Functions

void | __debug (void) __attribute__((intrinsic_function(0x103
void | __dsync (void) __attribute__((intrinsic_function(0x103
void | __isync (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
void | __scheduling_barrier (void) __attribute__((intrinsic_function(9
void | __nop (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__nops (uint32 cnt)
asm volatile void | Ifx__nops1000 (uint32 x)
void | __rslcx (void) __attribute__((intrinsic_function(0x103
void | __svlcx (void) __attribute__((intrinsic_function(0x103
asm volatile uint32 | Ifx__swap (void *place, uint32 value)
asm volatile unsigned int | Ifx__cmpAndSwap (unsigned int *address, unsigned long value, unsigned long CmpVal)

Variables

void | debug
void | dsync
void | isync
void | $ $sb
void | nop
void | rslcx
void | svlcx

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__debug

#define Ifx__debug __debug

Definition at line 1326 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__dsync

#define Ifx__dsync __dsync

Definition at line 1332 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__isync

#define Ifx__isync __isync

Definition at line 1338 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __scheduling_barrier

Definition at line 1357 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__nop

#define Ifx__nop __nop

Definition at line 1363 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__NOP

#define Ifx__NOP __nops

Definition at line 1365 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__rslcx

#define Ifx__rslcx

Definition at line 1401 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__svlcx

#define Ifx__svlcx

Definition at line 1407 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ __debug()

void __debug ( void )

Insert DEBUG instruction

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), IfxCcu6_routeInterruptNode(), and IfxFft_Fft_isrInput().

◆ __dsync()

void __dsync ( void )

Insert DSYNC instruction

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_enterPageMode(), IfxFlash_eraseMultiplePhysicalSectors(), IfxFlash_eraseMultipleSectors(), IfxFlash_erasePhysicalSector(), IfxFlash_eraseSector(), IfxFlash_eraseVerifyMultipleSectors(), IfxFlash_eraseVerifySector(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxFlash_suspendResumeMultipleSectors(), IfxFlash_suspendResumeSector(), IfxFlash_waitUnbusy(), IfxFlash_waitUnbusyAll(), IfxFlash_writeBurst(), IfxFlash_writePage(), and IfxFlash_writePageOnce().

◆ __isync()

void __isync ( void )

Insert ISYNC instruction

Referenced by IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), and IfxCpu_setProgramCache().

◆ __nop()

void __nop ( void )

Insert NOP instruction

Referenced by IfxCif_Cam_initEmem(), IfxCpu_disableInterrupts(), IfxCpu_forceDisableInterrupts(), IfxCpu_waitEvent(), IfxEmem_setClockEnableState(), IfxHssl_Hssl_delay(), IfxMtu_clearSram(), IfxMtu_readSramAddress(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_waitForMbistDone(), and IfxMtu_writeSramAddress().

◆ __rslcx()

void __rslcx ( void )

Insert RSLCX instruction

◆ __scheduling_barrier()

void __scheduling_barrier ( void )

◆ __svlcx()

void __svlcx ( void )

Insert SVLCX instruction

◆ Ifx__cmpAndSwap()

asm volatile unsigned int Ifx__cmpAndSwap | ( | unsigned int * | address,
 |  | unsigned long | value,
 |  | unsigned long | CmpVal
 | ) |  |

Definition at line 1424 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__ldmst()

asm volatile void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1345 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__nops()

asm volatile void Ifx__nops ( uint32 cnt )

Insert a loop over n NOP instruction

Definition at line 1369 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__nops1000()

asm volatile void Ifx__nops1000 ( uint32 x )

Insert a loop over n times 1000 NOP instruction

Definition at line 1382 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__swap()

asm volatile uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1414 of file IfxCpu_IntrinsicsDcc.h.

Variable Documentation

◆ $ $sb

void $ $sb

Definition at line 1356 of file IfxCpu_IntrinsicsDcc.h.

◆ debug

void debug

Definition at line 1324 of file IfxCpu_IntrinsicsDcc.h.

◆ dsync

void dsync

Definition at line 1330 of file IfxCpu_IntrinsicsDcc.h.

◆ isync

void isync

Definition at line 1336 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__stopPerfCounters().

◆ nop

void nop

Definition at line 1361 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx__nops(), and Ifx__nops1000().

◆ rslcx

void rslcx

Definition at line 1399 of file IfxCpu_IntrinsicsDcc.h.

◆ svlcx

void svlcx

Definition at line 1405 of file IfxCpu_IntrinsicsDcc.h.


iLLD_TC26B: Intrinsics for GNU compiler

Modules
Intrinsics for GNU compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for GNU compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC26B: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 103 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__maxX

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 101 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__minX

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 100 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturateX

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 102 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Signed integer operation:

Macros

#define Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __min(__max(X, Min), Max) )

Definition at line 110 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minu(__maxu(X, Min), Max) )

Definition at line 117 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 136 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__absf

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 130 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__checkrange

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 127 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__checkrangef

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 134 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__geqf

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 143 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__leqf

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 142 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__max_stdreal

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 138 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__maxf

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 132 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__min_stdreal

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 137 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__minf

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 131 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__neqf

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 141 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__roundf

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 129 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturate_stdreal

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 139 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__saturatef

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(Ifx__maxf(X, Min), Max) )

Definition at line 133 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sqrf

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 125 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sqrtf

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 126 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Fractional Arithmetic Support

Macros | Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define Ifx__fract_to_sfract Ifx__round16

Functions

IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
__asm__ laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract

#define Ifx__fract_to_sfract Ifx__round16

Definition at line 244 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__float_to_sfract().

Function Documentation

◆ Ifx__clssf()

IFX_INLINE sint16 Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 157 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 176 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 248 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__fract_to_float()

IFX_INLINE float Ifx__fract_to_float ( fract a )

Convert fract to float

Definition at line 167 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getfract()

IFX_INLINE fract Ifx__getfract ( laccum a )

Convert laccum to fract

Definition at line 185 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mac_r_sf()

IFX_INLINE sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 194 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mac_sf()

IFX_INLINE sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 205 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulfractfract()

IFX_INLINE long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 216 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulfractlong()

IFX_INLINE long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 225 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__round16()

IFX_INLINE sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 234 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__s16_to_sfract()

IFX_INLINE sfract Ifx__s16_to_sfract ( sint16 a )

Convert signed sint16 to sfract

Definition at line 256 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sfract_to_s16()

IFX_INLINE sint16 Ifx__sfract_to_s16 ( sfract a )

Convert sfract to sint16

Definition at line 266 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sfract_to_u16()

IFX_INLINE uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 276 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shaaccum()

__asm__ laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an __laccum

Definition at line 286 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shafracts()

IFX_INLINE fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 303 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__shasfracts()

IFX_INLINE sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 312 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__u16_to_sfract()

IFX_INLINE sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 323 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Insert / Extract Bit-fields and Bits

Macros | Functions
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)

Functions

IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)

Detailed Description

Macro Definition Documentation

◆ Ifx__getbit

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | ((*(address) & (1U << (bitoffset))) != 0)

Load a single bit.

Definition at line 365 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__imaskldmst

#define Ifx__imaskldmst | ( | address,
 |  | value,
 |  | bitoffset,
 |  | bits
 | ) | __imaskldmst((int *)address, value, bitoffset, bits)

Atomic load-modify-store.

Definition at line 369 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__putbit

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address, value, bitoffset,1)

Store a single bit.

Definition at line 385 of file IfxCpu_IntrinsicsGhs.h.

Function Documentation

◆ Ifx__extr()

IFX_INLINE sint32 Ifx__extr | ( | sint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

Definition at line 340 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extru()

IFX_INLINE uint32 Ifx__extru | ( | uint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Definition at line 352 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insert()

IFX_INLINE sint32 Ifx__insert | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.

Definition at line 373 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Interrupt Handling

Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Interrupt Handling:

The next table provides an overview of the intrinsic functions to read or set interrupt handling.


iLLD_TC26B: Miscellaneous Intrinsic Functions

Functions
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Functions

IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)

Detailed Description

Function Documentation

◆ Ifx__cacheawi()

IFX_INLINE void Ifx__cacheawi ( uint8 * p )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

Definition at line 404 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cacheawi_bo_post_inc()

IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 418 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cacheiwi()

IFX_INLINE void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 410 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mulsc()

IFX_INLINE sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 428 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__rol()

IFX_INLINE uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 439 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__ror()

IFX_INLINE uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 448 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Packed Data Type Support:

Functions

IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__extractbyte1()

IFX_INLINE sint8 Ifx__extractbyte1 ( __packb a )

Extract first byte from a __packb

Definition at line 466 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte2()

IFX_INLINE sint8 Ifx__extractbyte2 ( __packb a )

Extract second byte from a __packb

Definition at line 476 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte3()

IFX_INLINE sint8 Ifx__extractbyte3 ( __packb a )

Extract third byte from a __packb

Definition at line 486 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractbyte4()

IFX_INLINE sint8 Ifx__extractbyte4 ( __packb a )

Extract fourth byte from a __packb

Definition at line 496 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extracthw1()

IFX_INLINE sint16 Ifx__extracthw1 ( __packhw a )

Extract first sint16 from a __packhw

Definition at line 506 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extracthw2()

IFX_INLINE sint16 Ifx__extracthw2 ( __packhw a )

Extract second sint16 from a __packhw

Definition at line 516 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte1()

IFX_INLINE uint8 Ifx__extractubyte1 ( __upackb a )

Extract first uint8 from a __packb

Definition at line 526 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte2()

IFX_INLINE uint8 Ifx__extractubyte2 ( __upackb a )

Extract second uint8 from a __packb

Definition at line 536 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte3()

IFX_INLINE uint8 Ifx__extractubyte3 ( __upackb a )

Extract third uint8 from a __packb

Definition at line 546 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractubyte4()

IFX_INLINE uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth uint8 from a __packb

Definition at line 556 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractuhw1()

IFX_INLINE uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 566 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__extractuhw2()

IFX_INLINE uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 576 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte1()

IFX_INLINE sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 586 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte2()

IFX_INLINE sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 598 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte3()

IFX_INLINE sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 610 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getbyte4()

IFX_INLINE sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 622 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__gethw1()

IFX_INLINE sint16 Ifx__gethw1 ( __packhw * a )

Extract first sint16 from a __packhw

Definition at line 634 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__gethw2()

IFX_INLINE sint16 Ifx__gethw2 ( __packhw * a )

Extract second sint16 from a __packhw

Definition at line 644 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte1()

IFX_INLINE uint8 Ifx__getubyte1 ( __upackb * a )

Extract first uint8 from a __packb

Definition at line 655 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte2()

IFX_INLINE uint8 Ifx__getubyte2 ( __upackb * a )

Extract second uint8 from a __packb

Definition at line 666 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte3()

IFX_INLINE uint8 Ifx__getubyte3 ( __upackb * a )

Extract third uint8 from a __packb

Definition at line 677 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getubyte4()

IFX_INLINE uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth uint8 from a __packb

Definition at line 688 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getuhw1()

IFX_INLINE uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 699 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getuhw2()

IFX_INLINE uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 710 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackb()

IFX_INLINE __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 721 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackbl()

IFX_INLINE __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 733 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackhw()

IFX_INLINE __packhw Ifx__initpackhw | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Initialize __packhw with two integers

Definition at line 740 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initpackhwl()

IFX_INLINE __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 750 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initupackb()

IFX_INLINE __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 757 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__initupackhw()

IFX_INLINE __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 769 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte1()

IFX_INLINE __packb Ifx__insertbyte1 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 779 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte2()

IFX_INLINE __packb Ifx__insertbyte2 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 789 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte3()

IFX_INLINE __packb Ifx__insertbyte3 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 799 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertbyte4()

IFX_INLINE __packb Ifx__insertbyte4 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 809 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__inserthw1()

IFX_INLINE __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 859 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__inserthw2()

IFX_INLINE __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 869 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte1()

IFX_INLINE __upackb Ifx__insertubyte1 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into first uint8 of a __packb

Definition at line 819 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte2()

IFX_INLINE __upackb Ifx__insertubyte2 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into second uint8 of a __packb

Definition at line 829 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte3()

IFX_INLINE __upackb Ifx__insertubyte3 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into third uint8 of a __packb

Definition at line 839 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertubyte4()

IFX_INLINE __upackb Ifx__insertubyte4 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into fourth uint8 of a __packb

Definition at line 849 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertuhw1()

IFX_INLINE __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 879 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__insertuhw2()

IFX_INLINE __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 889 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte1()

IFX_INLINE void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 899 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte2()

IFX_INLINE void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 909 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte3()

IFX_INLINE void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 919 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setbyte4()

IFX_INLINE void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 929 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sethw1()

IFX_INLINE void Ifx__sethw1 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 939 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__sethw2()

IFX_INLINE void Ifx__sethw2 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 949 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte1()

IFX_INLINE void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 959 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte2()

IFX_INLINE void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 969 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte3()

IFX_INLINE void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 979 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setubyte4()

IFX_INLINE void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 989 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setuhw1()

IFX_INLINE void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 999 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setuhw2()

IFX_INLINE void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1009 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Functions

IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__NOP

#define Ifx__NOP ( n ) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Insert n NOP instruction

Definition at line 1055 of file IfxCpu_IntrinsicsGhs.h.

Function Documentation

◆ Ifx__ldmst()

IFX_INLINE void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1029 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Insert a loop over cnt NOP instruction

Definition at line 1037 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__swap()

IFX_INLINE uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1046 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: Intrinsics for GNU compiler

Modules
Intrinsics for GNU compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for GNU compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Minimum and Maximum of (sint16) Integers
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC26B: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 106 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxX

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 104 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minX

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 103 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturateX

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 105 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Signed integer operation:

Macros

#define Ifx__saturate(X, Min, Max) ( Ifx__min(Ifx__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min(Ifx__max(X, Min), Max) )

Definition at line 113 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define Ifx__saturateu(X, Min, Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minu(Ifx__maxu(X, Min), Max) )

Definition at line 120 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Minimum and Maximum of (sint16) Integers

Functions
Minimum and Maximum of (sint16) Integers
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Minimum and Maximum of (sint16) Integers:

Functions

IFX_INLINE sint32 | Ifx__max (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__maxs (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__maxu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__min (sint32 a, sint32 b)
IFX_INLINE sint16 | Ifx__mins (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__minu (uint32 a, uint32 b)

Detailed Description

These intrinsic functions return the minimum or maximum of a sint16, uint16 or sint16

Function Documentation

◆ Ifx__max()

IFX_INLINE sint32 Ifx__max | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return maximum of two integers

Definition at line 131 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxs()

IFX_INLINE sint32 Ifx__maxs | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Return maximum of two sint16

Definition at line 140 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxu()

IFX_INLINE uint32 Ifx__maxu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

Return maximum of two unsigned integers

Definition at line 148 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__min()

IFX_INLINE sint32 Ifx__min | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return minimum of two integers

Definition at line 157 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mins()

IFX_INLINE sint16 Ifx__mins | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Return minimum of two sint16

Definition at line 166 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minu()

IFX_INLINE uint32 Ifx__minu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

Return minimum of two unsigned integers

Definition at line 175 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 200 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__absf

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 194 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__checkrange

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 191 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__checkrangef

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 198 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__geqf

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 207 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__leqf

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 206 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__max_stdreal

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 202 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__maxf

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 196 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__min_stdreal

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 201 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minf

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 195 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__neqf

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 205 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__roundf

#define Ifx__roundf ( X ) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))

Definition at line 193 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturate_stdreal

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 203 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__saturatef

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(Ifx__maxf(X, Min), Max) )

Definition at line 197 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sqrf

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 189 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sqrtf

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 190 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Fractional Arithmetic Support

Functions
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Fractional Arithmetic Support:

Functions

IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__fract_to_sfract (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
IFX_INLINE laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Function Documentation

◆ Ifx__clssf()

IFX_INLINE sint16 Ifx__clssf ( sfract a )

Count the consecutive number of bits that have the same value as bit 15 of an sfract

Definition at line 221 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 240 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 261 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fract_to_float()

IFX_INLINE float Ifx__fract_to_float ( fract a )

Convert fract to float

Definition at line 231 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fract_to_sfract()

IFX_INLINE sfract Ifx__fract_to_sfract ( fract a )

Convert fract to sfract

Definition at line 249 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__getfract()

IFX_INLINE fract Ifx__getfract ( laccum a )

Convert laccum to fract

Definition at line 269 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mac_r_sf()

IFX_INLINE sfract Ifx__mac_r_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add with rounding. Returns the rounded result of ( a + b * c )

Definition at line 278 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mac_sf()

IFX_INLINE sfract Ifx__mac_sf | ( | sfract | a,
 |  | sfract | b,
 |  | sfract | c
 | ) |  |

Multiply-add sfract. Returns ( a + b * c )

Definition at line 289 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulfractfract()

IFX_INLINE long Ifx__mulfractfract | ( | fract | a,
 |  | fract | b
 | ) |  |

Integer part of the multiplication of a fract and a fract

Definition at line 300 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulfractlong()

IFX_INLINE long Ifx__mulfractlong | ( | fract | a,
 |  | long | b
 | ) |  |

Integer part of the multiplication of a fract and a long

Definition at line 309 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__round16()

IFX_INLINE sfract Ifx__round16 ( fract a )

Convert fract to sfract

Definition at line 318 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__s16_to_sfract()

IFX_INLINE sfract Ifx__s16_to_sfract ( sint16 a )

Convert signed sint16 to sfract

Definition at line 331 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sfract_to_s16()

IFX_INLINE sint16 Ifx__sfract_to_s16 ( sfract a )

Convert sfract to sint16

Definition at line 341 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sfract_to_u16()

IFX_INLINE uint16 Ifx__sfract_to_u16 ( sfract a )

Convert sfract to uint16

Definition at line 351 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shaaccum()

IFX_INLINE laccum Ifx__shaaccum | ( | laccum | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an laccum

Definition at line 361 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shafracts()

IFX_INLINE fract Ifx__shafracts | ( | fract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an fract

Definition at line 378 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__shasfracts()

IFX_INLINE sfract Ifx__shasfracts | ( | sfract | a,
 |  | sint32 | b
 | ) |  |

Left/right shift of an sfract

Definition at line 387 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__u16_to_sfract()

IFX_INLINE sfract Ifx__u16_to_sfract ( uint16 a )

Convert uint16 to sfract

Definition at line 396 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Insert / Extract Bit-fields and Bits

Macros | Functions
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)

Functions

IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__ins (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE sint32 | Ifx__insn (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)

Detailed Description

Macro Definition Documentation

◆ Ifx__getbit

#define Ifx__getbit | ( | address,
 |  | bitoffset
 | ) | ((*(address) & (1U << (bitoffset))) != 0)

Load a single bit.

Definition at line 438 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__imaskldmst

#define Ifx__imaskldmst | ( | address,
 |  | value,
 |  | bitoffset,
 |  | bits
 | ) |
Value:
{long long tmp;\
__asm__("imask %A0,%1,%2,%3"\
:"=d"((long long)tmp)\
:"d"(value),"d"(bitoffset),"i"(bits): "memory");\
__asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}

Atomic load-modify-store.

Definition at line 442 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__putbit

#define Ifx__putbit | ( | value,
 |  | address,
 |  | bitoffset
 | ) | Ifx__imaskldmst(address, value, bitoffset,1)

Store a single bit.

Definition at line 481 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__extr()

IFX_INLINE sint32 Ifx__extr | ( | sint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Extract a bit-field (bit pos to bit pos+width) from value

Definition at line 413 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extru()

IFX_INLINE uint32 Ifx__extru | ( | uint32 | a,
 |  | uint32 | p,
 |  | uint32 | w
 | ) |  |

Same as __extr() but return bit-field as unsigned integer

Definition at line 425 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ins()

IFX_INLINE sint32 Ifx__ins | ( | sint32 | trg,
 |  | const sint32 | trgbit,
 |  | sint32 | src,
 |  | const sint32 | srcbit
 | ) |  |

Return trg but replace trgbit by srcbit in src.

Definition at line 451 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insert()

IFX_INLINE sint32 Ifx__insert | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | p,
 |  | const sint32 | w
 | ) |  |

Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.

Definition at line 460 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insn()

IFX_INLINE sint32 Ifx__insn | ( | sint32 | trg,
 |  | const sint32 | trgbit,
 |  | sint32 | src,
 |  | const sint32 | srcbit
 | ) |  |

Return trg but replace trgbit by inverse of srcbit in src.

Definition at line 472 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Interrupt Handling

Macros | Functions
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__disable() __asm__ volatile ("disable" : : : "memory")
#define | Ifx__enable() __asm__ volatile ("enable" : : : "memory")

Functions

IFX_INLINE sint32 | Ifx__disable_and_save (void)
IFX_INLINE void | Ifx__restore (sint32 ie)

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__disable

#define Ifx__disable ( ) __asm__ volatile ("disable" : : : "memory")

Disable interrupts. Only supported for TriCore1

Definition at line 499 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__enable

#define Ifx__enable ( ) __asm__ volatile ("enable" : : : "memory")

Enable interrupts immediately at function entry

Definition at line 512 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__disable_and_save()

IFX_INLINE sint32 Ifx__disable_and_save ( void )

Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1

Definition at line 503 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__restore()

IFX_INLINE void Ifx__restore ( sint32 ie )

Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1

Definition at line 516 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Miscellaneous Intrinsic Functions

Functions
Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:

Functions

IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)

Detailed Description

Function Documentation

◆ Ifx__cacheawi()

IFX_INLINE void Ifx__cacheawi ( uint8 * p )

Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].

Definition at line 537 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cacheawi_bo_post_inc()

IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc ( uint8 * p )

Write back and invalidate cache address "p" and return post incremented value of "p". Generates CACHEA.WI [Ab+].

Definition at line 551 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cacheiwi()

IFX_INLINE void Ifx__cacheiwi ( uint8 * p )

Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].

Definition at line 543 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__mulsc()

IFX_INLINE sint32 Ifx__mulsc | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | offset
 | ) |  |

Multiply two 32-bit numbers to an intermediate 64-bit result, and scale back the result to 32 bits. To scale back the result, 32 bits are extracted from the intermediate 64-bit result: bit 63-offset to bit 31-offset.

Definition at line 561 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__rol()

IFX_INLINE uint32 Ifx__rol | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).

Definition at line 572 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ror()

IFX_INLINE uint32 Ifx__ror | ( | uint32 | operand,
 |  | uint32 | count
 | ) |  |

Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).

Definition at line 581 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Packed Data Type Support

Functions
Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Packed Data Type Support:

Functions

IFX_INLINE __packb | Ifx__absb (__packb a)
IFX_INLINE __packhw | Ifx__absh (__packhw a)
IFX_INLINE __packhw | Ifx__abssh (__packhw a)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE __packb | Ifx__minb (__packb a, __packb b)
IFX_INLINE __upackb | Ifx__minbu (__upackb a, __upackb b)
IFX_INLINE __packhw | Ifx__minh (__packhw a, __packhw b)
IFX_INLINE __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)

Detailed Description

The next table provides an overview of the intrinsic functions for initialization of packed data type.

Function Documentation

◆ Ifx__absb()

IFX_INLINE __packb Ifx__absb ( __packb a )

Absolute value of __packb

Definition at line 599 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__absh()

IFX_INLINE __packhw Ifx__absh ( __packhw a )

Absolute value of __packhw

Definition at line 609 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__abssh()

IFX_INLINE __packhw Ifx__abssh ( __packhw a )

Absolute value of __packhw using saturation

Definition at line 619 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte1()

IFX_INLINE sint8 Ifx__extractbyte1 ( __packb a )

Extract first byte from a __packb

Definition at line 629 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte2()

IFX_INLINE sint8 Ifx__extractbyte2 ( __packb a )

Extract second byte from a __packb

Definition at line 639 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte3()

IFX_INLINE sint8 Ifx__extractbyte3 ( __packb a )

Extract third byte from a __packb

Definition at line 649 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractbyte4()

IFX_INLINE sint8 Ifx__extractbyte4 ( __packb a )

Extract fourth byte from a __packb

Definition at line 659 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extracthw1()

IFX_INLINE sint16 Ifx__extracthw1 ( __packhw a )

Extract first sint16 from a __packhw

Definition at line 669 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extracthw2()

IFX_INLINE sint16 Ifx__extracthw2 ( __packhw a )

Extract second sint16 from a __packhw

Definition at line 679 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte1()

IFX_INLINE uint8 Ifx__extractubyte1 ( __upackb a )

Extract first uint8 from a __packb

Definition at line 689 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte2()

IFX_INLINE uint8 Ifx__extractubyte2 ( __upackb a )

Extract second uint8 from a __packb

Definition at line 699 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte3()

IFX_INLINE uint8 Ifx__extractubyte3 ( __upackb a )

Extract third uint8 from a __packb

Definition at line 709 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractubyte4()

IFX_INLINE uint8 Ifx__extractubyte4 ( __upackb a )

Extract fourth uint8 from a __packb

Definition at line 719 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractuhw1()

IFX_INLINE uint16 Ifx__extractuhw1 ( __upackhw a )

Extract first uint16 from a __packhw

Definition at line 729 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__extractuhw2()

IFX_INLINE uint16 Ifx__extractuhw2 ( __upackhw a )

Extract second uint16 from a __packhw

Definition at line 739 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte1()

IFX_INLINE sint8 Ifx__getbyte1 ( __packb * a )

Extract first byte from a __packb

Definition at line 749 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte2()

IFX_INLINE sint8 Ifx__getbyte2 ( __packb * a )

Extract second byte from a __packb

Definition at line 761 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte3()

IFX_INLINE sint8 Ifx__getbyte3 ( __packb * a )

Extract third byte from a __packb

Definition at line 773 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getbyte4()

IFX_INLINE sint8 Ifx__getbyte4 ( __packb * a )

Extract fourth byte from a __packb

Definition at line 785 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__gethw1()

IFX_INLINE sint16 Ifx__gethw1 ( __packhw * a )

Extract first sint16 from a __packhw

Definition at line 797 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__gethw2()

IFX_INLINE sint16 Ifx__gethw2 ( __packhw * a )

Extract second sint16 from a __packhw

Definition at line 807 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte1()

IFX_INLINE uint8 Ifx__getubyte1 ( __upackb * a )

Extract first uint8 from a __packb

Definition at line 818 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte2()

IFX_INLINE uint8 Ifx__getubyte2 ( __upackb * a )

Extract second uint8 from a __packb

Definition at line 829 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte3()

IFX_INLINE uint8 Ifx__getubyte3 ( __upackb * a )

Extract third uint8 from a __packb

Definition at line 840 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getubyte4()

IFX_INLINE uint8 Ifx__getubyte4 ( __upackb * a )

Extract fourth uint8 from a __packb

Definition at line 851 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getuhw1()

IFX_INLINE uint16 Ifx__getuhw1 ( __upackhw * a )

Extract first uint16 from a __packhw

Definition at line 862 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getuhw2()

IFX_INLINE uint16 Ifx__getuhw2 ( __upackhw * a )

Extract second uint16 from a __packhw

Definition at line 873 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackb()

IFX_INLINE __packb Ifx__initpackb | ( | sint32 | a,
 |  | sint32 | b,
 |  | sint32 | c,
 |  | sint32 | d
 | ) |  |

Initialize __packb with four integers

Definition at line 884 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackbl()

IFX_INLINE __packb Ifx__initpackbl ( long a )

Initialize __packb with a long integer

Definition at line 896 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackhw()

IFX_INLINE __packhw Ifx__initpackhw | ( | sint16 | a,
 |  | sint16 | b
 | ) |  |

Initialize __packhw with two integers

Definition at line 903 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initpackhwl()

IFX_INLINE __packhw Ifx__initpackhwl ( long a )

Initialize __packhw with a long integer

Definition at line 913 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initupackb()

IFX_INLINE __upackb Ifx__initupackb | ( | uint32 | a,
 |  | uint32 | b,
 |  | uint32 | c,
 |  | uint32 | d
 | ) |  |

Initialize __packb with four unsigned integers

Definition at line 920 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__initupackhw()

IFX_INLINE __upackhw Ifx__initupackhw | ( | uint16 | a,
 |  | uint16 | b
 | ) |  |

Initialize __packhw with two unsigned integers

Definition at line 932 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte1()

IFX_INLINE __packb Ifx__insertbyte1 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 942 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte2()

IFX_INLINE __packb Ifx__insertbyte2 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 952 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte3()

IFX_INLINE __packb Ifx__insertbyte3 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 962 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertbyte4()

IFX_INLINE __packb Ifx__insertbyte4 | ( | __packb | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 972 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__inserthw1()

IFX_INLINE __packhw Ifx__inserthw1 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 1022 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__inserthw2()

IFX_INLINE __packhw Ifx__inserthw2 | ( | __packhw | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 1032 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte1()

IFX_INLINE __upackb Ifx__insertubyte1 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into first uint8 of a __packb

Definition at line 982 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte2()

IFX_INLINE __upackb Ifx__insertubyte2 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into second uint8 of a __packb

Definition at line 992 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte3()

IFX_INLINE __upackb Ifx__insertubyte3 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into third uint8 of a __packb

Definition at line 1002 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertubyte4()

IFX_INLINE __upackb Ifx__insertubyte4 | ( | __upackb | a,
 |  | uint8 | b
 | ) |  |

Insert sint8 into fourth uint8 of a __packb

Definition at line 1012 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertuhw1()

IFX_INLINE __upackhw Ifx__insertuhw1 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1042 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__insertuhw2()

IFX_INLINE __upackhw Ifx__insertuhw2 | ( | __upackhw | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1052 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minb()

IFX_INLINE __packb Ifx__minb | ( | __packb | a,
 |  | __packb | b
 | ) |  |

Minimum of two __packb values

Definition at line 1062 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minbu()

IFX_INLINE __upackb Ifx__minbu | ( | __upackb | a,
 |  | __upackb | b
 | ) |  |

Minimum of two __upackb values

Definition at line 1072 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minh()

IFX_INLINE __packhw Ifx__minh | ( | __packhw | a,
 |  | __packhw | b
 | ) |  |

Minimum of two __packhw values

Definition at line 1082 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__minhu()

IFX_INLINE __upackhw Ifx__minhu | ( | __upackhw | a,
 |  | __upackhw | b
 | ) |  |

Minimum of two __upackhw values

Definition at line 1092 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte1()

IFX_INLINE void Ifx__setbyte1 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into first byte of a __packb

Definition at line 1102 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte2()

IFX_INLINE void Ifx__setbyte2 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into second byte of a __packb

Definition at line 1112 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte3()

IFX_INLINE void Ifx__setbyte3 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into third byte of a __packb

Definition at line 1122 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setbyte4()

IFX_INLINE void Ifx__setbyte4 | ( | __packb * | a,
 |  | sint8 | b
 | ) |  |

Insert sint8 into fourth byte of a __packb

Definition at line 1132 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sethw1()

IFX_INLINE void Ifx__sethw1 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into first halfword of a __packhw

Definition at line 1142 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sethw2()

IFX_INLINE void Ifx__sethw2 | ( | __packhw * | a,
 |  | sint16 | b
 | ) |  |

Insert sint16 into second halfword of a __packhw

Definition at line 1152 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte1()

IFX_INLINE void Ifx__setubyte1 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into first byte of a __upackb

Definition at line 1162 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte2()

IFX_INLINE void Ifx__setubyte2 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into second byte of a __upackb

Definition at line 1172 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte3()

IFX_INLINE void Ifx__setubyte3 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into third byte of a __upackb

Definition at line 1182 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setubyte4()

IFX_INLINE void Ifx__setubyte4 | ( | __upackb * | a,
 |  | uint8 | b
 | ) |  |

Insert uint8 into fourth byte of a __upackb

Definition at line 1192 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setuhw1()

IFX_INLINE void Ifx__setuhw1 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into first halfword of a __upackhw

Definition at line 1202 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setuhw2()

IFX_INLINE void Ifx__setuhw2 | ( | __upackhw * | a,
 |  | uint16 | b
 | ) |  |

Insert uint16 into second halfword of a __upackhw

Definition at line 1212 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Register Handling

Macros | Functions
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Register Handling:

Macros

#define | Ifx__abs(a) __builtin_abs(a)
#define | Ifx__clz(a) __builtin_clz(a)

Functions

IFX_INLINE sint32 | Ifx__absdif (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__abss (sint32 a)
IFX_INLINE sint32 | Ifx__clo (sint32 a)
IFX_INLINE sint32 | Ifx__cls (sint32 a)
IFX_INLINE double | Ifx__fabs (double d)
IFX_INLINE float | Ifx__fabsf (float f)
IFX_INLINE sint32 | Ifx__parity (sint32 a)
IFX_INLINE sint8 | Ifx__satb (sint32 a)
IFX_INLINE uint8 | Ifx__satbu (sint32 a)
IFX_INLINE sint16 | Ifx__sath (sint32 a)
IFX_INLINE uint16 | Ifx__sathu (sint32 a)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__abs

#define Ifx__abs ( a ) __builtin_abs(a)

Return absolute value

Definition at line 1230 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__clz

#define Ifx__clz ( a ) __builtin_clz(a)

Count leading zeros in int

Definition at line 1270 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__absdif()

IFX_INLINE sint32 Ifx__absdif | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

Return absolue difference of two integers

Definition at line 1234 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__abss()

IFX_INLINE sint32 Ifx__abss ( sint32 a )

Return absolute value with saturation

Definition at line 1243 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__clo()

IFX_INLINE sint32 Ifx__clo ( sint32 a )

Count leading ones in int

Definition at line 1252 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cls()

IFX_INLINE sint32 Ifx__cls ( sint32 a )

Count number of redundant sign bits (all consecutive bits with the same value as bit 31

Definition at line 1261 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fabs()

IFX_INLINE double Ifx__fabs ( double d )

Return absolute double precision floating-point value

Definition at line 1274 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fabsf()

IFX_INLINE float Ifx__fabsf ( float f )

Return absolute floating-point value

Definition at line 1283 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__parity()

IFX_INLINE sint32 Ifx__parity ( sint32 a )

Return parity

Definition at line 1305 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__satb()

IFX_INLINE sint8 Ifx__satb ( sint32 a )

Return saturated byte

Definition at line 1314 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__satbu()

IFX_INLINE uint8 Ifx__satbu ( sint32 a )

Return saturated uint8

Definition at line 1323 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sath()

IFX_INLINE sint16 Ifx__sath ( sint32 a )

Return saturated halfword

Definition at line 1332 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__sathu()

IFX_INLINE uint16 Ifx__sathu ( sint32 a )

Return saturated unsigned halfword

Definition at line 1341 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Saturation Arithmetic Support

Functions
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Saturation Arithmetic Support:

Functions

IFX_INLINE sint32 | Ifx__adds (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__addsu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__subs (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__subsu (uint32 a, uint32 b)

Detailed Description

These intrinsics support saturation arithmetic

Function Documentation

◆ Ifx__adds()

IFX_INLINE sint32 Ifx__adds | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

add signed with saturation

Definition at line 1358 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__addsu()

IFX_INLINE uint32 Ifx__addsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

add unsigned with saturation

Definition at line 1367 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__subs()

IFX_INLINE sint32 Ifx__subs | ( | sint32 | a,
 |  | sint32 | b
 | ) |  |

substract signed with saturation

Definition at line 1376 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__subsu()

IFX_INLINE uint32 Ifx__subsu | ( | uint32 | a,
 |  | uint32 | b
 | ) |  |

substract unsigned with saturation

Definition at line 1385 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for GNU compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Functions

IFX_INLINE void | Ifx__debug (void)
IFX_INLINE void | Ifx__dsync (void)
IFX_INLINE void | Ifx__isync (void)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nop (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__rslcx (void)
IFX_INLINE void | Ifx__svlcx (void)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __asm__ volatile("":::"memory");

Insert a memory barrier

Definition at line 1411 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__NOP

#define Ifx__NOP ( n ) __asm(".rept " #n "\n\tnop\n\t.endr\n")

Insert n NOP instruction

Definition at line 1477 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__debug()

IFX_INLINE void Ifx__debug ( void )

Insert DEBUG instruction

Definition at line 1404 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__dsync()

IFX_INLINE void Ifx__dsync ( void )

Insert DSYNC instruction

Definition at line 1415 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__isync()

IFX_INLINE void Ifx__isync ( void )

Insert ISYNC instruction

Definition at line 1422 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__ldmst()

IFX_INLINE void Ifx__ldmst | ( | volatile void * | address,
 |  | uint32 | mask,
 |  | uint32 | value
 | ) |  |

Insert LDMST instruction. Note that all operands must be word-aligned.

Definition at line 1429 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__nop()

IFX_INLINE void Ifx__nop ( void )

Insert NOP instruction

Definition at line 1438 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Insert a loop over cnt NOP instruction

Definition at line 1445 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__rslcx()

IFX_INLINE void Ifx__rslcx ( void )

Insert RSLCX instruction

Definition at line 1454 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__svlcx()

IFX_INLINE void Ifx__svlcx ( void )

Insert SVLCX instruction

Definition at line 1461 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__swap()

IFX_INLINE uint32 Ifx__swap | ( | void * | place,
 |  | uint32 | value
 | ) |  |

Insert SWAP instruction. Note that all operands must be word-aligned.

Definition at line 1468 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: Intrinsics for TASKING compiler

Modules
Intrinsics for TASKING compiler
iLLD » CPU » Standard Driver » Intrinsics
Collaboration diagram for Intrinsics for TASKING compiler:

Modules

Cross type arithmetic operation
Signed integer operation
Unsigned integer operation
Floating point operation
Fractional Arithmetic Support
Insert / Extract Bit-fields and Bits
Interrupt Handling
Miscellaneous Intrinsic Functions
Packed Data Type Support
Register Handling
Saturation Arithmetic Support
Insert Single Assembly Instruction

Detailed Description


iLLD_TC26B: Cross type arithmetic operation

Macros
Cross type arithmetic operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Cross type arithmetic operation:

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))

Detailed Description

Macro compatible with float, fix point, signed integer and unsigned integer

Macro Definition Documentation

◆ Ifx__checkrangeX

#define Ifx__checkrangeX | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 93 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__maxX

#define Ifx__maxX | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 91 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__minX

#define Ifx__minX | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 90 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturateX

#define Ifx__saturateX | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minX(Ifx__maxX(X, Min), Max) )

Definition at line 92 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Signed integer operation

Macros
Signed integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Signed integer operation:

Macros

#define Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturate

#define Ifx__saturate | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __min(__max(X, Min), Max) )

Definition at line 100 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Unsigned integer operation

Macros
Unsigned integer operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Unsigned integer operation:

Macros

#define Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )

Detailed Description

Macro Definition Documentation

◆ Ifx__saturateu

#define Ifx__saturateu | ( | X,
 |  | Min,
 |  | Max
 | ) | ( __minu(__maxu(X, Min), Max) )

Definition at line 107 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Floating point operation

Macros
Floating point operation
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Floating point operation:

Macros

#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )

Detailed Description

Macro Definition Documentation

◆ Ifx__abs_stdreal

#define Ifx__abs_stdreal ( X ) ( ((X) > 0.0) ? (X) : -(X) )

Definition at line 126 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__absf

#define Ifx__absf ( X ) ( ((X) < 0.0) ? -(X) : (X) )

Definition at line 120 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__checkrange

#define Ifx__checkrange | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 114 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__checkrangef

#define Ifx__checkrangef | ( | X,
 |  | Min,
 |  | Max
 | ) | (((X) >= (Min)) && ((X) <= (Max)))

Definition at line 124 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__geqf

#define Ifx__geqf | ( | X,
 |  | Y
 | ) | ( !((X) < (Y)) )

X >= Y

Definition at line 133 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__leqf

#define Ifx__leqf | ( | X,
 |  | Y
 | ) | ( !((X) > (Y)) )

X <= Y

Definition at line 132 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__max_stdreal

#define Ifx__max_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 128 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__maxf

#define Ifx__maxf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) ? (X) : (Y) )

Definition at line 122 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__min_stdreal

#define Ifx__min_stdreal | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 127 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__minf

#define Ifx__minf | ( | X,
 |  | Y
 | ) | ( ((X) < (Y)) ? (X) : (Y) )

Definition at line 121 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__neqf

#define Ifx__neqf | ( | X,
 |  | Y
 | ) | ( ((X) > (Y)) || ((X) < (Y)) )

X != Y

Definition at line 131 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__roundf

#define Ifx__roundf ( X ) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))

Definition at line 119 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturate_stdreal

#define Ifx__saturate_stdreal | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )

Definition at line 129 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__saturatef

#define Ifx__saturatef | ( | X,
 |  | Min,
 |  | Max
 | ) | ( Ifx__minf(_Ifx_maxf(X, Min), Max) )

Definition at line 123 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__sqrf

#define Ifx__sqrf ( X ) ((X) * (X))

Definition at line 116 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__sqrtf

#define Ifx__sqrtf ( X ) sqrtf(X)

Definition at line 117 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Fractional Arithmetic Support

Macros
Fractional Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Fractional Arithmetic Support:

Macros

#define | Ifx__fract_to_float(value) ((float)(value))
#define | Ifx__mulfractlong __mulfractlong
#define | Ifx__mulfractfract(fractvalue1, fractvalue2) ((fractvalue1)*(fractvalue2))

Detailed Description

The next table provides an overview of intrinsic functions to convert fractional values. Note that the TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C compiler does support these functions.

Macro Definition Documentation

◆ Ifx__fract_to_float

#define Ifx__fract_to_float ( value ) ((float)(value))

Definition at line 143 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mulfractfract

#define Ifx__mulfractfract | ( | fractvalue1,
 |  | fractvalue2
 | ) | ((fractvalue1)*(fractvalue2))

Definition at line 147 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mulfractlong

#define Ifx__mulfractlong __mulfractlong

Definition at line 145 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Insert / Extract Bit-fields and Bits

Macros
Insert / Extract Bit-fields and Bits
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Insert / Extract Bit-fields and Bits:

Macros

#define | Ifx__extru(a, p, w) __extru(a,p,w)
#define | Ifx__extr(a, p, w) __extr(a,p,w)
#define | Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
#define | Ifx__insert(a, b, p, w) __insert(a,b,p,w)

Detailed Description

Macro Definition Documentation

◆ Ifx__extr

#define Ifx__extr | ( | a,
 |  | p,
 |  | w
 | ) | __extr(a,p,w)

Definition at line 158 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__extru

#define Ifx__extru | ( | a,
 |  | p,
 |  | w
 | ) | __extru(a,p,w)

Definition at line 156 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__imaskldmst

#define Ifx__imaskldmst | ( | a,
 |  | v,
 |  | b,
 |  | p
 | ) | __imaskldmst((int*)a, v, b, p)

Definition at line 160 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__insert

#define Ifx__insert | ( | a,
 |  | b,
 |  | p,
 |  | w
 | ) | __insert(a,b,p,w)

Definition at line 162 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Interrupt Handling

Macros
Interrupt Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Interrupt Handling:

Macros

#define | Ifx__disable_and_save __disable_and_save
#define | Ifx__restore __restore

Detailed Description

The next table provides an overview of the intrinsic functions to read or set interrupt handling.

Macro Definition Documentation

◆ Ifx__disable_and_save

#define Ifx__disable_and_save __disable_and_save

Definition at line 171 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__restore

#define Ifx__restore __restore

Definition at line 173 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Miscellaneous Intrinsic Functions

Miscellaneous Intrinsic Functions
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Miscellaneous Intrinsic Functions:


iLLD_TC26B: Packed Data Type Support

Packed Data Type Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Packed Data Type Support:

The next table provides an overview of the intrinsic functions for initialization of packed data type.


iLLD_TC26B: Register Handling

Macros
Register Handling
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Register Handling:

Macros

#define Ifx__mtcr_no_isync(reg, val) __asm("mtcr %0,%1"::"i"(reg),"d"(val));

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to access control registers.

Macro Definition Documentation

◆ Ifx__mtcr_no_isync

#define Ifx__mtcr_no_isync | ( | reg,
 |  | val
 | ) | __asm("mtcr %0,%1"::"i"(reg),"d"(val));

Definition at line 198 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Saturation Arithmetic Support

Macros
Saturation Arithmetic Support
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Saturation Arithmetic Support:

Macros

#define | Ifx__adds(a, b) ((__sat int)(a)+(__sat int)(b))
#define | Ifx__addsu(a, b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
#define | Ifx__subs(a, b) ((__sat int)(a)-(__sat int)(b))
#define | Ifx__subsu(a, b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))

Detailed Description

These intrinsics support saturation arithmetic

Macro Definition Documentation

◆ Ifx__adds

#define Ifx__adds | ( | a,
 |  | b
 | ) | ((__sat int)(a)+(__sat int)(b))

Definition at line 209 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__addsu

#define Ifx__addsu | ( | a,
 |  | b
 | ) | ((__sat unsigned int)(a)+(__sat unsigned int)(b))

Definition at line 211 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__subs

#define Ifx__subs | ( | a,
 |  | b
 | ) | ((__sat int)(a)-(__sat int)(b))

Definition at line 213 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__subsu

#define Ifx__subsu | ( | a,
 |  | b
 | ) | ((__sat unsigned int )(a)-(__sat unsigned int )(b))

Definition at line 215 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: Insert Single Assembly Instruction

Macros | Functions
Insert Single Assembly Instruction
iLLD » CPU » Standard Driver » Intrinsics » Intrinsics for TASKING compiler
Collaboration diagram for Insert Single Assembly Instruction:

Macros

#define | Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
#define | Ifx__mem_barrier __asm("":::"memory");
#define | Ifx__fract_to_sfract __round16
#define | Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)

Functions

IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__ldmstAsm (volatile void *addr, uint32 mask, uint32 data)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE void | Ifx__stopPerfCounters (void)

Detailed Description

The next table provides an overview of the intrinsic functions that you can use to insert a single assembly instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used assembly instructions.

Macro Definition Documentation

◆ Ifx__fract_to_sfract

#define Ifx__fract_to_sfract __round16

Definition at line 267 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__ldmst

#define Ifx__ldmst | ( | addr,
 |  | mask,
 |  | data
 | ) | Ifx__ldmstAsm(addr, mask, data)

Definition at line 277 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __asm("":::"memory");

Insert a memory barrier

Definition at line 238 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__NOP

#define Ifx__NOP ( n ) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")

Definition at line 234 of file IfxCpu_IntrinsicsTasking.h.

Function Documentation

◆ Ifx__float_to_fract()

IFX_INLINE fract Ifx__float_to_fract ( float a )

Convert float to fract

Definition at line 260 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__float_to_sfract().

◆ Ifx__float_to_sfract()

IFX_INLINE sfract Ifx__float_to_sfract ( float a )

Convert float to sfract

Definition at line 271 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__ldmstAsm()

IFX_INLINE void Ifx__ldmstAsm | ( | volatile void * | addr,
 |  | uint32 | mask,
 |  | uint32 | data
 | ) |  |

Definition at line 249 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__nops()

IFX_INLINE void Ifx__nops ( void * cnt )

Definition at line 227 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

Definition at line 280 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: IfxCpu_Intrinsics.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_Intrinsics.h File Reference
iLLD » CPU » Standard Driver » Intrinsics
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_Intrinsics.h:

Go to the source code of this file.

Macros

#define | IFX_ALIGN_8 (1)
#define | IFX_ALIGN_16 (2)
#define | IFX_ALIGN_32 (4)
#define | IFX_ALIGN_64 (8)
#define | IFX_ALIGN_128 (16)
#define | IFX_ALIGN_256 (32)
#define | Ifx_AlignOn256(Size) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))
#define | Ifx_AlignOn128(Size) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))
#define | Ifx_AlignOn64(Size) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))
#define | Ifx_AlignOn32(Size) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))
#define | Ifx_AlignOn16(Size) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))
#define | Ifx_AlignOn8(Size) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))
#define | Ifx_COUNTOF(x) (sizeof(x) / sizeof(x[0]))

Functions

IFX_INLINE void * | __cx_to_addr (uint32 cx)
IFX_INLINE uint32 | __addr_to_cx (void *addr)
IFX_INLINE void | __ldmst_c (volatile void *address, unsigned mask, unsigned value)
IFX_INLINE uint32 | __ld32 (void *addr)
IFX_INLINE void | __st32 (void *addr, uint32 value)
IFX_INLINE uint64 | __ld64 (void *addr)
IFX_INLINE void | __st64 (void *addr, uint64 value)
IFX_INLINE void | __ld64_lu (void *addr, uint32 *valueLower, uint32 *valueUpper)
IFX_INLINE void | __st64_lu (void *addr, uint32 valueLower, uint32 valueUpper)

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_Intrinsics.h.

Macro Definition Documentation

◆ IFX_ALIGN_128

#define IFX_ALIGN_128 (16)

Definition at line 52 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_16

#define IFX_ALIGN_16 (2)

Definition at line 49 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_256

#define IFX_ALIGN_256 (32)

Definition at line 53 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_32

#define IFX_ALIGN_32 (4)

Definition at line 50 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_64

#define IFX_ALIGN_64 (8)

Definition at line 51 of file IfxCpu_Intrinsics.h.

◆ IFX_ALIGN_8

#define IFX_ALIGN_8 (1)

Definition at line 48 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn128

#define Ifx_AlignOn128 ( Size ) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))

Definition at line 56 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn16

#define Ifx_AlignOn16 ( Size ) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))

Definition at line 59 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn256

#define Ifx_AlignOn256 ( Size ) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))

Definition at line 55 of file IfxCpu_Intrinsics.h.

◆ Ifx_AlignOn32

#define Ifx_AlignOn32 ( Size ) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))

Definition at line 58 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Fifo_create(), Ifx_Fifo_init(), IfxCif_Cam_calcMem(), and IfxCif_Cam_initMemSize().

◆ Ifx_AlignOn64

#define Ifx_AlignOn64 ( Size ) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))

Definition at line 57 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Fifo_init().

◆ Ifx_AlignOn8

#define Ifx_AlignOn8 ( Size ) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))

Definition at line 60 of file IfxCpu_Intrinsics.h.

◆ Ifx_COUNTOF

#define Ifx_COUNTOF ( x ) (sizeof(x) / sizeof(x[0]))

Definition at line 62 of file IfxCpu_Intrinsics.h.

Referenced by Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), and Ifx_Shell_parseUInt64().

Function Documentation

◆ __addr_to_cx()

IFX_INLINE uint32 __addr_to_cx ( void * addr )

Convert address pointer to context pointer

Parameters
[in] addr address pointer
Returns
context pointer

Definition at line 81 of file IfxCpu_Intrinsics.h.

◆ __cx_to_addr()

IFX_INLINE void* __cx_to_addr ( uint32 cx )

Convert context pointer to address pointer

Parameters
[in] cx context pointer
Returns
address pointer

Definition at line 70 of file IfxCpu_Intrinsics.h.

◆ __ld32()

IFX_INLINE uint32 __ld32 ( void * addr )

32bit load operation

Definition at line 99 of file IfxCpu_Intrinsics.h.

◆ __ld64()

IFX_INLINE uint64 __ld64 ( void * addr )

64bit load operation

Definition at line 115 of file IfxCpu_Intrinsics.h.

Referenced by __ld64_lu().

◆ __ld64_lu()

IFX_INLINE void __ld64_lu | ( | void * | addr,
 |  | uint32 * | valueLower,
 |  | uint32 * | valueUpper
 | ) |  |

64bit load operation which returns the lower and upper 32bit word

Definition at line 131 of file IfxCpu_Intrinsics.h.

◆ __ldmst_c()

IFX_INLINE void __ldmst_c | ( | volatile void * | address,
 |  | unsigned | mask,
 |  | unsigned | value
 | ) |  |

Definition at line 91 of file IfxCpu_Intrinsics.h.

Referenced by IfxCcu6_connectTrigger(), IfxDsadc_Rdc_initHwTimestamp(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTimTin(), IfxGtm_PinMap_setTomTout(), IfxGtm_Tbu_enableChannel(), IfxGtm_Trig_fromDsadc(), IfxGtm_Trig_toDsadc(), IfxGtm_Trig_toSent(), and IfxGtm_Trig_toVadc().

◆ __st32()

IFX_INLINE void __st32 | ( | void * | addr,
 |  | uint32 | value
 | ) |  |

32bit store operation

Definition at line 107 of file IfxCpu_Intrinsics.h.

◆ __st64()

IFX_INLINE void __st64 | ( | void * | addr,
 |  | uint64 | value
 | ) |  |

64bit store operation

Definition at line 123 of file IfxCpu_Intrinsics.h.

Referenced by __st64_lu().

◆ __st64_lu()

IFX_INLINE void __st64_lu | ( | void * | addr,
 |  | uint32 | valueLower,
 |  | uint32 | valueUpper
 | ) |  |

64bit store operation which stores a lower and upper 32bit word

Definition at line 142 of file IfxCpu_Intrinsics.h.

Referenced by IfxFlash_loadPage().


iLLD_TC26B: Core Startup Functions

Modules
Core Startup Functions
iLLD » CPU
Collaboration diagram for Core Startup Functions:

Modules

Startup Sequence
How to enable cache during startup?
How to enable CPUs during startup?

Detailed Description


iLLD_TC26B: Startup Sequence

Startup Sequence
iLLD » CPU » Core Startup Functions
Collaboration diagram for Startup Sequence:

The startup driver is responsible for initializing the basic features of microcontroller to bring it up to the user functions. In framework these functions are called as "CoreX_main".

In TC27X controllers, CPU0 is master controller which is booted from reset. IfxCpu_CStart driver provides following functionalities and they are listed in the order of their execution.

Core Startup Sequence

1) Execute pre-initialization hook, which is user configurable. Using Startup pre-initialization hook
2) Setup user stack pointer for the CPU core
3) Set program/data cache bypass to configuration defined settings. Refer How to enable cache during startup?.
4) Set base address for trap vector and interrupt vector for the CPU core
5) Set interrupt stack pointer
6) Initialize the base pointers for the small data area registers for CPU core
7) Initialize the CSA for CPU core
8) Do the C initialization to initialize the global variables etc.
9) Initialize the clock system to configuration defined settings. Ifx_Scu_Ccu_ConfigClock
10) Start remaining cores if they configuration setting request them to be enabled. How to enable CPUs during startup?
11) Call user function "CoreX_main"

Note
All the above functionalities are executed by "master core" in this case CPU0. Remaining cores will execute only subset of the above functions, i.e. steps 8) 9) and 10) are not executed by remaining CPU core startups.

Using Startup pre-initialization hook

If the application/ demo example need some activity other than above defined functionalities, user can configure the function which is called before any other initialization is executed. Example of such activity is testing the CSA and STACK.

Following are the steps to be done to configure user defined activity which is needed before startup sequence.

Step1: Define a hook function

This definition shall be as user defined code (Generally in DemoApps folder).
Considerations:

  1. Format: IFX_INLINE void <pre init function name>(cpu)
    Note
    Define such a routine with the consideration, that there shall be no function call within this.
  2. Use the information available as parameter cpu

Example code in a user defined file eg. Ifx_preInitHook.h, placed under folder/subfolder: 0_AppSw/Tricore/DemoApp:

// file: Ifx_preInitHook.h
//Example function for pre initialization Hook for startup functions.
IFX_INLINE mySysPreInitHook(uint32 cpu)
{
switch (cpu)
{
case 0:
{
//user code for cpu0: Function calls NOT allowed.
break;
}
case 1:
{
//user code for cpu1: Function calls NOT allowed.
break;
}
case 2:
{
//user code for cpu2: Function calls NOT allowed.
break;
}
case default:
{
break;
}
}
}

Step2: Configure the pre initialization function for startup sequence call

Create a file for configuring the hook. For example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder)

Note
This configuration, overload the macro IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu), which is already defined in IfxCpu_CStart.h. !!IMPORTANT!! Don't modify this at IfxCpu_CStart.h, because this is library file.
//file: Ifx_Cfg_CStart.h
#include "Ifx_preInitHook.h" //Assuming this is the file name as in above example
#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu) mySysPreInitHook(cpu) //This is INLINE function.


iLLD_TC26B: How to enable cache during startup?

How to enable cache during startup?
iLLD » CPU » Core Startup Functions
Collaboration diagram for How to enable cache during startup?:

In Tricore Cpu the cache enable/ disable are handled by the feature called cache bypass. Cache is enabled if the Bypass is disabled.

Startup sequence of each CPU execute the function to do the cache settings. Ifx_Cpu_StartupSequence The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_PCACHE and IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_DCACHE control this function.

To modify the default configuration, these macros are to be defined in Ifx_Cfg.h (usually located under ../0_Src/0_AppSw/Config/Common/Ifx_Cfg.h)

Note
This kind of definitions overload the macros, which are already defined in IfxCpu_CStart*.c. !!IMPORTANT!! Don't modify these in IfxCpu_CStart*.c, because theseare library files.

Details of configuration parameters:

Enable/Disable program cache of Tricore CPU0 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
Enable/Disable program cache of Tricore CPU1 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
Enable/Disable program cache of Tricore CPU2 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE
Enable/Disable data cache of Tricore CPU0 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
Enable/Disable data cache of Tricore CPU1 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
Enable/Disable data cache of Tricore CPU2 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE
Following example shows, how to enable program cache of all available cores and disable data cache of all the available cores.

//file: Ifx_Cfg.h
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1) //Program cache for Cpu0 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1) //Data cache for Cpu0 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1) //Program cache for Cpu1 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1) //Data cache for Cpu1 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE (1) //Program cache for Cpu2 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE (1) //Data cache for Cpu2 is enabled

To control the the caches during runtime, refer for the details of APIs: Ifx_Cpu_Cache


iLLD_TC26B: How to enable CPUs during startup?

How to enable CPUs during startup?
iLLD » CPU » Core Startup Functions
Collaboration diagram for How to enable CPUs during startup?:

Startup sequence of CPU0 execute the function to initialize the remaining available CPUs. Core Startup Sequence. Startup sequence enables all the available CPUs.

The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx control this function. To modify the default configuration, these macros are to be defined. Create a file to define these macros, for example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder).

Note
This kind of definitions, overload the macros, which are already defined in IfxCpu_CStart.h. !!IMPORTANT!! Don't modify these at IfxCpu_CStart.h, because this is library file.

Details of configuration parameters:

Enable/Disable of Tricore CPU0 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0
Enable/Disable of Tricore CPU1 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1
Enable/Disable of Tricore CPU2 with parameter:
IFX_CFG_CPU_CSTART_ENABLE_TRICORE2
Following example shows, how to enable all available cores.

//file: Ifx_Cfg_CStart.h
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1) //Cpu0 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1) //Cpu1 is enabled
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2 (1) //Cpu2 is enabled


iLLD_TC26B: Interrupt Functions

Modules
Interrupt Functions
iLLD » CPU
Collaboration diagram for Interrupt Functions:

Modules

How to define Interrupts?
Functions

Detailed Description


iLLD_TC26B: How to define Interrupts?

How to define Interrupts?
iLLD » CPU » Interrupt Functions
Collaboration diagram for How to define Interrupts?:

This page describes how to use interrupts with application framework.

Interrupts Terminology:

Hardware Managed Interrupt Mechanism.

Hardware managed interrupts have static interrupt vector which are defined for each priority separately. These vectors have jump instruction to the interrupt handler.

Advantages:
This mechanism has less interrupt latency time.

Software Managed Interrupt Mechanism.

Software managed interrupts have single interrupt vector statically defined at vector position 255. This address is assigned to BIV during startup.
For Tricore, this vector position is important, because whenever an interrupt occurs, with whichever priority, the execution control jumps to this vector position. The code at this vector position will:
1) fetch the priority of the targetted interrupt.
2) fetch the interrupt handler defined for this priority (this is done by Interrupt handler installation. Refer Step4: How to install Interrupt Service routine/handler?
3) Then call the handler as notmal function call.

Advantages:
This kind of mechanism is useful when project wants to change the handler for an interrupt during runtime.

Disadvantages:
This mechanism has more interrupt latency time.

of the interrupt and in tand jumps to the function

Steps to use Interrupt Mechanism.

Dependency: Ifx_Compilers, Ifx_Cpu, Ifx_Src, IfxCpu_Irq
Following are the steps to use interrupt mechanism.

Step1: Define Interrupt priorities.

Define priorities of all interrupts with names corresponding to their functionality. It is recommended to define such priority definitions in single header file, because it is easy to detect if ISR priorities are conflicting. In Tricore architecture, two Isrs can't have same priority at same point of time.

Note
These defines shall be defined without brackets surrounding priority number. (eg. #define PRIO (10) is not allowed)

In a user defined file eg. Ifx_IntPrioDef.h, placed in folder: 0_AppSw/Tricore/DemoApp:

//file: Ifx_IntPrioDef.h.
#define IFX_INTPRIO_FUNCT1 1
#define IFX_INTPRIO_FUNCT2 2
#define IFX_INTPRIO_FUNCT3 5
#define IFX_INTPRIO_STM0 8
#define IFX_INTPRIO_ADC_FUNC1 10
//etc.
Note
!! IMPORTANT !!
As explained above, the definition with closing bracket around priority number as, #define IFX_INTPRIO_FUNCT1 (1) will cause compilation error. Because linker sections which are constructed using such information will also get these brackets included. Which look like ".intvec_tc0_(1)" instead of the expected ".intvec_tc0_1"
Linker sections' definitions are predefined statically in .lsl file, for all 255 interrupts, with the format ".intvec_tc<vector number>_<interrupt priority>".

Step2: Define Type of interrupt mechanism.

To use Hardware Managed Interrupt Mechanism.

Refer Hardware Managed Interrupt Mechanism. If project is designed for hardware managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path: 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be undefined (i.e. the statement "#define IFX_USE_SW_MANAGED_INT" shall be commented as below).

//file: Ifx_Cfg.h
//#define IFX_USE_SW_MANAGED_INT

To use Software Managed Interrupt Mechanism.

Refer Software Managed Interrupt Mechanism. If project is designed for software managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path: 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be defined.

//file: Ifx_Cfg.h
#define IFX_USE_SW_MANAGED_INT

Software managed interrupts must also install the "Interrupt Handlers" Refer Step4: How to install Interrupt Service routine/handler?

Step3: How to define an Interrupt Service routine?

Interrupt service routines or interrupt handlers are defined in driver specific files or application specific files.

//file usercode1.c
#include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
#include "Ifx_IntPrioDef.h" // to get the priority numbers
//define an ISR with name Isr_Stm0 with priority defined by IFX_INTPRIO_STM0
IFX_INTERRUPT (Isr_Stm0, 0, IFX_INTPRIO_STM0)
{
//Isr code here
}
//file usercode2.c
#include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
#include "Ifx_IntPrioDef.h" // to get the priority numbers
//define an ISR with name Isr_Adc_fun1 with priority defined by IFX_INTPRIO_ADC_FUNC1
IFX_INTERRUPT (Isr_Adc_fun1, 0, IFX_INTPRIO_ADC_FUNC1)
{
//Isr code here
}

Step4: How to install Interrupt Service routine/handler?

This step is not required for HW managed interrupts.
Interrupt service routines or interrupt handlers are installed in driver specific files or application specific files

//file usermain.c
#include "IfxCpu_Irq.h"
#include "Ifx_IntPrioDef.h" // to get the priority numbers
void userfunction_init(void)
{
//code for user function init
// :
// :
IfxCpu_Irq_installInterruptHandler (Isr_Stm0, IFX_INTPRIO_STM0);
IfxCpu_Irq_installInterruptHandler (Isr_Adc_fun1, IFX_INTPRIO_ADC_FUNC1);
// :
}

Step5: Managing the Service Request Node.

For the interrupt to get activated, interrupt triggers are needed. These triggers are activated by peripheral modules and corresponding service request node must be
1) Configured with correct priority number
2) The request node must be enabled
Refer to How to use Service Request Mechanism?


iLLD_TC26B: Functions

Functions
Functions
iLLD » CPU » Interrupt Functions
Collaboration diagram for Functions:

Functions

IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos (IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU. More...

Detailed Description

Function Documentation

◆ IfxCpu_Irq_getTos()

IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos ( IfxCpu_ResourceCpu coreId )

API to get type of service of the caller CPU.

Parameters
coreId core id of the core
Returns
type of service for the corresponding CPU.

Definition at line 84 of file IfxCpu_Irq.h.


iLLD_TC26B: Trap Functions

Modules
Trap Functions
iLLD » CPU
Collaboration diagram for Trap Functions:

Modules

Trap Function Hooks
How to use the Trap Function Hooks?
Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?.

Detailed Description


iLLD_TC26B: Trap Function Hooks

Data Structures | Typedefs | Enumerations
Trap Function Hooks
iLLD » CPU » Trap Functions
Collaboration diagram for Trap Function Hooks:

Data Structures

union | IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps. More...
struct | IfxCpu_Trap
Structure to contain the trap information. More...

Typedefs

typedef sint32 | IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap. More...
typedef sint32 | IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap. More...

Enumerations

enum IfxCpu_Trap_Class {
IfxCpu_Trap_Class_memoryManagement = 0U,
IfxCpu_Trap_Class_internalProtection = 1U,
IfxCpu_Trap_Class_instructionErrors = 2U,
IfxCpu_Trap_Class_contextManagement = 3U,
IfxCpu_Trap_Class_bus = 4U,
IfxCpu_Trap_Class_assertion = 5U,
IfxCpu_Trap_Class_systemCall = 6U,
IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
}
Enum for available Trap classes. More...
enum IfxCpu_Trap_MemoryManagement_Id {
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U
}
Enum for available Identification numbers under Memory Management Trap. More...
enum IfxCpu_Trap_InternalProtection_Id {
IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U
}
Enum for available Identification numbers under Internal Protection Trap. More...
enum IfxCpu_Trap_InstructionErrors_Id {
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U
}
Enum for available Identification numbers under Instruction Errors Trap. More...
enum IfxCpu_Trap_ContextManagement_Id {
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
IfxCpu_Trap_ContextManagement_Id_nestingError = 7U
}
Enum for available Identification numbers under Context Management Trap. More...
enum IfxCpu_Trap_Bus_Id {
IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U
}
Enum for available Identification numbers under Bus Trap. More...
enum IfxCpu_Trap_Assertion_Id {
IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U
}
Enum for available Identification numbers under Assertion Trap. More...

Detailed Description

Data Structure Documentation

◆ IfxCpu_Trap_Id

union IfxCpu_Trap_Id

Union to abstract Identification numbers under Traps.

Definition at line 151 of file IfxCpu_Trap.h.

Data Fields
IfxCpu_Trap_Assertion_Id | assertion
IfxCpu_Trap_Bus_Id | bus
IfxCpu_Trap_ContextManagement_Id | contextManagement
IfxCpu_Trap_InstructionErrors_Id | instructionErrors
IfxCpu_Trap_InternalProtection_Id | internalProtection
IfxCpu_Trap_MemoryManagement_Id | memoryManagement
IfxCpu_Trap_NonMaskableInterrupt_Id | nonMaskableInterrupt
IfxCpu_Trap_SystemCall_Id | systemCall

◆ IfxCpu_Trap

struct IfxCpu_Trap

Structure to contain the trap information.

Definition at line 166 of file IfxCpu_Trap.h.

Data Fields
unsigned int | tAddr
unsigned int | tClass: 8
unsigned int | tCpu: 3
unsigned int | tId: 8

Typedef Documentation

◆ IfxCpu_Trap_NonMaskableInterrupt_Id

typedef sint32 IfxCpu_Trap_NonMaskableInterrupt_Id

Type for Identification number for Non Maskable Interrupt Trap.

Definition at line 146 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_SystemCall_Id

typedef sint32 IfxCpu_Trap_SystemCall_Id

Type for Identification numbers under SystemCall Trap.

Definition at line 141 of file IfxCpu_Trap.h.

Enumeration Type Documentation

◆ IfxCpu_Trap_Assertion_Id

enum IfxCpu_Trap_Assertion_Id

Enum for available Identification numbers under Assertion Trap.

Enumerator
IfxCpu_Trap_Assertion_Id_arithmeticOverflow
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow

Definition at line 132 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_Bus_Id

enum IfxCpu_Trap_Bus_Id

Enum for available Identification numbers under Bus Trap.

Enumerator
IfxCpu_Trap_Bus_Id_programFetchSynchronousError
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError
IfxCpu_Trap_Bus_Id_temporalAsynchronousError

Definition at line 118 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_Class

enum IfxCpu_Trap_Class

Enum for available Trap classes.

Enumerator
IfxCpu_Trap_Class_memoryManagement
IfxCpu_Trap_Class_internalProtection
IfxCpu_Trap_Class_instructionErrors
IfxCpu_Trap_Class_contextManagement
IfxCpu_Trap_Class_bus
IfxCpu_Trap_Class_assertion
IfxCpu_Trap_Class_systemCall
IfxCpu_Trap_Class_nonMaskableInterrupt

Definition at line 54 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_ContextManagement_Id

enum IfxCpu_Trap_ContextManagement_Id

Enum for available Identification numbers under Context Management Trap.

Enumerator
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow
IfxCpu_Trap_ContextManagement_Id_contextType
IfxCpu_Trap_ContextManagement_Id_nestingError

Definition at line 104 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_InstructionErrors_Id

enum IfxCpu_Trap_InstructionErrors_Id

Enum for available Identification numbers under Instruction Errors Trap.

Enumerator
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode
IfxCpu_Trap_InstructionErrors_Id_invalidOperand
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress

Definition at line 92 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_InternalProtection_Id

enum IfxCpu_Trap_InternalProtection_Id

Enum for available Identification numbers under Internal Protection Trap.

Enumerator
IfxCpu_Trap_InternalProtection_Id_privilegeViolation
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection

Definition at line 78 of file IfxCpu_Trap.h.

◆ IfxCpu_Trap_MemoryManagement_Id

enum IfxCpu_Trap_MemoryManagement_Id

Enum for available Identification numbers under Memory Management Trap.

Enumerator
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection

Definition at line 69 of file IfxCpu_Trap.h.


iLLD_TC26B: How to use the Trap Function Hooks?

How to use the Trap Function Hooks?
iLLD » CPU » Trap Functions

Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?. More...

Collaboration diagram for How to use the Trap Function Hooks?:

Macro to define the trap vector table. This macro is provided to define the trap vector table in the frameowrk. User shall not use this macro. Refer to the documentation to extend the trap with hook functions. How to use the Trap Function Hooks?.

This page describes how to use the trap function hooks with application framework.
Framework has built in Trap Service Routines, which has minimal set of debug information. The execution of trap service is as below,
1) When a trap occurs, a variable "trapInfo" is updated with the information:
a. Which CPU caused this trap,
b. What is the trap address, trap class and
c. What is the trap identification number
2) Call to a configurable hook function, passing structure trapInfo as parameter.
3) Then debug instruction executed.
4) Returning from the trap. (This instruction is not reached if debugger is connected because of "debug" instruction before)
For normal cases during development, where user works with debugger, user can watch the structure variable "trapInfo" in the debugger.

In case, user wants to make use of the information of trap for further processing,
extend the traps, using the hook functions provided.

Extending the traps with hook functions.

If the trap extensions are to be extended, it is very important to enable this feature. By default this feature is disabled.

How to enable the trap extension feature?

To extend the trap hook functions user must enable this feature by defining the macro "IFX_CFG_EXTEND_TRAP_HOOKS" in Ifx_Cfg.h, as shown below.

//file: Ifx_Cfg.h
#define IFX_CFG_EXTEND_TRAP_HOOKS

Now the compiler will accept the further configurations to extend the hooks.
Ifx_Cfg_Trap.h file shall be used to extend the traps. This provides two kind of hook functions. ie. Hook for error traps and hooks (per CPU available) for system calls.

Extending the "Error traps" with hook function.

Error trap occurs as a result of an error event such as an instruction error, memory-management error or an illegal access.
To extend the error traps, following steps are to be followed:

Step1: Define a routine to substitute the hook for error traps.

This definition shall be as user defined code (Generally in DemoApps folder).
Considerations:

  1. Format: IFX_INLINE void <trap extension name>(IfxCpu_Trap trapInfo)
    Note
    Define such a routine with the consideration that the trap extension hook is not a function. In case of context management error, this extension itself will not call any other function.
  2. Use the information trapInfo, which is available as parameter passed to this hook and process further. Example code in a user defined file eg. Ifx_TrapExtension.h,
    //Example "inlined" function for trap Extension Hook.
    IFX_INLINE myTrapExtensionHook(IfxCpu_Trap trapInfo)
    {
    switch (trapInfo.tClass)
    {
    case IfxCpu_Trap_Class_memoryManagement:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_internalProtection:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_instructionErrors:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_contextManagement:
    {
    //user code: Function calls NOT allowed.
    break;
    }
    case IfxCpu_Trap_Class_bus:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_assertion:
    {
    //user code: Function calls allowed.
    break;
    }
    case IfxCpu_Trap_Class_nonMaskableInterrupt:
    {
    //user code: Function calls allowed.
    break;
    }
    case default:
    {
    break;
    }
    }
    }
    Note
    The error trap functions execute the debug instruction immediately after returning from extension hooks.

Step2: Configure error trap hook extension function.

Configure error trap hook extension function as defined above to the macro as below:

Note
Configuration of hook extension is available in Ifx_Cfg_Trap.h
//file: Ifx_Cfg_Trap.h
#include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
#define IFX_CFG_CPU_TRAP_TSR_HOOK(trapInfo) myTrapExtensionHook(trapInfo) //This is INLINE function.
Note
The exten hooks are effective only if the feature is enabled.

Extending the cpu specific "system call" hook functions.

Tricore architecture provides the system call trap which is executed by software trigger. The instruction "syscall" triggers this trap. Please refer Tricore architecture manual for more details.
IfxCpu_trap driver provide hook function for each CPU separately. To extend System Call trap following steps are to be followed:

Step1: Define routine/s to substitute the hook/s for System Call trap.

This definition shall be as user defined code (Generally in DemoApps folder).
Considerations:

  1. Format: void <syscall function name>(IfxCpu_Trap trapInfo) It is allowed to define this trap extension as function definition, because this trap is not triggered due to any error. Depending on the application requirement, define single or per CPU instance of the extension.
  2. Use the information trapInfo which is available as parameter passed to this hook and process further. The parameter passed, with syscall instruction, will be trap identification number (refer to Tricore architecture manual for more details).
    Note
    To hook extension, information about trap identification number is available through parameter "trapInfo".
    Example code in a user defined file eg. Ifx_TrapExtension.h,
    //Example function for System Call Extension Hook.
    IFX_INLINE mySysCallExtensionHook(IfxCpu_Trap trapInfo)
    {
    switch (trapInfo.tId)
    {
    case 0:
    {
    //user code: Function calls allowed.
    break;
    }
    case 1:
    {
    //user code: Function calls allowed.
    break;
    }
    // and so on..
    case default:
    {
    break;
    }
    }
    }

Step2: Configure the extension function.\n

Configure the hook extension function defined above, to the macro as below:

Note
Configuration of hook extension is available in Ifx_Cfg_Trap.h
//file: Ifx_Cfg_Trap.h
#include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU0_HOOK(trapInfo) mySysCallExtensionHook(trapInfo)
#define IFXCPU_TRAP_CFG_SYSCALL_CPU1_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU2_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU3_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU4_HOOK(trapInfo) // Not used in this example
#define IFXCPU_TRAP_CFG_SYSCALL_CPU5_HOOK(trapInfo) // Not used in this example
The exten hooks are effective only if this feature is enabled.


iLLD_TC26B: IfxCpu_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxCpu_cfg.h File Reference
iLLD » CPU

CPU on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_cfg.h:

Go to the source code of this file.

Macros

#define | IFXCPU_NUM_MODULES (2)
CPU count. More...
#define | IFXCPU_CACHABLE_FLASH_SEGMENT (8)
Segment number of cachable flash region. More...
#define | IFXCPU_CACHABLE_LMU_SEGMENT (9)
Segment number of cachable LMU region. More...
#define | IFXCPU_CFG_ALLCORE_DONE (0x3)
All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled. So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this mask will be generated for all the available cores of the device. e.g: More...
#define | IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE

Enumerations

enum IfxCpu_DBGST_HALT {
IfxCpu_DBGST_HALT_run = 0,
IfxCpu_DBGST_HALT_halt = 1
}
Halt status. More...
enum IfxCpu_Id {
IfxCpu_Id_0 = 0,
IfxCpu_Id_1 = 1,
IfxCpu_Id_none
}
List of the available CPU ids. More...
enum IfxCpu_Index {
IfxCpu_Index_0 = 0,
IfxCpu_Index_1 = 1,
IfxCpu_Index_none
}
List of the available CPU resources. More...
enum IfxCpu_PMCSR_PMST {
IfxCpu_PMCSR_PMST_normalMode = 1,
IfxCpu_PMCSR_PMST_idleModeRequest = 2,
IfxCpu_PMCSR_PMST_idleMode = 3,
IfxCpu_PMCSR_PMST_sleepModeRequest = 4,
IfxCpu_PMCSR_PMST_standbyModeRequest = 6
}
Power management status. More...
enum IfxCpu_ResourceCpu {
IfxCpu_ResourceCpu_0 = IfxCpu_Index_0,
IfxCpu_ResourceCpu_1 = IfxCpu_Index_1,
IfxCpu_ResourceCpu_none = IfxCpu_Index_none
}
List of the available CPU resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap [IFXCPU_NUM_MODULES]

Detailed Description

CPU on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_cfg.h.

Macro Definition Documentation

◆ IFXCPU_ALLCORE_DONE

#define IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE

Definition at line 84 of file IfxCpu_cfg.h.

◆ IFXCPU_CACHABLE_FLASH_SEGMENT

#define IFXCPU_CACHABLE_FLASH_SEGMENT (8)

Segment number of cachable flash region.

Definition at line 52 of file IfxCpu_cfg.h.

Referenced by IfxCpu_isAddressCachable().

◆ IFXCPU_CACHABLE_LMU_SEGMENT

#define IFXCPU_CACHABLE_LMU_SEGMENT (9)

Segment number of cachable LMU region.

Definition at line 56 of file IfxCpu_cfg.h.

Referenced by IfxCpu_isAddressCachable().

◆ IFXCPU_CFG_ALLCORE_DONE

#define IFXCPU_CFG_ALLCORE_DONE (0x3)

All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled. So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this mask will be generated for all the available cores of the device. e.g:

  1. Check for synchronisation between core 0 and core 5

    define 0x41U

  1. Check for synchronisation between core 0 to core 5

    define 0x5FU

Note: Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro. Core 0: 0 Core 1: 1 Core 2: 2 Core 3: 3 Core 4: 4 Core 5: 6

Definition at line 78 of file IfxCpu_cfg.h.

Referenced by IfxCpu_waitEvent().

◆ IFXCPU_NUM_MODULES

#define IFXCPU_NUM_MODULES (2)

CPU count.

Definition at line 48 of file IfxCpu_cfg.h.

Referenced by IfxCpu_getIndex().

Enumeration Type Documentation

◆ IfxCpu_DBGST_HALT

enum IfxCpu_DBGST_HALT

Halt status.

Enumerator
IfxCpu_DBGST_HALT_run
IfxCpu_DBGST_HALT_halt

Definition at line 99 of file IfxCpu_cfg.h.

◆ IfxCpu_Id

enum IfxCpu_Id

List of the available CPU ids.

Enumerator
IfxCpu_Id_0 | CPU 0.
IfxCpu_Id_1 | CPU 1.
IfxCpu_Id_none | None of the CPU.

Definition at line 107 of file IfxCpu_cfg.h.

◆ IfxCpu_Index

enum IfxCpu_Index

List of the available CPU resources.

Enumerator
IfxCpu_Index_0 | CPU 0.
IfxCpu_Index_1 | CPU 1.
IfxCpu_Index_none | None of the CPU.

Definition at line 116 of file IfxCpu_cfg.h.

◆ IfxCpu_PMCSR_PMST

enum IfxCpu_PMCSR_PMST

Power management status.

Enumerator
IfxCpu_PMCSR_PMST_normalMode
IfxCpu_PMCSR_PMST_idleModeRequest
IfxCpu_PMCSR_PMST_idleMode
IfxCpu_PMCSR_PMST_sleepModeRequest
IfxCpu_PMCSR_PMST_standbyModeRequest

Definition at line 125 of file IfxCpu_cfg.h.

◆ IfxCpu_ResourceCpu

enum IfxCpu_ResourceCpu

List of the available CPU resources.

Enumerator
IfxCpu_ResourceCpu_0 | CPU 0.
IfxCpu_ResourceCpu_1 | CPU 1.
IfxCpu_ResourceCpu_none | None of the CPU.

Definition at line 136 of file IfxCpu_cfg.h.

Variable Documentation

◆ IfxCpu_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]

Definition at line 147 of file IfxCpu_cfg.h.


iLLD_TC26B: IfxCpu.h File Reference

  • Cpu
  • Std
Data Structures | Macros | Typedefs | Enumerations | Functions
IfxCpu.h File Reference
iLLD » CPU

CPU basic functionality. More...

#include "_Impl/IfxCpu_cfg.h"
#include "IfxSrc_reg.h"
#include "IfxScu_reg.h"
#include "IfxStm_reg.h"
#include "_Impl/IfxScu_cfg.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxCpu.h:

Go to the source code of this file.

Data Structures

struct | IfxCpu_Counter
counter More...
struct | IfxCpu_Perf
Performance counter result. More...

Macros

#define | IFXCPU_GLB_ADDR_DSPR(cpu, address) ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus. Use this macro to convert a local DSPR address (in segment 0xd00.....) to a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on the CPU number. Example usage: More...
#define | IFXCPU_GLB_ADDR_PSPR(cpu, address) ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))
Convert local PSPR address to global PSPR address which can be accessed from the SRI bus. Use this macro to convert a local PSPR address (in segment 0xc......) to a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on the CPU number. More...

Typedefs

typedef unsigned int | IfxCpu_spinLock
Lock type Spin lock. More...
typedef unsigned int | IfxCpu_mutexLock
Lock type Mutex lock. More...
typedef unsigned int | IfxCpu_syncEvent
Event used for synchronisation. More...

Enumerations

enum IfxCpu_CoreMode {
IfxCpu_CoreMode_halt,
IfxCpu_CoreMode_run,
IfxCpu_CoreMode_idle,
IfxCpu_CoreMode_sleep,
IfxCpu_CoreMode_stby,
IfxCpu_CoreMode_unknown
}
Enumeration for the Cpu mode. More...
enum IfxCpu_CounterMode {
IfxCpu_CounterMode_normal = 0,
IfxCpu_CounterMode_task = 1
}
Performance conunter modes. More...

Functions

IFX_INLINE Ifx_CPU * | IfxCpu_getAddress (IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map. More...
IFX_INLINE IfxCpu_Id | IfxCpu_getCoreId (void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu. Use IfxCpu_getCoreIndex() to get cpu no. More...
IFX_INLINE IfxCpu_ResourceCpu | IfxCpu_getCoreIndex (void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed. More...
IFX_INLINE void | IfxCpu_initCSA (uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called. More...
IFX_INLINE void | IfxCpu_setSafetyTaskIdentifier (boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU. More...
IFX_INLINE void | IfxCpu_triggerSwReset (void)
Triggers Software Reset. More...
IFX_EXTERN IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IFX_EXTERN boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
IFX_EXTERN boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
IFX_EXTERN boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...
IFX_INLINE boolean | IfxCpu_areInterruptsEnabled (void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API provides the status of CPU where this API is called. More...
IFX_INLINE boolean | IfxCpu_disableInterrupts (void)
API to disable global interrupt and return the previous status. More...
IFX_INLINE void | IfxCpu_enableInterrupts (void)
API to enable global interrupt. This API simply enables the global interrupt. More...
IFX_INLINE void | IfxCpu_forceDisableInterrupts (void)
Disable the Global Interrupt. More...
IFX_INLINE void | IfxCpu_restoreInterrupts (boolean enabled)
API to restore global interrupt with that of the passed parameter. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificDataAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_enableSegmentSpecificInstructionAccessCacheability (uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called. This API is to be called only if the PCACHE or DCACHE are not enabled before. More...
IFX_INLINE void | IfxCpu_invalidateProgramCache (void)
API to invalidate the program cache. More...
IFX_INLINE boolean | IfxCpu_isAddressCachable (void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section. More...
IFX_INLINE void | IfxCpu_setDataCache (boolean enable)
API to enable or bypass the data cache for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_setProgramCache (boolean enable)
API to enable or bypass the program cache for the CPU which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getClockCounter (void)
API to read the clock counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getClockCounterStickyOverflow (void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getInstructionCounter (void)
API to read the instruction counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getInstructionCounterStickyOverflow (void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API. More...
IFX_INLINE uint32 | IfxCpu_getPerformanceCounter (uint16 address)
API to read the performance counter for the CPU which calls this API. More...
IFX_INLINE boolean | IfxCpu_getPerformanceCounterStickyOverflow (uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API. This is generic function to get sticky overflow bit of any performance counters. More...
IFX_INLINE void | IfxCpu_resetAndStartCounters (IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters. More...
IFX_INLINE void | IfxCpu_setPerformanceCountersEnableBit (uint32 enable)
API to enable or disable performance counter for the CPU which calls this API. More...
IFX_INLINE IfxCpu_Perf | IfxCpu_stopCounters (void)
Stop instruction and clock counters, return their values. More...
IFX_INLINE void | IfxCpu_updateClockCounter (uint32 count)
API to update clock counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updateInstructionCounter (uint32 count)
API to update Instruction counter for the CPU which calls this API. More...
IFX_INLINE void | IfxCpu_updatePerformanceCounter (uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to update any of the performance counters. More...
IFX_EXTERN boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
IFX_EXTERN void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
IFX_EXTERN void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
IFX_EXTERN boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
IFX_EXTERN uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
IFX_EXTERN boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
IFX_EXTERN void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...

Detailed Description

CPU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu.h.

Macro Definition Documentation

◆ IFXCPU_GLB_ADDR_DSPR

#define IFXCPU_GLB_ADDR_DSPR | ( | cpu,
 |  | address
 | ) | ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))

Convert local DSPR address to global DSPR address which can be accessed from the SRI bus. Use this macro to convert a local DSPR address (in segment 0xd00.....) to a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on the CPU number. Example usage:

dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i][0]);
dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &destinationBuffer[i][0]);

Definition at line 73 of file IfxCpu.h.

Referenced by IfxCpu_waitEvent(), IfxEth_RxDescr_setBuffer(), IfxEth_setReceiveBuffer1RingMode(), IfxEth_setReceiveBuffer2RingMode(), IfxEth_setTransmitBuffer1RingMode(), IfxEth_setTransmitBuffer2RingMode(), IfxEth_TxDescr_setBuffer(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IFXCPU_GLB_ADDR_PSPR

#define IFXCPU_GLB_ADDR_PSPR | ( | cpu,
 |  | address
 | ) | ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))

Convert local PSPR address to global PSPR address which can be accessed from the SRI bus. Use this macro to convert a local PSPR address (in segment 0xc......) to a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on the CPU number.

Example usage:

dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &sourceBufferInPsprMemory);
dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &destinationBufferInPsprMemory);

Definition at line 86 of file IfxCpu.h.

Typedef Documentation

◆ IfxCpu_mutexLock

typedef unsigned int IfxCpu_mutexLock

Lock type Mutex lock.

Definition at line 98 of file IfxCpu.h.

◆ IfxCpu_spinLock

typedef unsigned int IfxCpu_spinLock

Lock type Spin lock.

Definition at line 94 of file IfxCpu.h.

◆ IfxCpu_syncEvent

typedef unsigned int IfxCpu_syncEvent

Event used for synchronisation.

Definition at line 102 of file IfxCpu.h.


iLLD_TC26B: DMA

Modules | Files
DMA
iLLD
Collaboration diagram for DMA:

Modules

Implementation
Standard Driver
How to use the DMA Interface driver?
DMA

Files

file | IfxDma_cfg.h
DMA on-chip implementation data.
file | IfxDma_Dma.h
DMA DMA details.
file | IfxDma.h
DMA basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » DMA
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » DMA
Collaboration diagram for Standard Driver:

Modules

Enumerations
Reset Functions
Channel Transaction Functions
Move Engine functions
Channel configuration Functions
Channel Halt Functions
Double Buffer functions
Interrupt functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » DMA » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxDma_BusMasterMode {
IfxDma_BusMasterMode_user = 0,
IfxDma_BusMasterMode_supervisor = 1
}
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE. More...
enum IfxDma_ChannelBusPriority {
IfxDma_ChannelBusPriority_low = 0,
IfxDma_ChannelBusPriority_medium = 1,
IfxDma_ChannelBusPriority_high = 2
}
Channel Bus Priority definition. More...
enum IfxDma_ChannelIncrementCircular {
IfxDma_ChannelIncrementCircular_none = 0,
IfxDma_ChannelIncrementCircular_2 = 1,
IfxDma_ChannelIncrementCircular_4 = 2,
IfxDma_ChannelIncrementCircular_8 = 3,
IfxDma_ChannelIncrementCircular_16 = 4,
IfxDma_ChannelIncrementCircular_32 = 5,
IfxDma_ChannelIncrementCircular_64 = 6,
IfxDma_ChannelIncrementCircular_128 = 7,
IfxDma_ChannelIncrementCircular_256 = 8,
IfxDma_ChannelIncrementCircular_512 = 9,
IfxDma_ChannelIncrementCircular_1024 = 10,
IfxDma_ChannelIncrementCircular_2048 = 11,
IfxDma_ChannelIncrementCircular_4096 = 12,
IfxDma_ChannelIncrementCircular_8192 = 13,
IfxDma_ChannelIncrementCircular_16384 = 14,
IfxDma_ChannelIncrementCircular_32768 = 15
}
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD. More...
enum IfxDma_ChannelIncrementDirection {
IfxDma_ChannelIncrementDirection_negative = 0,
IfxDma_ChannelIncrementDirection_positive = 1
}
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS. More...
enum IfxDma_ChannelIncrementStep {
IfxDma_ChannelIncrementStep_1 = 0,
IfxDma_ChannelIncrementStep_2 = 1,
IfxDma_ChannelIncrementStep_4 = 2,
IfxDma_ChannelIncrementStep_8 = 3,
IfxDma_ChannelIncrementStep_16 = 4,
IfxDma_ChannelIncrementStep_32 = 5,
IfxDma_ChannelIncrementStep_64 = 6,
IfxDma_ChannelIncrementStep_128 = 7
}
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF. More...
enum IfxDma_ChannelInterruptControl {
IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0,
IfxDma_ChannelInterruptControl_transferCountDecremented = 1
}
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0) More...
enum IfxDma_ChannelMove {
IfxDma_ChannelMove_1 = 0,
IfxDma_ChannelMove_2 = 1,
IfxDma_ChannelMove_4 = 2,
IfxDma_ChannelMove_8 = 3,
IfxDma_ChannelMove_16 = 4,
IfxDma_ChannelMove_3 = 5,
IfxDma_ChannelMove_5 = 6,
IfxDma_ChannelMove_9 = 7
}
DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM. More...
enum IfxDma_ChannelMoveSize {
IfxDma_ChannelMoveSize_8bit = 0,
IfxDma_ChannelMoveSize_16bit = 1,
IfxDma_ChannelMoveSize_32bit = 2,
IfxDma_ChannelMoveSize_64bit = 3,
IfxDma_ChannelMoveSize_128bit = 4,
IfxDma_ChannelMoveSize_256bit = 5
}
DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW. More...
enum IfxDma_ChannelOperationMode {
IfxDma_ChannelOperationMode_single = 0,
IfxDma_ChannelOperationMode_continuous = 1
}
DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE. More...
enum IfxDma_ChannelPattern {
IfxDma_ChannelPattern_0_disable = 0,
IfxDma_ChannelPattern_0_mode1 = 1,
IfxDma_ChannelPattern_0_mode2 = 2,
IfxDma_ChannelPattern_0_mode3 = 3,
IfxDma_ChannelPattern_1_disable = 4,
IfxDma_ChannelPattern_1_mode1 = 5,
IfxDma_ChannelPattern_1_mode2 = 6,
IfxDma_ChannelPattern_1_mode3 = 7
}
Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL. More...
enum IfxDma_ChannelPriority {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium = 1,
IfxDma_ChannelPriority_high = 2
}
Channel Priority definition. More...
enum IfxDma_ChannelRequestMode {
IfxDma_ChannelRequestMode_oneTransferPerRequest = 0,
IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1
}
DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT. More...
enum IfxDma_ChannelRequestSource {
IfxDma_ChannelRequestSource_peripheral = 0,
IfxDma_ChannelRequestSource_daisyChain = 1
}
DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL. More...
enum IfxDma_ChannelShadow {
IfxDma_ChannelShadow_none = 0,
IfxDma_ChannelShadow_src = 1,
IfxDma_ChannelShadow_dst = 2,
IfxDma_ChannelShadow_srcDirectWrite = 5,
IfxDma_ChannelShadow_dstDirectWrite = 6,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8,
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9,
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10,
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11,
IfxDma_ChannelShadow_linkedList = 12,
IfxDma_ChannelShadow_accumulatedLinkedList = 13,
IfxDma_ChannelShadow_safeLinkedList = 14,
IfxDma_ChannelShadow_conditionalLinkedList = 15
}
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT More...
enum IfxDma_HardwareResourcePartition {
IfxDma_HardwareResourcePartition_0 = 0,
IfxDma_HardwareResourcePartition_1,
IfxDma_HardwareResourcePartition_2,
IfxDma_HardwareResourcePartition_3
}
enum IfxDma_MoveEngine {
IfxDma_MoveEngine_0 = 0,
IfxDma_MoveEngine_1 = 1
}
DMA move engine definition. More...
enum IfxDma_SleepMode {
IfxDma_SleepMode_enable = 0,
IfxDma_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxDma_BusMasterMode

enum IfxDma_BusMasterMode

Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE.

Enumerator
IfxDma_BusMasterMode_user | Selected hardware resource performs Bus access in user mode.
IfxDma_BusMasterMode_supervisor | Selected hardware resource performs Bus access in supervisor mode.

Definition at line 66 of file IfxDma.h.

◆ IfxDma_ChannelBusPriority

enum IfxDma_ChannelBusPriority

Channel Bus Priority definition.

Enumerator
IfxDma_ChannelBusPriority_low | low priority
IfxDma_ChannelBusPriority_medium | medium priority
IfxDma_ChannelBusPriority_high | high priority

Definition at line 74 of file IfxDma.h.

◆ IfxDma_ChannelIncrementCircular

enum IfxDma_ChannelIncrementCircular

DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.

Enumerator
IfxDma_ChannelIncrementCircular_none | no circular buffer operation
IfxDma_ChannelIncrementCircular_2 | circular buffer size is 2 byte
IfxDma_ChannelIncrementCircular_4 | circular buffer size is 4 byte
IfxDma_ChannelIncrementCircular_8 | circular buffer size is 8 byte
IfxDma_ChannelIncrementCircular_16 | circular buffer size is 16 byte
IfxDma_ChannelIncrementCircular_32 | circular buffer size is 32 byte
IfxDma_ChannelIncrementCircular_64 | circular buffer size is 64 byte
IfxDma_ChannelIncrementCircular_128 | circular buffer size is 128 byte
IfxDma_ChannelIncrementCircular_256 | circular buffer size is 256 byte
IfxDma_ChannelIncrementCircular_512 | circular buffer size is 512 byte
IfxDma_ChannelIncrementCircular_1024 | circular buffer size is 1024 byte
IfxDma_ChannelIncrementCircular_2048 | circular buffer size is 2048 byte
IfxDma_ChannelIncrementCircular_4096 | circular buffer size is 4096 byte
IfxDma_ChannelIncrementCircular_8192 | circular buffer size is 8192 byte
IfxDma_ChannelIncrementCircular_16384 | circular buffer size is 16384 byte
IfxDma_ChannelIncrementCircular_32768 | circular buffer size is 32768 byte

Definition at line 84 of file IfxDma.h.

◆ IfxDma_ChannelIncrementDirection

enum IfxDma_ChannelIncrementDirection

DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.

Enumerator
IfxDma_ChannelIncrementDirection_negative | pointer is decremented
IfxDma_ChannelIncrementDirection_positive | pointer is incremented

Definition at line 107 of file IfxDma.h.

◆ IfxDma_ChannelIncrementStep

enum IfxDma_ChannelIncrementStep

DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.

Enumerator
IfxDma_ChannelIncrementStep_1 | increment by 1 width
IfxDma_ChannelIncrementStep_2 | increment by 2 width
IfxDma_ChannelIncrementStep_4 | increment by 4 width
IfxDma_ChannelIncrementStep_8 | increment by 8 width
IfxDma_ChannelIncrementStep_16 | increment by 16 width
IfxDma_ChannelIncrementStep_32 | increment by 32 width
IfxDma_ChannelIncrementStep_64 | increment by 64 width
IfxDma_ChannelIncrementStep_128 | increment by 128 width

Definition at line 116 of file IfxDma.h.

◆ IfxDma_ChannelInterruptControl

enum IfxDma_ChannelInterruptControl

Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)

Enumerator
IfxDma_ChannelInterruptControl_thresholdLimitMatch | interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
IfxDma_ChannelInterruptControl_transferCountDecremented | interrupt when transfer count (TCOUNT) is decremented

Definition at line 131 of file IfxDma.h.

◆ IfxDma_ChannelMove

enum IfxDma_ChannelMove

DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM.

Enumerator
IfxDma_ChannelMove_1 | 1 DMA move per DMA transfer
IfxDma_ChannelMove_2 | 2 DMA move per DMA transfer
IfxDma_ChannelMove_4 | 4 DMA move per DMA transfer
IfxDma_ChannelMove_8 | 8 DMA move per DMA transfer
IfxDma_ChannelMove_16 | 16 DMA move per DMA transfer
IfxDma_ChannelMove_3 | 3 DMA move per DMA transfer
IfxDma_ChannelMove_5 | 5 DMA move per DMA transfer
IfxDma_ChannelMove_9 | 9 DMA move per DMA transfer

Definition at line 140 of file IfxDma.h.

◆ IfxDma_ChannelMoveSize

enum IfxDma_ChannelMoveSize

DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW.

Enumerator
IfxDma_ChannelMoveSize_8bit | 1 DMA move is 8 bit wide
IfxDma_ChannelMoveSize_16bit | 1 DMA move is 16 bit wide
IfxDma_ChannelMoveSize_32bit | 1 DMA move is 32 bit wide
IfxDma_ChannelMoveSize_64bit | 1 DMA move is 64 bit wide
IfxDma_ChannelMoveSize_128bit | 1 DMA move is 128 bit wide
IfxDma_ChannelMoveSize_256bit | 1 DMA move is 256 bit wide

Definition at line 155 of file IfxDma.h.

◆ IfxDma_ChannelOperationMode

enum IfxDma_ChannelOperationMode

DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE.

Enumerator
IfxDma_ChannelOperationMode_single | channel disabled after transaction
IfxDma_ChannelOperationMode_continuous | channel stays enabled after transaction

Definition at line 168 of file IfxDma.h.

◆ IfxDma_ChannelPattern

enum IfxDma_ChannelPattern

Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL.

Enumerator
IfxDma_ChannelPattern_0_disable | Pattern detect 0 disabled.
IfxDma_ChannelPattern_0_mode1 | Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2].
IfxDma_ChannelPattern_0_mode2 | Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3].
IfxDma_ChannelPattern_0_mode3 | Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] of previous DMA read move.
IfxDma_ChannelPattern_1_disable | Pattern detect 1 disabled.
IfxDma_ChannelPattern_1_mode1 | Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2].
IfxDma_ChannelPattern_1_mode2 | Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3].
IfxDma_ChannelPattern_1_mode3 | Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] of previous DMA read move.

Definition at line 177 of file IfxDma.h.

◆ IfxDma_ChannelPriority

enum IfxDma_ChannelPriority

Channel Priority definition.

Enumerator
IfxDma_ChannelPriority_low | low priority
IfxDma_ChannelPriority_medium | medium priority
IfxDma_ChannelPriority_high | high priority

Definition at line 191 of file IfxDma.h.

◆ IfxDma_ChannelRequestMode

enum IfxDma_ChannelRequestMode

DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT.

Enumerator
IfxDma_ChannelRequestMode_oneTransferPerRequest | a request initiates a single transfer
IfxDma_ChannelRequestMode_completeTransactionPerRequest | a request initiates a complete transaction

Definition at line 201 of file IfxDma.h.

◆ IfxDma_ChannelRequestSource

enum IfxDma_ChannelRequestSource

DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL.

Enumerator
IfxDma_ChannelRequestSource_peripheral | Transfer Request via Hardware Trigger.
IfxDma_ChannelRequestSource_daisyChain | Transfer Request via next (higher priority) channel.

Definition at line 210 of file IfxDma.h.

◆ IfxDma_ChannelShadow

enum IfxDma_ChannelShadow

shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT

Enumerator
IfxDma_ChannelShadow_none | shadow address register not used. Source and destination address register are written directly
IfxDma_ChannelShadow_src | Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
IfxDma_ChannelShadow_dst | Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
IfxDma_ChannelShadow_srcDirectWrite | Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz and transferred to SADRz with the start of the next DMA transaction.
IfxDma_ChannelShadow_dstDirectWrite | Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHADRz and transferred to DADRz with the start of the next DMA transaction.
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch | Software switch only. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch | Automatic Hardware and Software switch. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch | Software switch only. Shadow address used for double buffering.
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch | Automatic Hardware and Software switch. Shadow address used for double buffering.
IfxDma_ChannelShadow_linkedList | The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corresponding DMARAM channel z.
IfxDma_ChannelShadow_accumulatedLinkedList | The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corresponding DMARAM channel z.
IfxDma_ChannelShadow_safeLinkedList | The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with the next DMA transaction if the existing SDCRC checksum matches the expected SDCRC checksum in the loaded from the new DMA transaction control set.
IfxDma_ChannelShadow_conditionalLinkedList | Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are used as address pointers to a Linked List. The selection of the address pointer is determined by DMA channel pattern detection conditions.

Definition at line 219 of file IfxDma.h.

◆ IfxDma_HardwareResourcePartition

enum IfxDma_HardwareResourcePartition
Enumerator
IfxDma_HardwareResourcePartition_0 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_1 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_2 | "Set of DMA channels are associated with hardware resource partition " + str(x)
IfxDma_HardwareResourcePartition_3 | "Set of DMA channels are associated with hardware resource partition " + str(x)

Definition at line 236 of file IfxDma.h.

◆ IfxDma_MoveEngine

enum IfxDma_MoveEngine

DMA move engine definition.

Enumerator
IfxDma_MoveEngine_0 | first move engine
IfxDma_MoveEngine_1 | second move engine

Definition at line 246 of file IfxDma.h.

◆ IfxDma_SleepMode

enum IfxDma_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS.

Enumerator
IfxDma_SleepMode_enable | enables sleep mode
IfxDma_SleepMode_disable | disables sleep mode

Definition at line 255 of file IfxDma.h.


iLLD_TC26B: Reset Functions

Functions
Reset Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Reset Functions:

Functions

IFX_INLINE boolean | IfxDma_isChannelReset (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel() More...
IFX_INLINE void | IfxDma_resetChannel (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel. More...

Detailed Description

Function Documentation

◆ IfxDma_isChannelReset()

IFX_INLINE boolean IfxDma_isChannelReset | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel()

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the channel is reset FALSE if the channel is not reset
// check whether the channel is reset or not and also the hardware trigger disabled
if (IfxDma_isChannelReset(chn[0].dma, chn[0].channelId) &&
(!IfxDma_isChannelTransactionEnabled(chn[0].dma, chn[0].channelId))) {
// Dma is out of RESET and there is no hardware request enabled
IfxDma_Dma_startChannelTransaction(&chn[0]);
}

Definition at line 1524 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().

◆ IfxDma_resetChannel()

IFX_INLINE void IfxDma_resetChannel | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Reset the channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Apply reset to the channel
IfxDma_resetChannel(chn[0].dma, chn[0].channelId);

Definition at line 1548 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().


iLLD_TC26B: Channel Transaction Functions

Functions
Channel Transaction Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel Transaction Functions:

Functions

IFX_INLINE void | IfxDma_clearChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status. More...
IFX_INLINE void | IfxDma_disableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_disableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE void | IfxDma_enableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_enableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE boolean | IfxDma_getChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status. More...
IFX_INLINE IfxDma_ChannelIncrementCircular | IfxDma_getCircularRangeCode (uint16 range)
Converts DMA circular range to circular code. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionEnabled (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionPending (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending) More...
IFX_INLINE void | IfxDma_setSleepMode (Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDma_startChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction. More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelTransactionRequestLost()

IFX_INLINE void IfxDma_clearChannelTransactionRequestLost | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear the channel transaction request lost flag status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Clear the channel transaction request lost flag status
IfxDma_clearChannelTransactionRequestLost(chn[0].dma, chn[0].channelId);

Definition at line 1251 of file IfxDma.h.

◆ IfxDma_disableChannelTransaction()

IFX_INLINE void IfxDma_disableChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable a DMA channel hardware transaction request.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1276 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel(), and IfxQspi_SpiMaster_isrDmaTransmit().

◆ IfxDma_disableChannelTransactionLostError()

IFX_INLINE void IfxDma_disableChannelTransactionLostError | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable the generation of a channel transaction lost error interrupt.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Disable the transaction request lost interrupt for given channel
IfxDma_disableChannelTransactionLostError(chn[0].dma, chn[0].channelId);

Definition at line 1282 of file IfxDma.h.

◆ IfxDma_enableChannelTransaction()

IFX_INLINE void IfxDma_enableChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable a DMA channel hardware transaction request.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
unsigned *src = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
IfxSrc_setRequest(src);
}
// Do not restrict the hardware triggering to only one transaction
IfxDma_setChannelContinuousMode(chn[0].dma, chn[0].channelId);
IfxDma_setChannelContinuousMode(chn[1].dma, chn[1].channelId);
IfxDma_setChannelContinuousMode(chn[2].dma, chn[2].channelId);
// Check for end of transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
// Enable the hardware trigger for channel 3
IfxDma_enableChannelTransaction(chn[3].dma, chn[3].channelId);
// Disable the hardware trigger for channel 2
IfxDma_disableChannelTransaction(chn[2].dma, chn[2].channelId);
// Hardware triggers for second time
unsigned *SRc = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
IfxSrc_setRequest(src);
}
// Restrict the hardware triggering to only one transaction
IfxDma_setChannelSingleMode(chn[0].dma, chn[0].channelId);
IfxDma_setChannelSingleMode(chn[1].dma, chn[1].channelId);

Definition at line 1320 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_enableChannelTransactionLostError()

IFX_INLINE void IfxDma_enableChannelTransactionLostError | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the generation of a channel transaction lost error interrupt.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Enable the transaction request lost interrupt for given channel
IfxDma_enableChannelTransactionLostError(chn[0].dma, chn[0].channelId);

Definition at line 1326 of file IfxDma.h.

◆ IfxDma_getChannelTransactionRequestLost()

IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Check the channel transaction request lost flag status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the TRL is set FALSE if the TRL is not set
boolean trlFlag;
// Check whether the channel transaction request lost flag is set or not
trlFlag = IfxDma_getChannelTransactionRequestLost(chn[0].dma, chn[0].channelId));

Definition at line 1458 of file IfxDma.h.

◆ IfxDma_getCircularRangeCode()

IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode ( uint16 range )

Converts DMA circular range to circular code.

Parameters
range DMA circular range
Returns
DMA circular code

Definition at line 1470 of file IfxDma.h.

◆ IfxDma_isChannelTransactionEnabled()

IFX_INLINE boolean IfxDma_isChannelTransactionEnabled | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the hardware transaction request status of a DMA channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the hardware transaction request is enabled FALSE if the hardware transaction request is disabled

A coding example can be found in IfxDma_isChannelReset

Definition at line 1530 of file IfxDma.h.

Referenced by IfxDma_Dma_deInitChannel().

◆ IfxDma_isChannelTransactionPending()

IFX_INLINE boolean IfxDma_isChannelTransactionPending | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the status of a DMA channel (transaction pending)

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if a transaction request for the given channel is pending
// check for the channel request pending with the channel
if (IfxDma_isChannelTransactionPending(chn[0].dma, chn[0].channelId) == TRUE) {
// There is channel request pending for channel 0
result |= 0;
}

Definition at line 1536 of file IfxDma.h.

Referenced by IfxDma_Dma_isChannelTransactionPending().

◆ IfxDma_setSleepMode()

IFX_INLINE void IfxDma_setSleepMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
dma | pointer to DMA registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1654 of file IfxDma.h.

◆ IfxDma_startChannelTransaction()

IFX_INLINE void IfxDma_startChannelTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Request a DMA channel transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_Dma_startChannelTransaction

Definition at line 1663 of file IfxDma.h.

Referenced by IfxDma_Dma_startChannelTransaction(), IfxFft_Fft_loadInput(), IfxFft_Fft_unloadOutput(), and IfxQspi_SpiSlave_write().


iLLD_TC26B: Move Engine functions

Functions
Move Engine functions
iLLD » DMA » Standard Driver
Collaboration diagram for Move Engine functions:

Functions

IFX_INLINE void | IfxDma_clearErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags. More...
IFX_INLINE void | IfxDma_disableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_disableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt. More...
IFX_INLINE uint32 | IfxDma_getErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags. More...

Detailed Description

Function Documentation

◆ IfxDma_clearErrorFlags()

IFX_INLINE void IfxDma_clearErrorFlags | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine,
 |  | uint32 | mask
 | ) |  |

Clear the DMA error status flags.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
mask | value holds the bits to clear or mask
Returns
None
// Clear the status of the error flags (as defined in _Impl/IfxDma_cfg.h)
IfxDma_clearErrorFlags(chn[0].dma,IfxDma_MoveEngine_1,
IFXDMA_ERROR_S | // move engine source error
IFXDMA_ERROR_D | // move engine destination error
IFXDMA_ERROR_SPB | // bus error on SPB
IFXDMA_ERROR_SRI | // bus error on SRI
IFXDMA_ERROR_RAM | // RAM error
IFXDMA_ERROR_SLL | // safe linked list CRC checksum error
IFXDMA_ERROR_DLL); // failed linked list load error

Definition at line 1257 of file IfxDma.h.

◆ IfxDma_disableMoveEngineDestinationError()

IFX_INLINE void IfxDma_disableMoveEngineDestinationError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Disable the generation of a Move engine destination error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None

A coding example can be found in IfxDma_disableMoveEngineSourceError

Definition at line 1288 of file IfxDma.h.

◆ IfxDma_disableMoveEngineSourceError()

IFX_INLINE void IfxDma_disableMoveEngineSourceError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Disable the generation of a Move engine source error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None
// Disable the move engine source and destination move errors
IfxDma_disableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
IfxDma_disableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);

Definition at line 1301 of file IfxDma.h.

◆ IfxDma_enableMoveEngineDestinationError()

IFX_INLINE void IfxDma_enableMoveEngineDestinationError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Enable the generation of a Move engine destination error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None

A coding example can be found in IfxDma_enableMoveEngineSourceError

Definition at line 1332 of file IfxDma.h.

◆ IfxDma_enableMoveEngineSourceError()

IFX_INLINE void IfxDma_enableMoveEngineSourceError | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Enable the generation of a Move engine source error interrupt.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
None
// Enable the move engine source and destination move errors
IfxDma_enableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
IfxDma_enableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);

Definition at line 1345 of file IfxDma.h.

◆ IfxDma_getErrorFlags()

IFX_INLINE uint32 IfxDma_getErrorFlags | ( | Ifx_DMA * | dma,
 |  | IfxDma_MoveEngine | moveEngine
 | ) |  |

Return the DMA error status flags.

Parameters
dma | pointer to DMA module
moveEngine | pointer to the DMA move engine
Returns
the content of the DMA.ERRSR register
uint32 errorFlags = 0;
// Get the status of the error flags of move engine
errorFlags = IfxDma_getErrorFlags(chn[0].dma,IfxDma_MoveEngine_1);
if( errorFlags & IFXDMA_ERROR_S ) { // move engine source error
}
if( errorFlags & IFXDMA_ERROR_D ) { // move engine destination error
// ...
}
if( errorFlags & IFXDMA_ERROR_SPB ) { // bus error on SPB
// ...
}
if( errorFlags & IFXDMA_ERROR_SRI ) { // bus error on SRI
// ...
}
if( errorFlags & IFXDMA_ERROR_RAM ) { // RAM error
// ...
}
if( errorFlags & IFXDMA_ERROR_SLL ) { // safe linked list CRC checksum error
// ...
}
if( errorFlags & IFXDMA_ERROR_DLL ) { // failed linked list load error
// ...
}

Definition at line 1497 of file IfxDma.h.


iLLD_TC26B: Channel configuration Functions

Functions
Channel configuration Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel configuration Functions:

Functions

IFX_INLINE uint32 | IfxDma_getChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE uint32 | IfxDma_getChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE boolean | IfxDma_getChannelSuspendModeStatus (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status. More...
IFX_INLINE uint32 | IfxDma_getChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count. More...
IFX_INLINE uint32 | IfxDma_getTimestamp (Ifx_DMA *dma)
get the time stamp More...
IFX_INLINE void | IfxDma_setChannelBlockMode (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer. More...
IFX_INLINE void | IfxDma_setChannelContinuousMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled. More...
IFX_INLINE void | IfxDma_setChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address. More...
IFX_INLINE void | IfxDma_setChannelDestinationIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer. More...
IFX_INLINE void | IfxDma_setChannelMoveSize (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move. More...
IFX_INLINE void | IfxDma_setChannelShadow (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer. More...
IFX_INLINE void | IfxDma_setChannelSingleMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again. More...
IFX_INLINE void | IfxDma_setChannelSingleTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction. More...
IFX_INLINE void | IfxDma_setChannelSingleTransfer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer. More...
IFX_INLINE void | IfxDma_setChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address. More...
IFX_INLINE void | IfxDma_setChannelSourceIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer. More...
IFX_INLINE void | IfxDma_setChannelSuspendEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable. More...
IFX_INLINE void | IfxDma_setChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction. More...
IFX_INLINE void | IfxDma_writeChannelShadowDisable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only. More...
IFX_INLINE void | IfxDma_writeChannelShadowEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able. More...

Detailed Description

Function Documentation

◆ IfxDma_getChannelDestinationAddress()

IFX_INLINE uint32 IfxDma_getChannelDestinationAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get a channel source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Actual channel destination address
uint32 destAddr = IfxDma_getChannelDestinationAddress(chn[2].dma, chn[2].channelId);

Definition at line 1418 of file IfxDma.h.

◆ IfxDma_getChannelSourceAddress()

IFX_INLINE uint32 IfxDma_getChannelSourceAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get a channel source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Actual channel source address
uint32 sourceAddr = IfxDma_getChannelSourceAddress(chn[2].dma, chn[2].channelId);

Definition at line 1446 of file IfxDma.h.

◆ IfxDma_getChannelSuspendModeStatus()

IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return the DMA channel suspend Mode status.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Channel Suspend Mode or Frozen State Active status (1- DMA channel is in channel suspend mode or frozen state)

Definition at line 1452 of file IfxDma.h.

◆ IfxDma_getChannelTransferCount()

IFX_INLINE uint32 IfxDma_getChannelTransferCount | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return remaining DMA transfer count.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
Remaining DMA transfer count
// Wait till transfer count (TCOUNT) becomes 0
bool notFinished;
do {
notFinished = false;
if( IfxDma_getChannelTransferCount(chn[0].dma, chn[0].channelId) ) {
notFinished = true;
break;
}
} while( notFinished );

Definition at line 1464 of file IfxDma.h.

◆ IfxDma_getTimestamp()

IFX_INLINE uint32 IfxDma_getTimestamp ( Ifx_DMA * dma )

get the time stamp

Parameters
dma pointer to DMA module
Returns
the current time stamp
uint32 timestamp = IfxDma_getTimestamp(chn[0].dma);

Definition at line 1518 of file IfxDma.h.

◆ IfxDma_setChannelBlockMode()

IFX_INLINE void IfxDma_setChannelBlockMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelMove | blockMode
 | ) |  |

Configure the move count for each DMA channel transfer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
blockMode | value holds the number of moves with in a DMA transfer
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1554 of file IfxDma.h.

◆ IfxDma_setChannelContinuousMode()

IFX_INLINE void IfxDma_setChannelContinuousMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1560 of file IfxDma.h.

◆ IfxDma_setChannelDestinationAddress()

IFX_INLINE void IfxDma_setChannelDestinationAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | void * | address
 | ) |  |

Configure the destination address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
address | is the Initial address of the destination pointer
Returns
None

A coding example can be found in IfxDma_setChannelSourceAddress

Definition at line 1566 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelDestinationAddress(), IfxFft_Fft_unloadOutput(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelDestinationIncrementStep()

IFX_INLINE void IfxDma_setChannelDestinationIncrementStep | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelIncrementStep | incStep,
 |  | IfxDma_ChannelIncrementDirection | direction,
 |  | IfxDma_ChannelIncrementCircular | size
 | ) |  |

Configure a DMA channel destination pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
incStep | Specifies the pointer incrementation step
direction | Specifies the incrementation direction
size | Specifies the size of the circular buffer
Returns
None

A coding example can be found in IfxDma_setChannelSourceIncrementStep

Definition at line 1572 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelMoveSize()

IFX_INLINE void IfxDma_setChannelMoveSize | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelMoveSize | moveSize
 | ) |  |

Configure a DMA channel move.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
moveSize | value holds the opcode or size of data of individual moves with in a DMA transfer
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1595 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelShadow()

IFX_INLINE void IfxDma_setChannelShadow | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelShadow | shadow
 | ) |  |

Configure a DMA channel shadow pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
shadow | Specifies the shadow pointer
Returns
None
// Push the shadow mode into double buffer
IfxDma_setChannelShadow(chn[0].dma, chn[0].channelId,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch);

Definition at line 1601 of file IfxDma.h.

◆ IfxDma_setChannelSingleMode()

IFX_INLINE void IfxDma_setChannelSingleMode | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_enableChannelTransaction

Definition at line 1607 of file IfxDma.h.

◆ IfxDma_setChannelSingleTransaction()

IFX_INLINE void IfxDma_setChannelSingleTransaction | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1613 of file IfxDma.h.

◆ IfxDma_setChannelSingleTransfer()

IFX_INLINE void IfxDma_setChannelSingleTransfer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

A coding example can be found in IfxDma_setChannelTransferCount

Definition at line 1619 of file IfxDma.h.

◆ IfxDma_setChannelSourceAddress()

IFX_INLINE void IfxDma_setChannelSourceAddress | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | const void * | address
 | ) |  |

Configure the source address.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
address | is the Initial address of the source pointer
Returns
None
// Check for the end of current transaction and before trigger the channel request for
// for another channel, re configure the source and destination addresses
while(!(IfxDma_getAndClearChannelInterrupt(chn[1].dma, chn[1].channelId)));
// Re-Program the source address for the channel 2
IfxDma_setChannelSourceAddress(chn[2].dma, chn[2].channelId,Sadr);
// Re-Program the destination address for channel 2
IfxDma_setChannelDestinationAddress(chn[2].dma, chn[2].channelId,Dadr);
// Start DMA transaction for channel 2
IfxDma_Dma_startChannelTransaction(&chn[2]);

Definition at line 1625 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelSourceAddress(), IfxFft_Fft_loadInput(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelSourceIncrementStep()

IFX_INLINE void IfxDma_setChannelSourceIncrementStep | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_ChannelIncrementStep | incStep,
 |  | IfxDma_ChannelIncrementDirection | direction,
 |  | IfxDma_ChannelIncrementCircular | size
 | ) |  |

Configure a DMA channel source pointer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
incStep | Specifies the pointer incrementation step
direction | Specifies the incrementation direction
size | Specifies the size of the circular buffer
Returns
None
// Re-program the source and destination circular buffer control fields
IfxDma_setChannelSourceIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
IfxDma_setChannelDestinationIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);

Definition at line 1631 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_setChannelSuspendEnable()

IFX_INLINE void IfxDma_setChannelSuspendEnable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | boolean | enable
 | ) |  |

Configure a DMA channel suspend enable.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
enable | enable (1) / disable (0)
Returns
None

Definition at line 1642 of file IfxDma.h.

◆ IfxDma_setChannelTransferCount()

IFX_INLINE void IfxDma_setChannelTransferCount | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint32 | transferCount
 | ) |  |

Configure the move count of a DMA channel transaction.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
transferCount | value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
Returns
None
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[0]);
// Wait till end of transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
// Change the TREL configuration for channel 1
IfxDma_setChannelTransferCount(chn[1].dma, chn[1].channelId,0x6);
// Change the BLKM configuration for channel 1
IfxDma_setChannelBlockMode(chn[1].dma, chn[1].channelId,IfxDma_ChannelMove_3);
// Change the Move size configuration for channel 1
IfxDma_setChannelMoveSize(chn[1].dma, chn[1].channelId,IfxDma_ChannelMoveSize_64bit);
// Pull down the channel pending request after the first transfer is initiated
IfxDma_setChannelSingleTransfer(chn[1].dma, chn[1].channelId);
// Pull down the channel pending request after the transaction gets over
IfxDma_setChannelSingleTransaction(chn[2].dma, chn[2].channelId);
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[1]);
// Start DMA transaction
IfxDma_Dma_startChannelTransaction(&chn[2]);

Definition at line 1648 of file IfxDma.h.

Referenced by IfxDma_Dma_setChannelTransferCount(), IfxFft_Fft_loadInput(), IfxFft_Fft_unloadOutput(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_writeChannelShadowDisable()

IFX_INLINE void IfxDma_writeChannelShadowDisable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure the shadow pointer register to read only.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Disable the shadow mode to come out of double buffer mode
IfxDma_writeChannelShadowDisable(chn[0].dma, chn[0].channelId);

Definition at line 1675 of file IfxDma.h.

◆ IfxDma_writeChannelShadowEnable()

IFX_INLINE void IfxDma_writeChannelShadowEnable | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Configure the shadow pointer register to write-able.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Enable the shadow mode to come out of double buffer mode
IfxDma_writeChannelShadowEnable(chn[0].dma, chn[0].channelId);

Definition at line 1681 of file IfxDma.h.


iLLD_TC26B: Channel Halt Functions

Functions
Channel Halt Functions
iLLD » DMA » Standard Driver
Collaboration diagram for Channel Halt Functions:

Functions

IFX_INLINE void | IfxDma_clearChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement. More...
IFX_INLINE boolean | IfxDma_getChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement. More...
IFX_INLINE void | IfxDma_setChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelHalt()

IFX_INLINE void IfxDma_clearChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear channel halt request and aknowledgement.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Quit the halt mode of operation
IfxDma_clearChannelHalt(chn[0].dma, chn[0].channelId);

Definition at line 1239 of file IfxDma.h.

◆ IfxDma_getChannelHalt()

IFX_INLINE boolean IfxDma_getChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Get channel halt aknowledgement.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
halt aknowledgement
// Check for the channel halt aknowledgement
while(!(IfxDma_getChannelHalt(chn[0].dma, chn[0].channelId)));

Definition at line 1424 of file IfxDma.h.

◆ IfxDma_setChannelHalt()

IFX_INLINE void IfxDma_setChannelHalt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

setting channel halt request

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Halt the channel processing
IfxDma_setChannelHalt(chn[0].dma,chn[0].channelId);

Definition at line 1583 of file IfxDma.h.


iLLD_TC26B: Double Buffer functions

Functions
Double Buffer functions
iLLD » DMA » Standard Driver
Collaboration diagram for Double Buffer functions:

Functions

IFX_INLINE boolean | IfxDma_getDoubleBufferRead (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag More...
IFX_INLINE boolean | IfxDma_getDoubleBufferSelection (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection More...
IFX_INLINE void | IfxDma_keepDoubleBufferActive (Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active More...
IFX_INLINE void | IfxDma_switchDoubleBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application. More...

Detailed Description

Function Documentation

◆ IfxDma_getDoubleBufferRead()

IFX_INLINE boolean IfxDma_getDoubleBufferRead | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

get information on buffer being read by software and clear the notification flag

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if one of the buffers is being read by software FALSE if one of the buffers is already read by software
// Check the buffer being read (Double buffer operation mode)
while(!(IfxDma_getDoubleBufferRead(chn[0].dma, chn[0].channelId)));

Definition at line 1476 of file IfxDma.h.

◆ IfxDma_getDoubleBufferSelection()

IFX_INLINE boolean IfxDma_getDoubleBufferSelection | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

get Double buffer selection

Parameters
dma | pointer to DMA module
channelId | channelId DMA channel number
Returns
TRUE if buffer 1 is being filled FALSE if buffer 0 is being filled
boolean buffer_being_filled;
// Check the buffer being filled (Double buffer operation mode)
buffer_being_filled = IfxDma_getDoubleBufferSelection(chn[0].dma, chn[0].channelId));

Definition at line 1491 of file IfxDma.h.

◆ IfxDma_keepDoubleBufferActive()

IFX_INLINE void IfxDma_keepDoubleBufferActive | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

keeps the double buffer active

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_keepDoubleBufferActive(chn[0].dma, chn[0].channelId);

Definition at line 1542 of file IfxDma.h.

◆ IfxDma_switchDoubleBuffer()

IFX_INLINE void IfxDma_switchDoubleBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Double buffer switch application.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Apply software buffer switch
IfxDma_switchDoubleBuffer(chn[0].dma, chn[0].channelId);

Definition at line 1669 of file IfxDma.h.


iLLD_TC26B: Interrupt functions

Functions
Interrupt functions
iLLD » DMA » Standard Driver
Collaboration diagram for Interrupt functions:

Functions

IFX_INLINE void | IfxDma_clearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag. More...
IFX_INLINE void | IfxDma_disableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger. More...
IFX_INLINE void | IfxDma_enableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelPatternDetectionInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapDestinationBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapSourceBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_getChannelPatternDetectionOldValue (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getSrcPointer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel. More...
IFX_INLINE void | IfxDma_setChannelInterruptServiceRequest (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software. More...

Detailed Description

Function Documentation

◆ IfxDma_clearChannelInterrupt()

IFX_INLINE void IfxDma_clearChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Clear a channel transfer interrupt flag.

Parameters
dma | pointer to DMA module
channelId | channel for which the interrupt flag should be cleared
Returns
None

see Dma.INTSR

Definition at line 1245 of file IfxDma.h.

Referenced by IfxDma_Dma_clearChannelInterrupt(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), and IfxQspi_SpiSlave_write().

◆ IfxDma_disableChannelInterrupt()

IFX_INLINE void IfxDma_disableChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Disable channel interrupt trigger.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_disableChannelInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1270 of file IfxDma.h.

◆ IfxDma_enableChannelInterrupt()

IFX_INLINE void IfxDma_enableChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable channel interrupt trigger.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
IfxDma_enableChannelInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1314 of file IfxDma.h.

◆ IfxDma_getAndClearChannelInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set
// wait for the end of transaction for intended channel by checking the channel interrupt flag
// and clear it once it is set and checked
// Wait till end of the transaction
while(!(IfxDma_getAndClearChannelInterrupt(chn[2].dma, chn[2].channelId)));

Definition at line 1358 of file IfxDma.h.

Referenced by IfxDma_Dma_getAndClearChannelInterrupt(), IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiSlave_isrDmaReceive(), IfxQspi_SpiSlave_isrDmaTransmit(), and IfxQspi_SpiSlave_isrError().

◆ IfxDma_getAndClearChannelPatternDetectionInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the pattern detection interrupt flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if pattern detection for a given channel is found FALSE if pattern detection for a given channel is not found
// wait till pattern match is found for given channel
// and clear it once it is set and checked
// Wait for the pattern detection
while(!(IfxDma_getAndClearChannelPatternDetectionInterrupt(chn[0].dma, chn[0].channelId)));

Definition at line 1373 of file IfxDma.h.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiSlave_isrDmaReceive(), and IfxQspi_SpiSlave_isrDmaTransmit().

◆ IfxDma_getAndClearChannelWrapDestinationBufferInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the status of channel wrap destination buffer interrupt trigger flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if wrap destination buffer interrupt trigger flag is set FALSE if wrap destination buffer interrupt trigger flag is not set or get cleared already
// wait for the destination buffer wrap interrupt flag
// and clear it once it is set and checked
boolean destinationWrapFlag;
destinationWrapFlag = IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1388 of file IfxDma.h.

◆ IfxDma_getAndClearChannelWrapSourceBufferInterrupt()

IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns and clears the status of channel wrap source buffer interrupt trigger flag.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if wrap source buffer interrupt trigger flag is set FALSE if wrap source buffer interrupt trigger flag is not set or get cleared already
// wait for the source buffer wrap interrupt flag
// and clear it once it is set and checked
boolean sourceWrapFlag;
sourceWrapFlag = IfxDma_getAndClearChannelWrapSourceBufferInterrupt(chn[0].dma, chn[0].channelId);

Definition at line 1403 of file IfxDma.h.

◆ IfxDma_getChannelInterrupt()

IFX_INLINE boolean IfxDma_getChannelInterrupt | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Return a channel transfer interrupt flag.

Parameters
dma | pointer to DMA module
channelId | channel for which the interrupt flag should be returned
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

see Dma.INTSR

Definition at line 1430 of file IfxDma.h.

Referenced by IfxDma_Dma_getChannelInterrupt().

◆ IfxDma_getChannelPatternDetectionOldValue()

IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
TRUE if corresponding pattern comparison operation found a pattern match in previous DMA read move or not FALSE if corresponding pattern comparison operation did not find a pattern match in previous DMA read move
boolean patternDetectOldVal;
// Check the old value of the pattern detection
patternDetectOldVal = IfxDma_getChannelPatternDetectionOldValue(chn[0].dma, chn[0].channelId);

Definition at line 1440 of file IfxDma.h.

◆ IfxDma_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for given DMA channel.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
SRC pointer for given DMA channel

Definition at line 1510 of file IfxDma.h.

Referenced by IfxDma_Dma_getSrcPointer(), IfxDma_Dma_initChannel(), IfxFft_Fft_initDma(), IfxFft_Fft_unloadOutput(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_setChannelInterruptServiceRequest()

IFX_INLINE void IfxDma_setChannelInterruptServiceRequest | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Setting of channel interrupt service request by software.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None
// Set the channel interrupt service request through software
IfxDma_setChannelInterruptServiceRequest(chn[0].dma, chn[0].channelId);

Definition at line 1589 of file IfxDma.h.

Referenced by IfxQspi_SpiSlave_write().


iLLD_TC26B: How to use the DMA Interface driver?

How to use the DMA Interface driver?
iLLD » DMA
Collaboration diagram for How to use the DMA Interface driver?:

The DMA interface driver provides a default configuration for data moves without intervention of the CPU or other on chip devices.

In the following sections it will be described, how to integrate the driver into the application framework for different use cases.

Preparation

Include Files

Include following header file into your C code:

#include <Dma/Dma/IfxDma_Dma.h>
#include <Vadc/Adc/IfxVadc_Adc.h>

Module initialisation

Declare the dma handle as a global variable:

// DMA handle
IfxDma_Dma dma;

Initialize the DMA with following code:

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
// IfxDma_Dma dma; // declared globally
IfxDma_Dma_initModule(&dma, &dmaConfig);

This only has to be done once in the application.

The "IfxDma_Dma dma" handle should either be declared as a global variable (as shown in this example), or it can be created locally if desired:

IfxDma_Dma dma;
IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);

Memory-to-Memory Transfers

A large amount of data should be copied between SRI based memories, e.g. from Flash into the DSPR of the current CPU. It's recommended to use 256 bit moves for this purpose for best performance.

This requires, that source and target locations are 256 bit (32 byte) aligned. With the GCC compiler this can be achieved by adding attribute ((aligned(64))) to the arrays:

#define MEMORY_TRANSFER_NUM_WORDS 1024
uint32 __attribute__ ((aligned(64))) memoryDestination[MEMORY_TRANSFER_NUM_WORDS];

Channel configuration and handling for the data move:

// construct the channel configuration
IfxDma_Dma_ChannelConfig chnCfg;
IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
// select DMA channel which should be used
chnCfg.channelId = IfxDma_ChannelId_0;
// source and destination address
chnCfg.sourceAddress = (uint32)0x80000000; // somewhere in flash section, here: start of PFlash (only for demo)
chnCfg.destinationAddress = (uint32)memoryDestination;
// move size, transfer count and request/operation mode
chnCfg.moveSize = IfxDma_ChannelMoveSize_256bit;
chnCfg.transferCount = (4 * MEMORY_TRANSFER_NUM_WORDS) / 32; // e.g. 1024 words require 128 * 256 bit moves
chnCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
// transfer configuration into DMA channel registers
IfxDma_Dma_Channel chn;
IfxDma_Dma_initChannel(&chn, &chnCfg);
// start transfer and wait until it's finished
IfxDma_Dma_startChannelTransaction(&chn);
while( IfxDma_Dma_isChannelTransactionPending(&chn) == TRUE );

Peripheral-to-Memory Transfers

The content of 8 ADC result registers should be transfered to a memory location in DSPR whenever an VADC autoscan has been finished. After the DMA transaction, an interrupt should be triggered so that the CPU can process the conversion results.

We use following global variables:

// buffer for autoscanned conversion result values
#define NUM_SCANNED_CHANNELS 8
static uint16 vadcResultBuffer[NUM_SCANNED_CHANNELS];
// VADC handle
IfxVadc_Adc vadc;
// VADC group handle
static IfxVadc_Adc_Group adcGroup;
// DMA channel handle
static IfxDma_Dma_Channel dmaChn;

Create an interrupt handler for the DMA channel request:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_DMA_CH0 1
IFX_INTERRUPT(dmaCh0ISR, 0, IFX_INTPRIO_DMA_CH0)
{
// ...
// do something with the conversion results in vadcResultBuffer[]
// ...
// re-init DMA channel destination address
IfxDma_Dma_setChannelDestinationAddress(&dmaChn, ADDR_CPU_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]));
// start new transaction
IfxDma_Dma_setChannelTransferCount(&dmaChn, NUM_SCANNED_CHANNELS);
{
uint32 channels = 0xff; // all 8 channels
uint32 mask = 0xff; // modify the selection of all channels
// configure autoscan (single shot, not continuous scan)
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
}
}

ADC configuration:

// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
adcConfig.startupCalibration = TRUE;
// initialize module
// IfxVadc_Adc vadc; // declared globally
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// initialize the group
//IfxVadc_Adc_Group adcGroup; // defined globally
adcGroupConfig.groupId = IfxVadc_GroupId_0;
adcGroupConfig.master = adcGroupConfig.groupId;
// enable all arbiter request sources
adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
// enable all gates in "always" mode (no edge detection)
adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
{
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
// initialize the channels
for(int i=0; i<NUM_SCANNED_CHANNELS; ++i) {
adcChannelConfig.channelId = (IfxVadc_ChannelId)i;
adcChannelConfig.resultRegister = IfxVadc_ChannelResult_0;
// initialize the channel
IfxVadc_Adc_Channel adcChannel;
IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
}
}
adcGroup.group->RCR[0].B.SRGEN = 1; // interrupt when new result is available
// send service request to DMA Channel 0
IfxSrc_init((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0], IfxSrc_Tos_dma, 0);
IfxSrc_enable((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0]);

And finally the DMA channel configuration

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
{
// construct the channel configuration
IfxDma_Dma_ChannelConfig chnCfg;
IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
// select DMA channel which should be used
chnCfg.channelId = IfxDma_ChannelId_0;
chnCfg.hardwareRequestEnabled = TRUE; // will be triggered from VADC service request
// interrupt configuration
chnCfg.channelInterruptEnabled = TRUE; // service request from DMA after all words have been transfered
chnCfg.channelInterruptPriority = IFX_INTPRIO_DMA_CH0;
chnCfg.channelInterruptTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// source and destination address
chnCfg.sourceAddress = (uint32)&adcGroup.group->RES[0]; // first result register
chnCfg.sourceCircularBufferEnabled = TRUE;
chnCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_1; // keep this address
chnCfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]); // move into result buffer
chnCfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1; // increment once (=2 bytes) with each write
// move size, transfer count and request/operation mode
chnCfg.moveSize = IfxDma_ChannelMoveSize_16bit;
chnCfg.transferCount = NUM_SCANNED_CHANNELS; // for the scanned channels
chnCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous; // hw request enable remains set after transaction
// transfer configuration into DMA channel registers
// IfxDma_Dma_Channel dmaChn; // declared globally
IfxDma_Dma_initChannel(&dmaChn, &chnCfg);
// configure IRQ handler which will be called after all result registers have been transfered
IfxCpu_Irq_installInterruptHandler(&dmaCh0ISR, IFX_INTPRIO_DMA_CH0);
// enable CPU interrupts
IfxCpu_enableInterrupts();
}

In order to start the initial channel conversions, use:

{
uint32 channels = 0xff; // all 8 channels
uint32 mask = 0xff; // modify the selection of all channels
// configure and start autoscan (single shot, not continuous mode)
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
}

DMA will transfer the results to DSPR during the autoscan (whenever a new result is availale), and invoke the dmaCh0ISR function once all channels have been converted.

The ISR will re-configure the DMA channel and re-start the autoscan.

Linked Lists

Linked lists allow to initiate multiple DMA transactions from independent transaction sets which are typically stored in a DSPR memory location, and fetched and executed from the DMA channel without further CPU interaction.

Following example demonstrates, how 5 different transactions can be initiated from a single request. We copy the data of 5 CAN message objects to a DSPR location.

Includes and global variables:

#include <Dma/Dma/IfxDma_Dma.h>
#include <Scu/Std/IfxScuWdt.h>
#include <IfxCan_reg.h>
// DMA channel handle
IfxDma_Dma_Channel chn;
// Linked List storage
// IMPORTANT: it has to be aligned to an 256bit address, otherwise DMA can't read it
#define NUM_LINKED_LIST_ITEMS 5
IFX_ALIGN(256) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
// transfer these values to various CAN_MODATA[LH] registers via linked lists
#define NUM_TRANSFERED_WORDS 2
uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS];
const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
(uint32)&CAN_MODATAL0,
(uint32)&CAN_MODATAL1,
(uint32)&CAN_MODATAL2,
(uint32)&CAN_MODATAL3,
(uint32)&CAN_MODATAL4,
};

Following code to prepare CAN for this demo:

// enable CAN (no Ifx LLD available yet)
{
uint32 passwd = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(passwd);
CAN_CLC.U = 0x0100;
if( CAN_CLC.U ); // synch access
// select f_clc as kernel clock
CAN_MCR.B.CLKSEL = 1;
// configure fractional divider
CAN_FDR.U = 0x43ff;
// wait until RAM has been initialized
while( CAN_PANCTR.B.BUSY );
IfxScuWdt_setCpuEndinit(passwd);
}

Build a linked list

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
// initial channel configuration
IfxDma_Dma_ChannelConfig cfg;
IfxDma_Dma_initChannelConfig(&cfg, &dma);
// following settings are used by all transactions
cfg.transferCount = NUM_TRANSFERED_WORDS;
cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
// generate linked list items
for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
cfg.destinationAddress = destinationAddresses[i];
// address to next transaction set
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
// transfer first transaction set into DMA channel
if( i == 0 ) {
IfxDma_Dma_initChannel(&chn, &cfg);
}
// transfer into linked list storage
IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
if( i == 0 ) {
// - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
linkedList[i].CHCSR.B.SIT = 1;
} else {
// - activate SCH (transaction request) for each entry, except for the first one (linked list terminated here)
linkedList[i].CHCSR.B.SCH = 1;
}
}

The transfer can be started via software with:

// clear service request flag
(IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
// start linked list transaction
IfxDma_Dma_startChannelTransaction(&chn);
// wait for service request which is triggered at the end of linked list transfers
while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );

In order to synchronize with the end of linked list operations, it's recommended to poll the service request flag (triggered via linkedList[NUM_LINKED_LIST_ITEMS-1].CHCSR.B.SIT after the last word has been transfered), and not the transaction count as shown before, because a linked list will initiate multiple transactions.


iLLD_TC26B: DMA

Modules
DMA
iLLD » DMA
Collaboration diagram for DMA:

Modules

Data Structures
Module Initialization
Channel Initialization
Linked Lists
Channel Transactions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » DMA » DMA
Collaboration diagram for Data Structures:

Data Structures

struct | IfxDma_Dma
DMA base address data structure (Module handle) More...
struct | IfxDma_Dma_Channel
Channel handle. More...
struct | IfxDma_Dma_ChannelConfig
Configuration data structure of the channel. More...
struct | IfxDma_Dma_Config
Configuration data structure of the Module. More...

Detailed Description

Data Structure Documentation

◆ IfxDma_Dma

struct IfxDma_Dma

DMA base address data structure (Module handle)

Definition at line 443 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA * dma Specifies the pointer to the DMA registers.

◆ IfxDma_Dma_Channel

struct IfxDma_Dma_Channel

Channel handle.

Definition at line 454 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA_CH * | channel | Specifies the pointer to DMA channel registers.
IfxDma_ChannelId | channelId | Specifies the DMA channel.
Ifx_DMA * | dma | Specifies the pointer to the DMA registers.

◆ IfxDma_Dma_ChannelConfig

struct IfxDma_Dma_ChannelConfig

Configuration data structure of the channel.

Definition at line 463 of file IfxDma_Dma.h.

Collaboration diagram for IfxDma_Dma_ChannelConfig:
[legend]
Data Fields
IfxDma_ChannelMove | blockMode | Number of moves in a transfer.
IfxDma_ChannelBusPriority | busPriority | Bus priority selection.
IfxDma_ChannelId | channelId | Specifies the channel being used.
IfxDma_ChannelInterruptControl | channelInterruptControl | The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
boolean | channelInterruptEnabled | The channel transfer interrupt should be triggered. See also channelInterruptControl.
Ifx_Priority | channelInterruptPriority | Priority of the channel interrupt trigger.
IfxSrc_Tos | channelInterruptTypeOfService | Interrupt service provider.
uint32 | destinationAddress | Destination address for the DMA channel.
IfxDma_ChannelIncrementCircular | destinationAddressCircularRange | Determines which part of the destination address remains unchanged and therby not updated after each move.
IfxDma_ChannelIncrementDirection | destinationAddressIncrementDirection | Decides whether the destination address offset after each move should be added or decremented from the exisiting address.
IfxDma_ChannelIncrementStep | destinationAddressIncrementStep | Describes the address offset with which the destination address should be modified after each move.
boolean | destinationCircularBufferEnabled | Enables/Disables the destination circular buffering.
boolean | hardwareRequestEnabled | Enabling channel transaction via hardware request.
uint8 | interruptRaiseThreshold | The value of the transferCount at which the interrupt should be raised.
IfxDma_Dma * | module | Specifies pointer to the IfxDma_Dma module handle.
IfxDma_ChannelMoveSize | moveSize | Read/write data size.
IfxDma_ChannelOperationMode | operationMode | keep enable/disable the hardware channel request after a transaction
IfxDma_ChannelPattern | pattern | Pattern selection operation modes.
uint32 | readDataCrc | Checksum for read data of the channel.
IfxDma_ChannelRequestMode | requestMode | A service request initiates a single transfer, or the complete transaction.
IfxDma_ChannelRequestSource | requestSource | Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of previous channel will trigger the next channel request.
uint32 | shadowAddress | Initial content of shadow address for the DMA channel.
IfxDma_ChannelShadow | shadowControl | selects the shadow transfer mode
uint32 | sourceAddress | Source address for the DMA channel.
IfxDma_ChannelIncrementCircular | sourceAddressCircularRange | Determines which part of the source address remains unchanged and therby not updated after each move.
IfxDma_ChannelIncrementDirection | sourceAddressIncrementDirection | Decides whether the source address offset after each move should be added or decremented from the exisiting address.
IfxDma_ChannelIncrementStep | sourceAddressIncrementStep | Describes the address offset with which the source address should be modified after each move.
boolean | sourceCircularBufferEnabled | Enables/Disables the source circular buffering.
uint32 | sourceDestinationAddressCrc | Checksum for source and destination address of channel.
boolean | timestampEnabled | Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction.
boolean | transactionRequestLostInterruptEnabled | Enables/Disables the channel transaction request lost interrupt.
uint16 | transferCount | Number of transfers in a transaction.
boolean | wrapDestinationInterruptEnabled | An interrupt should be triggered whenever destination address is wrapped.
boolean | wrapSourceInterruptEnabled | An interrupt should be triggered whenever source address is wrapped.

◆ IfxDma_Dma_Config

struct IfxDma_Dma_Config

Configuration data structure of the Module.

Definition at line 503 of file IfxDma_Dma.h.

Data Fields
Ifx_DMA * dma Specifies the pointer to the DMA registers.


iLLD_TC26B: Module Initialization

Functions
Module Initialization
iLLD » DMA » DMA
Collaboration diagram for Module Initialization:

Functions

IFX_EXTERN void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
IFX_EXTERN void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
IFX_EXTERN void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_createModuleHandle()

IFX_EXTERN void IfxDma_Dma_createModuleHandle | ( | IfxDma_Dma * | dmaHandle,
 |  | Ifx_DMA * | dma
 | ) |  |

initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available.

Parameters
dmaHandle | pointer to the DMA module handle
dma | pointer to the DMA registers
Returns
None
IfxDma_Dma dma;
IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);

Definition at line 104 of file IfxDma_Dma.c.

Referenced by IfxFft_Fft_initDma(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_Dma_deInitChannel()

IFX_EXTERN void IfxDma_Dma_deInitChannel | ( | IfxDma_Dma * | dma,
 |  | IfxDma_ChannelId | channel
 | ) |  |

de-initialize the DMA channel

Parameters
dma | pointer to the DMA module handle
channel | the DMA channel ID
Returns
None

Definition at line 110 of file IfxDma_Dma.c.

◆ IfxDma_Dma_initModule()

IFX_EXTERN void IfxDma_Dma_initModule | ( | IfxDma_Dma * | dma,
 |  | const IfxDma_Dma_Config * | config
 | ) |  |

Initialize the DMA module.

Parameters
dma | pointer to the DMA module handle
config | Pointer to configuration structure of the DMA module
Returns
None

See Memory-to-Memory Transfers

Definition at line 212 of file IfxDma_Dma.c.

◆ IfxDma_Dma_initModuleConfig()

IFX_EXTERN void IfxDma_Dma_initModuleConfig | ( | IfxDma_Dma_Config * | config,
 |  | Ifx_DMA * | dma
 | ) |  |

initialize the DMA module configuration

Parameters
config | Pointer to configuration structure of the DMA module
dma | pointer to the DMA registers
Returns
None

See Memory-to-Memory Transfers

Definition at line 218 of file IfxDma_Dma.c.


iLLD_TC26B: Channel Initialization

Functions
Channel Initialization
iLLD » DMA » DMA
Collaboration diagram for Channel Initialization:

Functions

IFX_EXTERN void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_initChannel()

IFX_EXTERN void IfxDma_Dma_initChannel | ( | IfxDma_Dma_Channel * | channel,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

initialize the DMA channel

Parameters
channel | pointer to the DMA base address and channel ID
config | pointer to the DMA default channel configuration structure
Returns
None

See Memory-to-Memory Transfers

Definition at line 124 of file IfxDma_Dma.c.

Referenced by IfxFft_Fft_initDma(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxDma_Dma_initChannelConfig()

IFX_EXTERN void IfxDma_Dma_initChannelConfig | ( | IfxDma_Dma_ChannelConfig * | config,
 |  | IfxDma_Dma * | dma
 | ) |  |

initialize the DMA module channel configuration

Parameters
config | pointer to the DMA default channel configuration structure
dma | pointer to the DMA module handle
Returns
None

See Memory-to-Memory Transfers

Definition at line 159 of file IfxDma_Dma.c.

Referenced by IfxFft_Fft_initDma(), IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().


iLLD_TC26B: Linked Lists

Functions
Linked Lists
iLLD » DMA » DMA
Collaboration diagram for Linked Lists:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_Dma_getSrcPointer (IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel. More...
IFX_EXTERN void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_Dma_getSrcPointer ( IfxDma_Dma_Channel * channel )

Returns the SRC pointer for given DMA channel.

Parameters
channel pointer to the DMA base address and channel ID
Returns
SRC pointer for given DMA channel

Definition at line 718 of file IfxDma_Dma.h.

◆ IfxDma_Dma_initLinkedListEntry()

IFX_EXTERN void IfxDma_Dma_initLinkedListEntry | ( | void * | ptrToAddress,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

linked list functionality within the DMA module

Parameters
ptrToAddress | pointer to the memory location where the linked list entry should be stored
config | pointer to the DMA default channel configuration structure
Returns
None

See Linked Lists

Definition at line 206 of file IfxDma_Dma.c.


iLLD_TC26B: Channel Transactions

Functions
Channel Transactions
iLLD » DMA » DMA
Collaboration diagram for Channel Transactions:

Functions

IFX_INLINE void | IfxDma_Dma_clearChannelInterrupt (IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_getAndClearChannelInterrupt (IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_Dma_getChannelInterrupt (IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_isChannelTransactionPending (IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelDestinationAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelSourceAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelTransferCount (IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction. More...
IFX_INLINE void | IfxDma_Dma_startChannelTransaction (IfxDma_Dma_Channel *channel)
initiate the DMA move transaction More...

Detailed Description

Function Documentation

◆ IfxDma_Dma_clearChannelInterrupt()

IFX_INLINE void IfxDma_Dma_clearChannelInterrupt ( IfxDma_Dma_Channel * channel )

Clear a channel transfer interrupt flag.

Parameters
channel pointer to the DMA base address and channel ID
Returns
None

Definition at line 700 of file IfxDma_Dma.h.

◆ IfxDma_Dma_getAndClearChannelInterrupt()

IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt ( IfxDma_Dma_Channel * channel )

Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

Definition at line 706 of file IfxDma_Dma.h.

◆ IfxDma_Dma_getChannelInterrupt()

IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt ( IfxDma_Dma_Channel * channel )

Return a channel transfer interrupt flag.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if the interrupt flag is set FALSE if the interrupt flag is not set

Definition at line 712 of file IfxDma_Dma.h.

◆ IfxDma_Dma_isChannelTransactionPending()

IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending ( IfxDma_Dma_Channel * channel )

Poll for an ongoing transaction.

Parameters
channel pointer to the DMA base address and channel ID
Returns
TRUE if a transaction request for the given channel is pending

See Memory-to-Memory Transfers

Definition at line 724 of file IfxDma_Dma.h.

◆ IfxDma_Dma_setChannelDestinationAddress()

IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | address
 | ) |  |

Re-initialize the destination address after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
address | is the Initial address of the destination pointer
Returns
None

See Memory-to-Memory Transfers

Definition at line 730 of file IfxDma_Dma.h.

◆ IfxDma_Dma_setChannelSourceAddress()

IFX_INLINE void IfxDma_Dma_setChannelSourceAddress | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | address
 | ) |  |

Re-initialize the source address after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
address | is the Initial address of the source pointer
Returns
None

See Memory-to-Memory Transfers

Definition at line 736 of file IfxDma_Dma.h.

◆ IfxDma_Dma_setChannelTransferCount()

IFX_INLINE void IfxDma_Dma_setChannelTransferCount | ( | IfxDma_Dma_Channel * | channel,
 |  | uint32 | transferCount
 | ) |  |

Re-initialize the transfer count after a transaction.

Parameters
channel | pointer to the DMA base address and channel ID
transferCount | value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
Returns
None

See Memory-to-Memory Transfers

Definition at line 742 of file IfxDma_Dma.h.

◆ IfxDma_Dma_startChannelTransaction()

IFX_INLINE void IfxDma_Dma_startChannelTransaction ( IfxDma_Dma_Channel * channel )

initiate the DMA move transaction

Parameters
channel pointer to the DMA base address and channel ID
Returns
None

See Memory-to-Memory Transfers

Definition at line 748 of file IfxDma_Dma.h.


iLLD_TC26B: IfxDma_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxDma_cfg.h File Reference
iLLD » DMA

DMA on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxDma_cfg.h:

Go to the source code of this file.

Macros

#define | IFXDMA_NUM_CHANNELS 48
Number of channels. More...
#define | IFXDMA_ERROR_S (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)
Error mask for move engine source error. More...
#define | IFXDMA_ERROR_D (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)
Error mask for move engine destination error. More...
#define | IFXDMA_ERROR_SPB (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)
Error mask for bus error on SPB. More...
#define | IFXDMA_ERROR_SRI (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)
Error mask for bus error on SRI. More...
#define | IFXDMA_ERROR_RAM (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)
Error mask for RAM error. More...
#define | IFXDMA_ERROR_SLL (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)
Error mask for SLL (safe linked list CRC checksum) error. More...
#define | IFXDMA_ERROR_DLL (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)
Error mask for DLL (failed linked list load) error. More...
#define | IFXDMA_NUM_MODULES (1)

Enumerations

enum IfxDma_ChannelId {
IfxDma_ChannelId_none = -1,
IfxDma_ChannelId_0 = 0,
IfxDma_ChannelId_1,
IfxDma_ChannelId_2,
IfxDma_ChannelId_3,
IfxDma_ChannelId_4,
IfxDma_ChannelId_5,
IfxDma_ChannelId_6,
IfxDma_ChannelId_7,
IfxDma_ChannelId_8,
IfxDma_ChannelId_9,
IfxDma_ChannelId_10,
IfxDma_ChannelId_11,
IfxDma_ChannelId_12,
IfxDma_ChannelId_13,
IfxDma_ChannelId_14,
IfxDma_ChannelId_15,
IfxDma_ChannelId_16,
IfxDma_ChannelId_17,
IfxDma_ChannelId_18,
IfxDma_ChannelId_19,
IfxDma_ChannelId_20,
IfxDma_ChannelId_21,
IfxDma_ChannelId_22,
IfxDma_ChannelId_23,
IfxDma_ChannelId_24,
IfxDma_ChannelId_25,
IfxDma_ChannelId_26,
IfxDma_ChannelId_27,
IfxDma_ChannelId_28,
IfxDma_ChannelId_29,
IfxDma_ChannelId_30,
IfxDma_ChannelId_31,
IfxDma_ChannelId_32,
IfxDma_ChannelId_33,
IfxDma_ChannelId_34,
IfxDma_ChannelId_35,
IfxDma_ChannelId_36,
IfxDma_ChannelId_37,
IfxDma_ChannelId_38,
IfxDma_ChannelId_39,
IfxDma_ChannelId_40,
IfxDma_ChannelId_41,
IfxDma_ChannelId_42,
IfxDma_ChannelId_43,
IfxDma_ChannelId_44,
IfxDma_ChannelId_45,
IfxDma_ChannelId_46,
IfxDma_ChannelId_47
}
DMA channel resources definition. More...

Detailed Description

DMA on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDma_cfg.h.

Macro Definition Documentation

◆ IFXDMA_ERROR_D

#define IFXDMA_ERROR_D (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)

Error mask for move engine destination error.

Definition at line 55 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_DLL

#define IFXDMA_ERROR_DLL (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)

Error mask for DLL (failed linked list load) error.

Definition at line 75 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_RAM

#define IFXDMA_ERROR_RAM (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)

Error mask for RAM error.

Definition at line 67 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_S

#define IFXDMA_ERROR_S (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)

Error mask for move engine source error.

Definition at line 51 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SLL

#define IFXDMA_ERROR_SLL (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)

Error mask for SLL (safe linked list CRC checksum) error.

Definition at line 71 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SPB

#define IFXDMA_ERROR_SPB (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)

Error mask for bus error on SPB.

Definition at line 59 of file IfxDma_cfg.h.

◆ IFXDMA_ERROR_SRI

#define IFXDMA_ERROR_SRI (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)

Error mask for bus error on SRI.

Definition at line 63 of file IfxDma_cfg.h.

◆ IFXDMA_NUM_CHANNELS

#define IFXDMA_NUM_CHANNELS 48

Number of channels.

Definition at line 47 of file IfxDma_cfg.h.

◆ IFXDMA_NUM_MODULES

#define IFXDMA_NUM_MODULES (1)

Definition at line 77 of file IfxDma_cfg.h.

Enumeration Type Documentation

◆ IfxDma_ChannelId

enum IfxDma_ChannelId

DMA channel resources definition.

Enumerator
IfxDma_ChannelId_none | None of the Ifx_DMA Channels.
IfxDma_ChannelId_0 | Ifx_DMA Channel 0.
IfxDma_ChannelId_1 | Ifx_DMA Channel 1.
IfxDma_ChannelId_2 | Ifx_DMA Channel 2.
IfxDma_ChannelId_3 | Ifx_DMA Channel 3.
IfxDma_ChannelId_4 | Ifx_DMA Channel 4.
IfxDma_ChannelId_5 | Ifx_DMA Channel 5.
IfxDma_ChannelId_6 | Ifx_DMA Channel 6.
IfxDma_ChannelId_7 | Ifx_DMA Channel 7.
IfxDma_ChannelId_8 | Ifx_DMA Channel 8.
IfxDma_ChannelId_9 | Ifx_DMA Channel 9.
IfxDma_ChannelId_10 | Ifx_DMA Channel 10.
IfxDma_ChannelId_11 | Ifx_DMA Channel 11.
IfxDma_ChannelId_12 | Ifx_DMA Channel 12.
IfxDma_ChannelId_13 | Ifx_DMA Channel 13.
IfxDma_ChannelId_14 | Ifx_DMA Channel 14.
IfxDma_ChannelId_15 | Ifx_DMA Channel 15.
IfxDma_ChannelId_16 | Ifx_DMA Channel 16.
IfxDma_ChannelId_17 | Ifx_DMA Channel 17.
IfxDma_ChannelId_18 | Ifx_DMA Channel 18.
IfxDma_ChannelId_19 | Ifx_DMA Channel 19.
IfxDma_ChannelId_20 | Ifx_DMA Channel 20.
IfxDma_ChannelId_21 | Ifx_DMA Channel 21.
IfxDma_ChannelId_22 | Ifx_DMA Channel 22.
IfxDma_ChannelId_23 | Ifx_DMA Channel 23.
IfxDma_ChannelId_24 | Ifx_DMA Channel 24.
IfxDma_ChannelId_25 | Ifx_DMA Channel 25.
IfxDma_ChannelId_26 | Ifx_DMA Channel 26.
IfxDma_ChannelId_27 | Ifx_DMA Channel 27.
IfxDma_ChannelId_28 | Ifx_DMA Channel 28.
IfxDma_ChannelId_29 | Ifx_DMA Channel 29.
IfxDma_ChannelId_30 | Ifx_DMA Channel 30.
IfxDma_ChannelId_31 | Ifx_DMA Channel 31.
IfxDma_ChannelId_32 | Ifx_DMA Channel 32.
IfxDma_ChannelId_33 | Ifx_DMA Channel 33.
IfxDma_ChannelId_34 | Ifx_DMA Channel 34.
IfxDma_ChannelId_35 | Ifx_DMA Channel 35.
IfxDma_ChannelId_36 | Ifx_DMA Channel 36.
IfxDma_ChannelId_37 | Ifx_DMA Channel 37.
IfxDma_ChannelId_38 | Ifx_DMA Channel 38.
IfxDma_ChannelId_39 | Ifx_DMA Channel 39.
IfxDma_ChannelId_40 | Ifx_DMA Channel 40.
IfxDma_ChannelId_41 | Ifx_DMA Channel 41.
IfxDma_ChannelId_42 | Ifx_DMA Channel 42.
IfxDma_ChannelId_43 | Ifx_DMA Channel 43.
IfxDma_ChannelId_44 | Ifx_DMA Channel 44.
IfxDma_ChannelId_45 | Ifx_DMA Channel 45.
IfxDma_ChannelId_46 | Ifx_DMA Channel 46.
IfxDma_ChannelId_47 | Ifx_DMA Channel 47.

Definition at line 85 of file IfxDma_cfg.h.


iLLD_TC26B: IfxDma_Dma.h File Reference

  • Dma
  • Dma
Data Structures | Functions
IfxDma_Dma.h File Reference
iLLD » DMA

DMA DMA details. More...

#include "_Impl/IfxDma_cfg.h"
#include "Dma/Std/IfxDma.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxDma_Dma.h:

Go to the source code of this file.

Data Structures

struct | IfxDma_Dma
DMA base address data structure (Module handle) More...
struct | IfxDma_Dma_Channel
Channel handle. More...
struct | IfxDma_Dma_ChannelConfig
Configuration data structure of the channel. More...
struct | IfxDma_Dma_Config
Configuration data structure of the Module. More...

Functions

IFX_EXTERN void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
IFX_EXTERN void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
IFX_EXTERN void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...
IFX_EXTERN void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
IFX_EXTERN void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_Dma_getSrcPointer (IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel. More...
IFX_EXTERN void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...
IFX_INLINE void | IfxDma_Dma_clearChannelInterrupt (IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_getAndClearChannelInterrupt (IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_Dma_getChannelInterrupt (IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_Dma_isChannelTransactionPending (IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelDestinationAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelSourceAddress (IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction. More...
IFX_INLINE void | IfxDma_Dma_setChannelTransferCount (IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction. More...
IFX_INLINE void | IfxDma_Dma_startChannelTransaction (IfxDma_Dma_Channel *channel)
initiate the DMA move transaction More...

Detailed Description

DMA DMA details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDma_Dma.h.


iLLD_TC26B: IfxDma.h File Reference

  • Dma
  • Std
Enumerations | Functions
IfxDma.h File Reference
iLLD » DMA

DMA basic functionality. More...

#include "_Impl/IfxDma_cfg.h"
#include "IfxDma_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxDma_reg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxDma.h:

Go to the source code of this file.

Enumerations

enum IfxDma_BusMasterMode {
IfxDma_BusMasterMode_user = 0,
IfxDma_BusMasterMode_supervisor = 1
}
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE. More...
enum IfxDma_ChannelBusPriority {
IfxDma_ChannelBusPriority_low = 0,
IfxDma_ChannelBusPriority_medium = 1,
IfxDma_ChannelBusPriority_high = 2
}
Channel Bus Priority definition. More...
enum IfxDma_ChannelIncrementCircular {
IfxDma_ChannelIncrementCircular_none = 0,
IfxDma_ChannelIncrementCircular_2 = 1,
IfxDma_ChannelIncrementCircular_4 = 2,
IfxDma_ChannelIncrementCircular_8 = 3,
IfxDma_ChannelIncrementCircular_16 = 4,
IfxDma_ChannelIncrementCircular_32 = 5,
IfxDma_ChannelIncrementCircular_64 = 6,
IfxDma_ChannelIncrementCircular_128 = 7,
IfxDma_ChannelIncrementCircular_256 = 8,
IfxDma_ChannelIncrementCircular_512 = 9,
IfxDma_ChannelIncrementCircular_1024 = 10,
IfxDma_ChannelIncrementCircular_2048 = 11,
IfxDma_ChannelIncrementCircular_4096 = 12,
IfxDma_ChannelIncrementCircular_8192 = 13,
IfxDma_ChannelIncrementCircular_16384 = 14,
IfxDma_ChannelIncrementCircular_32768 = 15
}
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD. More...
enum IfxDma_ChannelIncrementDirection {
IfxDma_ChannelIncrementDirection_negative = 0,
IfxDma_ChannelIncrementDirection_positive = 1
}
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS. More...
enum IfxDma_ChannelIncrementStep {
IfxDma_ChannelIncrementStep_1 = 0,
IfxDma_ChannelIncrementStep_2 = 1,
IfxDma_ChannelIncrementStep_4 = 2,
IfxDma_ChannelIncrementStep_8 = 3,
IfxDma_ChannelIncrementStep_16 = 4,
IfxDma_ChannelIncrementStep_32 = 5,
IfxDma_ChannelIncrementStep_64 = 6,
IfxDma_ChannelIncrementStep_128 = 7
}
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF. More...
enum IfxDma_ChannelInterruptControl {
IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0,
IfxDma_ChannelInterruptControl_transferCountDecremented = 1
}
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0) More...
enum IfxDma_ChannelMove {
IfxDma_ChannelMove_1 = 0,
IfxDma_ChannelMove_2 = 1,
IfxDma_ChannelMove_4 = 2,
IfxDma_ChannelMove_8 = 3,
IfxDma_ChannelMove_16 = 4,
IfxDma_ChannelMove_3 = 5,
IfxDma_ChannelMove_5 = 6,
IfxDma_ChannelMove_9 = 7
}
DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM. More...
enum IfxDma_ChannelMoveSize {
IfxDma_ChannelMoveSize_8bit = 0,
IfxDma_ChannelMoveSize_16bit = 1,
IfxDma_ChannelMoveSize_32bit = 2,
IfxDma_ChannelMoveSize_64bit = 3,
IfxDma_ChannelMoveSize_128bit = 4,
IfxDma_ChannelMoveSize_256bit = 5
}
DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW. More...
enum IfxDma_ChannelOperationMode {
IfxDma_ChannelOperationMode_single = 0,
IfxDma_ChannelOperationMode_continuous = 1
}
DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE. More...
enum IfxDma_ChannelPattern {
IfxDma_ChannelPattern_0_disable = 0,
IfxDma_ChannelPattern_0_mode1 = 1,
IfxDma_ChannelPattern_0_mode2 = 2,
IfxDma_ChannelPattern_0_mode3 = 3,
IfxDma_ChannelPattern_1_disable = 4,
IfxDma_ChannelPattern_1_mode1 = 5,
IfxDma_ChannelPattern_1_mode2 = 6,
IfxDma_ChannelPattern_1_mode3 = 7
}
Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL. More...
enum IfxDma_ChannelPriority {
IfxDma_ChannelPriority_low = 0,
IfxDma_ChannelPriority_medium = 1,
IfxDma_ChannelPriority_high = 2
}
Channel Priority definition. More...
enum IfxDma_ChannelRequestMode {
IfxDma_ChannelRequestMode_oneTransferPerRequest = 0,
IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1
}
DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT. More...
enum IfxDma_ChannelRequestSource {
IfxDma_ChannelRequestSource_peripheral = 0,
IfxDma_ChannelRequestSource_daisyChain = 1
}
DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL. More...
enum IfxDma_ChannelShadow {
IfxDma_ChannelShadow_none = 0,
IfxDma_ChannelShadow_src = 1,
IfxDma_ChannelShadow_dst = 2,
IfxDma_ChannelShadow_srcDirectWrite = 5,
IfxDma_ChannelShadow_dstDirectWrite = 6,
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8,
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9,
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10,
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11,
IfxDma_ChannelShadow_linkedList = 12,
IfxDma_ChannelShadow_accumulatedLinkedList = 13,
IfxDma_ChannelShadow_safeLinkedList = 14,
IfxDma_ChannelShadow_conditionalLinkedList = 15
}
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT More...
enum IfxDma_HardwareResourcePartition {
IfxDma_HardwareResourcePartition_0 = 0,
IfxDma_HardwareResourcePartition_1,
IfxDma_HardwareResourcePartition_2,
IfxDma_HardwareResourcePartition_3
}
enum IfxDma_MoveEngine {
IfxDma_MoveEngine_0 = 0,
IfxDma_MoveEngine_1 = 1
}
DMA move engine definition. More...
enum IfxDma_SleepMode {
IfxDma_SleepMode_enable = 0,
IfxDma_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DMA.CLC.B.EDIS. More...

Functions

IFX_INLINE boolean | IfxDma_isChannelReset (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_resetChannel() More...
IFX_INLINE void | IfxDma_resetChannel (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel. More...
IFX_INLINE void | IfxDma_clearChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status. More...
IFX_INLINE void | IfxDma_disableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_disableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE void | IfxDma_enableChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request. More...
IFX_INLINE void | IfxDma_enableChannelTransactionLostError (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt. More...
IFX_INLINE boolean | IfxDma_getChannelTransactionRequestLost (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status. More...
IFX_INLINE IfxDma_ChannelIncrementCircular | IfxDma_getCircularRangeCode (uint16 range)
Converts DMA circular range to circular code. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionEnabled (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel. More...
IFX_INLINE boolean | IfxDma_isChannelTransactionPending (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending) More...
IFX_INLINE void | IfxDma_setSleepMode (Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDma_startChannelTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction. More...
IFX_INLINE void | IfxDma_clearErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags. More...
IFX_INLINE void | IfxDma_disableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_disableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineDestinationError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt. More...
IFX_INLINE void | IfxDma_enableMoveEngineSourceError (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt. More...
IFX_INLINE uint32 | IfxDma_getErrorFlags (Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags. More...
IFX_INLINE uint32 | IfxDma_getChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE uint32 | IfxDma_getChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address. More...
IFX_INLINE boolean | IfxDma_getChannelSuspendModeStatus (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status. More...
IFX_INLINE uint32 | IfxDma_getChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count. More...
IFX_INLINE uint32 | IfxDma_getTimestamp (Ifx_DMA *dma)
get the time stamp More...
IFX_INLINE void | IfxDma_setChannelBlockMode (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer. More...
IFX_INLINE void | IfxDma_setChannelContinuousMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request transaction remain enabled. More...
IFX_INLINE void | IfxDma_setChannelDestinationAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address. More...
IFX_INLINE void | IfxDma_setChannelDestinationIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer. More...
IFX_INLINE void | IfxDma_setChannelMoveSize (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move. More...
IFX_INLINE void | IfxDma_setChannelShadow (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer. More...
IFX_INLINE void | IfxDma_setChannelSingleMode (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transaction is disabled, and must be set by software again. More...
IFX_INLINE void | IfxDma_setChannelSingleTransaction (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA transaction. More...
IFX_INLINE void | IfxDma_setChannelSingleTransfer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer. More...
IFX_INLINE void | IfxDma_setChannelSourceAddress (Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address. More...
IFX_INLINE void | IfxDma_setChannelSourceIncrementStep (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer. More...
IFX_INLINE void | IfxDma_setChannelSuspendEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable. More...
IFX_INLINE void | IfxDma_setChannelTransferCount (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction. More...
IFX_INLINE void | IfxDma_writeChannelShadowDisable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only. More...
IFX_INLINE void | IfxDma_writeChannelShadowEnable (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able. More...
IFX_INLINE void | IfxDma_clearChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement. More...
IFX_INLINE boolean | IfxDma_getChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement. More...
IFX_INLINE void | IfxDma_setChannelHalt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request More...
IFX_INLINE boolean | IfxDma_getDoubleBufferRead (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag More...
IFX_INLINE boolean | IfxDma_getDoubleBufferSelection (Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection More...
IFX_INLINE void | IfxDma_keepDoubleBufferActive (Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active More...
IFX_INLINE void | IfxDma_switchDoubleBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application. More...
IFX_INLINE void | IfxDma_clearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag. More...
IFX_INLINE void | IfxDma_disableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger. More...
IFX_INLINE void | IfxDma_enableChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to this function. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelPatternDetectionInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapDestinationBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getAndClearChannelWrapSourceBufferInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag. More...
IFX_INLINE boolean | IfxDma_getChannelInterrupt (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag. More...
IFX_INLINE boolean | IfxDma_getChannelPatternDetectionOldValue (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getSrcPointer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel. More...
IFX_INLINE void | IfxDma_setChannelInterruptServiceRequest (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software. More...
IFX_INLINE void | IfxDma_setChannelHardwareResourcePartition (Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
Configure the hardware resource partition. More...
IFX_INLINE void | IfxDma_setInterruptControlValue (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
Sets the Interrupt control value. More...
IFX_INLINE void | IfxDma_setCircularBufferDestinationLength (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Destination Length. More...
IFX_INLINE void | IfxDma_setCircularBufferSourceLength (Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Source Length. More...
IFX_INLINE void | IfxDma_enableSourceCircularBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Source Circular Buffer. More...
IFX_INLINE void | IfxDma_enableDestinationCircularBuffer (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Destination Circular Buffer. More...
IFX_INLINE uint32 | IfxDma_getDataCRC (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Data CRC. More...
IFX_INLINE uint32 | IfxDma_getSourceAndDestinationCRC (Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Source and Destination CRC. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDma_getErrPointer (Ifx_DMA *dma)
Returns the ERR pointer. More...

Detailed Description

DMA basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDma.h.

Function Documentation

◆ IfxDma_enableDestinationCircularBuffer()

IFX_INLINE void IfxDma_enableDestinationCircularBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the Destination Circular Buffer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

Definition at line 1721 of file IfxDma.h.

◆ IfxDma_enableSourceCircularBuffer()

IFX_INLINE void IfxDma_enableSourceCircularBuffer | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Enable the Source Circular Buffer.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
None

Definition at line 1715 of file IfxDma.h.

◆ IfxDma_getDataCRC()

IFX_INLINE uint32 IfxDma_getDataCRC | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the Data CRC.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
The Data CRC value

Definition at line 1727 of file IfxDma.h.

◆ IfxDma_getErrPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getErrPointer ( Ifx_DMA * dma )

Returns the ERR pointer.

Parameters
dma pointer to DMA module
Returns
ERR pointer for given DMA

Definition at line 1739 of file IfxDma.h.

◆ IfxDma_getSourceAndDestinationCRC()

IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId
 | ) |  |

Returns the Source and Destination CRC.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
Returns
The source and destination CRC values

Definition at line 1733 of file IfxDma.h.

◆ IfxDma_setChannelHardwareResourcePartition()

IFX_INLINE void IfxDma_setChannelHardwareResourcePartition | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | IfxDma_HardwareResourcePartition | resourcePartition
 | ) |  |

Configure the hardware resource partition.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
resourcePartition | Hardware resource partition
Returns
None
// Set the required hardware resource partition
IfxDma_setChannelHardwareResourcePartition(chn[0].dma, chn[0].channelId,setChannelHardwareResourcePartition);

Definition at line 1688 of file IfxDma.h.

◆ IfxDma_setCircularBufferDestinationLength()

IFX_INLINE void IfxDma_setCircularBufferDestinationLength | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint16 | length
 | ) |  |

Sets the Circular Buffer Destination Length.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
length | Circular Buffer Destination Length
Returns
None

Definition at line 1703 of file IfxDma.h.

◆ IfxDma_setCircularBufferSourceLength()

IFX_INLINE void IfxDma_setCircularBufferSourceLength | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint16 | length
 | ) |  |

Sets the Circular Buffer Source Length.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
length | Circular Buffer Source Length
Returns
None

Definition at line 1709 of file IfxDma.h.

◆ IfxDma_setInterruptControlValue()

IFX_INLINE void IfxDma_setInterruptControlValue | ( | Ifx_DMA * | dma,
 |  | IfxDma_ChannelId | channelId,
 |  | uint8 | value
 | ) |  |

Sets the Interrupt control value.

Parameters
dma | pointer to DMA module
channelId | DMA channel number
value | Interrupt control value
Returns
None

Definition at line 1697 of file IfxDma.h.


iLLD_TC26B: DSADC

Modules | Files
DSADC
iLLD
Collaboration diagram for DSADC:

Modules

Implementation
Standard Driver
DSADC Pin Mapping
How to use the DSADC Interface driver?
DSADC
RDC

Files

file | IfxDsadc_cfg.h
DSADC on-chip implementation data.
file | IfxDsadc_PinMap.c
DSADC I/O map.
file | IfxDsadc_PinMap.h
DSADC I/O map.
file | IfxDsadc_Dsadc.h
DSADC DSADC details.
file | IfxDsadc_Rdc.h
DSADC RDC details.
file | IfxDsadc.h
DSADC basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » DSADC
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » DSADC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Support Functions
Interrupt Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » DSADC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxDsadc_AuxCombFilterShift {
IfxDsadc_AuxCombFilterShift_noShift = 0,
IfxDsadc_AuxCombFilterShift_shiftBy1 = 1,
IfxDsadc_AuxCombFilterShift_shiftBy2 = 2,
IfxDsadc_AuxCombFilterShift_shiftBy3 = 3
}
Comb Filter (auxiliary) shift control
Definition in Ifx_DSADC.FCFGA.B.AFSC. More...
enum IfxDsadc_AuxCombFilterType {
IfxDsadc_AuxCombFilterType_comb1 = 0,
IfxDsadc_AuxCombFilterType_comb2 = 1,
IfxDsadc_AuxCombFilterType_comb3 = 2,
IfxDsadc_AuxCombFilterType_combF = 3
}
Comb Filter (auxiliary) configuration/type
Definition in Ifx_DSADC.FCFGA.B.CFAC. More...
enum IfxDsadc_AuxEvent {
IfxDsadc_AuxEvent_everyNewResult = 0,
IfxDsadc_AuxEvent_insideBoundary = 1,
IfxDsadc_AuxEvent_outsideBoundary = 2
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.ESEL. More...
enum IfxDsadc_AuxGate {
IfxDsadc_AuxGate_definedByESEL = 0,
IfxDsadc_AuxGate_coupledToIntegrator = 1
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.EGT. More...
enum IfxDsadc_AuxServiceRequest {
IfxDsadc_AuxServiceRequest_never = 0,
IfxDsadc_AuxServiceRequest_auxFilter = 1,
IfxDsadc_AuxServiceRequest_altSource = 2
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.SRGA. More...
enum IfxDsadc_CarrierWaveformMode {
IfxDsadc_CarrierWaveformMode_stopped = 0,
IfxDsadc_CarrierWaveformMode_square = 1,
IfxDsadc_CarrierWaveformMode_triangle = 2,
IfxDsadc_CarrierWaveformMode_sine = 3
}
Carrier generation mode
Definition in Ifx_DSADC.CGCFG.B.CGMOD. More...
enum IfxDsadc_ChannelId {
IfxDsadc_ChannelId_0 = 0,
IfxDsadc_ChannelId_2 = 2,
IfxDsadc_ChannelId_3 = 3
}
Specifies the channel Index. More...
enum IfxDsadc_CommonModeVoltage {
IfxDsadc_CommonModeVoltage_a = 0,
IfxDsadc_CommonModeVoltage_b = 1,
IfxDsadc_CommonModeVoltage_c = 2
}
Modulator common mode voltage selection
Definition in Ifx_DSADC.MODCFGx.B.CMVS. More...
enum IfxDsadc_FirDataShift {
IfxDsadc_FirDataShift_noShift = 0,
IfxDsadc_FirDataShift_shiftBy1 = 1,
IfxDsadc_FirDataShift_shiftBy2 = 2,
IfxDsadc_FirDataShift_shiftBy3 = 3
}
FIR data shift control
Selects the displacement caused by the data shifter at the FIR filter output
Definition in Ifx_DSADC.FCFGM.B.DSH. More...
enum IfxDsadc_FirInternalShift {
IfxDsadc_FirInternalShift_noShift = 0,
IfxDsadc_FirInternalShift_shiftBy1 = 1
}
FIR shift control
Selects the displacement caused by the data shifter inbetween the FIR filter blocks.
Definition in Ifx_DSADC.FCFGM.B.FSH. More...
enum IfxDsadc_InputConfig {
IfxDsadc_InputConfig_inputPin = 0,
IfxDsadc_InputConfig_supplyVoltage = 1,
IfxDsadc_InputConfig_commonModeVoltage = 2,
IfxDsadc_InputConfig_referenceGround = 3
}
Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN. More...
enum IfxDsadc_InputDataSource {
IfxDsadc_InputDataSource_onChipStandAlone = 0,
IfxDsadc_InputDataSource_onChipCombined = 1,
IfxDsadc_InputDataSource_directInputA = 2,
IfxDsadc_InputDataSource_invertedInputA = 3,
IfxDsadc_InputDataSource_directInputB = 4,
IfxDsadc_InputDataSource_invertedInputB = 5
}
Demodulator input data source selection
Definition in Ifx_DSADC.DICFG.B.DSRC. More...
enum IfxDsadc_InputGain {
IfxDsadc_InputGain_factor1 = 0,
IfxDsadc_InputGain_factor2 = 1,
IfxDsadc_InputGain_factor4 = 2,
IfxDsadc_InputGain_factor8 = 3,
IfxDsadc_InputGain_factor16 = 4
}
Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL. More...
enum IfxDsadc_InputPin {
IfxDsadc_InputPin_a = 0,
IfxDsadc_InputPin_b = 1,
IfxDsadc_InputPin_c = 2,
IfxDsadc_InputPin_d = 3
}
Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX. More...
enum IfxDsadc_IntegrationWindowSize {
IfxDsadc_IntegrationWindowSize_internalControl = 0,
IfxDsadc_IntegrationWindowSize_externalControl = 1
}
Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS. More...
enum IfxDsadc_IntegratorTrigger {
IfxDsadc_IntegratorTrigger_bypassed = 0,
IfxDsadc_IntegratorTrigger_fallingEdge = 1,
IfxDsadc_IntegratorTrigger_risingEdge = 2,
IfxDsadc_IntegratorTrigger_alwaysActive = 3
}
Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_DSADC.DICFG.B.ITRMODE. More...
enum IfxDsadc_LowPowerSupply {
IfxDsadc_LowPowerSupply_5V = 0,
IfxDsadc_LowPowerSupply_3_3V = 1
}
Low power supply voltage select
Definition in Ifx_DSADC.GLOBCFG.B.LOSUP. More...
enum IfxDsadc_MainCombFilterShift {
IfxDsadc_MainCombFilterShift_noShift = 0,
IfxDsadc_MainCombFilterShift_shiftBy1 = 1,
IfxDsadc_MainCombFilterShift_shiftBy2 = 2,
IfxDsadc_MainCombFilterShift_shiftBy3 = 3
}
Comb Filter (Main Chain) shift control
Definition in Ifx_DSADC.FCFGC.B.MFSC. More...
enum IfxDsadc_MainCombFilterType {
IfxDsadc_MainCombFilterType_comb1 = 0,
IfxDsadc_MainCombFilterType_comb2 = 1,
IfxDsadc_MainCombFilterType_comb3 = 2,
IfxDsadc_MainCombFilterType_combF = 3
}
Comb Filter (Main Chain) configuration/type
Definition in Ifx_DSADC.FCFGC.B.CFMC. More...
enum IfxDsadc_MainServiceRequest {
IfxDsadc_MainServiceRequest_never = 0,
IfxDsadc_MainServiceRequest_highGateSignal = 1,
IfxDsadc_MainServiceRequest_lowGateSignal = 2,
IfxDsadc_MainServiceRequest_everyNewResult = 3
}
Service request generation (main chain)
Definition in Ifx_DSADC.FCFGC.B.SRGM. More...
enum IfxDsadc_ModulatorClock {
IfxDsadc_ModulatorClock_off = 0,
IfxDsadc_ModulatorClock_fDSD = 1,
IfxDsadc_ModulatorClock_fERAY = 2,
IfxDsadc_ModulatorClock_fOSC0 = 3
}
Modulator clock select
Definition in Ifx_DSADC.GLOBCFG.B.MCSEL. More...
enum IfxDsadc_ModulatorClockDivider {
IfxDsadc_ModulatorClockDivider_div2 = 0,
IfxDsadc_ModulatorClockDivider_div4,
IfxDsadc_ModulatorClockDivider_div6,
IfxDsadc_ModulatorClockDivider_div8,
IfxDsadc_ModulatorClockDivider_div10,
IfxDsadc_ModulatorClockDivider_div12,
IfxDsadc_ModulatorClockDivider_div14,
IfxDsadc_ModulatorClockDivider_div16,
IfxDsadc_ModulatorClockDivider_div18,
IfxDsadc_ModulatorClockDivider_div20,
IfxDsadc_ModulatorClockDivider_div22,
IfxDsadc_ModulatorClockDivider_div24,
IfxDsadc_ModulatorClockDivider_div26,
IfxDsadc_ModulatorClockDivider_div28,
IfxDsadc_ModulatorClockDivider_div30,
IfxDsadc_ModulatorClockDivider_div32
}
Modulator divider factor for modulator clock
Definition in Ifx_DSADC.MODCFGx.B.DIVM. More...
enum IfxDsadc_RectifierSignSource {
IfxDsadc_RectifierSignSource_onChipGenerator = 0,
IfxDsadc_RectifierSignSource_nextChannel = 1,
IfxDsadc_RectifierSignSource_externalA = 2,
IfxDsadc_RectifierSignSource_externalB = 3
}
Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC. More...
enum IfxDsadc_SampleClockSource {
IfxDsadc_SampleClockSource_internal = 0,
IfxDsadc_SampleClockSource_inputA = 1,
IfxDsadc_SampleClockSource_inputB = 2,
IfxDsadc_SampleClockSource_inputC = 3
}
Demodulator sample clock source select
Definition in Ifx_DSADC.DICFG.B.CSRC. More...
enum IfxDsadc_SampleStrobe {
IfxDsadc_SampleStrobe_noDataStrobe = 0,
IfxDsadc_SampleStrobe_sampleOnRisingEdge = 1,
IfxDsadc_SampleStrobe_sampleOnFallingEdge = 2,
IfxDsadc_SampleStrobe_sampleOnBothEdges = 3,
IfxDsadc_SampleStrobe_reserved = 4,
IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges = 5,
IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges = 6
}
Demodulator data strobe generation mode
Definition in Ifx_DSADC.DICFG.B.STROBE. More...
enum IfxDsadc_SleepMode {
IfxDsadc_SleepMode_enable = 0,
IfxDsadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DSADC.CLC.B.EDIS. More...
enum IfxDsadc_TimestampTrigger {
IfxDsadc_TimestampTrigger_noTrigger = 0,
IfxDsadc_TimestampTrigger_fallingEdge = 1,
IfxDsadc_TimestampTrigger_risingEdge = 2,
IfxDsadc_TimestampTrigger_eachEdge = 3
}
Timestamp trigger mode
Definition in Ifx_DSADC.DICFG.B.TSTRMODE. More...
enum IfxDsadc_TriggerInput {
IfxDsadc_TriggerInput_a = 0,
IfxDsadc_TriggerInput_b = 1,
IfxDsadc_TriggerInput_c = 2,
IfxDsadc_TriggerInput_d = 3,
IfxDsadc_TriggerInput_e = 4,
IfxDsadc_TriggerInput_f = 5,
IfxDsadc_TriggerInput_g = 6,
IfxDsadc_TriggerInput_h = 7
}
Trigger select
Definition in Ifx_DSADC.DICFG.B.TRSEL. More...

Detailed Description

Enumeration Type Documentation

◆ IfxDsadc_AuxCombFilterShift

enum IfxDsadc_AuxCombFilterShift

Comb Filter (auxiliary) shift control
Definition in Ifx_DSADC.FCFGA.B.AFSC.

Enumerator
IfxDsadc_AuxCombFilterShift_noShift | no shift, use full range
IfxDsadc_AuxCombFilterShift_shiftBy1 | Shift by 1.
IfxDsadc_AuxCombFilterShift_shiftBy2 | Shift by 2.
IfxDsadc_AuxCombFilterShift_shiftBy3 | Shift by 3.

Definition at line 59 of file IfxDsadc.h.

◆ IfxDsadc_AuxCombFilterType

enum IfxDsadc_AuxCombFilterType

Comb Filter (auxiliary) configuration/type
Definition in Ifx_DSADC.FCFGA.B.CFAC.

Enumerator
IfxDsadc_AuxCombFilterType_comb1 | CIC1.
IfxDsadc_AuxCombFilterType_comb2 | CIC2.
IfxDsadc_AuxCombFilterType_comb3 | CIC3.
IfxDsadc_AuxCombFilterType_combF | CICF.

Definition at line 70 of file IfxDsadc.h.

◆ IfxDsadc_AuxEvent

enum IfxDsadc_AuxEvent

Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.ESEL.

Enumerator
IfxDsadc_AuxEvent_everyNewResult | Always, for each new result value.
IfxDsadc_AuxEvent_insideBoundary | If result is inside the boundary band.
IfxDsadc_AuxEvent_outsideBoundary | If result is outside the boundary band.

Definition at line 81 of file IfxDsadc.h.

◆ IfxDsadc_AuxGate

enum IfxDsadc_AuxGate

Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.EGT.

Enumerator
IfxDsadc_AuxGate_definedByESEL | Separate: generate events according to ESEL.
IfxDsadc_AuxGate_coupledToIntegrator | Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDIS.

Definition at line 91 of file IfxDsadc.h.

◆ IfxDsadc_AuxServiceRequest

enum IfxDsadc_AuxServiceRequest

Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.SRGA.

Enumerator
IfxDsadc_AuxServiceRequest_never | Never, service requests disabled.
IfxDsadc_AuxServiceRequest_auxFilter | Auxiliary filter: As selected by bitfield ESEL (IfxDsadc_AuxEvent)
IfxDsadc_AuxServiceRequest_altSource | Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5)

Definition at line 100 of file IfxDsadc.h.

◆ IfxDsadc_CarrierWaveformMode

enum IfxDsadc_CarrierWaveformMode

Carrier generation mode
Definition in Ifx_DSADC.CGCFG.B.CGMOD.

Enumerator
IfxDsadc_CarrierWaveformMode_stopped | Carrier Generator stopped.
IfxDsadc_CarrierWaveformMode_square | Carrier Generator generates square wave.
IfxDsadc_CarrierWaveformMode_triangle | Carrier Generator generates triangle wave.
IfxDsadc_CarrierWaveformMode_sine | Carrier Generator generates sine wave.

Definition at line 110 of file IfxDsadc.h.

◆ IfxDsadc_ChannelId

enum IfxDsadc_ChannelId

Specifies the channel Index.

Enumerator
IfxDsadc_ChannelId_0 | Specifies the channel Index 0.
IfxDsadc_ChannelId_2 | Specifies the channel Index 2.
IfxDsadc_ChannelId_3 | Specifies the channel Index 3.

Definition at line 120 of file IfxDsadc.h.

◆ IfxDsadc_CommonModeVoltage

enum IfxDsadc_CommonModeVoltage

Modulator common mode voltage selection
Definition in Ifx_DSADC.MODCFGx.B.CMVS.

Enumerator
IfxDsadc_CommonModeVoltage_a | VCM = VAREF / 3.03 (1.65 V for VAREF = 5.0 V), recommended for VDDM = 3.3 V1.65V.
IfxDsadc_CommonModeVoltage_b | VCM = VAREF / 2.27 (2.2 V for VAREF = 5.0 V), recommended for low distortion of AC-coupled signals.
IfxDsadc_CommonModeVoltage_c | VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals.

Definition at line 130 of file IfxDsadc.h.

◆ IfxDsadc_FirDataShift

enum IfxDsadc_FirDataShift

FIR data shift control
Selects the displacement caused by the data shifter at the FIR filter output
Definition in Ifx_DSADC.FCFGM.B.DSH.

Enumerator
IfxDsadc_FirDataShift_noShift | no shift, use full range
IfxDsadc_FirDataShift_shiftBy1 | Shift by 1.
IfxDsadc_FirDataShift_shiftBy2 | Shift by 2.
IfxDsadc_FirDataShift_shiftBy3 | Shift by 3.

Definition at line 141 of file IfxDsadc.h.

◆ IfxDsadc_FirInternalShift

enum IfxDsadc_FirInternalShift

FIR shift control
Selects the displacement caused by the data shifter inbetween the FIR filter blocks.
Definition in Ifx_DSADC.FCFGM.B.FSH.

Enumerator
IfxDsadc_FirInternalShift_noShift | no shift, use full range
IfxDsadc_FirInternalShift_shiftBy1 | Shift by 1.

Definition at line 153 of file IfxDsadc.h.

◆ IfxDsadc_InputConfig

enum IfxDsadc_InputConfig

Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.

Enumerator
IfxDsadc_InputConfig_inputPin | Modulator input connected to external pin.
IfxDsadc_InputConfig_supplyVoltage | Modulator input connected to supply voltage V_ddm.
IfxDsadc_InputConfig_commonModeVoltage | Modulator input connected to common mode voltage V_cm.
IfxDsadc_InputConfig_referenceGround | Modulator input connected to reference ground V_ref.

Definition at line 162 of file IfxDsadc.h.

◆ IfxDsadc_InputDataSource

enum IfxDsadc_InputDataSource

Demodulator input data source selection
Definition in Ifx_DSADC.DICFG.B.DSRC.

Enumerator
IfxDsadc_InputDataSource_onChipStandAlone | On-chip modulator, standalone (3rd order)
IfxDsadc_InputDataSource_onChipCombined | On-chip modulator, yield (2nd order)
IfxDsadc_InputDataSource_directInputA | External, from input A, direct.
IfxDsadc_InputDataSource_invertedInputA | External, from input A, inverted.
IfxDsadc_InputDataSource_directInputB | External, from input B, direct.
IfxDsadc_InputDataSource_invertedInputB | External, from input B, inverted.

Definition at line 173 of file IfxDsadc.h.

◆ IfxDsadc_InputGain

enum IfxDsadc_InputGain

Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.

Enumerator
IfxDsadc_InputGain_factor1 | Input gain factor: 1.
IfxDsadc_InputGain_factor2 | Input gain factor: 2.
IfxDsadc_InputGain_factor4 | Input gain factor: 4.
IfxDsadc_InputGain_factor8 | Input gain factor: 8.
IfxDsadc_InputGain_factor16 | Input gain factor: 16.

Definition at line 186 of file IfxDsadc.h.

◆ IfxDsadc_InputPin

enum IfxDsadc_InputPin

Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX.

Enumerator
IfxDsadc_InputPin_a | Pin A connected to modulator input.
IfxDsadc_InputPin_b | Pin B connected to modulator input.
IfxDsadc_InputPin_c | Pin C connected to modulator input.
IfxDsadc_InputPin_d | Pin D connected to modulator input.

Definition at line 198 of file IfxDsadc.h.

◆ IfxDsadc_IntegrationWindowSize

enum IfxDsadc_IntegrationWindowSize

Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS.

Enumerator
IfxDsadc_IntegrationWindowSize_internalControl | Internal control: stop integrator after REPVAL+1 integration cycles.
IfxDsadc_IntegrationWindowSize_externalControl | External control: stop integrator when bit INTEN becomes 0.

Definition at line 209 of file IfxDsadc.h.

◆ IfxDsadc_IntegratorTrigger

enum IfxDsadc_IntegratorTrigger

Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_DSADC.DICFG.B.ITRMODE.

Enumerator
IfxDsadc_IntegratorTrigger_bypassed | No integration trigger, integrator bypassed.
IfxDsadc_IntegratorTrigger_fallingEdge | Trigger event upon a falling edge.
IfxDsadc_IntegratorTrigger_risingEdge | Trigger event upon a rising edge.
IfxDsadc_IntegratorTrigger_alwaysActive | No trigger, integrator active all the time.

Definition at line 219 of file IfxDsadc.h.

◆ IfxDsadc_LowPowerSupply

enum IfxDsadc_LowPowerSupply

Low power supply voltage select
Definition in Ifx_DSADC.GLOBCFG.B.LOSUP.

Enumerator
IfxDsadc_LowPowerSupply_5V | Supply Voltage for Analog Circuitry set to 5V.
IfxDsadc_LowPowerSupply_3_3V | Supply Voltage for Analog Circuitry set to 3.3V.

Definition at line 230 of file IfxDsadc.h.

◆ IfxDsadc_MainCombFilterShift

enum IfxDsadc_MainCombFilterShift

Comb Filter (Main Chain) shift control
Definition in Ifx_DSADC.FCFGC.B.MFSC.

Enumerator
IfxDsadc_MainCombFilterShift_noShift | no shift, use full range
IfxDsadc_MainCombFilterShift_shiftBy1 | Shift by 1.
IfxDsadc_MainCombFilterShift_shiftBy2 | Shift by 2.
IfxDsadc_MainCombFilterShift_shiftBy3 | Shift by 3.

Definition at line 239 of file IfxDsadc.h.

◆ IfxDsadc_MainCombFilterType

enum IfxDsadc_MainCombFilterType

Comb Filter (Main Chain) configuration/type
Definition in Ifx_DSADC.FCFGC.B.CFMC.

Enumerator
IfxDsadc_MainCombFilterType_comb1 | CIC1.
IfxDsadc_MainCombFilterType_comb2 | CIC2.
IfxDsadc_MainCombFilterType_comb3 | CIC3.
IfxDsadc_MainCombFilterType_combF | CICF.

Definition at line 250 of file IfxDsadc.h.

◆ IfxDsadc_MainServiceRequest

enum IfxDsadc_MainServiceRequest

Service request generation (main chain)
Definition in Ifx_DSADC.FCFGC.B.SRGM.

Enumerator
IfxDsadc_MainServiceRequest_never | Never, service requests disabled.
IfxDsadc_MainServiceRequest_highGateSignal | While gate (selected trigger signal) is high.
IfxDsadc_MainServiceRequest_lowGateSignal | While gate (selected trigger signal) is low.
IfxDsadc_MainServiceRequest_everyNewResult | Always, for each new result value.

Definition at line 261 of file IfxDsadc.h.

◆ IfxDsadc_ModulatorClock

enum IfxDsadc_ModulatorClock

Modulator clock select
Definition in Ifx_DSADC.GLOBCFG.B.MCSEL.

Enumerator
IfxDsadc_ModulatorClock_off | Internal clock off, no source selected.
IfxDsadc_ModulatorClock_fDSD | f_dsd clock selected
IfxDsadc_ModulatorClock_fERAY | f_eray clock selected
IfxDsadc_ModulatorClock_fOSC0 | f_osc0 clock selected

Definition at line 272 of file IfxDsadc.h.

◆ IfxDsadc_ModulatorClockDivider

enum IfxDsadc_ModulatorClockDivider

Modulator divider factor for modulator clock
Definition in Ifx_DSADC.MODCFGx.B.DIVM.

Enumerator
IfxDsadc_ModulatorClockDivider_div2 | f_mod = f_clk / 2
IfxDsadc_ModulatorClockDivider_div4 | f_mod = f_clk / 4
IfxDsadc_ModulatorClockDivider_div6 | f_mod = f_clk / 6
IfxDsadc_ModulatorClockDivider_div8 | f_mod = f_clk / 8
IfxDsadc_ModulatorClockDivider_div10 | f_mod = f_clk / 10
IfxDsadc_ModulatorClockDivider_div12 | f_mod = f_clk / 12
IfxDsadc_ModulatorClockDivider_div14 | f_mod = f_clk / 14
IfxDsadc_ModulatorClockDivider_div16 | f_mod = f_clk / 16
IfxDsadc_ModulatorClockDivider_div18 | f_mod = f_clk / 18
IfxDsadc_ModulatorClockDivider_div20 | f_mod = f_clk / 20
IfxDsadc_ModulatorClockDivider_div22 | f_mod = f_clk / 22
IfxDsadc_ModulatorClockDivider_div24 | f_mod = f_clk / 24
IfxDsadc_ModulatorClockDivider_div26 | f_mod = f_clk / 26
IfxDsadc_ModulatorClockDivider_div28 | f_mod = f_clk / 28
IfxDsadc_ModulatorClockDivider_div30 | f_mod = f_clk / 30
IfxDsadc_ModulatorClockDivider_div32 | f_mod = f_clk / 32

Definition at line 283 of file IfxDsadc.h.

◆ IfxDsadc_RectifierSignSource

enum IfxDsadc_RectifierSignSource

Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC.

Enumerator
IfxDsadc_RectifierSignSource_onChipGenerator | On-chip carrier generator.
IfxDsadc_RectifierSignSource_nextChannel | Sign of result of next channel.
IfxDsadc_RectifierSignSource_externalA | External sign signal A.
IfxDsadc_RectifierSignSource_externalB | External sign signal B.

Definition at line 307 of file IfxDsadc.h.

◆ IfxDsadc_SampleClockSource

enum IfxDsadc_SampleClockSource

Demodulator sample clock source select
Definition in Ifx_DSADC.DICFG.B.CSRC.

Enumerator
IfxDsadc_SampleClockSource_internal | Internal clock.
IfxDsadc_SampleClockSource_inputA | External clock, from Input A.
IfxDsadc_SampleClockSource_inputB | External clock, from Input B.
IfxDsadc_SampleClockSource_inputC | External clock, from Input C.

Definition at line 318 of file IfxDsadc.h.

◆ IfxDsadc_SampleStrobe

enum IfxDsadc_SampleStrobe

Demodulator data strobe generation mode
Definition in Ifx_DSADC.DICFG.B.STROBE.

Enumerator
IfxDsadc_SampleStrobe_noDataStrobe | No data strobe.
IfxDsadc_SampleStrobe_sampleOnRisingEdge | Direct clock, a sample trigger is generated at each rising clock edge.
IfxDsadc_SampleStrobe_sampleOnFallingEdge | Direct clock, a sample trigger is generated at each falling clock edge.
IfxDsadc_SampleStrobe_sampleOnBothEdges | Double data, a sample trigger is generated at each rising and falling clock edge.
IfxDsadc_SampleStrobe_reserved | don't use
IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges | Double clock, a sample trigger is generated at every 2nd rising clock edge.
IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges | Double clock, a sample trigger is generated at every 2nd falling clock edge.

Definition at line 329 of file IfxDsadc.h.

◆ IfxDsadc_SleepMode

enum IfxDsadc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DSADC.CLC.B.EDIS.

Enumerator
IfxDsadc_SleepMode_enable | enables sleep mode
IfxDsadc_SleepMode_disable | disables sleep mode

Definition at line 343 of file IfxDsadc.h.

◆ IfxDsadc_TimestampTrigger

enum IfxDsadc_TimestampTrigger

Timestamp trigger mode
Definition in Ifx_DSADC.DICFG.B.TSTRMODE.

Enumerator
IfxDsadc_TimestampTrigger_noTrigger | No timestamp trigger.
IfxDsadc_TimestampTrigger_fallingEdge | Trigger event upon a falling edge.
IfxDsadc_TimestampTrigger_risingEdge | Trigger event upon a rising edge.
IfxDsadc_TimestampTrigger_eachEdge | Trigger event upon each edge.

Definition at line 352 of file IfxDsadc.h.

◆ IfxDsadc_TriggerInput

enum IfxDsadc_TriggerInput

Trigger select
Definition in Ifx_DSADC.DICFG.B.TRSEL.

Enumerator
IfxDsadc_TriggerInput_a | dsadc trig 0
IfxDsadc_TriggerInput_b | dsadc trig 1
IfxDsadc_TriggerInput_c | vadc trig 0
IfxDsadc_TriggerInput_d | vadc trig 1
IfxDsadc_TriggerInput_e | external pin e
IfxDsadc_TriggerInput_f | external pin f
IfxDsadc_TriggerInput_g |
IfxDsadc_TriggerInput_h |

Definition at line 363 of file IfxDsadc.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » DSADC » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxDsadc_setSleepMode (Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDsadc_startScan (Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxDsadc_stopScan (Ifx_DSADC *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_EXTERN void | IfxDsadc_resetModule (Ifx_DSADC *dsadc)
resets the DSADC kernel More...

Detailed Description

Function Documentation

◆ IfxDsadc_resetModule()

IFX_EXTERN void IfxDsadc_resetModule ( Ifx_DSADC * dsadc )

resets the DSADC kernel

Parameters
dsadc pointer to DSADC registers
Returns
None

Definition at line 141 of file IfxDsadc.c.

◆ IfxDsadc_setSleepMode()

IFX_INLINE void IfxDsadc_setSleepMode | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
dsadc | pointer to DSADC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 719 of file IfxDsadc.h.

◆ IfxDsadc_startScan()

IFX_INLINE void IfxDsadc_startScan | ( | Ifx_DSADC * | dsadc,
 |  | uint32 | modulatorMask,
 |  | uint32 | channelMask
 | ) |  |

Enables the conversion of multiple channels.

Parameters
dsadc | Pointer to the DSADC register space
modulatorMask | the modulator which should be running (bitwise selection)
channelMask | the channels which should be scanned (bitwise selection)
Returns
None
// enable the conversion of all 6 DSADC channels
IfxDsadc_startScan(&MODULE_DSADC, 0x3FU, 0x3FU);
// results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)

Definition at line 728 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_startScan(), and IfxDsadc_Rdc_startConversion().

◆ IfxDsadc_stopScan()

IFX_INLINE void IfxDsadc_stopScan | ( | Ifx_DSADC * | dsadc,
 |  | uint32 | modulatorMask
 | ) |  |

Disables the conversion of multiple channels.

Parameters
dsadc | Pointer to the DSADC register space
modulatorMask | the modulator which should be disabled (bitwise selection)
Returns
None
// disable the modulators of all 6 DSADC channels
IfxDsadc_stopScan(&MODULE_DSADC, 0x3FU);

Definition at line 734 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_stopScan().


iLLD_TC26B: Support Functions

Functions
Support Functions
iLLD » DSADC » Standard Driver
Collaboration diagram for Support Functions:

Functions

IFX_INLINE sint16 | IfxDsadc_getAuxResult (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the auxiliary chain. More...
IFX_INLINE uint16 | IfxDsadc_getMainCombDecimation (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the main comb decimation factor. More...
IFX_INLINE sint16 | IfxDsadc_getMainResult (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain. More...
IFX_INLINE boolean | IfxDsadc_isModuleEnabled (Ifx_DSADC *dsadc)
Return TRUE if DSADC module is enabled. More...
IFX_INLINE void | IfxDsadc_setCarrierMode (Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode. More...
IFX_EXTERN float32 | IfxDsadc_getIntegratorOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getMainCombOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getMainGroupDelay (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
IFX_EXTERN float32 | IfxDsadc_getModulatorClockFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getModulatorInputClockFreq (Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz. More...

Detailed Description

Function Documentation

◆ IfxDsadc_getAuxResult()

IFX_INLINE sint16 IfxDsadc_getAuxResult | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get result from the auxiliary chain.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
result from the auxiliary chain

Definition at line 612 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_getAuxResult().

◆ IfxDsadc_getIntegratorOutFreq()

IFX_EXTERN float32 IfxDsadc_getIntegratorOutFreq | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the sample frequency of the integrator output in Hz.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 41 of file IfxDsadc.c.

Referenced by IfxDsadc_Rdc_getUpdatePeriod().

◆ IfxDsadc_getMainCombDecimation()

IFX_INLINE uint16 IfxDsadc_getMainCombDecimation | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the main comb decimation factor.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
the main comb decimation factor

Definition at line 618 of file IfxDsadc.h.

◆ IfxDsadc_getMainCombOutFreq()

IFX_EXTERN float32 IfxDsadc_getMainCombOutFreq | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the sample frequency of the main COMB filter output in Hz.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 62 of file IfxDsadc.c.

Referenced by IfxDsadc_getIntegratorOutFreq().

◆ IfxDsadc_getMainGroupDelay()

IFX_EXTERN float32 IfxDsadc_getMainGroupDelay | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Estimate the group delay of main-chain filters in seconds.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
delay in seconds

Definition at line 70 of file IfxDsadc.c.

Referenced by IfxDsadc_Rdc_calculateGroupDelay().

◆ IfxDsadc_getMainResult()

IFX_INLINE sint16 IfxDsadc_getMainResult | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get result from the main chain.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
result from the main chain

Definition at line 624 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_getMainResult(), and IfxDsadc_Rdc_onEventA().

◆ IfxDsadc_getModulatorClockFreq()

IFX_EXTERN float32 IfxDsadc_getModulatorClockFreq | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the modulator clock frequency in Hz.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
frequency in Hz

Definition at line 109 of file IfxDsadc.c.

Referenced by IfxDsadc_getMainCombOutFreq(), and IfxDsadc_getMainGroupDelay().

◆ IfxDsadc_getModulatorInputClockFreq()

IFX_EXTERN float32 IfxDsadc_getModulatorInputClockFreq ( Ifx_DSADC * dsadc )

Get the input frequency of DSADC in Hz.

Parameters
dsadc Pointer to the DSADC register space
Returns
frequency in Hz

Definition at line 117 of file IfxDsadc.c.

Referenced by IfxDsadc_Dsadc_initCarrierGen(), IfxDsadc_Dsadc_initModulator(), and IfxDsadc_getModulatorClockFreq().

◆ IfxDsadc_isModuleEnabled()

IFX_INLINE boolean IfxDsadc_isModuleEnabled ( Ifx_DSADC * dsadc )

Return TRUE if DSADC module is enabled.

Parameters
dsadc Pointer to the DSADC register space
Returns
TRUE if DSADC module is enabled

Definition at line 707 of file IfxDsadc.h.

◆ IfxDsadc_setCarrierMode()

IFX_INLINE void IfxDsadc_setCarrierMode | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_CarrierWaveformMode | waveformMode
 | ) |  |

Set the carrier waveform mode.

Parameters
dsadc | Pointer to the DSADC register space
waveformMode | the waveform mode
Returns
None

Definition at line 713 of file IfxDsadc.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » DSADC » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxDsadc_getAuxSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxDsadc_getMainSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...

Detailed Description

Function Documentation

◆ IfxDsadc_getAuxSrc()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxDsadc_getAuxSrc | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Address/pointer to the interrupt source register.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
Address/pointer to the interrupt source register

Definition at line 35 of file IfxDsadc.c.

Referenced by IfxDsadc_Dsadc_getAuxSrc().

◆ IfxDsadc_getMainSrc()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxDsadc_getMainSrc | ( | Ifx_DSADC * | dsadc,
 |  | IfxDsadc_ChannelId | channel
 | ) |  |

Get the interrupt source register for a Main event.

Parameters
dsadc | Pointer to the DSADC register space
channel | Channel Id
Returns
Address/pointer to the interrupt source register

Definition at line 103 of file IfxDsadc.c.

Referenced by IfxDsadc_Dsadc_getMainSrc().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » DSADC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxDsadc_initCgPwmPin (const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output. More...
IFX_INLINE void | IfxDsadc_initCinPin (const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input. More...
IFX_INLINE void | IfxDsadc_initCoutPin (const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output. More...
IFX_INLINE void | IfxDsadc_initDinPin (const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input. More...
IFX_INLINE void | IfxDsadc_initDsnPin (const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxDsadc_initDspPin (const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxDsadc_initItrPin (const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input. More...
IFX_INLINE void | IfxDsadc_initSgPin (const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input. More...

Detailed Description

Function Documentation

◆ IfxDsadc_initCgPwmPin()

IFX_INLINE void IfxDsadc_initCgPwmPin | ( | const IfxDsadc_Cgpwm_Out * | cgPwm,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CGPWM output.

Parameters
cgPwm | the CGPWM Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 630 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initCarrierGen().

◆ IfxDsadc_initCinPin()

IFX_INLINE void IfxDsadc_initCinPin | ( | const IfxDsadc_Cin_In * | cIn,
 |  | IfxPort_InputMode | cInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CIN input.

Parameters
cIn | the CIN Pin which should be configured
cInMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 637 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initCoutPin()

IFX_INLINE void IfxDsadc_initCoutPin | ( | const IfxDsadc_Cout_Out * | cout,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a COUT output.

Parameters
cout | the COUT Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 647 of file IfxDsadc.h.

◆ IfxDsadc_initDinPin()

IFX_INLINE void IfxDsadc_initDinPin | ( | const IfxDsadc_Din_In * | dIn,
 |  | IfxPort_InputMode | dInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DIN input.

Parameters
dIn | the DIN Pin which should be configured
dInMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 657 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initDsnPin()

IFX_INLINE void IfxDsadc_initDsnPin | ( | const IfxDsadc_Dsn_In * | dsn,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DS input.

Parameters
dsn | the DSN Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 667 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initDspPin()

IFX_INLINE void IfxDsadc_initDspPin | ( | const IfxDsadc_Dsp_In * | dsp,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a DS input.

Parameters
dsp | the DSP Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 677 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initItrPin()

IFX_INLINE void IfxDsadc_initItrPin | ( | const IfxDsadc_Itr_In * | itr,
 |  | IfxPort_InputMode | itrMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a ITR input.

Parameters
itr | the ITR Pin which should be configured
itrMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 687 of file IfxDsadc.h.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_initSgPin()

IFX_INLINE void IfxDsadc_initSgPin | ( | const IfxDsadc_Sg_In * | sg,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SG input.

Parameters
sg | the SG Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 697 of file IfxDsadc.h.


iLLD_TC26B: DSADC Pin Mapping

Data Structures | Macros | Variables
DSADC Pin Mapping
iLLD » DSADC
Collaboration diagram for DSADC Pin Mapping:

Data Structures

struct | IfxDsadc_Dsn_In
DS negative pin mapping structure. More...
struct | IfxDsadc_Dsp_In
DS positive pin mapping structure. More...
struct | IfxDsadc_Cin_In
CIN pin mapping structure. More...
struct | IfxDsadc_Din_In
DIN pin mapping structure. More...
struct | IfxDsadc_Itr_In
ITR pin mapping structure. More...
struct | IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure. More...
struct | IfxDsadc_Sg_In
SG pin mapping structure. More...
struct | IfxDsadc_Cout_Out
COUT pin mapping structure. More...

Macros

#define | IFXDSADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXDSADC_PINMAP_NUM_CHANNELS 4
#define | IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
#define | IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2
#define | IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3
#define | IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2
#define | IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
#define | IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
#define | IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
#define | IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Variables

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
DSADC_CIN0A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
DSADC_CIN0B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
DSADC_CIN2A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
DSADC_CIN2B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
DSADC_CIN3A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
DSADC_CIN3B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
DSADC_COUT2: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
DSADC_COUT2: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
DSADC_COUT3: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
DSADC_COUT3: DSADC output. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
DSADC_DIN0A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
DSADC_DIN0B: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
DSADC_DIN2A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
DSADC_DIN2B: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
DSADC_DIN3A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
DSADC_DIN3B: DSADC input. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN
DSADC_ITR0E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN
DSADC_ITR0F: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN
DSADC_ITR2E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN
DSADC_ITR2F: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN
DSADC_ITR3E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN
DSADC_ITR3F: DSADC input. More...
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
DSADC_SGNA: DSADC input. More...
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
DSADC_SGNB: DSADC input. More...
IFX_EXTERN const IfxDsadc_Cgpwm_Out * | IfxDsadc_Cgpwm_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxDsadc_Cgpwm_Out table. More...
IFX_EXTERN const IfxDsadc_Cin_In * | IfxDsadc_Cin_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
IfxDsadc_Cin_In table. More...
IFX_EXTERN const IfxDsadc_Cout_Out * | IfxDsadc_Cout_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
IfxDsadc_Cout_Out table. More...
IFX_EXTERN const IfxDsadc_Din_In * | IfxDsadc_Din_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
IfxDsadc_Din_In table. More...
IFX_EXTERN const IfxDsadc_Dsn_In * | IfxDsadc_Dsn_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxDsadc_Dsn_In table. More...
IFX_EXTERN const IfxDsadc_Dsp_In * | IfxDsadc_Dsp_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxDsadc_Dsp_In table. More...
IFX_EXTERN const IfxDsadc_Itr_In * | IfxDsadc_Itr_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxDsadc_Itr_In table. More...
IFX_EXTERN const IfxDsadc_Sg_In * | IfxDsadc_Sg_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxDsadc_Sg_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxDsadc_Dsn_In

struct IfxDsadc_Dsn_In

DS negative pin mapping structure.

Definition at line 39 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Dsn_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Dsp_In

struct IfxDsadc_Dsp_In

DS positive pin mapping structure.

Definition at line 48 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Dsp_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Cin_In

struct IfxDsadc_Cin_In

CIN pin mapping structure.

Definition at line 57 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Cin_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Din_In

struct IfxDsadc_Din_In

DIN pin mapping structure.

Definition at line 66 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Din_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Itr_In

struct IfxDsadc_Itr_In

ITR pin mapping structure.

Definition at line 75 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Itr_In:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Cgpwm_Out

struct IfxDsadc_Cgpwm_Out

CGPWM pin mapping structure.

Definition at line 84 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Cgpwm_Out:
[legend]
Data Fields
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxDsadc_Sg_In

struct IfxDsadc_Sg_In

SG pin mapping structure.

Definition at line 92 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Sg_In:
[legend]
Data Fields
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxDsadc_Cout_Out

struct IfxDsadc_Cout_Out

COUT pin mapping structure.

Definition at line 100 of file IfxDsadc_PinMap.h.

Collaboration diagram for IfxDsadc_Cout_Out:
[legend]
Data Fields
uint8 | channel | Channel number.
Ifx_DSADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS

#define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6

Definition at line 163 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2

Definition at line 164 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS

#define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3

Definition at line 165 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2

Definition at line 166 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4

Definition at line 167 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4

Definition at line 168 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6

Definition at line 169 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_NUM_CHANNELS

#define IFXDSADC_PINMAP_NUM_CHANNELS 4

Definition at line 162 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_NUM_MODULES

#define IFXDSADC_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 161 of file IfxDsadc_PinMap.h.

◆ IFXDSADC_PINMAP_SG_IN_NUM_ITEMS

#define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Definition at line 170 of file IfxDsadc_PinMap.h.

Variable Documentation

◆ IfxDsadc_Cgpwm_Out_pinTable

IFX_EXTERN const IfxDsadc_Cgpwm_Out* IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]

IfxDsadc_Cgpwm_Out table.

Definition at line 174 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMN_P00_5_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT

DSADC_CGPWMN: DSADC output.

Definition at line 108 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMN_P02_0_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT

DSADC_CGPWMN: DSADC output.

Definition at line 109 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMN_P33_11_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT

DSADC_CGPWMN: DSADC output.

Definition at line 110 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMP_P00_6_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT

DSADC_CGPWMP: DSADC output.

Definition at line 111 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMP_P02_1_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT

DSADC_CGPWMP: DSADC output.

Definition at line 112 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CGPWMP_P33_12_OUT

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT

DSADC_CGPWMP: DSADC output.

Definition at line 113 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN0A_P00_1_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN

DSADC_CIN0A: DSADC input.

Definition at line 114 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN0B_P33_5_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN

DSADC_CIN0B: DSADC input.

Definition at line 115 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN2A_P00_5_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN

DSADC_CIN2A: DSADC input.

Definition at line 116 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN2B_P33_1_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN

DSADC_CIN2B: DSADC input.

Definition at line 117 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN3A_P00_3_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN

DSADC_CIN3A: DSADC input.

Definition at line 118 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_CIN3B_P02_7_IN

IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN

DSADC_CIN3B: DSADC input.

Definition at line 119 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Cin_In_pinTable

IFX_EXTERN const IfxDsadc_Cin_In* IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]

IfxDsadc_Cin_In table.

Definition at line 177 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT0_P00_11_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT

DSADC_COUT0: DSADC output.

Definition at line 120 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT0_P00_1_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT

DSADC_COUT0: DSADC output.

Definition at line 121 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT0_P33_5_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT

DSADC_COUT0: DSADC output.

Definition at line 122 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT2_P00_5_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT

DSADC_COUT2: DSADC output.

Definition at line 123 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT2_P33_1_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT

DSADC_COUT2: DSADC output.

Definition at line 124 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT3_P00_3_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT

DSADC_COUT3: DSADC output.

Definition at line 125 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_COUT3_P02_7_OUT

IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT

DSADC_COUT3: DSADC output.

Definition at line 126 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Cout_Out_pinTable

IFX_EXTERN const IfxDsadc_Cout_Out* IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]

IfxDsadc_Cout_Out table.

Definition at line 180 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN0A_P00_2_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN

DSADC_DIN0A: DSADC input.

Definition at line 127 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN0B_P33_6_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN

DSADC_DIN0B: DSADC input.

Definition at line 128 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN2A_P00_6_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN

DSADC_DIN2A: DSADC input.

Definition at line 129 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN2B_P33_2_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN

DSADC_DIN2B: DSADC input.

Definition at line 130 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN3A_P00_4_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN

DSADC_DIN3A: DSADC input.

Definition at line 131 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DIN3B_P02_8_IN

IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN

DSADC_DIN3B: DSADC input.

Definition at line 132 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Din_In_pinTable

IFX_EXTERN const IfxDsadc_Din_In* IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]

IfxDsadc_Din_In table.

Definition at line 183 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS0NA_AN3_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN

DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A.

Definition at line 133 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS0NB_AN1_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN

DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B.

Definition at line 134 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS0PA_AN2_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN

DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A.

Definition at line 142 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS0PB_AN0_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN

DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B.

Definition at line 143 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS2NA_AN21_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN

DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A.

Definition at line 135 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS2PA_AN20_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN

DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A.

Definition at line 144 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NA_AN37_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN

DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A.

Definition at line 136 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NA_P40_7_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN

DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A.

Definition at line 137 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NB_AN39_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN

DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B.

Definition at line 138 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NB_P40_9_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN

DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B.

Definition at line 139 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3NC_AN45_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN

DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C.

Definition at line 140 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3ND_AN47_IN

IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN

DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D.

Definition at line 141 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PA_AN36_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN

DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A.

Definition at line 145 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PA_P40_6_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN

DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A.

Definition at line 146 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PB_AN38_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN

DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B.

Definition at line 147 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PB_P40_8_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN

DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B.

Definition at line 148 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PC_AN44_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN

DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C.

Definition at line 149 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_DS3PD_AN46_IN

IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN

DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D.

Definition at line 150 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Dsn_In_pinTable

IFX_EXTERN const IfxDsadc_Dsn_In* IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]

IfxDsadc_Dsn_In table.

Definition at line 186 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Dsp_In_pinTable

IFX_EXTERN const IfxDsadc_Dsp_In* IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]

IfxDsadc_Dsp_In table.

Definition at line 189 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR0E_P33_0_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN

DSADC_ITR0E: DSADC input.

Definition at line 151 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR0F_P33_4_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN

DSADC_ITR0F: DSADC input.

Definition at line 152 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR2E_P33_2_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN

DSADC_ITR2E: DSADC input.

Definition at line 153 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR2F_P33_6_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN

DSADC_ITR2F: DSADC input.

Definition at line 154 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR3E_P02_8_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN

DSADC_ITR3E: DSADC input.

Definition at line 155 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_ITR3F_P00_9_IN

IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN

DSADC_ITR3F: DSADC input.

Definition at line 156 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Itr_In_pinTable

IFX_EXTERN const IfxDsadc_Itr_In* IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]

IfxDsadc_Itr_In table.

Definition at line 192 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_Sg_In_pinTable

IFX_EXTERN const IfxDsadc_Sg_In* IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]

IfxDsadc_Sg_In table.

Definition at line 195 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_SGNA_P00_4_IN

IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN

DSADC_SGNA: DSADC input.

Definition at line 157 of file IfxDsadc_PinMap.h.

◆ IfxDsadc_SGNB_P33_13_IN

IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN

DSADC_SGNB: DSADC input.

Definition at line 158 of file IfxDsadc_PinMap.h.


iLLD_TC26B: How to use the DSADC Interface driver?

How to use the DSADC Interface driver?
iLLD » DSADC
Collaboration diagram for How to use the DSADC Interface driver?:

The DSADC interface driver provides a default DSADC configuration for converting analog data streams inputs from external modulators via digital input channels, into digital values by using the on-chip demodulator channels.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Dsadc/Dsadc/IfxDsadc_Dsadc.h>

Variables

Declare the DSADC channel handle and available channels as global variables in your C code:

static IfxDsadc_Dsadc dsadc;
IfxDsadc_Dsadc_Channel dsadcChannel[IFXDSADC_NUM_CHANNELS];
#if defined(DERIVATIVE_TC22x) || defined(DERIVATIVE_TC23x) || defined(DERIVATIVE_TC24x)
uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 0, 1 };
#elif defined(DERIVATIVE_TC27x) || defined(DERIVATIVE_TC27xB) || defined(DERIVATIVE_TC27xC) || defined(DERIVATIVE_TC27xD)
uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1 };
#elif defined(DERIVATIVE_TC26x) || defined(DERIVATIVE_TC26xB)
uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 1, 1 };
#elif defined(DERIVATIVE_TC29x) || defined(DERIVATIVE_TC29xB)
uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
#else
# error "Testcase not prepared for this derivative!"
#endif

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxDsadc_Dsadc_Config dsadcConfig;
IfxDsadc_Dsadc_initModuleConfig(&dsadcConfig, &MODULE_DSADC);
// initialize module
IfxDsadc_Dsadc_initModule(&dsadc, &dsadcConfig);
// create channel config
IfxDsadc_Dsadc_ChannelConfig dsadcChannelConfig;
IfxDsadc_Dsadc_initChannelConfig(&dsadcChannelConfig, &dsadc);
// modify default configuration
dsadcChannelConfig.modulator.positiveInput = IfxDsadc_InputConfig_inputPin;
dsadcChannelConfig.modulator.negativeInput = IfxDsadc_InputConfig_inputPin;
dsadcChannelConfig.modulator.inputGain = IfxDsadc_InputGain_factor1;
dsadcChannelConfig.modulator.inputPin = IfxDsadc_InputPin_a;
dsadcChannelConfig.modulator.modulatorClockFreq = 10.0e6;
dsadcChannelConfig.modulator.commonModeVoltage = IfxDsadc_CommonModeVoltage_c;
dsadcChannelConfig.combFilter.bypassed = FALSE;
dsadcChannelConfig.combFilter.combFilterType = IfxDsadc_MainCombFilterType_comb3;
dsadcChannelConfig.combFilter.combFilterShift = IfxDsadc_MainCombFilterShift_noShift;
dsadcChannelConfig.combFilter.serviceRequest = IfxDsadc_MainServiceRequest_everyNewResult;
dsadcChannelConfig.combFilter.decimationFactor = 32;
dsadcChannelConfig.combFilter.startValue = 32;
dsadcChannelConfig.firFilter.fir0Enabled = TRUE;
dsadcChannelConfig.firFilter.fir1Enabled = TRUE;
dsadcChannelConfig.firFilter.offsetCompensation = FALSE;
dsadcChannelConfig.firFilter.dataShift = IfxDsadc_FirDataShift_shiftBy2;
dsadcChannelConfig.firFilter.internalShift = IfxDsadc_FirInternalShift_shiftBy1;
// initialize channels
for(int chn=0; chn<IFXDSADC_NUM_CHANNELS; ++chn) {
if( dsadcChannelAvailable[chn] ) {
dsadcChannelConfig.channelId = (IfxDsadc_ChannelId)chn;
IfxDsadc_Dsadc_initChannel(&dsadcChannel[chn], &dsadcChannelConfig);
}
}

The DSADC is ready for use now!

Conversions

The DSADC driver provides simple to use Conversion function,

// start conversions
IfxDsadc_Dsadc_startScan(&dsadc, 0x3f, 0x3f);
// results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)

The converted data can be collected using the following function

// declared globally
// sint16 result[];
for(int chn=0; chn<IFXDSADC_NUM_CHANNELS; ++chn) {
if( dsadcChannelAvailable[chn] ) {
result = IfxDsadc_Dsadc_getMainResult(&dsadcChannel[chn]));
}
}


iLLD_TC26B: DSADC

Modules
DSADC
iLLD » DSADC
Collaboration diagram for DSADC:

Modules

Data Structures
Module Functions
Channel Functions
Operative Functions
Result Functions
Interrupt Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » DSADC » DSADC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxDsadc_Dsadc_AuxFilterConfig
Auxiliary comb filter configuration structure. More...
struct | IfxDsadc_Dsadc_ChannelPins
Channel Pins Configuration structure. More...
struct | IfxDsadc_Dsadc_CombFilterConfig
Comb filter configuration structure. More...
struct | IfxDsadc_Dsadc_DemodulatorConfig
Demodulator configuration structure. More...
struct | IfxDsadc_Dsadc_FirFilterConfig
FIR filters configuration structure. More...
struct | IfxDsadc_Dsadc_IntegratorConfig
Integrator configuration structure. More...
struct | IfxDsadc_Dsadc_ModulatorConfig
Modulator configuration structure. More...
struct | IfxDsadc_Dsadc_RectifierConfig
Rectifier configuration structure. More...
struct | IfxDsadc_Dsadc
DSADC handle data structure. More...
struct | IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure. More...
struct | IfxDsadc_Dsadc_Channel
Channel handle structure. More...
struct | IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure. More...
struct | IfxDsadc_Dsadc_Config
Clock configuration data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxDsadc_Dsadc_AuxFilterConfig

struct IfxDsadc_Dsadc_AuxFilterConfig

Auxiliary comb filter configuration structure.

Definition at line 175 of file IfxDsadc_Dsadc.h.

Data Fields
boolean | bypassed |
IfxDsadc_AuxCombFilterShift | combFilterShift | Comb Filter (auxiliary) shift control.
IfxDsadc_AuxCombFilterType | combFilterType | Comb Filter (auxiliary) configuration/type.
uint8 | decimationFactor | CIC Filter (Auxiliary) decimation factor (4 .. 32)
IfxDsadc_AuxGate | eventGate | Service request generation (auxiliary)
IfxDsadc_AuxEvent | eventSelect | Service request generation (auxiliary)
IfxDsadc_AuxServiceRequest | serviceRequest | Service request generation (auxiliary)

◆ IfxDsadc_Dsadc_ChannelPins

struct IfxDsadc_Dsadc_ChannelPins

Channel Pins Configuration structure.

Definition at line 188 of file IfxDsadc_Dsadc.h.

Collaboration diagram for IfxDsadc_Dsadc_ChannelPins:
[legend]
Data Fields
IFX_CONST IfxDsadc_Cin_In * | cin | the CIN Pin which should be configured
IfxPort_InputMode | cinMode | the CIN pin input mode which should be configured
IFX_CONST IfxDsadc_Din_In * | din | the DIN Pin which should be configured
IfxPort_InputMode | dinMode | the DIN pin input mode which should be configured
IFX_CONST IfxDsadc_Dsn_In * | dsn | the DSN Pin which should be configured
IfxPort_InputMode | dsnMode | the DSN pin output mode which should be configured
IFX_CONST IfxDsadc_Dsp_In * | dsp | the DSP Pin which should be configured
IfxPort_InputMode | dspMode | the DSP pin output mode which should be configured
IFX_CONST IfxDsadc_Itr_In * | itr | the ITR Pin which should be configured
IfxPort_InputMode | itrMode | the ITR pin input mode which should be configured
IfxPort_PadDriver | pinDriver | Pin Driver Configuration.

◆ IfxDsadc_Dsadc_CombFilterConfig

struct IfxDsadc_Dsadc_CombFilterConfig

Comb filter configuration structure.

Definition at line 205 of file IfxDsadc_Dsadc.h.

Data Fields
boolean | bypassed | CIC Filter enable/bypass selection.
IfxDsadc_MainCombFilterShift | combFilterShift | Comb Filter (Main Chain) shift control.
IfxDsadc_MainCombFilterType | combFilterType | Comb Filter (Main Chain) configuration/type.
uint16 | decimationFactor | 4 .. 256
IfxDsadc_MainServiceRequest | serviceRequest | Service request generation (main chain)
uint16 | startValue | 4 .. decimationFactor

◆ IfxDsadc_Dsadc_DemodulatorConfig

struct IfxDsadc_Dsadc_DemodulatorConfig

Demodulator configuration structure.

Definition at line 217 of file IfxDsadc_Dsadc.h.

Data Fields
IfxDsadc_InputDataSource | inputDataSource | Demodulator input data source selection.
IfxDsadc_IntegratorTrigger | integrationTrigger | Integrator trigger mode selection.
IfxDsadc_SampleClockSource | sampleClockSource | Demodulator sample clock source selection.
IfxDsadc_SampleStrobe | sampleStrobe | Demodulator data strobe generation mode selection.
IfxDsadc_TimestampTrigger | timestampTrigger | Timestamp trigger mode selection.
IfxDsadc_TriggerInput | triggerInput | Trigger selection.

◆ IfxDsadc_Dsadc_FirFilterConfig

struct IfxDsadc_Dsadc_FirFilterConfig

FIR filters configuration structure.

Definition at line 229 of file IfxDsadc_Dsadc.h.

Data Fields
IfxDsadc_FirDataShift | dataShift | FIR data shift control selection.
boolean | fir0Enabled | FIR filter 0 enable/disable selection.
boolean | fir1Enabled | FIR filter 0 enable/disable selection.
IfxDsadc_FirInternalShift | internalShift | FIR shift control selction.
boolean | offsetCompensation | Offset Compensation Filter enable/disable selection.

◆ IfxDsadc_Dsadc_IntegratorConfig

struct IfxDsadc_Dsadc_IntegratorConfig

Integrator configuration structure.

Definition at line 240 of file IfxDsadc_Dsadc.h.

Data Fields
uint16 | discardCount | Number of discarded values to after active trigger: 1 .. 64.
uint16 | integrationCount | Number of integrated values after discard step: 1 .. 64.
uint16 | integrationCycles | Number of integration cycles: 1 .. 16. Used only when IfxDsadc_IntegrationWindowSize_internalControl.
IfxDsadc_IntegrationWindowSize | windowSize | Integrator window size.

◆ IfxDsadc_Dsadc_ModulatorConfig

struct IfxDsadc_Dsadc_ModulatorConfig

Modulator configuration structure.

Definition at line 250 of file IfxDsadc_Dsadc.h.

Data Fields
IfxDsadc_CommonModeVoltage | commonModeVoltage | Modulator common mode voltage selection.
IfxDsadc_InputGain | inputGain | Modulator gain select of analog input path.
IfxDsadc_InputPin | inputPin | Modulator input pin selection.
float32 | modulatorClockFreq | Modulator clock frequency.
IfxDsadc_InputConfig | negativeInput | Modulator configuration of negative input line.
IfxDsadc_InputConfig | positiveInput | Modulator configuration of positive input line.

◆ IfxDsadc_Dsadc_RectifierConfig

struct IfxDsadc_Dsadc_RectifierConfig

Rectifier configuration structure.

Definition at line 262 of file IfxDsadc_Dsadc.h.

Data Fields
boolean | enabled | Rectification enable/disable selection.
uint8 | signDelay | Sign delay value.
uint8 | signPeriod | Sign period.
IfxDsadc_RectifierSignSource | signSource | Rectifier sign source.

◆ IfxDsadc_Dsadc

struct IfxDsadc_Dsadc

DSADC handle data structure.

Definition at line 276 of file IfxDsadc_Dsadc.h.

Data Fields
Ifx_DSADC * dsadc Specifies the pointer to the DSADC module registers.

◆ IfxDsadc_Dsadc_CarrierGenConfig

struct IfxDsadc_Dsadc_CarrierGenConfig

Carrier generation configuration structure.

Definition at line 283 of file IfxDsadc_Dsadc.h.

Collaboration diagram for IfxDsadc_Dsadc_CarrierGenConfig:
[legend]
Data Fields
boolean | bitReversed | Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
IfxDsadc_CarrierWaveformMode | carrierWaveformMode | Carrier generation mode.
float32 | frequency | Expected excitation frequency in Hz.
boolean | inverted | Signal polarity (Normal / Inverted) selection.
IfxPort_PadDriver | pinDriver | Carrier pins pad driver.
IfxPort_OutputMode | pinMode | Carrier pins output mode.
IFX_CONST IfxDsadc_Cgpwm_Out * | pinNeg | Negative-carrier pin configuration.
IFX_CONST IfxDsadc_Cgpwm_Out * | pinPos | Positive-carrier pin configuration.

◆ IfxDsadc_Dsadc_Channel

struct IfxDsadc_Dsadc_Channel

Channel handle structure.

Definition at line 297 of file IfxDsadc_Dsadc.h.

Data Fields
Ifx_DSADC_CH * | channel | Specifies the pointer to the DSADC channel registers.
IfxDsadc_ChannelId | channelId | Channel Id.
Ifx_DSADC * | module | Specifies the pointer to the DSADC module registers.

◆ IfxDsadc_Dsadc_ChannelConfig

struct IfxDsadc_Dsadc_ChannelConfig

Single channel configuration structure.

Definition at line 306 of file IfxDsadc_Dsadc.h.

Collaboration diagram for IfxDsadc_Dsadc_ChannelConfig:
[legend]
Data Fields
IfxDsadc_Dsadc_AuxFilterConfig | auxFilter | Auxiliary comb filter configuration structure.
IfxDsadc_ChannelId | channelId | Channel Id.
IFX_CONST IfxDsadc_Dsadc_ChannelPins * | channelPins | Channel Pins Configuration structure.
IfxDsadc_Dsadc_CombFilterConfig | combFilter | Comb filter configuration structure.
IfxDsadc_Dsadc_DemodulatorConfig | demodulator | Demodulator configuration structure.
IfxDsadc_Dsadc_FirFilterConfig | firFilter | FIR filters configuration structure.
IfxDsadc_Dsadc_IntegratorConfig | integrator | Integrator configuration structure.
IfxDsadc_Dsadc_ModulatorConfig | modulator | Modulator configuration structure.
Ifx_DSADC * | module | Specifies the pointer to the DSADC module registers.
IfxDsadc_Dsadc_RectifierConfig | rectifier | Rectifier configuration structure.

◆ IfxDsadc_Dsadc_Config

struct IfxDsadc_Dsadc_Config

Clock configuration data structure.

Definition at line 322 of file IfxDsadc_Dsadc.h.

Data Fields
Ifx_DSADC * | dsadc | Specifies the pointer to the DSADC module registers.
IfxDsadc_LowPowerSupply | lowPowerSupply | Low power supply voltage selection.
IfxDsadc_ModulatorClock | modulatorClockSelect | Modulator clock selection.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » DSADC » DSADC
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxDsadc_Dsadc_initCarrierGen (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initModule (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initModuleConfig (IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_initCarrierGen()

IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGen | ( | IfxDsadc_Dsadc * | dsadc,
 |  | const IfxDsadc_Dsadc_CarrierGenConfig * | config
 | ) |  |

Initialise the DSADC carrier generator.

Parameters
dsadc | pointer to the DSADC handle (it will be initialized by this function)
config | pointer to the DSADC carrier configuration
Returns
None

Definition at line 148 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initHwChannels().

◆ IfxDsadc_Dsadc_initModule()

IFX_EXTERN void IfxDsadc_Dsadc_initModule | ( | IfxDsadc_Dsadc * | dsadc,
 |  | const IfxDsadc_Dsadc_Config * | config
 | ) |  |

Initialise the DSADC with the supplied configuration.

Parameters
dsadc | pointer to the DSADC handle (it will be initialized by this function)
config | pointer to the DSADC module configuration
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 407 of file IfxDsadc_Dsadc.c.

◆ IfxDsadc_Dsadc_initModuleConfig()

IFX_EXTERN void IfxDsadc_Dsadc_initModuleConfig | ( | IfxDsadc_Dsadc_Config * | config,
 |  | Ifx_DSADC * | dsadc
 | ) |  |

Initialise the config struct with default DSADC configuration.

Parameters
config | pointer to the DSADC module configuration
dsadc | base address of the DSADC register space
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 437 of file IfxDsadc_Dsadc.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » DSADC » DSADC
Collaboration diagram for Channel Functions:

Functions

IFX_EXTERN void | IfxDsadc_Dsadc_initChannel (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initChannelConfig (IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_initChannel()

IFX_EXTERN void IfxDsadc_Dsadc_initChannel | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_ChannelConfig * | config
 | ) |  |

Initialise a DSADC channel with the supplied configuration.

Parameters
channel | pointer to the DSADC channel handle (it will be initialized by this function)
config | pointer to the DSADC Channel configuration
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 179 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initHwChannels().

◆ IfxDsadc_Dsadc_initChannelConfig()

IFX_EXTERN void IfxDsadc_Dsadc_initChannelConfig | ( | IfxDsadc_Dsadc_ChannelConfig * | config,
 |  | IfxDsadc_Dsadc * | dsadc
 | ) |  |

Initialise the config struct with default DSADC channel configuration.

Parameters
config | pointer to the DSADC Channel configuration (it will be initialized by this function)
dsadc | pointer to the DSADC handle
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 237 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initConfig().


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » DSADC » DSADC
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxDsadc_Dsadc_startScan (IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxDsadc_Dsadc_stopScan (IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_startScan()

IFX_INLINE void IfxDsadc_Dsadc_startScan | ( | IfxDsadc_Dsadc * | dsadc,
 |  | uint32 | modulatorMask,
 |  | uint32 | channelMask
 | ) |  |

Enables the conversion of multiple channels.

Parameters
dsadc | Pointer to the DSADC handle
modulatorMask | the modulator which should be running (bitwise selection)
channelMask | the channels which should be scanned (bitwise selection)
Returns
None

A coding example can be found in How to use the DSADC Interface driver?

Definition at line 507 of file IfxDsadc_Dsadc.h.

◆ IfxDsadc_Dsadc_stopScan()

IFX_INLINE void IfxDsadc_Dsadc_stopScan | ( | IfxDsadc_Dsadc * | dsadc,
 |  | uint32 | modulatorMask
 | ) |  |

Disables the conversion of multiple channels.

Parameters
dsadc | Pointer to the DSADC handle
modulatorMask | the modulator which should be running (bitwise selection)
Returns
None
// disable the modulators of all 6 DSADC channels
IfxDsadc_Dsadc_stopScan(&dsadc, 0x3f);

Definition at line 513 of file IfxDsadc_Dsadc.h.


iLLD_TC26B: Result Functions

Functions
Result Functions
iLLD » DSADC » DSADC
Collaboration diagram for Result Functions:

Functions

IFX_INLINE sint16 | IfxDsadc_Dsadc_getMainResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the main chain. More...
IFX_EXTERN sint16 | IfxDsadc_Dsadc_getAuxResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_getAuxResult()

IFX_EXTERN sint16 IfxDsadc_Dsadc_getAuxResult ( IfxDsadc_Dsadc_Channel * channel )

Get result from the auxilary chain.

Parameters
channel Pointer to the DSADC channel handle
Returns
result from the auxiliary chain

Definition at line 123 of file IfxDsadc_Dsadc.c.

◆ IfxDsadc_Dsadc_getMainResult()

IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult ( IfxDsadc_Dsadc_Channel * channel )

Get result from the main chain.

Parameters
channel Pointer to the DSADC channel handle
Returns
result from the main chain

Definition at line 495 of file IfxDsadc_Dsadc.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » DSADC » DSADC
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDsadc_Dsadc_getAuxSrc (IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Aux event. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDsadc_Dsadc_getMainSrc (IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Main event. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Dsadc_getAuxSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDsadc_Dsadc_getAuxSrc ( IfxDsadc_Dsadc_Channel * channel )

Get the interrupt source register for a Aux event.

Parameters
channel Pointer to the DSADC channel handle
Returns
Address/pointer to the interrupt source register

Definition at line 489 of file IfxDsadc_Dsadc.h.

◆ IfxDsadc_Dsadc_getMainSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDsadc_Dsadc_getMainSrc ( IfxDsadc_Dsadc_Channel * channel )

Get the interrupt source register for a Main event.

Parameters
channel Pointer to the DSADC channel handle
Returns
Address/pointer to the interrupt source register

Definition at line 501 of file IfxDsadc_Dsadc.h.


iLLD_TC26B: RDC

Modules
RDC
iLLD » DSADC
Collaboration diagram for RDC:

Modules

Variables
Configuration Functions
StdIf Functions
Structures
Utility Functions

Detailed Description


iLLD_TC26B: Variables

Variables
Variables
iLLD » DSADC » RDC
Collaboration diagram for Variables:

Variables

IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg
GTM TIM Configuration settings. More...

Detailed Description

Variable Documentation

◆ IfxDsadc_Rdc_GtmTimCfg

IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg
Initial value:
= {
.TIM_EN = 1,
.TIM_MODE = IfxGtm_Tim_Mode_inputEvent,
.GPR0_SEL = IfxGtm_Tim_GprSel_tbuTs0,
.GPR1_SEL = IfxGtm_Tim_GprSel_tbuTs0,
.CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg,
.DSL = 0,
.ISL = 0,
}
IfxGtm_Tim_Mode_inputEvent
TIEM.
Definition: IfxGtm_Tim.h:93
IfxGtm_Tim_GprSel_tbuTs0
Definition: IfxGtm_Tim.h:77
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:55

GTM TIM Configuration settings.

Definition at line 106 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_initGtmTim().


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » DSADC » RDC iLLD » DSADC » RDC » | Structures
Collaboration diagram for Configuration Functions:

Functions

IFX_STATIC Ifx_GTM_TIM_CH * | IfxDsadc_Rdc_initGtmTim (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
IFX_STATIC boolean | IfxDsadc_Rdc_initHwChannels (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC hardware channels. More...
IFX_STATIC void | IfxDsadc_Rdc_initHwTimestamp (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the GTM timestamp hardware resources. More...
IFX_EXTERN boolean | IfxDsadc_Rdc_init (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising: More...
IFX_EXTERN void | IfxDsadc_Rdc_initConfig (IfxDsadc_Rdc_Config *config)

Detailed Description

Function Documentation

◆ IfxDsadc_Rdc_init()

IFX_EXTERN boolean IfxDsadc_Rdc_init | ( | IfxDsadc_Rdc * | driver,
 |  | const IfxDsadc_Rdc_Config * | config
 | ) |  |

Initialise the DSADC RDC driver by initialising:

  • Two DSADC hardware channel resources
  • Carrier generation hardware resources
  • Time-stamp hardware resources
  • Driver's run-time data (RAM): tracking observer, fault-detection, interface layer etc.
    Parameters
    driver | Driver's handle, i.e. pointer to IfxDsadc_Rdc RAM location
    config | Config Pointer to the driver's configuration
    Returns
    TRUE in case of success else FALSE

Definition at line 211 of file IfxDsadc_Rdc.c.

◆ IfxDsadc_Rdc_initConfig()

IFX_EXTERN void IfxDsadc_Rdc_initConfig ( IfxDsadc_Rdc_Config * config )
Parameters
config DSADC RDC configuration structure
Returns
None

12-bit default resolution

Definition at line 260 of file IfxDsadc_Rdc.c.

◆ IfxDsadc_Rdc_initGtmTim()

IFX_STATIC Ifx_GTM_TIM_CH * IfxDsadc_Rdc_initGtmTim | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tim | tim,
 |  | IfxGtm_Tim_Ch | timCh,
 |  | boolean | risingEdge
 | ) |  |
Parameters
gtm | Pointer to GTM module registers
tim | TIM Number
timCh | TIM Channel Number
risingEdge | Signal level control

Definition at line 292 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_initHwTimestamp().

◆ IfxDsadc_Rdc_initHwChannels()

IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels | ( | IfxDsadc_Rdc * | driver,
 |  | const IfxDsadc_Rdc_Config * | config
 | ) |  |

Initialise the DSADC hardware channels.

Parameters
driver | Driver handle
config | DSADC RDC configuration structure

Definition at line 303 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().

◆ IfxDsadc_Rdc_initHwTimestamp()

IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp | ( | IfxDsadc_Rdc * | driver,
 |  | const IfxDsadc_Rdc_Config * | config
 | ) |  |

Initialise the GTM timestamp hardware resources.

Parameters
driver | Driver handle
config | DSADC RDC configuration structure
Returns
None
  • Initialize TIM channel which is triggered by application's PWM

  • Initialize TIM channel which is triggered by DSADC sample event

  • Connect DSADC trigger to TIM mux
  • Connect into TIM input

Definition at line 373 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().


iLLD_TC26B: StdIf Functions

Functions
StdIf Functions
iLLD » DSADC » RDC iLLD » DSADC » RDC » | Structures
Collaboration diagram for StdIf Functions:

Functions

IFX_INLINE IfxStdIf_Pos_Status | IfxDsadc_Rdc_getFault (IfxDsadc_Rdc *driver)
IFX_INLINE uint16 | IfxDsadc_Rdc_getPeriodPerRotation (IfxDsadc_Rdc *driver)
IFX_INLINE IfxStdIf_Pos_RawAngle | IfxDsadc_Rdc_getRawPosition (IfxDsadc_Rdc *driver)
IFX_INLINE float32 | IfxDsadc_Rdc_getSpeed (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getAbsolutePosition (IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition More...
IFX_EXTERN IfxStdIf_Pos_Dir | IfxDsadc_Rdc_getDirection (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getOffset (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getPosition (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getRefreshPeriod (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getResolution (IfxDsadc_Rdc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxDsadc_Rdc_getSensorType (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getTurn (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_onEventA (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_reset (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_resetFaults (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_setOffset (IfxDsadc_Rdc *driver, sint32 offset)
IFX_EXTERN void | IfxDsadc_Rdc_setRefreshPeriod (IfxDsadc_Rdc *driver, float32 updatePeriod)
IFX_EXTERN boolean | IfxDsadc_Rdc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos". More...
IFX_EXTERN void | IfxDsadc_Rdc_update (IfxDsadc_Rdc *driver)

Detailed Description

Function Documentation

◆ IfxDsadc_Rdc_getAbsolutePosition()

IFX_EXTERN float32 IfxDsadc_Rdc_getAbsolutePosition ( IfxDsadc_Rdc * driver )

see IfxStdIf_Pos_GetAbsolutePosition

Parameters
driver Driver handle
Returns
Absolute position

Definition at line 156 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getDirection()

IFX_EXTERN IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetDirection
Parameters
driver Driver handle
Returns
Direction

Definition at line 162 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getFault()

IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetFault
Parameters
driver Driver handle
Returns
Fault

Definition at line 584 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getOffset()

IFX_EXTERN sint32 IfxDsadc_Rdc_getOffset ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetOffset
Parameters
driver Driver handle
Returns
Offset address

Definition at line 168 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getPeriodPerRotation()

IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetPeriodPerRotation
Parameters
driver Driver handle
Returns
Period per rotation

Definition at line 590 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getPosition()

IFX_EXTERN float32 IfxDsadc_Rdc_getPosition ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetPosition
Parameters
driver Driver handle
Returns
Position

Definition at line 174 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getRawPosition()

IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetRawPosition
Parameters
driver Driver handle
Returns
Position in ticks

Definition at line 596 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getRefreshPeriod()

IFX_EXTERN float32 IfxDsadc_Rdc_getRefreshPeriod ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetRefreshPeriod
Parameters
driver driver handle
Returns
Update period

Definition at line 180 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getResolution()

IFX_EXTERN sint32 IfxDsadc_Rdc_getResolution ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetResolution
Parameters
driver Driver handle
Returns
Resolution

Definition at line 186 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getSensorType()

IFX_EXTERN IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetSensorType
Parameters
driver driver handle
Returns
Sensor type

Definition at line 192 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getSpeed()

IFX_INLINE float32 IfxDsadc_Rdc_getSpeed ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetSpeed
Parameters
driver Driver handle
Returns
speed

Definition at line 602 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_getTurn()

IFX_EXTERN sint32 IfxDsadc_Rdc_getTurn ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_GetTurn
Parameters
driver Driver handle
Returns
Returns the number of turns

Definition at line 198 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_onEventA()

IFX_EXTERN void IfxDsadc_Rdc_onEventA ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_OnEventA The API handles the event A which corresponds to the DSADC interrupt event.
Parameters
driver Driver's handle
Returns
None

Definition at line 403 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_reset()

IFX_EXTERN void IfxDsadc_Rdc_reset ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_Reset
Parameters
driver Driver handle
Returns
None

Definition at line 426 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_resetFaults()

IFX_EXTERN void IfxDsadc_Rdc_resetFaults ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_ResetFaults
Parameters
driver Driver handle
Returns
None

Definition at line 432 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_setOffset()

IFX_EXTERN void IfxDsadc_Rdc_setOffset | ( | IfxDsadc_Rdc * | driver,
 |  | sint32 | offset
 | ) |  |
See also
IfxStdIf_Pos_SetOffset
Parameters
driver | Driver handle
offset | Offset
Returns
None

Definition at line 438 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_setRefreshPeriod()

IFX_EXTERN void IfxDsadc_Rdc_setRefreshPeriod | ( | IfxDsadc_Rdc * | driver,
 |  | float32 | updatePeriod
 | ) |  |
See also
IfxStdIf_Pos_SetRefreshPeriod
Parameters
driver | Driver handle
updatePeriod | Update period
Returns
None

Definition at line 444 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().

◆ IfxDsadc_Rdc_stdIfPosInit()

IFX_EXTERN boolean IfxDsadc_Rdc_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | IfxDsadc_Rdc * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | Virtual position sensor
Returns
TRUE on success else FALSE

Definition at line 460 of file IfxDsadc_Rdc.c.

◆ IfxDsadc_Rdc_update()

IFX_EXTERN void IfxDsadc_Rdc_update ( IfxDsadc_Rdc * driver )
See also
IfxStdIf_Pos_Update This function is to be executed at user's application interrupt or task, e.g. motor control
Parameters
driver Driver's handle
Returns
None

Definition at line 498 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_stdIfPosInit().


iLLD_TC26B: Structures

Modules | Data Structures | Variables
Structures
iLLD » DSADC » RDC
Collaboration diagram for Structures:

Modules

Configuration Functions
StdIf Functions
Utility Functions

Data Structures

struct | IfxDsadc_Rdc_GtmTimestamp
DSADC timestamp helper using GTM. More...
struct | IfxDsadc_Rdc_ConfigHw
RDC hardware configuration. More...
struct | IfxDsadc_Rdc_Hw
DSADC RDC hardware object structure. More...
struct | IfxDsadc_Rdc_Ts
struct | IfxDsadc_Rdc
DSADC RDC data structure. More...
struct | IfxDsadc_Rdc_Config
DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use default value. More...

Variables

Ifx_GTM * | gtm
Pointer to GTM SFRs. More...
IfxGtm_Tim rdcTim
IfxGtm_Tim_Ch rdcTimChannel
TIM channel triggered by DSADC channel. More...
uint32 rdcTimMuxValue
Mux value used. More...
IfxGtm_Tim_TinMap * pwmTim
TIM channel triggered by PWM trigger. More...
IfxDsadc_Dsadc_ChannelConfig inputConfig
Default channel configuration for both SIN and COS input. More...
IfxDsadc_ChannelId inputSin
Channel ID of DSADC used for SIN input. This will override value given in the inputConfig. More...
IfxDsadc_ChannelId inputCos
Channel ID of DSADC used for COS input. This will override value given in the inputConfig. More...
Ifx_Priority servReqPriority
Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig. More...
IfxSrc_Tos servReqProvider
Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig. More...
boolean startScan
Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called. More...
IfxDsadc_Dsadc_CarrierGenConfig carrierGen
Pointer to the carrier signal generation configuration. More...
IfxDsadc_Cout_Out * outputClock
if not NULL_PTR, modulator clock output pin from inputSin channel will be configured More...
IfxDsadc_Rdc_GtmTimestamp gtmTimestamp
Timestamp helper using GTM. More...
IfxDsadc_Dsadc_Channel inputSin
Handle to SIN input channel. More...
IfxDsadc_Dsadc_Channel inputCos
Handle to COS input channel. More...
Ifx_GTM_TIM_CH * | pwmTimCh
TIM channel for PWM timestamp. More...
Ifx_GTM_TIM_CH * | rdcTimCh
TIM channel for DSADC timestamp. More...
boolean enabled
float32 inSeconds
uint32 rdc
Absolute time of DSADC result. More...
uint32 pwm
Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set. More...
sint32 inTicks
Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set. More...
uint32 maxTicks
Maximum time-stamp value (in ticks of absolute time clock) More...
float32 clockPeriod
Period of absolute time clock (in second) More...
Ifx_AngleTrkF32 angleTrk
sint16 sinIn
sint16 cosIn
float32 updatePeriod
float32 groupDelay
IfxDsadc_Rdc_Hw hardware
IfxDsadc_Rdc_Ts timestamp
float32 kp
Observer proportional gain. More...
float32 ki
Observer integral gain. More...
float32 kd
Observer differential gain. More...
float32 speedLpfFc
Cut-off frequency of speed low-pass filter (in Hertz). More...
float32 errorThreshold
Threshold of error value in the tracking loop (in radian) More...
float32 userTs
Sampling period of the application. More...
sint32 sqrAmplMax
Maximum value for square of signal amplitudes. More...
sint32 sqrAmplMin
Minimum value for square of signal amplitudes. More...
uint16 periodPerRotation
Number of electrical periods per mechanical rotation. More...
boolean reversed
TRUE: reversed direction, FALSE: straight direction. More...
sint32 resolution
Sensor resolution. More...
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)]. More...
IfxDsadc_Rdc_ConfigHw hardware
Pointer to hardware config. More...
IfxDsadc_Dsadc * dsadc
Pointer to the DSADC driver. More...

Detailed Description

Data Structure Documentation

◆ IfxDsadc_Rdc_GtmTimestamp

struct IfxDsadc_Rdc_GtmTimestamp

DSADC timestamp helper using GTM.

Definition at line 305 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc_GtmTimestamp:
[legend]
Data Fields
Ifx_GTM * | gtm | Pointer to GTM SFRs.
IfxGtm_Tim_TinMap * | pwmTim | TIM channel triggered by PWM trigger.
IfxGtm_Tim | rdcTim |
IfxGtm_Tim_Ch | rdcTimChannel | TIM channel triggered by DSADC channel.
uint32 | rdcTimMuxValue | Mux value used.

◆ IfxDsadc_Rdc_ConfigHw

struct IfxDsadc_Rdc_ConfigHw

RDC hardware configuration.

Definition at line 320 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc_ConfigHw:
[legend]
Data Fields
IfxDsadc_Dsadc_CarrierGenConfig carrierGen Pointer to the carrier signal generation configuration.
Note
If NULL_PTR, it is assumed that the carrier generation has been pre-configured
IfxDsadc_Rdc_GtmTimestamp | gtmTimestamp | Timestamp helper using GTM.
IfxDsadc_Dsadc_ChannelConfig | inputConfig | Default channel configuration for both SIN and COS input.
IfxDsadc_ChannelId | inputCos | Channel ID of DSADC used for COS input. This will override value given in the inputConfig.
IfxDsadc_ChannelId | inputSin | Channel ID of DSADC used for SIN input. This will override value given in the inputConfig.
IfxDsadc_Cout_Out * | outputClock | if not NULL_PTR, modulator clock output pin from inputSin channel will be configured
Ifx_Priority | servReqPriority | Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig.
IfxSrc_Tos | servReqProvider | Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig.
boolean | startScan | Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called.

◆ IfxDsadc_Rdc_Hw

struct IfxDsadc_Rdc_Hw

DSADC RDC hardware object structure.

Definition at line 336 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc_Hw:
[legend]
Data Fields
IfxDsadc_Dsadc_Channel | inputCos | Handle to COS input channel.
IfxDsadc_Dsadc_Channel | inputSin | Handle to SIN input channel.
Ifx_GTM_TIM_CH * | pwmTimCh | TIM channel for PWM timestamp.
Ifx_GTM_TIM_CH * | rdcTimCh | TIM channel for DSADC timestamp.

◆ IfxDsadc_Rdc_Ts

struct IfxDsadc_Rdc_Ts

Definition at line 346 of file IfxDsadc_Rdc.h.

Data Fields
float32 | clockPeriod | Period of absolute time clock (in second)
boolean | enabled |
float32 | inSeconds |
sint32 | inTicks | Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set.
uint32 | maxTicks | Maximum time-stamp value (in ticks of absolute time clock)
uint32 | pwm | Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set.
uint32 | rdc | Absolute time of DSADC result.

◆ IfxDsadc_Rdc

struct IfxDsadc_Rdc

DSADC RDC data structure.

Definition at line 363 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc:
[legend]
Data Fields
Ifx_AngleTrkF32 | angleTrk
sint16 | cosIn
float32 | groupDelay
IfxDsadc_Rdc_Hw | hardware
sint16 | sinIn
IfxDsadc_Rdc_Ts | timestamp
float32 | updatePeriod

◆ IfxDsadc_Rdc_Config

struct IfxDsadc_Rdc_Config

DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use default value.

Definition at line 377 of file IfxDsadc_Rdc.h.

Collaboration diagram for IfxDsadc_Rdc_Config:
[legend]
Data Fields
IfxDsadc_Dsadc * | dsadc | Pointer to the DSADC driver.
float32 | errorThreshold | Threshold of error value in the tracking loop (in radian)
IfxDsadc_Rdc_ConfigHw | hardware | Pointer to hardware config.
float32 | kd | Observer differential gain.
float32 | ki | Observer integral gain.
float32 | kp | Observer proportional gain.
IfxStdIf_Pos_RawAngle | offset | Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)].
uint16 | periodPerRotation | Number of electrical periods per mechanical rotation.
sint32 | resolution | Sensor resolution.
boolean | reversed | TRUE: reversed direction, FALSE: straight direction.
float32 | speedLpfFc | Cut-off frequency of speed low-pass filter (in Hertz).
sint32 | sqrAmplMax | Maximum value for square of signal amplitudes.
sint32 | sqrAmplMin | Minimum value for square of signal amplitudes.
float32 | userTs | Sampling period of the application.

Variable Documentation

◆ angleTrk

Ifx_AngleTrkF32 angleTrk

Definition at line 365 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_getAbsolutePosition(), IfxDsadc_Rdc_getDirection(), IfxDsadc_Rdc_getFault(), IfxDsadc_Rdc_getOffset(), IfxDsadc_Rdc_getPeriodPerRotation(), IfxDsadc_Rdc_getPosition(), IfxDsadc_Rdc_getRawPosition(), IfxDsadc_Rdc_getRefreshPeriod(), IfxDsadc_Rdc_getResolution(), IfxDsadc_Rdc_getSpeed(), IfxDsadc_Rdc_getTurn(), IfxDsadc_Rdc_init(), IfxDsadc_Rdc_onEventA(), IfxDsadc_Rdc_reset(), IfxDsadc_Rdc_resetFaults(), IfxDsadc_Rdc_setOffset(), IfxDsadc_Rdc_setRefreshPeriod(), and IfxDsadc_Rdc_update().

◆ carrierGen

IfxDsadc_Dsadc_CarrierGenConfig carrierGen

Pointer to the carrier signal generation configuration.

Note
If NULL_PTR, it is assumed that the carrier generation has been pre-configured

Definition at line 328 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ clockPeriod

float32 clockPeriod

Period of absolute time clock (in second)

Definition at line 354 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_updateTimestamp().

◆ cosIn

sint16 cosIn

Definition at line 367 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_update().

◆ dsadc

IfxDsadc_Dsadc* dsadc

Pointer to the DSADC driver.

Definition at line 392 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initHwChannels().

◆ enabled

boolean enabled

Definition at line 348 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_update().

◆ errorThreshold

float32 errorThreshold

Threshold of error value in the tracking loop (in radian)

Definition at line 383 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ groupDelay

float32 groupDelay

Definition at line 369 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_update().

◆ gtm

Ifx_GTM* gtm

Pointer to GTM SFRs.

Definition at line 307 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateTimestampPeriod(), IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ gtmTimestamp

IfxDsadc_Rdc_GtmTimestamp gtmTimestamp

Timestamp helper using GTM.

Definition at line 331 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateTimestampPeriod(), IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ hardware [1/2]

IfxDsadc_Rdc_Hw hardware

Definition at line 370 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateGroupDelay(), IfxDsadc_Rdc_getUpdatePeriod(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_initHwTimestamp(), IfxDsadc_Rdc_onEventA(), IfxDsadc_Rdc_startConversion(), and IfxDsadc_Rdc_updateTimestamp().

◆ hardware [2/2]

IfxDsadc_Rdc_ConfigHw hardware

Pointer to hardware config.

Definition at line 391 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateTimestampPeriod(), IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initHwChannels(), and IfxDsadc_Rdc_initHwTimestamp().

◆ inputConfig

IfxDsadc_Dsadc_ChannelConfig inputConfig

Default channel configuration for both SIN and COS input.

Definition at line 322 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initHwChannels(), and IfxDsadc_Rdc_initHwTimestamp().

◆ inputCos [1/2]

IfxDsadc_ChannelId inputCos

Channel ID of DSADC used for COS input. This will override value given in the inputConfig.

Definition at line 324 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ inputCos [2/2]

IfxDsadc_Dsadc_Channel inputCos

Handle to COS input channel.

Definition at line 339 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_startConversion().

◆ inputSin [1/2]

IfxDsadc_ChannelId inputSin

Channel ID of DSADC used for SIN input. This will override value given in the inputConfig.

Definition at line 323 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initHwChannels(), and IfxDsadc_Rdc_initHwTimestamp().

◆ inputSin [2/2]

IfxDsadc_Dsadc_Channel inputSin

Handle to SIN input channel.

Definition at line 338 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_calculateGroupDelay(), IfxDsadc_Rdc_getUpdatePeriod(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_startConversion().

◆ inSeconds

float32 inSeconds

Definition at line 349 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_getTimestamp(), and IfxDsadc_Rdc_updateTimestamp().

◆ inTicks

sint32 inTicks

Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set.

Definition at line 352 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_updateTimestamp().

◆ kd

float32 kd

Observer differential gain.

Definition at line 381 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ ki

float32 ki

Observer integral gain.

Definition at line 380 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ kp

float32 kp

Observer proportional gain.

Definition at line 379 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ maxTicks

uint32 maxTicks

Maximum time-stamp value (in ticks of absolute time clock)

Definition at line 353 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_updateTimestamp().

◆ offset

IfxStdIf_Pos_RawAngle offset

Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)].

Definition at line 390 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ outputClock

IfxDsadc_Cout_Out* outputClock

if not NULL_PTR, modulator clock output pin from inputSin channel will be configured

Definition at line 330 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ periodPerRotation

uint16 periodPerRotation

Number of electrical periods per mechanical rotation.

Definition at line 387 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ pwm

uint32 pwm

Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set.

Definition at line 351 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_updateTimestamp().

◆ pwmTim

IfxGtm_Tim_TinMap* pwmTim

TIM channel triggered by PWM trigger.

Definition at line 311 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ pwmTimCh

Ifx_GTM_TIM_CH* pwmTimCh

TIM channel for PWM timestamp.

Definition at line 340 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initHwTimestamp(), and IfxDsadc_Rdc_updateTimestamp().

◆ rdc

uint32 rdc

Absolute time of DSADC result.

Definition at line 350 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_updateTimestamp().

◆ rdcTim

IfxGtm_Tim rdcTim

Definition at line 308 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ rdcTimCh

Ifx_GTM_TIM_CH* rdcTimCh

TIM channel for DSADC timestamp.

Definition at line 341 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initHwTimestamp(), and IfxDsadc_Rdc_onEventA().

◆ rdcTimChannel

IfxGtm_Tim_Ch rdcTimChannel

TIM channel triggered by DSADC channel.

Definition at line 309 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ rdcTimMuxValue

uint32 rdcTimMuxValue

Mux value used.

Definition at line 310 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwTimestamp().

◆ resolution

sint32 resolution

Sensor resolution.

Definition at line 389 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ reversed

boolean reversed

TRUE: reversed direction, FALSE: straight direction.

Definition at line 388 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ servReqPriority

Ifx_Priority servReqPriority

Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig.

Definition at line 325 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ servReqProvider

IfxSrc_Tos servReqProvider

Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig.

Definition at line 326 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ sinIn

sint16 sinIn

Definition at line 366 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_update().

◆ speedLpfFc

float32 speedLpfFc

Cut-off frequency of speed low-pass filter (in Hertz).

Definition at line 382 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ sqrAmplMax

sint32 sqrAmplMax

Maximum value for square of signal amplitudes.

Definition at line 385 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ sqrAmplMin

sint32 sqrAmplMin

Minimum value for square of signal amplitudes.

Definition at line 386 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().

◆ startScan

boolean startScan

Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called.

Definition at line 327 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_initConfig(), and IfxDsadc_Rdc_initHwChannels().

◆ timestamp

IfxDsadc_Rdc_Ts timestamp

Definition at line 371 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_getTimestamp(), IfxDsadc_Rdc_init(), IfxDsadc_Rdc_onEventA(), IfxDsadc_Rdc_update(), and IfxDsadc_Rdc_updateTimestamp().

◆ updatePeriod

float32 updatePeriod

Definition at line 368 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init().

◆ userTs

float32 userTs

Sampling period of the application.

Definition at line 384 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_init(), and IfxDsadc_Rdc_initConfig().


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » DSADC » RDC iLLD » DSADC » RDC » | Structures
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE void | IfxDsadc_Rdc_updateTimestamp (IfxDsadc_Rdc *driver)
Updating RDC timestamps. More...
IFX_STATIC float32 | IfxDsadc_Rdc_calculateGroupDelay (IfxDsadc_Rdc *driver)
Group Dalay calculation. More...
IFX_STATIC float32 | IfxDsadc_Rdc_calculateTimestampPeriod (const IfxDsadc_Rdc_Config *config)
IFX_STATIC float32 | IfxDsadc_Rdc_getUpdatePeriod (IfxDsadc_Rdc *driver)
Return the update period. More...
IFX_INLINE float32 | IfxDsadc_Rdc_getTimestamp (IfxDsadc_Rdc *driver)
Return timestamp in seconds. More...
IFX_EXTERN void | IfxDsadc_Rdc_startConversion (IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels. More...

Detailed Description

Function Documentation

◆ IfxDsadc_Rdc_calculateGroupDelay()

IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay ( IfxDsadc_Rdc * driver )

Group Dalay calculation.

Parameters
driver Driver handle

Definition at line 142 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().

◆ IfxDsadc_Rdc_calculateTimestampPeriod()

IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod ( const IfxDsadc_Rdc_Config * config )
Parameters
config DSADC RDC configuration structure

Definition at line 149 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().

◆ IfxDsadc_Rdc_getTimestamp()

IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp ( IfxDsadc_Rdc * driver )

Return timestamp in seconds.

Parameters
driver Driver handle
Returns
timestamp in seconds.

Definition at line 608 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_update().

◆ IfxDsadc_Rdc_getUpdatePeriod()

IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod ( IfxDsadc_Rdc * driver )

Return the update period.

Parameters
driver Driver handle
Returns
Return the update period in [seconds], i.e. the period of new result (and interrupt)

Definition at line 204 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_init().

◆ IfxDsadc_Rdc_startConversion()

IFX_EXTERN void IfxDsadc_Rdc_startConversion ( IfxDsadc_Rdc * driver )

Synchronously start of both DSADC H/W channels.

Parameters
driver Driver's handle, i.e. pointer to IfxDsadc_Rdc RAM location
Returns
None

Definition at line 450 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_initHwChannels().

◆ IfxDsadc_Rdc_updateTimestamp()

IFX_INLINE void IfxDsadc_Rdc_updateTimestamp ( IfxDsadc_Rdc * driver )

Updating RDC timestamps.

Parameters
driver Driver handle
Returns
None

Definition at line 123 of file IfxDsadc_Rdc.c.

Referenced by IfxDsadc_Rdc_update().


iLLD_TC26B: IfxDsadc_cfg.h File Reference

  • _Impl
Macros
IfxDsadc_cfg.h File Reference
iLLD » DSADC

DSADC on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXDSADC_NUM_CHANNELS 4
Number of channels. More...
#define | IFXDSADC_NUM_MODULES (1)

Detailed Description

DSADC on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDsadc_cfg.h.

Macro Definition Documentation

◆ IFXDSADC_NUM_CHANNELS

#define IFXDSADC_NUM_CHANNELS 4

Number of channels.

Definition at line 46 of file IfxDsadc_cfg.h.

◆ IFXDSADC_NUM_MODULES

#define IFXDSADC_NUM_MODULES (1)

Definition at line 48 of file IfxDsadc_cfg.h.


iLLD_TC26B: IfxDsadc_PinMap.c File Reference

  • _PinMap
Variables
IfxDsadc_PinMap.c File Reference
iLLD » DSADC

DSADC I/O map. More...

#include "IfxDsadc_PinMap.h"
Include dependency graph for IfxDsadc_PinMap.c:

Go to the source code of this file.

Variables

IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMN_P00_5_OUT = {&MODULE_DSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMN_P02_0_OUT = {&MODULE_DSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMN_P33_11_OUT = {&MODULE_DSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMP_P00_6_OUT = {&MODULE_DSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMP_P02_1_OUT = {&MODULE_DSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cgpwm_Out | IfxDsadc_CGPWMP_P33_12_OUT = {&MODULE_DSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6}
IfxDsadc_Cin_In | IfxDsadc_CIN0A_P00_1_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxDsadc_Cin_In | IfxDsadc_CIN0B_P33_5_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxDsadc_Cin_In | IfxDsadc_CIN2A_P00_5_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxDsadc_Cin_In | IfxDsadc_CIN2B_P33_1_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, Ifx_RxSel_b}
IfxDsadc_Cin_In | IfxDsadc_CIN3A_P00_3_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxDsadc_Cin_In | IfxDsadc_CIN3B_P02_7_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxDsadc_Cout_Out | IfxDsadc_COUT0_P00_11_OUT = {&MODULE_DSADC, 0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT0_P00_1_OUT = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT0_P33_5_OUT = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT2_P00_5_OUT = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT2_P33_1_OUT = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT3_P00_3_OUT = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4}
IfxDsadc_Cout_Out | IfxDsadc_COUT3_P02_7_OUT = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4}
IfxDsadc_Din_In | IfxDsadc_DIN0A_P00_2_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 2}, Ifx_RxSel_a}
IfxDsadc_Din_In | IfxDsadc_DIN0B_P33_6_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 6}, Ifx_RxSel_b}
IfxDsadc_Din_In | IfxDsadc_DIN2A_P00_6_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 6}, Ifx_RxSel_a}
IfxDsadc_Din_In | IfxDsadc_DIN2B_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_b}
IfxDsadc_Din_In | IfxDsadc_DIN3A_P00_4_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 4}, Ifx_RxSel_a}
IfxDsadc_Din_In | IfxDsadc_DIN3B_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_b}
IfxDsadc_Dsn_In | IfxDsadc_DS0NA_AN3_IN = {&MODULE_DSADC, 0, {NULL_PTR, 3}, Ifx_RxSel_a}
IfxDsadc_Dsn_In | IfxDsadc_DS0NB_AN1_IN = {&MODULE_DSADC, 0, {NULL_PTR, 1}, Ifx_RxSel_b}
IfxDsadc_Dsn_In | IfxDsadc_DS2NA_AN21_IN = {&MODULE_DSADC, 2, {NULL_PTR,21}, Ifx_RxSel_a}
IfxDsadc_Dsn_In | IfxDsadc_DS3NA_AN37_IN = {&MODULE_DSADC, 3, {NULL_PTR,37}, Ifx_RxSel_a}
IfxDsadc_Dsn_In | IfxDsadc_DS3NA_P40_7_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 7}, Ifx_RxSel_a}
IfxDsadc_Dsn_In | IfxDsadc_DS3NB_AN39_IN = {&MODULE_DSADC, 3, {NULL_PTR,39}, Ifx_RxSel_b}
IfxDsadc_Dsn_In | IfxDsadc_DS3NB_P40_9_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 9}, Ifx_RxSel_b}
IfxDsadc_Dsn_In | IfxDsadc_DS3NC_AN45_IN = {&MODULE_DSADC, 3, {NULL_PTR,45}, Ifx_RxSel_c}
IfxDsadc_Dsn_In | IfxDsadc_DS3ND_AN47_IN = {&MODULE_DSADC, 3, {NULL_PTR,47}, Ifx_RxSel_d}
IfxDsadc_Dsp_In | IfxDsadc_DS0PA_AN2_IN = {&MODULE_DSADC, 0, {NULL_PTR, 2}, Ifx_RxSel_a}
IfxDsadc_Dsp_In | IfxDsadc_DS0PB_AN0_IN = {&MODULE_DSADC, 0, {NULL_PTR, 0}, Ifx_RxSel_b}
IfxDsadc_Dsp_In | IfxDsadc_DS2PA_AN20_IN = {&MODULE_DSADC, 2, {NULL_PTR,20}, Ifx_RxSel_a}
IfxDsadc_Dsp_In | IfxDsadc_DS3PA_AN36_IN = {&MODULE_DSADC, 3, {NULL_PTR,36}, Ifx_RxSel_a}
IfxDsadc_Dsp_In | IfxDsadc_DS3PA_P40_6_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 6}, Ifx_RxSel_a}
IfxDsadc_Dsp_In | IfxDsadc_DS3PB_AN38_IN = {&MODULE_DSADC, 3, {NULL_PTR,38}, Ifx_RxSel_b}
IfxDsadc_Dsp_In | IfxDsadc_DS3PB_P40_8_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 8}, Ifx_RxSel_b}
IfxDsadc_Dsp_In | IfxDsadc_DS3PC_AN44_IN = {&MODULE_DSADC, 3, {NULL_PTR,44}, Ifx_RxSel_c}
IfxDsadc_Dsp_In | IfxDsadc_DS3PD_AN46_IN = {&MODULE_DSADC, 3, {NULL_PTR,46}, Ifx_RxSel_d}
IfxDsadc_Itr_In | IfxDsadc_ITR0E_P33_0_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 0}, Ifx_RxSel_e}
IfxDsadc_Itr_In | IfxDsadc_ITR0F_P33_4_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 4}, Ifx_RxSel_f}
IfxDsadc_Itr_In | IfxDsadc_ITR2E_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_e}
IfxDsadc_Itr_In | IfxDsadc_ITR2F_P33_6_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 6}, Ifx_RxSel_f}
IfxDsadc_Itr_In | IfxDsadc_ITR3E_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_e}
IfxDsadc_Itr_In | IfxDsadc_ITR3F_P00_9_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 9}, Ifx_RxSel_f}
IfxDsadc_Sg_In | IfxDsadc_SGNA_P00_4_IN = {&MODULE_DSADC, {&MODULE_P00, 4}, Ifx_RxSel_a}
IfxDsadc_Sg_In | IfxDsadc_SGNB_P33_13_IN = {&MODULE_DSADC, {&MODULE_P33,13}, Ifx_RxSel_b}
const IfxDsadc_Cgpwm_Out * | IfxDsadc_Cgpwm_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
const IfxDsadc_Cin_In * | IfxDsadc_Cin_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
const IfxDsadc_Cout_Out * | IfxDsadc_Cout_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
const IfxDsadc_Din_In * | IfxDsadc_Din_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
const IfxDsadc_Dsn_In * | IfxDsadc_Dsn_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
const IfxDsadc_Dsp_In * | IfxDsadc_Dsp_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
const IfxDsadc_Itr_In * | IfxDsadc_Itr_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
const IfxDsadc_Sg_In * | IfxDsadc_Sg_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]

Detailed Description

DSADC I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDsadc_PinMap.c.

Variable Documentation

◆ IfxDsadc_Cgpwm_Out_pinTable

const IfxDsadc_Cgpwm_Out* IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxDsadc_CGPWMN_P00_5_OUT,
&IfxDsadc_CGPWMP_P00_6_OUT,
&IfxDsadc_CGPWMN_P02_0_OUT,
&IfxDsadc_CGPWMP_P02_1_OUT,
&IfxDsadc_CGPWMN_P33_11_OUT,
&IfxDsadc_CGPWMP_P33_12_OUT
}
}
IfxDsadc_CGPWMN_P02_0_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
Definition: IfxDsadc_PinMap.c:29
IfxDsadc_CGPWMN_P33_11_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
Definition: IfxDsadc_PinMap.c:30
IfxDsadc_CGPWMP_P00_6_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
Definition: IfxDsadc_PinMap.c:31
IfxDsadc_CGPWMP_P33_12_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
Definition: IfxDsadc_PinMap.c:33
IfxDsadc_CGPWMP_P02_1_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
Definition: IfxDsadc_PinMap.c:32
IfxDsadc_CGPWMN_P00_5_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
Definition: IfxDsadc_PinMap.c:28

Definition at line 81 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMN_P00_5_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT = {&MODULE_DSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2}

Definition at line 28 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMN_P02_0_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT = {&MODULE_DSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4}

Definition at line 29 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMN_P33_11_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT = {&MODULE_DSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6}

Definition at line 30 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMP_P00_6_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT = {&MODULE_DSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2}

Definition at line 31 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMP_P02_1_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT = {&MODULE_DSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4}

Definition at line 32 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CGPWMP_P33_12_OUT

IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT = {&MODULE_DSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6}

Definition at line 33 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN0A_P00_1_IN

IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 34 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN0B_P33_5_IN

IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 35 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN2A_P00_5_IN

IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 36 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN2B_P33_1_IN

IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, Ifx_RxSel_b}

Definition at line 37 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN3A_P00_3_IN

IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 38 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_CIN3B_P02_7_IN

IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 39 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Cin_In_pinTable

const IfxDsadc_Cin_In* IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_CIN0A_P00_1_IN,
&IfxDsadc_CIN0B_P33_5_IN
},
{
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_CIN2A_P00_5_IN,
&IfxDsadc_CIN2B_P33_1_IN
},
{
&IfxDsadc_CIN3A_P00_3_IN,
&IfxDsadc_CIN3B_P02_7_IN
}
}
}
IfxDsadc_CIN2A_P00_5_IN
IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
Definition: IfxDsadc_PinMap.c:36
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxDsadc_CIN0A_P00_1_IN
IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
Definition: IfxDsadc_PinMap.c:34
IfxDsadc_CIN3A_P00_3_IN
IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
Definition: IfxDsadc_PinMap.c:38
IfxDsadc_CIN0B_P33_5_IN
IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
Definition: IfxDsadc_PinMap.c:35
IfxDsadc_CIN2B_P33_1_IN
IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
Definition: IfxDsadc_PinMap.c:37
IfxDsadc_CIN3B_P02_7_IN
IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
Definition: IfxDsadc_PinMap.c:39

Definition at line 92 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT0_P00_11_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT = {&MODULE_DSADC, 0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4}

Definition at line 40 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT0_P00_1_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4}

Definition at line 41 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT0_P33_5_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4}

Definition at line 42 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT2_P00_5_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4}

Definition at line 43 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT2_P33_1_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4}

Definition at line 44 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT3_P00_3_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4}

Definition at line 45 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_COUT3_P02_7_OUT

IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4}

Definition at line 46 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Cout_Out_pinTable

const IfxDsadc_Cout_Out* IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_COUT0_P00_1_OUT,
&IfxDsadc_COUT0_P00_11_OUT,
&IfxDsadc_COUT0_P33_5_OUT
},
{
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_COUT2_P00_5_OUT,
&IfxDsadc_COUT2_P33_1_OUT,
NULL_PTR
},
{
&IfxDsadc_COUT3_P00_3_OUT,
&IfxDsadc_COUT3_P02_7_OUT,
NULL_PTR
}
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxDsadc_COUT3_P02_7_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
Definition: IfxDsadc_PinMap.c:46
IfxDsadc_COUT2_P33_1_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
Definition: IfxDsadc_PinMap.c:44
IfxDsadc_COUT2_P00_5_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
Definition: IfxDsadc_PinMap.c:43
IfxDsadc_COUT0_P00_11_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
Definition: IfxDsadc_PinMap.c:40
IfxDsadc_COUT0_P33_5_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
Definition: IfxDsadc_PinMap.c:42
IfxDsadc_COUT3_P00_3_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
Definition: IfxDsadc_PinMap.c:45
IfxDsadc_COUT0_P00_1_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
Definition: IfxDsadc_PinMap.c:41

Definition at line 113 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN0A_P00_2_IN

IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 2}, Ifx_RxSel_a}

Definition at line 47 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN0B_P33_6_IN

IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 6}, Ifx_RxSel_b}

Definition at line 48 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN2A_P00_6_IN

IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 6}, Ifx_RxSel_a}

Definition at line 49 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN2B_P33_2_IN

IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_b}

Definition at line 50 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN3A_P00_4_IN

IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 4}, Ifx_RxSel_a}

Definition at line 51 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DIN3B_P02_8_IN

IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_b}

Definition at line 52 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Din_In_pinTable

const IfxDsadc_Din_In* IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_DIN0A_P00_2_IN,
&IfxDsadc_DIN0B_P33_6_IN
},
{
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DIN2A_P00_6_IN,
&IfxDsadc_DIN2B_P33_2_IN
},
{
&IfxDsadc_DIN3A_P00_4_IN,
&IfxDsadc_DIN3B_P02_8_IN
}
}
}
IfxDsadc_DIN0B_P33_6_IN
IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
Definition: IfxDsadc_PinMap.c:48
IfxDsadc_DIN2B_P33_2_IN
IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
Definition: IfxDsadc_PinMap.c:50
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxDsadc_DIN0A_P00_2_IN
IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
Definition: IfxDsadc_PinMap.c:47
IfxDsadc_DIN3B_P02_8_IN
IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
Definition: IfxDsadc_PinMap.c:52
IfxDsadc_DIN3A_P00_4_IN
IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
Definition: IfxDsadc_PinMap.c:51
IfxDsadc_DIN2A_P00_6_IN
IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
Definition: IfxDsadc_PinMap.c:49

Definition at line 138 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS0NA_AN3_IN

IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN = {&MODULE_DSADC, 0, {NULL_PTR, 3}, Ifx_RxSel_a}

Definition at line 53 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS0NB_AN1_IN

IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN = {&MODULE_DSADC, 0, {NULL_PTR, 1}, Ifx_RxSel_b}

Definition at line 54 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS0PA_AN2_IN

IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN = {&MODULE_DSADC, 0, {NULL_PTR, 2}, Ifx_RxSel_a}

Definition at line 62 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS0PB_AN0_IN

IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN = {&MODULE_DSADC, 0, {NULL_PTR, 0}, Ifx_RxSel_b}

Definition at line 63 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS2NA_AN21_IN

IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN = {&MODULE_DSADC, 2, {NULL_PTR,21}, Ifx_RxSel_a}

Definition at line 55 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS2PA_AN20_IN

IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN = {&MODULE_DSADC, 2, {NULL_PTR,20}, Ifx_RxSel_a}

Definition at line 64 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NA_AN37_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN = {&MODULE_DSADC, 3, {NULL_PTR,37}, Ifx_RxSel_a}

Definition at line 56 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NA_P40_7_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 7}, Ifx_RxSel_a}

Definition at line 57 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NB_AN39_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN = {&MODULE_DSADC, 3, {NULL_PTR,39}, Ifx_RxSel_b}

Definition at line 58 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NB_P40_9_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 9}, Ifx_RxSel_b}

Definition at line 59 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3NC_AN45_IN

IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN = {&MODULE_DSADC, 3, {NULL_PTR,45}, Ifx_RxSel_c}

Definition at line 60 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3ND_AN47_IN

IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN = {&MODULE_DSADC, 3, {NULL_PTR,47}, Ifx_RxSel_d}

Definition at line 61 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PA_AN36_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN = {&MODULE_DSADC, 3, {NULL_PTR,36}, Ifx_RxSel_a}

Definition at line 65 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PA_P40_6_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 6}, Ifx_RxSel_a}

Definition at line 66 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PB_AN38_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN = {&MODULE_DSADC, 3, {NULL_PTR,38}, Ifx_RxSel_b}

Definition at line 67 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PB_P40_8_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 8}, Ifx_RxSel_b}

Definition at line 68 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PC_AN44_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN = {&MODULE_DSADC, 3, {NULL_PTR,44}, Ifx_RxSel_c}

Definition at line 69 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_DS3PD_AN46_IN

IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN = {&MODULE_DSADC, 3, {NULL_PTR,46}, Ifx_RxSel_d}

Definition at line 70 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Dsn_In_pinTable

const IfxDsadc_Dsn_In* IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_DS0NA_AN3_IN,
&IfxDsadc_DS0NB_AN1_IN,
NULL_PTR,
NULL_PTR
},
{
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DS2NA_AN21_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DS3NA_P40_7_IN,
&IfxDsadc_DS3NB_P40_9_IN,
&IfxDsadc_DS3NC_AN45_IN,
&IfxDsadc_DS3ND_AN47_IN
}
}
}
IfxDsadc_DS3NB_P40_9_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
Definition: IfxDsadc_PinMap.c:59
IfxDsadc_DS2NA_AN21_IN
IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
Definition: IfxDsadc_PinMap.c:55
IfxDsadc_DS3NC_AN45_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
Definition: IfxDsadc_PinMap.c:60
IfxDsadc_DS0NA_AN3_IN
IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
Definition: IfxDsadc_PinMap.c:53
IfxDsadc_DS0NB_AN1_IN
IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
Definition: IfxDsadc_PinMap.c:54
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxDsadc_DS3ND_AN47_IN
IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
Definition: IfxDsadc_PinMap.c:61
IfxDsadc_DS3NA_P40_7_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
Definition: IfxDsadc_PinMap.c:57

Definition at line 159 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Dsp_In_pinTable

const IfxDsadc_Dsp_In* IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxDsadc_DS0PA_AN2_IN,
&IfxDsadc_DS0PB_AN0_IN,
NULL_PTR,
NULL_PTR
},
{
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DS2PA_AN20_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxDsadc_DS3PA_P40_6_IN,
&IfxDsadc_DS3PB_P40_8_IN,
&IfxDsadc_DS3PC_AN44_IN,
&IfxDsadc_DS3PD_AN46_IN
}
}
}
IfxDsadc_DS0PA_AN2_IN
IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
Definition: IfxDsadc_PinMap.c:62
IfxDsadc_DS3PB_P40_8_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
Definition: IfxDsadc_PinMap.c:68
IfxDsadc_DS0PB_AN0_IN
IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
Definition: IfxDsadc_PinMap.c:63
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxDsadc_DS3PC_AN44_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
Definition: IfxDsadc_PinMap.c:69
IfxDsadc_DS3PA_P40_6_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
Definition: IfxDsadc_PinMap.c:66
IfxDsadc_DS2PA_AN20_IN
IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
Definition: IfxDsadc_PinMap.c:64
IfxDsadc_DS3PD_AN46_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
Definition: IfxDsadc_PinMap.c:70

Definition at line 188 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR0E_P33_0_IN

IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 0}, Ifx_RxSel_e}

Definition at line 71 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR0F_P33_4_IN

IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 4}, Ifx_RxSel_f}

Definition at line 72 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR2E_P33_2_IN

IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_e}

Definition at line 73 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR2F_P33_6_IN

IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 6}, Ifx_RxSel_f}

Definition at line 74 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR3E_P02_8_IN

IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_e}

Definition at line 75 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_ITR3F_P00_9_IN

IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 9}, Ifx_RxSel_f}

Definition at line 76 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Itr_In_pinTable

const IfxDsadc_Itr_In* IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]

Definition at line 217 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_Sg_In_pinTable

const IfxDsadc_Sg_In* IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxDsadc_SGNA_P00_4_IN,
&IfxDsadc_SGNB_P33_13_IN
}
}
IfxDsadc_SGNA_P00_4_IN
IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
Definition: IfxDsadc_PinMap.c:77
IfxDsadc_SGNB_P33_13_IN
IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
Definition: IfxDsadc_PinMap.c:78

Definition at line 254 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_SGNA_P00_4_IN

IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN = {&MODULE_DSADC, {&MODULE_P00, 4}, Ifx_RxSel_a}

Definition at line 77 of file IfxDsadc_PinMap.c.

◆ IfxDsadc_SGNB_P33_13_IN

IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN = {&MODULE_DSADC, {&MODULE_P33,13}, Ifx_RxSel_b}

Definition at line 78 of file IfxDsadc_PinMap.c.


iLLD_TC26B: IfxDsadc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxDsadc_PinMap.h File Reference
iLLD » DSADC

DSADC I/O map. More...

#include <IfxDsadc_reg.h>
#include <_Impl/IfxDsadc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxDsadc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxDsadc_Dsn_In
DS negative pin mapping structure. More...
struct | IfxDsadc_Dsp_In
DS positive pin mapping structure. More...
struct | IfxDsadc_Cin_In
CIN pin mapping structure. More...
struct | IfxDsadc_Din_In
DIN pin mapping structure. More...
struct | IfxDsadc_Itr_In
ITR pin mapping structure. More...
struct | IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure. More...
struct | IfxDsadc_Sg_In
SG pin mapping structure. More...
struct | IfxDsadc_Cout_Out
COUT pin mapping structure. More...

Macros

#define | IFXDSADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXDSADC_PINMAP_NUM_CHANNELS 4
#define | IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
#define | IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2
#define | IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3
#define | IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2
#define | IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
#define | IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
#define | IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
#define | IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2

Variables

IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
DSADC_CGPWMN: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
DSADC_CGPWMP: DSADC output. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
DSADC_CIN0A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
DSADC_CIN0B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
DSADC_CIN2A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
DSADC_CIN2B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
DSADC_CIN3A: DSADC input. More...
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
DSADC_CIN3B: DSADC input. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
DSADC_COUT0: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
DSADC_COUT2: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
DSADC_COUT2: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
DSADC_COUT3: DSADC output. More...
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
DSADC_COUT3: DSADC output. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
DSADC_DIN0A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
DSADC_DIN0B: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
DSADC_DIN2A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
DSADC_DIN2B: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
DSADC_DIN3A: DSADC input. More...
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
DSADC_DIN3B: DSADC input. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C. More...
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C. More...
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN
DSADC_ITR0E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN
DSADC_ITR0F: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN
DSADC_ITR2E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN
DSADC_ITR2F: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN
DSADC_ITR3E: DSADC input. More...
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN
DSADC_ITR3F: DSADC input. More...
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
DSADC_SGNA: DSADC input. More...
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
DSADC_SGNB: DSADC input. More...
IFX_EXTERN const IfxDsadc_Cgpwm_Out * | IfxDsadc_Cgpwm_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxDsadc_Cgpwm_Out table. More...
IFX_EXTERN const IfxDsadc_Cin_In * | IfxDsadc_Cin_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
IfxDsadc_Cin_In table. More...
IFX_EXTERN const IfxDsadc_Cout_Out * | IfxDsadc_Cout_Out_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
IfxDsadc_Cout_Out table. More...
IFX_EXTERN const IfxDsadc_Din_In * | IfxDsadc_Din_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
IfxDsadc_Din_In table. More...
IFX_EXTERN const IfxDsadc_Dsn_In * | IfxDsadc_Dsn_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxDsadc_Dsn_In table. More...
IFX_EXTERN const IfxDsadc_Dsp_In * | IfxDsadc_Dsp_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxDsadc_Dsp_In table. More...
IFX_EXTERN const IfxDsadc_Itr_In * | IfxDsadc_Itr_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxDsadc_Itr_In table. More...
IFX_EXTERN const IfxDsadc_Sg_In * | IfxDsadc_Sg_In_pinTable [IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxDsadc_Sg_In table. More...

Detailed Description

DSADC I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDsadc_PinMap.h.


iLLD_TC26B: IfxDsadc_Dsadc.h File Reference

  • Dsadc
  • Dsadc
Data Structures | Functions
IfxDsadc_Dsadc.h File Reference
iLLD » DSADC

DSADC DSADC details. More...

#include "Dsadc/Std/IfxDsadc.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxDsadc_Dsadc.h:

Go to the source code of this file.

Data Structures

struct | IfxDsadc_Dsadc_AuxFilterConfig
Auxiliary comb filter configuration structure. More...
struct | IfxDsadc_Dsadc_ChannelPins
Channel Pins Configuration structure. More...
struct | IfxDsadc_Dsadc_CombFilterConfig
Comb filter configuration structure. More...
struct | IfxDsadc_Dsadc_DemodulatorConfig
Demodulator configuration structure. More...
struct | IfxDsadc_Dsadc_FirFilterConfig
FIR filters configuration structure. More...
struct | IfxDsadc_Dsadc_IntegratorConfig
Integrator configuration structure. More...
struct | IfxDsadc_Dsadc_ModulatorConfig
Modulator configuration structure. More...
struct | IfxDsadc_Dsadc_RectifierConfig
Rectifier configuration structure. More...
struct | IfxDsadc_Dsadc
DSADC handle data structure. More...
struct | IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure. More...
struct | IfxDsadc_Dsadc_Channel
Channel handle structure. More...
struct | IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure. More...
struct | IfxDsadc_Dsadc_Config
Clock configuration data structure. More...

Functions

IFX_EXTERN void | IfxDsadc_Dsadc_initCarrierGen (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initModule (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initModuleConfig (IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initChannel (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initChannelConfig (IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration. More...
IFX_INLINE void | IfxDsadc_Dsadc_startScan (IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxDsadc_Dsadc_stopScan (IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_INLINE sint16 | IfxDsadc_Dsadc_getMainResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the main chain. More...
IFX_EXTERN sint16 | IfxDsadc_Dsadc_getAuxResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDsadc_Dsadc_getAuxSrc (IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Aux event. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDsadc_Dsadc_getMainSrc (IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Main event. More...
IFX_EXTERN void | IfxDsadc_Dsadc_initCarrierGenConfig (IfxDsadc_Dsadc_CarrierGenConfig *config)

Detailed Description

DSADC DSADC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDsadc_Dsadc.h.

Function Documentation

◆ IfxDsadc_Dsadc_initCarrierGenConfig()

IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGenConfig ( IfxDsadc_Dsadc_CarrierGenConfig * config )
Parameters
config Pointer to DSADC Carrier Configuration
Returns
None

Definition at line 463 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initConfig().


iLLD_TC26B: IfxDsadc_Rdc.h File Reference

  • Dsadc
  • Rdc
Data Structures | Functions
IfxDsadc_Rdc.h File Reference
iLLD » DSADC

DSADC RDC details. More...

#include "SysSe/Math/Ifx_AngleTrkF32.h"
#include "Dsadc/Dsadc/IfxDsadc_Dsadc.h"
#include "Gtm/Std/IfxGtm_Tim.h"
#include "_PinMap/IfxGtm_PinMap.h"
#include "Ifx_Cfg.h"
Include dependency graph for IfxDsadc_Rdc.h:

Go to the source code of this file.

Data Structures

struct | IfxDsadc_Rdc_GtmTimestamp
DSADC timestamp helper using GTM. More...
struct | IfxDsadc_Rdc_ConfigHw
RDC hardware configuration. More...
struct | IfxDsadc_Rdc_Hw
DSADC RDC hardware object structure. More...
struct | IfxDsadc_Rdc_Ts
struct | IfxDsadc_Rdc
DSADC RDC data structure. More...
struct | IfxDsadc_Rdc_Config
DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use default value. More...

Macros

Getting result functions
{ // within context of user's application interrupt or task
extern IfxDsadc_Rdc rdcHandle;
IfxDsadc_Rdc_update(&rdcHandle); // final update
IfxStdIf_Pos_RawAngle position = IfxDsadc_Rdc_getRawPosition(&rdcHandle);
StdReal speedRad_s = IfxDsadc_Rdc_getSpeed(&rdcHandle);
}

Alternatively, the application may use Standard interface: Position interface for accessing the actual results.

{ // within context of user's application interrupt or task
extern IfxDsadc_Rdc rdcHandle;
Ifx_AngleTrkF32_PosIf* posIf = (Ifx_AngleTrkF32_PosIf*)&rdcHandle; // cast is safe because it's located in the same address
PosIf_update(posIf); // final update, alias of IfxDsadc_Rdc_update()
elAngle = PosIf_getElAngle(posIf);
elSpeed = PosIf_getElSpeed(posIf);
faultOccurred = PosIf_isFault(posIf);
}
Note
the IfxDsadc_Rdc_update() is implementing the PosIf_update(). Therefore, only one of them shall be used.
#define | IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION (1)
#define | IFXDSADC_RDC_CFG_DEBUG (0)

Functions

IFX_EXTERN boolean | IfxDsadc_Rdc_init (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising: More...
IFX_EXTERN void | IfxDsadc_Rdc_initConfig (IfxDsadc_Rdc_Config *config)
IFX_INLINE IfxStdIf_Pos_Status | IfxDsadc_Rdc_getFault (IfxDsadc_Rdc *driver)
IFX_INLINE uint16 | IfxDsadc_Rdc_getPeriodPerRotation (IfxDsadc_Rdc *driver)
IFX_INLINE IfxStdIf_Pos_RawAngle | IfxDsadc_Rdc_getRawPosition (IfxDsadc_Rdc *driver)
IFX_INLINE float32 | IfxDsadc_Rdc_getSpeed (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getAbsolutePosition (IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition More...
IFX_EXTERN IfxStdIf_Pos_Dir | IfxDsadc_Rdc_getDirection (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getOffset (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getPosition (IfxDsadc_Rdc *driver)
IFX_EXTERN float32 | IfxDsadc_Rdc_getRefreshPeriod (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getResolution (IfxDsadc_Rdc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxDsadc_Rdc_getSensorType (IfxDsadc_Rdc *driver)
IFX_EXTERN sint32 | IfxDsadc_Rdc_getTurn (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_onEventA (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_reset (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_resetFaults (IfxDsadc_Rdc *driver)
IFX_EXTERN void | IfxDsadc_Rdc_setOffset (IfxDsadc_Rdc *driver, sint32 offset)
IFX_EXTERN void | IfxDsadc_Rdc_setRefreshPeriod (IfxDsadc_Rdc *driver, float32 updatePeriod)
IFX_EXTERN boolean | IfxDsadc_Rdc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos". More...
IFX_EXTERN void | IfxDsadc_Rdc_update (IfxDsadc_Rdc *driver)
IFX_INLINE float32 | IfxDsadc_Rdc_getTimestamp (IfxDsadc_Rdc *driver)
Return timestamp in seconds. More...
IFX_EXTERN void | IfxDsadc_Rdc_startConversion (IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels. More...

Detailed Description

DSADC RDC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Please refer to page Resolver-to-digital Converter with DSADC for more details. This module uses the following modules:

  • DSADC
  • Angle-Tracking Observer

Example usage: Initialisation shall be done by using IfxDsadc_Rdc_init().

IfxDsadc_Rdc rdcHandle;
IfxDsadc_Rdc_Config rdcConfig;
IfxDsadc_Rdc_initConfig(&rdcConfig);
rdcConfig.hardware.inputConfig.module = &MODULE_DSADC;
IfxDsadc_Rdc_init(&rdcHandle, &rdcConfig);
IfxDsadc_Rdc_startConversion(&rdcHandle);

After successful initialisation, one DSADC channel may generate interrupt request to CPU. Function IfxDsadc_Rdc_onEventA() shall be called in the interrupt service routine.

The function IfxDsadc_Rdc_update() shall be called in the user application's task or interrupt context for updating the final outputs (position and speed), (e.g. running inside motor PWM interrupt context)

Definition in file IfxDsadc_Rdc.h.

Macro Definition Documentation

◆ IFXDSADC_RDC_CFG_DEBUG

#define IFXDSADC_RDC_CFG_DEBUG (0)

Definition at line 294 of file IfxDsadc_Rdc.h.

Referenced by IfxDsadc_Rdc_updateTimestamp().

◆ IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION

#define IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION (1)

Definition at line 290 of file IfxDsadc_Rdc.h.


iLLD_TC26B: IfxDsadc.h File Reference

  • Dsadc
  • Std
Enumerations | Functions
IfxDsadc.h File Reference
iLLD » DSADC

DSADC basic functionality. More...

#include "_Impl/IfxDsadc_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_PinMap/IfxDsadc_PinMap.h"
#include "IfxDsadc_reg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxDsadc.h:

Go to the source code of this file.

Enumerations

enum IfxDsadc_AuxCombFilterShift {
IfxDsadc_AuxCombFilterShift_noShift = 0,
IfxDsadc_AuxCombFilterShift_shiftBy1 = 1,
IfxDsadc_AuxCombFilterShift_shiftBy2 = 2,
IfxDsadc_AuxCombFilterShift_shiftBy3 = 3
}
Comb Filter (auxiliary) shift control
Definition in Ifx_DSADC.FCFGA.B.AFSC. More...
enum IfxDsadc_AuxCombFilterType {
IfxDsadc_AuxCombFilterType_comb1 = 0,
IfxDsadc_AuxCombFilterType_comb2 = 1,
IfxDsadc_AuxCombFilterType_comb3 = 2,
IfxDsadc_AuxCombFilterType_combF = 3
}
Comb Filter (auxiliary) configuration/type
Definition in Ifx_DSADC.FCFGA.B.CFAC. More...
enum IfxDsadc_AuxEvent {
IfxDsadc_AuxEvent_everyNewResult = 0,
IfxDsadc_AuxEvent_insideBoundary = 1,
IfxDsadc_AuxEvent_outsideBoundary = 2
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.ESEL. More...
enum IfxDsadc_AuxGate {
IfxDsadc_AuxGate_definedByESEL = 0,
IfxDsadc_AuxGate_coupledToIntegrator = 1
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.EGT. More...
enum IfxDsadc_AuxServiceRequest {
IfxDsadc_AuxServiceRequest_never = 0,
IfxDsadc_AuxServiceRequest_auxFilter = 1,
IfxDsadc_AuxServiceRequest_altSource = 2
}
Service request generation (auxiliary)
Definition in Ifx_DSADC.FCFGA.B.SRGA. More...
enum IfxDsadc_CarrierWaveformMode {
IfxDsadc_CarrierWaveformMode_stopped = 0,
IfxDsadc_CarrierWaveformMode_square = 1,
IfxDsadc_CarrierWaveformMode_triangle = 2,
IfxDsadc_CarrierWaveformMode_sine = 3
}
Carrier generation mode
Definition in Ifx_DSADC.CGCFG.B.CGMOD. More...
enum IfxDsadc_ChannelId {
IfxDsadc_ChannelId_0 = 0,
IfxDsadc_ChannelId_2 = 2,
IfxDsadc_ChannelId_3 = 3
}
Specifies the channel Index. More...
enum IfxDsadc_CommonModeVoltage {
IfxDsadc_CommonModeVoltage_a = 0,
IfxDsadc_CommonModeVoltage_b = 1,
IfxDsadc_CommonModeVoltage_c = 2
}
Modulator common mode voltage selection
Definition in Ifx_DSADC.MODCFGx.B.CMVS. More...
enum IfxDsadc_FirDataShift {
IfxDsadc_FirDataShift_noShift = 0,
IfxDsadc_FirDataShift_shiftBy1 = 1,
IfxDsadc_FirDataShift_shiftBy2 = 2,
IfxDsadc_FirDataShift_shiftBy3 = 3
}
FIR data shift control
Selects the displacement caused by the data shifter at the FIR filter output
Definition in Ifx_DSADC.FCFGM.B.DSH. More...
enum IfxDsadc_FirInternalShift {
IfxDsadc_FirInternalShift_noShift = 0,
IfxDsadc_FirInternalShift_shiftBy1 = 1
}
FIR shift control
Selects the displacement caused by the data shifter inbetween the FIR filter blocks.
Definition in Ifx_DSADC.FCFGM.B.FSH. More...
enum IfxDsadc_InputConfig {
IfxDsadc_InputConfig_inputPin = 0,
IfxDsadc_InputConfig_supplyVoltage = 1,
IfxDsadc_InputConfig_commonModeVoltage = 2,
IfxDsadc_InputConfig_referenceGround = 3
}
Modulator configuration of positive/negative input line
Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN. More...
enum IfxDsadc_InputDataSource {
IfxDsadc_InputDataSource_onChipStandAlone = 0,
IfxDsadc_InputDataSource_onChipCombined = 1,
IfxDsadc_InputDataSource_directInputA = 2,
IfxDsadc_InputDataSource_invertedInputA = 3,
IfxDsadc_InputDataSource_directInputB = 4,
IfxDsadc_InputDataSource_invertedInputB = 5
}
Demodulator input data source selection
Definition in Ifx_DSADC.DICFG.B.DSRC. More...
enum IfxDsadc_InputGain {
IfxDsadc_InputGain_factor1 = 0,
IfxDsadc_InputGain_factor2 = 1,
IfxDsadc_InputGain_factor4 = 2,
IfxDsadc_InputGain_factor8 = 3,
IfxDsadc_InputGain_factor16 = 4
}
Modulator gain select of analog input path
Definition in Ifx_DSADC.MODCFGx.B.GAINSEL. More...
enum IfxDsadc_InputPin {
IfxDsadc_InputPin_a = 0,
IfxDsadc_InputPin_b = 1,
IfxDsadc_InputPin_c = 2,
IfxDsadc_InputPin_d = 3
}
Modulator input pin selection
Definition in Ifx_DSADC.MODCFGx.B.INMUX. More...
enum IfxDsadc_IntegrationWindowSize {
IfxDsadc_IntegrationWindowSize_internalControl = 0,
IfxDsadc_IntegrationWindowSize_externalControl = 1
}
Integrator window size
Definition in Ifx_DSADC.IWCTR.B.IWS. More...
enum IfxDsadc_IntegratorTrigger {
IfxDsadc_IntegratorTrigger_bypassed = 0,
IfxDsadc_IntegratorTrigger_fallingEdge = 1,
IfxDsadc_IntegratorTrigger_risingEdge = 2,
IfxDsadc_IntegratorTrigger_alwaysActive = 3
}
Integrator trigger mode
NOTE: switch-first to bypassed before using other mode
Definition in Ifx_DSADC.DICFG.B.ITRMODE. More...
enum IfxDsadc_LowPowerSupply {
IfxDsadc_LowPowerSupply_5V = 0,
IfxDsadc_LowPowerSupply_3_3V = 1
}
Low power supply voltage select
Definition in Ifx_DSADC.GLOBCFG.B.LOSUP. More...
enum IfxDsadc_MainCombFilterShift {
IfxDsadc_MainCombFilterShift_noShift = 0,
IfxDsadc_MainCombFilterShift_shiftBy1 = 1,
IfxDsadc_MainCombFilterShift_shiftBy2 = 2,
IfxDsadc_MainCombFilterShift_shiftBy3 = 3
}
Comb Filter (Main Chain) shift control
Definition in Ifx_DSADC.FCFGC.B.MFSC. More...
enum IfxDsadc_MainCombFilterType {
IfxDsadc_MainCombFilterType_comb1 = 0,
IfxDsadc_MainCombFilterType_comb2 = 1,
IfxDsadc_MainCombFilterType_comb3 = 2,
IfxDsadc_MainCombFilterType_combF = 3
}
Comb Filter (Main Chain) configuration/type
Definition in Ifx_DSADC.FCFGC.B.CFMC. More...
enum IfxDsadc_MainServiceRequest {
IfxDsadc_MainServiceRequest_never = 0,
IfxDsadc_MainServiceRequest_highGateSignal = 1,
IfxDsadc_MainServiceRequest_lowGateSignal = 2,
IfxDsadc_MainServiceRequest_everyNewResult = 3
}
Service request generation (main chain)
Definition in Ifx_DSADC.FCFGC.B.SRGM. More...
enum IfxDsadc_ModulatorClock {
IfxDsadc_ModulatorClock_off = 0,
IfxDsadc_ModulatorClock_fDSD = 1,
IfxDsadc_ModulatorClock_fERAY = 2,
IfxDsadc_ModulatorClock_fOSC0 = 3
}
Modulator clock select
Definition in Ifx_DSADC.GLOBCFG.B.MCSEL. More...
enum IfxDsadc_ModulatorClockDivider {
IfxDsadc_ModulatorClockDivider_div2 = 0,
IfxDsadc_ModulatorClockDivider_div4,
IfxDsadc_ModulatorClockDivider_div6,
IfxDsadc_ModulatorClockDivider_div8,
IfxDsadc_ModulatorClockDivider_div10,
IfxDsadc_ModulatorClockDivider_div12,
IfxDsadc_ModulatorClockDivider_div14,
IfxDsadc_ModulatorClockDivider_div16,
IfxDsadc_ModulatorClockDivider_div18,
IfxDsadc_ModulatorClockDivider_div20,
IfxDsadc_ModulatorClockDivider_div22,
IfxDsadc_ModulatorClockDivider_div24,
IfxDsadc_ModulatorClockDivider_div26,
IfxDsadc_ModulatorClockDivider_div28,
IfxDsadc_ModulatorClockDivider_div30,
IfxDsadc_ModulatorClockDivider_div32
}
Modulator divider factor for modulator clock
Definition in Ifx_DSADC.MODCFGx.B.DIVM. More...
enum IfxDsadc_RectifierSignSource {
IfxDsadc_RectifierSignSource_onChipGenerator = 0,
IfxDsadc_RectifierSignSource_nextChannel = 1,
IfxDsadc_RectifierSignSource_externalA = 2,
IfxDsadc_RectifierSignSource_externalB = 3
}
Rectifier sign source
Selects the sign signal that is to be delayed.
Definition in Ifx_DSADC.RECT.B.SSRC. More...
enum IfxDsadc_SampleClockSource {
IfxDsadc_SampleClockSource_internal = 0,
IfxDsadc_SampleClockSource_inputA = 1,
IfxDsadc_SampleClockSource_inputB = 2,
IfxDsadc_SampleClockSource_inputC = 3
}
Demodulator sample clock source select
Definition in Ifx_DSADC.DICFG.B.CSRC. More...
enum IfxDsadc_SampleStrobe {
IfxDsadc_SampleStrobe_noDataStrobe = 0,
IfxDsadc_SampleStrobe_sampleOnRisingEdge = 1,
IfxDsadc_SampleStrobe_sampleOnFallingEdge = 2,
IfxDsadc_SampleStrobe_sampleOnBothEdges = 3,
IfxDsadc_SampleStrobe_reserved = 4,
IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges = 5,
IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges = 6
}
Demodulator data strobe generation mode
Definition in Ifx_DSADC.DICFG.B.STROBE. More...
enum IfxDsadc_SleepMode {
IfxDsadc_SleepMode_enable = 0,
IfxDsadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_DSADC.CLC.B.EDIS. More...
enum IfxDsadc_TimestampTrigger {
IfxDsadc_TimestampTrigger_noTrigger = 0,
IfxDsadc_TimestampTrigger_fallingEdge = 1,
IfxDsadc_TimestampTrigger_risingEdge = 2,
IfxDsadc_TimestampTrigger_eachEdge = 3
}
Timestamp trigger mode
Definition in Ifx_DSADC.DICFG.B.TSTRMODE. More...
enum IfxDsadc_TriggerInput {
IfxDsadc_TriggerInput_a = 0,
IfxDsadc_TriggerInput_b = 1,
IfxDsadc_TriggerInput_c = 2,
IfxDsadc_TriggerInput_d = 3,
IfxDsadc_TriggerInput_e = 4,
IfxDsadc_TriggerInput_f = 5,
IfxDsadc_TriggerInput_g = 6,
IfxDsadc_TriggerInput_h = 7
}
Trigger select
Definition in Ifx_DSADC.DICFG.B.TRSEL. More...

Functions

IFX_INLINE void | IfxDsadc_setSleepMode (Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxDsadc_startScan (Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels. More...
IFX_INLINE void | IfxDsadc_stopScan (Ifx_DSADC *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels. More...
IFX_EXTERN void | IfxDsadc_resetModule (Ifx_DSADC *dsadc)
resets the DSADC kernel More...
IFX_INLINE sint16 | IfxDsadc_getAuxResult (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the auxiliary chain. More...
IFX_INLINE uint16 | IfxDsadc_getMainCombDecimation (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the main comb decimation factor. More...
IFX_INLINE sint16 | IfxDsadc_getMainResult (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain. More...
IFX_INLINE boolean | IfxDsadc_isModuleEnabled (Ifx_DSADC *dsadc)
Return TRUE if DSADC module is enabled. More...
IFX_INLINE void | IfxDsadc_setCarrierMode (Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode. More...
IFX_EXTERN float32 | IfxDsadc_getIntegratorOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getMainCombOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getMainGroupDelay (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
IFX_EXTERN float32 | IfxDsadc_getModulatorClockFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
IFX_EXTERN float32 | IfxDsadc_getModulatorInputClockFreq (Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxDsadc_getAuxSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxDsadc_getMainSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...
IFX_INLINE void | IfxDsadc_initCgPwmPin (const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output. More...
IFX_INLINE void | IfxDsadc_initCinPin (const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input. More...
IFX_INLINE void | IfxDsadc_initCoutPin (const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output. More...
IFX_INLINE void | IfxDsadc_initDinPin (const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input. More...
IFX_INLINE void | IfxDsadc_initDsnPin (const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxDsadc_initDspPin (const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input. More...
IFX_INLINE void | IfxDsadc_initItrPin (const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input. More...
IFX_INLINE void | IfxDsadc_initSgPin (const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input. More...

Detailed Description

DSADC basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDsadc.h.


iLLD_TC26B: DTS

Modules | Files
DTS
iLLD
Collaboration diagram for DTS:

Modules

Implementation
Standard Driver
How to use the DTS Interface driver?
DTS

Files

file | IfxDts_cfg.h
DTS on-chip implementation data.
file | IfxDts_Dts.h
DTS DTS details.
file | IfxDts.h
DTS basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » DTS
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » DTS
Collaboration diagram for Standard Driver:

Modules

Control functions
Status functions

Detailed Description


iLLD_TC26B: Control functions

Functions
Control functions
iLLD » DTS » Standard Driver
Collaboration diagram for Control functions:

Functions

IFX_INLINE void | IfxDts_disableSensorControl (void)
Disable the writing of register bits except START bit. More...
IFX_INLINE void | IfxDts_enableSensor (void)
Enables the DTS sensor. More...
IFX_INLINE void | IfxDts_startSensor (void)
Starts the next temperature measurement. More...

Detailed Description

Function Documentation

◆ IfxDts_disableSensorControl()

IFX_INLINE void IfxDts_disableSensorControl ( void )

Disable the writing of register bits except START bit.

Returns
None

Definition at line 103 of file IfxDts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_enableSensor()

IFX_INLINE void IfxDts_enableSensor ( void )

Enables the DTS sensor.

Returns
None

Definition at line 110 of file IfxDts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_startSensor()

IFX_INLINE void IfxDts_startSensor ( void )

Starts the next temperature measurement.

Returns
None

Definition at line 134 of file IfxDts.h.

Referenced by IfxDts_Dts_startSensor().


iLLD_TC26B: Status functions

Functions
Status functions
iLLD » DTS » Standard Driver
Collaboration diagram for Status functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDts_getSrcPointer (void)
Gets the Interrupt request source. More...
IFX_INLINE uint16 | IfxDts_getTemperatureValue (void)
Read the temperature measurement result. More...
IFX_INLINE boolean | IfxDts_isBusy (void)
Returns the current BUSY status of the Sensor. More...

Detailed Description

Function Documentation

◆ IfxDts_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer ( void )

Gets the Interrupt request source.

Returns
Address of interrupt request source

Definition at line 116 of file IfxDts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_getTemperatureValue()

IFX_INLINE uint16 IfxDts_getTemperatureValue ( void )

Read the temperature measurement result.

Returns
Temperature measurement result

Definition at line 122 of file IfxDts.h.

Referenced by IfxDts_Dts_getTemperatureCelsius(), and IfxDts_Dts_getTemperatureValue().

◆ IfxDts_isBusy()

IFX_INLINE boolean IfxDts_isBusy ( void )

Returns the current BUSY status of the Sensor.

Returns
TRUE if Sensor is busy in measuring temperature otherwise FALSE

Definition at line 128 of file IfxDts.h.

Referenced by IfxDts_Dts_isBusy(), and IfxDts_Dts_startSensor().


iLLD_TC26B: How to use the DTS Interface driver?

How to use the DTS Interface driver?
iLLD » DTS
Collaboration diagram for How to use the DTS Interface driver?:

DTS gives the die-temperature result which will decoded to standard temperature value. Minimum first two temperature results are to be ignored to get reliable temperature.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Dts/Dts/IfxDts_Dts.h>

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_DTS 1

Add the interrupt service routine to your C code which should do the error flag handling:

IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
{
// DTS finished temperature measurement
uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
// here we could do something with the value...
// and the DTS can be restarted
IfxDts_Dts_startSensor();
}

Finally install the interrupt handler in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&dtsISR, IFX_INTPRIO_DTS);
IfxCpu_enableInterrupts();

DTS Module Initialisation

The module initialisation can be done in the same function:

// Get the default configuration
IfxDts_Dts_Config dtsConfig;
IfxDts_Dts_initModuleConfig(&dtsConfig);
// Adapt the default configuration if required
dtsConfig.isrPriority = IFX_INTPRIO_DTS;
dtsConfig.isrTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
dtsConfig.lowerTemperatureLimit = -35; // SMU alarm if temperature value is below this Celsius value
dtsConfig.upperTemperatureLimit = 150; // SMU alarm if temperature value is above this Celsius value
// Module initialisation
IfxDts_Dts_initModule(&dtsConfig);

Now, DTS is initialised for starting temperature measurements:

IfxDts_Dts_startSensor();

IRQ based measurements

Whenever the interrupt handler is called, a new measurment result is available and could be processed further (e.g. for statistical analysis).

IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
{
// DTS finished temperature measurement
uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
// here we could do something with the value...
// and the DTS can be restarted
IfxDts_Dts_startSensor();
}

Measurements without IRQs

If no interrupt routine should be used, a new measurement result can be requested the following way:

// start Sensor
IfxDts_Dts_startSensor();
// wait until a new result is available
while( IfxDts_Dts_isBusy() );
uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();

Alternatively (and this is the normal usage), the DTS could be periodically started from a timer routine, e.g. each mS. The conversion itself takes 100 uS maximum.

Temperature conversion

Following function returns the actual temperature in Celsius:

float32 temperature = IfxDts_Dts_getTemperatureCelsius();


iLLD_TC26B: DTS

Modules
DTS
iLLD » DTS
Collaboration diagram for DTS:

Modules

Data Structures
Module Initialisation functions
Sensor Functions
Conversion Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » DTS » DTS
Collaboration diagram for Data Structures:

Data Structures

struct IfxDts_Dts_Config
DTS module configuration structure. More...

Detailed Description

Data Structure Documentation

◆ IfxDts_Dts_Config

struct IfxDts_Dts_Config

DTS module configuration structure.

Definition at line 164 of file IfxDts_Dts.h.

Data Fields
boolean | enableSecureLock | MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limitation register.
uint16 | isrPriority | interrupt priority
IfxSrc_Tos | isrTypeOfService | type of interrupt service
float32 | lowerTemperatureLimit | Specifies the lower temperature limit compared against die temperature in Celsius. A SMU will be triggered if the measurement result is below this limit
boolean | sensorControlDisabled | MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
float32 | upperTemperatureLimit | Specifies the upper temperature limit compared against die temperature in Celsius. A SMU will be triggered if the measurement result is above this limit


iLLD_TC26B: Module Initialisation functions

Functions
Module Initialisation functions
iLLD » DTS » DTS
Collaboration diagram for Module Initialisation functions:

Functions

IFX_EXTERN void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
IFX_EXTERN void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_initModule()

IFX_EXTERN void IfxDts_Dts_initModule ( const IfxDts_Dts_Config * config )

Initialise the DTS with supplied configuration.

Parameters
config pointer to module configuration structure
Returns
None

Usage Example : How to use the DTS Interface driver?

Definition at line 58 of file IfxDts_Dts.c.

◆ IfxDts_Dts_initModuleConfig()

IFX_EXTERN void IfxDts_Dts_initModuleConfig ( IfxDts_Dts_Config * config )

Intialises the module configuration buffer with default configuration.

Parameters
config pointer to module configuration structure
Returns
None

Usage Example : How to use the DTS Interface driver?

Definition at line 108 of file IfxDts_Dts.c.


iLLD_TC26B: Sensor Functions

Functions
Sensor Functions
iLLD » DTS » DTS
Collaboration diagram for Sensor Functions:

Functions

IFX_INLINE float32 | IfxDts_Dts_getTemperatureCelsius (void)
Returns the converted temperature in Celsius. More...
IFX_INLINE uint16 | IfxDts_Dts_getTemperatureValue (void)
Returns the unconverted temperature measurement result. More...
IFX_INLINE boolean | IfxDts_Dts_isBusy (void)
Returns the current BUSY status of the Sensor. More...
IFX_INLINE void | IfxDts_Dts_startSensor (void)
Starts the next temperature measurement. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_getTemperatureCelsius()

IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius ( void )

Returns the converted temperature in Celsius.

Returns
The temperature based on the DTS temperature value

Usage Example : How to use the DTS Interface driver?

Definition at line 273 of file IfxDts_Dts.h.

◆ IfxDts_Dts_getTemperatureValue()

IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue ( void )

Returns the unconverted temperature measurement result.

Returns
current sensor measured result.

Usage Example : How to use the DTS Interface driver?

Definition at line 279 of file IfxDts_Dts.h.

◆ IfxDts_Dts_isBusy()

IFX_INLINE boolean IfxDts_Dts_isBusy ( void )

Returns the current BUSY status of the Sensor.

Returns
TRUE if Sensor is busy in measuring temperature otherwise FALSE

Usage Example : How to use the DTS Interface driver?

Definition at line 285 of file IfxDts_Dts.h.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_Dts_startSensor()

IFX_INLINE void IfxDts_Dts_startSensor ( void )

Starts the next temperature measurement.

Returns
None

Usage Example : How to use the DTS Interface driver?

Definition at line 291 of file IfxDts_Dts.h.

Referenced by IfxDts_Dts_initModule().


iLLD_TC26B: Conversion Functions

Functions
Conversion Functions
iLLD » DTS » DTS
Collaboration diagram for Conversion Functions:

Functions

IFX_EXTERN uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
IFX_EXTERN float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...

Detailed Description

Function Documentation

◆ IfxDts_Dts_convertFromCelsius()

IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius ( float32 temperatureValue )

Converts a temperature value in Celsius to DTS value.

Parameters
temperatureValue the temperature in Celsius
Returns
the appr. DTS value

Definition at line 35 of file IfxDts_Dts.c.

Referenced by IfxDts_Dts_initModule().

◆ IfxDts_Dts_convertToCelsius()

IFX_EXTERN float32 IfxDts_Dts_convertToCelsius ( uint16 dtsValue )

Converts the measurement value returned from DTS to Celsius.

Parameters
dtsValue measurement value returned from DTS
Returns
temperature in Celsius

Definition at line 52 of file IfxDts_Dts.c.

Referenced by IfxDts_Dts_getTemperatureCelsius().


iLLD_TC26B: IfxDts_cfg.h File Reference

  • _Impl
Macros
IfxDts_cfg.h File Reference
iLLD » DTS

DTS on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXDTS_NUM_MODULES (1)

Detailed Description

DTS on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDts_cfg.h.

Macro Definition Documentation

◆ IFXDTS_NUM_MODULES

#define IFXDTS_NUM_MODULES (1)

Definition at line 43 of file IfxDts_cfg.h.


iLLD_TC26B: IfxDts_Dts.h File Reference

  • Dts
  • Dts
Data Structures | Functions
IfxDts_Dts.h File Reference
iLLD » DTS

DTS DTS details. More...

#include "Dts/Std/IfxDts.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxDts_Dts.h:

Go to the source code of this file.

Data Structures

struct IfxDts_Dts_Config
DTS module configuration structure. More...

Functions

IFX_EXTERN void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
IFX_EXTERN void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...
IFX_INLINE float32 | IfxDts_Dts_getTemperatureCelsius (void)
Returns the converted temperature in Celsius. More...
IFX_INLINE uint16 | IfxDts_Dts_getTemperatureValue (void)
Returns the unconverted temperature measurement result. More...
IFX_INLINE boolean | IfxDts_Dts_isBusy (void)
Returns the current BUSY status of the Sensor. More...
IFX_INLINE void | IfxDts_Dts_startSensor (void)
Starts the next temperature measurement. More...
IFX_EXTERN uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
IFX_EXTERN float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...

Detailed Description

DTS DTS details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDts_Dts.h.


iLLD_TC26B: IfxDts.h File Reference

  • Dts
  • Std
Functions
IfxDts.h File Reference
iLLD » DTS

DTS basic functionality. More...

#include "_Impl/IfxDts_cfg.h"
#include "IfxScu_reg.h"
#include "IfxScu_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxDts.h:

Go to the source code of this file.

Functions

IFX_INLINE void | IfxDts_disableSensorControl (void)
Disable the writing of register bits except START bit. More...
IFX_INLINE void | IfxDts_enableSensor (void)
Enables the DTS sensor. More...
IFX_INLINE void | IfxDts_startSensor (void)
Starts the next temperature measurement. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxDts_getSrcPointer (void)
Gets the Interrupt request source. More...
IFX_INLINE uint16 | IfxDts_getTemperatureValue (void)
Read the temperature measurement result. More...
IFX_INLINE boolean | IfxDts_isBusy (void)
Returns the current BUSY status of the Sensor. More...
IFX_EXTERN boolean | IfxDts_isReady (void)
Returns the current READY status of the Sensor. More...

Detailed Description

DTS basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDts.h.

Function Documentation

◆ IfxDts_isReady()

IFX_EXTERN boolean IfxDts_isReady ( void )

Returns the current READY status of the Sensor.

Returns
TRUE if Sensor is ready for measuring temperature otherwise FALSE

Definition at line 35 of file IfxDts.c.

Referenced by IfxDts_Dts_initModule().


iLLD_TC26B: EMEM

Modules | Files
EMEM
iLLD
Collaboration diagram for EMEM:

Modules

Implementation
Standard Driver

Files

file | IfxEmem_cfg.h
EMEM on-chip implementation data.
file | IfxEmem.h
EMEM basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » EMEM
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » EMEM
Collaboration diagram for Standard Driver:

Modules

Enumerations
Module Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » EMEM » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEmem_LockedState {
IfxEmem_LockedState_locked = 0,
IfxEmem_LockedState_unlocked = 1
}
EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK. More...
enum IfxEmem_State {
IfxEmem_State_disabled = 0,
IfxEmem_State_enabled = 1
}
EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR. More...
enum IfxEmem_TileConfigMode { IfxEmem_TileConfigMode_calibMode = 0 }
EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..). More...
enum IfxEmem_TileNumber {
IfxEmem_TileNumber_0 = 0,
IfxEmem_TileNumber_1,
IfxEmem_TileNumber_2,
IfxEmem_TileNumber_3,
IfxEmem_TileNumber_4,
IfxEmem_TileNumber_5,
IfxEmem_TileNumber_6,
IfxEmem_TileNumber_7,
IfxEmem_TileNumber_8,
IfxEmem_TileNumber_9,
IfxEmem_TileNumber_10,
IfxEmem_TileNumber_11,
IfxEmem_TileNumber_12,
IfxEmem_TileNumber_13,
IfxEmem_TileNumber_14,
IfxEmem_TileNumber_15
}
Tile Number. More...

Detailed Description

Enumeration Type Documentation

◆ IfxEmem_LockedState

enum IfxEmem_LockedState

EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.

Enumerator
IfxEmem_LockedState_locked | EMEM locked state.
IfxEmem_LockedState_unlocked | EMEM unlocked state.

Definition at line 48 of file IfxEmem.h.

◆ IfxEmem_State

enum IfxEmem_State

EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.

Enumerator
IfxEmem_State_disabled | EMEM module clock disabled state.
IfxEmem_State_enabled | EMEM module clock enabled state.

Definition at line 56 of file IfxEmem.h.

◆ IfxEmem_TileConfigMode

enum IfxEmem_TileConfigMode

EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..).

Enumerator
IfxEmem_TileConfigMode_calibMode

EMEM tile mode to calibration memory.

Definition at line 64 of file IfxEmem.h.

◆ IfxEmem_TileNumber

enum IfxEmem_TileNumber

Tile Number.

Enumerator
IfxEmem_TileNumber_0 | Tile Number0.
IfxEmem_TileNumber_1 | Tile Number1.
IfxEmem_TileNumber_2 | Tile Number2.
IfxEmem_TileNumber_3 | Tile Number3.
IfxEmem_TileNumber_4 | Tile Number4.
IfxEmem_TileNumber_5 | Tile Number5.
IfxEmem_TileNumber_6 | Tile Number6.
IfxEmem_TileNumber_7 | Tile Number7.
IfxEmem_TileNumber_8 | Tile Number8.
IfxEmem_TileNumber_9 | Tile Number9.
IfxEmem_TileNumber_10 | Tile Number10.
IfxEmem_TileNumber_11 | Tile Number11.
IfxEmem_TileNumber_12 | Tile Number12.
IfxEmem_TileNumber_13 | Tile Number13.
IfxEmem_TileNumber_14 | Tile Number14.
IfxEmem_TileNumber_15 | Tile Number15.

Definition at line 71 of file IfxEmem.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » EMEM » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE boolean | IfxEmem_isModuleEnabled (void)
Returns the status of module enabled or disabled. More...
IFX_INLINE void | IfxEmem_setTileConfigMode (const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
Sets all EMEM tiles to calibration memory mode. More...
IFX_INLINE void | IfxEmem_setUnlockStandbyLockFlag (const uint8 flag)
Sets Unlock standby lock flag. More...
IFX_EXTERN IfxEmem_LockedState | IfxEmem_getLockedState (void)
Gets the EMEM stand RAM lock state. More...
IFX_EXTERN void | IfxEmem_setClockEnableState (const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application. for complete enable and disable of EMEM with endint protection handling, please use the following APIs /ref IfxEmem_enableModule /ref IfxEmem_disableModule. More...

Detailed Description

Function Documentation

◆ IfxEmem_getLockedState()

IFX_EXTERN IfxEmem_LockedState IfxEmem_getLockedState ( void )

Gets the EMEM stand RAM lock state.

Returns
EMEM stand RAM lock state.

Definition at line 36 of file IfxEmem.c.

Referenced by IfxCif_Cam_initEmem().

◆ IfxEmem_isModuleEnabled()

IFX_INLINE boolean IfxEmem_isModuleEnabled ( void )

Returns the status of module enabled or disabled.

Returns
Status (TRUE / FALSE)

Definition at line 143 of file IfxEmem.h.

◆ IfxEmem_setClockEnableState()

IFX_EXTERN void IfxEmem_setClockEnableState ( const IfxEmem_State state )

Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application. for complete enable and disable of EMEM with endint protection handling, please use the following APIs /ref IfxEmem_enableModule /ref IfxEmem_disableModule.

Parameters
state EMEM module clock enabled or disabled state.
Returns
None

Definition at line 42 of file IfxEmem.c.

Referenced by IfxCif_Cam_initEmem().

◆ IfxEmem_setTileConfigMode()

IFX_INLINE void IfxEmem_setTileConfigMode | ( | const IfxEmem_TileConfigMode | mode,
 |  | IfxEmem_TileNumber | tile
 | ) |  |

Sets all EMEM tiles to calibration memory mode.

Parameters
mode | EMEM tile configuration mode.
tile | tile number
Returns
None

Definition at line 149 of file IfxEmem.h.

Referenced by IfxCif_Cam_initEmem().

◆ IfxEmem_setUnlockStandbyLockFlag()

IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag ( const uint8 flag )

Sets Unlock standby lock flag.

Parameters
flag Unlock standby lock flag value.
Returns
None

Definition at line 158 of file IfxEmem.h.

Referenced by IfxCif_Cam_initEmem().


iLLD_TC26B: IfxEmem_cfg.h File Reference

  • _Impl
Macros
IfxEmem_cfg.h File Reference
iLLD » EMEM

EMEM on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxEmem_reg.h"
Include dependency graph for IfxEmem_cfg.h:

Go to the source code of this file.

Macros

#define | IFXEMEM_START_ADDR_CPU_CACHED 0x9F000000UL
#define | IFXEMEM_START_ADDR_CPU 0xBF000000UL
#define | IFXEMEM_START_ADDR_BBB (0xAF000000UL)
#define | IFXEMEM_SIZE (0x50000UL)
#define | IFXEMEM_NUM_MODULES (1)

Detailed Description

EMEM on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEmem_cfg.h.

Macro Definition Documentation

◆ IFXEMEM_NUM_MODULES

#define IFXEMEM_NUM_MODULES (1)

Definition at line 54 of file IfxEmem_cfg.h.

◆ IFXEMEM_SIZE

#define IFXEMEM_SIZE (0x50000UL)

Definition at line 52 of file IfxEmem_cfg.h.

Referenced by IfxCif_Cam_initEmem().

◆ IFXEMEM_START_ADDR_BBB

#define IFXEMEM_START_ADDR_BBB (0xAF000000UL)

Definition at line 50 of file IfxEmem_cfg.h.

Referenced by IfxCif_Cam_getBbbAddress().

◆ IFXEMEM_START_ADDR_CPU

#define IFXEMEM_START_ADDR_CPU 0xBF000000UL

Definition at line 48 of file IfxEmem_cfg.h.

Referenced by IfxCif_Cam_initEmem().

◆ IFXEMEM_START_ADDR_CPU_CACHED

#define IFXEMEM_START_ADDR_CPU_CACHED 0x9F000000UL

Definition at line 46 of file IfxEmem_cfg.h.

Referenced by IfxCif_Cam_getLastFrameAddress(), IfxCif_Cam_getNextFrameAddress(), IfxCif_Cam_incrementAddress(), and IfxCif_Cam_initMemSize().


iLLD_TC26B: IfxEmem.h File Reference

  • Emem
  • Std
Enumerations | Functions
IfxEmem.h File Reference
iLLD » EMEM

EMEM basic functionality. More...

#include "_Impl/IfxEmem_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxEmem.h:

Go to the source code of this file.

Enumerations

enum IfxEmem_LockedState {
IfxEmem_LockedState_locked = 0,
IfxEmem_LockedState_unlocked = 1
}
EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK. More...
enum IfxEmem_State {
IfxEmem_State_disabled = 0,
IfxEmem_State_enabled = 1
}
EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR. More...
enum IfxEmem_TileConfigMode { IfxEmem_TileConfigMode_calibMode = 0 }
EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..). More...
enum IfxEmem_TileNumber {
IfxEmem_TileNumber_0 = 0,
IfxEmem_TileNumber_1,
IfxEmem_TileNumber_2,
IfxEmem_TileNumber_3,
IfxEmem_TileNumber_4,
IfxEmem_TileNumber_5,
IfxEmem_TileNumber_6,
IfxEmem_TileNumber_7,
IfxEmem_TileNumber_8,
IfxEmem_TileNumber_9,
IfxEmem_TileNumber_10,
IfxEmem_TileNumber_11,
IfxEmem_TileNumber_12,
IfxEmem_TileNumber_13,
IfxEmem_TileNumber_14,
IfxEmem_TileNumber_15
}
Tile Number. More...

Functions

IFX_INLINE boolean | IfxEmem_isModuleEnabled (void)
Returns the status of module enabled or disabled. More...
IFX_INLINE void | IfxEmem_setTileConfigMode (const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
Sets all EMEM tiles to calibration memory mode. More...
IFX_INLINE void | IfxEmem_setUnlockStandbyLockFlag (const uint8 flag)
Sets Unlock standby lock flag. More...
IFX_EXTERN IfxEmem_LockedState | IfxEmem_getLockedState (void)
Gets the EMEM stand RAM lock state. More...
IFX_EXTERN void | IfxEmem_setClockEnableState (const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application. for complete enable and disable of EMEM with endint protection handling, please use the following APIs /ref IfxEmem_enableModule /ref IfxEmem_disableModule. More...

Detailed Description

EMEM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEmem.h.


iLLD_TC26B: ERAY

Modules | Files
ERAY
iLLD
Collaboration diagram for ERAY:

Modules

Implementation
Standard Driver
ERAY Pin Mapping
How to use the ERAY Interface driver?
ERAY

Files

file | IfxEray_cfg.h
ERAY on-chip implementation data.
file | IfxEray_PinMap.c
ERAY I/O map.
file | IfxEray_PinMap.h
ERAY I/O map.
file | IfxEray_Eray.h
ERAY ERAY details.
file | IfxEray.h
ERAY basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » ERAY
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations | Variables
Enumerations
iLLD » ERAY » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxEray_Index {
IfxEray_Index_none = -1,
IfxEray_Index_0 = 0
}
List of the available Eray resources. More...
enum IfxEray_NodeId {
IfxEray_NodeId_a = 0,
IfxEray_NodeId_b = 1,
IfxEray_NodeId_none = -1
}
Node Id in communication cycle. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxEray_Index

enum IfxEray_Index

List of the available Eray resources.

Enumerator
IfxEray_Index_none | Not Selected.
IfxEray_Index_0 | ERAY index 0.

Definition at line 62 of file IfxEray_cfg.h.

◆ IfxEray_NodeId

enum IfxEray_NodeId

Node Id in communication cycle.

Enumerator
IfxEray_NodeId_a | Ifx_ERAY Node A.
IfxEray_NodeId_b | Ifx_ERAY Node B.
IfxEray_NodeId_none | None of the Ifx_ERAY Nodes.

Definition at line 70 of file IfxEray_cfg.h.

Variable Documentation

◆ IfxEray_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]

Definition at line 86 of file IfxEray_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » ERAY
Collaboration diagram for Standard Driver:

Modules

Enumerations
Interrupt Functions
IO Pin Configuration Functions
Module Functions
Status Functions
Configuration Functions
Data Structures
Operative Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ERAY » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEray_Baudrate {
IfxEray_Baudrate_10 = 0,
IfxEray_Baudrate_5 = 1,
IfxEray_Baudrate_2_5 = 2
}
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP. More...
enum IfxEray_BufferDirection {
IfxEray_BufferDirection_receive = 0,
IfxEray_BufferDirection_transmit = 1
}
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG. More...
enum IfxEray_Channel {
IfxEray_Channel_a = 0,
IfxEray_Channel_b = 1
}
Channel Id. More...
enum IfxEray_ClearErrorFlag {
IfxEray_ClearErrorFlag_pemc = 1,
IfxEray_ClearErrorFlag_cna = 2,
IfxEray_ClearErrorFlag_sfbm = 4,
IfxEray_ClearErrorFlag_sfo = 8,
IfxEray_ClearErrorFlag_ccf = 16,
IfxEray_ClearErrorFlag_ccl = 32,
IfxEray_ClearErrorFlag_eerr = 64,
IfxEray_ClearErrorFlag_rfo = 128,
IfxEray_ClearErrorFlag_efa = 256,
IfxEray_ClearErrorFlag_iiba = 512,
IfxEray_ClearErrorFlag_ioba = 1024,
IfxEray_ClearErrorFlag_mhf = 2048,
IfxEray_ClearErrorFlag_eda = 65536,
IfxEray_ClearErrorFlag_ltva = 131072,
IfxEray_ClearErrorFlag_taba = 262144,
IfxEray_ClearErrorFlag_edb = 16777216,
IfxEray_ClearErrorFlag_ltvb = 33554432,
IfxEray_ClearErrorFlag_tabb = 67108864
}
Selection of error flag to clear defined in MODULE_ERAY.EIR.U. More...
enum IfxEray_ClearStatusFlag {
IfxEray_ClearStatusFlag_wst = 1,
IfxEray_ClearStatusFlag_cas = 2,
IfxEray_ClearStatusFlag_cycs = 4,
IfxEray_ClearStatusFlag_txi = 8,
IfxEray_ClearStatusFlag_rxi = 16,
IfxEray_ClearStatusFlag_rfne = 32,
IfxEray_ClearStatusFlag_rfcl = 64,
IfxEray_ClearStatusFlag_nmvc = 128,
IfxEray_ClearStatusFlag_ti0 = 256,
IfxEray_ClearStatusFlag_ti1 = 512,
IfxEray_ClearStatusFlag_tibc = 1024,
IfxEray_ClearStatusFlag_tobc = 2048,
IfxEray_ClearStatusFlag_swe = 4096,
IfxEray_ClearStatusFlag_sucs = 8192,
IfxEray_ClearStatusFlag_mbsi = 16384,
IfxEray_ClearStatusFlag_sds = 32768,
IfxEray_ClearStatusFlag_wupa = 65536,
IfxEray_ClearStatusFlag_mtsa = 131072,
IfxEray_ClearStatusFlag_wupb = 16777216,
IfxEray_ClearStatusFlag_mtsb = 33554432
}
Selection of status flag to clear defined in MODULE_ERAY.SIR.U. More...
enum IfxEray_ClockDivider {
IfxEray_ClockDivider_none = 0,
IfxEray_ClockDivider_1 = 1,
IfxEray_ClockDivider_2,
IfxEray_ClockDivider_3,
IfxEray_ClockDivider_4,
IfxEray_ClockDivider_5,
IfxEray_ClockDivider_6,
IfxEray_ClockDivider_7
}
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC. More...
enum IfxEray_ExternalOffset {
IfxEray_ExternalOffset_noCorrection = 1,
IfxEray_ExternalOffset_correctionSubtracted = 2,
IfxEray_ExternalOffset_correctionAdded = 3
}
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC. More...
enum IfxEray_ExternalOffsetCorrection {
IfxEray_ExternalOffsetCorrection_0 = 0,
IfxEray_ExternalOffsetCorrection_1,
IfxEray_ExternalOffsetCorrection_2,
IfxEray_ExternalOffsetCorrection_3,
IfxEray_ExternalOffsetCorrection_4,
IfxEray_ExternalOffsetCorrection_5,
IfxEray_ExternalOffsetCorrection_6,
IfxEray_ExternalOffsetCorrection_7
}
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC. More...
enum IfxEray_ExternalRate {
IfxEray_ExternalRate_noCorrection = 1,
IfxEray_ExternalRate_correctionSubtracted = 2,
IfxEray_ExternalRate_correctionAdded = 3
}
External rate correction control MODULE_ERAY0.GTU11.B.ERCC. More...
enum IfxEray_ExternalRateCorrection {
IfxEray_ExternalRateCorrection_0 = 0,
IfxEray_ExternalRateCorrection_1,
IfxEray_ExternalRateCorrection_2,
IfxEray_ExternalRateCorrection_3,
IfxEray_ExternalRateCorrection_4,
IfxEray_ExternalRateCorrection_5,
IfxEray_ExternalRateCorrection_6,
IfxEray_ExternalRateCorrection_7
}
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC. More...
enum IfxEray_IdleDynamicSlots {
IfxEray_IdleDynamicSlots_0 = 0,
IfxEray_IdleDynamicSlots_1,
IfxEray_IdleDynamicSlots_2
}
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI. More...
enum IfxEray_ListenTimeOutNoise {
IfxEray_ListenTimeOutNoise_2 = 1,
IfxEray_ListenTimeOutNoise_3,
IfxEray_ListenTimeOutNoise_4,
IfxEray_ListenTimeOutNoise_5,
IfxEray_ListenTimeOutNoise_6,
IfxEray_ListenTimeOutNoise_7,
IfxEray_ListenTimeOutNoise_8,
IfxEray_ListenTimeOutNoise_9,
IfxEray_ListenTimeOutNoise_10,
IfxEray_ListenTimeOutNoise_11,
IfxEray_ListenTimeOutNoise_12,
IfxEray_ListenTimeOutNoise_13,
IfxEray_ListenTimeOutNoise_14,
IfxEray_ListenTimeOutNoise_15,
IfxEray_ListenTimeOutNoise_16
}
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN. More...
enum IfxEray_MaxSynchFrames {
IfxEray_MaxSynchFrames_2 = 2,
IfxEray_MaxSynchFrames_3,
IfxEray_MaxSynchFrames_4,
IfxEray_MaxSynchFrames_5,
IfxEray_MaxSynchFrames_6,
IfxEray_MaxSynchFrames_7,
IfxEray_MaxSynchFrames_8,
IfxEray_MaxSynchFrames_9,
IfxEray_MaxSynchFrames_10,
IfxEray_MaxSynchFrames_11,
IfxEray_MaxSynchFrames_12,
IfxEray_MaxSynchFrames_13,
IfxEray_MaxSynchFrames_14,
IfxEray_MaxSynchFrames_15
}
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM. More...
enum IfxEray_PocCommand {
IfxEray_PocCommand_notAccepted = 0,
IfxEray_PocCommand_config = 1,
IfxEray_PocCommand_ready = 2,
IfxEray_PocCommand_wakeup = 3,
IfxEray_PocCommand_run = 4,
IfxEray_PocCommand_allSlots = 5,
IfxEray_PocCommand_halt = 6,
IfxEray_PocCommand_freeze = 7,
IfxEray_PocCommand_sendMts = 8,
IfxEray_PocCommand_coldStart = 9,
IfxEray_PocCommand_reset = 10,
IfxEray_PocCommand_monitor = 11,
IfxEray_PocCommand_clearRam = 12
}
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD. More...
enum IfxEray_PocState {
IfxEray_PocState_defaultConfig = 0,
IfxEray_PocState_ready = 1,
IfxEray_PocState_normalActive = 2,
IfxEray_PocState_normalPassive = 3,
IfxEray_PocState_halt = 4,
IfxEray_PocState_monitor = 5,
IfxEray_PocState_config = 15,
IfxEray_PocState_wakeupStandby = 16,
IfxEray_PocState_wakeupListen = 17,
IfxEray_PocState_wakeupSend = 18,
IfxEray_PocState_wakeupDetect = 19,
IfxEray_PocState_startup = 32,
IfxEray_PocState_coldStartListen = 33,
IfxEray_PocState_collisionResolution = 34,
IfxEray_PocState_consistencyCheck = 35,
IfxEray_PocState_gap = 36,
IfxEray_PocState_join = 37,
IfxEray_PocState_integrationCheck = 38,
IfxEray_PocState_integrationListen = 39,
IfxEray_PocState_integrationConsistencyCheck = 40,
IfxEray_PocState_initializeSchedule = 41,
IfxEray_PocState_staruAborted = 42,
IfxEray_PocState_startupSucced = 43
}
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS. More...
enum IfxEray_ReceiveChannel {
IfxEray_ReceiveChannel_both = 0,
IfxEray_ReceiveChannel_b = 1,
IfxEray_ReceiveChannel_a = 2,
IfxEray_ReceiveChannel_none = 3
}
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH. More...
enum IfxEray_SleepMode {
IfxEray_SleepMode_enable = 0,
IfxEray_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS. More...
enum IfxEray_StrobePosition {
IfxEray_StrobePosition_5 = 0,
IfxEray_StrobePosition_4 = 1,
IfxEray_StrobePosition_6 = 2
}
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP. More...
enum IfxEray_SuspendMode {
IfxEray_SuspendMode_none = 0,
IfxEray_SuspendMode_hard = 1,
IfxEray_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEray_TransmissionMode {
IfxEray_TransmissionMode_continuous = 0,
IfxEray_TransmissionMode_singleShot = 1
}
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM. More...
enum IfxEray_TransmissionSlotMode {
IfxEray_TransmissionSlotMode_all = 0,
IfxEray_TransmissionSlotMode_single = 1
}
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM. More...
enum IfxEray_WakeupChannel {
IfxEray_WakeupChannel_a = 0,
IfxEray_WakeupChannel_b = 1
}
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxEray_Baudrate

enum IfxEray_Baudrate

Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.

Enumerator
IfxEray_Baudrate_10 | baudrate is 10MBits/Sec
IfxEray_Baudrate_5 | baudrate is 5MBits/Sec
IfxEray_Baudrate_2_5 | baudrate is 2.5MBits/Sec

Definition at line 62 of file IfxEray.h.

◆ IfxEray_BufferDirection

enum IfxEray_BufferDirection

wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.

Enumerator
IfxEray_BufferDirection_receive | buffer is configured as receive buffer
IfxEray_BufferDirection_transmit | buffer is configured as transmit buffer

Definition at line 71 of file IfxEray.h.

◆ IfxEray_Channel

enum IfxEray_Channel

Channel Id.

Enumerator
IfxEray_Channel_a | channel A
IfxEray_Channel_b | channel B

Definition at line 79 of file IfxEray.h.

◆ IfxEray_ClearErrorFlag

enum IfxEray_ClearErrorFlag

Selection of error flag to clear defined in MODULE_ERAY.EIR.U.

Enumerator
IfxEray_ClearErrorFlag_pemc | POC error mode change bit.
IfxEray_ClearErrorFlag_cna | command not accepted event bit.
IfxEray_ClearErrorFlag_sfbm | sync frame below minimum bit.
IfxEray_ClearErrorFlag_sfo | sync frame overflow event bit
IfxEray_ClearErrorFlag_ccf | clock correction failure event.
IfxEray_ClearErrorFlag_ccl | CHI command locked event.
IfxEray_ClearErrorFlag_eerr | ECC error event bit.
IfxEray_ClearErrorFlag_rfo | RxFIFO overrun event bit.
IfxEray_ClearErrorFlag_efa | empty FIFO access event bit.
IfxEray_ClearErrorFlag_iiba | illegal input buffer access event.
IfxEray_ClearErrorFlag_ioba | illegal output buffer access event.
IfxEray_ClearErrorFlag_mhf | message handler constraint flag.
IfxEray_ClearErrorFlag_eda | error event on channel A.
IfxEray_ClearErrorFlag_ltva | latest transmit violation flag on channel A .
IfxEray_ClearErrorFlag_taba | transmission across channel A boundary flag.
IfxEray_ClearErrorFlag_edb | error event on channel B.
IfxEray_ClearErrorFlag_ltvb | latest transmit violation flag on channel B .
IfxEray_ClearErrorFlag_tabb | transmission across channel B boundary flag.

Definition at line 87 of file IfxEray.h.

◆ IfxEray_ClearStatusFlag

enum IfxEray_ClearStatusFlag

Selection of status flag to clear defined in MODULE_ERAY.SIR.U.

Enumerator
IfxEray_ClearStatusFlag_wst | wakeup status bit.
IfxEray_ClearStatusFlag_cas | collision avoidance bit.
IfxEray_ClearStatusFlag_cycs | cycle start service bit.
IfxEray_ClearStatusFlag_txi | transmit service request bit.
IfxEray_ClearStatusFlag_rxi | receive service request bit.
IfxEray_ClearStatusFlag_rfne | receive fifo not empty bit.
IfxEray_ClearStatusFlag_rfcl | RxFIFO critical level reached bit.
IfxEray_ClearStatusFlag_nmvc | network management vector bit.
IfxEray_ClearStatusFlag_ti0 | timer0 service request bit.
IfxEray_ClearStatusFlag_ti1 | timer1 service request bit.
IfxEray_ClearStatusFlag_tibc | transfer input buffer completion request bit.
IfxEray_ClearStatusFlag_tobc | transfer output buffer completion request bit.
IfxEray_ClearStatusFlag_swe | stop watch event bit.
IfxEray_ClearStatusFlag_sucs | startup success event bit.
IfxEray_ClearStatusFlag_mbsi | message buffer service status bit.
IfxEray_ClearStatusFlag_sds | dynamic segment start bit.
IfxEray_ClearStatusFlag_wupa | wakeup pattern channel A bit.
IfxEray_ClearStatusFlag_mtsa | MTS receive channel A bit.
IfxEray_ClearStatusFlag_wupb | wakeup pattern channel B bit.
IfxEray_ClearStatusFlag_mtsb | MTS receive channel B bit.

Definition at line 111 of file IfxEray.h.

◆ IfxEray_ClockDivider

enum IfxEray_ClockDivider

Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.

Enumerator
IfxEray_ClockDivider_none | no clock signal
IfxEray_ClockDivider_1 | run mode clock divider 1
IfxEray_ClockDivider_2 | run mode clock divider 2
IfxEray_ClockDivider_3 | run mode clock divider 3
IfxEray_ClockDivider_4 | run mode clock divider 4
IfxEray_ClockDivider_5 | run mode clock divider 5
IfxEray_ClockDivider_6 | run mode clock divider 6
IfxEray_ClockDivider_7 | run mode clock divider 7

Definition at line 137 of file IfxEray.h.

◆ IfxEray_ExternalOffset

enum IfxEray_ExternalOffset

External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.

Enumerator
IfxEray_ExternalOffset_noCorrection | No external correction control.
IfxEray_ExternalOffset_correctionSubtracted | External offset correction subtracted from calculated correction.
IfxEray_ExternalOffset_correctionAdded | External offset correction added to calculated correction.

Definition at line 151 of file IfxEray.h.

◆ IfxEray_ExternalOffsetCorrection

enum IfxEray_ExternalOffsetCorrection

External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.

Enumerator
IfxEray_ExternalOffsetCorrection_0 | external clock offset correction value 0
IfxEray_ExternalOffsetCorrection_1 | external clock offset correction value 1
IfxEray_ExternalOffsetCorrection_2 | external clock offset correction value 2
IfxEray_ExternalOffsetCorrection_3 | external clock offset correction value 3
IfxEray_ExternalOffsetCorrection_4 | external clock offset correction value 4
IfxEray_ExternalOffsetCorrection_5 | external clock offset correction value 5
IfxEray_ExternalOffsetCorrection_6 | external clock offset correction value 6
IfxEray_ExternalOffsetCorrection_7 | external clock offset correction value 7

Definition at line 160 of file IfxEray.h.

◆ IfxEray_ExternalRate

enum IfxEray_ExternalRate

External rate correction control MODULE_ERAY0.GTU11.B.ERCC.

Enumerator
IfxEray_ExternalRate_noCorrection | No external correction control.
IfxEray_ExternalRate_correctionSubtracted | External rate correction subtracted from calculated correction.
IfxEray_ExternalRate_correctionAdded | External rate correction added to calculated correction.

Definition at line 174 of file IfxEray.h.

◆ IfxEray_ExternalRateCorrection

enum IfxEray_ExternalRateCorrection

External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.

Enumerator
IfxEray_ExternalRateCorrection_0 | external clock rate correction value 0
IfxEray_ExternalRateCorrection_1 | external clock rate correction value 1
IfxEray_ExternalRateCorrection_2 | external clock rate correction value 2
IfxEray_ExternalRateCorrection_3 | external clock rate correction value 3
IfxEray_ExternalRateCorrection_4 | external clock rate correction value 4
IfxEray_ExternalRateCorrection_5 | external clock rate correction value 5
IfxEray_ExternalRateCorrection_6 | external clock rate correction value 6
IfxEray_ExternalRateCorrection_7 | external clock rate correction value 7

Definition at line 183 of file IfxEray.h.

◆ IfxEray_IdleDynamicSlots

enum IfxEray_IdleDynamicSlots

Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.

Enumerator
IfxEray_IdleDynamicSlots_0 | duration of dynamic slot idle phase is 0
IfxEray_IdleDynamicSlots_1 | duration of dynamic slot idle phase is 1
IfxEray_IdleDynamicSlots_2 | duration of dynamic slot idle phase is 2

Definition at line 197 of file IfxEray.h.

◆ IfxEray_ListenTimeOutNoise

enum IfxEray_ListenTimeOutNoise

Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.

Enumerator
IfxEray_ListenTimeOutNoise_2 | listen Time-out noise 2
IfxEray_ListenTimeOutNoise_3 | listen Time-out noise 3
IfxEray_ListenTimeOutNoise_4 | listen Time-out noise 4
IfxEray_ListenTimeOutNoise_5 | listen Time-out noise 5
IfxEray_ListenTimeOutNoise_6 | listen Time-out noise 6
IfxEray_ListenTimeOutNoise_7 | listen Time-out noise 7
IfxEray_ListenTimeOutNoise_8 | listen Time-out noise 8
IfxEray_ListenTimeOutNoise_9 | listen Time-out noise 9
IfxEray_ListenTimeOutNoise_10 | listen Time-out noise 10
IfxEray_ListenTimeOutNoise_11 | listen Time-out noise 11
IfxEray_ListenTimeOutNoise_12 | listen Time-out noise 12
IfxEray_ListenTimeOutNoise_13 | listen Time-out noise 13
IfxEray_ListenTimeOutNoise_14 | listen Time-out noise 14
IfxEray_ListenTimeOutNoise_15 | listen Time-out noise 15
IfxEray_ListenTimeOutNoise_16 | listen Time-out noise 16

Definition at line 206 of file IfxEray.h.

◆ IfxEray_MaxSynchFrames

enum IfxEray_MaxSynchFrames

Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.

Enumerator
IfxEray_MaxSynchFrames_2 | Maximum number of sync frames in a cluster are 2.
IfxEray_MaxSynchFrames_3 | Maximum number of sync frames in a cluster are 3.
IfxEray_MaxSynchFrames_4 | Maximum number of sync frames in a cluster are 4.
IfxEray_MaxSynchFrames_5 | Maximum number of sync frames in a cluster are 5.
IfxEray_MaxSynchFrames_6 | Maximum number of sync frames in a cluster are 6.
IfxEray_MaxSynchFrames_7 | Maximum number of sync frames in a cluster are 7.
IfxEray_MaxSynchFrames_8 | Maximum number of sync frames in a cluster are 8.
IfxEray_MaxSynchFrames_9 | Maximum number of sync frames in a cluster are 9.
IfxEray_MaxSynchFrames_10 | Maximum number of sync frames in a cluster are 10.
IfxEray_MaxSynchFrames_11 | Maximum number of sync frames in a cluster are 11.
IfxEray_MaxSynchFrames_12 | Maximum number of sync frames in a cluster are 12.
IfxEray_MaxSynchFrames_13 | Maximum number of sync frames in a cluster are 13.
IfxEray_MaxSynchFrames_14 | Maximum number of sync frames in a cluster are 14.
IfxEray_MaxSynchFrames_15 | Maximum number of sync frames in a cluster are 15.

Definition at line 227 of file IfxEray.h.

◆ IfxEray_PocCommand

enum IfxEray_PocCommand

Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.

Enumerator
IfxEray_PocCommand_notAccepted | command not accepted.
IfxEray_PocCommand_config | command to controller to enter CONFIG
IfxEray_PocCommand_ready | command to controller to enter READY.
IfxEray_PocCommand_wakeup | command to controller to enter WAKEUP
IfxEray_PocCommand_run | command to controller to enter RUN
IfxEray_PocCommand_allSlots | command to controller to enter ALL_SLOTS
IfxEray_PocCommand_halt | command to controller to enter HALT
IfxEray_PocCommand_freeze | command to controller to enter FREEZE
IfxEray_PocCommand_sendMts | command to controller to enter SEND_MTS
IfxEray_PocCommand_coldStart | command to controller to enter COLD_START
IfxEray_PocCommand_reset | command to controller to enter RESET
IfxEray_PocCommand_monitor | command to controller to enter MONITOR
IfxEray_PocCommand_clearRam | command to controller to enter CLEAR_RAM

Definition at line 247 of file IfxEray.h.

◆ IfxEray_PocState

enum IfxEray_PocState

State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.

Enumerator
IfxEray_PocState_defaultConfig | controller entered default config state
IfxEray_PocState_ready | controller entered ready state
IfxEray_PocState_normalActive | controller entered normal-active state
IfxEray_PocState_normalPassive | controller entered normal-passive state
IfxEray_PocState_halt | controller entered halt state
IfxEray_PocState_monitor | controller entered monitor state
IfxEray_PocState_config | controller entered config state
IfxEray_PocState_wakeupStandby | controller entered wakeup standby state
IfxEray_PocState_wakeupListen | controller entered wakeup-listen state
IfxEray_PocState_wakeupSend | controller entered wakeup-send state
IfxEray_PocState_wakeupDetect | controller entered wakeup-detection state
IfxEray_PocState_startup | controller entered startup state
IfxEray_PocState_coldStartListen | controller entered clod-start listen state
IfxEray_PocState_collisionResolution | controller entered collission-resolution state.
IfxEray_PocState_consistencyCheck | controller entered consistency-check.
IfxEray_PocState_gap | controller entered gap state.
IfxEray_PocState_join | controller entered join state.
IfxEray_PocState_integrationCheck | controller entered integration-check.
IfxEray_PocState_integrationListen | controller entered integration-listen state.
IfxEray_PocState_integrationConsistencyCheck | controller entered integration consistency check state
IfxEray_PocState_initializeSchedule | controller entered initialise schedule state
IfxEray_PocState_staruAborted | controller entered startup-abort state
IfxEray_PocState_startupSucced | controller entered startup succeed state.

Definition at line 266 of file IfxEray.h.

◆ IfxEray_ReceiveChannel

enum IfxEray_ReceiveChannel

Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.

Enumerator
IfxEray_ReceiveChannel_both | both channels for reception
IfxEray_ReceiveChannel_b | channel A for reception
IfxEray_ReceiveChannel_a | channel B for reception
IfxEray_ReceiveChannel_none | none channels for reception

Definition at line 295 of file IfxEray.h.

◆ IfxEray_SleepMode

enum IfxEray_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS.

Enumerator
IfxEray_SleepMode_enable | enables sleep mode
IfxEray_SleepMode_disable | disables sleep mode

Definition at line 306 of file IfxEray.h.

◆ IfxEray_StrobePosition

enum IfxEray_StrobePosition

Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.

Enumerator
IfxEray_StrobePosition_5 | Sample count 5 for strobing.
IfxEray_StrobePosition_4 | Sample count 4 for strobing.
IfxEray_StrobePosition_6 | Sample count 6 for strobing.

Definition at line 314 of file IfxEray.h.

◆ IfxEray_SuspendMode

enum IfxEray_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxEray_SuspendMode_none | No suspend.
IfxEray_SuspendMode_hard | Hard Suspend.
IfxEray_SuspendMode_soft | Soft Suspend.

Definition at line 323 of file IfxEray.h.

◆ IfxEray_TransmissionMode

enum IfxEray_TransmissionMode

Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.

Enumerator
IfxEray_TransmissionMode_continuous | continuos transmission mode
IfxEray_TransmissionMode_singleShot | single transmission mode

Definition at line 332 of file IfxEray.h.

◆ IfxEray_TransmissionSlotMode

enum IfxEray_TransmissionSlotMode

Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.

Enumerator
IfxEray_TransmissionSlotMode_all | transmission in all slots.
IfxEray_TransmissionSlotMode_single | transmission in key slot.

Definition at line 340 of file IfxEray.h.

◆ IfxEray_WakeupChannel

enum IfxEray_WakeupChannel

Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.

Enumerator
IfxEray_WakeupChannel_a | send wakeup channel pattern on channel A
IfxEray_WakeupChannel_b | send wakeup channel pattern on channel B

Definition at line 348 of file IfxEray.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE void | IfxEray_clearErrorFlag (Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested. More...
IFX_INLINE void | IfxEray_clearStatusFlag (Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_getErrorInterrupts (Ifx_ERAY *eray)
Gets the error interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the IBUSY service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine0SrcPtr (Ifx_ERAY *eray)
Gets the INT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine1SrcPtr (Ifx_ERAY *eray)
Gets the INT1 service request. More...
IFX_INLINE boolean | IfxEray_getMessageBufferInterruptStatus (Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus0SrcPtr (Ifx_ERAY *eray)
Gets the MBSC0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus1SrcPtr (Ifx_ERAY *eray)
Gets the MBSC1 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the NDAT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the NDAT1 service request. More...
IFX_INLINE boolean | IfxEray_getNewDataInterruptStatus (Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getOutputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the OBUSY service request. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_getStatusInterrupts (Ifx_ERAY *eray)
Gets the status interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the TINT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the TINT1 service request. More...
IFX_EXTERN void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
IFX_EXTERN void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
IFX_EXTERN void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
IFX_EXTERN void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...

Detailed Description

Function Documentation

◆ IfxEray_clearAllFlags()

IFX_EXTERN void IfxEray_clearAllFlags ( Ifx_ERAY * eray )

Clears all the error flags.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 106 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_clearErrorFlag()

IFX_INLINE void IfxEray_clearErrorFlag | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ClearErrorFlag | errorFlag
 | ) |  |

Clears the error flag requested.

Parameters
eray | pointer to ERAY module registers.
errorFlag | error flag to be cleared.
Returns
None

Definition at line 1189 of file IfxEray.h.

Referenced by IfxEray_Eray_clearErrorFlag().

◆ IfxEray_clearStatusFlag()

IFX_INLINE void IfxEray_clearStatusFlag | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ClearStatusFlag | statusFlag
 | ) |  |

Clears the status flag requested.

Parameters
eray | pointer to ERAY module registers.
statusFlag | status flag to be cleared.
Returns
None

Definition at line 1195 of file IfxEray.h.

Referenced by IfxEray_Eray_clearStatusFlag().

◆ IfxEray_enableInterruptLines()

IFX_EXTERN void IfxEray_enableInterruptLines ( Ifx_ERAY * eray )

Enables all the Interrupt lines.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 116 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_getErrorInterrupts()

IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts ( Ifx_ERAY * eray )

Gets the error interrupt flags.

Parameters
eray pointer to ERAY module registers.
Returns
error interrupt flags.

Definition at line 1227 of file IfxEray.h.

Referenced by IfxEray_Eray_getErrorInterrupts().

◆ IfxEray_getInputBufferBusySrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr ( Ifx_ERAY * eray )

Gets the IBUSY service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of IBUSY service request value.

Definition at line 1261 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getInterruptLine0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr ( Ifx_ERAY * eray )

Gets the INT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of INT0 service request value.

Definition at line 1268 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getInterruptLine1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr ( Ifx_ERAY * eray )

Gets the INT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of INT1 service request value.

Definition at line 1275 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getMessageBufferInterruptStatus()

IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus | ( | Ifx_ERAY * | eray,
 |  | uint8 | messageBuffer
 | ) |  |

Gets the message buffers interrupt status.

Parameters
eray | pointer to ERAY module registers.
messageBuffer | message buffer to which interrupt status be checked.
Returns
message buffer interrupt status.

Definition at line 1282 of file IfxEray.h.

Referenced by IfxEray_Eray_getMessageBufferInterruptStatus().

◆ IfxEray_getMessageBufferStatus0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr ( Ifx_ERAY * eray )

Gets the MBSC0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of MBSC0 service request value.

Definition at line 1293 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getMessageBufferStatus1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr ( Ifx_ERAY * eray )

Gets the MBSC1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of MBSC1 service request value.

Definition at line 1300 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterrupt0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr ( Ifx_ERAY * eray )

Gets the NDAT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of NDAT0 service request value.

Definition at line 1307 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterrupt1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr ( Ifx_ERAY * eray )

Gets the NDAT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of NDAT1 service request value.

Definition at line 1314 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getNewDataInterruptStatus()

IFX_INLINE boolean IfxEray_getNewDataInterruptStatus | ( | Ifx_ERAY * | eray,
 |  | uint8 | ndat
 | ) |  |

Gets the new data interrupt buffers status.

Parameters
eray | pointer to ERAY module registers.
ndat | message buffer number configured to which ndat occurs.
Returns
ndat interrupt buffer.

Definition at line 1321 of file IfxEray.h.

Referenced by IfxEray_Eray_getNewDataInterruptStatus().

◆ IfxEray_getOutputBufferBusySrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr ( Ifx_ERAY * eray )

Gets the OBUSY service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of OBUSY service request value.

Definition at line 1344 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getStatusInterrupts()

IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts ( Ifx_ERAY * eray )

Gets the status interrupt flags.

Parameters
eray pointer to ERAY module registers.
Returns
status interrupt flags.

Definition at line 1357 of file IfxEray.h.

Referenced by IfxEray_Eray_getStatusInterrupts().

◆ IfxEray_getTimerInterrupt0SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr ( Ifx_ERAY * eray )

Gets the TINT0 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of TINT0 service request value.

Definition at line 1365 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getTimerInterrupt1SrcPtr()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr ( Ifx_ERAY * eray )

Gets the TINT1 service request.

Parameters
eray pointer to ERAY module registers.
Returns
address of TINT1 service request value.

Definition at line 1372 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_setMessageBufferInterruptDestination()

IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination | ( | Ifx_ERAY * | eray,
 |  | uint8 | messageBuffer,
 |  | uint8 | messageBufferDestination
 | ) |  |

Selects between MBSC0 and MBSC1 interrupt destination.

Parameters
eray | pointer to ERAY module registers.
messageBuffer | message buffer interrupt which should be configured
messageBufferDestination | selects MBSC0 or MBSC1 interrupt output
Returns
None

Definition at line 230 of file IfxEray.c.

Referenced by IfxEray_Eray_setMessageBufferInterruptDestination().

◆ IfxEray_setNewDataInterruptDestination()

IFX_EXTERN void IfxEray_setNewDataInterruptDestination | ( | Ifx_ERAY * | eray,
 |  | uint8 | ndat,
 |  | uint8 | ndatDestination
 | ) |  |

Selects between NDAT0 and NDAT1 interrupt destination.

Parameters
eray | pointer to ERAY module registers.
ndat | NDAT interrupt which should be configured
ndatDestination | selects NDAT0 or NDAT1 interrupt output
Returns
None

Definition at line 247 of file IfxEray.c.

Referenced by IfxEray_Eray_setNewDataInterruptDestination().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxEray_initRxPin (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin. More...
IFX_INLINE void | IfxEray_initTxEnPin (const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output. More...
IFX_INLINE void | IfxEray_initTxPin (const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...

Detailed Description

Function Documentation

◆ IfxEray_initRxPin()

IFX_INLINE void IfxEray_initRxPin | ( | const IfxEray_Rxd_In * | rx,
 |  | IfxPort_InputMode | rxMode
 | ) |  |

Initialises a RX pin.

Parameters
rx | the RX Pin which should be configured.
rxMode | the pin input mode which should be configured.
Returns
None

Definition at line 1396 of file IfxEray.h.

◆ IfxEray_initTxEnPin()

IFX_INLINE void IfxEray_initTxEnPin | ( | const IfxEray_Txen_Out * | txEn,
 |  | IfxPort_OutputMode | txEnMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX Enable output.

Parameters
txEn | the TX Enable Pin which should be configured.
txEnMode | the pin output mode which should be configured.
padDriver | the pad driver mode which should be configured.
Returns
None

Definition at line 1411 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_initTxPin()

IFX_INLINE void IfxEray_initTxPin | ( | const IfxEray_Txd_Out * | tx,
 |  | IfxPort_OutputMode | txMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured.
txMode | the pin output mode which should be configured.
padDriver | the pad driver mode which should be configured.
Returns
None

Definition at line 1418 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxEray_disableModule (Ifx_ERAY *eray)
Disables the ERAY module. More...
IFX_INLINE void | IfxEray_enableModule (Ifx_ERAY *eray)
Enables the ERAY module. More...
IFX_INLINE boolean | IfxEray_isModuleSuspended (Ifx_ERAY *eray)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEray_setSleepMode (Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IFX_EXTERN IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
IFX_EXTERN void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...

Detailed Description

Function Documentation

◆ IfxEray_disableModule()

IFX_INLINE void IfxEray_disableModule ( Ifx_ERAY * eray )

Disables the ERAY module.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1201 of file IfxEray.h.

◆ IfxEray_enableModule()

IFX_INLINE void IfxEray_enableModule ( Ifx_ERAY * eray )

Enables the ERAY module.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1211 of file IfxEray.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxEray_getAddress()

IFX_EXTERN Ifx_ERAY* IfxEray_getAddress ( IfxEray_Index eray )
Parameters
eray Resource index of the ERAY
Returns
ERAY module register address

Definition at line 134 of file IfxEray.c.

◆ IfxEray_getIndex()

IFX_EXTERN IfxEray_Index IfxEray_getIndex ( Ifx_ERAY * eray )

API to get the resource index of the ERAY specified.

Parameters
eray Pointer to the ERAY HW module (register memory map)
Returns
Resource index of the ERAY

Definition at line 151 of file IfxEray.c.

◆ IfxEray_isModuleSuspended()

IFX_INLINE boolean IfxEray_isModuleSuspended ( Ifx_ERAY * eray )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
eray Pointer to ERAY module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1425 of file IfxEray.h.

◆ IfxEray_resetModule()

IFX_EXTERN void IfxEray_resetModule ( Ifx_ERAY * eray )

Resets the ERAY kernel.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 210 of file IfxEray.c.

Referenced by IfxEray_Eray_deInitModule().

◆ IfxEray_setSleepMode()

IFX_INLINE void IfxEray_setSleepMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
eray | pointer to ERAY registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1704 of file IfxEray.h.


iLLD_TC26B: Status Functions

Functions
Status Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Status Functions:

Functions

IFX_INLINE Ifx_ERAY_FSR | IfxEray_getFifoStatus (Ifx_ERAY *eray)
Gets the FIFO status. More...
IFX_INLINE boolean | IfxEray_getInputBufferBusyHostStatus (Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status. More...
IFX_INLINE uint8 | IfxEray_getInputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Input Buffer Shadow status. More...
IFX_INLINE uint8 | IfxEray_getOutputBuffer (Ifx_ERAY *eray)
Gets the output buffer index. More...
IFX_INLINE boolean | IfxEray_getOutputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Output Buffer Shadow status. More...
IFX_INLINE IfxEray_PocState | IfxEray_getPocState (Ifx_ERAY *eray)
Gets the current POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_getWakeupPatternReceivedChannel (Ifx_ERAY *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_waitForPocState (Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state. More...
IFX_EXTERN boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
IFX_EXTERN void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...

Detailed Description

Function Documentation

◆ IfxEray_changePocState()

IFX_EXTERN boolean IfxEray_changePocState | ( | Ifx_ERAY * | eray,
 |  | IfxEray_PocCommand | pocCommand
 | ) |  |

Changes the Commmunication Controller state.

Parameters
eray | pointer to ERAY module registers.
pocCommand | POC command which triggers the Controller state.
Returns
TRUE if command accepted otherwise FALSE.

Definition at line 82 of file IfxEray.c.

Referenced by IfxEray_Eray_allowColdStart(), IfxEray_Eray_changePocState(), IfxEray_Eray_Node_init(), IfxEray_Eray_setPocAllSlots(), IfxEray_Eray_startCommunication(), IfxEray_Eray_wakeUpChannel(), and IfxEray_Eray_wakeUpCluster().

◆ IfxEray_getFifoStatus()

IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus ( Ifx_ERAY * eray )

Gets the FIFO status.

Parameters
eray pointer to ERAY module registers.
Returns
FIFO status.

Definition at line 1241 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame().

◆ IfxEray_getInputBufferBusyHostStatus()

IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus ( Ifx_ERAY * eray )

Gets the Input Buffer Host Busy status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if Host is Busy otherwise FALSE.

Definition at line 1249 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame(), and IfxEray_setSlot().

◆ IfxEray_getInputBufferBusyShadowStatus()

IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus ( Ifx_ERAY * eray )

Gets the Input Buffer Shadow status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if busy otherwise FALSE

Definition at line 1255 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame(), and IfxEray_setSlot().

◆ IfxEray_getOutputBuffer()

IFX_INLINE uint8 IfxEray_getOutputBuffer ( Ifx_ERAY * eray )

Gets the output buffer index.

Parameters
eray pointer to ERAY module registers.
Returns
output buffer index.

Definition at line 1332 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_getOutputBufferBusyShadowStatus()

IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus ( Ifx_ERAY * eray )

Gets the Output Buffer Shadow status.

Parameters
eray pointer to ERAY module registers.
Returns
TRUE if busy otherwise FALSE

Definition at line 1338 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_getPocState()

IFX_INLINE IfxEray_PocState IfxEray_getPocState ( Ifx_ERAY * eray )

Gets the current POC state.

Parameters
eray pointer to ERAY module registers.
Returns
current POC state.

Definition at line 1351 of file IfxEray.h.

Referenced by IfxEray_Eray_getPocState(), and IfxEray_Eray_Node_init().

◆ IfxEray_getWakeupPatternReceivedChannel()

IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel ( Ifx_ERAY * eray )

Gets the received wakeup pattern channel.

Parameters
eray pointer to ERAY module registers.
Returns
received wakeup pattern channel.

Definition at line 1379 of file IfxEray.h.

Referenced by IfxEray_Eray_getWakeupPatternReceivedChannel().

◆ IfxEray_setPocReady()

IFX_EXTERN void IfxEray_setPocReady ( Ifx_ERAY * eray )

Sets the POC state to Ready state.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 265 of file IfxEray.c.

Referenced by IfxEray_Eray_Node_init(), and IfxEray_Eray_wakeUpChannel().

◆ IfxEray_waitForPocState()

IFX_INLINE void IfxEray_waitForPocState | ( | Ifx_ERAY * | eray,
 |  | IfxEray_PocState | pocState
 | ) |  |

Waits until the controller enters required POC state.

Parameters
eray | pointer to ERAY module registers.
pocState | POC state upto which controller waits.
Returns
None

Definition at line 1802 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxEray_receiveHeader (Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer. More...
IFX_INLINE void | IfxEray_sendHeader (Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame. More...
IFX_INLINE void | IfxEray_setActiveCyclePairs (Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state. More...
IFX_INLINE void | IfxEray_setAutoDelayBuffers (Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM. More...
IFX_INLINE void | IfxEray_setBaudrate (Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus. More...
IFX_INLINE void | IfxEray_setBufferReconfigSecure (Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM. More...
IFX_INLINE void | IfxEray_setChannelAInitialOffsets (Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes. More...
IFX_INLINE void | IfxEray_setChannelBInitialOffsets (Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes. More...
IFX_INLINE void | IfxEray_setChannelsReceiveDelay (Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels. More...
IFX_INLINE void | IfxEray_setClockCorrectionCycles (Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt. More...
IFX_INLINE void | IfxEray_setClockSynchErrorHalt (Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error. More...
IFX_INLINE void | IfxEray_setClusterDriftValues (Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values. More...
IFX_INLINE void | IfxEray_setClusterStartupDeviation (Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation. More...
IFX_INLINE void | IfxEray_setCollisionAvoidanceDuration (Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration. More...
IFX_INLINE void | IfxEray_setCycleDurationMacroticks (Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks. More...
IFX_INLINE void | IfxEray_setCycleDurationMicroticks (Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks. More...
IFX_INLINE void | IfxEray_setDecodingCorrectionValue (Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value. More...
IFX_INLINE void | IfxEray_setDynamicSlots (Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length. More...
IFX_INLINE void | IfxEray_setExternalCorrectionControl (Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls. More...
IFX_INLINE void | IfxEray_setExternalCorrectionValues (Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values. More...
IFX_INLINE void | IfxEray_setFifoBufferStartIndex (Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex. More...
IFX_INLINE void | IfxEray_setFifoFilterConfigurations (Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations. More...
IFX_INLINE void | IfxEray_setFifoMessageBufferConfigurations (Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations. More...
IFX_INLINE void | IfxEray_setFirstDynamicBuffer (Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer. More...
IFX_INLINE void | IfxEray_setListenTimeOuts (Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts. More...
IFX_INLINE void | IfxEray_setMaxColdStartAttempts (Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state. More...
IFX_INLINE void | IfxEray_setMaxCorrectionValues (Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values. More...
IFX_INLINE void | IfxEray_setMaxSynchFrames (Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster. More...
IFX_INLINE void | IfxEray_setMessageBufferCount (Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers. More...
IFX_INLINE void | IfxEray_setMessageHandlerConfigurations (Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations. More...
IFX_INLINE void | IfxEray_setNetworkStartIdleTime (Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time. More...
IFX_INLINE void | IfxEray_setNetworkVectorLength (Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length. More...
IFX_INLINE void | IfxEray_setNodeChannels (Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node. More...
IFX_INLINE void | IfxEray_setOffsetCorrection (Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point. More...
IFX_INLINE void | IfxEray_setReceiveRequest (Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame. More...
IFX_INLINE void | IfxEray_setReceiveWakeupTimes (Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times. More...
IFX_INLINE void | IfxEray_setRxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received. More...
IFX_INLINE void | IfxEray_setSlotActionPoints (Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points. More...
IFX_INLINE void | IfxEray_setStaticSlots (Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length. More...
IFX_INLINE void | IfxEray_setStrobePosition (Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing. More...
IFX_INLINE void | IfxEray_setSymbolChannels (Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols. More...
IFX_INLINE void | IfxEray_setTransmissionSlotMode (Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode. More...
IFX_INLINE void | IfxEray_setTransmissionStartTime (Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration. More...
IFX_INLINE void | IfxEray_setTransmitRequest (Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame. More...
IFX_INLINE void | IfxEray_setTransmitWakeupTimes (Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times. More...
IFX_INLINE void | IfxEray_setTransmittedFrames (Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization. More...
IFX_INLINE void | IfxEray_setTxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number. More...
IFX_INLINE void | IfxEray_setViewData (Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers. More...
IFX_INLINE void | IfxEray_setWakeupPatternChannel (Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel. More...

Detailed Description

Function Documentation

◆ IfxEray_receiveHeader()

IFX_INLINE void IfxEray_receiveHeader | ( | Ifx_ERAY * | eray,
 |  | boolean | headerReceived
 | ) |  |

request to receive header section from message buffer.

Parameters
eray | pointer to ERAY module registers.
headerReceived | whether header is received or not.
Returns
None

Definition at line 1443 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_sendHeader()

IFX_INLINE void IfxEray_sendHeader | ( | Ifx_ERAY * | eray,
 |  | boolean | headerTransfered
 | ) |  |

sets the bit to send header in frame.

Parameters
eray | pointer to ERAY module registers.
headerTransfered | whether header transfered or not.
Returns
None

Definition at line 1455 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setActiveCyclePairs()

IFX_INLINE void IfxEray_setActiveCyclePairs | ( | Ifx_ERAY * | eray,
 |  | uint8 | numberOfCyclePairsForActive
 | ) |  |

Sets number of cycle pairs for Active state.

Parameters
eray | pointer to ERAY module registers.
numberOfCyclePairsForActive | number of cycle pairs for Active state.
Returns
None

Definition at line 1461 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setAutoDelayBuffers()

IFX_INLINE void IfxEray_setAutoDelayBuffers ( Ifx_ERAY * eray )

Sets auto delays between input, output buffers and message RAM.

Parameters
eray pointer to ERAY module registers.
Returns
None

Definition at line 1467 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_setBaudrate()

IFX_INLINE void IfxEray_setBaudrate | ( | Ifx_ERAY * | eray,
 |  | IfxEray_Baudrate | baudrate
 | ) |  |

Sets baudrate on Flexray bus.

Parameters
eray | pointer to ERAY module registers.
baudrate | baudrate on flexray bus.
Returns
None

Definition at line 1475 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setBufferReconfigSecure()

IFX_INLINE void IfxEray_setBufferReconfigSecure | ( | Ifx_ERAY * | eray,
 |  | uint8 | secureValue
 | ) |  |

Sets secured buffers in message RAM.

Parameters
eray | pointer to ERAY module registers.
secureValue | secure value.
Returns
None

Definition at line 1481 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setChannelAInitialOffsets()

IFX_INLINE void IfxEray_setChannelAInitialOffsets | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelAMicrotickInitialOffset,
 |  | uint8 | channelAMacrotickInitialOffset
 | ) |  |

Sets channel A initial offstes.

Parameters
eray | pointer to ERAY module registers.
channelAMicrotickInitialOffset | difference between reference points on channel A in microticks.
channelAMacrotickInitialOffset | difference between reference points on channel A in macroticks.
Returns
None

Definition at line 1487 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setChannelBInitialOffsets()

IFX_INLINE void IfxEray_setChannelBInitialOffsets | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelBMicrotickInitialOffset,
 |  | uint8 | channelBMacrotickInitialOffset
 | ) |  |

Sets channel B initial offstes.

Parameters
eray | pointer to ERAY module registers.
channelBMicrotickInitialOffset | difference between reference points on channel B in microticks.
channelBMacrotickInitialOffset | difference between reference points on channel B in macroticks.
Returns
None

Definition at line 1494 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setChannelsReceiveDelay()

IFX_INLINE void IfxEray_setChannelsReceiveDelay | ( | Ifx_ERAY * | eray,
 |  | uint8 | channelAReceptionDelay,
 |  | uint8 | channelBReceptionDelay
 | ) |  |

Sets receive delays on channels.

Parameters
eray | pointer to ERAY module registers.
channelAReceptionDelay | reception delay on channel A.
channelBReceptionDelay | reception delay on channel B.
Returns
None

Definition at line 1501 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setClockCorrectionCycles()

IFX_INLINE void IfxEray_setClockCorrectionCycles | ( | Ifx_ERAY * | eray,
 |  | uint8 | clockCorrectionCyclesPassive,
 |  | uint8 | clockCorrectionCyclesHalt
 | ) |  |

Sets clock correction cycles for Passive and Halt.

Parameters
eray | pointer to ERAY module registers.
clockCorrectionCyclesPassive | maximum number of cycles missing clock correction leading for passive state.
clockCorrectionCyclesHalt | maximum number of cycles missing clock correction leading for halt state.
Returns
None

Definition at line 1508 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setClockSynchErrorHalt()

IFX_INLINE void IfxEray_setClockSynchErrorHalt | ( | Ifx_ERAY * | eray,
 |  | boolean | clockSyncErrorHalt
 | ) |  |

lead to halt state in clock synch error.

Parameters
eray | pointer to ERAY module registers.
clockSyncErrorHalt | whether to enter halt in clock synch error or not.
Returns
None

Definition at line 1518 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setClusterDriftValues()

IFX_INLINE void IfxEray_setClusterDriftValues | ( | Ifx_ERAY * | eray,
 |  | uint8 | clusterDrift,
 |  | uint16 | maxDriftOffset
 | ) |  |

Sets cluster drift values.

Parameters
eray | pointer to ERAY module registers.
clusterDrift | cluster drift damping value used in clock synchronization.
maxDriftOffset | maximum drift offset between two nodes.
Returns
None

Definition at line 1524 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setClusterStartupDeviation()

IFX_INLINE void IfxEray_setClusterStartupDeviation | ( | Ifx_ERAY * | eray,
 |  | uint16 | acceptedStartupDeviation
 | ) |  |

Sets cluster startup deviation.

Parameters
eray | pointer to ERAY module registers.
acceptedStartupDeviation | deviation for startup Frames during integration.
Returns
None

Definition at line 1531 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setCollisionAvoidanceDuration()

IFX_INLINE void IfxEray_setCollisionAvoidanceDuration | ( | Ifx_ERAY * | eray,
 |  | uint8 | collisionAvoidanceDuration
 | ) |  |

Sets CAS symbol window duration.

Parameters
eray | pointer to ERAY module registers.
collisionAvoidanceDuration | accepted duration of CAS symbol.
Returns
None

Definition at line 1537 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setCycleDurationMacroticks()

IFX_INLINE void IfxEray_setCycleDurationMacroticks | ( | Ifx_ERAY * | eray,
 |  | uint16 | macroticks
 | ) |  |

sets duration of the communication cycle in Macroticks.

Parameters
eray | pointer to ERAY module registers.
macroticks | duration of the communication cycle in Macroticks.
Returns
None

Definition at line 1543 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setCycleDurationMicroticks()

IFX_INLINE void IfxEray_setCycleDurationMicroticks | ( | Ifx_ERAY * | eray,
 |  | uint32 | microticks
 | ) |  |

sets duration of the communication cycle in Microticks.

Parameters
eray | pointer to ERAY module registers.
microticks | duration of the communication cycle in Microticks.
Returns
None

Definition at line 1549 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setDecodingCorrectionValue()

IFX_INLINE void IfxEray_setDecodingCorrectionValue | ( | Ifx_ERAY * | eray,
 |  | uint8 | decodingCorrection
 | ) |  |

Sets decoding correction value.

Parameters
eray | pointer to ERAY module registers.
decodingCorrection | decoding correction value.
Returns
None

Definition at line 1555 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setDynamicSlots()

IFX_INLINE void IfxEray_setDynamicSlots | ( | Ifx_ERAY * | eray,
 |  | uint8 | dynamicSlotLength,
 |  | uint16 | dynamicSlotCount,
 |  | IfxEray_IdleDynamicSlots | idleDynamicSlots
 | ) |  |

Sets dynamic slots count and length.

Parameters
eray | pointer to ERAY module registers.
dynamicSlotLength | duration of dynamic slot in macroticks.
dynamicSlotCount | number of dynamic slots in a communication cycle.
idleDynamicSlots | duration of dynamic slot idle phase.
Returns
None

Definition at line 1561 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setExternalCorrectionControl()

IFX_INLINE void IfxEray_setExternalCorrectionControl | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ExternalOffset | externalOffset,
 |  | IfxEray_ExternalRate | externalRate
 | ) |  |

Sets external correction controls.

Parameters
eray | pointer to ERAY module registers.
externalOffset | External offset correction control.
externalRate | External rate correction control.
Returns
None

Definition at line 1569 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setExternalCorrectionValues()

IFX_INLINE void IfxEray_setExternalCorrectionValues | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ExternalOffsetCorrection | externalOffsetCorrection,
 |  | IfxEray_ExternalRateCorrection | externalRateCorrection
 | ) |  |

Sets external correction values.

Parameters
eray | pointer to ERAY module registers.
externalOffsetCorrection | external clock offset correction value.
externalRateCorrection | external clock rate correction value.
Returns
None

Definition at line 1576 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setFifoBufferStartIndex()

IFX_INLINE void IfxEray_setFifoBufferStartIndex | ( | Ifx_ERAY * | eray,
 |  | uint8 | fifoBufferStartIndex
 | ) |  |

Sets FIFO buffer start idex.

Parameters
eray | pointer to ERAY module registers.
fifoBufferStartIndex | FIFO buffer start idex.
Returns
None

Definition at line 1583 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFifoFilterConfigurations()

IFX_INLINE void IfxEray_setFifoFilterConfigurations | ( | Ifx_ERAY * | eray,
 |  | uint16 | rejectedFrameId,
 |  | uint8 | filteredCycleNumber,
 |  | boolean | fifoNullFramesRejected,
 |  | uint16 | frameIdFilter
 | ) |  |

Sets FIFO filter configurations.

Parameters
eray | pointer to ERAY module registers.
rejectedFrameId | rejected frameId by FIFO.
filteredCycleNumber | filtered cycle number.
fifoNullFramesRejected | null frames rejection selection.
frameIdFilter | filtered frameid by FIFO.
Returns
None

Definition at line 1590 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFifoMessageBufferConfigurations()

IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ReceiveChannel | receiveChannel,
 |  | boolean | staticFifoDisabled,
 |  | uint8 | fifoDepth
 | ) |  |

Sets FIFO configurations.

Parameters
eray | pointer to ERAY module registers.
receiveChannel | FIFO receive channel.
staticFifoDisabled | static FIFO selection.
fifoDepth | FIFO depth.
Returns
None

Definition at line 1599 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setFirstDynamicBuffer()

IFX_INLINE void IfxEray_setFirstDynamicBuffer | ( | Ifx_ERAY * | eray,
 |  | uint8 | firstDynamicBuffer
 | ) |  |

Sets first dynamic buffer.

Parameters
eray | pointer to ERAY module registers.
firstDynamicBuffer | first dynamic buffer.
Returns
None

Definition at line 1607 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setListenTimeOuts()

IFX_INLINE void IfxEray_setListenTimeOuts | ( | Ifx_ERAY * | eray,
 |  | uint32 | listenTimeOut,
 |  | IfxEray_ListenTimeOutNoise | listenTimeOutNoise
 | ) |  |

Sets startup or wakeup listen timeouts.

Parameters
eray | pointer to ERAY module registers.
listenTimeOut | wakeup or startup listen timeout in microticks.
listenTimeOutNoise | upper limit for startup or wakeup listen timeout in presence of noise.
Returns
None

Definition at line 1614 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setMaxColdStartAttempts()

IFX_INLINE void IfxEray_setMaxColdStartAttempts | ( | Ifx_ERAY * | eray,
 |  | uint8 | maxColdStartAttempts
 | ) |  |

Sets the maximum cold start attempts for active state.

Parameters
eray | pointer to ERAY module registers.
maxColdStartAttempts | maximum number of attempts that a cold start node allows.
Returns
None

Definition at line 1624 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setMaxCorrectionValues()

IFX_INLINE void IfxEray_setMaxCorrectionValues | ( | Ifx_ERAY * | eray,
 |  | uint16 | maxOffsetCorrection,
 |  | uint16 | maxRateCorrection
 | ) |  |

Sets max limit correction values.

Parameters
eray | pointer to ERAY module registers.
maxOffsetCorrection | maximum offset correction.
maxRateCorrection | maximum rate correction.
Returns
None

Definition at line 1630 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setMaxSynchFrames()

IFX_INLINE void IfxEray_setMaxSynchFrames | ( | Ifx_ERAY * | eray,
 |  | IfxEray_MaxSynchFrames | maxSyncFrames
 | ) |  |

Sets maximum synch frames in a cluster.

Parameters
eray | pointer to ERAY module registers.
maxSyncFrames | maximum synch frames in a cluster.
Returns
None

Definition at line 1637 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setMessageBufferCount()

IFX_INLINE void IfxEray_setMessageBufferCount | ( | Ifx_ERAY * | eray,
 |  | uint8 | numberOfMessageBuffers
 | ) |  |

Sets number of message buffers.

Parameters
eray | pointer to ERAY module registers.
numberOfMessageBuffers | number of message buffers.
Returns
None

Definition at line 1643 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_setMessageHandlerConfigurations()

IFX_INLINE void IfxEray_setMessageHandlerConfigurations | ( | Ifx_ERAY * | eray,
 |  | uint8 | staticFramepayload,
 |  | uint8 | latestTransmissionStart
 | ) |  |

Sets Message Handler configurations.

Parameters
eray | pointer to ERAY module registers.
staticFramepayload | payload length of static frames in double bytes.
latestTransmissionStart | dynamic slots befor transmission of inhibit frame in dynamic segment.
Returns
None

Definition at line 1649 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setNetworkStartIdleTime()

IFX_INLINE void IfxEray_setNetworkStartIdleTime | ( | Ifx_ERAY * | eray,
 |  | uint16 | networkStartIdleTime
 | ) |  |

Sets network start Idle time.

Parameters
eray | pointer to ERAY module registers.
networkStartIdleTime | starting point of Network Idle Time Phase.
Returns
None

Definition at line 1659 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setNetworkVectorLength()

IFX_INLINE void IfxEray_setNetworkVectorLength | ( | Ifx_ERAY * | eray,
 |  | uint32 | networkVectorLength
 | ) |  |

Sets network management vector length.

Parameters
eray | pointer to ERAY module registers.
networkVectorLength | length of network management vector.
Returns
None

Definition at line 1665 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setNodeChannels()

IFX_INLINE void IfxEray_setNodeChannels | ( | Ifx_ERAY * | eray,
 |  | boolean | channelAConnectedNode,
 |  | boolean | channelBConnectedNode
 | ) |  |

Sets channels connected to node.

Parameters
eray | pointer to ERAY module registers.
channelAConnectedNode | whether node connected to channel A or not.
channelBConnectedNode | whether node connected to channel B or not.
Returns
None

Definition at line 1671 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setOffsetCorrection()

IFX_INLINE void IfxEray_setOffsetCorrection | ( | Ifx_ERAY * | eray,
 |  | uint16 | correctionOffset
 | ) |  |

Sets offset correction starting point.

Parameters
eray | pointer to ERAY module registers.
correctionOffset | offset correction start point.
Returns
None

Definition at line 1678 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setReceiveRequest()

IFX_INLINE void IfxEray_setReceiveRequest | ( | Ifx_ERAY * | eray,
 |  | boolean | receiveRequested
 | ) |  |

requests to receive the frame.

Parameters
eray | pointer to ERAY module registers.
receiveRequested | whether frame to be received or not.
Returns
None

Definition at line 1684 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setReceiveWakeupTimes()

IFX_INLINE void IfxEray_setReceiveWakeupTimes | ( | Ifx_ERAY * | eray,
 |  | uint16 | receiveWakeupTestDuration,
 |  | uint8 | receiveWakeupIdleTime,
 |  | uint8 | receiveWakeupLowTime
 | ) |  |

Sets receive wakeup times.

Parameters
eray | pointer to ERAY module registers.
receiveWakeupTestDuration | duration of receive wakeup pattern.
receiveWakeupIdleTime | duration of receive wakeup idle time.
receiveWakeupLowTime | duration of receive wakeup low time.
Returns
None

Definition at line 1690 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setRxBufferNumber()

IFX_INLINE void IfxEray_setRxBufferNumber | ( | Ifx_ERAY * | eray,
 |  | uint8 | bufferIndex
 | ) |  |

sets buffer number in which frame is received.

Parameters
eray | pointer to ERAY module registers.
bufferIndex | buffer number in which frame is received.
Returns
None

Definition at line 1698 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setSlotActionPoints()

IFX_INLINE void IfxEray_setSlotActionPoints | ( | Ifx_ERAY * | eray,
 |  | uint8 | staticActionPoint,
 |  | uint8 | dynamicActionPoint
 | ) |  |

Sets slots action points.

Parameters
eray | pointer to ERAY module registers.
staticActionPoint | static slots and symbol window action point.
dynamicActionPoint | dynamic slots action point.
Returns
None

Definition at line 1713 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setStaticSlots()

IFX_INLINE void IfxEray_setStaticSlots | ( | Ifx_ERAY * | eray,
 |  | uint16 | staticSlotLength,
 |  | uint16 | staticSlotsCount
 | ) |  |

Sets static slots count and length.

Parameters
eray | pointer to ERAY module registers.
staticSlotLength | duration of static slot in macroticks.
staticSlotsCount | number of static slots in a communication cycle.
Returns
None

Definition at line 1720 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initGTU().

◆ IfxEray_setStrobePosition()

IFX_INLINE void IfxEray_setStrobePosition | ( | Ifx_ERAY * | eray,
 |  | IfxEray_StrobePosition | strobePosition
 | ) |  |

Sets sample point for strobing.

Parameters
eray | pointer to ERAY module registers.
strobePosition | strobing sample count.
Returns
None

Definition at line 1727 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setSymbolChannels()

IFX_INLINE void IfxEray_setSymbolChannels | ( | Ifx_ERAY * | eray,
 |  | boolean | channelASymbolTransmitted,
 |  | boolean | channelBSymbolTransmitted
 | ) |  |

Sets channels which transmits symbols.

Parameters
eray | pointer to ERAY module registers.
channelASymbolTransmitted | whether symbol is transmitted in Channel A or not.
channelBSymbolTransmitted | whether symbol is transmitted in Channel B or not.
Returns
None

Definition at line 1744 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmissionSlotMode()

IFX_INLINE void IfxEray_setTransmissionSlotMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_TransmissionSlotMode | transmissionSlotMode
 | ) |  |

Sets the transmit slot mode.

Parameters
eray | pointer to ERAY module registers.
transmissionSlotMode | transmission slot mode.
Returns
None

Definition at line 1751 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmissionStartTime()

IFX_INLINE void IfxEray_setTransmissionStartTime | ( | Ifx_ERAY * | eray,
 |  | uint8 | transmissionStartTime
 | ) |  |

Sets transmission start time duration.

Parameters
eray | pointer to ERAY module registers.
transmissionStartTime | transmission start time.
Returns
None

Definition at line 1757 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmitRequest()

IFX_INLINE void IfxEray_setTransmitRequest | ( | Ifx_ERAY * | eray,
 |  | boolean | transferRequested
 | ) |  |

Sets transfer request to send frame.

Parameters
eray | pointer to ERAY module registers.
transferRequested | whether transfer requested or not.
Returns
None

Definition at line 1763 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setTransmittedFrames()

IFX_INLINE void IfxEray_setTransmittedFrames | ( | Ifx_ERAY * | eray,
 |  | boolean | startupFrameTransmitted,
 |  | boolean | synchFrameTransmitted
 | ) |  |

Configures transmitted frames for startup and synchronization.

Parameters
eray | pointer to ERAY module registers.
startupFrameTransmitted | whether startup Frame transmitted or not.
synchFrameTransmitted | whether synch Frame transmitted or not.
Returns
None

Definition at line 1777 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTransmitWakeupTimes()

IFX_INLINE void IfxEray_setTransmitWakeupTimes | ( | Ifx_ERAY * | eray,
 |  | uint8 | transmitWakeupRepetitions,
 |  | uint8 | transmitWakeupIdleTime,
 |  | uint8 | transmitWakeupLowTime
 | ) |  |

Sets transmit wakeup times.

Parameters
eray | pointer to ERAY module registers.
transmitWakeupRepetitions | transmission wakeup repetitions.
transmitWakeupIdleTime | duration of transmit wakeup idle time.
transmitWakeupLowTime | duration of transmit wakeup low time.
Returns
None

Definition at line 1769 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_setTxBufferNumber()

IFX_INLINE void IfxEray_setTxBufferNumber | ( | Ifx_ERAY * | eray,
 |  | uint8 | bufferIndex
 | ) |  |

Sets the transmit buffer number.

Parameters
eray | pointer to ERAY module registers.
bufferIndex | buffer number in which frame is sent.
Returns
None

Definition at line 1784 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setViewData()

IFX_INLINE void IfxEray_setViewData | ( | Ifx_ERAY * | eray,
 |  | boolean | swapRequested
 | ) |  |

Swaps the shadow and Host output registers.

Parameters
eray | pointer to ERAY module registers.
swapRequested | whether swap is requested or not.
Returns
None

Definition at line 1790 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_setWakeupPatternChannel()

IFX_INLINE void IfxEray_setWakeupPatternChannel | ( | Ifx_ERAY * | eray,
 |  | IfxEray_WakeupChannel | wakeupPatternChannel
 | ) |  |

Sets the cluster wakeup channel.

Parameters
eray | pointer to ERAY module registers.
wakeupPatternChannel | cluster wakeup pattern channel.
Returns
None

Definition at line 1796 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_initCommunicationController().


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ERAY » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEray_Header
Header section in a frame. More...
struct | IfxEray_ReceivedHeader
Received header in a frame. More...
struct | IfxEray_SlotConfig
Transmit control structure. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Header

struct IfxEray_Header

Header section in a frame.

Definition at line 364 of file IfxEray.h.

Data Fields
IfxEray_BufferDirection | bufferDirection | selects buffer as a transmit buffer or as a receive buffer.
boolean | bufferServiceEnabled | wether buffer service request is enabled or not.
boolean | channelAFiltered | channel A serves as a control for transmit and filter for receive buffers.
boolean | channelBFiltered | channel B serves as a control for transmit and filter for receive buffers.
uint8 | cycleCode | the cycle set used for cycle counter filtering.
uint16 | dataPointer | pointer to the data section of message buffer in RAM.
uint16 | frameId | slot ID of the selected Message Buffer.
uint8 | payloadLength | length of data section.
boolean | startupFrameIndicator | whether startup frame is indicated or not.
boolean | syncFrameIndicator | whether sync frame is indicated or not.
IfxEray_TransmissionMode | transmissionMode | transmission mode of Header.
boolean | transmitPayloadIndicatior | weather payload indicator is set or not.

◆ IfxEray_ReceivedHeader

struct IfxEray_ReceivedHeader

Received header in a frame.

Definition at line 382 of file IfxEray.h.

Data Fields
uint8 | cycleNumber: 7 | cycle number in which frame is received.
uint16 | frameId: 11 | received frame id.
uint16 | headerCrc: 11 | received header crc.
uint8 | nullFrameIndicator: 1 | 0 : no data frame received; 1: atleast one data frame received.
uint8 | payloadLength: 7 | received payload length.
uint8 | payloadPreambleIndicator: 1 | 1 : received payload segment has network management and message id or not; 0 : It hasn't.
uint8 | startupFrame: 1 | 0 : received frame is not a startup frame ; 1 : receive frame is a startup frame.
uint8 | syncFrame: 1 | 0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.

◆ IfxEray_SlotConfig

struct IfxEray_SlotConfig

Transmit control structure.

Definition at line 396 of file IfxEray.h.

Data Fields
uint8 | bufferIndex | buffer index in the Message RAM.
boolean | dataTransfered | whether data is transfered from input buffers to Message RAM or not.
boolean | headerTransfered | whether header is transfered from input buffers to Message RAM or not.
boolean | transferRequested | transmit buffer released for transmission or not.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » ERAY » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxEray_receiveData (Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer. More...
IFX_INLINE void | IfxEray_sendData (Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame. More...
IFX_EXTERN uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
IFX_EXTERN void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_EXTERN void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
IFX_EXTERN void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
IFX_EXTERN void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...

Detailed Description

Function Documentation

◆ IfxEray_calcHeaderCrc()

IFX_EXTERN uint16 IfxEray_calcHeaderCrc | ( | uint8 | payloadLength,
 |  | uint16 | frameId,
 |  | boolean | startupFrameIndicator,
 |  | boolean | syncFrameIndicator
 | ) |  |

Calculate and returns the CRC for frame.

Parameters
payloadLength | payload length configured for frame.
frameId | slot id
startupFrameIndicator | whether startup frame is indicated or not.
syncFrameIndicator | whether sync frame is indicated or not.
Returns
calculated CRC value.

Definition at line 35 of file IfxEray.c.

Referenced by IfxEray_setSlot().

◆ IfxEray_readData()

IFX_EXTERN void IfxEray_readData | ( | Ifx_ERAY * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Reads the received data from output registers.

Parameters
eray | pointer to ERAY module registers.
data | pointer to received data buffer.
payloadLength | payload length received in a frame.
Returns
None

Definition at line 171 of file IfxEray.c.

Referenced by IfxEray_Eray_readData(), and IfxEray_readFrame().

◆ IfxEray_readFrame()

IFX_EXTERN void IfxEray_readFrame | ( | Ifx_ERAY * | eray,
 |  | IfxEray_ReceivedHeader * | header,
 |  | uint32 * | data,
 |  | Ifx_SizeT | maxPayloadLength
 | ) |  |

Reads header and data from output buffers.

Parameters
eray | pointer to ERAY module registers.
header | header received in a frame.
data | data received in a frame.
maxPayloadLength | maximum payload length received in a frame.
Returns
None

Definition at line 186 of file IfxEray.c.

Referenced by IfxEray_Eray_readFrame().

◆ IfxEray_receiveData()

IFX_INLINE void IfxEray_receiveData | ( | Ifx_ERAY * | eray,
 |  | boolean | dataReceived
 | ) |  |

requests to receive data from message buffer.

Parameters
eray | pointer to ERAY module registers.
dataReceived | whether data to be received or not.
Returns
None

Definition at line 1437 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame(), and IfxEray_Eray_receiveFrame().

◆ IfxEray_sendData()

IFX_INLINE void IfxEray_sendData | ( | Ifx_ERAY * | eray,
 |  | boolean | dataTransfered
 | ) |  |

sets the bit to send data in frame.

Parameters
eray | pointer to ERAY module registers.
dataTransfered | whether data transfered or not.
Returns
None

Definition at line 1449 of file IfxEray.h.

Referenced by IfxEray_Eray_transmitFrame().

◆ IfxEray_setSlot()

IFX_EXTERN void IfxEray_setSlot | ( | Ifx_ERAY * | eray,
 |  | const IfxEray_Header * | header,
 |  | const uint32 * | data,
 |  | const IfxEray_SlotConfig * | slotConfig
 | ) |  |

Writes header and data to Input buffers and set the slots.

Parameters
eray | pointer to ERAY module registers.
header | Header section of message buffer.
data | data section of message buffer.
slotConfig | pointer slot allocation configuration structure.
Returns
None

Definition at line 278 of file IfxEray.c.

Referenced by IfxEray_Eray_bufferReconfig(), and IfxEray_Eray_Node_initMessageRAM().

◆ IfxEray_writeData()

IFX_EXTERN void IfxEray_writeData | ( | Ifx_ERAY * | eray,
 |  | const uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Writes data section of a frame to input data registers.

Parameters
eray | pointer to ERAY module registers.
data | data segment in a frame.
payloadLength | payload length configured for slot buffer.
Returns
None

Definition at line 331 of file IfxEray.c.

Referenced by IfxEray_Eray_writeData(), and IfxEray_setSlot().


iLLD_TC26B: ERAY Pin Mapping

Data Structures | Macros | Variables
ERAY Pin Mapping
iLLD » ERAY
Collaboration diagram for ERAY Pin Mapping:

Data Structures

struct | IfxEray_Rxd_In
RXD pin mapping structure. More...
struct | IfxEray_Txd_Out
TXD pin mapping structure. More...
struct | IfxEray_Txen_Out
TXEN pin mapping structure. More...

Macros

#define | IFXERAY_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXERAY_PINMAP_NUM_NODES 2
#define | IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
ERAY_RXDA0: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
ERAY_RXDA1: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
ERAY_RXDA2: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
ERAY_RXDA3: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
ERAY_RXDB0: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
ERAY_RXDB1: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
ERAY_RXDB2: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
ERAY_RXDB3: ERAY input. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table. More...
IFX_EXTERN const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table. More...
IFX_EXTERN const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Rxd_In

struct IfxEray_Rxd_In

RXD pin mapping structure.

Definition at line 39 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Rxd_In:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEray_Txd_Out

struct IfxEray_Txd_Out

TXD pin mapping structure.

Definition at line 48 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Txd_Out:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEray_Txen_Out

struct IfxEray_Txen_Out

TXEN pin mapping structure.

Definition at line 57 of file IfxEray_PinMap.h.

Collaboration diagram for IfxEray_Txen_Out:
[legend]
Data Fields
Ifx_ERAY * | module | Base address.
IfxEray_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXERAY_PINMAP_NUM_MODULES

#define IFXERAY_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 91 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_NUM_NODES

#define IFXERAY_PINMAP_NUM_NODES 2

Definition at line 92 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_RXD_IN_NUM_ITEMS

#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4

Definition at line 93 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4

Definition at line 94 of file IfxEray_PinMap.h.

◆ IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS

#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Definition at line 95 of file IfxEray_PinMap.h.

Variable Documentation

◆ IfxEray0_RXDA0_P14_8_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN

ERAY_RXDA0: ERAY input.

Definition at line 65 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA1_P11_9_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN

ERAY_RXDA1: ERAY input.

Definition at line 66 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA2_P02_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN

ERAY_RXDA2: ERAY input.

Definition at line 67 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDA3_P14_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN

ERAY_RXDA3: ERAY input.

Definition at line 68 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB0_P14_7_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN

ERAY_RXDB0: ERAY input.

Definition at line 69 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB1_P11_10_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN

ERAY_RXDB1: ERAY input.

Definition at line 70 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB2_P02_3_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN

ERAY_RXDB2: ERAY input.

Definition at line 71 of file IfxEray_PinMap.h.

◆ IfxEray0_RXDB3_P14_1_IN

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN

ERAY_RXDB3: ERAY input.

Definition at line 72 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P02_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT

ERAY_TXDA: ERAY output.

Definition at line 73 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P11_3_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT

ERAY_TXDA: ERAY output.

Definition at line 74 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P14_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT

ERAY_TXDA: ERAY output.

Definition at line 75 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDA_P14_10_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT

ERAY_TXDA: ERAY output.

Definition at line 76 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P02_2_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT

ERAY_TXDB: ERAY output.

Definition at line 77 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P11_12_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT

ERAY_TXDB: ERAY output.

Definition at line 78 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P14_0_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT

ERAY_TXDB: ERAY output.

Definition at line 79 of file IfxEray_PinMap.h.

◆ IfxEray0_TXDB_P14_5_OUT

IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT

ERAY_TXDB: ERAY output.

Definition at line 80 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P02_4_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT

ERAY_TXENA: ERAY output.

Definition at line 81 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P11_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT

ERAY_TXENA: ERAY output.

Definition at line 82 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENA_P14_9_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT

ERAY_TXENA: ERAY output.

Definition at line 83 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P02_5_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT

ERAY_TXENB: ERAY output.

Definition at line 84 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P11_11_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT

ERAY_TXENB: ERAY output.

Definition at line 85 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P11_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT

ERAY_TXENB: ERAY output.

Definition at line 86 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P14_6_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT

ERAY_TXENB: ERAY output.

Definition at line 87 of file IfxEray_PinMap.h.

◆ IfxEray0_TXENB_P14_9_OUT

IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT

ERAY_TXENB: ERAY output.

Definition at line 88 of file IfxEray_PinMap.h.

◆ IfxEray_Rxd_In_pinTable

IFX_EXTERN const IfxEray_Rxd_In* IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]

IfxEray_Rxd_In table.

Definition at line 99 of file IfxEray_PinMap.h.

◆ IfxEray_Txd_Out_pinTable

IFX_EXTERN const IfxEray_Txd_Out* IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]

IfxEray_Txd_Out table.

Definition at line 102 of file IfxEray_PinMap.h.

◆ IfxEray_Txen_Out_pinTable

IFX_EXTERN const IfxEray_Txen_Out* IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]

IfxEray_Txen_Out table.

Definition at line 105 of file IfxEray_PinMap.h.


iLLD_TC26B: How to use the ERAY Interface driver?

How to use the ERAY Interface driver?
iLLD » ERAY
Collaboration diagram for How to use the ERAY Interface driver?:

Preparation

Include Files

Include following header file into your C code:

#include <Eray/Eray/IfxEray_Eray.h>
#include <Scu/Std/IfxScuWdt.h>
#include <eray_commands.h>

Defines

// Number of tested communication cycles
#define NUMBER_ERAY_COMM_CYCLES 8
#define NO_OF_SLOTS 2

Variables

// global variables
static IfxEray_Eray eray;
volatile unsigned receivedDataCounter;
uint32 receivedData[NUMBER_ERAY_COMM_CYCLES][NO_OF_SLOTS];

Interrupt Handler Installation

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

#define IFX_ERAY_INT0_PRIO 1
#define IFX_ERAY_INT1_PRIO 2
#define IFX_ERAY_NDAT0_PRIO 3
#define IFX_ERAY_NDAT1_PRIO 4
#define IFX_ERAY_MBSC0_PRIO 5
#define IFX_ERAY_MBSC1_PRIO 6

Add the interrupt service routine to your C code. It has to call the ERAY interrupt handler:

// ISR routines for interrupt handling
void ERAY_irqInt0Handler();
void ERAY_irqInt1Handler();
void ERAY_irqNdat0Handler();
void ERAY_irqNdat1Handler();
void ERAY_irqMbsc0Handler();
void ERAY_irqMbsc1Handler();
IFX_INTERRUPT(eray0Int0ISR, 0, IFX_ERAY_INT0_PRIO)
{
ERAY_irqInt0Handler();
}
IFX_INTERRUPT(eray0Int1ISR, 0, IFX_ERAY_INT1_PRIO)
{
ERAY_irqInt1Handler();
}
IFX_INTERRUPT(eray0Ndat0ISR, 0, IFX_ERAY_NDAT0_PRIO)
{
ERAY_irqNdat0Handler();
}
IFX_INTERRUPT(eray0Ndat1ISR, 0, IFX_ERAY_NDAT1_PRIO)
{
ERAY_irqNdat1Handler();
}
IFX_INTERRUPT(eray0Mbsc0ISR, 0, IFX_ERAY_MBSC0_PRIO)
{
ERAY_irqMbsc0Handler();
}
IFX_INTERRUPT(eray0Mbsc1ISR, 0, IFX_ERAY_MBSC1_PRIO)
{
ERAY_irqMbsc1Handler();
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&eray0Int0ISR, IFX_ERAY_INT0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Int1ISR, IFX_ERAY_INT1_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Ndat0ISR, IFX_ERAY_NDAT0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Ndat1ISR, IFX_ERAY_NDAT1_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Mbsc0ISR, IFX_ERAY_MBSC0_PRIO);
IfxCpu_Irq_installInterruptHandler(&eray0Mbsc1ISR, IFX_ERAY_MBSC1_PRIO);
// enable all cpu0 interrupts
IfxCpu_enableInterrupts();

Module Initialisation

First ensure that the ERAY PLL is configured to output a 80 MHz clock for the ERAY module:

// initialize Eray PLL
//clib_ver_printf("Initialize ERAY PLL\n");
{
IfxScuCcu_ErayPllConfig ErayPllConfig;
IfxScuCcu_initErayPllConfig(&ErayPllConfig);
result |= IfxScuCcu_initErayPll(&ErayPllConfig);
}

Thereafter initialize the module:

// create module config
IfxEray_Eray_Config erayModuleConfig;
#if TEST_ERAY1
//clib_ver_printf("Initialize ERAY1\n");
IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY1);
#else
//clib_ver_printf("Initialize ERAY0\n");
IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY0);
#endif
// ISR priorities
erayModuleConfig.interrupt.int0Priority = IFX_ERAY_INT0_PRIO;
erayModuleConfig.interrupt.int1Priority = IFX_ERAY_INT1_PRIO;
erayModuleConfig.interrupt.ndat0Priority = IFX_ERAY_NDAT0_PRIO;
erayModuleConfig.interrupt.ndat1Priority = IFX_ERAY_NDAT1_PRIO;
erayModuleConfig.interrupt.mbsc0Priority = IFX_ERAY_MBSC0_PRIO;
erayModuleConfig.interrupt.mbsc1Priority = IFX_ERAY_MBSC1_PRIO;
// init module
IfxEray_Eray_initModule( &eray, &erayModuleConfig );

Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.

Node Initialisation

The node initialisation can be done in the same function.

// get ERAY node default configuration
IfxEray_Eray_NodeConfig nodeConfig;
IfxEray_Eray_Node_initConfig(&nodeConfig);
// configuration changes for interaction with external testbench element
{
// only for simulation: start external ERAY node
{
TbeMessage reply;
// start ERay Testbench Element
sendMessage(MSG_ID_TESTBENCH_ERAY, CMD_ERAY_TBE_START, 0 );
receiveMessageBlockingFrom(MSG_ID_TESTBENCH_ERAY, reply);
}
{
// SUCC1
IfxEray_Eray_Succ1Config *succ1 = &nodeConfig.controllerConfig.succ1Config;
succ1->clockSyncErrorHalt = FALSE;
}
{
// PRTC1
IfxEray_Eray_Prtc1Control *prtc1 = &nodeConfig.controllerConfig.prtc1Control;
prtc1->transmissionStartTime = 10;
prtc1->collisionAvoidanceDuration = 0;
prtc1->strobePosition = IfxEray_StrobePosition_5;
prtc1->baudrate = IfxEray_Baudrate_10;
prtc1->receiveWakeupTestDuration = 76;
prtc1->transmitWakeupRepetitions = 2;
}
{
// PRTC2
IfxEray_Eray_Prtc2Control *prtc2 = &nodeConfig.controllerConfig.prtc2Control;
prtc2->receiveWakeupIdleTime = 18;
prtc2->receiveWakeupLowTime = 18;
prtc2->transmitWakeupIdleTime = 180;
prtc2->transmitWakeupLowTime = 60;
}
{
// SUCC2
IfxEray_Eray_Succ2Config *succ2 = &nodeConfig.controllerConfig.succ2Config;
succ2->listenTimeOut = 2500;
succ2->listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16;
}
{
// GTU
IfxEray_Eray_GTUConfig *gtu = &nodeConfig.controllerConfig.gtuConfig;
gtu->gtu01Config.microticksPerCycle = 3000;
gtu->gtu02Config.macroticksPerCycle = 50;
gtu->gtu02Config.maxSyncFrames = 15;
gtu->gtu03Config.channelAMicrotickInitialOffset = 0;
gtu->gtu03Config.channelBMicrotickInitialOffset = 0;
gtu->gtu03Config.channelAMacrotickInitialOffset = 2;
gtu->gtu03Config.channelBMacrotickInitialOffset = 2;
gtu->gtu04Config.networkStartIdleTime = 0x2f;
gtu->gtu04Config.correctionOffset = 0x30;
gtu->gtu05Config.channelAReceptionDelay = 0x4;
gtu->gtu05Config.channelBReceptionDelay = 0x4;
gtu->gtu05Config.clusterDrift = 1;
gtu->gtu05Config.decodingCorrection = 0x34;
gtu->gtu06Config.acceptedStartupDeviation = 0x81;
gtu->gtu06Config.maxDriftOffset = 0x31;
gtu->gtu07Config.staticSlotLength = 0x10;
gtu->gtu07Config.staticSlotsCount = 0x2;
gtu->gtu08Config.dynamicSlotLength = 2;
gtu->gtu08Config.dynamicSlotCount = 2;
gtu->gtu09Config.idleDynamicSlots = IfxEray_IdleDynamicSlots_1; // bug: not set by IfxEray_setDynamicSlots
gtu->gtu09Config.staticActionPoint = 1;
gtu->gtu09Config.dynamicActionPoint = 1;
gtu->gtu10Config.maxOffsetCorrection = 0xcd;
gtu->gtu10Config.maxRateCorrection = 0x31;
gtu->gtu11Config.externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0;
gtu->gtu11Config.externalRateCorrection = IfxEray_ExternalRateCorrection_0;
gtu->gtu11Config.externalOffset = IfxEray_ExternalOffset_noCorrection;
gtu->gtu11Config.externalRate = IfxEray_ExternalRate_noCorrection;
}
}
// Messages
nodeConfig.messageRAMConfig.numberOfMessageBuffers = 2;
nodeConfig.messageRAMConfig.firstDynamicBuffer = 0x40;
nodeConfig.messageRAMConfig.fifoBufferStartIndex = 0x40;
// Frame header
IfxEray_Header header[2] = {
// fid cyc cha chb buffer direction ppit transmission mode mbi pl dp startupfr syncfr
{ 1, 1, TRUE, TRUE, IfxEray_BufferDirection_transmit, TRUE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x30, TRUE, TRUE },
{ 2, 1, TRUE, TRUE, IfxEray_BufferDirection_receive, FALSE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x40, FALSE, FALSE },
};
// slot buffer
IfxEray_SlotConfig slot[2] = {
// header data stxrh buffNum
{ TRUE, TRUE, TRUE, 0 },
{ TRUE, FALSE, FALSE, 1 },
};
for(int i=0; i < 2; ++i) {
nodeConfig.messageRAMConfig.header[i] = &header[i];
nodeConfig.messageRAMConfig.slotControl[i] = &slot[i];
nodeConfig.messageRAMConfig.data[i] = NULL_PTR;
}
#if TEST_ERAY1
// channel A pins
const IfxEray_Eray_NodeA nodeAPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray1_RXDA0_P14_8_IN, &IfxEray1_TXDA_P14_10_OUT,
&IfxEray1_TXENA_P14_9_OUT
};
// channel B pins
const IfxEray_Eray_NodeB nodeBPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray1_RXDB0_P14_7_IN, &IfxEray1_TXDB_P14_5_OUT,
&IfxEray1_TXENB_P14_6_OUT
};
#else
// channel A pins
const IfxEray_Eray_NodeA nodeAPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray0_RXDA0_P14_8_IN, &IfxEray0_TXDA_P14_10_OUT,
&IfxEray0_TXENA_P14_9_OUT
};
// channel B pins
const IfxEray_Eray_NodeB nodeBPins = {
IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
&IfxEray0_RXDB0_P14_7_IN, &IfxEray0_TXDB_P14_5_OUT,
&IfxEray0_TXENB_P14_6_OUT
};
#endif
const IfxEray_Eray_Pins pins = { (IfxEray_Eray_NodeA *)&nodeAPins, (IfxEray_Eray_NodeB *)&nodeBPins };
nodeConfig.pins = (IfxEray_Eray_Pins *)&pins;
// ERAY node initialisation with supplied configuration
IfxEray_Eray_Node_init(&eray, &nodeConfig);
// set interrupt outputs for data and message buffers
IfxEray_Eray_setNewDataInterruptDestination(&eray, 0, 0); // New Data #0 -> NDAT0
IfxEray_Eray_setNewDataInterruptDestination(&eray, 1, 1); // New Data #1 -> NDAT1
IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 0, 0); // Message Buffer #0 -> MBSC0
IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 1, 1); // Message Buffer #1 -> MBSC1
//clib_ver_printf("Send wakeup pattern\n");
// send wakeup pattern on default configured channel ( IfxEray_Channel_a )
IfxEray_PocState pocState;
do {
pocState = IfxEray_Eray_getPocState( &eray );
if ( pocState != IfxEray_PocState_wakeupListen ) {
while ( !IfxEray_Eray_changePocState( &eray, IfxEray_PocCommand_wakeup ));
}
} while ( pocState != IfxEray_PocState_wakeupListen );
// allow node to cold-start and wait until cold-start is successful
while( !IfxEray_Eray_allowColdStart(&eray) );
// start the communication in cluster and wait until communication is successfull
while( !IfxEray_Eray_startCommunication(&eray) );
// wait until communication Controller enters NORMAL_ACTIVE or NORMAL_PASSIVE state, exit if communication Controller enters HALT state.
do {
pocState = IfxEray_Eray_getPocState( &eray );
// if communication Controller enters HALT state, break the loop.
if( pocState == IfxEray_PocState_halt) {
break;
}
} while( !((pocState == IfxEray_PocState_normalActive) || (pocState == IfxEray_PocState_normalPassive)) );
// enter ALL_SLOTS mode when Communication Controller is in NORMAL_ACTIVE or NORMAL_PASSIVE state only.
if ( pocState == IfxEray_PocState_normalActive || pocState == IfxEray_PocState_normalPassive ) {
while ( !IfxEray_Eray_setPocAllSlots(&eray) );
}

Transactions

unsigned prevReceivedDataCounter = 0;
while( 1 ) {
if( receivedDataCounter != prevReceivedDataCounter ) {
prevReceivedDataCounter = receivedDataCounter;
//clib_ver_printf("Received %d packets", receivedDataCounter);
if( receivedDataCounter >= NUMBER_ERAY_COMM_CYCLES )
break;
}
};

Interrupt Service Handlers

The ISR has to be implemented in the application. Following templates can be used to react on the events:

void ERAY_irqInt0Handler()
{
//clib_ver_note(1); // for debugging in simulation: notify Int0
Ifx_ERAY_EIR ErrIntStat = IfxEray_Eray_getErrorInterrupts( &eray );
Ifx_ERAY_SIR StatusIntStat = IfxEray_Eray_getStatusInterrupts( &eray );
if(StatusIntStat.B.SDS)
{
// SDS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sds );
}
if(StatusIntStat.B.CYCS)
{
// CYCS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_cycs );
}
if(StatusIntStat.B.SUCS)
{
// SUCS must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sucs );
}
if(StatusIntStat.B.TIBC)
{
// TIBC must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tibc );
}
if(ErrIntStat.B.MHF)
{
// clear flag MHF
IfxEray_Eray_clearErrorFlag( &eray, IfxEray_ClearErrorFlag_mhf );
}
}
void ERAY_irqInt1Handler()
{
//clib_ver_note(2); // for debugging in simulation: notify Int1
// TOBC must be cleared for getting the next interrupt
IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tobc );
}
void ERAY_irqNdat0Handler()
{
//clib_ver_note(3); // for debugging in simulation: notify Ndat0
}
void ERAY_irqNdat1Handler()
{
//clib_ver_note(4); // for debugging in simulation: notify Ndat1
// message received in slot1 buffer?
if( IfxEray_Eray_getNewDataInterruptStatus(&eray, 1) == 1 )
{
// read data
uint32 data[2];
{
IfxEray_Eray_ReceiveControl config;
config.headerReceived = TRUE;
config.dataReceived = TRUE;
config.receiveRequested = TRUE;
config.swapRequested = TRUE;
config.bufferIndex = 1;
IfxEray_Eray_receiveFrame(&eray, &config);
IfxEray_Eray_readData(&eray, data, 2*2);
}
// display received data (Here received data has to be displayed)
//clib_ver_data(data[0]);
//clib_ver_data(data[1]);
// store received data
if( receivedDataCounter < NUMBER_ERAY_COMM_CYCLES ) {
receivedData[receivedDataCounter][0] = data[0];
receivedData[receivedDataCounter][1] = data[1];
}
++receivedDataCounter;
// put some new data into slot0
++data[0];
++data[1];
{
IfxEray_Eray_TransmitControl config;
config.headerTransfered = FALSE;
config.dataTransfered = TRUE;
config.transferRequested = TRUE;
config.bufferIndex = 0;
IfxEray_Eray_writeData(&eray, data, 2*2);
IfxEray_Eray_transmitFrame(&eray, &config);
}
}
}
void ERAY_irqMbsc0Handler()
{
//clib_ver_note(5); // for debugging in simulation: notify Mbsc0
}
void ERAY_irqMbsc1Handler()
{
//clib_ver_note(6); // for debugging in simulation: notify Mbsc1
}


iLLD_TC26B: ERAY

Modules
ERAY
iLLD » ERAY
Collaboration diagram for ERAY:

Modules

Data Structures
Module Initialisation Functions
Node Initialisation Functions
Operative Functions
Status Functions
Interrupt Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ERAY » ERAY
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEray_Eray_Gtu01Config
GTU01 configuration. More...
struct | IfxEray_Eray_Gtu02Config
GTU02 configuration. More...
struct | IfxEray_Eray_Gtu03Config
GTU03 configuration. More...
struct | IfxEray_Eray_Gtu04Config
GTU04 configuration. More...
struct | IfxEray_Eray_Gtu05Config
GTU05 configuration. More...
struct | IfxEray_Eray_Gtu06Config
GTU06 configuration. More...
struct | IfxEray_Eray_Gtu07Config
GTU07 configuration. More...
struct | IfxEray_Eray_Gtu08Config
GTU08 configuration. More...
struct | IfxEray_Eray_Gtu09Config
GTU09 configuration. More...
struct | IfxEray_Eray_Gtu10Config
GTU10 configuration. More...
struct | IfxEray_Eray_Gtu11Config
GTU11 configuration. More...
struct | IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure. More...
struct | IfxEray_Eray_NodeA
Pins configuration structure for Node A. More...
struct | IfxEray_Eray_NodeB
Pins configuration structure for Node B. More...
struct | IfxEray_Eray_Prtc1Control
Protocol operation control properties. More...
struct | IfxEray_Eray_Prtc2Control
Wakeup symbol control properties. More...
struct | IfxEray_Eray_Succ1Config
communication controller control properties. More...
struct | IfxEray_Eray_Succ2Config
Communication listen timeout properties. More...
struct | IfxEray_Eray_Succ3Config
Clock correction fail properties. More...
struct | IfxEray_Eray_ControllerConfig
Communication Controller configuration structure. More...
struct | IfxEray_Eray_Interrupt
Interrupt control properties. More...
struct | IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure. More...
struct | IfxEray_Eray
ERAY Module handle. More...
struct | IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure. More...
struct | IfxEray_Eray_Config
Module configuration structure. More...
struct | IfxEray_Eray_NodeConfig
Node configuration structure. More...
struct | IfxEray_Eray_ReceiveControl
Receive control properties structure. More...
struct | IfxEray_Eray_ReceivedFrame
Received Frame. More...
struct | IfxEray_Eray_TransmitControl
Transfer control in a slot. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Eray_Gtu01Config

struct IfxEray_Eray_Gtu01Config

GTU01 configuration.

Definition at line 516 of file IfxEray_Eray.h.

Data Fields
uint32 microticksPerCycle Duration of the communication cycle in Microticks.

◆ IfxEray_Eray_Gtu02Config

struct IfxEray_Eray_Gtu02Config

GTU02 configuration.

Definition at line 523 of file IfxEray_Eray.h.

Data Fields
uint16 | macroticksPerCycle | Duration of the communication cycle in Macroticks.
uint8 | maxSyncFrames | Maximum number of sync frames in a cluster.

◆ IfxEray_Eray_Gtu03Config

struct IfxEray_Eray_Gtu03Config

GTU03 configuration.

Definition at line 531 of file IfxEray_Eray.h.

Data Fields
uint8 | channelAMacrotickInitialOffset | difference between two adjacent static slots on channel A in macroticks.
uint8 | channelAMicrotickInitialOffset | difference between adjacent time reference points on channel A in microticks.
uint8 | channelBMacrotickInitialOffset | difference between two adjacent static slots on channel B in macroticks.
uint8 | channelBMicrotickInitialOffset | difference between adjacent time reference points on channel B in microticks.

◆ IfxEray_Eray_Gtu04Config

struct IfxEray_Eray_Gtu04Config

GTU04 configuration.

Definition at line 541 of file IfxEray_Eray.h.

Data Fields
uint16 | correctionOffset | offset correction start point.
uint16 | networkStartIdleTime | starting point of Network Idle Time Phase.

◆ IfxEray_Eray_Gtu05Config

struct IfxEray_Eray_Gtu05Config

GTU05 configuration.

Definition at line 549 of file IfxEray_Eray.h.

Data Fields
uint8 | channelAReceptionDelay | reception delay on channel A.
uint8 | channelBReceptionDelay | reception delay on channel B.
uint8 | clusterDrift | cluster drift damping value used in clock synchronization.
uint8 | decodingCorrection | decoding correction to determine the primary time reference point.

◆ IfxEray_Eray_Gtu06Config

struct IfxEray_Eray_Gtu06Config

GTU06 configuration.

Definition at line 559 of file IfxEray_Eray.h.

Data Fields
uint16 | acceptedStartupDeviation | expanded range of measured deviation for startup Frames during integration.
uint16 | maxDriftOffset | maximum drift offset between two nodes.

◆ IfxEray_Eray_Gtu07Config

struct IfxEray_Eray_Gtu07Config

GTU07 configuration.

Definition at line 567 of file IfxEray_Eray.h.

Data Fields
uint16 | staticSlotLength | duration of static slot in macroticks.
uint16 | staticSlotsCount | number of static slots in a communication cycle.

◆ IfxEray_Eray_Gtu08Config

struct IfxEray_Eray_Gtu08Config

GTU08 configuration.

Definition at line 575 of file IfxEray_Eray.h.

Data Fields
uint16 | dynamicSlotCount | number of dynamic slots in a communication cycle.
uint8 | dynamicSlotLength | duration of dynamic slot in macroticks.

◆ IfxEray_Eray_Gtu09Config

struct IfxEray_Eray_Gtu09Config

GTU09 configuration.

Definition at line 583 of file IfxEray_Eray.h.

Data Fields
uint8 | dynamicActionPoint | dynamic slots action point.
IfxEray_IdleDynamicSlots | idleDynamicSlots | duration of dynamic slot idle phase.
uint8 | staticActionPoint | static slots and symbol window action point.

◆ IfxEray_Eray_Gtu10Config

struct IfxEray_Eray_Gtu10Config

GTU10 configuration.

Definition at line 592 of file IfxEray_Eray.h.

Data Fields
uint16 | maxOffsetCorrection | maximum offset correction to be applied by the internal clock synchronization algorithm.
uint16 | maxRateCorrection | maximum rate correction to be applied by the internal clock synchronization algorithm.

◆ IfxEray_Eray_Gtu11Config

struct IfxEray_Eray_Gtu11Config

GTU11 configuration.

Definition at line 600 of file IfxEray_Eray.h.

Data Fields
IfxEray_ExternalOffset | externalOffset | External offset correction control.
IfxEray_ExternalOffsetCorrection | externalOffsetCorrection | External clock offset correction value.
IfxEray_ExternalRate | externalRate | External rate correction control.
IfxEray_ExternalRateCorrection | externalRateCorrection | External clock rate correction value.

◆ IfxEray_Eray_GTUConfig

struct IfxEray_Eray_GTUConfig

Gloabl Timing Unit configuration structure.

Definition at line 614 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_GTUConfig:
[legend]
Data Fields
IfxEray_Eray_Gtu01Config | gtu01Config | GTU01 configuration.
IfxEray_Eray_Gtu02Config | gtu02Config | GTU02 configuration.
IfxEray_Eray_Gtu03Config | gtu03Config | GTU03 configuration.
IfxEray_Eray_Gtu04Config | gtu04Config | GTU04 configuration.
IfxEray_Eray_Gtu05Config | gtu05Config | GTU05 configuration.
IfxEray_Eray_Gtu06Config | gtu06Config | GTU06 configuration.
IfxEray_Eray_Gtu07Config | gtu07Config | GTU07 configuration.
IfxEray_Eray_Gtu08Config | gtu08Config | GTU08 configuration.
IfxEray_Eray_Gtu09Config | gtu09Config | GTU09 configuration.
IfxEray_Eray_Gtu10Config | gtu10Config | GTU10 configuration.
IfxEray_Eray_Gtu11Config | gtu11Config | GTU11 configuration.

◆ IfxEray_Eray_NodeA

struct IfxEray_Eray_NodeA

Pins configuration structure for Node A.

Definition at line 631 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeA:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | the pad driver mode which should be configured.
IFX_CONST IfxEray_Rxd_In * | rxIn | the RX Pin which should be configured.
IfxPort_InputMode | rxInMode | the RX pin input mode which should be configured
IFX_CONST IfxEray_Txen_Out * | txEnOut | the TXEN Pin which should be configured.
IfxPort_OutputMode | txEnOutMode | the TXEN pin output mode which should be configured.
IFX_CONST IfxEray_Txd_Out * | txOut | the TX Pin which should be configured.
IfxPort_OutputMode | txOutMode | the TX pin output mode which should be configured.

◆ IfxEray_Eray_NodeB

struct IfxEray_Eray_NodeB

Pins configuration structure for Node B.

Definition at line 644 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeB:
[legend]
Data Fields
IfxPort_PadDriver | pinDriver | the pad driver mode which should be configured.
IFX_CONST IfxEray_Rxd_In * | rxIn | the RX Pin which should be configured.
IfxPort_InputMode | rxInMode | the RX pin input mode which should be configured
IFX_CONST IfxEray_Txen_Out * | txEnOut | the TXEN Pin which should be configured.
IfxPort_OutputMode | txEnOutMode | the TXEN pin output mode which should be configured.
IFX_CONST IfxEray_Txd_Out * | txOut | the TX Pin which should be configured.
IfxPort_OutputMode | txOutMode | the TX pin output mode which should be configured.

◆ IfxEray_Eray_Prtc1Control

struct IfxEray_Eray_Prtc1Control

Protocol operation control properties.

Definition at line 657 of file IfxEray_Eray.h.

Data Fields
IfxEray_Baudrate | baudrate | baud rate on the flexray bus.
uint8 | collisionAvoidanceDuration | accepted duration of collision avoidance symbol.
uint8 | receiveWakeupTestDuration | duration of received wakeup pattern in bit times.
IfxEray_StrobePosition | strobePosition | sample count value for strobing.
uint16 | transmissionStartTime | duration of transmission start time.
uint8 | transmitWakeupRepetitions | duration of transmitted wakeup pattern in bit times.

◆ IfxEray_Eray_Prtc2Control

struct IfxEray_Eray_Prtc2Control

Wakeup symbol control properties.

Definition at line 669 of file IfxEray_Eray.h.

Data Fields
uint8 | receiveWakeupIdleTime | duration of received wakeup symbol idle phase.
uint8 | receiveWakeupLowTime | duration of received wakeup symbol low phase.
uint8 | transmitWakeupIdleTime | duration of transmit wakeup symbol idle phase.
uint8 | transmitWakeupLowTime | duration of transmit wakeup symbol low phase.

◆ IfxEray_Eray_Succ1Config

struct IfxEray_Eray_Succ1Config

communication controller control properties.

Definition at line 679 of file IfxEray_Eray.h.

Data Fields
boolean | channelAConnectedNode | whether the node is connected to channel A.
boolean | channelASymbolTransmitted | selects channel A for MTS symbol transmission.
boolean | channelBConnectedNode | whether the node is connected to channel B.
boolean | channelBSymbolTransmitted | selects channel B for MTS symbol transmission
boolean | clockSyncErrorHalt | transition to HALT state due to a clock synchronization error.
uint8 | maxColdStartAttempts | maximum number of attempts that a cold starting node is permitted.
uint8 | numberOfCyclePairsForActive | number of even / odd cycle pairs that must have valid clock correction terms.
boolean | startupFrameTransmitted | whether the key slot is used to transmit startup Frames.
boolean | syncFrameTransmitted | whether the key slot is used to transmit SYNC Frames.
IfxEray_TransmissionSlotMode | transmissionSlotMode | Initial transmission mode.
IfxEray_WakeupChannel | wakeupPatternChannel | Wakeup pattern carry channel.

◆ IfxEray_Eray_Succ2Config

struct IfxEray_Eray_Succ2Config

Communication listen timeout properties.

Definition at line 696 of file IfxEray_Eray.h.

Data Fields
uint32 | listenTimeOut | wakeup or startup listen timeout in microticks.
IfxEray_ListenTimeOutNoise | listenTimeOutNoise | upper limit for startup and wakeup listen timeout in the presence of noise.

◆ IfxEray_Eray_Succ3Config

struct IfxEray_Eray_Succ3Config

Clock correction fail properties.

Definition at line 704 of file IfxEray_Eray.h.

Data Fields
uint8 | clockCorrectionCyclesHalt | maximum number of cycles missing clock correctionlead to active or passive to halt.
uint8 | clockCorrectionCyclesPassive | maximum number of cycles missing clock correction lead active to passive state.

◆ IfxEray_Eray_ControllerConfig

struct IfxEray_Eray_ControllerConfig

Communication Controller configuration structure.

Definition at line 716 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_ControllerConfig:
[legend]
Data Fields
IfxEray_Eray_GTUConfig | gtuConfig | gloabl timing unit configuration structure.
uint8 | latestTransmissionStart | number of dynamic slots before inhibit frame transmission in dynamic segment.
uint32 | networkVectorLength | length of network management vector.
IfxEray_Eray_Prtc1Control | prtc1Control | protocol operation control properties.
IfxEray_Eray_Prtc2Control | prtc2Control | wakeup symbol control properties.
uint8 | staticFramepayload | payload length of static frame in double bytes.
IfxEray_Eray_Succ1Config | succ1Config | communication controller control properties.
IfxEray_Eray_Succ2Config | succ2Config | communication listen timeout properties.
IfxEray_Eray_Succ3Config | succ3Config | clock correction fail properties.

◆ IfxEray_Eray_Interrupt

struct IfxEray_Eray_Interrupt

Interrupt control properties.

Definition at line 731 of file IfxEray_Eray.h.

Data Fields
IfxSrc_Tos | ibusyIsrProvider | the input buffer interrupt service provider. CPU or DMA.
uint16 | ibusyPriority | the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | int0IsrProvider | the interrupt line 0 service provider. CPU or DMA.
uint16 | int0Priority | the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | int1IsrProvider | the interrupt line 1 service provider. CPU or DMA.
uint16 | int1Priority | the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | mbsc0IsrProvider | the message buffer status changed interrupt 0 service provider. CPU or DMA.
uint16 | mbsc0Priority | the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | mbsc1IsrProvider | the message buffer status changed interrupt 1 service provider. CPU or DMA.
uint16 | mbsc1Priority | the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | ndat0IsrProvider | the new data interrupt 0 service provider. CPU or DMA.
uint16 | ndat0Priority | the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | ndat1IsrProvider | the new data interrupt 1 service provider. CPU or DMA.
uint16 | ndat1Priority | the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | obusyIsrProvider | the output buffer interrupt service provider. CPU or DMA.
uint16 | obusyPriority | the output buffer interrupt priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | tint0IsrProvider | the timer interrupt line 0 service provider. CPU or DMA.
uint16 | tint0Priority | the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
IfxSrc_Tos | tint1IsrProvider | the timer interrupt line 1 service provider. CPU or DMA.
uint16 | tint1Priority | the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.

◆ IfxEray_Eray_MessageRAMConfig

struct IfxEray_Eray_MessageRAMConfig

Message RAM configuration structure.

Definition at line 757 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_MessageRAMConfig:
[legend]
Data Fields
boolean | bufferReconfigEnabled | whether reconfiguration of message buffers is enabled or not.
uint32 * | data[128] | data section of message buffer.
uint32 | fifoBufferStartIndex | message buffers assigned FIFO.
boolean | fifoConfigured | Whether receive FIFO configured or not.
uint8 | fifoDepth | fifo critical level.
boolean | fifoNullFramesRejected | whether null frames stored in fifo or not.
uint8 | filteredCycleNumber | the cycle set to which Frame ID and channel rejection filter are applied.
uint8 | firstDynamicBuffer | first dynamic buffer index.
uint16 | frameIdFilter | Frame ID used for rejection filtering.
IfxEray_Header * | header[128] | Header section of message buffer.
uint8 | numberOfMessageBuffers | last configured buffer.
IfxEray_ReceiveChannel | receiveChannel | FIFO receive channel.
uint16 | rejectedFrameId | frame ID to be rejected by the FIFO.
IfxEray_SlotConfig * | slotControl[128] | Transmit control properties.
boolean | staticFifoDisabled | fifo is not used in static segment.

◆ IfxEray_Eray

struct IfxEray_Eray

ERAY Module handle.

Definition at line 794 of file IfxEray_Eray.h.

Data Fields
Ifx_ERAY * eray pointer to ERAY module registers.

◆ IfxEray_Eray_BufferReconfig

struct IfxEray_Eray_BufferReconfig

Reconfigurable buffer structure.

Definition at line 801 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_BufferReconfig:
[legend]
Data Fields
uint32 | data[64] | data section of a reconfigurable buffer.
IfxEray_Header * | header | header of a reconfigurable buffer.
IfxEray_SlotConfig * | slotControl | message buffer configuration in message RAM.

◆ IfxEray_Eray_Config

struct IfxEray_Eray_Config

Module configuration structure.

Definition at line 810 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_Config:
[legend]
Data Fields
IfxEray_Eray_Interrupt | interrupt | Interrupt control properties.
Ifx_ERAY * | module | pointer to ERAY module registers.

◆ IfxEray_Eray_NodeConfig

struct IfxEray_Eray_NodeConfig

Node configuration structure.

Definition at line 818 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_NodeConfig:
[legend]
Data Fields
IfxEray_Eray_ControllerConfig | controllerConfig | Communication Controller configuration structure.
IfxEray_Eray_MessageRAMConfig | messageRAMConfig | Message RAM configuration structure.
IFX_CONST IfxEray_Eray_Pins * | pins | Pins configuration structure.

◆ IfxEray_Eray_ReceiveControl

struct IfxEray_Eray_ReceiveControl

Receive control properties structure.

Definition at line 827 of file IfxEray_Eray.h.

Data Fields
uint8 | bufferIndex | buffer index in the Message RAM.
boolean | dataReceived | whether data selected for transfer from Message RAM to Output Buffer or not.
boolean | headerReceived | whether header selected for transfer from Message RAM to Output Buffer or not.
boolean | receiveRequested |
boolean | swapRequested | whether output buffer shadow and output buffer host are swapped or not.

◆ IfxEray_Eray_ReceivedFrame

struct IfxEray_Eray_ReceivedFrame

Received Frame.

Definition at line 838 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_ReceivedFrame:
[legend]
Data Fields
uint32 | data[64] | received data in a frame.
IfxEray_ReceivedHeader | header | received header in a frame.

◆ IfxEray_Eray_TransmitControl

struct IfxEray_Eray_TransmitControl

Transfer control in a slot.

Definition at line 846 of file IfxEray_Eray.h.

Data Fields
uint8 | bufferIndex | buffer index which gives slot for transfers.
boolean | dataTransfered | whether data section of message buffer is transfered or not.
boolean | headerTransfered | whether header section of frame is transfered or not.
boolean | transferRequested | whether frame in a slot is transfered or not.


iLLD_TC26B: Module Initialisation Functions

Functions
Module Initialisation Functions
iLLD » ERAY » ERAY
Collaboration diagram for Module Initialisation Functions:

Functions

IFX_INLINE void | IfxEray_Eray_deInitModule (IfxEray_Eray *eray)
De-initialises the ERAY module. More...
IFX_EXTERN void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_deInitModule()

IFX_INLINE void IfxEray_Eray_deInitModule ( IfxEray_Eray * eray )

De-initialises the ERAY module.

Parameters
eray pointer to module handle.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1192 of file IfxEray_Eray.h.

◆ IfxEray_Eray_initModule()

IFX_EXTERN void IfxEray_Eray_initModule | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_Config * | config
 | ) |  |

Initialises the ERAY module with supplied configuration.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to module configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

NOTE: If not DMA, the interrupt service provider is assigned to the CPU ID where this function is called from

Definition at line 385 of file IfxEray_Eray.c.

◆ IfxEray_Eray_initModuleConfig()

IFX_EXTERN void IfxEray_Eray_initModuleConfig | ( | IfxEray_Eray_Config * | config,
 |  | Ifx_ERAY * | eray
 | ) |  |

Inialises the default module configuration buffer.

Parameters
config | pointer to module configuration structure.
eray | pointer ERAY module registers.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 487 of file IfxEray_Eray.c.


iLLD_TC26B: Node Initialisation Functions

Data Structures | Functions
Node Initialisation Functions
iLLD » ERAY » ERAY
Collaboration diagram for Node Initialisation Functions:

Data Structures

struct IfxEray_Eray_Pins
Pins configuration structure. More...

Functions

IFX_STATIC void | IfxEray_Eray_Node_initCommunicationController (IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller. More...
IFX_STATIC void | IfxEray_Eray_Node_initGTU (IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit. More...
IFX_STATIC void | IfxEray_Eray_Node_initMessageRAM (IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM. More...
IFX_EXTERN void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...

Detailed Description

Data Structure Documentation

◆ IfxEray_Eray_Pins

struct IfxEray_Eray_Pins

Pins configuration structure.

Definition at line 782 of file IfxEray_Eray.h.

Collaboration diagram for IfxEray_Eray_Pins:
[legend]
Data Fields
IFX_CONST IfxEray_Eray_NodeA * | nodeAPins | Pins configuration structure for Node A.
IFX_CONST IfxEray_Eray_NodeB * | nodeBPins | Pins configuration structure for Node B.

Function Documentation

◆ IfxEray_Eray_Node_init()

IFX_EXTERN void IfxEray_Eray_Node_init | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_NodeConfig * | config
 | ) |  |

Initialises the Node with supplied configuration.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to node configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 66 of file IfxEray_Eray.c.

◆ IfxEray_Eray_Node_initCommunicationController()

IFX_STATIC void IfxEray_Eray_Node_initCommunicationController | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_ControllerConfig * | config
 | ) |  |

Inialises the communication controller.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to communication controller config structure.
Returns
None

Definition at line 153 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_Eray_Node_initConfig()

IFX_EXTERN void IfxEray_Eray_Node_initConfig ( IfxEray_Eray_NodeConfig * config )

Initialises the default node configuration buffer.

Parameters
config pointer to node configuration structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 186 of file IfxEray_Eray.c.

◆ IfxEray_Eray_Node_initGTU()

IFX_STATIC void IfxEray_Eray_Node_initGTU | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_GTUConfig * | config
 | ) |  |

Initialises the Global Timing Unit.

Parameters
eray | pointer to ERAY Module handle.
config | global timing unit Configuration structure.
Returns
None

Definition at line 318 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_initCommunicationController().

◆ IfxEray_Eray_Node_initMessageRAM()

IFX_STATIC void IfxEray_Eray_Node_initMessageRAM | ( | IfxEray_Eray * | eray,
 |  | const IfxEray_Eray_MessageRAMConfig * | config
 | ) |  |

Inialises the message RAM.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to message RAM config structure.
Returns
None

Definition at line 342 of file IfxEray_Eray.c.

Referenced by IfxEray_Eray_Node_init().


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » ERAY » ERAY
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE boolean | IfxEray_Eray_allowColdStart (IfxEray_Eray *eray)
Allows node to enter the cold startup state. More...
IFX_INLINE void | IfxEray_Eray_bufferReconfig (IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot. More...
IFX_INLINE boolean | IfxEray_Eray_changePocState (IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status. More...
IFX_INLINE void | IfxEray_Eray_readData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_INLINE void | IfxEray_Eray_readFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer. More...
IFX_INLINE boolean | IfxEray_Eray_setPocAllSlots (IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode. More...
IFX_INLINE boolean | IfxEray_Eray_startCommunication (IfxEray_Eray *eray)
Runs the communication controller. More...
IFX_INLINE void | IfxEray_Eray_wakeUpChannel (IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster. More...
IFX_INLINE boolean | IfxEray_Eray_wakeUpCluster (IfxEray_Eray *eray)
Wakeups the node in a cluster. More...
IFX_INLINE void | IfxEray_Eray_writeData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_EXTERN void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
IFX_EXTERN void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
IFX_EXTERN void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_allowColdStart()

IFX_INLINE boolean IfxEray_Eray_allowColdStart ( IfxEray_Eray * eray )

Allows node to enter the cold startup state.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if cold start successful otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1161 of file IfxEray_Eray.h.

◆ IfxEray_Eray_bufferReconfig()

IFX_INLINE void IfxEray_Eray_bufferReconfig | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_BufferReconfig * | reconfigBuffer
 | ) |  |

Reconfiguring the buffer or changing the slot.

Parameters
eray | pointer to module handle.
reconfigBuffer | pointer reconfigurable buffer structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1167 of file IfxEray_Eray.h.

◆ IfxEray_Eray_changePocState()

IFX_INLINE boolean IfxEray_Eray_changePocState | ( | IfxEray_Eray * | eray,
 |  | IfxEray_PocCommand | PocCommand
 | ) |  |

Changes the POC state and return status.

Parameters
eray | pointer to module handle.
PocCommand | POC command to change state.
Returns
TRUE if command accepted.

Definition at line 1173 of file IfxEray_Eray.h.

◆ IfxEray_Eray_readData()

IFX_INLINE void IfxEray_Eray_readData | ( | IfxEray_Eray * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Reads the received data from output registers.

Parameters
eray | pointer to module handle.
data | pointer to received data buffer.
payloadLength | payload length received in a frame.
Returns
None

Definition at line 1243 of file IfxEray_Eray.h.

◆ IfxEray_Eray_readFrame()

IFX_INLINE void IfxEray_Eray_readFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceivedFrame * | frame,
 |  | Ifx_SizeT | maxPayloadLength
 | ) |  |

reads the frame received in a buffer.

Parameters
eray | pointer to module handle.
frame | received frame in a buffer.
maxPayloadLength | maximum payload length received in a frame.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1249 of file IfxEray_Eray.h.

◆ IfxEray_Eray_receiveFifoFrame()

IFX_EXTERN void IfxEray_Eray_receiveFifoFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceiveControl * | config
 | ) |  |

Transfers frame from fifo in message RAM to Output buffer.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to receive control structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 514 of file IfxEray_Eray.c.

◆ IfxEray_Eray_receiveFrame()

IFX_EXTERN void IfxEray_Eray_receiveFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_ReceiveControl * | config
 | ) |  |

Transfers header and data from message buffer to output buffer.

Parameters
eray | pointer to ERAY Module handle.
config | pointer to receive control structure.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 550 of file IfxEray_Eray.c.

◆ IfxEray_Eray_setPocAllSlots()

IFX_INLINE boolean IfxEray_Eray_setPocAllSlots ( IfxEray_Eray * eray )

Sets the Controller state to ALL Slots mode.

Parameters
eray pointer to module handle.
Returns
TRUE if All slots mode is successful otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1267 of file IfxEray_Eray.h.

◆ IfxEray_Eray_startCommunication()

IFX_INLINE boolean IfxEray_Eray_startCommunication ( IfxEray_Eray * eray )

Runs the communication controller.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if communication started otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1273 of file IfxEray_Eray.h.

◆ IfxEray_Eray_transmitFrame()

IFX_EXTERN void IfxEray_Eray_transmitFrame | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Eray_TransmitControl * | transmitControl
 | ) |  |

Transfers the frame in given slot.

Parameters
eray | pointer to module handle.
transmitControl | transmits frame in a given slot.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 572 of file IfxEray_Eray.c.

◆ IfxEray_Eray_wakeUpChannel()

IFX_INLINE void IfxEray_Eray_wakeUpChannel | ( | IfxEray_Eray * | eray,
 |  | IfxEray_Channel | channel
 | ) |  |

Wakeups the channel in a cluster.

Parameters
eray | pointer to ERAY Module handle.
channel | wakeup channel Id.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1279 of file IfxEray_Eray.h.

◆ IfxEray_Eray_wakeUpCluster()

IFX_INLINE boolean IfxEray_Eray_wakeUpCluster ( IfxEray_Eray * eray )

Wakeups the node in a cluster.

Parameters
eray pointer to ERAY Module handle.
Returns
TRUE if cluster is wakeup otherwise FALSE.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1292 of file IfxEray_Eray.h.

◆ IfxEray_Eray_writeData()

IFX_INLINE void IfxEray_Eray_writeData | ( | IfxEray_Eray * | eray,
 |  | uint32 * | data,
 |  | uint8 | payloadLength
 | ) |  |

Writes data section of a frame to input data registers.

Parameters
eray | pointer to module handle.
data | data section in frame.
payloadLength | payload length configured for slot buffer.
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1298 of file IfxEray_Eray.h.


iLLD_TC26B: Status Functions

Functions
Status Functions
iLLD » ERAY » ERAY
Collaboration diagram for Status Functions:

Functions

IFX_INLINE IfxEray_PocState | IfxEray_Eray_getPocState (IfxEray_Eray *eray)
Gets the current node controller POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_Eray_getWakeupPatternReceivedChannel (IfxEray_Eray *eray)
Gets the received wakeup pattern channel. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_getPocState()

IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState ( IfxEray_Eray * eray )

Gets the current node controller POC state.

Parameters
eray pointer to module handle.
Returns
current POC state.

Definition at line 1221 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getWakeupPatternReceivedChannel()

IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel ( IfxEray_Eray * eray )

Gets the received wakeup pattern channel.

Parameters
eray pointer to module handle.
Returns
received wakeup pattern channel.

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1234 of file IfxEray_Eray.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » ERAY » ERAY
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE void | IfxEray_Eray_clearErrorFlag (IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested. More...
IFX_INLINE void | IfxEray_Eray_clearStatusFlag (IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_Eray_getErrorInterrupts (IfxEray_Eray *eray)
Gets the error interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getMessageBufferInterruptStatus (IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getNewDataInterruptStatus (IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_Eray_getStatusInterrupts (IfxEray_Eray *eray)
Gets the node status interrupts. More...
IFX_INLINE void | IfxEray_Eray_setMessageBufferInterruptDestination (IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line. More...
IFX_INLINE void | IfxEray_Eray_setNewDataInterruptDestination (IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line. More...

Detailed Description

Function Documentation

◆ IfxEray_Eray_clearErrorFlag()

IFX_INLINE void IfxEray_Eray_clearErrorFlag | ( | IfxEray_Eray * | eray,
 |  | IfxEray_ClearErrorFlag | errorFlag
 | ) |  |

clears the error interrupt flag requested.

Parameters
eray | pointer to module handle.
errorFlag | error flag to be cleared.
Returns
None

Definition at line 1180 of file IfxEray_Eray.h.

◆ IfxEray_Eray_clearStatusFlag()

IFX_INLINE void IfxEray_Eray_clearStatusFlag | ( | IfxEray_Eray * | eray,
 |  | IfxEray_ClearStatusFlag | statusFlag
 | ) |  |

Clears the status interrupt flag requested.

Parameters
eray | pointer to module handle.
statusFlag | status flag to be cleared.
Returns
None

Definition at line 1186 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getErrorInterrupts()

IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts ( IfxEray_Eray * eray )

Gets the error interrupt status.

Parameters
eray pointer to module handle.
Returns
error interrupt status.

Definition at line 1199 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getMessageBufferInterruptStatus()

IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus | ( | IfxEray_Eray * | eray,
 |  | uint8 | messageBuffer
 | ) |  |

Gets the message buffer interrupt status.

Parameters
eray | pointer to module handle.
messageBuffer | message buffer to which interrupt status be checked.
Returns
message buffer interrupt status.

Definition at line 1207 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getNewDataInterruptStatus()

IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus | ( | IfxEray_Eray * | eray,
 |  | uint8 | ndat
 | ) |  |

Gets the new data interrupt buffers status.

Parameters
eray | pointer to module handle.
ndat | ndat buffer to which interrupt status be checked.
Returns
ndat buffer interrupt status.

Definition at line 1214 of file IfxEray_Eray.h.

◆ IfxEray_Eray_getStatusInterrupts()

IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts ( IfxEray_Eray * eray )

Gets the node status interrupts.

Parameters
eray pointer to module handle.
Returns
node status interrupts.

Definition at line 1227 of file IfxEray_Eray.h.

◆ IfxEray_Eray_setMessageBufferInterruptDestination()

IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination | ( | IfxEray_Eray * | eray,
 |  | uint8 | messageBuffer,
 |  | uint8 | messageBufferDestination
 | ) |  |

Enables the message buffer interrupt line.

Parameters
eray | pointer to module handle.
messageBuffer | message buffer interrupt which should be configured
messageBufferDestination | selects MBSC0 or MBSC1 interrupt output
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1255 of file IfxEray_Eray.h.

◆ IfxEray_Eray_setNewDataInterruptDestination()

IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination | ( | IfxEray_Eray * | eray,
 |  | uint8 | ndat,
 |  | uint8 | ndatDestination
 | ) |  |

Enables the NDAT buffer interrupt line.

Parameters
eray | pointer to module handle.
ndat | message buffer number configured to which ndat interrupt line to be set.
ndatDestination | selects NDAT0 or NDAT1 interrupt output
Returns
None

For usage exapmle see : How to use the ERAY Interface driver?

Definition at line 1261 of file IfxEray_Eray.h.


iLLD_TC26B: IfxEray_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxEray_cfg.h File Reference
iLLD » ERAY

ERAY on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxEray_reg.h"
Include dependency graph for IfxEray_cfg.h:

Go to the source code of this file.

Macros

#define | IFXERAY_NUM_MODULES (1)
#define | IFXERAY_NUM_SLOTS (128)
#define | IFXERAY_NUM_CHANNELS (2)

Enumerations

enum IfxEray_Index {
IfxEray_Index_none = -1,
IfxEray_Index_0 = 0
}
List of the available Eray resources. More...
enum IfxEray_NodeId {
IfxEray_NodeId_a = 0,
IfxEray_NodeId_b = 1,
IfxEray_NodeId_none = -1
}
Node Id in communication cycle. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

ERAY on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEray_cfg.h.

Macro Definition Documentation

◆ IFXERAY_NUM_CHANNELS

#define IFXERAY_NUM_CHANNELS (2)

Definition at line 52 of file IfxEray_cfg.h.

◆ IFXERAY_NUM_MODULES

#define IFXERAY_NUM_MODULES (1)

Definition at line 48 of file IfxEray_cfg.h.

Referenced by IfxEray_getAddress(), and IfxEray_getIndex().

◆ IFXERAY_NUM_SLOTS

#define IFXERAY_NUM_SLOTS (128)

Definition at line 50 of file IfxEray_cfg.h.


iLLD_TC26B: IfxEray_PinMap.c File Reference

  • _PinMap
Variables
IfxEray_PinMap.c File Reference
iLLD » ERAY

ERAY I/O map. More...

#include "IfxEray_PinMap.h"
Include dependency graph for IfxEray_PinMap.c:

Go to the source code of this file.

Variables

IfxEray_Rxd_In | IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a}
IfxEray_Rxd_In | IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b}
IfxEray_Rxd_In | IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c}
IfxEray_Rxd_In | IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d}
IfxEray_Rxd_In | IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a}
IfxEray_Rxd_In | IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b}
IfxEray_Rxd_In | IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c}
IfxEray_Rxd_In | IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d}
IfxEray_Txd_Out | IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3}
IfxEray_Txd_Out | IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6}
IfxEray_Txd_Out | IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4}
IfxEray_Txd_Out | IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4}
IfxEray_Txen_Out | IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2}
IfxEray_Txen_Out | IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6}
IfxEray_Txen_Out | IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5}
const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]

Detailed Description

ERAY I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEray_PinMap.c.

Variable Documentation

◆ IfxEray0_RXDA0_P14_8_IN

IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a}

Definition at line 28 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA1_P11_9_IN

IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b}

Definition at line 29 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA2_P02_1_IN

IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c}

Definition at line 30 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDA3_P14_1_IN

IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d}

Definition at line 31 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB0_P14_7_IN

IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a}

Definition at line 32 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB1_P11_10_IN

IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b}

Definition at line 33 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB2_P02_3_IN

IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c}

Definition at line 34 of file IfxEray_PinMap.c.

◆ IfxEray0_RXDB3_P14_1_IN

IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d}

Definition at line 35 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P02_0_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6}

Definition at line 36 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P11_3_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4}

Definition at line 37 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P14_0_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3}

Definition at line 38 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDA_P14_10_OUT

IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6}

Definition at line 39 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P02_2_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6}

Definition at line 40 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P11_12_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4}

Definition at line 41 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P14_0_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4}

Definition at line 42 of file IfxEray_PinMap.c.

◆ IfxEray0_TXDB_P14_5_OUT

IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6}

Definition at line 43 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P02_4_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6}

Definition at line 44 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P11_6_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4}

Definition at line 45 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENA_P14_9_OUT

IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6}

Definition at line 46 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P02_5_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6}

Definition at line 47 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P11_11_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6}

Definition at line 48 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P11_6_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2}

Definition at line 49 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P14_6_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6}

Definition at line 50 of file IfxEray_PinMap.c.

◆ IfxEray0_TXENB_P14_9_OUT

IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5}

Definition at line 51 of file IfxEray_PinMap.c.

◆ IfxEray_Rxd_In_pinTable

const IfxEray_Rxd_In* IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxEray0_RXDA0_P14_8_IN,
&IfxEray0_RXDA1_P11_9_IN,
&IfxEray0_RXDA2_P02_1_IN,
&IfxEray0_RXDA3_P14_1_IN
},
{
&IfxEray0_RXDB0_P14_7_IN,
&IfxEray0_RXDB1_P11_10_IN,
&IfxEray0_RXDB2_P02_3_IN,
&IfxEray0_RXDB3_P14_1_IN
}
}
}
IfxEray0_RXDB2_P02_3_IN
IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Definition: IfxEray_PinMap.c:34
IfxEray0_RXDB3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Definition: IfxEray_PinMap.c:35
IfxEray0_RXDB1_P11_10_IN
IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Definition: IfxEray_PinMap.c:33
IfxEray0_RXDA0_P14_8_IN
IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Definition: IfxEray_PinMap.c:28
IfxEray0_RXDA1_P11_9_IN
IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Definition: IfxEray_PinMap.c:29
IfxEray0_RXDA2_P02_1_IN
IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Definition: IfxEray_PinMap.c:30
IfxEray0_RXDA3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Definition: IfxEray_PinMap.c:31
IfxEray0_RXDB0_P14_7_IN
IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Definition: IfxEray_PinMap.c:32

Definition at line 54 of file IfxEray_PinMap.c.

◆ IfxEray_Txd_Out_pinTable

const IfxEray_Txd_Out* IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxEray0_TXDA_P02_0_OUT,
&IfxEray0_TXDA_P11_3_OUT,
&IfxEray0_TXDA_P14_0_OUT,
&IfxEray0_TXDA_P14_10_OUT
},
{
&IfxEray0_TXDB_P02_2_OUT,
&IfxEray0_TXDB_P11_12_OUT,
&IfxEray0_TXDB_P14_0_OUT,
&IfxEray0_TXDB_P14_5_OUT
}
}
}
IfxEray0_TXDA_P11_3_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Definition: IfxEray_PinMap.c:37
IfxEray0_TXDA_P02_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Definition: IfxEray_PinMap.c:36
IfxEray0_TXDB_P02_2_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Definition: IfxEray_PinMap.c:40
IfxEray0_TXDA_P14_10_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Definition: IfxEray_PinMap.c:39
IfxEray0_TXDB_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Definition: IfxEray_PinMap.c:42
IfxEray0_TXDB_P11_12_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Definition: IfxEray_PinMap.c:41
IfxEray0_TXDA_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Definition: IfxEray_PinMap.c:38
IfxEray0_TXDB_P14_5_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Definition: IfxEray_PinMap.c:43

Definition at line 71 of file IfxEray_PinMap.c.

◆ IfxEray_Txen_Out_pinTable

const IfxEray_Txen_Out* IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxEray0_TXENA_P02_4_OUT,
&IfxEray0_TXENA_P11_6_OUT,
&IfxEray0_TXENA_P14_9_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxEray0_TXENB_P02_5_OUT,
&IfxEray0_TXENB_P11_6_OUT,
&IfxEray0_TXENB_P11_11_OUT,
&IfxEray0_TXENB_P14_6_OUT,
&IfxEray0_TXENB_P14_9_OUT
}
}
}
IfxEray0_TXENB_P02_5_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
Definition: IfxEray_PinMap.c:47
IfxEray0_TXENB_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
Definition: IfxEray_PinMap.c:49
IfxEray0_TXENA_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
Definition: IfxEray_PinMap.c:45
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEray0_TXENB_P14_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
Definition: IfxEray_PinMap.c:50
IfxEray0_TXENA_P02_4_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
Definition: IfxEray_PinMap.c:44
IfxEray0_TXENB_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
Definition: IfxEray_PinMap.c:51
IfxEray0_TXENB_P11_11_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
Definition: IfxEray_PinMap.c:48
IfxEray0_TXENA_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
Definition: IfxEray_PinMap.c:46

Definition at line 88 of file IfxEray_PinMap.c.


iLLD_TC26B: IfxEray_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxEray_PinMap.h File Reference
iLLD » ERAY

ERAY I/O map. More...

#include <IfxEray_reg.h>
#include <_Impl/IfxEray_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxEray_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Rxd_In
RXD pin mapping structure. More...
struct | IfxEray_Txd_Out
TXD pin mapping structure. More...
struct | IfxEray_Txen_Out
TXEN pin mapping structure. More...

Macros

#define | IFXERAY_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXERAY_PINMAP_NUM_NODES 2
#define | IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
#define | IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
ERAY_RXDA0: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
ERAY_RXDA1: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
ERAY_RXDA2: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
ERAY_RXDA3: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
ERAY_RXDB0: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
ERAY_RXDB1: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
ERAY_RXDB2: ERAY input. More...
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
ERAY_RXDB3: ERAY input. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
ERAY_TXDA: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
ERAY_TXDB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
ERAY_TXENA: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
ERAY_TXENB: ERAY output. More...
IFX_EXTERN const IfxEray_Rxd_In * | IfxEray_Rxd_In_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table. More...
IFX_EXTERN const IfxEray_Txd_Out * | IfxEray_Txd_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table. More...
IFX_EXTERN const IfxEray_Txen_Out * | IfxEray_Txen_Out_pinTable [IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table. More...

Detailed Description

ERAY I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEray_PinMap.h.


iLLD_TC26B: IfxEray_Eray.h File Reference

  • Eray
  • Eray
Data Structures | Functions
IfxEray_Eray.h File Reference
iLLD » ERAY

ERAY ERAY details. More...

#include "Eray/Std/IfxEray.h"
#include "Cpu/Std/IfxCpu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxEray_Eray.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Eray_Gtu01Config
GTU01 configuration. More...
struct | IfxEray_Eray_Gtu02Config
GTU02 configuration. More...
struct | IfxEray_Eray_Gtu03Config
GTU03 configuration. More...
struct | IfxEray_Eray_Gtu04Config
GTU04 configuration. More...
struct | IfxEray_Eray_Gtu05Config
GTU05 configuration. More...
struct | IfxEray_Eray_Gtu06Config
GTU06 configuration. More...
struct | IfxEray_Eray_Gtu07Config
GTU07 configuration. More...
struct | IfxEray_Eray_Gtu08Config
GTU08 configuration. More...
struct | IfxEray_Eray_Gtu09Config
GTU09 configuration. More...
struct | IfxEray_Eray_Gtu10Config
GTU10 configuration. More...
struct | IfxEray_Eray_Gtu11Config
GTU11 configuration. More...
struct | IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure. More...
struct | IfxEray_Eray_NodeA
Pins configuration structure for Node A. More...
struct | IfxEray_Eray_NodeB
Pins configuration structure for Node B. More...
struct | IfxEray_Eray_Prtc1Control
Protocol operation control properties. More...
struct | IfxEray_Eray_Prtc2Control
Wakeup symbol control properties. More...
struct | IfxEray_Eray_Succ1Config
communication controller control properties. More...
struct | IfxEray_Eray_Succ2Config
Communication listen timeout properties. More...
struct | IfxEray_Eray_Succ3Config
Clock correction fail properties. More...
struct | IfxEray_Eray_ControllerConfig
Communication Controller configuration structure. More...
struct | IfxEray_Eray_Interrupt
Interrupt control properties. More...
struct | IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure. More...
struct | IfxEray_Eray_Pins
Pins configuration structure. More...
struct | IfxEray_Eray
ERAY Module handle. More...
struct | IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure. More...
struct | IfxEray_Eray_Config
Module configuration structure. More...
struct | IfxEray_Eray_NodeConfig
Node configuration structure. More...
struct | IfxEray_Eray_ReceiveControl
Receive control properties structure. More...
struct | IfxEray_Eray_ReceivedFrame
Received Frame. More...
struct | IfxEray_Eray_TransmitControl
Transfer control in a slot. More...

Functions

IFX_INLINE void | IfxEray_Eray_deInitModule (IfxEray_Eray *eray)
De-initialises the ERAY module. More...
IFX_EXTERN void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...
IFX_EXTERN void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
IFX_EXTERN void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...
IFX_INLINE boolean | IfxEray_Eray_allowColdStart (IfxEray_Eray *eray)
Allows node to enter the cold startup state. More...
IFX_INLINE void | IfxEray_Eray_bufferReconfig (IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot. More...
IFX_INLINE boolean | IfxEray_Eray_changePocState (IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status. More...
IFX_INLINE void | IfxEray_Eray_readData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_INLINE void | IfxEray_Eray_readFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer. More...
IFX_INLINE boolean | IfxEray_Eray_setPocAllSlots (IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode. More...
IFX_INLINE boolean | IfxEray_Eray_startCommunication (IfxEray_Eray *eray)
Runs the communication controller. More...
IFX_INLINE void | IfxEray_Eray_wakeUpChannel (IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster. More...
IFX_INLINE boolean | IfxEray_Eray_wakeUpCluster (IfxEray_Eray *eray)
Wakeups the node in a cluster. More...
IFX_INLINE void | IfxEray_Eray_writeData (IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_EXTERN void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
IFX_EXTERN void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
IFX_EXTERN void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...
IFX_INLINE IfxEray_PocState | IfxEray_Eray_getPocState (IfxEray_Eray *eray)
Gets the current node controller POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_Eray_getWakeupPatternReceivedChannel (IfxEray_Eray *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_Eray_clearErrorFlag (IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested. More...
IFX_INLINE void | IfxEray_Eray_clearStatusFlag (IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_Eray_getErrorInterrupts (IfxEray_Eray *eray)
Gets the error interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getMessageBufferInterruptStatus (IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status. More...
IFX_INLINE uint8 | IfxEray_Eray_getNewDataInterruptStatus (IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_Eray_getStatusInterrupts (IfxEray_Eray *eray)
Gets the node status interrupts. More...
IFX_INLINE void | IfxEray_Eray_setMessageBufferInterruptDestination (IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line. More...
IFX_INLINE void | IfxEray_Eray_setNewDataInterruptDestination (IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line. More...

Detailed Description

ERAY ERAY details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEray_Eray.h.


iLLD_TC26B: IfxEray.h File Reference

  • Eray
  • Std
Data Structures | Enumerations | Functions
IfxEray.h File Reference
iLLD » ERAY

ERAY basic functionality. More...

#include "_Impl/IfxEray_cfg.h"
#include "_PinMap/IfxEray_PinMap.h"
#include "Src/Std/IfxSrc.h"
#include "IfxEray_reg.h"
Include dependency graph for IfxEray.h:

Go to the source code of this file.

Data Structures

struct | IfxEray_Header
Header section in a frame. More...
struct | IfxEray_ReceivedHeader
Received header in a frame. More...
struct | IfxEray_SlotConfig
Transmit control structure. More...

Enumerations

enum IfxEray_Baudrate {
IfxEray_Baudrate_10 = 0,
IfxEray_Baudrate_5 = 1,
IfxEray_Baudrate_2_5 = 2
}
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP. More...
enum IfxEray_BufferDirection {
IfxEray_BufferDirection_receive = 0,
IfxEray_BufferDirection_transmit = 1
}
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG. More...
enum IfxEray_Channel {
IfxEray_Channel_a = 0,
IfxEray_Channel_b = 1
}
Channel Id. More...
enum IfxEray_ClearErrorFlag {
IfxEray_ClearErrorFlag_pemc = 1,
IfxEray_ClearErrorFlag_cna = 2,
IfxEray_ClearErrorFlag_sfbm = 4,
IfxEray_ClearErrorFlag_sfo = 8,
IfxEray_ClearErrorFlag_ccf = 16,
IfxEray_ClearErrorFlag_ccl = 32,
IfxEray_ClearErrorFlag_eerr = 64,
IfxEray_ClearErrorFlag_rfo = 128,
IfxEray_ClearErrorFlag_efa = 256,
IfxEray_ClearErrorFlag_iiba = 512,
IfxEray_ClearErrorFlag_ioba = 1024,
IfxEray_ClearErrorFlag_mhf = 2048,
IfxEray_ClearErrorFlag_eda = 65536,
IfxEray_ClearErrorFlag_ltva = 131072,
IfxEray_ClearErrorFlag_taba = 262144,
IfxEray_ClearErrorFlag_edb = 16777216,
IfxEray_ClearErrorFlag_ltvb = 33554432,
IfxEray_ClearErrorFlag_tabb = 67108864
}
Selection of error flag to clear defined in MODULE_ERAY.EIR.U. More...
enum IfxEray_ClearStatusFlag {
IfxEray_ClearStatusFlag_wst = 1,
IfxEray_ClearStatusFlag_cas = 2,
IfxEray_ClearStatusFlag_cycs = 4,
IfxEray_ClearStatusFlag_txi = 8,
IfxEray_ClearStatusFlag_rxi = 16,
IfxEray_ClearStatusFlag_rfne = 32,
IfxEray_ClearStatusFlag_rfcl = 64,
IfxEray_ClearStatusFlag_nmvc = 128,
IfxEray_ClearStatusFlag_ti0 = 256,
IfxEray_ClearStatusFlag_ti1 = 512,
IfxEray_ClearStatusFlag_tibc = 1024,
IfxEray_ClearStatusFlag_tobc = 2048,
IfxEray_ClearStatusFlag_swe = 4096,
IfxEray_ClearStatusFlag_sucs = 8192,
IfxEray_ClearStatusFlag_mbsi = 16384,
IfxEray_ClearStatusFlag_sds = 32768,
IfxEray_ClearStatusFlag_wupa = 65536,
IfxEray_ClearStatusFlag_mtsa = 131072,
IfxEray_ClearStatusFlag_wupb = 16777216,
IfxEray_ClearStatusFlag_mtsb = 33554432
}
Selection of status flag to clear defined in MODULE_ERAY.SIR.U. More...
enum IfxEray_ClockDivider {
IfxEray_ClockDivider_none = 0,
IfxEray_ClockDivider_1 = 1,
IfxEray_ClockDivider_2,
IfxEray_ClockDivider_3,
IfxEray_ClockDivider_4,
IfxEray_ClockDivider_5,
IfxEray_ClockDivider_6,
IfxEray_ClockDivider_7
}
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC. More...
enum IfxEray_ExternalOffset {
IfxEray_ExternalOffset_noCorrection = 1,
IfxEray_ExternalOffset_correctionSubtracted = 2,
IfxEray_ExternalOffset_correctionAdded = 3
}
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC. More...
enum IfxEray_ExternalOffsetCorrection {
IfxEray_ExternalOffsetCorrection_0 = 0,
IfxEray_ExternalOffsetCorrection_1,
IfxEray_ExternalOffsetCorrection_2,
IfxEray_ExternalOffsetCorrection_3,
IfxEray_ExternalOffsetCorrection_4,
IfxEray_ExternalOffsetCorrection_5,
IfxEray_ExternalOffsetCorrection_6,
IfxEray_ExternalOffsetCorrection_7
}
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC. More...
enum IfxEray_ExternalRate {
IfxEray_ExternalRate_noCorrection = 1,
IfxEray_ExternalRate_correctionSubtracted = 2,
IfxEray_ExternalRate_correctionAdded = 3
}
External rate correction control MODULE_ERAY0.GTU11.B.ERCC. More...
enum IfxEray_ExternalRateCorrection {
IfxEray_ExternalRateCorrection_0 = 0,
IfxEray_ExternalRateCorrection_1,
IfxEray_ExternalRateCorrection_2,
IfxEray_ExternalRateCorrection_3,
IfxEray_ExternalRateCorrection_4,
IfxEray_ExternalRateCorrection_5,
IfxEray_ExternalRateCorrection_6,
IfxEray_ExternalRateCorrection_7
}
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC. More...
enum IfxEray_IdleDynamicSlots {
IfxEray_IdleDynamicSlots_0 = 0,
IfxEray_IdleDynamicSlots_1,
IfxEray_IdleDynamicSlots_2
}
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI. More...
enum IfxEray_ListenTimeOutNoise {
IfxEray_ListenTimeOutNoise_2 = 1,
IfxEray_ListenTimeOutNoise_3,
IfxEray_ListenTimeOutNoise_4,
IfxEray_ListenTimeOutNoise_5,
IfxEray_ListenTimeOutNoise_6,
IfxEray_ListenTimeOutNoise_7,
IfxEray_ListenTimeOutNoise_8,
IfxEray_ListenTimeOutNoise_9,
IfxEray_ListenTimeOutNoise_10,
IfxEray_ListenTimeOutNoise_11,
IfxEray_ListenTimeOutNoise_12,
IfxEray_ListenTimeOutNoise_13,
IfxEray_ListenTimeOutNoise_14,
IfxEray_ListenTimeOutNoise_15,
IfxEray_ListenTimeOutNoise_16
}
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN. More...
enum IfxEray_MaxSynchFrames {
IfxEray_MaxSynchFrames_2 = 2,
IfxEray_MaxSynchFrames_3,
IfxEray_MaxSynchFrames_4,
IfxEray_MaxSynchFrames_5,
IfxEray_MaxSynchFrames_6,
IfxEray_MaxSynchFrames_7,
IfxEray_MaxSynchFrames_8,
IfxEray_MaxSynchFrames_9,
IfxEray_MaxSynchFrames_10,
IfxEray_MaxSynchFrames_11,
IfxEray_MaxSynchFrames_12,
IfxEray_MaxSynchFrames_13,
IfxEray_MaxSynchFrames_14,
IfxEray_MaxSynchFrames_15
}
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM. More...
enum IfxEray_PocCommand {
IfxEray_PocCommand_notAccepted = 0,
IfxEray_PocCommand_config = 1,
IfxEray_PocCommand_ready = 2,
IfxEray_PocCommand_wakeup = 3,
IfxEray_PocCommand_run = 4,
IfxEray_PocCommand_allSlots = 5,
IfxEray_PocCommand_halt = 6,
IfxEray_PocCommand_freeze = 7,
IfxEray_PocCommand_sendMts = 8,
IfxEray_PocCommand_coldStart = 9,
IfxEray_PocCommand_reset = 10,
IfxEray_PocCommand_monitor = 11,
IfxEray_PocCommand_clearRam = 12
}
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD. More...
enum IfxEray_PocState {
IfxEray_PocState_defaultConfig = 0,
IfxEray_PocState_ready = 1,
IfxEray_PocState_normalActive = 2,
IfxEray_PocState_normalPassive = 3,
IfxEray_PocState_halt = 4,
IfxEray_PocState_monitor = 5,
IfxEray_PocState_config = 15,
IfxEray_PocState_wakeupStandby = 16,
IfxEray_PocState_wakeupListen = 17,
IfxEray_PocState_wakeupSend = 18,
IfxEray_PocState_wakeupDetect = 19,
IfxEray_PocState_startup = 32,
IfxEray_PocState_coldStartListen = 33,
IfxEray_PocState_collisionResolution = 34,
IfxEray_PocState_consistencyCheck = 35,
IfxEray_PocState_gap = 36,
IfxEray_PocState_join = 37,
IfxEray_PocState_integrationCheck = 38,
IfxEray_PocState_integrationListen = 39,
IfxEray_PocState_integrationConsistencyCheck = 40,
IfxEray_PocState_initializeSchedule = 41,
IfxEray_PocState_staruAborted = 42,
IfxEray_PocState_startupSucced = 43
}
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS. More...
enum IfxEray_ReceiveChannel {
IfxEray_ReceiveChannel_both = 0,
IfxEray_ReceiveChannel_b = 1,
IfxEray_ReceiveChannel_a = 2,
IfxEray_ReceiveChannel_none = 3
}
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH. More...
enum IfxEray_SleepMode {
IfxEray_SleepMode_enable = 0,
IfxEray_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_ERAY.CLC.B.EDIS. More...
enum IfxEray_StrobePosition {
IfxEray_StrobePosition_5 = 0,
IfxEray_StrobePosition_4 = 1,
IfxEray_StrobePosition_6 = 2
}
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP. More...
enum IfxEray_SuspendMode {
IfxEray_SuspendMode_none = 0,
IfxEray_SuspendMode_hard = 1,
IfxEray_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxEray_TransmissionMode {
IfxEray_TransmissionMode_continuous = 0,
IfxEray_TransmissionMode_singleShot = 1
}
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM. More...
enum IfxEray_TransmissionSlotMode {
IfxEray_TransmissionSlotMode_all = 0,
IfxEray_TransmissionSlotMode_single = 1
}
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM. More...
enum IfxEray_WakeupChannel {
IfxEray_WakeupChannel_a = 0,
IfxEray_WakeupChannel_b = 1
}
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS. More...

Functions

IFX_INLINE void | IfxEray_clearErrorFlag (Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested. More...
IFX_INLINE void | IfxEray_clearStatusFlag (Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested. More...
IFX_INLINE Ifx_ERAY_EIR | IfxEray_getErrorInterrupts (Ifx_ERAY *eray)
Gets the error interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the IBUSY service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine0SrcPtr (Ifx_ERAY *eray)
Gets the INT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getInterruptLine1SrcPtr (Ifx_ERAY *eray)
Gets the INT1 service request. More...
IFX_INLINE boolean | IfxEray_getMessageBufferInterruptStatus (Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus0SrcPtr (Ifx_ERAY *eray)
Gets the MBSC0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getMessageBufferStatus1SrcPtr (Ifx_ERAY *eray)
Gets the MBSC1 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the NDAT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getNewDataInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the NDAT1 service request. More...
IFX_INLINE boolean | IfxEray_getNewDataInterruptStatus (Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getOutputBufferBusySrcPtr (Ifx_ERAY *eray)
Gets the OBUSY service request. More...
IFX_INLINE Ifx_ERAY_SIR | IfxEray_getStatusInterrupts (Ifx_ERAY *eray)
Gets the status interrupt flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt0SrcPtr (Ifx_ERAY *eray)
Gets the TINT0 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEray_getTimerInterrupt1SrcPtr (Ifx_ERAY *eray)
Gets the TINT1 service request. More...
IFX_EXTERN void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
IFX_EXTERN void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
IFX_EXTERN void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
IFX_EXTERN void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...
IFX_INLINE void | IfxEray_initRxPin (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin. More...
IFX_INLINE void | IfxEray_initTxEnPin (const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output. More...
IFX_INLINE void | IfxEray_initTxPin (const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxEray_disableModule (Ifx_ERAY *eray)
Disables the ERAY module. More...
IFX_INLINE void | IfxEray_enableModule (Ifx_ERAY *eray)
Enables the ERAY module. More...
IFX_INLINE boolean | IfxEray_isModuleSuspended (Ifx_ERAY *eray)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxEray_setSleepMode (Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IFX_EXTERN IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
IFX_EXTERN void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...
IFX_INLINE Ifx_ERAY_FSR | IfxEray_getFifoStatus (Ifx_ERAY *eray)
Gets the FIFO status. More...
IFX_INLINE boolean | IfxEray_getInputBufferBusyHostStatus (Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status. More...
IFX_INLINE uint8 | IfxEray_getInputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Input Buffer Shadow status. More...
IFX_INLINE uint8 | IfxEray_getOutputBuffer (Ifx_ERAY *eray)
Gets the output buffer index. More...
IFX_INLINE boolean | IfxEray_getOutputBufferBusyShadowStatus (Ifx_ERAY *eray)
Gets the Output Buffer Shadow status. More...
IFX_INLINE IfxEray_PocState | IfxEray_getPocState (Ifx_ERAY *eray)
Gets the current POC state. More...
IFX_INLINE IfxEray_WakeupChannel | IfxEray_getWakeupPatternReceivedChannel (Ifx_ERAY *eray)
Gets the received wakeup pattern channel. More...
IFX_INLINE void | IfxEray_waitForPocState (Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state. More...
IFX_EXTERN boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
IFX_EXTERN void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...
IFX_INLINE void | IfxEray_receiveHeader (Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer. More...
IFX_INLINE void | IfxEray_sendHeader (Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame. More...
IFX_INLINE void | IfxEray_setActiveCyclePairs (Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state. More...
IFX_INLINE void | IfxEray_setAutoDelayBuffers (Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM. More...
IFX_INLINE void | IfxEray_setBaudrate (Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus. More...
IFX_INLINE void | IfxEray_setBufferReconfigSecure (Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM. More...
IFX_INLINE void | IfxEray_setChannelAInitialOffsets (Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes. More...
IFX_INLINE void | IfxEray_setChannelBInitialOffsets (Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes. More...
IFX_INLINE void | IfxEray_setChannelsReceiveDelay (Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels. More...
IFX_INLINE void | IfxEray_setClockCorrectionCycles (Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt. More...
IFX_INLINE void | IfxEray_setClockSynchErrorHalt (Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error. More...
IFX_INLINE void | IfxEray_setClusterDriftValues (Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values. More...
IFX_INLINE void | IfxEray_setClusterStartupDeviation (Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation. More...
IFX_INLINE void | IfxEray_setCollisionAvoidanceDuration (Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration. More...
IFX_INLINE void | IfxEray_setCycleDurationMacroticks (Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks. More...
IFX_INLINE void | IfxEray_setCycleDurationMicroticks (Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks. More...
IFX_INLINE void | IfxEray_setDecodingCorrectionValue (Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value. More...
IFX_INLINE void | IfxEray_setDynamicSlots (Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length. More...
IFX_INLINE void | IfxEray_setExternalCorrectionControl (Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls. More...
IFX_INLINE void | IfxEray_setExternalCorrectionValues (Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values. More...
IFX_INLINE void | IfxEray_setFifoBufferStartIndex (Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex. More...
IFX_INLINE void | IfxEray_setFifoFilterConfigurations (Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations. More...
IFX_INLINE void | IfxEray_setFifoMessageBufferConfigurations (Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations. More...
IFX_INLINE void | IfxEray_setFirstDynamicBuffer (Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer. More...
IFX_INLINE void | IfxEray_setListenTimeOuts (Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts. More...
IFX_INLINE void | IfxEray_setMaxColdStartAttempts (Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state. More...
IFX_INLINE void | IfxEray_setMaxCorrectionValues (Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values. More...
IFX_INLINE void | IfxEray_setMaxSynchFrames (Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster. More...
IFX_INLINE void | IfxEray_setMessageBufferCount (Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers. More...
IFX_INLINE void | IfxEray_setMessageHandlerConfigurations (Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations. More...
IFX_INLINE void | IfxEray_setNetworkStartIdleTime (Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time. More...
IFX_INLINE void | IfxEray_setNetworkVectorLength (Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length. More...
IFX_INLINE void | IfxEray_setNodeChannels (Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node. More...
IFX_INLINE void | IfxEray_setOffsetCorrection (Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point. More...
IFX_INLINE void | IfxEray_setReceiveRequest (Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame. More...
IFX_INLINE void | IfxEray_setReceiveWakeupTimes (Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times. More...
IFX_INLINE void | IfxEray_setRxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received. More...
IFX_INLINE void | IfxEray_setSlotActionPoints (Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points. More...
IFX_INLINE void | IfxEray_setStaticSlots (Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length. More...
IFX_INLINE void | IfxEray_setStrobePosition (Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing. More...
IFX_INLINE void | IfxEray_setSymbolChannels (Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols. More...
IFX_INLINE void | IfxEray_setTransmissionSlotMode (Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode. More...
IFX_INLINE void | IfxEray_setTransmissionStartTime (Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration. More...
IFX_INLINE void | IfxEray_setTransmitRequest (Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame. More...
IFX_INLINE void | IfxEray_setTransmitWakeupTimes (Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times. More...
IFX_INLINE void | IfxEray_setTransmittedFrames (Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization. More...
IFX_INLINE void | IfxEray_setTxBufferNumber (Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number. More...
IFX_INLINE void | IfxEray_setViewData (Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers. More...
IFX_INLINE void | IfxEray_setWakeupPatternChannel (Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel. More...
IFX_INLINE void | IfxEray_receiveData (Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer. More...
IFX_INLINE void | IfxEray_sendData (Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame. More...
IFX_EXTERN uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
IFX_EXTERN void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
IFX_EXTERN void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
IFX_EXTERN void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
IFX_EXTERN void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...
IFX_INLINE uint8 | IfxEray_getFifoIndex (Ifx_ERAY *eray)
Gets the FIFO index. More...
IFX_INLINE void | IfxEray_setSuspendMode (Ifx_ERAY *eray, IfxEray_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxEray_initRxPinWithPadLevel (const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver. More...

Detailed Description

ERAY basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEray.h.

Function Documentation

◆ IfxEray_getFifoIndex()

IFX_INLINE uint8 IfxEray_getFifoIndex ( Ifx_ERAY * eray )

Gets the FIFO index.

Parameters
eray pointer to ERAY module registers.
Returns
FIFO buffer index.

Definition at line 1235 of file IfxEray.h.

Referenced by IfxEray_Eray_receiveFifoFrame().

◆ IfxEray_initRxPinWithPadLevel()

IFX_INLINE void IfxEray_initRxPinWithPadLevel | ( | const IfxEray_Rxd_In * | rx,
 |  | IfxPort_InputMode | rxMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of pin direction as input and configuring pad driver.

Parameters
rx | the RX Pin which should be configured.
rxMode | the pin input mode which should be configured.
padDriver | Pad Driver Configuration
Returns
None

Definition at line 1809 of file IfxEray.h.

Referenced by IfxEray_Eray_Node_init().

◆ IfxEray_setSuspendMode()

IFX_INLINE void IfxEray_setSuspendMode | ( | Ifx_ERAY * | eray,
 |  | IfxEray_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
eray | Pointer to ERAY module registers
mode | Module suspend mode
Returns
None

Definition at line 1733 of file IfxEray.h.


iLLD_TC26B: ETH

Modules | Files
ETH
iLLD
Collaboration diagram for ETH:

Modules

Implementation
Standard Driver
ETH Pin Mapping
PHY_PEF7071

Files

file | IfxEth_cfg.h
ETH on-chip implementation data.
file | IfxEth_PinMap.c
ETH I/O map.
file | IfxEth_PinMap.h
ETH I/O map.
file | IfxEth_Phy_Pef7071.h
ETH PHY_PEF7071 details.
file | IfxEth.h
ETH basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » ETH
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » ETH
Collaboration diagram for Standard Driver:

Modules

Data Structures
Unions
Configuration Functions
Utility Functions
Initialisation Functions
Enumerations

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » ETH » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxEth_AltRxDescr0_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_AltRxDescr1_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_AltTxDescr0_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_AltTxDescr1_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_RingModeRxBuffersConfig
Configuration structure for Ring Mode Receive Buffers. More...
struct | IfxEth_RingModeTxBuffersConfig
Configuration structure for Ring Mode Transmit buffers. More...
struct | IfxEth_RxDescr
Normal RX descriptor. More...
struct | IfxEth_TxDescr
Normal TX descriptor. More...
struct | IfxEth_MiiPins
Port pins for MII mode configuration. More...
struct | IfxEth_RingModeBuffersConfig
Configuration structure for Ring Mode descriptors. More...
struct | IfxEth_RmiiPins
Port pins for RMII mode configuration. More...
struct | IfxEth_Config
ETH configuration structure. More...
struct | IfxEth
ETH driver structure. More...
struct | IfxEth_RxDescr0_Bits
Structure for RX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_RxDescr1_Bits
Structure for RX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_TxDescr0_Bits
Structure for TX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_TxDescr1_Bits
Structure for TX descriptor DWORD 1 Bit field access. More...

Detailed Description

Data Structure Documentation

◆ IfxEth_AltRxDescr0_Bits

struct IfxEth_AltRxDescr0_Bits

Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access.

Definition at line 156 of file IfxEth.h.

Data Fields
uint32 | AFM: 1 | Destination Address Filter Fail.
uint32 | CE: 1 | CRC Error.
uint32 | DBE: 1 | Dribble Bit Error.
uint32 | DE: 1 | Descriptor Error.
uint32 | ES: 1 | Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE.
uint32 | ext: 1 | Extended Status Available/Rx MAC Address.
uint32 | FL: 14 | Frame Length.
uint32 | FS: 1 | First Descriptor.
uint32 | FT: 1 | Frame Type.
uint32 | IPC: 1 | IPC Checksum Error/Giant Frame.
uint32 | LC: 1 | Late Collision.
uint32 | LE: 1 | Length Error.
uint32 | LS: 1 | Last Descriptor.
uint32 | OE: 1 | Overflow Error.
uint32 | OWN: 1 | Own Bit, 1 = own by DMA.
uint32 | RE: 1 | Receive Error.
uint32 | RWT: 1 | Receive Watchdog Timeout.
uint32 | SAF: 1 | Source Address Filter Fail.
uint32 | VLAN: 1 | VLAN Tag.

◆ IfxEth_AltRxDescr1_Bits

struct IfxEth_AltRxDescr1_Bits

Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access.

Definition at line 181 of file IfxEth.h.

Data Fields
uint32 | DIC: 1 | Disable Interrupt on Completion.
uint32 | RBS1: 13 | Receive Buffer 1 Size.
uint32 | RBS2: 13 | Receive Buffer 2 Size.
uint32 | RCH: 1 | Second Address Chained.
uint32 | RER: 1 | Receive End of Ring.
uint32 | resv: 2 | reserved)
uint32 | resv1: 1 | reserved

◆ IfxEth_AltTxDescr0_Bits

struct IfxEth_AltTxDescr0_Bits

Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access.

Definition at line 194 of file IfxEth.h.

Data Fields
uint32 | CC: 4 | Collision count.
uint32 | CIC: 2 | Checksum Insertion Control.
uint32 | DB: 1 | Deferred bit.
uint32 | DC: 1 | Disable CRC.
uint32 | DP: 1 | Disable Padding.
uint32 | EC: 1 | Excessive Collision.
uint32 | ED: 1 | Excessive deferral.
uint32 | ES: 1 | Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF.
uint32 | FF: 1 | Frame Flushed.
uint32 | FS: 1 | First Segment.
uint32 | IC: 1 | Interrupt on Completion.
uint32 | IHE: 1 | IP Header Error.
uint32 | JT: 1 | Jabber Timeout.
uint32 | LC: 1 | Late Collision.
uint32 | LOC: 1 | Loss of Carrier.
uint32 | LS: 1 | Last Segment.
uint32 | NC: 1 | No Carrier.
uint32 | OWN: 1 | Own Bit, 1 = own by DMA.
uint32 | PCE: 1 | Payload Checksum Error.
uint32 | resv: 2 | (reserved)
uint32 | resv1: 1 | (Reserved)
uint32 | TCH: 1 | Second Address Chained.
uint32 | TER: 1 | Transmit End of Ring.
uint32 | TTSE: 1 | Transmit Time Stamp Enable.
uint32 | TTSS: 1 | Transmit Time Stamp Status.
uint32 | UF: 1 | Underflow error.
uint32 | VLAN: 1 | VLAN TAG.

◆ IfxEth_AltTxDescr1_Bits

struct IfxEth_AltTxDescr1_Bits

Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access.

Definition at line 227 of file IfxEth.h.

Data Fields
uint32 | resv1: 3 | (reserved)
uint32 | resv2: 3 | (reserved)
uint32 | TBS1: 13 | Transmit Buffer 1 Size.
uint32 | TBS2: 13 | Transmit Buffer 2 Size.

◆ IfxEth_RingModeRxBuffersConfig

struct IfxEth_RingModeRxBuffersConfig

Configuration structure for Ring Mode Receive Buffers.

Definition at line 305 of file IfxEth.h.

Data Fields
uint16 | rxBuffer1Size | Size of Rx Buffer 1.
uint32 | rxBuffer1StartAddress | Start address of Rx Buffer 1.
uint16 | rxBuffer2Size | Size of Rx Buffer 2.
uint32 | rxBuffer2StartAddress | Start address of Rx Buffer 2.
IfxEth_RingModeBufferUsed | rxBufferUsed | Receive Buffer(s) used in ringmode.

◆ IfxEth_RingModeTxBuffersConfig

struct IfxEth_RingModeTxBuffersConfig

Configuration structure for Ring Mode Transmit buffers.

Definition at line 316 of file IfxEth.h.

Data Fields
uint16 | txBuffer1Size | Size of Tx Buffer 1.
uint32 | txBuffer1StartAddress | Start address of Tx Buffer 1.
uint16 | txBuffer2Size | Size of Tx Buffer 2.
uint32 | txBuffer2StartAddress | Start address of Tx Buffer 2.
IfxEth_RingModeBufferUsed | txBufferUsed | Transmit Buffer(s) used in ringmode.

◆ IfxEth_RxDescr

struct IfxEth_RxDescr

Normal RX descriptor.

Definition at line 327 of file IfxEth.h.

Collaboration diagram for IfxEth_RxDescr:
[legend]
Data Fields
IfxEth_RxDescr0 | RDES0 | RX descriptor DWORD 0.
IfxEth_RxDescr1 | RDES1 | RX descriptor DWORD 1.
IfxEth_RxDescr2 | RDES2 | RX descriptor DWORD 2.
IfxEth_RxDescr3 | RDES3 | RX descriptor DWORD 3.

◆ IfxEth_TxDescr

struct IfxEth_TxDescr

Normal TX descriptor.

Definition at line 337 of file IfxEth.h.

Collaboration diagram for IfxEth_TxDescr:
[legend]
Data Fields
IfxEth_TxDescr0 | TDES0 | TX descriptor DWORD 0.
IfxEth_TxDescr1 | TDES1 | TX descriptor DWORD 1.
IfxEth_TxDescr2 | TDES2 | TX descriptor DWORD 2.
IfxEth_TxDescr3 | TDES3 | TX descriptor DWORD 3.

◆ IfxEth_MiiPins

struct IfxEth_MiiPins

Port pins for MII mode configuration.

Definition at line 351 of file IfxEth.h.

Collaboration diagram for IfxEth_MiiPins:
[legend]
Data Fields
IfxEth_Col_In * | col | pointer to COL input pin config
IfxEth_Crs_In * | crs | pointer to CRS input pin config
IfxEth_Mdc_Out * | mdc | Pointer to MDC pin config.
IfxEth_Mdio_InOut * | mdio | Pointer to MDIO pin config.
IfxEth_Rxclk_In * | rxClk | Pointer to RXCLK input pin config.
IfxEth_Rxd_In * | rxd0 | Pointer to RXD0 input pin config.
IfxEth_Rxd_In * | rxd1 | Pointer to RXD1 input pin config.
IfxEth_Rxd_In * | rxd2 | Pointer to RXD2 input pin config.
IfxEth_Rxd_In * | rxd3 | Pointer to RXD3 input pin config.
IfxEth_Rxdv_In * | rxDv | Pointer to RXDV input pin config.
IfxEth_Rxer_In * | rxEr | Pointer to RXER input pin config.
IfxEth_Txclk_In * | txClk | Pointer to TXCLK input pin config.
IfxEth_Txd_Out * | txd0 | Pointer to TXD0 output pin config.
IfxEth_Txd_Out * | txd1 | Pointer to TXD1 output pin config.
IfxEth_Txd_Out * | txd2 | Pointer to TXD2 output pin config.
IfxEth_Txd_Out * | txd3 | Pointer to TXD3 output pin config.
IfxEth_Txen_Out * | txEn | Pointer to TXEN output pin config.
IfxEth_Txer_Out * | txEr | Pointer to TXER output pin config.

◆ IfxEth_RingModeBuffersConfig

struct IfxEth_RingModeBuffersConfig

Configuration structure for Ring Mode descriptors.

Definition at line 375 of file IfxEth.h.

Collaboration diagram for IfxEth_RingModeBuffersConfig:
[legend]
Data Fields
IfxEth_RingModeRxBuffersConfig | rxConfig | Receive buffers ring mode config.
IfxEth_RingModeTxBuffersConfig | txConfig | Transmit buffers ring mode config.

◆ IfxEth_RmiiPins

struct IfxEth_RmiiPins

Port pins for RMII mode configuration.

Definition at line 383 of file IfxEth.h.

Collaboration diagram for IfxEth_RmiiPins:
[legend]
Data Fields
IfxEth_Crsdv_In * | crsDiv | pointer to CRSDIV input pin config
IfxEth_Mdc_Out * | mdc | Pointer to MDC output pin config.
IfxEth_Mdio_InOut * | mdio | Pointer to MDIO pin config.
IfxEth_Refclk_In * | refClk | Pointer to REFCLK input pin config.
IfxEth_Rxd_In * | rxd0 | Pointer to RXD0 input pin config.
IfxEth_Rxd_In * | rxd1 | Pointer to RXD1 input pin config.
IfxEth_Txd_Out * | txd0 | Pointer to TXD0 output pin config.
IfxEth_Txd_Out * | txd1 | Pointer to TXD1 output pin config.
IfxEth_Txen_Out * | txEn | Pointer to TXEN output pin config.

◆ IfxEth_Config

struct IfxEth_Config

ETH configuration structure.

Definition at line 418 of file IfxEth.h.

Collaboration diagram for IfxEth_Config:
[legend]

Data Fields

uint8 | macAddress [6]
MAC address for the ethernet, should be unique in the network. More...
uint32(* | phyInit )(void)
Pointer to the transceiver init function. More...
boolean(* | phyLink )(void)
Pointer to the transceiver link function. More...
IfxEth_PhyInterfaceMode phyInterfaceMode
Phy Interface mode. More...
IFX_CONST IfxEth_RmiiPins * rmiiPins
Pointer to port pins configuration of RMII mode. More...
IFX_CONST IfxEth_MiiPins * miiPins
Pointer to port pins configuration of MII mode. More...
Ifx_Priority isrPriority
Interrupt service priority. More...
IfxSrc_Tos isrProvider
Interrupt service provider. More...
Ifx_ETH * | ethSfr
Pointer to register base. More...
IfxEth_RxDescrList * rxDescr
pointer to RX descriptor RAM More...
IfxEth_TxDescrList * txDescr
pointer to TX descriptor RAM More...
IfxEth_DescriptorMode descriptorMode
Descriptor mode (chain or ring) More...
IfxEth_RingModeBuffersConfig ringModeBuffersConfig
Ring mode buffers condiguration. More...

Field Documentation

◆ descriptorMode

IfxEth_DescriptorMode descriptorMode

Descriptor mode (chain or ring)

Definition at line 431 of file IfxEth.h.

Referenced by IfxEth_init().

◆ ethSfr

Ifx_ETH* ethSfr

Pointer to register base.

Definition at line 428 of file IfxEth.h.

Referenced by IfxEth_init(), and IfxEth_initConfig().

◆ isrPriority

Ifx_Priority isrPriority

Interrupt service priority.

Definition at line 426 of file IfxEth.h.

Referenced by IfxEth_init().

◆ isrProvider

IfxSrc_Tos isrProvider

Interrupt service provider.

Definition at line 427 of file IfxEth.h.

Referenced by IfxEth_init().

◆ macAddress

uint8 macAddress[6]

MAC address for the ethernet, should be unique in the network.

Definition at line 420 of file IfxEth.h.

Referenced by IfxEth_getMacAddressPointer(), and IfxEth_init().

◆ miiPins

IFX_CONST IfxEth_MiiPins* miiPins

Pointer to port pins configuration of MII mode.

Definition at line 425 of file IfxEth.h.

Referenced by IfxEth_init().

◆ phyInit

uint32(* phyInit) (void)

Pointer to the transceiver init function.

Definition at line 421 of file IfxEth.h.

Referenced by IfxEth_init().

◆ phyInterfaceMode

IfxEth_PhyInterfaceMode phyInterfaceMode

Phy Interface mode.

Definition at line 423 of file IfxEth.h.

Referenced by IfxEth_init().

◆ phyLink

boolean(* phyLink) (void)

Pointer to the transceiver link function.

Definition at line 422 of file IfxEth.h.

Referenced by IfxEth_isLinkActive().

◆ ringModeBuffersConfig

IfxEth_RingModeBuffersConfig ringModeBuffersConfig

Ring mode buffers condiguration.

Definition at line 432 of file IfxEth.h.

Referenced by IfxEth_init().

◆ rmiiPins

IFX_CONST IfxEth_RmiiPins* rmiiPins

Pointer to port pins configuration of RMII mode.

Definition at line 424 of file IfxEth.h.

Referenced by IfxEth_init().

◆ rxDescr

IfxEth_RxDescrList* rxDescr

pointer to RX descriptor RAM

Definition at line 429 of file IfxEth.h.

Referenced by IfxEth_init().

◆ txDescr

IfxEth_TxDescrList* txDescr

pointer to TX descriptor RAM

Definition at line 430 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IfxEth

struct IfxEth

ETH driver structure.

Definition at line 441 of file IfxEth.h.

Collaboration diagram for IfxEth:
[legend]
Data Fields
IfxEth_Config | config | Copy of the configuration passed through IfxEth_init()
IfxEth_DescriptorMode | descriptorMode | Descriptor mode (chain or ring)
uint32 | error | Indicate an error has occurred during execution.
Ifx_ETH * | ethSfr | Pointer to register base.
sint32 | isrCount | count of all ISR
sint32 | isrRxCount | Count of RX ISR.
sint32 | isrTxCount | Count of TX ISR.
IfxEth_RxDescr * | pRxDescr |
IfxEth_TxDescr * | pTxDescr |
IfxEth_RingModeBufferUsed | rxBufferUsed | Receive Buffer(s) used in ringmode.
uint32 | rxCount | Number of frames received.
IfxEth_RxDescrList * | rxDescr | pointer to RX descriptor RAM
sint32 | rxDiff | Difference between isrRxCount and rxCount.
Ifx_ETH_STATUS | status | Intermediate variable to use register content in control structure.
IfxEth_RingModeBufferUsed | txBufferUsed | Transmit Buffer(s) used in ringmode.
uint32 | txCount | Number of frames transmitted.
IfxEth_TxDescrList * | txDescr | pointer to TX descriptor RAM
sint32 | txDiff | Difference between isrTxCount and txCount.

◆ IfxEth_RxDescr0_Bits

struct IfxEth_RxDescr0_Bits

Structure for RX descriptor DWORD 0 Bit field access.

Definition at line 465 of file IfxEth.h.

Data Fields
uint32 | AFM: 1 | Destination Address Filter Fail.
uint32 | CE: 1 | CRC Error.
uint32 | DBE: 1 | Dribble Bit Error.
uint32 | DE: 1 | Descriptor Error.
uint32 | ES: 1 | Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE.
uint32 | FL: 14 | Frame Length.
uint32 | FS: 1 | First Descriptor.
uint32 | FT: 1 | Frame Type.
uint32 | IPC: 1 | IPC Checksum Error/Giant Frame.
uint32 | LC: 1 | Late Collision.
uint32 | LE: 1 | Length Error.
uint32 | LS: 1 | Last Descriptor.
uint32 | OE: 1 | Overflow Error.
uint32 | OWN: 1 | Own Bit, 1 = own by DMA.
uint32 | PCE: 1 | Rx MAC Address/Payload Checksum Error.
uint32 | RE: 1 | Receive Error.
uint32 | RWT: 1 | Receive Watchdog Timeout.
uint32 | SAF: 1 | Source Address Filter Fail.
uint32 | VLAN: 1 | VLAN Tag.

◆ IfxEth_RxDescr1_Bits

struct IfxEth_RxDescr1_Bits

Structure for RX descriptor DWORD 1 Bit field access.

Definition at line 490 of file IfxEth.h.

Data Fields
uint32 | DIC: 1 | Disable Interrupt on Completion.
uint32 | RBS1: 11 | Receive Buffer 1 Size.
uint32 | RBS2: 11 | Receive Buffer 2 Size.
uint32 | RCH: 1 | Second Address Chained.
uint32 | RER: 1 | Receive End of Ring.
uint32 | resv: 2 | (reserved)
uint32 | resv2: 5 | (reserved)

◆ IfxEth_TxDescr0_Bits

struct IfxEth_TxDescr0_Bits

Structure for TX descriptor DWORD 0 Bit field access.

Definition at line 503 of file IfxEth.h.

Data Fields
uint32 | CC: 4 | Collision Count.
uint32 | DB: 1 | Deferred Bit.
uint32 | EC: 1 | Excessive Collision.
uint32 | ED: 1 | Excessive Deferral.
uint32 | ES: 1 | Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF.
uint32 | FF: 1 | Frame Flushed.
uint32 | IHE: 1 | IP Header Error.
uint32 | JT: 1 | Jabber Timeout.
uint32 | LC: 1 | Late Collision.
uint32 | LOC: 1 | Loss of Carrier.
uint32 | NC: 1 | No Carrier.
uint32 | OWN: 1 | Own Bit, 1 = own by DMA.
uint32 | PCE: 1 | Payload Checksum Error.
uint32 | resv: 13 | (reserved)
uint32 | TTSS: 1 | Tx Time Stamp Status.
uint32 | UF: 1 | Underflow Error.
uint32 | VLAN: 1 | VLAN Tag.

◆ IfxEth_TxDescr1_Bits

struct IfxEth_TxDescr1_Bits

Structure for TX descriptor DWORD 1 Bit field access.

Definition at line 526 of file IfxEth.h.

Data Fields
uint32 | CIC: 2 | Checksum Insertion Control.
uint32 | DC: 1 | Disable CRC.
uint32 | DP: 1 | Disable Padding.
uint32 | FS: 1 | First Segment.
uint32 | IC: 1 | Interrupt on Completion.
uint32 | LS: 1 | Last Segment.
uint32 | TBS1: 11 | Transmit Buffer 1 Size.
uint32 | TBS2: 11 | Transmit Buffer 2 Size.
uint32 | TCH: 1 | Second Address Chained.
uint32 | TER: 1 | Transmit End of Ring.
uint32 | TTSE: 1 | Transmit Time Stamp Enable.


iLLD_TC26B: Unions

Data Structures
Unions
iLLD » ETH » Standard Driver
Collaboration diagram for Unions:

Data Structures

union | IfxEth_RxDescr0
Union for RX descriptor DWORD 0. More...
union | IfxEth_RxDescr1
Union for RX descriptor DWORD 1. More...
union | IfxEth_RxDescr2
Union for RX descriptor DWORD 2. More...
union | IfxEth_RxDescr3
Union for RX descriptor DWORD 3. More...
union | IfxEth_TxDescr0
Union for TX descriptor DWORD 0. More...
union | IfxEth_TxDescr1
Union for TX descriptor DWORD 1. More...
union | IfxEth_TxDescr2
Union for TX descriptor DWORD 2. More...
union | IfxEth_TxDescr3
Union for TX descriptor DWORD 3. More...
union | IfxEth_RxDescrList
union | IfxEth_TxDescrList

Detailed Description

Data Structure Documentation

◆ IfxEth_RxDescr0

union IfxEth_RxDescr0

Union for RX descriptor DWORD 0.

Definition at line 241 of file IfxEth.h.

Collaboration diagram for IfxEth_RxDescr0:
[legend]
Data Fields
IfxEth_AltRxDescr0_Bits | A | Structure for RX descriptor DWORD 0 Bit field access.
uint32 | U | Unsigned long access.

◆ IfxEth_RxDescr1

union IfxEth_RxDescr1

Union for RX descriptor DWORD 1.

Definition at line 249 of file IfxEth.h.

Collaboration diagram for IfxEth_RxDescr1:
[legend]
Data Fields
IfxEth_AltRxDescr1_Bits | A | Structure for RX descriptor DWORD 1 Bit field access.
uint32 | U | unsigned long access

◆ IfxEth_RxDescr2

union IfxEth_RxDescr2

Union for RX descriptor DWORD 2.

Definition at line 257 of file IfxEth.h.

Data Fields
uint32 U unsigned long access

◆ IfxEth_RxDescr3

union IfxEth_RxDescr3

Union for RX descriptor DWORD 3.

Definition at line 264 of file IfxEth.h.

Data Fields
uint32 U unsigned long access

◆ IfxEth_TxDescr0

union IfxEth_TxDescr0

Union for TX descriptor DWORD 0.

Definition at line 271 of file IfxEth.h.

Collaboration diagram for IfxEth_TxDescr0:
[legend]
Data Fields
IfxEth_AltTxDescr0_Bits | A | Structure for TX descriptor DWORD 0 Bit field access.
uint32 | U | Unsigned long access.

◆ IfxEth_TxDescr1

union IfxEth_TxDescr1

Union for TX descriptor DWORD 1.

Definition at line 279 of file IfxEth.h.

Collaboration diagram for IfxEth_TxDescr1:
[legend]
Data Fields
IfxEth_AltTxDescr1_Bits | A | Structure for RX descriptor DWORD 1 Bit field access.
uint32 | U | unsigned long access

◆ IfxEth_TxDescr2

union IfxEth_TxDescr2

Union for TX descriptor DWORD 2.

Definition at line 287 of file IfxEth.h.

Data Fields
uint32 U unsigned long access

◆ IfxEth_TxDescr3

union IfxEth_TxDescr3

Union for TX descriptor DWORD 3.

Definition at line 294 of file IfxEth.h.

Data Fields
uint32 U unsigned long access

◆ IfxEth_RxDescrList

union IfxEth_RxDescrList

Definition at line 400 of file IfxEth.h.

Collaboration diagram for IfxEth_RxDescrList:
[legend]
Data Fields
IfxEth_RxDescr | items[IFXETH_MAX_RX_BUFFERS]
uint32 | U[IFXETH_MAX_RX_BUFFERS][IFXETH_DESCR_SIZE]

◆ IfxEth_TxDescrList

union IfxEth_TxDescrList

Definition at line 406 of file IfxEth.h.

Collaboration diagram for IfxEth_TxDescrList:
[legend]
Data Fields
IfxEth_TxDescr | items[IFXETH_MAX_TX_BUFFERS]
uint32 | U[IFXETH_MAX_TX_BUFFERS][IFXETH_DESCR_SIZE]


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » ETH » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxEth_RxDescr_setBuffer (IfxEth_RxDescr *descr, void *buffer)
Set buffer of an RX descriptor. More...
IFX_INLINE IfxEth_TxDescr * | IfxEth_TxDescr_getNext (IfxEth_TxDescr *descr)
Get pointer to next TX descriptor. More...
IFX_INLINE boolean | IfxEth_TxDescr_isAvailable (IfxEth_TxDescr *descr)
Return TRUE if a TX descriptor is available for setup. More...
IFX_INLINE void | IfxEth_TxDescr_setBuffer (IfxEth_TxDescr *descr, void *buffer)
Set buffer of a TX descriptor. More...
IFX_INLINE void | IfxEth_applySoftwareReset (IfxEth *eth)
Applies the Software Reset. More...
IFX_INLINE void | IfxEth_clearEriInterrupt (IfxEth *eth)
Clear Early Receive Interrupt request. More...
IFX_INLINE void | IfxEth_clearRxInterrupt (IfxEth *eth)
Clear receive interrupt request. More...
IFX_INLINE void | IfxEth_clearTuInterrupt (IfxEth *eth)
Clear Transmit Buffer Unavailable request. More...
IFX_INLINE void | IfxEth_clearTxInterrupt (IfxEth *eth)
Clear transmit interrupt request. More...
IFX_INLINE void | IfxEth_disableTimeStampCoarseUpdate (IfxEth *eth)
Disables Timestamp Fine or Coarse Update. More...
IFX_INLINE void | IfxEth_disableTimeStampForIpv4Frames (IfxEth *eth)
Disables Processing of PTP frames sent over IPV4 UDP. More...
IFX_INLINE void | IfxEth_enableMmcCounter (IfxEth *eth)
Enables theMMC counter. More...
IFX_INLINE void | IfxEth_enableTimeStamp (IfxEth *eth)
Enables the TimeStamp. More...
IFX_INLINE void | IfxEth_enableTimeStampCoarseUpdate (IfxEth *eth)
Enables Timestamp Fine or Coarse Update. More...
IFX_INLINE void | IfxEth_enableTimeStampForAllFrames (IfxEth *eth)
Enables the TimeStamp for All frames. More...
IFX_INLINE void | IfxEth_enableTimeStampForEthFrames (IfxEth *eth)
Enables Processing of PTP over Ethernet Frames. More...
IFX_INLINE void | IfxEth_enableTimeStampForIpv4Frames (IfxEth *eth)
Enables Processing of PTP frames sent over IPV4 UDP. More...
IFX_INLINE void | IfxEth_enableTimeStampForVer2Format (IfxEth *eth)
Enables PTP packet Processing for Version 2 Format. More...
IFX_INLINE boolean | IfxEth_getTimeStampInitialiseStatus (IfxEth *eth)
returns the status of the TimeStamp Initialisation More...
IFX_INLINE boolean | IfxEth_getTimeStampUpdateStatus (IfxEth *eth)
returns the status of the System Time updation More...
IFX_INLINE void | IfxEth_initialiseTimeStamp (IfxEth *eth)
Initialises the TimeStamp. More...
IFX_INLINE boolean | IfxEth_isSoftwareResetDone (IfxEth *eth)
Returns the status of Software Reset. More...
IFX_INLINE void | IfxEth_setAddToTimeUpdate (IfxEth *eth)
Sets addition, the time value is added with the contents of the update register. More...
IFX_INLINE void | IfxEth_setBinaryRolloverControl (IfxEth *eth, boolean enabled)
Enable/Disables Timestamp Digital or Binary Rollover Control. More...
IFX_INLINE void | IfxEth_setLoopbackMode (IfxEth *eth, boolean loopbackMode)
Sets the loopback mode. More...
IFX_INLINE void | IfxEth_setNanoSecondsUpdateValue (IfxEth *eth, uint8 value)
Sets the time in sub seconds representation, to be initialized or added to the system time. More...
IFX_INLINE void | IfxEth_setPhyInterfaceMode (IfxEth *eth, IfxEth_PhyInterfaceMode mode)
Sets the Phy Interface mode. More...
IFX_INLINE void | IfxEth_setReceiveDescriptorAddress (Ifx_ETH *eth, void *address)
Sets receive descriptor address. More...
IFX_INLINE void | IfxEth_setSecondsUpdateValue (IfxEth *eth, uint8 value)
Sets the time in seconds to be initialized or added to the system time. More...
IFX_INLINE void | IfxEth_setSubSecondIncrementValue (IfxEth *eth, uint8 value)
Sets the Sub Second Increment Value. More...
IFX_INLINE void | IfxEth_setSubtractToTimeUpdate (IfxEth *eth)
Sets subtraction, the time value is subtracted with the contents of the update register. More...
IFX_INLINE void | IfxEth_setTransmitDescriptorAddress (Ifx_ETH *eth, void *address)
Sets transmit descriptor address. More...
IFX_INLINE void | IfxEth_updateTimeStamp (IfxEth *eth)
Updates the System time with specified values in SECONDS and NANOSECONDS registers. More...
IFX_INLINE void * | IfxEth_waitTransmitBuffer (IfxEth *eth)
Waits for one TX buffer becomes available. More...
IFX_EXTERN void | IfxEth_freeReceiveBuffer (IfxEth *eth)
Free the receive buffer, enabling it for the further reception. More...
IFX_EXTERN void | IfxEth_sendTransmitBuffer (IfxEth *eth, uint16 len)
Request to send the transmit buffer. More...
IFX_EXTERN void | IfxEth_sendTransmitBuffersRingMode (IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer. More...
IFX_EXTERN void | IfxEth_setMacAddress (IfxEth *eth, const uint8 *macAddress)
Sets the MAC address. More...
IFX_EXTERN void | IfxEth_startReceiver (IfxEth *eth)
Start the receiver functions. More...
IFX_EXTERN void | IfxEth_stopReceiver (IfxEth *eth)
Stops the receiver functions. More...
IFX_EXTERN void | IfxEth_writeHeader (IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer More...

Detailed Description

Function Documentation

◆ IfxEth_applySoftwareReset()

IFX_INLINE void IfxEth_applySoftwareReset ( IfxEth * eth )

Applies the Software Reset.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1261 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IfxEth_clearEriInterrupt()

IFX_INLINE void IfxEth_clearEriInterrupt ( IfxEth * eth )

Clear Early Receive Interrupt request.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1268 of file IfxEth.h.

◆ IfxEth_clearRxInterrupt()

IFX_INLINE void IfxEth_clearRxInterrupt ( IfxEth * eth )

Clear receive interrupt request.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1281 of file IfxEth.h.

◆ IfxEth_clearTuInterrupt()

IFX_INLINE void IfxEth_clearTuInterrupt ( IfxEth * eth )

Clear Transmit Buffer Unavailable request.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1288 of file IfxEth.h.

◆ IfxEth_clearTxInterrupt()

IFX_INLINE void IfxEth_clearTxInterrupt ( IfxEth * eth )

Clear transmit interrupt request.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1295 of file IfxEth.h.

◆ IfxEth_disableTimeStampCoarseUpdate()

IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate ( IfxEth * eth )

Disables Timestamp Fine or Coarse Update.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1302 of file IfxEth.h.

◆ IfxEth_disableTimeStampForIpv4Frames()

IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames ( IfxEth * eth )

Disables Processing of PTP frames sent over IPV4 UDP.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1309 of file IfxEth.h.

◆ IfxEth_enableMmcCounter()

IFX_INLINE void IfxEth_enableMmcCounter ( IfxEth * eth )

Enables theMMC counter.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1316 of file IfxEth.h.

◆ IfxEth_enableTimeStamp()

IFX_INLINE void IfxEth_enableTimeStamp ( IfxEth * eth )

Enables the TimeStamp.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1323 of file IfxEth.h.

◆ IfxEth_enableTimeStampCoarseUpdate()

IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate ( IfxEth * eth )

Enables Timestamp Fine or Coarse Update.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1330 of file IfxEth.h.

◆ IfxEth_enableTimeStampForAllFrames()

IFX_INLINE void IfxEth_enableTimeStampForAllFrames ( IfxEth * eth )

Enables the TimeStamp for All frames.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1337 of file IfxEth.h.

◆ IfxEth_enableTimeStampForEthFrames()

IFX_INLINE void IfxEth_enableTimeStampForEthFrames ( IfxEth * eth )

Enables Processing of PTP over Ethernet Frames.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1344 of file IfxEth.h.

◆ IfxEth_enableTimeStampForIpv4Frames()

IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames ( IfxEth * eth )

Enables Processing of PTP frames sent over IPV4 UDP.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1351 of file IfxEth.h.

◆ IfxEth_enableTimeStampForVer2Format()

IFX_INLINE void IfxEth_enableTimeStampForVer2Format ( IfxEth * eth )

Enables PTP packet Processing for Version 2 Format.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1358 of file IfxEth.h.

◆ IfxEth_freeReceiveBuffer()

IFX_EXTERN void IfxEth_freeReceiveBuffer ( IfxEth * eth )

Free the receive buffer, enabling it for the further reception.

Parameters
eth ETH driver structure
Returns
None

Definition at line 67 of file IfxEth.c.

◆ IfxEth_getTimeStampInitialiseStatus()

IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus ( IfxEth * eth )

returns the status of the TimeStamp Initialisation

Parameters
eth ETH driver structure
Returns
Status, TRUE: initialising, FLASE: initialised

Definition at line 1436 of file IfxEth.h.

◆ IfxEth_getTimeStampUpdateStatus()

IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus ( IfxEth * eth )

returns the status of the System Time updation

Parameters
eth ETH driver structure
Returns
Status, TRUE: initialising, FLASE: initialised

Definition at line 1443 of file IfxEth.h.

◆ IfxEth_initialiseTimeStamp()

IFX_INLINE void IfxEth_initialiseTimeStamp ( IfxEth * eth )

Initialises the TimeStamp.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1457 of file IfxEth.h.

◆ IfxEth_isSoftwareResetDone()

IFX_INLINE boolean IfxEth_isSoftwareResetDone ( IfxEth * eth )

Returns the status of Software Reset.

Parameters
eth ETH driver structure
Returns
Status

Definition at line 1515 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IfxEth_RxDescr_setBuffer()

IFX_INLINE void IfxEth_RxDescr_setBuffer | ( | IfxEth_RxDescr * | descr,
 |  | void * | buffer
 | ) |  |

Set buffer of an RX descriptor.

Parameters
descr | descr Pointer to an RX descriptor
buffer | pointer to buffer
Returns
None

Definition at line 1219 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptors().

◆ IfxEth_sendTransmitBuffer()

IFX_EXTERN void IfxEth_sendTransmitBuffer | ( | IfxEth * | eth,
 |  | uint16 | len
 | ) |  |

Request to send the transmit buffer.

The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()

Parameters
eth | ETH driver structure
len | Length of the data put in the transmit buffer (in bytes)
Returns
None

Definition at line 529 of file IfxEth.c.

Referenced by IfxEth_setAndSendTransmitBuffer().

◆ IfxEth_sendTransmitBuffersRingMode()

IFX_EXTERN void IfxEth_sendTransmitBuffersRingMode | ( | IfxEth * | eth,
 |  | uint16 | buffer1Length,
 |  | uint16 | buffer2Length
 | ) |  |

Request to send the transmit buffer.

The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()

Parameters
eth | ETH driver structure
buffer1Length | Length of the data put in the transmit buffer 1 (in bytes)
buffer2Length | Length of the data put in the transmit buffer 2 (in bytes)
Returns
None

Definition at line 543 of file IfxEth.c.

◆ IfxEth_setAddToTimeUpdate()

IFX_INLINE void IfxEth_setAddToTimeUpdate ( IfxEth * eth )

Sets addition, the time value is added with the contents of the update register.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1544 of file IfxEth.h.

◆ IfxEth_setBinaryRolloverControl()

IFX_INLINE void IfxEth_setBinaryRolloverControl | ( | IfxEth * | eth,
 |  | boolean | enabled
 | ) |  |

Enable/Disables Timestamp Digital or Binary Rollover Control.

Parameters
eth | ETH driver structure
enabled | Enable = 1 / Disable = 0
Returns
None

Definition at line 1551 of file IfxEth.h.

◆ IfxEth_setLoopbackMode()

IFX_INLINE void IfxEth_setLoopbackMode | ( | IfxEth * | eth,
 |  | boolean | loopbackMode
 | ) |  |

Sets the loopback mode.

Parameters
eth | ETH driver structure
loopbackMode | loopback mode enable/disbale
Returns
None

Definition at line 1558 of file IfxEth.h.

◆ IfxEth_setMacAddress()

IFX_EXTERN void IfxEth_setMacAddress | ( | IfxEth * | eth,
 |  | const uint8 * | macAddress
 | ) |  |

Sets the MAC address.

Parameters
eth | ETH driver structure
macAddress | MAC address
Returns
None

Definition at line 573 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setNanoSecondsUpdateValue()

IFX_INLINE void IfxEth_setNanoSecondsUpdateValue | ( | IfxEth * | eth,
 |  | uint8 | value
 | ) |  |

Sets the time in sub seconds representation, to be initialized or added to the system time.

Parameters
eth | ETH driver structure
value | Sub Second Increment Value
Returns
None

Definition at line 1565 of file IfxEth.h.

◆ IfxEth_setPhyInterfaceMode()

IFX_INLINE void IfxEth_setPhyInterfaceMode | ( | IfxEth * | eth,
 |  | IfxEth_PhyInterfaceMode | mode
 | ) |  |

Sets the Phy Interface mode.

Parameters
eth | ETH driver structure
mode | Phy interface mode
Returns
None

Definition at line 1572 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IfxEth_setReceiveDescriptorAddress()

IFX_INLINE void IfxEth_setReceiveDescriptorAddress | ( | Ifx_ETH * | eth,
 |  | void * | address
 | ) |  |

Sets receive descriptor address.

Parameters
eth | pointer to the ethernet module
address | Address
Returns
None

Definition at line 1593 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptors(), and IfxEth_initReceiveDescriptorsRingMode().

◆ IfxEth_setSecondsUpdateValue()

IFX_INLINE void IfxEth_setSecondsUpdateValue | ( | IfxEth * | eth,
 |  | uint8 | value
 | ) |  |

Sets the time in seconds to be initialized or added to the system time.

Parameters
eth | ETH driver structure
value | Sub Second Increment Value
Returns
None

Definition at line 1599 of file IfxEth.h.

◆ IfxEth_setSubSecondIncrementValue()

IFX_INLINE void IfxEth_setSubSecondIncrementValue | ( | IfxEth * | eth,
 |  | uint8 | value
 | ) |  |

Sets the Sub Second Increment Value.

Parameters
eth | ETH driver structure
value | Sub Second Increment Value
Returns
None

Definition at line 1606 of file IfxEth.h.

◆ IfxEth_setSubtractToTimeUpdate()

IFX_INLINE void IfxEth_setSubtractToTimeUpdate ( IfxEth * eth )

Sets subtraction, the time value is subtracted with the contents of the update register.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1613 of file IfxEth.h.

◆ IfxEth_setTransmitDescriptorAddress()

IFX_INLINE void IfxEth_setTransmitDescriptorAddress | ( | Ifx_ETH * | eth,
 |  | void * | address
 | ) |  |

Sets transmit descriptor address.

Parameters
eth | pointer to the ethernet module
address | Address
Returns
None

Definition at line 1634 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptors(), and IfxEth_initTransmitDescriptorsRingMode().

◆ IfxEth_startReceiver()

IFX_EXTERN void IfxEth_startReceiver ( IfxEth * eth )

Start the receiver functions.

Parameters
eth ETH driver structure
Returns
None

Definition at line 836 of file IfxEth.c.

Referenced by IfxEth_wakeupReceiver().

◆ IfxEth_stopReceiver()

IFX_EXTERN void IfxEth_stopReceiver ( IfxEth * eth )

Stops the receiver functions.

Parameters
eth ETH driver structure
Returns
None

Definition at line 857 of file IfxEth.c.

◆ IfxEth_TxDescr_getNext()

IFX_INLINE IfxEth_TxDescr * IfxEth_TxDescr_getNext ( IfxEth_TxDescr * descr )

Get pointer to next TX descriptor.

Parameters
descr descr Pointer to a TX descriptor
Returns
next Tx descriptor

Definition at line 1225 of file IfxEth.h.

Referenced by IfxEth_setupChecksumEngine(), and IfxEth_shuffleTxDescriptor().

◆ IfxEth_TxDescr_isAvailable()

IFX_INLINE boolean IfxEth_TxDescr_isAvailable ( IfxEth_TxDescr * descr )

Return TRUE if a TX descriptor is available for setup.

Parameters
descr pointer to descriptor

Definition at line 1231 of file IfxEth.h.

◆ IfxEth_TxDescr_setBuffer()

IFX_INLINE void IfxEth_TxDescr_setBuffer | ( | IfxEth_TxDescr * | descr,
 |  | void * | buffer
 | ) |  |

Set buffer of a TX descriptor.

Parameters
descr | Entdescr Pointer to a TX descriptorer_String_here
buffer | pointer to Buffer
Returns
None

Definition at line 1243 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptors(), and IfxEth_setAndSendTransmitBuffer().

◆ IfxEth_updateTimeStamp()

IFX_INLINE void IfxEth_updateTimeStamp ( IfxEth * eth )

Updates the System time with specified values in SECONDS and NANOSECONDS registers.

Parameters
eth ETH driver structure
Returns
None

Definition at line 1640 of file IfxEth.h.

◆ IfxEth_waitTransmitBuffer()

IFX_INLINE void * IfxEth_waitTransmitBuffer ( IfxEth * eth )

Waits for one TX buffer becomes available.

Parameters
eth ETH driver structure retval non NULL_PTR TX buffer is available at the address pointed by the returned value retval NULL_PTR TX buffer is busy.

Definition at line 1651 of file IfxEth.h.

◆ IfxEth_writeHeader()

IFX_EXTERN void IfxEth_writeHeader | ( | IfxEth * | eth,
 |  | uint8 * | txBuffer,
 |  | uint8 * | destinationAddress,
 |  | uint8 * | sourceAddress,
 |  | uint32 | packetSize
 | ) |  |

writes the header format into buffrer

Parameters
eth | ETH driver structure
txBuffer | pointer to tx buffer
destinationAddress | pointer to destination address
sourceAddress | pointer to source address
packetSize | size of the packet
Returns
None

Definition at line 913 of file IfxEth.c.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » ETH » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE IfxEth_RxDescr * | IfxEth_RxDescr_getNext (IfxEth_RxDescr *descr)
Get pointer to next RX descriptor. More...
IFX_INLINE void | IfxEth_RxDescr_release (IfxEth_RxDescr *descr)
release RX descriptor More...
IFX_INLINE void | IfxEth_TxDescr_release (IfxEth_TxDescr *descr)
Release a TX descriptor for transmit queue. More...
IFX_INLINE void | IfxEth_clearMacConfiguration (void)
resets Ethernet Configuration register More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_getActualRxDescriptor (IfxEth *eth)
Get pointer to actual RX descriptor. More...
IFX_INLINE uint32 | IfxEth_getActualRxIndex (IfxEth *eth)
IFX_INLINE IfxEth_TxDescr * | IfxEth_getActualTxDescriptor (IfxEth *eth)
Get pointer to actual TX descriptor. More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_getBaseRxDescriptor (IfxEth *eth)
Get pointer to base RX descriptor. More...
IFX_INLINE IfxEth_TxDescr * | IfxEth_getBaseTxDescriptor (IfxEth *eth)
Get pointer to base TX descriptor. More...
IFX_INLINE boolean | IfxEth_getLoopbackMode (IfxEth *eth)
returns the status of th eloopback mode More...
IFX_INLINE void * | IfxEth_getMacAddressPointer (IfxEth *eth)
Returns pointer to the MAC address configured for this ETH. More...
IFX_INLINE IfxEth_ReceiveProcessState | IfxEth_getReceiveProcessState (IfxEth *eth)
returns the Receive Process State More...
IFX_INLINE uint16 | IfxEth_getRxDataLength (IfxEth *eth)
Returns length of the oldest available RX data. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEth_getSrcPointer (IfxEth *eth)
Returns the SRC pointer of Eth. More...
IFX_INLINE IfxEth_TransmitProcessState | IfxEth_getTransmitProcessState (IfxEth *eth)
returns the Transmit Process State More...
IFX_INLINE boolean | IfxEth_isEriInterrupt (IfxEth *eth)
Checks whether Early Receive interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isLinkActive (IfxEth *eth)
Checks whether physical connection is active. More...
IFX_INLINE boolean | IfxEth_isNisInterrupt (IfxEth *eth)
Checks whether NIS interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isRxChecksumError (IfxEth *eth)
IFX_INLINE boolean | IfxEth_isRxDataAvailable (IfxEth *eth)
Checks whether one or more RX data is available. More...
IFX_INLINE boolean | IfxEth_isRxInterrupt (IfxEth *eth)
Checks whether receive interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isTuInterrupt (IfxEth *eth)
Checks whether Transmit Buffer Unavailable interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isTxInterrupt (IfxEth *eth)
Checks whether transmit interrupt is requested. More...
IFX_INLINE void | IfxEth_readAllFlags (IfxEth *eth)
reads the status of all flags More...
IFX_EXTERN void | IfxEth_disableModule (void)
Disable ETH Module. More...
IFX_EXTERN void | IfxEth_enableModule (void)
Enable ETH Module. More...
IFX_EXTERN void * | IfxEth_getReceiveBuffer (IfxEth *eth)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
IFX_EXTERN void * | IfxEth_getTransmitBuffer (IfxEth *eth)
Get a free transmit buffer. More...
IFX_EXTERN void | IfxEth_readMacAddress (IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register. More...
IFX_EXTERN void | IfxEth_resetModule (void)
resets Ethernet kernel More...
IFX_EXTERN void | IfxEth_setAndSendTransmitBuffer (IfxEth *eth, void *buffer, uint16 len)
IFX_EXTERN void | IfxEth_setupChecksumEngine (IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine. More...
IFX_EXTERN void | IfxEth_shuffleRxDescriptor (IfxEth *eth)
Shuffle to next RX descriptor. More...
IFX_EXTERN void | IfxEth_shuffleTxDescriptor (IfxEth *eth)
Shuffle to next TX descriptor. More...
IFX_EXTERN void | IfxEth_startTransmitter (IfxEth *eth)
Start the transmitter functions. More...
IFX_EXTERN void | IfxEth_stopTransmitter (IfxEth *eth)
Stop the transmitter functions. More...
IFX_EXTERN void | IfxEth_wakeupReceiver (IfxEth *eth)
Wakeup the receiver functions. More...
IFX_EXTERN void | IfxEth_wakeupTransmitter (IfxEth *eth)
Wakeup the transmitter functions. More...

Detailed Description

Function Documentation

◆ IfxEth_clearMacConfiguration()

IFX_INLINE void IfxEth_clearMacConfiguration ( void )

resets Ethernet Configuration register

Returns
None

Definition at line 1275 of file IfxEth.h.

◆ IfxEth_disableModule()

IFX_EXTERN void IfxEth_disableModule ( void )

Disable ETH Module.

Returns
None

Definition at line 47 of file IfxEth.c.

◆ IfxEth_enableModule()

IFX_EXTERN void IfxEth_enableModule ( void )

Enable ETH Module.

Returns
None

Definition at line 56 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_getActualRxDescriptor()

IFX_INLINE IfxEth_RxDescr * IfxEth_getActualRxDescriptor ( IfxEth * eth )

Get pointer to actual RX descriptor.

Parameters
eth eth ETH driver structure

Definition at line 1365 of file IfxEth.h.

Referenced by IfxEth_freeReceiveBuffer(), IfxEth_getReceiveBuffer(), IfxEth_getRxDataLength(), IfxEth_isRxChecksumError(), and IfxEth_isRxDataAvailable().

◆ IfxEth_getActualRxIndex()

IFX_INLINE uint32 IfxEth_getActualRxIndex ( IfxEth * eth )

Definition at line 1371 of file IfxEth.h.

◆ IfxEth_getActualTxDescriptor()

IFX_INLINE IfxEth_TxDescr * IfxEth_getActualTxDescriptor ( IfxEth * eth )

Get pointer to actual TX descriptor.

Parameters
eth eth ETH driver structure

Definition at line 1378 of file IfxEth.h.

Referenced by IfxEth_getTransmitBuffer(), IfxEth_sendTransmitBuffer(), IfxEth_sendTransmitBuffersRingMode(), and IfxEth_setAndSendTransmitBuffer().

◆ IfxEth_getBaseRxDescriptor()

IFX_INLINE IfxEth_RxDescr * IfxEth_getBaseRxDescriptor ( IfxEth * eth )

Get pointer to base RX descriptor.

Parameters
eth eth ETH driver structure

Definition at line 1384 of file IfxEth.h.

Referenced by IfxEth_getActualRxIndex(), IfxEth_initReceiveDescriptors(), IfxEth_initReceiveDescriptorsRingMode(), and IfxEth_shuffleRxDescriptor().

◆ IfxEth_getBaseTxDescriptor()

IFX_INLINE IfxEth_TxDescr * IfxEth_getBaseTxDescriptor ( IfxEth * eth )

Get pointer to base TX descriptor.

Parameters
eth eth ETH driver structure

Definition at line 1390 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptors(), IfxEth_initTransmitDescriptorsRingMode(), IfxEth_setupChecksumEngine(), and IfxEth_shuffleTxDescriptor().

◆ IfxEth_getLoopbackMode()

IFX_INLINE boolean IfxEth_getLoopbackMode ( IfxEth * eth )

returns the status of th eloopback mode

Parameters
eth ETH driver structure
Returns
Loop back mode status (TRUE / FALSE)

Definition at line 1396 of file IfxEth.h.

◆ IfxEth_getMacAddressPointer()

IFX_INLINE void * IfxEth_getMacAddressPointer ( IfxEth * eth )

Returns pointer to the MAC address configured for this ETH.

Parameters
eth ETH driver structure

Definition at line 1403 of file IfxEth.h.

◆ IfxEth_getReceiveBuffer()

IFX_EXTERN void* IfxEth_getReceiveBuffer ( IfxEth * eth )

Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed.

Parameters
eth ETH driver structure
Returns
retval NULL_PTR no received frame retval !NULL_PTR a frame has been received

Definition at line 75 of file IfxEth.c.

◆ IfxEth_getReceiveProcessState()

IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState ( IfxEth * eth )

returns the Receive Process State

Parameters
eth ETH driver structure
Returns
Receive Process State

Definition at line 1409 of file IfxEth.h.

◆ IfxEth_getRxDataLength()

IFX_INLINE uint16 IfxEth_getRxDataLength ( IfxEth * eth )

Returns length of the oldest available RX data.

Parameters
eth ETH driver structure
Returns
Data length

Definition at line 1416 of file IfxEth.h.

◆ IfxEth_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxEth_getSrcPointer ( IfxEth * eth )

Returns the SRC pointer of Eth.

Parameters
eth ETH driver structure
Returns
pointer to ETH SRCR register

Definition at line 1429 of file IfxEth.h.

◆ IfxEth_getTransmitBuffer()

IFX_EXTERN void* IfxEth_getTransmitBuffer ( IfxEth * eth )

Get a free transmit buffer.

Parameters
eth ETH driver structure
Returns
retval NULL_PTR no free transmit buffer is available retval !NULL_PTR a free transmit buffer is available

Definition at line 93 of file IfxEth.c.

Referenced by IfxEth_waitTransmitBuffer().

◆ IfxEth_getTransmitProcessState()

IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState ( IfxEth * eth )

returns the Transmit Process State

Parameters
eth ETH driver structure
Returns
Transmit Process State

Definition at line 1450 of file IfxEth.h.

◆ IfxEth_isEriInterrupt()

IFX_INLINE boolean IfxEth_isEriInterrupt ( IfxEth * eth )

Checks whether Early Receive interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1468 of file IfxEth.h.

◆ IfxEth_isLinkActive()

IFX_INLINE boolean IfxEth_isLinkActive ( IfxEth * eth )

Checks whether physical connection is active.

Parameters
eth ETH driver structure
Returns
retval zero Connection is inactive retval non zero Connection is active

Definition at line 1476 of file IfxEth.h.

◆ IfxEth_isNisInterrupt()

IFX_INLINE boolean IfxEth_isNisInterrupt ( IfxEth * eth )

Checks whether NIS interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1482 of file IfxEth.h.

◆ IfxEth_isRxChecksumError()

IFX_INLINE boolean IfxEth_isRxChecksumError ( IfxEth * eth )
Parameters
eth pointer to ETH driver structure

Definition at line 1490 of file IfxEth.h.

◆ IfxEth_isRxDataAvailable()

IFX_INLINE boolean IfxEth_isRxDataAvailable ( IfxEth * eth )

Checks whether one or more RX data is available.

Parameters
eth ETH driver structure
Returns
retval TRUE one or more RX data is available retval FALSE no RX data is available

Definition at line 1500 of file IfxEth.h.

Referenced by IfxEth_getReceiveBuffer(), and IfxEth_getRxDataLength().

◆ IfxEth_isRxInterrupt()

IFX_INLINE boolean IfxEth_isRxInterrupt ( IfxEth * eth )

Checks whether receive interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1507 of file IfxEth.h.

◆ IfxEth_isTuInterrupt()

IFX_INLINE boolean IfxEth_isTuInterrupt ( IfxEth * eth )

Checks whether Transmit Buffer Unavailable interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1522 of file IfxEth.h.

◆ IfxEth_isTxInterrupt()

IFX_INLINE boolean IfxEth_isTxInterrupt ( IfxEth * eth )

Checks whether transmit interrupt is requested.

Parameters
eth ETH driver structure
Returns
TRUE/FALSE

Definition at line 1530 of file IfxEth.h.

◆ IfxEth_readAllFlags()

IFX_INLINE void IfxEth_readAllFlags ( IfxEth * eth )

reads the status of all flags

Parameters
eth ETH driver structure
Returns
None

Definition at line 1538 of file IfxEth.h.

◆ IfxEth_readMacAddress()

IFX_EXTERN void IfxEth_readMacAddress | ( | IfxEth * | eth,
 |  | uint8 * | macAddress
 | ) |  |

Reads the MAC address from module register.

Parameters
eth | ETH driver structure
macAddress | MAC address
Returns
None

Definition at line 502 of file IfxEth.c.

◆ IfxEth_resetModule()

IFX_EXTERN void IfxEth_resetModule ( void )

resets Ethernet kernel

Returns
None

Definition at line 510 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_RxDescr_getNext()

IFX_INLINE IfxEth_RxDescr * IfxEth_RxDescr_getNext ( IfxEth_RxDescr * descr )

Get pointer to next RX descriptor.

Parameters
descr descr Pointer to an RX descriptor
Returns
next RX descriptor

Definition at line 1207 of file IfxEth.h.

Referenced by IfxEth_shuffleRxDescriptor().

◆ IfxEth_RxDescr_release()

IFX_INLINE void IfxEth_RxDescr_release ( IfxEth_RxDescr * descr )

release RX descriptor

Parameters
descr pointer to Rx descriptor
Returns
None

Definition at line 1213 of file IfxEth.h.

Referenced by IfxEth_freeReceiveBuffer().

◆ IfxEth_setAndSendTransmitBuffer()

IFX_EXTERN void IfxEth_setAndSendTransmitBuffer | ( | IfxEth * | eth,
 |  | void * | buffer,
 |  | uint16 | len
 | ) |  |
Parameters
eth | pointer to ETH driver structure
len | length of buffer
Returns
None

Definition at line 566 of file IfxEth.c.

◆ IfxEth_setupChecksumEngine()

IFX_EXTERN void IfxEth_setupChecksumEngine | ( | IfxEth * | eth,
 |  | IfxEth_ChecksumMode | mode
 | ) |  |

Set up checksum Engine.

Parameters
eth | eth ETH driver structure
mode | specifies checksum mode
Returns
None

Definition at line 590 of file IfxEth.c.

◆ IfxEth_shuffleRxDescriptor()

IFX_EXTERN void IfxEth_shuffleRxDescriptor ( IfxEth * eth )

Shuffle to next RX descriptor.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 802 of file IfxEth.c.

Referenced by IfxEth_freeReceiveBuffer().

◆ IfxEth_shuffleTxDescriptor()

IFX_EXTERN void IfxEth_shuffleTxDescriptor ( IfxEth * eth )

Shuffle to next TX descriptor.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 819 of file IfxEth.c.

Referenced by IfxEth_sendTransmitBuffer(), and IfxEth_sendTransmitBuffersRingMode().

◆ IfxEth_startTransmitter()

IFX_EXTERN void IfxEth_startTransmitter ( IfxEth * eth )

Start the transmitter functions.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 847 of file IfxEth.c.

Referenced by IfxEth_wakeupTransmitter().

◆ IfxEth_stopTransmitter()

IFX_EXTERN void IfxEth_stopTransmitter ( IfxEth * eth )

Stop the transmitter functions.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 867 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_TxDescr_release()

IFX_INLINE void IfxEth_TxDescr_release ( IfxEth_TxDescr * descr )

Release a TX descriptor for transmit queue.

Parameters
descr Enter_String_herdescr Pointer to a TX descriptore
Returns
None

Definition at line 1237 of file IfxEth.h.

◆ IfxEth_wakeupReceiver()

IFX_EXTERN void IfxEth_wakeupReceiver ( IfxEth * eth )

Wakeup the receiver functions.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 877 of file IfxEth.c.

Referenced by IfxEth_getReceiveBuffer().

◆ IfxEth_wakeupTransmitter()

IFX_EXTERN void IfxEth_wakeupTransmitter ( IfxEth * eth )

Wakeup the transmitter functions.

Parameters
eth eth ETH driver structure
Returns
None

Definition at line 894 of file IfxEth.c.

Referenced by IfxEth_sendTransmitBuffer(), and IfxEth_sendTransmitBuffersRingMode().


iLLD_TC26B: Initialisation Functions

Functions
Initialisation Functions
iLLD » ETH » Standard Driver
Collaboration diagram for Initialisation Functions:

Functions

IFX_INLINE void | IfxEth_TxDescr_setup (IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
Setup some properties of a TX descriptor. More...
IFX_INLINE void | IfxEth_setReceiveBuffer1RingMode (IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer1 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setReceiveBuffer2RingMode (IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer2 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setTransmitBuffer1RingMode (IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer1 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setTransmitBuffer2RingMode (IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer2 of the receive descriptor along with its size. More...
IFX_EXTERN void | IfxEth_init (IfxEth *eth, const IfxEth_Config *config)
Initialises the driver. More...
IFX_EXTERN void | IfxEth_initConfig (IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure. More...
IFX_EXTERN void | IfxEth_initReceiveDescriptors (IfxEth *eth)
Initialises the receive descriptors. More...
IFX_EXTERN void | IfxEth_initReceiveDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors. More...
IFX_EXTERN void | IfxEth_initTransmitDescriptors (IfxEth *eth)
Initialises transmit descriptors. More...
IFX_EXTERN void | IfxEth_initTransmitDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors. More...
IFX_EXTERN void | IfxEth_setupMiiInputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins. More...
IFX_EXTERN void | IfxEth_setupMiiOutputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins More...
IFX_EXTERN void | IfxEth_setupRmiiInputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins. More...
IFX_EXTERN void | IfxEth_setupRmiiOutputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port More...

Detailed Description

Function Documentation

◆ IfxEth_init()

IFX_EXTERN void IfxEth_init | ( | IfxEth * | eth,
 |  | const IfxEth_Config * | config
 | ) |  |

Initialises the driver.

Parameters
eth | ETH driver structure
config | ETH configuration structure
Returns
None

Definition at line 108 of file IfxEth.c.

◆ IfxEth_initConfig()

IFX_EXTERN void IfxEth_initConfig | ( | IfxEth_Config * | config,
 |  | Ifx_ETH * | ethSfr
 | ) |  |

Initialises the configuration Structure.

Parameters
config | ETH configuration structure
ethSfr | Pointer to register base
Returns
None

Definition at line 246 of file IfxEth.c.

◆ IfxEth_initReceiveDescriptors()

IFX_EXTERN void IfxEth_initReceiveDescriptors ( IfxEth * eth )

Initialises the receive descriptors.

Parameters
eth ETH driver structure
Returns
None

Definition at line 284 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_initReceiveDescriptorsRingMode()

IFX_EXTERN void IfxEth_initReceiveDescriptorsRingMode | ( | IfxEth * | eth,
 |  | const IfxEth_RingModeRxBuffersConfig * | config
 | ) |  |

Initialises the receive descriptors.

Parameters
eth | ETH driver structure
config | Ring mode Rx buffers configuration
Returns
None

Definition at line 330 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_initTransmitDescriptors()

IFX_EXTERN void IfxEth_initTransmitDescriptors ( IfxEth * eth )

Initialises transmit descriptors.

Parameters
eth pointer to ETH driver structure
Returns
None

Definition at line 394 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_initTransmitDescriptorsRingMode()

IFX_EXTERN void IfxEth_initTransmitDescriptorsRingMode | ( | IfxEth * | eth,
 |  | const IfxEth_RingModeTxBuffersConfig * | config
 | ) |  |

Initialises transmit descriptors.

Parameters
eth | pointer to ETH driver structure
config | Ring mode Tx buffers configuration
Returns
None

Definition at line 438 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setReceiveBuffer1RingMode()

IFX_INLINE void IfxEth_setReceiveBuffer1RingMode | ( | IfxEth * | eth,
 |  | IfxEth_RxDescr * | descr,
 |  | uint32 | address,
 |  | uint16 | size
 | ) |  |

Sets the receive buffer1 of the receive descriptor along with its size.

Parameters
eth | ETH driver structure
descr | Pointer to Rx descreptor
address | Buffer 1 start address
size | Buffer 1 size
Returns
None

Definition at line 1579 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptorsRingMode().

◆ IfxEth_setReceiveBuffer2RingMode()

IFX_INLINE void IfxEth_setReceiveBuffer2RingMode | ( | IfxEth * | eth,
 |  | IfxEth_RxDescr * | descr,
 |  | uint32 | address,
 |  | uint16 | size
 | ) |  |

Sets the receive buffer2 of the receive descriptor along with its size.

Parameters
eth | ETH driver structure
descr | Pointer to Rx descreptor
address | Buffer 1 start address
size | Buffer 1 size
Returns
None

Definition at line 1586 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptorsRingMode().

◆ IfxEth_setTransmitBuffer1RingMode()

IFX_INLINE void IfxEth_setTransmitBuffer1RingMode | ( | IfxEth * | eth,
 |  | IfxEth_TxDescr * | descr,
 |  | uint32 | address,
 |  | uint16 | size
 | ) |  |

Sets the transmit buffer1 of the receive descriptor along with its size.

Parameters
eth | ETH driver structure
descr | Pointer to Tx descreptor
address | Buffer 1 start address
size | Buffer 1 size
Returns
None

Definition at line 1620 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptorsRingMode().

◆ IfxEth_setTransmitBuffer2RingMode()

IFX_INLINE void IfxEth_setTransmitBuffer2RingMode | ( | IfxEth * | eth,
 |  | IfxEth_TxDescr * | descr,
 |  | uint32 | address,
 |  | uint16 | size
 | ) |  |

Sets the transmit buffer2 of the receive descriptor along with its size.

Parameters
eth | ETH driver structure
descr | Pointer to Tx descreptor
address | Buffer 1 start address
size | Buffer 1 size
Returns
None

Definition at line 1627 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptorsRingMode().

◆ IfxEth_setupMiiInputPins()

IFX_EXTERN void IfxEth_setupMiiInputPins | ( | IfxEth * | eth,
 |  | const IfxEth_MiiPins * | miiPins
 | ) |  |

Set up MII mode input pins.

Parameters
eth | eth pointer to ETH driver structure
miiPins | pin of port to be set
Returns
None

Definition at line 611 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setupMiiOutputPins()

IFX_EXTERN void IfxEth_setupMiiOutputPins | ( | IfxEth * | eth,
 |  | const IfxEth_MiiPins * | miiPins
 | ) |  |

setup MII mode output pins

Parameters
eth | eth pointer to ETH driver structure
miiPins | pin of port to be set
Returns
None

Definition at line 697 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setupRmiiInputPins()

IFX_EXTERN void IfxEth_setupRmiiInputPins | ( | IfxEth * | eth,
 |  | const IfxEth_RmiiPins * | rmiiPins
 | ) |  |

Set up input pins.

Parameters
eth | eth pointer to ETH driver structure
rmiiPins | pin of port to be set
Returns
None

Definition at line 736 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_setupRmiiOutputPins()

IFX_EXTERN void IfxEth_setupRmiiOutputPins | ( | IfxEth * | eth,
 |  | const IfxEth_RmiiPins * | rmiiPins
 | ) |  |

set output pin of port

Parameters
eth | eth pointer to ETH driver structure
rmiiPins | pin of port to be set
Returns
None

Definition at line 768 of file IfxEth.c.

Referenced by IfxEth_init().

◆ IfxEth_TxDescr_setup()

IFX_INLINE void IfxEth_TxDescr_setup | ( | IfxEth_TxDescr * | descr,
 |  | uint16 | length,
 |  | boolean | firstSegment,
 |  | boolean | lastSegment
 | ) |  |

Setup some properties of a TX descriptor.

Parameters
descr | Enter_Sdescr Pointer to a TX descriptortring_here
length | specifies length of transmit descriptor
firstSegment | specifies first segment of frame
lastSegment | specifies last segment of frame
Returns
None

Definition at line 1249 of file IfxEth.h.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » ETH » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxEth_ChecksumMode {
IfxEth_ChecksumMode_bypass = 0,
IfxEth_ChecksumMode_ipv4 = 1,
IfxEth_ChecksumMode_tcpUdpIcmpSegment = 2,
IfxEth_ChecksumMode_tcpUdpIcmpFull = 3
}
enum IfxEth_DescriptorMode {
IfxEth_DescriptorMode_chain,
IfxEth_DescriptorMode_ring
}
enum IfxEth_PhyInterfaceMode {
IfxEth_PhyInterfaceMode_mii,
IfxEth_PhyInterfaceMode_rmii
}
External Phy Interface RMII Mode. More...
enum IfxEth_ReceiveProcessState {
IfxEth_ReceiveProcessState_reset,
IfxEth_ReceiveProcessState_fetching,
IfxEth_ReceiveProcessState_none,
IfxEth_ReceiveProcessState_waiting,
IfxEth_ReceiveProcessState_suspended,
IfxEth_ReceiveProcessState_closing,
IfxEth_ReceiveProcessState_timestampWrite,
IfxEth_ReceiveProcessState_transfering
}
indicates the Receive DMA FSM state More...
enum IfxEth_RingModeBufferUsed {
IfxEth_RingModeBufferUsed_buffer1,
IfxEth_RingModeBufferUsed_buffer2,
IfxEth_RingModeBufferUsed_bothBuffers
}
Buffer(s) used in ring mode. More...
enum IfxEth_TransmitProcessState {
IfxEth_TransmitProcessState_reset,
IfxEth_TransmitProcessState_fetching,
IfxEth_TransmitProcessState_waiting,
IfxEth_TransmitProcessState_reading,
IfxEth_TransmitProcessState_timestampWrite,
IfxEth_TransmitProcessState_none,
IfxEth_TransmitProcessState_suspended,
IfxEth_TransmitProcessState_closing
}
indicates the Transmit DMA FSM state More...

Detailed Description

Enumeration Type Documentation

◆ IfxEth_ChecksumMode

enum IfxEth_ChecksumMode
Enumerator
IfxEth_ChecksumMode_bypass
IfxEth_ChecksumMode_ipv4
IfxEth_ChecksumMode_tcpUdpIcmpSegment
IfxEth_ChecksumMode_tcpUdpIcmpFull

Definition at line 87 of file IfxEth.h.

◆ IfxEth_DescriptorMode

enum IfxEth_DescriptorMode
Enumerator
IfxEth_DescriptorMode_chain | chain mode descriptors
IfxEth_DescriptorMode_ring | ring mode descriptors

Definition at line 95 of file IfxEth.h.

◆ IfxEth_PhyInterfaceMode

enum IfxEth_PhyInterfaceMode

External Phy Interface RMII Mode.

Enumerator
IfxEth_PhyInterfaceMode_mii | MII mode.
IfxEth_PhyInterfaceMode_rmii | RMII mode.

Definition at line 103 of file IfxEth.h.

◆ IfxEth_ReceiveProcessState

enum IfxEth_ReceiveProcessState

indicates the Receive DMA FSM state

Enumerator
IfxEth_ReceiveProcessState_reset | Stopped: Reset or Stop Receive Command issued.
IfxEth_ReceiveProcessState_fetching | Running: Fetching Receive Transfer Descriptor.
IfxEth_ReceiveProcessState_none | Reserved for future use.
IfxEth_ReceiveProcessState_waiting | Running: Waiting for receive packet.
IfxEth_ReceiveProcessState_suspended | Suspended: Receive Descriptor Unavailable.
IfxEth_ReceiveProcessState_closing | Running: Closing Receive Descriptor.
IfxEth_ReceiveProcessState_timestampWrite | TIME_STAMP write state.
IfxEth_ReceiveProcessState_transfering | Running: Transferring the receive packet data from receive buffer to host memory.

Definition at line 111 of file IfxEth.h.

◆ IfxEth_RingModeBufferUsed

enum IfxEth_RingModeBufferUsed

Buffer(s) used in ring mode.

Enumerator
IfxEth_RingModeBufferUsed_buffer1 | Buffer 1 used.
IfxEth_RingModeBufferUsed_buffer2 | Buffer 2 used.
IfxEth_RingModeBufferUsed_bothBuffers | BOth Buffers used.

Definition at line 125 of file IfxEth.h.

◆ IfxEth_TransmitProcessState

enum IfxEth_TransmitProcessState

indicates the Transmit DMA FSM state

Enumerator
IfxEth_TransmitProcessState_reset | Stopped; Reset or Stop Transmit Command issued.
IfxEth_TransmitProcessState_fetching | Running; Fetching Transmit Transfer Descriptor.
IfxEth_TransmitProcessState_waiting | Running; Waiting for status.
IfxEth_TransmitProcessState_reading | Running; Reading Data from host memory buffer and queuing it to transmit buffer (Tx FIFO)
IfxEth_TransmitProcessState_timestampWrite | TIME_STAMP write state.
IfxEth_TransmitProcessState_none | Reserved for future use.
IfxEth_TransmitProcessState_suspended | Suspended; Transmit Descriptor Unavailable or Transmit Buffer Underflow.
IfxEth_TransmitProcessState_closing | Running; Closing Transmit Descriptor.

Definition at line 134 of file IfxEth.h.


iLLD_TC26B: ETH Pin Mapping

Data Structures | Macros | Variables
ETH Pin Mapping
iLLD » ETH
Collaboration diagram for ETH Pin Mapping:

Data Structures

struct | IfxEth_Crs_In
CRS pin mapping structure. More...
struct | IfxEth_Crsdv_In
CRSDV pin mapping structure. More...
struct | IfxEth_Rxdv_In
RXDV pin mapping structure. More...
struct | IfxEth_Refclk_In
REFCLK pin mapping structure. More...
struct | IfxEth_Rxclk_In
RXCLK pin mapping structure. More...
struct | IfxEth_Txclk_In
TXCLK pin mapping structure. More...
struct | IfxEth_Rxd_In
RXD pin mapping structure. More...
struct | IfxEth_Col_In
COL pin mapping structure. More...
struct | IfxEth_Mdc_Out
MDC pin mapping structure. More...
struct | IfxEth_Mdio_InOut
MDIO pin mapping structure. More...
struct | IfxEth_Txd_Out
TXD pin mapping structure. More...
struct | IfxEth_Txen_Out
TXEN pin mapping structure. More...
struct | IfxEth_Txer_Out
TXER pin mapping structure. More...
struct | IfxEth_Rxer_In
RXER pin mapping structure. More...

Macros

#define | IFXETH_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3
#define | IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7
#define | IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
ETH_CRSDVA: ETH input. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
ETH_MDIOA: ETH input/output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT
ETH_MDIOD: ETH input/output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
ETH_MDIO: ETH output (Not for production purposes) More...
IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
ETH_REFCLK: ETH input. More...
IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
ETH_RXCLKA: ETH input (Not for productive purposes) More...
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN
ETH_RXD0: ETH input. More...
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
ETH_RXD1: ETH input. More...
IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
ETH_RXERB: ETH input. More...
IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
ETH_TXCLKB: ETH input (Not for productive purposes) More...
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
ETH_TXD0: ETH output. More...
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
ETH_TXD1: ETH output. More...
IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
ETH_TXEN: ETH output. More...
IFX_EXTERN const IfxEth_Crsdv_In * | IfxEth_Crsdv_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxEth_Crsdv_In table. More...
IFX_EXTERN const IfxEth_Mdc_Out * | IfxEth_Mdc_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxEth_Mdc_Out table. More...
IFX_EXTERN const IfxEth_Mdio_InOut * | IfxEth_Mdio_InOut_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxEth_Mdio_InOut table. More...
IFX_EXTERN const IfxEth_Refclk_In * | IfxEth_Refclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxEth_Refclk_In table. More...
IFX_EXTERN const IfxEth_Rxclk_In * | IfxEth_Rxclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxEth_Rxclk_In table. More...
IFX_EXTERN const IfxEth_Rxd_In * | IfxEth_Rxd_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxEth_Rxd_In table. More...
IFX_EXTERN const IfxEth_Rxer_In * | IfxEth_Rxer_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxEth_Rxer_In table. More...
IFX_EXTERN const IfxEth_Txclk_In * | IfxEth_Txclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxEth_Txclk_In table. More...
IFX_EXTERN const IfxEth_Txd_Out * | IfxEth_Txd_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEth_Txd_Out table. More...
IFX_EXTERN const IfxEth_Txen_Out * | IfxEth_Txen_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEth_Txen_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxEth_Crs_In

struct IfxEth_Crs_In

CRS pin mapping structure.

Definition at line 39 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Crs_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Crsdv_In

struct IfxEth_Crsdv_In

CRSDV pin mapping structure.

Definition at line 47 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Crsdv_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Rxdv_In

struct IfxEth_Rxdv_In

RXDV pin mapping structure.

Definition at line 55 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Rxdv_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Refclk_In

struct IfxEth_Refclk_In

REFCLK pin mapping structure.

Definition at line 63 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Refclk_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Rxclk_In

struct IfxEth_Rxclk_In

RXCLK pin mapping structure.

Definition at line 71 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Rxclk_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Txclk_In

struct IfxEth_Txclk_In

TXCLK pin mapping structure.

Definition at line 79 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Txclk_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Rxd_In

struct IfxEth_Rxd_In

RXD pin mapping structure.

Definition at line 87 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Rxd_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Col_In

struct IfxEth_Col_In

COL pin mapping structure.

Definition at line 95 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Col_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxEth_Mdc_Out

struct IfxEth_Mdc_Out

MDC pin mapping structure.

Definition at line 103 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Mdc_Out:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEth_Mdio_InOut

struct IfxEth_Mdio_InOut

MDIO pin mapping structure.

Definition at line 111 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Mdio_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_ETH * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

◆ IfxEth_Txd_Out

struct IfxEth_Txd_Out

TXD pin mapping structure.

Definition at line 120 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Txd_Out:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEth_Txen_Out

struct IfxEth_Txen_Out

TXEN pin mapping structure.

Definition at line 128 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Txen_Out:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEth_Txer_Out

struct IfxEth_Txer_Out

TXER pin mapping structure.

Definition at line 136 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Txer_Out:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxEth_Rxer_In

struct IfxEth_Rxer_In

RXER pin mapping structure.

Definition at line 144 of file IfxEth_PinMap.h.

Collaboration diagram for IfxEth_Rxer_In:
[legend]
Data Fields
Ifx_ETH * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

Macro Definition Documentation

◆ IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS

#define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1

Definition at line 170 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_MDC_OUT_NUM_ITEMS

#define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3

Definition at line 171 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS

#define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7

Definition at line 172 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_NUM_MODULES

#define IFXETH_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 169 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS

#define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1

Definition at line 173 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS

#define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1

Definition at line 174 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_RXD_IN_NUM_ITEMS

#define IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1

Definition at line 175 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_RXER_IN_NUM_ITEMS

#define IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2

Definition at line 176 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS

#define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2

Definition at line 177 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2

Definition at line 178 of file IfxEth_PinMap.h.

◆ IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS

#define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1

Definition at line 179 of file IfxEth_PinMap.h.

Variable Documentation

◆ IfxEth_Crsdv_In_pinTable

IFX_EXTERN const IfxEth_Crsdv_In* IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]

IfxEth_Crsdv_In table.

Definition at line 183 of file IfxEth_PinMap.h.

◆ IfxEth_CRSDVA_P11_11_IN

IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN

ETH_CRSDVA: ETH input.

Definition at line 151 of file IfxEth_PinMap.h.

◆ IfxEth_Mdc_Out_pinTable

IFX_EXTERN const IfxEth_Mdc_Out* IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]

IfxEth_Mdc_Out table.

Definition at line 186 of file IfxEth_PinMap.h.

◆ IfxEth_MDC_P02_8_OUT

IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT

ETH_MDC: ETH output.

Definition at line 152 of file IfxEth_PinMap.h.

◆ IfxEth_MDC_P21_0_OUT

IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT

ETH_MDC: ETH output.

Definition at line 153 of file IfxEth_PinMap.h.

◆ IfxEth_MDC_P21_2_OUT

IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT

ETH_MDC: ETH output.

Definition at line 154 of file IfxEth_PinMap.h.

◆ IfxEth_Mdio_InOut_pinTable

IFX_EXTERN const IfxEth_Mdio_InOut* IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]

IfxEth_Mdio_InOut table.

Definition at line 189 of file IfxEth_PinMap.h.

◆ IfxEth_MDIO_P21_1_INOUT

IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT

ETH_MDIO: ETH output (Not for production purposes)

Definition at line 157 of file IfxEth_PinMap.h.

◆ IfxEth_MDIOA_P00_0_INOUT

IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT

ETH_MDIOA: ETH input/output.

Definition at line 155 of file IfxEth_PinMap.h.

◆ IfxEth_MDIOD_P21_3_INOUT

IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT

ETH_MDIOD: ETH input/output.

Definition at line 156 of file IfxEth_PinMap.h.

◆ IfxEth_Refclk_In_pinTable

IFX_EXTERN const IfxEth_Refclk_In* IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]

IfxEth_Refclk_In table.

Definition at line 192 of file IfxEth_PinMap.h.

◆ IfxEth_REFCLK_P11_12_IN

IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN

ETH_REFCLK: ETH input.

Definition at line 158 of file IfxEth_PinMap.h.

◆ IfxEth_Rxclk_In_pinTable

IFX_EXTERN const IfxEth_Rxclk_In* IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]

IfxEth_Rxclk_In table.

Definition at line 195 of file IfxEth_PinMap.h.

◆ IfxEth_RXCLKA_P11_12_IN

IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN

ETH_RXCLKA: ETH input (Not for productive purposes)

Definition at line 159 of file IfxEth_PinMap.h.

◆ IfxEth_RXD0_P11_10_IN

IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN

ETH_RXD0: ETH input.

Definition at line 160 of file IfxEth_PinMap.h.

◆ IfxEth_RXD1_P11_9_IN

IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN

ETH_RXD1: ETH input.

Definition at line 161 of file IfxEth_PinMap.h.

◆ IfxEth_Rxd_In_pinTable

IFX_EXTERN const IfxEth_Rxd_In* IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]

IfxEth_Rxd_In table.

Definition at line 198 of file IfxEth_PinMap.h.

◆ IfxEth_Rxer_In_pinTable

IFX_EXTERN const IfxEth_Rxer_In* IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]

IfxEth_Rxer_In table.

Definition at line 201 of file IfxEth_PinMap.h.

◆ IfxEth_RXERB_P21_7_IN

IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN

ETH_RXERB: ETH input.

Definition at line 162 of file IfxEth_PinMap.h.

◆ IfxEth_Txclk_In_pinTable

IFX_EXTERN const IfxEth_Txclk_In* IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]

IfxEth_Txclk_In table.

Definition at line 204 of file IfxEth_PinMap.h.

◆ IfxEth_TXCLKB_P11_12_IN

IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN

ETH_TXCLKB: ETH input (Not for productive purposes)

Definition at line 163 of file IfxEth_PinMap.h.

◆ IfxEth_TXD0_P11_3_OUT

IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT

ETH_TXD0: ETH output.

Definition at line 164 of file IfxEth_PinMap.h.

◆ IfxEth_TXD1_P11_2_OUT

IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT

ETH_TXD1: ETH output.

Definition at line 165 of file IfxEth_PinMap.h.

◆ IfxEth_Txd_Out_pinTable

IFX_EXTERN const IfxEth_Txd_Out* IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]

IfxEth_Txd_Out table.

Definition at line 207 of file IfxEth_PinMap.h.

◆ IfxEth_Txen_Out_pinTable

IFX_EXTERN const IfxEth_Txen_Out* IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]

IfxEth_Txen_Out table.

Definition at line 210 of file IfxEth_PinMap.h.

◆ IfxEth_TXEN_P11_6_OUT

IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT

ETH_TXEN: ETH output.

Definition at line 166 of file IfxEth_PinMap.h.


iLLD_TC26B: PHY_PEF7071

Modules
PHY_PEF7071
iLLD » ETH
Collaboration diagram for PHY_PEF7071:

Modules

Functions

Detailed Description


iLLD_TC26B: Functions

Functions
Functions
iLLD » ETH » PHY_PEF7071
Collaboration diagram for Functions:

Functions

IFX_EXTERN uint32 | IfxEth_Phy_Pef7071_init (void)
IFX_EXTERN boolean | IfxEth_Phy_Pef7071_link (void)
IFX_EXTERN void | IfxEth_Phy_Pef7071_read_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 *pdata)
IFX_EXTERN void | IfxEth_Phy_Pef7071_write_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 data)
IFX_EXTERN void | IfxEth_Phy_Pef7071_write_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY. More...
IFX_EXTERN void | IfxEth_Phy_Pef7071_read_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY. More...

Detailed Description

Function Documentation

◆ IfxEth_Phy_Pef7071_init()

IFX_EXTERN uint32 IfxEth_Phy_Pef7071_init ( void )
Returns
Status

Definition at line 123 of file IfxEth_Phy_Pef7071.c.

◆ IfxEth_Phy_Pef7071_link()

IFX_EXTERN boolean IfxEth_Phy_Pef7071_link ( void )
Returns
Link status

Definition at line 161 of file IfxEth_Phy_Pef7071.c.

◆ IfxEth_Phy_Pef7071_read_mdio_reg()

IFX_EXTERN void IfxEth_Phy_Pef7071_read_mdio_reg | ( | uint32 | layeraddr,
 |  | uint32 | regaddr,
 |  | uint32 * | pdata
 | ) |  |
Returns
None

Definition at line 176 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init(), IfxEth_Phy_Pef7071_link(), and IfxEth_Phy_Pef7071_read_mmd_indirect().

◆ IfxEth_Phy_Pef7071_read_mmd_indirect()

IFX_EXTERN void IfxEth_Phy_Pef7071_read_mmd_indirect | ( | uint32 | layeraddr,
 |  | uint32 | devaddr,
 |  | uint32 | regaddr,
 |  | uint32 | data
 | ) |  |

Read data from MMD register of PHY.

Parameters
layeraddr | physical layer address
devaddr | Device address in PHY
regaddr | Register address in PHY
data | Data from PHY register
Returns
None

Definition at line 213 of file IfxEth_Phy_Pef7071.c.

◆ IfxEth_Phy_Pef7071_write_mdio_reg()

IFX_EXTERN void IfxEth_Phy_Pef7071_write_mdio_reg | ( | uint32 | layeraddr,
 |  | uint32 | regaddr,
 |  | uint32 | data
 | ) |  |
Returns
None

Definition at line 188 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init(), IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IfxEth_Phy_Pef7071_write_mmd_indirect()

IFX_EXTERN void IfxEth_Phy_Pef7071_write_mmd_indirect | ( | uint32 | layeraddr,
 |  | uint32 | devaddr,
 |  | uint32 | regaddr,
 |  | uint32 | data
 | ) |  |

Write the data into the MMD register of PHY.

Parameters
layeraddr | physical layer address
devaddr | Device address in PHY
regaddr | Register address in PHY
data | Data to be written
Returns
None

Definition at line 200 of file IfxEth_Phy_Pef7071.c.


iLLD_TC26B: IfxEth_cfg.h File Reference

  • _Impl
Macros
IfxEth_cfg.h File Reference
iLLD » ETH

ETH on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXETH_MAX_TIMEOUT_VALUE 1000
#define | IFXETH_NUM_MODULES (1)

Detailed Description

ETH on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEth_cfg.h.

Macro Definition Documentation

◆ IFXETH_MAX_TIMEOUT_VALUE

#define IFXETH_MAX_TIMEOUT_VALUE 1000

Definition at line 43 of file IfxEth_cfg.h.

Referenced by IfxEth_init().

◆ IFXETH_NUM_MODULES

#define IFXETH_NUM_MODULES (1)

Definition at line 45 of file IfxEth_cfg.h.


iLLD_TC26B: IfxEth_PinMap.c File Reference

  • _PinMap
Variables
IfxEth_PinMap.c File Reference
iLLD » ETH

ETH I/O map. More...

#include "IfxEth_PinMap.h"
Include dependency graph for IfxEth_PinMap.c:

Go to the source code of this file.

Variables

IfxEth_Crsdv_In | IfxEth_CRSDVA_P11_11_IN = {&MODULE_ETH, {&MODULE_P11,11}, Ifx_RxSel_a}
IfxEth_Mdc_Out | IfxEth_MDC_P02_8_OUT = {&MODULE_ETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6}
IfxEth_Mdc_Out | IfxEth_MDC_P21_0_OUT = {&MODULE_ETH, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt6}
IfxEth_Mdc_Out | IfxEth_MDC_P21_2_OUT = {&MODULE_ETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5}
IfxEth_Mdio_InOut | IfxEth_MDIOA_P00_0_INOUT = {&MODULE_ETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_alt1}
IfxEth_Mdio_InOut | IfxEth_MDIOD_P21_3_INOUT = {&MODULE_ETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_alt1}
IfxEth_Mdio_InOut | IfxEth_MDIO_P21_1_INOUT = {&MODULE_ETH, {&MODULE_P21, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxEth_Refclk_In | IfxEth_REFCLK_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a}
IfxEth_Rxclk_In | IfxEth_RXCLKA_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a}
IfxEth_Rxd_In | IfxEth_RXD0_P11_10_IN = {&MODULE_ETH, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxEth_Rxd_In | IfxEth_RXD1_P11_9_IN = {&MODULE_ETH, {&MODULE_P11, 9}, Ifx_RxSel_a}
IfxEth_Rxer_In | IfxEth_RXERB_P21_7_IN = {&MODULE_ETH, {&MODULE_P21, 7}, Ifx_RxSel_b}
IfxEth_Txclk_In | IfxEth_TXCLKB_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_b}
IfxEth_Txd_Out | IfxEth_TXD0_P11_3_OUT = {&MODULE_ETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6}
IfxEth_Txd_Out | IfxEth_TXD1_P11_2_OUT = {&MODULE_ETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6}
IfxEth_Txen_Out | IfxEth_TXEN_P11_6_OUT = {&MODULE_ETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6}
const IfxEth_Crsdv_In * | IfxEth_Crsdv_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
const IfxEth_Mdc_Out * | IfxEth_Mdc_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
const IfxEth_Mdio_InOut * | IfxEth_Mdio_InOut_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
const IfxEth_Refclk_In * | IfxEth_Refclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
const IfxEth_Rxclk_In * | IfxEth_Rxclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
const IfxEth_Rxd_In * | IfxEth_Rxd_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
const IfxEth_Rxer_In * | IfxEth_Rxer_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
const IfxEth_Txclk_In * | IfxEth_Txclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
const IfxEth_Txd_Out * | IfxEth_Txd_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
const IfxEth_Txen_Out * | IfxEth_Txen_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]

Detailed Description

ETH I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEth_PinMap.c.

Variable Documentation

◆ IfxEth_Crsdv_In_pinTable

const IfxEth_Crsdv_In* IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_CRSDVA_P11_11_IN
}
}
IfxEth_CRSDVA_P11_11_IN
IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
Definition: IfxEth_PinMap.c:28

Definition at line 46 of file IfxEth_PinMap.c.

◆ IfxEth_CRSDVA_P11_11_IN

IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN = {&MODULE_ETH, {&MODULE_P11,11}, Ifx_RxSel_a}

Definition at line 28 of file IfxEth_PinMap.c.

◆ IfxEth_Mdc_Out_pinTable

const IfxEth_Mdc_Out* IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_MDC_P02_8_OUT,
&IfxEth_MDC_P21_0_OUT,
&IfxEth_MDC_P21_2_OUT
}
}
IfxEth_MDC_P21_0_OUT
IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
Definition: IfxEth_PinMap.c:30
IfxEth_MDC_P02_8_OUT
IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
Definition: IfxEth_PinMap.c:29
IfxEth_MDC_P21_2_OUT
IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
Definition: IfxEth_PinMap.c:31

Definition at line 52 of file IfxEth_PinMap.c.

◆ IfxEth_MDC_P02_8_OUT

IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT = {&MODULE_ETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6}

Definition at line 29 of file IfxEth_PinMap.c.

◆ IfxEth_MDC_P21_0_OUT

IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT = {&MODULE_ETH, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt6}

Definition at line 30 of file IfxEth_PinMap.c.

◆ IfxEth_MDC_P21_2_OUT

IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT = {&MODULE_ETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5}

Definition at line 31 of file IfxEth_PinMap.c.

◆ IfxEth_Mdio_InOut_pinTable

const IfxEth_Mdio_InOut* IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxEth_MDIOA_P00_0_INOUT,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR,
&IfxEth_MDIO_P21_1_INOUT
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEth_MDIOA_P00_0_INOUT
IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
Definition: IfxEth_PinMap.c:32
IfxEth_MDIO_P21_1_INOUT
IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
Definition: IfxEth_PinMap.c:34

Definition at line 60 of file IfxEth_PinMap.c.

◆ IfxEth_MDIO_P21_1_INOUT

IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT = {&MODULE_ETH, {&MODULE_P21, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 34 of file IfxEth_PinMap.c.

◆ IfxEth_MDIOA_P00_0_INOUT

IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT = {&MODULE_ETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_alt1}

Definition at line 32 of file IfxEth_PinMap.c.

◆ IfxEth_MDIOD_P21_3_INOUT

IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT = {&MODULE_ETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_alt1}

Definition at line 33 of file IfxEth_PinMap.c.

◆ IfxEth_Refclk_In_pinTable

const IfxEth_Refclk_In* IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_REFCLK_P11_12_IN
}
}
IfxEth_REFCLK_P11_12_IN
IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
Definition: IfxEth_PinMap.c:35

Definition at line 72 of file IfxEth_PinMap.c.

◆ IfxEth_REFCLK_P11_12_IN

IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a}

Definition at line 35 of file IfxEth_PinMap.c.

◆ IfxEth_Rxclk_In_pinTable

const IfxEth_Rxclk_In* IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_RXCLKA_P11_12_IN
}
}
IfxEth_RXCLKA_P11_12_IN
IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
Definition: IfxEth_PinMap.c:36

Definition at line 78 of file IfxEth_PinMap.c.

◆ IfxEth_RXCLKA_P11_12_IN

IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a}

Definition at line 36 of file IfxEth_PinMap.c.

◆ IfxEth_RXD0_P11_10_IN

IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN = {&MODULE_ETH, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 37 of file IfxEth_PinMap.c.

◆ IfxEth_RXD1_P11_9_IN

IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN = {&MODULE_ETH, {&MODULE_P11, 9}, Ifx_RxSel_a}

Definition at line 38 of file IfxEth_PinMap.c.

◆ IfxEth_Rxd_In_pinTable

const IfxEth_Rxd_In* IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_RXD1_P11_9_IN
}
}
IfxEth_RXD1_P11_9_IN
IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
Definition: IfxEth_PinMap.c:38

Definition at line 84 of file IfxEth_PinMap.c.

◆ IfxEth_Rxer_In_pinTable

const IfxEth_Rxer_In* IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxEth_RXERB_P21_7_IN
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEth_RXERB_P21_7_IN
IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
Definition: IfxEth_PinMap.c:39

Definition at line 90 of file IfxEth_PinMap.c.

◆ IfxEth_RXERB_P21_7_IN

IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN = {&MODULE_ETH, {&MODULE_P21, 7}, Ifx_RxSel_b}

Definition at line 39 of file IfxEth_PinMap.c.

◆ IfxEth_Txclk_In_pinTable

const IfxEth_Txclk_In* IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
&IfxEth_TXCLKB_P11_12_IN
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEth_TXCLKB_P11_12_IN
IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
Definition: IfxEth_PinMap.c:40

Definition at line 97 of file IfxEth_PinMap.c.

◆ IfxEth_TXCLKB_P11_12_IN

IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_b}

Definition at line 40 of file IfxEth_PinMap.c.

◆ IfxEth_TXD0_P11_3_OUT

IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT = {&MODULE_ETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6}

Definition at line 41 of file IfxEth_PinMap.c.

◆ IfxEth_TXD1_P11_2_OUT

IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT = {&MODULE_ETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6}

Definition at line 42 of file IfxEth_PinMap.c.

◆ IfxEth_Txd_Out_pinTable

const IfxEth_Txd_Out* IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_TXD1_P11_2_OUT,
&IfxEth_TXD0_P11_3_OUT
}
}
IfxEth_TXD0_P11_3_OUT
IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
Definition: IfxEth_PinMap.c:41
IfxEth_TXD1_P11_2_OUT
IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
Definition: IfxEth_PinMap.c:42

Definition at line 104 of file IfxEth_PinMap.c.

◆ IfxEth_Txen_Out_pinTable

const IfxEth_Txen_Out* IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxEth_TXEN_P11_6_OUT
}
}
IfxEth_TXEN_P11_6_OUT
IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
Definition: IfxEth_PinMap.c:43

Definition at line 111 of file IfxEth_PinMap.c.

◆ IfxEth_TXEN_P11_6_OUT

IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT = {&MODULE_ETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6}

Definition at line 43 of file IfxEth_PinMap.c.


iLLD_TC26B: IfxEth_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxEth_PinMap.h File Reference
iLLD » ETH

ETH I/O map. More...

#include <IfxEth_reg.h>
#include <_Impl/IfxEth_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxEth_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxEth_Crs_In
CRS pin mapping structure. More...
struct | IfxEth_Crsdv_In
CRSDV pin mapping structure. More...
struct | IfxEth_Rxdv_In
RXDV pin mapping structure. More...
struct | IfxEth_Refclk_In
REFCLK pin mapping structure. More...
struct | IfxEth_Rxclk_In
RXCLK pin mapping structure. More...
struct | IfxEth_Txclk_In
TXCLK pin mapping structure. More...
struct | IfxEth_Rxd_In
RXD pin mapping structure. More...
struct | IfxEth_Col_In
COL pin mapping structure. More...
struct | IfxEth_Mdc_Out
MDC pin mapping structure. More...
struct | IfxEth_Mdio_InOut
MDIO pin mapping structure. More...
struct | IfxEth_Txd_Out
TXD pin mapping structure. More...
struct | IfxEth_Txen_Out
TXEN pin mapping structure. More...
struct | IfxEth_Txer_Out
TXER pin mapping structure. More...
struct | IfxEth_Rxer_In
RXER pin mapping structure. More...

Macros

#define | IFXETH_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3
#define | IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7
#define | IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1
#define | IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2
#define | IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
ETH_CRSDVA: ETH input. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
ETH_MDC: ETH output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
ETH_MDIOA: ETH input/output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT
ETH_MDIOD: ETH input/output. More...
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
ETH_MDIO: ETH output (Not for production purposes) More...
IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
ETH_REFCLK: ETH input. More...
IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
ETH_RXCLKA: ETH input (Not for productive purposes) More...
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN
ETH_RXD0: ETH input. More...
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
ETH_RXD1: ETH input. More...
IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
ETH_RXERB: ETH input. More...
IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
ETH_TXCLKB: ETH input (Not for productive purposes) More...
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
ETH_TXD0: ETH output. More...
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
ETH_TXD1: ETH output. More...
IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
ETH_TXEN: ETH output. More...
IFX_EXTERN const IfxEth_Crsdv_In * | IfxEth_Crsdv_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxEth_Crsdv_In table. More...
IFX_EXTERN const IfxEth_Mdc_Out * | IfxEth_Mdc_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxEth_Mdc_Out table. More...
IFX_EXTERN const IfxEth_Mdio_InOut * | IfxEth_Mdio_InOut_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxEth_Mdio_InOut table. More...
IFX_EXTERN const IfxEth_Refclk_In * | IfxEth_Refclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxEth_Refclk_In table. More...
IFX_EXTERN const IfxEth_Rxclk_In * | IfxEth_Rxclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxEth_Rxclk_In table. More...
IFX_EXTERN const IfxEth_Rxd_In * | IfxEth_Rxd_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxEth_Rxd_In table. More...
IFX_EXTERN const IfxEth_Rxer_In * | IfxEth_Rxer_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxEth_Rxer_In table. More...
IFX_EXTERN const IfxEth_Txclk_In * | IfxEth_Txclk_In_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxEth_Txclk_In table. More...
IFX_EXTERN const IfxEth_Txd_Out * | IfxEth_Txd_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEth_Txd_Out table. More...
IFX_EXTERN const IfxEth_Txen_Out * | IfxEth_Txen_Out_pinTable [IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEth_Txen_Out table. More...

Detailed Description

ETH I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEth_PinMap.h.


iLLD_TC26B: IfxEth_Phy_Pef7071.h File Reference

  • Eth
  • Phy_Pef7071
Functions | Variables
IfxEth_Phy_Pef7071.h File Reference
iLLD » ETH

ETH PHY_PEF7071 details. More...

#include "Eth/Std/IfxEth.h"
Include dependency graph for IfxEth_Phy_Pef7071.h:

Go to the source code of this file.

Functions

IFX_EXTERN uint32 | IfxEth_Phy_Pef7071_init (void)
IFX_EXTERN boolean | IfxEth_Phy_Pef7071_link (void)
IFX_EXTERN void | IfxEth_Phy_Pef7071_read_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 *pdata)
IFX_EXTERN void | IfxEth_Phy_Pef7071_write_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 data)
IFX_EXTERN void | IfxEth_Phy_Pef7071_write_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY. More...
IFX_EXTERN void | IfxEth_Phy_Pef7071_read_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY. More...

Variables

IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone

Detailed Description

ETH PHY_PEF7071 details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEth_Phy_Pef7071.h.

Variable Documentation

◆ IfxEth_Phy_Pef7071_iPhyInitDone

IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone

Definition at line 89 of file IfxEth_Phy_Pef7071.h.


iLLD_TC26B: IfxEth.h File Reference

  • Eth
  • Std
Data Structures | Macros | Enumerations | Functions | Variables
IfxEth.h File Reference
iLLD » ETH

ETH basic functionality. More...

#include "_Impl/IfxEth_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "IfxEth_reg.h"
#include "IfxEth_bf.h"
#include "_PinMap/IfxEth_PinMap.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxEth.h:

Go to the source code of this file.

Data Structures

struct | IfxEth_AltRxDescr0_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_AltRxDescr1_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_AltTxDescr0_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_AltTxDescr1_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access. More...
union | IfxEth_RxDescr0
Union for RX descriptor DWORD 0. More...
union | IfxEth_RxDescr1
Union for RX descriptor DWORD 1. More...
union | IfxEth_RxDescr2
Union for RX descriptor DWORD 2. More...
union | IfxEth_RxDescr3
Union for RX descriptor DWORD 3. More...
union | IfxEth_TxDescr0
Union for TX descriptor DWORD 0. More...
union | IfxEth_TxDescr1
Union for TX descriptor DWORD 1. More...
union | IfxEth_TxDescr2
Union for TX descriptor DWORD 2. More...
union | IfxEth_TxDescr3
Union for TX descriptor DWORD 3. More...
struct | IfxEth_RingModeRxBuffersConfig
Configuration structure for Ring Mode Receive Buffers. More...
struct | IfxEth_RingModeTxBuffersConfig
Configuration structure for Ring Mode Transmit buffers. More...
struct | IfxEth_RxDescr
Normal RX descriptor. More...
struct | IfxEth_TxDescr
Normal TX descriptor. More...
struct | IfxEth_MiiPins
Port pins for MII mode configuration. More...
struct | IfxEth_RingModeBuffersConfig
Configuration structure for Ring Mode descriptors. More...
struct | IfxEth_RmiiPins
Port pins for RMII mode configuration. More...
union | IfxEth_RxDescrList
union | IfxEth_TxDescrList
struct | IfxEth_Config
ETH configuration structure. More...
struct | IfxEth
ETH driver structure. More...
struct | IfxEth_RxDescr0_Bits
Structure for RX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_RxDescr1_Bits
Structure for RX descriptor DWORD 1 Bit field access. More...
struct | IfxEth_TxDescr0_Bits
Structure for TX descriptor DWORD 0 Bit field access. More...
struct | IfxEth_TxDescr1_Bits
Structure for TX descriptor DWORD 1 Bit field access. More...

Macros

#define | IFXETH_RTX_BUFFER_SIZE 1536
Size of one ethernet frame buffer. More...
#define | IFXETH_MAX_RX_BUFFERS 8
Rx buffers (ring mode) More...
#define | IFXETH_MAX_TX_BUFFERS 16
Tx buffers (ring mode) More...
#define | IFXETH_DESCR_SIZE 4
4 DWORDS (16 bytes) More...

Enumerations

enum IfxEth_ChecksumMode {
IfxEth_ChecksumMode_bypass = 0,
IfxEth_ChecksumMode_ipv4 = 1,
IfxEth_ChecksumMode_tcpUdpIcmpSegment = 2,
IfxEth_ChecksumMode_tcpUdpIcmpFull = 3
}
enum IfxEth_DescriptorMode {
IfxEth_DescriptorMode_chain,
IfxEth_DescriptorMode_ring
}
enum IfxEth_PhyInterfaceMode {
IfxEth_PhyInterfaceMode_mii,
IfxEth_PhyInterfaceMode_rmii
}
External Phy Interface RMII Mode. More...
enum IfxEth_ReceiveProcessState {
IfxEth_ReceiveProcessState_reset,
IfxEth_ReceiveProcessState_fetching,
IfxEth_ReceiveProcessState_none,
IfxEth_ReceiveProcessState_waiting,
IfxEth_ReceiveProcessState_suspended,
IfxEth_ReceiveProcessState_closing,
IfxEth_ReceiveProcessState_timestampWrite,
IfxEth_ReceiveProcessState_transfering
}
indicates the Receive DMA FSM state More...
enum IfxEth_RingModeBufferUsed {
IfxEth_RingModeBufferUsed_buffer1,
IfxEth_RingModeBufferUsed_buffer2,
IfxEth_RingModeBufferUsed_bothBuffers
}
Buffer(s) used in ring mode. More...
enum IfxEth_TransmitProcessState {
IfxEth_TransmitProcessState_reset,
IfxEth_TransmitProcessState_fetching,
IfxEth_TransmitProcessState_waiting,
IfxEth_TransmitProcessState_reading,
IfxEth_TransmitProcessState_timestampWrite,
IfxEth_TransmitProcessState_none,
IfxEth_TransmitProcessState_suspended,
IfxEth_TransmitProcessState_closing
}
indicates the Transmit DMA FSM state More...

Functions

IFX_INLINE void | IfxEth_RxDescr_setBuffer (IfxEth_RxDescr *descr, void *buffer)
Set buffer of an RX descriptor. More...
IFX_INLINE IfxEth_TxDescr * | IfxEth_TxDescr_getNext (IfxEth_TxDescr *descr)
Get pointer to next TX descriptor. More...
IFX_INLINE boolean | IfxEth_TxDescr_isAvailable (IfxEth_TxDescr *descr)
Return TRUE if a TX descriptor is available for setup. More...
IFX_INLINE void | IfxEth_TxDescr_setBuffer (IfxEth_TxDescr *descr, void *buffer)
Set buffer of a TX descriptor. More...
IFX_INLINE void | IfxEth_applySoftwareReset (IfxEth *eth)
Applies the Software Reset. More...
IFX_INLINE void | IfxEth_clearEriInterrupt (IfxEth *eth)
Clear Early Receive Interrupt request. More...
IFX_INLINE void | IfxEth_clearRxInterrupt (IfxEth *eth)
Clear receive interrupt request. More...
IFX_INLINE void | IfxEth_clearTuInterrupt (IfxEth *eth)
Clear Transmit Buffer Unavailable request. More...
IFX_INLINE void | IfxEth_clearTxInterrupt (IfxEth *eth)
Clear transmit interrupt request. More...
IFX_INLINE void | IfxEth_disableTimeStampCoarseUpdate (IfxEth *eth)
Disables Timestamp Fine or Coarse Update. More...
IFX_INLINE void | IfxEth_disableTimeStampForIpv4Frames (IfxEth *eth)
Disables Processing of PTP frames sent over IPV4 UDP. More...
IFX_INLINE void | IfxEth_enableMmcCounter (IfxEth *eth)
Enables theMMC counter. More...
IFX_INLINE void | IfxEth_enableTimeStamp (IfxEth *eth)
Enables the TimeStamp. More...
IFX_INLINE void | IfxEth_enableTimeStampCoarseUpdate (IfxEth *eth)
Enables Timestamp Fine or Coarse Update. More...
IFX_INLINE void | IfxEth_enableTimeStampForAllFrames (IfxEth *eth)
Enables the TimeStamp for All frames. More...
IFX_INLINE void | IfxEth_enableTimeStampForEthFrames (IfxEth *eth)
Enables Processing of PTP over Ethernet Frames. More...
IFX_INLINE void | IfxEth_enableTimeStampForIpv4Frames (IfxEth *eth)
Enables Processing of PTP frames sent over IPV4 UDP. More...
IFX_INLINE void | IfxEth_enableTimeStampForVer2Format (IfxEth *eth)
Enables PTP packet Processing for Version 2 Format. More...
IFX_INLINE boolean | IfxEth_getTimeStampInitialiseStatus (IfxEth *eth)
returns the status of the TimeStamp Initialisation More...
IFX_INLINE boolean | IfxEth_getTimeStampUpdateStatus (IfxEth *eth)
returns the status of the System Time updation More...
IFX_INLINE void | IfxEth_initialiseTimeStamp (IfxEth *eth)
Initialises the TimeStamp. More...
IFX_INLINE boolean | IfxEth_isSoftwareResetDone (IfxEth *eth)
Returns the status of Software Reset. More...
IFX_INLINE void | IfxEth_setAddToTimeUpdate (IfxEth *eth)
Sets addition, the time value is added with the contents of the update register. More...
IFX_INLINE void | IfxEth_setBinaryRolloverControl (IfxEth *eth, boolean enabled)
Enable/Disables Timestamp Digital or Binary Rollover Control. More...
IFX_INLINE void | IfxEth_setLoopbackMode (IfxEth *eth, boolean loopbackMode)
Sets the loopback mode. More...
IFX_INLINE void | IfxEth_setNanoSecondsUpdateValue (IfxEth *eth, uint8 value)
Sets the time in sub seconds representation, to be initialized or added to the system time. More...
IFX_INLINE void | IfxEth_setPhyInterfaceMode (IfxEth *eth, IfxEth_PhyInterfaceMode mode)
Sets the Phy Interface mode. More...
IFX_INLINE void | IfxEth_setReceiveDescriptorAddress (Ifx_ETH *eth, void *address)
Sets receive descriptor address. More...
IFX_INLINE void | IfxEth_setSecondsUpdateValue (IfxEth *eth, uint8 value)
Sets the time in seconds to be initialized or added to the system time. More...
IFX_INLINE void | IfxEth_setSubSecondIncrementValue (IfxEth *eth, uint8 value)
Sets the Sub Second Increment Value. More...
IFX_INLINE void | IfxEth_setSubtractToTimeUpdate (IfxEth *eth)
Sets subtraction, the time value is subtracted with the contents of the update register. More...
IFX_INLINE void | IfxEth_setTransmitDescriptorAddress (Ifx_ETH *eth, void *address)
Sets transmit descriptor address. More...
IFX_INLINE void | IfxEth_updateTimeStamp (IfxEth *eth)
Updates the System time with specified values in SECONDS and NANOSECONDS registers. More...
IFX_INLINE void * | IfxEth_waitTransmitBuffer (IfxEth *eth)
Waits for one TX buffer becomes available. More...
IFX_EXTERN void | IfxEth_freeReceiveBuffer (IfxEth *eth)
Free the receive buffer, enabling it for the further reception. More...
IFX_EXTERN void | IfxEth_sendTransmitBuffer (IfxEth *eth, uint16 len)
Request to send the transmit buffer. More...
IFX_EXTERN void | IfxEth_sendTransmitBuffersRingMode (IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer. More...
IFX_EXTERN void | IfxEth_setMacAddress (IfxEth *eth, const uint8 *macAddress)
Sets the MAC address. More...
IFX_EXTERN void | IfxEth_startReceiver (IfxEth *eth)
Start the receiver functions. More...
IFX_EXTERN void | IfxEth_stopReceiver (IfxEth *eth)
Stops the receiver functions. More...
IFX_EXTERN void | IfxEth_writeHeader (IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_RxDescr_getNext (IfxEth_RxDescr *descr)
Get pointer to next RX descriptor. More...
IFX_INLINE void | IfxEth_RxDescr_release (IfxEth_RxDescr *descr)
release RX descriptor More...
IFX_INLINE void | IfxEth_TxDescr_release (IfxEth_TxDescr *descr)
Release a TX descriptor for transmit queue. More...
IFX_INLINE void | IfxEth_clearMacConfiguration (void)
resets Ethernet Configuration register More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_getActualRxDescriptor (IfxEth *eth)
Get pointer to actual RX descriptor. More...
IFX_INLINE uint32 | IfxEth_getActualRxIndex (IfxEth *eth)
IFX_INLINE IfxEth_TxDescr * | IfxEth_getActualTxDescriptor (IfxEth *eth)
Get pointer to actual TX descriptor. More...
IFX_INLINE IfxEth_RxDescr * | IfxEth_getBaseRxDescriptor (IfxEth *eth)
Get pointer to base RX descriptor. More...
IFX_INLINE IfxEth_TxDescr * | IfxEth_getBaseTxDescriptor (IfxEth *eth)
Get pointer to base TX descriptor. More...
IFX_INLINE boolean | IfxEth_getLoopbackMode (IfxEth *eth)
returns the status of th eloopback mode More...
IFX_INLINE void * | IfxEth_getMacAddressPointer (IfxEth *eth)
Returns pointer to the MAC address configured for this ETH. More...
IFX_INLINE IfxEth_ReceiveProcessState | IfxEth_getReceiveProcessState (IfxEth *eth)
returns the Receive Process State More...
IFX_INLINE uint16 | IfxEth_getRxDataLength (IfxEth *eth)
Returns length of the oldest available RX data. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxEth_getSrcPointer (IfxEth *eth)
Returns the SRC pointer of Eth. More...
IFX_INLINE IfxEth_TransmitProcessState | IfxEth_getTransmitProcessState (IfxEth *eth)
returns the Transmit Process State More...
IFX_INLINE boolean | IfxEth_isEriInterrupt (IfxEth *eth)
Checks whether Early Receive interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isLinkActive (IfxEth *eth)
Checks whether physical connection is active. More...
IFX_INLINE boolean | IfxEth_isNisInterrupt (IfxEth *eth)
Checks whether NIS interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isRxChecksumError (IfxEth *eth)
IFX_INLINE boolean | IfxEth_isRxDataAvailable (IfxEth *eth)
Checks whether one or more RX data is available. More...
IFX_INLINE boolean | IfxEth_isRxInterrupt (IfxEth *eth)
Checks whether receive interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isTuInterrupt (IfxEth *eth)
Checks whether Transmit Buffer Unavailable interrupt is requested. More...
IFX_INLINE boolean | IfxEth_isTxInterrupt (IfxEth *eth)
Checks whether transmit interrupt is requested. More...
IFX_INLINE void | IfxEth_readAllFlags (IfxEth *eth)
reads the status of all flags More...
IFX_EXTERN void | IfxEth_disableModule (void)
Disable ETH Module. More...
IFX_EXTERN void | IfxEth_enableModule (void)
Enable ETH Module. More...
IFX_EXTERN void * | IfxEth_getReceiveBuffer (IfxEth *eth)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
IFX_EXTERN void * | IfxEth_getTransmitBuffer (IfxEth *eth)
Get a free transmit buffer. More...
IFX_EXTERN void | IfxEth_readMacAddress (IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register. More...
IFX_EXTERN void | IfxEth_resetModule (void)
resets Ethernet kernel More...
IFX_EXTERN void | IfxEth_setAndSendTransmitBuffer (IfxEth *eth, void *buffer, uint16 len)
IFX_EXTERN void | IfxEth_setupChecksumEngine (IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine. More...
IFX_EXTERN void | IfxEth_shuffleRxDescriptor (IfxEth *eth)
Shuffle to next RX descriptor. More...
IFX_EXTERN void | IfxEth_shuffleTxDescriptor (IfxEth *eth)
Shuffle to next TX descriptor. More...
IFX_EXTERN void | IfxEth_startTransmitter (IfxEth *eth)
Start the transmitter functions. More...
IFX_EXTERN void | IfxEth_stopTransmitter (IfxEth *eth)
Stop the transmitter functions. More...
IFX_EXTERN void | IfxEth_wakeupReceiver (IfxEth *eth)
Wakeup the receiver functions. More...
IFX_EXTERN void | IfxEth_wakeupTransmitter (IfxEth *eth)
Wakeup the transmitter functions. More...
IFX_INLINE void | IfxEth_TxDescr_setup (IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
Setup some properties of a TX descriptor. More...
IFX_INLINE void | IfxEth_setReceiveBuffer1RingMode (IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer1 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setReceiveBuffer2RingMode (IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer2 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setTransmitBuffer1RingMode (IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer1 of the receive descriptor along with its size. More...
IFX_INLINE void | IfxEth_setTransmitBuffer2RingMode (IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer2 of the receive descriptor along with its size. More...
IFX_EXTERN void | IfxEth_init (IfxEth *eth, const IfxEth_Config *config)
Initialises the driver. More...
IFX_EXTERN void | IfxEth_initConfig (IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure. More...
IFX_EXTERN void | IfxEth_initReceiveDescriptors (IfxEth *eth)
Initialises the receive descriptors. More...
IFX_EXTERN void | IfxEth_initReceiveDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors. More...
IFX_EXTERN void | IfxEth_initTransmitDescriptors (IfxEth *eth)
Initialises transmit descriptors. More...
IFX_EXTERN void | IfxEth_initTransmitDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors. More...
IFX_EXTERN void | IfxEth_setupMiiInputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins. More...
IFX_EXTERN void | IfxEth_setupMiiOutputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins More...
IFX_EXTERN void | IfxEth_setupRmiiInputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins. More...
IFX_EXTERN void | IfxEth_setupRmiiOutputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port More...

Variables

IFX_EXTERN uint8 IfxEth_rxBuffer [IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
receive buffers More...
IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr
IFX_EXTERN uint8 IfxEth_txBuffer [IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
Transmit buffers. More...
IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr

Detailed Description

ETH basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEth.h.

Macro Definition Documentation

◆ IFXETH_DESCR_SIZE

#define IFXETH_DESCR_SIZE 4

4 DWORDS (16 bytes)

Definition at line 79 of file IfxEth.h.

Referenced by IfxEth_init().

◆ IFXETH_MAX_RX_BUFFERS

#define IFXETH_MAX_RX_BUFFERS 8

Rx buffers (ring mode)

Definition at line 68 of file IfxEth.h.

Referenced by IfxEth_initReceiveDescriptors(), and IfxEth_initReceiveDescriptorsRingMode().

◆ IFXETH_MAX_TX_BUFFERS

#define IFXETH_MAX_TX_BUFFERS 16

Tx buffers (ring mode)

Definition at line 74 of file IfxEth.h.

Referenced by IfxEth_initTransmitDescriptors(), IfxEth_initTransmitDescriptorsRingMode(), and IfxEth_setupChecksumEngine().

◆ IFXETH_RTX_BUFFER_SIZE

#define IFXETH_RTX_BUFFER_SIZE 1536

Size of one ethernet frame buffer.

Definition at line 62 of file IfxEth.h.

Referenced by IfxEth_initConfig(), and IfxEth_initReceiveDescriptors().

Variable Documentation

◆ IfxEth_rxBuffer

IFX_EXTERN uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]

receive buffers

Definition at line 1193 of file IfxEth.h.

◆ IfxEth_rxDescr

IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr

Definition at line 1195 of file IfxEth.h.

◆ IfxEth_txBuffer

IFX_EXTERN uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]

Transmit buffers.

Definition at line 1199 of file IfxEth.h.

◆ IfxEth_txDescr

IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr

Definition at line 1201 of file IfxEth.h.


iLLD_TC26B: FCE

Modules | Files
FCE
iLLD
Collaboration diagram for FCE:

Modules

Implementation
Standard Driver
How to use the FCE CRC Interface driver?
CRC

Files

file | IfxFce_cfg.h
FCE on-chip implementation data.
file | IfxFce_Crc.h
FCE CRC details.
file | IfxFce.h
FCE basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » FCE
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » FCE
Collaboration diagram for Standard Driver:

Modules

Enumerations
Module Functions
Support Function
Interrupt Status Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » FCE » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxFce_Crc32Kernel {
IfxFce_Crc32Kernel_0 = 0,
IfxFce_Crc32Kernel_1
}
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32. More...
enum IfxFce_CrcMode {
IfxFce_CrcMode_8 = 0,
IfxFce_CrcMode_16 = 1,
IfxFce_CrcMode_32 = 2
}
Specifies the CRC mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxFce_Crc32Kernel

enum IfxFce_Crc32Kernel

Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32.

Enumerator
IfxFce_Crc32Kernel_0 | Specifies the kernel0 used for CRC-32.
IfxFce_Crc32Kernel_1 | Specifies the kernel1 used for CRC-32.

Definition at line 56 of file IfxFce.h.

◆ IfxFce_CrcMode

enum IfxFce_CrcMode

Specifies the CRC mode.

Enumerator
IfxFce_CrcMode_8 | Specifies the 8-bit CRC mode.
IfxFce_CrcMode_16 | Specifies the 16-bit CRC mode.
IfxFce_CrcMode_32 | Specifies the 32-bit CRC mode.

Definition at line 64 of file IfxFce.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » FCE » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxFce_disableModule (Ifx_FCE *fce)
Disable the control of FCE module. More...
IFX_INLINE void | IfxFce_enableModule (Ifx_FCE *fce)
Enable the control of FCE module. More...
IFX_EXTERN void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...

Detailed Description

Function Documentation

◆ IfxFce_disableModule()

IFX_INLINE void IfxFce_disableModule ( Ifx_FCE * fce )

Disable the control of FCE module.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 205 of file IfxFce.h.

◆ IfxFce_enableModule()

IFX_INLINE void IfxFce_enableModule ( Ifx_FCE * fce )

Enable the control of FCE module.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 214 of file IfxFce.h.

Referenced by IfxFce_Crc_initModule().

◆ IfxFce_resetModule()

IFX_EXTERN void IfxFce_resetModule ( Ifx_FCE * fce )

Reset the module by clearing the kernel.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 88 of file IfxFce.c.

Referenced by IfxFce_Crc_deInitModule().


iLLD_TC26B: Support Function

Functions
Support Function
iLLD » FCE » Standard Driver
Collaboration diagram for Support Function:

Functions

IFX_EXTERN uint32 IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...

Detailed Description

Function Documentation

◆ IfxFce_reflectCrc32()

IFX_EXTERN uint32 IfxFce_reflectCrc32 | ( | uint32 | crcStartValue,
 |  | uint8 | crcLength
 | ) |  |

Reflects the CRC data and returns it.

Parameters
crcStartValue | start value for reflection
crcLength | length of reflected value
Returns
Reflected CRC data

Definition at line 69 of file IfxFce.c.


iLLD_TC26B: Interrupt Status Functions

Functions
Interrupt Status Functions
iLLD » FCE » Standard Driver
Collaboration diagram for Interrupt Status Functions:

Functions

IFX_INLINE void | IfxFce_clearCrc16ErrorFlags (Ifx_FCE *fce)
Clears the CRC-16 error flags. More...
IFX_INLINE void | IfxFce_clearCrc32ErrorFlags (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Clears the CRC-32 error flags. More...
IFX_INLINE void | IfxFce_clearCrc8ErrorFlags (Ifx_FCE *fce)
Clears the CRC-8 error flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFce_getSrcPointer (Ifx_FCE *fce)
Returns the SRC pointer for FCE. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc16InterruptStatus (Ifx_FCE *fce)
Gets the CRC-16 interrupt status. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc32InterruptStatus (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc8InterruptStatus (Ifx_FCE *fce)
Gets the CRC-8 interrupt status. More...

Detailed Description

Function Documentation

◆ IfxFce_clearCrc16ErrorFlags()

IFX_INLINE void IfxFce_clearCrc16ErrorFlags ( Ifx_FCE * fce )

Clears the CRC-16 error flags.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 180 of file IfxFce.h.

Referenced by IfxFce_Crc_clearErrorFlags().

◆ IfxFce_clearCrc32ErrorFlags()

IFX_INLINE void IfxFce_clearCrc32ErrorFlags | ( | Ifx_FCE * | fce,
 |  | IfxFce_Crc32Kernel | crc32Kernel
 | ) |  |

Clears the CRC-32 error flags.

Parameters
fce | Specifies pointer to FCE module registers
crc32Kernel | Specifies the kernel used for CRC-32
Returns
None

Definition at line 186 of file IfxFce.h.

Referenced by IfxFce_Crc_clearErrorFlags().

◆ IfxFce_clearCrc8ErrorFlags()

IFX_INLINE void IfxFce_clearCrc8ErrorFlags ( Ifx_FCE * fce )

Clears the CRC-8 error flags.

Parameters
fce Specifies pointer to FCE module registers
Returns
None

Definition at line 199 of file IfxFce.h.

Referenced by IfxFce_Crc_clearErrorFlags().

◆ IfxFce_getCrc16InterruptStatus()

IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc16InterruptStatus ( Ifx_FCE * fce )

Gets the CRC-16 interrupt status.

Parameters
fce Specifies pointer to FCE module registers
Returns
Current CRC-16 interrupt status

Definition at line 36 of file IfxFce.c.

Referenced by IfxFce_Crc_getInterruptStatus().

◆ IfxFce_getCrc32InterruptStatus()

IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc32InterruptStatus | ( | Ifx_FCE * | fce,
 |  | IfxFce_Crc32Kernel | crc32Kernel
 | ) |  |

Gets the CRC-32 interrupt status.

Parameters
fce | Specifies pointer to FCE module registers
crc32Kernel | Specifies the kernel used for CRC-32
Returns
Current CRC-32 interrupt status

Definition at line 44 of file IfxFce.c.

Referenced by IfxFce_Crc_getInterruptStatus().

◆ IfxFce_getCrc8InterruptStatus()

IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc8InterruptStatus ( Ifx_FCE * fce )

Gets the CRC-8 interrupt status.

Parameters
fce Specifies pointer to FCE module registers
Returns
Current CRC-8 interrupt status

Definition at line 61 of file IfxFce.c.

Referenced by IfxFce_Crc_getInterruptStatus().

◆ IfxFce_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer ( Ifx_FCE * fce )

Returns the SRC pointer for FCE.

Parameters
fce Specifies pointer to FCE module registers

Definition at line 223 of file IfxFce.h.

Referenced by IfxFce_Crc_initModule().


iLLD_TC26B: How to use the FCE CRC Interface driver?

How to use the FCE CRC Interface driver?
iLLD » FCE
Collaboration diagram for How to use the FCE CRC Interface driver?:

FCE gives CRC-x(x= 8,16,32) message signatures. Kernel 3 is used for CRC-8,Kernel 2 is used for CRC-16,Kernel 0 1nd Kernel 1 is used for CRC-32.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Fce/Crc/IfxFce_Crc.h>

Variables

Declare the FCE and CRC handles as global variable in your C code:

// used globally
static IfxFce_Crc fce;
static IfxFce_Crc_Crc fceCrc32_0;
static IfxFce_Crc_Crc fceCrc32_1;
static IfxFce_Crc_Crc fceCrc16;
static IfxFce_Crc_Crc fceCrc8;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_FCE 1

Add the interrupt service routine to your C code which should do the error flag handling:

IFX_INTERRUPT(fceISR, 0, IFX_INTPRIO_FCE)
{
{
Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_0);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc32_0);
}
{
Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_1);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc32_1);
}
{
Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc16);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc16);
}
{
Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc8);
if (interruptStatus.U )
{
if ( interruptStatus.B.CMF == 1)
{
// CRC Mismatch Error...!
}
if( interruptStatus.B.CEF == 1)
{
// Configuration Error...!
}
if ( interruptStatus.B.LEF == 1)
{
// Length Error...!
}
if ( interruptStatus.B.BEF == 1)
{
// Bus Error...!
}
}
IfxFce_Crc_clearErrorFlags(&fceCrc8);
}
}

Finally install the interrupt handler in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(fceISR, IFX_INTPRIO_FCE);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example for all CRC kernels:

// create module config
IfxFce_Crc_Config fceConfig;
IfxFce_Crc_initModuleConfig(&fceConfig, &MODULE_FCE0);
// ISR priorities and interrupt target
fceConfig.isrPriority = IFX_INTPRIO_FCE;
fceConfig.isrTypeOfService = IfxCpu_Irq_getTos( IfxCpu_getCoreIndex());
// initialize module
//IfxFce_Crc fce; // defined globally
IfxFce_Crc_initModule(&fce, &fceConfig);
// initialize CRC kernels
IfxFce_Crc_CrcConfig crcConfig;
IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
//IfxFce_Crc_Crc fceCrc32_0; // defined globally
IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
//IfxFce_Crc_Crc fceCrc32_1; // defined globally
crcConfig.crc32Kernel = IfxFce_Crc32Kernel_1;
IfxFce_Crc_initCrc(&fceCrc32_1, &crcConfig);
crcConfig.crc32Kernel = IfxFce_Crc32Kernel_0;
//IfxFce_Crc_Crc fceCrc16; // defined globally
crcConfig.crcMode = IfxFce_CrcMode_16;
IfxFce_Crc_initCrc(&fceCrc16, &crcConfig);
//IfxFce_Crc_Crc fceCrc8; // defined globally
crcConfig.crcMode = IfxFce_CrcMode_8;
crcConfig.useDma = TRUE; // Enable Dma transfer
crcConfig.fceChannelId = IfxDma_ChannelId_0;
IfxFce_Crc_initCrc(&fceCrc8, &crcConfig);

Error Interrupt on CRC mismatch

By default, all error interrupts aside from the CRC mismatch interrupt (CMF) are enabled.

In order to use the CMF interrupt as well, the appr. error flag has to be enabled during configuration:

// initialize CRC kernel with CRC check enabled
IfxFce_Crc_CrcConfig crcConfig;
IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
crcConfig.enabledInterrupts.crcMismatch = TRUE;
IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);

And the expected CRC value has to be written into the expectedCrc field of the handle before the CRC calculation is started.

{
// Expected CRC:
fceCrc32_0.expectedCrc = 0xd95def75;
// do calculation
uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
// we can expect, that an error interrupt has been triggered if the CRC over checkData didn't match.
}

CRC Calculation

Now, all 4 FCE kernels are configured and can be used to calculate CRC values.

In following examples, CRC is calculated over following array:

#define CHECK_DATA_SIZE 25 // declare this portion globally
// if Dma is enabled, align memory to 32 byte
uint32 checkData[CHECK_DATA_SIZE] = {
0xbe9957bb,
0x1c706c1e,
0x14c3db3f,
0x7fb17a93,
0xb0d9d5a7,
0x768093e0,
0x88b206a0,
0xc51299e4,
0xe8a97d48,
0x89367f27,
0x70095984,
0xec030f75,
0xdc22f8d4,
0xd951407b,
0x34ae18c6,
0x4d47ba7d,
0x0e2e4622,
0x4a2e90d3,
0xdaec3752,
0xcd3ed11c,
0x36b416b7,
0x8ea28658,
0xdd37eee3,
0x23928b62,
0x84eb4b22,
};

Function calls:

// Common usage:
{
uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
// -> CRC32 will be 0xd95def75
}
// Piecewise CRC calculation over two (more more) memory blocks.
// Please note that the initial value requires a bytewise reflection, and an inversion whenever it's passed for the next calculation:
{
uint32 fceCrc;
fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[0], CHECK_DATA_SIZE-10, 0x00000000);
fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[CHECK_DATA_SIZE-10], 10, ~IfxFce_reflectCrc32(fceCrc, 32));
// -> CRC32 will be 0xd95def75 (as well)
}
// using the CRC16 kernel
{
uint32 fceCrc;
fceCrc = IfxFce_Crc_calculateCrc16(&fceCrc16, (uint16 *)checkData, CHECK_DATA_SIZE*2, 0x00000000);
// -> CRC16 will be 0xda6f
}
// using the CRC8 kernel
{
uint32 fceCrc;
fceCrc = IfxFce_Crc_calculateCrc8(&fceCrc8, (uint8 *)checkData, CHECK_DATA_SIZE*4, 0x00000000);
// -> CRC8 will be 0x61
}

/


iLLD_TC26B: CRC

Modules
CRC
iLLD » FCE
Collaboration diagram for CRC:

Modules

Data Structures
Module Initialise Functions
CRC Operation Functions
Interrupt Status Function

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » FCE » CRC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure. More...
struct | IfxFce_Crc
FCE Module Handle;. More...
struct | IfxFce_Crc_Config
Configuration structure of the module. More...
struct | IfxFce_Crc_Crc
Specifies the pointer to FCE module handler. More...
struct | IfxFce_Crc_CrcConfig
Specifies the module configuration structure. More...

Detailed Description

Data Structure Documentation

◆ IfxFce_Crc_EnabledInterrupts

struct IfxFce_Crc_EnabledInterrupts

Specifies the interrupt enable structure.

Definition at line 356 of file IfxFce_Crc.h.

Data Fields
boolean | busError | Specifies enabel/disable of bus error interrupt.
boolean | configError | Specifies enabel/disable of configuration error interrupt.
boolean | crcMismatch | Specifies enabel/disable of CRC mismatch interrupt.
boolean | lengthError | Specifies enabel/disable of length error interrupt.

◆ IfxFce_Crc

struct IfxFce_Crc

FCE Module Handle;.

Definition at line 370 of file IfxFce_Crc.h.

Data Fields
Ifx_FCE * fce Pointer to FCE registers.

◆ IfxFce_Crc_Config

struct IfxFce_Crc_Config

Configuration structure of the module.

Definition at line 377 of file IfxFce_Crc.h.

Data Fields
Ifx_FCE * | fce | Pointer to FCE registers.
uint16 | isrPriority | interrupt priority
IfxSrc_Tos | isrTypeOfService | type of interrupt service

◆ IfxFce_Crc_Crc

struct IfxFce_Crc_Crc

Specifies the pointer to FCE module handler.

Definition at line 386 of file IfxFce_Crc.h.

Data Fields
IfxFce_Crc32Kernel | crc32Kernel | Specifies the kernel used for CRC-32.
IfxFce_CrcMode | crcMode | Specifies the CRC mode.
uint32 | expectedCrc | Specifies the expected CRC to be compared with resulted.
Ifx_FCE * | fce | Specifies pointer to FCE module registers.

◆ IfxFce_Crc_CrcConfig

struct IfxFce_Crc_CrcConfig

Specifies the module configuration structure.

Definition at line 396 of file IfxFce_Crc.h.

Collaboration diagram for IfxFce_Crc_CrcConfig:
[legend]
Data Fields
boolean | automaticLengthReload | Specifies the enable/disable of automatic length reload.
boolean | crc32BitReflectionEnabled | Specifies enable/disable of CRC 32-bit wise reflection.
IfxFce_Crc32Kernel | crc32Kernel | Specifies the kernel used for CRC-32.
boolean | crcCheckCompared | Specifies whether CRC check comparision is enabled or not.
IfxFce_CrcMode | crcMode | Specifies the CRC mode.
boolean | crcResultInverted | Specifies the XOR valueto get the final CRC.
boolean | dataByteReflectionEnabled | Specifies enable/disable of input data byte wise reflection.
IfxFce_Crc_EnabledInterrupts | enabledInterrupts | Specifies the interrupt enable structure.
uint32 | expectedCrc | Specifies the expected CRC to be compared with resulted.
Ifx_FCE * | fce | Specifies pointer to FCE module registers.


iLLD_TC26B: Module Initialise Functions

Functions
Module Initialise Functions
iLLD » FCE » CRC
Collaboration diagram for Module Initialise Functions:

Functions

IFX_EXTERN void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
IFX_EXTERN void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
IFX_EXTERN void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
IFX_EXTERN void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
IFX_EXTERN void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxFce_Crc_deInitModule()

IFX_EXTERN void IfxFce_Crc_deInitModule ( IfxFce_Crc_Crc * fce )

Deinitialises the FCE module.

Parameters
fce Specifies the pointer to FCE module handler
Returns
None

Reset the module

IfxFce_Crc fce;
//Deinitialise the module
IfxFce_Crc_deInitModule(&fce);

Definition at line 160 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initCrc()

IFX_EXTERN void IfxFce_Crc_initCrc | ( | IfxFce_Crc_Crc * | fceCrc,
 |  | const IfxFce_Crc_CrcConfig * | crcConfig
 | ) |  |

Initialise the FCE module for CRC computation according to CRC mode.

Parameters
fceCrc | Specifies the pointer to CRC handle
crcConfig | Specifies the FCE CRC configuration structure
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 183 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initCrcConfig()

IFX_EXTERN void IfxFce_Crc_initCrcConfig | ( | IfxFce_Crc_CrcConfig * | crcConfig,
 |  | IfxFce_Crc * | fce
 | ) |  |

Initialises the default CRC configuration buffer.

Parameters
crcConfig | Specifies the FCE CRC configuration structure
fce | Pointer to the FCE module handle
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 232 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initModule()

IFX_EXTERN void IfxFce_Crc_initModule | ( | IfxFce_Crc * | fce,
 |  | const IfxFce_Crc_Config * | config
 | ) |  |

Usage Example: see How to use the FCE CRC Interface driver?.

Parameters
fce | module handle
config | predefined configuration structure of the module
Returns
None

Definition at line 248 of file IfxFce_Crc.c.

◆ IfxFce_Crc_initModuleConfig()

IFX_EXTERN void IfxFce_Crc_initModuleConfig | ( | IfxFce_Crc_Config * | config,
 |  | Ifx_FCE * | fce
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
fce | pointer to FCE registers
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 261 of file IfxFce_Crc.c.


iLLD_TC26B: CRC Operation Functions

Functions
CRC Operation Functions
iLLD » FCE » CRC
Collaboration diagram for CRC Operation Functions:

Functions

IFX_EXTERN uint16 | IfxFce_Crc_calculateCrc16 (IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN uint32 | IfxFce_Crc_calculateCrc32 (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN uint8 | IfxFce_Crc_calculateCrc8 (IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...

Detailed Description

Function Documentation

◆ IfxFce_Crc_calculateCrc16()

IFX_EXTERN uint16 IfxFce_Crc_calculateCrc16 | ( | IfxFce_Crc_Crc * | fce,
 |  | const uint16 * | crcData,
 |  | uint32 | crcDataLength,
 |  | uint16 | crcStartValue
 | ) |  |

Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed.

Parameters
fce | Specifies the pointer to FCE module handler
crcData | Length of the input data block
crcDataLength | Length of the input data block
crcStartValue | start value for CRC calculation
Returns
Final CRC after XORed with XOR value.

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 36 of file IfxFce_Crc.c.

◆ IfxFce_Crc_calculateCrc32()

IFX_EXTERN uint32 IfxFce_Crc_calculateCrc32 | ( | IfxFce_Crc_Crc * | fce,
 |  | const uint32 * | crcData,
 |  | uint32 | crcDataLength,
 |  | uint32 | crcStartValue
 | ) |  |

Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed.

Parameters
fce | Specifies the pointer to FCE module handler
crcData | pointer to the input data block
crcDataLength | Length of the input data block
crcStartValue | start value for CRC calculation
Returns
Final CRC after XORed with XOR value.

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 64 of file IfxFce_Crc.c.

◆ IfxFce_Crc_calculateCrc8()

IFX_EXTERN uint8 IfxFce_Crc_calculateCrc8 | ( | IfxFce_Crc_Crc * | fce,
 |  | const uint8 * | crcData,
 |  | uint32 | crcDataLength,
 |  | uint8 | crcStartValue
 | ) |  |

Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed.

Parameters
fce | Specifies the pointer to FCE module handler
crcData | Length of the input data block
crcDataLength | Length of the input data block
crcStartValue | start value for CRC calculation
Returns
Final CRC after XORed with XOR value.

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 114 of file IfxFce_Crc.c.


iLLD_TC26B: Interrupt Status Function

Functions
Interrupt Status Function
iLLD » FCE » CRC
Collaboration diagram for Interrupt Status Function:

Functions

IFX_EXTERN void | IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_Crc_getInterruptStatus (IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status. More...

Detailed Description

Function Documentation

◆ IfxFce_Crc_clearErrorFlags()

IFX_EXTERN void IfxFce_Crc_clearErrorFlags ( IfxFce_Crc_Crc * fce )

Clears the error flags.

Parameters
fce Specifies the pointer to FCE module handler
Returns
None

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 143 of file IfxFce_Crc.c.

◆ IfxFce_Crc_getInterruptStatus()

IFX_EXTERN Ifx_FCE_STS IfxFce_Crc_getInterruptStatus ( IfxFce_Crc_Crc * fce )

Gets the current CRC interrupt status.

Parameters
fce Specifies the pointer to FCE module handler
Returns
Current interrupt status

Usage Example: see How to use the FCE CRC Interface driver?

Definition at line 166 of file IfxFce_Crc.c.


iLLD_TC26B: IfxFce_cfg.h File Reference

  • _Impl
Macros
IfxFce_cfg.h File Reference
iLLD » FCE

FCE on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXFCE_NUM_KERNEL (4)
#define | IFXFCE_NUM_MODULES (1)

Detailed Description

FCE on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFce_cfg.h.

Macro Definition Documentation

◆ IFXFCE_NUM_KERNEL

#define IFXFCE_NUM_KERNEL (4)

Definition at line 43 of file IfxFce_cfg.h.

◆ IFXFCE_NUM_MODULES

#define IFXFCE_NUM_MODULES (1)

Definition at line 45 of file IfxFce_cfg.h.


iLLD_TC26B: IfxFce_Crc.h File Reference

  • Fce
  • Crc
Data Structures | Functions
IfxFce_Crc.h File Reference
iLLD » FCE

FCE CRC details. More...

#include "Fce/Std/IfxFce.h"
#include "Cpu/Irq/IfxCpu_Irq.h"
Include dependency graph for IfxFce_Crc.h:

Go to the source code of this file.

Data Structures

struct | IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure. More...
struct | IfxFce_Crc
FCE Module Handle;. More...
struct | IfxFce_Crc_Config
Configuration structure of the module. More...
struct | IfxFce_Crc_Crc
Specifies the pointer to FCE module handler. More...
struct | IfxFce_Crc_CrcConfig
Specifies the module configuration structure. More...

Functions

IFX_EXTERN void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
IFX_EXTERN void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
IFX_EXTERN void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
IFX_EXTERN void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
IFX_EXTERN void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...
IFX_EXTERN uint16 | IfxFce_Crc_calculateCrc16 (IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN uint32 | IfxFce_Crc_calculateCrc32 (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN uint8 | IfxFce_Crc_calculateCrc8 (IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
IFX_EXTERN void | IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_Crc_getInterruptStatus (IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status. More...

Detailed Description

FCE CRC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFce_Crc.h.


iLLD_TC26B: IfxFce.h File Reference

  • Fce
  • Std
Enumerations | Functions
IfxFce.h File Reference
iLLD » FCE

FCE basic functionality. More...

#include "_Impl/IfxFce_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxFce_reg.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxFce.h:

Go to the source code of this file.

Enumerations

enum IfxFce_Crc32Kernel {
IfxFce_Crc32Kernel_0 = 0,
IfxFce_Crc32Kernel_1
}
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32. More...
enum IfxFce_CrcMode {
IfxFce_CrcMode_8 = 0,
IfxFce_CrcMode_16 = 1,
IfxFce_CrcMode_32 = 2
}
Specifies the CRC mode. More...

Functions

IFX_INLINE void | IfxFce_disableModule (Ifx_FCE *fce)
Disable the control of FCE module. More...
IFX_INLINE void | IfxFce_enableModule (Ifx_FCE *fce)
Enable the control of FCE module. More...
IFX_EXTERN void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...
IFX_EXTERN uint32 | IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...
IFX_INLINE void | IfxFce_clearCrc16ErrorFlags (Ifx_FCE *fce)
Clears the CRC-16 error flags. More...
IFX_INLINE void | IfxFce_clearCrc32ErrorFlags (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Clears the CRC-32 error flags. More...
IFX_INLINE void | IfxFce_clearCrc8ErrorFlags (Ifx_FCE *fce)
Clears the CRC-8 error flags. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFce_getSrcPointer (Ifx_FCE *fce)
Returns the SRC pointer for FCE. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc16InterruptStatus (Ifx_FCE *fce)
Gets the CRC-16 interrupt status. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc32InterruptStatus (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status. More...
IFX_EXTERN Ifx_FCE_STS | IfxFce_getCrc8InterruptStatus (Ifx_FCE *fce)
Gets the CRC-8 interrupt status. More...

Detailed Description

FCE basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFce.h.


iLLD_TC26B: FFT

Modules | Files
FFT
iLLD
Collaboration diagram for FFT:

Modules

Implementation
Standard Driver
How to use the FFT driver?
FFT

Files

file | IfxFft_cfg.h
FFT on-chip implementation data.
file | IfxFft_Fft.h
FFT FFT details.
file | IfxFft.h
FFT basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » FFT
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » FFT
Collaboration diagram for Standard Driver:

Modules

Enumerations
Utility Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » FFT » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxFft_Input {
IfxFft_Input_complexSInt32 = 0,
IfxFft_Input_realSInt32 = 1,
IfxFft_Input_complexSInt16 = 2,
IfxFft_Input_realSInt16 = 3
}
Input format Definition in Ifx_FFT.CSR.B.IN.FMT. More...
enum IfxFft_Length {
IfxFft_Length_8 = 3,
IfxFft_Length_16 = 4,
IfxFft_Length_32 = 5,
IfxFft_Length_64 = 6,
IfxFft_Length_128 = 7,
IfxFft_Length_256 = 8,
IfxFft_Length_512 = 9,
IfxFft_Length_1024 = 10
}
Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform of 8) and 11 (transform of 2048). Definition in Ifx_FFT.CSR.B.LENGTH. More...
enum IfxFft_Operation {
IfxFft_Operation_fft = 0,
IfxFft_Operation_ifft = 1
}
Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT. More...
enum IfxFft_Output {
IfxFft_Output_complexSInt32 = 0,
IfxFft_Output_complexSInt16 = 1
}
Output format Definition in Ifx_FFT.CSR.B.OUT.FMT. More...
enum IfxFft_SuspendMode {
IfxFft_SuspendMode_none = 0,
IfxFft_SuspendMode_hard = 1,
IfxFft_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxFft_Input

enum IfxFft_Input

Input format Definition in Ifx_FFT.CSR.B.IN.FMT.

Enumerator
IfxFft_Input_complexSInt32 | 1 complex 32-bit data per 64-bit word
IfxFft_Input_realSInt32 | 2 real 32-bit data per 64-bit word
IfxFft_Input_complexSInt16 | 2 complex 16-bit data per 64-bit word
IfxFft_Input_realSInt16 | 4 real 16-bit data per 64-bit word

Definition at line 53 of file IfxFft.h.

◆ IfxFft_Length

enum IfxFft_Length

Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform of 8) and 11 (transform of 2048). Definition in Ifx_FFT.CSR.B.LENGTH.

Enumerator
IfxFft_Length_8 | transform of 8
IfxFft_Length_16 | transform of 16
IfxFft_Length_32 | transform of 32
IfxFft_Length_64 | transform of 64
IfxFft_Length_128 | transform of 128
IfxFft_Length_256 | transform of 256
IfxFft_Length_512 | transform of 512
IfxFft_Length_1024 | transform of 1024

Definition at line 65 of file IfxFft.h.

◆ IfxFft_Operation

enum IfxFft_Operation

Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT.

Enumerator
IfxFft_Operation_fft | perform FFT
IfxFft_Operation_ifft | perform IFFT

Definition at line 80 of file IfxFft.h.

◆ IfxFft_Output

enum IfxFft_Output

Output format Definition in Ifx_FFT.CSR.B.OUT.FMT.

Enumerator
IfxFft_Output_complexSInt32 | 1 complex 32-bit data per 64-bit word
IfxFft_Output_complexSInt16 | 2 complex 16-bit data per 64-bit word

Definition at line 89 of file IfxFft.h.

◆ IfxFft_SuspendMode

enum IfxFft_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxFft_SuspendMode_none | No suspend.
IfxFft_SuspendMode_hard | Hard Suspend.
IfxFft_SuspendMode_soft | Soft Suspend.

Definition at line 97 of file IfxFft.h.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » FFT » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE void | IfxFft_disableModule (Ifx_FFT *fft, Ifx_LMU *lmu)
Disables the FFT module and also the LMU interface. More...
IFX_INLINE void | IfxFft_enableModule (Ifx_FFT *fft, Ifx_LMU *lmu)
Enables the FFT module and also the LMU interface. More...
IFX_INLINE IfxFft_Input | IfxFft_getInputFormat (Ifx_FFT *fft)
Returns the input format. More...
IFX_INLINE IfxFft_Length | IfxFft_getLength (Ifx_FFT *fft)
Returns the length of the transform (length code, 3 to 10) More...
IFX_INLINE IfxFft_Length | IfxFft_getLengthCode (uint16 length)
Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH. More...
IFX_INLINE uint16 | IfxFft_getLengthFromCode (IfxFft_Length length)
Retruns the actual length of the transform from the length code. More...
IFX_INLINE IfxFft_Output | IfxFft_getOutputFormat (Ifx_FFT *fft)
Returns the output format. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFft_getSrcPointerDone (Ifx_FFT *fft)
Returns the status of FFT DONE request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFft_getSrcPointerRfs (Ifx_FFT *fft)
Returns the status of FFT RFS request. More...
IFX_INLINE uint16 | IfxFft_getTransformLength (Ifx_FFT *fft)
Returns the actual length of the transform. More...
IFX_INLINE boolean | IfxFft_isEngineBusy (Ifx_FFT *fft)
Returns the status of whether the FFT Engine is Idle or has at least one transform in operation. More...
IFX_INLINE boolean | IfxFft_isModuleEnabled (Ifx_FFT *fft)
Returns the status of whether the module is enabled or not. More...
IFX_INLINE boolean | IfxFft_isModuleSuspended (Ifx_FFT *fft)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE boolean | IfxFft_isReadyForStart (Ifx_FFT *fft)
Returns the status of whether the module can accept a START operation or not. More...
IFX_INLINE void | IfxFft_setSuspendMode (Ifx_FFT *fft, IfxFft_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...

Detailed Description

Function Documentation

◆ IfxFft_disableModule()

IFX_INLINE void IfxFft_disableModule | ( | Ifx_FFT * | fft,
 |  | Ifx_LMU * | lmu
 | ) |  |

Disables the FFT module and also the LMU interface.

Parameters
fft | pointer to FFT registers
lmu | pointer to LMU registers
Returns
None

Definition at line 215 of file IfxFft.h.

◆ IfxFft_enableModule()

IFX_INLINE void IfxFft_enableModule | ( | Ifx_FFT * | fft,
 |  | Ifx_LMU * | lmu
 | ) |  |

Enables the FFT module and also the LMU interface.

Parameters
fft | pointer to FFT registers
lmu | pointer to LMU registers
Returns
None

Definition at line 225 of file IfxFft.h.

Referenced by IfxFft_Fft_initModule().

◆ IfxFft_getInputFormat()

IFX_INLINE IfxFft_Input IfxFft_getInputFormat ( Ifx_FFT * fft )

Returns the input format.

Parameters
fft pointer to FFT registers
Returns
Input format

Definition at line 235 of file IfxFft.h.

◆ IfxFft_getLength()

IFX_INLINE IfxFft_Length IfxFft_getLength ( Ifx_FFT * fft )

Returns the length of the transform (length code, 3 to 10)

Parameters
fft pointer to FFT registers
Returns
Length of the transform (length code)

Definition at line 241 of file IfxFft.h.

◆ IfxFft_getLengthCode()

IFX_INLINE IfxFft_Length IfxFft_getLengthCode ( uint16 length )

Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH.

Parameters
length Input length of the transform
Returns
Length of the transform (code, 3 to 10)

Definition at line 247 of file IfxFft.h.

◆ IfxFft_getLengthFromCode()

IFX_INLINE uint16 IfxFft_getLengthFromCode ( IfxFft_Length length )

Retruns the actual length of the transform from the length code.

Parameters
length Length of transform
Returns
Actual length of the transform

Definition at line 253 of file IfxFft.h.

Referenced by IfxFft_Fft_calcCounters(), and IfxFft_Fft_initJob().

◆ IfxFft_getOutputFormat()

IFX_INLINE IfxFft_Output IfxFft_getOutputFormat ( Ifx_FFT * fft )

Returns the output format.

Parameters
fft pointer to FFT registers
Returns
Output format

Definition at line 259 of file IfxFft.h.

◆ IfxFft_getSrcPointerDone()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerDone ( Ifx_FFT * fft )

Returns the status of FFT DONE request.

Parameters
fft pointer to FFT registers
Returns
Status of FFT DONE request

Definition at line 265 of file IfxFft.h.

Referenced by IfxFft_Fft_initDma(), and IfxFft_Fft_initModule().

◆ IfxFft_getSrcPointerRfs()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerRfs ( Ifx_FFT * fft )

Returns the status of FFT RFS request.

Parameters
fft pointer to FFT registers
Returns
Status of FFT RFS request

Definition at line 272 of file IfxFft.h.

◆ IfxFft_getTransformLength()

IFX_INLINE uint16 IfxFft_getTransformLength ( Ifx_FFT * fft )

Returns the actual length of the transform.

Parameters
fft pointer to FFT registers
Returns
Actual length of the transform ()

Definition at line 279 of file IfxFft.h.

◆ IfxFft_isEngineBusy()

IFX_INLINE boolean IfxFft_isEngineBusy ( Ifx_FFT * fft )

Returns the status of whether the FFT Engine is Idle or has at least one transform in operation.

Parameters
fft pointer to FFT registers
Returns
(true / false)

Definition at line 285 of file IfxFft.h.

Referenced by IfxFft_Fft_initWindow().

◆ IfxFft_isModuleEnabled()

IFX_INLINE boolean IfxFft_isModuleEnabled ( Ifx_FFT * fft )

Returns the status of whether the module is enabled or not.

Parameters
fft pointer to FFT registers
Returns
(true / false)

Definition at line 291 of file IfxFft.h.

Referenced by IfxFft_Fft_initModule().

◆ IfxFft_isModuleSuspended()

IFX_INLINE boolean IfxFft_isModuleSuspended ( Ifx_FFT * fft )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
fft Pointer to FFT module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 297 of file IfxFft.h.

◆ IfxFft_isReadyForStart()

IFX_INLINE boolean IfxFft_isReadyForStart ( Ifx_FFT * fft )

Returns the status of whether the module can accept a START operation or not.

Parameters
fft Pointer to FFT registers
Returns
(true / false)

Definition at line 309 of file IfxFft.h.

Referenced by IfxFft_Fft_initWindow(), and IfxFft_Fft_startJob().

◆ IfxFft_setSuspendMode()

IFX_INLINE void IfxFft_setSuspendMode | ( | Ifx_FFT * | fft,
 |  | IfxFft_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
fft | Pointer to FFT module registers
mode | Module suspend mode
Returns
None

Definition at line 315 of file IfxFft.h.


iLLD_TC26B: How to use the FFT driver?

How to use the FFT driver?
iLLD » FFT
Collaboration diagram for How to use the FFT driver?:

The FFT interface driver provides a default FFT configuration for calculating forward and inverse FFTs of lengths 8 to 1024 (powers of 2 only) of real or complex input operands.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Fft/Fft/IfxFft_Fft.h>

Variables

Declare the FFT handle, FFT job handle and the input output locations as global variables in your C code:

// FFT window length
#define FFT_LENGTH 512
// source waveform (must be 256bit aligned!)
__attribute__ ((aligned(256))) sint32 fftIn[FFT_LENGTH] = {
#include "sinewave.inc"
};
// FFT result (must be 256bit aligned!)
__attribute__ ((aligned(256))) sint32 fftOut[FFT_LENGTH*2];
// used globally
IfxFft_Fft fft;
IfxFft_Fft_Job fftJob;
volatile uint32 fftInterruptCounter;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define ISR_PRIORITY_FFT_OUTPUT 1
#define ISR_PRIORITY_FFT_INPUT 2
#define ISR_PRIORITY_FFT_INTRA 3

Add the interrupt service routines to your C code. They have to call the FFT interrupt handlers by passing the fftJob handle:

IFX_INTERRUPT(ISR_Fft_intra, 0, ISR_PRIORITY_FFT_INTRA)
{
IfxFft_Fft_isrIntra(&fft);
}
IFX_INTERRUPT(ISR_Fft_input, 0, ISR_PRIORITY_FFT_INPUT)
{
IfxFft_Fft_isrInput(&fft);
}
IFX_INTERRUPT(ISR_Fft_output, 0, ISR_PRIORITY_FFT_output)
{
++fftInterruptCounter;
IfxFft_Fft_isrOutput(&fft);
// do the next transform:
while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ISR_Fft_input, ISR_PRIORITY_FFT_INPUT);
IfxCpu_Irq_installInterruptHandler(&ISR_Fft_output, ISR_PRIORITY_FFT_OUTPUT);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// create module config
IfxFft_Fft_Config fftConfig;
IfxFft_Fft_initModuleConfig(&fftConfig, &MODULE_FFT, &MODULE_LMU);
// configure interrupts
fftConfig.inputPriority = ISR_PRIORITY_FFT_INPUT;
fftConfig.intraPriority = ISR_PRIORITY_FFT_INTRA;
fftConfig.outputPriority = ISR_PRIORITY_FFT_OUTPUT;
fftConfig.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// use DMA channels for input/output transfers
fftConfig.inputDmaChannelId = IfxDma_ChannelId_4;
fftConfig.outputDmaChannelId = IfxDma_ChannelId_5;
fftConfig.discardDmaChannelId = IfxDma_ChannelId_6;
// initialize module
// IfxFft_Fft fft; // defined globally
IfxFft_Fft_initModule(&fft, &fftConfig);

Job Initialisation

The FFT job initialisation can also be done in the same function. Here an example:

// create FFT job config
IfxFft_Fft_JobConfig fftJobConfig;
IfxFft_Fft_initJobConfig(&fftJobConfig, &fft);
// customize job
fftJobConfig.fftLength = IfxFft_Length_512;
fftJobConfig.inputFormat = IfxFft_Input_realSInt32;
fftJobConfig.inputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftIn);
fftJobConfig.inputLength = FFT_LENGTH;
fftJobConfig.outputFormat = IfxFft_Output_complexSInt32;
fftJobConfig.outputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftOut);
fftJobConfig.outputLength = FFT_LENGTH;
// initialize FFT job
// IfxFft_Fft_Job fftJob; // defined globally
IfxFft_Fft_initJob(&fftJob, &fftJobConfig);

The FFT is ready for use now!

Transform Functions

The FFT driver provides simple function to perform the transforms.

This means: you only have to start the FFT job with pre configured job handle and the transform will be done automatically by the FFT engine and an interrupt will be raised, indicating the end of treansform(DONE).

// start job until return TRUE.
while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
// wait for 3 interrupts
while( fftInterruptCounter < 3 );


iLLD_TC26B: FFT

Modules
FFT
iLLD » FFT
Collaboration diagram for FFT:

Modules

Data Structures
Module Functions
Interrupt Functions
Transform Funtions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » FFT » FFT
Collaboration diagram for Data Structures:

Data Structures

struct | IfxFft_Fft
Module handle. More...
struct | IfxFft_Fft_Count64
Structure for counters. More...
struct | IfxFft_Fft_Config
Configuration structure of the module. More...
struct | IfxFft_Fft_JobConfig
Configuration structure for the FFT job. More...
struct | IfxFft_Fft_Job_s
FFT job handle. More...

Detailed Description

Data Structure Documentation

◆ IfxFft_Fft

struct IfxFft_Fft

Module handle.

Definition at line 221 of file IfxFft_Fft.h.

Collaboration diagram for IfxFft_Fft:
[legend]
Data Fields
IfxDma_Dma_Channel | discardDmaChannel | Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0)
Ifx_FFT * | fft | Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0)
uint32 | flags | Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
IfxDma_Dma_Channel | inputDmaChannel | Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0)
uint32 | inputIdx | Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
uint32 | intraIdx | Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
IfxFft_Fft_Job * | job[2] | FFT job handle.
Ifx_LMU * | lmu | Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
IfxDma_Dma_Channel | outputDmaChannel | Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0)
Ifx_SRC_SRCR_Bits | srcrOutDis | Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Ifx_SRC_SRCR_Bits | srcrOutEnd | Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)

◆ IfxFft_Fft_Count64

struct IfxFft_Fft_Count64

Structure for counters.

Definition at line 238 of file IfxFft_Fft.h.

Data Fields
uint16 | expect | Padding.
uint16 | input | Input count.
uint16 | output | Output count.
uint16 | result | Discard.

◆ IfxFft_Fft_Config

struct IfxFft_Fft_Config

Configuration structure of the module.

Definition at line 252 of file IfxFft_Fft.h.

Data Fields
IfxDma_ChannelId | discardDmaChannelId | DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Ifx_FFT * | fft | Pointer to FFT registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
IfxDma_ChannelId | inputDmaChannelId | Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Ifx_Priority | inputPriority | "input loading finished" interrupt priority
Ifx_Priority | intraPriority | "intra transfer" interrupt priority
Ifx_LMU * | lmu | Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
IfxDma_ChannelId | outputDmaChannelId | Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Ifx_Priority | outputPriority | "output unloading finished" interrupt priority
IfxSrc_Tos | typeOfService | Type of interrupt service.

◆ IfxFft_Fft_JobConfig

struct IfxFft_Fft_JobConfig

Configuration structure for the FFT job.

Definition at line 267 of file IfxFft_Fft.h.

Collaboration diagram for IfxFft_Fft_JobConfig:
[legend]
Data Fields
IfxFft_Fft * | fft | Pointer To FFT.Used when (IFXFFT_FFT_OPTIMIZED == 0)
IfxFft_Length | fftLength | Length of the transform.
IfxFft_Input | inputFormat | Input format.
uint16 | inputLength | Length of the input.
IFX_CONST void * | inputPtr | Pointer to input data.
IfxFft_Operation | operation | Operation (FFT / IFFT)
IfxFft_Output | outputFormat | Output format.
uint16 | outputLength | Length of the output.
void * | outputPtr | Pointer to output data.
boolean | useWindowFunction | Selection to use window function.

◆ IfxFft_Fft_Job_s

struct IfxFft_Fft_Job_s

FFT job handle.

Definition at line 283 of file IfxFft_Fft.h.

Collaboration diagram for IfxFft_Fft_Job_s:
[legend]
Data Fields
IfxFft_Fft_Count64 | count64 | Counters.
Ifx_FFT_CSR | csr | FFT.CSR register duplicate.
IfxFft_Fft * | fft | Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0)
IFX_CONST void * | inputPtr | Input pointer.
IfxFft_Fft_Job * | nextJob | Pointer to the next job.
void * | outputPtr | Output pointer.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » FFT » FFT
Collaboration diagram for Module Functions:

Functions

IFX_STATIC uint32 | IfxFft_Fft_calcCSR (const IfxFft_Fft_JobConfig *config)
Configures the CSR register. More...
IFX_EXTERN void | IfxFft_Fft_initModule (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxFft_Fft_initModuleConfig (IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxFft_Fft_calcCSR()

IFX_STATIC uint32 IfxFft_Fft_calcCSR ( const IfxFft_Fft_JobConfig * config )

Configures the CSR register.

Parameters
config Configuration structure for the FFT job
Returns
Desired value to write into the Ifx_FFT.CSR register

Definition at line 116 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initJob().

◆ IfxFft_Fft_initModule()

IFX_EXTERN void IfxFft_Fft_initModule | ( | IfxFft_Fft * | fft,
 |  | const IfxFft_Fft_Config * | config
 | ) |  |

Initialises the module.

Parameters
fft | Module handle
config | Configuration structure of the module
Returns
None

A coding example can be found in How to use the FFT driver?

Definition at line 260 of file IfxFft_Fft.c.

◆ IfxFft_Fft_initModuleConfig()

IFX_EXTERN void IfxFft_Fft_initModuleConfig | ( | IfxFft_Fft_Config * | config,
 |  | Ifx_FFT * | fft,
 |  | Ifx_LMU * | lmu
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure of the module
fft | Pointer to FFT registers
lmu | Pointer to LMU registers
Returns
None

A coding example can be found in How to use the FFT driver?

Definition at line 310 of file IfxFft_Fft.c.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » FFT » FFT
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxFft_Fft_isrInput (IfxFft_Fft *fft)
ISR input routine. More...
IFX_EXTERN void | IfxFft_Fft_isrOutput (IfxFft_Fft *fft)
ISR output routine. More...

Detailed Description

Function Documentation

◆ IfxFft_Fft_isrInput()

IFX_EXTERN void IfxFft_Fft_isrInput ( IfxFft_Fft * fft )

ISR input routine.

Parameters
fft Module handle
Returns
None

Definition at line 360 of file IfxFft_Fft.c.

◆ IfxFft_Fft_isrOutput()

IFX_EXTERN void IfxFft_Fft_isrOutput ( IfxFft_Fft * fft )

ISR output routine.

Parameters
fft Module handle
Returns
None

Definition at line 403 of file IfxFft_Fft.c.


iLLD_TC26B: Transform Funtions

Functions
Transform Funtions
iLLD » FFT » FFT
Collaboration diagram for Transform Funtions:

Functions

IFX_STATIC void | IfxFft_Fft_unloadOutput (IfxFft_Fft_Job *job)
Unloads output data from the FFT engine. More...
IFX_STATIC void | IfxFft_Fft_loadInput (IfxFft_Fft_Job *job)
Loads input data into the FFT engine. More...
IFX_EXTERN void | IfxFft_Fft_cloneAndLinkJobs (IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs. More...
IFX_EXTERN void | IfxFft_Fft_initJob (IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job. More...
IFX_EXTERN void | IfxFft_Fft_initJobConfig (IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values. More...
IFX_EXTERN void | IfxFft_Fft_initWindow (IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer. More...
IFX_EXTERN void | IfxFft_Fft_modifyDataPointers (IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle. More...
IFX_EXTERN boolean | IfxFft_Fft_startJob (IfxFft_Fft_Job *job)
Starts the FFT job. More...

Detailed Description

Function Documentation

◆ IfxFft_Fft_cloneAndLinkJobs()

IFX_EXTERN void IfxFft_Fft_cloneAndLinkJobs | ( | IfxFft_Fft_Job * | originalJob,
 |  | IfxFft_Fft_Job * | newJob
 | ) |  |

Clones and links the jobs.

Parameters
originalJob | Current (original)FFT job handle
newJob | Modified (new) FFT job handle
Returns
None

Definition at line 128 of file IfxFft_Fft.c.

◆ IfxFft_Fft_initJob()

IFX_EXTERN void IfxFft_Fft_initJob | ( | IfxFft_Fft_Job * | job,
 |  | const IfxFft_Fft_JobConfig * | jobConfig
 | ) |  |

Initialises the FFT job.

Parameters
job | FFT job handle
jobConfig | Configuration structure for the FFT job
Returns
None

A coding example can be found in How to use the FFT driver?

Definition at line 215 of file IfxFft_Fft.c.

◆ IfxFft_Fft_initJobConfig()

IFX_EXTERN void IfxFft_Fft_initJobConfig | ( | IfxFft_Fft_JobConfig * | config,
 |  | IfxFft_Fft * | fft
 | ) |  |

Fills the job configuration structure with default values.

Parameters
config | Configuration structure for the FFT job
fft | Module handle
Returns
None

A coding example can be found in How to use the FFT driver?

Definition at line 245 of file IfxFft_Fft.c.

◆ IfxFft_Fft_initWindow()

IFX_EXTERN void IfxFft_Fft_initWindow | ( | IfxFft_Fft * | fft,
 |  | const uint64 * | windowData
 | ) |  |

Initialises the window transfer.

Parameters
fft | Module handle
windowData | Window data
Returns
None

Definition at line 336 of file IfxFft_Fft.c.

◆ IfxFft_Fft_loadInput()

IFX_STATIC void IfxFft_Fft_loadInput ( IfxFft_Fft_Job * job )

Loads input data into the FFT engine.

Parameters
job FFT job handle
Returns
None

Definition at line 468 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_startJob().

◆ IfxFft_Fft_modifyDataPointers()

IFX_EXTERN void IfxFft_Fft_modifyDataPointers | ( | IfxFft_Fft_Job * | job,
 |  | const void * | inputPtr,
 |  | void * | outputPtr
 | ) |  |

Updates the input and output pointers in the FFT job handle.

Parameters
job | FFT job handle
inputPtr | Input pointer
outputPtr | Output pointer
Returns
None

Definition at line 507 of file IfxFft_Fft.c.

◆ IfxFft_Fft_startJob()

IFX_EXTERN boolean IfxFft_Fft_startJob ( IfxFft_Fft_Job * job )

Starts the FFT job.

Parameters
job FFT job handle
Returns
Module's ready for start (RFS) status (true / false)

A coding example can be found in How to use the FFT driver?

Definition at line 514 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_isrInput(), and IfxFft_Fft_isrOutput().

◆ IfxFft_Fft_unloadOutput()

IFX_STATIC void IfxFft_Fft_unloadOutput ( IfxFft_Fft_Job * job )

Unloads output data from the FFT engine.

Parameters
job FFT job handle
Returns
None

Definition at line 135 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_isrInput(), IfxFft_Fft_isrIntra(), and IfxFft_Fft_isrOutput().


iLLD_TC26B: IfxFft_cfg.h File Reference

  • _Impl
Macros
IfxFft_cfg.h File Reference
iLLD » FFT

FFT on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXFFT_DATA_SPACE 0xBE000000U
Data space starting address. More...
#define | IFXFFT_WINDOW_SPACE 0xBE100000U
Window coefficient space starting address. More...
#define | IFXFFT_MAX_LENGTH 2048
Maximim possible length of the transform. More...
#define | IFXFFT_MAX_WINDOW_LENGTH (IFXFFT_MAX_LENGTH / 2)
#define | IFXFFT_FFT_DMA_SUPPORT (1)
#define | IFXFFT_FFT_OPTIMIZED (0)
#define | IFXFFT_FFT_DMA_CHANNEL_BASE 4
#define | IFXFFT_FFT_PIPELINED (1)
#define | IFXFFT_FFT_NUM_JOBS (8)
#define | IFXFFT_NUM_MODULES (1)

Detailed Description

FFT on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFft_cfg.h.

Macro Definition Documentation

◆ IFXFFT_DATA_SPACE

#define IFXFFT_DATA_SPACE 0xBE000000U

Data space starting address.

Definition at line 45 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initDma().

◆ IFXFFT_FFT_DMA_CHANNEL_BASE

#define IFXFFT_FFT_DMA_CHANNEL_BASE 4

Definition at line 61 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initModuleConfig().

◆ IFXFFT_FFT_DMA_SUPPORT

#define IFXFFT_FFT_DMA_SUPPORT (1)

Definition at line 57 of file IfxFft_cfg.h.

◆ IFXFFT_FFT_NUM_JOBS

#define IFXFFT_FFT_NUM_JOBS (8)

Definition at line 65 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_isrInput().

◆ IFXFFT_FFT_OPTIMIZED

#define IFXFFT_FFT_OPTIMIZED (0)

Definition at line 59 of file IfxFft_cfg.h.

◆ IFXFFT_FFT_PIPELINED

#define IFXFFT_FFT_PIPELINED (1)

Definition at line 63 of file IfxFft_cfg.h.

◆ IFXFFT_MAX_LENGTH

#define IFXFFT_MAX_LENGTH 2048

Maximim possible length of the transform.

Definition at line 53 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initJob().

◆ IFXFFT_MAX_WINDOW_LENGTH

#define IFXFFT_MAX_WINDOW_LENGTH (IFXFFT_MAX_LENGTH / 2)

Definition at line 55 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initWindow().

◆ IFXFFT_NUM_MODULES

#define IFXFFT_NUM_MODULES (1)

Definition at line 67 of file IfxFft_cfg.h.

◆ IFXFFT_WINDOW_SPACE

#define IFXFFT_WINDOW_SPACE 0xBE100000U

Window coefficient space starting address.

Definition at line 49 of file IfxFft_cfg.h.

Referenced by IfxFft_Fft_initWindow().


iLLD_TC26B: IfxFft_Fft.h File Reference

  • Fft
  • Fft
Data Structures | Macros | Typedefs | Functions
IfxFft_Fft.h File Reference
iLLD » FFT

FFT FFT details. More...

#include "_Utilities/Ifx_Assert.h"
#include "IfxFft_bf.h"
#include "Fft/Std/IfxFft.h"
#include "Dma/Dma/IfxDma_Dma.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxFft_Fft.h:

Go to the source code of this file.

Data Structures

struct | IfxFft_Fft
Module handle. More...
struct | IfxFft_Fft_Count64
Structure for counters. More...
struct | IfxFft_Fft_Config
Configuration structure of the module. More...
struct | IfxFft_Fft_JobConfig
Configuration structure for the FFT job. More...
struct | IfxFft_Fft_Job_s
FFT job handle. More...

Macros

#define | IFXFFT_FFT_FLAG_INPUT (1)
#define | IFXFFT_FFT_FLAG_DONE (2)
#define | IFXFFT_FFT_HW_EXEC (1)

Typedefs

typedef struct IfxFft_Fft_Job_s IfxFft_Fft_Job

Functions

IFX_EXTERN void | IfxFft_Fft_initModule (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxFft_Fft_initModuleConfig (IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxFft_Fft_isrInput (IfxFft_Fft *fft)
ISR input routine. More...
IFX_EXTERN void | IfxFft_Fft_isrOutput (IfxFft_Fft *fft)
ISR output routine. More...
IFX_EXTERN void | IfxFft_Fft_cloneAndLinkJobs (IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs. More...
IFX_EXTERN void | IfxFft_Fft_initJob (IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job. More...
IFX_EXTERN void | IfxFft_Fft_initJobConfig (IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values. More...
IFX_EXTERN void | IfxFft_Fft_initWindow (IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer. More...
IFX_EXTERN void | IfxFft_Fft_modifyDataPointers (IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle. More...
IFX_EXTERN boolean | IfxFft_Fft_startJob (IfxFft_Fft_Job *job)
Starts the FFT job. More...
IFX_INLINE void | IfxFft_Fft_triggerEngine (Ifx_FFT *fft, uint32 csr)
IFX_EXTERN void | IfxFft_Fft_isrIntra (IfxFft_Fft *fft)
IFX_EXTERN void | IfxFft_Fft_initDma (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialization of DMA. More...

Detailed Description

FFT FFT details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFft_Fft.h.

Macro Definition Documentation

◆ IFXFFT_FFT_FLAG_DONE

#define IFXFFT_FFT_FLAG_DONE (2)

Definition at line 203 of file IfxFft_Fft.h.

Referenced by IfxFft_Fft_isrInput(), IfxFft_Fft_isrIntra(), and IfxFft_Fft_isrOutput().

◆ IFXFFT_FFT_FLAG_INPUT

#define IFXFFT_FFT_FLAG_INPUT (1)

Definition at line 201 of file IfxFft_Fft.h.

Referenced by IfxFft_Fft_isrInput(), IfxFft_Fft_isrIntra(), and IfxFft_Fft_isrOutput().

◆ IFXFFT_FFT_HW_EXEC

#define IFXFFT_FFT_HW_EXEC (1)

Definition at line 205 of file IfxFft_Fft.h.

Typedef Documentation

◆ IfxFft_Fft_Job

typedef struct IfxFft_Fft_Job_s IfxFft_Fft_Job

Definition at line 211 of file IfxFft_Fft.h.

Function Documentation

◆ IfxFft_Fft_initDma()

IFX_EXTERN void IfxFft_Fft_initDma | ( | IfxFft_Fft * | fft,
 |  | const IfxFft_Fft_Config * | config
 | ) |  |

Initialization of DMA.

Parameters
fft | fft Module handle
config | pointing to config strucuture of fft
Returns
None

Definition at line 623 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initModule().

◆ IfxFft_Fft_isrIntra()

IFX_EXTERN void IfxFft_Fft_isrIntra ( IfxFft_Fft * fft )
Returns
None

Definition at line 589 of file IfxFft_Fft.c.

◆ IfxFft_Fft_triggerEngine()

IFX_INLINE void IfxFft_Fft_triggerEngine | ( | Ifx_FFT * | fft,
 |  | uint32 | csr
 | ) |  |
Returns
None

Definition at line 435 of file IfxFft_Fft.h.

Referenced by IfxFft_Fft_startJob().


iLLD_TC26B: IfxFft.h File Reference

  • Fft
  • Std
Enumerations | Functions
IfxFft.h File Reference
iLLD » FFT

FFT basic functionality. More...

#include "_Impl/IfxFft_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Src/Std/IfxSrc.h"
#include "IfxFft_reg.h"
#include "IfxLmu_reg.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxFft.h:

Go to the source code of this file.

Enumerations

enum IfxFft_Input {
IfxFft_Input_complexSInt32 = 0,
IfxFft_Input_realSInt32 = 1,
IfxFft_Input_complexSInt16 = 2,
IfxFft_Input_realSInt16 = 3
}
Input format Definition in Ifx_FFT.CSR.B.IN.FMT. More...
enum IfxFft_Length {
IfxFft_Length_8 = 3,
IfxFft_Length_16 = 4,
IfxFft_Length_32 = 5,
IfxFft_Length_64 = 6,
IfxFft_Length_128 = 7,
IfxFft_Length_256 = 8,
IfxFft_Length_512 = 9,
IfxFft_Length_1024 = 10
}
Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform of 8) and 11 (transform of 2048). Definition in Ifx_FFT.CSR.B.LENGTH. More...
enum IfxFft_Operation {
IfxFft_Operation_fft = 0,
IfxFft_Operation_ifft = 1
}
Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT. More...
enum IfxFft_Output {
IfxFft_Output_complexSInt32 = 0,
IfxFft_Output_complexSInt16 = 1
}
Output format Definition in Ifx_FFT.CSR.B.OUT.FMT. More...
enum IfxFft_SuspendMode {
IfxFft_SuspendMode_none = 0,
IfxFft_SuspendMode_hard = 1,
IfxFft_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE void | IfxFft_disableModule (Ifx_FFT *fft, Ifx_LMU *lmu)
Disables the FFT module and also the LMU interface. More...
IFX_INLINE void | IfxFft_enableModule (Ifx_FFT *fft, Ifx_LMU *lmu)
Enables the FFT module and also the LMU interface. More...
IFX_INLINE IfxFft_Input | IfxFft_getInputFormat (Ifx_FFT *fft)
Returns the input format. More...
IFX_INLINE IfxFft_Length | IfxFft_getLength (Ifx_FFT *fft)
Returns the length of the transform (length code, 3 to 10) More...
IFX_INLINE IfxFft_Length | IfxFft_getLengthCode (uint16 length)
Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH. More...
IFX_INLINE uint16 | IfxFft_getLengthFromCode (IfxFft_Length length)
Retruns the actual length of the transform from the length code. More...
IFX_INLINE IfxFft_Output | IfxFft_getOutputFormat (Ifx_FFT *fft)
Returns the output format. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFft_getSrcPointerDone (Ifx_FFT *fft)
Returns the status of FFT DONE request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxFft_getSrcPointerRfs (Ifx_FFT *fft)
Returns the status of FFT RFS request. More...
IFX_INLINE uint16 | IfxFft_getTransformLength (Ifx_FFT *fft)
Returns the actual length of the transform. More...
IFX_INLINE boolean | IfxFft_isEngineBusy (Ifx_FFT *fft)
Returns the status of whether the FFT Engine is Idle or has at least one transform in operation. More...
IFX_INLINE boolean | IfxFft_isModuleEnabled (Ifx_FFT *fft)
Returns the status of whether the module is enabled or not. More...
IFX_INLINE boolean | IfxFft_isModuleSuspended (Ifx_FFT *fft)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE boolean | IfxFft_isReadyForStart (Ifx_FFT *fft)
Returns the status of whether the module can accept a START operation or not. More...
IFX_INLINE void | IfxFft_setSuspendMode (Ifx_FFT *fft, IfxFft_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...

Detailed Description

FFT basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFft.h.


iLLD_TC26B: FLASH

Modules | Files
FLASH
iLLD
Collaboration diagram for FLASH:

Modules

Implementation
Standard Driver

Files

file | IfxFlash_cfg.h
FLASH on-chip implementation data.
file | IfxFlash.h
FLASH basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » FLASH
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » FLASH
Collaboration diagram for Standard Driver:

Modules

Enumerations
CommandSequence Functions
Error Tracking Functions

Detailed Description


iLLD_TC26B: Enumerations

Data Structures | Enumerations
Enumerations
iLLD » FLASH » Standard Driver
Collaboration diagram for Enumerations:

Data Structures

struct IfxFlash_ErrorTracking_Address
Error tracking address structure. More...

Enumerations

enum IfxFlash_ErrorTracking {
IfxFlash_ErrorTracking_none = 0,
IfxFlash_ErrorTracking_correctedSingleBitError = 1,
IfxFlash_ErrorTracking_correctedDoubleBitError = 2,
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError = 3,
IfxFlash_ErrorTracking_uncorrectableMultiBitError = 4
}
enumeration for Flash Error tracking More...
enum IfxFlash_PortId {
IfxFlash_PortId_PortId_0 = 0,
IfxFlash_PortId_PortId_1 = 1
}
Corrected/UnCorrected Bits Address Buffer Port Id. More...

Detailed Description

Data Structure Documentation

◆ IfxFlash_ErrorTracking_Address

struct IfxFlash_ErrorTracking_Address

Error tracking address structure.

Definition at line 79 of file IfxFlash.h.

Data Fields
uint32 | address | Flash address for error tracking.
IfxFlash_ErrorTracking | errorType | Error type.

Enumeration Type Documentation

◆ IfxFlash_ErrorTracking

enum IfxFlash_ErrorTracking

enumeration for Flash Error tracking

Enumerator
IfxFlash_ErrorTracking_none | Error tracking disabled.
IfxFlash_ErrorTracking_correctedSingleBitError | corrected single bit errors
IfxFlash_ErrorTracking_correctedDoubleBitError | Corrected double-bit errors.
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError | Corrected single-bit and double-bit errors.
IfxFlash_ErrorTracking_uncorrectableMultiBitError | Detected uncorrectable errors.

Definition at line 52 of file IfxFlash.h.

◆ IfxFlash_PortId

enum IfxFlash_PortId

Corrected/UnCorrected Bits Address Buffer Port Id.

Enumerator
IfxFlash_PortId_PortId_0 | Port Id 0.
IfxFlash_PortId_PortId_1 | Port Id 1.

Definition at line 63 of file IfxFlash.h.


iLLD_TC26B: CommandSequence Functions

Functions
CommandSequence Functions
iLLD » FLASH » Standard Driver
Collaboration diagram for CommandSequence Functions:

Functions

IFX_INLINE void | IfxFlash_clearStatus (uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared. More...
IFX_INLINE uint8 | IfxFlash_enterPageMode (uint32 pageAddr)
Performs the sequence for entering program page mode. More...
IFX_INLINE void | IfxFlash_eraseMultiplePhysicalSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_erasePhysicalSector (uint32 sectorAddr)
Performs the erase sequence for a physical sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseSector (uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseVerifyMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_eraseVerifySector (uint32 sectorAddr)
Performs the "Erase Verify" sequence. More...
IFX_INLINE void | IfxFlash_loadPage (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access More...
IFX_INLINE void | IfxFlash_loadPage2X32 (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses More...
IFX_INLINE void | IfxFlash_resetToRead (uint32 flash)
reset to read mode More...
IFX_INLINE void | IfxFlash_resumeProtection (uint32 flash)
Performs the "Resume Protection" sequence. More...
IFX_INLINE void | IfxFlash_suspendResumeMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_suspendResumeSector (uint32 sectorAddr)
Performs the "Suspend Resume" sequence. More...
IFX_INLINE uint8 | IfxFlash_waitUnbusy (uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0. More...
IFX_INLINE void | IfxFlash_writeBurst (uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command. More...
IFX_INLINE void | IfxFlash_writePage (uint32 pageAddr)
Performs the "Write Page" sequence. More...
IFX_INLINE void | IfxFlash_writePageOnce (uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing. More...
IFX_EXTERN void | IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...

Detailed Description

Function Documentation

◆ IfxFlash_clearStatus()

IFX_INLINE void IfxFlash_clearStatus ( uint32 flash )

Performs the "Clear Status" sequence. Operation and error flags are cleared.

Parameters
flash selects the flash (PMU) module
Returns
None

Definition at line 482 of file IfxFlash.h.

◆ IfxFlash_disableWriteProtection()

IFX_EXTERN void IfxFlash_disableWriteProtection | ( | uint32 | flash,
 |  | IfxFlash_UcbType | ucb,
 |  | uint32 * | password
 | ) |  |

The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password.

Parameters
flash | selects the flash (PMU) module
ucb | selects the user configuration block (0 for UCB0, 1 for UCB1, 5 for UCB_HSMC)
password | password pointer to an array of 8 words
Returns
None

Definition at line 60 of file IfxFlash.c.

◆ IfxFlash_enterPageMode()

IFX_INLINE uint8 IfxFlash_enterPageMode ( uint32 pageAddr )

Performs the sequence for entering program page mode.

Parameters
pageAddr pageAddr specifies the page being written - the command sequence will be varied accordingly
Returns
0 on success, != 0 if invalid or not available page is selected

Usage Example:

unsigned int pageAddr = IFXFLASH_DFLASH_START + page*IFXFLASH_DFLASH_PAGE_LENGTH;
// enter page mode
IfxFlash_enterPageMode(pageAddr);

Definition at line 493 of file IfxFlash.h.

◆ IfxFlash_eraseMultiplePhysicalSectors()

IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the erase sequence for n sectors in program or data flash.

Parameters
sectorAddr | sector address
numSector | the no.of sectors to be erased
Returns
None

Usage Example:

// erase the first and second data flash
IfxFlash_eraseMultiplePhysicalSectors(IFXFLASH_DFLASH_START,2);

Definition at line 513 of file IfxFlash.h.

◆ IfxFlash_eraseMultipleSectors()

IFX_INLINE void IfxFlash_eraseMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the erase sequence for n sectors in program or data flash.

Parameters
sectorAddr | sector address
numSector | the no.of sectors to be erased
Returns
None

Usage Example:

// erase logical sectors of program flash
IfxFlash_eraseMultipleSectors(pFlashTableLog[sector].start,2);

Definition at line 529 of file IfxFlash.h.

◆ IfxFlash_erasePhysicalSector()

IFX_INLINE void IfxFlash_erasePhysicalSector ( uint32 sectorAddr )

Performs the erase sequence for a physical sector in program or data flash.

Parameters
sectorAddr sector address
Returns
None

Usage Example:

// erase the first data flash
IfxFlash_erasePhysicalSector(IFXFLASH_DFLASH_START);

Definition at line 545 of file IfxFlash.h.

◆ IfxFlash_eraseSector()

IFX_INLINE void IfxFlash_eraseSector ( uint32 sectorAddr )

Performs the erase sequence for a sector in program or data flash.

Parameters
sectorAddr sector address
Returns
None

Usage Example:

// erase all sectors of program flash
for(sector=0; sector<IFXFLASH_PFLASH_NO_OF_LOG_SECTORS; ++sector) {
// get address from predefined table
unsigned int sector_addr = pFlashTableLog[sector].start;
// erase sector
IfxFlash_eraseSector(sector_addr);
}

Definition at line 561 of file IfxFlash.h.

◆ IfxFlash_eraseVerifyMultipleSectors()

IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the "Erase Verify" sequence for multiple sectors.

Parameters
sectorAddr | sector address which should be verified
numSector | no.of sectors to be operated on
Returns
None

Definition at line 577 of file IfxFlash.h.

◆ IfxFlash_eraseVerifySector()

IFX_INLINE void IfxFlash_eraseVerifySector ( uint32 sectorAddr )

Performs the "Erase Verify" sequence.

Parameters
sectorAddr sector address which should be verified
Returns
None

Definition at line 593 of file IfxFlash.h.

◆ IfxFlash_loadPage()

IFX_INLINE void IfxFlash_loadPage | ( | uint32 | pageAddr,
 |  | uint32 | wordL,
 |  | uint32 | wordU
 | ) |  |

performs a load page sequence with a single 64bit access

Parameters
pageAddr | pageAddr start address of page which should be programmed
wordL | Lower Address word
wordU | Upper address word
Returns
None

Usage Example:

// load 64bit into assembly buffer of program flash
IfxFlash_loadPage(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
// load 64bit into assembly buffer of data flash
IfxFlash_loadPage(0XAF000000, 0x55555555, 0xaaaaaaaa);

Definition at line 609 of file IfxFlash.h.

◆ IfxFlash_loadPage2X32()

IFX_INLINE void IfxFlash_loadPage2X32 | ( | uint32 | pageAddr,
 |  | uint32 | wordL,
 |  | uint32 | wordU
 | ) |  |

performs a load page sequence with two 32bit accesses

Parameters
pageAddr | pageAddr start address of page which should be programmed
wordL | Lower Address word
wordU | Upper Address word
Returns
None

Usage Example:

// load 2*32bit into assembly buffer of program flash
IfxFlash_loadPage2X32(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
// load 2*32bit into assembly buffer of data flash
IfxFlash_loadPage2X32(0XAF000000, 0x55555555, 0xaaaaaaaa);

Definition at line 620 of file IfxFlash.h.

◆ IfxFlash_resetToRead()

IFX_INLINE void IfxFlash_resetToRead ( uint32 flash )

reset to read mode

Parameters
flash flash selects the flash (PMU) module
Returns
None

Usage Example:

// reset to read mode
IfxFlash_resetToRead(0);

Definition at line 634 of file IfxFlash.h.

◆ IfxFlash_resumeProtection()

IFX_INLINE void IfxFlash_resumeProtection ( uint32 flash )

Performs the "Resume Protection" sequence.

Parameters
flash selects the flash (PMU) module
Returns
None

Definition at line 644 of file IfxFlash.h.

◆ IfxFlash_suspendResumeMultipleSectors()

IFX_INLINE void IfxFlash_suspendResumeMultipleSectors | ( | uint32 | sectorAddr,
 |  | uint32 | numSector
 | ) |  |

Performs the "Suspend Resume" sequence for multiple sectors.

Parameters
sectorAddr | sector address
numSector | the no.of sectors to be operated on
Returns
None

Definition at line 656 of file IfxFlash.h.

◆ IfxFlash_suspendResumeSector()

IFX_INLINE void IfxFlash_suspendResumeSector ( uint32 sectorAddr )

Performs the "Suspend Resume" sequence.

Parameters
sectorAddr sector address which should be resumed
Returns
None

Definition at line 672 of file IfxFlash.h.

◆ IfxFlash_waitUnbusy()

IFX_INLINE uint8 IfxFlash_waitUnbusy | ( | uint32 | flash,
 |  | IfxFlash_FlashType | flashType
 | ) |  |

Polls the selected status flag in flash status register until it turns to 0.

Parameters
flash | selects the flash (PMU) module
flashType | selects the flash type
Returns
0 on success, != 0 if invalid or not available page is selected

Usage Example:

// wait until data flash 0 is unbusy
IfxFlash_waitUnbusy(0, IfxFlash_FlashType_D0);

Definition at line 688 of file IfxFlash.h.

◆ IfxFlash_writeBurst()

IFX_INLINE void IfxFlash_writeBurst ( uint32 pageAddr )

Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writeBurst(0xa0000100);

Definition at line 712 of file IfxFlash.h.

◆ IfxFlash_writePage()

IFX_INLINE void IfxFlash_writePage ( uint32 pageAddr )

Performs the "Write Page" sequence.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writePage(0xa0000100);

Definition at line 728 of file IfxFlash.h.

◆ IfxFlash_writePageOnce()

IFX_INLINE void IfxFlash_writePageOnce ( uint32 pageAddr )

Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing.

Parameters
pageAddr start address of page which should be programmed
Returns
None

Usage Example:

// program the second page of the first sector of the Program Flash
IfxFlash_writePageOnce(0xa0000100);

Definition at line 744 of file IfxFlash.h.


iLLD_TC26B: Error Tracking Functions

Functions
Error Tracking Functions
iLLD » FLASH » Standard Driver
Collaboration diagram for Error Tracking Functions:

Functions

IFX_EXTERN void | IfxFlash_clearCorrectableErrorTracking (IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_clearUncorrectableErrorTracking (IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_disableCorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_disableUncorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
IFX_EXTERN uint32 | IfxFlash_getTrackedCorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers. More...
IFX_EXTERN uint32 | IfxFlash_getTrackedUncorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers. More...
IFX_EXTERN void | IfxFlash_selectCorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors. More...
IFX_EXTERN void | IfxFlash_selectUncorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors. More...

Detailed Description

Function Documentation

◆ IfxFlash_clearCorrectableErrorTracking()

IFX_EXTERN void IfxFlash_clearCorrectableErrorTracking ( IfxFlash_PortId portId )

Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register.

Parameters
portId Corrected Bits Address Buffer Port Id
Returns
None

Definition at line 36 of file IfxFlash.c.

◆ IfxFlash_clearUncorrectableErrorTracking()

IFX_EXTERN void IfxFlash_clearUncorrectableErrorTracking ( IfxFlash_PortId portId )

Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register.

Parameters
portId UnCorrected Bits Address Buffer Port Id
Returns
None

Definition at line 42 of file IfxFlash.c.

◆ IfxFlash_disableCorrectableErrorTracking()

IFX_EXTERN void IfxFlash_disableCorrectableErrorTracking | ( | IfxFlash_PortId | portId,
 |  | boolean | disable
 | ) |  |

Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register.

Parameters
portId | Corrected Bits Address Buffer Port Id
disable | Disable/enable the error tracking
Returns
None

Definition at line 48 of file IfxFlash.c.

◆ IfxFlash_disableUncorrectableErrorTracking()

IFX_EXTERN void IfxFlash_disableUncorrectableErrorTracking | ( | IfxFlash_PortId | portId,
 |  | boolean | disable
 | ) |  |

Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register.

Parameters
portId | UnCorrected Bits Address Buffer Port Id
disable | Disable/enable the error tracking
Returns
None

Definition at line 54 of file IfxFlash.c.

◆ IfxFlash_getTrackedCorrectableErrors()

IFX_EXTERN uint32 IfxFlash_getTrackedCorrectableErrors | ( | IfxFlash_PortId | portId,
 |  | IfxFlash_ErrorTracking_Address * | trackedFlashAdresses
 | ) |  |

Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers.

Parameters
portId | Corrected Bits Address Buffer Port Id
trackedFlashAdresses | tracked flash addresses for correctable errors
Returns
numErrors

Example usage to print out tracked errors :

{
IfxFlash_ErrorTracking_Address trackedAddresses[IFX_FLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS];
IfxFlash_portId portId = 0;
uint8 numTrackedAddresses = IfxFlash_getTrackedCorrectableErrors(portId, trackedAddresses);
for(int i=0; i<numTrackedAddresses; ++i) {
printf("%d: A:0x%04x Error Type:%d \n",
i,
trackedAddresses[i].address,
trackedAddresses[i].errorType);
}
}

Definition at line 77 of file IfxFlash.c.

◆ IfxFlash_getTrackedUncorrectableErrors()

IFX_EXTERN uint32 IfxFlash_getTrackedUncorrectableErrors | ( | IfxFlash_PortId | portId,
 |  | IfxFlash_ErrorTracking_Address * | trackedFlashAdresses
 | ) |  |

Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers.

Parameters
portId | UnCorrected Bits Address Buffer Port Id
trackedFlashAdresses | tracked flash addresses for uncorrectable errors
Returns
numErrors

Example usage to print out tracked errors :

{
IfxFlash_ErrorTracking_Address trackedAddresses[IFX_FLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS];
IfxFlash_portId portId = 0;
uint8 numTrackedAddresses = IfxFlash_getTrackedUnCorrectableErrors(portId, trackedAddresses);
for(int i=0; i<numTrackedAddresses; ++i) {
printf("%d: A:0x%04x Error Type:%d \n",
i,
trackedAddresses[i].address,
trackedAddresses[i].errorType);
}
}

Definition at line 107 of file IfxFlash.c.

◆ IfxFlash_selectCorrectableErrorTracking()

IFX_EXTERN void IfxFlash_selectCorrectableErrorTracking | ( | IfxFlash_PortId | portId,
 |  | IfxFlash_ErrorTracking | errorTracking
 | ) |  |

Enables error tracking for correctable flash errors.

Parameters
portId | Corrected Bits Address Buffer Port Id
errorTracking | Error Tracking to be selected
Returns
None

Usage example: how to enable error tracking for two flash ports:

// enable error tracking
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
// PFlash0
IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId_PortId_0, IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId_PortId_0, IfxFlash_ErrorTracking_uncorrectableMultiBitError);
// PFlash1
IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId_PortId_1, IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId_PortId_1, IfxFlash_ErrorTracking_uncorrectableMultiBitError);
IfxScuWdt_setCpuEndinit(password);
}

Definition at line 137 of file IfxFlash.c.

◆ IfxFlash_selectUncorrectableErrorTracking()

IFX_EXTERN void IfxFlash_selectUncorrectableErrorTracking | ( | IfxFlash_PortId | portId,
 |  | IfxFlash_ErrorTracking | errorTracking
 | ) |  |

Enables error tracking for uncorrectable flash errors.

Parameters
portId | UnCorrected Bits Address Buffer Port Id
errorTracking | Error Tracking to be selected
Returns
None

Usage example: see IfxFlash_selectCorrectableErrorTracking

Definition at line 149 of file IfxFlash.c.


iLLD_TC26B: IfxFlash_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxFlash_cfg.h File Reference
iLLD » FLASH

FLASH on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxFlash_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxFlash_flashSector
contains start and end address of sectors More...

Macros

#define | IFXFLASH_NUM_FLASH_MODULES (1)
number of flash modules. This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead. More...
#define | IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)
base address for general command sequences More...
#define | IFXFLASH_CMD_BASE_OFFSET (0x00100000)
offset between command areas (in DFlash range) More...
#define | IFXFLASH_DFLASH_BANKS (1)
#define | IFXFLASH_DFLASH_BURST_LENGTH (0x20)
Dflash burst length. More...
#define | IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)
#define | IFXFLASH_DFLASH_NUM_LOG_SECTORS (12)
#define | IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)
Phy sector for DF. More...
#define | IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (16)
#define | IFXFLASH_DFLASH_PAGE_LENGTH (8)
8 bytes More...
#define | IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x2000)
#define | IFXFLASH_DFLASH_START (0xaf000000)
#define | IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)
#define | IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)
#define | IFXFLASH_NUM_MODULES (1)
number of flash modules More...
#define | IFXFLASH_PFLASH_BANKS (2)
#define | IFXFLASH_PFLASH_BURST_LENGTH (0x100)
P flash burst length. More...
#define | IFXFLASH_PFLASH_END ()
p flash end More...
#define | IFXFLASH_PFLASH_NUM_LOG_SECTORS (23 + 25)
#define | IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (2 + 3)
#define | IFXFLASH_PFLASH_OFFSET (0x00800000)
offset between PMU PFlash ranges More...
#define | IFXFLASH_PFLASH_PAGE_LENGTH (32)
#define | IFXFLASH_PFLASH_SIZE (0x00280000)
p flash size More...
#define | IFXFLASH_PFLASH_START (0xa0000000)
p flash start More...

Enumerations

enum IfxFlash_FlashType {
IfxFlash_FlashType_Fa = 0,
IfxFlash_FlashType_D0 = 1,
IfxFlash_FlashType_D1 = 2,
IfxFlash_FlashType_P0 = 3,
IfxFlash_FlashType_P1 = 4,
IfxFlash_FlashType_P2 = 5,
IfxFlash_FlashType_P3 = 6
}
enum IfxFlash_UcbType {
IfxFlash_UcbType_ucb0 = 0,
IfxFlash_UcbType_ucb1 = 1,
IfxFlash_UcbType_ucbHsmc = 5
}
user configuration block type More...

Variables

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog [IFXFLASH_DFLASH_NUM_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys [IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog [IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog [IFXFLASH_PFLASH_NUM_LOG_SECTORS]
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys [IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Detailed Description

FLASH on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFlash_cfg.h.

Data Structure Documentation

◆ IfxFlash_flashSector

struct IfxFlash_flashSector

contains start and end address of sectors

Definition at line 156 of file IfxFlash_cfg.h.

Data Fields
uint32 | end | end address of sector
uint32 | start | start address of sector

Macro Definition Documentation

◆ IFXFLASH_CMD_BASE_ADDRESS

#define IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)

base address for general command sequences

Definition at line 52 of file IfxFlash_cfg.h.

Referenced by IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_enterPageMode(), IfxFlash_eraseMultiplePhysicalSectors(), IfxFlash_eraseMultipleSectors(), IfxFlash_erasePhysicalSector(), IfxFlash_eraseSector(), IfxFlash_eraseVerifyMultipleSectors(), IfxFlash_eraseVerifySector(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxFlash_suspendResumeMultipleSectors(), IfxFlash_suspendResumeSector(), IfxFlash_writeBurst(), IfxFlash_writePage(), and IfxFlash_writePageOnce().

◆ IFXFLASH_CMD_BASE_OFFSET

#define IFXFLASH_CMD_BASE_OFFSET (0x00100000)

offset between command areas (in DFlash range)

Definition at line 56 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_BANKS

#define IFXFLASH_DFLASH_BANKS (1)

Definition at line 58 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_BURST_LENGTH

#define IFXFLASH_DFLASH_BURST_LENGTH (0x20)

Dflash burst length.

Definition at line 62 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_END

#define IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)

Definition at line 64 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_LOG_SECTORS

#define IFXFLASH_DFLASH_NUM_LOG_SECTORS (12)

Definition at line 66 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS

#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)

Phy sector for DF.

Definition at line 70 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS

#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (16)

Definition at line 72 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_PAGE_LENGTH

#define IFXFLASH_DFLASH_PAGE_LENGTH (8)

8 bytes

Definition at line 76 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_SIZE

#define IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x2000)

Definition at line 78 of file IfxFlash_cfg.h.

◆ IFXFLASH_DFLASH_START

#define IFXFLASH_DFLASH_START (0xaf000000)

Definition at line 80 of file IfxFlash_cfg.h.

◆ IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS

#define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)

Definition at line 84 of file IfxFlash_cfg.h.

Referenced by IfxFlash_getTrackedCorrectableErrors().

◆ IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS

#define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)

Definition at line 88 of file IfxFlash_cfg.h.

Referenced by IfxFlash_getTrackedUncorrectableErrors().

◆ IFXFLASH_NUM_FLASH_MODULES

#define IFXFLASH_NUM_FLASH_MODULES (1)

number of flash modules. This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead.

Definition at line 48 of file IfxFlash_cfg.h.

◆ IFXFLASH_NUM_MODULES

#define IFXFLASH_NUM_MODULES (1)

number of flash modules

Definition at line 92 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_BANKS

#define IFXFLASH_PFLASH_BANKS (2)

Definition at line 94 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_BURST_LENGTH

#define IFXFLASH_PFLASH_BURST_LENGTH (0x100)

P flash burst length.

Definition at line 98 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_END

#define IFXFLASH_PFLASH_END ()

p flash end

Definition at line 102 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_NUM_LOG_SECTORS

#define IFXFLASH_PFLASH_NUM_LOG_SECTORS (23 + 25)

Definition at line 106 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS

#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (2 + 3)

Definition at line 108 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_OFFSET

#define IFXFLASH_PFLASH_OFFSET (0x00800000)

offset between PMU PFlash ranges

Definition at line 112 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_PAGE_LENGTH

#define IFXFLASH_PFLASH_PAGE_LENGTH (32)

Definition at line 114 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_SIZE

#define IFXFLASH_PFLASH_SIZE (0x00280000)

p flash size

Definition at line 118 of file IfxFlash_cfg.h.

◆ IFXFLASH_PFLASH_START

#define IFXFLASH_PFLASH_START (0xa0000000)

p flash start

Definition at line 122 of file IfxFlash_cfg.h.

Enumeration Type Documentation

◆ IfxFlash_FlashType

enum IfxFlash_FlashType
Enumerator
IfxFlash_FlashType_Fa | Flash Array.
IfxFlash_FlashType_D0 | data flash #0
IfxFlash_FlashType_D1 | data flash #1
IfxFlash_FlashType_P0 | program flash #0
IfxFlash_FlashType_P1 | program flash #1
IfxFlash_FlashType_P2 | program flash #2
IfxFlash_FlashType_P3 | program flash #3

Definition at line 130 of file IfxFlash_cfg.h.

◆ IfxFlash_UcbType

enum IfxFlash_UcbType

user configuration block type

Enumerator
IfxFlash_UcbType_ucb0 | UCB 0.
IfxFlash_UcbType_ucb1 | UCB 1.
IfxFlash_UcbType_ucbHsmc | HSM UCB.

Definition at line 143 of file IfxFlash_cfg.h.

Variable Documentation

◆ IfxFlash_dFlashTableEepLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]

Definition at line 166 of file IfxFlash_cfg.h.

◆ IfxFlash_dFlashTablePhys

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]

Definition at line 168 of file IfxFlash_cfg.h.

◆ IfxFlash_dFlashTableUcbLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]

Definition at line 170 of file IfxFlash_cfg.h.

◆ IfxFlash_pFlashTableLog

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]

Definition at line 172 of file IfxFlash_cfg.h.

◆ IfxFlash_pFlashTablePhys

IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Definition at line 174 of file IfxFlash_cfg.h.


iLLD_TC26B: IfxFlash.h File Reference

  • Flash
  • Std
Data Structures | Enumerations | Functions
IfxFlash.h File Reference
iLLD » FLASH

FLASH basic functionality. More...

#include "_Impl/IfxFlash_cfg.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxFlash_reg.h"
Include dependency graph for IfxFlash.h:

Go to the source code of this file.

Data Structures

struct IfxFlash_ErrorTracking_Address
Error tracking address structure. More...

Enumerations

enum IfxFlash_ErrorTracking {
IfxFlash_ErrorTracking_none = 0,
IfxFlash_ErrorTracking_correctedSingleBitError = 1,
IfxFlash_ErrorTracking_correctedDoubleBitError = 2,
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError = 3,
IfxFlash_ErrorTracking_uncorrectableMultiBitError = 4
}
enumeration for Flash Error tracking More...
enum IfxFlash_PortId {
IfxFlash_PortId_PortId_0 = 0,
IfxFlash_PortId_PortId_1 = 1
}
Corrected/UnCorrected Bits Address Buffer Port Id. More...

Functions

IFX_INLINE void | IfxFlash_clearStatus (uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared. More...
IFX_INLINE uint8 | IfxFlash_enterPageMode (uint32 pageAddr)
Performs the sequence for entering program page mode. More...
IFX_INLINE void | IfxFlash_eraseMultiplePhysicalSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash. More...
IFX_INLINE void | IfxFlash_erasePhysicalSector (uint32 sectorAddr)
Performs the erase sequence for a physical sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseSector (uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash. More...
IFX_INLINE void | IfxFlash_eraseVerifyMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_eraseVerifySector (uint32 sectorAddr)
Performs the "Erase Verify" sequence. More...
IFX_INLINE void | IfxFlash_loadPage (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access More...
IFX_INLINE void | IfxFlash_loadPage2X32 (uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses More...
IFX_INLINE void | IfxFlash_resetToRead (uint32 flash)
reset to read mode More...
IFX_INLINE void | IfxFlash_resumeProtection (uint32 flash)
Performs the "Resume Protection" sequence. More...
IFX_INLINE void | IfxFlash_suspendResumeMultipleSectors (uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors. More...
IFX_INLINE void | IfxFlash_suspendResumeSector (uint32 sectorAddr)
Performs the "Suspend Resume" sequence. More...
IFX_INLINE uint8 | IfxFlash_waitUnbusy (uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0. More...
IFX_INLINE void | IfxFlash_writeBurst (uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command. More...
IFX_INLINE void | IfxFlash_writePage (uint32 pageAddr)
Performs the "Write Page" sequence. More...
IFX_INLINE void | IfxFlash_writePageOnce (uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing. More...
IFX_EXTERN void | IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...
IFX_EXTERN void | IfxFlash_clearCorrectableErrorTracking (IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_clearUncorrectableErrorTracking (IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_disableCorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
IFX_EXTERN void | IfxFlash_disableUncorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
IFX_EXTERN uint32 | IfxFlash_getTrackedCorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers. More...
IFX_EXTERN uint32 | IfxFlash_getTrackedUncorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers. More...
IFX_EXTERN void | IfxFlash_selectCorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors. More...
IFX_EXTERN void | IfxFlash_selectUncorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors. More...
IFX_INLINE boolean | IfxFlash_waitUnbusyAll (void)
This function will wait till all the flash banks are out of busy state. More...

Detailed Description

FLASH basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFlash.h.

Function Documentation

◆ IfxFlash_waitUnbusyAll()

IFX_INLINE boolean IfxFlash_waitUnbusyAll ( void )

This function will wait till all the flash banks are out of busy state.

Returns
Return 0 on success.Success means none of the flash banks are in busy state.

Definition at line 760 of file IfxFlash.h.


iLLD_TC26B: Global Definitions

Files
Global Definitions
iLLD
Collaboration diagram for Global Definitions:

Files

file IfxGlobal_cfg.h
Global definitions.

Detailed Description


iLLD_TC26B: IfxGlobal_cfg.h File Reference

  • _Impl
Macros
IfxGlobal_cfg.h File Reference
iLLD » Global Definitions

Global definitions. More...

Go to the source code of this file.

Macros

#define | IFXGLOBAL_DERIVATIVE_TC26xB (1)
Microcontroller derivative corresponding to the iLLD implementation. More...
#define | IFXGLOBAL_DERIVATIVE_NAME "TC26xB"
Microcontroller derivative name. More...

Detailed Description

Global definitions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGlobal_cfg.h.

Macro Definition Documentation

◆ IFXGLOBAL_DERIVATIVE_NAME

#define IFXGLOBAL_DERIVATIVE_NAME "TC26xB"

Microcontroller derivative name.

Definition at line 42 of file IfxGlobal_cfg.h.

◆ IFXGLOBAL_DERIVATIVE_TC26xB

#define IFXGLOBAL_DERIVATIVE_TC26xB (1)

Microcontroller derivative corresponding to the iLLD implementation.

Definition at line 38 of file IfxGlobal_cfg.h.


iLLD_TC26B: GPT12

Modules | Files
GPT12
iLLD
Collaboration diagram for GPT12:

Modules

Implementation
Standard Driver
GPT12 Pin Mapping
INCRENC

Files

file | IfxGpt12_cfg.h
GPT12 on-chip implementation data.
file | IfxGpt12_PinMap.c
GPT12 I/O map.
file | IfxGpt12_PinMap.h
GPT12 I/O map.
file | IfxGpt12_IncrEnc.h
GPT12 INCRENC details.
file | IfxGpt12.h
GPT12 basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » GPT12
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » GPT12
Collaboration diagram for Standard Driver:

Modules

Enumerations
Interrupt Functions
Configuration Functions
Utility Functions
Operative Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GPT12 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxGpt12_CaptureInput {
IfxGpt12_CaptureInput_A = 0,
IfxGpt12_CaptureInput_B = 1,
IfxGpt12_CaptureInput_C = 2,
IfxGpt12_CaptureInput_D = 3
}
Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN. More...
enum IfxGpt12_CaptureInputMode {
IfxGpt12_CaptureInputMode_none = 0,
IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1,
IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3
}
Tx Input Edge Selection (Capture Mode, x=2,4) More...
enum IfxGpt12_CaptureTrigger {
IfxGpt12_CaptureTrigger_capin = 0,
IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1
}
Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3. More...
enum IfxGpt12_CaptureTriggerMode {
IfxGpt12_CaptureTriggerMode_disabled = 0,
IfxGpt12_CaptureTriggerMode_risingEdge = 1,
IfxGpt12_CaptureTriggerMode_fallingEdge = 2,
IfxGpt12_CaptureTriggerMode_randomEdge = 3
}
Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI. More...
enum IfxGpt12_CounterInputMode {
IfxGpt12_CounterInputMode_counterDisabled = 0,
IfxGpt12_CounterInputMode_risingEdgeTxIN = 1,
IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CounterInputMode_bothEdgesTxIN = 3,
IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5,
IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) More...
enum IfxGpt12_EudInput {
IfxGpt12_EudInput_A = 0,
IfxGpt12_EudInput_B = 1,
IfxGpt12_EudInput_C = 2,
IfxGpt12_EudInput_D = 3
}
Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4) More...
enum IfxGpt12_Gpt1BlockPrescaler {
IfxGpt12_Gpt1BlockPrescaler_8 = 0,
IfxGpt12_Gpt1BlockPrescaler_4 = 1,
IfxGpt12_Gpt1BlockPrescaler_32 = 2,
IfxGpt12_Gpt1BlockPrescaler_16 = 3
}
GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1. More...
enum IfxGpt12_Gpt2BlockPrescaler {
IfxGpt12_Gpt2BlockPrescaler_4 = 0,
IfxGpt12_Gpt2BlockPrescaler_2 = 1,
IfxGpt12_Gpt2BlockPrescaler_16 = 2,
IfxGpt12_Gpt2BlockPrescaler_8 = 3
}
Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2. More...
enum IfxGpt12_IncrementalInterfaceInputMode {
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3
}
Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4) More...
enum IfxGpt12_Input {
IfxGpt12_Input_A = 0,
IfxGpt12_Input_B = 1,
IfxGpt12_Input_C = 2,
IfxGpt12_Input_D = 3
}
Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4) More...
enum IfxGpt12_Mode {
IfxGpt12_Mode_timer = 0,
IfxGpt12_Mode_counter = 1,
IfxGpt12_Mode_lowGatedTimer = 2,
IfxGpt12_Mode_highGatedTimer = 3,
IfxGpt12_Mode_reload = 4,
IfxGpt12_Mode_capture = 5,
IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6,
IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7
}
Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4) More...
enum IfxGpt12_ReloadInputMode {
IfxGpt12_ReloadInputMode_counterDisabled = 0,
IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1,
IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2,
IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3,
IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5,
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) More...
enum IfxGpt12_SleepMode {
IfxGpt12_SleepMode_enable = 0,
IfxGpt12_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS. More...
enum IfxGpt12_SuspendMode {
IfxGpt12_SuspendMode_none = 0,
IfxGpt12_SuspendMode_hard = 1,
IfxGpt12_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxGpt12_TimerDirection {
IfxGpt12_TimerDirection_up = 0,
IfxGpt12_TimerDirection_down = 1
}
Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6) More...
enum IfxGpt12_TimerDirectionSource {
IfxGpt12_TimerDirectionSource_internal = 0,
IfxGpt12_TimerDirectionSource_external = 1
}
Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) More...
enum IfxGpt12_TimerInputPrescaler {
IfxGpt12_TimerInputPrescaler_1 = 0,
IfxGpt12_TimerInputPrescaler_2 = 1,
IfxGpt12_TimerInputPrescaler_4 = 2,
IfxGpt12_TimerInputPrescaler_8 = 3,
IfxGpt12_TimerInputPrescaler_16 = 4,
IfxGpt12_TimerInputPrescaler_32 = 5,
IfxGpt12_TimerInputPrescaler_64 = 6,
IfxGpt12_TimerInputPrescaler_128 = 7
}
Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) More...
enum IfxGpt12_TimerReloadMode {
IfxGpt12_TimerReloadMode_disable,
IfxGpt12_TimerReloadMode_enable
}
Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR. More...
enum IfxGpt12_TimerRemoteControl {
IfxGpt12_TimerRemoteControl_off = 0,
IfxGpt12_TimerRemoteControl_on = 1
}
Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) More...
enum IfxGpt12_TimerRun {
IfxGpt12_TimerRun_stop = 0,
IfxGpt12_TimerRun_start = 1
}
Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6) More...

Detailed Description

Enumeration Type Documentation

◆ IfxGpt12_CaptureInput

enum IfxGpt12_CaptureInput

Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN.

Enumerator
IfxGpt12_CaptureInput_A | signal CAPINA selected
IfxGpt12_CaptureInput_B | signal CAPINB selected
IfxGpt12_CaptureInput_C | signal CAPINC selected
IfxGpt12_CaptureInput_D | signal CAPIND selected

Definition at line 59 of file IfxGpt12.h.

◆ IfxGpt12_CaptureInputMode

enum IfxGpt12_CaptureInputMode

Tx Input Edge Selection (Capture Mode, x=2,4)

Enumerator
IfxGpt12_CaptureInputMode_none | None, Counter is disabled.
IfxGpt12_CaptureInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_CaptureInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_CaptureInputMode_bothEdgesTxIN | (rising or falling edge) on TxIN

Definition at line 69 of file IfxGpt12.h.

◆ IfxGpt12_CaptureTrigger

enum IfxGpt12_CaptureTrigger

Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3.

Enumerator
IfxGpt12_CaptureTrigger_capin | Capture Trigger Enable from CAPIN.
IfxGpt12_CaptureTrigger_t3inOrT3EUD | Capture Trigger Enable from T3IN/T3EUD.

Definition at line 80 of file IfxGpt12.h.

◆ IfxGpt12_CaptureTriggerMode

enum IfxGpt12_CaptureTriggerMode

Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI.

Enumerator
IfxGpt12_CaptureTriggerMode_disabled | capture disabled
IfxGpt12_CaptureTriggerMode_risingEdge | positive Transition on CAPIN or any Transition on T3IN
IfxGpt12_CaptureTriggerMode_fallingEdge | negative Transition on CAPIN or any Transition on T3EUD
IfxGpt12_CaptureTriggerMode_randomEdge | Any Transition on CAPIN or any Transition on T3IN/T3EUD.

Definition at line 89 of file IfxGpt12.h.

◆ IfxGpt12_CounterInputMode

enum IfxGpt12_CounterInputMode

Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6)

Enumerator
IfxGpt12_CounterInputMode_counterDisabled | Counter Tx is disabled.
IfxGpt12_CounterInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_CounterInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_CounterInputMode_bothEdgesTxIN | rising or falling edge on TxIN
IfxGpt12_CounterInputMode_risingEdgeTxOTL | rising edge of TxOTL (x=3,6)
IfxGpt12_CounterInputMode_fallingEdgeTxOTL | falling edge of TxOTL
IfxGpt12_CounterInputMode_bothEdgesTxOTL | rising or falling edge of TxOTL

Definition at line 100 of file IfxGpt12.h.

◆ IfxGpt12_EudInput

enum IfxGpt12_EudInput

Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)

Enumerator
IfxGpt12_EudInput_A | signal TXEUDA selected
IfxGpt12_EudInput_B | signal TXEUDB selected
IfxGpt12_EudInput_C | signal TXEUDC selected
IfxGpt12_EudInput_D | signal TXEUDD selected

Definition at line 114 of file IfxGpt12.h.

◆ IfxGpt12_Gpt1BlockPrescaler

enum IfxGpt12_Gpt1BlockPrescaler

GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1.

Enumerator
IfxGpt12_Gpt1BlockPrescaler_8 | fGPT/8
IfxGpt12_Gpt1BlockPrescaler_4 | fGPT/4
IfxGpt12_Gpt1BlockPrescaler_32 | fGPT/32
IfxGpt12_Gpt1BlockPrescaler_16 | fGPT/16

Definition at line 125 of file IfxGpt12.h.

◆ IfxGpt12_Gpt2BlockPrescaler

enum IfxGpt12_Gpt2BlockPrescaler

Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2.

Enumerator
IfxGpt12_Gpt2BlockPrescaler_4 | fGPT/4
IfxGpt12_Gpt2BlockPrescaler_2 | fGPT/2
IfxGpt12_Gpt2BlockPrescaler_16 | fGPT/16
IfxGpt12_Gpt2BlockPrescaler_8 | fGPT/8

Definition at line 136 of file IfxGpt12.h.

◆ IfxGpt12_IncrementalInterfaceInputMode

enum IfxGpt12_IncrementalInterfaceInputMode

Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)

Enumerator
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx | Counter Tx Stop.
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN | (rising or falling edge) on TxIN
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD | (rising or falling edge) on TxEUD
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD | (rising or falling edge) on any Tx input (TxIN or TxEUD)

Definition at line 147 of file IfxGpt12.h.

◆ IfxGpt12_Input

enum IfxGpt12_Input

Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)

Enumerator
IfxGpt12_Input_A | signal TXINA selected
IfxGpt12_Input_B | signal TXINB selected
IfxGpt12_Input_C | signal TXINC selected
IfxGpt12_Input_D | signal TXIND selected

Definition at line 158 of file IfxGpt12.h.

◆ IfxGpt12_Mode

enum IfxGpt12_Mode

Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)

Enumerator
IfxGpt12_Mode_timer | Timer Mode selected.
IfxGpt12_Mode_counter | Counter Mode selected.
IfxGpt12_Mode_lowGatedTimer | Low Gated Timer Mode selected.
IfxGpt12_Mode_highGatedTimer | High Gated Timer Mode selected.
IfxGpt12_Mode_reload | Reload Mode selected.
IfxGpt12_Mode_capture | Capture Mode selected.
IfxGpt12_Mode_incrementalInterfaceRotationDetection | Incremental Interface Mode selected.
IfxGpt12_Mode_incrementalInterfaceEdgeDetection | Incremental Interface Mode selected.

Definition at line 169 of file IfxGpt12.h.

◆ IfxGpt12_ReloadInputMode

enum IfxGpt12_ReloadInputMode

Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4)

Enumerator
IfxGpt12_ReloadInputMode_counterDisabled | Counter Tx is disabled.
IfxGpt12_ReloadInputMode_risingEdgeTxIN | rising edge on TxIN
IfxGpt12_ReloadInputMode_fallingEdgeTxIN | falling edge on TxIN
IfxGpt12_ReloadInputMode_bothEdgesTxIN | rising or falling edge on TxIN
IfxGpt12_ReloadInputMode_risingEdgeTxOTL | rising edge of Tx toggle latch TxOTL
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL | falling edge of Tx toggle latch TxOTL
IfxGpt12_ReloadInputMode_bothEdgesTxOTL | rising or falling edge of Tx toggle latch TxOTL

Definition at line 184 of file IfxGpt12.h.

◆ IfxGpt12_SleepMode

enum IfxGpt12_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS.

Enumerator
IfxGpt12_SleepMode_enable | enables sleep mode
IfxGpt12_SleepMode_disable | disables sleep mode

Definition at line 198 of file IfxGpt12.h.

◆ IfxGpt12_SuspendMode

enum IfxGpt12_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxGpt12_SuspendMode_none | No suspend.
IfxGpt12_SuspendMode_hard | Hard Suspend.
IfxGpt12_SuspendMode_soft | Soft Suspend.

Definition at line 206 of file IfxGpt12.h.

◆ IfxGpt12_TimerDirection

enum IfxGpt12_TimerDirection

Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)

Enumerator
IfxGpt12_TimerDirection_up | Timer Up Direction selected.
IfxGpt12_TimerDirection_down | Timer Down Direction selected.

Definition at line 216 of file IfxGpt12.h.

◆ IfxGpt12_TimerDirectionSource

enum IfxGpt12_TimerDirectionSource

Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6)

Enumerator
IfxGpt12_TimerDirectionSource_internal | Timer Dir Control = TxUD (x=2,3,4)
IfxGpt12_TimerDirectionSource_external | Timer Dir Control = TxUD (x=2,3,4)

Definition at line 225 of file IfxGpt12.h.

◆ IfxGpt12_TimerInputPrescaler

enum IfxGpt12_TimerInputPrescaler

Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4)

Enumerator
IfxGpt12_TimerInputPrescaler_1
IfxGpt12_TimerInputPrescaler_2
IfxGpt12_TimerInputPrescaler_4
IfxGpt12_TimerInputPrescaler_8
IfxGpt12_TimerInputPrescaler_16
IfxGpt12_TimerInputPrescaler_32
IfxGpt12_TimerInputPrescaler_64
IfxGpt12_TimerInputPrescaler_128

Definition at line 234 of file IfxGpt12.h.

◆ IfxGpt12_TimerReloadMode

enum IfxGpt12_TimerReloadMode

Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR.

Enumerator
IfxGpt12_TimerReloadMode_disable | Reload mode disabled.
IfxGpt12_TimerReloadMode_enable | Reload mode enabled.

Definition at line 249 of file IfxGpt12.h.

◆ IfxGpt12_TimerRemoteControl

enum IfxGpt12_TimerRemoteControl

Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4)

Enumerator
IfxGpt12_TimerRemoteControl_off | T2 RemoteControl Off.
IfxGpt12_TimerRemoteControl_on | T2 RemoteControl On.

Definition at line 258 of file IfxGpt12.h.

◆ IfxGpt12_TimerRun

enum IfxGpt12_TimerRun

Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)

Enumerator
IfxGpt12_TimerRun_stop | Timer x Stops.
IfxGpt12_TimerRun_start | Timer X Run.

Definition at line 267 of file IfxGpt12.h.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T2_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T3_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T4_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T5_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T6_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_getCaptureSrc (Ifx_GPT12 *gpt12)
Returns the address of capture service request. More...

Detailed Description

Function Documentation

◆ IfxGpt12_getCaptureSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc ( Ifx_GPT12 * gpt12 )

Returns the address of capture service request.

Parameters
gpt12 Pointer to module base address
Returns
address of capture Interrupt

Definition at line 1553 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_updateSpeedFromT3().

◆ IfxGpt12_T2_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T2_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 2 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of timer 2 Interrupt

Definition at line 1057 of file IfxGpt12.h.

◆ IfxGpt12_T3_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T3_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 3 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 3 Interrupt

Definition at line 1168 of file IfxGpt12.h.

◆ IfxGpt12_T4_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 4 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of timer 4 interrupt

Definition at line 1261 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 5 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 5 Interrupt

Definition at line 1370 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_updateSpeedFromT3().

◆ IfxGpt12_T6_getSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T6_getSrc ( Ifx_GPT12 * gpt12 )

Returns the address of Timer 6 service request.

Parameters
gpt12 Pointer to module base address
Returns
address of Timer 6 interrupt

Definition at line 1476 of file IfxGpt12.h.


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxGpt12_T2_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T2_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction. More...
IFX_INLINE void | IfxGpt12_T2_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_enableOutput (Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT. More...
IFX_INLINE void | IfxGpt12_T3_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T3_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction. More...
IFX_INLINE void | IfxGpt12_T3_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT2 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT3 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T4_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction. More...
IFX_INLINE void | IfxGpt12_T4_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTrigger (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T5_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction. More...
IFX_INLINE void | IfxGpt12_T5_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external More...
IFX_INLINE void | IfxGpt12_T6_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setReloadMode (Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer. More...
IFX_INLINE void | IfxGpt12_initCapInPin (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input. More...
IFX_INLINE void | IfxGpt12_initTxOutPin (const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxGpt12_setCaptureInput (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input. More...
IFX_INLINE void | IfxGpt12_setGpt1BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler. More...
IFX_INLINE void | IfxGpt12_setGpt2BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler. More...
IFX_EXTERN void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
IFX_EXTERN void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
IFX_EXTERN void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...

Detailed Description

Function Documentation

◆ IfxGpt12_disableModule()

IFX_EXTERN void IfxGpt12_disableModule ( Ifx_GPT12 * gpt12 )

Disables the module.

Parameters
gpt12 Pointer to module base address
Returns
None

Definition at line 240 of file IfxGpt12.c.

◆ IfxGpt12_enableModule()

IFX_EXTERN void IfxGpt12_enableModule ( Ifx_GPT12 * gpt12 )

Enables the module.

Parameters
gpt12 Pointer to module base address
Returns
None

Definition at line 249 of file IfxGpt12.c.

◆ IfxGpt12_initCapInPin()

IFX_INLINE void IfxGpt12_initCapInPin | ( | const IfxGpt12_TxIn_In * | capIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a Capin_In input.

Parameters
capIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 1567 of file IfxGpt12.h.

◆ IfxGpt12_initTxEudInPin()

IFX_EXTERN void IfxGpt12_initTxEudInPin | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a TxEUDIn_IN input.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 258 of file IfxGpt12.c.

◆ IfxGpt12_initTxInPin()

IFX_EXTERN void IfxGpt12_initTxInPin | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initializes a TxIn input.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
Returns
None

Definition at line 313 of file IfxGpt12.c.

◆ IfxGpt12_initTxOutPin()

IFX_INLINE void IfxGpt12_initTxOutPin | ( | const IfxGpt12_TxOut_Out * | txOut,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SLSO output.

Parameters
txOut | the TxOUT Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1582 of file IfxGpt12.h.

◆ IfxGpt12_setCaptureInput()

IFX_INLINE void IfxGpt12_setCaptureInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInput | input
 | ) |  |

Sets the capture input.

Parameters
gpt12 | Pointer to Module base address
input | Select the capture input signal
Returns
None

Definition at line 1601 of file IfxGpt12.h.

Referenced by IfxGpt12_initCapInPin(), and IfxGpt12_initCapInPinWithPadLevel().

◆ IfxGpt12_setGpt1BlockPrescaler()

IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Gpt1BlockPrescaler | bps1
 | ) |  |

Sets the GPT1 block prescaler.

Parameters
gpt12 | Pointer to module base address
bps1 | Select the GPT1 block Prescaler
Returns
None

Definition at line 1613 of file IfxGpt12.h.

◆ IfxGpt12_setGpt2BlockPrescaler()

IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Gpt2BlockPrescaler | bps2
 | ) |  |

Sets the GPT2 block prescaler.

Parameters
gpt12 | Pointer to module base address
bps2 | Select the GPT2 block Prescaler
Returns
None

Definition at line 1619 of file IfxGpt12.h.

◆ IfxGpt12_T2_setCaptureInputMode()

IFX_INLINE void IfxGpt12_T2_setCaptureInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInputMode | inputMode
 | ) |  |

Sets the input edge selection for the capture mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in capture mode
Returns
None

Definition at line 1076 of file IfxGpt12.h.

◆ IfxGpt12_T2_setCounterInputMode()

IFX_INLINE void IfxGpt12_T2_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1082 of file IfxGpt12.h.

◆ IfxGpt12_T2_setDirectionSource()

IFX_INLINE void IfxGpt12_T2_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T2 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1088 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setEudInput()

IFX_INLINE void IfxGpt12_T2_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T2 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1094 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T2_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1101 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setInput()

IFX_INLINE void IfxGpt12_T2_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T2 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1107 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T2_setInterruptEnable()

IFX_INLINE void IfxGpt12_T2_setInterruptEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the interrupt generation of the T2 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1114 of file IfxGpt12.h.

◆ IfxGpt12_T2_setMode()

IFX_INLINE void IfxGpt12_T2_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T2 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1120 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setReloadInputMode()

IFX_INLINE void IfxGpt12_T2_setReloadInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_ReloadInputMode | inputMode
 | ) |  |

Sets the input edge selection for the reload mode of the T2 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in reload mode
Returns
None

Definition at line 1126 of file IfxGpt12.h.

◆ IfxGpt12_T2_setRemoteControl()

IFX_INLINE void IfxGpt12_T2_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T2 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1132 of file IfxGpt12.h.

◆ IfxGpt12_T2_setTimerDirection()

IFX_INLINE void IfxGpt12_T2_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T2 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1138 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T2_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1144 of file IfxGpt12.h.

◆ IfxGpt12_T3_enableOutput()

IFX_INLINE void IfxGpt12_T3_enableOutput | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enable
 | ) |  |

Enable / Disable the T3 Output on pin T3OUT.

Parameters
gpt12 | Pointer to module base address
enable | enable / disable choice for T3OE
Returns
None

Definition at line 1156 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setCounterInputMode()

IFX_INLINE void IfxGpt12_T3_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T3 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1187 of file IfxGpt12.h.

◆ IfxGpt12_T3_setDirectionSource()

IFX_INLINE void IfxGpt12_T3_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T3 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1194 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setEudInput()

IFX_INLINE void IfxGpt12_T3_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T3 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1200 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T3_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T3 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1206 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setInput()

IFX_INLINE void IfxGpt12_T3_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T3 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1212 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T3_setMode()

IFX_INLINE void IfxGpt12_T3_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T3 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1218 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerDirection()

IFX_INLINE void IfxGpt12_T3_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T3 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1225 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T3_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1231 of file IfxGpt12.h.

◆ IfxGpt12_T4_enableClearTimerT2()

IFX_INLINE void IfxGpt12_T4_enableClearTimerT2 | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer T2 bit of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1243 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_enableClearTimerT3()

IFX_INLINE void IfxGpt12_T4_enableClearTimerT3 | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer T3 bit of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1249 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setCaptureInputMode()

IFX_INLINE void IfxGpt12_T4_setCaptureInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureInputMode | inputMode
 | ) |  |

Sets the input edge selection for the capture mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in capture mode
Returns
None

Definition at line 1280 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setCounterInputMode()

IFX_INLINE void IfxGpt12_T4_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1286 of file IfxGpt12.h.

◆ IfxGpt12_T4_setDirectionSource()

IFX_INLINE void IfxGpt12_T4_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T4 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1292 of file IfxGpt12.h.

◆ IfxGpt12_T4_setEudInput()

IFX_INLINE void IfxGpt12_T4_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T4 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1298 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T4_setIncrementalInterfaceInputMode()

IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_IncrementalInterfaceInputMode | inputMode
 | ) |  |

Sets the input edge selection for the incremental interface mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in IIM mode
Returns
None

Definition at line 1304 of file IfxGpt12.h.

◆ IfxGpt12_T4_setInput()

IFX_INLINE void IfxGpt12_T4_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T4 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1310 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T4_setInterruptEnable()

IFX_INLINE void IfxGpt12_T4_setInterruptEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the interrupt generation of the T4 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1316 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setMode()

IFX_INLINE void IfxGpt12_T4_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T4 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1322 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setReloadInputMode()

IFX_INLINE void IfxGpt12_T4_setReloadInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_ReloadInputMode | inputMode
 | ) |  |

Sets the input edge selection for the reload mode of the T4 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input prescaler value in reload mode
Returns
None

Definition at line 1328 of file IfxGpt12.h.

◆ IfxGpt12_T4_setRemoteControl()

IFX_INLINE void IfxGpt12_T4_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T4 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1334 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setTimerDirection()

IFX_INLINE void IfxGpt12_T4_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T4 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1340 of file IfxGpt12.h.

◆ IfxGpt12_T4_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T4_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1346 of file IfxGpt12.h.

◆ IfxGpt12_T5_enableClearTimer()

IFX_INLINE void IfxGpt12_T5_enableClearTimer | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer bit of the T5 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1358 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTrigger()

IFX_INLINE void IfxGpt12_T5_setCaptureTrigger | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureTrigger | trigger
 | ) |  |

Sets the capture trigger of teh T5 timer.

Parameters
gpt12 | Pointer to Module base address
trigger | Capture trigger
Returns
None

Definition at line 1389 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTriggerEnable()

IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the capture trigger of the T5 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1395 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCaptureTriggerMode()

IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CaptureTriggerMode | mode
 | ) |  |

Sets the capture trigger mode of the T5 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the capture trigger mode
Returns
None

Definition at line 1401 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setCounterInputMode()

IFX_INLINE void IfxGpt12_T5_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T5 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1407 of file IfxGpt12.h.

◆ IfxGpt12_T5_setDirectionSource()

IFX_INLINE void IfxGpt12_T5_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

Sets the T5 timer count direction source internal / external.

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1413 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setEudInput()

IFX_INLINE void IfxGpt12_T5_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T5 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1419 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T5_setInput()

IFX_INLINE void IfxGpt12_T5_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T5 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1426 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T5_setMode()

IFX_INLINE void IfxGpt12_T5_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T5 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1433 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setRemoteControl()

IFX_INLINE void IfxGpt12_T5_setRemoteControl | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRemoteControl | control
 | ) |  |

Sets the remote control of the T5 timer.

Parameters
gpt12 | pointer to module base address
control | enable the remote control
Returns
None

Definition at line 1440 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerDirection()

IFX_INLINE void IfxGpt12_T5_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

Sets the T5 timer count direction.

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1446 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T5_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1452 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T6_enableClearTimer()

IFX_INLINE void IfxGpt12_T6_enableClearTimer | ( | Ifx_GPT12 * | gpt12,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the clear timer bit of the T6 timer.

Parameters
gpt12 | pointer to module base address
enabled | Enable/Disable choice
Returns
None

Definition at line 1464 of file IfxGpt12.h.

◆ IfxGpt12_T6_setCounterInputMode()

IFX_INLINE void IfxGpt12_T6_setCounterInputMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_CounterInputMode | inputMode
 | ) |  |

Sets the input edge selection for the counter mode of the T6 timer.

Parameters
gpt12 | Pointer to module base address
inputMode | input edge selection in counter mode
Returns
None

Definition at line 1495 of file IfxGpt12.h.

◆ IfxGpt12_T6_setDirectionSource()

IFX_INLINE void IfxGpt12_T6_setDirectionSource | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirectionSource | source
 | ) |  |

sets the T6 timer count direction source internal / external

Parameters
gpt12 | Pointer to module base address
source | direction source
Returns
None

Definition at line 1502 of file IfxGpt12.h.

◆ IfxGpt12_T6_setEudInput()

IFX_INLINE void IfxGpt12_T6_setEudInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_EudInput | input
 | ) |  |

Sets the EUD input for the T6 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the EUD input signal
Returns
None

Definition at line 1508 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxEudInPin(), and IfxGpt12_initTxEudInPinWithPadLevel().

◆ IfxGpt12_T6_setInput()

IFX_INLINE void IfxGpt12_T6_setInput | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Input | input
 | ) |  |

Sets the input for the T6 timer.

Parameters
gpt12 | Pointer to module base address
input | Select the Input signal
Returns
None

Definition at line 1515 of file IfxGpt12.h.

Referenced by IfxGpt12_initTxInPin(), and IfxGpt12_initTxInPinWithPadLevel().

◆ IfxGpt12_T6_setMode()

IFX_INLINE void IfxGpt12_T6_setMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_Mode | mode
 | ) |  |

Sets the mode of operation od T6 timer.

Parameters
gpt12 | Pointer to module base address
mode | Select the mode of operation
Returns
None

Definition at line 1522 of file IfxGpt12.h.

◆ IfxGpt12_T6_setReloadMode()

IFX_INLINE void IfxGpt12_T6_setReloadMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerReloadMode | mode
 | ) |  |

sets the T6 timer count direction

Parameters
gpt12 | Pointer to module base address
mode | Timer Reload Mode
Returns
None

Definition at line 1529 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerDirection()

IFX_INLINE void IfxGpt12_T6_setTimerDirection | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerDirection | direction
 | ) |  |

sets the T6 timer count direction

Parameters
gpt12 | Pointer to module base address
direction | select the Timer direction
Returns
None

Definition at line 1535 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerPrescaler()

IFX_INLINE void IfxGpt12_T6_setTimerPrescaler | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerInputPrescaler | inputPrescaler
 | ) |  |

Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer.

Parameters
gpt12 | Pointer to module base address
inputPrescaler | input prescaler value in timer mode and gated timer mode
Returns
None

Definition at line 1541 of file IfxGpt12.h.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE IfxGpt12_Mode | IfxGpt12_T2_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer. More...
IFX_INLINE uint16 | IfxGpt12_T2_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T3_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer. More...
IFX_INLINE uint16 | IfxGpt12_T3_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T4_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer. More...
IFX_INLINE uint16 | IfxGpt12_T4_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T5_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer. More...
IFX_INLINE uint16 | IfxGpt12_T5_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T6_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer. More...
IFX_INLINE uint16 | IfxGpt12_T6_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer. More...
IFX_INLINE float32 | IfxGpt12_getModuleFrequency (Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency. More...
IFX_EXTERN float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
IFX_EXTERN float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
IFX_EXTERN float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
IFX_EXTERN float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
IFX_EXTERN float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...

Detailed Description

Function Documentation

◆ IfxGpt12_getModuleFrequency()

IFX_INLINE float32 IfxGpt12_getModuleFrequency ( Ifx_GPT12 * gpt12 )

Returns the gpt12 module frequency.

Parameters
gpt12 Pointer to module base address
Returns
gpt12 module frequency

Definition at line 1560 of file IfxGpt12.h.

Referenced by IfxGpt12_T2_getFrequency(), IfxGpt12_T3_getFrequency(), IfxGpt12_T4_getFrequency(), IfxGpt12_T5_getFrequency(), and IfxGpt12_T6_getFrequency().

◆ IfxGpt12_T2_getFrequency()

IFX_EXTERN float32 IfxGpt12_T2_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T2 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 35 of file IfxGpt12.c.

◆ IfxGpt12_T2_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T2 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1051 of file IfxGpt12.h.

Referenced by IfxGpt12_T2_getFrequency().

◆ IfxGpt12_T2_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T2_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T2 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1064 of file IfxGpt12.h.

◆ IfxGpt12_T3_getFrequency()

IFX_EXTERN float32 IfxGpt12_T3_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T3 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 76 of file IfxGpt12.c.

◆ IfxGpt12_T3_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T3 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1162 of file IfxGpt12.h.

◆ IfxGpt12_T3_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T3_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T3 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1175 of file IfxGpt12.h.

◆ IfxGpt12_T4_getFrequency()

IFX_EXTERN float32 IfxGpt12_T4_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T4 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 117 of file IfxGpt12.c.

◆ IfxGpt12_T4_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T4 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1255 of file IfxGpt12.h.

◆ IfxGpt12_T4_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T4_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T4 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1268 of file IfxGpt12.h.

◆ IfxGpt12_T5_getFrequency()

IFX_EXTERN float32 IfxGpt12_T5_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T5 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 158 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T5 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1364 of file IfxGpt12.h.

◆ IfxGpt12_T5_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T5_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T5 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1377 of file IfxGpt12.h.

◆ IfxGpt12_T6_getFrequency()

IFX_EXTERN float32 IfxGpt12_T6_getFrequency ( Ifx_GPT12 * gpt12 )

Returns the frequency of the T6 timer.

Parameters
gpt12 Pointer to Module base address
Returns
frequency

Definition at line 199 of file IfxGpt12.c.

◆ IfxGpt12_T6_getMode()

IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode ( Ifx_GPT12 * gpt12 )

Returns the operating mode of the T6 timer.

Parameters
gpt12 Pointer to module base address
Returns
mode of operation

Definition at line 1470 of file IfxGpt12.h.

◆ IfxGpt12_T6_getTimerValue()

IFX_INLINE uint16 IfxGpt12_T6_getTimerValue ( Ifx_GPT12 * gpt12 )

Returns the timer value of the T6 timer.

Parameters
gpt12 Pointer to module base address
Returns
timer current value

Definition at line 1483 of file IfxGpt12.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » GPT12 » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxGpt12_T2_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T4_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer. More...
IFX_INLINE void | IfxGpt12_T6_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer. More...
IFX_INLINE void | IfxGpt12_setCaptureReload (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSleepMode (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSuspendMode (Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...

Detailed Description

Function Documentation

◆ IfxGpt12_resetModule()

IFX_EXTERN void IfxGpt12_resetModule ( Ifx_GPT12 * gpt12 )

resets GPT12 kernel

Parameters
gpt12 pointer to GPT12 registers
Returns
None

Definition at line 368 of file IfxGpt12.c.

◆ IfxGpt12_setCaptureReload()

IFX_INLINE void IfxGpt12_setCaptureReload | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SleepMode | value
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
gpt12 | pointer to GPT12 registers
value | Reload value
Returns
None

Definition at line 1607 of file IfxGpt12.h.

◆ IfxGpt12_setSleepMode()

IFX_INLINE void IfxGpt12_setSleepMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
gpt12 | pointer to GPT12 registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1625 of file IfxGpt12.h.

◆ IfxGpt12_setSuspendMode()

IFX_INLINE void IfxGpt12_setSuspendMode | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
gpt12 | Pointer to GPT12 module registers
mode | Module suspend mode
Returns
None

Definition at line 1634 of file IfxGpt12.h.

◆ IfxGpt12_T2_run()

IFX_INLINE void IfxGpt12_T2_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T2 Timer.

Parameters
gpt12 | Pointer to Module base address
runTimer | Start/stop Timer 2
Returns
None

Definition at line 1070 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T2_setTimerValue()

IFX_INLINE void IfxGpt12_T2_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T2 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1150 of file IfxGpt12.h.

◆ IfxGpt12_T3_run()

IFX_INLINE void IfxGpt12_T3_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T3 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | start/stop Timer 3
Returns
None

Definition at line 1181 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T3_setTimerValue()

IFX_INLINE void IfxGpt12_T3_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T3 Timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1237 of file IfxGpt12.h.

◆ IfxGpt12_T4_run()

IFX_INLINE void IfxGpt12_T4_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T4 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 4
Returns
None

Definition at line 1274 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T4_setTimerValue()

IFX_INLINE void IfxGpt12_T4_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T4 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1352 of file IfxGpt12.h.

◆ IfxGpt12_T5_run()

IFX_INLINE void IfxGpt12_T5_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T5 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 5
Returns
None

Definition at line 1383 of file IfxGpt12.h.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_T5_setTimerValue()

IFX_INLINE void IfxGpt12_T5_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T5 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1458 of file IfxGpt12.h.

◆ IfxGpt12_T6_run()

IFX_INLINE void IfxGpt12_T6_run | ( | Ifx_GPT12 * | gpt12,
 |  | IfxGpt12_TimerRun | runTimer
 | ) |  |

Starts / stops the T6 Timer.

Parameters
gpt12 | Pointer to module base address
runTimer | Start/stop Timer 6
Returns
None

Definition at line 1489 of file IfxGpt12.h.

◆ IfxGpt12_T6_setTimerValue()

IFX_INLINE void IfxGpt12_T6_setTimerValue | ( | Ifx_GPT12 * | gpt12,
 |  | uint16 | value
 | ) |  |

Sets value for the T6 timer.

Parameters
gpt12 | pointer to module base address
value | Timer Value
Returns
None

Definition at line 1547 of file IfxGpt12.h.


iLLD_TC26B: GPT12 Pin Mapping

Data Structures | Macros | Variables
GPT12 Pin Mapping
iLLD » GPT12
Collaboration diagram for GPT12 Pin Mapping:

Data Structures

struct | IfxGpt12_Capin_In
CAPIN pin mapping structure. More...
struct | IfxGpt12_TxEud_In
TxEUD pin mapping structure. More...
struct | IfxGpt12_TxIn_In
TxIN pin mapping structure. More...
struct | IfxGpt12_TxOut_Out
TxOUT pin mapping structure. More...

Macros

#define | IFXGPT12_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXGPT12_PINMAP_NUM_TIMERS 7
#define | IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
#define | IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
GPT120_CAPINA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
GPT120_T2EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
GPT120_T2EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
GPT120_T3EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
GPT120_T3EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
GPT120_T4EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
GPT120_T4EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
GPT120_T5EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
GPT120_T5EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
GPT120_T6EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
GPT120_T6EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
GPT120_T2INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
GPT120_T2INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
GPT120_T3INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
GPT120_T3INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
GPT120_T4INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
GPT120_T4INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
GPT120_T5INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
GPT120_T5INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
GPT120_T6INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
GPT120_T6INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
GPT120_T3OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
GPT120_T3OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
GPT120_T6OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
GPT120_T6OUT: GPT120 output. More...
IFX_EXTERN const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table. More...
IFX_EXTERN const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table. More...
IFX_EXTERN const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table. More...
IFX_EXTERN const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxGpt12_Capin_In

struct IfxGpt12_Capin_In

CAPIN pin mapping structure.

Definition at line 39 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_Capin_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxGpt12_TxEud_In

struct IfxGpt12_TxEud_In

TxEUD pin mapping structure.

Definition at line 47 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxEud_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.
uint8 | timer | Timer number.

◆ IfxGpt12_TxIn_In

struct IfxGpt12_TxIn_In

TxIN pin mapping structure.

Definition at line 56 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxIn_In:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.
uint8 | timer | Timer number.

◆ IfxGpt12_TxOut_Out

struct IfxGpt12_TxOut_Out

TxOUT pin mapping structure.

Definition at line 65 of file IfxGpt12_PinMap.h.

Collaboration diagram for IfxGpt12_TxOut_Out:
[legend]
Data Fields
Ifx_GPT12 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
uint8 | timer | Timer number.

Macro Definition Documentation

◆ IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1

Definition at line 102 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_NUM_MODULES

#define IFXGPT12_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 100 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_NUM_TIMERS

#define IFXGPT12_PINMAP_NUM_TIMERS 7

Definition at line 101 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2

Definition at line 103 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS

#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2

Definition at line 104 of file IfxGpt12_PinMap.h.

◆ IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS

#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Definition at line 105 of file IfxGpt12_PinMap.h.

Variable Documentation

◆ IfxGpt120_CAPINA_P13_2_IN

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN

GPT120_CAPINA: GPT120 input.

Definition at line 73 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2EUDA_P00_8_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN

GPT120_T2EUDA: GPT120 input.

Definition at line 74 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2EUDB_P33_6_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN

GPT120_T2EUDB: GPT120 input.

Definition at line 75 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2INA_P00_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN

GPT120_T2INA: GPT120 input.

Definition at line 84 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T2INB_P33_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN

GPT120_T2INB: GPT120 input.

Definition at line 85 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3EUDA_P02_7_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN

GPT120_T3EUDA: GPT120 input.

Definition at line 76 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3EUDB_P10_7_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN

GPT120_T3EUDB: GPT120 input.

Definition at line 77 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3INA_P02_6_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN

GPT120_T3INA: GPT120 input.

Definition at line 86 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3INB_P10_4_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN

GPT120_T3INB: GPT120 input.

Definition at line 87 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3OUT_P10_6_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT

GPT120_T3OUT: GPT120 output.

Definition at line 94 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T3OUT_P21_6_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT

GPT120_T3OUT: GPT120 output.

Definition at line 95 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4EUDA_P00_9_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN

GPT120_T4EUDA: GPT120 input.

Definition at line 78 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4EUDB_P33_5_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN

GPT120_T4EUDB: GPT120 input.

Definition at line 79 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4INA_P02_8_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN

GPT120_T4INA: GPT120 input.

Definition at line 88 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T4INB_P10_8_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN

GPT120_T4INB: GPT120 input.

Definition at line 89 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5EUDA_P21_6_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN

GPT120_T5EUDA: GPT120 input.

Definition at line 80 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5EUDB_P10_1_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN

GPT120_T5EUDB: GPT120 input.

Definition at line 81 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5INA_P21_7_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN

GPT120_T5INA: GPT120 input.

Definition at line 90 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T5INB_P10_3_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN

GPT120_T5INB: GPT120 input.

Definition at line 91 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6EUDA_P20_0_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN

GPT120_T6EUDA: GPT120 input.

Definition at line 82 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6EUDB_P10_0_IN

IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN

GPT120_T6EUDB: GPT120 input.

Definition at line 83 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6INA_P20_3_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN

GPT120_T6INA: GPT120 input.

Definition at line 92 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6INB_P10_2_IN

IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN

GPT120_T6INB: GPT120 input.

Definition at line 93 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6OUT_P10_5_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT

GPT120_T6OUT: GPT120 output.

Definition at line 96 of file IfxGpt12_PinMap.h.

◆ IfxGpt120_T6OUT_P21_7_OUT

IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT

GPT120_T6OUT: GPT120 output.

Definition at line 97 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_Capin_In_pinTable

IFX_EXTERN const IfxGpt12_Capin_In* IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]

IfxGpt12_Capin_In table.

Definition at line 109 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxEud_In_pinTable

IFX_EXTERN const IfxGpt12_TxEud_In* IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]

IfxGpt12_TxEud_In table.

Definition at line 112 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxIn_In_pinTable

IFX_EXTERN const IfxGpt12_TxIn_In* IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]

IfxGpt12_TxIn_In table.

Definition at line 115 of file IfxGpt12_PinMap.h.

◆ IfxGpt12_TxOut_Out_pinTable

IFX_EXTERN const IfxGpt12_TxOut_Out* IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

IfxGpt12_TxOut_Out table.

Definition at line 118 of file IfxGpt12_PinMap.h.


iLLD_TC26B: INCRENC

Modules
INCRENC
iLLD » GPT12
Collaboration diagram for INCRENC:

Modules

How to use the GPT12 Incremental Encoder Driver
Data structures
Functions
StdIf Functions

Detailed Description


iLLD_TC26B: How to use the GPT12 Incremental Encoder Driver

How to use the GPT12 Incremental Encoder Driver
iLLD » GPT12 » INCRENC
Collaboration diagram for How to use the GPT12 Incremental Encoder Driver:

The IncrEnc interface can be used in one of the following configurations T3 as core or T2 as core

Setup with T3 as core

  • T3 as incremental mode
    • Multiplication factor:
      • twoFold: use both edges of TxIn
      • fourFold: use both edges of TxIn and TxEUD
      • Reverse of direction supported by GPT12
      • T3 value diff is used for speed calculation at high speed (speed > speedModeThreshold)
  • T4 used for zero signal detection if pinZ is not NULL
    • interrupt is generated to support turn calculation if zeroIsrPriority != 0
    • T4 clears T3 on zero signal event on TxIn input
  • T5 used for low speed calculation (speed < speedModeThreshold)
    • Rising edge of TxIn or TxEUD captures the T5 timer in CAPREL

Setup with T2 as core

  • T2 as incremental mode
    • Multiplication factor:
      • twoFold: sample on both edges of TxIn
      • fourFold: sample on both edges of TxIn and TxEUD
      • Reverse of direction supported by GPT12
      • T2 value diff is used for speed calculation at high speed
  • T4 used for zero signal detection if pinZeroTxEUD is not NULL
  • T4 clears T2 on zero signal event on TxEUD input

Preparation

Include Files

Include following header file into your C code:

#include <Gpt12/Gpt/IfxGpt12_IncrEnc.h>

Variables

// used globally
static IfxGpt12_IncrEnc gpt12;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define ISR_PRIORITY_INCRENC_ZERO 6

Add the interrupt service routines to your C code. They have to call the GPT12 interrupt handlers by passing the gpt12 handle:

IFX_INTERRUPT(ISR_IncrIncZero, 0, ISR_PRIORITY_INCRENC_ZERO)
{
IfxGpt12_IncrEnc_onZeroIrq(&gpt12);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&ISR_IncrIncZero, ISR_PRIORITY_INCRENC_ZERO);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// Initialize global clocks
IfxGpt12_enableModule(&MODULE_GPT120);
IfxGpt12_setGpt1BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt1BlockPrescaler_8);
IfxGpt12_setGpt2BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt2BlockPrescaler_4);
// create module config
IfxGpt12_IncrEnc_Config gpt12Config;
IfxGpt12_IncrEnc_initConfig(&gpt12Config , &MODULE_GPT120);
// implementation with T3 as core
gpt12Config.base.offset = 0;
gpt12Config.base.reversed = FALSE;
gpt12Config.base.resolution = 2048;
gpt12Config.base.periodPerRotation = 1;
gpt12Config.base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_fourFold;
gpt12Config.base.updatePeriod = 100e-6;
gpt12Config.base.speedModeThreshold = 200;
gpt12Config.base.minSpeed = 10;
gpt12Config.base.maxSpeed = 500;
gpt12Config.zeroIsrPriority = ISR_PRIORITY(INTERRUPT_INCRINC_ZERO);
gpt12Config.zeroIsrProvider = ISR_PROVIDER(INTERRUPT_INCRINC_ZERO);
gpt12Config.pinA = &IfxGpt120_T3INA_P02_6_IN;
gpt12Config.pinB = &IfxGpt120_T3EUDA_P02_7_IN;
gpt12Config.pinZ = &IfxGpt120_T4INA_P02_8_IN;
gpt12Config.pinMode = IfxPort_InputMode_noPullDevice;
gpt12Config.base.speedFilterEnabled = TRUE;
gpt12Config.base.speedFilerCutOffFrequency = config.base.maxSpeed / 2 * IFX_PI * 2;
// initialize module
//IfxGpt12_IncrEnc gpt12; // defined globally
IfxGpt12_IncrEnc_init(&gpt12, &gpt12Config);

Update

speed, position and direction of the incremental encoder can be collected by the following

float32 speed, rawPosition;
IfxStdIf_Pos_Dir direction;
Ifx_TickTime tickRefresh = gpt12.updatePeriod * TimeConst_1s;
Ifx_TickTime refreshDeadLine = now();
if (isDeadLine(refreshDeadLine))
{
refreshDeadLine = addTTime(refreshDeadLine, tickRefresh);
IfxGpt12_IncrEnc_update(&gpt12);
speed = IfxGpt12_IncrEnc_getSpeed(&gpt12);
rawPosition = IfxGpt12_IncrEnc_getRawPosition(&gpt12);
direction = IfxGpt12_IncrEnc_getDirection(&gpt12);
}


iLLD_TC26B: Data structures

Data Structures
Data structures
iLLD » GPT12 » INCRENC
Collaboration diagram for Data structures:

Data Structures

struct | IfxGpt12_IncrEnc
Incremental encoder object. More...
struct | IfxGpt12_IncrEnc_Config
Configuration structure for GPT12. More...

Detailed Description

Data Structure Documentation

◆ IfxGpt12_IncrEnc

struct IfxGpt12_IncrEnc

Incremental encoder object.

Definition at line 193 of file IfxGpt12_IncrEnc.h.

Collaboration diagram for IfxGpt12_IncrEnc:
[legend]
Data Fields
IfxStdIf_Pos_Dir | direction | rotation direction
float32 | maxSpeed | Absolute maximal allowed speed. Above speed is recognized as error.
float32 | minSpeed | Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Ifx_GPT12 * | module | Pointer to the GPT12 module.
sint32 | offset | raw position offset
float32 | positionConst | constant for calculating mechanical position (in rad) from raw position
sint32 rawPosition raw position in ticks.
Note
: the value already contains the offset
sint32 | resolution | resolution of this position sensor interface
float32 | speed | mechanical speed in rad/s
float32 | speedConstPulseCount | constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode
float32 | speedConstTimeDiff | constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode
boolean | speedFilterEnabled | Enable / disable the speed low pass filter.
Ifx_LowPassPt1F32 | speedLpf | Low pass filter object.
float32 | speedModeThreshold | treshold used for speed calculation using pulse count mode or time diff mode in rad/s
sint32 | speedModeThresholdTick | treshold used for speed calculation using pulse count mode or time diff mode in ticks
IfxStdIf_Pos_Status | status | error code (0 = no error)
sint32 | turn | number of mechanical turns
IfxGpt12_IncrEnc_Update | update | Update call back API.
float32 | updatePeriod | update period in seconds

◆ IfxGpt12_IncrEnc_Config

struct IfxGpt12_IncrEnc_Config

Configuration structure for GPT12.

Definition at line 218 of file IfxGpt12_IncrEnc.h.

Collaboration diagram for IfxGpt12_IncrEnc_Config:
[legend]
Data Fields
IfxStdIf_Pos_Config | base | Configuration data of Standard interface: Position interface.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins. User handles separately.
Ifx_GPT12 * | module | Pointer to module base address.
IfxGpt12_TxIn_In * | pinA | Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
IfxGpt12_TxEud_In * | pinB | Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data.
IfxPort_PadDriver | pinDriver | Pad Driver.
IfxPort_InputMode | pinMode | Pin mode for A, B and Z inputs.
IfxGpt12_TxIn_In * | pinZ | Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type conflict warning) for use with T4. See GPT12 pin map data.
Ifx_Priority | zeroIsrPriority | Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | zeroIsrProvider | Interrupt service provider for the zero interrupt.


iLLD_TC26B: Functions

Functions
Functions
iLLD » GPT12 » INCRENC
Collaboration diagram for Functions:

Functions

IFX_EXTERN boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
IFX_EXTERN void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGpt12_IncrEnc_init()

IFX_EXTERN boolean IfxGpt12_IncrEnc_init | ( | IfxGpt12_IncrEnc * | driver,
 |  | const IfxGpt12_IncrEnc_Config * | config
 | ) |  |

Initialises the Incremental interface.

Parameters
driver | incremental encoder interface Handle
config | Configuration structure for incremental encoder
Returns
TRUE on success else FALSE
// create module config
IfxGpt12_IncrEnc_Config gptConfig;
IfxGpt12_IncrEnc_initConfig(&gptConfig , &MODULE_GPT120);
// initialize module
//IfxGpt12_IncrEnc gpt12; // defined globally
IfxGpt12_IncrEnc_init(&gpt12, &gptConfig);

Definition at line 141 of file IfxGpt12_IncrEnc.c.

◆ IfxGpt12_IncrEnc_initConfig()

IFX_EXTERN void IfxGpt12_IncrEnc_initConfig | ( | IfxGpt12_IncrEnc_Config * | config,
 |  | Ifx_GPT12 * | gpt12
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for incremental encoder
gpt12 | pointer to module base address
Returns
None

see IfxGpt12_IncrEnc_init

Definition at line 287 of file IfxGpt12_IncrEnc.c.


iLLD_TC26B: StdIf Functions

Functions
StdIf Functions
iLLD » GPT12 » INCRENC
Collaboration diagram for StdIf Functions:

Functions

IFX_EXTERN float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
IFX_EXTERN void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
IFX_EXTERN void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)

Detailed Description

Function Documentation

◆ IfxGpt12_IncrEnc_getAbsolutePosition()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetAbsolutePosition
Parameters
driver driver handle
Returns
absolute position

Definition at line 67 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getDirection()

IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetDirection
Parameters
driver driver handle
Returns
direction

Definition at line 73 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getFault()

IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetFault
Parameters
driver driver handle
Returns
Fault

Definition at line 79 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getOffset()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetOffset
Parameters
driver driver handle
Returns
offset address

Definition at line 85 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getPeriodPerRotation()

IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetPeriodPerRotation
Parameters
driver driver handle
Returns
Period per rotation

Definition at line 91 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getPosition()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetPosition
Parameters
driver driver handle
Returns
position

Definition at line 98 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getRawPosition()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetRawPosition
Parameters
driver driver handle
Returns
position in ticks

Definition at line 104 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getRefreshPeriod()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetRefreshPeriod
Parameters
driver driver handle
Returns
update period

Definition at line 110 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getResolution()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetResolution
Parameters
driver driver handle
Returns
resolution

Definition at line 116 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getSensorType()

IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetSensorType
Parameters
driver driver handle
Returns
sensor type

Definition at line 122 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getSpeed()

IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetSpeed
Parameters
driver driver handle
Returns
speed

Definition at line 129 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_getTurn()

IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_GetTurn
Parameters
driver driver handle
Returns
the number of turns

Definition at line 135 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_onZeroIrq()

IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_OnZeroIrq
Parameters
driver driver handle
Returns
None

Definition at line 309 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_reset()

IFX_EXTERN void IfxGpt12_IncrEnc_reset ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_Reset
Parameters
driver driver handle
Returns
None

Definition at line 327 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_resetFaults()

IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_ResetFaults
Parameters
driver driver handle
Returns
None

Definition at line 337 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_setOffset()

IFX_EXTERN void IfxGpt12_IncrEnc_setOffset | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | offset
 | ) |  |
See also
IfxStdIf_Pos_SetOffset
Parameters
driver | driver handle
offset | offset address
Returns
None

Definition at line 346 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_setRefreshPeriod()

IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod | ( | IfxGpt12_IncrEnc * | driver,
 |  | float32 | updatePeriod
 | ) |  |
See also
IfxStdIf_Pos_SetRefreshPeriod
Parameters
driver | driver handle
updatePeriod | update period
Returns
None

Definition at line 353 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init(), and IfxGpt12_IncrEnc_stdIfPosInit().

◆ IfxGpt12_IncrEnc_update()

IFX_EXTERN void IfxGpt12_IncrEnc_update ( IfxGpt12_IncrEnc * driver )
See also
IfxStdIf_Pos_Update
Parameters
driver driver handle
Returns
None

Definition at line 395 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_stdIfPosInit().


iLLD_TC26B: IfxGpt12_cfg.h File Reference

  • _Impl
Macros
IfxGpt12_cfg.h File Reference
iLLD » GPT12

GPT12 on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXGPT12_NUM_MODULES (1)

Detailed Description

GPT12 on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGpt12_cfg.h.

Macro Definition Documentation

◆ IFXGPT12_NUM_MODULES

#define IFXGPT12_NUM_MODULES (1)

Definition at line 43 of file IfxGpt12_cfg.h.


iLLD_TC26B: IfxGpt12_PinMap.c File Reference

  • _PinMap
Variables
IfxGpt12_PinMap.c File Reference
iLLD » GPT12

GPT12 I/O map. More...

#include "IfxGpt12_PinMap.h"
Include dependency graph for IfxGpt12_PinMap.c:

Go to the source code of this file.

Variables

IfxGpt12_Capin_In | IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b}
IfxGpt12_TxEud_In | IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}
IfxGpt12_TxEud_In | IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b}
IfxGpt12_TxIn_In | IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a}
IfxGpt12_TxIn_In | IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b}
IfxGpt12_TxOut_Out | IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4}
IfxGpt12_TxOut_Out | IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7}
IfxGpt12_TxOut_Out | IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5}
IfxGpt12_TxOut_Out | IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7}
const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

Detailed Description

GPT12 I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGpt12_PinMap.c.

Variable Documentation

◆ IfxGpt120_CAPINA_P13_2_IN

IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a}

Definition at line 28 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2EUDA_P00_8_IN

IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a}

Definition at line 29 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2EUDB_P33_6_IN

IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b}

Definition at line 30 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2INA_P00_7_IN

IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a}

Definition at line 39 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T2INB_P33_7_IN

IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b}

Definition at line 40 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3EUDA_P02_7_IN

IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 31 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3EUDB_P10_7_IN

IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b}

Definition at line 32 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3INA_P02_6_IN

IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 41 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3INB_P10_4_IN

IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b}

Definition at line 42 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3OUT_P10_6_OUT

IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4}

Definition at line 49 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T3OUT_P21_6_OUT

IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7}

Definition at line 50 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4EUDA_P00_9_IN

IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a}

Definition at line 33 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4EUDB_P33_5_IN

IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b}

Definition at line 34 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4INA_P02_8_IN

IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a}

Definition at line 43 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T4INB_P10_8_IN

IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b}

Definition at line 44 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5EUDA_P21_6_IN

IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a}

Definition at line 35 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5EUDB_P10_1_IN

IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b}

Definition at line 36 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5INA_P21_7_IN

IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a}

Definition at line 45 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T5INB_P10_3_IN

IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b}

Definition at line 46 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6EUDA_P20_0_IN

IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}

Definition at line 37 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6EUDB_P10_0_IN

IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b}

Definition at line 38 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6INA_P20_3_IN

IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a}

Definition at line 47 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6INB_P10_2_IN

IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b}

Definition at line 48 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6OUT_P10_5_OUT

IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5}

Definition at line 51 of file IfxGpt12_PinMap.c.

◆ IfxGpt120_T6OUT_P21_7_OUT

IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7}

Definition at line 52 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_Capin_In_pinTable

const IfxGpt12_Capin_In* IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxGpt120_CAPINA_P13_2_IN
}
}
IfxGpt120_CAPINA_P13_2_IN
IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Definition: IfxGpt12_PinMap.c:28

Definition at line 55 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxEud_In_pinTable

const IfxGpt12_TxEud_In* IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]

Definition at line 61 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxIn_In_pinTable

const IfxGpt12_TxIn_In* IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]

Definition at line 94 of file IfxGpt12_PinMap.c.

◆ IfxGpt12_TxOut_Out_pinTable

const IfxGpt12_TxOut_Out* IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]

Definition at line 127 of file IfxGpt12_PinMap.c.


iLLD_TC26B: IfxGpt12_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxGpt12_PinMap.h File Reference
iLLD » GPT12

GPT12 I/O map. More...

#include <IfxGpt12_reg.h>
#include <_Impl/IfxGpt12_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxGpt12_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxGpt12_Capin_In
CAPIN pin mapping structure. More...
struct | IfxGpt12_TxEud_In
TxEUD pin mapping structure. More...
struct | IfxGpt12_TxIn_In
TxIN pin mapping structure. More...
struct | IfxGpt12_TxOut_Out
TxOUT pin mapping structure. More...

Macros

#define | IFXGPT12_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXGPT12_PINMAP_NUM_TIMERS 7
#define | IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
#define | IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
#define | IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
GPT120_CAPINA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
GPT120_T2EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
GPT120_T2EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
GPT120_T3EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
GPT120_T3EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
GPT120_T4EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
GPT120_T4EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
GPT120_T5EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
GPT120_T5EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
GPT120_T6EUDA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
GPT120_T6EUDB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
GPT120_T2INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
GPT120_T2INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
GPT120_T3INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
GPT120_T3INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
GPT120_T4INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
GPT120_T4INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
GPT120_T5INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
GPT120_T5INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
GPT120_T6INA: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
GPT120_T6INB: GPT120 input. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
GPT120_T3OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
GPT120_T3OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
GPT120_T6OUT: GPT120 output. More...
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
GPT120_T6OUT: GPT120 output. More...
IFX_EXTERN const IfxGpt12_Capin_In * | IfxGpt12_Capin_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table. More...
IFX_EXTERN const IfxGpt12_TxEud_In * | IfxGpt12_TxEud_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table. More...
IFX_EXTERN const IfxGpt12_TxIn_In * | IfxGpt12_TxIn_In_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table. More...
IFX_EXTERN const IfxGpt12_TxOut_Out * | IfxGpt12_TxOut_Out_pinTable [IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table. More...

Detailed Description

GPT12 I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGpt12_PinMap.h.


iLLD_TC26B: IfxGpt12_IncrEnc.h File Reference

  • Gpt12
  • IncrEnc
Data Structures | Typedefs | Functions
IfxGpt12_IncrEnc.h File Reference
iLLD » GPT12

GPT12 INCRENC details. More...

#include "StdIf/IfxStdIf_Pos.h"
#include "SysSe/Math/Ifx_LowPassPt1F32.h"
#include "Gpt12/Std/IfxGpt12.h"
#include "string.h"
Include dependency graph for IfxGpt12_IncrEnc.h:

Go to the source code of this file.

Data Structures

struct | IfxGpt12_IncrEnc
Incremental encoder object. More...
struct | IfxGpt12_IncrEnc_Config
Configuration structure for GPT12. More...

Typedefs

typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update

Functions

IFX_EXTERN boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
IFX_EXTERN void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
IFX_EXTERN float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
IFX_EXTERN sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
IFX_EXTERN void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
IFX_EXTERN void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
IFX_EXTERN void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)
IFX_EXTERN boolean | IfxGpt12_IncrEnc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos". More...

Detailed Description

GPT12 INCRENC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGpt12_IncrEnc.h.

Typedef Documentation

◆ IfxGpt12_IncrEnc_Update

typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update

Definition at line 183 of file IfxGpt12_IncrEnc.h.

Function Documentation

◆ IfxGpt12_IncrEnc_stdIfPosInit()

IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | IfxGpt12_IncrEnc * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | incremental encoder interface Handle
Returns
TRUE on success else FALSE

Definition at line 361 of file IfxGpt12_IncrEnc.c.


iLLD_TC26B: IfxGpt12.h File Reference

  • Gpt12
  • Std
Enumerations | Functions
IfxGpt12.h File Reference
iLLD » GPT12

GPT12 basic functionality. More...

#include "_Impl/IfxGpt12_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxGpt12_reg.h"
#include "_PinMap/IfxGpt12_PinMap.h"
Include dependency graph for IfxGpt12.h:

Go to the source code of this file.

Enumerations

enum IfxGpt12_CaptureInput {
IfxGpt12_CaptureInput_A = 0,
IfxGpt12_CaptureInput_B = 1,
IfxGpt12_CaptureInput_C = 2,
IfxGpt12_CaptureInput_D = 3
}
Input Select for CAPIN
Definition in IfxGPT12.PISEL.B.ISCAPIN. More...
enum IfxGpt12_CaptureInputMode {
IfxGpt12_CaptureInputMode_none = 0,
IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1,
IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3
}
Tx Input Edge Selection (Capture Mode, x=2,4) More...
enum IfxGpt12_CaptureTrigger {
IfxGpt12_CaptureTrigger_capin = 0,
IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1
}
Capture Trigger Enable
Definition in IfxGPT12.T5CON.B.CT3. More...
enum IfxGpt12_CaptureTriggerMode {
IfxGpt12_CaptureTriggerMode_disabled = 0,
IfxGpt12_CaptureTriggerMode_risingEdge = 1,
IfxGpt12_CaptureTriggerMode_fallingEdge = 2,
IfxGpt12_CaptureTriggerMode_randomEdge = 3
}
Capture Trigger Selection
Definition in IfxGPT12.T5CON.B.CI. More...
enum IfxGpt12_CounterInputMode {
IfxGpt12_CounterInputMode_counterDisabled = 0,
IfxGpt12_CounterInputMode_risingEdgeTxIN = 1,
IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2,
IfxGpt12_CounterInputMode_bothEdgesTxIN = 3,
IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5,
IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for counter mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) More...
enum IfxGpt12_EudInput {
IfxGpt12_EudInput_A = 0,
IfxGpt12_EudInput_B = 1,
IfxGpt12_EudInput_C = 2,
IfxGpt12_EudInput_D = 3
}
Input Select for TxEUD
Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4) More...
enum IfxGpt12_Gpt1BlockPrescaler {
IfxGpt12_Gpt1BlockPrescaler_8 = 0,
IfxGpt12_Gpt1BlockPrescaler_4 = 1,
IfxGpt12_Gpt1BlockPrescaler_32 = 2,
IfxGpt12_Gpt1BlockPrescaler_16 = 3
}
GPT1 block prescaler Selection
Definition in IfxGPT12.T3CON.B.BPS1. More...
enum IfxGpt12_Gpt2BlockPrescaler {
IfxGpt12_Gpt2BlockPrescaler_4 = 0,
IfxGpt12_Gpt2BlockPrescaler_2 = 1,
IfxGpt12_Gpt2BlockPrescaler_16 = 2,
IfxGpt12_Gpt2BlockPrescaler_8 = 3
}
Gpt2 block prescaler Selection
Definition in IfxGPT12.T6CON.B.BPS2. More...
enum IfxGpt12_IncrementalInterfaceInputMode {
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2,
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3
}
Input Edge Selection for Incremental Interface mode
Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4) More...
enum IfxGpt12_Input {
IfxGpt12_Input_A = 0,
IfxGpt12_Input_B = 1,
IfxGpt12_Input_C = 2,
IfxGpt12_Input_D = 3
}
Input Select for TxIN
Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4) More...
enum IfxGpt12_Mode {
IfxGpt12_Mode_timer = 0,
IfxGpt12_Mode_counter = 1,
IfxGpt12_Mode_lowGatedTimer = 2,
IfxGpt12_Mode_highGatedTimer = 3,
IfxGpt12_Mode_reload = 4,
IfxGpt12_Mode_capture = 5,
IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6,
IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7
}
Timer operating mode
Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4) More...
enum IfxGpt12_ReloadInputMode {
IfxGpt12_ReloadInputMode_counterDisabled = 0,
IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1,
IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2,
IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3,
IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5,
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6,
IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7
}
Input Edge Selection for reload mode
Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) More...
enum IfxGpt12_SleepMode {
IfxGpt12_SleepMode_enable = 0,
IfxGpt12_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_GPT12.CLC.B.EDIS. More...
enum IfxGpt12_SuspendMode {
IfxGpt12_SuspendMode_none = 0,
IfxGpt12_SuspendMode_hard = 1,
IfxGpt12_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxGpt12_TimerDirection {
IfxGpt12_TimerDirection_up = 0,
IfxGpt12_TimerDirection_down = 1
}
Timer Count Direction
Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6) More...
enum IfxGpt12_TimerDirectionSource {
IfxGpt12_TimerDirectionSource_internal = 0,
IfxGpt12_TimerDirectionSource_external = 1
}
Timer count direction control source
Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) More...
enum IfxGpt12_TimerInputPrescaler {
IfxGpt12_TimerInputPrescaler_1 = 0,
IfxGpt12_TimerInputPrescaler_2 = 1,
IfxGpt12_TimerInputPrescaler_4 = 2,
IfxGpt12_TimerInputPrescaler_8 = 3,
IfxGpt12_TimerInputPrescaler_16 = 4,
IfxGpt12_TimerInputPrescaler_32 = 5,
IfxGpt12_TimerInputPrescaler_64 = 6,
IfxGpt12_TimerInputPrescaler_128 = 7
}
Input prescaler Selection for the timer
Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) More...
enum IfxGpt12_TimerReloadMode {
IfxGpt12_TimerReloadMode_disable,
IfxGpt12_TimerReloadMode_enable
}
Timer Reload Mode
Definition in IfxGPT12.T6CON.B.T6SR. More...
enum IfxGpt12_TimerRemoteControl {
IfxGpt12_TimerRemoteControl_off = 0,
IfxGpt12_TimerRemoteControl_on = 1
}
Timer Remote Control enable choice
Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) More...
enum IfxGpt12_TimerRun {
IfxGpt12_TimerRun_stop = 0,
IfxGpt12_TimerRun_start = 1
}
Timer Run / stop control choice (only if TxCON.B.TxRC = 0)
Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6) More...

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T2_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T3_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T4_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T5_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_T6_getSrc (Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGpt12_getCaptureSrc (Ifx_GPT12 *gpt12)
Returns the address of capture service request. More...
IFX_INLINE void | IfxGpt12_T2_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T2_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction. More...
IFX_INLINE void | IfxGpt12_T2_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_enableOutput (Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT. More...
IFX_INLINE void | IfxGpt12_T3_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T3_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction. More...
IFX_INLINE void | IfxGpt12_T3_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT2 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_enableClearTimerT3 (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCaptureInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T4_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setIncrementalInterfaceInputMode (Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setInterruptEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setReloadInputMode (Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction. More...
IFX_INLINE void | IfxGpt12_T4_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTrigger (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerEnable (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCaptureTriggerMode (Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external. More...
IFX_INLINE void | IfxGpt12_T5_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setRemoteControl (Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction. More...
IFX_INLINE void | IfxGpt12_T5_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_enableClearTimer (Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setCounterInputMode (Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setDirectionSource (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external More...
IFX_INLINE void | IfxGpt12_T6_setEudInput (Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setInput (Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setMode (Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer. More...
IFX_INLINE void | IfxGpt12_T6_setReloadMode (Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerDirection (Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction More...
IFX_INLINE void | IfxGpt12_T6_setTimerPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer. More...
IFX_INLINE void | IfxGpt12_initCapInPin (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input. More...
IFX_INLINE void | IfxGpt12_initTxOutPin (const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output. More...
IFX_INLINE void | IfxGpt12_setCaptureInput (Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input. More...
IFX_INLINE void | IfxGpt12_setGpt1BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler. More...
IFX_INLINE void | IfxGpt12_setGpt2BlockPrescaler (Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler. More...
IFX_EXTERN void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
IFX_EXTERN void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
IFX_EXTERN void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T2_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer. More...
IFX_INLINE uint16 | IfxGpt12_T2_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T3_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer. More...
IFX_INLINE uint16 | IfxGpt12_T3_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T4_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer. More...
IFX_INLINE uint16 | IfxGpt12_T4_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T5_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer. More...
IFX_INLINE uint16 | IfxGpt12_T5_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer. More...
IFX_INLINE IfxGpt12_Mode | IfxGpt12_T6_getMode (Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer. More...
IFX_INLINE uint16 | IfxGpt12_T6_getTimerValue (Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer. More...
IFX_INLINE float32 | IfxGpt12_getModuleFrequency (Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency. More...
IFX_EXTERN float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
IFX_EXTERN float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
IFX_EXTERN float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
IFX_EXTERN float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
IFX_EXTERN float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...
IFX_INLINE void | IfxGpt12_T2_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer. More...
IFX_INLINE void | IfxGpt12_T2_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer. More...
IFX_INLINE void | IfxGpt12_T3_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T3_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer. More...
IFX_INLINE void | IfxGpt12_T4_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer. More...
IFX_INLINE void | IfxGpt12_T4_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer. More...
IFX_INLINE void | IfxGpt12_T5_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer. More...
IFX_INLINE void | IfxGpt12_T5_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer. More...
IFX_INLINE void | IfxGpt12_T6_run (Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer. More...
IFX_INLINE void | IfxGpt12_T6_setTimerValue (Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer. More...
IFX_INLINE void | IfxGpt12_setCaptureReload (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSleepMode (Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxGpt12_setSuspendMode (Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...
IFX_INLINE void | IfxGpt12_initCapInPinWithPadLevel (const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver. More...
IFX_INLINE boolean | IfxGpt12_isModuleSuspended (Ifx_GPT12 *gpt12)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_EXTERN void | IfxGpt12_initTxEudInPinWithPadLevel (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver. More...
IFX_EXTERN void | IfxGpt12_initTxInPinWithPadLevel (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver. More...

Detailed Description

GPT12 basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGpt12.h.

Function Documentation

◆ IfxGpt12_initCapInPinWithPadLevel()

IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | capIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver.

Parameters
capIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1574 of file IfxGpt12.h.

◆ IfxGpt12_initTxEudInPinWithPadLevel()

IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 285 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_initTxInPinWithPadLevel()

IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXIN pin direction as input and configuring pad driver.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 340 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_isModuleSuspended()

IFX_INLINE boolean IfxGpt12_isModuleSuspended ( Ifx_GPT12 * gpt12 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
gpt12 Pointer to GPT12 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1589 of file IfxGpt12.h.


iLLD_TC26B: GTM

Modules | Files
GTM
iLLD
Collaboration diagram for GTM:

Modules

Implementation
Standard Driver
Atom Interface Drivers
TOM Interface Drivers
Tim Interface Drivers
GTM Pin Mapping
GTM Trigger Configuration

Files

file | IfxGtm_cfg.h
GTM on-chip implementation data.
file | IfxGtm_PinMap.c
GTM I/O map.
file | IfxGtm_PinMap.h
GTM I/O map.
file | IfxGtm_Atom_Pwm.h
GTM PWM details.
file | IfxGtm_Atom_PwmHl.h
GTM PWMHL details.
file | IfxGtm_Atom_Timer.h
GTM TIMER details.
file | IfxGtm.h
GTM basic functionality.
file | IfxGtm_Atom.h
GTM basic functionality.
file | IfxGtm_Cmu.h
GTM basic functionality.
file | IfxGtm_Dpll.h
GTM basic functionality.
file | IfxGtm_Tbu.h
GTM basic functionality.
file | IfxGtm_Tim.h
GTM basic functionality.
file | IfxGtm_Tom.h
GTM basic functionality.
file | IfxGtm_Tim_In.h
GTM IN details.
file | IfxGtm_Tom_Pwm.h
GTM PWM details.
file | IfxGtm_Tom_PwmHl.h
GTM PWMHL details.
file | IfxGtm_Tom_Timer.h
GTM TIMER details.
file | IfxGtm_Trig.h
GTM TRIG details.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » GTM
Collaboration diagram for Implementation:

Modules

Enumerations
Data Structures

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GTM » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Atom {
IfxGtm_Atom_0,
IfxGtm_Atom_1,
IfxGtm_Atom_2,
IfxGtm_Atom_3
}
Enum for ATOM objects. More...
enum IfxGtm_Atom_Ch {
IfxGtm_Atom_Ch_none = -1,
IfxGtm_Atom_Ch_0,
IfxGtm_Atom_Ch_1,
IfxGtm_Atom_Ch_2,
IfxGtm_Atom_Ch_3,
IfxGtm_Atom_Ch_4,
IfxGtm_Atom_Ch_5,
IfxGtm_Atom_Ch_6,
IfxGtm_Atom_Ch_7
}
Enum for ATOM channels. More...
enum IfxGtm_Dpll_SubInc {
IfxGtm_Dpll_SubInc_1 = 0,
IfxGtm_Dpll_SubInc_2
}
Enum for Dpll subincrements. More...
enum IfxGtm_FeatureControl {
IfxGtm_FeatureControl_disabled = 0,
IfxGtm_FeatureControl_disable = 1,
IfxGtm_FeatureControl_enable = 2,
IfxGtm_FeatureControl_enabled = 3
}
Enum Enable disable feature control. More...
enum IfxGtm_Tim {
IfxGtm_Tim_0,
IfxGtm_Tim_1,
IfxGtm_Tim_2
}
Enum for TIM objects. More...
enum IfxGtm_Tim_Ch {
IfxGtm_Tim_Ch_0,
IfxGtm_Tim_Ch_1,
IfxGtm_Tim_Ch_2,
IfxGtm_Tim_Ch_3,
IfxGtm_Tim_Ch_4,
IfxGtm_Tim_Ch_5,
IfxGtm_Tim_Ch_6,
IfxGtm_Tim_Ch_7
}
Enum for TIM channels. More...
enum IfxGtm_Tom {
IfxGtm_Tom_0,
IfxGtm_Tom_1
}
Enum for TOM objects. More...
enum IfxGtm_Tom_Ch {
IfxGtm_Tom_Ch_none = -1,
IfxGtm_Tom_Ch_0,
IfxGtm_Tom_Ch_1,
IfxGtm_Tom_Ch_2,
IfxGtm_Tom_Ch_3,
IfxGtm_Tom_Ch_4,
IfxGtm_Tom_Ch_5,
IfxGtm_Tom_Ch_6,
IfxGtm_Tom_Ch_7,
IfxGtm_Tom_Ch_8,
IfxGtm_Tom_Ch_9,
IfxGtm_Tom_Ch_10,
IfxGtm_Tom_Ch_11,
IfxGtm_Tom_Ch_12,
IfxGtm_Tom_Ch_13,
IfxGtm_Tom_Ch_14,
IfxGtm_Tom_Ch_15
}
Enum for TOM channels. More...
enum IfxGtm_Tom_Tgc {
IfxGtm_Tom_Tgc_0,
IfxGtm_Tom_Tgc_1
}
Enum for TOM global channel control units. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Atom

enum IfxGtm_Atom

Enum for ATOM objects.

Enumerator
IfxGtm_Atom_0 | ATOM object 0.
IfxGtm_Atom_1 | ATOM object 1.
IfxGtm_Atom_2 | ATOM object 2.
IfxGtm_Atom_3 | ATOM object 3.

Definition at line 192 of file IfxGtm_cfg.h.

◆ IfxGtm_Atom_Ch

enum IfxGtm_Atom_Ch

Enum for ATOM channels.

Enumerator
IfxGtm_Atom_Ch_none | Not Selected.
IfxGtm_Atom_Ch_0 | ATOM channel 0.
IfxGtm_Atom_Ch_1 | ATOM channel 1.
IfxGtm_Atom_Ch_2 | ATOM channel 2.
IfxGtm_Atom_Ch_3 | ATOM channel 3.
IfxGtm_Atom_Ch_4 | ATOM channel 4.
IfxGtm_Atom_Ch_5 | ATOM channel 5.
IfxGtm_Atom_Ch_6 | ATOM channel 6.
IfxGtm_Atom_Ch_7 | ATOM channel 7.

Definition at line 202 of file IfxGtm_cfg.h.

◆ IfxGtm_Dpll_SubInc

enum IfxGtm_Dpll_SubInc

Enum for Dpll subincrements.

Enumerator
IfxGtm_Dpll_SubInc_1 | subincrement1
IfxGtm_Dpll_SubInc_2 | subincrement2

Definition at line 217 of file IfxGtm_cfg.h.

◆ IfxGtm_FeatureControl

enum IfxGtm_FeatureControl

Enum Enable disable feature control.

Enumerator
IfxGtm_FeatureControl_disabled | disabled
IfxGtm_FeatureControl_disable | disable
IfxGtm_FeatureControl_enable | enable
IfxGtm_FeatureControl_enabled | enabled

Definition at line 225 of file IfxGtm_cfg.h.

◆ IfxGtm_Tim

enum IfxGtm_Tim

Enum for TIM objects.

Enumerator
IfxGtm_Tim_0 | TIM object 0.
IfxGtm_Tim_1 | TIM object 1.
IfxGtm_Tim_2 | TIM object 2.

Definition at line 235 of file IfxGtm_cfg.h.

◆ IfxGtm_Tim_Ch

enum IfxGtm_Tim_Ch

Enum for TIM channels.

Enumerator
IfxGtm_Tim_Ch_0 | TIM channel 0.
IfxGtm_Tim_Ch_1 | TIM channel 1.
IfxGtm_Tim_Ch_2 | TIM channel 2.
IfxGtm_Tim_Ch_3 | TIM channel 3.
IfxGtm_Tim_Ch_4 | TIM channel 4.
IfxGtm_Tim_Ch_5 | TIM channel 5.
IfxGtm_Tim_Ch_6 | TIM channel 6.
IfxGtm_Tim_Ch_7 | TIM channel 7.

Definition at line 244 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom

enum IfxGtm_Tom

Enum for TOM objects.

Enumerator
IfxGtm_Tom_0 | TOM object 0.
IfxGtm_Tom_1 | TOM object 1.

Definition at line 258 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom_Ch

enum IfxGtm_Tom_Ch

Enum for TOM channels.

Enumerator
IfxGtm_Tom_Ch_none | Not Selected.
IfxGtm_Tom_Ch_0 | TOM channel 0.
IfxGtm_Tom_Ch_1 | TOM channel 1.
IfxGtm_Tom_Ch_2 | TOM channel 2.
IfxGtm_Tom_Ch_3 | TOM channel 3.
IfxGtm_Tom_Ch_4 | TOM channel 4.
IfxGtm_Tom_Ch_5 | TOM channel 5.
IfxGtm_Tom_Ch_6 | TOM channel 6.
IfxGtm_Tom_Ch_7 | TOM channel 7.
IfxGtm_Tom_Ch_8 | TOM channel 8.
IfxGtm_Tom_Ch_9 | TOM channel 9.
IfxGtm_Tom_Ch_10 | TOM channel 10.
IfxGtm_Tom_Ch_11 | TOM channel 11.
IfxGtm_Tom_Ch_12 | TOM channel 12.
IfxGtm_Tom_Ch_13 | TOM channel 13.
IfxGtm_Tom_Ch_14 | TOM channel 14.
IfxGtm_Tom_Ch_15 | TOM channel 15.

Definition at line 266 of file IfxGtm_cfg.h.

◆ IfxGtm_Tom_Tgc

enum IfxGtm_Tom_Tgc

Enum for TOM global channel control units.

Enumerator
IfxGtm_Tom_Tgc_0 | TOM global channel control unit0.
IfxGtm_Tom_Tgc_1 | TOM global channel control unit1.

Definition at line 289 of file IfxGtm_cfg.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » Implementation
Collaboration diagram for Data Structures:

Data Structures

struct IfxGtm_Tom_TGC
TOM TGC objects. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_TGC

struct IfxGtm_Tom_TGC

TOM TGC objects.

Definition at line 305 of file IfxGtm_cfg.h.

Data Fields
Ifx_GTM_TOM_TGC0_ACT_TB | ACT_TB | 34, TOM TGC0 Action Time Base Register
Ifx_GTM_TOM_TGC0_ENDIS_CTRL | ENDIS_CTRL | 70, TOM TGC0 Enable/Disable Control Register
Ifx_GTM_TOM_TGC0_ENDIS_STAT | ENDIS_STAT | 74, TOM TGC0 Enable/Disable Status Register
Ifx_GTM_TOM_TGC0_FUPD_CTRL | FUPD_CTRL | 38, TOM TGC0 Force Update Control Register
Ifx_GTM_TOM_TGC0_GLB_CTRL | GLB_CTRL | 30, TOM TGC0 Global Control Register
Ifx_GTM_TOM_TGC0_INT_TRIG | INT_TRIG | 3C, TOM TGC0 Internal Trigger Control Register
Ifx_GTM_TOM_TGC0_OUTEN_CTRL | OUTEN_CTRL | 78, TOM TGC0 Output Enable Control Register
Ifx_GTM_TOM_TGC0_OUTEN_STAT | OUTEN_STAT | 7C, TOM TGC0 Output Enable Status Register
Ifx_GTM_TOM_CH | xxxCH1 | 40, TOM channel objects


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » GTM
Collaboration diagram for Standard Driver:

Modules

Basic Functions
Enumerations
Atom Basic Functionality
Cmu Basic Functionality
Dpll Basic Functionality
Tbu Basic Functionality
Tim Basic Functionality
Tom Basic Functionality

Detailed Description


iLLD_TC26B: Basic Functions

Functions
Basic Functions
iLLD » GTM » Standard Driver
Collaboration diagram for Basic Functions:

Functions

IFX_INLINE boolean | IfxGtm_isEnabled (Ifx_GTM *gtm)
Returs the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxGtm_isModuleSuspended (Ifx_GTM *gtm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxGtm_setSuspendMode (Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
IFX_EXTERN void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...

Detailed Description

Function Documentation

◆ IfxGtm_disable()

IFX_EXTERN void IfxGtm_disable ( Ifx_GTM * gtm )

Disables the module.

Parameters
gtm Pointer to GTM module
Returns
None

Definition at line 37 of file IfxGtm.c.

◆ IfxGtm_enable()

IFX_EXTERN void IfxGtm_enable ( Ifx_GTM * gtm )

Enables the module.

Parameters
gtm Pointer to GTM module
Returns
None

Definition at line 47 of file IfxGtm.c.

◆ IfxGtm_isEnabled()

IFX_INLINE boolean IfxGtm_isEnabled ( Ifx_GTM * gtm )

Returs the status of module enabled or disabled.

Parameters
gtm Pointer to GTM module
Returns
status: TRUE/FALSE

Definition at line 127 of file IfxGtm.h.

◆ IfxGtm_isModuleSuspended()

IFX_INLINE boolean IfxGtm_isModuleSuspended ( Ifx_GTM * gtm )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
gtm Pointer to GTM module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 133 of file IfxGtm.h.

◆ IfxGtm_setSuspendMode()

IFX_INLINE void IfxGtm_setSuspendMode | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
gtm | Pointer to GTM module registers
mode | Module suspend mode
Returns
None

Definition at line 145 of file IfxGtm.h.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GTM » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_IrqMode {
IfxGtm_IrqMode_level = 0,
IfxGtm_IrqMode_pulse = 1,
IfxGtm_IrqMode_pulseNotify = 2,
IfxGtm_IrqMode_singlePulse = 3
}
Enum for GTM interrupt modes. More...
enum IfxGtm_SuspendMode {
IfxGtm_SuspendMode_none = 0,
IfxGtm_SuspendMode_hard = 1,
IfxGtm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_IrqMode

enum IfxGtm_IrqMode

Enum for GTM interrupt modes.

Enumerator
IfxGtm_IrqMode_level
IfxGtm_IrqMode_pulse
IfxGtm_IrqMode_pulseNotify
IfxGtm_IrqMode_singlePulse

Definition at line 47 of file IfxGtm.h.

◆ IfxGtm_SuspendMode

enum IfxGtm_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxGtm_SuspendMode_none | No suspend.
IfxGtm_SuspendMode_hard | Hard Suspend.
IfxGtm_SuspendMode_soft | Soft Suspend.

Definition at line 57 of file IfxGtm.h.


iLLD_TC26B: Atom Basic Functionality

Modules
Atom Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Atom Basic Functionality:

Modules

ATOM Enumerations
ATOM Channel Functions
ATOM AGC Functions

Detailed Description


iLLD_TC26B: ATOM Enumerations

Enumerations
ATOM Enumerations
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM Enumerations:

Enumerations

enum IfxGtm_Atom_Ch_OutputTrigger {
IfxGtm_Atom_Ch_OutputTrigger_forward = 0,
IfxGtm_Atom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Atom_Ch_ResetEvent {
IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...
enum IfxGtm_Atom_Mode {
IfxGtm_Atom_Mode_outputImmediate,
IfxGtm_Atom_Mode_outputCompare,
IfxGtm_Atom_Mode_outputPwm,
IfxGtm_Atom_Mode_outputSerial
}
Enum for ATOM mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Atom_Ch_OutputTrigger

enum IfxGtm_Atom_Ch_OutputTrigger

Reset source for channel counter CN0.

Enumerator
IfxGtm_Atom_Ch_OutputTrigger_forward | Forward the trigger from the previous channel.
IfxGtm_Atom_Ch_OutputTrigger_generate | Generate the trigger from the current channel.

Definition at line 58 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_Ch_ResetEvent

enum IfxGtm_Atom_Ch_ResetEvent

Reset event for channel counter CN0.

Enumerator
IfxGtm_Atom_Ch_ResetEvent_onCm0
IfxGtm_Atom_Ch_ResetEvent_onTrigger

Definition at line 66 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_Mode

enum IfxGtm_Atom_Mode

Enum for ATOM mode.

Enumerator
IfxGtm_Atom_Mode_outputImmediate
IfxGtm_Atom_Mode_outputCompare
IfxGtm_Atom_Mode_outputPwm
IfxGtm_Atom_Mode_outputSerial

Definition at line 74 of file IfxGtm_Atom.h.


iLLD_TC26B: ATOM Channel Functions

Functions
ATOM Channel Functions
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM Channel Functions:

Functions

IFX_INLINE Ifx_GTM_ATOM_CH * | IfxGtm_Atom_Ch_getChannelPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel. More...
IFX_INLINE void | IfxGtm_Atom_Ch_setCompareShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
IFX_EXTERN float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Ch_clearOneNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Clears the channel One notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 245 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Atom_Ch_clearZeroNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Clears the channel Zero notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 253 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Atom_Ch_configurePwmMode()

IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Cmu_Clk | clock,
 |  | Ifx_ActiveState | activeState,
 |  | IfxGtm_Atom_Ch_ResetEvent | resetEvent,
 |  | IfxGtm_Atom_Ch_OutputTrigger | trigger
 | ) |  |
Parameters
atom | Pointer to the ATOM object
channel | Channel index
clock | Clock source
activeState | Active State
resetEvent | Channel reset event
trigger | Channel trigger output mode
Returns
None

Definition at line 261 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_getChannelPointer()

IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the base addredd of selected Atom channel.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Pointer to channel base address

Definition at line 568 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_Ch_clearOneNotification(), IfxGtm_Atom_Ch_clearZeroNotification(), IfxGtm_Atom_Ch_configurePwmMode(), IfxGtm_Atom_Ch_getClockSource(), IfxGtm_Atom_Ch_getCompareOne(), IfxGtm_Atom_Ch_getCompareOnePointer(), IfxGtm_Atom_Ch_getCompareZero(), IfxGtm_Atom_Ch_getCompareZeroPointer(), IfxGtm_Atom_Ch_getCounterValue(), IfxGtm_Atom_Ch_getOutputLevel(), IfxGtm_Atom_Ch_isOneNotification(), IfxGtm_Atom_Ch_isZeroNotification(), IfxGtm_Atom_Ch_raiseInterruptOne(), IfxGtm_Atom_Ch_raiseInterruptZero(), IfxGtm_Atom_Ch_setAruInput(), IfxGtm_Atom_Ch_setAruReadAddress0(), IfxGtm_Atom_Ch_setAruReadAddress1(), IfxGtm_Atom_Ch_setClockSource(), IfxGtm_Atom_Ch_setCompare(), IfxGtm_Atom_Ch_setCompareOne(), IfxGtm_Atom_Ch_setCompareOneShadow(), IfxGtm_Atom_Ch_setCompareShadow(), IfxGtm_Atom_Ch_setCompareZero(), IfxGtm_Atom_Ch_setCompareZeroShadow(), IfxGtm_Atom_Ch_setCounterValue(), IfxGtm_Atom_Ch_setMode(), IfxGtm_Atom_Ch_setNotification(), IfxGtm_Atom_Ch_setOneShotMode(), IfxGtm_Atom_Ch_setResetSource(), IfxGtm_Atom_Ch_setSignalLevel(), IfxGtm_Atom_Ch_setSomcControl(), IfxGtm_Atom_Ch_setSomcSignalLevelControl(), and IfxGtm_Atom_Ch_setTriggerOutput().

◆ IfxGtm_Atom_Ch_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the ATOM channel input clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
atom | Pointer to the ATOM object
channel | Channel index
Returns
ATOM channel input clock frequency in Hz

Definition at line 279 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_updateInputFrequency().

◆ IfxGtm_Atom_Ch_getClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the channel clock source.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
The clock source

Definition at line 289 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Ch_getClockFrequency(), and IfxGtm_Atom_PwmHl_init().

◆ IfxGtm_Atom_Ch_getCompareOne()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare one value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare one value

Definition at line 299 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getTrigger().

◆ IfxGtm_Atom_Ch_getCompareOnePointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getCompareOnePointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare one pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare one pointer

Definition at line 307 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getTriggerPointer().

◆ IfxGtm_Atom_Ch_getCompareZero()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare zero value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare zero value

Definition at line 315 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getCompareZeroPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getCompareZeroPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the compare zero pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
compare zero pointer

Definition at line 323 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getCounterValue()

IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Get the counter value.

Parameters
atom | pointer to the ATOM instance
channel | channel index of the ATOM
Returns
counter value

Definition at line 512 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getOutputLevel()

IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Gets the ATOM output level.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
TRUE the output is high, FALSE the output is low

Definition at line 331 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxGtm_Atom_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Atom | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns a pointer to the ATOM channel SRC.

Parameters
gtm | Pointer to GTM module
atom | Specifies the atom object
channel | Channel index
Returns
Pointer to the TOM channel SRC

Definition at line 342 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_getTimerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Ch_getTimerPointer | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the Timer pointer.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Timer pointer

Definition at line 349 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_getPointer().

◆ IfxGtm_Atom_Ch_isOneNotification()

IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the status of channel One notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Status of channel One notification

Definition at line 355 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Atom_Ch_isZeroNotification()

IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Returns the status of channel Zero notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
Status of channel Zero notification

Definition at line 364 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Atom_Ch_raiseInterruptOne()

IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 1.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 373 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_raiseInterruptZero()

IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 0.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
Returns
None

Definition at line 381 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Cmu_Clk | clock
 | ) |  |

Sets the channel clock source.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
clock | Channel clock source
Returns
None

Definition at line 389 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setCompare()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompare | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareZero,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 0 and 1 values.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareZero | Compare zero value
compareOne | Compare one value
Returns
None

Definition at line 397 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setCompareOne()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 1 value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareOne | Compare one value
Returns
None

Definition at line 406 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setCompareOneShadow()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 1 shadow value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowOne | Compare one shadow value
Returns
None

Definition at line 414 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_setTrigger().

◆ IfxGtm_Atom_Ch_setCompareShadow()

IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowZero,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 0 and 1 shadow values.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowZero | Compare zero shadow value
shadowOne | Compare one shadow value
Returns
None

Definition at line 574 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_PwmHl_updateCenterAligned(), IfxGtm_Atom_PwmHl_updateEdgeAligned(), IfxGtm_Atom_PwmHl_updateOff(), IfxGtm_Atom_PwmHl_updatePulse(), and IfxGtm_Atom_PwmHl_updateShiftCenterAligned().

◆ IfxGtm_Atom_Ch_setCompareZero()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | compareZero
 | ) |  |

Sets the compare 0 value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
compareZero | Compare zero value
Returns
None

Definition at line 422 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setCompareZeroShadow()

IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | shadowZero
 | ) |  |

Sets the compare 0 shadow value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
shadowZero | Compare zero shadow value
Returns
None

Definition at line 430 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_setPeriod().

◆ IfxGtm_Atom_Ch_setCounterValue()

IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | value
 | ) |  |

Sets the counter value.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
value | Counter value
Returns
None

Definition at line 438 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setMode()

IFX_EXTERN void IfxGtm_Atom_Ch_setMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Mode | mode
 | ) |  |

set the Atom operating mode

Parameters
atom | Pointer to the ATOM object
channel | Channel index
mode | Atom operating mode
Returns
None

Definition at line 446 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Ch_setNotification()

IFX_EXTERN void IfxGtm_Atom_Ch_setNotification | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_IrqMode | mode,
 |  | boolean | interruptOnCompareZero,
 |  | boolean | interruptOnCompareOne
 | ) |  |

Sets the channel notification.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
mode | Interrupt mode
interruptOnCompareZero | If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
interruptOnCompareOne | If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
Returns
None

Definition at line 454 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setOneShotMode()

IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the one shot mode.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 472 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Timer_setSingleMode().

◆ IfxGtm_Atom_Ch_setResetSource()

IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Ch_ResetEvent | event
 | ) |  |

Sets the channel clock source either from local or from previous channel.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
event | Channel reset event
Returns
None

Definition at line 480 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSignalLevel()

IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | Ifx_ActiveState | activeState
 | ) |  |

Sets the signal level.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
activeState | Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
Returns
None

Definition at line 488 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_PwmHl_setMode(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Ch_setTriggerOutput()

IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_Ch_OutputTrigger | trigger
 | ) |  |

Sets the channel trigger output.

Parameters
atom | Pointer to the ATOM object
channel | Channel index
trigger | Channel trigger output mode
Returns
None

Definition at line 496 of file IfxGtm_Atom.c.


iLLD_TC26B: ATOM AGC Functions

Functions
ATOM AGC Functions
iLLD » GTM » Standard Driver » Atom Basic Functionality
Collaboration diagram for ATOM AGC Functions:

Functions

IFX_INLINE void | IfxGtm_Atom_Agc_setChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN) More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Agc_buildFeature()

IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature | ( | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable.

Parameters
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 44 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_enableChannels(), IfxGtm_Atom_Agc_enableChannelsOutput(), IfxGtm_Atom_Agc_enableChannelsTrigger(), IfxGtm_Atom_Agc_enableChannelsUpdate(), IfxGtm_Atom_Agc_setChannelsForceUpdate(), and IfxGtm_Atom_Timer_addToChannelMask().

◆ IfxGtm_Atom_Agc_buildFeatureForChannel()

IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel | ( | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable for a single channel.

Parameters
channel | Channel index
enabled | Enable/ Disable choise of the feature
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 72 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_enableChannel(), IfxGtm_Atom_Agc_enableChannelOutput(), IfxGtm_Atom_Agc_enableChannelUpdate(), and IfxGtm_Atom_Agc_setChannelForceUpdate().

◆ IfxGtm_Atom_Agc_enableChannel()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel (ENDIS)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on AGC trigger (CTRL_TRIG)
Returns
None

Definition at line 92 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), and IfxGtm_Atom_Pwm_stop().

◆ IfxGtm_Atom_Agc_enableChannelOutput()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel output (OUTEN)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 110 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), and IfxGtm_Atom_Pwm_stop().

◆ IfxGtm_Atom_Agc_enableChannels()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels (ENDIS)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 134 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_run(), and IfxGtm_Atom_Timer_stop().

◆ IfxGtm_Atom_Agc_enableChannelsOutput()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels output (OUTEN)

Parameters
agc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 152 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Agc_enableChannelsTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable the TGC channels trigger.

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 170 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_enableChannelsUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable one or more channels for update (UPEN)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 176 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_enableChannelUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable one channel for update (UPEN)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
Returns
None

Definition at line 128 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Agc_enableTimeTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | boolean | enabled
 | ) |  |

Enable/disable the time base trigger.

Parameters
agc | Pointer to the AGC object
enabled | If TRUE, the trigger is enabled else disabled
Returns
None

Definition at line 182 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_resetChannels()

IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint32 | resetMask
 | ) |  |

Reset one or more channels.

Parameters
agc | Pointer to the AGC object
resetMask | Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 188 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_setChannelForceUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | resetEnabled
 | ) |  |

Enable/disable one channel for update (FUPD)

Parameters
agc | Pointer to the AGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
resetEnabled | Enable/ Disable reset choise of the feature
Returns
None

Definition at line 207 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init().

◆ IfxGtm_Atom_Agc_setChannelsForceUpdate()

IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint16 | resetEnableMask,
 |  | uint16 | resetDisableMask
 | ) |  |

Enable/disable one or more channels for the force update feature (FUPD)

Parameters
agc | Pointer to the AGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
resetEnableMask | Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
resetDisableMask | Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 218 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Agc_setChannelsUpdate()

IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | uint32 | value
 | ) |  |

Sets the channels for update (UPEN)

Parameters
agc | Pointer to the AGC object
value | value for the channel enable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 583 of file IfxGtm_Atom.h.

Referenced by IfxGtm_Atom_Timer_applyUpdate(), and IfxGtm_Atom_Timer_disableUpdate().

◆ IfxGtm_Atom_Agc_setTimeTrigger()

IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger | ( | Ifx_GTM_ATOM_AGC * | agc,
 |  | IfxGtm_Tbu_Ts | base,
 |  | uint32 | value
 | ) |  |

Sets the trigger time base and time base value.

Parameters
agc | Pointer to the AGC object
base | Time base used for comparison
value | Compare value that raise the trigger
Returns
None

Definition at line 228 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Agc_trigger()

IFX_EXTERN void IfxGtm_Atom_Agc_trigger ( Ifx_GTM_ATOM_AGC * agc )

Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)

Parameters
agc Pointer to the AGC object
Returns
None

Definition at line 239 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_start(), IfxGtm_Atom_Pwm_stop(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().


iLLD_TC26B: Cmu Basic Functionality

Modules
Cmu Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Cmu Basic Functionality:

Modules

CMU Enumerations
CMU Basic Functions

Detailed Description


iLLD_TC26B: CMU Enumerations

Enumerations
CMU Enumerations
iLLD » GTM » Standard Driver » Cmu Basic Functionality
Collaboration diagram for CMU Enumerations:

Enumerations

enum IfxGtm_Cmu_Clk {
IfxGtm_Cmu_Clk_0 = 0,
IfxGtm_Cmu_Clk_1,
IfxGtm_Cmu_Clk_2,
IfxGtm_Cmu_Clk_3,
IfxGtm_Cmu_Clk_4,
IfxGtm_Cmu_Clk_5,
IfxGtm_Cmu_Clk_6,
IfxGtm_Cmu_Clk_7
}
enum IfxGtm_Cmu_Eclk {
IfxGtm_Cmu_Eclk_0 = 0,
IfxGtm_Cmu_Eclk_1,
IfxGtm_Cmu_Eclk_2
}
enum IfxGtm_Cmu_Fxclk {
IfxGtm_Cmu_Fxclk_0 = 0,
IfxGtm_Cmu_Fxclk_1,
IfxGtm_Cmu_Fxclk_2,
IfxGtm_Cmu_Fxclk_3,
IfxGtm_Cmu_Fxclk_4
}
enum IfxGtm_Cmu_Tim_Filter_Clk {
IfxGtm_Cmu_Tim_Filter_Clk_0,
IfxGtm_Cmu_Tim_Filter_Clk_1,
IfxGtm_Cmu_Tim_Filter_Clk_6,
IfxGtm_Cmu_Tim_Filter_Clk_7
}
Tim Filter counter frequency select. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Cmu_Clk

enum IfxGtm_Cmu_Clk
Enumerator
IfxGtm_Cmu_Clk_0
IfxGtm_Cmu_Clk_1
IfxGtm_Cmu_Clk_2
IfxGtm_Cmu_Clk_3
IfxGtm_Cmu_Clk_4
IfxGtm_Cmu_Clk_5
IfxGtm_Cmu_Clk_6
IfxGtm_Cmu_Clk_7

Definition at line 47 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Eclk

enum IfxGtm_Cmu_Eclk
Enumerator
IfxGtm_Cmu_Eclk_0
IfxGtm_Cmu_Eclk_1
IfxGtm_Cmu_Eclk_2

Definition at line 59 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Fxclk

enum IfxGtm_Cmu_Fxclk
Enumerator
IfxGtm_Cmu_Fxclk_0
IfxGtm_Cmu_Fxclk_1
IfxGtm_Cmu_Fxclk_2
IfxGtm_Cmu_Fxclk_3
IfxGtm_Cmu_Fxclk_4

Definition at line 66 of file IfxGtm_Cmu.h.

◆ IfxGtm_Cmu_Tim_Filter_Clk

enum IfxGtm_Cmu_Tim_Filter_Clk

Tim Filter counter frequency select.

Enumerator
IfxGtm_Cmu_Tim_Filter_Clk_0 | FLT_CNT counts with CMU_CLK0.
IfxGtm_Cmu_Tim_Filter_Clk_1 | FLT_CNT counts with CMU_CLK1.
IfxGtm_Cmu_Tim_Filter_Clk_6 | FLT_CNT counts with CMU_CLK6.
IfxGtm_Cmu_Tim_Filter_Clk_7 | FLT_CNT counts with CMU_CLK7.

Definition at line 77 of file IfxGtm_Cmu.h.


iLLD_TC26B: CMU Basic Functions

Functions
CMU Basic Functions
iLLD » GTM » Standard Driver » Cmu Basic Functionality
Collaboration diagram for CMU Basic Functions:

Functions

IFX_EXTERN void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
IFX_EXTERN void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
IFX_EXTERN void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

Function Documentation

◆ IfxGtm_Cmu_enableClocks()

IFX_EXTERN void IfxGtm_Cmu_enableClocks | ( | Ifx_GTM * | gtm,
 |  | uint32 | clkMask
 | ) |  |

Enable / Disable the configurable, fixed, and external clocks.

Parameters
gtm | Pointer to GTM module
clkMask | Enable / Disable mask.
Returns
None

Definition at line 41 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_getClkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM configurable clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM configurable clock frequency in Hz

Definition at line 47 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Atom_Ch_getClockFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Tbu_getClockFrequency(), IfxGtm_Tim_Ch_getCaptureClockFrequency(), IfxGtm_Tim_Ch_getFilterClockFrequency(), and IfxGtm_Tim_Ch_getTimeoutClockFrequency().

◆ IfxGtm_Cmu_getEclkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM external clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM external clock frequency in Hz

Definition at line 101 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_getFxClkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Fxclk | clkIndex,
 |  | boolean | assumeEnabled
 | ) |  |

Returns the GTM fixed clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the fixed clock 0=CMU_FXCLK0, 1=CMU_FXCLK1, ...
assumeEnabled | When TRUE, attempt to calculate the frequency as if the clock is enabled.
Returns
GTM fixed clock frequency in Hz

Definition at line 121 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Tom_Ch_getClockFrequency().

◆ IfxGtm_Cmu_getGclkFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency ( Ifx_GTM * gtm )

Returns the GTM global clock frequency in Hz.

Parameters
gtm Pointer to GTM module
Returns
GTM global clock frequency in Hz

Definition at line 182 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getClkFrequency(), IfxGtm_Cmu_getEclkFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Cmu_setClkFrequency(), and IfxGtm_Cmu_setEclkFrequency().

◆ IfxGtm_Cmu_getModuleFrequency()

IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency ( Ifx_GTM * gtm )

returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used.

Parameters
gtm Pointer to GTM module
Returns
GTM module frequency in Hz

Definition at line 192 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getGclkFrequency(), and IfxGtm_Cmu_setGclkFrequency().

◆ IfxGtm_Cmu_isClkClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex
 | ) |  |

Returns the configurable clock enable status.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 198 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getClkFrequency().

◆ IfxGtm_Cmu_isEclkClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex
 | ) |  |

Returns the external clock enable status.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 204 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getEclkFrequency().

◆ IfxGtm_Cmu_isFxClockEnabled()

IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled ( Ifx_GTM * gtm )

Returns the fixed clock enable status.

Parameters
gtm Pointer to GTM module
Returns
TRUE The clock is enabled, FALSE The clock is disabled

Definition at line 210 of file IfxGtm_Cmu.c.

Referenced by IfxGtm_Cmu_getFxClkFrequency().

◆ IfxGtm_Cmu_selectClkInput()

IFX_EXTERN void IfxGtm_Cmu_selectClkInput | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | boolean | useGlobal
 | ) |  |

Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks()

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
useGlobal | if TRUE, uses the global clock as an input, else use the SUB_INC input
Returns
None

Definition at line 216 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setClkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setClkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Clk | clkIndex,
 |  | float32 | frequency
 | ) |  |

Set the GTM configurable clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
frequency | Frequency in Hz
Returns
None

Definition at line 232 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setEclkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Cmu_Eclk | clkIndex,
 |  | float32 | frequency
 | ) |  |

Set the GTM external clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
clkIndex | Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
frequency | Frequency in Hz
Returns
None

Definition at line 269 of file IfxGtm_Cmu.c.

◆ IfxGtm_Cmu_setGclkFrequency()

IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency | ( | Ifx_GTM * | gtm,
 |  | float32 | frequency
 | ) |  |

Set the GTM global clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
frequency | Frequency in Hz
Returns
None

Definition at line 317 of file IfxGtm_Cmu.c.


iLLD_TC26B: Dpll Basic Functionality

Modules
Dpll Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Dpll Basic Functionality:

Modules

DPLL Basic Functions

Detailed Description


iLLD_TC26B: DPLL Basic Functions

Functions
DPLL Basic Functions
iLLD » GTM » Standard Driver » Dpll Basic Functionality
Collaboration diagram for DPLL Basic Functions:

Functions

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

Function Documentation

◆ IfxGtm_Dpll_getSubIncFrequency()

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Dpll_SubInc | index
 | ) |  |

Dummy Function, returns 0.0F.

Parameters
gtm | Pointer to GTM module
index | Dpll subincrement index
Returns
frequency

Definition at line 35 of file IfxGtm_Dpll.c.

Referenced by IfxGtm_Cmu_getClkFrequency().


iLLD_TC26B: Tbu Basic Functionality

Modules
Tbu Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tbu Basic Functionality:

Modules

TBU Enumerations
TBU Basic Functions

Detailed Description


iLLD_TC26B: TBU Enumerations

Enumerations
TBU Enumerations
iLLD » GTM » Standard Driver » Tbu Basic Functionality
Collaboration diagram for TBU Enumerations:

Enumerations

enum IfxGtm_Tbu_Ts {
IfxGtm_Tbu_Ts_0,
IfxGtm_Tbu_Ts_1,
IfxGtm_Tbu_Ts_2
}
GTM TOM TBU Time stamps. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tbu_Ts

enum IfxGtm_Tbu_Ts

GTM TOM TBU Time stamps.

Enumerator
IfxGtm_Tbu_Ts_0
IfxGtm_Tbu_Ts_1
IfxGtm_Tbu_Ts_2

Definition at line 49 of file IfxGtm_Tbu.h.


iLLD_TC26B: TBU Basic Functions

Functions
TBU Basic Functions
iLLD » GTM » Standard Driver » Tbu Basic Functionality
Collaboration diagram for TBU Basic Functions:

Functions

IFX_INLINE void | IfxGtm_Tbu_enableChannel (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel. More...
IFX_INLINE boolean | IfxGtm_Tbu_isChannelEnabled (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled. More...
IFX_EXTERN float32 | IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tbu_enableChannel()

IFX_INLINE void IfxGtm_Tbu_enableChannel | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Enables the channel.

Parameters
gtm | Pointer to GTM module
channel | TBU Time stamps
Returns
None

Definition at line 98 of file IfxGtm_Tbu.h.

Referenced by IfxDsadc_Rdc_initHwTimestamp().

◆ IfxGtm_Tbu_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Returns the clock frequency.

Parameters
gtm | Pointer to GTM module
channel | TBU Time stamps
Returns
frequency

Definition at line 36 of file IfxGtm_Tbu.c.

Referenced by IfxDsadc_Rdc_calculateTimestampPeriod().

◆ IfxGtm_Tbu_isChannelEnabled()

IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tbu_Ts | channel
 | ) |  |

Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled.

Parameters
gtm | Pointer to GTM SFR
channel | Channel of TBU
Returns
TRUE: channel is enabled

Definition at line 106 of file IfxGtm_Tbu.h.


iLLD_TC26B: Tim Basic Functionality

Modules
Tim Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tim Basic Functionality:

Modules

TIM Enumerations
TIM Channel Functions

Detailed Description


iLLD_TC26B: TIM Enumerations

Enumerations
TIM Enumerations
iLLD » GTM » Standard Driver » Tim Basic Functionality
Collaboration diagram for TIM Enumerations:

Enumerations

enum IfxGtm_Tim_CntsSel {
IfxGtm_Tim_CntsSel_cntReg = 0,
IfxGtm_Tim_CntsSel_tbuTs0
}
enum IfxGtm_Tim_FilterCounter {
IfxGtm_Tim_FilterCounter_upDown = 0,
IfxGtm_Tim_FilterCounter_hold
}
Enum for Filter counter. More...
enum IfxGtm_Tim_FilterMode {
IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0,
IfxGtm_Tim_FilterMode_individualDeglitchTime
}
Enum for Filter mode. More...
enum IfxGtm_Tim_GprSel {
IfxGtm_Tim_GprSel_tbuTs0 = 0,
IfxGtm_Tim_GprSel_tbuTs1,
IfxGtm_Tim_GprSel_tbuTs2,
IfxGtm_Tim_GprSel_cnts
}
enum IfxGtm_Tim_Input {
IfxGtm_Tim_Input_currentChannel = 0,
IfxGtm_Tim_Input_adjacentChannel
}
enum IfxGtm_Tim_Mode {
IfxGtm_Tim_Mode_pwmMeasurement = 0,
IfxGtm_Tim_Mode_pulseIntegration,
IfxGtm_Tim_Mode_inputEvent,
IfxGtm_Tim_Mode_inputPrescaler,
IfxGtm_Tim_Mode_bitCompression
}
enum IfxGtm_Tim_Timeout {
IfxGtm_Tim_Timeout_disabled,
IfxGtm_Tim_Timeout_risingEdge,
IfxGtm_Tim_Timeout_fallingEdge,
IfxGtm_Tim_Timeout_bothEdge
}
Enum for Timeout control. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tim_CntsSel

enum IfxGtm_Tim_CntsSel
Enumerator
IfxGtm_Tim_CntsSel_cntReg
IfxGtm_Tim_CntsSel_tbuTs0

Definition at line 53 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_FilterCounter

enum IfxGtm_Tim_FilterCounter

Enum for Filter counter.

Enumerator
IfxGtm_Tim_FilterCounter_upDown
IfxGtm_Tim_FilterCounter_hold

Definition at line 61 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_FilterMode

enum IfxGtm_Tim_FilterMode

Enum for Filter mode.

Enumerator
IfxGtm_Tim_FilterMode_immediateEdgePropagation | Immediate edge Propagation mode.
IfxGtm_Tim_FilterMode_individualDeglitchTime | Individual deglitch mode.

Definition at line 69 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_GprSel

enum IfxGtm_Tim_GprSel
Enumerator
IfxGtm_Tim_GprSel_tbuTs0
IfxGtm_Tim_GprSel_tbuTs1
IfxGtm_Tim_GprSel_tbuTs2
IfxGtm_Tim_GprSel_cnts

Definition at line 75 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Input

enum IfxGtm_Tim_Input
Enumerator
IfxGtm_Tim_Input_currentChannel
IfxGtm_Tim_Input_adjacentChannel

Definition at line 83 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Mode

enum IfxGtm_Tim_Mode
Enumerator
IfxGtm_Tim_Mode_pwmMeasurement | TPWM.
IfxGtm_Tim_Mode_pulseIntegration | TPIM.
IfxGtm_Tim_Mode_inputEvent | TIEM.
IfxGtm_Tim_Mode_inputPrescaler | TIPM.
IfxGtm_Tim_Mode_bitCompression | TBCM.

Definition at line 89 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Timeout

enum IfxGtm_Tim_Timeout

Enum for Timeout control.

Enumerator
IfxGtm_Tim_Timeout_disabled | Timeout feature disabled.
IfxGtm_Tim_Timeout_risingEdge | Timeout feature enabled for rising edge only.
IfxGtm_Tim_Timeout_fallingEdge | Timeout feature enabled for falling edge only.
IfxGtm_Tim_Timeout_bothEdge | Timeout feature enabled for both edges.

Definition at line 100 of file IfxGtm_Tim.h.


iLLD_TC26B: TIM Channel Functions

Functions
TIM Channel Functions
iLLD » GTM » Standard Driver » Tim Basic Functionality
Collaboration diagram for TIM Channel Functions:

Functions

IFX_INLINE void | IfxGtm_Tim_Ch_clearCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearDataLostEvent (Ifx_GTM_TIM_CH *channel)
Clears the data lost flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearGlitchEvent (Ifx_GTM_TIM_CH *channel)
Clears the glitch flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearNewValueEvent (Ifx_GTM_TIM_CH *channel)
Clears the new value flag. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGtm_Tim_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isDataLostEvent (Ifx_GTM_TIM_CH *channel)
Test the data lost flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isGlitchEvent (Ifx_GTM_TIM_CH *channel)
Test the glitch flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isNewValueEvent (Ifx_GTM_TIM_CH *channel)
Test the new value flag. More...
IFX_INLINE Ifx_GTM_TIM_CH * | IfxGtm_Tim_getChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_resetChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tim_Ch_clearCntOverflowEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Clears the counter overflow flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 286 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearDataLostEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent ( Ifx_GTM_TIM_CH * channel )

Clears the data lost flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 292 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearEcntOverflowEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Clears the event counter overflow flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 298 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearGlitchEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent ( Ifx_GTM_TIM_CH * channel )

Clears the glitch flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 304 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_clearNewValueEvent()

IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent ( Ifx_GTM_TIM_CH * channel )

Clears the new value flag.

Parameters
channel TIM channel pointer
Returns
None

Definition at line 310 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_getCaptureClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Capture Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Capture clock frequency

Definition at line 35 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getCaptureClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the capture clock source selected.

Parameters
channel TIM channel pointer
Returns
capture clock source

Definition at line 45 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getCaptureClockFrequency().

◆ IfxGtm_Tim_Ch_getFilterClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Filter Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Filter clock frequency

Definition at line 51 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getFilterClockSource()

IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the Filter clock source selected.

Parameters
channel TIM channel pointer
Returns
Filter clock source

Definition at line 81 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getFilterClockFrequency().

◆ IfxGtm_Tim_Ch_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tim | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Returns a pointer to the TIM channel SRC.

Parameters
gtm | Pointer to GTM module
tim | Specifies the tim module no
channel | Channel index
Returns
Pointer to the TIM channel SRC

Definition at line 316 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getTimeoutClockFrequency()

IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TIM_CH * | channel
 | ) |  |

Returns the Timeout Clock Frequency.

Parameters
gtm | Pointer to GTM module
channel | Pointer to TIM channel base
Returns
Timeout clock frequency

Definition at line 87 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_getTimeoutClockSource()

IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource ( Ifx_GTM_TIM_CH * channel )

Returns the Timeout clock source selected.

Parameters
channel TIM channel pointer
Returns
Timeout clock source

Definition at line 97 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_Ch_getTimeoutClockFrequency().

◆ IfxGtm_Tim_Ch_isCntOverflowEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Test the counter overflow flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 323 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isDataLostEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent ( Ifx_GTM_TIM_CH * channel )

Test the data lost flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 329 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isEcntOverflowEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent ( Ifx_GTM_TIM_CH * channel )

Test the event counter overflow flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 335 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isGlitchEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent ( Ifx_GTM_TIM_CH * channel )

Test the glitch flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 341 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_isNewValueEvent()

IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent ( Ifx_GTM_TIM_CH * channel )

Test the new value flag.

Parameters
channel TIM channel pointer
Returns
TRUE if the flag is set, else FALSE

Definition at line 347 of file IfxGtm_Tim.h.

Referenced by IfxGtm_Tim_In_update().

◆ IfxGtm_Tim_Ch_resetChannel()

IFX_INLINE void IfxGtm_Tim_Ch_resetChannel | ( | Ifx_GTM_TIM * | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Reset the specified TIM channel.

Parameters
tim | Pointer to GTM TIM instance
channel | Channel index
Returns
None

Definition at line 359 of file IfxGtm_Tim.h.

◆ IfxGtm_Tim_Ch_setChannelNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnNewVal,
 |  | boolean | irqOnCntOverflow,
 |  | boolean | irqOnEcntOverflow,
 |  | boolean | irqOnDatalost
 | ) |  |

Set the channel notification.

Parameters
channel | TIM channel pointer
irqOnNewVal | If TRUE, the interrupt on new value is enabled
irqOnCntOverflow | If TRUE, the interrupt on CNT overflow is enabled
irqOnEcntOverflow | If TRUE, the interrupt on ECNT overflow is enabled
irqOnDatalost | If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled
Returns
None

Definition at line 103 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_Cmu_Clk | clock
 | ) |  |

Set the channel clock source.

Parameters
channel | TIM channel pointer
clock | Selected clock
Returns
None

Definition at line 116 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setFilterNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnGlitch
 | ) |  |

Set the filter notification.

Parameters
channel | TIM channel pointer
irqOnGlitch | If TRUE, the interrupt on glitch is enabled
Returns
None

Definition at line 122 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setNotificationMode()

IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode | ( | Ifx_GTM_TIM_CH * | channel,
 |  | IfxGtm_IrqMode | mode
 | ) |  |

This function configures the TIM channel IRQ mode.

Parameters
channel | TIM channel pointer
mode | Notification Mode
Returns
None

Definition at line 133 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_Ch_setTimeoutNotification()

IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification | ( | Ifx_GTM_TIM_CH * | channel,
 |  | boolean | irqOnTimeout
 | ) |  |

Set the timeout notification.

Parameters
channel | TIM channel pointer
irqOnTimeout | If TRUE, the interrupt on timeout is enabled
Returns
None

Definition at line 145 of file IfxGtm_Tim.c.

Referenced by IfxGtm_Tim_In_init().

◆ IfxGtm_Tim_getChannel()

IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel | ( | Ifx_GTM_TIM * | tim,
 |  | IfxGtm_Tim_Ch | channel
 | ) |  |

Returns the pointer to the TIM channel.

Parameters
tim | Pointer to Tim base
channel | TIM channel
Returns
Pointer to TIM channel base

Definition at line 353 of file IfxGtm_Tim.h.

Referenced by IfxDsadc_Rdc_initGtmTim(), and IfxGtm_Tim_In_init().


iLLD_TC26B: Tom Basic Functionality

Modules
Tom Basic Functionality
iLLD » GTM » Standard Driver
Collaboration diagram for Tom Basic Functionality:

Modules

TOM Enumerations
TOM Channel Functions
TOM TGC Functions

Detailed Description


iLLD_TC26B: TOM Enumerations

Enumerations
TOM Enumerations
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM Enumerations:

Enumerations

enum IfxGtm_Tom_Ch_ClkSrc {
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4,
IfxGtm_Tom_Ch_ClkSrc_noClock = 5
}
Clock source for the TOM channels. More...
enum IfxGtm_Tom_Ch_OutputTrigger {
IfxGtm_Tom_Ch_OutputTrigger_forward = 0,
IfxGtm_Tom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Tom_Ch_ResetEvent {
IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tom_Ch_ClkSrc

enum IfxGtm_Tom_Ch_ClkSrc

Clock source for the TOM channels.

Enumerator
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 | div 1
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 | div 16
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 | div 256
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 | div 4096
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 | div 32768
IfxGtm_Tom_Ch_ClkSrc_noClock | no clock

Definition at line 64 of file IfxGtm_Tom.h.

◆ IfxGtm_Tom_Ch_OutputTrigger

enum IfxGtm_Tom_Ch_OutputTrigger

Reset source for channel counter CN0.

Enumerator
IfxGtm_Tom_Ch_OutputTrigger_forward | Forward the trigger from the previous channel.
IfxGtm_Tom_Ch_OutputTrigger_generate | Generate the trigger from the current channel.

Definition at line 76 of file IfxGtm_Tom.h.

◆ IfxGtm_Tom_Ch_ResetEvent

enum IfxGtm_Tom_Ch_ResetEvent

Reset event for channel counter CN0.

Enumerator
IfxGtm_Tom_Ch_ResetEvent_onCm0
IfxGtm_Tom_Ch_ResetEvent_onTrigger

Definition at line 84 of file IfxGtm_Tom.h.


iLLD_TC26B: TOM Channel Functions

Functions
TOM Channel Functions
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM Channel Functions:

Functions

IFX_INLINE Ifx_GTM_TOM_CH * | IfxGtm_Tom_Ch_getChannelPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
IFX_EXTERN Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Ch_clearOneNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Clears the channel One notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 37 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Tom_Ch_clearZeroNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Clears the channel Zero notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 44 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Tom_Ch_getChannelPointer()

IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the base addredd of selected Tom channel.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Pointer to channel base address

Definition at line 505 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Ch_clearOneNotification(), IfxGtm_Tom_Ch_clearZeroNotification(), IfxGtm_Tom_Ch_getClockSource(), IfxGtm_Tom_Ch_getCompareOne(), IfxGtm_Tom_Ch_getCompareOnePointer(), IfxGtm_Tom_Ch_getCompareZero(), IfxGtm_Tom_Ch_getCompareZeroPointer(), IfxGtm_Tom_Ch_getOutputLevel(), IfxGtm_Tom_Ch_getTimerPointer(), IfxGtm_Tom_Ch_isOneNotification(), IfxGtm_Tom_Ch_isZeroNotification(), IfxGtm_Tom_Ch_raiseInterruptOne(), IfxGtm_Tom_Ch_raiseInterruptZero(), IfxGtm_Tom_Ch_setClockSource(), IfxGtm_Tom_Ch_setCompare(), IfxGtm_Tom_Ch_setCompareOne(), IfxGtm_Tom_Ch_setCompareOneShadow(), IfxGtm_Tom_Ch_setCompareShadow(), IfxGtm_Tom_Ch_setCompareZero(), IfxGtm_Tom_Ch_setCompareZeroShadow(), IfxGtm_Tom_Ch_setCounterValue(), IfxGtm_Tom_Ch_setGatedCounter(), IfxGtm_Tom_Ch_setNotification(), IfxGtm_Tom_Ch_setOneShotMode(), IfxGtm_Tom_Ch_setResetSource(), IfxGtm_Tom_Ch_setSignalLevel(), IfxGtm_Tom_Ch_setSpe(), and IfxGtm_Tom_Ch_setTriggerOutput().

◆ IfxGtm_Tom_Ch_getClockFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency | ( | Ifx_GTM * | gtm,
 |  | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the TOM channel input clock frequency in Hz.

Parameters
gtm | Pointer to GTM module
tom | Pointer to the TOM object
channel | Channel index
Returns
TOM channel input clock frequency in Hz

Definition at line 51 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_updateInputFrequency().

◆ IfxGtm_Tom_Ch_getClockSource()

IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the channel clock source.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
The clock source

Definition at line 75 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Ch_getClockFrequency(), and IfxGtm_Tom_PwmHl_init().

◆ IfxGtm_Tom_Ch_getCompareOne()

IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare one value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare one value

Definition at line 87 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getTrigger().

◆ IfxGtm_Tom_Ch_getCompareOnePointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getCompareOnePointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare one pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare one pointer

Definition at line 95 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getTriggerPointer().

◆ IfxGtm_Tom_Ch_getCompareZero()

IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare zero value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare zero value

Definition at line 103 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getCompareZeroPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getCompareZeroPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the compare zero pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
compare zero pointer

Definition at line 111 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getOutputLevel()

IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Gets the TOM output level.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
TRUE the output is high, FALSE the output is low

Definition at line 118 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxGtm_Tom_Ch_getSrcPointer | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Tom | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns a pointer to the TOM channel SRC.

Parameters
gtm | Pointer to GTM module
tom | Specifies the tom object
channel | Channel index
Returns
Pointer to the TOM channel SRC

Definition at line 129 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_getTgcPointer()

IFX_EXTERN Ifx_GTM_TOM_TGC* IfxGtm_Tom_Ch_getTgcPointer | ( | Ifx_GTM_TOM * | tom,
 |  | uint32 | tgcIndex
 | ) |  |

Returns the TGC pointer.

Parameters
tom | Pointer to the TOM object
tgcIndex | TGC index
Returns
TOM TGC object pointer

Definition at line 136 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_getTimerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Ch_getTimerPointer | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the Timer pointer.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Timer pointer

Definition at line 153 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_getPointer().

◆ IfxGtm_Tom_Ch_isOneNotification()

IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the status of channel One notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Status of channel One notification

Definition at line 160 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTriggerIrq().

◆ IfxGtm_Tom_Ch_isZeroNotification()

IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Returns the status of channel Zero notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
Status of channel Zero notification

Definition at line 169 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_acknowledgeTimerIrq().

◆ IfxGtm_Tom_Ch_raiseInterruptOne()

IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 1.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 178 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_raiseInterruptZero()

IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Raises the interrupt for Compare 0.

Parameters
tom | Pointer to the TOM object
channel | Channel index
Returns
None

Definition at line 185 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setClockSource()

IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_ClkSrc | clock
 | ) |  |

Sets the channel clock source.

Parameters
tom | Pointer to the TOM object
channel | Channel index
clock | Channel clock source
Returns
None

Definition at line 192 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setCompare()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompare | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareZero,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 0 and 1 values.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareZero | Compare zero value
compareOne | Compare one value
Returns
None

Definition at line 200 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setCompareOne()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareOne
 | ) |  |

Sets the compare 1 value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareOne | Compare one value
Returns
None

Definition at line 209 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Ch_setCompareOneShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 1 shadow value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowOne | Compare one shadow value
Returns
None

Definition at line 217 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_setTrigger().

◆ IfxGtm_Tom_Ch_setCompareShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowZero,
 |  | uint32 | shadowOne
 | ) |  |

Sets the compare 0 and 1 shadow values.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowZero | Compare zero shadow value
shadowOne | Compare one shadow value
Returns
None

Definition at line 225 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_updateCenterAligned(), IfxGtm_Tom_PwmHl_updateEdgeAligned(), IfxGtm_Tom_PwmHl_updateOff(), IfxGtm_Tom_PwmHl_updatePulse(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ IfxGtm_Tom_Ch_setCompareZero()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | compareZero
 | ) |  |

Sets the compare 0 value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
compareZero | Compare zero value
Returns
None

Definition at line 234 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Ch_setCompareZeroShadow()

IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | shadowZero
 | ) |  |

Sets the compare 0 shadow value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
shadowZero | Compare zero shadow value
Returns
None

Definition at line 242 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_setPeriod().

◆ IfxGtm_Tom_Ch_setCounterValue()

IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | uint32 | value
 | ) |  |

Sets the counter value.

Parameters
tom | Pointer to the TOM object
channel | Channel index
value | Counter value
Returns
None

Definition at line 250 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setGatedCounter()

IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the gated counter mode (channel 0 to 7 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 258 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setNotification()

IFX_EXTERN void IfxGtm_Tom_Ch_setNotification | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_IrqMode | mode,
 |  | boolean | interruptOnCompareZero,
 |  | boolean | interruptOnCompareOne
 | ) |  |

Sets the channel notification.

Parameters
tom | Pointer to the TOM object
channel | Channel index
mode | Interrupt mode
interruptOnCompareZero | If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
interruptOnCompareOne | If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
Returns
None

Definition at line 269 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setOneShotMode()

IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the one shot mode.

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 287 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Timer_setSingleMode().

◆ IfxGtm_Tom_Ch_setPcm()

IFX_EXTERN void IfxGtm_Tom_Ch_setPcm | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the PCM mode (channel 15 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 295 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setResetSource()

IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_ResetEvent | event
 | ) |  |

Sets the channel clock source either from local or from previous channel.

Parameters
tom | Pointer to the TOM object
channel | Channel index
event | Channel reset event
Returns
None

Definition at line 304 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setSignalLevel()

IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | Ifx_ActiveState | activeState
 | ) |  |

Sets the signal level.

Parameters
tom | Pointer to the TOM object
channel | Channel index
activeState | Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
Returns
None

Definition at line 312 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Ch_setSpe()

IFX_EXTERN void IfxGtm_Tom_Ch_setSpe | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable the SPE mode (channel 0 to 7 only)

Parameters
tom | Pointer to the TOM object
channel | Channel index
enabled | If TRUE, the feature is enabled, else disabled
Returns
None

Definition at line 320 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Ch_setTriggerOutput()

IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput | ( | Ifx_GTM_TOM * | tom,
 |  | IfxGtm_Tom_Ch | channel,
 |  | IfxGtm_Tom_Ch_OutputTrigger | trigger
 | ) |  |

Sets the channel trigger output.

Parameters
tom | Pointer to the TOM object
channel | Channel index
trigger | Channel trigger output mode
Returns
None

Definition at line 331 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().


iLLD_TC26B: TOM TGC Functions

Functions
TOM TGC Functions
iLLD » GTM » Standard Driver » Tom Basic Functionality
Collaboration diagram for TOM TGC Functions:

Functions

IFX_INLINE void | IfxGtm_Tom_Tgc_writeGlobalControl (Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Tgc_buildFeature()

IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature | ( | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable.

Parameters
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 339 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Tgc_enableChannels(), IfxGtm_Tom_Tgc_enableChannelsOutput(), IfxGtm_Tom_Tgc_enableChannelsTrigger(), IfxGtm_Tom_Tgc_enableChannelsUpdate(), IfxGtm_Tom_Tgc_setChannelsForceUpdate(), and IfxGtm_Tom_Timer_addToChannelMask().

◆ IfxGtm_Tom_Tgc_buildFeatureForChannel()

IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel | ( | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | uint8 | bitfieldOffset
 | ) |  |

Builds the register value for the feature enable/disable for a single channel.

Parameters
channel | Channel index
enabled | Enable/ Disable choise of the feature
bitfieldOffset | Offset of the channel 0 bitfield in the register
Returns
The register value

Definition at line 367 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Tgc_enableChannel(), IfxGtm_Tom_Tgc_enableChannelOutput(), IfxGtm_Tom_Tgc_enableChannelUpdate(), and IfxGtm_Tom_Tgc_setChannelForceUpdate().

◆ IfxGtm_Tom_Tgc_enableChannel()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel (ENDIS)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 387 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), and IfxGtm_Tom_Pwm_stop().

◆ IfxGtm_Tom_Tgc_enableChannelOutput()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | immediate
 | ) |  |

Enable/disable one channel output (OUTEN)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 405 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), and IfxGtm_Tom_Pwm_stop().

◆ IfxGtm_Tom_Tgc_enableChannels()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels (ENDIS)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 429 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_run(), and IfxGtm_Tom_Timer_stop().

◆ IfxGtm_Tom_Tgc_enableChannelsOutput()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | boolean | immediate
 | ) |  |

Enable/disable one or more channels output (OUTEN)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
immediate | If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
Returns
None

Definition at line 447 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_enableChannelsTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable the TGC channels trigger.

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 465 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_enableChannelsUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask
 | ) |  |

Enable/disable one or more channels for update (UPEN)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 471 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_enableChannelUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

Enable/disable one channel for update (UPEN)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
Returns
None

Definition at line 423 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Tgc_enableTimeTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | boolean | enabled
 | ) |  |

Enable/disable the time base trigger.

Parameters
tgc | Pointer to the TGC object
enabled | If TRUE, the trigger is enabled else disabled
Returns
None

Definition at line 477 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_resetChannels()

IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint32 | resetMask
 | ) |  |

Reset one or more channels.

Parameters
tgc | Pointer to the TGC object
resetMask | Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 483 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_setChannelForceUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tom_Ch | channel,
 |  | boolean | enabled,
 |  | boolean | resetEnabled
 | ) |  |

Enable/disable one channel for update (FUPD)

Parameters
tgc | Pointer to the TGC object
channel | Channel index
enabled | Enable/ Disable choise of the feature
resetEnabled | Enable/ Disable reset choise of the feature
Returns
None

Definition at line 502 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init().

◆ IfxGtm_Tom_Tgc_setChannelsForceUpdate()

IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint16 | enableMask,
 |  | uint16 | disableMask,
 |  | uint16 | resetEnableMask,
 |  | uint16 | resetDisableMask
 | ) |  |

Enable/disable one or more channels for the force update feature (FUPD)

Parameters
tgc | Pointer to the TGC object
enableMask | Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
disableMask | Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
resetEnableMask | Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
resetDisableMask | Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
Returns
None

Definition at line 513 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_setTimeTrigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | IfxGtm_Tbu_Ts | base,
 |  | uint32 | value
 | ) |  |

Sets the trigger time base and time base value.

Parameters
tgc | Pointer to the TGC object
base | Time base used for comparison
value | Compare value that raise the trigger
Returns
None

Definition at line 524 of file IfxGtm_Tom.c.

◆ IfxGtm_Tom_Tgc_trigger()

IFX_EXTERN void IfxGtm_Tom_Tgc_trigger ( Ifx_GTM_TOM_TGC * tgc )

Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)

Parameters
tgc Pointer to the TGC object
Returns
None

Definition at line 535 of file IfxGtm_Tom.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_start(), IfxGtm_Tom_Pwm_stop(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Tgc_writeGlobalControl()

IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl | ( | Ifx_GTM_TOM_TGC * | tgc,
 |  | uint32 | control
 | ) |  |

Sets the tgc global control value.

Parameters
tgc | Pointer to the TGC object
control | global control value
Returns
None

Definition at line 511 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Timer_applyUpdate(), and IfxGtm_Tom_Timer_disableUpdate().


iLLD_TC26B: Atom Interface Drivers

Modules
Atom Interface Drivers
iLLD » GTM
Collaboration diagram for Atom Interface Drivers:

Modules

ATOM PWM Interface Driver
ATOM PWM HL Interface Driver
ATOM Timer Interface Driver

Detailed Description


iLLD_TC26B: ATOM PWM Interface Driver

Modules
ATOM PWM Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM PWM Interface Driver:

Modules

How to use the GTM ATOM PWM Driver
ATOM PWM DataStructures
Pwm Functions

Detailed Description


iLLD_TC26B: How to use the GTM ATOM PWM Driver

How to use the GTM ATOM PWM Driver
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for How to use the GTM ATOM PWM Driver:

This interface allows to generate simple PWM signal on a ATOM out put and can generate interrupts if enabled. this output can also be routed to port pin if required.

Preparation

Include Files

Include following header file into your C code:

#include <Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h>

Variables

define global variables if necessary

Ifx_GTM *gtm = &MODULE_GTM;
#define ATOM0_CH0_PRIO 20

Interrupts

define Interrupts if needed

IFX_INTERRUPT(ATOM0Ch0_ISR, 0, ATOM0_CH0_PRIO)
{}

Initialization

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler (ATOM0Ch0_ISR, ATOM0_CH0_PRIO);
// enable GTM clock
{
float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
// Enables the GTM
IfxGtm_enable(gtm);
// Set the global clock frequency to the max
IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
// Set the CMU CLK0
IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
// FXCLK: used by TOM and CLK0: used by ATOM
IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
}
// initialise ATOM
IfxGtm_Atom_Pwm_Config atomConfig; \\configuration structure
IfxGtm_Atom_Pwm_Driver atomHandle; \\ handle
IfxGtm_Atom_Pwm_initConfig(&atomConfig, gtm);
atomConfig.tomChannel = IfxGtm_Tom_Ch_0;
atomConfig.period = 20;
atomConfig.dutyCycle = 10;
atomConfig.interrupt.ccu0Enabled = TRUE;
atomConfig.interrupt.isrPriority = ATOM0_CH0_PRIO;
atomConfig.pin.outputPin = &IfxGtm_ATOM0_0_TOUT0_P02_0_OUT;
IfxGtm_Atom_Pwm_init(&atomHandle, &atomConfig);

ATOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.


iLLD_TC26B: ATOM PWM DataStructures

Data Structures
ATOM PWM DataStructures
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for ATOM PWM DataStructures:

Data Structures

struct | IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Atom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Atom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Atom_Pwm_Driver
Driver Handle. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_Pwm_Interrupt

struct IfxGtm_Atom_Pwm_Interrupt

configuration structure for interrupts

Definition at line 119 of file IfxGtm_Atom_Pwm.h.

Data Fields
boolean | ccu0Enabled | Enable/Disable choice for CCU0 trigger interrupt.
boolean | ccu1Enabled | Enable/Disable choice for CCU1 trigger interrupt.
Ifx_Priority | isrPriority | Priority for Ccu0/1 interrupt.
IfxSrc_Tos | isrProvider | Type of Service for Ccu0/1 interrupt.
IfxGtm_IrqMode | mode | IRQ mode of interrupt.

◆ IfxGtm_Atom_Pwm_pin

struct IfxGtm_Atom_Pwm_pin

configuration structure for output pin

Definition at line 130 of file IfxGtm_Atom_Pwm.h.

Collaboration diagram for IfxGtm_Atom_Pwm_pin:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | Output mode.
IfxGtm_Atom_ToutMap * | outputPin | output pin
IfxPort_PadDriver | padDriver | Pad driver.

◆ IfxGtm_Atom_Pwm_Config

struct IfxGtm_Atom_Pwm_Config

Configuration structure.

Definition at line 143 of file IfxGtm_Atom_Pwm.h.

Collaboration diagram for IfxGtm_Atom_Pwm_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | Index of the ATOM object used.
IfxGtm_Atom_Ch | atomChannel | ATOM channel used for the timer.
uint32 | dutyCycle | Duty Cycle.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | immediateStartEnabled | enable immediate start after init
IfxGtm_Atom_Pwm_Interrupt | interrupt | configuration structure for interrupt
IfxGtm_Atom_Mode | mode | Atom mode of operation.
boolean | oneShotModeEnabled | Enable/Disable the one shot mode.
uint32 | period | Period.
IfxGtm_Atom_Pwm_pin | pin | configuration structure for output pin
Ifx_ActiveState | signalLevel | Signal Level.
boolean | synchronousUpdateEnabled | Synchronous or Asynchronous update.

◆ IfxGtm_Atom_Pwm_Driver

struct IfxGtm_Atom_Pwm_Driver

Driver Handle.

Definition at line 161 of file IfxGtm_Atom_Pwm.h.

Data Fields
Ifx_GTM_ATOM_AGC * | agc | Pointer to the AGC object.
Ifx_GTM_ATOM * | atom | Pointer to the ATOM object.
IfxGtm_Atom_Ch | atomChannel | ATOM channel used for the timer.
IfxGtm_Atom | atomIndex | Index of the ATOM object used.
Ifx_GTM * | gtm | Pointer to GTM module.
IfxGtm_Atom_Mode | mode | Atom mode of operation.


iLLD_TC26B: Pwm Functions

Functions
Pwm Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM Interface Driver
Collaboration diagram for Pwm Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Pwm_init()

IFX_EXTERN boolean IfxGtm_Atom_Pwm_init | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | const IfxGtm_Atom_Pwm_Config * | config
 | ) |  |

Initialises the Timer object.

Parameters
driver | ATOM Handle
config | Configuration structure for ATOM
Returns
TRUE on success else FALSE

Definition at line 35 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_initConfig()

IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig | ( | IfxGtm_Atom_Pwm_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 99 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_start()

IFX_EXTERN void IfxGtm_Atom_Pwm_start | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Starts the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device.
immediate | immediate start or not.
Returns
None

Definition at line 122 of file IfxGtm_Atom_Pwm.c.

◆ IfxGtm_Atom_Pwm_stop()

IFX_EXTERN void IfxGtm_Atom_Pwm_stop | ( | IfxGtm_Atom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 133 of file IfxGtm_Atom_Pwm.c.


iLLD_TC26B: ATOM PWM HL Interface Driver

Modules
ATOM PWM HL Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM PWM HL Interface Driver:

Modules

How to use the GTM ATOM PWM Driver
Data Structures
PwmHl Functions
PwmHl StdIf Functions

Detailed Description


iLLD_TC26B: How to use the GTM ATOM PWM Driver

How to use the GTM ATOM PWM Driver
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for How to use the GTM ATOM PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

Implementation is similar to TOM PWM HL Interface Driver

For a detailed configuration of the microcontroller, see IfxGtm_Atom_PwmHl_init().

Usage example

Initialisation is done by, e.g:

IfxGtm_Atom_PwmHl_Config driverConfig;
IfxGtm_Atom_PwmHl driverData;
IfxStdIf_PwmHl pwmhl;
IfxGtm_Atom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Atom_PwmHl_init(&driverData, &driverConfig);
IfxGtm_Atom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);

During run-time, the interface functions shall be used, e.g.:

IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
Ifx_TimerValue onTime[3]; // assume configured for three HL channels
onTime[0] = 10;
onTime[1] = 20;
onTime[2] = 30;
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration. More...
struct | IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_PwmHl_Base

struct IfxGtm_Atom_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 111 of file IfxGtm_Atom_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxGtm_Atom_PwmHl_Config

struct IfxGtm_Atom_PwmHl_Config

GTM ATOM: PWM HL configuration.

Definition at line 130 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM unit used.
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IFX_CONST IfxGtm_Atom_ToutMapP * | ccx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
IFX_CONST IfxGtm_Atom_ToutMapP * | coutx | Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver. User handles separately.
IfxGtm_Atom_Timer * | timer | Pointer to the linked timer object.

◆ IfxGtm_Atom_PwmHl_Mode

struct IfxGtm_Atom_PwmHl_Mode

Structure for PWM configuration.

Definition at line 143 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | Pwm Mode.
IfxGtm_Atom_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Atom_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Atom_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

◆ IfxGtm_Atom_PwmHl_s

struct IfxGtm_Atom_PwmHl_s

GTM ATOM PWM driver.

Definition at line 154 of file IfxGtm_Atom_PwmHl.h.

Collaboration diagram for IfxGtm_Atom_PwmHl_s:
[legend]
Data Fields
Ifx_GTM_ATOM_AGC * | agc | AGC unit used.
Ifx_GTM_ATOM * | atom | ATOM unit used.
IfxGtm_Atom_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxGtm_Atom_Ch | ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] | ATOM channels used for the CCCX outputs.
IfxGtm_Atom_Ch * | ccxTemp | cached value
IfxGtm_Atom_Ch | coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] | ATOM channels used for the OUTX outputs.
IfxGtm_Atom_Ch * | coutxTemp | cached value
IfxGtm_Atom_Timer * | timer | Pointer to the linked timer object.
IfxGtm_Atom_PwmHl_Update | update | Update function for actual selected mode.
IfxGtm_Atom_PwmHl_UpdateShift | updateAndShift | Update shift function for actual selected mode.
IfxGtm_Atom_PwmHl_UpdatePulse | updatePulse | Update pulse function for actual selected mode.


iLLD_TC26B: PwmHl Functions

Functions
PwmHl Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_PwmHl_init()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | const IfxGtm_Atom_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.

Parameters
driver | GTM ATOM PWM driver
config | GTM ATOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 149 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_initConfig()

IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig ( IfxGtm_Atom_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 245 of file IfxGtm_Atom_PwmHl.c.


iLLD_TC26B: PwmHl StdIf Functions

Functions
PwmHl StdIf Functions
iLLD » GTM » Atom Interface Drivers » ATOM PWM HL Interface Driver
Collaboration diagram for PwmHl StdIf Functions:

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Atom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateAndShiftOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateEdgeAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulseOff (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateShiftCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime ( IfxGtm_Atom_PwmHl * driver )

Returns the dead time.

See also
IfxStdIf_PwmHl_GetDeadtime
Parameters
driver GTM ATOM PWM driver
Returns
Dead Time

Definition at line 131 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse ( IfxGtm_Atom_PwmHl * driver )

Returns the minimum pulse.

See also
IfxStdIf_PwmHl_GetMinPulse
Parameters
driver GTM ATOM PWM driver
Returns
Min Pulse

Definition at line 137 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode ( IfxGtm_Atom_PwmHl * driver )

Returns Pwm mode.

See also
IfxStdIf_PwmHl_GetMode
Parameters
driver GTM ATOM PWM driver
Returns
Pwm mode

Definition at line 143 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 121 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_setMode().

◆ IfxGtm_Atom_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

See also
IfxStdIf_PwmHl_SetDeadtime
Parameters
driver | GTM ATOM PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE

Definition at line 256 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

See also
IfxStdIf_PwmHl_SetMinPulse
Parameters
driver | GTM ATOM PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 265 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setMode()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

See also
IfxStdIf_PwmHl_SetMode
Parameters
driver | GTM ATOM PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
Note
Changing signal level may produce short circuit at the power stage, in which case the inverter must be disable during this action.

Definition at line 276 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setOnTime()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time.

See also
IfxStdIf_PwmHl_SetOnTime
Parameters
driver | GTM ATOM PWM driver
tOn | ON time
Returns
None

Definition at line 345 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setOnTimeAndShift()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 351 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setPulse()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 357 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_setupChannels()

IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

See also
IfxStdIf_PwmHl_SetupChannels
Parameters
driver | GTM ATOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 363 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_Atom_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 372 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateAndShiftOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets switched to OFF.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 397 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateCenterAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 405 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 465 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | GTM ATOM PWM driver
tOn | T on
Returns
None

Definition at line 525 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), and IfxGtm_Atom_PwmHl_updatePulseOff().

◆ IfxGtm_Atom_PwmHl_updatePulse()

IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Update Pulse.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 541 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updatePulseOff()

IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set Pulse to OFF.

Parameters
driver | GTM ATOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 648 of file IfxGtm_Atom_PwmHl.c.

◆ IfxGtm_Atom_PwmHl_updateShiftCenterAligned()

IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned | ( | IfxGtm_Atom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Update Shift Center Aligned.

Parameters
driver | GTM ATOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 657 of file IfxGtm_Atom_PwmHl.c.


iLLD_TC26B: ATOM Timer Interface Driver

Modules
ATOM Timer Interface Driver
iLLD » GTM » Atom Interface Drivers
Collaboration diagram for ATOM Timer Interface Driver:

Modules

How to use the GTM ATOM Timer Driver
Timer StdIf Functions
Timer Functions
Data Structures

Detailed Description


iLLD_TC26B: How to use the GTM ATOM Timer Driver

How to use the GTM ATOM Timer Driver
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for How to use the GTM ATOM Timer Driver:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

Implementation is similar to TOM Timer Interface Driver.

For a detailed configuration of the microcontroller, see IfxGtm_Atom_Timer_init().

Usage example

Initialisation:

IfxGtm_Atom_Timer_Config driverConfig;
IfxGtm_Atom_Timer driverData;
IfxStdIf_Timer timer;
IfxGtm_Atom_Timer_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Atom_Timer_init (&driverData, &driverConfig);
boolean IfxGtm_Atom_Timer_stdIfTimerInit(&timer, &driverData);

During run-time, the interface functions should be used:

IfxStdIf_Timer_run(timer);
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC26B: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq ( IfxGtm_Atom_Timer * driver )

Returns the timer event.

See also
IfxStdIf_Timer_AckTimerIrq
Parameters
driver ATOM Timer interface Handle
Returns
Timer event

Definition at line 39 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq ( IfxGtm_Atom_Timer * driver )

Returns the trigger event.

See also
IfxStdIf_Timer_AckTriggerIrq
Parameters
driver ATOM Timer interface Handle
Returns
Trigger event

Definition at line 55 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_addToChannelMask()

IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask | ( | IfxGtm_Atom_Timer * | driver,
 |  | IfxGtm_Atom_Ch | channel
 | ) |  |

Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.

Parameters
driver | ATOM Timer interface Handle
channel | Channel to ba added to the mask
Returns
None

Definition at line 71 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_Atom_Timer_applyUpdate()

IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate ( IfxGtm_Atom_Timer * driver )

Enables the transfer of the shadow registers.

See also
IfxStdIf_Timer_ApplyUpdate
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 79 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_disableUpdate()

IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate ( IfxGtm_Atom_Timer * driver )

Disables the upadte.

See also
IfxStdIf_Timer_DisableUpdate
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 85 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency ( IfxGtm_Atom_Timer * driver )

Returns the frequency.

See also
IfxStdIf_Timer_GetFrequency
Parameters
driver ATOM Timer interface Handle
Returns
Frequency

Definition at line 91 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getInputFrequency()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency ( IfxGtm_Atom_Timer * driver )

Returns the Input frequncy.

See also
IfxStdIf_Timer_GetInputFrequency
Parameters
driver ATOM Timer interface Handle
Returns
Frequency

Definition at line 97 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod ( IfxGtm_Atom_Timer * driver )

Returns the period of the timer.

See also
IfxStdIf_Timer_GetPeriod
Parameters
driver ATOM Timer interface Handle
Returns
Period

Definition at line 109 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getResolution()

IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution ( IfxGtm_Atom_Timer * driver )

Returns the resolution.

See also
IfxStdIf_Timer_GetResolution
Parameters
driver ATOM Timer interface Handle
Returns
Resolution

Definition at line 121 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_getTrigger()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger ( IfxGtm_Atom_Timer * driver )

Returns the trigger point.

Parameters
driver ATOM Timer interface Handle
Returns
Trigger point

Definition at line 127 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_run()

IFX_EXTERN void IfxGtm_Atom_Timer_run ( IfxGtm_Atom_Timer * driver )

Runs the timer.

See also
IfxStdIf_Timer_Run
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 294 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setFrequency()

IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency | ( | IfxGtm_Atom_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

See also
IfxStdIf_Timer_SetFrequency
Parameters
driver | ATOM Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE

Definition at line 300 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setPeriod()

IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod | ( | IfxGtm_Atom_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

See also
IfxStdIf_Timer_SetPeriod
Parameters
driver | ATOM Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 308 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_setFrequency(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setSingleMode()

IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode | ( | IfxGtm_Atom_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

See also
IfxStdIf_Timer_SetSingleMode
Parameters
driver | ATOM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 322 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_setTrigger()

IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger | ( | IfxGtm_Atom_Timer * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

See also
IfxStdIf_Timer_SetTrigger
Parameters
driver | ATOM Timer interface Handle
triggerPoint | Trigger point value
Returns
None

Definition at line 328 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxGtm_Atom_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 334 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Atom_Timer_stop()

IFX_EXTERN void IfxGtm_Atom_Timer_stop ( IfxGtm_Atom_Timer * driver )

Stops the timer.

See also
IfxStdIf_Timer_Stop
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 364 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_stdIfTimerInit().

◆ IfxGtm_Atom_Timer_updateInputFrequency()

IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency ( IfxGtm_Atom_Timer * driver )

Updates the input frequency.

See also
IfxStdIf_Timer_UpdateInputFrequency
Parameters
driver ATOM Timer interface Handle
Returns
None

Definition at line 370 of file IfxGtm_Atom_Timer.c.

Referenced by IfxGtm_Atom_Timer_init(), and IfxGtm_Atom_Timer_stdIfTimerInit().


iLLD_TC26B: Timer Functions

Functions
Timer Functions
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Atom_Timer_getOffset()

IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset ( IfxGtm_Atom_Timer * driver )

Returns the initial timer offset in ticks.

See also
IfxStdIf_Timer_GetOffset
Parameters
driver ATOM Timer interface Handle
Returns
Returns the initial timer offset in ticks

Definition at line 103 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_getPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Timer_getPointer ( IfxGtm_Atom_Timer * driver )

Returns the pointer to timer channel.

Parameters
driver ATOM Timer interface Handle
Returns
Pointer

Definition at line 115 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_getTriggerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Atom_Timer_getTriggerPointer ( IfxGtm_Atom_Timer * driver )

Returns the pointer to trigger channel.

Parameters
driver ATOM Timer interface Handle
Returns
Pointer

Definition at line 133 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_init()

IFX_EXTERN boolean IfxGtm_Atom_Timer_init | ( | IfxGtm_Atom_Timer * | driver,
 |  | const IfxGtm_Atom_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | ATOM Timer interface Handle
config | Configuration structure for ATOM Timer
Returns
TRUE on success else FALSE

Definition at line 139 of file IfxGtm_Atom_Timer.c.

◆ IfxGtm_Atom_Timer_initConfig()

IFX_EXTERN void IfxGtm_Atom_Timer_initConfig | ( | IfxGtm_Atom_Timer_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for ATOM Timer
gtm | Pointer to GTM module
Returns
None

Definition at line 279 of file IfxGtm_Atom_Timer.c.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » Atom Interface Drivers » ATOM Timer Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Atom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Atom_Timer
TOM Timer interface. More...
struct | IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Atom_Timer_Base

struct IfxGtm_Atom_Timer_Base

Structure for the timer base.

Definition at line 86 of file IfxGtm_Atom_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.

◆ IfxGtm_Atom_Timer

struct IfxGtm_Atom_Timer

TOM Timer interface.

Definition at line 100 of file IfxGtm_Atom_Timer.h.

Collaboration diagram for IfxGtm_Atom_Timer:
[legend]
Data Fields
Ifx_GTM_ATOM_AGC * | agc | Pointer to the AGC object.
uint32 | agcApplyUpdate | AGC value for apply update.
uint32 | agcDisableUpdate | AGC value for disable update.
Ifx_GTM_ATOM * | atom | ATOM used for the timer functionality.
IfxGtm_Atom | atomIndex | Enum for ATOM objects.
IfxGtm_Atom_Timer_Base | base | Timer base structure.
uint16 | channelsMask | Mask for channels to be modified together.
Ifx_GTM * | gtm | GTM module used for the timer functionality.
Ifx_TimerValue | offset | Timer initial offset in ticks.
IfxGtm_Atom_Ch | timerChannel | ATOM channel used for the timer.
IfxGtm_Atom_Ch | triggerChannel | ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having the same interrupt level as the timer interrupt.

◆ IfxGtm_Atom_Timer_Config

struct IfxGtm_Atom_Timer_Config

Configuration structure for TOM Timer.

Definition at line 117 of file IfxGtm_Atom_Timer.h.

Collaboration diagram for IfxGtm_Atom_Timer_Config:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM used for the timer functionality.
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxGtm_Cmu_Clk | clock | Timer input clock.
Ifx_GTM * | gtm | GTM used for the timer functionality.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver : user handles separately.
IfxGtm_IrqMode | irqModeTimer | Interrupt mode for the timer.
IfxGtm_IrqMode | irqModeTrigger | Interrupt mode for the trigger.
IfxGtm_Atom_Ch | timerChannel | ATOM channel used for the timer.
IfxGtm_Atom_ToutMap * | triggerOut | ATOM channel used for the trigger output, can be identical to the timer channe.


iLLD_TC26B: TOM Interface Drivers

Modules
TOM Interface Drivers
iLLD » GTM
Collaboration diagram for TOM Interface Drivers:

Modules

TOM PWM Interface Driver
TOM PWM HL Interface Driver
TOM Timer Interface Driver

Detailed Description


iLLD_TC26B: TOM PWM Interface Driver

Modules
TOM PWM Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM PWM Interface Driver:

Modules

How to use the GTM TOM PWM Driver
TOM PWM DataStructures
Pwm Functions

Detailed Description


iLLD_TC26B: How to use the GTM TOM PWM Driver

How to use the GTM TOM PWM Driver
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for How to use the GTM TOM PWM Driver:

This interface allows to generate simple PWM signal on a TOM out put and can generate interrupts if enabled. this output can also be routed to port pin if required.

Preparation

Include Files

Include following header file into your C code:

#include <Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h>

Variables

define global variables if necessary

Ifx_GTM *gtm = &MODULE_GTM;
#define TOM0_CH0_PRIO 10

Interrupts

define Interrupts if needed

IFX_INTERRUPT(TOM0Ch0_ISR, 0, TOM0_CH0_PRIO)
{}

Initialization

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler (TOM0Ch0_ISR, TOM0_CH0_PRIO);
// enable GTM clock
{
float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
// Enables the GTM
IfxGtm_enable(gtm);
// Set the global clock frequency to the max
IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
// Set the CMU CLK0
IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
// FXCLK: used by TOM and CLK0: used by ATOM
IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
}
// initialise TOM
IfxGtm_Tom_Pwm_Config tomConfig; \\configuration structure
IfxGtm_Tom_Pwm_Driver tomHandle; \\ handle
IfxGtm_Tom_Pwm_initConfig(&tomConfig, gtm);
tomConfig.tomChannel = IfxGtm_Tom_Ch_0;
tomConfig.period = 20;
tomConfig.dutyCycle = 10;
tomConfig.interrupt.ccu0Enabled = TRUE;
tomConfig.interrupt.isrPriority = TOM0_CH0_PRIO;
tomConfig.pin.outputPin = &IfxGtm_TOM0_0_TOUT106_P10_4_OUT;
IfxGtm_Tom_Pwm_init(&tomHandle, &tomConfig);

TOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.


iLLD_TC26B: TOM PWM DataStructures

Data Structures
TOM PWM DataStructures
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for TOM PWM DataStructures:

Data Structures

struct | IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Tom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Tom_Pwm_Driver
Driver Handle. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_Pwm_Interrupt

struct IfxGtm_Tom_Pwm_Interrupt

configuration structure for interrupts

Definition at line 119 of file IfxGtm_Tom_Pwm.h.

Data Fields
boolean | ccu0Enabled | Enable/Disable choice for CCU0 trigger interrupt.
boolean | ccu1Enabled | Enable/Disable choice for CCU1 trigger interrupt.
Ifx_Priority | isrPriority | Priority for Ccu0/1 interrupt.
IfxSrc_Tos | isrProvider | Type of Service for Ccu0/1 interrupt.
IfxGtm_IrqMode | mode | IRQ mode of interrupt.

◆ IfxGtm_Tom_Pwm_Config

struct IfxGtm_Tom_Pwm_Config

Configuration structure.

Definition at line 143 of file IfxGtm_Tom_Pwm.h.

Collaboration diagram for IfxGtm_Tom_Pwm_Config:
[legend]
Data Fields
IfxGtm_Tom_Ch_ClkSrc | clock | Timer input clock.
uint32 | dutyCycle | Duty Cycle.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | immediateStartEnabled | enable/disable immediate start of PWM
IfxGtm_Tom_Pwm_Interrupt | interrupt | configuration structure for interrupt
boolean | oneShotModeEnabled | Enable/Disable the one shot mode.
uint32 | period | Period.
IfxGtm_Tom_Pwm_pin | pin | configuration structure for output pin
Ifx_ActiveState | signalLevel | Signal Level.
boolean | synchronousUpdateEnabled | Synchronous or Asynchronous update.
IfxGtm_Tom | tom | Index of the TOM object used.
IfxGtm_Tom_Ch | tomChannel | TOM channel used for the timer.

◆ IfxGtm_Tom_Pwm_Driver

struct IfxGtm_Tom_Pwm_Driver

Driver Handle.

Definition at line 161 of file IfxGtm_Tom_Pwm.h.

Data Fields
Ifx_GTM * | gtm | Pointer to GTM module.
Ifx_GTM_TOM_TGC * | tgc[2] | Pointer to the TGC object.
Ifx_GTM_TOM * | tom | Pointer to the TOM object.
IfxGtm_Tom_Ch | tomChannel | TOM channel used for the timer.
IfxGtm_Tom | tomIndex | Index of the TOM object used.


iLLD_TC26B: Pwm Functions

Functions
Pwm Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM Interface Driver
Collaboration diagram for Pwm Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Pwm_init()

IFX_EXTERN boolean IfxGtm_Tom_Pwm_init | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | const IfxGtm_Tom_Pwm_Config * | config
 | ) |  |

Initialises the Timer object.

Parameters
driver | TOM Handle
config | Configuration structure for TOM Timer
Returns
TRUE on success else FALSE

Definition at line 35 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_initConfig()

IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig | ( | IfxGtm_Tom_Pwm_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 109 of file IfxGtm_Tom_Pwm.c.


iLLD_TC26B: TOM PWM HL Interface Driver

Modules
TOM PWM HL Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM PWM HL Interface Driver:

Modules

How to use the GTM TOM PWM Driver
Data Structures
PwmHl Functions
PwmHl StdIf Functions

Detailed Description


iLLD_TC26B: How to use the GTM TOM PWM Driver

How to use the GTM TOM PWM Driver
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for How to use the GTM TOM PWM Driver:

This driver implements the PWM functionalities as defined by Standard interface: Multi-channels, dual-complementary PWM interface. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

The PWM driver is a concatenation of a timer with additional PWM generation cells.

The timer is implemented as described in TOM Timer Interface Driver, it generate an internal trigger that is used to synchronize all the TOM channel used (shown in red in the pictures below).

The picture below presents two configuration examples:

  • On the left, the timer and trigger are generated using the same TOM channel CH0. The 3 dual-complementary PWMs, CCx and COUTx, are generated using 6 additional TOM channels (CH1 to Ch6).
  • On the right, the timer and the trigger uses separate TOM channels to allow the triggering of the ADC conversions. The order of the CCx and COUTx has been allocated freely between CH9 up to CH14.
PWM implementations on GTM TOM

Each of the TOM channel used for the generation of the CCx and COUTx signals are configured as in the figure below:

TOM channel configuration

.

The internal trigger (red line) is generated by the timer on timer rest and used by the TOM PWM channels to reset the counters CN0 and transfer the shadow values saved in SR0 and SR1 to the CM0 and CM1 registers. When the counter CN0 reach the values of the CM0 or CM1 compare registers, a rising or falling edge is generated on the output PWM signal. The signal active state configuration define which of the CM0 or CM1 is generating the falling or rising edge.

This trigger mechanism ensure that all the PWM channels, period and trigger are updated at the exact same time, avoiding any possibility for glitch or incoherent signals.

The clock use is the same as the timer clock.

In order to ensure a coherent update of all registers, the internal trigger must be disable before updating the timer, trigger and PWM duty cycles shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.

Features

  • This implementation allows from 1 up to 3 dual-complementary PWM channels.
  • Resources used:
    • Additionally to the linked timer resources used, the following resources are used:
      • 2 TOM channels per PWM channels
    • All TOM channels used must be own by the same TOM and TGC as for the linked timer
  • The TOM channel used for the timer must always have a lower index than the TOM channels used for the pwm.
  • All TOM channels used (including the timer and the trigger) must be contiguous but the order of the TOM channels is free.

For a detailed configuration of the microcontroller, see IfxGtm_Tom_PwmHl_init().

Usage Example

Initialisation is done by, e.g:

IfxGtm_Tom_PwmHl_Config driverConfig;
IfxGtm_Tom_PwmHl driverData;
IfxStdIf_PwmHl pwmhl;
IfxGtm_Tom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Tom_PwmHl_init(&driverData, &driverConfig);
IfxGtm_Tom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);

During run-time, the interface functions shall be used, e.g.:

IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
Ifx_TimerValue onTime[3]; // assume configured for three HL channels
onTime[0] = 10;
onTime[1] = 20;
onTime[2] = 30;
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration. More...
struct | IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_PwmHl_Base

struct IfxGtm_Tom_PwmHl_Base

Multi-channels PWM object definition (channels only)

Definition at line 151 of file IfxGtm_Tom_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
Ifx_TimerValue | deadtime | Dead time between the top and bottom channel in ticks.
boolean | inverted | Flag indicating the center aligned inverted mode (TRUE)
Ifx_TimerValue | maxPulse | internal parameter
Ifx_TimerValue | minPulse | minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Ifx_Pwm_Mode | mode | actual PWM mode
sint8 | setMode | A non zero flag indicates that the PWM mode is being modified.

◆ IfxGtm_Tom_PwmHl_Config

struct IfxGtm_Tom_PwmHl_Config

GTM TOM: PWM HL configuration.

Definition at line 170 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_Config:
[legend]
Data Fields
IfxStdIf_PwmHl_Config | base | PWM HL standard interface configuration.
IFX_CONST IfxGtm_Tom_ToutMapP * | ccx | Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important.
IFX_CONST IfxGtm_Tom_ToutMapP * | coutx | Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important.
boolean | initPins | TRUE: Initialize pins in driver FALSE: Don't initialize pins in driver: user handles separately.
IfxGtm_Tom_Timer * | timer | Pointer to the linked timer object.
IfxGtm_Tom | tom | TOM unit used.

◆ IfxGtm_Tom_PwmHl_Mode

struct IfxGtm_Tom_PwmHl_Mode

Structure for PWM configuration.

Definition at line 183 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_Mode:
[legend]
Data Fields
boolean | inverted | Inverted configuration for the selected mode.
Ifx_Pwm_Mode | mode | Pwm Mode.
IfxGtm_Tom_PwmHl_Update | update | update call back function for the selected mode
IfxGtm_Tom_PwmHl_UpdateShift | updateAndShift | update shift call back function for the selected mode
IfxGtm_Tom_PwmHl_UpdatePulse | updatePulse | update pulse call back function for the selected mode

◆ IfxGtm_Tom_PwmHl_s

struct IfxGtm_Tom_PwmHl_s

GTM TOM PWM driver.

Definition at line 194 of file IfxGtm_Tom_PwmHl.h.

Collaboration diagram for IfxGtm_Tom_PwmHl_s:
[legend]
Data Fields
IfxGtm_Tom_PwmHl_Base | base | Multi-channels PWM object definition (channels only)
IfxGtm_Tom_Ch | ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] | TOM channels used for the CCCX outputs.
IfxGtm_Tom_Ch * | ccxTemp | cached value
IfxGtm_Tom_Ch | coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] | TOM channels used for the OUTX outputs.
IfxGtm_Tom_Ch * | coutxTemp | cached value
Ifx_GTM_TOM_TGC * | tgc | TGC unit used.
IfxGtm_Tom_Timer * | timer | Pointer to the linked timer object.
Ifx_GTM_TOM * | tom | TOM unit used.
IfxGtm_Tom_PwmHl_Update | update | Update function for actual selected mode.
IfxGtm_Tom_PwmHl_UpdateShift | updateAndShift | Update shift function for actual selected mode.
IfxGtm_Tom_PwmHl_UpdatePulse | updatePulse | Update pulse function for actual selected mode.


iLLD_TC26B: PwmHl Functions

Functions
PwmHl Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for PwmHl Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_PwmHl_init()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | const IfxGtm_Tom_PwmHl_Config * | config
 | ) |  |

Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels.

Parameters
driver | GTM TOM PWM driver
config | GTM TOM: PWM HL configuration
Returns
TRUE on success else FALSE

Definition at line 149 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_initConfig()

IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig ( IfxGtm_Tom_PwmHl_Config * config )

Initialize the configuration structure to default.

Parameters
config Channel configuration. This parameter is Initialised by the function
Returns
None

Definition at line 272 of file IfxGtm_Tom_PwmHl.c.


iLLD_TC26B: PwmHl StdIf Functions

Functions
PwmHl StdIf Functions
iLLD » GTM » TOM Interface Drivers » TOM PWM HL Interface Driver
Collaboration diagram for PwmHl StdIf Functions:

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Tom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateAndShiftOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateEdgeAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulseOff (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateShiftCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_PwmHl_getDeadtime()

IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime ( IfxGtm_Tom_PwmHl * driver )

Returns the dead time.

See also
IfxStdIf_PwmHl_GetDeadtime
Parameters
driver GTM TOM PWM driver
Returns
Dead Time

Definition at line 131 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_getMinPulse()

IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse ( IfxGtm_Tom_PwmHl * driver )

Returns the minimum pulse.

See also
IfxStdIf_PwmHl_GetMinPulse
Parameters
driver GTM TOM PWM driver
Returns
Min Pulse

Definition at line 137 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_getMode()

IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode ( IfxGtm_Tom_PwmHl * driver )

Returns Pwm mode.

See also
IfxStdIf_PwmHl_GetMode
Parameters
driver GTM TOM PWM driver
Returns
Pwm mode

Definition at line 143 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_invertActiveState()

IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState ( Ifx_ActiveState activeState )

Inverts the active state.

Parameters
activeState Active state
Returns
State

Definition at line 121 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_setMode().

◆ IfxGtm_Tom_PwmHl_setDeadtime()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 | deadtime
 | ) |  |

Sets the dead time.

See also
IfxStdIf_PwmHl_setDeadtime
Parameters
driver | GTM TOM PWM driver
deadtime | Dead time value
Returns
TRUE on success else FALSE

Definition at line 283 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setMinPulse()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 | minPulse
 | ) |  |

Sets the minimum pulse.

See also
IfxStdIf_PwmHl_setMinPulse
Parameters
driver | GTM TOM PWM driver
minPulse | Minimum pulse
Returns
TRUE on success else FALSE

Definition at line 292 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setMode()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()

See also
IfxStdIf_PwmHl_SetMode
Parameters
driver | GTM TOM PWM driver
mode | Pwm mode
Returns
TRUE on success else FALSE
Note
that changing signal level may produce short circuit at the power stage, in which case the inverter must be disable during this action.

Definition at line 303 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setOnTime()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Sets the ON time.

See also
IfxStdIf_PwmHl_SetOnTime
Parameters
driver | GTM TOM PWM driver
tOn | ON time
Returns
None

Definition at line 372 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setOnTimeAndShift()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets the ON time and Shift.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 378 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setPulse()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Sets the ON time and offset, all switched are independent.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 384 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_setupChannels()

IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set up channels.

See also
IfxStdIf_PwmHl_SetupChannels
Parameters
driver | GTM TOM PWM driver
activeCh | Active channel
stuckSt | Stuck state
Returns
None

Definition at line 390 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_PwmHl_stdIfPwmHlInit()

IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit | ( | IfxStdIf_PwmHl * | stdif,
 |  | IfxGtm_Tom_PwmHl * | driver
 | ) |  |

Initialises the statndard interface Pwm.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 399 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateAndShiftOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Sets switched to OFF.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 424 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateCenterAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in center aligned and center aligned inverted modes.

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 433 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateEdgeAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Updates the x output duty cycle in edge aligned modes (left and right aligned)

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 493 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the outputs to inactive.

Parameters
driver | GTM TOM PWM driver
tOn | T on
Returns
None

Definition at line 553 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), and IfxGtm_Tom_PwmHl_updatePulseOff().

◆ IfxGtm_Tom_PwmHl_updatePulse()

IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Update Pulse.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 570 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updatePulseOff()

IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set Pulse to OFF.

Parameters
driver | GTM TOM PWM driver
tOn | ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
None

Definition at line 677 of file IfxGtm_Tom_PwmHl.c.

◆ IfxGtm_Tom_PwmHl_updateShiftCenterAligned()

IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned | ( | IfxGtm_Tom_PwmHl * | driver,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Update Shift Center Aligned.

Parameters
driver | GTM TOM PWM driver
tOn | ON time
shift | Shift value in ticks
Returns
None

Definition at line 685 of file IfxGtm_Tom_PwmHl.c.


iLLD_TC26B: TOM Timer Interface Driver

Modules
TOM Timer Interface Driver
iLLD » GTM » TOM Interface Drivers
Collaboration diagram for TOM Timer Interface Driver:

Modules

How to use the GTM TOM Timer Driver
Data Structures
Timer Functions
Timer StdIf Functions

Detailed Description


iLLD_TC26B: How to use the GTM TOM Timer Driver

How to use the GTM TOM Timer Driver
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for How to use the GTM TOM Timer Driver:

This driver implements the timer functionalities as defined by Standard interface: Timer. The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

The timer fucntinality is implemented using either a single or 2 TOM channels. The dicision to use 1 or 2 channels is done depending on the following requirements:

  • relative position of the timer channel to the other channels used if any
  • need to trigger an other module, for example ADC triggering.

The figure below show how the TOM is configured when a single TOM channel is used for the timer and trigger functinalities. The internal trigger signal (red line) is generated when the counter CN0 reach the CM0 compare register. The value of CM0 act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously transfer the shadow values for the period value (SR0->CM0) and trigger edge (SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel. The trigger signal (output trigger) is generated by the CM0 and CM1 compare values. Depending on the trigger signal active edge configuiration, the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.

Timer using one signle TOM channel

In case 2 TOM channels are used for the timer and trigger functionalities, the 1st channel (CHz in the figure below) is used for the generation of the period, and the 2nd channel (CHz+n the below figure, the figure shows n=1 as example) is used for the trigger generation.

The CHz TOM channel generates the internal trigger signal (red line) when the counter CN0 reach the CM0 compare register. The value of CM0 of CHz act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously transfer the shadow period value (SR0->CM0). The internal trigger is used as an input for the next TOM channel.

The CHz+n TOM channel, uses the internal trigger signal to simultaneously resets the counter CN0, and transfer the shadow values used for the generation of the trigger falling and rising edges (SR0->CM0 and SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel. Depending on the trigger signal active edge configuiration, the CM0 will reset, and the CM1 will set the trigger signal, or vice versa. In orter to have a similar behaviour to the single channel implementation, the CM0 is set to the same value as CHz CM0, and CM1 is used for the trigger edge.

Timer using two different TOM channels for the timer and the trigger

In order to ensure a coherent update of all registers, the internal trigger must be disable before updating the timer and trigger shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.

  • Resources used:
    • if the trigger channel is identical to the timer channel, only one TOM channels is used
    • if the trigger channel is different from the timer channel, 2 TOM channels are used
    • All channels used must be own by the same TOM and TOM TGC
  • The timer counting direction is limited to IfxStdIf_Timer_CountDir_up
  • If the TOM trigger channel is not the same as the TOM timer channels
    • The TOM channel used for the trigger must have a lower index than the TOM channels used for the timer.
    • the TOM channels must be contiguous, unless specified by the driver using the timer driver.

Note: the timer and trigger must bepart of the same TGC, but PWM channels can be of different TGC of the same TOM as the timer

For a detailed configuration of the microcontroller, see IfxGtm_Tom_Timer_init().

Usage Example

Initialisation:

IfxGtm_Tom_Timer_Config driverConfig;
IfxGtm_Tom_Timer driverData;
IfxStdIf_Timer timer;
IfxGtm_Tom_Timer_initConfig(&driverConfig, &MODULE_GTM);
IfxGtm_Tom_Timer_init (&driverData, &driverConfig);
boolean IfxGtm_Tom_Timer_stdIfTimerInit(&timer, &driverData);

During run-time, the interface functions should be used:

IfxStdIf_Timer_run(timer);
IfxStdIf_Timer_disableUpdate(timer);
IfxStdIf_Timer_setPeriod(timer, period);
IfxStdIf_Timer_applyUpdate(timer);


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Tom_Timer
TOM Timer interface Handle. More...
struct | IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tom_Timer_Base

struct IfxGtm_Tom_Timer_Base

Structure for the timer base.

Definition at line 129 of file IfxGtm_Tom_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialised.

◆ IfxGtm_Tom_Timer

struct IfxGtm_Tom_Timer

TOM Timer interface Handle.

Definition at line 143 of file IfxGtm_Tom_Timer.h.

Collaboration diagram for IfxGtm_Tom_Timer:
[legend]
Data Fields
IfxGtm_Tom_Timer_Base | base | Timer base structure.
uint16 | channelsMask[2] | Mask for channels to be modified together, The 1st value corresponds to the Timer's TGC, the 2nd value corresponds to the timer's next TGC if any.
Ifx_GTM * | gtm | Pointer to GTM module.
Ifx_TimerValue | offset | Timer initial offset in ticks.
Ifx_GTM_TOM_TGC * | tgc[2] | Pointer to the TGC object.
uint32 | tgcGlobalControlApplyUpdate[2] | Cached value for TGC GLOB_CTR.
uint32 | tgcGlobalControlDisableUpdate[2] | Cached value for TGC GLOB_CTR.
IfxGtm_Tom_Ch | timerChannel | TOM channel used for the timer.
Ifx_GTM_TOM * | tom | Pointer to the TOM object.
IfxGtm_Tom | tomIndex | Enum for TOM objects.
IfxGtm_Tom_Ch | triggerChannel | TOM channel used for the trigger, can be identical to the timer channel.

◆ IfxGtm_Tom_Timer_Config

struct IfxGtm_Tom_Timer_Config

Configuration structure for TOM Timer.

Definition at line 160 of file IfxGtm_Tom_Timer.h.

Collaboration diagram for IfxGtm_Tom_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxGtm_Tom_Ch_ClkSrc | clock | Timer input clock.
Ifx_GTM * | gtm | Pointer to GTM module.
boolean | initPins | TRUE : Initialize pins in driver. FALSE: Don't initialize pins : handled separately by user.
IfxGtm_IrqMode | irqModeTimer | Interrupt mode for the timer.
IfxGtm_IrqMode | irqModeTrigger | Interrupt mode for the trigger.
IfxGtm_Tom_Ch | timerChannel | TOM channel used for the timer.
IfxGtm_Tom | tom | Index of the TOM object used.
IfxGtm_Tom_ToutMap * | triggerOut | TOM channel used for the trigger output, can be identical to the timer channel.


iLLD_TC26B: Timer Functions

Functions
Timer Functions
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Timer Functions:

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Timer_getOffset()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset ( IfxGtm_Tom_Timer * driver )

Returns the initial timer offset in ticks.

Parameters
driver TOM Timer interface Handle
Returns
Returns the initial timer offset in ticks

Definition at line 133 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_PwmHl_init().

◆ IfxGtm_Tom_Timer_getPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Timer_getPointer ( IfxGtm_Tom_Timer * driver )

Returns the pointer to timer channel.

Parameters
driver TOM Timer interface Handle
Returns
Pointer

Definition at line 145 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_getTriggerPointer()

IFX_EXTERN volatile uint32* IfxGtm_Tom_Timer_getTriggerPointer ( IfxGtm_Tom_Timer * driver )

Returns the pointer to trigger channel.

Parameters
driver TOM Timer interface Handle
Returns
Pointer

Definition at line 163 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_init()

IFX_EXTERN boolean IfxGtm_Tom_Timer_init | ( | IfxGtm_Tom_Timer * | driver,
 |  | const IfxGtm_Tom_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | TOM Timer interface Handle
config | Configuration structure for TOM Timer
Returns
TRUE on success else FALSE

Definition at line 169 of file IfxGtm_Tom_Timer.c.

◆ IfxGtm_Tom_Timer_initConfig()

IFX_EXTERN void IfxGtm_Tom_Timer_initConfig | ( | IfxGtm_Tom_Timer_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | This parameter is Initialised by the function
gtm | Pointer to GTM module
Returns
None

Definition at line 324 of file IfxGtm_Tom_Timer.c.


iLLD_TC26B: Timer StdIf Functions

Functions
Timer StdIf Functions
iLLD » GTM » TOM Interface Drivers » TOM Timer Interface Driver
Collaboration diagram for Timer StdIf Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tom_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq ( IfxGtm_Tom_Timer * driver )

Returns the timer event.

See also
IfxStdIf_Timer_AckTimerIrq
Parameters
driver TOM Timer interface Handle
Returns
Timer event

Definition at line 39 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_acknowledgeTriggerIrq()

IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq ( IfxGtm_Tom_Timer * driver )

Returns the trigger event.

See also
IfxStdIf_Timer_AckTriggerIrq
Parameters
driver TOM Timer interface Handle
Returns
Trigger event

Definition at line 56 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_addToChannelMask()

IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask | ( | IfxGtm_Tom_Timer * | driver,
 |  | IfxGtm_Tom_Ch | channel
 | ) |  |

Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.

Parameters
driver | TOM Timer interface Handle
channel | Channel to ba added to the mask
Returns
None

Definition at line 73 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

◆ IfxGtm_Tom_Timer_applyUpdate()

IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate ( IfxGtm_Tom_Timer * driver )

Enables the transfer of the shadow registers.

See also
IfxStdIf_Timer_ApplyUpdate Specific implementation: Enable the transfer of the shadow registers
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 99 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_disableUpdate()

IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate ( IfxGtm_Tom_Timer * driver )

Disables the upadte.

See also
IfxStdIf_Timer_DisableUpdate Specific implementation: Disable the transfer of the shadow registers
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 110 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency ( IfxGtm_Tom_Timer * driver )

Returns the frequency.

See also
IfxStdIf_Timer_GetFrequency
Parameters
driver TOM Timer interface Handle
Returns
Frequency

Definition at line 121 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getInputFrequency()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency ( IfxGtm_Tom_Timer * driver )

Returns the Input frequncy.

Parameters
driver TOM Timer interface Handle
Returns
Frequency

Definition at line 127 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod ( IfxGtm_Tom_Timer * driver )

Returns the period of the timer.

See also
IfxStdIf_Timer_GetPeriod
Parameters
driver TOM Timer interface Handle
Returns
Period

Definition at line 139 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getResolution()

IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution ( IfxGtm_Tom_Timer * driver )

Returns the resolution.

See also
IfxStdIf_Timer_GetResolution
Parameters
driver TOM Timer interface Handle
Returns
Resolution

Definition at line 151 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_getTrigger()

IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger ( IfxGtm_Tom_Timer * driver )

Returns the trigger point.

Parameters
driver TOM Timer interface Handle
Returns
Trigger point

Definition at line 157 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_run()

IFX_EXTERN void IfxGtm_Tom_Timer_run ( IfxGtm_Tom_Timer * driver )

Runs the timer.

See also
IfxStdIf_Timer_Run
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 339 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setFrequency()

IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency | ( | IfxGtm_Tom_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the frequency.

See also
IfxStdIf_Timer_SetFrequency
Parameters
driver | TOM Timer interface Handle
frequency | Frequency
Returns
TRUE on success else FALSE

Definition at line 350 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setPeriod()

IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod | ( | IfxGtm_Tom_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer.

See also
IfxStdIf_Timer_SetPeriod
Parameters
driver | TOM Timer interface Handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 358 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_setFrequency(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setSingleMode()

IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode | ( | IfxGtm_Tom_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer.

See also
IfxStdIf_Timer_SetSingleMode
Parameters
driver | TOM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 372 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_setTrigger()

IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger | ( | IfxGtm_Tom_Timer * | driver,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Sets the trigger.

See also
IfxStdIf_Timer_SetTrigger
Parameters
driver | TOM Timer interface Handle
triggerPoint | Trigger point value
Returns
None

Definition at line 378 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxGtm_Tom_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface timer object, will be initialized by the function
driver | Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 384 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_PwmHl_stdIfPwmHlInit().

◆ IfxGtm_Tom_Timer_stop()

IFX_EXTERN void IfxGtm_Tom_Timer_stop ( IfxGtm_Tom_Timer * driver )

Stops the timer.

See also
IfxStdIf_Timer_Stop
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 414 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_stdIfTimerInit().

◆ IfxGtm_Tom_Timer_updateInputFrequency()

IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency ( IfxGtm_Tom_Timer * driver )

Updates the input frequency.

See also
IfxStdIf_Timer_UpdateInputFrequency
Parameters
driver TOM Timer interface Handle
Returns
None

Definition at line 425 of file IfxGtm_Tom_Timer.c.

Referenced by IfxGtm_Tom_Timer_init(), and IfxGtm_Tom_Timer_stdIfTimerInit().


iLLD_TC26B: Tim Interface Drivers

Modules
Tim Interface Drivers
iLLD » GTM
Collaboration diagram for Tim Interface Drivers:

Modules

TIM Input Interface

Detailed Description


iLLD_TC26B: TIM Input Interface

Modules
TIM Input Interface
iLLD » GTM » Tim Interface Drivers
Collaboration diagram for TIM Input Interface:

Modules

Data Structures
Enumerations
Funtions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture. More...
struct | IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter. More...
struct | IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout. More...
struct | IfxGtm_Tim_In
Driver Handle. More...
struct | IfxGtm_Tim_In_Config
Configuration structure for TIM input capture. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tim_In_ConfigCapture

struct IfxGtm_Tim_In_ConfigCapture

Configuration structure for TIM capture.

Definition at line 82 of file IfxGtm_Tim_In.h.

Data Fields
IfxGtm_Cmu_Clk | clock | Timer input clock.
boolean | irqOnCntOverflow | If TRUE, the interrupt on CNT overflow is enabled.
boolean | irqOnDatalost | If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
boolean | irqOnEcntOverflow | If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
boolean | irqOnNewVal | If TRUE, the interrupt on new value is enabled.
Ifx_Pwm_Mode | mode | PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.

◆ IfxGtm_Tim_In_ConfigFilter

struct IfxGtm_Tim_In_ConfigFilter

Configuration structure for TIM filter.

Definition at line 94 of file IfxGtm_Tim_In.h.

Collaboration diagram for IfxGtm_Tim_In_ConfigFilter:
[legend]
Data Fields
IfxGtm_Cmu_Tim_Filter_Clk | clock | Timeout clock.
float32 | fallingEdgeFilterTime | Falling edge filter time in second.
IfxGtm_Tim_In_ConfigFilterMode | fallingEdgeMode | Filter mode for falling edge.
IfxGtm_Tim_In_Input | input | selected input
IfxGtm_Tim_TinMap * | inputPin | If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
IfxPort_InputMode | inputPinMode | Input pin mode.
boolean | irqOnGlitch | If TRUE, the interrupt on glitch is enabled.
float32 | risingEdgeFilterTime | Rising edge filter time in second.
IfxGtm_Tim_In_ConfigFilterMode | risingEdgeMode | Filter mode for rising edge.

◆ IfxGtm_Tim_In_ConfigTimeout

struct IfxGtm_Tim_In_ConfigTimeout

Configuration structure for TIM timeout.

Definition at line 109 of file IfxGtm_Tim_In.h.

Data Fields
IfxGtm_Cmu_Clk | clock | Timeout clock.
boolean | irqOnTimeout | If TRUE, the interrupt on timeout is enabled.
float32 | timeout | Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (TDU)

◆ IfxGtm_Tim_In

struct IfxGtm_Tim_In

Driver Handle.

Definition at line 122 of file IfxGtm_Tim_In.h.

Data Fields
float32 | captureClockFrequency | Capture clock frequency in Hz.
Ifx_GTM_TIM_CH * | channel | TIM channel used.
IfxGtm_Tim_Ch | channelIndex | Index of the TIM channel being used.
boolean | dataCoherent | TRUE, if the duty and period values are measured from the same period.
boolean | dataLost | TRUE if data are lost.
uint16 | edgeCount | number of edges counted.
uint32 | edgeCounterUpper | upper part of the edge counter
boolean | glitch | TRUE if glitch is detected.
boolean | newData | TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
boolean | overflowCnt | TRUE if the last measurement show an overflow in CNT.
uint32 | periodTick | Period value in clock ticks.
uint32 | pulseLengthTick | Duty value in clock ticks.
IfxGtm_Tim | timIndex | Index of the TIM module being used.

◆ IfxGtm_Tim_In_Config

struct IfxGtm_Tim_In_Config

Configuration structure for TIM input capture.

Definition at line 141 of file IfxGtm_Tim_In.h.

Collaboration diagram for IfxGtm_Tim_In_Config:
[legend]
Data Fields
IfxGtm_Tim_In_ConfigCapture | capture | Capture configuration.
IfxGtm_Tim_Ch | channelIndex | Channel index.
IfxGtm_Tim_In_ConfigFilter | filter | Filter configuration.
Ifx_GTM * | gtm | GTM used.
IfxGtm_IrqMode | irqMode | Interrupt mode for the new value available.
Ifx_Priority | isrPriority | Set the interrupt priority for new value available. If 0, no interrupt will be generated.
IfxSrc_Tos | isrProvider | Interrupt service provider for the timer interrupt.
IfxGtm_Tim_In_ConfigTimeout | timeout | Timeout configuration.
IfxGtm_Tim | timIndex | TIM index.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Tim_In_ConfigFilterMode {
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold,
IfxGtm_Tim_In_ConfigFilterMode_none
}
Config Filter Mode. More...
enum IfxGtm_Tim_In_Input {
IfxGtm_Tim_In_Input_currentChannel,
IfxGtm_Tim_In_Input_adjacentChannel,
IfxGtm_Tim_In_Input_aux
}
Input Source. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Tim_In_ConfigFilterMode

enum IfxGtm_Tim_In_ConfigFilterMode

Config Filter Mode.

Enumerator
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation | Immediate edge propagation mode.
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown | Individual deglitch time mode (Up Down)
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold | Individual deglitch time mode (Hold)
IfxGtm_Tim_In_ConfigFilterMode_none | No filter.

Definition at line 55 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_Input

enum IfxGtm_Tim_In_Input

Input Source.

Enumerator
IfxGtm_Tim_In_Input_currentChannel | Use the input from the current channel.
IfxGtm_Tim_In_Input_adjacentChannel | Use the input from the adjacent channel.
IfxGtm_Tim_In_Input_aux | Use the input from the aux.

Definition at line 65 of file IfxGtm_Tim_In.h.


iLLD_TC26B: Funtions

Functions
Funtions
iLLD » GTM » Tim Interface Drivers » TIM Input Interface
Collaboration diagram for Funtions:

Functions

IFX_INLINE void | IfxGtm_Tim_In_clearNewData (IfxGtm_Tim_In *driver)
Clear the new data flag. More...
IFX_INLINE float32 | IfxGtm_Tim_In_getDutyPercent (IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent More...
IFX_INLINE float32 | IfxGtm_Tim_In_getPeriodSecond (IfxGtm_Tim_In *driver)
Return the period in second. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPeriodTicks (IfxGtm_Tim_In *driver)
Return the period value in tick. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPulseLengthTick (IfxGtm_Tim_In *driver)
Return the pulse length value in tick. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isDataLost (IfxGtm_Tim_In *driver)
Indicates if data were lost. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isNewData (IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag) More...
IFX_EXTERN boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
IFX_EXTERN void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
IFX_EXTERN void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

Function Documentation

◆ IfxGtm_Tim_In_clearNewData()

IFX_INLINE void IfxGtm_Tim_In_clearNewData ( IfxGtm_Tim_In * driver )

Clear the new data flag.

Parameters
driver TIM Input object
Returns
None

Definition at line 243 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getDutyPercent()

IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent | ( | IfxGtm_Tim_In * | driver,
 |  | boolean * | dataCoherent
 | ) |  |

return the dutycycle in percent

Parameters
driver | TIM Input object
dataCoherent | If true, the duty cycle has been calculated with coherent values for the period and duty, else the period and duty value are from 2 adjacent periods
Returns
duty

Definition at line 249 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getPeriodSecond()

IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond ( IfxGtm_Tim_In * driver )

Return the period in second.

Parameters
driver TIM Input object
Returns
period value in seconds

Definition at line 261 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_getPeriodTicks()

IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks ( IfxGtm_Tim_In * driver )

Return the period value in tick.

Parameters
driver TIM Input object
Returns
period value in ticks

Definition at line 267 of file IfxGtm_Tim_In.h.

Referenced by IfxGtm_Tim_In_getPeriodSecond().

◆ IfxGtm_Tim_In_getPulseLengthTick()

IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick ( IfxGtm_Tim_In * driver )

Return the pulse length value in tick.

Parameters
driver TIM Input object
Returns
pulse length

Definition at line 273 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_init()

IFX_EXTERN boolean IfxGtm_Tim_In_init | ( | IfxGtm_Tim_In * | driver,
 |  | const IfxGtm_Tim_In_Config * | config
 | ) |  |

Initializes the input capture object.

Parameters
driver | TIM Input object
config | Configuration structure for the input capture Timer
Returns
TRUE on success else FALSE

Definition at line 37 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_initConfig()

IFX_EXTERN void IfxGtm_Tim_In_initConfig | ( | IfxGtm_Tim_In_Config * | config,
 |  | Ifx_GTM * | gtm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for the input capture Timer
gtm | Pointer to GTM module
Returns
None

Definition at line 237 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_isDataLost()

IFX_INLINE boolean IfxGtm_Tim_In_isDataLost ( IfxGtm_Tim_In * driver )

Indicates if data were lost.

Parameters
driver TIM Input object
Returns
TRUE if Data is lost FALSE otherwise

Definition at line 279 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_isNewData()

IFX_INLINE boolean IfxGtm_Tim_In_isNewData ( IfxGtm_Tim_In * driver )

Indicates if new data are present (new data flag)

Parameters
driver TIM Input object
Returns
TRUE if New Data FALSE otherwise

Definition at line 285 of file IfxGtm_Tim_In.h.

◆ IfxGtm_Tim_In_onIsr()

IFX_EXTERN void IfxGtm_Tim_In_onIsr ( IfxGtm_Tim_In * driver )

will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver

Parameters
driver TIM Input object
Returns
None

Definition at line 267 of file IfxGtm_Tim_In.c.

◆ IfxGtm_Tim_In_update()

IFX_EXTERN void IfxGtm_Tim_In_update ( IfxGtm_Tim_In * driver )

Updates the period and duty cycle.

Parameters
driver TIM Input object
Returns
None

Definition at line 273 of file IfxGtm_Tim_In.c.

Referenced by IfxGtm_Tim_In_onIsr().


iLLD_TC26B: GTM Pin Mapping

Data Structures | Typedefs | Enumerations | Functions | Variables
GTM Pin Mapping
iLLD » GTM
Collaboration diagram for GTM Pin Mapping:

Data Structures

struct | IfxGtm_Tim_TinMap
TIN pin mapping structure. More...
struct | IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure. More...
struct | IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure. More...
struct | IfxGtm_Clk_Out
GTM Clock Output. More...

Typedefs

typedef IfxGtm_Atom_ToutMap * | IfxGtm_Atom_ToutMapP
Pointer to IfxGtm_Atom_ToutMap. More...
typedef IfxGtm_Tom_ToutMap * | IfxGtm_Tom_ToutMapP
Pointer to IfxGtm_Tom_ToutMap. More...

Enumerations

enum IfxGtm_ChXSel {
IfxGtm_ChXSel_a,
IfxGtm_ChXSel_b,
IfxGtm_ChXSel_c,
IfxGtm_ChXSel_d,
IfxGtm_ChXSel_e,
IfxGtm_ChXSel_f,
IfxGtm_ChXSel_g,
IfxGtm_ChXSel_h,
IfxGtm_ChXSel_i,
IfxGtm_ChXSel_j,
IfxGtm_ChXSel_k,
IfxGtm_ChXSel_l,
IfxGtm_ChXSel_m,
IfxGtm_ChXSel_n,
IfxGtm_ChXSel_o,
IfxGtm_ChXSel_p
}
CHxSEL register control code. More...
enum IfxGtm_ToutSel {
IfxGtm_ToutSel_a,
IfxGtm_ToutSel_b,
IfxGtm_ToutSel_c,
IfxGtm_ToutSel_d,
IfxGtm_ToutSel_e
}
TOUTSEL register control code. More...

Functions

IFX_EXTERN void | IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
IFX_EXTERN void | IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
GTM_CLK0: GTM output. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
GTM_CLK1: GTM output. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
GTM_CLK2: GTM output. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN
IfxGtm_TIM0_0_TIN0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN
IfxGtm_TIM0_0_TIN109_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN
IfxGtm_TIM0_0_TIN18_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN
IfxGtm_TIM0_0_TIN26_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN
IfxGtm_TIM0_0_TIN32_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN
IfxGtm_TIM0_0_TIN34_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN
IfxGtm_TIM0_0_TIN48_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN
IfxGtm_TIM0_0_TIN53_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN
IfxGtm_TIM0_0_TIN77_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN
IfxGtm_TIM0_0_TIN85_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN
IfxGtm_TIM0_0_TIN87_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN
IfxGtm_TIM0_0_TIN8_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN
IfxGtm_TIM0_0_TIN9_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN
IfxGtm_TIM0_1_TIN103_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN
IfxGtm_TIM0_1_TIN10_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN
IfxGtm_TIM0_1_TIN11_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN
IfxGtm_TIM0_1_TIN19_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN
IfxGtm_TIM0_1_TIN1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN
IfxGtm_TIM0_1_TIN27_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN
IfxGtm_TIM0_1_TIN31_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN
IfxGtm_TIM0_1_TIN35_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN
IfxGtm_TIM0_1_TIN47_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN
IfxGtm_TIM0_1_TIN54_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN
IfxGtm_TIM0_1_TIN78_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN
IfxGtm_TIM0_1_TIN86_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN
IfxGtm_TIM0_2_TIN104_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN
IfxGtm_TIM0_2_TIN107_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN
IfxGtm_TIM0_2_TIN20_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN
IfxGtm_TIM0_2_TIN28_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN
IfxGtm_TIM0_2_TIN2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN
IfxGtm_TIM0_2_TIN33_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN
IfxGtm_TIM0_2_TIN36_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN
IfxGtm_TIM0_2_TIN46_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN
IfxGtm_TIM0_2_TIN55_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN
IfxGtm_TIM0_2_TIN79_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN
IfxGtm_TIM0_3_TIN105_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN
IfxGtm_TIM0_3_TIN108_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN
IfxGtm_TIM0_3_TIN21_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN
IfxGtm_TIM0_3_TIN29_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN
IfxGtm_TIM0_3_TIN38_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN
IfxGtm_TIM0_3_TIN3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN
IfxGtm_TIM0_3_TIN49_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN
IfxGtm_TIM0_3_TIN51_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN
IfxGtm_TIM0_3_TIN56_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN
IfxGtm_TIM0_3_TIN60_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN
IfxGtm_TIM0_3_TIN80_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN
IfxGtm_TIM0_4_TIN102_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN
IfxGtm_TIM0_4_TIN22_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN
IfxGtm_TIM0_4_TIN30_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN
IfxGtm_TIM0_4_TIN39_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN
IfxGtm_TIM0_4_TIN4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN
IfxGtm_TIM0_4_TIN50_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN
IfxGtm_TIM0_4_TIN52_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN
IfxGtm_TIM0_4_TIN57_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN
IfxGtm_TIM0_4_TIN61_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN
IfxGtm_TIM0_4_TIN81_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN
IfxGtm_TIM0_5_TIN110_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN
IfxGtm_TIM0_5_TIN23_P33_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN
IfxGtm_TIM0_5_TIN40_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN
IfxGtm_TIM0_5_TIN41_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN
IfxGtm_TIM0_5_TIN58_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN
IfxGtm_TIM0_5_TIN5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN
IfxGtm_TIM0_5_TIN82_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN
IfxGtm_TIM0_6_TIN106_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN
IfxGtm_TIM0_6_TIN24_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN
IfxGtm_TIM0_6_TIN42_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN
IfxGtm_TIM0_6_TIN43_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN
IfxGtm_TIM0_6_TIN59_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN
IfxGtm_TIM0_6_TIN62_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN
IfxGtm_TIM0_6_TIN83_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN
IfxGtm_TIM0_7_TIN25_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN
IfxGtm_TIM0_7_TIN44_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN
IfxGtm_TIM0_7_TIN45_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN
IfxGtm_TIM0_7_TIN63_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN
IfxGtm_TIM0_7_TIN64_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN
IfxGtm_TIM0_7_TIN7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN
IfxGtm_TIM0_7_TIN84_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN
IfxGtm_TIM1_0_TIN0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN
IfxGtm_TIM1_0_TIN109_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN
IfxGtm_TIM1_0_TIN18_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN
IfxGtm_TIM1_0_TIN26_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN
IfxGtm_TIM1_0_TIN32_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN
IfxGtm_TIM1_0_TIN48_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN
IfxGtm_TIM1_0_TIN53_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN
IfxGtm_TIM1_0_TIN68_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN
IfxGtm_TIM1_0_TIN76_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN
IfxGtm_TIM1_0_TIN77_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN
IfxGtm_TIM1_0_TIN85_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN
IfxGtm_TIM1_0_TIN87_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN
IfxGtm_TIM1_0_TIN94_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN
IfxGtm_TIM1_1_TIN103_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN
IfxGtm_TIM1_1_TIN19_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN
IfxGtm_TIM1_1_TIN1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN
IfxGtm_TIM1_1_TIN27_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN
IfxGtm_TIM1_1_TIN31_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN
IfxGtm_TIM1_1_TIN47_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN
IfxGtm_TIM1_1_TIN54_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN
IfxGtm_TIM1_1_TIN69_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN
IfxGtm_TIM1_1_TIN78_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN
IfxGtm_TIM1_1_TIN86_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN
IfxGtm_TIM1_1_TIN95_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN
IfxGtm_TIM1_2_TIN104_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN
IfxGtm_TIM1_2_TIN107_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN
IfxGtm_TIM1_2_TIN12_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN
IfxGtm_TIM1_2_TIN20_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN
IfxGtm_TIM1_2_TIN28_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN
IfxGtm_TIM1_2_TIN2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN
IfxGtm_TIM1_2_TIN33_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN
IfxGtm_TIM1_2_TIN46_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN
IfxGtm_TIM1_2_TIN55_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN
IfxGtm_TIM1_2_TIN70_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN
IfxGtm_TIM1_2_TIN79_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN
IfxGtm_TIM1_2_TIN96_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN
IfxGtm_TIM1_3_TIN105_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN
IfxGtm_TIM1_3_TIN108_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN
IfxGtm_TIM1_3_TIN13_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN
IfxGtm_TIM1_3_TIN21_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN
IfxGtm_TIM1_3_TIN29_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN
IfxGtm_TIM1_3_TIN38_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN
IfxGtm_TIM1_3_TIN3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN
IfxGtm_TIM1_3_TIN49_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN
IfxGtm_TIM1_3_TIN56_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN
IfxGtm_TIM1_3_TIN71_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN
IfxGtm_TIM1_3_TIN80_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN
IfxGtm_TIM1_3_TIN97_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN
IfxGtm_TIM1_4_TIN102_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN
IfxGtm_TIM1_4_TIN14_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN
IfxGtm_TIM1_4_TIN22_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN
IfxGtm_TIM1_4_TIN30_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN
IfxGtm_TIM1_4_TIN39_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN
IfxGtm_TIM1_4_TIN4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN
IfxGtm_TIM1_4_TIN50_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN
IfxGtm_TIM1_4_TIN57_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN
IfxGtm_TIM1_4_TIN72_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN
IfxGtm_TIM1_4_TIN81_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN
IfxGtm_TIM1_4_TIN98_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN
IfxGtm_TIM1_5_TIN110_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN
IfxGtm_TIM1_5_TIN15_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN
IfxGtm_TIM1_5_TIN40_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN
IfxGtm_TIM1_5_TIN41_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN
IfxGtm_TIM1_5_TIN58_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN
IfxGtm_TIM1_5_TIN5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN
IfxGtm_TIM1_5_TIN65_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN
IfxGtm_TIM1_5_TIN73_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN
IfxGtm_TIM1_5_TIN82_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN
IfxGtm_TIM1_5_TIN91_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN
IfxGtm_TIM1_5_TIN99_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN
IfxGtm_TIM1_6_TIN100_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN
IfxGtm_TIM1_6_TIN106_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN
IfxGtm_TIM1_6_TIN16_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN
IfxGtm_TIM1_6_TIN24_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN
IfxGtm_TIM1_6_TIN42_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN
IfxGtm_TIM1_6_TIN43_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN
IfxGtm_TIM1_6_TIN59_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN
IfxGtm_TIM1_6_TIN66_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN
IfxGtm_TIM1_6_TIN6_P02_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN
IfxGtm_TIM1_6_TIN74_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN
IfxGtm_TIM1_6_TIN83_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN
IfxGtm_TIM1_6_TIN92_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN
IfxGtm_TIM1_7_TIN101_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN
IfxGtm_TIM1_7_TIN17_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN
IfxGtm_TIM1_7_TIN25_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN
IfxGtm_TIM1_7_TIN44_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN
IfxGtm_TIM1_7_TIN45_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN
IfxGtm_TIM1_7_TIN64_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN
IfxGtm_TIM1_7_TIN67_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN
IfxGtm_TIM1_7_TIN75_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN
IfxGtm_TIM1_7_TIN7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN
IfxGtm_TIM1_7_TIN84_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN
IfxGtm_TIM1_7_TIN93_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN
IfxGtm_TIM2_0_TIN34_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN
IfxGtm_TIM2_0_TIN68_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN
IfxGtm_TIM2_0_TIN76_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN
IfxGtm_TIM2_0_TIN8_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN
IfxGtm_TIM2_0_TIN94_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN
IfxGtm_TIM2_0_TIN9_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN
IfxGtm_TIM2_1_TIN10_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN
IfxGtm_TIM2_1_TIN11_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN
IfxGtm_TIM2_1_TIN35_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN
IfxGtm_TIM2_1_TIN69_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN
IfxGtm_TIM2_1_TIN95_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN
IfxGtm_TIM2_2_TIN12_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN
IfxGtm_TIM2_2_TIN36_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN
IfxGtm_TIM2_2_TIN70_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN
IfxGtm_TIM2_2_TIN88_P14_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN
IfxGtm_TIM2_2_TIN96_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN
IfxGtm_TIM2_3_TIN13_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN
IfxGtm_TIM2_3_TIN60_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN
IfxGtm_TIM2_3_TIN71_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN
IfxGtm_TIM2_3_TIN89_P14_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN
IfxGtm_TIM2_3_TIN97_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN
IfxGtm_TIM2_4_TIN14_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN
IfxGtm_TIM2_4_TIN51_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN
IfxGtm_TIM2_4_TIN61_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN
IfxGtm_TIM2_4_TIN72_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN
IfxGtm_TIM2_4_TIN90_P14_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN
IfxGtm_TIM2_4_TIN98_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN
IfxGtm_TIM2_5_TIN15_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN
IfxGtm_TIM2_5_TIN52_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN
IfxGtm_TIM2_5_TIN65_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN
IfxGtm_TIM2_5_TIN73_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN
IfxGtm_TIM2_5_TIN91_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN
IfxGtm_TIM2_5_TIN99_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN
IfxGtm_TIM2_6_TIN100_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN
IfxGtm_TIM2_6_TIN16_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN
IfxGtm_TIM2_6_TIN62_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN
IfxGtm_TIM2_6_TIN66_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN
IfxGtm_TIM2_6_TIN74_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN
IfxGtm_TIM2_6_TIN92_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN
IfxGtm_TIM2_7_TIN101_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN
IfxGtm_TIM2_7_TIN17_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN
IfxGtm_TIM2_7_TIN63_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN
IfxGtm_TIM2_7_TIN67_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN
IfxGtm_TIM2_7_TIN75_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN
IfxGtm_TIM2_7_TIN93_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_TOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_TOM0_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_TOM0_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_TOM0_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_TOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_TOM0_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_TOM0_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_TOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_TOM0_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_TOM0_10_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_TOM0_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_TOM0_10_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_TOM0_10_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IfxGtm_TOM0_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IfxGtm_TOM0_10_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_TOM0_10_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_TOM0_11_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_TOM0_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_TOM0_11_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_TOM0_11_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IfxGtm_TOM0_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IfxGtm_TOM0_11_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_TOM0_11_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_TOM0_12_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IfxGtm_TOM0_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_TOM0_12_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_TOM0_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_TOM0_12_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IfxGtm_TOM0_12_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_TOM0_12_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_TOM0_13_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IfxGtm_TOM0_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_TOM0_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IfxGtm_TOM0_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IfxGtm_TOM0_13_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_TOM0_13_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_TOM0_14_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_TOM0_14_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IfxGtm_TOM0_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IfxGtm_TOM0_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_TOM0_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IfxGtm_TOM0_14_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_TOM0_15_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_TOM0_15_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_TOM0_15_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IfxGtm_TOM0_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IfxGtm_TOM0_15_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_TOM0_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_TOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_TOM0_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_TOM0_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_TOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_TOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_TOM0_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_TOM0_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_TOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_TOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_TOM0_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_TOM0_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_TOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_TOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_TOM0_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_TOM0_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_TOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_TOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_TOM0_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_TOM0_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_TOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_TOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IfxGtm_TOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_TOM0_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_TOM0_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_TOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_TOM0_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_TOM0_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_TOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_TOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IfxGtm_TOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_TOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_TOM0_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_TOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_TOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_TOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_TOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_TOM0_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_TOM0_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_TOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_TOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_TOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_TOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_TOM0_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_TOM0_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_TOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_TOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IfxGtm_TOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_TOM0_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_TOM0_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_TOM0_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_TOM0_8_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_TOM0_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IfxGtm_TOM0_8_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_TOM0_8_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_TOM0_8_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_TOM0_8_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_TOM0_8_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_TOM0_9_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_TOM0_9_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_TOM0_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_TOM0_9_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_TOM0_9_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IfxGtm_TOM0_9_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_TOM1_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_TOM1_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_TOM1_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IfxGtm_TOM1_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IfxGtm_TOM1_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_TOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_TOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_TOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_TOM1_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IfxGtm_TOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_TOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IfxGtm_TOM1_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_TOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IfxGtm_TOM1_10_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IfxGtm_TOM1_10_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_TOM1_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_TOM1_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IfxGtm_TOM1_11_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IfxGtm_TOM1_11_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_TOM1_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_TOM1_11_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_TOM1_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IfxGtm_TOM1_12_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_TOM1_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_TOM1_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_TOM1_12_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IfxGtm_TOM1_13_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_TOM1_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_TOM1_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_TOM1_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_TOM1_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_TOM1_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_TOM1_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_TOM1_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_TOM1_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_TOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_TOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_TOM1_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_TOM1_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_TOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IfxGtm_TOM1_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IfxGtm_TOM1_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_TOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_TOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_TOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IfxGtm_TOM1_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_TOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_TOM1_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_TOM1_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_TOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IfxGtm_TOM1_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IfxGtm_TOM1_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_TOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_TOM1_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IfxGtm_TOM1_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IfxGtm_TOM1_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_TOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_TOM1_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_TOM1_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_TOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IfxGtm_TOM1_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IfxGtm_TOM1_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_TOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_TOM1_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IfxGtm_TOM1_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IfxGtm_TOM1_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_TOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_TOM1_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_TOM1_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_TOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IfxGtm_TOM1_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IfxGtm_TOM1_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_TOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_TOM1_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IfxGtm_TOM1_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IfxGtm_TOM1_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_TOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_TOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_TOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_TOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IfxGtm_TOM1_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_TOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_TOM1_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IfxGtm_TOM1_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IfxGtm_TOM1_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IfxGtm_TOM1_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IfxGtm_TOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_TOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_TOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_TOM1_6_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IfxGtm_TOM1_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_TOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_TOM1_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IfxGtm_TOM1_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_TOM1_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_TOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_TOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_TOM1_7_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_TOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_TOM1_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_TOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_TOM1_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IfxGtm_TOM1_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_TOM1_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IfxGtm_TOM1_8_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IfxGtm_TOM1_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IfxGtm_TOM1_9_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_TOM1_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IfxGtm_TOM1_9_TOUT52_P21_1_OUT. More...

Detailed Description

Data Structure Documentation

◆ IfxGtm_Tim_TinMap

struct IfxGtm_Tim_TinMap

TIN pin mapping structure.

Definition at line 76 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Tim_TinMap:
[legend]
Data Fields
IfxGtm_Tim_Ch | channel | TIM channel index.
IfxPort_Pin | pin | Port pin.
IfxGtm_ChXSel | select | Input multiplexer value.
IfxGtm_Tim | tim | TIM unit index.

◆ IfxGtm_Atom_ToutMap

struct IfxGtm_Atom_ToutMap

ATOM TOUT pin mapping structure.

Definition at line 85 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Atom_ToutMap:
[legend]
Data Fields
IfxGtm_Atom | atom | ATOM unit index.
IfxGtm_Atom_Ch | channel | ATOM channel index.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
uint32 | toutn | TOUT number.
IfxGtm_ToutSel | toutSel | TOUTSEL register control code.

◆ IfxGtm_Tom_ToutMap

struct IfxGtm_Tom_ToutMap

TOM TOUT pin mapping structure.

Definition at line 99 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Tom_ToutMap:
[legend]
Data Fields
IfxGtm_Tom_Ch | channel | TOM channel index.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
IfxGtm_Tom | tom | TOM unit index.
uint32 | toutn | TOUT number.
IfxGtm_ToutSel | toutSel | TOUTSEL register control code.

◆ IfxGtm_Clk_Out

struct IfxGtm_Clk_Out

GTM Clock Output.

Definition at line 110 of file IfxGtm_PinMap.h.

Collaboration diagram for IfxGtm_Clk_Out:
[legend]
Data Fields
Ifx_GTM * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Typedef Documentation

◆ IfxGtm_Atom_ToutMapP

typedef IfxGtm_Atom_ToutMap* IfxGtm_Atom_ToutMapP

Pointer to IfxGtm_Atom_ToutMap.

Definition at line 96 of file IfxGtm_PinMap.h.

◆ IfxGtm_Tom_ToutMapP

typedef IfxGtm_Tom_ToutMap* IfxGtm_Tom_ToutMapP

Pointer to IfxGtm_Tom_ToutMap.

Definition at line 118 of file IfxGtm_PinMap.h.

Enumeration Type Documentation

◆ IfxGtm_ChXSel

enum IfxGtm_ChXSel

CHxSEL register control code.

Enumerator
IfxGtm_ChXSel_a
IfxGtm_ChXSel_b
IfxGtm_ChXSel_c
IfxGtm_ChXSel_d
IfxGtm_ChXSel_e
IfxGtm_ChXSel_f
IfxGtm_ChXSel_g
IfxGtm_ChXSel_h
IfxGtm_ChXSel_i
IfxGtm_ChXSel_j
IfxGtm_ChXSel_k
IfxGtm_ChXSel_l
IfxGtm_ChXSel_m
IfxGtm_ChXSel_n
IfxGtm_ChXSel_o
IfxGtm_ChXSel_p

Definition at line 42 of file IfxGtm_PinMap.h.

◆ IfxGtm_ToutSel

enum IfxGtm_ToutSel

TOUTSEL register control code.

Enumerator
IfxGtm_ToutSel_a
IfxGtm_ToutSel_b
IfxGtm_ToutSel_c
IfxGtm_ToutSel_d
IfxGtm_ToutSel_e

Definition at line 66 of file IfxGtm_PinMap.h.

Function Documentation

◆ IfxGtm_PinMap_setAtomTout()

IFX_EXTERN void IfxGtm_PinMap_setAtomTout | ( | IfxGtm_Atom_ToutMap * | config,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Definition at line 701 of file IfxGtm_PinMap.c.

Referenced by IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_PwmHl_init(), and IfxGtm_Atom_Timer_init().

◆ IfxGtm_PinMap_setTimTin()

IFX_EXTERN void IfxGtm_PinMap_setTimTin | ( | IfxGtm_Tim_TinMap * | config,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Definition at line 689 of file IfxGtm_PinMap.c.

Referenced by IfxDsadc_Rdc_initHwTimestamp(), and IfxGtm_Tim_In_init().

◆ IfxGtm_PinMap_setTomTout()

IFX_EXTERN void IfxGtm_PinMap_setTomTout | ( | IfxGtm_Tom_ToutMap * | config,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Definition at line 713 of file IfxGtm_PinMap.c.

Referenced by IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_PwmHl_init(), and IfxGtm_Tom_Timer_init().

Variable Documentation

◆ IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_ATOM0_0_TOUT0_P02_0_OUT.

Definition at line 124 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT

IfxGtm_ATOM0_0_TOUT109_P10_7_OUT.

Definition at line 125 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_ATOM0_0_TOUT48_P22_1_OUT.

Definition at line 126 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_ATOM0_0_TOUT53_P21_2_OUT.

Definition at line 127 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_ATOM0_0_TOUT85_P14_5_OUT.

Definition at line 128 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_ATOM0_0_TOUT8_P02_8_OUT.

Definition at line 129 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_ATOM0_0_TOUT9_P00_0_OUT.

Definition at line 130 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT

IfxGtm_ATOM0_1_TOUT103_P10_1_OUT.

Definition at line 131 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_ATOM0_1_TOUT10_P00_1_OUT.

Definition at line 132 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_ATOM0_1_TOUT11_P00_2_OUT.

Definition at line 133 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_ATOM0_1_TOUT1_P02_1_OUT.

Definition at line 134 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_ATOM0_1_TOUT31_P33_9_OUT.

Definition at line 135 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_ATOM0_1_TOUT47_P22_0_OUT.

Definition at line 136 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_ATOM0_1_TOUT54_P21_3_OUT.

Definition at line 137 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_ATOM0_1_TOUT84_P14_4_OUT.

Definition at line 138 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT

IfxGtm_ATOM0_2_TOUT104_P10_2_OUT.

Definition at line 139 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT

IfxGtm_ATOM0_2_TOUT107_P10_5_OUT.

Definition at line 140 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_ATOM0_2_TOUT12_P00_3_OUT.

Definition at line 141 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_ATOM0_2_TOUT2_P02_2_OUT.

Definition at line 142 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_ATOM0_2_TOUT33_P33_11_OUT.

Definition at line 143 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_ATOM0_2_TOUT46_P23_5_OUT.

Definition at line 144 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_ATOM0_2_TOUT55_P21_4_OUT.

Definition at line 145 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_ATOM0_2_TOUT83_P14_3_OUT.

Definition at line 146 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT

IfxGtm_ATOM0_3_TOUT105_P10_3_OUT.

Definition at line 147 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT

IfxGtm_ATOM0_3_TOUT108_P10_6_OUT.

Definition at line 148 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_ATOM0_3_TOUT13_P00_4_OUT.

Definition at line 149 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_ATOM0_3_TOUT38_P32_2_OUT.

Definition at line 150 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_ATOM0_3_TOUT3_P02_3_OUT.

Definition at line 151 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_ATOM0_3_TOUT49_P22_2_OUT.

Definition at line 152 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_ATOM0_3_TOUT56_P21_5_OUT.

Definition at line 153 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_ATOM0_3_TOUT60_P20_1_OUT.

Definition at line 154 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_ATOM0_3_TOUT82_P14_2_OUT.

Definition at line 155 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT

IfxGtm_ATOM0_4_TOUT102_P10_0_OUT.

Definition at line 156 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_ATOM0_4_TOUT14_P00_5_OUT.

Definition at line 157 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_ATOM0_4_TOUT39_P32_3_OUT.

Definition at line 158 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_ATOM0_4_TOUT4_P02_4_OUT.

Definition at line 159 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_ATOM0_4_TOUT50_P22_3_OUT.

Definition at line 160 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_ATOM0_4_TOUT57_P21_6_OUT.

Definition at line 161 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_ATOM0_4_TOUT61_P20_3_OUT.

Definition at line 162 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_ATOM0_4_TOUT81_P14_1_OUT.

Definition at line 163 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT

IfxGtm_ATOM0_5_TOUT110_P10_8_OUT.

Definition at line 164 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_ATOM0_5_TOUT15_P00_6_OUT.

Definition at line 165 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_ATOM0_5_TOUT23_P33_1_OUT.

Definition at line 166 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_ATOM0_5_TOUT40_P32_4_OUT.

Definition at line 167 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_ATOM0_5_TOUT41_P23_0_OUT.

Definition at line 168 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_ATOM0_5_TOUT58_P21_7_OUT.

Definition at line 169 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_ATOM0_5_TOUT5_P02_5_OUT.

Definition at line 170 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_ATOM0_6_TOUT106_P10_4_OUT.

Definition at line 171 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_ATOM0_6_TOUT16_P00_7_OUT.

Definition at line 172 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_ATOM0_6_TOUT24_P33_2_OUT.

Definition at line 173 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_ATOM0_6_TOUT42_P23_1_OUT.

Definition at line 174 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_ATOM0_6_TOUT59_P20_0_OUT.

Definition at line 175 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_ATOM0_6_TOUT6_P02_6_OUT.

Definition at line 176 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_ATOM0_7_TOUT17_P00_8_OUT.

Definition at line 177 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_ATOM0_7_TOUT25_P33_3_OUT.

Definition at line 178 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_ATOM0_7_TOUT45_P23_4_OUT.

Definition at line 179 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_ATOM0_7_TOUT64_P20_8_OUT.

Definition at line 180 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_ATOM0_7_TOUT7_P02_7_OUT.

Definition at line 181 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_ATOM1_0_TOUT0_P02_0_OUT.

Definition at line 182 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_ATOM1_0_TOUT109_P10_7_OUT.

Definition at line 183 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT

IfxGtm_ATOM1_0_TOUT48_P22_1_OUT.

Definition at line 184 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT

IfxGtm_ATOM1_0_TOUT53_P21_2_OUT.

Definition at line 185 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_ATOM1_0_TOUT68_P20_12_OUT.

Definition at line 186 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_ATOM1_0_TOUT76_P15_5_OUT.

Definition at line 187 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_ATOM1_0_TOUT77_P15_6_OUT.

Definition at line 188 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_ATOM1_0_TOUT87_P14_7_OUT.

Definition at line 189 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_ATOM1_0_TOUT8_P02_8_OUT.

Definition at line 190 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_ATOM1_0_TOUT9_P00_0_OUT.

Definition at line 191 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_ATOM1_1_TOUT103_P10_1_OUT.

Definition at line 192 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_ATOM1_1_TOUT10_P00_1_OUT.

Definition at line 193 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_ATOM1_1_TOUT11_P00_2_OUT.

Definition at line 194 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_ATOM1_1_TOUT1_P02_1_OUT.

Definition at line 195 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_ATOM1_1_TOUT31_P33_9_OUT.

Definition at line 196 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT

IfxGtm_ATOM1_1_TOUT47_P22_0_OUT.

Definition at line 197 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT

IfxGtm_ATOM1_1_TOUT54_P21_3_OUT.

Definition at line 198 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_ATOM1_1_TOUT69_P20_13_OUT.

Definition at line 199 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_ATOM1_1_TOUT78_P15_7_OUT.

Definition at line 200 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_ATOM1_1_TOUT79_P15_8_OUT.

Definition at line 201 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_ATOM1_1_TOUT86_P14_6_OUT.

Definition at line 202 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_ATOM1_2_TOUT104_P10_2_OUT.

Definition at line 203 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_ATOM1_2_TOUT107_P10_5_OUT.

Definition at line 204 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_ATOM1_2_TOUT12_P00_3_OUT.

Definition at line 205 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_ATOM1_2_TOUT2_P02_2_OUT.

Definition at line 206 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_ATOM1_2_TOUT33_P33_11_OUT.

Definition at line 207 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT

IfxGtm_ATOM1_2_TOUT46_P23_5_OUT.

Definition at line 208 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT

IfxGtm_ATOM1_2_TOUT55_P21_4_OUT.

Definition at line 209 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_ATOM1_2_TOUT70_P20_14_OUT.

Definition at line 210 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_ATOM1_2_TOUT80_P14_0_OUT.

Definition at line 211 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_ATOM1_3_TOUT105_P10_3_OUT.

Definition at line 212 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_ATOM1_3_TOUT108_P10_6_OUT.

Definition at line 213 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_ATOM1_3_TOUT13_P00_4_OUT.

Definition at line 214 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_ATOM1_3_TOUT38_P32_2_OUT.

Definition at line 215 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_ATOM1_3_TOUT3_P02_3_OUT.

Definition at line 216 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT

IfxGtm_ATOM1_3_TOUT49_P22_2_OUT.

Definition at line 217 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT

IfxGtm_ATOM1_3_TOUT56_P21_5_OUT.

Definition at line 218 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_ATOM1_3_TOUT60_P20_1_OUT.

Definition at line 219 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_ATOM1_3_TOUT71_P15_0_OUT.

Definition at line 220 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_ATOM1_4_TOUT102_P10_0_OUT.

Definition at line 221 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_ATOM1_4_TOUT14_P00_5_OUT.

Definition at line 222 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_ATOM1_4_TOUT39_P32_3_OUT.

Definition at line 223 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_ATOM1_4_TOUT4_P02_4_OUT.

Definition at line 224 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT

IfxGtm_ATOM1_4_TOUT50_P22_3_OUT.

Definition at line 225 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT

IfxGtm_ATOM1_4_TOUT57_P21_6_OUT.

Definition at line 226 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_ATOM1_4_TOUT61_P20_3_OUT.

Definition at line 227 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_ATOM1_4_TOUT72_P15_1_OUT.

Definition at line 228 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_ATOM1_5_TOUT110_P10_8_OUT.

Definition at line 229 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_ATOM1_5_TOUT15_P00_6_OUT.

Definition at line 230 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_ATOM1_5_TOUT23_P33_1_OUT.

Definition at line 231 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_ATOM1_5_TOUT40_P32_4_OUT.

Definition at line 232 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_ATOM1_5_TOUT41_P23_0_OUT.

Definition at line 233 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT

IfxGtm_ATOM1_5_TOUT58_P21_7_OUT.

Definition at line 234 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_ATOM1_5_TOUT5_P02_5_OUT.

Definition at line 235 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_ATOM1_5_TOUT65_P20_9_OUT.

Definition at line 236 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_ATOM1_5_TOUT73_P15_2_OUT.

Definition at line 237 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_ATOM1_6_TOUT106_P10_4_OUT.

Definition at line 238 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_ATOM1_6_TOUT16_P00_7_OUT.

Definition at line 239 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_ATOM1_6_TOUT24_P33_2_OUT.

Definition at line 240 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_ATOM1_6_TOUT42_P23_1_OUT.

Definition at line 241 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT

IfxGtm_ATOM1_6_TOUT59_P20_0_OUT.

Definition at line 242 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_ATOM1_6_TOUT66_P20_10_OUT.

Definition at line 243 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_ATOM1_6_TOUT6_P02_6_OUT.

Definition at line 244 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_ATOM1_6_TOUT74_P15_3_OUT.

Definition at line 245 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_ATOM1_7_TOUT17_P00_8_OUT.

Definition at line 246 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_ATOM1_7_TOUT25_P33_3_OUT.

Definition at line 247 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_ATOM1_7_TOUT45_P23_4_OUT.

Definition at line 248 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_ATOM1_7_TOUT67_P20_11_OUT.

Definition at line 249 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_ATOM1_7_TOUT75_P15_4_OUT.

Definition at line 250 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_ATOM1_7_TOUT7_P02_7_OUT.

Definition at line 251 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_ATOM2_0_TOUT18_P00_9_OUT.

Definition at line 252 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_ATOM2_0_TOUT26_P33_4_OUT.

Definition at line 253 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_ATOM2_0_TOUT32_P33_10_OUT.

Definition at line 254 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT

IfxGtm_ATOM2_0_TOUT68_P20_12_OUT.

Definition at line 255 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_ATOM2_0_TOUT94_P13_3_OUT.

Definition at line 256 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_ATOM2_1_TOUT19_P00_10_OUT.

Definition at line 257 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_ATOM2_1_TOUT27_P33_5_OUT.

Definition at line 258 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_ATOM2_1_TOUT43_P23_2_OUT.

Definition at line 259 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT

IfxGtm_ATOM2_1_TOUT69_P20_13_OUT.

Definition at line 260 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_ATOM2_1_TOUT95_P11_2_OUT.

Definition at line 261 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_ATOM2_2_TOUT20_P00_11_OUT.

Definition at line 262 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_ATOM2_2_TOUT28_P33_6_OUT.

Definition at line 263 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_ATOM2_2_TOUT44_P23_3_OUT.

Definition at line 264 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT

IfxGtm_ATOM2_2_TOUT70_P20_14_OUT.

Definition at line 265 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_ATOM2_2_TOUT88_P14_8_OUT.

Definition at line 266 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_ATOM2_2_TOUT96_P11_3_OUT.

Definition at line 267 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_ATOM2_3_TOUT21_P00_12_OUT.

Definition at line 268 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_ATOM2_3_TOUT29_P33_7_OUT.

Definition at line 269 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT

IfxGtm_ATOM2_3_TOUT71_P15_0_OUT.

Definition at line 270 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_ATOM2_3_TOUT89_P14_9_OUT.

Definition at line 271 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_ATOM2_3_TOUT97_P11_6_OUT.

Definition at line 272 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_ATOM2_4_TOUT22_P33_0_OUT.

Definition at line 273 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_ATOM2_4_TOUT30_P33_8_OUT.

Definition at line 274 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_ATOM2_4_TOUT34_P33_12_OUT.

Definition at line 275 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_ATOM2_4_TOUT51_P21_0_OUT.

Definition at line 276 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT

IfxGtm_ATOM2_4_TOUT72_P15_1_OUT.

Definition at line 277 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_ATOM2_4_TOUT90_P14_10_OUT.

Definition at line 278 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_ATOM2_4_TOUT98_P11_9_OUT.

Definition at line 279 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_ATOM2_5_TOUT35_P33_13_OUT.

Definition at line 280 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_ATOM2_5_TOUT52_P21_1_OUT.

Definition at line 281 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_ATOM2_5_TOUT65_P20_9_OUT.

Definition at line 282 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT

IfxGtm_ATOM2_5_TOUT73_P15_2_OUT.

Definition at line 283 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_ATOM2_5_TOUT91_P13_0_OUT.

Definition at line 284 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_ATOM2_5_TOUT99_P11_10_OUT.

Definition at line 285 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_ATOM2_6_TOUT100_P11_11_OUT.

Definition at line 286 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_ATOM2_6_TOUT36_P32_0_OUT.

Definition at line 287 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_ATOM2_6_TOUT62_P20_6_OUT.

Definition at line 288 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT

IfxGtm_ATOM2_6_TOUT66_P20_10_OUT.

Definition at line 289 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT

IfxGtm_ATOM2_6_TOUT74_P15_3_OUT.

Definition at line 290 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_ATOM2_6_TOUT92_P13_1_OUT.

Definition at line 291 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_ATOM2_7_TOUT101_P11_12_OUT.

Definition at line 292 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_ATOM2_7_TOUT63_P20_7_OUT.

Definition at line 293 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT

IfxGtm_ATOM2_7_TOUT64_P20_8_OUT.

Definition at line 294 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT

IfxGtm_ATOM2_7_TOUT67_P20_11_OUT.

Definition at line 295 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT

IfxGtm_ATOM2_7_TOUT75_P15_4_OUT.

Definition at line 296 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_ATOM2_7_TOUT93_P13_2_OUT.

Definition at line 297 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_ATOM3_0_TOUT18_P00_9_OUT.

Definition at line 298 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_ATOM3_0_TOUT26_P33_4_OUT.

Definition at line 299 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_ATOM3_0_TOUT32_P33_10_OUT.

Definition at line 300 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT

IfxGtm_ATOM3_0_TOUT76_P15_5_OUT.

Definition at line 301 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT

IfxGtm_ATOM3_0_TOUT77_P15_6_OUT.

Definition at line 302 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT

IfxGtm_ATOM3_0_TOUT85_P14_5_OUT.

Definition at line 303 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT

IfxGtm_ATOM3_0_TOUT87_P14_7_OUT.

Definition at line 304 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_ATOM3_0_TOUT94_P13_3_OUT.

Definition at line 305 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_ATOM3_1_TOUT19_P00_10_OUT.

Definition at line 306 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_ATOM3_1_TOUT27_P33_5_OUT.

Definition at line 307 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_ATOM3_1_TOUT43_P23_2_OUT.

Definition at line 308 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT

IfxGtm_ATOM3_1_TOUT78_P15_7_OUT.

Definition at line 309 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT

IfxGtm_ATOM3_1_TOUT79_P15_8_OUT.

Definition at line 310 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT

IfxGtm_ATOM3_1_TOUT84_P14_4_OUT.

Definition at line 311 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT

IfxGtm_ATOM3_1_TOUT86_P14_6_OUT.

Definition at line 312 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_ATOM3_1_TOUT95_P11_2_OUT.

Definition at line 313 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_ATOM3_2_TOUT20_P00_11_OUT.

Definition at line 314 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_ATOM3_2_TOUT28_P33_6_OUT.

Definition at line 315 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_ATOM3_2_TOUT44_P23_3_OUT.

Definition at line 316 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT

IfxGtm_ATOM3_2_TOUT80_P14_0_OUT.

Definition at line 317 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT

IfxGtm_ATOM3_2_TOUT83_P14_3_OUT.

Definition at line 318 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_ATOM3_2_TOUT88_P14_8_OUT.

Definition at line 319 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_ATOM3_2_TOUT96_P11_3_OUT.

Definition at line 320 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_ATOM3_3_TOUT21_P00_12_OUT.

Definition at line 321 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_ATOM3_3_TOUT29_P33_7_OUT.

Definition at line 322 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT

IfxGtm_ATOM3_3_TOUT82_P14_2_OUT.

Definition at line 323 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_ATOM3_3_TOUT89_P14_9_OUT.

Definition at line 324 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_ATOM3_3_TOUT97_P11_6_OUT.

Definition at line 325 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_ATOM3_4_TOUT22_P33_0_OUT.

Definition at line 326 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_ATOM3_4_TOUT30_P33_8_OUT.

Definition at line 327 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_ATOM3_4_TOUT34_P33_12_OUT.

Definition at line 328 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_ATOM3_4_TOUT51_P21_0_OUT.

Definition at line 329 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT

IfxGtm_ATOM3_4_TOUT81_P14_1_OUT.

Definition at line 330 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_ATOM3_4_TOUT90_P14_10_OUT.

Definition at line 331 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_ATOM3_4_TOUT98_P11_9_OUT.

Definition at line 332 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_ATOM3_5_TOUT35_P33_13_OUT.

Definition at line 333 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_ATOM3_5_TOUT52_P21_1_OUT.

Definition at line 334 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_ATOM3_5_TOUT91_P13_0_OUT.

Definition at line 335 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_ATOM3_5_TOUT99_P11_10_OUT.

Definition at line 336 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_ATOM3_6_TOUT100_P11_11_OUT.

Definition at line 337 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_ATOM3_6_TOUT36_P32_0_OUT.

Definition at line 338 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_ATOM3_6_TOUT62_P20_6_OUT.

Definition at line 339 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_ATOM3_6_TOUT92_P13_1_OUT.

Definition at line 340 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_ATOM3_7_TOUT101_P11_12_OUT.

Definition at line 341 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_ATOM3_7_TOUT63_P20_7_OUT.

Definition at line 342 of file IfxGtm_PinMap.h.

◆ IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_ATOM3_7_TOUT93_P13_2_OUT.

Definition at line 343 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK0_P23_1_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT

GTM_CLK0: GTM output.

Definition at line 344 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK1_P32_4_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT

GTM_CLK1: GTM output.

Definition at line 345 of file IfxGtm_PinMap.h.

◆ IfxGtm_CLK2_P11_12_OUT

IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT

GTM_CLK2: GTM output.

Definition at line 346 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN0_P02_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN

IfxGtm_TIM0_0_TIN0_P02_0_IN.

Definition at line 347 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN109_P10_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN

IfxGtm_TIM0_0_TIN109_P10_7_IN.

Definition at line 348 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN18_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN

IfxGtm_TIM0_0_TIN18_P00_9_IN.

Definition at line 349 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN26_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN

IfxGtm_TIM0_0_TIN26_P33_4_IN.

Definition at line 350 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN32_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN

IfxGtm_TIM0_0_TIN32_P33_10_IN.

Definition at line 351 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN34_P33_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN

IfxGtm_TIM0_0_TIN34_P33_12_IN.

Definition at line 352 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN48_P22_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN

IfxGtm_TIM0_0_TIN48_P22_1_IN.

Definition at line 353 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN53_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN

IfxGtm_TIM0_0_TIN53_P21_2_IN.

Definition at line 354 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN77_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN

IfxGtm_TIM0_0_TIN77_P15_6_IN.

Definition at line 355 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN85_P14_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN

IfxGtm_TIM0_0_TIN85_P14_5_IN.

Definition at line 356 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN87_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN

IfxGtm_TIM0_0_TIN87_P14_7_IN.

Definition at line 357 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN8_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN

IfxGtm_TIM0_0_TIN8_P02_8_IN.

Definition at line 358 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_0_TIN9_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN

IfxGtm_TIM0_0_TIN9_P00_0_IN.

Definition at line 359 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN103_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN

IfxGtm_TIM0_1_TIN103_P10_1_IN.

Definition at line 360 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN10_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN

IfxGtm_TIM0_1_TIN10_P00_1_IN.

Definition at line 361 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN11_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN

IfxGtm_TIM0_1_TIN11_P00_2_IN.

Definition at line 362 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN19_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN

IfxGtm_TIM0_1_TIN19_P00_10_IN.

Definition at line 363 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN1_P02_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN

IfxGtm_TIM0_1_TIN1_P02_1_IN.

Definition at line 364 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN27_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN

IfxGtm_TIM0_1_TIN27_P33_5_IN.

Definition at line 365 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN31_P33_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN

IfxGtm_TIM0_1_TIN31_P33_9_IN.

Definition at line 366 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN35_P33_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN

IfxGtm_TIM0_1_TIN35_P33_13_IN.

Definition at line 367 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN47_P22_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN

IfxGtm_TIM0_1_TIN47_P22_0_IN.

Definition at line 368 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN54_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN

IfxGtm_TIM0_1_TIN54_P21_3_IN.

Definition at line 369 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN78_P15_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN

IfxGtm_TIM0_1_TIN78_P15_7_IN.

Definition at line 370 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_1_TIN86_P14_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN

IfxGtm_TIM0_1_TIN86_P14_6_IN.

Definition at line 371 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN104_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN

IfxGtm_TIM0_2_TIN104_P10_2_IN.

Definition at line 372 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN107_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN

IfxGtm_TIM0_2_TIN107_P10_5_IN.

Definition at line 373 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN20_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN

IfxGtm_TIM0_2_TIN20_P00_11_IN.

Definition at line 374 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN28_P33_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN

IfxGtm_TIM0_2_TIN28_P33_6_IN.

Definition at line 375 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN2_P02_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN

IfxGtm_TIM0_2_TIN2_P02_2_IN.

Definition at line 376 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN33_P33_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN

IfxGtm_TIM0_2_TIN33_P33_11_IN.

Definition at line 377 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN36_P32_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN

IfxGtm_TIM0_2_TIN36_P32_0_IN.

Definition at line 378 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN46_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN

IfxGtm_TIM0_2_TIN46_P23_5_IN.

Definition at line 379 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN55_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN

IfxGtm_TIM0_2_TIN55_P21_4_IN.

Definition at line 380 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_2_TIN79_P15_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN

IfxGtm_TIM0_2_TIN79_P15_8_IN.

Definition at line 381 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN105_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN

IfxGtm_TIM0_3_TIN105_P10_3_IN.

Definition at line 382 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN108_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN

IfxGtm_TIM0_3_TIN108_P10_6_IN.

Definition at line 383 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN21_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN

IfxGtm_TIM0_3_TIN21_P00_12_IN.

Definition at line 384 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN29_P33_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN

IfxGtm_TIM0_3_TIN29_P33_7_IN.

Definition at line 385 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN38_P32_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN

IfxGtm_TIM0_3_TIN38_P32_2_IN.

Definition at line 386 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN3_P02_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN

IfxGtm_TIM0_3_TIN3_P02_3_IN.

Definition at line 387 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN49_P22_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN

IfxGtm_TIM0_3_TIN49_P22_2_IN.

Definition at line 388 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN51_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN

IfxGtm_TIM0_3_TIN51_P21_0_IN.

Definition at line 389 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN56_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN

IfxGtm_TIM0_3_TIN56_P21_5_IN.

Definition at line 390 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN60_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN

IfxGtm_TIM0_3_TIN60_P20_1_IN.

Definition at line 391 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_3_TIN80_P14_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN

IfxGtm_TIM0_3_TIN80_P14_0_IN.

Definition at line 392 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN102_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN

IfxGtm_TIM0_4_TIN102_P10_0_IN.

Definition at line 393 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN22_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN

IfxGtm_TIM0_4_TIN22_P33_0_IN.

Definition at line 394 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN30_P33_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN

IfxGtm_TIM0_4_TIN30_P33_8_IN.

Definition at line 395 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN39_P32_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN

IfxGtm_TIM0_4_TIN39_P32_3_IN.

Definition at line 396 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN4_P02_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN

IfxGtm_TIM0_4_TIN4_P02_4_IN.

Definition at line 397 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN50_P22_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN

IfxGtm_TIM0_4_TIN50_P22_3_IN.

Definition at line 398 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN52_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN

IfxGtm_TIM0_4_TIN52_P21_1_IN.

Definition at line 399 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN57_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN

IfxGtm_TIM0_4_TIN57_P21_6_IN.

Definition at line 400 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN61_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN

IfxGtm_TIM0_4_TIN61_P20_3_IN.

Definition at line 401 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_4_TIN81_P14_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN

IfxGtm_TIM0_4_TIN81_P14_1_IN.

Definition at line 402 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN110_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN

IfxGtm_TIM0_5_TIN110_P10_8_IN.

Definition at line 403 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN23_P33_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN

IfxGtm_TIM0_5_TIN23_P33_1_IN.

Definition at line 404 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN40_P32_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN

IfxGtm_TIM0_5_TIN40_P32_4_IN.

Definition at line 405 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN41_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN

IfxGtm_TIM0_5_TIN41_P23_0_IN.

Definition at line 406 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN58_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN

IfxGtm_TIM0_5_TIN58_P21_7_IN.

Definition at line 407 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN5_P02_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN

IfxGtm_TIM0_5_TIN5_P02_5_IN.

Definition at line 408 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_5_TIN82_P14_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN

IfxGtm_TIM0_5_TIN82_P14_2_IN.

Definition at line 409 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN106_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN

IfxGtm_TIM0_6_TIN106_P10_4_IN.

Definition at line 410 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN24_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN

IfxGtm_TIM0_6_TIN24_P33_2_IN.

Definition at line 411 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN42_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN

IfxGtm_TIM0_6_TIN42_P23_1_IN.

Definition at line 412 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN43_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN

IfxGtm_TIM0_6_TIN43_P23_2_IN.

Definition at line 413 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN59_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN

IfxGtm_TIM0_6_TIN59_P20_0_IN.

Definition at line 414 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN62_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN

IfxGtm_TIM0_6_TIN62_P20_6_IN.

Definition at line 415 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_6_TIN83_P14_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN

IfxGtm_TIM0_6_TIN83_P14_3_IN.

Definition at line 416 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN25_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN

IfxGtm_TIM0_7_TIN25_P33_3_IN.

Definition at line 417 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN44_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN

IfxGtm_TIM0_7_TIN44_P23_3_IN.

Definition at line 418 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN45_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN

IfxGtm_TIM0_7_TIN45_P23_4_IN.

Definition at line 419 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN63_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN

IfxGtm_TIM0_7_TIN63_P20_7_IN.

Definition at line 420 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN64_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN

IfxGtm_TIM0_7_TIN64_P20_8_IN.

Definition at line 421 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN7_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN

IfxGtm_TIM0_7_TIN7_P02_7_IN.

Definition at line 422 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM0_7_TIN84_P14_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN

IfxGtm_TIM0_7_TIN84_P14_4_IN.

Definition at line 423 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN0_P02_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN

IfxGtm_TIM1_0_TIN0_P02_0_IN.

Definition at line 424 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN109_P10_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN

IfxGtm_TIM1_0_TIN109_P10_7_IN.

Definition at line 425 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN18_P00_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN

IfxGtm_TIM1_0_TIN18_P00_9_IN.

Definition at line 426 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN26_P33_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN

IfxGtm_TIM1_0_TIN26_P33_4_IN.

Definition at line 427 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN32_P33_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN

IfxGtm_TIM1_0_TIN32_P33_10_IN.

Definition at line 428 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN48_P22_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN

IfxGtm_TIM1_0_TIN48_P22_1_IN.

Definition at line 429 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN53_P21_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN

IfxGtm_TIM1_0_TIN53_P21_2_IN.

Definition at line 430 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN68_P20_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN

IfxGtm_TIM1_0_TIN68_P20_12_IN.

Definition at line 431 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN76_P15_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN

IfxGtm_TIM1_0_TIN76_P15_5_IN.

Definition at line 432 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN77_P15_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN

IfxGtm_TIM1_0_TIN77_P15_6_IN.

Definition at line 433 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN85_P14_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN

IfxGtm_TIM1_0_TIN85_P14_5_IN.

Definition at line 434 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN87_P14_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN

IfxGtm_TIM1_0_TIN87_P14_7_IN.

Definition at line 435 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_0_TIN94_P13_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN

IfxGtm_TIM1_0_TIN94_P13_3_IN.

Definition at line 436 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN103_P10_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN

IfxGtm_TIM1_1_TIN103_P10_1_IN.

Definition at line 437 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN19_P00_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN

IfxGtm_TIM1_1_TIN19_P00_10_IN.

Definition at line 438 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN1_P02_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN

IfxGtm_TIM1_1_TIN1_P02_1_IN.

Definition at line 439 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN27_P33_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN

IfxGtm_TIM1_1_TIN27_P33_5_IN.

Definition at line 440 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN31_P33_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN

IfxGtm_TIM1_1_TIN31_P33_9_IN.

Definition at line 441 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN47_P22_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN

IfxGtm_TIM1_1_TIN47_P22_0_IN.

Definition at line 442 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN54_P21_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN

IfxGtm_TIM1_1_TIN54_P21_3_IN.

Definition at line 443 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN69_P20_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN

IfxGtm_TIM1_1_TIN69_P20_13_IN.

Definition at line 444 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN78_P15_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN

IfxGtm_TIM1_1_TIN78_P15_7_IN.

Definition at line 445 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN86_P14_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN

IfxGtm_TIM1_1_TIN86_P14_6_IN.

Definition at line 446 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_1_TIN95_P11_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN

IfxGtm_TIM1_1_TIN95_P11_2_IN.

Definition at line 447 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN104_P10_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN

IfxGtm_TIM1_2_TIN104_P10_2_IN.

Definition at line 448 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN107_P10_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN

IfxGtm_TIM1_2_TIN107_P10_5_IN.

Definition at line 449 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN12_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN

IfxGtm_TIM1_2_TIN12_P00_3_IN.

Definition at line 450 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN20_P00_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN

IfxGtm_TIM1_2_TIN20_P00_11_IN.

Definition at line 451 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN28_P33_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN

IfxGtm_TIM1_2_TIN28_P33_6_IN.

Definition at line 452 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN2_P02_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN

IfxGtm_TIM1_2_TIN2_P02_2_IN.

Definition at line 453 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN33_P33_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN

IfxGtm_TIM1_2_TIN33_P33_11_IN.

Definition at line 454 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN46_P23_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN

IfxGtm_TIM1_2_TIN46_P23_5_IN.

Definition at line 455 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN55_P21_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN

IfxGtm_TIM1_2_TIN55_P21_4_IN.

Definition at line 456 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN70_P20_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN

IfxGtm_TIM1_2_TIN70_P20_14_IN.

Definition at line 457 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN79_P15_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN

IfxGtm_TIM1_2_TIN79_P15_8_IN.

Definition at line 458 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_2_TIN96_P11_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN

IfxGtm_TIM1_2_TIN96_P11_3_IN.

Definition at line 459 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN105_P10_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN

IfxGtm_TIM1_3_TIN105_P10_3_IN.

Definition at line 460 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN108_P10_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN

IfxGtm_TIM1_3_TIN108_P10_6_IN.

Definition at line 461 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN13_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN

IfxGtm_TIM1_3_TIN13_P00_4_IN.

Definition at line 462 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN21_P00_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN

IfxGtm_TIM1_3_TIN21_P00_12_IN.

Definition at line 463 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN29_P33_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN

IfxGtm_TIM1_3_TIN29_P33_7_IN.

Definition at line 464 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN38_P32_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN

IfxGtm_TIM1_3_TIN38_P32_2_IN.

Definition at line 465 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN3_P02_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN

IfxGtm_TIM1_3_TIN3_P02_3_IN.

Definition at line 466 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN49_P22_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN

IfxGtm_TIM1_3_TIN49_P22_2_IN.

Definition at line 467 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN56_P21_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN

IfxGtm_TIM1_3_TIN56_P21_5_IN.

Definition at line 468 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN71_P15_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN

IfxGtm_TIM1_3_TIN71_P15_0_IN.

Definition at line 469 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN80_P14_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN

IfxGtm_TIM1_3_TIN80_P14_0_IN.

Definition at line 470 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_3_TIN97_P11_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN

IfxGtm_TIM1_3_TIN97_P11_6_IN.

Definition at line 471 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN102_P10_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN

IfxGtm_TIM1_4_TIN102_P10_0_IN.

Definition at line 472 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN14_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN

IfxGtm_TIM1_4_TIN14_P00_5_IN.

Definition at line 473 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN22_P33_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN

IfxGtm_TIM1_4_TIN22_P33_0_IN.

Definition at line 474 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN30_P33_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN

IfxGtm_TIM1_4_TIN30_P33_8_IN.

Definition at line 475 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN39_P32_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN

IfxGtm_TIM1_4_TIN39_P32_3_IN.

Definition at line 476 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN4_P02_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN

IfxGtm_TIM1_4_TIN4_P02_4_IN.

Definition at line 477 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN50_P22_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN

IfxGtm_TIM1_4_TIN50_P22_3_IN.

Definition at line 478 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN57_P21_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN

IfxGtm_TIM1_4_TIN57_P21_6_IN.

Definition at line 479 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN72_P15_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN

IfxGtm_TIM1_4_TIN72_P15_1_IN.

Definition at line 480 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN81_P14_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN

IfxGtm_TIM1_4_TIN81_P14_1_IN.

Definition at line 481 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_4_TIN98_P11_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN

IfxGtm_TIM1_4_TIN98_P11_9_IN.

Definition at line 482 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN110_P10_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN

IfxGtm_TIM1_5_TIN110_P10_8_IN.

Definition at line 483 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN15_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN

IfxGtm_TIM1_5_TIN15_P00_6_IN.

Definition at line 484 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN40_P32_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN

IfxGtm_TIM1_5_TIN40_P32_4_IN.

Definition at line 485 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN41_P23_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN

IfxGtm_TIM1_5_TIN41_P23_0_IN.

Definition at line 486 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN58_P21_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN

IfxGtm_TIM1_5_TIN58_P21_7_IN.

Definition at line 487 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN5_P02_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN

IfxGtm_TIM1_5_TIN5_P02_5_IN.

Definition at line 488 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN65_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN

IfxGtm_TIM1_5_TIN65_P20_9_IN.

Definition at line 489 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN73_P15_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN

IfxGtm_TIM1_5_TIN73_P15_2_IN.

Definition at line 490 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN82_P14_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN

IfxGtm_TIM1_5_TIN82_P14_2_IN.

Definition at line 491 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN91_P13_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN

IfxGtm_TIM1_5_TIN91_P13_0_IN.

Definition at line 492 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_5_TIN99_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN

IfxGtm_TIM1_5_TIN99_P11_10_IN.

Definition at line 493 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN100_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN

IfxGtm_TIM1_6_TIN100_P11_11_IN.

Definition at line 494 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN106_P10_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN

IfxGtm_TIM1_6_TIN106_P10_4_IN.

Definition at line 495 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN16_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN

IfxGtm_TIM1_6_TIN16_P00_7_IN.

Definition at line 496 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN24_P33_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN

IfxGtm_TIM1_6_TIN24_P33_2_IN.

Definition at line 497 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN42_P23_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN

IfxGtm_TIM1_6_TIN42_P23_1_IN.

Definition at line 498 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN43_P23_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN

IfxGtm_TIM1_6_TIN43_P23_2_IN.

Definition at line 499 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN59_P20_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN

IfxGtm_TIM1_6_TIN59_P20_0_IN.

Definition at line 500 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN66_P20_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN

IfxGtm_TIM1_6_TIN66_P20_10_IN.

Definition at line 501 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN6_P02_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN

IfxGtm_TIM1_6_TIN6_P02_6_IN.

Definition at line 502 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN74_P15_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN

IfxGtm_TIM1_6_TIN74_P15_3_IN.

Definition at line 503 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN83_P14_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN

IfxGtm_TIM1_6_TIN83_P14_3_IN.

Definition at line 504 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_6_TIN92_P13_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN

IfxGtm_TIM1_6_TIN92_P13_1_IN.

Definition at line 505 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN101_P11_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN

IfxGtm_TIM1_7_TIN101_P11_12_IN.

Definition at line 506 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN17_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN

IfxGtm_TIM1_7_TIN17_P00_8_IN.

Definition at line 507 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN25_P33_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN

IfxGtm_TIM1_7_TIN25_P33_3_IN.

Definition at line 508 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN44_P23_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN

IfxGtm_TIM1_7_TIN44_P23_3_IN.

Definition at line 509 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN45_P23_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN

IfxGtm_TIM1_7_TIN45_P23_4_IN.

Definition at line 510 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN64_P20_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN

IfxGtm_TIM1_7_TIN64_P20_8_IN.

Definition at line 511 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN67_P20_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN

IfxGtm_TIM1_7_TIN67_P20_11_IN.

Definition at line 512 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN75_P15_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN

IfxGtm_TIM1_7_TIN75_P15_4_IN.

Definition at line 513 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN7_P02_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN

IfxGtm_TIM1_7_TIN7_P02_7_IN.

Definition at line 514 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN84_P14_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN

IfxGtm_TIM1_7_TIN84_P14_4_IN.

Definition at line 515 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM1_7_TIN93_P13_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN

IfxGtm_TIM1_7_TIN93_P13_2_IN.

Definition at line 516 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN34_P33_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN

IfxGtm_TIM2_0_TIN34_P33_12_IN.

Definition at line 517 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN68_P20_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN

IfxGtm_TIM2_0_TIN68_P20_12_IN.

Definition at line 518 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN76_P15_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN

IfxGtm_TIM2_0_TIN76_P15_5_IN.

Definition at line 519 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN8_P02_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN

IfxGtm_TIM2_0_TIN8_P02_8_IN.

Definition at line 520 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN94_P13_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN

IfxGtm_TIM2_0_TIN94_P13_3_IN.

Definition at line 521 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_0_TIN9_P00_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN

IfxGtm_TIM2_0_TIN9_P00_0_IN.

Definition at line 522 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN10_P00_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN

IfxGtm_TIM2_1_TIN10_P00_1_IN.

Definition at line 523 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN11_P00_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN

IfxGtm_TIM2_1_TIN11_P00_2_IN.

Definition at line 524 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN35_P33_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN

IfxGtm_TIM2_1_TIN35_P33_13_IN.

Definition at line 525 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN69_P20_13_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN

IfxGtm_TIM2_1_TIN69_P20_13_IN.

Definition at line 526 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_1_TIN95_P11_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN

IfxGtm_TIM2_1_TIN95_P11_2_IN.

Definition at line 527 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN12_P00_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN

IfxGtm_TIM2_2_TIN12_P00_3_IN.

Definition at line 528 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN36_P32_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN

IfxGtm_TIM2_2_TIN36_P32_0_IN.

Definition at line 529 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN70_P20_14_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN

IfxGtm_TIM2_2_TIN70_P20_14_IN.

Definition at line 530 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN88_P14_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN

IfxGtm_TIM2_2_TIN88_P14_8_IN.

Definition at line 531 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_2_TIN96_P11_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN

IfxGtm_TIM2_2_TIN96_P11_3_IN.

Definition at line 532 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN13_P00_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN

IfxGtm_TIM2_3_TIN13_P00_4_IN.

Definition at line 533 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN60_P20_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN

IfxGtm_TIM2_3_TIN60_P20_1_IN.

Definition at line 534 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN71_P15_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN

IfxGtm_TIM2_3_TIN71_P15_0_IN.

Definition at line 535 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN89_P14_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN

IfxGtm_TIM2_3_TIN89_P14_9_IN.

Definition at line 536 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_3_TIN97_P11_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN

IfxGtm_TIM2_3_TIN97_P11_6_IN.

Definition at line 537 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN14_P00_5_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN

IfxGtm_TIM2_4_TIN14_P00_5_IN.

Definition at line 538 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN51_P21_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN

IfxGtm_TIM2_4_TIN51_P21_0_IN.

Definition at line 539 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN61_P20_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN

IfxGtm_TIM2_4_TIN61_P20_3_IN.

Definition at line 540 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN72_P15_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN

IfxGtm_TIM2_4_TIN72_P15_1_IN.

Definition at line 541 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN90_P14_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN

IfxGtm_TIM2_4_TIN90_P14_10_IN.

Definition at line 542 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_4_TIN98_P11_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN

IfxGtm_TIM2_4_TIN98_P11_9_IN.

Definition at line 543 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN15_P00_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN

IfxGtm_TIM2_5_TIN15_P00_6_IN.

Definition at line 544 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN52_P21_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN

IfxGtm_TIM2_5_TIN52_P21_1_IN.

Definition at line 545 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN65_P20_9_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN

IfxGtm_TIM2_5_TIN65_P20_9_IN.

Definition at line 546 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN73_P15_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN

IfxGtm_TIM2_5_TIN73_P15_2_IN.

Definition at line 547 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN91_P13_0_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN

IfxGtm_TIM2_5_TIN91_P13_0_IN.

Definition at line 548 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_5_TIN99_P11_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN

IfxGtm_TIM2_5_TIN99_P11_10_IN.

Definition at line 549 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN100_P11_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN

IfxGtm_TIM2_6_TIN100_P11_11_IN.

Definition at line 550 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN16_P00_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN

IfxGtm_TIM2_6_TIN16_P00_7_IN.

Definition at line 551 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN62_P20_6_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN

IfxGtm_TIM2_6_TIN62_P20_6_IN.

Definition at line 552 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN66_P20_10_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN

IfxGtm_TIM2_6_TIN66_P20_10_IN.

Definition at line 553 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN74_P15_3_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN

IfxGtm_TIM2_6_TIN74_P15_3_IN.

Definition at line 554 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_6_TIN92_P13_1_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN

IfxGtm_TIM2_6_TIN92_P13_1_IN.

Definition at line 555 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN101_P11_12_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN

IfxGtm_TIM2_7_TIN101_P11_12_IN.

Definition at line 556 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN17_P00_8_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN

IfxGtm_TIM2_7_TIN17_P00_8_IN.

Definition at line 557 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN63_P20_7_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN

IfxGtm_TIM2_7_TIN63_P20_7_IN.

Definition at line 558 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN67_P20_11_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN

IfxGtm_TIM2_7_TIN67_P20_11_IN.

Definition at line 559 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN75_P15_4_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN

IfxGtm_TIM2_7_TIN75_P15_4_IN.

Definition at line 560 of file IfxGtm_PinMap.h.

◆ IfxGtm_TIM2_7_TIN93_P13_2_IN

IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN

IfxGtm_TIM2_7_TIN93_P13_2_IN.

Definition at line 561 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_TOM0_0_TOUT109_P10_7_OUT.

Definition at line 562 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_TOM0_0_TOUT18_P00_9_OUT.

Definition at line 563 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_TOM0_0_TOUT26_P33_4_OUT.

Definition at line 564 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_TOM0_0_TOUT32_P33_10_OUT.

Definition at line 565 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_TOM0_0_TOUT53_P21_2_OUT.

Definition at line 566 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_TOM0_0_TOUT76_P15_5_OUT.

Definition at line 567 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_TOM0_0_TOUT77_P15_6_OUT.

Definition at line 568 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_TOM0_0_TOUT85_P14_5_OUT.

Definition at line 569 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_TOM0_0_TOUT87_P14_7_OUT.

Definition at line 570 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_TOM0_10_TOUT12_P00_3_OUT.

Definition at line 571 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_TOM0_10_TOUT2_P02_2_OUT.

Definition at line 572 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_TOM0_10_TOUT41_P23_0_OUT.

Definition at line 573 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_TOM0_10_TOUT46_P23_5_OUT.

Definition at line 574 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT

IfxGtm_TOM0_10_TOUT62_P20_6_OUT.

Definition at line 575 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT

IfxGtm_TOM0_10_TOUT70_P20_14_OUT.

Definition at line 576 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_TOM0_10_TOUT96_P11_3_OUT.

Definition at line 577 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_TOM0_11_TOUT13_P00_4_OUT.

Definition at line 578 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_TOM0_11_TOUT3_P02_3_OUT.

Definition at line 579 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_TOM0_11_TOUT43_P23_2_OUT.

Definition at line 580 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_TOM0_11_TOUT49_P22_2_OUT.

Definition at line 581 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT

IfxGtm_TOM0_11_TOUT63_P20_7_OUT.

Definition at line 582 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT

IfxGtm_TOM0_11_TOUT71_P15_0_OUT.

Definition at line 583 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_TOM0_11_TOUT97_P11_6_OUT.

Definition at line 584 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_TOM0_12_TOUT14_P00_5_OUT.

Definition at line 585 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT

IfxGtm_TOM0_12_TOUT34_P33_12_OUT.

Definition at line 586 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_TOM0_12_TOUT44_P23_3_OUT.

Definition at line 587 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_TOM0_12_TOUT4_P02_4_OUT.

Definition at line 588 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_TOM0_12_TOUT50_P22_3_OUT.

Definition at line 589 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT

IfxGtm_TOM0_12_TOUT72_P15_1_OUT.

Definition at line 590 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_TOM0_12_TOUT98_P11_9_OUT.

Definition at line 591 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_TOM0_13_TOUT15_P00_6_OUT.

Definition at line 592 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT

IfxGtm_TOM0_13_TOUT35_P33_13_OUT.

Definition at line 593 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_TOM0_13_TOUT5_P02_5_OUT.

Definition at line 594 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT

IfxGtm_TOM0_13_TOUT65_P20_9_OUT.

Definition at line 595 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT

IfxGtm_TOM0_13_TOUT73_P15_2_OUT.

Definition at line 596 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_TOM0_13_TOUT99_P11_10_OUT.

Definition at line 597 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_TOM0_14_TOUT100_P11_11_OUT.

Definition at line 598 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_TOM0_14_TOUT16_P00_7_OUT.

Definition at line 599 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT

IfxGtm_TOM0_14_TOUT36_P32_0_OUT.

Definition at line 600 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT

IfxGtm_TOM0_14_TOUT66_P20_10_OUT.

Definition at line 601 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_TOM0_14_TOUT6_P02_6_OUT.

Definition at line 602 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_14_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT

IfxGtm_TOM0_14_TOUT74_P15_3_OUT.

Definition at line 603 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_TOM0_15_TOUT101_P11_12_OUT.

Definition at line 604 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_TOM0_15_TOUT17_P00_8_OUT.

Definition at line 605 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_TOM0_15_TOUT42_P23_1_OUT.

Definition at line 606 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT

IfxGtm_TOM0_15_TOUT67_P20_11_OUT.

Definition at line 607 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT

IfxGtm_TOM0_15_TOUT75_P15_4_OUT.

Definition at line 608 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_TOM0_15_TOUT7_P02_7_OUT.

Definition at line 609 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_TOM0_1_TOUT103_P10_1_OUT.

Definition at line 610 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_TOM0_1_TOUT19_P00_10_OUT.

Definition at line 611 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_TOM0_1_TOUT27_P33_5_OUT.

Definition at line 612 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_TOM0_1_TOUT31_P33_9_OUT.

Definition at line 613 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_TOM0_1_TOUT54_P21_3_OUT.

Definition at line 614 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_TOM0_1_TOUT78_P15_7_OUT.

Definition at line 615 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_TOM0_1_TOUT86_P14_6_OUT.

Definition at line 616 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_TOM0_2_TOUT104_P10_2_OUT.

Definition at line 617 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_TOM0_2_TOUT107_P10_5_OUT.

Definition at line 618 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_TOM0_2_TOUT20_P00_11_OUT.

Definition at line 619 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_TOM0_2_TOUT28_P33_6_OUT.

Definition at line 620 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_TOM0_2_TOUT33_P33_11_OUT.

Definition at line 621 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_TOM0_2_TOUT55_P21_4_OUT.

Definition at line 622 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_TOM0_2_TOUT79_P15_8_OUT.

Definition at line 623 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_TOM0_2_TOUT88_P14_8_OUT.

Definition at line 624 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_TOM0_3_TOUT105_P10_3_OUT.

Definition at line 625 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_TOM0_3_TOUT108_P10_6_OUT.

Definition at line 626 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_TOM0_3_TOUT21_P00_12_OUT.

Definition at line 627 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_TOM0_3_TOUT29_P33_7_OUT.

Definition at line 628 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_TOM0_3_TOUT38_P32_2_OUT.

Definition at line 629 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_TOM0_3_TOUT56_P21_5_OUT.

Definition at line 630 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT

IfxGtm_TOM0_3_TOUT60_P20_1_OUT.

Definition at line 631 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_TOM0_3_TOUT80_P14_0_OUT.

Definition at line 632 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_TOM0_3_TOUT89_P14_9_OUT.

Definition at line 633 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_TOM0_4_TOUT102_P10_0_OUT.

Definition at line 634 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_TOM0_4_TOUT22_P33_0_OUT.

Definition at line 635 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_TOM0_4_TOUT30_P33_8_OUT.

Definition at line 636 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_TOM0_4_TOUT39_P32_3_OUT.

Definition at line 637 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_TOM0_4_TOUT57_P21_6_OUT.

Definition at line 638 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT

IfxGtm_TOM0_4_TOUT61_P20_3_OUT.

Definition at line 639 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_TOM0_4_TOUT81_P14_1_OUT.

Definition at line 640 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_TOM0_4_TOUT90_P14_10_OUT.

Definition at line 641 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_TOM0_5_TOUT110_P10_8_OUT.

Definition at line 642 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_TOM0_5_TOUT23_P33_1_OUT.

Definition at line 643 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_TOM0_5_TOUT40_P32_4_OUT.

Definition at line 644 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_TOM0_5_TOUT58_P21_7_OUT.

Definition at line 645 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_TOM0_5_TOUT82_P14_2_OUT.

Definition at line 646 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_TOM0_5_TOUT91_P13_0_OUT.

Definition at line 647 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_TOM0_6_TOUT106_P10_4_OUT.

Definition at line 648 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_TOM0_6_TOUT24_P33_2_OUT.

Definition at line 649 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_TOM0_6_TOUT42_P23_1_OUT.

Definition at line 650 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_TOM0_6_TOUT59_P20_0_OUT.

Definition at line 651 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_TOM0_6_TOUT83_P14_3_OUT.

Definition at line 652 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_TOM0_6_TOUT92_P13_1_OUT.

Definition at line 653 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_TOM0_7_TOUT25_P33_3_OUT.

Definition at line 654 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_TOM0_7_TOUT45_P23_4_OUT.

Definition at line 655 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT

IfxGtm_TOM0_7_TOUT64_P20_8_OUT.

Definition at line 656 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_TOM0_7_TOUT84_P14_4_OUT.

Definition at line 657 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_TOM0_7_TOUT93_P13_2_OUT.

Definition at line 658 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_TOM0_8_TOUT0_P02_0_OUT.

Definition at line 659 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_TOM0_8_TOUT48_P22_1_OUT.

Definition at line 660 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_TOM0_8_TOUT51_P21_0_OUT.

Definition at line 661 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT

IfxGtm_TOM0_8_TOUT68_P20_12_OUT.

Definition at line 662 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_TOM0_8_TOUT8_P02_8_OUT.

Definition at line 663 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_TOM0_8_TOUT94_P13_3_OUT.

Definition at line 664 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_TOM0_8_TOUT95_P11_2_OUT.

Definition at line 665 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_TOM0_8_TOUT9_P00_0_OUT.

Definition at line 666 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_TOM0_9_TOUT10_P00_1_OUT.

Definition at line 667 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_TOM0_9_TOUT11_P00_2_OUT.

Definition at line 668 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_TOM0_9_TOUT1_P02_1_OUT.

Definition at line 669 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_TOM0_9_TOUT47_P22_0_OUT.

Definition at line 670 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_TOM0_9_TOUT52_P21_1_OUT.

Definition at line 671 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM0_9_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT

IfxGtm_TOM0_9_TOUT69_P20_13_OUT.

Definition at line 672 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_TOM1_0_TOUT18_P00_9_OUT.

Definition at line 673 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_TOM1_0_TOUT26_P33_4_OUT.

Definition at line 674 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_TOM1_0_TOUT32_P33_10_OUT.

Definition at line 675 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT48_P22_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT

IfxGtm_TOM1_0_TOUT48_P22_1_OUT.

Definition at line 676 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT53_P21_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT

IfxGtm_TOM1_0_TOUT53_P21_2_OUT.

Definition at line 677 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_TOM1_0_TOUT68_P20_12_OUT.

Definition at line 678 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_TOM1_0_TOUT76_P15_5_OUT.

Definition at line 679 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_TOM1_0_TOUT77_P15_6_OUT.

Definition at line 680 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_TOM1_0_TOUT85_P14_5_OUT.

Definition at line 681 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT87_P14_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT

IfxGtm_TOM1_0_TOUT87_P14_7_OUT.

Definition at line 682 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_TOM1_0_TOUT8_P02_8_OUT.

Definition at line 683 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT94_P13_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT

IfxGtm_TOM1_0_TOUT94_P13_3_OUT.

Definition at line 684 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_TOM1_0_TOUT9_P00_0_OUT.

Definition at line 685 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT104_P10_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT

IfxGtm_TOM1_10_TOUT104_P10_2_OUT.

Definition at line 686 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT107_P10_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT

IfxGtm_TOM1_10_TOUT107_P10_5_OUT.

Definition at line 687 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_TOM1_10_TOUT2_P02_2_OUT.

Definition at line 688 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_TOM1_10_TOUT62_P20_6_OUT.

Definition at line 689 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT105_P10_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT

IfxGtm_TOM1_11_TOUT105_P10_3_OUT.

Definition at line 690 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT108_P10_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT

IfxGtm_TOM1_11_TOUT108_P10_6_OUT.

Definition at line 691 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_TOM1_11_TOUT3_P02_3_OUT.

Definition at line 692 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_TOM1_11_TOUT60_P20_1_OUT.

Definition at line 693 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_TOM1_11_TOUT63_P20_7_OUT.

Definition at line 694 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT102_P10_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT

IfxGtm_TOM1_12_TOUT102_P10_0_OUT.

Definition at line 695 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_TOM1_12_TOUT34_P33_12_OUT.

Definition at line 696 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_TOM1_12_TOUT4_P02_4_OUT.

Definition at line 697 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_TOM1_12_TOUT61_P20_3_OUT.

Definition at line 698 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT110_P10_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT

IfxGtm_TOM1_13_TOUT110_P10_8_OUT.

Definition at line 699 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_TOM1_13_TOUT35_P33_13_OUT.

Definition at line 700 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_TOM1_13_TOUT5_P02_5_OUT.

Definition at line 701 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_TOM1_13_TOUT65_P20_9_OUT.

Definition at line 702 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_TOM1_14_TOUT36_P32_0_OUT.

Definition at line 703 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_TOM1_14_TOUT66_P20_10_OUT.

Definition at line 704 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_TOM1_14_TOUT6_P02_6_OUT.

Definition at line 705 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_TOM1_15_TOUT67_P20_11_OUT.

Definition at line 706 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_TOM1_15_TOUT7_P02_7_OUT.

Definition at line 707 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_TOM1_1_TOUT10_P00_1_OUT.

Definition at line 708 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_TOM1_1_TOUT11_P00_2_OUT.

Definition at line 709 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_TOM1_1_TOUT19_P00_10_OUT.

Definition at line 710 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_TOM1_1_TOUT27_P33_5_OUT.

Definition at line 711 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_TOM1_1_TOUT31_P33_9_OUT.

Definition at line 712 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT47_P22_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT

IfxGtm_TOM1_1_TOUT47_P22_0_OUT.

Definition at line 713 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT54_P21_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT

IfxGtm_TOM1_1_TOUT54_P21_3_OUT.

Definition at line 714 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_TOM1_1_TOUT69_P20_13_OUT.

Definition at line 715 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_TOM1_1_TOUT78_P15_7_OUT.

Definition at line 716 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_TOM1_1_TOUT86_P14_6_OUT.

Definition at line 717 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_1_TOUT95_P11_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT

IfxGtm_TOM1_1_TOUT95_P11_2_OUT.

Definition at line 718 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_TOM1_2_TOUT12_P00_3_OUT.

Definition at line 719 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_TOM1_2_TOUT20_P00_11_OUT.

Definition at line 720 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_TOM1_2_TOUT28_P33_6_OUT.

Definition at line 721 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_TOM1_2_TOUT33_P33_11_OUT.

Definition at line 722 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT46_P23_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT

IfxGtm_TOM1_2_TOUT46_P23_5_OUT.

Definition at line 723 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT55_P21_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT

IfxGtm_TOM1_2_TOUT55_P21_4_OUT.

Definition at line 724 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_TOM1_2_TOUT70_P20_14_OUT.

Definition at line 725 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_TOM1_2_TOUT79_P15_8_OUT.

Definition at line 726 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT88_P14_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT

IfxGtm_TOM1_2_TOUT88_P14_8_OUT.

Definition at line 727 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_2_TOUT96_P11_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT

IfxGtm_TOM1_2_TOUT96_P11_3_OUT.

Definition at line 728 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_TOM1_3_TOUT13_P00_4_OUT.

Definition at line 729 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_TOM1_3_TOUT21_P00_12_OUT.

Definition at line 730 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_TOM1_3_TOUT29_P33_7_OUT.

Definition at line 731 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_TOM1_3_TOUT38_P32_2_OUT.

Definition at line 732 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT49_P22_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT

IfxGtm_TOM1_3_TOUT49_P22_2_OUT.

Definition at line 733 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT56_P21_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT

IfxGtm_TOM1_3_TOUT56_P21_5_OUT.

Definition at line 734 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_TOM1_3_TOUT71_P15_0_OUT.

Definition at line 735 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_TOM1_3_TOUT80_P14_0_OUT.

Definition at line 736 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT89_P14_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT

IfxGtm_TOM1_3_TOUT89_P14_9_OUT.

Definition at line 737 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_3_TOUT97_P11_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT

IfxGtm_TOM1_3_TOUT97_P11_6_OUT.

Definition at line 738 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_TOM1_4_TOUT14_P00_5_OUT.

Definition at line 739 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_TOM1_4_TOUT22_P33_0_OUT.

Definition at line 740 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_TOM1_4_TOUT30_P33_8_OUT.

Definition at line 741 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_TOM1_4_TOUT39_P32_3_OUT.

Definition at line 742 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT50_P22_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT

IfxGtm_TOM1_4_TOUT50_P22_3_OUT.

Definition at line 743 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT57_P21_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT

IfxGtm_TOM1_4_TOUT57_P21_6_OUT.

Definition at line 744 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_TOM1_4_TOUT72_P15_1_OUT.

Definition at line 745 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_TOM1_4_TOUT81_P14_1_OUT.

Definition at line 746 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT90_P14_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT

IfxGtm_TOM1_4_TOUT90_P14_10_OUT.

Definition at line 747 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_4_TOUT98_P11_9_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT

IfxGtm_TOM1_4_TOUT98_P11_9_OUT.

Definition at line 748 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_TOM1_5_TOUT15_P00_6_OUT.

Definition at line 749 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_TOM1_5_TOUT23_P33_1_OUT.

Definition at line 750 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_TOM1_5_TOUT40_P32_4_OUT.

Definition at line 751 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_TOM1_5_TOUT41_P23_0_OUT.

Definition at line 752 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT58_P21_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT

IfxGtm_TOM1_5_TOUT58_P21_7_OUT.

Definition at line 753 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_TOM1_5_TOUT73_P15_2_OUT.

Definition at line 754 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_TOM1_5_TOUT82_P14_2_OUT.

Definition at line 755 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT91_P13_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT

IfxGtm_TOM1_5_TOUT91_P13_0_OUT.

Definition at line 756 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_5_TOUT99_P11_10_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT

IfxGtm_TOM1_5_TOUT99_P11_10_OUT.

Definition at line 757 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT100_P11_11_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT

IfxGtm_TOM1_6_TOUT100_P11_11_OUT.

Definition at line 758 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT106_P10_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT

IfxGtm_TOM1_6_TOUT106_P10_4_OUT.

Definition at line 759 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_TOM1_6_TOUT16_P00_7_OUT.

Definition at line 760 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_TOM1_6_TOUT24_P33_2_OUT.

Definition at line 761 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_TOM1_6_TOUT43_P23_2_OUT.

Definition at line 762 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT59_P20_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT

IfxGtm_TOM1_6_TOUT59_P20_0_OUT.

Definition at line 763 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_TOM1_6_TOUT74_P15_3_OUT.

Definition at line 764 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_TOM1_6_TOUT83_P14_3_OUT.

Definition at line 765 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_6_TOUT92_P13_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT

IfxGtm_TOM1_6_TOUT92_P13_1_OUT.

Definition at line 766 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_TOM1_7_TOUT101_P11_12_OUT.

Definition at line 767 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_TOM1_7_TOUT17_P00_8_OUT.

Definition at line 768 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_TOM1_7_TOUT25_P33_3_OUT.

Definition at line 769 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_TOM1_7_TOUT44_P23_3_OUT.

Definition at line 770 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_TOM1_7_TOUT45_P23_4_OUT.

Definition at line 771 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_TOM1_7_TOUT64_P20_8_OUT.

Definition at line 772 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_TOM1_7_TOUT75_P15_4_OUT.

Definition at line 773 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_TOM1_7_TOUT84_P14_4_OUT.

Definition at line 774 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_7_TOUT93_P13_2_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT

IfxGtm_TOM1_7_TOUT93_P13_2_OUT.

Definition at line 775 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_TOM1_8_TOUT0_P02_0_OUT.

Definition at line 776 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT109_P10_7_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT

IfxGtm_TOM1_8_TOUT109_P10_7_OUT.

Definition at line 777 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_8_TOUT51_P21_0_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT

IfxGtm_TOM1_8_TOUT51_P21_0_OUT.

Definition at line 778 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT103_P10_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT

IfxGtm_TOM1_9_TOUT103_P10_1_OUT.

Definition at line 779 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_TOM1_9_TOUT1_P02_1_OUT.

Definition at line 780 of file IfxGtm_PinMap.h.

◆ IfxGtm_TOM1_9_TOUT52_P21_1_OUT

IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT

IfxGtm_TOM1_9_TOUT52_P21_1_OUT.

Definition at line 781 of file IfxGtm_PinMap.h.


iLLD_TC26B: GTM Trigger Configuration

Modules
GTM Trigger Configuration
iLLD » GTM
Collaboration diagram for GTM Trigger Configuration:

Modules

Enumerations
Data Structures
Trigger Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Enumerations:

Enumerations

enum IfxGtm_Trig_AdcGroup {
IfxGtm_Trig_AdcGroup_0,
IfxGtm_Trig_AdcGroup_1,
IfxGtm_Trig_AdcGroup_2,
IfxGtm_Trig_AdcGroup_3,
IfxGtm_Trig_AdcGroup_4
}
Enum for ADC group. More...
enum IfxGtm_Trig_AdcTrig {
IfxGtm_Trig_AdcTrig_0,
IfxGtm_Trig_AdcTrig_1,
IfxGtm_Trig_AdcTrig_count
}
Enum for ADC trigger. More...
enum IfxGtm_Trig_AdcTrigChannel {
IfxGtm_Trig_AdcTrigChannel_4,
IfxGtm_Trig_AdcTrigChannel_5,
IfxGtm_Trig_AdcTrigChannel_6,
IfxGtm_Trig_AdcTrigChannel_7,
IfxGtm_Trig_AdcTrigChannel_13,
IfxGtm_Trig_AdcTrigChannel_14,
IfxGtm_Trig_AdcTrigChannel_15,
IfxGtm_Trig_AdcTrigChannel_count
}
Enum for ADC trigger channel. More...
enum IfxGtm_Trig_AdcTrigSource {
IfxGtm_Trig_AdcTrigSource_atom0,
IfxGtm_Trig_AdcTrigSource_atom1,
IfxGtm_Trig_AdcTrigSource_atom2,
IfxGtm_Trig_AdcTrigSource_atom3,
IfxGtm_Trig_AdcTrigSource_tom0,
IfxGtm_Trig_AdcTrigSource_tom1,
IfxGtm_Trig_AdcTrigSource_count
}
Enum for ADC trigger source. More...
enum IfxGtm_Trig_DsadcTrig {
IfxGtm_Trig_DsadcTrig_0,
IfxGtm_Trig_DsadcTrig_1
}
Enum for DSADC trigger. More...
enum IfxGtm_Trig_DsadcTrigSource {
IfxGtm_Trig_DsadcTrigSource_tomX_6,
IfxGtm_Trig_DsadcTrigSource_tomX_7,
IfxGtm_Trig_DsadcTrigSource_tomX_13,
IfxGtm_Trig_DsadcTrigSource_tomX_14,
IfxGtm_Trig_DsadcTrigSource_atomX_4,
IfxGtm_Trig_DsadcTrigSource_atomX_5,
IfxGtm_Trig_DsadcTrigSource_atomX_6,
IfxGtm_Trig_DsadcTrigSource_atomX_7
}
Enum for DSADC trigger source. More...
enum IfxGtm_Trig_SentGroup {
IfxGtm_Trig_SentGroup_0,
IfxGtm_Trig_SentGroup_1,
IfxGtm_Trig_SentGroup_2,
IfxGtm_Trig_SentGroup_3,
IfxGtm_Trig_SentGroup_4,
IfxGtm_Trig_SentGroup_5
}
Enum for SENT group. More...
enum IfxGtm_Trig_SentTrig { IfxGtm_Trig_SentTrig_0 }
Enum for SENT trigger. More...
enum IfxGtm_Trig_SentTrigChannel {
IfxGtm_Trig_SentTrigChannel_4,
IfxGtm_Trig_SentTrigChannel_5,
IfxGtm_Trig_SentTrigChannel_6,
IfxGtm_Trig_SentTrigChannel_7,
IfxGtm_Trig_SentTrigChannel_13,
IfxGtm_Trig_SentTrigChannel_14,
IfxGtm_Trig_SentTrigChannel_15,
IfxGtm_Trig_SentTrigChannel_count
}
Enum for SENT trigger channel. More...
enum IfxGtm_Trig_SentTrigSource {
IfxGtm_Trig_SentTrigSource_atom0,
IfxGtm_Trig_SentTrigSource_atom1,
IfxGtm_Trig_SentTrigSource_atom2,
IfxGtm_Trig_SentTrigSource_atom3,
IfxGtm_Trig_SentTrigSource_tom0,
IfxGtm_Trig_SentTrigSource_tom1,
IfxGtm_Trig_SentTrigSource_count
}
Enum for SENT trigger source. More...

Detailed Description

Enumeration Type Documentation

◆ IfxGtm_Trig_AdcGroup

enum IfxGtm_Trig_AdcGroup

Enum for ADC group.

Enumerator
IfxGtm_Trig_AdcGroup_0 | For ADC group 0.
IfxGtm_Trig_AdcGroup_1 | For ADC group 1.
IfxGtm_Trig_AdcGroup_2 | For ADC group 2.
IfxGtm_Trig_AdcGroup_3 | For ADC group 3.
IfxGtm_Trig_AdcGroup_4 | For ADC group 4.

Definition at line 53 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrig

enum IfxGtm_Trig_AdcTrig

Enum for ADC trigger.

Enumerator
IfxGtm_Trig_AdcTrig_0 |
IfxGtm_Trig_AdcTrig_1 |
IfxGtm_Trig_AdcTrig_count | count of the enum definition

Definition at line 64 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrigChannel

enum IfxGtm_Trig_AdcTrigChannel

Enum for ADC trigger channel.

Enumerator
IfxGtm_Trig_AdcTrigChannel_4 |
IfxGtm_Trig_AdcTrigChannel_5 |
IfxGtm_Trig_AdcTrigChannel_6 |
IfxGtm_Trig_AdcTrigChannel_7 |
IfxGtm_Trig_AdcTrigChannel_13 |
IfxGtm_Trig_AdcTrigChannel_14 |
IfxGtm_Trig_AdcTrigChannel_15 |
IfxGtm_Trig_AdcTrigChannel_count | count of the enum definition

Definition at line 73 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_AdcTrigSource

enum IfxGtm_Trig_AdcTrigSource

Enum for ADC trigger source.

Enumerator
IfxGtm_Trig_AdcTrigSource_atom0 |
IfxGtm_Trig_AdcTrigSource_atom1 |
IfxGtm_Trig_AdcTrigSource_atom2 |
IfxGtm_Trig_AdcTrigSource_atom3 |
IfxGtm_Trig_AdcTrigSource_tom0 |
IfxGtm_Trig_AdcTrigSource_tom1 |
IfxGtm_Trig_AdcTrigSource_count | count of the enum definition

Definition at line 87 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_DsadcTrig

enum IfxGtm_Trig_DsadcTrig

Enum for DSADC trigger.

Enumerator
IfxGtm_Trig_DsadcTrig_0
IfxGtm_Trig_DsadcTrig_1

Definition at line 100 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_DsadcTrigSource

enum IfxGtm_Trig_DsadcTrigSource

Enum for DSADC trigger source.

Enumerator
IfxGtm_Trig_DsadcTrigSource_tomX_6
IfxGtm_Trig_DsadcTrigSource_tomX_7
IfxGtm_Trig_DsadcTrigSource_tomX_13
IfxGtm_Trig_DsadcTrigSource_tomX_14
IfxGtm_Trig_DsadcTrigSource_atomX_4
IfxGtm_Trig_DsadcTrigSource_atomX_5
IfxGtm_Trig_DsadcTrigSource_atomX_6
IfxGtm_Trig_DsadcTrigSource_atomX_7

Definition at line 108 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentGroup

enum IfxGtm_Trig_SentGroup

Enum for SENT group.

Enumerator
IfxGtm_Trig_SentGroup_0 | For SENT group 0.
IfxGtm_Trig_SentGroup_1 | For SENT group 1.
IfxGtm_Trig_SentGroup_2 | For SENT group 2.
IfxGtm_Trig_SentGroup_3 | For SENT group 3.
IfxGtm_Trig_SentGroup_4 | For SENT group 4.
IfxGtm_Trig_SentGroup_5 | For SENT group 5.

Definition at line 122 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrig

enum IfxGtm_Trig_SentTrig

Enum for SENT trigger.

Enumerator
IfxGtm_Trig_SentTrig_0

sent trigger 0

Definition at line 134 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrigChannel

enum IfxGtm_Trig_SentTrigChannel

Enum for SENT trigger channel.

Enumerator
IfxGtm_Trig_SentTrigChannel_4 |
IfxGtm_Trig_SentTrigChannel_5 |
IfxGtm_Trig_SentTrigChannel_6 |
IfxGtm_Trig_SentTrigChannel_7 |
IfxGtm_Trig_SentTrigChannel_13 |
IfxGtm_Trig_SentTrigChannel_14 |
IfxGtm_Trig_SentTrigChannel_15 |
IfxGtm_Trig_SentTrigChannel_count | count of the enum definition

Definition at line 141 of file IfxGtm_Trig.h.

◆ IfxGtm_Trig_SentTrigSource

enum IfxGtm_Trig_SentTrigSource

Enum for SENT trigger source.

Enumerator
IfxGtm_Trig_SentTrigSource_atom0 |
IfxGtm_Trig_SentTrigSource_atom1 |
IfxGtm_Trig_SentTrigSource_atom2 |
IfxGtm_Trig_SentTrigSource_atom3 |
IfxGtm_Trig_SentTrigSource_tom0 |
IfxGtm_Trig_SentTrigSource_tom1 |
IfxGtm_Trig_SentTrigSource_count | count of the enum definition

Definition at line 155 of file IfxGtm_Trig.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Data Structures:

Data Structures

struct | IfxGtm_Trig_Channel
struct | IfxGtm_Trig_Source
struct | IfxGtm_Trig_Trigger
struct | IfxGtm_Trig_AdcTrig_Table

Detailed Description

Data Structure Documentation

◆ IfxGtm_Trig_Channel

struct IfxGtm_Trig_Channel

Definition at line 39 of file IfxGtm_Trig.c.

Data Fields
sint8 config Value for SEL0/1. config=0xFF means "not available".

◆ IfxGtm_Trig_Source

struct IfxGtm_Trig_Source

Definition at line 48 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_Source:
[legend]
Data Fields
IfxGtm_Trig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count]

◆ IfxGtm_Trig_Trigger

struct IfxGtm_Trig_Trigger

Definition at line 57 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_Trigger:
[legend]
Data Fields
IfxGtm_Trig_Source source[IfxGtm_Trig_AdcTrigSource_count]

◆ IfxGtm_Trig_AdcTrig_Table

struct IfxGtm_Trig_AdcTrig_Table

Definition at line 66 of file IfxGtm_Trig.c.

Collaboration diagram for IfxGtm_Trig_AdcTrig_Table:
[legend]
Data Fields
IfxGtm_Trig_Trigger trigger[IfxGtm_Trig_AdcTrig_count]


iLLD_TC26B: Trigger Functions

Functions
Trigger Functions
iLLD » GTM » GTM Trigger Configuration
Collaboration diagram for Trigger Functions:

Functions

IFX_EXTERN boolean | IfxGtm_Trig_fromDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
IFX_EXTERN void | IfxGtm_Trig_toDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
IFX_EXTERN boolean | IfxGtm_Trig_toVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
IFX_EXTERN boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Detailed Description

Function Documentation

◆ IfxGtm_Trig_fromDsadc()

IFX_EXTERN boolean IfxGtm_Trig_fromDsadc | ( | Ifx_GTM * | gtm,
 |  | uint32 | dsadcChannel,
 |  | IfxGtm_Tim | tim,
 |  | IfxGtm_Tim_Ch | timChannel
 | ) |  |
Parameters
gtm | Pointer to GTM module
dsadcChannel | DSADC channel
tim | TIM object
timChannel | TIM channel
Returns
TRUE on success else FALSE

Definition at line 157 of file IfxGtm_Trig.c.

Referenced by IfxDsadc_Rdc_initHwTimestamp().

◆ IfxGtm_Trig_toDsadc()

IFX_EXTERN void IfxGtm_Trig_toDsadc | ( | Ifx_GTM * | gtm,
 |  | uint32 | dsadcChannel,
 |  | IfxGtm_Trig_DsadcTrig | dsadcTrig,
 |  | IfxGtm_Trig_DsadcTrigSource | sel
 | ) |  |
Parameters
gtm | Pointer to GTM module
dsadcChannel | DSADC channel
dsadcTrig | DSADC trigger
sel | DSADC trigger source
Returns
None

Definition at line 171 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toSent()

IFX_EXTERN boolean IfxGtm_Trig_toSent | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_SentGroup | sentGroup,
 |  | IfxGtm_Trig_SentTrig | sentTrig,
 |  | IfxGtm_Trig_SentTrigSource | source,
 |  | IfxGtm_Trig_SentTrigChannel | channel
 | ) |  |
Parameters
gtm | Pointer to GTM module
sentGroup | SENT group
sentTrig | SENT trigger
source | SENT trigger source
channel | SENT trigger channel
Returns
TRUE on success else FALSE

Definition at line 239 of file IfxGtm_Trig.c.

◆ IfxGtm_Trig_toVadc()

IFX_EXTERN boolean IfxGtm_Trig_toVadc | ( | Ifx_GTM * | gtm,
 |  | IfxGtm_Trig_AdcGroup | adcGroup,
 |  | IfxGtm_Trig_AdcTrig | adcTrig,
 |  | IfxGtm_Trig_AdcTrigSource | source,
 |  | IfxGtm_Trig_AdcTrigChannel | channel
 | ) |  |
Parameters
gtm | Pointer to GTM module
adcGroup | ADC group
adcTrig | ADC trigger
source | ADC trigger source
channel | ADC trigger channel
Returns
TRUE on success else FALSE

Definition at line 189 of file IfxGtm_Trig.c.


iLLD_TC26B: IfxGtm_cfg.h File Reference

  • _Impl
Data Structures | Macros | Typedefs | Enumerations
IfxGtm_cfg.h File Reference
iLLD » GTM

GTM on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Ifx_Cfg.h"
#include "IfxGtm_reg.h"
#include "Port/Std/IfxPort.h"
Include dependency graph for IfxGtm_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxGtm_Tom_TGC
TOM TGC objects. More...

Macros

#define | IFXGTM_CMU_CLKEN_CLK0 (0x00000002)
Mask for CMU_CLK_EN register (Enable): CLK0. More...
#define | IFXGTM_CMU_CLKEN_CLK1 (0x00000008)
Mask for CMU_CLK_EN register (Enable): CLK1. More...
#define | IFXGTM_CMU_CLKEN_CLK2 (0x00000020)
Mask for CMU_CLK_EN register (Enable): CLK2. More...
#define | IFXGTM_CMU_CLKEN_CLK3 (0x00000080)
Mask for CMU_CLK_EN register (Enable): CLK3. More...
#define | IFXGTM_CMU_CLKEN_CLK4 (0x00000200)
Mask for CMU_CLK_EN register (Enable): CLK4. More...
#define | IFXGTM_CMU_CLKEN_CLK5 (0x00000800)
Mask for CMU_CLK_EN register (Enable): CLK5. More...
#define | IFXGTM_CMU_CLKEN_CLK6 (0x00002000)
Mask for CMU_CLK_EN register (Enable): CLK6. More...
#define | IFXGTM_CMU_CLKEN_CLK7 (0x00008000)
Mask for CMU_CLK_EN register (Enable): CLK7. More...
#define | IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)
Mask for CMU_CLK_EN register (Enable): ECLK0. More...
#define | IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)
Mask for CMU_CLK_EN register (Enable): ECLK1. More...
#define | IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)
Mask for CMU_CLK_EN register (Enable): ECLK2. More...
#define | IFXGTM_CMU_CLKEN_FXCLK (0x00800000)
Mask for CMU_CLK_EN register (Enable): FXCLK. More...
#define | IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)
Mask for CMU_CLK_EN register (Enable): ALL clocks. More...
#define | IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)
Mask for CMU_CLK_EN register (Disable): CLK0. More...
#define | IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)
Mask for CMU_CLK_EN register (Disable): CLK1. More...
#define | IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)
Mask for CMU_CLK_EN register (Disable): CLK2. More...
#define | IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)
Mask for CMU_CLK_EN register (Disable): CLK3. More...
#define | IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)
Mask for CMU_CLK_EN register (Disable): CLK4. More...
#define | IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)
Mask for CMU_CLK_EN register (Disable): CLK5. More...
#define | IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)
Mask for CMU_CLK_EN register (Disable): CLK6. More...
#define | IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)
Mask for CMU_CLK_EN register (Disable): CLK7. More...
#define | IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)
Mask for CMU_CLK_EN register (Disable): ECLK0. More...
#define | IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)
Mask for CMU_CLK_EN register (Disable): ECLK1. More...
#define | IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)
Mask for CMU_CLK_EN register (Disable): ECLK2. More...
#define | IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)
Mask for CMU_CLK_EN register (Disable): FXCLK. More...
#define | IFXGTM_CMU_CLKDIS_ALL (0x00555555)
Mask for CMU_CLK_EN register (Disable): ALL clocks. More...
#define | IFXGTM_NUM_ATOM_OBJECTS (4)
#define | IFXGTM_NUM_TOM_OBJECTS (2)
#define | IFXGTM_NUM_ATOM_CHANNELS (8)
#define | IFXGTM_NUM_TOM_CHANNELS (16)
#define | IFXGTM_NUM_MODULES (1)
#define | IFXGTM_NUM_TIM_CHANNELS (8)
number of TIM channels. More...

Typedefs

typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC

Enumerations

enum IfxGtm_Atom {
IfxGtm_Atom_0,
IfxGtm_Atom_1,
IfxGtm_Atom_2,
IfxGtm_Atom_3
}
Enum for ATOM objects. More...
enum IfxGtm_Atom_Ch {
IfxGtm_Atom_Ch_none = -1,
IfxGtm_Atom_Ch_0,
IfxGtm_Atom_Ch_1,
IfxGtm_Atom_Ch_2,
IfxGtm_Atom_Ch_3,
IfxGtm_Atom_Ch_4,
IfxGtm_Atom_Ch_5,
IfxGtm_Atom_Ch_6,
IfxGtm_Atom_Ch_7
}
Enum for ATOM channels. More...
enum IfxGtm_Dpll_SubInc {
IfxGtm_Dpll_SubInc_1 = 0,
IfxGtm_Dpll_SubInc_2
}
Enum for Dpll subincrements. More...
enum IfxGtm_FeatureControl {
IfxGtm_FeatureControl_disabled = 0,
IfxGtm_FeatureControl_disable = 1,
IfxGtm_FeatureControl_enable = 2,
IfxGtm_FeatureControl_enabled = 3
}
Enum Enable disable feature control. More...
enum IfxGtm_Tim {
IfxGtm_Tim_0,
IfxGtm_Tim_1,
IfxGtm_Tim_2
}
Enum for TIM objects. More...
enum IfxGtm_Tim_Ch {
IfxGtm_Tim_Ch_0,
IfxGtm_Tim_Ch_1,
IfxGtm_Tim_Ch_2,
IfxGtm_Tim_Ch_3,
IfxGtm_Tim_Ch_4,
IfxGtm_Tim_Ch_5,
IfxGtm_Tim_Ch_6,
IfxGtm_Tim_Ch_7
}
Enum for TIM channels. More...
enum IfxGtm_Tom {
IfxGtm_Tom_0,
IfxGtm_Tom_1
}
Enum for TOM objects. More...
enum IfxGtm_Tom_Ch {
IfxGtm_Tom_Ch_none = -1,
IfxGtm_Tom_Ch_0,
IfxGtm_Tom_Ch_1,
IfxGtm_Tom_Ch_2,
IfxGtm_Tom_Ch_3,
IfxGtm_Tom_Ch_4,
IfxGtm_Tom_Ch_5,
IfxGtm_Tom_Ch_6,
IfxGtm_Tom_Ch_7,
IfxGtm_Tom_Ch_8,
IfxGtm_Tom_Ch_9,
IfxGtm_Tom_Ch_10,
IfxGtm_Tom_Ch_11,
IfxGtm_Tom_Ch_12,
IfxGtm_Tom_Ch_13,
IfxGtm_Tom_Ch_14,
IfxGtm_Tom_Ch_15
}
Enum for TOM channels. More...
enum IfxGtm_Tom_Tgc {
IfxGtm_Tom_Tgc_0,
IfxGtm_Tom_Tgc_1
}
Enum for TOM global channel control units. More...

Detailed Description

GTM on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_cfg.h.

Macro Definition Documentation

◆ IFXGTM_CMU_CLKDIS_ALL

#define IFXGTM_CMU_CLKDIS_ALL (0x00555555)

Mask for CMU_CLK_EN register (Disable): ALL clocks.

Definition at line 160 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK0

#define IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)

Mask for CMU_CLK_EN register (Disable): CLK0.

Definition at line 112 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK1

#define IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)

Mask for CMU_CLK_EN register (Disable): CLK1.

Definition at line 116 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK2

#define IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)

Mask for CMU_CLK_EN register (Disable): CLK2.

Definition at line 120 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK3

#define IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)

Mask for CMU_CLK_EN register (Disable): CLK3.

Definition at line 124 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK4

#define IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)

Mask for CMU_CLK_EN register (Disable): CLK4.

Definition at line 128 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK5

#define IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)

Mask for CMU_CLK_EN register (Disable): CLK5.

Definition at line 132 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK6

#define IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)

Mask for CMU_CLK_EN register (Disable): CLK6.

Definition at line 136 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_CLK7

#define IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)

Mask for CMU_CLK_EN register (Disable): CLK7.

Definition at line 140 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK0

#define IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)

Mask for CMU_CLK_EN register (Disable): ECLK0.

Definition at line 144 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK1

#define IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)

Mask for CMU_CLK_EN register (Disable): ECLK1.

Definition at line 148 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_ECLK2

#define IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)

Mask for CMU_CLK_EN register (Disable): ECLK2.

Definition at line 152 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKDIS_FXCLK

#define IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)

Mask for CMU_CLK_EN register (Disable): FXCLK.

Definition at line 156 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ALL

#define IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)

Mask for CMU_CLK_EN register (Enable): ALL clocks.

Definition at line 108 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK0

#define IFXGTM_CMU_CLKEN_CLK0 (0x00000002)

Mask for CMU_CLK_EN register (Enable): CLK0.

Definition at line 60 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK1

#define IFXGTM_CMU_CLKEN_CLK1 (0x00000008)

Mask for CMU_CLK_EN register (Enable): CLK1.

Definition at line 64 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK2

#define IFXGTM_CMU_CLKEN_CLK2 (0x00000020)

Mask for CMU_CLK_EN register (Enable): CLK2.

Definition at line 68 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK3

#define IFXGTM_CMU_CLKEN_CLK3 (0x00000080)

Mask for CMU_CLK_EN register (Enable): CLK3.

Definition at line 72 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK4

#define IFXGTM_CMU_CLKEN_CLK4 (0x00000200)

Mask for CMU_CLK_EN register (Enable): CLK4.

Definition at line 76 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK5

#define IFXGTM_CMU_CLKEN_CLK5 (0x00000800)

Mask for CMU_CLK_EN register (Enable): CLK5.

Definition at line 80 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK6

#define IFXGTM_CMU_CLKEN_CLK6 (0x00002000)

Mask for CMU_CLK_EN register (Enable): CLK6.

Definition at line 84 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_CLK7

#define IFXGTM_CMU_CLKEN_CLK7 (0x00008000)

Mask for CMU_CLK_EN register (Enable): CLK7.

Definition at line 88 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK0

#define IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)

Mask for CMU_CLK_EN register (Enable): ECLK0.

Definition at line 92 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK1

#define IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)

Mask for CMU_CLK_EN register (Enable): ECLK1.

Definition at line 96 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_ECLK2

#define IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)

Mask for CMU_CLK_EN register (Enable): ECLK2.

Definition at line 100 of file IfxGtm_cfg.h.

◆ IFXGTM_CMU_CLKEN_FXCLK

#define IFXGTM_CMU_CLKEN_FXCLK (0x00800000)

Mask for CMU_CLK_EN register (Enable): FXCLK.

Definition at line 104 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_ATOM_CHANNELS

#define IFXGTM_NUM_ATOM_CHANNELS (8)

Definition at line 168 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_ATOM_OBJECTS

#define IFXGTM_NUM_ATOM_OBJECTS (4)

Definition at line 164 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_MODULES

#define IFXGTM_NUM_MODULES (1)

Definition at line 172 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TIM_CHANNELS

#define IFXGTM_NUM_TIM_CHANNELS (8)

number of TIM channels.

Definition at line 176 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TOM_CHANNELS

#define IFXGTM_NUM_TOM_CHANNELS (16)

Definition at line 170 of file IfxGtm_cfg.h.

◆ IFXGTM_NUM_TOM_OBJECTS

#define IFXGTM_NUM_TOM_OBJECTS (2)

Definition at line 166 of file IfxGtm_cfg.h.

Typedef Documentation

◆ Ifx_GTM_TOM_TGC

typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC

Definition at line 182 of file IfxGtm_cfg.h.


iLLD_TC26B: IfxGtm_PinMap.c File Reference

  • _PinMap
Functions | Variables
IfxGtm_PinMap.c File Reference
iLLD » GTM

GTM I/O map. More...

#include "IfxGtm_PinMap.h"
#include "IfxGtm_bf.h"
Include dependency graph for IfxGtm_PinMap.c:

Go to the source code of this file.

Functions

void | IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
void | IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
void | IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Atom_ToutMap | IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Clk_Out | IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4}
IfxGtm_Clk_Out | IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4}
IfxGtm_Clk_Out | IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN109_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN18_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN26_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN32_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN34_P33_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN48_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN53_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN77_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN85_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN87_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN8_P02_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_0_TIN9_P00_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)13}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN103_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN10_P00_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN11_P00_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN19_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN27_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN31_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN35_P33_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN47_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN54_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN78_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_1_TIN86_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN104_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN107_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN20_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN28_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN33_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN36_P32_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN46_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN55_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_2_TIN79_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN105_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN108_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN21_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN29_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN38_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN49_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN51_P21_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN56_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN60_P20_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_3_TIN80_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN102_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN22_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN30_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN39_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN50_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN52_P21_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 1}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN57_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN61_P20_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_4_TIN81_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN110_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN23_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN40_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN41_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN58_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_5_TIN82_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN106_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN24_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN42_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN43_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN59_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN62_P20_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_6_TIN83_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN25_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN44_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN45_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN63_P20_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN64_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM0_7_TIN84_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN109_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)14}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN18_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN26_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN32_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN48_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN53_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN68_P20_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)15}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN76_P15_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN77_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN85_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN87_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)13}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_0_TIN94_P13_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN103_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN19_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)14}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN27_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN31_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN47_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN54_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN69_P20_13_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN78_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN86_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_1_TIN95_P11_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN104_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN107_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN12_P00_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN20_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)14}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN28_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN33_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN46_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)15}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN55_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN70_P20_14_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN79_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_2_TIN96_P11_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN105_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN108_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN13_P00_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN21_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN29_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN38_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN49_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN56_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN71_P15_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)10}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN80_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_3_TIN97_P11_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN102_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN14_P00_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN22_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN30_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN39_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN50_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN57_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN72_P15_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN81_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_4_TIN98_P11_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN110_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN15_P00_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN40_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN41_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN58_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN65_P20_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN73_P15_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN82_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN91_P13_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_5_TIN99_P11_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN100_P11_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN106_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN16_P00_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN24_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN42_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN43_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN59_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN66_P20_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN74_P15_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN83_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_6_TIN92_P13_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)13}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN101_P11_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)12}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN17_P00_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN25_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN44_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN45_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN64_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN67_P20_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)8}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN75_P15_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)7}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN84_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM1_7_TIN93_P13_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)9}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN34_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN68_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN76_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN8_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN94_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_0_TIN9_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN10_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN11_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN35_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN69_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_1_TIN95_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN12_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN36_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN70_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN88_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_2_TIN96_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN13_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN60_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN71_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN89_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_3_TIN97_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN14_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN51_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN61_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN72_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN90_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_4_TIN98_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN15_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN52_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN65_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN73_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN91_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_5_TIN99_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN100_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN16_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN62_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN66_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN74_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_6_TIN92_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN101_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN17_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN63_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN67_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN75_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4}
IfxGtm_Tim_TinMap | IfxGtm_TIM2_7_TIN93_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM0_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}
IfxGtm_Tom_ToutMap | IfxGtm_TOM1_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Detailed Description

GTM I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_PinMap.c.

Variable Documentation

◆ IfxGtm_ATOM0_0_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 28 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 29 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT48_P22_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 30 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 31 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 32 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 33 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_0_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 34 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 35 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 36 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 37 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 38 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 39 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT47_P22_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 40 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 41 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_1_TOUT84_P14_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 42 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 43 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 44 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 45 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 46 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 47 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 48 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 49 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_2_TOUT83_P14_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 50 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 51 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 52 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 53 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT38_P32_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 54 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 55 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT49_P22_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 56 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 57 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 58 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_3_TOUT82_P14_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 59 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 60 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 61 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 62 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 63 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 64 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 65 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 66 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_4_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 67 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 68 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 69 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 70 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 71 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 72 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 73 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_5_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 74 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 75 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 76 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 77 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 78 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 79 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_6_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 80 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 81 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 82 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 83 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 84 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM0_7_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 85 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT0_P02_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 86 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT109_P10_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 87 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT48_P22_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 88 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT53_P21_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 89 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT68_P20_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 90 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 91 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 92 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 93 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT8_P02_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 94 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_0_TOUT9_P00_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 95 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT103_P10_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 96 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT10_P00_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 97 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT11_P00_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 98 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT1_P02_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 99 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT31_P33_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 100 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT47_P22_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 101 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT54_P21_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 102 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT69_P20_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 103 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 104 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 105 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_1_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 106 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT104_P10_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 107 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT107_P10_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 108 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT12_P00_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 109 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT2_P02_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 110 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT33_P33_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 111 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT46_P23_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 112 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT55_P21_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 113 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT70_P20_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 114 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_2_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 115 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT105_P10_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 116 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT108_P10_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 117 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT13_P00_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 118 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT38_P32_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 119 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT3_P02_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 120 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT49_P22_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 121 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT56_P21_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 122 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT60_P20_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 123 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_3_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 124 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT102_P10_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 125 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT14_P00_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 126 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT39_P32_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 127 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT4_P02_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 128 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT50_P22_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 129 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT57_P21_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 130 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT61_P20_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 131 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_4_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 132 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT110_P10_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 133 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT15_P00_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 134 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT23_P33_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 135 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT40_P32_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 136 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT41_P23_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 137 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT58_P21_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 138 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT5_P02_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 139 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 140 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_5_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 141 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT106_P10_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 142 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT16_P00_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 143 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT24_P33_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 144 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT42_P23_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 145 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT59_P20_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 146 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 147 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT6_P02_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 148 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_6_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 149 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT17_P00_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 150 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT25_P33_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 151 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT45_P23_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 152 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT67_P20_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 153 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 154 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM1_7_TOUT7_P02_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 155 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 156 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 157 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 158 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT68_P20_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 159 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_0_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 160 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 161 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 162 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 163 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT69_P20_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 164 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_1_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 165 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 166 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 167 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 168 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT70_P20_14_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 169 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 170 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_2_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 171 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 172 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 173 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT71_P15_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 174 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 175 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_3_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 176 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 177 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 178 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 179 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 180 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT72_P15_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 181 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 182 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_4_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 183 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 184 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 185 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT65_P20_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 186 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT73_P15_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 187 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 188 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_5_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 189 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 190 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 191 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 192 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT66_P20_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 193 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT74_P15_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 194 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_6_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 195 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 196 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 197 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT64_P20_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 198 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT67_P20_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 199 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT75_P15_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 200 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM2_7_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 201 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT18_P00_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 202 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT26_P33_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 203 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT32_P33_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 204 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT76_P15_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 205 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT77_P15_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 206 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT85_P14_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 207 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT87_P14_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 208 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_0_TOUT94_P13_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 209 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT19_P00_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 210 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT27_P33_5_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 211 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT43_P23_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 212 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT78_P15_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 213 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT79_P15_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 214 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT84_P14_4_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 215 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT86_P14_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 216 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_1_TOUT95_P11_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 217 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT20_P00_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 218 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT28_P33_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 219 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT44_P23_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 220 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT80_P14_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 221 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT83_P14_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 222 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT88_P14_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 223 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_2_TOUT96_P11_3_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 224 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT21_P00_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 225 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT29_P33_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 226 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT82_P14_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 227 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT89_P14_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 228 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_3_TOUT97_P11_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 229 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT22_P33_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 230 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT30_P33_8_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 231 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT34_P33_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 232 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT51_P21_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 233 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT81_P14_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 234 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT90_P14_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 235 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_4_TOUT98_P11_9_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 236 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT35_P33_13_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 237 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT52_P21_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 238 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT91_P13_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 239 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_5_TOUT99_P11_10_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 240 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT100_P11_11_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 241 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT36_P32_0_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 242 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT62_P20_6_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 243 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_6_TOUT92_P13_1_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 244 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT101_P11_12_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 245 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT63_P20_7_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 246 of file IfxGtm_PinMap.c.

◆ IfxGtm_ATOM3_7_TOUT93_P13_2_OUT

IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 247 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK0_P23_1_OUT

IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4}

Definition at line 248 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK1_P32_4_OUT

IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4}

Definition at line 249 of file IfxGtm_PinMap.c.

◆ IfxGtm_CLK2_P11_12_OUT

IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3}

Definition at line 250 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN0_P02_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}

Definition at line 251 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN109_P10_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3}

Definition at line 252 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN18_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}

Definition at line 253 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN26_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

Definition at line 254 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN32_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}

Definition at line 255 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN34_P33_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)12}

Definition at line 256 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN48_P22_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}

Definition at line 257 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN53_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}

Definition at line 258 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN77_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}

Definition at line 259 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN85_P14_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}

Definition at line 260 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN87_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5}

Definition at line 261 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN8_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)11}

Definition at line 262 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_0_TIN9_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)13}

Definition at line 263 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN103_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}

Definition at line 264 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN10_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)10}

Definition at line 265 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN11_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11}

Definition at line 266 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN19_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1}

Definition at line 267 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN1_P02_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}

Definition at line 268 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN27_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}

Definition at line 269 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN31_P33_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}

Definition at line 270 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN35_P33_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)12}

Definition at line 271 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN47_P22_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}

Definition at line 272 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN54_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}

Definition at line 273 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN78_P15_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}

Definition at line 274 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_1_TIN86_P14_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}

Definition at line 275 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN104_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}

Definition at line 276 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN107_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}

Definition at line 277 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN20_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1}

Definition at line 278 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN28_P33_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}

Definition at line 279 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN2_P02_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}

Definition at line 280 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN33_P33_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}

Definition at line 281 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN36_P32_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)11}

Definition at line 282 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN46_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7}

Definition at line 283 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN55_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}

Definition at line 284 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_2_TIN79_P15_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}

Definition at line 285 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN105_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}

Definition at line 286 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN108_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}

Definition at line 287 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN21_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1}

Definition at line 288 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN29_P33_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}

Definition at line 289 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN38_P32_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}

Definition at line 290 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN3_P02_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}

Definition at line 291 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN49_P22_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}

Definition at line 292 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN51_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11}

Definition at line 293 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN56_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}

Definition at line 294 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN60_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)10}

Definition at line 295 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_3_TIN80_P14_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}

Definition at line 296 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN102_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}

Definition at line 297 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN22_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}

Definition at line 298 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN30_P33_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}

Definition at line 299 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN39_P32_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}

Definition at line 300 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN4_P02_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}

Definition at line 301 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN50_P22_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}

Definition at line 302 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN52_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 1}, (IfxGtm_ChXSel)10}

Definition at line 303 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN57_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}

Definition at line 304 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN61_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)9}

Definition at line 305 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_4_TIN81_P14_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}

Definition at line 306 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN110_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}

Definition at line 307 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN23_P33_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6}

Definition at line 308 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN40_P32_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}

Definition at line 309 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN41_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}

Definition at line 310 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN58_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}

Definition at line 311 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN5_P02_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}

Definition at line 312 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_5_TIN82_P14_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}

Definition at line 313 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN106_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)1}

Definition at line 314 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN24_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}

Definition at line 315 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN42_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}

Definition at line 316 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN43_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}

Definition at line 317 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN59_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}

Definition at line 318 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN62_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)2}

Definition at line 319 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_6_TIN83_P14_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}

Definition at line 320 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN25_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}

Definition at line 321 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN44_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}

Definition at line 322 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN45_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}

Definition at line 323 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN63_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)7}

Definition at line 324 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN64_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}

Definition at line 325 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN7_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}

Definition at line 326 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM0_7_TIN84_P14_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}

Definition at line 327 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN0_P02_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2}

Definition at line 328 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN109_P10_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)14}

Definition at line 329 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN18_P00_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1}

Definition at line 330 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN26_P33_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10}

Definition at line 331 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN32_P33_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9}

Definition at line 332 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN48_P22_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8}

Definition at line 333 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN53_P21_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7}

Definition at line 334 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN68_P20_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)15}

Definition at line 335 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN76_P15_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)5}

Definition at line 336 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN77_P15_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6}

Definition at line 337 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN85_P14_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4}

Definition at line 338 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN87_P14_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)13}

Definition at line 339 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_0_TIN94_P13_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}

Definition at line 340 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN103_P10_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3}

Definition at line 341 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN19_P00_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)14}

Definition at line 342 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN1_P02_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2}

Definition at line 343 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN27_P33_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8}

Definition at line 344 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN31_P33_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9}

Definition at line 345 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN47_P22_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7}

Definition at line 346 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN54_P21_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6}

Definition at line 347 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN69_P20_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)10}

Definition at line 348 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN78_P15_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5}

Definition at line 349 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN86_P14_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4}

Definition at line 350 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_1_TIN95_P11_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)1}

Definition at line 351 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN104_P10_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3}

Definition at line 352 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN107_P10_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4}

Definition at line 353 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN12_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}

Definition at line 354 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN20_P00_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)14}

Definition at line 355 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN28_P33_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9}

Definition at line 356 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN2_P02_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2}

Definition at line 357 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN33_P33_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8}

Definition at line 358 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN46_P23_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)15}

Definition at line 359 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN55_P21_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6}

Definition at line 360 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN70_P20_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)10}

Definition at line 361 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN79_P15_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5}

Definition at line 362 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_2_TIN96_P11_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)7}

Definition at line 363 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN105_P10_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3}

Definition at line 364 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN108_P10_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4}

Definition at line 365 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN13_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

Definition at line 366 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN21_P00_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11}

Definition at line 367 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN29_P33_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9}

Definition at line 368 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN38_P32_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8}

Definition at line 369 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN3_P02_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2}

Definition at line 370 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN49_P22_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7}

Definition at line 371 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN56_P21_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6}

Definition at line 372 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN71_P15_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)10}

Definition at line 373 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN80_P14_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5}

Definition at line 374 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_3_TIN97_P11_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)12}

Definition at line 375 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN102_P10_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2}

Definition at line 376 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN14_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)9}

Definition at line 377 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN22_P33_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6}

Definition at line 378 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN30_P33_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7}

Definition at line 379 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN39_P32_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5}

Definition at line 380 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN4_P02_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1}

Definition at line 381 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN50_P22_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4}

Definition at line 382 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN57_P21_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8}

Definition at line 383 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN72_P15_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)12}

Definition at line 384 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN81_P14_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3}

Definition at line 385 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_4_TIN98_P11_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)11}

Definition at line 386 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN110_P10_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2}

Definition at line 387 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN15_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)11}

Definition at line 388 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN40_P32_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5}

Definition at line 389 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN41_P23_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4}

Definition at line 390 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN58_P21_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7}

Definition at line 391 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN5_P02_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1}

Definition at line 392 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN65_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)9}

Definition at line 393 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN73_P15_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)8}

Definition at line 394 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN82_P14_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3}

Definition at line 395 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN91_P13_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)6}

Definition at line 396 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_5_TIN99_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)12}

Definition at line 397 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN100_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)12}

Definition at line 398 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN106_P10_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2}

Definition at line 399 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN16_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11}

Definition at line 400 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN24_P33_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6}

Definition at line 401 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN42_P23_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4}

Definition at line 402 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN43_P23_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5}

Definition at line 403 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN59_P20_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7}

Definition at line 404 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN66_P20_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)9}

Definition at line 405 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN6_P02_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1}

Definition at line 406 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN74_P15_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)8}

Definition at line 407 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN83_P14_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3}

Definition at line 408 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_6_TIN92_P13_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)13}

Definition at line 409 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN101_P11_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)12}

Definition at line 410 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN17_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11}

Definition at line 411 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN25_P33_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6}

Definition at line 412 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN44_P23_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4}

Definition at line 413 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN45_P23_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5}

Definition at line 414 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN64_P20_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3}

Definition at line 415 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN67_P20_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)8}

Definition at line 416 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN75_P15_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)7}

Definition at line 417 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN7_P02_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1}

Definition at line 418 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN84_P14_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2}

Definition at line 419 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM1_7_TIN93_P13_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)9}

Definition at line 420 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN34_P33_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6}

Definition at line 421 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN68_P20_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5}

Definition at line 422 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN76_P15_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4}

Definition at line 423 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN8_P02_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2}

Definition at line 424 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN94_P13_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3}

Definition at line 425 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_0_TIN9_P00_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1}

Definition at line 426 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN10_P00_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1}

Definition at line 427 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN11_P00_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2}

Definition at line 428 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN35_P33_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5}

Definition at line 429 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN69_P20_13_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4}

Definition at line 430 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_1_TIN95_P11_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3}

Definition at line 431 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN12_P00_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1}

Definition at line 432 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN36_P32_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5}

Definition at line 433 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN70_P20_14_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4}

Definition at line 434 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN88_P14_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3}

Definition at line 435 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_2_TIN96_P11_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2}

Definition at line 436 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN13_P00_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1}

Definition at line 437 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN60_P20_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5}

Definition at line 438 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN71_P15_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4}

Definition at line 439 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN89_P14_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3}

Definition at line 440 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_3_TIN97_P11_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2}

Definition at line 441 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN14_P00_5_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1}

Definition at line 442 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN51_P21_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6}

Definition at line 443 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN61_P20_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5}

Definition at line 444 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN72_P15_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4}

Definition at line 445 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN90_P14_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3}

Definition at line 446 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_4_TIN98_P11_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2}

Definition at line 447 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN15_P00_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1}

Definition at line 448 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN52_P21_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6}

Definition at line 449 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN65_P20_9_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5}

Definition at line 450 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN73_P15_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4}

Definition at line 451 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN91_P13_0_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3}

Definition at line 452 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_5_TIN99_P11_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2}

Definition at line 453 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN100_P11_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2}

Definition at line 454 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN16_P00_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1}

Definition at line 455 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN62_P20_6_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5}

Definition at line 456 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN66_P20_10_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6}

Definition at line 457 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN74_P15_3_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4}

Definition at line 458 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_6_TIN92_P13_1_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3}

Definition at line 459 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN101_P11_12_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2}

Definition at line 460 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN17_P00_8_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1}

Definition at line 461 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN63_P20_7_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5}

Definition at line 462 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN67_P20_11_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6}

Definition at line 463 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN75_P15_4_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4}

Definition at line 464 of file IfxGtm_PinMap.c.

◆ IfxGtm_TIM2_7_TIN93_P13_2_IN

IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3}

Definition at line 465 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 466 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 467 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 468 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 469 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 470 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 471 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 472 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT85_P14_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 473 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_0_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 474 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 475 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 476 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 477 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 478 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 479 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 480 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_10_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 481 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 482 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 483 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 484 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 485 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 486 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 487 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_11_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 488 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 489 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 490 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 491 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 492 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 493 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 494 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_12_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 495 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 496 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 497 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 498 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 499 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 500 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_13_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 501 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 502 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 503 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 504 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 505 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 506 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_14_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 507 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 508 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 509 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 510 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 511 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 512 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_15_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 513 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 514 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 515 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 516 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 517 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 518 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 519 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_1_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 520 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 521 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 522 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 523 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 524 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 525 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 526 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 527 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_2_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 528 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 529 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 530 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 531 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 532 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 533 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 534 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 535 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 536 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_3_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 537 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 538 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 539 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 540 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 541 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 542 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 543 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 544 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_4_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 545 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 546 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 547 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 548 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 549 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 550 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_5_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 551 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 552 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 553 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT42_P23_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1}

Definition at line 554 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 555 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT83_P14_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 556 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_6_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 557 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 558 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 559 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 560 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 561 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_7_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 562 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 563 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 564 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 565 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 566 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 567 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 568 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 569 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_8_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 570 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 571 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 572 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 573 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT47_P22_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 574 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 575 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM0_9_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 576 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT18_P00_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1}

Definition at line 577 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT26_P33_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1}

Definition at line 578 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT32_P33_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1}

Definition at line 579 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT48_P22_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1}

Definition at line 580 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT53_P21_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1}

Definition at line 581 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT68_P20_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1}

Definition at line 582 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT76_P15_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1}

Definition at line 583 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT77_P15_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1}

Definition at line 584 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT85_P14_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1}

Definition at line 585 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT87_P14_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1}

Definition at line 586 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT8_P02_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1}

Definition at line 587 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT94_P13_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1}

Definition at line 588 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_0_TOUT9_P00_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1}

Definition at line 589 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT104_P10_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1}

Definition at line 590 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT107_P10_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1}

Definition at line 591 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT2_P02_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1}

Definition at line 592 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_10_TOUT62_P20_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1}

Definition at line 593 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT105_P10_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1}

Definition at line 594 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT108_P10_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1}

Definition at line 595 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT3_P02_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1}

Definition at line 596 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT60_P20_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1}

Definition at line 597 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_11_TOUT63_P20_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1}

Definition at line 598 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT102_P10_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1}

Definition at line 599 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT34_P33_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1}

Definition at line 600 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT4_P02_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1}

Definition at line 601 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_12_TOUT61_P20_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1}

Definition at line 602 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT110_P10_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1}

Definition at line 603 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT35_P33_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1}

Definition at line 604 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT5_P02_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1}

Definition at line 605 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_13_TOUT65_P20_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1}

Definition at line 606 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT36_P32_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1}

Definition at line 607 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT66_P20_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1}

Definition at line 608 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_14_TOUT6_P02_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1}

Definition at line 609 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT67_P20_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1}

Definition at line 610 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_15_TOUT7_P02_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1}

Definition at line 611 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT10_P00_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1}

Definition at line 612 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT11_P00_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1}

Definition at line 613 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT19_P00_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1}

Definition at line 614 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT27_P33_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1}

Definition at line 615 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT31_P33_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1}

Definition at line 616 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT47_P22_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1}

Definition at line 617 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT54_P21_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1}

Definition at line 618 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT69_P20_13_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1}

Definition at line 619 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT78_P15_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1}

Definition at line 620 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT86_P14_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1}

Definition at line 621 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_1_TOUT95_P11_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1}

Definition at line 622 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT12_P00_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1}

Definition at line 623 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT20_P00_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1}

Definition at line 624 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT28_P33_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1}

Definition at line 625 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT33_P33_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1}

Definition at line 626 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT46_P23_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1}

Definition at line 627 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT55_P21_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1}

Definition at line 628 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT70_P20_14_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1}

Definition at line 629 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT79_P15_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1}

Definition at line 630 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT88_P14_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1}

Definition at line 631 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_2_TOUT96_P11_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1}

Definition at line 632 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT13_P00_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1}

Definition at line 633 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT21_P00_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1}

Definition at line 634 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT29_P33_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1}

Definition at line 635 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT38_P32_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1}

Definition at line 636 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT49_P22_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1}

Definition at line 637 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT56_P21_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1}

Definition at line 638 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT71_P15_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1}

Definition at line 639 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT80_P14_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1}

Definition at line 640 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT89_P14_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1}

Definition at line 641 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_3_TOUT97_P11_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1}

Definition at line 642 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT14_P00_5_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1}

Definition at line 643 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT22_P33_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1}

Definition at line 644 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT30_P33_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 645 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT39_P32_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1}

Definition at line 646 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT50_P22_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1}

Definition at line 647 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT57_P21_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1}

Definition at line 648 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT72_P15_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1}

Definition at line 649 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT81_P14_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1}

Definition at line 650 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT90_P14_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1}

Definition at line 651 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_4_TOUT98_P11_9_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1}

Definition at line 652 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT15_P00_6_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1}

Definition at line 653 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT23_P33_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1}

Definition at line 654 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT40_P32_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1}

Definition at line 655 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT41_P23_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1}

Definition at line 656 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT58_P21_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1}

Definition at line 657 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT73_P15_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1}

Definition at line 658 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT82_P14_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1}

Definition at line 659 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT91_P13_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1}

Definition at line 660 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_5_TOUT99_P11_10_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1}

Definition at line 661 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT100_P11_11_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1}

Definition at line 662 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT106_P10_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1}

Definition at line 663 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT16_P00_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1}

Definition at line 664 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT24_P33_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1}

Definition at line 665 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT43_P23_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1}

Definition at line 666 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT59_P20_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1}

Definition at line 667 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT74_P15_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1}

Definition at line 668 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT83_P14_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1}

Definition at line 669 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_6_TOUT92_P13_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1}

Definition at line 670 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT101_P11_12_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1}

Definition at line 671 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT17_P00_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1}

Definition at line 672 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT25_P33_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1}

Definition at line 673 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT44_P23_3_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1}

Definition at line 674 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT45_P23_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1}

Definition at line 675 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT64_P20_8_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1}

Definition at line 676 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT75_P15_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1}

Definition at line 677 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT84_P14_4_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1}

Definition at line 678 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_7_TOUT93_P13_2_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1}

Definition at line 679 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT0_P02_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1}

Definition at line 680 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT109_P10_7_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1}

Definition at line 681 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_8_TOUT51_P21_0_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1}

Definition at line 682 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT103_P10_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1}

Definition at line 683 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT1_P02_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1}

Definition at line 684 of file IfxGtm_PinMap.c.

◆ IfxGtm_TOM1_9_TOUT52_P21_1_OUT

IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1}

Definition at line 685 of file IfxGtm_PinMap.c.


iLLD_TC26B: IfxGtm_PinMap.h File Reference

  • _PinMap
Data Structures | Typedefs | Enumerations | Functions | Variables
IfxGtm_PinMap.h File Reference
iLLD » GTM

GTM I/O map. More...

#include <IfxGtm_reg.h>
#include <_Impl/IfxGtm_cfg.h>
#include <Port/Std/IfxPort.h>
#include <Gtm/Std/IfxGtm_Atom.h>
#include <Gtm/Std/IfxGtm_Tom.h>
#include <Gtm/Std/IfxGtm_Tim.h>
Include dependency graph for IfxGtm_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tim_TinMap
TIN pin mapping structure. More...
struct | IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure. More...
struct | IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure. More...
struct | IfxGtm_Clk_Out
GTM Clock Output. More...

Typedefs

typedef IfxGtm_Atom_ToutMap * | IfxGtm_Atom_ToutMapP
Pointer to IfxGtm_Atom_ToutMap. More...
typedef IfxGtm_Tom_ToutMap * | IfxGtm_Tom_ToutMapP
Pointer to IfxGtm_Tom_ToutMap. More...

Enumerations

enum IfxGtm_ChXSel {
IfxGtm_ChXSel_a,
IfxGtm_ChXSel_b,
IfxGtm_ChXSel_c,
IfxGtm_ChXSel_d,
IfxGtm_ChXSel_e,
IfxGtm_ChXSel_f,
IfxGtm_ChXSel_g,
IfxGtm_ChXSel_h,
IfxGtm_ChXSel_i,
IfxGtm_ChXSel_j,
IfxGtm_ChXSel_k,
IfxGtm_ChXSel_l,
IfxGtm_ChXSel_m,
IfxGtm_ChXSel_n,
IfxGtm_ChXSel_o,
IfxGtm_ChXSel_p
}
CHxSEL register control code. More...
enum IfxGtm_ToutSel {
IfxGtm_ToutSel_a,
IfxGtm_ToutSel_b,
IfxGtm_ToutSel_c,
IfxGtm_ToutSel_d,
IfxGtm_ToutSel_e
}
TOUTSEL register control code. More...

Functions

IFX_EXTERN void | IfxGtm_PinMap_setTimTin (IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
IFX_EXTERN void | IfxGtm_PinMap_setAtomTout (IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxGtm_PinMap_setTomTout (IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)

Variables

IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
GTM_CLK0: GTM output. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
GTM_CLK1: GTM output. More...
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
GTM_CLK2: GTM output. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN
IfxGtm_TIM0_0_TIN0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN
IfxGtm_TIM0_0_TIN109_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN
IfxGtm_TIM0_0_TIN18_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN
IfxGtm_TIM0_0_TIN26_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN
IfxGtm_TIM0_0_TIN32_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN
IfxGtm_TIM0_0_TIN34_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN
IfxGtm_TIM0_0_TIN48_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN
IfxGtm_TIM0_0_TIN53_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN
IfxGtm_TIM0_0_TIN77_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN
IfxGtm_TIM0_0_TIN85_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN
IfxGtm_TIM0_0_TIN87_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN
IfxGtm_TIM0_0_TIN8_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN
IfxGtm_TIM0_0_TIN9_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN
IfxGtm_TIM0_1_TIN103_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN
IfxGtm_TIM0_1_TIN10_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN
IfxGtm_TIM0_1_TIN11_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN
IfxGtm_TIM0_1_TIN19_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN
IfxGtm_TIM0_1_TIN1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN
IfxGtm_TIM0_1_TIN27_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN
IfxGtm_TIM0_1_TIN31_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN
IfxGtm_TIM0_1_TIN35_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN
IfxGtm_TIM0_1_TIN47_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN
IfxGtm_TIM0_1_TIN54_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN
IfxGtm_TIM0_1_TIN78_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN
IfxGtm_TIM0_1_TIN86_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN
IfxGtm_TIM0_2_TIN104_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN
IfxGtm_TIM0_2_TIN107_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN
IfxGtm_TIM0_2_TIN20_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN
IfxGtm_TIM0_2_TIN28_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN
IfxGtm_TIM0_2_TIN2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN
IfxGtm_TIM0_2_TIN33_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN
IfxGtm_TIM0_2_TIN36_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN
IfxGtm_TIM0_2_TIN46_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN
IfxGtm_TIM0_2_TIN55_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN
IfxGtm_TIM0_2_TIN79_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN
IfxGtm_TIM0_3_TIN105_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN
IfxGtm_TIM0_3_TIN108_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN
IfxGtm_TIM0_3_TIN21_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN
IfxGtm_TIM0_3_TIN29_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN
IfxGtm_TIM0_3_TIN38_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN
IfxGtm_TIM0_3_TIN3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN
IfxGtm_TIM0_3_TIN49_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN
IfxGtm_TIM0_3_TIN51_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN
IfxGtm_TIM0_3_TIN56_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN
IfxGtm_TIM0_3_TIN60_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN
IfxGtm_TIM0_3_TIN80_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN
IfxGtm_TIM0_4_TIN102_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN
IfxGtm_TIM0_4_TIN22_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN
IfxGtm_TIM0_4_TIN30_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN
IfxGtm_TIM0_4_TIN39_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN
IfxGtm_TIM0_4_TIN4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN
IfxGtm_TIM0_4_TIN50_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN
IfxGtm_TIM0_4_TIN52_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN
IfxGtm_TIM0_4_TIN57_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN
IfxGtm_TIM0_4_TIN61_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN
IfxGtm_TIM0_4_TIN81_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN
IfxGtm_TIM0_5_TIN110_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN
IfxGtm_TIM0_5_TIN23_P33_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN
IfxGtm_TIM0_5_TIN40_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN
IfxGtm_TIM0_5_TIN41_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN
IfxGtm_TIM0_5_TIN58_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN
IfxGtm_TIM0_5_TIN5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN
IfxGtm_TIM0_5_TIN82_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN
IfxGtm_TIM0_6_TIN106_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN
IfxGtm_TIM0_6_TIN24_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN
IfxGtm_TIM0_6_TIN42_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN
IfxGtm_TIM0_6_TIN43_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN
IfxGtm_TIM0_6_TIN59_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN
IfxGtm_TIM0_6_TIN62_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN
IfxGtm_TIM0_6_TIN83_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN
IfxGtm_TIM0_7_TIN25_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN
IfxGtm_TIM0_7_TIN44_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN
IfxGtm_TIM0_7_TIN45_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN
IfxGtm_TIM0_7_TIN63_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN
IfxGtm_TIM0_7_TIN64_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN
IfxGtm_TIM0_7_TIN7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN
IfxGtm_TIM0_7_TIN84_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN
IfxGtm_TIM1_0_TIN0_P02_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN
IfxGtm_TIM1_0_TIN109_P10_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN
IfxGtm_TIM1_0_TIN18_P00_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN
IfxGtm_TIM1_0_TIN26_P33_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN
IfxGtm_TIM1_0_TIN32_P33_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN
IfxGtm_TIM1_0_TIN48_P22_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN
IfxGtm_TIM1_0_TIN53_P21_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN
IfxGtm_TIM1_0_TIN68_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN
IfxGtm_TIM1_0_TIN76_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN
IfxGtm_TIM1_0_TIN77_P15_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN
IfxGtm_TIM1_0_TIN85_P14_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN
IfxGtm_TIM1_0_TIN87_P14_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN
IfxGtm_TIM1_0_TIN94_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN
IfxGtm_TIM1_1_TIN103_P10_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN
IfxGtm_TIM1_1_TIN19_P00_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN
IfxGtm_TIM1_1_TIN1_P02_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN
IfxGtm_TIM1_1_TIN27_P33_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN
IfxGtm_TIM1_1_TIN31_P33_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN
IfxGtm_TIM1_1_TIN47_P22_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN
IfxGtm_TIM1_1_TIN54_P21_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN
IfxGtm_TIM1_1_TIN69_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN
IfxGtm_TIM1_1_TIN78_P15_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN
IfxGtm_TIM1_1_TIN86_P14_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN
IfxGtm_TIM1_1_TIN95_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN
IfxGtm_TIM1_2_TIN104_P10_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN
IfxGtm_TIM1_2_TIN107_P10_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN
IfxGtm_TIM1_2_TIN12_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN
IfxGtm_TIM1_2_TIN20_P00_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN
IfxGtm_TIM1_2_TIN28_P33_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN
IfxGtm_TIM1_2_TIN2_P02_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN
IfxGtm_TIM1_2_TIN33_P33_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN
IfxGtm_TIM1_2_TIN46_P23_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN
IfxGtm_TIM1_2_TIN55_P21_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN
IfxGtm_TIM1_2_TIN70_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN
IfxGtm_TIM1_2_TIN79_P15_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN
IfxGtm_TIM1_2_TIN96_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN
IfxGtm_TIM1_3_TIN105_P10_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN
IfxGtm_TIM1_3_TIN108_P10_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN
IfxGtm_TIM1_3_TIN13_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN
IfxGtm_TIM1_3_TIN21_P00_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN
IfxGtm_TIM1_3_TIN29_P33_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN
IfxGtm_TIM1_3_TIN38_P32_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN
IfxGtm_TIM1_3_TIN3_P02_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN
IfxGtm_TIM1_3_TIN49_P22_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN
IfxGtm_TIM1_3_TIN56_P21_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN
IfxGtm_TIM1_3_TIN71_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN
IfxGtm_TIM1_3_TIN80_P14_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN
IfxGtm_TIM1_3_TIN97_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN
IfxGtm_TIM1_4_TIN102_P10_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN
IfxGtm_TIM1_4_TIN14_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN
IfxGtm_TIM1_4_TIN22_P33_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN
IfxGtm_TIM1_4_TIN30_P33_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN
IfxGtm_TIM1_4_TIN39_P32_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN
IfxGtm_TIM1_4_TIN4_P02_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN
IfxGtm_TIM1_4_TIN50_P22_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN
IfxGtm_TIM1_4_TIN57_P21_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN
IfxGtm_TIM1_4_TIN72_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN
IfxGtm_TIM1_4_TIN81_P14_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN
IfxGtm_TIM1_4_TIN98_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN
IfxGtm_TIM1_5_TIN110_P10_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN
IfxGtm_TIM1_5_TIN15_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN
IfxGtm_TIM1_5_TIN40_P32_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN
IfxGtm_TIM1_5_TIN41_P23_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN
IfxGtm_TIM1_5_TIN58_P21_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN
IfxGtm_TIM1_5_TIN5_P02_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN
IfxGtm_TIM1_5_TIN65_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN
IfxGtm_TIM1_5_TIN73_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN
IfxGtm_TIM1_5_TIN82_P14_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN
IfxGtm_TIM1_5_TIN91_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN
IfxGtm_TIM1_5_TIN99_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN
IfxGtm_TIM1_6_TIN100_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN
IfxGtm_TIM1_6_TIN106_P10_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN
IfxGtm_TIM1_6_TIN16_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN
IfxGtm_TIM1_6_TIN24_P33_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN
IfxGtm_TIM1_6_TIN42_P23_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN
IfxGtm_TIM1_6_TIN43_P23_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN
IfxGtm_TIM1_6_TIN59_P20_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN
IfxGtm_TIM1_6_TIN66_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN
IfxGtm_TIM1_6_TIN6_P02_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN
IfxGtm_TIM1_6_TIN74_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN
IfxGtm_TIM1_6_TIN83_P14_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN
IfxGtm_TIM1_6_TIN92_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN
IfxGtm_TIM1_7_TIN101_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN
IfxGtm_TIM1_7_TIN17_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN
IfxGtm_TIM1_7_TIN25_P33_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN
IfxGtm_TIM1_7_TIN44_P23_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN
IfxGtm_TIM1_7_TIN45_P23_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN
IfxGtm_TIM1_7_TIN64_P20_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN
IfxGtm_TIM1_7_TIN67_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN
IfxGtm_TIM1_7_TIN75_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN
IfxGtm_TIM1_7_TIN7_P02_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN
IfxGtm_TIM1_7_TIN84_P14_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN
IfxGtm_TIM1_7_TIN93_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN
IfxGtm_TIM2_0_TIN34_P33_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN
IfxGtm_TIM2_0_TIN68_P20_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN
IfxGtm_TIM2_0_TIN76_P15_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN
IfxGtm_TIM2_0_TIN8_P02_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN
IfxGtm_TIM2_0_TIN94_P13_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN
IfxGtm_TIM2_0_TIN9_P00_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN
IfxGtm_TIM2_1_TIN10_P00_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN
IfxGtm_TIM2_1_TIN11_P00_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN
IfxGtm_TIM2_1_TIN35_P33_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN
IfxGtm_TIM2_1_TIN69_P20_13_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN
IfxGtm_TIM2_1_TIN95_P11_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN
IfxGtm_TIM2_2_TIN12_P00_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN
IfxGtm_TIM2_2_TIN36_P32_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN
IfxGtm_TIM2_2_TIN70_P20_14_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN
IfxGtm_TIM2_2_TIN88_P14_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN
IfxGtm_TIM2_2_TIN96_P11_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN
IfxGtm_TIM2_3_TIN13_P00_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN
IfxGtm_TIM2_3_TIN60_P20_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN
IfxGtm_TIM2_3_TIN71_P15_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN
IfxGtm_TIM2_3_TIN89_P14_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN
IfxGtm_TIM2_3_TIN97_P11_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN
IfxGtm_TIM2_4_TIN14_P00_5_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN
IfxGtm_TIM2_4_TIN51_P21_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN
IfxGtm_TIM2_4_TIN61_P20_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN
IfxGtm_TIM2_4_TIN72_P15_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN
IfxGtm_TIM2_4_TIN90_P14_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN
IfxGtm_TIM2_4_TIN98_P11_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN
IfxGtm_TIM2_5_TIN15_P00_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN
IfxGtm_TIM2_5_TIN52_P21_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN
IfxGtm_TIM2_5_TIN65_P20_9_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN
IfxGtm_TIM2_5_TIN73_P15_2_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN
IfxGtm_TIM2_5_TIN91_P13_0_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN
IfxGtm_TIM2_5_TIN99_P11_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN
IfxGtm_TIM2_6_TIN100_P11_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN
IfxGtm_TIM2_6_TIN16_P00_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN
IfxGtm_TIM2_6_TIN62_P20_6_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN
IfxGtm_TIM2_6_TIN66_P20_10_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN
IfxGtm_TIM2_6_TIN74_P15_3_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN
IfxGtm_TIM2_6_TIN92_P13_1_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN
IfxGtm_TIM2_7_TIN101_P11_12_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN
IfxGtm_TIM2_7_TIN17_P00_8_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN
IfxGtm_TIM2_7_TIN63_P20_7_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN
IfxGtm_TIM2_7_TIN67_P20_11_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN
IfxGtm_TIM2_7_TIN75_P15_4_IN. More...
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN
IfxGtm_TIM2_7_TIN93_P13_2_IN. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_TOM0_0_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_TOM0_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_TOM0_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_TOM0_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_TOM0_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_TOM0_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_TOM0_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_TOM0_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_TOM0_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_TOM0_10_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_TOM0_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_TOM0_10_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_TOM0_10_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IfxGtm_TOM0_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IfxGtm_TOM0_10_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_TOM0_10_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_TOM0_11_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_TOM0_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_TOM0_11_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_TOM0_11_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IfxGtm_TOM0_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IfxGtm_TOM0_11_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_TOM0_11_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_TOM0_12_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IfxGtm_TOM0_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_TOM0_12_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_TOM0_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_TOM0_12_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IfxGtm_TOM0_12_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_TOM0_12_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_TOM0_13_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IfxGtm_TOM0_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_TOM0_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IfxGtm_TOM0_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IfxGtm_TOM0_13_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_TOM0_13_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_TOM0_14_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_TOM0_14_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IfxGtm_TOM0_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IfxGtm_TOM0_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_TOM0_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IfxGtm_TOM0_14_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_TOM0_15_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_TOM0_15_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_TOM0_15_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IfxGtm_TOM0_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IfxGtm_TOM0_15_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_TOM0_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_TOM0_1_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_TOM0_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_TOM0_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_TOM0_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_TOM0_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_TOM0_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_TOM0_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_TOM0_2_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_TOM0_2_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_TOM0_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_TOM0_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_TOM0_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_TOM0_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_TOM0_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_TOM0_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_TOM0_3_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_TOM0_3_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_TOM0_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_TOM0_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_TOM0_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_TOM0_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IfxGtm_TOM0_3_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_TOM0_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_TOM0_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_TOM0_4_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_TOM0_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_TOM0_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_TOM0_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_TOM0_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IfxGtm_TOM0_4_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_TOM0_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_TOM0_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_TOM0_5_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_TOM0_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_TOM0_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_TOM0_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_TOM0_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_TOM0_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_TOM0_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_TOM0_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_TOM0_6_TOUT42_P23_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_TOM0_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_TOM0_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_TOM0_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_TOM0_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_TOM0_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IfxGtm_TOM0_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_TOM0_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_TOM0_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_TOM0_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_TOM0_8_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_TOM0_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IfxGtm_TOM0_8_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_TOM0_8_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_TOM0_8_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_TOM0_8_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_TOM0_8_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_TOM0_9_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_TOM0_9_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_TOM0_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_TOM0_9_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_TOM0_9_TOUT52_P21_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IfxGtm_TOM0_9_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_TOM1_0_TOUT18_P00_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_TOM1_0_TOUT26_P33_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_TOM1_0_TOUT32_P33_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IfxGtm_TOM1_0_TOUT48_P22_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IfxGtm_TOM1_0_TOUT53_P21_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_TOM1_0_TOUT68_P20_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_TOM1_0_TOUT76_P15_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_TOM1_0_TOUT77_P15_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_TOM1_0_TOUT85_P14_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IfxGtm_TOM1_0_TOUT87_P14_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_TOM1_0_TOUT8_P02_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IfxGtm_TOM1_0_TOUT94_P13_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_TOM1_0_TOUT9_P00_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IfxGtm_TOM1_10_TOUT104_P10_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IfxGtm_TOM1_10_TOUT107_P10_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_TOM1_10_TOUT2_P02_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_TOM1_10_TOUT62_P20_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IfxGtm_TOM1_11_TOUT105_P10_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IfxGtm_TOM1_11_TOUT108_P10_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_TOM1_11_TOUT3_P02_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_TOM1_11_TOUT60_P20_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_TOM1_11_TOUT63_P20_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IfxGtm_TOM1_12_TOUT102_P10_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_TOM1_12_TOUT34_P33_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_TOM1_12_TOUT4_P02_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_TOM1_12_TOUT61_P20_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IfxGtm_TOM1_13_TOUT110_P10_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_TOM1_13_TOUT35_P33_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_TOM1_13_TOUT5_P02_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_TOM1_13_TOUT65_P20_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_TOM1_14_TOUT36_P32_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_TOM1_14_TOUT66_P20_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_TOM1_14_TOUT6_P02_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_TOM1_15_TOUT67_P20_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_TOM1_15_TOUT7_P02_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_TOM1_1_TOUT10_P00_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_TOM1_1_TOUT11_P00_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_TOM1_1_TOUT19_P00_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_TOM1_1_TOUT27_P33_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_TOM1_1_TOUT31_P33_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IfxGtm_TOM1_1_TOUT47_P22_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IfxGtm_TOM1_1_TOUT54_P21_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_TOM1_1_TOUT69_P20_13_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_TOM1_1_TOUT78_P15_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_TOM1_1_TOUT86_P14_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IfxGtm_TOM1_1_TOUT95_P11_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_TOM1_2_TOUT12_P00_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_TOM1_2_TOUT20_P00_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_TOM1_2_TOUT28_P33_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_TOM1_2_TOUT33_P33_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IfxGtm_TOM1_2_TOUT46_P23_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IfxGtm_TOM1_2_TOUT55_P21_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_TOM1_2_TOUT70_P20_14_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_TOM1_2_TOUT79_P15_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IfxGtm_TOM1_2_TOUT88_P14_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IfxGtm_TOM1_2_TOUT96_P11_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_TOM1_3_TOUT13_P00_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_TOM1_3_TOUT21_P00_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_TOM1_3_TOUT29_P33_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_TOM1_3_TOUT38_P32_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IfxGtm_TOM1_3_TOUT49_P22_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IfxGtm_TOM1_3_TOUT56_P21_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_TOM1_3_TOUT71_P15_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_TOM1_3_TOUT80_P14_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IfxGtm_TOM1_3_TOUT89_P14_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IfxGtm_TOM1_3_TOUT97_P11_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_TOM1_4_TOUT14_P00_5_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_TOM1_4_TOUT22_P33_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_TOM1_4_TOUT30_P33_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_TOM1_4_TOUT39_P32_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IfxGtm_TOM1_4_TOUT50_P22_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IfxGtm_TOM1_4_TOUT57_P21_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_TOM1_4_TOUT72_P15_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_TOM1_4_TOUT81_P14_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IfxGtm_TOM1_4_TOUT90_P14_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IfxGtm_TOM1_4_TOUT98_P11_9_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_TOM1_5_TOUT15_P00_6_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_TOM1_5_TOUT23_P33_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_TOM1_5_TOUT40_P32_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_TOM1_5_TOUT41_P23_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IfxGtm_TOM1_5_TOUT58_P21_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_TOM1_5_TOUT73_P15_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_TOM1_5_TOUT82_P14_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IfxGtm_TOM1_5_TOUT91_P13_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IfxGtm_TOM1_5_TOUT99_P11_10_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IfxGtm_TOM1_6_TOUT100_P11_11_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IfxGtm_TOM1_6_TOUT106_P10_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_TOM1_6_TOUT16_P00_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_TOM1_6_TOUT24_P33_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_TOM1_6_TOUT43_P23_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IfxGtm_TOM1_6_TOUT59_P20_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_TOM1_6_TOUT74_P15_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_TOM1_6_TOUT83_P14_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IfxGtm_TOM1_6_TOUT92_P13_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_TOM1_7_TOUT101_P11_12_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_TOM1_7_TOUT17_P00_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_TOM1_7_TOUT25_P33_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_TOM1_7_TOUT44_P23_3_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_TOM1_7_TOUT45_P23_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_TOM1_7_TOUT64_P20_8_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_TOM1_7_TOUT75_P15_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_TOM1_7_TOUT84_P14_4_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IfxGtm_TOM1_7_TOUT93_P13_2_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_TOM1_8_TOUT0_P02_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IfxGtm_TOM1_8_TOUT109_P10_7_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IfxGtm_TOM1_8_TOUT51_P21_0_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IfxGtm_TOM1_9_TOUT103_P10_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_TOM1_9_TOUT1_P02_1_OUT. More...
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IfxGtm_TOM1_9_TOUT52_P21_1_OUT. More...

Detailed Description

GTM I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_PinMap.h.


iLLD_TC26B: IfxGtm_Atom_Pwm.h File Reference

  • Gtm
  • Atom
  • Pwm
Data Structures | Functions
IfxGtm_Atom_Pwm.h File Reference
iLLD » GTM

GTM PWM details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Atom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxGtm_Atom_Pwm.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Atom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Atom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Atom_Pwm_Driver
Driver Handle. More...

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
IFX_EXTERN void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Atom_Pwm.h.


iLLD_TC26B: IfxGtm_Atom_PwmHl.h File Reference

  • Gtm
  • Atom
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxGtm_Atom_PwmHl.h File Reference
iLLD » GTM

GTM PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
Include dependency graph for IfxGtm_Atom_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration. More...
struct | IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver. More...

Macros

#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output. More...

Typedefs

typedef struct IfxGtm_Atom_PwmHl_s | IfxGtm_Atom_PwmHl
typedef void(* | IfxGtm_Atom_PwmHl_Update) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
typedef void(* | IfxGtm_Atom_PwmHl_UpdateShift) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
typedef void(* | IfxGtm_Atom_PwmHl_UpdatePulse) (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)

Functions

IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Atom_PwmHl.h.

Macro Definition Documentation

◆ IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS

#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output.

Definition at line 89 of file IfxGtm_Atom_PwmHl.h.

Referenced by IfxGtm_Atom_PwmHl_init().

Typedef Documentation

◆ IfxGtm_Atom_PwmHl

typedef struct IfxGtm_Atom_PwmHl_s IfxGtm_Atom_PwmHl

Definition at line 95 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_Update

typedef void(* IfxGtm_Atom_PwmHl_Update) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 97 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_UpdatePulse

typedef void(* IfxGtm_Atom_PwmHl_UpdatePulse) (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)

Definition at line 101 of file IfxGtm_Atom_PwmHl.h.

◆ IfxGtm_Atom_PwmHl_UpdateShift

typedef void(* IfxGtm_Atom_PwmHl_UpdateShift) (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Definition at line 99 of file IfxGtm_Atom_PwmHl.h.


iLLD_TC26B: IfxGtm_Atom_Timer.h File Reference

  • Gtm
  • Atom
  • Timer
Data Structures | Functions
IfxGtm_Atom_Timer.h File Reference
iLLD » GTM

GTM TIMER details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Atom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxGtm_Atom_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Atom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Atom_Timer
TOM Timer interface. More...
struct | IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer. More...

Functions

IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Atom_Timer.h.


iLLD_TC26B: IfxGtm.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_IrqMode {
IfxGtm_IrqMode_level = 0,
IfxGtm_IrqMode_pulse = 1,
IfxGtm_IrqMode_pulseNotify = 2,
IfxGtm_IrqMode_singlePulse = 3
}
Enum for GTM interrupt modes. More...
enum IfxGtm_SuspendMode {
IfxGtm_SuspendMode_none = 0,
IfxGtm_SuspendMode_hard = 1,
IfxGtm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE boolean | IfxGtm_isEnabled (Ifx_GTM *gtm)
Returs the status of module enabled or disabled. More...
IFX_INLINE boolean | IfxGtm_isModuleSuspended (Ifx_GTM *gtm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxGtm_setSuspendMode (Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
IFX_EXTERN void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...
IFX_EXTERN float32 | IfxGtm_getSysClkFrequency (void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm.h.

Function Documentation

◆ IfxGtm_getSysClkFrequency()

IFX_EXTERN float32 IfxGtm_getSysClkFrequency ( void )

returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK.

Returns
sysFreq

Definition at line 57 of file IfxGtm.c.

Referenced by IfxGtm_Cmu_getModuleFrequency().


iLLD_TC26B: IfxGtm_Atom.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Atom.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm.h"
#include "IfxGtm_Tbu.h"
#include "Src/Std/IfxSrc.h"
#include "IfxGtm_Cmu.h"
#include "stddef.h"
Include dependency graph for IfxGtm_Atom.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Atom_Ch_OutputTrigger {
IfxGtm_Atom_Ch_OutputTrigger_forward = 0,
IfxGtm_Atom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Atom_Ch_ResetEvent {
IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...
enum IfxGtm_Atom_Mode {
IfxGtm_Atom_Mode_outputImmediate,
IfxGtm_Atom_Mode_outputCompare,
IfxGtm_Atom_Mode_outputPwm,
IfxGtm_Atom_Mode_outputSerial
}
Enum for ATOM mode. More...
enum IfxGtm_Atom_AruInput {
IfxGtm_Atom_AruInput_disabled = 0,
IfxGtm_Atom_AruInput_enabled = 1
}
Enable/disable of Aru Input to ATOM channel. More...
enum IfxGtm_Atom_SomcControl {
IfxGtm_Atom_SomcControl_compareBoth = 0,
IfxGtm_Atom_SomcControl_compareBoth1 = 1,
IfxGtm_Atom_SomcControl_ccu0Ts0 = 2,
IfxGtm_Atom_SomcControl_ccu1Ts12 = 3,
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 = 4,
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 = 5,
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 = 6,
IfxGtm_Atom_SomcControl_cancelCompare = 7
}
Match Compare control modes. More...
enum IfxGtm_Atom_SomcSignalLevelControl {
IfxGtm_Atom_SomcSignalLevelControl_noChange = 0,
IfxGtm_Atom_SomcSignalLevelControl_sl0out1 = 1,
IfxGtm_Atom_SomcSignalLevelControl_sl0out0 = 2,
IfxGtm_Atom_SomcSignalLevelControl_toggle = 3
}
SOMC signal level Control. More...

Functions

IFX_INLINE Ifx_GTM_ATOM_CH * | IfxGtm_Atom_Ch_getChannelPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel. More...
IFX_INLINE void | IfxGtm_Atom_Ch_setCompareShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
IFX_EXTERN float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...
IFX_INLINE void | IfxGtm_Atom_Agc_setChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN) More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruInput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSomcControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setSomcSignalLevelControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode. More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruReadAddress0 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0 More...
IFX_EXTERN void | IfxGtm_Atom_Ch_setAruReadAddress1 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1 More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Atom.h.

Enumeration Type Documentation

◆ IfxGtm_Atom_AruInput

enum IfxGtm_Atom_AruInput

Enable/disable of Aru Input to ATOM channel.

Enumerator
IfxGtm_Atom_AruInput_disabled | ARU input disabled.
IfxGtm_Atom_AruInput_enabled | ARU input enabled.

Definition at line 86 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_SomcControl

enum IfxGtm_Atom_SomcControl

Match Compare control modes.

Enumerator
IfxGtm_Atom_SomcControl_compareBoth | compare CCU0 and CCU1 in parallel
IfxGtm_Atom_SomcControl_compareBoth1 | compare CCU0 and CCU1 in parallel
IfxGtm_Atom_SomcControl_ccu0Ts0 | compare CCU0 against TS0
IfxGtm_Atom_SomcControl_ccu1Ts12 | compare only CCU1 against TS1 or TS2
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 | compare CCU0 then CCU1, use TS0
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 | compare CCU0 then CCU1. Use TS1 or TS2
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 | compare CCU0 with TS0 then CCU1 with TS1 or TS2
IfxGtm_Atom_SomcControl_cancelCompare | Cancel pending compare events.

Definition at line 94 of file IfxGtm_Atom.h.

◆ IfxGtm_Atom_SomcSignalLevelControl

enum IfxGtm_Atom_SomcSignalLevelControl

SOMC signal level Control.

Enumerator
IfxGtm_Atom_SomcSignalLevelControl_noChange | no signal level change at output
IfxGtm_Atom_SomcSignalLevelControl_sl0out1 | SL= 0 -> Out=1; SL=1->Out=0.
IfxGtm_Atom_SomcSignalLevelControl_sl0out0 | SL=0->Out=0; SL=1->Out=1.
IfxGtm_Atom_SomcSignalLevelControl_toggle | toggle the output signal level

Definition at line 108 of file IfxGtm_Atom.h.

Function Documentation

◆ IfxGtm_Atom_Ch_setAruInput()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

enable/disable ARU input for the ATOM channel specified.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
enabled | ARU enable status
Returns
None

Definition at line 504 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress0()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 0

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 0
Returns
None

Definition at line 536 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress1()

IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 1

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 1
Returns
None

Definition at line 543 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcControl()

IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcControl | control
 | ) |  |

sets the SOMC control bits for the specified ATOM channel

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
control | SOMC control mode enum
Returns
None

Definition at line 520 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcSignalLevelControl()

IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcSignalLevelControl | ctrl
 | ) |  |

sets the SL control for SOMC mode.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
ctrl | SIgnal level control
Returns
None

Definition at line 528 of file IfxGtm_Atom.c.


iLLD_TC26B: IfxGtm_Cmu.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Cmu.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Cmu.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Cmu_Clk {
IfxGtm_Cmu_Clk_0 = 0,
IfxGtm_Cmu_Clk_1,
IfxGtm_Cmu_Clk_2,
IfxGtm_Cmu_Clk_3,
IfxGtm_Cmu_Clk_4,
IfxGtm_Cmu_Clk_5,
IfxGtm_Cmu_Clk_6,
IfxGtm_Cmu_Clk_7
}
enum IfxGtm_Cmu_Eclk {
IfxGtm_Cmu_Eclk_0 = 0,
IfxGtm_Cmu_Eclk_1,
IfxGtm_Cmu_Eclk_2
}
enum IfxGtm_Cmu_Fxclk {
IfxGtm_Cmu_Fxclk_0 = 0,
IfxGtm_Cmu_Fxclk_1,
IfxGtm_Cmu_Fxclk_2,
IfxGtm_Cmu_Fxclk_3,
IfxGtm_Cmu_Fxclk_4
}
enum IfxGtm_Cmu_Tim_Filter_Clk {
IfxGtm_Cmu_Tim_Filter_Clk_0,
IfxGtm_Cmu_Tim_Filter_Clk_1,
IfxGtm_Cmu_Tim_Filter_Clk_6,
IfxGtm_Cmu_Tim_Filter_Clk_7
}
Tim Filter counter frequency select. More...

Functions

IFX_EXTERN void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
IFX_EXTERN float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
IFX_EXTERN boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
IFX_EXTERN void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
IFX_EXTERN void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
IFX_EXTERN void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Cmu.h.


iLLD_TC26B: IfxGtm_Dpll.h File Reference

  • Gtm
  • Std
Functions
IfxGtm_Dpll.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Dpll.h:

Go to the source code of this file.

Functions

IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Dpll.h.


iLLD_TC26B: IfxGtm_Tbu.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Tbu.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
Include dependency graph for IfxGtm_Tbu.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Tbu_Ts {
IfxGtm_Tbu_Ts_0,
IfxGtm_Tbu_Ts_1,
IfxGtm_Tbu_Ts_2
}
GTM TOM TBU Time stamps. More...

Functions

IFX_INLINE void | IfxGtm_Tbu_enableChannel (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel. More...
IFX_INLINE boolean | IfxGtm_Tbu_isChannelEnabled (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled Returns FALSE if the corresponding channel is disabled. More...
IFX_EXTERN float32 | IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tbu.h.


iLLD_TC26B: IfxGtm_Tim.h File Reference

  • Gtm
  • Std
Enumerations | Functions
IfxGtm_Tim.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "IfxGtm.h"
#include "IfxGtm_Cmu.h"
#include "IfxGtm_bf.h"
Include dependency graph for IfxGtm_Tim.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Tim_CntsSel {
IfxGtm_Tim_CntsSel_cntReg = 0,
IfxGtm_Tim_CntsSel_tbuTs0
}
enum IfxGtm_Tim_FilterCounter {
IfxGtm_Tim_FilterCounter_upDown = 0,
IfxGtm_Tim_FilterCounter_hold
}
Enum for Filter counter. More...
enum IfxGtm_Tim_FilterMode {
IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0,
IfxGtm_Tim_FilterMode_individualDeglitchTime
}
Enum for Filter mode. More...
enum IfxGtm_Tim_GprSel {
IfxGtm_Tim_GprSel_tbuTs0 = 0,
IfxGtm_Tim_GprSel_tbuTs1,
IfxGtm_Tim_GprSel_tbuTs2,
IfxGtm_Tim_GprSel_cnts
}
enum IfxGtm_Tim_Input {
IfxGtm_Tim_Input_currentChannel = 0,
IfxGtm_Tim_Input_adjacentChannel
}
enum IfxGtm_Tim_Mode {
IfxGtm_Tim_Mode_pwmMeasurement = 0,
IfxGtm_Tim_Mode_pulseIntegration,
IfxGtm_Tim_Mode_inputEvent,
IfxGtm_Tim_Mode_inputPrescaler,
IfxGtm_Tim_Mode_bitCompression
}
enum IfxGtm_Tim_Timeout {
IfxGtm_Tim_Timeout_disabled,
IfxGtm_Tim_Timeout_risingEdge,
IfxGtm_Tim_Timeout_fallingEdge,
IfxGtm_Tim_Timeout_bothEdge
}
Enum for Timeout control. More...

Functions

IFX_INLINE void | IfxGtm_Tim_Ch_clearCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearDataLostEvent (Ifx_GTM_TIM_CH *channel)
Clears the data lost flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearGlitchEvent (Ifx_GTM_TIM_CH *channel)
Clears the glitch flag. More...
IFX_INLINE void | IfxGtm_Tim_Ch_clearNewValueEvent (Ifx_GTM_TIM_CH *channel)
Clears the new value flag. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxGtm_Tim_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isCntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isDataLostEvent (Ifx_GTM_TIM_CH *channel)
Test the data lost flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isEcntOverflowEvent (Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isGlitchEvent (Ifx_GTM_TIM_CH *channel)
Test the glitch flag. More...
IFX_INLINE boolean | IfxGtm_Tim_Ch_isNewValueEvent (Ifx_GTM_TIM_CH *channel)
Test the new value flag. More...
IFX_INLINE Ifx_GTM_TIM_CH * | IfxGtm_Tim_getChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel. More...
IFX_INLINE void | IfxGtm_Tim_Ch_resetChannel (Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
IFX_EXTERN float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IFX_EXTERN IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
IFX_EXTERN void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tim.h.


iLLD_TC26B: IfxGtm_Tom.h File Reference

  • Gtm
  • Std
Macros | Enumerations | Functions
IfxGtm_Tom.h File Reference
iLLD » GTM

GTM basic functionality. More...

#include "_Impl/IfxGtm_cfg.h"
#include "IfxGtm.h"
#include "IfxGtm_Tbu.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxGtm_Tom.h:

Go to the source code of this file.

Macros

#define IFXGTM_TOM_NUM_TGC_CHANNELS (8)
Number of channels per TOM TGC. More...

Enumerations

enum IfxGtm_Tom_Ch_ClkSrc {
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3,
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4,
IfxGtm_Tom_Ch_ClkSrc_noClock = 5
}
Clock source for the TOM channels. More...
enum IfxGtm_Tom_Ch_OutputTrigger {
IfxGtm_Tom_Ch_OutputTrigger_forward = 0,
IfxGtm_Tom_Ch_OutputTrigger_generate = 1
}
Reset source for channel counter CN0. More...
enum IfxGtm_Tom_Ch_ResetEvent {
IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
}
Reset event for channel counter CN0. More...

Functions

IFX_INLINE Ifx_GTM_TOM_CH * | IfxGtm_Tom_Ch_getChannelPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
IFX_EXTERN float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
IFX_EXTERN Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
IFX_EXTERN boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
IFX_EXTERN void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
IFX_INLINE void | IfxGtm_Tom_Tgc_writeGlobalControl (Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
IFX_EXTERN uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
IFX_EXTERN void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tom.h.

Macro Definition Documentation

◆ IFXGTM_TOM_NUM_TGC_CHANNELS

#define IFXGTM_TOM_NUM_TGC_CHANNELS (8)

Number of channels per TOM TGC.

Definition at line 54 of file IfxGtm_Tom.h.

Referenced by IfxGtm_Tom_Tgc_buildFeature(), and IfxGtm_Tom_Tgc_resetChannels().


iLLD_TC26B: IfxGtm_Tim_In.h File Reference

  • Gtm
  • Tim
  • In
Data Structures | Enumerations | Functions
IfxGtm_Tim_In.h File Reference
iLLD » GTM

GTM IN details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tim.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Cpu/Std/IfxCpu.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxGtm_Tim_In.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture. More...
struct | IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter. More...
struct | IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout. More...
struct | IfxGtm_Tim_In
Driver Handle. More...
struct | IfxGtm_Tim_In_Config
Configuration structure for TIM input capture. More...

Enumerations

enum IfxGtm_Tim_In_ConfigFilterMode {
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown,
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold,
IfxGtm_Tim_In_ConfigFilterMode_none
}
Config Filter Mode. More...
enum IfxGtm_Tim_In_Input {
IfxGtm_Tim_In_Input_currentChannel,
IfxGtm_Tim_In_Input_adjacentChannel,
IfxGtm_Tim_In_Input_aux
}
Input Source. More...

Functions

IFX_INLINE void | IfxGtm_Tim_In_clearNewData (IfxGtm_Tim_In *driver)
Clear the new data flag. More...
IFX_INLINE float32 | IfxGtm_Tim_In_getDutyPercent (IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent More...
IFX_INLINE float32 | IfxGtm_Tim_In_getPeriodSecond (IfxGtm_Tim_In *driver)
Return the period in second. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPeriodTicks (IfxGtm_Tim_In *driver)
Return the period value in tick. More...
IFX_INLINE sint32 | IfxGtm_Tim_In_getPulseLengthTick (IfxGtm_Tim_In *driver)
Return the pulse length value in tick. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isDataLost (IfxGtm_Tim_In *driver)
Indicates if data were lost. More...
IFX_INLINE boolean | IfxGtm_Tim_In_isNewData (IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag) More...
IFX_EXTERN boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
IFX_EXTERN void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
IFX_EXTERN void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

GTM IN details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tim_In.h.


iLLD_TC26B: IfxGtm_Tom_Pwm.h File Reference

  • Gtm
  • Tom
  • Pwm
Data Structures | Functions
IfxGtm_Tom_Pwm.h File Reference
iLLD » GTM

GTM PWM details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxGtm_Tom_Pwm.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts More...
struct | IfxGtm_Tom_Pwm_pin
configuration structure for output pin More...
struct | IfxGtm_Tom_Pwm_Config
Configuration structure. More...
struct | IfxGtm_Tom_Pwm_Driver
Driver Handle. More...

Functions

IFX_EXTERN boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_start (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel More...
IFX_EXTERN void | IfxGtm_Tom_Pwm_stop (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tom_Pwm.h.

Data Structure Documentation

◆ IfxGtm_Tom_Pwm_pin

struct IfxGtm_Tom_Pwm_pin

configuration structure for output pin

Definition at line 132 of file IfxGtm_Tom_Pwm.h.

Collaboration diagram for IfxGtm_Tom_Pwm_pin:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | Output mode.
IfxGtm_Tom_ToutMap * | outputPin | output pin
IfxPort_PadDriver | padDriver | Pad driver.

Function Documentation

◆ IfxGtm_Tom_Pwm_start()

IFX_EXTERN void IfxGtm_Tom_Pwm_start | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

starts the PWM generation from the configured channel

Parameters
driver | handle for the PWM device
immediate | immediate start or not
Returns
None

Definition at line 132 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_stop()

IFX_EXTERN void IfxGtm_Tom_Pwm_stop | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 143 of file IfxGtm_Tom_Pwm.c.


iLLD_TC26B: IfxGtm_Tom_PwmHl.h File Reference

  • Gtm
  • Tom
  • PwmHl
Data Structures | Macros | Typedefs | Functions
IfxGtm_Tom_PwmHl.h File Reference
iLLD » GTM

GTM PWMHL details. More...

#include "StdIf/IfxStdIf_PwmHl.h"
#include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
Include dependency graph for IfxGtm_Tom_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only) More...
struct | IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration. More...
struct | IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration. More...
struct | IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver. More...

Macros

#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited to 3 because the PWM channels used must be owned by the same TGC. More...

Typedefs

typedef struct IfxGtm_Tom_PwmHl_s | IfxGtm_Tom_PwmHl
typedef void(* | IfxGtm_Tom_PwmHl_Update) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
typedef void(* | IfxGtm_Tom_PwmHl_UpdateShift) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
typedef void(* | IfxGtm_Tom_PwmHl_UpdatePulse) (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)

Functions

IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
IFX_EXTERN float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
IFX_EXTERN Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
IFX_EXTERN void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
IFX_EXTERN boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tom_PwmHl.h.

Macro Definition Documentation

◆ IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS

#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)

Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited to 3 because the PWM channels used must be owned by the same TGC.

Definition at line 129 of file IfxGtm_Tom_PwmHl.h.

Referenced by IfxGtm_Tom_PwmHl_init().

Typedef Documentation

◆ IfxGtm_Tom_PwmHl

typedef struct IfxGtm_Tom_PwmHl_s IfxGtm_Tom_PwmHl

Definition at line 135 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_Update

typedef void(* IfxGtm_Tom_PwmHl_Update) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)

Definition at line 137 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_UpdatePulse

typedef void(* IfxGtm_Tom_PwmHl_UpdatePulse) (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)

Definition at line 141 of file IfxGtm_Tom_PwmHl.h.

◆ IfxGtm_Tom_PwmHl_UpdateShift

typedef void(* IfxGtm_Tom_PwmHl_UpdateShift) (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Definition at line 139 of file IfxGtm_Tom_PwmHl.h.


iLLD_TC26B: IfxGtm_Tom_Timer.h File Reference

  • Gtm
  • Tom
  • Timer
Data Structures | Functions
IfxGtm_Tom_Timer.h File Reference
iLLD » GTM

GTM TIMER details. More...

#include "_PinMap/IfxGtm_PinMap.h"
#include "Gtm/Std/IfxGtm_Tom.h"
#include "Gtm/Std/IfxGtm_Cmu.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxGtm_Tom_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Tom_Timer_Base
Structure for the timer base. More...
struct | IfxGtm_Tom_Timer
TOM Timer interface Handle. More...
struct | IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer. More...

Functions

IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
IFX_EXTERN volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
IFX_EXTERN float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
IFX_EXTERN Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
IFX_EXTERN boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
IFX_EXTERN void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tom_Timer.h.


iLLD_TC26B: IfxGtm_Trig.h File Reference

  • Gtm
  • Trig
Enumerations | Functions
IfxGtm_Trig.h File Reference
iLLD » GTM

GTM TRIG details. More...

#include "Cpu/Std/Ifx_Types.h"
#include "_Impl/IfxGtm_cfg.h"
#include "Gtm/Std/IfxGtm_Tim.h"
Include dependency graph for IfxGtm_Trig.h:

Go to the source code of this file.

Enumerations

enum IfxGtm_Trig_AdcGroup {
IfxGtm_Trig_AdcGroup_0,
IfxGtm_Trig_AdcGroup_1,
IfxGtm_Trig_AdcGroup_2,
IfxGtm_Trig_AdcGroup_3,
IfxGtm_Trig_AdcGroup_4
}
Enum for ADC group. More...
enum IfxGtm_Trig_AdcTrig {
IfxGtm_Trig_AdcTrig_0,
IfxGtm_Trig_AdcTrig_1,
IfxGtm_Trig_AdcTrig_count
}
Enum for ADC trigger. More...
enum IfxGtm_Trig_AdcTrigChannel {
IfxGtm_Trig_AdcTrigChannel_4,
IfxGtm_Trig_AdcTrigChannel_5,
IfxGtm_Trig_AdcTrigChannel_6,
IfxGtm_Trig_AdcTrigChannel_7,
IfxGtm_Trig_AdcTrigChannel_13,
IfxGtm_Trig_AdcTrigChannel_14,
IfxGtm_Trig_AdcTrigChannel_15,
IfxGtm_Trig_AdcTrigChannel_count
}
Enum for ADC trigger channel. More...
enum IfxGtm_Trig_AdcTrigSource {
IfxGtm_Trig_AdcTrigSource_atom0,
IfxGtm_Trig_AdcTrigSource_atom1,
IfxGtm_Trig_AdcTrigSource_atom2,
IfxGtm_Trig_AdcTrigSource_atom3,
IfxGtm_Trig_AdcTrigSource_tom0,
IfxGtm_Trig_AdcTrigSource_tom1,
IfxGtm_Trig_AdcTrigSource_count
}
Enum for ADC trigger source. More...
enum IfxGtm_Trig_DsadcTrig {
IfxGtm_Trig_DsadcTrig_0,
IfxGtm_Trig_DsadcTrig_1
}
Enum for DSADC trigger. More...
enum IfxGtm_Trig_DsadcTrigSource {
IfxGtm_Trig_DsadcTrigSource_tomX_6,
IfxGtm_Trig_DsadcTrigSource_tomX_7,
IfxGtm_Trig_DsadcTrigSource_tomX_13,
IfxGtm_Trig_DsadcTrigSource_tomX_14,
IfxGtm_Trig_DsadcTrigSource_atomX_4,
IfxGtm_Trig_DsadcTrigSource_atomX_5,
IfxGtm_Trig_DsadcTrigSource_atomX_6,
IfxGtm_Trig_DsadcTrigSource_atomX_7
}
Enum for DSADC trigger source. More...
enum IfxGtm_Trig_SentGroup {
IfxGtm_Trig_SentGroup_0,
IfxGtm_Trig_SentGroup_1,
IfxGtm_Trig_SentGroup_2,
IfxGtm_Trig_SentGroup_3,
IfxGtm_Trig_SentGroup_4,
IfxGtm_Trig_SentGroup_5
}
Enum for SENT group. More...
enum IfxGtm_Trig_SentTrig { IfxGtm_Trig_SentTrig_0 }
Enum for SENT trigger. More...
enum IfxGtm_Trig_SentTrigChannel {
IfxGtm_Trig_SentTrigChannel_4,
IfxGtm_Trig_SentTrigChannel_5,
IfxGtm_Trig_SentTrigChannel_6,
IfxGtm_Trig_SentTrigChannel_7,
IfxGtm_Trig_SentTrigChannel_13,
IfxGtm_Trig_SentTrigChannel_14,
IfxGtm_Trig_SentTrigChannel_15,
IfxGtm_Trig_SentTrigChannel_count
}
Enum for SENT trigger channel. More...
enum IfxGtm_Trig_SentTrigSource {
IfxGtm_Trig_SentTrigSource_atom0,
IfxGtm_Trig_SentTrigSource_atom1,
IfxGtm_Trig_SentTrigSource_atom2,
IfxGtm_Trig_SentTrigSource_atom3,
IfxGtm_Trig_SentTrigSource_tom0,
IfxGtm_Trig_SentTrigSource_tom1,
IfxGtm_Trig_SentTrigSource_count
}
Enum for SENT trigger source. More...

Functions

IFX_EXTERN boolean | IfxGtm_Trig_fromDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
IFX_EXTERN void | IfxGtm_Trig_toDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
IFX_EXTERN boolean | IfxGtm_Trig_toVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
IFX_EXTERN boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Detailed Description

GTM TRIG details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Trig.h.


iLLD_TC26B: HSSL

Modules | Files
HSSL
iLLD
Collaboration diagram for HSSL:

Modules

Implementation
Standard Driver
How to use the HSSL Interface driver?
HSSL

Files

file | IfxHssl_cfg.h
HSSL on-chip implementation data.
file | IfxHssl_Hssl.h
HSSL HSSL details.
file | IfxHssl.h
HSSL basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » HSSL
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations | Variables
Enumerations
iLLD » HSSL » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_hsctIndex {
IfxHssl_hsctIndex_none = -1,
IfxHssl_hsctIndex_0 = 0
}
List of the available Hsct resources. More...
enum IfxHssl_hsslIndex {
IfxHssl_hsslIndex_none = -1,
IfxHssl_hsslIndex_0 = 0
}
List of the available Hssl resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_hsctIndex

enum IfxHssl_hsctIndex

List of the available Hsct resources.

Enumerator
IfxHssl_hsctIndex_none | Not Selected.
IfxHssl_hsctIndex_0 | HSCT index 0.

Definition at line 63 of file IfxHssl_cfg.h.

◆ IfxHssl_hsslIndex

enum IfxHssl_hsslIndex

List of the available Hssl resources.

Enumerator
IfxHssl_hsslIndex_none | Not Selected.
IfxHssl_hsslIndex_0 | HSSL index 0.

Definition at line 71 of file IfxHssl_cfg.h.

Variable Documentation

◆ IfxHssl_cfg_hsctIndexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]

Definition at line 86 of file IfxHssl_cfg.h.

◆ IfxHssl_cfg_hsslIndexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]

Definition at line 88 of file IfxHssl_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » HSSL
Collaboration diagram for Standard Driver:

Modules

Enumerations
Hsct Functions
Data Structures
Hssl Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » HSSL » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_ChannelId {
IfxHssl_ChannelId_0,
IfxHssl_ChannelId_1,
IfxHssl_ChannelId_2,
IfxHssl_ChannelId_3
}
channel selection More...
enum IfxHssl_ClockFrequencyRate {
IfxHssl_ClockFrequencyRate_20Mhz = 0,
IfxHssl_ClockFrequencyRate_10Mhz = 1
}
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF. More...
enum IfxHssl_Command {
IfxHssl_Command_noAction = 0,
IfxHssl_Command_readFrame = 1,
IfxHssl_Command_writeFrame = 2,
IfxHssl_Command_triggerFrame = 3
}
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT More...
enum IfxHssl_ControlCommand {
IfxHssl_ControlCommand_ping = 0,
IfxHssl_ControlCommand_highSpeedClockStart = 2,
IfxHssl_ControlCommand_highSpeedClockStop = 4,
IfxHssl_ControlCommand_lowSpeedTransmission = 8,
IfxHssl_ControlCommand_highSpeedTransmission = 16,
IfxHssl_ControlCommand_lowSpeedReception = 32,
IfxHssl_ControlCommand_mediumSpeedReception = 64,
IfxHssl_ControlCommand_highSpeedReception = 128,
IfxHssl_ControlCommand_enableReception = 49,
IfxHssl_ControlCommand_disableReception = 50,
IfxHssl_ControlCommand_turnOnClockTestMode = 52,
IfxHssl_ControlCommand_turnOffClockTestMode = 56,
IfxHssl_ControlCommand_turnOnPayloadLoopback = 255
}
predefined control command payload values More...
enum IfxHssl_DataLength {
IfxHssl_DataLength_8bit = 0,
IfxHssl_DataLength_16bit = 1,
IfxHssl_DataLength_32bit = 2
}
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN. More...
enum IfxHssl_Hsct_InterruptSource {
IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF,
IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF,
IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF,
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF,
IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF,
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF,
IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF,
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF,
IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF,
IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF
}
HSCT interrupt source Definition in Ifx_HSCT.IRQ. More...
enum IfxHssl_Hsct_SleepMode {
IfxHssl_Hsct_SleepMode_enable = 0,
IfxHssl_Hsct_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS. More...
enum IfxHssl_Hssl_SleepMode {
IfxHssl_Hssl_SleepMode_enable = 0,
IfxHssl_Hssl_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS. More...
enum IfxHssl_InterfaceMode {
IfxHssl_InterfaceMode_master = 0,
IfxHssl_InterfaceMode_slave = 1
}
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM More...
enum IfxHssl_MasterModeRxSpeed {
IfxHssl_MasterModeRxSpeed_lowSpeed = 0,
IfxHssl_MasterModeRxSpeed_mediumSpeed = 1,
IfxHssl_MasterModeRxSpeed_highSpeed = 2
}
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED More...
enum IfxHssl_MasterModeTxSpeed {
IfxHssl_MasterModeTxSpeed_lowSpeed = 0,
IfxHssl_MasterModeTxSpeed_highSpeed = 2
}
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED More...
enum IfxHssl_PllReferenceClock {
IfxHssl_PllReferenceClock_hsctSystemClockInput = 0,
IfxHssl_PllReferenceClock_oscillatorInput = 1
}
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN. More...
enum IfxHssl_StreamingMode {
IfxHssl_StreamingMode_continuous = 0,
IfxHssl_StreamingMode_single = 1
}
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR More...
enum IfxHssl_SuspendMode {
IfxHssl_SuspendMode_none = 0,
IfxHssl_SuspendMode_hard = 1,
IfxHssl_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_ChannelId

enum IfxHssl_ChannelId

channel selection

Enumerator
IfxHssl_ChannelId_0 | Channel 0.
IfxHssl_ChannelId_1 | Channel 1.
IfxHssl_ChannelId_2 | Channel 2.
IfxHssl_ChannelId_3 | Channel 3.

Definition at line 57 of file IfxHssl.h.

◆ IfxHssl_ClockFrequencyRate

enum IfxHssl_ClockFrequencyRate

SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF.

Enumerator
IfxHssl_ClockFrequencyRate_20Mhz | SysClk/ RefClk is 20 MHz (Divider 1/1)
IfxHssl_ClockFrequencyRate_10Mhz | SysClk/ RefClk is 10 MHz (Divider 1/2)

Definition at line 68 of file IfxHssl.h.

◆ IfxHssl_Command

enum IfxHssl_Command

communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT

Enumerator
IfxHssl_Command_noAction | command no action
IfxHssl_Command_readFrame | command read frame
IfxHssl_Command_writeFrame | command write frame
IfxHssl_Command_triggerFrame | command trigger frame

Definition at line 77 of file IfxHssl.h.

◆ IfxHssl_ControlCommand

enum IfxHssl_ControlCommand

predefined control command payload values

Enumerator
IfxHssl_ControlCommand_ping | ping (send by master. Slave sends back a fixed 32-bit payload result.)
IfxHssl_ControlCommand_highSpeedClockStart | slave interface clock multiplier start (in preparation for high speed mode)
IfxHssl_ControlCommand_highSpeedClockStop | slave interface clock multiplier stop (after fallback from high speed mode)
IfxHssl_ControlCommand_lowSpeedTransmission | select low speed mode for transfers from the Master to the Slave
IfxHssl_ControlCommand_highSpeedTransmission | select high speed mode for transfers from the Master to the Slave
IfxHssl_ControlCommand_lowSpeedReception | select low speed mode for transfers from the Slave to the Master
IfxHssl_ControlCommand_mediumSpeedReception | select medium speed mode for transfers from the Slave to the master
IfxHssl_ControlCommand_highSpeedReception | select high speed mode for transfers from the Slave to the master
IfxHssl_ControlCommand_enableReception | enable Slave interface transmitter
IfxHssl_ControlCommand_disableReception | disable Slave interface transmitter
IfxHssl_ControlCommand_turnOnClockTestMode | turn on clock test mode
IfxHssl_ControlCommand_turnOffClockTestMode | turn off clock test mode
IfxHssl_ControlCommand_turnOnPayloadLoopback | turn on payload loopback

Definition at line 87 of file IfxHssl.h.

◆ IfxHssl_DataLength

enum IfxHssl_DataLength

Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN.

Enumerator
IfxHssl_DataLength_8bit | 8 bit
IfxHssl_DataLength_16bit | 16 bit
IfxHssl_DataLength_32bit | 32 bit

Definition at line 107 of file IfxHssl.h.

◆ IfxHssl_Hsct_InterruptSource

enum IfxHssl_Hsct_InterruptSource

HSCT interrupt source Definition in Ifx_HSCT.IRQ.

Enumerator
IfxHssl_Hsct_InterruptSource_headerError | Header error detected.
IfxHssl_Hsct_InterruptSource_payloadError | Payload error detected.
IfxHssl_Hsct_InterruptSource_commandError | HSCT Command error.
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend | Interface control frame send.
IfxHssl_Hsct_InterruptSource_speedModeSwitchError | Speed mode switch error.
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished | Unsolicited message frame send finished.
IfxHssl_Hsct_InterruptSource_pllLockLosterror | Pll lock lost error.
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived | Unsolicited message received.
IfxHssl_Hsct_InterruptSource_pingAnswerReceived | PING Answer Received.
IfxHssl_Hsct_InterruptSource_txTransferError | TX transfer error occurred on a disabled TX channel.
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow | Synchronization FIFO overflow (in RX direction)
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow | Synchronization FIFO underflow (in TX direction)

Definition at line 117 of file IfxHssl.h.

◆ IfxHssl_Hsct_SleepMode

enum IfxHssl_Hsct_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS.

Enumerator
IfxHssl_Hsct_SleepMode_enable | enables sleep mode
IfxHssl_Hsct_SleepMode_disable | disables sleep mode

Definition at line 139 of file IfxHssl.h.

◆ IfxHssl_Hssl_SleepMode

enum IfxHssl_Hssl_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS.

Enumerator
IfxHssl_Hssl_SleepMode_enable | enables sleep mode
IfxHssl_Hssl_SleepMode_disable | disables sleep mode

Definition at line 148 of file IfxHssl.h.

◆ IfxHssl_InterfaceMode

enum IfxHssl_InterfaceMode

interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM

Enumerator
IfxHssl_InterfaceMode_master | master IF mode
IfxHssl_InterfaceMode_slave | slave IF mode

Definition at line 157 of file IfxHssl.h.

◆ IfxHssl_MasterModeRxSpeed

enum IfxHssl_MasterModeRxSpeed

master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED

Enumerator
IfxHssl_MasterModeRxSpeed_lowSpeed | low speed
IfxHssl_MasterModeRxSpeed_mediumSpeed | medium speed
IfxHssl_MasterModeRxSpeed_highSpeed | high speed

Definition at line 166 of file IfxHssl.h.

◆ IfxHssl_MasterModeTxSpeed

enum IfxHssl_MasterModeTxSpeed

master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED

Enumerator
IfxHssl_MasterModeTxSpeed_lowSpeed | low speed
IfxHssl_MasterModeTxSpeed_highSpeed | high speed

Definition at line 176 of file IfxHssl.h.

◆ IfxHssl_PllReferenceClock

enum IfxHssl_PllReferenceClock

PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN.

Enumerator
IfxHssl_PllReferenceClock_hsctSystemClockInput | hsct system clock input (HSCT SysClk_i)
IfxHssl_PllReferenceClock_oscillatorInput | oscillator input

Definition at line 185 of file IfxHssl.h.

◆ IfxHssl_StreamingMode

enum IfxHssl_StreamingMode

streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR

Enumerator
IfxHssl_StreamingMode_continuous | streaming mode continuous (with two memory blocks)
IfxHssl_StreamingMode_single | streaming mode single (with one memory block)

Definition at line 194 of file IfxHssl.h.

◆ IfxHssl_SuspendMode

enum IfxHssl_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxHssl_SuspendMode_none | No suspend.
IfxHssl_SuspendMode_hard | Hard Suspend.
IfxHssl_SuspendMode_soft | Soft Suspend.

Definition at line 202 of file IfxHssl.h.


iLLD_TC26B: Hsct Functions

Functions
Hsct Functions
iLLD » HSSL » Standard Driver
Collaboration diagram for Hsct Functions:

Functions

IFX_INLINE void | IfxHssl_clearHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_disableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_enableHsctInterrupt (Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt. More...
IFX_INLINE void | IfxHssl_enableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsctInterruptFlagStatus (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status. More...
IFX_INLINE void | IfxHssl_setHsctSleepMode (Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE uint32 | IfxHssl_getHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct)
Get the last received unsolicited status message. More...
IFX_INLINE void | IfxHssl_sendHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message. More...
IFX_INLINE void | IfxHssl_setHsctRxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed. More...
IFX_INLINE void | IfxHssl_setHsctTxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed. More...
IFX_INLINE void | IfxHssl_enableHsctTransmitPath (Ifx_HSCT *hsct)
Enable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_enableHsctReceivePath (Ifx_HSCT *hsct)
Enable hsct receive path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctTransmitPath (Ifx_HSCT *hsct)
Disable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctReceivePath (Ifx_HSCT *hsct)
Disable hsct receive path in master interface. More...
IFX_EXTERN void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
IFX_EXTERN void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
IFX_EXTERN Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IFX_EXTERN IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
IFX_EXTERN void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...

Detailed Description

Function Documentation

◆ IfxHssl_clearHsctInterruptFlag()

IFX_INLINE void IfxHssl_clearHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Clears the HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 667 of file IfxHssl.h.

◆ IfxHssl_disableHsctInterruptFlag()

IFX_INLINE void IfxHssl_disableHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Enables HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 694 of file IfxHssl.h.

◆ IfxHssl_disableHsctModule()

IFX_EXTERN void IfxHssl_disableHsctModule ( Ifx_HSCT * hsct )

Disables hsct module.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 36 of file IfxHssl.c.

◆ IfxHssl_disableHsctReceivePath()

IFX_INLINE void IfxHssl_disableHsctReceivePath ( Ifx_HSCT * hsct )

Disable hsct receive path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 939 of file IfxHssl.h.

◆ IfxHssl_disableHsctTransmitPath()

IFX_INLINE void IfxHssl_disableHsctTransmitPath ( Ifx_HSCT * hsct )

Disable hsct transmit path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 933 of file IfxHssl.h.

◆ IfxHssl_enableHsctInterrupt()

IFX_INLINE void IfxHssl_enableHsctInterrupt | ( | Ifx_HSCT * | hsct,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSCT interrupt.

Parameters
hsct | pointer to HSCT registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 721 of file IfxHssl.h.

◆ IfxHssl_enableHsctInterruptFlag()

IFX_INLINE void IfxHssl_enableHsctInterruptFlag | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Enables HSCT interrupt flag.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
None

Definition at line 730 of file IfxHssl.h.

◆ IfxHssl_enableHsctModule()

IFX_EXTERN void IfxHssl_enableHsctModule ( Ifx_HSCT * hsct )

Enables hsct module.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 54 of file IfxHssl.c.

Referenced by IfxHssl_Hssl_initHsctModule().

◆ IfxHssl_enableHsctReceivePath()

IFX_INLINE void IfxHssl_enableHsctReceivePath ( Ifx_HSCT * hsct )

Enable hsct receive path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 927 of file IfxHssl.h.

◆ IfxHssl_enableHsctTransmitPath()

IFX_INLINE void IfxHssl_enableHsctTransmitPath ( Ifx_HSCT * hsct )

Enable hsct transmit path in master interface.

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 921 of file IfxHssl.h.

◆ IfxHssl_getHsctAddress()

IFX_EXTERN Ifx_HSCT* IfxHssl_getHsctAddress ( IfxHssl_hsctIndex hsct )
Parameters
hsct Resource index of the HSCT
Returns
HSCT module register address

Definition at line 72 of file IfxHssl.c.

◆ IfxHssl_getHsctIndex()

IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex ( Ifx_HSCT * hsct )

API to get the resource index of the HSCT specified.

Returns
Resource index of the HSCT

Definition at line 89 of file IfxHssl.c.

◆ IfxHssl_getHsctInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_InterruptSource | source
 | ) |  |

Returns the HSCT interrupt flag status.

Parameters
hsct | pointer to HSCT registers
source | HSCT interrupt source
Returns
Status (TRUE / FALSE)

Definition at line 808 of file IfxHssl.h.

◆ IfxHssl_getHsctSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsctSrcPointer ( Ifx_HSCT * hsct )

Returns the SRC pointer for HSCT.

Parameters
hsct pointer to HSCT registers
Returns
SRC pointer for HSCT

Definition at line 109 of file IfxHssl.c.

Referenced by IfxHssl_enableHsctInterrupt().

◆ IfxHssl_getHsctUnsolicitedStatusMessage()

IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage ( Ifx_HSCT * hsct )

Get the last received unsolicited status message.

Parameters
hsct pointer to HSCT registers
Returns
Get the unsolicited status message.

Definition at line 897 of file IfxHssl.h.

◆ IfxHssl_resetHsctKernel()

IFX_EXTERN void IfxHssl_resetHsctKernel ( Ifx_HSCT * hsct )

resets HSCT kernel

Parameters
hsct pointer to HSCT registers
Returns
None

Definition at line 188 of file IfxHssl.c.

◆ IfxHssl_sendHsctUnsolicitedStatusMessage()

IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage | ( | Ifx_HSCT * | hsct,
 |  | uint32 | message
 | ) |  |

Send the unsolicited status message.

Parameters
hsct | pointer to HSCT registers
message | Unsolicited status message to be sent
Returns
None

Definition at line 903 of file IfxHssl.h.

◆ IfxHssl_setHsctRxLinkSpeed()

IFX_INLINE void IfxHssl_setHsctRxLinkSpeed | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_MasterModeRxSpeed | rxSpeed
 | ) |  |

Set the HSCT RX link speed.

Parameters
hsct | pointer to HSCT registers
rxSpeed | Speed for Rx link
Returns
None

Definition at line 909 of file IfxHssl.h.

◆ IfxHssl_setHsctSleepMode()

IFX_INLINE void IfxHssl_setHsctSleepMode | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_Hsct_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
hsct | pointer to HSCT registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 850 of file IfxHssl.h.

◆ IfxHssl_setHsctTxLinkSpeed()

IFX_INLINE void IfxHssl_setHsctTxLinkSpeed | ( | Ifx_HSCT * | hsct,
 |  | IfxHssl_MasterModeTxSpeed | txSpeed
 | ) |  |

Set the HSCT TX link speed.

Parameters
hsct | pointer to HSCT registers
txSpeed | Speed for Tx link
Returns
None

Definition at line 915 of file IfxHssl.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » HSSL » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxHssl_Hsct
HSCT module handle. More...
struct | IfxHssl_Hsct_Config
Configuration structure of the HSCT module. More...

Detailed Description

Data Structure Documentation

◆ IfxHssl_Hsct

struct IfxHssl_Hsct

HSCT module handle.

Definition at line 243 of file IfxHssl.h.

Data Fields
Ifx_HSCT * | hsct | pointer to HSCT registers
boolean | loopBack | loopc back selection

◆ IfxHssl_Hsct_Config

struct IfxHssl_Hsct_Config

Configuration structure of the HSCT module.

Definition at line 251 of file IfxHssl.h.

Data Fields
boolean | highSpeedMode | high speed mode selection
Ifx_HSCT * | hsct | pointer to HSCT registers
IfxHssl_InterfaceMode | interfaceMode | interface mode (master IF /slave IF)
boolean | loopBack | loopc back selection


iLLD_TC26B: Hssl Functions

Functions
Hssl Functions
iLLD » HSSL » Standard Driver
Collaboration diagram for Hssl Functions:

Functions

IFX_INLINE void | IfxHssl_clearHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearInitialiseModeFlag (Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status. More...
IFX_INLINE void | IfxHssl_disableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_disableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableAllErrorFlags (Ifx_HSSL *hssl)
Enables all error flags. More...
IFX_INLINE void | IfxHssl_enableHsslCOKInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslERRInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslEXIInterrupt (Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslRDIInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslTRGInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel. More...
IFX_INLINE uint32 | IfxHssl_getAllMflagsStatus (Ifx_HSSL *hssl)
Returns the status of all MFLAGS status. More...
IFX_INLINE uint16 | IfxHssl_getCurrentCount (Ifx_HSSL *hssl)
Returns the Current Count value. More...
IFX_INLINE boolean | IfxHssl_getHsslChannelErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsslGloabalErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getInitialiseModeFlagStatus (Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status. More...
IFX_INLINE uint16 | IfxHssl_getReloadCount (Ifx_HSSL *hssl)
Returns the Reload Count value. More...
IFX_INLINE boolean | IfxHssl_isModuleSuspended (Ifx_HSSL *hssl)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxHssl_setHsslSleepMode (Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxHssl_setInitialiseModeFlag (Ifx_HSSL *hssl)
Sets the Initialise Mode Flag. More...
IFX_INLINE void | IfxHssl_setReloadCount (Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count. More...
IFX_INLINE void | IfxHssl_setSuspendMode (Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxHssl_setTimeoutReloadValue (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value. More...
IFX_EXTERN void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
IFX_EXTERN void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
IFX_EXTERN Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IFX_EXTERN IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
IFX_EXTERN void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

Function Documentation

◆ IfxHssl_clearHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Clears the HSSl channel error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 674 of file IfxHssl.h.

◆ IfxHssl_clearHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Clears the HSSl global error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 681 of file IfxHssl.h.

◆ IfxHssl_clearInitialiseModeFlag()

IFX_INLINE void IfxHssl_clearInitialiseModeFlag ( Ifx_HSSL * hssl )

Clears the Initialise Mode Flag status.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 688 of file IfxHssl.h.

◆ IfxHssl_disableHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 701 of file IfxHssl.h.

◆ IfxHssl_disableHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 708 of file IfxHssl.h.

◆ IfxHssl_disableHsslModule()

IFX_EXTERN void IfxHssl_disableHsslModule ( Ifx_HSSL * hssl )

DIsables the hssl module.

Parameters
hssl pointer to HSSl registers
Returns
None

Definition at line 45 of file IfxHssl.c.

◆ IfxHssl_enableAllErrorFlags()

IFX_INLINE void IfxHssl_enableAllErrorFlags ( Ifx_HSSL * hssl )

Enables all error flags.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 715 of file IfxHssl.h.

◆ IfxHssl_enableHsslChannelErrorInterruptFlag()

IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
None

Definition at line 746 of file IfxHssl.h.

◆ IfxHssl_enableHsslCOKInterrupt()

IFX_INLINE void IfxHssl_enableHsslCOKInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL COK interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 737 of file IfxHssl.h.

◆ IfxHssl_enableHsslERRInterrupt()

IFX_INLINE void IfxHssl_enableHsslERRInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL ERR interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 753 of file IfxHssl.h.

◆ IfxHssl_enableHsslEXIInterrupt()

IFX_INLINE void IfxHssl_enableHsslEXIInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL EXI interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 762 of file IfxHssl.h.

◆ IfxHssl_enableHsslGlobalErrorInterruptFlag()

IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Enables the HSSl global error interrupt flag, which trggers the EXI interrupt.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
None

Definition at line 771 of file IfxHssl.h.

◆ IfxHssl_enableHsslModule()

IFX_EXTERN void IfxHssl_enableHsslModule ( Ifx_HSSL * hssl )

Enables the hssl module.

Parameters
hssl pointer to HSSl registers
Returns
None

Definition at line 63 of file IfxHssl.c.

Referenced by IfxHssl_Hssl_initHsslModule().

◆ IfxHssl_enableHsslRDIInterrupt()

IFX_INLINE void IfxHssl_enableHsslRDIInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL RDI interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 778 of file IfxHssl.h.

◆ IfxHssl_enableHsslTRGInterrupt()

IFX_INLINE void IfxHssl_enableHsslTRGInterrupt | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables HSSL TRG interrupt of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 787 of file IfxHssl.h.

◆ IfxHssl_getAllMflagsStatus()

IFX_INLINE uint32 IfxHssl_getAllMflagsStatus ( Ifx_HSSL * hssl )

Returns the status of all MFLAGS status.

Parameters
hssl pointer to HSSL registers
Returns
MFLAGS status

Definition at line 796 of file IfxHssl.h.

◆ IfxHssl_getCurrentCount()

IFX_INLINE uint16 IfxHssl_getCurrentCount ( Ifx_HSSL * hssl )

Returns the Current Count value.

Parameters
hssl pointer to HSSL registers
Returns
Current Count value

Definition at line 802 of file IfxHssl.h.

◆ IfxHssl_getHsslAddress()

IFX_EXTERN Ifx_HSSL* IfxHssl_getHsslAddress ( IfxHssl_hsslIndex hssl )
Parameters
hssl Resource index of the HSSL
Returns
HSSL module register address

Definition at line 116 of file IfxHssl.c.

◆ IfxHssl_getHsslChannelErrorInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_ERRInterruptSource | source,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Clears the HSSl channel error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL channel error interrupt source
channelId | HSSL channel number
Returns
Status (TRUE / FALSE)

Definition at line 814 of file IfxHssl.h.

◆ IfxHssl_getHsslCOKSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslCOKSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL COK of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL COK interrupt of specific channel

Definition at line 133 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslCOKInterrupt().

◆ IfxHssl_getHsslERRSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslERRSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL ERR of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL ERR interrupt of specific channel

Definition at line 140 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslERRInterrupt().

◆ IfxHssl_getHsslEXISrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslEXISrcPointer ( Ifx_HSSL * hssl )

Returns the SRC pointer for HSSL EXI interrupt.

Parameters
hssl pointer to HSSl registers
Returns
SRC pointer for HSSL EXI interrupt

Definition at line 147 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslEXIInterrupt().

◆ IfxHssl_getHsslGloabalErrorInterruptFlagStatus()

IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_EXIInterruptSource | source
 | ) |  |

Clears the HSSl global error interrupt flag.

Parameters
hssl | pointer to HSSl registers
source | HSSL global error interrupt source
Returns
Status (TRUE / FALSE)

Definition at line 820 of file IfxHssl.h.

◆ IfxHssl_getHsslIndex()

IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex ( Ifx_HSSL * hssl )

API to get the resource index of the HSSL specified.

Returns
Resource index of the HSSL

Definition at line 154 of file IfxHssl.c.

◆ IfxHssl_getHsslRDISrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslRDISrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL COK of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL RDI interrupt of specific channel

Definition at line 174 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslRDIInterrupt().

◆ IfxHssl_getHsslTRGSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxHssl_getHsslTRGSrcPointer | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId
 | ) |  |

Returns the SRC pointer for HSSL TRG of specified channel.

Parameters
hssl | pointer to HSSl registers
channelId | HSSL channel number
Returns
SRC pointer for HSSL TRG interrupt of specific channel

Definition at line 181 of file IfxHssl.c.

Referenced by IfxHssl_enableHsslTRGInterrupt().

◆ IfxHssl_getInitialiseModeFlagStatus()

IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus ( Ifx_HSSL * hssl )

Returns the Initialise Mode Flag status.

Parameters
hssl pointer to HSSL registers
Returns
status : TRUE/FALSE

Definition at line 826 of file IfxHssl.h.

◆ IfxHssl_getReloadCount()

IFX_INLINE uint16 IfxHssl_getReloadCount ( Ifx_HSSL * hssl )

Returns the Reload Count value.

Parameters
hssl pointer to HSSL registers
Returns
Current Count value

Definition at line 832 of file IfxHssl.h.

◆ IfxHssl_isModuleSuspended()

IFX_INLINE boolean IfxHssl_isModuleSuspended ( Ifx_HSSL * hssl )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
hssl Pointer to HSSL module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 838 of file IfxHssl.h.

◆ IfxHssl_resetHsslKernel()

IFX_EXTERN void IfxHssl_resetHsslKernel ( Ifx_HSSL * hssl )

resets the HSSL kernel

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 207 of file IfxHssl.c.

◆ IfxHssl_setHsslSleepMode()

IFX_INLINE void IfxHssl_setHsslSleepMode | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_Hssl_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
hssl | pointer to HSSL registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 859 of file IfxHssl.h.

◆ IfxHssl_setInitialiseModeFlag()

IFX_INLINE void IfxHssl_setInitialiseModeFlag ( Ifx_HSSL * hssl )

Sets the Initialise Mode Flag.

Parameters
hssl pointer to HSSL registers
Returns
None

Definition at line 868 of file IfxHssl.h.

◆ IfxHssl_setReloadCount()

IFX_INLINE void IfxHssl_setReloadCount | ( | Ifx_HSSL * | hssl,
 |  | uint16 | reloadValue
 | ) |  |

Sets the reload Count.

Parameters
hssl | pointer to HSSL registers
reloadValue | Reload Value
Returns
None

Definition at line 874 of file IfxHssl.h.

◆ IfxHssl_setSuspendMode()

IFX_INLINE void IfxHssl_setSuspendMode | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
hssl | Pointer to HSSL module registers
mode | Module suspend mode
Returns
None

Definition at line 880 of file IfxHssl.h.

◆ IfxHssl_setTimeoutReloadValue()

IFX_INLINE void IfxHssl_setTimeoutReloadValue | ( | Ifx_HSSL * | hssl,
 |  | IfxHssl_ChannelId | channelId,
 |  | uint8 | timeoutValue
 | ) |  |

Sets the Timeout Reload Value.

Parameters
hssl | pointer to HSSL registers
channelId | HSSL channel number
timeoutValue | Timeout Value
Returns
None

Definition at line 891 of file IfxHssl.h.


iLLD_TC26B: How to use the HSSL Interface driver?

How to use the HSSL Interface driver?
iLLD » HSSL
Collaboration diagram for How to use the HSSL Interface driver?:

The HSSL interface driver provides a default HSSL/HSCT configuration for point to point communication at two transfer speeds, 5MBaud (low speed) and 320MBaud (high speed). It also supports streaming transfers of data a memory block at both low and high speeds.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Hssl/Hssl/IfxHssl_Hssl.h>

Variables

Declare the HSSL handle, HSCT handle and channel array as global variables in your C code:

// used globally
static IfxHssl_Hssl hssl;
static IfxHssl_Hsct hsct;
IfxHssl_Hssl_Channel hsslChannel[4];
__attribute__ ((aligned(256))) uint32 txData[80]; // needs to be declared globally in case of streaming transfers

Module Initialisation

The module initialisation can be done as follows:

// create module config
IfxHssl_Hsct_Config hsctConfig;
IfxHssl_Hssl_initHsctModuleConfig(&hsctConfig, &MODULE_HSCT);
// select the interface mode (in case of slave)
hsctConfig.interfaceMode = IfxHssl_InterfaceMode_slave;
// select the high speed mode if required
hsctConfig.highSpeedMode = TRUE;
// initialize module
// IfxHssl_Hsct hsct; defined globally
IfxHssl_Hssl_initHsctModule(&hsct, &hsctConfig);
// create module config
IfxHssl_Hssl_Config hsslConfig;
IfxHssl_Hssl_initHsslModuleConfig(&hsslConfig, &MODULE_HSSL);
// IfxHssl_Hssl hssl; defined globally
IfxHssl_Hssl_initHsslModule(&hssl, &hsslConfig);

If application intends to explicitly configure the pins for HSCT module IFXHSSL_HSCT_DISABLE_PINCONFIG macro should be defined in the application. The explicit pin assignment should be done prior to IfxHssl_Hssl_initHsctModule().

Channel Initialisation

The Channel initialisation can be done as follows:

// create HSSL channel config
IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
// initialize the channels
// IfxHssl_Hssl_Channel hsslChannel[4]; defined globally
for(int i=0; i<4; ++i)
{
hsslChannelConfig.channelId = (IfxHssl_ChannelId)i;
IfxHssl_Hssl_initChannel(&hsslChannel[i], &hsslChannelConfig);
}

Changing HSCT link speed

The link speed change can be done as follows

As per the above settings the HSCT master is in High speed reception and transmission.

The pseudo code for setting the target to High speed is as below

// Set the Tx link speed of the master to Low speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
// Enable reception at the Slave
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_enableReception);
// Send interface commmand to change Rx to High speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedReception);
// Send interface commmand to change Tx to High speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedTransmission);
// Set the Tx link speed of the master to High speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_highSpeed);

The pseudo code for setitng the target to Low speed from High speed (ie. if hsctConfig.highSpeedMode is set to TRUE).

// Set the Tx link speed of master to Low speed
IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
// Send interface command to change Rx to low speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedReception);
// Set the Rx link speed of master to Low speed
IfxHssl_setHsctRxLinkSpeed(&hsct, IfxHssl_MasterModeRxSpeed_lowSpeed);
// Send interface command to change Tx to low speed at the target
IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedTransmission);

The HSSL is ready for use now!

Data Transfers

Simple Transfers

The HSSL driver provides simple to use data transfer functions,

It supports direct writing of 8/16/32 bit data from the initiator into a target's register, as well as reading a value from the target

// write some data to remote location:
IfxHssl_Hssl_write(&hsslChannel[0], 0x70000000, 0x12345678, IfxHssl_DataLength_32bit);
// wait for the acknowledgement
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
{
if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
{
IfxHssl_Hssl_checkErrors(&hssl);
break;
}
}

A simple to use receive function is available as well.

// read some data from remote location:
IfxHssl_Hssl_read(&hsslChannel[0], 0x70000000, IfxHssl_DataLength_32bit);
// wait for the acknowledgement
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
{
if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
{
IfxHssl_Hssl_checkErrors(&hssl);
break;
}
}
// read data from the register
uint32 dataL = IfxHssl_Hssl_getReadData(&hsslChannel[0]);

Streaming Transfers

HSSL driver also supports streaming transfers of data as a memory block at both low and high speeds.

Preparing the target for streaming with the desired memory location where the data needs to be transfered

// choose a channel other than channel2 for register access
// prepare streaming of single memory block
IfxHssl_Hssl_prepareStream(&hsslChannel[0], 0x70000000, 10);

Stream the memory block

Usage Example:

// __attribute__ ((aligned(256))) uint32 txData[80]; expected to be declared globally
// for single block streaming transfer
// change the txData address to global address before passing it to the API
// IfxHssl_Hssl_writeStream(&hssl, (uint32 *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)txData), 10);
IfxHssl_Hssl_writeStream(&hssl, txData, 10);
// wait until the streaming is finished
while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[2]) != IfxHssl_Hssl_Status_ok )
{}

DMA Operated Command Queues

It makes sense to do this from outside the driver, by initialising the DMA after HSSL, and send command queues through linked lists here is an example of how to use DMA operated command queues.

Include following header files into your C code:

#include <Hssl/Hssl/IfxHssl_Hssl.h>
#include <Dma/Dma/IfxDma_Dma.h>
#include <Scu/Std/IfxScuWdt.h>

Declare the HSSL handle, HSCT handle, HSSL channel handle and DMA channel handle as global variables in your C code:

// used globally
static IfxHssl_Hssl hssl;
static IfxHssl_Hsct hsct;
IfxHssl_Hssl_Channel hsslChannel;
// DMA channel handle
IfxDma_Dma_Channel chn;
// Linked List storage
// IMPORTANT: it has to be aligned to an 64bit address, otherwise DMA can't read it
#define NUM_LINKED_LIST_ITEMS 3
__attribute__ ((aligned(64))) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
// transfer these values to channel 0 : HSSL_IWD0, HSSL_ICON0, HSSL_IRWA0 registers via linked lists
#define NUM_TRANSFERED_WORDS 3
// three write command queues with different data and to different addresses on slave
uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS] = {
{0xC0CAC01A, 0xFF0A0000, 0x70000000},
{0xBA5EBA11, 0xFF0A0000, 0x70000010},
{0xDEADBEEF, 0xFF0A0000, 0x70000020}
};
// three command queues to the same channel 0
const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
(uint32)&HSSL_I0_IWD,
(uint32)&HSSL_I0_IWD,
(uint32)&HSSL_I0_IWD
};

Initialise the hssl module, see Module Initialisation

Initialise the hssl channel

// create HSSL channel config
IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
// initialize the channel 0
// IfxHssl_Hssl_Channel hsslChannel; defined globally
hsslChannelConfig.channelId = 0;
IfxHssl_Hssl_initChannel(&hsslChannel, &hsslChannelConfig);

Build a linked list

// create module config
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
// initialize module
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
// initial channel configuration
IfxDma_Dma_ChannelConfig cfg;
IfxDma_Dma_initChannelConfig(&cfg, &dma);
// following settings are used by all transactions
cfg.transferCount = NUM_TRANSFERED_WORDS;
cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
// generate linked list items
for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
cfg.destinationAddress = destinationAddresses[i];
// address to next transaction set
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
// transfer first transaction set into DMA channel
if( i == 0 ) {
IfxDma_Dma_initChannel(&chn, &cfg);
}
// transfer into linked list storage
IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
if( i == 0 ) {
// - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
linkedList[i].CHCSR.B.SIT = 1;
} else {
// - activate SCH (transaction request) for each entry, expect for the first one (linked list terminated here)
linkedList[i].CHCSR.B.SCH = 1;
}
}

The transfer can be started via software with:

// clear service request flag
(IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
// start linked list transaction
IfxDma_Dma_startChannelTransaction(&chn);
// wait for service request which is triggered at the end of linked list transfers
while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );

Interrupts usage

Interrupts can be enabled from the application by using the APIs provided in the driver, there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,
APIs to enable the the enterrupts are also available.

here is an example of how to use the interrupts in HSSL driver.

Using HSCT interrupts

After initialising HSCT module Module Initialisation

choose what flags needs to be enabled for HSCT interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSCT interrupt with desired type of service and priority.

Ifx_HSCT *hsct = &MODULE_HSCT;
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_headerError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_payloadError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_commandError);
IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_speedModeSwitchError);
// enable the HSCT interrupt
IfxHssl_enableHsctInterrupt(hsct, IfxSrc_Tos_cpu0, 4);

Using HSSl interrupts

HSSL global error interrupt (EXI)

After initilaising HSSL module Module Initialisation

choose what flags needs to be enabled for HSSL global error (EXI) interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSSL EXI interrupt with desired type of service and priority

Ifx_HSSL *hssl = &MODULE_HSSL;
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_busAccessError);
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_dataLengthError);
IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_crcError);
// enable the HSSL EXI interrupt
IfxHssl_enableHsslEXIInterrupt(hssl, IfxSrc_Tos_cpu0, 6);

HSSL channel specific error interrupt (ERR)

After initilaising HSSL channel Channel Initialisation

choose what flags needs to be enabled for HSSL channel specific error (ERR) interrupt and call the following function once for each flag by choosing the right flag as parameter,
and after choosing all the flags needed, enable the HSSL ERR interrupt with desired channel, type of service and priority

Ifx_HSSL *hssl = &MODULE_HSSL;
IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_transactionTagError);
IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_timeoutError);
// enable the HSSL ERR interrupt
IfxHssl_enableHsslERRInterrupt(hssl, channelId_0, IfxSrc_Tos_cpu0, 8);

you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts How to define Interrupts?

some additional APIs to clear, disable interrupt flags and get flag status are also available.


iLLD_TC26B: HSSL

Modules
HSSL
iLLD » HSSL
Collaboration diagram for HSSL:

Modules

Data Structures
Enumerations
Module Functions
Channel Functions
Simple Communication
Error Handling
Streaming Communication

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » HSSL » HSSL
Collaboration diagram for Data Structures:

Data Structures

struct | IfxHssl_Hssl_AccessWindow
structure for access windows More...
struct | IfxHssl_Hssl
HSSL Handle. More...
struct | IfxHssl_Hssl_Channel
channel handle More...
struct | IfxHssl_Hssl_ChannelConfig
configuration structure for channel More...
struct | IfxHssl_Hssl_Config
configuration structure of the HSSL module More...

Detailed Description

Data Structure Documentation

◆ IfxHssl_Hssl_AccessWindow

struct IfxHssl_Hssl_AccessWindow

structure for access windows

Definition at line 460 of file IfxHssl_Hssl.h.

Data Fields
uint32 | end | end of the access
uint32 | start | start of the access

◆ IfxHssl_Hssl

struct IfxHssl_Hssl

HSSL Handle.

Definition at line 487 of file IfxHssl_Hssl.h.

Collaboration diagram for IfxHssl_Hssl:
[legend]
Data Fields
IfxHssl_Hssl_errorFlags | errorFlags | structure for error flags
Ifx_HSSL * | hssl | pointer to HSSL register
boolean | loopBack | loop back (enable / disable) for streaming transfers within the microcontroller

◆ IfxHssl_Hssl_Channel

struct IfxHssl_Hssl_Channel

channel handle

Definition at line 496 of file IfxHssl_Hssl.h.

Data Fields
IfxHssl_ChannelId | channelId | channel number (id)
IfxHssl_Hssl_FrameRequest | currentFrameRequest | current frame request
Ifx_HSCT * | hsct | pointer to HSCT registers
Ifx_HSSL * | hssl | pointer to HSSL registers
boolean | loopBack | loopback (enable / disable) for streaming transfers within the microcontroller
IfxHssl_StreamingMode | streamingMode | streaming mode selection ( single / continuous )
boolean | streamingModeOn | streaming mode or command mode

◆ IfxHssl_Hssl_ChannelConfig

struct IfxHssl_Hssl_ChannelConfig

configuration structure for channel

Definition at line 509 of file IfxHssl_Hssl.h.

Data Fields
IfxHssl_ChannelId | channelId | channel number (id)
Ifx_HSCT * | hsct | pointer to HSCT registers
Ifx_HSSL * | hssl | pointer to HSSL registers
boolean | loopBack | loop back (enable / disable) for streaming transfers within the microcontroller
IfxHssl_StreamingMode | streamingMode | streaming mode selection ( single / continuous )

◆ IfxHssl_Hssl_Config

struct IfxHssl_Hssl_Config

configuration structure of the HSSL module

Definition at line 520 of file IfxHssl_Hssl.h.

Collaboration diagram for IfxHssl_Hssl_Config:
[legend]
Data Fields
IfxHssl_Hssl_AccessWindow | accessWindow0 | access window of channel 0
IfxHssl_Hssl_AccessWindow | accessWindow1 | access window of channel 1
IfxHssl_Hssl_AccessWindow | accessWindow2 | access window of channel 2
IfxHssl_Hssl_AccessWindow | accessWindow3 | access window of channel 3
Ifx_HSSL * | hssl | pointer to HSSL registers
uint16 | preDivider | Defines the down-scaled module clock to be used by all channel timeout timers.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » HSSL » HSSL
Collaboration diagram for Enumerations:

Enumerations

enum IfxHssl_Hssl_FrameRequest {
IfxHssl_Hssl_FrameRequest_readFrame = 1,
IfxHssl_Hssl_FrameRequest_writeFrame = 2,
IfxHssl_Hssl_FrameRequest_triggerFrame = 3,
IfxHssl_Hssl_FrameRequest_readId = 4,
IfxHssl_Hssl_FrameRequest_noAction = 5
}
frame request selection More...
enum IfxHssl_Hssl_Status {
IfxHssl_Hssl_Status_ok = 0,
IfxHssl_Hssl_Status_busy = 1,
IfxHssl_Hssl_Status_error = 2
}
module status More...

Detailed Description

Enumeration Type Documentation

◆ IfxHssl_Hssl_FrameRequest

enum IfxHssl_Hssl_FrameRequest

frame request selection

Enumerator
IfxHssl_Hssl_FrameRequest_readFrame | read frame rquest
IfxHssl_Hssl_FrameRequest_writeFrame | write frame rquest
IfxHssl_Hssl_FrameRequest_triggerFrame | trigger frame rquest
IfxHssl_Hssl_FrameRequest_readId | read id request
IfxHssl_Hssl_FrameRequest_noAction | no action

Definition at line 432 of file IfxHssl_Hssl.h.

◆ IfxHssl_Hssl_Status

enum IfxHssl_Hssl_Status

module status

Enumerator
IfxHssl_Hssl_Status_ok | status ok
IfxHssl_Hssl_Status_busy | status busy
IfxHssl_Hssl_Status_error | status error

Definition at line 443 of file IfxHssl_Hssl.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » HSSL » HSSL
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_initHsctModule()

IFX_EXTERN void IfxHssl_Hssl_initHsctModule | ( | IfxHssl_Hsct * | hsct,
 |  | const IfxHssl_Hsct_Config * | config
 | ) |  |

Initialises the module.

Parameters
hsct | HSCT Handle
config | configuration structure of the HSCT module
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 140 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsctModuleConfig()

IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig | ( | IfxHssl_Hsct_Config * | config,
 |  | Ifx_HSCT * | hsct
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the HSCT module
hsct | pointer to HSCT register
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 227 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsslModule()

IFX_EXTERN void IfxHssl_Hssl_initHsslModule | ( | IfxHssl_Hssl * | hssl,
 |  | const IfxHssl_Hssl_Config * | config
 | ) |  |

Initialises the Hssl module.

Parameters
hssl | HSSL handle
config | configuration structure of the module
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 241 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initHsslModuleConfig()

IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig | ( | IfxHssl_Hssl_Config * | config,
 |  | Ifx_HSSL * | hssl
 | ) |  |

Fills the config structure with default values.

Parameters
config | configuration structure of the module
hssl | pointer to HSSL registers
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 272 of file IfxHssl_Hssl.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » HSSL » HSSL
Collaboration diagram for Channel Functions:

Functions

IFX_EXTERN void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_initChannel()

IFX_EXTERN void IfxHssl_Hssl_initChannel | ( | IfxHssl_Hssl_Channel * | channel,
 |  | const IfxHssl_Hssl_ChannelConfig * | channelConfig
 | ) |  |

Initialises the channel.

Parameters
channel | channel handle
channelConfig | configuration structure for channel
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 114 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_initChannelConfig()

IFX_EXTERN void IfxHssl_Hssl_initChannelConfig | ( | IfxHssl_Hssl_ChannelConfig * | channelConfig,
 |  | IfxHssl_Hssl * | hssl,
 |  | IfxHssl_Hsct * | hsct
 | ) |  |

Fills the channel config structure with default values.

Parameters
channelConfig | configuration structure for channel
hssl | HSSL Handle
hsct | HSCT Handle
Returns
None

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 128 of file IfxHssl_Hssl.c.


iLLD_TC26B: Simple Communication

Functions
Simple Communication
iLLD » HSSL » HSSL
Collaboration diagram for Simple Communication:

Functions

IFX_INLINE uint32 | IfxHssl_Hssl_getReadData (IfxHssl_Hssl_Channel *channel)
reads and returs the data More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
IFX_EXTERN void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_getReadData()

IFX_INLINE uint32 IfxHssl_Hssl_getReadData ( IfxHssl_Hssl_Channel * channel )

reads and returs the data

Parameters
channel channel handle
Returns
data

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 753 of file IfxHssl_Hssl.h.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_read()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | address,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

Initiates read request.

Parameters
channel | channel handle
address | address of the location from where the data is to be read
dataLength | length of the data
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 406 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_sendControlCommand()

IFX_EXTERN void IfxHssl_Hssl_sendControlCommand | ( | IfxHssl_Hsct * | hsct,
 |  | uint8 | command
 | ) |  |

sends a predefined command from master to slave

Parameters
hsct | HSCT Handle
command | command value
Returns
None

Usage Example:

// enable slave Tx channel (Rx disable to Rx low peed)
IfxHssl_Hssl_sendControlCommand(&channel, IfxHssl_ControlCommand_enableReception);

Definition at line 413 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_singleFrameRequest()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest | ( | IfxHssl_Hssl_Channel * | channel,
 |  | IfxHssl_Hssl_FrameRequest | frameRequest,
 |  | uint32 | address,
 |  | uint32 | data,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

serves the frame request (read, write, trigger frame and read id)

Parameters
channel | channel handle
frameRequest | frame request
address | address of the location (to be written into / read from)
data | data to be written
dataLength | length of the data
Returns
module status (ok, busy, error)

Definition at line 424 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream(), IfxHssl_Hssl_read(), and IfxHssl_Hssl_write().

◆ IfxHssl_Hssl_waitAcknowledge()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge ( IfxHssl_Hssl_Channel * channel )

waits until the current transaction is done

Parameters
channel channel handle
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 467 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_prepareStream().

◆ IfxHssl_Hssl_write()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | address,
 |  | uint32 | data,
 |  | IfxHssl_DataLength | dataLength
 | ) |  |

writes single frame of data into the specified address

Parameters
channel | channel handle
address | address of the location where the data is to be written
data | data that needs to be written
dataLength | length of the data (8, 16, 32 bit)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 526 of file IfxHssl_Hssl.c.


iLLD_TC26B: Error Handling

Functions
Error Handling
iLLD » HSSL » HSSL
Collaboration diagram for Error Handling:

Functions

IFX_EXTERN void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_checkErrors()

IFX_EXTERN void IfxHssl_Hssl_checkErrors ( IfxHssl_Hssl * hssl )

stores the status of errors in the respective members of the error flags structure

Parameters
hssl HSSL Handle
Returns
None

Definition at line 36 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_clearErrorFlags()

IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags ( IfxHssl_Hssl * hssl )

clears the status of members in the error flags structure

Parameters
hssl HSSL Handle
Returns
None

Definition at line 88 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_delay()

IFX_EXTERN void IfxHssl_Hssl_delay ( IfxHssl_Hsct * hsct )

a simple software delay

Parameters
hsct HSCT Handle
Returns
None

Definition at line 102 of file IfxHssl_Hssl.c.

Referenced by IfxHssl_Hssl_sendControlCommand().


iLLD_TC26B: Streaming Communication

Functions
Streaming Communication
iLLD » HSSL » HSSL
Collaboration diagram for Streaming Communication:

Functions

IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

Function Documentation

◆ IfxHssl_Hssl_prepareStream()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream | ( | IfxHssl_Hssl_Channel * | channel,
 |  | uint32 | slaveTargetAddress,
 |  | Ifx_SizeT | count
 | ) |  |

Prepares the target device for streaming.

Parameters
channel | channel handle
slaveTargetAddress | address of the location on target device where the data needs to be transfered
count | Frame count (length of the data in the memory as 256 bytes per frame)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 291 of file IfxHssl_Hssl.c.

◆ IfxHssl_Hssl_writeStream()

IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream | ( | IfxHssl_Hssl * | hssl,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2

Parameters
hssl | HSSL handle
data | starting address of the location to be read from (memory block 0 / HSSL_ISSA0)
count | Frame count (length of the data in the memory as 256 bytes per frame)
Returns
module status (ok, busy, error)

A coding example can be found in How to use the HSSL Interface driver?

Definition at line 532 of file IfxHssl_Hssl.c.


iLLD_TC26B: IfxHssl_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxHssl_cfg.h File Reference
iLLD » HSSL

HSSL on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxHssl_reg.h"
#include "IfxHsct_reg.h"
Include dependency graph for IfxHssl_cfg.h:

Go to the source code of this file.

Macros

#define | IFXHSSL_NUM_CHANNELS 4
#define | IFXHSSL_NUM_MODULES 1
#define | IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)

Enumerations

enum IfxHssl_hsctIndex {
IfxHssl_hsctIndex_none = -1,
IfxHssl_hsctIndex_0 = 0
}
List of the available Hsct resources. More...
enum IfxHssl_hsslIndex {
IfxHssl_hsslIndex_none = -1,
IfxHssl_hsslIndex_0 = 0
}
List of the available Hssl resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

HSSL on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxHssl_cfg.h.

Macro Definition Documentation

◆ IFXHSSL_JTAG_ID_ADDRESS

#define IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)

Definition at line 53 of file IfxHssl_cfg.h.

Referenced by IfxHssl_Hssl_initHsslModule().

◆ IFXHSSL_NUM_CHANNELS

#define IFXHSSL_NUM_CHANNELS 4

Definition at line 49 of file IfxHssl_cfg.h.

◆ IFXHSSL_NUM_MODULES

#define IFXHSSL_NUM_MODULES 1

Definition at line 51 of file IfxHssl_cfg.h.

Referenced by IfxHssl_getHsctAddress(), IfxHssl_getHsctIndex(), IfxHssl_getHsslAddress(), and IfxHssl_getHsslIndex().


iLLD_TC26B: IfxHssl_Hssl.h File Reference

  • Hssl
  • Hssl
Data Structures | Enumerations | Functions
IfxHssl_Hssl.h File Reference
iLLD » HSSL

HSSL HSSL details. More...

#include "Hssl/Std/IfxHssl.h"
#include "Port/Std/IfxPort.h"
Include dependency graph for IfxHssl_Hssl.h:

Go to the source code of this file.

Data Structures

struct | IfxHssl_Hssl_AccessWindow
structure for access windows More...
struct | IfxHssl_Hssl_errorFlags
structure for error flags More...
struct | IfxHssl_Hssl
HSSL Handle. More...
struct | IfxHssl_Hssl_Channel
channel handle More...
struct | IfxHssl_Hssl_ChannelConfig
configuration structure for channel More...
struct | IfxHssl_Hssl_Config
configuration structure of the HSSL module More...

Enumerations

enum IfxHssl_Hssl_FrameRequest {
IfxHssl_Hssl_FrameRequest_readFrame = 1,
IfxHssl_Hssl_FrameRequest_writeFrame = 2,
IfxHssl_Hssl_FrameRequest_triggerFrame = 3,
IfxHssl_Hssl_FrameRequest_readId = 4,
IfxHssl_Hssl_FrameRequest_noAction = 5
}
frame request selection More...
enum IfxHssl_Hssl_Status {
IfxHssl_Hssl_Status_ok = 0,
IfxHssl_Hssl_Status_busy = 1,
IfxHssl_Hssl_Status_error = 2
}
module status More...

Functions

IFX_EXTERN void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
IFX_EXTERN void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
IFX_EXTERN void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...
IFX_INLINE uint32 | IfxHssl_Hssl_getReadData (IfxHssl_Hssl_Channel *channel)
reads and returs the data More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
IFX_EXTERN void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...
IFX_EXTERN void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
IFX_EXTERN void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IFX_EXTERN IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

HSSL HSSL details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxHssl_Hssl.h.

Data Structure Documentation

◆ IfxHssl_Hssl_errorFlags

struct IfxHssl_Hssl_errorFlags

structure for error flags

Definition at line 470 of file IfxHssl_Hssl.h.

Data Fields
uint8 | busAccessError: 1 | SRI/SPB bus access error.
uint8 | channelNumberCodeError: 1 | PHY inconsistency error 1 (channel number code error)
uint8 | crcError: 1 | CRC error.
uint8 | dataLengthError: 1 | PHY inconsistency error 2 (data length error)
uint8 | memoryAccessViolation: 1 | memory access violation
uint8 | notAcknowledgeError: 1 | not acknowledge error / tag error
uint8 | timeoutError: 1 | timeout error
uint8 | transactionTagError: 1 | transaction tag error
uint8 | unexpectedError: 1 | unexpected type of frame error


iLLD_TC26B: IfxHssl.h File Reference

  • Hssl
  • Std
Data Structures | Enumerations | Functions
IfxHssl.h File Reference
iLLD » HSSL

HSSL basic functionality. More...

#include "_Impl/IfxHssl_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxHssl_bf.h"
#include "IfxHsct_bf.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxHssl.h:

Go to the source code of this file.

Data Structures

struct | IfxHssl_Hsct
HSCT module handle. More...
struct | IfxHssl_Hsct_Config
Configuration structure of the HSCT module. More...

Enumerations

enum IfxHssl_ChannelId {
IfxHssl_ChannelId_0,
IfxHssl_ChannelId_1,
IfxHssl_ChannelId_2,
IfxHssl_ChannelId_3
}
channel selection More...
enum IfxHssl_ClockFrequencyRate {
IfxHssl_ClockFrequencyRate_20Mhz = 0,
IfxHssl_ClockFrequencyRate_10Mhz = 1
}
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF. More...
enum IfxHssl_Command {
IfxHssl_Command_noAction = 0,
IfxHssl_Command_readFrame = 1,
IfxHssl_Command_writeFrame = 2,
IfxHssl_Command_triggerFrame = 3
}
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT More...
enum IfxHssl_ControlCommand {
IfxHssl_ControlCommand_ping = 0,
IfxHssl_ControlCommand_highSpeedClockStart = 2,
IfxHssl_ControlCommand_highSpeedClockStop = 4,
IfxHssl_ControlCommand_lowSpeedTransmission = 8,
IfxHssl_ControlCommand_highSpeedTransmission = 16,
IfxHssl_ControlCommand_lowSpeedReception = 32,
IfxHssl_ControlCommand_mediumSpeedReception = 64,
IfxHssl_ControlCommand_highSpeedReception = 128,
IfxHssl_ControlCommand_enableReception = 49,
IfxHssl_ControlCommand_disableReception = 50,
IfxHssl_ControlCommand_turnOnClockTestMode = 52,
IfxHssl_ControlCommand_turnOffClockTestMode = 56,
IfxHssl_ControlCommand_turnOnPayloadLoopback = 255
}
predefined control command payload values More...
enum IfxHssl_DataLength {
IfxHssl_DataLength_8bit = 0,
IfxHssl_DataLength_16bit = 1,
IfxHssl_DataLength_32bit = 2
}
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL.I.ICON.B.DATLEN. More...
enum IfxHssl_Hsct_InterruptSource {
IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF,
IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF,
IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF,
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF,
IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF,
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF,
IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF,
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF,
IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF,
IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF,
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF
}
HSCT interrupt source Definition in Ifx_HSCT.IRQ. More...
enum IfxHssl_Hsct_SleepMode {
IfxHssl_Hsct_SleepMode_enable = 0,
IfxHssl_Hsct_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSCT.CLC.B.EDIS. More...
enum IfxHssl_Hssl_SleepMode {
IfxHssl_Hssl_SleepMode_enable = 0,
IfxHssl_Hssl_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_HSSL.CLC.B.EDIS. More...
enum IfxHssl_InterfaceMode {
IfxHssl_InterfaceMode_master = 0,
IfxHssl_InterfaceMode_slave = 1
}
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM More...
enum IfxHssl_MasterModeRxSpeed {
IfxHssl_MasterModeRxSpeed_lowSpeed = 0,
IfxHssl_MasterModeRxSpeed_mediumSpeed = 1,
IfxHssl_MasterModeRxSpeed_highSpeed = 2
}
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED More...
enum IfxHssl_MasterModeTxSpeed {
IfxHssl_MasterModeTxSpeed_lowSpeed = 0,
IfxHssl_MasterModeTxSpeed_highSpeed = 2
}
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED More...
enum IfxHssl_PllReferenceClock {
IfxHssl_PllReferenceClock_hsctSystemClockInput = 0,
IfxHssl_PllReferenceClock_oscillatorInput = 1
}
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN. More...
enum IfxHssl_StreamingMode {
IfxHssl_StreamingMode_continuous = 0,
IfxHssl_StreamingMode_single = 1
}
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR More...
enum IfxHssl_SuspendMode {
IfxHssl_SuspendMode_none = 0,
IfxHssl_SuspendMode_hard = 1,
IfxHssl_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxHssl_Hssl_ERRInterruptSource {
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError = IFX_HSSL_MFLAGS_NACK_OFF,
IfxHssl_Hssl_ERRInterruptSource_transactionTagError = IFX_HSSL_MFLAGS_TTE_OFF,
IfxHssl_Hssl_ERRInterruptSource_timeoutError = IFX_HSSL_MFLAGS_TIMEOUT_OFF,
IfxHssl_Hssl_ERRInterruptSource_unexpectedError = IFX_HSSL_MFLAGS_UNEXPECTED_OFF
}
HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL.MFLAGS. More...
enum IfxHssl_Hssl_EXIInterruptSource {
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation = IFX_HSSL_MFLAGS_MAV_OFF,
IfxHssl_Hssl_EXIInterruptSource_busAccessError = IFX_HSSL_MFLAGS_SRIE_OFF,
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError = IFX_HSSL_MFLAGS_PIE1_OFF,
IfxHssl_Hssl_EXIInterruptSource_dataLengthError = IFX_HSSL_MFLAGS_PIE2_OFF,
IfxHssl_Hssl_EXIInterruptSource_crcError = IFX_HSSL_MFLAGS_CRCE_OFF
}
HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL.MFLAGS. More...

Functions

IFX_INLINE void | IfxHssl_clearHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_disableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE void | IfxHssl_enableHsctInterrupt (Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt. More...
IFX_INLINE void | IfxHssl_enableHsctInterruptFlag (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsctInterruptFlagStatus (Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status. More...
IFX_INLINE void | IfxHssl_setHsctSleepMode (Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE uint32 | IfxHssl_getHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct)
Get the last received unsolicited status message. More...
IFX_INLINE void | IfxHssl_sendHsctUnsolicitedStatusMessage (Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message. More...
IFX_INLINE void | IfxHssl_setHsctRxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed. More...
IFX_INLINE void | IfxHssl_setHsctTxLinkSpeed (Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed. More...
IFX_INLINE void | IfxHssl_enableHsctTransmitPath (Ifx_HSCT *hsct)
Enable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_enableHsctReceivePath (Ifx_HSCT *hsct)
Enable hsct receive path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctTransmitPath (Ifx_HSCT *hsct)
Disable hsct transmit path in master interface. More...
IFX_INLINE void | IfxHssl_disableHsctReceivePath (Ifx_HSCT *hsct)
Disable hsct receive path in master interface. More...
IFX_EXTERN void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
IFX_EXTERN void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
IFX_EXTERN Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IFX_EXTERN IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
IFX_EXTERN void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...
IFX_INLINE void | IfxHssl_clearHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE void | IfxHssl_clearInitialiseModeFlag (Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status. More...
IFX_INLINE void | IfxHssl_disableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_disableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableAllErrorFlags (Ifx_HSSL *hssl)
Enables all error flags. More...
IFX_INLINE void | IfxHssl_enableHsslCOKInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslChannelErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslERRInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslEXIInterrupt (Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslGlobalErrorInterruptFlag (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt. More...
IFX_INLINE void | IfxHssl_enableHsslRDIInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel. More...
IFX_INLINE void | IfxHssl_enableHsslTRGInterrupt (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel. More...
IFX_INLINE uint32 | IfxHssl_getAllMflagsStatus (Ifx_HSSL *hssl)
Returns the status of all MFLAGS status. More...
IFX_INLINE uint16 | IfxHssl_getCurrentCount (Ifx_HSSL *hssl)
Returns the Current Count value. More...
IFX_INLINE boolean | IfxHssl_getHsslChannelErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getHsslGloabalErrorInterruptFlagStatus (Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag. More...
IFX_INLINE boolean | IfxHssl_getInitialiseModeFlagStatus (Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status. More...
IFX_INLINE uint16 | IfxHssl_getReloadCount (Ifx_HSSL *hssl)
Returns the Reload Count value. More...
IFX_INLINE boolean | IfxHssl_isModuleSuspended (Ifx_HSSL *hssl)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxHssl_setHsslSleepMode (Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxHssl_setInitialiseModeFlag (Ifx_HSSL *hssl)
Sets the Initialise Mode Flag. More...
IFX_INLINE void | IfxHssl_setReloadCount (Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count. More...
IFX_INLINE void | IfxHssl_setSuspendMode (Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxHssl_setTimeoutReloadValue (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value. More...
IFX_EXTERN void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
IFX_EXTERN void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
IFX_EXTERN Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IFX_EXTERN IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
IFX_EXTERN void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

HSSL basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxHssl.h.

Enumeration Type Documentation

◆ IfxHssl_Hssl_ERRInterruptSource

enum IfxHssl_Hssl_ERRInterruptSource

HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL.MFLAGS.

Enumerator
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError | NACK error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_transactionTagError | Transaction Tag Error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_timeoutError | Timeout error (triggers ERR interrupt)
IfxHssl_Hssl_ERRInterruptSource_unexpectedError | Unexpected error (triggers ERR interrupt)

Definition at line 214 of file IfxHssl.h.

◆ IfxHssl_Hssl_EXIInterruptSource

enum IfxHssl_Hssl_EXIInterruptSource

HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL.MFLAGS.

Enumerator
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation | Memory Access Violation error (triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_busAccessError | SRI/SPB Bus Access Error (triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError | PHY Inconsistency Error 1 (Channel Number Code Error, triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_dataLengthError | PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt)
IfxHssl_Hssl_EXIInterruptSource_crcError | CRC error (triggers EXI interrupt)

Definition at line 225 of file IfxHssl.h.


iLLD_TC26B: I2C

Modules | Files
I2C
iLLD
Collaboration diagram for I2C:

Modules

Implementation
Standard Driver
I2C Pin Mapping
How to use the I2c driver?
I2C

Files

file | IfxI2c_cfg.h
I2C on-chip implementation data.
file | IfxI2c_PinMap.c
I2C I/O map.
file | IfxI2c_PinMap.h
I2C I/O map.
file | IfxI2c_I2c.h
I2C I2C details.
file | IfxI2c.h
I2C basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » I2C
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations | Variables
Enumerations
iLLD » I2C » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_Index {
IfxI2c_Index_none = -1,
IfxI2c_Index_0 = 0
}
List of the available I2c interfaces. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_Index

enum IfxI2c_Index

List of the available I2c interfaces.

Enumerator
IfxI2c_Index_none | Not Selected.
IfxI2c_Index_0 | I2C Index 0.

Definition at line 58 of file IfxI2c_cfg.h.

Variable Documentation

◆ IfxI2c_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]

Definition at line 73 of file IfxI2c_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » I2C
Collaboration diagram for Standard Driver:

Modules

Enumerations
Functions
Data Structures

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » I2C » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_BusStatus {
IfxI2c_BusStatus_idle = 0,
IfxI2c_BusStatus_started = 1,
IfxI2c_BusStatus_busyMaster = 2,
IfxI2c_BusStatus_remoteSlave = 3
}
enum IfxI2c_ErrorInterruptSource {
IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF
}
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U More...
enum IfxI2c_PinSelect {
IfxI2c_PinSelect_a = 0,
IfxI2c_PinSelect_b = 1,
IfxI2c_PinSelect_c = 2,
IfxI2c_PinSelect_d = 3,
IfxI2c_PinSelect_e = 4,
IfxI2c_PinSelect_f = 5,
IfxI2c_PinSelect_g = 6,
IfxI2c_PinSelect_h = 7
}
enum IfxI2c_ProtocolInterruptSource {
IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF,
IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF,
IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF,
IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF,
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF,
IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF,
IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF
}
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U More...
enum IfxI2c_SleepMode {
IfxI2c_SleepMode_enable = 0,
IfxI2c_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_BusStatus

enum IfxI2c_BusStatus
Enumerator
IfxI2c_BusStatus_idle | idle
IfxI2c_BusStatus_started | started
IfxI2c_BusStatus_busyMaster | busy Master
IfxI2c_BusStatus_remoteSlave | remote Slave

Definition at line 52 of file IfxI2c.h.

◆ IfxI2c_ErrorInterruptSource

enum IfxI2c_ErrorInterruptSource

enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U

Enumerator
IfxI2c_ErrorInterruptSource_rxFifoUnderflow | receive fifo underflow service request
IfxI2c_ErrorInterruptSource_rxFifoOverflow | receive fifo overflow service request
IfxI2c_ErrorInterruptSource_txFifoUnderflow | transmit fifo underflow service request
IfxI2c_ErrorInterruptSource_txFifoOverflow | transmit fifo overflow service request

Definition at line 63 of file IfxI2c.h.

◆ IfxI2c_PinSelect

enum IfxI2c_PinSelect
Enumerator
IfxI2c_PinSelect_a
IfxI2c_PinSelect_b
IfxI2c_PinSelect_c
IfxI2c_PinSelect_d
IfxI2c_PinSelect_e
IfxI2c_PinSelect_f
IfxI2c_PinSelect_g
IfxI2c_PinSelect_h

Definition at line 71 of file IfxI2c.h.

◆ IfxI2c_ProtocolInterruptSource

enum IfxI2c_ProtocolInterruptSource

enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U

Enumerator
IfxI2c_ProtocolInterruptSource_addressMatch | address match service request
IfxI2c_ProtocolInterruptSource_generalCall | general call service request
IfxI2c_ProtocolInterruptSource_masterCode | master code service request
IfxI2c_ProtocolInterruptSource_arbitrationLost | arbitration lost service request
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived | not acknowledge received service request
IfxI2c_ProtocolInterruptSource_transmissionEnd | transmission end service request
IfxI2c_ProtocolInterruptSource_receiveMode | receive mode service request

Definition at line 86 of file IfxI2c.h.

◆ IfxI2c_SleepMode

enum IfxI2c_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS.

Enumerator
IfxI2c_SleepMode_enable | enables sleep mode
IfxI2c_SleepMode_disable | disables sleep mode

Definition at line 100 of file IfxI2c.h.


iLLD_TC26B: Functions

Functions
Functions
iLLD » I2C » Standard Driver
Collaboration diagram for Functions:

Functions

IFX_INLINE boolean | IfxI2c_busIsFree (Ifx_I2C *i2c)
Returns if the bus is free. More...
IFX_INLINE void | IfxI2c_clearAllDtrInterruptSources (Ifx_I2C *i2c)
clears all DTR interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllErrorInterruptSources (Ifx_I2C *i2c)
clears all Error Interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllProtocolInterruptSources (Ifx_I2C *i2c)
Clears all Protocol Interrupt sources. More...
IFX_INLINE void | IfxI2c_clearBurstRequestInterruptSource (Ifx_I2C *i2c)
clears burst request interrupt source More...
IFX_INLINE void | IfxI2c_clearErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_clearLastBurstRequestInterruptSource (Ifx_I2C *i2c)
clears last burst request interrupt source More...
IFX_INLINE void | IfxI2c_clearLastSingleRequestInterruptSource (Ifx_I2C *i2c)
clears last single request interrupt source More...
IFX_INLINE void | IfxI2c_clearProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_clearSingleRequestInterruptSource (Ifx_I2C *i2c)
clears single request interrupt source More...
IFX_INLINE void | IfxI2c_disableBurstRequestInterruptSource (Ifx_I2C *i2c)
disables burst request interrupt source More...
IFX_INLINE void | IfxI2c_disableErrorInterruptFlag (Ifx_I2C *i2c)
disables the error interrupt flag More...
IFX_INLINE void | IfxI2c_disableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_disableLastBurstRequestInterruptSource (Ifx_I2C *i2c)
disables last burst request interrupt source More...
IFX_INLINE void | IfxI2c_disableLastSingleRequestInterruptSource (Ifx_I2C *i2c)
disables last single request interrupt source More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptFlag (Ifx_I2C *i2c)
disables the Protocol interrupt flag More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_disableSingleRequestInterruptSource (Ifx_I2C *i2c)
disables single request interrupt source More...
IFX_INLINE void | IfxI2c_enableBurstRequestInterruptSource (Ifx_I2C *i2c)
enables burst request interrupt source More...
IFX_INLINE void | IfxI2c_enableErrorInterruptFlag (Ifx_I2C *i2c)
enables the error interrupt flag More...
IFX_INLINE void | IfxI2c_enableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_enableLastBurstRequestInterruptSource (Ifx_I2C *i2c)
enables last burst request interrupt source More...
IFX_INLINE void | IfxI2c_enableLastSingleRequestInterruptSource (Ifx_I2C *i2c)
enables last single request interrupt source More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptFlag (Ifx_I2C *i2c)
enables the protocol interrupt flag More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_enableSingleRequestInterruptSource (Ifx_I2C *i2c)
enables single request interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getBurstDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C burst data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getBurstRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of burst request interrupt source status More...
IFX_INLINE IfxI2c_BusStatus | IfxI2c_getBusStatus (Ifx_I2C *i2c)
IFX_INLINE boolean | IfxI2c_getErrorInterruptFlagStatus (Ifx_I2C *i2c)
returns the current status of error interrupt flag More...
IFX_INLINE boolean | IfxI2c_getErrorInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getErrorSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getLastBurstDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C last burst data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getLastBurstRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of last burst request interrupt source status More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getLastSingleDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C last single data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getLastSingleRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of last single request interrupt source status More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptFlagStatus (Ifx_I2C *i2c)
returns the current raw status of protocol interrupt More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getProtocolSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getSingleDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C single data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getSingleRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of single request interrupt source status More...
IFX_INLINE boolean | IfxI2c_isFifoRequest (Ifx_I2C *i2c)
Returns if the Fifo is requesting new data. More...
IFX_INLINE void | IfxI2c_run (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_setPinSelection (Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin More...
IFX_INLINE void | IfxI2c_setReceivePacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received. More...
IFX_INLINE void | IfxI2c_setSlaveDeviceAddress (Ifx_I2C *i2c, uint16 address)
IFX_INLINE void | IfxI2c_setSleepMode (Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxI2c_setTransmitPacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted. More...
IFX_INLINE void | IfxI2c_stop (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_waitBusFree (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_writeFifo (Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo. More...
IFX_EXTERN void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
IFX_EXTERN void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt. More...
IFX_EXTERN void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
IFX_EXTERN void | IfxI2c_enableLastBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt More...
IFX_EXTERN void | IfxI2c_enableLastSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt More...
IFX_EXTERN void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
IFX_EXTERN void | IfxI2c_enableSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt More...
IFX_EXTERN Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
IFX_EXTERN float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IFX_EXTERN IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
IFX_EXTERN void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
IFX_EXTERN void | IfxI2c_resetFifo (Ifx_I2C *i2c)
IFX_EXTERN void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
IFX_EXTERN void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...

Detailed Description

Function Documentation

◆ IfxI2c_busIsFree()

IFX_INLINE boolean IfxI2c_busIsFree ( Ifx_I2C * i2c )

Returns if the bus is free.

Definition at line 569 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearAllDtrInterruptSources()

IFX_INLINE void IfxI2c_clearAllDtrInterruptSources ( Ifx_I2C * i2c )

clears all DTR interrupt sources

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 582 of file IfxI2c.h.

◆ IfxI2c_clearAllErrorInterruptSources()

IFX_INLINE void IfxI2c_clearAllErrorInterruptSources ( Ifx_I2C * i2c )

clears all Error Interrupt sources

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 588 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearAllProtocolInterruptSources()

IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources ( Ifx_I2C * i2c )

Clears all Protocol Interrupt sources.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 594 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource ( Ifx_I2C * i2c )

clears burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 600 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearErrorInterruptSource()

IFX_INLINE void IfxI2c_clearErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

clears the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 606 of file IfxI2c.h.

◆ IfxI2c_clearLastBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource ( Ifx_I2C * i2c )

clears last burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 612 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearLastSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource ( Ifx_I2C * i2c )

clears last single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 618 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_clearProtocolInterruptSource()

IFX_INLINE void IfxI2c_clearProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

clears the specified source of protocol interrupt

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
None

Definition at line 624 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_releaseBus().

◆ IfxI2c_clearSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource ( Ifx_I2C * i2c )

clears single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 630 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_configureAsMaster()

IFX_EXTERN void IfxI2c_configureAsMaster ( Ifx_I2C * i2c )

Configures the Module as Master.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 35 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_disableBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource ( Ifx_I2C * i2c )

disables burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 636 of file IfxI2c.h.

◆ IfxI2c_disableErrorInterruptFlag()

IFX_INLINE void IfxI2c_disableErrorInterruptFlag ( Ifx_I2C * i2c )

disables the error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 642 of file IfxI2c.h.

◆ IfxI2c_disableErrorInterruptSource()

IFX_INLINE void IfxI2c_disableErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

disables the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 648 of file IfxI2c.h.

◆ IfxI2c_disableLastBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource ( Ifx_I2C * i2c )

disables last burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 654 of file IfxI2c.h.

◆ IfxI2c_disableLastSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource ( Ifx_I2C * i2c )

disables last single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 660 of file IfxI2c.h.

◆ IfxI2c_disableModule()

IFX_EXTERN void IfxI2c_disableModule ( Ifx_I2C * i2c )

Disables the I2c Module.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 55 of file IfxI2c.c.

◆ IfxI2c_disableProtocolInterruptFlag()

IFX_INLINE void IfxI2c_disableProtocolInterruptFlag ( Ifx_I2C * i2c )

disables the Protocol interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 666 of file IfxI2c.h.

◆ IfxI2c_disableProtocolInterruptSource()

IFX_INLINE void IfxI2c_disableProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

disables the specified source of protocol interrupt

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
None

Definition at line 672 of file IfxI2c.h.

◆ IfxI2c_disableSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource ( Ifx_I2C * i2c )

disables single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 678 of file IfxI2c.h.

◆ IfxI2c_enableBurstDataTransferInterrupt()

IFX_EXTERN void IfxI2c_enableBurstDataTransferInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables the Burst data transfer interrupt.

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 70 of file IfxI2c.c.

◆ IfxI2c_enableBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource ( Ifx_I2C * i2c )

enables burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 684 of file IfxI2c.h.

◆ IfxI2c_enableErrorInterrupt()

IFX_EXTERN void IfxI2c_enableErrorInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables the Error interrupt.

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 79 of file IfxI2c.c.

◆ IfxI2c_enableErrorInterruptFlag()

IFX_INLINE void IfxI2c_enableErrorInterruptFlag ( Ifx_I2C * i2c )

enables the error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 690 of file IfxI2c.h.

◆ IfxI2c_enableErrorInterruptSource()

IFX_INLINE void IfxI2c_enableErrorInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

enables the specified source of error interrupt

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
None

Definition at line 696 of file IfxI2c.h.

◆ IfxI2c_enableLastBurstDataTransferInterrupt()

IFX_EXTERN void IfxI2c_enableLastBurstDataTransferInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

enables the last burst data transfer interrupt

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 88 of file IfxI2c.c.

◆ IfxI2c_enableLastBurstRequestInterruptSource()

IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource ( Ifx_I2C * i2c )

enables last burst request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 702 of file IfxI2c.h.

◆ IfxI2c_enableLastSingleDataTransferInterrupt()

IFX_EXTERN void IfxI2c_enableLastSingleDataTransferInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

enables the last single data transfer interrupt

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 97 of file IfxI2c.c.

◆ IfxI2c_enableLastSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource ( Ifx_I2C * i2c )

enables last single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 708 of file IfxI2c.h.

◆ IfxI2c_enableModule()

IFX_EXTERN void IfxI2c_enableModule ( Ifx_I2C * i2c )

Enables the I2c Module.

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 106 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_enableProtocolInterrupt()

IFX_EXTERN void IfxI2c_enableProtocolInterrupt | ( | void * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

Enables the protocol interrupt.

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | Priority of the interrupt
Returns
None

Definition at line 135 of file IfxI2c.c.

◆ IfxI2c_enableProtocolInterruptFlag()

IFX_INLINE void IfxI2c_enableProtocolInterruptFlag ( Ifx_I2C * i2c )

enables the protocol interrupt flag

Parameters
i2c pointer to I2C registers
Returns
None

Definition at line 714 of file IfxI2c.h.

◆ IfxI2c_enableProtocolInterruptSource()

IFX_INLINE void IfxI2c_enableProtocolInterruptSource | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

enables the specified source of protocol interrupt

Parameters
i2c | pointer to I2C registers
source | protocol interrupt source
Returns
None

Definition at line 720 of file IfxI2c.h.

◆ IfxI2c_enableSingleDataTransferInterrupt()

IFX_EXTERN void IfxI2c_enableSingleDataTransferInterrupt | ( | Ifx_I2C * | i2c,
 |  | IfxSrc_Tos | typeOfService,
 |  | uint16 | priority
 | ) |  |

enables the single data transfer interrupt

Parameters
i2c | pointer to i2c registers
typeOfService | Type of Service (Cpu or DMA)
priority | priority of the interrupt
Returns
None

Definition at line 144 of file IfxI2c.c.

◆ IfxI2c_enableSingleRequestInterruptSource()

IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource ( Ifx_I2C * i2c )

enables single request interrupt source

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 726 of file IfxI2c.h.

◆ IfxI2c_getAddress()

IFX_EXTERN Ifx_I2C* IfxI2c_getAddress ( IfxI2c_Index i2c )
Parameters
i2c Resource index of the I2c
Returns
I2C module register address

Definition at line 153 of file IfxI2c.c.

◆ IfxI2c_getBaudrate()

IFX_EXTERN float32 IfxI2c_getBaudrate ( Ifx_I2C * i2c )

Returns the real Baudrate.

Returns
Baudrate

Definition at line 170 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_getBurstDataTransferSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getBurstDataTransferSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C burst data transfer request interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C burst data transfer Service interrupt

Definition at line 732 of file IfxI2c.h.

Referenced by IfxI2c_enableBurstDataTransferInterrupt().

◆ IfxI2c_getBurstRequestInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus ( Ifx_I2C * i2c )

returns the status of burst request interrupt source status

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 745 of file IfxI2c.h.

◆ IfxI2c_getBusStatus()

IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
BusStatus

Definition at line 751 of file IfxI2c.h.

Referenced by IfxI2c_I2c_initModule(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_waitBusFree().

◆ IfxI2c_getErrorInterruptFlagStatus()

IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus ( Ifx_I2C * i2c )

returns the current status of error interrupt flag

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 757 of file IfxI2c.h.

◆ IfxI2c_getErrorInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ErrorInterruptSource | source
 | ) |  |

returns the status of the error interrupt source

Parameters
i2c | pointer to i2c registers
source | error interrupt source
Returns
status

Definition at line 763 of file IfxI2c.h.

◆ IfxI2c_getErrorSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C Error interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C Error Service interrupt

Definition at line 769 of file IfxI2c.h.

Referenced by IfxI2c_enableErrorInterrupt().

◆ IfxI2c_getIndex()

IFX_EXTERN IfxI2c_Index IfxI2c_getIndex ( Ifx_I2C * i2c )

API to get the resource index of the I2C specified.

Parameters
i2c Pointer to the I2C HW module (register memory map)
Returns
Resource index of the I2C

Definition at line 181 of file IfxI2c.c.

◆ IfxI2c_getLastBurstDataTransferSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastBurstDataTransferSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C last burst data transfer request interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C last burst data transfer Service interrupt

Definition at line 782 of file IfxI2c.h.

Referenced by IfxI2c_enableLastBurstDataTransferInterrupt().

◆ IfxI2c_getLastBurstRequestInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus ( Ifx_I2C * i2c )

returns the status of last burst request interrupt source status

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 795 of file IfxI2c.h.

◆ IfxI2c_getLastSingleDataTransferSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastSingleDataTransferSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C last single data transfer request interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C last single data transfer Service interrupt

Definition at line 801 of file IfxI2c.h.

Referenced by IfxI2c_enableLastSingleDataTransferInterrupt().

◆ IfxI2c_getLastSingleRequestInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus ( Ifx_I2C * i2c )

returns the status of last single request interrupt source status

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 814 of file IfxI2c.h.

◆ IfxI2c_getProtocolInterruptFlagStatus()

IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus ( Ifx_I2C * i2c )

returns the current raw status of protocol interrupt

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 820 of file IfxI2c.h.

◆ IfxI2c_getProtocolInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_ProtocolInterruptSource | source
 | ) |  |

returns the status of specified protocol interrupt source

Parameters
i2c | pointer to i2c registers
source | protocol interrupt source
Returns
status

Definition at line 826 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), IfxI2c_I2c_write(), and IfxI2c_releaseBus().

◆ IfxI2c_getProtocolSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C Protocol interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C Protocol Service interrupt

Definition at line 832 of file IfxI2c.h.

Referenced by IfxI2c_enableProtocolInterrupt().

◆ IfxI2c_getSingleDataTransferSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getSingleDataTransferSrcPointer ( Ifx_I2C * i2c )

Returns the SRC pointer for I2C single data transfer request interrupt.

Parameters
i2c pointer to i2c registers
Returns
SRC pointer for I2C single data transfer Service interrupt

Definition at line 845 of file IfxI2c.h.

Referenced by IfxI2c_enableSingleDataTransferInterrupt().

◆ IfxI2c_getSingleRequestInterruptSourceStatus()

IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus ( Ifx_I2C * i2c )

returns the status of single request interrupt source status

Parameters
i2c pointer to i2c registers
Returns
status

Definition at line 858 of file IfxI2c.h.

◆ IfxI2c_initSclSdaPin()

IFX_EXTERN void IfxI2c_initSclSdaPin | ( | const IfxI2c_Scl_InOut * | scl,
 |  | const IfxI2c_Sda_InOut * | sda,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |
Returns
None

Definition at line 201 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_isFifoRequest()

IFX_INLINE boolean IfxI2c_isFifoRequest ( Ifx_I2C * i2c )

Returns if the Fifo is requesting new data.

Definition at line 864 of file IfxI2c.h.

◆ IfxI2c_releaseBus()

IFX_EXTERN void IfxI2c_releaseBus ( Ifx_I2C * i2c )

Releases the bus, i.e puts a stop condition on the bus.

Returns
None

Definition at line 212 of file IfxI2c.c.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_resetFifo()

IFX_EXTERN void IfxI2c_resetFifo ( Ifx_I2C * i2c )
Returns
None

Definition at line 228 of file IfxI2c.c.

◆ IfxI2c_resetModule()

IFX_EXTERN void IfxI2c_resetModule ( Ifx_I2C * i2c )

resets the I2c kernel

Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 241 of file IfxI2c.c.

◆ IfxI2c_run()

IFX_INLINE void IfxI2c_run ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 870 of file IfxI2c.h.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_setBaudrate()

IFX_EXTERN void IfxI2c_setBaudrate | ( | Ifx_I2C * | i2c,
 |  | float32 | baudrate
 | ) |  |

Calculates the desired baudrate.

Parameters
i2c | pointer to i2c registers
baudrate | specifies the baud rate
Returns
None

Definition at line 260 of file IfxI2c.c.

Referenced by IfxI2c_I2c_initModule().

◆ IfxI2c_setPinSelection()

IFX_INLINE void IfxI2c_setPinSelection | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_PinSelect | pisel
 | ) |  |

selects the pin

Parameters
i2c | pointer to i2c registers
pisel | pin to be select
Returns
None

Definition at line 876 of file IfxI2c.h.

Referenced by IfxI2c_initSclSdaPin().

◆ IfxI2c_setReceivePacketSize()

IFX_INLINE void IfxI2c_setReceivePacketSize | ( | Ifx_I2C * | i2c,
 |  | Ifx_SizeT | size
 | ) |  |

Sets the number of bytes to be received.

Parameters
i2c | pointer to i2c registers
size | number of packets
Returns
None

Definition at line 882 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read().

◆ IfxI2c_setSlaveDeviceAddress()

IFX_INLINE void IfxI2c_setSlaveDeviceAddress | ( | Ifx_I2C * | i2c,
 |  | uint16 | address
 | ) |  |
Parameters
i2c | pointer to i2c registers
address | device address
Returns
None

Definition at line 888 of file IfxI2c.h.

◆ IfxI2c_setSleepMode()

IFX_INLINE void IfxI2c_setSleepMode | ( | Ifx_I2C * | i2c,
 |  | IfxI2c_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
i2c | pointer to i2c registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 894 of file IfxI2c.h.

◆ IfxI2c_setTransmitPacketSize()

IFX_INLINE void IfxI2c_setTransmitPacketSize | ( | Ifx_I2C * | i2c,
 |  | Ifx_SizeT | size
 | ) |  |

Sets the number of bytes to be tansmitted.

Parameters
i2c | pointer to i2c registers
size | number of packets
Returns
None

Definition at line 900 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().

◆ IfxI2c_stop()

IFX_INLINE void IfxI2c_stop ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 906 of file IfxI2c.h.

Referenced by IfxI2c_configureAsMaster(), and IfxI2c_I2c_initModule().

◆ IfxI2c_waitBusFree()

IFX_INLINE void IfxI2c_waitBusFree ( Ifx_I2C * i2c )
Parameters
i2c pointer to i2c registers
Returns
None

Definition at line 912 of file IfxI2c.h.

◆ IfxI2c_writeFifo()

IFX_INLINE void IfxI2c_writeFifo | ( | Ifx_I2C * | i2c,
 |  | uint32 | packet
 | ) |  |

Writes a packet (4 bytes) into the Fifo.

Parameters
i2c | pointer to i2c registers
packet | specifies the byte to be transfer
Returns
None

Definition at line 919 of file IfxI2c.h.

Referenced by IfxI2c_I2c_read(), and IfxI2c_I2c_write().


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » I2C » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxI2c_Pins
Pin Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_Pins

struct IfxI2c_Pins

Pin Structure.

Definition at line 116 of file IfxI2c.h.

Collaboration diagram for IfxI2c_Pins:
[legend]
Data Fields
IfxPort_PadDriver | padDriver
IfxI2c_Scl_InOut * | scl
IfxI2c_Sda_InOut * | sda


iLLD_TC26B: I2C Pin Mapping

Data Structures | Macros | Variables
I2C Pin Mapping
iLLD » I2C
Collaboration diagram for I2C Pin Mapping:

Data Structures

struct | IfxI2c_Scl_InOut
SCL input mapping structure. More...
struct | IfxI2c_Sda_InOut
SDA input mapping structure. More...

Macros

#define | IFXI2C_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
#define | IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table. More...
IFX_EXTERN const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_Scl_InOut

struct IfxI2c_Scl_InOut

SCL input mapping structure.

Definition at line 39 of file IfxI2c_PinMap.h.

Collaboration diagram for IfxI2c_Scl_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_I2C * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

◆ IfxI2c_Sda_InOut

struct IfxI2c_Sda_InOut

SDA input mapping structure.

Definition at line 48 of file IfxI2c_PinMap.h.

Collaboration diagram for IfxI2c_Sda_InOut:
[legend]
Data Fields
Ifx_RxSel | inSelect | Input multiplexer value.
Ifx_I2C * | module | Base address.
IfxPort_OutputIdx | outSelect | Port control code.
IfxPort_Pin | pin | Port pin.

Macro Definition Documentation

◆ IFXI2C_PINMAP_NUM_MODULES

#define IFXI2C_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 64 of file IfxI2c_PinMap.h.

◆ IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS

#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3

Definition at line 65 of file IfxI2c_PinMap.h.

◆ IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS

#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Definition at line 66 of file IfxI2c_PinMap.h.

Variable Documentation

◆ IfxI2c0_SCL_P02_5_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT

I2C0_SCL: I2C0 output and input.

Definition at line 56 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SCL_P13_1_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT

I2C0_SCL: I2C0 output and input.

Definition at line 57 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SCL_P15_4_INOUT

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT

I2C0_SCL: I2C0 output and input.

Definition at line 58 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P02_4_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT

I2C0_SDA: I2C0 output and input.

Definition at line 59 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P13_2_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT

I2C0_SDA: I2C0 output and input.

Definition at line 60 of file IfxI2c_PinMap.h.

◆ IfxI2c0_SDA_P15_5_INOUT

IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT

I2C0_SDA: I2C0 output and input.

Definition at line 61 of file IfxI2c_PinMap.h.

◆ IfxI2c_Scl_InOut_pinTable

IFX_EXTERN const IfxI2c_Scl_InOut* IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]

IfxI2c_Scl_InOut table.

Definition at line 70 of file IfxI2c_PinMap.h.

◆ IfxI2c_Sda_InOut_pinTable

IFX_EXTERN const IfxI2c_Sda_InOut* IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]

IfxI2c_Sda_InOut table.

Definition at line 73 of file IfxI2c_PinMap.h.


iLLD_TC26B: How to use the I2c driver?

How to use the I2c driver?
iLLD » I2C
Collaboration diagram for How to use the I2c driver?:

The I2c driver provides a default configuration for 8bit wide data transfers in Master mode.

NOTE: Interrupts are disabled during data transfers as long as the driver operates on the I2C hardware FIFO, except for reading 32 bytes or less. This is due to limitations of the I2c Module.

NOTE : Send Slave address as 8-bit by left shifting it by 1.E.g incase of EEPROM,slave address is 7 bit represented as 0x50, after left shifting it by 1, it will be 0xa0

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation Preparation

Include Files

Include following header file into your C code:

#include <I2c/I2c/IfxI2c_I2c.h>

Variables

Declare the I2c handle, the I2c device handle and the data buffer in your C code:

// used globally
static IfxI2c_I2c i2c; // i2c handle
static IfxI2c_I2c_Device i2cDev; // slave device handle
uint8 data[128]; // data buffer

Module Initialisation

// create config structure
IfxI2c_I2c_Config config;
// fill structure with default values and Module address
IfxI2c_I2c_initConfig(&config, &MODULE_I2C0);
// configure pins
const IfxI2c_Pins pins = {
&IfxI2c0_SCL_P02_5_INOUT,
&IfxI2c0_SDA_P02_4_INOUT,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
config.pins = &pins;
config.baudrate = 400000; // 400 kHz
// initialize module
IfxI2c_I2c_initModule(&i2c, &config);

Device Initialisation

Here the i2c device handle is initialized.

// create device config
IfxI2c_I2c_deviceConfig i2cDeviceConfig;
// fill structure with default values and i2c Handler
IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c);
// set device specifig values.
i2cDeviceConfig.deviceAddress = 0xa0; // 8 bit device address
// initialize the i2c device handle
IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);

Data Transfers

Example for an i2c EEPROM.

Write

uint16 addr = 0x0000;
// setup the device's internal address
data[0] = addr >> 8; // High byte
data[1] = (uint8)addr; // Low byte
// setup data to be written
data[2] = 0x01;
data[3] = 0x02;
data[4] = 0x03;
uint8 size = 5; // 5 bytes to transmit to i2cDev (data and internal address)
// write data to device as soon as it is ready
while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);

Read

Ifx_SizeT size;
uint16 addr = 0x0000;
// setup internal address to be read from
data[0] = addr >> 8; // High byte
data[1] = (uint8)addr; // Low byte
size = 2;
while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
size = 8; // 8 bytes to read
// read device data to data array
while(IfxI2c_I2c_read(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);

Acknowledge Polling

It is also possible to poll explicitly for NAK.

By using write operations:

// size = 0;
while(IfxI2c_I2c_write(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer

By using read operations:

// size = 0;
while(IfxI2c_I2c_read(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer

Interrupts usage

Interrupts can be enabled from the application by using the APIs provided in the driver, there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,
APIs to enable the the interrupts are also available.

here is an example of how to use the interrupts in I2C driver.

Using I2C interrupts

I2C burst data transfer interrupt

After initilaising I2C device Device Initialisation

choose the burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing burst data transfer
interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority

//enable burst data transfer interrupt source
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableBurstRequestInterruptSource(i2c);
// enable the burst data transfer interrupt
IfxI2c_enableBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C last burst data transfer interrupt

After initilaising I2C device Device Initialisation

choose the last burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last burst data transfer
interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority

//enable last burst data transfer interrupt source
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableLastBurstRequestInterruptSource(i2c);
// enable the last burst data transfer interrupt
IfxI2c_enableLastBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C single data transfer interrupt

After initilaising I2C device Device Initialisation

choose the single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing single data transfer
interrupt source, enable single data transfer service request or interrupt with the desired type of service and priority

//enable burst data transfer interrupt source
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableSingleRequestInterruptSource(i2c);
// enable the burst data transfer interrupt
IfxI2c_enableSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C last single data transfer interrupt

After initilaising I2C device Device Initialisation

choose the last single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last single data transfer
interrupt source, enable last single data transfer service request or interrupt with the desired type of service and priority

//enable burst data transfer interrupt source
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableLastSingleRequestInterruptSource(i2c);
// enable the burst data transfer interrupt
IfxI2c_enableLastSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C error interrupt (ERR)

After initilaising I2C device Device Initialisation

choose the error interrupt sources needed to be enabled for I2C module and call the following functions once for each error interrupt source by choosing the right
error interrupt source as parameter,and after choosing all the error interrupt sources, enable the I2C error interrupt flag and then enable I2C error service request or interrupt with desired type of service and priority

//enable error interrupt sources
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_rxFifoUnderflow);
IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_txFifoOverflow);
// enable the error interrupt flag
IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
// enable the error interrupt
IfxI2c_enableErrorInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

I2C protocol interrupt (PROTOCOL)

After initilaising I2C device Device Initialisation

choose the protocol interrupt sources needed to be enabled for I2C module and call the following functions once for each protocol interrupt source by choosing the
right protocol interrupt source as parameter,and after choosing all the protocol interrupt sources, enable the I2C protocol interrupt flag and then enable
I2C protocol service request or interrupt with desired type of service and priority

//enable protocol interrupt sources
Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_addressMatch);
IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
// enable the protocol interrupt flag
IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
// enable the protocol interrupt
IfxI2c_enableProtocolInterrupt(i2c, IfxSrc_Tos_cpu0, 8);

you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts How to define Interrupts?

some additional APIs to clear, disable interrupt flags and get flag status are also available.


iLLD_TC26B: I2C

Modules
I2C
iLLD » I2C
Collaboration diagram for I2C:

Modules

Module Functions
Enumerations
Data Structures

Detailed Description


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » I2C » I2C
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
IFX_EXTERN void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

Function Documentation

◆ IfxI2c_I2c_initConfig()

IFX_EXTERN void IfxI2c_I2c_initConfig | ( | IfxI2c_I2c_Config * | config,
 |  | Ifx_I2C * | i2c
 | ) |  |

Fills the config structure with default values.

Parameters
config | Structure to configure the Module
i2c | Module address
Returns
None

Definition at line 35 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_I2c_initDevice()

IFX_EXTERN void IfxI2c_I2c_initDevice | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | const IfxI2c_I2c_deviceConfig * | i2cDeviceConfig
 | ) |  |

Initializes the device Handler.

Parameters
i2cDevice | I2c device Handler
i2cDeviceConfig | Structure to configure the device's data structure
Returns
None

A coding example can be found in How to use the I2c driver?

Definition at line 43 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_I2c_initDeviceConfig()

IFX_EXTERN void IfxI2c_I2c_initDeviceConfig | ( | IfxI2c_I2c_deviceConfig * | i2cDeviceConfig,
 |  | IfxI2c_I2c * | i2c
 | ) |  |

Fills the config structure of the slave device with default values.

Parameters
i2cDeviceConfig | Structure to configure the device's data structure
i2c | Handler
Returns
None

Definition at line 50 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_I2c_initModule()

IFX_EXTERN void IfxI2c_I2c_initModule | ( | IfxI2c_I2c * | i2c,
 |  | const IfxI2c_I2c_Config * | config
 | ) |  |

Initializes the Module.

Parameters
i2c | Handler
config | Configuration structure
Returns
None

A coding example can be found in How to use the I2c driver?

Definition at line 57 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_I2c_read()

IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | volatile uint8 * | data,
 |  | Ifx_SizeT | size
 | ) |  |

reads the I2c device

A coding example can be found in How to use the I2c driver?

Definition at line 79 of file IfxI2c_I2c.c.

◆ IfxI2c_I2c_write()

IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write | ( | IfxI2c_I2c_Device * | i2cDevice,
 |  | volatile uint8 * | data,
 |  | Ifx_SizeT | size
 | ) |  |

writes to the I2c device

A coding example can be found in How to use the I2c driver?

Definition at line 288 of file IfxI2c_I2c.c.

Referenced by IfxCif_Cam_initCamera().


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » I2C » I2C
Collaboration diagram for Enumerations:

Enumerations

enum IfxI2c_I2c_Status {
IfxI2c_I2c_Status_ok = 0,
IfxI2c_I2c_Status_nak = 1,
IfxI2c_I2c_Status_al = 2,
IfxI2c_I2c_Status_busNotFree = 3,
IfxI2c_I2c_Status_error = 4
}

Detailed Description

Enumeration Type Documentation

◆ IfxI2c_I2c_Status

enum IfxI2c_I2c_Status
Enumerator
IfxI2c_I2c_Status_ok | ok
IfxI2c_I2c_Status_nak | NAK.
IfxI2c_I2c_Status_al | Arbitration Lost.
IfxI2c_I2c_Status_busNotFree | bus is not free
IfxI2c_I2c_Status_error | error

Definition at line 298 of file IfxI2c_I2c.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » I2C » I2C
Collaboration diagram for Data Structures:

Data Structures

struct | IfxI2c_I2c
Handler. More...
struct | IfxI2c_I2c_Config
Structure to configure the Module. More...
struct | IfxI2c_I2c_Device
Structure with slave device data. More...
struct | IfxI2c_I2c_deviceConfig
Structure to configure the device's data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxI2c_I2c

struct IfxI2c_I2c

Handler.

Definition at line 317 of file IfxI2c_I2c.h.

Data Fields
float32 | baudrate | Baudrate.
IfxI2c_BusStatus | busStatus | Status of the bus.
Ifx_I2C * | i2c | Module Pointer.
IfxI2c_I2c_Status | status | Status of the last bus operation.

◆ IfxI2c_I2c_Config

struct IfxI2c_I2c_Config

Structure to configure the Module.

Definition at line 327 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_Config:
[legend]
Data Fields
float32 | baudrate | Baudrate.
Ifx_I2C * | i2c | Module Pointer.
IFX_CONST IfxI2c_Pins * | pins | Pins.

◆ IfxI2c_I2c_Device

struct IfxI2c_I2c_Device

Structure with slave device data.

Definition at line 336 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_Device:
[legend]
Data Fields
uint8 | deviceAddress |
IfxI2c_I2c * | i2c | Module Pionter.

◆ IfxI2c_I2c_deviceConfig

struct IfxI2c_I2c_deviceConfig

Structure to configure the device's data structure.

Definition at line 344 of file IfxI2c_I2c.h.

Collaboration diagram for IfxI2c_I2c_deviceConfig:
[legend]
Data Fields
uint8 | deviceAddress | the slave device's address
IfxI2c_I2c * | i2c | Module Pointer.


iLLD_TC26B: IfxI2c_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxI2c_cfg.h File Reference
iLLD » I2C

I2C on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxI2c_reg.h"
Include dependency graph for IfxI2c_cfg.h:

Go to the source code of this file.

Macros

#define IFXI2C_NUM_MODULES (1)

Enumerations

enum IfxI2c_Index {
IfxI2c_Index_none = -1,
IfxI2c_Index_0 = 0
}
List of the available I2c interfaces. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

I2C on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxI2c_cfg.h.

Macro Definition Documentation

◆ IFXI2C_NUM_MODULES

#define IFXI2C_NUM_MODULES (1)

Definition at line 48 of file IfxI2c_cfg.h.

Referenced by IfxI2c_getAddress(), and IfxI2c_getIndex().


iLLD_TC26B: IfxI2c_PinMap.c File Reference

  • _PinMap
Variables
IfxI2c_PinMap.c File Reference
iLLD » I2C

I2C I/O map. More...

#include "IfxI2c_PinMap.h"
Include dependency graph for IfxI2c_PinMap.c:

Go to the source code of this file.

Variables

IfxI2c_Scl_InOut | IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}
IfxI2c_Scl_InOut | IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxI2c_Scl_InOut | IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}
IfxI2c_Sda_InOut | IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}
const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]

Detailed Description

I2C I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxI2c_PinMap.c.

Variable Documentation

◆ IfxI2c0_SCL_P02_5_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}

Definition at line 28 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SCL_P13_1_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 29 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SCL_P15_4_INOUT

IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}

Definition at line 30 of file IfxI2c_PinMap.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c0_SDA_P02_4_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5}

Definition at line 31 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SDA_P13_2_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6}

Definition at line 32 of file IfxI2c_PinMap.c.

◆ IfxI2c0_SDA_P15_5_INOUT

IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6}

Definition at line 33 of file IfxI2c_PinMap.c.

Referenced by IfxCif_Cam_initCamera().

◆ IfxI2c_Scl_InOut_pinTable

const IfxI2c_Scl_InOut* IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
Initial value:
= {
{
&IfxI2c0_SCL_P02_5_INOUT,
&IfxI2c0_SCL_P13_1_INOUT,
&IfxI2c0_SCL_P15_4_INOUT
}
}
IfxI2c0_SCL_P13_1_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Definition: IfxI2c_PinMap.c:29
IfxI2c0_SCL_P02_5_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Definition: IfxI2c_PinMap.c:28
IfxI2c0_SCL_P15_4_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Definition: IfxI2c_PinMap.c:30

Definition at line 36 of file IfxI2c_PinMap.c.

◆ IfxI2c_Sda_InOut_pinTable

const IfxI2c_Sda_InOut* IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
Initial value:
= {
{
&IfxI2c0_SDA_P02_4_INOUT,
&IfxI2c0_SDA_P13_2_INOUT,
&IfxI2c0_SDA_P15_5_INOUT
}
}
IfxI2c0_SDA_P15_5_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Definition: IfxI2c_PinMap.c:33
IfxI2c0_SDA_P13_2_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Definition: IfxI2c_PinMap.c:32
IfxI2c0_SDA_P02_4_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Definition: IfxI2c_PinMap.c:31

Definition at line 44 of file IfxI2c_PinMap.c.


iLLD_TC26B: IfxI2c_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxI2c_PinMap.h File Reference
iLLD » I2C

I2C I/O map. More...

#include <IfxI2c_reg.h>
#include <_Impl/IfxI2c_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxI2c_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxI2c_Scl_InOut
SCL input mapping structure. More...
struct | IfxI2c_Sda_InOut
SDA input mapping structure. More...

Macros

#define | IFXI2C_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
#define | IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
I2C0_SCL: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
I2C0_SDA: I2C0 output and input. More...
IFX_EXTERN const IfxI2c_Scl_InOut * | IfxI2c_Scl_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table. More...
IFX_EXTERN const IfxI2c_Sda_InOut * | IfxI2c_Sda_InOut_pinTable [IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table. More...

Detailed Description

I2C I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxI2c_PinMap.h.


iLLD_TC26B: IfxI2c_I2c.h File Reference

  • I2c
  • I2c
Data Structures | Enumerations | Functions
IfxI2c_I2c.h File Reference
iLLD » I2C

I2C I2C details. More...

#include "I2c/Std/IfxI2c.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxI2c_I2c.h:

Go to the source code of this file.

Data Structures

struct | IfxI2c_I2c
Handler. More...
struct | IfxI2c_I2c_Config
Structure to configure the Module. More...
struct | IfxI2c_I2c_Device
Structure with slave device data. More...
struct | IfxI2c_I2c_deviceConfig
Structure to configure the device's data structure. More...

Enumerations

enum IfxI2c_I2c_Status {
IfxI2c_I2c_Status_ok = 0,
IfxI2c_I2c_Status_nak = 1,
IfxI2c_I2c_Status_al = 2,
IfxI2c_I2c_Status_busNotFree = 3,
IfxI2c_I2c_Status_error = 4
}

Functions

IFX_EXTERN void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
IFX_EXTERN void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
IFX_EXTERN void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IFX_EXTERN IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

I2C I2C details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxI2c_I2c.h.


iLLD_TC26B: IfxI2c.h File Reference

  • I2c
  • Std
Data Structures | Enumerations | Functions
IfxI2c.h File Reference
iLLD » I2C

I2C basic functionality. More...

#include "_Impl/IfxI2c_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxI2c_bf.h"
#include "_PinMap/IfxI2c_PinMap.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxI2c.h:

Go to the source code of this file.

Data Structures

struct IfxI2c_Pins
Pin Structure. More...

Enumerations

enum IfxI2c_BusStatus {
IfxI2c_BusStatus_idle = 0,
IfxI2c_BusStatus_started = 1,
IfxI2c_BusStatus_busyMaster = 2,
IfxI2c_BusStatus_remoteSlave = 3
}
enum IfxI2c_ErrorInterruptSource {
IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF,
IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF
}
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U More...
enum IfxI2c_PinSelect {
IfxI2c_PinSelect_a = 0,
IfxI2c_PinSelect_b = 1,
IfxI2c_PinSelect_c = 2,
IfxI2c_PinSelect_d = 3,
IfxI2c_PinSelect_e = 4,
IfxI2c_PinSelect_f = 5,
IfxI2c_PinSelect_g = 6,
IfxI2c_PinSelect_h = 7
}
enum IfxI2c_ProtocolInterruptSource {
IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF,
IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF,
IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF,
IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF,
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF,
IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF,
IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF
}
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U More...
enum IfxI2c_SleepMode {
IfxI2c_SleepMode_enable = 0,
IfxI2c_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_I2C.CLC1.B.EDIS. More...

Functions

IFX_INLINE boolean | IfxI2c_busIsFree (Ifx_I2C *i2c)
Returns if the bus is free. More...
IFX_INLINE void | IfxI2c_clearAllDtrInterruptSources (Ifx_I2C *i2c)
clears all DTR interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllErrorInterruptSources (Ifx_I2C *i2c)
clears all Error Interrupt sources More...
IFX_INLINE void | IfxI2c_clearAllProtocolInterruptSources (Ifx_I2C *i2c)
Clears all Protocol Interrupt sources. More...
IFX_INLINE void | IfxI2c_clearBurstRequestInterruptSource (Ifx_I2C *i2c)
clears burst request interrupt source More...
IFX_INLINE void | IfxI2c_clearErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_clearLastBurstRequestInterruptSource (Ifx_I2C *i2c)
clears last burst request interrupt source More...
IFX_INLINE void | IfxI2c_clearLastSingleRequestInterruptSource (Ifx_I2C *i2c)
clears last single request interrupt source More...
IFX_INLINE void | IfxI2c_clearProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_clearSingleRequestInterruptSource (Ifx_I2C *i2c)
clears single request interrupt source More...
IFX_INLINE void | IfxI2c_disableBurstRequestInterruptSource (Ifx_I2C *i2c)
disables burst request interrupt source More...
IFX_INLINE void | IfxI2c_disableErrorInterruptFlag (Ifx_I2C *i2c)
disables the error interrupt flag More...
IFX_INLINE void | IfxI2c_disableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_disableLastBurstRequestInterruptSource (Ifx_I2C *i2c)
disables last burst request interrupt source More...
IFX_INLINE void | IfxI2c_disableLastSingleRequestInterruptSource (Ifx_I2C *i2c)
disables last single request interrupt source More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptFlag (Ifx_I2C *i2c)
disables the Protocol interrupt flag More...
IFX_INLINE void | IfxI2c_disableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_disableSingleRequestInterruptSource (Ifx_I2C *i2c)
disables single request interrupt source More...
IFX_INLINE void | IfxI2c_enableBurstRequestInterruptSource (Ifx_I2C *i2c)
enables burst request interrupt source More...
IFX_INLINE void | IfxI2c_enableErrorInterruptFlag (Ifx_I2C *i2c)
enables the error interrupt flag More...
IFX_INLINE void | IfxI2c_enableErrorInterruptSource (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt More...
IFX_INLINE void | IfxI2c_enableLastBurstRequestInterruptSource (Ifx_I2C *i2c)
enables last burst request interrupt source More...
IFX_INLINE void | IfxI2c_enableLastSingleRequestInterruptSource (Ifx_I2C *i2c)
enables last single request interrupt source More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptFlag (Ifx_I2C *i2c)
enables the protocol interrupt flag More...
IFX_INLINE void | IfxI2c_enableProtocolInterruptSource (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt More...
IFX_INLINE void | IfxI2c_enableSingleRequestInterruptSource (Ifx_I2C *i2c)
enables single request interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getBurstDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C burst data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getBurstRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of burst request interrupt source status More...
IFX_INLINE IfxI2c_BusStatus | IfxI2c_getBusStatus (Ifx_I2C *i2c)
IFX_INLINE boolean | IfxI2c_getErrorInterruptFlagStatus (Ifx_I2C *i2c)
returns the current status of error interrupt flag More...
IFX_INLINE boolean | IfxI2c_getErrorInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getErrorSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getLastBurstDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C last burst data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getLastBurstRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of last burst request interrupt source status More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getLastSingleDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C last single data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getLastSingleRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of last single request interrupt source status More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptFlagStatus (Ifx_I2C *i2c)
returns the current raw status of protocol interrupt More...
IFX_INLINE boolean | IfxI2c_getProtocolInterruptSourceStatus (Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getProtocolSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxI2c_getSingleDataTransferSrcPointer (Ifx_I2C *i2c)
Returns the SRC pointer for I2C single data transfer request interrupt. More...
IFX_INLINE boolean | IfxI2c_getSingleRequestInterruptSourceStatus (Ifx_I2C *i2c)
returns the status of single request interrupt source status More...
IFX_INLINE boolean | IfxI2c_isFifoRequest (Ifx_I2C *i2c)
Returns if the Fifo is requesting new data. More...
IFX_INLINE void | IfxI2c_run (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_setPinSelection (Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin More...
IFX_INLINE void | IfxI2c_setReceivePacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received. More...
IFX_INLINE void | IfxI2c_setSlaveDeviceAddress (Ifx_I2C *i2c, uint16 address)
IFX_INLINE void | IfxI2c_setSleepMode (Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxI2c_setTransmitPacketSize (Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted. More...
IFX_INLINE void | IfxI2c_stop (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_waitBusFree (Ifx_I2C *i2c)
IFX_INLINE void | IfxI2c_writeFifo (Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo. More...
IFX_EXTERN void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
IFX_EXTERN void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt. More...
IFX_EXTERN void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
IFX_EXTERN void | IfxI2c_enableLastBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt More...
IFX_EXTERN void | IfxI2c_enableLastSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt More...
IFX_EXTERN void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
IFX_EXTERN void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
IFX_EXTERN void | IfxI2c_enableSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt More...
IFX_EXTERN Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
IFX_EXTERN float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IFX_EXTERN IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
IFX_EXTERN void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
IFX_EXTERN void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
IFX_EXTERN void | IfxI2c_resetFifo (Ifx_I2C *i2c)
IFX_EXTERN void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
IFX_EXTERN void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...

Detailed Description

I2C basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxI2c.h.


iLLD_TC26B: IOM

Modules | Files
IOM
iLLD
Collaboration diagram for IOM:

Modules

Implementation
Standard Driver
IOM Driver

Files

file | IfxIom_cfg.h
IOM on-chip implementation data.
file | IfxIom_Driver.h
IOM DRIVER details.
file | IfxIom.h
IOM basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » IOM
Collaboration diagram for Implementation:

Modules

Enum input signals
Enumeration inputs

Detailed Description


iLLD_TC26B: Enum input signals

Enumerations
Enum input signals
iLLD » IOM » Implementation
Collaboration diagram for Enum input signals:

Enumerations

enum IfxIom_MonInputSignal {
IfxIom_MonInputSignal_p = 0,
IfxIom_MonInputSignal_0 = 1,
IfxIom_MonInputSignal_1 = 2,
IfxIom_MonInputSignal_2 = 3
}
IOM_FPCCTRk.ISM. More...
enum IfxIom_RefInputSignal {
IfxIom_RefInputSignal_p = 0,
IfxIom_RefInputSignal_0 = 1,
IfxIom_RefInputSignal_1 = 2,
IfxIom_RefInputSignal_2 = 3,
IfxIom_RefInputSignal_xorCombiner = 4
}
IOM_FPCCTRk.ISR. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_MonInputSignal

enum IfxIom_MonInputSignal

IOM_FPCCTRk.ISM.

Enumerator
IfxIom_MonInputSignal_p | Signal input Pn_IN (from portlogic) selected.
IfxIom_MonInputSignal_0 | Monitor Signal Input 0 selected.
IfxIom_MonInputSignal_1 | Monitor Signal Input 1 selected.
IfxIom_MonInputSignal_2 | Monitor Signal Input 2 selected.

Definition at line 59 of file IfxIom_cfg.h.

◆ IfxIom_RefInputSignal

enum IfxIom_RefInputSignal

IOM_FPCCTRk.ISR.

Enumerator
IfxIom_RefInputSignal_p | Signal input Pn_IN (from portlogic) selected.
IfxIom_RefInputSignal_0 | Monitor Signal Input 0 selected.
IfxIom_RefInputSignal_1 | Monitor Signal Input 1 selected.
IfxIom_RefInputSignal_2 | Monitor Signal Input 2 selected.
IfxIom_RefInputSignal_xorCombiner | GTM XOR Combiner selected.

Definition at line 69 of file IfxIom_cfg.h.


iLLD_TC26B: Enumeration inputs

Enumerations
Enumeration inputs
iLLD » IOM » Implementation
Collaboration diagram for Enumeration inputs:

Enumerations

enum IfxIom_MonInput {
IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0,
IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
}
LAM mon inputs. More...
enum IfxIom_RefInput {
IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
}
LAM ref inputs. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_MonInput

enum IfxIom_MonInput

LAM mon inputs.

Enumerator
IfxIom_MonInput_p33_0 | Value=0xXXYY where XX=ISM, YY=k.
IfxIom_MonInput_p33_1 |
IfxIom_MonInput_p33_2 |
IfxIom_MonInput_p33_3 |
IfxIom_MonInput_p33_4 |
IfxIom_MonInput_p33_5 |
IfxIom_MonInput_p33_6 |
IfxIom_MonInput_p33_7 |
IfxIom_MonInput_p33_8 |
IfxIom_MonInput_p33_9 |
IfxIom_MonInput_p33_10 |
IfxIom_MonInput_p33_11 |
IfxIom_MonInput_p33_12 |
IfxIom_MonInput_p20_12 |
IfxIom_MonInput_p20_13 |
IfxIom_MonInput_p20_14 |
IfxIom_MonInput_gtmTout22 |
IfxIom_MonInput_gtmTout23 |
IfxIom_MonInput_gtmTout24 |
IfxIom_MonInput_gtmTout25 |
IfxIom_MonInput_gtmTout26 |
IfxIom_MonInput_gtmTout27 |
IfxIom_MonInput_gtmTout28 |
IfxIom_MonInput_gtmTout29 |
IfxIom_MonInput_gtmTout30 |
IfxIom_MonInput_gtmTout31 |
IfxIom_MonInput_gtmTout32 |
IfxIom_MonInput_gtmTout33 |
IfxIom_MonInput_gtmTout34 |
IfxIom_MonInput_gtmTout68 |
IfxIom_MonInput_gtmTout69 |
IfxIom_MonInput_gtmTout70 |
IfxIom_MonInput_ccu60Cc62 |
IfxIom_MonInput_ccu60Cc61 |
IfxIom_MonInput_ccu60Cc60 |
IfxIom_MonInput_ccu60Cout60 |
IfxIom_MonInput_ccu60Cout61 |
IfxIom_MonInput_ccu60Cout62 |
IfxIom_MonInput_ccu60Cout63 |
IfxIom_MonInput_ccu61Cout63 |
IfxIom_MonInput_ccu61Cc60 |
IfxIom_MonInput_ccu61Cc61 |
IfxIom_MonInput_ccu61Cc62 |
IfxIom_MonInput_ccu61Cout60 |
IfxIom_MonInput_ccu61Cout61 |
IfxIom_MonInput_ccu61Cout62 |
IfxIom_MonInput_psi5Psitx0 |
IfxIom_MonInput_psi5Psitx1 |
IfxIom_MonInput_qspi0Mrst |
IfxIom_MonInput_qspi1Mrst |
IfxIom_MonInput_qspi2Mrst |
IfxIom_MonInput_qspi3Mrst |
IfxIom_MonInput_gnd |
IfxIom_MonInput_canNode0Txd |
IfxIom_MonInput_canNode1Txd |
IfxIom_MonInput_canNode2Txd |
IfxIom_MonInput_canNode3Txd |
IfxIom_MonInput_gtmTout104 |
IfxIom_MonInput_gtmTout105 |
IfxIom_MonInput_gtmTout106 |
IfxIom_MonInput_asclin0Atx |
IfxIom_MonInput_asclin1Atx |
IfxIom_MonInput_asclin2Atx |
IfxIom_MonInput_asclin3Atx |

Definition at line 84 of file IfxIom_cfg.h.

◆ IfxIom_RefInput

enum IfxIom_RefInput

LAM ref inputs.

Enumerator
IfxIom_RefInput_p33_0
IfxIom_RefInput_p33_1
IfxIom_RefInput_p33_2
IfxIom_RefInput_p33_3
IfxIom_RefInput_p33_4
IfxIom_RefInput_p33_5
IfxIom_RefInput_p33_6
IfxIom_RefInput_p33_7
IfxIom_RefInput_p33_8
IfxIom_RefInput_p33_9
IfxIom_RefInput_p33_10
IfxIom_RefInput_p33_11
IfxIom_RefInput_p33_12
IfxIom_RefInput_p20_12
IfxIom_RefInput_p20_13
IfxIom_RefInput_p20_14
IfxIom_RefInput_gtmTout0
IfxIom_RefInput_gtmTout1
IfxIom_RefInput_gtmTout2
IfxIom_RefInput_gtmTout3
IfxIom_RefInput_gtmTout4
IfxIom_RefInput_gtmTout5
IfxIom_RefInput_gtmTout6
IfxIom_RefInput_gtmTout7
IfxIom_RefInput_gtmTout8
IfxIom_RefInput_gtmTout9
IfxIom_RefInput_gtmTout10
IfxIom_RefInput_gtmTout11
IfxIom_RefInput_gtmTout12
IfxIom_RefInput_gtmTout13
IfxIom_RefInput_gtmTout14
IfxIom_RefInput_gtmTout15
IfxIom_RefInput_ccu60Cout63
IfxIom_RefInput_ccu60Cout62
IfxIom_RefInput_ccu60Cout61
IfxIom_RefInput_ccu60Cout60
IfxIom_RefInput_ccu60Cc62
IfxIom_RefInput_ccu60Cc61
IfxIom_RefInput_ccu60Cc60
IfxIom_RefInput_ccu61Cout63
IfxIom_RefInput_ccu61Cout62
IfxIom_RefInput_ccu61Cout61
IfxIom_RefInput_ccu61Cout60
IfxIom_RefInput_ccu61Cc62
IfxIom_RefInput_ccu61Cc61
IfxIom_RefInput_ccu61Cc60
IfxIom_RefInput_psi5Psitx0
IfxIom_RefInput_psi5Psitx2
IfxIom_RefInput_qspi0Mrst
IfxIom_RefInput_qspi1Mrst
IfxIom_RefInput_qspi2Mrst
IfxIom_RefInput_qspi3Mrst
IfxIom_RefInput_gnd
IfxIom_RefInput_canNode0Txd
IfxIom_RefInput_canNode1Txd
IfxIom_RefInput_canNode2Txd
IfxIom_RefInput_canNode3Txd
IfxIom_RefInput_gtmTout107
IfxIom_RefInput_gtmTout108
IfxIom_RefInput_gtmTout109
IfxIom_RefInput_asclin0Atx
IfxIom_RefInput_asclin1Atx
IfxIom_RefInput_asclin2Atx
IfxIom_RefInput_asclin3Atx
IfxIom_RefInput_exorCombiner

Definition at line 154 of file IfxIom_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » IOM
Collaboration diagram for Standard Driver:

Modules

Enumeration
Utility Functions
Enumeration Obsolete (NOt recommended for use)
Module Functions Obsolete (NOt recommended for use)

Detailed Description


iLLD_TC26B: Enumeration

Enumerations
Enumeration
iLLD » IOM » Standard Driver
Collaboration diagram for Enumeration:

Enumerations

enum IfxIom_LamEventSource {
IfxIom_LamEventSource_mon = 0,
IfxIom_LamEventSource_monXorRef = 1
}
Event source configuration IOM_LAMCFGm.MOS. More...
enum IfxIom_LamEventTrigger {
IfxIom_LamEventTrigger_none = 0,
IfxIom_LamEventTrigger_risingEdge = 1,
IfxIom_LamEventTrigger_fallingEdge = 2,
IfxIom_LamEventTrigger_anyEdge = 3
}
Event trigger configuration IOM_LAMCFGm.EDS upper two bits. More...
enum IfxIom_LamEventWindowClearEvent {
IfxIom_LamEventWindowClearEvent_none = 0,
IfxIom_LamEventWindowClearEvent_risingEdge = 1,
IfxIom_LamEventWindowClearEvent_fallingEdge = 2,
IfxIom_LamEventWindowClearEvent_anyEdge = 3
}
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits. More...
enum IfxIom_LamEventWindowControlSource {
IfxIom_LamEventWindowControlSource_ref = 0,
IfxIom_LamEventWindowControlSource_mon = 1
}
Timer control source configuration IOM_LAMCFGm.EWS. More...
enum IfxIom_LamEventWindowRunControl {
IfxIom_LamEventWindowRunControl_freeRunning = 0,
IfxIom_LamEventWindowRunControl_gated = 1
}
Timer run configuration IOM_LAMCFGm.RMS. More...
enum IfxIom_LamFilterMode {
IfxIom_LamFilterMode_delayDebounceBothEdge = 0,
IfxIom_LamFilterMode_immediateDebounceBothEdge = 1,
IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2,
IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3,
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4,
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5,
IfxIom_LamFilterMode_prescalerOnRisingEdge = 6,
IfxIom_LamFilterMode_prescalerOnFallingEdge = 7,
IfxIom_LamFilterMode_noFilter = 8
}
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter. More...
enum IfxIom_LamId {
IfxIom_LamId_0 = 0,
IfxIom_LamId_1,
IfxIom_LamId_2,
IfxIom_LamId_3,
IfxIom_LamId_4,
IfxIom_LamId_5,
IfxIom_LamId_6,
IfxIom_LamId_7,
IfxIom_LamId_8,
IfxIom_LamId_9,
IfxIom_LamId_10,
IfxIom_LamId_11,
IfxIom_LamId_12,
IfxIom_LamId_13,
IfxIom_LamId_14,
IfxIom_LamId_15
}
Specifies the Logic Module Analyser Module Number. More...
enum IfxIom_SleepMode {
IfxIom_SleepMode_enable = 0,
IfxIom_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS. More...

Detailed Description

Enumeration Type Documentation

◆ IfxIom_LamEventSource

enum IfxIom_LamEventSource

Event source configuration IOM_LAMCFGm.MOS.

Enumerator
IfxIom_LamEventSource_mon | Monitor signal is sourced directly from FPCmch.
IfxIom_LamEventSource_monXorRef | Monitor signal is EXOR'd with FPCrch.

Definition at line 55 of file IfxIom.h.

◆ IfxIom_LamEventTrigger

enum IfxIom_LamEventTrigger

Event trigger configuration IOM_LAMCFGm.EDS upper two bits.

Enumerator
IfxIom_LamEventTrigger_none | Neither edge used to gate event generation.
IfxIom_LamEventTrigger_risingEdge | Positive edge used to gate event generation.
IfxIom_LamEventTrigger_fallingEdge | Negative edge used to gate event generation.
IfxIom_LamEventTrigger_anyEdge | Either edge used to gate event generation.

Definition at line 64 of file IfxIom.h.

◆ IfxIom_LamEventWindowClearEvent

enum IfxIom_LamEventWindowClearEvent

Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.

Enumerator
IfxIom_LamEventWindowClearEvent_none | Neither edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_risingEdge | Positive edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_fallingEdge | Negative edge used to clear event windowcounter.
IfxIom_LamEventWindowClearEvent_anyEdge | Either edge used to clear event windowcounter.

Definition at line 75 of file IfxIom.h.

◆ IfxIom_LamEventWindowControlSource

enum IfxIom_LamEventWindowControlSource

Timer control source configuration IOM_LAMCFGm.EWS.

Enumerator
IfxIom_LamEventWindowControlSource_ref | Event window generation is determined from the reference signal.
IfxIom_LamEventWindowControlSource_mon | Event window generation is determined from the monitor signal.

Definition at line 86 of file IfxIom.h.

◆ IfxIom_LamEventWindowRunControl

enum IfxIom_LamEventWindowRunControl

Timer run configuration IOM_LAMCFGm.RMS.

Enumerator
IfxIom_LamEventWindowRunControl_freeRunning | Event window generation is free-running.
IfxIom_LamEventWindowRunControl_gated | Event window generation is gated with the monitor or reference signal.

Definition at line 95 of file IfxIom.h.

◆ IfxIom_LamFilterMode

enum IfxIom_LamFilterMode

FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.

Enumerator
IfxIom_LamFilterMode_delayDebounceBothEdge | Delayed Debounce Filter Mode on both edges.
IfxIom_LamFilterMode_immediateDebounceBothEdge | Immediate Debounce Filter Mode on both edges.
IfxIom_LamFilterMode_immediateDebounceRisingEdge | Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering.
IfxIom_LamFilterMode_immediateDebounceFallingEdge | Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode.
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge | Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode.
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge | Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode.
IfxIom_LamFilterMode_prescalerOnRisingEdge | Prescaler Mode (triggered on rising edge)
IfxIom_LamFilterMode_prescalerOnFallingEdge | Prescaler Mode (triggered on falling edge)
IfxIom_LamFilterMode_noFilter | No filter (value used for software only )

Definition at line 104 of file IfxIom.h.

◆ IfxIom_LamId

enum IfxIom_LamId

Specifies the Logic Module Analyser Module Number.

Enumerator
IfxIom_LamId_0 | Specifies the LAM Id0.
IfxIom_LamId_1 | Specifies the LAM Id1.
IfxIom_LamId_2 | Specifies the LAM Id2.
IfxIom_LamId_3 | Specifies the LAM Id3.
IfxIom_LamId_4 | Specifies the LAM Id4.
IfxIom_LamId_5 | Specifies the LAM Id5.
IfxIom_LamId_6 | Specifies the LAM Id6.
IfxIom_LamId_7 | Specifies the LAM Id7.
IfxIom_LamId_8 | Specifies the LAM Id8.
IfxIom_LamId_9 | Specifies the LAM Id9.
IfxIom_LamId_10 | Specifies the LAM Id10.
IfxIom_LamId_11 | Specifies the LAM Id11.
IfxIom_LamId_12 | Specifies the LAM Id12.
IfxIom_LamId_13 | Specifies the LAM Id13.
IfxIom_LamId_14 | Specifies the LAM Id14.
IfxIom_LamId_15 | Specifies the LAM Id15.

Definition at line 119 of file IfxIom.h.

◆ IfxIom_SleepMode

enum IfxIom_SleepMode

Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS.

Enumerator
IfxIom_SleepMode_enable | Enables sleep mode.
IfxIom_SleepMode_disable | Disables sleep mode.

Definition at line 142 of file IfxIom.h.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » IOM » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_INLINE void | IfxIom_disableModule (Ifx_IOM *iom)
Disables the IOM module . More...
IFX_INLINE void | IfxIom_enableModule (Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control. More...
IFX_INLINE void | IfxIom_setSleepMode (Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal. More...
IFX_EXTERN float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
IFX_EXTERN void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...

Detailed Description

Function Documentation

◆ IfxIom_disableModule()

IFX_INLINE void IfxIom_disableModule ( Ifx_IOM * iom )

Disables the IOM module .

Parameters
iom Pointer to IOM module registers
Returns
None

Definition at line 202 of file IfxIom.h.

◆ IfxIom_enableModule()

IFX_INLINE void IfxIom_enableModule | ( | Ifx_IOM * | iom,
 |  | uint8 | clockDivider
 | ) |  |

Enable the IOM module control.

Parameters
iom | Pointer to IOM module registers
clockDivider | IOM clock divider. Set to 1 for max clock.
Returns
None

Definition at line 212 of file IfxIom.h.

◆ IfxIom_getFrequency()

IFX_EXTERN float32 IfxIom_getFrequency ( Ifx_IOM * iom )

Return the frequency used for the filter and timers clock.

Parameters
iom Pointer to IOM module registers

Definition at line 36 of file IfxIom.c.

Referenced by IfxIom_Driver_initLam().

◆ IfxIom_resetModule()

IFX_EXTERN void IfxIom_resetModule ( Ifx_IOM * iom )

Reset the IOM module.

Parameters
iom Pointer to IOM module registers
Returns
None

Definition at line 49 of file IfxIom.c.

◆ IfxIom_setSleepMode()

IFX_INLINE void IfxIom_setSleepMode | ( | Ifx_IOM * | iom,
 |  | IfxIom_SleepMode | mode
 | ) |  |

Enable/disable the sensitivity of the module to sleep signal.

Parameters
iom | Pointer to IOM registers
mode | Mode selection (enable/disable)
Returns
None

Definition at line 223 of file IfxIom.h.


iLLD_TC26B: Enumeration Obsolete (NOt recommended for use)

Enumeration Obsolete (NOt recommended for use)
iLLD » IOM » Standard Driver
Collaboration diagram for Enumeration Obsolete (NOt recommended for use):


iLLD_TC26B: Module Functions Obsolete (NOt recommended for use)

Module Functions Obsolete (NOt recommended for use)
iLLD » IOM » Standard Driver
Collaboration diagram for Module Functions Obsolete (NOt recommended for use):


iLLD_TC26B: IOM Driver

Modules
IOM Driver
iLLD » IOM
Collaboration diagram for IOM Driver:

Modules

Driver Functions
Structures

Detailed Description


iLLD_TC26B: Driver Functions

Functions
Driver Functions
iLLD » IOM » IOM Driver
Collaboration diagram for Driver Functions:

Functions

IFX_EXTERN void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
IFX_EXTERN void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
IFX_EXTERN void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
IFX_EXTERN uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
IFX_EXTERN void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
IFX_EXTERN boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
IFX_EXTERN void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
IFX_EXTERN boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
IFX_EXTERN void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
IFX_EXTERN void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

Function Documentation

◆ IfxIom_Driver_clearAllGlitch()

IFX_EXTERN void IfxIom_Driver_clearAllGlitch ( IfxIom_Driver * driver )

Clear all LAM monitor and reference glitch flags.

Parameters
driver Pointer to the IOM driver object
Returns
None

Definition at line 49 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearHistory()

IFX_EXTERN void IfxIom_Driver_clearHistory ( IfxIom_Driver * driver )

Clear the IOM event history.

Parameters
driver Pointer to the IOM driver object
Returns
None

Definition at line 56 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearLamMonGlitch()

IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch ( IfxIom_Driver_Lam * driver )

Clear the LAM monitor signal glitch flag.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 63 of file IfxIom_Driver.c.

◆ IfxIom_Driver_clearLamRefGlitch()

IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch ( IfxIom_Driver_Lam * driver )

Clear the LAM reference signal glitch flag.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 74 of file IfxIom_Driver.c.

◆ IfxIom_Driver_disableEvents()

IFX_EXTERN uint32 IfxIom_Driver_disableEvents ( IfxIom_Driver * driver )

Disable all event generation.

Parameters
driver Pointer to the IOM driver object
Returns
Return the configured events

Definition at line 85 of file IfxIom_Driver.c.

◆ IfxIom_Driver_disableLamEvent()

IFX_EXTERN void IfxIom_Driver_disableLamEvent ( IfxIom_Driver_Lam * driver )

Disable the event generation for the LAM.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 94 of file IfxIom_Driver.c.

◆ IfxIom_Driver_enableLamEvent()

IFX_EXTERN void IfxIom_Driver_enableLamEvent ( IfxIom_Driver_Lam * driver )

Enable the event genration for the LAM.

Parameters
driver Pointer to the LAM driver object
Returns
None

Definition at line 115 of file IfxIom_Driver.c.

◆ IfxIom_Driver_getHistory()

IFX_EXTERN void IfxIom_Driver_getHistory | ( | IfxIom_Driver * | driver,
 |  | uint16 * | a,
 |  | uint16 * | b,
 |  | uint16 * | c,
 |  | uint16 * | d
 | ) |  |

Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...

Parameters
driver | Pointer to the IOM driver object
a | Event mask of history level 0 (Last event)
b | Event mask of history level 1
c | Event mask of history level 2
d | Event mask of history level 3 (oldest event)
Returns
None

Definition at line 136 of file IfxIom_Driver.c.

◆ IfxIom_Driver_init()

IFX_EXTERN boolean IfxIom_Driver_init | ( | IfxIom_Driver * | driver,
 |  | IfxIom_Driver_Config * | config
 | ) |  |

Initialize the IOM Must be called before IfxIom_Driver_initLam()

Parameters
driver | Pointer to the IOM driver object. Will be initialized by the function
config | IOM driver configuration
Returns
TRUE in case of success else FALSE

Definition at line 151 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initConfig()

IFX_EXTERN void IfxIom_Driver_initConfig | ( | IfxIom_Driver_Config * | config,
 |  | Ifx_IOM * | module
 | ) |  |

Set the IOM default configuration.

Parameters
config | IOM configuration. Will be initialized by the function
module | Pointer to the IOM module
Returns
None

Definition at line 160 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initLam()

IFX_EXTERN boolean IfxIom_Driver_initLam | ( | IfxIom_Driver_Lam * | driver,
 |  | IfxIom_Driver_LamConfig * | config
 | ) |  |

Initialize the LAM channel.

Parameters
driver | Pointer to the LAM driver object. Will be initialized by the function
config | LAM driver configuration
Returns
TRUE in case of success else FALSE

Definition at line 166 of file IfxIom_Driver.c.

◆ IfxIom_Driver_initLamConfig()

IFX_EXTERN void IfxIom_Driver_initLamConfig | ( | IfxIom_Driver_LamConfig * | config,
 |  | IfxIom_Driver * | driver
 | ) |  |

Set the LAM default configuration.

Parameters
config | LAM configuration. Will be initialized by the function
driver | Pointer to the IOM driver object
Returns
None

Definition at line 316 of file IfxIom_Driver.c.

◆ IfxIom_Driver_isLamMonGlitch()

IFX_EXTERN void IfxIom_Driver_isLamMonGlitch | ( | IfxIom_Driver_Lam * | driver,
 |  | boolean * | risingEdgeGlitch,
 |  | boolean * | fallingEdgeGlitch
 | ) |  |

Return the LAM monitor glitch flags.

Parameters
driver | Pointer to the LAM driver object
risingEdgeGlitch | Set to TRUE by the function if rising edge glitch were detected on the monitor signal
fallingEdgeGlitch | Set to TRUE by the function if falling edge glitch were detected on the monitor signal
Returns
None

Definition at line 345 of file IfxIom_Driver.c.

◆ IfxIom_Driver_isLamRefGlitch()

IFX_EXTERN void IfxIom_Driver_isLamRefGlitch | ( | IfxIom_Driver_Lam * | driver,
 |  | boolean * | risingEdgeGlitch,
 |  | boolean * | fallingEdgeGlitch
 | ) |  |

Return the LAM reference glitch flags.

Parameters
driver | Pointer to the LAM driver object
risingEdgeGlitch | Set to TRUE by the function if rising edge glitch were detected on the reference signal
fallingEdgeGlitch | Set to TRUE by the function if falling edge glitch were detected on the reference signal
Returns
None

Definition at line 364 of file IfxIom_Driver.c.

◆ IfxIom_Driver_restoreEvents()

IFX_EXTERN void IfxIom_Driver_restoreEvents | ( | IfxIom_Driver * | driver,
 |  | uint32 | mask
 | ) |  |

Restore the IOM event mask.

Parameters
driver | Pointer to the IOM driver object
mask | Event configuration as returned by IfxIom_Driver_disableEvents()
Returns
None

Definition at line 383 of file IfxIom_Driver.c.


iLLD_TC26B: Structures

Data Structures
Structures
iLLD » IOM » IOM Driver
Collaboration diagram for Structures:

Data Structures

struct | IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration. More...
struct | IfxIom_Driver
IOM driver. More...
struct | IfxIom_Driver_LamEventConfig
IOM LAM event configuration. More...
struct | IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration. More...
struct | IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration. More...
struct | IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration. More...
struct | IfxIom_Driver_Config
IOM Driver Configuration. More...
struct | IfxIom_Driver_Lam
IOM LAM object. More...
struct | IfxIom_Driver_LamConfig
IOM LAM configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxIom_Driver_LamFilterConfig

struct IfxIom_Driver_LamFilterConfig

IOM LAM filter configuration.

Definition at line 105 of file IfxIom_Driver.h.

Data Fields
boolean | clearTimerOnGlitch | If set, the timer is cleared on glitch, else it is decremented.
float32 | fallingEdgeFilterTime | Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time.
IfxIom_LamFilterMode | mode | Filter mode.
uint32 | prescalerFactor | Prescaler factor, must be > 0, only valid for prescaler mode.
float32 | risingEdgeFilterTime | Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time.

◆ IfxIom_Driver

struct IfxIom_Driver

IOM driver.

Definition at line 120 of file IfxIom_Driver.h.

Data Fields
uint8 | accumulatedEventUsedMask | Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
uint16 | lamUsedMask | Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Ifx_IOM * | module | Pointer to IOM module SFR set.

◆ IfxIom_Driver_LamEventConfig

struct IfxIom_Driver_LamEventConfig

IOM LAM event configuration.

Definition at line 129 of file IfxIom_Driver.h.

Data Fields
IfxIom_LamEventSource | source | Event source.
IfxIom_LamEventTrigger | trigger | Event trigger.

◆ IfxIom_Driver_LamEventWindowConfig

struct IfxIom_Driver_LamEventWindowConfig

IOM LAM event window configuration.

Definition at line 137 of file IfxIom_Driver.h.

Data Fields
IfxIom_LamEventWindowClearEvent | clearEvent | Timer clear event.
IfxIom_LamEventWindowControlSource | controlSource | Timer control source.
boolean | inverted | If TRUE, the event window is inverted.
IfxIom_LamEventWindowRunControl | run | Timer run control.
float32 | threshold | Event window threshold in second. If 0, no event are generated.

◆ IfxIom_Driver_LamMonConfig

struct IfxIom_Driver_LamMonConfig

IOM LAM monitor input configuration.

Definition at line 148 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamMonConfig:
[legend]
Data Fields
IfxIom_Driver_LamFilterConfig | filter | Filter configuration.
IfxIom_MonInput | input | Monitor input.
boolean | inverted | If TRUE, the signal is inverted.

◆ IfxIom_Driver_LamRefConfig

struct IfxIom_Driver_LamRefConfig

IOM LAM reference input configuration.

Definition at line 157 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamRefConfig:
[legend]
Data Fields
IfxIom_Driver_LamFilterConfig | filter | Filter configuration.
IfxIom_RefInput | input | Reference input.
boolean | inverted | If TRUE, the signal is inverted.

◆ IfxIom_Driver_Config

struct IfxIom_Driver_Config

IOM Driver Configuration.

Definition at line 170 of file IfxIom_Driver.h.

Data Fields
Ifx_IOM * module IOM module SFRs.

◆ IfxIom_Driver_Lam

struct IfxIom_Driver_Lam

IOM LAM object.

Definition at line 177 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_Lam:
[legend]
Data Fields
sint8 | accumulatedCounterIndex | Accumulated counter used. Negative value means no counter used.
IfxIom_LamId | channel | LAM Channel.
IfxIom_Driver * | iomDriver | Main IOM Driver.
uint8 | monIndex | Monitor input index.
IfxIom_MonInputSignal | monInput | Monitor input.
uint8 | refIndex | Reference input index.
IfxIom_RefInputSignal | refInput | Reference input.
uint8 | systemEventTriggerThreshold | Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM.

◆ IfxIom_Driver_LamConfig

struct IfxIom_Driver_LamConfig

IOM LAM configuration.

Definition at line 191 of file IfxIom_Driver.h.

Collaboration diagram for IfxIom_Driver_LamConfig:
[legend]
Data Fields
IfxIom_LamId | channel | LAM channel to be used.
IfxIom_Driver_LamEventConfig | event | LAM event configuration.
IfxIom_Driver_LamEventWindowConfig | eventWindow | LAM eventWindow configuration.
IfxIom_Driver * | iomDriver | Pointer to the IOM driver.
IfxIom_Driver_LamMonConfig | mon | LAM Monitor input configuration.
IfxIom_Driver_LamRefConfig | ref | LAM reference input configuration.
uint8 | systemEventTriggerThreshold | Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM.


iLLD_TC26B: IfxIom_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxIom_cfg.h File Reference
iLLD » IOM

IOM on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXIOM_NUM_CHANNELS 16
Specifies maximum number of channels. More...

Enumerations

enum IfxIom_MonInputSignal {
IfxIom_MonInputSignal_p = 0,
IfxIom_MonInputSignal_0 = 1,
IfxIom_MonInputSignal_1 = 2,
IfxIom_MonInputSignal_2 = 3
}
IOM_FPCCTRk.ISM. More...
enum IfxIom_RefInputSignal {
IfxIom_RefInputSignal_p = 0,
IfxIom_RefInputSignal_0 = 1,
IfxIom_RefInputSignal_1 = 2,
IfxIom_RefInputSignal_2 = 3,
IfxIom_RefInputSignal_xorCombiner = 4
}
IOM_FPCCTRk.ISR. More...
enum IfxIom_MonInput {
IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0,
IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
}
LAM mon inputs. More...
enum IfxIom_RefInput {
IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
}
LAM ref inputs. More...

Detailed Description

IOM on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxIom_cfg.h.

Macro Definition Documentation

◆ IFXIOM_NUM_CHANNELS

#define IFXIOM_NUM_CHANNELS 16

Specifies maximum number of channels.

Definition at line 49 of file IfxIom_cfg.h.


iLLD_TC26B: IfxIom_Driver.h File Reference

  • Iom
  • Driver
Data Structures | Functions
IfxIom_Driver.h File Reference
iLLD » IOM

IOM DRIVER details. More...

#include "Iom/Std/IfxIom.h"
Include dependency graph for IfxIom_Driver.h:

Go to the source code of this file.

Data Structures

struct | IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration. More...
struct | IfxIom_Driver
IOM driver. More...
struct | IfxIom_Driver_LamEventConfig
IOM LAM event configuration. More...
struct | IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration. More...
struct | IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration. More...
struct | IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration. More...
struct | IfxIom_Driver_Config
IOM Driver Configuration. More...
struct | IfxIom_Driver_Lam
IOM LAM object. More...
struct | IfxIom_Driver_LamConfig
IOM LAM configuration. More...

Functions

IFX_EXTERN void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
IFX_EXTERN void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
IFX_EXTERN void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
IFX_EXTERN uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
IFX_EXTERN void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
IFX_EXTERN void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
IFX_EXTERN boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
IFX_EXTERN void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
IFX_EXTERN boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
IFX_EXTERN void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
IFX_EXTERN void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
IFX_EXTERN void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

IOM DRIVER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

The IOM driver enable easy usage of the IOM module, by abstracting the internal module structure. For it's configuration it requires the LAM channel to be used together with the reference and monitor signal. The muxes and filters are configured accordingly. The driver handles the event combiner "accumulated event timer" resources base on the single or multi-event configuration making use of the next free timer if required.

Double resource usage (LAM channel, accumulated event timers) is checked and reported at driver initialization .

The driver care for the timing and clock conversion, all timing configuration are to be given in second.

Example of use:

  • Initialization of the Iom
  • Initialization of LAM channel 0 with:
    • IOM monitor input: External pin P20.13, delay debounce filter both edge 0.5us, signal inverted,
    • IOM reference: GTM TOUT14, no filter, not inverted
    • Event window controlled by ref signal, with a free running timer and cleared on any edge of the reference signal, threshold set to 1us
    • Event source is XOR of monitor and reference signal, event is triggered on falling edge of the XOR
    • An alarm signal is generated if the monitor signal is not within the threshold, after two events.
void InitLam(IfxIom_Driver *driver, IfxIom_Driver *lam){
IfxIom_Driver_Config configDriver;
IfxIom_Driver_LamConfig configLam;
IfxIom_Driver_initConfig(&configDriver, &MODULE_IOM);
IfxIom_Driver_init(driver, &configDriver);
IfxIom_Driver_initLamConfig(&configLam, driver);
configLam.channel = IfxIom_LamId_0;
configLam.mon.input = IfxIom_MonInput_p20_13;
configLam.mon.filter.mode = IfxIom_LamFilterMode_delayDebounceBothEdge;
configLam.mon.filter.clearTimerOnGlitch = FALSE;
configLam.mon.filter.fallingEdgeFilterTime = 0.5e-6;
configLam.mon.filter.risingEdgeFilterTime = configLam.ref.filter.fallingEdgeFilterTime;
configLam.mon.inverted = TRUE;
configLam.ref.input= IfxIom_RefInput_gtmTout14;
configLam.ref.filter.mode = IfxIom_LamFilterMode_noFilter;
configLam.ref.inverted = FALSE;
configLam.eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
configLam.eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
configLam.eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
configLam.eventWindow.threshold = 1e-6;
configLam.event.source = IfxIom_LamEventSource_monXorRef;
configLam.event.trigger = IfxIom_LamEventTrigger_fallingEdge;
configLam.systemEventTriggerThreshold = 2;
IfxIom_Driver_initLam(lam, &configLam);
}

Definition in file IfxIom_Driver.h.


iLLD_TC26B: IfxIom.h File Reference

  • Iom
  • Std
Enumerations | Functions
IfxIom.h File Reference
iLLD » IOM

IOM basic functionality. More...

#include "_Impl/IfxIom_cfg.h"
#include "IfxIom_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxIom.h:

Go to the source code of this file.

Enumerations

enum IfxIom_LamEventSource {
IfxIom_LamEventSource_mon = 0,
IfxIom_LamEventSource_monXorRef = 1
}
Event source configuration IOM_LAMCFGm.MOS. More...
enum IfxIom_LamEventTrigger {
IfxIom_LamEventTrigger_none = 0,
IfxIom_LamEventTrigger_risingEdge = 1,
IfxIom_LamEventTrigger_fallingEdge = 2,
IfxIom_LamEventTrigger_anyEdge = 3
}
Event trigger configuration IOM_LAMCFGm.EDS upper two bits. More...
enum IfxIom_LamEventWindowClearEvent {
IfxIom_LamEventWindowClearEvent_none = 0,
IfxIom_LamEventWindowClearEvent_risingEdge = 1,
IfxIom_LamEventWindowClearEvent_fallingEdge = 2,
IfxIom_LamEventWindowClearEvent_anyEdge = 3
}
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits. More...
enum IfxIom_LamEventWindowControlSource {
IfxIom_LamEventWindowControlSource_ref = 0,
IfxIom_LamEventWindowControlSource_mon = 1
}
Timer control source configuration IOM_LAMCFGm.EWS. More...
enum IfxIom_LamEventWindowRunControl {
IfxIom_LamEventWindowRunControl_freeRunning = 0,
IfxIom_LamEventWindowRunControl_gated = 1
}
Timer run configuration IOM_LAMCFGm.RMS. More...
enum IfxIom_LamFilterMode {
IfxIom_LamFilterMode_delayDebounceBothEdge = 0,
IfxIom_LamFilterMode_immediateDebounceBothEdge = 1,
IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2,
IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3,
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4,
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5,
IfxIom_LamFilterMode_prescalerOnRisingEdge = 6,
IfxIom_LamFilterMode_prescalerOnFallingEdge = 7,
IfxIom_LamFilterMode_noFilter = 8
}
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter. More...
enum IfxIom_LamId {
IfxIom_LamId_0 = 0,
IfxIom_LamId_1,
IfxIom_LamId_2,
IfxIom_LamId_3,
IfxIom_LamId_4,
IfxIom_LamId_5,
IfxIom_LamId_6,
IfxIom_LamId_7,
IfxIom_LamId_8,
IfxIom_LamId_9,
IfxIom_LamId_10,
IfxIom_LamId_11,
IfxIom_LamId_12,
IfxIom_LamId_13,
IfxIom_LamId_14,
IfxIom_LamId_15
}
Specifies the Logic Module Analyser Module Number. More...
enum IfxIom_SleepMode {
IfxIom_SleepMode_enable = 0,
IfxIom_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS. More...

Functions

IFX_INLINE void | IfxIom_disableModule (Ifx_IOM *iom)
Disables the IOM module . More...
IFX_INLINE void | IfxIom_enableModule (Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control. More...
IFX_INLINE void | IfxIom_setSleepMode (Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal. More...
IFX_EXTERN float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
IFX_EXTERN void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...

Detailed Description

IOM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxIom.h.


iLLD_TC26B: MSC

Modules | Files
MSC
iLLD
Collaboration diagram for MSC:

Modules

Implementation
Standard Driver
MSC Pin Mapping
How to use the MSC Interface driver?
MSC

Files

file | IfxMsc_cfg.h
MSC on-chip implementation data.
file | IfxMsc_PinMap.c
MSC I/O map.
file | IfxMsc_PinMap.h
MSC I/O map.
file | IfxMsc_Msc.h
MSC MSC details.
file | IfxMsc.h
MSC basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » MSC
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » MSC » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_Index {
IfxMsc_Index_none = -1,
IfxMsc_Index_0 = 0,
IfxMsc_Index_1
}
List of the available MSC resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_Index

enum IfxMsc_Index

List of the available MSC resources.

Enumerator
IfxMsc_Index_none | Not Selected.
IfxMsc_Index_0 | "MSC index "+str(x)
IfxMsc_Index_1 | "MSC index "+str(x)

Definition at line 60 of file IfxMsc_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » MSC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Configure Flags
Set Command Target
Set Data
Get Data
Enable Module
Reset Module
Baud Calculator
IO Pin Configuration Functions
Module Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » MSC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_ActivePhaseSelection {
IfxMsc_ActivePhaseSelection_none = 0,
IfxMsc_ActivePhaseSelection_lowLevel = 1
}
Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL. More...
enum IfxMsc_AsynchronousBlock {
IfxMsc_AsynchronousBlock_bypassed = 0,
IfxMsc_AsynchronousBlock_noBypassed = 1
}
Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB. More...
enum IfxMsc_ChipSelectActiveState {
IfxMsc_ChipSelectActiveState_high = 0,
IfxMsc_ChipSelectActiveState_low = 1
}
Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP. More...
enum IfxMsc_ClockSelect {
IfxMsc_ClockSelect_noClock = 0,
IfxMsc_ClockSelect_fspb = 1,
IfxMsc_ClockSelect_fsri = 2,
IfxMsc_ClockSelect_feray = 4
}
Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL. More...
enum IfxMsc_CommandDataCommandRepetitionMode {
IfxMsc_CommandDataCommandRepetitionMode_disabled = 0,
IfxMsc_CommandDataCommandRepetitionMode_enabled = 1
}
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM. More...
enum IfxMsc_CommandFrameInterrupt {
IfxMsc_CommandFrameInterrupt_disabled = 0,
IfxMsc_CommandFrameInterrupt_enabled = 1
}
Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE. More...
enum IfxMsc_CommandFrameInterruptNode {
IfxMsc_CommandFrameInterruptNode_SR0 = 0,
IfxMsc_CommandFrameInterruptNode_SR1,
IfxMsc_CommandFrameInterruptNode_SR2,
IfxMsc_CommandFrameInterruptNode_SR3
}
Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP. More...
enum IfxMsc_CommandFrameLength {
IfxMsc_CommandFrameLength_0 = 0,
IfxMsc_CommandFrameLength_1 = 1,
IfxMsc_CommandFrameLength_2 = 2,
IfxMsc_CommandFrameLength_3,
IfxMsc_CommandFrameLength_4,
IfxMsc_CommandFrameLength_5,
IfxMsc_CommandFrameLength_6,
IfxMsc_CommandFrameLength_7,
IfxMsc_CommandFrameLength_8,
IfxMsc_CommandFrameLength_9,
IfxMsc_CommandFrameLength_10,
IfxMsc_CommandFrameLength_11,
IfxMsc_CommandFrameLength_12,
IfxMsc_CommandFrameLength_13,
IfxMsc_CommandFrameLength_14,
IfxMsc_CommandFrameLength_15,
IfxMsc_CommandFrameLength_16,
IfxMsc_CommandFrameLength_17 = 17,
IfxMsc_CommandFrameLength_18 = 18,
IfxMsc_CommandFrameLength_19,
IfxMsc_CommandFrameLength_20,
IfxMsc_CommandFrameLength_21,
IfxMsc_CommandFrameLength_22,
IfxMsc_CommandFrameLength_23,
IfxMsc_CommandFrameLength_24,
IfxMsc_CommandFrameLength_25,
IfxMsc_CommandFrameLength_26,
IfxMsc_CommandFrameLength_27,
IfxMsc_CommandFrameLength_28,
IfxMsc_CommandFrameLength_29,
IfxMsc_CommandFrameLength_30,
IfxMsc_CommandFrameLength_31,
IfxMsc_CommandFrameLength_32
}
Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC. More...
enum IfxMsc_ControlFrameExtensionPassivePhaseLength {
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_ControlFrameExtensionPassivePhaseLength_1,
IfxMsc_ControlFrameExtensionPassivePhaseLength_2,
IfxMsc_ControlFrameExtensionPassivePhaseLength_3,
IfxMsc_ControlFrameExtensionPassivePhaseLength_4,
IfxMsc_ControlFrameExtensionPassivePhaseLength_5,
IfxMsc_ControlFrameExtensionPassivePhaseLength_6,
IfxMsc_ControlFrameExtensionPassivePhaseLength_7,
IfxMsc_ControlFrameExtensionPassivePhaseLength_8,
IfxMsc_ControlFrameExtensionPassivePhaseLength_9,
IfxMsc_ControlFrameExtensionPassivePhaseLength_10,
IfxMsc_ControlFrameExtensionPassivePhaseLength_11,
IfxMsc_ControlFrameExtensionPassivePhaseLength_12,
IfxMsc_ControlFrameExtensionPassivePhaseLength_13,
IfxMsc_ControlFrameExtensionPassivePhaseLength_14,
IfxMsc_ControlFrameExtensionPassivePhaseLength_15,
IfxMsc_ControlFrameExtensionPassivePhaseLength_16,
IfxMsc_ControlFrameExtensionPassivePhaseLength_17,
IfxMsc_ControlFrameExtensionPassivePhaseLength_18,
IfxMsc_ControlFrameExtensionPassivePhaseLength_19,
IfxMsc_ControlFrameExtensionPassivePhaseLength_20,
IfxMsc_ControlFrameExtensionPassivePhaseLength_21,
IfxMsc_ControlFrameExtensionPassivePhaseLength_22,
IfxMsc_ControlFrameExtensionPassivePhaseLength_23,
IfxMsc_ControlFrameExtensionPassivePhaseLength_24,
IfxMsc_ControlFrameExtensionPassivePhaseLength_25,
IfxMsc_ControlFrameExtensionPassivePhaseLength_26,
IfxMsc_ControlFrameExtensionPassivePhaseLength_27,
IfxMsc_ControlFrameExtensionPassivePhaseLength_28,
IfxMsc_ControlFrameExtensionPassivePhaseLength_29,
IfxMsc_ControlFrameExtensionPassivePhaseLength_30,
IfxMsc_ControlFrameExtensionPassivePhaseLength_31,
IfxMsc_ControlFrameExtensionPassivePhaseLength_32,
IfxMsc_ControlFrameExtensionPassivePhaseLength_33,
IfxMsc_ControlFrameExtensionPassivePhaseLength_34,
IfxMsc_ControlFrameExtensionPassivePhaseLength_35,
IfxMsc_ControlFrameExtensionPassivePhaseLength_36,
IfxMsc_ControlFrameExtensionPassivePhaseLength_37,
IfxMsc_ControlFrameExtensionPassivePhaseLength_38,
IfxMsc_ControlFrameExtensionPassivePhaseLength_39,
IfxMsc_ControlFrameExtensionPassivePhaseLength_40,
IfxMsc_ControlFrameExtensionPassivePhaseLength_41,
IfxMsc_ControlFrameExtensionPassivePhaseLength_42,
IfxMsc_ControlFrameExtensionPassivePhaseLength_43,
IfxMsc_ControlFrameExtensionPassivePhaseLength_44,
IfxMsc_ControlFrameExtensionPassivePhaseLength_45,
IfxMsc_ControlFrameExtensionPassivePhaseLength_46,
IfxMsc_ControlFrameExtensionPassivePhaseLength_47,
IfxMsc_ControlFrameExtensionPassivePhaseLength_48,
IfxMsc_ControlFrameExtensionPassivePhaseLength_49,
IfxMsc_ControlFrameExtensionPassivePhaseLength_50,
IfxMsc_ControlFrameExtensionPassivePhaseLength_51,
IfxMsc_ControlFrameExtensionPassivePhaseLength_52,
IfxMsc_ControlFrameExtensionPassivePhaseLength_53,
IfxMsc_ControlFrameExtensionPassivePhaseLength_54,
IfxMsc_ControlFrameExtensionPassivePhaseLength_55,
IfxMsc_ControlFrameExtensionPassivePhaseLength_56,
IfxMsc_ControlFrameExtensionPassivePhaseLength_57,
IfxMsc_ControlFrameExtensionPassivePhaseLength_58,
IfxMsc_ControlFrameExtensionPassivePhaseLength_59,
IfxMsc_ControlFrameExtensionPassivePhaseLength_60,
IfxMsc_ControlFrameExtensionPassivePhaseLength_61,
IfxMsc_ControlFrameExtensionPassivePhaseLength_62,
IfxMsc_ControlFrameExtensionPassivePhaseLength_63,
IfxMsc_ControlFrameExtensionPassivePhaseLength_64,
IfxMsc_ControlFrameExtensionPassivePhaseLength_65,
IfxMsc_ControlFrameExtensionPassivePhaseLength_66,
IfxMsc_ControlFrameExtensionPassivePhaseLength_67,
IfxMsc_ControlFrameExtensionPassivePhaseLength_68,
IfxMsc_ControlFrameExtensionPassivePhaseLength_69,
IfxMsc_ControlFrameExtensionPassivePhaseLength_70,
IfxMsc_ControlFrameExtensionPassivePhaseLength_71,
IfxMsc_ControlFrameExtensionPassivePhaseLength_72,
IfxMsc_ControlFrameExtensionPassivePhaseLength_73,
IfxMsc_ControlFrameExtensionPassivePhaseLength_74,
IfxMsc_ControlFrameExtensionPassivePhaseLength_75,
IfxMsc_ControlFrameExtensionPassivePhaseLength_76,
IfxMsc_ControlFrameExtensionPassivePhaseLength_77,
IfxMsc_ControlFrameExtensionPassivePhaseLength_78,
IfxMsc_ControlFrameExtensionPassivePhaseLength_79,
IfxMsc_ControlFrameExtensionPassivePhaseLength_80,
IfxMsc_ControlFrameExtensionPassivePhaseLength_81,
IfxMsc_ControlFrameExtensionPassivePhaseLength_82,
IfxMsc_ControlFrameExtensionPassivePhaseLength_83,
IfxMsc_ControlFrameExtensionPassivePhaseLength_84,
IfxMsc_ControlFrameExtensionPassivePhaseLength_85,
IfxMsc_ControlFrameExtensionPassivePhaseLength_86,
IfxMsc_ControlFrameExtensionPassivePhaseLength_87,
IfxMsc_ControlFrameExtensionPassivePhaseLength_88,
IfxMsc_ControlFrameExtensionPassivePhaseLength_89,
IfxMsc_ControlFrameExtensionPassivePhaseLength_90,
IfxMsc_ControlFrameExtensionPassivePhaseLength_91,
IfxMsc_ControlFrameExtensionPassivePhaseLength_92,
IfxMsc_ControlFrameExtensionPassivePhaseLength_93,
IfxMsc_ControlFrameExtensionPassivePhaseLength_94,
IfxMsc_ControlFrameExtensionPassivePhaseLength_95,
IfxMsc_ControlFrameExtensionPassivePhaseLength_96,
IfxMsc_ControlFrameExtensionPassivePhaseLength_97,
IfxMsc_ControlFrameExtensionPassivePhaseLength_98,
IfxMsc_ControlFrameExtensionPassivePhaseLength_99,
IfxMsc_ControlFrameExtensionPassivePhaseLength_100,
IfxMsc_ControlFrameExtensionPassivePhaseLength_101,
IfxMsc_ControlFrameExtensionPassivePhaseLength_102,
IfxMsc_ControlFrameExtensionPassivePhaseLength_103,
IfxMsc_ControlFrameExtensionPassivePhaseLength_104,
IfxMsc_ControlFrameExtensionPassivePhaseLength_105,
IfxMsc_ControlFrameExtensionPassivePhaseLength_106,
IfxMsc_ControlFrameExtensionPassivePhaseLength_107,
IfxMsc_ControlFrameExtensionPassivePhaseLength_108,
IfxMsc_ControlFrameExtensionPassivePhaseLength_109,
IfxMsc_ControlFrameExtensionPassivePhaseLength_110,
IfxMsc_ControlFrameExtensionPassivePhaseLength_111,
IfxMsc_ControlFrameExtensionPassivePhaseLength_112,
IfxMsc_ControlFrameExtensionPassivePhaseLength_113,
IfxMsc_ControlFrameExtensionPassivePhaseLength_114,
IfxMsc_ControlFrameExtensionPassivePhaseLength_115,
IfxMsc_ControlFrameExtensionPassivePhaseLength_116,
IfxMsc_ControlFrameExtensionPassivePhaseLength_117,
IfxMsc_ControlFrameExtensionPassivePhaseLength_118,
IfxMsc_ControlFrameExtensionPassivePhaseLength_119,
IfxMsc_ControlFrameExtensionPassivePhaseLength_120,
IfxMsc_ControlFrameExtensionPassivePhaseLength_121,
IfxMsc_ControlFrameExtensionPassivePhaseLength_122,
IfxMsc_ControlFrameExtensionPassivePhaseLength_123,
IfxMsc_ControlFrameExtensionPassivePhaseLength_124,
IfxMsc_ControlFrameExtensionPassivePhaseLength_125,
IfxMsc_ControlFrameExtensionPassivePhaseLength_126,
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
}
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE. More...
enum IfxMsc_DataFrameExtensionPassivePhaseLength {
IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_DataFrameExtensionPassivePhaseLength_1,
IfxMsc_DataFrameExtensionPassivePhaseLength_2,
IfxMsc_DataFrameExtensionPassivePhaseLength_3
}
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE. More...
enum IfxMsc_DataFrameInterrupt {
IfxMsc_DataFrameInterrupt_disabled = 0,
IfxMsc_DataFrameInterrupt_atLastDataBit = 1,
IfxMsc_DataFrameInterrupt_atFirstDataBit = 2
}
Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE. More...
enum IfxMsc_DataFrameInterruptNode {
IfxMsc_DataFrameInterruptNode_SR0 = 0,
IfxMsc_DataFrameInterruptNode_SR1,
IfxMsc_DataFrameInterruptNode_SR2,
IfxMsc_DataFrameInterruptNode_SR3
}
Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP. More...
enum IfxMsc_DataFrameLength {
IfxMsc_DataFrameLength_0 = 0,
IfxMsc_DataFrameLength_1 = 1,
IfxMsc_DataFrameLength_2 = 2,
IfxMsc_DataFrameLength_3,
IfxMsc_DataFrameLength_4,
IfxMsc_DataFrameLength_5,
IfxMsc_DataFrameLength_6,
IfxMsc_DataFrameLength_7,
IfxMsc_DataFrameLength_8,
IfxMsc_DataFrameLength_9,
IfxMsc_DataFrameLength_10,
IfxMsc_DataFrameLength_11,
IfxMsc_DataFrameLength_12,
IfxMsc_DataFrameLength_13,
IfxMsc_DataFrameLength_14,
IfxMsc_DataFrameLength_15,
IfxMsc_DataFrameLength_16
}
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL. More...
enum IfxMsc_DataFramePassivePhaseLength {
IfxMsc_DataFramePassivePhaseLength_2 = 2,
IfxMsc_DataFramePassivePhaseLength_3,
IfxMsc_DataFramePassivePhaseLength_4,
IfxMsc_DataFramePassivePhaseLength_5,
IfxMsc_DataFramePassivePhaseLength_6,
IfxMsc_DataFramePassivePhaseLength_7,
IfxMsc_DataFramePassivePhaseLength_8,
IfxMsc_DataFramePassivePhaseLength_9,
IfxMsc_DataFramePassivePhaseLength_10,
IfxMsc_DataFramePassivePhaseLength_11,
IfxMsc_DataFramePassivePhaseLength_12,
IfxMsc_DataFramePassivePhaseLength_13,
IfxMsc_DataFramePassivePhaseLength_14,
IfxMsc_DataFramePassivePhaseLength_15,
IfxMsc_DataFramePassivePhaseLength_16,
IfxMsc_DataFramePassivePhaseLength_17,
IfxMsc_DataFramePassivePhaseLength_18,
IfxMsc_DataFramePassivePhaseLength_19,
IfxMsc_DataFramePassivePhaseLength_20,
IfxMsc_DataFramePassivePhaseLength_21,
IfxMsc_DataFramePassivePhaseLength_22,
IfxMsc_DataFramePassivePhaseLength_23,
IfxMsc_DataFramePassivePhaseLength_24,
IfxMsc_DataFramePassivePhaseLength_25,
IfxMsc_DataFramePassivePhaseLength_26,
IfxMsc_DataFramePassivePhaseLength_27,
IfxMsc_DataFramePassivePhaseLength_28,
IfxMsc_DataFramePassivePhaseLength_29,
IfxMsc_DataFramePassivePhaseLength_30,
IfxMsc_DataFramePassivePhaseLength_31,
IfxMsc_DataFramePassivePhaseLength_32
}
Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD. More...
enum IfxMsc_DividerMode {
IfxMsc_DividerMode_normal = 1,
IfxMsc_DividerMode_fractional = 2
}
Divider mode. More...
enum IfxMsc_EmergencyStop {
IfxMsc_EmergencyStop_disabled = 0,
IfxMsc_EmergencyStop_enabled = 1
}
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR. More...
enum IfxMsc_Extension {
IfxMsc_Extension_disabled = 0,
IfxMsc_Extension_enabled = 1
}
Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE. More...
enum IfxMsc_ExternalBitInjectionPosition {
IfxMsc_ExternalBitInjectionPosition_0 = 0,
IfxMsc_ExternalBitInjectionPosition_1,
IfxMsc_ExternalBitInjectionPosition_2,
IfxMsc_ExternalBitInjectionPosition_3,
IfxMsc_ExternalBitInjectionPosition_4,
IfxMsc_ExternalBitInjectionPosition_5,
IfxMsc_ExternalBitInjectionPosition_6,
IfxMsc_ExternalBitInjectionPosition_7,
IfxMsc_ExternalBitInjectionPosition_8,
IfxMsc_ExternalBitInjectionPosition_9,
IfxMsc_ExternalBitInjectionPosition_10,
IfxMsc_ExternalBitInjectionPosition_11,
IfxMsc_ExternalBitInjectionPosition_12,
IfxMsc_ExternalBitInjectionPosition_13,
IfxMsc_ExternalBitInjectionPosition_14,
IfxMsc_ExternalBitInjectionPosition_15,
IfxMsc_ExternalBitInjectionPosition_16,
IfxMsc_ExternalBitInjectionPosition_17,
IfxMsc_ExternalBitInjectionPosition_18,
IfxMsc_ExternalBitInjectionPosition_19,
IfxMsc_ExternalBitInjectionPosition_20,
IfxMsc_ExternalBitInjectionPosition_21,
IfxMsc_ExternalBitInjectionPosition_22,
IfxMsc_ExternalBitInjectionPosition_23,
IfxMsc_ExternalBitInjectionPosition_24,
IfxMsc_ExternalBitInjectionPosition_25,
IfxMsc_ExternalBitInjectionPosition_26,
IfxMsc_ExternalBitInjectionPosition_27,
IfxMsc_ExternalBitInjectionPosition_28,
IfxMsc_ExternalBitInjectionPosition_29,
IfxMsc_ExternalBitInjectionPosition_30,
IfxMsc_ExternalBitInjectionPosition_31,
IfxMsc_ExternalBitInjectionPosition_32,
IfxMsc_ExternalBitInjectionPosition_33,
IfxMsc_ExternalBitInjectionPosition_34,
IfxMsc_ExternalBitInjectionPosition_35,
IfxMsc_ExternalBitInjectionPosition_36,
IfxMsc_ExternalBitInjectionPosition_37,
IfxMsc_ExternalBitInjectionPosition_38,
IfxMsc_ExternalBitInjectionPosition_39,
IfxMsc_ExternalBitInjectionPosition_40,
IfxMsc_ExternalBitInjectionPosition_41,
IfxMsc_ExternalBitInjectionPosition_42,
IfxMsc_ExternalBitInjectionPosition_43,
IfxMsc_ExternalBitInjectionPosition_44,
IfxMsc_ExternalBitInjectionPosition_45,
IfxMsc_ExternalBitInjectionPosition_46,
IfxMsc_ExternalBitInjectionPosition_47,
IfxMsc_ExternalBitInjectionPosition_48,
IfxMsc_ExternalBitInjectionPosition_49,
IfxMsc_ExternalBitInjectionPosition_50,
IfxMsc_ExternalBitInjectionPosition_51,
IfxMsc_ExternalBitInjectionPosition_52,
IfxMsc_ExternalBitInjectionPosition_53,
IfxMsc_ExternalBitInjectionPosition_54,
IfxMsc_ExternalBitInjectionPosition_55,
IfxMsc_ExternalBitInjectionPosition_56,
IfxMsc_ExternalBitInjectionPosition_57,
IfxMsc_ExternalBitInjectionPosition_58,
IfxMsc_ExternalBitInjectionPosition_59,
IfxMsc_ExternalBitInjectionPosition_60,
IfxMsc_ExternalBitInjectionPosition_61,
IfxMsc_ExternalBitInjectionPosition_62,
IfxMsc_ExternalBitInjectionPosition_63
}
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1. More...
enum IfxMsc_ExternalSignalInjection {
IfxMsc_ExternalSignalInjection_disabled = 0,
IfxMsc_ExternalSignalInjection_enabled = 1
}
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1. More...
enum IfxMsc_FclClockControlEnabled {
IfxMsc_FclClockControlEnabled_activePhaseOnly = 0,
IfxMsc_FclClockControlEnabled_always = 1
}
Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL. More...
enum IfxMsc_FclLinePolarity {
IfxMsc_FclLinePolarity_nonInverted = 0,
IfxMsc_FclLinePolarity_inverted = 1
}
Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP. More...
enum IfxMsc_HardwareClock {
IfxMsc_HardwareClock_disabled = 0,
IfxMsc_HardwareClock_enabled = 1
}
Enable hardware clock control. More...
enum IfxMsc_InterruptServiceRequest {
IfxMsc_InterruptServiceRequest_0 = 0,
IfxMsc_InterruptServiceRequest_1,
IfxMsc_InterruptServiceRequest_2,
IfxMsc_InterruptServiceRequest_3,
IfxMsc_InterruptServiceRequest_4
}
Interrupt Service Request. More...
enum IfxMsc_ModuleSuspendRequestBit {
IfxMsc_ModuleSuspendRequestBit_noSuspend = 0,
IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1,
IfxMsc_ModuleSuspendRequestBit_softSuspend = 2
}
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS. More...
enum IfxMsc_MsbBitDataExtension {
IfxMsc_MsbBitDataExtension_notPresent = 0,
IfxMsc_MsbBitDataExtension_present = 1
}
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE. More...
enum IfxMsc_NDividerAbra {
IfxMsc_NDividerAbra_1 = 0,
IfxMsc_NDividerAbra_2,
IfxMsc_NDividerAbra_3,
IfxMsc_NDividerAbra_4,
IfxMsc_NDividerAbra_5,
IfxMsc_NDividerAbra_6,
IfxMsc_NDividerAbra_7,
IfxMsc_NDividerAbra_8
}
Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA. More...
enum IfxMsc_NDividerDownstream {
IfxMsc_NDividerDownstream_1 = 0,
IfxMsc_NDividerDownstream_2,
IfxMsc_NDividerDownstream_3,
IfxMsc_NDividerDownstream_4,
IfxMsc_NDividerDownstream_5,
IfxMsc_NDividerDownstream_6,
IfxMsc_NDividerDownstream_7,
IfxMsc_NDividerDownstream_8,
IfxMsc_NDividerDownstream_9,
IfxMsc_NDividerDownstream_10,
IfxMsc_NDividerDownstream_11,
IfxMsc_NDividerDownstream_12,
IfxMsc_NDividerDownstream_13,
IfxMsc_NDividerDownstream_14,
IfxMsc_NDividerDownstream_15,
IfxMsc_NDividerDownstream_16
}
Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD. More...
enum IfxMsc_OverflowInterrupt {
IfxMsc_OverflowInterrupt_disabled = 0,
IfxMsc_OverflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE. More...
enum IfxMsc_OverflowInterruptNode {
IfxMsc_OverflowInterruptNode_SR0 = 0,
IfxMsc_OverflowInterruptNode_SR1,
IfxMsc_OverflowInterruptNode_SR2,
IfxMsc_OverflowInterruptNode_SR3,
IfxMsc_OverflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP. More...
enum IfxMsc_Parity {
IfxMsc_Parity_even = 0,
IfxMsc_Parity_odd = 1
}
Parity Mode
Definition in Ifx_MSC.USR.B.PCT. More...
enum IfxMsc_PassiveTimeFrameCount {
IfxMsc_PassiveTimeFrameCount_0 = 0,
IfxMsc_PassiveTimeFrameCount_1 = 1,
IfxMsc_PassiveTimeFrameCount_2,
IfxMsc_PassiveTimeFrameCount_3,
IfxMsc_PassiveTimeFrameCount_4,
IfxMsc_PassiveTimeFrameCount_5,
IfxMsc_PassiveTimeFrameCount_6,
IfxMsc_PassiveTimeFrameCount_7,
IfxMsc_PassiveTimeFrameCount_8,
IfxMsc_PassiveTimeFrameCount_9,
IfxMsc_PassiveTimeFrameCount_10,
IfxMsc_PassiveTimeFrameCount_11,
IfxMsc_PassiveTimeFrameCount_12,
IfxMsc_PassiveTimeFrameCount_13,
IfxMsc_PassiveTimeFrameCount_14,
IfxMsc_PassiveTimeFrameCount_15
}
Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF. More...
enum IfxMsc_ReceiveDataInterrupt {
IfxMsc_ReceiveDataInterrupt_disabled = 0,
IfxMsc_ReceiveDataInterrupt_onDataReceive = 1,
IfxMsc_ReceiveDataInterrupt_onRdieSet = 2,
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3
}
Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE. More...
enum IfxMsc_ReceiveDataInterruptNode {
IfxMsc_ReceiveDataInterruptNode_SR0 = 0,
IfxMsc_ReceiveDataInterruptNode_SR1,
IfxMsc_ReceiveDataInterruptNode_SR2,
IfxMsc_ReceiveDataInterruptNode_SR3
}
Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP. More...
enum IfxMsc_SdiLinePolarity {
IfxMsc_SdiLinePolarity_likeSi = 0,
IfxMsc_SdiLinePolarity_invertedSi = 1
}
Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP. More...
enum IfxMsc_SerialDataInput {
IfxMsc_SerialDataInput_0 = 0,
IfxMsc_SerialDataInput_1,
IfxMsc_SerialDataInput_2,
IfxMsc_SerialDataInput_3,
IfxMsc_SerialDataInput_4,
IfxMsc_SerialDataInput_5,
IfxMsc_SerialDataInput_6,
IfxMsc_SerialDataInput_7
}
Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL. More...
enum IfxMsc_ServiceRequestDelay {
IfxMsc_ServiceRequestDelay_noDelay = 0,
IfxMsc_ServiceRequestDelay_1bit = 1
}
Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC. More...
enum IfxMsc_ShiftClockPhaseDuration {
IfxMsc_ShiftClockPhaseDuration_1 = 0,
IfxMsc_ShiftClockPhaseDuration_2,
IfxMsc_ShiftClockPhaseDuration_3,
IfxMsc_ShiftClockPhaseDuration_4,
IfxMsc_ShiftClockPhaseDuration_5,
IfxMsc_ShiftClockPhaseDuration_6,
IfxMsc_ShiftClockPhaseDuration_7,
IfxMsc_ShiftClockPhaseDuration_8,
IfxMsc_ShiftClockPhaseDuration_9,
IfxMsc_ShiftClockPhaseDuration_10,
IfxMsc_ShiftClockPhaseDuration_11,
IfxMsc_ShiftClockPhaseDuration_12,
IfxMsc_ShiftClockPhaseDuration_13,
IfxMsc_ShiftClockPhaseDuration_14,
IfxMsc_ShiftClockPhaseDuration_15,
IfxMsc_ShiftClockPhaseDuration_16
}
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH. More...
enum IfxMsc_SleepMode {
IfxMsc_SleepMode_enable = 0,
IfxMsc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS. More...
enum IfxMsc_SoLinePolarity {
IfxMsc_SoLinePolarity_nonInverted = 0,
IfxMsc_SoLinePolarity_inverted = 1
}
Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP. More...
enum IfxMsc_Source {
IfxMsc_Source_downstreamDataRegister = 0,
IfxMsc_Source_alternateInputLine = 2,
IfxMsc_Source_alternateInputLineInverted = 3
}
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH. More...
enum IfxMsc_SuspendMode {
IfxMsc_SuspendMode_none = 0,
IfxMsc_SuspendMode_hard = 1,
IfxMsc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxMsc_Target {
IfxMsc_Target_en0 = 0,
IfxMsc_Target_en1,
IfxMsc_Target_en2,
IfxMsc_Target_en3
}
Msc Targets - use as chip enable selection for ENH, ENL and ENC. More...
enum IfxMsc_TimeFrameInterrupt {
IfxMsc_TimeFrameInterrupt_disabled = 0,
IfxMsc_TimeFrameInterrupt_enabled = 1
}
Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE. More...
enum IfxMsc_TimeFrameInterruptNode {
IfxMsc_TimeFrameInterruptNode_SR0 = 0,
IfxMsc_TimeFrameInterruptNode_SR1,
IfxMsc_TimeFrameInterruptNode_SR2,
IfxMsc_TimeFrameInterruptNode_SR3
}
Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP. More...
enum IfxMsc_TransmissionMode {
IfxMsc_TransmissionMode_triggered = 0,
IfxMsc_TransmissionMode_dataRepetition = 1
}
Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM. More...
enum IfxMsc_UnderflowInterrupt {
IfxMsc_UnderflowInterrupt_disabled = 0,
IfxMsc_UnderflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE. More...
enum IfxMsc_UnderflowInterruptNode {
IfxMsc_UnderflowInterruptNode_SR0 = 0,
IfxMsc_UnderflowInterruptNode_SR1,
IfxMsc_UnderflowInterruptNode_SR2,
IfxMsc_UnderflowInterruptNode_SR3,
IfxMsc_UnderflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP. More...
enum IfxMsc_UpstreamChannelFrameType {
IfxMsc_UpstreamChannelFrameType_12bit = 0,
IfxMsc_UpstreamChannelFrameType_16bit = 1
}
Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT. More...
enum IfxMsc_UpstreamChannelReceivingRate {
IfxMsc_UpstreamChannelReceivingRate_disabled = 0,
IfxMsc_UpstreamChannelReceivingRate_4 = 1,
IfxMsc_UpstreamChannelReceivingRate_8 = 2,
IfxMsc_UpstreamChannelReceivingRate_16 = 3,
IfxMsc_UpstreamChannelReceivingRate_32 = 4,
IfxMsc_UpstreamChannelReceivingRate_64 = 5,
IfxMsc_UpstreamChannelReceivingRate_128 = 6,
IfxMsc_UpstreamChannelReceivingRate_256 = 7
}
Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR. More...
enum IfxMsc_UpstreamTimeoutInterrupt {
IfxMsc_UpstreamTimeoutInterrupt_disabled = 0,
IfxMsc_UpstreamTimeoutInterrupt_enabled = 1
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN. More...
enum IfxMsc_UpstreamTimeoutInterruptNode {
IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0,
IfxMsc_UpstreamTimeoutInterruptNode_SR1,
IfxMsc_UpstreamTimeoutInterruptNode_SR2,
IfxMsc_UpstreamTimeoutInterruptNode_SR3,
IfxMsc_UpstreamTimeoutInterruptNode_SR4
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP. More...
enum IfxMsc_UpstreamTimeoutPrescaler {
IfxMsc_UpstreamTimeoutPrescaler_1 = 0,
IfxMsc_UpstreamTimeoutPrescaler_2 = 1,
IfxMsc_UpstreamTimeoutPrescaler_4 = 2,
IfxMsc_UpstreamTimeoutPrescaler_8 = 3,
IfxMsc_UpstreamTimeoutPrescaler_16 = 4,
IfxMsc_UpstreamTimeoutPrescaler_32 = 5,
IfxMsc_UpstreamTimeoutPrescaler_64 = 6,
IfxMsc_UpstreamTimeoutPrescaler_128 = 7,
IfxMsc_UpstreamTimeoutPrescaler_256 = 8,
IfxMsc_UpstreamTimeoutPrescaler_512 = 9,
IfxMsc_UpstreamTimeoutPrescaler_1024 = 10,
IfxMsc_UpstreamTimeoutPrescaler_2048 = 11,
IfxMsc_UpstreamTimeoutPrescaler_4096 = 12,
IfxMsc_UpstreamTimeoutPrescaler_8192 = 13,
IfxMsc_UpstreamTimeoutPrescaler_16384 = 14,
IfxMsc_UpstreamTimeoutPrescaler_32768 = 15
}
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE. More...
enum IfxMsc_UpstreamTimeoutValue {
IfxMsc_UpstreamTimeoutValue_1 = 0,
IfxMsc_UpstreamTimeoutValue_2,
IfxMsc_UpstreamTimeoutValue_3,
IfxMsc_UpstreamTimeoutValue_4,
IfxMsc_UpstreamTimeoutValue_5,
IfxMsc_UpstreamTimeoutValue_6,
IfxMsc_UpstreamTimeoutValue_7,
IfxMsc_UpstreamTimeoutValue_8,
IfxMsc_UpstreamTimeoutValue_9,
IfxMsc_UpstreamTimeoutValue_10,
IfxMsc_UpstreamTimeoutValue_11,
IfxMsc_UpstreamTimeoutValue_12,
IfxMsc_UpstreamTimeoutValue_13,
IfxMsc_UpstreamTimeoutValue_14,
IfxMsc_UpstreamTimeoutValue_15,
IfxMsc_UpstreamTimeoutValue_16
}
Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_ActivePhaseSelection

enum IfxMsc_ActivePhaseSelection

Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.

Enumerator
IfxMsc_ActivePhaseSelection_none | No selection bit inserted.
IfxMsc_ActivePhaseSelection_lowLevel | Low level selection bit inserted.

Definition at line 68 of file IfxMsc.h.

◆ IfxMsc_AsynchronousBlock

enum IfxMsc_AsynchronousBlock

Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB.

Enumerator
IfxMsc_AsynchronousBlock_bypassed | Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled.
IfxMsc_AsynchronousBlock_noBypassed | Asynchronous block and the n-divider of the MSC downstream path are active.

Definition at line 77 of file IfxMsc.h.

◆ IfxMsc_ChipSelectActiveState

enum IfxMsc_ChipSelectActiveState

Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP.

Enumerator
IfxMsc_ChipSelectActiveState_high | EN[3:0] and ENL,ENH,ENC polarities are identical.
IfxMsc_ChipSelectActiveState_low | EN[3:0] and ENL,ENH,ENC polarities are inverted.

Definition at line 86 of file IfxMsc.h.

◆ IfxMsc_ClockSelect

enum IfxMsc_ClockSelect

Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL.

Enumerator
IfxMsc_ClockSelect_noClock | no clock source for the ABRA block
IfxMsc_ClockSelect_fspb | f_SPB is the clock source for the ABRA block
IfxMsc_ClockSelect_fsri | f_SRI is the clock source for the ABRA block
IfxMsc_ClockSelect_feray | f_ERAY is the clock source for the ABRA block

Definition at line 95 of file IfxMsc.h.

◆ IfxMsc_CommandDataCommandRepetitionMode

enum IfxMsc_CommandDataCommandRepetitionMode

Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM.

Enumerator
IfxMsc_CommandDataCommandRepetitionMode_disabled | Disables the automatic insertion of data.
IfxMsc_CommandDataCommandRepetitionMode_enabled | Enables the automatic insertion of data.

Definition at line 106 of file IfxMsc.h.

◆ IfxMsc_CommandFrameInterrupt

enum IfxMsc_CommandFrameInterrupt

Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE.

Enumerator
IfxMsc_CommandFrameInterrupt_disabled | Interrupt generation disabled.
IfxMsc_CommandFrameInterrupt_enabled | Interrupt generation enabled.

Definition at line 115 of file IfxMsc.h.

◆ IfxMsc_CommandFrameInterruptNode

enum IfxMsc_CommandFrameInterruptNode

Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP.

Enumerator
IfxMsc_CommandFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_CommandFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_CommandFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_CommandFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 124 of file IfxMsc.h.

◆ IfxMsc_CommandFrameLength

enum IfxMsc_CommandFrameLength

Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC.

Enumerator
IfxMsc_CommandFrameLength_0 | No bit shifted.
IfxMsc_CommandFrameLength_1 | SRL[0] Shifted.
IfxMsc_CommandFrameLength_2 | SRL[1:0] Shifted.
IfxMsc_CommandFrameLength_3 | SRL[2:0] Shifted.
IfxMsc_CommandFrameLength_4 | SRL[3:0] Shifted.
IfxMsc_CommandFrameLength_5 | SRL[4:0] Shifted.
IfxMsc_CommandFrameLength_6 | SRL[5:0] Shifted.
IfxMsc_CommandFrameLength_7 | SRL[6:0] Shifted.
IfxMsc_CommandFrameLength_8 | SRL[7:0] Shifted.
IfxMsc_CommandFrameLength_9 | SRL[8:0] Shifted.
IfxMsc_CommandFrameLength_10 | SRL[9:0] Shifted.
IfxMsc_CommandFrameLength_11 | SRL[10:0] Shifted.
IfxMsc_CommandFrameLength_12 | SRL[11:0] Shifted.
IfxMsc_CommandFrameLength_13 | SRL[12:0] Shifted.
IfxMsc_CommandFrameLength_14 | SRL[13:0] Shifted.
IfxMsc_CommandFrameLength_15 | SRL[14:0] Shifted.
IfxMsc_CommandFrameLength_16 | SRL[15:0] Shifted.
IfxMsc_CommandFrameLength_17 | SRL[15:0] and SRH[0] Shifted.
IfxMsc_CommandFrameLength_18 | SRL[15:0] and SRH[1:0] Shifted.
IfxMsc_CommandFrameLength_19 | SRL[15:0] and SRH[2:0] Shifted.
IfxMsc_CommandFrameLength_20 | SRL[15:0] and SRH[3:0] Shifted.
IfxMsc_CommandFrameLength_21 | SRL[15:0] and SRH[4:0] Shifted.
IfxMsc_CommandFrameLength_22 | SRL[15:0] and SRH[5:0] Shifted.
IfxMsc_CommandFrameLength_23 | SRL[15:0] and SRH[6:0] Shifted.
IfxMsc_CommandFrameLength_24 | SRL[15:0] and SRH[7:0] Shifted.
IfxMsc_CommandFrameLength_25 | SRL[15:0] and SRH[8:0] Shifted.
IfxMsc_CommandFrameLength_26 | SRL[15:0] and SRH[9:0] Shifted.
IfxMsc_CommandFrameLength_27 | SRL[15:0] and SRH[10:0] Shifted.
IfxMsc_CommandFrameLength_28 | SRL[15:0] and SRH[11:0] Shifted.
IfxMsc_CommandFrameLength_29 | SRL[15:0] and SRH[12:0] Shifted.
IfxMsc_CommandFrameLength_30 | SRL[15:0] and SRH[13:0] Shifted.
IfxMsc_CommandFrameLength_31 | SRL[15:0] and SRH[14:0] Shifted.
IfxMsc_CommandFrameLength_32 | SRL[15:0] and SRH[15:0] Shifted.

Definition at line 135 of file IfxMsc.h.

◆ IfxMsc_ControlFrameExtensionPassivePhaseLength

enum IfxMsc_ControlFrameExtensionPassivePhaseLength

Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE.

Enumerator
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 | Length of Command frames passive phase is 2.
IfxMsc_ControlFrameExtensionPassivePhaseLength_1 | Length of Command frames passive phase is 3.
IfxMsc_ControlFrameExtensionPassivePhaseLength_2 | Length of Command frames passive phase is 4.
IfxMsc_ControlFrameExtensionPassivePhaseLength_3 | Length of Command frames passive phase is 5.
IfxMsc_ControlFrameExtensionPassivePhaseLength_4 | Length of Command frames passive phase is 6.
IfxMsc_ControlFrameExtensionPassivePhaseLength_5 | Length of Command frames passive phase is 7.
IfxMsc_ControlFrameExtensionPassivePhaseLength_6 | Length of Command frames passive phase is 8.
IfxMsc_ControlFrameExtensionPassivePhaseLength_7 | Length of Command frames passive phase is 9.
IfxMsc_ControlFrameExtensionPassivePhaseLength_8 | Length of Command frames passive phase is 10.
IfxMsc_ControlFrameExtensionPassivePhaseLength_9 | Length of Command frames passive phase is 11.
IfxMsc_ControlFrameExtensionPassivePhaseLength_10 | Length of Command frames passive phase is 12.
IfxMsc_ControlFrameExtensionPassivePhaseLength_11 | Length of Command frames passive phase is 13.
IfxMsc_ControlFrameExtensionPassivePhaseLength_12 | Length of Command frames passive phase is 14.
IfxMsc_ControlFrameExtensionPassivePhaseLength_13 | Length of Command frames passive phase is 15.
IfxMsc_ControlFrameExtensionPassivePhaseLength_14 | Length of Command frames passive phase is 16.
IfxMsc_ControlFrameExtensionPassivePhaseLength_15 | Length of Command frames passive phase is 17.
IfxMsc_ControlFrameExtensionPassivePhaseLength_16 | Length of Command frames passive phase is 18.
IfxMsc_ControlFrameExtensionPassivePhaseLength_17 | Length of Command frames passive phase is 19.
IfxMsc_ControlFrameExtensionPassivePhaseLength_18 | Length of Command frames passive phase is 20.
IfxMsc_ControlFrameExtensionPassivePhaseLength_19 | Length of Command frames passive phase is 21.
IfxMsc_ControlFrameExtensionPassivePhaseLength_20 | Length of Command frames passive phase is 22.
IfxMsc_ControlFrameExtensionPassivePhaseLength_21 | Length of Command frames passive phase is 23.
IfxMsc_ControlFrameExtensionPassivePhaseLength_22 | Length of Command frames passive phase is 24.
IfxMsc_ControlFrameExtensionPassivePhaseLength_23 | Length of Command frames passive phase is 25.
IfxMsc_ControlFrameExtensionPassivePhaseLength_24 | Length of Command frames passive phase is 26.
IfxMsc_ControlFrameExtensionPassivePhaseLength_25 | Length of Command frames passive phase is 27.
IfxMsc_ControlFrameExtensionPassivePhaseLength_26 | Length of Command frames passive phase is 28.
IfxMsc_ControlFrameExtensionPassivePhaseLength_27 | Length of Command frames passive phase is 29.
IfxMsc_ControlFrameExtensionPassivePhaseLength_28 | Length of Command frames passive phase is 30.
IfxMsc_ControlFrameExtensionPassivePhaseLength_29 | Length of Command frames passive phase is 31.
IfxMsc_ControlFrameExtensionPassivePhaseLength_30 | Length of Command frames passive phase is 32.
IfxMsc_ControlFrameExtensionPassivePhaseLength_31 | Length of Command frames passive phase is 33.
IfxMsc_ControlFrameExtensionPassivePhaseLength_32 | Length of Command frames passive phase is 34.
IfxMsc_ControlFrameExtensionPassivePhaseLength_33 | Length of Command frames passive phase is 35.
IfxMsc_ControlFrameExtensionPassivePhaseLength_34 | Length of Command frames passive phase is 36.
IfxMsc_ControlFrameExtensionPassivePhaseLength_35 | Length of Command frames passive phase is 37.
IfxMsc_ControlFrameExtensionPassivePhaseLength_36 | Length of Command frames passive phase is 38.
IfxMsc_ControlFrameExtensionPassivePhaseLength_37 | Length of Command frames passive phase is 39.
IfxMsc_ControlFrameExtensionPassivePhaseLength_38 | Length of Command frames passive phase is 40.
IfxMsc_ControlFrameExtensionPassivePhaseLength_39 | Length of Command frames passive phase is 41.
IfxMsc_ControlFrameExtensionPassivePhaseLength_40 | Length of Command frames passive phase is 42.
IfxMsc_ControlFrameExtensionPassivePhaseLength_41 | Length of Command frames passive phase is 43.
IfxMsc_ControlFrameExtensionPassivePhaseLength_42 | Length of Command frames passive phase is 44.
IfxMsc_ControlFrameExtensionPassivePhaseLength_43 | Length of Command frames passive phase is 45.
IfxMsc_ControlFrameExtensionPassivePhaseLength_44 | Length of Command frames passive phase is 46.
IfxMsc_ControlFrameExtensionPassivePhaseLength_45 | Length of Command frames passive phase is 47.
IfxMsc_ControlFrameExtensionPassivePhaseLength_46 | Length of Command frames passive phase is 48.
IfxMsc_ControlFrameExtensionPassivePhaseLength_47 | Length of Command frames passive phase is 49.
IfxMsc_ControlFrameExtensionPassivePhaseLength_48 | Length of Command frames passive phase is 50.
IfxMsc_ControlFrameExtensionPassivePhaseLength_49 | Length of Command frames passive phase is 51.
IfxMsc_ControlFrameExtensionPassivePhaseLength_50 | Length of Command frames passive phase is 52.
IfxMsc_ControlFrameExtensionPassivePhaseLength_51 | Length of Command frames passive phase is 53.
IfxMsc_ControlFrameExtensionPassivePhaseLength_52 | Length of Command frames passive phase is 54.
IfxMsc_ControlFrameExtensionPassivePhaseLength_53 | Length of Command frames passive phase is 55.
IfxMsc_ControlFrameExtensionPassivePhaseLength_54 | Length of Command frames passive phase is 56.
IfxMsc_ControlFrameExtensionPassivePhaseLength_55 | Length of Command frames passive phase is 57.
IfxMsc_ControlFrameExtensionPassivePhaseLength_56 | Length of Command frames passive phase is 58.
IfxMsc_ControlFrameExtensionPassivePhaseLength_57 | Length of Command frames passive phase is 59.
IfxMsc_ControlFrameExtensionPassivePhaseLength_58 | Length of Command frames passive phase is 60.
IfxMsc_ControlFrameExtensionPassivePhaseLength_59 | Length of Command frames passive phase is 61.
IfxMsc_ControlFrameExtensionPassivePhaseLength_60 | Length of Command frames passive phase is 62.
IfxMsc_ControlFrameExtensionPassivePhaseLength_61 | Length of Command frames passive phase is 63.
IfxMsc_ControlFrameExtensionPassivePhaseLength_62 | Length of Command frames passive phase is 64.
IfxMsc_ControlFrameExtensionPassivePhaseLength_63 | Length of Command frames passive phase is 65.
IfxMsc_ControlFrameExtensionPassivePhaseLength_64 | Length of Command frames passive phase is 66.
IfxMsc_ControlFrameExtensionPassivePhaseLength_65 | Length of Command frames passive phase is 67.
IfxMsc_ControlFrameExtensionPassivePhaseLength_66 | Length of Command frames passive phase is 68.
IfxMsc_ControlFrameExtensionPassivePhaseLength_67 | Length of Command frames passive phase is 69.
IfxMsc_ControlFrameExtensionPassivePhaseLength_68 | Length of Command frames passive phase is 70.
IfxMsc_ControlFrameExtensionPassivePhaseLength_69 | Length of Command frames passive phase is 71.
IfxMsc_ControlFrameExtensionPassivePhaseLength_70 | Length of Command frames passive phase is 72.
IfxMsc_ControlFrameExtensionPassivePhaseLength_71 | Length of Command frames passive phase is 73.
IfxMsc_ControlFrameExtensionPassivePhaseLength_72 | Length of Command frames passive phase is 74.
IfxMsc_ControlFrameExtensionPassivePhaseLength_73 | Length of Command frames passive phase is 75.
IfxMsc_ControlFrameExtensionPassivePhaseLength_74 | Length of Command frames passive phase is 76.
IfxMsc_ControlFrameExtensionPassivePhaseLength_75 | Length of Command frames passive phase is 77.
IfxMsc_ControlFrameExtensionPassivePhaseLength_76 | Length of Command frames passive phase is 78.
IfxMsc_ControlFrameExtensionPassivePhaseLength_77 | Length of Command frames passive phase is 79.
IfxMsc_ControlFrameExtensionPassivePhaseLength_78 | Length of Command frames passive phase is 80.
IfxMsc_ControlFrameExtensionPassivePhaseLength_79 | Length of Command frames passive phase is 81.
IfxMsc_ControlFrameExtensionPassivePhaseLength_80 | Length of Command frames passive phase is 82.
IfxMsc_ControlFrameExtensionPassivePhaseLength_81 | Length of Command frames passive phase is 83.
IfxMsc_ControlFrameExtensionPassivePhaseLength_82 | Length of Command frames passive phase is 84.
IfxMsc_ControlFrameExtensionPassivePhaseLength_83 | Length of Command frames passive phase is 85.
IfxMsc_ControlFrameExtensionPassivePhaseLength_84 | Length of Command frames passive phase is 86.
IfxMsc_ControlFrameExtensionPassivePhaseLength_85 | Length of Command frames passive phase is 87.
IfxMsc_ControlFrameExtensionPassivePhaseLength_86 | Length of Command frames passive phase is 88.
IfxMsc_ControlFrameExtensionPassivePhaseLength_87 | Length of Command frames passive phase is 89.
IfxMsc_ControlFrameExtensionPassivePhaseLength_88 | Length of Command frames passive phase is 90.
IfxMsc_ControlFrameExtensionPassivePhaseLength_89 | Length of Command frames passive phase is 91.
IfxMsc_ControlFrameExtensionPassivePhaseLength_90 | Length of Command frames passive phase is 92.
IfxMsc_ControlFrameExtensionPassivePhaseLength_91 | Length of Command frames passive phase is 93.
IfxMsc_ControlFrameExtensionPassivePhaseLength_92 | Length of Command frames passive phase is 94.
IfxMsc_ControlFrameExtensionPassivePhaseLength_93 | Length of Command frames passive phase is 95.
IfxMsc_ControlFrameExtensionPassivePhaseLength_94 | Length of Command frames passive phase is 96.
IfxMsc_ControlFrameExtensionPassivePhaseLength_95 | Length of Command frames passive phase is 97.
IfxMsc_ControlFrameExtensionPassivePhaseLength_96 | Length of Command frames passive phase is 98.
IfxMsc_ControlFrameExtensionPassivePhaseLength_97 | Length of Command frames passive phase is 99.
IfxMsc_ControlFrameExtensionPassivePhaseLength_98 | Length of Command frames passive phase is 100.
IfxMsc_ControlFrameExtensionPassivePhaseLength_99 | Length of Command frames passive phase is 101.
IfxMsc_ControlFrameExtensionPassivePhaseLength_100 | Length of Command frames passive phase is 102.
IfxMsc_ControlFrameExtensionPassivePhaseLength_101 | Length of Command frames passive phase is 103.
IfxMsc_ControlFrameExtensionPassivePhaseLength_102 | Length of Command frames passive phase is 104.
IfxMsc_ControlFrameExtensionPassivePhaseLength_103 | Length of Command frames passive phase is 105.
IfxMsc_ControlFrameExtensionPassivePhaseLength_104 | Length of Command frames passive phase is 106.
IfxMsc_ControlFrameExtensionPassivePhaseLength_105 | Length of Command frames passive phase is 107.
IfxMsc_ControlFrameExtensionPassivePhaseLength_106 | Length of Command frames passive phase is 108.
IfxMsc_ControlFrameExtensionPassivePhaseLength_107 | Length of Command frames passive phase is 109.
IfxMsc_ControlFrameExtensionPassivePhaseLength_108 | Length of Command frames passive phase is 110.
IfxMsc_ControlFrameExtensionPassivePhaseLength_109 | Length of Command frames passive phase is 111.
IfxMsc_ControlFrameExtensionPassivePhaseLength_110 | Length of Command frames passive phase is 112.
IfxMsc_ControlFrameExtensionPassivePhaseLength_111 | Length of Command frames passive phase is 113.
IfxMsc_ControlFrameExtensionPassivePhaseLength_112 | Length of Command frames passive phase is 114.
IfxMsc_ControlFrameExtensionPassivePhaseLength_113 | Length of Command frames passive phase is 115.
IfxMsc_ControlFrameExtensionPassivePhaseLength_114 | Length of Command frames passive phase is 116.
IfxMsc_ControlFrameExtensionPassivePhaseLength_115 | Length of Command frames passive phase is 117.
IfxMsc_ControlFrameExtensionPassivePhaseLength_116 | Length of Command frames passive phase is 118.
IfxMsc_ControlFrameExtensionPassivePhaseLength_117 | Length of Command frames passive phase is 119.
IfxMsc_ControlFrameExtensionPassivePhaseLength_118 | Length of Command frames passive phase is 120.
IfxMsc_ControlFrameExtensionPassivePhaseLength_119 | Length of Command frames passive phase is 121.
IfxMsc_ControlFrameExtensionPassivePhaseLength_120 | Length of Command frames passive phase is 122.
IfxMsc_ControlFrameExtensionPassivePhaseLength_121 | Length of Command frames passive phase is 123.
IfxMsc_ControlFrameExtensionPassivePhaseLength_122 | Length of Command frames passive phase is 124.
IfxMsc_ControlFrameExtensionPassivePhaseLength_123 | Length of Command frames passive phase is 125.
IfxMsc_ControlFrameExtensionPassivePhaseLength_124 | Length of Command frames passive phase is 126.
IfxMsc_ControlFrameExtensionPassivePhaseLength_125 | Length of Command frames passive phase is 127.
IfxMsc_ControlFrameExtensionPassivePhaseLength_126 | Length of Command frames passive phase is 128.
IfxMsc_ControlFrameExtensionPassivePhaseLength_127 | Length of Command frames passive phase is 129.

Definition at line 175 of file IfxMsc.h.

◆ IfxMsc_DataFrameExtensionPassivePhaseLength

enum IfxMsc_DataFrameExtensionPassivePhaseLength

Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE.

Enumerator
IfxMsc_DataFrameExtensionPassivePhaseLength_0 | 0 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_1 | 1 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_2 | 2 Additional MSB bits extension of the PPD bit field
IfxMsc_DataFrameExtensionPassivePhaseLength_3 | 3 Additional MSB bits extension of the PPD bit field

Definition at line 310 of file IfxMsc.h.

◆ IfxMsc_DataFrameInterrupt

enum IfxMsc_DataFrameInterrupt

Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE.

Enumerator
IfxMsc_DataFrameInterrupt_disabled | Interrupt generation Disable.
IfxMsc_DataFrameInterrupt_atLastDataBit | An interrupt is generated when the last data bit has been shifted out.
IfxMsc_DataFrameInterrupt_atFirstDataBit | An interrupt is generated when the First data bit has been shifted out.

Definition at line 321 of file IfxMsc.h.

◆ IfxMsc_DataFrameInterruptNode

enum IfxMsc_DataFrameInterruptNode

Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP.

Enumerator
IfxMsc_DataFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_DataFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_DataFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_DataFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 331 of file IfxMsc.h.

◆ IfxMsc_DataFrameLength

enum IfxMsc_DataFrameLength

Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.

Enumerator
IfxMsc_DataFrameLength_0 | No SRx bit shifted.
IfxMsc_DataFrameLength_1 | SRx[0] Shifted.
IfxMsc_DataFrameLength_2 | SRx[1:0] Shifted.
IfxMsc_DataFrameLength_3 | SRx[2:0] Shifted.
IfxMsc_DataFrameLength_4 | SRx[3:0] Shifted.
IfxMsc_DataFrameLength_5 | SRx[4:0] Shifted.
IfxMsc_DataFrameLength_6 | SRx[5:0] Shifted.
IfxMsc_DataFrameLength_7 | SRx[6:0] Shifted.
IfxMsc_DataFrameLength_8 | SRx[7:0] Shifted.
IfxMsc_DataFrameLength_9 | SRx[8:0] Shifted.
IfxMsc_DataFrameLength_10 | SRx[9:0] Shifted.
IfxMsc_DataFrameLength_11 | SRx[10:0] Shifted.
IfxMsc_DataFrameLength_12 | SRx[11:0] Shifted.
IfxMsc_DataFrameLength_13 | SRx[12:0] Shifted.
IfxMsc_DataFrameLength_14 | SRx[13:0] Shifted.
IfxMsc_DataFrameLength_15 | SRx[14:0] Shifted.
IfxMsc_DataFrameLength_16 | SRx[15:0] Shifted.

Definition at line 342 of file IfxMsc.h.

◆ IfxMsc_DataFramePassivePhaseLength

enum IfxMsc_DataFramePassivePhaseLength

Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD.

Enumerator
IfxMsc_DataFramePassivePhaseLength_2 | Passive phase length is 2 tFCL.
IfxMsc_DataFramePassivePhaseLength_3 | Passive phase length is 3 tFCL.
IfxMsc_DataFramePassivePhaseLength_4 | Passive phase length is 4 tFCL.
IfxMsc_DataFramePassivePhaseLength_5 | Passive phase length is 5 tFCL.
IfxMsc_DataFramePassivePhaseLength_6 | Passive phase length is 6 tFCL.
IfxMsc_DataFramePassivePhaseLength_7 | Passive phase length is 7 tFCL.
IfxMsc_DataFramePassivePhaseLength_8 | Passive phase length is 8 tFCL.
IfxMsc_DataFramePassivePhaseLength_9 | Passive phase length is 9 tFCL.
IfxMsc_DataFramePassivePhaseLength_10 | Passive phase length is 10 tFCL.
IfxMsc_DataFramePassivePhaseLength_11 | Passive phase length is 11 tFCL.
IfxMsc_DataFramePassivePhaseLength_12 | Passive phase length is 12 tFCL.
IfxMsc_DataFramePassivePhaseLength_13 | Passive phase length is 13 tFCL.
IfxMsc_DataFramePassivePhaseLength_14 | Passive phase length is 14 tFCL.
IfxMsc_DataFramePassivePhaseLength_15 | Passive phase length is 15 tFCL.
IfxMsc_DataFramePassivePhaseLength_16 | Passive phase length is 16 tFCL.
IfxMsc_DataFramePassivePhaseLength_17 | Passive phase length is 17 tFCL.
IfxMsc_DataFramePassivePhaseLength_18 | Passive phase length is 18 tFCL.
IfxMsc_DataFramePassivePhaseLength_19 | Passive phase length is 19 tFCL.
IfxMsc_DataFramePassivePhaseLength_20 | Passive phase length is 20 tFCL.
IfxMsc_DataFramePassivePhaseLength_21 | Passive phase length is 21 tFCL.
IfxMsc_DataFramePassivePhaseLength_22 | Passive phase length is 22 tFCL.
IfxMsc_DataFramePassivePhaseLength_23 | Passive phase length is 23 tFCL.
IfxMsc_DataFramePassivePhaseLength_24 | Passive phase length is 24 tFCL.
IfxMsc_DataFramePassivePhaseLength_25 | Passive phase length is 25 tFCL.
IfxMsc_DataFramePassivePhaseLength_26 | Passive phase length is 26 tFCL.
IfxMsc_DataFramePassivePhaseLength_27 | Passive phase length is 27 tFCL.
IfxMsc_DataFramePassivePhaseLength_28 | Passive phase length is 28 tFCL.
IfxMsc_DataFramePassivePhaseLength_29 | Passive phase length is 29 tFCL.
IfxMsc_DataFramePassivePhaseLength_30 | Passive phase length is 30 tFCL.
IfxMsc_DataFramePassivePhaseLength_31 | Passive phase length is 31 tFCL.
IfxMsc_DataFramePassivePhaseLength_32 | Passive phase length is 32 tFCL.

Definition at line 366 of file IfxMsc.h.

◆ IfxMsc_DividerMode

enum IfxMsc_DividerMode

Divider mode.

Enumerator
IfxMsc_DividerMode_normal | divider mode is normal
IfxMsc_DividerMode_fractional | divider mode is fractional

Definition at line 403 of file IfxMsc.h.

◆ IfxMsc_EmergencyStop

enum IfxMsc_EmergencyStop

Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR.

Enumerator
IfxMsc_EmergencyStop_disabled | Emergency stop feature for SRx bit is Disabled.
IfxMsc_EmergencyStop_enabled | Emergency stop feature for SRx bit is Enabled.

Definition at line 412 of file IfxMsc.h.

◆ IfxMsc_Extension

enum IfxMsc_Extension

Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE.

Enumerator
IfxMsc_Extension_disabled | Disables the extension bit fields.
IfxMsc_Extension_enabled | Enables the extension bit fields.

Definition at line 421 of file IfxMsc.h.

◆ IfxMsc_ExternalBitInjectionPosition

enum IfxMsc_ExternalBitInjectionPosition

Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1.

Enumerator
IfxMsc_ExternalBitInjectionPosition_0 | Injected external bit is at Position 0 of the data frame.
IfxMsc_ExternalBitInjectionPosition_1 | Injected external bit is at Position 1 of the data frame.
IfxMsc_ExternalBitInjectionPosition_2 | Injected external bit is at Position 2 of the data frame.
IfxMsc_ExternalBitInjectionPosition_3 | Injected external bit is at Position 3 of the data frame.
IfxMsc_ExternalBitInjectionPosition_4 | Injected external bit is at Position 4 of the data frame.
IfxMsc_ExternalBitInjectionPosition_5 | Injected external bit is at Position 5 of the data frame.
IfxMsc_ExternalBitInjectionPosition_6 | Injected external bit is at Position 6 of the data frame.
IfxMsc_ExternalBitInjectionPosition_7 | Injected external bit is at Position 7 of the data frame.
IfxMsc_ExternalBitInjectionPosition_8 | Injected external bit is at Position 8 of the data frame.
IfxMsc_ExternalBitInjectionPosition_9 | Injected external bit is at Position 9 of the data frame.
IfxMsc_ExternalBitInjectionPosition_10 | Injected external bit is at Position 10 of the data frame.
IfxMsc_ExternalBitInjectionPosition_11 | Injected external bit is at Position 11 of the data frame.
IfxMsc_ExternalBitInjectionPosition_12 | Injected external bit is at Position 12 of the data frame.
IfxMsc_ExternalBitInjectionPosition_13 | Injected external bit is at Position 13 of the data frame.
IfxMsc_ExternalBitInjectionPosition_14 | Injected external bit is at Position 14 of the data frame.
IfxMsc_ExternalBitInjectionPosition_15 | Injected external bit is at Position 15 of the data frame.
IfxMsc_ExternalBitInjectionPosition_16 | Injected external bit is at Position 16 of the data frame.
IfxMsc_ExternalBitInjectionPosition_17 | Injected external bit is at Position 17 of the data frame.
IfxMsc_ExternalBitInjectionPosition_18 | Injected external bit is at Position 18 of the data frame.
IfxMsc_ExternalBitInjectionPosition_19 | Injected external bit is at Position 19 of the data frame.
IfxMsc_ExternalBitInjectionPosition_20 | Injected external bit is at Position 20 of the data frame.
IfxMsc_ExternalBitInjectionPosition_21 | Injected external bit is at Position 21 of the data frame.
IfxMsc_ExternalBitInjectionPosition_22 | Injected external bit is at Position 22 of the data frame.
IfxMsc_ExternalBitInjectionPosition_23 | Injected external bit is at Position 23 of the data frame.
IfxMsc_ExternalBitInjectionPosition_24 | Injected external bit is at Position 24 of the data frame.
IfxMsc_ExternalBitInjectionPosition_25 | Injected external bit is at Position 25 of the data frame.
IfxMsc_ExternalBitInjectionPosition_26 | Injected external bit is at Position 26 of the data frame.
IfxMsc_ExternalBitInjectionPosition_27 | Injected external bit is at Position 27 of the data frame.
IfxMsc_ExternalBitInjectionPosition_28 | Injected external bit is at Position 28 of the data frame.
IfxMsc_ExternalBitInjectionPosition_29 | Injected external bit is at Position 29 of the data frame.
IfxMsc_ExternalBitInjectionPosition_30 | Injected external bit is at Position 30 of the data frame.
IfxMsc_ExternalBitInjectionPosition_31 | Injected external bit is at Position 31 of the data frame.
IfxMsc_ExternalBitInjectionPosition_32 | Injected external bit is at Position 32 of the data frame.
IfxMsc_ExternalBitInjectionPosition_33 | Injected external bit is at Position 33 of the data frame.
IfxMsc_ExternalBitInjectionPosition_34 | Injected external bit is at Position 34 of the data frame.
IfxMsc_ExternalBitInjectionPosition_35 | Injected external bit is at Position 35 of the data frame.
IfxMsc_ExternalBitInjectionPosition_36 | Injected external bit is at Position 36 of the data frame.
IfxMsc_ExternalBitInjectionPosition_37 | Injected external bit is at Position 37 of the data frame.
IfxMsc_ExternalBitInjectionPosition_38 | Injected external bit is at Position 38 of the data frame.
IfxMsc_ExternalBitInjectionPosition_39 | Injected external bit is at Position 39 of the data frame.
IfxMsc_ExternalBitInjectionPosition_40 | Injected external bit is at Position 40 of the data frame.
IfxMsc_ExternalBitInjectionPosition_41 | Injected external bit is at Position 41 of the data frame.
IfxMsc_ExternalBitInjectionPosition_42 | Injected external bit is at Position 42 of the data frame.
IfxMsc_ExternalBitInjectionPosition_43 | Injected external bit is at Position 43 of the data frame.
IfxMsc_ExternalBitInjectionPosition_44 | Injected external bit is at Position 44 of the data frame.
IfxMsc_ExternalBitInjectionPosition_45 | Injected external bit is at Position 45 of the data frame.
IfxMsc_ExternalBitInjectionPosition_46 | Injected external bit is at Position 46 of the data frame.
IfxMsc_ExternalBitInjectionPosition_47 | Injected external bit is at Position 47 of the data frame.
IfxMsc_ExternalBitInjectionPosition_48 | Injected external bit is at Position 48 of the data frame.
IfxMsc_ExternalBitInjectionPosition_49 | Injected external bit is at Position 49 of the data frame.
IfxMsc_ExternalBitInjectionPosition_50 | Injected external bit is at Position 50 of the data frame.
IfxMsc_ExternalBitInjectionPosition_51 | Injected external bit is at Position 51 of the data frame.
IfxMsc_ExternalBitInjectionPosition_52 | Injected external bit is at Position 52 of the data frame.
IfxMsc_ExternalBitInjectionPosition_53 | Injected external bit is at Position 53 of the data frame.
IfxMsc_ExternalBitInjectionPosition_54 | Injected external bit is at Position 54 of the data frame.
IfxMsc_ExternalBitInjectionPosition_55 | Injected external bit is at Position 55 of the data frame.
IfxMsc_ExternalBitInjectionPosition_56 | Injected external bit is at Position 56 of the data frame.
IfxMsc_ExternalBitInjectionPosition_57 | Injected external bit is at Position 57 of the data frame.
IfxMsc_ExternalBitInjectionPosition_58 | Injected external bit is at Position 58 of the data frame.
IfxMsc_ExternalBitInjectionPosition_59 | Injected external bit is at Position 59 of the data frame.
IfxMsc_ExternalBitInjectionPosition_60 | Injected external bit is at Position 60 of the data frame.
IfxMsc_ExternalBitInjectionPosition_61 | Injected external bit is at Position 61 of the data frame.
IfxMsc_ExternalBitInjectionPosition_62 | Injected external bit is at Position 62 of the data frame.
IfxMsc_ExternalBitInjectionPosition_63 | Injected external bit is at Position 63 of the data frame.

Definition at line 430 of file IfxMsc.h.

◆ IfxMsc_ExternalSignalInjection

enum IfxMsc_ExternalSignalInjection

Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1.

Enumerator
IfxMsc_ExternalSignalInjection_disabled | Disables the external signal injection in a data frame.
IfxMsc_ExternalSignalInjection_enabled | Enables the external signal injection in a data frame.

Definition at line 501 of file IfxMsc.h.

◆ IfxMsc_FclClockControlEnabled

enum IfxMsc_FclClockControlEnabled

Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL.

Enumerator
IfxMsc_FclClockControlEnabled_activePhaseOnly | FCL is active during active phases of data or command frames.
IfxMsc_FclClockControlEnabled_always | FCL is always active.

Definition at line 510 of file IfxMsc.h.

◆ IfxMsc_FclLinePolarity

enum IfxMsc_FclLinePolarity

Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP.

Enumerator
IfxMsc_FclLinePolarity_nonInverted | FCLP and FCL signal polarity is identical.
IfxMsc_FclLinePolarity_inverted | FCLP signal has inverted FCL signal polarity.

Definition at line 519 of file IfxMsc.h.

◆ IfxMsc_HardwareClock

enum IfxMsc_HardwareClock

Enable hardware clock control.

Enumerator
IfxMsc_HardwareClock_disabled | Hardware clock disable.
IfxMsc_HardwareClock_enabled | Hardware clock enable.

Definition at line 527 of file IfxMsc.h.

◆ IfxMsc_InterruptServiceRequest

enum IfxMsc_InterruptServiceRequest

Interrupt Service Request.

Enumerator
IfxMsc_InterruptServiceRequest_0 | Interrupt Service Request number0.
IfxMsc_InterruptServiceRequest_1 | Interrupt Service Request number1.
IfxMsc_InterruptServiceRequest_2 | Interrupt Service Request number2.
IfxMsc_InterruptServiceRequest_3 | Interrupt Service Request number3.
IfxMsc_InterruptServiceRequest_4 | Interrupt Service Request number4.

Definition at line 535 of file IfxMsc.h.

◆ IfxMsc_ModuleSuspendRequestBit

enum IfxMsc_ModuleSuspendRequestBit

OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS.

Enumerator
IfxMsc_ModuleSuspendRequestBit_noSuspend | OCDS is not suspended.
IfxMsc_ModuleSuspendRequestBit_hardSuspend | OCDS is Hard suspended. Clock is switched off immediately.
IfxMsc_ModuleSuspendRequestBit_softSuspend | OCDS is Soft suspended.

Definition at line 547 of file IfxMsc.h.

◆ IfxMsc_MsbBitDataExtension

enum IfxMsc_MsbBitDataExtension

Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE.

Enumerator
IfxMsc_MsbBitDataExtension_notPresent | Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
IfxMsc_MsbBitDataExtension_present | Additional MSB bit is present in the extension of the NDBL/NDBH bit field.

Definition at line 557 of file IfxMsc.h.

◆ IfxMsc_NDividerAbra

enum IfxMsc_NDividerAbra

Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA.

Enumerator
IfxMsc_NDividerAbra_1 | Division ratio is 1.
IfxMsc_NDividerAbra_2 | Division ratio is 2.
IfxMsc_NDividerAbra_3 | Division ratio is 3.
IfxMsc_NDividerAbra_4 | Division ratio is 4.
IfxMsc_NDividerAbra_5 | Division ratio is 5.
IfxMsc_NDividerAbra_6 | Division ratio is 6.
IfxMsc_NDividerAbra_7 | Division ratio is 7.
IfxMsc_NDividerAbra_8 | Division ratio is 8.

Definition at line 566 of file IfxMsc.h.

◆ IfxMsc_NDividerDownstream

enum IfxMsc_NDividerDownstream

Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD.

Enumerator
IfxMsc_NDividerDownstream_1 | division ratio is 1
IfxMsc_NDividerDownstream_2 | division ratio is 2
IfxMsc_NDividerDownstream_3 | division ratio is 3
IfxMsc_NDividerDownstream_4 | division ratio is 4
IfxMsc_NDividerDownstream_5 | division ratio is 5
IfxMsc_NDividerDownstream_6 | division ratio is 6
IfxMsc_NDividerDownstream_7 | division ratio is 7
IfxMsc_NDividerDownstream_8 | division ratio is 8
IfxMsc_NDividerDownstream_9 | division ratio is 9
IfxMsc_NDividerDownstream_10 | division ratio is 10
IfxMsc_NDividerDownstream_11 | division ratio is 11
IfxMsc_NDividerDownstream_12 | division ratio is 12
IfxMsc_NDividerDownstream_13 | division ratio is 13
IfxMsc_NDividerDownstream_14 | division ratio is 14
IfxMsc_NDividerDownstream_15 | division ratio is 15
IfxMsc_NDividerDownstream_16 | division ratio is 16

Definition at line 581 of file IfxMsc.h.

◆ IfxMsc_OverflowInterrupt

enum IfxMsc_OverflowInterrupt

Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE.

Enumerator
IfxMsc_OverflowInterrupt_disabled | Disables the path of the overflow interrupt towards the interrupt node.
IfxMsc_OverflowInterrupt_enabled | Enables the path of the overflow interrupt towards the interrupt node.

Definition at line 604 of file IfxMsc.h.

◆ IfxMsc_OverflowInterruptNode

enum IfxMsc_OverflowInterruptNode

Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP.

Enumerator
IfxMsc_OverflowInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_OverflowInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_OverflowInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_OverflowInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_OverflowInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 613 of file IfxMsc.h.

◆ IfxMsc_Parity

enum IfxMsc_Parity

Parity Mode
Definition in Ifx_MSC.USR.B.PCT.

Enumerator
IfxMsc_Parity_even | Even Parity.
IfxMsc_Parity_odd | Odd Parity.

Definition at line 625 of file IfxMsc.h.

◆ IfxMsc_PassiveTimeFrameCount

enum IfxMsc_PassiveTimeFrameCount

Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF.

Enumerator
IfxMsc_PassiveTimeFrameCount_0 | No Passive time frames inserted.
IfxMsc_PassiveTimeFrameCount_1 | 1 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_2 | 2 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_3 | 3 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_4 | 4 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_5 | 5 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_6 | 6 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_7 | 7 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_8 | 8 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_9 | 9 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_10 | 10 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_11 | 11 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_12 | 12 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_13 | 13 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_14 | 14 Passive time frames inserted
IfxMsc_PassiveTimeFrameCount_15 | 15 Passive time frames inserted

Definition at line 634 of file IfxMsc.h.

◆ IfxMsc_ReceiveDataInterrupt

enum IfxMsc_ReceiveDataInterrupt

Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE.

Enumerator
IfxMsc_ReceiveDataInterrupt_disabled | Interrupt generation disabled.
IfxMsc_ReceiveDataInterrupt_onDataReceive | An interrupt is generated when data is received and written into the upstream data registers.
IfxMsc_ReceiveDataInterrupt_onRdieSet | An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H.
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 | An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H.

Definition at line 657 of file IfxMsc.h.

◆ IfxMsc_ReceiveDataInterruptNode

enum IfxMsc_ReceiveDataInterruptNode

Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP.

Enumerator
IfxMsc_ReceiveDataInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_ReceiveDataInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_ReceiveDataInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_ReceiveDataInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 668 of file IfxMsc.h.

◆ IfxMsc_SdiLinePolarity

enum IfxMsc_SdiLinePolarity

Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP.

Enumerator
IfxMsc_SdiLinePolarity_likeSi | SDI and SI signal polarities are identical.
IfxMsc_SdiLinePolarity_invertedSi | SDI and SI signal polarities are inverted.

Definition at line 679 of file IfxMsc.h.

◆ IfxMsc_SerialDataInput

enum IfxMsc_SerialDataInput

Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL.

Enumerator
IfxMsc_SerialDataInput_0 | SDI0 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_1 | SDI1 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_2 | SDI2 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_3 | SDI3 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_4 | SDI4 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_5 | SDI5 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_6 | SDI6 is selected for the SDI of the upstream channel.
IfxMsc_SerialDataInput_7 | SDI7 is selected for the SDI of the upstream channel.

Definition at line 688 of file IfxMsc.h.

◆ IfxMsc_ServiceRequestDelay

enum IfxMsc_ServiceRequestDelay

Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC.

Enumerator
IfxMsc_ServiceRequestDelay_noDelay | No Delay.
IfxMsc_ServiceRequestDelay_1bit | Delay of 1 bit time.

Definition at line 703 of file IfxMsc.h.

◆ IfxMsc_ShiftClockPhaseDuration

enum IfxMsc_ShiftClockPhaseDuration

Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH.

Enumerator
IfxMsc_ShiftClockPhaseDuration_1 | Duration in periods of f_A is 1.
IfxMsc_ShiftClockPhaseDuration_2 | Duration in periods of f_A is 2.
IfxMsc_ShiftClockPhaseDuration_3 | Duration in periods of f_A is 3.
IfxMsc_ShiftClockPhaseDuration_4 | Duration in periods of f_A is 4.
IfxMsc_ShiftClockPhaseDuration_5 | Duration in periods of f_A is 5.
IfxMsc_ShiftClockPhaseDuration_6 | Duration in periods of f_A is 6.
IfxMsc_ShiftClockPhaseDuration_7 | Duration in periods of f_A is 7.
IfxMsc_ShiftClockPhaseDuration_8 | Duration in periods of f_A is 8.
IfxMsc_ShiftClockPhaseDuration_9 | Duration in periods of f_A is 9.
IfxMsc_ShiftClockPhaseDuration_10 | Duration in periods of f_A is 10.
IfxMsc_ShiftClockPhaseDuration_11 | Duration in periods of f_A is 11.
IfxMsc_ShiftClockPhaseDuration_12 | Duration in periods of f_A is 12.
IfxMsc_ShiftClockPhaseDuration_13 | Duration in periods of f_A is 13.
IfxMsc_ShiftClockPhaseDuration_14 | Duration in periods of f_A is 14.
IfxMsc_ShiftClockPhaseDuration_15 | Duration in periods of f_A is 15.
IfxMsc_ShiftClockPhaseDuration_16 | Duration in periods of f_A is 16.

Definition at line 712 of file IfxMsc.h.

◆ IfxMsc_SleepMode

enum IfxMsc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS.

Enumerator
IfxMsc_SleepMode_enable | enables sleep mode
IfxMsc_SleepMode_disable | disables sleep mode

Definition at line 735 of file IfxMsc.h.

◆ IfxMsc_SoLinePolarity

enum IfxMsc_SoLinePolarity

Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP.

Enumerator
IfxMsc_SoLinePolarity_nonInverted | SOP and SO polarity is identical.
IfxMsc_SoLinePolarity_inverted | SOP and SO polarity is inverted.

Definition at line 744 of file IfxMsc.h.

◆ IfxMsc_Source

enum IfxMsc_Source

Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH.

Enumerator
IfxMsc_Source_downstreamDataRegister | SRx[16] is taken from data Register DD.DDL[xx].
IfxMsc_Source_alternateInputLine | SRx[16] is taken from ALTINL input line.
IfxMsc_Source_alternateInputLineInverted | SRx[16] is taken from ALTINL input line in inverted state.

Definition at line 753 of file IfxMsc.h.

◆ IfxMsc_SuspendMode

enum IfxMsc_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxMsc_SuspendMode_none | No suspend.
IfxMsc_SuspendMode_hard | Hard Suspend.
IfxMsc_SuspendMode_soft | Soft Suspend.

Definition at line 762 of file IfxMsc.h.

◆ IfxMsc_Target

enum IfxMsc_Target

Msc Targets - use as chip enable selection for ENH, ENL and ENC.

Enumerator
IfxMsc_Target_en0 | Target EN0.
IfxMsc_Target_en1 | Target EN1.
IfxMsc_Target_en2 | Target EN2.
IfxMsc_Target_en3 | Target EN3.

Definition at line 771 of file IfxMsc.h.

◆ IfxMsc_TimeFrameInterrupt

enum IfxMsc_TimeFrameInterrupt

Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE.

Enumerator
IfxMsc_TimeFrameInterrupt_disabled | Interrupt generation disabled.
IfxMsc_TimeFrameInterrupt_enabled | Interrupt generation enabled.

Definition at line 782 of file IfxMsc.h.

◆ IfxMsc_TimeFrameInterruptNode

enum IfxMsc_TimeFrameInterruptNode

Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP.

Enumerator
IfxMsc_TimeFrameInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_TimeFrameInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_TimeFrameInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_TimeFrameInterruptNode_SR3 | Service request output SR3 selected.

Definition at line 791 of file IfxMsc.h.

◆ IfxMsc_TransmissionMode

enum IfxMsc_TransmissionMode

Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM.

Enumerator
IfxMsc_TransmissionMode_triggered | Triggered Mode.
IfxMsc_TransmissionMode_dataRepetition | Data Repetition Mode.

Definition at line 802 of file IfxMsc.h.

◆ IfxMsc_UnderflowInterrupt

enum IfxMsc_UnderflowInterrupt

Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE.

Enumerator
IfxMsc_UnderflowInterrupt_disabled | Disables the path of the Underflow interrupt towards the interrupt node.
IfxMsc_UnderflowInterrupt_enabled | Enables the path of the Underflow interrupt towards the interrupt node.

Definition at line 811 of file IfxMsc.h.

◆ IfxMsc_UnderflowInterruptNode

enum IfxMsc_UnderflowInterruptNode

Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP.

Enumerator
IfxMsc_UnderflowInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_UnderflowInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_UnderflowInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_UnderflowInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_UnderflowInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 820 of file IfxMsc.h.

◆ IfxMsc_UpstreamChannelFrameType

enum IfxMsc_UpstreamChannelFrameType

Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT.

Enumerator
IfxMsc_UpstreamChannelFrameType_12bit | 12-bit Upstream frame selected
IfxMsc_UpstreamChannelFrameType_16bit | 16-bit Upstream frame selected

Definition at line 832 of file IfxMsc.h.

◆ IfxMsc_UpstreamChannelReceivingRate

enum IfxMsc_UpstreamChannelReceivingRate

Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR.

Enumerator
IfxMsc_UpstreamChannelReceivingRate_disabled | Disabled.
IfxMsc_UpstreamChannelReceivingRate_4 | Baud rate = f_MSC / 4.
IfxMsc_UpstreamChannelReceivingRate_8 | Baud rate = f_MSC / 8.
IfxMsc_UpstreamChannelReceivingRate_16 | Baud rate = f_MSC / 16.
IfxMsc_UpstreamChannelReceivingRate_32 | Baud rate = f_MSC / 32.
IfxMsc_UpstreamChannelReceivingRate_64 | Baud rate = f_MSC / 64.
IfxMsc_UpstreamChannelReceivingRate_128 | Baud rate = f_MSC / 128.
IfxMsc_UpstreamChannelReceivingRate_256 | Baud rate = f_MSC / 256.

Definition at line 841 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutInterrupt

enum IfxMsc_UpstreamTimeoutInterrupt

Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN.

Enumerator
IfxMsc_UpstreamTimeoutInterrupt_disabled | Upstream Timeout Interrupt Disabled.
IfxMsc_UpstreamTimeoutInterrupt_enabled | Upstream Timeout Interrupt Enabled.

Definition at line 856 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutInterruptNode

enum IfxMsc_UpstreamTimeoutInterruptNode

Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP.

Enumerator
IfxMsc_UpstreamTimeoutInterruptNode_SR0 | Service request output SR0 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR1 | Service request output SR1 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR2 | Service request output SR2 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR3 | Service request output SR3 selected.
IfxMsc_UpstreamTimeoutInterruptNode_SR4 | Service request output SR4 selected.

Definition at line 865 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutPrescaler

enum IfxMsc_UpstreamTimeoutPrescaler

Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE.

Enumerator
IfxMsc_UpstreamTimeoutPrescaler_1 | Prescale value 1 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_2 | Prescale value 2 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_4 | Prescale value 4 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_8 | Prescale value 8 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_16 | Prescale value 16 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_32 | Prescale value 32 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_64 | Prescale value 64 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_128 | Prescale value 128 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_256 | Prescale value 256 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_512 | Prescale value 512 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_1024 | Prescale value 1024 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_2048 | Prescale value 2048 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_4096 | Prescale value 4096 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_8192 | Prescale value 8192 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_16384 | Prescale value 16384 for the upstream time-out limit.
IfxMsc_UpstreamTimeoutPrescaler_32768 | Prescale value 32768 for the upstream time-out limit.

Definition at line 877 of file IfxMsc.h.

◆ IfxMsc_UpstreamTimeoutValue

enum IfxMsc_UpstreamTimeoutValue

Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL.

Enumerator
IfxMsc_UpstreamTimeoutValue_1 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_2 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_3 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_4 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_5 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_6 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_7 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_8 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_9 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_10 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_11 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_12 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_13 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_14 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_15 | Upstream timeout value for the N-Divider.
IfxMsc_UpstreamTimeoutValue_16 | Upstream timeout value for the N-Divider.

Definition at line 900 of file IfxMsc.h.


iLLD_TC26B: Configure Flags

Functions
Configure Flags
iLLD » MSC » Standard Driver
Collaboration diagram for Configure Flags:

Functions

IFX_INLINE void | IfxMsc_clearAbraOverflowFlag (Ifx_MSC *msc)
Clear ABRA overflow flag. More...
IFX_INLINE void | IfxMsc_clearAbraUnderflowFlag (Ifx_MSC *msc)
Clear ABRA underflow flag. More...
IFX_INLINE void | IfxMsc_clearUpstreamTimeout (Ifx_MSC *msc)
Clear Upstream timeout. More...
IFX_INLINE void | IfxMsc_clearUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag. More...
IFX_INLINE boolean | IfxMsc_getUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag. More...

Detailed Description

Function Documentation

◆ IfxMsc_clearAbraOverflowFlag()

IFX_INLINE void IfxMsc_clearAbraOverflowFlag ( Ifx_MSC * msc )

Clear ABRA overflow flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1401 of file IfxMsc.h.

◆ IfxMsc_clearAbraUnderflowFlag()

IFX_INLINE void IfxMsc_clearAbraUnderflowFlag ( Ifx_MSC * msc )

Clear ABRA underflow flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1408 of file IfxMsc.h.

◆ IfxMsc_clearUpstreamTimeout()

IFX_INLINE void IfxMsc_clearUpstreamTimeout ( Ifx_MSC * msc )

Clear Upstream timeout.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1421 of file IfxMsc.h.

◆ IfxMsc_clearUpstreamValidFlag()

IFX_INLINE void IfxMsc_clearUpstreamValidFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Clear the valid flag.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | data register ID
Returns
None

Definition at line 1428 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().

◆ IfxMsc_getUpstreamValidFlag()

IFX_INLINE boolean IfxMsc_getUpstreamValidFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Get the status of the valid flag.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | data register ID
Returns
Status TRUE or FALSE

Definition at line 1543 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().


iLLD_TC26B: Set Command Target

Functions
Set Command Target
iLLD » MSC » Standard Driver
Collaboration diagram for Set Command Target:

Functions

IFX_INLINE void IfxMsc_setCommandTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_setCommandTarget()

IFX_INLINE void IfxMsc_setCommandTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for command phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1642 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setCommandTarget().


iLLD_TC26B: Set Data

Functions
Set Data
iLLD » MSC » Standard Driver
Collaboration diagram for Set Data:

Functions

IFX_INLINE void | IfxMsc_setDataHighTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase. More...
IFX_INLINE void | IfxMsc_setDataLowTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_setDataHighTarget()

IFX_INLINE void IfxMsc_setDataHighTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for data high phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1649 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setDataTarget().

◆ IfxMsc_setDataLowTarget()

IFX_INLINE void IfxMsc_setDataLowTarget | ( | Ifx_MSC * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

Select the target for data low phase.

Parameters
msc | pointer to the base of MSC registers
enX | Target to be selected
Returns
None

Definition at line 1656 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule(), and IfxMsc_Msc_setDataTarget().


iLLD_TC26B: Get Data

Functions
Get Data
iLLD » MSC » Standard Driver
Collaboration diagram for Get Data:

Functions

IFX_INLINE uint16 | IfxMsc_getData (Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataHighTarget (Ifx_MSC *msc)
Get the selected target during high phase. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataLowTarget (Ifx_MSC *msc)
Get the selected target during low phase. More...

Detailed Description

Function Documentation

◆ IfxMsc_getData()

IFX_INLINE uint16 IfxMsc_getData | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Get the upstream data from upstream data register.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | Upstream data register ID
Returns
Recevived data

Definition at line 1458 of file IfxMsc.h.

Referenced by IfxMsc_Msc_receiveData().

◆ IfxMsc_getDataHighTarget()

IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget ( Ifx_MSC * msc )

Get the selected target during high phase.

Parameters
msc pointer to the base of MSC registers
Returns
Selected target

Definition at line 1468 of file IfxMsc.h.

Referenced by IfxMsc_Msc_getTarget().

◆ IfxMsc_getDataLowTarget()

IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget ( Ifx_MSC * msc )

Get the selected target during low phase.

Parameters
msc pointer to the base of MSC registers
Returns
Selected target

Definition at line 1475 of file IfxMsc.h.

Referenced by IfxMsc_Msc_getTarget().


iLLD_TC26B: Enable Module

Functions
Enable Module
iLLD » MSC » Standard Driver
Collaboration diagram for Enable Module:

Functions

IFX_EXTERN void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
IFX_EXTERN void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...

Detailed Description

Function Documentation

◆ IfxMsc_disableModule()

IFX_EXTERN void IfxMsc_disableModule ( Ifx_MSC * msc )

Disable MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 57 of file IfxMsc.c.

◆ IfxMsc_enableModule()

IFX_EXTERN void IfxMsc_enableModule ( Ifx_MSC * msc )

Enable MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 108 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC26B: Reset Module

Functions
Reset Module
iLLD » MSC » Standard Driver
Collaboration diagram for Reset Module:

Functions

IFX_EXTERN void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
IFX_EXTERN void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...

Detailed Description

Function Documentation

◆ IfxMsc_clearReset()

IFX_EXTERN void IfxMsc_clearReset ( Ifx_MSC * msc )

Clear reset bit of MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 42 of file IfxMsc.c.

◆ IfxMsc_resetModule()

IFX_EXTERN void IfxMsc_resetModule ( Ifx_MSC * msc )

Reset MSC kernel.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 168 of file IfxMsc.c.

Referenced by IfxMsc_Msc_deInitModule().


iLLD_TC26B: Baud Calculator

Functions
Baud Calculator
iLLD » MSC » Standard Driver
Collaboration diagram for Baud Calculator:

Functions

IFX_EXTERN uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
IFX_EXTERN uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
IFX_EXTERN uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...

Detailed Description

Function Documentation

◆ IfxMsc_downstreamAbraBaudCalculator()

IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator ( uint32 baud )

Get the NDD value for the supplied baud rate when when ABRA block is enabled.

Parameters
baud Required baud rate
Returns
NDD value

Definition at line 67 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initializeAbra().

◆ IfxMsc_upstreamFractionalBaudCalculator()

IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step value

Definition at line 189 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_upstreamNormalBaudCalculator()

IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step value

Definition at line 212 of file IfxMsc.c.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » MSC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxMsc_initEnPin (const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output. More...
IFX_INLINE void | IfxMsc_initFclnPin (const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output. More...
IFX_INLINE void | IfxMsc_initFclpPin (const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output. More...
IFX_INLINE void | IfxMsc_initInjPin (const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input. More...
IFX_INLINE void | IfxMsc_initSdiPin (const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input. More...
IFX_INLINE void | IfxMsc_initSonPin (const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output. More...
IFX_INLINE void | IfxMsc_initSopPin (const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output. More...

Detailed Description

Function Documentation

◆ IfxMsc_initEnPin()

IFX_INLINE void IfxMsc_initEnPin | ( | const IfxMsc_En_Out * | en,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a EN output.

Parameters
en | the EN Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1553 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initFclnPin()

IFX_INLINE void IfxMsc_initFclnPin | ( | const IfxMsc_Fcln_Out * | fcln,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a FCLN output.

Parameters
fcln | the FCLN Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1563 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initFclpPin()

IFX_INLINE void IfxMsc_initFclpPin | ( | const IfxMsc_Fclp_Out * | fclp,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a FCLP output.

Parameters
fclp | the FCLP Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1573 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initInjPin()

IFX_INLINE void IfxMsc_initInjPin | ( | const IfxMsc_Inj_In * | inj,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a INJ input.

Parameters
inj | the INJ Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1583 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSdiPin()

IFX_INLINE void IfxMsc_initSdiPin | ( | const IfxMsc_Sdi_In * | sdi,
 |  | IfxPort_InputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SDI input.

Parameters
sdi | the SDI Pin which should be configured
pinMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1593 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSonPin()

IFX_INLINE void IfxMsc_initSonPin | ( | const IfxMsc_Son_Out * | son,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SON output.

Parameters
son | the SON Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1604 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_initSopPin()

IFX_INLINE void IfxMsc_initSopPin | ( | const IfxMsc_Sop_Out * | sop,
 |  | IfxPort_OutputMode | pinMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SOP output.

Parameters
sop | the SOP Pin which should be configured
pinMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1614 of file IfxMsc.h.

Referenced by IfxMsc_Msc_initModule().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » MSC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
IFX_EXTERN IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...

Detailed Description

Function Documentation

◆ IfxMsc_getAddress()

IFX_EXTERN Ifx_MSC* IfxMsc_getAddress ( IfxMsc_Index msc )
Parameters
msc Resource index of the MSC
Returns
MSC module register address

Definition at line 121 of file IfxMsc.c.

◆ IfxMsc_getIndex()

IFX_EXTERN IfxMsc_Index IfxMsc_getIndex ( Ifx_MSC * msc )

API to get the resource index of the MSC specified.

Parameters
msc Pointer to the MSC HW module (register memory map)
Returns
Resource index of the ERAY

Definition at line 148 of file IfxMsc.c.

Referenced by IfxMsc_getSrcPointer().


iLLD_TC26B: MSC Pin Mapping

Data Structures | Macros | Variables
MSC Pin Mapping
iLLD » MSC
Collaboration diagram for MSC Pin Mapping:

Data Structures

struct | IfxMsc_Inj_In
INJ pin mapping structure. More...
struct | IfxMsc_Sdi_In
SDI pin mapping structure. More...
struct | IfxMsc_En_Out
EN pin mapping structure. More...
struct | IfxMsc_Fclp_Out
FCLP pin mapping structure. More...
struct | IfxMsc_Fcln_Out
FCLN pin mapping structure. More...
struct | IfxMsc_Sop_Out
SOP pin mapping structure. More...
struct | IfxMsc_Son_Out
SON pin mapping structure. More...

Macros

#define | IFXMSC_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXMSC_PINMAP_NUM_TARGETS 4
#define | IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
#define | IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2
#define | IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
#define | IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
#define | IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
MSC1_EN0: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
MSC1_EN0: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
MSC1_EN1: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT
MSC1_END2: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT
MSC1_END2: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT
MSC1_END3: MSC1 output. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
MSC0_FCLND: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
MSC0_FCLN: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
MSC1_FCLND: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
MSC1_FCLN: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
MSC0_FCLP: MSC0 output. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
MSC0_FCLP: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
MSC0_FCLP: MSC0 output. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
MSC1_FCLP: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
MSC0_INJ0: MSC0 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
MSC0_INJ1: MSC0 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
MSC1_INJ0: MSC1 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
MSC1_INJ1: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
MSC0_SDI0: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
MSC0_SDI1: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
MSC0_SDI2: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
MSC0_SDI3: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
MSC1_SDI0: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
MSC1_SDI1: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
MSC1_SDI2: MSC1 input. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
MSC0_SOND: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
MSC0_SON: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
MSC1_SOND: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
MSC1_SON: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
MSC0_SOP: MSC0 output. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
MSC0_SOP: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
MSC1_SOP: MSC1 output (LVDS) More...
IFX_EXTERN const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table. More...
IFX_EXTERN const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table. More...
IFX_EXTERN const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table. More...
IFX_EXTERN const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table. More...
IFX_EXTERN const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table. More...
IFX_EXTERN const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table. More...
IFX_EXTERN const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxMsc_Inj_In

struct IfxMsc_Inj_In

INJ pin mapping structure.

Definition at line 39 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Inj_In:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxMsc_Sdi_In

struct IfxMsc_Sdi_In

SDI pin mapping structure.

Definition at line 47 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Sdi_In:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxMsc_En_Out

struct IfxMsc_En_Out

EN pin mapping structure.

Definition at line 55 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_En_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
uint8 | target | Target ID.

◆ IfxMsc_Fclp_Out

struct IfxMsc_Fclp_Out

FCLP pin mapping structure.

Definition at line 64 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Fclp_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Fcln_Out

struct IfxMsc_Fcln_Out

FCLN pin mapping structure.

Definition at line 72 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Fcln_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Sop_Out

struct IfxMsc_Sop_Out

SOP pin mapping structure.

Definition at line 80 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Sop_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxMsc_Son_Out

struct IfxMsc_Son_Out

SON pin mapping structure.

Definition at line 88 of file IfxMsc_PinMap.h.

Collaboration diagram for IfxMsc_Son_Out:
[legend]
Data Fields
Ifx_MSC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXMSC_PINMAP_EN_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6

Definition at line 153 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2

Definition at line 154 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3

Definition at line 155 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_INJ_IN_NUM_ITEMS

#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2

Definition at line 156 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_NUM_MODULES

#define IFXMSC_PINMAP_NUM_MODULES 2

Table dimensions.

Definition at line 151 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_NUM_TARGETS

#define IFXMSC_PINMAP_NUM_TARGETS 4

Definition at line 152 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SDI_IN_NUM_ITEMS

#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4

Definition at line 157 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SON_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2

Definition at line 158 of file IfxMsc_PinMap.h.

◆ IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS

#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Definition at line 159 of file IfxMsc_PinMap.h.

Variable Documentation

◆ IfxMsc0_EN0_P10_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT

MSC0_EN0: MSC0 output.

Definition at line 95 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P10_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT

MSC0_EN0: MSC0 output.

Definition at line 96 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P10_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT

MSC0_EN0: MSC0 output.

Definition at line 97 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P11_11_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT

MSC0_EN0: MSC0 output.

Definition at line 98 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P14_10_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT

MSC0_EN0: MSC0 output.

Definition at line 99 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN0_P15_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT

MSC0_EN0: MSC0 output.

Definition at line 100 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P10_1_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT

MSC0_EN1: MSC0 output.

Definition at line 101 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P11_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT

MSC0_EN1: MSC0 output.

Definition at line 102 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P13_0_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT

MSC0_EN1: MSC0 output.

Definition at line 103 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P14_9_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT

MSC0_EN1: MSC0 output.

Definition at line 104 of file IfxMsc_PinMap.h.

◆ IfxMsc0_EN1_P15_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT

MSC0_EN1: MSC0 output.

Definition at line 105 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P10_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT

MSC0_END2: MSC0 output.

Definition at line 106 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P10_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT

MSC0_END2: MSC0 output.

Definition at line 107 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P10_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT

MSC0_END2: MSC0 output.

Definition at line 108 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P11_11_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT

MSC0_END2: MSC0 output.

Definition at line 109 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P14_10_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT

MSC0_END2: MSC0 output.

Definition at line 110 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END2_P15_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT

MSC0_END2: MSC0 output.

Definition at line 111 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P10_1_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT

MSC0_END3: MSC0 output.

Definition at line 112 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P11_2_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT

MSC0_END3: MSC0 output.

Definition at line 113 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P13_0_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT

MSC0_END3: MSC0 output.

Definition at line 114 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P14_9_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT

MSC0_END3: MSC0 output.

Definition at line 115 of file IfxMsc_PinMap.h.

◆ IfxMsc0_END3_P15_3_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT

MSC0_END3: MSC0 output.

Definition at line 116 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLN_P13_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT

MSC0_FCLN: MSC0 output (LVDS)

Definition at line 124 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLND_P13_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT

MSC0_FCLND: MSC0 output (LVDS)

Definition at line 123 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P11_6_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT

MSC0_FCLP: MSC0 output.

Definition at line 127 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P13_1_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT

MSC0_FCLP: MSC0 output (LVDS)

Definition at line 128 of file IfxMsc_PinMap.h.

◆ IfxMsc0_FCLP_P13_2_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT

MSC0_FCLP: MSC0 output.

Definition at line 129 of file IfxMsc_PinMap.h.

◆ IfxMsc0_INJ0_P00_0_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN

MSC0_INJ0: MSC0 input.

Definition at line 131 of file IfxMsc_PinMap.h.

◆ IfxMsc0_INJ1_P10_5_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN

MSC0_INJ1: MSC0 input.

Definition at line 132 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI0_P11_10_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN

MSC0_SDI0: MSC0 input.

Definition at line 135 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI1_P10_2_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN

MSC0_SDI1: MSC0 input.

Definition at line 136 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI2_P14_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN

MSC0_SDI2: MSC0 input.

Definition at line 137 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SDI3_P11_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN

MSC0_SDI3: MSC0 input.

Definition at line 138 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SON_P13_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT

MSC0_SON: MSC0 output (LVDS)

Definition at line 143 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SOND_P13_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT

MSC0_SOND: MSC0 output (LVDS)

Definition at line 142 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SOP_P11_9_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT

MSC0_SOP: MSC0 output.

Definition at line 146 of file IfxMsc_PinMap.h.

◆ IfxMsc0_SOP_P13_3_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT

MSC0_SOP: MSC0 output (LVDS)

Definition at line 147 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN0_P23_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT

MSC1_EN0: MSC1 output.

Definition at line 117 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN0_P32_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT

MSC1_EN0: MSC1 output.

Definition at line 118 of file IfxMsc_PinMap.h.

◆ IfxMsc1_EN1_P23_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT

MSC1_EN1: MSC1 output.

Definition at line 119 of file IfxMsc_PinMap.h.

◆ IfxMsc1_END2_P23_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT

MSC1_END2: MSC1 output.

Definition at line 120 of file IfxMsc_PinMap.h.

◆ IfxMsc1_END2_P32_4_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT

MSC1_END2: MSC1 output.

Definition at line 121 of file IfxMsc_PinMap.h.

◆ IfxMsc1_END3_P23_5_OUT

IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT

MSC1_END3: MSC1 output.

Definition at line 122 of file IfxMsc_PinMap.h.

◆ IfxMsc1_FCLN_P22_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT

MSC1_FCLN: MSC1 output (LVDS)

Definition at line 126 of file IfxMsc_PinMap.h.

◆ IfxMsc1_FCLND_P22_0_OUT

IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT

MSC1_FCLND: MSC1 output (LVDS)

Definition at line 125 of file IfxMsc_PinMap.h.

◆ IfxMsc1_FCLP_P22_1_OUT

IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT

MSC1_FCLP: MSC1 output (LVDS)

Definition at line 130 of file IfxMsc_PinMap.h.

◆ IfxMsc1_INJ0_P23_3_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN

MSC1_INJ0: MSC1 input.

Definition at line 133 of file IfxMsc_PinMap.h.

◆ IfxMsc1_INJ1_P33_13_IN

IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN

MSC1_INJ1: MSC1 input.

Definition at line 134 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI0_P23_1_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN

MSC1_SDI0: MSC1 input.

Definition at line 139 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI1_P02_3_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN

MSC1_SDI1: MSC1 input.

Definition at line 140 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SDI2_P32_4_IN

IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN

MSC1_SDI2: MSC1 input.

Definition at line 141 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SON_P22_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT

MSC1_SON: MSC1 output (LVDS)

Definition at line 145 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SOND_P22_2_OUT

IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT

MSC1_SOND: MSC1 output (LVDS)

Definition at line 144 of file IfxMsc_PinMap.h.

◆ IfxMsc1_SOP_P22_3_OUT

IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT

MSC1_SOP: MSC1 output (LVDS)

Definition at line 148 of file IfxMsc_PinMap.h.

◆ IfxMsc_En_Out_pinTable

IFX_EXTERN const IfxMsc_En_Out* IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]

IfxMsc_En_Out table.

Definition at line 163 of file IfxMsc_PinMap.h.

◆ IfxMsc_Fcln_Out_pinTable

IFX_EXTERN const IfxMsc_Fcln_Out* IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]

IfxMsc_Fcln_Out table.

Definition at line 166 of file IfxMsc_PinMap.h.

◆ IfxMsc_Fclp_Out_pinTable

IFX_EXTERN const IfxMsc_Fclp_Out* IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]

IfxMsc_Fclp_Out table.

Definition at line 169 of file IfxMsc_PinMap.h.

◆ IfxMsc_Inj_In_pinTable

IFX_EXTERN const IfxMsc_Inj_In* IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]

IfxMsc_Inj_In table.

Definition at line 172 of file IfxMsc_PinMap.h.

◆ IfxMsc_Sdi_In_pinTable

IFX_EXTERN const IfxMsc_Sdi_In* IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]

IfxMsc_Sdi_In table.

Definition at line 175 of file IfxMsc_PinMap.h.

◆ IfxMsc_Son_Out_pinTable

IFX_EXTERN const IfxMsc_Son_Out* IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]

IfxMsc_Son_Out table.

Definition at line 178 of file IfxMsc_PinMap.h.

◆ IfxMsc_Sop_Out_pinTable

IFX_EXTERN const IfxMsc_Sop_Out* IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]

IfxMsc_Sop_Out table.

Definition at line 181 of file IfxMsc_PinMap.h.


iLLD_TC26B: How to use the MSC Interface driver?

How to use the MSC Interface driver?
iLLD » MSC
Collaboration diagram for How to use the MSC Interface driver?:

The MSC interface driver provides a default MSC configuration

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Msc/Msc/IfxMsc_Msc.h>

Variables

Declare the MSC handle as global variable in your C code:

// MSC handle
static IfxMsc_Msc *msc;
// IO Pins
static const IfxMsc_Msc_Io IfxMsc_PinMap[IFXMSC_NUM_MODULES] = {
{
{ &IfxMsc0_FCLP_P13_1_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_FCLN_P13_0_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_SOP_P13_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_SON_P13_2_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_EN0_P10_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc0_EN1_P11_2_OUT, IfxPort_OutputMode_pushPull },
{NULL_PTR},
{NULL_PTR},
{ &IfxMsc0_SDI0_P11_10_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc0_INJ0_P00_0_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc0_INJ1_P10_5_IN, IfxPort_InputMode_pullUp },
IfxPort_PadDriver_cmosAutomotiveSpeed3
},
#if IFXMSC_NUM_MODULES >= 2
{
{ &IfxMsc1_FCLP_P22_1_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_FCLN_P22_0_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_SOP_P22_3_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_SON_P22_2_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_EN0_P23_4_OUT, IfxPort_OutputMode_pushPull },
{ &IfxMsc1_EN1_P23_5_OUT, IfxPort_OutputMode_pushPull },
{NULL_PTR},
{NULL_PTR},
{ &IfxMsc1_SDI0_P23_1_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc1_INJ0_P23_3_IN, IfxPort_InputMode_pullUp },
{ &IfxMsc1_INJ1_P33_13_IN, IfxPort_InputMode_pullUp },
IfxPort_PadDriver_cmosAutomotiveSpeed3
},
#endif
};

Module Initialisation

The module initialisation can be done as followed:

// create configuration (same is used for all MSCs)
IfxMsc_Msc_Config mscConfig;
IfxMsc_Msc_initModuleConfig(&mscConfig, &MODULE_MSC0);
// increase baudrate for faster simulation:
mscConfig.clockConfig.baudrate = 25000000;
mscConfig.clockConfig.dividerMode = IfxMsc_DividerMode_fractional;
// FCL only activated on transfers
mscConfig.outputControlConfig.fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly;
// in this case we also don't need a selection bit
mscConfig.downstreamConfig.srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
mscConfig.downstreamConfig.srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
// initialize MSCs
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
// init module pointer
mscConfig.msc = (Ifx_MSC*)IfxMsc_cfg_indexMap[i].module;
// IO Config
mscConfig.io = IfxMsc_PinMap[i];
// initialize module
IfxMsc_Msc_initModule(&msc[i], &mscConfig);
}

The MSC is ready for use now!

Data Transfers

The MSC driver provides simple to use transfer function

for(int n=0; n<10; ++n) {
// clear IRQ flag of previous transfer
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
msc[i].msc->ISC.B.CDEDI = 1;
}
// new transfer
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
const unsigned dataL = i*0x1000 + n;
const unsigned dataH = i*0x1000 + 0x0100 + n;
IfxMsc_Msc_sendData(&msc[i], dataL, dataH);
}
// wait until transfers are finished
for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
while( !msc[i].msc->ISR.B.DEDI ); // check if new data could be written
while( msc[i].msc->DSS.B.DFA ); // check if we are still in the active data phase
}
}


iLLD_TC26B: MSC

Modules
MSC
iLLD » MSC
Collaboration diagram for MSC:

Modules

Enumerations
Data Structures
Module Initialize Functions
Send Functions
Receive Functions
Target Read Write Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » MSC » MSC
Collaboration diagram for Enumerations:

Enumerations

enum IfxMsc_Msc_Target {
IfxMsc_Msc_Target_low = 0,
IfxMsc_Msc_Target_high = 1
}
Msc Instance Number. More...

Detailed Description

Enumeration Type Documentation

◆ IfxMsc_Msc_Target

enum IfxMsc_Msc_Target

Msc Instance Number.

Enumerator
IfxMsc_Msc_Target_low | MSC Target Low.
IfxMsc_Msc_Target_high | MSC Target High.

Definition at line 178 of file IfxMsc_Msc.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » MSC » MSC
Collaboration diagram for Data Structures:

Data Structures

struct | IfxMsc_Msc_en
struct | IfxMsc_Msc_fcln
struct | IfxMsc_Msc_fclp
struct | IfxMsc_Msc_inj0
struct | IfxMsc_Msc_inj1
struct | IfxMsc_Msc_sdi
struct | IfxMsc_Msc_son
struct | IfxMsc_Msc_sop
struct | IfxMsc_Msc_Abra
ABRA block Configuration Structure. More...
struct | IfxMsc_Msc_Clock
Clock configuration data Structure. More...
struct | IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure. More...
struct | IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure. More...
struct | IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure. More...
struct | IfxMsc_Msc_Io
MSC Pin Configuration Structure. More...
struct | IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure. More...
struct | IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure. More...
struct | IfxMsc_Msc
MSC base address data Structure. More...
struct | IfxMsc_Msc_Config
MSC Module Configuration Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxMsc_Msc_en

struct IfxMsc_Msc_en

Definition at line 192 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_en:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_En_Out * | pin

◆ IfxMsc_Msc_fcln

struct IfxMsc_Msc_fcln

Definition at line 198 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_fcln:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Fcln_Out * | pin

◆ IfxMsc_Msc_fclp

struct IfxMsc_Msc_fclp

Definition at line 204 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_fclp:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Fclp_Out * | pin

◆ IfxMsc_Msc_inj0

struct IfxMsc_Msc_inj0

Definition at line 210 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_inj0:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Inj_In * | pin

◆ IfxMsc_Msc_inj1

struct IfxMsc_Msc_inj1

Definition at line 216 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_inj1:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Inj_In * | pin

◆ IfxMsc_Msc_sdi

struct IfxMsc_Msc_sdi

Definition at line 222 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_sdi:
[legend]
Data Fields
IfxPort_InputMode | mode
IfxMsc_Sdi_In * | pin

◆ IfxMsc_Msc_son

struct IfxMsc_Msc_son

Definition at line 228 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_son:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Son_Out * | pin

◆ IfxMsc_Msc_sop

struct IfxMsc_Msc_sop

Definition at line 234 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_sop:
[legend]
Data Fields
IfxPort_OutputMode | mode
IfxMsc_Sop_Out * | pin

◆ IfxMsc_Msc_Abra

struct IfxMsc_Msc_Abra

ABRA block Configuration Structure.

Definition at line 246 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_AsynchronousBlock | abraBlockBypass | Specifies ABRA block bypass.
uint32 | abraDownstreamBlockBaudrate | Specifies ABRA downstream block baud.
IfxMsc_ClockSelect | clockSelectAbra | Specifies the clock select for ABRA.
IfxMsc_ShiftClockPhaseDuration | highPhaseOfShiftClock | Specifies High phase of shift clock.
IfxMsc_ShiftClockPhaseDuration | lowPhaseOfShiftClock | Specifies Low phase of shift clock.
IfxMsc_NDividerAbra | nDividerAbra | Specifies the N divider.

◆ IfxMsc_Msc_Clock

struct IfxMsc_Msc_Clock

Clock configuration data Structure.

Definition at line 258 of file IfxMsc_Msc.h.

Data Fields
uint32 | baudrate | Specifies the baud rate.
IfxMsc_DividerMode | dividerMode | Specifies divided clock properties.
uint16 | step | Specifies the step value.

◆ IfxMsc_Msc_DownstreamControlConfig

struct IfxMsc_Msc_DownstreamControlConfig

Downstream Control Configuration Structure.

Definition at line 267 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_CommandDataCommandRepetitionMode | commandDataCommandReceptionMode | Specifies the Command-Data-Command in Data Repetition Mode.
IfxMsc_CommandFrameLength | commandFrameLength | Specifies the Number of bits shifted at command frames.
IfxMsc_DataFramePassivePhaseLength | dataFramePassivePhaseLength | Specifies the Passive Phase Length at Data Frames.
uint32 | downstreamDataSourcesHigh | Specifies the Downstream Data Source selections High.
uint32 | downstreamDataSourcesLow | Specifies the Downstream Data Source selections Low.
uint32 | emergencyStopEnableBits | Emergency Stop.
IfxMsc_ExternalSignalInjection | externalSignalInjectionPin0 | Specifies the Injection Enable Pin 0.
IfxMsc_ExternalSignalInjection | externalSignalInjectionPin1 | Specifies the Injection Enable Pin 1.
IfxMsc_ExternalBitInjectionPosition | injectionPositionPin0 | Specifies the Injection Position Pin 0.
IfxMsc_ExternalBitInjectionPosition | injectionPositionPin1 | Specifies the Injection Position Pin 1.
IfxMsc_PassiveTimeFrameCount | passiveTimeFrameCount | Specifies the Number of Passive Time Frames.
IfxMsc_ActivePhaseSelection | srhActivePhaseSelection | Specifies the Enable SRL active phase selection bit.
IfxMsc_DataFrameLength | srhDataFrameLength | Specifies the Number of SRH bits shifted at data frames.
IfxMsc_ActivePhaseSelection | srlActivePhaseSelection | Specifies the Enable SRL active phase selection bit.
IfxMsc_DataFrameLength | srlDataFrameLength | Specifies the Number of SRL bits shifted at data frames.
IfxMsc_TransmissionMode | transmissionMode | Specifies the transmission Mode.

◆ IfxMsc_Msc_DownstreamControlExtensionConfig

struct IfxMsc_Msc_DownstreamControlExtensionConfig

Downstream Control Extension Configuration Structure.

Definition at line 289 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_ControlFrameExtensionPassivePhaseLength | controlFrameExtensionPassivePhaseLength | Specifies the Passive Phase Length at Control Frames Extension.
IfxMsc_DataFrameExtensionPassivePhaseLength | dataFrameExtensionPassivePhaseLength | Specifies the Passive Phase Length at Data Frames Extension.
uint32 | downstreamExtensionDataSourcesHigh | Specifies the Downstream Select Data Source High Extension.
uint32 | downstreamExtensionDataSourcesLow | Specifies the Downstream Select Data Source Low Extension.
uint32 | emergencyStopExtensionEnableBits | Emergency Stop Extension.
IfxMsc_Extension | extension | Specifies the Extension Enable.
IfxMsc_NDividerDownstream | nDividerDownstream | Specifies the division ratio for downstream generator clock.
IfxMsc_MsbBitDataExtension | srhBitsShiftedAtDataFramesExtension | Specifies the Number of SRHE bits shifted at Data Frames.
IfxMsc_MsbBitDataExtension | srlBitsShiftedAtDataFramesExtension | Specifies the Number of SRLE bits shifted at Data Frames.

◆ IfxMsc_Msc_InterruptConfig

struct IfxMsc_Msc_InterruptConfig

Interrupt Configuration Structure.

Definition at line 304 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_CommandFrameInterrupt | commandFrameInterrupt | Specifies the Command Frame Interrupt Mode.
IfxMsc_CommandFrameInterruptNode | commandFrameInterruptNode | Specifies the Command Frame Interrupt Node.
IfxMsc_DataFrameInterrupt | dataFrameInterrupt | Specifies the Data Frame Interrupt Mode.
IfxMsc_DataFrameInterruptNode | dataFrameInterruptNode | Specifies the Data Frame Interrupt Node.
IfxMsc_OverflowInterrupt | overflowInterrupt | Specifies the ABRA Overflow Interrupt Mode.
IfxMsc_OverflowInterruptNode | overflowInterruptNode | Specifies the ABRA Overflow Interrupt Node.
IfxMsc_ReceiveDataInterrupt | receiveDataInterrupt | Specifies the Receive Interrupt Mode.
IfxMsc_ReceiveDataInterruptNode | receiveDataInterruptNode | Specifies the Receive Interrupt Node.
IfxMsc_TimeFrameInterrupt | timeFrameInterrupt | Specifies the Time Frame Interrupt Mode.
IfxMsc_TimeFrameInterruptNode | timeFrameInterruptNode | Specifies the Time Frame Interrupt Node.
IfxMsc_UnderflowInterrupt | underflowInterrupt | Specifies the ABRA Underflow Interrupt Mode.
IfxMsc_UnderflowInterruptNode | underflowInterruptNode | Specifies the ABRA Underflow Interrupt Node.
IfxMsc_UpstreamTimeoutInterrupt | upstreamTimeoutInterrupt | Specifies the Upstream Timeout Interrupt Mode.
IfxMsc_UpstreamTimeoutInterruptNode | upstreamTimeoutInterruptNode | Specifies the Upstream Timeout Interrupt Node.

◆ IfxMsc_Msc_Io

struct IfxMsc_Msc_Io

MSC Pin Configuration Structure.

Definition at line 324 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_Io:
[legend]
Data Fields
IfxMsc_Msc_en | en0
IfxMsc_Msc_en | en1
IfxMsc_Msc_en | en2
IfxMsc_Msc_en | en3
IfxMsc_Msc_fcln | fcln
IfxMsc_Msc_fclp | fclp
IfxMsc_Msc_inj0 | inj0
IfxMsc_Msc_inj1 | inj1
IfxPort_PadDriver | pinDriver
IfxMsc_Msc_sdi | sdi
IfxMsc_Msc_son | son
IfxMsc_Msc_sop | sop

◆ IfxMsc_Msc_OutputControlConfig

struct IfxMsc_Msc_OutputControlConfig

Output Control Configuration Structure.

Definition at line 342 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_ChipSelectActiveState | cslpPolarity | Specifies the CSLP Polarity.
IfxMsc_FclClockControlEnabled | fclClockControl | Specifies the CLKCTRL Polarity.
IfxMsc_FclLinePolarity | fclpPolarity | Specifies the FCLP Polarity.
IfxMsc_SdiLinePolarity | sdiLinePolarity | Specifies the ILP Polarity.
IfxMsc_SoLinePolarity | sopPolarity | Specifies the SLP Polarity.

◆ IfxMsc_Msc_UpstreamStatusConfig

struct IfxMsc_Msc_UpstreamStatusConfig

Upstream Control Configuration Structure.

Definition at line 353 of file IfxMsc_Msc.h.

Data Fields
IfxMsc_Parity | parity | Specifies the Parity Mode.
IfxMsc_ServiceRequestDelay | serviceRequestDelay | Specifies the Service Request Delay.
IfxMsc_UpstreamChannelFrameType | upstreamChannelFrameType | Specifies the Upstream Channel Frame Type.
IfxMsc_UpstreamChannelReceivingRate | upstreamChannelReceivingRate | Specifies the Upstream Channel Receiving Rate.
IfxMsc_UpstreamTimeoutPrescaler | upstreamTimeoutPrescaler | Specifies the Upstream Timeout Prescaler.
IfxMsc_UpstreamTimeoutValue | upstreamTimeoutValue | Specifies the Upstream Timeout Value.

◆ IfxMsc_Msc

struct IfxMsc_Msc

MSC base address data Structure.

Definition at line 369 of file IfxMsc_Msc.h.

Data Fields
Ifx_MSC * msc Specifies the pointer to the MSC registers.

◆ IfxMsc_Msc_Config

struct IfxMsc_Msc_Config

MSC Module Configuration Structure.

Definition at line 376 of file IfxMsc_Msc.h.

Collaboration diagram for IfxMsc_Msc_Config:
[legend]
Data Fields
IfxMsc_Msc_Abra | abraConfig | Specifies the ABRA configuration.
IfxMsc_Msc_Clock | clockConfig | Specifies the Clock configuration.
IfxMsc_Msc_DownstreamControlConfig | downstreamConfig | Specifies the Downstream configuration.
IfxMsc_Msc_DownstreamControlExtensionConfig | downstreamExtensionConfig | Specifies the Downstream Extension configuration.
IfxMsc_Msc_InterruptConfig | interruptConfig | Specifies the Interrupt configuration.
IfxMsc_Msc_Io | io | Specifies the IO Pin configuration.
Ifx_MSC * | msc | Specifies the pointer to the MSC registers.
IfxMsc_Msc_OutputControlConfig | outputControlConfig | Specifies the Output Control configuration.
IfxMsc_Target | target[IFXMSC_NUM_ENABLE_SELECT_LINES] | Specifies the Downstream targets.
IfxMsc_Msc_UpstreamStatusConfig | upstreamConfig | Specifies the Upstream configuration.


iLLD_TC26B: Module Initialize Functions

Functions
Module Initialize Functions
iLLD » MSC » MSC
Collaboration diagram for Module Initialize Functions:

Functions

IFX_EXTERN void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
IFX_EXTERN void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
IFX_EXTERN void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_deInitModule()

IFX_EXTERN void IfxMsc_Msc_deInitModule ( IfxMsc_Msc * msc )

de-initialize MSC module

Parameters
msc pointer to the MSC module handle
Returns
None
IfxMsc_Msc_deInitModule(&msc);

Definition at line 35 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_initializeAbra()

IFX_EXTERN void IfxMsc_Msc_initializeAbra | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the ABRA block

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

Definition at line 522 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_initializeDataExtension()

IFX_EXTERN void IfxMsc_Msc_initializeDataExtension | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the MSC data extension block for 64bit operation

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

Definition at line 552 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_initModule()

IFX_EXTERN void IfxMsc_Msc_initModule | ( | IfxMsc_Msc * | msc,
 |  | const IfxMsc_Msc_Config * | config
 | ) |  |

initialize the MSC module

Parameters
msc | pointer to the MSC module handle
config | pointer to the MSC module configuration
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 59 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_initModuleConfig()

IFX_EXTERN void IfxMsc_Msc_initModuleConfig | ( | IfxMsc_Msc_Config * | config,
 |  | Ifx_MSC * | msc
 | ) |  |

initialize the MSC module configuration

Parameters
config | pointer to the MSC configuration
msc | pointer to the MSC registers
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 388 of file IfxMsc_Msc.c.


iLLD_TC26B: Send Functions

Functions
Send Functions
iLLD » MSC » MSC
Collaboration diagram for Send Functions:

Functions

IFX_EXTERN void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
IFX_EXTERN void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
IFX_EXTERN void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
IFX_EXTERN void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_sendCommand()

IFX_EXTERN void IfxMsc_Msc_sendCommand | ( | IfxMsc_Msc * | msc,
 |  | uint32 | command
 | ) |  |

send downstream command

Parameters
msc | pointer to the MSC module handle
command | transmit command
Returns
None

Definition at line 620 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendData()

IFX_EXTERN void IfxMsc_Msc_sendData | ( | IfxMsc_Msc * | msc,
 |  | uint16 | dataLow,
 |  | uint16 | dataHigh
 | ) |  |

send complete downstream data, both high and low

Parameters
msc | pointer to the MSC module handle
dataLow | low data to be transmitted
dataHigh | high data to be transmitted
Returns
None

A coding example can be found in How to use the MSC Interface driver?

Definition at line 629 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataExtension()

IFX_EXTERN void IfxMsc_Msc_sendDataExtension | ( | IfxMsc_Msc * | msc,
 |  | uint32 | data,
 |  | uint32 | dataExtension
 | ) |  |

Send downstream data extension (64bit)

Parameters
msc | pointer to the MSC module handle
data | Data to send
dataExtension | Data extension to send
Returns
None

Definition at line 647 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataHigh()

IFX_EXTERN void IfxMsc_Msc_sendDataHigh | ( | IfxMsc_Msc * | msc,
 |  | uint16 | data
 | ) |  |

send high downstream data

Parameters
msc | pointer to the MSC module handle
data | high downstream data to be transmitted
Returns
None

Definition at line 660 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_sendDataLow()

IFX_EXTERN void IfxMsc_Msc_sendDataLow | ( | IfxMsc_Msc * | msc,
 |  | uint16 | data
 | ) |  |

send high downstream data

Parameters
msc | pointer to the MSC module handle
data | low downstream data to be transmitted
Returns
None

Definition at line 672 of file IfxMsc_Msc.c.


iLLD_TC26B: Receive Functions

Functions
Receive Functions
iLLD » MSC » MSC
Collaboration diagram for Receive Functions:

Functions

IFX_EXTERN uint32 IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_receiveData()

IFX_EXTERN uint32 IfxMsc_Msc_receiveData | ( | IfxMsc_Msc * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

receive upstream data

Parameters
msc | pointer to the MSC module handle
upstreamIdx | index of the upstream data register
Returns
data

Definition at line 599 of file IfxMsc_Msc.c.


iLLD_TC26B: Target Read Write Functions

Functions
Target Read Write Functions
iLLD » MSC » MSC
Collaboration diagram for Target Read Write Functions:

Functions

IFX_EXTERN IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
IFX_EXTERN void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
IFX_EXTERN void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...

Detailed Description

Function Documentation

◆ IfxMsc_Msc_getTarget()

IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Msc_Target | target
 | ) |  |

get the target during high and low phase

Parameters
msc | pointer to the MSC module handle
target | low phase target or high phase target
Returns
selected target

Definition at line 41 of file IfxMsc_Msc.c.

Referenced by IfxMsc_Msc_initModule().

◆ IfxMsc_Msc_setCommandTarget()

IFX_EXTERN void IfxMsc_Msc_setCommandTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Target | enX
 | ) |  |

set the command for target

Parameters
msc | pointer to the MSC module handle
enX | enX target to be selected
Returns
None

Definition at line 684 of file IfxMsc_Msc.c.

◆ IfxMsc_Msc_setDataTarget()

IFX_EXTERN void IfxMsc_Msc_setDataTarget | ( | IfxMsc_Msc * | msc,
 |  | IfxMsc_Target | enXHigh,
 |  | IfxMsc_Target | enXLow
 | ) |  |

set the target data to be transmitted during low and high phase

Parameters
msc | pointer to the MSC module handle
enXHigh | high target to be selected
enXLow | low target to be selected
Returns
None

Definition at line 692 of file IfxMsc_Msc.c.


iLLD_TC26B: IfxMsc_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxMsc_cfg.h File Reference
iLLD » MSC

MSC on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxMsc_reg.h"
Include dependency graph for IfxMsc_cfg.h:

Go to the source code of this file.

Macros

#define | IFXMSC_NUM_MODULES 2
#define | IFXMSC_NUM_ENABLE_SELECT_LINES (4)

Enumerations

enum IfxMsc_Index {
IfxMsc_Index_none = -1,
IfxMsc_Index_0 = 0,
IfxMsc_Index_1
}
List of the available MSC resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap [IFXMSC_NUM_MODULES]

Detailed Description

MSC on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMsc_cfg.h.

Macro Definition Documentation

◆ IFXMSC_NUM_ENABLE_SELECT_LINES

#define IFXMSC_NUM_ENABLE_SELECT_LINES (4)

Definition at line 50 of file IfxMsc_cfg.h.

◆ IFXMSC_NUM_MODULES

#define IFXMSC_NUM_MODULES 2

Definition at line 48 of file IfxMsc_cfg.h.

Referenced by IfxMsc_getAddress(), and IfxMsc_getIndex().

Variable Documentation

◆ IfxMsc_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]

Definition at line 73 of file IfxMsc_cfg.h.


iLLD_TC26B: IfxMsc_PinMap.c File Reference

  • _PinMap
Variables
IfxMsc_PinMap.c File Reference
iLLD » MSC

MSC I/O map. More...

#include "IfxMsc_PinMap.h"
Include dependency graph for IfxMsc_PinMap.c:

Go to the source code of this file.

Variables

IfxMsc_En_Out | IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3}
IfxMsc_En_Out | IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3}
IfxMsc_En_Out | IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_END2_P10_2_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt6}
IfxMsc_En_Out | IfxMsc0_END2_P10_3_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc0_END2_P10_4_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt6}
IfxMsc_En_Out | IfxMsc0_END2_P11_11_OUT = {&MODULE_MSC0, 2, {&MODULE_P11,11}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END2_P14_10_OUT = {&MODULE_MSC0, 2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END2_P15_5_OUT = {&MODULE_MSC0, 2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc0_END3_P10_1_OUT = {&MODULE_MSC0, 3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt6}
IfxMsc_En_Out | IfxMsc0_END3_P11_2_OUT = {&MODULE_MSC0, 3, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END3_P13_0_OUT = {&MODULE_MSC0, 3, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END3_P14_9_OUT = {&MODULE_MSC0, 3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2}
IfxMsc_En_Out | IfxMsc0_END3_P15_3_OUT = {&MODULE_MSC0, 3, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5}
IfxMsc_En_Out | IfxMsc1_END2_P23_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt4}
IfxMsc_En_Out | IfxMsc1_END2_P32_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt3}
IfxMsc_En_Out | IfxMsc1_END3_P23_5_OUT = {&MODULE_MSC1, 3, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt4}
IfxMsc_Fcln_Out | IfxMsc0_FCLND_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt6}
IfxMsc_Fcln_Out | IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5}
IfxMsc_Fcln_Out | IfxMsc1_FCLND_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt6}
IfxMsc_Fcln_Out | IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5}
IfxMsc_Fclp_Out | IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4}
IfxMsc_Fclp_Out | IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5}
IfxMsc_Inj_In | IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a}
IfxMsc_Inj_In | IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b}
IfxMsc_Inj_In | IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a}
IfxMsc_Inj_In | IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxMsc_Sdi_In | IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c}
IfxMsc_Sdi_In | IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d}
IfxMsc_Sdi_In | IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a}
IfxMsc_Sdi_In | IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxMsc_Sdi_In | IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c}
IfxMsc_Son_Out | IfxMsc0_SOND_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7}
IfxMsc_Son_Out | IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_Son_Out | IfxMsc1_SOND_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt6}
IfxMsc_Son_Out | IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5}
IfxMsc_Sop_Out | IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5}
const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]

Detailed Description

MSC I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMsc_PinMap.c.

Variable Documentation

◆ IfxMsc0_EN0_P10_2_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4}

Definition at line 28 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P10_3_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4}

Definition at line 29 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P10_4_OUT

IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5}

Definition at line 30 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P11_11_OUT

IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5}

Definition at line 31 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P14_10_OUT

IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3}

Definition at line 32 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN0_P15_5_OUT

IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5}

Definition at line 33 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P10_1_OUT

IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4}

Definition at line 34 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P11_2_OUT

IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5}

Definition at line 35 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P13_0_OUT

IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4}

Definition at line 36 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P14_9_OUT

IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3}

Definition at line 37 of file IfxMsc_PinMap.c.

◆ IfxMsc0_EN1_P15_3_OUT

IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5}

Definition at line 38 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P10_2_OUT

IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt6}

Definition at line 39 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P10_3_OUT

IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt5}

Definition at line 40 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P10_4_OUT

IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt6}

Definition at line 41 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P11_11_OUT

IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT = {&MODULE_MSC0, 2, {&MODULE_P11,11}, IfxPort_OutputIdx_alt2}

Definition at line 42 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P14_10_OUT

IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT = {&MODULE_MSC0, 2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt2}

Definition at line 43 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END2_P15_5_OUT

IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT = {&MODULE_MSC0, 2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt4}

Definition at line 44 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P10_1_OUT

IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT = {&MODULE_MSC0, 3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt6}

Definition at line 45 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P11_2_OUT

IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT = {&MODULE_MSC0, 3, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt2}

Definition at line 46 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P13_0_OUT

IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT = {&MODULE_MSC0, 3, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2}

Definition at line 47 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P14_9_OUT

IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT = {&MODULE_MSC0, 3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2}

Definition at line 48 of file IfxMsc_PinMap.c.

◆ IfxMsc0_END3_P15_3_OUT

IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT = {&MODULE_MSC0, 3, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt4}

Definition at line 49 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLN_P13_0_OUT

IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5}

Definition at line 57 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLND_P13_0_OUT

IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt6}

Definition at line 56 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P11_6_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5}

Definition at line 60 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P13_1_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5}

Definition at line 61 of file IfxMsc_PinMap.c.

◆ IfxMsc0_FCLP_P13_2_OUT

IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4}

Definition at line 62 of file IfxMsc_PinMap.c.

◆ IfxMsc0_INJ0_P00_0_IN

IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a}

Definition at line 64 of file IfxMsc_PinMap.c.

◆ IfxMsc0_INJ1_P10_5_IN

IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b}

Definition at line 65 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI0_P11_10_IN

IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 68 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI1_P10_2_IN

IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b}

Definition at line 69 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI2_P14_3_IN

IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c}

Definition at line 70 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SDI3_P11_3_IN

IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d}

Definition at line 71 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SON_P13_2_OUT

IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5}

Definition at line 76 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SOND_P13_2_OUT

IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7}

Definition at line 75 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SOP_P11_9_OUT

IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5}

Definition at line 79 of file IfxMsc_PinMap.c.

◆ IfxMsc0_SOP_P13_3_OUT

IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5}

Definition at line 80 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN0_P23_4_OUT

IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5}

Definition at line 50 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN0_P32_4_OUT

IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5}

Definition at line 51 of file IfxMsc_PinMap.c.

◆ IfxMsc1_EN1_P23_5_OUT

IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5}

Definition at line 52 of file IfxMsc_PinMap.c.

◆ IfxMsc1_END2_P23_4_OUT

IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt4}

Definition at line 53 of file IfxMsc_PinMap.c.

◆ IfxMsc1_END2_P32_4_OUT

IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt3}

Definition at line 54 of file IfxMsc_PinMap.c.

◆ IfxMsc1_END3_P23_5_OUT

IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT = {&MODULE_MSC1, 3, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt4}

Definition at line 55 of file IfxMsc_PinMap.c.

◆ IfxMsc1_FCLN_P22_0_OUT

IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5}

Definition at line 59 of file IfxMsc_PinMap.c.

◆ IfxMsc1_FCLND_P22_0_OUT

IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt6}

Definition at line 58 of file IfxMsc_PinMap.c.

◆ IfxMsc1_FCLP_P22_1_OUT

IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5}

Definition at line 63 of file IfxMsc_PinMap.c.

◆ IfxMsc1_INJ0_P23_3_IN

IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a}

Definition at line 66 of file IfxMsc_PinMap.c.

◆ IfxMsc1_INJ1_P33_13_IN

IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b}

Definition at line 67 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI0_P23_1_IN

IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a}

Definition at line 72 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI1_P02_3_IN

IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 73 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SDI2_P32_4_IN

IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c}

Definition at line 74 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SON_P22_2_OUT

IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5}

Definition at line 78 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SOND_P22_2_OUT

IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt6}

Definition at line 77 of file IfxMsc_PinMap.c.

◆ IfxMsc1_SOP_P22_3_OUT

IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5}

Definition at line 81 of file IfxMsc_PinMap.c.

◆ IfxMsc_En_Out_pinTable

const IfxMsc_En_Out* IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]

Definition at line 84 of file IfxMsc_PinMap.c.

◆ IfxMsc_Fcln_Out_pinTable

const IfxMsc_Fcln_Out* IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_FCLN_P13_0_OUT,
&IfxMsc0_FCLND_P13_0_OUT
},
{
&IfxMsc1_FCLN_P22_0_OUT,
&IfxMsc1_FCLND_P22_0_OUT
}
}
IfxMsc1_FCLN_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Definition: IfxMsc_PinMap.c:59
IfxMsc0_FCLN_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Definition: IfxMsc_PinMap.c:57
IfxMsc1_FCLND_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
Definition: IfxMsc_PinMap.c:58
IfxMsc0_FCLND_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
Definition: IfxMsc_PinMap.c:56

Definition at line 155 of file IfxMsc_PinMap.c.

◆ IfxMsc_Fclp_Out_pinTable

const IfxMsc_Fclp_Out* IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_FCLP_P11_6_OUT,
&IfxMsc0_FCLP_P13_1_OUT,
&IfxMsc0_FCLP_P13_2_OUT
},
{
&IfxMsc1_FCLP_P22_1_OUT,
NULL_PTR,
NULL_PTR
}
}
IfxMsc0_FCLP_P13_1_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Definition: IfxMsc_PinMap.c:61
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxMsc1_FCLP_P22_1_OUT
IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Definition: IfxMsc_PinMap.c:63
IfxMsc0_FCLP_P13_2_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Definition: IfxMsc_PinMap.c:62
IfxMsc0_FCLP_P11_6_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Definition: IfxMsc_PinMap.c:60

Definition at line 166 of file IfxMsc_PinMap.c.

◆ IfxMsc_Inj_In_pinTable

const IfxMsc_Inj_In* IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_INJ0_P00_0_IN,
&IfxMsc0_INJ1_P10_5_IN
},
{
&IfxMsc1_INJ0_P23_3_IN,
&IfxMsc1_INJ1_P33_13_IN
}
}
IfxMsc1_INJ0_P23_3_IN
IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Definition: IfxMsc_PinMap.c:66
IfxMsc0_INJ1_P10_5_IN
IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Definition: IfxMsc_PinMap.c:65
IfxMsc0_INJ0_P00_0_IN
IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Definition: IfxMsc_PinMap.c:64
IfxMsc1_INJ1_P33_13_IN
IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Definition: IfxMsc_PinMap.c:67

Definition at line 179 of file IfxMsc_PinMap.c.

◆ IfxMsc_Sdi_In_pinTable

const IfxMsc_Sdi_In* IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SDI0_P11_10_IN,
&IfxMsc0_SDI1_P10_2_IN,
&IfxMsc0_SDI2_P14_3_IN,
&IfxMsc0_SDI3_P11_3_IN
},
{
&IfxMsc1_SDI0_P23_1_IN,
&IfxMsc1_SDI1_P02_3_IN,
&IfxMsc1_SDI2_P32_4_IN,
NULL_PTR
}
}
IfxMsc1_SDI0_P23_1_IN
IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Definition: IfxMsc_PinMap.c:72
IfxMsc1_SDI2_P32_4_IN
IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Definition: IfxMsc_PinMap.c:74
IfxMsc0_SDI2_P14_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Definition: IfxMsc_PinMap.c:70
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxMsc0_SDI3_P11_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Definition: IfxMsc_PinMap.c:71
IfxMsc0_SDI1_P10_2_IN
IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Definition: IfxMsc_PinMap.c:69
IfxMsc0_SDI0_P11_10_IN
IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Definition: IfxMsc_PinMap.c:68
IfxMsc1_SDI1_P02_3_IN
IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Definition: IfxMsc_PinMap.c:73

Definition at line 190 of file IfxMsc_PinMap.c.

◆ IfxMsc_Son_Out_pinTable

const IfxMsc_Son_Out* IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SON_P13_2_OUT,
&IfxMsc0_SOND_P13_2_OUT
},
{
&IfxMsc1_SON_P22_2_OUT,
&IfxMsc1_SOND_P22_2_OUT
}
}
IfxMsc0_SOND_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
Definition: IfxMsc_PinMap.c:75
IfxMsc0_SON_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Definition: IfxMsc_PinMap.c:76
IfxMsc1_SON_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Definition: IfxMsc_PinMap.c:78
IfxMsc1_SOND_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
Definition: IfxMsc_PinMap.c:77

Definition at line 205 of file IfxMsc_PinMap.c.

◆ IfxMsc_Sop_Out_pinTable

const IfxMsc_Sop_Out* IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxMsc0_SOP_P11_9_OUT,
&IfxMsc0_SOP_P13_3_OUT
},
{
&IfxMsc1_SOP_P22_3_OUT,
NULL_PTR
}
}
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxMsc1_SOP_P22_3_OUT
IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Definition: IfxMsc_PinMap.c:81
IfxMsc0_SOP_P11_9_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Definition: IfxMsc_PinMap.c:79
IfxMsc0_SOP_P13_3_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Definition: IfxMsc_PinMap.c:80

Definition at line 216 of file IfxMsc_PinMap.c.


iLLD_TC26B: IfxMsc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxMsc_PinMap.h File Reference
iLLD » MSC

MSC I/O map. More...

#include <IfxMsc_reg.h>
#include <_Impl/IfxMsc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxMsc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxMsc_Inj_In
INJ pin mapping structure. More...
struct | IfxMsc_Sdi_In
SDI pin mapping structure. More...
struct | IfxMsc_En_Out
EN pin mapping structure. More...
struct | IfxMsc_Fclp_Out
FCLP pin mapping structure. More...
struct | IfxMsc_Fcln_Out
FCLN pin mapping structure. More...
struct | IfxMsc_Sop_Out
SOP pin mapping structure. More...
struct | IfxMsc_Son_Out
SON pin mapping structure. More...

Macros

#define | IFXMSC_PINMAP_NUM_MODULES 2
Table dimensions. More...
#define | IFXMSC_PINMAP_NUM_TARGETS 4
#define | IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
#define | IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2
#define | IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
#define | IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
#define | IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2
#define | IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
MSC0_EN0: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
MSC0_EN1: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT
MSC0_END2: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT
MSC0_END3: MSC0 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
MSC1_EN0: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
MSC1_EN0: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
MSC1_EN1: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT
MSC1_END2: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT
MSC1_END2: MSC1 output. More...
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT
MSC1_END3: MSC1 output. More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
MSC0_FCLND: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
MSC0_FCLN: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
MSC1_FCLND: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
MSC1_FCLN: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
MSC0_FCLP: MSC0 output. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
MSC0_FCLP: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
MSC0_FCLP: MSC0 output. More...
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
MSC1_FCLP: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
MSC0_INJ0: MSC0 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
MSC0_INJ1: MSC0 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
MSC1_INJ0: MSC1 input. More...
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
MSC1_INJ1: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
MSC0_SDI0: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
MSC0_SDI1: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
MSC0_SDI2: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
MSC0_SDI3: MSC0 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
MSC1_SDI0: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
MSC1_SDI1: MSC1 input. More...
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
MSC1_SDI2: MSC1 input. More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
MSC0_SOND: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
MSC0_SON: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
MSC1_SOND: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
MSC1_SON: MSC1 output (LVDS) More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
MSC0_SOP: MSC0 output. More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
MSC0_SOP: MSC0 output (LVDS) More...
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
MSC1_SOP: MSC1 output (LVDS) More...
IFX_EXTERN const IfxMsc_En_Out * | IfxMsc_En_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table. More...
IFX_EXTERN const IfxMsc_Fcln_Out * | IfxMsc_Fcln_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table. More...
IFX_EXTERN const IfxMsc_Fclp_Out * | IfxMsc_Fclp_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table. More...
IFX_EXTERN const IfxMsc_Inj_In * | IfxMsc_Inj_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table. More...
IFX_EXTERN const IfxMsc_Sdi_In * | IfxMsc_Sdi_In_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table. More...
IFX_EXTERN const IfxMsc_Son_Out * | IfxMsc_Son_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table. More...
IFX_EXTERN const IfxMsc_Sop_Out * | IfxMsc_Sop_Out_pinTable [IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table. More...

Detailed Description

MSC I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMsc_PinMap.h.


iLLD_TC26B: IfxMsc_Msc.h File Reference

  • Msc
  • Msc
Data Structures | Enumerations | Functions
IfxMsc_Msc.h File Reference
iLLD » MSC

MSC MSC details. More...

#include "Msc/Std/IfxMsc.h"
Include dependency graph for IfxMsc_Msc.h:

Go to the source code of this file.

Data Structures

struct | IfxMsc_Msc_en
struct | IfxMsc_Msc_fcln
struct | IfxMsc_Msc_fclp
struct | IfxMsc_Msc_inj0
struct | IfxMsc_Msc_inj1
struct | IfxMsc_Msc_sdi
struct | IfxMsc_Msc_son
struct | IfxMsc_Msc_sop
struct | IfxMsc_Msc_Abra
ABRA block Configuration Structure. More...
struct | IfxMsc_Msc_Clock
Clock configuration data Structure. More...
struct | IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure. More...
struct | IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure. More...
struct | IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure. More...
struct | IfxMsc_Msc_Io
MSC Pin Configuration Structure. More...
struct | IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure. More...
struct | IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure. More...
struct | IfxMsc_Msc
MSC base address data Structure. More...
struct | IfxMsc_Msc_Config
MSC Module Configuration Structure. More...

Enumerations

enum IfxMsc_Msc_Target {
IfxMsc_Msc_Target_low = 0,
IfxMsc_Msc_Target_high = 1
}
Msc Instance Number. More...

Functions

IFX_EXTERN void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
IFX_EXTERN void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
IFX_EXTERN void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
IFX_EXTERN void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...
IFX_EXTERN void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
IFX_EXTERN void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
IFX_EXTERN void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
IFX_EXTERN void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
IFX_EXTERN uint32 | IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...
IFX_EXTERN IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
IFX_EXTERN void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
IFX_EXTERN void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...
IFX_INLINE void | IfxMsc_Msc_clearDataFrameInterrupt (IfxMsc_Msc *msc)
IFX_INLINE boolean | IfxMsc_Msc_getActiveDataFrameStatus (IfxMsc_Msc *msc)
IFX_INLINE boolean | IfxMsc_Msc_getDataFrameInterruptStatus (IfxMsc_Msc *msc)

Detailed Description

MSC MSC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMsc_Msc.h.

Function Documentation

◆ IfxMsc_Msc_clearDataFrameInterrupt()

IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
None

Definition at line 568 of file IfxMsc_Msc.h.

◆ IfxMsc_Msc_getActiveDataFrameStatus()

IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
status of the active data frame

Definition at line 574 of file IfxMsc_Msc.h.

◆ IfxMsc_Msc_getDataFrameInterruptStatus()

IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus ( IfxMsc_Msc * msc )
Parameters
msc pointer to the MSC module handle
Returns
status of the data frame interrupt

Definition at line 580 of file IfxMsc_Msc.h.


iLLD_TC26B: IfxMsc.h File Reference

  • Msc
  • Std
Enumerations | Functions
IfxMsc.h File Reference
iLLD » MSC

MSC basic functionality. More...

#include "_Impl/IfxMsc_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_PinMap/IfxMsc_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxMsc.h:

Go to the source code of this file.

Enumerations

enum IfxMsc_ActivePhaseSelection {
IfxMsc_ActivePhaseSelection_none = 0,
IfxMsc_ActivePhaseSelection_lowLevel = 1
}
Enable SRL/SRH Active Phase Selection Bit
Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL. More...
enum IfxMsc_AsynchronousBlock {
IfxMsc_AsynchronousBlock_bypassed = 0,
IfxMsc_AsynchronousBlock_noBypassed = 1
}
Asynchronous Block Configuration Register - Asynchronous Block Bypass
Definition in Ifx_MSC.ABC.B.ABB. More...
enum IfxMsc_ChipSelectActiveState {
IfxMsc_ChipSelectActiveState_high = 0,
IfxMsc_ChipSelectActiveState_low = 1
}
Output Control Register - Chip Selection Line Polarity
Definition in Ifx_MSC.OCR.B.CSLP. More...
enum IfxMsc_ClockSelect {
IfxMsc_ClockSelect_noClock = 0,
IfxMsc_ClockSelect_fspb = 1,
IfxMsc_ClockSelect_fsri = 2,
IfxMsc_ClockSelect_feray = 4
}
Asynchronous Block Configuration Register - Clock Select
Definition in Ifx_MSC.ABC.B.CLKSEL. More...
enum IfxMsc_CommandDataCommandRepetitionMode {
IfxMsc_CommandDataCommandRepetitionMode_disabled = 0,
IfxMsc_CommandDataCommandRepetitionMode_enabled = 1
}
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode
Definition in Ifx_MSC.DSCE.B.CDCM. More...
enum IfxMsc_CommandFrameInterrupt {
IfxMsc_CommandFrameInterrupt_disabled = 0,
IfxMsc_CommandFrameInterrupt_enabled = 1
}
Interrupt Control Register - Command Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.ECIE. More...
enum IfxMsc_CommandFrameInterruptNode {
IfxMsc_CommandFrameInterruptNode_SR0 = 0,
IfxMsc_CommandFrameInterruptNode_SR1,
IfxMsc_CommandFrameInterruptNode_SR2,
IfxMsc_CommandFrameInterruptNode_SR3
}
Interrupt Control Register - Command Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.ECIP. More...
enum IfxMsc_CommandFrameLength {
IfxMsc_CommandFrameLength_0 = 0,
IfxMsc_CommandFrameLength_1 = 1,
IfxMsc_CommandFrameLength_2 = 2,
IfxMsc_CommandFrameLength_3,
IfxMsc_CommandFrameLength_4,
IfxMsc_CommandFrameLength_5,
IfxMsc_CommandFrameLength_6,
IfxMsc_CommandFrameLength_7,
IfxMsc_CommandFrameLength_8,
IfxMsc_CommandFrameLength_9,
IfxMsc_CommandFrameLength_10,
IfxMsc_CommandFrameLength_11,
IfxMsc_CommandFrameLength_12,
IfxMsc_CommandFrameLength_13,
IfxMsc_CommandFrameLength_14,
IfxMsc_CommandFrameLength_15,
IfxMsc_CommandFrameLength_16,
IfxMsc_CommandFrameLength_17 = 17,
IfxMsc_CommandFrameLength_18 = 18,
IfxMsc_CommandFrameLength_19,
IfxMsc_CommandFrameLength_20,
IfxMsc_CommandFrameLength_21,
IfxMsc_CommandFrameLength_22,
IfxMsc_CommandFrameLength_23,
IfxMsc_CommandFrameLength_24,
IfxMsc_CommandFrameLength_25,
IfxMsc_CommandFrameLength_26,
IfxMsc_CommandFrameLength_27,
IfxMsc_CommandFrameLength_28,
IfxMsc_CommandFrameLength_29,
IfxMsc_CommandFrameLength_30,
IfxMsc_CommandFrameLength_31,
IfxMsc_CommandFrameLength_32
}
Number of Bits shifted at command frames
Definition in Ifx_MSC.DSC.B.NBC. More...
enum IfxMsc_ControlFrameExtensionPassivePhaseLength {
IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_ControlFrameExtensionPassivePhaseLength_1,
IfxMsc_ControlFrameExtensionPassivePhaseLength_2,
IfxMsc_ControlFrameExtensionPassivePhaseLength_3,
IfxMsc_ControlFrameExtensionPassivePhaseLength_4,
IfxMsc_ControlFrameExtensionPassivePhaseLength_5,
IfxMsc_ControlFrameExtensionPassivePhaseLength_6,
IfxMsc_ControlFrameExtensionPassivePhaseLength_7,
IfxMsc_ControlFrameExtensionPassivePhaseLength_8,
IfxMsc_ControlFrameExtensionPassivePhaseLength_9,
IfxMsc_ControlFrameExtensionPassivePhaseLength_10,
IfxMsc_ControlFrameExtensionPassivePhaseLength_11,
IfxMsc_ControlFrameExtensionPassivePhaseLength_12,
IfxMsc_ControlFrameExtensionPassivePhaseLength_13,
IfxMsc_ControlFrameExtensionPassivePhaseLength_14,
IfxMsc_ControlFrameExtensionPassivePhaseLength_15,
IfxMsc_ControlFrameExtensionPassivePhaseLength_16,
IfxMsc_ControlFrameExtensionPassivePhaseLength_17,
IfxMsc_ControlFrameExtensionPassivePhaseLength_18,
IfxMsc_ControlFrameExtensionPassivePhaseLength_19,
IfxMsc_ControlFrameExtensionPassivePhaseLength_20,
IfxMsc_ControlFrameExtensionPassivePhaseLength_21,
IfxMsc_ControlFrameExtensionPassivePhaseLength_22,
IfxMsc_ControlFrameExtensionPassivePhaseLength_23,
IfxMsc_ControlFrameExtensionPassivePhaseLength_24,
IfxMsc_ControlFrameExtensionPassivePhaseLength_25,
IfxMsc_ControlFrameExtensionPassivePhaseLength_26,
IfxMsc_ControlFrameExtensionPassivePhaseLength_27,
IfxMsc_ControlFrameExtensionPassivePhaseLength_28,
IfxMsc_ControlFrameExtensionPassivePhaseLength_29,
IfxMsc_ControlFrameExtensionPassivePhaseLength_30,
IfxMsc_ControlFrameExtensionPassivePhaseLength_31,
IfxMsc_ControlFrameExtensionPassivePhaseLength_32,
IfxMsc_ControlFrameExtensionPassivePhaseLength_33,
IfxMsc_ControlFrameExtensionPassivePhaseLength_34,
IfxMsc_ControlFrameExtensionPassivePhaseLength_35,
IfxMsc_ControlFrameExtensionPassivePhaseLength_36,
IfxMsc_ControlFrameExtensionPassivePhaseLength_37,
IfxMsc_ControlFrameExtensionPassivePhaseLength_38,
IfxMsc_ControlFrameExtensionPassivePhaseLength_39,
IfxMsc_ControlFrameExtensionPassivePhaseLength_40,
IfxMsc_ControlFrameExtensionPassivePhaseLength_41,
IfxMsc_ControlFrameExtensionPassivePhaseLength_42,
IfxMsc_ControlFrameExtensionPassivePhaseLength_43,
IfxMsc_ControlFrameExtensionPassivePhaseLength_44,
IfxMsc_ControlFrameExtensionPassivePhaseLength_45,
IfxMsc_ControlFrameExtensionPassivePhaseLength_46,
IfxMsc_ControlFrameExtensionPassivePhaseLength_47,
IfxMsc_ControlFrameExtensionPassivePhaseLength_48,
IfxMsc_ControlFrameExtensionPassivePhaseLength_49,
IfxMsc_ControlFrameExtensionPassivePhaseLength_50,
IfxMsc_ControlFrameExtensionPassivePhaseLength_51,
IfxMsc_ControlFrameExtensionPassivePhaseLength_52,
IfxMsc_ControlFrameExtensionPassivePhaseLength_53,
IfxMsc_ControlFrameExtensionPassivePhaseLength_54,
IfxMsc_ControlFrameExtensionPassivePhaseLength_55,
IfxMsc_ControlFrameExtensionPassivePhaseLength_56,
IfxMsc_ControlFrameExtensionPassivePhaseLength_57,
IfxMsc_ControlFrameExtensionPassivePhaseLength_58,
IfxMsc_ControlFrameExtensionPassivePhaseLength_59,
IfxMsc_ControlFrameExtensionPassivePhaseLength_60,
IfxMsc_ControlFrameExtensionPassivePhaseLength_61,
IfxMsc_ControlFrameExtensionPassivePhaseLength_62,
IfxMsc_ControlFrameExtensionPassivePhaseLength_63,
IfxMsc_ControlFrameExtensionPassivePhaseLength_64,
IfxMsc_ControlFrameExtensionPassivePhaseLength_65,
IfxMsc_ControlFrameExtensionPassivePhaseLength_66,
IfxMsc_ControlFrameExtensionPassivePhaseLength_67,
IfxMsc_ControlFrameExtensionPassivePhaseLength_68,
IfxMsc_ControlFrameExtensionPassivePhaseLength_69,
IfxMsc_ControlFrameExtensionPassivePhaseLength_70,
IfxMsc_ControlFrameExtensionPassivePhaseLength_71,
IfxMsc_ControlFrameExtensionPassivePhaseLength_72,
IfxMsc_ControlFrameExtensionPassivePhaseLength_73,
IfxMsc_ControlFrameExtensionPassivePhaseLength_74,
IfxMsc_ControlFrameExtensionPassivePhaseLength_75,
IfxMsc_ControlFrameExtensionPassivePhaseLength_76,
IfxMsc_ControlFrameExtensionPassivePhaseLength_77,
IfxMsc_ControlFrameExtensionPassivePhaseLength_78,
IfxMsc_ControlFrameExtensionPassivePhaseLength_79,
IfxMsc_ControlFrameExtensionPassivePhaseLength_80,
IfxMsc_ControlFrameExtensionPassivePhaseLength_81,
IfxMsc_ControlFrameExtensionPassivePhaseLength_82,
IfxMsc_ControlFrameExtensionPassivePhaseLength_83,
IfxMsc_ControlFrameExtensionPassivePhaseLength_84,
IfxMsc_ControlFrameExtensionPassivePhaseLength_85,
IfxMsc_ControlFrameExtensionPassivePhaseLength_86,
IfxMsc_ControlFrameExtensionPassivePhaseLength_87,
IfxMsc_ControlFrameExtensionPassivePhaseLength_88,
IfxMsc_ControlFrameExtensionPassivePhaseLength_89,
IfxMsc_ControlFrameExtensionPassivePhaseLength_90,
IfxMsc_ControlFrameExtensionPassivePhaseLength_91,
IfxMsc_ControlFrameExtensionPassivePhaseLength_92,
IfxMsc_ControlFrameExtensionPassivePhaseLength_93,
IfxMsc_ControlFrameExtensionPassivePhaseLength_94,
IfxMsc_ControlFrameExtensionPassivePhaseLength_95,
IfxMsc_ControlFrameExtensionPassivePhaseLength_96,
IfxMsc_ControlFrameExtensionPassivePhaseLength_97,
IfxMsc_ControlFrameExtensionPassivePhaseLength_98,
IfxMsc_ControlFrameExtensionPassivePhaseLength_99,
IfxMsc_ControlFrameExtensionPassivePhaseLength_100,
IfxMsc_ControlFrameExtensionPassivePhaseLength_101,
IfxMsc_ControlFrameExtensionPassivePhaseLength_102,
IfxMsc_ControlFrameExtensionPassivePhaseLength_103,
IfxMsc_ControlFrameExtensionPassivePhaseLength_104,
IfxMsc_ControlFrameExtensionPassivePhaseLength_105,
IfxMsc_ControlFrameExtensionPassivePhaseLength_106,
IfxMsc_ControlFrameExtensionPassivePhaseLength_107,
IfxMsc_ControlFrameExtensionPassivePhaseLength_108,
IfxMsc_ControlFrameExtensionPassivePhaseLength_109,
IfxMsc_ControlFrameExtensionPassivePhaseLength_110,
IfxMsc_ControlFrameExtensionPassivePhaseLength_111,
IfxMsc_ControlFrameExtensionPassivePhaseLength_112,
IfxMsc_ControlFrameExtensionPassivePhaseLength_113,
IfxMsc_ControlFrameExtensionPassivePhaseLength_114,
IfxMsc_ControlFrameExtensionPassivePhaseLength_115,
IfxMsc_ControlFrameExtensionPassivePhaseLength_116,
IfxMsc_ControlFrameExtensionPassivePhaseLength_117,
IfxMsc_ControlFrameExtensionPassivePhaseLength_118,
IfxMsc_ControlFrameExtensionPassivePhaseLength_119,
IfxMsc_ControlFrameExtensionPassivePhaseLength_120,
IfxMsc_ControlFrameExtensionPassivePhaseLength_121,
IfxMsc_ControlFrameExtensionPassivePhaseLength_122,
IfxMsc_ControlFrameExtensionPassivePhaseLength_123,
IfxMsc_ControlFrameExtensionPassivePhaseLength_124,
IfxMsc_ControlFrameExtensionPassivePhaseLength_125,
IfxMsc_ControlFrameExtensionPassivePhaseLength_126,
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
}
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension
Definition in Ifx_MSC.DSTE.B.PPCE. More...
enum IfxMsc_DataFrameExtensionPassivePhaseLength {
IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0,
IfxMsc_DataFrameExtensionPassivePhaseLength_1,
IfxMsc_DataFrameExtensionPassivePhaseLength_2,
IfxMsc_DataFrameExtensionPassivePhaseLength_3
}
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension
Definition in Ifx_MSC.DSTE.B.PPDE. More...
enum IfxMsc_DataFrameInterrupt {
IfxMsc_DataFrameInterrupt_disabled = 0,
IfxMsc_DataFrameInterrupt_atLastDataBit = 1,
IfxMsc_DataFrameInterrupt_atFirstDataBit = 2
}
Interrupt Control Register - Data Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.EDIE. More...
enum IfxMsc_DataFrameInterruptNode {
IfxMsc_DataFrameInterruptNode_SR0 = 0,
IfxMsc_DataFrameInterruptNode_SR1,
IfxMsc_DataFrameInterruptNode_SR2,
IfxMsc_DataFrameInterruptNode_SR3
}
Interrupt Control Register - Data Frame Interrupt Node Pointer
Definition in Ifx_MSC.ICR.B.EDIP. More...
enum IfxMsc_DataFrameLength {
IfxMsc_DataFrameLength_0 = 0,
IfxMsc_DataFrameLength_1 = 1,
IfxMsc_DataFrameLength_2 = 2,
IfxMsc_DataFrameLength_3,
IfxMsc_DataFrameLength_4,
IfxMsc_DataFrameLength_5,
IfxMsc_DataFrameLength_6,
IfxMsc_DataFrameLength_7,
IfxMsc_DataFrameLength_8,
IfxMsc_DataFrameLength_9,
IfxMsc_DataFrameLength_10,
IfxMsc_DataFrameLength_11,
IfxMsc_DataFrameLength_12,
IfxMsc_DataFrameLength_13,
IfxMsc_DataFrameLength_14,
IfxMsc_DataFrameLength_15,
IfxMsc_DataFrameLength_16
}
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames
Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL. More...
enum IfxMsc_DataFramePassivePhaseLength {
IfxMsc_DataFramePassivePhaseLength_2 = 2,
IfxMsc_DataFramePassivePhaseLength_3,
IfxMsc_DataFramePassivePhaseLength_4,
IfxMsc_DataFramePassivePhaseLength_5,
IfxMsc_DataFramePassivePhaseLength_6,
IfxMsc_DataFramePassivePhaseLength_7,
IfxMsc_DataFramePassivePhaseLength_8,
IfxMsc_DataFramePassivePhaseLength_9,
IfxMsc_DataFramePassivePhaseLength_10,
IfxMsc_DataFramePassivePhaseLength_11,
IfxMsc_DataFramePassivePhaseLength_12,
IfxMsc_DataFramePassivePhaseLength_13,
IfxMsc_DataFramePassivePhaseLength_14,
IfxMsc_DataFramePassivePhaseLength_15,
IfxMsc_DataFramePassivePhaseLength_16,
IfxMsc_DataFramePassivePhaseLength_17,
IfxMsc_DataFramePassivePhaseLength_18,
IfxMsc_DataFramePassivePhaseLength_19,
IfxMsc_DataFramePassivePhaseLength_20,
IfxMsc_DataFramePassivePhaseLength_21,
IfxMsc_DataFramePassivePhaseLength_22,
IfxMsc_DataFramePassivePhaseLength_23,
IfxMsc_DataFramePassivePhaseLength_24,
IfxMsc_DataFramePassivePhaseLength_25,
IfxMsc_DataFramePassivePhaseLength_26,
IfxMsc_DataFramePassivePhaseLength_27,
IfxMsc_DataFramePassivePhaseLength_28,
IfxMsc_DataFramePassivePhaseLength_29,
IfxMsc_DataFramePassivePhaseLength_30,
IfxMsc_DataFramePassivePhaseLength_31,
IfxMsc_DataFramePassivePhaseLength_32
}
Passive Phase Length at Data Frames
Definition in Ifx_MSC.DSC.B.PPD. More...
enum IfxMsc_DividerMode {
IfxMsc_DividerMode_normal = 1,
IfxMsc_DividerMode_fractional = 2
}
Divider mode. More...
enum IfxMsc_EmergencyStop {
IfxMsc_EmergencyStop_disabled = 0,
IfxMsc_EmergencyStop_enabled = 1
}
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH
Definition in Ifx_MSC.ESR. More...
enum IfxMsc_Extension {
IfxMsc_Extension_disabled = 0,
IfxMsc_Extension_enabled = 1
}
Downstream Control Enhanced Register - Extension Enable
Definition in Ifx_MSC.DSCE.B.NDBLE. More...
enum IfxMsc_ExternalBitInjectionPosition {
IfxMsc_ExternalBitInjectionPosition_0 = 0,
IfxMsc_ExternalBitInjectionPosition_1,
IfxMsc_ExternalBitInjectionPosition_2,
IfxMsc_ExternalBitInjectionPosition_3,
IfxMsc_ExternalBitInjectionPosition_4,
IfxMsc_ExternalBitInjectionPosition_5,
IfxMsc_ExternalBitInjectionPosition_6,
IfxMsc_ExternalBitInjectionPosition_7,
IfxMsc_ExternalBitInjectionPosition_8,
IfxMsc_ExternalBitInjectionPosition_9,
IfxMsc_ExternalBitInjectionPosition_10,
IfxMsc_ExternalBitInjectionPosition_11,
IfxMsc_ExternalBitInjectionPosition_12,
IfxMsc_ExternalBitInjectionPosition_13,
IfxMsc_ExternalBitInjectionPosition_14,
IfxMsc_ExternalBitInjectionPosition_15,
IfxMsc_ExternalBitInjectionPosition_16,
IfxMsc_ExternalBitInjectionPosition_17,
IfxMsc_ExternalBitInjectionPosition_18,
IfxMsc_ExternalBitInjectionPosition_19,
IfxMsc_ExternalBitInjectionPosition_20,
IfxMsc_ExternalBitInjectionPosition_21,
IfxMsc_ExternalBitInjectionPosition_22,
IfxMsc_ExternalBitInjectionPosition_23,
IfxMsc_ExternalBitInjectionPosition_24,
IfxMsc_ExternalBitInjectionPosition_25,
IfxMsc_ExternalBitInjectionPosition_26,
IfxMsc_ExternalBitInjectionPosition_27,
IfxMsc_ExternalBitInjectionPosition_28,
IfxMsc_ExternalBitInjectionPosition_29,
IfxMsc_ExternalBitInjectionPosition_30,
IfxMsc_ExternalBitInjectionPosition_31,
IfxMsc_ExternalBitInjectionPosition_32,
IfxMsc_ExternalBitInjectionPosition_33,
IfxMsc_ExternalBitInjectionPosition_34,
IfxMsc_ExternalBitInjectionPosition_35,
IfxMsc_ExternalBitInjectionPosition_36,
IfxMsc_ExternalBitInjectionPosition_37,
IfxMsc_ExternalBitInjectionPosition_38,
IfxMsc_ExternalBitInjectionPosition_39,
IfxMsc_ExternalBitInjectionPosition_40,
IfxMsc_ExternalBitInjectionPosition_41,
IfxMsc_ExternalBitInjectionPosition_42,
IfxMsc_ExternalBitInjectionPosition_43,
IfxMsc_ExternalBitInjectionPosition_44,
IfxMsc_ExternalBitInjectionPosition_45,
IfxMsc_ExternalBitInjectionPosition_46,
IfxMsc_ExternalBitInjectionPosition_47,
IfxMsc_ExternalBitInjectionPosition_48,
IfxMsc_ExternalBitInjectionPosition_49,
IfxMsc_ExternalBitInjectionPosition_50,
IfxMsc_ExternalBitInjectionPosition_51,
IfxMsc_ExternalBitInjectionPosition_52,
IfxMsc_ExternalBitInjectionPosition_53,
IfxMsc_ExternalBitInjectionPosition_54,
IfxMsc_ExternalBitInjectionPosition_55,
IfxMsc_ExternalBitInjectionPosition_56,
IfxMsc_ExternalBitInjectionPosition_57,
IfxMsc_ExternalBitInjectionPosition_58,
IfxMsc_ExternalBitInjectionPosition_59,
IfxMsc_ExternalBitInjectionPosition_60,
IfxMsc_ExternalBitInjectionPosition_61,
IfxMsc_ExternalBitInjectionPosition_62,
IfxMsc_ExternalBitInjectionPosition_63
}
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1. More...
enum IfxMsc_ExternalSignalInjection {
IfxMsc_ExternalSignalInjection_disabled = 0,
IfxMsc_ExternalSignalInjection_enabled = 1
}
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal
Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1. More...
enum IfxMsc_FclClockControlEnabled {
IfxMsc_FclClockControlEnabled_activePhaseOnly = 0,
IfxMsc_FclClockControlEnabled_always = 1
}
Output Control Register - Clock Control
Definition in Ifx_MSC.OCR.B.CLKCTRL. More...
enum IfxMsc_FclLinePolarity {
IfxMsc_FclLinePolarity_nonInverted = 0,
IfxMsc_FclLinePolarity_inverted = 1
}
Output Control Register - FCLP Line Polarity
Definition in Ifx_MSC.OCR.B.CLP. More...
enum IfxMsc_HardwareClock {
IfxMsc_HardwareClock_disabled = 0,
IfxMsc_HardwareClock_enabled = 1
}
Enable hardware clock control. More...
enum IfxMsc_InterruptServiceRequest {
IfxMsc_InterruptServiceRequest_0 = 0,
IfxMsc_InterruptServiceRequest_1,
IfxMsc_InterruptServiceRequest_2,
IfxMsc_InterruptServiceRequest_3,
IfxMsc_InterruptServiceRequest_4
}
Interrupt Service Request. More...
enum IfxMsc_ModuleSuspendRequestBit {
IfxMsc_ModuleSuspendRequestBit_noSuspend = 0,
IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1,
IfxMsc_ModuleSuspendRequestBit_softSuspend = 2
}
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS. More...
enum IfxMsc_MsbBitDataExtension {
IfxMsc_MsbBitDataExtension_notPresent = 0,
IfxMsc_MsbBitDataExtension_present = 1
}
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)
Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE. More...
enum IfxMsc_NDividerAbra {
IfxMsc_NDividerAbra_1 = 0,
IfxMsc_NDividerAbra_2,
IfxMsc_NDividerAbra_3,
IfxMsc_NDividerAbra_4,
IfxMsc_NDividerAbra_5,
IfxMsc_NDividerAbra_6,
IfxMsc_NDividerAbra_7,
IfxMsc_NDividerAbra_8
}
Asynchronous Block Configuration Register - N Divider ABRA
Definition in Ifx_MSC.ABC.B.NDA. More...
enum IfxMsc_NDividerDownstream {
IfxMsc_NDividerDownstream_1 = 0,
IfxMsc_NDividerDownstream_2,
IfxMsc_NDividerDownstream_3,
IfxMsc_NDividerDownstream_4,
IfxMsc_NDividerDownstream_5,
IfxMsc_NDividerDownstream_6,
IfxMsc_NDividerDownstream_7,
IfxMsc_NDividerDownstream_8,
IfxMsc_NDividerDownstream_9,
IfxMsc_NDividerDownstream_10,
IfxMsc_NDividerDownstream_11,
IfxMsc_NDividerDownstream_12,
IfxMsc_NDividerDownstream_13,
IfxMsc_NDividerDownstream_14,
IfxMsc_NDividerDownstream_15,
IfxMsc_NDividerDownstream_16
}
Downstream Timing Extension Register - N Divider Downstream
Definition in Ifx_MSC.DSTE.B.NDD. More...
enum IfxMsc_OverflowInterrupt {
IfxMsc_OverflowInterrupt_disabled = 0,
IfxMsc_OverflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Overflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.OIE. More...
enum IfxMsc_OverflowInterruptNode {
IfxMsc_OverflowInterruptNode_SR0 = 0,
IfxMsc_OverflowInterruptNode_SR1,
IfxMsc_OverflowInterruptNode_SR2,
IfxMsc_OverflowInterruptNode_SR3,
IfxMsc_OverflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.OIP. More...
enum IfxMsc_Parity {
IfxMsc_Parity_even = 0,
IfxMsc_Parity_odd = 1
}
Parity Mode
Definition in Ifx_MSC.USR.B.PCT. More...
enum IfxMsc_PassiveTimeFrameCount {
IfxMsc_PassiveTimeFrameCount_0 = 0,
IfxMsc_PassiveTimeFrameCount_1 = 1,
IfxMsc_PassiveTimeFrameCount_2,
IfxMsc_PassiveTimeFrameCount_3,
IfxMsc_PassiveTimeFrameCount_4,
IfxMsc_PassiveTimeFrameCount_5,
IfxMsc_PassiveTimeFrameCount_6,
IfxMsc_PassiveTimeFrameCount_7,
IfxMsc_PassiveTimeFrameCount_8,
IfxMsc_PassiveTimeFrameCount_9,
IfxMsc_PassiveTimeFrameCount_10,
IfxMsc_PassiveTimeFrameCount_11,
IfxMsc_PassiveTimeFrameCount_12,
IfxMsc_PassiveTimeFrameCount_13,
IfxMsc_PassiveTimeFrameCount_14,
IfxMsc_PassiveTimeFrameCount_15
}
Downstream Status Register - Number Of Passive Time Frames
Definition in Ifx_MSC.DSS.B.NPTF. More...
enum IfxMsc_ReceiveDataInterrupt {
IfxMsc_ReceiveDataInterrupt_disabled = 0,
IfxMsc_ReceiveDataInterrupt_onDataReceive = 1,
IfxMsc_ReceiveDataInterrupt_onRdieSet = 2,
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3
}
Interrupt Control Register - Receive Data Interrupt Enable
Definition in Ifx_MSC.ICR.B.RDIE. More...
enum IfxMsc_ReceiveDataInterruptNode {
IfxMsc_ReceiveDataInterruptNode_SR0 = 0,
IfxMsc_ReceiveDataInterruptNode_SR1,
IfxMsc_ReceiveDataInterruptNode_SR2,
IfxMsc_ReceiveDataInterruptNode_SR3
}
Interrupt Control Register - Receive Data Interrupt Pointer
Definition in Ifx_MSC.ICR.B.RDIP. More...
enum IfxMsc_SdiLinePolarity {
IfxMsc_SdiLinePolarity_likeSi = 0,
IfxMsc_SdiLinePolarity_invertedSi = 1
}
Output Control Register - SDI Line Polarity
Definition in Ifx_MSC.OCR.B.ILP. More...
enum IfxMsc_SerialDataInput {
IfxMsc_SerialDataInput_0 = 0,
IfxMsc_SerialDataInput_1,
IfxMsc_SerialDataInput_2,
IfxMsc_SerialDataInput_3,
IfxMsc_SerialDataInput_4,
IfxMsc_SerialDataInput_5,
IfxMsc_SerialDataInput_6,
IfxMsc_SerialDataInput_7
}
Output Control Register - Serial Data Input Selection
Definition in Ifx_MSC.OCR.B.SDISEL. More...
enum IfxMsc_ServiceRequestDelay {
IfxMsc_ServiceRequestDelay_noDelay = 0,
IfxMsc_ServiceRequestDelay_1bit = 1
}
Service Request Delay
Definition in Ifx_MSC.USR.B.SRDC. More...
enum IfxMsc_ShiftClockPhaseDuration {
IfxMsc_ShiftClockPhaseDuration_1 = 0,
IfxMsc_ShiftClockPhaseDuration_2,
IfxMsc_ShiftClockPhaseDuration_3,
IfxMsc_ShiftClockPhaseDuration_4,
IfxMsc_ShiftClockPhaseDuration_5,
IfxMsc_ShiftClockPhaseDuration_6,
IfxMsc_ShiftClockPhaseDuration_7,
IfxMsc_ShiftClockPhaseDuration_8,
IfxMsc_ShiftClockPhaseDuration_9,
IfxMsc_ShiftClockPhaseDuration_10,
IfxMsc_ShiftClockPhaseDuration_11,
IfxMsc_ShiftClockPhaseDuration_12,
IfxMsc_ShiftClockPhaseDuration_13,
IfxMsc_ShiftClockPhaseDuration_14,
IfxMsc_ShiftClockPhaseDuration_15,
IfxMsc_ShiftClockPhaseDuration_16
}
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock
Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH. More...
enum IfxMsc_SleepMode {
IfxMsc_SleepMode_enable = 0,
IfxMsc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_MSC.CLC.B.EDIS. More...
enum IfxMsc_SoLinePolarity {
IfxMsc_SoLinePolarity_nonInverted = 0,
IfxMsc_SoLinePolarity_inverted = 1
}
Output Control Register - SOP Line Polarity
Definition in Ifx_MSC.OCR.B.SLP. More...
enum IfxMsc_Source {
IfxMsc_Source_downstreamDataRegister = 0,
IfxMsc_Source_alternateInputLine = 2,
IfxMsc_Source_alternateInputLineInverted = 3
}
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames
Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH. More...
enum IfxMsc_SuspendMode {
IfxMsc_SuspendMode_none = 0,
IfxMsc_SuspendMode_hard = 1,
IfxMsc_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxMsc_Target {
IfxMsc_Target_en0 = 0,
IfxMsc_Target_en1,
IfxMsc_Target_en2,
IfxMsc_Target_en3
}
Msc Targets - use as chip enable selection for ENH, ENL and ENC. More...
enum IfxMsc_TimeFrameInterrupt {
IfxMsc_TimeFrameInterrupt_disabled = 0,
IfxMsc_TimeFrameInterrupt_enabled = 1
}
Interrupt Control Register - Time Frame Interrupt Enable
Definition in Ifx_MSC.ICR.B.TFIE. More...
enum IfxMsc_TimeFrameInterruptNode {
IfxMsc_TimeFrameInterruptNode_SR0 = 0,
IfxMsc_TimeFrameInterruptNode_SR1,
IfxMsc_TimeFrameInterruptNode_SR2,
IfxMsc_TimeFrameInterruptNode_SR3
}
Interrupt Control Register - Time Frame Interrupt Pointer
Definition in Ifx_MSC.ICR.B.TFIP. More...
enum IfxMsc_TransmissionMode {
IfxMsc_TransmissionMode_triggered = 0,
IfxMsc_TransmissionMode_dataRepetition = 1
}
Downstream Channel Transmission Mode
Definition in Ifx_MSC.DSC.B.TM. More...
enum IfxMsc_UnderflowInterrupt {
IfxMsc_UnderflowInterrupt_disabled = 0,
IfxMsc_UnderflowInterrupt_enabled = 1
}
Asynchronous Block Configuration Register - Underflow Interrupt Enable
Definition in Ifx_MSC.ABC.B.UIE. More...
enum IfxMsc_UnderflowInterruptNode {
IfxMsc_UnderflowInterruptNode_SR0 = 0,
IfxMsc_UnderflowInterruptNode_SR1,
IfxMsc_UnderflowInterruptNode_SR2,
IfxMsc_UnderflowInterruptNode_SR3,
IfxMsc_UnderflowInterruptNode_SR4
}
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer
Definition in Ifx_MSC.ABC.B.UIP. More...
enum IfxMsc_UpstreamChannelFrameType {
IfxMsc_UpstreamChannelFrameType_12bit = 0,
IfxMsc_UpstreamChannelFrameType_16bit = 1
}
Channel Frame Type
Definition in Ifx_MSC.USR.B.UFT. More...
enum IfxMsc_UpstreamChannelReceivingRate {
IfxMsc_UpstreamChannelReceivingRate_disabled = 0,
IfxMsc_UpstreamChannelReceivingRate_4 = 1,
IfxMsc_UpstreamChannelReceivingRate_8 = 2,
IfxMsc_UpstreamChannelReceivingRate_16 = 3,
IfxMsc_UpstreamChannelReceivingRate_32 = 4,
IfxMsc_UpstreamChannelReceivingRate_64 = 5,
IfxMsc_UpstreamChannelReceivingRate_128 = 6,
IfxMsc_UpstreamChannelReceivingRate_256 = 7
}
Upstream Receiving Rate
Definition in Ifx_MSC.USR.B.URR. More...
enum IfxMsc_UpstreamTimeoutInterrupt {
IfxMsc_UpstreamTimeoutInterrupt_disabled = 0,
IfxMsc_UpstreamTimeoutInterrupt_enabled = 1
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable
Definition in Ifx_MSC.USCE.B.USTOEN. More...
enum IfxMsc_UpstreamTimeoutInterruptNode {
IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0,
IfxMsc_UpstreamTimeoutInterruptNode_SR1,
IfxMsc_UpstreamTimeoutInterruptNode_SR2,
IfxMsc_UpstreamTimeoutInterruptNode_SR3,
IfxMsc_UpstreamTimeoutInterruptNode_SR4
}
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer
Definition in Ifx_MSC.USCE.B.USTOIP. More...
enum IfxMsc_UpstreamTimeoutPrescaler {
IfxMsc_UpstreamTimeoutPrescaler_1 = 0,
IfxMsc_UpstreamTimeoutPrescaler_2 = 1,
IfxMsc_UpstreamTimeoutPrescaler_4 = 2,
IfxMsc_UpstreamTimeoutPrescaler_8 = 3,
IfxMsc_UpstreamTimeoutPrescaler_16 = 4,
IfxMsc_UpstreamTimeoutPrescaler_32 = 5,
IfxMsc_UpstreamTimeoutPrescaler_64 = 6,
IfxMsc_UpstreamTimeoutPrescaler_128 = 7,
IfxMsc_UpstreamTimeoutPrescaler_256 = 8,
IfxMsc_UpstreamTimeoutPrescaler_512 = 9,
IfxMsc_UpstreamTimeoutPrescaler_1024 = 10,
IfxMsc_UpstreamTimeoutPrescaler_2048 = 11,
IfxMsc_UpstreamTimeoutPrescaler_4096 = 12,
IfxMsc_UpstreamTimeoutPrescaler_8192 = 13,
IfxMsc_UpstreamTimeoutPrescaler_16384 = 14,
IfxMsc_UpstreamTimeoutPrescaler_32768 = 15
}
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler
Definition in Ifx_MSC.USCE.B.USTOPRE. More...
enum IfxMsc_UpstreamTimeoutValue {
IfxMsc_UpstreamTimeoutValue_1 = 0,
IfxMsc_UpstreamTimeoutValue_2,
IfxMsc_UpstreamTimeoutValue_3,
IfxMsc_UpstreamTimeoutValue_4,
IfxMsc_UpstreamTimeoutValue_5,
IfxMsc_UpstreamTimeoutValue_6,
IfxMsc_UpstreamTimeoutValue_7,
IfxMsc_UpstreamTimeoutValue_8,
IfxMsc_UpstreamTimeoutValue_9,
IfxMsc_UpstreamTimeoutValue_10,
IfxMsc_UpstreamTimeoutValue_11,
IfxMsc_UpstreamTimeoutValue_12,
IfxMsc_UpstreamTimeoutValue_13,
IfxMsc_UpstreamTimeoutValue_14,
IfxMsc_UpstreamTimeoutValue_15,
IfxMsc_UpstreamTimeoutValue_16
}
Upstream Control Enhanced Register 1 - Upstream Timeout Value
Definition in Ifx_MSC.USCE.B.USTOVAL. More...

Functions

IFX_INLINE void | IfxMsc_clearAbraOverflowFlag (Ifx_MSC *msc)
Clear ABRA overflow flag. More...
IFX_INLINE void | IfxMsc_clearAbraUnderflowFlag (Ifx_MSC *msc)
Clear ABRA underflow flag. More...
IFX_INLINE void | IfxMsc_clearUpstreamTimeout (Ifx_MSC *msc)
Clear Upstream timeout. More...
IFX_INLINE void | IfxMsc_clearUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag. More...
IFX_INLINE boolean | IfxMsc_getUpstreamValidFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag. More...
IFX_INLINE void | IfxMsc_setCommandTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase. More...
IFX_INLINE void | IfxMsc_setDataHighTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase. More...
IFX_INLINE void | IfxMsc_setDataLowTarget (Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase. More...
IFX_INLINE uint16 | IfxMsc_getData (Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataHighTarget (Ifx_MSC *msc)
Get the selected target during high phase. More...
IFX_INLINE IfxMsc_Target | IfxMsc_getDataLowTarget (Ifx_MSC *msc)
Get the selected target during low phase. More...
IFX_EXTERN void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
IFX_EXTERN void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...
IFX_EXTERN void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
IFX_EXTERN void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...
IFX_EXTERN uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
IFX_EXTERN uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
IFX_EXTERN uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...
IFX_INLINE void | IfxMsc_initEnPin (const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output. More...
IFX_INLINE void | IfxMsc_initFclnPin (const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output. More...
IFX_INLINE void | IfxMsc_initFclpPin (const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output. More...
IFX_INLINE void | IfxMsc_initInjPin (const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input. More...
IFX_INLINE void | IfxMsc_initSdiPin (const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input. More...
IFX_INLINE void | IfxMsc_initSonPin (const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output. More...
IFX_INLINE void | IfxMsc_initSopPin (const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output. More...
IFX_EXTERN Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
IFX_EXTERN IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...
IFX_INLINE void | IfxMsc_clearRecieveDataInterruptFlag (Ifx_MSC *msc)
Clears The Recieve Data Interrupt Flag. More...
IFX_INLINE void | IfxMsc_clearValidbit (Ifx_MSC *msc, uint8 upstreamIdx)
Clears the Valid bit. More...
IFX_INLINE void | IfxMsc_disableUpstreamTimeoutInterrupt (Ifx_MSC *msc)
Disables the Upstream Timeout Interrupt. More...
IFX_INLINE void | IfxMsc_enableUpstreamTimeoutInterrupt (Ifx_MSC *msc)
Enables the Upstream Timeout Interrupt. More...
IFX_INLINE boolean | IfxMsc_getAsyncClockBypass (Ifx_MSC *msc)
Returns the value of Asynchronous clock Bypass bit. More...
IFX_INLINE boolean | IfxMsc_getDownStreamExtension (Ifx_MSC *msc)
Returns the value of Down stream extension enable bit. More...
IFX_INLINE boolean | IfxMsc_getRecieveDataInterruptFlag (Ifx_MSC *msc)
Returns the Recieve DataInterrupt Flag Status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxMsc_getSrcPointer (Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
Returns the Src pointer for the selected MSC interrupt node. More...
IFX_INLINE uint32 | IfxMsc_getUpstreamData (Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Data. More...
IFX_INLINE boolean | IfxMsc_getUpstreamParityErrorFlag (Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Parity Error Flag Status. More...
IFX_INLINE boolean | IfxMsc_getUpstreamTimeoutFlag (Ifx_MSC *msc)
Returns Upstream Timeout Flag Status. More...
IFX_INLINE boolean | IfxMsc_isModuleSuspended (Ifx_MSC *msc)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxMsc_setAsyncClockBypass (Ifx_MSC *msc, boolean value)
Set or reset the Asynchronous clock bypass bit. More...
IFX_INLINE void | IfxMsc_setDownStreamData (Ifx_MSC *msc, uint32 data)
Sets the Down stream data. More...
IFX_INLINE void | IfxMsc_setDownStreamExtension (Ifx_MSC *msc, boolean value)
Set or reset the Down stream extension enable bit. More...
IFX_INLINE void | IfxMsc_setDownStreamExtensionData (Ifx_MSC *msc, uint32 data)
Sets the Down stream Extension data. More...
IFX_INLINE void | IfxMsc_setFractionalDividerStep (Ifx_MSC *msc, uint16 value)
Sets The Fractional Divider Step. More...
IFX_INLINE void | IfxMsc_setNdividerDownstream (Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
Set the required N divider downstream value. More...
IFX_INLINE void | IfxMsc_setSerialDataInputSelect (Ifx_MSC *msc, IfxMsc_SerialDataInput select)
Sets The Serial Data Input Select. More...
IFX_INLINE void | IfxMsc_setSleepMode (Ifx_MSC *msc, IfxMsc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxMsc_setSuspendMode (Ifx_MSC *msc, IfxMsc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_INLINE void | IfxMsc_setTransmissionMode (Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
Sets the Transmission Mode. More...
IFX_INLINE void | IfxMsc_setUpstreamChannelRecieveRate (Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
Sets The Upstream Channel Recieve Rate. More...
IFX_INLINE void | IfxMsc_setUpstreamTimeout (Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
Sets The Upstream Timeout. More...
IFX_INLINE void | IfxMsc_setUpstreamTimeoutPrescalar (Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
Sets The Upstream Timeout Prescalar. More...
IFX_EXTERN void | IfxMsc_clearDataFrameInterruptFlag (Ifx_MSC *msc)
clear data frame interrupt flag More...
IFX_EXTERN uint64 | IfxMsc_downstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream. More...
IFX_EXTERN uint32 | IfxMsc_downstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream. More...
IFX_EXTERN boolean | IfxMsc_getActiveDataFrameStatus (Ifx_MSC *msc)
get the status of the active data frame More...
IFX_EXTERN boolean | IfxMsc_getDataFrameInterruptFlag (Ifx_MSC *msc)
get the status of the data frame interrupt flag More...

Detailed Description

MSC basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMsc.h.

Function Documentation

◆ IfxMsc_clearDataFrameInterruptFlag()

IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag ( Ifx_MSC * msc )

clear data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 35 of file IfxMsc.c.

Referenced by IfxMsc_Msc_clearDataFrameInterrupt().

◆ IfxMsc_clearRecieveDataInterruptFlag()

IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag ( Ifx_MSC * msc )

Clears The Recieve Data Interrupt Flag.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1415 of file IfxMsc.h.

◆ IfxMsc_clearValidbit()

IFX_INLINE void IfxMsc_clearValidbit | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Clears the Valid bit.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
None

Definition at line 1434 of file IfxMsc.h.

◆ IfxMsc_disableUpstreamTimeoutInterrupt()

IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt ( Ifx_MSC * msc )

Disables the Upstream Timeout Interrupt.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1440 of file IfxMsc.h.

◆ IfxMsc_downstreamFractionalBaudCalculator()

IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional for downstream.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step Value

Definition at line 80 of file IfxMsc.c.

◆ IfxMsc_downstreamNormalBaudCalculator()

IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal for downstream.

Parameters
msc | Select DataType Ref
baud | Required baud rate
Returns
Step value

Definition at line 93 of file IfxMsc.c.

◆ IfxMsc_enableUpstreamTimeoutInterrupt()

IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt ( Ifx_MSC * msc )

Enables the Upstream Timeout Interrupt.

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 1446 of file IfxMsc.h.

◆ IfxMsc_getActiveDataFrameStatus()

IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus ( Ifx_MSC * msc )

get the status of the active data frame

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 115 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getActiveDataFrameStatus().

◆ IfxMsc_getAsyncClockBypass()

IFX_INLINE boolean IfxMsc_getAsyncClockBypass ( Ifx_MSC * msc )

Returns the value of Asynchronous clock Bypass bit.

Parameters
msc pointer to the base of MSC registers
Returns
Get the value of Asynchronous clock bypass enable bit.

Definition at line 1452 of file IfxMsc.h.

◆ IfxMsc_getDataFrameInterruptFlag()

IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag ( Ifx_MSC * msc )

get the status of the data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 138 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getDataFrameInterruptStatus().

◆ IfxMsc_getDownStreamExtension()

IFX_INLINE boolean IfxMsc_getDownStreamExtension ( Ifx_MSC * msc )

Returns the value of Down stream extension enable bit.

Parameters
msc pointer to the base of MSC registers
Returns
Get the value of Down stream extension enable bit.

Definition at line 1482 of file IfxMsc.h.

◆ IfxMsc_getRecieveDataInterruptFlag()

IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag ( Ifx_MSC * msc )

Returns the Recieve DataInterrupt Flag Status.

Parameters
msc pointer to the base of MSC registers
Returns
Status

Definition at line 1488 of file IfxMsc.h.

◆ IfxMsc_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxMsc_getSrcPointer | ( | Ifx_MSC * | msc,
 |  | IfxMsc_InterruptServiceRequest | intRequest
 | ) |  |

Returns the Src pointer for the selected MSC interrupt node.

Parameters
msc | pointer to the base of MSC registers
intRequest | Interrupt Request
Returns
Pointer to SRCR register

Definition at line 1494 of file IfxMsc.h.

◆ IfxMsc_getUpstreamData()

IFX_INLINE uint32 IfxMsc_getUpstreamData | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Returns the Upstream Data.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
Upstream Data

Definition at line 1525 of file IfxMsc.h.

◆ IfxMsc_getUpstreamParityErrorFlag()

IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag | ( | Ifx_MSC * | msc,
 |  | uint8 | upstreamIdx
 | ) |  |

Returns the Upstream Parity Error Flag Status.

Parameters
msc | pointer to the base of MSC registers
upstreamIdx | upstream index
Returns
Status

Definition at line 1531 of file IfxMsc.h.

◆ IfxMsc_getUpstreamTimeoutFlag()

IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag ( Ifx_MSC * msc )

Returns Upstream Timeout Flag Status.

Parameters
msc pointer to the base of MSC registers
Returns
Status

Definition at line 1537 of file IfxMsc.h.

◆ IfxMsc_isModuleSuspended()

IFX_INLINE boolean IfxMsc_isModuleSuspended ( Ifx_MSC * msc )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
msc Pointer to MSC module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1624 of file IfxMsc.h.

◆ IfxMsc_setAsyncClockBypass()

IFX_INLINE void IfxMsc_setAsyncClockBypass | ( | Ifx_MSC * | msc,
 |  | boolean | value
 | ) |  |

Set or reset the Asynchronous clock bypass bit.

Parameters
msc | pointer to the base of MSC registers
value | Set / reset value.
Returns
None

Definition at line 1636 of file IfxMsc.h.

◆ IfxMsc_setDownStreamData()

IFX_INLINE void IfxMsc_setDownStreamData | ( | Ifx_MSC * | msc,
 |  | uint32 | data
 | ) |  |

Sets the Down stream data.

Parameters
msc | pointer to the base of MSC registers
data | Data
Returns
None

Definition at line 1663 of file IfxMsc.h.

◆ IfxMsc_setDownStreamExtension()

IFX_INLINE void IfxMsc_setDownStreamExtension | ( | Ifx_MSC * | msc,
 |  | boolean | value
 | ) |  |

Set or reset the Down stream extension enable bit.

Parameters
msc | pointer to the base of MSC registers
value | Set / reset value.
Returns
None

Definition at line 1669 of file IfxMsc.h.

◆ IfxMsc_setDownStreamExtensionData()

IFX_INLINE void IfxMsc_setDownStreamExtensionData | ( | Ifx_MSC * | msc,
 |  | uint32 | data
 | ) |  |

Sets the Down stream Extension data.

Parameters
msc | pointer to the base of MSC registers
data | Data
Returns
None

Definition at line 1675 of file IfxMsc.h.

◆ IfxMsc_setFractionalDividerStep()

IFX_INLINE void IfxMsc_setFractionalDividerStep | ( | Ifx_MSC * | msc,
 |  | uint16 | value
 | ) |  |

Sets The Fractional Divider Step.

Parameters
msc | pointer to the base of MSC registers
value | Value
Returns
None

Definition at line 1681 of file IfxMsc.h.

◆ IfxMsc_setNdividerDownstream()

IFX_INLINE void IfxMsc_setNdividerDownstream | ( | Ifx_MSC * | msc,
 |  | IfxMsc_NDividerDownstream | divisionRatio
 | ) |  |

Set the required N divider downstream value.

Parameters
msc | pointer to the base of MSC registers
divisionRatio | select the required division ratio.
Returns
None

Definition at line 1702 of file IfxMsc.h.

◆ IfxMsc_setSerialDataInputSelect()

IFX_INLINE void IfxMsc_setSerialDataInputSelect | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SerialDataInput | select
 | ) |  |

Sets The Serial Data Input Select.

Parameters
msc | pointer to the base of MSC registers
select | Serial Data Input Select
Returns
None

Definition at line 1708 of file IfxMsc.h.

◆ IfxMsc_setSleepMode()

IFX_INLINE void IfxMsc_setSleepMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
msc | pointer to MSC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 1714 of file IfxMsc.h.

◆ IfxMsc_setSuspendMode()

IFX_INLINE void IfxMsc_setSuspendMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
msc | Pointer to MSC module registers
mode | Module suspend mode
Returns
None

Definition at line 1723 of file IfxMsc.h.

◆ IfxMsc_setTransmissionMode()

IFX_INLINE void IfxMsc_setTransmissionMode | ( | Ifx_MSC * | msc,
 |  | IfxMsc_TransmissionMode | mode
 | ) |  |

Sets the Transmission Mode.

Parameters
msc | pointer to the base of MSC registers
mode | mode
Returns
None

Definition at line 1734 of file IfxMsc.h.

◆ IfxMsc_setUpstreamChannelRecieveRate()

IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamChannelReceivingRate | recieveRate
 | ) |  |

Sets The Upstream Channel Recieve Rate.

Parameters
msc | pointer to the base of MSC registers
recieveRate | Recieve Rate
Returns
None

Definition at line 1740 of file IfxMsc.h.

◆ IfxMsc_setUpstreamTimeout()

IFX_INLINE void IfxMsc_setUpstreamTimeout | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamTimeoutValue | timeoutVal
 | ) |  |

Sets The Upstream Timeout.

Parameters
msc | pointer to the base of MSC registers
timeoutVal | Timeout Value
Returns
None

Definition at line 1746 of file IfxMsc.h.

◆ IfxMsc_setUpstreamTimeoutPrescalar()

IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar | ( | Ifx_MSC * | msc,
 |  | IfxMsc_UpstreamTimeoutPrescaler | prescalar
 | ) |  |

Sets The Upstream Timeout Prescalar.

Parameters
msc | pointer to the base of MSC registers
prescalar | prescalar
Returns
None

Definition at line 1752 of file IfxMsc.h.


iLLD_TC26B: MTU

Modules | Files
MTU
iLLD
Collaboration diagram for MTU:

Modules

Implementation
Standard Driver
How to use the Mtu driver?

Files

file | IfxMtu_cfg.h
Mtu on-chip implementation data.
file | IfxMtu.h
MTU basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » MTU
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » MTU
Collaboration diagram for Standard Driver:

Modules

Utility Functions
MBIST Operations
MBIST Error Tracking

Detailed Description


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » MTU » Standard Driver
Collaboration diagram for Utility Functions:

Functions

IFX_STATIC void | IfxMtu_waitForMbistDone (uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
API to wait for requested tower depth. More...
IFX_INLINE void | IfxMtu_disableMbistShell (IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableMbistShell (IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableModule (void)
Enables the MTU module. More...
IFX_INLINE boolean | IfxMtu_isAutoInitRunning (IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM. More...
IFX_INLINE boolean | IfxMtu_isModuleEnabled (void)
Returns the status of whether the module is enabled or not. More...

Detailed Description

Function Documentation

◆ IfxMtu_disableMbistShell()

IFX_INLINE void IfxMtu_disableMbistShell ( IfxMtu_MbistSel mbistSel )

Disables the MBIST Shell of the given SRAM.

Parameters
mbistSel Memory Selection
Returns
None

Usage Example

IfxMtu_disableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
// Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache
while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
{}

Definition at line 471 of file IfxMtu.h.

Referenced by IfxMtu_clearSramContinue(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_enableMbistShell()

IFX_INLINE void IfxMtu_enableMbistShell ( IfxMtu_MbistSel mbistSel )

Enables the MBIST Shell of the given SRAM.

Parameters
mbistSel Memory Selection
Returns
None

Usage Example

// Enable MTU clock
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxScuWdt_setCpuEndinit(password);
}
{
IfxMtu_enableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
// Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache,
while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
{}
}

Definition at line 479 of file IfxMtu.h.

Referenced by IfxMtu_clearSramStart(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_enableModule()

IFX_INLINE void IfxMtu_enableModule ( void )

Enables the MTU module.

Returns
None

Definition at line 487 of file IfxMtu.h.

Referenced by IfxEray_Eray_initModule().

◆ IfxMtu_isAutoInitRunning()

IFX_INLINE boolean IfxMtu_isAutoInitRunning ( IfxMtu_MbistSel mbistSel )

Returns TRUE if Auto-Initialisation is running for the given SRAM.

Should be polled after MBIST enableMbistShell to ensure that an auto-init operation is finished before starting a new operation.

Parameters
mbistSel Memory Selection
Returns
TRUE if auto-initialisation running.

Definition at line 508 of file IfxMtu.h.

Referenced by IfxMtu_clearSramContinue(), IfxMtu_clearSramStart(), and IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_isModuleEnabled()

IFX_INLINE boolean IfxMtu_isModuleEnabled ( void )

Returns the status of whether the module is enabled or not.

Returns

Definition at line 540 of file IfxMtu.h.

◆ IfxMtu_waitForMbistDone()

IFX_STATIC void IfxMtu_waitForMbistDone | ( | uint32 | towerDepth,
 |  | uint8 | numInstructions,
 |  | IfxMtu_MbistSel | mbistSel
 | ) |  |

API to wait for requested tower depth.

Parameters
towerDepth | tower depth of MBIST Ram
numInstructions | number of instructions
mbistSel | Memory Selection
Returns
None

Definition at line 405 of file IfxMtu.c.

Referenced by IfxMtu_clearSram(), IfxMtu_readSramAddress(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().


iLLD_TC26B: MBIST Operations

Functions
MBIST Operations
iLLD » MTU » Standard Driver
Collaboration diagram for MBIST Operations:

Functions

IFX_INLINE boolean | IfxMtu_isMbistDone (IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode. More...
IFX_EXTERN void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_EXTERN uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
IFX_EXTERN void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)

Detailed Description

Function Documentation

◆ IfxMtu_clearSram()

IFX_EXTERN void IfxMtu_clearSram ( IfxMtu_MbistSel mbistSel )

Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 60 of file IfxMtu.c.

Referenced by IfxEray_Eray_initModule().

◆ IfxMtu_clearSramContinue()

IFX_EXTERN void IfxMtu_clearSramContinue ( IfxMtu_MbistSel mbistSel )

This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 102 of file IfxMtu.c.

Referenced by IfxMtu_clearSram().

◆ IfxMtu_clearSramStart()

IFX_EXTERN void IfxMtu_clearSramStart ( IfxMtu_MbistSel mbistSel )

This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 115 of file IfxMtu.c.

Referenced by IfxMtu_clearSram().

◆ IfxMtu_isMbistDone()

IFX_INLINE boolean IfxMtu_isMbistDone ( IfxMtu_MbistSel mbistSel )

This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode.

Parameters
mbistSel Memory Selection
Returns
status of Mbist Clear Sram operation (TRUE - Operation completed, FALSE - Operation still in progress)

A coding example can be found in How to use the Mtu driver?

Definition at line 530 of file IfxMtu.h.

Referenced by IfxMtu_clearSram(), IfxMtu_readSramAddress(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

◆ IfxMtu_readSramAddress()

IFX_EXTERN void IfxMtu_readSramAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint16 | sramAddress
 | ) |  |
Parameters
mbistSel | Memory Selection
sramAddress | SRAM address which should be read
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 257 of file IfxMtu.c.

Referenced by IfxMtu_clearSramContinue().

◆ IfxMtu_runNonDestructiveInversionTest()

IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint8 | rangeSel,
 |  | uint8 | rangeAddrUp,
 |  | uint8 | rangeAddrLow,
 |  | uint16 * | errorAddr
 | ) |  |

This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps:

  1. Read data Word including check bits
  2. write back all bits inverted
  3. Read data Word including check bits
  4. Write back all bits inverted At the end of this procedure the user data remains unchanged and and every bit has been set to 0 and 1. Any single Stuck-At error will be visible as a correctable error. Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. The Error flags need to be cleared to enable further tracking after the test
    Parameters
    mbistSel | Memory Selection
    rangeSel | enable/disable range Selection (0 - disable, 1- enable)
    rangeAddrUp | when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
    rangeAddrLow | when range mode is enabled, it specifies the lower logical block address limit.
    errorAddr | If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
    Returns
    Test Status (0-PASS, 1- FAIL)

Definition at line 284 of file IfxMtu.c.

◆ IfxMtu_writeSramAddress()

IFX_EXTERN void IfxMtu_writeSramAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | uint16 | sramAddress
 | ) |  |
Parameters
mbistSel | Memory Selection
sramAddress | SRAM address which should be written
Returns
None

Definition at line 360 of file IfxMtu.c.


iLLD_TC26B: MBIST Error Tracking

Functions
MBIST Error Tracking
iLLD » MTU » Standard Driver
Collaboration diagram for MBIST Error Tracking:

Functions

IFX_INLINE boolean | IfxMtu_isErrorTrackingEnabled (IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking. More...
IFX_INLINE boolean | IfxMtu_isErrorTrackingOverflow (IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
IFX_INLINE boolean | IfxMtu_checkErrorFlags (IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set. More...
IFX_EXTERN void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
IFX_EXTERN void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
IFX_EXTERN uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
IFX_EXTERN uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...

Detailed Description

Function Documentation

◆ IfxMtu_checkErrorFlags()

IFX_INLINE boolean IfxMtu_checkErrorFlags ( IfxMtu_MbistSel mbistSel )

Returns True if any Error Flags are set.

Parameters
mbistSel Memory slection
Returns
True if any error Flag is set

Definition at line 546 of file IfxMtu.h.

Referenced by IfxMtu_runNonDestructiveInversionTest().

◆ IfxMtu_clearErrorTracking()

IFX_EXTERN void IfxMtu_clearErrorTracking ( IfxMtu_MbistSel mbistSel )

Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).

Parameters
mbistSel Memory Selection
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 53 of file IfxMtu.c.

◆ IfxMtu_enableErrorTracking()

IFX_EXTERN void IfxMtu_enableErrorTracking | ( | IfxMtu_MbistSel | mbistSel,
 |  | boolean | enable
 | ) |  |

Enables the tracking of SRAM errors.

Parameters
mbistSel | Memory Selection
enable | TRUE to enable error tracking, FALSE to disable error tracking.
Returns
None

A coding example can be found in How to use the Mtu driver?

Definition at line 182 of file IfxMtu.c.

◆ IfxMtu_getSystemAddress()

IFX_EXTERN uint32 IfxMtu_getSystemAddress | ( | IfxMtu_MbistSel | mbistSel,
 |  | Ifx_MC_ETRR | trackedSramAddress
 | ) |  |

Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block)

Please note that not all memories of the system are supported by this function. Additional memories will be considered on request.

Parameters
mbistSel | Memory Selection
trackedSramAddress | tracked SRAM address which consists of an ADDR and MBI field (SRAM address and block)
Returns
descrambled system address if supported by this function, otherwise 0

Example usage: see IfxMtu_getTrackedSramAddresses

Definition at line 197 of file IfxMtu.c.

◆ IfxMtu_getTrackedSramAddresses()

IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses | ( | IfxMtu_MbistSel | mbistSel,
 |  | Ifx_MC_ETRR * | trackedSramAddresses
 | ) |  |

Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).

Parameters
mbistSel | Memory Selection
trackedSramAddresses | will contain the tracked error addresses in trackedSramAdresses[x].B.ADDR and affected blocks in sramAddresses[x].B.MBI

The array size shall be IFXMTU_MAX_TRACKED_ADDRESSES

Returns
number of tracked errors (0..IFXMTU_MAX_TRACKED_ADDRESSES)

Example usage to print out tracked errors of a given memory:

We assume that the MTU clock has already been enabled, and that the MBIST instance has been selected; e.g. for LMU:

uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_lmu;
IfxMtu_enableMbistShell(mbistSel);
// for auto-init memories: wait for the end of the clear operation
while (IfxMtu_isAutoInitRunning(mbistSel))
{}

Now the tracking information can be retrieved with:

{
Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
clib_ver_printf("Tracked addresses: %d (Overflow: %d)\n",
numTrackedAddresses,
IfxMtu_isErrorTrackingOverflow(mbistSel) ? 1 : 0);
for(int i=0; i<numTrackedAddresses; ++i) {
clib_ver_printf("%d: A:0x%04x MBI:%d -> SystemAddress: 0x%08x\n",
i,
trackedSramAddresses[i].B.ADDR,
trackedSramAddresses[i].B.MBI,
IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
}
}

Definition at line 233 of file IfxMtu.c.

◆ IfxMtu_isErrorTrackingEnabled()

IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled ( IfxMtu_MbistSel mbistSel )

Returns the status of the error tracking.

Parameters
mbistSel Memory Selection
Returns
TRUE if error tracking enabled.

Definition at line 516 of file IfxMtu.h.

◆ IfxMtu_isErrorTrackingOverflow()

IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow ( IfxMtu_MbistSel mbistSel )

Returns the error tracking overflow status. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).

Parameters
mbistSel Memory Selection
Returns
TRUE if more errors were detected since last clear than error tracking registers are available, or if more than one memory block was in error at the same time.

Definition at line 523 of file IfxMtu.h.


iLLD_TC26B: How to use the Mtu driver?

How to use the Mtu driver?
iLLD » MTU
Collaboration diagram for How to use the Mtu driver?:

The Memory Test Unit (MTU) controls and monitors the test, initialization and data integrity checking functions of the various internal memories in the device

The Mtu driver provides set of routines for various Mbist operations

In the following sections it will be described, how to integrate the Mtu driver into the application framework.

Sram Initialisation

Include Files

Include following header file into your C code:

#include <Mtu/IfxMtu.h>

Clear Sram (Synchronous polling mode)

The Sram initialisation in synchronous polling mode (i.e wait till the complete operation is done) can be used as:

clearSram(IfxMtu_MbistSel_cpu0Dspr);

Clear Sram (Asynchronous polling mode)

The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function, then can be queried for completion in a task using IfxMtu_isMbistDone. Once it's completed, then IfxMtu_clearSramContinue() has to be called. Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.

Following code triggers Sram initilisation.

uint16 password = 0;
password = IfxScuWdt_getSafetyWatchdogPassword();
// Clear EndInit
IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_clearSramStart(IfxMtu_MbistSel_cpu0Dspr);
// Set EndInit Watchdog
IfxScuWdt_setSafetyEndinit(password);

Sram initialisation status can be queried in a task and once done complete the operation using:

if (IfxMtu_isMbistDone(IfxMtu_MbistSel_cpu0Dspr))
{
// Sram Clear operation done
// Clear EndInit
IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_clearSramContinue(IfxMtu_MbistSel_cpu0Dspr);
// Set EndInit Watchdog
IfxScuWdt_setSafetyEndinit(password);
}
else
{
// Sram operation is still in progress
}

Sram Error tracking

Example usage of Sram Error tracking

IfxScuWdt_clearSafetyEndinit(password);
IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_cpu1Dspr;
Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
IfxMtu_enableMbistShell(mbistSel);
// for auto-init memories: wait for the end of the clear operation
while (IfxMtu_isAutoInitRunning(mbistSel))
{}
IfxMtu_enableErrorTracking(mbistSel, TRUE);
uint32 numEtrr = 5;
// print tracked error address
{
Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
for(uint32 i=0; i<numEtrr; ++i) {
printf("%d: Error Address:0x%04x, Error System Address:0x%04x \n",
i,
trackedSramAddresses[i].B.ADDR,
IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
}
}
}
IfxMtu_disableMbistShell(mbistSel);
IfxScuWdt_setSafetyEndinit(password);

Memory Tests

Non Destructive Inversion Test

Usage Example:

// Enable MTU clock
{
uint16 password = IfxScuWdt_getCpuWatchdogPassword();
IfxScuWdt_clearCpuEndinit(password);
IfxMtu_enableModule();
IfxScuWdt_setCpuEndinit(password);
}
{
uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
uint16 errAddr = 0;
IfxScuWdt_clearSafetyEndinit(password);
// run Non distructive inversion test for cpu0 DSPR memory (Range selection disabled)
IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFF, 0, &errAddr);
// Clear Error Flags which are set in case you want to run further tests
IfxMtu_clearErrorTracking(IfxMtu_MbistSel_cpu0Dspr);
IfxScuWdt_setSafetyEndinit(password);
}


iLLD_TC26B: IfxMtu_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxMtu_cfg.h File Reference
iLLD » MTU

Mtu on-chip implementation data. More...

#include "Cpu/Std/IfxCpu.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxMtu_reg.h"
#include "IfxMc_reg.h"
Include dependency graph for IfxMtu_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxMtu_SramItem
Describes physical parameters of a SRAM memory. More...

Macros

#define | IFXMTU_MC_ADDRESS_BASE (0xF0061000u)
Base address of first MBIST Control Block. More...
#define | IFXMTU_NUM_MBIST_TABLE_ITEMS (88)
Number of MBIST Table items. More...
#define | IFXMTU_MAX_TRACKED_ADDRESSES (5)
Maximum number of tracked SRAM addresses (ETTR) More...

Enumerations

enum IfxMtu_MbistSel {
IfxMtu_MbistSel_none = -1,
IfxMtu_MbistSel_cpu1Dspr = 6,
IfxMtu_MbistSel_cpu1Dtag = 8,
IfxMtu_MbistSel_cpu1Pspr = 9,
IfxMtu_MbistSel_cpu1Ptag = 11,
IfxMtu_MbistSel_cpu0Dspr = 14,
IfxMtu_MbistSel_cpu0Pspr = 16,
IfxMtu_MbistSel_cpu0Ptag = 17,
IfxMtu_MbistSel_ethermac = 22,
IfxMtu_MbistSel_mod4 = 26,
IfxMtu_MbistSel_gtmFifo = 28,
IfxMtu_MbistSel_gtmMcs0 = 29,
IfxMtu_MbistSel_gtmMcs1 = 30,
IfxMtu_MbistSel_gtmDpll1a = 31,
IfxMtu_MbistSel_gtmDpll1b = 32,
IfxMtu_MbistSel_gtmDpll2 = 33,
IfxMtu_MbistSel_psi5 = 34,
IfxMtu_MbistSel_mcan = 36,
IfxMtu_MbistSel_erayObf = 38,
IfxMtu_MbistSel_erayIbfTbf = 39,
IfxMtu_MbistSel_erayMbf = 40,
IfxMtu_MbistSel_stdbyRam1 = 44,
IfxMtu_MbistSel_mcds = 45,
IfxMtu_MbistSel_emem0 = 46,
IfxMtu_MbistSel_emem1 = 47,
IfxMtu_MbistSel_emem2 = 48,
IfxMtu_MbistSel_emem3 = 49,
IfxMtu_MbistSel_emem4 = 50,
IfxMtu_MbistSel_emem5 = 51,
IfxMtu_MbistSel_emem6 = 52,
IfxMtu_MbistSel_emem7 = 53,
IfxMtu_MbistSel_cifJpeg1_4 = 78,
IfxMtu_MbistSel_cifJpeg3 = 80,
IfxMtu_MbistSel_cifCif = 81,
IfxMtu_MbistSel_stdbyRam2 = 82,
IfxMtu_MbistSel_dma = 83,
IfxMtu_MbistSel_ememXtm0 = 84,
IfxMtu_MbistSel_ememXtm1 = 85,
IfxMtu_MbistSel_fft0 = 86,
IfxMtu_MbistSel_fft1 = 87
}
MBIST Selection. More...

Variables

IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable [IFXMTU_NUM_MBIST_TABLE_ITEMS]

Detailed Description

Mtu on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMtu_cfg.h.

Data Structure Documentation

◆ IfxMtu_SramItem

struct IfxMtu_SramItem

Describes physical parameters of a SRAM memory.

Definition at line 116 of file IfxMtu_cfg.h.

Data Fields
uint16 | dataSize | Data Size of each memory block.
uint8 | eccInvPos0 | First ECC bit which needs to be inverted.
uint8 | eccInvPos1 | Second ECC bit which needs to be inverted.
uint8 | eccSize | ECC Size of each memory block.
uint32 | mbistDelay | Mbist Delay.
uint8 | numBlocks | number of SRAM blocks

Macro Definition Documentation

◆ IFXMTU_MAX_TRACKED_ADDRESSES

#define IFXMTU_MAX_TRACKED_ADDRESSES (5)

Maximum number of tracked SRAM addresses (ETTR)

Definition at line 58 of file IfxMtu_cfg.h.

Referenced by IfxMtu_getTrackedSramAddresses().

◆ IFXMTU_MC_ADDRESS_BASE

#define IFXMTU_MC_ADDRESS_BASE (0xF0061000u)

Base address of first MBIST Control Block.

Definition at line 50 of file IfxMtu_cfg.h.

Referenced by IfxMtu_checkErrorFlags(), IfxMtu_clearErrorTracking(), IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_enableErrorTracking(), IfxMtu_getTrackedSramAddresses(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxMtu_isMbistDone(), IfxMtu_readSramAddress(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

◆ IFXMTU_NUM_MBIST_TABLE_ITEMS

#define IFXMTU_NUM_MBIST_TABLE_ITEMS (88)

Number of MBIST Table items.

Definition at line 54 of file IfxMtu_cfg.h.

Referenced by IfxMtu_clearSramStart().

Enumeration Type Documentation

◆ IfxMtu_MbistSel

enum IfxMtu_MbistSel

MBIST Selection.

Enumerator
IfxMtu_MbistSel_none
IfxMtu_MbistSel_cpu1Dspr
IfxMtu_MbistSel_cpu1Dtag
IfxMtu_MbistSel_cpu1Pspr
IfxMtu_MbistSel_cpu1Ptag
IfxMtu_MbistSel_cpu0Dspr
IfxMtu_MbistSel_cpu0Pspr
IfxMtu_MbistSel_cpu0Ptag
IfxMtu_MbistSel_ethermac
IfxMtu_MbistSel_mod4
IfxMtu_MbistSel_gtmFifo
IfxMtu_MbistSel_gtmMcs0
IfxMtu_MbistSel_gtmMcs1
IfxMtu_MbistSel_gtmDpll1a
IfxMtu_MbistSel_gtmDpll1b
IfxMtu_MbistSel_gtmDpll2
IfxMtu_MbistSel_psi5
IfxMtu_MbistSel_mcan
IfxMtu_MbistSel_erayObf
IfxMtu_MbistSel_erayIbfTbf
IfxMtu_MbistSel_erayMbf
IfxMtu_MbistSel_stdbyRam1
IfxMtu_MbistSel_mcds
IfxMtu_MbistSel_emem0
IfxMtu_MbistSel_emem1
IfxMtu_MbistSel_emem2
IfxMtu_MbistSel_emem3
IfxMtu_MbistSel_emem4
IfxMtu_MbistSel_emem5
IfxMtu_MbistSel_emem6
IfxMtu_MbistSel_emem7
IfxMtu_MbistSel_cifJpeg1_4
IfxMtu_MbistSel_cifJpeg3
IfxMtu_MbistSel_cifCif
IfxMtu_MbistSel_stdbyRam2
IfxMtu_MbistSel_dma
IfxMtu_MbistSel_ememXtm0
IfxMtu_MbistSel_ememXtm1
IfxMtu_MbistSel_fft0
IfxMtu_MbistSel_fft1

Definition at line 66 of file IfxMtu_cfg.h.

Variable Documentation

◆ IfxMtu_sramTable

IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]

Definition at line 130 of file IfxMtu_cfg.h.


iLLD_TC26B: IfxMtu.h File Reference

  • Mtu
  • Std
Macros | Functions
IfxMtu.h File Reference
iLLD » MTU

MTU basic functionality. More...

#include "_Impl/IfxMtu_cfg.h"
#include "IfxMc_bf.h"
#include "IfxMtu_reg.h"
#include "IfxMc_reg.h"
#include "IfxScu_reg.h"
#include "_Utilities/Ifx_Assert.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxMtu.h:

Go to the source code of this file.

Macros

#define IFXMTU_ERROR_FLAGS_MASK
Mask for the ERROR flags. More...

Functions

IFX_INLINE void | IfxMtu_disableMbistShell (IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableMbistShell (IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM. More...
IFX_INLINE void | IfxMtu_enableModule (void)
Enables the MTU module. More...
IFX_INLINE boolean | IfxMtu_isAutoInitRunning (IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM. More...
IFX_INLINE boolean | IfxMtu_isModuleEnabled (void)
Returns the status of whether the module is enabled or not. More...
IFX_INLINE boolean | IfxMtu_isMbistDone (IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode. More...
IFX_EXTERN void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
IFX_EXTERN void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
IFX_EXTERN void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_EXTERN uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
IFX_EXTERN void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
IFX_INLINE boolean | IfxMtu_isErrorTrackingEnabled (IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking. More...
IFX_INLINE boolean | IfxMtu_isErrorTrackingOverflow (IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
IFX_INLINE boolean | IfxMtu_checkErrorFlags (IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set. More...
IFX_EXTERN void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
IFX_EXTERN void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
IFX_EXTERN uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
IFX_EXTERN uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...

Detailed Description

MTU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMtu.h.

Macro Definition Documentation

◆ IFXMTU_ERROR_FLAGS_MASK

#define IFXMTU_ERROR_FLAGS_MASK
Value:
(((unsigned int)IFX_MC_ECCD_EOV_MSK << IFX_MC_ECCD_EOV_OFF) | \
((unsigned int)IFX_MC_ECCD_CERR_MSK << IFX_MC_ECCD_CERR_OFF) | \
((unsigned int)IFX_MC_ECCD_UERR_MSK << IFX_MC_ECCD_UERR_OFF) | \
((unsigned int)IFX_MC_ECCD_AERR_MSK << IFX_MC_ECCD_AERR_OFF))

Mask for the ERROR flags.

Definition at line 185 of file IfxMtu.h.

Referenced by IfxMtu_checkErrorFlags().


iLLD_TC26B: MULTICAN

Modules | Files
MULTICAN
iLLD
Collaboration diagram for MULTICAN:

Modules

Implementation
Standard Driver
MULTICAN Pin Mapping
How to use the CAN Interface driver?
CAN

Files

file | IfxMultican_cfg.h
MULTICAN on-chip implementation data.
file | IfxMultican_PinMap.c
MULTICAN I/O map.
file | IfxMultican_PinMap.h
MULTICAN I/O map.
file | IfxMultican_Can.h
MULTICAN CAN details.
file | IfxMultican.h
MULTICAN basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » MULTICAN
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » MULTICAN
Collaboration diagram for Standard Driver:

Modules

Enumerations
General functions
CAN Nodes
Message
Message Objects
Interrupts

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » MULTICAN » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxMultican_ClockSelect {
IfxMultican_ClockSelect_noClock = 0,
IfxMultican_ClockSelect_fclc = 1,
IfxMultican_ClockSelect_fosc0 = 2,
IfxMultican_ClockSelect_fErayPll = 4
}
CAN input clock selection. More...
enum IfxMultican_DataLengthCode {
IfxMultican_DataLengthCode_0 = 0,
IfxMultican_DataLengthCode_1,
IfxMultican_DataLengthCode_2,
IfxMultican_DataLengthCode_3,
IfxMultican_DataLengthCode_4,
IfxMultican_DataLengthCode_5,
IfxMultican_DataLengthCode_6,
IfxMultican_DataLengthCode_7,
IfxMultican_DataLengthCode_8,
IfxMultican_DataLengthCode_12 = 9,
IfxMultican_DataLengthCode_16 = 10,
IfxMultican_DataLengthCode_20 = 11,
IfxMultican_DataLengthCode_24 = 12,
IfxMultican_DataLengthCode_32 = 13,
IfxMultican_DataLengthCode_48 = 14,
IfxMultican_DataLengthCode_64 = 15
}
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC. More...
enum IfxMultican_Frame {
IfxMultican_Frame_receive,
IfxMultican_Frame_transmit,
IfxMultican_Frame_remoteRequest,
IfxMultican_Frame_remoteAnswer
}
CAN frame type. More...
enum IfxMultican_FrameCounterMode {
IfxMultican_FrameCounterMode_frameCountMode = 0,
IfxMultican_FrameCounterMode_timeStampMode = 1,
IfxMultican_FrameCounterMode_bitTimingMode = 2,
IfxMultican_FrameCounterMode_errorCountMode = 3
}
Determines the operation mode of the frame counter
Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id) More...
enum IfxMultican_MsgObjGroup {
IfxMultican_MsgObjGroup_0 = 0,
IfxMultican_MsgObjGroup_1,
IfxMultican_MsgObjGroup_2,
IfxMultican_MsgObjGroup_3,
IfxMultican_MsgObjGroup_4,
IfxMultican_MsgObjGroup_5,
IfxMultican_MsgObjGroup_6,
IfxMultican_MsgObjGroup_7
}
CAN message object group
Each group consists of 32 consecutive message objects. More...
enum IfxMultican_MsgObjMode {
IfxMultican_MsgObjMode_standard = 0,
IfxMultican_MsgObjMode_receiveFifoBase = 1,
IfxMultican_MsgObjMode_transmitFifoBase = 2,
IfxMultican_MsgObjMode_transmitFifoSlave = 3,
IfxMultican_MsgObjMode_gatewaySource = 4,
IfxMultican_MsgObjMode_canFD64 = 5
}
CAN Message Object Mode. More...
enum IfxMultican_MsgObjStatusFlag {
IfxMultican_MsgObjStatusFlag_receivePending = IFX_CAN_MO_STAT_RXPND_OFF,
IfxMultican_MsgObjStatusFlag_transmitPending = IFX_CAN_MO_STAT_TXPND_OFF,
IfxMultican_MsgObjStatusFlag_receiveUpdating = IFX_CAN_MO_STAT_RXUPD_OFF,
IfxMultican_MsgObjStatusFlag_newData = IFX_CAN_MO_STAT_NEWDAT_OFF,
IfxMultican_MsgObjStatusFlag_messageLost = IFX_CAN_MO_STAT_MSGLST_OFF,
IfxMultican_MsgObjStatusFlag_messageValid = IFX_CAN_MO_STAT_MSGVAL_OFF,
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected = IFX_CAN_MO_STAT_RTSEL_OFF,
IfxMultican_MsgObjStatusFlag_receiveEnable = IFX_CAN_MO_STAT_RXEN_OFF,
IfxMultican_MsgObjStatusFlag_transmitRequest = IFX_CAN_MO_STAT_TXRQ_OFF,
IfxMultican_MsgObjStatusFlag_transmitEnable0 = IFX_CAN_MO_STAT_TXEN0_OFF,
IfxMultican_MsgObjStatusFlag_transmitEnable1 = IFX_CAN_MO_STAT_TXEN1_OFF,
IfxMultican_MsgObjStatusFlag_messageDirection = IFX_CAN_MO_STAT_DIR_OFF
}
CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs) More...
enum IfxMultican_Priority {
IfxMultican_Priority_ListOrder = 1,
IfxMultican_Priority_CAN_ID = 2
}
CAN priorities. More...
enum IfxMultican_SleepMode {
IfxMultican_SleepMode_enable = 0,
IfxMultican_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS. More...
enum IfxMultican_Status {
IfxMultican_Status_ok = 0x00000000,
IfxMultican_Status_notInitialised = 0x00000001,
IfxMultican_Status_wrongParam = 0x00000002,
IfxMultican_Status_wrongPin = 0x00000004,
IfxMultican_Status_busHeavy = 0x00000008,
IfxMultican_Status_busOff = 0x00000010,
IfxMultican_Status_notSentBusy = 0x00000020,
IfxMultican_Status_receiveEmpty = 0x00000040,
IfxMultican_Status_messageLost = 0x00000080,
IfxMultican_Status_newData = 0x00000100,
IfxMultican_Status_newDataButOneLost = IfxMultican_Status_messageLost | IfxMultican_Status_newData
}
CAN API status definition. More...
enum IfxMultican_SuspendMode {
IfxMultican_SuspendMode_none = 0,
IfxMultican_SuspendMode_hard = 1,
IfxMultican_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxMultican_ClockSelect

enum IfxMultican_ClockSelect

CAN input clock selection.

Enumerator
IfxMultican_ClockSelect_noClock | No clock supplied.
IfxMultican_ClockSelect_fclc | fMULTICAN
IfxMultican_ClockSelect_fosc0 | Oscillator Clock.
IfxMultican_ClockSelect_fErayPll | E-Ray clock.

Definition at line 70 of file IfxMultican.h.

◆ IfxMultican_DataLengthCode

enum IfxMultican_DataLengthCode

CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.

Enumerator
IfxMultican_DataLengthCode_0 | 0 data bytes
IfxMultican_DataLengthCode_1 | 1 data bytes
IfxMultican_DataLengthCode_2 | 2 data bytes
IfxMultican_DataLengthCode_3 | 3 data bytes
IfxMultican_DataLengthCode_4 | 4 data bytes
IfxMultican_DataLengthCode_5 | 5 data bytes
IfxMultican_DataLengthCode_6 | 6 data bytes
IfxMultican_DataLengthCode_7 | 7 data bytes
IfxMultican_DataLengthCode_8 | 8 data bytes
IfxMultican_DataLengthCode_12 | 12 data bytes
IfxMultican_DataLengthCode_16 | 16 data bytes
IfxMultican_DataLengthCode_20 | 20 data bytes
IfxMultican_DataLengthCode_24 | 24 data bytes
IfxMultican_DataLengthCode_32 | 32 data bytes
IfxMultican_DataLengthCode_48 | 48 data bytes
IfxMultican_DataLengthCode_64 | 64 data bytes

Definition at line 81 of file IfxMultican.h.

◆ IfxMultican_Frame

enum IfxMultican_Frame

CAN frame type.

Enumerator
IfxMultican_Frame_receive | Data frame is received.
IfxMultican_Frame_transmit | Data frame is generated.
IfxMultican_Frame_remoteRequest | Remote request frame is generated.
IfxMultican_Frame_remoteAnswer | Answer frame is generated on reception of the corresponding remote request.

Definition at line 103 of file IfxMultican.h.

◆ IfxMultican_FrameCounterMode

enum IfxMultican_FrameCounterMode

Determines the operation mode of the frame counter
Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id)

Enumerator
IfxMultican_FrameCounterMode_frameCountMode | The frame counter is incremented upon the reception and transmission of frames.
IfxMultican_FrameCounterMode_timeStampMode | The frame counter is used to count bit times.
IfxMultican_FrameCounterMode_bitTimingMode | The frame counter is used for analysis of the bit timing.
IfxMultican_FrameCounterMode_errorCountMode | The frame counter is used for counting when an error frame is received or an error is detected by the node.

Definition at line 114 of file IfxMultican.h.

◆ IfxMultican_MsgObjGroup

enum IfxMultican_MsgObjGroup

CAN message object group
Each group consists of 32 consecutive message objects.

Enumerator
IfxMultican_MsgObjGroup_0
IfxMultican_MsgObjGroup_1
IfxMultican_MsgObjGroup_2
IfxMultican_MsgObjGroup_3
IfxMultican_MsgObjGroup_4
IfxMultican_MsgObjGroup_5
IfxMultican_MsgObjGroup_6
IfxMultican_MsgObjGroup_7

Definition at line 130 of file IfxMultican.h.

◆ IfxMultican_MsgObjMode

enum IfxMultican_MsgObjMode

CAN Message Object Mode.

Enumerator
IfxMultican_MsgObjMode_standard | Standard Message Object.
IfxMultican_MsgObjMode_receiveFifoBase | Receive FIFO Base Object.
IfxMultican_MsgObjMode_transmitFifoBase | Transmit FIFO Base Object.
IfxMultican_MsgObjMode_transmitFifoSlave | Transmit FIFO Slave Object.
IfxMultican_MsgObjMode_gatewaySource | Gateway Source Object.
IfxMultican_MsgObjMode_canFD64 | CANFD 64 bytes Message Mode.

Definition at line 144 of file IfxMultican.h.

◆ IfxMultican_MsgObjStatusFlag

enum IfxMultican_MsgObjStatusFlag

CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs)

Enumerator
IfxMultican_MsgObjStatusFlag_receivePending | Receive pending status flag.
IfxMultican_MsgObjStatusFlag_transmitPending | Transmit pending status flag.
IfxMultican_MsgObjStatusFlag_receiveUpdating | Receive updating status flag.
IfxMultican_MsgObjStatusFlag_newData | New data status flag.
IfxMultican_MsgObjStatusFlag_messageLost | Message lost status flag.
IfxMultican_MsgObjStatusFlag_messageValid | Message valid status flag.
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected | Receive transmit selected status flag.
IfxMultican_MsgObjStatusFlag_receiveEnable | Receive enable status flag.
IfxMultican_MsgObjStatusFlag_transmitRequest | Transmit request status flag.
IfxMultican_MsgObjStatusFlag_transmitEnable0 | Transmit enable 0 status flag.
IfxMultican_MsgObjStatusFlag_transmitEnable1 | Transmit enable 1 status flag.
IfxMultican_MsgObjStatusFlag_messageDirection | Message direction status flag.

Definition at line 157 of file IfxMultican.h.

◆ IfxMultican_Priority

enum IfxMultican_Priority

CAN priorities.

Enumerator
IfxMultican_Priority_ListOrder | List order.
IfxMultican_Priority_CAN_ID | CAN ID.

Definition at line 175 of file IfxMultican.h.

◆ IfxMultican_SleepMode

enum IfxMultican_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS.

Enumerator
IfxMultican_SleepMode_enable | enables sleep mode
IfxMultican_SleepMode_disable | disables sleep mode

Definition at line 184 of file IfxMultican.h.

◆ IfxMultican_Status

enum IfxMultican_Status

CAN API status definition.

Enumerator
IfxMultican_Status_ok
IfxMultican_Status_notInitialised
IfxMultican_Status_wrongParam
IfxMultican_Status_wrongPin
IfxMultican_Status_busHeavy
IfxMultican_Status_busOff
IfxMultican_Status_notSentBusy
IfxMultican_Status_receiveEmpty
IfxMultican_Status_messageLost
IfxMultican_Status_newData
IfxMultican_Status_newDataButOneLost

Definition at line 192 of file IfxMultican.h.

◆ IfxMultican_SuspendMode

enum IfxMultican_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxMultican_SuspendMode_none | No suspend.
IfxMultican_SuspendMode_hard | Hard Suspend.
IfxMultican_SuspendMode_soft | Soft Suspend.

Definition at line 209 of file IfxMultican.h.


iLLD_TC26B: General functions

Functions
General functions
iLLD » MULTICAN » Standard Driver
Collaboration diagram for General functions:

Functions

IFX_INLINE void | IfxMultican_clearMessagePendingSeletor (Ifx_CAN *mcan)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_clearPendingMessageNotification (Ifx_CAN *mcan, uint16 list)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_disableModule (Ifx_CAN *mcan)
Disables the module (sets the disable request) More...
IFX_INLINE void | IfxMultican_disableSleepMode (Ifx_CAN *mcan)
Disregards the sleep mode of the module. More...
IFX_INLINE void | IfxMultican_enableModule (Ifx_CAN *mcan)
Enables the module (clears the disable request) More...
IFX_INLINE void | IfxMultican_enableSleepMode (Ifx_CAN *mcan)
Enables the sleep mode of the module. More...
IFX_INLINE uint16 | IfxMultican_getFractionalDividerMode (Ifx_CAN *mcan)
Returns the selected fractional divider mode. More...
IFX_INLINE uint16 | IfxMultican_getFractionalDividerStepValue (Ifx_CAN *mcan)
Returns the reload or addition value for the result. More...
IFX_INLINE IfxMultican_ClockSelect | IfxMultican_getInputClock (Ifx_CAN *mcan)
Returns the selected input clock source. More...
IFX_INLINE boolean | IfxMultican_isModuleEnabled (Ifx_CAN *mcan)
Returns the status of module enabled or disabled. More...
IFX_INLINE void | IfxMultican_setFractionalDividerMode (Ifx_CAN *mcan, uint16 mode)
sets the fractional divider mode More...
IFX_INLINE void | IfxMultican_setFractionalDividerStepValue (Ifx_CAN *mcan, uint16 stepValue)
sets reload or addition value for the result. More...
IFX_INLINE void | IfxMultican_setInputClock (Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
Sets the input clock source. More...
IFX_INLINE void | IfxMultican_setMessageIndexMask (Ifx_CAN *mcan, uint32 mask)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_setSleepMode (Ifx_CAN *can, IfxMultican_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxMultican_waitListReady (Ifx_CAN *mcan)
Wait until the list panel is ready. More...
IFX_INLINE boolean | IfxMultican_isModuleSuspended (Ifx_CAN *mcan)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxMultican_setSuspendMode (Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxMultican_Node_setFastBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register. More...
IFX_EXTERN void | IfxMultican_Node_setNominalBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register. More...
IFX_EXTERN void | IfxMultican_deinit (Ifx_CAN *mcan)
Reset the CAN module
Reset and disable the CAN module, inclusive message object and node registers. More...
IFX_EXTERN void | IfxMultican_resetModule (Ifx_CAN *can)
resets Multican kernel More...
IFX_EXTERN void | IfxMultican_setListCommand (Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel. More...
IFX_EXTERN IfxMultican_Index | IfxMultican_getIndex (Ifx_CAN *multican)
API to get the resource index of the CAN specified. More...
IFX_EXTERN Ifx_CAN * | IfxMultican_getAddress (IfxMultican_Index multican)

Detailed Description

Function Documentation

◆ IfxMultican_clearMessagePendingSeletor()

IFX_INLINE void IfxMultican_clearMessagePendingSeletor ( Ifx_CAN * mcan )

clears the message pending interrupt notification of a given list

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1536 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_clearPendingMessageNotification()

IFX_INLINE void IfxMultican_clearPendingMessageNotification | ( | Ifx_CAN * | mcan,
 |  | uint16 | list
 | ) |  |

clears the message pending interrupt notification of a given list

Parameters
mcan | mcan Specifies the CAN module
list | List number
Returns
None

Definition at line 1542 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_deinit()

IFX_EXTERN void IfxMultican_deinit ( Ifx_CAN * mcan )

Reset the CAN module
Reset and disable the CAN module, inclusive message object and node registers.

Parameters
mcan Specifies the CAN module
Returns
None

Definition at line 1161 of file IfxMultican.c.

Referenced by IfxMultican_Can_deinit().

◆ IfxMultican_disableModule()

IFX_INLINE void IfxMultican_disableModule ( Ifx_CAN * mcan )

Disables the module (sets the disable request)

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1548 of file IfxMultican.h.

◆ IfxMultican_disableSleepMode()

IFX_INLINE void IfxMultican_disableSleepMode ( Ifx_CAN * mcan )

Disregards the sleep mode of the module.

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1554 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_enableModule()

IFX_INLINE void IfxMultican_enableModule ( Ifx_CAN * mcan )

Enables the module (clears the disable request)

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1560 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_enableSleepMode()

IFX_INLINE void IfxMultican_enableSleepMode ( Ifx_CAN * mcan )

Enables the sleep mode of the module.

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1566 of file IfxMultican.h.

◆ IfxMultican_getAddress()

IFX_EXTERN Ifx_CAN* IfxMultican_getAddress ( IfxMultican_Index multican )
Parameters
multican Module index of the MULTICAN
Returns
MULTICAN module register address

Definition at line 1263 of file IfxMultican.c.

◆ IfxMultican_getFractionalDividerMode()

IFX_INLINE uint16 IfxMultican_getFractionalDividerMode ( Ifx_CAN * mcan )

Returns the selected fractional divider mode.

Parameters
mcan mcan Specifies the CAN module
Returns
Divider mode

Definition at line 1572 of file IfxMultican.h.

Referenced by IfxMultican_Can_getConfig().

◆ IfxMultican_getFractionalDividerStepValue()

IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue ( Ifx_CAN * mcan )

Returns the reload or addition value for the result.

Parameters
mcan mcan Specifies the CAN module
Returns
Step Value

Definition at line 1578 of file IfxMultican.h.

Referenced by IfxMultican_Can_getConfig().

◆ IfxMultican_getIndex()

IFX_EXTERN IfxMultican_Index IfxMultican_getIndex ( Ifx_CAN * multican )

API to get the resource index of the CAN specified.

Returns
multican resource index

Definition at line 1243 of file IfxMultican.c.

◆ IfxMultican_getInputClock()

IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock ( Ifx_CAN * mcan )

Returns the selected input clock source.

Parameters
mcan mcan Specifies the CAN module
Returns
Clock selection

Definition at line 1584 of file IfxMultican.h.

Referenced by IfxMultican_Can_getConfig().

◆ IfxMultican_isModuleEnabled()

IFX_INLINE boolean IfxMultican_isModuleEnabled ( Ifx_CAN * mcan )

Returns the status of module enabled or disabled.

Parameters
mcan mcan Specifies the CAN module
Returns
Status (TRUE / FALSE)

Definition at line 1590 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_isModuleSuspended()

IFX_INLINE boolean IfxMultican_isModuleSuspended ( Ifx_CAN * mcan )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
mcan Pointer to MULTICAN module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1636 of file IfxMultican.h.

◆ IfxMultican_Node_setFastBitTiming()

IFX_EXTERN void IfxMultican_Node_setFastBitTiming | ( | Ifx_CAN_N * | hwNode,
 |  | float32 | moduleFreq,
 |  | uint32 | baudrate,
 |  | uint16 | samplePoint,
 |  | uint16 | synchJumpWidth
 | ) |  |

Calculates the best posible values and configures FBTR register.

Parameters
hwNode | Pointer to CAN Node registers
moduleFreq | Specifies the CAN module frequency
baudrate | Specifies the node baud rate. Unit: baud
samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.
Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Returns
None

Definition at line 828 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setNominalBitTiming()

IFX_EXTERN void IfxMultican_Node_setNominalBitTiming | ( | Ifx_CAN_N * | hwNode,
 |  | float32 | moduleFreq,
 |  | uint32 | baudrate,
 |  | uint16 | samplePoint,
 |  | uint16 | synchJumpWidth
 | ) |  |

Calculates the best posible values and configures BTEVR register.

Parameters
hwNode | Pointer to CAN Node registers
moduleFreq | Specifies the CAN module frequency
baudrate | Specifies the node baud rate. Unit: baud
samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.
Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Returns
None

Definition at line 985 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_resetModule()

IFX_EXTERN void IfxMultican_resetModule ( Ifx_CAN * can )

resets Multican kernel

Parameters
can pointer to CAN registers
Returns
None

Definition at line 1209 of file IfxMultican.c.

◆ IfxMultican_setFractionalDividerMode()

IFX_INLINE void IfxMultican_setFractionalDividerMode | ( | Ifx_CAN * | mcan,
 |  | uint16 | mode
 | ) |  |

sets the fractional divider mode

Parameters
mcan | mcan Specifies the CAN module
mode | Divider mode
Returns
None

Definition at line 1596 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_setFractionalDividerStepValue()

IFX_INLINE void IfxMultican_setFractionalDividerStepValue | ( | Ifx_CAN * | mcan,
 |  | uint16 | stepValue
 | ) |  |

sets reload or addition value for the result.

Parameters
mcan | mcan Specifies the CAN module
stepValue | Step Value
Returns
None

Definition at line 1602 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_setInputClock()

IFX_INLINE void IfxMultican_setInputClock | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_ClockSelect | clockSelect
 | ) |  |

Sets the input clock source.

Parameters
mcan | mcan Specifies the CAN module
clockSelect | Clock selection
Returns
None

Definition at line 1608 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_setListCommand()

IFX_EXTERN void IfxMultican_setListCommand | ( | Ifx_CAN * | mcan,
 |  | uint32 | cmd,
 |  | uint32 | arg2,
 |  | uint32 | arg1
 | ) |  |

Execute a command from the command panel.

Parameters
mcan | Specifies the CAN module
cmd | Specifies the command
arg2 | Specifies the second argument
arg1 | Specifies the first argument
Returns
None
  • write to CAN_PANCTR

Definition at line 1228 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_init(), and IfxMultican_MsgObj_deinit().

◆ IfxMultican_setMessageIndexMask()

IFX_INLINE void IfxMultican_setMessageIndexMask | ( | Ifx_CAN * | mcan,
 |  | uint32 | mask
 | ) |  |

clears the message pending interrupt notification of a given list

Parameters
mcan | mcan Specifies the CAN module
mask | Message Index mask
Returns
None

Definition at line 1614 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxMultican_setSleepMode()

IFX_INLINE void IfxMultican_setSleepMode | ( | Ifx_CAN * | can,
 |  | IfxMultican_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
can | pointer to CAN registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 1620 of file IfxMultican.h.

◆ IfxMultican_setSuspendMode()

IFX_INLINE void IfxMultican_setSuspendMode | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_SuspendMode | mode
 | ) |  |

Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
mcan | Pointer to MULTICAN module registers
mode | Module suspend mode
Returns
None

Definition at line 1648 of file IfxMultican.h.

◆ IfxMultican_waitListReady()

IFX_INLINE void IfxMultican_waitListReady ( Ifx_CAN * mcan )

Wait until the list panel is ready.

Parameters
mcan mcan Specifies the CAN module
Returns
None

Definition at line 1629 of file IfxMultican.h.

Referenced by IfxMultican_Can_initModule(), and IfxMultican_setListCommand().


iLLD_TC26B: CAN Nodes

Functions
CAN Nodes
iLLD » MULTICAN » Standard Driver
Collaboration diagram for CAN Nodes:

Functions

IFX_INLINE void | IfxMultican_Node_activate (Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Node_deactivate (Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Node_disableConfigurationChange (Ifx_CAN_N *hwNode)
Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node. More...
IFX_INLINE void | IfxMultican_Node_enableConfigurationChange (Ifx_CAN_N *hwNode)
Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node. More...
IFX_INLINE Ifx_CAN_N * | IfxMultican_Node_getPointer (Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number. More...
IFX_INLINE void | IfxMultican_Node_resetControlRegister (Ifx_CAN_N *hwNode)
Resets the control register of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_resetErrorCounters (Ifx_CAN_N *hwNode)
Resets the error counters of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_resetInterruptPointers (Ifx_CAN_N *hwNode)
Resets the interrupt pointers of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setAlertInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the alert interrupt of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setAlertInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setAnalyzerMode (Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the analyzer mode of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setErrorWarningLevel (Ifx_CAN_N *hwNode, uint8 level)
Determines the threshold value (warning level, default 96) to be reached
in order to set the corresponding error warning bit EWRN. More...
IFX_INLINE void | IfxMultican_Node_setFastNode (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the flexible data rate of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the CAN frame counter overflow interrupt of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterMode (Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
Sets the operation mode of the frame counter of the CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setLastErrorCodeInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the last error code interrupt of CAN node x.
This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error). More...
IFX_INLINE void | IfxMultican_Node_setLastErrorCodeInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setLoopBackMode (Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the loopback mode of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setReceiveErrorCounter (Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the receive error counter of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTimerEventInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setTransceiverDelayCompensation (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transceiver delay compensation of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTransceiverDelayCompensationOffset (Ifx_CAN_N *hwNode, uint16 value)
Sets transceiver delay ompensation offset of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTransferInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transfer interrupt of CAN node x.
This interrupt is generated after the successful reception or transmission of a CAN frame in node x. More...
IFX_INLINE void | IfxMultican_Node_setTransferInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setTransmitErrorCounter (Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the transmit error counter of CAN node x. More...
IFX_INLINE IfxMultican_DataLengthCode | IfxMultican_Node_getCodeFromDataLength (uint32 dataLength)
Return the DLC code corresponding to the data length in byte. More...
IFX_INLINE uint32 | IfxMultican_Node_getDataLengthFromCode (IfxMultican_DataLengthCode code)
Get the datalength in bytes from DLC. More...
IFX_EXTERN void | IfxMultican_Node_deinit (Ifx_CAN_N *hwNode)
Reset the CAN node. More...
IFX_EXTERN boolean | IfxMultican_Node_initRxPin (Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
IFX_EXTERN boolean | IfxMultican_Node_initTxPin (Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Node_recoverBusOff (Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off. More...
IFX_EXTERN void | IfxMultican_Node_setBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register. More...
IFX_EXTERN void | IfxMultican_calcTimingFromBTR (float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing. More...

Detailed Description

Function Documentation

◆ IfxMultican_calcTimingFromBTR()

IFX_EXTERN void IfxMultican_calcTimingFromBTR | ( | float32 | moduleFreq,
 |  | uint32 | btr,
 |  | uint32 * | baudrate,
 |  | uint16 * | samplePoint,
 |  | uint16 * | synchJumpWidth
 | ) |  |

Returns the CAN node timing.

Parameters
moduleFreq | Specifies the CAN module frequency
btr | BTR
baudrate | Baudrate
samplePoint | Sample point
synchJumpWidth | Sync Jump Width
Returns
None

Definition at line 1144 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_getConfig().

◆ IfxMultican_Node_activate()

IFX_INLINE void IfxMultican_Node_activate ( Ifx_CAN_N * hwNode )

Activate the CAN Node. Participate in the CAN bus activities.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1378 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_activate(), IfxMultican_Can_Node_init(), and IfxMultican_Node_recoverBusOff().

◆ IfxMultican_Node_deactivate()

IFX_INLINE void IfxMultican_Node_deactivate ( Ifx_CAN_N * hwNode )

Deactivate the CAN Node. Take out from participation in the CAN bus activities.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1384 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_deactivate(), and IfxMultican_Node_recoverBusOff().

◆ IfxMultican_Node_deinit()

IFX_EXTERN void IfxMultican_Node_deinit ( Ifx_CAN_N * hwNode )

Reset the CAN node.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 592 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_deinit(), and IfxMultican_deinit().

◆ IfxMultican_Node_disableConfigurationChange()

IFX_INLINE void IfxMultican_Node_disableConfigurationChange ( Ifx_CAN_N * hwNode )

Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1390 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_enableConfigurationChange()

IFX_INLINE void IfxMultican_Node_enableConfigurationChange ( Ifx_CAN_N * hwNode )

Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1396 of file IfxMultican.h.

◆ IfxMultican_Node_getCodeFromDataLength()

IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength ( uint32 dataLength )

Return the DLC code corresponding to the data length in byte.

Parameters
dataLength Data length in bytes
Returns
Data length code

Definition at line 1659 of file IfxMultican.h.

◆ IfxMultican_Node_getDataLengthFromCode()

IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode ( IfxMultican_DataLengthCode code )

Get the datalength in bytes from DLC.

Parameters
code Data length code
Returns
Datalength in bytes

Definition at line 1680 of file IfxMultican.h.

◆ IfxMultican_Node_getPointer()

IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_NodeId | node
 | ) |  |

Returns the base address to a given CAN node number.

Parameters
mcan | Specifies the CAN module
node | Specifies the CAN node
Returns
base pointer to CAN node

Definition at line 1402 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_activate(), IfxMultican_Can_Node_deactivate(), IfxMultican_Can_Node_deinit(), IfxMultican_Can_Node_init(), IfxMultican_Can_Node_recoverBusOff(), and IfxMultican_deinit().

◆ IfxMultican_Node_initRxPin()

IFX_EXTERN boolean IfxMultican_Node_initRxPin | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_Rxd_In * | rxd,
 |  | IfxPort_InputMode | mode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Select and initialise the CAN node receive pin.

Parameters
hwNode | Pointer to CAN Node registers
rxd | Rx pin
mode | Input mode
Returns
TRUE: Returns TRUE if the operation was successful
FALSE: Returns FALSE if the operation was errorneous

Definition at line 604 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_initTxPin()

IFX_EXTERN boolean IfxMultican_Node_initTxPin | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_Txd_Out * | txd,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Select and initialise the CAN node transmit pin.

Parameters
hwNode | Pointer to CAN Node registers
txd | Tx pin
mode | Output mode
Returns
TRUE: Returns TRUE if the operation was successful
FALSE: Returns FALSE if the operation was errorneous

Definition at line 614 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_recoverBusOff()

IFX_EXTERN IfxMultican_Status IfxMultican_Node_recoverBusOff ( Ifx_CAN_N * hwNode )

Recovers the CAN node from bus off.

Parameters
hwNode Pointer to CAN Node registers
Returns
Status

Definition at line 623 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_recoverBusOff().

◆ IfxMultican_Node_resetControlRegister()

IFX_INLINE void IfxMultican_Node_resetControlRegister ( Ifx_CAN_N * hwNode )

Resets the control register of CAN Node x.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1408 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_resetErrorCounters()

IFX_INLINE void IfxMultican_Node_resetErrorCounters ( Ifx_CAN_N * hwNode )

Resets the error counters of CAN Node x.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1414 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_resetInterruptPointers()

IFX_INLINE void IfxMultican_Node_resetInterruptPointers ( Ifx_CAN_N * hwNode )

Resets the interrupt pointers of CAN Node x.

Parameters
hwNode Pointer to CAN Node registers
Returns
None

Definition at line 1420 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setAlertInterrupt()

IFX_INLINE void IfxMultican_Node_setAlertInterrupt | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the alert interrupt of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1426 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setAlertInterruptPointer()

IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1432 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setAnalyzerMode()

IFX_INLINE void IfxMultican_Node_setAnalyzerMode | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | mode
 | ) |  |

Enables / Disables the analyzer mode of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
mode | Enable / disable choice
Returns
None

Definition at line 1438 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setBitTiming()

IFX_EXTERN void IfxMultican_Node_setBitTiming | ( | Ifx_CAN_N * | hwNode,
 |  | float32 | moduleFreq,
 |  | uint32 | baudrate,
 |  | uint16 | samplePoint,
 |  | uint16 | synchJumpWidth
 | ) |  |

Calculates the best posible values and configures BTR register.

Parameters
hwNode | Pointer to CAN Node registers
moduleFreq | Specifies the CAN module frequency
baudrate | Specifies the node baud rate. Unit: baud
samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.
Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Returns
None

Definition at line 668 of file IfxMultican.c.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setErrorWarningLevel()

IFX_INLINE void IfxMultican_Node_setErrorWarningLevel | ( | Ifx_CAN_N * | hwNode,
 |  | uint8 | level
 | ) |  |

Determines the threshold value (warning level, default 96) to be reached
in order to set the corresponding error warning bit EWRN.

Parameters
hwNode | Pointer to CAN Node registers
level | Error warning level
Returns
None

Definition at line 1444 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setFastNode()

IFX_INLINE void IfxMultican_Node_setFastNode | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the flexible data rate of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1450 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setFrameCounterInterrupt()

IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the CAN frame counter overflow interrupt of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1458 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setFrameCounterInterruptPointer()

IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1464 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setFrameCounterMode()

IFX_INLINE void IfxMultican_Node_setFrameCounterMode | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_FrameCounterMode | mode
 | ) |  |

Sets the operation mode of the frame counter of the CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
mode | Determines the operation mode of the frame counter
Returns
None

Definition at line 1470 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setLastErrorCodeInterrupt()

IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the last error code interrupt of CAN node x.
This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error).

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1476 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setLastErrorCodeInterruptPointer()

IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1482 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setLoopBackMode()

IFX_INLINE void IfxMultican_Node_setLoopBackMode | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | mode
 | ) |  |

Enables / Disables the loopback mode of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
mode | Enable / disable choice
Returns
None

Definition at line 1488 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setReceiveErrorCounter()

IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter | ( | Ifx_CAN_N * | hwNode,
 |  | uint8 | value
 | ) |  |

Sets the value of the receive error counter of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
value | Receive error counter value
Returns
None

Definition at line 1494 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTimerEventInterruptPointer()

IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1500 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransceiverDelayCompensation()

IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the transceiver delay compensation of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1506 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransceiverDelayCompensationOffset()

IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset | ( | Ifx_CAN_N * | hwNode,
 |  | uint16 | value
 | ) |  |

Sets transceiver delay ompensation offset of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
value | transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15]
Returns
None

Definition at line 1512 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransferInterrupt()

IFX_INLINE void IfxMultican_Node_setTransferInterrupt | ( | Ifx_CAN_N * | hwNode,
 |  | boolean | enabled
 | ) |  |

Enables / Disables the transfer interrupt of CAN node x.
This interrupt is generated after the successful reception or transmission of a CAN frame in node x.

Parameters
hwNode | Pointer to CAN Node registers
enabled | Enable / disable choice
Returns
None

Definition at line 1518 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransferInterruptPointer()

IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer | ( | Ifx_CAN_N * | hwNode,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x.

Parameters
hwNode | Pointer to CAN Node registers
srcId | Service request ID
Returns
None

Definition at line 1524 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().

◆ IfxMultican_Node_setTransmitErrorCounter()

IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter | ( | Ifx_CAN_N * | hwNode,
 |  | uint8 | value
 | ) |  |

Sets the value of the transmit error counter of CAN node x.

Parameters
hwNode | Pointer to CAN Node registers
value | Transmit error counter value
Returns
None

Definition at line 1530 of file IfxMultican.h.

Referenced by IfxMultican_Can_Node_init().


iLLD_TC26B: Message

Functions
Message
iLLD » MULTICAN » Standard Driver
Collaboration diagram for Message:

Functions

IFX_INLINE void | IfxMultican_Message_init (IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
Initializes a CAN message. More...
IFX_INLINE void | IfxMultican_Message_longFrameInit (IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
Initializes a CAN message long frame. More...

Detailed Description

Function Documentation

◆ IfxMultican_Message_init()

IFX_INLINE void IfxMultican_Message_init | ( | IfxMultican_Message * | msg,
 |  | uint32 | id,
 |  | uint32 | dataLow,
 |  | uint32 | dataHigh,
 |  | IfxMultican_DataLengthCode | lengthCode
 | ) |  |

Initializes a CAN message.

Parameters
msg | The message which should be initialized
id | The message ID
dataLow | The lower part of the 64bit data value
dataHigh | The upper part of the 64bit data value
lengthCode | number of bytes (data length code) which should be transmitted (0..8)
Returns
None

Definition at line 1117 of file IfxMultican.h.

◆ IfxMultican_Message_longFrameInit()

IFX_INLINE void IfxMultican_Message_longFrameInit | ( | IfxMultican_Message * | msg,
 |  | uint32 | id,
 |  | IfxMultican_DataLengthCode | lengthCode,
 |  | boolean | fastBitRate
 | ) |  |

Initializes a CAN message long frame.

Parameters
msg | The message which should be initialized
id | The message ID
lengthCode | number of bytes (data length code) which should be transmitted (0..8)
fastBitRate | Fast bit rate (FCR.BRS) enable/ disable choice
Returns
None

Definition at line 1128 of file IfxMultican.h.


iLLD_TC26B: Message Objects

Functions
Message Objects
iLLD » MULTICAN » Standard Driver
Collaboration diagram for Message Objects:

Functions

IFX_INLINE void | IfxMultican_MsgObj_clearDataRegisters (Ifx_CAN_MO *hwObj)
Sets priority class of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearFifoGatewayPointers (Ifx_CAN_MO *hwObj)
Clears the FIFO/GateWay pointers of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearRxPending (Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearTxPending (Ifx_CAN_MO *hwObj)
Clear the TX pending flag of a message object. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_MsgObj_getBottomObjectPointer (Ifx_CAN_MO *hwObj)
Gets bottom object pointer of the base message object. More...
IFX_INLINE IfxMultican_DataLengthCode | IfxMultican_MsgObj_getDataLengthCode (Ifx_CAN_MO *hwObj)
Gets data length code of a message object. More...
IFX_INLINE uint32 | IfxMultican_MsgObj_getMessageId (Ifx_CAN_MO *hwObj)
Gets message identifier of message object. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_MsgObj_getNextObjectPointer (Ifx_CAN_MO *hwObj)
Returns next object pointer (PNEXT) of the current message object. More...
IFX_INLINE Ifx_CAN_MO * | IfxMultican_MsgObj_getPointer (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isExtendedFrame (Ifx_CAN_MO *hwObj)
Get the message object status. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isRxPending (Ifx_CAN_MO *hwObj)
Returns the RX pending flag of a message object. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isTransmitRequested (Ifx_CAN_MO *hwObj)
Returns the TX Request flag of a message object. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isTxPending (Ifx_CAN_MO *hwObj)
Returns the TX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setAcceptanceMask (Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
Sets acceptance mask for the message identifier. More...
IFX_INLINE void | IfxMultican_MsgObj_setBitRateSwitch (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setBottomObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setCurrentObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom current pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataLengthCode (Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataLengthCodeCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data length code copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setExtendedDataLength (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable extended data length of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setGatewayDataFrameSend (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TXRQ of the gateway deatination object. More...
IFX_INLINE void | IfxMultican_MsgObj_setIdentifierCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable identifier copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setIdentifierExtension (Ifx_CAN_MO *hwObj, boolean extension)
Sets identifier extension of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMatchingId (Ifx_CAN_MO *hwObj, boolean matchingId)
Sets acceptance mask for the message IDE bit. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessageId (Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessageMode (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
Sets the message mode of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessagePendingNumber (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
Sets message pending number that selects the bit position of the bit in the Message Pending Register
that is set upon a message object n receive/transmit interrupt. More...
IFX_INLINE void | IfxMultican_MsgObj_setOverflowInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable overflow interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setPriorityClass (Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
Sets priority class of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setReceiveInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable receive interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setReceiveInterruptNodePointer (Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets receive interrupt node pointer of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setRemoteMonitoring (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit object remote monitoring of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSelectObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object select pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSingleDataTransfer (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single data transfer of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSingleTransmitTrial (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single transmit trial of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTopObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets top object pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTransmitInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTransmitInterruptNodePointer (Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets transmit interrupt node pointer of message object. More...
IFX_EXTERN boolean | IfxMultican_MsgObj_cancelSend (Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been started. More...
IFX_EXTERN void | IfxMultican_MsgObj_clearStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object. More...
IFX_EXTERN void | IfxMultican_MsgObj_deinit (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IFX_EXTERN IfxMultican_MsgObjId | IfxMultican_MsgObj_getPendingId (Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IFX_EXTERN IfxMultican_MsgObjStat | IfxMultican_MsgObj_getStatus (Ifx_CAN_MO *hwObj)
Get the message object status. More...
IFX_EXTERN boolean | IfxMultican_MsgObj_getStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_readLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_readMessage (Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_sendLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_sendMessage (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_writeTxfifo (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IFX_EXTERN void | IfxMultican_MsgObj_setFilter (Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter. More...
IFX_EXTERN void | IfxMultican_MsgObj_setStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object. More...

Detailed Description

Function Documentation

◆ IfxMultican_MsgObj_cancelSend()

IFX_EXTERN boolean IfxMultican_MsgObj_cancelSend ( Ifx_CAN_MO * hwObj )

Cancel pending TX request by invalidating the request, only when frame transmission has not been started.

Parameters
hwObj Pointer to CAN message object registers
Returns
TRUE if cancellation was successfully executed

Definition at line 55 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_cancelSend().

◆ IfxMultican_MsgObj_clearDataRegisters()

IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters ( Ifx_CAN_MO * hwObj )

Sets priority class of message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
None

Definition at line 1138 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_clearFifoGatewayPointers()

IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers ( Ifx_CAN_MO * hwObj )

Clears the FIFO/GateWay pointers of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
None

Definition at line 1145 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_clearRxPending()

IFX_INLINE void IfxMultican_MsgObj_clearRxPending ( Ifx_CAN_MO * hwObj )

Clear the RX pending flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
None

Definition at line 1151 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_clearRxPending(), and IfxMultican_Can_MsgObj_readMessage().

◆ IfxMultican_MsgObj_clearStatusFlag()

IFX_EXTERN void IfxMultican_MsgObj_clearStatusFlag | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjStatusFlag | flag
 | ) |  |

Clears the selected status flag of a message object.

Parameters
hwObj | Pointer to CAN message object registers
flag | Message Object status flag
Returns
None

Definition at line 75 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_init(), IfxMultican_MsgObj_clearRxPending(), IfxMultican_MsgObj_clearTxPending(), IfxMultican_MsgObj_doReadLongFrame(), IfxMultican_MsgObj_doReadMessage(), IfxMultican_MsgObj_readLongFrame(), IfxMultican_MsgObj_readMessage(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_clearTxPending()

IFX_INLINE void IfxMultican_MsgObj_clearTxPending ( Ifx_CAN_MO * hwObj )

Clear the TX pending flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
None

Definition at line 1157 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_clearTxPending().

◆ IfxMultican_MsgObj_deinit()

IFX_EXTERN void IfxMultican_MsgObj_deinit | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId
 | ) |  |

Reset the message object
Append the message object to the end of idle list and reset message object registers.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
Returns
None

Definition at line 85 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_deinit(), and IfxMultican_deinit().

◆ IfxMultican_MsgObj_getBottomObjectPointer()

IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer ( Ifx_CAN_MO * hwObj )

Gets bottom object pointer of the base message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
Bottom message object number

Definition at line 1163 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_readMessage(), and IfxMultican_Can_MsgObj_sendMessage().

◆ IfxMultican_MsgObj_getDataLengthCode()

IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode ( Ifx_CAN_MO * hwObj )

Gets data length code of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
CAN frame data length code

Definition at line 1169 of file IfxMultican.h.

Referenced by IfxMultican_MsgObj_doReadLongFrame(), and IfxMultican_MsgObj_doReadMessage().

◆ IfxMultican_MsgObj_getMessageId()

IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId ( Ifx_CAN_MO * hwObj )

Gets message identifier of message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
messageId

Definition at line 1175 of file IfxMultican.h.

Referenced by IfxMultican_MsgObj_doReadLongFrame(), and IfxMultican_MsgObj_doReadMessage().

◆ IfxMultican_MsgObj_getNextObjectPointer()

IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer ( Ifx_CAN_MO * hwObj )

Returns next object pointer (PNEXT) of the current message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
Next message object number

Definition at line 1183 of file IfxMultican.h.

◆ IfxMultican_MsgObj_getPendingId()

IFX_EXTERN IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjGroup | msgObjGroup
 | ) |  |

Get message object ID which has TX/RX pending flag from a message object group.

Parameters
mcan | Specifies the CAN module
msgObjGroup | Message object group
Returns
Message object index

Definition at line 197 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_getPendingId().

◆ IfxMultican_MsgObj_getPointer()

IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId
 | ) |  |

Get base address of a message object register.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
Returns
Pointer to Message Object registers

Definition at line 1189 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_cancelSend(), IfxMultican_Can_MsgObj_clearRxPending(), IfxMultican_Can_MsgObj_clearTxPending(), IfxMultican_Can_MsgObj_getConfig(), IfxMultican_Can_MsgObj_getStatus(), IfxMultican_Can_MsgObj_init(), IfxMultican_Can_MsgObj_isRxPending(), IfxMultican_Can_MsgObj_isTransmitRequested(), IfxMultican_Can_MsgObj_isTxPending(), IfxMultican_Can_MsgObj_readMessage(), IfxMultican_Can_MsgObj_sendMessage(), IfxMultican_MsgObj_deinit(), IfxMultican_MsgObj_doReadLongFrame(), IfxMultican_MsgObj_readLongFrame(), and IfxMultican_MsgObj_sendLongFrame().

◆ IfxMultican_MsgObj_getStatus()

IFX_EXTERN IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus ( Ifx_CAN_MO * hwObj )

Get the message object status.

Parameters
hwObj Pointer to CAN message object registers
Returns
IfxMultican_MsgObjStat bitfield

Definition at line 212 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_getStatus(), IfxMultican_MsgObj_isRxPending(), IfxMultican_MsgObj_isTransmitRequested(), and IfxMultican_MsgObj_isTxPending().

◆ IfxMultican_MsgObj_getStatusFlag()

IFX_EXTERN boolean IfxMultican_MsgObj_getStatusFlag | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjStatusFlag | flag
 | ) |  |

Gets the status of the selected status flag of a message object.

Parameters
hwObj | Pointer to CAN message object registers
flag | Message Object status flag
Returns
Status (TRUE / FALSE)

Definition at line 222 of file IfxMultican.c.

◆ IfxMultican_MsgObj_isExtendedFrame()

IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame ( Ifx_CAN_MO * hwObj )

Get the message object status.

Parameters
hwObj Pointer to CAN message object registers
Returns
Extended frame: True Standard frame: False

Definition at line 1195 of file IfxMultican.h.

Referenced by IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_isRxPending()

IFX_INLINE boolean IfxMultican_MsgObj_isRxPending ( Ifx_CAN_MO * hwObj )

Returns the RX pending flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
TRUE of the RX pending flag of a message object is set

Definition at line 1201 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_isRxPending().

◆ IfxMultican_MsgObj_isTransmitRequested()

IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested ( Ifx_CAN_MO * hwObj )

Returns the TX Request flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
TRUE of the TX Request flag of a message object is set

Definition at line 1208 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_isTransmitRequested().

◆ IfxMultican_MsgObj_isTxPending()

IFX_INLINE boolean IfxMultican_MsgObj_isTxPending ( Ifx_CAN_MO * hwObj )

Returns the TX pending flag of a message object.

Parameters
hwObj Pointer to CAN message object registers
Returns
TRUE of the TX pending flag of a message object is set

Definition at line 1215 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_isTxPending().

◆ IfxMultican_MsgObj_readLongFrame()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readLongFrame | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Read a received CAN long frame.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
msg | The message which should be initialized
data | Pointer to data (in words)
Returns
IfxMultican_Status_newData: if the operation was successful
IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully
IfxMultican_Status_messageLost: if the message lost and new data is not yet ready
IfxMultican_Status_receiveEmpty: if no message is been received

Definition at line 230 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_readLongFrame().

◆ IfxMultican_MsgObj_readMessage()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readMessage | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_Message * | msg
 | ) |  |

Read a received CAN message.

Parameters
hwObj | Pointer to CAN message object registers
msg | This parameter is filled in by the function with the received message. Also when reading is not successful.
Returns
IfxMultican_Status_newData: if the operation was successful
IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully
IfxMultican_Status_messageLost: if the message lost and new data is not yet ready
IfxMultican_Status_receiveEmpty: if no message is been received

Definition at line 292 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_readMessage().

◆ IfxMultican_MsgObj_sendLongFrame()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendLongFrame | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Send a CAN Long frame message.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
msg | The message which should be initialized
data | Pointer to data (in words)
Returns
IfxMultican_Status_ok: if the operation was successful IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

Definition at line 344 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_sendLongFrame().

◆ IfxMultican_MsgObj_sendMessage()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendMessage | ( | Ifx_CAN_MO * | hwObj,
 |  | const IfxMultican_Message * | msg
 | ) |  |

Send a CAN message.

Parameters
hwObj | Pointer to CAN message object registers
msg | Specifies the message to be send
Returns
IfxMultican_Status_ok: if the operation was successful IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

Definition at line 464 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_sendMessage().

◆ IfxMultican_MsgObj_setAcceptanceMask()

IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask | ( | Ifx_CAN_MO * | hwObj,
 |  | uint32 | mask,
 |  | boolean | extendedFrame
 | ) |  |

Sets acceptance mask for the message identifier.

Parameters
hwObj | Pointer to CAN message object registers
mask | Acceptance Mask for the message identifier
extendedFrame | Extended frame enabled / disabled
Returns
None

Definition at line 1222 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setBitRateSwitch()

IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable bit rate switch of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1228 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init(), and IfxMultican_MsgObj_sendLongFrame().

◆ IfxMultican_MsgObj_setBottomObjectPointer()

IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer | ( | Ifx_CAN_MO * | hwObj,
 |  | sint32 | objNumber
 | ) |  |

Sets bottom object pointer of the base message object.

Parameters
hwObj | Pointer to CAN message object registers
objNumber | Bottom message object number
Returns
None

Definition at line 1234 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setCurrentObjectPointer()

IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer | ( | Ifx_CAN_MO * | hwObj,
 |  | sint32 | objNumber
 | ) |  |

Sets bottom current pointer of the base message object.

Parameters
hwObj | Pointer to CAN message object registers
objNumber | Current message object number
Returns
None

Definition at line 1240 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setDataCopy()

IFX_INLINE void IfxMultican_MsgObj_setDataCopy | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable data copy of a gateway source message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1246 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setDataLengthCode()

IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_DataLengthCode | code
 | ) |  |

Sets data length code of a message object.

Parameters
hwObj | Pointer to CAN message object registers
code | CAN frame data length code
Returns
None

Definition at line 1252 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_setDataLengthCodeCopy()

IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable data length code copy of a gateway source message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1258 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setExtendedDataLength()

IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable extended data length of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1264 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setFilter()

IFX_EXTERN void IfxMultican_MsgObj_setFilter | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | extend,
 |  | uint32 | id,
 |  | uint32 | accMask
 | ) |  |

Set message object filter.

Parameters
hwObj | Pointer to CAN message object registers
extend | TRUE/FALSE : extended ID
id | ID
accMask | acceptance mask
Returns
None

Definition at line 564 of file IfxMultican.c.

◆ IfxMultican_MsgObj_setGatewayDataFrameSend()

IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TXRQ of the gateway deatination object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1270 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setIdentifierCopy()

IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable identifier copy of a gateway source message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1276 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setIdentifierExtension()

IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | extension
 | ) |  |

Sets identifier extension of message object.

Parameters
hwObj | Pointer to CAN message object registers
extension | Acceptance Mask for the message IDE bit
Returns
None

Definition at line 1282 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setMatchingId()

IFX_INLINE void IfxMultican_MsgObj_setMatchingId | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | matchingId
 | ) |  |

Sets acceptance mask for the message IDE bit.

Parameters
hwObj | Pointer to CAN message object registers
matchingId | Acceptance Mask for the message IDE bit
Returns
None

Definition at line 1288 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setMessageId()

IFX_INLINE void IfxMultican_MsgObj_setMessageId | ( | Ifx_CAN_MO * | hwObj,
 |  | uint32 | messageId,
 |  | boolean | extendedFrame
 | ) |  |

Sets message identifier of message object.

Parameters
hwObj | Pointer to CAN message object registers
messageId | CAN Identifier of message object
extendedFrame | Extended frame enabled / disabled
Returns
None

Definition at line 1294 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_setMessageMode()

IFX_INLINE void IfxMultican_MsgObj_setMessageMode | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjMode | mode
 | ) |  |

Sets the message mode of a message object.

Parameters
hwObj | Pointer to CAN message object registers
mode | CAN Message Object Mode
Returns
None

Definition at line 1300 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setMessagePendingNumber()

IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjId | messageNumber
 | ) |  |

Sets message pending number that selects the bit position of the bit in the Message Pending Register
that is set upon a message object n receive/transmit interrupt.

Parameters
hwObj | Pointer to CAN message object registers
messageNumber | Message pending number
Returns
None

Definition at line 1306 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setOverflowInterrupt()

IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable overflow interrupt of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1312 of file IfxMultican.h.

◆ IfxMultican_MsgObj_setPriorityClass()

IFX_INLINE void IfxMultican_MsgObj_setPriorityClass | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_Priority | priority
 | ) |  |

Sets priority class of message object.

Parameters
hwObj | Pointer to CAN message object registers
priority | One of the priority classes 0, 1, 2, 3 to message object n
Returns
None

Definition at line 1318 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setReceiveInterrupt()

IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable receive interrupt of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1324 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setReceiveInterruptNodePointer()

IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Sets receive interrupt node pointer of message object.

Parameters
hwObj | Pointer to CAN message object registers
srcId | Service request ID
Returns
None

Definition at line 1330 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setRemoteMonitoring()

IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable transmit object remote monitoring of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1336 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setSelectObjectPointer()

IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer | ( | Ifx_CAN_MO * | hwObj,
 |  | sint32 | objNumber
 | ) |  |

Sets bottom object select pointer of the base message object.

Parameters
hwObj | Pointer to CAN message object registers
objNumber | Select message object number
Returns
None

Definition at line 1342 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setSingleDataTransfer()

IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable single data transfer of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1348 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setSingleTransmitTrial()

IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable single transmit trial of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1354 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setStatusFlag()

IFX_EXTERN void IfxMultican_MsgObj_setStatusFlag | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_MsgObjStatusFlag | flag
 | ) |  |

Sets the selected status flag of a message object.

Parameters
hwObj | Pointer to CAN message object registers
flag | Message Object status flag
Returns
None

Definition at line 581 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_init(), IfxMultican_Can_MsgObj_sendMessage(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_MsgObj_sendMessage(), and IfxMultican_MsgObj_writeTxfifo().

◆ IfxMultican_MsgObj_setTopObjectPointer()

IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer | ( | Ifx_CAN_MO * | hwObj,
 |  | sint32 | objNumber
 | ) |  |

Sets top object pointer of the base message object.

Parameters
hwObj | Pointer to CAN message object registers
objNumber | Top message object number
Returns
None

Definition at line 1360 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setTransmitInterrupt()

IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt | ( | Ifx_CAN_MO * | hwObj,
 |  | boolean | enabled
 | ) |  |

Enable / Disable transmit interrupt of a message object.

Parameters
hwObj | Pointer to CAN message object registers
enabled | Enable / disable choice
Returns
None

Definition at line 1366 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_setTransmitInterruptNodePointer()

IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Sets transmit interrupt node pointer of message object.

Parameters
hwObj | Pointer to CAN message object registers
srcId | Service request ID
Returns
None

Definition at line 1372 of file IfxMultican.h.

Referenced by IfxMultican_Can_MsgObj_init().

◆ IfxMultican_MsgObj_writeTxfifo()

IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_writeTxfifo | ( | Ifx_CAN_MO * | hwObj,
 |  | const IfxMultican_Message * | msg
 | ) |  |

Send a CAN message.

Parameters
hwObj | Pointer to CAN message object registers
msg | Specifies the message to be send
Returns
IfxMultican_Status_ok: if the operation was successful IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

Definition at line 512 of file IfxMultican.c.

Referenced by IfxMultican_Can_MsgObj_sendMessage().


iLLD_TC26B: Interrupts

Functions
Interrupts
iLLD » MULTICAN » Standard Driver
Collaboration diagram for Interrupts:

Functions

IFX_EXTERN volatile Ifx_SRC_SRCR * IfxMultican_getSrcPointer (Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register. More...

Detailed Description

Function Documentation

◆ IfxMultican_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxMultican_getSrcPointer | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_SrcId | srcId
 | ) |  |

Get the interrupt source register.

Parameters
mcan | Specifies the CAN module
srcId | Specifies the service request ID
Returns
Address of the interrupt source register

Definition at line 1203 of file IfxMultican.c.

Referenced by IfxMultican_Can_initModule().


iLLD_TC26B: MULTICAN Pin Mapping

Data Structures | Macros | Variables
MULTICAN Pin Mapping
iLLD » MULTICAN
Collaboration diagram for MULTICAN Pin Mapping:

Data Structures

struct | IfxMultican_Rxd_In
RXD pin mapping structure. More...
struct | IfxMultican_Txd_Out
TXD pin mapping structure. More...

Macros

#define | IFXMULTICAN_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXMULTICAN_PINMAP_NUM_NODES 4
#define | IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5
#define | IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN
CAN0_RXDA: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN
CAN0_RXDB: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN
CAN0_RXDD: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN
CAN0_RXDE: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN
CAN1_RXDA: CAN node 1 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN
CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN
CAN1_RXDD: CAN node 1 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN
CAN2_RXDA: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN
CAN2_RXDB: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN
CAN2_RXDD: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN
CAN2_RXDE: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN
CAN3_RXDA: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN
CAN3_RXDB: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN
CAN3_RXDC: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN
CAN3_RXDD: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN
CAN3_RXDE: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT
CAN1_TXD: CAN node 1 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT
CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT
CAN1_TXD: CAN node 1 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN const IfxMultican_Rxd_In * | IfxMultican_Rxd_In_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxMultican_Rxd_In table. More...
IFX_EXTERN const IfxMultican_Txd_Out * | IfxMultican_Txd_Out_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxMultican_Txd_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxMultican_Rxd_In

struct IfxMultican_Rxd_In

RXD pin mapping structure.

Definition at line 39 of file IfxMultican_PinMap.h.

Collaboration diagram for IfxMultican_Rxd_In:
[legend]
Data Fields
Ifx_CAN * | module | Base address.
IfxMultican_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxMultican_Txd_Out

struct IfxMultican_Txd_Out

TXD pin mapping structure.

Definition at line 48 of file IfxMultican_PinMap.h.

Collaboration diagram for IfxMultican_Txd_Out:
[legend]
Data Fields
Ifx_CAN * | module | Base address.
IfxMultican_NodeId | nodeId | Node ID.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXMULTICAN_PINMAP_NUM_MODULES

#define IFXMULTICAN_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 90 of file IfxMultican_PinMap.h.

◆ IFXMULTICAN_PINMAP_NUM_NODES

#define IFXMULTICAN_PINMAP_NUM_NODES 4

Definition at line 91 of file IfxMultican_PinMap.h.

◆ IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS

#define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5

Definition at line 92 of file IfxMultican_PinMap.h.

◆ IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS

#define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5

Definition at line 93 of file IfxMultican_PinMap.h.

Variable Documentation

◆ IfxMultican_RXD0A_P02_1_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN

CAN0_RXDA: CAN node 0 input.

Definition at line 56 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD0B_P20_7_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN

CAN0_RXDB: CAN node 0 input.

Definition at line 57 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD0D_P02_4_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN

CAN0_RXDD: CAN node 0 input.

Definition at line 58 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD0E_P33_7_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN

CAN0_RXDE: CAN node 0 input.

Definition at line 59 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD1A_P15_3_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN

CAN1_RXDA: CAN node 1 input.

Definition at line 60 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD1B_P14_1_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN

CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function.

Definition at line 61 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD1D_P00_1_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN

CAN1_RXDD: CAN node 1 input.

Definition at line 62 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD2A_P15_1_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN

CAN2_RXDA: CAN node 2 input.

Definition at line 63 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD2B_P02_3_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN

CAN2_RXDB: CAN node 2 input.

Definition at line 64 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD2D_P14_8_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN

CAN2_RXDD: CAN node 2 input.

Definition at line 65 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD2E_P10_2_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN

CAN2_RXDE: CAN node 2 input.

Definition at line 66 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3A_P00_3_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN

CAN3_RXDA: CAN node 3 input.

Definition at line 67 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3B_P32_2_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN

CAN3_RXDB: CAN node 3 input.

Definition at line 68 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3C_P20_0_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN

CAN3_RXDC: CAN node 3 input.

Definition at line 69 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3D_P11_10_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN

CAN3_RXDD: CAN node 3 input.

Definition at line 70 of file IfxMultican_PinMap.h.

◆ IfxMultican_RXD3E_P20_9_IN

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN

CAN3_RXDE: CAN node 3 input.

Definition at line 71 of file IfxMultican_PinMap.h.

◆ IfxMultican_Rxd_In_pinTable

IFX_EXTERN const IfxMultican_Rxd_In* IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]

IfxMultican_Rxd_In table.

Definition at line 97 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD0_P02_0_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT

CAN0_TXD: CAN node 0 output.

Definition at line 72 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD0_P02_5_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT

CAN0_TXD: CAN node 0 output.

Definition at line 73 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD0_P20_8_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT

CAN0_TXD: CAN node 0 output.

Definition at line 74 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD0_P33_8_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT

CAN0_TXD: CAN node 0 output.

Definition at line 75 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD1_P00_0_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT

CAN1_TXD: CAN node 1 output.

Definition at line 76 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD1_P14_0_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT

CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function.

Definition at line 77 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD1_P15_2_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT

CAN1_TXD: CAN node 1 output.

Definition at line 78 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD2_P02_2_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT

CAN2_TXD: CAN node 2 output.

Definition at line 79 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD2_P10_3_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT

CAN2_TXD: CAN node 2 output.

Definition at line 80 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD2_P14_10_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT

CAN2_TXD: CAN node 2 output.

Definition at line 81 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD2_P15_0_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT

CAN2_TXD: CAN node 2 output.

Definition at line 82 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P00_2_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 83 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P11_12_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 84 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P20_10_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 85 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P20_3_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 86 of file IfxMultican_PinMap.h.

◆ IfxMultican_TXD3_P32_3_OUT

IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT

CAN3_TXD: CAN node 3 output.

Definition at line 87 of file IfxMultican_PinMap.h.

◆ IfxMultican_Txd_Out_pinTable

IFX_EXTERN const IfxMultican_Txd_Out* IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]

IfxMultican_Txd_Out table.

Definition at line 100 of file IfxMultican_PinMap.h.


iLLD_TC26B: How to use the CAN Interface driver?

How to use the CAN Interface driver?
iLLD » MULTICAN
Collaboration diagram for How to use the CAN Interface driver?:

The CAN interface driver provides a default configuration for various modes.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Multican/Can/IfxMultican_Can.h>

Variables

Declare the CAN handles as global variables in your C code:

// CAN handle
IfxMultican_Can can;
// Nodes handles
IfxMultican_Can_Node canSrcNode;
IfxMultican_Can_Node canDstNode;
// Message Object handles
IfxMultican_Can_MsgObj canSrcMsgObj;
IfxMultican_Can_MsgObj canDstMsgObj;
const unsigned id = 0x100;

Module Initialisation

The module initialisation can be done as followed: only module clock is supported for clock selection as of now

// create configuration
IfxMultican_Can_Config canConfig;
IfxMultican_Can_initModuleConfig(&canConfig, &MODULE_CAN);
// initialize module
// IfxMultican_Can can; // defined globally
IfxMultican_Can_initModule(&can, &canConfig);

Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.

Node Initialisation

The Can nodes initialisation can be done as followed:

// create CAN node config
IfxMultican_Can_NodeConfig canNodeConfig;
IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
canNodeConfig.baudrate = 1000000; // 1 MBaud
// Source Node
// IfxMultican_Can_Node canSrcNode; // defined globally
{
canNodeConfig.nodeId = IfxMultican_NodeId_0;
canNodeConfig.rxPin = &IIfxMultican_RXD0B_P20_7_IN;
canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
// initialise the node
IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
}
// Destination Node
// IfxMultican_Can_Node canDstNode; // defined globally
{
canNodeConfig.nodeId = IfxMultican_NodeId_1;
canNodeConfig.rxPin = &IfxMultican_RXD1B_P14_1_IN;
canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
canNodeConfig.txPin = &IfxMultican_TXD1_P14_0_OUT;
canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
// initialise the node
IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
}

Message Object Initialisation

The Can message objects initialisation can be done as followed:

// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
// assigned message object:
canMsgObjConfig.msgObjId = 0;
canMsgObjConfig.messageId = id; // 'id' is defined globally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
// assigned message object:
canMsgObjConfig.msgObjId = 1;
canMsgObjConfig.messageId = id;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

The MULTICAN is ready for use now!

Single Data Transfers

The CAN driver provides simple to use transfer functions

Data can be sent by the following way:

const unsigned dataLow = 0xC0CAC01A;
const unsigned dataHigh = 0xBA5EBA11;
// Initialise the message strcture
IfxMultican_Message txMsg;
IfxMultican_Message_init(&txMsg, id, dataLow, dataHigh, IfxMultican_DataLengthCode_8);
// Transmit Data
while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );

Data can be received by the following way:

// Receiving Data
// Initialise the message structure with dummy values, will be replaced by the received values
IfxMultican_Message rxMsg;
IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
// wait until Multican received a new message
while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
// read message
IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
// if no new data is been received report an error
if( !( readStatus & IfxMultican_Status_newData ) ) {
clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// if a new data is been received but one lost, report the status
if( readStatus == IfxMultican_Status_newDataButOneLost ) {
clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// data now available at rxMsg.data[0] and rxMsg.data[1]

FIFO based Transfers

A transmit and receive FIFO can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item. and specifying the message object number of first slave object with the canMsgObjConfig.firstSlaveObjId item.

Message objects will be allocated to the FIFO in ascending order.

Here a configuration example:

//add the following defines to your code globally
#define FIFO_SIZE 16
#define FIFO_SIZE 8
// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
// FIFO MsgObj allocation:
canMsgObjConfig.msgObjId = 0; // will allocate MsgObj 0
canMsgObjConfig.msgObjCount = FIFO_SIZE/2;
canMsgObjConfig.firstSlaveObjId = 1;
canMsgObjConfig.messageId = id; // 'id' defined gloabally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
// FIFO MsgObj allocation:
canMsgObjConfig.msgObjId = FIFO_SIZE + 1; // avoid clashing with transmit FIFO message objects
canMsgObjConfig.msgObjCount = FIFO_SIZE;
canMsgObjConfig.firstSlaveObjId = FIFO_SIZE + 2;
canMsgObjConfig.messageId = id; // 'id' defined gloabally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).

here is a transmit example

IfxMultican_Message txMsg;
for (i = 0; i < FIFO_SIZE; ++i)
{
// Transmit Data from the source message object //
IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
}

data can be read by the following way

IfxMultican_Message rxMsg;
for (i = 0; i < FIFO_SIZE; ++i)
{
// Receiving Data, read the data from the destination receive Fifo //
// wait until MCAN received the frame
// wait until Multican received a new message
while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
}

CAN FD Data Transfers

The CAN driver provides simple to use FD transfer functions After initialising the module, choose the node initialisation as the following Node configuration:

// create CAN node config
IfxMultican_Can_NodeConfig canNodeConfig;
IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
canNodeConfig.baudrate = 1000000; // 1 MBaud
// Source Node
// IfxMultican_Can_Node canSrcNode; // defined globally
{
canNodeConfig.nodeId = IfxMultican_NodeId_0;
canNodeConfig.rxPin = &IfxMultican_RXD0B_P20_7_IN;
canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
// choose CAN FD transfer enable or disable //
canNodeConfig.flexibleDataRate = TRUE;
// if CAN FD enabled choose the FD configuration //
canNodeConfig.fdConfig.nominalBaudrate = 500000;
canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
canNodeConfig.fdConfig.nominalSamplePoint = 2000;
canNodeConfig.fdConfig.fastBaudrate = 1000000;
canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
canNodeConfig.fdConfig.fastSamplePoint = 2000;
canNodeConfig.fdConfig.loopDelayOffset = 0;
// initialise the node
IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
}
// Destination Node
// IfxMultican_Can_Node canDstNode; // defined globally
{
canNodeConfig.nodeId = IfxMultican_NodeId_1;
canNodeConfig.rxPin = IfxMultican_RXD1B_P14_1_IN;
canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
canNodeConfig.txPin = IfxMultican_TXD1_P14_0_OUT;
canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
// choose CAN FD transfer enable or disable //
config->flexibleDataRate = TRUE;
// if CAN FD enabled choose the FD configuration //
canNodeConfig.fdConfig.nominalBaudrate = 500000;
canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
canNodeConfig.fdConfig.nominalSamplePoint = 2000;
canNodeConfig.fdConfig.fastBaudrate = 1000000;
canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
canNodeConfig.fdConfig.fastSamplePoint = 2000;
canNodeConfig.fdConfig.loopDelayOffset = 0;
// initialise the node
IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
}

The CAN FD message objects initialisation can be done as followed:

// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
// assigned message object:
canMsgObjConfig.msgObjId = 0;
canMsgObjConfig.messageId = id; // 'id' defined gloabally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.control.topMsgObjId = 250;
canMsgObjConfig.control.bottomMsgObjId = 251;
canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
// assigned message object:
canMsgObjConfig.msgObjId = 1;
canMsgObjConfig.messageId = id;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.control.topMsgObjId = 252;
canMsgObjConfig.control.bottomMsgObjId = 253;
canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

In case of standard messages, data can be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).

In case of long frames of length more than 8 bytes the data can be sent in the following way

// load txData buffer with the data that needs to be send
// txData is assumed to be declared globally
int i;
for (i = 0; i < 16; ++i)
{
// uint32 txData[16]; // defined globally
txData[i] = (0x11110000 + i);
}
// Initialise the message strcture
IfxMultican_Message txMsg;
IfxMultican_Message_longFrameInit(&txMsg, id, IfxMultican_DataLengthCode_64, FALSE);
// Transmit Data
while( IfxMultican_Can_MsgObj_sendlongFrame(&canSrcMsgObj, &txMsg, txData) == IfxMultican_Status_notSentBusy );

You can recieve the data by the following way

// Receiving Data
// Initialise the message strcture with dummy values, will be replaced by the received values
IfxMultican_Message rxMsg;
IfxMultican_Message_longFrameInit(&rxMsg, 0xdead, IfxMultican_DataLengthCode_64, FALSE); // start with invalid values
// wait until Multican received a new message
while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
// read the message
//uint32 rxData[16]; //defined globally
IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readLongFrame(&canDstMsgObj, &rxMsg, rxData);
// if no new data is been received report an error
if( !( readStatus & IfxMultican_Status_newData ) ) {
clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// if a new data is been received but one lost, report the status
if( readStatus == IfxMultican_Status_newDataButOneLost ) {
clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// clear pending flag
IfxMultican_Can_MsgObj_clearRxPending(&canDstMsgObj);
// data will be available at rxData

Gateway Transfers

After initialising th emodule and nodes, the gateway message objects can be initialised in the following way

A Gateway transfers can be enabled during the message object configuration by specifing with the canMsgObjConfig.gatewayTransfersEnable item.

Here a configuration example:

// source message object
// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
canMsgObjConfig.msgObjId = 0;
canMsgObjConfig.messageId = id; // 'id' defined globally
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// gateway source message object //
// data will be received into this object from SrcObj, and then copied into gateway destination object //
IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
canMsgObjConfig.msgObjId = 1;
canMsgObjConfig.messageId = id;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = TRUE;
canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
canMsgObjConfig.gatewayConfig.copyData = TRUE;
canMsgObjConfig.gatewayConfig.copyId = FALSE;
canMsgObjConfig.gatewayConfig.enableTransmit = TRUE; // if this is not choosen, then no need to initialise canDstMsgObj to read the final data
canMsgObjConfig.gatewayConfig.gatewayDstObjId = 3; // specify the destination object number
// initialize message object
IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
}
// gateway destination object //
// data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
// and then sent onto the bus for sending the message to destination message object //
IfxMultican_Can_MsgObj canGatewayDstMsgObj;
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
canMsgObjConfig.msgObjId = 3;
canMsgObjConfig.messageId = 0x200;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
}
// destination message object, not needed if enableTransmit is not chosen in gateway source object, or you don't want to read the data//
// data will be received from GatewayDstObj into this obj //
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
canMsgObjConfig.msgObjId = 10;
canMsgObjConfig.messageId = 0x200;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = FALSE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).

The data flow is as followed,

Data will be sent from the source object (canSrcMsgObj), it will be received by the gateway source object (canGatewaySrcMsgObj). and then gets copied into the gateway destination object (canGatewayDstMsgObj) without CPU intervention,

If GDFS is selected in gateway source object (canGatewaySrcMsgObj)then, the data will be transmitted from gateway destination object(canGatewayDstMsgObj) to the destination object (canDstMsgObj)

Gateway FIFO based Transfers

After initialising the module and nodes,

A gateway FIFO transfers can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item. and enbling the gateway transfers with the canMsgObjConfig.gatewayTransfersEnable item. and also by selecting the start object of the FIFO with the canMsgObjConfig.firstSlaveObjId item.

Message objects will be allocated to the gateway FIFO in ascending order. Here a configuration example:

// source message object, you can even make it as a Tx FIFO
// IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
canMsgObjConfig.msgObjId = 0;
canMsgObjConfig.messageId = id;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
}
// gateway source Fifo //
// data will be received into this object from SrcObj, and then copied into gateway Fifo objects //
IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
canMsgObjConfig.msgObjId = 1;
canMsgObjConfig.messageId = id;
canMsgObjConfig.msgObjCount = 4; // FIFO
canMsgObjConfig.firstSlaveObjId = 2; // will allocate MsgObj 2..5 for the gateway FIFO
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = TRUE;
canMsgObjConfig.gatewayTransfers = TRUE; // gateway FIFO
canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
canMsgObjConfig.gatewayConfig.copyData = TRUE;
canMsgObjConfig.gatewayConfig.copyId = FALSE;
canMsgObjConfig.gatewayConfig.enableTransmit = TRUE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
}
int i = 0;
for (i = 0; i < 4 ; ++i)
{
// gateway destination objects //
// data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
// and then sent onto the bus for sending the message to destination receive Fifo message objects //
IfxMultican_Can_MsgObj canGatewayDstMsgObj;
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
canMsgObjConfig.msgObjId = 2 + i;
canMsgObjConfig.messageId = 0x200;
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_transmit;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = FALSE;
canMsgObjConfig.gatewayTransfers = FALSE;
// initialize message object
IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
}
}
// destination receive Fifo,
// data will be received from GatewayDstObj into this Fifo //
// IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
{
// create message object config
IfxMultican_Can_MsgObjConfig canMsgObjConfig;
IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
canMsgObjConfig.msgObjId = 10;
canMsgObjConfig.messageId = 0x200;
canMsgObjConfig.msgObjCount = 4; // receive FIFO
canMsgObjConfig.firstSlaveObjId = 11; // will allocate MsgObj 11..14 for the receive FIFO
canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
canMsgObjConfig.frame = IfxMultican_Frame_receive;
canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
canMsgObjConfig.control.extendedFrame = FALSE;
canMsgObjConfig.control.matchingId = FALSE;
canMsgObjConfig.gatewayTransfers = FALSE;
canMsgObjConfig.firstSlaveObjId = 11;
// initialize message object
IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
}

Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above). here is a transmit example

for (i = 0; i < 4; ++i)
{
// Transmit Data from the source message object //
IfxMultican_Message txMsg;
IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
}

The data flow is as followed,

data will be sent from the source object (canSrcMsgObj) or source TX FIFO, it will be received by the gateway source FIFO (canGatewaySrcMsgObj). and then gets copied into the gateway destination objects (canGatewayDstMsgObj) without CPU intervention,

If GDFS is selected in gateway source object (FIFO) (canGatewaySrcMsgObj)then, the data will be transmitted from gateway destination objects (canGatewayDstMsgObj) to the destination objects or receive FIFO (canDstMsgObj)

data can be read by the following way

for (i = 0; i < 4; ++i)
{
// Receiving Data, read the data from the destination receive Fifo //
// wait until MCAN received the frame
// wait until Multican received a new message
while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
IfxMultican_Message rxMsg;
IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
// if no new data is been received report an error
if( !( readStatus & IfxMultican_Status_newData ) ) {
clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
// if a new data is been received but one lost, report the status
if( readStatus == IfxMultican_Status_newDataButOneLost ) {
clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
}
}


iLLD_TC26B: CAN

Modules
CAN
iLLD » MULTICAN
Collaboration diagram for CAN:

Modules

Data structures
General functions
CAN Nodes
Message Objects
Interrupts

Detailed Description


iLLD_TC26B: Data structures

Data Structures
Data structures
iLLD » MULTICAN » CAN
Collaboration diagram for Data structures:

Data Structures

struct | IfxMultican_Can_FdConfig
Structure for CAN FD configuration. More...
struct | IfxMultican_Can_GatewayConfig
Structure for gateway configuration. More...
struct | IfxMultican_Can_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxMultican_Can_InterruptSource
Structure for interrupt source. More...
struct | IfxMultican_Can_MsgObjControl
Message object control. More...
struct | IfxMultican_Can_Node
CAN node handle data structure. More...
struct | IfxMultican_Can
CAN handle data structure. More...
struct | IfxMultican_Can_Config
CAN module configuration. More...
struct | IfxMultican_Can_MsgObj
CAN message object handle data structure. More...
struct | IfxMultican_Can_MsgObjConfig
CAN message object configuration. More...
struct | IfxMultican_Can_NodeConfig
CAN Node configuration. More...

Detailed Description

Data Structure Documentation

◆ IfxMultican_Can_FdConfig

struct IfxMultican_Can_FdConfig

Structure for CAN FD configuration.

Definition at line 765 of file IfxMultican_Can.h.

Data Fields
uint32 | fastBaudrate | Specifies the FD fast baudrate (Data Bit rate)
uint16 | fastSamplePoint | Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
uint16 | fastSynchJumpWidth | Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total fast bit time.
uint16 | loopDelayOffset | Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15].
uint32 | nominalBaudrate | Specifies the FD nominal baudrate (Nominal Bit Rate)
uint16 | nominalSamplePoint | Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
uint16 | nominalSynchJumpWidth | Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time.

◆ IfxMultican_Can_GatewayConfig

struct IfxMultican_Can_GatewayConfig

Structure for gateway configuration.

Definition at line 778 of file IfxMultican_Can.h.

Data Fields
uint32 | copyData: 1 | Specifies the choice for copying data (data low and data high)
uint32 | copyDataLengthCode: 1 | Specifies the choice for copying data length code.
uint32 | copyId: 1 | Specifies the choice for copying id of the message.
uint32 | enableTransmit: 1 | Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object)
IfxMultican_MsgObjId | gatewayDstObjId | Message object number of first slave object (bottom pointer)

◆ IfxMultican_Can_InterruptConfig

struct IfxMultican_Can_InterruptConfig

Structure for interrupt configuration.

Definition at line 789 of file IfxMultican_Can.h.

Data Fields
uint16 | priority | interrupt priority
IfxSrc_Tos | typeOfService | type of interrupt service

◆ IfxMultican_Can_InterruptSource

struct IfxMultican_Can_InterruptSource

Structure for interrupt source.

Definition at line 797 of file IfxMultican_Can.h.

Data Fields
boolean | enabled | If true, enables the interrupt generation.
IfxMultican_SrcId | srcId | interrupt node pointer used

◆ IfxMultican_Can_MsgObjControl

struct IfxMultican_Can_MsgObjControl

Message object control.

Definition at line 805 of file IfxMultican_Can.h.

Data Fields
IfxMultican_MsgObjId | bottomMsgObjId | Specifies the ID of the message object with data byte 36 to 63. (CAN FD)
uint32 | extendedFrame: 1 | Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit ID.
uint32 | fastBitRate: 1 | Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate.
uint32 | matchingId: 1 | Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with maching IDE.
IfxMultican_DataLengthCode | messageLen | Specifies the length of the transmited data (number of bytes). This value is ignored for receive object.
uint32 | singleDataTransfer: 1 | Specifies the single data transfer option. If 1, single data transfer is selected.
uint32 | singleTransmitTrial: 1 | Specifies the single transmit trial option. If 1, single transmit trial is selected.
IfxMultican_MsgObjId | topMsgObjId | Specifies the ID of the message object with data byte 8 to 35. (CAN FD)

◆ IfxMultican_Can_Node

struct IfxMultican_Can_Node

CAN node handle data structure.

Definition at line 819 of file IfxMultican_Can.h.

Data Fields
boolean | fastNode | CAN FD fast node enable/disable.
Ifx_CAN * | mcan | Specifies the pointer to the MULTICAN module registers.
Ifx_CAN_N * | node | Specifies the pointer to the MULTICAN node registers.
IfxMultican_NodeId | nodeId | Specifies the node Id.

◆ IfxMultican_Can

struct IfxMultican_Can

CAN handle data structure.

Definition at line 833 of file IfxMultican_Can.h.

Data Fields
Ifx_CAN * mcan Specifies the pointer to the MULTICAN module registers.

◆ IfxMultican_Can_Config

struct IfxMultican_Can_Config

CAN module configuration.

Definition at line 840 of file IfxMultican_Can.h.

Collaboration diagram for IfxMultican_Can_Config:
[legend]
Data Fields
IfxMultican_ClockSelect | clockSelect | Selected module input clock.
Ifx_CAN * | module | pointer to MULTICAN module
float32 | moduleFreq | Required module frequency in Hertz.
IfxMultican_Can_InterruptConfig | nodePointer[IFXMULTICAN_NUM_SRC] | Node pointer configuration.

◆ IfxMultican_Can_MsgObj

struct IfxMultican_Can_MsgObj

CAN message object handle data structure.

Definition at line 850 of file IfxMultican_Can.h.

Collaboration diagram for IfxMultican_Can_MsgObj:
[legend]
Data Fields
IfxMultican_MsgObjId | fifoPointer | Pointer for FIFO based transfers.
uint16 | msgObjCount | Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers)
IfxMultican_MsgObjId | msgObjId | Specifies the message object ID.
IfxMultican_Can_Node * | node | Specifies the pointer to the node handle.

◆ IfxMultican_Can_MsgObjConfig

struct IfxMultican_Can_MsgObjConfig

CAN message object configuration.

Definition at line 860 of file IfxMultican_Can.h.

Collaboration diagram for IfxMultican_Can_MsgObjConfig:
[legend]
Data Fields
uint32 | acceptanceMask | Specifies the acceptance mask.
IfxMultican_Can_MsgObjControl | control | Message object control.
IfxMultican_MsgObjId | firstSlaveObjId | Message object number of first slave object (bottom pointer)
IfxMultican_Frame | frame | Specifies the frame type.
IfxMultican_Can_GatewayConfig | gatewayConfig | Structure for gateway configuration.
uint32 | gatewayTransfers: 1 | Specifies the gateway source object (gateway transfres enable / disable choice)
uint32 | messageId | Specifies the message ID.
uint16 | msgObjCount | Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers)
IfxMultican_MsgObjId | msgObjId | Specifies the message object ID.
IfxMultican_Can_Node * | node | Specifies the pointer to the node handle.
IfxMultican_Priority | priority | Specifies the message object priority.
IfxMultican_Can_InterruptSource | rxInterrupt | Rx Interrupt configuration.
IfxMultican_Can_InterruptSource | txInterrupt | Tx Interrupt configuration.

◆ IfxMultican_Can_NodeConfig

struct IfxMultican_Can_NodeConfig

CAN Node configuration.

Definition at line 879 of file IfxMultican_Can.h.

Collaboration diagram for IfxMultican_Can_NodeConfig:
[legend]
Data Fields
IfxMultican_Can_InterruptSource | alertInterrupt | Alert interrupt.
boolean | analyzerMode | Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode.
uint32 | baudrate | Specifies the baudrate.
uint8 | errorWarningLevel | Specifies the error warinig level.
IfxMultican_Can_FdConfig | fdConfig | Specifies CAN FD configuration.
boolean | flexibleDataRate | CANFD enable/disable.
IfxMultican_Can_InterruptSource | frameCounterInterrupt | Frame counter interrupt.
IfxMultican_Can_InterruptSource | lastErrorCodeInterrupt | Last error code interrupt.
boolean | loopBackMode | Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode.
Ifx_CAN * | module | pointer to MULTICAN module
IfxMultican_NodeId | nodeId | Specifies the node Id.
IfxPort_PadDriver | pinDriver |
IfxMultican_Rxd_In * | rxPin | Specifies the receive pin.
IfxPort_InputMode | rxPinMode | Specifies the receive pin as input mode.
uint16 | samplePoint | Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
uint16 | synchJumpWidth | Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
IfxMultican_Can_InterruptSource | timerInterrupt | Timer Interrupt.
IfxMultican_Can_InterruptSource | transferInterrupt | Transfer interrupt.
IfxMultican_Txd_Out * | txPin | Specifies the transmit pin.
IfxPort_OutputMode | txPinMode | Specifies the transmit pin output mode.


iLLD_TC26B: General functions

Functions
General functions
iLLD » MULTICAN » CAN
Collaboration diagram for General functions:

Functions

IFX_INLINE void | IfxMultican_Can_deinit (IfxMultican_Can *mcan)
Reset the CAN module.
Reset and disable the CAN module, inclusive message object and node registers. More...
IFX_EXTERN void | IfxMultican_Can_getConfig (IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration. More...
IFX_EXTERN float32 | IfxMultican_Can_getModuleFrequency (IfxMultican_Can *mcan)
Get the module frequency. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_initModule (IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module
The following configuration is used:
. More...
IFX_EXTERN void | IfxMultican_Can_initModuleConfig (IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration. More...

Detailed Description

Function Documentation

◆ IfxMultican_Can_deinit()

IFX_INLINE void IfxMultican_Can_deinit ( IfxMultican_Can * mcan )

Reset the CAN module.
Reset and disable the CAN module, inclusive message object and node registers.

Parameters
mcan pointer to the CAN handle
Returns
None

Definition at line 1291 of file IfxMultican_Can.h.

◆ IfxMultican_Can_getConfig()

IFX_EXTERN void IfxMultican_Can_getConfig | ( | IfxMultican_Can * | mcan,
 |  | IfxMultican_Can_Config * | config
 | ) |  |

Return the actual CAN module configuration.

Parameters
mcan | pointer to the CAN handle
config | Pointer to the configuration structure, will be filled by this function
Returns
None

Definition at line 899 of file IfxMultican_Can.c.

Referenced by IfxMultican_Can_getModuleFrequency().

◆ IfxMultican_Can_getModuleFrequency()

IFX_EXTERN float32 IfxMultican_Can_getModuleFrequency ( IfxMultican_Can * mcan )

Get the module frequency.

Parameters
mcan pointer to the CAN handle
Returns
Frequency Value

Definition at line 938 of file IfxMultican_Can.c.

Referenced by IfxMultican_Can_Node_getConfig(), and IfxMultican_Can_Node_init().

◆ IfxMultican_Can_initModule()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_initModule | ( | IfxMultican_Can * | mcan,
 |  | const IfxMultican_Can_Config * | config
 | ) |  |

Initialize the CAN module
The following configuration is used:
.

  • The CAN module is stopped during sleep mode
  • The normal divider mode is selected
  • The CAN module clock is the system clock
    Parameters
    mcan | pointer to the CAN handle
    config | Specifies pointer to the CAN module configuration
    Returns
    Status,: Returns IfxMultican_Status_ok if the operation was successful
    Returns IfxMultican_Status_notInitialised if the operation was errorneous
    A coding example can be found in How to use the CAN Interface driver?

Definition at line 948 of file IfxMultican_Can.c.

◆ IfxMultican_Can_initModuleConfig()

IFX_EXTERN void IfxMultican_Can_initModuleConfig | ( | IfxMultican_Can_Config * | config,
 |  | Ifx_CAN * | mcan
 | ) |  |

Return the default MULTICAN configuration.

Parameters
config | Default configuration filled by this function
mcan | base address of the MULTICAN register space
Returns
None

A coding example can be found in How to use the CAN Interface driver?

  • take over module pointer

  • Selected input clock is from CLC
  • Module frequency is fSPB

Definition at line 1038 of file IfxMultican_Can.c.


iLLD_TC26B: CAN Nodes

Functions
CAN Nodes
iLLD » MULTICAN » CAN
Collaboration diagram for CAN Nodes:

Functions

IFX_INLINE void | IfxMultican_Can_Node_activate (IfxMultican_Can_Node *node)
Activate the CAN Node. Participate in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Can_Node_deactivate (IfxMultican_Can_Node *node)
Deactivate the CAN Node. Take out from participation in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Can_Node_deinit (IfxMultican_Can_Node *node)
Reset the CAN node. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_Node_recoverBusOff (IfxMultican_Can_Node *node)
Recovers the CAN node from bus off. More...
IFX_EXTERN void | IfxMultican_Can_Node_getConfig (IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_Node_init (IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node. More...
IFX_EXTERN void | IfxMultican_Can_Node_initConfig (IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration. More...
IFX_EXTERN void | IfxMultican_Can_Node_sendToBusOff (IfxMultican_Can_Node *node)
Sends the CAN node into bus off. More...

Detailed Description

Function Documentation

◆ IfxMultican_Can_Node_activate()

IFX_INLINE void IfxMultican_Can_Node_activate ( IfxMultican_Can_Node * node )

Activate the CAN Node. Participate in the CAN bus activities.

Parameters
node Specifies the CAN node handle to be configured
Returns
None

Definition at line 1260 of file IfxMultican_Can.h.

◆ IfxMultican_Can_Node_deactivate()

IFX_INLINE void IfxMultican_Can_Node_deactivate ( IfxMultican_Can_Node * node )

Deactivate the CAN Node. Take out from participation in the CAN bus activities.

Parameters
node Specifies the CAN node handle to be configured
Returns
None

Definition at line 1268 of file IfxMultican_Can.h.

◆ IfxMultican_Can_Node_deinit()

IFX_INLINE void IfxMultican_Can_Node_deinit ( IfxMultican_Can_Node * node )

Reset the CAN node.

Parameters
node Specifies the CAN node handle to be configured
Returns
None

Definition at line 1275 of file IfxMultican_Can.h.

◆ IfxMultican_Can_Node_getConfig()

IFX_EXTERN void IfxMultican_Can_Node_getConfig | ( | IfxMultican_Can_Node * | node,
 |  | IfxMultican_Can_NodeConfig * | config
 | ) |  |

Get the actual message object configuration.

Parameters
node | Specifies the CAN node handle to be configured
config | Specifies the CAN node configuration
Returns
None

Definition at line 731 of file IfxMultican_Can.c.

◆ IfxMultican_Can_Node_init()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_Node_init | ( | IfxMultican_Can_Node * | node,
 |  | const IfxMultican_Can_NodeConfig * | config
 | ) |  |

Initialize the CAN node.

Parameters
node | Specifies the CAN node handle to be configured
config | Specifies the CAN node configuration
Returns
Status

A coding example can be found in How to use the CAN Interface driver?

Definition at line 748 of file IfxMultican_Can.c.

◆ IfxMultican_Can_Node_initConfig()

IFX_EXTERN void IfxMultican_Can_Node_initConfig | ( | IfxMultican_Can_NodeConfig * | config,
 |  | IfxMultican_Can * | mcan
 | ) |  |

Get default CAN node configuration.

Parameters
config | Specifies the CAN node configuration
mcan | pointer to the CAN handle
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 835 of file IfxMultican_Can.c.

◆ IfxMultican_Can_Node_recoverBusOff()

IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff ( IfxMultican_Can_Node * node )

Recovers the CAN node from bus off.

Parameters
node Specifies the CAN node handle to be configured
Returns
Status

IfxMultican_Status status = IfxMultican_Status_busOff;

while (status != IfxMultican_Status_ok) { status = IfxMultican_Can_Node_recoverBusOff(&canNode); }

Definition at line 1283 of file IfxMultican_Can.h.

◆ IfxMultican_Can_Node_sendToBusOff()

IFX_EXTERN void IfxMultican_Can_Node_sendToBusOff ( IfxMultican_Can_Node * node )

Sends the CAN node into bus off.

Parameters
node Specifies the CAN node handle to be configured
Returns
None

IfxMultican_Can_Node_sendToBusOff(&canNode);

Definition at line 883 of file IfxMultican_Can.c.


iLLD_TC26B: Message Objects

Functions
Message Objects
iLLD » MULTICAN » CAN
Collaboration diagram for Message Objects:

Functions

IFX_INLINE boolean | IfxMultican_Can_MsgObj_cancelSend (IfxMultican_Can_MsgObj *msgObj)
Cancel pending TX request by invalidating the request
Only when frame transmission has not been started. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_clearRxPending (IfxMultican_Can_MsgObj *msgObj)
Clear the RX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_clearTxPending (IfxMultican_Can_MsgObj *msgObj)
Clear the TX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_deinit (IfxMultican_Can_MsgObj *msgObj)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_Can_MsgObj_getPendingId (IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IFX_INLINE IfxMultican_MsgObjStat | IfxMultican_Can_MsgObj_getStatus (IfxMultican_Can_MsgObj *msgObj)
Get the message object status. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_MsgObj_readLongFrame (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_MsgObj_sendLongFrame (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message. More...
IFX_EXTERN void | IfxMultican_Can_MsgObj_getConfig (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_init (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object. More...
IFX_EXTERN void | IfxMultican_Can_MsgObj_initConfig (IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isRxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isTransmitRequested (IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isTxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_readMessage (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_sendMessage (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message. More...

Detailed Description

Function Documentation

◆ IfxMultican_Can_MsgObj_cancelSend()

IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend ( IfxMultican_Can_MsgObj * msgObj )

Cancel pending TX request by invalidating the request
Only when frame transmission has not been started.

Parameters
msgObj pointer to the CAN message object handle
Returns
TRUE if cancellation was successfully executed

Definition at line 1204 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_clearRxPending()

IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending ( IfxMultican_Can_MsgObj * msgObj )

Clear the RX pending flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1212 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_clearTxPending()

IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending ( IfxMultican_Can_MsgObj * msgObj )

Clear the TX pending flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1220 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_deinit()

IFX_INLINE void IfxMultican_Can_MsgObj_deinit ( IfxMultican_Can_MsgObj * msgObj )

Reset the message object
Append the message object to the end of idle list and reset message object registers.

Parameters
msgObj pointer to the CAN message object handle
Returns
None

Definition at line 1228 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_getConfig()

IFX_EXTERN void IfxMultican_Can_MsgObj_getConfig | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_Can_MsgObjConfig * | config
 | ) |  |

Get the actual message object configuration.

Parameters
msgObj | pointer to the CAN message object handle
config | Pointer to the RAM buffer. Filled by this function
Returns
None

Definition at line 35 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_getPendingId()

IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_MsgObjGroup | msgObjGroup
 | ) |  |

Get message object ID which has TX/RX pending flag from a message object group.

Parameters
msgObj | pointer to the CAN message object handle
msgObjGroup | Message object group
Returns
Message Object Id

Definition at line 1234 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_getStatus()

IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus ( IfxMultican_Can_MsgObj * msgObj )

Get the message object status.

Parameters
msgObj pointer to the CAN message object handle
Returns
IfxMultican_MsgObjStat bitfield

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1240 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_init()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_init | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | const IfxMultican_Can_MsgObjConfig * | config
 | ) |  |

Initialize the message object.

Parameters
msgObj | pointer to the CAN message object handle
config | pointer to the CAN message object configuration
Returns
Status

A coding example can be found in How to use the CAN Interface driver?

Definition at line 61 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_initConfig()

IFX_EXTERN void IfxMultican_Can_MsgObj_initConfig | ( | IfxMultican_Can_MsgObjConfig * | config,
 |  | IfxMultican_Can_Node * | node
 | ) |  |

Initialise message config with default values and the given parameters.

Parameters
config | pointer to the CAN message object configuration
node | pointer to the CAN node handle to which the message object should be assigned
Returns
None

A coding example can be found in How to use the CAN Interface driver?

Definition at line 553 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_isRxPending()

IFX_EXTERN boolean IfxMultican_Can_MsgObj_isRxPending ( IfxMultican_Can_MsgObj * msgObj )

Returns the RX pending flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
TRUE of the RX pending flag of a message object is set

Definition at line 592 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_isTransmitRequested()

IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTransmitRequested ( IfxMultican_Can_MsgObj * msgObj )

Returns the TX Request flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
TRUE of the TX Request flag of a message object is set

Definition at line 607 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_isTxPending()

IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTxPending ( IfxMultican_Can_MsgObj * msgObj )

Returns the TX pending flag of a message object.

Parameters
msgObj pointer to the CAN message object handle
Returns
TRUE of the TX pending flag of a message object is set

Definition at line 624 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_readLongFrame()

IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Read a received CAN message.

Parameters
msgObj | pointer to the CAN message object handle
msg | This parameter is filled in by the function with the received message. Also when reading is not successful
data | Pointer to data (in words)
Returns
IfxMultican_Status_newData: if the operation was successful
IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully
IfxMultican_Status_messageLost: if the message lost and new data is not yet ready
IfxMultican_Status_receiveEmpty: if no message is been received

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1248 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_readMessage()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_readMessage | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_Message * | msg
 | ) |  |

Read a received CAN message.

Parameters
msgObj | pointer to the CAN message object handle
msg | This parameter is filled in by the function with the received message. Also when reading is not successful
Returns
IfxMultican_Status_newData: if the operation was successful
IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully
IfxMultican_Status_messageLost: if the message lost and new data is not yet ready
IfxMultican_Status_receiveEmpty: if no message is been received

A coding example can be found in How to use the CAN Interface driver?

Definition at line 641 of file IfxMultican_Can.c.

◆ IfxMultican_Can_MsgObj_sendLongFrame()

IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Read a received CAN message.

Parameters
msgObj | pointer to the CAN message object handle
msg | This parameter is filled in by the function with the received message. Also when reading is not successful
data | Pointer to data (in words)
Returns
IfxMultican_Status_ok: if the operation was successful IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

A coding example can be found in How to use the CAN Interface driver?

Definition at line 1254 of file IfxMultican_Can.h.

◆ IfxMultican_Can_MsgObj_sendMessage()

IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage | ( | IfxMultican_Can_MsgObj * | msgObj,
 |  | const IfxMultican_Message * | msg
 | ) |  |

Send a CAN message.

Parameters
msgObj | pointer to the CAN message object handle
msg | Specifies the msg to be send
Returns
IfxMultican_Status_ok: if the operation was successful
IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy

A coding example can be found in How to use the CAN Interface driver?

Definition at line 681 of file IfxMultican_Can.c.


iLLD_TC26B: Interrupts

Interrupts
iLLD » MULTICAN » CAN
Collaboration diagram for Interrupts:


iLLD_TC26B: IfxMultican_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxMultican_cfg.h File Reference
iLLD » MULTICAN

MULTICAN on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxCan_reg.h"
Include dependency graph for IfxMultican_cfg.h:

Go to the source code of this file.

Macros

#define | IFXMULTICAN_NUM_MESSAGE_OBJECTS (256)
Number of CAN message objects. More...
#define | IFXMULTICAN_NUM_NODES (5)
Number of CAN nodes. More...
#define | IFXMULTICAN_NUM_SRC (16)
Number of service requests. More...
#define | IFXMULTICAN_NUM_MODULES (1)
#define | IFXMULTICAN_R_NUM_SRC (8)
Number of CANR service requests. More...

Enumerations

enum IfxMultican_Index {
IfxMultican_Index_none = -1,
IfxMultican_Index_0 = 0
}
List of the available multican resource.
More...
enum IfxMultican_NodeId {
IfxMultican_NodeId_none = -1,
IfxMultican_NodeId_0 = 0,
IfxMultican_NodeId_1,
IfxMultican_NodeId_2,
IfxMultican_NodeId_3
}
CAN Nodes definition
More...
enum IfxMultican_SrcId {
IfxMultican_SrcId_0 = 0,
IfxMultican_SrcId_1,
IfxMultican_SrcId_2,
IfxMultican_SrcId_3,
IfxMultican_SrcId_4,
IfxMultican_SrcId_5,
IfxMultican_SrcId_6,
IfxMultican_SrcId_7,
IfxMultican_SrcId_8,
IfxMultican_SrcId_9,
IfxMultican_SrcId_10,
IfxMultican_SrcId_11,
IfxMultican_SrcId_12,
IfxMultican_SrcId_13,
IfxMultican_SrcId_14,
IfxMultican_SrcId_15
}
Service request ID
More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap [IFXMULTICAN_NUM_MODULES]

Detailed Description

MULTICAN on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMultican_cfg.h.

Macro Definition Documentation

◆ IFXMULTICAN_NUM_MESSAGE_OBJECTS

#define IFXMULTICAN_NUM_MESSAGE_OBJECTS (256)

Number of CAN message objects.

Definition at line 48 of file IfxMultican_cfg.h.

Referenced by IfxMultican_deinit().

◆ IFXMULTICAN_NUM_MODULES

#define IFXMULTICAN_NUM_MODULES (1)

Definition at line 58 of file IfxMultican_cfg.h.

Referenced by IfxMultican_getAddress(), and IfxMultican_getIndex().

◆ IFXMULTICAN_NUM_NODES

#define IFXMULTICAN_NUM_NODES (5)

Number of CAN nodes.

Definition at line 52 of file IfxMultican_cfg.h.

Referenced by IfxMultican_deinit().

◆ IFXMULTICAN_NUM_SRC

#define IFXMULTICAN_NUM_SRC (16)

Number of service requests.

Definition at line 56 of file IfxMultican_cfg.h.

Referenced by IfxMultican_Can_initModule(), IfxMultican_Can_initModuleConfig(), and IfxMultican_deinit().

◆ IFXMULTICAN_R_NUM_SRC

#define IFXMULTICAN_R_NUM_SRC (8)

Number of CANR service requests.

Definition at line 62 of file IfxMultican_cfg.h.

Enumeration Type Documentation

◆ IfxMultican_Index

enum IfxMultican_Index

List of the available multican resource.

Enumerator
IfxMultican_Index_none | Not Selected.
IfxMultican_Index_0 | MULTICAN index 0.

Definition at line 72 of file IfxMultican_cfg.h.

◆ IfxMultican_NodeId

enum IfxMultican_NodeId

CAN Nodes definition

Enumerator
IfxMultican_NodeId_none | None of the Ifx_CAN Nodes.
IfxMultican_NodeId_0 | Ifx_CAN Node 0.
IfxMultican_NodeId_1 | Ifx_CAN Node 1.
IfxMultican_NodeId_2 | Ifx_CAN Node 2.
IfxMultican_NodeId_3 | Ifx_CAN Node 3.

Definition at line 80 of file IfxMultican_cfg.h.

◆ IfxMultican_SrcId

enum IfxMultican_SrcId

Service request ID

Enumerator
IfxMultican_SrcId_0 | Service request ID 0.
IfxMultican_SrcId_1 | Service request ID 1.
IfxMultican_SrcId_2 | Service request ID 2.
IfxMultican_SrcId_3 | Service request ID 3.
IfxMultican_SrcId_4 | Service request ID 4.
IfxMultican_SrcId_5 | Service request ID 5.
IfxMultican_SrcId_6 | Service request ID 6.
IfxMultican_SrcId_7 | Service request ID 7.
IfxMultican_SrcId_8 | Service request ID 8.
IfxMultican_SrcId_9 | Service request ID 9.
IfxMultican_SrcId_10 | Service request ID 10.
IfxMultican_SrcId_11 | Service request ID 11.
IfxMultican_SrcId_12 | Service request ID 12.
IfxMultican_SrcId_13 | Service request ID 13.
IfxMultican_SrcId_14 | Service request ID 14.
IfxMultican_SrcId_15 | Service request ID 15.

Definition at line 91 of file IfxMultican_cfg.h.

Variable Documentation

◆ IfxMultican_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]

Definition at line 116 of file IfxMultican_cfg.h.


iLLD_TC26B: IfxMultican_PinMap.c File Reference

  • _PinMap
Variables
IfxMultican_PinMap.c File Reference
iLLD » MULTICAN

MULTICAN I/O map. More...

#include "IfxMultican_PinMap.h"
Include dependency graph for IfxMultican_PinMap.c:

Go to the source code of this file.

Variables

IfxMultican_Rxd_In | IfxMultican_RXD0A_P02_1_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a}
IfxMultican_Rxd_In | IfxMultican_RXD0B_P20_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b}
IfxMultican_Rxd_In | IfxMultican_RXD0D_P02_4_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 4}, Ifx_RxSel_d}
IfxMultican_Rxd_In | IfxMultican_RXD0E_P33_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e}
IfxMultican_Rxd_In | IfxMultican_RXD1A_P15_3_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a}
IfxMultican_Rxd_In | IfxMultican_RXD1B_P14_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b}
IfxMultican_Rxd_In | IfxMultican_RXD1D_P00_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 1}, Ifx_RxSel_d}
IfxMultican_Rxd_In | IfxMultican_RXD2A_P15_1_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a}
IfxMultican_Rxd_In | IfxMultican_RXD2B_P02_3_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxMultican_Rxd_In | IfxMultican_RXD2D_P14_8_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d}
IfxMultican_Rxd_In | IfxMultican_RXD2E_P10_2_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e}
IfxMultican_Rxd_In | IfxMultican_RXD3A_P00_3_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxMultican_Rxd_In | IfxMultican_RXD3B_P32_2_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b}
IfxMultican_Rxd_In | IfxMultican_RXD3C_P20_0_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c}
IfxMultican_Rxd_In | IfxMultican_RXD3D_P11_10_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d}
IfxMultican_Rxd_In | IfxMultican_RXD3E_P20_9_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e}
IfxMultican_Txd_Out | IfxMultican_TXD0_P02_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD0_P02_5_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2}
IfxMultican_Txd_Out | IfxMultican_TXD0_P20_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD0_P33_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD1_P00_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD1_P14_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD1_P15_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD2_P02_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD2_P10_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6}
IfxMultican_Txd_Out | IfxMultican_TXD2_P14_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD2_P15_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P00_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P11_12_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P20_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P20_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5}
IfxMultican_Txd_Out | IfxMultican_TXD3_P32_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5}
const IfxMultican_Rxd_In * | IfxMultican_Rxd_In_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
const IfxMultican_Txd_Out * | IfxMultican_Txd_Out_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]

Detailed Description

MULTICAN I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMultican_PinMap.c.

Variable Documentation

◆ IfxMultican_RXD0A_P02_1_IN

IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a}

Definition at line 28 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD0B_P20_7_IN

IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b}

Definition at line 29 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD0D_P02_4_IN

IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 4}, Ifx_RxSel_d}

Definition at line 30 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD0E_P33_7_IN

IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e}

Definition at line 31 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD1A_P15_3_IN

IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a}

Definition at line 32 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD1B_P14_1_IN

IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b}

Definition at line 33 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD1D_P00_1_IN

IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 1}, Ifx_RxSel_d}

Definition at line 34 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD2A_P15_1_IN

IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a}

Definition at line 35 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD2B_P02_3_IN

IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 36 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD2D_P14_8_IN

IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d}

Definition at line 37 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD2E_P10_2_IN

IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e}

Definition at line 38 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3A_P00_3_IN

IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 39 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3B_P32_2_IN

IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b}

Definition at line 40 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3C_P20_0_IN

IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c}

Definition at line 41 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3D_P11_10_IN

IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d}

Definition at line 42 of file IfxMultican_PinMap.c.

◆ IfxMultican_RXD3E_P20_9_IN

IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e}

Definition at line 43 of file IfxMultican_PinMap.c.

◆ IfxMultican_Rxd_In_pinTable

const IfxMultican_Rxd_In* IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]

Definition at line 62 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD0_P02_0_OUT

IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5}

Definition at line 44 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD0_P02_5_OUT

IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2}

Definition at line 45 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD0_P20_8_OUT

IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5}

Definition at line 46 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD0_P33_8_OUT

IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5}

Definition at line 47 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD1_P00_0_OUT

IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5}

Definition at line 48 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD1_P14_0_OUT

IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5}

Definition at line 49 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD1_P15_2_OUT

IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5}

Definition at line 50 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD2_P02_2_OUT

IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5}

Definition at line 51 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD2_P10_3_OUT

IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6}

Definition at line 52 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD2_P14_10_OUT

IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5}

Definition at line 53 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD2_P15_0_OUT

IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5}

Definition at line 54 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P00_2_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5}

Definition at line 55 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P11_12_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5}

Definition at line 56 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P20_10_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5}

Definition at line 57 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P20_3_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5}

Definition at line 58 of file IfxMultican_PinMap.c.

◆ IfxMultican_TXD3_P32_3_OUT

IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5}

Definition at line 59 of file IfxMultican_PinMap.c.

◆ IfxMultican_Txd_Out_pinTable

const IfxMultican_Txd_Out* IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]

Definition at line 95 of file IfxMultican_PinMap.c.


iLLD_TC26B: IfxMultican_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxMultican_PinMap.h File Reference
iLLD » MULTICAN

MULTICAN I/O map. More...

#include <IfxCan_reg.h>
#include <_Impl/IfxMultican_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxMultican_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxMultican_Rxd_In
RXD pin mapping structure. More...
struct | IfxMultican_Txd_Out
TXD pin mapping structure. More...

Macros

#define | IFXMULTICAN_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXMULTICAN_PINMAP_NUM_NODES 4
#define | IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5
#define | IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5

Variables

IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN
CAN0_RXDA: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN
CAN0_RXDB: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN
CAN0_RXDD: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN
CAN0_RXDE: CAN node 0 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN
CAN1_RXDA: CAN node 1 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN
CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN
CAN1_RXDD: CAN node 1 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN
CAN2_RXDA: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN
CAN2_RXDB: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN
CAN2_RXDD: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN
CAN2_RXDE: CAN node 2 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN
CAN3_RXDA: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN
CAN3_RXDB: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN
CAN3_RXDC: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN
CAN3_RXDD: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN
CAN3_RXDE: CAN node 3 input. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT
CAN0_TXD: CAN node 0 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT
CAN1_TXD: CAN node 1 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT
CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT
CAN1_TXD: CAN node 1 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT
CAN2_TXD: CAN node 2 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT
CAN3_TXD: CAN node 3 output. More...
IFX_EXTERN const IfxMultican_Rxd_In * | IfxMultican_Rxd_In_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxMultican_Rxd_In table. More...
IFX_EXTERN const IfxMultican_Txd_Out * | IfxMultican_Txd_Out_pinTable [IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxMultican_Txd_Out table. More...

Detailed Description

MULTICAN I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMultican_PinMap.h.


iLLD_TC26B: IfxMultican_Can.h File Reference

  • Multican
  • Can
Data Structures | Functions
IfxMultican_Can.h File Reference
iLLD » MULTICAN

MULTICAN CAN details. More...

#include "Multican/Std/IfxMultican.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxScu_regdef.h"
Include dependency graph for IfxMultican_Can.h:

Go to the source code of this file.

Data Structures

struct | IfxMultican_Can_FdConfig
Structure for CAN FD configuration. More...
struct | IfxMultican_Can_GatewayConfig
Structure for gateway configuration. More...
struct | IfxMultican_Can_InterruptConfig
Structure for interrupt configuration. More...
struct | IfxMultican_Can_InterruptSource
Structure for interrupt source. More...
struct | IfxMultican_Can_MsgObjControl
Message object control. More...
struct | IfxMultican_Can_Node
CAN node handle data structure. More...
struct | IfxMultican_Can
CAN handle data structure. More...
struct | IfxMultican_Can_Config
CAN module configuration. More...
struct | IfxMultican_Can_MsgObj
CAN message object handle data structure. More...
struct | IfxMultican_Can_MsgObjConfig
CAN message object configuration. More...
struct | IfxMultican_Can_NodeConfig
CAN Node configuration. More...

Functions

IFX_INLINE void | IfxMultican_Can_deinit (IfxMultican_Can *mcan)
Reset the CAN module.
Reset and disable the CAN module, inclusive message object and node registers. More...
IFX_EXTERN void | IfxMultican_Can_getConfig (IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration. More...
IFX_EXTERN float32 | IfxMultican_Can_getModuleFrequency (IfxMultican_Can *mcan)
Get the module frequency. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_initModule (IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module
The following configuration is used:
. More...
IFX_EXTERN void | IfxMultican_Can_initModuleConfig (IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration. More...
IFX_INLINE void | IfxMultican_Can_Node_activate (IfxMultican_Can_Node *node)
Activate the CAN Node. Participate in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Can_Node_deactivate (IfxMultican_Can_Node *node)
Deactivate the CAN Node. Take out from participation in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Can_Node_deinit (IfxMultican_Can_Node *node)
Reset the CAN node. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_Node_recoverBusOff (IfxMultican_Can_Node *node)
Recovers the CAN node from bus off. More...
IFX_EXTERN void | IfxMultican_Can_Node_getConfig (IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_Node_init (IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node. More...
IFX_EXTERN void | IfxMultican_Can_Node_initConfig (IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration. More...
IFX_EXTERN void | IfxMultican_Can_Node_sendToBusOff (IfxMultican_Can_Node *node)
Sends the CAN node into bus off. More...
IFX_INLINE boolean | IfxMultican_Can_MsgObj_cancelSend (IfxMultican_Can_MsgObj *msgObj)
Cancel pending TX request by invalidating the request
Only when frame transmission has not been started. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_clearRxPending (IfxMultican_Can_MsgObj *msgObj)
Clear the RX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_clearTxPending (IfxMultican_Can_MsgObj *msgObj)
Clear the TX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_Can_MsgObj_deinit (IfxMultican_Can_MsgObj *msgObj)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_Can_MsgObj_getPendingId (IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IFX_INLINE IfxMultican_MsgObjStat | IfxMultican_Can_MsgObj_getStatus (IfxMultican_Can_MsgObj *msgObj)
Get the message object status. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_MsgObj_readLongFrame (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message. More...
IFX_INLINE IfxMultican_Status | IfxMultican_Can_MsgObj_sendLongFrame (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message. More...
IFX_EXTERN void | IfxMultican_Can_MsgObj_getConfig (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_init (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object. More...
IFX_EXTERN void | IfxMultican_Can_MsgObj_initConfig (IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isRxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isTransmitRequested (IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object. More...
IFX_EXTERN boolean | IfxMultican_Can_MsgObj_isTxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_readMessage (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Can_MsgObj_sendMessage (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message. More...

Detailed Description

MULTICAN CAN details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMultican_Can.h.


iLLD_TC26B: IfxMultican.h File Reference

  • Multican
  • Std
Data Structures | Typedefs | Enumerations | Functions
IfxMultican.h File Reference
iLLD » MULTICAN

MULTICAN basic functionality. More...

#include "_Impl/IfxMultican_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxMultican_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCan_bf.h"
#include "Scu/Std/IfxScuWdt.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxMultican.h:

Go to the source code of this file.

Data Structures

struct | IfxMultican_Message
CAN message definition. More...
union | IfxMultican_MsgObjStat
Message object status bit-fields. More...

Typedefs

typedef sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS. More...

Enumerations

enum IfxMultican_ClockSelect {
IfxMultican_ClockSelect_noClock = 0,
IfxMultican_ClockSelect_fclc = 1,
IfxMultican_ClockSelect_fosc0 = 2,
IfxMultican_ClockSelect_fErayPll = 4
}
CAN input clock selection. More...
enum IfxMultican_DataLengthCode {
IfxMultican_DataLengthCode_0 = 0,
IfxMultican_DataLengthCode_1,
IfxMultican_DataLengthCode_2,
IfxMultican_DataLengthCode_3,
IfxMultican_DataLengthCode_4,
IfxMultican_DataLengthCode_5,
IfxMultican_DataLengthCode_6,
IfxMultican_DataLengthCode_7,
IfxMultican_DataLengthCode_8,
IfxMultican_DataLengthCode_12 = 9,
IfxMultican_DataLengthCode_16 = 10,
IfxMultican_DataLengthCode_20 = 11,
IfxMultican_DataLengthCode_24 = 12,
IfxMultican_DataLengthCode_32 = 13,
IfxMultican_DataLengthCode_48 = 14,
IfxMultican_DataLengthCode_64 = 15
}
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC. More...
enum IfxMultican_Frame {
IfxMultican_Frame_receive,
IfxMultican_Frame_transmit,
IfxMultican_Frame_remoteRequest,
IfxMultican_Frame_remoteAnswer
}
CAN frame type. More...
enum IfxMultican_FrameCounterMode {
IfxMultican_FrameCounterMode_frameCountMode = 0,
IfxMultican_FrameCounterMode_timeStampMode = 1,
IfxMultican_FrameCounterMode_bitTimingMode = 2,
IfxMultican_FrameCounterMode_errorCountMode = 3
}
Determines the operation mode of the frame counter
Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id) More...
enum IfxMultican_MsgObjGroup {
IfxMultican_MsgObjGroup_0 = 0,
IfxMultican_MsgObjGroup_1,
IfxMultican_MsgObjGroup_2,
IfxMultican_MsgObjGroup_3,
IfxMultican_MsgObjGroup_4,
IfxMultican_MsgObjGroup_5,
IfxMultican_MsgObjGroup_6,
IfxMultican_MsgObjGroup_7
}
CAN message object group
Each group consists of 32 consecutive message objects. More...
enum IfxMultican_MsgObjMode {
IfxMultican_MsgObjMode_standard = 0,
IfxMultican_MsgObjMode_receiveFifoBase = 1,
IfxMultican_MsgObjMode_transmitFifoBase = 2,
IfxMultican_MsgObjMode_transmitFifoSlave = 3,
IfxMultican_MsgObjMode_gatewaySource = 4,
IfxMultican_MsgObjMode_canFD64 = 5
}
CAN Message Object Mode. More...
enum IfxMultican_MsgObjStatusFlag {
IfxMultican_MsgObjStatusFlag_receivePending = IFX_CAN_MO_STAT_RXPND_OFF,
IfxMultican_MsgObjStatusFlag_transmitPending = IFX_CAN_MO_STAT_TXPND_OFF,
IfxMultican_MsgObjStatusFlag_receiveUpdating = IFX_CAN_MO_STAT_RXUPD_OFF,
IfxMultican_MsgObjStatusFlag_newData = IFX_CAN_MO_STAT_NEWDAT_OFF,
IfxMultican_MsgObjStatusFlag_messageLost = IFX_CAN_MO_STAT_MSGLST_OFF,
IfxMultican_MsgObjStatusFlag_messageValid = IFX_CAN_MO_STAT_MSGVAL_OFF,
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected = IFX_CAN_MO_STAT_RTSEL_OFF,
IfxMultican_MsgObjStatusFlag_receiveEnable = IFX_CAN_MO_STAT_RXEN_OFF,
IfxMultican_MsgObjStatusFlag_transmitRequest = IFX_CAN_MO_STAT_TXRQ_OFF,
IfxMultican_MsgObjStatusFlag_transmitEnable0 = IFX_CAN_MO_STAT_TXEN0_OFF,
IfxMultican_MsgObjStatusFlag_transmitEnable1 = IFX_CAN_MO_STAT_TXEN1_OFF,
IfxMultican_MsgObjStatusFlag_messageDirection = IFX_CAN_MO_STAT_DIR_OFF
}
CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs) More...
enum IfxMultican_Priority {
IfxMultican_Priority_ListOrder = 1,
IfxMultican_Priority_CAN_ID = 2
}
CAN priorities. More...
enum IfxMultican_SleepMode {
IfxMultican_SleepMode_enable = 0,
IfxMultican_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_CAN.CLC.B.EDIS. More...
enum IfxMultican_Status {
IfxMultican_Status_ok = 0x00000000,
IfxMultican_Status_notInitialised = 0x00000001,
IfxMultican_Status_wrongParam = 0x00000002,
IfxMultican_Status_wrongPin = 0x00000004,
IfxMultican_Status_busHeavy = 0x00000008,
IfxMultican_Status_busOff = 0x00000010,
IfxMultican_Status_notSentBusy = 0x00000020,
IfxMultican_Status_receiveEmpty = 0x00000040,
IfxMultican_Status_messageLost = 0x00000080,
IfxMultican_Status_newData = 0x00000100,
IfxMultican_Status_newDataButOneLost = IfxMultican_Status_messageLost | IfxMultican_Status_newData
}
CAN API status definition. More...
enum IfxMultican_SuspendMode {
IfxMultican_SuspendMode_none = 0,
IfxMultican_SuspendMode_hard = 1,
IfxMultican_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE void | IfxMultican_clearMessagePendingSeletor (Ifx_CAN *mcan)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_clearPendingMessageNotification (Ifx_CAN *mcan, uint16 list)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_disableModule (Ifx_CAN *mcan)
Disables the module (sets the disable request) More...
IFX_INLINE void | IfxMultican_disableSleepMode (Ifx_CAN *mcan)
Disregards the sleep mode of the module. More...
IFX_INLINE void | IfxMultican_enableModule (Ifx_CAN *mcan)
Enables the module (clears the disable request) More...
IFX_INLINE void | IfxMultican_enableSleepMode (Ifx_CAN *mcan)
Enables the sleep mode of the module. More...
IFX_INLINE uint16 | IfxMultican_getFractionalDividerMode (Ifx_CAN *mcan)
Returns the selected fractional divider mode. More...
IFX_INLINE uint16 | IfxMultican_getFractionalDividerStepValue (Ifx_CAN *mcan)
Returns the reload or addition value for the result. More...
IFX_INLINE IfxMultican_ClockSelect | IfxMultican_getInputClock (Ifx_CAN *mcan)
Returns the selected input clock source. More...
IFX_INLINE boolean | IfxMultican_isModuleEnabled (Ifx_CAN *mcan)
Returns the status of module enabled or disabled. More...
IFX_INLINE void | IfxMultican_setFractionalDividerMode (Ifx_CAN *mcan, uint16 mode)
sets the fractional divider mode More...
IFX_INLINE void | IfxMultican_setFractionalDividerStepValue (Ifx_CAN *mcan, uint16 stepValue)
sets reload or addition value for the result. More...
IFX_INLINE void | IfxMultican_setInputClock (Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
Sets the input clock source. More...
IFX_INLINE void | IfxMultican_setMessageIndexMask (Ifx_CAN *mcan, uint32 mask)
clears the message pending interrupt notification of a given list More...
IFX_INLINE void | IfxMultican_setSleepMode (Ifx_CAN *can, IfxMultican_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxMultican_waitListReady (Ifx_CAN *mcan)
Wait until the list panel is ready. More...
IFX_INLINE boolean | IfxMultican_isModuleSuspended (Ifx_CAN *mcan)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxMultican_setSuspendMode (Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxMultican_Node_setFastBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register. More...
IFX_EXTERN void | IfxMultican_Node_setNominalBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register. More...
IFX_EXTERN void | IfxMultican_deinit (Ifx_CAN *mcan)
Reset the CAN module
Reset and disable the CAN module, inclusive message object and node registers. More...
IFX_EXTERN void | IfxMultican_resetModule (Ifx_CAN *can)
resets Multican kernel More...
IFX_EXTERN void | IfxMultican_setListCommand (Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel. More...
IFX_EXTERN IfxMultican_Index | IfxMultican_getIndex (Ifx_CAN *multican)
API to get the resource index of the CAN specified. More...
IFX_EXTERN Ifx_CAN * | IfxMultican_getAddress (IfxMultican_Index multican)
IFX_INLINE void | IfxMultican_Node_activate (Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Node_deactivate (Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities. More...
IFX_INLINE void | IfxMultican_Node_disableConfigurationChange (Ifx_CAN_N *hwNode)
Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node. More...
IFX_INLINE void | IfxMultican_Node_enableConfigurationChange (Ifx_CAN_N *hwNode)
Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node. More...
IFX_INLINE Ifx_CAN_N * | IfxMultican_Node_getPointer (Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number. More...
IFX_INLINE void | IfxMultican_Node_resetControlRegister (Ifx_CAN_N *hwNode)
Resets the control register of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_resetErrorCounters (Ifx_CAN_N *hwNode)
Resets the error counters of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_resetInterruptPointers (Ifx_CAN_N *hwNode)
Resets the interrupt pointers of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setAlertInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the alert interrupt of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setAlertInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setAnalyzerMode (Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the analyzer mode of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setErrorWarningLevel (Ifx_CAN_N *hwNode, uint8 level)
Determines the threshold value (warning level, default 96) to be reached
in order to set the corresponding error warning bit EWRN. More...
IFX_INLINE void | IfxMultican_Node_setFastNode (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the flexible data rate of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the CAN frame counter overflow interrupt of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setFrameCounterMode (Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
Sets the operation mode of the frame counter of the CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setLastErrorCodeInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the last error code interrupt of CAN node x.
This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error). More...
IFX_INLINE void | IfxMultican_Node_setLastErrorCodeInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setLoopBackMode (Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the loopback mode of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setReceiveErrorCounter (Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the receive error counter of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTimerEventInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setTransceiverDelayCompensation (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transceiver delay compensation of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTransceiverDelayCompensationOffset (Ifx_CAN_N *hwNode, uint16 value)
Sets transceiver delay ompensation offset of CAN node x. More...
IFX_INLINE void | IfxMultican_Node_setTransferInterrupt (Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transfer interrupt of CAN node x.
This interrupt is generated after the successful reception or transmission of a CAN frame in node x. More...
IFX_INLINE void | IfxMultican_Node_setTransferInterruptPointer (Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x. More...
IFX_INLINE void | IfxMultican_Node_setTransmitErrorCounter (Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the transmit error counter of CAN node x. More...
IFX_INLINE IfxMultican_DataLengthCode | IfxMultican_Node_getCodeFromDataLength (uint32 dataLength)
Return the DLC code corresponding to the data length in byte. More...
IFX_INLINE uint32 | IfxMultican_Node_getDataLengthFromCode (IfxMultican_DataLengthCode code)
Get the datalength in bytes from DLC. More...
IFX_EXTERN void | IfxMultican_Node_deinit (Ifx_CAN_N *hwNode)
Reset the CAN node. More...
IFX_EXTERN boolean | IfxMultican_Node_initRxPin (Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
IFX_EXTERN boolean | IfxMultican_Node_initTxPin (Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_Node_recoverBusOff (Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off. More...
IFX_EXTERN void | IfxMultican_Node_setBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register. More...
IFX_EXTERN void | IfxMultican_calcTimingFromBTR (float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing. More...
IFX_INLINE void | IfxMultican_Message_init (IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
Initializes a CAN message. More...
IFX_INLINE void | IfxMultican_Message_longFrameInit (IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
Initializes a CAN message long frame. More...
IFX_INLINE void | IfxMultican_MsgObj_clearDataRegisters (Ifx_CAN_MO *hwObj)
Sets priority class of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearFifoGatewayPointers (Ifx_CAN_MO *hwObj)
Clears the FIFO/GateWay pointers of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearRxPending (Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_clearTxPending (Ifx_CAN_MO *hwObj)
Clear the TX pending flag of a message object. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_MsgObj_getBottomObjectPointer (Ifx_CAN_MO *hwObj)
Gets bottom object pointer of the base message object. More...
IFX_INLINE IfxMultican_DataLengthCode | IfxMultican_MsgObj_getDataLengthCode (Ifx_CAN_MO *hwObj)
Gets data length code of a message object. More...
IFX_INLINE uint32 | IfxMultican_MsgObj_getMessageId (Ifx_CAN_MO *hwObj)
Gets message identifier of message object. More...
IFX_INLINE IfxMultican_MsgObjId | IfxMultican_MsgObj_getNextObjectPointer (Ifx_CAN_MO *hwObj)
Returns next object pointer (PNEXT) of the current message object. More...
IFX_INLINE Ifx_CAN_MO * | IfxMultican_MsgObj_getPointer (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isExtendedFrame (Ifx_CAN_MO *hwObj)
Get the message object status. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isRxPending (Ifx_CAN_MO *hwObj)
Returns the RX pending flag of a message object. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isTransmitRequested (Ifx_CAN_MO *hwObj)
Returns the TX Request flag of a message object. More...
IFX_INLINE boolean | IfxMultican_MsgObj_isTxPending (Ifx_CAN_MO *hwObj)
Returns the TX pending flag of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setAcceptanceMask (Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
Sets acceptance mask for the message identifier. More...
IFX_INLINE void | IfxMultican_MsgObj_setBitRateSwitch (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setBottomObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setCurrentObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom current pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataLengthCode (Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setDataLengthCodeCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data length code copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setExtendedDataLength (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable extended data length of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setGatewayDataFrameSend (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TXRQ of the gateway deatination object. More...
IFX_INLINE void | IfxMultican_MsgObj_setIdentifierCopy (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable identifier copy of a gateway source message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setIdentifierExtension (Ifx_CAN_MO *hwObj, boolean extension)
Sets identifier extension of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMatchingId (Ifx_CAN_MO *hwObj, boolean matchingId)
Sets acceptance mask for the message IDE bit. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessageId (Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessageMode (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
Sets the message mode of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setMessagePendingNumber (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
Sets message pending number that selects the bit position of the bit in the Message Pending Register
that is set upon a message object n receive/transmit interrupt. More...
IFX_INLINE void | IfxMultican_MsgObj_setOverflowInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable overflow interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setPriorityClass (Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
Sets priority class of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setReceiveInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable receive interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setReceiveInterruptNodePointer (Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets receive interrupt node pointer of message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setRemoteMonitoring (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit object remote monitoring of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSelectObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object select pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSingleDataTransfer (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single data transfer of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setSingleTransmitTrial (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single transmit trial of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTopObjectPointer (Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets top object pointer of the base message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTransmitInterrupt (Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit interrupt of a message object. More...
IFX_INLINE void | IfxMultican_MsgObj_setTransmitInterruptNodePointer (Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets transmit interrupt node pointer of message object. More...
IFX_EXTERN boolean | IfxMultican_MsgObj_cancelSend (Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been started. More...
IFX_EXTERN void | IfxMultican_MsgObj_clearStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object. More...
IFX_EXTERN void | IfxMultican_MsgObj_deinit (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IFX_EXTERN IfxMultican_MsgObjId | IfxMultican_MsgObj_getPendingId (Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IFX_EXTERN IfxMultican_MsgObjStat | IfxMultican_MsgObj_getStatus (Ifx_CAN_MO *hwObj)
Get the message object status. More...
IFX_EXTERN boolean | IfxMultican_MsgObj_getStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_readLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_readMessage (Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_sendLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_sendMessage (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IFX_EXTERN IfxMultican_Status | IfxMultican_MsgObj_writeTxfifo (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IFX_EXTERN void | IfxMultican_MsgObj_setFilter (Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter. More...
IFX_EXTERN void | IfxMultican_MsgObj_setStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxMultican_getSrcPointer (Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register. More...

Detailed Description

MULTICAN basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMultican.h.

Data Structure Documentation

◆ IfxMultican_Message

struct IfxMultican_Message

CAN message definition.

Definition at line 224 of file IfxMultican.h.

Data Fields
uint32 | data[2] | CAN message data.
boolean | fastBitRate | CAN FD fast bit rate enable/disable.
uint32 | id | CAN message ID.
IfxMultican_DataLengthCode | lengthCode | CAN message data length code.

◆ IfxMultican_MsgObjStat

union IfxMultican_MsgObjStat

Message object status bit-fields.

Definition at line 234 of file IfxMultican.h.

Data Fields
Ifx_CAN_MO_STAT_Bits | B
unsigned int | U

Typedef Documentation

◆ IfxMultican_MsgObjId

typedef sint32 IfxMultican_MsgObjId

Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.

Definition at line 60 of file IfxMultican.h.


iLLD_TC26B: PORTS

Modules | Files
PORTS
iLLD
Collaboration diagram for PORTS:

Modules

Implementation
Standard Driver
PORT Pin Mapping
How to use the PORT I/O driver?
Interface Driver

Files

file | IfxPort_cfg.h
PORT on-chip implementation data.
file | IfxPort_PinMap.c
PORT I/O map.
file | IfxPort_PinMap.h
PORT I/O map.
file | IfxPort_Io.h
PORT IO details.
file | IfxPort.h
PORT basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » PORTS
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » PORTS
Collaboration diagram for Standard Driver:

Modules

Enumerations
Data structures
Single Pin Functions
Group Access Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » PORTS » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPort_ControlledBy {
IfxPort_ControlledBy_port = 0,
IfxPort_ControlledBy_hsct = 1
}
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx. More...
enum IfxPort_InputMode {
IfxPort_InputMode_undefined = -1,
IfxPort_InputMode_noPullDevice = 0 << 3,
IfxPort_InputMode_pullDown = 1U << 3,
IfxPort_InputMode_pullUp = 2U << 3
}
Ifx_P output modification modes definition. More...
enum IfxPort_Mode {
IfxPort_Mode_inputNoPullDevice = 0,
IfxPort_Mode_inputPullDown = 8U,
IfxPort_Mode_inputPullUp = 0x10U,
IfxPort_Mode_outputPushPullGeneral = 0x80U,
IfxPort_Mode_outputPushPullAlt1 = 0x88U,
IfxPort_Mode_outputPushPullAlt2 = 0x90U,
IfxPort_Mode_outputPushPullAlt3 = 0x98U,
IfxPort_Mode_outputPushPullAlt4 = 0xA0U,
IfxPort_Mode_outputPushPullAlt5 = 0xA8U,
IfxPort_Mode_outputPushPullAlt6 = 0xB0U,
IfxPort_Mode_outputPushPullAlt7 = 0xB8U,
IfxPort_Mode_outputOpenDrainGeneral = 0xC0U,
IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U,
IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U,
IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U,
IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U,
IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U,
IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U,
IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U
}
Ifx_P input / output mode definition. More...
enum IfxPort_OutputIdx {
IfxPort_OutputIdx_general = 0x10U << 3,
IfxPort_OutputIdx_alt1 = 0x11U << 3,
IfxPort_OutputIdx_alt2 = 0x12U << 3,
IfxPort_OutputIdx_alt3 = 0x13U << 3,
IfxPort_OutputIdx_alt4 = 0x14U << 3,
IfxPort_OutputIdx_alt5 = 0x15U << 3,
IfxPort_OutputIdx_alt6 = 0x16U << 3,
IfxPort_OutputIdx_alt7 = 0x17U << 3
}
Pin output alternate index. More...
enum IfxPort_OutputMode {
IfxPort_OutputMode_pushPull = 0x10U << 3,
IfxPort_OutputMode_openDrain = 0x18U << 3
}
Pin output mode definition. More...
enum IfxPort_PadDriver {
IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0,
IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1,
IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2,
IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3,
IfxPort_PadDriver_lvdsSpeed1 = 4,
IfxPort_PadDriver_lvdsSpeed2 = 5,
IfxPort_PadDriver_lvdsSpeed3 = 6,
IfxPort_PadDriver_lvdsSpeed4 = 7,
IfxPort_PadDriver_ttlSpeed1 = 8,
IfxPort_PadDriver_ttlSpeed2 = 9,
IfxPort_PadDriver_ttlSpeed3 = 10,
IfxPort_PadDriver_ttlSpeed4 = 11
}
Pad driver mode definition (strength and slew rate). More...
enum IfxPort_PadSupply {
IfxPort_PadSupply_5v = 0,
IfxPort_PadSupply_3v = 1
}
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair. More...
enum IfxPort_State {
IfxPort_State_notChanged = (0 << 16) | (0 << 0),
IfxPort_State_high = (0 << 16) | (1U << 0),
IfxPort_State_low = (1U << 16) | (0 << 0),
IfxPort_State_toggled = (1U << 16) | (1U << 0)
}
Ifx_P output modification modes definition. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPort_ControlledBy

enum IfxPort_ControlledBy

The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx.

Enumerator
IfxPort_ControlledBy_port | port controlled by PORT Module
IfxPort_ControlledBy_hsct | Port controlled by HSCT Module.

Definition at line 55 of file IfxPort.h.

◆ IfxPort_InputMode

enum IfxPort_InputMode

Ifx_P output modification modes definition.

Enumerator
IfxPort_InputMode_undefined
IfxPort_InputMode_noPullDevice
IfxPort_InputMode_pullDown
IfxPort_InputMode_pullUp

Definition at line 63 of file IfxPort.h.

◆ IfxPort_Mode

enum IfxPort_Mode

Ifx_P input / output mode definition.

See also
Ifx_P.IOCR, IfxPort_setPinMode()
Enumerator
IfxPort_Mode_inputNoPullDevice | Input, No pull device connected.
IfxPort_Mode_inputPullDown | Input, pull-down device connected.
IfxPort_Mode_inputPullUp | Input, pull-up device connected.
IfxPort_Mode_outputPushPullGeneral | Push-pull, General-purpose output.
IfxPort_Mode_outputPushPullAlt1 | Push-pull, Alternate output function 1.
IfxPort_Mode_outputPushPullAlt2 | Push-pull, Alternate output function 2.
IfxPort_Mode_outputPushPullAlt3 | Push-pull, Alternate output function 3.
IfxPort_Mode_outputPushPullAlt4 | Push-pull, Alternate output function 4.
IfxPort_Mode_outputPushPullAlt5 | Push-pull, Alternate output function 5.
IfxPort_Mode_outputPushPullAlt6 | Push-pull, Alternate output function 6.
IfxPort_Mode_outputPushPullAlt7 | Push-pull, Alternate output function 7.
IfxPort_Mode_outputOpenDrainGeneral | Open-drain, General-purpose output.
IfxPort_Mode_outputOpenDrainAlt1 | Open-drain, Alternate output function 1.
IfxPort_Mode_outputOpenDrainAlt2 | Open-drain, Alternate output function 2.
IfxPort_Mode_outputOpenDrainAlt3 | Open-drain, Alternate output function 3.
IfxPort_Mode_outputOpenDrainAlt4 | Open-drain, Alternate output function 4.
IfxPort_Mode_outputOpenDrainAlt5 | Open-drain, Alternate output function 5.
IfxPort_Mode_outputOpenDrainAlt6 | Open-drain, Alternate output function 6.
IfxPort_Mode_outputOpenDrainAlt7 | Open-drain, Alternate output function 7.

Definition at line 75 of file IfxPort.h.

◆ IfxPort_OutputIdx

enum IfxPort_OutputIdx

Pin output alternate index.

Enumerator
IfxPort_OutputIdx_general
IfxPort_OutputIdx_alt1
IfxPort_OutputIdx_alt2
IfxPort_OutputIdx_alt3
IfxPort_OutputIdx_alt4
IfxPort_OutputIdx_alt5
IfxPort_OutputIdx_alt6
IfxPort_OutputIdx_alt7

Definition at line 100 of file IfxPort.h.

◆ IfxPort_OutputMode

enum IfxPort_OutputMode

Pin output mode definition.

Enumerator
IfxPort_OutputMode_pushPull
IfxPort_OutputMode_openDrain

Definition at line 114 of file IfxPort.h.

◆ IfxPort_PadDriver

enum IfxPort_PadDriver

Pad driver mode definition (strength and slew rate).

See also
Ifx_P.PDR, IfxPort_setPinPadDriver()
Enumerator
IfxPort_PadDriver_cmosAutomotiveSpeed1 | Speed grade 1.
IfxPort_PadDriver_cmosAutomotiveSpeed2 | Speed grade 2.
IfxPort_PadDriver_cmosAutomotiveSpeed3 | Speed grade 3.
IfxPort_PadDriver_cmosAutomotiveSpeed4 | Speed grade 4.
IfxPort_PadDriver_lvdsSpeed1 | Lvds Speed grade 1.
IfxPort_PadDriver_lvdsSpeed2 | Lvds Speed grade 2.
IfxPort_PadDriver_lvdsSpeed3 | Lvds Speed grade 3.
IfxPort_PadDriver_lvdsSpeed4 | Lvds Speed grade 4.
IfxPort_PadDriver_ttlSpeed1 | Speed grade 1.
IfxPort_PadDriver_ttlSpeed2 | Speed grade 2.
IfxPort_PadDriver_ttlSpeed3 | Speed grade 3.
IfxPort_PadDriver_ttlSpeed4 | Speed grade 4.

Definition at line 124 of file IfxPort.h.

◆ IfxPort_PadSupply

enum IfxPort_PadSupply

MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair.

Enumerator
IfxPort_PadSupply_5v | select, 5V supply
IfxPort_PadSupply_3v | select, 3V supply

Definition at line 142 of file IfxPort.h.

◆ IfxPort_State

enum IfxPort_State

Ifx_P output modification modes definition.

See also
Ifx_P.OMR, IfxPort_setPinState()
Enumerator
IfxPort_State_notChanged | Ifx_P pin is left unchanged.
IfxPort_State_high | Ifx_P pin is set to high.
IfxPort_State_low | Ifx_P pin is set to low.
IfxPort_State_toggled | Ifx_P pin is toggled.

Definition at line 152 of file IfxPort.h.


iLLD_TC26B: Data structures

Data Structures
Data structures
iLLD » PORTS » Standard Driver
Collaboration diagram for Data structures:

Data Structures

struct | IfxPort_Pin
Defines a pin. More...
struct | IfxPort_Pin_Config
To configure pins. More...

Detailed Description

Data Structure Documentation

◆ IfxPort_Pin

struct IfxPort_Pin

Defines a pin.

Definition at line 170 of file IfxPort.h.

Data Fields
uint8 | pinIndex
Ifx_P * | port

◆ IfxPort_Pin_Config

struct IfxPort_Pin_Config

To configure pins.

Definition at line 178 of file IfxPort.h.

Data Fields
IfxPort_OutputIdx | mode
IfxPort_PadDriver | padDriver
uint8 | pinIndex
Ifx_P * | port


iLLD_TC26B: Single Pin Functions

Functions
Single Pin Functions
iLLD » PORTS » Standard Driver
Collaboration diagram for Single Pin Functions:

Functions

IFX_INLINE boolean | IfxPort_getPinState (Ifx_P *port, uint8 pinIndex)
Return the port state. More...
IFX_INLINE void | IfxPort_setPinHigh (Ifx_P *port, uint8 pinIndex)
Set the port output. More...
IFX_INLINE void | IfxPort_setPinLow (Ifx_P *port, uint8 pinIndex)
Reset the port output. More...
IFX_INLINE void | IfxPort_setPinModeInput (Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinModeOutput (Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinState (Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output. More...
IFX_INLINE void | IfxPort_togglePin (Ifx_P *port, uint8 pinIndex)
Toggle the port output. More...
IFX_EXTERN boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
IFX_EXTERN void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...

Detailed Description

Function Documentation

◆ IfxPort_disableEmergencyStop()

IFX_EXTERN boolean IfxPort_disableEmergencyStop | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
Returns TRUE if the emergency stop function has been disabled; FALSE if the emergency stop function could not be disabled

Coding example: /code if( !IfxPort_disableEmergencyStop(&MODULE_P33, 0) ) { // failed to disable emergency stop for P33.0 } /endcode

See also
IfxPort_disableEmergencyStop(), IfxPort_resetESR()

Definition at line 35 of file IfxPort.c.

◆ IfxPort_enableEmergencyStop()

IFX_EXTERN boolean IfxPort_enableEmergencyStop | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
Returns TRUE if the emergency stop function has been enabled; FALSE if the emergency stop function could not be enabled

Coding example:

if( !IfxPort_enableEmergencyStop(&MODULE_P33, 0) ) {
// failed to enable emergency stop for P33.0
}
See also
IfxPort_disableEmergencyStop(), IfxPort_setESR()

Definition at line 58 of file IfxPort.c.

◆ IfxPort_getPinState()

IFX_INLINE boolean IfxPort_getPinState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Return the port state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the state should be returned.
Returns
Returns TRUE the pin is high; FALSE the pin is low

Coding example:

if( IfxPort_getPinState(&MODULE_P33, 0) ) {
// ...
}

Definition at line 536 of file IfxPort.h.

◆ IfxPort_setPinHigh()

IFX_INLINE void IfxPort_setPinHigh | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Set the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be set.
Returns
None

Coding example:

IfxPort_setPinHigh(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_togglePin()

Definition at line 548 of file IfxPort.h.

◆ IfxPort_setPinLow()

IFX_INLINE void IfxPort_setPinLow | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Reset the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be reset.
Returns
None

Coding example:

IfxPort_setPinLow(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinHigh(), IfxPort_togglePin()

Definition at line 554 of file IfxPort.h.

◆ IfxPort_setPinMode()

IFX_EXTERN void IfxPort_setPinMode | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_Mode | mode
 | ) |  |

Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
Returns
None

Coding example:

IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);

Definition at line 260 of file IfxPort.c.

Referenced by IfxPort_Io_initModule(), IfxPort_setPinModeInput(), and IfxPort_setPinModeOutput().

◆ IfxPort_setPinModeInput()

IFX_INLINE void IfxPort_setPinModeInput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_InputMode | mode
 | ) |  |

Configure the port input / output mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
Returns
None

Coding example:

IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);

Definition at line 560 of file IfxPort.h.

Referenced by IfxAsclin_initCtsPin(), IfxAsclin_initRxPin(), IfxCcu6_initCc60InPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc61InPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc62InPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCcpos0Pin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1Pin(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2Pin(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCtrapPin(), IfxCcu6_initCtrapPinWithPadLevel(), IfxCcu6_initT12hrPin(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_initT13hrPin(), IfxCcu6_initT13hrPinWithPadLevel(), IfxCif_Cam_initPortPins(), IfxDsadc_initCinPin(), IfxDsadc_initDinPin(), IfxDsadc_initDsnPin(), IfxDsadc_initDspPin(), IfxDsadc_initItrPin(), IfxDsadc_initSgPin(), IfxEray_initRxPin(), IfxEray_initRxPinWithPadLevel(), IfxEth_setupMiiInputPins(), IfxEth_setupRmiiInputPins(), IfxGpt12_initCapInPin(), IfxGpt12_initCapInPinWithPadLevel(), IfxGpt12_initTxEudInPin(), IfxGpt12_initTxEudInPinWithPadLevel(), IfxGpt12_initTxInPin(), IfxGpt12_initTxInPinWithPadLevel(), IfxGtm_PinMap_setTimTin(), IfxHssl_Hssl_initHsctModule(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxMultican_Node_initRxPin(), IfxPsi5_initRxPin(), IfxPsi5s_initRxPin(), IfxQspi_initMrstInPin(), IfxQspi_initMrstInPinWithPadLevel(), IfxQspi_initMtsrInPin(), IfxQspi_initMtsrInPinWithPadLevel(), IfxQspi_initSclkInPin(), IfxQspi_initSclkInPinWithPadLevel(), IfxQspi_initSlsi(), IfxQspi_initSlsiWithPadLevel(), IfxScuEru_initReqPin(), and IfxSent_initSentPin().

◆ IfxPort_setPinModeOutput()

IFX_INLINE void IfxPort_setPinModeOutput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_OutputIdx | index
 | ) |  |

Configure the port input / output mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be configured.
mode | Specifies the port pin mode.
index | Specifies the alternate (or general purpose) output channel.
Returns
None

Coding example:

IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

Definition at line 566 of file IfxPort.h.

Referenced by IfxAsclin_initRtsPin(), IfxAsclin_initSclkPin(), IfxAsclin_initSlsoPin(), IfxAsclin_initTxPin(), IfxCcu6_initCc60OutPin(), IfxCcu6_initCc61OutPin(), IfxCcu6_initCc62OutPin(), IfxCcu6_initCout60Pin(), IfxCcu6_initCout61Pin(), IfxCcu6_initCout62Pin(), IfxCcu6_initCout63Pin(), IfxDsadc_initCgPwmPin(), IfxDsadc_initCoutPin(), IfxDsadc_Rdc_initHwChannels(), IfxEray_initTxEnPin(), IfxEray_initTxPin(), IfxEth_setupMiiOutputPins(), IfxEth_setupRmiiOutputPins(), IfxGpt12_initTxOutPin(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTomTout(), IfxHssl_Hssl_initHsctModule(), IfxI2c_initSclSdaPin(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxMultican_Node_initTxPin(), IfxPsi5_initTxPin(), IfxPsi5s_initClkPin(), IfxPsi5s_initTxPin(), IfxQspi_initMrstOutPin(), IfxQspi_initMtsrOutPin(), IfxQspi_initSclkOutPin(), IfxQspi_initSlso(), IfxSent_initSpcPin(), IfxSmu_initFsp(), IfxVadc_initEmuxPin(), and IfxVadc_initGxBflPin().

◆ IfxPort_setPinPadDriver()

IFX_EXTERN void IfxPort_setPinPadDriver | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Configure the pad driver mode.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the mode will be set.
padDriver | Specifies the driver mode.
Returns
None

Coding example:

// enable strong 3.3V driver
IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Definition at line 323 of file IfxPort.c.

Referenced by IfxAsclin_initCtsPin(), IfxAsclin_initRtsPin(), IfxAsclin_initRxPin(), IfxAsclin_initSclkPin(), IfxAsclin_initSlsoPin(), IfxAsclin_initTxPin(), IfxCcu6_initCc60InPinWithPadLevel(), IfxCcu6_initCc60OutPin(), IfxCcu6_initCc61InPinWithPadLevel(), IfxCcu6_initCc61OutPin(), IfxCcu6_initCc62InPinWithPadLevel(), IfxCcu6_initCc62OutPin(), IfxCcu6_initCcpos0PinWithPadLevel(), IfxCcu6_initCcpos1PinWithPadLevel(), IfxCcu6_initCcpos2PinWithPadLevel(), IfxCcu6_initCout60Pin(), IfxCcu6_initCout61Pin(), IfxCcu6_initCout62Pin(), IfxCcu6_initCout63Pin(), IfxCcu6_initCtrapPinWithPadLevel(), IfxCcu6_initT12hrPinWithPadLevel(), IfxCcu6_initT13hrPinWithPadLevel(), IfxDsadc_initCgPwmPin(), IfxDsadc_initCinPin(), IfxDsadc_initCoutPin(), IfxDsadc_initDinPin(), IfxDsadc_initDsnPin(), IfxDsadc_initDspPin(), IfxDsadc_initItrPin(), IfxDsadc_initSgPin(), IfxDsadc_Rdc_initHwChannels(), IfxEray_initRxPinWithPadLevel(), IfxEray_initTxEnPin(), IfxEray_initTxPin(), IfxEth_setupMiiInputPins(), IfxEth_setupMiiOutputPins(), IfxEth_setupRmiiInputPins(), IfxEth_setupRmiiOutputPins(), IfxGpt12_initCapInPinWithPadLevel(), IfxGpt12_initTxEudInPinWithPadLevel(), IfxGpt12_initTxInPinWithPadLevel(), IfxGpt12_initTxOutPin(), IfxGtm_PinMap_setAtomTout(), IfxGtm_PinMap_setTomTout(), IfxHssl_Hssl_initHsctModule(), IfxI2c_initSclSdaPin(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxMultican_Node_initRxPin(), IfxMultican_Node_initTxPin(), IfxPort_Io_initModule(), IfxPsi5_initRxPin(), IfxPsi5_initTxPin(), IfxPsi5s_initClkPin(), IfxPsi5s_initRxPin(), IfxPsi5s_initTxPin(), IfxQspi_initMrstInPinWithPadLevel(), IfxQspi_initMrstOutPin(), IfxQspi_initMtsrInPinWithPadLevel(), IfxQspi_initMtsrOutPin(), IfxQspi_initSclkInPinWithPadLevel(), IfxQspi_initSclkOutPin(), IfxQspi_initSlsiWithPadLevel(), IfxQspi_initSlso(), IfxSent_initSentPin(), IfxSent_initSpcPin(), IfxSmu_initFsp(), IfxVadc_initEmuxPin(), and IfxVadc_initGxBflPin().

◆ IfxPort_setPinState()

IFX_INLINE void IfxPort_setPinState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_State | action
 | ) |  |

Set / Resets / Toggle the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to modify.
action | Specifies the action: set, reset, toggle.
Returns
None

Coding example:

IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);

Definition at line 572 of file IfxPort.h.

Referenced by IfxGtm_Tom_PwmHl_init(), IfxPort_setPinHigh(), IfxPort_setPinLow(), IfxPort_togglePin(), IfxQspi_SpiMaster_activateSlso(), and IfxQspi_SpiMaster_deactivateSlso().

◆ IfxPort_togglePin()

IFX_INLINE void IfxPort_togglePin | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Toggle the port output.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin to be toggled.
Returns
None

Coding example:

IfxPort_togglePin(&MODULE_P33, 0);
See also
IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_setPinHigh()

Definition at line 578 of file IfxPort.h.


iLLD_TC26B: Group Access Functions

Functions
Group Access Functions
iLLD » PORTS » Standard Driver
Collaboration diagram for Group Access Functions:

Functions

IFX_INLINE uint32 | IfxPort_getGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state. More...
IFX_INLINE void | IfxPort_setGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state. More...
IFX_EXTERN Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IFX_EXTERN IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
IFX_EXTERN void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
IFX_EXTERN void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setPinModeLvdsHigh (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21) More...
IFX_EXTERN void | IfxPort_setPinModeLvdsMedium (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode More...

Detailed Description

Function Documentation

◆ IfxPort_getAddress()

IFX_EXTERN Ifx_P* IfxPort_getAddress ( IfxPort_Index port )

Returns the module address of the selected Port module.

Parameters
port Pointer to PORT module registers
Returns
PORT module register address

Definition at line 79 of file IfxPort.c.

◆ IfxPort_getGroupState()

IFX_INLINE uint32 IfxPort_getGroupState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask
 | ) |  |

Return the port group state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be read (starting from pinIndex)
Returns
Returns the selected pin values

Coding example:

// read the current value of P33[7:0]
uint16 value = IfxPort_getGroupState(&MODULE_P33, 0, 0xff);

Definition at line 530 of file IfxPort.h.

◆ IfxPort_getIndex()

IFX_EXTERN IfxPort_Index IfxPort_getIndex ( Ifx_P * port )

Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)

Parameters
port Pointer to the port for which the index number in IfxModule_IndexMap should be retrieved.
Returns
port index of IfxModule_IndexMap. return -1 in case of unknown port index.

Definition at line 98 of file IfxPort.c.

◆ IfxPort_setGroupModeInput()

IFX_EXTERN void IfxPort_setGroupModeInput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_InputMode | mode
 | ) |  |

Set pin modes to input at the pin location specified by '1' by the mask.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
mode | Specifies the port pin mode.
Returns
None

Coding example:

// configure P33.[7:0] as GPIO inputs with Pull-Down enabled
IfxPort_setGroupModeInput(&MODULE_P33, 0, 0xff, IfxPort_InputMode_pullDown);

Definition at line 138 of file IfxPort.c.

Referenced by IfxCif_Cam_initPortPins().

◆ IfxPort_setGroupModeOutput()

IFX_EXTERN void IfxPort_setGroupModeOutput | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_OutputMode | mode,
 |  | IfxPort_OutputIdx | index
 | ) |  |

Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
mode | Specifies the port pin mode.
index | Specifies the alternate (or general purpose) output channel.
Returns
None

Coding example:

// configure P33.[7:0] as GPIO outputs
IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

Definition at line 176 of file IfxPort.c.

◆ IfxPort_setGroupPadDriver()

IFX_EXTERN void IfxPort_setGroupPadDriver | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Set pad driver strength at the pin location specified by '1' by the mask.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
padDriver | Specifies the pad driver strength.
Returns
None

Coding example:

// configure P33.[7:0] to use CMOS pad driver with speed 1
IfxPort_setGroupPadDriver(&MODULE_P33, 0, 0xff, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Definition at line 216 of file IfxPort.c.

Referenced by IfxCif_Cam_initPortPins().

◆ IfxPort_setGroupState()

IFX_INLINE void IfxPort_setGroupState | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | uint16 | mask,
 |  | uint16 | data
 | ) |  |

Set the port group state.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | start at the given pin
mask | selects the pins which should be modified (starting from pinIndex)
data | specifies the value which should be set
Returns
None

Coding example:

// configure P33.[7:0] as GPIO outputs
IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
// set initial value
IfxPort_setGroupState(&MODULE_P33, 0, 0xff, 0x42);

Definition at line 542 of file IfxPort.h.

◆ IfxPort_setPinModeLvdsHigh()

IFX_EXTERN void IfxPort_setPinModeLvdsHigh | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_Mode | mode,
 |  | IfxPort_ControlledBy | enablePortControlled
 | ) |  |

set LVDSH mode (configured for Port21)

Parameters
port | Pointer to the port which should be accessed.
pinIndex | specifies pin to be modified
mode | specifes the mode of pin
enablePortControlled | specifies whether it is controlled by port or HSCT
Returns
None

Definition at line 278 of file IfxPort.c.

◆ IfxPort_setPinModeLvdsMedium()

IFX_EXTERN void IfxPort_setPinModeLvdsMedium | ( | Ifx_P * | port,
 |  | uint8 | pinIndex,
 |  | IfxPort_PadDriver | lvdsPadDriver,
 |  | IfxPort_PadSupply | padSupply
 | ) |  |

set LVDSM mode

Parameters
port | Pointer to the port which should be accessed.
pinIndex | specifies pin to be modified
lvdsPadDriver | select speed grade of LVDS Pad
padSupply | select the PAD supply (5/3.3V)
Returns
None

Definition at line 305 of file IfxPort.c.


iLLD_TC26B: PORT Pin Mapping

Macros | Variables
PORT Pin Mapping
iLLD » PORTS
Collaboration diagram for PORT Pin Mapping:

Macros

#define | IFXPORT_PINMAP_NUM_MODULES 41
Table dimensions. More...
#define | IFXPORT_PINMAP_PIN_NUM_ITEMS 15

Variables

IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9. More...
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table. More...

Detailed Description

Macro Definition Documentation

◆ IFXPORT_PINMAP_NUM_MODULES

#define IFXPORT_PINMAP_NUM_MODULES 41

Table dimensions.

Definition at line 157 of file IfxPort_PinMap.h.

◆ IFXPORT_PINMAP_PIN_NUM_ITEMS

#define IFXPORT_PINMAP_PIN_NUM_ITEMS 15

Definition at line 158 of file IfxPort_PinMap.h.

Variable Documentation

◆ IfxPort_P00_0

IFX_EXTERN IfxPort_Pin IfxPort_P00_0

IfxPort_P00_0.

Definition at line 37 of file IfxPort_PinMap.h.

◆ IfxPort_P00_1

IFX_EXTERN IfxPort_Pin IfxPort_P00_1

IfxPort_P00_1.

Definition at line 38 of file IfxPort_PinMap.h.

◆ IfxPort_P00_10

IFX_EXTERN IfxPort_Pin IfxPort_P00_10

IfxPort_P00_10.

Definition at line 39 of file IfxPort_PinMap.h.

◆ IfxPort_P00_11

IFX_EXTERN IfxPort_Pin IfxPort_P00_11

IfxPort_P00_11.

Definition at line 40 of file IfxPort_PinMap.h.

◆ IfxPort_P00_12

IFX_EXTERN IfxPort_Pin IfxPort_P00_12

IfxPort_P00_12.

Definition at line 41 of file IfxPort_PinMap.h.

◆ IfxPort_P00_2

IFX_EXTERN IfxPort_Pin IfxPort_P00_2

IfxPort_P00_2.

Definition at line 42 of file IfxPort_PinMap.h.

◆ IfxPort_P00_3

IFX_EXTERN IfxPort_Pin IfxPort_P00_3

IfxPort_P00_3.

Definition at line 43 of file IfxPort_PinMap.h.

◆ IfxPort_P00_4

IFX_EXTERN IfxPort_Pin IfxPort_P00_4

IfxPort_P00_4.

Definition at line 44 of file IfxPort_PinMap.h.

◆ IfxPort_P00_5

IFX_EXTERN IfxPort_Pin IfxPort_P00_5

IfxPort_P00_5.

Definition at line 45 of file IfxPort_PinMap.h.

◆ IfxPort_P00_6

IFX_EXTERN IfxPort_Pin IfxPort_P00_6

IfxPort_P00_6.

Definition at line 46 of file IfxPort_PinMap.h.

◆ IfxPort_P00_7

IFX_EXTERN IfxPort_Pin IfxPort_P00_7

IfxPort_P00_7.

Definition at line 47 of file IfxPort_PinMap.h.

◆ IfxPort_P00_8

IFX_EXTERN IfxPort_Pin IfxPort_P00_8

IfxPort_P00_8.

Definition at line 48 of file IfxPort_PinMap.h.

◆ IfxPort_P00_9

IFX_EXTERN IfxPort_Pin IfxPort_P00_9

IfxPort_P00_9.

Definition at line 49 of file IfxPort_PinMap.h.

◆ IfxPort_P02_0

IFX_EXTERN IfxPort_Pin IfxPort_P02_0

IfxPort_P02_0.

Definition at line 50 of file IfxPort_PinMap.h.

◆ IfxPort_P02_1

IFX_EXTERN IfxPort_Pin IfxPort_P02_1

IfxPort_P02_1.

Definition at line 51 of file IfxPort_PinMap.h.

◆ IfxPort_P02_2

IFX_EXTERN IfxPort_Pin IfxPort_P02_2

IfxPort_P02_2.

Definition at line 52 of file IfxPort_PinMap.h.

◆ IfxPort_P02_3

IFX_EXTERN IfxPort_Pin IfxPort_P02_3

IfxPort_P02_3.

Definition at line 53 of file IfxPort_PinMap.h.

◆ IfxPort_P02_4

IFX_EXTERN IfxPort_Pin IfxPort_P02_4

IfxPort_P02_4.

Definition at line 54 of file IfxPort_PinMap.h.

◆ IfxPort_P02_5

IFX_EXTERN IfxPort_Pin IfxPort_P02_5

IfxPort_P02_5.

Definition at line 55 of file IfxPort_PinMap.h.

◆ IfxPort_P02_6

IFX_EXTERN IfxPort_Pin IfxPort_P02_6

IfxPort_P02_6.

Definition at line 56 of file IfxPort_PinMap.h.

◆ IfxPort_P02_7

IFX_EXTERN IfxPort_Pin IfxPort_P02_7

IfxPort_P02_7.

Definition at line 57 of file IfxPort_PinMap.h.

◆ IfxPort_P02_8

IFX_EXTERN IfxPort_Pin IfxPort_P02_8

IfxPort_P02_8.

Definition at line 58 of file IfxPort_PinMap.h.

◆ IfxPort_P10_0

IFX_EXTERN IfxPort_Pin IfxPort_P10_0

IfxPort_P10_0.

Definition at line 59 of file IfxPort_PinMap.h.

◆ IfxPort_P10_1

IFX_EXTERN IfxPort_Pin IfxPort_P10_1

IfxPort_P10_1.

Definition at line 60 of file IfxPort_PinMap.h.

◆ IfxPort_P10_2

IFX_EXTERN IfxPort_Pin IfxPort_P10_2

IfxPort_P10_2.

Definition at line 61 of file IfxPort_PinMap.h.

◆ IfxPort_P10_3

IFX_EXTERN IfxPort_Pin IfxPort_P10_3

IfxPort_P10_3.

Definition at line 62 of file IfxPort_PinMap.h.

◆ IfxPort_P10_4

IFX_EXTERN IfxPort_Pin IfxPort_P10_4

IfxPort_P10_4.

Definition at line 63 of file IfxPort_PinMap.h.

◆ IfxPort_P10_5

IFX_EXTERN IfxPort_Pin IfxPort_P10_5

IfxPort_P10_5.

Definition at line 64 of file IfxPort_PinMap.h.

◆ IfxPort_P10_6

IFX_EXTERN IfxPort_Pin IfxPort_P10_6

IfxPort_P10_6.

Definition at line 65 of file IfxPort_PinMap.h.

◆ IfxPort_P10_7

IFX_EXTERN IfxPort_Pin IfxPort_P10_7

IfxPort_P10_7.

Definition at line 66 of file IfxPort_PinMap.h.

◆ IfxPort_P10_8

IFX_EXTERN IfxPort_Pin IfxPort_P10_8

IfxPort_P10_8.

Definition at line 67 of file IfxPort_PinMap.h.

◆ IfxPort_P11_10

IFX_EXTERN IfxPort_Pin IfxPort_P11_10

IfxPort_P11_10.

Definition at line 68 of file IfxPort_PinMap.h.

◆ IfxPort_P11_11

IFX_EXTERN IfxPort_Pin IfxPort_P11_11

IfxPort_P11_11.

Definition at line 69 of file IfxPort_PinMap.h.

◆ IfxPort_P11_12

IFX_EXTERN IfxPort_Pin IfxPort_P11_12

IfxPort_P11_12.

Definition at line 70 of file IfxPort_PinMap.h.

◆ IfxPort_P11_2

IFX_EXTERN IfxPort_Pin IfxPort_P11_2

IfxPort_P11_2.

Definition at line 71 of file IfxPort_PinMap.h.

◆ IfxPort_P11_3

IFX_EXTERN IfxPort_Pin IfxPort_P11_3

IfxPort_P11_3.

Definition at line 72 of file IfxPort_PinMap.h.

◆ IfxPort_P11_6

IFX_EXTERN IfxPort_Pin IfxPort_P11_6

IfxPort_P11_6.

Definition at line 73 of file IfxPort_PinMap.h.

◆ IfxPort_P11_9

IFX_EXTERN IfxPort_Pin IfxPort_P11_9

IfxPort_P11_9.

Definition at line 74 of file IfxPort_PinMap.h.

◆ IfxPort_P13_0

IFX_EXTERN IfxPort_Pin IfxPort_P13_0

IfxPort_P13_0.

Definition at line 75 of file IfxPort_PinMap.h.

◆ IfxPort_P13_1

IFX_EXTERN IfxPort_Pin IfxPort_P13_1

IfxPort_P13_1.

Definition at line 76 of file IfxPort_PinMap.h.

◆ IfxPort_P13_2

IFX_EXTERN IfxPort_Pin IfxPort_P13_2

IfxPort_P13_2.

Definition at line 77 of file IfxPort_PinMap.h.

◆ IfxPort_P13_3

IFX_EXTERN IfxPort_Pin IfxPort_P13_3

IfxPort_P13_3.

Definition at line 78 of file IfxPort_PinMap.h.

◆ IfxPort_P14_0

IFX_EXTERN IfxPort_Pin IfxPort_P14_0

IfxPort_P14_0.

Definition at line 79 of file IfxPort_PinMap.h.

◆ IfxPort_P14_1

IFX_EXTERN IfxPort_Pin IfxPort_P14_1

IfxPort_P14_1.

Definition at line 80 of file IfxPort_PinMap.h.

◆ IfxPort_P14_10

IFX_EXTERN IfxPort_Pin IfxPort_P14_10

IfxPort_P14_10.

Definition at line 81 of file IfxPort_PinMap.h.

◆ IfxPort_P14_2

IFX_EXTERN IfxPort_Pin IfxPort_P14_2

IfxPort_P14_2.

Definition at line 82 of file IfxPort_PinMap.h.

◆ IfxPort_P14_3

IFX_EXTERN IfxPort_Pin IfxPort_P14_3

IfxPort_P14_3.

Definition at line 83 of file IfxPort_PinMap.h.

◆ IfxPort_P14_4

IFX_EXTERN IfxPort_Pin IfxPort_P14_4

IfxPort_P14_4.

Definition at line 84 of file IfxPort_PinMap.h.

◆ IfxPort_P14_5

IFX_EXTERN IfxPort_Pin IfxPort_P14_5

IfxPort_P14_5.

Definition at line 85 of file IfxPort_PinMap.h.

◆ IfxPort_P14_6

IFX_EXTERN IfxPort_Pin IfxPort_P14_6

IfxPort_P14_6.

Definition at line 86 of file IfxPort_PinMap.h.

◆ IfxPort_P14_7

IFX_EXTERN IfxPort_Pin IfxPort_P14_7

IfxPort_P14_7.

Definition at line 87 of file IfxPort_PinMap.h.

◆ IfxPort_P14_8

IFX_EXTERN IfxPort_Pin IfxPort_P14_8

IfxPort_P14_8.

Definition at line 88 of file IfxPort_PinMap.h.

◆ IfxPort_P14_9

IFX_EXTERN IfxPort_Pin IfxPort_P14_9

IfxPort_P14_9.

Definition at line 89 of file IfxPort_PinMap.h.

◆ IfxPort_P15_0

IFX_EXTERN IfxPort_Pin IfxPort_P15_0

IfxPort_P15_0.

Definition at line 90 of file IfxPort_PinMap.h.

◆ IfxPort_P15_1

IFX_EXTERN IfxPort_Pin IfxPort_P15_1

IfxPort_P15_1.

Definition at line 91 of file IfxPort_PinMap.h.

◆ IfxPort_P15_2

IFX_EXTERN IfxPort_Pin IfxPort_P15_2

IfxPort_P15_2.

Definition at line 92 of file IfxPort_PinMap.h.

◆ IfxPort_P15_3

IFX_EXTERN IfxPort_Pin IfxPort_P15_3

IfxPort_P15_3.

Definition at line 93 of file IfxPort_PinMap.h.

◆ IfxPort_P15_4

IFX_EXTERN IfxPort_Pin IfxPort_P15_4

IfxPort_P15_4.

Definition at line 94 of file IfxPort_PinMap.h.

◆ IfxPort_P15_5

IFX_EXTERN IfxPort_Pin IfxPort_P15_5

IfxPort_P15_5.

Definition at line 95 of file IfxPort_PinMap.h.

◆ IfxPort_P15_6

IFX_EXTERN IfxPort_Pin IfxPort_P15_6

IfxPort_P15_6.

Definition at line 96 of file IfxPort_PinMap.h.

◆ IfxPort_P15_7

IFX_EXTERN IfxPort_Pin IfxPort_P15_7

IfxPort_P15_7.

Definition at line 97 of file IfxPort_PinMap.h.

◆ IfxPort_P15_8

IFX_EXTERN IfxPort_Pin IfxPort_P15_8

IfxPort_P15_8.

Definition at line 98 of file IfxPort_PinMap.h.

◆ IfxPort_P20_0

IFX_EXTERN IfxPort_Pin IfxPort_P20_0

IfxPort_P20_0.

Definition at line 99 of file IfxPort_PinMap.h.

◆ IfxPort_P20_1

IFX_EXTERN IfxPort_Pin IfxPort_P20_1

IfxPort_P20_1.

Definition at line 100 of file IfxPort_PinMap.h.

◆ IfxPort_P20_10

IFX_EXTERN IfxPort_Pin IfxPort_P20_10

IfxPort_P20_10.

Definition at line 101 of file IfxPort_PinMap.h.

◆ IfxPort_P20_11

IFX_EXTERN IfxPort_Pin IfxPort_P20_11

IfxPort_P20_11.

Definition at line 102 of file IfxPort_PinMap.h.

◆ IfxPort_P20_12

IFX_EXTERN IfxPort_Pin IfxPort_P20_12

IfxPort_P20_12.

Definition at line 103 of file IfxPort_PinMap.h.

◆ IfxPort_P20_13

IFX_EXTERN IfxPort_Pin IfxPort_P20_13

IfxPort_P20_13.

Definition at line 104 of file IfxPort_PinMap.h.

◆ IfxPort_P20_14

IFX_EXTERN IfxPort_Pin IfxPort_P20_14

IfxPort_P20_14.

Definition at line 105 of file IfxPort_PinMap.h.

◆ IfxPort_P20_3

IFX_EXTERN IfxPort_Pin IfxPort_P20_3

IfxPort_P20_3.

Definition at line 106 of file IfxPort_PinMap.h.

◆ IfxPort_P20_6

IFX_EXTERN IfxPort_Pin IfxPort_P20_6

IfxPort_P20_6.

Definition at line 107 of file IfxPort_PinMap.h.

◆ IfxPort_P20_7

IFX_EXTERN IfxPort_Pin IfxPort_P20_7

IfxPort_P20_7.

Definition at line 108 of file IfxPort_PinMap.h.

◆ IfxPort_P20_8

IFX_EXTERN IfxPort_Pin IfxPort_P20_8

IfxPort_P20_8.

Definition at line 109 of file IfxPort_PinMap.h.

◆ IfxPort_P20_9

IFX_EXTERN IfxPort_Pin IfxPort_P20_9

IfxPort_P20_9.

Definition at line 110 of file IfxPort_PinMap.h.

◆ IfxPort_P21_0

IFX_EXTERN IfxPort_Pin IfxPort_P21_0

IfxPort_P21_0.

Definition at line 111 of file IfxPort_PinMap.h.

◆ IfxPort_P21_1

IFX_EXTERN IfxPort_Pin IfxPort_P21_1

IfxPort_P21_1.

Definition at line 112 of file IfxPort_PinMap.h.

◆ IfxPort_P21_2

IFX_EXTERN IfxPort_Pin IfxPort_P21_2

IfxPort_P21_2.

Definition at line 113 of file IfxPort_PinMap.h.

◆ IfxPort_P21_3

IFX_EXTERN IfxPort_Pin IfxPort_P21_3

IfxPort_P21_3.

Definition at line 114 of file IfxPort_PinMap.h.

◆ IfxPort_P21_4

IFX_EXTERN IfxPort_Pin IfxPort_P21_4

IfxPort_P21_4.

Definition at line 115 of file IfxPort_PinMap.h.

◆ IfxPort_P21_5

IFX_EXTERN IfxPort_Pin IfxPort_P21_5

IfxPort_P21_5.

Definition at line 116 of file IfxPort_PinMap.h.

◆ IfxPort_P21_6

IFX_EXTERN IfxPort_Pin IfxPort_P21_6

IfxPort_P21_6.

Definition at line 117 of file IfxPort_PinMap.h.

◆ IfxPort_P21_7

IFX_EXTERN IfxPort_Pin IfxPort_P21_7

IfxPort_P21_7.

Definition at line 118 of file IfxPort_PinMap.h.

◆ IfxPort_P22_0

IFX_EXTERN IfxPort_Pin IfxPort_P22_0

IfxPort_P22_0.

Definition at line 119 of file IfxPort_PinMap.h.

◆ IfxPort_P22_1

IFX_EXTERN IfxPort_Pin IfxPort_P22_1

IfxPort_P22_1.

Definition at line 120 of file IfxPort_PinMap.h.

◆ IfxPort_P22_2

IFX_EXTERN IfxPort_Pin IfxPort_P22_2

IfxPort_P22_2.

Definition at line 121 of file IfxPort_PinMap.h.

◆ IfxPort_P22_3

IFX_EXTERN IfxPort_Pin IfxPort_P22_3

IfxPort_P22_3.

Definition at line 122 of file IfxPort_PinMap.h.

◆ IfxPort_P23_0

IFX_EXTERN IfxPort_Pin IfxPort_P23_0

IfxPort_P23_0.

Definition at line 123 of file IfxPort_PinMap.h.

◆ IfxPort_P23_1

IFX_EXTERN IfxPort_Pin IfxPort_P23_1

IfxPort_P23_1.

Definition at line 124 of file IfxPort_PinMap.h.

◆ IfxPort_P23_2

IFX_EXTERN IfxPort_Pin IfxPort_P23_2

IfxPort_P23_2.

Definition at line 125 of file IfxPort_PinMap.h.

◆ IfxPort_P23_3

IFX_EXTERN IfxPort_Pin IfxPort_P23_3

IfxPort_P23_3.

Definition at line 126 of file IfxPort_PinMap.h.

◆ IfxPort_P23_4

IFX_EXTERN IfxPort_Pin IfxPort_P23_4

IfxPort_P23_4.

Definition at line 127 of file IfxPort_PinMap.h.

◆ IfxPort_P23_5

IFX_EXTERN IfxPort_Pin IfxPort_P23_5

IfxPort_P23_5.

Definition at line 128 of file IfxPort_PinMap.h.

◆ IfxPort_P32_0

IFX_EXTERN IfxPort_Pin IfxPort_P32_0

IfxPort_P32_0.

Definition at line 129 of file IfxPort_PinMap.h.

◆ IfxPort_P32_2

IFX_EXTERN IfxPort_Pin IfxPort_P32_2

IfxPort_P32_2.

Definition at line 130 of file IfxPort_PinMap.h.

◆ IfxPort_P32_3

IFX_EXTERN IfxPort_Pin IfxPort_P32_3

IfxPort_P32_3.

Definition at line 131 of file IfxPort_PinMap.h.

◆ IfxPort_P32_4

IFX_EXTERN IfxPort_Pin IfxPort_P32_4

IfxPort_P32_4.

Definition at line 132 of file IfxPort_PinMap.h.

◆ IfxPort_P33_0

IFX_EXTERN IfxPort_Pin IfxPort_P33_0

IfxPort_P33_0.

Definition at line 133 of file IfxPort_PinMap.h.

◆ IfxPort_P33_1

IFX_EXTERN IfxPort_Pin IfxPort_P33_1

IfxPort_P33_1.

Definition at line 134 of file IfxPort_PinMap.h.

◆ IfxPort_P33_10

IFX_EXTERN IfxPort_Pin IfxPort_P33_10

IfxPort_P33_10.

Definition at line 135 of file IfxPort_PinMap.h.

◆ IfxPort_P33_11

IFX_EXTERN IfxPort_Pin IfxPort_P33_11

IfxPort_P33_11.

Definition at line 136 of file IfxPort_PinMap.h.

◆ IfxPort_P33_12

IFX_EXTERN IfxPort_Pin IfxPort_P33_12

IfxPort_P33_12.

Definition at line 137 of file IfxPort_PinMap.h.

◆ IfxPort_P33_13

IFX_EXTERN IfxPort_Pin IfxPort_P33_13

IfxPort_P33_13.

Definition at line 138 of file IfxPort_PinMap.h.

◆ IfxPort_P33_2

IFX_EXTERN IfxPort_Pin IfxPort_P33_2

IfxPort_P33_2.

Definition at line 139 of file IfxPort_PinMap.h.

◆ IfxPort_P33_3

IFX_EXTERN IfxPort_Pin IfxPort_P33_3

IfxPort_P33_3.

Definition at line 140 of file IfxPort_PinMap.h.

◆ IfxPort_P33_4

IFX_EXTERN IfxPort_Pin IfxPort_P33_4

IfxPort_P33_4.

Definition at line 141 of file IfxPort_PinMap.h.

◆ IfxPort_P33_5

IFX_EXTERN IfxPort_Pin IfxPort_P33_5

IfxPort_P33_5.

Definition at line 142 of file IfxPort_PinMap.h.

◆ IfxPort_P33_6

IFX_EXTERN IfxPort_Pin IfxPort_P33_6

IfxPort_P33_6.

Definition at line 143 of file IfxPort_PinMap.h.

◆ IfxPort_P33_7

IFX_EXTERN IfxPort_Pin IfxPort_P33_7

IfxPort_P33_7.

Definition at line 144 of file IfxPort_PinMap.h.

◆ IfxPort_P33_8

IFX_EXTERN IfxPort_Pin IfxPort_P33_8

IfxPort_P33_8.

Definition at line 145 of file IfxPort_PinMap.h.

◆ IfxPort_P33_9

IFX_EXTERN IfxPort_Pin IfxPort_P33_9

IfxPort_P33_9.

Definition at line 146 of file IfxPort_PinMap.h.

◆ IfxPort_P40_0

IFX_EXTERN IfxPort_Pin IfxPort_P40_0

IfxPort_P40_0.

Definition at line 147 of file IfxPort_PinMap.h.

◆ IfxPort_P40_1

IFX_EXTERN IfxPort_Pin IfxPort_P40_1

IfxPort_P40_1.

Definition at line 148 of file IfxPort_PinMap.h.

◆ IfxPort_P40_2

IFX_EXTERN IfxPort_Pin IfxPort_P40_2

IfxPort_P40_2.

Definition at line 149 of file IfxPort_PinMap.h.

◆ IfxPort_P40_3

IFX_EXTERN IfxPort_Pin IfxPort_P40_3

IfxPort_P40_3.

Definition at line 150 of file IfxPort_PinMap.h.

◆ IfxPort_P40_6

IFX_EXTERN IfxPort_Pin IfxPort_P40_6

IfxPort_P40_6.

Definition at line 151 of file IfxPort_PinMap.h.

◆ IfxPort_P40_7

IFX_EXTERN IfxPort_Pin IfxPort_P40_7

IfxPort_P40_7.

Definition at line 152 of file IfxPort_PinMap.h.

◆ IfxPort_P40_8

IFX_EXTERN IfxPort_Pin IfxPort_P40_8

IfxPort_P40_8.

Definition at line 153 of file IfxPort_PinMap.h.

◆ IfxPort_P40_9

IFX_EXTERN IfxPort_Pin IfxPort_P40_9

IfxPort_P40_9.

Definition at line 154 of file IfxPort_PinMap.h.

◆ IfxPort_Pin_pinTable

IFX_EXTERN const IfxPort_Pin* IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

IfxPort_Pin table.

Definition at line 162 of file IfxPort_PinMap.h.


iLLD_TC26B: How to use the PORT I/O driver?

How to use the PORT I/O driver?
iLLD » PORTS
Collaboration diagram for How to use the PORT I/O driver?:

The PORT I/O driver provides several functions to easily configure and read pins. The configuration includes input/output, mode, pad driver strength and state. For referencing the pins and their ports a IfxPort_PinMap is available as well.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Port/Io/IfxPort_Io.h>

Conifguration Table

Specify the used pins, their modes and (for outputs) the pad driver strength:
Note: For inputs the pad driver strength is only a dummy.

const IfxPort_Io_ConfigPin configPin[] = {
{&IfxPort_P00_0, IfxPort_Mode_inputPullDown, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P00.0
{&IfxPort_P33_0, IfxPort_Mode_outputPushPullGeneral, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P33.0
};

Note: the IfxPort_* pins are defined in IfxPort_PinMap

Port Initialisation

Assemble the final configuration structure:

const IfxPort_Io_Config conf = {
sizeof(configPin)/sizeof(IfxPort_Io_ConfigPin),
(IfxPort_Io_ConfigPin *)configPin
};

Call the initialisation function:

IfxPort_Io_initModule(&conf);

Now the pins are configured as specified.

Misc. Functions of the Standard Layer

Pin Mode Configuration

Generally, you can use one function for both inputs and outputs to set the desired mode.

// configure P33.0 as general output
IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);

For inputs use the IfxPort_setPinModeInput function:

// configure P33.0 as input with pullUp
IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);

For outputs use the IfxPort_setModeOutput function:

// configure P33.0 as output in general pushPull mode
IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);

If the pin is an output, the pad driver should be configured as well:

IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);

Reading Input State

Read the state of a single pin:

uint8 state = IfxPort_getPinState(&MODULE_P33, 0); // read P33.0

Setting Output State

Generally, you can use one function to set an output pin high or low or to toggle it.

IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled); // toggle P33.0

An output pin can be set high as following:

IfxPort_setPinHigh(&MODULE_P33, 0); // P33.0 = 1

An output pin can be set low as following:

IfxPort_setPinLow(&MODULE_P33, 0); // P33.0 = 0

Configure Emergency Function

Enable emergency stop for P33.0:

IfxPort_enableEmergencyStop(&MODULE_P33, 0);

The driver also provides a function to disable this feature.


iLLD_TC26B: Interface Driver

Modules
Interface Driver
iLLD » PORTS
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » PORTS » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPort_Io_ConfigPin
struct | IfxPort_Io_Config

Detailed Description

Data Structure Documentation

◆ IfxPort_Io_ConfigPin

struct IfxPort_Io_ConfigPin

Definition at line 159 of file IfxPort_Io.h.

Collaboration diagram for IfxPort_Io_ConfigPin:
[legend]
Data Fields
IfxPort_Mode | mode
IfxPort_PadDriver | padDriver
IFX_CONST IfxPort_Pin * | pin

◆ IfxPort_Io_Config

struct IfxPort_Io_Config

Definition at line 170 of file IfxPort_Io.h.

Collaboration diagram for IfxPort_Io_Config:
[legend]
Data Fields
IfxPort_Io_ConfigPin * | pinTable
uint32 | size


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » PORTS » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

Function Documentation

◆ IfxPort_Io_initModule()

IFX_EXTERN void IfxPort_Io_initModule ( const IfxPort_Io_Config * config )
Returns
None

Definition at line 35 of file IfxPort_Io.c.


iLLD_TC26B: IfxPort_cfg.h File Reference

  • _Impl
Data Structures | Macros | Enumerations | Variables
IfxPort_cfg.h File Reference
iLLD » PORTS

PORT on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxPort_reg.h"
Include dependency graph for IfxPort_cfg.h:

Go to the source code of this file.

Data Structures

struct IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table More...

Macros

#define | IFXPORT_NUM_MODULES (13)
Port count. More...
#define | IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)

Enumerations

enum IfxPort_Index {
IfxPort_Index_00 = 0,
IfxPort_Index_02 = 2,
IfxPort_Index_10 = 10,
IfxPort_Index_11 = 11,
IfxPort_Index_13 = 13,
IfxPort_Index_14 = 14,
IfxPort_Index_15 = 15,
IfxPort_Index_20 = 20,
IfxPort_Index_21 = 21,
IfxPort_Index_22 = 22,
IfxPort_Index_23 = 23,
IfxPort_Index_32 = 32,
IfxPort_Index_33 = 33,
IfxPort_Index_none = -1
}
List of the available Port resources. More...

Variables

IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks [IFXPORT_NUM_MODULES]
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap [IFXPORT_NUM_MODULES]

Detailed Description

PORT on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPort_cfg.h.

Data Structure Documentation

◆ IfxPort_Esr_Masks

struct IfxPort_Esr_Masks

used by IfxPort_Esr_Masks table

Definition at line 83 of file IfxPort_cfg.h.

Data Fields
uint16 | masks
Ifx_P * | port

Macro Definition Documentation

◆ IFXPORT_NUM_MODULES

#define IFXPORT_NUM_MODULES (13)

Port count.

Definition at line 49 of file IfxPort_cfg.h.

Referenced by IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getAddress(), and IfxPort_getIndex().

◆ IFXPORT_OUTOUTFEATURE_NONE

#define IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)

Definition at line 51 of file IfxPort_cfg.h.

Enumeration Type Documentation

◆ IfxPort_Index

enum IfxPort_Index

List of the available Port resources.

Enumerator
IfxPort_Index_00 | PORT 00.
IfxPort_Index_02 | PORT 02.
IfxPort_Index_10 | PORT 10.
IfxPort_Index_11 | PORT 11.
IfxPort_Index_13 | PORT 13.
IfxPort_Index_14 | PORT 14.
IfxPort_Index_15 | PORT 15.
IfxPort_Index_20 | PORT 20.
IfxPort_Index_21 | PORT 21.
IfxPort_Index_22 | PORT 22.
IfxPort_Index_23 | PORT 23.
IfxPort_Index_32 | PORT 32.
IfxPort_Index_33 | PORT 33.
IfxPort_Index_none | none

Definition at line 59 of file IfxPort_cfg.h.

Variable Documentation

◆ IfxPort_cfg_esrMasks

IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]

Definition at line 93 of file IfxPort_cfg.h.

◆ IfxPort_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]

Definition at line 95 of file IfxPort_cfg.h.


iLLD_TC26B: IfxPort_PinMap.c File Reference

  • _PinMap
Variables
IfxPort_PinMap.c File Reference
iLLD » PORTS

PORT I/O map. More...

#include "IfxPort_PinMap.h"
Include dependency graph for IfxPort_PinMap.c:

Go to the source code of this file.

Variables

IfxPort_Pin | IfxPort_P00_0 = {&MODULE_P00, 0}
IfxPort_Pin | IfxPort_P00_1 = {&MODULE_P00, 1}
IfxPort_Pin | IfxPort_P00_10 = {&MODULE_P00,10}
IfxPort_Pin | IfxPort_P00_11 = {&MODULE_P00,11}
IfxPort_Pin | IfxPort_P00_12 = {&MODULE_P00,12}
IfxPort_Pin | IfxPort_P00_2 = {&MODULE_P00, 2}
IfxPort_Pin | IfxPort_P00_3 = {&MODULE_P00, 3}
IfxPort_Pin | IfxPort_P00_4 = {&MODULE_P00, 4}
IfxPort_Pin | IfxPort_P00_5 = {&MODULE_P00, 5}
IfxPort_Pin | IfxPort_P00_6 = {&MODULE_P00, 6}
IfxPort_Pin | IfxPort_P00_7 = {&MODULE_P00, 7}
IfxPort_Pin | IfxPort_P00_8 = {&MODULE_P00, 8}
IfxPort_Pin | IfxPort_P00_9 = {&MODULE_P00, 9}
IfxPort_Pin | IfxPort_P02_0 = {&MODULE_P02, 0}
IfxPort_Pin | IfxPort_P02_1 = {&MODULE_P02, 1}
IfxPort_Pin | IfxPort_P02_2 = {&MODULE_P02, 2}
IfxPort_Pin | IfxPort_P02_3 = {&MODULE_P02, 3}
IfxPort_Pin | IfxPort_P02_4 = {&MODULE_P02, 4}
IfxPort_Pin | IfxPort_P02_5 = {&MODULE_P02, 5}
IfxPort_Pin | IfxPort_P02_6 = {&MODULE_P02, 6}
IfxPort_Pin | IfxPort_P02_7 = {&MODULE_P02, 7}
IfxPort_Pin | IfxPort_P02_8 = {&MODULE_P02, 8}
IfxPort_Pin | IfxPort_P10_0 = {&MODULE_P10, 0}
IfxPort_Pin | IfxPort_P10_1 = {&MODULE_P10, 1}
IfxPort_Pin | IfxPort_P10_2 = {&MODULE_P10, 2}
IfxPort_Pin | IfxPort_P10_3 = {&MODULE_P10, 3}
IfxPort_Pin | IfxPort_P10_4 = {&MODULE_P10, 4}
IfxPort_Pin | IfxPort_P10_5 = {&MODULE_P10, 5}
IfxPort_Pin | IfxPort_P10_6 = {&MODULE_P10, 6}
IfxPort_Pin | IfxPort_P10_7 = {&MODULE_P10, 7}
IfxPort_Pin | IfxPort_P10_8 = {&MODULE_P10, 8}
IfxPort_Pin | IfxPort_P11_10 = {&MODULE_P11,10}
IfxPort_Pin | IfxPort_P11_11 = {&MODULE_P11,11}
IfxPort_Pin | IfxPort_P11_12 = {&MODULE_P11,12}
IfxPort_Pin | IfxPort_P11_2 = {&MODULE_P11, 2}
IfxPort_Pin | IfxPort_P11_3 = {&MODULE_P11, 3}
IfxPort_Pin | IfxPort_P11_6 = {&MODULE_P11, 6}
IfxPort_Pin | IfxPort_P11_9 = {&MODULE_P11, 9}
IfxPort_Pin | IfxPort_P13_0 = {&MODULE_P13, 0}
IfxPort_Pin | IfxPort_P13_1 = {&MODULE_P13, 1}
IfxPort_Pin | IfxPort_P13_2 = {&MODULE_P13, 2}
IfxPort_Pin | IfxPort_P13_3 = {&MODULE_P13, 3}
IfxPort_Pin | IfxPort_P14_0 = {&MODULE_P14, 0}
IfxPort_Pin | IfxPort_P14_1 = {&MODULE_P14, 1}
IfxPort_Pin | IfxPort_P14_10 = {&MODULE_P14,10}
IfxPort_Pin | IfxPort_P14_2 = {&MODULE_P14, 2}
IfxPort_Pin | IfxPort_P14_3 = {&MODULE_P14, 3}
IfxPort_Pin | IfxPort_P14_4 = {&MODULE_P14, 4}
IfxPort_Pin | IfxPort_P14_5 = {&MODULE_P14, 5}
IfxPort_Pin | IfxPort_P14_6 = {&MODULE_P14, 6}
IfxPort_Pin | IfxPort_P14_7 = {&MODULE_P14, 7}
IfxPort_Pin | IfxPort_P14_8 = {&MODULE_P14, 8}
IfxPort_Pin | IfxPort_P14_9 = {&MODULE_P14, 9}
IfxPort_Pin | IfxPort_P15_0 = {&MODULE_P15, 0}
IfxPort_Pin | IfxPort_P15_1 = {&MODULE_P15, 1}
IfxPort_Pin | IfxPort_P15_2 = {&MODULE_P15, 2}
IfxPort_Pin | IfxPort_P15_3 = {&MODULE_P15, 3}
IfxPort_Pin | IfxPort_P15_4 = {&MODULE_P15, 4}
IfxPort_Pin | IfxPort_P15_5 = {&MODULE_P15, 5}
IfxPort_Pin | IfxPort_P15_6 = {&MODULE_P15, 6}
IfxPort_Pin | IfxPort_P15_7 = {&MODULE_P15, 7}
IfxPort_Pin | IfxPort_P15_8 = {&MODULE_P15, 8}
IfxPort_Pin | IfxPort_P20_0 = {&MODULE_P20, 0}
IfxPort_Pin | IfxPort_P20_1 = {&MODULE_P20, 1}
IfxPort_Pin | IfxPort_P20_10 = {&MODULE_P20,10}
IfxPort_Pin | IfxPort_P20_11 = {&MODULE_P20,11}
IfxPort_Pin | IfxPort_P20_12 = {&MODULE_P20,12}
IfxPort_Pin | IfxPort_P20_13 = {&MODULE_P20,13}
IfxPort_Pin | IfxPort_P20_14 = {&MODULE_P20,14}
IfxPort_Pin | IfxPort_P20_3 = {&MODULE_P20, 3}
IfxPort_Pin | IfxPort_P20_6 = {&MODULE_P20, 6}
IfxPort_Pin | IfxPort_P20_7 = {&MODULE_P20, 7}
IfxPort_Pin | IfxPort_P20_8 = {&MODULE_P20, 8}
IfxPort_Pin | IfxPort_P20_9 = {&MODULE_P20, 9}
IfxPort_Pin | IfxPort_P21_0 = {&MODULE_P21, 0}
IfxPort_Pin | IfxPort_P21_1 = {&MODULE_P21, 1}
IfxPort_Pin | IfxPort_P21_2 = {&MODULE_P21, 2}
IfxPort_Pin | IfxPort_P21_3 = {&MODULE_P21, 3}
IfxPort_Pin | IfxPort_P21_4 = {&MODULE_P21, 4}
IfxPort_Pin | IfxPort_P21_5 = {&MODULE_P21, 5}
IfxPort_Pin | IfxPort_P21_6 = {&MODULE_P21, 6}
IfxPort_Pin | IfxPort_P21_7 = {&MODULE_P21, 7}
IfxPort_Pin | IfxPort_P22_0 = {&MODULE_P22, 0}
IfxPort_Pin | IfxPort_P22_1 = {&MODULE_P22, 1}
IfxPort_Pin | IfxPort_P22_2 = {&MODULE_P22, 2}
IfxPort_Pin | IfxPort_P22_3 = {&MODULE_P22, 3}
IfxPort_Pin | IfxPort_P23_0 = {&MODULE_P23, 0}
IfxPort_Pin | IfxPort_P23_1 = {&MODULE_P23, 1}
IfxPort_Pin | IfxPort_P23_2 = {&MODULE_P23, 2}
IfxPort_Pin | IfxPort_P23_3 = {&MODULE_P23, 3}
IfxPort_Pin | IfxPort_P23_4 = {&MODULE_P23, 4}
IfxPort_Pin | IfxPort_P23_5 = {&MODULE_P23, 5}
IfxPort_Pin | IfxPort_P32_0 = {&MODULE_P32, 0}
IfxPort_Pin | IfxPort_P32_2 = {&MODULE_P32, 2}
IfxPort_Pin | IfxPort_P32_3 = {&MODULE_P32, 3}
IfxPort_Pin | IfxPort_P32_4 = {&MODULE_P32, 4}
IfxPort_Pin | IfxPort_P33_0 = {&MODULE_P33, 0}
IfxPort_Pin | IfxPort_P33_1 = {&MODULE_P33, 1}
IfxPort_Pin | IfxPort_P33_10 = {&MODULE_P33,10}
IfxPort_Pin | IfxPort_P33_11 = {&MODULE_P33,11}
IfxPort_Pin | IfxPort_P33_12 = {&MODULE_P33,12}
IfxPort_Pin | IfxPort_P33_13 = {&MODULE_P33,13}
IfxPort_Pin | IfxPort_P33_2 = {&MODULE_P33, 2}
IfxPort_Pin | IfxPort_P33_3 = {&MODULE_P33, 3}
IfxPort_Pin | IfxPort_P33_4 = {&MODULE_P33, 4}
IfxPort_Pin | IfxPort_P33_5 = {&MODULE_P33, 5}
IfxPort_Pin | IfxPort_P33_6 = {&MODULE_P33, 6}
IfxPort_Pin | IfxPort_P33_7 = {&MODULE_P33, 7}
IfxPort_Pin | IfxPort_P33_8 = {&MODULE_P33, 8}
IfxPort_Pin | IfxPort_P33_9 = {&MODULE_P33, 9}
IfxPort_Pin | IfxPort_P40_0 = {&MODULE_P40, 0}
IfxPort_Pin | IfxPort_P40_1 = {&MODULE_P40, 1}
IfxPort_Pin | IfxPort_P40_2 = {&MODULE_P40, 2}
IfxPort_Pin | IfxPort_P40_3 = {&MODULE_P40, 3}
IfxPort_Pin | IfxPort_P40_6 = {&MODULE_P40, 6}
IfxPort_Pin | IfxPort_P40_7 = {&MODULE_P40, 7}
IfxPort_Pin | IfxPort_P40_8 = {&MODULE_P40, 8}
IfxPort_Pin | IfxPort_P40_9 = {&MODULE_P40, 9}
const IfxPort_Pin * | IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

Detailed Description

PORT I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPort_PinMap.c.

Variable Documentation

◆ IfxPort_P00_0

IfxPort_Pin IfxPort_P00_0 = {&MODULE_P00, 0}

Definition at line 28 of file IfxPort_PinMap.c.

◆ IfxPort_P00_1

IfxPort_Pin IfxPort_P00_1 = {&MODULE_P00, 1}

Definition at line 29 of file IfxPort_PinMap.c.

◆ IfxPort_P00_10

IfxPort_Pin IfxPort_P00_10 = {&MODULE_P00,10}

Definition at line 30 of file IfxPort_PinMap.c.

◆ IfxPort_P00_11

IfxPort_Pin IfxPort_P00_11 = {&MODULE_P00,11}

Definition at line 31 of file IfxPort_PinMap.c.

◆ IfxPort_P00_12

IfxPort_Pin IfxPort_P00_12 = {&MODULE_P00,12}

Definition at line 32 of file IfxPort_PinMap.c.

◆ IfxPort_P00_2

IfxPort_Pin IfxPort_P00_2 = {&MODULE_P00, 2}

Definition at line 33 of file IfxPort_PinMap.c.

◆ IfxPort_P00_3

IfxPort_Pin IfxPort_P00_3 = {&MODULE_P00, 3}

Definition at line 34 of file IfxPort_PinMap.c.

◆ IfxPort_P00_4

IfxPort_Pin IfxPort_P00_4 = {&MODULE_P00, 4}

Definition at line 35 of file IfxPort_PinMap.c.

◆ IfxPort_P00_5

IfxPort_Pin IfxPort_P00_5 = {&MODULE_P00, 5}

Definition at line 36 of file IfxPort_PinMap.c.

◆ IfxPort_P00_6

IfxPort_Pin IfxPort_P00_6 = {&MODULE_P00, 6}

Definition at line 37 of file IfxPort_PinMap.c.

◆ IfxPort_P00_7

IfxPort_Pin IfxPort_P00_7 = {&MODULE_P00, 7}

Definition at line 38 of file IfxPort_PinMap.c.

◆ IfxPort_P00_8

IfxPort_Pin IfxPort_P00_8 = {&MODULE_P00, 8}

Definition at line 39 of file IfxPort_PinMap.c.

◆ IfxPort_P00_9

IfxPort_Pin IfxPort_P00_9 = {&MODULE_P00, 9}

Definition at line 40 of file IfxPort_PinMap.c.

◆ IfxPort_P02_0

IfxPort_Pin IfxPort_P02_0 = {&MODULE_P02, 0}

Definition at line 41 of file IfxPort_PinMap.c.

◆ IfxPort_P02_1

IfxPort_Pin IfxPort_P02_1 = {&MODULE_P02, 1}

Definition at line 42 of file IfxPort_PinMap.c.

◆ IfxPort_P02_2

IfxPort_Pin IfxPort_P02_2 = {&MODULE_P02, 2}

Definition at line 43 of file IfxPort_PinMap.c.

◆ IfxPort_P02_3

IfxPort_Pin IfxPort_P02_3 = {&MODULE_P02, 3}

Definition at line 44 of file IfxPort_PinMap.c.

◆ IfxPort_P02_4

IfxPort_Pin IfxPort_P02_4 = {&MODULE_P02, 4}

Definition at line 45 of file IfxPort_PinMap.c.

◆ IfxPort_P02_5

IfxPort_Pin IfxPort_P02_5 = {&MODULE_P02, 5}

Definition at line 46 of file IfxPort_PinMap.c.

◆ IfxPort_P02_6

IfxPort_Pin IfxPort_P02_6 = {&MODULE_P02, 6}

Definition at line 47 of file IfxPort_PinMap.c.

◆ IfxPort_P02_7

IfxPort_Pin IfxPort_P02_7 = {&MODULE_P02, 7}

Definition at line 48 of file IfxPort_PinMap.c.

◆ IfxPort_P02_8

IfxPort_Pin IfxPort_P02_8 = {&MODULE_P02, 8}

Definition at line 49 of file IfxPort_PinMap.c.

◆ IfxPort_P10_0

IfxPort_Pin IfxPort_P10_0 = {&MODULE_P10, 0}

Definition at line 50 of file IfxPort_PinMap.c.

◆ IfxPort_P10_1

IfxPort_Pin IfxPort_P10_1 = {&MODULE_P10, 1}

Definition at line 51 of file IfxPort_PinMap.c.

◆ IfxPort_P10_2

IfxPort_Pin IfxPort_P10_2 = {&MODULE_P10, 2}

Definition at line 52 of file IfxPort_PinMap.c.

◆ IfxPort_P10_3

IfxPort_Pin IfxPort_P10_3 = {&MODULE_P10, 3}

Definition at line 53 of file IfxPort_PinMap.c.

◆ IfxPort_P10_4

IfxPort_Pin IfxPort_P10_4 = {&MODULE_P10, 4}

Definition at line 54 of file IfxPort_PinMap.c.

◆ IfxPort_P10_5

IfxPort_Pin IfxPort_P10_5 = {&MODULE_P10, 5}

Definition at line 55 of file IfxPort_PinMap.c.

◆ IfxPort_P10_6

IfxPort_Pin IfxPort_P10_6 = {&MODULE_P10, 6}

Definition at line 56 of file IfxPort_PinMap.c.

◆ IfxPort_P10_7

IfxPort_Pin IfxPort_P10_7 = {&MODULE_P10, 7}

Definition at line 57 of file IfxPort_PinMap.c.

◆ IfxPort_P10_8

IfxPort_Pin IfxPort_P10_8 = {&MODULE_P10, 8}

Definition at line 58 of file IfxPort_PinMap.c.

◆ IfxPort_P11_10

IfxPort_Pin IfxPort_P11_10 = {&MODULE_P11,10}

Definition at line 59 of file IfxPort_PinMap.c.

◆ IfxPort_P11_11

IfxPort_Pin IfxPort_P11_11 = {&MODULE_P11,11}

Definition at line 60 of file IfxPort_PinMap.c.

◆ IfxPort_P11_12

IfxPort_Pin IfxPort_P11_12 = {&MODULE_P11,12}

Definition at line 61 of file IfxPort_PinMap.c.

◆ IfxPort_P11_2

IfxPort_Pin IfxPort_P11_2 = {&MODULE_P11, 2}

Definition at line 62 of file IfxPort_PinMap.c.

◆ IfxPort_P11_3

IfxPort_Pin IfxPort_P11_3 = {&MODULE_P11, 3}

Definition at line 63 of file IfxPort_PinMap.c.

◆ IfxPort_P11_6

IfxPort_Pin IfxPort_P11_6 = {&MODULE_P11, 6}

Definition at line 64 of file IfxPort_PinMap.c.

◆ IfxPort_P11_9

IfxPort_Pin IfxPort_P11_9 = {&MODULE_P11, 9}

Definition at line 65 of file IfxPort_PinMap.c.

◆ IfxPort_P13_0

IfxPort_Pin IfxPort_P13_0 = {&MODULE_P13, 0}

Definition at line 66 of file IfxPort_PinMap.c.

◆ IfxPort_P13_1

IfxPort_Pin IfxPort_P13_1 = {&MODULE_P13, 1}

Definition at line 67 of file IfxPort_PinMap.c.

◆ IfxPort_P13_2

IfxPort_Pin IfxPort_P13_2 = {&MODULE_P13, 2}

Definition at line 68 of file IfxPort_PinMap.c.

◆ IfxPort_P13_3

IfxPort_Pin IfxPort_P13_3 = {&MODULE_P13, 3}

Definition at line 69 of file IfxPort_PinMap.c.

◆ IfxPort_P14_0

IfxPort_Pin IfxPort_P14_0 = {&MODULE_P14, 0}

Definition at line 70 of file IfxPort_PinMap.c.

◆ IfxPort_P14_1

IfxPort_Pin IfxPort_P14_1 = {&MODULE_P14, 1}

Definition at line 71 of file IfxPort_PinMap.c.

◆ IfxPort_P14_10

IfxPort_Pin IfxPort_P14_10 = {&MODULE_P14,10}

Definition at line 72 of file IfxPort_PinMap.c.

◆ IfxPort_P14_2

IfxPort_Pin IfxPort_P14_2 = {&MODULE_P14, 2}

Definition at line 73 of file IfxPort_PinMap.c.

◆ IfxPort_P14_3

IfxPort_Pin IfxPort_P14_3 = {&MODULE_P14, 3}

Definition at line 74 of file IfxPort_PinMap.c.

◆ IfxPort_P14_4

IfxPort_Pin IfxPort_P14_4 = {&MODULE_P14, 4}

Definition at line 75 of file IfxPort_PinMap.c.

◆ IfxPort_P14_5

IfxPort_Pin IfxPort_P14_5 = {&MODULE_P14, 5}

Definition at line 76 of file IfxPort_PinMap.c.

◆ IfxPort_P14_6

IfxPort_Pin IfxPort_P14_6 = {&MODULE_P14, 6}

Definition at line 77 of file IfxPort_PinMap.c.

◆ IfxPort_P14_7

IfxPort_Pin IfxPort_P14_7 = {&MODULE_P14, 7}

Definition at line 78 of file IfxPort_PinMap.c.

◆ IfxPort_P14_8

IfxPort_Pin IfxPort_P14_8 = {&MODULE_P14, 8}

Definition at line 79 of file IfxPort_PinMap.c.

◆ IfxPort_P14_9

IfxPort_Pin IfxPort_P14_9 = {&MODULE_P14, 9}

Definition at line 80 of file IfxPort_PinMap.c.

◆ IfxPort_P15_0

IfxPort_Pin IfxPort_P15_0 = {&MODULE_P15, 0}

Definition at line 81 of file IfxPort_PinMap.c.

◆ IfxPort_P15_1

IfxPort_Pin IfxPort_P15_1 = {&MODULE_P15, 1}

Definition at line 82 of file IfxPort_PinMap.c.

◆ IfxPort_P15_2

IfxPort_Pin IfxPort_P15_2 = {&MODULE_P15, 2}

Definition at line 83 of file IfxPort_PinMap.c.

◆ IfxPort_P15_3

IfxPort_Pin IfxPort_P15_3 = {&MODULE_P15, 3}

Definition at line 84 of file IfxPort_PinMap.c.

◆ IfxPort_P15_4

IfxPort_Pin IfxPort_P15_4 = {&MODULE_P15, 4}

Definition at line 85 of file IfxPort_PinMap.c.

◆ IfxPort_P15_5

IfxPort_Pin IfxPort_P15_5 = {&MODULE_P15, 5}

Definition at line 86 of file IfxPort_PinMap.c.

◆ IfxPort_P15_6

IfxPort_Pin IfxPort_P15_6 = {&MODULE_P15, 6}

Definition at line 87 of file IfxPort_PinMap.c.

◆ IfxPort_P15_7

IfxPort_Pin IfxPort_P15_7 = {&MODULE_P15, 7}

Definition at line 88 of file IfxPort_PinMap.c.

◆ IfxPort_P15_8

IfxPort_Pin IfxPort_P15_8 = {&MODULE_P15, 8}

Definition at line 89 of file IfxPort_PinMap.c.

◆ IfxPort_P20_0

IfxPort_Pin IfxPort_P20_0 = {&MODULE_P20, 0}

Definition at line 90 of file IfxPort_PinMap.c.

◆ IfxPort_P20_1

IfxPort_Pin IfxPort_P20_1 = {&MODULE_P20, 1}

Definition at line 91 of file IfxPort_PinMap.c.

◆ IfxPort_P20_10

IfxPort_Pin IfxPort_P20_10 = {&MODULE_P20,10}

Definition at line 92 of file IfxPort_PinMap.c.

◆ IfxPort_P20_11

IfxPort_Pin IfxPort_P20_11 = {&MODULE_P20,11}

Definition at line 93 of file IfxPort_PinMap.c.

◆ IfxPort_P20_12

IfxPort_Pin IfxPort_P20_12 = {&MODULE_P20,12}

Definition at line 94 of file IfxPort_PinMap.c.

◆ IfxPort_P20_13

IfxPort_Pin IfxPort_P20_13 = {&MODULE_P20,13}

Definition at line 95 of file IfxPort_PinMap.c.

◆ IfxPort_P20_14

IfxPort_Pin IfxPort_P20_14 = {&MODULE_P20,14}

Definition at line 96 of file IfxPort_PinMap.c.

◆ IfxPort_P20_3

IfxPort_Pin IfxPort_P20_3 = {&MODULE_P20, 3}

Definition at line 97 of file IfxPort_PinMap.c.

◆ IfxPort_P20_6

IfxPort_Pin IfxPort_P20_6 = {&MODULE_P20, 6}

Definition at line 98 of file IfxPort_PinMap.c.

◆ IfxPort_P20_7

IfxPort_Pin IfxPort_P20_7 = {&MODULE_P20, 7}

Definition at line 99 of file IfxPort_PinMap.c.

◆ IfxPort_P20_8

IfxPort_Pin IfxPort_P20_8 = {&MODULE_P20, 8}

Definition at line 100 of file IfxPort_PinMap.c.

◆ IfxPort_P20_9

IfxPort_Pin IfxPort_P20_9 = {&MODULE_P20, 9}

Definition at line 101 of file IfxPort_PinMap.c.

◆ IfxPort_P21_0

IfxPort_Pin IfxPort_P21_0 = {&MODULE_P21, 0}

Definition at line 102 of file IfxPort_PinMap.c.

◆ IfxPort_P21_1

IfxPort_Pin IfxPort_P21_1 = {&MODULE_P21, 1}

Definition at line 103 of file IfxPort_PinMap.c.

◆ IfxPort_P21_2

IfxPort_Pin IfxPort_P21_2 = {&MODULE_P21, 2}

Definition at line 104 of file IfxPort_PinMap.c.

◆ IfxPort_P21_3

IfxPort_Pin IfxPort_P21_3 = {&MODULE_P21, 3}

Definition at line 105 of file IfxPort_PinMap.c.

◆ IfxPort_P21_4

IfxPort_Pin IfxPort_P21_4 = {&MODULE_P21, 4}

Definition at line 106 of file IfxPort_PinMap.c.

◆ IfxPort_P21_5

IfxPort_Pin IfxPort_P21_5 = {&MODULE_P21, 5}

Definition at line 107 of file IfxPort_PinMap.c.

◆ IfxPort_P21_6

IfxPort_Pin IfxPort_P21_6 = {&MODULE_P21, 6}

Definition at line 108 of file IfxPort_PinMap.c.

◆ IfxPort_P21_7

IfxPort_Pin IfxPort_P21_7 = {&MODULE_P21, 7}

Definition at line 109 of file IfxPort_PinMap.c.

◆ IfxPort_P22_0

IfxPort_Pin IfxPort_P22_0 = {&MODULE_P22, 0}

Definition at line 110 of file IfxPort_PinMap.c.

◆ IfxPort_P22_1

IfxPort_Pin IfxPort_P22_1 = {&MODULE_P22, 1}

Definition at line 111 of file IfxPort_PinMap.c.

◆ IfxPort_P22_2

IfxPort_Pin IfxPort_P22_2 = {&MODULE_P22, 2}

Definition at line 112 of file IfxPort_PinMap.c.

◆ IfxPort_P22_3

IfxPort_Pin IfxPort_P22_3 = {&MODULE_P22, 3}

Definition at line 113 of file IfxPort_PinMap.c.

◆ IfxPort_P23_0

IfxPort_Pin IfxPort_P23_0 = {&MODULE_P23, 0}

Definition at line 114 of file IfxPort_PinMap.c.

◆ IfxPort_P23_1

IfxPort_Pin IfxPort_P23_1 = {&MODULE_P23, 1}

Definition at line 115 of file IfxPort_PinMap.c.

◆ IfxPort_P23_2

IfxPort_Pin IfxPort_P23_2 = {&MODULE_P23, 2}

Definition at line 116 of file IfxPort_PinMap.c.

◆ IfxPort_P23_3

IfxPort_Pin IfxPort_P23_3 = {&MODULE_P23, 3}

Definition at line 117 of file IfxPort_PinMap.c.

◆ IfxPort_P23_4

IfxPort_Pin IfxPort_P23_4 = {&MODULE_P23, 4}

Definition at line 118 of file IfxPort_PinMap.c.

◆ IfxPort_P23_5

IfxPort_Pin IfxPort_P23_5 = {&MODULE_P23, 5}

Definition at line 119 of file IfxPort_PinMap.c.

◆ IfxPort_P32_0

IfxPort_Pin IfxPort_P32_0 = {&MODULE_P32, 0}

Definition at line 120 of file IfxPort_PinMap.c.

◆ IfxPort_P32_2

IfxPort_Pin IfxPort_P32_2 = {&MODULE_P32, 2}

Definition at line 121 of file IfxPort_PinMap.c.

◆ IfxPort_P32_3

IfxPort_Pin IfxPort_P32_3 = {&MODULE_P32, 3}

Definition at line 122 of file IfxPort_PinMap.c.

◆ IfxPort_P32_4

IfxPort_Pin IfxPort_P32_4 = {&MODULE_P32, 4}

Definition at line 123 of file IfxPort_PinMap.c.

◆ IfxPort_P33_0

IfxPort_Pin IfxPort_P33_0 = {&MODULE_P33, 0}

Definition at line 124 of file IfxPort_PinMap.c.

◆ IfxPort_P33_1

IfxPort_Pin IfxPort_P33_1 = {&MODULE_P33, 1}

Definition at line 125 of file IfxPort_PinMap.c.

◆ IfxPort_P33_10

IfxPort_Pin IfxPort_P33_10 = {&MODULE_P33,10}

Definition at line 126 of file IfxPort_PinMap.c.

◆ IfxPort_P33_11

IfxPort_Pin IfxPort_P33_11 = {&MODULE_P33,11}

Definition at line 127 of file IfxPort_PinMap.c.

◆ IfxPort_P33_12

IfxPort_Pin IfxPort_P33_12 = {&MODULE_P33,12}

Definition at line 128 of file IfxPort_PinMap.c.

◆ IfxPort_P33_13

IfxPort_Pin IfxPort_P33_13 = {&MODULE_P33,13}

Definition at line 129 of file IfxPort_PinMap.c.

◆ IfxPort_P33_2

IfxPort_Pin IfxPort_P33_2 = {&MODULE_P33, 2}

Definition at line 130 of file IfxPort_PinMap.c.

◆ IfxPort_P33_3

IfxPort_Pin IfxPort_P33_3 = {&MODULE_P33, 3}

Definition at line 131 of file IfxPort_PinMap.c.

◆ IfxPort_P33_4

IfxPort_Pin IfxPort_P33_4 = {&MODULE_P33, 4}

Definition at line 132 of file IfxPort_PinMap.c.

◆ IfxPort_P33_5

IfxPort_Pin IfxPort_P33_5 = {&MODULE_P33, 5}

Definition at line 133 of file IfxPort_PinMap.c.

◆ IfxPort_P33_6

IfxPort_Pin IfxPort_P33_6 = {&MODULE_P33, 6}

Definition at line 134 of file IfxPort_PinMap.c.

◆ IfxPort_P33_7

IfxPort_Pin IfxPort_P33_7 = {&MODULE_P33, 7}

Definition at line 135 of file IfxPort_PinMap.c.

◆ IfxPort_P33_8

IfxPort_Pin IfxPort_P33_8 = {&MODULE_P33, 8}

Definition at line 136 of file IfxPort_PinMap.c.

◆ IfxPort_P33_9

IfxPort_Pin IfxPort_P33_9 = {&MODULE_P33, 9}

Definition at line 137 of file IfxPort_PinMap.c.

◆ IfxPort_P40_0

IfxPort_Pin IfxPort_P40_0 = {&MODULE_P40, 0}

Definition at line 138 of file IfxPort_PinMap.c.

◆ IfxPort_P40_1

IfxPort_Pin IfxPort_P40_1 = {&MODULE_P40, 1}

Definition at line 139 of file IfxPort_PinMap.c.

◆ IfxPort_P40_2

IfxPort_Pin IfxPort_P40_2 = {&MODULE_P40, 2}

Definition at line 140 of file IfxPort_PinMap.c.

◆ IfxPort_P40_3

IfxPort_Pin IfxPort_P40_3 = {&MODULE_P40, 3}

Definition at line 141 of file IfxPort_PinMap.c.

◆ IfxPort_P40_6

IfxPort_Pin IfxPort_P40_6 = {&MODULE_P40, 6}

Definition at line 142 of file IfxPort_PinMap.c.

◆ IfxPort_P40_7

IfxPort_Pin IfxPort_P40_7 = {&MODULE_P40, 7}

Definition at line 143 of file IfxPort_PinMap.c.

◆ IfxPort_P40_8

IfxPort_Pin IfxPort_P40_8 = {&MODULE_P40, 8}

Definition at line 144 of file IfxPort_PinMap.c.

◆ IfxPort_P40_9

IfxPort_Pin IfxPort_P40_9 = {&MODULE_P40, 9}

Definition at line 145 of file IfxPort_PinMap.c.

◆ IfxPort_Pin_pinTable

const IfxPort_Pin* IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]

Definition at line 148 of file IfxPort_PinMap.c.


iLLD_TC26B: IfxPort_PinMap.h File Reference

  • _PinMap
Macros | Variables
IfxPort_PinMap.h File Reference
iLLD » PORTS

PORT I/O map. More...

#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPort_PinMap.h:

Go to the source code of this file.

Macros

#define | IFXPORT_PINMAP_NUM_MODULES 41
Table dimensions. More...
#define | IFXPORT_PINMAP_PIN_NUM_ITEMS 15

Variables

IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8. More...
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9. More...
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable [IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table. More...

Detailed Description

PORT I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPort_PinMap.h.


iLLD_TC26B: IfxPort_Io.h File Reference

  • Port
  • Io
Data Structures | Functions
IfxPort_Io.h File Reference
iLLD » PORTS

PORT IO details. More...

#include "Port/Std/IfxPort.h"
Include dependency graph for IfxPort_Io.h:

Go to the source code of this file.

Data Structures

struct | IfxPort_Io_ConfigPin
struct | IfxPort_Io_Config

Functions

IFX_EXTERN void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

PORT IO details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPort_Io.h.


iLLD_TC26B: IfxPort.h File Reference

  • Port
  • Std
Data Structures | Enumerations | Functions
IfxPort.h File Reference
iLLD » PORTS

PORT basic functionality. More...

#include "_Impl/IfxPort_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxPort.h:

Go to the source code of this file.

Data Structures

struct | IfxPort_Pin
Defines a pin. More...
struct | IfxPort_Pin_Config
To configure pins. More...

Enumerations

enum IfxPort_ControlledBy {
IfxPort_ControlledBy_port = 0,
IfxPort_ControlledBy_hsct = 1
}
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx. More...
enum IfxPort_InputMode {
IfxPort_InputMode_undefined = -1,
IfxPort_InputMode_noPullDevice = 0 << 3,
IfxPort_InputMode_pullDown = 1U << 3,
IfxPort_InputMode_pullUp = 2U << 3
}
Ifx_P output modification modes definition. More...
enum IfxPort_Mode {
IfxPort_Mode_inputNoPullDevice = 0,
IfxPort_Mode_inputPullDown = 8U,
IfxPort_Mode_inputPullUp = 0x10U,
IfxPort_Mode_outputPushPullGeneral = 0x80U,
IfxPort_Mode_outputPushPullAlt1 = 0x88U,
IfxPort_Mode_outputPushPullAlt2 = 0x90U,
IfxPort_Mode_outputPushPullAlt3 = 0x98U,
IfxPort_Mode_outputPushPullAlt4 = 0xA0U,
IfxPort_Mode_outputPushPullAlt5 = 0xA8U,
IfxPort_Mode_outputPushPullAlt6 = 0xB0U,
IfxPort_Mode_outputPushPullAlt7 = 0xB8U,
IfxPort_Mode_outputOpenDrainGeneral = 0xC0U,
IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U,
IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U,
IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U,
IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U,
IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U,
IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U,
IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U
}
Ifx_P input / output mode definition. More...
enum IfxPort_OutputIdx {
IfxPort_OutputIdx_general = 0x10U << 3,
IfxPort_OutputIdx_alt1 = 0x11U << 3,
IfxPort_OutputIdx_alt2 = 0x12U << 3,
IfxPort_OutputIdx_alt3 = 0x13U << 3,
IfxPort_OutputIdx_alt4 = 0x14U << 3,
IfxPort_OutputIdx_alt5 = 0x15U << 3,
IfxPort_OutputIdx_alt6 = 0x16U << 3,
IfxPort_OutputIdx_alt7 = 0x17U << 3
}
Pin output alternate index. More...
enum IfxPort_OutputMode {
IfxPort_OutputMode_pushPull = 0x10U << 3,
IfxPort_OutputMode_openDrain = 0x18U << 3
}
Pin output mode definition. More...
enum IfxPort_PadDriver {
IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0,
IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1,
IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2,
IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3,
IfxPort_PadDriver_lvdsSpeed1 = 4,
IfxPort_PadDriver_lvdsSpeed2 = 5,
IfxPort_PadDriver_lvdsSpeed3 = 6,
IfxPort_PadDriver_lvdsSpeed4 = 7,
IfxPort_PadDriver_ttlSpeed1 = 8,
IfxPort_PadDriver_ttlSpeed2 = 9,
IfxPort_PadDriver_ttlSpeed3 = 10,
IfxPort_PadDriver_ttlSpeed4 = 11
}
Pad driver mode definition (strength and slew rate). More...
enum IfxPort_PadSupply {
IfxPort_PadSupply_5v = 0,
IfxPort_PadSupply_3v = 1
}
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair. More...
enum IfxPort_State {
IfxPort_State_notChanged = (0 << 16) | (0 << 0),
IfxPort_State_high = (0 << 16) | (1U << 0),
IfxPort_State_low = (1U << 16) | (0 << 0),
IfxPort_State_toggled = (1U << 16) | (1U << 0)
}
Ifx_P output modification modes definition. More...

Functions

IFX_INLINE boolean | IfxPort_getPinState (Ifx_P *port, uint8 pinIndex)
Return the port state. More...
IFX_INLINE void | IfxPort_setPinHigh (Ifx_P *port, uint8 pinIndex)
Set the port output. More...
IFX_INLINE void | IfxPort_setPinLow (Ifx_P *port, uint8 pinIndex)
Reset the port output. More...
IFX_INLINE void | IfxPort_setPinModeInput (Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinModeOutput (Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode. More...
IFX_INLINE void | IfxPort_setPinState (Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output. More...
IFX_INLINE void | IfxPort_togglePin (Ifx_P *port, uint8 pinIndex)
Toggle the port output. More...
IFX_EXTERN boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
IFX_EXTERN void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...
IFX_INLINE uint32 | IfxPort_getGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state. More...
IFX_INLINE void | IfxPort_setGroupState (Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state. More...
IFX_EXTERN Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IFX_EXTERN IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
IFX_EXTERN void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
IFX_EXTERN void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...
IFX_EXTERN void | IfxPort_setPinModeLvdsHigh (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21) More...
IFX_EXTERN void | IfxPort_setPinModeLvdsMedium (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode More...
IFX_EXTERN void | IfxPort_resetESR (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality. More...
IFX_EXTERN void | IfxPort_setESR (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality. More...

Detailed Description

PORT basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPort.h.

Function Documentation

◆ IfxPort_resetESR()

IFX_EXTERN void IfxPort_resetESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
None
See also
IfxPort_disableEmergencyStop()

Definition at line 118 of file IfxPort.c.

Referenced by IfxPort_disableEmergencyStop().

◆ IfxPort_setESR()

IFX_EXTERN void IfxPort_setESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
None
See also
IfxPort_enableEmergencyStop()

Definition at line 128 of file IfxPort.c.

Referenced by IfxPort_enableEmergencyStop().


iLLD_TC26B: PSI5

Modules | Files
PSI5
iLLD
Collaboration diagram for PSI5:

Modules

Implementation
Standard Driver
PSI5 Pin Mapping
How to use the PSI5 PSI5 Interface driver?
PSI5

Files

file | IfxPsi5_cfg.h
PSI5 on-chip implementation data.
file | IfxPsi5_PinMap.c
PSI5 I/O map.
file | IfxPsi5_PinMap.h
PSI5 I/O map.
file | IfxPsi5_Psi5.h
PSI5 PSI5 details.
file | IfxPsi5.h
PSI5 basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » PSI5
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
iLLD » PSI5 » Implementation
Collaboration diagram for Enumerations:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » PSI5
Collaboration diagram for Standard Driver:

Modules

Enumerations
Channel Status Functions
IO Pin Configuration Functions
Interrupt configuration function
Operative functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » PSI5 » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPsi5_AlternateInput {
IfxPsi5_AlternateInput_0 = 0,
IfxPsi5_AlternateInput_1,
IfxPsi5_AlternateInput_2,
IfxPsi5_AlternateInput_3
}
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection. More...
enum IfxPsi5_BaudRate {
IfxPsi5_BaudRate_125 = 0,
IfxPsi5_BaudRate_189 = 1
}
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection. More...
enum IfxPsi5_CRCorParity {
IfxPsi5_CRCorParity_parity = 0,
IfxPsi5_CRCorParity_crc = 1
}
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection. More...
enum IfxPsi5_ClockType {
IfxPsi5_ClockType_fracDiv = 0,
IfxPsi5_ClockType_slowClock_125 = 1,
IfxPsi5_ClockType_fastClock_189 = 2,
IfxPsi5_ClockType_timeStamp = 3
}
Clock type. More...
enum IfxPsi5_DigitalInputFilterDepth {
IfxPsi5_DigitalInputFilterDepth_0 = 0,
IfxPsi5_DigitalInputFilterDepth_1,
IfxPsi5_DigitalInputFilterDepth_2,
IfxPsi5_DigitalInputFilterDepth_3,
IfxPsi5_DigitalInputFilterDepth_4,
IfxPsi5_DigitalInputFilterDepth_5,
IfxPsi5_DigitalInputFilterDepth_6,
IfxPsi5_DigitalInputFilterDepth_7,
IfxPsi5_DigitalInputFilterDepth_8,
IfxPsi5_DigitalInputFilterDepth_9,
IfxPsi5_DigitalInputFilterDepth_10,
IfxPsi5_DigitalInputFilterDepth_11,
IfxPsi5_DigitalInputFilterDepth_12,
IfxPsi5_DigitalInputFilterDepth_13,
IfxPsi5_DigitalInputFilterDepth_14,
IfxPsi5_DigitalInputFilterDepth_15
}
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth. More...
enum IfxPsi5_DividerMode {
IfxPsi5_DividerMode_spb = 0,
IfxPsi5_DividerMode_normal = 1,
IfxPsi5_DividerMode_fractional = 2,
IfxPsi5_DividerMode_off = 3
}
MODULE_PSI5.FDR.DM,Divider mode. More...
enum IfxPsi5_FrameExpectation {
IfxPsi5_FrameExpectation_notExpected = 0,
IfxPsi5_FrameExpectation_expected = 1
}
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control. More...
enum IfxPsi5_MessagingBits {
IfxPsi5_MessagingBits_absent = 0,
IfxPsi5_MessagingBits_present = 1
}
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence. More...
enum IfxPsi5_ReceiveDataRegisterTimestamp {
IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0,
IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1
}
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers. More...
enum IfxPsi5_Slot {
IfxPsi5_Slot_0 = 0,
IfxPsi5_Slot_1,
IfxPsi5_Slot_2,
IfxPsi5_Slot_3,
IfxPsi5_Slot_4,
IfxPsi5_Slot_5
}
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id. More...
enum IfxPsi5_SuspendMode {
IfxPsi5_SuspendMode_none = 0,
IfxPsi5_SuspendMode_hard = 1,
IfxPsi5_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5_TimeBase {
IfxPsi5_TimeBase_internal = 0,
IfxPsi5_TimeBase_external = 1
}
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base. More...
enum IfxPsi5_TimestampRegister {
IfxPsi5_TimestampRegister_a = 0,
IfxPsi5_TimestampRegister_b = 1,
IfxPsi5_TimestampRegister_c = 2
}
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type. More...
enum IfxPsi5_Trigger {
IfxPsi5_Trigger_0 = 0,
IfxPsi5_Trigger_1,
IfxPsi5_Trigger_2,
IfxPsi5_Trigger_3,
IfxPsi5_Trigger_4,
IfxPsi5_Trigger_5
}
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id. More...
enum IfxPsi5_TriggerType {
IfxPsi5_TriggerType_periodic = 0,
IfxPsi5_TriggerType_external = 1,
IfxPsi5_TriggerType_bypass = 2
}
Trigger type. More...
enum IfxPsi5_Verbose {
IfxPsi5_Verbose_off = 0,
IfxPsi5_Verbose_on = 1
}
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPsi5_AlternateInput

enum IfxPsi5_AlternateInput

MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection.

Enumerator
IfxPsi5_AlternateInput_0 | Alternate Input 0.
IfxPsi5_AlternateInput_1 | Alternate Input 1.
IfxPsi5_AlternateInput_2 | Alternate Input 2.
IfxPsi5_AlternateInput_3 | Alternate Input 3.

Definition at line 58 of file IfxPsi5.h.

◆ IfxPsi5_BaudRate

enum IfxPsi5_BaudRate

MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.

Enumerator
IfxPsi5_BaudRate_125 | Slow 125 kHz clock.
IfxPsi5_BaudRate_189 | Fast 189 kHz clock.

Definition at line 68 of file IfxPsi5.h.

◆ IfxPsi5_ClockType

enum IfxPsi5_ClockType

Clock type.

Enumerator
IfxPsi5_ClockType_fracDiv | Fractional Divide clock.
IfxPsi5_ClockType_slowClock_125 | Slow 125 kHz clock.
IfxPsi5_ClockType_fastClock_189 | Fast 189 kHz clock.
IfxPsi5_ClockType_timeStamp | Timestamp clock.

Definition at line 84 of file IfxPsi5.h.

◆ IfxPsi5_CRCorParity

enum IfxPsi5_CRCorParity

MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.

Enumerator
IfxPsi5_CRCorParity_parity | parity selection
IfxPsi5_CRCorParity_crc | CRC selection.

Definition at line 76 of file IfxPsi5.h.

◆ IfxPsi5_DigitalInputFilterDepth

enum IfxPsi5_DigitalInputFilterDepth

MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.

Enumerator
IfxPsi5_DigitalInputFilterDepth_0 | Digital input filter depth is 0.
IfxPsi5_DigitalInputFilterDepth_1 | Digital input filter depth is 1.
IfxPsi5_DigitalInputFilterDepth_2 | Digital input filter depth is 2.
IfxPsi5_DigitalInputFilterDepth_3 | Digital input filter depth is 3.
IfxPsi5_DigitalInputFilterDepth_4 | Digital input filter depth is 4.
IfxPsi5_DigitalInputFilterDepth_5 | Digital input filter depth is 5.
IfxPsi5_DigitalInputFilterDepth_6 | Digital input filter depth is 6.
IfxPsi5_DigitalInputFilterDepth_7 | Digital input filter depth is 7.
IfxPsi5_DigitalInputFilterDepth_8 | Digital input filter depth is 8.
IfxPsi5_DigitalInputFilterDepth_9 | Digital input filter depth is 9.
IfxPsi5_DigitalInputFilterDepth_10 | Digital input filter depth is 10.
IfxPsi5_DigitalInputFilterDepth_11 | Digital input filter depth is 11.
IfxPsi5_DigitalInputFilterDepth_12 | Digital input filter depth is 12.
IfxPsi5_DigitalInputFilterDepth_13 | Digital input filter depth is 13.
IfxPsi5_DigitalInputFilterDepth_14 | Digital input filter depth is 14.
IfxPsi5_DigitalInputFilterDepth_15 | Digital input filter depth is 15.

Definition at line 94 of file IfxPsi5.h.

◆ IfxPsi5_DividerMode

enum IfxPsi5_DividerMode

MODULE_PSI5.FDR.DM,Divider mode.

Enumerator
IfxPsi5_DividerMode_spb | divider mode is off
IfxPsi5_DividerMode_normal | divider mode is normal
IfxPsi5_DividerMode_fractional | divider mode is fractional
IfxPsi5_DividerMode_off | divider mode is off

Definition at line 116 of file IfxPsi5.h.

◆ IfxPsi5_FrameExpectation

enum IfxPsi5_FrameExpectation

MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.

Enumerator
IfxPsi5_FrameExpectation_notExpected | No frame is expected.
IfxPsi5_FrameExpectation_expected | Frame is expected.

Definition at line 126 of file IfxPsi5.h.

◆ IfxPsi5_MessagingBits

enum IfxPsi5_MessagingBits

MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.

Enumerator
IfxPsi5_MessagingBits_absent | No messaging bits.
IfxPsi5_MessagingBits_present | 2 messaging bits

Definition at line 134 of file IfxPsi5.h.

◆ IfxPsi5_ReceiveDataRegisterTimestamp

enum IfxPsi5_ReceiveDataRegisterTimestamp

MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.

Enumerator
IfxPsi5_ReceiveDataRegisterTimestamp_pulse | Pulse based timestamp SPTSC to be stored in RDRHC.
IfxPsi5_ReceiveDataRegisterTimestamp_frame | Start of frame based timestamp SPTSC to be stored in RDRHC.

Definition at line 142 of file IfxPsi5.h.

◆ IfxPsi5_Slot

enum IfxPsi5_Slot

MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.

Enumerator
IfxPsi5_Slot_0 | slot 0
IfxPsi5_Slot_1 | slot 1
IfxPsi5_Slot_2 | slot 2
IfxPsi5_Slot_3 | slot 3
IfxPsi5_Slot_4 | slot 4
IfxPsi5_Slot_5 | slot 5

Definition at line 150 of file IfxPsi5.h.

◆ IfxPsi5_SuspendMode

enum IfxPsi5_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxPsi5_SuspendMode_none | No suspend.
IfxPsi5_SuspendMode_hard | Hard Suspend.
IfxPsi5_SuspendMode_soft | Soft Suspend.

Definition at line 162 of file IfxPsi5.h.

◆ IfxPsi5_TimeBase

enum IfxPsi5_TimeBase

MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.

Enumerator
IfxPsi5_TimeBase_internal | Internal time stamp clock.
IfxPsi5_TimeBase_external | External GTM inputs.

Definition at line 171 of file IfxPsi5.h.

◆ IfxPsi5_TimestampRegister

enum IfxPsi5_TimestampRegister

MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type.

Enumerator
IfxPsi5_TimestampRegister_a | Timestamp register A.
IfxPsi5_TimestampRegister_b | Timestamp register B.
IfxPsi5_TimestampRegister_c | Timestamp register C.

Definition at line 179 of file IfxPsi5.h.

◆ IfxPsi5_Trigger

enum IfxPsi5_Trigger

MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.

Enumerator
IfxPsi5_Trigger_0 | trigger 0
IfxPsi5_Trigger_1 | trigger 1
IfxPsi5_Trigger_2 | trigger 2
IfxPsi5_Trigger_3 | trigger 3
IfxPsi5_Trigger_4 | trigger 4
IfxPsi5_Trigger_5 | trigger 5

Definition at line 188 of file IfxPsi5.h.

◆ IfxPsi5_TriggerType

enum IfxPsi5_TriggerType

Trigger type.

Enumerator
IfxPsi5_TriggerType_periodic | Periodic trigger.
IfxPsi5_TriggerType_external | External trigger.
IfxPsi5_TriggerType_bypass | Bypassed trigger.

Definition at line 200 of file IfxPsi5.h.

◆ IfxPsi5_Verbose

enum IfxPsi5_Verbose

MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.

Enumerator
IfxPsi5_Verbose_off | Verbose mode is turned off.
IfxPsi5_Verbose_on | Verbose mode is turned on.

Definition at line 209 of file IfxPsi5.h.


iLLD_TC26B: Channel Status Functions

Functions
Channel Status Functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for Channel Status Functions:

Functions

IFX_INLINE uint32 | IfxPsi5_getStatusCrci (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusMei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNbi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNfi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRdi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRmi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRsi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusTei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel More...
IFX_EXTERN void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...

Detailed Description

Function Documentation

◆ IfxPsi5_getStatusCrci()

IFX_INLINE uint32 IfxPsi5_getStatusCrci | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the CRCI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Crci status register contents

Definition at line 437 of file IfxPsi5.h.

◆ IfxPsi5_getStatusMei()

IFX_INLINE uint32 IfxPsi5_getStatusMei | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the MEI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Mei status register contents

Definition at line 443 of file IfxPsi5.h.

◆ IfxPsi5_getStatusNbi()

IFX_INLINE uint32 IfxPsi5_getStatusNbi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the NBI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Nbi status register contents

Definition at line 449 of file IfxPsi5.h.

◆ IfxPsi5_getStatusNfi()

IFX_INLINE uint32 IfxPsi5_getStatusNfi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the NFI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Nfi status register contents

Definition at line 455 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRdi()

IFX_INLINE uint32 IfxPsi5_getStatusRdi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RDI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rdi status register contents

Definition at line 461 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRmi()

IFX_INLINE uint32 IfxPsi5_getStatusRmi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RMI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rmi status register contents

Definition at line 467 of file IfxPsi5.h.

◆ IfxPsi5_getStatusRsi()

IFX_INLINE uint32 IfxPsi5_getStatusRsi | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the RSI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Rsi status register contents

Definition at line 473 of file IfxPsi5.h.

◆ IfxPsi5_getStatusTei()

IFX_INLINE uint32 IfxPsi5_getStatusTei | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_ChannelId | channel
 | ) |  |

access function to get the TEI status register contents for a channel

Parameters
psi5 | pointer to the PSI5 register space
channel | channel Id
Returns
Tei status register contents

Definition at line 479 of file IfxPsi5.h.

◆ IfxPsi5_resetModule()

IFX_EXTERN void IfxPsi5_resetModule ( Ifx_PSI5 * psi5 )

resets PSI5 kernel

Parameters
psi5 pointer to PSI5 registers
Returns
None

Definition at line 44 of file IfxPsi5.c.


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxPsi5_initRxPin (const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5_initTxPin (const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5_setRxInput (Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input. More...

Detailed Description

Function Documentation

◆ IfxPsi5_initRxPin()

IFX_INLINE void IfxPsi5_initRxPin | ( | const IfxPsi5_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Parameters
rx | the RX Pin which should be configured
inputMode | pin input mode which should be configured
padDriver | Pad Driver Configuration
Returns
None

Definition at line 485 of file IfxPsi5.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IfxPsi5_initTxPin()

IFX_INLINE void IfxPsi5_initTxPin | ( | const IfxPsi5_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 498 of file IfxPsi5.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IfxPsi5_setRxInput()

IFX_INLINE void IfxPsi5_setRxInput | ( | Ifx_PSI5_CH * | psi5Ch,
 |  | IfxPsi5_AlternateInput | alternateInput
 | ) |  |

Sets the alternate RX input.

Parameters
psi5Ch | pointer to the PSI5 channel register space
alternateInput | Alternate RX input selection
Returns
None

Definition at line 508 of file IfxPsi5.h.

Referenced by IfxPsi5_initRxPin().


iLLD_TC26B: Interrupt configuration function

Interrupt configuration function
iLLD » PSI5 » Standard Driver
Collaboration diagram for Interrupt configuration function:


iLLD_TC26B: Operative functions

Functions
Operative functions
iLLD » PSI5 » Standard Driver
Collaboration diagram for Operative functions:

Functions

IFX_INLINE boolean | IfxPsi5_isModuleSuspended (Ifx_PSI5 *psi5)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5_setSuspendMode (Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_disableModule()

IFX_EXTERN void IfxPsi5_disableModule ( Ifx_PSI5 * psi5 )

Disable PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 35 of file IfxPsi5.c.

◆ IfxPsi5_isModuleSuspended()

IFX_INLINE boolean IfxPsi5_isModuleSuspended ( Ifx_PSI5 * psi5 )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
psi5 Pointer to PSI5 module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 517 of file IfxPsi5.h.

◆ IfxPsi5_setSuspendMode()

IFX_INLINE void IfxPsi5_setSuspendMode | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
psi5 | Pointer to PSI5 module registers
mode | Module suspend mode
Returns
None

Definition at line 529 of file IfxPsi5.h.


iLLD_TC26B: PSI5 Pin Mapping

Data Structures | Macros | Variables
PSI5 Pin Mapping
iLLD » PSI5
Collaboration diagram for PSI5 Pin Mapping:

Data Structures

struct | IfxPsi5_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXPSI5_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5_PINMAP_NUM_CHANNELS 3
#define | IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
PSI5_RX0A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
PSI5_RX0B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
PSI5_RX0C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
PSI5_RX1A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
PSI5_RX1B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
PSI5_RX1C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
PSI5_RX2A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
PSI5_RX2B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
PSI5_RX2C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table. More...
IFX_EXTERN const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5_Rx_In

struct IfxPsi5_Rx_In

RX pin mapping structure.

Definition at line 39 of file IfxPsi5_PinMap.h.

Collaboration diagram for IfxPsi5_Rx_In:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Channel ID.
Ifx_PSI5 * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxPsi5_Tx_Out

struct IfxPsi5_Tx_Out

TX pin mapping structure.

Definition at line 48 of file IfxPsi5_PinMap.h.

Collaboration diagram for IfxPsi5_Tx_Out:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Channel ID.
Ifx_PSI5 * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXPSI5_PINMAP_NUM_CHANNELS

#define IFXPSI5_PINMAP_NUM_CHANNELS 3

Definition at line 77 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_NUM_MODULES

#define IFXPSI5_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 76 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_RX_IN_NUM_ITEMS

#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3

Definition at line 78 of file IfxPsi5_PinMap.h.

◆ IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS

#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Definition at line 79 of file IfxPsi5_PinMap.h.

Variable Documentation

◆ IfxPsi5_RX0A_P00_1_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN

PSI5_RX0A: PSI5 input.

Definition at line 56 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX0B_P02_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN

PSI5_RX0B: PSI5 input.

Definition at line 57 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX0C_P33_1_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN

PSI5_RX0C: PSI5 input.

Definition at line 58 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1A_P00_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN

PSI5_RX1A: PSI5 input.

Definition at line 59 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1B_P02_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN

PSI5_RX1B: PSI5 input.

Definition at line 60 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX1C_P33_3_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN

PSI5_RX1C: PSI5 input.

Definition at line 61 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2A_P00_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN

PSI5_RX2A: PSI5 input.

Definition at line 62 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2B_P02_7_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN

PSI5_RX2B: PSI5 input.

Definition at line 63 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_RX2C_P33_5_IN

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN

PSI5_RX2C: PSI5 input.

Definition at line 64 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_Rx_In_pinTable

IFX_EXTERN const IfxPsi5_Rx_In* IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]

IfxPsi5_Rx_In table.

Definition at line 83 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P00_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT

PSI5_TX0: PSI5 output.

Definition at line 65 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P02_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT

PSI5_TX0: PSI5 output.

Definition at line 66 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX0_P33_2_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT

PSI5_TX0: PSI5 output.

Definition at line 67 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P00_4_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT

PSI5_TX1: PSI5 output.

Definition at line 68 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P02_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT

PSI5_TX1: PSI5 output.

Definition at line 69 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX1_P33_4_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT

PSI5_TX1: PSI5 output.

Definition at line 70 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P00_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT

PSI5_TX2: PSI5 output.

Definition at line 71 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P02_8_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT

PSI5_TX2: PSI5 output.

Definition at line 72 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_TX2_P33_6_OUT

IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT

PSI5_TX2: PSI5 output.

Definition at line 73 of file IfxPsi5_PinMap.h.

◆ IfxPsi5_Tx_Out_pinTable

IFX_EXTERN const IfxPsi5_Tx_Out* IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]

IfxPsi5_Tx_Out table.

Definition at line 86 of file IfxPsi5_PinMap.h.


iLLD_TC26B: How to use the PSI5 PSI5 Interface driver?

How to use the PSI5 PSI5 Interface driver?
iLLD » PSI5
Collaboration diagram for How to use the PSI5 PSI5 Interface driver?:

PSI5 communicates with the external world via one input/output line for each channel.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Psi5/Psi5/IfxPsi5_Psi5.h>

Variables

//used globally

IfxPsi5_Psi5_Channel psi5Channel[IFXPSI5_PINMAP_NUM_CHANNELS];

Module Initialisation

// create module config
IfxPsi5_Psi5_Config psi5Config;
IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
// initialize module
IfxPsi5_Psi5 psi5;
IfxPsi5_Psi5_initModule(&psi5, &psi5Config);

Channel Initialisation

// create channel config
IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
for(int slot=0; slot<6; ++slot) {
psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
if( slot == 0 )
psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_expected;
else
psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_notExpected;
}
// initialize channels
for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
psi5ChannelConfig.channelId = (IfxPsi5_ChannelId)chn;
// TODO: currently no IOCRx.ALTI config field
unsigned alti = 0;
IfxPsi5_Psi5_PinsConfig pinsConfig;
for(int module=0;module<IFXPSI5_PINMAP_NUM_MODULES;module++)
{
pinsConfig.in = IfxPsi5_Rx_In_pinTable[module][chn][alti];
pinsConfig.inMode = IfxPort_InputMode_pullUp;
pinsConfig.out = IfxPsi5_Tx_Out_pinTable[module][chn][alti];
}
pinsConfig.outMode = IfxPort_OutputMode_pushPull;
pinsConfig.pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
psi5ChannelConfig.pinsConfig = &pinsConfig;
IfxPsi5_Psi5_initChannel(&psi5Channel[chn], &psi5ChannelConfig);
}

read channel frame

for(int i=0; i<5; ++i) {
for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
IfxPsi5_Psi5_Frame frame;
while( !IfxPsi5_Psi5_readChannelFrame(&psi5Channel[chn], &frame) );
}
}


iLLD_TC26B: PSI5

Modules
PSI5
iLLD » PSI5
Collaboration diagram for PSI5:

Modules

Data Structures
Module Initialisation functions
Channel functions
Clock Intialisation functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » PSI5 » PSI5
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPsi5_Psi5
PSI5 handle data structure. More...
struct | IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5_Psi5_Clock
Clock configuration data structure. More...
struct | IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members. More...
struct | IfxPsi5_Psi5_InputOutputControl
Input output configuration structure. More...
struct | IfxPsi5_Psi5_Message
Psi5 serial message with individual members. More...
struct | IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5_Psi5_Rdm
Psi5 frame in double word format. More...
struct | IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value. More...
struct | IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure. More...
struct | IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5_Psi5_Channel
Channel handle data structure. More...
struct | IfxPsi5_Psi5_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5_Psi5_Config
PSI5 module configuration structure. More...
union | IfxPsi5_Psi5_Frame
Psi5 frame data union. More...
union | IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure. More...
struct | IfxPsi5_Psi5_StartupOptions
startup related options TBD More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5_Psi5

struct IfxPsi5_Psi5

PSI5 handle data structure.

Definition at line 144 of file IfxPsi5_Psi5.h.

Data Fields
Ifx_PSI5 * psi5 Specifies the pointer to the PSI5 module registers.

◆ IfxPsi5_Psi5_ChannelTrigger

struct IfxPsi5_Psi5_ChannelTrigger

channel trigger configuration structure

Definition at line 151 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | channelTriggerCounter | Specifies the channel trigger counter.
uint32 | channelTriggerValue | Specifies the channel trigger value CTV.

◆ IfxPsi5_Psi5_Clock

struct IfxPsi5_Psi5_Clock

Clock configuration data structure.

Definition at line 159 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | frequency | Specifies the frequency for the clock.
IfxPsi5_DividerMode | mode | Specifies the mode of division for the clock.
IfxPsi5_ClockType | type | Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)

◆ IfxPsi5_Psi5_FrameData

struct IfxPsi5_Psi5_FrameData

Psi5 frame data structure with individual members.

Definition at line 168 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | crc: 3 | Received crc.
uint8 | crcError: 1 | Crc error flag.
uint8 | messagingBitsError: 1 | Messaging bits error flag.
uint8 | noFrameReceivedError: 1 | No frame received flag.
uint8 | numberOfBitsError: 1 | Number of bits error flag.
uint32 | readData: 28 | Received data.
uint8 | receiveMemoryOverflowError: 1 | Receive buffer overflow error flag.
uint8 | slotCounter: 3 | Slot counter.
uint8 | timeslotError: 1 | Time slot error flag.
uint32 | timestamp: 24 | Timestamp.

◆ IfxPsi5_Psi5_InputOutputControl

struct IfxPsi5_Psi5_InputOutputControl

Input output configuration structure.

Definition at line 184 of file IfxPsi5_Psi5.h.

Data Fields
IfxPsi5_DigitalInputFilterDepth | digitalInputFilterDepth | Specifies the the number of port input samples considered for floating average.
boolean | inputInverterEnabled | Specifies the pulse polarity of the input.
boolean | outputInverterEnabled | Specifies the pulse polarity of the output.

◆ IfxPsi5_Psi5_Message

struct IfxPsi5_Psi5_Message

Psi5 serial message with individual members.

Definition at line 193 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | configuration: 1 | Serial message configuration.
uint8 | crc: 6 | Serial message crc.
uint8 | messageId: 8 | Serial message Id.
uint16 | serialData: 16 | Serial message data.
uint8 | serialMessageCRCFailedError: 1 | Serial message crc error flag.

◆ IfxPsi5_Psi5_PulseGeneration

struct IfxPsi5_Psi5_PulseGeneration

Sync pulse generation configuration structure.

Definition at line 204 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | blankoutTime | Specifies the duration of blank out period.
uint32 | delayLength | Specifies the additional length of the pulse width for coding a '1'.
IfxPsi5_Trigger | externalTimeBaseSelect | Specifies the clock source for CTV in the case of external.
IfxPsi5_Trigger | externalTriggerSelect | Specifies the trigger source in case of external triggerring.
IfxPsi5_TriggerType | periodicOrExternalOrBypass | Specifies whether periodic trigger or external trigger or bypass is selected.
uint32 | pulseLength | Specifies the standard pulse width without data coding for standard pulse width or for coding a '0'.
IfxPsi5_TimeBase | timeBaseSelect | Specifies the clock source for CTV as internal or external.

◆ IfxPsi5_Psi5_Rdm

struct IfxPsi5_Psi5_Rdm

Psi5 frame in double word format.

Definition at line 217 of file IfxPsi5_Psi5.h.

Data Fields
uint32 | highWord | Upper 32 bits of the Psi5 frame.
uint32 | lowWord | Lower 32 bits of the Psi5 frame.

◆ IfxPsi5_Psi5_Rds

struct IfxPsi5_Psi5_Rds

Psi5 serial message as unsigned 32 bit value.

Definition at line 225 of file IfxPsi5_Psi5.h.

Data Fields
uint32 value 32 bit value of the Psi5 serial message

◆ IfxPsi5_Psi5_ReceiveControl

struct IfxPsi5_Psi5_ReceiveControl

Receive control configuration structure.

Definition at line 232 of file IfxPsi5_Psi5.h.

Data Fields
boolean | asynchronousModeSelected | Specifies the asynchronous mode of operation.
IfxPsi5_BaudRate | baudrateSelect | Specifies the baudrate selection.
IfxPsi5_CRCorParity | crcOrParity[IFXPSI5_NUM_SLOTS] | Specifies the crc or parity selection for the slots 0 to 5.
uint32 | fifoWarningLevel | Specifies the fifo warning level.
IfxPsi5_FrameExpectation | frameExpectation[IFXPSI5_NUM_SLOTS] | Specifies whether the frame is expected or not in the slots 0 to 5.
IfxPsi5_TimestampRegister | frameTimestampSelect | Specifies the timestamp register selection for start of frames.
IfxPsi5_MessagingBits | messagingBitsPresence[IFXPSI5_NUM_SLOTS] | Specifies the presence or absence of messaging bits in the slots 0 to 5.
uint32 | payloadLength[IFXPSI5_NUM_SLOTS] | Specifies the payload length for the slots 0 to 5.
IfxPsi5_TimestampRegister | pulseTimestampSelect | Specifies the timestamp register selection for pulses.
IfxPsi5_ReceiveDataRegisterTimestamp | receiveDataRegisterTimestamp | Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH.
IfxPsi5_Verbose | verbose[IFXPSI5_NUM_SLOTS] | Specifies the verbose is enabled or disabled for the slots 0 to 5.
IfxPsi5_Verbose | verboseForAsynchronousMode | Specifies the verbose mode selection in asynchronous mode of operation.

◆ IfxPsi5_Psi5_TimeStampConfig

struct IfxPsi5_Psi5_TimeStampConfig

Timestamp configuration data structure.

Definition at line 250 of file IfxPsi5_Psi5.h.

Data Fields
IfxPsi5_Trigger | externalTimeBaseSelect | Specifies the clock base for counter CTS in the case of external.
IfxPsi5_TimeBase | timeBaseSelect | Specifies the clock source for CTS as internal or external.

◆ IfxPsi5_Psi5_TransmitControl

struct IfxPsi5_Psi5_TransmitControl

Transmit control configuration structure.

Definition at line 258 of file IfxPsi5_Psi5.h.

Data Fields
boolean | bitStuffingEnabled | Specifies whether the bit stuffing is turned on or not.
boolean | crcGenerationEnabled | Specifies whether the crc generation is turned on or not.
boolean | enhancedProtocolSelected | Specifies whether the enhanced protocol is selected or not.
boolean | inhibitingAutomaticTransferEnabled | Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not.
uint32 | payloadLength | Specifies the payload length to be sent.
uint32 | sorPayloadLength | Specifies the payload length of SOR.
uint32 | ssrPayloadLength | Specifies the payload length of SSR.
boolean | startSequenceGenerationEnabled | Specifies whether the start sequence generation is turned on or not.

◆ IfxPsi5_Psi5_Channel

struct IfxPsi5_Psi5_Channel

Channel handle data structure.

Definition at line 287 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Channel:
[legend]
Data Fields
Ifx_PSI5_CH * | channel | Pointer to the channel registers.
IfxPsi5_ChannelId | channelId | Specifies the channel index.
IfxPsi5_Psi5 * | module | The PSI5 handle structure.

◆ IfxPsi5_Psi5_ChannelConfig

struct IfxPsi5_Psi5_ChannelConfig

Channel configuration structure.

Definition at line 296 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_ChannelConfig:
[legend]
Data Fields
IfxPsi5_ChannelId | channelId | Specifies the channel index.
IfxPsi5_Psi5_ChannelTrigger | channelTrigger | Specifies the configuration for channel trigger.
IfxPsi5_Psi5_InputOutputControl | inputOutputControl | Specifies the configuration for input output control.
IFX_CONST IfxPsi5_Psi5 * | module | Specifies pointer to the IfxPsi5_Psi5 module handle.
IFX_CONST IfxPsi5_Psi5_PinsConfig * | pinsConfig | Pin Configuration structure.
IfxPsi5_Psi5_PulseGeneration | pulseGeneration | Specifies the configuration for sync pulse generation.
IfxPsi5_Psi5_ReceiveControl | receiveControl | Specifies the configuration for reception.
IfxPsi5_Psi5_TransmitControl | sendControl | Specifies the configuration for transmission.
uint32 | watchdogTimerLimit[IFXPSI5_NUM_WDTS] | Specifies the watchdog timer limit for each of the slots 0 to 6.

◆ IfxPsi5_Psi5_Config

struct IfxPsi5_Psi5_Config

PSI5 module configuration structure.

Definition at line 311 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Config:
[legend]
Data Fields
IfxPsi5_Psi5_Clock | fastClock | Specifies the faster f189 clock properties.
IfxPsi5_Psi5_Clock | fracDiv | Specifies fractionally divided clock properties.
Ifx_PSI5 * | psi5 | Specifies the pointer to the PSI5 module registers.
IfxPsi5_Psi5_Clock | slowClock | Specifies the slower f125 clock properties.
IfxPsi5_Psi5_Clock | timestampClock | Specifies the time stamp clock properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterA | Specifies the time stamp counter A properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterB | Specifies the time stamp counter B properties.
IfxPsi5_Psi5_TimeStampConfig | timestampCounterC | Specifies the time stamp counter C properties.

◆ IfxPsi5_Psi5_Frame

union IfxPsi5_Psi5_Frame

Psi5 frame data union.

Definition at line 325 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_Frame:
[legend]
Data Fields
IfxPsi5_Psi5_FrameData | frame | Psi5 frame data structure with individual members.
IfxPsi5_Psi5_Rdm | rdm | Psi5 frame in double word format.

◆ IfxPsi5_Psi5_SerialMessage

union IfxPsi5_Psi5_SerialMessage

Psi5 serial message data structure.

Definition at line 333 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_SerialMessage:
[legend]
Data Fields
IfxPsi5_Psi5_Message | message | Psi5 serial message with individual members.
IfxPsi5_Psi5_Rds | rds | Psi5 serial message as unsigned 32 bit value.

◆ IfxPsi5_Psi5_StartupOptions

struct IfxPsi5_Psi5_StartupOptions

startup related options TBD

Definition at line 341 of file IfxPsi5_Psi5.h.

Data Fields
uint8 | a: 1 | TBD.
uint32 | b: 31 | TBD.


iLLD_TC26B: Module Initialisation functions

Functions
Module Initialisation functions
iLLD » PSI5 » PSI5
Collaboration diagram for Module Initialisation functions:

Functions

IFX_EXTERN void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
IFX_EXTERN void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_deInitModule()

IFX_EXTERN void IfxPsi5_Psi5_deInitModule ( IfxPsi5_Psi5 * psi5 )

Resets the PSI5 module.

Parameters
psi5 pointer to the PSI5 module
Returns
None

Definition at line 35 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_enableModule()

IFX_EXTERN void IfxPsi5_Psi5_enableModule ( Ifx_PSI5 * psi5 )

Enable PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 43 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initModule().

◆ IfxPsi5_Psi5_initModule()

IFX_EXTERN boolean IfxPsi5_Psi5_initModule | ( | IfxPsi5_Psi5 * | psi5,
 |  | const IfxPsi5_Psi5_Config * | config
 | ) |  |

Initialise the PSI5 with the supplied configureation.

Parameters
psi5 | pointer to the PSI5 module
config | pointer to the PSI5 configuration
Returns
return TRUE on success & FALSE if configuration not valid

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 311 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_initModuleConfig()

IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig | ( | IfxPsi5_Psi5_Config * | config,
 |  | Ifx_PSI5 * | psi5
 | ) |  |

Initialise buffer with default PSI5 configuration.

Parameters
config | pointer to the PSI5 module configuration
psi5 | base address of the PSI5 register space
Returns
None

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 364 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_resetModule()

IFX_EXTERN void IfxPsi5_Psi5_resetModule ( Ifx_PSI5 * psi5 )

Reset PSI5 kernel.

Parameters
psi5 pointer to the base of PSI5 registers
Returns
None

Definition at line 521 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_deInitModule().


iLLD_TC26B: Channel functions

Functions
Channel functions
iLLD » PSI5 » PSI5
Collaboration diagram for Channel functions:

Functions

IFX_INLINE boolean | IfxPsi5_Psi5_startupChannel (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_initChannel()

IFX_EXTERN boolean IfxPsi5_Psi5_initChannel | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | const IfxPsi5_Psi5_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the PSI5 channel
config | pointer to the PSI5 channel configuration
Returns
TRUE on success & FALSE if configuration not valid

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 76 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_initChannelConfig()

IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig | ( | IfxPsi5_Psi5_ChannelConfig * | config,
 |  | IfxPsi5_Psi5 * | psi5
 | ) |  |

Get the current channel configuration (e.g. sample settings)

Parameters
config | pointer to the PSI5 channel configuration
psi5 | pointer to the PSI5 module
Returns
None

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 226 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_readChannelFrame()

IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Psi5_Frame * | frame
 | ) |  |

Gets the received psi5 frame for the channel.

Parameters
channel | pointer to the PSI5 channel
frame | pointer to the PSI5 frame buffer
Returns
TRUE if successful; FALSE if no frame available

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 495 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_readChannelSerialMessage()

IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Slot | slot,
 |  | IfxPsi5_Psi5_SerialMessage * | message
 | ) |  |

Get the received serial message for the channel.

Parameters
channel | pointer to the PSI5 channel
slot | Slot Id
message | pointer to the PSI5 serial message buffer
Returns
TRUE if successful; FALSE if no serial message available

Definition at line 513 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_sendChannelData()

IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | uint64 | data
 | ) |  |

Transmit the data through the channel.

Parameters
channel | pointer to the PSI5 channel
data | data to be sent
Returns
TRUE if successful; FALSE otherwise

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 539 of file IfxPsi5_Psi5.c.

◆ IfxPsi5_Psi5_startupChannel()

IFX_INLINE boolean IfxPsi5_Psi5_startupChannel | ( | IfxPsi5_Psi5_Channel * | channel,
 |  | IfxPsi5_Psi5_StartupOptions * | options
 | ) |  |

start the channel with the selected options

Parameters
channel | pointer to the PSI5 channel
options | startup related options
Returns
TRUE if successful; FALSE otherwise

A coding example can be found in How to use the PSI5 PSI5 Interface driver?

Definition at line 493 of file IfxPsi5_Psi5.h.


iLLD_TC26B: Clock Intialisation functions

Functions
Clock Intialisation functions
iLLD » PSI5 » PSI5
Collaboration diagram for Clock Intialisation functions:

Functions

IFX_EXTERN uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...

Detailed Description

Function Documentation

◆ IfxPsi5_Psi5_getFracDivClock()

IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock ( Ifx_PSI5 * psi5 )

Returns the configured fracDiv psi5 clock frequency in Hz.

Parameters
psi5 Pointer to the base of PSI5 registers
Returns
Returns the configured fracDiv psi5 clock frequency in Hz.

Definition at line 49 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initializeClock().

◆ IfxPsi5_Psi5_initializeClock()

IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock | ( | Ifx_PSI5 * | psi5,
 |  | const IfxPsi5_Psi5_Clock * | clock
 | ) |  |

Configure the fracDiv clock.

Parameters
psi5 | Pointer to the base of PSI5 registers
clock | Specifies the required clock frequency in Hz.
Returns
Returns the configured clock frequency in Hz.

Definition at line 390 of file IfxPsi5_Psi5.c.

Referenced by IfxPsi5_Psi5_initModule().


iLLD_TC26B: IfxPsi5_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxPsi5_cfg.h File Reference
iLLD » PSI5

PSI5 on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXPSI5_STEP_RANGE 1024
#define | IFXPSI5_NUM_WDTS 7
#define | IFXPSI5_NUM_SLOTS 6
#define | IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)
#define | IFXPSI5_ENABLE_CHANNEL (1 << 16)
#define | IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000
#define | IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000
#define | IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000
#define | IFXPSI5_NUM_CHANNELS 3
#define | IFXPSI5_NUM_MODULES (1)

Enumerations

enum IfxPsi5_ChannelId {
IfxPsi5_ChannelId_none = -1,
IfxPsi5_ChannelId_0 = 0,
IfxPsi5_ChannelId_1 = 1,
IfxPsi5_ChannelId_2 = 2
}
Channel Id. More...

Detailed Description

PSI5 on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5_cfg.h.

Macro Definition Documentation

◆ IFXPSI5_DEFAULT_FASTCLOCK_FREQ

#define IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000

Definition at line 57 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_DEFAULT_SLOWCLOCK_FREQ

#define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000

Definition at line 55 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_DEFAULT_TIMESTAMP_FREQ

#define IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000

Definition at line 59 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initModuleConfig().

◆ IFXPSI5_ENABLE_CHANNEL

#define IFXPSI5_ENABLE_CHANNEL (1 << 16)

Definition at line 53 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_ENABLE_CHANNELTRIGGER

#define IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)

Definition at line 51 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_NUM_CHANNELS

#define IFXPSI5_NUM_CHANNELS 3

Definition at line 61 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_MODULES

#define IFXPSI5_NUM_MODULES (1)

Definition at line 63 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_SLOTS

#define IFXPSI5_NUM_SLOTS 6

Definition at line 49 of file IfxPsi5_cfg.h.

◆ IFXPSI5_NUM_WDTS

#define IFXPSI5_NUM_WDTS 7

Definition at line 47 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_initChannel().

◆ IFXPSI5_STEP_RANGE

#define IFXPSI5_STEP_RANGE 1024

Definition at line 45 of file IfxPsi5_cfg.h.

Referenced by IfxPsi5_Psi5_getFracDivClock(), and IfxPsi5_Psi5_initializeClock().

Enumeration Type Documentation

◆ IfxPsi5_ChannelId

enum IfxPsi5_ChannelId

Channel Id.

Enumerator
IfxPsi5_ChannelId_none | None of the Ifx_PSI5 Channels.
IfxPsi5_ChannelId_0 | Specifies PSI5 channel 0.
IfxPsi5_ChannelId_1 | Specifies PSI5 channel 1.
IfxPsi5_ChannelId_2 | Specifies PSI5 channel 2.

Definition at line 71 of file IfxPsi5_cfg.h.


iLLD_TC26B: IfxPsi5_PinMap.c File Reference

  • _PinMap
Variables
IfxPsi5_PinMap.c File Reference
iLLD » PSI5

PSI5 I/O map. More...

#include "IfxPsi5_PinMap.h"
Include dependency graph for IfxPsi5_PinMap.c:

Go to the source code of this file.

Variables

IfxPsi5_Rx_In | IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c}
IfxPsi5_Rx_In | IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c}
IfxPsi5_Rx_In | IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a}
IfxPsi5_Rx_In | IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b}
IfxPsi5_Rx_In | IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4}
IfxPsi5_Tx_Out | IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4}
const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

PSI5 I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5_PinMap.c.

Variable Documentation

◆ IfxPsi5_RX0A_P00_1_IN

IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a}

Definition at line 28 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX0B_P02_3_IN

IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b}

Definition at line 29 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX0C_P33_1_IN

IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c}

Definition at line 30 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1A_P00_3_IN

IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 31 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1B_P02_5_IN

IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b}

Definition at line 32 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX1C_P33_3_IN

IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c}

Definition at line 33 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2A_P00_5_IN

IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a}

Definition at line 34 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2B_P02_7_IN

IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b}

Definition at line 35 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_RX2C_P33_5_IN

IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 36 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_Rx_In_pinTable

const IfxPsi5_Rx_In* IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
Initial value:
= {
{
{
&IfxPsi5_RX0A_P00_1_IN,
&IfxPsi5_RX0B_P02_3_IN,
&IfxPsi5_RX0C_P33_1_IN
},
{
&IfxPsi5_RX1A_P00_3_IN,
&IfxPsi5_RX1B_P02_5_IN,
&IfxPsi5_RX1C_P33_3_IN
},
{
&IfxPsi5_RX2A_P00_5_IN,
&IfxPsi5_RX2B_P02_7_IN,
&IfxPsi5_RX2C_P33_5_IN
}
}
}
IfxPsi5_RX1C_P33_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
Definition: IfxPsi5_PinMap.c:33
IfxPsi5_RX1A_P00_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
Definition: IfxPsi5_PinMap.c:31
IfxPsi5_RX0B_P02_3_IN
IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
Definition: IfxPsi5_PinMap.c:29
IfxPsi5_RX0A_P00_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
Definition: IfxPsi5_PinMap.c:28
IfxPsi5_RX0C_P33_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
Definition: IfxPsi5_PinMap.c:30
IfxPsi5_RX2B_P02_7_IN
IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
Definition: IfxPsi5_PinMap.c:35
IfxPsi5_RX2A_P00_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
Definition: IfxPsi5_PinMap.c:34
IfxPsi5_RX1B_P02_5_IN
IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
Definition: IfxPsi5_PinMap.c:32
IfxPsi5_RX2C_P33_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
Definition: IfxPsi5_PinMap.c:36

Definition at line 48 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P00_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4}

Definition at line 37 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P02_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4}

Definition at line 38 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX0_P33_2_OUT

IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4}

Definition at line 39 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P00_4_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4}

Definition at line 40 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P02_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4}

Definition at line 41 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX1_P33_4_OUT

IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4}

Definition at line 42 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P00_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4}

Definition at line 43 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P02_8_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4}

Definition at line 44 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_TX2_P33_6_OUT

IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4}

Definition at line 45 of file IfxPsi5_PinMap.c.

◆ IfxPsi5_Tx_Out_pinTable

const IfxPsi5_Tx_Out* IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxPsi5_TX0_P00_2_OUT,
&IfxPsi5_TX0_P02_2_OUT,
&IfxPsi5_TX0_P33_2_OUT
},
{
&IfxPsi5_TX1_P00_4_OUT,
&IfxPsi5_TX1_P02_6_OUT,
&IfxPsi5_TX1_P33_4_OUT
},
{
&IfxPsi5_TX2_P00_6_OUT,
&IfxPsi5_TX2_P02_8_OUT,
&IfxPsi5_TX2_P33_6_OUT
}
}
}
IfxPsi5_TX0_P02_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
Definition: IfxPsi5_PinMap.c:38
IfxPsi5_TX0_P33_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
Definition: IfxPsi5_PinMap.c:39
IfxPsi5_TX1_P33_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
Definition: IfxPsi5_PinMap.c:42
IfxPsi5_TX2_P02_8_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
Definition: IfxPsi5_PinMap.c:44
IfxPsi5_TX1_P00_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
Definition: IfxPsi5_PinMap.c:40
IfxPsi5_TX2_P00_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
Definition: IfxPsi5_PinMap.c:43
IfxPsi5_TX0_P00_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
Definition: IfxPsi5_PinMap.c:37
IfxPsi5_TX1_P02_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
Definition: IfxPsi5_PinMap.c:41
IfxPsi5_TX2_P33_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
Definition: IfxPsi5_PinMap.c:45

Definition at line 68 of file IfxPsi5_PinMap.c.


iLLD_TC26B: IfxPsi5_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxPsi5_PinMap.h File Reference
iLLD » PSI5

PSI5 I/O map. More...

#include <IfxPsi5_reg.h>
#include <_Impl/IfxPsi5_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPsi5_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5_Tx_Out
TX pin mapping structure. More...

Macros

#define | IFXPSI5_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5_PINMAP_NUM_CHANNELS 3
#define | IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
PSI5_RX0A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
PSI5_RX0B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
PSI5_RX0C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
PSI5_RX1A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
PSI5_RX1B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
PSI5_RX1C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
PSI5_RX2A: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
PSI5_RX2B: PSI5 input. More...
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
PSI5_RX2C: PSI5 input. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
PSI5_TX0: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
PSI5_TX1: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
PSI5_TX2: PSI5 output. More...
IFX_EXTERN const IfxPsi5_Rx_In * | IfxPsi5_Rx_In_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table. More...
IFX_EXTERN const IfxPsi5_Tx_Out * | IfxPsi5_Tx_Out_pinTable [IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table. More...

Detailed Description

PSI5 I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5_PinMap.h.


iLLD_TC26B: IfxPsi5_Psi5.h File Reference

  • Psi5
  • Psi5
Data Structures | Functions
IfxPsi5_Psi5.h File Reference
iLLD » PSI5

PSI5 PSI5 details. More...

#include "Psi5/Std/IfxPsi5.h"
#include "Scu/Std/IfxScuCcu.h"
#include "IfxPsi5_bf.h"
Include dependency graph for IfxPsi5_Psi5.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5_Psi5
PSI5 handle data structure. More...
struct | IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5_Psi5_Clock
Clock configuration data structure. More...
struct | IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members. More...
struct | IfxPsi5_Psi5_InputOutputControl
Input output configuration structure. More...
struct | IfxPsi5_Psi5_Message
Psi5 serial message with individual members. More...
struct | IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5_Psi5_Rdm
Psi5 frame in double word format. More...
struct | IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value. More...
struct | IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure. More...
struct | IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5_Psi5_PinsConfig
Pin Configuration structure. More...
struct | IfxPsi5_Psi5_Channel
Channel handle data structure. More...
struct | IfxPsi5_Psi5_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5_Psi5_Config
PSI5 module configuration structure. More...
union | IfxPsi5_Psi5_Frame
Psi5 frame data union. More...
union | IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure. More...
struct | IfxPsi5_Psi5_StartupOptions
startup related options TBD More...

Functions

IFX_EXTERN void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
IFX_EXTERN void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...
IFX_INLINE boolean | IfxPsi5_Psi5_startupChannel (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options More...
IFX_EXTERN boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
IFX_EXTERN boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
IFX_EXTERN uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...

Detailed Description

PSI5 PSI5 details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5_Psi5.h.

Data Structure Documentation

◆ IfxPsi5_Psi5_PinsConfig

struct IfxPsi5_Psi5_PinsConfig

Pin Configuration structure.

Definition at line 274 of file IfxPsi5_Psi5.h.

Collaboration diagram for IfxPsi5_Psi5_PinsConfig:
[legend]
Data Fields
IFX_CONST IfxPsi5_Rx_In * | in | The RX Pin which should be configured.
IfxPort_InputMode | inMode | The pin input mode which should be configured.
IFX_CONST IfxPsi5_Tx_Out * | out | The TX Pin which should be configured.
IfxPort_OutputMode | outMode | The pin output mode which should be configured.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.


iLLD_TC26B: IfxPsi5.h File Reference

  • Psi5
  • Std
Enumerations | Functions
IfxPsi5.h File Reference
iLLD » PSI5

PSI5 basic functionality. More...

#include "_Impl/IfxPsi5_cfg.h"
#include "_PinMap/IfxPsi5_PinMap.h"
#include "IfxPsi5_reg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxPsi5.h:

Go to the source code of this file.

Enumerations

enum IfxPsi5_AlternateInput {
IfxPsi5_AlternateInput_0 = 0,
IfxPsi5_AlternateInput_1,
IfxPsi5_AlternateInput_2,
IfxPsi5_AlternateInput_3
}
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection. More...
enum IfxPsi5_BaudRate {
IfxPsi5_BaudRate_125 = 0,
IfxPsi5_BaudRate_189 = 1
}
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection. More...
enum IfxPsi5_CRCorParity {
IfxPsi5_CRCorParity_parity = 0,
IfxPsi5_CRCorParity_crc = 1
}
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection. More...
enum IfxPsi5_ClockType {
IfxPsi5_ClockType_fracDiv = 0,
IfxPsi5_ClockType_slowClock_125 = 1,
IfxPsi5_ClockType_fastClock_189 = 2,
IfxPsi5_ClockType_timeStamp = 3
}
Clock type. More...
enum IfxPsi5_DigitalInputFilterDepth {
IfxPsi5_DigitalInputFilterDepth_0 = 0,
IfxPsi5_DigitalInputFilterDepth_1,
IfxPsi5_DigitalInputFilterDepth_2,
IfxPsi5_DigitalInputFilterDepth_3,
IfxPsi5_DigitalInputFilterDepth_4,
IfxPsi5_DigitalInputFilterDepth_5,
IfxPsi5_DigitalInputFilterDepth_6,
IfxPsi5_DigitalInputFilterDepth_7,
IfxPsi5_DigitalInputFilterDepth_8,
IfxPsi5_DigitalInputFilterDepth_9,
IfxPsi5_DigitalInputFilterDepth_10,
IfxPsi5_DigitalInputFilterDepth_11,
IfxPsi5_DigitalInputFilterDepth_12,
IfxPsi5_DigitalInputFilterDepth_13,
IfxPsi5_DigitalInputFilterDepth_14,
IfxPsi5_DigitalInputFilterDepth_15
}
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth. More...
enum IfxPsi5_DividerMode {
IfxPsi5_DividerMode_spb = 0,
IfxPsi5_DividerMode_normal = 1,
IfxPsi5_DividerMode_fractional = 2,
IfxPsi5_DividerMode_off = 3
}
MODULE_PSI5.FDR.DM,Divider mode. More...
enum IfxPsi5_FrameExpectation {
IfxPsi5_FrameExpectation_notExpected = 0,
IfxPsi5_FrameExpectation_expected = 1
}
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control. More...
enum IfxPsi5_MessagingBits {
IfxPsi5_MessagingBits_absent = 0,
IfxPsi5_MessagingBits_present = 1
}
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence. More...
enum IfxPsi5_ReceiveDataRegisterTimestamp {
IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0,
IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1
}
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers. More...
enum IfxPsi5_Slot {
IfxPsi5_Slot_0 = 0,
IfxPsi5_Slot_1,
IfxPsi5_Slot_2,
IfxPsi5_Slot_3,
IfxPsi5_Slot_4,
IfxPsi5_Slot_5
}
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id. More...
enum IfxPsi5_SuspendMode {
IfxPsi5_SuspendMode_none = 0,
IfxPsi5_SuspendMode_hard = 1,
IfxPsi5_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5_TimeBase {
IfxPsi5_TimeBase_internal = 0,
IfxPsi5_TimeBase_external = 1
}
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base. More...
enum IfxPsi5_TimestampRegister {
IfxPsi5_TimestampRegister_a = 0,
IfxPsi5_TimestampRegister_b = 1,
IfxPsi5_TimestampRegister_c = 2
}
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type. More...
enum IfxPsi5_Trigger {
IfxPsi5_Trigger_0 = 0,
IfxPsi5_Trigger_1,
IfxPsi5_Trigger_2,
IfxPsi5_Trigger_3,
IfxPsi5_Trigger_4,
IfxPsi5_Trigger_5
}
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id. More...
enum IfxPsi5_TriggerType {
IfxPsi5_TriggerType_periodic = 0,
IfxPsi5_TriggerType_external = 1,
IfxPsi5_TriggerType_bypass = 2
}
Trigger type. More...
enum IfxPsi5_Verbose {
IfxPsi5_Verbose_off = 0,
IfxPsi5_Verbose_on = 1
}
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode. More...
enum IfxPsi5_FractionalDividerRegister {
IfxPsi5_FractionalDividerRegister_normal = 0,
IfxPsi5_FractionalDividerRegister_lowbitrate = 1,
IfxPsi5_FractionalDividerRegister_highbitrate = 2,
IfxPsi5_FractionalDividerRegister_timestamp = 3
}
Options for choosing different Fractional Divider Registers. More...
enum IfxPsi5_InterruptServiceRequest {
IfxPsi5_InterruptServiceRequest_0 = 0,
IfxPsi5_InterruptServiceRequest_1 = 1,
IfxPsi5_InterruptServiceRequest_2 = 2,
IfxPsi5_InterruptServiceRequest_3 = 3,
IfxPsi5_InterruptServiceRequest_4 = 4,
IfxPsi5_InterruptServiceRequest_5 = 5,
IfxPsi5_InterruptServiceRequest_6 = 6,
IfxPsi5_InterruptServiceRequest_7 = 7
}
enum IfxPsi5_InterruptStatusRegister {
IfxPsi5_InterruptStatusRegister_a = 0,
IfxPsi5_InterruptStatusRegister_b = 1
}
enum IfxPsi5_ReceiverControlRegister {
IfxPsi5_ReceiverControlRegister_a = 0,
IfxPsi5_ReceiverControlRegister_b = 1,
IfxPsi5_ReceiverControlRegister_c = 2
}
Optiond for different Receive Control Registers(RCRA,RCRB,RCRC) More...

Functions

IFX_INLINE uint32 | IfxPsi5_getStatusCrci (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusMei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNbi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusNfi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRdi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRmi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusRsi (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel More...
IFX_INLINE uint32 | IfxPsi5_getStatusTei (Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel More...
IFX_EXTERN void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...
IFX_INLINE void | IfxPsi5_initRxPin (const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5_initTxPin (const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5_setRxInput (Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input. More...
IFX_INLINE boolean | IfxPsi5_isModuleSuspended (Ifx_PSI5 *psi5)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5_setSuspendMode (Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxPsi5_getSrcPointer (Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
Gives the pointer to the SRC register for respective PSI5 interrupt source. More...
IFX_INLINE void | IfxPsi5_enableAllChannels (Ifx_PSI5 *psi5)
Enabling all channels and error flags. More...
IFX_INLINE void | IfxPsi5_setFractionalDivider (Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
IFX_EXTERN void | IfxPsi5_enableModule (Ifx_PSI5 *psi5)

Detailed Description

PSI5 basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5.h.

Enumeration Type Documentation

◆ IfxPsi5_FractionalDividerRegister

enum IfxPsi5_FractionalDividerRegister

Options for choosing different Fractional Divider Registers.

Enumerator
IfxPsi5_FractionalDividerRegister_normal | The Fractional Divider Register controls the input clock f_fracdiv.
IfxPsi5_FractionalDividerRegister_lowbitrate | The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time resolution of the f_125.It divides f_fracdiv by a factor and provides f_125 to all channels.
IfxPsi5_FractionalDividerRegister_highbitrate | The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time resolution of f_189. It divides f_fracdiv by a factor and provides f_189 to all channels.
IfxPsi5_FractionalDividerRegister_timestamp | The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolution of the Time Stamp Registers TSRA/B/C and the Sync Pulse Time Base Counter SBC. It divides fPSI5 by a factor. It contains as well the bits for reset control of the time stamp counters.

Definition at line 219 of file IfxPsi5.h.

◆ IfxPsi5_InterruptServiceRequest

enum IfxPsi5_InterruptServiceRequest
Enumerator
IfxPsi5_InterruptServiceRequest_0
IfxPsi5_InterruptServiceRequest_1
IfxPsi5_InterruptServiceRequest_2
IfxPsi5_InterruptServiceRequest_3
IfxPsi5_InterruptServiceRequest_4
IfxPsi5_InterruptServiceRequest_5
IfxPsi5_InterruptServiceRequest_6
IfxPsi5_InterruptServiceRequest_7

Definition at line 230 of file IfxPsi5.h.

◆ IfxPsi5_InterruptStatusRegister

enum IfxPsi5_InterruptStatusRegister
Enumerator
IfxPsi5_InterruptStatusRegister_a
IfxPsi5_InterruptStatusRegister_b

Definition at line 242 of file IfxPsi5.h.

◆ IfxPsi5_ReceiverControlRegister

enum IfxPsi5_ReceiverControlRegister

Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)

Enumerator
IfxPsi5_ReceiverControlRegister_a | Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots.
IfxPsi5_ReceiverControlRegister_b | Receiver Control Register B configures up to 6 frame types in the up to 6 slots.
IfxPsi5_ReceiverControlRegister_c | Receiver Control Register C configures bit rate and time stamp sources.

Definition at line 250 of file IfxPsi5.h.

Function Documentation

◆ IfxPsi5_enableAllChannels()

IFX_INLINE void IfxPsi5_enableAllChannels ( Ifx_PSI5 * psi5 )

Enabling all channels and error flags.

Parameters
psi5 Pointer to PSI5 SFR base register
Returns
None

Definition at line 547 of file IfxPsi5.h.

◆ IfxPsi5_enableModule()

IFX_EXTERN void IfxPsi5_enableModule ( Ifx_PSI5 * psi5 )
Returns
None

Definition at line 62 of file IfxPsi5.c.

◆ IfxPsi5_getSrcPointer()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxPsi5_getSrcPointer | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_InterruptServiceRequest | intRequest
 | ) |  |

Gives the pointer to the SRC register for respective PSI5 interrupt source.

Parameters
psi5 | Pointer to PSI5 SFR base register
intRequest | Interrupt Source
Returns
Address of the required SRC register

Definition at line 540 of file IfxPsi5.h.

◆ IfxPsi5_setFractionalDivider()

IFX_INLINE void IfxPsi5_setFractionalDivider | ( | Ifx_PSI5 * | psi5,
 |  | IfxPsi5_FractionalDividerRegister | fcd,
 |  | uint32 | value
 | ) |  |
Parameters
psi5 | Pointer to PSI5 SFR base register
fcd | Select the appropriate divider register(see IfxPsi5_FractionalDividerRegister enum) for required functionality.
value | Contains value including divider values for different divider registers(FDR,FDRL,FDRH,FDRT)
Returns
None

Definition at line 556 of file IfxPsi5.h.


iLLD_TC26B: PSI5S

Modules | Files
PSI5S
iLLD
Collaboration diagram for PSI5S:

Modules

Implementation
Standard Driver
PSI5S Pin Mapping
How to use the PSI5S PSI5S Interface driver?
PSI5S

Files

file | IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
file | IfxPsi5s_PinMap.c
PSI5S I/O map.
file | IfxPsi5s_PinMap.h
PSI5S I/O map.
file | IfxPsi5s_Psi5s.h
PSI5S PSI5S details.
file | IfxPsi5s.h
PSI5S basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » PSI5S
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » PSI5S
Collaboration diagram for Standard Driver:

Modules

Enumerations
Channel Operative Functions
IO Pin Configuration Functions
Interrupt configuration functions
Module Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » PSI5S » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxPsi5s_AlternateInput {
IfxPsi5s_AlternateInput_0 = 0,
IfxPsi5s_AlternateInput_1,
IfxPsi5s_AlternateInput_2,
IfxPsi5s_AlternateInput_3
}
MODULE_PSI5S.IOCR.ALTI:Alternate input. More...
enum IfxPsi5s_AscBaudratePrescalar {
IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0,
IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1
}
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select. More...
enum IfxPsi5s_AscMode {
IfxPsi5s_AscMode_sync = 0,
IfxPsi5s_AscMode_async_8bitData = 1,
IfxPsi5s_AscMode_async_7bitDataWithParity = 3,
IfxPsi5s_AscMode_async_9bitData = 4,
IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5,
IfxPsi5s_AscMode_async_8bitDataWithParity = 7
}
MODULE_PSI5S.CON.M:ASC mode of operation. More...
enum IfxPsi5s_AscStopBits {
IfxPsi5s_AscStopBits_1 = 0,
IfxPsi5s_AscStopBits_2
}
MODULE_PSI5S.CON.STP: Number of stop bits. More...
enum IfxPsi5s_ChannelId {
IfxPsi5s_ChannelId_0 = 0,
IfxPsi5s_ChannelId_1,
IfxPsi5s_ChannelId_2,
IfxPsi5s_ChannelId_3,
IfxPsi5s_ChannelId_4,
IfxPsi5s_ChannelId_5,
IfxPsi5s_ChannelId_6,
IfxPsi5s_ChannelId_7,
IfxPsi5s_ChannelId_none = -1
}
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID. More...
enum IfxPsi5s_ClockType {
IfxPsi5s_ClockType_fracDiv = 0,
IfxPsi5s_ClockType_timeStamp = 1,
IfxPsi5s_ClockType_ascFracDiv = 2,
IfxPsi5s_ClockType_ascOutput = 3
}
Clock Selection. More...
enum IfxPsi5s_CrcOrParity {
IfxPsi5s_CrcOrParity_parity = 0,
IfxPsi5s_CrcOrParity_crc = 1
}
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity. More...
enum IfxPsi5s_DividerMode {
IfxPsi5s_DividerMode_spb = 0,
IfxPsi5s_DividerMode_normal = 1,
IfxPsi5s_DividerMode_fractional = 2,
IfxPsi5s_DividerMode_off = 3
}
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode. More...
enum IfxPsi5s_EnhancedProtocol {
IfxPsi5s_EnhancedProtocol_toothGapMethod = 0,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3
}
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types. More...
enum IfxPsi5s_FrameId {
IfxPsi5s_FrameId_frameHeader = 0,
IfxPsi5s_FrameId_rollingNumber = 1
}
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation. More...
enum IfxPsi5s_IdleTime {
IfxPsi5s_IdleTime_1 = 0,
IfxPsi5s_IdleTime_2,
IfxPsi5s_IdleTime_3,
IfxPsi5s_IdleTime_4,
IfxPsi5s_IdleTime_5,
IfxPsi5s_IdleTime_6,
IfxPsi5s_IdleTime_7,
IfxPsi5s_IdleTime_8,
IfxPsi5s_IdleTime_9,
IfxPsi5s_IdleTime_10,
IfxPsi5s_IdleTime_11,
IfxPsi5s_IdleTime_12,
IfxPsi5s_IdleTime_13,
IfxPsi5s_IdleTime_14,
IfxPsi5s_IdleTime_15,
IfxPsi5s_IdleTime_16
}
MODULE_PSI5S.GCR.IDT:Idle time bit count. More...
enum IfxPsi5s_LoopBackMode {
IfxPsi5s_LoopBackMode_disable = 0,
IfxPsi5s_LoopBackMode_enable = 1
}
Enable/Disable Loop back Mode. More...
enum IfxPsi5s_MessagingBits {
IfxPsi5s_MessagingBits_absent = 0,
IfxPsi5s_MessagingBits_present = 1
}
Messaging bits presence. More...
enum IfxPsi5s_NumberExpectedFrames {
IfxPsi5s_NumberExpectedFrames_1 = 1,
IfxPsi5s_NumberExpectedFrames_2,
IfxPsi5s_NumberExpectedFrames_3,
IfxPsi5s_NumberExpectedFrames_4,
IfxPsi5s_NumberExpectedFrames_5,
IfxPsi5s_NumberExpectedFrames_6
}
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames. More...
enum IfxPsi5s_SleepMode {
IfxPsi5s_SleepMode_enable = 0,
IfxPsi5s_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS. More...
enum IfxPsi5s_SuspendMode {
IfxPsi5s_SuspendMode_none = 0,
IfxPsi5s_SuspendMode_hard = 1,
IfxPsi5s_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5s_TimeBase {
IfxPsi5s_TimeBase_internal = 0,
IfxPsi5s_TimeBase_external = 1
}
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base. More...
enum IfxPsi5s_TimestampRegister {
IfxPsi5s_TimestampRegister_a = 0,
IfxPsi5s_TimestampRegister_b = 1
}
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register. More...
enum IfxPsi5s_TimestampTrigger {
IfxPsi5s_TimestampTrigger_syncPulse = 0,
IfxPsi5s_TimestampTrigger_frame = 1
}
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger. More...
enum IfxPsi5s_Trigger {
IfxPsi5s_Trigger_0 = 0,
IfxPsi5s_Trigger_1,
IfxPsi5s_Trigger_2,
IfxPsi5s_Trigger_3,
IfxPsi5s_Trigger_4,
IfxPsi5s_Trigger_5,
IfxPsi5s_Trigger_6,
IfxPsi5s_Trigger_7
}
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id. More...
enum IfxPsi5s_TriggerType {
IfxPsi5s_TriggerType_periodic = 0,
IfxPsi5s_TriggerType_external = 1
}
Trigger type defined in. More...
enum IfxPsi5s_UartFrameCount {
IfxPsi5s_UartFrameCount_3 = 0,
IfxPsi5s_UartFrameCount_4,
IfxPsi5s_UartFrameCount_5,
IfxPsi5s_UartFrameCount_6
}
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count. More...
enum IfxPsi5s_WatchdogTimerMode {
IfxPsi5s_WatchdogTimerMode_frame = 0,
IfxPsi5s_WatchdogTimerMode_syncPulse = 1
}
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode. More...

Detailed Description

Enumeration Type Documentation

◆ IfxPsi5s_AlternateInput

enum IfxPsi5s_AlternateInput

MODULE_PSI5S.IOCR.ALTI:Alternate input.

Enumerator
IfxPsi5s_AlternateInput_0 | Alternate Input 0.
IfxPsi5s_AlternateInput_1 | Alternate Input 1.
IfxPsi5s_AlternateInput_2 | Alternate Input 2.
IfxPsi5s_AlternateInput_3 | Alternate Input 3.

Definition at line 59 of file IfxPsi5s.h.

◆ IfxPsi5s_AscBaudratePrescalar

enum IfxPsi5s_AscBaudratePrescalar

MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.

Enumerator
IfxPsi5s_AscBaudratePrescalar_divideBy2 | Divide by 2 is selected for baudrate timer prescalar.
IfxPsi5s_AscBaudratePrescalar_divideBy3 | Divide by 3 is selected for baudrate timer prescalar.

Definition at line 69 of file IfxPsi5s.h.

◆ IfxPsi5s_AscMode

enum IfxPsi5s_AscMode

MODULE_PSI5S.CON.M:ASC mode of operation.

Enumerator
IfxPsi5s_AscMode_sync | Synchronous mode.
IfxPsi5s_AscMode_async_8bitData | Asynchronous mode with 8 bit data.
IfxPsi5s_AscMode_async_7bitDataWithParity | Asynchronous mode with 7 bit data with parity.
IfxPsi5s_AscMode_async_9bitData | Asynchronous mode with 9 bit data.
IfxPsi5s_AscMode_async_8bitDataWithWakeup | Asynchronous mode with 8 bit data with wakeup.
IfxPsi5s_AscMode_async_8bitDataWithParity | Asynchronous mode with 8 bit data with parity.

Definition at line 77 of file IfxPsi5s.h.

◆ IfxPsi5s_AscStopBits

enum IfxPsi5s_AscStopBits

MODULE_PSI5S.CON.STP: Number of stop bits.

Enumerator
IfxPsi5s_AscStopBits_1 | 1 stop bit
IfxPsi5s_AscStopBits_2 | 2 stop bit

Definition at line 89 of file IfxPsi5s.h.

◆ IfxPsi5s_ChannelId

enum IfxPsi5s_ChannelId

PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.

Enumerator
IfxPsi5s_ChannelId_0 | Ifx_PSI5S Channel 0.
IfxPsi5s_ChannelId_1 | Ifx_PSI5S Channel 1.
IfxPsi5s_ChannelId_2 | Ifx_PSI5S Channel 2.
IfxPsi5s_ChannelId_3 | Ifx_PSI5S Channel 3.
IfxPsi5s_ChannelId_4 | Ifx_PSI5S Channel 4.
IfxPsi5s_ChannelId_5 | Ifx_PSI5S Channel 5.
IfxPsi5s_ChannelId_6 | Ifx_PSI5S Channel 6.
IfxPsi5s_ChannelId_7 | Ifx_PSI5S Channel 7.
IfxPsi5s_ChannelId_none | None of the Ifx_PSI5S Channels.

Definition at line 97 of file IfxPsi5s.h.

◆ IfxPsi5s_ClockType

enum IfxPsi5s_ClockType

Clock Selection.

Enumerator
IfxPsi5s_ClockType_fracDiv | Fractional Divide clock.
IfxPsi5s_ClockType_timeStamp | Timestamp clock.
IfxPsi5s_ClockType_ascFracDiv | Asc Fractional divider clock.
IfxPsi5s_ClockType_ascOutput | Asc output clock.

Definition at line 112 of file IfxPsi5s.h.

◆ IfxPsi5s_CrcOrParity

enum IfxPsi5s_CrcOrParity

MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.

Enumerator
IfxPsi5s_CrcOrParity_parity | parity selection
IfxPsi5s_CrcOrParity_crc | CRC selection.

Definition at line 122 of file IfxPsi5s.h.

◆ IfxPsi5s_DividerMode

enum IfxPsi5s_DividerMode

MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.

Enumerator
IfxPsi5s_DividerMode_spb | divider mode is off
IfxPsi5s_DividerMode_normal | divider mode is normal
IfxPsi5s_DividerMode_fractional | divider mode is fractional
IfxPsi5s_DividerMode_off | divider mode is off

Definition at line 130 of file IfxPsi5s.h.

◆ IfxPsi5s_EnhancedProtocol

enum IfxPsi5s_EnhancedProtocol

MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.

Enumerator
IfxPsi5s_EnhancedProtocol_toothGapMethod | toothGapMethod Enhanced protocol type
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 | pulseWidth_frameFormat_1to3 Enhanced protocol type
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 | pulseWidth_frameFormat_4 Enhanced protocol type

Definition at line 140 of file IfxPsi5s.h.

◆ IfxPsi5s_FrameId

enum IfxPsi5s_FrameId

MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.

Enumerator
IfxPsi5s_FrameId_frameHeader | Frame ID is updated from packet frame header (Sync mode)
IfxPsi5s_FrameId_rollingNumber | Frame ID is a rolling number 0 .. 5 copied from FCNT.

Definition at line 149 of file IfxPsi5s.h.

◆ IfxPsi5s_IdleTime

enum IfxPsi5s_IdleTime

MODULE_PSI5S.GCR.IDT:Idle time bit count.

Enumerator
IfxPsi5s_IdleTime_1 | 1 bit Idle time
IfxPsi5s_IdleTime_2 | 2 bit Idle time
IfxPsi5s_IdleTime_3 | 3 bit Idle time
IfxPsi5s_IdleTime_4 | 4 bit Idle time
IfxPsi5s_IdleTime_5 | 5 bit Idle time
IfxPsi5s_IdleTime_6 | 6 bit Idle time
IfxPsi5s_IdleTime_7 | 7 bit Idle time
IfxPsi5s_IdleTime_8 | 8 bit Idle time
IfxPsi5s_IdleTime_9 | 9 bit Idle time
IfxPsi5s_IdleTime_10 | 10 bit Idle time
IfxPsi5s_IdleTime_11 | 11 bit Idle time
IfxPsi5s_IdleTime_12 | 12 bit Idle time
IfxPsi5s_IdleTime_13 | 13 bit Idle time
IfxPsi5s_IdleTime_14 | 14 bit Idle time
IfxPsi5s_IdleTime_15 | 15 bit Idle time
IfxPsi5s_IdleTime_16 | 16 bit Idle time

Definition at line 157 of file IfxPsi5s.h.

◆ IfxPsi5s_LoopBackMode

enum IfxPsi5s_LoopBackMode

Enable/Disable Loop back Mode.

Enumerator
IfxPsi5s_LoopBackMode_disable | loop-back mode disabled
IfxPsi5s_LoopBackMode_enable | loop-back mode enabled

Definition at line 179 of file IfxPsi5s.h.

◆ IfxPsi5s_MessagingBits

enum IfxPsi5s_MessagingBits

Messaging bits presence.

Enumerator
IfxPsi5s_MessagingBits_absent | No messaging bits.
IfxPsi5s_MessagingBits_present | 2 messaging bits

Definition at line 187 of file IfxPsi5s.h.

◆ IfxPsi5s_NumberExpectedFrames

enum IfxPsi5s_NumberExpectedFrames

MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.

Enumerator
IfxPsi5s_NumberExpectedFrames_1 | 1 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_2 | 2 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_3 | 3 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_4 | 4 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_5 | 5 psi5s frame expected
IfxPsi5s_NumberExpectedFrames_6 | 6 psi5s frame expected

Definition at line 195 of file IfxPsi5s.h.

◆ IfxPsi5s_SleepMode

enum IfxPsi5s_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS.

Enumerator
IfxPsi5s_SleepMode_enable | enables sleep mode
IfxPsi5s_SleepMode_disable | disables sleep mode

Definition at line 208 of file IfxPsi5s.h.

◆ IfxPsi5s_SuspendMode

enum IfxPsi5s_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxPsi5s_SuspendMode_none | No suspend.
IfxPsi5s_SuspendMode_hard | Hard Suspend.
IfxPsi5s_SuspendMode_soft | Soft Suspend.

Definition at line 216 of file IfxPsi5s.h.

◆ IfxPsi5s_TimeBase

enum IfxPsi5s_TimeBase

MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.

Enumerator
IfxPsi5s_TimeBase_internal | Internal time stamp clock.
IfxPsi5s_TimeBase_external | External GTM inputs.

Definition at line 225 of file IfxPsi5s.h.

◆ IfxPsi5s_TimestampRegister

enum IfxPsi5s_TimestampRegister

MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.

Enumerator
IfxPsi5s_TimestampRegister_a | Timestamp register A.
IfxPsi5s_TimestampRegister_b | Timestamp register B.

Definition at line 233 of file IfxPsi5s.h.

◆ IfxPsi5s_TimestampTrigger

enum IfxPsi5s_TimestampTrigger

MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.

Enumerator
IfxPsi5s_TimestampTrigger_syncPulse | Timestamp trigger on sync pulse.
IfxPsi5s_TimestampTrigger_frame | Timestamp trigger on any frame.

Definition at line 241 of file IfxPsi5s.h.

◆ IfxPsi5s_Trigger

enum IfxPsi5s_Trigger

MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.

Enumerator
IfxPsi5s_Trigger_0 | Trigger 0.
IfxPsi5s_Trigger_1 | Trigger 1.
IfxPsi5s_Trigger_2 | Trigger 2.
IfxPsi5s_Trigger_3 | Trigger 3.
IfxPsi5s_Trigger_4 | Trigger 4.
IfxPsi5s_Trigger_5 | Trigger 5.
IfxPsi5s_Trigger_6 | Trigger 6.
IfxPsi5s_Trigger_7 | Trigger 7.

Definition at line 249 of file IfxPsi5s.h.

◆ IfxPsi5s_TriggerType

enum IfxPsi5s_TriggerType

Trigger type defined in.

Enumerator
IfxPsi5s_TriggerType_periodic | Periodic trigger.
IfxPsi5s_TriggerType_external | External trigger.

Definition at line 263 of file IfxPsi5s.h.

◆ IfxPsi5s_UartFrameCount

enum IfxPsi5s_UartFrameCount

MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.

Enumerator
IfxPsi5s_UartFrameCount_3 | 3 UART frames
IfxPsi5s_UartFrameCount_4 | 4 UART frames
IfxPsi5s_UartFrameCount_5 | 5 UART frames
IfxPsi5s_UartFrameCount_6 | 6 UART frames

Definition at line 271 of file IfxPsi5s.h.

◆ IfxPsi5s_WatchdogTimerMode

enum IfxPsi5s_WatchdogTimerMode

MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.

Enumerator
IfxPsi5s_WatchdogTimerMode_frame | Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
IfxPsi5s_WatchdogTimerMode_syncPulse | Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in NFC.NFx.(sync mode)

Definition at line 281 of file IfxPsi5s.h.


iLLD_TC26B: Channel Operative Functions

Functions
Channel Operative Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Channel Operative Functions:

Functions

IFX_EXTERN void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
IFX_EXTERN void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
IFX_EXTERN void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)

Detailed Description

Function Documentation

◆ IfxPsi5s_disableAscReceiver()

IFX_EXTERN void IfxPsi5s_disableAscReceiver ( Ifx_PSI5S * psi5s )

Asc receiver is disabled.

Parameters
psi5s Pointer to PSI5S module registers
Returns
None

Definition at line 35 of file IfxPsi5s.c.

◆ IfxPsi5s_enableAscReceiver()

IFX_EXTERN void IfxPsi5s_enableAscReceiver ( Ifx_PSI5S * psi5s )

Enable ASC receiver.

Parameters
psi5s pointer to the PSI5S register space
Returns
None

Definition at line 50 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableAscReceiver().

◆ IfxPsi5s_enableDisableChannels()

IFX_EXTERN void IfxPsi5s_enableDisableChannels | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Enable/disable any combination of channels selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S register space
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

Definition at line 64 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableDisableChannels().

◆ IfxPsi5s_enableDisableChannelTriggerCounters()

IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Enable/disable any combination of channel trigger counters selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S register space
channels | specifies the channel trigger counters which should be enabled/disabled
mask | specifies the channel trigger counters which should be modified
Returns
None

Definition at line 56 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters().

◆ IfxPsi5s_startAscTransactions()

IFX_EXTERN void IfxPsi5s_startAscTransactions ( Ifx_PSI5S * psi5s )

Start ASC transactions.

Parameters
psi5s pointer to the PSI5S register space
Returns
None

Definition at line 103 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_startAscTransactions().

◆ IfxPsi5s_stopAscTransactions()

IFX_EXTERN void IfxPsi5s_stopAscTransactions ( Ifx_PSI5S * psi5s )
Parameters
psi5s Pointer to PSI5S module registers
Returns
None

Definition at line 109 of file IfxPsi5s.c.


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxPsi5s_initClkPin (const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output. More...
IFX_INLINE void | IfxPsi5s_initRxPin (const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5s_initTxPin (const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5s_setRxInput (Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_initClkPin()

IFX_INLINE void IfxPsi5s_initClkPin | ( | const IfxPsi5s_Clk_Out * | clk,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a CLK output.

Parameters
clk | the CLK Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 443 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_initRxPin()

IFX_INLINE void IfxPsi5s_initRxPin | ( | const IfxPsi5s_Rx_In * | rx,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a RX input.

Parameters
rx | the RX Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 453 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_initTxPin()

IFX_INLINE void IfxPsi5s_initTxPin | ( | const IfxPsi5s_Tx_Out * | tx,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a TX output.

Parameters
tx | the TX Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 464 of file IfxPsi5s.h.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_setRxInput()

IFX_INLINE void IfxPsi5s_setRxInput | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_AlternateInput | alti
 | ) |  |

Selects the alternate input for Rx signal.

Parameters
psi5s | pointer to PSI5S registers
alti | alternate input selection of Rx signal
Returns
None

Definition at line 486 of file IfxPsi5s.h.

Referenced by IfxPsi5s_initRxPin().


iLLD_TC26B: Interrupt configuration functions

Interrupt configuration functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Interrupt configuration functions:


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » PSI5S » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE boolean | IfxPsi5s_isModuleSuspended (Ifx_PSI5S *psi5s)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5s_setSleepMode (Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode More...
IFX_INLINE void | IfxPsi5s_setSuspendMode (Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
IFX_EXTERN boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
IFX_EXTERN void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...

Detailed Description

Function Documentation

◆ IfxPsi5s_disableModule()

IFX_EXTERN void IfxPsi5s_disableModule ( Ifx_PSI5S * psi5s )

Disable PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S register space
Returns
None

Definition at line 41 of file IfxPsi5s.c.

◆ IfxPsi5s_getReadFrameStatus()

IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
psi5s | Pointer to PSI5S Module
channelId | channel ID
Returns
Frame Status

Definition at line 72 of file IfxPsi5s.c.

Referenced by IfxPsi5s_Psi5s_getReadFrameStatus().

◆ IfxPsi5s_getSuccessfullyReceivedFrameStatus()

IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Indicates the successful reception of a frame.

Parameters
psi5s | Pointer to PSI5S module registers
channelId | Channel Number

Definition at line 78 of file IfxPsi5s.c.

◆ IfxPsi5s_isModuleSuspended()

IFX_INLINE boolean IfxPsi5s_isModuleSuspended ( Ifx_PSI5S * psi5s )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
psi5s Pointer to PSI5S module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 474 of file IfxPsi5s.h.

◆ IfxPsi5s_resetModule()

IFX_EXTERN void IfxPsi5s_resetModule ( Ifx_PSI5S * psi5s )

resets PSI5S kernel

Parameters
psi5s pointer to PSI5S registers
Returns
None

Definition at line 84 of file IfxPsi5s.c.

◆ IfxPsi5s_setSleepMode()

IFX_INLINE void IfxPsi5s_setSleepMode | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_SleepMode | mode
 | ) |  |

enable / disable sleep mode

Parameters
psi5s | Pointer to PSI5S register
mode | sleep mode (enable/disable)
Returns
None

Definition at line 492 of file IfxPsi5s.h.

◆ IfxPsi5s_setSuspendMode()

IFX_INLINE void IfxPsi5s_setSuspendMode | ( | Ifx_PSI5S * | psi5s,
 |  | IfxPsi5s_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
psi5s | Pointer to PSI5S module registers
mode | Module suspend mode
Returns
None

Definition at line 501 of file IfxPsi5s.h.


iLLD_TC26B: PSI5S Pin Mapping

Data Structures | Macros | Variables
PSI5S Pin Mapping
iLLD » PSI5S
Collaboration diagram for PSI5S Pin Mapping:

Data Structures

struct | IfxPsi5s_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5s_Tx_Out
TX pin mapping structure. More...
struct | IfxPsi5s_Clk_Out
CLK pin mapping structure. More...

Macros

#define | IFXPSI5S_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
#define | IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S_CLK: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S_CLK: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
PSI5S_RXA: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
PSI5S_RXB: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
PSI5S_RXC: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table. More...
IFX_EXTERN const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table. More...
IFX_EXTERN const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5s_Rx_In

struct IfxPsi5s_Rx_In

RX pin mapping structure.

Definition at line 39 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Rx_In:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxPsi5s_Tx_Out

struct IfxPsi5s_Tx_Out

TX pin mapping structure.

Definition at line 47 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Tx_Out:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxPsi5s_Clk_Out

struct IfxPsi5s_Clk_Out

CLK pin mapping structure.

Definition at line 55 of file IfxPsi5s_PinMap.h.

Collaboration diagram for IfxPsi5s_Clk_Out:
[legend]
Data Fields
Ifx_PSI5S * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS

#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2

Definition at line 73 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_NUM_MODULES

#define IFXPSI5S_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 72 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS

#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3

Definition at line 74 of file IfxPsi5s_PinMap.h.

◆ IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS

#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Definition at line 75 of file IfxPsi5s_PinMap.h.

Variable Documentation

◆ IfxPsi5s_Clk_Out_pinTable

IFX_EXTERN const IfxPsi5s_Clk_Out* IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]

IfxPsi5s_Clk_Out table.

Definition at line 79 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_CLK_P02_4_OUT

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT

PSI5S_CLK: PSI5-S output.

Definition at line 62 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_CLK_P33_10_OUT

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT

PSI5S_CLK: PSI5-S output.

Definition at line 63 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_Rx_In_pinTable

IFX_EXTERN const IfxPsi5s_Rx_In* IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]

IfxPsi5s_Rx_In table.

Definition at line 82 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXA_P00_3_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN

PSI5S_RXA: PSI5-S input.

Definition at line 64 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXB_P02_5_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN

PSI5S_RXB: PSI5-S input.

Definition at line 65 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_RXC_P33_5_IN

IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN

PSI5S_RXC: PSI5-S input.

Definition at line 66 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_Tx_Out_pinTable

IFX_EXTERN const IfxPsi5s_Tx_Out* IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]

IfxPsi5s_Tx_Out table.

Definition at line 85 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P00_4_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT

PSI5S_TX: PSI5-S output.

Definition at line 67 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P02_6_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT

PSI5S_TX: PSI5-S output.

Definition at line 68 of file IfxPsi5s_PinMap.h.

◆ IfxPsi5s_TX_P33_6_OUT

IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT

PSI5S_TX: PSI5-S output.

Definition at line 69 of file IfxPsi5s_PinMap.h.


iLLD_TC26B: How to use the PSI5S PSI5S Interface driver?

How to use the PSI5S PSI5S Interface driver?
iLLD » PSI5S
Collaboration diagram for How to use the PSI5S PSI5S Interface driver?:

PSI5S defines a current loop based serial communication link typically used to connect airbag sensors or other peripheral devices.Data transmission and configuration of the sensor can be done by modulation of the Sync Pulses.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Psi5s/Psi5s/IfxPsi5s_Psi5s.h>

Variables

// PSI5S handle
IfxPsi5s_Psi5s psi5s;

Module Initialisation

// create module config
IfxPsi5s_Psi5s_Config psi5sModuleConfig;
IfxPsi5s_Psi5s_initModuleConfig(&psi5sModuleConfig, &MODULE_PSI5S);
IfxPsi5s_Psi5s_initModule(&psi5s, &psi5sModuleConfig);

Channel Initialisation

// create channel config
IfxPsi5s_Psi5s_ChannelConfig psi5sChannelConfig;
IfxPsi5s_Psi5s_initChannelConfig(&psi5sChannelConfig, &psi5s);
// change channel (default is channel 0, change to channel 4)
psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
// change payloadlength (default is 0, i.e., no frame expecte; change to 8)
for(int slot=0; slot<6; ++slot)
{
psi5sChannelConfig.receiveControl.payloadLength[slot] = 8;
}
// change channel (default is channel 0, change to channel 4)
psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
// initialize the channel
IfxPsi5s_Psi5s_Channel psi5sChannel;
IfxPsi5s_Psi5s_initChannel(&psi5sChannel, &psi5sChannelConfig);

Now, PSI5S is ready. Then, call the below APIs to do operation.

Send Channel Data

uint32 channels = (1 << IfxPsi5s_ChannelId_4); // enable channel 4
uint32 mask = (1 << IfxPsi5s_ChannelId_4); // modify the selection for channel 4
// enable the channel trigger counter
IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(&psi5s, channels, mask);
// enable the channel
IfxPsi5s_Psi5s_enableDisableChannels(&psi5s, channels, mask);
// start ASC interface
IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
uint32 data = 0x5;
// send data
if(IfxPsi5s_Psi5s_sendChannelData(&psi5sChannel, data))
{
// wait till data transfer is completed
while(psi5s.psi5s->INTSTAT[IfxPsi5s_ChannelId_4].B.TPI == 0);
}

Read Channel Frame

// enable ASC receiver
IfxPsi5s_Psi5s_enableAscReceiver(&psi5s);
// start ASC interface
IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
// add the code below to initiate the sensor to transmit frames
// end of code to initiate the sensor to transmit frames
IfxPsi5s_Psi5s_Frame frame;
while(!IfxPsi5s_Psi5s_getReadFrameStatus(psi5,IfxPsi5s_ChannelId_4));
IfxPsi5s_Psi5s_readFrame(&psi5sChannel, &frame))


iLLD_TC26B: PSI5S

Modules
PSI5S
iLLD » PSI5S
Collaboration diagram for PSI5S:

Modules

Data Structures
Module Initialise Functions
Channel Functions
Utility Functions
Interrupt configuration Function

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » PSI5S » PSI5S
Collaboration diagram for Data Structures:

Data Structures

struct | IfxPsi5s_Psi5s_Clock
Clock configuration data structure. More...
struct | IfxPsi5s_Psi5s_ReceivedBits
Received individual bits. More...
struct | IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data. More...
struct | IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure. More...
struct | IfxPsi5s_Psi5s
PSI5S handle data structure. More...
struct | IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure. More...
struct | IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration. More...
struct | IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers. More...
union | IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure More...
union | IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure. More...
union | IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure. More...
struct | IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5s_Psi5s_Channel
Channel handle data structure. More...
struct | IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5s_Psi5s_Config
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_Frame
Psi5s frame data structure. More...

Detailed Description

Data Structure Documentation

◆ IfxPsi5s_Psi5s_Clock

struct IfxPsi5s_Psi5s_Clock

Clock configuration data structure.

Definition at line 160 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | frequency | Specifies the frequency for the clock.
IfxPsi5s_DividerMode | mode | Specifies the mode of division for the clock.
IfxPsi5s_ClockType | type | Specifies the type of clock (fracDiv / timestamp)

◆ IfxPsi5s_Psi5s_ReceivedBits

struct IfxPsi5s_Psi5s_ReceivedBits

Received individual bits.

Definition at line 169 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | actualUartFrameCount: 3 | UART frames actually received.
uint8 | ascFramingErrorFlag: 1 | ASC framing error flag.
uint8 | ascOverrunErrorFlag: 1 | ASC overrun error flag.
uint8 | ascParityErrorFlag: 1 | ASC parity error flag.
uint8 | channelId: 3 | Channel ID.
uint8 | crc: 3 | Received CRC.
uint8 | crcError: 1 | CRC error flag.
uint8 | errorFlag0: 1 | Error signalling flag 0.
uint8 | errorFlag1: 1 | Error signalling flag 1.
uint8 | frameId: 3 | Frame ID.
uint8 | headerErrorFlag: 1 | Header error signalling flag.
uint8 | packetFrameCount: 4 | Packet frame count.
uint8 | receiveBufferOverflowFlag: 1 | Receive buffer overflow flag.
uint8 | watchdogTimeoutErrorFlag: 1 | Watchdog timeout error flag.
uint8 | xcrc: 6 | Received XCRC.
uint8 | xcrcError: 1 | XCRC error flag.

◆ IfxPsi5s_Psi5s_ReceivedData

struct IfxPsi5s_Psi5s_ReceivedData

Receive data structure with different segments of data.

Definition at line 191 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | packetFrameCount | Packet frame count.
uint32 | readData: 28 | Received data.

◆ IfxPsi5s_Psi5s_Timestamp

struct IfxPsi5s_Psi5s_Timestamp

Received timestamp contents structure.

Definition at line 199 of file IfxPsi5s_Psi5s.h.

Data Fields
uint8 | packetFrameCount: 4 | Packet frame count.
uint32 | timestamp: 24 | Received data.

◆ IfxPsi5s_Psi5s

struct IfxPsi5s_Psi5s

PSI5S handle data structure.

Definition at line 211 of file IfxPsi5s_Psi5s.h.

Data Fields
Ifx_PSI5S * psi5s Specifies the pointer to the PSI5S module registers.

◆ IfxPsi5s_Psi5s_AscConfig

struct IfxPsi5s_Psi5s_AscConfig

PSI5S module configuration structure.

Definition at line 218 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_AscConfig:
[legend]
Data Fields
uint32 | baudrateFrequency | Specifies the baudrate frequency.
IfxPsi5s_AscBaudratePrescalar | baudrateSelection | Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
IfxPsi5s_Psi5s_Clock | clockOutput | Specifies the output clock properties.
boolean | fractionalDividerEnabled | Specifies whether fractional divider is enabled or not.
boolean | framingCheckEnabled | Specifies whether framing check is enabled or not.
boolean | loopbackEnabled | Specifies whether loopback is enabled or not.
boolean | overrunCheckEnabled | Specifies whether overrun check is enabled or not.
boolean | parityCheckEnabled | Specifies whether parity check is enabled or not.
IfxPsi5s_AscMode | receiveMode | Specifies the mode of operation for ASC receiver.
boolean | receiverOddParityEnabled | Specifies whether receiver parity check should be for even or odd.
IfxPsi5s_AscStopBits | stopBits | Specifies the number of stop bits.
IfxPsi5s_AscMode | transmitMode | Specifies the mode of operation for ASC transmitter.
boolean | transmitterOddParityEnabled | Specifies whether transmit parity generation should be even or odd.

◆ IfxPsi5s_Psi5s_ChannelTrigger

struct IfxPsi5s_Psi5s_ChannelTrigger

channel trigger configuration structure

Definition at line 237 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | channelTriggerCounter | Specifies the channel trigger counter.
uint32 | channelTriggerValue | Specifies the channel trigger value CTV.

◆ IfxPsi5s_Psi5s_GlobalControlConfig

struct IfxPsi5s_Psi5s_GlobalControlConfig

PSI5S global control configuration structure.

Definition at line 245 of file IfxPsi5s_Psi5s.h.

Data Fields
boolean | ascOnlyMode | Specifies if the module is in ASC only mode.
boolean | crcErrorConsideredForRSI | Specifies whether CRCI is considered for RSI assertion.
boolean | framingErrorConsideredForRSI | Specifies whether FE is considered for RSI assertion.
boolean | headerErrorConsideredForRSI | Specifies whether HDI is considered for RSI assertion.
uint32 | idleTime | Specifies the number of stop bits in addition to last UART frame that is required for start of frame detection.
boolean | overrunErrorConsideredForRSI | Specifies whether OE is considered for RSI assertion.
boolean | parityErrorConsideredForRSI | Specifies whether PE is considered for RSI assertion.
boolean | receiveBufferErrorConsideredForRSI | Specifies whether RBI is considered for RSI assertion.
boolean | transmitErrorConsideredForRSI | Specifies whether TEI is considered for RSI assertion.
boolean | xcrcErrorConsideredForRSI | Specifies whether XCRCI is considered for RSI assertion.

◆ IfxPsi5s_Psi5s_Pins

struct IfxPsi5s_Psi5s_Pins

Structure for PSI5S pin configuration.

Definition at line 261 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Pins:
[legend]
Data Fields
IFX_CONST IfxPsi5s_Clk_Out * | clk | PSI5S Clk Pin.
IfxPort_OutputMode | clkMode | Clk as output.
IfxPort_PadDriver | pinDriver | pad driver
IFX_CONST IfxPsi5s_Rx_In * | rx | PSI5S Rx pin.
IfxPort_InputMode | rxMode | Rx pin as input.
IFX_CONST IfxPsi5s_Tx_Out * | tx | PSI5S Tx pin.
IfxPort_OutputMode | txMode | Tx as output.

◆ IfxPsi5s_Psi5s_PulseGeneration

struct IfxPsi5s_Psi5s_PulseGeneration

Sync pulse generation configuration structure.

Definition at line 274 of file IfxPsi5s_Psi5s.h.

Data Fields
uint32 | codeforOne | Specifies the code used to represent '1' - referred as ATXCMD.
uint32 | codeforZero | Specifies the code used to represent '0' - referred as TXCMD.
IfxPsi5s_Trigger | externalTimeBaseSelect | Specifies the clock source for CTV in the case of external.
IfxPsi5s_Trigger | externalTriggerSelect | Specifies the trigger source in case of external triggerring.
IfxPsi5s_TriggerType | periodicOrExternal | Specifies whether periodic trigger or external trigger or bypass is selected.
IfxPsi5s_TimeBase | timeBaseSelect | Specifies the clock source for CTV as internal or external.

◆ IfxPsi5s_Psi5s_ReceiveControl

struct IfxPsi5s_Psi5s_ReceiveControl

Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers.

Definition at line 286 of file IfxPsi5s_Psi5s.h.

Data Fields
IfxPsi5s_CrcOrParity | crcOrParity[IFXPSI5S_NUM_SLOTS] | Specifies the crc or parity selection for the slots 0 to 5.
IfxPsi5s_FrameId | frameIdSelect | Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT.
IfxPsi5s_NumberExpectedFrames | numberOfFramesExpected | Specifies the number of psi5s frames expected.
uint32 | payloadLength[IFXPSI5S_NUM_SLOTS] | Specifies the payload length to be received for each slot.
boolean | timestampEnabled | Specifies whether the timestamp is enabled or not.
IfxPsi5s_TimestampRegister | timestampSelect | Specifies the timestamp register selection for pulses.
IfxPsi5s_TimestampTrigger | timestampTriggerSelect | Specifies the timestamp register selection for pulses.
IfxPsi5s_UartFrameCount | uartFrameCount[IFXPSI5S_NUM_SLOTS] | Specifies the expected number of UART frames per packet frame for each slot.
IfxPsi5s_WatchdogTimerMode | watchdogTimerModeSelect | Specifies the watchdog timer restart is wrt frame or sync pulse reception.

◆ IfxPsi5s_Psi5s_ReceiveData

union IfxPsi5s_Psi5s_ReceiveData

"Received data" data structure

Definition at line 301 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveData:
[legend]
Data Fields
uint32 | rdr | received data with frame count
IfxPsi5s_Psi5s_ReceivedData | receivedData | Receive data structure with different segments of data.

◆ IfxPsi5s_Psi5s_ReceiveStatus

union IfxPsi5s_Psi5s_ReceiveStatus

Receiver status data structure.

Definition at line 309 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveStatus:
[legend]
Data Fields
uint32 | rds | received status data.
IfxPsi5s_Psi5s_ReceivedBits | receivedBits | Received individual bits.

◆ IfxPsi5s_Psi5s_ReceiveTimestamp

union IfxPsi5s_Psi5s_ReceiveTimestamp

Receiver timestamp data structure.

Definition at line 317 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ReceiveTimestamp:
[legend]
Data Fields
IfxPsi5s_Psi5s_Timestamp | timeStamp | Received timestamp contents structure.
uint32 | tsm | received timestamp along with frame count

◆ IfxPsi5s_Psi5s_TimeStampConfig

struct IfxPsi5s_Psi5s_TimeStampConfig

Timestamp configuration data structure.

Definition at line 325 of file IfxPsi5s_Psi5s.h.

Data Fields
IfxPsi5s_Trigger | externalTimeBaseSelect | Specifies the clock base for counter CTS in the case of external.
IfxPsi5s_TimeBase | timeBaseSelect | Specifies the clock source for CTS as internal or external.

◆ IfxPsi5s_Psi5s_TransmitControl

struct IfxPsi5s_Psi5s_TransmitControl

Transmit control configuration structure.

Definition at line 333 of file IfxPsi5s_Psi5s.h.

Data Fields
boolean | bitStuffControl | Specifies whether the bit stuffing is turned on or not.
boolean | crcGenerationControl | Specifies whether the crc generation is turned on or not.
IfxPsi5s_EnhancedProtocol | enhancedProtocolSelection | Specifies whether the enhanced protocol is selected or not.
uint32 | payloadLength | Specifies the payload length to be sent.
boolean | startSequenceGenerationControl | Specifies whether the start sequence generation is turned on or not.

◆ IfxPsi5s_Psi5s_Channel

struct IfxPsi5s_Psi5s_Channel

Channel handle data structure.

Definition at line 348 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Channel:
[legend]
Data Fields
IfxPsi5s_ChannelId | channelId | Specifies the channel index.
IfxPsi5s_Psi5s * | module | The PSI5S handle structure.

◆ IfxPsi5s_Psi5s_ChannelConfig

struct IfxPsi5s_Psi5s_ChannelConfig

Channel configuration structure.

Definition at line 356 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_ChannelConfig:
[legend]
Data Fields
IfxPsi5s_ChannelId | channelId | Specifies the channel index.
IfxPsi5s_Psi5s_ChannelTrigger | channelTrigger | Specifies the configuration for channel trigger.
IFX_CONST IfxPsi5s_Psi5s * | module | Specifies pointer to the IfxPsi5s_Psi5s module handle.
IfxPsi5s_Psi5s_PulseGeneration | pulseGeneration | Specifies the configuration for sync pulse generation.
IfxPsi5s_Psi5s_ReceiveControl | receiveControl | Specifies the configuration for reception.
IfxPsi5s_Psi5s_TransmitControl | sendControl | Specifies the configuration for transmission.
uint32 | watchdogTimerLimit | Specifies the watchdog timer limit for each of the slots 0 to 6.

◆ IfxPsi5s_Psi5s_Config

struct IfxPsi5s_Psi5s_Config

PSI5S module configuration structure.

Definition at line 369 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Config:
[legend]
Data Fields
IfxPsi5s_Psi5s_AscConfig | ascConfig | Specifies the configuration for ASC.
IfxPsi5s_Psi5s_Clock | fracDiv | Specifies fractionally divided clock properties.
IfxPsi5s_Psi5s_GlobalControlConfig | globalControlConfig | Specifies the global control configuration.
Ifx_PSI5S * | module | Specifies the pointer to the PSI5S module registers.
IFX_CONST IfxPsi5s_Psi5s_Pins * | pins | structure for PSI5S pin configuration
IfxPsi5s_Psi5s_Clock | timestampClock | Specifies the time stamp clock properties.
IfxPsi5s_Psi5s_TimeStampConfig | timestampCounterA | Specifies the time stamp counter A properties.
IfxPsi5s_Psi5s_TimeStampConfig | timestampCounterB | Specifies the time stamp counter B properties.

◆ IfxPsi5s_Psi5s_Frame

struct IfxPsi5s_Psi5s_Frame

Psi5s frame data structure.

Definition at line 383 of file IfxPsi5s_Psi5s.h.

Collaboration diagram for IfxPsi5s_Psi5s_Frame:
[legend]
Data Fields
IfxPsi5s_Psi5s_ReceiveData | data | Received data.
IfxPsi5s_Psi5s_ReceiveStatus | status | Receiver status.
IfxPsi5s_Psi5s_ReceiveTimestamp | timestamp | Receiver timestamp.


iLLD_TC26B: Module Initialise Functions

Functions
Module Initialise Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Module Initialise Functions:

Functions

IFX_EXTERN void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_deInitModule()

IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule ( IfxPsi5s_Psi5s * psi5s )

De-initialise the PSI5S module.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Definition at line 65 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initModule()

IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | const IfxPsi5s_Psi5s_Config * | config
 | ) |  |

Initialise the PSI5S with the supplied configureation.

Parameters
psi5s | pointer to the PSI5S module
config | pointer to the PSI5S configuration
Returns
TRUE if valid otherwise FALSE

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 252 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initModuleConfig()

IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig | ( | IfxPsi5s_Psi5s_Config * | config,
 |  | Ifx_PSI5S * | psi5s
 | ) |  |

Initialise buffer with default PSI5S configuration.

Parameters
config | pointer to the PSI5S module configuration buffer
psi5s | pointer to the PSI5S register space
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 370 of file IfxPsi5s_Psi5s.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxPsi5s_Psi5s_enableAscReceiver (IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannels (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_startAscTransactions (IfxPsi5s_Psi5s *psi5s)
Start ASC transactions. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_enableAscReceiver()

IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver ( IfxPsi5s_Psi5s * psi5s )

Enable ASC interface receiver.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 556 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_enableDisableChannels()

IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Access function to enable/disable any combination of channels selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S module
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 568 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters()

IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Access function to enable/disable any combination of channel trigger counters selected by mask parameter.

Parameters
psi5s | pointer to the PSI5S module
channels | specifies the channel trigger counters which should be enabled/disabled
mask | specifies the channel trigger counters which should be modified
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 562 of file IfxPsi5s_Psi5s.h.

◆ IfxPsi5s_Psi5s_initChannel()

IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | const IfxPsi5s_Psi5s_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the PSI5S channel
config | pointer to the PSI5S channel configuration
Returns
TRUE on success & FALSE if configuration not valid (e.g. missing resource)

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 105 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_initChannelConfig()

IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig | ( | IfxPsi5s_Psi5s_ChannelConfig * | config,
 |  | IfxPsi5s_Psi5s * | psi5s
 | ) |  |

Initialise buffer with default channel configuration.

Parameters
config | pointer to the PSI5S channel configuration
psi5s | pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 195 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_readFrame()

IFX_EXTERN void IfxPsi5s_Psi5s_readFrame | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | IfxPsi5s_Psi5s_Frame * | frame
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
channel | pointer to the PSI5S module
frame | pointer to the PSI5S frame buffer
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 520 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_sendChannelData()

IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData | ( | IfxPsi5s_Psi5s_Channel * | channel,
 |  | uint32 | data
 | ) |  |

Transmit the data through the channel.

Parameters
channel | pointer to the PSI5S channel
data | data to be sent
Returns
TRUE if Sends data otherwise FALSE

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 547 of file IfxPsi5s_Psi5s.c.

◆ IfxPsi5s_Psi5s_startAscTransactions()

IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions ( IfxPsi5s_Psi5s * psi5s )

Start ASC transactions.

Parameters
psi5s pointer to the PSI5S module
Returns
None

Usage Example: How to use the PSI5S PSI5S Interface driver?

Definition at line 574 of file IfxPsi5s_Psi5s.h.


iLLD_TC26B: Utility Functions

Functions
Utility Functions
iLLD » PSI5S » PSI5S
Collaboration diagram for Utility Functions:

Functions

IFX_STATIC uint32 | IfxPsi5s_Psi5s_getFracDivClock (Ifx_PSI5S *psi5s)
get the fracDiv clock frequency More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_initializeClock (Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock. More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_setBaudrate (Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...

Detailed Description

Function Documentation

◆ IfxPsi5s_Psi5s_enableModule()

IFX_EXTERN void IfxPsi5s_Psi5s_enableModule ( Ifx_PSI5S * psi5s )

Enable PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S register space
Returns
None

Definition at line 72 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_Psi5s_getFracDivClock()

IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock ( Ifx_PSI5S * psi5s )

get the fracDiv clock frequency

Parameters
psi5s Pointer to the base of PSI5S register space
Returns
Returns the configured fracDiv psi5s clock frequency in Hz.

Definition at line 78 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initializeClock().

◆ IfxPsi5s_Psi5s_initializeClock()

IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock | ( | Ifx_PSI5S * | psi5s,
 |  | const IfxPsi5s_Psi5s_Clock * | clock
 | ) |  |

Configure the fracDiv clock.

Parameters
psi5s | Pointer to the base of PSI5S register space
clock | Specifies the required clock frequency in Hz.
Returns
Returns the configured clock frequency in Hz.

Definition at line 413 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().

◆ IfxPsi5s_Psi5s_resetModule()

IFX_EXTERN void IfxPsi5s_Psi5s_resetModule ( Ifx_PSI5S * psi5s )

Reset PSI5S kernel.

Parameters
psi5s pointer to the base of PSI5S registers
Returns
None

Definition at line 530 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_deInitModule().

◆ IfxPsi5s_Psi5s_setBaudrate()

IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate | ( | Ifx_PSI5S * | psi5s,
 |  | uint32 | baudrate,
 |  | IfxPsi5s_Psi5s_AscConfig * | ascConfig
 | ) |  |

Configure the baudrate at the ASC interface.

Parameters
psi5s | Pointer to the base of PSI5S register space
baudrate | Frequency Specifies the required baudrate frequency in Hz.
ascConfig | pointer to the configuration structure for ASC
Returns
Returns the configured baudrate frequency in Hz.

Definition at line 562 of file IfxPsi5s_Psi5s.c.

Referenced by IfxPsi5s_Psi5s_initModule().


iLLD_TC26B: Interrupt configuration Function

Interrupt configuration Function
iLLD » PSI5S » PSI5S
Collaboration diagram for Interrupt configuration Function:


iLLD_TC26B: IfxPsi5s_cfg.h File Reference

  • _Impl
Macros
IfxPsi5s_cfg.h File Reference
iLLD » PSI5S

PSI5S on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXPSI5S_NUM_CHANNELS 8
#define | IFXPSI5S_STEP_RANGE 1024
#define | IFXPSI5S_NUM_WDTS 7
#define | IFXPSI5S_NUM_SLOTS 6
#define | IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)
#define | IFXPSI5S_ENABLE_CHANNEL (1 << 16)
#define | IFXPSI5S_BG_RANGE 8192
#define | IFXPSI5S_FDV_RANGE 2048
#define | IFXPSI5S_BAUDRATE_1562500 1562500
#define | IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16
//0x00FF0000 More...
#define | IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8
#define | IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000
#define | IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000
#define | IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000
#define | IFXPSI5S_NUM_MODULES (1)

Detailed Description

PSI5S on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5s_cfg.h.

Macro Definition Documentation

◆ IFXPSI5S_BAUDRATE_1562500

#define IFXPSI5S_BAUDRATE_1562500 1562500

Definition at line 59 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_initModuleConfig().

◆ IFXPSI5S_BG_RANGE

#define IFXPSI5S_BG_RANGE 8192

Definition at line 55 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_setBaudrate().

◆ IFXPSI5S_DEFAULT_FASTCLOCK_FREQ

#define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000

Definition at line 69 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ

#define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000

Definition at line 67 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_DEFAULT_TIMESTAMP_FREQ

#define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000

Definition at line 71 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_ENABLE_CHANNEL

#define IFXPSI5S_ENABLE_CHANNEL (1 << 16)

Definition at line 53 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_ENABLE_CHANNELTRIGGER

#define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)

Definition at line 51 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_FDV_RANGE

#define IFXPSI5S_FDV_RANGE 2048

Definition at line 57 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_setBaudrate().

◆ IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK

#define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8

Definition at line 65 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_enableDisableChannelTriggerCounters().

◆ IFXPSI5S_GCR_CHANNELS_ENABLE_MASK

#define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16

//0x00FF0000

Definition at line 63 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_enableDisableChannels().

◆ IFXPSI5S_NUM_CHANNELS

#define IFXPSI5S_NUM_CHANNELS 8

Definition at line 43 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_MODULES

#define IFXPSI5S_NUM_MODULES (1)

Definition at line 73 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_SLOTS

#define IFXPSI5S_NUM_SLOTS 6

Definition at line 49 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_NUM_WDTS

#define IFXPSI5S_NUM_WDTS 7

Definition at line 47 of file IfxPsi5s_cfg.h.

◆ IFXPSI5S_STEP_RANGE

#define IFXPSI5S_STEP_RANGE 1024

Definition at line 45 of file IfxPsi5s_cfg.h.

Referenced by IfxPsi5s_Psi5s_getFracDivClock(), and IfxPsi5s_Psi5s_initializeClock().


iLLD_TC26B: IfxPsi5s_PinMap.c File Reference

  • _PinMap
Variables
IfxPsi5s_PinMap.c File Reference
iLLD » PSI5S

PSI5S I/O map. More...

#include "IfxPsi5s_PinMap.h"
Include dependency graph for IfxPsi5s_PinMap.c:

Go to the source code of this file.

Variables

IfxPsi5s_Clk_Out | IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4}
IfxPsi5s_Clk_Out | IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5}
IfxPsi5s_Rx_In | IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a}
IfxPsi5s_Rx_In | IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b}
IfxPsi5s_Rx_In | IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2}
IfxPsi5s_Tx_Out | IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7}
const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]

Detailed Description

PSI5S I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5s_PinMap.c.

Variable Documentation

◆ IfxPsi5s_Clk_Out_pinTable

const IfxPsi5s_Clk_Out* IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_CLK_P02_4_OUT,
&IfxPsi5s_CLK_P33_10_OUT
}
}
IfxPsi5s_CLK_P33_10_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
Definition: IfxPsi5s_PinMap.c:29
IfxPsi5s_CLK_P02_4_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
Definition: IfxPsi5s_PinMap.c:28

Definition at line 38 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_CLK_P02_4_OUT

IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4}

Definition at line 28 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_CLK_P33_10_OUT

IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5}

Definition at line 29 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_Rx_In_pinTable

const IfxPsi5s_Rx_In* IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_RXA_P00_3_IN,
&IfxPsi5s_RXB_P02_5_IN,
&IfxPsi5s_RXC_P33_5_IN
}
}
IfxPsi5s_RXC_P33_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
Definition: IfxPsi5s_PinMap.c:32
IfxPsi5s_RXA_P00_3_IN
IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
Definition: IfxPsi5s_PinMap.c:30
IfxPsi5s_RXB_P02_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
Definition: IfxPsi5s_PinMap.c:31

Definition at line 45 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXA_P00_3_IN

IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a}

Definition at line 30 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXB_P02_5_IN

IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b}

Definition at line 31 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_RXC_P33_5_IN

IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 32 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_Tx_Out_pinTable

const IfxPsi5s_Tx_Out* IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxPsi5s_TX_P00_4_OUT,
&IfxPsi5s_TX_P02_6_OUT,
&IfxPsi5s_TX_P33_6_OUT
}
}
IfxPsi5s_TX_P33_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
Definition: IfxPsi5s_PinMap.c:35
IfxPsi5s_TX_P02_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
Definition: IfxPsi5s_PinMap.c:34
IfxPsi5s_TX_P00_4_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
Definition: IfxPsi5s_PinMap.c:33

Definition at line 53 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P00_4_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2}

Definition at line 33 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P02_6_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2}

Definition at line 34 of file IfxPsi5s_PinMap.c.

◆ IfxPsi5s_TX_P33_6_OUT

IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7}

Definition at line 35 of file IfxPsi5s_PinMap.c.


iLLD_TC26B: IfxPsi5s_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxPsi5s_PinMap.h File Reference
iLLD » PSI5S

PSI5S I/O map. More...

#include <IfxPsi5s_reg.h>
#include <_Impl/IfxPsi5s_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxPsi5s_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5s_Rx_In
RX pin mapping structure. More...
struct | IfxPsi5s_Tx_Out
TX pin mapping structure. More...
struct | IfxPsi5s_Clk_Out
CLK pin mapping structure. More...

Macros

#define | IFXPSI5S_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
#define | IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
#define | IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S_CLK: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S_CLK: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
PSI5S_RXA: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
PSI5S_RXB: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
PSI5S_RXC: PSI5-S input. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
PSI5S_TX: PSI5-S output. More...
IFX_EXTERN const IfxPsi5s_Clk_Out * | IfxPsi5s_Clk_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table. More...
IFX_EXTERN const IfxPsi5s_Rx_In * | IfxPsi5s_Rx_In_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table. More...
IFX_EXTERN const IfxPsi5s_Tx_Out * | IfxPsi5s_Tx_Out_pinTable [IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table. More...

Detailed Description

PSI5S I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5s_PinMap.h.


iLLD_TC26B: IfxPsi5s_Psi5s.h File Reference

  • Psi5s
  • Psi5s
Data Structures | Functions
IfxPsi5s_Psi5s.h File Reference
iLLD » PSI5S

PSI5S PSI5S details. More...

#include "Psi5s/Std/IfxPsi5s.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxPsi5s_Psi5s.h:

Go to the source code of this file.

Data Structures

struct | IfxPsi5s_Psi5s_Clock
Clock configuration data structure. More...
struct | IfxPsi5s_Psi5s_ReceivedBits
Received individual bits. More...
struct | IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data. More...
struct | IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure. More...
struct | IfxPsi5s_Psi5s
PSI5S handle data structure. More...
struct | IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure More...
struct | IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure. More...
struct | IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration. More...
struct | IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure. More...
struct | IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers. More...
union | IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure More...
union | IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure. More...
union | IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure. More...
struct | IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure. More...
struct | IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure. More...
struct | IfxPsi5s_Psi5s_Channel
Channel handle data structure. More...
struct | IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure. More...
struct | IfxPsi5s_Psi5s_Config
PSI5S module configuration structure. More...
struct | IfxPsi5s_Psi5s_Frame
Psi5s frame data structure. More...

Functions

IFX_EXTERN void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableAscReceiver (IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_enableDisableChannels (IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter. More...
IFX_INLINE void | IfxPsi5s_Psi5s_startAscTransactions (IfxPsi5s_Psi5s *psi5s)
Start ASC transactions. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
IFX_EXTERN void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...
IFX_INLINE boolean | IfxPsi5s_Psi5s_getReadFrameStatus (IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...

Detailed Description

PSI5S PSI5S details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5s_Psi5s.h.

Function Documentation

◆ IfxPsi5s_Psi5s_getReadFrameStatus()

IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus | ( | IfxPsi5s_Psi5s * | psi5s,
 |  | IfxPsi5s_ChannelId | channelId
 | ) |  |

Get the received psi5s frame for the channel.

Parameters
psi5s | pointer to the PSI5S module
channelId | specifies channelID
Returns
return the status of Frame

Definition at line 580 of file IfxPsi5s_Psi5s.h.


iLLD_TC26B: IfxPsi5s.h File Reference

  • Psi5s
  • Std
Enumerations | Functions
IfxPsi5s.h File Reference
iLLD » PSI5S

PSI5S basic functionality. More...

#include "_Impl/IfxPsi5s_cfg.h"
#include "_PinMap/IfxPsi5s_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxPsi5s_bf.h"
#include "IfxPsi5s_reg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxPsi5s.h:

Go to the source code of this file.

Enumerations

enum IfxPsi5s_AlternateInput {
IfxPsi5s_AlternateInput_0 = 0,
IfxPsi5s_AlternateInput_1,
IfxPsi5s_AlternateInput_2,
IfxPsi5s_AlternateInput_3
}
MODULE_PSI5S.IOCR.ALTI:Alternate input. More...
enum IfxPsi5s_AscBaudratePrescalar {
IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0,
IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1
}
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select. More...
enum IfxPsi5s_AscMode {
IfxPsi5s_AscMode_sync = 0,
IfxPsi5s_AscMode_async_8bitData = 1,
IfxPsi5s_AscMode_async_7bitDataWithParity = 3,
IfxPsi5s_AscMode_async_9bitData = 4,
IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5,
IfxPsi5s_AscMode_async_8bitDataWithParity = 7
}
MODULE_PSI5S.CON.M:ASC mode of operation. More...
enum IfxPsi5s_AscStopBits {
IfxPsi5s_AscStopBits_1 = 0,
IfxPsi5s_AscStopBits_2
}
MODULE_PSI5S.CON.STP: Number of stop bits. More...
enum IfxPsi5s_ChannelId {
IfxPsi5s_ChannelId_0 = 0,
IfxPsi5s_ChannelId_1,
IfxPsi5s_ChannelId_2,
IfxPsi5s_ChannelId_3,
IfxPsi5s_ChannelId_4,
IfxPsi5s_ChannelId_5,
IfxPsi5s_ChannelId_6,
IfxPsi5s_ChannelId_7,
IfxPsi5s_ChannelId_none = -1
}
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID. More...
enum IfxPsi5s_ClockType {
IfxPsi5s_ClockType_fracDiv = 0,
IfxPsi5s_ClockType_timeStamp = 1,
IfxPsi5s_ClockType_ascFracDiv = 2,
IfxPsi5s_ClockType_ascOutput = 3
}
Clock Selection. More...
enum IfxPsi5s_CrcOrParity {
IfxPsi5s_CrcOrParity_parity = 0,
IfxPsi5s_CrcOrParity_crc = 1
}
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity. More...
enum IfxPsi5s_DividerMode {
IfxPsi5s_DividerMode_spb = 0,
IfxPsi5s_DividerMode_normal = 1,
IfxPsi5s_DividerMode_fractional = 2,
IfxPsi5s_DividerMode_off = 3
}
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode. More...
enum IfxPsi5s_EnhancedProtocol {
IfxPsi5s_EnhancedProtocol_toothGapMethod = 0,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1,
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3
}
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types. More...
enum IfxPsi5s_FrameId {
IfxPsi5s_FrameId_frameHeader = 0,
IfxPsi5s_FrameId_rollingNumber = 1
}
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation. More...
enum IfxPsi5s_IdleTime {
IfxPsi5s_IdleTime_1 = 0,
IfxPsi5s_IdleTime_2,
IfxPsi5s_IdleTime_3,
IfxPsi5s_IdleTime_4,
IfxPsi5s_IdleTime_5,
IfxPsi5s_IdleTime_6,
IfxPsi5s_IdleTime_7,
IfxPsi5s_IdleTime_8,
IfxPsi5s_IdleTime_9,
IfxPsi5s_IdleTime_10,
IfxPsi5s_IdleTime_11,
IfxPsi5s_IdleTime_12,
IfxPsi5s_IdleTime_13,
IfxPsi5s_IdleTime_14,
IfxPsi5s_IdleTime_15,
IfxPsi5s_IdleTime_16
}
MODULE_PSI5S.GCR.IDT:Idle time bit count. More...
enum IfxPsi5s_LoopBackMode {
IfxPsi5s_LoopBackMode_disable = 0,
IfxPsi5s_LoopBackMode_enable = 1
}
Enable/Disable Loop back Mode. More...
enum IfxPsi5s_MessagingBits {
IfxPsi5s_MessagingBits_absent = 0,
IfxPsi5s_MessagingBits_present = 1
}
Messaging bits presence. More...
enum IfxPsi5s_NumberExpectedFrames {
IfxPsi5s_NumberExpectedFrames_1 = 1,
IfxPsi5s_NumberExpectedFrames_2,
IfxPsi5s_NumberExpectedFrames_3,
IfxPsi5s_NumberExpectedFrames_4,
IfxPsi5s_NumberExpectedFrames_5,
IfxPsi5s_NumberExpectedFrames_6
}
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames. More...
enum IfxPsi5s_SleepMode {
IfxPsi5s_SleepMode_enable = 0,
IfxPsi5s_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_PSI5S.CLC.B.EDIS. More...
enum IfxPsi5s_SuspendMode {
IfxPsi5s_SuspendMode_none = 0,
IfxPsi5s_SuspendMode_hard = 1,
IfxPsi5s_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxPsi5s_TimeBase {
IfxPsi5s_TimeBase_internal = 0,
IfxPsi5s_TimeBase_external = 1
}
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base. More...
enum IfxPsi5s_TimestampRegister {
IfxPsi5s_TimestampRegister_a = 0,
IfxPsi5s_TimestampRegister_b = 1
}
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register. More...
enum IfxPsi5s_TimestampTrigger {
IfxPsi5s_TimestampTrigger_syncPulse = 0,
IfxPsi5s_TimestampTrigger_frame = 1
}
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger. More...
enum IfxPsi5s_Trigger {
IfxPsi5s_Trigger_0 = 0,
IfxPsi5s_Trigger_1,
IfxPsi5s_Trigger_2,
IfxPsi5s_Trigger_3,
IfxPsi5s_Trigger_4,
IfxPsi5s_Trigger_5,
IfxPsi5s_Trigger_6,
IfxPsi5s_Trigger_7
}
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id. More...
enum IfxPsi5s_TriggerType {
IfxPsi5s_TriggerType_periodic = 0,
IfxPsi5s_TriggerType_external = 1
}
Trigger type defined in. More...
enum IfxPsi5s_UartFrameCount {
IfxPsi5s_UartFrameCount_3 = 0,
IfxPsi5s_UartFrameCount_4,
IfxPsi5s_UartFrameCount_5,
IfxPsi5s_UartFrameCount_6
}
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count. More...
enum IfxPsi5s_WatchdogTimerMode {
IfxPsi5s_WatchdogTimerMode_frame = 0,
IfxPsi5s_WatchdogTimerMode_syncPulse = 1
}
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode. More...

Functions

IFX_EXTERN void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
IFX_EXTERN void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
IFX_EXTERN void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
IFX_EXTERN void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)
IFX_INLINE void | IfxPsi5s_initClkPin (const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output. More...
IFX_INLINE void | IfxPsi5s_initRxPin (const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input. More...
IFX_INLINE void | IfxPsi5s_initTxPin (const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output. More...
IFX_INLINE void | IfxPsi5s_setRxInput (Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal. More...
IFX_INLINE boolean | IfxPsi5s_isModuleSuspended (Ifx_PSI5S *psi5s)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxPsi5s_setSleepMode (Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode More...
IFX_INLINE void | IfxPsi5s_setSuspendMode (Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
IFX_EXTERN boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
IFX_EXTERN boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
IFX_EXTERN void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...

Detailed Description

PSI5S basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5s.h.


iLLD_TC26B: QSPI

Modules | Files
QSPI
iLLD
Collaboration diagram for QSPI:

Modules

Implementation
Standard Driver
QSPI Pin Mapping
How to use the SPI Master Interface driver?
SPI Master Driver
How to use the SPI Slave Interface driver?
SPI Slave Driver

Files

file | IfxQspi_cfg.h
QSPI on-chip implementation data.
file | IfxQspi_PinMap.c
QSPI I/O map.
file | IfxQspi_PinMap.h
QSPI I/O map.
file | IfxQspi_SpiMaster.h
QSPI SPIMASTER details.
file | IfxQspi_SpiSlave.h
QSPI SPISLAVE details.
file | IfxQspi.h
QSPI basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » QSPI
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
iLLD » QSPI » Implementation
Collaboration diagram for Enumerations:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » QSPI
Collaboration diagram for Standard Driver:

Modules

Enumerations
Operative Functions
Support Functions
Interrupt Functions
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » QSPI » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxQspi_ChannelId {
IfxQspi_ChannelId_0,
IfxQspi_ChannelId_1,
IfxQspi_ChannelId_2,
IfxQspi_ChannelId_3,
IfxQspi_ChannelId_4,
IfxQspi_ChannelId_5,
IfxQspi_ChannelId_6,
IfxQspi_ChannelId_7,
IfxQspi_ChannelId_8,
IfxQspi_ChannelId_9,
IfxQspi_ChannelId_10,
IfxQspi_ChannelId_11,
IfxQspi_ChannelId_12,
IfxQspi_ChannelId_13,
IfxQspi_ChannelId_14
}
QSPI channel Number (BACON.CS) More...
enum IfxQspi_DataLengthUnit {
IfxQspi_DataLengthUnit_bit = 0,
IfxQspi_DataLengthUnit_byte = 1
}
Data length unit of a frame (BACON.BYTE) More...
enum IfxQspi_Error {
IfxQspi_Error_none = 0,
IfxQspi_Error_parity = 1,
IfxQspi_Error_configuration = 2,
IfxQspi_Error_baudrate = 4,
IfxQspi_Error_txfifoOverflow = 8,
IfxQspi_Error_txfifoUnderflow = 16,
IfxQspi_Error_rxfifoOverflow = 32,
IfxQspi_Error_rxfifoUnderflow = 64,
IfxQspi_Error_expectTimeout = 128,
IfxQspi_Error_slsiMisplacedInactivation = 256
}
QSPI Error Flags (STATUS.ERRORFLAGS) More...
enum IfxQspi_ExpectTimeout {
IfxQspi_ExpectTimeout_64 = 0,
IfxQspi_ExpectTimeout_128 = 1,
IfxQspi_ExpectTimeout_256 = 2,
IfxQspi_ExpectTimeout_512 = 3,
IfxQspi_ExpectTimeout_1024 = 4,
IfxQspi_ExpectTimeout_2048 = 5,
IfxQspi_ExpectTimeout_4096 = 6,
IfxQspi_ExpectTimeout_8192 = 7,
IfxQspi_ExpectTimeout_16384 = 8,
IfxQspi_ExpectTimeout_32768 = 9,
IfxQspi_ExpectTimeout_65536 = 10,
IfxQspi_ExpectTimeout_131072 = 11,
IfxQspi_ExpectTimeout_262144 = 12,
IfxQspi_ExpectTimeout_524288 = 13,
IfxQspi_ExpectTimeout_1048576 = 14,
IfxQspi_ExpectTimeout_2097152 = 15
}
Frame Expect phase time out value. More...
enum IfxQspi_Mode {
IfxQspi_Mode_master = 0,
IfxQspi_Mode_pwmOverQspi = 1,
IfxQspi_Mode_slave = 2
}
QSPI controller mode (GLOBALCON.MODE) More...
enum IfxQspi_PauseRunTransition {
IfxQspi_PauseRunTransition_pause = 0,
IfxQspi_PauseRunTransition_run = 1
}
Request between pause and Run transition. More...
enum IfxQspi_Phase {
IfxQspi_Phase_wait = 0,
IfxQspi_Phase_idleA = 1,
IfxQspi_Phase_idleB = 2,
IfxQspi_Phase_lead = 3,
IfxQspi_Phase_data = 4,
IfxQspi_Phase_trail = 5,
IfxQspi_Phase_expect = 6,
IfxQspi_Phase_leadStrobe = 7,
IfxQspi_Phase_trailStrobe = 8
}
QSPI frame phase (STATUS.PHASE) More...
enum IfxQspi_PhaseTransitionEvent {
IfxQspi_PhaseTransitionEvent_endOfWait = 0,
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1,
IfxQspi_PhaseTransitionEvent_startOfFrame = 2,
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3,
IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4,
IfxQspi_PhaseTransitionEvent_endOfFrame = 5,
IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6,
IfxQspi_PhaseTransitionEvent_endOfExpect = 7
}
Phase Transition Event. More...
enum IfxQspi_Reset {
IfxQspi_Reset_none = 0,
IfxQspi_Reset_stateMachineAndFifo = 7,
IfxQspi_Reset_kernel = 15
}
Reset Request (GLOBALCON.RESETS) More...
enum IfxQspi_RxFifoInt {
IfxQspi_RxFifoInt_0,
IfxQspi_RxFifoInt_1,
IfxQspi_RxFifoInt_2,
IfxQspi_RxFifoInt_3
}
Receive Fifo Interrupt Threshold. More...
enum IfxQspi_SleepMode {
IfxQspi_SleepMode_enable = 0,
IfxQspi_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS. More...
enum IfxQspi_StrobeDelay {
IfxQspi_StrobeDelay_1,
IfxQspi_StrobeDelay_2,
IfxQspi_StrobeDelay_3,
IfxQspi_StrobeDelay_4,
IfxQspi_StrobeDelay_5,
IfxQspi_StrobeDelay_6,
IfxQspi_StrobeDelay_7,
IfxQspi_StrobeDelay_8,
IfxQspi_StrobeDelay_9,
IfxQspi_StrobeDelay_10,
IfxQspi_StrobeDelay_11,
IfxQspi_StrobeDelay_12,
IfxQspi_StrobeDelay_13,
IfxQspi_StrobeDelay_14,
IfxQspi_StrobeDelay_15,
IfxQspi_StrobeDelay_16,
IfxQspi_StrobeDelay_17,
IfxQspi_StrobeDelay_18,
IfxQspi_StrobeDelay_19,
IfxQspi_StrobeDelay_20,
IfxQspi_StrobeDelay_21,
IfxQspi_StrobeDelay_22,
IfxQspi_StrobeDelay_23,
IfxQspi_StrobeDelay_24,
IfxQspi_StrobeDelay_25,
IfxQspi_StrobeDelay_26,
IfxQspi_StrobeDelay_27,
IfxQspi_StrobeDelay_28,
IfxQspi_StrobeDelay_29,
IfxQspi_StrobeDelay_30,
IfxQspi_StrobeDelay_31,
IfxQspi_StrobeDelay_32
}
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE) More...
enum IfxQspi_TxFifoInt {
IfxQspi_TxFifoInt_1,
IfxQspi_TxFifoInt_2,
IfxQspi_TxFifoInt_3,
IfxQspi_TxFifoInt_4
}
Transmit Fifo Interrupt Threshold. More...

Detailed Description

Enumeration Type Documentation

◆ IfxQspi_ChannelId

enum IfxQspi_ChannelId

QSPI channel Number (BACON.CS)

Enumerator
IfxQspi_ChannelId_0 | Channel #0.
IfxQspi_ChannelId_1 | Channel #1.
IfxQspi_ChannelId_2 | Channel #2.
IfxQspi_ChannelId_3 | Channel #3.
IfxQspi_ChannelId_4 | Channel #4.
IfxQspi_ChannelId_5 | Channel #5.
IfxQspi_ChannelId_6 | Channel #6.
IfxQspi_ChannelId_7 | Channel #7.
IfxQspi_ChannelId_8 | Channel #8.
IfxQspi_ChannelId_9 | Channel #9.
IfxQspi_ChannelId_10 | Channel #10.
IfxQspi_ChannelId_11 | Channel #11.
IfxQspi_ChannelId_12 | Channel #12.
IfxQspi_ChannelId_13 | Channel #13.
IfxQspi_ChannelId_14 | Channel #14.

Definition at line 75 of file IfxQspi.h.

◆ IfxQspi_DataLengthUnit

enum IfxQspi_DataLengthUnit

Data length unit of a frame (BACON.BYTE)

Enumerator
IfxQspi_DataLengthUnit_bit | Data Length in Bits.
IfxQspi_DataLengthUnit_byte | Data length in Bytes.

Definition at line 96 of file IfxQspi.h.

◆ IfxQspi_Error

enum IfxQspi_Error

QSPI Error Flags (STATUS.ERRORFLAGS)

Enumerator
IfxQspi_Error_none | No Error.
IfxQspi_Error_parity | Parity Error.
IfxQspi_Error_configuration | Configuration Error.
IfxQspi_Error_baudrate | BaudRate Error.
IfxQspi_Error_txfifoOverflow | TX FIFO Overflow Error.
IfxQspi_Error_txfifoUnderflow | TX FIFO Underflow Error.
IfxQspi_Error_rxfifoOverflow | RX FIFO Overflow Error.
IfxQspi_Error_rxfifoUnderflow | RX FIFO Underflow Error.
IfxQspi_Error_expectTimeout | EXPECT Timeout Error.
IfxQspi_Error_slsiMisplacedInactivation | SLSI misplaced inactivation (slave mode)

Definition at line 104 of file IfxQspi.h.

◆ IfxQspi_ExpectTimeout

enum IfxQspi_ExpectTimeout

Frame Expect phase time out value.

Enumerator
IfxQspi_ExpectTimeout_64 | Expect phse time out 64.
IfxQspi_ExpectTimeout_128 | Expect phse time out 128.
IfxQspi_ExpectTimeout_256 | Expect phse time out 256.
IfxQspi_ExpectTimeout_512 | Expect phse time out 512.
IfxQspi_ExpectTimeout_1024 | Expect phse time out 1024.
IfxQspi_ExpectTimeout_2048 | Expect phse time out 2048.
IfxQspi_ExpectTimeout_4096 | Expect phse time out 4096.
IfxQspi_ExpectTimeout_8192 | Expect phse time out 8192.
IfxQspi_ExpectTimeout_16384 | Expect phse time out 16384.
IfxQspi_ExpectTimeout_32768 | Expect phse time out 32768.
IfxQspi_ExpectTimeout_65536 | Expect phse time out 65536.
IfxQspi_ExpectTimeout_131072 | Expect phse time out 131072.
IfxQspi_ExpectTimeout_262144 | Expect phse time out 262144.
IfxQspi_ExpectTimeout_524288 | Expect phse time out 524288.
IfxQspi_ExpectTimeout_1048576 | Expect phse time out 1048576.
IfxQspi_ExpectTimeout_2097152 | Expect phse time out 2097152.

Definition at line 120 of file IfxQspi.h.

◆ IfxQspi_Mode

enum IfxQspi_Mode

QSPI controller mode (GLOBALCON.MODE)

Enumerator
IfxQspi_Mode_master | QSPI in "master" mode.
IfxQspi_Mode_pwmOverQspi | QSPI in "PWM over QSPI" mode.
IfxQspi_Mode_slave | QSPI in "slave" mode.

Definition at line 142 of file IfxQspi.h.

◆ IfxQspi_PauseRunTransition

enum IfxQspi_PauseRunTransition

Request between pause and Run transition.

Enumerator
IfxQspi_PauseRunTransition_pause | Request value for pause.
IfxQspi_PauseRunTransition_run | Request value for Run.

Definition at line 151 of file IfxQspi.h.

◆ IfxQspi_Phase

enum IfxQspi_Phase

QSPI frame phase (STATUS.PHASE)

Enumerator
IfxQspi_Phase_wait | Frame wait phase.
IfxQspi_Phase_idleA | Frame idleA phase.
IfxQspi_Phase_idleB | frame idleB phase
IfxQspi_Phase_lead | Frame lead phase.
IfxQspi_Phase_data | Frame data phase.
IfxQspi_Phase_trail | Frame trail phase.
IfxQspi_Phase_expect | Frame expect phase.
IfxQspi_Phase_leadStrobe | Frame leadstrobe phase.
IfxQspi_Phase_trailStrobe | Frame trailstrobe phase.

Definition at line 159 of file IfxQspi.h.

◆ IfxQspi_PhaseTransitionEvent

enum IfxQspi_PhaseTransitionEvent

Phase Transition Event.

Enumerator
IfxQspi_PhaseTransitionEvent_endOfWait | BUSY (end of WAIT phase)
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange | SCLKPC (serial clock polarity change)
IfxQspi_PhaseTransitionEvent_startOfFrame | SOF (Start Of Frame )
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied | TBE (Transmit Buffer Emptied)
IfxQspi_PhaseTransitionEvent_receiveBufferFilled | RBF (Receive Buffer Filled)
IfxQspi_PhaseTransitionEvent_endOfFrame | EOF (End of Frame)
IfxQspi_PhaseTransitionEvent_dataNotAvailable | DNA (Data not Available = Start of Expect)
IfxQspi_PhaseTransitionEvent_endOfExpect | CONT (End of EXPECT phase)

Definition at line 174 of file IfxQspi.h.

◆ IfxQspi_Reset

enum IfxQspi_Reset

Reset Request (GLOBALCON.RESETS)

Enumerator
IfxQspi_Reset_none | No Reset.
IfxQspi_Reset_stateMachineAndFifo | State Machine, TXFIFO and RXFIFO reset, registers not reseted.
IfxQspi_Reset_kernel | Kernel / Module Reset.

Definition at line 188 of file IfxQspi.h.

◆ IfxQspi_RxFifoInt

enum IfxQspi_RxFifoInt

Receive Fifo Interrupt Threshold.

Enumerator
IfxQspi_RxFifoInt_0 | RxFifo Interrupt Threshold #0.
IfxQspi_RxFifoInt_1 | RxFifo Interrupt Threshold #1.
IfxQspi_RxFifoInt_2 | RxFifo Interrupt Threshold #2.
IfxQspi_RxFifoInt_3 | RxFifo Interrupt Threshold #3.

Definition at line 197 of file IfxQspi.h.

◆ IfxQspi_SleepMode

enum IfxQspi_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS.

Enumerator
IfxQspi_SleepMode_enable | Sleep Mode enabled.
IfxQspi_SleepMode_disable | Sleep Mode disabled.

Definition at line 208 of file IfxQspi.h.

◆ IfxQspi_StrobeDelay

enum IfxQspi_StrobeDelay

STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)

Enumerator
IfxQspi_StrobeDelay_1 | SLSO delay 1 cycle(s)
IfxQspi_StrobeDelay_2 | SLSO delay 2 cycle(s)
IfxQspi_StrobeDelay_3 | SLSO delay 3 cycle(s)
IfxQspi_StrobeDelay_4 | SLSO delay 4 cycle(s)
IfxQspi_StrobeDelay_5 | SLSO delay 5 cycle(s)
IfxQspi_StrobeDelay_6 | SLSO delay 6 cycle(s)
IfxQspi_StrobeDelay_7 | SLSO delay 7 cycle(s)
IfxQspi_StrobeDelay_8 | SLSO delay 8 cycle(s)
IfxQspi_StrobeDelay_9 | SLSO delay 9 cycle(s)
IfxQspi_StrobeDelay_10 | SLSO delay 10 cycle(s)
IfxQspi_StrobeDelay_11 | SLSO delay 11 cycle(s)
IfxQspi_StrobeDelay_12 | SLSO delay 12 cycle(s)
IfxQspi_StrobeDelay_13 | SLSO delay 13 cycle(s)
IfxQspi_StrobeDelay_14 | SLSO delay 14 cycle(s)
IfxQspi_StrobeDelay_15 | SLSO delay 15 cycle(s)
IfxQspi_StrobeDelay_16 | SLSO delay 16 cycle(s)
IfxQspi_StrobeDelay_17 | SLSO delay 17 cycle(s)
IfxQspi_StrobeDelay_18 | SLSO delay 18 cycle(s)
IfxQspi_StrobeDelay_19 | SLSO delay 19 cycle(s)
IfxQspi_StrobeDelay_20 | SLSO delay 20 cycle(s)
IfxQspi_StrobeDelay_21 | SLSO delay 21 cycle(s)
IfxQspi_StrobeDelay_22 | SLSO delay 22 cycle(s)
IfxQspi_StrobeDelay_23 | SLSO delay 23 cycle(s)
IfxQspi_StrobeDelay_24 | SLSO delay 24 cycle(s)
IfxQspi_StrobeDelay_25 | SLSO delay 25 cycle(s)
IfxQspi_StrobeDelay_26 | SLSO delay 26 cycle(s)
IfxQspi_StrobeDelay_27 | SLSO delay 27 cycle(s)
IfxQspi_StrobeDelay_28 | SLSO delay 28 cycle(s)
IfxQspi_StrobeDelay_29 | SLSO delay 29 cycle(s)
IfxQspi_StrobeDelay_30 | SLSO delay 30 cycle(s)
IfxQspi_StrobeDelay_31 | SLSO delay 31 cycle(s)
IfxQspi_StrobeDelay_32 | SLSO delay 32 cycle(s)

Definition at line 216 of file IfxQspi.h.

◆ IfxQspi_TxFifoInt

enum IfxQspi_TxFifoInt

Transmit Fifo Interrupt Threshold.

Enumerator
IfxQspi_TxFifoInt_1 | TxFifo Interrupt Threshold #1.
IfxQspi_TxFifoInt_2 | TxFifo Interrupt Threshold #2.
IfxQspi_TxFifoInt_3 | TxFifo Interrupt Threshold #3.
IfxQspi_TxFifoInt_4 | TxFifo Interrupt Threshold #4.

Definition at line 254 of file IfxQspi.h.


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxQspi_clearAllEventFlags (Ifx_QSPI *qspi)
Clear ALL service requests. More...
IFX_INLINE void | IfxQspi_clearRxReq (Ifx_QSPI *qspi)
Clear RX service requests. More...
IFX_INLINE void | IfxQspi_clearTxReq (Ifx_QSPI *qspi)
Clear TX service requests. More...
IFX_INLINE void | IfxQspi_configPT1Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 ) More...
IFX_INLINE void | IfxQspi_configPT2Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event. More...
IFX_INLINE void | IfxQspi_enableLoopbackMode (Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode. More...
IFX_INLINE void | IfxQspi_enablePT1Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event More...
IFX_INLINE void | IfxQspi_enablePT2Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event More...
IFX_INLINE void | IfxQspi_enableUsrEvent (Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1) More...
IFX_INLINE uint16 | IfxQspi_getErrorFlags (Ifx_QSPI *qspi)
IFX_INLINE void | IfxQspi_pause (Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication. More...
IFX_INLINE uint32 | IfxQspi_readReceiveFifo (Ifx_QSPI *qspi)
Read the oldest data from RXFIFO. More...
IFX_INLINE void | IfxQspi_requestReset (Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module) More...
IFX_INLINE void | IfxQspi_run (Ifx_QSPI *qspi)
Request for QSPI in Run state. More...
IFX_INLINE void | IfxQspi_setReceiveFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeTransmitFifo (Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register. More...
IFX_INLINE boolean | IfxQspi_isModuleSuspended (Ifx_QSPI *qspi)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxQspi_setSuspendMode (Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
IFX_EXTERN void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_clearAllEventFlags()

IFX_INLINE void IfxQspi_clearAllEventFlags ( Ifx_QSPI * qspi )

Clear ALL service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 884 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_isrError(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_clearRxReq()

IFX_INLINE void IfxQspi_clearRxReq ( Ifx_QSPI * qspi )

Clear RX service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 890 of file IfxQspi.h.

◆ IfxQspi_clearTxReq()

IFX_INLINE void IfxQspi_clearTxReq ( Ifx_QSPI * qspi )

Clear TX service requests.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 896 of file IfxQspi.h.

◆ IfxQspi_configPT1Event()

IFX_INLINE void IfxQspi_configPT1Event | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_PhaseTransitionEvent | pt1Config
 | ) |  |

Configure PT1 event (also USR event depending if USREN=1 )

Parameters
qspi | Pointer to QSPI module registers
pt1Config | Phase Transition1 Event Config
Returns
None

Definition at line 902 of file IfxQspi.h.

◆ IfxQspi_configPT2Event()

IFX_INLINE void IfxQspi_configPT2Event | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_PhaseTransitionEvent | pt2Config
 | ) |  |

Configure PT2 event.

Parameters
qspi | Pointer to QSPI module registers
pt2Config | Phase Transition2 Event Config
Returns
None

Definition at line 908 of file IfxQspi.h.

◆ IfxQspi_enableLoopbackMode()

IFX_INLINE void IfxQspi_enableLoopbackMode | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

Enable/Disable Loopback mode.

Parameters
qspi | Pointer to QSPI module registers
enable | Enable / Disable loopback
Returns
None

Definition at line 914 of file IfxQspi.h.

◆ IfxQspi_enablePT1Event()

IFX_INLINE void IfxQspi_enablePT1Event | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable Phase Transition1 Event

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 922 of file IfxQspi.h.

◆ IfxQspi_enablePT2Event()

IFX_INLINE void IfxQspi_enablePT2Event | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable Phase Transition2 Event

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 928 of file IfxQspi.h.

◆ IfxQspi_enableUsrEvent()

IFX_INLINE void IfxQspi_enableUsrEvent | ( | Ifx_QSPI * | qspi,
 |  | boolean | enable
 | ) |  |

enable User Event (Event selected by PT1)

Parameters
qspi | Pointer to QSPI module registers
enable | Enable (1) / Disable (0)
Returns
None

Definition at line 934 of file IfxQspi.h.

◆ IfxQspi_getErrorFlags()

IFX_INLINE uint16 IfxQspi_getErrorFlags ( Ifx_QSPI * qspi )
Parameters
qspi Pointer to QSPI module registers
Returns
Error Flags

Definition at line 940 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrError(), and IfxQspi_SpiSlave_isrError().

◆ IfxQspi_isModuleSuspended()

IFX_INLINE boolean IfxQspi_isModuleSuspended ( Ifx_QSPI * qspi )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
qspi Pointer to QSPI module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 1229 of file IfxQspi.h.

◆ IfxQspi_pause()

IFX_INLINE void IfxQspi_pause ( Ifx_QSPI * qspi )

Request for Module in Pause state no interrupts no communication.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1080 of file IfxQspi.h.

◆ IfxQspi_read16()

IFX_EXTERN void IfxQspi_read16 | ( | Ifx_QSPI * | qspi,
 |  | uint16 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 16bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 294 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_read32()

IFX_EXTERN void IfxQspi_read32 | ( | Ifx_QSPI * | qspi,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 32bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 306 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_read8()

IFX_EXTERN void IfxQspi_read8 | ( | Ifx_QSPI * | qspi,
 |  | uint8 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Reads 8bit data from the Rx FIFO.

Parameters
qspi | Pointer to QSPI module registers
data | Received data will be copied into this array
count | Number of items to be received
Returns
None

Definition at line 318 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_readReceiveFifo ( Ifx_QSPI * qspi )

Read the oldest data from RXFIFO.

Parameters
qspi Pointer to QSPI module registers

Definition at line 1096 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_readReceiveFifo(), IfxQspi_SpiSlave_read(), and IfxQspi_SpiSlave_readReceiveFifo().

◆ IfxQspi_requestReset()

IFX_INLINE void IfxQspi_requestReset | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_Reset | reset
 | ) |  |

Request reset (State Machine & FIFO / Register / Module)

Parameters
qspi | Pointer to QSPI module registers
reset | reset type (GLOBALCON.RESETS)
Returns
None

Definition at line 1102 of file IfxQspi.h.

◆ IfxQspi_resetModule()

IFX_EXTERN void IfxQspi_resetModule ( Ifx_QSPI * qspi )

resets QSPI kernel

Parameters
qspi pointer to QSPI registers
Returns
None

Definition at line 346 of file IfxQspi.c.

◆ IfxQspi_run()

IFX_INLINE void IfxQspi_run ( Ifx_QSPI * qspi )

Request for QSPI in Run state.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1108 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setReceiveFifoInterrruptThreshold()

IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_RxFifoInt | rxFifoInt
 | ) |  |

Set the threshold of RXFIFO for service request generation.

Parameters
qspi | Pointer to QSPI module registers
rxFifoInt | RxFIFO Interrupt threshold to set
Returns
None

Definition at line 1147 of file IfxQspi.h.

◆ IfxQspi_setSuspendMode()

IFX_INLINE void IfxQspi_setSuspendMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
qspi | Pointer to QSPI module registers
mode | Module suspend mode
Returns
None

Definition at line 1241 of file IfxQspi.h.

◆ IfxQspi_write16()

IFX_EXTERN void IfxQspi_write16 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint16 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 16bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 393 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_write32()

IFX_EXTERN void IfxQspi_write32 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 32bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 406 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_write8()

IFX_EXTERN void IfxQspi_write8 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Writes 8bit data into the Tx FIFO.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
data | Array of data to be sent
count | Number of items to be sent
Returns
None

Definition at line 419 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_writeTransmitFifo()

IFX_INLINE void IfxQspi_writeTransmitFifo | ( | Ifx_QSPI * | qspi,
 |  | uint32 | data
 | ) |  |

Write Data into DATAENTRY register.

Parameters
qspi | Pointer to QSPI module registers
data | Data to be entered into TxFIFO
Returns
None

Definition at line 1223 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeTransmitFifo(), IfxQspi_SpiSlave_write(), and IfxQspi_SpiSlave_writeTransmitFifo().


iLLD_TC26B: Support Functions

Functions
Support Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Support Functions:

Functions

IFX_INLINE IfxQspi_Mode | IfxQspi_getMode (Ifx_QSPI *qspi)
Gets the current mode of QSPI. More...
IFX_INLINE float | IfxQspi_getModuleFrequency (Ifx_QSPI *qspi)
Specifies function to get module frequency. More...
IFX_INLINE IfxQspi_Phase | IfxQspi_getPhase (Ifx_QSPI *qspi)
Gets actual transmission phase. More...
IFX_INLINE uint8 | IfxQspi_getReceiveFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of RXFIFO. More...
IFX_INLINE float | IfxQspi_getTimeQuantaFrequency (Ifx_QSPI *qspi)
Gets Time Quanta frequency. More...
IFX_INLINE uint8 | IfxQspi_getTransmitFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of TXFIFO. More...
IFX_INLINE boolean | IfxQspi_isModuleEnabled (Ifx_QSPI *qspi)
Specifies the Module enable or disable status. More...
IFX_INLINE void | IfxQspi_setDisableModuleRequest (Ifx_QSPI *qspi)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setEnableModuleRequest (Ifx_QSPI *qspi)
Sets the enable module request. More...
IFX_INLINE void | IfxQspi_setSleepMode (Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setTransmitFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeBasicConfiguration (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationBeginStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationEndStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1. More...
IFX_INLINE void | IfxQspi_writeExtendedConfiguration (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register. More...
IFX_INLINE void | IfxQspi_writeMixedDataTransmitFifo (Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register. More...
IFX_EXTERN float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
IFX_EXTERN uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
IFX_EXTERN uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
IFX_EXTERN Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IFX_EXTERN IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
IFX_EXTERN uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
IFX_EXTERN void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
IFX_EXTERN void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...

Detailed Description

Function Documentation

◆ IfxQspi_calcRealBaudrate()

IFX_EXTERN float IfxQspi_calcRealBaudrate | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId
 | ) |  |

Function to calculate baudrate of specified channel.

Parameters
qspi | Pointer to QSPI module registers
channelId | QSPI channel number
Returns
Actual baudrate in float

Definition at line 35 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_getChannelConfig(), IfxQspi_SpiMaster_initChannel(), and IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_calculateBasicConfigurationValue()

IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue | ( | Ifx_QSPI * | qspi,
 |  | const IfxQspi_ChannelId | channelId,
 |  | const SpiIf_ChMode * | chMode,
 |  | const float | baudrate
 | ) |  |

Function to calculate BACON register values.

Parameters
qspi | Pointer to QSPI module registers
channelId | QSPI Channel Number
chMode | Frame configuration
baudrate | The desired baudrate
Returns
Calculated BACON value

Definition at line 48 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_setChannelBaudrate(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_calculateDelayConstants()

IFX_EXTERN void IfxQspi_calculateDelayConstants | ( | const Ifx_QSPI * | qspi,
 |  | const IfxQspi_ChannelId | channelId,
 |  | const SpiIf_ChMode * | chMode,
 |  | IfxQspi_DelayConst * | delayConst
 | ) |  |

Calculates the Delay constants (pre and delay) from the user specified CS delays.

Parameters
qspi | pointer to QSPI SFR
channelId | Channel ID no.
chMode | Pointer to Channel Mode
delayConst | Pointer to the Delay Consant Array
Returns
None

Definition at line 432 of file IfxQspi.c.

Referenced by IfxQspi_calculateBasicConfigurationValue().

◆ IfxQspi_calculateExtendedConfigurationValue()

IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue | ( | Ifx_QSPI * | qspi,
 |  | const uint8 | cs,
 |  | const SpiIf_ChConfig * | chConfig
 | ) |  |

Function to calculate ECON register values.

Parameters
qspi | Pointer to QSPI module registers
cs | QSPI channel Number : 8->0,9->1,.......
chConfig | SPI Channel Configuration
Returns
Calculated ECON[CS] value

Definition at line 77 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_setChannelBaudrate(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_calculatePrescaler()

IFX_EXTERN uint32 IfxQspi_calculatePrescaler | ( | Ifx_QSPI * | qspi,
 |  | float | baudrate
 | ) |  |

Function to calculate prescaler.

Parameters
qspi | Pointer to QSPI module registers
baudrate | Maximum baudrate in Float
Returns
Prescaler in integer

Definition at line 190 of file IfxQspi.c.

◆ IfxQspi_calculateTimeQuantumLength()

IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength | ( | Ifx_QSPI * | qspi,
 |  | float | maxBaudrate
 | ) |  |

Specifies the function to calculate Time quantum length.

Parameters
qspi | Pointer to QSPI module registers
maxBaudrate | Maximum baudrate in Float
Returns
Time quantum length in integer

Definition at line 214 of file IfxQspi.c.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_getAddress()

IFX_EXTERN Ifx_QSPI* IfxQspi_getAddress ( IfxQspi_Index qspi )
Parameters
qspi Pointer to QSPI module registers
Returns
QSPI module register address

Definition at line 257 of file IfxQspi.c.

◆ IfxQspi_getIndex()

IFX_EXTERN IfxQspi_Index IfxQspi_getIndex ( Ifx_QSPI * qspi )

Specifies the function to get Index.

Parameters
qspi Pointer to QSPI module registers
Returns
Index in Integer

Definition at line 274 of file IfxQspi.c.

Referenced by IfxQspi_getErrorSrc(), IfxQspi_getReceiveSrc(), and IfxQspi_getTransmitSrc().

◆ IfxQspi_getMode()

IFX_INLINE IfxQspi_Mode IfxQspi_getMode ( Ifx_QSPI * qspi )

Gets the current mode of QSPI.

Parameters
qspi Pointer to QSPI module registers
Returns
The current mode

Definition at line 953 of file IfxQspi.h.

◆ IfxQspi_getModuleFrequency()

IFX_INLINE float IfxQspi_getModuleFrequency ( Ifx_QSPI * qspi )

Specifies function to get module frequency.

Parameters
qspi Pointer to QSPI module registers
Returns
Module frequency in Float value

Definition at line 959 of file IfxQspi.h.

Referenced by IfxQspi_calculatePrescaler(), and IfxQspi_getTimeQuantaFrequency().

◆ IfxQspi_getPhase()

IFX_INLINE IfxQspi_Phase IfxQspi_getPhase ( Ifx_QSPI * qspi )

Gets actual transmission phase.

Parameters
qspi Pointer to QSPI module registers
Returns
Actual transmission phase

Definition at line 967 of file IfxQspi.h.

Referenced by IfxQspi_pause().

◆ IfxQspi_getReceiveFifoLevel()

IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel ( Ifx_QSPI * qspi )

Gets the filling level of RXFIFO.

Parameters
qspi Pointer to QSPI module registers
Returns
RxFIFO level

Definition at line 973 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_read(), and IfxQspi_SpiSlave_read().

◆ IfxQspi_getTimeQuantaFrequency()

IFX_INLINE float IfxQspi_getTimeQuantaFrequency ( Ifx_QSPI * qspi )

Gets Time Quanta frequency.

Parameters
qspi Pointer to QSPI module registers
Returns
TQ frequency in float

Definition at line 992 of file IfxQspi.h.

Referenced by IfxQspi_calculateExtendedConfigurationValue().

◆ IfxQspi_getTransmitFifoLevel()

IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel ( Ifx_QSPI * qspi )

Gets the filling level of TXFIFO.

Parameters
qspi Pointer to QSPI module registers
Returns
TxFIFO level

Definition at line 998 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_isModuleEnabled()

IFX_INLINE boolean IfxQspi_isModuleEnabled ( Ifx_QSPI * qspi )

Specifies the Module enable or disable status.

Parameters
qspi Pointer to QSPI module registers
Returns
TRUE if module is enabled otherwise FALSE

Definition at line 1074 of file IfxQspi.h.

◆ IfxQspi_recalcBasicConfiguration()

IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration | ( | uint32 | oldBACON,
 |  | Ifx_SizeT | numOfData,
 |  | boolean | shortData,
 |  | boolean | lastData
 | ) |  |

Re-calculated BACON from the oldBACON.

Parameters
oldBACON | Old BACON value
numOfData | numOfData in LONG or CONTINUOUS mode
shortData | Specifies SHORT mode (TRUE) or other modes (FALSE)
lastData | Specifies last data in LONG or CONTINUOUS
Returns
Re-calculated BACON

Definition at line 330 of file IfxQspi.c.

◆ IfxQspi_setDisableModuleRequest()

IFX_INLINE void IfxQspi_setDisableModuleRequest ( Ifx_QSPI * qspi )

Sets the disable module request.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1135 of file IfxQspi.h.

◆ IfxQspi_setEnableModuleRequest()

IFX_INLINE void IfxQspi_setEnableModuleRequest ( Ifx_QSPI * qspi )

Sets the enable module request.

Parameters
qspi Pointer to QSPI module registers
Returns
None

Definition at line 1141 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setSlaveSelectOutputControl()

IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | boolean | outputEnable,
 |  | boolean | activeLevel
 | ) |  |

Configures a Slave Select Output.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
outputEnable | chip select output will be enabled during transaction
activeLevel | TRUE: active-high, FALSE: active-low
Returns
None

Definition at line 364 of file IfxQspi.c.

◆ IfxQspi_setSleepMode()

IFX_INLINE void IfxQspi_setSleepMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_SleepMode | mode
 | ) |  |

Sets the disable module request.

Parameters
qspi | Pointer to QSPI module registers
mode | Sleep mode selection
Returns
None

Definition at line 1159 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_setTransmitFifoInterrruptThreshold()

IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_TxFifoInt | txFifoInt
 | ) |  |

Set the threshold of TXFIFO for service request generation.

Parameters
qspi | Pointer to QSPI module registers
txFifoInt | TxFifo Interrupt threshold to set
Returns
None

Definition at line 1172 of file IfxQspi.h.

◆ IfxQspi_writeBasicConfiguration()

IFX_INLINE void IfxQspi_writeBasicConfiguration | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1184 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeBasicConfiguration().

◆ IfxQspi_writeBasicConfigurationBeginStream()

IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register with .LAST flag set to 0.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1190 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_initModule().

◆ IfxQspi_writeBasicConfigurationEndStream()

IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream | ( | Ifx_QSPI * | qspi,
 |  | uint32 | baconVal
 | ) |  |

Write configuration into BACON register with .LAST flag set to 1.

Parameters
qspi | Pointer to QSPI module registers
baconVal | baconVal Value to be entered in BACON register
Returns
None

Definition at line 1200 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_isrDmaTransmit(), and IfxQspi_SpiMaster_write().

◆ IfxQspi_writeExtendedConfiguration()

IFX_INLINE void IfxQspi_writeExtendedConfiguration | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 | econVal
 | ) |  |

Writes channel timing configuration into ECON register.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
econVal | Extended configuration value
Returns
None

Definition at line 1210 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeExtendedConfiguration().

◆ IfxQspi_writeMixedDataTransmitFifo()

IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo | ( | Ifx_QSPI * | qspi,
 |  | uint32 | mixEntryVal
 | ) |  |

Writes Data and Configuration into MIXEDENTRY register.

Parameters
qspi | Pointer to QSPI module registers
mixEntryVal | Data and configuration in mixed
Returns
None

Definition at line 1217 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeMixedDataConfiguration().


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getErrorSrc (Ifx_QSPI *qspi)
Gets the Error request value. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getReceiveSrc (Ifx_QSPI *qspi)
Gets the RXFIFO service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getTransmitSrc (Ifx_QSPI *qspi)
Gets the TXFIFO service request. More...

Detailed Description

Function Documentation

◆ IfxQspi_getErrorSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc ( Ifx_QSPI * qspi )

Gets the Error request value.

Parameters
qspi Pointer to QSPI module registers
Returns
Error request value

Definition at line 946 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_getReceiveSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc ( Ifx_QSPI * qspi )

Gets the RXFIFO service request.

Parameters
qspi Pointer to QSPI module registers
Returns
Receive service request value

Definition at line 979 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().

◆ IfxQspi_getTransmitSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc ( Ifx_QSPI * qspi )

Gets the TXFIFO service request.

Parameters
qspi Pointer to QSPI module registers
Returns
Transmission service request value

Definition at line 1004 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), and IfxQspi_SpiSlave_write().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » QSPI » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxQspi_initMrstInPin (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input. More...
IFX_INLINE void | IfxQspi_initMrstOutPin (const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output. More...
IFX_INLINE void | IfxQspi_initMtsrInPin (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input. More...
IFX_INLINE void | IfxQspi_initMtsrOutPin (const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output. More...
IFX_INLINE void | IfxQspi_initSclkInPin (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input. More...
IFX_INLINE void | IfxQspi_initSclkOutPin (const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxQspi_initSlsi (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input. More...
IFX_INLINE void | IfxQspi_initSlso (const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output. More...

Detailed Description

Function Documentation

◆ IfxQspi_initMrstInPin()

IFX_INLINE void IfxQspi_initMrstInPin | ( | const IfxQspi_Mrst_In * | mrstIn,
 |  | IfxPort_InputMode | mrstInMode
 | ) |  |

Initializes a MRST input.

Parameters
mrstIn | the MRST Pin which should be configured
mrstInMode | the pin input mode which should be configured
Returns
None

Definition at line 1017 of file IfxQspi.h.

◆ IfxQspi_initMrstOutPin()

IFX_INLINE void IfxQspi_initMrstOutPin | ( | const IfxQspi_Mrst_Out * | mrstOut,
 |  | IfxPort_OutputMode | mrstOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a MRST output.

Parameters
mrstOut | the MRST Pin which should be configured
mrstOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1024 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initMtsrInPin()

IFX_INLINE void IfxQspi_initMtsrInPin | ( | const IfxQspi_Mtsr_In * | mtsrIn,
 |  | IfxPort_InputMode | mtsrInMode
 | ) |  |

Initializes a MTSR input.

Parameters
mtsrIn | the MTSR Pin which should be configured
mtsrInMode | the pin input mode which should be configured
Returns
None

Definition at line 1031 of file IfxQspi.h.

◆ IfxQspi_initMtsrOutPin()

IFX_INLINE void IfxQspi_initMtsrOutPin | ( | const IfxQspi_Mtsr_Out * | mtsrOut,
 |  | IfxPort_OutputMode | mtsrOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a MTSR output.

Parameters
mtsrOut | the MTSR Pin which should be configured
mtsrOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1038 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initSclkInPin()

IFX_INLINE void IfxQspi_initSclkInPin | ( | const IfxQspi_Sclk_In * | sclkIn,
 |  | IfxPort_InputMode | sclkInMode
 | ) |  |

Initializes a SCLK input.

Parameters
sclkIn | the SCLK Pin which should be configured
sclkInMode | the pin input mode which should be configured
Returns
None

Definition at line 1045 of file IfxQspi.h.

◆ IfxQspi_initSclkOutPin()

IFX_INLINE void IfxQspi_initSclkOutPin | ( | const IfxQspi_Sclk_Out * | sclkOut,
 |  | IfxPort_OutputMode | sclkOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SCLK output.

Parameters
sclkOut | the SCLK Pin which should be configured
sclkOutMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 1052 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initSlsi()

IFX_INLINE void IfxQspi_initSlsi | ( | const IfxQspi_Slsi_In * | slsi,
 |  | IfxPort_InputMode | slsiMode
 | ) |  |

Initializes a SLSI input.

Parameters
slsi | the SLSI Pin which should be configured
slsiMode | the pin input mode which should be configured
Returns
None

Definition at line 1059 of file IfxQspi.h.

◆ IfxQspi_initSlso()

IFX_INLINE void IfxQspi_initSlso | ( | const IfxQspi_Slso_Out * | slso,
 |  | IfxPort_OutputMode | slsoMode,
 |  | IfxPort_PadDriver | padDriver,
 |  | IfxPort_OutputIdx | outIndex
 | ) |  |

Initializes a SLSO output.

Parameters
slso | the SLSO Pin which should be configured
slsoMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
outIndex | Pin Pad driver index
Returns
None

Definition at line 1067 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initChannel().


iLLD_TC26B: QSPI Pin Mapping

Data Structures | Macros | Variables
QSPI Pin Mapping
iLLD » QSPI
Collaboration diagram for QSPI Pin Mapping:

Data Structures

struct | IfxQspi_Mrst_In
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_In
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_In
SCLK pin mapping structure. More...
struct | IfxQspi_Slsi_In
SLSI pin mapping structure. More...
struct | IfxQspi_Hsicin_In
HSICIN pin mapping structure. More...
struct | IfxQspi_Mrst_Out
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_Out
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxQspi_Slso_Out
SLSO pin mapping structure. More...

Macros

#define | IFXQSPI_PINMAP_NUM_MODULES 4
Table dimensions. More...
#define | IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
#define | IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2
#define | IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
QSPI2_HSICINA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
QSPI2_HSICINB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
QSPI3_HSICINA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
QSPI3_HSICINB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
QSPI0_MRSTA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
QSPI1_MRSTA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
QSPI1_MRSTB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
QSPI2_MRSTA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
QSPI2_MRSTB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
QSPI2_MRSTCN: QSPI2 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
QSPI2_MRSTCP: QSPI2 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
QSPI2_MRSTE: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
QSPI3_MRSTA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
QSPI3_MRSTB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN
QSPI3_MRSTD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN
QSPI3_MRSTE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN
QSPI3_MRSTFN: QSPI3 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN
QSPI3_MRSTFP: QSPI3 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
QSPI0_MRST: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
QSPI2_MRST: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
QSPI2_MRST: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
QSPI0_MTSRA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
QSPI1_MTSRA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
QSPI1_MTSRB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
QSPI1_MTSRC: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
QSPI2_MTSRA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
QSPI2_MTSRB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
QSPI3_MTSRA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
QSPI3_MTSRB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
QSPI3_MTSRD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
QSPI3_MTSRE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
QSPI0_MTSR: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
QSPI0_MTSR: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
QSPI2_MTSRN: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
QSPI2_MTSRP: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
QSPI2_MTSR: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
QSPI2_MTSR: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT
QSPI3_MTSRN: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT
QSPI3_MTSRP: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT
QSPI3_MTSR: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
QSPI0_SCLKA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
QSPI1_SCLKA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
QSPI1_SCLKB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
QSPI2_SCLKA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
QSPI2_SCLKB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
QSPI3_SCLKA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
QSPI3_SCLKB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
QSPI3_SCLKD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
QSPI3_SCLKE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
QSPI0_SCLK: QSPI0 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
QSPI0_SCLK: QSPI0 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
QSPI1_SCLK: QSPI1 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
QSPI1_SCLK: QSPI1 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
QSPI2_SCLKN: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
QSPI2_SCLKP: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT
QSPI3_SCLKN: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT
QSPI3_SCLKP: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
QSPI0_SLSIA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
QSPI0_SLSIB: QSPI0 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
QSPI1_SLSIA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
QSPI2_SLSIA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
QSPI2_SLSIB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
QSPI3_SLSIA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
QSPI3_SLSIC: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
QSPI3_SLSID: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
QSPI0_SLSO0: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
QSPI0_SLSO13: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
QSPI0_SLSO1: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
QSPI0_SLSO2: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
QSPI0_SLSO3: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
QSPI0_SLSO4: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
QSPI0_SLSO5: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
QSPI0_SLSO6: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
QSPI0_SLSO7: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
QSPI0_SLSO8: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
QSPI0_SLSO9: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
QSPI1_SLSO0: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
QSPI1_SLSO10: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
QSPI1_SLSO1: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
QSPI1_SLSO2: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
QSPI1_SLSO3: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
QSPI1_SLSO4: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
QSPI1_SLSO5: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
QSPI1_SLSO6: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
QSPI1_SLSO7: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
QSPI1_SLSO8: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
QSPI1_SLSO9: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
QSPI2_SLSO0: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
QSPI2_SLSO1: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
QSPI2_SLSO2: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
QSPI2_SLSO3: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
QSPI2_SLSO4: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
QSPI2_SLSO5: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
QSPI2_SLSO6: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
QSPI2_SLSO7: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
QSPI2_SLSO8: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
QSPI2_SLSO9: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
QSPI3_SLSO0: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT
QSPI3_SLSO11: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT
QSPI3_SLSO12: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT
QSPI3_SLSO13: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
QSPI3_SLSO1: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT
QSPI3_SLSO1: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
QSPI3_SLSO2: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT
QSPI3_SLSO2: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
QSPI3_SLSO3: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
QSPI3_SLSO4: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT
QSPI3_SLSO4: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
QSPI3_SLSO5: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT
QSPI3_SLSO5: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
QSPI3_SLSO6: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
QSPI3_SLSO7: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT
QSPI3_SLSO7: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
QSPI3_SLSO8: QSPI3 output. More...
IFX_EXTERN const IfxQspi_Hsicin_In * | IfxQspi_Hsicin_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
IfxQspi_Hsicin_In table. More...
IFX_EXTERN const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table. More...
IFX_EXTERN const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table. More...
IFX_EXTERN const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table. More...
IFX_EXTERN const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table. More...
IFX_EXTERN const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table. More...
IFX_EXTERN const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table. More...
IFX_EXTERN const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table. More...
IFX_EXTERN const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxQspi_Mrst_In

struct IfxQspi_Mrst_In

MRST pin mapping structure.

Definition at line 39 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mrst_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Mtsr_In

struct IfxQspi_Mtsr_In

MTSR pin mapping structure.

Definition at line 47 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mtsr_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Sclk_In

struct IfxQspi_Sclk_In

SCLK pin mapping structure.

Definition at line 55 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Sclk_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Slsi_In

struct IfxQspi_Slsi_In

SLSI pin mapping structure.

Definition at line 63 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Slsi_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Hsicin_In

struct IfxQspi_Hsicin_In

HSICIN pin mapping structure.

Definition at line 71 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Hsicin_In:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxQspi_Mrst_Out

struct IfxQspi_Mrst_Out

MRST pin mapping structure.

Definition at line 79 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mrst_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Mtsr_Out

struct IfxQspi_Mtsr_Out

MTSR pin mapping structure.

Definition at line 87 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Mtsr_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Sclk_Out

struct IfxQspi_Sclk_Out

SCLK pin mapping structure.

Definition at line 95 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Sclk_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxQspi_Slso_Out

struct IfxQspi_Slso_Out

SLSO pin mapping structure.

Definition at line 103 of file IfxQspi_PinMap.h.

Collaboration diagram for IfxQspi_Slso_Out:
[legend]
Data Fields
Ifx_QSPI * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.
sint32 | slsoNr | Slave Select.

Macro Definition Documentation

◆ IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2

Definition at line 250 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6

Definition at line 251 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4

Definition at line 252 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5

Definition at line 253 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6

Definition at line 254 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_NUM_MODULES

#define IFXQSPI_PINMAP_NUM_MODULES 4

Table dimensions.

Definition at line 248 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_NUM_SLAVESELECTS

#define IFXQSPI_PINMAP_NUM_SLAVESELECTS 14

Definition at line 249 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5

Definition at line 255 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6

Definition at line 256 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS

#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4

Definition at line 257 of file IfxQspi_PinMap.h.

◆ IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS

#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Definition at line 258 of file IfxQspi_PinMap.h.

Variable Documentation

◆ IfxQspi0_MRST_P20_12_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT

QSPI0_MRST: QSPI0 output.

Definition at line 129 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MRSTA_P20_12_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN

QSPI0_MRSTA: QSPI0 input.

Definition at line 115 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSR_P20_12_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT

QSPI0_MTSR: QSPI0 output.

Definition at line 149 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSR_P20_14_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT

QSPI0_MTSR: QSPI0 output.

Definition at line 150 of file IfxQspi_PinMap.h.

◆ IfxQspi0_MTSRA_P20_14_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN

QSPI0_MTSRA: QSPI0 input.

Definition at line 139 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLK_P20_11_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT

QSPI0_SCLK: QSPI0 output.

Definition at line 174 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLK_P20_13_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT

QSPI0_SCLK: QSPI0 output.

Definition at line 175 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SCLKA_P20_11_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN

QSPI0_SCLKA: QSPI0 input.

Definition at line 165 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSIA_P20_13_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN

QSPI0_SLSIA: QSPI0 input.

Definition at line 189 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSIB_P20_9_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN

QSPI0_SLSIB: QSPI0 input.

Definition at line 190 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO0_P20_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT

QSPI0_SLSO0: QSPI0 output.

Definition at line 197 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO13_P15_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT

QSPI0_SLSO13: QSPI0 output.

Definition at line 198 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO1_P20_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT

QSPI0_SLSO1: QSPI0 output.

Definition at line 199 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO2_P20_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT

QSPI0_SLSO2: QSPI0 output.

Definition at line 200 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO3_P11_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT

QSPI0_SLSO3: QSPI0 output.

Definition at line 201 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO4_P11_11_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT

QSPI0_SLSO4: QSPI0 output.

Definition at line 202 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO5_P11_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT

QSPI0_SLSO5: QSPI0 output.

Definition at line 203 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO6_P20_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT

QSPI0_SLSO6: QSPI0 output.

Definition at line 204 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO7_P33_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT

QSPI0_SLSO7: QSPI0 output.

Definition at line 205 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO8_P20_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT

QSPI0_SLSO8: QSPI0 output.

Definition at line 206 of file IfxQspi_PinMap.h.

◆ IfxQspi0_SLSO9_P20_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT

QSPI0_SLSO9: QSPI0 output.

Definition at line 207 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P10_1_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT

QSPI1_MRST: QSPI1 output.

Definition at line 130 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P10_6_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT

QSPI1_MRST: QSPI1 output.

Definition at line 131 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRST_P11_3_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT

QSPI1_MRST: QSPI1 output.

Definition at line 132 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRSTA_P10_1_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN

QSPI1_MRSTA: QSPI1 input.

Definition at line 116 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MRSTB_P11_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN

QSPI1_MRSTB: QSPI1 input.

Definition at line 117 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_1_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT

QSPI1_MTSR: QSPI1 output.

Definition at line 151 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT

QSPI1_MTSR: QSPI1 output.

Definition at line 152 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P10_4_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT

QSPI1_MTSR: QSPI1 output.

Definition at line 153 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSR_P11_9_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT

QSPI1_MTSR: QSPI1 output.

Definition at line 154 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRA_P10_3_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN

QSPI1_MTSRA: QSPI1 input.

Definition at line 140 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRB_P11_9_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN

QSPI1_MTSRB: QSPI1 input.

Definition at line 141 of file IfxQspi_PinMap.h.

◆ IfxQspi1_MTSRC_P10_4_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN

QSPI1_MTSRC: QSPI1 input.

Definition at line 142 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLK_P10_2_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT

QSPI1_SCLK: QSPI1 output.

Definition at line 176 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLK_P11_6_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT

QSPI1_SCLK: QSPI1 output.

Definition at line 177 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLKA_P10_2_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN

QSPI1_SCLKA: QSPI1 input.

Definition at line 166 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SCLKB_P11_6_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN

QSPI1_SCLKB: QSPI1 input.

Definition at line 167 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSIA_P11_10_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN

QSPI1_SLSIA: QSPI1 input.

Definition at line 191 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO0_P20_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT

QSPI1_SLSO0: QSPI1 output.

Definition at line 208 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO10_P10_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT

QSPI1_SLSO10: QSPI1 output.

Definition at line 209 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO1_P20_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT

QSPI1_SLSO1: QSPI1 output.

Definition at line 210 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO2_P20_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT

QSPI1_SLSO2: QSPI1 output.

Definition at line 211 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO3_P11_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT

QSPI1_SLSO3: QSPI1 output.

Definition at line 212 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO4_P11_11_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT

QSPI1_SLSO4: QSPI1 output.

Definition at line 213 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO5_P11_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT

QSPI1_SLSO5: QSPI1 output.

Definition at line 214 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO6_P33_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT

QSPI1_SLSO6: QSPI1 output.

Definition at line 215 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO7_P33_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT

QSPI1_SLSO7: QSPI1 output.

Definition at line 216 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO8_P10_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT

QSPI1_SLSO8: QSPI1 output.

Definition at line 217 of file IfxQspi_PinMap.h.

◆ IfxQspi1_SLSO9_P10_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT

QSPI1_SLSO9: QSPI1 output.

Definition at line 218 of file IfxQspi_PinMap.h.

◆ IfxQspi2_HSICINA_P15_2_IN

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN

QSPI2_HSICINA: QSPI2 input.

Definition at line 111 of file IfxQspi_PinMap.h.

◆ IfxQspi2_HSICINB_P15_3_IN

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN

QSPI2_HSICINB: QSPI2 input.

Definition at line 112 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRST_P15_4_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT

QSPI2_MRST: QSPI2 output.

Definition at line 133 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRST_P15_7_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT

QSPI2_MRST: QSPI2 output.

Definition at line 134 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTA_P15_4_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN

QSPI2_MRSTA: QSPI2 input.

Definition at line 118 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTB_P15_7_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN

QSPI2_MRSTB: QSPI2 input.

Definition at line 119 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTCN_P21_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN

QSPI2_MRSTCN: QSPI2 input (LVDS)

Definition at line 120 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTCP_P21_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN

QSPI2_MRSTCP: QSPI2 input (LVDS)

Definition at line 121 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MRSTE_P15_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN

QSPI2_MRSTE: QSPI2 input.

Definition at line 122 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSR_P15_5_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT

QSPI2_MTSR: QSPI2 output.

Definition at line 157 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSR_P15_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT

QSPI2_MTSR: QSPI2 output.

Definition at line 158 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRA_P15_5_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN

QSPI2_MTSRA: QSPI2 input.

Definition at line 143 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRB_P15_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN

QSPI2_MTSRB: QSPI2 input.

Definition at line 144 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRN_P13_2_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT

QSPI2_MTSRN: QSPI2 output (LVDS)

Definition at line 155 of file IfxQspi_PinMap.h.

◆ IfxQspi2_MTSRP_P13_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT

QSPI2_MTSRP: QSPI2 output (LVDS)

Definition at line 156 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_3_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT

QSPI2_SCLK: QSPI2 output.

Definition at line 180 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_6_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT

QSPI2_SCLK: QSPI2 output.

Definition at line 181 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLK_P15_8_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT

QSPI2_SCLK: QSPI2 output.

Definition at line 182 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKA_P15_3_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN

QSPI2_SCLKA: QSPI2 input.

Definition at line 168 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKB_P15_8_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN

QSPI2_SCLKB: QSPI2 input.

Definition at line 169 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKN_P13_0_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT

QSPI2_SCLKN: QSPI2 output (LVDS)

Definition at line 178 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SCLKP_P13_1_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT

QSPI2_SCLKP: QSPI2 output (LVDS)

Definition at line 179 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSIA_P15_2_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN

QSPI2_SLSIA: QSPI2 input.

Definition at line 192 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSIB_P15_1_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN

QSPI2_SLSIB: QSPI2 input.

Definition at line 193 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO0_P15_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT

QSPI2_SLSO0: QSPI2 output.

Definition at line 219 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO1_P14_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT

QSPI2_SLSO1: QSPI2 output.

Definition at line 220 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO2_P14_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT

QSPI2_SLSO2: QSPI2 output.

Definition at line 221 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO3_P14_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT

QSPI2_SLSO3: QSPI2 output.

Definition at line 222 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO4_P14_7_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT

QSPI2_SLSO4: QSPI2 output.

Definition at line 223 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO5_P15_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT

QSPI2_SLSO5: QSPI2 output.

Definition at line 224 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO6_P33_13_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT

QSPI2_SLSO6: QSPI2 output.

Definition at line 225 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO7_P20_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT

QSPI2_SLSO7: QSPI2 output.

Definition at line 226 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO8_P20_6_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT

QSPI2_SLSO8: QSPI2 output.

Definition at line 227 of file IfxQspi_PinMap.h.

◆ IfxQspi2_SLSO9_P20_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT

QSPI2_SLSO9: QSPI2 output.

Definition at line 228 of file IfxQspi_PinMap.h.

◆ IfxQspi3_HSICINA_P33_9_IN

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN

QSPI3_HSICINA: QSPI3 input.

Definition at line 113 of file IfxQspi_PinMap.h.

◆ IfxQspi3_HSICINB_P33_10_IN

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN

QSPI3_HSICINB: QSPI3 input.

Definition at line 114 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P02_5_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT

QSPI3_MRST: QSPI3 output.

Definition at line 135 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P10_7_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT

QSPI3_MRST: QSPI3 output.

Definition at line 136 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P22_1_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT

QSPI3_MRST: QSPI3 output.

Definition at line 137 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRST_P33_13_OUT

IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT

QSPI3_MRST: QSPI3 output.

Definition at line 138 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTA_P02_5_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN

QSPI3_MRSTA: QSPI3 input.

Definition at line 123 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTB_P10_7_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN

QSPI3_MRSTB: QSPI3 input.

Definition at line 124 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTD_P33_13_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN

QSPI3_MRSTD: QSPI3 input.

Definition at line 125 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTE_P22_1_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN

QSPI3_MRSTE: QSPI3 input.

Definition at line 126 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTFN_P21_2_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN

QSPI3_MRSTFN: QSPI3 input (LVDS)

Definition at line 127 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MRSTFP_P21_3_IN

IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN

QSPI3_MRSTFP: QSPI3 input (LVDS)

Definition at line 128 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P02_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT

QSPI3_MTSR: QSPI3 output.

Definition at line 161 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P10_6_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT

QSPI3_MTSR: QSPI3 output.

Definition at line 162 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P22_0_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT

QSPI3_MTSR: QSPI3 output (LVDS)

Definition at line 163 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSR_P33_12_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT

QSPI3_MTSR: QSPI3 output.

Definition at line 164 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRA_P02_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN

QSPI3_MTSRA: QSPI3 input.

Definition at line 145 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRB_P10_6_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN

QSPI3_MTSRB: QSPI3 input.

Definition at line 146 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRD_P33_12_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN

QSPI3_MTSRD: QSPI3 input.

Definition at line 147 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRE_P22_0_IN

IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN

QSPI3_MTSRE: QSPI3 input.

Definition at line 148 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRN_P22_2_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT

QSPI3_MTSRN: QSPI3 output (LVDS)

Definition at line 159 of file IfxQspi_PinMap.h.

◆ IfxQspi3_MTSRP_P22_3_OUT

IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT

QSPI3_MTSRP: QSPI3 output (LVDS)

Definition at line 160 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P02_7_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT

QSPI3_SCLK: QSPI3 output.

Definition at line 185 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P10_8_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT

QSPI3_SCLK: QSPI3 output.

Definition at line 186 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P22_3_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT

QSPI3_SCLK: QSPI3 output.

Definition at line 187 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLK_P33_11_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT

QSPI3_SCLK: QSPI3 output.

Definition at line 188 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKA_P02_7_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN

QSPI3_SCLKA: QSPI3 input.

Definition at line 170 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKB_P10_8_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN

QSPI3_SCLKB: QSPI3 input.

Definition at line 171 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKD_P33_11_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN

QSPI3_SCLKD: QSPI3 input.

Definition at line 172 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKE_P22_3_IN

IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN

QSPI3_SCLKE: QSPI3 input.

Definition at line 173 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKN_P22_0_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT

QSPI3_SCLKN: QSPI3 output.

Definition at line 183 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SCLKP_P22_1_OUT

IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT

QSPI3_SCLKP: QSPI3 output (LVDS)

Definition at line 184 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSIA_P02_4_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN

QSPI3_SLSIA: QSPI3 input.

Definition at line 194 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSIC_P33_10_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN

QSPI3_SLSIC: QSPI3 input.

Definition at line 195 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSID_P22_2_IN

IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN

QSPI3_SLSID: QSPI3 input.

Definition at line 196 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO0_P02_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT

QSPI3_SLSO0: QSPI3 output.

Definition at line 229 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO11_P33_10_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT

QSPI3_SLSO11: QSPI3 output.

Definition at line 230 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO12_P22_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT

QSPI3_SLSO12: QSPI3 output.

Definition at line 231 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO13_P23_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT

QSPI3_SLSO13: QSPI3 output.

Definition at line 232 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO1_P02_0_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT

QSPI3_SLSO1: QSPI3 output.

Definition at line 233 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO1_P33_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT

QSPI3_SLSO1: QSPI3 output.

Definition at line 234 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO2_P02_1_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT

QSPI3_SLSO2: QSPI3 output.

Definition at line 235 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO2_P33_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT

QSPI3_SLSO2: QSPI3 output.

Definition at line 236 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO3_P02_2_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT

QSPI3_SLSO3: QSPI3 output.

Definition at line 237 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO4_P02_3_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT

QSPI3_SLSO4: QSPI3 output.

Definition at line 238 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO4_P23_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT

QSPI3_SLSO4: QSPI3 output.

Definition at line 239 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO5_P02_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT

QSPI3_SLSO5: QSPI3 output.

Definition at line 240 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO5_P23_4_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT

QSPI3_SLSO5: QSPI3 output.

Definition at line 241 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO6_P00_8_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT

QSPI3_SLSO6: QSPI3 output.

Definition at line 242 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO7_P00_9_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT

QSPI3_SLSO7: QSPI3 output.

Definition at line 243 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO7_P33_7_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT

QSPI3_SLSO7: QSPI3 output.

Definition at line 244 of file IfxQspi_PinMap.h.

◆ IfxQspi3_SLSO8_P10_5_OUT

IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT

QSPI3_SLSO8: QSPI3 output.

Definition at line 245 of file IfxQspi_PinMap.h.

◆ IfxQspi_Hsicin_In_pinTable

IFX_EXTERN const IfxQspi_Hsicin_In* IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]

IfxQspi_Hsicin_In table.

Definition at line 262 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mrst_In_pinTable

IFX_EXTERN const IfxQspi_Mrst_In* IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]

IfxQspi_Mrst_In table.

Definition at line 265 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mrst_Out_pinTable

IFX_EXTERN const IfxQspi_Mrst_Out* IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]

IfxQspi_Mrst_Out table.

Definition at line 268 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mtsr_In_pinTable

IFX_EXTERN const IfxQspi_Mtsr_In* IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]

IfxQspi_Mtsr_In table.

Definition at line 271 of file IfxQspi_PinMap.h.

◆ IfxQspi_Mtsr_Out_pinTable

IFX_EXTERN const IfxQspi_Mtsr_Out* IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]

IfxQspi_Mtsr_Out table.

Definition at line 274 of file IfxQspi_PinMap.h.

◆ IfxQspi_Sclk_In_pinTable

IFX_EXTERN const IfxQspi_Sclk_In* IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]

IfxQspi_Sclk_In table.

Definition at line 277 of file IfxQspi_PinMap.h.

◆ IfxQspi_Sclk_Out_pinTable

IFX_EXTERN const IfxQspi_Sclk_Out* IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]

IfxQspi_Sclk_Out table.

Definition at line 280 of file IfxQspi_PinMap.h.

◆ IfxQspi_Slsi_In_pinTable

IFX_EXTERN const IfxQspi_Slsi_In* IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]

IfxQspi_Slsi_In table.

Definition at line 283 of file IfxQspi_PinMap.h.

◆ IfxQspi_Slso_Out_pinTable

IFX_EXTERN const IfxQspi_Slso_Out* IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

IfxQspi_Slso_Out table.

Definition at line 286 of file IfxQspi_PinMap.h.


iLLD_TC26B: How to use the SPI Master Interface driver?

How to use the SPI Master Interface driver?
iLLD » QSPI
Collaboration diagram for How to use the SPI Master Interface driver?:

The SPI Master interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.

Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received. Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>

Variables

Declare QSPI module and channel handles:

IfxQspi_SpiMaster spi;
IfxQspi_SpiMaster_Channel spiChannel;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation (without dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_QSPI0_TX 1
#define IFX_INTPRIO_QSPI0_RX 2
#define IFX_INTPRIO_QSPI0_ER 5

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0TxISR, 0, IFX_INTPRIO_QSPI0_TX)
{
IfxQspi_SpiMaster_isrTransmit(&spi);
}
IFX_INTERRUPT(qspi0RxISR, 0, IFX_INTPRIO_QSPI0_RX)
{
IfxQspi_SpiMaster_isrReceive(&spi);
}
IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
{
IfxQspi_SpiMaster_isrError(&spi);
// Process errors. Eg: parity Error is checked below
IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
if( chHandle->errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi0TxISR, IFX_INTPRIO_QSPI0_TX);
IfxCpu_Irq_installInterruptHandler(&qspi0RxISR, IFX_INTPRIO_QSPI0_RX);
IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
IfxCpu_enableInterrupts();

Interrupt Handler Installation (with dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// qspi priorities
#define IFX_INTPRIO_QSPI0_TX 1 // DMA channel 1
#define IFX_INTPRIO_QSPI0_RX 2 // DMA channel 2
#define IFX_INTPRIO_QSPI0_ER 0x30
// dma priorities
#define IFX_INTPRIO_DMA_CH1 10
#define IFX_INTPRIO_DMA_CH2 11

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0DmaTxISR, 0, IFX_INTPRIO_DMA_CH1 )
{
IfxQspi_SpiMaster_isrDmaTransmit(&spi);
}
IFX_INTERRUPT(qspi0DmaRxISR, 0, IFX_INTPRIO_DMA_CH2)
{
IfxQspi_SpiMaster_isrDmaReceive(&spi);
}
IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
{
IfxQspi_SpiMaster_isrError(&spi);
// Process errors. Eg: parity Error is checked below
IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
if( chHandle->errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi0DmaTxISR, IFX_INTPRIO_DMA_CH1);
IfxCpu_Irq_installInterruptHandler(&qspi0DmaRxISR, IFX_INTPRIO_DMA_CH2);
IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
IfxCpu_enableInterrupts();

Module Initialisation (without dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target
spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
spiMasterConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with Dma usage)
spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
// dma configuration.
spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
spiMasterConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &Pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

SPI Channel Initialisation

After the module has been initialized, one or more SPI channels can be configured. Each channel has a dedicated select line.

Here an example for a SPI channel in master mode:

// create channel config
IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
// set the baudrate for this channel
spiMasterChannelConfig.base.baudrate = 5000000;
// select pin configuration
const IfxQspi_SpiMaster_Output slsOutput = {
&IfxQspi0_SLSO7_P33_5_OUT,
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
// initialize channel
//IfxQspi_SpiMaster_Channel spiChannel; // defined globally
IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);

The QSPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// declared somewhere globally
#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };

Sending and Receiving a data stream:

int i=0;
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);

Receive only, send all-1

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);

Phase transition and User Interrupt usage

Phase transition and user defined interrupts are not configured internal to Driver.

Example usage of Phase transition interrupt is given below

IfxCpu_Irq_installInterruptHandler(&qspi0PtISR, IFX_INTPRIO_QSPI0_PT);
IfxQspi_pause(&MODULE_QSPI0);
IfxQspi_configPT1Event(&MODULE_QSPI0, IfxQspi_PhaseTransitionEvent_startOfFrame); // Configured for PT1 SOF event
IfxQspi_enablePT1Event(&MODULE_QSPI0,TRUE);
IfxQspi_run(&MODULE_QSPI0);

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi0PtISR, 0, IFX_INTPRIO_QSPI0_PT )
{
IfxQspi_PhaseTransitionEvent event;
event = IfxQspi_SpiMaster_isrPhaseTransition(&spiMaster);
// process event
switch (event)
{
case IfxQspi_PhaseTransitionEvent_startOfFrame:
// SOF event
break;
// add other events if needed.
}
}

How to use XXL Mode with Dma

The Qspi XXL mode is similar to Short mode with the exception to configure mode to xxl before calling IfxQspi_SpiMaster_initChannel() function. The remaining usage is similar to Short / ShortContinuous Mode (default one) with Dma

spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_xxl;

How to use Long / Long Continuous Mode with Dma

The qspi Long mode is similar to short mode Except for below additional changes.

  1. Transmit buffer need to be defined (this is in addition to source/TX data buffer. This buffer is used to store the DATA + CONFIG for dma usage).
  2. Configure the Spi Channel configuration mode (new one) to long or longContinuous mode
  3. Preparing Transmit buffer content for long/long Continuous mode

Example Code is provided below.

Include Files

Include following header file into your C code:

#include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>

Variables

Declare QSPI module and channel handles:

IfxQspi_SpiMaster spi;
IfxQspi_SpiMaster_Channel spiChannel;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 50
#define BACON_SIZE IFXQSPI_BACONSIZE(SPI_BUFFER_SIZE)
#define FIFO_SIZE IFXQSPI_FIFO32BITSIZE(SPI_BUFFER_SIZE)
// This should be 32 bit ; use addition of macros as shown
__attribute__ ((aligned(64))) uint32 spi0TxLongBuffer[BACON_SIZE + FIFO_SIZE];
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for master mode:

// create module config
IfxQspi_SpiMaster_Config spiMasterConfig;
IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
// set the desired mode and maximum baudrate
spiMasterConfig.base.mode = SpiIf_Mode_master;
spiMasterConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with Dma usage)
spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
// dma configuration.
spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
spiMasterConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiMaster_Pins pins = {
&IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
&IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
&IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiMasterConfig.pins = &Pins;
// initialize module
//IfxQspi_SpiMaster spi; // defined globally
IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);

SPI Channel Initialisation

After the module has been initialized, one or more SPI channels can be configured. Each channel has a dedicated select line.

Here an example for a SPI channel in master mode:

// create channel config
IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
// set the baudrate for this channel
spiMasterChannelConfig.base.baudrate = 5000000;
// select pin configuration
const IfxQspi_SpiMaster_Output slsOutput = {
&IfxQspi0_SLSO7_P33_5_OUT,
IfxPort_OutputMode_pushPull,
IfxPort_PadDriver_cmosAutomotiveSpeed1
};
spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_longContinuous; // Select Long Continuous Mode
// initialize channel
//IfxQspi_SpiMaster_Channel spiChannel; // defined globally
IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);

Sending and Receiving a Long data stream:

int i=0;
// Pack data and Configuration to Transmit buffer (Only for Long / Long Continuous Mode(s))
IfxQspi_SpiMaster_packLongModeBuffer(&spiMasterChannel, spi0TxBuffer, spi0TxLongBuffer, SPI_BUFFER_SIZE);
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

** NOTE for loopback mode ** In case you want to configure and test a SPI channel in loopback, you have to select: spiMasterChannelConfig.base.mode.loopback = 1

If an output pin is configured in loopback mode, the SPI channel number will be extracted from the pin map configuration.

If an output pin is not configured in loopback, the default SPI channel selected will be 0.


iLLD_TC26B: SPI Master Driver

Modules
SPI Master Driver
iLLD » QSPI
Collaboration diagram for SPI Master Driver:

Modules

Data Structures
Module Functions
Channel Functions
Support Functions
Communication
Interrupt Functions
Direct FIFO Access

Detailed Description


iLLD_TC26B: Data Structures

Data Structures | Enumerations
Data Structures
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxQspi_SpiMaster_Input
SLSI pin configuration structure. More...
struct | IfxQspi_SpiMaster_Output
SLSO pin configuration structure. More...
struct | IfxQspi_SpiMaster_Dma
Dma handle. More...
struct | IfxQspi_SpiMaster_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags. More...
union | IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins. More...
struct | IfxQspi_SpiMaster_Pins
Master pin IO configuration structure. More...
struct | IfxQspi_SpiMaster
Module handle data structure. More...
struct | IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure. More...
struct | IfxQspi_SpiMaster_Channel_s
Module Channel handle structure. More...
struct | IfxQspi_SpiMaster_Config
Module configuration structure. More...

Enumerations

enum IfxQspi_SpiMaster_ChannelBasedCs {
IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0,
IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1
}
enum IfxQspi_SpiMaster_Mode {
IfxQspi_SpiMaster_Mode_short = 0,
IfxQspi_SpiMaster_Mode_long = 1,
IfxQspi_SpiMaster_Mode_shortContinuous = 2,
IfxQspi_SpiMaster_Mode_longContinuous = 3,
IfxQspi_SpiMaster_Mode_xxl = 4
}

Detailed Description

Data Structure Documentation

◆ IfxQspi_SpiMaster_Input

struct IfxQspi_SpiMaster_Input

SLSI pin configuration structure.

Definition at line 535 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Input:
[legend]
Data Fields
IfxPort_InputMode | mode | The SLSI pin input mode.
IFX_CONST IfxQspi_Slsi_In * | pin | Pointer to SLSI in pin.

◆ IfxQspi_SpiMaster_Output

struct IfxQspi_SpiMaster_Output

SLSO pin configuration structure.

Definition at line 543 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Output:
[legend]
Data Fields
IfxPort_PadDriver | driver | The pad driver mode which should be configured.
IfxPort_OutputMode | mode | The SLSO pin output mode.
IFX_CONST IfxQspi_Slso_Out * | pin | Pointer to SLSO out pin.

◆ IfxQspi_SpiMaster_Dma

struct IfxQspi_SpiMaster_Dma

Dma handle.

Definition at line 556 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Dma:
[legend]
Data Fields
IfxDma_Dma_Channel | rxDmaChannel | receive DMA channel handle
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_Dma_Channel | txDmaChannel | transmit DMA channel handle
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfer/s

◆ IfxQspi_SpiMaster_DmaConfig

struct IfxQspi_SpiMaster_DmaConfig

Dma configuration.

Definition at line 567 of file IfxQspi_SpiMaster.h.

Data Fields
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfer/s

◆ IfxQspi_SpiMaster_ErrorFlags

struct IfxQspi_SpiMaster_ErrorFlags

Qspi Master Mode Error Flags.

Definition at line 576 of file IfxQspi_SpiMaster.h.

Data Fields
uint16 | baudrateError: 1 | [2:2] baudrate Error
uint16 | configurationError: 1 | [1:1] Configuration Error
uint16 | expectTimeoutError: 1 | [7:7] Expect Timeout Error
uint16 | parityError: 1 | [0:0] Parity Error
uint16 | rxFifoOverflowError: 1 | [5:5] RxFifo Overflow Error
uint16 | rxFifoUnderflowError: 1 | [6:6] RxFifo underflow Error
uint16 | txFifoOverflowError: 1 | [3:3] TxFifo Overflow Error
uint16 | txFifoUnderflowError: 1 | [4:4] TxFifo underflow Error

◆ IfxQspi_SpiMaster_InputOutput

union IfxQspi_SpiMaster_InputOutput

Union of Slave Select pins.

Definition at line 590 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_InputOutput:
[legend]
Data Fields
IfxQspi_SpiMaster_Input | input | SLSI pin configuration structure.
IfxQspi_SpiMaster_Output | output | SLSO pin configuration structure.

◆ IfxQspi_SpiMaster_Pins

struct IfxQspi_SpiMaster_Pins

Master pin IO configuration structure.

Definition at line 598 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Pins:
[legend]
Data Fields
IFX_CONST IfxQspi_Mrst_In * | mrst | Pointer to MRST in pin.
IfxPort_InputMode | mrstMode | The MRST pin input mode.
IFX_CONST IfxQspi_Mtsr_Out * | mtsr | Pointer to MTSR out pin.
IfxPort_OutputMode | mtsrMode | The MTSR pin output mode.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.
IFX_CONST IfxQspi_Sclk_Out * | sclk | Pointer to SLCK out pin.
IfxPort_OutputMode | sclkMode | The SCLK pin output mode.

◆ IfxQspi_SpiMaster

struct IfxQspi_SpiMaster

Module handle data structure.

Definition at line 615 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster:
[legend]
Data Fields
SpiIf | base | Module SPI interface handle.
IfxQspi_SpiMaster_Dma | dma | dma handle
float32 | maximumBaudrate | Maximum Baud Rate for the SPI Module.
Ifx_QSPI * | qspi | Pointer to QSPI module registers.

◆ IfxQspi_SpiMaster_ChannelConfig

struct IfxQspi_SpiMaster_ChannelConfig

Module Channel configuration structure.

Definition at line 625 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_ChannelConfig:
[legend]
Data Fields
SpiIf_ChConfig | base | SPI interface channel configuration structure.
IfxQspi_SpiMaster_ChannelBasedCs | channelBasedCs | define the slso behaviour
uint32 | dummyRxValue | Dummy RX value for transmit only modes.
uint32 | dummyTxValue | Dummy TX value to be sent for "recieve only" modes.
IfxQspi_SpiMaster_Mode | mode | Qspi Operating Mode.
IfxQspi_SpiMaster_InputOutput | sls | Union of Slave Select pins.

◆ IfxQspi_SpiMaster_Channel_s

struct IfxQspi_SpiMaster_Channel_s

Module Channel handle structure.

Definition at line 637 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Channel_s:
[legend]
Data Fields
IfxQspi_SpiMaster_AutoSlso | activateSlso | Specifies function for Auto SLSO activation.
Ifx_QSPI_BACON | bacon | basic configuration register
SpiIf_Ch | base | SPI interface channel handle structure.
IfxQspi_SpiMaster_ChannelBasedCs | channelBasedCs | define the slso behaviour
IfxQspi_ChannelId | channelId | QSPI channel Number.
uint8 | dataWidth | Number of bits which will be written into the FIFO.
IfxQspi_SpiMaster_AutoSlso | deactivateSlso | Specifies function for Auto SLSO deactivation.
uint32 | dummyRxValue | Dummy Rx value, for "transmit only" modes.
uint32 | dummyTxValue | Dummy TX value, which will be sent for "recieve only" mode.
IfxQspi_SpiMaster_ErrorFlags | errorFlags | Spi Master Error Flags.
boolean | firstWrite | Specifies whether the data id first write or not.
IfxQspi_SpiMaster_Mode | mode | Qspi Operating Mode.
IfxPort_Pin | slso | Defines SLSO pin.
Ifx_ActiveState | slsoActiveState | Specifies the current state of SLSO.

◆ IfxQspi_SpiMaster_Config

struct IfxQspi_SpiMaster_Config

Module configuration structure.

Definition at line 657 of file IfxQspi_SpiMaster.h.

Collaboration diagram for IfxQspi_SpiMaster_Config:
[legend]
Data Fields
boolean | allowSleepMode | Specifies module sleep mode.
SpiIf_Config | base | SPI interface configuration structure.
IfxQspi_SpiMaster_DmaConfig | dma | Dma configuration.
boolean | pauseOnBaudrateSpikeErrors | Specifies module pause on baudrate or spike errors.
IfxQspi_PauseRunTransition | pauseRunTransition | Specifies module run or pause mode.
IFX_CONST IfxQspi_SpiMaster_Pins * | pins | structure for QSPI Master pins
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
IfxQspi_FifoMode | rxFifoMode | Specifies the Receive FIFO mode.
IfxQspi_RxFifoInt | rxFifoThreshold | Specifies the RXFIFO interrupt threshold.
IfxQspi_FifoMode | txFifoMode | Specifies the transmit FIFO mode.
IfxQspi_TxFifoInt | txFifoThreshold | Specifies the TXFIFO interrupt threshold.

Enumeration Type Documentation

◆ IfxQspi_SpiMaster_ChannelBasedCs

enum IfxQspi_SpiMaster_ChannelBasedCs
Enumerator
IfxQspi_SpiMaster_ChannelBasedCs_disabled | Slso will be low for complete frame.
IfxQspi_SpiMaster_ChannelBasedCs_enabled | Slso will toggle with every byte.

Definition at line 510 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_Mode

enum IfxQspi_SpiMaster_Mode
Enumerator
IfxQspi_SpiMaster_Mode_short | Short Mode.
IfxQspi_SpiMaster_Mode_long | Long Mode.
IfxQspi_SpiMaster_Mode_shortContinuous | Short Continous Mode.
IfxQspi_SpiMaster_Mode_longContinuous | Long Continous Mode.
IfxQspi_SpiMaster_Mode_xxl | XXL Mode.

Definition at line 516 of file IfxQspi_SpiMaster.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_initModule()

IFX_EXTERN void IfxQspi_SpiMaster_initModule | ( | IfxQspi_SpiMaster * | handle,
 |  | const IfxQspi_SpiMaster_Config * | config
 | ) |  |

Initialises the module.

Parameters
handle | Module handle
config | Predefined configuration structure of the module
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 315 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_initModuleConfig()

IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig | ( | IfxQspi_SpiMaster_Config * | config,
 |  | Ifx_QSPI * | qspi
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure which should be initialized.
qspi | pointer to QSPI registers
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 527 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Channel Functions:

Functions

IFX_STATIC IfxQspi_SpiMaster_Channel * | IfxQspi_SpiMaster_activeChannel (IfxQspi_SpiMaster *handle)
Gets current active channel. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_activeChannel()

IFX_STATIC IfxQspi_SpiMaster_Channel * IfxQspi_SpiMaster_activeChannel ( IfxQspi_SpiMaster * handle )

Gets current active channel.

Parameters
handle Module handle
Returns
current active channel

Definition at line 108 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_isrReceive(), and IfxQspi_SpiMaster_isrTransmit().

◆ IfxQspi_SpiMaster_initChannel()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | const IfxQspi_SpiMaster_ChannelConfig * | chConfig
 | ) |  |

Initializes the channel.

Parameters
chHandle | Module Channel handle
chConfig | Channel configuration structure
Returns
Status of Channel (busy or ok or failure)

Usage example: see How to use the SPI Master Interface driver?

  • Override the SLSO manually as general-purpose output

Definition at line 211 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_initChannelConfig()

IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig | ( | IfxQspi_SpiMaster_ChannelConfig * | chConfig,
 |  | IfxQspi_SpiMaster * | handle
 | ) |  |

Fills the config structure with default values.

Parameters
chConfig | Configuration structure which should be initialized.
handle | Module handle
Returns
None

Usage example: see How to use the SPI Master Interface driver?

Definition at line 300 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: Support Functions

Functions
Support Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Support Functions:

Functions

IFX_STATIC void | IfxQspi_SpiMaster_activateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin. More...
IFX_STATIC void | IfxQspi_SpiMaster_deactivateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin. More...
IFX_STATIC SpiIf_Status | IfxQspi_SpiMaster_lock (IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it. More...
IFX_STATIC void | IfxQspi_SpiMaster_read (IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_unlock (IfxQspi_SpiMaster *handle)
Unlocks the transfers. More...
IFX_STATIC void | IfxQspi_SpiMaster_write (IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_writeLong (IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_activateSlso()

IFX_STATIC void IfxQspi_SpiMaster_activateSlso ( IfxQspi_SpiMaster_Channel * chHandle )

Active the SLSO pin.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 101 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_deactivateSlso()

IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso ( IfxQspi_SpiMaster_Channel * chHandle )

Deactive the SLSO pin.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 114 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_lock()

IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock ( IfxQspi_SpiMaster * handle )

Locks the transfer and gets the current status of it.

Parameters
handle Module handle
Returns
SpiIf_Status_ok if sending is done otherwise SpiIf_Status_busy.

Definition at line 742 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_exchange().

◆ IfxQspi_SpiMaster_read()

IFX_STATIC void IfxQspi_SpiMaster_read ( IfxQspi_SpiMaster_Channel * chHandle )

Reads data from the Rx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 818 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_unlock()

IFX_STATIC void IfxQspi_SpiMaster_unlock ( IfxQspi_SpiMaster * handle )

Unlocks the transfers.

Parameters
handle Module handle
Returns
None

Definition at line 886 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrError(), and IfxQspi_SpiMaster_read().

◆ IfxQspi_SpiMaster_write()

IFX_STATIC void IfxQspi_SpiMaster_write ( IfxQspi_SpiMaster_Channel * chHandle )

Writes data into the Tx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 892 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initChannel().

◆ IfxQspi_SpiMaster_writeLong()

IFX_STATIC void IfxQspi_SpiMaster_writeLong ( IfxQspi_SpiMaster_Channel * chHandle )

Writes Long/xxl data into the Tx FIFO.

Parameters
chHandle Module Channel handle
Returns
None

Definition at line 1197 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_exchange().


iLLD_TC26B: Communication

Functions
Communication
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Communication:

Functions

IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_exchange()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | count
 | ) |  |

Exchanges data between source and data.

Parameters
chHandle | Module Channel handle
src | Source of data. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
dest | Destination to which to be sent.Can be set to NULL_PTR if nothing to receive(transmit only).
count | Number of data in pending
Returns
Status of exchange of data

Usage example: see How to use the SPI Master Interface driver?

Definition at line 121 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_getStatus()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the transmission status.

Parameters
chHandle Module Channel handle
Returns
Transmission status

Usage example: see How to use the SPI Master Interface driver?

Definition at line 198 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_isrDmaReceive()

IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive ( IfxQspi_SpiMaster * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 546 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrDmaTransmit()

IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit ( IfxQspi_SpiMaster * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 567 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrError()

IFX_EXTERN void IfxQspi_SpiMaster_isrError ( IfxQspi_SpiMaster * handle )

Error Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 622 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrPhaseTransition()

IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition ( IfxQspi_SpiMaster * handle )

Phase Transition interrupt handler.

Parameters
handle Module handle
Returns
Phase Transition Event

Definition at line 691 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_isrReceive()

IFX_EXTERN void IfxQspi_SpiMaster_isrReceive ( IfxQspi_SpiMaster * handle )

Receive Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 711 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrTransmit()

IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit ( IfxQspi_SpiMaster * handle )

Transmit interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 719 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_SpiMaster_isrUserDefined()

IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined ( IfxQspi_SpiMaster * handle )

User defined interrupt handler.

Parameters
handle Module handle
Returns
User Event

Definition at line 727 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: Direct FIFO Access

Functions
Direct FIFO Access
iLLD » QSPI » SPI Master Driver
Collaboration diagram for Direct FIFO Access:

Functions

IFX_INLINE uint32 | IfxQspi_SpiMaster_readReceiveFifo (IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeBasicConfiguration (IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeExtendedConfiguration (IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeMixedDataConfiguration (IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeTransmitFifo (IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO. More...
IFX_EXTERN void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiMaster_packLongModeBuffer()

IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | void * | data,
 |  | uint32 * | longFifoBuffer,
 |  | Ifx_SizeT | dataLength
 | ) |  |

pack data to Long mode buffer

Parameters
chHandle | Module Channel handle
data | source Data buffer to be packed
longFifoBuffer | destination buffer for data and configuration
dataLength | size of data in source buffer (in bytes)
Returns
None

Definition at line 749 of file IfxQspi_SpiMaster.c.

◆ IfxQspi_SpiMaster_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo ( IfxQspi_SpiMaster * handle )

Reads data or status in RxFIFO.

Parameters
handle Module handle
Returns
Data or Status in RxFIFO

Definition at line 890 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeBasicConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration | ( | IfxQspi_SpiMaster * | handle,
 |  | uint32 | baconVal
 | ) |  |

Writes Basic configuration value to Tx FIFO.

Parameters
handle | Module handle
baconVal | Basic configuration value to be entered in TxFIFO
Returns
None

Definition at line 898 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeExtendedConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | uint32 | econVal
 | ) |  |

Writes extended configuration of the channel.

Parameters
chHandle | Module Channel handle
econVal | Channel Timing configuration value
Returns
None

Definition at line 905 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeMixedDataConfiguration()

IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration | ( | IfxQspi_SpiMaster * | handle,
 |  | uint32 | mixEntryVal
 | ) |  |

Writes data and configuration mixed value to Tx FIFO.

Parameters
handle | Module handle
mixEntryVal | Mixed of Data and configuration
Returns
None

Definition at line 912 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_writeTransmitFifo()

IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | uint32 | data
 | ) |  |

Writes the data to TxFIFO.

Parameters
chHandle | Module Channel handle
data | Data to be entered in Tx FIFO
Returns
None

Definition at line 919 of file IfxQspi_SpiMaster.h.


iLLD_TC26B: How to use the SPI Slave Interface driver?

How to use the SPI Slave Interface driver?
iLLD » QSPI
Collaboration diagram for How to use the SPI Slave Interface driver?:

The SPI Slave interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.

Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received. Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Qspi/SpiSlave/IfxQspi_SpiSlave.h>

Variables

Declare QSPI module handle:

IfxQspi_SpiSlave spi;

In addition, declare global transmit and receive buffers for the data transfers:

#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE];
uint8 spiRxBuffer[SPI_BUFFER_SIZE];

Interrupt Handler Installation (without dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_QSPI2_TX 1
#define IFX_INTPRIO_QSPI2_RX 2
#define IFX_INTPRIO_QSPI2_ER 5

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi2TxISR, 0, IFX_INTPRIO_QSPI2_TX)
{
IfxQspi_SpiSlave_isrTransmit(&spi);
}
IFX_INTERRUPT(qspi2RxISR, 0, IFX_INTPRIO_QSPI2_RX)
{
IfxQspi_SpiSlave_isrReceive(&spi);
}
IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
{
IfxQspi_SpiSlave_isrError(&spi);
// Process errors. Eg: parity Error is checked below
if( spi.errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi2TxISR, IFX_INTPRIO_QSPI2_TX);
IfxCpu_Irq_installInterruptHandler(&qspi2RxISR, IFX_INTPRIO_QSPI2_RX);
IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
IfxCpu_enableInterrupts();

Interrupt Handler Installation (with dma use)

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
// qspi priorities
#define IFX_INTPRIO_QSPI2_TX 3 // DMA channel 3
#define IFX_INTPRIO_QSPI2_RX 4 // DMA channel 4
#define IFX_INTPRIO_QSPI2_ER 0x31
// dma priorities
#define IFX_INTPRIO_DMA_CH3 12
#define IFX_INTPRIO_DMA_CH4 13

Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:

IFX_INTERRUPT(qspi2DmaTxISR, 0, IFX_INTPRIO_DMA_CH3)
{
IfxQspi_SpiSlave_isrDmaTransmit(&spi);
}
IFX_INTERRUPT(qspi2DmaRxISR, 0, IFX_INTPRIO_DMA_CH4)
{
IfxQspi_SpiSlave_isrDmaReceive(&spi);
}
IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
{
IfxQspi_SpiSlave_isrError(&spi);
// Process errors. Eg: parity Error is checked below
if( spi.errorFlags.parityError == 1)
{
// Parity Error
}
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&qspi2DmaTxISR, IFX_INTPRIO_DMA_CH3);
IfxCpu_Irq_installInterruptHandler(&qspi2DmaRxISR, IFX_INTPRIO_DMA_CH4);
IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
IfxCpu_enableInterrupts();

Module Initialisation (without dma use)

The module initialisation can be done in the same function.

Here an example for slave mode:

// create module config
IfxQspi_SpiSlave_Config spiSlaveConfig;
IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
// set the maximum baudrate
spiSlaveConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target
spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
spiSlaveConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
// pin configuration
const IfxQspi_SpiSlave_Pins slavePins = {
&IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
&IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
&IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
&IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiSlaveConfig.pins = &slavePins;
// initialize module
//IfxQspi_Spi spi; // defined globally
IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);

Module Initialisation (with dma use)

The module initialisation can be done in the same function.

Here an example for slave mode:

// create module config
IfxQspi_SpiSlave_Config spiSlaveConfig;
IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
// set the maximum baudrate
spiSlaveConfig.base.maximumBaudrate = 10000000;
// ISR priorities and interrupt target (with dma usage)
spiSlaveConfig.base.txPriority = IFX_INTPRIO_DMA_CH3;
spiSlaveConfig.base.rxPriority = IFX_INTPRIO_DMA_CH4;
spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
spiSlaveConfig.dma.txDmaChannelId = IfxDma_ChannelId_3;
spiSlaveConfig.dma.rxDmaChannelId = IfxDma_ChannelId_4;
spiSlaveConfig.dma.useDma = 1;
// pin configuration
const IfxQspi_SpiSlave_Pins slavePins = {
&IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
&IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
&IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
&IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
};
spiSlaveConfig.pins = &slavePins;
// initialize module
//IfxQspi_Spi spi; // defined globally
IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);

The QSPI is ready for use now!

Data Transfers

In following examples we assume, that following buffers are declared globally:

// declared somewhere globally
#define SPI_BUFFER_SIZE 8
uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };

Sending and Receiving a data stream:

int i = 0;
// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// send/receive new stream
IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);

Send only, discard received data:

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// send new stream
IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);

Receive only, send all-1

// wait until transfer of previous data stream is finished
while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
// receive new stream
IfxQspi_SpiSlave_exchange(&spi, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);


iLLD_TC26B: SPI Slave Driver

Modules
SPI Slave Driver
iLLD » QSPI
Collaboration diagram for SPI Slave Driver:

Modules

Data Structures
Module Functions
Support Functions
Communication
Interrupt Functions
Direct FIFO Access

Detailed Description


iLLD_TC26B: Data Structures

Data Structures | Variables
Data Structures
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxQspi_SpiSlave_Dma
Dma handle. More...
struct | IfxQspi_SpiSlave_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags. More...
struct | IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure. More...
struct | IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol. More...
struct | IfxQspi_SpiSlave
Module handle data structure. More...
struct | IfxQspi_SpiSlave_Config
Module configuration structure. More...

Variables

IFX_STATIC uint32 | IfxQspi_SpiSlave_dummyRxValue = 0
dummy variable where recived data is placed More...
IFX_STATIC IFX_CONST uint32 | IfxQspi_SpiSlave_dummyTxValue = ~0
dummy value to be transmitted More...

Detailed Description

Data Structure Documentation

◆ IfxQspi_SpiSlave_Dma

struct IfxQspi_SpiSlave_Dma

Dma handle.

Definition at line 300 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Dma:
[legend]
Data Fields
IfxDma_Dma_Channel | rxDmaChannel | receive DMA channel handle
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi recieve.
IfxDma_Dma_Channel | txDmaChannel | transmit DMA channel handle
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfers

◆ IfxQspi_SpiSlave_DmaConfig

struct IfxQspi_SpiSlave_DmaConfig

Dma configuration.

Definition at line 311 of file IfxQspi_SpiSlave.h.

Data Fields
IfxDma_ChannelId | rxDmaChannelId | DMA channel no for the Spi receive.
IfxDma_ChannelId | txDmaChannelId | DMA channel no for the Spi transmit.
boolean | useDma | use Dma for Data transfers

◆ IfxQspi_SpiSlave_ErrorFlags

struct IfxQspi_SpiSlave_ErrorFlags

Qspi Slave Mode Error Flags.

Definition at line 320 of file IfxQspi_SpiSlave.h.

Data Fields
uint16 | baudrateError: 1 | [2:2] baudrate Error
uint16 | configurationError: 1 | [1:1] Configuration Error
uint16 | expectTimeoutError: 1 | [7:7] Expect Timeout Error
uint16 | parityError: 1 | [0:0] Parity Error
uint16 | rxFifoOverflowError: 1 | [5:5] RxFifo Overflow Error
uint16 | rxFifoUnderflowError: 1 | [6:6] RxFifo underflow Error
uint16 | slsiMisplacedInactivation: 1 | [8:8] SLSI misplaced inactivation (slave mode)
uint16 | txFifoOverflowError: 1 | [3:3] TxFifo Overflow Error
uint16 | txFifoUnderflowError: 1 | [4:4] TxFifo underflow Error

◆ IfxQspi_SpiSlave_Pins

struct IfxQspi_SpiSlave_Pins

Slave pin IO configuration structure.

Definition at line 335 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Pins:
[legend]
Data Fields
IFX_CONST IfxQspi_Mrst_Out * | mrst | Pointer to MRST out pin.
IfxPort_OutputMode | mrstMode | The MRST pin output mode.
IFX_CONST IfxQspi_Mtsr_In * | mtsr | Pointer to MTSR in pin.
IfxPort_InputMode | mtsrMode | The MTSR pin input mode.
IfxPort_PadDriver | pinDriver | The pad driver mode which should be configured.
IFX_CONST IfxQspi_Sclk_In * | sclk | Pointer to SLCK in pin.
IfxPort_InputMode | sclkMode | The SCLK pin input mode.
IFX_CONST IfxQspi_Slsi_In * | slsi | Pointer to SLSI in pin.
IfxPort_InputMode | slsiMode | The SLSI pin input mode.

◆ IfxQspi_SpiSlave_Protocol

struct IfxQspi_SpiSlave_Protocol

Configures the SPI Protocol.

Definition at line 350 of file IfxQspi_SpiSlave.h.

Data Fields
SpiIf_ClockPolarity | clockPolarity | Specifies the clock polarity.
SpiIf_DataHeading | dataHeading | Specifies MSB or LSB first.
uint8 | dataWidth | range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Ifx_ParityMode | parityMode | Specifies the parity mode.
SpiIf_ShiftClock | shiftClock | Specifies the clock phase.

◆ IfxQspi_SpiSlave

struct IfxQspi_SpiSlave

Module handle data structure.

Definition at line 365 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave:
[legend]
Data Fields
SpiIf | base | Module SPI interface handle.
uint8 | dataWidth | Number of bits which will be written into the FIFO.
IfxQspi_SpiSlave_Dma | dma | Dma handle.
IfxQspi_SpiSlave_ErrorFlags | errorFlags | Spi Slave Error Flags.
boolean | onTransfer | set to TRUE during ongoing transfer
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
SpiIf_Job | rxJob | Rx Stream which has been received.
SpiIf_Job | txJob | Tx Stream which should be sent.

◆ IfxQspi_SpiSlave_Config

struct IfxQspi_SpiSlave_Config

Module configuration structure.

Definition at line 379 of file IfxQspi_SpiSlave.h.

Collaboration diagram for IfxQspi_SpiSlave_Config:
[legend]
Data Fields
boolean | allowSleepMode | Specifies module sleep mode.
SpiIf_Config | base | SPI interface configuration structure.
IfxQspi_SpiSlave_DmaConfig | dma | Dma configuration.
boolean | pauseOnBaudrateSpikeErrors | Specifies module pause on baudrate or spike errors.
IfxQspi_PauseRunTransition | pauseRunTransition | Specifies module run or pause mode.
IFX_CONST IfxQspi_SpiSlave_Pins * | pins | structure for QSPI Slave pins
IfxQspi_SpiSlave_Protocol | protocol |
Ifx_QSPI * | qspi | Pointer to QSPI module registers.
IfxQspi_FifoMode | rxFifoMode | Specifies the receive FIFO mode.
IfxQspi_RxFifoInt | rxFifoThreshold | Specifies the RXFIFO interrupt threshold.
IfxQspi_FifoMode | txFifoMode | Specifies the transfer FIFO mode.
IfxQspi_TxFifoInt | txFifoThreshold | Specifies the TXFIFO interrupt threshold.

Variable Documentation

◆ IfxQspi_SpiSlave_dummyRxValue

IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue = 0

dummy variable where recived data is placed

Definition at line 61 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_write().

◆ IfxQspi_SpiSlave_dummyTxValue

IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue = ~0

dummy value to be transmitted

Definition at line 65 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_write().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_initModule()

IFX_EXTERN void IfxQspi_SpiSlave_initModule | ( | IfxQspi_SpiSlave * | handle,
 |  | const IfxQspi_SpiSlave_Config * | config
 | ) |  |

Initialises the module.

Parameters
handle | Module handle
config | Predefined configuration structure of the module
Returns
None

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 107 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_initModuleConfig()

IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig | ( | IfxQspi_SpiSlave_Config * | config,
 |  | Ifx_QSPI * | qspi
 | ) |  |

Fills the config structure with default values.

Parameters
config | Configuration structure which should be initialized.
qspi | pointer to QSPI registers
Returns
None

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 333 of file IfxQspi_SpiSlave.c.


iLLD_TC26B: Support Functions

Functions
Support Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Support Functions:

Functions

IFX_STATIC void | IfxQspi_SpiSlave_read (IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiSlave_write (IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_read()

IFX_STATIC void IfxQspi_SpiSlave_read ( IfxQspi_SpiSlave * handle )

Reads data from the Rx FIFO.

Parameters
handle Module handle
Returns
None

Definition at line 465 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_isrReceive().

◆ IfxQspi_SpiSlave_write()

IFX_STATIC void IfxQspi_SpiSlave_write ( IfxQspi_SpiSlave * handle )

Writes data into the Tx FIFO.

Parameters
handle Module handle
Returns
None

Definition at line 510 of file IfxQspi_SpiSlave.c.

Referenced by IfxQspi_SpiSlave_exchange(), and IfxQspi_SpiSlave_isrTransmit().


iLLD_TC26B: Communication

Functions
Communication
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Communication:

Functions

IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_exchange()

IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange | ( | IfxQspi_SpiSlave * | handle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | count
 | ) |  |

Exchanges data between source and data.

Parameters
handle | Module handle
src | Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
dest | Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
count | Number of data in pending
Returns
Status of exchange of data

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 73 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_getStatus()

IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus ( IfxQspi_SpiSlave * handle )

Gets the transmission status.

Parameters
handle Module handle
Returns
Transmission status

Usage example: see How to use the SPI Slave Interface driver?

Definition at line 94 of file IfxQspi_SpiSlave.c.


iLLD_TC26B: Interrupt Functions

Functions
Interrupt Functions
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Interrupt Functions:

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_isrDmaReceive()

IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive ( IfxQspi_SpiSlave * qspiHandle )

Dma receive interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 362 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrDmaTransmit()

IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit ( IfxQspi_SpiSlave * qspiHandle )

Transmit interrupt handler.

Parameters
qspiHandle Module handle
Returns
None

Definition at line 376 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrError()

IFX_EXTERN void IfxQspi_SpiSlave_isrError ( IfxQspi_SpiSlave * handle )

Error Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 386 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrReceive()

IFX_EXTERN void IfxQspi_SpiSlave_isrReceive ( IfxQspi_SpiSlave * handle )

Receive Interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 453 of file IfxQspi_SpiSlave.c.

◆ IfxQspi_SpiSlave_isrTransmit()

IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit ( IfxQspi_SpiSlave * handle )

Transmit interrupt handler.

Parameters
handle Module handle
Returns
None

Definition at line 459 of file IfxQspi_SpiSlave.c.


iLLD_TC26B: Direct FIFO Access

Functions
Direct FIFO Access
iLLD » QSPI » SPI Slave Driver
Collaboration diagram for Direct FIFO Access:

Functions

IFX_INLINE uint32 | IfxQspi_SpiSlave_readReceiveFifo (IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiSlave_writeTransmitFifo (IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO. More...

Detailed Description

Function Documentation

◆ IfxQspi_SpiSlave_readReceiveFifo()

IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo ( IfxQspi_SpiSlave * handle )

Reads data or status in RxFIFO.

Parameters
handle QSpi Slave handle
Returns
Data or Status in RxFIFO

Definition at line 521 of file IfxQspi_SpiSlave.h.

◆ IfxQspi_SpiSlave_writeTransmitFifo()

IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo | ( | IfxQspi_SpiSlave * | handle,
 |  | uint32 | data
 | ) |  |

Writes the data to TxFIFO.

Parameters
handle | QSpi slave handle
data | Data to be entered in Tx FIFO
Returns
None

Definition at line 529 of file IfxQspi_SpiSlave.h.


iLLD_TC26B: IfxQspi_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxQspi_cfg.h File Reference
iLLD » QSPI

QSPI on-chip implementation data. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxQspi_reg.h"
Include dependency graph for IfxQspi_cfg.h:

Go to the source code of this file.

Macros

#define | IFXQSPI_HWFIFO_DEPTH (4)
#define | IFXQSPI_NUM_MODULES (4)
#define | IFXQSPI_NUM_CHANNELS (16)

Enumerations

enum IfxQspi_Index {
IfxQspi_Index_none = -1,
IfxQspi_Index_0 = 0,
IfxQspi_Index_1,
IfxQspi_Index_2,
IfxQspi_Index_3
}
List of the available QSPI resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap [IFXQSPI_NUM_MODULES]

Detailed Description

QSPI on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi_cfg.h.

Macro Definition Documentation

◆ IFXQSPI_HWFIFO_DEPTH

#define IFXQSPI_HWFIFO_DEPTH (4)

Definition at line 48 of file IfxQspi_cfg.h.

Referenced by IfxQspi_SpiMaster_write(), and IfxQspi_SpiSlave_write().

◆ IFXQSPI_NUM_CHANNELS

#define IFXQSPI_NUM_CHANNELS (16)

Definition at line 52 of file IfxQspi_cfg.h.

◆ IFXQSPI_NUM_MODULES

#define IFXQSPI_NUM_MODULES (4)

Definition at line 50 of file IfxQspi_cfg.h.

Referenced by IfxQspi_getAddress(), and IfxQspi_getIndex().

Enumeration Type Documentation

◆ IfxQspi_Index

enum IfxQspi_Index

List of the available QSPI resources.

Enumerator
IfxQspi_Index_none | Not Selected.
IfxQspi_Index_0 | QSPI index 0.
IfxQspi_Index_1 | QSPI index 1.
IfxQspi_Index_2 | QSPI index 2.
IfxQspi_Index_3 | QSPI index 3.

Definition at line 60 of file IfxQspi_cfg.h.

Variable Documentation

◆ IfxQspi_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]

Definition at line 73 of file IfxQspi_cfg.h.


iLLD_TC26B: IfxQspi_PinMap.c File Reference

  • _PinMap
Variables
IfxQspi_PinMap.c File Reference
iLLD » QSPI

QSPI I/O map. More...

#include "IfxQspi_PinMap.h"
Include dependency graph for IfxQspi_PinMap.c:

Go to the source code of this file.

Variables

IfxQspi_Hsicin_In | IfxQspi2_HSICINA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}
IfxQspi_Hsicin_In | IfxQspi2_HSICINB_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_b}
IfxQspi_Hsicin_In | IfxQspi3_HSICINA_P33_9_IN = {&MODULE_QSPI3, {&MODULE_P33, 9}, Ifx_RxSel_a}
IfxQspi_Hsicin_In | IfxQspi3_HSICINB_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c}
IfxQspi_Mrst_In | IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e}
IfxQspi_Mrst_In | IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a}
IfxQspi_Mrst_In | IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b}
IfxQspi_Mrst_In | IfxQspi3_MRSTD_P33_13_IN = {&MODULE_QSPI3, {&MODULE_P33,13}, Ifx_RxSel_d}
IfxQspi_Mrst_In | IfxQspi3_MRSTE_P22_1_IN = {&MODULE_QSPI3, {&MODULE_P22, 1}, Ifx_RxSel_e}
IfxQspi_Mrst_In | IfxQspi3_MRSTFN_P21_2_IN = {&MODULE_QSPI3, {&MODULE_P21, 2}, Ifx_RxSel_f}
IfxQspi_Mrst_In | IfxQspi3_MRSTFP_P21_3_IN = {&MODULE_QSPI3, {&MODULE_P21, 3}, Ifx_RxSel_f}
IfxQspi_Mrst_Out | IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6}
IfxQspi_Mrst_Out | IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Mrst_Out | IfxQspi3_MRST_P33_13_OUT = {&MODULE_QSPI3, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_In | IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c}
IfxQspi_Mtsr_In | IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a}
IfxQspi_Mtsr_In | IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b}
IfxQspi_Mtsr_In | IfxQspi3_MTSRD_P33_12_IN = {&MODULE_QSPI3, {&MODULE_P33,12}, Ifx_RxSel_d}
IfxQspi_Mtsr_In | IfxQspi3_MTSRE_P22_0_IN = {&MODULE_QSPI3, {&MODULE_P22, 0}, Ifx_RxSel_e}
IfxQspi_Mtsr_Out | IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSRN_P22_2_OUT = {&MODULE_QSPI3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi3_MTSRP_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Mtsr_Out | IfxQspi3_MTSR_P33_12_OUT = {&MODULE_QSPI3, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_In | IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a}
IfxQspi_Sclk_In | IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b}
IfxQspi_Sclk_In | IfxQspi3_SCLKD_P33_11_IN = {&MODULE_QSPI3, {&MODULE_P33,11}, Ifx_RxSel_d}
IfxQspi_Sclk_In | IfxQspi3_SCLKE_P22_3_IN = {&MODULE_QSPI3, {&MODULE_P22, 3}, Ifx_RxSel_e}
IfxQspi_Sclk_Out | IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5}
IfxQspi_Sclk_Out | IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5}
IfxQspi_Sclk_Out | IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLKN_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi3_SCLKP_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Sclk_Out | IfxQspi3_SCLK_P33_11_OUT = {&MODULE_QSPI3, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Slsi_In | IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b}
IfxQspi_Slsi_In | IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b}
IfxQspi_Slsi_In | IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a}
IfxQspi_Slsi_In | IfxQspi3_SLSIC_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_c}
IfxQspi_Slsi_In | IfxQspi3_SLSID_P22_2_IN = {&MODULE_QSPI3, {&MODULE_P22, 2}, Ifx_RxSel_d}
IfxQspi_Slso_Out | IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4}
IfxQspi_Slso_Out | IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO11_P33_10_OUT = {&MODULE_QSPI3, 11, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO12_P22_2_OUT = {&MODULE_QSPI3, 12, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO13_P23_1_OUT = {&MODULE_QSPI3, 13, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO1_P33_9_OUT = {&MODULE_QSPI3, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO2_P33_8_OUT = {&MODULE_QSPI3, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO4_P23_5_OUT = {&MODULE_QSPI3, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO5_P23_4_OUT = {&MODULE_QSPI3, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2}
IfxQspi_Slso_Out | IfxQspi3_SLSO7_P33_7_OUT = {&MODULE_QSPI3, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3}
IfxQspi_Slso_Out | IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3}
const IfxQspi_Hsicin_In * | IfxQspi_Hsicin_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

Detailed Description

QSPI I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi_PinMap.c.

Variable Documentation

◆ IfxQspi0_MRST_P20_12_OUT

IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3}

Definition at line 46 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MRSTA_P20_12_IN

IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a}

Definition at line 32 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSR_P20_12_OUT

IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4}

Definition at line 66 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSR_P20_14_OUT

IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3}

Definition at line 67 of file IfxQspi_PinMap.c.

◆ IfxQspi0_MTSRA_P20_14_IN

IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a}

Definition at line 56 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLK_P20_11_OUT

IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3}

Definition at line 91 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLK_P20_13_OUT

IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5}

Definition at line 92 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SCLKA_P20_11_IN

IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a}

Definition at line 82 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSIA_P20_13_IN

IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a}

Definition at line 106 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSIB_P20_9_IN

IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b}

Definition at line 107 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO0_P20_8_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3}

Definition at line 114 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO13_P15_0_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3}

Definition at line 115 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO1_P20_9_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3}

Definition at line 116 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO2_P20_13_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3}

Definition at line 117 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO3_P11_10_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3}

Definition at line 118 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO4_P11_11_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3}

Definition at line 119 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO5_P11_2_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3}

Definition at line 120 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO6_P20_10_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3}

Definition at line 121 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO7_P33_5_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2}

Definition at line 122 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO8_P20_6_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3}

Definition at line 123 of file IfxQspi_PinMap.c.

◆ IfxQspi0_SLSO9_P20_3_OUT

IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3}

Definition at line 124 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P10_1_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3}

Definition at line 47 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P10_6_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6}

Definition at line 48 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRST_P11_3_OUT

IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3}

Definition at line 49 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRSTA_P10_1_IN

IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a}

Definition at line 33 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MRSTB_P11_3_IN

IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b}

Definition at line 34 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_1_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2}

Definition at line 68 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_3_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3}

Definition at line 69 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P10_4_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4}

Definition at line 70 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSR_P11_9_OUT

IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3}

Definition at line 71 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRA_P10_3_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a}

Definition at line 57 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRB_P11_9_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b}

Definition at line 58 of file IfxQspi_PinMap.c.

◆ IfxQspi1_MTSRC_P10_4_IN

IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c}

Definition at line 59 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLK_P10_2_OUT

IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3}

Definition at line 93 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLK_P11_6_OUT

IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3}

Definition at line 94 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLKA_P10_2_IN

IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a}

Definition at line 83 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SCLKB_P11_6_IN

IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b}

Definition at line 84 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSIA_P11_10_IN

IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a}

Definition at line 108 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO0_P20_8_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4}

Definition at line 125 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO10_P10_0_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3}

Definition at line 126 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO1_P20_9_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4}

Definition at line 127 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO2_P20_13_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4}

Definition at line 128 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO3_P11_10_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4}

Definition at line 129 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO4_P11_11_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4}

Definition at line 130 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO5_P11_2_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4}

Definition at line 131 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO6_P33_10_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2}

Definition at line 132 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO7_P33_5_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3}

Definition at line 133 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO8_P10_4_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3}

Definition at line 134 of file IfxQspi_PinMap.c.

◆ IfxQspi1_SLSO9_P10_5_OUT

IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4}

Definition at line 135 of file IfxQspi_PinMap.c.

◆ IfxQspi2_HSICINA_P15_2_IN

IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}

Definition at line 28 of file IfxQspi_PinMap.c.

◆ IfxQspi2_HSICINB_P15_3_IN

IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_b}

Definition at line 29 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRST_P15_4_OUT

IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3}

Definition at line 50 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRST_P15_7_OUT

IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3}

Definition at line 51 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTA_P15_4_IN

IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a}

Definition at line 35 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTB_P15_7_IN

IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b}

Definition at line 36 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTCN_P21_2_IN

IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c}

Definition at line 37 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTCP_P21_3_IN

IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c}

Definition at line 38 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MRSTE_P15_2_IN

IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e}

Definition at line 39 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSR_P15_5_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3}

Definition at line 74 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSR_P15_6_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3}

Definition at line 75 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRA_P15_5_IN

IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a}

Definition at line 60 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRB_P15_6_IN

IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b}

Definition at line 61 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRN_P13_2_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3}

Definition at line 72 of file IfxQspi_PinMap.c.

◆ IfxQspi2_MTSRP_P13_3_OUT

IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3}

Definition at line 73 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_3_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3}

Definition at line 97 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_6_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5}

Definition at line 98 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLK_P15_8_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3}

Definition at line 99 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKA_P15_3_IN

IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a}

Definition at line 85 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKB_P15_8_IN

IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b}

Definition at line 86 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKN_P13_0_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3}

Definition at line 95 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SCLKP_P13_1_OUT

IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3}

Definition at line 96 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSIA_P15_2_IN

IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a}

Definition at line 109 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSIB_P15_1_IN

IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b}

Definition at line 110 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO0_P15_2_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3}

Definition at line 136 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO1_P14_2_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3}

Definition at line 137 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO2_P14_6_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3}

Definition at line 138 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO3_P14_3_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3}

Definition at line 139 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO4_P14_7_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3}

Definition at line 140 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO5_P15_1_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3}

Definition at line 141 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO6_P33_13_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4}

Definition at line 142 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO7_P20_10_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4}

Definition at line 143 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO8_P20_6_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4}

Definition at line 144 of file IfxQspi_PinMap.c.

◆ IfxQspi2_SLSO9_P20_3_OUT

IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4}

Definition at line 145 of file IfxQspi_PinMap.c.

◆ IfxQspi3_HSICINA_P33_9_IN

IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN = {&MODULE_QSPI3, {&MODULE_P33, 9}, Ifx_RxSel_a}

Definition at line 30 of file IfxQspi_PinMap.c.

◆ IfxQspi3_HSICINB_P33_10_IN

IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_b}

Definition at line 31 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P02_5_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3}

Definition at line 52 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P10_7_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3}

Definition at line 53 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P22_1_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3}

Definition at line 54 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRST_P33_13_OUT

IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT = {&MODULE_QSPI3, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3}

Definition at line 55 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTA_P02_5_IN

IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a}

Definition at line 40 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTB_P10_7_IN

IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b}

Definition at line 41 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTD_P33_13_IN

IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN = {&MODULE_QSPI3, {&MODULE_P33,13}, Ifx_RxSel_d}

Definition at line 42 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTE_P22_1_IN

IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN = {&MODULE_QSPI3, {&MODULE_P22, 1}, Ifx_RxSel_e}

Definition at line 43 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTFN_P21_2_IN

IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN = {&MODULE_QSPI3, {&MODULE_P21, 2}, Ifx_RxSel_f}

Definition at line 44 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MRSTFP_P21_3_IN

IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN = {&MODULE_QSPI3, {&MODULE_P21, 3}, Ifx_RxSel_f}

Definition at line 45 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P02_6_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3}

Definition at line 78 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P10_6_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3}

Definition at line 79 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P22_0_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3}

Definition at line 80 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSR_P33_12_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT = {&MODULE_QSPI3, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3}

Definition at line 81 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRA_P02_6_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a}

Definition at line 62 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRB_P10_6_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b}

Definition at line 63 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRD_P33_12_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN = {&MODULE_QSPI3, {&MODULE_P33,12}, Ifx_RxSel_d}

Definition at line 64 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRE_P22_0_IN

IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN = {&MODULE_QSPI3, {&MODULE_P22, 0}, Ifx_RxSel_e}

Definition at line 65 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRN_P22_2_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT = {&MODULE_QSPI3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4}

Definition at line 76 of file IfxQspi_PinMap.c.

◆ IfxQspi3_MTSRP_P22_3_OUT

IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4}

Definition at line 77 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P02_7_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3}

Definition at line 102 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P10_8_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3}

Definition at line 103 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P22_3_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3}

Definition at line 104 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLK_P33_11_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT = {&MODULE_QSPI3, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3}

Definition at line 105 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKA_P02_7_IN

IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a}

Definition at line 87 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKB_P10_8_IN

IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b}

Definition at line 88 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKD_P33_11_IN

IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN = {&MODULE_QSPI3, {&MODULE_P33,11}, Ifx_RxSel_d}

Definition at line 89 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKE_P22_3_IN

IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN = {&MODULE_QSPI3, {&MODULE_P22, 3}, Ifx_RxSel_e}

Definition at line 90 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKN_P22_0_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4}

Definition at line 100 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SCLKP_P22_1_OUT

IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4}

Definition at line 101 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSIA_P02_4_IN

IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a}

Definition at line 111 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSIC_P33_10_IN

IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_c}

Definition at line 112 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSID_P22_2_IN

IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN = {&MODULE_QSPI3, {&MODULE_P22, 2}, Ifx_RxSel_d}

Definition at line 113 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO0_P02_4_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3}

Definition at line 146 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO11_P33_10_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT = {&MODULE_QSPI3, 11, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3}

Definition at line 147 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO12_P22_2_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT = {&MODULE_QSPI3, 12, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3}

Definition at line 148 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO13_P23_1_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT = {&MODULE_QSPI3, 13, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3}

Definition at line 149 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO1_P02_0_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3}

Definition at line 150 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO1_P33_9_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT = {&MODULE_QSPI3, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3}

Definition at line 151 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO2_P02_1_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3}

Definition at line 152 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO2_P33_8_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT = {&MODULE_QSPI3, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3}

Definition at line 153 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO3_P02_2_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3}

Definition at line 154 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO4_P02_3_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3}

Definition at line 155 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO4_P23_5_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT = {&MODULE_QSPI3, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3}

Definition at line 156 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO5_P02_8_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2}

Definition at line 157 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO5_P23_4_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT = {&MODULE_QSPI3, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3}

Definition at line 158 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO6_P00_8_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2}

Definition at line 159 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO7_P00_9_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2}

Definition at line 160 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO7_P33_7_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT = {&MODULE_QSPI3, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3}

Definition at line 161 of file IfxQspi_PinMap.c.

◆ IfxQspi3_SLSO8_P10_5_OUT

IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3}

Definition at line 162 of file IfxQspi_PinMap.c.

◆ IfxQspi_Hsicin_In_pinTable

const IfxQspi_Hsicin_In* IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
Initial value:
= {
{
NULL_PTR,
NULL_PTR
},
{
NULL_PTR,
NULL_PTR
},
{
&IfxQspi2_HSICINA_P15_2_IN,
&IfxQspi2_HSICINB_P15_3_IN
},
{
&IfxQspi3_HSICINA_P33_9_IN,
&IfxQspi3_HSICINB_P33_10_IN
}
}
IfxQspi2_HSICINA_P15_2_IN
IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
Definition: IfxQspi_PinMap.c:28
IfxQspi2_HSICINB_P15_3_IN
IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
Definition: IfxQspi_PinMap.c:29
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxQspi3_HSICINA_P33_9_IN
IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
Definition: IfxQspi_PinMap.c:30
IfxQspi3_HSICINB_P33_10_IN
IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
Definition: IfxQspi_PinMap.c:31

Definition at line 165 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mrst_In_pinTable

const IfxQspi_Mrst_In* IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]

Definition at line 184 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mrst_Out_pinTable

const IfxQspi_Mrst_Out* IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_MRST_P20_12_OUT,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi1_MRST_P10_1_OUT,
&IfxQspi1_MRST_P10_6_OUT,
&IfxQspi1_MRST_P11_3_OUT,
NULL_PTR
},
{
&IfxQspi2_MRST_P15_4_OUT,
&IfxQspi2_MRST_P15_7_OUT,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi3_MRST_P02_5_OUT,
&IfxQspi3_MRST_P10_7_OUT,
&IfxQspi3_MRST_P22_1_OUT,
&IfxQspi3_MRST_P33_13_OUT
}
}
IfxQspi2_MRST_P15_7_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Definition: IfxQspi_PinMap.c:51
IfxQspi1_MRST_P10_6_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Definition: IfxQspi_PinMap.c:48
IfxQspi3_MRST_P02_5_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Definition: IfxQspi_PinMap.c:52
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxQspi1_MRST_P11_3_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Definition: IfxQspi_PinMap.c:49
IfxQspi3_MRST_P10_7_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Definition: IfxQspi_PinMap.c:53
IfxQspi3_MRST_P33_13_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
Definition: IfxQspi_PinMap.c:55
IfxQspi1_MRST_P10_1_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Definition: IfxQspi_PinMap.c:47
IfxQspi3_MRST_P22_1_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
Definition: IfxQspi_PinMap.c:54
IfxQspi0_MRST_P20_12_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Definition: IfxQspi_PinMap.c:46
IfxQspi2_MRST_P15_4_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Definition: IfxQspi_PinMap.c:50

Definition at line 219 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mtsr_In_pinTable

const IfxQspi_Mtsr_In* IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_MTSRA_P20_14_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi1_MTSRA_P10_3_IN,
&IfxQspi1_MTSRB_P11_9_IN,
&IfxQspi1_MTSRC_P10_4_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi2_MTSRA_P15_5_IN,
&IfxQspi2_MTSRB_P15_6_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi3_MTSRA_P02_6_IN,
&IfxQspi3_MTSRB_P10_6_IN,
NULL_PTR,
&IfxQspi3_MTSRD_P33_12_IN,
&IfxQspi3_MTSRE_P22_0_IN
}
}
IfxQspi3_MTSRE_P22_0_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
Definition: IfxQspi_PinMap.c:65
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxQspi3_MTSRB_P10_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
Definition: IfxQspi_PinMap.c:63
IfxQspi2_MTSRA_P15_5_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
Definition: IfxQspi_PinMap.c:60
IfxQspi1_MTSRB_P11_9_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
Definition: IfxQspi_PinMap.c:58
IfxQspi3_MTSRD_P33_12_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
Definition: IfxQspi_PinMap.c:64
IfxQspi2_MTSRB_P15_6_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
Definition: IfxQspi_PinMap.c:61
IfxQspi1_MTSRC_P10_4_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
Definition: IfxQspi_PinMap.c:59
IfxQspi1_MTSRA_P10_3_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
Definition: IfxQspi_PinMap.c:57
IfxQspi0_MTSRA_P20_14_IN
IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
Definition: IfxQspi_PinMap.c:56
IfxQspi3_MTSRA_P02_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
Definition: IfxQspi_PinMap.c:62

Definition at line 246 of file IfxQspi_PinMap.c.

◆ IfxQspi_Mtsr_Out_pinTable

const IfxQspi_Mtsr_Out* IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]

Definition at line 277 of file IfxQspi_PinMap.c.

◆ IfxQspi_Sclk_In_pinTable

const IfxQspi_Sclk_In* IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_SCLKA_P20_11_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi1_SCLKA_P10_2_IN,
&IfxQspi1_SCLKB_P11_6_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi2_SCLKA_P15_3_IN,
&IfxQspi2_SCLKB_P15_8_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi3_SCLKA_P02_7_IN,
&IfxQspi3_SCLKB_P10_8_IN,
NULL_PTR,
&IfxQspi3_SCLKD_P33_11_IN,
&IfxQspi3_SCLKE_P22_3_IN
}
}
IfxQspi2_SCLKB_P15_8_IN
IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
Definition: IfxQspi_PinMap.c:86
IfxQspi3_SCLKE_P22_3_IN
IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
Definition: IfxQspi_PinMap.c:90
IfxQspi1_SCLKB_P11_6_IN
IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
Definition: IfxQspi_PinMap.c:84
IfxQspi3_SCLKD_P33_11_IN
IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
Definition: IfxQspi_PinMap.c:89
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxQspi2_SCLKA_P15_3_IN
IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
Definition: IfxQspi_PinMap.c:85
IfxQspi1_SCLKA_P10_2_IN
IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
Definition: IfxQspi_PinMap.c:83
IfxQspi3_SCLKB_P10_8_IN
IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
Definition: IfxQspi_PinMap.c:88
IfxQspi0_SCLKA_P20_11_IN
IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
Definition: IfxQspi_PinMap.c:82
IfxQspi3_SCLKA_P02_7_IN
IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
Definition: IfxQspi_PinMap.c:87

Definition at line 312 of file IfxQspi_PinMap.c.

◆ IfxQspi_Sclk_Out_pinTable

const IfxQspi_Sclk_Out* IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]

Definition at line 343 of file IfxQspi_PinMap.c.

◆ IfxQspi_Slsi_In_pinTable

const IfxQspi_Slsi_In* IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxQspi0_SLSIA_P20_13_IN,
&IfxQspi0_SLSIB_P20_9_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi1_SLSIA_P11_10_IN,
NULL_PTR,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi2_SLSIA_P15_2_IN,
&IfxQspi2_SLSIB_P15_1_IN,
NULL_PTR,
NULL_PTR
},
{
&IfxQspi3_SLSIA_P02_4_IN,
NULL_PTR,
&IfxQspi3_SLSIC_P33_10_IN,
&IfxQspi3_SLSID_P22_2_IN
}
}
IfxQspi3_SLSIA_P02_4_IN
IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Definition: IfxQspi_PinMap.c:111
IfxQspi2_SLSIA_P15_2_IN
IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Definition: IfxQspi_PinMap.c:109
IfxQspi3_SLSIC_P33_10_IN
IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
Definition: IfxQspi_PinMap.c:112
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxQspi0_SLSIB_P20_9_IN
IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Definition: IfxQspi_PinMap.c:107
IfxQspi0_SLSIA_P20_13_IN
IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Definition: IfxQspi_PinMap.c:106
IfxQspi3_SLSID_P22_2_IN
IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
Definition: IfxQspi_PinMap.c:113
IfxQspi2_SLSIB_P15_1_IN
IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Definition: IfxQspi_PinMap.c:110
IfxQspi1_SLSIA_P11_10_IN
IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Definition: IfxQspi_PinMap.c:108

Definition at line 378 of file IfxQspi_PinMap.c.

◆ IfxQspi_Slso_Out_pinTable

const IfxQspi_Slso_Out* IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]

Definition at line 405 of file IfxQspi_PinMap.c.


iLLD_TC26B: IfxQspi_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxQspi_PinMap.h File Reference
iLLD » QSPI

QSPI I/O map. More...

#include <IfxQspi_reg.h>
#include <_Impl/IfxQspi_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxQspi_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_Mrst_In
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_In
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_In
SCLK pin mapping structure. More...
struct | IfxQspi_Slsi_In
SLSI pin mapping structure. More...
struct | IfxQspi_Hsicin_In
HSICIN pin mapping structure. More...
struct | IfxQspi_Mrst_Out
MRST pin mapping structure. More...
struct | IfxQspi_Mtsr_Out
MTSR pin mapping structure. More...
struct | IfxQspi_Sclk_Out
SCLK pin mapping structure. More...
struct | IfxQspi_Slso_Out
SLSO pin mapping structure. More...

Macros

#define | IFXQSPI_PINMAP_NUM_MODULES 4
Table dimensions. More...
#define | IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
#define | IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2
#define | IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5
#define | IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6
#define | IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4
#define | IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2

Variables

IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
QSPI2_HSICINA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
QSPI2_HSICINB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
QSPI3_HSICINA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
QSPI3_HSICINB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
QSPI0_MRSTA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
QSPI1_MRSTA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
QSPI1_MRSTB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
QSPI2_MRSTA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
QSPI2_MRSTB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
QSPI2_MRSTCN: QSPI2 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
QSPI2_MRSTCP: QSPI2 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
QSPI2_MRSTE: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
QSPI3_MRSTA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
QSPI3_MRSTB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN
QSPI3_MRSTD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN
QSPI3_MRSTE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN
QSPI3_MRSTFN: QSPI3 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN
QSPI3_MRSTFP: QSPI3 input (LVDS) More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
QSPI0_MRST: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
QSPI1_MRST: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
QSPI2_MRST: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
QSPI2_MRST: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
QSPI3_MRST: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
QSPI0_MTSRA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
QSPI1_MTSRA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
QSPI1_MTSRB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
QSPI1_MTSRC: QSPI1 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
QSPI2_MTSRA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
QSPI2_MTSRB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
QSPI3_MTSRA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
QSPI3_MTSRB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
QSPI3_MTSRD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
QSPI3_MTSRE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
QSPI0_MTSR: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
QSPI0_MTSR: QSPI0 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
QSPI1_MTSR: QSPI1 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
QSPI2_MTSRN: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
QSPI2_MTSRP: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
QSPI2_MTSR: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
QSPI2_MTSR: QSPI2 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT
QSPI3_MTSRN: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT
QSPI3_MTSRP: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT
QSPI3_MTSR: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT
QSPI3_MTSR: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
QSPI0_SCLKA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
QSPI1_SCLKA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
QSPI1_SCLKB: QSPI1 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
QSPI2_SCLKA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
QSPI2_SCLKB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
QSPI3_SCLKA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
QSPI3_SCLKB: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
QSPI3_SCLKD: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
QSPI3_SCLKE: QSPI3 input. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
QSPI0_SCLK: QSPI0 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
QSPI0_SCLK: QSPI0 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
QSPI1_SCLK: QSPI1 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
QSPI1_SCLK: QSPI1 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
QSPI2_SCLKN: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
QSPI2_SCLKP: QSPI2 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
QSPI2_SCLK: QSPI2 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT
QSPI3_SCLKN: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT
QSPI3_SCLKP: QSPI3 output (LVDS) More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT
QSPI3_SCLK: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
QSPI0_SLSIA: QSPI0 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
QSPI0_SLSIB: QSPI0 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
QSPI1_SLSIA: QSPI1 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
QSPI2_SLSIA: QSPI2 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
QSPI2_SLSIB: QSPI2 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
QSPI3_SLSIA: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
QSPI3_SLSIC: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
QSPI3_SLSID: QSPI3 input. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
QSPI0_SLSO0: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
QSPI0_SLSO13: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
QSPI0_SLSO1: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
QSPI0_SLSO2: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
QSPI0_SLSO3: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
QSPI0_SLSO4: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
QSPI0_SLSO5: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
QSPI0_SLSO6: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
QSPI0_SLSO7: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
QSPI0_SLSO8: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
QSPI0_SLSO9: QSPI0 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
QSPI1_SLSO0: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
QSPI1_SLSO10: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
QSPI1_SLSO1: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
QSPI1_SLSO2: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
QSPI1_SLSO3: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
QSPI1_SLSO4: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
QSPI1_SLSO5: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
QSPI1_SLSO6: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
QSPI1_SLSO7: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
QSPI1_SLSO8: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
QSPI1_SLSO9: QSPI1 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
QSPI2_SLSO0: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
QSPI2_SLSO1: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
QSPI2_SLSO2: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
QSPI2_SLSO3: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
QSPI2_SLSO4: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
QSPI2_SLSO5: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
QSPI2_SLSO6: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
QSPI2_SLSO7: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
QSPI2_SLSO8: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
QSPI2_SLSO9: QSPI2 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
QSPI3_SLSO0: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT
QSPI3_SLSO11: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT
QSPI3_SLSO12: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT
QSPI3_SLSO13: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
QSPI3_SLSO1: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT
QSPI3_SLSO1: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
QSPI3_SLSO2: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT
QSPI3_SLSO2: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
QSPI3_SLSO3: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
QSPI3_SLSO4: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT
QSPI3_SLSO4: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
QSPI3_SLSO5: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT
QSPI3_SLSO5: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
QSPI3_SLSO6: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
QSPI3_SLSO7: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT
QSPI3_SLSO7: QSPI3 output. More...
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
QSPI3_SLSO8: QSPI3 output. More...
IFX_EXTERN const IfxQspi_Hsicin_In * | IfxQspi_Hsicin_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
IfxQspi_Hsicin_In table. More...
IFX_EXTERN const IfxQspi_Mrst_In * | IfxQspi_Mrst_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table. More...
IFX_EXTERN const IfxQspi_Mrst_Out * | IfxQspi_Mrst_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table. More...
IFX_EXTERN const IfxQspi_Mtsr_In * | IfxQspi_Mtsr_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table. More...
IFX_EXTERN const IfxQspi_Mtsr_Out * | IfxQspi_Mtsr_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table. More...
IFX_EXTERN const IfxQspi_Sclk_In * | IfxQspi_Sclk_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table. More...
IFX_EXTERN const IfxQspi_Sclk_Out * | IfxQspi_Sclk_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table. More...
IFX_EXTERN const IfxQspi_Slsi_In * | IfxQspi_Slsi_In_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table. More...
IFX_EXTERN const IfxQspi_Slso_Out * | IfxQspi_Slso_Out_pinTable [IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table. More...

Detailed Description

QSPI I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi_PinMap.h.


iLLD_TC26B: IfxQspi_SpiMaster.h File Reference

  • Qspi
  • SpiMaster
Data Structures | Typedefs | Enumerations | Functions
IfxQspi_SpiMaster.h File Reference
iLLD » QSPI

QSPI SPIMASTER details. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Dma/Dma/IfxDma_Dma.h"
#include "Qspi/Std/IfxQspi.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxQspi_SpiMaster.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_SpiMaster_Input
SLSI pin configuration structure. More...
struct | IfxQspi_SpiMaster_Output
SLSO pin configuration structure. More...
struct | IfxQspi_SpiMaster_Dma
Dma handle. More...
struct | IfxQspi_SpiMaster_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags. More...
union | IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins. More...
struct | IfxQspi_SpiMaster_Pins
Master pin IO configuration structure. More...
struct | IfxQspi_SpiMaster
Module handle data structure. More...
struct | IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure. More...
struct | IfxQspi_SpiMaster_Channel_s
Module Channel handle structure. More...
struct | IfxQspi_SpiMaster_Config
Module configuration structure. More...

Typedefs

typedef struct IfxQspi_SpiMaster_Channel_s | IfxQspi_SpiMaster_Channel
typedef void(* | IfxQspi_SpiMaster_AutoSlso) (IfxQspi_SpiMaster_Channel *chHandle)

Enumerations

enum IfxQspi_SpiMaster_ChannelBasedCs {
IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0,
IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1
}
enum IfxQspi_SpiMaster_Mode {
IfxQspi_SpiMaster_Mode_short = 0,
IfxQspi_SpiMaster_Mode_long = 1,
IfxQspi_SpiMaster_Mode_shortContinuous = 2,
IfxQspi_SpiMaster_Mode_longContinuous = 3,
IfxQspi_SpiMaster_Mode_xxl = 4
}

Functions

IFX_EXTERN void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
IFX_EXTERN void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IFX_EXTERN IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...
IFX_INLINE uint32 | IfxQspi_SpiMaster_readReceiveFifo (IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeBasicConfiguration (IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeExtendedConfiguration (IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeMixedDataConfiguration (IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO. More...
IFX_INLINE void | IfxQspi_SpiMaster_writeTransmitFifo (IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO. More...
IFX_EXTERN void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...
IFX_EXTERN SpiIf_ChConfig | IfxQspi_SpiMaster_getChannelConfig (IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiMaster_setChannelBaudrate (IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate. More...

Detailed Description

QSPI SPIMASTER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi_SpiMaster.h.

Typedef Documentation

◆ IfxQspi_SpiMaster_AutoSlso

typedef void(* IfxQspi_SpiMaster_AutoSlso) (IfxQspi_SpiMaster_Channel *chHandle)

Definition at line 502 of file IfxQspi_SpiMaster.h.

◆ IfxQspi_SpiMaster_Channel

typedef struct IfxQspi_SpiMaster_Channel_s IfxQspi_SpiMaster_Channel

Definition at line 500 of file IfxQspi_SpiMaster.h.

Function Documentation

◆ IfxQspi_SpiMaster_getChannelConfig()

IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the channel configuration.

Parameters
chHandle Module Channel handle
Returns
Channel configuration

Definition at line 163 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_SpiMaster_setChannelBaudrate()

IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | float32 | baudrate
 | ) |  |

Set the channel baudrate.

Parameters
chHandle | Module Channel handle
baudrate | Baudrate to be configured (in Baud)
Returns
Status of Channel (busy or ok or failure)

Definition at line 871 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: IfxQspi_SpiSlave.h File Reference

  • Qspi
  • SpiSlave
Data Structures | Functions
IfxQspi_SpiSlave.h File Reference
iLLD » QSPI

QSPI SPISLAVE details. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Dma/Dma/IfxDma_Dma.h"
#include "Qspi/Std/IfxQspi.h"
#include "Scu/Std/IfxScuWdt.h"
Include dependency graph for IfxQspi_SpiSlave.h:

Go to the source code of this file.

Data Structures

struct | IfxQspi_SpiSlave_Dma
Dma handle. More...
struct | IfxQspi_SpiSlave_DmaConfig
Dma configuration. More...
struct | IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags. More...
struct | IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure. More...
struct | IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol. More...
struct | IfxQspi_SpiSlave
Module handle data structure. More...
struct | IfxQspi_SpiSlave_Config
Module configuration structure. More...

Functions

IFX_EXTERN void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
IFX_EXTERN void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
IFX_EXTERN SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
IFX_EXTERN void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...
IFX_INLINE uint32 | IfxQspi_SpiSlave_readReceiveFifo (IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO. More...
IFX_INLINE void | IfxQspi_SpiSlave_writeTransmitFifo (IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO. More...

Detailed Description

QSPI SPISLAVE details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi_SpiSlave.h.


iLLD_TC26B: IfxQspi.h File Reference

  • Qspi
  • Std
Data Structures | Macros | Enumerations | Functions
IfxQspi.h File Reference
iLLD » QSPI

QSPI basic functionality. More...

#include "_Impl/IfxQspi_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "If/SpiIf.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxQspi_PinMap.h"
Include dependency graph for IfxQspi.h:

Go to the source code of this file.

Data Structures

struct IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation. More...

Macros

#define | IFXQSPI_BACONSIZE(Datasize) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))
Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit) More...
#define | IFXQSPI_FIFO32BITSIZE(Datasize) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))
#define | IFXQSPI_GETLONGMODEFIFOSIZE(Datasize) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))
#define | IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)
Errors enable mask for ERRORENS. More...

Enumerations

enum IfxQspi_ChannelId {
IfxQspi_ChannelId_0,
IfxQspi_ChannelId_1,
IfxQspi_ChannelId_2,
IfxQspi_ChannelId_3,
IfxQspi_ChannelId_4,
IfxQspi_ChannelId_5,
IfxQspi_ChannelId_6,
IfxQspi_ChannelId_7,
IfxQspi_ChannelId_8,
IfxQspi_ChannelId_9,
IfxQspi_ChannelId_10,
IfxQspi_ChannelId_11,
IfxQspi_ChannelId_12,
IfxQspi_ChannelId_13,
IfxQspi_ChannelId_14
}
QSPI channel Number (BACON.CS) More...
enum IfxQspi_DataLengthUnit {
IfxQspi_DataLengthUnit_bit = 0,
IfxQspi_DataLengthUnit_byte = 1
}
Data length unit of a frame (BACON.BYTE) More...
enum IfxQspi_Error {
IfxQspi_Error_none = 0,
IfxQspi_Error_parity = 1,
IfxQspi_Error_configuration = 2,
IfxQspi_Error_baudrate = 4,
IfxQspi_Error_txfifoOverflow = 8,
IfxQspi_Error_txfifoUnderflow = 16,
IfxQspi_Error_rxfifoOverflow = 32,
IfxQspi_Error_rxfifoUnderflow = 64,
IfxQspi_Error_expectTimeout = 128,
IfxQspi_Error_slsiMisplacedInactivation = 256
}
QSPI Error Flags (STATUS.ERRORFLAGS) More...
enum IfxQspi_ExpectTimeout {
IfxQspi_ExpectTimeout_64 = 0,
IfxQspi_ExpectTimeout_128 = 1,
IfxQspi_ExpectTimeout_256 = 2,
IfxQspi_ExpectTimeout_512 = 3,
IfxQspi_ExpectTimeout_1024 = 4,
IfxQspi_ExpectTimeout_2048 = 5,
IfxQspi_ExpectTimeout_4096 = 6,
IfxQspi_ExpectTimeout_8192 = 7,
IfxQspi_ExpectTimeout_16384 = 8,
IfxQspi_ExpectTimeout_32768 = 9,
IfxQspi_ExpectTimeout_65536 = 10,
IfxQspi_ExpectTimeout_131072 = 11,
IfxQspi_ExpectTimeout_262144 = 12,
IfxQspi_ExpectTimeout_524288 = 13,
IfxQspi_ExpectTimeout_1048576 = 14,
IfxQspi_ExpectTimeout_2097152 = 15
}
Frame Expect phase time out value. More...
enum IfxQspi_Mode {
IfxQspi_Mode_master = 0,
IfxQspi_Mode_pwmOverQspi = 1,
IfxQspi_Mode_slave = 2
}
QSPI controller mode (GLOBALCON.MODE) More...
enum IfxQspi_PauseRunTransition {
IfxQspi_PauseRunTransition_pause = 0,
IfxQspi_PauseRunTransition_run = 1
}
Request between pause and Run transition. More...
enum IfxQspi_Phase {
IfxQspi_Phase_wait = 0,
IfxQspi_Phase_idleA = 1,
IfxQspi_Phase_idleB = 2,
IfxQspi_Phase_lead = 3,
IfxQspi_Phase_data = 4,
IfxQspi_Phase_trail = 5,
IfxQspi_Phase_expect = 6,
IfxQspi_Phase_leadStrobe = 7,
IfxQspi_Phase_trailStrobe = 8
}
QSPI frame phase (STATUS.PHASE) More...
enum IfxQspi_PhaseTransitionEvent {
IfxQspi_PhaseTransitionEvent_endOfWait = 0,
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1,
IfxQspi_PhaseTransitionEvent_startOfFrame = 2,
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3,
IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4,
IfxQspi_PhaseTransitionEvent_endOfFrame = 5,
IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6,
IfxQspi_PhaseTransitionEvent_endOfExpect = 7
}
Phase Transition Event. More...
enum IfxQspi_Reset {
IfxQspi_Reset_none = 0,
IfxQspi_Reset_stateMachineAndFifo = 7,
IfxQspi_Reset_kernel = 15
}
Reset Request (GLOBALCON.RESETS) More...
enum IfxQspi_RxFifoInt {
IfxQspi_RxFifoInt_0,
IfxQspi_RxFifoInt_1,
IfxQspi_RxFifoInt_2,
IfxQspi_RxFifoInt_3
}
Receive Fifo Interrupt Threshold. More...
enum IfxQspi_SleepMode {
IfxQspi_SleepMode_enable = 0,
IfxQspi_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_QSPI.CLC.B.EDIS. More...
enum IfxQspi_StrobeDelay {
IfxQspi_StrobeDelay_1,
IfxQspi_StrobeDelay_2,
IfxQspi_StrobeDelay_3,
IfxQspi_StrobeDelay_4,
IfxQspi_StrobeDelay_5,
IfxQspi_StrobeDelay_6,
IfxQspi_StrobeDelay_7,
IfxQspi_StrobeDelay_8,
IfxQspi_StrobeDelay_9,
IfxQspi_StrobeDelay_10,
IfxQspi_StrobeDelay_11,
IfxQspi_StrobeDelay_12,
IfxQspi_StrobeDelay_13,
IfxQspi_StrobeDelay_14,
IfxQspi_StrobeDelay_15,
IfxQspi_StrobeDelay_16,
IfxQspi_StrobeDelay_17,
IfxQspi_StrobeDelay_18,
IfxQspi_StrobeDelay_19,
IfxQspi_StrobeDelay_20,
IfxQspi_StrobeDelay_21,
IfxQspi_StrobeDelay_22,
IfxQspi_StrobeDelay_23,
IfxQspi_StrobeDelay_24,
IfxQspi_StrobeDelay_25,
IfxQspi_StrobeDelay_26,
IfxQspi_StrobeDelay_27,
IfxQspi_StrobeDelay_28,
IfxQspi_StrobeDelay_29,
IfxQspi_StrobeDelay_30,
IfxQspi_StrobeDelay_31,
IfxQspi_StrobeDelay_32
}
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE) More...
enum IfxQspi_TxFifoInt {
IfxQspi_TxFifoInt_1,
IfxQspi_TxFifoInt_2,
IfxQspi_TxFifoInt_3,
IfxQspi_TxFifoInt_4
}
Transmit Fifo Interrupt Threshold. More...
enum IfxQspi_FifoMode {
IfxQspi_FifoMode_combinedMove = 0,
IfxQspi_FifoMode_singleMove = 1,
IfxQspi_FifoMode_batchMove = 2
}
Transmit FIFO mode. More...
enum IfxQspi_SuspendMode {
IfxQspi_SuspendMode_none = 0,
IfxQspi_SuspendMode_hard = 1,
IfxQspi_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE void | IfxQspi_clearAllEventFlags (Ifx_QSPI *qspi)
Clear ALL service requests. More...
IFX_INLINE void | IfxQspi_clearRxReq (Ifx_QSPI *qspi)
Clear RX service requests. More...
IFX_INLINE void | IfxQspi_clearTxReq (Ifx_QSPI *qspi)
Clear TX service requests. More...
IFX_INLINE void | IfxQspi_configPT1Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 ) More...
IFX_INLINE void | IfxQspi_configPT2Event (Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event. More...
IFX_INLINE void | IfxQspi_enableLoopbackMode (Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode. More...
IFX_INLINE void | IfxQspi_enablePT1Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event More...
IFX_INLINE void | IfxQspi_enablePT2Event (Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event More...
IFX_INLINE void | IfxQspi_enableUsrEvent (Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1) More...
IFX_INLINE uint16 | IfxQspi_getErrorFlags (Ifx_QSPI *qspi)
IFX_INLINE void | IfxQspi_pause (Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication. More...
IFX_INLINE uint32 | IfxQspi_readReceiveFifo (Ifx_QSPI *qspi)
Read the oldest data from RXFIFO. More...
IFX_INLINE void | IfxQspi_requestReset (Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module) More...
IFX_INLINE void | IfxQspi_run (Ifx_QSPI *qspi)
Request for QSPI in Run state. More...
IFX_INLINE void | IfxQspi_setReceiveFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeTransmitFifo (Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register. More...
IFX_INLINE boolean | IfxQspi_isModuleSuspended (Ifx_QSPI *qspi)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxQspi_setSuspendMode (Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
IFX_EXTERN void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
IFX_EXTERN void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
IFX_EXTERN void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...
IFX_INLINE IfxQspi_Mode | IfxQspi_getMode (Ifx_QSPI *qspi)
Gets the current mode of QSPI. More...
IFX_INLINE float | IfxQspi_getModuleFrequency (Ifx_QSPI *qspi)
Specifies function to get module frequency. More...
IFX_INLINE IfxQspi_Phase | IfxQspi_getPhase (Ifx_QSPI *qspi)
Gets actual transmission phase. More...
IFX_INLINE uint8 | IfxQspi_getReceiveFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of RXFIFO. More...
IFX_INLINE float | IfxQspi_getTimeQuantaFrequency (Ifx_QSPI *qspi)
Gets Time Quanta frequency. More...
IFX_INLINE uint8 | IfxQspi_getTransmitFifoLevel (Ifx_QSPI *qspi)
Gets the filling level of TXFIFO. More...
IFX_INLINE boolean | IfxQspi_isModuleEnabled (Ifx_QSPI *qspi)
Specifies the Module enable or disable status. More...
IFX_INLINE void | IfxQspi_setDisableModuleRequest (Ifx_QSPI *qspi)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setEnableModuleRequest (Ifx_QSPI *qspi)
Sets the enable module request. More...
IFX_INLINE void | IfxQspi_setSleepMode (Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request. More...
IFX_INLINE void | IfxQspi_setTransmitFifoInterrruptThreshold (Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation. More...
IFX_INLINE void | IfxQspi_writeBasicConfiguration (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationBeginStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0. More...
IFX_INLINE void | IfxQspi_writeBasicConfigurationEndStream (Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1. More...
IFX_INLINE void | IfxQspi_writeExtendedConfiguration (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register. More...
IFX_INLINE void | IfxQspi_writeMixedDataTransmitFifo (Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register. More...
IFX_EXTERN float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
IFX_EXTERN uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
IFX_EXTERN uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
IFX_EXTERN uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
IFX_EXTERN Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IFX_EXTERN IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
IFX_EXTERN uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
IFX_EXTERN void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
IFX_EXTERN void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getErrorSrc (Ifx_QSPI *qspi)
Gets the Error request value. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getReceiveSrc (Ifx_QSPI *qspi)
Gets the RXFIFO service request. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxQspi_getTransmitSrc (Ifx_QSPI *qspi)
Gets the TXFIFO service request. More...
IFX_INLINE void | IfxQspi_initMrstInPin (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input. More...
IFX_INLINE void | IfxQspi_initMrstOutPin (const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output. More...
IFX_INLINE void | IfxQspi_initMtsrInPin (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input. More...
IFX_INLINE void | IfxQspi_initMtsrOutPin (const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output. More...
IFX_INLINE void | IfxQspi_initSclkInPin (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input. More...
IFX_INLINE void | IfxQspi_initSclkOutPin (const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output. More...
IFX_INLINE void | IfxQspi_initSlsi (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input. More...
IFX_INLINE void | IfxQspi_initSlso (const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output. More...
IFX_INLINE IfxQspi_FifoMode | IfxQspi_getRxFifoMode (Ifx_QSPI *qspi)
Get the Receive FIFO mode. More...
IFX_INLINE IfxQspi_FifoMode | IfxQspi_getTxFifoMode (Ifx_QSPI *qspi)
Get the Transfer FIFO mode. More...
IFX_INLINE void | IfxQspi_permutateBigEndian (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
Permutate bytes to / from Big Endian. More...
IFX_INLINE void | IfxQspi_setBitsegment1 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
Set the value of bit segment1 (A). More...
IFX_INLINE void | IfxQspi_setBitsegment2 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
Set the value of bit segment2 (B). More...
IFX_INLINE void | IfxQspi_setBitsegment3 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
Set the value of bit segment3 (C). More...
IFX_INLINE void | IfxQspi_setRxFifoMode (Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
IFX_INLINE void | IfxQspi_setTimeQuantum (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
Set the value of Time Quantum. More...
IFX_INLINE void | IfxQspi_setTxFifoMode (Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Set the transfer FIFO mode. More...
IFX_INLINE void | IfxQspi_initMrstInPinWithPadLevel (const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initMtsrInPinWithPadLevel (const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initSclkInPinWithPadLevel (const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver. More...
IFX_INLINE void | IfxQspi_initSlsiWithPadLevel (const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver. More...

Detailed Description

QSPI basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi.h.

Data Structure Documentation

◆ IfxQspi_DelayConst

struct IfxQspi_DelayConst

Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation.

Definition at line 289 of file IfxQspi.h.

Data Fields
uint8 | delay | delay multiplier
uint8 | pre | specifies the prescalar value

Macro Definition Documentation

◆ IFXQSPI_BACONSIZE

#define IFXQSPI_BACONSIZE ( Datasize ) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))

Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit)

Definition at line 57 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeLong().

◆ IFXQSPI_ERRORENABLEMASK

#define IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)

Errors enable mask for ERRORENS.

Definition at line 65 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule(), and IfxQspi_SpiSlave_initModule().

◆ IFXQSPI_FIFO32BITSIZE

#define IFXQSPI_FIFO32BITSIZE ( Datasize ) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))

Definition at line 59 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_writeLong().

◆ IFXQSPI_GETLONGMODEFIFOSIZE

#define IFXQSPI_GETLONGMODEFIFOSIZE ( Datasize ) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))

Definition at line 61 of file IfxQspi.h.

Enumeration Type Documentation

◆ IfxQspi_FifoMode

enum IfxQspi_FifoMode

Transmit FIFO mode.

Enumerator
IfxQspi_FifoMode_combinedMove | Combined Move Mode.
IfxQspi_FifoMode_singleMove | Single Move Mode.
IfxQspi_FifoMode_batchMove | Batch Move Mode.

Definition at line 266 of file IfxQspi.h.

◆ IfxQspi_SuspendMode

enum IfxQspi_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxQspi_SuspendMode_none | No suspend.
IfxQspi_SuspendMode_hard | Hard Suspend.
IfxQspi_SuspendMode_soft | Soft Suspend.

Definition at line 275 of file IfxQspi.h.

Function Documentation

◆ IfxQspi_getRxFifoMode()

IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode ( Ifx_QSPI * qspi )

Get the Receive FIFO mode.

Parameters
qspi Pointer to QSPI module registers
Returns
Receive FIFO mode

Definition at line 986 of file IfxQspi.h.

◆ IfxQspi_getTxFifoMode()

IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode ( Ifx_QSPI * qspi )

Get the Transfer FIFO mode.

Parameters
qspi Pointer to QSPI module registers
Returns
Transfer FIFO mode

Definition at line 1011 of file IfxQspi.h.

◆ IfxQspi_initMrstInPinWithPadLevel()

IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel | ( | const IfxQspi_Mrst_In * | mrstIn,
 |  | IfxPort_InputMode | mrstInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver.

Parameters
mrstIn | the MRST Pin which should be configured
mrstInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1252 of file IfxQspi.h.

Referenced by IfxQspi_SpiMaster_initModule().

◆ IfxQspi_initMtsrInPinWithPadLevel()

IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel | ( | const IfxQspi_Mtsr_In * | mtsrIn,
 |  | IfxPort_InputMode | mtsrInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver.

Parameters
mtsrIn | the MTSR Pin which should be configured
mtsrInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1260 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initSclkInPinWithPadLevel()

IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel | ( | const IfxQspi_Sclk_In * | sclkIn,
 |  | IfxPort_InputMode | sclkInMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver.

Parameters
sclkIn | the SCLK Pin which should be configured
sclkInMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1268 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_initSlsiWithPadLevel()

IFX_INLINE void IfxQspi_initSlsiWithPadLevel | ( | const IfxQspi_Slsi_In * | slsi,
 |  | IfxPort_InputMode | slsiMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of SLSI pin direction as input and configuring pad driver.

Parameters
slsi | the SLSI Pin which should be configured
slsiMode | the pin input mode which should be configured
padDriver | Pad Driver
Returns
None

Definition at line 1276 of file IfxQspi.h.

Referenced by IfxQspi_SpiSlave_initModule().

◆ IfxQspi_permutateBigEndian()

IFX_INLINE void IfxQspi_permutateBigEndian | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bigEndian
 | ) |  |

Permutate bytes to / from Big Endian.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bigEndian | specifies to Permutate bytes to / from Big Endian
Returns
None

Definition at line 1089 of file IfxQspi.h.

◆ IfxQspi_setBitsegment1()

IFX_INLINE void IfxQspi_setBitsegment1 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment1
 | ) |  |

Set the value of bit segment1 (A).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment1 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1114 of file IfxQspi.h.

◆ IfxQspi_setBitsegment2()

IFX_INLINE void IfxQspi_setBitsegment2 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment2
 | ) |  |

Set the value of bit segment2 (B).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment2 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1121 of file IfxQspi.h.

◆ IfxQspi_setBitsegment3()

IFX_INLINE void IfxQspi_setBitsegment3 | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint8 | bitSegment3
 | ) |  |

Set the value of bit segment3 (C).

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
bitSegment3 | Length expressed in time quantums of ECONz.Q.
Returns
None

Definition at line 1128 of file IfxQspi.h.

◆ IfxQspi_setRxFifoMode()

IFX_INLINE void IfxQspi_setRxFifoMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_FifoMode | mode
 | ) |  |
Parameters
qspi | Pointer to QSPI module registers
mode | select the transfer fifo mode
Returns
None

Definition at line 1153 of file IfxQspi.h.

◆ IfxQspi_setTimeQuantum()

IFX_INLINE void IfxQspi_setTimeQuantum | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_ChannelId | channelId,
 |  | uint32 | timeQuantum
 | ) |  |

Set the value of Time Quantum.

Parameters
qspi | Pointer to QSPI module registers
channelId | Channel number to which econ val belongs
timeQuantum | specifies the value of Time Quantum.
Returns
None

Definition at line 1165 of file IfxQspi.h.

◆ IfxQspi_setTxFifoMode()

IFX_INLINE void IfxQspi_setTxFifoMode | ( | Ifx_QSPI * | qspi,
 |  | IfxQspi_FifoMode | mode
 | ) |  |

Set the transfer FIFO mode.

Parameters
qspi | Pointer to QSPI module registers
mode | select the transfer fifo mode
Returns
None

Definition at line 1178 of file IfxQspi.h.


iLLD_TC26B: SCU

Modules | Files
SCU
iLLD
Collaboration diagram for SCU:

Modules

Implementation
Standard Driver
SCU Pin Mapping
How to use the Scu Clock driver?

Files

file | IfxScu_cfg.h
SCU on-chip implementation data.
file | IfxScu_PinMap.c
SCU I/O map.
file | IfxScu_PinMap.h
SCU I/O map.
file | IfxScuCcu.h
SCU basic functionality.
file | IfxScuEru.h
SCU basic functionality.
file | IfxScuWdt.asm.h
SCU basic functionality.
file | IfxScuWdt.h
SCU basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » SCU
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » SCU
Collaboration diagram for Standard Driver:

Modules

Ccu Basic Functionality
Eru Basic Functionality
Wdt Basic Functionality

Detailed Description


iLLD_TC26B: Ccu Basic Functionality

Modules
Ccu Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Ccu Basic Functionality:

Modules

Clock Control Functions
Clock Control Operative Functions
Clock Control Configuration Functions
Enumerations

Detailed Description


iLLD_TC26B: Clock Control Functions

Data Structures | Functions
Clock Control Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Functions:

Data Structures

struct | IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers. More...
struct | IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step. More...
struct | IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control. More...
struct | IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution. More...
struct | IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration. More...
struct | IfxScuCcu_SysPllConfig
Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers . More...
struct | IfxScuCcu_Config
Configuration structure SCU module. More...
struct | IfxScuCcu_ErayPllConfig
Configuration structure for E-ray PLL. More...

Functions

IFX_STATIC boolean | IfxScuCcu_isOscillatorStable (void)
Check if oscillator is stable. More...
IFX_STATIC void | IfxScuCcu_wait (float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled. More...

Detailed Description

Data Structure Documentation

◆ IfxScuCcu_CcuconRegConfig

struct IfxScuCcu_CcuconRegConfig

Configuration structure type for CCUCON registers.

Definition at line 704 of file IfxScuCcu.h.

Data Fields
uint32 | mask | CCUCON Mask to select the bit fields to be updated.
uint32 | value | CCUCON Register value to be updated.

◆ IfxScuCcu_InitialStepConfig

struct IfxScuCcu_InitialStepConfig

Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step.

Definition at line 713 of file IfxScuCcu.h.

Data Fields
uint8 | k2Initial | K2 divider value for basic (initial) step.
uint8 | nDivider | N divider value for basic (initial) step.
uint8 | pDivider | P divider value for basic (initial) step.
float32 | waitTime | Wait time for for basic (initial) step.

◆ IfxScuCcu_PllStepsConfig

struct IfxScuCcu_PllStepsConfig

Configuration structure type for the Pll Steps for current jump control.

Definition at line 723 of file IfxScuCcu.h.

Data Fields
IfxScuCcu_PllStepsFunctionHook | hookFunction | Hook function called at the end of this step.
uint8 | k2Step | K2 divider value for this step.
float32 | waitTime | Wait time for for this step.

◆ IfxScuCcu_ClockDistributionConfig

struct IfxScuCcu_ClockDistributionConfig

Configuration structure type for all the CCUCON registers to configure clock distribution.

Definition at line 736 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_ClockDistributionConfig:
[legend]
Data Fields
IfxScuCcu_CcuconRegConfig | ccucon0 | CCUCON0 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon1 | CCUCON1 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon2 | CCUCON2 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon5 | CCUCON5 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon6 | CCUCON6 Register configuration.
IfxScuCcu_CcuconRegConfig | ccucon7 | CCUCON7 Register configuration.

◆ IfxScuCcu_FlashWaitstateConfig

struct IfxScuCcu_FlashWaitstateConfig

Configuration structure type for the Flash waitstate configuration.

Definition at line 748 of file IfxScuCcu.h.

Data Fields
uint32 | mask | FLASH.FCON Mask to select the bit fields to be updated.
uint32 | value | FLASH.FCON Register value to be updated.

◆ IfxScuCcu_SysPllConfig

struct IfxScuCcu_SysPllConfig

Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers .

Definition at line 757 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_SysPllConfig:
[legend]
Data Fields
uint8 | numOfPllDividerSteps | Number of PLL divider steps during clock throttling.
IfxScuCcu_PllStepsConfig * | pllDividerStep | Pointer to the array of Pll divider step configuration.
IfxScuCcu_InitialStepConfig | pllInitialStep | Configuration of first step which is same as internal osc frequency.

◆ IfxScuCcu_Config

struct IfxScuCcu_Config

Configuration structure SCU module.

Definition at line 770 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_Config:
[legend]
Data Fields
IfxScuCcu_ClockDistributionConfig | clockDistribution | Configuration of of bus clocks and other module clock distribution.
IfxScuCcu_FlashWaitstateConfig | flashFconWaitStateConfig | Configuration of flash waitstate.
IfxScuCcu_SysPllConfig | sysPll | System PLL configuration.
uint32 | xtalFrequency | Xtal Frequency.

◆ IfxScuCcu_ErayPllConfig

struct IfxScuCcu_ErayPllConfig

Configuration structure for E-ray PLL.

Definition at line 780 of file IfxScuCcu.h.

Collaboration diagram for IfxScuCcu_ErayPllConfig:
[legend]
Data Fields
IfxScuCcu_InitialStepConfig pllInitialStep Configuration of first step which is same as internal osc frequency.

Function Documentation

◆ IfxScuCcu_isOscillatorStable()

IFX_STATIC boolean IfxScuCcu_isOscillatorStable ( void )

Check if oscillator is stable.

Returns
Status of oscillator stability
Return values
TRUE | Oscillator is unstable
FALSE | Oscillator is stable

Definition at line 1003 of file IfxScuCcu.c.

Referenced by IfxScuCcu_init().

◆ IfxScuCcu_wait()

IFX_STATIC void IfxScuCcu_wait ( float32 timeSec )

API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled.

Returns
None

Definition at line 1330 of file IfxScuCcu.c.

Referenced by IfxScuCcu_init(), IfxScuCcu_initErayPll(), and IfxScuCcu_switchToBackupClock().


iLLD_TC26B: Clock Control Operative Functions

Functions
Clock Control Operative Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Operative Functions:

Functions

IFX_INLINE float32 | IfxScuCcu_getEvrFrequency (void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller. More...
IFX_INLINE float32 | IfxScuCcu_getPll2ErayFrequency (void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock. More...
IFX_INLINE float32 | IfxScuCcu_getPll2Frequency (void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock. More...
IFX_INLINE IfxScu_CCUCON0_CLKSEL | IfxScuCcu_getSourceSelection (void)
Returns the clock source selection. More...
IFX_INLINE float32 | IfxScuCcu_getStmFrequency (void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getCanFrequency (void)
API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getBaud1Frequency (void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getBaud2Frequency (void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX. More...
IFX_EXTERN float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
IFX_EXTERN float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getMaxFrequency (void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getOsc0Frequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getOscFrequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllErayFrequency (void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllErayVcoFrequency (void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLERAYCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllFrequency (void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllVcoFrequency (void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getSourceFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
IFX_EXTERN float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setPll2ErayFrequency (float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setPll2Frequency (float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...

Detailed Description

Function Documentation

◆ IfxScuCcu_getBaud1Frequency()

IFX_EXTERN float32 IfxScuCcu_getBaud1Frequency ( void )

API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON register and the input oscillator.

Returns
Baud1 frequency in Hz

Definition at line 195 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), IfxI2c_getBaudrate(), and IfxI2c_setBaudrate().

◆ IfxScuCcu_getBaud2Frequency()

IFX_EXTERN float32 IfxScuCcu_getBaud2Frequency ( void )

API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX.

Returns
Baud2 frequency in Hz

Definition at line 213 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), and IfxPsi5s_Psi5s_setBaudrate().

◆ IfxScuCcu_getBbbFrequency()

IFX_EXTERN float32 IfxScuCcu_getBbbFrequency ( void )

API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator.

Returns
BBB frequency (fBBB) in Hz

Definition at line 231 of file IfxScuCcu.c.

◆ IfxScuCcu_getCanFrequency()

IFX_INLINE float32 IfxScuCcu_getCanFrequency ( void )

API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE.

Returns
STM frequency (fSTM) in Hz

Definition at line 1108 of file IfxScuCcu.h.

Referenced by IfxMultican_Can_getConfig().

◆ IfxScuCcu_getCpuFrequency()

IFX_EXTERN float32 IfxScuCcu_getCpuFrequency ( const IfxCpu_ResourceCpu cpu )

This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency.

Parameters
cpu CPU number for which effective fCPU is sought
Returns
Cpu[x] frequency in Hz, where x is cpu number passed as parameter

Definition at line 273 of file IfxScuCcu.c.

◆ IfxScuCcu_getEvrFrequency()

IFX_INLINE float32 IfxScuCcu_getEvrFrequency ( void )

API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller.

Returns
EVR Oscillator frequency (fBACK or fEVR) in Hz.

Definition at line 1065 of file IfxScuCcu.h.

Referenced by IfxScuCcu_getSourceFrequency().

◆ IfxScuCcu_getFsi2Frequency()

IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency ( void )

API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
FSI2 frequency (fFSI2) in Hz.

Definition at line 300 of file IfxScuCcu.c.

◆ IfxScuCcu_getFsiFrequency()

IFX_EXTERN float32 IfxScuCcu_getFsiFrequency ( void )

API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator.

Returns
FSI frequency (fFSI) in Hz.

Definition at line 323 of file IfxScuCcu.c.

◆ IfxScuCcu_getMaxFrequency()

IFX_EXTERN float32 IfxScuCcu_getMaxFrequency ( void )

API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator.

Returns
Max frequency (fMAX) in Hz.

Definition at line 346 of file IfxScuCcu.c.

Referenced by IfxQspi_calcRealBaudrate(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_getModuleFrequency(), IfxScuCcu_getBaud1Frequency(), and IfxScuCcu_getBaud2Frequency().

◆ IfxScuCcu_getModuleFrequency()

IFX_EXTERN float32 IfxScuCcu_getModuleFrequency ( void )

get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration.

Returns
Module frequency in Hz

Definition at line 387 of file IfxScuCcu.c.

◆ IfxScuCcu_getOsc0Frequency()

IFX_EXTERN float32 IfxScuCcu_getOsc0Frequency ( void )

API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
Osc0 frequency (fOSC0) in Hz.

Definition at line 412 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), IfxDsadc_getModulatorInputClockFreq(), and IfxMultican_Can_getConfig().

◆ IfxScuCcu_getOscFrequency()

IFX_EXTERN float32 IfxScuCcu_getOscFrequency ( void )

API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.

Returns
Osc frequency (fOSC) in Hz.

Definition at line 418 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getPllErayFrequency(), IfxScuCcu_getPllErayVcoFrequency(), IfxScuCcu_getPllFrequency(), and IfxScuCcu_getPllVcoFrequency().

◆ IfxScuCcu_getPll2ErayFrequency()

IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency ( void )

API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.

Returns
PLL2ERAY (K3 Divider for ADC clock) frequency in Hz

Definition at line 1077 of file IfxScuCcu.h.

Referenced by IfxMtu_waitForMbistDone(), and IfxScuCcu_setPll2ErayFrequency().

◆ IfxScuCcu_getPll2Frequency()

IFX_INLINE float32 IfxScuCcu_getPll2Frequency ( void )

API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.

Returns
PLL2 (K3 Divider for ADC clock) frequency in Hz

Definition at line 1087 of file IfxScuCcu.h.

Referenced by IfxScuCcu_setPll2Frequency().

◆ IfxScuCcu_getPllErayFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllErayFrequency ( void )

API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.

Returns
frequency of Pll Eray (fPLLERAY) in Hz

Definition at line 440 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), IfxDsadc_getModulatorInputClockFreq(), and IfxMultican_Can_getConfig().

◆ IfxScuCcu_getPllErayVcoFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllErayVcoFrequency ( void )

API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLERAYCON registers and the input oscillator.

Returns
Pll (Eray) VCO frequency

Definition at line 468 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getPll2ErayFrequency(), and IfxScuCcu_setPll2ErayFrequency().

◆ IfxScuCcu_getPllFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllFrequency ( void )

API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.

Returns
Pll (fPLL) frequency in Hz

Definition at line 487 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getSourceFrequency().

◆ IfxScuCcu_getPllVcoFrequency()

IFX_EXTERN float32 IfxScuCcu_getPllVcoFrequency ( void )

API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLCON registers and the input oscillator.

Returns
Pll VCO frequency

Definition at line 515 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getPll2Frequency(), and IfxScuCcu_setPll2Frequency().

◆ IfxScuCcu_getSourceFrequency()

IFX_EXTERN float32 IfxScuCcu_getSourceFrequency ( void )

get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration.

Returns
Effective fSOURCE in Hz

Definition at line 534 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getBbbFrequency(), IfxScuCcu_getCanFrequency(), IfxScuCcu_getGtmFrequency(), IfxScuCcu_getMaxFrequency(), IfxScuCcu_getSpbFrequency(), IfxScuCcu_getSriFrequency(), IfxScuCcu_getStmFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setSpbFrequency(), and IfxScuCcu_setSriFrequency().

◆ IfxScuCcu_getSourceSelection()

IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection ( void )

Returns the clock source selection.

Returns
Clock source selection

Definition at line 1096 of file IfxScuCcu.h.

◆ IfxScuCcu_getSpbFrequency()

IFX_EXTERN float32 IfxScuCcu_getSpbFrequency ( void )

API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers.

Returns
SPB frequency (fSPB) in Hz

Definition at line 555 of file IfxScuCcu.c.

Referenced by IfxAsclin_getFaFrequency(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_updateInputFrequency(), IfxDsadc_getModulatorInputClockFreq(), IfxGpt12_getModuleFrequency(), IfxIom_getFrequency(), IfxMsc_downstreamAbraBaudCalculator(), IfxMsc_downstreamFractionalBaudCalculator(), IfxMsc_downstreamNormalBaudCalculator(), IfxMsc_upstreamFractionalBaudCalculator(), IfxMsc_upstreamNormalBaudCalculator(), IfxMultican_Can_initModule(), IfxMultican_Can_initModuleConfig(), IfxPsi5_Psi5_getFracDivClock(), IfxPsi5_Psi5_initializeClock(), IfxPsi5_Psi5_initModuleConfig(), IfxPsi5s_Psi5s_getFracDivClock(), IfxPsi5s_Psi5s_initializeClock(), IfxPsi5s_Psi5s_initModuleConfig(), IfxScuCcu_getModuleFrequency(), IfxScuCcu_setSpbFrequency(), IfxSent_getModuleClock(), IfxVadc_Adc_initModuleConfig(), IfxVadc_getAdcAnalogFrequency(), IfxVadc_getAdcDigitalFrequency(), IfxVadc_getAdcModuleFrequency(), IfxVadc_initializeFAdcD(), and IfxVadc_initializeFAdcI().

◆ IfxScuCcu_getSriFrequency()

IFX_EXTERN float32 IfxScuCcu_getSriFrequency ( void )

API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE.

Returns
Sri frequency (fSRI) in Hz

Definition at line 597 of file IfxScuCcu.c.

Referenced by IfxMtu_waitForMbistDone(), IfxScuCcu_getCpuFrequency(), IfxScuCcu_getFsi2Frequency(), IfxScuCcu_getFsiFrequency(), IfxScuCcu_setCpuFrequency(), and IfxScuCcu_setSriFrequency().

◆ IfxScuCcu_getStmFrequency()

IFX_INLINE float32 IfxScuCcu_getStmFrequency ( void )

API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE.

Returns
STM frequency (fSTM) in Hz

Definition at line 1102 of file IfxScuCcu.h.

Referenced by IfxCpu_waitEvent(), IfxScuCcu_wait(), and IfxStm_getFrequency().

◆ IfxScuCcu_setCpuFrequency()

IFX_EXTERN float32 IfxScuCcu_setCpuFrequency | ( | IfxCpu_ResourceCpu | cpu,
 |  | float32 | cpuFreq
 | ) |  |

API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value.

Parameters
cpu | CPU number for which fCPU to be configured
cpuFreq | Desired CPU frequency in Hz
Returns
Actual CPU[x] frequency in Hz, where x is the cpu number passed as parameter

Definition at line 1048 of file IfxScuCcu.c.

◆ IfxScuCcu_setPll2ErayFrequency()

IFX_EXTERN float32 IfxScuCcu_setPll2ErayFrequency ( float32 pll2ErayFreq )

API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value.

Parameters
pll2ErayFreq PLL2ERAY (K3 Divider for ADC clock) frequency in Hz
Returns
Actual PLL2 (K3 Divider for ADC clock) frequency in Hz

Definition at line 1131 of file IfxScuCcu.c.

◆ IfxScuCcu_setPll2Frequency()

IFX_EXTERN float32 IfxScuCcu_setPll2Frequency ( float32 pll2Freq )

API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value.

Parameters
pll2Freq PLL2 (K3 Divider for ADC clock) frequency in Hz
Returns
Actual PLL2 (K3 Divider for ADC clock) frequency in Hz

Definition at line 1144 of file IfxScuCcu.c.

◆ IfxScuCcu_setSpbFrequency()

IFX_EXTERN float32 IfxScuCcu_setSpbFrequency ( float32 spbFreq )

API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
spbFreq Desired SPB frequency in Hz
Returns
Actual SPB frequency in Hz

Definition at line 1157 of file IfxScuCcu.c.

◆ IfxScuCcu_setSriFrequency()

IFX_EXTERN float32 IfxScuCcu_setSriFrequency ( float32 sriFreq )

API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
sriFreq Sri frequency (fSRI) in Hz
Returns
Actual Sri frequency (fSRI) in Hz

Definition at line 1206 of file IfxScuCcu.c.


iLLD_TC26B: Clock Control Configuration Functions

Functions
Clock Control Configuration Functions
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Clock Control Configuration Functions:

Functions

IFX_EXTERN boolean | IfxScuCcu_calculateSysPllDividers (IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency. More...
IFX_EXTERN boolean | IfxScuCcu_init (const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure. More...
IFX_EXTERN void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN boolean | IfxScuCcu_initErayPll (const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by the configuration structure. More...
IFX_EXTERN void | IfxScuCcu_initErayPllConfig (IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...

Detailed Description

Function Documentation

◆ IfxScuCcu_calculateSysPllDividers()

IFX_EXTERN boolean IfxScuCcu_calculateSysPllDividers | ( | IfxScuCcu_Config * | cfg,
 |  | uint32 | fPll
 | ) |  |

The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency.

Parameters
cfg | Pointer to the configuration structure of the ScuCcu
fPll | Desired PLL frequency.
Returns
0- Success, 1 - Failure

Definition at line 93 of file IfxScuCcu.c.

◆ IfxScuCcu_init()

IFX_EXTERN boolean IfxScuCcu_init ( const IfxScuCcu_Config * cfg )

API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure.

Parameters
cfg Pointer to the configuration structure of the ScuCcu
Returns
Error status of the ScuCcu initialization process.
Return values
TRUE | If an error occurred during initialization.
FALSE | If initialization was successful.

Definition at line 639 of file IfxScuCcu.c.

◆ IfxScuCcu_initConfig()

IFX_EXTERN void IfxScuCcu_initConfig ( IfxScuCcu_Config * cfg )

Initializes the clock configuration with default values.

Parameters
cfg Pointer to the configuration structure of the ScuCcu
Returns
None

Definition at line 892 of file IfxScuCcu.c.

◆ IfxScuCcu_initErayPll()

IFX_EXTERN boolean IfxScuCcu_initErayPll ( const IfxScuCcu_ErayPllConfig * cfg )

API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by the configuration structure.

Parameters
cfg Pointer to the configuration structure of the Eray Pll
Returns
Error status of the ScuCcu Eray Pll initialization process.
Return values
TRUE | If an error occurred during initialization.
FALSE | If initialization was successful.

Definition at line 898 of file IfxScuCcu.c.

◆ IfxScuCcu_initErayPllConfig()

IFX_EXTERN void IfxScuCcu_initErayPllConfig ( IfxScuCcu_ErayPllConfig * cfg )

Initializes the clock configuration with default values.

Parameters
cfg Pointer to the configuration structure of the ScuCcuEray Pll
Returns
None

Definition at line 997 of file IfxScuCcu.c.

◆ IfxScuCcu_switchToBackupClock()

IFX_EXTERN void IfxScuCcu_switchToBackupClock ( const IfxScuCcu_Config * cfg )

API to switch to Backup clock from the current PLL frequency.

Parameters
cfg Pointer to the configuration structure of the ScuCcu
Returns
None

Definition at line 1246 of file IfxScuCcu.c.


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » SCU » Standard Driver » Ccu Basic Functionality
Collaboration diagram for Enumerations:

Enumerations

enum IfxScuCcu_K1divider {
IfxScuCcu_K1divider_1 = 0,
IfxScuCcu_K1divider_2,
IfxScuCcu_K1divider_3,
IfxScuCcu_K1divider_4,
IfxScuCcu_K1divider_5,
IfxScuCcu_K1divider_6,
IfxScuCcu_K1divider_7,
IfxScuCcu_K1divider_8,
IfxScuCcu_K1divider_9,
IfxScuCcu_K1divider_10,
IfxScuCcu_K1divider_11,
IfxScuCcu_K1divider_12,
IfxScuCcu_K1divider_13,
IfxScuCcu_K1divider_14,
IfxScuCcu_K1divider_15,
IfxScuCcu_K1divider_16,
IfxScuCcu_K1divider_17,
IfxScuCcu_K1divider_18,
IfxScuCcu_K1divider_19,
IfxScuCcu_K1divider_20,
IfxScuCcu_K1divider_21,
IfxScuCcu_K1divider_22,
IfxScuCcu_K1divider_23,
IfxScuCcu_K1divider_24,
IfxScuCcu_K1divider_25,
IfxScuCcu_K1divider_26,
IfxScuCcu_K1divider_27,
IfxScuCcu_K1divider_28,
IfxScuCcu_K1divider_29,
IfxScuCcu_K1divider_30,
IfxScuCcu_K1divider_31,
IfxScuCcu_K1divider_32,
IfxScuCcu_K1divider_33,
IfxScuCcu_K1divider_34,
IfxScuCcu_K1divider_35,
IfxScuCcu_K1divider_36,
IfxScuCcu_K1divider_37,
IfxScuCcu_K1divider_38,
IfxScuCcu_K1divider_39,
IfxScuCcu_K1divider_40,
IfxScuCcu_K1divider_41,
IfxScuCcu_K1divider_42,
IfxScuCcu_K1divider_43,
IfxScuCcu_K1divider_44,
IfxScuCcu_K1divider_45,
IfxScuCcu_K1divider_46,
IfxScuCcu_K1divider_47,
IfxScuCcu_K1divider_48,
IfxScuCcu_K1divider_49,
IfxScuCcu_K1divider_50,
IfxScuCcu_K1divider_51,
IfxScuCcu_K1divider_52,
IfxScuCcu_K1divider_53,
IfxScuCcu_K1divider_54,
IfxScuCcu_K1divider_55,
IfxScuCcu_K1divider_56,
IfxScuCcu_K1divider_57,
IfxScuCcu_K1divider_58,
IfxScuCcu_K1divider_59,
IfxScuCcu_K1divider_60,
IfxScuCcu_K1divider_61,
IfxScuCcu_K1divider_62,
IfxScuCcu_K1divider_63,
IfxScuCcu_K1divider_64,
IfxScuCcu_K1divider_65,
IfxScuCcu_K1divider_66,
IfxScuCcu_K1divider_67,
IfxScuCcu_K1divider_68,
IfxScuCcu_K1divider_69,
IfxScuCcu_K1divider_70,
IfxScuCcu_K1divider_71,
IfxScuCcu_K1divider_72,
IfxScuCcu_K1divider_73,
IfxScuCcu_K1divider_74,
IfxScuCcu_K1divider_75,
IfxScuCcu_K1divider_76,
IfxScuCcu_K1divider_77,
IfxScuCcu_K1divider_78,
IfxScuCcu_K1divider_79,
IfxScuCcu_K1divider_80,
IfxScuCcu_K1divider_81,
IfxScuCcu_K1divider_82,
IfxScuCcu_K1divider_83,
IfxScuCcu_K1divider_84,
IfxScuCcu_K1divider_85,
IfxScuCcu_K1divider_86,
IfxScuCcu_K1divider_87,
IfxScuCcu_K1divider_88,
IfxScuCcu_K1divider_89,
IfxScuCcu_K1divider_90,
IfxScuCcu_K1divider_91,
IfxScuCcu_K1divider_92,
IfxScuCcu_K1divider_93,
IfxScuCcu_K1divider_94,
IfxScuCcu_K1divider_95,
IfxScuCcu_K1divider_96,
IfxScuCcu_K1divider_97,
IfxScuCcu_K1divider_98,
IfxScuCcu_K1divider_99,
IfxScuCcu_K1divider_100,
IfxScuCcu_K1divider_101,
IfxScuCcu_K1divider_102,
IfxScuCcu_K1divider_103,
IfxScuCcu_K1divider_104,
IfxScuCcu_K1divider_105,
IfxScuCcu_K1divider_106,
IfxScuCcu_K1divider_107,
IfxScuCcu_K1divider_108,
IfxScuCcu_K1divider_109,
IfxScuCcu_K1divider_110,
IfxScuCcu_K1divider_111,
IfxScuCcu_K1divider_112,
IfxScuCcu_K1divider_113,
IfxScuCcu_K1divider_114,
IfxScuCcu_K1divider_115,
IfxScuCcu_K1divider_116,
IfxScuCcu_K1divider_117,
IfxScuCcu_K1divider_118,
IfxScuCcu_K1divider_119,
IfxScuCcu_K1divider_120,
IfxScuCcu_K1divider_121,
IfxScuCcu_K1divider_122,
IfxScuCcu_K1divider_123,
IfxScuCcu_K1divider_124,
IfxScuCcu_K1divider_125,
IfxScuCcu_K1divider_126,
IfxScuCcu_K1divider_127,
IfxScuCcu_K1divider_128
}
MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider. More...
enum IfxScuCcu_K2divider {
IfxScuCcu_K2divider_1 = 0,
IfxScuCcu_K2divider_2,
IfxScuCcu_K2divider_3,
IfxScuCcu_K2divider_4,
IfxScuCcu_K2divider_5,
IfxScuCcu_K2divider_6,
IfxScuCcu_K2divider_7,
IfxScuCcu_K2divider_8,
IfxScuCcu_K2divider_9,
IfxScuCcu_K2divider_10,
IfxScuCcu_K2divider_11,
IfxScuCcu_K2divider_12,
IfxScuCcu_K2divider_13,
IfxScuCcu_K2divider_14,
IfxScuCcu_K2divider_15,
IfxScuCcu_K2divider_16,
IfxScuCcu_K2divider_17,
IfxScuCcu_K2divider_18,
IfxScuCcu_K2divider_19,
IfxScuCcu_K2divider_20,
IfxScuCcu_K2divider_21,
IfxScuCcu_K2divider_22,
IfxScuCcu_K2divider_23,
IfxScuCcu_K2divider_24,
IfxScuCcu_K2divider_25,
IfxScuCcu_K2divider_26,
IfxScuCcu_K2divider_27,
IfxScuCcu_K2divider_28,
IfxScuCcu_K2divider_29,
IfxScuCcu_K2divider_30,
IfxScuCcu_K2divider_31,
IfxScuCcu_K2divider_32,
IfxScuCcu_K2divider_33,
IfxScuCcu_K2divider_34,
IfxScuCcu_K2divider_35,
IfxScuCcu_K2divider_36,
IfxScuCcu_K2divider_37,
IfxScuCcu_K2divider_38,
IfxScuCcu_K2divider_39,
IfxScuCcu_K2divider_40,
IfxScuCcu_K2divider_41,
IfxScuCcu_K2divider_42,
IfxScuCcu_K2divider_43,
IfxScuCcu_K2divider_44,
IfxScuCcu_K2divider_45,
IfxScuCcu_K2divider_46,
IfxScuCcu_K2divider_47,
IfxScuCcu_K2divider_48,
IfxScuCcu_K2divider_49,
IfxScuCcu_K2divider_50,
IfxScuCcu_K2divider_51,
IfxScuCcu_K2divider_52,
IfxScuCcu_K2divider_53,
IfxScuCcu_K2divider_54,
IfxScuCcu_K2divider_55,
IfxScuCcu_K2divider_56,
IfxScuCcu_K2divider_57,
IfxScuCcu_K2divider_58,
IfxScuCcu_K2divider_59,
IfxScuCcu_K2divider_60,
IfxScuCcu_K2divider_61,
IfxScuCcu_K2divider_62,
IfxScuCcu_K2divider_63,
IfxScuCcu_K2divider_64,
IfxScuCcu_K2divider_65,
IfxScuCcu_K2divider_66,
IfxScuCcu_K2divider_67,
IfxScuCcu_K2divider_68,
IfxScuCcu_K2divider_69,
IfxScuCcu_K2divider_70,
IfxScuCcu_K2divider_71,
IfxScuCcu_K2divider_72,
IfxScuCcu_K2divider_73,
IfxScuCcu_K2divider_74,
IfxScuCcu_K2divider_75,
IfxScuCcu_K2divider_76,
IfxScuCcu_K2divider_77,
IfxScuCcu_K2divider_78,
IfxScuCcu_K2divider_79,
IfxScuCcu_K2divider_80,
IfxScuCcu_K2divider_81,
IfxScuCcu_K2divider_82,
IfxScuCcu_K2divider_83,
IfxScuCcu_K2divider_84,
IfxScuCcu_K2divider_85,
IfxScuCcu_K2divider_86,
IfxScuCcu_K2divider_87,
IfxScuCcu_K2divider_88,
IfxScuCcu_K2divider_89,
IfxScuCcu_K2divider_90,
IfxScuCcu_K2divider_91,
IfxScuCcu_K2divider_92,
IfxScuCcu_K2divider_93,
IfxScuCcu_K2divider_94,
IfxScuCcu_K2divider_95,
IfxScuCcu_K2divider_96,
IfxScuCcu_K2divider_97,
IfxScuCcu_K2divider_98,
IfxScuCcu_K2divider_99,
IfxScuCcu_K2divider_100,
IfxScuCcu_K2divider_101,
IfxScuCcu_K2divider_102,
IfxScuCcu_K2divider_103,
IfxScuCcu_K2divider_104,
IfxScuCcu_K2divider_105,
IfxScuCcu_K2divider_106,
IfxScuCcu_K2divider_107,
IfxScuCcu_K2divider_108,
IfxScuCcu_K2divider_109,
IfxScuCcu_K2divider_110,
IfxScuCcu_K2divider_111,
IfxScuCcu_K2divider_112,
IfxScuCcu_K2divider_113,
IfxScuCcu_K2divider_114,
IfxScuCcu_K2divider_115,
IfxScuCcu_K2divider_116,
IfxScuCcu_K2divider_117,
IfxScuCcu_K2divider_118,
IfxScuCcu_K2divider_119,
IfxScuCcu_K2divider_120,
IfxScuCcu_K2divider_121,
IfxScuCcu_K2divider_122,
IfxScuCcu_K2divider_123,
IfxScuCcu_K2divider_124,
IfxScuCcu_K2divider_125,
IfxScuCcu_K2divider_126,
IfxScuCcu_K2divider_127,
IfxScuCcu_K2divider_128
}
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider. More...
enum IfxScuCcu_K3divider {
IfxScuCcu_K3divider_1 = 0,
IfxScuCcu_K3divider_2,
IfxScuCcu_K3divider_3,
IfxScuCcu_K3divider_4,
IfxScuCcu_K3divider_5,
IfxScuCcu_K3divider_6,
IfxScuCcu_K3divider_7,
IfxScuCcu_K3divider_8,
IfxScuCcu_K3divider_9,
IfxScuCcu_K3divider_10,
IfxScuCcu_K3divider_11,
IfxScuCcu_K3divider_12,
IfxScuCcu_K3divider_13,
IfxScuCcu_K3divider_14,
IfxScuCcu_K3divider_15,
IfxScuCcu_K3divider_16,
IfxScuCcu_K3divider_17,
IfxScuCcu_K3divider_18,
IfxScuCcu_K3divider_19,
IfxScuCcu_K3divider_20,
IfxScuCcu_K3divider_21,
IfxScuCcu_K3divider_22,
IfxScuCcu_K3divider_23,
IfxScuCcu_K3divider_24,
IfxScuCcu_K3divider_25,
IfxScuCcu_K3divider_26,
IfxScuCcu_K3divider_27,
IfxScuCcu_K3divider_28,
IfxScuCcu_K3divider_29,
IfxScuCcu_K3divider_30,
IfxScuCcu_K3divider_31,
IfxScuCcu_K3divider_32,
IfxScuCcu_K3divider_33,
IfxScuCcu_K3divider_34,
IfxScuCcu_K3divider_35,
IfxScuCcu_K3divider_36,
IfxScuCcu_K3divider_37,
IfxScuCcu_K3divider_38,
IfxScuCcu_K3divider_39,
IfxScuCcu_K3divider_40,
IfxScuCcu_K3divider_41,
IfxScuCcu_K3divider_42,
IfxScuCcu_K3divider_43,
IfxScuCcu_K3divider_44,
IfxScuCcu_K3divider_45,
IfxScuCcu_K3divider_46,
IfxScuCcu_K3divider_47,
IfxScuCcu_K3divider_48,
IfxScuCcu_K3divider_49,
IfxScuCcu_K3divider_50,
IfxScuCcu_K3divider_51,
IfxScuCcu_K3divider_52,
IfxScuCcu_K3divider_53,
IfxScuCcu_K3divider_54,
IfxScuCcu_K3divider_55,
IfxScuCcu_K3divider_56,
IfxScuCcu_K3divider_57,
IfxScuCcu_K3divider_58,
IfxScuCcu_K3divider_59,
IfxScuCcu_K3divider_60,
IfxScuCcu_K3divider_61,
IfxScuCcu_K3divider_62,
IfxScuCcu_K3divider_63,
IfxScuCcu_K3divider_64,
IfxScuCcu_K3divider_65,
IfxScuCcu_K3divider_66,
IfxScuCcu_K3divider_67,
IfxScuCcu_K3divider_68,
IfxScuCcu_K3divider_69,
IfxScuCcu_K3divider_70,
IfxScuCcu_K3divider_71,
IfxScuCcu_K3divider_72,
IfxScuCcu_K3divider_73,
IfxScuCcu_K3divider_74,
IfxScuCcu_K3divider_75,
IfxScuCcu_K3divider_76,
IfxScuCcu_K3divider_77,
IfxScuCcu_K3divider_78,
IfxScuCcu_K3divider_79,
IfxScuCcu_K3divider_80,
IfxScuCcu_K3divider_81,
IfxScuCcu_K3divider_82,
IfxScuCcu_K3divider_83,
IfxScuCcu_K3divider_84,
IfxScuCcu_K3divider_85,
IfxScuCcu_K3divider_86,
IfxScuCcu_K3divider_87,
IfxScuCcu_K3divider_88,
IfxScuCcu_K3divider_89,
IfxScuCcu_K3divider_90,
IfxScuCcu_K3divider_91,
IfxScuCcu_K3divider_92,
IfxScuCcu_K3divider_93,
IfxScuCcu_K3divider_94,
IfxScuCcu_K3divider_95,
IfxScuCcu_K3divider_96,
IfxScuCcu_K3divider_97,
IfxScuCcu_K3divider_98,
IfxScuCcu_K3divider_99,
IfxScuCcu_K3divider_100,
IfxScuCcu_K3divider_101,
IfxScuCcu_K3divider_102,
IfxScuCcu_K3divider_103,
IfxScuCcu_K3divider_104,
IfxScuCcu_K3divider_105,
IfxScuCcu_K3divider_106,
IfxScuCcu_K3divider_107,
IfxScuCcu_K3divider_108,
IfxScuCcu_K3divider_109,
IfxScuCcu_K3divider_110,
IfxScuCcu_K3divider_111,
IfxScuCcu_K3divider_112,
IfxScuCcu_K3divider_113,
IfxScuCcu_K3divider_114,
IfxScuCcu_K3divider_115,
IfxScuCcu_K3divider_116,
IfxScuCcu_K3divider_117,
IfxScuCcu_K3divider_118,
IfxScuCcu_K3divider_119,
IfxScuCcu_K3divider_120,
IfxScuCcu_K3divider_121,
IfxScuCcu_K3divider_122,
IfxScuCcu_K3divider_123,
IfxScuCcu_K3divider_124,
IfxScuCcu_K3divider_125,
IfxScuCcu_K3divider_126,
IfxScuCcu_K3divider_127,
IfxScuCcu_K3divider_128
}
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider. More...
enum IfxScuCcu_Ndivider {
IfxScuCcu_Ndivider_1 = 0,
IfxScuCcu_Ndivider_2,
IfxScuCcu_Ndivider_3,
IfxScuCcu_Ndivider_4,
IfxScuCcu_Ndivider_5,
IfxScuCcu_Ndivider_6,
IfxScuCcu_Ndivider_7,
IfxScuCcu_Ndivider_8,
IfxScuCcu_Ndivider_9,
IfxScuCcu_Ndivider_10,
IfxScuCcu_Ndivider_11,
IfxScuCcu_Ndivider_12,
IfxScuCcu_Ndivider_13,
IfxScuCcu_Ndivider_14,
IfxScuCcu_Ndivider_15,
IfxScuCcu_Ndivider_16,
IfxScuCcu_Ndivider_17,
IfxScuCcu_Ndivider_18,
IfxScuCcu_Ndivider_19,
IfxScuCcu_Ndivider_20,
IfxScuCcu_Ndivider_21,
IfxScuCcu_Ndivider_22,
IfxScuCcu_Ndivider_23,
IfxScuCcu_Ndivider_24,
IfxScuCcu_Ndivider_25,
IfxScuCcu_Ndivider_26,
IfxScuCcu_Ndivider_27,
IfxScuCcu_Ndivider_28,
IfxScuCcu_Ndivider_29,
IfxScuCcu_Ndivider_30,
IfxScuCcu_Ndivider_31,
IfxScuCcu_Ndivider_32,
IfxScuCcu_Ndivider_33,
IfxScuCcu_Ndivider_34,
IfxScuCcu_Ndivider_35,
IfxScuCcu_Ndivider_36,
IfxScuCcu_Ndivider_37,
IfxScuCcu_Ndivider_38,
IfxScuCcu_Ndivider_39,
IfxScuCcu_Ndivider_40,
IfxScuCcu_Ndivider_41,
IfxScuCcu_Ndivider_42,
IfxScuCcu_Ndivider_43,
IfxScuCcu_Ndivider_44,
IfxScuCcu_Ndivider_45,
IfxScuCcu_Ndivider_46,
IfxScuCcu_Ndivider_47,
IfxScuCcu_Ndivider_48,
IfxScuCcu_Ndivider_49,
IfxScuCcu_Ndivider_50,
IfxScuCcu_Ndivider_51,
IfxScuCcu_Ndivider_52,
IfxScuCcu_Ndivider_53,
IfxScuCcu_Ndivider_54,
IfxScuCcu_Ndivider_55,
IfxScuCcu_Ndivider_56,
IfxScuCcu_Ndivider_57,
IfxScuCcu_Ndivider_58,
IfxScuCcu_Ndivider_59,
IfxScuCcu_Ndivider_60,
IfxScuCcu_Ndivider_61,
IfxScuCcu_Ndivider_62,
IfxScuCcu_Ndivider_63,
IfxScuCcu_Ndivider_64,
IfxScuCcu_Ndivider_65,
IfxScuCcu_Ndivider_66,
IfxScuCcu_Ndivider_67,
IfxScuCcu_Ndivider_68,
IfxScuCcu_Ndivider_69,
IfxScuCcu_Ndivider_70,
IfxScuCcu_Ndivider_71,
IfxScuCcu_Ndivider_72,
IfxScuCcu_Ndivider_73,
IfxScuCcu_Ndivider_74,
IfxScuCcu_Ndivider_75,
IfxScuCcu_Ndivider_76,
IfxScuCcu_Ndivider_77,
IfxScuCcu_Ndivider_78,
IfxScuCcu_Ndivider_79,
IfxScuCcu_Ndivider_80,
IfxScuCcu_Ndivider_81,
IfxScuCcu_Ndivider_82,
IfxScuCcu_Ndivider_83,
IfxScuCcu_Ndivider_84,
IfxScuCcu_Ndivider_85,
IfxScuCcu_Ndivider_86,
IfxScuCcu_Ndivider_87,
IfxScuCcu_Ndivider_88,
IfxScuCcu_Ndivider_89,
IfxScuCcu_Ndivider_90,
IfxScuCcu_Ndivider_91,
IfxScuCcu_Ndivider_92,
IfxScuCcu_Ndivider_93,
IfxScuCcu_Ndivider_94,
IfxScuCcu_Ndivider_95,
IfxScuCcu_Ndivider_96,
IfxScuCcu_Ndivider_97,
IfxScuCcu_Ndivider_98,
IfxScuCcu_Ndivider_99,
IfxScuCcu_Ndivider_100,
IfxScuCcu_Ndivider_101,
IfxScuCcu_Ndivider_102,
IfxScuCcu_Ndivider_103,
IfxScuCcu_Ndivider_104,
IfxScuCcu_Ndivider_105,
IfxScuCcu_Ndivider_106,
IfxScuCcu_Ndivider_107,
IfxScuCcu_Ndivider_108,
IfxScuCcu_Ndivider_109,
IfxScuCcu_Ndivider_110,
IfxScuCcu_Ndivider_111,
IfxScuCcu_Ndivider_112,
IfxScuCcu_Ndivider_113,
IfxScuCcu_Ndivider_114,
IfxScuCcu_Ndivider_115,
IfxScuCcu_Ndivider_116,
IfxScuCcu_Ndivider_117,
IfxScuCcu_Ndivider_118,
IfxScuCcu_Ndivider_119,
IfxScuCcu_Ndivider_120,
IfxScuCcu_Ndivider_121,
IfxScuCcu_Ndivider_122,
IfxScuCcu_Ndivider_123,
IfxScuCcu_Ndivider_124,
IfxScuCcu_Ndivider_125,
IfxScuCcu_Ndivider_126,
IfxScuCcu_Ndivider_127,
IfxScuCcu_Ndivider_128
}
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider. More...
enum IfxScuCcu_Pdivider {
IfxScuCcu_Pdivider_1 = 0,
IfxScuCcu_Pdivider_2,
IfxScuCcu_Pdivider_3,
IfxScuCcu_Pdivider_4,
IfxScuCcu_Pdivider_5,
IfxScuCcu_Pdivider_6,
IfxScuCcu_Pdivider_7,
IfxScuCcu_Pdivider_8,
IfxScuCcu_Pdivider_9,
IfxScuCcu_Pdivider_10,
IfxScuCcu_Pdivider_11,
IfxScuCcu_Pdivider_12,
IfxScuCcu_Pdivider_13,
IfxScuCcu_Pdivider_14,
IfxScuCcu_Pdivider_15,
IfxScuCcu_Pdivider_16
}
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider. More...

Detailed Description

Enumeration Type Documentation

◆ IfxScuCcu_K1divider

enum IfxScuCcu_K1divider

MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider.

Enumerator
IfxScuCcu_K1divider_1 | K1-Divider 1.
IfxScuCcu_K1divider_2 | K1-Divider 2.
IfxScuCcu_K1divider_3 | K1-Divider 3.
IfxScuCcu_K1divider_4 | K1-Divider 4.
IfxScuCcu_K1divider_5 | K1-Divider 5.
IfxScuCcu_K1divider_6 | K1-Divider 6.
IfxScuCcu_K1divider_7 | K1-Divider 7.
IfxScuCcu_K1divider_8 | K1-Divider 8.
IfxScuCcu_K1divider_9 | K1-Divider 9.
IfxScuCcu_K1divider_10 | K1-Divider 10.
IfxScuCcu_K1divider_11 | K1-Divider 11.
IfxScuCcu_K1divider_12 | K1-Divider 12.
IfxScuCcu_K1divider_13 | K1-Divider 13.
IfxScuCcu_K1divider_14 | K1-Divider 14.
IfxScuCcu_K1divider_15 | K1-Divider 15.
IfxScuCcu_K1divider_16 | K1-Divider 16.
IfxScuCcu_K1divider_17 | K1-Divider 17.
IfxScuCcu_K1divider_18 | K1-Divider 18.
IfxScuCcu_K1divider_19 | K1-Divider 19.
IfxScuCcu_K1divider_20 | K1-Divider 20.
IfxScuCcu_K1divider_21 | K1-Divider 21.
IfxScuCcu_K1divider_22 | K1-Divider 22.
IfxScuCcu_K1divider_23 | K1-Divider 23.
IfxScuCcu_K1divider_24 | K1-Divider 24.
IfxScuCcu_K1divider_25 | K1-Divider 25.
IfxScuCcu_K1divider_26 | K1-Divider 26.
IfxScuCcu_K1divider_27 | K1-Divider 27.
IfxScuCcu_K1divider_28 | K1-Divider 28.
IfxScuCcu_K1divider_29 | K1-Divider 29.
IfxScuCcu_K1divider_30 | K1-Divider 30.
IfxScuCcu_K1divider_31 | K1-Divider 31.
IfxScuCcu_K1divider_32 | K1-Divider 32.
IfxScuCcu_K1divider_33 | K1-Divider 33.
IfxScuCcu_K1divider_34 | K1-Divider 34.
IfxScuCcu_K1divider_35 | K1-Divider 35.
IfxScuCcu_K1divider_36 | K1-Divider 36.
IfxScuCcu_K1divider_37 | K1-Divider 37.
IfxScuCcu_K1divider_38 | K1-Divider 38.
IfxScuCcu_K1divider_39 | K1-Divider 39.
IfxScuCcu_K1divider_40 | K1-Divider 40.
IfxScuCcu_K1divider_41 | K1-Divider 41.
IfxScuCcu_K1divider_42 | K1-Divider 42.
IfxScuCcu_K1divider_43 | K1-Divider 43.
IfxScuCcu_K1divider_44 | K1-Divider 44.
IfxScuCcu_K1divider_45 | K1-Divider 45.
IfxScuCcu_K1divider_46 | K1-Divider 46.
IfxScuCcu_K1divider_47 | K1-Divider 47.
IfxScuCcu_K1divider_48 | K1-Divider 48.
IfxScuCcu_K1divider_49 | K1-Divider 49.
IfxScuCcu_K1divider_50 | K1-Divider 50.
IfxScuCcu_K1divider_51 | K1-Divider 51.
IfxScuCcu_K1divider_52 | K1-Divider 52.
IfxScuCcu_K1divider_53 | K1-Divider 53.
IfxScuCcu_K1divider_54 | K1-Divider 54.
IfxScuCcu_K1divider_55 | K1-Divider 55.
IfxScuCcu_K1divider_56 | K1-Divider 56.
IfxScuCcu_K1divider_57 | K1-Divider 57.
IfxScuCcu_K1divider_58 | K1-Divider 58.
IfxScuCcu_K1divider_59 | K1-Divider 59.
IfxScuCcu_K1divider_60 | K1-Divider 60.
IfxScuCcu_K1divider_61 | K1-Divider 61.
IfxScuCcu_K1divider_62 | K1-Divider 62.
IfxScuCcu_K1divider_63 | K1-Divider 63.
IfxScuCcu_K1divider_64 | K1-Divider 64.
IfxScuCcu_K1divider_65 | K1-Divider 65.
IfxScuCcu_K1divider_66 | K1-Divider 66.
IfxScuCcu_K1divider_67 | K1-Divider 67.
IfxScuCcu_K1divider_68 | K1-Divider 68.
IfxScuCcu_K1divider_69 | K1-Divider 69.
IfxScuCcu_K1divider_70 | K1-Divider 70.
IfxScuCcu_K1divider_71 | K1-Divider 71.
IfxScuCcu_K1divider_72 | K1-Divider 72.
IfxScuCcu_K1divider_73 | K1-Divider 73.
IfxScuCcu_K1divider_74 | K1-Divider 74.
IfxScuCcu_K1divider_75 | K1-Divider 75.
IfxScuCcu_K1divider_76 | K1-Divider 76.
IfxScuCcu_K1divider_77 | K1-Divider 77.
IfxScuCcu_K1divider_78 | K1-Divider 78.
IfxScuCcu_K1divider_79 | K1-Divider 79.
IfxScuCcu_K1divider_80 | K1-Divider 80.
IfxScuCcu_K1divider_81 | K1-Divider 81.
IfxScuCcu_K1divider_82 | K1-Divider 82.
IfxScuCcu_K1divider_83 | K1-Divider 83.
IfxScuCcu_K1divider_84 | K1-Divider 84.
IfxScuCcu_K1divider_85 | K1-Divider 85.
IfxScuCcu_K1divider_86 | K1-Divider 86.
IfxScuCcu_K1divider_87 | K1-Divider 87.
IfxScuCcu_K1divider_88 | K1-Divider 88.
IfxScuCcu_K1divider_89 | K1-Divider 89.
IfxScuCcu_K1divider_90 | K1-Divider 90.
IfxScuCcu_K1divider_91 | K1-Divider 91.
IfxScuCcu_K1divider_92 | K1-Divider 92.
IfxScuCcu_K1divider_93 | K1-Divider 93.
IfxScuCcu_K1divider_94 | K1-Divider 94.
IfxScuCcu_K1divider_95 | K1-Divider 95.
IfxScuCcu_K1divider_96 | K1-Divider 96.
IfxScuCcu_K1divider_97 | K1-Divider 97.
IfxScuCcu_K1divider_98 | K1-Divider 98.
IfxScuCcu_K1divider_99 | K1-Divider 99.
IfxScuCcu_K1divider_100 | K1-Divider 100.
IfxScuCcu_K1divider_101 | K1-Divider 101.
IfxScuCcu_K1divider_102 | K1-Divider 102.
IfxScuCcu_K1divider_103 | K1-Divider 103.
IfxScuCcu_K1divider_104 | K1-Divider 104.
IfxScuCcu_K1divider_105 | K1-Divider 105.
IfxScuCcu_K1divider_106 | K1-Divider 106.
IfxScuCcu_K1divider_107 | K1-Divider 107.
IfxScuCcu_K1divider_108 | K1-Divider 108.
IfxScuCcu_K1divider_109 | K1-Divider 109.
IfxScuCcu_K1divider_110 | K1-Divider 110.
IfxScuCcu_K1divider_111 | K1-Divider 111.
IfxScuCcu_K1divider_112 | K1-Divider 112.
IfxScuCcu_K1divider_113 | K1-Divider 113.
IfxScuCcu_K1divider_114 | K1-Divider 114.
IfxScuCcu_K1divider_115 | K1-Divider 115.
IfxScuCcu_K1divider_116 | K1-Divider 116.
IfxScuCcu_K1divider_117 | K1-Divider 117.
IfxScuCcu_K1divider_118 | K1-Divider 118.
IfxScuCcu_K1divider_119 | K1-Divider 119.
IfxScuCcu_K1divider_120 | K1-Divider 120.
IfxScuCcu_K1divider_121 | K1-Divider 121.
IfxScuCcu_K1divider_122 | K1-Divider 122.
IfxScuCcu_K1divider_123 | K1-Divider 123.
IfxScuCcu_K1divider_124 | K1-Divider 124.
IfxScuCcu_K1divider_125 | K1-Divider 125.
IfxScuCcu_K1divider_126 | K1-Divider 126.
IfxScuCcu_K1divider_127 | K1-Divider 127.
IfxScuCcu_K1divider_128 | K1-Divider 128.

Definition at line 138 of file IfxScuCcu.h.

◆ IfxScuCcu_K2divider

enum IfxScuCcu_K2divider

MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider.

Enumerator
IfxScuCcu_K2divider_1 | K2-Divider 1.
IfxScuCcu_K2divider_2 | K2-Divider 2.
IfxScuCcu_K2divider_3 | K2-Divider 3.
IfxScuCcu_K2divider_4 | K2-Divider 4.
IfxScuCcu_K2divider_5 | K2-Divider 5.
IfxScuCcu_K2divider_6 | K2-Divider 6.
IfxScuCcu_K2divider_7 | K2-Divider 7.
IfxScuCcu_K2divider_8 | K2-Divider 8.
IfxScuCcu_K2divider_9 | K2-Divider 9.
IfxScuCcu_K2divider_10 | K2-Divider 10.
IfxScuCcu_K2divider_11 | K2-Divider 11.
IfxScuCcu_K2divider_12 | K2-Divider 12.
IfxScuCcu_K2divider_13 | K2-Divider 13.
IfxScuCcu_K2divider_14 | K2-Divider 14.
IfxScuCcu_K2divider_15 | K2-Divider 15.
IfxScuCcu_K2divider_16 | K2-Divider 16.
IfxScuCcu_K2divider_17 | K2-Divider 17.
IfxScuCcu_K2divider_18 | K2-Divider 18.
IfxScuCcu_K2divider_19 | K2-Divider 19.
IfxScuCcu_K2divider_20 | K2-Divider 20.
IfxScuCcu_K2divider_21 | K2-Divider 21.
IfxScuCcu_K2divider_22 | K2-Divider 22.
IfxScuCcu_K2divider_23 | K2-Divider 23.
IfxScuCcu_K2divider_24 | K2-Divider 24.
IfxScuCcu_K2divider_25 | K2-Divider 25.
IfxScuCcu_K2divider_26 | K2-Divider 26.
IfxScuCcu_K2divider_27 | K2-Divider 27.
IfxScuCcu_K2divider_28 | K2-Divider 28.
IfxScuCcu_K2divider_29 | K2-Divider 29.
IfxScuCcu_K2divider_30 | K2-Divider 30.
IfxScuCcu_K2divider_31 | K2-Divider 31.
IfxScuCcu_K2divider_32 | K2-Divider 32.
IfxScuCcu_K2divider_33 | K2-Divider 33.
IfxScuCcu_K2divider_34 | K2-Divider 34.
IfxScuCcu_K2divider_35 | K2-Divider 35.
IfxScuCcu_K2divider_36 | K2-Divider 36.
IfxScuCcu_K2divider_37 | K2-Divider 37.
IfxScuCcu_K2divider_38 | K2-Divider 38.
IfxScuCcu_K2divider_39 | K2-Divider 39.
IfxScuCcu_K2divider_40 | K2-Divider 40.
IfxScuCcu_K2divider_41 | K2-Divider 41.
IfxScuCcu_K2divider_42 | K2-Divider 42.
IfxScuCcu_K2divider_43 | K2-Divider 43.
IfxScuCcu_K2divider_44 | K2-Divider 44.
IfxScuCcu_K2divider_45 | K2-Divider 45.
IfxScuCcu_K2divider_46 | K2-Divider 46.
IfxScuCcu_K2divider_47 | K2-Divider 47.
IfxScuCcu_K2divider_48 | K2-Divider 48.
IfxScuCcu_K2divider_49 | K2-Divider 49.
IfxScuCcu_K2divider_50 | K2-Divider 50.
IfxScuCcu_K2divider_51 | K2-Divider 51.
IfxScuCcu_K2divider_52 | K2-Divider 52.
IfxScuCcu_K2divider_53 | K2-Divider 53.
IfxScuCcu_K2divider_54 | K2-Divider 54.
IfxScuCcu_K2divider_55 | K2-Divider 55.
IfxScuCcu_K2divider_56 | K2-Divider 56.
IfxScuCcu_K2divider_57 | K2-Divider 57.
IfxScuCcu_K2divider_58 | K2-Divider 58.
IfxScuCcu_K2divider_59 | K2-Divider 59.
IfxScuCcu_K2divider_60 | K2-Divider 60.
IfxScuCcu_K2divider_61 | K2-Divider 61.
IfxScuCcu_K2divider_62 | K2-Divider 62.
IfxScuCcu_K2divider_63 | K2-Divider 63.
IfxScuCcu_K2divider_64 | K2-Divider 64.
IfxScuCcu_K2divider_65 | K2-Divider 65.
IfxScuCcu_K2divider_66 | K2-Divider 66.
IfxScuCcu_K2divider_67 | K2-Divider 67.
IfxScuCcu_K2divider_68 | K2-Divider 68.
IfxScuCcu_K2divider_69 | K2-Divider 69.
IfxScuCcu_K2divider_70 | K2-Divider 70.
IfxScuCcu_K2divider_71 | K2-Divider 71.
IfxScuCcu_K2divider_72 | K2-Divider 72.
IfxScuCcu_K2divider_73 | K2-Divider 73.
IfxScuCcu_K2divider_74 | K2-Divider 74.
IfxScuCcu_K2divider_75 | K2-Divider 75.
IfxScuCcu_K2divider_76 | K2-Divider 76.
IfxScuCcu_K2divider_77 | K2-Divider 77.
IfxScuCcu_K2divider_78 | K2-Divider 78.
IfxScuCcu_K2divider_79 | K2-Divider 79.
IfxScuCcu_K2divider_80 | K2-Divider 80.
IfxScuCcu_K2divider_81 | K2-Divider 81.
IfxScuCcu_K2divider_82 | K2-Divider 82.
IfxScuCcu_K2divider_83 | K2-Divider 83.
IfxScuCcu_K2divider_84 | K2-Divider 84.
IfxScuCcu_K2divider_85 | K2-Divider 85.
IfxScuCcu_K2divider_86 | K2-Divider 86.
IfxScuCcu_K2divider_87 | K2-Divider 87.
IfxScuCcu_K2divider_88 | K2-Divider 88.
IfxScuCcu_K2divider_89 | K2-Divider 89.
IfxScuCcu_K2divider_90 | K2-Divider 90.
IfxScuCcu_K2divider_91 | K2-Divider 91.
IfxScuCcu_K2divider_92 | K2-Divider 92.
IfxScuCcu_K2divider_93 | K2-Divider 93.
IfxScuCcu_K2divider_94 | K2-Divider 94.
IfxScuCcu_K2divider_95 | K2-Divider 95.
IfxScuCcu_K2divider_96 | K2-Divider 96.
IfxScuCcu_K2divider_97 | K2-Divider 97.
IfxScuCcu_K2divider_98 | K2-Divider 98.
IfxScuCcu_K2divider_99 | K2-Divider 99.
IfxScuCcu_K2divider_100 | K2-Divider 100.
IfxScuCcu_K2divider_101 | K2-Divider 101.
IfxScuCcu_K2divider_102 | K2-Divider 102.
IfxScuCcu_K2divider_103 | K2-Divider 103.
IfxScuCcu_K2divider_104 | K2-Divider 104.
IfxScuCcu_K2divider_105 | K2-Divider 105.
IfxScuCcu_K2divider_106 | K2-Divider 106.
IfxScuCcu_K2divider_107 | K2-Divider 107.
IfxScuCcu_K2divider_108 | K2-Divider 108.
IfxScuCcu_K2divider_109 | K2-Divider 109.
IfxScuCcu_K2divider_110 | K2-Divider 110.
IfxScuCcu_K2divider_111 | K2-Divider 111.
IfxScuCcu_K2divider_112 | K2-Divider 112.
IfxScuCcu_K2divider_113 | K2-Divider 113.
IfxScuCcu_K2divider_114 | K2-Divider 114.
IfxScuCcu_K2divider_115 | K2-Divider 115.
IfxScuCcu_K2divider_116 | K2-Divider 116.
IfxScuCcu_K2divider_117 | K2-Divider 117.
IfxScuCcu_K2divider_118 | K2-Divider 118.
IfxScuCcu_K2divider_119 | K2-Divider 119.
IfxScuCcu_K2divider_120 | K2-Divider 120.
IfxScuCcu_K2divider_121 | K2-Divider 121.
IfxScuCcu_K2divider_122 | K2-Divider 122.
IfxScuCcu_K2divider_123 | K2-Divider 123.
IfxScuCcu_K2divider_124 | K2-Divider 124.
IfxScuCcu_K2divider_125 | K2-Divider 125.
IfxScuCcu_K2divider_126 | K2-Divider 126.
IfxScuCcu_K2divider_127 | K2-Divider 127.
IfxScuCcu_K2divider_128 | K2-Divider 128.

Definition at line 272 of file IfxScuCcu.h.

◆ IfxScuCcu_K3divider

enum IfxScuCcu_K3divider

MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider.

Enumerator
IfxScuCcu_K3divider_1 | K3-Divider 1.
IfxScuCcu_K3divider_2 | K3-Divider 2.
IfxScuCcu_K3divider_3 | K3-Divider 3.
IfxScuCcu_K3divider_4 | K3-Divider 4.
IfxScuCcu_K3divider_5 | K3-Divider 5.
IfxScuCcu_K3divider_6 | K3-Divider 6.
IfxScuCcu_K3divider_7 | K3-Divider 7.
IfxScuCcu_K3divider_8 | K3-Divider 8.
IfxScuCcu_K3divider_9 | K3-Divider 9.
IfxScuCcu_K3divider_10 | K3-Divider 10.
IfxScuCcu_K3divider_11 | K3-Divider 11.
IfxScuCcu_K3divider_12 | K3-Divider 12.
IfxScuCcu_K3divider_13 | K3-Divider 13.
IfxScuCcu_K3divider_14 | K3-Divider 14.
IfxScuCcu_K3divider_15 | K3-Divider 15.
IfxScuCcu_K3divider_16 | K3-Divider 16.
IfxScuCcu_K3divider_17 | K3-Divider 17.
IfxScuCcu_K3divider_18 | K3-Divider 18.
IfxScuCcu_K3divider_19 | K3-Divider 19.
IfxScuCcu_K3divider_20 | K3-Divider 20.
IfxScuCcu_K3divider_21 | K3-Divider 21.
IfxScuCcu_K3divider_22 | K3-Divider 22.
IfxScuCcu_K3divider_23 | K3-Divider 23.
IfxScuCcu_K3divider_24 | K3-Divider 24.
IfxScuCcu_K3divider_25 | K3-Divider 25.
IfxScuCcu_K3divider_26 | K3-Divider 26.
IfxScuCcu_K3divider_27 | K3-Divider 27.
IfxScuCcu_K3divider_28 | K3-Divider 28.
IfxScuCcu_K3divider_29 | K3-Divider 29.
IfxScuCcu_K3divider_30 | K3-Divider 30.
IfxScuCcu_K3divider_31 | K3-Divider 31.
IfxScuCcu_K3divider_32 | K3-Divider 32.
IfxScuCcu_K3divider_33 | K3-Divider 33.
IfxScuCcu_K3divider_34 | K3-Divider 34.
IfxScuCcu_K3divider_35 | K3-Divider 35.
IfxScuCcu_K3divider_36 | K3-Divider 36.
IfxScuCcu_K3divider_37 | K3-Divider 37.
IfxScuCcu_K3divider_38 | K3-Divider 38.
IfxScuCcu_K3divider_39 | K3-Divider 39.
IfxScuCcu_K3divider_40 | K3-Divider 40.
IfxScuCcu_K3divider_41 | K3-Divider 41.
IfxScuCcu_K3divider_42 | K3-Divider 42.
IfxScuCcu_K3divider_43 | K3-Divider 43.
IfxScuCcu_K3divider_44 | K3-Divider 44.
IfxScuCcu_K3divider_45 | K3-Divider 45.
IfxScuCcu_K3divider_46 | K3-Divider 46.
IfxScuCcu_K3divider_47 | K3-Divider 47.
IfxScuCcu_K3divider_48 | K3-Divider 48.
IfxScuCcu_K3divider_49 | K3-Divider 49.
IfxScuCcu_K3divider_50 | K3-Divider 50.
IfxScuCcu_K3divider_51 | K3-Divider 51.
IfxScuCcu_K3divider_52 | K3-Divider 52.
IfxScuCcu_K3divider_53 | K3-Divider 53.
IfxScuCcu_K3divider_54 | K3-Divider 54.
IfxScuCcu_K3divider_55 | K3-Divider 55.
IfxScuCcu_K3divider_56 | K3-Divider 56.
IfxScuCcu_K3divider_57 | K3-Divider 57.
IfxScuCcu_K3divider_58 | K3-Divider 58.
IfxScuCcu_K3divider_59 | K3-Divider 59.
IfxScuCcu_K3divider_60 | K3-Divider 60.
IfxScuCcu_K3divider_61 | K3-Divider 61.
IfxScuCcu_K3divider_62 | K3-Divider 62.
IfxScuCcu_K3divider_63 | K3-Divider 63.
IfxScuCcu_K3divider_64 | K3-Divider 64.
IfxScuCcu_K3divider_65 | K3-Divider 65.
IfxScuCcu_K3divider_66 | K3-Divider 66.
IfxScuCcu_K3divider_67 | K3-Divider 67.
IfxScuCcu_K3divider_68 | K3-Divider 68.
IfxScuCcu_K3divider_69 | K3-Divider 69.
IfxScuCcu_K3divider_70 | K3-Divider 70.
IfxScuCcu_K3divider_71 | K3-Divider 71.
IfxScuCcu_K3divider_72 | K3-Divider 72.
IfxScuCcu_K3divider_73 | K3-Divider 73.
IfxScuCcu_K3divider_74 | K3-Divider 74.
IfxScuCcu_K3divider_75 | K3-Divider 75.
IfxScuCcu_K3divider_76 | K3-Divider 76.
IfxScuCcu_K3divider_77 | K3-Divider 77.
IfxScuCcu_K3divider_78 | K3-Divider 78.
IfxScuCcu_K3divider_79 | K3-Divider 79.
IfxScuCcu_K3divider_80 | K3-Divider 80.
IfxScuCcu_K3divider_81 | K3-Divider 81.
IfxScuCcu_K3divider_82 | K3-Divider 82.
IfxScuCcu_K3divider_83 | K3-Divider 83.
IfxScuCcu_K3divider_84 | K3-Divider 84.
IfxScuCcu_K3divider_85 | K3-Divider 85.
IfxScuCcu_K3divider_86 | K3-Divider 86.
IfxScuCcu_K3divider_87 | K3-Divider 87.
IfxScuCcu_K3divider_88 | K3-Divider 88.
IfxScuCcu_K3divider_89 | K3-Divider 89.
IfxScuCcu_K3divider_90 | K3-Divider 90.
IfxScuCcu_K3divider_91 | K3-Divider 91.
IfxScuCcu_K3divider_92 | K3-Divider 92.
IfxScuCcu_K3divider_93 | K3-Divider 93.
IfxScuCcu_K3divider_94 | K3-Divider 94.
IfxScuCcu_K3divider_95 | K3-Divider 95.
IfxScuCcu_K3divider_96 | K3-Divider 96.
IfxScuCcu_K3divider_97 | K3-Divider 97.
IfxScuCcu_K3divider_98 | K3-Divider 98.
IfxScuCcu_K3divider_99 | K3-Divider 99.
IfxScuCcu_K3divider_100 | K3-Divider 100.
IfxScuCcu_K3divider_101 | K3-Divider 101.
IfxScuCcu_K3divider_102 | K3-Divider 102.
IfxScuCcu_K3divider_103 | K3-Divider 103.
IfxScuCcu_K3divider_104 | K3-Divider 104.
IfxScuCcu_K3divider_105 | K3-Divider 105.
IfxScuCcu_K3divider_106 | K3-Divider 106.
IfxScuCcu_K3divider_107 | K3-Divider 107.
IfxScuCcu_K3divider_108 | K3-Divider 108.
IfxScuCcu_K3divider_109 | K3-Divider 109.
IfxScuCcu_K3divider_110 | K3-Divider 110.
IfxScuCcu_K3divider_111 | K3-Divider 111.
IfxScuCcu_K3divider_112 | K3-Divider 112.
IfxScuCcu_K3divider_113 | K3-Divider 113.
IfxScuCcu_K3divider_114 | K3-Divider 114.
IfxScuCcu_K3divider_115 | K3-Divider 115.
IfxScuCcu_K3divider_116 | K3-Divider 116.
IfxScuCcu_K3divider_117 | K3-Divider 117.
IfxScuCcu_K3divider_118 | K3-Divider 118.
IfxScuCcu_K3divider_119 | K3-Divider 119.
IfxScuCcu_K3divider_120 | K3-Divider 120.
IfxScuCcu_K3divider_121 | K3-Divider 121.
IfxScuCcu_K3divider_122 | K3-Divider 122.
IfxScuCcu_K3divider_123 | K3-Divider 123.
IfxScuCcu_K3divider_124 | K3-Divider 124.
IfxScuCcu_K3divider_125 | K3-Divider 125.
IfxScuCcu_K3divider_126 | K3-Divider 126.
IfxScuCcu_K3divider_127 | K3-Divider 127.
IfxScuCcu_K3divider_128 | K3-Divider 128.

Definition at line 406 of file IfxScuCcu.h.

◆ IfxScuCcu_Ndivider

enum IfxScuCcu_Ndivider

MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider.

Enumerator
IfxScuCcu_Ndivider_1 | N-divider 1.
IfxScuCcu_Ndivider_2 | N-divider 2.
IfxScuCcu_Ndivider_3 | N-divider 3.
IfxScuCcu_Ndivider_4 | N-divider 4.
IfxScuCcu_Ndivider_5 | N-divider 5.
IfxScuCcu_Ndivider_6 | N-divider 6.
IfxScuCcu_Ndivider_7 | N-divider 7.
IfxScuCcu_Ndivider_8 | N-divider 8.
IfxScuCcu_Ndivider_9 | N-divider 9.
IfxScuCcu_Ndivider_10 | N-divider 10.
IfxScuCcu_Ndivider_11 | N-divider 11.
IfxScuCcu_Ndivider_12 | N-divider 12.
IfxScuCcu_Ndivider_13 | N-divider 13.
IfxScuCcu_Ndivider_14 | N-divider 14.
IfxScuCcu_Ndivider_15 | N-divider 15.
IfxScuCcu_Ndivider_16 | N-divider 16.
IfxScuCcu_Ndivider_17 | N-divider 17.
IfxScuCcu_Ndivider_18 | N-divider 18.
IfxScuCcu_Ndivider_19 | N-divider 19.
IfxScuCcu_Ndivider_20 | N-divider 20.
IfxScuCcu_Ndivider_21 | N-divider 21.
IfxScuCcu_Ndivider_22 | N-divider 22.
IfxScuCcu_Ndivider_23 | N-divider 23.
IfxScuCcu_Ndivider_24 | N-divider 24.
IfxScuCcu_Ndivider_25 | N-divider 25.
IfxScuCcu_Ndivider_26 | N-divider 26.
IfxScuCcu_Ndivider_27 | N-divider 27.
IfxScuCcu_Ndivider_28 | N-divider 28.
IfxScuCcu_Ndivider_29 | N-divider 29.
IfxScuCcu_Ndivider_30 | N-divider 30.
IfxScuCcu_Ndivider_31 | N-divider 31.
IfxScuCcu_Ndivider_32 | N-divider 32.
IfxScuCcu_Ndivider_33 | N-divider 33.
IfxScuCcu_Ndivider_34 | N-divider 34.
IfxScuCcu_Ndivider_35 | N-divider 35.
IfxScuCcu_Ndivider_36 | N-divider 36.
IfxScuCcu_Ndivider_37 | N-divider 37.
IfxScuCcu_Ndivider_38 | N-divider 38.
IfxScuCcu_Ndivider_39 | N-divider 39.
IfxScuCcu_Ndivider_40 | N-divider 40.
IfxScuCcu_Ndivider_41 | N-divider 41.
IfxScuCcu_Ndivider_42 | N-divider 42.
IfxScuCcu_Ndivider_43 | N-divider 43.
IfxScuCcu_Ndivider_44 | N-divider 44.
IfxScuCcu_Ndivider_45 | N-divider 45.
IfxScuCcu_Ndivider_46 | N-divider 46.
IfxScuCcu_Ndivider_47 | N-divider 47.
IfxScuCcu_Ndivider_48 | N-divider 48.
IfxScuCcu_Ndivider_49 | N-divider 49.
IfxScuCcu_Ndivider_50 | N-divider 50.
IfxScuCcu_Ndivider_51 | N-divider 51.
IfxScuCcu_Ndivider_52 | N-divider 52.
IfxScuCcu_Ndivider_53 | N-divider 53.
IfxScuCcu_Ndivider_54 | N-divider 54.
IfxScuCcu_Ndivider_55 | N-divider 55.
IfxScuCcu_Ndivider_56 | N-divider 56.
IfxScuCcu_Ndivider_57 | N-divider 57.
IfxScuCcu_Ndivider_58 | N-divider 58.
IfxScuCcu_Ndivider_59 | N-divider 59.
IfxScuCcu_Ndivider_60 | N-divider 60.
IfxScuCcu_Ndivider_61 | N-divider 61.
IfxScuCcu_Ndivider_62 | N-divider 62.
IfxScuCcu_Ndivider_63 | N-divider 63.
IfxScuCcu_Ndivider_64 | N-divider 64.
IfxScuCcu_Ndivider_65 | N-divider 65.
IfxScuCcu_Ndivider_66 | N-divider 66.
IfxScuCcu_Ndivider_67 | N-divider 67.
IfxScuCcu_Ndivider_68 | N-divider 68.
IfxScuCcu_Ndivider_69 | N-divider 69.
IfxScuCcu_Ndivider_70 | N-divider 70.
IfxScuCcu_Ndivider_71 | N-divider 71.
IfxScuCcu_Ndivider_72 | N-divider 72.
IfxScuCcu_Ndivider_73 | N-divider 73.
IfxScuCcu_Ndivider_74 | N-divider 74.
IfxScuCcu_Ndivider_75 | N-divider 75.
IfxScuCcu_Ndivider_76 | N-divider 76.
IfxScuCcu_Ndivider_77 | N-divider 77.
IfxScuCcu_Ndivider_78 | N-divider 78.
IfxScuCcu_Ndivider_79 | N-divider 79.
IfxScuCcu_Ndivider_80 | N-divider 80.
IfxScuCcu_Ndivider_81 | N-divider 81.
IfxScuCcu_Ndivider_82 | N-divider 82.
IfxScuCcu_Ndivider_83 | N-divider 83.
IfxScuCcu_Ndivider_84 | N-divider 84.
IfxScuCcu_Ndivider_85 | N-divider 85.
IfxScuCcu_Ndivider_86 | N-divider 86.
IfxScuCcu_Ndivider_87 | N-divider 87.
IfxScuCcu_Ndivider_88 | N-divider 88.
IfxScuCcu_Ndivider_89 | N-divider 89.
IfxScuCcu_Ndivider_90 | N-divider 90.
IfxScuCcu_Ndivider_91 | N-divider 91.
IfxScuCcu_Ndivider_92 | N-divider 92.
IfxScuCcu_Ndivider_93 | N-divider 93.
IfxScuCcu_Ndivider_94 | N-divider 94.
IfxScuCcu_Ndivider_95 | N-divider 95.
IfxScuCcu_Ndivider_96 | N-divider 96.
IfxScuCcu_Ndivider_97 | N-divider 97.
IfxScuCcu_Ndivider_98 | N-divider 98.
IfxScuCcu_Ndivider_99 | N-divider 99.
IfxScuCcu_Ndivider_100 | N-divider 100.
IfxScuCcu_Ndivider_101 | N-divider 101.
IfxScuCcu_Ndivider_102 | N-divider 102.
IfxScuCcu_Ndivider_103 | N-divider 103.
IfxScuCcu_Ndivider_104 | N-divider 104.
IfxScuCcu_Ndivider_105 | N-divider 105.
IfxScuCcu_Ndivider_106 | N-divider 106.
IfxScuCcu_Ndivider_107 | N-divider 107.
IfxScuCcu_Ndivider_108 | N-divider 108.
IfxScuCcu_Ndivider_109 | N-divider 109.
IfxScuCcu_Ndivider_110 | N-divider 110.
IfxScuCcu_Ndivider_111 | N-divider 111.
IfxScuCcu_Ndivider_112 | N-divider 112.
IfxScuCcu_Ndivider_113 | N-divider 113.
IfxScuCcu_Ndivider_114 | N-divider 114.
IfxScuCcu_Ndivider_115 | N-divider 115.
IfxScuCcu_Ndivider_116 | N-divider 116.
IfxScuCcu_Ndivider_117 | N-divider 117.
IfxScuCcu_Ndivider_118 | N-divider 118.
IfxScuCcu_Ndivider_119 | N-divider 119.
IfxScuCcu_Ndivider_120 | N-divider 120.
IfxScuCcu_Ndivider_121 | N-divider 121.
IfxScuCcu_Ndivider_122 | N-divider 122.
IfxScuCcu_Ndivider_123 | N-divider 123.
IfxScuCcu_Ndivider_124 | N-divider 124.
IfxScuCcu_Ndivider_125 | N-divider 125.
IfxScuCcu_Ndivider_126 | N-divider 126.
IfxScuCcu_Ndivider_127 | N-divider 127.
IfxScuCcu_Ndivider_128 | N-divider 128.

Definition at line 540 of file IfxScuCcu.h.

◆ IfxScuCcu_Pdivider

enum IfxScuCcu_Pdivider

MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider.

Enumerator
IfxScuCcu_Pdivider_1 | P-divider 1.
IfxScuCcu_Pdivider_2 | P-divider 2.
IfxScuCcu_Pdivider_3 | P-divider 3.
IfxScuCcu_Pdivider_4 | P-divider 4.
IfxScuCcu_Pdivider_5 | P-divider 5.
IfxScuCcu_Pdivider_6 | P-divider 6.
IfxScuCcu_Pdivider_7 | P-divider 7.
IfxScuCcu_Pdivider_8 | P-divider 8.
IfxScuCcu_Pdivider_9 | P-divider 9.
IfxScuCcu_Pdivider_10 | P-divider 10.
IfxScuCcu_Pdivider_11 | P-divider 11.
IfxScuCcu_Pdivider_12 | P-divider 12.
IfxScuCcu_Pdivider_13 | P-divider 13.
IfxScuCcu_Pdivider_14 | P-divider 14.
IfxScuCcu_Pdivider_15 | P-divider 15.
IfxScuCcu_Pdivider_16 | P-divider 16.

Definition at line 674 of file IfxScuCcu.h.


iLLD_TC26B: Eru Basic Functionality

Modules
Eru Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Eru Basic Functionality:

Modules

ERU: Enumerations
ERU: External Request Selection
ERU: Event Trigger Logic
ERU: Connecting Matrix
ERU: Output Gating Unit
ERU: Data Structures

Detailed Description


iLLD_TC26B: ERU: Enumerations

Enumerations
ERU: Enumerations
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Enumerations:

Enumerations

enum IfxScuEru_ExternalInputSelection {
IfxScuEru_ExternalInputSelection_0 = 0,
IfxScuEru_ExternalInputSelection_1,
IfxScuEru_ExternalInputSelection_2,
IfxScuEru_ExternalInputSelection_3
}
Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InputChannel {
IfxScuEru_InputChannel_0 = 0,
IfxScuEru_InputChannel_1,
IfxScuEru_InputChannel_2,
IfxScuEru_InputChannel_3,
IfxScuEru_InputChannel_4,
IfxScuEru_InputChannel_5,
IfxScuEru_InputChannel_6,
IfxScuEru_InputChannel_7
}
Input channel for input selection and conditioning of trigger or gating functions. More...
enum IfxScuEru_InputNodePointer {
IfxScuEru_InputNodePointer_0 = 0,
IfxScuEru_InputNodePointer_1,
IfxScuEru_InputNodePointer_2,
IfxScuEru_InputNodePointer_3,
IfxScuEru_InputNodePointer_4,
IfxScuEru_InputNodePointer_5,
IfxScuEru_InputNodePointer_6,
IfxScuEru_InputNodePointer_7
}
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InterruptGatingPattern {
IfxScuEru_InterruptGatingPattern_none = 0,
IfxScuEru_InterruptGatingPattern_alwaysActive = 1,
IfxScuEru_InterruptGatingPattern_patternMatch = 2,
IfxScuEru_InterruptGatingPattern_patternMiss = 3
}
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_OutputChannel {
IfxScuEru_OutputChannel_0 = 0,
IfxScuEru_OutputChannel_1,
IfxScuEru_OutputChannel_2,
IfxScuEru_OutputChannel_3,
IfxScuEru_OutputChannel_4,
IfxScuEru_OutputChannel_5,
IfxScuEru_OutputChannel_6,
IfxScuEru_OutputChannel_7
}
Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...) More...

Detailed Description

Enumeration Type Documentation

◆ IfxScuEru_ExternalInputSelection

enum IfxScuEru_ExternalInputSelection

Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_ExternalInputSelection_0 | External input 0 is selected.
IfxScuEru_ExternalInputSelection_1 | External input 1 is selected.
IfxScuEru_ExternalInputSelection_2 | External input 2 is selected.
IfxScuEru_ExternalInputSelection_3 | External input 3 is selected.

Definition at line 62 of file IfxScuEru.h.

◆ IfxScuEru_InputChannel

enum IfxScuEru_InputChannel

Input channel for input selection and conditioning of trigger or gating functions.

Enumerator
IfxScuEru_InputChannel_0 | External Input channel 0.
IfxScuEru_InputChannel_1 | External Input channel 1.
IfxScuEru_InputChannel_2 | External Input channel 2.
IfxScuEru_InputChannel_3 | External Input channel 3.
IfxScuEru_InputChannel_4 | External Input channel 4.
IfxScuEru_InputChannel_5 | External Input channel 5.
IfxScuEru_InputChannel_6 | External Input channel 6.
IfxScuEru_InputChannel_7 | External Input channel 7.

Definition at line 72 of file IfxScuEru.h.

◆ IfxScuEru_InputNodePointer

enum IfxScuEru_InputNodePointer

Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_InputNodePointer_0 | Event from input ETLx triggers output OGU0 (signal TRx0)
IfxScuEru_InputNodePointer_1 | Event from input ETLx triggers output OGU1 (signal TRx1)
IfxScuEru_InputNodePointer_2 | Event from input ETLx triggers output OGU2 (signal TRx2)
IfxScuEru_InputNodePointer_3 | Event from input ETLx triggers output OGU3 (signal TRx3)
IfxScuEru_InputNodePointer_4 | Event from input ETLx triggers output OGU4 (signal TRx4)
IfxScuEru_InputNodePointer_5 | Event from input ETLx triggers output OGU5 (signal TRx5)
IfxScuEru_InputNodePointer_6 | Event from input ETLx triggers output OGU6 (signal TRx6)
IfxScuEru_InputNodePointer_7 | Event from input ETLx triggers output OGU7 (signal TRx7)

Definition at line 87 of file IfxScuEru.h.

◆ IfxScuEru_InterruptGatingPattern

enum IfxScuEru_InterruptGatingPattern

Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1)

Enumerator
IfxScuEru_InterruptGatingPattern_none | IOUTy is inactive, (the pattern is not considered)
IfxScuEru_InterruptGatingPattern_alwaysActive | IOUTy is activated in response to a trigger event, (the pattern is not considered)
IfxScuEru_InterruptGatingPattern_patternMatch | IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considered)
IfxScuEru_InterruptGatingPattern_patternMiss | IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not considered)

Definition at line 102 of file IfxScuEru.h.

◆ IfxScuEru_OutputChannel

enum IfxScuEru_OutputChannel

Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)

Enumerator
IfxScuEru_OutputChannel_0 | Output channel 0.
IfxScuEru_OutputChannel_1 | Output channel 1.
IfxScuEru_OutputChannel_2 | Output channel 2.
IfxScuEru_OutputChannel_3 | Output channel 3.
IfxScuEru_OutputChannel_4 | Output channel 4.
IfxScuEru_OutputChannel_5 | Output channel 5.
IfxScuEru_OutputChannel_6 | Output channel 6.
IfxScuEru_OutputChannel_7 | Output channel 7.

Definition at line 112 of file IfxScuEru.h.


iLLD_TC26B: ERU: External Request Selection

Functions
ERU: External Request Selection
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: External Request Selection:

Functions

IFX_INLINE void | IfxScuEru_initReqPin (IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin. More...
IFX_EXTERN void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...

Detailed Description

Function Documentation

◆ IfxScuEru_initReqPin()

IFX_INLINE void IfxScuEru_initReqPin | ( | IfxScu_Req_In * | req,
 |  | IfxPort_InputMode | inputMode
 | ) |  |

Initialises the External request Pin.

Parameters
req | External request pin
inputMode | Port Input mode
Returns
None

Definition at line 330 of file IfxScuEru.h.

◆ IfxScuEru_selectExternalInput()

IFX_EXTERN void IfxScuEru_selectExternalInput | ( | IfxScuEru_InputChannel | inputChannel,
 |  | IfxScuEru_ExternalInputSelection | inputSignal
 | ) |  |

Determines which input line is selcted for input channel x.

Parameters
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
inputSignal | Input line selection for input channel
Returns
None

Definition at line 336 of file IfxScuEru.c.

Referenced by IfxScuEru_initReqPin().


iLLD_TC26B: ERU: Event Trigger Logic

Functions
ERU: Event Trigger Logic
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Event Trigger Logic:

Functions

IFX_EXTERN void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
IFX_EXTERN boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
IFX_EXTERN uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...

Detailed Description

Function Documentation

◆ IfxScuEru_clearAllEventFlags()

IFX_EXTERN void IfxScuEru_clearAllEventFlags ( void )

Clears the external event flag of input channel x (INTFx)

Returns
None

Definition at line 44 of file IfxScuEru.c.

◆ IfxScuEru_clearEventFlag()

IFX_EXTERN void IfxScuEru_clearEventFlag ( IfxScuEru_InputChannel inputChannel )

Clears the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 51 of file IfxScuEru.c.

◆ IfxScuEru_clearInputChannelConfiguration()

IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration ( IfxScuEru_InputChannel inputChannel )

Clears all the configuration for the given input channel x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 58 of file IfxScuEru.c.

◆ IfxScuEru_disableAutoClear()

IFX_EXTERN void IfxScuEru_disableAutoClear ( IfxScuEru_InputChannel inputChannel )

Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 110 of file IfxScuEru.c.

◆ IfxScuEru_disableFallingEdgeDetection()

IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Disables the falling edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 126 of file IfxScuEru.c.

◆ IfxScuEru_disableRisingEdgeDetection()

IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Disables the rising edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 158 of file IfxScuEru.c.

◆ IfxScuEru_enableAutoClear()

IFX_EXTERN void IfxScuEru_enableAutoClear ( IfxScuEru_InputChannel inputChannel )

Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 190 of file IfxScuEru.c.

◆ IfxScuEru_enableFallingEdgeDetection()

IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Enables the falling edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 206 of file IfxScuEru.c.

◆ IfxScuEru_enableRisingEdgeDetection()

IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection ( IfxScuEru_InputChannel inputChannel )

Enables the rising edge of input channel to set the bit INTF x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 238 of file IfxScuEru.c.

◆ IfxScuEru_getAllEventFlagsStatus()

IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus ( void )

Returns the status of the flags of all input channels.

Returns
All flags Status

Definition at line 270 of file IfxScuEru.c.

◆ IfxScuEru_getEventFlagStatus()

IFX_EXTERN boolean IfxScuEru_getEventFlagStatus ( IfxScuEru_InputChannel inputChannel )

Returns the status of the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
Status (TRUE / FALSE)

Definition at line 276 of file IfxScuEru.c.

◆ IfxScuEru_getInputChannelConfiguration()

IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration ( IfxScuEru_InputChannel inputChannel )

Returns all the configuration for the given input channel x.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
Input channel configuration

Definition at line 283 of file IfxScuEru.c.

◆ IfxScuEru_setEventFlag()

IFX_EXTERN void IfxScuEru_setEventFlag ( IfxScuEru_InputChannel inputChannel )

Sets the external event flag of input channel x (INTFx)

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 352 of file IfxScuEru.c.


iLLD_TC26B: ERU: Connecting Matrix

Functions
ERU: Connecting Matrix
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Connecting Matrix:

Functions

IFX_EXTERN void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
IFX_EXTERN void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...

Detailed Description

Function Documentation

◆ IfxScuEru_connectTrigger()

IFX_EXTERN void IfxScuEru_connectTrigger | ( | IfxScuEru_InputChannel | inputChannel,
 |  | IfxScuEru_InputNodePointer | triggerSelect
 | ) |  |

Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).

Parameters
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
triggerSelect | Trigger event selection
Returns
None

Definition at line 94 of file IfxScuEru.c.

◆ IfxScuEru_disableTriggerPulse()

IFX_EXTERN void IfxScuEru_disableTriggerPulse ( IfxScuEru_InputChannel inputChannel )

Disables the generation of a trigger event for input channel x when the selected edge is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 174 of file IfxScuEru.c.

◆ IfxScuEru_enableTriggerPulse()

IFX_EXTERN void IfxScuEru_enableTriggerPulse ( IfxScuEru_InputChannel inputChannel )

Enables the generation of a trigger event for input channel x when the selected edge is detected.

Parameters
inputChannel Input channel for input selection and conditioning of trigger or gating functions
Returns
None

Definition at line 254 of file IfxScuEru.c.

◆ IfxScuEru_setFlagPatternDetection()

IFX_EXTERN void IfxScuEru_setFlagPatternDetection | ( | IfxScuEru_OutputChannel | outputChannel,
 |  | IfxScuEru_InputChannel | inputChannel,
 |  | boolean | state
 | ) |  |

Enables the flag INTFx to take part in the pattern detection for output gating.

Parameters
outputChannel | Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
inputChannel | Input channel for input selection and conditioning of trigger or gating functions
state FALSE: the bit INTFx does not take part in the pattern detection IPENjy = 0
TRUE : the bit INTFx is taken into consideration for the pattern detection IPENjy = 1
Returns
None

Definition at line 359 of file IfxScuEru.c.


iLLD_TC26B: ERU: Output Gating Unit

Functions
ERU: Output Gating Unit
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Output Gating Unit:

Functions

IFX_EXTERN void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
IFX_EXTERN uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
IFX_EXTERN void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...

Detailed Description

Function Documentation

◆ IfxScuEru_clearOutputChannelConfiguration()

IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration ( IfxScuEru_OutputChannel outputChannel )

Clears all the configuration for the given input channel y.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 76 of file IfxScuEru.c.

◆ IfxScuEru_disablePatternDetectionTrigger()

IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger ( IfxScuEru_OutputChannel outputChannel )

Disables the generation of a trigger event for output channel y when the result of the pattern detection changes.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 142 of file IfxScuEru.c.

◆ IfxScuEru_enablePatternDetectionTrigger()

IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger ( IfxScuEru_OutputChannel outputChannel )

Enables the generation of a trigger event for output channel y when the result of the pattern detection changes.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
None

Definition at line 222 of file IfxScuEru.c.

◆ IfxScuEru_getOutputChannelConfiguration()

IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration ( IfxScuEru_OutputChannel outputChannel )

Clears all the configuration for the given input channel y.

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
Output channel configuration

Definition at line 303 of file IfxScuEru.c.

◆ IfxScuEru_getPatternDetectionResult()

IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult ( IfxScuEru_OutputChannel outputChannel )

Returns the status of the pattern detection result of output channel y (PDRy)

Parameters
outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
Returns
Status (TRUE / FALSE)

Definition at line 323 of file IfxScuEru.c.

◆ IfxScuEru_getWholePatternDetectionResult()

IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult ( void )

Returns the whole pattern detection result of all the selcted output channels.

Returns
Detected pattern

Definition at line 330 of file IfxScuEru.c.

◆ IfxScuEru_setInterruptGatingPattern()

IFX_EXTERN void IfxScuEru_setInterruptGatingPattern | ( | IfxScuEru_OutputChannel | outputChannel,
 |  | IfxScuEru_InterruptGatingPattern | gatingPattern
 | ) |  |

Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT.

Parameters
outputChannel | Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
gatingPattern | Interrupt gating pattern to determine how the pattern detection influences the ouput lines GOUT and IOUT
Returns
None

Definition at line 382 of file IfxScuEru.c.


iLLD_TC26B: ERU: Data Structures

ERU: Data Structures
iLLD » SCU » Standard Driver » Eru Basic Functionality
Collaboration diagram for ERU: Data Structures:


iLLD_TC26B: Wdt Basic Functionality

Modules
Wdt Basic Functionality
iLLD » SCU » Standard Driver
Collaboration diagram for Wdt Basic Functionality:

Modules

Wdt Operative Functionality
Watchdog Configuration functions
Watchdog Endinit functions
Watchdog Operative functions
How to use Endinit APIs?

Detailed Description


iLLD_TC26B: Wdt Operative Functionality

Macros | Functions
Wdt Operative Functionality
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Wdt Operative Functionality:

Macros

#define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Functions

IFX_INLINE uint16 IfxScuWdt_calculateLfsr (uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR. More...

Detailed Description

Macro Definition Documentation

◆ IFXSCUWDT_CALCULATELFSR

#define IFXSCUWDT_CALCULATELFSR ( pwd ) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Definition at line 35 of file IfxScuWdt.asm.h.

Function Documentation

◆ IfxScuWdt_calculateLfsr()

IFX_INLINE uint16 IfxScuWdt_calculateLfsr ( uint16 password )

SCUWDT Inline API utility to Calculte new 14-bit LFSR.

This API will Calculte new 14-bit LFSR (Linear Feedback Shift Register) with characteristic polynomial x14+x13+x12+x2+1.

Parameters
password Password for which LFSR value to be calculated.
Returns
New LFSR.


iLLD_TC26B: Watchdog Configuration functions

Functions
Watchdog Configuration functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Configuration functions:

Functions

IFX_EXTERN void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
IFX_EXTERN void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_initConfig()

IFX_EXTERN void IfxScuWdt_initConfig ( IfxScuWdt_Config * config )

SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call.

Parameters
config ScuWdt configuration structure to be initialized
Returns
None

Definition at line 242 of file IfxScuWdt.c.

◆ IfxScuWdt_initCpuWatchdog()

IFX_EXTERN void IfxScuWdt_initCpuWatchdog | ( | Ifx_SCU_WDTCPU * | wdt,
 |  | const IfxScuWdt_Config * | config
 | ) |  |

SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module.

This API initialize the ScuWdt software driver and corresponding CPU WDT hardware module. User can configure project specific Watchdog password, Watchdog timer period and other settings with this interface. API corresponds to one instance of the hardware module. User must use this API call for each instance of the WDT hardware module used.

Parameters
wdt | reference to register map of CPU WDT hardware instance
config | ScuWdt configuration structure
Returns
None

Definition at line 256 of file IfxScuWdt.c.

◆ IfxScuWdt_initSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_initSafetyWatchdog | ( | Ifx_SCU_WDTS * | wdt,
 |  | const IfxScuWdt_Config * | config
 | ) |  |

SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module.

This API initialize the ScuWdt software driver and corresponding safety WDT hardware module. User can configure project specific Watchdog password, Watchdog timer period and other settings with this interface. API corresponds to one instance of the hardware module. User must use this API call for each instance of the WDT hardware module used.

Parameters
wdt | reference to register map of Safety WDT hardware instance
config | ScuWdt configuration structure
Returns
None

Definition at line 322 of file IfxScuWdt.c.


iLLD_TC26B: Watchdog Endinit functions

Functions
Watchdog Endinit functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Endinit functions:

Functions

IFX_INLINE void | IfxScuWdt_clearCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_clearCpuEndinit()

IFX_EXTERN void IfxScuWdt_clearCpuEndinit ( uint16 password )

SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.

This API will disable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 172 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxCif_resetModule(), IfxCif_setModuleStateRequest(), IfxCpu_invalidateProgramCache(), IfxCpu_setCoreMode(), IfxDma_setSleepMode(), IfxDsadc_Dsadc_initModule(), IfxDsadc_resetModule(), IfxDsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEth_disableModule(), IfxEth_enableModule(), IfxEth_resetModule(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxFft_disableModule(), IfxFft_enableModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMultican_Can_initModule(), IfxMultican_deinit(), IfxMultican_resetModule(), IfxMultican_setSleepMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinMode(), IfxPort_setPinModeLvdsHigh(), IfxPort_setPinModeLvdsMedium(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setRxInput(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_isOscillatorStable(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_switchToBackupClock(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), IfxStm_setSleepMode(), IfxVadc_disableModule(), IfxVadc_enableGroupSync(), IfxVadc_enableModule(), IfxVadc_resetKernel(), and IfxVadc_setSleepMode().

◆ IfxScuWdt_clearCpuEndinitInline()

IFX_INLINE void IfxScuWdt_clearCpuEndinitInline | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | uint16 | password
 | ) |  |

SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.

This Inline API will disable ENDINIT functionality provided by CPU WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 417 of file IfxScuWdt.h.

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxScuWdt_clearCpuEndinit(), IfxScuWdt_disableCpuWatchdog(), and IfxScuWdt_enableCpuWatchdog().

◆ IfxScuWdt_clearSafetyEndinit()

IFX_EXTERN void IfxScuWdt_clearSafetyEndinit ( uint16 password )

SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 178 of file IfxScuWdt.c.

Referenced by IfxCpu_setCoreMode(), IfxEray_Eray_initModule(), IfxMtu_clearSram(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxPsi5_Psi5_resetModule(), IfxPsi5s_Psi5s_resetModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setPll2ErayFrequency(), IfxScuCcu_setPll2Frequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_switchToBackupClock(), IfxSmu_clearAlarm(), IfxSmu_cmd(), IfxSmu_enableAlarmFsp(), IfxSmu_initFsp(), IfxSmu_lock(), IfxSmu_lockForever(), IfxSmu_setAlarmConfig(), IfxSmu_unlock(), IfxVadc_disableAccess(), and IfxVadc_enableAccess().

◆ IfxScuWdt_clearSafetyEndinitInline()

IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline ( uint16 password )

SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.

This API will disable ENDINIT functionality provided by Safety WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call before modifying any ENDINIT protected register. User must always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set ENDINIT shall not be interrupted by another interrupt/call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 440 of file IfxScuWdt.h.

Referenced by IfxDma_setChannelHardwareResourcePartition(), IfxScuWdt_clearSafetyEndinit(), IfxScuWdt_disableSafetyWatchdog(), and IfxScuWdt_enableSafetyWatchdog().

◆ IfxScuWdt_setCpuEndinit()

IFX_EXTERN void IfxScuWdt_setCpuEndinit ( uint16 password )

SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 401 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxCif_resetModule(), IfxCif_setModuleStateRequest(), IfxCpu_invalidateProgramCache(), IfxCpu_setCoreMode(), IfxDma_setSleepMode(), IfxDsadc_Dsadc_initModule(), IfxDsadc_resetModule(), IfxDsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEth_disableModule(), IfxEth_enableModule(), IfxEth_resetModule(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxFft_disableModule(), IfxFft_enableModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMultican_Can_initModule(), IfxMultican_deinit(), IfxMultican_resetModule(), IfxMultican_setSleepMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinMode(), IfxPort_setPinModeLvdsHigh(), IfxPort_setPinModeLvdsMedium(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setRxInput(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_isOscillatorStable(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_switchToBackupClock(), IfxScuWdt_initCpuWatchdog(), IfxScuWdt_serviceCpuWatchdog(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), IfxStm_setSleepMode(), IfxVadc_disableModule(), IfxVadc_enableGroupSync(), IfxVadc_enableModule(), IfxVadc_resetKernel(), and IfxVadc_setSleepMode().

◆ IfxScuWdt_setCpuEndinitInline()

IFX_INLINE void IfxScuWdt_setCpuEndinitInline | ( | Ifx_SCU_WDTCPU * | watchdog,
 |  | uint16 | password
 | ) |  |

SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.

This API will enable ENDINIT functionality provided by CPU WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
watchdog | pointer to the watchdog register map of CPU WDT hardware instance
password | Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 504 of file IfxScuWdt.h.

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), IfxScuWdt_disableCpuWatchdog(), IfxScuWdt_enableCpuWatchdog(), and IfxScuWdt_setCpuEndinit().

◆ IfxScuWdt_setSafetyEndinit()

IFX_EXTERN void IfxScuWdt_setSafetyEndinit ( uint16 password )

SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 407 of file IfxScuWdt.c.

Referenced by IfxCpu_setCoreMode(), IfxEray_Eray_initModule(), IfxMtu_clearSram(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxPsi5_Psi5_resetModule(), IfxPsi5s_Psi5s_resetModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setPll2ErayFrequency(), IfxScuCcu_setPll2Frequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_switchToBackupClock(), IfxScuWdt_initSafetyWatchdog(), IfxScuWdt_serviceSafetyWatchdog(), IfxSmu_clearAlarm(), IfxSmu_cmd(), IfxSmu_enableAlarmFsp(), IfxSmu_initFsp(), IfxSmu_lock(), IfxSmu_lockForever(), IfxSmu_setAlarmConfig(), IfxSmu_unlock(), IfxVadc_disableAccess(), and IfxVadc_enableAccess().

◆ IfxScuWdt_setSafetyEndinitInline()

IFX_INLINE void IfxScuWdt_setSafetyEndinitInline ( uint16 password )

SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.

This API will enable ENDINIT functionality provided by Safety WDT Hardware module. This API is only meant to be used with startup routines where function call is not possible. User need to use this API call after modifying any ENDINIT protected register. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 527 of file IfxScuWdt.h.

Referenced by IfxDma_setChannelHardwareResourcePartition(), IfxScuWdt_disableSafetyWatchdog(), IfxScuWdt_enableSafetyWatchdog(), and IfxScuWdt_setSafetyEndinit().


iLLD_TC26B: Watchdog Operative functions

Functions
Watchdog Operative functions
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for Watchdog Operative functions:

Functions

IFX_INLINE uint16 | IfxScuWdt_getCpuWatchdogPasswordInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getCpuWatchdogEndInitInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getSafetyWatchdogEndInit (void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module. More...
IFX_INLINE uint16 | IfxScuWdt_getSafetyWatchdogPasswordInline (void)
SCUWDT Inline API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
IFX_EXTERN uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
IFX_EXTERN boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...

Detailed Description

Function Documentation

◆ IfxScuWdt_changeCpuWatchdogPassword()

IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword | ( | uint16 | password,
 |  | uint16 | newPassword
 | ) |  |

SCUWDT API to change CPU Watchdog password.

This API will change password to new one for the corresponding to CPU WDT Hardware module. User need to have the old password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
newPassword | Application specific new password to be changed for the Watchdog module.
Returns
None

Definition at line 45 of file IfxScuWdt.c.

◆ IfxScuWdt_changeCpuWatchdogReload()

IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload | ( | uint16 | password,
 |  | uint16 | reload
 | ) |  |

SCUWDT API to change CPU Watchdog timer reload value.

This API will change Watchdog timer reload value to new one for CPU WDT Hardware module. The Watchdog timers will be reloaded with this value after every serice of Watchdog. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
reload | Reload value for the timer.
Returns
None

Definition at line 76 of file IfxScuWdt.c.

◆ IfxScuWdt_changeSafetyWatchdogPassword()

IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword | ( | uint16 | password,
 |  | uint16 | newPassword
 | ) |  |

SCUWDT API to change Safety Watchdog password.

This API will change password to new one for the corresponding to Safety WDT Hardware module. User need to have the old password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
newPassword | Application specific new password to be changed for the Watchdog module.
Returns
None

Definition at line 109 of file IfxScuWdt.c.

◆ IfxScuWdt_changeSafetyWatchdogReload()

IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload | ( | uint16 | password,
 |  | uint16 | reload
 | ) |  |

SCUWDT API to change Safety Watchdog timer reload value.

This API will change Watchdog timer reload value to new one for Safety WDT Hardware module. The Watchdog timers will be reloaded with this value after every serice of Watchdog. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password | Existing (Application specific) password for the Watchdog module.
reload | Reload value for the timer.
Returns
None

Definition at line 140 of file IfxScuWdt.c.

◆ IfxScuWdt_disableCpuWatchdog()

IFX_EXTERN void IfxScuWdt_disableCpuWatchdog ( uint16 password )

SCUWDT API to disable CPU Watchdog functionality.

This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 184 of file IfxScuWdt.c.

Referenced by _Core0_start().

◆ IfxScuWdt_disableSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog ( uint16 password )

SCUWDT API to disable Safety Watchdog functionality.

This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 196 of file IfxScuWdt.c.

Referenced by _Core0_start().

◆ IfxScuWdt_enableCpuWatchdog()

IFX_EXTERN void IfxScuWdt_enableCpuWatchdog ( uint16 password )

SCUWDT API to enable CPU Watchdog functionality.

This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 204 of file IfxScuWdt.c.

Referenced by _Core0_start().

◆ IfxScuWdt_enableSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog ( uint16 password )

SCUWDT API to enable Safety Watchdog functionality.

This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced periodically after this API call. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 216 of file IfxScuWdt.c.

Referenced by _Core0_start().

◆ IfxScuWdt_getCpuWatchdogEndInit()

IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit ( void )

SCUWDT API to fetch current endinit of CPU Watchdog module.

Returns
Endinit status for the CPU Watchdog module.

Definition at line 230 of file IfxScuWdt.c.

Referenced by IfxMtu_enableModule().

◆ IfxScuWdt_getCpuWatchdogEndInitInline()

IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline ( Ifx_SCU_WDTCPU * watchdog )

SCUWDT API to fetch current endinit of CPU Watchdog module.

Parameters
watchdog pointer to the watchdog register map of CPU WDT hardware instance
Returns
Endinit status for the CPU Watchdog module.

Definition at line 477 of file IfxScuWdt.h.

Referenced by IfxScuWdt_getCpuWatchdogEndInit().

◆ IfxScuWdt_getCpuWatchdogPassword()

IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword ( void )

SCUWDT API to fetch current password of CPU Watchdog module.

This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 224 of file IfxScuWdt.c.

Referenced by IfxAsclin_Asc_disableModule(), IfxAsclin_disableModule(), IfxAsclin_enableModule(), IfxAsclin_Lin_disableModule(), IfxAsclin_resetModule(), IfxAsclin_setSleepMode(), IfxAsclin_Spi_disableModule(), IfxCcu6_disableModule(), IfxCcu6_enableModule(), IfxCcu6_resetModule(), IfxCcu6_setSleepMode(), IfxCif_resetModule(), IfxCif_setModuleStateRequest(), IfxCpu_invalidateProgramCache(), IfxCpu_setCoreMode(), IfxDma_setSleepMode(), IfxDsadc_Dsadc_initModule(), IfxDsadc_resetModule(), IfxDsadc_setSleepMode(), IfxEray_disableModule(), IfxEray_enableModule(), IfxEray_Eray_initModule(), IfxEray_resetModule(), IfxEray_setSleepMode(), IfxEth_disableModule(), IfxEth_enableModule(), IfxEth_resetModule(), IfxFce_Crc_initCrc(), IfxFce_disableModule(), IfxFce_enableModule(), IfxFce_resetModule(), IfxFft_disableModule(), IfxFft_enableModule(), IfxGpt12_disableModule(), IfxGpt12_enableModule(), IfxGpt12_resetModule(), IfxGpt12_setSleepMode(), IfxGtm_Cmu_setClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_disable(), IfxGtm_enable(), IfxHssl_disableHsctModule(), IfxHssl_disableHsslModule(), IfxHssl_enableHsctModule(), IfxHssl_enableHsslModule(), IfxHssl_Hssl_initHsctModule(), IfxHssl_resetHsctKernel(), IfxHssl_resetHsslKernel(), IfxHssl_setHsctSleepMode(), IfxHssl_setHsslSleepMode(), IfxI2c_disableModule(), IfxI2c_enableModule(), IfxI2c_resetModule(), IfxI2c_setBaudrate(), IfxIom_disableModule(), IfxIom_enableModule(), IfxIom_resetModule(), IfxIom_setSleepMode(), IfxMsc_clearReset(), IfxMsc_disableModule(), IfxMsc_Msc_initModule(), IfxMsc_resetModule(), IfxMsc_setFractionalDividerStep(), IfxMsc_setSleepMode(), IfxMtu_enableModule(), IfxMultican_Can_initModule(), IfxMultican_deinit(), IfxMultican_resetModule(), IfxMultican_setSleepMode(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupPadDriver(), IfxPort_setPinMode(), IfxPort_setPinModeLvdsHigh(), IfxPort_setPinModeLvdsMedium(), IfxPort_setPinPadDriver(), IfxPsi5_disableModule(), IfxPsi5_enableAllChannels(), IfxPsi5_enableModule(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_resetModule(), IfxPsi5_resetModule(), IfxPsi5_setFractionalDivider(), IfxPsi5_setRxInput(), IfxPsi5s_disableModule(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_resetModule(), IfxPsi5s_resetModule(), IfxPsi5s_setSleepMode(), IfxQspi_resetModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_isOscillatorStable(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_switchToBackupClock(), IfxSent_disableModule(), IfxSent_enableModule(), IfxSent_resetModule(), IfxSent_Sent_deInitModule(), IfxSent_Sent_initModule(), IfxSent_setSleepMode(), IfxStm_disableModule(), IfxStm_resetModule(), IfxStm_setSleepMode(), IfxVadc_disableModule(), IfxVadc_enableGroupSync(), IfxVadc_enableModule(), IfxVadc_resetKernel(), and IfxVadc_setSleepMode().

◆ IfxScuWdt_getCpuWatchdogPasswordInline()

IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline ( Ifx_SCU_WDTCPU * watchdog )

SCUWDT Inline API to fetch current password of CPU Watchdog module.

This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Parameters
watchdog pointer to the watchdog register map of CPU WDT hardware instance
Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 463 of file IfxScuWdt.h.

Referenced by _Core0_start(), _Core1_start(), IfxCpu_enableSegmentSpecificDataAccessCacheability(), IfxCpu_enableSegmentSpecificInstructionAccessCacheability(), IfxCpu_setDataCache(), IfxCpu_setProgramCache(), and IfxScuWdt_getCpuWatchdogPassword().

◆ IfxScuWdt_getSafetyWatchdogEndInit()

IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit ( void )

SCUWDT API to fetch current endinit of Safety/System Watchdog module.

Returns
Endinit status for the Safety Watchdog module.

Definition at line 483 of file IfxScuWdt.h.

Referenced by IfxMtu_clearSram(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().

◆ IfxScuWdt_getSafetyWatchdogPassword()

IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword ( void )

SCUWDT API to fetch current password of Safety Watchdog module.

This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 236 of file IfxScuWdt.c.

Referenced by _Core0_start(), IfxCpu_setCoreMode(), IfxEray_Eray_initModule(), IfxMtu_clearSram(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxScuCcu_init(), IfxScuCcu_initErayPll(), IfxScuCcu_setCpuFrequency(), IfxScuCcu_setGtmFrequency(), IfxScuCcu_setPll2ErayFrequency(), IfxScuCcu_setPll2Frequency(), IfxScuCcu_setSpbFrequency(), IfxScuCcu_setSriFrequency(), IfxScuCcu_switchToBackupClock(), IfxSmu_clearAlarm(), IfxSmu_cmd(), IfxSmu_enableAlarmFsp(), IfxSmu_initFsp(), IfxSmu_lock(), IfxSmu_lockForever(), IfxSmu_setAlarmConfig(), IfxSmu_unlock(), IfxVadc_disableAccess(), and IfxVadc_enableAccess().

◆ IfxScuWdt_getSafetyWatchdogPasswordInline()

IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline ( void )

SCUWDT Inline API to fetch current password of Safety Watchdog module.

This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function or store the password globally in a global variable at the application memory. This API is only meant to be used with startup routines where function call is not possible.

Returns
password Existing (Application specific) password for the Watchdog module.

Definition at line 489 of file IfxScuWdt.h.

Referenced by IfxDma_setChannelHardwareResourcePartition(), and IfxScuWdt_getSafetyWatchdogPassword().

◆ IfxScuWdt_serviceCpuWatchdog()

IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog ( uint16 password )

SCUWDT API to service CPU Watchdog functionality.

This API will service Watchdog functionality corresponding to CPU WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 389 of file IfxScuWdt.c.

◆ IfxScuWdt_serviceSafetyWatchdog()

IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog ( uint16 password )

SCUWDT API to service Safety Watchdog functionality.

This API will service Watchdog functionality corresponding to Safety WDT Hardware module. User need to use this API call periodically. This API results in reloading of the Watchdog Timer. User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).

Parameters
password Existing (Application specific) password for the Watchdog module.
Returns
None

Definition at line 395 of file IfxScuWdt.c.


iLLD_TC26B: How to use Endinit APIs?

How to use Endinit APIs?
iLLD » SCU » Standard Driver » Wdt Basic Functionality
Collaboration diagram for How to use Endinit APIs?:


iLLD_TC26B: SCU Pin Mapping

Data Structures | Macros | Variables
SCU Pin Mapping
iLLD » SCU
Collaboration diagram for SCU Pin Mapping:

Data Structures

struct | IfxScu_Evrwup_In
EVR Wakeup pin mapping structure. More...
struct | IfxScu_Hwcfg_In
Hardware Configuration pin mapping structure. More...
struct | IfxScu_Req_In
External Request pin mapping structure. More...
struct | IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure. More...
struct | IfxScu_Emgstop_In
Emergency Stop pin mapping structure. More...
struct | IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure. More...
struct | IfxScu_Extclk_Out
External Clock pin mapping structure. More...

Macros

#define | IFXSCU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSCU_PINMAP_NUM_REQUESTS 8
#define | IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3
#define | IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7
#define | IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4
#define | IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
SCU_DCDCSYNC: SCU output. More...
IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
SCU_DCDCSYNC: SCU output. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
SCU_EMGSTOPA: SCU input. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
SCU_EMGSTOPB: SCU input. More...
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
SCU_EVRWUPA: SCU input. More...
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
SCU_EVRWUPB: SCU input. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
SCU_EXTCLK0: SCU output. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
SCU_EXTCLK1: SCU output. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
SCU_EXTCLK1: SCU output. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
SCU_HWCFG3_BMI: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
SCU_HWCFG4: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
SCU_HWCFG5: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z). More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN
SCU_REQ0: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN
SCU_REQ10: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN
SCU_REQ11: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN
SCU_REQ12: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN
SCU_REQ13: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN
SCU_REQ14: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN
SCU_REQ15: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN
SCU_REQ16: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN
SCU_REQ1: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN
SCU_REQ2: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN
SCU_REQ3: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN
SCU_REQ4: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN
SCU_REQ5: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN
SCU_REQ6: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN
SCU_REQ7: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN
SCU_REQ8: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN
SCU_REQ9: SCU input. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
SCU_WDT0LCK: SCU output. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
SCU_WDT1LCK: SCU output. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
SCU_WDTSLCK: SCU output. More...
IFX_EXTERN const IfxScu_Dcdcsync_Out * | IfxScu_Dcdcsync_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxScu_Dcdcsync_Out table. More...
IFX_EXTERN const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table. More...
IFX_EXTERN const IfxScu_Evrwup_In * | IfxScu_Evrwup_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
IfxScu_Evrwup_In table. More...
IFX_EXTERN const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table. More...
IFX_EXTERN const IfxScu_Hwcfg_In * | IfxScu_Hwcfg_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxScu_Hwcfg_In table. More...
IFX_EXTERN const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table. More...
IFX_EXTERN const IfxScu_Wdtlck_Out * | IfxScu_Wdtlck_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
IfxScu_Wdtlck_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxScu_Evrwup_In

struct IfxScu_Evrwup_In

EVR Wakeup pin mapping structure.

Definition at line 39 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Evrwup_In:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Hwcfg_In

struct IfxScu_Hwcfg_In

Hardware Configuration pin mapping structure.

Definition at line 47 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Hwcfg_In:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.

◆ IfxScu_Req_In

struct IfxScu_Req_In

External Request pin mapping structure.

Definition at line 54 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Req_In:
[legend]
Data Fields
uint8 | channelId | ERU Channel ID.
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Dcdcsync_Out

struct IfxScu_Dcdcsync_Out

DCDC Sync pin mapping structure.

Definition at line 63 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Dcdcsync_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxScu_Emgstop_In

struct IfxScu_Emgstop_In

Emergency Stop pin mapping structure.

Definition at line 71 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Emgstop_In:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxScu_Wdtlck_Out

struct IfxScu_Wdtlck_Out

Watchdog Timer Lock pin mapping structure.

Definition at line 79 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Wdtlck_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxScu_Extclk_Out

struct IfxScu_Extclk_Out

External Clock pin mapping structure.

Definition at line 87 of file IfxScu_PinMap.h.

Collaboration diagram for IfxScu_Extclk_Out:
[legend]
Data Fields
Ifx_SCU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS

#define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2

Definition at line 134 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS

#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2

Definition at line 135 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS

#define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2

Definition at line 136 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS

#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3

Definition at line 137 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS

#define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7

Definition at line 138 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_NUM_MODULES

#define IFXSCU_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 132 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_NUM_REQUESTS

#define IFXSCU_PINMAP_NUM_REQUESTS 8

Definition at line 133 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_REQ_IN_NUM_ITEMS

#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4

Definition at line 139 of file IfxScu_PinMap.h.

◆ IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS

#define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3

Definition at line 140 of file IfxScu_PinMap.h.

Variable Documentation

◆ IfxScu_Dcdcsync_Out_pinTable

IFX_EXTERN const IfxScu_Dcdcsync_Out* IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]

IfxScu_Dcdcsync_Out table.

Definition at line 144 of file IfxScu_PinMap.h.

◆ IfxScu_DCDCSYNC_P32_2_OUT

IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT

SCU_DCDCSYNC: SCU output.

Definition at line 94 of file IfxScu_PinMap.h.

◆ IfxScu_DCDCSYNC_P33_13_OUT

IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT

SCU_DCDCSYNC: SCU output.

Definition at line 95 of file IfxScu_PinMap.h.

◆ IfxScu_Emgstop_In_pinTable

IFX_EXTERN const IfxScu_Emgstop_In* IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]

IfxScu_Emgstop_In table.

Definition at line 147 of file IfxScu_PinMap.h.

◆ IfxScu_EMGSTOPA_P33_8_IN

IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN

SCU_EMGSTOPA: SCU input.

Definition at line 96 of file IfxScu_PinMap.h.

◆ IfxScu_EMGSTOPB_P21_2_IN

IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN

SCU_EMGSTOPB: SCU input.

Definition at line 97 of file IfxScu_PinMap.h.

◆ IfxScu_Evrwup_In_pinTable

IFX_EXTERN const IfxScu_Evrwup_In* IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]

IfxScu_Evrwup_In table.

Definition at line 150 of file IfxScu_PinMap.h.

◆ IfxScu_EVRWUPA_P14_1_IN

IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN

SCU_EVRWUPA: SCU input.

Definition at line 98 of file IfxScu_PinMap.h.

◆ IfxScu_EVRWUPB_P15_1_IN

IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN

SCU_EVRWUPB: SCU input.

Definition at line 99 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK0_P23_1_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT

SCU_EXTCLK0: SCU output.

Definition at line 100 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK1_P11_12_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT

SCU_EXTCLK1: SCU output.

Definition at line 101 of file IfxScu_PinMap.h.

◆ IfxScu_EXTCLK1_P32_4_OUT

IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT

SCU_EXTCLK1: SCU output.

Definition at line 102 of file IfxScu_PinMap.h.

◆ IfxScu_Extclk_Out_pinTable

IFX_EXTERN const IfxScu_Extclk_Out* IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]

IfxScu_Extclk_Out table.

Definition at line 153 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG0DCLDO_P14_6_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN

SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode.

Definition at line 103 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG1EVR33_P14_5_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN

SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation.

Definition at line 104 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG2EVR13_P14_2_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN

SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation.

Definition at line 105 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG3_BMI_P14_3_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN

SCU_HWCFG3_BMI: SCU input.

Definition at line 106 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG4_P10_5_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN

SCU_HWCFG4: SCU input.

Definition at line 107 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG5_P10_6_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN

SCU_HWCFG5: SCU input.

Definition at line 108 of file IfxScu_PinMap.h.

◆ IfxScu_HWCFG6_P14_4_IN

IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN

SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z).

Definition at line 109 of file IfxScu_PinMap.h.

◆ IfxScu_Hwcfg_In_pinTable

IFX_EXTERN const IfxScu_Hwcfg_In* IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]

IfxScu_Hwcfg_In table.

Definition at line 156 of file IfxScu_PinMap.h.

◆ IfxScu_REQ0_P15_4_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN

SCU_REQ0: SCU input.

Definition at line 110 of file IfxScu_PinMap.h.

◆ IfxScu_REQ10_P14_3_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN

SCU_REQ10: SCU input.

Definition at line 111 of file IfxScu_PinMap.h.

◆ IfxScu_REQ11_P20_9_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN

SCU_REQ11: SCU input.

Definition at line 112 of file IfxScu_PinMap.h.

◆ IfxScu_REQ12_P11_10_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN

SCU_REQ12: SCU input.

Definition at line 113 of file IfxScu_PinMap.h.

◆ IfxScu_REQ13_P15_5_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN

SCU_REQ13: SCU input.

Definition at line 114 of file IfxScu_PinMap.h.

◆ IfxScu_REQ14_P02_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN

SCU_REQ14: SCU input.

Definition at line 115 of file IfxScu_PinMap.h.

◆ IfxScu_REQ15_P14_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN

SCU_REQ15: SCU input.

Definition at line 116 of file IfxScu_PinMap.h.

◆ IfxScu_REQ16_P15_1_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN

SCU_REQ16: SCU input.

Definition at line 117 of file IfxScu_PinMap.h.

◆ IfxScu_REQ1_P15_8_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN

SCU_REQ1: SCU input.

Definition at line 118 of file IfxScu_PinMap.h.

◆ IfxScu_REQ2_P10_2_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN

SCU_REQ2: SCU input.

Definition at line 119 of file IfxScu_PinMap.h.

◆ IfxScu_REQ3_P10_3_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN

SCU_REQ3: SCU input.

Definition at line 120 of file IfxScu_PinMap.h.

◆ IfxScu_REQ4_P10_7_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN

SCU_REQ4: SCU input.

Definition at line 121 of file IfxScu_PinMap.h.

◆ IfxScu_REQ5_P10_8_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN

SCU_REQ5: SCU input.

Definition at line 122 of file IfxScu_PinMap.h.

◆ IfxScu_REQ6_P02_0_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN

SCU_REQ6: SCU input.

Definition at line 123 of file IfxScu_PinMap.h.

◆ IfxScu_REQ7_P00_4_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN

SCU_REQ7: SCU input.

Definition at line 124 of file IfxScu_PinMap.h.

◆ IfxScu_REQ8_P33_7_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN

SCU_REQ8: SCU input.

Definition at line 125 of file IfxScu_PinMap.h.

◆ IfxScu_REQ9_P20_0_IN

IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN

SCU_REQ9: SCU input.

Definition at line 126 of file IfxScu_PinMap.h.

◆ IfxScu_Req_In_pinTable

IFX_EXTERN const IfxScu_Req_In* IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]

IfxScu_Req_In table.

Definition at line 159 of file IfxScu_PinMap.h.

◆ IfxScu_WDT0LCK_P20_8_OUT

IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT

SCU_WDT0LCK: SCU output.

Definition at line 127 of file IfxScu_PinMap.h.

◆ IfxScu_WDT1LCK_P20_7_OUT

IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT

SCU_WDT1LCK: SCU output.

Definition at line 128 of file IfxScu_PinMap.h.

◆ IfxScu_Wdtlck_Out_pinTable

IFX_EXTERN const IfxScu_Wdtlck_Out* IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]

IfxScu_Wdtlck_Out table.

Definition at line 162 of file IfxScu_PinMap.h.

◆ IfxScu_WDTSLCK_P20_9_OUT

IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT

SCU_WDTSLCK: SCU output.

Definition at line 129 of file IfxScu_PinMap.h.


iLLD_TC26B: How to use the Scu Clock driver?

How to use the Scu Clock driver?
iLLD » SCU
Collaboration diagram for How to use the Scu Clock driver?:

The Scu Clock control unit driver provides a default configuration for pll and Clock initialisation and set of peripheral clock configuration functions.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Scu/Std/IfxScuCcu.h>

Variables

Declare the Clock Configuration variables in your C code:

// used globally
// configuration for the PLL steps
static IfxScuCcu_PllStepsConfig IfxScuCcu_testPllConfigSteps[] = {
IFXSCU_CFG_PLL_STEPS
};
// Default configuration for the Clock Configuration
IfxScuCcu_Config IfxScuCcu_testClockConfig = {
{
sizeof(IfxScuCcu_testPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
(IfxScuCcu_PllStepsConfig *)IfxScuCcu_testPllConfigSteps,
IFXSCU_CFG_PLL_INITIAL_STEP,
},
IFXSCU_CFG_CLK_DISTRIBUTION,
IFXSCU_CFG_FLASH_WAITSTATE,
IFX_CFG_SCU_XTAL_FREQUENCY
};

Module Initialisation

The module initialisation can be done in the same function. Here an example:

// standard PLL & clock initialisation
IfxScuCcu_init(&IfxScuCcu_testClockConfig);

The PLL and clocks are now initialised based on the IFXSCU_CFG_XTAL_FREQ and IFXSCU_CFG_PLL_FREQ values configured in Ifx_Cfg.h.


iLLD_TC26B: IfxScu_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxScu_cfg.h File Reference
iLLD » SCU

SCU on-chip implementation data. More...

#include "Ifx_Cfg.h"
#include "IfxScu_bf.h"
#include "IfxFlash_bf.h"
Include dependency graph for IfxScu_cfg.h:

Go to the source code of this file.

Macros

#define | IFX_CFG_SCU_XTAL_FREQUENCY 20000000
Default External oscillator frequency. More...
#define | IFX_CFG_SCU_PLL_FREQUENCY 200000000
Default PLL frequency. More...
#define | IFXSCU_VCO_BASE_FREQUENCY (100000000.0)
#define | IFXSCU_EVR_OSC_FREQUENCY (100000000.0)
#define | IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ
Macros to configure Pll steps, Macros to configure the Pll steps for different profiles of Crystal frequency and target frequencies. This configuration is important for the current jump controll during clock throttling. IfxScuCcu_PllStepsConfig. More...
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ
Macro for Pll step for profile with 16MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ
Macro for Pll step for profile with 16MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ
Macro for Pll step for profile with 16MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ
Macro for Pll step for profile with 16MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ
Macro for Pll step for profile with 20MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ
Macro for Pll step for profile with 20MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ
Macro for Pll step for profile with 20MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ
Macro for Pll step for profile with 20MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ
Macro for Pll step for profile with 20MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ
Macro for Pll step for profile with 20MHz Crystal and 300MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ
Macro for Pll step for profile with 40MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ
Macro for Pll step for profile with 40MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ
Macro for Pll step for profile with 40MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ
Macro for Pll step for profile with 40MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ
Macro for Pll step for profile with 40MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ
Macro for Pll step for profile with 40MHz Crystal and 300MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ
Macro for Pll step for profile with 8MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ
Macro for Pll step for profile with 8MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ
Macro for Pll step for profile with 8MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ
Macros to configure Initial Pll step. Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are done for the internal Oscillator frequency. IfxScuCcu_InitialStepConfig. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ
Macro for Initial Pll step, for profile with 16MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ
Macro for Initial Pll step, for profile with 20MHz Crystal and 300MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 133MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 240MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ
Macro for Initial Pll step, for profile with 40MHz Crystal and 300MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ
Macro for Initial Pll step, for profile with 8MHz Crystal and 80MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ
Macro for Initial Pll step, for profile with 8MHz Crystal and 160MHz target. More...
#define | IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ
Macro for Initial Pll step, for profile with 8MHz Crystal and 200MHz target. More...
#define | IFXSCU_CFG_MAXDIV_80MHZ (1)
Macros to configure CCUCON registers. Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are done for the internal Oscillator frequency. IfxScuCcu_InitialStepConfig. More...
#define | IFXSCU_CFG_MAXDIV_133MHZ (1)
Macro to configure MAXDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_MAXDIV_160MHZ (1)
Macro to configure MAXDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_MAXDIV_200MHZ (1)
Macro to configure MAXDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_MAXDIV_240MHZ (1)
Macro to configure MAXDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_MAXDIV_300MHZ (1)
Macro to configure MAXDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_SRIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
Macro to configure SRIDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure BAUD1DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure BAUD1DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure BAUD1DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure BAUD1DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure BAUD1DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_BAUD1DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure BAUD1DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_BAUD2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
Macro to configure BAUD2DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2) /*Max: 100MHz */
Macro to configure SPBDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure SPBDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure SPBDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure SPBDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure SPBDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_SPBDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure SPBDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
Macro to configure FSI2DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure FSIDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure FSIDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure FSIDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure FSIDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure FSIDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure FSIDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure CANDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure CANDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure CANDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure CANDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure CANDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_CANDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure CANDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 80MHz */
Macro to configure ERAYDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 80MHz */
Macro to configure ERAYDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 80MHz */
Macro to configure ERAYDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 3) /*Max: 80MHz */
Macro to configure ERAYDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 80MHz */
Macro to configure ERAYDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ERAYDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 4) /*Max: 80MHz */
Macro to configure ERAYDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure STMDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure STMDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure STMDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure STMDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure STMDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_STMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure STMDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure GTMDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure GTMDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure GTMDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure GTMDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure GTMDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_GTMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure GTMDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2)
Macro to configure ETHDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 3)
Macro to configure ETHDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 4)
Macro to configure ETHDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 4)
Macro to configure ETHDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 5)
Macro to configure ETHDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_ETHDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 6)
Macro to configure ETHDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINFDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
Macro to configure ASCLINFDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_ASCLINSDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
Macro to configure ASCLINSDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 2)
Macro to configure BBBDIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)
Macro to configure BBBDIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_160MHZ (IFXSCU_CFG_SRIDIV_160MHZ * 2)
Macro to configure BBBDIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)
Macro to configure BBBDIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 2)
Macro to configure BBBDIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_BBBDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 2)
Macro to configure BBBDIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_80MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_133MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_160MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_200MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_240MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_CPU0DIV_300MHZ (0) /*Same as SRIDIV */
Macro to configure CPU0DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_80MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 80MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_133MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 133MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_160MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 160MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_200MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 200MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_240MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 240MHz target frequency. More...
#define | IFXSCU_CFG_CPU1DIV_300MHZ (0) /*Same as SRIDIV */
Macro to configure CPU1DIV at 300MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ (3 - 1)
Macros to configure FLASH.FCON register for flash waitstate configuration. IfxScuCcu_InitialStepConfig. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ (4 - 1)
Macro to configure FCON.WSPFLASH at 133MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ (5 - 1)
Macro to configure FCON.WSPFLASH at 160MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ (6 - 1)
Macro to configure FCON.WSPFLASH at 200MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ (8 - 1)
Macro to configure FCON.WSPFLASH at 240MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ (9 - 1)
Macro to configure FCON.WSPFLASH at 300MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ (1 - 1)
Macro to configure FCON.WSECP_ at 80MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ (2 - 1)
Macro to configure FCON.WSECPF at 133MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ (2 - 1)
Macro to configure FCON.WSECPF at 160MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ (2 - 1)
Macro to configure FCON.WSECPF at 200MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ (3 - 1)
Macro to configure FCON.WSECPF_ at 240MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ (3 - 1)
Macro to configure FCON.WSECPF at 300MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ (16 - 1)
Macro to configure FCON.WSDFLASH at 80MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ (14 - 1)
Macro to configure FCON.WSDFLASH_ at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ (16 - 1)
Macro to configure FCON.WSDFLASH at 160MHz target frequency, where fSRI= 160/2= 80MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ (20 - 1)
Macro to configure FCON.WSDFLASH at 200MHz target frequency, where fSRI= 200/2= 100MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ (16 - 1)
Macro to configure FCON.WSDFLASH at 240MHz target frequency, where fSRI= 240/3= 80MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ (20 - 1)
Macro to configure FCON.WSDFLASH at 300MHz target frequency, where fSRI= 300/3= 100MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ (2 - 1)
Macro to configure FCON.WSECDF at 80MHz target frequency. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ (2 - 1)
Macro to configure FCON.WSECDF at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ (2 - 1)
Macro to configure FCON.WSECDF at 160MHz target frequency, where fSRI= 160/2= 80MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ (2 - 1)
Macro to configure FCON.WSECDF at 200MHz target frequency, where fSRI= 200/2= 100MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ (2 - 1)
Macro to configure FCON.WSECDF at 240MHz target frequency, where fSRI= 240/3= 80MHZ. More...
#define | IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ (2 - 1)
Macro to configure FCON.WSECDF at 300MHz target frequency, where fSRI= 300/3= 100MHZ. More...
#define | IFXSCU_CFG_FLASH_WAITSTATE_MSK
Macros to configure FLASH.FCON registers. More...
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(pllFreq) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)
#define | IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON0_MASK
Macros to configure CCUCON0 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON0_BASIC(pllFreq) IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON1_MASK
Macros to configure CCUCON1 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON1_BASIC(pllFreq) IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON2_MASK
Macros to configure CCUCON2 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON2_BASIC(pllFreq) IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON5_MASK
Macros to configure CCUCON5 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON5_BASIC(pllFreq) IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON6_MASK
Macros to configure CCUCON6 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON6_BASIC(pllFreq) IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CCUCON7_MASK
Macros to configure CCUCON7 Clock distribution. More...
#define | IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON7_BASIC(pllFreq) IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)
#define | IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_CLK_DISTRIBUTION
#define | IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pllFreq
#define | IFXSCU_CFG_PLL_STEPS_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq)
#define | IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_##xtalFreq##_##pllFreq
#define | IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq)
#define | IFXSCU_CFG_PLL_INITIAL_STEP IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
#define | IFXSCU_CFG_FLASH_WAITSTATE
#define | IFXSCU_CFG_XTAL_FREQ 20MHZ
#define | IFXSCU_CFG_PLL_FREQ 200MHZ

Enumerations

enum IfxScu_CCUCON0_CLKSEL {
IfxScu_CCUCON0_CLKSEL_fBack = 0,
IfxScu_CCUCON0_CLKSEL_fPll = 1
}
enum IfxScu_CCUCON1_INSEL {
IfxScu_CCUCON1_INSEL_fOsc1 = 0,
IfxScu_CCUCON1_INSEL_fOsc0 = 1
}
enum IfxScu_WDTCON1_IR {
IfxScu_WDTCON1_IR_divBy16384 = 0,
IfxScu_WDTCON1_IR_divBy256 = 1,
IfxScu_WDTCON1_IR_divBy64 = 2
}
enum IfxScu_PMCSR_REQSLP {
IfxScu_PMCSR_REQSLP_Run = 0U,
IfxScu_PMCSR_REQSLP_Idle = 1U,
IfxScu_PMCSR_REQSLP_Sleep = 2U,
IfxScu_PMCSR_REQSLP_Stby = 3U
}

Detailed Description

SCU on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScu_cfg.h.

Macro Definition Documentation

◆ IFX_CFG_SCU_PLL_FREQUENCY

#define IFX_CFG_SCU_PLL_FREQUENCY 200000000

Default PLL frequency.

Definition at line 49 of file IfxScu_cfg.h.

◆ IFX_CFG_SCU_XTAL_FREQUENCY

#define IFX_CFG_SCU_XTAL_FREQUENCY 20000000

Default External oscillator frequency.

Definition at line 43 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_133MHZ

#define IFXSCU_CFG_ASCLINFDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 133MHz target frequency.

Definition at line 926 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_160MHZ

#define IFXSCU_CFG_ASCLINFDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 160MHz target frequency.

Definition at line 931 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_200MHZ

#define IFXSCU_CFG_ASCLINFDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 200MHz target frequency.

Definition at line 936 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_240MHZ

#define IFXSCU_CFG_ASCLINFDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 240MHz target frequency.

Definition at line 941 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_300MHZ

#define IFXSCU_CFG_ASCLINFDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 300MHz target frequency.

Definition at line 946 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINFDIV_80MHZ

#define IFXSCU_CFG_ASCLINFDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */

Macro to configure ASCLINFDIV at 80MHz target frequency.

Definition at line 921 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_133MHZ

#define IFXSCU_CFG_ASCLINSDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 133MHz target frequency.

Definition at line 956 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_160MHZ

#define IFXSCU_CFG_ASCLINSDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 160MHz target frequency.

Definition at line 961 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_200MHZ

#define IFXSCU_CFG_ASCLINSDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 200MHz target frequency.

Definition at line 966 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_240MHZ

#define IFXSCU_CFG_ASCLINSDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 240MHz target frequency.

Definition at line 971 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_300MHZ

#define IFXSCU_CFG_ASCLINSDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 300MHz target frequency.

Definition at line 976 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ASCLINSDIV_80MHZ

#define IFXSCU_CFG_ASCLINSDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure ASCLINSDIV at 80MHz target frequency.

Definition at line 951 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_133MHZ

#define IFXSCU_CFG_BAUD1DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure BAUD1DIV at 133MHz target frequency.

Definition at line 626 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_160MHZ

#define IFXSCU_CFG_BAUD1DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure BAUD1DIV at 160MHz target frequency.

Definition at line 631 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_200MHZ

#define IFXSCU_CFG_BAUD1DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure BAUD1DIV at 200MHz target frequency.

Definition at line 636 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_240MHZ

#define IFXSCU_CFG_BAUD1DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure BAUD1DIV at 240MHz target frequency.

Definition at line 641 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_300MHZ

#define IFXSCU_CFG_BAUD1DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure BAUD1DIV at 300MHz target frequency.

Definition at line 646 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD1DIV_80MHZ

#define IFXSCU_CFG_BAUD1DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure BAUD1DIV at 80MHz target frequency.

Definition at line 621 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_133MHZ

#define IFXSCU_CFG_BAUD2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 133MHz target frequency.

Definition at line 656 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_160MHZ

#define IFXSCU_CFG_BAUD2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 160MHz target frequency.

Definition at line 661 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_200MHZ

#define IFXSCU_CFG_BAUD2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 200MHz target frequency.

Definition at line 666 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_240MHZ

#define IFXSCU_CFG_BAUD2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 240MHz target frequency.

Definition at line 671 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_300MHZ

#define IFXSCU_CFG_BAUD2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 300MHz target frequency.

Definition at line 676 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BAUD2DIV_80MHZ

#define IFXSCU_CFG_BAUD2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */

Macro to configure BAUD2DIV at 80MHz target frequency.

Definition at line 651 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_133MHZ

#define IFXSCU_CFG_BBBDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)

Macro to configure BBBDIV at 133MHz target frequency.

Definition at line 986 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_160MHZ

#define IFXSCU_CFG_BBBDIV_160MHZ (IFXSCU_CFG_SRIDIV_160MHZ * 2)

Macro to configure BBBDIV at 160MHz target frequency.

Definition at line 991 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_200MHZ

#define IFXSCU_CFG_BBBDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)

Macro to configure BBBDIV at 200MHz target frequency.

Definition at line 996 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_240MHZ

#define IFXSCU_CFG_BBBDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 2)

Macro to configure BBBDIV at 240MHz target frequency.

Definition at line 1001 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_300MHZ

#define IFXSCU_CFG_BBBDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 2)

Macro to configure BBBDIV at 300MHz target frequency.

Definition at line 1006 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_BBBDIV_80MHZ

#define IFXSCU_CFG_BBBDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 2)

Macro to configure BBBDIV at 80MHz target frequency.

Definition at line 981 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_133MHZ

#define IFXSCU_CFG_CANDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure CANDIV at 133MHz target frequency.

Definition at line 776 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_160MHZ

#define IFXSCU_CFG_CANDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure CANDIV at 160MHz target frequency.

Definition at line 781 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_200MHZ

#define IFXSCU_CFG_CANDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure CANDIV at 200MHz target frequency.

Definition at line 786 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_240MHZ

#define IFXSCU_CFG_CANDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure CANDIV at 240MHz target frequency.

Definition at line 791 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_300MHZ

#define IFXSCU_CFG_CANDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure CANDIV at 200MHz target frequency.

Definition at line 796 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CANDIV_80MHZ

#define IFXSCU_CFG_CANDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure CANDIV at 80MHz target frequency.

Definition at line 771 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0

#define IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1233 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_BASIC

#define IFXSCU_CFG_CCUCON0_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)

Definition at line 1231 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_BASIC_

#define IFXSCU_CFG_CCUCON0_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_BAUD1DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
(IFXSCU_CFG_BAUD2DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
(IFXSCU_CFG_SRIDIV_##pllFreq << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
(IFXSCU_CFG_SPBDIV_##pllFreq << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
(IFXSCU_CFG_FSI2DIV_##pllFreq << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
(IFXSCU_CFG_FSIDIV_##pllFreq << IFX_SCU_CCUCON0_FSIDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:113

Definition at line 1222 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON0_MASK

#define IFXSCU_CFG_CCUCON0_MASK
Value:
( \
(IFX_SCU_CCUCON0_BAUD1DIV_MSK << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
(IFX_SCU_CCUCON0_BAUD2DIV_MSK << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
(IFX_SCU_CCUCON0_SRIDIV_MSK << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
(IFX_SCU_CCUCON0_SPBDIV_MSK << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
(IFX_SCU_CCUCON0_FSI2DIV_MSK << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
(IFX_SCU_CCUCON0_FSIDIV_MSK << IFX_SCU_CCUCON0_FSIDIV_OFF))

Macros to configure CCUCON0 Clock distribution.

Definition at line 1213 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1

#define IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1258 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_BASIC

#define IFXSCU_CFG_CCUCON1_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)

Definition at line 1256 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_BASIC_

#define IFXSCU_CFG_CCUCON1_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_CANDIV_##pllFreq << IFX_SCU_CCUCON1_CANDIV_OFF) | \
(IFXSCU_CFG_ERAYDIV_80MHZ << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
(IFXSCU_CFG_STMDIV_##pllFreq << IFX_SCU_CCUCON1_STMDIV_OFF) | \
(IFXSCU_CFG_GTMDIV_##pllFreq << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
(IFXSCU_CFG_ETHDIV_##pllFreq << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
(IFXSCU_CFG_ASCLINFDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
(IFXSCU_CFG_ASCLINSDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IFXSCU_CFG_ERAYDIV_80MHZ
#define IFXSCU_CFG_ERAYDIV_80MHZ
Macro to configure ERAYDIV at 80MHz target frequency.
Definition: IfxScu_cfg.h:801

Definition at line 1246 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON1_MASK

#define IFXSCU_CFG_CCUCON1_MASK
Value:
( \
(IFX_SCU_CCUCON1_CANDIV_MSK << IFX_SCU_CCUCON1_CANDIV_OFF) | \
(IFX_SCU_CCUCON1_ERAYDIV_MSK << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
(IFX_SCU_CCUCON1_STMDIV_MSK << IFX_SCU_CCUCON1_STMDIV_OFF) | \
(IFX_SCU_CCUCON1_GTMDIV_MSK << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
(IFX_SCU_CCUCON1_ETHDIV_MSK << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
(IFX_SCU_CCUCON1_ASCLINFDIV_MSK << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
(IFX_SCU_CCUCON1_ASCLINSDIV_MSK << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))

Macros to configure CCUCON1 Clock distribution.

Definition at line 1236 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2

#define IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1271 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_BASIC

#define IFXSCU_CFG_CCUCON2_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)

Definition at line 1269 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_BASIC_

#define IFXSCU_CFG_CCUCON2_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_BBBDIV_##pllFreq << IFX_SCU_CCUCON2_BBBDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:113

Definition at line 1265 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON2_MASK

#define IFXSCU_CFG_CCUCON2_MASK
Value:
( \
(IFX_SCU_CCUCON2_BBBDIV_MSK << IFX_SCU_CCUCON2_BBBDIV_OFF))

Macros to configure CCUCON2 Clock distribution.

Definition at line 1261 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5

#define IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1284 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_BASIC

#define IFXSCU_CFG_CCUCON5_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)

Definition at line 1282 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_BASIC_

#define IFXSCU_CFG_CCUCON5_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_MAXDIV_##pllFreq << IFX_SCU_CCUCON5_MAXDIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:113

Definition at line 1278 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON5_MASK

#define IFXSCU_CFG_CCUCON5_MASK
Value:
( \
(IFX_SCU_CCUCON5_MAXDIV_MSK << IFX_SCU_CCUCON5_MAXDIV_OFF))

Macros to configure CCUCON5 Clock distribution.

Definition at line 1274 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6

#define IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1297 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_BASIC

#define IFXSCU_CFG_CCUCON6_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)

Definition at line 1295 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_BASIC_

#define IFXSCU_CFG_CCUCON6_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_CPU0DIV_##pllFreq << IFX_SCU_CCUCON6_CPU0DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:113

Definition at line 1291 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON6_MASK

#define IFXSCU_CFG_CCUCON6_MASK
Value:
( \
(IFX_SCU_CCUCON6_CPU0DIV_MSK << IFX_SCU_CCUCON6_CPU0DIV_OFF))

Macros to configure CCUCON6 Clock distribution.

Definition at line 1287 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7

#define IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1310 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_BASIC

#define IFXSCU_CFG_CCUCON7_BASIC ( pllFreq ) IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)

Definition at line 1308 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_BASIC_

#define IFXSCU_CFG_CCUCON7_BASIC_ ( pllFreq )
Value:
(uint32)( \
(IFXSCU_CFG_CPU1DIV_##pllFreq << IFX_SCU_CCUCON7_CPU1DIV_OFF))
uint32
unsigned long uint32
Definition: Platform_Types.h:113

Definition at line 1304 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CCUCON7_MASK

#define IFXSCU_CFG_CCUCON7_MASK
Value:
( \
(IFX_SCU_CCUCON7_CPU1DIV_MSK << IFX_SCU_CCUCON7_CPU1DIV_OFF))

Macros to configure CCUCON7 Clock distribution.

Definition at line 1300 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CLK_DISTRIBUTION

#define IFXSCU_CFG_CLK_DISTRIBUTION
Value:
{ \
/* { uint32 value, uint32 mask }*/ \
{IFXSCU_CFG_CCUCON0, IFXSCU_CFG_CCUCON0_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon0;*/ \
{IFXSCU_CFG_CCUCON1, IFXSCU_CFG_CCUCON1_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon1;*/ \
{IFXSCU_CFG_CCUCON2, IFXSCU_CFG_CCUCON2_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon2;*/ \
{IFXSCU_CFG_CCUCON5, IFXSCU_CFG_CCUCON5_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon5;*/ \
{IFXSCU_CFG_CCUCON6, IFXSCU_CFG_CCUCON6_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon6;*/ \
{IFXSCU_CFG_CCUCON7, IFXSCU_CFG_CCUCON7_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon7;*/ \
}
IFXSCU_CFG_CCUCON0_MASK
#define IFXSCU_CFG_CCUCON0_MASK
Macros to configure CCUCON0 Clock distribution.
Definition: IfxScu_cfg.h:1213
IFXSCU_CFG_CCUCON6_MASK
#define IFXSCU_CFG_CCUCON6_MASK
Macros to configure CCUCON6 Clock distribution.
Definition: IfxScu_cfg.h:1287
IFXSCU_CFG_CCUCON2_MASK
#define IFXSCU_CFG_CCUCON2_MASK
Macros to configure CCUCON2 Clock distribution.
Definition: IfxScu_cfg.h:1261
IFXSCU_CFG_CCUCON5
#define IFXSCU_CFG_CCUCON5
Definition: IfxScu_cfg.h:1284
IFXSCU_CFG_CCUCON1
#define IFXSCU_CFG_CCUCON1
Definition: IfxScu_cfg.h:1258
IFXSCU_CFG_CCUCON7_MASK
#define IFXSCU_CFG_CCUCON7_MASK
Macros to configure CCUCON7 Clock distribution.
Definition: IfxScu_cfg.h:1300
IFXSCU_CFG_CCUCON5_MASK
#define IFXSCU_CFG_CCUCON5_MASK
Macros to configure CCUCON5 Clock distribution.
Definition: IfxScu_cfg.h:1274
IFXSCU_CFG_CCUCON6
#define IFXSCU_CFG_CCUCON6
Definition: IfxScu_cfg.h:1297
IFXSCU_CFG_CCUCON2
#define IFXSCU_CFG_CCUCON2
Definition: IfxScu_cfg.h:1271
IFXSCU_CFG_CCUCON7
#define IFXSCU_CFG_CCUCON7
Definition: IfxScu_cfg.h:1310
IFXSCU_CFG_CCUCON0
#define IFXSCU_CFG_CCUCON0
Definition: IfxScu_cfg.h:1233
IFXSCU_CFG_CCUCON1_MASK
#define IFXSCU_CFG_CCUCON1_MASK
Macros to configure CCUCON1 Clock distribution.
Definition: IfxScu_cfg.h:1236

Definition at line 1312 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_133MHZ

#define IFXSCU_CFG_CPU0DIV_133MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 133MHz target frequency.

Definition at line 1016 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_160MHZ

#define IFXSCU_CFG_CPU0DIV_160MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 160MHz target frequency.

Definition at line 1021 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_200MHZ

#define IFXSCU_CFG_CPU0DIV_200MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 200MHz target frequency.

Definition at line 1026 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_240MHZ

#define IFXSCU_CFG_CPU0DIV_240MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 240MHz target frequency.

Definition at line 1031 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_300MHZ

#define IFXSCU_CFG_CPU0DIV_300MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 300MHz target frequency.

Definition at line 1036 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU0DIV_80MHZ

#define IFXSCU_CFG_CPU0DIV_80MHZ (0) /*Same as SRIDIV */

Macro to configure CPU0DIV at 80MHz target frequency.

Definition at line 1011 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_133MHZ

#define IFXSCU_CFG_CPU1DIV_133MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 133MHz target frequency.

Definition at line 1046 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_160MHZ

#define IFXSCU_CFG_CPU1DIV_160MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 160MHz target frequency.

Definition at line 1051 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_200MHZ

#define IFXSCU_CFG_CPU1DIV_200MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 200MHz target frequency.

Definition at line 1056 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_240MHZ

#define IFXSCU_CFG_CPU1DIV_240MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 240MHz target frequency.

Definition at line 1061 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_300MHZ

#define IFXSCU_CFG_CPU1DIV_300MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 300MHz target frequency.

Definition at line 1066 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_CPU1DIV_80MHZ

#define IFXSCU_CFG_CPU1DIV_80MHZ (0) /*Same as SRIDIV */

Macro to configure CPU1DIV at 80MHz target frequency.

Definition at line 1041 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_133MHZ

#define IFXSCU_CFG_ERAYDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 80MHz */

Macro to configure ERAYDIV at 133MHz target frequency.

Definition at line 806 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_160MHZ

#define IFXSCU_CFG_ERAYDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 80MHz */

Macro to configure ERAYDIV at 160MHz target frequency.

Definition at line 811 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_200MHZ

#define IFXSCU_CFG_ERAYDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 3) /*Max: 80MHz */

Macro to configure ERAYDIV at 200MHz target frequency.

Definition at line 816 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_240MHZ

#define IFXSCU_CFG_ERAYDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 80MHz */

Macro to configure ERAYDIV at 200MHz target frequency.

Definition at line 821 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_300MHZ

#define IFXSCU_CFG_ERAYDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 4) /*Max: 80MHz */

Macro to configure ERAYDIV at 300MHz target frequency.

Definition at line 826 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ERAYDIV_80MHZ

#define IFXSCU_CFG_ERAYDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 80MHz */

Macro to configure ERAYDIV at 80MHz target frequency.

Definition at line 801 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_133MHZ

#define IFXSCU_CFG_ETHDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 3)

Macro to configure ETHDIV at 133MHz target frequency.

Definition at line 896 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_160MHZ

#define IFXSCU_CFG_ETHDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 4)

Macro to configure ETHDIV at 160MHz target frequency.

Definition at line 901 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_200MHZ

#define IFXSCU_CFG_ETHDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 4)

Macro to configure ETHDIV at 200MHz target frequency.

Definition at line 906 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_240MHZ

#define IFXSCU_CFG_ETHDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 5)

Macro to configure ETHDIV at 240MHz target frequency.

Definition at line 911 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_300MHZ

#define IFXSCU_CFG_ETHDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 6)

Macro to configure ETHDIV at 300MHz target frequency.

Definition at line 916 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_ETHDIV_80MHZ

#define IFXSCU_CFG_ETHDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2)

Macro to configure ETHDIV at 80MHz target frequency.

Definition at line 891 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ (14 - 1)

Macro to configure FCON.WSDFLASH_ at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ.

Definition at line 1140 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ (16 - 1)

Macro to configure FCON.WSDFLASH at 160MHz target frequency, where fSRI= 160/2= 80MHZ.

Definition at line 1145 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ (20 - 1)

Macro to configure FCON.WSDFLASH at 200MHz target frequency, where fSRI= 200/2= 100MHZ.

Definition at line 1150 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ (16 - 1)

Macro to configure FCON.WSDFLASH at 240MHz target frequency, where fSRI= 240/3= 80MHZ.

Definition at line 1155 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ (20 - 1)

Macro to configure FCON.WSDFLASH at 300MHz target frequency, where fSRI= 300/3= 100MHZ.

Definition at line 1160 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ

#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ (16 - 1)

Macro to configure FCON.WSDFLASH at 80MHz target frequency.

Definition at line 1135 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ (2 - 1)

Macro to configure FCON.WSECDF at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ.

Definition at line 1170 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ (2 - 1)

Macro to configure FCON.WSECDF at 160MHz target frequency, where fSRI= 160/2= 80MHZ.

Definition at line 1175 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ (2 - 1)

Macro to configure FCON.WSECDF at 200MHz target frequency, where fSRI= 200/2= 100MHZ.

Definition at line 1180 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ (2 - 1)

Macro to configure FCON.WSECDF at 240MHz target frequency, where fSRI= 240/3= 80MHZ.

Definition at line 1185 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ (2 - 1)

Macro to configure FCON.WSECDF at 300MHz target frequency, where fSRI= 300/3= 100MHZ.

Definition at line 1190 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ (2 - 1)

Macro to configure FCON.WSECDF at 80MHz target frequency.

Definition at line 1165 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ (2 - 1)

Macro to configure FCON.WSECPF at 133MHz target frequency.

Definition at line 1110 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ (2 - 1)

Macro to configure FCON.WSECPF at 160MHz target frequency.

Definition at line 1115 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ (2 - 1)

Macro to configure FCON.WSECPF at 200MHz target frequency.

Definition at line 1120 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ (3 - 1)

Macro to configure FCON.WSECPF_ at 240MHz target frequency.

Definition at line 1125 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ (3 - 1)

Macro to configure FCON.WSECPF at 300MHz target frequency.

Definition at line 1130 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ

#define IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ (1 - 1)

Macro to configure FCON.WSECP_ at 80MHz target frequency.

Definition at line 1105 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ (4 - 1)

Macro to configure FCON.WSPFLASH at 133MHz target frequency.

Definition at line 1080 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ (5 - 1)

Macro to configure FCON.WSPFLASH at 160MHz target frequency.

Definition at line 1085 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ (6 - 1)

Macro to configure FCON.WSPFLASH at 200MHz target frequency.

Definition at line 1090 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ (8 - 1)

Macro to configure FCON.WSPFLASH at 240MHz target frequency.

Definition at line 1095 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ (9 - 1)

Macro to configure FCON.WSPFLASH at 300MHz target frequency.

Definition at line 1100 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ

#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ (3 - 1)

Macros to configure FLASH.FCON register for flash waitstate configuration. IfxScuCcu_InitialStepConfig.

Macro to configure FCON.WSPFLASH at 80MHz target frequency

Definition at line 1075 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE

#define IFXSCU_CFG_FLASH_WAITSTATE
Value:
/* { uint32 value, uint32 mask }*/\
{IFXSCU_CFG_FLASH_WAITSTATE_VAL, IFXSCU_CFG_FLASH_WAITSTATE_MSK}
IFXSCU_CFG_FLASH_WAITSTATE_VAL
#define IFXSCU_CFG_FLASH_WAITSTATE_VAL
Definition: IfxScu_cfg.h:1210
IFXSCU_CFG_FLASH_WAITSTATE_MSK
#define IFXSCU_CFG_FLASH_WAITSTATE_MSK
Macros to configure FLASH.FCON registers.
Definition: IfxScu_cfg.h:1194

Definition at line 1334 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_MSK

#define IFXSCU_CFG_FLASH_WAITSTATE_MSK
Value:
( \
(IFX_FLASH_FCON_WSPFLASH_MSK << IFX_FLASH_FCON_WSPFLASH_OFF) | \
(IFX_FLASH_FCON_WSECPF_MSK << IFX_FLASH_FCON_WSECPF_OFF) | \
(IFX_FLASH_FCON_WSDFLASH_MSK << IFX_FLASH_FCON_WSDFLASH_OFF) | \
(IFX_FLASH_FCON_WSECDF_MSK << IFX_FLASH_FCON_WSECDF_OFF))

Macros to configure FLASH.FCON registers.

Definition at line 1194 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)

Definition at line 1210 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC ( pllFreq ) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)

Definition at line 1208 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_

#define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ ( pllFreq )
Value:
( \
(IFXSCU_CFG_FLASH_FCON_WSPFLASH_##pllFreq << IFX_FLASH_FCON_WSPFLASH_OFF) | \
(IFXSCU_CFG_FLASH_FCON_WSECPF_##pllFreq << IFX_FLASH_FCON_WSECPF_OFF) | \
(IFXSCU_CFG_FLASH_FCON_WSDFLASH_##pllFreq << IFX_FLASH_FCON_WSDFLASH_OFF) | \
(IFXSCU_CFG_FLASH_FCON_WSECDF_##pllFreq << IFX_FLASH_FCON_WSECDF_OFF))

Definition at line 1201 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_133MHZ

#define IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 133MHz target frequency.

Definition at line 716 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_160MHZ

#define IFXSCU_CFG_FSI2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 160MHz target frequency.

Definition at line 721 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_200MHZ

#define IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 200MHz target frequency.

Definition at line 726 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_240MHZ

#define IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 240MHz target frequency.

Definition at line 731 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_300MHZ

#define IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 300MHz target frequency.

Definition at line 736 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSI2DIV_80MHZ

#define IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */

Macro to configure FSI2DIV at 80MHz target frequency.

Definition at line 711 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_133MHZ

#define IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure FSIDIV at 133MHz target frequency.

Definition at line 746 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_160MHZ

#define IFXSCU_CFG_FSIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure FSIDIV at 160MHz target frequency.

Definition at line 751 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_200MHZ

#define IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure FSIDIV at 200MHz target frequency.

Definition at line 756 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_240MHZ

#define IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure FSIDIV at 240MHz target frequency.

Definition at line 761 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_300MHZ

#define IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure FSIDIV at 300MHz target frequency.

Definition at line 766 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_FSIDIV_80MHZ

#define IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure FSIDIV at 80MHz target frequency.

Definition at line 741 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_133MHZ

#define IFXSCU_CFG_GTMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure GTMDIV at 133MHz target frequency.

Definition at line 866 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_160MHZ

#define IFXSCU_CFG_GTMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure GTMDIV at 160MHz target frequency.

Definition at line 871 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_200MHZ

#define IFXSCU_CFG_GTMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure GTMDIV at 200MHz target frequency.

Definition at line 876 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_240MHZ

#define IFXSCU_CFG_GTMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure GTMDIV at 240MHz target frequency.

Definition at line 881 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_300MHZ

#define IFXSCU_CFG_GTMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure GTMDIV at 300MHz target frequency.

Definition at line 886 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_GTMDIV_80MHZ

#define IFXSCU_CFG_GTMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure GTMDIV at 80MHz target frequency.

Definition at line 861 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_133MHZ

#define IFXSCU_CFG_MAXDIV_133MHZ (1)

Macro to configure MAXDIV at 133MHz target frequency.

Definition at line 566 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_160MHZ

#define IFXSCU_CFG_MAXDIV_160MHZ (1)

Macro to configure MAXDIV at 160MHz target frequency.

Definition at line 571 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_200MHZ

#define IFXSCU_CFG_MAXDIV_200MHZ (1)

Macro to configure MAXDIV at 200MHz target frequency.

Definition at line 576 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_240MHZ

#define IFXSCU_CFG_MAXDIV_240MHZ (1)

Macro to configure MAXDIV at 240MHz target frequency.

Definition at line 581 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_300MHZ

#define IFXSCU_CFG_MAXDIV_300MHZ (1)

Macro to configure MAXDIV at 300MHz target frequency.

Definition at line 586 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_MAXDIV_80MHZ

#define IFXSCU_CFG_MAXDIV_80MHZ (1)

Macros to configure CCUCON registers. Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are done for the internal Oscillator frequency. IfxScuCcu_InitialStepConfig.

Macros to configure CCUCON registers Macro to configure MAXDIV at 80MHz target frequency

Definition at line 561 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_FREQ

#define IFXSCU_CFG_PLL_FREQ 200MHZ

Definition at line 1358 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP

#define IFXSCU_CFG_PLL_INITIAL_STEP IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)

Definition at line 1332 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (50 - 1), (8 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 16MHz Crystal and 133MHz target.

Definition at line 414 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (40 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 16MHz Crystal and 160MHz target.

Definition at line 421 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (50 - 1), (8 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 16MHz Crystal and 200MHz target.

Definition at line 428 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (45 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 16MHz Crystal and 240MHz target.

Definition at line 435 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (40 - 1), (7 - 1), 0.000200F}

Macros to configure Initial Pll step. Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are done for the internal Oscillator frequency. IfxScuCcu_InitialStepConfig.

Macro for Initial Pll step, for profile with 16MHz Crystal and 80MHz target

Definition at line 407 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (80 - 1), (8 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 133MHz target.

Definition at line 451 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (64 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 160MHz target.

Definition at line 458 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (60 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 200MHz target.

Definition at line 465 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (72 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 240MHz target.

Definition at line 472 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (60 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 300MHz target.

Definition at line 479 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(2 - 1), (64 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 20MHz Crystal and 80MHz target.

Definition at line 444 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (80 - 1), (8 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 133MHz target.

Definition at line 495 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (64 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 160MHz target.

Definition at line 502 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (60 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 200MHz target.

Definition at line 509 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (72 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 240MHz target.

Definition at line 516 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (60 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 300MHz target.

Definition at line 523 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(4 - 1), (64 - 1), (7 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 40MHz Crystal and 80MHz target.

Definition at line 488 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (60 - 1), (5 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 8MHz Crystal and 160MHz target.

Definition at line 539 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
{(1 - 1), (75 - 1), (6 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 8MHz Crystal and 200MHz target.

Definition at line 546 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ

#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ
Value:
/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime } ??*/\
{(1 - 1), (50 - 1), (5 - 1), 0.000200F}

Macro for Initial Pll step, for profile with 8MHz Crystal and 80MHz target.

Definition at line 532 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_BASIC

#define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC | ( | xtalFreq,
 |  | pllFreq
 | ) | IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq)

Definition at line 1331 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_

#define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_ | ( | xtalFreq,
 |  | pllFreq
 | ) | IFXSCU_CFG_PLL_INITIAL_STEP_##xtalFreq##_##pllFreq

Definition at line 1330 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS

#define IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)

Definition at line 1327 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ
Value:
{ /*Step 0 Config: 114MHz*/ \
(7 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 133MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 16MHz Crystal and 133MHz target.

Definition at line 81 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ
Value:
{ /*Step 1 Config: 128MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 160MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 16MHz Crystal and 160MHz target.

Definition at line 96 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ
Value:
{ /*Step 0 Config: 120MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 150MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 200MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 16MHz Crystal and 200MHz target.

Definition at line 111 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ
Value:
{ /*Step 0 Config: 144MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 180MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 240MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 16MHz Crystal and 240MHz target.

Definition at line 131 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ
Value:
{ /*Step 0 Config: 80MHz*/ \
(8 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macros to configure Pll steps, Macros to configure the Pll steps for different profiles of Crystal frequency and target frequencies. This configuration is important for the current jump controll during clock throttling. IfxScuCcu_PllStepsConfig.

Macro for Pll step for profile with 16MHz Crystal and 80MHz target

Definition at line 71 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ
Value:
{ /*Step 0 Config: 114MHz*/ \
(7 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 133MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 20MHz Crystal and 133MHz target.

Definition at line 162 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ
Value:
{ /*Step 1 Config: 128MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 160MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 20MHz Crystal and 160MHz target.

Definition at line 177 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ
Value:
{ /*Step 0 Config: 120MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 20MHz Crystal and 200MHz target.

Definition at line 192 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ
Value:
{ /*Step 0 Config: 144MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 180MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 240MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 20MHz Crystal and 240MHz target.

Definition at line 212 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ
Value:
{ /*Step 0 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 300MHz*/ \
(2 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 20MHz Crystal and 300MHz target.

Definition at line 232 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ
Value:
{ /*Step 0 Config: 80MHz*/ \
(8 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 20MHz Crystal and 80MHz target.

Definition at line 152 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ
Value:
{ /*Step 0 Config: 114MHz*/ \
(7 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 133MHz*/ \
(6 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 40MHz Crystal and 133MHz target.

Definition at line 263 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ
Value:
{ /*Step 1 Config: 128MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 160MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 40MHz Crystal and 160MHz target.

Definition at line 278 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ
Value:
{ /*Step 0 Config: 120MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 40MHz Crystal and 200MHz target.

Definition at line 293 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ
Value:
{ /*Step 0 Config: 144MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 180MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 240MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 40MHz Crystal and 240MHz target.

Definition at line 313 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ
Value:
{ /*Step 0 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 2 Config: 300MHz*/ \
(2 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}

Macro for Pll step for profile with 40MHz Crystal and 300MHz target.

Definition at line 333 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ
Value:
{ /*Step 0 Config: 80MHz*/ \
(8 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 40MHz Crystal and 80MHz target.

Definition at line 253 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ

#define IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ
Value:
{ /*Step 0 Config: 100MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 160MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 8MHz Crystal and 160MHz target.

Definition at line 364 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ

#define IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ
Value:
{ /*Step 0 Config: 120MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 0 Config: 150MHz*/ \
(4 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
}, \
{ /*Step 1 Config: 200MHz*/ \
(3 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 8MHz Crystal and 200MHz target.

Definition at line 379 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ

#define IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ
Value:
{ /*Step 0 Config: 80MHz*/ \
(5 - 1), /*uint8 k2Step;*/ \
0.000100, /*float32 waitTime;*/ \
0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
},

Macro for Pll step for profile with 8MHz Crystal and 80MHz target.

Definition at line 354 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_BASIC

#define IFXSCU_CFG_PLL_STEPS_BASIC | ( | xtalFreq,
 |  | pllFreq
 | ) | IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq)

Definition at line 1326 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_PLL_STEPS_BASIC_

#define IFXSCU_CFG_PLL_STEPS_BASIC_ | ( | xtalFreq,
 |  | pllFreq
 | ) | IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pllFreq

Definition at line 1325 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_133MHZ

#define IFXSCU_CFG_SPBDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure SPBDIV at 133MHz target frequency.

Definition at line 686 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_160MHZ

#define IFXSCU_CFG_SPBDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure SPBDIV at 160MHz target frequency.

Definition at line 691 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_200MHZ

#define IFXSCU_CFG_SPBDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure SPBDIV at 200MHz target frequency.

Definition at line 696 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_240MHZ

#define IFXSCU_CFG_SPBDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure SPBDIV at 240MHz target frequency.

Definition at line 701 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_300MHZ

#define IFXSCU_CFG_SPBDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure SPBDIV at 300MHz target frequency.

Definition at line 706 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SPBDIV_80MHZ

#define IFXSCU_CFG_SPBDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2) /*Max: 100MHz */

Macro to configure SPBDIV at 80MHz target frequency.

Definition at line 681 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_133MHZ

#define IFXSCU_CFG_SRIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 133MHz target frequency.

Definition at line 596 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_160MHZ

#define IFXSCU_CFG_SRIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 160MHz target frequency.

Definition at line 601 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_200MHZ

#define IFXSCU_CFG_SRIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 200MHz target frequency.

Definition at line 606 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_240MHZ

#define IFXSCU_CFG_SRIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 240MHz target frequency.

Definition at line 611 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_300MHZ

#define IFXSCU_CFG_SRIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 300MHz target frequency.

Definition at line 616 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_SRIDIV_80MHZ

#define IFXSCU_CFG_SRIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */

Macro to configure SRIDIV at 80MHz target frequency.

Definition at line 591 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_133MHZ

#define IFXSCU_CFG_STMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */

Macro to configure STMDIV at 133MHz target frequency.

Definition at line 836 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_160MHZ

#define IFXSCU_CFG_STMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */

Macro to configure STMDIV at 160MHz target frequency.

Definition at line 841 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_200MHZ

#define IFXSCU_CFG_STMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */

Macro to configure STMDIV at 200MHz target frequency.

Definition at line 846 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_240MHZ

#define IFXSCU_CFG_STMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */

Macro to configure STMDIV at 240MHz target frequency.

Definition at line 851 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_300MHZ

#define IFXSCU_CFG_STMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */

Macro to configure STMDIV at 300MHz target frequency.

Definition at line 856 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_STMDIV_80MHZ

#define IFXSCU_CFG_STMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */

Macro to configure STMDIV at 80MHz target frequency.

Definition at line 831 of file IfxScu_cfg.h.

◆ IFXSCU_CFG_XTAL_FREQ

#define IFXSCU_CFG_XTAL_FREQ 20MHZ

Definition at line 1339 of file IfxScu_cfg.h.

◆ IFXSCU_EVR_OSC_FREQUENCY

#define IFXSCU_EVR_OSC_FREQUENCY (100000000.0)

Definition at line 53 of file IfxScu_cfg.h.

Referenced by IfxScuCcu_getEvrFrequency(), and IfxScuCcu_getOscFrequency().

◆ IFXSCU_PLL_FREERUNNING_FREQUENCY

#define IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)

Definition at line 58 of file IfxScu_cfg.h.

◆ IFXSCU_VCO_BASE_FREQUENCY

#define IFXSCU_VCO_BASE_FREQUENCY (100000000.0)

Definition at line 52 of file IfxScu_cfg.h.

Referenced by IfxScuCcu_getPllErayFrequency(), IfxScuCcu_getPllErayVcoFrequency(), IfxScuCcu_getPllFrequency(), and IfxScuCcu_getPllVcoFrequency().

Enumeration Type Documentation

◆ IfxScu_CCUCON0_CLKSEL

enum IfxScu_CCUCON0_CLKSEL

Clock selection

Enumerator
IfxScu_CCUCON0_CLKSEL_fBack
IfxScu_CCUCON0_CLKSEL_fPll

Definition at line 1368 of file IfxScu_cfg.h.

◆ IfxScu_CCUCON1_INSEL

enum IfxScu_CCUCON1_INSEL

Input selection for PLL and PLL ERAY

Enumerator
IfxScu_CCUCON1_INSEL_fOsc1
IfxScu_CCUCON1_INSEL_fOsc0

Definition at line 1375 of file IfxScu_cfg.h.

◆ IfxScu_PMCSR_REQSLP

enum IfxScu_PMCSR_REQSLP
Enumerator
IfxScu_PMCSR_REQSLP_Run
IfxScu_PMCSR_REQSLP_Idle
IfxScu_PMCSR_REQSLP_Sleep
IfxScu_PMCSR_REQSLP_Stby

Definition at line 1389 of file IfxScu_cfg.h.

◆ IfxScu_WDTCON1_IR

enum IfxScu_WDTCON1_IR

Input frequency request control

Enumerator
IfxScu_WDTCON1_IR_divBy16384
IfxScu_WDTCON1_IR_divBy256
IfxScu_WDTCON1_IR_divBy64

Definition at line 1382 of file IfxScu_cfg.h.


iLLD_TC26B: IfxScu_PinMap.c File Reference

  • _PinMap
Variables
IfxScu_PinMap.c File Reference
iLLD » SCU

SCU I/O map. More...

#include "IfxScu_PinMap.h"
Include dependency graph for IfxScu_PinMap.c:

Go to the source code of this file.

Variables

IfxScu_Dcdcsync_Out | IfxScu_DCDCSYNC_P32_2_OUT = {&MODULE_SCU, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6}
IfxScu_Dcdcsync_Out | IfxScu_DCDCSYNC_P33_13_OUT = {&MODULE_SCU, {&MODULE_P33,13}, IfxPort_OutputIdx_alt6}
IfxScu_Emgstop_In | IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a}
IfxScu_Emgstop_In | IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b}
IfxScu_Evrwup_In | IfxScu_EVRWUPA_P14_1_IN = {&MODULE_SCU, {&MODULE_P14, 1}, Ifx_RxSel_a}
IfxScu_Evrwup_In | IfxScu_EVRWUPB_P15_1_IN = {&MODULE_SCU, {&MODULE_P15, 1}, Ifx_RxSel_b}
IfxScu_Extclk_Out | IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6}
IfxScu_Extclk_Out | IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6}
IfxScu_Extclk_Out | IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6}
IfxScu_Hwcfg_In | IfxScu_HWCFG0DCLDO_P14_6_IN = {&MODULE_SCU, {&MODULE_P14, 6}}
IfxScu_Hwcfg_In | IfxScu_HWCFG1EVR33_P14_5_IN = {&MODULE_SCU, {&MODULE_P14, 5}}
IfxScu_Hwcfg_In | IfxScu_HWCFG2EVR13_P14_2_IN = {&MODULE_SCU, {&MODULE_P14, 2}}
IfxScu_Hwcfg_In | IfxScu_HWCFG3_BMI_P14_3_IN = {&MODULE_SCU, {&MODULE_P14, 3}}
IfxScu_Hwcfg_In | IfxScu_HWCFG4_P10_5_IN = {&MODULE_SCU, {&MODULE_P10, 5}}
IfxScu_Hwcfg_In | IfxScu_HWCFG5_P10_6_IN = {&MODULE_SCU, {&MODULE_P10, 6}}
IfxScu_Hwcfg_In | IfxScu_HWCFG6_P14_4_IN = {&MODULE_SCU, {&MODULE_P14, 4}}
IfxScu_Req_In | IfxScu_REQ0_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ10_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ11_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ12_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d}
IfxScu_Req_In | IfxScu_REQ13_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d}
IfxScu_Req_In | IfxScu_REQ14_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b}
IfxScu_Req_In | IfxScu_REQ15_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b}
IfxScu_Req_In | IfxScu_REQ16_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ1_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ2_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ3_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ4_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ5_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ6_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ7_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c}
IfxScu_Req_In | IfxScu_REQ8_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a}
IfxScu_Req_In | IfxScu_REQ9_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}
IfxScu_Wdtlck_Out | IfxScu_WDT0LCK_P20_8_OUT = {&MODULE_SCU, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt6}
IfxScu_Wdtlck_Out | IfxScu_WDT1LCK_P20_7_OUT = {&MODULE_SCU, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt6}
IfxScu_Wdtlck_Out | IfxScu_WDTSLCK_P20_9_OUT = {&MODULE_SCU, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt6}
const IfxScu_Dcdcsync_Out * | IfxScu_Dcdcsync_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
const IfxScu_Evrwup_In * | IfxScu_Evrwup_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
const IfxScu_Hwcfg_In * | IfxScu_Hwcfg_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
const IfxScu_Wdtlck_Out * | IfxScu_Wdtlck_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]

Detailed Description

SCU I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScu_PinMap.c.

Variable Documentation

◆ IfxScu_Dcdcsync_Out_pinTable

const IfxScu_Dcdcsync_Out* IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_DCDCSYNC_P32_2_OUT,
&IfxScu_DCDCSYNC_P33_13_OUT
}
}
IfxScu_DCDCSYNC_P33_13_OUT
IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
Definition: IfxScu_PinMap.c:29
IfxScu_DCDCSYNC_P32_2_OUT
IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
Definition: IfxScu_PinMap.c:28

Definition at line 66 of file IfxScu_PinMap.c.

◆ IfxScu_DCDCSYNC_P32_2_OUT

IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT = {&MODULE_SCU, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6}

Definition at line 28 of file IfxScu_PinMap.c.

◆ IfxScu_DCDCSYNC_P33_13_OUT

IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT = {&MODULE_SCU, {&MODULE_P33,13}, IfxPort_OutputIdx_alt6}

Definition at line 29 of file IfxScu_PinMap.c.

◆ IfxScu_Emgstop_In_pinTable

const IfxScu_Emgstop_In* IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_EMGSTOPA_P33_8_IN,
&IfxScu_EMGSTOPB_P21_2_IN
}
}
IfxScu_EMGSTOPA_P33_8_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Definition: IfxScu_PinMap.c:30
IfxScu_EMGSTOPB_P21_2_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Definition: IfxScu_PinMap.c:31

Definition at line 73 of file IfxScu_PinMap.c.

◆ IfxScu_EMGSTOPA_P33_8_IN

IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a}

Definition at line 30 of file IfxScu_PinMap.c.

◆ IfxScu_EMGSTOPB_P21_2_IN

IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b}

Definition at line 31 of file IfxScu_PinMap.c.

◆ IfxScu_Evrwup_In_pinTable

const IfxScu_Evrwup_In* IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_EVRWUPA_P14_1_IN,
&IfxScu_EVRWUPB_P15_1_IN
}
}
IfxScu_EVRWUPB_P15_1_IN
IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
Definition: IfxScu_PinMap.c:33
IfxScu_EVRWUPA_P14_1_IN
IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
Definition: IfxScu_PinMap.c:32

Definition at line 80 of file IfxScu_PinMap.c.

◆ IfxScu_EVRWUPA_P14_1_IN

IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN = {&MODULE_SCU, {&MODULE_P14, 1}, Ifx_RxSel_a}

Definition at line 32 of file IfxScu_PinMap.c.

◆ IfxScu_EVRWUPB_P15_1_IN

IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN = {&MODULE_SCU, {&MODULE_P15, 1}, Ifx_RxSel_b}

Definition at line 33 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK0_P23_1_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6}

Definition at line 34 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK1_P11_12_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6}

Definition at line 35 of file IfxScu_PinMap.c.

◆ IfxScu_EXTCLK1_P32_4_OUT

IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6}

Definition at line 36 of file IfxScu_PinMap.c.

◆ IfxScu_Extclk_Out_pinTable

const IfxScu_Extclk_Out* IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_EXTCLK1_P11_12_OUT,
&IfxScu_EXTCLK0_P23_1_OUT,
&IfxScu_EXTCLK1_P32_4_OUT
}
}
IfxScu_EXTCLK1_P32_4_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
Definition: IfxScu_PinMap.c:36
IfxScu_EXTCLK1_P11_12_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
Definition: IfxScu_PinMap.c:35
IfxScu_EXTCLK0_P23_1_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
Definition: IfxScu_PinMap.c:34

Definition at line 87 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG0DCLDO_P14_6_IN

IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN = {&MODULE_SCU, {&MODULE_P14, 6}}

Definition at line 37 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG1EVR33_P14_5_IN

IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN = {&MODULE_SCU, {&MODULE_P14, 5}}

Definition at line 38 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG2EVR13_P14_2_IN

IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN = {&MODULE_SCU, {&MODULE_P14, 2}}

Definition at line 39 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG3_BMI_P14_3_IN

IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN = {&MODULE_SCU, {&MODULE_P14, 3}}

Definition at line 40 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG4_P10_5_IN

IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN = {&MODULE_SCU, {&MODULE_P10, 5}}

Definition at line 41 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG5_P10_6_IN

IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN = {&MODULE_SCU, {&MODULE_P10, 6}}

Definition at line 42 of file IfxScu_PinMap.c.

◆ IfxScu_HWCFG6_P14_4_IN

IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN = {&MODULE_SCU, {&MODULE_P14, 4}}

Definition at line 43 of file IfxScu_PinMap.c.

◆ IfxScu_Hwcfg_In_pinTable

const IfxScu_Hwcfg_In* IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_HWCFG4_P10_5_IN,
&IfxScu_HWCFG5_P10_6_IN,
&IfxScu_HWCFG2EVR13_P14_2_IN,
&IfxScu_HWCFG3_BMI_P14_3_IN,
&IfxScu_HWCFG6_P14_4_IN,
&IfxScu_HWCFG1EVR33_P14_5_IN,
&IfxScu_HWCFG0DCLDO_P14_6_IN
}
}
IfxScu_HWCFG0DCLDO_P14_6_IN
IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
Definition: IfxScu_PinMap.c:37
IfxScu_HWCFG6_P14_4_IN
IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
Definition: IfxScu_PinMap.c:43
IfxScu_HWCFG4_P10_5_IN
IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
Definition: IfxScu_PinMap.c:41
IfxScu_HWCFG5_P10_6_IN
IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
Definition: IfxScu_PinMap.c:42
IfxScu_HWCFG2EVR13_P14_2_IN
IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
Definition: IfxScu_PinMap.c:39
IfxScu_HWCFG1EVR33_P14_5_IN
IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
Definition: IfxScu_PinMap.c:38
IfxScu_HWCFG3_BMI_P14_3_IN
IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
Definition: IfxScu_PinMap.c:40

Definition at line 95 of file IfxScu_PinMap.c.

◆ IfxScu_REQ0_P15_4_IN

IfxScu_Req_In IfxScu_REQ0_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a}

Definition at line 44 of file IfxScu_PinMap.c.

◆ IfxScu_REQ10_P14_3_IN

IfxScu_Req_In IfxScu_REQ10_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a}

Definition at line 45 of file IfxScu_PinMap.c.

◆ IfxScu_REQ11_P20_9_IN

IfxScu_Req_In IfxScu_REQ11_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a}

Definition at line 46 of file IfxScu_PinMap.c.

◆ IfxScu_REQ12_P11_10_IN

IfxScu_Req_In IfxScu_REQ12_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d}

Definition at line 47 of file IfxScu_PinMap.c.

◆ IfxScu_REQ13_P15_5_IN

IfxScu_Req_In IfxScu_REQ13_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d}

Definition at line 48 of file IfxScu_PinMap.c.

◆ IfxScu_REQ14_P02_1_IN

IfxScu_Req_In IfxScu_REQ14_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b}

Definition at line 49 of file IfxScu_PinMap.c.

◆ IfxScu_REQ15_P14_1_IN

IfxScu_Req_In IfxScu_REQ15_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b}

Definition at line 50 of file IfxScu_PinMap.c.

◆ IfxScu_REQ16_P15_1_IN

IfxScu_Req_In IfxScu_REQ16_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c}

Definition at line 51 of file IfxScu_PinMap.c.

◆ IfxScu_REQ1_P15_8_IN

IfxScu_Req_In IfxScu_REQ1_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a}

Definition at line 52 of file IfxScu_PinMap.c.

◆ IfxScu_REQ2_P10_2_IN

IfxScu_Req_In IfxScu_REQ2_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a}

Definition at line 53 of file IfxScu_PinMap.c.

◆ IfxScu_REQ3_P10_3_IN

IfxScu_Req_In IfxScu_REQ3_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a}

Definition at line 54 of file IfxScu_PinMap.c.

◆ IfxScu_REQ4_P10_7_IN

IfxScu_Req_In IfxScu_REQ4_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c}

Definition at line 55 of file IfxScu_PinMap.c.

◆ IfxScu_REQ5_P10_8_IN

IfxScu_Req_In IfxScu_REQ5_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c}

Definition at line 56 of file IfxScu_PinMap.c.

◆ IfxScu_REQ6_P02_0_IN

IfxScu_Req_In IfxScu_REQ6_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c}

Definition at line 57 of file IfxScu_PinMap.c.

◆ IfxScu_REQ7_P00_4_IN

IfxScu_Req_In IfxScu_REQ7_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c}

Definition at line 58 of file IfxScu_PinMap.c.

◆ IfxScu_REQ8_P33_7_IN

IfxScu_Req_In IfxScu_REQ8_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a}

Definition at line 59 of file IfxScu_PinMap.c.

◆ IfxScu_REQ9_P20_0_IN

IfxScu_Req_In IfxScu_REQ9_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a}

Definition at line 60 of file IfxScu_PinMap.c.

◆ IfxScu_Req_In_pinTable

const IfxScu_Req_In* IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]

Definition at line 107 of file IfxScu_PinMap.c.

◆ IfxScu_WDT0LCK_P20_8_OUT

IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT = {&MODULE_SCU, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt6}

Definition at line 61 of file IfxScu_PinMap.c.

◆ IfxScu_WDT1LCK_P20_7_OUT

IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT = {&MODULE_SCU, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt6}

Definition at line 62 of file IfxScu_PinMap.c.

◆ IfxScu_Wdtlck_Out_pinTable

const IfxScu_Wdtlck_Out* IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxScu_WDT1LCK_P20_7_OUT,
&IfxScu_WDT0LCK_P20_8_OUT,
&IfxScu_WDTSLCK_P20_9_OUT
}
}
IfxScu_WDT0LCK_P20_8_OUT
IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
Definition: IfxScu_PinMap.c:61
IfxScu_WDTSLCK_P20_9_OUT
IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
Definition: IfxScu_PinMap.c:63
IfxScu_WDT1LCK_P20_7_OUT
IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
Definition: IfxScu_PinMap.c:62

Definition at line 160 of file IfxScu_PinMap.c.

◆ IfxScu_WDTSLCK_P20_9_OUT

IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT = {&MODULE_SCU, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt6}

Definition at line 63 of file IfxScu_PinMap.c.


iLLD_TC26B: IfxScu_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxScu_PinMap.h File Reference
iLLD » SCU

SCU I/O map. More...

#include <IfxScu_reg.h>
#include <_Impl/IfxScu_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxScu_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxScu_Evrwup_In
EVR Wakeup pin mapping structure. More...
struct | IfxScu_Hwcfg_In
Hardware Configuration pin mapping structure. More...
struct | IfxScu_Req_In
External Request pin mapping structure. More...
struct | IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure. More...
struct | IfxScu_Emgstop_In
Emergency Stop pin mapping structure. More...
struct | IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure. More...
struct | IfxScu_Extclk_Out
External Clock pin mapping structure. More...

Macros

#define | IFXSCU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSCU_PINMAP_NUM_REQUESTS 8
#define | IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2
#define | IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3
#define | IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7
#define | IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4
#define | IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3

Variables

IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
SCU_DCDCSYNC: SCU output. More...
IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
SCU_DCDCSYNC: SCU output. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
SCU_EMGSTOPA: SCU input. More...
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
SCU_EMGSTOPB: SCU input. More...
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
SCU_EVRWUPA: SCU input. More...
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
SCU_EVRWUPB: SCU input. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
SCU_EXTCLK0: SCU output. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
SCU_EXTCLK1: SCU output. More...
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
SCU_EXTCLK1: SCU output. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
SCU_HWCFG3_BMI: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
SCU_HWCFG4: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
SCU_HWCFG5: SCU input. More...
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z). More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN
SCU_REQ0: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN
SCU_REQ10: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN
SCU_REQ11: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN
SCU_REQ12: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN
SCU_REQ13: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN
SCU_REQ14: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN
SCU_REQ15: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN
SCU_REQ16: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN
SCU_REQ1: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN
SCU_REQ2: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN
SCU_REQ3: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN
SCU_REQ4: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN
SCU_REQ5: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN
SCU_REQ6: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN
SCU_REQ7: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN
SCU_REQ8: SCU input. More...
IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN
SCU_REQ9: SCU input. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
SCU_WDT0LCK: SCU output. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
SCU_WDT1LCK: SCU output. More...
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
SCU_WDTSLCK: SCU output. More...
IFX_EXTERN const IfxScu_Dcdcsync_Out * | IfxScu_Dcdcsync_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxScu_Dcdcsync_Out table. More...
IFX_EXTERN const IfxScu_Emgstop_In * | IfxScu_Emgstop_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table. More...
IFX_EXTERN const IfxScu_Evrwup_In * | IfxScu_Evrwup_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
IfxScu_Evrwup_In table. More...
IFX_EXTERN const IfxScu_Extclk_Out * | IfxScu_Extclk_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table. More...
IFX_EXTERN const IfxScu_Hwcfg_In * | IfxScu_Hwcfg_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxScu_Hwcfg_In table. More...
IFX_EXTERN const IfxScu_Req_In * | IfxScu_Req_In_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table. More...
IFX_EXTERN const IfxScu_Wdtlck_Out * | IfxScu_Wdtlck_Out_pinTable [IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
IfxScu_Wdtlck_Out table. More...

Detailed Description

SCU I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScu_PinMap.h.


iLLD_TC26B: IfxScuCcu.h File Reference

  • Scu
  • Std
Data Structures | Macros | Typedefs | Enumerations | Functions | Variables
IfxScuCcu.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
#include "IfxStm_reg.h"
#include "IfxScu_reg.h"
#include "IfxFlash_reg.h"
#include "_PinMap/IfxScu_PinMap.h"
Include dependency graph for IfxScuCcu.h:

Go to the source code of this file.

Data Structures

struct | IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers. More...
struct | IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step. More...
struct | IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control. More...
struct | IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution. More...
struct | IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration. More...
struct | IfxScuCcu_SysPllConfig
Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers . More...
struct | IfxScuCcu_Config
Configuration structure SCU module. More...
struct | IfxScuCcu_ErayPllConfig
Configuration structure for E-ray PLL. More...

Macros

#define IFXSCUCCU_OSC_STABLECHK_TIME (640)
Oscillator stability check timeout count. More...

Typedefs

typedef void(* IfxScuCcu_PllStepsFunctionHook) (void)
Function pointer type for the hooks. More...

Enumerations

enum IfxScuCcu_K1divider {
IfxScuCcu_K1divider_1 = 0,
IfxScuCcu_K1divider_2,
IfxScuCcu_K1divider_3,
IfxScuCcu_K1divider_4,
IfxScuCcu_K1divider_5,
IfxScuCcu_K1divider_6,
IfxScuCcu_K1divider_7,
IfxScuCcu_K1divider_8,
IfxScuCcu_K1divider_9,
IfxScuCcu_K1divider_10,
IfxScuCcu_K1divider_11,
IfxScuCcu_K1divider_12,
IfxScuCcu_K1divider_13,
IfxScuCcu_K1divider_14,
IfxScuCcu_K1divider_15,
IfxScuCcu_K1divider_16,
IfxScuCcu_K1divider_17,
IfxScuCcu_K1divider_18,
IfxScuCcu_K1divider_19,
IfxScuCcu_K1divider_20,
IfxScuCcu_K1divider_21,
IfxScuCcu_K1divider_22,
IfxScuCcu_K1divider_23,
IfxScuCcu_K1divider_24,
IfxScuCcu_K1divider_25,
IfxScuCcu_K1divider_26,
IfxScuCcu_K1divider_27,
IfxScuCcu_K1divider_28,
IfxScuCcu_K1divider_29,
IfxScuCcu_K1divider_30,
IfxScuCcu_K1divider_31,
IfxScuCcu_K1divider_32,
IfxScuCcu_K1divider_33,
IfxScuCcu_K1divider_34,
IfxScuCcu_K1divider_35,
IfxScuCcu_K1divider_36,
IfxScuCcu_K1divider_37,
IfxScuCcu_K1divider_38,
IfxScuCcu_K1divider_39,
IfxScuCcu_K1divider_40,
IfxScuCcu_K1divider_41,
IfxScuCcu_K1divider_42,
IfxScuCcu_K1divider_43,
IfxScuCcu_K1divider_44,
IfxScuCcu_K1divider_45,
IfxScuCcu_K1divider_46,
IfxScuCcu_K1divider_47,
IfxScuCcu_K1divider_48,
IfxScuCcu_K1divider_49,
IfxScuCcu_K1divider_50,
IfxScuCcu_K1divider_51,
IfxScuCcu_K1divider_52,
IfxScuCcu_K1divider_53,
IfxScuCcu_K1divider_54,
IfxScuCcu_K1divider_55,
IfxScuCcu_K1divider_56,
IfxScuCcu_K1divider_57,
IfxScuCcu_K1divider_58,
IfxScuCcu_K1divider_59,
IfxScuCcu_K1divider_60,
IfxScuCcu_K1divider_61,
IfxScuCcu_K1divider_62,
IfxScuCcu_K1divider_63,
IfxScuCcu_K1divider_64,
IfxScuCcu_K1divider_65,
IfxScuCcu_K1divider_66,
IfxScuCcu_K1divider_67,
IfxScuCcu_K1divider_68,
IfxScuCcu_K1divider_69,
IfxScuCcu_K1divider_70,
IfxScuCcu_K1divider_71,
IfxScuCcu_K1divider_72,
IfxScuCcu_K1divider_73,
IfxScuCcu_K1divider_74,
IfxScuCcu_K1divider_75,
IfxScuCcu_K1divider_76,
IfxScuCcu_K1divider_77,
IfxScuCcu_K1divider_78,
IfxScuCcu_K1divider_79,
IfxScuCcu_K1divider_80,
IfxScuCcu_K1divider_81,
IfxScuCcu_K1divider_82,
IfxScuCcu_K1divider_83,
IfxScuCcu_K1divider_84,
IfxScuCcu_K1divider_85,
IfxScuCcu_K1divider_86,
IfxScuCcu_K1divider_87,
IfxScuCcu_K1divider_88,
IfxScuCcu_K1divider_89,
IfxScuCcu_K1divider_90,
IfxScuCcu_K1divider_91,
IfxScuCcu_K1divider_92,
IfxScuCcu_K1divider_93,
IfxScuCcu_K1divider_94,
IfxScuCcu_K1divider_95,
IfxScuCcu_K1divider_96,
IfxScuCcu_K1divider_97,
IfxScuCcu_K1divider_98,
IfxScuCcu_K1divider_99,
IfxScuCcu_K1divider_100,
IfxScuCcu_K1divider_101,
IfxScuCcu_K1divider_102,
IfxScuCcu_K1divider_103,
IfxScuCcu_K1divider_104,
IfxScuCcu_K1divider_105,
IfxScuCcu_K1divider_106,
IfxScuCcu_K1divider_107,
IfxScuCcu_K1divider_108,
IfxScuCcu_K1divider_109,
IfxScuCcu_K1divider_110,
IfxScuCcu_K1divider_111,
IfxScuCcu_K1divider_112,
IfxScuCcu_K1divider_113,
IfxScuCcu_K1divider_114,
IfxScuCcu_K1divider_115,
IfxScuCcu_K1divider_116,
IfxScuCcu_K1divider_117,
IfxScuCcu_K1divider_118,
IfxScuCcu_K1divider_119,
IfxScuCcu_K1divider_120,
IfxScuCcu_K1divider_121,
IfxScuCcu_K1divider_122,
IfxScuCcu_K1divider_123,
IfxScuCcu_K1divider_124,
IfxScuCcu_K1divider_125,
IfxScuCcu_K1divider_126,
IfxScuCcu_K1divider_127,
IfxScuCcu_K1divider_128
}
MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider. More...
enum IfxScuCcu_K2divider {
IfxScuCcu_K2divider_1 = 0,
IfxScuCcu_K2divider_2,
IfxScuCcu_K2divider_3,
IfxScuCcu_K2divider_4,
IfxScuCcu_K2divider_5,
IfxScuCcu_K2divider_6,
IfxScuCcu_K2divider_7,
IfxScuCcu_K2divider_8,
IfxScuCcu_K2divider_9,
IfxScuCcu_K2divider_10,
IfxScuCcu_K2divider_11,
IfxScuCcu_K2divider_12,
IfxScuCcu_K2divider_13,
IfxScuCcu_K2divider_14,
IfxScuCcu_K2divider_15,
IfxScuCcu_K2divider_16,
IfxScuCcu_K2divider_17,
IfxScuCcu_K2divider_18,
IfxScuCcu_K2divider_19,
IfxScuCcu_K2divider_20,
IfxScuCcu_K2divider_21,
IfxScuCcu_K2divider_22,
IfxScuCcu_K2divider_23,
IfxScuCcu_K2divider_24,
IfxScuCcu_K2divider_25,
IfxScuCcu_K2divider_26,
IfxScuCcu_K2divider_27,
IfxScuCcu_K2divider_28,
IfxScuCcu_K2divider_29,
IfxScuCcu_K2divider_30,
IfxScuCcu_K2divider_31,
IfxScuCcu_K2divider_32,
IfxScuCcu_K2divider_33,
IfxScuCcu_K2divider_34,
IfxScuCcu_K2divider_35,
IfxScuCcu_K2divider_36,
IfxScuCcu_K2divider_37,
IfxScuCcu_K2divider_38,
IfxScuCcu_K2divider_39,
IfxScuCcu_K2divider_40,
IfxScuCcu_K2divider_41,
IfxScuCcu_K2divider_42,
IfxScuCcu_K2divider_43,
IfxScuCcu_K2divider_44,
IfxScuCcu_K2divider_45,
IfxScuCcu_K2divider_46,
IfxScuCcu_K2divider_47,
IfxScuCcu_K2divider_48,
IfxScuCcu_K2divider_49,
IfxScuCcu_K2divider_50,
IfxScuCcu_K2divider_51,
IfxScuCcu_K2divider_52,
IfxScuCcu_K2divider_53,
IfxScuCcu_K2divider_54,
IfxScuCcu_K2divider_55,
IfxScuCcu_K2divider_56,
IfxScuCcu_K2divider_57,
IfxScuCcu_K2divider_58,
IfxScuCcu_K2divider_59,
IfxScuCcu_K2divider_60,
IfxScuCcu_K2divider_61,
IfxScuCcu_K2divider_62,
IfxScuCcu_K2divider_63,
IfxScuCcu_K2divider_64,
IfxScuCcu_K2divider_65,
IfxScuCcu_K2divider_66,
IfxScuCcu_K2divider_67,
IfxScuCcu_K2divider_68,
IfxScuCcu_K2divider_69,
IfxScuCcu_K2divider_70,
IfxScuCcu_K2divider_71,
IfxScuCcu_K2divider_72,
IfxScuCcu_K2divider_73,
IfxScuCcu_K2divider_74,
IfxScuCcu_K2divider_75,
IfxScuCcu_K2divider_76,
IfxScuCcu_K2divider_77,
IfxScuCcu_K2divider_78,
IfxScuCcu_K2divider_79,
IfxScuCcu_K2divider_80,
IfxScuCcu_K2divider_81,
IfxScuCcu_K2divider_82,
IfxScuCcu_K2divider_83,
IfxScuCcu_K2divider_84,
IfxScuCcu_K2divider_85,
IfxScuCcu_K2divider_86,
IfxScuCcu_K2divider_87,
IfxScuCcu_K2divider_88,
IfxScuCcu_K2divider_89,
IfxScuCcu_K2divider_90,
IfxScuCcu_K2divider_91,
IfxScuCcu_K2divider_92,
IfxScuCcu_K2divider_93,
IfxScuCcu_K2divider_94,
IfxScuCcu_K2divider_95,
IfxScuCcu_K2divider_96,
IfxScuCcu_K2divider_97,
IfxScuCcu_K2divider_98,
IfxScuCcu_K2divider_99,
IfxScuCcu_K2divider_100,
IfxScuCcu_K2divider_101,
IfxScuCcu_K2divider_102,
IfxScuCcu_K2divider_103,
IfxScuCcu_K2divider_104,
IfxScuCcu_K2divider_105,
IfxScuCcu_K2divider_106,
IfxScuCcu_K2divider_107,
IfxScuCcu_K2divider_108,
IfxScuCcu_K2divider_109,
IfxScuCcu_K2divider_110,
IfxScuCcu_K2divider_111,
IfxScuCcu_K2divider_112,
IfxScuCcu_K2divider_113,
IfxScuCcu_K2divider_114,
IfxScuCcu_K2divider_115,
IfxScuCcu_K2divider_116,
IfxScuCcu_K2divider_117,
IfxScuCcu_K2divider_118,
IfxScuCcu_K2divider_119,
IfxScuCcu_K2divider_120,
IfxScuCcu_K2divider_121,
IfxScuCcu_K2divider_122,
IfxScuCcu_K2divider_123,
IfxScuCcu_K2divider_124,
IfxScuCcu_K2divider_125,
IfxScuCcu_K2divider_126,
IfxScuCcu_K2divider_127,
IfxScuCcu_K2divider_128
}
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider. More...
enum IfxScuCcu_K3divider {
IfxScuCcu_K3divider_1 = 0,
IfxScuCcu_K3divider_2,
IfxScuCcu_K3divider_3,
IfxScuCcu_K3divider_4,
IfxScuCcu_K3divider_5,
IfxScuCcu_K3divider_6,
IfxScuCcu_K3divider_7,
IfxScuCcu_K3divider_8,
IfxScuCcu_K3divider_9,
IfxScuCcu_K3divider_10,
IfxScuCcu_K3divider_11,
IfxScuCcu_K3divider_12,
IfxScuCcu_K3divider_13,
IfxScuCcu_K3divider_14,
IfxScuCcu_K3divider_15,
IfxScuCcu_K3divider_16,
IfxScuCcu_K3divider_17,
IfxScuCcu_K3divider_18,
IfxScuCcu_K3divider_19,
IfxScuCcu_K3divider_20,
IfxScuCcu_K3divider_21,
IfxScuCcu_K3divider_22,
IfxScuCcu_K3divider_23,
IfxScuCcu_K3divider_24,
IfxScuCcu_K3divider_25,
IfxScuCcu_K3divider_26,
IfxScuCcu_K3divider_27,
IfxScuCcu_K3divider_28,
IfxScuCcu_K3divider_29,
IfxScuCcu_K3divider_30,
IfxScuCcu_K3divider_31,
IfxScuCcu_K3divider_32,
IfxScuCcu_K3divider_33,
IfxScuCcu_K3divider_34,
IfxScuCcu_K3divider_35,
IfxScuCcu_K3divider_36,
IfxScuCcu_K3divider_37,
IfxScuCcu_K3divider_38,
IfxScuCcu_K3divider_39,
IfxScuCcu_K3divider_40,
IfxScuCcu_K3divider_41,
IfxScuCcu_K3divider_42,
IfxScuCcu_K3divider_43,
IfxScuCcu_K3divider_44,
IfxScuCcu_K3divider_45,
IfxScuCcu_K3divider_46,
IfxScuCcu_K3divider_47,
IfxScuCcu_K3divider_48,
IfxScuCcu_K3divider_49,
IfxScuCcu_K3divider_50,
IfxScuCcu_K3divider_51,
IfxScuCcu_K3divider_52,
IfxScuCcu_K3divider_53,
IfxScuCcu_K3divider_54,
IfxScuCcu_K3divider_55,
IfxScuCcu_K3divider_56,
IfxScuCcu_K3divider_57,
IfxScuCcu_K3divider_58,
IfxScuCcu_K3divider_59,
IfxScuCcu_K3divider_60,
IfxScuCcu_K3divider_61,
IfxScuCcu_K3divider_62,
IfxScuCcu_K3divider_63,
IfxScuCcu_K3divider_64,
IfxScuCcu_K3divider_65,
IfxScuCcu_K3divider_66,
IfxScuCcu_K3divider_67,
IfxScuCcu_K3divider_68,
IfxScuCcu_K3divider_69,
IfxScuCcu_K3divider_70,
IfxScuCcu_K3divider_71,
IfxScuCcu_K3divider_72,
IfxScuCcu_K3divider_73,
IfxScuCcu_K3divider_74,
IfxScuCcu_K3divider_75,
IfxScuCcu_K3divider_76,
IfxScuCcu_K3divider_77,
IfxScuCcu_K3divider_78,
IfxScuCcu_K3divider_79,
IfxScuCcu_K3divider_80,
IfxScuCcu_K3divider_81,
IfxScuCcu_K3divider_82,
IfxScuCcu_K3divider_83,
IfxScuCcu_K3divider_84,
IfxScuCcu_K3divider_85,
IfxScuCcu_K3divider_86,
IfxScuCcu_K3divider_87,
IfxScuCcu_K3divider_88,
IfxScuCcu_K3divider_89,
IfxScuCcu_K3divider_90,
IfxScuCcu_K3divider_91,
IfxScuCcu_K3divider_92,
IfxScuCcu_K3divider_93,
IfxScuCcu_K3divider_94,
IfxScuCcu_K3divider_95,
IfxScuCcu_K3divider_96,
IfxScuCcu_K3divider_97,
IfxScuCcu_K3divider_98,
IfxScuCcu_K3divider_99,
IfxScuCcu_K3divider_100,
IfxScuCcu_K3divider_101,
IfxScuCcu_K3divider_102,
IfxScuCcu_K3divider_103,
IfxScuCcu_K3divider_104,
IfxScuCcu_K3divider_105,
IfxScuCcu_K3divider_106,
IfxScuCcu_K3divider_107,
IfxScuCcu_K3divider_108,
IfxScuCcu_K3divider_109,
IfxScuCcu_K3divider_110,
IfxScuCcu_K3divider_111,
IfxScuCcu_K3divider_112,
IfxScuCcu_K3divider_113,
IfxScuCcu_K3divider_114,
IfxScuCcu_K3divider_115,
IfxScuCcu_K3divider_116,
IfxScuCcu_K3divider_117,
IfxScuCcu_K3divider_118,
IfxScuCcu_K3divider_119,
IfxScuCcu_K3divider_120,
IfxScuCcu_K3divider_121,
IfxScuCcu_K3divider_122,
IfxScuCcu_K3divider_123,
IfxScuCcu_K3divider_124,
IfxScuCcu_K3divider_125,
IfxScuCcu_K3divider_126,
IfxScuCcu_K3divider_127,
IfxScuCcu_K3divider_128
}
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider. More...
enum IfxScuCcu_Ndivider {
IfxScuCcu_Ndivider_1 = 0,
IfxScuCcu_Ndivider_2,
IfxScuCcu_Ndivider_3,
IfxScuCcu_Ndivider_4,
IfxScuCcu_Ndivider_5,
IfxScuCcu_Ndivider_6,
IfxScuCcu_Ndivider_7,
IfxScuCcu_Ndivider_8,
IfxScuCcu_Ndivider_9,
IfxScuCcu_Ndivider_10,
IfxScuCcu_Ndivider_11,
IfxScuCcu_Ndivider_12,
IfxScuCcu_Ndivider_13,
IfxScuCcu_Ndivider_14,
IfxScuCcu_Ndivider_15,
IfxScuCcu_Ndivider_16,
IfxScuCcu_Ndivider_17,
IfxScuCcu_Ndivider_18,
IfxScuCcu_Ndivider_19,
IfxScuCcu_Ndivider_20,
IfxScuCcu_Ndivider_21,
IfxScuCcu_Ndivider_22,
IfxScuCcu_Ndivider_23,
IfxScuCcu_Ndivider_24,
IfxScuCcu_Ndivider_25,
IfxScuCcu_Ndivider_26,
IfxScuCcu_Ndivider_27,
IfxScuCcu_Ndivider_28,
IfxScuCcu_Ndivider_29,
IfxScuCcu_Ndivider_30,
IfxScuCcu_Ndivider_31,
IfxScuCcu_Ndivider_32,
IfxScuCcu_Ndivider_33,
IfxScuCcu_Ndivider_34,
IfxScuCcu_Ndivider_35,
IfxScuCcu_Ndivider_36,
IfxScuCcu_Ndivider_37,
IfxScuCcu_Ndivider_38,
IfxScuCcu_Ndivider_39,
IfxScuCcu_Ndivider_40,
IfxScuCcu_Ndivider_41,
IfxScuCcu_Ndivider_42,
IfxScuCcu_Ndivider_43,
IfxScuCcu_Ndivider_44,
IfxScuCcu_Ndivider_45,
IfxScuCcu_Ndivider_46,
IfxScuCcu_Ndivider_47,
IfxScuCcu_Ndivider_48,
IfxScuCcu_Ndivider_49,
IfxScuCcu_Ndivider_50,
IfxScuCcu_Ndivider_51,
IfxScuCcu_Ndivider_52,
IfxScuCcu_Ndivider_53,
IfxScuCcu_Ndivider_54,
IfxScuCcu_Ndivider_55,
IfxScuCcu_Ndivider_56,
IfxScuCcu_Ndivider_57,
IfxScuCcu_Ndivider_58,
IfxScuCcu_Ndivider_59,
IfxScuCcu_Ndivider_60,
IfxScuCcu_Ndivider_61,
IfxScuCcu_Ndivider_62,
IfxScuCcu_Ndivider_63,
IfxScuCcu_Ndivider_64,
IfxScuCcu_Ndivider_65,
IfxScuCcu_Ndivider_66,
IfxScuCcu_Ndivider_67,
IfxScuCcu_Ndivider_68,
IfxScuCcu_Ndivider_69,
IfxScuCcu_Ndivider_70,
IfxScuCcu_Ndivider_71,
IfxScuCcu_Ndivider_72,
IfxScuCcu_Ndivider_73,
IfxScuCcu_Ndivider_74,
IfxScuCcu_Ndivider_75,
IfxScuCcu_Ndivider_76,
IfxScuCcu_Ndivider_77,
IfxScuCcu_Ndivider_78,
IfxScuCcu_Ndivider_79,
IfxScuCcu_Ndivider_80,
IfxScuCcu_Ndivider_81,
IfxScuCcu_Ndivider_82,
IfxScuCcu_Ndivider_83,
IfxScuCcu_Ndivider_84,
IfxScuCcu_Ndivider_85,
IfxScuCcu_Ndivider_86,
IfxScuCcu_Ndivider_87,
IfxScuCcu_Ndivider_88,
IfxScuCcu_Ndivider_89,
IfxScuCcu_Ndivider_90,
IfxScuCcu_Ndivider_91,
IfxScuCcu_Ndivider_92,
IfxScuCcu_Ndivider_93,
IfxScuCcu_Ndivider_94,
IfxScuCcu_Ndivider_95,
IfxScuCcu_Ndivider_96,
IfxScuCcu_Ndivider_97,
IfxScuCcu_Ndivider_98,
IfxScuCcu_Ndivider_99,
IfxScuCcu_Ndivider_100,
IfxScuCcu_Ndivider_101,
IfxScuCcu_Ndivider_102,
IfxScuCcu_Ndivider_103,
IfxScuCcu_Ndivider_104,
IfxScuCcu_Ndivider_105,
IfxScuCcu_Ndivider_106,
IfxScuCcu_Ndivider_107,
IfxScuCcu_Ndivider_108,
IfxScuCcu_Ndivider_109,
IfxScuCcu_Ndivider_110,
IfxScuCcu_Ndivider_111,
IfxScuCcu_Ndivider_112,
IfxScuCcu_Ndivider_113,
IfxScuCcu_Ndivider_114,
IfxScuCcu_Ndivider_115,
IfxScuCcu_Ndivider_116,
IfxScuCcu_Ndivider_117,
IfxScuCcu_Ndivider_118,
IfxScuCcu_Ndivider_119,
IfxScuCcu_Ndivider_120,
IfxScuCcu_Ndivider_121,
IfxScuCcu_Ndivider_122,
IfxScuCcu_Ndivider_123,
IfxScuCcu_Ndivider_124,
IfxScuCcu_Ndivider_125,
IfxScuCcu_Ndivider_126,
IfxScuCcu_Ndivider_127,
IfxScuCcu_Ndivider_128
}
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider. More...
enum IfxScuCcu_Pdivider {
IfxScuCcu_Pdivider_1 = 0,
IfxScuCcu_Pdivider_2,
IfxScuCcu_Pdivider_3,
IfxScuCcu_Pdivider_4,
IfxScuCcu_Pdivider_5,
IfxScuCcu_Pdivider_6,
IfxScuCcu_Pdivider_7,
IfxScuCcu_Pdivider_8,
IfxScuCcu_Pdivider_9,
IfxScuCcu_Pdivider_10,
IfxScuCcu_Pdivider_11,
IfxScuCcu_Pdivider_12,
IfxScuCcu_Pdivider_13,
IfxScuCcu_Pdivider_14,
IfxScuCcu_Pdivider_15,
IfxScuCcu_Pdivider_16
}
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider. More...

Functions

IFX_INLINE float32 | IfxScuCcu_getEvrFrequency (void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of the controller. More...
IFX_INLINE float32 | IfxScuCcu_getPll2ErayFrequency (void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock. More...
IFX_INLINE float32 | IfxScuCcu_getPll2Frequency (void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock. More...
IFX_INLINE IfxScu_CCUCON0_CLKSEL | IfxScuCcu_getSourceSelection (void)
Returns the clock source selection. More...
IFX_INLINE float32 | IfxScuCcu_getStmFrequency (void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register and fSOURCE. More...
IFX_INLINE float32 | IfxScuCcu_getCanFrequency (void)
API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_getBaud1Frequency (void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getBaud2Frequency (void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX. More...
IFX_EXTERN float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
IFX_EXTERN float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getMaxFrequency (void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getOsc0Frequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getOscFrequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllErayFrequency (void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllErayVcoFrequency (void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLERAYCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllFrequency (void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getPllVcoFrequency (void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLCON registers and the input oscillator. More...
IFX_EXTERN float32 | IfxScuCcu_getSourceFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
IFX_EXTERN float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
IFX_EXTERN float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
IFX_EXTERN float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setPll2ErayFrequency (float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setPll2Frequency (float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
IFX_EXTERN boolean | IfxScuCcu_calculateSysPllDividers (IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency. More...
IFX_EXTERN boolean | IfxScuCcu_init (const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure. More...
IFX_EXTERN void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN boolean | IfxScuCcu_initErayPll (const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by the configuration structure. More...
IFX_EXTERN void | IfxScuCcu_initErayPllConfig (IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values. More...
IFX_EXTERN void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...
IFX_INLINE float32 | IfxScuCcu_getGtmFrequency (void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register and fSOURCE. return GTM frequency (fGTM) in Hz. More...
IFX_EXTERN float32 | IfxScuCcu_setGtmFrequency (float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...

Variables

IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu. More...
IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScuCcu.h.

Macro Definition Documentation

◆ IFXSCUCCU_OSC_STABLECHK_TIME

#define IFXSCUCCU_OSC_STABLECHK_TIME (640)

Oscillator stability check timeout count.

Definition at line 119 of file IfxScuCcu.h.

Referenced by IfxScuCcu_isOscillatorStable().

Typedef Documentation

◆ IfxScuCcu_PllStepsFunctionHook

typedef void(* IfxScuCcu_PllStepsFunctionHook) (void)

Function pointer type for the hooks.

Returns
None

Definition at line 128 of file IfxScuCcu.h.

Function Documentation

◆ IfxScuCcu_getGtmFrequency()

IFX_INLINE float32 IfxScuCcu_getGtmFrequency ( void )

API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register and fSOURCE. return GTM frequency (fGTM) in Hz.

Returns
Gtm Frequency

Definition at line 1071 of file IfxScuCcu.h.

Referenced by IfxGtm_getSysClkFrequency(), IfxIom_getFrequency(), and IfxScuCcu_setGtmFrequency().

◆ IfxScuCcu_setGtmFrequency()

IFX_EXTERN float32 IfxScuCcu_setGtmFrequency ( float32 gtmFreq )

API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
gtmFreq Desired GTM frequency in Hz
Returns
Actual GTM frequency in HZ

Definition at line 1095 of file IfxScuCcu.c.

Variable Documentation

◆ IfxScuCcu_defaultClockConfig

IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig

Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu.

Definition at line 1054 of file IfxScuCcu.h.

◆ IfxScuCcu_defaultErayPllConfig

IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig

Configuration structure for SCU CCU driver. The values of this structure are defined as # defined macros in the implementation of Scu.

Definition at line 1059 of file IfxScuCcu.h.


iLLD_TC26B: IfxScuEru.h File Reference

  • Scu
  • Std
Enumerations | Functions
IfxScuEru.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "IfxScu_reg.h"
#include "Cpu/Std/IfxCpu.h"
#include "_PinMap/IfxScu_PinMap.h"
Include dependency graph for IfxScuEru.h:

Go to the source code of this file.

Enumerations

enum IfxScuEru_ExternalInputSelection {
IfxScuEru_ExternalInputSelection_0 = 0,
IfxScuEru_ExternalInputSelection_1,
IfxScuEru_ExternalInputSelection_2,
IfxScuEru_ExternalInputSelection_3
}
Input line selection for input channel
Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InputChannel {
IfxScuEru_InputChannel_0 = 0,
IfxScuEru_InputChannel_1,
IfxScuEru_InputChannel_2,
IfxScuEru_InputChannel_3,
IfxScuEru_InputChannel_4,
IfxScuEru_InputChannel_5,
IfxScuEru_InputChannel_6,
IfxScuEru_InputChannel_7
}
Input channel for input selection and conditioning of trigger or gating functions. More...
enum IfxScuEru_InputNodePointer {
IfxScuEru_InputNodePointer_0 = 0,
IfxScuEru_InputNodePointer_1,
IfxScuEru_InputNodePointer_2,
IfxScuEru_InputNodePointer_3,
IfxScuEru_InputNodePointer_4,
IfxScuEru_InputNodePointer_5,
IfxScuEru_InputNodePointer_6,
IfxScuEru_InputNodePointer_7
}
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).
Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_InterruptGatingPattern {
IfxScuEru_InterruptGatingPattern_none = 0,
IfxScuEru_InterruptGatingPattern_alwaysActive = 1,
IfxScuEru_InterruptGatingPattern_patternMatch = 2,
IfxScuEru_InterruptGatingPattern_patternMiss = 3
}
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy
Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1) More...
enum IfxScuEru_OutputChannel {
IfxScuEru_OutputChannel_0 = 0,
IfxScuEru_OutputChannel_1,
IfxScuEru_OutputChannel_2,
IfxScuEru_OutputChannel_3,
IfxScuEru_OutputChannel_4,
IfxScuEru_OutputChannel_5,
IfxScuEru_OutputChannel_6,
IfxScuEru_OutputChannel_7
}
Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...) More...

Functions

IFX_INLINE void | IfxScuEru_initReqPin (IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin. More...
IFX_EXTERN void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...
IFX_EXTERN void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
IFX_EXTERN void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
IFX_EXTERN void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
IFX_EXTERN uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
IFX_EXTERN boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
IFX_EXTERN uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
IFX_EXTERN void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...
IFX_EXTERN void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
IFX_EXTERN void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
IFX_EXTERN void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...
IFX_EXTERN void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
IFX_EXTERN uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
IFX_EXTERN boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
IFX_EXTERN uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
IFX_EXTERN void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScuEru.h.


iLLD_TC26B: IfxScuWdt.asm.h File Reference

  • Scu
  • Std
Macros | Functions
IfxScuWdt.asm.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxScu_reg.h"
Include dependency graph for IfxScuWdt.asm.h:

Go to the source code of this file.

Macros

#define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))

Functions

IFX_INLINE uint16 IfxScuWdt_calculateLfsr (uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScuWdt.asm.h.


iLLD_TC26B: IfxScuWdt.h File Reference

  • Scu
  • Std
Data Structures | Macros | Functions
IfxScuWdt.h File Reference
iLLD » SCU

SCU basic functionality. More...

#include "_Impl/IfxScu_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "IfxScu_reg.h"
#include "IfxScu_bf.h"
#include "IfxScuWdt.asm.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxScuWdt.h:

Go to the source code of this file.

Data Structures

struct IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file. More...

Macros

#define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)
Endinit operation Timeout counter. More...

Functions

IFX_EXTERN void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
IFX_EXTERN void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_clearSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setCpuEndinitInline (Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_INLINE void | IfxScuWdt_setSafetyEndinitInline (uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
IFX_EXTERN void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
IFX_INLINE uint16 | IfxScuWdt_getCpuWatchdogPasswordInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getCpuWatchdogEndInitInline (Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_INLINE boolean | IfxScuWdt_getSafetyWatchdogEndInit (void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module. More...
IFX_INLINE uint16 | IfxScuWdt_getSafetyWatchdogPasswordInline (void)
SCUWDT Inline API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
IFX_EXTERN void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
IFX_EXTERN void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
IFX_EXTERN uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
IFX_EXTERN boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
IFX_EXTERN uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
IFX_EXTERN void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
IFX_EXTERN void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...
IFX_EXTERN boolean | IfxScuWdt_enableWatchdogWithDebugger (void)
Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

This file contains the APIs for SCU Watchdog and Endinit related functions.

Definition in file IfxScuWdt.h.

Data Structure Documentation

◆ IfxScuWdt_Config

struct IfxScuWdt_Config

Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file.

Definition at line 69 of file IfxScuWdt.h.

Data Fields
boolean | clrInternalResetFlag | Clear Internal Reset Flag.
boolean | disableWatchdog | Disable Request Control Bit.
boolean | enableAutomaticPasswordChange | Password Auto-sequence Request Bit.
boolean | enableSmuRestriction | Unlock Restriction Request Control Bit.
boolean | enableTimerCheck | Counter Check Request Bit.
boolean | enableTimerCheckTolerance | Timer Check Tolerance Request.
IfxScu_WDTCON1_IR | inputFrequency | input frequency of the WDT
uint16 | password | password for access to WDTxCON0 reg
uint16 | reload | WDT reload value.

Macro Definition Documentation

◆ IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT

#define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)

Endinit operation Timeout counter.

Definition at line 59 of file IfxScuWdt.h.

Function Documentation

◆ IfxScuWdt_enableWatchdogWithDebugger()

IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger ( void )

Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already.

Returns
Status, Success = 0, Failure = 1.

Definition at line 413 of file IfxScuWdt.c.


iLLD_TC26B: SENT

Modules | Files
SENT
iLLD
Collaboration diagram for SENT:

Modules

Implementation
Standard Driver
SENT Pin Mapping
How to use the SENT Interface driver?
Interface Driver

Files

file | IfxSent_cfg.h
SENT on-chip implementation data.
file | IfxSent_PinMap.c
SENT I/O map.
file | IfxSent_PinMap.h
SENT I/O map.
file | IfxSent_Sent.h
SENT SENT details.
file | IfxSent.h
SENT basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » SENT
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » SENT
Collaboration diagram for Standard Driver:

Modules

Enumerations
Configuration Functions
Interrupts
Operative Functions
Baudrate Configuration
IO Pin Configuration Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » SENT » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxSent_AlternateInput {
IfxSent_AlternateInput_0 = 0,
IfxSent_AlternateInput_1,
IfxSent_AlternateInput_2,
IfxSent_AlternateInput_3
}
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel. More...
enum IfxSent_ChannelStatus {
IfxSent_ChannelStatus_stop = 0,
IfxSent_ChannelStatus_initialize = 1,
IfxSent_ChannelStatus_running = 2,
IfxSent_ChannelStatus_synchronize = 3
}
SENT.CH[channelId].RSR.CST, Specifies the current channel status. More...
enum IfxSent_ClockDividerMode {
IfxSent_ClockDividerMode_off = 0,
IfxSent_ClockDividerMode_normal = 1,
IfxSent_ClockDividerMode_fractional = 2
}
SENT.FDR.DM , Specifies clock divider mode. More...
enum IfxSent_ConfigBit {
IfxSent_ConfigBit_0 = 0,
IfxSent_ConfigBit_1
}
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value. More...
enum IfxSent_DigitalGlitchesLength {
IfxSent_DigitalGlitchesLength_off = 0,
IfxSent_DigitalGlitchesLength_1 = 1,
IfxSent_DigitalGlitchesLength_2,
IfxSent_DigitalGlitchesLength_3,
IfxSent_DigitalGlitchesLength_4,
IfxSent_DigitalGlitchesLength_5,
IfxSent_DigitalGlitchesLength_6,
IfxSent_DigitalGlitchesLength_7,
IfxSent_DigitalGlitchesLength_8,
IfxSent_DigitalGlitchesLength_9,
IfxSent_DigitalGlitchesLength_10,
IfxSent_DigitalGlitchesLength_11,
IfxSent_DigitalGlitchesLength_12,
IfxSent_DigitalGlitchesLength_13,
IfxSent_DigitalGlitchesLength_14,
IfxSent_DigitalGlitchesLength_15
}
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples. More...
enum IfxSent_ExtendedSerialFrameMode {
IfxSent_ExtendedSerialFrameMode_standard = 0,
IfxSent_ExtendedSerialFrameMode_extended = 1
}
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure. More...
enum IfxSent_ExternalTrigger {
IfxSent_ExternalTrigger_0 = 0,
IfxSent_ExternalTrigger_1,
IfxSent_ExternalTrigger_2,
IfxSent_ExternalTrigger_3,
IfxSent_ExternalTrigger_4,
IfxSent_ExternalTrigger_5,
IfxSent_ExternalTrigger_6,
IfxSent_ExternalTrigger_7,
IfxSent_ExternalTrigger_8,
IfxSent_ExternalTrigger_9
}
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line. More...
enum IfxSent_FrameCheckMode {
IfxSent_FrameCheckMode_pastSyncPulse = 0,
IfxSent_FrameCheckMode_futureSuncPulse = 1
}
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode. More...
enum IfxSent_InterruptNodePointer {
IfxSent_InterruptNodePointer_0 = 0,
IfxSent_InterruptNodePointer_1,
IfxSent_InterruptNodePointer_2,
IfxSent_InterruptNodePointer_3,
IfxSent_InterruptNodePointer_trigo0 = 4,
IfxSent_InterruptNodePointer_trigo1,
IfxSent_InterruptNodePointer_trigo2,
IfxSent_InterruptNodePointer_trigo3,
IfxSent_InterruptNodePointer_trigo4,
IfxSent_InterruptNodePointer_trigo5
}
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt. More...
enum IfxSent_Nibble {
IfxSent_Nibble_0 = 0,
IfxSent_Nibble_1,
IfxSent_Nibble_2,
IfxSent_Nibble_3,
IfxSent_Nibble_4,
IfxSent_Nibble_5,
IfxSent_Nibble_6,
IfxSent_Nibble_7
}
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer. More...
enum IfxSent_SleepMode {
IfxSent_SleepMode_enable = 0,
IfxSent_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS. More...
enum IfxSent_SpcMode {
IfxSent_SpcMode_sync = 0,
IfxSent_SpcMode_range = 1,
IfxSent_SpcMode_bidirectional = 2
}
Specifies the SENT SPC operational mode. More...
enum IfxSent_SuspendMode {
IfxSent_SuspendMode_none = 0,
IfxSent_SuspendMode_hard = 1,
IfxSent_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxSent_TimeBase {
IfxSent_TimeBase_measuredFrequency = 0,
IfxSent_TimeBase_nominalFrequency = 1
}
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time. More...
enum IfxSent_TriggerSource {
IfxSent_TriggerSource_off = 0,
IfxSent_TriggerSource_immediate = 1,
IfxSent_TriggerSource_fallingEdge = 2,
IfxSent_TriggerSource_externalTrigger = 3
}
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation. More...

Detailed Description

Enumeration Type Documentation

◆ IfxSent_AlternateInput

enum IfxSent_AlternateInput

SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel.

Enumerator
IfxSent_AlternateInput_0 | Specifies alternate input 0.
IfxSent_AlternateInput_1 | Specifies alternate input 1.
IfxSent_AlternateInput_2 | Specifies alternate input 2.
IfxSent_AlternateInput_3 | Specifies alternate input 3.

Definition at line 68 of file IfxSent.h.

◆ IfxSent_ChannelStatus

enum IfxSent_ChannelStatus

SENT.CH[channelId].RSR.CST, Specifies the current channel status.

Enumerator
IfxSent_ChannelStatus_stop | Specifies the channel is stopped.
IfxSent_ChannelStatus_initialize | Specifies the channel is initialized.
IfxSent_ChannelStatus_running | Specifies the channel is running.
IfxSent_ChannelStatus_synchronize | Specifies the channel is synchronized.

Definition at line 78 of file IfxSent.h.

◆ IfxSent_ClockDividerMode

enum IfxSent_ClockDividerMode

SENT.FDR.DM , Specifies clock divider mode.

Enumerator
IfxSent_ClockDividerMode_off | Specifies clock divider mode off.
IfxSent_ClockDividerMode_normal | Specifies clock normal divider mode.
IfxSent_ClockDividerMode_fractional | Specifies clock fractional divider mode.

Definition at line 88 of file IfxSent.h.

◆ IfxSent_ConfigBit

enum IfxSent_ConfigBit

SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.

Enumerator
IfxSent_ConfigBit_0 | Specifies received configuration bit value 0.
IfxSent_ConfigBit_1 | Specifies received configuration bit value 1.

Definition at line 97 of file IfxSent.h.

◆ IfxSent_DigitalGlitchesLength

enum IfxSent_DigitalGlitchesLength

SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.

Enumerator
IfxSent_DigitalGlitchesLength_off | Specifies port input samples off.
IfxSent_DigitalGlitchesLength_1 | Specifies 1 port input samples.
IfxSent_DigitalGlitchesLength_2 | Specifies 2 port input samples.
IfxSent_DigitalGlitchesLength_3 | Specifies 3 port input samples.
IfxSent_DigitalGlitchesLength_4 | Specifies 4 port input samples.
IfxSent_DigitalGlitchesLength_5 | Specifies 5 port input samples.
IfxSent_DigitalGlitchesLength_6 | Specifies 6 port input samples.
IfxSent_DigitalGlitchesLength_7 | Specifies 7 port input samples.
IfxSent_DigitalGlitchesLength_8 | Specifies 8 port input samples.
IfxSent_DigitalGlitchesLength_9 | Specifies 9 port input samples.
IfxSent_DigitalGlitchesLength_10 | Specifies 10 port input samples.
IfxSent_DigitalGlitchesLength_11 | Specifies 11 port input samples.
IfxSent_DigitalGlitchesLength_12 | Specifies 12 port input samples.
IfxSent_DigitalGlitchesLength_13 | Specifies 13 port input samples.
IfxSent_DigitalGlitchesLength_14 | Specifies 14 port input samples.
IfxSent_DigitalGlitchesLength_15 | Specifies 15 port input samples.

Definition at line 105 of file IfxSent.h.

◆ IfxSent_ExtendedSerialFrameMode

enum IfxSent_ExtendedSerialFrameMode

SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.

Enumerator
IfxSent_ExtendedSerialFrameMode_standard | Specifies the standard serial frame structure.
IfxSent_ExtendedSerialFrameMode_extended | Specifies the extended serial frame structure.

Definition at line 127 of file IfxSent.h.

◆ IfxSent_ExternalTrigger

enum IfxSent_ExternalTrigger

SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.

Enumerator
IfxSent_ExternalTrigger_0 | Specifies the external trigger line 0.
IfxSent_ExternalTrigger_1 | Specifies the external trigger line 1.
IfxSent_ExternalTrigger_2 | Specifies the external trigger line 2.
IfxSent_ExternalTrigger_3 | Specifies the external trigger line 3.
IfxSent_ExternalTrigger_4 | Specifies the external trigger line 4.
IfxSent_ExternalTrigger_5 | Specifies the external trigger line 5.
IfxSent_ExternalTrigger_6 | Specifies the external trigger line 6.
IfxSent_ExternalTrigger_7 | Specifies the external trigger line 7.
IfxSent_ExternalTrigger_8 | Specifies the external trigger line 8.
IfxSent_ExternalTrigger_9 | Specifies the external trigger line 9.

Definition at line 135 of file IfxSent.h.

◆ IfxSent_FrameCheckMode

enum IfxSent_FrameCheckMode

SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.

Enumerator
IfxSent_FrameCheckMode_pastSyncPulse | Specifies frame check mode against past sync pulse.
IfxSent_FrameCheckMode_futureSuncPulse | Specifies frame check mode against future sync pulse.

Definition at line 151 of file IfxSent.h.

◆ IfxSent_InterruptNodePointer

enum IfxSent_InterruptNodePointer

SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt.

Enumerator
IfxSent_InterruptNodePointer_0 | Specifies interrupt requested node 0.
IfxSent_InterruptNodePointer_1 | Specifies interrupt requested node 1.
IfxSent_InterruptNodePointer_2 | Specifies interrupt requested node 2.
IfxSent_InterruptNodePointer_3 | Specifies interrupt requested node 3.
IfxSent_InterruptNodePointer_trigo0 | Specifies interrupt requested node TRIGO 0.
IfxSent_InterruptNodePointer_trigo1 | Specifies interrupt requested node TRIGO 1.
IfxSent_InterruptNodePointer_trigo2 | Specifies interrupt requested node TRIGO 2.
IfxSent_InterruptNodePointer_trigo3 | Specifies interrupt requested node TRIGO 3.
IfxSent_InterruptNodePointer_trigo4 | Specifies interrupt requested node TRIGO 4.
IfxSent_InterruptNodePointer_trigo5 | Specifies interrupt requested node TRIGO 5.

Definition at line 159 of file IfxSent.h.

◆ IfxSent_Nibble

enum IfxSent_Nibble

SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.

Enumerator
IfxSent_Nibble_0 | Specifies receive data target nibble pointer to nibble 0.
IfxSent_Nibble_1 | Specifies receive data target nibble pointer to nibble 1.
IfxSent_Nibble_2 | Specifies receive data target nibble pointer to nibble 2.
IfxSent_Nibble_3 | Specifies receive data target nibble pointer to nibble 3.
IfxSent_Nibble_4 | Specifies receive data target nibble pointer to nibble 4.
IfxSent_Nibble_5 | Specifies receive data target nibble pointer to nibble 5.
IfxSent_Nibble_6 | Specifies receive data target nibble pointer to nibble 6.
IfxSent_Nibble_7 | Specifies receive data target nibble pointer to nibble 7.

Definition at line 175 of file IfxSent.h.

◆ IfxSent_SleepMode

enum IfxSent_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS.

Enumerator
IfxSent_SleepMode_enable | enables sleep mode
IfxSent_SleepMode_disable | disables sleep mode

Definition at line 190 of file IfxSent.h.

◆ IfxSent_SpcMode

enum IfxSent_SpcMode

Specifies the SENT SPC operational mode.

Enumerator
IfxSent_SpcMode_sync | Specifies synchronous SPC mode.
IfxSent_SpcMode_range | Specifies range selection SPC mode.
IfxSent_SpcMode_bidirectional | Specifies bidirectional transmit SPC mode.

Definition at line 198 of file IfxSent.h.

◆ IfxSent_SuspendMode

enum IfxSent_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxSent_SuspendMode_none | No suspend.
IfxSent_SuspendMode_hard | Hard Suspend.
IfxSent_SuspendMode_soft | Soft Suspend.

Definition at line 207 of file IfxSent.h.

◆ IfxSent_TimeBase

enum IfxSent_TimeBase

SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.

Enumerator
IfxSent_TimeBase_measuredFrequency | Specifies selection of pulse based on measured frequency.
IfxSent_TimeBase_nominalFrequency | Specifies selection of pulse based on nomianl frequency.

Definition at line 216 of file IfxSent.h.

◆ IfxSent_TriggerSource

enum IfxSent_TriggerSource

SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.

Enumerator
IfxSent_TriggerSource_off | Specifies no pulse generation.
IfxSent_TriggerSource_immediate | Specifies immediate pulse generation.
IfxSent_TriggerSource_fallingEdge | Specifies pulse generation at fallingEdge.
IfxSent_TriggerSource_externalTrigger | Specifies pulse generation after each external trigger.

Definition at line 224 of file IfxSent.h.


iLLD_TC26B: Configuration Functions

Functions
Configuration Functions
iLLD » SENT » Standard Driver
Collaboration diagram for Configuration Functions:

Functions

IFX_INLINE void | IfxSent_setAltiInput (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel. More...
IFX_INLINE void | IfxSent_setTimeStampPredivider (Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider. More...

Detailed Description

Function Documentation

◆ IfxSent_setAltiInput()

IFX_INLINE void IfxSent_setAltiInput | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_AlternateInput | alternateInput
 | ) |  |

Sets the operation mode of SENT kernel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
alternateInput | alternate input/output pin for SENT operation
Returns
None

Definition at line 647 of file IfxSent.h.

Referenced by IfxSent_initSentPin().

◆ IfxSent_setTimeStampPredivider()

IFX_INLINE void IfxSent_setTimeStampPredivider | ( | Ifx_SENT * | sent,
 |  | uint32 | timeStampPreDivider
 | ) |  |

Set the module time stamp pre-divider.

Parameters
sent | base address of the SENT register space
timeStampPreDivider | time stamp pre-divider value
Returns
None

Definition at line 685 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().


iLLD_TC26B: Interrupts

Functions
Interrupts
iLLD » SENT » Standard Driver
Collaboration diagram for Interrupts:

Functions

IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getAndClearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getChannelInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxSent_getChannelSrc (IfxSent_ChannelId channelId)
gets the source for channel interrupt handler More...

Detailed Description

Function Documentation

◆ IfxSent_getAndClearInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.

This function should be used in an ISR to retrieve the events which triggered the interrupt.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
Interrupt flags which have been cleared.

Definition at line 591 of file IfxSent.h.

Referenced by IfxSent_Sent_getAndClearInterruptStatus().

◆ IfxSent_getChannelInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Gets the current channel status.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
current channel interrupt status

Definition at line 600 of file IfxSent.h.

◆ IfxSent_getChannelSrc()

IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc ( IfxSent_ChannelId channelId )

gets the source for channel interrupt handler

Parameters
channelId SENT channel number
Returns
interrupt source

Definition at line 608 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().


iLLD_TC26B: Operative Functions

Functions
Operative Functions
iLLD » SENT » Standard Driver
Collaboration diagram for Operative Functions:

Functions

IFX_INLINE void | IfxSent_disableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number. More...
IFX_INLINE void | IfxSent_disableModule (Ifx_SENT *sent)
Disable the SENT module. More...
IFX_INLINE void | IfxSent_enableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number. More...
IFX_INLINE void | IfxSent_enableModule (Ifx_SENT *sent)
Enable the SENT module. More...
IFX_INLINE boolean | IfxSent_isModuleSuspended (Ifx_SENT *sent)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxSent_setSleepMode (Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxSent_setSuspendMode (Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...

Detailed Description

Function Documentation

◆ IfxSent_disableChannel()

IFX_INLINE void IfxSent_disableChannel | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Disable the channel with the channel number.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
None

Definition at line 558 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_disableModule()

IFX_INLINE void IfxSent_disableModule ( Ifx_SENT * sent )

Disable the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 564 of file IfxSent.h.

◆ IfxSent_enableChannel()

IFX_INLINE void IfxSent_enableChannel | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Enable the channel with the channel number.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
None

Definition at line 573 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_enableModule()

IFX_INLINE void IfxSent_enableModule ( Ifx_SENT * sent )

Enable the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 579 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_isModuleSuspended()

IFX_INLINE boolean IfxSent_isModuleSuspended ( Ifx_SENT * sent )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
sent Pointer to SENT module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 635 of file IfxSent.h.

◆ IfxSent_resetModule()

IFX_EXTERN void IfxSent_resetModule ( Ifx_SENT * sent )

Resets the SENT module.

Parameters
sent base address of the SENT register space
Returns
None

Definition at line 128 of file IfxSent.c.

Referenced by IfxSent_Sent_deInitModule().

◆ IfxSent_setSleepMode()

IFX_INLINE void IfxSent_setSleepMode | ( | Ifx_SENT * | sent,
 |  | IfxSent_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
sent | pointer to SENT registers
mode | mode selection (enable / disable)
Returns
None

Definition at line 665 of file IfxSent.h.

◆ IfxSent_setSuspendMode()

IFX_INLINE void IfxSent_setSuspendMode | ( | Ifx_SENT * | sent,
 |  | IfxSent_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
sent | Pointer to SENT module registers
mode | Module suspend mode
Returns
None

Definition at line 674 of file IfxSent.h.


iLLD_TC26B: Baudrate Configuration

Functions
Baudrate Configuration
iLLD » SENT » Standard Driver
Collaboration diagram for Baudrate Configuration:

Functions

IFX_INLINE void | IfxSent_setChannelFractionalDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider. More...
IFX_INLINE void | IfxSent_setChannelPreDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider. More...
IFX_EXTERN float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
IFX_EXTERN void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
IFX_EXTERN void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...

Detailed Description

Function Documentation

◆ IfxSent_getModuleClock()

IFX_EXTERN float32 IfxSent_getModuleClock ( Ifx_SENT * sent )

Returns the current module frequency in Hertz.

Parameters
sent base address of the SENT register space
Returns
The current module frequency in Hertz

Definition at line 55 of file IfxSent.c.

Referenced by IfxSent_getChannelUnitTime(), and IfxSent_initializeChannelUnitTime().

◆ IfxSent_initializeChannelUnitTime()

IFX_EXTERN void IfxSent_initializeChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | float32 | tUnit
 | ) |  |

Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
tUnit | desired unit time (f_tick), e.g. 3E-6 for 3 uS
Returns
None

Definition at line 86 of file IfxSent.c.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_initializeModuleClock()

IFX_EXTERN void IfxSent_initializeModuleClock | ( | Ifx_SENT * | sent,
 |  | IfxSent_ClockDividerMode | dividerMode,
 |  | uint16 | stepValue
 | ) |  |

Initialize and get the clock for SENT kernel.

Parameters
sent | base address of the SENT register space
dividerMode | Divider mode for clock output
stepValue | clock frequency for for module fractional divider
Returns
None

Definition at line 118 of file IfxSent.c.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_setChannelFractionalDivider()

IFX_INLINE void IfxSent_setChannelFractionalDivider | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | divider
 | ) |  |

Sets the channel fractional baudrate divider.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
divider | channel baudrate fractional divider
Returns
None

Definition at line 653 of file IfxSent.h.

Referenced by IfxSent_initializeChannelUnitTime().

◆ IfxSent_setChannelPreDivider()

IFX_INLINE void IfxSent_setChannelPreDivider | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | preDivider
 | ) |  |

Sets the channel baudrate pre-divider.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
preDivider | channel baudrate pre-divider
Returns
None

Definition at line 659 of file IfxSent.h.

Referenced by IfxSent_initializeChannelUnitTime().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » SENT » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxSent_initSentPin (const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input. More...
IFX_INLINE void | IfxSent_initSpcPin (const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output. More...

Detailed Description

Function Documentation

◆ IfxSent_initSentPin()

IFX_INLINE void IfxSent_initSentPin | ( | const IfxSent_Sent_In * | sentIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SENT input.

Parameters
sentIn | the SENT Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 614 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().

◆ IfxSent_initSpcPin()

IFX_INLINE void IfxSent_initSpcPin | ( | const IfxSent_Spc_Out * | spcOut,
 |  | IfxPort_OutputMode | spcOutMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a SPC output.

Parameters
spcOut | the SPC Pin which should be configured
spcOutMode | Port Output Mode
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 625 of file IfxSent.h.

Referenced by IfxSent_Sent_initChannel().


iLLD_TC26B: SENT Pin Mapping

Data Structures | Macros | Variables
SENT Pin Mapping
iLLD » SENT
Collaboration diagram for SENT Pin Mapping:

Data Structures

struct | IfxSent_Sent_In
SENT pin mapping structure. More...
struct | IfxSent_Spc_Out
SPC pin mapping structure. More...

Macros

#define | IFXSENT_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSENT_PINMAP_NUM_CHANNELS 6
#define | IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
#define | IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN
SENT_SENT0A: SENT input channel 0 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
SENT_SENT0A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
SENT_SENT0B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
SENT_SENT0C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN
SENT_SENT1A: SENT input channel 1 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
SENT_SENT1A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
SENT_SENT1B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
SENT_SENT1C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN
SENT_SENT2A: SENT input channel 2 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
SENT_SENT2A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
SENT_SENT2B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
SENT_SENT2C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN
SENT_SENT2D: SENT input channel 2 pin D. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN
SENT_SENT2D: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN
SENT_SENT3A: SENT input channel 3 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
SENT_SENT3A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
SENT_SENT3B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
SENT_SENT3C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN
SENT_SENT3D: SENT input channel 3 pin D. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN
SENT_SENT3D: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN
SENT_SENT4A: SENT input channel 4 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN
SENT_SENT4A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
SENT_SENT4B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
SENT_SENT4C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN
SENT_SENT5A: SENT input channel 5 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN
SENT_SENT5A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
SENT_SENT5B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
SENT_SENT5C: SENT input. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
SENT_SPC0: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
SENT_SPC1: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
SENT_SPC2: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
SENT_SPC3: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
SENT_SPC4: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
SENT_SPC5: SENT output. More...
IFX_EXTERN const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table. More...
IFX_EXTERN const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxSent_Sent_In

struct IfxSent_Sent_In

SENT pin mapping structure.

Definition at line 39 of file IfxSent_PinMap.h.

Collaboration diagram for IfxSent_Sent_In:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Channel ID.
Ifx_SENT * | module | Base address.
IfxPort_Pin | pin | Port pin.
Ifx_RxSel | select | Input multiplexer value.

◆ IfxSent_Spc_Out

struct IfxSent_Spc_Out

SPC pin mapping structure.

Definition at line 48 of file IfxSent_PinMap.h.

Collaboration diagram for IfxSent_Spc_Out:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Channel ID.
Ifx_SENT * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSENT_PINMAP_NUM_CHANNELS

#define IFXSENT_PINMAP_NUM_CHANNELS 6

Definition at line 93 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_NUM_MODULES

#define IFXSENT_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 92 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_SENT_IN_NUM_ITEMS

#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4

Definition at line 94 of file IfxSent_PinMap.h.

◆ IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS

#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Definition at line 95 of file IfxSent_PinMap.h.

Variable Documentation

◆ IfxSent_SENT0A_AN24_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN

SENT_SENT0A: SENT input channel 0 pin A.

Definition at line 56 of file IfxSent_PinMap.h.

◆ IfxSent_SENT0A_P40_0_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN

SENT_SENT0A: SENT input.

Definition at line 57 of file IfxSent_PinMap.h.

◆ IfxSent_SENT0B_P00_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN

SENT_SENT0B: SENT input.

Definition at line 58 of file IfxSent_PinMap.h.

◆ IfxSent_SENT0C_P02_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN

SENT_SENT0C: SENT input.

Definition at line 59 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1A_AN25_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN

SENT_SENT1A: SENT input channel 1 pin A.

Definition at line 60 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1A_P40_1_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN

SENT_SENT1A: SENT input.

Definition at line 61 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1B_P00_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN

SENT_SENT1B: SENT input.

Definition at line 62 of file IfxSent_PinMap.h.

◆ IfxSent_SENT1C_P02_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN

SENT_SENT1C: SENT input.

Definition at line 63 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2A_AN26_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN

SENT_SENT2A: SENT input channel 2 pin A.

Definition at line 64 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2A_P40_2_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN

SENT_SENT2A: SENT input.

Definition at line 65 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2B_P00_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN

SENT_SENT2B: SENT input.

Definition at line 66 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2C_P02_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN

SENT_SENT2C: SENT input.

Definition at line 67 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2D_AN36_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN

SENT_SENT2D: SENT input channel 2 pin D.

Definition at line 68 of file IfxSent_PinMap.h.

◆ IfxSent_SENT2D_P40_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN

SENT_SENT2D: SENT input.

Definition at line 69 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3A_AN27_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN

SENT_SENT3A: SENT input channel 3 pin A.

Definition at line 70 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3A_P40_3_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN

SENT_SENT3A: SENT input.

Definition at line 71 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3B_P00_4_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN

SENT_SENT3B: SENT input.

Definition at line 72 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3C_P02_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN

SENT_SENT3C: SENT input.

Definition at line 73 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3D_AN37_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN

SENT_SENT3D: SENT input channel 3 pin D.

Definition at line 74 of file IfxSent_PinMap.h.

◆ IfxSent_SENT3D_P40_7_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN

SENT_SENT3D: SENT input.

Definition at line 75 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4A_AN38_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN

SENT_SENT4A: SENT input channel 4 pin A.

Definition at line 76 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4A_P40_8_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN

SENT_SENT4A: SENT input.

Definition at line 77 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4B_P00_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN

SENT_SENT4B: SENT input.

Definition at line 78 of file IfxSent_PinMap.h.

◆ IfxSent_SENT4C_P33_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN

SENT_SENT4C: SENT input.

Definition at line 79 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5A_AN39_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN

SENT_SENT5A: SENT input channel 5 pin A.

Definition at line 80 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5A_P40_9_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN

SENT_SENT5A: SENT input.

Definition at line 81 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5B_P00_6_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN

SENT_SENT5B: SENT input.

Definition at line 82 of file IfxSent_PinMap.h.

◆ IfxSent_SENT5C_P33_5_IN

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN

SENT_SENT5C: SENT input.

Definition at line 83 of file IfxSent_PinMap.h.

◆ IfxSent_Sent_In_pinTable

IFX_EXTERN const IfxSent_Sent_In* IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]

IfxSent_Sent_In table.

Definition at line 99 of file IfxSent_PinMap.h.

◆ IfxSent_SPC0_P00_1_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT

SENT_SPC0: SENT output.

Definition at line 84 of file IfxSent_PinMap.h.

◆ IfxSent_SPC1_P02_7_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT

SENT_SPC1: SENT output.

Definition at line 85 of file IfxSent_PinMap.h.

◆ IfxSent_SPC2_P00_3_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT

SENT_SPC2: SENT output.

Definition at line 86 of file IfxSent_PinMap.h.

◆ IfxSent_SPC3_P00_4_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT

SENT_SPC3: SENT output.

Definition at line 87 of file IfxSent_PinMap.h.

◆ IfxSent_SPC4_P00_5_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT

SENT_SPC4: SENT output.

Definition at line 88 of file IfxSent_PinMap.h.

◆ IfxSent_SPC5_P00_6_OUT

IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT

SENT_SPC5: SENT output.

Definition at line 89 of file IfxSent_PinMap.h.

◆ IfxSent_Spc_Out_pinTable

IFX_EXTERN const IfxSent_Spc_Out* IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]

IfxSent_Spc_Out table.

Definition at line 102 of file IfxSent_PinMap.h.


iLLD_TC26B: How to use the SENT Interface driver?

How to use the SENT Interface driver?
iLLD » SENT
Collaboration diagram for How to use the SENT Interface driver?:

This SENT interface driver provides functions to communicate with external sensors.

Preparation

Include Files

Include following header file into your C code:

#include <Sent/Sent/IfxSent_Sent.h>

Variables

Declare SENT module and channel handles as global variables in your C code. If multiple SENT channels should be serviced, it makes sense to declare the SENT channel handle as an array:

#define TESTED_SENT_CHANNELS 3
static IfxSent_Sent sent;
static IfxSent_Sent_Channel sentChannel[TESTED_SENT_CHANNELS];

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:

#define IFX_INTPRIO_SENT_CHANNEL 1

Add the interrupt service routine to your C code. It has to call the SENT interrupt handler by passing the SENT channel handle:

void SentInterruptHandler(IfxSent_Sent_Channel *channel);
IFX_INTERRUPT(sentChannelISR, 0, IFX_INTPRIO_SENT_CHANNEL)
{
int i;
for(i=0; i<TESTED_SENT_CHANNELS; ++i)
{
SentInterruptHandler(&sentChannel[i]);
}
}

Note: the SentInterruptHandler function is not part of the interface driver, but has to be implemented in the application. A template can be found below under Interrupt Service Handler

Finally install the interrupt handlers in your initialisation function:

// install interrupt handler
IfxCpu_Irq_installInterruptHandler(&sentChannelISR, IFX_INTPRIO_SENT_CHANNEL);
IfxCpu_enableInterrupts();

Module Initialisation

The module initialisation can be done in the same function. Here an example for SENT and SPC mode:

// create module config
IfxSent_Sent_Config sentConfig;
IfxSent_Sent_initModuleConfig(&sentConfig, &MODULE_SENT);
// initialize module
//IfxSent_Sent sent; // defined globally
IfxSent_Sent_initModule(&sent, &sentConfig);

Channel Initialisation

After the module has been initialized, one or more SENT channels can be configured.

Here an example for three SENT channels in SENT and SPC mode:

// create channel config
IfxSent_Sent_ChannelConfig sentChannelConfig;
IfxSent_Sent_initChannelConfig(&sentChannelConfig, &sent);
// define tUnit of the external sensor
sentChannelConfig.tUnit = 3.0E-6;
// ISR priorities and interrupt target
sentChannelConfig.interrupt.priority = IFX_INTPRIO_SENT_CHANNEL;
sentChannelConfig.interrupt.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
int i;
for(i=0; i<TESTED_SENT_CHANNELS; ++i)
{
// pin configuration
const IfxSent_Sent_Pins sentPins[TESTED_SENT_CHANNELS] =
{
{ // Channel 0
&IfxSent_SENT0C_P02_8_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC0_P00_1_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
{ // Channel 1
&IfxSent_SENT1C_P02_7_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC1_P02_7_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
{ // Channel 2
&IfxSent_SENT2C_P02_6_IN, IfxPort_InputMode_noPullDevice, // SENT input
&IfxSent_SPC2_P00_3_OUT, IfxPort_OutputMode_openDrain, // SENT output
IfxPort_PadDriver_cmosAutomotiveSpeed1
},
};
sentChannelConfig.pins = &sentPins[i];
// set channel
sentChannelConfig.channelId = (IfxSent_ChannelId)i;
// initialize channel
IfxSent_Sent_initChannel(&sentChannel[i], &sentChannelConfig);
}

Interrupt Service Handler

The ISR has to be implemented in the application. Following template can be used to react on the events:

void SentInterruptHandler(IfxSent_Sent_Channel *channel)
{
Ifx_SENT_CH_INTSTAT interruptStatus = IfxSent_Sent_getAndClearInterruptStatus(channel);
if( interruptStatus.U )
{
// check for error conditions
if (interruptStatus.U & IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS)
{
// * Receive Buffer Overflow
// * This bit is set after a frame has been received while the old one was
// * not read from RDRx. I.e. the kernel wants to set any of the two
// * interrupts RSI and RDI and finds any of these two interrupts already
// * set. The old data is overwritten by the new data.
// *
if (interruptStatus.B.RBI)
{
// insert your error handling code here
__debug();
}
// * Transmit Buffer Underflow
// * This bit is set after data has been completely transferred (PLEN
// * exceeded) and no new data was written to SCRx.
// *
if (interruptStatus.B.TBI)
{
// insert your error handling code here
__debug();
}
// * Frequency Range Error
// * This bit is set after a Synchronization / Calibration pulse was
// * received that deviates more than +- 25% from the nominal value.
// * The referring data is ignored.
// *
if (interruptStatus.B.FRI)
{
// insert your error handling code here
__debug();
}
// * Frequency Drift Error
// * This bit is set after a subsequent Synchronization / Calibration
// * pulse was received that deviates more than 1.5625% (1/64) from its
// * predecessor.
// *
if (interruptStatus.B.FDI)
{
// insert your error handling code here
__debug();
}
// * Wrong Number of Nibbles
// * This bit is set after a more nibbles have been received than expected
// * or a Synchronization / Calibration Pulse is received too early thus
// * too few nibbles have been received
// *
if (interruptStatus.B.NNI)
{
// insert your error handling code here
__debug();
}
// * Nibbles Value out of Range
// * This bit is set after a too long or too short nibble pulse has been
// * received. I.e. value < 0 or value > 15.
// *
if (interruptStatus.B.NVI)
{
// insert your error handling code here
__debug();
}
// * CRC Error
// * This bit is set if the CRC check fails.
// *
if (interruptStatus.B.CRCI)
{
// insert your error handling code here
__debug();
}
// * Wrong Status and Communication Nibble Error
// * In standard Serial Frame Mode (RCR.ESF is cleared), this bit is set
// * if the Status and Communication nibble shows a start bit in a frame
// * other than frame number n x 16.
// * In Extended Serial Frame Mode this bit is without function.
// *
if (interruptStatus.B.WSI)
{
// insert your error handling code here
__debug();
}
// * Serial Data CRC Error
// * This bit is set if the CRC of the serial message fails.
// * In Extended Serial Message Format, this includes a check of the Serial
// * Communication Nibble for correct 0 values of bit 3 in frames 7, 13 and 18.
// *
if (interruptStatus.B.SCRI)
{
// insert your error handling code here
__debug();
}
// * Watch Dog Error
// * This bit is set if the Watch Dog Timer of the channel expires.
// *
if (interruptStatus.B.WDI)
{
// insert your error handling code here
__debug();
}
}
// transaction events
// * Receive Data
// * RDI is activated when a received frame is moved to a Receive Data
// * Register RDR. Both RDI and RSI will be issued together in normal use
// * cases where the frame size is not bigger than 8 nibbles and CRC is
// * correct or not checked (if RCRx.CDIS is cleared).
// *
if (interruptStatus.B.RDI)
{
// * Ignore RDI bit, useful only when Frame Length is greater than
// * 8 nibbles since it can indicate that end of frame
// *
}
// * Receive Success
// * This bit is set at the successfully received end of a frame.
// * Depending on bit RCRx.CDIS this indicates a successful check of the CRC.
// *
if (interruptStatus.B.RSI)
{
// here you could handle the incoming frame:
IfxSent_Sent_Frame frame;
IfxSent_Sent_readChannelSerialDataFrame(channel, &frame);
// do something with the incoming data
}
// * Transfer Data
// * This bit is set after the trigger condition was detected. Data to be
// * transferred has been moved internally. Thus a new value can be written
// * to SCRx. This can be used for back to back transfers.
// *
if (interruptStatus.B.TDI)
{
}
// * Serial Data Received
// * This bit is set after all serial data bits have been received via the
// * Status and Communication nibble. Depending on bit RCRx.SCDIS this
// * indicates a successful check of the CRC.
// *
if (interruptStatus.B.SDI)
{
// here you could handle the incoming message:
// decode incoming message
IfxSent_Sent_SerialMessageFrame message;
IfxSent_Sent_readChannelSerialMessageFrame(channel, &message);
// do something with the incoming message
}
}
}

Frame Decoding

Following code snippet shows, how incoming data of a TLE4998S device can be decoded:

static void parseSensorData(IfxSent_Sent_Frame *frame)
{
uint32 data = frame->data;
uint8 statusNibble = frame->statusNibble;
// select B range [mT]
const uint8 rangeValTable[4] = { 200, 100, 50, 0 };
uint8 rangeVal = rangeValTable[statusNibble & 3];
uint16 hallVal = (short)((((data & 0xFFFF) * rangeVal) / 0x7FFF) - rangeVal);
uint16 temperature = ((short)((data >> 16) & 0x00FF) - 55);
// do something with the values here...
}


iLLD_TC26B: Interface Driver

Modules
Interface Driver
iLLD » SENT
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions
Channel Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » SENT » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxSent_Sent_Enable
Specifies the Interrupt type enables structure. More...
struct | IfxSent_Sent
Specifies SENT handle structure. More...
union | IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxSent_Sent_InputOutputControl
Specifies the input output control properties. More...
struct | IfxSent_Sent_Interrupt
Specifies the interrupt control properties. More...
struct | IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure. More...
struct | IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties. More...
struct | IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel. More...
struct | IfxSent_Sent_ReceiveControl
Specifies the receive control properties. More...
struct | IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure. More...
struct | IfxSent_Sent_Channel
Specifies the SENT Channel handle structure. More...
struct | IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure. More...
struct | IfxSent_Sent_Config
Specifies the SENT module configuration structure. More...
struct | IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel. More...
struct | IfxSent_Sent_SerialMessageFrame
Specifies received message frame. More...

Detailed Description

Data Structure Documentation

◆ IfxSent_Sent_Enable

struct IfxSent_Sent_Enable

Specifies the Interrupt type enables structure.

Definition at line 377 of file IfxSent_Sent.h.

Data Fields
uint8 | crcErrorInterrupt | Specifies CRC error interrupt enable.
uint8 | frequencyDriftErrorInterrupt | Specifies frequency drift error interrupt enable.
uint8 | frequencyRangeErrorInterrupt | Specifies frequency not in the range error interrupt enable.
uint8 | nibblesValueOutOfRangeErrorInterrupt | Specifies nibble value out of range error interrupt enable.
uint8 | nibblesWrongErrorInterrupt | Specifies nibbles wrong error interrupt enable.
uint8 | receiveBufferOverflowInterrupt | Specifies receive buffer overflow interrupt enable.
uint8 | receiveDataInterrupt | Specifies receive data interrupt enable.
uint8 | receiveSuccessInterrupt | Specifies receive success interrupt enable.
uint8 | serialDataCrcErrorInterrupt | Specifies serial data CRC error interrupt enable.
uint8 | serialDataReceiveInterrupt | Specifies serial data interrupt enable.
uint8 | transferBufferUnderflowInterrupt | Specifies transfer buffer underflow interrupt enable.
uint8 | transferDataInterrupt | Specifies transfer data interrupt enable.
uint8 | watchdogErrorInterrupt | Specifies watchdog error interrupt enable.
uint8 | wrongStatusNibbleErrorInterrupt | Specifies wrong status nibble error interrupt enable.

◆ IfxSent_Sent

struct IfxSent_Sent

Specifies SENT handle structure.

Definition at line 401 of file IfxSent_Sent.h.

Data Fields
Ifx_SENT * sent Specifies pointer to SENT registers.

◆ IfxSent_Sent_EnabledInterrupts

union IfxSent_Sent_EnabledInterrupts

Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member.

Definition at line 408 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_EnabledInterrupts:
[legend]
Data Fields
uint32 | ALL | Specifies to write and read to/from all flags as once via the ALL member.
IfxSent_Sent_Enable | enable | Structure contains the interrupt flags.

◆ IfxSent_Sent_InputOutputControl

struct IfxSent_Sent_InputOutputControl

Specifies the input output control properties.

Definition at line 416 of file IfxSent_Sent.h.

Data Fields
IfxSent_DigitalGlitchesLength | digitalGlitchFilterDepth | Specifies the Digital Glitch Filter depth for input signal delay.
boolean | edgeCounterCleared | Specifies the edge counter reset.
IfxSent_ExternalTrigger | externalTrigger | Specifies the external trigger line source.
boolean | glitchFallingCleared | Specifies the glitch falling edge clear.
boolean | glitchRisingCleared | Specifies the glitch rising edge clear.
boolean | inputPulsePolarityHigh | Specifies the polarity of input of each channel.
boolean | outputPulsePolarityHigh | Specifies the polarity of input of each channel.
boolean | triggerMonitorCleared | Specifies the trigger monitor reset.

◆ IfxSent_Sent_Interrupt

struct IfxSent_Sent_Interrupt

Specifies the interrupt control properties.

Definition at line 430 of file IfxSent_Sent.h.

Data Fields
IfxSrc_Tos | isrProvider | Specifies the interrupt service provider. CPU or DMA.
uint16 | priority | Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.

◆ IfxSent_Sent_InterruptNodeControl

struct IfxSent_Sent_InterruptNodeControl

Specifies the interrupt control properties structure.

Definition at line 438 of file IfxSent_Sent.h.

Data Fields
IfxSent_InterruptNodePointer | errorInterruptNode | Specifies the interrupt node for erri request.
IfxSent_InterruptNodePointer | receiveBufferOverflowInterruptNode | Specifies the interrupt node for rbi request.
IfxSent_InterruptNodePointer | receiveDataInterruptNode | Specifies the interrupt node for rdi request.
IfxSent_InterruptNodePointer | receiveSuccessInterruptNode | Specifies the interrupt node for rsi request.
IfxSent_InterruptNodePointer | serialDataReceiveInterruptNode | Specifies the interrupt node for sdi request.
IfxSent_InterruptNodePointer | transferBufferUnderflowInterruptNode | Specifies the interrupt node for tbi request.
IfxSent_InterruptNodePointer | transferDataInterruptNode | Specifies the interrupt node for tdi request.
IfxSent_InterruptNodePointer | watchdogErrorInterruptNode | Specifies the interrupt node for wdi request.

◆ IfxSent_Sent_NibbleControl

struct IfxSent_Sent_NibbleControl

Specifies the received nibbles control properties.

Definition at line 452 of file IfxSent_Sent.h.

Data Fields
IfxSent_Nibble | nibblePointer0 | Specifies the received nibble0 control.
IfxSent_Nibble | nibblePointer1 | Specifies the received nibble1 control.
IfxSent_Nibble | nibblePointer2 | Specifies the received nibble2 control.
IfxSent_Nibble | nibblePointer3 | Specifies the received nibble3 control.
IfxSent_Nibble | nibblePointer4 | Specifies the received nibble4 control.
IfxSent_Nibble | nibblePointer5 | Specifies the received nibble5 control.
IfxSent_Nibble | nibblePointer6 | Specifies the received nibble6 control.
IfxSent_Nibble | nibblePointer7 | Specifies the received nibble7 control.

◆ IfxSent_Sent_Pins

struct IfxSent_Sent_Pins

Specifies the pins configuration for SENT channel.

Definition at line 466 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_Pins:
[legend]
Data Fields
IFX_CONST IfxSent_Sent_In * | in | Specifies input pin configuration.
IfxPort_InputMode | inMode | Specifies input pin mode.
IFX_CONST IfxSent_Spc_Out * | out | Specifies output pin configuration.
IfxPort_OutputMode | outMode | Specifies output pin mode.
IfxPort_PadDriver | pinDriver | Pad driver mode definition.

◆ IfxSent_Sent_ReceiveControl

struct IfxSent_Sent_ReceiveControl

Specifies the receive control properties.

Definition at line 477 of file IfxSent_Sent.h.

Data Fields
boolean | alternateCrcSelected | Specifies the CRC is calculated for both fast and serial messages.
boolean | crcMethodDisabled | Specifies the CRC with zero nibbles disabled or enabled.
boolean | crcModeDisabled | Specifies the CRC mode disabled mode.
boolean | driftErrorsDisabled | Specifies the drift errors enabled or disabled.
boolean | endPulseIgnored | Specifies the pause pulse during synchronization.
IfxSent_ExtendedSerialFrameMode | extendedSerialFrameMode | Specifies the extended serial frame mode.
IfxSent_FrameCheckMode | frameCheckMode | Specifies the frame check mode for valid frame.
uint8 | frameLength | Specifies frame length in nibbles.
boolean | serialDataDisabledCrcDisabled | Specifies the CRC disable for serial data disabled mode.
boolean | serialDataProcessingEnabled | Specifies the serial data processing mode.
boolean | statusNibbleEnabled | Specifies the status nibble to include in CRC.
boolean | suspendTriggered | Specifies the suspend trigger disables the channel or not.

◆ IfxSent_Sent_TransmitControl

struct IfxSent_Sent_TransmitControl

Specifies the SPC channel properties structure.

Definition at line 495 of file IfxSent_Sent.h.

Data Fields
uint8 | pulseDelayLength | Specifies the pulse delay length.
uint8 | pulseLength | Specifies the pulse length in ticktimes.
IfxSent_SpcMode | spcMode | Specifies the SENT SPC operational mode.
IfxSent_TimeBase | timeBase | Specifies the pulse time base.
IfxSent_TriggerSource | triggerSource | Specifies the trigger source and mode.

◆ IfxSent_Sent_Channel

struct IfxSent_Sent_Channel

Specifies the SENT Channel handle structure.

Definition at line 510 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_Channel:
[legend]
Data Fields
Ifx_SENT_CH * | channel | Specifies the pointer SENT channel registers.
IfxSent_ChannelId | channelId | Specifies the SENT channel number.
IfxSent_Sent * | driver | Specifies the pointer to SENT module handler.

◆ IfxSent_Sent_ChannelConfig

struct IfxSent_Sent_ChannelConfig

Specifies the SENT Channel configuration structure.

Definition at line 519 of file IfxSent_Sent.h.

Collaboration diagram for IfxSent_Sent_ChannelConfig:
[legend]
Data Fields
IfxSent_ChannelId | channelId | Specifies the SENT channel number.
IfxSent_Sent * | driver | Specifies the pointer to SENT module handler.
IfxSent_Sent_EnabledInterrupts | enabledInterrupts |
IfxSent_Sent_InputOutputControl | inputOutputControl | Specifies the input output controllable properties.
IfxSent_Sent_Interrupt | interrupt | Specifies the interrupt control properties structure.
IfxSent_Sent_InterruptNodeControl | interuptNodeControl | Specifies the interrupt control properties structure.
IfxSent_Sent_NibbleControl | nibbleControl | Specifies the received nibbles control properties.
IFX_CONST IfxSent_Sent_Pins * | pins | Specifies the pins configuration for SENT channel.
IfxSent_Sent_ReceiveControl | receiveControl | Specifies the receive control properties.
boolean | spcModeOn | Specifies the SENT SPC mode enable/disable.
IfxSent_Sent_TransmitControl | transmitControl | Specifies the transmit control properties.
float32 | tUnit | desired unit time (f_tick), e.g. 3E-6 for 3 uS
uint16 | watchDogTimerLimit | Speciifes the enabled interrupts for each Channel.

◆ IfxSent_Sent_Config

struct IfxSent_Sent_Config

Specifies the SENT module configuration structure.

Definition at line 538 of file IfxSent_Sent.h.

Data Fields
Ifx_SENT * | module | Specifies pointer to SENT registers.
boolean | sleepModeEnabled | Specifies SENT enable/disable.
uint32 | timeStampPreDivider | Specifies the pre-divider to get clock in time stamp.

◆ IfxSent_Sent_Frame

struct IfxSent_Sent_Frame

Specifies the frame configuration structure for a channel.

Definition at line 547 of file IfxSent_Sent.h.

Data Fields
uint32 | data | Contains the data from last received frame.
uint8 | statusNibble | Contains the status and communication Nibble of last received frame.
uint32 | timeStamp | Contains the timestamp of last received frame.

◆ IfxSent_Sent_SerialMessageFrame

struct IfxSent_Sent_SerialMessageFrame

Specifies received message frame.

Definition at line 556 of file IfxSent_Sent.h.

Data Fields
IfxSent_ConfigBit | configBit | Contains the received configuration bit value.
uint8 | crc | Contains the received CRC value.
uint8 | messageId | Contains the received message ID value.
uint16 | serialData | Contains the received serial data value.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » SENT » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_EXTERN void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
IFX_EXTERN boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
IFX_EXTERN void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...

Detailed Description

Function Documentation

◆ IfxSent_Sent_deInitModule()

IFX_EXTERN void IfxSent_Sent_deInitModule ( IfxSent_Sent * driver )

Reset the SENT module.

Parameters
driver pointer to the SENT module handler
Returns
None

Definition at line 36 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initModule()

IFX_EXTERN boolean IfxSent_Sent_initModule | ( | IfxSent_Sent * | driver,
 |  | const IfxSent_Sent_Config * | config
 | ) |  |

Initialise the SENT with the supplied configureation.

Parameters
driver | pointer to the SENT module handler
config | pointer to the SENT module configuration
Returns
TRUE if valid configuration otherwise FALSE

Usage example: see How to use the SENT Interface driver?

Definition at line 265 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initModuleConfig()

IFX_EXTERN void IfxSent_Sent_initModuleConfig | ( | IfxSent_Sent_Config * | config,
 |  | Ifx_SENT * | sent
 | ) |  |

Initialise buffer with default SENT configuration.

Parameters
config | pointer to the SENT module configuration
sent | base address of the SENT register space
Returns
None

Usage example: see How to use the SENT Interface driver?

Definition at line 291 of file IfxSent_Sent.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » SENT » Interface Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_Sent_getAndClearInterruptStatus (IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_EXTERN boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

Function Documentation

◆ IfxSent_Sent_getAndClearInterruptStatus()

IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus ( IfxSent_Sent_Channel * channel )

Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.

This function should be used in an ISR to retrieve the events which triggered the interrupt.

Parameters
channel Specifies the SENT Channel handle structure
Returns
Interrupt flags which have been cleared.

Usage example: see How to use the SENT Interface driver?

Definition at line 669 of file IfxSent_Sent.h.

◆ IfxSent_Sent_initChannel()

IFX_EXTERN boolean IfxSent_Sent_initChannel | ( | IfxSent_Sent_Channel * | channel,
 |  | const IfxSent_Sent_ChannelConfig * | config
 | ) |  |

Initialize the channel with the supplied configuration.

Parameters
channel | pointer to the SENT channel
config | pointer to the SENT channel configuration
Returns
TRUE if valid configuration otherwise FALSE

Usage example: see How to use the SENT Interface driver?

Definition at line 46 of file IfxSent_Sent.c.

◆ IfxSent_Sent_initChannelConfig()

IFX_EXTERN void IfxSent_Sent_initChannelConfig | ( | IfxSent_Sent_ChannelConfig * | config,
 |  | IfxSent_Sent * | driver
 | ) |  |

Initialise channel buffer with default SENT channel configuration.

Parameters
config | pointer to the SENT channel configuration
driver | pointer to the SENT module handler
Returns
None

Usage example: see How to use the SENT Interface driver?

Definition at line 196 of file IfxSent_Sent.c.

◆ IfxSent_Sent_readChannelSerialDataFrame()

IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame | ( | IfxSent_Sent_Channel * | channel,
 |  | IfxSent_Sent_Frame * | frame
 | ) |  |

Reads the nibbles recieved in the Data register.

Parameters
channel | SENT Channel whose data has to be read
frame | Data read from the SENT Channel
Returns
TRUE if data received otherwise false

Usage example: see How to use the SENT Interface driver?

Definition at line 304 of file IfxSent_Sent.c.

◆ IfxSent_Sent_readChannelSerialMessageFrame()

IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame | ( | IfxSent_Sent_Channel * | channel,
 |  | IfxSent_Sent_SerialMessageFrame * | message
 | ) |  |

reads the Serial data recieved and collected over several SENT frames

Parameters
channel | reads the Serial data recieved and collected over several SENT frames
message | Data pointer pointing to the serial data read from the SENT Channel
Returns
TRUE if serial message received otherwise false

Usage example: see How to use the SENT Interface driver?

Definition at line 318 of file IfxSent_Sent.c.


iLLD_TC26B: IfxSent_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxSent_cfg.h File Reference
iLLD » SENT

SENT on-chip implementation data. More...

Go to the source code of this file.

Macros

#define | IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)
Specifies all interrupt events. More...
#define | IFXSENT_CFG_STEP_RANGE (1024)
Specifies the step range for calculating module clock. More...
#define | IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)
Specifies timeout value in transmission. More...
#define | IFXSENT_NUM_CHANNELS (6)
#define | IFXSENT_NUM_MODULES (1)

Enumerations

enum IfxSent_ChannelId {
IfxSent_ChannelId_0 = 0,
IfxSent_ChannelId_1 = 1,
IfxSent_ChannelId_2 = 2,
IfxSent_ChannelId_3 = 3,
IfxSent_ChannelId_4 = 4,
IfxSent_ChannelId_5 = 5,
IfxSent_ChannelId_none = -1
}
Specifies the channel Id. More...

Detailed Description

SENT on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSent_cfg.h.

Macro Definition Documentation

◆ IFXSENT_CFG_CHANNEL_INTEN

#define IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)

Specifies all interrupt events.

Definition at line 46 of file IfxSent_cfg.h.

Referenced by IfxSent_Sent_initChannelConfig().

◆ IFXSENT_CFG_STEP_RANGE

#define IFXSENT_CFG_STEP_RANGE (1024)

Specifies the step range for calculating module clock.

Definition at line 50 of file IfxSent_cfg.h.

◆ IFXSENT_CFG_TIMEOUT_VALUE

#define IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)

Specifies timeout value in transmission.

Definition at line 54 of file IfxSent_cfg.h.

Referenced by IfxSent_Sent_initChannel().

◆ IFXSENT_NUM_CHANNELS

#define IFXSENT_NUM_CHANNELS (6)

Definition at line 56 of file IfxSent_cfg.h.

◆ IFXSENT_NUM_MODULES

#define IFXSENT_NUM_MODULES (1)

Definition at line 58 of file IfxSent_cfg.h.

Enumeration Type Documentation

◆ IfxSent_ChannelId

enum IfxSent_ChannelId

Specifies the channel Id.

Enumerator
IfxSent_ChannelId_0 | Specifies the channel Id 0.
IfxSent_ChannelId_1 | Specifies the channel Id 1.
IfxSent_ChannelId_2 | Specifies the channel Id 2.
IfxSent_ChannelId_3 | Specifies the channel Id 3.
IfxSent_ChannelId_4 | Specifies the channel Id 4.
IfxSent_ChannelId_5 | Specifies the channel Id 5.
IfxSent_ChannelId_none | None Sent channels.

Definition at line 66 of file IfxSent_cfg.h.


iLLD_TC26B: IfxSent_PinMap.c File Reference

  • _PinMap
Variables
IfxSent_PinMap.c File Reference
iLLD » SENT

SENT I/O map. More...

#include "IfxSent_PinMap.h"
Include dependency graph for IfxSent_PinMap.c:

Go to the source code of this file.

Variables

IfxSent_Sent_In | IfxSent_SENT0A_AN24_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {NULL_PTR,24}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT1A_AN25_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {NULL_PTR,25}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT2A_AN26_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,26}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT2D_AN36_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,36}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT2D_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 6}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT3A_AN27_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,27}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT3D_AN37_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,37}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT3D_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 7}, Ifx_RxSel_d}
IfxSent_Sent_In | IfxSent_SENT4A_AN38_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {NULL_PTR,38}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT4A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 8}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c}
IfxSent_Sent_In | IfxSent_SENT5A_AN39_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {NULL_PTR,39}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT5A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 9}, Ifx_RxSel_a}
IfxSent_Sent_In | IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b}
IfxSent_Sent_In | IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c}
IfxSent_Spc_Out | IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6}
IfxSent_Spc_Out | IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6}
const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]

Detailed Description

SENT I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSent_PinMap.c.

Variable Documentation

◆ IfxSent_SENT0A_AN24_IN

IfxSent_Sent_In IfxSent_SENT0A_AN24_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {NULL_PTR,24}, Ifx_RxSel_a}

Definition at line 28 of file IfxSent_PinMap.c.

◆ IfxSent_SENT0A_P40_0_IN

IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a}

Definition at line 29 of file IfxSent_PinMap.c.

◆ IfxSent_SENT0B_P00_1_IN

IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b}

Definition at line 30 of file IfxSent_PinMap.c.

◆ IfxSent_SENT0C_P02_8_IN

IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c}

Definition at line 31 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1A_AN25_IN

IfxSent_Sent_In IfxSent_SENT1A_AN25_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {NULL_PTR,25}, Ifx_RxSel_a}

Definition at line 32 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1A_P40_1_IN

IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a}

Definition at line 33 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1B_P00_2_IN

IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b}

Definition at line 34 of file IfxSent_PinMap.c.

◆ IfxSent_SENT1C_P02_7_IN

IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c}

Definition at line 35 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2A_AN26_IN

IfxSent_Sent_In IfxSent_SENT2A_AN26_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,26}, Ifx_RxSel_a}

Definition at line 36 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2A_P40_2_IN

IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a}

Definition at line 37 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2B_P00_3_IN

IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b}

Definition at line 38 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2C_P02_6_IN

IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c}

Definition at line 39 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2D_AN36_IN

IfxSent_Sent_In IfxSent_SENT2D_AN36_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,36}, Ifx_RxSel_d}

Definition at line 40 of file IfxSent_PinMap.c.

◆ IfxSent_SENT2D_P40_6_IN

IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 6}, Ifx_RxSel_d}

Definition at line 41 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3A_AN27_IN

IfxSent_Sent_In IfxSent_SENT3A_AN27_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,27}, Ifx_RxSel_a}

Definition at line 42 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3A_P40_3_IN

IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a}

Definition at line 43 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3B_P00_4_IN

IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b}

Definition at line 44 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3C_P02_5_IN

IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c}

Definition at line 45 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3D_AN37_IN

IfxSent_Sent_In IfxSent_SENT3D_AN37_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,37}, Ifx_RxSel_d}

Definition at line 46 of file IfxSent_PinMap.c.

◆ IfxSent_SENT3D_P40_7_IN

IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 7}, Ifx_RxSel_d}

Definition at line 47 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4A_AN38_IN

IfxSent_Sent_In IfxSent_SENT4A_AN38_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {NULL_PTR,38}, Ifx_RxSel_a}

Definition at line 48 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4A_P40_8_IN

IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 8}, Ifx_RxSel_a}

Definition at line 49 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4B_P00_5_IN

IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b}

Definition at line 50 of file IfxSent_PinMap.c.

◆ IfxSent_SENT4C_P33_6_IN

IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c}

Definition at line 51 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5A_AN39_IN

IfxSent_Sent_In IfxSent_SENT5A_AN39_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {NULL_PTR,39}, Ifx_RxSel_a}

Definition at line 52 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5A_P40_9_IN

IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 9}, Ifx_RxSel_a}

Definition at line 53 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5B_P00_6_IN

IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b}

Definition at line 54 of file IfxSent_PinMap.c.

◆ IfxSent_SENT5C_P33_5_IN

IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c}

Definition at line 55 of file IfxSent_PinMap.c.

◆ IfxSent_Sent_In_pinTable

const IfxSent_Sent_In* IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]

Definition at line 64 of file IfxSent_PinMap.c.

◆ IfxSent_SPC0_P00_1_OUT

IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6}

Definition at line 56 of file IfxSent_PinMap.c.

◆ IfxSent_SPC1_P02_7_OUT

IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6}

Definition at line 57 of file IfxSent_PinMap.c.

◆ IfxSent_SPC2_P00_3_OUT

IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6}

Definition at line 58 of file IfxSent_PinMap.c.

◆ IfxSent_SPC3_P00_4_OUT

IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6}

Definition at line 59 of file IfxSent_PinMap.c.

◆ IfxSent_SPC4_P00_5_OUT

IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6}

Definition at line 60 of file IfxSent_PinMap.c.

◆ IfxSent_SPC5_P00_6_OUT

IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6}

Definition at line 61 of file IfxSent_PinMap.c.

◆ IfxSent_Spc_Out_pinTable

const IfxSent_Spc_Out* IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
Initial value:
= {
{
{
&IfxSent_SPC0_P00_1_OUT
},
{
&IfxSent_SPC1_P02_7_OUT
},
{
&IfxSent_SPC2_P00_3_OUT
},
{
&IfxSent_SPC3_P00_4_OUT
},
{
&IfxSent_SPC4_P00_5_OUT
},
{
&IfxSent_SPC5_P00_6_OUT
}
}
}
IfxSent_SPC5_P00_6_OUT
IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
Definition: IfxSent_PinMap.c:61
IfxSent_SPC1_P02_7_OUT
IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
Definition: IfxSent_PinMap.c:57
IfxSent_SPC4_P00_5_OUT
IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
Definition: IfxSent_PinMap.c:60
IfxSent_SPC0_P00_1_OUT
IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
Definition: IfxSent_PinMap.c:56
IfxSent_SPC2_P00_3_OUT
IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
Definition: IfxSent_PinMap.c:58
IfxSent_SPC3_P00_4_OUT
IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
Definition: IfxSent_PinMap.c:59

Definition at line 105 of file IfxSent_PinMap.c.


iLLD_TC26B: IfxSent_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxSent_PinMap.h File Reference
iLLD » SENT

SENT I/O map. More...

#include <IfxSent_reg.h>
#include <_Impl/IfxSent_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxSent_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxSent_Sent_In
SENT pin mapping structure. More...
struct | IfxSent_Spc_Out
SPC pin mapping structure. More...

Macros

#define | IFXSENT_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSENT_PINMAP_NUM_CHANNELS 6
#define | IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
#define | IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN
SENT_SENT0A: SENT input channel 0 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
SENT_SENT0A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
SENT_SENT0B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
SENT_SENT0C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN
SENT_SENT1A: SENT input channel 1 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
SENT_SENT1A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
SENT_SENT1B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
SENT_SENT1C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN
SENT_SENT2A: SENT input channel 2 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
SENT_SENT2A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
SENT_SENT2B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
SENT_SENT2C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN
SENT_SENT2D: SENT input channel 2 pin D. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN
SENT_SENT2D: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN
SENT_SENT3A: SENT input channel 3 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
SENT_SENT3A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
SENT_SENT3B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
SENT_SENT3C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN
SENT_SENT3D: SENT input channel 3 pin D. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN
SENT_SENT3D: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN
SENT_SENT4A: SENT input channel 4 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN
SENT_SENT4A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
SENT_SENT4B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
SENT_SENT4C: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN
SENT_SENT5A: SENT input channel 5 pin A. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN
SENT_SENT5A: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
SENT_SENT5B: SENT input. More...
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
SENT_SENT5C: SENT input. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
SENT_SPC0: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
SENT_SPC1: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
SENT_SPC2: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
SENT_SPC3: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
SENT_SPC4: SENT output. More...
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
SENT_SPC5: SENT output. More...
IFX_EXTERN const IfxSent_Sent_In * | IfxSent_Sent_In_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table. More...
IFX_EXTERN const IfxSent_Spc_Out * | IfxSent_Spc_Out_pinTable [IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table. More...

Detailed Description

SENT I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSent_PinMap.h.


iLLD_TC26B: IfxSent_Sent.h File Reference

  • Sent
  • Sent
Data Structures | Functions
IfxSent_Sent.h File Reference
iLLD » SENT

SENT SENT details. More...

#include "Scu/Std/IfxScuWdt.h"
#include "Sent/Std/IfxSent.h"
#include "Cpu/Irq/IfxCpu_Irq.h"
Include dependency graph for IfxSent_Sent.h:

Go to the source code of this file.

Data Structures

struct | IfxSent_Sent_Enable
Specifies the Interrupt type enables structure. More...
struct | IfxSent_Sent
Specifies SENT handle structure. More...
union | IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member. More...
struct | IfxSent_Sent_InputOutputControl
Specifies the input output control properties. More...
struct | IfxSent_Sent_Interrupt
Specifies the interrupt control properties. More...
struct | IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure. More...
struct | IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties. More...
struct | IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel. More...
struct | IfxSent_Sent_ReceiveControl
Specifies the receive control properties. More...
struct | IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure. More...
struct | IfxSent_Sent_Channel
Specifies the SENT Channel handle structure. More...
struct | IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure. More...
struct | IfxSent_Sent_Config
Specifies the SENT module configuration structure. More...
struct | IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel. More...
struct | IfxSent_Sent_SerialMessageFrame
Specifies received message frame. More...

Functions

IFX_EXTERN void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
IFX_EXTERN boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
IFX_EXTERN void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_Sent_getAndClearInterruptStatus (IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_EXTERN boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
IFX_EXTERN void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
IFX_EXTERN boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

SENT SENT details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSent_Sent.h.


iLLD_TC26B: IfxSent.h File Reference

  • Sent
  • Std
Macros | Enumerations | Functions
IfxSent.h File Reference
iLLD » SENT

SENT basic functionality. More...

#include "_Impl/IfxSent_cfg.h"
#include "Src/Std/IfxSrc.h"
#include "Scu/Std/IfxScuCcu.h"
#include "_PinMap/IfxSent_PinMap.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxSent_bf.h"
#include "IfxSent_reg.h"
Include dependency graph for IfxSent.h:

Go to the source code of this file.

Macros

#define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)

Enumerations

enum IfxSent_AlternateInput {
IfxSent_AlternateInput_0 = 0,
IfxSent_AlternateInput_1,
IfxSent_AlternateInput_2,
IfxSent_AlternateInput_3
}
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel. More...
enum IfxSent_ChannelStatus {
IfxSent_ChannelStatus_stop = 0,
IfxSent_ChannelStatus_initialize = 1,
IfxSent_ChannelStatus_running = 2,
IfxSent_ChannelStatus_synchronize = 3
}
SENT.CH[channelId].RSR.CST, Specifies the current channel status. More...
enum IfxSent_ClockDividerMode {
IfxSent_ClockDividerMode_off = 0,
IfxSent_ClockDividerMode_normal = 1,
IfxSent_ClockDividerMode_fractional = 2
}
SENT.FDR.DM , Specifies clock divider mode. More...
enum IfxSent_ConfigBit {
IfxSent_ConfigBit_0 = 0,
IfxSent_ConfigBit_1
}
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value. More...
enum IfxSent_DigitalGlitchesLength {
IfxSent_DigitalGlitchesLength_off = 0,
IfxSent_DigitalGlitchesLength_1 = 1,
IfxSent_DigitalGlitchesLength_2,
IfxSent_DigitalGlitchesLength_3,
IfxSent_DigitalGlitchesLength_4,
IfxSent_DigitalGlitchesLength_5,
IfxSent_DigitalGlitchesLength_6,
IfxSent_DigitalGlitchesLength_7,
IfxSent_DigitalGlitchesLength_8,
IfxSent_DigitalGlitchesLength_9,
IfxSent_DigitalGlitchesLength_10,
IfxSent_DigitalGlitchesLength_11,
IfxSent_DigitalGlitchesLength_12,
IfxSent_DigitalGlitchesLength_13,
IfxSent_DigitalGlitchesLength_14,
IfxSent_DigitalGlitchesLength_15
}
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples. More...
enum IfxSent_ExtendedSerialFrameMode {
IfxSent_ExtendedSerialFrameMode_standard = 0,
IfxSent_ExtendedSerialFrameMode_extended = 1
}
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure. More...
enum IfxSent_ExternalTrigger {
IfxSent_ExternalTrigger_0 = 0,
IfxSent_ExternalTrigger_1,
IfxSent_ExternalTrigger_2,
IfxSent_ExternalTrigger_3,
IfxSent_ExternalTrigger_4,
IfxSent_ExternalTrigger_5,
IfxSent_ExternalTrigger_6,
IfxSent_ExternalTrigger_7,
IfxSent_ExternalTrigger_8,
IfxSent_ExternalTrigger_9
}
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line. More...
enum IfxSent_FrameCheckMode {
IfxSent_FrameCheckMode_pastSyncPulse = 0,
IfxSent_FrameCheckMode_futureSuncPulse = 1
}
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode. More...
enum IfxSent_InterruptNodePointer {
IfxSent_InterruptNodePointer_0 = 0,
IfxSent_InterruptNodePointer_1,
IfxSent_InterruptNodePointer_2,
IfxSent_InterruptNodePointer_3,
IfxSent_InterruptNodePointer_trigo0 = 4,
IfxSent_InterruptNodePointer_trigo1,
IfxSent_InterruptNodePointer_trigo2,
IfxSent_InterruptNodePointer_trigo3,
IfxSent_InterruptNodePointer_trigo4,
IfxSent_InterruptNodePointer_trigo5
}
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt. More...
enum IfxSent_Nibble {
IfxSent_Nibble_0 = 0,
IfxSent_Nibble_1,
IfxSent_Nibble_2,
IfxSent_Nibble_3,
IfxSent_Nibble_4,
IfxSent_Nibble_5,
IfxSent_Nibble_6,
IfxSent_Nibble_7
}
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer. More...
enum IfxSent_SleepMode {
IfxSent_SleepMode_enable = 0,
IfxSent_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_SENT.CLC.B.EDIS. More...
enum IfxSent_SpcMode {
IfxSent_SpcMode_sync = 0,
IfxSent_SpcMode_range = 1,
IfxSent_SpcMode_bidirectional = 2
}
Specifies the SENT SPC operational mode. More...
enum IfxSent_SuspendMode {
IfxSent_SuspendMode_none = 0,
IfxSent_SuspendMode_hard = 1,
IfxSent_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...
enum IfxSent_TimeBase {
IfxSent_TimeBase_measuredFrequency = 0,
IfxSent_TimeBase_nominalFrequency = 1
}
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time. More...
enum IfxSent_TriggerSource {
IfxSent_TriggerSource_off = 0,
IfxSent_TriggerSource_immediate = 1,
IfxSent_TriggerSource_fallingEdge = 2,
IfxSent_TriggerSource_externalTrigger = 3
}
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation. More...
enum IfxSent_InterruptSource {
IfxSent_InterruptSource_rsi = 0,
IfxSent_InterruptSource_rdi = 1,
IfxSent_InterruptSource_rbi = 2,
IfxSent_InterruptSource_tdi = 3,
IfxSent_InterruptSource_tbi = 4,
IfxSent_InterruptSource_fri = 5,
IfxSent_InterruptSource_fdi = 6,
IfxSent_InterruptSource_nni = 7,
IfxSent_InterruptSource_nvi = 8,
IfxSent_InterruptSource_crci = 9,
IfxSent_InterruptSource_wsi = 10,
IfxSent_InterruptSource_sdi = 11,
IfxSent_InterruptSource_scri = 12,
IfxSent_InterruptSource_wdi = 13
}
Sent Interrupt Source. More...

Functions

IFX_INLINE void | IfxSent_setAltiInput (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel. More...
IFX_INLINE void | IfxSent_setTimeStampPredivider (Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getAndClearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware. More...
IFX_INLINE Ifx_SENT_CH_INTSTAT | IfxSent_getChannelInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status. More...
IFX_INLINE volatile Ifx_SRC_SRCR * | IfxSent_getChannelSrc (IfxSent_ChannelId channelId)
gets the source for channel interrupt handler More...
IFX_INLINE void | IfxSent_disableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number. More...
IFX_INLINE void | IfxSent_disableModule (Ifx_SENT *sent)
Disable the SENT module. More...
IFX_INLINE void | IfxSent_enableChannel (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number. More...
IFX_INLINE void | IfxSent_enableModule (Ifx_SENT *sent)
Enable the SENT module. More...
IFX_INLINE boolean | IfxSent_isModuleSuspended (Ifx_SENT *sent)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxSent_setSleepMode (Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_INLINE void | IfxSent_setSuspendMode (Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...
IFX_INLINE void | IfxSent_setChannelFractionalDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider. More...
IFX_INLINE void | IfxSent_setChannelPreDivider (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider. More...
IFX_EXTERN float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
IFX_EXTERN void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
IFX_EXTERN void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...
IFX_INLINE void | IfxSent_initSentPin (const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input. More...
IFX_INLINE void | IfxSent_initSpcPin (const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output. More...
IFX_INLINE void | IfxSent_setWatchDogTimerLimit (Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
Set the watch dog timer limit value for sent channel. More...
IFX_INLINE boolean | IfxSent_isModuleEnabled (Ifx_SENT *sent)
Return TRUE if SENT module is enabled. More...
IFX_INLINE boolean | IfxSent_getInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Return the Interrupt Status of the SENT channel. More...
IFX_INLINE void | IfxSent_clearInterruptStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
IFX_INLINE uint32 | IfxSent_readReceivedData (Ifx_SENT *sent, IfxSent_ChannelId channelId)
IFX_INLINE uint32 | IfxSent_readReceivedStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Reads and returns value in RSR (Received Status Register). More...
IFX_INLINE uint8 | IfxSent_readReceivedCrc (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit CRC value in Receive Status Register. More...
IFX_INLINE uint8 | IfxSent_readReceivedChannelStatus (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 2 bit CST value in Receive Status Register. More...
IFX_INLINE uint8 | IfxSent_readReceivedStatusAndCommunicationNibble (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit SCN value in Receive Status Register. More...
IFX_INLINE uint32 | IfxSent_readReceivedTimeStamp (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 32 bit Received Time Stamp Value. More...
IFX_INLINE uint8 | IfxSent_readSpcPulseLength (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit PLEN value in SCR Register. More...
IFX_INLINE uint8 | IfxSent_readSpcDelayLength (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit Delay length value in SCR Register. More...
IFX_EXTERN float32 | IfxSent_getChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel. More...

Detailed Description

SENT basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSent.h.

Macro Definition Documentation

◆ IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS

#define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)

Definition at line 58 of file IfxSent.h.

Enumeration Type Documentation

◆ IfxSent_InterruptSource

enum IfxSent_InterruptSource

Sent Interrupt Source.

Enumerator
IfxSent_InterruptSource_rsi | Enable Interrupt Request RSI.
IfxSent_InterruptSource_rdi | Enable Interrupt Request RDI.
IfxSent_InterruptSource_rbi | Enable Interrupt Request RBI.
IfxSent_InterruptSource_tdi | Enable Interrupt Request TDI.
IfxSent_InterruptSource_tbi | Enable Interrupt Request TBI.
IfxSent_InterruptSource_fri | Enable Interrupt Request FRI.
IfxSent_InterruptSource_fdi | Enable Interrupt Request FDI.
IfxSent_InterruptSource_nni | Enable Interrupt Request NNI.
IfxSent_InterruptSource_nvi | Enable Interrupt Request NVI.
IfxSent_InterruptSource_crci | Enable Interrupt Request crci.
IfxSent_InterruptSource_wsi | Enable Interrupt Request wsi.
IfxSent_InterruptSource_sdi | Enable Interrupt Request sdi.
IfxSent_InterruptSource_scri | Enable Interrupt Request scri.
IfxSent_InterruptSource_wdi | Enable Interrupt Request wdi.

Definition at line 236 of file IfxSent.h.

Function Documentation

◆ IfxSent_clearInterruptStatus()

IFX_INLINE void IfxSent_clearInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_InterruptSource | source
 | ) |  |
Parameters
sent | base address of the SENT register space
channelId | SENT channel number
source | enable the interrupt source of any interrupt of SENT Channel
Returns
None

Definition at line 709 of file IfxSent.h.

◆ IfxSent_getChannelUnitTime()

IFX_EXTERN float32 IfxSent_getChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns the current unit time (f_tick) of the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The current unit time in seconds

Definition at line 36 of file IfxSent.c.

◆ IfxSent_getInterruptStatus()

IFX_INLINE boolean IfxSent_getInterruptStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | IfxSent_InterruptSource | source
 | ) |  |

Return the Interrupt Status of the SENT channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
source | enable the interrupt source of any interrupt of SENT Channel
Returns
The Interrupt Status of SENT channel

Definition at line 703 of file IfxSent.h.

◆ IfxSent_isModuleEnabled()

IFX_INLINE boolean IfxSent_isModuleEnabled ( Ifx_SENT * sent )

Return TRUE if SENT module is enabled.

Parameters
sent base address of the SENT register space
Returns
The status of whether clock for sent is enabled or disabled

Definition at line 697 of file IfxSent.h.

Referenced by IfxSent_Sent_initModule().

◆ IfxSent_readReceivedChannelStatus()

IFX_INLINE uint8 IfxSent_readReceivedChannelStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 2 bit CST value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
2 bit CST

Definition at line 733 of file IfxSent.h.

◆ IfxSent_readReceivedCrc()

IFX_INLINE uint8 IfxSent_readReceivedCrc | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 4 bit CRC value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
4 bit CRC

Definition at line 727 of file IfxSent.h.

◆ IfxSent_readReceivedData()

IFX_INLINE uint32 IfxSent_readReceivedData | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |
Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The Data content of a recieved Data Frame

Definition at line 715 of file IfxSent.h.

◆ IfxSent_readReceivedStatus()

IFX_INLINE uint32 IfxSent_readReceivedStatus | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Reads and returns value in RSR (Received Status Register).

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
Returns 32 bit RSR

Definition at line 721 of file IfxSent.h.

◆ IfxSent_readReceivedStatusAndCommunicationNibble()

IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 4 bit SCN value in Receive Status Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
4 bit SCN

Definition at line 739 of file IfxSent.h.

◆ IfxSent_readReceivedTimeStamp()

IFX_INLINE uint32 IfxSent_readReceivedTimeStamp | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 32 bit Received Time Stamp Value.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
32 bit Time Stamp

Definition at line 745 of file IfxSent.h.

◆ IfxSent_readSpcDelayLength()

IFX_INLINE uint8 IfxSent_readSpcDelayLength | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 6 bit Delay length value in SCR Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
6 bit DEL

Definition at line 757 of file IfxSent.h.

◆ IfxSent_readSpcPulseLength()

IFX_INLINE uint8 IfxSent_readSpcPulseLength | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns 6 bit PLEN value in SCR Register.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
6 bit PLEN

Definition at line 751 of file IfxSent.h.

◆ IfxSent_setWatchDogTimerLimit()

IFX_INLINE void IfxSent_setWatchDogTimerLimit | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId,
 |  | uint16 | watchDogTimerLimit
 | ) |  |

Set the watch dog timer limit value for sent channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
watchDogTimerLimit | Specifies the watch dog timer limit value.
Returns
None

Definition at line 691 of file IfxSent.h.


iLLD_TC26B: SMU

Modules | Files
SMU
iLLD
Collaboration diagram for SMU:

Modules

Implementation
Standard Driver
SMU Pin Mapping

Files

file | IfxSmu_cfg.h
SMU on-chip implementation data.
file | IfxSmu_PinMap.c
SMU I/O map.
file | IfxSmu_PinMap.h
SMU I/O map.
file | IfxSmu.h
SMU basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » SMU
Collaboration diagram for Implementation:

Modules

Alarm Group Enumeration
List of Alarms Enumeration

Detailed Description


iLLD_TC26B: Alarm Group Enumeration

Enumerations
Alarm Group Enumeration
iLLD » SMU » Implementation
Collaboration diagram for Alarm Group Enumeration:

Enumerations

enum IfxSmu_AlarmGroup {
IfxSmu_AlarmGroup_0 = 0,
IfxSmu_AlarmGroup_1,
IfxSmu_AlarmGroup_2,
IfxSmu_AlarmGroup_3,
IfxSmu_AlarmGroup_4,
IfxSmu_AlarmGroup_5,
IfxSmu_AlarmGroup_6
}
Alarm group
More...
enum IfxSmu_RecoveryTimer {
IfxSmu_RecoveryTimer_0 = 0,
IfxSmu_RecoveryTimer_1
}
Recovery Timer
More...

Detailed Description

Enumeration Type Documentation

◆ IfxSmu_AlarmGroup

enum IfxSmu_AlarmGroup

Alarm group

Enumerator
IfxSmu_AlarmGroup_0 | Alarm group 0.
IfxSmu_AlarmGroup_1 | Alarm group 1.
IfxSmu_AlarmGroup_2 | Alarm group 2.
IfxSmu_AlarmGroup_3 | Alarm group 3.
IfxSmu_AlarmGroup_4 | Alarm group 4.
IfxSmu_AlarmGroup_5 | Alarm group 5.
IfxSmu_AlarmGroup_6 | Alarm group 6.

Definition at line 60 of file IfxSmu_cfg.h.

◆ IfxSmu_RecoveryTimer

enum IfxSmu_RecoveryTimer

Recovery Timer

Enumerator
IfxSmu_RecoveryTimer_0 | Recovery Timer 0.
IfxSmu_RecoveryTimer_1 | Recovery Timer 1.

Definition at line 73 of file IfxSmu_cfg.h.


iLLD_TC26B: List of Alarms Enumeration

Enumerations
List of Alarms Enumeration
iLLD » SMU » Implementation
Collaboration diagram for List of Alarms Enumeration:

Enumerations

enum IfxSmu_Alarm {
IfxSmu_Alarm_Cpu0LockstepComparatorError = (IfxSmu_AlarmGroup_0 << 8) | 0,
IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_0 << 8) | 1,
IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 3,
IfxSmu_Alarm_Cpu0PcacheTagAddressError = (IfxSmu_AlarmGroup_0 << 8) | 4,
IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 5,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 6,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 7,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 8,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 9,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 10,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 11,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 12,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 13,
IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_0 << 8) | 19,
IfxSmu_Alarm_Cpu1LockstepComparatorError = (IfxSmu_AlarmGroup_1 << 8) |0,
IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_1 << 8) |1,
IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |3,
IfxSmu_Alarm_Cpu1PcacheTagAddressError = (IfxSmu_AlarmGroup_1 << 8) |4,
IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |5,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |6,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |7,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |8,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |9,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |10,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |11,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |12,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |13,
IfxSmu_Alarm_Cpu1DcacheTagSramCorrection = (IfxSmu_AlarmGroup_1 << 8) |14,
IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |15,
IfxSmu_Alarm_Cpu1DcacheTagSramAddressError = (IfxSmu_AlarmGroup_1 << 8) |16,
IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |17,
IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |18,
IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |19,
IfxSmu_Alarm_PmuSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 2,
IfxSmu_Alarm_PmuDoubleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 3,
IfxSmu_Alarm_PmuNonCorrectableMultipleBit = (IfxSmu_AlarmGroup_2 << 8) | 4,
IfxSmu_Alarm_PmuAddressingError = (IfxSmu_AlarmGroup_2 << 8) | 5,
IfxSmu_Alarm_PmuAddressBufferFull = (IfxSmu_AlarmGroup_2 << 8) | 6,
IfxSmu_Alarm_PmuPflashEccError = (IfxSmu_AlarmGroup_2 << 8) | 7,
IfxSmu_Alarm_PmuEdcComparatorError = (IfxSmu_AlarmGroup_2 << 8) | 8,
IfxSmu_Alarm_LmuEccError = (IfxSmu_AlarmGroup_2 << 8) | 15,
IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError = (IfxSmu_AlarmGroup_2 << 8) | 16,
IfxSmu_Alarm_LmuSramSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 17,
IfxSmu_Alarm_LmuSramUncorrectableError = (IfxSmu_AlarmGroup_2 << 8) | 18,
IfxSmu_Alarm_LmuSramAddressError = (IfxSmu_AlarmGroup_2 << 8) | 19,
IfxSmu_Alarm_LmuSramAddressBufferOverflow = (IfxSmu_AlarmGroup_2 << 8) | 20,
IfxSmu_Alarm_SriEdcAddressPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 21,
IfxSmu_Alarm_SriEdcWritePhaseError = (IfxSmu_AlarmGroup_2 << 8) | 22,
IfxSmu_Alarm_SriEdcReadPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 23,
IfxSmu_Alarm_IrEdcError = (IfxSmu_AlarmGroup_2 << 8) | 25,
IfxSmu_Alarm_IomPinMismatchIndication = (IfxSmu_AlarmGroup_2 << 8) | 26,
IfxSmu_Alarm_SmuTimer0TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 29,
IfxSmu_Alarm_SmuTimer1TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 30,
IfxSmu_Alarm_SmuErrorPinFaultStateActivation = (IfxSmu_AlarmGroup_2 << 8) | 31,
IfxSmu_Alarm_ScuCguInputClockOutOfRange = (IfxSmu_AlarmGroup_3 << 8) | 0,
IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 1,
IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 2,
IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 3,
IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 4,
IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 5,
IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 6,
IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 7,
IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 8,
IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 9,
IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 11,
IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 12,
IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 13,
IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 14,
IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 15,
IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 16,
IfxSmu_Alarm_ScuWdtsWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 17,
IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 18,
IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 19,
IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 20,
IfxSmu_Alarm_ScuWdtWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 21,
IfxSmu_Alarm_SpbAccessEnableError = (IfxSmu_AlarmGroup_3 << 8) | 22,
IfxSmu_Alarm_ScuDtsTemperatureUnderflow = (IfxSmu_AlarmGroup_3 << 8) | 25,
IfxSmu_Alarm_ScuDtsTemperatureOverflow = (IfxSmu_AlarmGroup_3 << 8) | 26,
IfxSmu_Alarm_ScuExternalEmergencyStopSignal = (IfxSmu_AlarmGroup_3 << 8) | 29,
IfxSmu_Alarm_SriBusError = (IfxSmu_AlarmGroup_3 << 8) | 30,
IfxSmu_Alarm_SpbBusError = (IfxSmu_AlarmGroup_3 << 8) | 31,
IfxSmu_Alarm_GtmSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 0,
IfxSmu_Alarm_GtmSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 1,
IfxSmu_Alarm_GtmSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 2,
IfxSmu_Alarm_GtmSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 3,
IfxSmu_Alarm_CanSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 4,
IfxSmu_Alarm_CanSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 5,
IfxSmu_Alarm_CanSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 6,
IfxSmu_Alarm_CanSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 7,
IfxSmu_Alarm_FlexraySramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 8,
IfxSmu_Alarm_FlexraySramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 9,
IfxSmu_Alarm_FlexraySramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 10,
IfxSmu_Alarm_FlexraySramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 11,
IfxSmu_Alarm_EmemSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 12,
IfxSmu_Alarm_EmemSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 13,
IfxSmu_Alarm_EmemSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 15,
IfxSmu_Alarm_SramsSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 16,
IfxSmu_Alarm_SramsSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 17,
IfxSmu_Alarm_SramsSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 18,
IfxSmu_Alarm_SramsSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 19,
IfxSmu_Alarm_SoftwareAlarm0 = (IfxSmu_AlarmGroup_5 << 8) | 0,
IfxSmu_Alarm_SoftwareAlarm1 = (IfxSmu_AlarmGroup_5 << 8) | 1,
IfxSmu_Alarm_SoftwareAlarm2 = (IfxSmu_AlarmGroup_5 << 8) | 2,
IfxSmu_Alarm_SoftwareAlarm3 = (IfxSmu_AlarmGroup_5 << 8) | 3,
IfxSmu_Alarm_SoftwareAlarm4 = (IfxSmu_AlarmGroup_5 << 8) | 4,
IfxSmu_Alarm_SoftwareAlarm5 = (IfxSmu_AlarmGroup_5 << 8) | 5,
IfxSmu_Alarm_SoftwareAlarm6 = (IfxSmu_AlarmGroup_5 << 8) | 6,
IfxSmu_Alarm_SoftwareAlarm7 = (IfxSmu_AlarmGroup_5 << 8) | 7,
IfxSmu_Alarm_SoftwareAlarm8 = (IfxSmu_AlarmGroup_5 << 8) | 8,
IfxSmu_Alarm_SoftwareAlarm9 = (IfxSmu_AlarmGroup_5 << 8) | 9,
IfxSmu_Alarm_SoftwareAlarm10 = (IfxSmu_AlarmGroup_5 << 8) | 10,
IfxSmu_Alarm_SoftwareAlarm11 = (IfxSmu_AlarmGroup_5 << 8) | 11,
IfxSmu_Alarm_SoftwareAlarm12 = (IfxSmu_AlarmGroup_5 << 8) | 12,
IfxSmu_Alarm_SoftwareAlarm13 = (IfxSmu_AlarmGroup_5 << 8) | 13,
IfxSmu_Alarm_SoftwareAlarm14 = (IfxSmu_AlarmGroup_5 << 8) | 14,
IfxSmu_Alarm_SoftwareAlarm15 = (IfxSmu_AlarmGroup_5 << 8) | 15,
IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_6 << 8) | 1,
IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 3,
IfxSmu_Alarm_Cpu2PcacheTagAddressError = (IfxSmu_AlarmGroup_6 << 8) | 4,
IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 5,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 6,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 7,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 8,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 9,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 10,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 11,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 12,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 13,
IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 14,
IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 15,
IfxSmu_Alarm_Cpu2DcacheTagSramAddressError = (IfxSmu_AlarmGroup_6 << 8) | 16,
IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 17,
IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 18,
IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 19,
IfxSmu_Alarm_noAlarm
}
SMU Alarm list
More...

Detailed Description

Enumeration Type Documentation

◆ IfxSmu_Alarm

enum IfxSmu_Alarm

SMU Alarm list

Enumerator
IfxSmu_Alarm_Cpu0LockstepComparatorError | CPU0 Lockstep Comparator Error.
IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection | CPU0 Bus-level MPU violation / Access Protection violation.
IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError | CPU0 PCACHE TAG uncorrectable error.
IfxSmu_Alarm_Cpu0PcacheTagAddressError | CPU0 PCACHE TAG address error.
IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow | CPU0 PCACHE TAG Address Buffer overflow.
IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection | CPU0 Unified PCACHE/PSPR single-bit correction.
IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError | CPU0 Unified PCACHE/PSPR uncorrectable error.
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError | CPU0 Unified PCACHE/PSPR Address error.
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow | CPU0 Unified PCACHE/PSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection | CPU0 Unified DCACHE/DSPR single-bit correction.
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError | CPU0 Unified DCACHE/DSPR uncorrectable error.
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError | CPU0 Unified DCACHE/DSPR address error.
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow | CPU0 Unified DCACHE/DSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError | CPU0 CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_Cpu1LockstepComparatorError | CPU1 Lockstep Comparator Error.
IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection | CPU1 Bus-level MPU violation / Access Protection violation.
IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError | CPU1 PCACHE TAG uncorrectable error.
IfxSmu_Alarm_Cpu1PcacheTagAddressError | CPU1 PCACHE TAG address error.
IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow | CPU1 PCACHE TAG Address Buffer overflow.
IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection | CPU1 Unified PCACHE/PSPR single-bit correction.
IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError | CPU1 Unified PCACHE/PSPR uncorrectable error.
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError | CPU1 Unified PCACHE/PSPR Address error.
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow | CPU1 Unified PCACHE/PSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection | CPU1 Unified DCACHE/DSPR single-bit correction.
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError | CPU1 Unified DCACHE/DSPR uncorrectable error.
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError | CPU1 Unified DCACHE/DSPR address error.
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow | CPU1 Unified DCACHE/DSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu1DcacheTagSramCorrection | CPU1 DCACHE TAG SRAM correction.
IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError | CPU1 DCACHE TAG SRAM uncorrectable error.
IfxSmu_Alarm_Cpu1DcacheTagSramAddressError | CPU1 DCACHE TAG SRAM address error.
IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow | CPU1 DCACHE TAG SRAM address buffer overflow.
IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError | CPU1 CPU Instruction Fetch SRI Interface EDC Error.
IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError | CPU1 CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_PmuSingleBitCorrection | PMU single bit correction.
IfxSmu_Alarm_PmuDoubleBitCorrection | PMU double bit correction.
IfxSmu_Alarm_PmuNonCorrectableMultipleBit | PMU non correctable multiple bit.
IfxSmu_Alarm_PmuAddressingError | PMU Addressing error.
IfxSmu_Alarm_PmuAddressBufferFull | PMU address buffer full.
IfxSmu_Alarm_PmuPflashEccError | PMU PFLASH ECC error.
IfxSmu_Alarm_PmuEdcComparatorError | PMU EDC comparator error.
IfxSmu_Alarm_LmuEccError | LMU ECC Error.
IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError | LMU Register Access Protection error / Bus-level MPU error.
IfxSmu_Alarm_LmuSramSingleBitCorrection | LMU SRAM single-bit correction.
IfxSmu_Alarm_LmuSramUncorrectableError | LMU SRAM uncorrectable error.
IfxSmu_Alarm_LmuSramAddressError | LMU SRAM Address error.
IfxSmu_Alarm_LmuSramAddressBufferOverflow | LMU SRAM Address buffer overflow.
IfxSmu_Alarm_SriEdcAddressPhaseError | SRI EDC Address phase error.
IfxSmu_Alarm_SriEdcWritePhaseError | SRI EDC Write phase error.
IfxSmu_Alarm_SriEdcReadPhaseError | SRI EDC Read phase error.
IfxSmu_Alarm_IrEdcError | IR EDC error.
IfxSmu_Alarm_IomPinMismatchIndication | IOM Pin Mismatch Indication.
IfxSmu_Alarm_SmuTimer0TimeOut | SMU Timer 0 time-out.
IfxSmu_Alarm_SmuTimer1TimeOut | SMU Timer 1 time-out.
IfxSmu_Alarm_SmuErrorPinFaultStateActivation | SMU ErrorPin Fault State Activation.
IfxSmu_Alarm_ScuCguInputClockOutOfRange | SCU/CGU input clock out of range.
IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent | SCU/CGU System PLL VCO Loss-of-Lock Event.
IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent | SCU/CGU PLL_ERAY VCO Loss-of-Lock Event.
IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency | SCU/CGU STM clock out of range frequency.
IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency | SCU/CGU PLL_ERAY out of range frequency.
IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency | SCU/CGU System PLL out of range frequency.
IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency | SCU/CGU SRI clock out of range frequency.
IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency | SCU/CGU SPB clock out of range frequency.
IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency | SCU/CGU GTM clock out of range frequency.
IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency | SCU/CGU ADC clock out of range frequency.
IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage | SCU/EVR EVR 1.3V under voltage.
IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage | SCU/EVR EVR 1.3V over voltage.
IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage | SCU/EVR EVR 3.3V under voltage.
IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage | SCU/EVR EVR 3.3V over voltage.
IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage | SCU/EVR External Supply under voltage.
IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage | SCU/EVR External Supply over voltage.
IfxSmu_Alarm_ScuWdtsWatchdogTimeOut | SCU/WDTS watchdog time-out.
IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut | SCU/WDTCPU0 watchdog time-out.
IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut | SCU/WDTCPU1 watchdog time-out.
IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut | SCU/WDTCPU2 watchdog time-out.
IfxSmu_Alarm_ScuWdtWatchdogTimeOut | SCU/WDT watchdog time-out.
IfxSmu_Alarm_SpbAccessEnableError | SPB Access Enable Error.
IfxSmu_Alarm_ScuDtsTemperatureUnderflow | SCU/DTS Temperature underflow.
IfxSmu_Alarm_ScuDtsTemperatureOverflow | SCU/DTS Temperature overflow.
IfxSmu_Alarm_ScuExternalEmergencyStopSignal | SCU External Emergency Stop Signal.
IfxSmu_Alarm_SriBusError | SRI Bus error.
IfxSmu_Alarm_SpbBusError | SPB Bus error.
IfxSmu_Alarm_GtmSramSingleBitCorrection | GTM SRAM single-bit correction.
IfxSmu_Alarm_GtmSramUncorrectableError | GTM SRAM uncorrectable error.
IfxSmu_Alarm_GtmSramAddressError | GTM SRAM address error.
IfxSmu_Alarm_GtmSramAddressBufferOverflow | GTM SRAM Address Buffer overflow.
IfxSmu_Alarm_CanSramSingleBitCorrection | CAN SRAM single-bit correction.
IfxSmu_Alarm_CanSramUncorrectableError | CAN SRAM uncorrectable error.
IfxSmu_Alarm_CanSramAddressError | CAN SRAM address error.
IfxSmu_Alarm_CanSramAddressBufferOverflow | CAN SRAM Address Buffer overflow.
IfxSmu_Alarm_FlexraySramSingleBitCorrection | FLEXRAY SRAM single-bit correction.
IfxSmu_Alarm_FlexraySramUncorrectableError | FLEXRAY SRAM uncorrectable error.
IfxSmu_Alarm_FlexraySramAddressError | FLEXRAY SRAM address error.
IfxSmu_Alarm_FlexraySramAddressBufferOverflow | FLEXRAY SRAM Address Buffer overflow.
IfxSmu_Alarm_EmemSramSingleBitCorrection | EMEM SRAM single-bit correction.
IfxSmu_Alarm_EmemSramUncorrectableError | EMEM SRAM uncorrectable error.
IfxSmu_Alarm_EmemSramAddressBufferOverflow | EMEM SRAM Address Buffer overflow.
IfxSmu_Alarm_SramsSramSingleBitCorrection | SRAMs SRAM single-bit correction.
IfxSmu_Alarm_SramsSramUncorrectableError | SRAMs SRAM uncorrectable error.
IfxSmu_Alarm_SramsSramAddressError | SRAMs SRAM address error.
IfxSmu_Alarm_SramsSramAddressBufferOverflow | SRAMs SRAM Address Buffer overflow.
IfxSmu_Alarm_SoftwareAlarm0 | Software Alarm 0.
IfxSmu_Alarm_SoftwareAlarm1 | Software Alarm 1.
IfxSmu_Alarm_SoftwareAlarm2 | Software Alarm 2.
IfxSmu_Alarm_SoftwareAlarm3 | Software Alarm 3.
IfxSmu_Alarm_SoftwareAlarm4 | Software Alarm 4.
IfxSmu_Alarm_SoftwareAlarm5 | Software Alarm 5.
IfxSmu_Alarm_SoftwareAlarm6 | Software Alarm 6.
IfxSmu_Alarm_SoftwareAlarm7 | Software Alarm 7.
IfxSmu_Alarm_SoftwareAlarm8 | Software Alarm 8.
IfxSmu_Alarm_SoftwareAlarm9 | Software Alarm 9.
IfxSmu_Alarm_SoftwareAlarm10 | Software Alarm 10.
IfxSmu_Alarm_SoftwareAlarm11 | Software Alarm 11.
IfxSmu_Alarm_SoftwareAlarm12 | Software Alarm 12.
IfxSmu_Alarm_SoftwareAlarm13 | Software Alarm 13.
IfxSmu_Alarm_SoftwareAlarm14 | Software Alarm 14.
IfxSmu_Alarm_SoftwareAlarm15 | Software Alarm 15.
IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection | CPU2 Bus-level MPU violation / Access Protection violation.
IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError | CPU2 PCACHE TAG uncorrectable error.
IfxSmu_Alarm_Cpu2PcacheTagAddressError | CPU2 PCACHE TAG address error.
IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow | CPU2 PCACHE TAG Address Buffer overflow.
IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection | CPU2 Unified PCACHE/PSPR single-bit correction.
IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError | CPU2 Unified PCACHE/PSPR uncorrectable error.
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError | CPU2 Unified PCACHE/PSPR Address error.
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow | CPU2 Unified PCACHE/PSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection | CPU2 Unified DCACHE/DSPR single-bit correction.
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError | CPU2 Unified DCACHE/DSPR uncorrectable error.
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError | CPU2 Unified DCACHE/DSPR address error.
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow | CPU2 Unified DCACHE/DSPR Address Buffer overflow.
IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection | CPU2 DCACHE TAG SRAM single-bit correction.
IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError | CPU2 DCACHE TAG SRAM uncorrectable error.
IfxSmu_Alarm_Cpu2DcacheTagSramAddressError | CPU2 DCACHE TAG SRAM Address error.
IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow | CPU2 DCACHE TAG SRAM Address buffer overflow.
IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError | CPU2 CPU Instruction Fetch SRI Interface EDC Error.
IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError | CPU2 CPU Data SRI Interface (Load/Store) EDC Error.
IfxSmu_Alarm_noAlarm | Special flag to inform about no alarm (Software only)

Definition at line 85 of file IfxSmu_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » SMU
Collaboration diagram for Standard Driver:

Modules

FSP Functions
SMU Functions
Data Structures

Detailed Description


iLLD_TC26B: FSP Functions

Functions
FSP Functions
iLLD » SMU » Standard Driver
Collaboration diagram for FSP Functions:

Functions

IFX_INLINE boolean | IfxSmu_releaseFsp (Ifx_SMU *smu)
Turns the FSP into the fault free state. More...
IFX_INLINE void | IfxSmu_initFspConfig (IfxSmu_configFsp *config)
Initialize the FSP configuartion to default. More...
IFX_INLINE boolean | IfxSmu_activateFsp (Ifx_SMU *smu)
Activates the Fault Signaling Protocol. More...
IFX_EXTERN boolean | IfxSmu_initFsp (Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP. More...
IFX_EXTERN float32 | IfxSmu_getFspFaultFreeFrequency (Ifx_SMU *smu)
Return FSP frequency (Time switching only) More...
IFX_EXTERN float32 | IfxSmu_getFspFaultStateTime (Ifx_SMU *smu)
Return the minimal fault state time. More...
IFX_EXTERN void | IfxSmu_enableAlarmFsp (Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration. More...

Detailed Description

Function Documentation

◆ IfxSmu_activateFsp()

IFX_INLINE boolean IfxSmu_activateFsp ( Ifx_SMU * smu )

Activates the Fault Signaling Protocol.

Parameters
smu Pointer to SMU module registers

Definition at line 318 of file IfxSmu.h.

◆ IfxSmu_enableAlarmFsp()

IFX_EXTERN void IfxSmu_enableAlarmFsp | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm,
 |  | boolean | enabled
 | ) |  |

Set the alarm FSP configuration.

Parameters
smu | Pointer to SMU Module Registers
alarm | Alarm to be configured
enabled | If TRUE, the alarm event triggers the FSP, else no action
Returns
None

Definition at line 248 of file IfxSmu.c.

◆ IfxSmu_getFspFaultFreeFrequency()

IFX_EXTERN float32 IfxSmu_getFspFaultFreeFrequency ( Ifx_SMU * smu )

Return FSP frequency (Time switching only)

Parameters
smu Pointer to SMU module registers

Definition at line 167 of file IfxSmu.c.

◆ IfxSmu_getFspFaultStateTime()

IFX_EXTERN float32 IfxSmu_getFspFaultStateTime ( Ifx_SMU * smu )

Return the minimal fault state time.

Parameters
smu Pointer to SMU module registers

Definition at line 176 of file IfxSmu.c.

◆ IfxSmu_initFsp()

IFX_EXTERN boolean IfxSmu_initFsp | ( | Ifx_SMU * | smu,
 |  | IfxSmu_configFsp * | config
 | ) |  |

Initialize the FSP.

Fault state time >= tFSP_FS = tSMU_FS *(SMU_FSP.TFSP_HIGH[] & SMU_FSP.TFSP_LOW[] + 1) with tSMU_FS = <SMU_FSP.PRE1>. SMU_FSP.TFSP_HIGH[] / fBACK and SMU_FSP.PRE1 should enable tFSP_FS >= 500ms (Ref: TC27xC UM v2.2: SMU_FSP.TFSP_HIGH) Fault free state period (Time switching only) = tSMU_FFS = fBACK / <SMU_FSP.PRE2>

Note: TSMU_FS * SMU_FSP.TFSP_LOW > 250us

Parameters
smu | Pointer to SMU module registers
config | FSP Configuration Structure

Definition at line 36 of file IfxSmu.c.

◆ IfxSmu_initFspConfig()

IFX_INLINE void IfxSmu_initFspConfig ( IfxSmu_configFsp * config )

Initialize the FSP configuartion to default.

Parameters
config FSP Configuration Structure
Returns
None

Definition at line 307 of file IfxSmu.h.

◆ IfxSmu_releaseFsp()

IFX_INLINE boolean IfxSmu_releaseFsp ( Ifx_SMU * smu )

Turns the FSP into the fault free state.

Parameters
smu Pointer to SMU module registers

Definition at line 301 of file IfxSmu.h.


iLLD_TC26B: SMU Functions

Functions
SMU Functions
iLLD » SMU » Standard Driver
Collaboration diagram for SMU Functions:

Functions

IFX_INLINE boolean | IfxSmu_activatePes (Ifx_SMU *smu)
Triggers the activation of the Port Emergency Stop (PES). More...
IFX_INLINE boolean | IfxSmu_stopRecoveryTimer (Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product. More...
IFX_INLINE boolean | IfxSmu_enableClearAlarmStatus (Ifx_SMU *smu)
Alarm Status Clear Enable Command. More...
IFX_INLINE boolean | IfxSmu_triggerAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping". More...
IFX_INLINE boolean | IfxSmu_start (Ifx_SMU *smu)
Forces the SSM to go to the RUN state from the START state. More...
IFX_EXTERN boolean | IfxSmu_cmd (Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers. More...
IFX_EXTERN boolean | IfxSmu_unlock (Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_lock (Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_lockForever (Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_setAlarmConfig (Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration. More...
IFX_EXTERN boolean | IfxSmu_isAlarmSet (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status. More...
IFX_EXTERN IfxSmu_Alarm | IfxSmu_getAlarm (Ifx_SMU *smu)
Get the alarm flag. More...
IFX_EXTERN void | IfxSmu_clearAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag. More...

Detailed Description

Function Documentation

◆ IfxSmu_activatePes()

IFX_INLINE boolean IfxSmu_activatePes ( Ifx_SMU * smu )

Triggers the activation of the Port Emergency Stop (PES).

Parameters
smu Pointer to SMU module registers

Definition at line 269 of file IfxSmu.h.

◆ IfxSmu_clearAlarm()

IFX_EXTERN void IfxSmu_clearAlarm | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm
 | ) |  |

Clear the alarm flag.

Parameters
smu | Pointer to SMU Module Registers
alarm | Alarm for which the flag should be cleared
Returns
None

Definition at line 291 of file IfxSmu.c.

◆ IfxSmu_cmd()

IFX_EXTERN boolean IfxSmu_cmd | ( | Ifx_SMU * | smu,
 |  | uint8 | cmd,
 |  | uint8 | arg
 | ) |  |

Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers.

Parameters
smu | Pointer to SMU module registers
cmd | SMU Command
arg | Argument to be used with the command

Definition at line 147 of file IfxSmu.c.

Referenced by IfxSmu_activateFsp(), IfxSmu_activatePes(), IfxSmu_enableClearAlarmStatus(), IfxSmu_releaseFsp(), IfxSmu_start(), IfxSmu_stopRecoveryTimer(), and IfxSmu_triggerAlarm().

◆ IfxSmu_enableClearAlarmStatus()

IFX_INLINE boolean IfxSmu_enableClearAlarmStatus ( Ifx_SMU * smu )

Alarm Status Clear Enable Command.

Parameters
smu Pointer to SMU module registers

Definition at line 281 of file IfxSmu.h.

◆ IfxSmu_getAlarm()

IFX_EXTERN IfxSmu_Alarm IfxSmu_getAlarm ( Ifx_SMU * smu )

Get the alarm flag.

Parameters
smu Pointer to SMU Module Registers
Returns
Return the next set alarm, if no alarm is set , return IfxSmu_Alarm_noAlarm

Definition at line 272 of file IfxSmu.c.

◆ IfxSmu_isAlarmSet()

IFX_EXTERN boolean IfxSmu_isAlarmSet | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm
 | ) |  |

Return the alarm status.

Parameters
smu | Pointer to SMU Module Registers
alarm | Alarm for which to return the status
Returns
TRUE means the alarm is set and FALSE means the alarm is not set.

Definition at line 263 of file IfxSmu.c.

◆ IfxSmu_lock()

IFX_EXTERN void IfxSmu_lock ( Ifx_SMU * smu )

Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.

Parameters
smu Pointer to SMU module registers
Returns
None

Definition at line 209 of file IfxSmu.c.

Referenced by IfxSmu_initFsp().

◆ IfxSmu_lockForever()

IFX_EXTERN void IfxSmu_lockForever ( Ifx_SMU * smu )

Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.

Parameters
smu Pointer to SMU module registers
Returns
None

Definition at line 219 of file IfxSmu.c.

◆ IfxSmu_setAlarmConfig()

IFX_EXTERN void IfxSmu_setAlarmConfig | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm,
 |  | IfxSmu_AlarmConfig | config
 | ) |  |

Set the SMU alarm configuration.

Parameters
smu | Pointer to SMU module registers
alarm | Alarm to be configured
config | Alarm configuration
Returns
None

Definition at line 229 of file IfxSmu.c.

◆ IfxSmu_start()

IFX_INLINE boolean IfxSmu_start ( Ifx_SMU * smu )

Forces the SSM to go to the RUN state from the START state.

Parameters
smu Pointer to SMU module registers

Definition at line 295 of file IfxSmu.h.

◆ IfxSmu_stopRecoveryTimer()

IFX_INLINE boolean IfxSmu_stopRecoveryTimer | ( | Ifx_SMU * | smu,
 |  | IfxSmu_RecoveryTimer | timer
 | ) |  |

Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product.

Parameters
smu | Pointer to SMU module registers
timer | Recovery Timer

Definition at line 275 of file IfxSmu.h.

◆ IfxSmu_triggerAlarm()

IFX_INLINE boolean IfxSmu_triggerAlarm | ( | Ifx_SMU * | smu,
 |  | IfxSmu_Alarm | alarm
 | ) |  |

Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping".

Parameters
smu | Pointer to SMU module registers
alarm | Alarm list

Definition at line 287 of file IfxSmu.h.

◆ IfxSmu_unlock()

IFX_EXTERN boolean IfxSmu_unlock ( Ifx_SMU * smu )

Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.

Parameters
smu Pointer to SMU module registers

Definition at line 187 of file IfxSmu.c.

Referenced by IfxSmu_initFsp().


iLLD_TC26B: Data Structures

Data Structures | Enumerations
Data Structures
iLLD » SMU » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxSmu_configFsp
FSP Configuration Structure. More...

Enumerations

enum IfxSmu_AlarmConfig {
IfxSmu_AlarmConfig_noAction = 0,
IfxSmu_AlarmConfig_interruptSet0 = 2,
IfxSmu_AlarmConfig_interruptSet1 = 3,
IfxSmu_AlarmConfig_interruptSet2 = 4,
IfxSmu_AlarmConfig_nmi = 5,
IfxSmu_AlarmConfig_scuReset = 6,
IfxSmu_AlarmConfig_cpuIdle = 7
}
SMU Alarm Configuration Ifx_SMU.AGCF[][]. More...
enum IfxSmu_Cmd {
IfxSmu_Cmd_start = 0,
IfxSmu_Cmd_activateFsp = 1,
IfxSmu_Cmd_releaseFsp = 2,
IfxSmu_Cmd_activatePes = 3,
IfxSmu_Cmd_stopRecoveryTimer = 4,
IfxSmu_Cmd_enableClearAlarmStatus = 5,
IfxSmu_Cmd_triggerAlarm = 6
}
SMU Commands. More...
enum IfxSmu_Fsp_Mode {
IfxSmu_Fsp_Mode_bistable,
IfxSmu_Fsp_Mode_timeSwitching
}

Detailed Description

Data Structure Documentation

◆ IfxSmu_configFsp

struct IfxSmu_configFsp

FSP Configuration Structure.

Definition at line 96 of file IfxSmu.h.

Data Fields
boolean | emergencyStopEnabled | If TRUE, the emergency stop port is triggered on FSP fault state.
boolean | enableFaultToRunStateTransition | Enable Fault to Run State Transition.
float32 | faultFreeStateFrequencyMax | Max fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
float32 | faultFreeStateFrequencyMin | Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
float32 | faultStateTime | Minimal fault state time in sec.
IfxSmu_Fsp_Mode | mode | FSP mode.

Enumeration Type Documentation

◆ IfxSmu_AlarmConfig

enum IfxSmu_AlarmConfig

SMU Alarm Configuration Ifx_SMU.AGCF[][].

Enumerator
IfxSmu_AlarmConfig_noAction | No Action. Reset value. Alarm disabled.
IfxSmu_AlarmConfig_interruptSet0 | Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 0.
IfxSmu_AlarmConfig_interruptSet1 | Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 1.
IfxSmu_AlarmConfig_interruptSet2 | Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 2.
IfxSmu_AlarmConfig_nmi | Sends an NMI request to the SCU.
IfxSmu_AlarmConfig_scuReset | Sends a reset request to SCU.
IfxSmu_AlarmConfig_cpuIdle | Triggers a CPU idle request.

Definition at line 56 of file IfxSmu.h.

◆ IfxSmu_Cmd

enum IfxSmu_Cmd

SMU Commands.

Enumerator
IfxSmu_Cmd_start | Forces the SSM to go to the RUN state from the START state.
IfxSmu_Cmd_activateFsp | Activates the Fault Signaling Protocol.
IfxSmu_Cmd_releaseFsp | Turns the FSP into the fault free state.
IfxSmu_Cmd_activatePes | Triggers the activation of the Port Emergency Stop (PES).
IfxSmu_Cmd_stopRecoveryTimer | Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product.
IfxSmu_Cmd_enableClearAlarmStatus | Alarm Status Clear Enable Command.
IfxSmu_Cmd_triggerAlarm | Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping".

Definition at line 69 of file IfxSmu.h.

◆ IfxSmu_Fsp_Mode

enum IfxSmu_Fsp_Mode
Enumerator
IfxSmu_Fsp_Mode_bistable | Bi-stable fault signalling protocol.
IfxSmu_Fsp_Mode_timeSwitching | Time switching protocol.

Definition at line 80 of file IfxSmu.h.


iLLD_TC26B: SMU Pin Mapping

Data Structures | Macros | Variables
SMU Pin Mapping
iLLD » SMU
Collaboration diagram for SMU Pin Mapping:

Data Structures

struct IfxSmu_Fsp_Out
Fault Signal Protocol Pin. More...

Macros

#define | IFXSMU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
SMU_FSP: SMU. More...
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table. More...

Detailed Description

Data Structure Documentation

◆ IfxSmu_Fsp_Out

struct IfxSmu_Fsp_Out

Fault Signal Protocol Pin.

Definition at line 38 of file IfxSmu_PinMap.h.

Collaboration diagram for IfxSmu_Fsp_Out:
[legend]
Data Fields
Ifx_SMU * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

Macro Definition Documentation

◆ IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS

#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1

Definition at line 49 of file IfxSmu_PinMap.h.

◆ IFXSMU_PINMAP_NUM_MODULES

#define IFXSMU_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 48 of file IfxSmu_PinMap.h.

Variable Documentation

◆ IfxSmu_Fsp_Out_pinTable

IFX_EXTERN const IfxSmu_Fsp_Out* IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]

IfxSmu_Fsp_Out table.

Definition at line 53 of file IfxSmu_PinMap.h.

◆ IfxSmu_FSP_P33_8_OUT

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT

SMU_FSP: SMU.

Definition at line 45 of file IfxSmu_PinMap.h.


iLLD_TC26B: IfxSmu_cfg.h File Reference

  • _Impl
Macros | Enumerations
IfxSmu_cfg.h File Reference
iLLD » SMU

SMU on-chip implementation data. More...

Go to the source code of this file.

Macros

#define IFXSMU_NUM_MODULES (1)

Enumerations

enum IfxSmu_AlarmGroup {
IfxSmu_AlarmGroup_0 = 0,
IfxSmu_AlarmGroup_1,
IfxSmu_AlarmGroup_2,
IfxSmu_AlarmGroup_3,
IfxSmu_AlarmGroup_4,
IfxSmu_AlarmGroup_5,
IfxSmu_AlarmGroup_6
}
Alarm group
More...
enum IfxSmu_RecoveryTimer {
IfxSmu_RecoveryTimer_0 = 0,
IfxSmu_RecoveryTimer_1
}
Recovery Timer
More...
enum IfxSmu_Alarm {
IfxSmu_Alarm_Cpu0LockstepComparatorError = (IfxSmu_AlarmGroup_0 << 8) | 0,
IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_0 << 8) | 1,
IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 3,
IfxSmu_Alarm_Cpu0PcacheTagAddressError = (IfxSmu_AlarmGroup_0 << 8) | 4,
IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 5,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 6,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 7,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 8,
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 9,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 10,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 11,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 12,
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 13,
IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_0 << 8) | 19,
IfxSmu_Alarm_Cpu1LockstepComparatorError = (IfxSmu_AlarmGroup_1 << 8) |0,
IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_1 << 8) |1,
IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |3,
IfxSmu_Alarm_Cpu1PcacheTagAddressError = (IfxSmu_AlarmGroup_1 << 8) |4,
IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |5,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |6,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |7,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |8,
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |9,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |10,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |11,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |12,
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |13,
IfxSmu_Alarm_Cpu1DcacheTagSramCorrection = (IfxSmu_AlarmGroup_1 << 8) |14,
IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |15,
IfxSmu_Alarm_Cpu1DcacheTagSramAddressError = (IfxSmu_AlarmGroup_1 << 8) |16,
IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |17,
IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |18,
IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |19,
IfxSmu_Alarm_PmuSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 2,
IfxSmu_Alarm_PmuDoubleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 3,
IfxSmu_Alarm_PmuNonCorrectableMultipleBit = (IfxSmu_AlarmGroup_2 << 8) | 4,
IfxSmu_Alarm_PmuAddressingError = (IfxSmu_AlarmGroup_2 << 8) | 5,
IfxSmu_Alarm_PmuAddressBufferFull = (IfxSmu_AlarmGroup_2 << 8) | 6,
IfxSmu_Alarm_PmuPflashEccError = (IfxSmu_AlarmGroup_2 << 8) | 7,
IfxSmu_Alarm_PmuEdcComparatorError = (IfxSmu_AlarmGroup_2 << 8) | 8,
IfxSmu_Alarm_LmuEccError = (IfxSmu_AlarmGroup_2 << 8) | 15,
IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError = (IfxSmu_AlarmGroup_2 << 8) | 16,
IfxSmu_Alarm_LmuSramSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 17,
IfxSmu_Alarm_LmuSramUncorrectableError = (IfxSmu_AlarmGroup_2 << 8) | 18,
IfxSmu_Alarm_LmuSramAddressError = (IfxSmu_AlarmGroup_2 << 8) | 19,
IfxSmu_Alarm_LmuSramAddressBufferOverflow = (IfxSmu_AlarmGroup_2 << 8) | 20,
IfxSmu_Alarm_SriEdcAddressPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 21,
IfxSmu_Alarm_SriEdcWritePhaseError = (IfxSmu_AlarmGroup_2 << 8) | 22,
IfxSmu_Alarm_SriEdcReadPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 23,
IfxSmu_Alarm_IrEdcError = (IfxSmu_AlarmGroup_2 << 8) | 25,
IfxSmu_Alarm_IomPinMismatchIndication = (IfxSmu_AlarmGroup_2 << 8) | 26,
IfxSmu_Alarm_SmuTimer0TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 29,
IfxSmu_Alarm_SmuTimer1TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 30,
IfxSmu_Alarm_SmuErrorPinFaultStateActivation = (IfxSmu_AlarmGroup_2 << 8) | 31,
IfxSmu_Alarm_ScuCguInputClockOutOfRange = (IfxSmu_AlarmGroup_3 << 8) | 0,
IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 1,
IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 2,
IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 3,
IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 4,
IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 5,
IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 6,
IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 7,
IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 8,
IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 9,
IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 11,
IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 12,
IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 13,
IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 14,
IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 15,
IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 16,
IfxSmu_Alarm_ScuWdtsWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 17,
IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 18,
IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 19,
IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 20,
IfxSmu_Alarm_ScuWdtWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 21,
IfxSmu_Alarm_SpbAccessEnableError = (IfxSmu_AlarmGroup_3 << 8) | 22,
IfxSmu_Alarm_ScuDtsTemperatureUnderflow = (IfxSmu_AlarmGroup_3 << 8) | 25,
IfxSmu_Alarm_ScuDtsTemperatureOverflow = (IfxSmu_AlarmGroup_3 << 8) | 26,
IfxSmu_Alarm_ScuExternalEmergencyStopSignal = (IfxSmu_AlarmGroup_3 << 8) | 29,
IfxSmu_Alarm_SriBusError = (IfxSmu_AlarmGroup_3 << 8) | 30,
IfxSmu_Alarm_SpbBusError = (IfxSmu_AlarmGroup_3 << 8) | 31,
IfxSmu_Alarm_GtmSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 0,
IfxSmu_Alarm_GtmSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 1,
IfxSmu_Alarm_GtmSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 2,
IfxSmu_Alarm_GtmSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 3,
IfxSmu_Alarm_CanSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 4,
IfxSmu_Alarm_CanSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 5,
IfxSmu_Alarm_CanSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 6,
IfxSmu_Alarm_CanSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 7,
IfxSmu_Alarm_FlexraySramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 8,
IfxSmu_Alarm_FlexraySramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 9,
IfxSmu_Alarm_FlexraySramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 10,
IfxSmu_Alarm_FlexraySramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 11,
IfxSmu_Alarm_EmemSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 12,
IfxSmu_Alarm_EmemSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 13,
IfxSmu_Alarm_EmemSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 15,
IfxSmu_Alarm_SramsSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 16,
IfxSmu_Alarm_SramsSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 17,
IfxSmu_Alarm_SramsSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 18,
IfxSmu_Alarm_SramsSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 19,
IfxSmu_Alarm_SoftwareAlarm0 = (IfxSmu_AlarmGroup_5 << 8) | 0,
IfxSmu_Alarm_SoftwareAlarm1 = (IfxSmu_AlarmGroup_5 << 8) | 1,
IfxSmu_Alarm_SoftwareAlarm2 = (IfxSmu_AlarmGroup_5 << 8) | 2,
IfxSmu_Alarm_SoftwareAlarm3 = (IfxSmu_AlarmGroup_5 << 8) | 3,
IfxSmu_Alarm_SoftwareAlarm4 = (IfxSmu_AlarmGroup_5 << 8) | 4,
IfxSmu_Alarm_SoftwareAlarm5 = (IfxSmu_AlarmGroup_5 << 8) | 5,
IfxSmu_Alarm_SoftwareAlarm6 = (IfxSmu_AlarmGroup_5 << 8) | 6,
IfxSmu_Alarm_SoftwareAlarm7 = (IfxSmu_AlarmGroup_5 << 8) | 7,
IfxSmu_Alarm_SoftwareAlarm8 = (IfxSmu_AlarmGroup_5 << 8) | 8,
IfxSmu_Alarm_SoftwareAlarm9 = (IfxSmu_AlarmGroup_5 << 8) | 9,
IfxSmu_Alarm_SoftwareAlarm10 = (IfxSmu_AlarmGroup_5 << 8) | 10,
IfxSmu_Alarm_SoftwareAlarm11 = (IfxSmu_AlarmGroup_5 << 8) | 11,
IfxSmu_Alarm_SoftwareAlarm12 = (IfxSmu_AlarmGroup_5 << 8) | 12,
IfxSmu_Alarm_SoftwareAlarm13 = (IfxSmu_AlarmGroup_5 << 8) | 13,
IfxSmu_Alarm_SoftwareAlarm14 = (IfxSmu_AlarmGroup_5 << 8) | 14,
IfxSmu_Alarm_SoftwareAlarm15 = (IfxSmu_AlarmGroup_5 << 8) | 15,
IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_6 << 8) | 1,
IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 3,
IfxSmu_Alarm_Cpu2PcacheTagAddressError = (IfxSmu_AlarmGroup_6 << 8) | 4,
IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 5,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 6,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 7,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 8,
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 9,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 10,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 11,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 12,
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 13,
IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 14,
IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 15,
IfxSmu_Alarm_Cpu2DcacheTagSramAddressError = (IfxSmu_AlarmGroup_6 << 8) | 16,
IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 17,
IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 18,
IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 19,
IfxSmu_Alarm_noAlarm
}
SMU Alarm list
More...

Detailed Description

SMU on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSmu_cfg.h.

Macro Definition Documentation

◆ IFXSMU_NUM_MODULES

#define IFXSMU_NUM_MODULES (1)

Definition at line 48 of file IfxSmu_cfg.h.


iLLD_TC26B: IfxSmu_PinMap.c File Reference

  • _PinMap
Variables
IfxSmu_PinMap.c File Reference
iLLD » SMU

SMU I/O map. More...

#include "IfxSmu_PinMap.h"
Include dependency graph for IfxSmu_PinMap.c:

Go to the source code of this file.

Variables

IfxSmu_Fsp_Out | IfxSmu_FSP_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}
const IfxSmu_Fsp_Out * | IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]

Detailed Description

SMU I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSmu_PinMap.c.

Variable Documentation

◆ IfxSmu_Fsp_Out_pinTable

const IfxSmu_Fsp_Out* IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxSmu_FSP_P33_8_OUT
}
}
IfxSmu_FSP_P33_8_OUT
IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
Definition: IfxSmu_PinMap.c:28

Definition at line 31 of file IfxSmu_PinMap.c.

Referenced by IfxSmu_initFsp().

◆ IfxSmu_FSP_P33_8_OUT

IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1}

Definition at line 28 of file IfxSmu_PinMap.c.


iLLD_TC26B: IfxSmu_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxSmu_PinMap.h File Reference
iLLD » SMU

SMU I/O map. More...

#include <IfxSmu_reg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxSmu_PinMap.h:

Go to the source code of this file.

Data Structures

struct IfxSmu_Fsp_Out
Fault Signal Protocol Pin. More...

Macros

#define | IFXSMU_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1

Variables

IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
SMU_FSP: SMU. More...
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable [IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table. More...

Detailed Description

SMU I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSmu_PinMap.h.


iLLD_TC26B: IfxSmu.h File Reference

  • Smu
  • Std
Data Structures | Enumerations | Functions
IfxSmu.h File Reference
iLLD » SMU

SMU basic functionality. More...

#include "_Impl/IfxSmu_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "_PinMap/IfxSmu_PinMap.h"
#include "IfxSmu_reg.h"
#include "IfxSmu_regdef.h"
#include "IfxSmu_bf.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxSmu.h:

Go to the source code of this file.

Data Structures

struct IfxSmu_configFsp
FSP Configuration Structure. More...

Enumerations

enum IfxSmu_AlarmConfig {
IfxSmu_AlarmConfig_noAction = 0,
IfxSmu_AlarmConfig_interruptSet0 = 2,
IfxSmu_AlarmConfig_interruptSet1 = 3,
IfxSmu_AlarmConfig_interruptSet2 = 4,
IfxSmu_AlarmConfig_nmi = 5,
IfxSmu_AlarmConfig_scuReset = 6,
IfxSmu_AlarmConfig_cpuIdle = 7
}
SMU Alarm Configuration Ifx_SMU.AGCF[][]. More...
enum IfxSmu_Cmd {
IfxSmu_Cmd_start = 0,
IfxSmu_Cmd_activateFsp = 1,
IfxSmu_Cmd_releaseFsp = 2,
IfxSmu_Cmd_activatePes = 3,
IfxSmu_Cmd_stopRecoveryTimer = 4,
IfxSmu_Cmd_enableClearAlarmStatus = 5,
IfxSmu_Cmd_triggerAlarm = 6
}
SMU Commands. More...
enum IfxSmu_Fsp_Mode {
IfxSmu_Fsp_Mode_bistable,
IfxSmu_Fsp_Mode_timeSwitching
}

Functions

IFX_INLINE boolean | IfxSmu_releaseFsp (Ifx_SMU *smu)
Turns the FSP into the fault free state. More...
IFX_INLINE void | IfxSmu_initFspConfig (IfxSmu_configFsp *config)
Initialize the FSP configuartion to default. More...
IFX_INLINE boolean | IfxSmu_activateFsp (Ifx_SMU *smu)
Activates the Fault Signaling Protocol. More...
IFX_EXTERN boolean | IfxSmu_initFsp (Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP. More...
IFX_EXTERN float32 | IfxSmu_getFspFaultFreeFrequency (Ifx_SMU *smu)
Return FSP frequency (Time switching only) More...
IFX_EXTERN float32 | IfxSmu_getFspFaultStateTime (Ifx_SMU *smu)
Return the minimal fault state time. More...
IFX_EXTERN void | IfxSmu_enableAlarmFsp (Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration. More...
IFX_INLINE boolean | IfxSmu_activatePes (Ifx_SMU *smu)
Triggers the activation of the Port Emergency Stop (PES). More...
IFX_INLINE boolean | IfxSmu_stopRecoveryTimer (Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product. More...
IFX_INLINE boolean | IfxSmu_enableClearAlarmStatus (Ifx_SMU *smu)
Alarm Status Clear Enable Command. More...
IFX_INLINE boolean | IfxSmu_triggerAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping". More...
IFX_INLINE boolean | IfxSmu_start (Ifx_SMU *smu)
Forces the SSM to go to the RUN state from the START state. More...
IFX_EXTERN boolean | IfxSmu_cmd (Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers. More...
IFX_EXTERN boolean | IfxSmu_unlock (Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_lock (Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_lockForever (Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
IFX_EXTERN void | IfxSmu_setAlarmConfig (Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration. More...
IFX_EXTERN boolean | IfxSmu_isAlarmSet (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status. More...
IFX_EXTERN IfxSmu_Alarm | IfxSmu_getAlarm (Ifx_SMU *smu)
Get the alarm flag. More...
IFX_EXTERN void | IfxSmu_clearAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag. More...

Detailed Description

SMU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSmu.h.


iLLD_TC26B: SRC

Modules | Files
SRC
iLLD
Collaboration diagram for SRC:

Modules

Implementation
Standard Driver
How to use Service Request Mechanism?

Files

file | IfxSrc_cfg.h
SRC on-chip implementation data.
file | IfxSrc.h
SRC basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » SRC
Collaboration diagram for Implementation:

Modules

Enumerations

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » SRC » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxSrc_Tos {
IfxSrc_Tos_cpu0 = 0,
IfxSrc_Tos_cpu1 = 1,
IfxSrc_Tos_dma = 3
}
Identifier of interrupt service provider, which handles the interrupt service request. More...

Detailed Description

Enumeration Type Documentation

◆ IfxSrc_Tos

enum IfxSrc_Tos

Identifier of interrupt service provider, which handles the interrupt service request.

Enumerator
IfxSrc_Tos_cpu0 | CPU0 interrupt service provider, which handles the interrupt service request.
IfxSrc_Tos_cpu1 | CPU1 interrupt service provider, which handles the interrupt service request.
IfxSrc_Tos_dma | DMA interrupt service provider, which handles the interrupt service request.

Definition at line 49 of file IfxSrc_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » SRC
Collaboration diagram for Standard Driver:

Modules

Service Request Functions
Module Functions

Detailed Description


iLLD_TC26B: Service Request Functions

Functions
Service Request Functions
iLLD » SRC » Standard Driver
Collaboration diagram for Service Request Functions:

Functions

IFX_INLINE void | IfxSrc_clearOverrun (volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request. More...
IFX_INLINE void | IfxSrc_clearRequest (volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software. More...
IFX_INLINE boolean | IfxSrc_isOverrun (volatile Ifx_SRC_SRCR *src)
Gets the current overrun status. More...
IFX_INLINE boolean | IfxSrc_isRequested (volatile Ifx_SRC_SRCR *src)
Gets the current request status. More...
IFX_INLINE void | IfxSrc_setRequest (volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software. More...

Detailed Description

Function Documentation

◆ IfxSrc_clearOverrun()

IFX_INLINE void IfxSrc_clearOverrun ( volatile Ifx_SRC_SRCR * src )

Resets the overrun flag of the Service Request.

Parameters
src pointer to the Service Request Control register which the overrun flag should be cleared.
Returns
None

Usage example: see IfxSrc_init

Definition at line 224 of file IfxSrc.h.

◆ IfxSrc_clearRequest()

IFX_INLINE void IfxSrc_clearRequest ( volatile Ifx_SRC_SRCR * src )

Resets a specific interrupt service by software.

Parameters
src pointer to the Service Request Control register which the request should be cleared.
Returns
None

Usage example: see IfxSrc_init

Definition at line 230 of file IfxSrc.h.

Referenced by IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_write(), and IfxSrc_init().

◆ IfxSrc_isOverrun()

IFX_INLINE boolean IfxSrc_isOverrun ( volatile Ifx_SRC_SRCR * src )

Gets the current overrun status.

Parameters
src pointer to the Service Request Control register for which the overrun status should be returned.
Returns
current service request control overrun status.

Usage example: see IfxSrc_init

Definition at line 262 of file IfxSrc.h.

◆ IfxSrc_isRequested()

IFX_INLINE boolean IfxSrc_isRequested ( volatile Ifx_SRC_SRCR * src )

Gets the current request status.

Parameters
src pointer to the Service Request Control register for which the request status should be returned.
Returns
current service request control request status.

Usage example: see IfxSrc_init

Definition at line 268 of file IfxSrc.h.

◆ IfxSrc_setRequest()

IFX_INLINE void IfxSrc_setRequest ( volatile Ifx_SRC_SRCR * src )

Requests a specific interrupt service by software.

Parameters
src pointer to the Service Request Control register which the interrupt has to be requested.
Returns
None

Usage example: see IfxSrc_init

Definition at line 274 of file IfxSrc.h.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » SRC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxSrc_deinit (volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register. More...
IFX_INLINE void | IfxSrc_disable (volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_enable (volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_init (volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register. More...

Detailed Description

Function Documentation

◆ IfxSrc_deinit()

IFX_INLINE void IfxSrc_deinit ( volatile Ifx_SRC_SRCR * src )

DeInitializes the service request control register.

Parameters
src pointer to the Service Request Control register which should be deinitialised.
Returns
None

Usage example: see IfxSrc_init

Definition at line 236 of file IfxSrc.h.

◆ IfxSrc_disable()

IFX_INLINE void IfxSrc_disable ( volatile Ifx_SRC_SRCR * src )

Disables a specific interrupt service request.

Parameters
src pointer to the Service Request Control register for which the interrupt has to be disabled.
Returns
None

Usage example: see IfxSrc_init

Definition at line 242 of file IfxSrc.h.

Referenced by IfxMultican_Can_initModule().

◆ IfxSrc_enable()

IFX_INLINE void IfxSrc_enable ( volatile Ifx_SRC_SRCR * src )

Enables a specific interrupt service request.

Parameters
src pointer to the Service Request Control register for which the interrupt has to be enabled.
Returns
None

Usage example: see IfxSrc_init

Definition at line 248 of file IfxSrc.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Spi_initModule(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCif_Cam_initCifIspUnit(), IfxDma_Dma_initChannel(), IfxDsadc_Rdc_initHwChannels(), IfxDts_Dts_initModule(), IfxEray_Eray_initModule(), IfxEth_init(), IfxFce_Crc_initModule(), IfxFft_Fft_initDma(), IfxFft_Fft_initModule(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Timer_init(), IfxHssl_enableHsctInterrupt(), IfxHssl_enableHsslCOKInterrupt(), IfxHssl_enableHsslERRInterrupt(), IfxHssl_enableHsslEXIInterrupt(), IfxHssl_enableHsslRDIInterrupt(), IfxHssl_enableHsslTRGInterrupt(), IfxI2c_enableBurstDataTransferInterrupt(), IfxI2c_enableErrorInterrupt(), IfxI2c_enableLastBurstDataTransferInterrupt(), IfxI2c_enableLastSingleDataTransferInterrupt(), IfxI2c_enableProtocolInterrupt(), IfxI2c_enableSingleDataTransferInterrupt(), IfxMultican_Can_initModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxSent_Sent_initChannel(), IfxStm_initCompare(), IfxStm_Timer_init(), and IfxVadc_Adc_initChannel().

◆ IfxSrc_init()

IFX_INLINE void IfxSrc_init | ( | volatile Ifx_SRC_SRCR * | src,
 |  | IfxSrc_Tos | typOfService,
 |  | Ifx_Priority | priority
 | ) |  |

Initializes the service request control register.

Parameters
src | pointer to the Service Request Control register which should be initialised.
typOfService | type of interrupt service provider.
priority | Interrupt priority.
Returns
None

Get the peripheral service control register which request need to be serviced and assign this service to any of service providers.

//define the interrupt priority
#define IFXASCLIN0_TX_INTPRIO 2
//get the service request
volatile Ifx_SRC_SRCR *src = IfxAsclin_getSrcPointerRx( &MODULE_ASCLIN0 );
//initlaise the service request
IfxSrc_init( src, IfxSrc_Tos_cpu0, IFXASCLIN0_TX_INTPRIO );
// enable the service
IfxSrc_enable( src );
//check for service request flags and clear if they occur
if ( IfxSrc_isRequested( src ) == TRUE )
{
IfxSrc_clearRequest( src );
}
if ( IfxSrc_isOverrun( src ) == TRUE )
{
IfxSrc_clearOverrun( src );
}
// Atlast deinitialise the service control
IfxSrc_deinit( src );

Definition at line 254 of file IfxSrc.h.

Referenced by IfxAsclin_Asc_initModule(), IfxAsclin_Lin_initModule(), IfxAsclin_Spi_initModule(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCif_Cam_initCifIspUnit(), IfxDma_Dma_initChannel(), IfxDsadc_Rdc_initHwChannels(), IfxDts_Dts_initModule(), IfxEray_Eray_initModule(), IfxEth_init(), IfxFce_Crc_initModule(), IfxFft_Fft_initDma(), IfxFft_Fft_initModule(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Timer_init(), IfxHssl_enableHsctInterrupt(), IfxHssl_enableHsslCOKInterrupt(), IfxHssl_enableHsslERRInterrupt(), IfxHssl_enableHsslEXIInterrupt(), IfxHssl_enableHsslRDIInterrupt(), IfxHssl_enableHsslTRGInterrupt(), IfxI2c_enableBurstDataTransferInterrupt(), IfxI2c_enableErrorInterrupt(), IfxI2c_enableLastBurstDataTransferInterrupt(), IfxI2c_enableLastSingleDataTransferInterrupt(), IfxI2c_enableProtocolInterrupt(), IfxI2c_enableSingleDataTransferInterrupt(), IfxMultican_Can_initModule(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiSlave_initModule(), IfxSent_Sent_initChannel(), IfxStm_initCompare(), IfxStm_Timer_init(), and IfxVadc_Adc_initChannel().


iLLD_TC26B: How to use Service Request Mechanism?

How to use Service Request Mechanism?
iLLD » SRC
Collaboration diagram for How to use Service Request Mechanism?:

For Aurix controller peripherals that can generate service requests is connected to one or more Service Request Nodes (SRNs) in the central Interrupt Router(IR) module. Refer to Controller User Manual for more details
IfxSrc driver provides the APIs to configure and control service requests. Refer How to use Service Request Mechanism? for details of these APIs.

Initialize the Service Request Node

Service request node is initialized to configure the following,
1) Route the interrupt trigger to service provider, which are:
__a. One of the available CPUs or
__b. DMA controller
2) Priority of CPU Interrupt or DMA Trigger.

For Interrupt or DMA to be correctly triggered, following steps are to be done in the user code:

Step1: Configure the Node

User must configure the service request node in the application / driver files.

Step2: Enable the Trigger

Enable the service request node to connect the trigger event from the hardware to service provider.

Example: Following example show the configuration for STM0 Service request 0 trigger configured to trigger CPU1 with the priority specified by IFX_INTPRIO_STM0 (from the example at IfxCpu_Irq)

//file: myApplication.c
#include "Ifx_IntPrioDef.h" // to get the priority numbers
void myDriverInitFunction(void)
{
// driver init code
// Step1: Call the function to route the trigger from for SRC_STM0_SR0 to CPU1
// and priority specified at Ifx_IntPrioDef.h globally
IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0, IfxSrc_Tos_cpu1, IFX_INTPRIO_STM0);
// Step2: Enable the service request node
IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0);
}


iLLD_TC26B: IfxSrc_cfg.h File Reference

  • _Impl
Enumerations
IfxSrc_cfg.h File Reference
iLLD » SRC

SRC on-chip implementation data. More...

Go to the source code of this file.

Enumerations

enum IfxSrc_Tos {
IfxSrc_Tos_cpu0 = 0,
IfxSrc_Tos_cpu1 = 1,
IfxSrc_Tos_dma = 3
}
Identifier of interrupt service provider, which handles the interrupt service request. More...

Detailed Description

SRC on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSrc_cfg.h.


iLLD_TC26B: IfxSrc.h File Reference

  • Src
  • Std
Functions
IfxSrc.h File Reference
iLLD » SRC

SRC basic functionality. More...

#include "_Impl/IfxSrc_cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxSrc_reg.h"
Include dependency graph for IfxSrc.h:

Go to the source code of this file.

Functions

IFX_INLINE void | IfxSrc_clearOverrun (volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request. More...
IFX_INLINE void | IfxSrc_clearRequest (volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software. More...
IFX_INLINE boolean | IfxSrc_isOverrun (volatile Ifx_SRC_SRCR *src)
Gets the current overrun status. More...
IFX_INLINE boolean | IfxSrc_isRequested (volatile Ifx_SRC_SRCR *src)
Gets the current request status. More...
IFX_INLINE void | IfxSrc_setRequest (volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software. More...
IFX_INLINE void | IfxSrc_deinit (volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register. More...
IFX_INLINE void | IfxSrc_disable (volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_enable (volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request. More...
IFX_INLINE void | IfxSrc_init (volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register. More...

Detailed Description

SRC basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSrc.h.


iLLD_TC26B: STM

Modules | Files
STM
iLLD
Collaboration diagram for STM:

Modules

Implementation
Standard Driver
How to use the Stm driver?
STM Timer Interface

Files

file | IfxStm_cfg.h
STM on-chip implementation data.
file | IfxStm.h
STM basic functionality.
file | IfxStm_Timer.h
STM TIMER details.

Detailed Description


iLLD_TC26B: Implementation

Modules
Implementation
iLLD » STM
Collaboration diagram for Implementation:

Modules

Enumerations
Global Variables

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » STM » Implementation
Collaboration diagram for Enumerations:

Enumerations

enum IfxStm_Index {
IfxStm_Index_none = -1,
IfxStm_Index_0 = 0,
IfxStm_Index_1
}
List of the available STM resources. More...

Detailed Description

Enumeration Type Documentation

◆ IfxStm_Index

enum IfxStm_Index

List of the available STM resources.

Enumerator
IfxStm_Index_none | Not Selected.
IfxStm_Index_0 | STM index 0.
IfxStm_Index_1 | STM index 1.

Definition at line 67 of file IfxStm_cfg.h.


iLLD_TC26B: Global Variables

Variables
Global Variables
iLLD » STM » Implementation
Collaboration diagram for Global Variables:

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

Variable Documentation

◆ IfxStm_cfg_indexMap

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]

Definition at line 83 of file IfxStm_cfg.h.


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » STM
Collaboration diagram for Standard Driver:

Modules

Enumerations
Data Structures
Module Functions
Timer Functions
Comparator Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » STM » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxStm_Comparator {
IfxStm_Comparator_0 = 0,
IfxStm_Comparator_1
}
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2) More...
enum IfxStm_ComparatorInterrupt {
IfxStm_ComparatorInterrupt_ir0 = 0,
IfxStm_ComparatorInterrupt_ir1 = 1
}
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1) More...
enum IfxStm_ComparatorOffset {
IfxStm_ComparatorOffset_0 = 0,
IfxStm_ComparatorOffset_1,
IfxStm_ComparatorOffset_2,
IfxStm_ComparatorOffset_3,
IfxStm_ComparatorOffset_4,
IfxStm_ComparatorOffset_5,
IfxStm_ComparatorOffset_6,
IfxStm_ComparatorOffset_7,
IfxStm_ComparatorOffset_8,
IfxStm_ComparatorOffset_9,
IfxStm_ComparatorOffset_10,
IfxStm_ComparatorOffset_11,
IfxStm_ComparatorOffset_12,
IfxStm_ComparatorOffset_13,
IfxStm_ComparatorOffset_14,
IfxStm_ComparatorOffset_15,
IfxStm_ComparatorOffset_16,
IfxStm_ComparatorOffset_17,
IfxStm_ComparatorOffset_18,
IfxStm_ComparatorOffset_19,
IfxStm_ComparatorOffset_20,
IfxStm_ComparatorOffset_21,
IfxStm_ComparatorOffset_22,
IfxStm_ComparatorOffset_23,
IfxStm_ComparatorOffset_24,
IfxStm_ComparatorOffset_25,
IfxStm_ComparatorOffset_26,
IfxStm_ComparatorOffset_27,
IfxStm_ComparatorOffset_28,
IfxStm_ComparatorOffset_29,
IfxStm_ComparatorOffset_30,
IfxStm_ComparatorOffset_31
}
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2) More...
enum IfxStm_ComparatorSize {
IfxStm_ComparatorSize_1Bit = 0,
IfxStm_ComparatorSize_2Bits = 1,
IfxStm_ComparatorSize_3Bits = 2,
IfxStm_ComparatorSize_4Bits = 3,
IfxStm_ComparatorSize_5Bits = 4,
IfxStm_ComparatorSize_6Bits = 5,
IfxStm_ComparatorSize_7Bits = 6,
IfxStm_ComparatorSize_8Bits = 7,
IfxStm_ComparatorSize_9Bits = 8,
IfxStm_ComparatorSize_10Bits = 9,
IfxStm_ComparatorSize_11Bits = 10,
IfxStm_ComparatorSize_12Bits = 11,
IfxStm_ComparatorSize_13Bits = 12,
IfxStm_ComparatorSize_14Bits = 13,
IfxStm_ComparatorSize_15Bits = 14,
IfxStm_ComparatorSize_16Bits = 15,
IfxStm_ComparatorSize_17Bits = 16,
IfxStm_ComparatorSize_18Bits = 17,
IfxStm_ComparatorSize_19Bits = 18,
IfxStm_ComparatorSize_20Bits = 19,
IfxStm_ComparatorSize_21Bits = 20,
IfxStm_ComparatorSize_22Bits = 21,
IfxStm_ComparatorSize_23Bits = 22,
IfxStm_ComparatorSize_24Bits = 23,
IfxStm_ComparatorSize_25Bits = 24,
IfxStm_ComparatorSize_26Bits = 25,
IfxStm_ComparatorSize_27Bits = 26,
IfxStm_ComparatorSize_28Bits = 27,
IfxStm_ComparatorSize_29Bits = 28,
IfxStm_ComparatorSize_30Bits = 29,
IfxStm_ComparatorSize_31Bits = 30,
IfxStm_ComparatorSize_32Bits = 31
}
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2) More...
enum IfxStm_SleepMode {
IfxStm_SleepMode_enable = 0,
IfxStm_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS. More...
enum IfxStm_SuspendMode {
IfxStm_SuspendMode_none = 0,
IfxStm_SuspendMode_hard = 1,
IfxStm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Detailed Description

Enumeration Type Documentation

◆ IfxStm_Comparator

enum IfxStm_Comparator

Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)

Enumerator
IfxStm_Comparator_0 | Comparator Id 0.
IfxStm_Comparator_1 | Comparator Id 1.

Definition at line 131 of file IfxStm.h.

◆ IfxStm_ComparatorInterrupt

enum IfxStm_ComparatorInterrupt

Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)

Enumerator
IfxStm_ComparatorInterrupt_ir0 | Select STMIR0.
IfxStm_ComparatorInterrupt_ir1 | Select STMIR1.

Definition at line 139 of file IfxStm.h.

◆ IfxStm_ComparatorOffset

enum IfxStm_ComparatorOffset

Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)

Enumerator
IfxStm_ComparatorOffset_0 | Comparator start bit position 0 with 64 bit timer.
IfxStm_ComparatorOffset_1 | Comparator start bit position 1 with 64 bit timer.
IfxStm_ComparatorOffset_2 | Comparator start bit position 2 with 64 bit timer.
IfxStm_ComparatorOffset_3 | Comparator start bit position 3 with 64 bit timer.
IfxStm_ComparatorOffset_4 | Comparator start bit position 4 with 64 bit timer.
IfxStm_ComparatorOffset_5 | Comparator start bit position 5 with 64 bit timer.
IfxStm_ComparatorOffset_6 | Comparator start bit position 6 with 64 bit timer.
IfxStm_ComparatorOffset_7 | Comparator start bit position 7 with 64 bit timer.
IfxStm_ComparatorOffset_8 | Comparator start bit position 8 with 64 bit timer.
IfxStm_ComparatorOffset_9 | Comparator start bit position 9 with 64 bit timer.
IfxStm_ComparatorOffset_10 | Comparator start bit position 10 with 64 bit timer.
IfxStm_ComparatorOffset_11 | Comparator start bit position 11 with 64 bit timer.
IfxStm_ComparatorOffset_12 | Comparator start bit position 12 with 64 bit timer.
IfxStm_ComparatorOffset_13 | Comparator start bit position 13 with 64 bit timer.
IfxStm_ComparatorOffset_14 | Comparator start bit position 14 with 64 bit timer.
IfxStm_ComparatorOffset_15 | Comparator start bit position 15 with 64 bit timer.
IfxStm_ComparatorOffset_16 | Comparator start bit position 16 with 64 bit timer.
IfxStm_ComparatorOffset_17 | Comparator start bit position 17 with 64 bit timer.
IfxStm_ComparatorOffset_18 | Comparator start bit position 18 with 64 bit timer.
IfxStm_ComparatorOffset_19 | Comparator start bit position 19 with 64 bit timer.
IfxStm_ComparatorOffset_20 | Comparator start bit position 20 with 64 bit timer.
IfxStm_ComparatorOffset_21 | Comparator start bit position 21 with 64 bit timer.
IfxStm_ComparatorOffset_22 | Comparator start bit position 22 with 64 bit timer.
IfxStm_ComparatorOffset_23 | Comparator start bit position 23 with 64 bit timer.
IfxStm_ComparatorOffset_24 | Comparator start bit position 24 with 64 bit timer.
IfxStm_ComparatorOffset_25 | Comparator start bit position 25 with 64 bit timer.
IfxStm_ComparatorOffset_26 | Comparator start bit position 26 with 64 bit timer.
IfxStm_ComparatorOffset_27 | Comparator start bit position 27 with 64 bit timer.
IfxStm_ComparatorOffset_28 | Comparator start bit position 28 with 64 bit timer.
IfxStm_ComparatorOffset_29 | Comparator start bit position 29 with 64 bit timer.
IfxStm_ComparatorOffset_30 | Comparator start bit position 30 with 64 bit timer.
IfxStm_ComparatorOffset_31 | Comparator start bit position 31 with 64 bit timer.

Definition at line 147 of file IfxStm.h.

◆ IfxStm_ComparatorSize

enum IfxStm_ComparatorSize

Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2)

Enumerator
IfxStm_ComparatorSize_1Bit | Size of compare value to compare with timer: 1 bit.
IfxStm_ComparatorSize_2Bits | Size of compare value to compare with timer: 2 bits.
IfxStm_ComparatorSize_3Bits | Size of compare value to compare with timer: 3 bits.
IfxStm_ComparatorSize_4Bits | Size of compare value to compare with timer: 4 bits.
IfxStm_ComparatorSize_5Bits | Size of compare value to compare with timer: 5 bits.
IfxStm_ComparatorSize_6Bits | Size of compare value to compare with timer: 6 bits.
IfxStm_ComparatorSize_7Bits | Size of compare value to compare with timer: 7 bits.
IfxStm_ComparatorSize_8Bits | Size of compare value to compare with timer: 8 bits.
IfxStm_ComparatorSize_9Bits | Size of compare value to compare with timer: 9 bits.
IfxStm_ComparatorSize_10Bits | Size of compare value to compare with timer: 10 bits.
IfxStm_ComparatorSize_11Bits | Size of compare value to compare with timer: 11 bits.
IfxStm_ComparatorSize_12Bits | Size of compare value to compare with timer: 12 bits.
IfxStm_ComparatorSize_13Bits | Size of compare value to compare with timer: 13 bits.
IfxStm_ComparatorSize_14Bits | Size of compare value to compare with timer: 14 bits.
IfxStm_ComparatorSize_15Bits | Size of compare value to compare with timer: 15 bits.
IfxStm_ComparatorSize_16Bits | Size of compare value to compare with timer: 16 bits.
IfxStm_ComparatorSize_17Bits | Size of compare value to compare with timer: 17 bits.
IfxStm_ComparatorSize_18Bits | Size of compare value to compare with timer: 18 bits.
IfxStm_ComparatorSize_19Bits | Size of compare value to compare with timer: 19 bits.
IfxStm_ComparatorSize_20Bits | Size of compare value to compare with timer: 20 bits.
IfxStm_ComparatorSize_21Bits | Size of compare value to compare with timer: 21 bits.
IfxStm_ComparatorSize_22Bits | Size of compare value to compare with timer: 22 bits.
IfxStm_ComparatorSize_23Bits | Size of compare value to compare with timer: 23 bits.
IfxStm_ComparatorSize_24Bits | Size of compare value to compare with timer: 24 bits.
IfxStm_ComparatorSize_25Bits | Size of compare value to compare with timer: 25 bits.
IfxStm_ComparatorSize_26Bits | Size of compare value to compare with timer: 26 bits.
IfxStm_ComparatorSize_27Bits | Size of compare value to compare with timer: 27 bits.
IfxStm_ComparatorSize_28Bits | Size of compare value to compare with timer: 28 bits.
IfxStm_ComparatorSize_29Bits | Size of compare value to compare with timer: 29 bits.
IfxStm_ComparatorSize_30Bits | Size of compare value to compare with timer: 30 bits.
IfxStm_ComparatorSize_31Bits | Size of compare value to compare with timer: 31 bits.
IfxStm_ComparatorSize_32Bits | Size of compare value to compare with timer: 32 bits.

Definition at line 185 of file IfxStm.h.

◆ IfxStm_SleepMode

enum IfxStm_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS.

Enumerator
IfxStm_SleepMode_enable | enables sleep mode
IfxStm_SleepMode_disable | disables sleep mode

Definition at line 224 of file IfxStm.h.

◆ IfxStm_SuspendMode

enum IfxStm_SuspendMode

OCDS Suspend Control (OCDS.SUS)

Enumerator
IfxStm_SuspendMode_none | No suspend.
IfxStm_SuspendMode_hard | Hard Suspend.
IfxStm_SuspendMode_soft | Soft Suspend.

Definition at line 232 of file IfxStm.h.


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » STM » Standard Driver
Collaboration diagram for Data Structures:

Data Structures

struct IfxStm_CompareConfig
Comparator Configuration Structure. More...

Detailed Description

Data Structure Documentation

◆ IfxStm_CompareConfig

struct IfxStm_CompareConfig

Comparator Configuration Structure.

Definition at line 249 of file IfxStm.h.

Data Fields
IfxStm_Comparator | comparator | Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
IfxStm_ComparatorInterrupt | comparatorInterrupt | Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
IfxStm_ComparatorOffset | compareOffset | Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
IfxStm_ComparatorSize | compareSize | Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2).
uint32 | ticks | count for next comparison from current timer count.
Ifx_Priority | triggerPriority | Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
IfxSrc_Tos | typeOfService | Type of service.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » STM » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE uint64 | IfxStm_get (Ifx_STM *stm)
Returns system timer value. More...
IFX_INLINE float32 | IfxStm_getFrequency (Ifx_STM *stm)
Returns the system timer frequency. More...
IFX_INLINE boolean | IfxStm_isModuleSuspended (Ifx_STM *stm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxStm_setSuspendMode (Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
IFX_EXTERN void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. More...
IFX_EXTERN Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IFX_EXTERN IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...

Detailed Description

Function Documentation

◆ IfxStm_disableModule()

IFX_EXTERN void IfxStm_disableModule ( Ifx_STM * stm )

Disables the Stm module.

Parameters
stm pointer to STM registers
Returns
None

Definition at line 61 of file IfxStm.c.

◆ IfxStm_enableOcdsSuspend()

IFX_EXTERN void IfxStm_enableOcdsSuspend ( Ifx_STM * stm )

enable suspend by debugger.

Parameters
stm pointer to System timer module registers.
Returns
None

Definition at line 84 of file IfxStm.c.

◆ IfxStm_get()

IFX_INLINE uint64 IfxStm_get ( Ifx_STM * stm )

Returns system timer value.

Parameters
stm pointer to System timer module registers.
Returns
system timer value.

Definition at line 526 of file IfxStm.h.

Referenced by IfxStm_getOffsetTimer(), IfxStm_Timer_run(), now(), and nowWithoutCriticalSection().

◆ IfxStm_getAddress()

IFX_EXTERN Ifx_STM* IfxStm_getAddress ( IfxStm_Index stm )

Returns the module index of the selected STM module.

Parameters
stm Pointer to STM module registers
Returns
STM module register address

Definition at line 95 of file IfxStm.c.

◆ IfxStm_getFrequency()

IFX_INLINE float32 IfxStm_getFrequency ( Ifx_STM * stm )

Returns the system timer frequency.

Parameters
stm pointer to System timer module registers.
Returns
the system timer frequency in Hz.

Definition at line 543 of file IfxStm.h.

Referenced by IfxStm_getTicksFromMicroseconds(), IfxStm_getTicksFromMilliseconds(), IfxStm_Timer_init(), IfxStm_Timer_updateInputFrequency(), and initTime().

◆ IfxStm_getIndex()

IFX_EXTERN IfxStm_Index IfxStm_getIndex ( Ifx_STM * stm )

API to get the resource index of the STM specified.

Parameters
stm pointer to System timer module registers.
Returns
system timer module index.

Definition at line 112 of file IfxStm.c.

Referenced by IfxStm_getSrcPointer(), and IfxStm_initCompare().

◆ IfxStm_isModuleSuspended()

IFX_INLINE boolean IfxStm_isModuleSuspended ( Ifx_STM * stm )

Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended.

Parameters
stm Pointer to STM module registers
Returns
Suspend status (TRUE / FALSE)

Definition at line 626 of file IfxStm.h.

◆ IfxStm_setSuspendMode()

IFX_INLINE void IfxStm_setSuspendMode | ( | Ifx_STM * | stm,
 |  | IfxStm_SuspendMode | mode
 | ) |  |

Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.

Parameters
stm | Pointer to STM module registers
mode | Module suspend mode
Returns
None

Definition at line 647 of file IfxStm.h.


iLLD_TC26B: Timer Functions

Functions
Timer Functions
iLLD » STM » Standard Driver
Collaboration diagram for Timer Functions:

Functions

IFX_INLINE uint32 | IfxStm_getLower (Ifx_STM *stm)
Returns the lower system timer value. More...
IFX_INLINE uint32 | IfxStm_getOffset12Timer (Ifx_STM *stm)
Gets the TIM3 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset16Timer (Ifx_STM *stm)
Gets the TIM4 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset20Timer (Ifx_STM *stm)
Gets the TIM5 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset32Timer (Ifx_STM *stm)
Gets the TIM6 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset4Timer (Ifx_STM *stm)
Gets the TIM1 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset8Timer (Ifx_STM *stm)
Gets the TIM2 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffsetTimer (Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset. More...
IFX_INLINE void | IfxStm_waitTicks (Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks. More...

Detailed Description

Function Documentation

◆ IfxStm_getLower()

IFX_INLINE uint32 IfxStm_getLower ( Ifx_STM * stm )

Returns the lower system timer value.

Parameters
stm pointer to System timer module registers.
Returns
the lower system timer value.

Definition at line 554 of file IfxStm.h.

Referenced by IfxStm_waitTicks().

◆ IfxStm_getOffset12Timer()

IFX_INLINE uint32 IfxStm_getOffset12Timer ( Ifx_STM * stm )

Gets the TIM3 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM3 counter value.

Definition at line 560 of file IfxStm.h.

◆ IfxStm_getOffset16Timer()

IFX_INLINE uint32 IfxStm_getOffset16Timer ( Ifx_STM * stm )

Gets the TIM4 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM4 counter value.

Definition at line 566 of file IfxStm.h.

◆ IfxStm_getOffset20Timer()

IFX_INLINE uint32 IfxStm_getOffset20Timer ( Ifx_STM * stm )

Gets the TIM5 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM5 counter value.

Definition at line 572 of file IfxStm.h.

◆ IfxStm_getOffset32Timer()

IFX_INLINE uint32 IfxStm_getOffset32Timer ( Ifx_STM * stm )

Gets the TIM6 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM6 counter value.

Definition at line 578 of file IfxStm.h.

◆ IfxStm_getOffset4Timer()

IFX_INLINE uint32 IfxStm_getOffset4Timer ( Ifx_STM * stm )

Gets the TIM1 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM1 counter value.

Definition at line 584 of file IfxStm.h.

◆ IfxStm_getOffset8Timer()

IFX_INLINE uint32 IfxStm_getOffset8Timer ( Ifx_STM * stm )

Gets the TIM2 couter value.

Parameters
stm pointer to System timer module registers.
Returns
TIM2 counter value.

Definition at line 590 of file IfxStm.h.

◆ IfxStm_getOffsetTimer()

IFX_INLINE uint32 IfxStm_getOffsetTimer | ( | Ifx_STM * | stm,
 |  | uint8 | offset
 | ) |  |

Returns the timer value shifted right by offset.

Parameters
stm | pointer to System timer module registers.
offset | offset value.
Returns
the lower system timer value shifted by offset.

Definition at line 596 of file IfxStm.h.

Referenced by IfxStm_initCompare().

◆ IfxStm_waitTicks()

IFX_INLINE void IfxStm_waitTicks | ( | Ifx_STM * | stm,
 |  | uint32 | ticks
 | ) |  |

Wait for requested time. The macro waits in while loop for the specified time in system timer ticks.

Parameters
stm | pointer to System timer module registers.
ticks | ticks Wait time in system timer ticks.
Returns
None

Definition at line 664 of file IfxStm.h.


iLLD_TC26B: Comparator Functions

Functions
Comparator Functions
iLLD » STM » Standard Driver
Collaboration diagram for Comparator Functions:

Functions

IFX_INLINE uint32 | IfxStm_getCompare (Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMicroseconds (Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMilliseconds (Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency. More...
IFX_INLINE void | IfxStm_increaseCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks. More...
IFX_INLINE void | IfxStm_updateCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value. More...
IFX_EXTERN void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
IFX_EXTERN void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
IFX_EXTERN void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
IFX_EXTERN boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
IFX_EXTERN void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
IFX_EXTERN boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
IFX_EXTERN void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...

Detailed Description

Function Documentation

◆ IfxStm_clearCompareFlag()

IFX_EXTERN void IfxStm_clearCompareFlag | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Clear the compare interrupt flag.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 35 of file IfxStm.c.

Referenced by IfxStm_initCompare(), IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_init().

◆ IfxStm_disableComparatorInterrupt()

IFX_EXTERN void IfxStm_disableComparatorInterrupt | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Disables the compare interrupt.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 48 of file IfxStm.c.

Referenced by IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_stop().

◆ IfxStm_enableComparatorInterrupt()

IFX_EXTERN void IfxStm_enableComparatorInterrupt | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Enables the compare interrupt .

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
None

Definition at line 71 of file IfxStm.c.

Referenced by IfxStm_initCompare(), and IfxStm_Timer_run().

◆ IfxStm_getCompare()

IFX_INLINE uint32 IfxStm_getCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Returns the updated compare register value.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
The compare value

Definition at line 537 of file IfxStm.h.

◆ IfxStm_getSrcPointer()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxStm_getSrcPointer | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

get the interrupt source pointer for the comparator.

Parameters
stm | pointer to the STM registers
comparator | comparator selection comparator
Returns
pointer to the interrupt source

Definition at line 132 of file IfxStm.c.

Referenced by IfxStm_Timer_init().

◆ IfxStm_getTicksFromMicroseconds()

IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds | ( | Ifx_STM * | stm,
 |  | uint32 | microSeconds
 | ) |  |

Returns the number of ticks for the selected micro seconds based on the STM frequency.

Parameters
stm | pointer to System timer module registers.
microSeconds | Number of micro seconds that need to be converted to ticks
Returns
ticks

Definition at line 606 of file IfxStm.h.

◆ IfxStm_getTicksFromMilliseconds()

IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds | ( | Ifx_STM * | stm,
 |  | uint32 | milliSeconds
 | ) |  |

Returns the number of ticks for the selected milli seconds based on the STM frequency.

Parameters
stm | pointer to System timer module registers.
milliSeconds | Number of micro seconds that need to be converted to ticks
Returns
ticks

Definition at line 613 of file IfxStm.h.

◆ IfxStm_increaseCompare()

IFX_INLINE void IfxStm_increaseCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | uint32 | ticks
 | ) |  |

Update the compare register value increased with given ticks.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
ticks | count for next comparison from current timer count.
Returns
None

Definition at line 620 of file IfxStm.h.

◆ IfxStm_initCompare()

IFX_EXTERN boolean IfxStm_initCompare | ( | Ifx_STM * | stm,
 |  | const IfxStm_CompareConfig * | config
 | ) |  |

Initialise stm compare register.

Parameters
stm | pointer to System timer module registers.
config | pointer to configuration structure.
Returns
TRUE if Comparator successful otherwise FLASE.

Definition at line 140 of file IfxStm.c.

◆ IfxStm_initCompareConfig()

IFX_EXTERN void IfxStm_initCompareConfig ( IfxStm_CompareConfig * config )

Initialise compare configuration with default values.

Parameters
config pointer to configuration structure.
Returns
None

Definition at line 206 of file IfxStm.c.

◆ IfxStm_isCompareFlagSet()

IFX_EXTERN boolean IfxStm_isCompareFlagSet | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator
 | ) |  |

Indicates if the compare interrupt flag is set.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
Returns
TRUE if the comparator flag is set

Definition at line 218 of file IfxStm.c.

Referenced by IfxStm_Timer_acknowledgeTimerIrq().

◆ IfxStm_setCompareControl()

IFX_EXTERN void IfxStm_setCompareControl | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | IfxStm_ComparatorOffset | offset,
 |  | IfxStm_ComparatorSize | size,
 |  | IfxStm_ComparatorInterrupt | interrupt
 | ) |  |

Set the compare behavior.

Parameters
stm | pointer to System timer module registers
comparator | comparator selection comparator
offset | Comparator start bit position
size | Size of compare value to compare with timer
interrupt | Comparator Interrupt request source defined
Returns
None

Definition at line 251 of file IfxStm.c.

Referenced by IfxStm_Timer_init().

◆ IfxStm_updateCompare()

IFX_INLINE void IfxStm_updateCompare | ( | Ifx_STM * | stm,
 |  | IfxStm_Comparator | comparator,
 |  | uint32 | ticks
 | ) |  |

Update the compare register value.

Parameters
stm | pointer to System timer module registers.
comparator | comparator selection comparator.
ticks | count for next comparison.
Returns
None

Definition at line 658 of file IfxStm.h.

Referenced by IfxStm_Timer_acknowledgeTimerIrq(), and IfxStm_Timer_run().


iLLD_TC26B: How to use the Stm driver?

How to use the Stm driver?
iLLD » STM
Collaboration diagram for How to use the Stm driver?:

The Stm Standard driver provides APIs to initialize, configure and control the Stm.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Stm/Std/IfxStm.h>

Variables

Declare STM variables :

Ifx_STM *stmSfr;
IfxStm_CompareConfig stmConfig;

Interrupt Handler Installation

See also How to define Interrupts?

Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:

// priorities are normally defined in Ifx_IntPrioDef.h
#define IFX_INTPRIO_STM0_SR0 10

Add the interrupt service routines to your C code. They have to call the Stm interrupt handlers: please take care in choosing number of ticks, the below example code will raise an interrupt evry time the specified number of ticks have been elapsed.

IFX_INTERRUPT(stm0Sr0ISR, 0, IFX_INTPRIO_STM0_SR0)
{
IfxStm_clearCompareFlag(stmSfr, stmConfig.comparator);
IfxStm_increaseCompare(stmSfr, stmConfig.comparator, stmConfig.ticks);
}

Finally install the interrupt handlers in your initialisation function:

// install interrupt handlers
IfxCpu_Irq_installInterruptHandler(&stm0Sr0ISR, IFX_INTPRIO_STM0_SR0);
IfxCpu_enableInterrupts();

Module Initialisation

The STM module can be configured to generate an interrupt at every compare match of the selected comaparator with the desired compare value, the interrupt can further be routed to other comparator.

The module initialisation can be done as followed.

stmSfr = &MODULE_STM0;
IfxStm_initCompareConfig(&stmConfig);
// configure to generate interrupt every 10 us
sint32 ticks = IfxStm_getTicksFromMicroseconds(10);
stmConfig.ticks = ticks;
stmConfig.triggerPriority = IFX_INTPRIO_STM0_SR0;
stmConfig.typeOfService = IfxSrc_Tos_cpu0;
IfxStm_initCompare(stmSfr, &stmConfig);

Now the Stm shall generate interrupts regularly based on the configured time !


iLLD_TC26B: STM Timer Interface

Modules
STM Timer Interface
iLLD » STM
Collaboration diagram for STM Timer Interface:

Modules

STM Timer Data Structures
global function

Detailed Description


iLLD_TC26B: STM Timer Data Structures

Data Structures
STM Timer Data Structures
iLLD » STM » STM Timer Interface
Collaboration diagram for STM Timer Data Structures:

Data Structures

struct | IfxStm_Timer_Base
Structure for the timer base. More...
struct | IfxStm_Timer
Timer interface. More...
struct | IfxStm_Timer_Config
configuration structure for Timer More...

Detailed Description

Data Structure Documentation

◆ IfxStm_Timer_Base

struct IfxStm_Timer_Base

Structure for the timer base.

Definition at line 109 of file IfxStm_Timer.h.

Data Fields
float32 | clockFreq | Timer input clock frequency (cached value)
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
Ifx_TimerValue | period | Timer period in ticks (cached value)
boolean | singleShot | If TRUE, the timer will stop after 1st event.
boolean | triggerEnabled | If TRUE, the trigger functionality is Initialized.

◆ IfxStm_Timer

struct IfxStm_Timer

Timer interface.

Definition at line 124 of file IfxStm_Timer.h.

Collaboration diagram for IfxStm_Timer:
[legend]
Data Fields
IfxStm_Timer_Base | base | Timer interface.
IfxStm_Comparator | comparator | Comparator used for the timer functionality.
uint8 | comparatorShift | Comparator shift.
uint32 | comparatorValue | Value of the comparator for the next event.
Ifx_STM * | stm | STM module used for the timer functionality.

◆ IfxStm_Timer_Config

struct IfxStm_Timer_Config

configuration structure for Timer

Definition at line 135 of file IfxStm_Timer.h.

Collaboration diagram for IfxStm_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_Config | base | Standard interface timer configuration.
IfxStm_Comparator | comparator | Comparator used for the timer functionality.
Ifx_STM * | stm | STM module used for the timer functionality.


iLLD_TC26B: global function

Functions
global function
iLLD » STM » STM Timer Interface
Collaboration diagram for global function:

Functions

IFX_EXTERN boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
IFX_EXTERN float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
IFX_EXTERN float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
IFX_EXTERN Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
IFX_EXTERN float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
IFX_EXTERN void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
IFX_EXTERN boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
IFX_EXTERN void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
IFX_EXTERN boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
IFX_EXTERN void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

Function Documentation

◆ IfxStm_Timer_acknowledgeTimerIrq()

IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq ( IfxStm_Timer * driver )

Returns the timer event see IfxStdIf_Timer_AckTimerIrq.

Parameters
driver STM Timer interface Handle
Returns
Timer interrupt event

Definition at line 36 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getFrequency()

IFX_EXTERN float32 IfxStm_Timer_getFrequency ( IfxStm_Timer * driver )

Returns the frequency see IfxStdIf_Timer_GetFrequency.

Parameters
driver STM Timer interface Handle
Returns
Frequency

Definition at line 62 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getInputFrequency()

IFX_EXTERN float32 IfxStm_Timer_getInputFrequency ( IfxStm_Timer * driver )

Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.

Parameters
driver STM Timer interface Handle
Returns
Frequency

Definition at line 68 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getPeriod()

IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod ( IfxStm_Timer * driver )

Returns the period of the timer see IfxStdIf_Timer_GetPeriod.

Parameters
driver STM Timer interface Handle
Returns
Period

Definition at line 74 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_getResolution()

IFX_EXTERN float32 IfxStm_Timer_getResolution ( IfxStm_Timer * driver )

Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.

Parameters
driver STM Timer interface handle
Returns
Resolution

Definition at line 80 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_init()

IFX_EXTERN boolean IfxStm_Timer_init | ( | IfxStm_Timer * | driver,
 |  | const IfxStm_Timer_Config * | config
 | ) |  |

Initialises the timer object.

Parameters
driver | STM Timer interface Handle
config | Configuration structure for STM Timer
Returns
TRUE on success else FALSE

Definition at line 163 of file IfxStm_Timer.c.

◆ IfxStm_Timer_initConfig()

IFX_EXTERN void IfxStm_Timer_initConfig | ( | IfxStm_Timer_Config * | config,
 |  | Ifx_STM * | stm
 | ) |  |

Initializes the configuration structure to default.

Parameters
config | Configuration structure for STM Timer
stm | Pointer to STM module
Returns
None

Definition at line 223 of file IfxStm_Timer.c.

◆ IfxStm_Timer_run()

IFX_EXTERN void IfxStm_Timer_run ( IfxStm_Timer * driver )

Runs the timer see IfxStdIf_Timer_Run.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 86 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setFrequency()

IFX_EXTERN boolean IfxStm_Timer_setFrequency | ( | IfxStm_Timer * | driver,
 |  | float32 | frequency
 | ) |  |

Sets the Frequency see IfxStdIf_Timer_SetFrequency.

Parameters
driver | STM Timer interface Handle
frequency | frequency
Returns
TRUE on success else FALSE

Definition at line 102 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_init(), and IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setPeriod()

IFX_EXTERN boolean IfxStm_Timer_setPeriod | ( | IfxStm_Timer * | driver,
 |  | Ifx_TimerValue | period
 | ) |  |

Sets the period for the timer see IfxStdIf_Timer_SetPeriod.

Parameters
driver | STM Timer interface handle
period | Period value
Returns
TRUE on success else FALSE

Definition at line 110 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_setFrequency(), and IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_setSingleMode()

IFX_EXTERN void IfxStm_Timer_setSingleMode | ( | IfxStm_Timer * | driver,
 |  | boolean | enabled
 | ) |  |

Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.

Parameters
driver | STM Timer interface Handle
enabled | If TRUE, sets the single shot mode
Returns
None

Definition at line 118 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_stdIfTimerInit()

IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit | ( | IfxStdIf_Timer * | stdif,
 |  | IfxStm_Timer * | driver
 | ) |  |

Initializes the standard interface timer.

Parameters
stdif | Standard interface object, will be initialized by the function
driver | driver Interface driver to be used by the standard interface. must be initialised separately
Returns
TRUE on success else FALSE

Definition at line 124 of file IfxStm_Timer.c.

◆ IfxStm_Timer_stop()

IFX_EXTERN void IfxStm_Timer_stop ( IfxStm_Timer * driver )

Stops the timer see IfxStdIf_Timer_Stop.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 149 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().

◆ IfxStm_Timer_updateInputFrequency()

IFX_EXTERN void IfxStm_Timer_updateInputFrequency ( IfxStm_Timer * driver )

Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.

Parameters
driver STM Timer interface Handle
Returns
None

Definition at line 155 of file IfxStm_Timer.c.

Referenced by IfxStm_Timer_init(), and IfxStm_Timer_stdIfTimerInit().


iLLD_TC26B: IfxStm_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxStm_cfg.h File Reference
iLLD » STM

STM on-chip implementation data. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxStm_reg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxStm_cfg.h:

Go to the source code of this file.

Macros

#define | IFXSTM_NUM_MODULES 2
STM count. More...
#define | IFXSTM_NUM_COMPARATORS (2)
No Of Comparators per Stm. More...

Enumerations

enum IfxStm_Index {
IfxStm_Index_none = -1,
IfxStm_Index_0 = 0,
IfxStm_Index_1
}
List of the available STM resources. More...

Variables

IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

STM on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStm_cfg.h.

Macro Definition Documentation

◆ IFXSTM_NUM_COMPARATORS

#define IFXSTM_NUM_COMPARATORS (2)

No Of Comparators per Stm.

Definition at line 57 of file IfxStm_cfg.h.

◆ IFXSTM_NUM_MODULES

#define IFXSTM_NUM_MODULES 2

STM count.

Definition at line 53 of file IfxStm_cfg.h.

Referenced by IfxStm_getAddress(), and IfxStm_getIndex().


iLLD_TC26B: IfxStm.h File Reference

  • Stm
  • Std
Data Structures | Enumerations | Functions
IfxStm.h File Reference
iLLD » STM

STM basic functionality. More...

#include "_Impl/IfxStm_cfg.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxStm.h:

Go to the source code of this file.

Data Structures

struct IfxStm_CompareConfig
Comparator Configuration Structure. More...

Enumerations

enum IfxStm_Comparator {
IfxStm_Comparator_0 = 0,
IfxStm_Comparator_1
}
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2) More...
enum IfxStm_ComparatorInterrupt {
IfxStm_ComparatorInterrupt_ir0 = 0,
IfxStm_ComparatorInterrupt_ir1 = 1
}
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1) More...
enum IfxStm_ComparatorOffset {
IfxStm_ComparatorOffset_0 = 0,
IfxStm_ComparatorOffset_1,
IfxStm_ComparatorOffset_2,
IfxStm_ComparatorOffset_3,
IfxStm_ComparatorOffset_4,
IfxStm_ComparatorOffset_5,
IfxStm_ComparatorOffset_6,
IfxStm_ComparatorOffset_7,
IfxStm_ComparatorOffset_8,
IfxStm_ComparatorOffset_9,
IfxStm_ComparatorOffset_10,
IfxStm_ComparatorOffset_11,
IfxStm_ComparatorOffset_12,
IfxStm_ComparatorOffset_13,
IfxStm_ComparatorOffset_14,
IfxStm_ComparatorOffset_15,
IfxStm_ComparatorOffset_16,
IfxStm_ComparatorOffset_17,
IfxStm_ComparatorOffset_18,
IfxStm_ComparatorOffset_19,
IfxStm_ComparatorOffset_20,
IfxStm_ComparatorOffset_21,
IfxStm_ComparatorOffset_22,
IfxStm_ComparatorOffset_23,
IfxStm_ComparatorOffset_24,
IfxStm_ComparatorOffset_25,
IfxStm_ComparatorOffset_26,
IfxStm_ComparatorOffset_27,
IfxStm_ComparatorOffset_28,
IfxStm_ComparatorOffset_29,
IfxStm_ComparatorOffset_30,
IfxStm_ComparatorOffset_31
}
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2) More...
enum IfxStm_ComparatorSize {
IfxStm_ComparatorSize_1Bit = 0,
IfxStm_ComparatorSize_2Bits = 1,
IfxStm_ComparatorSize_3Bits = 2,
IfxStm_ComparatorSize_4Bits = 3,
IfxStm_ComparatorSize_5Bits = 4,
IfxStm_ComparatorSize_6Bits = 5,
IfxStm_ComparatorSize_7Bits = 6,
IfxStm_ComparatorSize_8Bits = 7,
IfxStm_ComparatorSize_9Bits = 8,
IfxStm_ComparatorSize_10Bits = 9,
IfxStm_ComparatorSize_11Bits = 10,
IfxStm_ComparatorSize_12Bits = 11,
IfxStm_ComparatorSize_13Bits = 12,
IfxStm_ComparatorSize_14Bits = 13,
IfxStm_ComparatorSize_15Bits = 14,
IfxStm_ComparatorSize_16Bits = 15,
IfxStm_ComparatorSize_17Bits = 16,
IfxStm_ComparatorSize_18Bits = 17,
IfxStm_ComparatorSize_19Bits = 18,
IfxStm_ComparatorSize_20Bits = 19,
IfxStm_ComparatorSize_21Bits = 20,
IfxStm_ComparatorSize_22Bits = 21,
IfxStm_ComparatorSize_23Bits = 22,
IfxStm_ComparatorSize_24Bits = 23,
IfxStm_ComparatorSize_25Bits = 24,
IfxStm_ComparatorSize_26Bits = 25,
IfxStm_ComparatorSize_27Bits = 26,
IfxStm_ComparatorSize_28Bits = 27,
IfxStm_ComparatorSize_29Bits = 28,
IfxStm_ComparatorSize_30Bits = 29,
IfxStm_ComparatorSize_31Bits = 30,
IfxStm_ComparatorSize_32Bits = 31
}
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2) More...
enum IfxStm_SleepMode {
IfxStm_SleepMode_enable = 0,
IfxStm_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_STM.CLC.B.EDIS. More...
enum IfxStm_SuspendMode {
IfxStm_SuspendMode_none = 0,
IfxStm_SuspendMode_hard = 1,
IfxStm_SuspendMode_soft = 2
}
OCDS Suspend Control (OCDS.SUS) More...

Functions

IFX_INLINE uint64 | IfxStm_get (Ifx_STM *stm)
Returns system timer value. More...
IFX_INLINE float32 | IfxStm_getFrequency (Ifx_STM *stm)
Returns the system timer frequency. More...
IFX_INLINE boolean | IfxStm_isModuleSuspended (Ifx_STM *stm)
Returns the module's suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspended. More...
IFX_INLINE void | IfxStm_setSuspendMode (Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective. More...
IFX_EXTERN void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
IFX_EXTERN void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. More...
IFX_EXTERN Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IFX_EXTERN IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...
IFX_INLINE uint32 | IfxStm_getLower (Ifx_STM *stm)
Returns the lower system timer value. More...
IFX_INLINE uint32 | IfxStm_getOffset12Timer (Ifx_STM *stm)
Gets the TIM3 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset16Timer (Ifx_STM *stm)
Gets the TIM4 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset20Timer (Ifx_STM *stm)
Gets the TIM5 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset32Timer (Ifx_STM *stm)
Gets the TIM6 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset4Timer (Ifx_STM *stm)
Gets the TIM1 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffset8Timer (Ifx_STM *stm)
Gets the TIM2 couter value. More...
IFX_INLINE uint32 | IfxStm_getOffsetTimer (Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset. More...
IFX_INLINE void | IfxStm_waitTicks (Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks. More...
IFX_INLINE uint32 | IfxStm_getCompare (Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMicroseconds (Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency. More...
IFX_INLINE sint32 | IfxStm_getTicksFromMilliseconds (Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency. More...
IFX_INLINE void | IfxStm_increaseCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks. More...
IFX_INLINE void | IfxStm_updateCompare (Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value. More...
IFX_EXTERN void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
IFX_EXTERN void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
IFX_EXTERN void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
IFX_EXTERN boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
IFX_EXTERN void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
IFX_EXTERN boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
IFX_EXTERN void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...
IFX_INLINE void | IfxStm_setSleepMode (Ifx_STM *stm, IfxStm_SleepMode mode)
IFX_EXTERN void | IfxStm_resetModule (Ifx_STM *stm)

Detailed Description

STM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStm.h.

Function Documentation

◆ IfxStm_resetModule()

IFX_EXTERN void IfxStm_resetModule ( Ifx_STM * stm )
Parameters
stm pointer to STM registers
Returns
None

Definition at line 231 of file IfxStm.c.

◆ IfxStm_setSleepMode()

IFX_INLINE void IfxStm_setSleepMode | ( | Ifx_STM * | stm,
 |  | IfxStm_SleepMode | mode
 | ) |  |
Parameters
stm | pointer STM registers
mode | mode selection (enable/ disable)
Returns
None

Definition at line 638 of file IfxStm.h.


iLLD_TC26B: IfxStm_Timer.h File Reference

  • Stm
  • Timer
Data Structures | Functions
IfxStm_Timer.h File Reference
iLLD » STM

STM TIMER details. More...

#include "Stm/Std/IfxStm.h"
#include "StdIf/IfxStdIf_Timer.h"
Include dependency graph for IfxStm_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxStm_Timer_Base
Structure for the timer base. More...
struct | IfxStm_Timer
Timer interface. More...
struct | IfxStm_Timer_Config
configuration structure for Timer More...

Functions

IFX_EXTERN boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
IFX_EXTERN float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
IFX_EXTERN float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
IFX_EXTERN Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
IFX_EXTERN float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
IFX_EXTERN void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
IFX_EXTERN boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
IFX_EXTERN void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
IFX_EXTERN boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
IFX_EXTERN void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
IFX_EXTERN void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
IFX_EXTERN boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
IFX_EXTERN void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

STM TIMER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

The timer driver enabled the generation of periodical interrupt based on the STM module.

The driver is initialized with IfxStm_Timer_init(). After initialization, the timer is started with IfxStm_Timer_run() and stopped with IfxStm_Timer_stop(). Single shot can be set with IfxStm_Timer_setSingleMode(), in case the timer is already running it will stop after the next event, else the timer event will occur only once.

The timer interrupt must call the IfxStm_Timer_acknowledgeTimerIrq() function which clears the interrupt flag and set the next compare value.

Changing the period with IfxStm_Timer_setPeriod() or IfxStm_Timer_setFrequency() will take effect only after the next timer event.

This driver implements a subset of the functionalities defined by Standard interface: Timer. If does supports the timer with interrupt but not the trigger signal.

The user is free to use either the driver specific APIs below or to used the standard interface APIs.

Specific implementation

For a detailed configuration of the microcontroller, see IfxStm_Timer_init().

Usage example

Initialization and interrupt:

#define ISR_PRIORITY_TIMER_1MS (2)
#define ISR_PROVIDER_TIMER_1MS IfxSrc_Tos_cpu0
#define INTERRUPT_TIMER_1MS ISR_ASSIGN(ISR_PRIORITY_TIMER_1MS, ISR_PROVIDER_TIMER_1MS)
IfxStm_Timer myTimer;
boolean AppInit_1ms(void)
{
boolean result = TRUE;
IfxStm_Timer_Config timerConfig;
IfxStm_Timer_initConfig(&timerConfig, &MODULE_STM0);
timerConfig.base.frequency = 1000;
timerConfig.base.isrPriority = ISR_PRIORITY(INTERRUPT_TIMER_1MS);
timerConfig.base.isrProvider = ISR_PROVIDER(INTERRUPT_TIMER_1MS);
timerConfig.base.minResolution = (1.0 / timerConfig.base.frequency) / 1000;
timerConfig.comparator = IfxStm_Comparator_0;
result = IfxStm_Timer_init(&myTimer, &timerConfig);
return result;
}
IFX_INTERRUPT(ISR_TIMER_1ms, 0, ISR_PRIORITY_TIMER_1MS)
{
__enable();
IfxStm_Timer_acknowledgeTimerIrq(&myTimer);
}

During run-time, the timer can be started / stopped as follow:

IfxStm_Timer_run(&myTimer);
IfxStm_Timer_stop(&myTimer);

Definition in file IfxStm_Timer.h.


iLLD_TC26B: VADC

Modules | Files
VADC
iLLD
Collaboration diagram for VADC:

Modules

Implementation
Standard Driver
VADC Pin Mapping
How to use the VADC ADC Interface driver?
Interface Driver

Files

file | IfxVadc_cfg.h
VADC on-chip implementation data.
file | IfxVadc_PinMap.c
VADC I/O map.
file | IfxVadc_PinMap.h
VADC I/O map.
file | IfxVadc_Adc.h
VADC ADC details.
file | IfxVadc.h
VADC basic functionality.

Detailed Description


iLLD_TC26B: Implementation

Implementation
iLLD » VADC
Collaboration diagram for Implementation:


iLLD_TC26B: Standard Driver

Modules
Standard Driver
iLLD » VADC
Collaboration diagram for Standard Driver:

Modules

Enumerations
Background Autoscan Functions
Channel Scan Functions
Queue Request Functions
IO Pin Configuration Functions
Frequency Calculation
Group Functions
Module Functions
Channel Functions
Emux Functions

Detailed Description


iLLD_TC26B: Enumerations

Enumerations
Enumerations
iLLD » VADC » Standard Driver
Collaboration diagram for Enumerations:

Enumerations

enum IfxVadc_AnalogConverterMode {
IfxVadc_AnalogConverterMode_off = 0,
IfxVadc_AnalogConverterMode_slowStandby = 1,
IfxVadc_AnalogConverterMode_fastStandby = 2,
IfxVadc_AnalogConverterMode_normalOperation = 3
}
Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC. More...
enum IfxVadc_ArbitrationRounds {
IfxVadc_ArbitrationRounds_4_slots = 0,
IfxVadc_ArbitrationRounds_8_slots = 1,
IfxVadc_ArbitrationRounds_16_slots = 2,
IfxVadc_ArbitrationRounds_20_slots = 3
}
Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11) More...
enum IfxVadc_BoundaryExtension {
IfxVadc_BoundaryExtension_standard = 0,
IfxVadc_BoundaryExtension_fastCompareResult1 = 1,
IfxVadc_BoundaryExtension_fastCompareResult2 = 2,
IfxVadc_BoundaryExtension_fastCompareResult3 = 3,
IfxVadc_BoundaryExtension_fastCompareResult4 = 4,
IfxVadc_BoundaryExtension_fastCompareResult5 = 5,
IfxVadc_BoundaryExtension_fastCompareResult6 = 6,
IfxVadc_BoundaryExtension_fastCompareResult7 = 7,
IfxVadc_BoundaryExtension_fastCompareResult8 = 8,
IfxVadc_BoundaryExtension_fastCompareResult9 = 9,
IfxVadc_BoundaryExtension_fastCompareResult10 = 10,
IfxVadc_BoundaryExtension_fastCompareResult11 = 11,
IfxVadc_BoundaryExtension_fastCompareResult12 = 12,
IfxVadc_BoundaryExtension_fastCompareResult13 = 13,
IfxVadc_BoundaryExtension_fastCompareResult14 = 14,
IfxVadc_BoundaryExtension_fastCompareResult15 = 15
}
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_BoundarySelection {
IfxVadc_BoundarySelection_group0 = 0,
IfxVadc_BoundarySelection_group1 = 1,
IfxVadc_BoundarySelection_global0 = 2,
IfxVadc_BoundarySelection_global1 = 3
}
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelId {
IfxVadc_ChannelId_none = -1,
IfxVadc_ChannelId_0 = 0,
IfxVadc_ChannelId_1 = 1,
IfxVadc_ChannelId_2 = 2,
IfxVadc_ChannelId_3 = 3,
IfxVadc_ChannelId_4 = 4,
IfxVadc_ChannelId_5 = 5,
IfxVadc_ChannelId_6 = 6,
IfxVadc_ChannelId_7 = 7,
IfxVadc_ChannelId_8 = 8,
IfxVadc_ChannelId_9 = 9,
IfxVadc_ChannelId_10 = 10,
IfxVadc_ChannelId_11 = 11,
IfxVadc_ChannelId_12 = 12,
IfxVadc_ChannelId_13 = 13,
IfxVadc_ChannelId_14 = 14,
IfxVadc_ChannelId_15 = 15
}
VADC Channels. More...
enum IfxVadc_ChannelReference {
IfxVadc_ChannelReference_standard = 0,
IfxVadc_ChannelReference_channel0 = 1
}
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelResolution {
IfxVadc_ChannelResolution_12bit = 0,
IfxVadc_ChannelResolution_10bit = 1,
IfxVadc_ChannelResolution_8bit = 2,
IfxVadc_ChannelResolution_10bitFast = 5
}
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1) More...
enum IfxVadc_ChannelResult {
IfxVadc_ChannelResult_0 = 0,
IfxVadc_ChannelResult_1,
IfxVadc_ChannelResult_2,
IfxVadc_ChannelResult_3,
IfxVadc_ChannelResult_4,
IfxVadc_ChannelResult_5,
IfxVadc_ChannelResult_6,
IfxVadc_ChannelResult_7,
IfxVadc_ChannelResult_8,
IfxVadc_ChannelResult_9,
IfxVadc_ChannelResult_10,
IfxVadc_ChannelResult_11,
IfxVadc_ChannelResult_12,
IfxVadc_ChannelResult_13,
IfxVadc_ChannelResult_14,
IfxVadc_ChannelResult_15
}
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelSelectionStyle {
IfxVadc_ChannelSelectionStyle_channelNumber = 0,
IfxVadc_ChannelSelectionStyle_binary = 1
}
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS. More...
enum IfxVadc_ConversionType { IfxVadc_ConversionType_Compatible = 0 }
type of conversion More...
enum IfxVadc_EmuxCodingScheme {
IfxVadc_EmuxCodingScheme_binary = 0,
IfxVadc_EmuxCodingScheme_gray = 1
}
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD. More...
enum IfxVadc_EmuxInterface {
IfxVadc_EmuxInterface_0 = 0,
IfxVadc_EmuxInterface_1 = 1
}
Specifies the Emux interface. More...
enum IfxVadc_EmuxSampleTimeControl {
IfxVadc_EmuxSampleTimeControl_settingChanges = 0,
IfxVadc_EmuxSampleTimeControl_always = 1
}
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST. More...
enum IfxVadc_EmuxSelectValue {
IfxVadc_EmuxSelectValue_0 = 0,
IfxVadc_EmuxSelectValue_1,
IfxVadc_EmuxSelectValue_2,
IfxVadc_EmuxSelectValue_3,
IfxVadc_EmuxSelectValue_4,
IfxVadc_EmuxSelectValue_5,
IfxVadc_EmuxSelectValue_6,
IfxVadc_EmuxSelectValue_7
}
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET More...
enum IfxVadc_ExternalMultiplexerMode {
IfxVadc_ExternalMultiplexerMode_softwareControl = 0,
IfxVadc_ExternalMultiplexerMode_steady = 1,
IfxVadc_ExternalMultiplexerMode_singleStep = 2,
IfxVadc_ExternalMultiplexerMode_sequence = 3
}
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE. More...
enum IfxVadc_FifoMode {
IfxVadc_FifoMode_seperateResultRegister = 0,
IfxVadc_FifoMode_fifoStructure = 1,
IfxVadc_FifoMode_maximumMode = 2,
IfxVadc_FifoMode_minimumMode = 3
}
FIFO mode enable. More...
enum IfxVadc_GatingMode {
IfxVadc_GatingMode_disabled = 0,
IfxVadc_GatingMode_always = 1,
IfxVadc_GatingMode_gatingHigh = 2,
IfxVadc_GatingMode_gatingLow = 3
}
gating mode defined in MODULE_VADC.BRSMR.ENGT More...
enum IfxVadc_GatingSource {
IfxVadc_GatingSource_0 = 0,
IfxVadc_GatingSource_1,
IfxVadc_GatingSource_2,
IfxVadc_GatingSource_3,
IfxVadc_GatingSource_4,
IfxVadc_GatingSource_5,
IfxVadc_GatingSource_6,
IfxVadc_GatingSource_7,
IfxVadc_GatingSource_8,
IfxVadc_GatingSource_9,
IfxVadc_GatingSource_10,
IfxVadc_GatingSource_11,
IfxVadc_GatingSource_12,
IfxVadc_GatingSource_13,
IfxVadc_GatingSource_14,
IfxVadc_GatingSource_15
}
External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7) More...
enum IfxVadc_InputClasses {
IfxVadc_InputClasses_group0 = 0,
IfxVadc_InputClasses_group1 = 1,
IfxVadc_InputClasses_global0 = 2,
IfxVadc_InputClasses_global1 = 3
}
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_LimitCheck {
IfxVadc_LimitCheck_noCheck = 0,
IfxVadc_LimitCheck_eventIfInArea = 1,
IfxVadc_LimitCheck_eventIfOutsideArea = 2,
IfxVadc_LimitCheck_always = 3
}
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_LowSupplyVoltageSelect {
IfxVadc_LowSupplyVoltageSelect_5V = 0,
IfxVadc_LowSupplyVoltageSelect_3V = 1
}
Low Power Supply Voltage Select. More...
enum IfxVadc_Protection {
IfxVadc_Protection_channelControl0 = 0,
IfxVadc_Protection_channelControl1 = 1,
IfxVadc_Protection_channelControl2 = 2,
IfxVadc_Protection_channelControl3 = 3,
IfxVadc_Protection_channelControl4 = 4,
IfxVadc_Protection_channelControl5 = 5,
IfxVadc_Protection_channelControl6 = 6,
IfxVadc_Protection_channelControl7 = 7,
IfxVadc_Protection_channelControl8 = 8,
IfxVadc_Protection_channelControl9 = 9,
IfxVadc_Protection_channelControl10 = 10,
IfxVadc_Protection_channelControl11 = 11,
IfxVadc_Protection_channelControl12 = 12,
IfxVadc_Protection_channelControl13 = 13,
IfxVadc_Protection_channelControl14 = 14,
IfxVadc_Protection_externalMultiplexer = 15,
IfxVadc_Protection_initGroup0 = 16,
IfxVadc_Protection_initGroup1 = 17,
IfxVadc_Protection_initGroup2 = 18,
IfxVadc_Protection_initGroup3 = 19,
IfxVadc_Protection_initGroup4 = 20,
IfxVadc_Protection_initGroup5 = 21,
IfxVadc_Protection_initGroup6 = 22,
IfxVadc_Protection_initGroup7 = 23,
IfxVadc_Protection_initGroup8 = 24,
IfxVadc_Protection_initGroup9 = 25,
IfxVadc_Protection_initGroup10 = 26,
IfxVadc_Protection_initGroup11 = 27,
IfxVadc_Protection_initGroup12 = 28,
IfxVadc_Protection_initGroup13 = 29,
IfxVadc_Protection_initGroup14 = 30,
IfxVadc_Protection_globalConfig = 31,
IfxVadc_Protection_serviceGroup0 = 32,
IfxVadc_Protection_serviceGroup1 = 33,
IfxVadc_Protection_serviceGroup2 = 34,
IfxVadc_Protection_serviceGroup3 = 35,
IfxVadc_Protection_serviceGroup4 = 36,
IfxVadc_Protection_serviceGroup5 = 37,
IfxVadc_Protection_serviceGroup6 = 38,
IfxVadc_Protection_serviceGroup7 = 39,
IfxVadc_Protection_serviceGroup8 = 40,
IfxVadc_Protection_serviceGroup9 = 41,
IfxVadc_Protection_serviceGroup10 = 42,
IfxVadc_Protection_serviceGroup11 = 43,
IfxVadc_Protection_serviceGroup12 = 44,
IfxVadc_Protection_serviceGroup13 = 45,
IfxVadc_Protection_serviceGroup14 = 46,
IfxVadc_Protection_testFunction = 47,
IfxVadc_Protection_resultRegisterGroup0 = 48,
IfxVadc_Protection_resultRegisterGroup1 = 49,
IfxVadc_Protection_resultRegisterGroup2 = 50,
IfxVadc_Protection_resultRegisterGroup3 = 51,
IfxVadc_Protection_resultRegisterGroup4 = 52,
IfxVadc_Protection_resultRegisterGroup5 = 53,
IfxVadc_Protection_resultRegisterGroup6 = 54,
IfxVadc_Protection_resultRegisterGroup7 = 55,
IfxVadc_Protection_resultRegisterGroup8 = 56,
IfxVadc_Protection_resultRegisterGroup9 = 57,
IfxVadc_Protection_resultRegisterGroup10 = 58,
IfxVadc_Protection_resultRegisterGroup11 = 59,
IfxVadc_Protection_resultRegisterGroup12 = 60,
IfxVadc_Protection_resultRegisterGroup13 = 61,
IfxVadc_Protection_resultRegisterGroup14 = 62
}
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U. More...
enum IfxVadc_RequestSlotPriority {
IfxVadc_RequestSlotPriority_lowest = 0,
IfxVadc_RequestSlotPriority_low = 1,
IfxVadc_RequestSlotPriority_high = 2,
IfxVadc_RequestSlotPriority_highest = 3
}
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2) More...
enum IfxVadc_RequestSlotStartMode {
IfxVadc_RequestSlotStartMode_waitForStart = 0,
IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1
}
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2) More...
enum IfxVadc_RequestSource {
IfxVadc_RequestSource_queue = 0,
IfxVadc_RequestSource_scan = 1,
IfxVadc_RequestSource_background = 2
}
Request sources. More...
enum IfxVadc_SleepMode {
IfxVadc_SleepMode_enable = 0,
IfxVadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_VADC.CLC.B.EDIS. More...
enum IfxVadc_SrcNr {
IfxVadc_SrcNr_group0 = 0,
IfxVadc_SrcNr_group1 = 1,
IfxVadc_SrcNr_group2 = 2,
IfxVadc_SrcNr_group3 = 3,
IfxVadc_SrcNr_shared0 = 4,
IfxVadc_SrcNr_shared1 = 5,
IfxVadc_SrcNr_shared2 = 6,
IfxVadc_SrcNr_shared3 = 7
}
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11) More...
enum IfxVadc_Status {
IfxVadc_Status_noError = 0,
IfxVadc_Status_notInitialised = 1,
IfxVadc_Status_invalidGroup = 2,
IfxVadc_Status_invalidChannel = 3,
IfxVadc_Status_queueFull = 4,
IfxVadc_Status_noAccess = 5,
IfxVadc_Status_channelsStillPending = 6
}
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx More...
enum IfxVadc_TriggerMode {
IfxVadc_TriggerMode_noExternalTrigger = 0,
IfxVadc_TriggerMode_uponFallingEdge = 1,
IfxVadc_TriggerMode_uponRisingEdge = 2,
IfxVadc_TriggerMode_uponAnyEdge = 3
}
trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11) More...
enum IfxVadc_TriggerSource {
IfxVadc_TriggerSource_0 = 0,
IfxVadc_TriggerSource_1,
IfxVadc_TriggerSource_2,
IfxVadc_TriggerSource_3,
IfxVadc_TriggerSource_4,
IfxVadc_TriggerSource_5,
IfxVadc_TriggerSource_6,
IfxVadc_TriggerSource_7,
IfxVadc_TriggerSource_8,
IfxVadc_TriggerSource_9,
IfxVadc_TriggerSource_10,
IfxVadc_TriggerSource_11,
IfxVadc_TriggerSource_12,
IfxVadc_TriggerSource_13,
IfxVadc_TriggerSource_14,
IfxVadc_TriggerSource_15
}
Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7) More...

Detailed Description

Enumeration Type Documentation

◆ IfxVadc_AnalogConverterMode

enum IfxVadc_AnalogConverterMode

Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC.

Enumerator
IfxVadc_AnalogConverterMode_off | Analog Converter off.
IfxVadc_AnalogConverterMode_slowStandby | Slow Standby Mode.
IfxVadc_AnalogConverterMode_fastStandby | Fast Standby Mode.
IfxVadc_AnalogConverterMode_normalOperation | Normal operation mode.

Definition at line 70 of file IfxVadc.h.

◆ IfxVadc_ArbitrationRounds

enum IfxVadc_ArbitrationRounds

Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)

Enumerator
IfxVadc_ArbitrationRounds_4_slots | An arbitration round contains 4 arbitration slots.
IfxVadc_ArbitrationRounds_8_slots | An arbitration round contains 8 arbitration slots.
IfxVadc_ArbitrationRounds_16_slots | An arbitration round contains 16 arbitration slots.
IfxVadc_ArbitrationRounds_20_slots | An arbitration round contains 20 arbitration slots.

Definition at line 80 of file IfxVadc.h.

◆ IfxVadc_BoundaryExtension

enum IfxVadc_BoundaryExtension

Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_BoundaryExtension_standard | Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
IfxVadc_BoundaryExtension_fastCompareResult1 | Fast compare mode use as upper boundary Channel result 1.
IfxVadc_BoundaryExtension_fastCompareResult2 | Fast compare mode use as upper boundary Channel result 2.
IfxVadc_BoundaryExtension_fastCompareResult3 | Fast compare mode use as upper boundary Channel result 3.
IfxVadc_BoundaryExtension_fastCompareResult4 | Fast compare mode use as upper boundary Channel result 4.
IfxVadc_BoundaryExtension_fastCompareResult5 | Fast compare mode use as upper boundary Channel result 5.
IfxVadc_BoundaryExtension_fastCompareResult6 | Fast compare mode use as upper boundary Channel result 6.
IfxVadc_BoundaryExtension_fastCompareResult7 | Fast compare mode use as upper boundary Channel result 7.
IfxVadc_BoundaryExtension_fastCompareResult8 | Fast compare mode use as upper boundary Channel result 8.
IfxVadc_BoundaryExtension_fastCompareResult9 | Fast compare mode use as upper boundary Channel result 9.
IfxVadc_BoundaryExtension_fastCompareResult10 | Fast compare mode use as upper boundary Channel result 10.
IfxVadc_BoundaryExtension_fastCompareResult11 | Fast compare mode use as upper boundary Channel result 11.
IfxVadc_BoundaryExtension_fastCompareResult12 | Fast compare mode use as upper boundary Channel result 12.
IfxVadc_BoundaryExtension_fastCompareResult13 | Fast compare mode use as upper boundary Channel result 13.
IfxVadc_BoundaryExtension_fastCompareResult14 | Fast compare mode use as upper boundary Channel result 14.
IfxVadc_BoundaryExtension_fastCompareResult15 | Fast compare mode use as upper boundary Channel result 15.

Definition at line 90 of file IfxVadc.h.

◆ IfxVadc_BoundarySelection

enum IfxVadc_BoundarySelection

BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_BoundarySelection_group0 | Use group class 0.
IfxVadc_BoundarySelection_group1 | Use group class 1.
IfxVadc_BoundarySelection_global0 | Use global class 0.
IfxVadc_BoundarySelection_global1 | Use global class 1.

Definition at line 112 of file IfxVadc.h.

◆ IfxVadc_ChannelId

enum IfxVadc_ChannelId

VADC Channels.

Enumerator
IfxVadc_ChannelId_none | None of VADC channels.
IfxVadc_ChannelId_0 | Channel 0.
IfxVadc_ChannelId_1 | Channel 1.
IfxVadc_ChannelId_2 | Channel 2.
IfxVadc_ChannelId_3 | Channel 3.
IfxVadc_ChannelId_4 | Channel 4.
IfxVadc_ChannelId_5 | Channel 5.
IfxVadc_ChannelId_6 | Channel 6.
IfxVadc_ChannelId_7 | Channel 7.
IfxVadc_ChannelId_8 | Channel 8.
IfxVadc_ChannelId_9 | Channel 9.
IfxVadc_ChannelId_10 | Channel 10.
IfxVadc_ChannelId_11 | Channel 11.
IfxVadc_ChannelId_12 | Channel 12.
IfxVadc_ChannelId_13 | Channel 13.
IfxVadc_ChannelId_14 | Channel 14.
IfxVadc_ChannelId_15 | Channel 15.

Definition at line 122 of file IfxVadc.h.

◆ IfxVadc_ChannelReference

enum IfxVadc_ChannelReference

ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_ChannelReference_standard | use Varef as reference
IfxVadc_ChannelReference_channel0 | use CH0 as reference

Definition at line 145 of file IfxVadc.h.

◆ IfxVadc_ChannelResolution

enum IfxVadc_ChannelResolution

ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)

Enumerator
IfxVadc_ChannelResolution_12bit | 12-bit conversion
IfxVadc_ChannelResolution_10bit | 10-bit conversion
IfxVadc_ChannelResolution_8bit | 8-bit conversion
IfxVadc_ChannelResolution_10bitFast | 10-bit cfast compare mode

Definition at line 153 of file IfxVadc.h.

◆ IfxVadc_ChannelResult

enum IfxVadc_ChannelResult

Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_ChannelResult_0 | Use Channel result 0.
IfxVadc_ChannelResult_1 | Use Channel result 1.
IfxVadc_ChannelResult_2 | Use Channel result 2.
IfxVadc_ChannelResult_3 | Use Channel result 3.
IfxVadc_ChannelResult_4 | Use Channel result 4.
IfxVadc_ChannelResult_5 | Use Channel result 5.
IfxVadc_ChannelResult_6 | Use Channel result 6.
IfxVadc_ChannelResult_7 | Use Channel result 7.
IfxVadc_ChannelResult_8 | Use Channel result 8.
IfxVadc_ChannelResult_9 | Use Channel result 9.
IfxVadc_ChannelResult_10 | Use Channel result 10.
IfxVadc_ChannelResult_11 | Use Channel result 11.
IfxVadc_ChannelResult_12 | Use Channel result 12.
IfxVadc_ChannelResult_13 | Use Channel result 13.
IfxVadc_ChannelResult_14 | Use Channel result 14.
IfxVadc_ChannelResult_15 | Use Channel result 15.

Definition at line 163 of file IfxVadc.h.

◆ IfxVadc_ChannelSelectionStyle

enum IfxVadc_ChannelSelectionStyle

External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS.

Enumerator
IfxVadc_ChannelSelectionStyle_channelNumber | selects an arbitrary channel
IfxVadc_ChannelSelectionStyle_binary | Each bit of bitfield EMUXCH selects the associated channel for EMUX control.

Definition at line 186 of file IfxVadc.h.

◆ IfxVadc_ConversionType

enum IfxVadc_ConversionType

type of conversion

Enumerator
IfxVadc_ConversionType_Compatible

Compatible Timing Mode.

Definition at line 195 of file IfxVadc.h.

◆ IfxVadc_EmuxCodingScheme

enum IfxVadc_EmuxCodingScheme

Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD.

Enumerator
IfxVadc_EmuxCodingScheme_binary | Output the Channel Number in Binary code.
IfxVadc_EmuxCodingScheme_gray | Output the channel number in gray code.

Definition at line 203 of file IfxVadc.h.

◆ IfxVadc_EmuxInterface

enum IfxVadc_EmuxInterface

Specifies the Emux interface.

Enumerator
IfxVadc_EmuxInterface_0 | Emux Interface 0.
IfxVadc_EmuxInterface_1 | Emux Interface 1.

Definition at line 211 of file IfxVadc.h.

◆ IfxVadc_EmuxSampleTimeControl

enum IfxVadc_EmuxSampleTimeControl

External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST.

Enumerator
IfxVadc_EmuxSampleTimeControl_settingChanges | Use STCE Whenever Setting Changes.
IfxVadc_EmuxSampleTimeControl_always | Use STCE for each conversion of an external channel.

Definition at line 220 of file IfxVadc.h.

◆ IfxVadc_EmuxSelectValue

enum IfxVadc_EmuxSelectValue

specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET

Enumerator
IfxVadc_EmuxSelectValue_0 | Start Selection Value 0.
IfxVadc_EmuxSelectValue_1 | Start Selection Value 1.
IfxVadc_EmuxSelectValue_2 | Start Selection Value 2.
IfxVadc_EmuxSelectValue_3 | Start Selection Value 3.
IfxVadc_EmuxSelectValue_4 | Start Selection Value 4.
IfxVadc_EmuxSelectValue_5 | Start Selection Value 5.
IfxVadc_EmuxSelectValue_6 | Start Selection Value 6.
IfxVadc_EmuxSelectValue_7 | Start Selection Value 7.

Definition at line 229 of file IfxVadc.h.

◆ IfxVadc_ExternalMultiplexerMode

enum IfxVadc_ExternalMultiplexerMode

Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE.

Enumerator
IfxVadc_ExternalMultiplexerMode_softwareControl | Disable The Emux Control.
IfxVadc_ExternalMultiplexerMode_steady | select steady mode
IfxVadc_ExternalMultiplexerMode_singleStep | Select single step mode.
IfxVadc_ExternalMultiplexerMode_sequence | Select Sequence Mode.

Definition at line 244 of file IfxVadc.h.

◆ IfxVadc_FifoMode

enum IfxVadc_FifoMode

FIFO mode enable.

Enumerator
IfxVadc_FifoMode_seperateResultRegister | seperate Result Register
IfxVadc_FifoMode_fifoStructure | fifoStructure
IfxVadc_FifoMode_maximumMode | copy new result if bigger
IfxVadc_FifoMode_minimumMode | copy new result if it is smaller

Definition at line 254 of file IfxVadc.h.

◆ IfxVadc_GatingMode

enum IfxVadc_GatingMode

gating mode defined in MODULE_VADC.BRSMR.ENGT

Enumerator
IfxVadc_GatingMode_disabled | Gating is disabled, no conversion request are issued.
IfxVadc_GatingMode_always | Conversion request is issued if at least 1 conversion pending bit is set.
IfxVadc_GatingMode_gatingHigh | Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high.
IfxVadc_GatingMode_gatingLow | Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low.

Definition at line 264 of file IfxVadc.h.

◆ IfxVadc_GatingSource

enum IfxVadc_GatingSource

External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)

Enumerator
IfxVadc_GatingSource_0 | Input signal REQGTx_0.
IfxVadc_GatingSource_1 | Input signal REQGTx_1.
IfxVadc_GatingSource_2 | Input signal REQGTx_2.
IfxVadc_GatingSource_3 | Input signal REQGTx_3.
IfxVadc_GatingSource_4 | Input signal REQGTx_4.
IfxVadc_GatingSource_5 | Input signal REQGTx_5.
IfxVadc_GatingSource_6 | Input signal REQGTx_6.
IfxVadc_GatingSource_7 | Input signal REQGTx_7.
IfxVadc_GatingSource_8 | Input signal REQGTx_8.
IfxVadc_GatingSource_9 | Input signal REQGTx_9.
IfxVadc_GatingSource_10 | Input signal REQGTx_10.
IfxVadc_GatingSource_11 | Input signal REQGTx_11.
IfxVadc_GatingSource_12 | Input signal REQGTx_12.
IfxVadc_GatingSource_13 | Input signal REQGTx_13.
IfxVadc_GatingSource_14 | Input signal REQGTx_14.
IfxVadc_GatingSource_15 | Input signal REQGTx_15.

Definition at line 274 of file IfxVadc.h.

◆ IfxVadc_InputClasses

enum IfxVadc_InputClasses

inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_InputClasses_group0 | Use group class 0.
IfxVadc_InputClasses_group1 | Use group class 1.
IfxVadc_InputClasses_global0 | Use global class 0.
IfxVadc_InputClasses_global1 | Use global class 1.

Definition at line 296 of file IfxVadc.h.

◆ IfxVadc_LimitCheck

enum IfxVadc_LimitCheck

ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)

Enumerator
IfxVadc_LimitCheck_noCheck | Normal compare mode Event Never Fast Compare mode Event Never.
IfxVadc_LimitCheck_eventIfInArea | Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value)
IfxVadc_LimitCheck_eventIfOutsideArea | Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value)
IfxVadc_LimitCheck_always | Normal compare mode Event Always Fast Compare mode Event Always.

Definition at line 306 of file IfxVadc.h.

◆ IfxVadc_LowSupplyVoltageSelect

enum IfxVadc_LowSupplyVoltageSelect

Low Power Supply Voltage Select.

Enumerator
IfxVadc_LowSupplyVoltageSelect_5V | 5V Power Supply is Connected
IfxVadc_LowSupplyVoltageSelect_3V | 3.3V Power Supply is Connected

Definition at line 316 of file IfxVadc.h.

◆ IfxVadc_Protection

enum IfxVadc_Protection

Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U.

Enumerator
IfxVadc_Protection_channelControl0 | Access control for GxCHCTR0.
IfxVadc_Protection_channelControl1 | Access control for GxCHCTR1.
IfxVadc_Protection_channelControl2 | Access control for GxCHCTR2.
IfxVadc_Protection_channelControl3 | Access control for GxCHCTR3.
IfxVadc_Protection_channelControl4 | Access control for GxCHCTR4.
IfxVadc_Protection_channelControl5 | Access control for GxCHCTR5.
IfxVadc_Protection_channelControl6 | Access control for GxCHCTR6.
IfxVadc_Protection_channelControl7 | Access control for GxCHCTR7.
IfxVadc_Protection_channelControl8 | Access control for GxCHCTR8.
IfxVadc_Protection_channelControl9 | Access control for GxCHCTR9.
IfxVadc_Protection_channelControl10 | Access control for GxCHCTR10.
IfxVadc_Protection_channelControl11 | Access control for GxCHCTR11.
IfxVadc_Protection_channelControl12 | Access control for GxCHCTR12.
IfxVadc_Protection_channelControl13 | Access control for GxCHCTR13.
IfxVadc_Protection_channelControl14 | Access control for GxCHCTR14.
IfxVadc_Protection_externalMultiplexer | Access control for EMUXSEL, GxEMUXCTR.
IfxVadc_Protection_initGroup0 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup1 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup2 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup3 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup4 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup5 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup6 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup7 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup8 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup9 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup10 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup11 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup12 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup13 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_initGroup14 | Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
IfxVadc_Protection_globalConfig | Access control for GLOBCFG.
IfxVadc_Protection_serviceGroup0 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup1 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup2 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup3 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup4 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup5 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup6 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup7 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup8 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup9 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup10 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup11 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup12 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup13 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_serviceGroup14 | Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
IfxVadc_Protection_testFunction | Access control for GLOBTF.
IfxVadc_Protection_resultRegisterGroup0 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup1 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup2 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup3 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup4 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup5 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup6 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup7 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup8 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup9 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup10 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup11 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup12 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup13 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
IfxVadc_Protection_resultRegisterGroup14 | Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)

Definition at line 324 of file IfxVadc.h.

◆ IfxVadc_RequestSlotPriority

enum IfxVadc_RequestSlotPriority

Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)

Enumerator
IfxVadc_RequestSlotPriority_lowest | Lowest priority.
IfxVadc_RequestSlotPriority_low | Lowpriority.
IfxVadc_RequestSlotPriority_high | High priority.
IfxVadc_RequestSlotPriority_highest | Highest priority.

Definition at line 393 of file IfxVadc.h.

◆ IfxVadc_RequestSlotStartMode

enum IfxVadc_RequestSlotStartMode

Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)

Enumerator
IfxVadc_RequestSlotStartMode_waitForStart | Wait for start.
IfxVadc_RequestSlotStartMode_cancelInjectRepeat | Cancel-Inject-Repeat.

Definition at line 403 of file IfxVadc.h.

◆ IfxVadc_RequestSource

enum IfxVadc_RequestSource

Request sources.

Enumerator
IfxVadc_RequestSource_queue | 8 stage Queue request
IfxVadc_RequestSource_scan | scan request
IfxVadc_RequestSource_background | background scan request

Definition at line 411 of file IfxVadc.h.

◆ IfxVadc_SleepMode

enum IfxVadc_SleepMode

Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_VADC.CLC.B.EDIS.

Enumerator
IfxVadc_SleepMode_enable | enables sleep mode
IfxVadc_SleepMode_disable | disables sleep mode

Definition at line 421 of file IfxVadc.h.

◆ IfxVadc_SrcNr

enum IfxVadc_SrcNr

Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)

Enumerator
IfxVadc_SrcNr_group0 | service request line 0 of group
IfxVadc_SrcNr_group1 | service request line 1 of group
IfxVadc_SrcNr_group2 | service request line 2 of group
IfxVadc_SrcNr_group3 | service request line 3 of group
IfxVadc_SrcNr_shared0 | Select shared service request line 0.
IfxVadc_SrcNr_shared1 | Select shared service request line 1.
IfxVadc_SrcNr_shared2 | Select shared service request line 2.
IfxVadc_SrcNr_shared3 | Select shared service request line 3.

Definition at line 429 of file IfxVadc.h.

◆ IfxVadc_Status

enum IfxVadc_Status

API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx

Enumerator
IfxVadc_Status_noError | No error during api execution.
IfxVadc_Status_notInitialised | Appropriate initialisation not done.
IfxVadc_Status_invalidGroup | Invalid group number.
IfxVadc_Status_invalidChannel | Invalid channel number.
IfxVadc_Status_queueFull | Queue is full.
IfxVadc_Status_noAccess | Access to the group/channel is disabled.
IfxVadc_Status_channelsStillPending | Conversion for some of the channels are still pending.

Definition at line 445 of file IfxVadc.h.

◆ IfxVadc_TriggerMode

enum IfxVadc_TriggerMode

trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)

Enumerator
IfxVadc_TriggerMode_noExternalTrigger | No external trigger.
IfxVadc_TriggerMode_uponFallingEdge | Trigger event upon a falling edge.
IfxVadc_TriggerMode_uponRisingEdge | Trigger event upon a rising edge.
IfxVadc_TriggerMode_uponAnyEdge | Trigger event upon any edge.

Definition at line 458 of file IfxVadc.h.

◆ IfxVadc_TriggerSource

enum IfxVadc_TriggerSource

Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)

Enumerator
IfxVadc_TriggerSource_0 | Input signal REQTRx_0.
IfxVadc_TriggerSource_1 | Input signal REQTRx_1.
IfxVadc_TriggerSource_2 | Input signal REQTRx_2.
IfxVadc_TriggerSource_3 | Input signal REQTRx_3.
IfxVadc_TriggerSource_4 | Input signal REQTRx_4.
IfxVadc_TriggerSource_5 | Input signal REQTRx_5.
IfxVadc_TriggerSource_6 | Input signal REQTRx_6.
IfxVadc_TriggerSource_7 | Input signal REQTRx_7.
IfxVadc_TriggerSource_8 | Input signal REQTRx_8.
IfxVadc_TriggerSource_9 | Input signal REQTRx_9.
IfxVadc_TriggerSource_10 | Input signal REQTRx_10.
IfxVadc_TriggerSource_11 | Input signal REQTRx_11.
IfxVadc_TriggerSource_12 | Input signal REQTRx_12.
IfxVadc_TriggerSource_13 | Input signal REQTRx_13.
IfxVadc_TriggerSource_14 | Input signal REQTRx_14.
IfxVadc_TriggerSource_15 | Input signal REQTRx_15.

Definition at line 468 of file IfxVadc.h.


iLLD_TC26B: Background Autoscan Functions

Functions
Background Autoscan Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Background Autoscan Functions:

Functions

IFX_INLINE void | IfxVadc_configureWaitForReadMode (Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
access function to enable/disable wait for read mode for result registers More...
IFX_INLINE void | IfxVadc_configureWaitForReadModeForGlobalResultRegister (Ifx_VADC *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE void | IfxVadc_enableBackgroundScanSlotExternalTrigger (Ifx_VADC *vadc)
Enables the background sacn external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getBackgroundScanGatingMode (Ifx_VADC *vadc)
Gets the background scan gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getBackgroundScanGatingSource (Ifx_VADC *vadc)
Gets the gating input selection. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getBackgroundScanSlotPriority (Ifx_VADC_G *vadcG)
Gets the requested background scan slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getBackgroundScanSlotStartMode (Ifx_VADC_G *vadcG)
Gets the requested background scan slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getBackgroundScanTriggerInput (Ifx_VADC *vadc)
Gets the background scan trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getBackgroundScanTriggerMode (Ifx_VADC *vadc)
Gets the background scan external trigger mode. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution More...
IFX_INLINE Ifx_VADC_GLOBRES | IfxVadc_getGlobalResult (Ifx_VADC *vadc)
return conversion result stored in the Global result Register More...
IFX_INLINE float32 | IfxVadc_getGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
get global input class sample time in sec More...
IFX_INLINE void | IfxVadc_getGroupResult (Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_getResult (Ifx_VADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE boolean | IfxVadc_isAutoBackgroundScanEnabled (Ifx_VADC *vadc)
Returns the auto background scan status. More...
IFX_INLINE boolean | IfxVadc_isRequestBackgroundScanSlotEnabled (Ifx_VADC_G *vadcG)
Returns the background scan slot requested status. More...
IFX_INLINE void | IfxVadc_setAutoBackgroundScan (Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
Enables/Disables continuous background auto scan. More...
IFX_INLINE void | IfxVadc_setBackgroundScan (Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
configures a background scan; can also stop autoscan if all channels are 0 More...
IFX_INLINE void | IfxVadc_setBackgroundScanSlotGatingConfig (Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the background scan slot gating configurations. More...
IFX_INLINE void | IfxVadc_setBackgroundScanSlotTriggerConfig (Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the background scan exteranal trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startBackgroundScan (Ifx_VADC *vadc)
Starts a background scan. More...
IFX_INLINE Ifx_VADC_RESD | IfxVadc_getDebugResult (Ifx_VADC_G *group, uint32 resultIdx)
Get debug conversion result. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getBackgroundScanStatus (Ifx_VADC *vadc)
Gives the background scan status for a group. More...
IFX_EXTERN Ifx_VADC_RES | IfxVadc_getResultBasedOnRequestSource (Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...

Detailed Description

Function Documentation

◆ IfxVadc_configureWaitForReadMode()

IFX_INLINE void IfxVadc_configureWaitForReadMode | ( | Ifx_VADC_G * | group,
 |  | uint32 | resultIdx,
 |  | boolean | waitForRead
 | ) |  |

access function to enable/disable wait for read mode for result registers

Parameters
group | pointer to the VADC group
resultIdx | result register index
waitForRead | wait for read mode enabled/disabled
Returns
None

Definition at line 1754 of file IfxVadc.h.

Referenced by IfxVadc_Adc_configureWaitForReadMode().

◆ IfxVadc_configureWaitForReadModeForGlobalResultRegister()

IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister | ( | Ifx_VADC * | vadc,
 |  | boolean | waitForRead
 | ) |  |

access function to enable/disable wait for read mode for global result register

Parameters
vadc | pointer to the VADC
waitForRead | wait for read mode enabled/disabled
Returns
None

Definition at line 1760 of file IfxVadc.h.

Referenced by IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister().

◆ IfxVadc_enableBackgroundScanSlotExternalTrigger()

IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger ( Ifx_VADC * vadc )

Enables the background sacn external trigger.

Parameters
vadc pointer to the base of VADC registers.
Returns
None

Definition at line 1787 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_getBackgroundScanGatingMode()

IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode ( Ifx_VADC * vadc )

Gets the background scan gating mode.

Parameters
vadc pointer to the base of VADC registers.
Returns
background scan gating mode.

Definition at line 1849 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanGatingSource()

IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource ( Ifx_VADC * vadc )

Gets the gating input selection.

Parameters
vadc pointer to the base of VADC registers.
Returns
background scan gating input selection.

Definition at line 1855 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanSlotPriority()

IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority ( Ifx_VADC_G * vadcG )

Gets the requested background scan slot priority.

Parameters
vadcG pointer to VADC group registers.
Returns
requested background scan slot priority.

Definition at line 1861 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanSlotStartMode()

IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode ( Ifx_VADC_G * vadcG )

Gets the requested background scan slot start mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested background scan slot start mode.

Definition at line 1867 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanStatus()

IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus ( Ifx_VADC * vadc )

Gives the background scan status for a group.

Parameters
vadc pointer to the VADC module
Returns
IfxVadc_Status

Definition at line 181 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getBackgroundScanStatus().

◆ IfxVadc_getBackgroundScanTriggerInput()

IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput ( Ifx_VADC * vadc )

Gets the background scan trigger input.

Parameters
vadc pointer to the base of VADC registers.
Returns
Gets the background scan external trigger source.

Definition at line 1873 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getBackgroundScanTriggerMode()

IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode ( Ifx_VADC * vadc )

Gets the background scan external trigger mode.

Parameters
vadc pointer to the base of VADC registers.
Returns
background scan external trigger mode.

Definition at line 1879 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getDebugResult()

IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult | ( | Ifx_VADC_G * | group,
 |  | uint32 | resultIdx
 | ) |  |

Get debug conversion result.

Parameters
group | pointer to the VADC group
resultIdx | result register index
Returns
Debug conversion result.

Definition at line 2466 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getDebugResult().

◆ IfxVadc_getGlobalResolution()

IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum
 | ) |  |

get global input class resolution

Parameters
vadc | Pointer to the VADC Group
inputClassNum | global input class number
Returns
ADC input class channel resolution.

Definition at line 1963 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getModuleConfig().

◆ IfxVadc_getGlobalResult()

IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult ( Ifx_VADC * vadc )

return conversion result stored in the Global result Register

Parameters
vadc pointer to the VADC module
Returns
global result register
Ifx_VADC* vadc = &MODULE_VADC; // module pointer
IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
// configure background scan
IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
// enable auto scan
IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
// start the background scan
IfxVadc_startBackgroundScan(vadc);
Ifx_VADC_GLOBRES result;
result = IfxVadc_getGlobalResult (vadc);

Definition at line 1969 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGlobalResult().

◆ IfxVadc_getGlobalSampleTime()

IFX_INLINE float32 IfxVadc_getGlobalSampleTime | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

get global input class sample time in sec

Parameters
vadc | Pointer to the VADC Group Register space
inputClassNum | ADC input class number
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class channel sample time in sec.

Definition at line 1979 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getModuleConfig().

◆ IfxVadc_getGroupResult()

IFX_INLINE void IfxVadc_getGroupResult | ( | Ifx_VADC_G * | group,
 |  | Ifx_VADC_RES * | results,
 |  | uint32 | resultOffset,
 |  | uint32 | numResults
 | ) |  |

Get conversion result for the group.

Parameters
group | pointer to the VADC group
results | pointer to scaled conversion results
resultOffset | offset for the first result
numResults | number of results
Returns
None
Ifx_VADC* vadc = &MODULE_VADC
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
// configure scan
IfxVadc_setScan(group, channels, mask);
// enable auto scan
IfxVadc_setAutoScan(group, TRUE);
// start the scan
IfxVadc_startScan(group);
// wait for conversion to finish
// fetch the 2 results of conversion for group 0
Ifx_VADC_RES results[10];
result = IfxVadc_getGroupResult(group, results, 0, 2);

Definition at line 1998 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupResult().

◆ IfxVadc_getResult()

IFX_INLINE Ifx_VADC_RES IfxVadc_getResult | ( | Ifx_VADC_G * | group,
 |  | uint32 | resultIdx
 | ) |  |

Get conversion result (Function does not care about the alignment) value = raw * gain + offset.

Parameters
group | pointer to the VADC group
resultIdx | result register index
Returns
scaled Conversion result
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
// configure scan
IfxVadc_setScan(group, channels, mask);
// enable auto scan
IfxVadc_setAutoScan(group, TRUE);
// start the scan
IfxVadc_startScan(group);
// wait for conversion to finish
// fetch the result of conversion from result register 0 for group 0
Ifx_VADC_RES result;
result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);

Definition at line 2066 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getResult().

◆ IfxVadc_getResultBasedOnRequestSource()

IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource | ( | Ifx_VADC * | vadc,
 |  | Ifx_VADC_G * | group,
 |  | IfxVadc_ChannelId | channel,
 |  | IfxVadc_RequestSource | sourceType
 | ) |  |

Get conversion result (Function does not care about the alignment) value = raw * gain + offset.

Parameters
vadc | VADC module pointer
group | pointer to the VADC group
channel | channel Id
sourceType | type of request source
Returns
scaled Conversion result
Ifx_VADC vadc;
vadc.vadc = &MODULE_VADC;
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
// configure scan
IfxVadc_setScan(group, channels, mask);
// start the scan
IfxVadc_startScan(group);
// wait for conversion to finish
// fetch the result of conversion for channel 2 of group 0
Ifx_VADC_RESresult2;
result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
Ifx_VADC_RESresult5;
result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);

Definition at line 285 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getResultBasedOnRequestSource().

◆ IfxVadc_isAutoBackgroundScanEnabled()

IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled ( Ifx_VADC * vadc )

Returns the auto background scan status.

Parameters
vadc pointer to the base of VADC registers.
Returns
TRUE if enabled otherwise FALSE.

Definition at line 2138 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_isRequestBackgroundScanSlotEnabled()

IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled ( Ifx_VADC_G * vadcG )

Returns the background scan slot requested status.

Parameters
vadcG pointer to VADC group registers.
Returns
background scan slot requested status.

Definition at line 2150 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_setAutoBackgroundScan()

IFX_INLINE void IfxVadc_setAutoBackgroundScan | ( | Ifx_VADC * | vadc,
 |  | boolean | autoBackgroundScanEnable
 | ) |  |

Enables/Disables continuous background auto scan.

Parameters
vadc | pointer to the base of VADC registers.
autoBackgroundScanEnable | whether auto background scan enabled or not.
Returns
None

Definition at line 2186 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setBackgroundScan()

IFX_INLINE void IfxVadc_setBackgroundScan | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GroupId | groupId,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

configures a background scan; can also stop autoscan if all channels are 0

Parameters
vadc | pointer to the VADC module registers
groupId | group index
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

Background scan can be enabled/disabled for the given channels which are selected with the mask

Ifx_VADC* vadc = &MODULE_VADC; // module pointer
IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//confiure wait for read mode for global result register
IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
// configure background scan
IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
// enable auto scan
IfxVadc_setAutoBackgroundScan(vadc, TRUE);
// start the background scan
IfxVadc_startBackgroundScan(vadc);

Definition at line 2210 of file IfxVadc.h.

Referenced by IfxVadc_Adc_setBackgroundScan().

◆ IfxVadc_setBackgroundScanSlotGatingConfig()

IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GatingSource | gatingSource,
 |  | IfxVadc_GatingMode | gatingMode
 | ) |  |

Sets the background scan slot gating configurations.

Parameters
vadc | pointer to the base of VADC registers.
gatingSource | gate input for group.
gatingMode | gating mode. High level, Low Level or Gating disabled.
Returns
None

Definition at line 2217 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setBackgroundScanSlotTriggerConfig()

IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_TriggerMode | triggerMode,
 |  | IfxVadc_TriggerSource | triggerSource
 | ) |  |

Sets the background scan exteranal trigger operating configurations.

Parameters
vadc | pointer to the base of VADC registers.
triggerMode | trigger mode. Rising, falling any edge leads to an trigger event.
triggerSource | trigger input for group.
Returns
None

Definition at line 2228 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_startBackgroundScan()

IFX_INLINE void IfxVadc_startBackgroundScan ( Ifx_VADC * vadc )

Starts a background scan.

Parameters
vadc pointer to the VADC module
Returns
None
See also
IfxVadc_setBackgroundScan

Definition at line 2442 of file IfxVadc.h.

Referenced by IfxVadc_Adc_startBackgroundScan().


iLLD_TC26B: Channel Scan Functions

Functions
Channel Scan Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Channel Scan Functions:

Functions

IFX_INLINE void | IfxVadc_disableScanSlotExternalTrigger (Ifx_VADC_G *vadcG)
Disables the scan slot external trigger. More...
IFX_INLINE void | IfxVadc_enableScanSlotExternalTrigger (Ifx_VADC_G *vadcG)
Enables the scan slot external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getScanSlotGatingMode (Ifx_VADC_G *vadcG)
Gets the request scan slot gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getScanSlotGatingSource (Ifx_VADC_G *vadcG)
Gets the request scan slot gating input. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getScanSlotPriority (Ifx_VADC_G *vadcG)
Gets the request scan slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getScanSlotStartMode (Ifx_VADC_G *vadcG)
Gets the request scan slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getScanSlotTriggerInput (Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getScanSlotTriggerMode (Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger mode. More...
IFX_INLINE boolean | IfxVadc_isAutoScanEnabled (Ifx_VADC_G *vadcG)
Gets the auto scan enable status. More...
IFX_INLINE boolean | IfxVadc_isRequestScanSlotEnabled (Ifx_VADC_G *vadcG)
Returns the scan slot requested status. More...
IFX_INLINE void | IfxVadc_setAutoScan (Ifx_VADC_G *vadcG, boolean autoscanEnable)
Enables/Disables continuous auto scan. More...
IFX_INLINE void | IfxVadc_setScanSlotGatingConfig (Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the scan slot gating configuration. More...
IFX_INLINE void | IfxVadc_setScanSlotTriggerConfig (Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the scan slot trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startScan (Ifx_VADC_G *group)
Starts an autoscan on the specified group. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getScanStatus (Ifx_VADC_G *group)
Gives the scan status for a group. More...
IFX_EXTERN void | IfxVadc_setScan (Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan. More...

Detailed Description

Function Documentation

◆ IfxVadc_disableScanSlotExternalTrigger()

IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger ( Ifx_VADC_G * vadcG )

Disables the scan slot external trigger.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1781 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_enableScanSlotExternalTrigger()

IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger ( Ifx_VADC_G * vadcG )

Enables the scan slot external trigger.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1815 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_getScanSlotGatingMode()

IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode ( Ifx_VADC_G * vadcG )

Gets the request scan slot gating mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested scan slot gating mode.

Definition at line 2076 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotGatingSource()

IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource ( Ifx_VADC_G * vadcG )

Gets the request scan slot gating input.

Parameters
vadcG pointer to VADC group registers.
Returns
request scan slot gating input.

Definition at line 2082 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotPriority()

IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority ( Ifx_VADC_G * vadcG )

Gets the request scan slot priority.

Parameters
vadcG pointer to VADC group registers.
Returns
request scan slot priority.

Definition at line 2088 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotStartMode()

IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode ( Ifx_VADC_G * vadcG )

Gets the request scan slot start mode.

Parameters
vadcG pointer to VADC group registers.
Returns
request scan slot start mode.

Definition at line 2094 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotTriggerInput()

IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput ( Ifx_VADC_G * vadcG )

Gets the requested scan slot trigger input.

Parameters
vadcG pointer to VADC group registers.
Returns
requested scan slot trigger input.

Definition at line 2100 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanSlotTriggerMode()

IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode ( Ifx_VADC_G * vadcG )

Gets the requested scan slot trigger mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested scan slot trigger mode.

Definition at line 2106 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getScanStatus()

IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus ( Ifx_VADC_G * group )

Gives the scan status for a group.

Parameters
group pointer to the VADC group
Returns
IfxVadc_Status

Definition at line 335 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getScanStatus().

◆ IfxVadc_isAutoScanEnabled()

IFX_INLINE boolean IfxVadc_isAutoScanEnabled ( Ifx_VADC_G * vadcG )

Gets the auto scan enable status.

Parameters
vadcG pointer to VADC group registers.
Returns
TRUE if auto scan enabled otherwise FALSE.

Definition at line 2144 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_isRequestScanSlotEnabled()

IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled ( Ifx_VADC_G * vadcG )

Returns the scan slot requested status.

Parameters
vadcG pointer to VADC group registers.
Returns
TRUE if scan slot request enabled otherwise FALSE.

Definition at line 2162 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_setAutoScan()

IFX_INLINE void IfxVadc_setAutoScan | ( | Ifx_VADC_G * | vadcG,
 |  | boolean | autoscanEnable
 | ) |  |

Enables/Disables continuous auto scan.

Parameters
vadcG | pointer to VADC group registers.
autoscanEnable | whether autoscan is enabled or not.
Returns
None

Definition at line 2192 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setScan()

IFX_EXTERN void IfxVadc_setScan | ( | Ifx_VADC_G * | group,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Configures an (auto-)scan.

Parameters
group | pointer to the VADC group
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

(Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask

Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
// configure scan
IfxVadc_setScan(group, channels, mask);
// enable Auto-Scan
IfxVadc_setAutoScan(group, TRUE);
// start the scan
IfxVadc_startScan(group);

Definition at line 534 of file IfxVadc.c.

Referenced by IfxVadc_Adc_setScan().

◆ IfxVadc_setScanSlotGatingConfig()

IFX_INLINE void IfxVadc_setScanSlotGatingConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_GatingSource | gatingSource,
 |  | IfxVadc_GatingMode | gatingMode
 | ) |  |

Sets the scan slot gating configuration.

Parameters
vadcG | pointer to VADC group registers.
gatingSource | gate input for group.
gatingMode | gating mode. High level, Low Level or Gating disabled.
Returns
None

Definition at line 2399 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setScanSlotTriggerConfig()

IFX_INLINE void IfxVadc_setScanSlotTriggerConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_TriggerMode | triggerMode,
 |  | IfxVadc_TriggerSource | triggerSource
 | ) |  |

Sets the scan slot trigger operating configurations.

Parameters
vadcG | pointer to VADC group registers.
triggerMode | trigger mode. Rising, falling any edge leads to an trigger event.
triggerSource | trigger input for group.
Returns
None

Definition at line 2410 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_startScan()

IFX_INLINE void IfxVadc_startScan ( Ifx_VADC_G * group )

Starts an autoscan on the specified group.

Parameters
group pointer to the VADC group
Returns
None

See IfxVadc_setScan

Definition at line 2454 of file IfxVadc.h.

Referenced by IfxVadc_Adc_startScan().


iLLD_TC26B: Queue Request Functions

Functions
Queue Request Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Queue Request Functions:

Functions

IFX_INLINE void | IfxVadc_addToQueue (Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion. More...
IFX_INLINE void | IfxVadc_clearQueue (Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage. More...
IFX_INLINE void | IfxVadc_disableQueueSlotExternalTrigger (Ifx_VADC_G *vadcG)
Disables the external trigger. More...
IFX_INLINE void | IfxVadc_enableQueueSlotExternalTrigger (Ifx_VADC_G *vadcG)
Enables the external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getQueueSlotGatingMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getQueueSlotGatingSource (Ifx_VADC_G *vadcG)
Gets the requested queue slot gating input. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getQueueSlotPriority (Ifx_VADC_G *vadcG)
Gets the request queue slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getQueueSlotStartMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getQueueSlotTriggerInput (Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getQueueSlotTriggerMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger mode. More...
IFX_INLINE boolean | IfxVadc_isRequestQueueSlotEnabled (Ifx_VADC_G *vadcG)
Returns the queue slot requested status. More...
IFX_INLINE void | IfxVadc_setQueueSlotGatingConfig (Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the gating configurations. More...
IFX_INLINE void | IfxVadc_setQueueSlotTriggerOperatingConfig (Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startQueue (Ifx_VADC_G *group)
Starts a queue of a group by generating a trigger event through software. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getQueueStatus (Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...

Detailed Description

Function Documentation

◆ IfxVadc_addToQueue()

IFX_INLINE void IfxVadc_addToQueue | ( | Ifx_VADC_G * | group,
 |  | IfxVadc_ChannelId | channel,
 |  | uint32 | options
 | ) |  |

Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion.

Parameters
group | pointer to the VADC group
channel | specifies channel Id
options | specifies the refill, source interrupt enable/disable and external trigger control selection
Returns
None
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
IfxVadc_ChannelId channel = 1; // for channel 1
// Add channel 1 to queue of group 0 with the refill turned on
IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));

Definition at line 1713 of file IfxVadc.h.

Referenced by IfxVadc_Adc_addToQueue().

◆ IfxVadc_clearQueue()

IFX_INLINE void IfxVadc_clearQueue | ( | Ifx_VADC_G * | vadcG,
 |  | boolean | flushQueue
 | ) |  |

Clears all the queue entries including backup stage.

Parameters
vadcG | pointer to VADC group registers.
flushQueue | Whether queue is cleared or not.
Returns
None

Definition at line 1748 of file IfxVadc.h.

Referenced by IfxVadc_Adc_clearQueue(), and IfxVadc_Adc_initGroup().

◆ IfxVadc_disableQueueSlotExternalTrigger()

IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger ( Ifx_VADC_G * vadcG )

Disables the external trigger.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1775 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_enableQueueSlotExternalTrigger()

IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger ( Ifx_VADC_G * vadcG )

Enables the external trigger.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1809 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_getQueueSlotGatingMode()

IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode ( Ifx_VADC_G * vadcG )

Gets the requested queue slot gating mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot gating mode.

Definition at line 2030 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotGatingSource()

IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource ( Ifx_VADC_G * vadcG )

Gets the requested queue slot gating input.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot gating input.

Definition at line 2036 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotPriority()

IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority ( Ifx_VADC_G * vadcG )

Gets the request queue slot priority.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot priority.

Definition at line 2042 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotStartMode()

IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode ( Ifx_VADC_G * vadcG )

Gets the requested queue slot start mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot start mode.

Definition at line 2048 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotTriggerInput()

IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput ( Ifx_VADC_G * vadcG )

Gets the requested queue slot trigger input.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot trigger input.

Definition at line 2054 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueSlotTriggerMode()

IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode ( Ifx_VADC_G * vadcG )

Gets the requested queue slot trigger mode.

Parameters
vadcG pointer to VADC group registers.
Returns
requested queue slot trigger mode.

Definition at line 2060 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getQueueStatus()

IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus ( Ifx_VADC_G * group )

Gives the status of the Queue of a group by returning non zero value if the Queue is full.

Parameters
group pointer to the VADC group
Returns
status of the Queue
Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0

Definition at line 267 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getQueueStatus().

◆ IfxVadc_isRequestQueueSlotEnabled()

IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled ( Ifx_VADC_G * vadcG )

Returns the queue slot requested status.

Parameters
vadcG pointer to VADC group registers.
Returns
TRUE if queue slot request enabled otherwise FALSE.

Definition at line 2156 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_setQueueSlotGatingConfig()

IFX_INLINE void IfxVadc_setQueueSlotGatingConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_GatingSource | gatingSource,
 |  | IfxVadc_GatingMode | gatingMode
 | ) |  |

Sets the gating configurations.

Parameters
vadcG | pointer to VADC group registers.
gatingSource | gate input for group.
gatingMode | gating mode. High level, Low Level or Gating disabled.
Returns
None

Definition at line 2351 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setQueueSlotTriggerOperatingConfig()

IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_TriggerMode | triggerMode,
 |  | IfxVadc_TriggerSource | triggerSource
 | ) |  |

Sets the trigger operating configurations.

Parameters
vadcG | pointer to VADC group registers.
triggerMode | trigger mode. Rising, falling any edge leads to an trigger event.
triggerSource | trigger input for group.
Returns
None

Definition at line 2362 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_startQueue()

IFX_INLINE void IfxVadc_startQueue ( Ifx_VADC_G * group )

Starts a queue of a group by generating a trigger event through software.

Parameters
group pointer to the VADC group
Returns
None

Definition at line 2448 of file IfxVadc.h.

Referenced by IfxVadc_Adc_startQueue().


iLLD_TC26B: IO Pin Configuration Functions

Functions
IO Pin Configuration Functions
iLLD » VADC » Standard Driver
Collaboration diagram for IO Pin Configuration Functions:

Functions

IFX_INLINE void | IfxVadc_initEmuxPin (const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output. More...
IFX_INLINE void | IfxVadc_initGxBflPin (const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output. More...

Detailed Description

Function Documentation

◆ IfxVadc_initEmuxPin()

IFX_INLINE void IfxVadc_initEmuxPin | ( | const IfxVadc_Emux_Out * | emux,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a EMUX output.

Parameters
emux | the Emux Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2118 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initExternalMultiplexerMode().

◆ IfxVadc_initGxBflPin()

IFX_INLINE void IfxVadc_initGxBflPin | ( | const IfxVadc_GxBfl_Out * | gxBfl,
 |  | IfxPort_OutputMode | outputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Initializes a GxBFL output.

Parameters
gxBfl | the GxBFL Pin which should be configured
outputMode | the pin output mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 2125 of file IfxVadc.h.


iLLD_TC26B: Frequency Calculation

Functions
Frequency Calculation
iLLD » VADC » Standard Driver
Collaboration diagram for Frequency Calculation:

Functions

IFX_INLINE uint32 | IfxVadc_calculateSampleTime (float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency. More...
IFX_EXTERN float32 | IfxVadc_getAdcAnalogFrequency (Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz. More...
IFX_EXTERN float32 | IfxVadc_getAdcDigitalFrequency (Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz. More...

Detailed Description

Function Documentation

◆ IfxVadc_calculateSampleTime()

IFX_INLINE uint32 IfxVadc_calculateSampleTime | ( | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Calculate the time using analog frequency.

Parameters
analogFrequency | analog frequency in Hz.
sampleTime | sample time in sec.
Returns
sample time in sec.

Definition at line 1719 of file IfxVadc.h.

Referenced by IfxVadc_setEmuxGlobalSampleTime(), IfxVadc_setEmuxGroupSampletime(), IfxVadc_setGlobalSampleTime(), and IfxVadc_setGroupSampleTime().

◆ IfxVadc_getAdcAnalogFrequency()

IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency ( Ifx_VADC * vadc )

Returns the configured Fadci VADC analog clock frequency in Hz.

Parameters
vadc pointer to the base of VADC registers
Returns
Returns the configured Fadci VADC analog clock frequency in Hz.

Definition at line 163 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getChannelConversionTime(), IfxVadc_Adc_getGroupConfig(), IfxVadc_Adc_getModuleConfig(), IfxVadc_Adc_initGroup(), and IfxVadc_Adc_initModule().

◆ IfxVadc_getAdcDigitalFrequency()

IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency ( Ifx_VADC * vadc )

Returns the configured Fadcd VADC digital clock frequency in Hz.

Parameters
vadc pointer to the base of VADC registers
Returns
Returns the configured Fadcd VADC digital clock frequency in Hz.

Definition at line 169 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getModuleConfig(), and IfxVadc_Adc_initModuleConfig().


iLLD_TC26B: Group Functions

Functions
Group Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Group Functions:

Functions

IFX_INLINE void | IfxVadc_clearAllResultRequests (Ifx_VADC_G *vadcG)
Clears the all group requests. More...
IFX_INLINE IfxVadc_ArbitrationRounds | IfxVadc_getArbiterRoundLength (Ifx_VADC_G *vadcG)
Gets the ADC group arbitration round length. More...
IFX_INLINE Ifx_VADC_G_REVNP0 | IfxVadc_getChannelResultServiceRequestNodePointer0 (Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 0. More...
IFX_INLINE Ifx_VADC_G_REVNP1 | IfxVadc_getChannelResultServiceRequestNodePointer1 (Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 1. More...
IFX_INLINE Ifx_VADC_G_CEVNP0 | IfxVadc_getChannelServiceRequestNodePointer0 (Ifx_VADC_G *vadcG)
Gets the channel service request node pointer. More...
IFX_INLINE uint8 | IfxVadc_getMasterIndex (Ifx_VADC_G *vadcG)
Gets the configured master index. More...
IFX_INLINE void | IfxVadc_resetGroup (Ifx_VADC_G *vadcG)
Resets the ADC group. More...
IFX_INLINE void | IfxVadc_setAnalogConvertControl (Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number. More...
IFX_INLINE void | IfxVadc_setArbitrationRoundLength (Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
Sets the arbiter round length. More...
IFX_INLINE void | IfxVadc_setGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the ADC input class channel resolution. More...
IFX_INLINE void | IfxVadc_setGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time. More...
IFX_INLINE void | IfxVadc_setMasterIndex (Ifx_VADC_G *vadcG, uint8 masterIndex)
Sets the master index. More...
IFX_EXTERN void | IfxVadc_setArbiterPriority (Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations. More...

Detailed Description

Function Documentation

◆ IfxVadc_clearAllResultRequests()

IFX_INLINE void IfxVadc_clearAllResultRequests ( Ifx_VADC_G * vadcG )

Clears the all group requests.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 1736 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_getArbiterRoundLength()

IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength ( Ifx_VADC_G * vadcG )

Gets the ADC group arbitration round length.

Parameters
vadcG pointer to VADC group registers.
Returns
ADC group arbitration round length.

Definition at line 1835 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getChannelResultServiceRequestNodePointer0()

IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0 ( Ifx_VADC_G * vadcG )

Gets the channel esult service request node pointer 0.

Parameters
vadcG pointer to VADC group registers.
Returns
channel result service request node pointer 0.

Definition at line 1899 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getChannelResultServiceRequestNodePointer1()

IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1 ( Ifx_VADC_G * vadcG )

Gets the channel esult service request node pointer 1.

Parameters
vadcG pointer to VADC group registers.
Returns
channel result service request node pointer 1.

Definition at line 1907 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getChannelServiceRequestNodePointer0()

IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0 ( Ifx_VADC_G * vadcG )

Gets the channel service request node pointer.

Parameters
vadcG pointer to VADC group registers.
Returns
channel service request node pointer.

Definition at line 1915 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getMasterIndex()

IFX_INLINE uint8 IfxVadc_getMasterIndex ( Ifx_VADC_G * vadcG )

Gets the configured master index.

Parameters
vadcG pointer to VADC group registers.
Returns
configured master kernel index.

Definition at line 2022 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_resetGroup()

IFX_INLINE void IfxVadc_resetGroup ( Ifx_VADC_G * vadcG )

Resets the ADC group.

Parameters
vadcG pointer to VADC group registers.
Returns
None

Definition at line 2168 of file IfxVadc.h.

Referenced by IfxVadc_Adc_deInitGroup().

◆ IfxVadc_setAnalogConvertControl()

IFX_INLINE void IfxVadc_setAnalogConvertControl | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_AnalogConverterMode | analogConverterMode
 | ) |  |

Sets analog converter group number.

Parameters
vadcG | pointer to VADC group registers.
analogConverterMode | group analog converter mode.
Returns
None

Definition at line 2174 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup(), and IfxVadc_Adc_initModule().

◆ IfxVadc_setArbiterPriority()

IFX_EXTERN void IfxVadc_setArbiterPriority | ( | Ifx_VADC_G * | vadcG,
 |  | boolean | slotEnable,
 |  | IfxVadc_RequestSlotPriority | prio,
 |  | IfxVadc_RequestSlotStartMode | mode,
 |  | IfxVadc_RequestSource | slot
 | ) |  |

Sets the Arbiter slot configurations.

Parameters
vadcG | pointer to VADC group registers.
slotEnable | enable/disable of slot.
prio | channel request priority.
mode | Channel Slot start mode.
slot | channel slot Request source.
Returns
None

Definition at line 510 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setArbitrationRoundLength()

IFX_INLINE void IfxVadc_setArbitrationRoundLength | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ArbitrationRounds | arbiterRoundLength
 | ) |  |

Sets the arbiter round length.

Parameters
vadcG | pointer to VADC group registers.
arbiterRoundLength | arbiter round length.
Returns
None

Definition at line 2180 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setGroupResolution()

IFX_INLINE void IfxVadc_setGroupResolution | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | IfxVadc_ChannelResolution | resolution
 | ) |  |

Sets the ADC input class channel resolution.

Parameters
vadcG | pointer to VADC group registers.
inputClassNum | input class number.
resolution | ADC input class channel resolution.
Returns
None

Definition at line 2326 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setGroupSampleTime()

IFX_INLINE void IfxVadc_setGroupSampleTime | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the ADC input class sample time.

Parameters
vadcG | pointer to VADC group registers.
inputClassNum | input class number.
analogFrequency | ADC analog frequency in Hz.
sampleTime | request sample time in sec for input class.
Returns
None

Definition at line 2332 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_setMasterIndex()

IFX_INLINE void IfxVadc_setMasterIndex | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | masterIndex
 | ) |  |

Sets the master index.

Parameters
vadcG | pointer to VADC group registers.
masterIndex | master index.
Returns
None

Definition at line 2344 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initGroup().


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxVadc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
IFX_INLINE void | IfxVadc_enableModule (Ifx_VADC *vadc)
Enable VADC kernel. More...
IFX_INLINE uint8 | IfxVadc_getAdcCalibrationActiveState (Ifx_VADC *vadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status. More...
IFX_INLINE Ifx_VADC_GLOBCFG | IfxVadc_getGlobalConfigValue (Ifx_VADC *vadc)
Gets the global control configuration value. More...
IFX_INLINE boolean | IfxVadc_getStartupCalibration (Ifx_VADC *vadc)
get SUCAL bit field status More...
IFX_INLINE void | IfxVadc_initiateStartupCalibration (Ifx_VADC *vadc)
initiates the calibration pulse phase. More...
IFX_INLINE void | IfxVadc_setGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the channel conversion mode. More...
IFX_INLINE void | IfxVadc_setGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class. More...
IFX_INLINE void | IfxVadc_setSleepMode (Ifx_VADC *vadc, IfxVadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxVadc_disableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers. More...
IFX_EXTERN void | IfxVadc_disablePostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration. More...
IFX_EXTERN void | IfxVadc_enableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers. More...
IFX_EXTERN void | IfxVadc_enableGroupSync (Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068. More...
IFX_EXTERN float32 | IfxVadc_getAdcModuleFrequency (void)
Module Frequency in Hz. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxVadc_getSrcAddress (IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address. More...
IFX_EXTERN void | IfxVadc_initialiseAdcArbiterClock (Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock. More...
IFX_EXTERN void | IfxVadc_initialiseAdcConverterClock (Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock. More...
IFX_EXTERN uint32 | IfxVadc_initializeFAdcD (Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock. More...
IFX_EXTERN uint32 | IfxVadc_initializeFAdcI (Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock. More...
IFX_EXTERN boolean | IfxVadc_isPostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status. More...
IFX_EXTERN void | IfxVadc_resetKernel (Ifx_VADC *vadc)
Resets the kernel. More...
IFX_EXTERN void | IfxVadc_selectPowerSupplyVoltage (Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage. More...
IFX_EXTERN void | IfxVadc_startupCalibration (Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process. More...

Detailed Description

Function Documentation

◆ IfxVadc_disableAccess()

IFX_EXTERN void IfxVadc_disableAccess | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_Protection | protectionSet
 | ) |  |

Disable write access to the VADC config/control registers.

Parameters
vadc | pointer to the base of VADC registers.
protectionSet | Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
Returns
None

Definition at line 54 of file IfxVadc.c.

Referenced by IfxVadc_Adc_deInitGroup(), IfxVadc_Adc_initChannel(), IfxVadc_Adc_initGroup(), IfxVadc_Adc_initModule(), IfxVadc_configExternalMultiplexerMode(), IfxVadc_disablePostCalibration(), IfxVadc_enableGroupSync(), IfxVadc_initialiseAdcArbiterClock(), IfxVadc_initialiseAdcConverterClock(), IfxVadc_resetKernel(), IfxVadc_selectPowerSupplyVoltage(), and IfxVadc_startupCalibration().

◆ IfxVadc_disableModule()

IFX_INLINE void IfxVadc_disableModule ( Ifx_VADC * vadc )

Disable VADC Module.

Parameters
vadc Pointer to VADC Module
Returns
None

Definition at line 1766 of file IfxVadc.h.

Referenced by IfxVadc_Adc_disableModule().

◆ IfxVadc_disablePostCalibration()

IFX_EXTERN void IfxVadc_disablePostCalibration | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GroupId | group,
 |  | boolean | disable
 | ) |  |

Disables the post calibration.

Parameters
vadc | pointer to the base of VADC registers.
group | Index of the group.
disable | disable or not.
Returns
None

Definition at line 72 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_enableAccess()

IFX_EXTERN void IfxVadc_enableAccess | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_Protection | protectionSet
 | ) |  |

Enable write access to the VADC config/control registers.

Parameters
vadc | pointer to the base of VADC registers.
protectionSet | Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
Returns
None

Definition at line 94 of file IfxVadc.c.

Referenced by IfxVadc_Adc_deInitGroup(), IfxVadc_Adc_initChannel(), IfxVadc_Adc_initGroup(), IfxVadc_Adc_initModule(), IfxVadc_configExternalMultiplexerMode(), IfxVadc_disablePostCalibration(), IfxVadc_enableGroupSync(), IfxVadc_initialiseAdcArbiterClock(), IfxVadc_initialiseAdcConverterClock(), IfxVadc_resetKernel(), IfxVadc_selectPowerSupplyVoltage(), and IfxVadc_startupCalibration().

◆ IfxVadc_enableGroupSync()

IFX_EXTERN void IfxVadc_enableGroupSync | ( | Ifx_VADC * | vadc,
 |  | uint32 | ccu6Num
 | ) |  |

Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068.

Parameters
vadc | pointer to the base of VADC registers.
ccu6Num | selects CCU60 or CCU61
Returns
None

Definition at line 112 of file IfxVadc.c.

◆ IfxVadc_enableModule()

IFX_INLINE void IfxVadc_enableModule ( Ifx_VADC * vadc )

Enable VADC kernel.

Parameters
vadc pointer to the base of VADC registers.
Returns
None

Definition at line 1799 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_getAdcCalibrationActiveState()

IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState | ( | Ifx_VADC * | vadc,
 |  | uint8 | adcCalGroupNum
 | ) |  |

gets ADC Calibration Flag CAL status.

Parameters
vadc | pointer to VADC group registers.
adcCalGroupNum | ADC CAL group number.
Returns
CAL group status.

Definition at line 1827 of file IfxVadc.h.

Referenced by IfxVadc_startupCalibration().

◆ IfxVadc_getAdcModuleFrequency()

IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency ( void )

Module Frequency in Hz.

Returns
Module Frequency in Hz.

Definition at line 175 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getChannelConversionTime(), and IfxVadc_Adc_getModuleConfig().

◆ IfxVadc_getGlobalConfigValue()

IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue ( Ifx_VADC * vadc )

Gets the global control configuration value.

Parameters
vadc pointer to the base of VADC registers.
Returns
global control configuration value.

Definition at line 1955 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getSrcAddress()

IFX_EXTERN volatile Ifx_SRC_SRCR* IfxVadc_getSrcAddress | ( | IfxVadc_GroupId | group,
 |  | IfxVadc_SrcNr | index
 | ) |  |

Gives the SRC source address.

Parameters
group | Index of the group
index | SRC number
Returns
SRC source address

Definition at line 350 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getChannelConfig(), and IfxVadc_Adc_initChannel().

◆ IfxVadc_getStartupCalibration()

IFX_INLINE boolean IfxVadc_getStartupCalibration ( Ifx_VADC * vadc )

get SUCAL bit field status

Parameters
vadc Pointer to VADC Module
Returns
Indicate the start-up calibration phase

Definition at line 2112 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getModuleConfig().

◆ IfxVadc_initialiseAdcArbiterClock()

IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock | ( | Ifx_VADC * | vadc,
 |  | uint32 | arbiterClockDivider
 | ) |  |

Initialises ADC arbiter clock.

Parameters
vadc | pointer to the base of VADC registers
arbiterClockDivider | ADC arbiter clock divider.
Returns
None

Definition at line 378 of file IfxVadc.c.

Referenced by IfxVadc_initializeFAdcD().

◆ IfxVadc_initialiseAdcConverterClock()

IFX_EXTERN void IfxVadc_initialiseAdcConverterClock | ( | Ifx_VADC * | vadc,
 |  | uint32 | converterClockDivider
 | ) |  |

Initialises the ADC Converter clock.

Parameters
vadc | pointer to the base of VADC registers
converterClockDivider | ADC converter clock divider.
Returns
None

Definition at line 390 of file IfxVadc.c.

Referenced by IfxVadc_initializeFAdcI().

◆ IfxVadc_initializeFAdcD()

IFX_EXTERN uint32 IfxVadc_initializeFAdcD | ( | Ifx_VADC * | vadc,
 |  | uint32 | fAdcD
 | ) |  |

Configure the FadcD vadc digital clock.

Parameters
vadc | pointer to the base of VADC registers.
fAdcD | ADC digital clock frequency in Hz.
Returns
calculated ADC digital clock frequency in Hz.

Definition at line 402 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_initializeFAdcI()

IFX_EXTERN uint32 IfxVadc_initializeFAdcI | ( | Ifx_VADC * | vadc,
 |  | uint32 | fAdcI
 | ) |  |

Configure the ADC analog clock.

Parameters
vadc | pointer to the base of VADC registers.
fAdcI | ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
Returns
ADC analog clock frequency in Hz.

Definition at line 418 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_initiateStartupCalibration()

IFX_INLINE void IfxVadc_initiateStartupCalibration ( Ifx_VADC * vadc )

initiates the calibration pulse phase.

Parameters
vadc pointer to the base of VADC registers
Returns
None

Definition at line 2132 of file IfxVadc.h.

Referenced by IfxVadc_startupCalibration().

◆ IfxVadc_isPostCalibration()

IFX_EXTERN boolean IfxVadc_isPostCalibration | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GroupId | group
 | ) |  |

Return the post calibration status.

Parameters
vadc | Pointer to VADC module
group | specifies Group ID
Returns
TRUE if the post calibration is enabled for the group else false

Definition at line 455 of file IfxVadc.c.

Referenced by IfxVadc_getChannelConversionTime().

◆ IfxVadc_resetKernel()

IFX_EXTERN void IfxVadc_resetKernel ( Ifx_VADC * vadc )

Resets the kernel.

Parameters
vadc pointer to the base of VADC registers.
Returns
None

Definition at line 477 of file IfxVadc.c.

Referenced by IfxVadc_Adc_deInitModule().

◆ IfxVadc_selectPowerSupplyVoltage()

IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_LowSupplyVoltageSelect | supplyVoltage
 | ) |  |

Select Low Power Supply Voltage.

Parameters
vadc | Pointer to Module space
supplyVoltage | Select Supply Voltage
Returns
None

Definition at line 498 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_setGlobalResolution()

IFX_INLINE void IfxVadc_setGlobalResolution | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | IfxVadc_ChannelResolution | resolution
 | ) |  |

Sets the channel conversion mode.

Parameters
vadc | pointer to VADC module registers.
inputClassNum | global input class number.
resolution | ADC channel resolution.
Returns
None

Definition at line 2308 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_setGlobalSampleTime()

IFX_INLINE void IfxVadc_setGlobalSampleTime | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the sample time of ADC global class.

Parameters
vadc | pointer to VADC module registers.
inputClassNum | global input class number.
analogFrequency | ADC analog frequency in Hz.
sampleTime | the requested sample time for input class in sec.
Returns
None

Definition at line 2314 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initModule().

◆ IfxVadc_setSleepMode()

IFX_INLINE void IfxVadc_setSleepMode | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_SleepMode | mode
 | ) |  |

Sets the sensitivity of the module to sleep signal.

Parameters
vadc | pointer to VADC registers
mode | mode selection (enable/disable)
Returns
None

Definition at line 2421 of file IfxVadc.h.

◆ IfxVadc_startupCalibration()

IFX_EXTERN void IfxVadc_startupCalibration ( Ifx_VADC * vadc )

Starts ADC calibration and wait for the end of the calibration process.

Parameters
vadc pointer to the base of VADC registers.
Returns
None

Definition at line 542 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initModule().


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxVadc_clearChannelRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
Clears the channel request. More...
IFX_INLINE void | IfxVadc_enableFifoMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
Enables the FIFO mode. More...
IFX_INLINE void | IfxVadc_enableServiceRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
IFX_INLINE Ifx_VADC_G_CHASS | IfxVadc_getAssignedChannels (Ifx_VADC_G *vadcG)
Gets the group's assigned channels. More...
IFX_INLINE Ifx_VADC_CHCTR | IfxVadc_getChannelControlConfig (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the current ADC channel control configurations. More...
IFX_INLINE IfxVadc_InputClasses | IfxVadc_getChannelInputClass (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the channel input class. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum)
Gets the ADC input class channel resolution. More...
IFX_INLINE float32 | IfxVadc_getGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class channel sample time. More...
IFX_INLINE void | IfxVadc_setBackgroundPriorityChannel (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets the channels with low priority as background channel. More...
IFX_INLINE void | IfxVadc_setBackgroundResultTarget (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
Sets the target for result background source. More...
IFX_INLINE void | IfxVadc_setBoundaryMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
Selects boundary extension. More...
IFX_INLINE void | IfxVadc_setChannelEventNodePointer0 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
Sets the channel event service request line. More...
IFX_INLINE void | IfxVadc_setChannelInputClass (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
Sets the channel input class. More...
IFX_INLINE void | IfxVadc_setChannelLimitCheckMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
Sets the channel event mode. More...
IFX_INLINE void | IfxVadc_setGroupPriorityChannel (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets channel as priority channel with in the group. More...
IFX_INLINE void | IfxVadc_setLowerBoundary (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
Sets group's lower boundary. More...
IFX_INLINE void | IfxVadc_setReferenceInput (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
Selects the refernce input. More...
IFX_INLINE void | IfxVadc_setResultNodeEventPointer0 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 0. More...
IFX_INLINE void | IfxVadc_setResultNodeEventPointer1 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 1. More...
IFX_INLINE void | IfxVadc_setResultPosition (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position. More...
IFX_INLINE void | IfxVadc_setSyncRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request. More...
IFX_INLINE void | IfxVadc_setUpperBoundary (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
Sets group's upper boundary. More...
IFX_INLINE void | IfxVadc_storeGroupResult (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
Sets the group result register. More...
IFX_EXTERN float32 | IfxVadc_getChannelConversionTime (Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing More...

Detailed Description

Function Documentation

◆ IfxVadc_clearChannelRequest()

IFX_INLINE void IfxVadc_clearChannelRequest | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelId
 | ) |  |

Clears the channel request.

Parameters
vadcG | pointer to VADC group registers.
channelId | channel id whose request to be cleared.
Returns
None

Definition at line 1742 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_enableFifoMode()

IFX_INLINE void IfxVadc_enableFifoMode | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelResult | resultRegister,
 |  | IfxVadc_FifoMode | fifoMode
 | ) |  |

Enables the FIFO mode.

Parameters
vadcG | pointer to VADC group registers.
resultRegister | channel result register.
fifoMode | FIFO mode .
Returns
None

Definition at line 1793 of file IfxVadc.h.

◆ IfxVadc_enableServiceRequest()

IFX_INLINE void IfxVadc_enableServiceRequest | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelResult | resultRegister
 | ) |  |
Parameters
vadcG | pointer to VADC group registers.
resultRegister | channel result register.
Returns
None

Definition at line 1821 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_getAssignedChannels()

IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels ( Ifx_VADC_G * vadcG )

Gets the group's assigned channels.

Parameters
vadcG pointer to VADC group registers.
Returns
group's assigned channels.

Definition at line 1841 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getChannelControlConfig()

IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex
 | ) |  |

Gets the current ADC channel control configurations.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | ADC channel number.
Returns
current ADC channel control configuration.

Definition at line 1885 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_getChannelConversionTime()

IFX_EXTERN float32 IfxVadc_getChannelConversionTime | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_GroupId | group,
 |  | IfxVadc_InputClasses | inputClass,
 |  | float32 | analogFrequency,
 |  | float32 | moduleFrequency,
 |  | IfxVadc_ConversionType | conversionMode
 | ) |  |

get channel conversion timing

Parameters
vadc | Pointer to VADC module
group | specifies the Group
inputClass | Input class used
analogFrequency | ADC module analog frequency fadci in Hz.
moduleFrequency | ADC module frequency fvadc in Hz.
conversionMode | specifies the conversion mode (Standard conversion mode)
Returns
Channel conversion Time in sec

Definition at line 202 of file IfxVadc.c.

Referenced by IfxVadc_Adc_getChannelConversionTime().

◆ IfxVadc_getChannelInputClass()

IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex
 | ) |  |

Gets the channel input class.

Parameters
vadcG | pointer to VADC Group register space
channelIndex | specifies channel ID
Returns
Input class

Definition at line 1893 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConversionTime().

◆ IfxVadc_getGroupResolution()

IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum
 | ) |  |

Gets the ADC input class channel resolution.

Parameters
vadcG | pointer to VADC group registers.
inputClassNum | ADC input class number.
Returns
ADC input class channel resolution.

Definition at line 1992 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_getGroupSampleTime()

IFX_INLINE float32 IfxVadc_getGroupSampleTime | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Gets the ADC input class channel sample time.

Parameters
vadcG | pointer to VADC group registers.
inputClassNum | ADC input class number.
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class channel sample time in sec.

Definition at line 2009 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_setBackgroundPriorityChannel()

IFX_INLINE void IfxVadc_setBackgroundPriorityChannel | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex
 | ) |  |

Sets the channels with low priority as background channel.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
Returns
None

Definition at line 2198 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setBackgroundResultTarget()

IFX_INLINE void IfxVadc_setBackgroundResultTarget | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | boolean | globalResultUsage
 | ) |  |

Sets the target for result background source.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
globalResultUsage | whether storage in global result register.
Returns
None

Definition at line 2204 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setBoundaryMode()

IFX_INLINE void IfxVadc_setBoundaryMode | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_BoundaryExtension | boundaryMode
 | ) |  |

Selects boundary extension.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
boundaryMode | boundary extension mode.
Returns
None

Definition at line 2239 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setChannelEventNodePointer0()

IFX_INLINE void IfxVadc_setChannelEventNodePointer0 | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_SrcNr | channelSrcNr,
 |  | IfxVadc_ChannelId | channel
 | ) |  |

Sets the channel event service request line.

Parameters
vadcG | pointer to VADC group registers.
channelSrcNr | channel event Service Node.
channel | channel number.
Returns
None

Definition at line 2245 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setChannelInputClass()

IFX_INLINE void IfxVadc_setChannelInputClass | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_InputClasses | inputClass
 | ) |  |

Sets the channel input class.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
inputClass | group input class.
Returns
None

Definition at line 2259 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setChannelLimitCheckMode()

IFX_INLINE void IfxVadc_setChannelLimitCheckMode | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_LimitCheck | limitCheck
 | ) |  |

Sets the channel event mode.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
limitCheck | channel event mode.
Returns
None

Definition at line 2265 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setGroupPriorityChannel()

IFX_INLINE void IfxVadc_setGroupPriorityChannel | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex
 | ) |  |

Sets channel as priority channel with in the group.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
Returns
None

Definition at line 2320 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setLowerBoundary()

IFX_INLINE void IfxVadc_setLowerBoundary | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_BoundarySelection | lowerBoundary
 | ) |  |

Sets group's lower boundary.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
lowerBoundary | group lower boundary.
Returns
None

Definition at line 2338 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setReferenceInput()

IFX_INLINE void IfxVadc_setReferenceInput | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_ChannelReference | reference
 | ) |  |

Selects the refernce input.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
reference | reference input.
Returns
None

Definition at line 2373 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setResultNodeEventPointer0()

IFX_INLINE void IfxVadc_setResultNodeEventPointer0 | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_SrcNr | resultSrcNr,
 |  | IfxVadc_ChannelResult | resultRegister
 | ) |  |

Sets result event node pointer 0.

Parameters
vadcG | pointer to VADC group registers.
resultSrcNr | channel result event service node.
resultRegister | channel result register.
Returns
None

Definition at line 2379 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setResultNodeEventPointer1()

IFX_INLINE void IfxVadc_setResultNodeEventPointer1 | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_SrcNr | resultSrcNr,
 |  | IfxVadc_ChannelResult | resultRegister
 | ) |  |

Sets result event node pointer 1.

Parameters
vadcG | pointer to VADC group registers.
resultSrcNr | channel result event service node.
resultRegister | channel result register.
Returns
None

Definition at line 2386 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setResultPosition()

IFX_INLINE void IfxVadc_setResultPosition | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | boolean | rightAlignedStorage
 | ) |  |

Sets result store position.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
rightAlignedStorage | result store position.
Returns
None

Definition at line 2393 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setSyncRequest()

IFX_INLINE void IfxVadc_setSyncRequest | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | boolean | synchonize
 | ) |  |

Sets channel synchronization request.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
synchonize | whether channel synchronize or stand alone operation.
Returns
None

Definition at line 2430 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_setUpperBoundary()

IFX_INLINE void IfxVadc_setUpperBoundary | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_BoundarySelection | upperBoundary
 | ) |  |

Sets group's upper boundary.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
upperBoundary | group upper boundary.
Returns
None

Definition at line 2436 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().

◆ IfxVadc_storeGroupResult()

IFX_INLINE void IfxVadc_storeGroupResult | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ChannelId | channelIndex,
 |  | IfxVadc_ChannelResult | resultRegister
 | ) |  |

Sets the group result register.

Parameters
vadcG | pointer to VADC group registers.
channelIndex | group channel id.
resultRegister | result register for group result storage.
Returns
None

Definition at line 2460 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().


iLLD_TC26B: Emux Functions

Functions
Emux Functions
iLLD » VADC » Standard Driver
Collaboration diagram for Emux Functions:

Functions

IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getEmuxGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution More...
IFX_INLINE float32 | IfxVadc_getEmuxGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
Get the sample time of ADC global class for external channel. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getEmuxGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum)
get the external channel resolution More...
IFX_INLINE float32 | IfxVadc_getEmuxGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel. More...
IFX_INLINE void | IfxVadc_setEmuxGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of Global class More...
IFX_INLINE void | IfxVadc_setEmuxGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel. More...
IFX_INLINE void | IfxVadc_setEmuxGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of ADC input class More...
IFX_INLINE void | IfxVadc_setEmuxGroupSampletime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel. More...
IFX_INLINE void | IfxVadc_setEmuxInterfaceForGroup (Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
Sets the Emux Interface for a particular group. More...
IFX_EXTERN void | IfxVadc_configExternalMultiplexerMode (Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)

Detailed Description

Function Documentation

◆ IfxVadc_configExternalMultiplexerMode()

IFX_EXTERN void IfxVadc_configExternalMultiplexerMode | ( | Ifx_VADC * | vadc,
 |  | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_ExternalMultiplexerMode | mode,
 |  | uint8 | channels,
 |  | IfxVadc_EmuxSelectValue | startChannel,
 |  | IfxVadc_EmuxCodingScheme | code,
 |  | IfxVadc_EmuxSampleTimeControl | sampleTimeControl,
 |  | IfxVadc_ChannelSelectionStyle | channelSelectionStyle
 | ) |  |
Parameters
vadc | pointer to Module space
vadcG | Pointer to VADC group register space
mode | External Multiplexer mode
channels | Specifies channel Id
startChannel | specifies the external channel value from which conversion to be carried out
code | Output the channel number in binary code/gray code
sampleTimeControl | specifies when to use a sample time for external channel
channelSelectionStyle | External Multiplexer Channel Selection Style
Returns
None

Definition at line 35 of file IfxVadc.c.

Referenced by IfxVadc_Adc_initExternalMultiplexerMode().

◆ IfxVadc_getEmuxGlobalResolution()

IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum
 | ) |  |

get global input class resolution

Parameters
vadc | Pointer to VADC Module space
inputClassNum | global input class number
Returns
External channel resolution for global input class

Definition at line 1931 of file IfxVadc.h.

◆ IfxVadc_getEmuxGlobalSampleTime()

IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Get the sample time of ADC global class for external channel.

Parameters
vadc | pointer to VADC Module space
inputClassNum | Adc input class number
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class external channel sample time in sec.

Definition at line 1937 of file IfxVadc.h.

◆ IfxVadc_getEmuxGroupResolution()

IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum
 | ) |  |

get the external channel resolution

Parameters
vadcG | Pointer to VADC group register space
inputClassNum | Adc input class number
Returns
Adc input class External channel resolution

Definition at line 1943 of file IfxVadc.h.

◆ IfxVadc_getEmuxGroupSampleTime()

IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency
 | ) |  |

Gets the ADC input class sample time of external channel.

Parameters
vadcG | Pointer to Register Group space
inputClassNum | ADC input class number
analogFrequency | ADC module analog frequency in Hz.
Returns
ADC input class external channel sample time in sec.

Definition at line 1949 of file IfxVadc.h.

◆ IfxVadc_setEmuxGlobalResolution()

IFX_INLINE void IfxVadc_setEmuxGlobalResolution | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | IfxVadc_ChannelResolution | resolution
 | ) |  |

set the external channel resolution of Global class

Parameters
vadc | pointer to VADC Module space
inputClassNum | Global Input Class Number
resolution | External Channel resolution
Returns
None

Definition at line 2271 of file IfxVadc.h.

◆ IfxVadc_setEmuxGlobalSampleTime()

IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime | ( | Ifx_VADC * | vadc,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the sample time of ADC global class for external channel.

Parameters
vadc | Pointer to VADC Module space
inputClassNum | Adc input class number
analogFrequency | ADC analog Frequency in HZ
sampleTime | the requested sample time for input class in sec
Returns
None

Definition at line 2277 of file IfxVadc.h.

◆ IfxVadc_setEmuxGroupResolution()

IFX_INLINE void IfxVadc_setEmuxGroupResolution | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | IfxVadc_ChannelResolution | resolution
 | ) |  |

set the external channel resolution of ADC input class

Parameters
vadcG | pointer to VADC Group Register space
inputClassNum | input class number
resolution | input class external channel resolution
Returns
None

Definition at line 2283 of file IfxVadc.h.

◆ IfxVadc_setEmuxGroupSampletime()

IFX_INLINE void IfxVadc_setEmuxGroupSampletime | ( | Ifx_VADC_G * | vadcG,
 |  | uint8 | inputClassNum,
 |  | float32 | analogFrequency,
 |  | float32 | sampleTime
 | ) |  |

Sets the ADC input class sample time for external channel.

Parameters
vadcG | Pointer to VADC Group Register Space
inputClassNum | input class number
analogFrequency | ADC analog frequency in Hz.
sampleTime | request sample time in sec for input class.
Returns
None

Definition at line 2289 of file IfxVadc.h.

◆ IfxVadc_setEmuxInterfaceForGroup()

IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup | ( | Ifx_VADC * | vadc,
 |  | IfxVadc_EmuxInterface | emuxInterface,
 |  | IfxVadc_GroupId | group
 | ) |  |

Sets the Emux Interface for a particular group.

Parameters
vadc | Pointer to VADC Module Space
emuxInterface | specifies the EmuxInterface
group | specifies the group ID
Returns
None

Definition at line 2295 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initExternalMultiplexerMode().


iLLD_TC26B: VADC Pin Mapping

Data Structures | Macros | Variables
VADC Pin Mapping
iLLD » VADC
Collaboration diagram for VADC Pin Mapping:

Data Structures

struct | IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure. More...
struct | IfxVadc_Emux_Out
VADC External Mux pin mapping structure. More...
struct | IfxVadc_Vadcg_In
VADC Analog Input. More...

Macros

#define | IFXVADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXVADC_PINMAP_NUM_GROUPS 4
#define | IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
#define | IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6
#define | IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Variables

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
VADC_EMUX00: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
VADC_EMUX00: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
VADC_EMUX01: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
VADC_EMUX01: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
VADC_EMUX02: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
VADC_EMUX02: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
VADC_EMUX10: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
VADC_EMUX10: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
VADC_EMUX11: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
VADC_EMUX11: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
VADC_EMUX12: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
VADC_EMUX12: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT
VADC_G0BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT
VADC_G0BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT
VADC_G0BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT
VADC_G0BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT
VADC_G1BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT
VADC_G1BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT
VADC_G1BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT
VADC_G1BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT
VADC_G2BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT
VADC_G2BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT
VADC_G2BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT
VADC_G2BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT
VADC_G3BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT
VADC_G3BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT
VADC_G3BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT
VADC_G3BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT
VADC_G3BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT
VADC_G3BFL3: VADC output. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN
VADC_G0_0: VADC input channel 0 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN
VADC_G0_10: VADC input channel 10 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN
VADC_G0_11: VADC input channel 11 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN
VADC_G0_12: VADC input channel 12 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN
VADC_G0_13: VADC input channel 13 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN
VADC_G0_1: VADC input channel 1 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN
VADC_G0_2: VADC input channel 2 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN
VADC_G0_3: VADC input channel 3 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN
VADC_G0_4: VADC input channel 4 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN
VADC_G0_5: VADC input channel 5 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN
VADC_G0_6: VADC input channel 6 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN
VADC_G0_7: VADC input channel 7 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN
VADC_G0_8: VADC input channel 8 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN
VADC_G1_0: VADC input channel 0 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN
VADC_G1_10: VADC input channel 10 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN
VADC_G1_10: VADC input channel 10 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN
VADC_G1_11: VADC input channel 11 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN
VADC_G1_11: VADC input channel 11 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN
VADC_G1_12: VADC input channel 12 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN
VADC_G1_13: VADC input channel 13 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN
VADC_G1_1: VADC input channel 1 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN
VADC_G1_2: VADC input channel 2 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN
VADC_G1_3: VADC input channel 3 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN
VADC_G1_4: VADC input channel 4 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN
VADC_G1_5: VADC input channel 5 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN
VADC_G1_8: VADC input channel 8 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN
VADC_G1_8: VADC input channel 8 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN
VADC_G1_9: VADC input channel 9of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN
VADC_G1_9: VADC input channel 9 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN
VADC_G2_0: VADC input channel 0 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN
VADC_G2_10: VADC input channel 10 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN
VADC_G2_11: VADC input channel 11 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN
VADC_G2_12: VADC input channel 12 of group 24. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN
VADC_G2_13: VADC input channel 13 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN
VADC_G2_14: VADC input channel 14 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN
VADC_G2_15: VADC input channel 15 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN
VADC_G2_1: VADC input channel 1 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN
VADC_G2_3: VADC input channel 3 of group 2 (mtm) More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN
VADC_G2_4: VADC input channel 4 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN
VADC_G2_4: VADC input channel 4 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN
VADC_G2_5: VADC input channel 5 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN
VADC_G2_5: VADC input channel 5 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN
VADC_G2_6: VADC input channel 6 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN
VADC_G2_6: VADC input channel 6 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN
VADC_G2_7: VADC input channel 7 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN
VADC_G2_7: VADC input channel 7 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN
VADC_G3_0: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN
VADC_G3_10: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN
VADC_G3_11: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN
VADC_G3_1: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN
VADC_G3_2: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN
VADC_G3_3: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN
VADC_G3_4: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN
VADC_G3_5: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN
VADC_G3_6: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN
VADC_G3_7: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN
VADC_G3_8: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN
VADC_G3_9: VADC input. More...
IFX_EXTERN const IfxVadc_Emux_Out * | IfxVadc_Emux_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxVadc_Emux_Out table. More...
IFX_EXTERN const IfxVadc_GxBfl_Out * | IfxVadc_GxBfl_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxVadc_GxBfl_Out table. More...
IFX_EXTERN const IfxVadc_Vadcg_In * | IfxVadc_Vadcg_In_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxVadc_Vadcg_In table. More...

Detailed Description

Data Structure Documentation

◆ IfxVadc_GxBfl_Out

struct IfxVadc_GxBfl_Out

VADC Boundary Flag pin mapping structure.

Definition at line 39 of file IfxVadc_PinMap.h.

Collaboration diagram for IfxVadc_GxBfl_Out:
[legend]
Data Fields
IfxVadc_GroupId | groupId | Group ID.
Ifx_VADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxVadc_Emux_Out

struct IfxVadc_Emux_Out

VADC External Mux pin mapping structure.

Definition at line 48 of file IfxVadc_PinMap.h.

Collaboration diagram for IfxVadc_Emux_Out:
[legend]
Data Fields
Ifx_VADC * | module | Base address.
IfxPort_Pin | pin | Port pin.
IfxPort_OutputIdx | select | Port control code.

◆ IfxVadc_Vadcg_In

struct IfxVadc_Vadcg_In

VADC Analog Input.

Definition at line 56 of file IfxVadc_PinMap.h.

Collaboration diagram for IfxVadc_Vadcg_In:
[legend]
Data Fields
uint8 | channelId | Channel ID.
IfxVadc_GroupId | groupId | Group ID.
Ifx_VADC * | module | Base address.
IfxPort_Pin | pin | Port pin.

Macro Definition Documentation

◆ IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS

#define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12

Definition at line 156 of file IfxVadc_PinMap.h.

◆ IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS

#define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6

Definition at line 157 of file IfxVadc_PinMap.h.

◆ IFXVADC_PINMAP_NUM_GROUPS

#define IFXVADC_PINMAP_NUM_GROUPS 4

Definition at line 155 of file IfxVadc_PinMap.h.

◆ IFXVADC_PINMAP_NUM_MODULES

#define IFXVADC_PINMAP_NUM_MODULES 1

Table dimensions.

Definition at line 154 of file IfxVadc_PinMap.h.

◆ IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS

#define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Definition at line 158 of file IfxVadc_PinMap.h.

Variable Documentation

◆ IfxVadc_EMUX00_P02_6_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT

VADC_EMUX00: VADC output.

Definition at line 64 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX00_P33_3_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT

VADC_EMUX00: VADC output.

Definition at line 65 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX01_P02_7_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT

VADC_EMUX01: VADC output.

Definition at line 66 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX01_P33_2_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT

VADC_EMUX01: VADC output.

Definition at line 67 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX02_P02_8_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT

VADC_EMUX02: VADC output.

Definition at line 68 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX02_P33_1_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT

VADC_EMUX02: VADC output.

Definition at line 69 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX10_P00_6_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT

VADC_EMUX10: VADC output.

Definition at line 70 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX10_P33_6_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT

VADC_EMUX10: VADC output.

Definition at line 71 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX11_P00_7_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT

VADC_EMUX11: VADC output.

Definition at line 72 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX11_P33_5_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT

VADC_EMUX11: VADC output.

Definition at line 73 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX12_P00_8_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT

VADC_EMUX12: VADC output.

Definition at line 74 of file IfxVadc_PinMap.h.

◆ IfxVadc_EMUX12_P33_4_OUT

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT

VADC_EMUX12: VADC output.

Definition at line 75 of file IfxVadc_PinMap.h.

◆ IfxVadc_Emux_Out_pinTable

IFX_EXTERN const IfxVadc_Emux_Out* IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]

IfxVadc_Emux_Out table.

Definition at line 162 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_0_AN0_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN

VADC_G0_0: VADC input channel 0 of group 0.

Definition at line 94 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_10_AN10_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN

VADC_G0_10: VADC input channel 10 of group 0.

Definition at line 95 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_11_AN11_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN

VADC_G0_11: VADC input channel 11 of group 0.

Definition at line 96 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_12_AN12_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN

VADC_G0_12: VADC input channel 12 of group 0.

Definition at line 97 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_13_AN13_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN

VADC_G0_13: VADC input channel 13 of group 0.

Definition at line 98 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_1_AN1_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN

VADC_G0_1: VADC input channel 1 of group 0.

Definition at line 99 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_2_AN2_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN

VADC_G0_2: VADC input channel 2 of group 0.

Definition at line 100 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_3_AN3_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN

VADC_G0_3: VADC input channel 3 of group 0.

Definition at line 101 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_4_AN4_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN

VADC_G0_4: VADC input channel 4 of group 0.

Definition at line 102 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_5_AN5_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN

VADC_G0_5: VADC input channel 5 of group 0.

Definition at line 103 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_6_AN6_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN

VADC_G0_6: VADC input channel 6 of group 0.

Definition at line 104 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_7_AN7_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN

VADC_G0_7: VADC input channel 7 of group 0.

Definition at line 105 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0_8_AN8_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN

VADC_G0_8: VADC input channel 8 of group 0.

Definition at line 106 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0BFL0_P33_4_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT

VADC_G0BFL0: VADC output.

Definition at line 76 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0BFL1_P33_5_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT

VADC_G0BFL1: VADC output.

Definition at line 77 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0BFL2_P33_6_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT

VADC_G0BFL2: VADC output.

Definition at line 78 of file IfxVadc_PinMap.h.

◆ IfxVadc_G0BFL3_P33_7_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT

VADC_G0BFL3: VADC output.

Definition at line 79 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_0_AN16_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN

VADC_G1_0: VADC input channel 0 of group 1.

Definition at line 107 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_10_AN26_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN

VADC_G1_10: VADC input channel 10 of group 1.

Definition at line 108 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_10_P40_2_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN

VADC_G1_10: VADC input channel 10 of group 1.

Definition at line 109 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_11_AN27_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN

VADC_G1_11: VADC input channel 11 of group 1.

Definition at line 110 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_11_P40_3_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN

VADC_G1_11: VADC input channel 11 of group 1.

Definition at line 111 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_12_AN28_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN

VADC_G1_12: VADC input channel 12 of group 1.

Definition at line 112 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_13_AN29_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN

VADC_G1_13: VADC input channel 13 of group 1.

Definition at line 113 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_1_AN17_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN

VADC_G1_1: VADC input channel 1 of group 1.

Definition at line 114 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_2_AN18_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN

VADC_G1_2: VADC input channel 2 of group 1.

Definition at line 115 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_3_AN19_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN

VADC_G1_3: VADC input channel 3 of group 1.

Definition at line 116 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_4_AN20_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN

VADC_G1_4: VADC input channel 4 of group 1.

Definition at line 117 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_5_AN21_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN

VADC_G1_5: VADC input channel 5 of group 1.

Definition at line 118 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_8_AN24_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN

VADC_G1_8: VADC input channel 8 of group 1.

Definition at line 119 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_8_P40_0_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN

VADC_G1_8: VADC input channel 8 of group 1.

Definition at line 120 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_9_AN25_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN

VADC_G1_9: VADC input channel 9of group 1.

Definition at line 121 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1_9_P40_1_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN

VADC_G1_9: VADC input channel 9 of group 1.

Definition at line 122 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1BFL0_P33_0_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT

VADC_G1BFL0: VADC output.

Definition at line 80 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1BFL1_P33_1_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT

VADC_G1BFL1: VADC output.

Definition at line 81 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1BFL2_P33_2_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT

VADC_G1BFL2: VADC output.

Definition at line 82 of file IfxVadc_PinMap.h.

◆ IfxVadc_G1BFL3_P33_3_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT

VADC_G1BFL3: VADC output.

Definition at line 83 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_0_AN32_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN

VADC_G2_0: VADC input channel 0 of group 2.

Definition at line 123 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_10_AN44_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN

VADC_G2_10: VADC input channel 10 of group 2.

Definition at line 124 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_11_AN45_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN

VADC_G2_11: VADC input channel 11 of group 2.

Definition at line 125 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_12_AN46_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN

VADC_G2_12: VADC input channel 12 of group 24.

Definition at line 126 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_13_AN47_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN

VADC_G2_13: VADC input channel 13 of group 2.

Definition at line 127 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_14_AN48_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN

VADC_G2_14: VADC input channel 14 of group 2.

Definition at line 128 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_15_AN49_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN

VADC_G2_15: VADC input channel 15 of group 2.

Definition at line 129 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_1_AN33_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN

VADC_G2_1: VADC input channel 1 of group 2.

Definition at line 130 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_3_AN35_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN

VADC_G2_3: VADC input channel 3 of group 2 (mtm)

Definition at line 131 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_4_AN36_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN

VADC_G2_4: VADC input channel 4 of group 2.

Definition at line 132 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_4_P40_6_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN

VADC_G2_4: VADC input channel 4 of group 2.

Definition at line 133 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_5_AN37_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN

VADC_G2_5: VADC input channel 5 of group 2.

Definition at line 134 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_5_P40_7_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN

VADC_G2_5: VADC input channel 5 of group 2.

Definition at line 135 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_6_AN38_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN

VADC_G2_6: VADC input channel 6 of group 2.

Definition at line 136 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_6_P40_8_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN

VADC_G2_6: VADC input channel 6 of group 2.

Definition at line 137 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_7_AN39_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN

VADC_G2_7: VADC input channel 7 of group 2.

Definition at line 138 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2_7_P40_9_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN

VADC_G2_7: VADC input channel 7 of group 2.

Definition at line 139 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2BFL0_P00_4_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT

VADC_G2BFL0: VADC output.

Definition at line 84 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2BFL1_P00_5_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT

VADC_G2BFL1: VADC output.

Definition at line 85 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2BFL2_P00_6_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT

VADC_G2BFL2: VADC output.

Definition at line 86 of file IfxVadc_PinMap.h.

◆ IfxVadc_G2BFL3_P00_7_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT

VADC_G2BFL3: VADC output.

Definition at line 87 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_0_P00_12_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN

VADC_G3_0: VADC input.

Definition at line 140 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_10_P00_2_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN

VADC_G3_10: VADC input.

Definition at line 141 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_11_P00_1_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN

VADC_G3_11: VADC input.

Definition at line 142 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_1_P00_11_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN

VADC_G3_1: VADC input.

Definition at line 143 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_2_P00_10_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN

VADC_G3_2: VADC input.

Definition at line 144 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_3_P00_9_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN

VADC_G3_3: VADC input.

Definition at line 145 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_4_P00_8_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN

VADC_G3_4: VADC input.

Definition at line 146 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_5_P00_7_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN

VADC_G3_5: VADC input.

Definition at line 147 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_6_P00_6_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN

VADC_G3_6: VADC input.

Definition at line 148 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_7_P00_5_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN

VADC_G3_7: VADC input.

Definition at line 149 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_8_P00_4_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN

VADC_G3_8: VADC input.

Definition at line 150 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3_9_P00_3_IN

IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN

VADC_G3_9: VADC input.

Definition at line 151 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL0_P10_0_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT

VADC_G3BFL0: VADC output.

Definition at line 88 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL0_P10_6_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT

VADC_G3BFL0: VADC output.

Definition at line 89 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL1_P10_1_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT

VADC_G3BFL1: VADC output.

Definition at line 90 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL1_P10_7_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT

VADC_G3BFL1: VADC output.

Definition at line 91 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL2_P10_2_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT

VADC_G3BFL2: VADC output.

Definition at line 92 of file IfxVadc_PinMap.h.

◆ IfxVadc_G3BFL3_P10_3_OUT

IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT

VADC_G3BFL3: VADC output.

Definition at line 93 of file IfxVadc_PinMap.h.

◆ IfxVadc_GxBfl_Out_pinTable

IFX_EXTERN const IfxVadc_GxBfl_Out* IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]

IfxVadc_GxBfl_Out table.

Definition at line 165 of file IfxVadc_PinMap.h.

◆ IfxVadc_Vadcg_In_pinTable

IFX_EXTERN const IfxVadc_Vadcg_In* IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]

IfxVadc_Vadcg_In table.

Definition at line 168 of file IfxVadc_PinMap.h.


iLLD_TC26B: How to use the VADC ADC Interface driver?

How to use the VADC ADC Interface driver?
iLLD » VADC
Collaboration diagram for How to use the VADC ADC Interface driver?:

VADC comprises of independent analog channels with Analog/Digital converters to convert analog input to discrete digital output.

In the following sections it will be described, how to integrate the driver into the application framework.

Preparation

Include Files

Include following header file into your C code:

#include <Vadc/Adc/IfxVadc_Adc.h>

Variables

// VADC handle
IfxVadc_Adc vadc;
IfxVadc_Adc_Group adcGroup;

Module Initialisation

The module initialisation can be done in the same function:

// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
// initialize module
// IfxVadc_Adc vadc; // declared globally
IfxVadc_Adc_initModule(&vadc, &adcConfig);

Group Initialisation

The group initialisation can be done in the same function:

// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxVadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// enable all arbiter request sources
adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
// enable all gates in "always" mode (no edge detection)
adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// enable auto scan
adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
// initialize the group
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);

Queued Transfers

Now, VADC is initialised. Here,Three channels are used for queued transfers

// IMPORTANT: for deterministic results we have to disable the queue gate
// while filling the queue, otherwise results could be output in the wrong order
IfxVadc_GatingMode savedGate = IfxVadc_getQueueSlotGatingMode(adcGroup.group);
IfxVadc_GatingSource gatingSource=IfxVadc_getQueueSlotGatingSource(adcGroup.group);
IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, IfxVadc_GatingMode_disabled );
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig[3];
IfxVadc_Adc_Channel adcChannel[3];
for(int chnIx=0; chnIx<3; ++chnIx) {
IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
adcChannelConfig[chnIx].resultRegister = IfxVadc_ChannelResult_1; // use result register #1 for all channels
// initialize the channel
IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// Add channel to queue with refill enabled
IfxVadc_Adc_addToQueue(&adcChannel[chnIx], IFXVADC_QUEUE_REFILL);
// restore previous gate config
IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, savedGate );
// start the Queue
IfxVadc_Adc_startQueue(&adcGroup); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
// get 10 results for all 3 channels and store in temporary buffer
// (the usage of a buffer is required, since the print statements used by the checks take more time than the conversions)
Ifx_VADC_RES resultTrace[3*10];
for(int i=0; i<3*10; ++i)
{
unsigned chnIx = i % 3;
// wait for valid result
Ifx_VADC_RES conversionResult;
do {
conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
} while( !conversionResult.B.VF );
// store result
resultTrace[i] = conversionResult;
}
// stop the queue
IfxVadc_Adc_clearQueue(&adcGroup);
// check results in buffer
// ...
}

Auto Scan

Autoscan of 5 channels

// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxVadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// enable auto scan
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
// initialize the group
//IfxVadc_Adc_Group adcGroup; // no need to create a new one
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
{
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig[5];
IfxVadc_Adc_Channel adcChannel[5];
for(int chnIx=0; chnIx<5; ++chnIx) {
IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(chnIx); // use dedicated result register
// initialize the channel
IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// add to scan
unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
unsigned mask = channels;
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
}
// start scan
IfxVadc_Adc_startScan(&adcGroup);
// check results
for(int chnIx=0; chnIx<5; ++chnIx) {
unsigned group = adcChannel[chnIx].group->groupId;
unsigned channel = adcChannel[chnIx].channel;
// wait for valid result
Ifx_VADC_RES conversionResult;
do {
conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
} while( !conversionResult.B.VF );
}
}

Background Scan

Background Scan of 2 channels

// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxVadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// enable background scan
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig[2];
IfxVadc_Adc_Channel adcChannel[2];
for(int chnIx=0; chnIx<2; ++chnIx)
{
IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx + 5);
adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(5 + chnIx); // use register #5 and 6 for results
adcChannelConfig[chnIx].backgroundChannel = TRUE;
// initialize the channel
IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
// add to background scan
unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
unsigned mask = channels;
IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroup, channels, mask);
}
// start autoscan
IfxVadc_Adc_startBackgroundScan(&vadc);
// check results
for(int chnIx=0; chnIx<2; ++chnIx)
{
unsigned group = adcChannel[chnIx].group->groupId;
unsigned channel = adcChannel[chnIx].channel;
// wait for valid result
Ifx_VADC_RES conversionResult;
do
{
conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
} while( !conversionResult.B.VF );
// check with expected value
// ...
}

External Multiplexer Configuration

External Configuration of 3 channels at channel 3

IfxVadc_Adc_EmuxControl emuxConfig;
IfxVadc_Adc_initExternalMultiplexerModeConfig(&emuxConfig,vadc);
emuxConfig.groupId = IfxVadc_GroupId_1;
emuxConfig.channels = (uint8)IfxVadc_ChannelId_3;
emuxConfig.startChannel = IfxVadc_EmuxSelectValue_2; // it will take 0 to 2 external channel
emuxConfig.sampleTimeControl = IfxVadc_EmuxSampleTimeControl_always;
emuxConfig.mode = IfxVadc_ExternalMultiplexerMode_steady;
IfxVadc_Adc_EmuxPinConfig pinsConfig ={
.pins={ &IfxVadc_EMUX00_P02_6_OUT,
&IfxVadc_EMUX01_P02_7_OUT,
&IfxVadc_EMUX02_P02_8_OUT},
.outputMode = IfxPort_OutputMode_pushPull,
.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1
};
emuxConfig.emuxOutPinConfig = pinsConfig;
IfxVadc_Adc_initExternalMultiplexerMode(vadc, &emuxConfig);
IfxVadc_setEmuxGroupResolution(&vadc->G[emuxConfig.groupId], 0, IfxVadc_ChannelResolution_12bit);
IfxVadc_setEmuxGroupSampletime(&vadc->G[emuxConfig.groupId], 0, 50000, 1.0e-6);


iLLD_TC26B: Interface Driver

Modules
Interface Driver
iLLD » VADC
Collaboration diagram for Interface Driver:

Modules

Data Structures
Module Functions
Group Functions
Channel Functions
Background Autoscan Functions
Channel Scan Functions
Queue Functions
Clock Functions
Interrupt Functions
Variables
Emux Functions

Detailed Description


iLLD_TC26B: Data Structures

Data Structures
Data Structures
iLLD » VADC » Interface Driver
Collaboration diagram for Data Structures:

Data Structures

struct | IfxVadc_Adc
VADC handle data structure. More...
struct | IfxVadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure. More...
struct | IfxVadc_Adc_ArbiterConfig
Arbiter configuration structure. More...
struct | IfxVadc_Adc_BackgroundScanConfig
Background scan mode configuration structure. More...
struct | IfxVadc_Adc_ClassConfig
Input class configuration structure. More...
struct | IfxVadc_Adc_Group
Group handle data structure. More...
struct | IfxVadc_Adc_QueueConfig
Queue configuration structure. More...
struct | IfxVadc_Adc_ScanConfig
Scan mode configuration structure. More...
struct | IfxVadc_Adc_Channel
Channel handle data structure. More...
struct | IfxVadc_Adc_ChannelConfig
Channel configuration structure. More...
struct | IfxVadc_Adc_Config
VADC module configuration structure. More...
struct | IfxVadc_Adc_EmuxControl
Emux Control Structure. More...
struct | IfxVadc_Adc_GroupConfig
Group configuration structure. More...

Detailed Description

Data Structure Documentation

◆ IfxVadc_Adc

struct IfxVadc_Adc

VADC handle data structure.

Definition at line 360 of file IfxVadc_Adc.h.

Data Fields
Ifx_VADC * vadc Specifies the pointer to the VADC module registers.

◆ IfxVadc_Adc_GatingTriggerConfig

struct IfxVadc_Adc_GatingTriggerConfig

Gating/Trigger configuration structure.

Definition at line 367 of file IfxVadc_Adc.h.

Data Fields
IfxVadc_GatingMode | gatingMode | Specifies gating mode. High level, Low Level or Gating disabled.
IfxVadc_GatingSource | gatingSource | Specifies used gate input for group.
IfxVadc_TriggerMode | triggerMode | Specifies trigger mode. Rising, falling any edge leads to an trigger event.
IfxVadc_TriggerSource | triggerSource | Specifies used Trigger input for group.

◆ IfxVadc_Adc_ArbiterConfig

struct IfxVadc_Adc_ArbiterConfig

Arbiter configuration structure.

Definition at line 381 of file IfxVadc_Adc.h.

Data Fields
IfxVadc_ArbitrationRounds | arbiterRoundLength | Specifies arbiter round length.
boolean | requestSlotBackgroundScanEnabled | request background scan if enabled.
boolean | requestSlotQueueEnabled | request queue if enabled.
boolean | requestSlotScanEnabled | request scan if enabled.

◆ IfxVadc_Adc_BackgroundScanConfig

struct IfxVadc_Adc_BackgroundScanConfig

Background scan mode configuration structure.

Definition at line 391 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_BackgroundScanConfig:
[legend]
Data Fields
boolean | autoBackgroundScanEnabled | background autoscan functionality enable or disable.
IfxVadc_RequestSlotPriority | requestSlotPrio | priority of used background scan request slot.
IfxVadc_RequestSlotStartMode | requestSlotStartMode | start mode for request background scan source.
IfxVadc_Adc_GatingTriggerConfig | triggerConfig | trigger and gating configuration.

◆ IfxVadc_Adc_ClassConfig

struct IfxVadc_Adc_ClassConfig

Input class configuration structure.

Definition at line 401 of file IfxVadc_Adc.h.

Data Fields
IfxVadc_ChannelResolution | resolution | Specifies the conversion Mode 8,10,12Bit or 10bit fast compare.
float32 | sampleTime | Specifies the requested sample time for input class.

◆ IfxVadc_Adc_Group

struct IfxVadc_Adc_Group

Group handle data structure.

Definition at line 409 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_Group:
[legend]
Data Fields
Ifx_VADC_G * | group | Pointer to the group registers.
IfxVadc_GroupId | groupId | Specifies the group index.
IfxVadc_Adc | module | The VADC handle structure.

◆ IfxVadc_Adc_QueueConfig

struct IfxVadc_Adc_QueueConfig

Queue configuration structure.

Definition at line 418 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_QueueConfig:
[legend]
Data Fields
boolean | flushQueueAfterInit | Specifies if the queue is flushed after configuration.
IfxVadc_RequestSlotPriority | requestSlotPrio | priority of used queue request slot.
IfxVadc_RequestSlotStartMode | requestSlotStartMode | start mode for request queue source.
IfxVadc_Adc_GatingTriggerConfig | triggerConfig | trigger and gating configuration.

◆ IfxVadc_Adc_ScanConfig

struct IfxVadc_Adc_ScanConfig

Scan mode configuration structure.

Definition at line 428 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_ScanConfig:
[legend]
Data Fields
boolean | autoscanEnabled | Specifies autoscan functionality.
IfxVadc_RequestSlotPriority | requestSlotPrio | priority of used scan request slot.
IfxVadc_RequestSlotStartMode | requestSlotStartMode | start mode for request scan source.
IfxVadc_Adc_GatingTriggerConfig | triggerConfig | Specifies trigger and gating configuration.

◆ IfxVadc_Adc_Channel

struct IfxVadc_Adc_Channel

Channel handle data structure.

Definition at line 449 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_Channel:
[legend]
Data Fields
IfxVadc_ChannelId | channel | Specifies the channel index.
IFX_CONST IfxVadc_Adc_Group * | group | Specifies the group of the channel.
IfxVadc_ChannelResult | resultreg | Specifies allocated result register.

◆ IfxVadc_Adc_ChannelConfig

struct IfxVadc_Adc_ChannelConfig

Channel configuration structure.

Definition at line 458 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_ChannelConfig:
[legend]
Data Fields
boolean | backgroundChannel | Specifies channel is used as background channel.
IfxVadc_BoundaryExtension | boundaryMode | Specifies Standard mode of fast compare mode.
IfxVadc_ChannelId | channelId | Specifies the channel index.
Ifx_Priority | channelPriority | Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | channelServProvider | Interrupt service provider for the channel trigger interrupt.
IfxVadc_SrcNr | channelSrcNr | Service node of the channel trigger.
boolean | globalResultUsage | Specifies storage in global result register.
IFX_CONST IfxVadc_Adc_Group * | group | Specifies pointer to the IfxVadc_Adc_Group group handle.
IfxVadc_InputClasses | inputClass | Specifies input class selection.
IfxVadc_LimitCheck | limitCheck | Specifies boundary band selection upper/lower.
IfxVadc_BoundarySelection | lowerBoundary | Specifies lower boundary selection.
IfxVadc_ChannelReference | reference | Specifies Reference selection.
Ifx_Priority | resultPriority | Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
IfxVadc_ChannelResult | resultRegister | Specifies Result register selection.
IfxSrc_Tos | resultServProvider | Interrupt service provider for the result trigger interrupt.
IfxVadc_SrcNr | resultSrcNr | Service node of the result trigger.
boolean | rightAlignedStorage | Specifies result is right aligned.
boolean | synchonize | Specifies synchronized conversion channel.
IfxVadc_BoundarySelection | upperBoundary | Specifies upper boundary selection.

◆ IfxVadc_Adc_Config

struct IfxVadc_Adc_Config

VADC module configuration structure.

Definition at line 483 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_Config:
[legend]
Data Fields
float32 | analogFrequency | Specifies analog ADC Frequency.
float32 | digitalFrequency | Specifies digital ADC Frequency.
IfxVadc_Adc_ClassConfig | globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES] | Specifies the global conversion settings one and two.
float32 | moduleFrequency | module Frequency in Hz.
boolean | startupCalibration | Can be enabled to execute a startup calibration (disabled by default). Note that this option will also enable all converter groups. If this isn't desired, don't use this option, but execute IfxVadc_Adc_startupCalibration() after all ADC groups have been initialized.
IfxVadc_LowSupplyVoltageSelect | supplyVoltage | Select Low Power Supply Voltage.
Ifx_VADC * | vadc | Specifies the pointer to the VADC module registers.

◆ IfxVadc_Adc_EmuxControl

struct IfxVadc_Adc_EmuxControl

Emux Control Structure.

Definition at line 498 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_EmuxControl:
[legend]
Data Fields
uint8 | channels | specifies channel number
IfxVadc_ChannelSelectionStyle | channelSelectionStyle | External Multiplexer Channel Selection Style.
IfxVadc_EmuxCodingScheme | code | specifes binary/gray code
IfxVadc_EmuxInterface | emuxInterface | specifies the Emux interface
IfxVadc_Adc_EmuxPinConfig | emuxOutPinConfig | configure the emux output pin
IfxVadc_GroupId | groupId | specifies groupId
IfxVadc_ExternalMultiplexerMode | mode | Specifies the External Multiplexer mode.
IfxVadc_EmuxSampleTimeControl | sampleTimeControl | specifies when to use sample time control
IfxVadc_EmuxSelectValue | startChannel | specifies the external channel start value(EMUX[x:0]) x- specifies external channel number
Ifx_VADC * | vadc | pointer to Module Configuration

◆ IfxVadc_Adc_GroupConfig

struct IfxVadc_Adc_GroupConfig

Group configuration structure.

Definition at line 515 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_GroupConfig:
[legend]
Data Fields
IfxVadc_Adc_ArbiterConfig | arbiter | Arbiter configuration structure.
IfxVadc_Adc_BackgroundScanConfig | backgroundScanRequest | Specifies back ground scan configuration.
boolean | disablePostCalibration | Specifies if calibration after conversion (post calibration) should be disabled.
IfxVadc_GroupId | groupId | Specifies the group/kernel id.
IfxVadc_Adc_ClassConfig | inputClass[IFXVADC_NUM_INPUTCLASSES] | Specifies conversion settings one and two.
IfxVadc_GroupId | master | Specifies the master group. If master is different from groupId, then the group is configured as slave.
IFX_CONST IfxVadc_Adc * | module | Specifies pointer to the IfxVadc_Adc module handle.
IfxVadc_Adc_QueueConfig | queueRequest | Specifies queued mode configuration.
IfxVadc_Adc_ScanConfig | scanRequest | Specifies scan mode configuration.


iLLD_TC26B: Module Functions

Functions
Module Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Module Functions:

Functions

IFX_INLINE void | IfxVadc_Adc_deInitModule (IfxVadc_Adc *vadc)
Reset the VADC module. More...
IFX_INLINE void | IfxVadc_Adc_getModuleConfig (IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
Get the current VADC configuration (e.g. VADC frequency) More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_Adc_getResultBasedOnRequestSource (IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_EXTERN void | IfxVadc_Adc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initModule (IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration. More...
IFX_EXTERN void | IfxVadc_Adc_initModuleConfig (IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_deInitModule()

IFX_INLINE void IfxVadc_Adc_deInitModule ( IfxVadc_Adc * vadc )

Reset the VADC module.

Parameters
vadc pointer to the VADC module
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 1181 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_disableModule()

IFX_EXTERN void IfxVadc_Adc_disableModule ( Ifx_VADC * vadc )

Disable VADC Module.

Parameters
vadc Pointer to VADC Module
Returns
None

Definition at line 124 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getModuleConfig()

IFX_INLINE void IfxVadc_Adc_getModuleConfig | ( | IfxVadc_Adc * | vadc,
 |  | IfxVadc_Adc_Config * | config
 | ) |  |

Get the current VADC configuration (e.g. VADC frequency)

Parameters
vadc | pointer to the VADC module
config | pointer to the VADC module configuration
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 1213 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getResultBasedOnRequestSource()

IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource | ( | IfxVadc_Adc_Group * | group,
 |  | IfxVadc_ChannelId | channel,
 |  | IfxVadc_RequestSource | sourceType
 | ) |  |

Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset.

Parameters
group | pointer to the VADC group
channel | channel number
sourceType | type of request source
Returns
scaled Conversion result
// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
// initialize module
IfxVadc_Adc vadc;
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId0, change to GroupId2)
adcGroupConfig.groupId = IfxVadc_GroupId2;
adcGroupConfig.master = adcGroupConfig.groupId;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// enable auto scan
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
// initialize the group
IfxVadc_Adc_Group adcGroup;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
// change channel (default is ChannelId0, change to ChannelId2)
adcChannelConfig.channelId = IfxVadc_ChannelId2;
// initialize the channel
IfxVadc_Adc_Channel adcChannel;
IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
uint32 channels = (1 << 2); // enable channel #2
uint32 mask = (1 << 7) | (1 << 2); // modify the selection for channel #7 and #2; channel #7 will be disabled
// configure wait for read mode
IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
// configure scan
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
// start the scan
IfxVadc_Adc_startScan(&adcGroup);
// wait for valid result
Ifx_VADC_RES resultChannel;
do {
resultChannel = IfxVadc_Adc_getResultBasedOnRequestSource(&adcGroup, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
} while( !resultChannel.B.VF );

Definition at line 1239 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_initModule()

IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initModule | ( | IfxVadc_Adc * | vadc,
 |  | const IfxVadc_Adc_Config * | config
 | ) |  |

Initialise the VADC to run with the expected frequency and calibration.

Parameters
vadc | pointer to the VADC handle
config | pointer to the VADC configuration
Returns
IfxVadc_Status

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 725 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_initModuleConfig()

IFX_EXTERN void IfxVadc_Adc_initModuleConfig | ( | IfxVadc_Adc_Config * | config,
 |  | Ifx_VADC * | vadc
 | ) |  |

Initialise buffer with default VADC configuration.

Parameters
config | pointer to the VADC module configuration
vadc | pointer to the VADC
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 780 of file IfxVadc_Adc.c.


iLLD_TC26B: Group Functions

Functions
Group Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Group Functions:

Functions

IFX_INLINE IfxVadc_GroupId | IfxVadc_Adc_getMasterId (IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id. More...
IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL | IfxVadc_Adc_getMasterKernelIndex (IfxVadc_GroupId slave, IfxVadc_GroupId master)
Gets the current master kernel index. More...
IFX_INLINE Ifx_VADC_G * | IfxVadc_Adc_getGroupRegsFromGroup (const IfxVadc_Adc_Group *group)
Gets the current group register set. More...
IFX_INLINE void | IfxVadc_Adc_getGroupResult (IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE Ifx_VADC * | IfxVadc_Adc_getVadcFromGroup (const IfxVadc_Adc_Group *group)
Gets the current group module register address. More...
IFX_EXTERN void | IfxVadc_Adc_deInitGroup (IfxVadc_Adc_Group *group)
Reset the VADC group. More...
IFX_EXTERN void | IfxVadc_Adc_getGroupConfig (IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency) More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initGroup (IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first. More...
IFX_EXTERN void | IfxVadc_Adc_initGroupConfig (IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_deInitGroup()

IFX_EXTERN void IfxVadc_Adc_deInitGroup ( IfxVadc_Adc_Group * group )

Reset the VADC group.

Parameters
group pointer to the VADC group
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 110 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getGroupConfig()

IFX_EXTERN void IfxVadc_Adc_getGroupConfig | ( | IfxVadc_Adc_Group * | group,
 |  | IfxVadc_Adc_GroupConfig * | config
 | ) |  |

Get the current group configuration (e.g. vadc frequency)

Parameters
group | pointer to the VADC group
config | pointer to the VADC group configuration
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 216 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getGroupRegsFromGroup()

IFX_INLINE Ifx_VADC_G * IfxVadc_Adc_getGroupRegsFromGroup ( const IfxVadc_Adc_Group * group )

Gets the current group register set.

Parameters
group Group handle data structure
Returns
Group register set

Ifx_VADC* vadc = Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0

uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2 uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled

//confiure wait for read mode for global result register IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE); IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);

// configure scan IfxVadc_setScan(group, channels, mask);

// enable auto scan IfxVadc_setAutoScan(group, TRUE);

// start the scan IfxVadc_startScan(group);

// wait for conversion to finish

// fetch the 2 results of conversion for group 0 Ifx_VADC_RES results[10]; result = IfxVadc_getGroupResult(group, results, 0, 2);

Definition at line 1201 of file IfxVadc_Adc.h.

Referenced by IfxVadc_Adc_deInitGroup(), IfxVadc_Adc_getChannelConfig(), and IfxVadc_Adc_initChannel().

◆ IfxVadc_Adc_getGroupResult()

IFX_INLINE void IfxVadc_Adc_getGroupResult | ( | IfxVadc_Adc_Group * | group,
 |  | Ifx_VADC_RES * | results,
 |  | uint32 | resultOffset,
 |  | uint32 | numResults
 | ) |  |

Get conversion result for the group.

Parameters
group | pointer to the VADC group
results | pointer to scaled conversion results
resultOffset | offset for the first result
numResults | number of results
Returns
None
// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
// initialize module
IfxVadc_Adc vadc;
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId0, change to GroupId2)
adcGroupConfig.groupId = IfxVadc_GroupId2;
adcGroupConfig.master = adcGroupConfig.groupId;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// enable auto scan
adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
// initialize the group
IfxVadc_Adc_Group adcGroup;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig2;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
// change channel (default is ChannelId0, change to ChannelId2)
adcChannelConfig2.channelId = IfxVadc_ChannelId2;
// initialize the channel
IfxVadc_Adc_Channel adcChannel2;
IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig5;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
// change channel (default is ChannelId0, change to ChannelId5)
adcChannelConfig5.channelId = IfxVadc_ChannelId5;
// change channel result register (default is ChannelResult0, change to ChannelResult1)
adcChannelConfig5.resultRegister = IfxVadc_ChannelResult1;
// initialize the channel
IfxVadc_Adc_Channel adcChannel5;
IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
// configure wait for read mode
IfxVadc_Adc_configureWaitForReadMode(&adcChannel2, TRUE);
IfxVadc_Adc_configureWaitForReadMode(&adcChannel5, TRUE);
// configure scan
IfxVadc_Adc_setScan(&adcGroup, channels, mask);
// start the scan
IfxVadc_Adc_startScan(&adcGroup);
// wait for conversion to finish
IfxVadc_Status scanStatus;
do
{
scanStatus = IfxVadc_Adc_getScanStatus(&adcGroup);
} while(scanStatus==IfxVadc_Status_ChannelsStillPending);
// fetch the 2 results of conversion for group 0
Ifx_VADC_RES results[10];
IfxVadc_Adc_getGroupResult(&adcGroup, results, 0, 2);

Definition at line 1207 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getMasterId()

IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId | ( | IfxVadc_GroupId | slave,
 |  | IfxVadc_Adc_SYNCTR_STSEL | masterIndex
 | ) |  |

Gets the master id.

Parameters
slave | Index of the group
masterIndex | master kernel index
Returns
Master Group Id

Definition at line 74 of file IfxVadc_Adc.c.

Referenced by IfxVadc_Adc_getGroupConfig().

◆ IfxVadc_Adc_getMasterKernelIndex()

IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex | ( | IfxVadc_GroupId | slave,
 |  | IfxVadc_GroupId | master
 | ) |  |

Gets the current master kernel index.

Parameters
slave | Index of the group
master | Index of the group
Returns
current master kernel index

Definition at line 100 of file IfxVadc_Adc.c.

Referenced by IfxVadc_Adc_initGroup().

◆ IfxVadc_Adc_getVadcFromGroup()

IFX_INLINE Ifx_VADC * IfxVadc_Adc_getVadcFromGroup ( const IfxVadc_Adc_Group * group )

Gets the current group module register address.

Parameters
group Group handle data structure
Returns
Group module register base address

Definition at line 1251 of file IfxVadc_Adc.h.

Referenced by IfxVadc_Adc_deInitGroup(), and IfxVadc_Adc_initChannel().

◆ IfxVadc_Adc_initGroup()

IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initGroup | ( | IfxVadc_Adc_Group * | group,
 |  | const IfxVadc_Adc_GroupConfig * | config
 | ) |  |

Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first.

Parameters
group | pointer to the VADC group
config | pointer to the VADC group configuration
Returns
IfxVadc_Status

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 452 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_initGroupConfig()

IFX_EXTERN void IfxVadc_Adc_initGroupConfig | ( | IfxVadc_Adc_GroupConfig * | config,
 |  | IfxVadc_Adc * | vadc
 | ) |  |

Initialise buffer with default VADC configuration.

Parameters
config | pointer to the VADC group configuration
vadc | pointer to the VADC module
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 674 of file IfxVadc_Adc.c.


iLLD_TC26B: Channel Functions

Functions
Channel Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Channel Functions:

Functions

IFX_INLINE void | IfxVadc_Adc_configureWaitForReadMode (IfxVadc_Adc_Channel *channel, boolean waitForRead)
pointer to the VADC channel More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_Adc_getResult (IfxVadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment) More...
IFX_INLINE Ifx_VADC_RESD | IfxVadc_Adc_getDebugResult (IfxVadc_Adc_Channel *channel)
Get debug result (Function does not care about the alignment) More...
IFX_EXTERN void | IfxVadc_Adc_getChannelConfig (IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN float32 | IfxVadc_Adc_getChannelConversionTime (IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initChannel (IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
IFX_EXTERN void | IfxVadc_Adc_initChannelConfig (IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_configureWaitForReadMode()

IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode | ( | IfxVadc_Adc_Channel * | channel,
 |  | boolean | waitForRead
 | ) |  |

pointer to the VADC channel

Parameters
channel | pointer to the VADC channel
waitForRead | wait for read mode enabled/disable
Returns
None

For coding example see: IfxVadc_Adc_getGroupResult

Definition at line 1169 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getChannelConfig()

IFX_EXTERN void IfxVadc_Adc_getChannelConfig | ( | IfxVadc_Adc_Channel * | channel,
 |  | IfxVadc_Adc_ChannelConfig * | config
 | ) |  |

Get the current channel configuration (e.g. sample settings)

Parameters
channel | pointer to the VADC channel
config | pointer to the VADC channel configuration
Returns
None

Example Usage :How to use the VADC ADC Interface driver?

Definition at line 130 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getChannelConversionTime()

IFX_EXTERN float32 IfxVadc_Adc_getChannelConversionTime | ( | IfxVadc_Adc_Channel * | channel,
 |  | IfxVadc_ConversionType | conversionMode
 | ) |  |

get the channel Conversion Time

Parameters
channel | Channel
conversionMode | specifies Compatible mode(Standard Conversion mode).
Returns
channel conversion time in sec

Definition at line 210 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_getDebugResult()

IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult ( IfxVadc_Adc_Channel * channel )

Get debug result (Function does not care about the alignment)

Parameters
channel pointer to the VADC channel.
Returns
Debug Conversion result

Definition at line 1287 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getResult()

IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult ( IfxVadc_Adc_Channel * channel )

Get conversion result (Function does not care about the alignment)

Parameters
channel pointer to the VADC channel
Returns
scaled Conversion result

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1233 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_initChannel()

IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initChannel | ( | IfxVadc_Adc_Channel * | channel,
 |  | const IfxVadc_Adc_ChannelConfig * | config
 | ) |  |

Initialise one channel with given configuration.

Parameters
channel | pointer to the VADC channel
config | pointer to the VADC channel configuration
Returns
IfxVadc_Status

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 330 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_initChannelConfig()

IFX_EXTERN void IfxVadc_Adc_initChannelConfig | ( | IfxVadc_Adc_ChannelConfig * | config,
 |  | const IfxVadc_Adc_Group * | group
 | ) |  |

Initialise buffer with default channel configuration.

Parameters
config | pointer to the VADC channel configuration
group | pointer to the VADC group
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 424 of file IfxVadc_Adc.c.


iLLD_TC26B: Background Autoscan Functions

Functions
Background Autoscan Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Background Autoscan Functions:

Functions

IFX_INLINE void | IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister (IfxVadc_Adc *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getBackgroundScanStatus (IfxVadc_Adc *vadc)
Gives the background scan status for a group. More...
IFX_INLINE Ifx_VADC_GLOBRES | IfxVadc_Adc_getGlobalResult (IfxVadc_Adc *vadc)
returns result stored in global result register More...
IFX_INLINE void | IfxVadc_Adc_setBackgroundScan (IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
configures a background scan More...
IFX_INLINE void | IfxVadc_Adc_startBackgroundScan (IfxVadc_Adc *vadc)
Starts a background scan. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister()

IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister | ( | IfxVadc_Adc * | vadc,
 |  | boolean | waitForRead
 | ) |  |

access function to enable/disable wait for read mode for global result register

Parameters
vadc | pointer to the VADC module
waitForRead | wait for read mode enabled/disabled
Returns
None

For coding example see: IfxVadc_Adc_getGlobalResult

Definition at line 1175 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getBackgroundScanStatus()

IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus ( IfxVadc_Adc * vadc )

Gives the background scan status for a group.

Parameters
vadc pointer to the VADC module
Returns
IfxVadc_Status

Definition at line 1189 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getGlobalResult()

IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult ( IfxVadc_Adc * vadc )

returns result stored in global result register

Parameters
vadc pointer to the VADC module
Returns
global result register
// create configuration
IfxVadc_Adc_Config adcConfig;
IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
// initialize module
IfxVadc_Adc vadc;
IfxVadc_Adc_initModule(&vadc, &adcConfig);
// create group config
IfxVadc_Adc_GroupConfig adcGroupConfig;
IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
// change group (default is GroupId_0, change to GroupId_3)
adcGroupConfig.groupId = IfxVadc_GroupId_3;
// IMPORTANT: usually we use the same group as master!
adcGroupConfig.master = adcGroupConfig.groupId;
// enable background scan
adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
// enable gate in "always" mode (no edge detection)
adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
// initialize the group
IfxVadc_Adc_Group adcGroup;
IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig2;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
adcChannelConfig2.backgroundChannel = TRUE;
adcChannelConfig2.globalResultUsage = TRUE;
// change channel (default is ChannelId0, change to ChannelId2)
adcChannelConfig2.channelId = IfxVadc_ChannelId2;
// initialize the channel
IfxVadc_Adc_Channel adcChannel2;
IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
// create channel config
IfxVadc_Adc_ChannelConfig adcChannelConfig5;
IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
adcChannelConfig5.backgroundChannel = TRUE;
adcChannelConfig5.globalResultUsage = TRUE;
// change channel (default is ChannelId0, change to ChannelId5)
adcChannelConfig5.channelId = IfxVadc_ChannelId5;
// initialize the channel
IfxVadc_Adc_Channel adcChannel5;
IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
//configure wait for read mode
IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(&vadc, TRUE);
// configure background scan
IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroupConfig, channels, mask);
// start the background scan
IfxVadc_Adc_startBackgroundScan(&vadc);
// wait for valid result for channel 2
Ifx_VADC_GLOBRES resultChannel2;
do {
resultChannel2 = IfxVadc_Adc_getGlobalResult(&vadc);
} while( !resultChannel2.B.VF );
// wait for valid result for channel 5
Ifx_VADC_GLOBRES resultChannel5;
do {
resultChannel5 = IfxVadc_Adc_getGlobalResult(&vadc);
} while( !resultChannel5.B.VF );

Definition at line 1195 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_setBackgroundScan()

IFX_INLINE void IfxVadc_Adc_setBackgroundScan | ( | IfxVadc_Adc * | vadc,
 |  | IfxVadc_Adc_Group * | group,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

configures a background scan

Parameters
vadc | pointer to the VADC module
group | pointer to the VADC group
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1257 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_startBackgroundScan()

IFX_INLINE void IfxVadc_Adc_startBackgroundScan ( IfxVadc_Adc * vadc )

Starts a background scan.

Parameters
vadc pointer to the VADC module
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1269 of file IfxVadc_Adc.h.


iLLD_TC26B: Channel Scan Functions

Functions
Channel Scan Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Channel Scan Functions:

Functions

IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getScanStatus (IfxVadc_Adc_Group *group)
Gives the scan status for a group. More...
IFX_INLINE void | IfxVadc_Adc_setScan (IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
Configures an autoscan. More...
IFX_INLINE void | IfxVadc_Adc_startScan (IfxVadc_Adc_Group *group)
Starts an autoscan on the specified group. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_getScanStatus()

IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus ( IfxVadc_Adc_Group * group )

Gives the scan status for a group.

Parameters
group pointer to the VADC group
Returns
IfxVadc_Status

For coding example see: IfxVadc_Adc_getResultBasedOnRequestSource

Definition at line 1245 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_setScan()

IFX_INLINE void IfxVadc_Adc_setScan | ( | IfxVadc_Adc_Group * | group,
 |  | uint32 | channels,
 |  | uint32 | mask
 | ) |  |

Configures an autoscan.

Parameters
group | pointer to the VADC group
channels | specifies the channels which should be enabled/disabled
mask | specifies the channels which should be modified
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1263 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_startScan()

IFX_INLINE void IfxVadc_Adc_startScan ( IfxVadc_Adc_Group * group )

Starts an autoscan on the specified group.

Parameters
group pointer to the VADC group
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1281 of file IfxVadc_Adc.h.


iLLD_TC26B: Queue Functions

Functions
Queue Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Queue Functions:

Functions

IFX_INLINE void | IfxVadc_Adc_addToQueue (IfxVadc_Adc_Channel *channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control. More...
IFX_INLINE void | IfxVadc_Adc_clearQueue (IfxVadc_Adc_Group *group)
Flush the contents of the queue of a group. More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getQueueStatus (IfxVadc_Adc_Group *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_INLINE void | IfxVadc_Adc_startQueue (IfxVadc_Adc_Group *group)
Starts a queue of a group by generating a trigger event through software. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_addToQueue()

IFX_INLINE void IfxVadc_Adc_addToQueue | ( | IfxVadc_Adc_Channel * | channel,
 |  | uint32 | options
 | ) |  |

Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control.

Parameters
channel | pointer to the VADC channel
options | options for channel
Returns
None

For coding example see: IfxVadc_Adc_getResult

Definition at line 1157 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_clearQueue()

IFX_INLINE void IfxVadc_Adc_clearQueue ( IfxVadc_Adc_Group * group )

Flush the contents of the queue of a group.

Parameters
group pointer to the VADC group
Returns
None

For coding example see: IfxVadc_Adc_getResult

Definition at line 1163 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_getQueueStatus()

IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus ( IfxVadc_Adc_Group * group )

Gives the status of the Queue of a group by returning non zero value if the Queue is full.

Parameters
group pointer to the VADC group
Returns
Queue status

For coding example see: IfxVadc_Adc_getResult

Definition at line 1227 of file IfxVadc_Adc.h.

◆ IfxVadc_Adc_startQueue()

IFX_INLINE void IfxVadc_Adc_startQueue ( IfxVadc_Adc_Group * group )

Starts a queue of a group by generating a trigger event through software.

Parameters
group pointer to the VADC group
Returns
None

For coding example see: How to use the VADC ADC Interface driver?

Definition at line 1275 of file IfxVadc_Adc.h.


iLLD_TC26B: Clock Functions

Clock Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Clock Functions:


iLLD_TC26B: Interrupt Functions

Interrupt Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Interrupt Functions:


iLLD_TC26B: Variables

Variables
Variables
iLLD » VADC » Interface Driver
Collaboration diagram for Variables:

Variables

IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex [IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS]

Detailed Description

Variable Documentation

◆ IfxVadc_Adc_masterIndex

IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex[IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS]
Initial value:
= {
{0, 1, 2, 3},
{1, 0, 2, 3},
{1, 2, 0, 3},
{1, 2, 3, 0}
}

Definition at line 60 of file IfxVadc_Adc.c.

Referenced by IfxVadc_Adc_getMasterId(), and IfxVadc_Adc_getMasterKernelIndex().


iLLD_TC26B: Emux Functions

Functions
Emux Functions
iLLD » VADC » Interface Driver
Collaboration diagram for Emux Functions:

Functions

IFX_EXTERN void | IfxVadc_Adc_initExternalMultiplexerModeConfig (IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer More...
IFX_EXTERN void | IfxVadc_Adc_initExternalMultiplexerMode (Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...

Detailed Description

Function Documentation

◆ IfxVadc_Adc_initExternalMultiplexerMode()

IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerMode | ( | Ifx_VADC * | vadc,
 |  | const IfxVadc_Adc_EmuxControl * | emuxControl
 | ) |  |

initalise external multiplexer.

Parameters
vadc | Pointer to VADC Module space
emuxControl | speciifies EMUX configuration
Returns
None

Definition at line 817 of file IfxVadc_Adc.c.

◆ IfxVadc_Adc_initExternalMultiplexerModeConfig()

IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerModeConfig | ( | IfxVadc_Adc_EmuxControl * | emuxConfig,
 |  | Ifx_VADC * | vadc
 | ) |  |

initialise default configuration for external multiplexer

Parameters
emuxConfig | speciifies EMUX configuration
vadc | pointer to VADC module space
Returns
None

Definition at line 796 of file IfxVadc_Adc.c.


iLLD_TC26B: IfxVadc_cfg.h File Reference

  • _Impl
Macros | Enumerations | Variables
IfxVadc_cfg.h File Reference
iLLD » VADC

VADC on-chip implementation data. More...

#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxVadc_cfg.h:

Go to the source code of this file.

Macros

#define | IFXVADC_NUM_ADC_GROUPS (4 )
Number of ADC Groups. More...
#define | IFXVADC_NUM_ADC_CAL_GROUPS (4 )
Number of calibrated ADC Groups. More...
#define | IFXVADC_ANALOG_FREQUENCY_MAX (20000000)
Maximum allowed analog frequency. More...
#define | IFXVADC_ANALOG_FREQUENCY_MIN (500000)
Minimum allowed analog frequency. More...
#define | IFXVADC_DEFAULT_ANALOG_FREQ (20000000)
Default analog frequency used in initModuleConfig function. More...
#define | IFXVADC_NUM_REQUESTSLOTS (3)
Number of Conversion request Slots. More...
#define | IFXVADC_NUM_INPUTCLASSES (2)
Number of group specific Input Class. More...
#define | IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)
Maximum number of configurable bitfields in ACCPROT0 register. More...
#define | IFXVADC_QUEUE_REFILL (1 << IFX_VADC_G_QBUR0_RF_OFF)
#define | IFXVADC_NUM_GLOBAL_INPUTCLASSES (2)
Number of ADC group input classes. More...
#define | IFXVADC_NUM_ADC_COMMON_GROUPS (2)
#define | IFXVADC_SAMPLETIME_MIN (2)
#define | IFXVADC_NUM_EMUX_INTERFACE (2)
#define | IFXVADC_NUM_MODULES (1)

Enumerations

enum IfxVadc_GroupId {
IfxVadc_GroupId_0,
IfxVadc_GroupId_1,
IfxVadc_GroupId_2,
IfxVadc_GroupId_3,
IfxVadc_GroupId_global0,
IfxVadc_GroupId_global1
}
VADC Groups
More...

Variables

IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses [(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]

Detailed Description

VADC on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxVadc_cfg.h.

Macro Definition Documentation

◆ IFXVADC_ANALOG_FREQUENCY_MAX

#define IFXVADC_ANALOG_FREQUENCY_MAX (20000000)

Maximum allowed analog frequency.

Definition at line 55 of file IfxVadc_cfg.h.

Referenced by IfxVadc_initializeFAdcI().

◆ IFXVADC_ANALOG_FREQUENCY_MIN

#define IFXVADC_ANALOG_FREQUENCY_MIN (500000)

Minimum allowed analog frequency.

Definition at line 59 of file IfxVadc_cfg.h.

Referenced by IfxVadc_initializeFAdcI().

◆ IFXVADC_DEFAULT_ANALOG_FREQ

#define IFXVADC_DEFAULT_ANALOG_FREQ (20000000)

Default analog frequency used in initModuleConfig function.

Definition at line 63 of file IfxVadc_cfg.h.

Referenced by IfxVadc_Adc_initModuleConfig().

◆ IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER

#define IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)

Maximum number of configurable bitfields in ACCPROT0 register.

Definition at line 75 of file IfxVadc_cfg.h.

Referenced by IfxVadc_disableAccess(), and IfxVadc_enableAccess().

◆ IFXVADC_NUM_ADC_CAL_GROUPS

#define IFXVADC_NUM_ADC_CAL_GROUPS (4 )

Number of calibrated ADC Groups.

Definition at line 51 of file IfxVadc_cfg.h.

Referenced by IfxVadc_disablePostCalibration(), and IfxVadc_startupCalibration().

◆ IFXVADC_NUM_ADC_COMMON_GROUPS

#define IFXVADC_NUM_ADC_COMMON_GROUPS (2)

Definition at line 83 of file IfxVadc_cfg.h.

◆ IFXVADC_NUM_ADC_GROUPS

#define IFXVADC_NUM_ADC_GROUPS (4 )

Number of ADC Groups.

Definition at line 47 of file IfxVadc_cfg.h.

Referenced by IfxVadc_Adc_initModule(), and IfxVadc_getBackgroundScanStatus().

◆ IFXVADC_NUM_EMUX_INTERFACE

#define IFXVADC_NUM_EMUX_INTERFACE (2)

Definition at line 87 of file IfxVadc_cfg.h.

◆ IFXVADC_NUM_GLOBAL_INPUTCLASSES

#define IFXVADC_NUM_GLOBAL_INPUTCLASSES (2)

Number of ADC group input classes.

Definition at line 81 of file IfxVadc_cfg.h.

Referenced by IfxVadc_Adc_initModule().

◆ IFXVADC_NUM_INPUTCLASSES

#define IFXVADC_NUM_INPUTCLASSES (2)

Number of group specific Input Class.

Definition at line 71 of file IfxVadc_cfg.h.

Referenced by IfxVadc_Adc_getGroupConfig(), and IfxVadc_Adc_initGroup().

◆ IFXVADC_NUM_MODULES

#define IFXVADC_NUM_MODULES (1)

Definition at line 89 of file IfxVadc_cfg.h.

◆ IFXVADC_NUM_REQUESTSLOTS

#define IFXVADC_NUM_REQUESTSLOTS (3)

Number of Conversion request Slots.

Definition at line 67 of file IfxVadc_cfg.h.

◆ IFXVADC_QUEUE_REFILL

#define IFXVADC_QUEUE_REFILL (1 << IFX_VADC_G_QBUR0_RF_OFF)

Definition at line 77 of file IfxVadc_cfg.h.

◆ IFXVADC_SAMPLETIME_MIN

#define IFXVADC_SAMPLETIME_MIN (2)

Definition at line 85 of file IfxVadc_cfg.h.

Referenced by IfxVadc_getEmuxGlobalSampleTime(), IfxVadc_getEmuxGroupSampleTime(), IfxVadc_getGlobalSampleTime(), and IfxVadc_getGroupSampleTime().

Enumeration Type Documentation

◆ IfxVadc_GroupId

enum IfxVadc_GroupId

VADC Groups

Enumerator
IfxVadc_GroupId_0 | VADC group 0.
IfxVadc_GroupId_1 | VADC group 1.
IfxVadc_GroupId_2 | VADC group 2.
IfxVadc_GroupId_3 | VADC group 3.
IfxVadc_GroupId_global0 | VADC group global0.
IfxVadc_GroupId_global1 | VADC group global1.

Definition at line 99 of file IfxVadc_cfg.h.

Variable Documentation

◆ IfxVadc_cfg_srcAddresses

IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]

Definition at line 114 of file IfxVadc_cfg.h.


iLLD_TC26B: IfxVadc_PinMap.c File Reference

  • _PinMap
Variables
IfxVadc_PinMap.c File Reference
iLLD » VADC

VADC I/O map. More...

#include "IfxVadc_PinMap.h"
Include dependency graph for IfxVadc_PinMap.c:

Go to the source code of this file.

Variables

IfxVadc_Emux_Out | IfxVadc_EMUX00_P02_6_OUT = {&MODULE_VADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX00_P33_3_OUT = {&MODULE_VADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX01_P02_7_OUT = {&MODULE_VADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX01_P33_2_OUT = {&MODULE_VADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX02_P02_8_OUT = {&MODULE_VADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX02_P33_1_OUT = {&MODULE_VADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX10_P00_6_OUT = {&MODULE_VADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX10_P33_6_OUT = {&MODULE_VADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX11_P00_7_OUT = {&MODULE_VADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX11_P33_5_OUT = {&MODULE_VADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX12_P00_8_OUT = {&MODULE_VADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5}
IfxVadc_Emux_Out | IfxVadc_EMUX12_P33_4_OUT = {&MODULE_VADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G0BFL0_P33_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G0BFL1_P33_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G0BFL2_P33_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G0BFL3_P33_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G1BFL0_P33_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G1BFL1_P33_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G1BFL2_P33_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G1BFL3_P33_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt6}
IfxVadc_GxBfl_Out | IfxVadc_G2BFL0_P00_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G2BFL1_P00_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G2BFL2_P00_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt3}
IfxVadc_GxBfl_Out | IfxVadc_G2BFL3_P00_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL0_P10_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL0_P10_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt7}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL1_P10_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL1_P10_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt4}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL2_P10_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5}
IfxVadc_GxBfl_Out | IfxVadc_G3BFL3_P10_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt2}
IfxVadc_Vadcg_In | IfxVadc_G0_0_AN0_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 0}, 0}
IfxVadc_Vadcg_In | IfxVadc_G0_10_AN10_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,10}, 10}
IfxVadc_Vadcg_In | IfxVadc_G0_11_AN11_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,11}, 11}
IfxVadc_Vadcg_In | IfxVadc_G0_12_AN12_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,12}, 12}
IfxVadc_Vadcg_In | IfxVadc_G0_13_AN13_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,13}, 13}
IfxVadc_Vadcg_In | IfxVadc_G0_1_AN1_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 1}, 1}
IfxVadc_Vadcg_In | IfxVadc_G0_2_AN2_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 2}, 2}
IfxVadc_Vadcg_In | IfxVadc_G0_3_AN3_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 3}, 3}
IfxVadc_Vadcg_In | IfxVadc_G0_4_AN4_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 4}, 4}
IfxVadc_Vadcg_In | IfxVadc_G0_5_AN5_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 5}, 5}
IfxVadc_Vadcg_In | IfxVadc_G0_6_AN6_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 6}, 6}
IfxVadc_Vadcg_In | IfxVadc_G0_7_AN7_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 7}, 7}
IfxVadc_Vadcg_In | IfxVadc_G0_8_AN8_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 8}, 8}
IfxVadc_Vadcg_In | IfxVadc_G1_0_AN16_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,16}, 0}
IfxVadc_Vadcg_In | IfxVadc_G1_10_AN26_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,26}, 10}
IfxVadc_Vadcg_In | IfxVadc_G1_10_P40_2_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 2}, 10}
IfxVadc_Vadcg_In | IfxVadc_G1_11_AN27_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,27}, 11}
IfxVadc_Vadcg_In | IfxVadc_G1_11_P40_3_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 3}, 11}
IfxVadc_Vadcg_In | IfxVadc_G1_12_AN28_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,28}, 12}
IfxVadc_Vadcg_In | IfxVadc_G1_13_AN29_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,29}, 13}
IfxVadc_Vadcg_In | IfxVadc_G1_1_AN17_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,17}, 1}
IfxVadc_Vadcg_In | IfxVadc_G1_2_AN18_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,18}, 2}
IfxVadc_Vadcg_In | IfxVadc_G1_3_AN19_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,19}, 3}
IfxVadc_Vadcg_In | IfxVadc_G1_4_AN20_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,20}, 4}
IfxVadc_Vadcg_In | IfxVadc_G1_5_AN21_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,21}, 5}
IfxVadc_Vadcg_In | IfxVadc_G1_8_AN24_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,24}, 8}
IfxVadc_Vadcg_In | IfxVadc_G1_8_P40_0_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 0}, 8}
IfxVadc_Vadcg_In | IfxVadc_G1_9_AN25_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,25}, 9}
IfxVadc_Vadcg_In | IfxVadc_G1_9_P40_1_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 1}, 9}
IfxVadc_Vadcg_In | IfxVadc_G2_0_AN32_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,32}, 0}
IfxVadc_Vadcg_In | IfxVadc_G2_10_AN44_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,44}, 10}
IfxVadc_Vadcg_In | IfxVadc_G2_11_AN45_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,45}, 11}
IfxVadc_Vadcg_In | IfxVadc_G2_12_AN46_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,46}, 12}
IfxVadc_Vadcg_In | IfxVadc_G2_13_AN47_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,47}, 13}
IfxVadc_Vadcg_In | IfxVadc_G2_14_AN48_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,48}, 14}
IfxVadc_Vadcg_In | IfxVadc_G2_15_AN49_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,49}, 15}
IfxVadc_Vadcg_In | IfxVadc_G2_1_AN33_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,33}, 1}
IfxVadc_Vadcg_In | IfxVadc_G2_3_AN35_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,35}, 3}
IfxVadc_Vadcg_In | IfxVadc_G2_4_AN36_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,36}, 4}
IfxVadc_Vadcg_In | IfxVadc_G2_4_P40_6_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 6}, 4}
IfxVadc_Vadcg_In | IfxVadc_G2_5_AN37_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,37}, 5}
IfxVadc_Vadcg_In | IfxVadc_G2_5_P40_7_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 7}, 5}
IfxVadc_Vadcg_In | IfxVadc_G2_6_AN38_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,38}, 6}
IfxVadc_Vadcg_In | IfxVadc_G2_6_P40_8_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 8}, 6}
IfxVadc_Vadcg_In | IfxVadc_G2_7_AN39_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,39}, 7}
IfxVadc_Vadcg_In | IfxVadc_G2_7_P40_9_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 9}, 7}
IfxVadc_Vadcg_In | IfxVadc_G3_0_P00_12_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,12}, 0}
IfxVadc_Vadcg_In | IfxVadc_G3_10_P00_2_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 2}, 10}
IfxVadc_Vadcg_In | IfxVadc_G3_11_P00_1_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 1}, 11}
IfxVadc_Vadcg_In | IfxVadc_G3_1_P00_11_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,11}, 1}
IfxVadc_Vadcg_In | IfxVadc_G3_2_P00_10_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,10}, 2}
IfxVadc_Vadcg_In | IfxVadc_G3_3_P00_9_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 9}, 3}
IfxVadc_Vadcg_In | IfxVadc_G3_4_P00_8_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 8}, 4}
IfxVadc_Vadcg_In | IfxVadc_G3_5_P00_7_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 7}, 5}
IfxVadc_Vadcg_In | IfxVadc_G3_6_P00_6_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 6}, 6}
IfxVadc_Vadcg_In | IfxVadc_G3_7_P00_5_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 5}, 7}
IfxVadc_Vadcg_In | IfxVadc_G3_8_P00_4_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 4}, 8}
IfxVadc_Vadcg_In | IfxVadc_G3_9_P00_3_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 3}, 9}
const IfxVadc_Emux_Out * | IfxVadc_Emux_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
const IfxVadc_GxBfl_Out * | IfxVadc_GxBfl_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
const IfxVadc_Vadcg_In * | IfxVadc_Vadcg_In_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]

Detailed Description

VADC I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxVadc_PinMap.c.

Variable Documentation

◆ IfxVadc_EMUX00_P02_6_OUT

IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT = {&MODULE_VADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5}

Definition at line 28 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX00_P33_3_OUT

IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT = {&MODULE_VADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5}

Definition at line 29 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX01_P02_7_OUT

IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT = {&MODULE_VADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5}

Definition at line 30 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX01_P33_2_OUT

IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT = {&MODULE_VADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5}

Definition at line 31 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX02_P02_8_OUT

IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT = {&MODULE_VADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5}

Definition at line 32 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX02_P33_1_OUT

IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT = {&MODULE_VADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5}

Definition at line 33 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX10_P00_6_OUT

IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT = {&MODULE_VADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5}

Definition at line 34 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX10_P33_6_OUT

IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT = {&MODULE_VADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5}

Definition at line 35 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX11_P00_7_OUT

IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT = {&MODULE_VADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5}

Definition at line 36 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX11_P33_5_OUT

IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT = {&MODULE_VADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5}

Definition at line 37 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX12_P00_8_OUT

IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT = {&MODULE_VADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5}

Definition at line 38 of file IfxVadc_PinMap.c.

◆ IfxVadc_EMUX12_P33_4_OUT

IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT = {&MODULE_VADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5}

Definition at line 39 of file IfxVadc_PinMap.c.

◆ IfxVadc_Emux_Out_pinTable

const IfxVadc_Emux_Out* IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
Initial value:
= {
{
&IfxVadc_EMUX10_P00_6_OUT,
&IfxVadc_EMUX11_P00_7_OUT,
&IfxVadc_EMUX12_P00_8_OUT,
&IfxVadc_EMUX00_P02_6_OUT,
&IfxVadc_EMUX01_P02_7_OUT,
&IfxVadc_EMUX02_P02_8_OUT,
&IfxVadc_EMUX02_P33_1_OUT,
&IfxVadc_EMUX01_P33_2_OUT,
&IfxVadc_EMUX00_P33_3_OUT,
&IfxVadc_EMUX12_P33_4_OUT,
&IfxVadc_EMUX11_P33_5_OUT,
&IfxVadc_EMUX10_P33_6_OUT
}
}
IfxVadc_EMUX01_P33_2_OUT
IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
Definition: IfxVadc_PinMap.c:31
IfxVadc_EMUX12_P00_8_OUT
IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
Definition: IfxVadc_PinMap.c:38
IfxVadc_EMUX02_P33_1_OUT
IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
Definition: IfxVadc_PinMap.c:33
IfxVadc_EMUX00_P02_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
Definition: IfxVadc_PinMap.c:28
IfxVadc_EMUX11_P00_7_OUT
IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
Definition: IfxVadc_PinMap.c:36
IfxVadc_EMUX12_P33_4_OUT
IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
Definition: IfxVadc_PinMap.c:39
IfxVadc_EMUX10_P00_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
Definition: IfxVadc_PinMap.c:34
IfxVadc_EMUX01_P02_7_OUT
IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
Definition: IfxVadc_PinMap.c:30
IfxVadc_EMUX11_P33_5_OUT
IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
Definition: IfxVadc_PinMap.c:37
IfxVadc_EMUX10_P33_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
Definition: IfxVadc_PinMap.c:35
IfxVadc_EMUX00_P33_3_OUT
IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
Definition: IfxVadc_PinMap.c:29
IfxVadc_EMUX02_P02_8_OUT
IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
Definition: IfxVadc_PinMap.c:32

Definition at line 118 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_0_AN0_IN

IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 0}, 0}

Definition at line 58 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_10_AN10_IN

IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,10}, 10}

Definition at line 59 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_11_AN11_IN

IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,11}, 11}

Definition at line 60 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_12_AN12_IN

IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,12}, 12}

Definition at line 61 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_13_AN13_IN

IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,13}, 13}

Definition at line 62 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_1_AN1_IN

IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 1}, 1}

Definition at line 63 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_2_AN2_IN

IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 2}, 2}

Definition at line 64 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_3_AN3_IN

IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 3}, 3}

Definition at line 65 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_4_AN4_IN

IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 4}, 4}

Definition at line 66 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_5_AN5_IN

IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 5}, 5}

Definition at line 67 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_6_AN6_IN

IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 6}, 6}

Definition at line 68 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_7_AN7_IN

IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 7}, 7}

Definition at line 69 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0_8_AN8_IN

IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 8}, 8}

Definition at line 70 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0BFL0_P33_4_OUT

IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6}

Definition at line 40 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0BFL1_P33_5_OUT

IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6}

Definition at line 41 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0BFL2_P33_6_OUT

IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6}

Definition at line 42 of file IfxVadc_PinMap.c.

◆ IfxVadc_G0BFL3_P33_7_OUT

IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6}

Definition at line 43 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_0_AN16_IN

IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,16}, 0}

Definition at line 71 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_10_AN26_IN

IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,26}, 10}

Definition at line 72 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_10_P40_2_IN

IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 2}, 10}

Definition at line 73 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_11_AN27_IN

IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,27}, 11}

Definition at line 74 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_11_P40_3_IN

IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 3}, 11}

Definition at line 75 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_12_AN28_IN

IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,28}, 12}

Definition at line 76 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_13_AN29_IN

IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,29}, 13}

Definition at line 77 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_1_AN17_IN

IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,17}, 1}

Definition at line 78 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_2_AN18_IN

IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,18}, 2}

Definition at line 79 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_3_AN19_IN

IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,19}, 3}

Definition at line 80 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_4_AN20_IN

IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,20}, 4}

Definition at line 81 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_5_AN21_IN

IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,21}, 5}

Definition at line 82 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_8_AN24_IN

IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,24}, 8}

Definition at line 83 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_8_P40_0_IN

IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 0}, 8}

Definition at line 84 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_9_AN25_IN

IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,25}, 9}

Definition at line 85 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1_9_P40_1_IN

IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 1}, 9}

Definition at line 86 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1BFL0_P33_0_OUT

IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6}

Definition at line 44 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1BFL1_P33_1_OUT

IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt6}

Definition at line 45 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1BFL2_P33_2_OUT

IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6}

Definition at line 46 of file IfxVadc_PinMap.c.

◆ IfxVadc_G1BFL3_P33_3_OUT

IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt6}

Definition at line 47 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_0_AN32_IN

IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,32}, 0}

Definition at line 87 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_10_AN44_IN

IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,44}, 10}

Definition at line 88 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_11_AN45_IN

IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,45}, 11}

Definition at line 89 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_12_AN46_IN

IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,46}, 12}

Definition at line 90 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_13_AN47_IN

IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,47}, 13}

Definition at line 91 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_14_AN48_IN

IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,48}, 14}

Definition at line 92 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_15_AN49_IN

IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,49}, 15}

Definition at line 93 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_1_AN33_IN

IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,33}, 1}

Definition at line 94 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_3_AN35_IN

IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,35}, 3}

Definition at line 95 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_4_AN36_IN

IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,36}, 4}

Definition at line 96 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_4_P40_6_IN

IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 6}, 4}

Definition at line 97 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_5_AN37_IN

IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,37}, 5}

Definition at line 98 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_5_P40_7_IN

IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 7}, 5}

Definition at line 99 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_6_AN38_IN

IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,38}, 6}

Definition at line 100 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_6_P40_8_IN

IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 8}, 6}

Definition at line 101 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_7_AN39_IN

IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,39}, 7}

Definition at line 102 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2_7_P40_9_IN

IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 9}, 7}

Definition at line 103 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2BFL0_P00_4_OUT

IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt5}

Definition at line 48 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2BFL1_P00_5_OUT

IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5}

Definition at line 49 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2BFL2_P00_6_OUT

IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt3}

Definition at line 50 of file IfxVadc_PinMap.c.

◆ IfxVadc_G2BFL3_P00_7_OUT

IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3}

Definition at line 51 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_0_P00_12_IN

IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,12}, 0}

Definition at line 104 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_10_P00_2_IN

IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 2}, 10}

Definition at line 105 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_11_P00_1_IN

IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 1}, 11}

Definition at line 106 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_1_P00_11_IN

IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,11}, 1}

Definition at line 107 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_2_P00_10_IN

IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,10}, 2}

Definition at line 108 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_3_P00_9_IN

IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 9}, 3}

Definition at line 109 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_4_P00_8_IN

IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 8}, 4}

Definition at line 110 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_5_P00_7_IN

IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 7}, 5}

Definition at line 111 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_6_P00_6_IN

IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 6}, 6}

Definition at line 112 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_7_P00_5_IN

IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 5}, 7}

Definition at line 113 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_8_P00_4_IN

IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 4}, 8}

Definition at line 114 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3_9_P00_3_IN

IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 3}, 9}

Definition at line 115 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL0_P10_0_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt5}

Definition at line 52 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL0_P10_6_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt7}

Definition at line 53 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL1_P10_1_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5}

Definition at line 54 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL1_P10_7_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt4}

Definition at line 55 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL2_P10_2_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5}

Definition at line 56 of file IfxVadc_PinMap.c.

◆ IfxVadc_G3BFL3_P10_3_OUT

IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt2}

Definition at line 57 of file IfxVadc_PinMap.c.

◆ IfxVadc_GxBfl_Out_pinTable

const IfxVadc_GxBfl_Out* IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]

Definition at line 135 of file IfxVadc_PinMap.c.

◆ IfxVadc_Vadcg_In_pinTable

const IfxVadc_Vadcg_In* IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]

Definition at line 172 of file IfxVadc_PinMap.c.


iLLD_TC26B: IfxVadc_PinMap.h File Reference

  • _PinMap
Data Structures | Macros | Variables
IfxVadc_PinMap.h File Reference
iLLD » VADC

VADC I/O map. More...

#include <IfxVadc_reg.h>
#include <_Impl/IfxVadc_cfg.h>
#include <Port/Std/IfxPort.h>
Include dependency graph for IfxVadc_PinMap.h:

Go to the source code of this file.

Data Structures

struct | IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure. More...
struct | IfxVadc_Emux_Out
VADC External Mux pin mapping structure. More...
struct | IfxVadc_Vadcg_In
VADC Analog Input. More...

Macros

#define | IFXVADC_PINMAP_NUM_MODULES 1
Table dimensions. More...
#define | IFXVADC_PINMAP_NUM_GROUPS 4
#define | IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
#define | IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6
#define | IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16

Variables

IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
VADC_EMUX00: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
VADC_EMUX00: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
VADC_EMUX01: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
VADC_EMUX01: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
VADC_EMUX02: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
VADC_EMUX02: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
VADC_EMUX10: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
VADC_EMUX10: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
VADC_EMUX11: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
VADC_EMUX11: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
VADC_EMUX12: VADC output. More...
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
VADC_EMUX12: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT
VADC_G0BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT
VADC_G0BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT
VADC_G0BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT
VADC_G0BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT
VADC_G1BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT
VADC_G1BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT
VADC_G1BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT
VADC_G1BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT
VADC_G2BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT
VADC_G2BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT
VADC_G2BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT
VADC_G2BFL3: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT
VADC_G3BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT
VADC_G3BFL0: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT
VADC_G3BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT
VADC_G3BFL1: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT
VADC_G3BFL2: VADC output. More...
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT
VADC_G3BFL3: VADC output. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN
VADC_G0_0: VADC input channel 0 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN
VADC_G0_10: VADC input channel 10 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN
VADC_G0_11: VADC input channel 11 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN
VADC_G0_12: VADC input channel 12 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN
VADC_G0_13: VADC input channel 13 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN
VADC_G0_1: VADC input channel 1 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN
VADC_G0_2: VADC input channel 2 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN
VADC_G0_3: VADC input channel 3 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN
VADC_G0_4: VADC input channel 4 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN
VADC_G0_5: VADC input channel 5 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN
VADC_G0_6: VADC input channel 6 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN
VADC_G0_7: VADC input channel 7 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN
VADC_G0_8: VADC input channel 8 of group 0. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN
VADC_G1_0: VADC input channel 0 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN
VADC_G1_10: VADC input channel 10 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN
VADC_G1_10: VADC input channel 10 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN
VADC_G1_11: VADC input channel 11 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN
VADC_G1_11: VADC input channel 11 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN
VADC_G1_12: VADC input channel 12 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN
VADC_G1_13: VADC input channel 13 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN
VADC_G1_1: VADC input channel 1 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN
VADC_G1_2: VADC input channel 2 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN
VADC_G1_3: VADC input channel 3 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN
VADC_G1_4: VADC input channel 4 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN
VADC_G1_5: VADC input channel 5 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN
VADC_G1_8: VADC input channel 8 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN
VADC_G1_8: VADC input channel 8 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN
VADC_G1_9: VADC input channel 9of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN
VADC_G1_9: VADC input channel 9 of group 1. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN
VADC_G2_0: VADC input channel 0 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN
VADC_G2_10: VADC input channel 10 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN
VADC_G2_11: VADC input channel 11 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN
VADC_G2_12: VADC input channel 12 of group 24. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN
VADC_G2_13: VADC input channel 13 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN
VADC_G2_14: VADC input channel 14 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN
VADC_G2_15: VADC input channel 15 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN
VADC_G2_1: VADC input channel 1 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN
VADC_G2_3: VADC input channel 3 of group 2 (mtm) More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN
VADC_G2_4: VADC input channel 4 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN
VADC_G2_4: VADC input channel 4 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN
VADC_G2_5: VADC input channel 5 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN
VADC_G2_5: VADC input channel 5 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN
VADC_G2_6: VADC input channel 6 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN
VADC_G2_6: VADC input channel 6 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN
VADC_G2_7: VADC input channel 7 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN
VADC_G2_7: VADC input channel 7 of group 2. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN
VADC_G3_0: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN
VADC_G3_10: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN
VADC_G3_11: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN
VADC_G3_1: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN
VADC_G3_2: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN
VADC_G3_3: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN
VADC_G3_4: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN
VADC_G3_5: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN
VADC_G3_6: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN
VADC_G3_7: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN
VADC_G3_8: VADC input. More...
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN
VADC_G3_9: VADC input. More...
IFX_EXTERN const IfxVadc_Emux_Out * | IfxVadc_Emux_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxVadc_Emux_Out table. More...
IFX_EXTERN const IfxVadc_GxBfl_Out * | IfxVadc_GxBfl_Out_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxVadc_GxBfl_Out table. More...
IFX_EXTERN const IfxVadc_Vadcg_In * | IfxVadc_Vadcg_In_pinTable [IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxVadc_Vadcg_In table. More...

Detailed Description

VADC I/O map.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxVadc_PinMap.h.


iLLD_TC26B: IfxVadc_Adc.h File Reference

  • Vadc
  • Adc
Data Structures | Typedefs | Functions
IfxVadc_Adc.h File Reference
iLLD » VADC

VADC ADC details. More...

#include "Vadc/Std/IfxVadc.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxVadc_Adc.h:

Go to the source code of this file.

Data Structures

struct | IfxVadc_Adc
VADC handle data structure. More...
struct | IfxVadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure. More...
struct | IfxVadc_Adc_ArbiterConfig
Arbiter configuration structure. More...
struct | IfxVadc_Adc_BackgroundScanConfig
Background scan mode configuration structure. More...
struct | IfxVadc_Adc_ClassConfig
Input class configuration structure. More...
struct | IfxVadc_Adc_Group
Group handle data structure. More...
struct | IfxVadc_Adc_QueueConfig
Queue configuration structure. More...
struct | IfxVadc_Adc_ScanConfig
Scan mode configuration structure. More...
struct | IfxVadc_Adc_EmuxPinConfig
struct | IfxVadc_Adc_Channel
Channel handle data structure. More...
struct | IfxVadc_Adc_ChannelConfig
Channel configuration structure. More...
struct | IfxVadc_Adc_Config
VADC module configuration structure. More...
struct | IfxVadc_Adc_EmuxControl
Emux Control Structure. More...
struct | IfxVadc_Adc_GroupConfig
Group configuration structure. More...

Typedefs

typedef uint8 IfxVadc_Adc_SYNCTR_STSEL

Functions

IFX_INLINE void | IfxVadc_Adc_deInitModule (IfxVadc_Adc *vadc)
Reset the VADC module. More...
IFX_INLINE void | IfxVadc_Adc_getModuleConfig (IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
Get the current VADC configuration (e.g. VADC frequency) More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_Adc_getResultBasedOnRequestSource (IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_EXTERN void | IfxVadc_Adc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initModule (IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration. More...
IFX_EXTERN void | IfxVadc_Adc_initModuleConfig (IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration. More...
IFX_INLINE Ifx_VADC_G * | IfxVadc_Adc_getGroupRegsFromGroup (const IfxVadc_Adc_Group *group)
Gets the current group register set. More...
IFX_INLINE void | IfxVadc_Adc_getGroupResult (IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE Ifx_VADC * | IfxVadc_Adc_getVadcFromGroup (const IfxVadc_Adc_Group *group)
Gets the current group module register address. More...
IFX_EXTERN void | IfxVadc_Adc_deInitGroup (IfxVadc_Adc_Group *group)
Reset the VADC group. More...
IFX_EXTERN void | IfxVadc_Adc_getGroupConfig (IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency) More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initGroup (IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first. More...
IFX_EXTERN void | IfxVadc_Adc_initGroupConfig (IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration. More...
IFX_INLINE void | IfxVadc_Adc_configureWaitForReadMode (IfxVadc_Adc_Channel *channel, boolean waitForRead)
pointer to the VADC channel More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_Adc_getResult (IfxVadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment) More...
IFX_INLINE Ifx_VADC_RESD | IfxVadc_Adc_getDebugResult (IfxVadc_Adc_Channel *channel)
Get debug result (Function does not care about the alignment) More...
IFX_EXTERN void | IfxVadc_Adc_getChannelConfig (IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
IFX_EXTERN float32 | IfxVadc_Adc_getChannelConversionTime (IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time More...
IFX_EXTERN IfxVadc_Status | IfxVadc_Adc_initChannel (IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
IFX_EXTERN void | IfxVadc_Adc_initChannelConfig (IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...
IFX_INLINE void | IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister (IfxVadc_Adc *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getBackgroundScanStatus (IfxVadc_Adc *vadc)
Gives the background scan status for a group. More...
IFX_INLINE Ifx_VADC_GLOBRES | IfxVadc_Adc_getGlobalResult (IfxVadc_Adc *vadc)
returns result stored in global result register More...
IFX_INLINE void | IfxVadc_Adc_setBackgroundScan (IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
configures a background scan More...
IFX_INLINE void | IfxVadc_Adc_startBackgroundScan (IfxVadc_Adc *vadc)
Starts a background scan. More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getScanStatus (IfxVadc_Adc_Group *group)
Gives the scan status for a group. More...
IFX_INLINE void | IfxVadc_Adc_setScan (IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
Configures an autoscan. More...
IFX_INLINE void | IfxVadc_Adc_startScan (IfxVadc_Adc_Group *group)
Starts an autoscan on the specified group. More...
IFX_INLINE void | IfxVadc_Adc_addToQueue (IfxVadc_Adc_Channel *channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill source interrupt enable/disable external trigger control. More...
IFX_INLINE void | IfxVadc_Adc_clearQueue (IfxVadc_Adc_Group *group)
Flush the contents of the queue of a group. More...
IFX_INLINE IfxVadc_Status | IfxVadc_Adc_getQueueStatus (IfxVadc_Adc_Group *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_INLINE void | IfxVadc_Adc_startQueue (IfxVadc_Adc_Group *group)
Starts a queue of a group by generating a trigger event through software. More...
IFX_EXTERN void | IfxVadc_Adc_initExternalMultiplexerModeConfig (IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer More...
IFX_EXTERN void | IfxVadc_Adc_initExternalMultiplexerMode (Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...

Detailed Description

VADC ADC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxVadc_Adc.h.

Data Structure Documentation

◆ IfxVadc_Adc_EmuxPinConfig

struct IfxVadc_Adc_EmuxPinConfig

Definition at line 438 of file IfxVadc_Adc.h.

Collaboration diagram for IfxVadc_Adc_EmuxPinConfig:
[legend]
Data Fields
IfxPort_OutputMode | outputMode | the pin output mode which should be configured
IfxPort_PadDriver | padDriver | Pad driver.
IfxVadc_Emux_Out * | pins[3] | Emux Pins configuration.

Typedef Documentation

◆ IfxVadc_Adc_SYNCTR_STSEL

typedef uint8 IfxVadc_Adc_SYNCTR_STSEL

Definition at line 350 of file IfxVadc_Adc.h.


iLLD_TC26B: IfxVadc.h File Reference

  • Vadc
  • Std
Enumerations | Functions
IfxVadc.h File Reference
iLLD » VADC

VADC basic functionality. More...

#include "_Impl/IfxVadc_cfg.h"
#include "_PinMap/IfxVadc_PinMap.h"
#include "IfxVadc_bf.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "IfxCcu6_reg.h"
#include "IfxCcu6_bf.h"
Include dependency graph for IfxVadc.h:

Go to the source code of this file.

Enumerations

enum IfxVadc_AnalogConverterMode {
IfxVadc_AnalogConverterMode_off = 0,
IfxVadc_AnalogConverterMode_slowStandby = 1,
IfxVadc_AnalogConverterMode_fastStandby = 2,
IfxVadc_AnalogConverterMode_normalOperation = 3
}
Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC. More...
enum IfxVadc_ArbitrationRounds {
IfxVadc_ArbitrationRounds_4_slots = 0,
IfxVadc_ArbitrationRounds_8_slots = 1,
IfxVadc_ArbitrationRounds_16_slots = 2,
IfxVadc_ArbitrationRounds_20_slots = 3
}
Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11) More...
enum IfxVadc_BoundaryExtension {
IfxVadc_BoundaryExtension_standard = 0,
IfxVadc_BoundaryExtension_fastCompareResult1 = 1,
IfxVadc_BoundaryExtension_fastCompareResult2 = 2,
IfxVadc_BoundaryExtension_fastCompareResult3 = 3,
IfxVadc_BoundaryExtension_fastCompareResult4 = 4,
IfxVadc_BoundaryExtension_fastCompareResult5 = 5,
IfxVadc_BoundaryExtension_fastCompareResult6 = 6,
IfxVadc_BoundaryExtension_fastCompareResult7 = 7,
IfxVadc_BoundaryExtension_fastCompareResult8 = 8,
IfxVadc_BoundaryExtension_fastCompareResult9 = 9,
IfxVadc_BoundaryExtension_fastCompareResult10 = 10,
IfxVadc_BoundaryExtension_fastCompareResult11 = 11,
IfxVadc_BoundaryExtension_fastCompareResult12 = 12,
IfxVadc_BoundaryExtension_fastCompareResult13 = 13,
IfxVadc_BoundaryExtension_fastCompareResult14 = 14,
IfxVadc_BoundaryExtension_fastCompareResult15 = 15
}
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_BoundarySelection {
IfxVadc_BoundarySelection_group0 = 0,
IfxVadc_BoundarySelection_group1 = 1,
IfxVadc_BoundarySelection_global0 = 2,
IfxVadc_BoundarySelection_global1 = 3
}
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelId {
IfxVadc_ChannelId_none = -1,
IfxVadc_ChannelId_0 = 0,
IfxVadc_ChannelId_1 = 1,
IfxVadc_ChannelId_2 = 2,
IfxVadc_ChannelId_3 = 3,
IfxVadc_ChannelId_4 = 4,
IfxVadc_ChannelId_5 = 5,
IfxVadc_ChannelId_6 = 6,
IfxVadc_ChannelId_7 = 7,
IfxVadc_ChannelId_8 = 8,
IfxVadc_ChannelId_9 = 9,
IfxVadc_ChannelId_10 = 10,
IfxVadc_ChannelId_11 = 11,
IfxVadc_ChannelId_12 = 12,
IfxVadc_ChannelId_13 = 13,
IfxVadc_ChannelId_14 = 14,
IfxVadc_ChannelId_15 = 15
}
VADC Channels. More...
enum IfxVadc_ChannelReference {
IfxVadc_ChannelReference_standard = 0,
IfxVadc_ChannelReference_channel0 = 1
}
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelResolution {
IfxVadc_ChannelResolution_12bit = 0,
IfxVadc_ChannelResolution_10bit = 1,
IfxVadc_ChannelResolution_8bit = 2,
IfxVadc_ChannelResolution_10bitFast = 5
}
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1) More...
enum IfxVadc_ChannelResult {
IfxVadc_ChannelResult_0 = 0,
IfxVadc_ChannelResult_1,
IfxVadc_ChannelResult_2,
IfxVadc_ChannelResult_3,
IfxVadc_ChannelResult_4,
IfxVadc_ChannelResult_5,
IfxVadc_ChannelResult_6,
IfxVadc_ChannelResult_7,
IfxVadc_ChannelResult_8,
IfxVadc_ChannelResult_9,
IfxVadc_ChannelResult_10,
IfxVadc_ChannelResult_11,
IfxVadc_ChannelResult_12,
IfxVadc_ChannelResult_13,
IfxVadc_ChannelResult_14,
IfxVadc_ChannelResult_15
}
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_ChannelSelectionStyle {
IfxVadc_ChannelSelectionStyle_channelNumber = 0,
IfxVadc_ChannelSelectionStyle_binary = 1
}
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS. More...
enum IfxVadc_ConversionType { IfxVadc_ConversionType_Compatible = 0 }
type of conversion More...
enum IfxVadc_EmuxCodingScheme {
IfxVadc_EmuxCodingScheme_binary = 0,
IfxVadc_EmuxCodingScheme_gray = 1
}
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD. More...
enum IfxVadc_EmuxInterface {
IfxVadc_EmuxInterface_0 = 0,
IfxVadc_EmuxInterface_1 = 1
}
Specifies the Emux interface. More...
enum IfxVadc_EmuxSampleTimeControl {
IfxVadc_EmuxSampleTimeControl_settingChanges = 0,
IfxVadc_EmuxSampleTimeControl_always = 1
}
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST. More...
enum IfxVadc_EmuxSelectValue {
IfxVadc_EmuxSelectValue_0 = 0,
IfxVadc_EmuxSelectValue_1,
IfxVadc_EmuxSelectValue_2,
IfxVadc_EmuxSelectValue_3,
IfxVadc_EmuxSelectValue_4,
IfxVadc_EmuxSelectValue_5,
IfxVadc_EmuxSelectValue_6,
IfxVadc_EmuxSelectValue_7
}
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET More...
enum IfxVadc_ExternalMultiplexerMode {
IfxVadc_ExternalMultiplexerMode_softwareControl = 0,
IfxVadc_ExternalMultiplexerMode_steady = 1,
IfxVadc_ExternalMultiplexerMode_singleStep = 2,
IfxVadc_ExternalMultiplexerMode_sequence = 3
}
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE. More...
enum IfxVadc_FifoMode {
IfxVadc_FifoMode_seperateResultRegister = 0,
IfxVadc_FifoMode_fifoStructure = 1,
IfxVadc_FifoMode_maximumMode = 2,
IfxVadc_FifoMode_minimumMode = 3
}
FIFO mode enable. More...
enum IfxVadc_GatingMode {
IfxVadc_GatingMode_disabled = 0,
IfxVadc_GatingMode_always = 1,
IfxVadc_GatingMode_gatingHigh = 2,
IfxVadc_GatingMode_gatingLow = 3
}
gating mode defined in MODULE_VADC.BRSMR.ENGT More...
enum IfxVadc_GatingSource {
IfxVadc_GatingSource_0 = 0,
IfxVadc_GatingSource_1,
IfxVadc_GatingSource_2,
IfxVadc_GatingSource_3,
IfxVadc_GatingSource_4,
IfxVadc_GatingSource_5,
IfxVadc_GatingSource_6,
IfxVadc_GatingSource_7,
IfxVadc_GatingSource_8,
IfxVadc_GatingSource_9,
IfxVadc_GatingSource_10,
IfxVadc_GatingSource_11,
IfxVadc_GatingSource_12,
IfxVadc_GatingSource_13,
IfxVadc_GatingSource_14,
IfxVadc_GatingSource_15
}
External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7) More...
enum IfxVadc_InputClasses {
IfxVadc_InputClasses_group0 = 0,
IfxVadc_InputClasses_group1 = 1,
IfxVadc_InputClasses_global0 = 2,
IfxVadc_InputClasses_global1 = 3
}
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_LimitCheck {
IfxVadc_LimitCheck_noCheck = 0,
IfxVadc_LimitCheck_eventIfInArea = 1,
IfxVadc_LimitCheck_eventIfOutsideArea = 2,
IfxVadc_LimitCheck_always = 3
}
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16) More...
enum IfxVadc_LowSupplyVoltageSelect {
IfxVadc_LowSupplyVoltageSelect_5V = 0,
IfxVadc_LowSupplyVoltageSelect_3V = 1
}
Low Power Supply Voltage Select. More...
enum IfxVadc_Protection {
IfxVadc_Protection_channelControl0 = 0,
IfxVadc_Protection_channelControl1 = 1,
IfxVadc_Protection_channelControl2 = 2,
IfxVadc_Protection_channelControl3 = 3,
IfxVadc_Protection_channelControl4 = 4,
IfxVadc_Protection_channelControl5 = 5,
IfxVadc_Protection_channelControl6 = 6,
IfxVadc_Protection_channelControl7 = 7,
IfxVadc_Protection_channelControl8 = 8,
IfxVadc_Protection_channelControl9 = 9,
IfxVadc_Protection_channelControl10 = 10,
IfxVadc_Protection_channelControl11 = 11,
IfxVadc_Protection_channelControl12 = 12,
IfxVadc_Protection_channelControl13 = 13,
IfxVadc_Protection_channelControl14 = 14,
IfxVadc_Protection_externalMultiplexer = 15,
IfxVadc_Protection_initGroup0 = 16,
IfxVadc_Protection_initGroup1 = 17,
IfxVadc_Protection_initGroup2 = 18,
IfxVadc_Protection_initGroup3 = 19,
IfxVadc_Protection_initGroup4 = 20,
IfxVadc_Protection_initGroup5 = 21,
IfxVadc_Protection_initGroup6 = 22,
IfxVadc_Protection_initGroup7 = 23,
IfxVadc_Protection_initGroup8 = 24,
IfxVadc_Protection_initGroup9 = 25,
IfxVadc_Protection_initGroup10 = 26,
IfxVadc_Protection_initGroup11 = 27,
IfxVadc_Protection_initGroup12 = 28,
IfxVadc_Protection_initGroup13 = 29,
IfxVadc_Protection_initGroup14 = 30,
IfxVadc_Protection_globalConfig = 31,
IfxVadc_Protection_serviceGroup0 = 32,
IfxVadc_Protection_serviceGroup1 = 33,
IfxVadc_Protection_serviceGroup2 = 34,
IfxVadc_Protection_serviceGroup3 = 35,
IfxVadc_Protection_serviceGroup4 = 36,
IfxVadc_Protection_serviceGroup5 = 37,
IfxVadc_Protection_serviceGroup6 = 38,
IfxVadc_Protection_serviceGroup7 = 39,
IfxVadc_Protection_serviceGroup8 = 40,
IfxVadc_Protection_serviceGroup9 = 41,
IfxVadc_Protection_serviceGroup10 = 42,
IfxVadc_Protection_serviceGroup11 = 43,
IfxVadc_Protection_serviceGroup12 = 44,
IfxVadc_Protection_serviceGroup13 = 45,
IfxVadc_Protection_serviceGroup14 = 46,
IfxVadc_Protection_testFunction = 47,
IfxVadc_Protection_resultRegisterGroup0 = 48,
IfxVadc_Protection_resultRegisterGroup1 = 49,
IfxVadc_Protection_resultRegisterGroup2 = 50,
IfxVadc_Protection_resultRegisterGroup3 = 51,
IfxVadc_Protection_resultRegisterGroup4 = 52,
IfxVadc_Protection_resultRegisterGroup5 = 53,
IfxVadc_Protection_resultRegisterGroup6 = 54,
IfxVadc_Protection_resultRegisterGroup7 = 55,
IfxVadc_Protection_resultRegisterGroup8 = 56,
IfxVadc_Protection_resultRegisterGroup9 = 57,
IfxVadc_Protection_resultRegisterGroup10 = 58,
IfxVadc_Protection_resultRegisterGroup11 = 59,
IfxVadc_Protection_resultRegisterGroup12 = 60,
IfxVadc_Protection_resultRegisterGroup13 = 61,
IfxVadc_Protection_resultRegisterGroup14 = 62
}
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U. More...
enum IfxVadc_RequestSlotPriority {
IfxVadc_RequestSlotPriority_lowest = 0,
IfxVadc_RequestSlotPriority_low = 1,
IfxVadc_RequestSlotPriority_high = 2,
IfxVadc_RequestSlotPriority_highest = 3
}
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2) More...
enum IfxVadc_RequestSlotStartMode {
IfxVadc_RequestSlotStartMode_waitForStart = 0,
IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1
}
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2) More...
enum IfxVadc_RequestSource {
IfxVadc_RequestSource_queue = 0,
IfxVadc_RequestSource_scan = 1,
IfxVadc_RequestSource_background = 2
}
Request sources. More...
enum IfxVadc_SleepMode {
IfxVadc_SleepMode_enable = 0,
IfxVadc_SleepMode_disable = 1
}
Enable/disable the sensitivity of the module to sleep signal
Definition in Ifx_VADC.CLC.B.EDIS. More...
enum IfxVadc_SrcNr {
IfxVadc_SrcNr_group0 = 0,
IfxVadc_SrcNr_group1 = 1,
IfxVadc_SrcNr_group2 = 2,
IfxVadc_SrcNr_group3 = 3,
IfxVadc_SrcNr_shared0 = 4,
IfxVadc_SrcNr_shared1 = 5,
IfxVadc_SrcNr_shared2 = 6,
IfxVadc_SrcNr_shared3 = 7
}
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11) More...
enum IfxVadc_Status {
IfxVadc_Status_noError = 0,
IfxVadc_Status_notInitialised = 1,
IfxVadc_Status_invalidGroup = 2,
IfxVadc_Status_invalidChannel = 3,
IfxVadc_Status_queueFull = 4,
IfxVadc_Status_noAccess = 5,
IfxVadc_Status_channelsStillPending = 6
}
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx More...
enum IfxVadc_TriggerMode {
IfxVadc_TriggerMode_noExternalTrigger = 0,
IfxVadc_TriggerMode_uponFallingEdge = 1,
IfxVadc_TriggerMode_uponRisingEdge = 2,
IfxVadc_TriggerMode_uponAnyEdge = 3
}
trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11) More...
enum IfxVadc_TriggerSource {
IfxVadc_TriggerSource_0 = 0,
IfxVadc_TriggerSource_1,
IfxVadc_TriggerSource_2,
IfxVadc_TriggerSource_3,
IfxVadc_TriggerSource_4,
IfxVadc_TriggerSource_5,
IfxVadc_TriggerSource_6,
IfxVadc_TriggerSource_7,
IfxVadc_TriggerSource_8,
IfxVadc_TriggerSource_9,
IfxVadc_TriggerSource_10,
IfxVadc_TriggerSource_11,
IfxVadc_TriggerSource_12,
IfxVadc_TriggerSource_13,
IfxVadc_TriggerSource_14,
IfxVadc_TriggerSource_15
}
Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7) More...

Functions

IFX_INLINE void | IfxVadc_configureWaitForReadMode (Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
access function to enable/disable wait for read mode for result registers More...
IFX_INLINE void | IfxVadc_configureWaitForReadModeForGlobalResultRegister (Ifx_VADC *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register More...
IFX_INLINE void | IfxVadc_enableBackgroundScanSlotExternalTrigger (Ifx_VADC *vadc)
Enables the background sacn external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getBackgroundScanGatingMode (Ifx_VADC *vadc)
Gets the background scan gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getBackgroundScanGatingSource (Ifx_VADC *vadc)
Gets the gating input selection. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getBackgroundScanSlotPriority (Ifx_VADC_G *vadcG)
Gets the requested background scan slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getBackgroundScanSlotStartMode (Ifx_VADC_G *vadcG)
Gets the requested background scan slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getBackgroundScanTriggerInput (Ifx_VADC *vadc)
Gets the background scan trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getBackgroundScanTriggerMode (Ifx_VADC *vadc)
Gets the background scan external trigger mode. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution More...
IFX_INLINE Ifx_VADC_GLOBRES | IfxVadc_getGlobalResult (Ifx_VADC *vadc)
return conversion result stored in the Global result Register More...
IFX_INLINE float32 | IfxVadc_getGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
get global input class sample time in sec More...
IFX_INLINE void | IfxVadc_getGroupResult (Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group. More...
IFX_INLINE Ifx_VADC_RES | IfxVadc_getResult (Ifx_VADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE boolean | IfxVadc_isAutoBackgroundScanEnabled (Ifx_VADC *vadc)
Returns the auto background scan status. More...
IFX_INLINE boolean | IfxVadc_isRequestBackgroundScanSlotEnabled (Ifx_VADC_G *vadcG)
Returns the background scan slot requested status. More...
IFX_INLINE void | IfxVadc_setAutoBackgroundScan (Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
Enables/Disables continuous background auto scan. More...
IFX_INLINE void | IfxVadc_setBackgroundScan (Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
configures a background scan; can also stop autoscan if all channels are 0 More...
IFX_INLINE void | IfxVadc_setBackgroundScanSlotGatingConfig (Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the background scan slot gating configurations. More...
IFX_INLINE void | IfxVadc_setBackgroundScanSlotTriggerConfig (Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the background scan exteranal trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startBackgroundScan (Ifx_VADC *vadc)
Starts a background scan. More...
IFX_INLINE Ifx_VADC_RESD | IfxVadc_getDebugResult (Ifx_VADC_G *group, uint32 resultIdx)
Get debug conversion result. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getBackgroundScanStatus (Ifx_VADC *vadc)
Gives the background scan status for a group. More...
IFX_EXTERN Ifx_VADC_RES | IfxVadc_getResultBasedOnRequestSource (Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IFX_INLINE void | IfxVadc_disableScanSlotExternalTrigger (Ifx_VADC_G *vadcG)
Disables the scan slot external trigger. More...
IFX_INLINE void | IfxVadc_enableScanSlotExternalTrigger (Ifx_VADC_G *vadcG)
Enables the scan slot external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getScanSlotGatingMode (Ifx_VADC_G *vadcG)
Gets the request scan slot gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getScanSlotGatingSource (Ifx_VADC_G *vadcG)
Gets the request scan slot gating input. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getScanSlotPriority (Ifx_VADC_G *vadcG)
Gets the request scan slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getScanSlotStartMode (Ifx_VADC_G *vadcG)
Gets the request scan slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getScanSlotTriggerInput (Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getScanSlotTriggerMode (Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger mode. More...
IFX_INLINE boolean | IfxVadc_isAutoScanEnabled (Ifx_VADC_G *vadcG)
Gets the auto scan enable status. More...
IFX_INLINE boolean | IfxVadc_isRequestScanSlotEnabled (Ifx_VADC_G *vadcG)
Returns the scan slot requested status. More...
IFX_INLINE void | IfxVadc_setAutoScan (Ifx_VADC_G *vadcG, boolean autoscanEnable)
Enables/Disables continuous auto scan. More...
IFX_INLINE void | IfxVadc_setScanSlotGatingConfig (Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the scan slot gating configuration. More...
IFX_INLINE void | IfxVadc_setScanSlotTriggerConfig (Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the scan slot trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startScan (Ifx_VADC_G *group)
Starts an autoscan on the specified group. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getScanStatus (Ifx_VADC_G *group)
Gives the scan status for a group. More...
IFX_EXTERN void | IfxVadc_setScan (Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan. More...
IFX_INLINE void | IfxVadc_addToQueue (Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill incase of aborted conversion source interrupt enable/disable external trigger control of the aborted conversion. More...
IFX_INLINE void | IfxVadc_clearQueue (Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage. More...
IFX_INLINE void | IfxVadc_disableQueueSlotExternalTrigger (Ifx_VADC_G *vadcG)
Disables the external trigger. More...
IFX_INLINE void | IfxVadc_enableQueueSlotExternalTrigger (Ifx_VADC_G *vadcG)
Enables the external trigger. More...
IFX_INLINE IfxVadc_GatingMode | IfxVadc_getQueueSlotGatingMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot gating mode. More...
IFX_INLINE IfxVadc_GatingSource | IfxVadc_getQueueSlotGatingSource (Ifx_VADC_G *vadcG)
Gets the requested queue slot gating input. More...
IFX_INLINE IfxVadc_RequestSlotPriority | IfxVadc_getQueueSlotPriority (Ifx_VADC_G *vadcG)
Gets the request queue slot priority. More...
IFX_INLINE IfxVadc_RequestSlotStartMode | IfxVadc_getQueueSlotStartMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot start mode. More...
IFX_INLINE IfxVadc_TriggerSource | IfxVadc_getQueueSlotTriggerInput (Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger input. More...
IFX_INLINE IfxVadc_TriggerMode | IfxVadc_getQueueSlotTriggerMode (Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger mode. More...
IFX_INLINE boolean | IfxVadc_isRequestQueueSlotEnabled (Ifx_VADC_G *vadcG)
Returns the queue slot requested status. More...
IFX_INLINE void | IfxVadc_setQueueSlotGatingConfig (Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the gating configurations. More...
IFX_INLINE void | IfxVadc_setQueueSlotTriggerOperatingConfig (Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the trigger operating configurations. More...
IFX_INLINE void | IfxVadc_startQueue (Ifx_VADC_G *group)
Starts a queue of a group by generating a trigger event through software. More...
IFX_EXTERN IfxVadc_Status | IfxVadc_getQueueStatus (Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
IFX_INLINE void | IfxVadc_initEmuxPin (const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output. More...
IFX_INLINE void | IfxVadc_initGxBflPin (const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output. More...
IFX_INLINE uint32 | IfxVadc_calculateSampleTime (float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency. More...
IFX_EXTERN float32 | IfxVadc_getAdcAnalogFrequency (Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz. More...
IFX_EXTERN float32 | IfxVadc_getAdcDigitalFrequency (Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz. More...
IFX_INLINE void | IfxVadc_clearAllResultRequests (Ifx_VADC_G *vadcG)
Clears the all group requests. More...
IFX_INLINE IfxVadc_ArbitrationRounds | IfxVadc_getArbiterRoundLength (Ifx_VADC_G *vadcG)
Gets the ADC group arbitration round length. More...
IFX_INLINE Ifx_VADC_G_REVNP0 | IfxVadc_getChannelResultServiceRequestNodePointer0 (Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 0. More...
IFX_INLINE Ifx_VADC_G_REVNP1 | IfxVadc_getChannelResultServiceRequestNodePointer1 (Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 1. More...
IFX_INLINE Ifx_VADC_G_CEVNP0 | IfxVadc_getChannelServiceRequestNodePointer0 (Ifx_VADC_G *vadcG)
Gets the channel service request node pointer. More...
IFX_INLINE uint8 | IfxVadc_getMasterIndex (Ifx_VADC_G *vadcG)
Gets the configured master index. More...
IFX_INLINE void | IfxVadc_resetGroup (Ifx_VADC_G *vadcG)
Resets the ADC group. More...
IFX_INLINE void | IfxVadc_setAnalogConvertControl (Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number. More...
IFX_INLINE void | IfxVadc_setArbitrationRoundLength (Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
Sets the arbiter round length. More...
IFX_INLINE void | IfxVadc_setGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the ADC input class channel resolution. More...
IFX_INLINE void | IfxVadc_setGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time. More...
IFX_INLINE void | IfxVadc_setMasterIndex (Ifx_VADC_G *vadcG, uint8 masterIndex)
Sets the master index. More...
IFX_EXTERN void | IfxVadc_setArbiterPriority (Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations. More...
IFX_INLINE void | IfxVadc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
IFX_INLINE void | IfxVadc_enableModule (Ifx_VADC *vadc)
Enable VADC kernel. More...
IFX_INLINE uint8 | IfxVadc_getAdcCalibrationActiveState (Ifx_VADC *vadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status. More...
IFX_INLINE Ifx_VADC_GLOBCFG | IfxVadc_getGlobalConfigValue (Ifx_VADC *vadc)
Gets the global control configuration value. More...
IFX_INLINE boolean | IfxVadc_getStartupCalibration (Ifx_VADC *vadc)
get SUCAL bit field status More...
IFX_INLINE void | IfxVadc_initiateStartupCalibration (Ifx_VADC *vadc)
initiates the calibration pulse phase. More...
IFX_INLINE void | IfxVadc_setGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the channel conversion mode. More...
IFX_INLINE void | IfxVadc_setGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class. More...
IFX_INLINE void | IfxVadc_setSleepMode (Ifx_VADC *vadc, IfxVadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal. More...
IFX_EXTERN void | IfxVadc_disableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers. More...
IFX_EXTERN void | IfxVadc_disablePostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration. More...
IFX_EXTERN void | IfxVadc_enableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers. More...
IFX_EXTERN void | IfxVadc_enableGroupSync (Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068. More...
IFX_EXTERN float32 | IfxVadc_getAdcModuleFrequency (void)
Module Frequency in Hz. More...
IFX_EXTERN volatile Ifx_SRC_SRCR * | IfxVadc_getSrcAddress (IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address. More...
IFX_EXTERN void | IfxVadc_initialiseAdcArbiterClock (Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock. More...
IFX_EXTERN void | IfxVadc_initialiseAdcConverterClock (Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock. More...
IFX_EXTERN uint32 | IfxVadc_initializeFAdcD (Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock. More...
IFX_EXTERN uint32 | IfxVadc_initializeFAdcI (Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock. More...
IFX_EXTERN boolean | IfxVadc_isPostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status. More...
IFX_EXTERN void | IfxVadc_resetKernel (Ifx_VADC *vadc)
Resets the kernel. More...
IFX_EXTERN void | IfxVadc_selectPowerSupplyVoltage (Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage. More...
IFX_EXTERN void | IfxVadc_startupCalibration (Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process. More...
IFX_INLINE void | IfxVadc_clearChannelRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
Clears the channel request. More...
IFX_INLINE void | IfxVadc_enableFifoMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
Enables the FIFO mode. More...
IFX_INLINE void | IfxVadc_enableServiceRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
IFX_INLINE Ifx_VADC_G_CHASS | IfxVadc_getAssignedChannels (Ifx_VADC_G *vadcG)
Gets the group's assigned channels. More...
IFX_INLINE Ifx_VADC_CHCTR | IfxVadc_getChannelControlConfig (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the current ADC channel control configurations. More...
IFX_INLINE IfxVadc_InputClasses | IfxVadc_getChannelInputClass (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the channel input class. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum)
Gets the ADC input class channel resolution. More...
IFX_INLINE float32 | IfxVadc_getGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class channel sample time. More...
IFX_INLINE void | IfxVadc_setBackgroundPriorityChannel (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets the channels with low priority as background channel. More...
IFX_INLINE void | IfxVadc_setBackgroundResultTarget (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
Sets the target for result background source. More...
IFX_INLINE void | IfxVadc_setBoundaryMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
Selects boundary extension. More...
IFX_INLINE void | IfxVadc_setChannelEventNodePointer0 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
Sets the channel event service request line. More...
IFX_INLINE void | IfxVadc_setChannelInputClass (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
Sets the channel input class. More...
IFX_INLINE void | IfxVadc_setChannelLimitCheckMode (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
Sets the channel event mode. More...
IFX_INLINE void | IfxVadc_setGroupPriorityChannel (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets channel as priority channel with in the group. More...
IFX_INLINE void | IfxVadc_setLowerBoundary (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
Sets group's lower boundary. More...
IFX_INLINE void | IfxVadc_setReferenceInput (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
Selects the refernce input. More...
IFX_INLINE void | IfxVadc_setResultNodeEventPointer0 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 0. More...
IFX_INLINE void | IfxVadc_setResultNodeEventPointer1 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 1. More...
IFX_INLINE void | IfxVadc_setResultPosition (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position. More...
IFX_INLINE void | IfxVadc_setSyncRequest (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request. More...
IFX_INLINE void | IfxVadc_setUpperBoundary (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
Sets group's upper boundary. More...
IFX_INLINE void | IfxVadc_storeGroupResult (Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
Sets the group result register. More...
IFX_EXTERN float32 | IfxVadc_getChannelConversionTime (Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getEmuxGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution More...
IFX_INLINE float32 | IfxVadc_getEmuxGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
Get the sample time of ADC global class for external channel. More...
IFX_INLINE IfxVadc_ChannelResolution | IfxVadc_getEmuxGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum)
get the external channel resolution More...
IFX_INLINE float32 | IfxVadc_getEmuxGroupSampleTime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel. More...
IFX_INLINE void | IfxVadc_setEmuxGlobalResolution (Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of Global class More...
IFX_INLINE void | IfxVadc_setEmuxGlobalSampleTime (Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel. More...
IFX_INLINE void | IfxVadc_setEmuxGroupResolution (Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of ADC input class More...
IFX_INLINE void | IfxVadc_setEmuxGroupSampletime (Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel. More...
IFX_INLINE void | IfxVadc_setEmuxInterfaceForGroup (Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
Sets the Emux Interface for a particular group. More...
IFX_EXTERN void | IfxVadc_configExternalMultiplexerMode (Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
IFX_INLINE Ifx_VADC_G_CEVNP1 | IfxVadc_getChannelServiceRequestNodePointer1 (Ifx_VADC_G *vadcG)
get channel service request node pointer More...
IFX_INLINE void | IfxVadc_setChannelEventNodePointer1 (Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
set channel event node pointer More...

Detailed Description

VADC basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxVadc.h.

Function Documentation

◆ IfxVadc_getChannelServiceRequestNodePointer1()

IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1 ( Ifx_VADC_G * vadcG )

get channel service request node pointer

Parameters
vadcG Pointer to VADC Group register space
Returns
channel service request node pointer

Definition at line 1923 of file IfxVadc.h.

Referenced by IfxVadc_Adc_getChannelConfig().

◆ IfxVadc_setChannelEventNodePointer1()

IFX_INLINE void IfxVadc_setChannelEventNodePointer1 | ( | Ifx_VADC_G * | vadcG,
 |  | IfxVadc_SrcNr | channelSrcNr,
 |  | IfxVadc_ChannelId | channel
 | ) |  |

set channel event node pointer

Parameters
vadcG | Pointer to the Vadc group register space
channelSrcNr | Service request
channel | specifies channel
Returns
None

Definition at line 2252 of file IfxVadc.h.

Referenced by IfxVadc_Adc_initChannel().


iLLD_TC26B: General functionalities

Modules
General functionalities
iLLD
Collaboration diagram for General functionalities:

Modules

Data handling
Internal Mux

Detailed Description


iLLD_TC26B: Data handling

Modules
Data handling
iLLD » General functionalities
Collaboration diagram for Data handling:

Modules

Circular buffer
FIFO

Detailed Description


iLLD_TC26B: Circular buffer

Functions
Circular buffer
iLLD » General functionalities » Data handling
Collaboration diagram for Circular buffer:

Functions

uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

This module implements circular buffer functions.

Function Documentation

◆ Ifx_CircularBuffer_get16()

uint16 Ifx_CircularBuffer_get16 ( Ifx_CircularBuffer * buffer )

Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.

Parameters
buffer Specifies circular buffer.
Returns
Return the next circular buffer value.

Definition at line 44 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_get32()

uint32 Ifx_CircularBuffer_get32 ( Ifx_CircularBuffer * buffer )

Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.

Parameters
buffer Specifies circular buffer.
Returns
Return the next circular buffer value.

Definition at line 29 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_read32()

void* Ifx_CircularBuffer_read32 | ( | Ifx_CircularBuffer * | buffer,
 |  | void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count 32 bit words from the circular buffer to the data array.

Parameters
buffer | Specifies circular buffer.
data | Specifies destination pointer.
count | Specifies number of 32 bit words to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint32*)data) + count

Definition at line 99 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_read8()

void* Ifx_CircularBuffer_read8 | ( | Ifx_CircularBuffer * | buffer,
 |  | void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count bytes from the circular buffer to the data array.

Parameters
buffer | Specifies circular buffer.
data | Specifies destination pointer.
count | Specifies number of bytes to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint8*)data) + count

Definition at line 78 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_write32()

const void* Ifx_CircularBuffer_write32 | ( | Ifx_CircularBuffer * | buffer,
 |  | const void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count 32 bit words from the data array to the circular buffer.

Parameters
buffer | Specifies circular buffer.
data | Specifies source pointer.
count | Specifies number of 32 bit words to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint32*)data) + count

Definition at line 143 of file Ifx_CircularBuffer.c.

◆ Ifx_CircularBuffer_write8()

const void* Ifx_CircularBuffer_write8 | ( | Ifx_CircularBuffer * | buffer,
 |  | const void * | data,
 |  | Ifx_SizeT | count
 | ) |  |

Copy count bytes from the data array to the circular buffer.

Parameters
buffer | Specifies circular buffer.
data | Specifies source pointer.
count | Specifies number of bytes to be copied. count MUST be >= 1.
Returns
Returns the updated data pointer data = ((uint8*)data) + count

Definition at line 122 of file Ifx_CircularBuffer.c.


iLLD_TC26B: FIFO

Files | Data Structures | Typedefs | Functions
FIFO
iLLD » General functionalities » Data handling
Collaboration diagram for FIFO:

Files

file Ifx_Fifo.h
FIFO buffer functions.

Data Structures

struct _Fifo

Typedefs

typedef struct _Fifo Ifx_Fifo

Functions

IFX_EXTERN boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
IFX_EXTERN boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_EXTERN void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
IFX_EXTERN void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...
IFX_INLINE boolean | Ifx_Fifo_flush (Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_readCount (Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_writeCount (Ifx_Fifo *fifo)
Returns the free size in bytes. More...
IFX_INLINE boolean | Ifx_Fifo_isEmpty (Ifx_Fifo *fifo)
Indicates if the fifo is empty. More...

Detailed Description

This module implements the FIFO buffer functionality.

Data Structure Documentation

◆ _Fifo

struct _Fifo

Fifo object

Definition at line 53 of file Ifx_Fifo.h.

Collaboration diagram for _Fifo:
[legend]
Data Fields
void * | buffer | aligned on 64 bit boundary
Ifx_SizeT | elementSize | minimum number of bytes (block) added / removed to / from the buffer
Ifx_SizeT | endIndex | buffer valid data end index
volatile boolean | eventReader | event set by the writer to signal the reader that the required data are available in the buffer
volatile boolean | eventWriter | event set by the reader to signal the writer that the required free space are available in the buffer
Ifx_Fifo_Shared | shared | data shared between reader / writer
Ifx_SizeT | size | multiple of 8 bit, max 0xFFF8
Ifx_SizeT | startIndex | buffer valid data start index

Typedef Documentation

◆ Ifx_Fifo

typedef struct _Fifo Ifx_Fifo

Fifo object

Function Documentation

◆ Ifx_Fifo_canReadCount()

IFX_EXTERN boolean Ifx_Fifo_canReadCount | ( | Ifx_Fifo * | fifo,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if the required number of bytes are available in the buffer.

Should not be called from an interrupt as this function may wait forever

Parameters
fifo | Pointer on the Fifo object
count | in bytes
timeout | in system timer ticks
Returns
TRUE if at least count bytes can be read from the buffer, else the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 119 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_canReadCount().

◆ Ifx_Fifo_canWriteCount()

IFX_EXTERN boolean Ifx_Fifo_canWriteCount | ( | Ifx_Fifo * | fifo,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if there is enough free space to write the data in the buffer.

Should not be called from an interrupt as this function may wait forever

Parameters
fifo | Pointer on the Fifo object
count | in bytes
timeout | in system timer ticks
Returns
TRUE if at least count bytes can be written to the buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 279 of file Ifx_Fifo.c.

Referenced by Ifx_Fifo_flush(), and IfxAsclin_Asc_canWriteCount().

◆ Ifx_Fifo_clear()

IFX_EXTERN void Ifx_Fifo_clear ( Ifx_Fifo * fifo )

Clear fifo contents.

Parameters
fifo Pointer on the Fifo object
Returns
void

Definition at line 242 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_clearRx(), and IfxAsclin_Asc_clearTx().

◆ Ifx_Fifo_create()

IFX_EXTERN Ifx_Fifo* Ifx_Fifo_create | ( | Ifx_SizeT | size,
 |  | Ifx_SizeT | elementSize
 | ) |  |

Create a Fifo object.

The memory required for the object is allocated dynamically.

Parameters
size | Specifies the FIFO buffer size in bytes
elementSize | Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
Returns
returns a pointer to the FIFO object
See also
Ifx_Fifo_destroy()

Definition at line 51 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_initModule().

◆ Ifx_Fifo_destroy()

IFX_EXTERN void Ifx_Fifo_destroy ( Ifx_Fifo * fifo )

Destroy the FIFO object.

This function must be called to destroy the fifo object when created with Ifx_Fifo_create()

Parameters
fifo Pointer on the Fifo object
Returns
void
See also
Ifx_Fifo_create()

Definition at line 68 of file Ifx_Fifo.c.

◆ Ifx_Fifo_flush()

IFX_INLINE boolean Ifx_Fifo_flush | ( | Ifx_Fifo * | fifo,
 |  | Ifx_TickTime | timeout
 | ) |  |

Empty the fifo.

Parameters
fifo | Pointer on the Fifo object
timeout | in system timer ticks
Returns
TRUE if the buffer is emptied.

Definition at line 169 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_flushTx().

◆ Ifx_Fifo_init()

IFX_EXTERN Ifx_Fifo* Ifx_Fifo_init | ( | void * | buffer,
 |  | Ifx_SizeT | size,
 |  | Ifx_SizeT | elementSize
 | ) |  |

Initialize the FIFO buffer object.

Parameters
buffer | Specifies the FIFO object address.
size | Specifies the FIFO buffer size in bytes
elementSize | Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
Returns
Returns a pointer on the FIFO object
Note
: The buffer parameter must point on a free memory location where the buffer object will be initialised. The size of this area must be at least equals to "size + sizeof(Ifx_Fifo) + 8". Not taking this in account may result in unpredictable behavior.

Definition at line 74 of file Ifx_Fifo.c.

Referenced by Ifx_Fifo_create(), and IfxAsclin_Asc_initModule().

◆ Ifx_Fifo_isEmpty()

IFX_INLINE boolean Ifx_Fifo_isEmpty ( Ifx_Fifo * fifo )

Indicates if the fifo is empty.

Parameters
fifo Pointer on the Ifx_Fifo object
Return values
TRUE | is the buffer is empty
FALSE | is the buffer is not empty

Definition at line 215 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_initiateTransmission(), and IfxAsclin_Asc_isrTransmit().

◆ Ifx_Fifo_read()

IFX_EXTERN Ifx_SizeT Ifx_Fifo_read | ( | Ifx_Fifo * | fifo,
 |  | void * | data,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Read data from a fifo and remove them from the buffer.

Only complete elements are returned, if count is not a multiple of elementSize then the incomplete element is not read/removed from the buffer.

Parameters
fifo | Pointer on the Fifo object
data | Pointer to the data buffer for storing values
count | in bytes
timeout | in system timer ticks
Returns
return the number of byte that could not be read

Definition at line 191 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrTransmit(), and IfxAsclin_Asc_read().

◆ Ifx_Fifo_readCount()

IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount ( Ifx_Fifo * fifo )

Returns the size of the data in the buffer in bytes.

Parameters
fifo Pointer on the Fifo object

Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return a multiple of fifo->elementSize

Returns
Returns the size of the data in the buffer in bytes

Definition at line 186 of file Ifx_Fifo.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_isEmpty(), Ifx_Fifo_writeCount(), IfxAsclin_Asc_getReadCount(), and IfxAsclin_Asc_isrTransmit().

◆ Ifx_Fifo_write()

IFX_EXTERN Ifx_SizeT Ifx_Fifo_write | ( | Ifx_Fifo * | fifo,
 |  | const void * | data,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Write data into a fifo.

Only complete elements are written to the buffer, if count is not a multiple of elementSize then the incomplete element are not written to the buffer.

Parameters
fifo | Pointer on the Fifo object
data | Pointer to the data buffer to write into the Fifo
count | in bytes
timeout | in system timer ticks

Definition at line 349 of file Ifx_Fifo.c.

Referenced by IfxAsclin_Asc_isrReceive(), and IfxAsclin_Asc_write().

◆ Ifx_Fifo_writeCount()

IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount ( Ifx_Fifo * fifo )

Returns the free size in bytes.

Parameters
fifo Pointer on the Fifo object

Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return a multiple of fifo->elementSize

Returns
Returns the free size in bytes

Definition at line 202 of file Ifx_Fifo.h.

Referenced by IfxAsclin_Asc_getWriteCount().


iLLD_TC26B: Ifx_Fifo.h File Reference

  • _Lib
  • DataHandling
Data Structures | Typedefs | Functions
Ifx_Fifo.h File Reference
iLLD » General functionalities » Data handling » FIFO

FIFO buffer functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Fifo.h:

Go to the source code of this file.

Data Structures

struct | Ifx_Fifo_Shared
struct | _Fifo

Typedefs

typedef struct _Fifo Ifx_Fifo

Functions

IFX_EXTERN boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
IFX_EXTERN boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_EXTERN void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
IFX_EXTERN void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
IFX_EXTERN Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
IFX_EXTERN Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...
IFX_INLINE boolean | Ifx_Fifo_flush (Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_readCount (Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes. More...
IFX_INLINE Ifx_SizeT | Ifx_Fifo_writeCount (Ifx_Fifo *fifo)
Returns the free size in bytes. More...
IFX_INLINE boolean | Ifx_Fifo_isEmpty (Ifx_Fifo *fifo)
Indicates if the fifo is empty. More...

Detailed Description

FIFO buffer functions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Fifo.h.

Data Structure Documentation

◆ Ifx_Fifo_Shared

struct Ifx_Fifo_Shared

Shared data of the FIFO

Definition at line 40 of file Ifx_Fifo.h.

Data Fields
Ifx_SizeT | count | number of bytes contained in the buffer
Ifx_SizeT | maxcount | Highest value seen in the count.
sint32 | readerWaitx | Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signaled.
sint32 | writerWaitx | Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signaled.


iLLD_TC26B: Internal Mux

Modules
Internal Mux
iLLD » General functionalities
Collaboration diagram for Internal Mux:

Modules

FIFO

Detailed Description


iLLD_TC26B: FIFO

Data Structures | Functions
FIFO
iLLD » General functionalities » Internal Mux
Collaboration diagram for FIFO:

Data Structures

struct | Ifx_InternalMux_MuxConfig
struct | Ifx_InternalMux_Config

Functions

IFX_EXTERN void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

This module implements the Internal Mux functionality.

Data Structure Documentation

◆ Ifx_InternalMux_MuxConfig

struct Ifx_InternalMux_MuxConfig

Individual Mux configuration structure

Definition at line 45 of file Ifx_InternalMux.h.

Data Fields
uint32 | mask | Bit field position for the Mux/Demux selection.
volatile void * | regAddr | pointer to the register for Mux/Demux configuration
uint32 | value | Mux/Demux configuration value.

◆ Ifx_InternalMux_Config

struct Ifx_InternalMux_Config

Global/Combined Mux configuration object

Definition at line 55 of file Ifx_InternalMux.h.

Collaboration diagram for Ifx_InternalMux_Config:
[legend]
Data Fields
Ifx_InternalMux_MuxConfig * | muxConfig | pointer to the internal mux config array
uint32 | size | size of the internal mux configuration array

Function Documentation

◆ Ifx_InternalMux_init()

IFX_EXTERN void Ifx_InternalMux_init ( const Ifx_InternalMux_Config * cfg )

Initialises the internal mux configuration.

Parameters
cfg Pointer on the Global Mux Configuration object
Returns
None

Definition at line 36 of file Ifx_InternalMux.c.


iLLD_TC26B: IfxStdIf.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Typedefs
IfxStdIf.h File Reference
iLLD

Standard interface types. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for IfxStdIf.h:

Go to the source code of this file.

Typedefs

typedef void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver. More...

Detailed Description

Standard interface types.

Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:23 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf.h.

Typedef Documentation

◆ IfxStdIf_InterfaceDriver

typedef void* IfxStdIf_InterfaceDriver

Pointer to the specific interface driver.

Definition at line 98 of file IfxStdIf.h.


iLLD_TC26B: Service software

Modules
Service software
Collaboration diagram for Service software:

Modules

Utilities
Standard interface (Obsolete)
Standard interface
System Engineering

Detailed Description


iLLD_TC26B: Utilities

Modules
Utilities
Service software
Collaboration diagram for Utilities:

Modules

Assertion

Detailed Description


iLLD_TC26B: Assertion

Files | Macros
Assertion
Service software » Utilities
Collaboration diagram for Assertion:

Files

file Ifx_Assert.h
Assert functions.

Macros

#define | IFX_VERBOSE_LEVEL_OFF (0)
Assertion level off, assertion is disabled. More...
#define | IFX_VERBOSE_LEVEL_FAILURE (1)
Assertion level failure, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_ERROR (2)
Assertion level error, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_WARNING (3)
Assertion level warning. More...
#define | IFX_VERBOSE_LEVEL_INFO (4)
Assertion level info. More...
#define | IFX_VERBOSE_LEVEL_DEBUG (5)
Assertion level debug. More...
#define | IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
Constant to be used to indicate not implemented feature. More...
#define | IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
Feature is not available on the selected hardware. More...
#define | IFX_ASSERT(level, expr) ((void)0)
#define | IFX_VALIDATE(level, expr) (expr)

Detailed Description

This module implements assertion functions.

Macro Definition Documentation

◆ IFX_ASSERT

#define IFX_ASSERT | ( | level,
 |  | expr
 | ) | ((void)0)

Definition at line 52 of file Ifx_Assert.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_process(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_setT12InputSignal(), IfxCcu6_setT13InputSignal(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCpu_setSafetyTaskIdentifier(), IfxDma_Dma_configureTransactionSet(), IfxEth_init(), IfxEth_initReceiveDescriptorsRingMode(), IfxEth_initTransmitDescriptorsRingMode(), IfxFft_Fft_initDma(), IfxFft_Fft_initJob(), IfxFft_Fft_initModule(), IfxFft_Fft_initWindow(), IfxFft_Fft_isrOutput(), IfxFlash_selectCorrectableErrorTracking(), IfxFlash_selectUncorrectableErrorTracking(), IfxGpt12_T2_setEudInput(), IfxGpt12_T2_setInput(), IfxGpt12_T3_setCounterInputMode(), IfxGpt12_T3_setMode(), IfxGpt12_T5_setEudInput(), IfxGpt12_T5_setInput(), IfxGpt12_T5_setMode(), IfxGpt12_T6_setCounterInputMode(), IfxGpt12_T6_setEudInput(), IfxGpt12_T6_setInput(), IfxGpt12_T6_setMode(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_toSent(), IfxGtm_Trig_toVadc(), IfxIom_Driver_initLam(), IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), IfxMultican_Node_setNominalBitTiming(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_packLongModeBuffer(), IfxQspi_SpiMaster_writeLong(), IfxScuWdt_enableWatchdogWithDebugger(), IfxSmu_triggerAlarm(), IfxStdIf_DPipe_print(), and IfxStm_Timer_init().

◆ IFX_ASSERT_FEATURE_NOT_AVAILABLE

#define IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)

Feature is not available on the selected hardware.

Definition at line 49 of file Ifx_Assert.h.

◆ IFX_ASSERT_FEATURE_NOT_IMPLEMENTED

#define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)

Constant to be used to indicate not implemented feature.

Definition at line 47 of file Ifx_Assert.h.

Referenced by IfxQspi_SpiMaster_packLongModeBuffer(), and IfxQspi_SpiMaster_writeLong().

◆ IFX_VALIDATE

#define IFX_VALIDATE | ( | level,
 |  | expr
 | ) | (expr)

Definition at line 56 of file Ifx_Assert.h.

Referenced by Ifx_Fifo_create().

◆ IFX_VERBOSE_LEVEL_DEBUG

#define IFX_VERBOSE_LEVEL_DEBUG (5)

Assertion level debug.

Definition at line 44 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_ERROR

#define IFX_VERBOSE_LEVEL_ERROR (2)

Assertion level error, a debug instruction is inserted if enabled.

Definition at line 41 of file Ifx_Assert.h.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_create(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_process(), IfxAsclin_Asc_initModule(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxCcu6_Icu_initChannel(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_setT12InputSignal(), IfxCcu6_setT13InputSignal(), IfxCcu6_Timer_initModule(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TPwm_initModule(), IfxCpu_setSafetyTaskIdentifier(), IfxDma_Dma_configureTransactionSet(), IfxEth_init(), IfxEth_initReceiveDescriptorsRingMode(), IfxEth_initTransmitDescriptorsRingMode(), IfxFft_Fft_initDma(), IfxFft_Fft_initJob(), IfxFft_Fft_initModule(), IfxFft_Fft_initWindow(), IfxFft_Fft_isrOutput(), IfxFlash_selectCorrectableErrorTracking(), IfxFlash_selectUncorrectableErrorTracking(), IfxGpt12_T2_setEudInput(), IfxGpt12_T2_setInput(), IfxGpt12_T3_setCounterInputMode(), IfxGpt12_T3_setMode(), IfxGpt12_T5_setEudInput(), IfxGpt12_T5_setInput(), IfxGpt12_T5_setMode(), IfxGpt12_T6_setCounterInputMode(), IfxGpt12_T6_setEudInput(), IfxGpt12_T6_setInput(), IfxGpt12_T6_setMode(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_Timer_init(), IfxGtm_Tim_In_init(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_toSent(), IfxGtm_Trig_toVadc(), IfxIom_Driver_initLam(), IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_runNonDestructiveInversionTest(), IfxMtu_writeSramAddress(), IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), IfxMultican_Node_setNominalBitTiming(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_SpiMaster_packLongModeBuffer(), IfxQspi_SpiMaster_writeLong(), IfxScuWdt_enableWatchdogWithDebugger(), IfxSmu_triggerAlarm(), IfxStdIf_DPipe_print(), and IfxStm_Timer_init().

◆ IFX_VERBOSE_LEVEL_FAILURE

#define IFX_VERBOSE_LEVEL_FAILURE (1)

Assertion level failure, a debug instruction is inserted if enabled.

Definition at line 40 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_INFO

#define IFX_VERBOSE_LEVEL_INFO (4)

Assertion level info.

Definition at line 43 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_OFF

#define IFX_VERBOSE_LEVEL_OFF (0)

Assertion level off, assertion is disabled.

Definition at line 39 of file Ifx_Assert.h.

◆ IFX_VERBOSE_LEVEL_WARNING

#define IFX_VERBOSE_LEVEL_WARNING (3)

Assertion level warning.

Definition at line 42 of file Ifx_Assert.h.

Referenced by IfxAsclin_setBitTiming(), IfxQspi_calculateExtendedConfigurationValue(), and IfxQspi_SpiMaster_initChannel().


iLLD_TC26B: Ifx_Assert.h File Reference

  • Service
  • CpuGeneric
  • _Utilities
Macros
Ifx_Assert.h File Reference
Service software » Utilities » Assertion

Assert functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_Assert.h:

Go to the source code of this file.

Macros

#define | IFX_VERBOSE_LEVEL_OFF (0)
Assertion level off, assertion is disabled. More...
#define | IFX_VERBOSE_LEVEL_FAILURE (1)
Assertion level failure, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_ERROR (2)
Assertion level error, a debug instruction is inserted if enabled. More...
#define | IFX_VERBOSE_LEVEL_WARNING (3)
Assertion level warning. More...
#define | IFX_VERBOSE_LEVEL_INFO (4)
Assertion level info. More...
#define | IFX_VERBOSE_LEVEL_DEBUG (5)
Assertion level debug. More...
#define | IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
Constant to be used to indicate not implemented feature. More...
#define | IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
Feature is not available on the selected hardware. More...
#define | IFX_ASSERT(level, expr) ((void)0)
#define | IFX_VALIDATE(level, expr) (expr)

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:42 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Assert.h.


iLLD_TC26B: Standard interface (Obsolete)

Modules
Standard interface (Obsolete)
Service software
Collaboration diagram for Standard interface (Obsolete):

Modules

ICU interface
PWM HL interface
Timer interface
TPWM interface
SPI interface

Detailed Description

Use Standard interface instead


iLLD_TC26B: ICU interface

ICU interface
Service software » Standard interface (Obsolete)
Collaboration diagram for ICU interface:


iLLD_TC26B: PWM HL interface

PWM HL interface
Service software » Standard interface (Obsolete)
Collaboration diagram for PWM HL interface:


iLLD_TC26B: Timer interface

Timer interface
Service software » Standard interface (Obsolete)
Collaboration diagram for Timer interface:


iLLD_TC26B: TPWM interface

TPWM interface
Service software » Standard interface (Obsolete)
Collaboration diagram for TPWM interface:


iLLD_TC26B: SPI interface

Data Structures | Typedefs | Enumerations | Functions
SPI interface
Service software » Standard interface (Obsolete)
Collaboration diagram for SPI interface:

Data Structures

struct | SpiIf_Flags
struct | SpiIf_Job
struct | SpiIf_funcs
struct | SpiIf_
struct | SpiIf_Config
struct | Spi_ErrorChecks
struct | SpiIf_ChMode
struct | SpiIf_Ch_
struct | SpiIf_ChConfig_

Typedefs

typedef struct SpiIf_Ch_ | SpiIf_Ch
Alias to the channel structure. More...
typedef struct SpiIf_ChConfig_ | SpiIf_ChConfig
typedef struct SpiIf_ | SpiIf
typedef SpiIf_Status(* | SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
typedef SpiIf_Status(* | SpiIf_GetStatus) (SpiIf_Ch *handle)
typedef void(* | SpiIf_OnEvent) (SpiIf *handle)
typedef uint32 | SpiIf_SlsoTiming_HalfTsclk
typedef void(* | SpiIf_Cbk) (void *data)
SPI channel callback prototype. More...
typedef void(* | TxRxHandler) (SpiIf_Ch *handle)

Enumerations

enum SpiIf_Status {
SpiIf_Status_ok,
SpiIf_Status_busy,
SpiIf_Status_unknown
}
SPI Interface Status. More...
enum SpiIf_SlsoTiming {
SpiIf_SlsoTiming_0 = 0,
SpiIf_SlsoTiming_1,
SpiIf_SlsoTiming_2,
SpiIf_SlsoTiming_3,
SpiIf_SlsoTiming_4,
SpiIf_SlsoTiming_5,
SpiIf_SlsoTiming_6,
SpiIf_SlsoTiming_7
}
Slave select output timing. More...
enum SpiIf_DataHeading {
SpiIf_DataHeading_lsbFirst = 0,
SpiIf_DataHeading_msbFirst
}
Heading. More...
enum SpiIf_ShiftClock {
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0,
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
}
Clock phase. More...
enum SpiIf_ClockPolarity {
SpiIf_ClockPolarity_idleLow = 0,
SpiIf_ClockPolarity_idleHigh
}
Clock polarity. More...
enum SpiIf_Mode {
SpiIf_Mode_master,
SpiIf_Mode_slave,
SpiIf_Mode_undefined
}

Functions

IFX_INLINE void | SpiIf_wait (SpiIf_Ch *handle)
IFX_EXTERN void | SpiIf_initConfig (SpiIf_Config *config)
IFX_EXTERN void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)

Virtual functions

These functions are implemented by a driver.

IFX_INLINE SpiIf_Status | SpiIf_exchange (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
IFX_INLINE SpiIf_Status | SpiIf_getStatus (SpiIf_Ch *handle)

Detailed Description

Data Structure Documentation

◆ SpiIf_Flags

struct SpiIf_Flags

Definition at line 98 of file SpiIf.h.

Data Fields
uint32 | byteAccess: 1 | Channel status: 8bit / 16 bit access.
uint32 | onTransfer: 1 | Channel status: On transfer.

◆ SpiIf_Job

struct SpiIf_Job

Definition at line 104 of file SpiIf.h.

Data Fields
void * | data
Ifx_SizeT | remaining

◆ SpiIf_funcs

struct SpiIf_funcs

Definition at line 124 of file SpiIf.h.

Collaboration diagram for SpiIf_funcs:
[legend]
Data Fields
SpiIf_Exchange | exchange
SpiIf_GetStatus | getStatus
SpiIf_OnEvent | onError
SpiIf_OnEvent | onRx
SpiIf_OnEvent | onTx

◆ SpiIf_

struct SpiIf_

Definition at line 133 of file SpiIf.h.

Collaboration diagram for SpiIf_:
[legend]
Data Fields
SpiIf_Ch * | activeChannel | Channel actually transmitting / receiving.
pvoid | driver | Spi specific driver.
SpiIf_funcs | functions |
uint32 | rxCount |
uint32 | sending |
uint32 | txCount |

◆ SpiIf_Config

struct SpiIf_Config

Definition at line 143 of file SpiIf.h.

Data Fields
void * | buffer | Specifies the buffer location.The buffer parameter must point on a free memory location where the buffer object will be initialised. The Size of this area must be at least equals to "Size + sizeof(Ifx_Fifo) + 8", with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking this in account may result in unpredictable behaviour.
Ifx_SizeT | bufferSize | Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Ifx_Priority | erPriority | Specifies the priority of the error interrupt.
IfxSrc_Tos | isrProvider | Specifies the handler of the interrupts.
float32 | maximumBaudrate | Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock.
SpiIf_Mode | mode | Specifies the interface operation mode.
Ifx_Priority | rxPriority | Specifies the priority of the receive interrupt.
Ifx_Priority | txPriority | Specifies the priority of the transmit interrupt.

◆ Spi_ErrorChecks

struct Spi_ErrorChecks

Definition at line 159 of file SpiIf.h.

Data Fields
uint32 | baudrate: 1 | TRUE = checked, FALSE = ignored.
uint32 | phase: 1 | TRUE = checked, FALSE = ignored.
uint32 | receive: 1 | TRUE = checked, FALSE = ignored.
uint32 | reserved: 28 |
uint32 | transmit: 1 | TRUE = checked, FALSE = ignored.

◆ SpiIf_ChMode

struct SpiIf_ChMode

Channel operation mode

Definition at line 169 of file SpiIf.h.

Data Fields
uint32 | autoCS: 1 | 1 = chip select is controlled by the hardware module or, 0 = by software.
uint32 | clockPolarity: 1 | SpiIf_ClockPolarity
uint32 | csActiveLevel: 1 | Ifx_ActiveState
SpiIf_SlsoTiming_HalfTsclk | csInactiveDelay | CS Inactive Delay in Tsclk/2 units.
SpiIf_SlsoTiming_HalfTsclk | csLeadDelay | CS Lead Delay in Tsclk/2 units.
SpiIf_SlsoTiming_HalfTsclk | csTrailDelay | CS Trail Delay in Tsclk/2 units.
uint32 | dataHeading: 1 | SpiIf_DataHeading
uint32 | dataWidth: 6 | range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
uint32 | enabled: 1 | 1 = channel enabled, 0 = channel disabled
uint32 | loopback: 1 | 0 = normal mode, 1 = loopback mode
uint32 | parityCheck: 1 | 0 = disabled, 1 = enabled
uint32 | parityMode: 1 | Ifx_ParityMode
uint32 | shiftClock: 1 | SpiIf_ShiftClock

◆ SpiIf_Ch_

struct SpiIf_Ch_

Definition at line 194 of file SpiIf.h.

Collaboration diagram for SpiIf_Ch_:
[legend]
Data Fields
sint32 | baudrate | Real baudrate.
void * | callbackData | Specifies pointer to the user specific data on transmit end.
SpiIf * | driver | Pointer to the SPI interface driver.
Spi_ErrorChecks | errorChecks | Error checks.
SpiIf_Flags | flags |
SpiIf_Cbk | onExchangeEnd | Specifies the callback function on end of exchange.
SpiIf_Job | rx |
TxRxHandler | rxHandler |
SpiIf_Job | tx |
TxRxHandler | txHandler |

◆ SpiIf_ChConfig_

struct SpiIf_ChConfig_

Definition at line 208 of file SpiIf.h.

Collaboration diagram for SpiIf_ChConfig_:
[legend]
Data Fields
float32 | baudrate | Specifies the SPI baudrate.
SpiIf * | driver | Pointer to an implementation of SPI interface driver, e.g. IfxQspi_SpiMaster_ChannelConfig.
Spi_ErrorChecks | errorChecks |
SpiIf_ChMode | mode |

Typedef Documentation

◆ SpiIf

typedef struct SpiIf_ SpiIf

Definition at line 96 of file SpiIf.h.

◆ SpiIf_Cbk

typedef void(* SpiIf_Cbk) (void *data)

SPI channel callback prototype.

Definition at line 191 of file SpiIf.h.

◆ SpiIf_Ch

typedef struct SpiIf_Ch_ SpiIf_Ch

Alias to the channel structure.

Definition at line 94 of file SpiIf.h.

◆ SpiIf_ChConfig

typedef struct SpiIf_ChConfig_ SpiIf_ChConfig

Definition at line 95 of file SpiIf.h.

◆ SpiIf_Exchange

typedef SpiIf_Status(* SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)

Definition at line 118 of file SpiIf.h.

◆ SpiIf_GetStatus

typedef SpiIf_Status(* SpiIf_GetStatus) (SpiIf_Ch *handle)

Definition at line 119 of file SpiIf.h.

◆ SpiIf_OnEvent

typedef void(* SpiIf_OnEvent) (SpiIf *handle)

Definition at line 120 of file SpiIf.h.

◆ SpiIf_SlsoTiming_HalfTsclk

typedef uint32 SpiIf_SlsoTiming_HalfTsclk

Definition at line 121 of file SpiIf.h.

◆ TxRxHandler

typedef void(* TxRxHandler) (SpiIf_Ch *handle)

Definition at line 192 of file SpiIf.h.

Enumeration Type Documentation

◆ SpiIf_ClockPolarity

enum SpiIf_ClockPolarity

Clock polarity.

Enumerator
SpiIf_ClockPolarity_idleLow | Idle clock line is low
SpiIf_ClockPolarity_idleHigh | Idle clock line is high

Definition at line 84 of file SpiIf.h.

◆ SpiIf_DataHeading

enum SpiIf_DataHeading

Heading.

Enumerator
SpiIf_DataHeading_lsbFirst | LSB first
SpiIf_DataHeading_msbFirst | MSB first

Definition at line 70 of file SpiIf.h.

◆ SpiIf_Mode

enum SpiIf_Mode

SPI operation modes

Enumerator
SpiIf_Mode_master | Master mode.
SpiIf_Mode_slave | Slave mode.
SpiIf_Mode_undefined | Undefined mode.

Definition at line 111 of file SpiIf.h.

◆ SpiIf_ShiftClock

enum SpiIf_ShiftClock

Clock phase.

Enumerator
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge | Shift Tx data on leading edge
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge | Shift Tx data on training edge

Definition at line 77 of file SpiIf.h.

◆ SpiIf_SlsoTiming

enum SpiIf_SlsoTiming

Slave select output timing.

Enumerator
SpiIf_SlsoTiming_0 | zero delay clock
SpiIf_SlsoTiming_1 | 1 half-clock delay
SpiIf_SlsoTiming_2 | 2 half-clock delay
SpiIf_SlsoTiming_3 | 3 half-clock delay
SpiIf_SlsoTiming_4 | 4 half-clock delay
SpiIf_SlsoTiming_5 | 5 half-clock delay
SpiIf_SlsoTiming_6 | 6 half-clock delay
SpiIf_SlsoTiming_7 | 7 half-clock delay

Definition at line 57 of file SpiIf.h.

◆ SpiIf_Status

enum SpiIf_Status

SPI Interface Status.

Enumerator
SpiIf_Status_ok
SpiIf_Status_busy
SpiIf_Status_unknown

Definition at line 49 of file SpiIf.h.

Function Documentation

◆ SpiIf_exchange()

IFX_INLINE SpiIf_Status SpiIf_exchange | ( | SpiIf_Ch * | handle,
 |  | const void * | src,
 |  | void * | dest,
 |  | Ifx_SizeT | numOfData
 | ) |  |

Perform the SPI exchange operation.

Parameters
handle | Pointer to an implementation of SPI interface driver
src | Pointer to the start of data buffer for data to transmit
dest | Pointer to the start of data buffer for received data
numOfData | specifies number of byte/bit to transfer
Returns
STATUS of SPI
Note
the src and dest may be the same data location.

Definition at line 254 of file SpiIf.h.

◆ SpiIf_getStatus()

IFX_INLINE SpiIf_Status SpiIf_getStatus ( SpiIf_Ch * handle )

get the SPI status

  • Parameters
    handle Pointer to an implementation of SPI interface driver
    Returns
    STATUS of SPI

Definition at line 264 of file SpiIf.h.

◆ SpiIf_initChannelConfig()

IFX_EXTERN void SpiIf_initChannelConfig | ( | SpiIf_ChConfig * | config,
 |  | SpiIf * | driver
 | ) |  |

Definition at line 40 of file SpiIf.c.

Referenced by IfxQspi_SpiMaster_initChannelConfig(), and IfxQspi_SpiSlave_initModule().

◆ SpiIf_initConfig()

IFX_EXTERN void SpiIf_initConfig ( SpiIf_Config * config )

Definition at line 27 of file SpiIf.c.

Referenced by IfxQspi_SpiMaster_initModuleConfig(), and IfxQspi_SpiSlave_initModuleConfig().

◆ SpiIf_wait()

IFX_INLINE void SpiIf_wait ( SpiIf_Ch * handle )

Wait as long as the transmission is on-going

Note
This function blocks CPU for some-time

Definition at line 239 of file SpiIf.h.


iLLD_TC26B: Standard interface

Modules
Standard interface
Service software
Collaboration diagram for Standard interface:

Modules

Standard interface: Data Pipe
Standard interface: Position interface
Standard interface: Multi-channels, dual-complementary PWM interface
Standard interface: Timer

Detailed Description

Terms
Term | Descri
Standard Interface | Interface defined in this document
Interface Driver | Specific device driver as defined by the iLLD
Standard Interface Driver | Specific interface driver which implements the Standard Interface
API used at runtime | API that are used after initialization
Module | Hardware functional block / IP
Overview
The Standard Interface provides generic runtime API written in C for common use case application. It abstracts the underlaying Interface Driver, i.e. the runtime API is completely device independent. It provides generic API for common use case application.

Example of Standard Interface:

  • Serial communication interface
  • PWM interface
  • Position sensor interface
  • Timer interface
  • EEPROM interface

The target is to be able to exchange the microcontroller or external connected devices on which the application is based with a minimal impact on the application code, to reduce the application software development and maintenance effort. This is archived by the Standard Interface, for which, changing the hardware only requires the update of the device configuration settings and the device initialization code. The API used at runtime, which represents the majority and the complexitity of the related code keep unchanged.

Motivation: because the current software developed for the automotive applications mainly don’t use C++, the Standard Interface provides a common definition for the device driver and an alternative layer for different hardware instead of using C++ interface wrapper class.

The below figure shows the layers used and an example of APIs used by the application.

Standard interface layers
Standard interface example: Serial interface as data pipe
Standard interface example: Timer

The Standard Interface is implemented by Standard Interface wrapper by providing the function pointer to the custom functions. This gives the possibility to the programmer to use it or not. When used, it increases the code portability but slightly decreases the performance in term of run time execution and code size. When not used, the performance is not affected.

Definition
The standard interface requires the definition of at least two components: the standard interface component and the standard interface wrapper component. The standard interface component defines for each standard interface a standard interface object and a set of standard APIs used at runtime by the application. The standard interface wrapper component initializes the standard interface component by linking it to the interface driver.
Attention
: The application shall explicitly use the API provided by the standard interface component at runtime to access driver’s parameters (setter/ getter) or action (methods). Trying to access members of the standard interface component directly though the object may not guaranty future code compatibility. The same applies to the interface driver (reminder).
Convention

The Standard interface defines the following files:

Path/File | Description --—
1_SrvSw/StdIf/IfxStdIf.h | Global standard interface definitions
1_SrvSw/StdIf/IfxStdIf_<standard interface>.h | Specific standard interface definitions
TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper initialization API are reconized by the name Ifx<Module>_<interface>_StdIf<std interface>Init()
TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper function API are named according to the interface driver naming rules


iLLD_TC26B: Standard interface: Data Pipe

Functions
Standard interface: Data Pipe
Service software » Standard interface
Collaboration diagram for Standard interface: Data Pipe:

Functions

IFX_INLINE boolean | IfxStdIf_DPipe_write (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
IFX_INLINE boolean | IfxStdIf_DPipe_read (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getReadCount (IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getWriteCount (IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canReadCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canWriteCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_INLINE IfxStdIf_DPipe_ReadEvent | IfxStdIf_DPipe_getReadEvent (IfxStdIf_DPipe *stdIf)
Returns read event object. More...
IFX_INLINE IfxStdIf_DPipe_WriteEvent | IfxStdIf_DPipe_getWriteEvent (IfxStdIf_DPipe *stdIf)
Returns write event object. More...
IFX_INLINE boolean | IfxStdIf_DPipe_flushTx (IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearTx (IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearRx (IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_onReceive (IfxStdIf_DPipe *stdIf)
handler called on reveive event More...
IFX_INLINE void | IfxStdIf_DPipe_onTransmit (IfxStdIf_DPipe *stdIf)
handler called on transmit event More...
IFX_INLINE void | IfxStdIf_DPipe_onError (IfxStdIf_DPipe *stdIf)
handler called on error event More...
IFX_INLINE uint32 | IfxStdIf_DPipe_getSendCount (IfxStdIf_DPipe *stdIf)
Returns number of bytes send. More...
IFX_INLINE Ifx_TickTime | IfxStdIf_DPipe_getTxTimeStamp (IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data. More...
IFX_INLINE void | IfxStdIf_DPipe_resetSendCount (IfxStdIf_DPipe *stdIf)
Reset the sendCount counter. More...
IFX_EXTERN void | IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

The standard interafce data pipe (DPipe) abstract the hardware used for data transfer. It provide, after proper initialization an hardware independant way to write and read data to/from as communciation channel.

Porting StandardIo to DPipe
replace all
  • StandardIo type with IfxStdIf_DPipe
  • StandardIo_print with IfxStdIf_DPipe_print delete StandardIo.c and StandardIo.h Include "StdIf/IfxStdIf_DPipe.h" instead of "SysSe/Bsp/StandardIo.h"

The following files are already ported: Ifx_Console, Ifx_Shell

Function Documentation

◆ IfxStdIf_DPipe_canReadCount()

IFX_INLINE boolean IfxStdIf_DPipe_canReadCount | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if the required number of bytes are available for read in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 274 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_canWriteCount()

IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_SizeT | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Indicates if there is enough free space to write the data in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 282 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_clearRx()

IFX_INLINE void IfxStdIf_DPipe_clearRx ( IfxStdIf_DPipe * stdIf )

Clears the RX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 322 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Shell_enable().

◆ IfxStdIf_DPipe_clearTx()

IFX_INLINE void IfxStdIf_DPipe_clearTx ( IfxStdIf_DPipe * stdIf )

Clears the TX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 314 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_flushTx()

IFX_INLINE boolean IfxStdIf_DPipe_flushTx | ( | IfxStdIf_DPipe * | stdIf,
 |  | Ifx_TickTime | timeout
 | ) |  |

Flush the transmit buffer by transmitting all data.

Parameters
stdif | Pointer to the interface driver object
timeout | timeout for the flush operation
Returns
Returns TRUE if the FIFO is empty

Definition at line 306 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getReadCount()

IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount ( IfxStdIf_DPipe * stdIf )

Returns the number of bytes in the rx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of bytes in the rx buffer

Definition at line 258 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getReadEvent()

IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent ( IfxStdIf_DPipe * stdIf )

Returns read event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns read event object

Definition at line 290 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getSendCount()

IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount ( IfxStdIf_DPipe * stdIf )

Returns number of bytes send.

Parameters
stdif Pointer to the interface driver object
Returns
Returns number of bytes send

Definition at line 354 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getTxTimeStamp()

IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp ( IfxStdIf_DPipe * stdIf )

Returns the time stamp of the last transmit data.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the time stamp of the last transmit data

Definition at line 362 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getWriteCount()

IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount ( IfxStdIf_DPipe * stdIf )

Returns the number of free bytes (free space) in the tx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of free bytes in the tx buffer

Definition at line 266 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_getWriteEvent()

IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent ( IfxStdIf_DPipe * stdIf )

Returns write event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns write event object

Definition at line 298 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onError()

IFX_INLINE void IfxStdIf_DPipe_onError ( IfxStdIf_DPipe * stdIf )

handler called on error event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 346 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onReceive()

IFX_INLINE void IfxStdIf_DPipe_onReceive ( IfxStdIf_DPipe * stdIf )

handler called on reveive event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 330 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_onTransmit()

IFX_INLINE void IfxStdIf_DPipe_onTransmit ( IfxStdIf_DPipe * stdIf )

handler called on transmit event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 338 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_print()

IFX_EXTERN void IfxStdIf_DPipe_print | ( | IfxStdIf_DPipe * | stdIf,
 |  | pchar | format,
 |  |  | ...
 | ) |  |

Definition at line 33 of file IfxStdIf_DPipe.c.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), and IfxStdIf_Pos_printStatus().

◆ IfxStdIf_DPipe_read()

IFX_INLINE boolean IfxStdIf_DPipe_read | ( | IfxStdIf_DPipe * | stdIf,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Read data from the IfxStdIf_DPipe object.

Initially the parameter 'count' specifies count of data to read. After execution the data pointed by 'count' specifies the data actually read.

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be read
FALSE | Returns FALSE if not all the items could be read

Definition at line 250 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Shell_process().

◆ IfxStdIf_DPipe_resetSendCount()

IFX_INLINE void IfxStdIf_DPipe_resetSendCount ( IfxStdIf_DPipe * stdIf )

Reset the sendCount counter.

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 370 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_write()

IFX_INLINE boolean IfxStdIf_DPipe_write | ( | IfxStdIf_DPipe * | stdIf,
 |  | void * | data,
 |  | Ifx_SizeT * | count,
 |  | Ifx_TickTime | timeout
 | ) |  |

Write binary data into the IfxStdIf_DPipe.

Initially the parameter 'count' specifies count of data to write. After execution the data pointed by 'count' specifies the data actually written

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be written
FALSE | Returns FALSE if not all the items could be written

Definition at line 242 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), and IfxStdIf_DPipe_print().


iLLD_TC26B: Standard interface: Position interface

Functions
Standard interface: Position interface
Service software » Standard interface
Collaboration diagram for Standard interface: Position interface:

Functions

IFX_INLINE void | IfxStdIf_Pos_onZeroIrq (IfxStdIf_Pos *stdIf)
Handles the zero interrupt. More...
IFX_INLINE float32 | IfxStdIf_Pos_getAbsolutePosition (IfxStdIf_Pos *stdIf)
Return the position, inclusive turns. More...
IFX_INLINE IfxStdIf_Pos_Status | IfxStdIf_Pos_getFault (IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521 More...
IFX_INLINE sint32 | IfxStdIf_Pos_getOffset (IfxStdIf_Pos *stdIf)
Return the raw position sensor offset. More...
IFX_INLINE float32 | IfxStdIf_Pos_getPosition (IfxStdIf_Pos *stdIf)
Return the position. More...
IFX_INLINE IfxStdIf_Pos_Dir | IfxStdIf_Pos_getDirection (IfxStdIf_Pos *stdIf)
Return the direction. More...
IFX_INLINE uint16 | IfxStdIf_Pos_getPeriodPerRotation (IfxStdIf_Pos *stdIf)
Return the period per rotation setting. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getRawPosition (IfxStdIf_Pos *stdIf)
Return the raw position in ticks. More...
IFX_INLINE float32 | IfxStdIf_Pos_getRefreshPeriod (IfxStdIf_Pos *stdIf)
Get the update period. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getResolution (IfxStdIf_Pos *stdIf)
Get the resolution. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getTurn (IfxStdIf_Pos *stdIf)
Return position in turn. More...
IFX_INLINE IfxStdIf_Pos_SensorType | IfxStdIf_Pos_getSensorType (IfxStdIf_Pos *stdIf)
Get the sensor type. More...
IFX_INLINE float32 | IfxStdIf_Pos_getSpeed (IfxStdIf_Pos *stdIf)
Return the speed. More...
IFX_INLINE boolean | IfxStdIf_Pos_isFault (IfxStdIf_Pos *stdIf)
IFX_INLINE void | IfxStdIf_Pos_onEventA (IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
IFX_INLINE void | IfxStdIf_Pos_update (IfxStdIf_Pos *stdIf)
Refresh the status. More...
IFX_INLINE void | IfxStdIf_Pos_reset (IfxStdIf_Pos *stdIf)
Reset the driver. More...
IFX_INLINE void | IfxStdIf_Pos_resetFaults (IfxStdIf_Pos *stdIf)
Reset the driver fault. More...
IFX_INLINE void | IfxStdIf_Pos_setOffset (IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset. More...
IFX_INLINE void | IfxStdIf_Pos_setPosition (IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRawPosition (IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setSpeed (IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRefreshPeriod (IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period. More...

Detailed Description

The standard interface position interface (IfxStdIf_Pos) abstract the hardware used for position interface feature like encoder, hall, resolver, ... It provide, after proper initialization an hardware Independent way to interact with the position sensor like getting position, speed, direction, ...

The figure below shows the standard position interface.

Standard position interface

This interface defines the following features:

Function Documentation

◆ IfxStdIf_Pos_getAbsolutePosition()

IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition ( IfxStdIf_Pos * stdIf )

Return the position, inclusive turns.

Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors. For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position inclusive turns in rad
Parameters
stdIf Standard interface pointer

Definition at line 324 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getDirection()

IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection ( IfxStdIf_Pos * stdIf )

Return the direction.

Return the sensor direction.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the direction
Parameters
stdIf Standard interface pointer

Definition at line 360 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getFault()

IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault ( IfxStdIf_Pos * stdIf )

Return the sensor status. MCMETILLD-521

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor status MCMETILLD-521
Parameters
stdIf Standard interface pointer

Definition at line 333 of file IfxStdIf_Pos.h.

Referenced by IfxStdIf_Pos_isFault(), and IfxStdIf_Pos_printStatus().

◆ IfxStdIf_Pos_getOffset()

IFX_INLINE sint32 IfxStdIf_Pos_getOffset ( IfxStdIf_Pos * stdIf )

Return the raw position sensor offset.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position sensor offset sensor in ticks
Parameters
stdIf Standard interface pointer

Definition at line 342 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getPeriodPerRotation()

IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation ( IfxStdIf_Pos * stdIf )

Return the period per rotation setting.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the period per rotation setting
Parameters
stdIf Standard interface pointer

Definition at line 369 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getPosition()

IFX_INLINE float32 IfxStdIf_Pos_getPosition ( IfxStdIf_Pos * stdIf )

Return the position.

Return the sensor position in rad for rotating sensor or in m for linear sensors. For rotating sensor, the position is always between 0 and 2*IFX_PI.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position in rad or m
Parameters
stdIf Standard interface pointer

Definition at line 351 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getRawPosition()

IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition ( IfxStdIf_Pos * stdIf )

Return the raw position in ticks.

Return the sensor raw position in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position in ticks
Parameters
stdIf Standard interface pointer

Definition at line 378 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getRefreshPeriod()

IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod ( IfxStdIf_Pos * stdIf )

Get the update period.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the update period in s
Parameters
stdIf Standard interface pointer

Definition at line 387 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getResolution()

IFX_INLINE sint32 IfxStdIf_Pos_getResolution ( IfxStdIf_Pos * stdIf )

Get the resolution.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the resolution
Parameters
stdIf Standard interface pointer

Definition at line 396 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getSensorType()

IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType ( IfxStdIf_Pos * stdIf )

Get the sensor type.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor type
Parameters
stdIf Standard interface pointer

Definition at line 414 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getSpeed()

IFX_INLINE float32 IfxStdIf_Pos_getSpeed ( IfxStdIf_Pos * stdIf )

Return the speed.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the speed in rad/s or m/s
Parameters
stdIf Standard interface pointer

Definition at line 423 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_getTurn()

IFX_INLINE sint32 IfxStdIf_Pos_getTurn ( IfxStdIf_Pos * stdIf )

Return position in turn.

Parameters
stdIf Pointer to the interface driver object
Returns
Return position in turn
Parameters
stdIf Standard interface pointer

Definition at line 405 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_isFault()

IFX_INLINE boolean IfxStdIf_Pos_isFault ( IfxStdIf_Pos * stdIf )

Check whether the sensor is faulty

Parameters
stdIf Standard interface pointer

Definition at line 432 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_onEventA()

IFX_INLINE void IfxStdIf_Pos_onEventA ( IfxStdIf_Pos * stdIf )

Handles the A sensor event Event A is a sensor defined event. it is optional.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 441 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_onZeroIrq()

IFX_INLINE void IfxStdIf_Pos_onZeroIrq ( IfxStdIf_Pos * stdIf )

Handles the zero interrupt.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 315 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_reset()

IFX_INLINE void IfxStdIf_Pos_reset ( IfxStdIf_Pos * stdIf )

Reset the driver.

Clear faults, reset speed and position to 0

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 459 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_resetFaults()

IFX_INLINE void IfxStdIf_Pos_resetFaults ( IfxStdIf_Pos * stdIf )

Reset the driver fault.

Clear faults

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 468 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setOffset()

IFX_INLINE void IfxStdIf_Pos_setOffset | ( | IfxStdIf_Pos * | stdIf,
 |  | sint32 | offset
 | ) |  |

Set the sensor offset.

Parameters
stdIf | Pointer to the interface driver object
offset | Offset in sensor ticks
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 477 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setPosition()

IFX_INLINE void IfxStdIf_Pos_setPosition | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | position
 | ) |  |

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor rad
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 486 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setRawPosition()

IFX_INLINE void IfxStdIf_Pos_setRawPosition | ( | IfxStdIf_Pos * | stdIf,
 |  | sint32 | position
 | ) |  |

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor ticks
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 495 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setRefreshPeriod()

IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | updatePeriod
 | ) |  |

Set the update period.

Parameters
stdIf | Pointer to the interface driver object
updatePeriod | Refresh period in s
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 513 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_setSpeed()

IFX_INLINE void IfxStdIf_Pos_setSpeed | ( | IfxStdIf_Pos * | stdIf,
 |  | float32 | speed
 | ) |  |

Set the sensor speed (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
speed | speed in rad/s
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 504 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_update()

IFX_INLINE void IfxStdIf_Pos_update ( IfxStdIf_Pos * stdIf )

Refresh the status.

Update the stdIf state like speed, position, status, taking into account the updatePeriod

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 450 of file IfxStdIf_Pos.h.


iLLD_TC26B: Standard interface: Multi-channels, dual-complementary PWM interface

Functions
Standard interface: Multi-channels, dual-complementary PWM interface
Service software » Standard interface
Collaboration diagram for Standard interface: Multi-channels, dual-complementary PWM interface:

Functions

IFX_INLINE boolean | IfxStdIf_PwmHl_setDeadtime (IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtime (IfxStdIf_PwmHl *stdIf)
Return the dead time in s. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMinPulse (IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getMinPulse (IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s. More...
IFX_INLINE Ifx_Pwm_Mode | IfxStdIf_PwmHl_getMode (IfxStdIf_PwmHl *stdIf)
Return the PWM mode. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMode (IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTime (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTimeAndShift (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
IFX_INLINE void | IfxStdIf_PwmHl_setPulse (IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
IFX_INLINE void | IfxStdIf_PwmHl_setupChannels (IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_INLINE IfxStdIf_Timer * | IfxStdIf_PwmHl_getTimer (IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface. More...

Detailed Description

The standard interface pwm high/low (PwmHl) abstract the hardware used for pwm feature. It provide, after proper initialization an hardware independant way to interact with the PWM functionallity like setting duty cycles, dead time,timer functionalities, ...

The figure below shows the standard Multi-channels, dual-complementary PWM interface.

Standard Multi-channels, dual-complementary PWM interface

This PWM interface provides multiple dual-complementary PWM channels. Each dual-complementary PWM channel is made of two PWM channels, a top channel CCx and a bottom channel COUTx. The interface implements the Standard interface: Timer.

This interface defines the following features:

  • Configurable duty cycle from 0% to 100%
  • Adjustable dead-time between top and bottom channels
  • Center aligned, left aligned, right aligned PWM
  • Optional minimal pulse cancellation
  • Optional emergency stop
  • Configurable signal active state for top and bottom PWM
  • Configurable output ports
  • Inherit the features from library_srvsw_stdif_timer

Example of signal generation in center aligned mode:

Standard Multi-channels, dual-complementary PWM interface - Center aligned mode

Function Documentation

◆ IfxStdIf_PwmHl_getDeadtime()

IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime ( IfxStdIf_PwmHl * stdIf )

Return the dead time in s.

It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the deadtime in second
Parameters
stdIf Standard interface pointer

Definition at line 205 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getMinPulse()

IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse ( IfxStdIf_PwmHl * stdIf )

Return the minimum pulse time in s.

It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the minimum pulse time in second
Parameters
stdIf Standard interface pointer

Definition at line 223 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getMode()

IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode ( IfxStdIf_PwmHl * stdIf )

Return the PWM mode.

It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the pwm mode
Parameters
stdIf Standard interface pointer

Definition at line 232 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_getTimer()

IFX_INLINE IfxStdIf_Timer* IfxStdIf_PwmHl_getTimer ( IfxStdIf_PwmHl * stdIf )

Return the timer standard interface used by the IfxStdIf_PwmHl standard interface.

Parameters
stdIf Standard interface pointer
Returns
Returns the pointer to the IfxStdIf_Timer object

Definition at line 287 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setDeadtime()

IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 | deadtime
 | ) |  |

Set the dead time in s.

Parameters
stdIf | Pointer to the interface driver object
deadtime | deadtime in second
Return values
TRUE | In case of success
FALSE | In case of failure
Parameters
stdIf Standard interface pointer

Definition at line 196 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setMinPulse()

IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 | minPulse
 | ) |  |

Set the minimum pulse time in s.

Parameters
stdIf | Pointer to the interface driver object
minPulse | minimal pulse in second
Return values
TRUE | In case of success
FALSE | In case of failure
Parameters
stdIf Standard interface pointer

Definition at line 214 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setMode()

IFX_INLINE boolean IfxStdIf_PwmHl_setMode | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_Pwm_Mode | mode
 | ) |  |

Set the pwm mode.

Parameters
stdIf | Pointer to the interface driver object
mode | PWM mode
Return values
TRUE | In case of success
FALSE | In case of failure (feature not supported)
Parameters
stdIf Standard interface pointer

Definition at line 241 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setOnTime()

IFX_INLINE void IfxStdIf_PwmHl_setOnTime | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_TimerValue * | tOn
 | ) |  |

Set the pwm ON time.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 250 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setOnTimeAndShift()

IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift | ( | IfxStdIf_PwmHl * | stdIf,
 |  | Ifx_TimerValue * | tOn,
 |  | Ifx_TimerValue * | shift
 | ) |  |

Set the pwm ON time and shift value.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
shift | Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 259 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setPulse()

IFX_INLINE void IfxStdIf_PwmHl_setPulse | ( | IfxStdIf_PwmHl * | stdIf,
 |  | float32 * | tOn,
 |  | float32 * | offset
 | ) |  |

Set the pwm pulse of all switched independently.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 268 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_setupChannels()

IFX_INLINE void IfxStdIf_PwmHl_setupChannels | ( | IfxStdIf_PwmHl * | stdIf,
 |  | boolean * | activeCh,
 |  | boolean * | stuckSt
 | ) |  |

Set channels which are generating PWM or in "stuck-at" state.

Parameters
stdIf | Pointer to the interface driver object
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom

Definition at line 276 of file IfxStdIf_PwmHl.h.


iLLD_TC26B: Standard interface: Timer

Functions
Standard interface: Timer
Service software » Standard interface
Collaboration diagram for Standard interface: Timer:

Functions

IFX_INLINE float32 | IfxStdIf_Timer_getFrequency (IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getPeriod (IfxStdIf_Timer *stdIf)
Return the timer period in ticks. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getTrigger (IfxStdIf_Timer *stdIf)
Return the timer trigger point. More...
IFX_INLINE float32 | IfxStdIf_Timer_getResolution (IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds. More...
IFX_INLINE boolean | IfxStdIf_Timer_setFrequency (IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_updateInputFrequency (IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
IFX_INLINE void | IfxStdIf_Timer_applyUpdate (IfxStdIf_Timer *stdIf)
Apply requested updates. More...
IFX_INLINE void | IfxStdIf_Timer_disableUpdate (IfxStdIf_Timer *stdIf)
Disable updates. More...
IFX_INLINE float32 | IfxStdIf_Timer_getInputFrequency (IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_run (IfxStdIf_Timer *stdIf)
Immediately start the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_setPeriod (IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period. More...
IFX_INLINE void | IfxStdIf_Timer_setSingleMode (IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period. More...
IFX_INLINE void | IfxStdIf_Timer_setTrigger (IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
IFX_INLINE void | IfxStdIf_Timer_stop (IfxStdIf_Timer *stdIf)
Immediately stops the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTimerIrq (IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTriggerIrq (IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it. More...
IFX_INLINE float32 | IfxStdIf_Timer_tickToS (float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_sToTick (float32 clockFreq, float32 seconds)
Convert seconds to timer ticks. More...
IFX_INLINE float32 | IfxStdIf_Timer_getPeriodSecond (IfxStdIf_Timer *stdIf)
Return the timer period in second. More...

Detailed Description

The standard interface timer (Timer) abstract the hardware used for timer feature. It provide, after proper initialization an hardware independant way to interact with the timer functionallity like setting period, trigger points, ...

The figure below shows the standard timer interface.

Standard timer interface

This interface defines the following features:

  • Timer with configurable frequency
  • Configurable counting direction
  • Optional interrupt on timer event with configurable service request provider and priority
  • Optional trigger signal with:
    • Optional interrupt on trigger event with configurable service request provider and priority
    • Configurable trigger point
    • Configurable trigger edge
    • trigger signal can be internal only or forwarded to a port pin

Function Documentation

◆ IfxStdIf_Timer_ackTimerIrq()

IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq ( IfxStdIf_Timer * stdIf )

Return the timer interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer interrupt flag
Parameters
stdIf Standard interface pointer

Definition at line 398 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_ackTriggerIrq()

IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq ( IfxStdIf_Timer * stdIf )

Return the trigger interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the trigger interrupt flag
Parameters
stdIf Standard interface pointer

Definition at line 407 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_applyUpdate()

IFX_INLINE void IfxStdIf_Timer_applyUpdate ( IfxStdIf_Timer * stdIf )

Apply requested updates.

Such requested update are calls to:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()

It is important to note, that only one call to Timer_applyUpdate() is allowed within one timer period!!! In order to ensure correct update synchronisation, disableUpdate() should have been called previously.

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 326 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_disableUpdate()

IFX_INLINE void IfxStdIf_Timer_disableUpdate ( IfxStdIf_Timer * stdIf )

Disable updates.

The following API action will not be taken in account before applyUpdate is called:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()
Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 335 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getFrequency()

IFX_INLINE float32 IfxStdIf_Timer_getFrequency ( IfxStdIf_Timer * stdIf )

Return the timer frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer frequency in Hz
Parameters
stdIf Standard interface pointer

Definition at line 272 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getInputFrequency()

IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency ( IfxStdIf_Timer * stdIf )

Return the timer input frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer input frequency in Hz
Parameters
stdIf Standard interface pointer

Definition at line 344 of file IfxStdIf_Timer.h.

Referenced by IfxStdIf_Timer_getPeriodSecond().

◆ IfxStdIf_Timer_getPeriod()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod ( IfxStdIf_Timer * stdIf )

Return the timer period in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer period in ticks
Parameters
stdIf Standard interface pointer

Definition at line 281 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getPeriodSecond()

IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond ( IfxStdIf_Timer * stdIf )

Return the timer period in second.

Parameters
stdIf Pointer to the interface driver object

Definition at line 438 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getResolution()

IFX_INLINE float32 IfxStdIf_Timer_getResolution ( IfxStdIf_Timer * stdIf )

Return the timer resolution in seconds.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer resolution in seconds
Parameters
stdIf Standard interface pointer

Definition at line 299 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_getTrigger()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger ( IfxStdIf_Timer * stdIf )

Return the timer trigger point.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer timer point
Parameters
stdIf Standard interface pointer

Definition at line 290 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_run()

IFX_INLINE void IfxStdIf_Timer_run ( IfxStdIf_Timer * stdIf )

Immediately start the timer.

Please note that other mechanism may avoid the timer to tick, such as when the global (input) clock to the timer block is inactive.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 353 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setFrequency()

IFX_INLINE boolean IfxStdIf_Timer_setFrequency | ( | IfxStdIf_Timer * | stdIf,
 |  | float32 | frequency
 | ) |  |

Set the timer frequency in Hz.

Parameters
stdIf | Pointer to the interface driver object
frequency | Requested timer frequency in Hz
Return values
TRUE | The requested frequency could be set
FALSE | The requested frequency is out of range
Parameters
stdIf Standard interface pointer

Definition at line 308 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setPeriod()

IFX_INLINE boolean IfxStdIf_Timer_setPeriod | ( | IfxStdIf_Timer * | stdIf,
 |  | Ifx_TimerValue | period
 | ) |  |

Set the timer period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
period | Period value in ticks
Return values
TRUE | The requested period could be set
FALSE | The requested period is out of range
Parameters
stdIf Standard interface pointer

Definition at line 362 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setSingleMode()

IFX_INLINE void IfxStdIf_Timer_setSingleMode | ( | IfxStdIf_Timer * | stdIf,
 |  | boolean | enabled
 | ) |  |

Stop timer at the end of the period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
enabled | If TRUE, enable the single mode, else disable the single mode (continuous mode)
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 371 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_setTrigger()

IFX_INLINE void IfxStdIf_Timer_setTrigger | ( | IfxStdIf_Timer * | stdIf,
 |  | Ifx_TimerValue | triggerPoint
 | ) |  |

Set trigger point.

See also
Timer_OutputEvent for the definition of the output level. Active state is defined by Timer_Config::outputActiveState.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
triggerPoint | Trigger point in ticks from the period start.
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 380 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_stop()

IFX_INLINE void IfxStdIf_Timer_stop ( IfxStdIf_Timer * stdIf )

Immediately stops the timer.

Parameters
stdIf Pointer to the interface driver object
Returns
none
Parameters
stdIf Standard interface pointer

Definition at line 389 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_sToTick()

IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick | ( | float32 | clockFreq,
 |  | float32 | seconds
 | ) |  |

Convert seconds to timer ticks.

Parameters
clockFreq | Timer clock frequency
seconds | time value in seconds to be converted
Returns
Return the converted time in timer ticks

Definition at line 429 of file IfxStdIf_Timer.h.

Referenced by IfxCcu6_PwmHl_setDeadtime(), IfxCcu6_PwmHl_setMinPulse(), IfxCcu6_TimerWithTrigger_setFrequency(), IfxGtm_Atom_PwmHl_setDeadtime(), IfxGtm_Atom_PwmHl_setMinPulse(), IfxGtm_Atom_PwmHl_updatePulse(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_setFrequency(), IfxGtm_Tom_PwmHl_setDeadtime(), IfxGtm_Tom_PwmHl_setMinPulse(), IfxGtm_Tom_PwmHl_updatePulse(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_setFrequency(), and IfxStm_Timer_setFrequency().

◆ IfxStdIf_Timer_tickToS()

IFX_INLINE float32 IfxStdIf_Timer_tickToS | ( | float32 | clockFreq,
 |  | Ifx_TimerValue | ticks
 | ) |  |

Convert timer ticks to seconds.

Parameters
clockFreq | Timer clock frequency
ticks | time value in ticks to be converted
Returns
Return the converted time in s

Definition at line 418 of file IfxStdIf_Timer.h.

Referenced by IfxCcu6_PwmHl_getDeadtime(), IfxCcu6_PwmHl_getMinPulse(), IfxCcu6_TimerWithTrigger_getFrequency(), IfxGtm_Atom_PwmHl_getDeadtime(), IfxGtm_Atom_PwmHl_getMinPulse(), IfxGtm_Atom_Timer_getFrequency(), IfxGtm_Tom_PwmHl_getDeadtime(), IfxGtm_Tom_PwmHl_getMinPulse(), IfxGtm_Tom_Timer_getFrequency(), IfxStdIf_Timer_getPeriodSecond(), and IfxStm_Timer_getFrequency().

◆ IfxStdIf_Timer_updateInputFrequency()

IFX_INLINE void IfxStdIf_Timer_updateInputFrequency ( IfxStdIf_Timer * stdIf )

Indicates the stdIf that the imput frequency has changed and that it should be taken in account.

Parameters
stdIf Pointer to the interface driver object
Returns
None
Parameters
stdIf Standard interface pointer

Definition at line 317 of file IfxStdIf_Timer.h.


iLLD_TC26B: System Engineering

Modules
System Engineering
Service software
Collaboration diagram for System Engineering:

Modules

Board support package
Communication
General
Math
Time

Detailed Description


iLLD_TC26B: Board support package

Modules
Board support package
Service software » System Engineering
Collaboration diagram for Board support package:

Modules

Assertion
Board support package

Detailed Description


iLLD_TC26B: Assertion

Files | Macros | Functions
Assertion
Service software » System Engineering » Board support package
Collaboration diagram for Assertion:

Files

file Assert.h
Assert functions.

Macros

#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_USE_BREAKPOINT (0)
If set to 1, the assert function will break the execution (breakpoint) More...
#define | IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
defines the assertion default level More...
#define | Ifx_Assert_setStandardIo(standardIo) ((void)0)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE. More...
#define | IFX_ASSERT(level, expr) ((void)0)
Assertion function (assert) More...
#define | IFX_VALIDATE(level, expr) (expr)
Assertion function (validate) More...

Functions

IFX_EXTERN void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
IFX_EXTERN boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Detailed Description

This module implements assertion functions.

Global configuration settings (Ifx_Cfg.h) :

  • IFX_CFG_ASSERT_STDIO: if IFX_CFG_ASSERT_STDIO=1, the assertion is output to the io defined by Ifx_Assert_setStandardIo (). if IFX_CFG_ASSERT_STDIO=0, no text output is done. Default is IFX_CFG_ASSERT_STDIO=0
  • IFX_CFG_ASSERT_USE_BREAKPOINT: if IFX_CFG_ASSERT_USE_BREAKPOINT=1, a debug instruction is inserted in case an assertion occurs with a level of IFX_VERBOSE_LEVEL_FAILURE or IFX_VERBOSE_LEVEL_ERROR. If IFX_CFG_ASSERT_USE_BREAKPOINT=0 then no debug instruction is inserted. Default is IFX_CFG_ASSERT_USE_BREAKPOINT=0.
  • IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT: Set the assertion limit, assertion with a level below or equal to the limit are taken in account, other are ignored. range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG] Default is IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT=IFX_VERBOSE_LEVEL_INFO.

Do not include this file but use # include "_Utilities/Ifx_Assert.h" instead

Macro Definition Documentation

◆ IFX_ASSERT

#define IFX_ASSERT | ( | level,
 |  | expr
 | ) | ((void)0)

Assertion function (assert)

If expr is FALSE, then an assertion message is displayed. The message indicates the assertion level, the file, line and function where the assertion occurred, and also display expr as text. In case the debug break point is enabled then a debug instruction will also be inserted so that the debugger stops

If expr is true, nothing is additional done.

The expr expression is ignored (code disabled) in case the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT is IFX_VERBOSE_LEVEL_OFF.

The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.

Parameters
level | level of the assertion, range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG]
expr | expression to be tested. If FALSE the assertion is executed else nothing is done
Returns
void

Definition at line 156 of file Assert.h.

◆ Ifx_Assert_setStandardIo

#define Ifx_Assert_setStandardIo ( standardIo ) ((void)0)

Set the standard output used for IFX_ASSERT and IFX_VALIDATE.

For example the standard IO could redirect the output to a serial interface, CAN interface, ...

Parameters
standardIo Specifies the standard output used

Enable only if (IFX_CFG_ASSERT_STDIO!=0)

Returns
None.

Definition at line 88 of file Assert.h.

◆ IFX_CFG_ASSERT_STDIO [1/2]

#define IFX_CFG_ASSERT_STDIO (0)

If set to 1, the assert message is send to the Assert_io interface.

Definition at line 126 of file Assert.h.

◆ IFX_CFG_ASSERT_STDIO [2/2]

#define IFX_CFG_ASSERT_STDIO (0)

If set to 1, the assert message is send to the Assert_io interface.

Definition at line 126 of file Assert.h.

◆ IFX_CFG_ASSERT_USE_BREAKPOINT

#define IFX_CFG_ASSERT_USE_BREAKPOINT (0)

If set to 1, the assert function will break the execution (breakpoint)

Definition at line 64 of file Assert.h.

◆ IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT

#define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)

defines the assertion default level

If not defined, the default assert level is set to IFX_VERBOSE_LEVEL_INFO

Definition at line 72 of file Assert.h.

◆ IFX_VALIDATE

#define IFX_VALIDATE | ( | level,
 |  | expr
 | ) | (expr)

Assertion function (validate)

If expr is FALSE, then an assertion message is displayed. The message indicates the assertion level, the file, line and function where the assertion occurred, and also display expr as text. In case the debug break point is enabled then a debug instruction will also be inserted so that the debugger stops.

IFX_VALIDATE differs from IFX_ASSERT in the way that the expr expression is evaluated whatever the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT.

The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.

Parameters
level | level of the assertion, range=[IFX_VERBOSE_LEVEL_OFF, IFX_VERBOSE_LEVEL_FAILURE, IFX_VERBOSE_LEVEL_ERROR, IFX_VERBOSE_LEVEL_WARNING, IFX_VERBOSE_LEVEL_INFO, IFX_VERBOSE_LEVEL_DEBUG]
expr | expression to be tested. If FALSE the assertion is executed else nothing is done
Returns
void

Definition at line 182 of file Assert.h.

Function Documentation

◆ Ifx_Assert_doLevel()

IFX_EXTERN void Ifx_Assert_doLevel | ( | uint8 | level,
 |  | pchar | __assertion,
 |  | pchar | __file,
 |  | unsigned int | __line,
 |  | pchar | __function
 | ) |  |

Definition at line 57 of file Assert.c.

◆ Ifx_Assert_doValidate()

IFX_EXTERN boolean Ifx_Assert_doValidate | ( | boolean | expr,
 |  | uint8 | level,
 |  | pchar | __assertion,
 |  | pchar | __file,
 |  | unsigned int | __line,
 |  | pchar | __function
 | ) |  |

Definition at line 80 of file Assert.c.


iLLD_TC26B: Assert.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Macros | Functions
Assert.h File Reference
Service software » System Engineering » Board support package » Assertion

Assert functions. More...

#include "_Utilities/Ifx_Assert.h"
Include dependency graph for Assert.h:

Go to the source code of this file.

Macros

#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_CFG_ASSERT_USE_BREAKPOINT (0)
If set to 1, the assert function will break the execution (breakpoint) More...
#define | IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
defines the assertion default level More...
#define | Ifx_Assert_setStandardIo(standardIo) ((void)0)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE. More...
#define | IFX_CFG_ASSERT_STDIO (0)
If set to 1, the assert message is send to the Assert_io interface. More...
#define | IFX_ASSERT(level, expr) ((void)0)
Assertion function (assert) More...
#define | IFX_VALIDATE(level, expr) (expr)
Assertion function (validate) More...

Functions

IFX_EXTERN void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
IFX_EXTERN boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:34 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Assert.h.


iLLD_TC26B: Board support package

Files
Board support package
Service software » System Engineering » Board support package
Collaboration diagram for Board support package:

Files

file | Bsp.c
Board support package.
file | Bsp.h
Board support package.

Interrupt APIs

IFX_INLINE boolean | areInterruptsEnabled (void)
Return the status of the global interrupts. More...
IFX_INLINE boolean | disableInterrupts (void)
Disable the global interrupts. More...
IFX_INLINE void | enableInterrupts (void)
enable the global interrupts More...
IFX_INLINE void | restoreInterrupts (boolean enabled)
Restore the state of the global interrupts. More...
IFX_INLINE void | forceDisableInterrupts (void)
Disable the global interrupts forcefully. More...

Time APIs

typedef void(* | WaitTimeFunction) (Ifx_TickTime timeout)
IFX_INLINE Ifx_TickTime | addTTime (Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result. More...
IFX_INLINE Ifx_TickTime | elapsed (Ifx_TickTime since)
Return the elapsed time in ticks. More...
IFX_INLINE Ifx_TickTime | getDeadLine (Ifx_TickTime timeout)
Return the time dead line. More...
IFX_INLINE Ifx_TickTime | getTimeout (Ifx_TickTime deadline)
Return the time until the dead line. More...
IFX_EXTERN void | initTime (void)
Initialize the time constants. More...
IFX_INLINE boolean | isDeadLine (Ifx_TickTime deadLine)
Return TRUE if the dead line is over. More...
IFX_INLINE Ifx_TickTime | now (void)
Return system timer value (critical section). More...
IFX_INLINE Ifx_TickTime | nowWithoutCriticalSection (void)
Return system timer value (without critical section). More...
IFX_INLINE boolean | poll (volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptEnd (Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptStart (boolean *interruptEnabled)
Disable the interrupt and return system timer value. More...
IFX_INLINE void | wait (Ifx_TickTime timeout)
Wait for a while. More...
IFX_EXTERN void | waitPoll (void)
Wait function. More...
IFX_EXTERN void | waitTime (Ifx_TickTime timeout)
Wait time function. More...
#define | TimeConst_0s ((Ifx_TickTime)0)
time constant equal to 1s More...
#define | TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])
time constant equal to 10ns More...
#define | TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])
time constant equal to 100ns More...
#define | TimeConst_1us (TimeConst[TIMER_INDEX_1US])
time constant equal to 1us More...
#define | TimeConst_10us (TimeConst[TIMER_INDEX_10US])
time constant equal to 10us More...
#define | TimeConst_100us (TimeConst[TIMER_INDEX_100US])
time constant equal to 100us More...
#define | TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])
time constant equal to 1ms More...
#define | TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])
time constant equal to 10ms More...
#define | TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])
time constant equal to 100ms More...
#define | TimeConst_1s (TimeConst[TIMER_INDEX_1S])
time constant equal to 1s More...
#define | TimeConst_10s (TimeConst[TIMER_INDEX_10S])
time constant equal to 10s More...
#define | TimeConst_100s (TimeConst[TIMER_INDEX_100S])
time constant equal to 100s More...

Detailed Description

This module implements the board support package

Macro Definition Documentation

◆ TimeConst_0s

#define TimeConst_0s ((Ifx_TickTime)0)

time constant equal to 1s

Definition at line 175 of file Bsp.h.

◆ TimeConst_100ms

#define TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])

time constant equal to 100ms

Definition at line 183 of file Bsp.h.

◆ TimeConst_100ns

#define TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])

time constant equal to 100ns

Definition at line 177 of file Bsp.h.

◆ TimeConst_100s

#define TimeConst_100s (TimeConst[TIMER_INDEX_100S])

time constant equal to 100s

Definition at line 186 of file Bsp.h.

◆ TimeConst_100us

#define TimeConst_100us (TimeConst[TIMER_INDEX_100US])

time constant equal to 100us

Definition at line 180 of file Bsp.h.

◆ TimeConst_10ms

#define TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])

time constant equal to 10ms

Definition at line 182 of file Bsp.h.

◆ TimeConst_10ns

#define TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])

time constant equal to 10ns

Definition at line 176 of file Bsp.h.

◆ TimeConst_10s

#define TimeConst_10s (TimeConst[TIMER_INDEX_10S])

time constant equal to 10s

Definition at line 185 of file Bsp.h.

◆ TimeConst_10us

#define TimeConst_10us (TimeConst[TIMER_INDEX_10US])

time constant equal to 10us

Definition at line 179 of file Bsp.h.

◆ TimeConst_1ms

#define TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])

time constant equal to 1ms

Definition at line 181 of file Bsp.h.

◆ TimeConst_1s

#define TimeConst_1s (TimeConst[TIMER_INDEX_1S])

time constant equal to 1s

Definition at line 184 of file Bsp.h.

Referenced by DateTime_get(), and DateTime_set().

◆ TimeConst_1us

#define TimeConst_1us (TimeConst[TIMER_INDEX_1US])

time constant equal to 1us

Definition at line 178 of file Bsp.h.

Typedef Documentation

◆ WaitTimeFunction

typedef void(* WaitTimeFunction) (Ifx_TickTime timeout)

Prototype for wait() functions

Definition at line 173 of file Bsp.h.

Function Documentation

◆ addTTime()

IFX_INLINE Ifx_TickTime addTTime | ( | Ifx_TickTime | a,
 |  | Ifx_TickTime | b
 | ) |  |

Add 2 Ifx_TickTime values and return the result.

Parameters
a | parameter a
b | parameter b
Returns
a + b. If either a or b is TIME_INFINITE, the result is TIME_INFINITE

Definition at line 237 of file Bsp.h.

◆ areInterruptsEnabled()

IFX_INLINE boolean areInterruptsEnabled ( void )

Return the status of the global interrupts.

Return values
TRUE | if the global interrupts are enabled.
FALSE | if the global interrupts are disabled.
See also
restoreInterrupts(), disableInterrupts()

Definition at line 75 of file Bsp.h.

◆ disableInterrupts()

IFX_INLINE boolean disableInterrupts ( void )

Disable the global interrupts.

Return values
TRUE | if the global interrupts were enabled before the call to the function.
FALSE | if the global interrupts are disabled before the call to the function.
See also
areInterruptsEnabled(), restoreInterrupts()

Definition at line 88 of file Bsp.h.

Referenced by now(), and timingNoInterruptStart().

◆ elapsed()

IFX_INLINE Ifx_TickTime elapsed ( Ifx_TickTime since )

Return the elapsed time in ticks.

Return the elapsed time between the current time and the time passed as parameter

Returns
Returns the elapsed time.

Definition at line 260 of file Bsp.h.

◆ enableInterrupts()

IFX_INLINE void enableInterrupts ( void )

enable the global interrupts

Definition at line 108 of file Bsp.h.

◆ forceDisableInterrupts()

IFX_INLINE void forceDisableInterrupts ( void )

Disable the global interrupts forcefully.

See also
areInterruptsEnabled(), restoreInterrupts()

Definition at line 99 of file Bsp.h.

◆ getDeadLine()

IFX_INLINE Ifx_TickTime getDeadLine ( Ifx_TickTime timeout )

Return the time dead line.

Parameters
timeout Specifies the dead line from now: Deadline = Now + Timeout
Returns
Return the time dead line.

Definition at line 272 of file Bsp.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_read(), Ifx_Fifo_write(), IfxAsclin_Asc_flushTx(), poll(), and wait().

◆ getTimeout()

IFX_INLINE Ifx_TickTime getTimeout ( Ifx_TickTime deadline )

Return the time until the dead line.

Parameters
deadline Specifies the dead line from now: Deadline = Now + Timeout
Returns
Return the time until the dead line.

Definition at line 295 of file Bsp.h.

◆ initTime()

IFX_EXTERN void initTime ( void )

Initialize the time constants.

Initialize the time constants TimeConst_0s, TimeConst_100ns, TimeConst_1us, TimeConst_10us, TimeConst_100us, TimeConst_1ms, TimeConst_10ms, TimeConst_100ms, TimeConst_1s, TimeConst_10s

Returns
None.

Definition at line 37 of file Bsp.c.

◆ isDeadLine()

IFX_INLINE boolean isDeadLine ( Ifx_TickTime deadLine )

Return TRUE if the dead line is over.

Parameters
deadLine Specifies the dead line.
Return values
TRUE | Returns TRUE if the dead line is over
FALSE | Returns FALSE if the dead line is not yet over

Definition at line 319 of file Bsp.h.

Referenced by Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), IfxAsclin_Asc_flushTx(), poll(), and wait().

◆ now()

IFX_INLINE Ifx_TickTime now ( void )

Return system timer value (critical section).

The function IfxStm_get() is called in a critical section, disabling the interrupts. The system timer value is limited to TIME_INFINITE.

Returns
Returns system timer value.

Definition at line 201 of file Bsp.h.

Referenced by DateTime_get(), DateTime_set(), elapsed(), getDeadLine(), getTimeout(), IfxAsclin_Asc_isrReceive(), IfxAsclin_Asc_isrTransmit(), IfxStm_getOffsetTimer(), and isDeadLine().

◆ nowWithoutCriticalSection()

IFX_INLINE Ifx_TickTime nowWithoutCriticalSection ( void )

Return system timer value (without critical section).

The function IfxStm_get() is called. The system timer value is limited to TIME_INFINITE.

Returns
Returns system timer value.

Definition at line 220 of file Bsp.h.

Referenced by timingNoInterruptEnd(), and timingNoInterruptStart().

◆ poll()

IFX_INLINE boolean poll | ( | volatile boolean * | test,
 |  | Ifx_TickTime | timeout
 | ) |  |

Poll a variable for a time.

Parameters
test | Specifies the variable to test.
timeout | Specifies the maximal time the variable will be tested
Return values
TRUE | Returns TRUE if the variable gets TRUE before the timeout elapse
FALSE | Returns FALSE if the variable is FALSE as the timeout elapse

Definition at line 344 of file Bsp.h.

◆ restoreInterrupts()

IFX_INLINE void restoreInterrupts ( boolean enabled )

Restore the state of the global interrupts.

Parameters
enabled if TRUE, re-enable the global interrupts, else do nothing.
Returns
None.
See also
areInterruptsEnabled(), disableInterrupts()

Definition at line 122 of file Bsp.h.

Referenced by now(), and timingNoInterruptEnd().

◆ timingNoInterruptEnd()

IFX_INLINE Ifx_TickTime timingNoInterruptEnd | ( | Ifx_TickTime | since,
 |  | boolean | interruptEnabled
 | ) |  |

Return the elapsed time in system timer ticks, and enable the interrupts.

The interrupts are enable by the function

Parameters
since | time returned by timingNoInterruptStart()
interruptEnabled | If TRUE, the interrupts will be enabled before the function exit. This parameter should be set to the value returned by timingNoInterruptStart()
Returns
Returns the elapsed time.
See also
timingNoInterruptStart()

Definition at line 366 of file Bsp.h.

◆ timingNoInterruptStart()

IFX_INLINE Ifx_TickTime timingNoInterruptStart ( boolean * interruptEnabled )

Disable the interrupt and return system timer value.

The interrupt remains disabled after the function call

Returns
Returns system timer value.
See also
timingNoInterruptEnd()

Definition at line 385 of file Bsp.h.

◆ wait()

IFX_INLINE void wait ( Ifx_TickTime timeout )

Wait for a while.

Parameters
timeout Specifies the waiting time
Returns
None.

Definition at line 399 of file Bsp.h.

Referenced by waitTime().

◆ waitPoll()

IFX_EXTERN void waitPoll ( void )

Wait function.

This is an empty function that just spend some time waiting.

Returns
None.

Definition at line 61 of file Bsp.c.

◆ waitTime()

IFX_EXTERN void waitTime ( Ifx_TickTime timeout )

Wait time function.

This is an empty function that that returns after the timeout elapsed. The minimal time spend in the function is guaranteed, but not the max time.

Parameters
timeout Specifies the time the function waits for before returning
Returns
None.

Definition at line 73 of file Bsp.c.

Referenced by IfxMtu_waitForMbistDone().


iLLD_TC26B: Bsp.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Functions | Variables
Bsp.c File Reference
Service software » System Engineering » Board support package » Board support package

Board support package. More...

#include "Bsp.h"
Include dependency graph for Bsp.c:

Go to the source code of this file.

Functions

void | initTime (void)
Initialize the time constants. More...
void | waitPoll (void)
Wait function. More...
void | waitTime (Ifx_TickTime timeout)
Wait time function. More...

Variables

Ifx_TickTime TimeConst [TIMER_COUNT]

Detailed Description

Board support package.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:34 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Bsp.c.

Variable Documentation

◆ TimeConst

Ifx_TickTime TimeConst[TIMER_COUNT]

Definition at line 28 of file Bsp.c.

Referenced by initTime().


iLLD_TC26B: Bsp.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Macros | Variables
Bsp.h File Reference
Service software » System Engineering » Board support package » Board support package

Board support package. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu.h"
#include "Port/Std/IfxPort.h"
#include "Src/Std/IfxSrc.h"
#include "Stm/Std/IfxStm.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for Bsp.h:

Go to the source code of this file.

Macros

#define | BSP_DEFAULT_TIMER (&MODULE_STM0)
#define | TIMER_COUNT (11)
#define | TIMER_INDEX_10NS (0)
#define | TIMER_INDEX_100NS (1)
#define | TIMER_INDEX_1US (2)
#define | TIMER_INDEX_10US (3)
#define | TIMER_INDEX_100US (4)
#define | TIMER_INDEX_1MS (5)
#define | TIMER_INDEX_10MS (6)
#define | TIMER_INDEX_100MS (7)
#define | TIMER_INDEX_1S (8)
#define | TIMER_INDEX_10S (9)
#define | TIMER_INDEX_100S (10)
#define | PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1
#define | Pin_setState(pin, mode) IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
#define | Pin_setMode(pin, mode) IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setDriver(pin, mode) IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))
#define | Pin_setStateHigh(pin) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)
#define | Pin_setStateLow(pin) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)
#define | Pin_getState(pin) IfxPort_getPinState((pin)->port, (pin)->pinIndex)
#define | Pin_setGroupModeOutput(pin, mask, mode, outputIdx) IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))
#define | Pin_setGroupModeInput(pin, mask, mode) IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))
#define | Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
#define | Pin_getGroupState(pin, mask) IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))
#define | Pin_enableEmgStop(pin) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)

Functions

Interrupt APIs
IFX_INLINE boolean | areInterruptsEnabled (void)
Return the status of the global interrupts. More...
IFX_INLINE boolean | disableInterrupts (void)
Disable the global interrupts. More...
IFX_INLINE void | enableInterrupts (void)
enable the global interrupts More...
IFX_INLINE void | restoreInterrupts (boolean enabled)
Restore the state of the global interrupts. More...
IFX_INLINE void | forceDisableInterrupts (void)
Disable the global interrupts forcefully. More...

Variables

IFX_EXTERN Ifx_TickTime TimeConst [TIMER_COUNT]

Time APIs

#define | TimeConst_0s ((Ifx_TickTime)0)
time constant equal to 1s More...
#define | TimeConst_10ns (TimeConst[TIMER_INDEX_10NS])
time constant equal to 10ns More...
#define | TimeConst_100ns (TimeConst[TIMER_INDEX_100NS])
time constant equal to 100ns More...
#define | TimeConst_1us (TimeConst[TIMER_INDEX_1US])
time constant equal to 1us More...
#define | TimeConst_10us (TimeConst[TIMER_INDEX_10US])
time constant equal to 10us More...
#define | TimeConst_100us (TimeConst[TIMER_INDEX_100US])
time constant equal to 100us More...
#define | TimeConst_1ms (TimeConst[TIMER_INDEX_1MS])
time constant equal to 1ms More...
#define | TimeConst_10ms (TimeConst[TIMER_INDEX_10MS])
time constant equal to 10ms More...
#define | TimeConst_100ms (TimeConst[TIMER_INDEX_100MS])
time constant equal to 100ms More...
#define | TimeConst_1s (TimeConst[TIMER_INDEX_1S])
time constant equal to 1s More...
#define | TimeConst_10s (TimeConst[TIMER_INDEX_10S])
time constant equal to 10s More...
#define | TimeConst_100s (TimeConst[TIMER_INDEX_100S])
time constant equal to 100s More...
typedef void(* | WaitTimeFunction) (Ifx_TickTime timeout)
IFX_INLINE Ifx_TickTime | addTTime (Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result. More...
IFX_INLINE Ifx_TickTime | elapsed (Ifx_TickTime since)
Return the elapsed time in ticks. More...
IFX_INLINE Ifx_TickTime | getDeadLine (Ifx_TickTime timeout)
Return the time dead line. More...
IFX_INLINE Ifx_TickTime | getTimeout (Ifx_TickTime deadline)
Return the time until the dead line. More...
IFX_EXTERN void | initTime (void)
Initialize the time constants. More...
IFX_INLINE boolean | isDeadLine (Ifx_TickTime deadLine)
Return TRUE if the dead line is over. More...
IFX_INLINE Ifx_TickTime | now (void)
Return system timer value (critical section). More...
IFX_INLINE Ifx_TickTime | nowWithoutCriticalSection (void)
Return system timer value (without critical section). More...
IFX_INLINE boolean | poll (volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptEnd (Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts. More...
IFX_INLINE Ifx_TickTime | timingNoInterruptStart (boolean *interruptEnabled)
Disable the interrupt and return system timer value. More...
IFX_INLINE void | wait (Ifx_TickTime timeout)
Wait for a while. More...
IFX_EXTERN void | waitPoll (void)
Wait function. More...
IFX_EXTERN void | waitTime (Ifx_TickTime timeout)
Wait time function. More...

Detailed Description

Board support package.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:35 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Bsp.h.

Macro Definition Documentation

◆ BSP_DEFAULT_TIMER

#define BSP_DEFAULT_TIMER (&MODULE_STM0)

Defined the default timer used

Definition at line 45 of file Bsp.h.

Referenced by initTime(), now(), and nowWithoutCriticalSection().

◆ PIN_DRIVER_STRONG_SHARP

#define PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1

Definition at line 408 of file Bsp.h.

◆ Pin_enableEmgStop

#define Pin_enableEmgStop ( pin ) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)

Definition at line 420 of file Bsp.h.

◆ Pin_getGroupState

#define Pin_getGroupState | ( | pin,
 |  | mask
 | ) | IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))

Definition at line 419 of file Bsp.h.

◆ Pin_getState

#define Pin_getState ( pin ) IfxPort_getPinState((pin)->port, (pin)->pinIndex)

Definition at line 415 of file Bsp.h.

◆ Pin_setDriver

#define Pin_setDriver | ( | pin,
 |  | mode
 | ) | IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))

Definition at line 412 of file Bsp.h.

◆ Pin_setGroupModeInput

#define Pin_setGroupModeInput | ( | pin,
 |  | mask,
 |  | mode
 | ) | IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))

Definition at line 417 of file Bsp.h.

◆ Pin_setGroupModeOutput

#define Pin_setGroupModeOutput | ( | pin,
 |  | mask,
 |  | mode,
 |  | outputIdx
 | ) | IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))

Definition at line 416 of file Bsp.h.

◆ Pin_setGroupState [1/2]

#define Pin_setGroupState | ( | pin,
 |  | mask,
 |  | data
 | ) | IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))

Definition at line 418 of file Bsp.h.

◆ Pin_setGroupState [2/2]

#define Pin_setGroupState | ( | pin,
 |  | mask,
 |  | data
 | ) | IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))

Definition at line 418 of file Bsp.h.

◆ Pin_setMode

#define Pin_setMode | ( | pin,
 |  | mode
 | ) | IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))

Definition at line 411 of file Bsp.h.

◆ Pin_setState

#define Pin_setState | ( | pin,
 |  | mode
 | ) | IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))

Definition at line 409 of file Bsp.h.

◆ Pin_setStateHigh

#define Pin_setStateHigh ( pin ) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)

Definition at line 413 of file Bsp.h.

◆ Pin_setStateLow

#define Pin_setStateLow ( pin ) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)

Definition at line 414 of file Bsp.h.

◆ TIMER_COUNT

#define TIMER_COUNT (11)

Definition at line 131 of file Bsp.h.

◆ TIMER_INDEX_100MS

#define TIMER_INDEX_100MS (7)

Definition at line 139 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_100NS

#define TIMER_INDEX_100NS (1)

Definition at line 133 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_100S

#define TIMER_INDEX_100S (10)

Definition at line 142 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_100US

#define TIMER_INDEX_100US (4)

Definition at line 136 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_10MS

#define TIMER_INDEX_10MS (6)

Definition at line 138 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_10NS

#define TIMER_INDEX_10NS (0)

Definition at line 132 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_10S

#define TIMER_INDEX_10S (9)

Definition at line 141 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_10US

#define TIMER_INDEX_10US (3)

Definition at line 135 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_1MS

#define TIMER_INDEX_1MS (5)

Definition at line 137 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_1S

#define TIMER_INDEX_1S (8)

Definition at line 140 of file Bsp.h.

Referenced by initTime().

◆ TIMER_INDEX_1US

#define TIMER_INDEX_1US (2)

Definition at line 134 of file Bsp.h.

Referenced by initTime().

Variable Documentation

◆ TimeConst

IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT]

Definition at line 148 of file Bsp.h.


iLLD_TC26B: Communication

Modules
Communication
Service software » System Engineering
Collaboration diagram for Communication:

Modules

Console
Shell

Detailed Description


iLLD_TC26B: Console

Macros | Functions
Console
Service software » System Engineering » Communication
Collaboration diagram for Console:

Macros

#define CONSOLE Ifx_g_console
Alias Ifx_g_console object (by value) More...

Functions

IFX_INLINE IfxStdIf_DPipe * | Ifx_Console_getIo (void)
Return pointer to the default console object. More...
IFX_EXTERN void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
IFX_EXTERN boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
IFX_EXTERN boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...
IFX_INLINE void | Ifx_Console_decrAlign (sint16 value)
Decrement the alignment/indentation using the given value. More...
IFX_INLINE void | Ifx_Console_incrAlign (sint16 value)
Increment the alignment/indentation using the given value. More...

Detailed Description

This module implements "Main Console" functions

Macro Definition Documentation

◆ CONSOLE

#define CONSOLE Ifx_g_console

Alias Ifx_g_console object (by value)

Definition at line 54 of file Ifx_Console.h.

Function Documentation

◆ Ifx_Console_decrAlign()

IFX_INLINE void Ifx_Console_decrAlign ( sint16 value )

Decrement the alignment/indentation using the given value.

Parameters
value the increment. If value == 0, IFX_CFG_CONSOLE_INDENT_SIZE will be used.

Definition at line 76 of file Ifx_Console.h.

◆ Ifx_Console_getIo()

IFX_INLINE IfxStdIf_DPipe* Ifx_Console_getIo ( void )

Return pointer to the default console object.

User can override this function by defining new CONSOLE macro and this function externally, e.g. inside Ifx_Cfg.h file.

Definition at line 60 of file Ifx_Console.h.

◆ Ifx_Console_incrAlign()

IFX_INLINE void Ifx_Console_incrAlign ( sint16 value )

Increment the alignment/indentation using the given value.

Parameters
value the increment. If value == 0, IFX_CFG_CONSOLE_INDENT_SIZE will be used.

Definition at line 87 of file Ifx_Console.h.

◆ Ifx_Console_init()

IFX_EXTERN void Ifx_Console_init ( IfxStdIf_DPipe * standardIo )

Initialize the Ifx_g_console object.

Parameters
standardIo Pointer to the IfxStdIf_DPipe object used by the Ifx_g_console.

Definition at line 39 of file Ifx_Console.c.

◆ Ifx_Console_print()

IFX_EXTERN boolean Ifx_Console_print | ( | pchar | format,
 |  |  | ...
 | ) |  |

Print formatted string into Ifx_g_console.

Parameters
format printf-compatible formatted string.
Return values
TRUE | if the string is printed successfully
FALSE | if the function failed.

Definition at line 52 of file Ifx_Console.c.

◆ Ifx_Console_printAlign()

IFX_EXTERN boolean Ifx_Console_printAlign | ( | pchar | format,
 |  |  | ...
 | ) |  |

Print formatted string into Ifx_g_console. Indented with a number of spaces.

Parameters
format printf-compatible formatted string.
Return values
TRUE | if the string is printed successfully
FALSE | if the function failed.

Definition at line 81 of file Ifx_Console.c.


iLLD_TC26B: Shell

Files
Shell
Service software » System Engineering » Communication
Collaboration diagram for Shell:

Files

file Ifx_Shell.h
Shell functions.

Basic functionality

void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
IFX_EXTERN boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
IFX_EXTERN void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
IFX_EXTERN void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
IFX_EXTERN void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
IFX_EXTERN void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...

Parsing functions

IFX_EXTERN pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
IFX_EXTERN boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
IFX_EXTERN boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
IFX_EXTERN boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...

Command list functions

IFX_EXTERN const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
IFX_EXTERN boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
IFX_EXTERN boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
IFX_EXTERN void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...

Sub protocol functions

IFX_EXTERN boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
IFX_EXTERN boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...

Detailed Description

This module implements the Shell functions. It parses a command line and call the corresponding command execution. Multiple command list can be used in parallel.

Only full command match is accepted.

New feature / change:

  • Prefix can be defined for each command list
  • Help for a single command is displayed with "help <command>"
  • help for a command list is displayed with "help <listPrefix>"
  • command short cut is not allowed
  • command with identical start option "opt1 opt2" and "opt1 opt3" are accepted, and root to different handlers
  • Enhanced help info print

Help text xyntax:

  • /p indicates a parameter description, can be multi-line, lines must be separated with ENDL
  • /s Indicates a syntax help

Example of help list:

Ifx_Shell_Command Ifx_g_OsciShell_commands[] =
{
{IFX_OSCI_SHELL_PREFIX, " : Oscilloscope functions"
, NULL_PTR, NULL_PTR },
{"run", " : run the oscilloscope" ENDL
"/s run [single|auto|normal]"
, NULL_PTR, &Ifx_OsciShell_run },
{"stop", " : stop oscilloscope"
, NULL_PTR, &Ifx_OsciShell_stop },
{"trigger", " : trigger settings" ENDL
"/s trigger [force|single|level <value>|raising|falling|source <chNum>|interval <value>]" ENDL
"/p force: Force the trigger" ENDL
"/p single: Single the trigger" ENDL
"/p level <value>: Set trigger level to value" ENDL
"/p [raising|falling]: Set trigger to raising or falling edges" ENDL
"/p source <chNum>: Set trigger channel number" ENDL
"<chNum> can be obtained with 'channel' command" ENDL
"/p interval <value>: Set sampling interval to value"
, NULL_PTR, &Ifx_OsciShell_trigger },
{"status", " : display status"
, NULL_PTR, &Ifx_OsciShell_status },
{"channel", " : channel information" ENDL
"/s channel: Show the channels information" ENDL
"/s channel <ch> <sig>: Assign a signal to a channel"
, NULL_PTR, &Ifx_OsciShell_channel },
{"analyze", " : signal analysis of a ch" ENDL
"/s analyze <ch>: analyze the input channel <ch>"
, NULL_PTR, &Ifx_OsciShell_analyze },
{"simulate", " : simulate a signal" ENDL
"/s simulate <ch> <op> <wave> <freq> <ampl> <offs> <phase> : Simulate a signal generation" ENDL
"/p <ch> : {0 .. Channel count}" ENDL
"/p <op> : {add,sub,mul,clr}" ENDL
"/p <wave> : {sine,square}" ENDL
"/p <freq> : -INF .. INF" ENDL
"/p <offs> : -INF .. INF" ENDL
"/p <ampl> : -INF .. INF" ENDL
"/p <phase>: 0 .. 360 [degree]" ENDL
"/s simulate <ch> atan <ych> <xch>: Compute atan(ych/xch) and store in channel <ch>"
, NULL_PTR, &Ifx_OsciShell_simulate},
{"dump", " : dump values (all channels)" ENDL
"/s dump <ch> [hex]" ENDL
"/p <ch>: Dump the values of the channel <ch>" ENDL
"/p hex: If hex is specified, values will be in hexadecimal"
, NULL_PTR, &Ifx_OsciShell_dump },
IFX_SHELL_COMMAND_LIST_END,
};

To enable help command, include the below command in the main command list {"help", SHELL_HELP_DESCRIPTION_TEXT , &<Ifx_Shell>, &Ifx_Shell_showHelp, },

Function Documentation

◆ Ifx_Shell_bbProtocolStart()

IFX_EXTERN boolean Ifx_Shell_bbProtocolStart | ( | pchar | args,
 |  | void * | data,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Start the ShellBb protocol.

Parameters
args | The argument null-terminated string
data | Pointer to Ifx_Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 270 of file Ifx_Shell.c.

◆ Ifx_Shell_commandFind()

IFX_EXTERN const Ifx_Shell_Command* Ifx_Shell_commandFind | ( | Ifx_Shell_CommandListConst | commandList,
 |  | pchar | commandLine,
 |  | pchar * | args,
 |  | uint32 * | match
 | ) |  |

Find command in command List.

Parameters
commandList | Pointer to the first entry of an array of Ifx_Shell_Command
commandLine | Pointer to null-terminated string containings the command to search.
args | Pointer to the argument null-terminated string
match | Return the number of arguments that matches

Definition at line 928 of file Ifx_Shell.c.

Referenced by Ifx_Shell_commandListFind().

◆ Ifx_Shell_deinit()

IFX_EXTERN void Ifx_Shell_deinit ( Ifx_Shell * shell )

Deinitialise the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 631 of file Ifx_Shell.c.

◆ Ifx_Shell_disable()

IFX_EXTERN void Ifx_Shell_disable ( Ifx_Shell * shell )

Disable the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 1299 of file Ifx_Shell.c.

◆ Ifx_Shell_enable()

IFX_EXTERN void Ifx_Shell_enable ( Ifx_Shell * shell )

Clear the receive buffer and enable the shell.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 1290 of file Ifx_Shell.c.

◆ Ifx_Shell_init()

IFX_EXTERN boolean Ifx_Shell_init | ( | Ifx_Shell * | shell,
 |  | const Ifx_Shell_Config * | config
 | ) |  |

Initialize the shell.

Parameters
shell | Pointer to the Ifx_Shell object
config | Pointer to the configuration structure

Definition at line 314 of file Ifx_Shell.c.

◆ Ifx_Shell_initConfig()

void Ifx_Shell_initConfig ( Ifx_Shell_Config * config )

Set the config default parameter

Parameters
config Pointer to the configuration structure to be initialized

Definition at line 291 of file Ifx_Shell.c.

◆ Ifx_Shell_matchToken()

IFX_EXTERN boolean Ifx_Shell_matchToken | ( | pchar * | argsPtr,
 |  | pchar | token
 | ) |  |

Match string pointed by the *argsPtr with a given token.

Parameters
argsPtr | Pointer to the argument null-terminated string
token | Pointer to the token string to match
Return values
TRUE if the given token match with the string pointed by argsPtr

Definition at line 652 of file Ifx_Shell.c.

Referenced by Ifx_Shell_bbProtocolStart(), and Ifx_Shell_protocolStart().

◆ Ifx_Shell_parseAddress()

IFX_EXTERN boolean Ifx_Shell_parseAddress | ( | pchar * | argsPtr,
 |  | void ** | address
 | ) |  |

Parse an address.

Parameters
argsPtr | Pointer to the argument null-terminated string
address | Pointer to the value storage

Definition at line 771 of file Ifx_Shell.c.

◆ Ifx_Shell_parseFloat32()

IFX_EXTERN boolean Ifx_Shell_parseFloat32 | ( | pchar * | argsPtr,
 |  | float32 * | value
 | ) |  |

Parse a 32-bit (single precision) floating-point value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 908 of file Ifx_Shell.c.

◆ Ifx_Shell_parseFloat64()

IFX_EXTERN boolean Ifx_Shell_parseFloat64 | ( | pchar * | argsPtr,
 |  | float64 * | value
 | ) |  |

Parse a 64-bit (double precision) floating-point value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 888 of file Ifx_Shell.c.

◆ Ifx_Shell_parseSInt32()

IFX_EXTERN boolean Ifx_Shell_parseSInt32 | ( | pchar * | argsPtr,
 |  | sint32 * | value
 | ) |  |

Parse a signed 32-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 791 of file Ifx_Shell.c.

◆ Ifx_Shell_parseSInt64()

IFX_EXTERN boolean Ifx_Shell_parseSInt64 | ( | pchar * | argsPtr,
 |  | sint64 * | value
 | ) |  |

Parse a signed 64-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage

Definition at line 833 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseSInt32().

◆ Ifx_Shell_parseToken()

IFX_EXTERN boolean Ifx_Shell_parseToken | ( | pchar * | argsPtr,
 |  | char * | tokenBuffer,
 |  | int | bufferLength
 | ) |  |

Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token.

Parameters
argsPtr | Pointer to the argument null-terminated string
tokenBuffer | Pointer to the value storage
bufferLength | Maximum parsing length

Definition at line 704 of file Ifx_Shell.c.

Referenced by Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), and Ifx_Shell_parseUInt64().

◆ Ifx_Shell_parseUInt32()

IFX_EXTERN boolean Ifx_Shell_parseUInt32 | ( | pchar * | argsPtr,
 |  | uint32 * | value,
 |  | boolean | hex
 | ) |  |

Parse an unsigned 32-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage
hex | if TRUE, hex parsing will be done, else decimal parsing

Definition at line 812 of file Ifx_Shell.c.

◆ Ifx_Shell_parseUInt64()

IFX_EXTERN boolean Ifx_Shell_parseUInt64 | ( | pchar * | argsPtr,
 |  | uint64 * | value,
 |  | boolean | hex
 | ) |  |

Parse an unsigned 64-bit integer value.

Parameters
argsPtr | Pointer to the argument null-terminated string
value | Pointer to the value storage
hex | if TRUE, hex parsing will be done, else decimal parsing

Definition at line 853 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt32().

◆ Ifx_Shell_printSyntax()

IFX_EXTERN void Ifx_Shell_printSyntax | ( | const Ifx_Shell_Syntax * | syntaxList,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. print the syntax.

Parameters
syntaxList | Pointer to syntax list
io | Pointer to IfxStdIf_DPipe object

Definition at line 1305 of file Ifx_Shell.c.

◆ Ifx_Shell_process()

IFX_EXTERN void Ifx_Shell_process ( Ifx_Shell * shell )

Process the shell.

This function shall be called within a loop or periodic timer to guarantee the correct processing of the incoming/received data.

Parameters
shell Pointer to the Ifx_Shell object

Definition at line 371 of file Ifx_Shell.c.

◆ Ifx_Shell_protocolStart()

IFX_EXTERN boolean Ifx_Shell_protocolStart | ( | pchar | args,
 |  | void * | data,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Start the Shell protocol.

Parameters
args | The argument null-terminated string
data | Pointer to Ifx_Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 236 of file Ifx_Shell.c.

Referenced by Ifx_Shell_bbProtocolStart().

◆ Ifx_Shell_showHelp()

IFX_EXTERN boolean Ifx_Shell_showHelp | ( | pchar | args,
 |  | void * | shellPtr,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Implementation of Ifx_Shell_Call. Show the help menu and list of commands.

Parameters
args | The argument null-terminated string
shellPtr | Pointer to a Shell object
io | Pointer to IfxStdIf_DPipe object

Definition at line 211 of file Ifx_Shell.c.

Referenced by Ifx_Shell_execute().

◆ Ifx_Shell_showHelpSingle()

IFX_EXTERN boolean Ifx_Shell_showHelpSingle | ( | Ifx_Shell_CommandListConst | commandList,
 |  | IfxStdIf_DPipe * | io,
 |  | boolean | briefOnly,
 |  | boolean | singleCommand
 | ) |  |

Implementation of Ifx_Shell_Call. Show the help menu from single command list.

Parameters
commandList | Pointer to an array of Ifx_Shell_Command
io | Pointer to the IfxStdIf_DPipe object
briefOnly | if TRUE, show only the brief description, else show the full description
singleCommand | If TRUE, only show the 1st command pointed by commandList, else show the full list

Definition at line 87 of file Ifx_Shell.c.

Referenced by Ifx_Shell_showHelp(), and Ifx_Shell_showHelpSingleCommand().

◆ Ifx_Shell_skipWhitespace()

IFX_EXTERN pchar Ifx_Shell_skipWhitespace ( pchar args )

Within the context of Shell.call, skip the whitespaces of the args string.

Parameters
args Pointer to the original string
Returns
Pointer to the string after skipping the whitespaces

Definition at line 638 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseToken().


iLLD_TC26B: Ifx_Shell.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Data Structures | Macros | Typedefs | Enumerations
Ifx_Shell.h File Reference
Service software » System Engineering » Communication » Shell

Shell functions. More...

#include "StdIf/IfxStdIf_DPipe.h"
#include "Ifx_Cfg.h"
Include dependency graph for Ifx_Shell.h:

Go to the source code of this file.

Data Structures

struct | Ifx_Shell_Command
Shell command object. More...
struct | Ifx_Shell_CmdLine
Command line editing state. More...
struct | Ifx_Shell_Protocol
Shell protocol configuration. More...
struct | Ifx_Shell_Flags
Shell control flags. More...
struct | Ifx_Shell_Runtime
internal Shell run-time data More...
struct | Ifx_Shell
Shell object definition. More...
struct | Ifx_Shell_Config
Shell configuration. More...
struct | Ifx_Shell_Syntax
Shell Syntax Description. More...

Macros

#define | IFX_SHELL_NULL_CHAR '\0'
#define | IFX_CFG_SHELL_CMD_HISTORY_SIZE (10)
Number of commands to store in history. More...
#define | IFX_CFG_SHELL_CMD_LINE_SIZE (128)
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1 More...
#define | IFX_CFG_SHELL_COMMAND_LISTS (1)
Number of command lists. More...
#define | IFX_CFG_SHELL_PROMPT "Shell>"
Shell prompt. More...
#define | SHELL_HELP_DESCRIPTION_TEXT
#define | IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}
Marker for end of command list, the end of list is detected by commandLine=NULL. More...
#define | IFX_SHELL_SYNTAX_LIST_END {0, 0}
Marker for end of syntax list. More...
#define | IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)
Signifies no item in use in command history list. More...

Typedefs

typedef boolean(* | Ifx_Shell_Call) (pchar args, void *data, IfxStdIf_DPipe *io)
Definition of a callback function which handles a Shell command. More...
typedef Ifx_Shell_Command * | Ifx_Shell_CommandList
typedef const Ifx_Shell_Command * | Ifx_Shell_CommandListConst

Enumerations

enum Ifx_Shell_ResultCode {
Ifx_Shell_ResultCode_unknown = (128),
Ifx_Shell_ResultCode_nok = (129),
Ifx_Shell_ResultCode_undefined = (130),
Ifx_Shell_ResultCode_ok = (255)
}
Result code definition used after each executed Shell command. More...
enum Ifx_Shell_CmdState {
IFX_SHELL_CMD_STATE_NORMAL,
IFX_SHELL_CMD_STATE_ESCAPE,
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET,
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
}
Shell command processing state. More...

Functions

Basic functionality
void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
IFX_EXTERN boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
IFX_EXTERN void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
IFX_EXTERN void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
IFX_EXTERN void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
IFX_EXTERN void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...
Parsing functions
IFX_EXTERN pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
IFX_EXTERN boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
IFX_EXTERN boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
IFX_EXTERN boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
IFX_EXTERN boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...
Command list functions
IFX_EXTERN const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
IFX_EXTERN boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
IFX_EXTERN boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
IFX_EXTERN void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...
Sub protocol functions
IFX_EXTERN boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
IFX_EXTERN boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...

Detailed Description

Shell functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Shell.h.

Data Structure Documentation

◆ Ifx_Shell_Command

struct Ifx_Shell_Command

Shell command object.

Definition at line 152 of file Ifx_Shell.h.

Data Fields
Ifx_Shell_Call | call
pchar | commandLine
void * | data
pchar | help

◆ Ifx_Shell_CmdLine

struct Ifx_Shell_CmdLine

Command line editing state.

Definition at line 161 of file Ifx_Shell.h.

Data Fields
char * | cmdStr | Pointer to current string containing command line as so far processed.
Ifx_SizeT | cursor | Pointer to variable containing position of cursor in so-far-processed command line.
boolean | historyAdd | If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent)
Ifx_SizeT | historyItem | Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e.g. new command)
Ifx_SizeT | length | Pointer to variable containing total length of command line.

◆ Ifx_Shell_Flags

struct Ifx_Shell_Flags

Shell control flags.

Definition at line 191 of file Ifx_Shell.h.

Data Fields
uint16 | echo: 1
uint16 | echoError: 1
uint16 | enabled: 1
uint16 | sendResultCode: 1
uint16 | showPrompt: 1

◆ Ifx_Shell_Runtime

struct Ifx_Shell_Runtime

internal Shell run-time data

Definition at line 201 of file Ifx_Shell.h.

Data Fields
Ifx_Shell_CmdState | cmdState
char | cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE]
char | echo[2]
char | escBracketNum
char | inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE+1]

◆ Ifx_Shell

struct Ifx_Shell

Shell object definition.

Definition at line 215 of file Ifx_Shell.h.

Collaboration diagram for Ifx_Shell:
[legend]
Data Fields
Ifx_Shell_CmdLine | cmd | Current status of command line editing (saves passing many parameters around)
char * | cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE] | Array of pointers to the history entries.
Ifx_Shell_CommandListConst | commandList[IFX_CFG_SHELL_COMMAND_LISTS] | Array of pointers to command list. The pointed location shall be constant during Shell lifetime, e.g. stored in non-volatile memory or as global variable. The 1st item in the list is use as a group command prefix if its "call" parameter is NULL pointer, else it is use as other entries. In case "call" is NULL, the corresponding 'data' is ignored, and the 'help' is displayed.
Ifx_Shell_Flags | control | control flags
IfxStdIf_DPipe * | io | Pointer to IfxStdIf_DPipe object used by the Shell.
Ifx_Shell_Runtime | locals | Runtime data.
Ifx_Shell_Protocol | protocol | Protocol handler data.

◆ Ifx_Shell_Config

struct Ifx_Shell_Config

Shell configuration.

Definition at line 244 of file Ifx_Shell.h.

Collaboration diagram for Ifx_Shell_Config:
[legend]
Data Fields
Ifx_Shell_CommandListConst | commandList[IFX_CFG_SHELL_COMMAND_LISTS] | Specifies pointer to the command list.
boolean | echo | Specifies whether each command shall be echoed back to user.
Ifx_Shell_Protocol | protocol | Configuration for the Ifx_Shell_Protocol.
boolean | sendResultCode | Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
boolean | showPrompt | Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command.
IfxStdIf_DPipe * | standardIo | Pointer to a IfxStdIf_DPipe object used by the Shell.

◆ Ifx_Shell_Syntax

struct Ifx_Shell_Syntax

Shell Syntax Description.

Definition at line 257 of file Ifx_Shell.h.

Data Fields
pchar | description | description
pchar | syntax | syntax

Macro Definition Documentation

◆ IFX_CFG_SHELL_CMD_HISTORY_SIZE

#define IFX_CFG_SHELL_CMD_HISTORY_SIZE (10)

Number of commands to store in history.

Definition at line 110 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_CFG_SHELL_CMD_LINE_SIZE

#define IFX_CFG_SHELL_CMD_LINE_SIZE (128)

max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1

Definition at line 114 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_CFG_SHELL_COMMAND_LISTS

#define IFX_CFG_SHELL_COMMAND_LISTS (1)

Number of command lists.

Definition at line 118 of file Ifx_Shell.h.

Referenced by Ifx_Shell_commandListFind(), Ifx_Shell_init(), Ifx_Shell_initConfig(), and Ifx_Shell_showHelp().

◆ IFX_CFG_SHELL_PROMPT

#define IFX_CFG_SHELL_PROMPT "Shell>"

Shell prompt.

Definition at line 122 of file Ifx_Shell.h.

Referenced by Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_SHELL_CMD_HISTORY_NO_ITEM

#define IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)

Signifies no item in use in command history list.

Definition at line 137 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), and Ifx_Shell_process().

◆ IFX_SHELL_COMMAND_LIST_END

#define IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}

Marker for end of command list, the end of list is detected by commandLine=NULL.

Definition at line 131 of file Ifx_Shell.h.

◆ IFX_SHELL_NULL_CHAR

#define IFX_SHELL_NULL_CHAR '\0'

Definition at line 107 of file Ifx_Shell.h.

Referenced by Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_init(), Ifx_Shell_isEndOfLine(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt64(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), and Ifx_Shell_skipWhitespace().

◆ IFX_SHELL_SYNTAX_LIST_END

#define IFX_SHELL_SYNTAX_LIST_END {0, 0}

Marker for end of syntax list.

Definition at line 134 of file Ifx_Shell.h.

◆ SHELL_HELP_DESCRIPTION_TEXT

#define SHELL_HELP_DESCRIPTION_TEXT
Value:
" : Display command list, and command help." ENDL \
"/s help: show all commands" ENDL \
"/s help <command>: show the command details"
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:47

Definition at line 125 of file Ifx_Shell.h.

Typedef Documentation

◆ Ifx_Shell_Call

typedef boolean(* Ifx_Shell_Call) (pchar args, void *data, IfxStdIf_DPipe *io)

Definition of a callback function which handles a Shell command.

Definition at line 149 of file Ifx_Shell.h.

◆ Ifx_Shell_CommandList

typedef Ifx_Shell_Command* Ifx_Shell_CommandList

Definition at line 210 of file Ifx_Shell.h.

◆ Ifx_Shell_CommandListConst

typedef const Ifx_Shell_Command* Ifx_Shell_CommandListConst

Definition at line 211 of file Ifx_Shell.h.

Enumeration Type Documentation

◆ Ifx_Shell_CmdState

enum Ifx_Shell_CmdState

Shell command processing state.

Enumerator
IFX_SHELL_CMD_STATE_NORMAL | Normal - no special sequences being processed.
IFX_SHELL_CMD_STATE_ESCAPE | Escape character has been pressed.
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET | ESC [ pressed.
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER | ESC [ (number) pressed.

Definition at line 171 of file Ifx_Shell.h.

◆ Ifx_Shell_ResultCode

enum Ifx_Shell_ResultCode

Result code definition used after each executed Shell command.

Enumerator
Ifx_Shell_ResultCode_unknown
Ifx_Shell_ResultCode_nok
Ifx_Shell_ResultCode_undefined
Ifx_Shell_ResultCode_ok

Definition at line 140 of file Ifx_Shell.h.


iLLD_TC26B: General

Modules
General
Service software » System Engineering
Collaboration diagram for General:

Modules

Global resources

Detailed Description


iLLD_TC26B: Global resources

Functions
Global resources
Service software » System Engineering » General
Collaboration diagram for Global resources:

Functions

IFX_EXTERN void * | Ifx_GlobalResources_get (sint32 id)
IFX_EXTERN sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
IFX_EXTERN const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
IFX_EXTERN pchar | Ifx_GlobalResources_getName (sint32 id)
IFX_EXTERN boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Detailed Description

This module implements the global resources handling

Function Documentation

◆ Ifx_GlobalResources_get()

IFX_EXTERN void* Ifx_GlobalResources_get ( sint32 id )

Return a pointer to the global resource

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return Ifx_GlobalResources_Item.resource

Definition at line 38 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getIndex()

IFX_EXTERN sint32 Ifx_GlobalResources_getIndex ( void * resource )

Returns the global resource index.

Returns
Returns the global resource index, -1 if not found

Definition at line 62 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getItem()

IFX_EXTERN const Ifx_GlobalResources_Item* Ifx_GlobalResources_getItem ( sint32 id )

Return a pointer to the global resource item

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return the Ifx_GlobalResources_Item

Definition at line 86 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_getName()

IFX_EXTERN pchar Ifx_GlobalResources_getName ( sint32 id )

Return a the resource name as an NULL terminated string

Parameters
id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
Returns
return Ifx_GlobalResources_Item.name

Definition at line 110 of file Ifx_GlobalResources.c.

◆ Ifx_GlobalResources_init()

IFX_EXTERN boolean Ifx_GlobalResources_init | ( | const Ifx_GlobalResources_Item * | table,
 |  | uint32 | size
 | ) |  |

Initialize the global resource handler

Parameters
table | pointer to an array of Ifx_GlobalResources_Item
size | number of item in the table corresponds to sizeof(table)

return returns TRUE in case of success else FALSE

Definition at line 134 of file Ifx_GlobalResources.c.


iLLD_TC26B: Math

Modules
Math
Service software » System Engineering
Collaboration diagram for Math:

Modules

CRC
Look-ups
Math 32bit floating point

Detailed Description


iLLD_TC26B: CRC

Functions
CRC
Service software » System Engineering » Math
Collaboration diagram for CRC:

Functions

boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

This module implements CRC algorithm

Function Documentation

◆ Ifx_Crc_bitByBit()

uint32 Ifx_Crc_bitByBit | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 415 of file Ifx_Crc.c.

◆ Ifx_Crc_bitByBitFast()

uint32 Ifx_Crc_bitByBitFast | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 472 of file Ifx_Crc.c.

◆ Ifx_Crc_createTable()

boolean Ifx_Crc_createTable | ( | Ifc_Crc_Table * | table,
 |  | sint32 | order,
 |  | uint32 | polynom,
 |  | sint32 | refin
 | ) |  |
Parameters
table | pointer to the crc table
order | [1..32] is the CRC polynom order, counted without the leading '1' bit
polynom | is the CRC polynom without leading '1' bit
refin | [0,1] specifies if a data byte is reflected before processing (UART) or not

Definition at line 100 of file Ifx_Crc.c.

◆ Ifx_Crc_init()

boolean Ifx_Crc_init | ( | Ifc_Crc * | driver,
 |  | const Ifc_Crc_Table * | table,
 |  | sint32 | direct,
 |  | sint32 | refout,
 |  | uint32 | crcinit,
 |  | uint32 | crcxor
 | ) |  |
Parameters
direct | [0,1] specifies the kind of algorithm: 1=direct, no augmented zero bits
driver | pointer to the crc driver
table | pointer to crc table
direct | direct
crcinit | is the initial CRC value belonging to that algorithm
crcxor | is the final XOR value
refout | [0,1] specifies if the CRC will be reflected before XOR
table | pointer to the table: Ifc_Crc_Table8, Ifc_Crc_Table16, Ifc_Crc_Table32

Definition at line 28 of file Ifx_Crc.c.

◆ Ifx_Crc_table()

uint32 Ifx_Crc_table | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 287 of file Ifx_Crc.c.

◆ Ifx_Crc_tableFast()

uint32 Ifx_Crc_tableFast | ( | Ifc_Crc * | driver,
 |  | uint8 * | p,
 |  | uint32 | len
 | ) |  |

Definition at line 204 of file Ifx_Crc.c.


iLLD_TC26B: Look-ups

Modules | Macros
Look-ups
Service software » System Engineering » Math
Collaboration diagram for Look-ups:

Modules

Look-ups float32

Macros

#define | IFX_LUT_ANGLE_BITS (12)
Define the resolution (in bits) of cosinus and sinus table. More...
#define | IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
Define the cosinus and sinus table size. More...

Detailed Description

Macro Definition Documentation

◆ IFX_LUT_ANGLE_BITS

#define IFX_LUT_ANGLE_BITS (12)

Define the resolution (in bits) of cosinus and sinus table.

Definition at line 52 of file Ifx_Lut.h.

◆ IFX_LUT_ANGLE_RESOLUTION

#define IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)

Define the cosinus and sinus table size.

Definition at line 55 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_fxpAngle(), Ifx_LutLSincosF32_sin(), Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().


iLLD_TC26B: Look-ups float32

Modules
Look-ups float32
Service software » System Engineering » Math » Look-ups
Collaboration diagram for Look-ups float32:

Modules

ATAN lookup table
Indexes look-up table (with linear interpolation)
Look-up table (with linear interpolation)
Linear trigonometric Look-ups
Sinus and cosinus Look-ups

Detailed Description


iLLD_TC26B: ATAN lookup table

Functions
ATAN lookup table
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for ATAN lookup table:

Functions

IFX_EXTERN void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...

Detailed Description

Function Documentation

◆ Ifx_LutAtan2F32_fxpAngle()

IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle | ( | float32 | x,
 |  | float32 | y
 | ) |  |

Look-up arcus tangent value of y/x.

Returns
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI

Definition at line 67 of file Ifx_LutAtan2F32.c.

◆ Ifx_LutAtan2F32_init()

IFX_EXTERN void Ifx_LutAtan2F32_init ( void )

Initialise the lookup tables.

Definition at line 29 of file Ifx_LutAtan2F32.c.


iLLD_TC26B: Indexes look-up table (with linear interpolation)

Functions
Indexes look-up table (with linear interpolation)
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Indexes look-up table (with linear interpolation):

Functions

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search (const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search. More...

Detailed Description

Function Documentation

◆ Ifx_LutIndexedLinearF32_search()

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search | ( | const Ifx_LutIndexedLinearF32 * | ml,
 |  | uint32 | index
 | ) |  |

Look-up table search.

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 67 of file Ifx_LutIndexedLinearF32.h.

Referenced by Ifx_LutLSincosF32_sin().


iLLD_TC26B: Look-up table (with linear interpolation)

Functions
Look-up table (with linear interpolation)
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Look-up table (with linear interpolation):

Functions

IFX_EXTERN float32 | Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchNegSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchPosSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation. More...

Detailed Description

Function Documentation

◆ Ifx_LutLinearF32_searchBin()

IFX_EXTERN float32 Ifx_LutLinearF32_searchBin | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with binary search implementation.

Value inside table will be linearly interpolated. Value outside table will be linearly extrapolated.

Parameters
ml pointer to the multi-segment object
index
Returns
linear interpolated value

Definition at line 36 of file Ifx_LutLinearF32.c.

◆ Ifx_LutLinearF32_searchNegSeq()

IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with negative sequential search implementation.

Value inside table will be linearly interpolated Value outside table will be linearly extrapolated

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 92 of file Ifx_LutLinearF32.h.

◆ Ifx_LutLinearF32_searchPosSeq()

IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq | ( | const Ifx_LutLinearF32 * | ml,
 |  | float32 | index
 | ) |  |

Look-up table with positive sequential search implementation.

Value inside table will be linearly interpolated Value outside table will be linearly extrapolated

Parameters
ml pointer to the multi-segment object
index
Returns
interpolated value

Definition at line 71 of file Ifx_LutLinearF32.h.


iLLD_TC26B: Linear trigonometric Look-ups

Files | Functions
Linear trigonometric Look-ups
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Linear trigonometric Look-ups:

Files

file Ifx_LutLSincosF32.h
Sin/Cos linear approximated lookup functions with fixed-point angle data type.

Functions

IFX_INLINE float32 | Ifx_LutLSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutLSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutLSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Detailed Description

Function Documentation

◆ Ifx_LutLSincosF32_cos()

IFX_INLINE float32 Ifx_LutLSincosF32_cos ( Ifx_Lut_FxpAngle fxpAngle )

Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Returns
cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 64 of file Ifx_LutLSincosF32.h.

◆ Ifx_LutLSincosF32_cossin()

IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin ( Ifx_Lut_FxpAngle fxpAngle )

Sine and Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Return values
real | = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
imag | = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 77 of file Ifx_LutLSincosF32.h.

◆ Ifx_LutLSincosF32_sin()

IFX_INLINE float32 Ifx_LutLSincosF32_sin ( Ifx_Lut_FxpAngle fxpAngle )

Sine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
Returns
sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 50 of file Ifx_LutLSincosF32.h.

Referenced by Ifx_LutLSincosF32_cos(), and Ifx_LutLSincosF32_cossin().


iLLD_TC26B: Ifx_LutLSincosF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions | Variables
Ifx_LutLSincosF32.h File Reference
Service software » System Engineering » Math » Look-ups » Look-ups float32 » Linear trigonometric Look-ups

Sin/Cos linear approximated lookup functions with fixed-point angle data type. More...

#include "SysSe/Math/IFX_Cf32.h"
#include "Ifx_Lut.h"
#include "Ifx_LutIndexedLinearF32.h"
Include dependency graph for Ifx_LutLSincosF32.h:

Go to the source code of this file.

Functions

IFX_INLINE float32 | Ifx_LutLSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutLSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutLSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Variables

IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Look-up table for sin. More...

Detailed Description

Sin/Cos linear approximated lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutLSincosF32.h.

Variable Documentation

◆ Ifx_g_LutLSincosF32

IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32

Look-up table for sin.

Definition at line 42 of file Ifx_LutLSincosF32.h.

Referenced by Ifx_LutLSincosF32_sin().


iLLD_TC26B: Sinus and cosinus Look-ups

Files | Functions
Sinus and cosinus Look-ups
Service software » System Engineering » Math » Look-ups » Look-ups float32
Collaboration diagram for Sinus and cosinus Look-ups:

Files

file Ifx_LutSincosF32.h
Sin/Cos lookup functions with fixed-point angle data type.

Functions

IFX_EXTERN void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Detailed Description

Function Documentation

◆ Ifx_LutSincosF32_cos()

IFX_INLINE float32 Ifx_LutSincosF32_cos ( Ifx_Lut_FxpAngle fxpAngle )

Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Returns
cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 64 of file Ifx_LutSincosF32.h.

◆ Ifx_LutSincosF32_cossin()

IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin ( Ifx_Lut_FxpAngle fxpAngle )

Sine and Cosine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
Return values
real | = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
imag | = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 77 of file Ifx_LutSincosF32.h.

◆ Ifx_LutSincosF32_init()

IFX_EXTERN void Ifx_LutSincosF32_init ( void )

Initialise the lookup tables.

Note
This is not required if (IFX_LUT_TABLE_CONST == 1)

Definition at line 29 of file Ifx_LutSincosF32.c.

◆ Ifx_LutSincosF32_sin()

IFX_EXTERN float32 Ifx_LutSincosF32_sin ( Ifx_Lut_FxpAngle fxpAngle )

Sine lookup function.

Parameters
fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
Returns
sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)

Definition at line 44 of file Ifx_LutSincosF32.c.

Referenced by Ifx_LutSincosF32_cos(), and Ifx_LutSincosF32_cossin().


iLLD_TC26B: Ifx_LutSincosF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions | Variables
Ifx_LutSincosF32.h File Reference
Service software » System Engineering » Math » Look-ups » Look-ups float32 » Sinus and cosinus Look-ups

Sin/Cos lookup functions with fixed-point angle data type. More...

#include "SysSe/Math/Ifx_Cf32.h"
#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutSincosF32.h:

Go to the source code of this file.

Functions

IFX_EXTERN void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...
IFX_INLINE float32 | Ifx_LutSincosF32_cos (Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function. More...
IFX_INLINE cfloat32 | Ifx_LutSincosF32_cossin (Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function. More...

Variables

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table [(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION. More...

Detailed Description

Sin/Cos lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutSincosF32.h.

Variable Documentation

◆ Ifx_g_LutSincosF32_table

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]

Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.

Definition at line 42 of file Ifx_LutSincosF32.h.

Referenced by Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().


iLLD_TC26B: Math 32bit floating point

Modules
Math 32bit floating point
Service software » System Engineering » Math
Collaboration diagram for Math 32bit floating point:

Modules

Angle-Tracking Observer
Floating point signal, vector, and matrix library
Floating-point FFT
Discrete Integral Approximation
Low-pass Filter: Type PT1
Ramp
Window functions

Detailed Description


iLLD_TC26B: Angle-Tracking Observer

Functions
Angle-Tracking Observer
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Angle-Tracking Observer:

Functions

IFX_EXTERN float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
IFX_EXTERN float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
IFX_EXTERN void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
IFX_EXTERN void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
IFX_EXTERN void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...

Initialisation functions

Example use:

extern sint16 g_SinInput, g_CosInput;
Ifx_AngleTrkF32_Config driverConfig;
Ifx_AngleTrkF32 driverData;
Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
driverConfig.sqrAmplMax = 1.01 * 1.01;
driverConfig.sqrAmplMin = 0.99 * 0.99;
driverConfig.speedLpfFc = 100;
driverConfig.periodPerRotation = 1;
driverConfig.reversed = FALSE;
driverConfig.offset = 0;
Ifx_AngleTrkF32_init(&driverData, &driverConfig);

Prototypes:

IFX_EXTERN void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
IFX_EXTERN void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...

Protected functions

These functions are not for end-user but may be used by another driver which extends the functionality of library_srvsw_sysse_math_f32_angletrk

IFX_EXTERN float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
IFX_EXTERN void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
IFX_INLINE float32 | Ifx_AngleTrkF32_getLoopSpeed (Ifx_AngleTrkF32 *aObsv)
get the speed. More...

Detailed Description

This driver implements Standard interface: Position interface using 3rd order Angle-Tracking Observer algorithm.

Function Documentation

◆ Ifx_AngleTrkF32_getAbsolutePosition()

IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetAbsolutePosition
Parameters
driver driver handle
Returns
absolute position

Definition at line 318 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getAbsolutePosition().

◆ Ifx_AngleTrkF32_getDirection()

IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetDirection
Parameters
driver driver handle
Returns
direction

Definition at line 324 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getDirection().

◆ Ifx_AngleTrkF32_getFault()

IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetFault
Parameters
driver driver handle
Returns
Fault

Definition at line 330 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getFault().

◆ Ifx_AngleTrkF32_getLoopSpeed()

IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed ( Ifx_AngleTrkF32 * aObsv )

get the speed.

Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 158 of file Ifx_AngleTrkF32.h.

Referenced by IfxDsadc_Rdc_update().

◆ Ifx_AngleTrkF32_getOffset()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetOffset
Parameters
driver driver handle
Returns
offset address

Definition at line 336 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getOffset().

◆ Ifx_AngleTrkF32_getPeriodPerRotation()

IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetPeriodPerRotation
Parameters
driver driver handle
Returns
Period per rotation

Definition at line 342 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getPeriodPerRotation().

◆ Ifx_AngleTrkF32_getPosition()

IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetPosition
Parameters
driver driver handle
Returns
position

Definition at line 348 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getPosition().

◆ Ifx_AngleTrkF32_getRawPosition()

IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition ( Ifx_AngleTrkF32 * aObsv )

Returns the actual position.

See also
IfxStdIf_Pos_GetRawPosition
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Returns
position in ticks
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Note
This function returns the angular position in ticks 0 .. Ifx_AngleTrkF32.base.resolution-1

Definition at line 297 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getRawPosition().

◆ Ifx_AngleTrkF32_getRefreshPeriod()

IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetRefreshPeriod
Parameters
driver driver handle
Returns
update period

Definition at line 354 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getRefreshPeriod().

◆ Ifx_AngleTrkF32_getResolution()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetResolution
Parameters
driver driver handle
Returns
resolution

Definition at line 360 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getResolution().

◆ Ifx_AngleTrkF32_getSensorType()

IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetSensorType
Parameters
driver driver handle
Returns
sensor type

Definition at line 366 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_getSpeed()

IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed ( Ifx_AngleTrkF32 * aObsv )

Returns the Speed.

See also
IfxStdIf_Pos_GetSpeed
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object
Returns
speed
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 307 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getSpeed().

◆ Ifx_AngleTrkF32_getTurn()

IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_GetTurn
Parameters
driver driver handle
Returns
Returns the number of turns

Definition at line 373 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_getTurn().

◆ Ifx_AngleTrkF32_init()

IFX_EXTERN void Ifx_AngleTrkF32_init | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | const Ifx_AngleTrkF32_Config * | config,
 |  | float32 | Ts
 | ) |  |

Initialize the Angle Tracking object.

Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
config | Pointer to the configuration data
Ts | sampling period in seconds

Definition at line 145 of file Ifx_AngleTrkF32.c.

Referenced by IfxDsadc_Rdc_init().

◆ Ifx_AngleTrkF32_initConfig()

IFX_EXTERN void Ifx_AngleTrkF32_initConfig | ( | Ifx_AngleTrkF32_Config * | config,
 |  | sint16 * | sinIn,
 |  | sint16 * | cosIn
 | ) |  |

Fill config with default values.

12-bit default resolution

Definition at line 113 of file Ifx_AngleTrkF32.c.

Referenced by IfxDsadc_Rdc_init().

◆ Ifx_AngleTrkF32_reset()

IFX_EXTERN void Ifx_AngleTrkF32_reset ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_Reset
Parameters
driver driver handle
Returns
None

Definition at line 391 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_reset().

◆ Ifx_AngleTrkF32_resetFaults()

IFX_EXTERN void Ifx_AngleTrkF32_resetFaults ( Ifx_AngleTrkF32 * driver )
See also
IfxStdIf_Pos_ResetFaults
Parameters
driver driver handle
Returns
None

Definition at line 379 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_resetFaults().

◆ Ifx_AngleTrkF32_setOffset()

IFX_EXTERN void Ifx_AngleTrkF32_setOffset | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | IfxStdIf_Pos_RawAngle | offset
 | ) |  |

Set the position offset (in ticks)

See also
IfxStdIf_Pos_SetOffset
Parameters
aObsv | driver handle
offset | offset
Returns
None
Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
offset | Position offset in ticks

Definition at line 254 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_setOffset().

◆ Ifx_AngleTrkF32_setRefreshPeriod()

IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod | ( | Ifx_AngleTrkF32 * | driver,
 |  | float32 | updatePeriod
 | ) |  |
See also
IfxStdIf_Pos_SetRefreshPeriod
Parameters
driver | driver handle
updatePeriod | update period
Returns
None

Definition at line 385 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), and IfxDsadc_Rdc_setRefreshPeriod().

◆ Ifx_AngleTrkF32_step()

IFX_EXTERN float32 Ifx_AngleTrkF32_step | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | sint16 | sinIn,
 |  | sint16 | cosIn,
 |  | float32 | phase
 | ) |  |

Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()).

Note
This function is automatically called by Ifx_AngleTrkF32_update()
Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
sinIn | sine input signal. The offset shall be zero.
cosIn | cosine input signal. The offset shall be zero.
phase | phase of input signal.
Note
This function returns the angular position in radians
The amplitude of both sinIn and cosIn signal shall be the same.

Definition at line 203 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_update(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_update().

◆ Ifx_AngleTrkF32_update()

IFX_EXTERN void Ifx_AngleTrkF32_update ( Ifx_AngleTrkF32 * aObsv )

Update the object directly from its analog input.

See also
IfxStdIf_Pos_Update
Parameters
aObsv driver handle
Returns
None
Parameters
aObsv Pointer to the Ifx_AngleTrkF32 object

Definition at line 280 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_stdIfPosInit().

◆ Ifx_AngleTrkF32_updateStatus()

IFX_EXTERN void Ifx_AngleTrkF32_updateStatus | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | sint16 | sinIn,
 |  | sint16 | cosIn
 | ) |  |

Update the status flags.

Parameters
aObsv | Pointer to the Ifx_AngleTrkF32 object
sinIn | Sinus value
cosIn | Cosinus value
Note
This function is automatically called by Ifx_AngleTrkF32_update()

Definition at line 267 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_update(), IfxDsadc_Rdc_onEventA(), and IfxDsadc_Rdc_update().


iLLD_TC26B: Floating point signal, vector, and matrix library

Floating point signal, vector, and matrix library
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Floating point signal, vector, and matrix library:


iLLD_TC26B: Floating-point FFT

Files
Floating-point FFT
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Floating-point FFT:

Files

file Ifx_FftF32.h
Floating-point Fast Fourier Transform.

Transform functions

IFX_EXTERN cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, sint16 nX)
Twiddle factor generator. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform. More...

Utility functions

IFX_INLINE uint16 | Ifx_FftF32_lookUpReversedBits (uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits. More...
IFX_INLINE cfloat32 | Ifx_FftF32_lookUpTwiddleFactor (sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k. More...
IFX_EXTERN uint16 | Ifx_FftF32_reverseBits (uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...

Detailed Description

This module implements the Fast Fourier Transform in single precision floating-point

Function Documentation

◆ Ifx_FftF32_generateTwiddleFactor()

IFX_EXTERN cfloat32* Ifx_FftF32_generateTwiddleFactor | ( | cfloat32 * | TF,
 |  | sint16 | nX
 | ) |  |

Twiddle factor generator.

Definition at line 31 of file Ifx_FftF32.c.

◆ Ifx_FftF32_lookUpReversedBits()

IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits | ( | uint16 | n,
 |  | unsigned | bits
 | ) |  |

Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits.

Definition at line 73 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_radix2(), and Ifx_FftF32_radix2I().

◆ Ifx_FftF32_lookUpTwiddleFactor()

IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor | ( | sint32 | N,
 |  | sint32 | k
 | ) |  |

Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.

Definition at line 82 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ Ifx_FftF32_radix2()

IFX_EXTERN cfloat32* Ifx_FftF32_radix2 | ( | cfloat32 * | R,
 |  | const cfloat32 * | X,
 |  | uint16 | nX
 | ) |  |

Radix-2 Fast-Fourier Transform.

Definition at line 123 of file Ifx_FftF32.c.

◆ Ifx_FftF32_radix2I()

IFX_EXTERN cfloat32* Ifx_FftF32_radix2I | ( | cfloat32 * | R,
 |  | const cfloat32 * | X,
 |  | uint16 | nX
 | ) |  |

Radix-2 Inverse Fast-Fourier Transform.

Definition at line 142 of file Ifx_FftF32.c.

◆ Ifx_FftF32_reverseBits()

IFX_EXTERN uint16 Ifx_FftF32_reverseBits | ( | uint16 | n,
 |  | unsigned | bits
 | ) |  |

Calculate the bit-reversed <n> with <bits> as number of bits.

Definition at line 50 of file Ifx_FftF32.c.


iLLD_TC26B: Ifx_FftF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Variables
Ifx_FftF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Floating-point FFT

Floating-point Fast Fourier Transform. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_FftF32.h:

Go to the source code of this file.

Macros

#define | IFX_FFTF32_MAX_RESOLUTION (14)
Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated. More...
#define | IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated. More...

Functions

Transform functions
IFX_EXTERN cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, sint16 nX)
Twiddle factor generator. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform. More...
IFX_EXTERN cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform. More...
Utility functions
IFX_INLINE uint16 | Ifx_FftF32_lookUpReversedBits (uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits. More...
IFX_INLINE cfloat32 | Ifx_FftF32_lookUpTwiddleFactor (sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k. More...
IFX_EXTERN uint16 | Ifx_FftF32_reverseBits (uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...

Variables

IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable [IFX_FFTF32_MAX_LENGTH]
Bit reversal table. More...
IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable [IFX_FFTF32_MAX_LENGTH/2]
Twiddle factor table. More...

Detailed Description

Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_FftF32.h.

Macro Definition Documentation

◆ IFX_FFTF32_MAX_LENGTH

#define IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)

Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated.

Definition at line 43 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpTwiddleFactor().

◆ IFX_FFTF32_MAX_RESOLUTION

#define IFX_FFTF32_MAX_RESOLUTION (14)

Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable shall be regenerated.

Definition at line 39 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpReversedBits().

Variable Documentation

◆ Ifx_g_FftF32_bitReverseTable

IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]

Bit reversal table.

Definition at line 46 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpReversedBits().

◆ Ifx_g_FftF32_twiddleTable

IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Twiddle factor table.

Definition at line 49 of file Ifx_FftF32.h.

Referenced by Ifx_FftF32_lookUpTwiddleFactor().


iLLD_TC26B: Discrete Integral Approximation

Files | Functions
Discrete Integral Approximation
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Discrete Integral Approximation:

Files

file Ifx_IntegralF32.h
Discrete integral approximation.

Functions

void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...

Detailed Description

Function Documentation

◆ Ifx_ClpxFloat32_Integral_init()

void Ifx_ClpxFloat32_Integral_init | ( | Ifx_ClpxFloat32_Integral * | ci,
 |  | float32 | gain,
 |  | float32 | Ts
 | ) |  |

Initialize the integrator object.

Parameters
ci | Pointer to the integrator object
gain | Integrator gain
Ts | Sampling period

Definition at line 58 of file Ifx_IntegralF32.c.

◆ Ifx_ClpxFloat32_Integral_reset()

void Ifx_ClpxFloat32_Integral_reset ( Ifx_ClpxFloat32_Integral * ci )

Reset the integrator object.

Parameters
ci Pointer to the integrator object

Definition at line 49 of file Ifx_IntegralF32.c.

Referenced by Ifx_ClpxFloat32_Integral_init().

◆ Ifx_ClpxFloat32_Integral_step()

cfloat32 Ifx_ClpxFloat32_Integral_step | ( | Ifx_ClpxFloat32_Integral * | ci,
 |  | cfloat32 | ik
 | ) |  |

Step function of the integrator object.

Parameters
ci | Pointer to the integrator object
ik | input value
Returns
most actual integrator value

Definition at line 65 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_init()

void Ifx_IntegralF32_init | ( | Ifx_IntegralF32 * | ci,
 |  | float32 | gain,
 |  | float32 | Ts
 | ) |  |

Initialize the integrator object.

Parameters
ci | Pointer to the integrator object
gain | Integrator gain
Ts | Sampling period

Definition at line 34 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_reset()

void Ifx_IntegralF32_reset ( Ifx_IntegralF32 * ci )

Reset the integrator object.

Parameters
ci Pointer to the integrator object

Definition at line 27 of file Ifx_IntegralF32.c.

◆ Ifx_IntegralF32_step()

float32 Ifx_IntegralF32_step | ( | Ifx_IntegralF32 * | ci,
 |  | float32 | ik
 | ) |  |

Step function of the integrator object.

Parameters
ci | Pointer to the integrator object
ik | input value
Returns
most actual integrator value

Definition at line 40 of file Ifx_IntegralF32.c.


iLLD_TC26B: Ifx_IntegralF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_IntegralF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Discrete Integral Approximation

Discrete integral approximation. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_IntegralF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_IntegralF32
Integrator object for float32 data type. More...
struct | Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type. More...

Functions

void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...

Detailed Description

Discrete integral approximation.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_IntegralF32.h.

Data Structure Documentation

◆ Ifx_IntegralF32

struct Ifx_IntegralF32

Integrator object for float32 data type.

Definition at line 37 of file Ifx_IntegralF32.h.

Data Fields
float32 | delta
float32 | ik
float32 | uk

◆ Ifx_ClpxFloat32_Integral

struct Ifx_ClpxFloat32_Integral

Integrator object for cfloat32 data type.

Definition at line 45 of file Ifx_IntegralF32.h.

Collaboration diagram for Ifx_ClpxFloat32_Integral:
[legend]
Data Fields
float32 | delta
cfloat32 | ik
cfloat32 | uk


iLLD_TC26B: Low-pass Filter: Type PT1

Functions
Low-pass Filter: Type PT1
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Low-pass Filter: Type PT1:

Functions

IFX_EXTERN void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
IFX_INLINE void | Ifx_LowPassPt1F32_reset (Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable. More...
IFX_EXTERN float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

This module implements a PT1 low pass filter. http://de.wikipedia.org/wiki/PT1-Glied

Formula:
$ y_k = y_{k-1} + a * x_k - b * y_{k-1} $
with [image], $(a = K*T^*)$, $(b = T^*)$ with $(T_s: Sample time)$, $(K: Gain)$,

Function Documentation

◆ Ifx_LowPassPt1F32_do()

IFX_EXTERN float32 Ifx_LowPassPt1F32_do | ( | Ifx_LowPassPt1F32 * | filter,
 |  | float32 | input
 | ) |  |

Execute the low pass filter.

Parameters
filter | Specifies PT1 filter.
input | Specifies the filter input.
Returns
Returns the filter output

Definition at line 56 of file Ifx_LowPassPt1F32.c.

Referenced by Ifx_AngleTrkF32_step(), IfxGpt12_IncrEnc_updateSpeedFromT2(), and IfxGpt12_IncrEnc_updateSpeedFromT3().

◆ Ifx_LowPassPt1F32_init()

IFX_EXTERN void Ifx_LowPassPt1F32_init | ( | Ifx_LowPassPt1F32 * | filter,
 |  | const Ifx_LowPassPt1F32_Config * | config
 | ) |  |

Set the low pass filter configuration.

This function sets the low pass filter configuration and reset the filter output.

Parameters
filter | Specifies PT1 filter.
config | Specifies the PT1 filter configuration.
Returns
None

Definition at line 38 of file Ifx_LowPassPt1F32.c.

Referenced by Ifx_AngleTrkF32_init(), and IfxGpt12_IncrEnc_init().

◆ Ifx_LowPassPt1F32_reset()

IFX_INLINE void Ifx_LowPassPt1F32_reset ( Ifx_LowPassPt1F32 * filter )

Reset the internal filter variable.

Parameters
filter Specifies PT1 filter.

Definition at line 73 of file Ifx_LowPassPt1F32.h.

Referenced by Ifx_AngleTrkF32_reset().


iLLD_TC26B: Ramp

Functions
Ramp
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Ramp:

Functions

IFX_INLINE void | Ifx_RampF32_init (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object. More...
IFX_INLINE void | Ifx_RampF32_reset (Ifx_RampF32 *ramp)
Reset internal values. More...
IFX_INLINE void | Ifx_RampF32_setSlewRate (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate. More...
IFX_INLINE void | Ifx_RampF32_setRef (Ifx_RampF32 *ramp, float32 ref)
Set the reference value. More...
IFX_INLINE float32 | Ifx_RampF32_getValue (Ifx_RampF32 *ramp)
Get the actual output value. More...
IFX_EXTERN float32 | Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...

Detailed Description

Function Documentation

◆ Ifx_RampF32_getValue()

IFX_INLINE float32 Ifx_RampF32_getValue ( Ifx_RampF32 * ramp )

Get the actual output value.

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Actual value

Definition at line 124 of file Ifx_RampF32.h.

◆ Ifx_RampF32_init()

IFX_INLINE void Ifx_RampF32_init | ( | Ifx_RampF32 * | ramp,
 |  | float32 | slewRate,
 |  | float32 | period
 | ) |  |

Initialize the Ifx_RampF32 object.

Parameters
ramp | Pointer to the Ifx_RampF32 object
slewRate | Maximum slew rate, value per second
period | Sampling period of the Ifx_RampF32_step() function

Definition at line 101 of file Ifx_RampF32.h.

◆ Ifx_RampF32_reset()

IFX_INLINE void Ifx_RampF32_reset ( Ifx_RampF32 * ramp )

Reset internal values.

Parameters
ramp Pointer to the Ifx_RampF32 object

Definition at line 65 of file Ifx_RampF32.h.

Referenced by Ifx_RampF32_init().

◆ Ifx_RampF32_setRef()

IFX_INLINE void Ifx_RampF32_setRef | ( | Ifx_RampF32 * | ramp,
 |  | float32 | ref
 | ) |  |

Set the reference value.

Parameters
ramp | Pointer to the Ifx_RampF32 object
ref | Reference value

Definition at line 113 of file Ifx_RampF32.h.

◆ Ifx_RampF32_setSlewRate()

IFX_INLINE void Ifx_RampF32_setSlewRate | ( | Ifx_RampF32 * | ramp,
 |  | float32 | slewRate,
 |  | float32 | period
 | ) |  |

Set the maximum slew rate.

Parameters
ramp | Pointer to the Ifx_RampF32 object
slewRate | Maximum slew rate, value per second
period | Sampling period of the Ifx_RampF32_step() function

Definition at line 89 of file Ifx_RampF32.h.

Referenced by Ifx_RampF32_init().

◆ Ifx_RampF32_step()

IFX_EXTERN float32 Ifx_RampF32_step ( Ifx_RampF32 * ramp )

Execute the Ramp function.

NOTE: shall be called every 'period'. The period was defined by Ifx_RampF32_init() or Ifx_RampF32_setSlewRate()

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Actual value

Definition at line 37 of file Ifx_RampF32.c.


iLLD_TC26B: Window functions

Files | Functions | Variables
Window functions
Service software » System Engineering » Math » Math 32bit floating point
Collaboration diagram for Window functions:

Files

file Ifx_WndF32.h
Windowing function.

Functions

IFX_INLINE void Ifx_WndF32_apply (cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length. More...

Variables

IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_hannTable [IFX_WNDF32_TABLE_LENGTH/2]
IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_blackmanHarrisTable [IFX_WNDF32_TABLE_LENGTH/2]

Detailed Description

Function Documentation

◆ Ifx_WndF32_apply()

IFX_INLINE void Ifx_WndF32_apply | ( | cfloat32 * | x,
 |  | CONST_CFG float32 * | window,
 |  | short | nX
 | ) |  |

Apply a window to complex array x which has nX length.

Example: Ifx_WndF32_apply(x, Ifx_g_WndF32_hannTable, 1024);

Definition at line 46 of file Ifx_WndF32.h.

Variable Documentation

◆ Ifx_g_WndF32_blackmanHarrisTable

IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH/2]

Definition at line 41 of file Ifx_WndF32.h.

◆ Ifx_g_WndF32_hannTable

IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH/2]

Definition at line 40 of file Ifx_WndF32.h.


iLLD_TC26B: Ifx_WndF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions | Variables
Ifx_WndF32.h File Reference
Service software » System Engineering » Math » Math 32bit floating point » Window functions

Windowing function. More...

#include "Ifx_Cf32.h"
Include dependency graph for Ifx_WndF32.h:

Go to the source code of this file.

Macros

#define IFX_WNDF32_TABLE_LENGTH (1024)

Functions

IFX_INLINE void Ifx_WndF32_apply (cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length. More...

Variables

IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_hannTable [IFX_WNDF32_TABLE_LENGTH/2]
IFX_EXTERN CONST_CFG float32 | Ifx_g_WndF32_blackmanHarrisTable [IFX_WNDF32_TABLE_LENGTH/2]

Detailed Description

Windowing function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_WndF32.h.

Macro Definition Documentation

◆ IFX_WNDF32_TABLE_LENGTH

#define IFX_WNDF32_TABLE_LENGTH (1024)

Definition at line 35 of file Ifx_WndF32.h.

Referenced by Ifx_WndF32_apply().


iLLD_TC26B: Time

Modules
Time
Service software » System Engineering
Collaboration diagram for Time:

Modules

DateTime

Detailed Description


iLLD_TC26B: DateTime

Functions
DateTime
Service software » System Engineering » Time
Collaboration diagram for DateTime:

Functions

IFX_EXTERN void | DateTime_set (Ifx_DateTime *time)
Set the real time. More...
IFX_EXTERN void | DateTime_get (Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...

Detailed Description

This module implements the Date-Time functions.

Function Documentation

◆ DateTime_get()

IFX_EXTERN void DateTime_get ( Ifx_DateTime * time )

Get the real time Note that this function is valid only if DateTime_set() has been called.

Definition at line 33 of file Ifx_DateTime.c.

◆ DateTime_set()

IFX_EXTERN void DateTime_set ( Ifx_DateTime * time )

Set the real time.

Definition at line 46 of file Ifx_DateTime.c.


iLLD_TC26B: Data Structures

Data Structures
Here are the data structures with brief descriptions:
C _Fifo |
C cfloat32 |
C cfract |
C csfract |
C csint16 |
C csint32 |
C Icu_Config | Configuration structure of the Icu interface
C Icu_Functions |
C Icu_s | Structure of the Icu interface
C Ifc_Crc |
C Ifc_Crc_Table |
C Ifc_Crc_Table16 |
C Ifc_Crc_Table32 |
C Ifc_Crc_Table8 |
C Ifx_AngleTrkF32 | Angle Tracking Observer object
C Ifx_AngleTrkF32_CfgData |
C Ifx_AngleTrkF32_Config | Angle Tracking Observer configuration
C Ifx_AngleTrkF32_PosIf |
C Ifx_CircularBuffer | Circular buffer definition
C Ifx_ClpxFloat32_Integral | Integrator object for cfloat32 data type
C Ifx_Console |
C Ifx_DataBufferMode_TimeStampSingle |
C Ifx_DateTime |
C Ifx_Fifo_Shared |
C Ifx_GlobalResources | Global resource object
C Ifx_GlobalResources_Item |
C Ifx_IntegralF32 | Integrator object for float32 data type
C Ifx_InternalMux_Config |
C Ifx_InternalMux_MuxConfig |
C Ifx_IsrSetting |
C Ifx_LowPassPt1F32 | PT1 object definition
C Ifx_LowPassPt1F32_Config | PT1 configuration
C Ifx_LutIndexedLinearF32 |
C Ifx_LutIndexedLinearF32_Item |
C Ifx_LutLinearF32 |
C Ifx_LutLinearF32_Item |
C Ifx_RampF32 | Ifx_RampF32 object definition
C Ifx_Shell | Shell object definition
C Ifx_Shell_CmdLine | Command line editing state
C Ifx_Shell_Command | Shell command object
C Ifx_Shell_Config | Shell configuration
C Ifx_Shell_Flags | Shell control flags
C Ifx_Shell_Protocol | Shell protocol configuration
C Ifx_Shell_Runtime | Internal Shell run-time data
C Ifx_Shell_Syntax | Shell Syntax Description
C IfxAsclin_Asc | Module Handle
C IfxAsclin_Asc_BaudRate | Structure for baudrate
C IfxAsclin_Asc_BitTimingControl | Structure for bit timings
C IfxAsclin_Asc_Config | Configuration structure of the module
C IfxAsclin_Asc_ErrorFlags | Structure for Error Flags
C IfxAsclin_Asc_ErrorFlagsUnion | This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member
C IfxAsclin_Asc_FifoControl | Structure for FIFO control
C IfxAsclin_Asc_FrameControl | Structure for frame control
C IfxAsclin_Asc_InterruptConfig | Structure for interrupt configuration
C IfxAsclin_Asc_Pins | Structure for ASC pin configuration
C IfxAsclin_Cts_In | CTS pin mapping structure
C IfxAsclin_Lin |
C IfxAsclin_Lin_AcknowledgementFlags | Structure for Acknowledgement Flags
C IfxAsclin_Lin_BaudrateDetection | Structure for Baudrate Detection
C IfxAsclin_Lin_BaudrateGeneration | Structure for Baudrate Generation
C IfxAsclin_Lin_BitSamplingControl | Structure for Bit Sampling
C IfxAsclin_Lin_BitTimingControl | Structure for Bit Timing
C IfxAsclin_Lin_Config | Configuration structure of the module
C IfxAsclin_Lin_DataControl | Structure for Data Control
C IfxAsclin_Lin_EnabledInterrupts | Structure to store interrupts which are enabled during initialisation
C IfxAsclin_Lin_ErrorFlags | Structure for Error Flags
C IfxAsclin_Lin_FifoControl | Structure for FIFO Control
C IfxAsclin_Lin_FrameControl | Structure for Frame Control
C IfxAsclin_Lin_FrameControlFlags | Structure for Lin Frame Control flags
C IfxAsclin_Lin_FrameDataControl | Structure for Frame Data and Control flags
C IfxAsclin_Lin_InterruptConfig | Structure for LIN Interrupt Configuration
C IfxAsclin_Lin_LinControl | Structure for lin Control
C IfxAsclin_Lin_PduType | Structure to hold Lin Pdu data
C IfxAsclin_Lin_Pins | Structure for LIN pin configuration
C IfxAsclin_Rts_Out | RTS pin mapping structure
C IfxAsclin_Rx_In | RX pin mapping structure
C IfxAsclin_Sclk_Out | SCLK pin mapping structure
C IfxAsclin_Slso_Out | SLSO pin mapping structure
C IfxAsclin_Spi | Module handle
C IfxAsclin_Spi_Baudrate | Structure for Baudrate Generation
C IfxAsclin_Spi_BitSamplingControl | Structure for Bit Sampling
C IfxAsclin_Spi_Config | Configuration structure of the module
C IfxAsclin_Spi_ErrorFlags | Structure for Error Flags
C IfxAsclin_Spi_FifoControl | Structure for FIFO Control
C IfxAsclin_Spi_FrameControl | Structure for Frame Control
C IfxAsclin_Spi_InputOutputControl | Structure for input output control
C IfxAsclin_Spi_InterruptConfig | Structure for interrupt configuration
C IfxAsclin_Spi_Job | Structure for data transfer jobs
C IfxAsclin_Spi_Pins | Structure for SPI pin configuration
C IfxAsclin_Tx_Out | TX pin mapping structure
C IfxCcu6_Cc60_Out | CC60 pin mapping structure
C IfxCcu6_Cc60in_In | CC60IN pin mapping structure
C IfxCcu6_Cc61_Out | CC61 pin mapping structure
C IfxCcu6_Cc61in_In | CC61IN pin mapping structure
C IfxCcu6_Cc62_Out | CC62 pin mapping structure
C IfxCcu6_Cc62in_In | CC62IN pin mapping structure
C IfxCcu6_Ccpos0_In | CCPOS0 pin mapping structure
C IfxCcu6_Ccpos1_In | CCPOS1 pin mapping structure
C IfxCcu6_Ccpos2_In | CCPOS2 pin mapping structure
C IfxCcu6_Cout60_Out | COUT60 pin mapping structure
C IfxCcu6_Cout61_Out | COUT61 pin mapping structure
C IfxCcu6_Cout62_Out | COUT62 pin mapping structure
C IfxCcu6_Cout63_Out | COUT63 pin mapping structure
C IfxCcu6_Ctrap_In | CTRAP pin mapping structure
C IfxCcu6_Icu | Module handle
C IfxCcu6_Icu_Channel | Channel handle
C IfxCcu6_Icu_ChannelConfig | Configuration structure of the channel
C IfxCcu6_Icu_Clock | Structure for clock configuration
C IfxCcu6_Icu_Config | Configuration structure of the module
C IfxCcu6_Icu_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_Icu_Pins | Structure for capture input pins
C IfxCcu6_Icu_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_PwmBc | Module handle
C IfxCcu6_PwmBc_Config | Configuration structure of the module
C IfxCcu6_PwmBc_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_PwmBc_MultiChannelControl | Structure for multichannel mode control
C IfxCcu6_PwmBc_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_PwmBc_Timer12 | Structure for Timer 12
C IfxCcu6_PwmBc_Timer13 | Structure for Timer 13
C IfxCcu6_PwmBc_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxCcu6_PwmHl_Config | CCU6: PWM HL configuration
C IfxCcu6_PwmHl_Mode | Structure for PWM configuration
C IfxCcu6_PwmHl_s | CCU6 PWM driver
C IfxCcu6_T12hr_In | T12HR pin mapping structure
C IfxCcu6_T13hr_In | T13HR pin mapping structure
C IfxCcu6_Timer | Module handle
C IfxCcu6_Timer_Clock | Structure for clock configuration
C IfxCcu6_Timer_Config | Configuration structure of the module
C IfxCcu6_Timer_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_Timer_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_Timer_Timer12 | Structure for Timer 12
C IfxCcu6_Timer_Timer13 | Structure for Timer 13
C IfxCcu6_Timer_TriggerConfig | Configuration structure for external triggers
C IfxCcu6_TimerWithTrigger | CCU6 Timer interface
C IfxCcu6_TimerWithTrigger_Base | Structure for the timer base
C IfxCcu6_TimerWithTrigger_Config | Configuration structure for T12 and T13 Timer
C IfxCcu6_TPwm | Module handle
C IfxCcu6_TPwm_Clock | Structure for clock configuration
C IfxCcu6_TPwm_Config | Configuration structure of the module
C IfxCcu6_TPwm_InterruptConfig | Structure for interrupt configuration
C IfxCcu6_TPwm_Pins | Structure for CCU6 output pin configuration
C IfxCcu6_TPwm_Timer12 | Structure for Timer 12
C IfxCcu6_TPwm_Timer13 | Structure for Timer 13
C IfxCcu6_TPwm_TriggerConfig | Configuration structure for external triggers
C IfxCif_Cam | Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for run-time operations
C IfxCif_Cam_Common | Common configuration
C IfxCif_Cam_Config | Camera specific configuration
C IfxCif_Cam_Downscaling | Downscaler configuration
C IfxCif_Cam_JfifHeader | JPEG JFIF header structure
C IfxCif_Cam_JpegTable | Single component JPEG tables
C IfxCif_Cam_JpegTables | JPEG tables for all components
C IfxCif_Cam_MemAreas | All paths memory partitioning
C IfxCif_Cam_MemConfig | Single path memory interface configuration (used in initialisation/configuration)
C IfxCif_Cam_MemInfo | Single path memory interface information (used in Runtime)
C IfxCif_Cam_PictureInfo | Picture info
C IfxCif_Cam_TableInfo |
C IfxCif_Clk_In | CLK pin mapping structure
C IfxCif_D_In | D pin mapping structure
C IfxCif_Hsnc_In | HSNC pin mapping structure
C IfxCif_Vsnc_In | VSNC pin mapping structure
C IfxCpu_Counter | Counter
C IfxCpu_Perf | Performance counter result
C IfxCpu_Trap | Structure to contain the trap information
C IfxCpu_Trap_Id | Union to abstract Identification numbers under Traps
C IfxDma_Dma | DMA base address data structure (Module handle)
C IfxDma_Dma_Channel | Channel handle
C IfxDma_Dma_ChannelConfig | Configuration data structure of the channel
C IfxDma_Dma_Config | Configuration data structure of the Module
C IfxDsadc_Cgpwm_Out | CGPWM pin mapping structure
C IfxDsadc_Cin_In | CIN pin mapping structure
C IfxDsadc_Cout_Out | COUT pin mapping structure
C IfxDsadc_Din_In | DIN pin mapping structure
C IfxDsadc_Dsadc | DSADC handle data structure
C IfxDsadc_Dsadc_AuxFilterConfig | Auxiliary comb filter configuration structure
C IfxDsadc_Dsadc_CarrierGenConfig | Carrier generation configuration structure
C IfxDsadc_Dsadc_Channel | Channel handle structure
C IfxDsadc_Dsadc_ChannelConfig | Single channel configuration structure
C IfxDsadc_Dsadc_ChannelPins | Channel Pins Configuration structure
C IfxDsadc_Dsadc_CombFilterConfig | Comb filter configuration structure
C IfxDsadc_Dsadc_Config | Clock configuration data structure
C IfxDsadc_Dsadc_DemodulatorConfig | Demodulator configuration structure
C IfxDsadc_Dsadc_FirFilterConfig | FIR filters configuration structure
C IfxDsadc_Dsadc_IntegratorConfig | Integrator configuration structure
C IfxDsadc_Dsadc_ModulatorConfig | Modulator configuration structure
C IfxDsadc_Dsadc_RectifierConfig | Rectifier configuration structure
C IfxDsadc_Dsn_In | DS negative pin mapping structure
C IfxDsadc_Dsp_In | DS positive pin mapping structure
C IfxDsadc_Itr_In | ITR pin mapping structure
C IfxDsadc_Rdc | DSADC RDC data structure
C IfxDsadc_Rdc_Config | DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use default value
C IfxDsadc_Rdc_ConfigHw | RDC hardware configuration
C IfxDsadc_Rdc_GtmTimestamp | DSADC timestamp helper using GTM
C IfxDsadc_Rdc_Hw | DSADC RDC hardware object structure
C IfxDsadc_Rdc_Ts |
C IfxDsadc_Sg_In | SG pin mapping structure
C IfxDts_Dts_Config | DTS module configuration structure
C IfxEray_Eray | ERAY Module handle
C IfxEray_Eray_BufferReconfig | Reconfigurable buffer structure
C IfxEray_Eray_Config | Module configuration structure
C IfxEray_Eray_ControllerConfig | Communication Controller configuration structure
C IfxEray_Eray_Gtu01Config | GTU01 configuration
C IfxEray_Eray_Gtu02Config | GTU02 configuration
C IfxEray_Eray_Gtu03Config | GTU03 configuration
C IfxEray_Eray_Gtu04Config | GTU04 configuration
C IfxEray_Eray_Gtu05Config | GTU05 configuration
C IfxEray_Eray_Gtu06Config | GTU06 configuration
C IfxEray_Eray_Gtu07Config | GTU07 configuration
C IfxEray_Eray_Gtu08Config | GTU08 configuration
C IfxEray_Eray_Gtu09Config | GTU09 configuration
C IfxEray_Eray_Gtu10Config | GTU10 configuration
C IfxEray_Eray_Gtu11Config | GTU11 configuration
C IfxEray_Eray_GTUConfig | Gloabl Timing Unit configuration structure
C IfxEray_Eray_Interrupt | Interrupt control properties
C IfxEray_Eray_MessageRAMConfig | Message RAM configuration structure
C IfxEray_Eray_NodeA | Pins configuration structure for Node A
C IfxEray_Eray_NodeB | Pins configuration structure for Node B
C IfxEray_Eray_NodeConfig | Node configuration structure
C IfxEray_Eray_Pins | Pins configuration structure
C IfxEray_Eray_Prtc1Control | Protocol operation control properties
C IfxEray_Eray_Prtc2Control | Wakeup symbol control properties
C IfxEray_Eray_ReceiveControl | Receive control properties structure
C IfxEray_Eray_ReceivedFrame | Received Frame
C IfxEray_Eray_Succ1Config | Communication controller control properties
C IfxEray_Eray_Succ2Config | Communication listen timeout properties
C IfxEray_Eray_Succ3Config | Clock correction fail properties
C IfxEray_Eray_TransmitControl | Transfer control in a slot
C IfxEray_Header | Header section in a frame
C IfxEray_ReceivedHeader | Received header in a frame
C IfxEray_Rxd_In | RXD pin mapping structure
C IfxEray_SlotConfig | Transmit control structure
C IfxEray_Txd_Out | TXD pin mapping structure
C IfxEray_Txen_Out | TXEN pin mapping structure
C IfxEth | ETH driver structure
C IfxEth_AltRxDescr0_Bits | Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access
C IfxEth_AltRxDescr1_Bits | Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access
C IfxEth_AltTxDescr0_Bits | Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access
C IfxEth_AltTxDescr1_Bits | Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access
C IfxEth_Col_In | COL pin mapping structure
C IfxEth_Config | ETH configuration structure
C IfxEth_Crs_In | CRS pin mapping structure
C IfxEth_Crsdv_In | CRSDV pin mapping structure
C IfxEth_Mdc_Out | MDC pin mapping structure
C IfxEth_Mdio_InOut | MDIO pin mapping structure
C IfxEth_MiiPins | Port pins for MII mode configuration
C IfxEth_Refclk_In | REFCLK pin mapping structure
C IfxEth_RingModeBuffersConfig | Configuration structure for Ring Mode descriptors
C IfxEth_RingModeRxBuffersConfig | Configuration structure for Ring Mode Receive Buffers
C IfxEth_RingModeTxBuffersConfig | Configuration structure for Ring Mode Transmit buffers
C IfxEth_RmiiPins | Port pins for RMII mode configuration
C IfxEth_Rxclk_In | RXCLK pin mapping structure
C IfxEth_Rxd_In | RXD pin mapping structure
C IfxEth_RxDescr | Normal RX descriptor
C IfxEth_RxDescr0 | Union for RX descriptor DWORD 0
C IfxEth_RxDescr0_Bits | Structure for RX descriptor DWORD 0 Bit field access
C IfxEth_RxDescr1 | Union for RX descriptor DWORD 1
C IfxEth_RxDescr1_Bits | Structure for RX descriptor DWORD 1 Bit field access
C IfxEth_RxDescr2 | Union for RX descriptor DWORD 2
C IfxEth_RxDescr3 | Union for RX descriptor DWORD 3
C IfxEth_RxDescrList |
C IfxEth_Rxdv_In | RXDV pin mapping structure
C IfxEth_Rxer_In | RXER pin mapping structure
C IfxEth_Txclk_In | TXCLK pin mapping structure
C IfxEth_Txd_Out | TXD pin mapping structure
C IfxEth_TxDescr | Normal TX descriptor
C IfxEth_TxDescr0 | Union for TX descriptor DWORD 0
C IfxEth_TxDescr0_Bits | Structure for TX descriptor DWORD 0 Bit field access
C IfxEth_TxDescr1 | Union for TX descriptor DWORD 1
C IfxEth_TxDescr1_Bits | Structure for TX descriptor DWORD 1 Bit field access
C IfxEth_TxDescr2 | Union for TX descriptor DWORD 2
C IfxEth_TxDescr3 | Union for TX descriptor DWORD 3
C IfxEth_TxDescrList |
C IfxEth_Txen_Out | TXEN pin mapping structure
C IfxEth_Txer_Out | TXER pin mapping structure
C IfxFce_Crc | FCE Module Handle;
C IfxFce_Crc_Config | Configuration structure of the module
C IfxFce_Crc_Crc | Specifies the pointer to FCE module handler
C IfxFce_Crc_CrcConfig | Specifies the module configuration structure
C IfxFce_Crc_EnabledInterrupts | Specifies the interrupt enable structure
C IfxFft_Fft | Module handle
C IfxFft_Fft_Config | Configuration structure of the module
C IfxFft_Fft_Count64 | Structure for counters
C IfxFft_Fft_Job_s | FFT job handle
C IfxFft_Fft_JobConfig | Configuration structure for the FFT job
C IfxFlash_ErrorTracking_Address | Error tracking address structure
C IfxFlash_flashSector | Start and end address of sectors
C IfxGpt12_Capin_In | CAPIN pin mapping structure
C IfxGpt12_IncrEnc | Incremental encoder object
C IfxGpt12_IncrEnc_Config | Configuration structure for GPT12
C IfxGpt12_TxEud_In | TxEUD pin mapping structure
C IfxGpt12_TxIn_In | TxIN pin mapping structure
C IfxGpt12_TxOut_Out | TxOUT pin mapping structure
C IfxGtm_Atom_Pwm_Config | Configuration structure
C IfxGtm_Atom_Pwm_Driver | Driver Handle
C IfxGtm_Atom_Pwm_Interrupt | Configuration structure for interrupts
C IfxGtm_Atom_Pwm_pin | Configuration structure for output pin
C IfxGtm_Atom_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxGtm_Atom_PwmHl_Config | GTM ATOM: PWM HL configuration
C IfxGtm_Atom_PwmHl_Mode | Structure for PWM configuration
C IfxGtm_Atom_PwmHl_s | GTM ATOM PWM driver
C IfxGtm_Atom_Timer | TOM Timer interface
C IfxGtm_Atom_Timer_Base | Structure for the timer base
C IfxGtm_Atom_Timer_Config | Configuration structure for TOM Timer
C IfxGtm_Atom_ToutMap | ATOM TOUT pin mapping structure
C IfxGtm_Clk_Out | GTM Clock Output
C IfxGtm_Tim_In | Driver Handle
C IfxGtm_Tim_In_Config | Configuration structure for TIM input capture
C IfxGtm_Tim_In_ConfigCapture | Configuration structure for TIM capture
C IfxGtm_Tim_In_ConfigFilter | Configuration structure for TIM filter
C IfxGtm_Tim_In_ConfigTimeout | Configuration structure for TIM timeout
C IfxGtm_Tim_TinMap | TIN pin mapping structure
C IfxGtm_Tom_Pwm_Config | Configuration structure
C IfxGtm_Tom_Pwm_Driver | Driver Handle
C IfxGtm_Tom_Pwm_Interrupt | Configuration structure for interrupts
C IfxGtm_Tom_Pwm_pin | Configuration structure for output pin
C IfxGtm_Tom_PwmHl_Base | Multi-channels PWM object definition (channels only)
C IfxGtm_Tom_PwmHl_Config | GTM TOM: PWM HL configuration
C IfxGtm_Tom_PwmHl_Mode | Structure for PWM configuration
C IfxGtm_Tom_PwmHl_s | GTM TOM PWM driver
C IfxGtm_Tom_TGC | TOM TGC objects
C IfxGtm_Tom_Timer | TOM Timer interface Handle
C IfxGtm_Tom_Timer_Base | Structure for the timer base
C IfxGtm_Tom_Timer_Config | Configuration structure for TOM Timer
C IfxGtm_Tom_ToutMap | TOM TOUT pin mapping structure
C IfxGtm_Trig_AdcTrig_Table |
C IfxGtm_Trig_Channel |
C IfxGtm_Trig_Source |
C IfxGtm_Trig_Trigger |
C IfxHssl_Hsct | HSCT module handle
C IfxHssl_Hsct_Config | Configuration structure of the HSCT module
C IfxHssl_Hssl | HSSL Handle
C IfxHssl_Hssl_AccessWindow | Structure for access windows
C IfxHssl_Hssl_Channel | Channel handle
C IfxHssl_Hssl_ChannelConfig | Configuration structure for channel
C IfxHssl_Hssl_Config | Configuration structure of the HSSL module
C IfxHssl_Hssl_errorFlags | Structure for error flags
C IfxI2c_I2c | Handler
C IfxI2c_I2c_Config | Structure to configure the Module
C IfxI2c_I2c_Device | Structure with slave device data
C IfxI2c_I2c_deviceConfig | Structure to configure the device's data structure
C IfxI2c_Pins | Pin Structure
C IfxI2c_Scl_InOut | SCL input mapping structure
C IfxI2c_Sda_InOut | SDA input mapping structure
C IfxIom_Driver | IOM driver
C IfxIom_Driver_Config | IOM Driver Configuration
C IfxIom_Driver_Lam | IOM LAM object
C IfxIom_Driver_LamConfig | IOM LAM configuration
C IfxIom_Driver_LamEventConfig | IOM LAM event configuration
C IfxIom_Driver_LamEventWindowConfig | IOM LAM event window configuration
C IfxIom_Driver_LamFilterConfig | IOM LAM filter configuration
C IfxIom_Driver_LamMonConfig | IOM LAM monitor input configuration
C IfxIom_Driver_LamRefConfig | IOM LAM reference input configuration
C IfxModule_IndexMap | Module address and index map
C IfxMsc_En_Out | EN pin mapping structure
C IfxMsc_Fcln_Out | FCLN pin mapping structure
C IfxMsc_Fclp_Out | FCLP pin mapping structure
C IfxMsc_Inj_In | INJ pin mapping structure
C IfxMsc_Msc | MSC base address data Structure
C IfxMsc_Msc_Abra | ABRA block Configuration Structure
C IfxMsc_Msc_Clock | Clock configuration data Structure
C IfxMsc_Msc_Config | MSC Module Configuration Structure
C IfxMsc_Msc_DownstreamControlConfig | Downstream Control Configuration Structure
C IfxMsc_Msc_DownstreamControlExtensionConfig | Downstream Control Extension Configuration Structure
C IfxMsc_Msc_en |
C IfxMsc_Msc_fcln |
C IfxMsc_Msc_fclp |
C IfxMsc_Msc_inj0 |
C IfxMsc_Msc_inj1 |
C IfxMsc_Msc_InterruptConfig | Interrupt Configuration Structure
C IfxMsc_Msc_Io | MSC Pin Configuration Structure
C IfxMsc_Msc_OutputControlConfig | Output Control Configuration Structure
C IfxMsc_Msc_sdi |
C IfxMsc_Msc_son |
C IfxMsc_Msc_sop |
C IfxMsc_Msc_UpstreamStatusConfig | Upstream Control Configuration Structure
C IfxMsc_Sdi_In | SDI pin mapping structure
C IfxMsc_Son_Out | SON pin mapping structure
C IfxMsc_Sop_Out | SOP pin mapping structure
C IfxMtu_SramItem | Describes physical parameters of a SRAM memory
C IfxMultican_Can | CAN handle data structure
C IfxMultican_Can_Config | CAN module configuration
C IfxMultican_Can_FdConfig | Structure for CAN FD configuration
C IfxMultican_Can_GatewayConfig | Structure for gateway configuration
C IfxMultican_Can_InterruptConfig | Structure for interrupt configuration
C IfxMultican_Can_InterruptSource | Structure for interrupt source
C IfxMultican_Can_MsgObj | CAN message object handle data structure
C IfxMultican_Can_MsgObjConfig | CAN message object configuration
C IfxMultican_Can_MsgObjControl | Message object control
C IfxMultican_Can_Node | CAN node handle data structure
C IfxMultican_Can_NodeConfig | CAN Node configuration
C IfxMultican_Message | CAN message definition
C IfxMultican_MsgObjStat | Message object status bit-fields
C IfxMultican_Rxd_In | RXD pin mapping structure
C IfxMultican_Txd_Out | TXD pin mapping structure
C IfxPort_Esr_Masks | Used by IfxPort_Esr_Masks table
C IfxPort_Io_Config |
C IfxPort_Io_ConfigPin |
C IfxPort_Pin | Defines a pin
C IfxPort_Pin_Config | To configure pins
C IfxPsi5_Psi5 | PSI5 handle data structure
C IfxPsi5_Psi5_Channel | Channel handle data structure
C IfxPsi5_Psi5_ChannelConfig | Channel configuration structure
C IfxPsi5_Psi5_ChannelTrigger | Channel trigger configuration structure
C IfxPsi5_Psi5_Clock | Clock configuration data structure
C IfxPsi5_Psi5_Config | PSI5 module configuration structure
C IfxPsi5_Psi5_Frame | Psi5 frame data union
C IfxPsi5_Psi5_FrameData | Psi5 frame data structure with individual members
C IfxPsi5_Psi5_InputOutputControl | Input output configuration structure
C IfxPsi5_Psi5_Message | Psi5 serial message with individual members
C IfxPsi5_Psi5_PinsConfig | Pin Configuration structure
C IfxPsi5_Psi5_PulseGeneration | Sync pulse generation configuration structure
C IfxPsi5_Psi5_Rdm | Psi5 frame in double word format
C IfxPsi5_Psi5_Rds | Psi5 serial message as unsigned 32 bit value
C IfxPsi5_Psi5_ReceiveControl | Receive control configuration structure
C IfxPsi5_Psi5_SerialMessage | Psi5 serial message data structure
C IfxPsi5_Psi5_StartupOptions | Startup related options TBD
C IfxPsi5_Psi5_TimeStampConfig | Timestamp configuration data structure
C IfxPsi5_Psi5_TransmitControl | Transmit control configuration structure
C IfxPsi5_Rx_In | RX pin mapping structure
C IfxPsi5_Tx_Out | TX pin mapping structure
C IfxPsi5s_Clk_Out | CLK pin mapping structure
C IfxPsi5s_Psi5s | PSI5S handle data structure
C IfxPsi5s_Psi5s_AscConfig | PSI5S module configuration structure
C IfxPsi5s_Psi5s_Channel | Channel handle data structure
C IfxPsi5s_Psi5s_ChannelConfig | Channel configuration structure
C IfxPsi5s_Psi5s_ChannelTrigger | Channel trigger configuration structure
C IfxPsi5s_Psi5s_Clock | Clock configuration data structure
C IfxPsi5s_Psi5s_Config | PSI5S module configuration structure
C IfxPsi5s_Psi5s_Frame | Psi5s frame data structure
C IfxPsi5s_Psi5s_GlobalControlConfig | PSI5S global control configuration structure
C IfxPsi5s_Psi5s_Pins | Structure for PSI5S pin configuration
C IfxPsi5s_Psi5s_PulseGeneration | Sync pulse generation configuration structure
C IfxPsi5s_Psi5s_ReceiveControl | Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers
C IfxPsi5s_Psi5s_ReceiveData | "Received data" data structure
C IfxPsi5s_Psi5s_ReceivedBits | Received individual bits
C IfxPsi5s_Psi5s_ReceivedData | Receive data structure with different segments of data
C IfxPsi5s_Psi5s_ReceiveStatus | Receiver status data structure
C IfxPsi5s_Psi5s_ReceiveTimestamp | Receiver timestamp data structure
C IfxPsi5s_Psi5s_Timestamp | Received timestamp contents structure
C IfxPsi5s_Psi5s_TimeStampConfig | Timestamp configuration data structure
C IfxPsi5s_Psi5s_TransmitControl | Transmit control configuration structure
C IfxPsi5s_Rx_In | RX pin mapping structure
C IfxPsi5s_Tx_Out | TX pin mapping structure
C IfxQspi_DelayConst | Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calculation
C IfxQspi_Hsicin_In | HSICIN pin mapping structure
C IfxQspi_Mrst_In | MRST pin mapping structure
C IfxQspi_Mrst_Out | MRST pin mapping structure
C IfxQspi_Mtsr_In | MTSR pin mapping structure
C IfxQspi_Mtsr_Out | MTSR pin mapping structure
C IfxQspi_Sclk_In | SCLK pin mapping structure
C IfxQspi_Sclk_Out | SCLK pin mapping structure
C IfxQspi_Slsi_In | SLSI pin mapping structure
C IfxQspi_Slso_Out | SLSO pin mapping structure
C IfxQspi_SpiMaster | Module handle data structure
C IfxQspi_SpiMaster_Channel_s | Module Channel handle structure
C IfxQspi_SpiMaster_ChannelConfig | Module Channel configuration structure
C IfxQspi_SpiMaster_Config | Module configuration structure
C IfxQspi_SpiMaster_Dma | Dma handle
C IfxQspi_SpiMaster_DmaConfig | Dma configuration
C IfxQspi_SpiMaster_ErrorFlags | Qspi Master Mode Error Flags
C IfxQspi_SpiMaster_Input | SLSI pin configuration structure
C IfxQspi_SpiMaster_InputOutput | Union of Slave Select pins
C IfxQspi_SpiMaster_Output | SLSO pin configuration structure
C IfxQspi_SpiMaster_Pins | Master pin IO configuration structure
C IfxQspi_SpiSlave | Module handle data structure
C IfxQspi_SpiSlave_Config | Module configuration structure
C IfxQspi_SpiSlave_Dma | Dma handle
C IfxQspi_SpiSlave_DmaConfig | Dma configuration
C IfxQspi_SpiSlave_ErrorFlags | Qspi Slave Mode Error Flags
C IfxQspi_SpiSlave_Pins | Slave pin IO configuration structure
C IfxQspi_SpiSlave_Protocol | Configures the SPI Protocol
C IfxScu_Dcdcsync_Out | DCDC Sync pin mapping structure
C IfxScu_Emgstop_In | Emergency Stop pin mapping structure
C IfxScu_Evrwup_In | EVR Wakeup pin mapping structure
C IfxScu_Extclk_Out | External Clock pin mapping structure
C IfxScu_Hwcfg_In | Hardware Configuration pin mapping structure
C IfxScu_Req_In | External Request pin mapping structure
C IfxScu_Wdtlck_Out | Watchdog Timer Lock pin mapping structure
C IfxScuCcu_CcuconRegConfig | Configuration structure type for CCUCON registers
C IfxScuCcu_ClockDistributionConfig | Configuration structure type for all the CCUCON registers to configure clock distribution
C IfxScuCcu_Config | Configuration structure SCU module
C IfxScuCcu_ErayPllConfig | Configuration structure for E-ray PLL
C IfxScuCcu_FlashWaitstateConfig | Configuration structure type for the Flash waitstate configuration
C IfxScuCcu_InitialStepConfig | Configuration structure type for the Pll initial step. This structure must be used to configure the P, N and K2 dividers for initial step
C IfxScuCcu_PllStepsConfig | Configuration structure type for the Pll Steps for current jump control
C IfxScuCcu_SysPllConfig | Configuration structure type for the System Pll step. This structure must be used to configure the P, N and K1 dividers
C IfxScuWdt_Config | Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structure of CPU and Safety WDT registers defined in IfxScuWdt.h file
C IfxSent_Sent | Specifies SENT handle structure
C IfxSent_Sent_Channel | Specifies the SENT Channel handle structure
C IfxSent_Sent_ChannelConfig | Specifies the SENT Channel configuration structure
C IfxSent_Sent_Config | Specifies the SENT module configuration structure
C IfxSent_Sent_Enable | Specifies the Interrupt type enables structure
C IfxSent_Sent_EnabledInterrupts | Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member
C IfxSent_Sent_Frame | Specifies the frame configuration structure for a channel
C IfxSent_Sent_In | SENT pin mapping structure
C IfxSent_Sent_InputOutputControl | Specifies the input output control properties
C IfxSent_Sent_Interrupt | Specifies the interrupt control properties
C IfxSent_Sent_InterruptNodeControl | Specifies the interrupt control properties structure
C IfxSent_Sent_NibbleControl | Specifies the received nibbles control properties
C IfxSent_Sent_Pins | Specifies the pins configuration for SENT channel
C IfxSent_Sent_ReceiveControl | Specifies the receive control properties
C IfxSent_Sent_SerialMessageFrame | Specifies received message frame
C IfxSent_Sent_TransmitControl | Specifies the SPC channel properties structure
C IfxSent_Spc_Out | SPC pin mapping structure
C IfxSmu_configFsp | FSP Configuration Structure
C IfxSmu_Fsp_Out | Fault Signal Protocol Pin
C IfxStdIf_DPipe_ | Standard interface object
C IfxStdIf_Pos_ | Standard interface object
C IfxStdIf_Pos_Config | Position interface configuration
C IfxStdIf_Pos_Status | Position sensor status definition
C IfxStdIf_Pos_Status.B |
C IfxStdIf_PwmHl_ | Standard interface object
C IfxStdIf_PwmHl_Config | Multi-channels PWM object configuration
C IfxStdIf_Timer_ | Standard interface object
C IfxStdIf_Timer_Config | Timer configuration
C IfxStdIf_Timer_TrigConfig | Trigger configuration
C IfxStm_CompareConfig | Comparator Configuration Structure
C IfxStm_Timer | Timer interface
C IfxStm_Timer_Base | Structure for the timer base
C IfxStm_Timer_Config | Configuration structure for Timer
C IfxVadc_Adc | VADC handle data structure
C IfxVadc_Adc_ArbiterConfig | Arbiter configuration structure
C IfxVadc_Adc_BackgroundScanConfig | Background scan mode configuration structure
C IfxVadc_Adc_Channel | Channel handle data structure
C IfxVadc_Adc_ChannelConfig | Channel configuration structure
C IfxVadc_Adc_ClassConfig | Input class configuration structure
C IfxVadc_Adc_Config | VADC module configuration structure
C IfxVadc_Adc_EmuxControl | Emux Control Structure
C IfxVadc_Adc_EmuxPinConfig |
C IfxVadc_Adc_GatingTriggerConfig | Gating/Trigger configuration structure
C IfxVadc_Adc_Group | Group handle data structure
C IfxVadc_Adc_GroupConfig | Group configuration structure
C IfxVadc_Adc_QueueConfig | Queue configuration structure
C IfxVadc_Adc_ScanConfig | Scan mode configuration structure
C IfxVadc_Emux_Out | VADC External Mux pin mapping structure
C IfxVadc_GxBfl_Out | VADC Boundary Flag pin mapping structure
C IfxVadc_Vadcg_In | VADC Analog Input
C PwmHl_Config | Configuration structure of the TPwm interface
C PwmHl_Functions |
C PwmHl_s | Structure of the TPwm interface
C Spi_ErrorChecks |
C SpiIf_ |
C SpiIf_Ch_ |
C SpiIf_ChConfig_ |
C SpiIf_ChMode |
C SpiIf_Config |
C SpiIf_Flags |
C SpiIf_funcs |
C SpiIf_Job |
C Timer_Config | Configuration structure of the Timer interface
C Timer_Functions |
C Timer_s | Structure of the Timer interface
C TPwm_Config | Configuration structure of the TPwm interface
C TPwm_Functions |
C TPwm_s | Structure of the TPwm interface


iLLD_TC26B: Ifx_Types.h File Reference

  • Cpu
  • Std
Data Structures | Macros | Typedefs | Enumerations
Ifx_Types.h File Reference

This files defines all types used by the IFX HAL and libraries. More...

#include "Tricore/Compilers/Compilers.h"
#include "Platform_Types.h"
Include dependency graph for Ifx_Types.h:

Go to the source code of this file.

Data Structures

struct | cfloat32
struct | csint32
struct | csint16
struct | Ifx_CircularBuffer
Circular buffer definition. More...
struct | Ifx_IsrSetting
struct | IfxModule_IndexMap
Module address and index map. More...
struct | Ifx_DataBufferMode_TimeStampSingle
struct | cfract
struct | csfract

Macros

#define | TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)
#define | TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)
#define | IFX_ONES (0xFFFFFFFFFFFFFFFFU)
#define | IFX_ZEROS (0x0000000000000000U)
#define | IFX_SIZET_MAX (0x7FFF)
#define | IFX_PI (3.1415926535897932384626433832795f)
#define | IFX_TWO_OVER_PI (2.0 / IFX_PI)
#define | IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)
#define | IFX_SQRT_TWO (1.4142135623730950488016887242097f)
#define | IFX_SQRT_THREE (1.7320508075688772935274463415059f)
#define | IFX_UNUSED_PARAMETER(x) if(x){}
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc) More...

Typedefs

typedef const char * | pchar
const char pointer More...
typedef void * | pvoid
void pointer More...
typedef volatile void * | vvoid
volatile void pointer More...
typedef void(* | voidfuncvoid) (void)
void pointer which takes void argument More...
typedef sint64 | Ifx_TickTime
Time in ticks. More...
typedef sint16 | Ifx_SizeT
Type used for data stream size. More...
typedef uint16 | Ifx_Priority
Used in interrupt service priorities. More...
typedef uint32 | Ifx_TimerValue
Used in timer values. More...
typedef sint32 | Ifx_SignedTimerVal
Used in signed timer values. More...
typedef pvoid | Ifx_AddressValue
Used in address values. More...

Enumerations

enum Ifx_ActiveState {
Ifx_ActiveState_low = 0,
Ifx_ActiveState_high = 1
}
Signal active state definition. More...
enum Ifx_ParityMode {
Ifx_ParityMode_even = 0,
Ifx_ParityMode_odd = 1
}
enum Ifx_RxSel {
Ifx_RxSel_a,
Ifx_RxSel_b,
Ifx_RxSel_c,
Ifx_RxSel_d,
Ifx_RxSel_e,
Ifx_RxSel_f,
Ifx_RxSel_g,
Ifx_RxSel_h
}
input multiplexer definition used in PinMaps More...
enum Ifx_DataBufferMode {
Ifx_DataBufferMode_normal = 0,
Ifx_DataBufferMode_timeStampSingle
}
enum Ifx_Pwm_Mode {
Ifx_Pwm_Mode_centerAligned = 0,
Ifx_Pwm_Mode_centerAlignedInverted = 1,
Ifx_Pwm_Mode_leftAligned = 2,
Ifx_Pwm_Mode_rightAligned = 3,
Ifx_Pwm_Mode_off = 4,
Ifx_Pwm_Mode_init = 5,
Ifx_Pwm_Mode_count
}

Detailed Description

This files defines all types used by the IFX HAL and libraries.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Types.h.

Data Structure Documentation

◆ cfloat32

struct cfloat32

Definition at line 41 of file Ifx_Types.h.

Data Fields
float32 | imag | Imaginary part.
float32 | real | Real part.

◆ csint32

struct csint32

Definition at line 47 of file Ifx_Types.h.

Data Fields
sint32 | imag | Imaginary part.
sint32 | real | Real part.

◆ csint16

struct csint16

Definition at line 53 of file Ifx_Types.h.

Data Fields
sint16 | imag | Imaginary part.
sint16 | real | Real part.

◆ Ifx_CircularBuffer

struct Ifx_CircularBuffer

Circular buffer definition.

Definition at line 76 of file Ifx_Types.h.

Data Fields
void * | base | buffer base address
uint16 | index | buffer current index
uint16 | length | buffer length

◆ Ifx_IsrSetting

struct Ifx_IsrSetting

Definition at line 89 of file Ifx_Types.h.

Data Fields
uint16 | priority
uint16 | provider

◆ IfxModule_IndexMap

struct IfxModule_IndexMap

Module address and index map.

Definition at line 123 of file Ifx_Types.h.

Data Fields
sint32 | index | Module index.
volatile void * | module | Module address.

◆ Ifx_DataBufferMode_TimeStampSingle

struct Ifx_DataBufferMode_TimeStampSingle

Definition at line 129 of file Ifx_Types.h.

Data Fields
uint8 | data
Ifx_TickTime | timestamp

◆ cfract

struct cfract

Definition at line 188 of file Ifx_Types.h.

Data Fields
fract | imag | Imaginary part.
fract | real | Real part.

◆ csfract

struct csfract

Definition at line 194 of file Ifx_Types.h.

Data Fields
sfract | imag | Imaginary part.
sfract | real | Real part.

Macro Definition Documentation

◆ IFX_ONE_OVER_SQRT_THREE

#define IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)

Definition at line 202 of file Ifx_Types.h.

◆ IFX_ONES

#define IFX_ONES (0xFFFFFFFFFFFFFFFFU)

Definition at line 63 of file Ifx_Types.h.

◆ IFX_PI

#define IFX_PI (3.1415926535897932384626433832795f)

Definition at line 200 of file Ifx_Types.h.

Referenced by Ifx_AngleTrkF32_bound(), Ifx_AngleTrkF32_getAbsolutePosition(), Ifx_AngleTrkF32_init(), Ifx_AngleTrkF32_initConfig(), Ifx_AngleTrkF32_update(), Ifx_FftF32_generateTwiddleFactor(), Ifx_LutAtan2F32_float32(), Ifx_LutSincosF32_init(), IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_update(), IfxGpt12_IncrEnc_getAbsolutePosition(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGpt12_IncrEnc_setRefreshPeriod(), IfxStdIf_Pos_initConfig(), IfxStdIf_Pos_radsToRpm(), and IfxStdIf_Pos_rpmToRads().

◆ IFX_SIZET_MAX

#define IFX_SIZET_MAX (0x7FFF)

Definition at line 71 of file Ifx_Types.h.

Referenced by Ifx_Fifo_init().

◆ IFX_SQRT_THREE

#define IFX_SQRT_THREE (1.7320508075688772935274463415059f)

Definition at line 204 of file Ifx_Types.h.

◆ IFX_SQRT_TWO

#define IFX_SQRT_TWO (1.4142135623730950488016887242097f)

Definition at line 203 of file Ifx_Types.h.

◆ IFX_TWO_OVER_PI

#define IFX_TWO_OVER_PI (2.0 / IFX_PI)

Definition at line 201 of file Ifx_Types.h.

◆ IFX_UNUSED_PARAMETER

#define IFX_UNUSED_PARAMETER ( x ) if(x){}

Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc)

Definition at line 205 of file Ifx_Types.h.

Referenced by Ifx_AngleTrkF32_bound(), Ifx_AngleTrkF32_getSensorType(), IfxCcu6_PwmHl_setOutputPins(), IfxCcu6_PwmHl_updateOff(), IfxCcu6_TimerWithTrigger_disableUpdate(), IfxCif_Cam_enableJpegEncoder(), IfxCif_setInputInterface(), IfxCpu_updatePerformanceCounter(), IfxDma_getErrPointer(), IfxDma_getSrcPointer(), IfxEray_getInputBufferBusySrcPtr(), IfxEray_getInterruptLine0SrcPtr(), IfxEray_getInterruptLine1SrcPtr(), IfxEray_getMessageBufferStatus0SrcPtr(), IfxEray_getMessageBufferStatus1SrcPtr(), IfxEray_getNewDataInterrupt0SrcPtr(), IfxEray_getNewDataInterrupt1SrcPtr(), IfxEray_getOutputBufferBusySrcPtr(), IfxEray_getTimerInterrupt0SrcPtr(), IfxEray_getTimerInterrupt1SrcPtr(), IfxEray_setNewDataInterruptDestination(), IfxFce_getSrcPointer(), IfxFlash_clearStatus(), IfxFlash_disableWriteProtection(), IfxFlash_loadPage(), IfxFlash_loadPage2X32(), IfxFlash_resetToRead(), IfxFlash_resumeProtection(), IfxGpt12_getCaptureSrc(), IfxGpt12_getModuleFrequency(), IfxGpt12_IncrEnc_getPeriodPerRotation(), IfxGpt12_IncrEnc_getSensorType(), IfxGpt12_T2_getSrc(), IfxGpt12_T3_getSrc(), IfxGpt12_T4_getSrc(), IfxGpt12_T5_getSrc(), IfxGpt12_T6_getSrc(), IfxGtm_Atom_Ch_getSrcPointer(), IfxGtm_Atom_PwmHl_setupChannels(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), IfxGtm_Atom_PwmHl_updateOff(), IfxGtm_Atom_PwmHl_updatePulseOff(), IfxGtm_Dpll_getSubIncFrequency(), IfxGtm_Tim_Ch_getSrcPointer(), IfxGtm_Tom_Ch_getSrcPointer(), IfxGtm_Tom_PwmHl_setupChannels(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), IfxGtm_Tom_PwmHl_updateOff(), IfxGtm_Tom_PwmHl_updatePulseOff(), IfxHssl_getHsctSrcPointer(), IfxHssl_getHsslCOKSrcPointer(), IfxHssl_getHsslERRSrcPointer(), IfxHssl_getHsslEXISrcPointer(), IfxHssl_getHsslRDISrcPointer(), IfxHssl_getHsslTRGSrcPointer(), IfxHssl_Hssl_delay(), IfxIom_getFrequency(), IfxMsc_downstreamFractionalBaudCalculator(), IfxMsc_downstreamNormalBaudCalculator(), IfxPort_setGroupModeOutput(), IfxPsi5_getSrcPointer(), IfxPsi5_Psi5_startupChannel(), IfxQspi_calculateBasicConfigurationValue(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_enableLoopbackMode(), IfxQspi_getModuleFrequency(), IfxStdIf_PwmHl_setupChannels(), and IfxStm_getFrequency().

◆ IFX_ZEROS

#define IFX_ZEROS (0x0000000000000000U)

Definition at line 64 of file Ifx_Types.h.

Referenced by IfxGtm_Atom_Ch_setNotification(), and IfxGtm_Tom_Ch_setNotification().

◆ TIME_INFINITE

#define TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)

Definition at line 60 of file Ifx_Types.h.

Referenced by addTTime(), getDeadLine(), getTimeout(), Ifx_Console_print(), Ifx_Console_printAlign(), IfxAsclin_Asc_blockingRead(), IfxAsclin_Asc_blockingWrite(), IfxStdIf_DPipe_print(), isDeadLine(), now(), and nowWithoutCriticalSection().

◆ TIME_NULL

#define TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)

Definition at line 61 of file Ifx_Types.h.

Referenced by Ifx_Shell_process(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_isrReceive(), and IfxAsclin_Asc_isrTransmit().

Typedef Documentation

◆ Ifx_AddressValue

typedef pvoid Ifx_AddressValue

Used in address values.

Definition at line 87 of file Ifx_Types.h.

◆ Ifx_Priority

typedef uint16 Ifx_Priority

Used in interrupt service priorities.

Definition at line 83 of file Ifx_Types.h.

◆ Ifx_SignedTimerVal

typedef sint32 Ifx_SignedTimerVal

Used in signed timer values.

Definition at line 85 of file Ifx_Types.h.

◆ Ifx_SizeT

typedef sint16 Ifx_SizeT

Type used for data stream size.

Definition at line 72 of file Ifx_Types.h.

◆ Ifx_TickTime

typedef sint64 Ifx_TickTime

Time in ticks.

Definition at line 59 of file Ifx_Types.h.

◆ Ifx_TimerValue

typedef uint32 Ifx_TimerValue

Used in timer values.

Definition at line 84 of file Ifx_Types.h.

◆ pchar

typedef const char* pchar

const char pointer

Definition at line 36 of file Ifx_Types.h.

◆ pvoid

typedef void* pvoid

void pointer

Definition at line 37 of file Ifx_Types.h.

◆ voidfuncvoid

typedef void(* voidfuncvoid) (void)

void pointer which takes void argument

Definition at line 39 of file Ifx_Types.h.

◆ vvoid

typedef volatile void* vvoid

volatile void pointer

Definition at line 38 of file Ifx_Types.h.

Enumeration Type Documentation

◆ Ifx_ActiveState

enum Ifx_ActiveState

Signal active state definition.

Enumerator
Ifx_ActiveState_low | The signal is low active.
Ifx_ActiveState_high | The signal is high active.

Definition at line 96 of file Ifx_Types.h.

◆ Ifx_DataBufferMode

enum Ifx_DataBufferMode
Enumerator
Ifx_DataBufferMode_normal | normal mode, each received byte is moved to the rx fifo
Ifx_DataBufferMode_timeStampSingle | Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items.

Definition at line 144 of file Ifx_Types.h.

◆ Ifx_ParityMode

enum Ifx_ParityMode
Enumerator
Ifx_ParityMode_even
Ifx_ParityMode_odd

Definition at line 102 of file Ifx_Types.h.

◆ Ifx_Pwm_Mode

enum Ifx_Pwm_Mode

Defines the PWM modes

The 1st member shall start with value 0, and the next members value shall be the previous member +1 pwmMode_off shall be the member with the higher index

Note
enum order and values should not be modified, except Ifx_Pwm_Mode_init and Ifx_Pwm_Mode_count
Enumerator
Ifx_Pwm_Mode_centerAligned | Center aligned mode.
Ifx_Pwm_Mode_centerAlignedInverted | Center aligned inverted aligned mode.
Ifx_Pwm_Mode_leftAligned | Left aligned mode. The PWM period starts with a rising edge.
Ifx_Pwm_Mode_rightAligned | Right aligned mode. The PWM period starts with a falling edge.
Ifx_Pwm_Mode_off | All switch open.
Ifx_Pwm_Mode_init | Initialisation mode, do not use at run time.
Ifx_Pwm_Mode_count | Number of defined modes.

Definition at line 158 of file Ifx_Types.h.

◆ Ifx_RxSel

enum Ifx_RxSel

input multiplexer definition used in PinMaps

Enumerator
Ifx_RxSel_a
Ifx_RxSel_b
Ifx_RxSel_c
Ifx_RxSel_d
Ifx_RxSel_e
Ifx_RxSel_f
Ifx_RxSel_g
Ifx_RxSel_h

Definition at line 110 of file Ifx_Types.h.


iLLD_TC26B: Icu.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
Icu.h File Reference

ICU interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Icu.h:

Go to the source code of this file.

Data Structures

struct | Icu_Functions
struct | Icu_s
Structure of the Icu interface. More...
struct | Icu_Config
Configuration structure of the Icu interface. More...

Typedefs

typedef struct Icu_s | Icu
typedef void(* | Icu_StartCapture) (Icu *handle)
typedef void(* | Icu_StopCapture) (Icu *handle)
typedef void(* | Icu_GetTimeStamp) (Icu *handle)

Detailed Description

ICU interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Icu.h.

Data Structure Documentation

◆ Icu_Functions

struct Icu_Functions

Definition at line 38 of file Icu.h.

Collaboration diagram for Icu_Functions:
[legend]
Data Fields
Icu_GetTimeStamp | getTimeStamp
Icu_StartCapture | startCapture
Icu_StopCapture | stopCapture

◆ Icu_s

struct Icu_s

Structure of the Icu interface.

Definition at line 46 of file Icu.h.

Data Fields
float32 frequency dummy member to avoid error

◆ Icu_Config

struct Icu_Config

Configuration structure of the Icu interface.

Definition at line 55 of file Icu.h.

Data Fields
float32 frequency dummy member to avoid error

Typedef Documentation

◆ Icu

typedef struct Icu_s Icu

Definition at line 33 of file Icu.h.

◆ Icu_GetTimeStamp

typedef void(* Icu_GetTimeStamp) (Icu *handle)

Definition at line 36 of file Icu.h.

◆ Icu_StartCapture

typedef void(* Icu_StartCapture) (Icu *handle)

Definition at line 34 of file Icu.h.

◆ Icu_StopCapture

typedef void(* Icu_StopCapture) (Icu *handle)

Definition at line 35 of file Icu.h.


iLLD_TC26B: Ifx_Crc.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Macros | Functions
Ifx_Crc.h File Reference

CRC algorithm. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_Crc.h:

Go to the source code of this file.

Data Structures

struct | Ifc_Crc_Table
struct | Ifc_Crc_Table8
struct | Ifc_Crc_Table16
struct | Ifc_Crc_Table32
struct | Ifc_Crc

Macros

#define CRC_ENABLE_DPIPE 0

Functions

boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

CRC algorithm.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Crc.h.

Data Structure Documentation

◆ Ifc_Crc_Table

struct Ifc_Crc_Table

Definition at line 42 of file Ifx_Crc.h.

Data Fields
uint32 | crchighbit
uint32 | crcmask
sint32 | order
uint32 | polynom
sint32 | refin

◆ Ifc_Crc_Table8

struct Ifc_Crc_Table8

Definition at line 50 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table8:
[legend]
Data Fields
uint8 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc_Table16

struct Ifc_Crc_Table16

Definition at line 56 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table16:
[legend]
Data Fields
uint16 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc_Table32

struct Ifc_Crc_Table32

Definition at line 62 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc_Table32:
[legend]
Data Fields
uint32 | crctab[256] | CRC Table, must be 2st member of the struct.
Ifc_Crc_Table | data | CRC data, must be 1st member of the struct.

◆ Ifc_Crc

struct Ifc_Crc

Definition at line 68 of file Ifx_Crc.h.

Collaboration diagram for Ifc_Crc:
[legend]
Data Fields
uint32 | crcinit_direct
uint32 | crcinit_nondirect
uint32 | crcxor
sint32 | refout
const Ifc_Crc_Table * | table

Macro Definition Documentation

◆ CRC_ENABLE_DPIPE

#define CRC_ENABLE_DPIPE 0

Definition at line 35 of file Ifx_Crc.h.


iLLD_TC26B: Ifx_AngleTrkF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Macros | Functions
Ifx_AngleTrkF32.h File Reference

Angle-tracking observer for sin/cos analog position sensor. More...

#include "StdIf/IfxStdIf_Pos.h"
#include "SysSe/Math/Ifx_LowPassPt1F32.h"
Include dependency graph for Ifx_AngleTrkF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration. More...
struct | Ifx_AngleTrkF32_CfgData
struct | Ifx_AngleTrkF32_PosIf
struct | Ifx_AngleTrkF32
Angle Tracking Observer object. More...

Macros

#define | IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)
#define | IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)
Specify whether the speed reading is filtered by low-pass filter or not. More...

Functions

IFX_EXTERN float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
IFX_EXTERN float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IFX_EXTERN sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
IFX_EXTERN IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
IFX_EXTERN float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
IFX_EXTERN void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
IFX_EXTERN void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
IFX_EXTERN void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
IFX_EXTERN void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...
IFX_EXTERN boolean | Ifx_AngleTrkF32_stdIfPosInit (IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos". More...
Initialisation functions

Example use:

extern sint16 g_SinInput, g_CosInput;
Ifx_AngleTrkF32_Config driverConfig;
Ifx_AngleTrkF32 driverData;
Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
driverConfig.sqrAmplMax = 1.01 * 1.01;
driverConfig.sqrAmplMin = 0.99 * 0.99;
driverConfig.speedLpfFc = 100;
driverConfig.periodPerRotation = 1;
driverConfig.reversed = FALSE;
driverConfig.offset = 0;
Ifx_AngleTrkF32_init(&driverData, &driverConfig);

Prototypes:

IFX_EXTERN void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
IFX_EXTERN void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...
Protected functions

These functions are not for end-user but may be used by another driver which extends the functionality of library_srvsw_sysse_math_f32_angletrk

IFX_EXTERN float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
IFX_EXTERN void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
IFX_INLINE float32 | Ifx_AngleTrkF32_getLoopSpeed (Ifx_AngleTrkF32 *aObsv)
get the speed. More...

Detailed Description

Angle-tracking observer for sin/cos analog position sensor.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_AngleTrkF32.h.

Data Structure Documentation

◆ Ifx_AngleTrkF32_Config

struct Ifx_AngleTrkF32_Config

Angle Tracking Observer configuration.

Definition at line 56 of file Ifx_AngleTrkF32.h.

Data Fields
sint16 * | cosIn | Pointer to COS input variable.
float32 | errorThreshold | Threshold of error value in the tracking loop.
float32 | kd | Derivative gain.
float32 | ki | Integrator gain.
float32 | kp | Proportional gain.
IfxStdIf_Pos_RawAngle | offset | Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
uint16 | periodPerRotation | Number of electrical periods per mechanical rotation.
sint32 | resolution | Sensor resolution.
boolean | reversed | TRUE: reversed direction, FALSE: straight direction.
sint16 * | sinIn | Pointer to SIN input variable.
float32 | speedLpfFc | Cut-off frequency of speed low-pass filter.
sint32 | sqrAmplMax | Maximum value for square of signal amplitudes.
sint32 | sqrAmplMin | Minimum value for square of signal amplitudes.

◆ Ifx_AngleTrkF32_CfgData

struct Ifx_AngleTrkF32_CfgData

Definition at line 73 of file Ifx_AngleTrkF32.h.

Data Fields
float32 | errorThreshold | Threshold of error value in the tracking loop.
float32 | kd | Derivative gain.
float32 | ki | Integrator gain.
float32 | kp | Proportional gain.
sint32 | sqrAmplMax | Maximum value for square of signal amplitudes.
sint32 | sqrAmplMin | Minimum value for square of signal amplitudes.

◆ Ifx_AngleTrkF32_PosIf

struct Ifx_AngleTrkF32_PosIf

Definition at line 83 of file Ifx_AngleTrkF32.h.

Collaboration diagram for Ifx_AngleTrkF32_PosIf:
[legend]
Data Fields
IfxStdIf_Pos_Dir | direction | rotation direction
IfxStdIf_Pos_RawAngle | offset | raw position offset
uint16 | periodPerRotation | sensor 'electrical' periods per mechanical rotation
float32 | positionConst | constant for calculating mechanical position (in rad) from raw position
IfxStdIf_Pos_RawAngle rawPosition raw position in ticks.
Note
: the value already contains the offset
IfxStdIf_Pos_RawAngle | resolution | resolution of this position sensor interface
boolean | reversed | reverse direction
IfxStdIf_Pos_Status | status | error code (0 = no error)
float32 | Ts | update period in seconds
sint32 | turn | number of mechanical turns. FIXME to be implemented

◆ Ifx_AngleTrkF32

struct Ifx_AngleTrkF32

Angle Tracking Observer object.

Definition at line 99 of file Ifx_AngleTrkF32.h.

Collaboration diagram for Ifx_AngleTrkF32:
[legend]
Data Fields
float32 | accelEst |
float32 | angleAtan |
float32 | angleErr |
float32 | angleEst |
float32 | angleRef |
Ifx_AngleTrkF32_PosIf | base |
Ifx_AngleTrkF32_CfgData | cfgData |
sint16 * | cosIn | Pointer to COS input variable.
float32 | halfTs |
sint16 * | sinIn | Pointer to SIN input variable.
float32 | speedEstA |
float32 | speedEstB |
Ifx_LowPassPt1F32 | speedLpf | Only used if IFX_CFG_ANGLETRKF32_SPEED_FILTER is set

Macro Definition Documentation

◆ IFX_CFG_ANGLETRKF32_FILTERED_SPEED

#define IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)

Specify whether the speed reading is filtered by low-pass filter or not.

Definition at line 49 of file Ifx_AngleTrkF32.h.

◆ IFX_CFG_ANGLETRKF32_SPEED_FILTER

#define IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)

Definition at line 44 of file Ifx_AngleTrkF32.h.

Function Documentation

◆ Ifx_AngleTrkF32_stdIfPosInit()

IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | Ifx_AngleTrkF32 * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | Virtual position sensor
Returns
TRUE on success else FALSE

Definition at line 410 of file Ifx_AngleTrkF32.c.


iLLD_TC26B: Ifx_Console.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Data Structures | Macros | Functions | Variables
Ifx_Console.h File Reference

Main Console module header file. More...

#include "StdIf/IfxStdIf_DPipe.h"
Include dependency graph for Ifx_Console.h:

Go to the source code of this file.

Data Structures

struct Ifx_Console

Macros

#define | IFX_CFG_CONSOLE_INDENT_SIZE (4)
Default indentation/alignment size. More...
#define | CONSOLE Ifx_g_console
Alias Ifx_g_console object (by value) More...

Functions

IFX_INLINE IfxStdIf_DPipe * | Ifx_Console_getIo (void)
Return pointer to the default console object. More...
IFX_EXTERN void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
IFX_EXTERN boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
IFX_EXTERN boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...
IFX_INLINE void | Ifx_Console_decrAlign (sint16 value)
Decrement the alignment/indentation using the given value. More...
IFX_INLINE void | Ifx_Console_incrAlign (sint16 value)
Increment the alignment/indentation using the given value. More...

Variables

IFX_EXTERN Ifx_Console Ifx_g_console
Default main console global variable. More...

Detailed Description

Main Console module header file.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:36 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Console.h.

Data Structure Documentation

◆ Ifx_Console

struct Ifx_Console

Definition at line 38 of file Ifx_Console.h.

Collaboration diagram for Ifx_Console:
[legend]
Data Fields
sint16 | align | Variable for storing the actual (left)indentation level of the Ifx_g_console.
IfxStdIf_DPipe * | standardIo | Pointer to the IfxStdIf_DPipe object used as general console.

Macro Definition Documentation

◆ IFX_CFG_CONSOLE_INDENT_SIZE

#define IFX_CFG_CONSOLE_INDENT_SIZE (4)

Default indentation/alignment size.

Definition at line 35 of file Ifx_Console.h.

Referenced by Ifx_Console_decrAlign(), and Ifx_Console_incrAlign().

Variable Documentation

◆ Ifx_g_console

IFX_EXTERN Ifx_Console Ifx_g_console

Default main console global variable.

Definition at line 44 of file Ifx_Console.h.

Referenced by Ifx_Console_decrAlign(), Ifx_Console_getIo(), and Ifx_Console_incrAlign().


iLLD_TC26B: Ifx_DateTime.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Data Structures | Functions
Ifx_DateTime.h File Reference

Date and time functions. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_DateTime.h:

Go to the source code of this file.

Data Structures

struct Ifx_DateTime

Functions

IFX_EXTERN void | DateTime_set (Ifx_DateTime *time)
Set the real time. More...
IFX_EXTERN void | DateTime_get (Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...

Detailed Description

Date and time functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:40 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_DateTime.h.

Data Structure Documentation

◆ Ifx_DateTime

struct Ifx_DateTime

Definition at line 31 of file Ifx_DateTime.h.

Data Fields
sint32 | hours
sint32 | minutes
sint32 | seconds


iLLD_TC26B: Ifx_GlobalResources.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
Data Structures | Functions
Ifx_GlobalResources.c File Reference
#include "Ifx_GlobalResources.h"
Include dependency graph for Ifx_GlobalResources.c:

Go to the source code of this file.

Data Structures

struct Ifx_GlobalResources
Global resource object. More...

Functions

void * | Ifx_GlobalResources_get (sint32 id)
sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
pchar | Ifx_GlobalResources_getName (sint32 id)
boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Data Structure Documentation

◆ Ifx_GlobalResources

struct Ifx_GlobalResources

Global resource object.

Definition at line 27 of file Ifx_GlobalResources.c.

Collaboration diagram for Ifx_GlobalResources:
[legend]
Data Fields
sint32 | size | Size of the global resource table.
const Ifx_GlobalResources_Item * | table | Pointer to the global resource table.


iLLD_TC26B: Ifx_GlobalResources.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
Data Structures | Macros | Functions
Ifx_GlobalResources.h File Reference

Handling of global resources. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_GlobalResources.h:

Go to the source code of this file.

Data Structures

struct Ifx_GlobalResources_Item

Macros

#define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)

Functions

IFX_EXTERN void * | Ifx_GlobalResources_get (sint32 id)
IFX_EXTERN sint32 | Ifx_GlobalResources_getIndex (void *resource)
Returns the global resource index. More...
IFX_EXTERN const Ifx_GlobalResources_Item * | Ifx_GlobalResources_getItem (sint32 id)
IFX_EXTERN pchar | Ifx_GlobalResources_getName (sint32 id)
IFX_EXTERN boolean | Ifx_GlobalResources_init (const Ifx_GlobalResources_Item *table, uint32 size)

Detailed Description

Handling of global resources.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:36 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-28 14:15:39 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_GlobalResources.h.

Data Structure Documentation

◆ Ifx_GlobalResources_Item

struct Ifx_GlobalResources_Item

Definition at line 38 of file Ifx_GlobalResources.h.

Data Fields
pchar | name
void * | resource

Macro Definition Documentation

◆ IFX_CFG_GLOBAL_RESOURCES_ENABLED

#define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)

Definition at line 35 of file Ifx_GlobalResources.h.


iLLD_TC26B: Ifx_LowPassPt1F32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LowPassPt1F32.h File Reference

Low pass filter PT1. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LowPassPt1F32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LowPassPt1F32
PT1 object definition. More...
struct | Ifx_LowPassPt1F32_Config
PT1 configuration. More...

Functions

IFX_EXTERN void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
IFX_INLINE void | Ifx_LowPassPt1F32_reset (Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable. More...
IFX_EXTERN float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

Low pass filter PT1.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LowPassPt1F32.h.

Data Structure Documentation

◆ Ifx_LowPassPt1F32

struct Ifx_LowPassPt1F32

PT1 object definition.

Definition at line 44 of file Ifx_LowPassPt1F32.h.

Data Fields
float32 | a | a parameter
float32 | b | b parameter
float32 | out | last output

◆ Ifx_LowPassPt1F32_Config

struct Ifx_LowPassPt1F32_Config

PT1 configuration.

Definition at line 52 of file Ifx_LowPassPt1F32.h.

Data Fields
float32 | cutOffFrequency | Cut off frequency.
float32 | gain | Gain.
float32 | samplingTime | Sampling time.


iLLD_TC26B: Ifx_LutIndexedLinearF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LutIndexedLinearF32.h File Reference

Look-up functionality. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LutIndexedLinearF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LutIndexedLinearF32_Item
struct | Ifx_LutIndexedLinearF32

Functions

IFX_INLINE float32 Ifx_LutIndexedLinearF32_search (const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search. More...

Detailed Description

Look-up functionality.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutIndexedLinearF32.h.

Data Structure Documentation

◆ Ifx_LutIndexedLinearF32_Item

struct Ifx_LutIndexedLinearF32_Item

Definition at line 37 of file Ifx_LutIndexedLinearF32.h.

Data Fields
float32 | gain | channel gain
float32 | offset | channel offset

◆ Ifx_LutIndexedLinearF32

struct Ifx_LutIndexedLinearF32

Definition at line 43 of file Ifx_LutIndexedLinearF32.h.

Collaboration diagram for Ifx_LutIndexedLinearF32:
[legend]
Data Fields
uint16 | segmentCount
const Ifx_LutIndexedLinearF32_Item * | segments
sint8 | shift


iLLD_TC26B: Ifx_LutLinearF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_LutLinearF32.h File Reference

Look-up functionality. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_LutLinearF32.h:

Go to the source code of this file.

Data Structures

struct | Ifx_LutLinearF32_Item
struct | Ifx_LutLinearF32

Functions

IFX_EXTERN float32 | Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchNegSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation. More...
IFX_INLINE float32 | Ifx_LutLinearF32_searchPosSeq (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation. More...

Detailed Description

Look-up functionality.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutLinearF32.h.

Data Structure Documentation

◆ Ifx_LutLinearF32_Item

struct Ifx_LutLinearF32_Item

Definition at line 37 of file Ifx_LutLinearF32.h.

Data Fields
float32 | boundary | segment input upper limit
float32 | gain | channel gain
float32 | offset | channel offset

◆ Ifx_LutLinearF32

struct Ifx_LutLinearF32

Definition at line 44 of file Ifx_LutLinearF32.h.

Collaboration diagram for Ifx_LutLinearF32:
[legend]
Data Fields
sint8 | segmentCount
const Ifx_LutLinearF32_Item * | segments


iLLD_TC26B: Ifx_RampF32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Data Structures | Functions
Ifx_RampF32.h File Reference

Ramp function. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_RampF32.h:

Go to the source code of this file.

Data Structures

struct Ifx_RampF32
Ifx_RampF32 object definition. More...

Functions

IFX_INLINE void | Ifx_RampF32_init (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object. More...
IFX_INLINE void | Ifx_RampF32_reset (Ifx_RampF32 *ramp)
Reset internal values. More...
IFX_INLINE void | Ifx_RampF32_setSlewRate (Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate. More...
IFX_INLINE void | Ifx_RampF32_setRef (Ifx_RampF32 *ramp, float32 ref)
Set the reference value. More...
IFX_INLINE float32 | Ifx_RampF32_getValue (Ifx_RampF32 *ramp)
Get the actual output value. More...
IFX_EXTERN float32 | Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...
IFX_INLINE float32 | Ifx_RampF32_getRef (Ifx_RampF32 *ramp)
Get the reference value. More...

Detailed Description

Ramp function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_RampF32.h.

Data Structure Documentation

◆ Ifx_RampF32

struct Ifx_RampF32

Ifx_RampF32 object definition.

Definition at line 38 of file Ifx_RampF32.h.

Data Fields
float32 | delta
float32 | ik
float32 | uk

Function Documentation

◆ Ifx_RampF32_getRef()

IFX_INLINE float32 Ifx_RampF32_getRef ( Ifx_RampF32 * ramp )

Get the reference value.

Parameters
ramp Pointer to the Ifx_RampF32 object
Returns
Returns the ref value

Definition at line 77 of file Ifx_RampF32.h.


iLLD_TC26B: Ifx_Shell_Protocol Struct Reference

Data Fields
Ifx_Shell_Protocol Struct Reference

Shell protocol configuration. More...

#include </home/illd.work/release/iLLD_1_0_1_11_0/External/Src/BaseSw/Service/CpuGeneric/SysSe/Comm/Ifx_Shell.h>

Data Fields

boolean(* | start )(void *protocol, IfxStdIf_DPipe *io)
void(* | execute )(void *protocol)
void(* | onStart )(void *protocol, void *data)
void * | onStartData
void * | object
boolean started

Detailed Description

Shell protocol configuration.

Definition at line 180 of file Ifx_Shell.h.

Field Documentation

◆ execute

void(* execute) (void *protocol)

Definition at line 183 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_process().

◆ object

void* object

Definition at line 186 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), Ifx_Shell_process(), and Ifx_Shell_protocolStart().

◆ onStart

void(* onStart) (void *protocol, void *data)

Definition at line 184 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ onStartData

void* onStartData

Definition at line 185 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ start

boolean(* start) (void *protocol, IfxStdIf_DPipe *io)

Definition at line 182 of file Ifx_Shell.h.

Referenced by Ifx_Shell_initConfig(), and Ifx_Shell_protocolStart().

◆ started

boolean started

Definition at line 187 of file Ifx_Shell.h.

Referenced by Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_process(), and Ifx_Shell_protocolStart().

The documentation for this struct was generated from the following file:
  • Ifx_Shell.h


iLLD_TC26B: IfxStdIf_DPipe.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Macros | Typedefs | Functions
IfxStdIf_DPipe.h File Reference

Standard interface: Data Pipe. More...

#include "IfxStdIf.h"
Include dependency graph for IfxStdIf_DPipe.h:

Go to the source code of this file.

Data Structures

struct IfxStdIf_DPipe_
Standard interface object. More...

Macros

#define | ENDL "\r\n"
#define | STDIF_DPIPE_MAX_PRINT_SIZE (255)
Size of the buffer allocated on the stack for the print function. More...

Typedefs

typedef struct IfxStdIf_DPipe_ | IfxStdIf_DPipe
Forward declaration. More...
typedef volatile boolean * | IfxStdIf_DPipe_WriteEvent
typedef volatile boolean * | IfxStdIf_DPipe_ReadEvent
typedef boolean(* | IfxStdIf_DPipe_Write) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
typedef boolean(* | IfxStdIf_DPipe_Read) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
typedef sint32(* | IfxStdIf_DPipe_GetReadCount) (IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer. More...
typedef IfxStdIf_DPipe_ReadEvent(* | IfxStdIf_DPipe_GetReadEvent) (IfxStdIf_InterfaceDriver stdIf)
Returns read event object. More...
typedef uint32(* | IfxStdIf_DPipe_GetSendCount) (IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send. More...
typedef Ifx_TickTime(* | IfxStdIf_DPipe_GetTxTimeStamp) (IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data. More...
typedef sint32(* | IfxStdIf_DPipe_GetWriteCount) (IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
typedef IfxStdIf_DPipe_WriteEvent(* | IfxStdIf_DPipe_GetWriteEvent) (IfxStdIf_InterfaceDriver stdIf)
Returns write event object. More...
typedef boolean(* | IfxStdIf_DPipe_CanReadCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
typedef boolean(* | IfxStdIf_DPipe_CanWriteCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
typedef boolean(* | IfxStdIf_DPipe_FlushTx) (IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
typedef void(* | IfxStdIf_DPipe_ClearRx) (IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data. More...
typedef void(* | IfxStdIf_DPipe_ClearTx) (IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data. More...
typedef void(* | IfxStdIf_DPipe_OnReceive) (IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event More...
typedef void(* | IfxStdIf_DPipe_OnTransmit) (IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event More...
typedef void(* | IfxStdIf_DPipe_OnError) (IfxStdIf_InterfaceDriver stdIf)
handler called on error event More...
typedef void(* | IfxStdIf_DPipe_ResetSendCount) (IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter. More...

Functions

IFX_INLINE boolean | IfxStdIf_DPipe_write (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe. More...
IFX_INLINE boolean | IfxStdIf_DPipe_read (IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getReadCount (IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer. More...
IFX_INLINE sint32 | IfxStdIf_DPipe_getWriteCount (IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canReadCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer. More...
IFX_INLINE boolean | IfxStdIf_DPipe_canWriteCount (IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
IFX_INLINE IfxStdIf_DPipe_ReadEvent | IfxStdIf_DPipe_getReadEvent (IfxStdIf_DPipe *stdIf)
Returns read event object. More...
IFX_INLINE IfxStdIf_DPipe_WriteEvent | IfxStdIf_DPipe_getWriteEvent (IfxStdIf_DPipe *stdIf)
Returns write event object. More...
IFX_INLINE boolean | IfxStdIf_DPipe_flushTx (IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearTx (IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_clearRx (IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data. More...
IFX_INLINE void | IfxStdIf_DPipe_onReceive (IfxStdIf_DPipe *stdIf)
handler called on reveive event More...
IFX_INLINE void | IfxStdIf_DPipe_onTransmit (IfxStdIf_DPipe *stdIf)
handler called on transmit event More...
IFX_INLINE void | IfxStdIf_DPipe_onError (IfxStdIf_DPipe *stdIf)
handler called on error event More...
IFX_INLINE uint32 | IfxStdIf_DPipe_getSendCount (IfxStdIf_DPipe *stdIf)
Returns number of bytes send. More...
IFX_INLINE Ifx_TickTime | IfxStdIf_DPipe_getTxTimeStamp (IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data. More...
IFX_INLINE void | IfxStdIf_DPipe_resetSendCount (IfxStdIf_DPipe *stdIf)
Reset the sendCount counter. More...
IFX_EXTERN void | IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

Standard interface: Data Pipe.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:24 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf_DPipe.h.

Data Structure Documentation

◆ IfxStdIf_DPipe_

struct IfxStdIf_DPipe_

Standard interface object.

Definition at line 213 of file IfxStdIf_DPipe.h.

Data Fields
IfxStdIf_DPipe_CanReadCount canReadCount
See also
IfxStdIf_DPipe_CanReadCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
See also
IfxStdIf_DPipe_CanWriteCount
IfxStdIf_DPipe_ClearRx clearRx
See also
IfxStdIf_DPipe_ClearRx
IfxStdIf_DPipe_ClearTx clearTx
See also
IfxStdIf_DPipe_ClearTx
IfxStdIf_InterfaceDriver | driver | Pointer to the specific driver object.
IfxStdIf_DPipe_FlushTx flushTx
See also
IfxStdIf_DPipe_FlushTx
IfxStdIf_DPipe_GetReadCount getReadCount
See also
IfxStdIf_DPipe_GetReadCount
IfxStdIf_DPipe_GetReadEvent getReadEvent
See also
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_GetSendCount getSendCount
See also
IfxStdIf_DPipe_GetSendCount
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
See also
IfxStdIf_DPipe_GetTxTimeStamp
IfxStdIf_DPipe_GetWriteCount getWriteCount
See also
IfxStdIf_DPipe_GetWriteCount
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
See also
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_OnError onError
See also
IfxStdIf_DPipe_OnError
IfxStdIf_DPipe_OnReceive onReceive
See also
IfxStdIf_DPipe_OnReceive
IfxStdIf_DPipe_OnTransmit onTransmit
See also
IfxStdIf_DPipe_OnTransmit
IfxStdIf_DPipe_Read read
See also
IfxStdIf_DPipe_Read
IfxStdIf_DPipe_ResetSendCount resetSendCount
See also
IfxStdIf_DPipe_ResetSendCount
boolean | txDisabled | If disabled is set to TRUE, the output is disabled, else enabled.
IfxStdIf_DPipe_Write write
See also
IfxStdIf_DPipe_Write

Macro Definition Documentation

◆ ENDL

#define ENDL "\r\n"

Definition at line 47 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_init(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), and IfxStdIf_Pos_printStatus().

◆ STDIF_DPIPE_MAX_PRINT_SIZE

#define STDIF_DPIPE_MAX_PRINT_SIZE (255)

Size of the buffer allocated on the stack for the print function.

Definition at line 57 of file IfxStdIf_DPipe.h.

Referenced by Ifx_Console_print(), Ifx_Console_printAlign(), and IfxStdIf_DPipe_print().

Typedef Documentation

◆ IfxStdIf_DPipe

typedef struct IfxStdIf_DPipe_ IfxStdIf_DPipe

Forward declaration.

Definition at line 51 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_CanReadCount

typedef boolean(* IfxStdIf_DPipe_CanReadCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)

Indicates if the required number of bytes are available for read in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count

Definition at line 146 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_CanWriteCount

typedef boolean(* IfxStdIf_DPipe_CanWriteCount) (IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)

Indicates if there is enough free space to write the data in the buffer.

Parameters
stdif | Pointer to the interface driver object
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Returns
Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count

Definition at line 157 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ClearRx

typedef void(* IfxStdIf_DPipe_ClearRx) (IfxStdIf_InterfaceDriver stdIf)

Clears the RX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 173 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ClearTx

typedef void(* IfxStdIf_DPipe_ClearTx) (IfxStdIf_InterfaceDriver stdIf)

Clears the TX buffer by removing all data.

Parameters
stdif Pointer to the interface driver object
Returns
void

Definition at line 180 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_FlushTx

typedef boolean(* IfxStdIf_DPipe_FlushTx) (IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)

Flush the transmit buffer by transmitting all data.

Parameters
stdif | Pointer to the interface driver object
timeout | timeout for the flush operation
Returns
Returns TRUE if the FIFO is empty

Definition at line 166 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetReadCount

typedef sint32(* IfxStdIf_DPipe_GetReadCount) (IfxStdIf_InterfaceDriver stdIf)

Returns the number of bytes in the rx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of bytes in the rx buffer

Definition at line 95 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetReadEvent

typedef IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent) (IfxStdIf_InterfaceDriver stdIf)

Returns read event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns read event object

Definition at line 103 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetSendCount

typedef uint32(* IfxStdIf_DPipe_GetSendCount) (IfxStdIf_InterfaceDriver stdIf)

Returns number of bytes send.

Parameters
stdif Pointer to the interface driver object
Returns
Returns number of bytes send

Definition at line 111 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetTxTimeStamp

typedef Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp) (IfxStdIf_InterfaceDriver stdIf)

Returns the time stamp of the last transmit data.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the time stamp of the last transmit data

Definition at line 119 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetWriteCount

typedef sint32(* IfxStdIf_DPipe_GetWriteCount) (IfxStdIf_InterfaceDriver stdIf)

Returns the number of free bytes (free space) in the tx buffer.

Parameters
stdif Pointer to the interface driver object
Returns
Returns the number of free bytes in the tx buffer

Definition at line 127 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_GetWriteEvent

typedef IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent) (IfxStdIf_InterfaceDriver stdIf)

Returns write event object.

Parameters
stdif Pointer to the interface driver object
Returns
Returns write event object

Definition at line 135 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnError

typedef void(* IfxStdIf_DPipe_OnError) (IfxStdIf_InterfaceDriver stdIf)

handler called on error event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 202 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnReceive

typedef void(* IfxStdIf_DPipe_OnReceive) (IfxStdIf_InterfaceDriver stdIf)

handler called on reveive event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 188 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_OnTransmit

typedef void(* IfxStdIf_DPipe_OnTransmit) (IfxStdIf_InterfaceDriver stdIf)

handler called on transmit event

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 195 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_Read

typedef boolean(* IfxStdIf_DPipe_Read) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Read data from the IfxStdIf_DPipe object.

Initially the parameter 'count' specifies count of data to read. After execution the data pointed by 'count' specifies the data actually read.

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be read
FALSE | Returns FALSE if not all the items could be read

Definition at line 87 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ReadEvent

typedef volatile boolean* IfxStdIf_DPipe_ReadEvent

Definition at line 54 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_ResetSendCount

typedef void(* IfxStdIf_DPipe_ResetSendCount) (IfxStdIf_InterfaceDriver stdIf)

Reset the sendCount counter.

Parameters
stdif Pointer to the interface driver object
Returns
none

Definition at line 209 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_Write

typedef boolean(* IfxStdIf_DPipe_Write) (IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Write binary data into the IfxStdIf_DPipe.

Initially the parameter 'count' specifies count of data to write. After execution the data pointed by 'count' specifies the data actually written

Parameters
stdif | Pointer to the interface driver object
data | Pointer to the start of data
count | Pointer to the count of data (in bytes).
timeout | in system timer ticks
Return values
TRUE | Returns TRUE if all items could be written
FALSE | Returns FALSE if not all the items could be written

Definition at line 72 of file IfxStdIf_DPipe.h.

◆ IfxStdIf_DPipe_WriteEvent

typedef volatile boolean* IfxStdIf_DPipe_WriteEvent

Definition at line 53 of file IfxStdIf_DPipe.h.


iLLD_TC26B: IfxStdIf_Pos.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Enumerations | Functions
IfxStdIf_Pos.h File Reference

Standard interface: Position interface. More...

#include "Cpu/Std/Ifx_Types.h"
#include "IfxStdIf.h"
#include "IfxStdIf_DPipe.h"
Include dependency graph for IfxStdIf_Pos.h:

Go to the source code of this file.

Data Structures

union | IfxStdIf_Pos_Status
Position sensor status definition. More...
struct | IfxStdIf_Pos_
Standard interface object. More...
struct | IfxStdIf_Pos_Config
Position interface configuration. More...
struct | IfxStdIf_Pos_Status.B

Typedefs

typedef sint32 | IfxStdIf_Pos_RawAngle
typedef struct IfxStdIf_Pos_ | IfxStdIf_Pos
Forward declaration. More...
typedef float32(* | IfxStdIf_Pos_GetAbsolutePosition) (IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns. More...
typedef void(* | IfxStdIf_Pos_OnZeroIrq) (IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt. More...
typedef sint32(* | IfxStdIf_Pos_GetOffset) (IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset. More...
typedef float32(* | IfxStdIf_Pos_GetPosition) (IfxStdIf_InterfaceDriver stdIf)
Return the position. More...
typedef IfxStdIf_Pos_Dir(* | IfxStdIf_Pos_GetDirection) (IfxStdIf_InterfaceDriver stdIf)
Return the direction. More...
typedef IfxStdIf_Pos_Status(* | IfxStdIf_Pos_GetFault) (IfxStdIf_InterfaceDriver stdIf)
Return the sensor status. More...
typedef uint16(* | IfxStdIf_Pos_GetPeriodPerRotation) (IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting. More...
typedef sint32(* | IfxStdIf_Pos_GetRawPosition) (IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks. More...
typedef float32(* | IfxStdIf_Pos_GetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf)
Get the update period. More...
typedef sint32(* | IfxStdIf_Pos_GetResolution) (IfxStdIf_InterfaceDriver stdIf)
Get the resolution. More...
typedef IfxStdIf_Pos_SensorType(* | IfxStdIf_Pos_GetSensorType) (IfxStdIf_InterfaceDriver stdIf)
Get the sensor type. More...
typedef float32(* | IfxStdIf_Pos_GetSpeed) (IfxStdIf_InterfaceDriver stdIf)
Return the speed. More...
typedef sint32(* | IfxStdIf_Pos_GetTurn) (IfxStdIf_InterfaceDriver stdIf)
Return position in turn. More...
typedef void(* | IfxStdIf_Pos_OnEventA) (IfxStdIf_InterfaceDriver stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
typedef void(* | IfxStdIf_Pos_Update) (IfxStdIf_InterfaceDriver stdIf)
Refresh the status. More...
typedef void(* | IfxStdIf_Pos_Reset) (IfxStdIf_InterfaceDriver stdIf)
Reset the driver. More...
typedef void(* | IfxStdIf_Pos_ResetFaults) (IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault. More...
typedef void(* | IfxStdIf_Pos_SetOffset) (IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset. More...
typedef void(* | IfxStdIf_Pos_SetPosition) (IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetRawPosition) (IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetSpeed) (IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
typedef void(* | IfxStdIf_Pos_SetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period. More...

Enumerations

enum IfxStdIf_Pos_MotionType {
IfxStdIf_Pos_MotionType_rotating,
IfxStdIf_Pos_MotionType_linear
}
Output event enable / disable. More...
enum IfxStdIf_Pos_ResolutionFactor {
IfxStdIf_Pos_ResolutionFactor_oneFold = 1,
IfxStdIf_Pos_ResolutionFactor_twoFold = 2,
IfxStdIf_Pos_ResolutionFactor_fourFold = 4
}
Output event enable / disable. More...
enum IfxStdIf_Pos_SensorType {
IfxStdIf_Pos_SensorType_encoder,
IfxStdIf_Pos_SensorType_hall,
IfxStdIf_Pos_SensorType_resolver,
IfxStdIf_Pos_SensorType_angletrk,
IfxStdIf_Pos_SensorType_igmr,
IfxStdIf_Pos_SensorType_virtual
}
Position sensor Types. More...
enum IfxStdIf_Pos_Dir {
IfxStdIf_Pos_Dir_forward,
IfxStdIf_Pos_Dir_backward,
IfxStdIf_Pos_Dir_unknown
}
Position sensor direction definition. More...

Functions

IFX_INLINE void | IfxStdIf_Pos_onZeroIrq (IfxStdIf_Pos *stdIf)
Handles the zero interrupt. More...
IFX_INLINE float32 | IfxStdIf_Pos_getAbsolutePosition (IfxStdIf_Pos *stdIf)
Return the position, inclusive turns. More...
IFX_INLINE IfxStdIf_Pos_Status | IfxStdIf_Pos_getFault (IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521 More...
IFX_INLINE sint32 | IfxStdIf_Pos_getOffset (IfxStdIf_Pos *stdIf)
Return the raw position sensor offset. More...
IFX_INLINE float32 | IfxStdIf_Pos_getPosition (IfxStdIf_Pos *stdIf)
Return the position. More...
IFX_INLINE IfxStdIf_Pos_Dir | IfxStdIf_Pos_getDirection (IfxStdIf_Pos *stdIf)
Return the direction. More...
IFX_INLINE uint16 | IfxStdIf_Pos_getPeriodPerRotation (IfxStdIf_Pos *stdIf)
Return the period per rotation setting. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getRawPosition (IfxStdIf_Pos *stdIf)
Return the raw position in ticks. More...
IFX_INLINE float32 | IfxStdIf_Pos_getRefreshPeriod (IfxStdIf_Pos *stdIf)
Get the update period. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getResolution (IfxStdIf_Pos *stdIf)
Get the resolution. More...
IFX_INLINE sint32 | IfxStdIf_Pos_getTurn (IfxStdIf_Pos *stdIf)
Return position in turn. More...
IFX_INLINE IfxStdIf_Pos_SensorType | IfxStdIf_Pos_getSensorType (IfxStdIf_Pos *stdIf)
Get the sensor type. More...
IFX_INLINE float32 | IfxStdIf_Pos_getSpeed (IfxStdIf_Pos *stdIf)
Return the speed. More...
IFX_INLINE boolean | IfxStdIf_Pos_isFault (IfxStdIf_Pos *stdIf)
IFX_INLINE void | IfxStdIf_Pos_onEventA (IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional. More...
IFX_INLINE void | IfxStdIf_Pos_update (IfxStdIf_Pos *stdIf)
Refresh the status. More...
IFX_INLINE void | IfxStdIf_Pos_reset (IfxStdIf_Pos *stdIf)
Reset the driver. More...
IFX_INLINE void | IfxStdIf_Pos_resetFaults (IfxStdIf_Pos *stdIf)
Reset the driver fault. More...
IFX_INLINE void | IfxStdIf_Pos_setOffset (IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset. More...
IFX_INLINE void | IfxStdIf_Pos_setPosition (IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRawPosition (IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setSpeed (IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor) More...
IFX_INLINE void | IfxStdIf_Pos_setRefreshPeriod (IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period. More...
IFX_INLINE float32 | IfxStdIf_Pos_radsToRpm (float32 speed)
Converts from rad/s to rpm. More...
IFX_INLINE float32 | IfxStdIf_Pos_rpmToRads (float32 speed)
Converts from rpm to rad/s. More...
IFX_EXTERN void | IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config *config)
IFX_EXTERN void | IfxStdIf_Pos_printStatus (IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status. More...

Detailed Description

Standard interface: Position interface.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf_Pos.h.

Data Structure Documentation

◆ IfxStdIf_Pos_Status

union IfxStdIf_Pos_Status

Position sensor status definition.

Definition at line 83 of file IfxStdIf_Pos.h.

Data Fields
struct IfxStdIf_Pos_Status | B | Bitfielf status access.
uint32 | status | Global status access.

◆ IfxStdIf_Pos_

struct IfxStdIf_Pos_

Standard interface object.

Definition at line 266 of file IfxStdIf_Pos.h.

Collaboration diagram for IfxStdIf_Pos_:
[legend]
Data Fields
IfxStdIf_InterfaceDriver | driver | Interface driver object.
IfxStdIf_Pos_GetAbsolutePosition | getAbsolutePosition | Return the absolute position.
IfxStdIf_Pos_GetDirection getDirection
See also
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_GetFault getFault
See also
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_GetOffset getOffset
See also
IfxStdIf_Pos_GetOffset
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
See also
IfxStdIf_Pos_GetPeriodPerRotation
IfxStdIf_Pos_GetPosition getPosition
See also
IfxStdIf_Pos_GetPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
See also
IfxStdIf_Pos_GetRawPosition
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
See also
IfxStdIf_Pos_GetRefreshPeriod
IfxStdIf_Pos_GetResolution getResolution
See also
IfxStdIf_Pos_GetResolution
IfxStdIf_Pos_GetSensorType getSensorType
See also
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_GetSpeed getSpeed
See also
IfxStdIf_Pos_GetSpeed
IfxStdIf_Pos_GetTurn getTurn
See also
IfxStdIf_Pos_GetTurn
IfxStdIf_Pos_OnEventA onEventA
See also
IfxStdIf_Pos_OnEventA
IfxStdIf_Pos_OnZeroIrq onZeroIrq
See also
IfxStdIf_Pos_OnZeroIrq
IfxStdIf_Pos_Reset reset
See also
IfxStdIf_Pos_Reset
IfxStdIf_Pos_ResetFaults resetFaults
See also
IfxStdIf_Pos_ResetFaults
IfxStdIf_Pos_SetOffset setOffset
See also
IfxStdIf_Pos_SetOffset
IfxStdIf_Pos_SetPosition setPosition
See also
IfxStdIf_Pos_SetPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
See also
IfxStdIf_Pos_SetRawPosition
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
See also
IfxStdIf_Pos_SetRefreshPeriod
IfxStdIf_Pos_SetSpeed setSpeed
See also
IfxStdIf_Pos_SetSpeed
IfxStdIf_Pos_Update update
See also
IfxStdIf_Pos_Update

◆ IfxStdIf_Pos_Config

struct IfxStdIf_Pos_Config

Position interface configuration.

Definition at line 294 of file IfxStdIf_Pos.h.

Data Fields
float32 | maxSpeed | Absolute maximal allowed speed. Above speed is recognized as error.
float32 | minSpeed | Absolute minimal allowed speed. below speed is recognized as 0rad/s.
sint32 | offset | Position sensor offset.
uint16 | periodPerRotation | Number of period per rotation. Is usually 1 for encoder.
sint32 | resolution | Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024.
IfxStdIf_Pos_ResolutionFactor | resolutionFactor | Resolution multiplier for encoder interface, valid is 2, 4.
boolean | reversed | If true, the sensor direction is reversed.
float32 | speedFilerCutOffFrequency | Speed low pass filter cut off frequency.
boolean | speedFilterEnabled | Enable / disable the speed low pass filter.
float32 | speedModeThreshold | Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count mode is used, below the threshold, the time delta is used.
float32 | updatePeriod | period in seconds, at which the application calls IfxStdIf_Pos_update()

◆ IfxStdIf_Pos_Status.B

struct IfxStdIf_Pos_Status.B

Definition at line 86 of file IfxStdIf_Pos.h.

Data Fields
uint32 | commError: 1 | Communication error.
uint32 | notSynchronised: 1 | Sensor is not synchronized.
uint32 | signalDegradation: 1 | Signal degradation warning.
uint32 | signalLoss: 1 | Loss of signal error.
uint32 | trackingLoss: 1 | Tracking loss error.

Typedef Documentation

◆ IfxStdIf_Pos

typedef struct IfxStdIf_Pos_ IfxStdIf_Pos

Forward declaration.

Definition at line 99 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetAbsolutePosition

typedef float32(* IfxStdIf_Pos_GetAbsolutePosition) (IfxStdIf_InterfaceDriver stdIf)

Return the position, inclusive turns.

Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors. For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position inclusive turns in rad

Definition at line 109 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetDirection

typedef IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection) (IfxStdIf_InterfaceDriver stdIf)

Return the direction.

Return the sensor direction.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the direction

Definition at line 141 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetFault

typedef IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault) (IfxStdIf_InterfaceDriver stdIf)

Return the sensor status.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor status

Definition at line 148 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetOffset

typedef sint32(* IfxStdIf_Pos_GetOffset) (IfxStdIf_InterfaceDriver stdIf)

Return the raw position sensor offset.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position sensor offset sensor in ticks

Definition at line 122 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetPeriodPerRotation

typedef uint16(* IfxStdIf_Pos_GetPeriodPerRotation) (IfxStdIf_InterfaceDriver stdIf)

Return the period per rotation setting.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the period per rotation setting

Definition at line 155 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetPosition

typedef float32(* IfxStdIf_Pos_GetPosition) (IfxStdIf_InterfaceDriver stdIf)

Return the position.

Return the sensor position in rad for rotating sensor or in m for linear sensors. For rotating sensor, the position is always between 0 and 2*IFX_PI.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the position in rad or m

Definition at line 132 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetRawPosition

typedef sint32(* IfxStdIf_Pos_GetRawPosition) (IfxStdIf_InterfaceDriver stdIf)

Return the raw position in ticks.

Return the sensor raw position in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the raw position in ticks

Definition at line 164 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetRefreshPeriod

typedef float32(* IfxStdIf_Pos_GetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf)

Get the update period.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the update period in s

Definition at line 170 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetResolution

typedef sint32(* IfxStdIf_Pos_GetResolution) (IfxStdIf_InterfaceDriver stdIf)

Get the resolution.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the resolution

Definition at line 176 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetSensorType

typedef IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType) (IfxStdIf_InterfaceDriver stdIf)

Get the sensor type.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the sensor type

Definition at line 182 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetSpeed

typedef float32(* IfxStdIf_Pos_GetSpeed) (IfxStdIf_InterfaceDriver stdIf)

Return the speed.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the speed in rad/s or m/s

Definition at line 188 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_GetTurn

typedef sint32(* IfxStdIf_Pos_GetTurn) (IfxStdIf_InterfaceDriver stdIf)

Return position in turn.

Parameters
stdIf Pointer to the interface driver object
Returns
Return position in turn

Definition at line 194 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_OnEventA

typedef void(* IfxStdIf_Pos_OnEventA) (IfxStdIf_InterfaceDriver stdIf)

Handles the A sensor event Event A is a sensor defined event. it is optional.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 201 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_OnZeroIrq

typedef void(* IfxStdIf_Pos_OnZeroIrq) (IfxStdIf_InterfaceDriver stdIf)

Handles the zero interrupt.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 115 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_RawAngle

typedef sint32 IfxStdIf_Pos_RawAngle

Definition at line 96 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_Reset

typedef void(* IfxStdIf_Pos_Reset) (IfxStdIf_InterfaceDriver stdIf)

Reset the driver.

Clear faults, reset speed and position to 0

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 219 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_ResetFaults

typedef void(* IfxStdIf_Pos_ResetFaults) (IfxStdIf_InterfaceDriver stdIf)

Reset the driver fault.

Clear faults

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 228 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetOffset

typedef void(* IfxStdIf_Pos_SetOffset) (IfxStdIf_InterfaceDriver stdIf, sint32 offset)

Set the sensor offset.

Parameters
stdIf | Pointer to the interface driver object
offset | Offset in sensor ticks
Returns
None

Definition at line 235 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetPosition

typedef void(* IfxStdIf_Pos_SetPosition) (IfxStdIf_InterfaceDriver stdIf, float32 position)

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor rad
Returns
None

Definition at line 242 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetRawPosition

typedef void(* IfxStdIf_Pos_SetRawPosition) (IfxStdIf_InterfaceDriver stdIf, sint32 position)

Set the sensor position (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
position | Position sensor ticks
Returns
None

Definition at line 248 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetRefreshPeriod

typedef void(* IfxStdIf_Pos_SetRefreshPeriod) (IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)

Set the update period.

Parameters
stdIf | Pointer to the interface driver object
updatePeriod | Refresh period in s
Returns
None

Definition at line 262 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SetSpeed

typedef void(* IfxStdIf_Pos_SetSpeed) (IfxStdIf_InterfaceDriver stdIf, float32 speed)

Set the sensor speed (virtual sensor)

Parameters
stdIf | Pointer to the interface driver object
speed | speed in rad/s
Returns
None

Definition at line 255 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_Update

typedef void(* IfxStdIf_Pos_Update) (IfxStdIf_InterfaceDriver stdIf)

Refresh the status.

Update the stdIf state like speed, position, status, taking into account the updatePeriod

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 210 of file IfxStdIf_Pos.h.

Enumeration Type Documentation

◆ IfxStdIf_Pos_Dir

enum IfxStdIf_Pos_Dir

Position sensor direction definition.

Enumerator
IfxStdIf_Pos_Dir_forward | Forward direction. For rotating position sensor, forward is clockwise rotation.
IfxStdIf_Pos_Dir_backward | Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
IfxStdIf_Pos_Dir_unknown | Unknown direction.

Definition at line 75 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_MotionType

enum IfxStdIf_Pos_MotionType

Output event enable / disable.

Enumerator
IfxStdIf_Pos_MotionType_rotating | Rotating sensor.
IfxStdIf_Pos_MotionType_linear | Linear sensor.

Definition at line 49 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_ResolutionFactor

enum IfxStdIf_Pos_ResolutionFactor

Output event enable / disable.

Enumerator
IfxStdIf_Pos_ResolutionFactor_oneFold | Default, no multipluication factor.
IfxStdIf_Pos_ResolutionFactor_twoFold | 2-fold resolution. Valid for encoder
IfxStdIf_Pos_ResolutionFactor_fourFold | 4-fold resolution. Valid for encoder

Definition at line 56 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_SensorType

enum IfxStdIf_Pos_SensorType

Position sensor Types.

Enumerator
IfxStdIf_Pos_SensorType_encoder
IfxStdIf_Pos_SensorType_hall
IfxStdIf_Pos_SensorType_resolver
IfxStdIf_Pos_SensorType_angletrk
IfxStdIf_Pos_SensorType_igmr
IfxStdIf_Pos_SensorType_virtual

Definition at line 64 of file IfxStdIf_Pos.h.

Function Documentation

◆ IfxStdIf_Pos_initConfig()

IFX_EXTERN void IfxStdIf_Pos_initConfig ( IfxStdIf_Pos_Config * config )

Initialize the configuration structure to default

Parameters
config Position interface configuration. This parameter is initialized by the function

Definition at line 28 of file IfxStdIf_Pos.c.

Referenced by IfxGpt12_IncrEnc_initConfig().

◆ IfxStdIf_Pos_printStatus()

IFX_EXTERN void IfxStdIf_Pos_printStatus | ( | IfxStdIf_Pos * | driver,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Print the device status.

Parameters
driver | driver handle
io | Interface to which the status is output
Returns
none

Definition at line 44 of file IfxStdIf_Pos.c.

◆ IfxStdIf_Pos_radsToRpm()

IFX_INLINE float32 IfxStdIf_Pos_radsToRpm ( float32 speed )

Converts from rad/s to rpm.

Parameters
speed Specifies the speed in rad/s.
Returns
returns the converted speed in rpm.
See also
IfxStdIf_Pos_rpmToRads()

Definition at line 528 of file IfxStdIf_Pos.h.

◆ IfxStdIf_Pos_rpmToRads()

IFX_INLINE float32 IfxStdIf_Pos_rpmToRads ( float32 speed )

Converts from rpm to rad/s.

Parameters
speed Specifies the speed in rpm.
Returns
returns the converted speed in rad/s.
See also
IfxStdIf_Pos_radsToRpm()

Definition at line 541 of file IfxStdIf_Pos.h.


iLLD_TC26B: IfxStdIf_PwmHl.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Functions
IfxStdIf_PwmHl.h File Reference

Standard interface: Multi-channels, dual-complementary PWM interface. More...

#include "IfxStdIf.h"
#include "IfxStdIf_Timer.h"
Include dependency graph for IfxStdIf_PwmHl.h:

Go to the source code of this file.

Data Structures

struct | IfxStdIf_PwmHl_
Standard interface object. More...
struct | IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration. More...

Typedefs

typedef struct IfxStdIf_PwmHl_ | IfxStdIf_PwmHl
Forward declaration. More...
typedef boolean(* | IfxStdIf_PwmHl_SetDeadtime) (IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s. More...
typedef float32(* | IfxStdIf_PwmHl_GetDeadtime) (IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s. More...
typedef boolean(* | IfxStdIf_PwmHl_SetMinPulse) (IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
typedef float32(* | IfxStdIf_PwmHl_GetMinPulse) (IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s. More...
typedef Ifx_Pwm_Mode(* | IfxStdIf_PwmHl_GetMode) (IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode. More...
typedef boolean(* | IfxStdIf_PwmHl_SetMode) (IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
typedef void(* | IfxStdIf_PwmHl_SetOnTime) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
typedef void(* | IfxStdIf_PwmHl_SetOnTimeAndShift) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
typedef void(* | IfxStdIf_PwmHl_SetPulse) (IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
typedef void(* | IfxStdIf_PwmHl_SetupChannels) (IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...

Functions

IFX_INLINE boolean | IfxStdIf_PwmHl_setDeadtime (IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getDeadtime (IfxStdIf_PwmHl *stdIf)
Return the dead time in s. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMinPulse (IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s. More...
IFX_INLINE float32 | IfxStdIf_PwmHl_getMinPulse (IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s. More...
IFX_INLINE Ifx_Pwm_Mode | IfxStdIf_PwmHl_getMode (IfxStdIf_PwmHl *stdIf)
Return the PWM mode. More...
IFX_INLINE boolean | IfxStdIf_PwmHl_setMode (IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTime (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time. More...
IFX_INLINE void | IfxStdIf_PwmHl_setOnTimeAndShift (IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value. More...
IFX_INLINE void | IfxStdIf_PwmHl_setPulse (IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently. More...
IFX_INLINE void | IfxStdIf_PwmHl_setupChannels (IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
IFX_INLINE IfxStdIf_Timer * | IfxStdIf_PwmHl_getTimer (IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface. More...
IFX_EXTERN void | IfxStdIf_PwmHl_initConfig (IfxStdIf_PwmHl_Config *config)

Detailed Description

Standard interface: Multi-channels, dual-complementary PWM interface.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf_PwmHl.h.

Data Structure Documentation

◆ IfxStdIf_PwmHl_

struct IfxStdIf_PwmHl_

Standard interface object.

Definition at line 155 of file IfxStdIf_PwmHl.h.

Collaboration diagram for IfxStdIf_PwmHl_:
[legend]
Data Fields
IfxStdIf_InterfaceDriver | driver | Interface driver object.
IfxStdIf_PwmHl_GetDeadtime | getDeadtime | IfxStdIf_PwmHl_GetDeadtime.
IfxStdIf_PwmHl_GetMinPulse | getMinPulse | IfxStdIf_PwmHl_GetMinPulse.
IfxStdIf_PwmHl_GetMode | getMode | IfxStdIf_PwmHl_GetMode.
IfxStdIf_PwmHl_SetDeadtime | setDeadtime | IfxStdIf_PwmHl_SetDeadtime.
IfxStdIf_PwmHl_SetMinPulse | setMinPulse | IfxStdIf_PwmHl_SetMinPulse.
IfxStdIf_PwmHl_SetMode | setMode | IfxStdIf_PwmHl_SetMode.
IfxStdIf_PwmHl_SetOnTime | setOnTime | IfxStdIf_PwmHl_SetOnTime.
IfxStdIf_PwmHl_SetOnTimeAndShift | setOnTimeAndShift | IfxStdIf_PwmHl_SetOnTime.
IfxStdIf_PwmHl_SetPulse | setPulse | IfxStdIf_PwmHl_Pulse.
IfxStdIf_PwmHl_SetupChannels | setupChannels | IfxStdIf_PwmHl_SetupChannels.
IfxStdIf_Timer | timer | Timer related standard interface.

◆ IfxStdIf_PwmHl_Config

struct IfxStdIf_PwmHl_Config

Multi-channels PWM object configuration.

Definition at line 175 of file IfxStdIf_PwmHl.h.

Data Fields
Ifx_ActiveState | ccxActiveState | Top PWM active state.
uint8 | channelCount | Number of PWM channels, one channel is made of a top and bottom channel.
Ifx_ActiveState | coutxActiveState | Bottom PWM active state.
float32 | deadtime | Dead time between the top and bottom channels in seconds.
boolean | emergencyEnabled | Specifies if the emergency stop should be enabled or not.
float32 | minPulse | Min pulse allowed as active state for the top and bottom PWM in seconds.
IfxPort_PadDriver | outputDriver | Output pad driver of ccx and coutx pins.
IfxPort_OutputMode | outputMode | Output mode of ccx and coutx pins.

Typedef Documentation

◆ IfxStdIf_PwmHl

typedef struct IfxStdIf_PwmHl_ IfxStdIf_PwmHl

Forward declaration.

Definition at line 61 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetDeadtime

typedef float32(* IfxStdIf_PwmHl_GetDeadtime) (IfxStdIf_InterfaceDriver stdIf)

Return the dead time in s.

It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the deadtime in second

Definition at line 77 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetMinPulse

typedef float32(* IfxStdIf_PwmHl_GetMinPulse) (IfxStdIf_InterfaceDriver stdIf)

Return the minimum pulse time in s.

It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the minimum pulse time in second

Definition at line 93 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_GetMode

typedef Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode) (IfxStdIf_InterfaceDriver stdIf)

Return the PWM mode.

It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation

Parameters
stdIf Pointer to the interface driver object
Returns
Returns the pwm mode

Definition at line 101 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetDeadtime

typedef boolean(* IfxStdIf_PwmHl_SetDeadtime) (IfxStdIf_InterfaceDriver stdIf, float32 deadtime)

Set the dead time in s.

Parameters
stdIf | Pointer to the interface driver object
deadtime | deadtime in second
Return values
TRUE | In case of success
FALSE | In case of failure

Definition at line 69 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetMinPulse

typedef boolean(* IfxStdIf_PwmHl_SetMinPulse) (IfxStdIf_InterfaceDriver stdIf, float32 minPulse)

Set the minimum pulse time in s.

Parameters
stdIf | Pointer to the interface driver object
minPulse | minimal pulse in second
Return values
TRUE | In case of success
FALSE | In case of failure

Definition at line 85 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetMode

typedef boolean(* IfxStdIf_PwmHl_SetMode) (IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)

Set the pwm mode.

Parameters
stdIf | Pointer to the interface driver object
mode | PWM mode
Return values
TRUE | In case of success
FALSE | In case of failure (feature not supported)

Definition at line 109 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetOnTime

typedef void(* IfxStdIf_PwmHl_SetOnTime) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)

Set the pwm ON time.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
Returns
none

Definition at line 116 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetOnTimeAndShift

typedef void(* IfxStdIf_PwmHl_SetOnTimeAndShift) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)

Set the pwm ON time and shift value.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
shift | Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
Returns
none

Definition at line 124 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetPulse

typedef void(* IfxStdIf_PwmHl_SetPulse) (IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)

Set the pwm pulse of all switched independently.

Parameters
stdIf | Pointer to the interface driver object
tOn | Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
offset | Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
Returns
none

Definition at line 132 of file IfxStdIf_PwmHl.h.

◆ IfxStdIf_PwmHl_SetupChannels

typedef void(* IfxStdIf_PwmHl_SetupChannels) (IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)

Set channels which are generating PWM or in "stuck-at" state.

Parameters
stdIf | Pointer to the interface driver object
activeCh | Pointer to boolean array containing values for PWM channels. If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
stuckSt | Pointer to boolean array containing values for active channels. If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
Note
The values for the parameters are arranged as follows: index = 0 –> phase 0 top index = 1 –> phase 0 bottom index = 2 –> phase 1 top index = 3 –> phase 1 bottom index = 4 –> phase 2 top index = 5 –> phase 2 bottom

Definition at line 151 of file IfxStdIf_PwmHl.h.

Function Documentation

◆ IfxStdIf_PwmHl_initConfig()

IFX_EXTERN void IfxStdIf_PwmHl_initConfig ( IfxStdIf_PwmHl_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 28 of file IfxStdIf_PwmHl.c.

Referenced by IfxCcu6_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_initConfig(), and IfxGtm_Tom_PwmHl_initConfig().


iLLD_TC26B: IfxStdIf_Timer.h File Reference

  • Service
  • CpuGeneric
  • StdIf
Data Structures | Typedefs | Enumerations | Functions
IfxStdIf_Timer.h File Reference

Standard interface: Timer. More...

#include "Cpu/Std/Ifx_Types.h"
#include "Src/Std/IfxSrc.h"
#include "Port/Std/IfxPort.h"
#include "IfxStdIf.h"
Include dependency graph for IfxStdIf_Timer.h:

Go to the source code of this file.

Data Structures

struct | IfxStdIf_Timer_
Standard interface object. More...
struct | IfxStdIf_Timer_TrigConfig
Trigger configuration. More...
struct | IfxStdIf_Timer_Config
Timer configuration. More...

Typedefs

typedef struct IfxStdIf_Timer_ | IfxStdIf_Timer
Forward declaration. More...
typedef float32(* | IfxStdIf_Timer_GetFrequency) (IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz. More...
typedef Ifx_TimerValue(* | IfxStdIf_Timer_GetPeriod) (IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks. More...
typedef float32(* | IfxStdIf_Timer_GetResolution) (IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds. More...
typedef Ifx_TimerValue(* | IfxStdIf_Timer_GetTrigger) (IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point. More...
typedef boolean(* | IfxStdIf_Timer_SetFrequency) (IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz. More...
typedef void(* | IfxStdIf_Timer_UpdateInputFrequency) (IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
typedef void(* | IfxStdIf_Timer_ApplyUpdate) (IfxStdIf_InterfaceDriver stdIf)
Apply requested updates. More...
typedef void(* | IfxStdIf_Timer_DisableUpdate) (IfxStdIf_InterfaceDriver stdIf)
Disable updates. More...
typedef float32(* | IfxStdIf_Timer_GetInputFrequency) (IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz. More...
typedef void(* | IfxStdIf_Timer_Run) (IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer. More...
typedef boolean(* | IfxStdIf_Timer_SetPeriod) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period. More...
typedef void(* | IfxStdIf_Timer_SetSingleMode) (IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period. More...
typedef void(* | IfxStdIf_Timer_SetTrigger) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
typedef void(* | IfxStdIf_Timer_Stop) (IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer. More...
typedef boolean(* | IfxStdIf_Timer_AckTimerIrq) (IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it. More...
typedef boolean(* | IfxStdIf_Timer_AckTriggerIrq) (IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it. More...

Enumerations

enum IfxStdIf_Timer_OutputEvent {
IfxStdIf_Timer_Output_disabled,
IfxStdIf_Timer_Output_enabled
}
Output event enable / disable. More...
enum IfxStdIf_Timer_CountDir {
IfxStdIf_Timer_CountDir_up,
IfxStdIf_Timer_CountDir_upAndDown,
IfxStdIf_Timer_CountDir_down
}
Timer increment direction. More...

Functions

IFX_INLINE float32 | IfxStdIf_Timer_getFrequency (IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getPeriod (IfxStdIf_Timer *stdIf)
Return the timer period in ticks. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_getTrigger (IfxStdIf_Timer *stdIf)
Return the timer trigger point. More...
IFX_INLINE float32 | IfxStdIf_Timer_getResolution (IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds. More...
IFX_INLINE boolean | IfxStdIf_Timer_setFrequency (IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_updateInputFrequency (IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account. More...
IFX_INLINE void | IfxStdIf_Timer_applyUpdate (IfxStdIf_Timer *stdIf)
Apply requested updates. More...
IFX_INLINE void | IfxStdIf_Timer_disableUpdate (IfxStdIf_Timer *stdIf)
Disable updates. More...
IFX_INLINE float32 | IfxStdIf_Timer_getInputFrequency (IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz. More...
IFX_INLINE void | IfxStdIf_Timer_run (IfxStdIf_Timer *stdIf)
Immediately start the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_setPeriod (IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period. More...
IFX_INLINE void | IfxStdIf_Timer_setSingleMode (IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period. More...
IFX_INLINE void | IfxStdIf_Timer_setTrigger (IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point. More...
IFX_INLINE void | IfxStdIf_Timer_stop (IfxStdIf_Timer *stdIf)
Immediately stops the timer. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTimerIrq (IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it. More...
IFX_INLINE boolean | IfxStdIf_Timer_ackTriggerIrq (IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it. More...
IFX_INLINE float32 | IfxStdIf_Timer_tickToS (float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds. More...
IFX_INLINE Ifx_TimerValue | IfxStdIf_Timer_sToTick (float32 clockFreq, float32 seconds)
Convert seconds to timer ticks. More...
IFX_INLINE float32 | IfxStdIf_Timer_getPeriodSecond (IfxStdIf_Timer *stdIf)
Return the timer period in second. More...
IFX_EXTERN void | IfxStdIf_Timer_initConfig (IfxStdIf_Timer_Config *config)
IFX_EXTERN void | IfxStdIf_Timer_initStdIf (IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)

Detailed Description

Standard interface: Timer.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf_Timer.h.

Data Structure Documentation

◆ IfxStdIf_Timer_

struct IfxStdIf_Timer_

Standard interface object.

Definition at line 220 of file IfxStdIf_Timer.h.

Data Fields
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
See also
IfxStdIf_Timer_AckTimerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
See also
IfxStdIf_Timer_AckTriggerIrq
IfxStdIf_Timer_ApplyUpdate applyUpdate
See also
IfxStdIf_Timer_ApplyUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
See also
IfxStdIf_Timer_DisableUpdate
IfxStdIf_InterfaceDriver driver Interface driver object.
IfxStdIf_Timer_GetFrequency getFrequency
See also
IfxStdIf_Timer_GetFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
See also
IfxStdIf_Timer_GetInputFrequency
IfxStdIf_Timer_GetPeriod getPeriod
See also
IfxStdIf_Timer_GetPeriod
IfxStdIf_Timer_GetResolution getResolution
See also
IfxStdIf_Timer_GetResolution
IfxStdIf_Timer_GetTrigger getTrigger
See also
IfxStdIf_Timer_GetTrigger
IfxStdIf_Timer_Run run
See also
IfxStdIf_Timer_Run
IfxStdIf_Timer_SetFrequency setFrequency
See also
IfxStdIf_Timer_SetFrequency
IfxStdIf_Timer_SetPeriod setPeriod
See also
IfxStdIf_Timer_SetPeriod
IfxStdIf_Timer_SetSingleMode setSingleMode
See also
IfxStdIf_Timer_SetSingleMode
IfxStdIf_Timer_SetTrigger setTrigger
See also
IfxStdIf_Timer_SetTrigger
IfxStdIf_Timer_Stop stop
See also
IfxStdIf_Timer_Stop
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
See also
IfxStdIf_Timer_UpdateInputFrequency

◆ IfxStdIf_Timer_TrigConfig

struct IfxStdIf_Timer_TrigConfig

Trigger configuration.

Definition at line 242 of file IfxStdIf_Timer.h.

Data Fields
boolean | enabled | If true, the trigger functionality is Initialised, else ignored.
Ifx_Priority | isrPriority | Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | isrProvider | Interrupt service provider for the trigger interrupt.
IfxPort_PadDriver | outputDriver | Output pad driver.
boolean | outputEnabled | If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
IfxPort_OutputMode | outputMode | Output mode.
boolean | risingEdgeAtPeriod | Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset. When the timer is stopped, the output is set to high.
Ifx_TimerValue | triggerPoint | Trigger point in timer ticks.

◆ IfxStdIf_Timer_Config

struct IfxStdIf_Timer_Config

Timer configuration.

Definition at line 255 of file IfxStdIf_Timer.h.

Collaboration diagram for IfxStdIf_Timer_Config:
[legend]
Data Fields
IfxStdIf_Timer_CountDir | countDir | Timer counting mode.
float32 | frequency | PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Ifx_Priority | isrPriority | Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
IfxSrc_Tos | isrProvider | Interrupt service provider for the timer interrupt.
float32 | minResolution | Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration does not enable this setting a warning is given.
float32 | startOffset | FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
IfxStdIf_Timer_TrigConfig | trigger | Trigger configuration.

Typedef Documentation

◆ IfxStdIf_Timer

typedef struct IfxStdIf_Timer_ IfxStdIf_Timer

Forward declaration.

Definition at line 76 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_AckTimerIrq

typedef boolean(* IfxStdIf_Timer_AckTimerIrq) (IfxStdIf_InterfaceDriver stdIf)

Return the timer interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer interrupt flag

Definition at line 210 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_AckTriggerIrq

typedef boolean(* IfxStdIf_Timer_AckTriggerIrq) (IfxStdIf_InterfaceDriver stdIf)

Return the trigger interrupt flag and reset it.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the trigger interrupt flag

Definition at line 216 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_ApplyUpdate

typedef void(* IfxStdIf_Timer_ApplyUpdate) (IfxStdIf_InterfaceDriver stdIf)

Apply requested updates.

Such requested update are calls to:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()

It is important to note, that only one call to Timer_applyUpdate() is allowed within one timer period!!! In order to ensure correct update synchronisation, disableUpdate() should have been called previously.

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 135 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_DisableUpdate

typedef void(* IfxStdIf_Timer_DisableUpdate) (IfxStdIf_InterfaceDriver stdIf)

Disable updates.

The following API action will not be taken in account before applyUpdate is called:

  • IfxStdIf_Timer_setSingleMode()
  • IfxStdIf_Timer_setTrigger()
  • IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency() as well as PWM generation related calls such as:
  • IfxStdIf_PwmHl_setDeadtime()
  • IfxStdIf_PwmHl_setMode()
  • IfxStdIf_PwmHl_setOnTime()
  • IfxStdIf_PwmHl_setupChannels()
Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 152 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetFrequency

typedef float32(* IfxStdIf_Timer_GetFrequency) (IfxStdIf_InterfaceDriver stdIf)

Return the timer frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer frequency in Hz

Definition at line 82 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetInputFrequency

typedef float32(* IfxStdIf_Timer_GetInputFrequency) (IfxStdIf_InterfaceDriver stdIf)

Return the timer input frequency in Hz.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer input frequency in Hz

Definition at line 158 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetPeriod

typedef Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod) (IfxStdIf_InterfaceDriver stdIf)

Return the timer period in ticks.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer period in ticks

Definition at line 88 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetResolution

typedef float32(* IfxStdIf_Timer_GetResolution) (IfxStdIf_InterfaceDriver stdIf)

Return the timer resolution in seconds.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer resolution in seconds

Definition at line 94 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_GetTrigger

typedef Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger) (IfxStdIf_InterfaceDriver stdIf)

Return the timer trigger point.

Parameters
stdIf Pointer to the interface driver object
Returns
Return the timer timer point

Definition at line 100 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_Run

typedef void(* IfxStdIf_Timer_Run) (IfxStdIf_InterfaceDriver stdIf)

Immediately start the timer.

Please note that other mechanism may avoid the timer to tick, such as when the global (input) clock to the timer block is inactive.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 167 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetFrequency

typedef boolean(* IfxStdIf_Timer_SetFrequency) (IfxStdIf_InterfaceDriver stdIf, float32 frequency)

Set the timer frequency in Hz.

Parameters
stdIf | Pointer to the interface driver object
frequency | Requested timer frequency in Hz
Return values
TRUE | The requested frequency could be set
FALSE | The requested frequency is out of range

Definition at line 108 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetPeriod

typedef boolean(* IfxStdIf_Timer_SetPeriod) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)

Set the timer period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
period | Period value in ticks
Return values
TRUE | The requested period could be set
FALSE | The requested period is out of range

Definition at line 177 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetSingleMode

typedef void(* IfxStdIf_Timer_SetSingleMode) (IfxStdIf_InterfaceDriver stdIf, boolean enabled)

Stop timer at the end of the period.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
enabled | If TRUE, enable the single mode, else disable the single mode (continuous mode)
Returns
none

Definition at line 186 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_SetTrigger

typedef void(* IfxStdIf_Timer_SetTrigger) (IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)

Set trigger point.

See also
Timer_OutputEvent for the definition of the output level. Active state is defined by Timer_Config::outputActiveState.

Timer_applyUpdate() shall be invoked in order this to take effect.

Parameters
stdIf | Pointer to the interface driver object
triggerPoint | Trigger point in ticks from the period start.
Returns
none

Definition at line 198 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_Stop

typedef void(* IfxStdIf_Timer_Stop) (IfxStdIf_InterfaceDriver stdIf)

Immediately stops the timer.

Parameters
stdIf Pointer to the interface driver object
Returns
none

Definition at line 204 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_UpdateInputFrequency

typedef void(* IfxStdIf_Timer_UpdateInputFrequency) (IfxStdIf_InterfaceDriver stdIf)

Indicates the stdIf that the imput frequency has changed and that it should be taken in account.

Parameters
stdIf Pointer to the interface driver object
Returns
None

Definition at line 114 of file IfxStdIf_Timer.h.

Enumeration Type Documentation

◆ IfxStdIf_Timer_CountDir

enum IfxStdIf_Timer_CountDir

Timer increment direction.

Enumerator
IfxStdIf_Timer_CountDir_up | Timer is counting up.
IfxStdIf_Timer_CountDir_upAndDown | Timer is counting up and down.
IfxStdIf_Timer_CountDir_down | Timer is counting down.

Definition at line 68 of file IfxStdIf_Timer.h.

◆ IfxStdIf_Timer_OutputEvent

enum IfxStdIf_Timer_OutputEvent

Output event enable / disable.

Enumerator
IfxStdIf_Timer_Output_disabled | Timer output is set to the inactive, no change in the output.
IfxStdIf_Timer_Output_enabled | In case the trigger is enabled, the output is set to active between time 0 to the trigger point, and is set to inactive between the trigger point and the period. In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_up, the output is toggled when the timer is reset In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_down, the output is toggled when the timer is reloaded In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_upAndDown, the output is toggled when the timer reach 0 In case the trigger is enabled the trigger is active before the trigger point and inactive after the trigger point.

Definition at line 54 of file IfxStdIf_Timer.h.

Function Documentation

◆ IfxStdIf_Timer_initConfig()

IFX_EXTERN void IfxStdIf_Timer_initConfig ( IfxStdIf_Timer_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 28 of file IfxStdIf_Timer.c.

Referenced by IfxCcu6_TimerWithTrigger_initConfig(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Tom_Timer_initConfig(), and IfxStm_Timer_initConfig().

◆ IfxStdIf_Timer_initStdIf()

IFX_EXTERN void IfxStdIf_Timer_initStdIf | ( | IfxStdIf_Timer * | stdIf,
 |  | IfxStdIf_InterfaceDriver | driver
 | ) |  |

Initialize the stdIf so that all call back function default to no operation

Parameters
stdIf | Pointer to the interface driver object
driver | Interface driver object

Definition at line 126 of file IfxStdIf_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().


iLLD_TC26B: PwmHl.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
PwmHl.h File Reference

Multi-channels, dual-complementary PWM interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for PwmHl.h:

Go to the source code of this file.

Data Structures

struct | PwmHl_Functions
struct | PwmHl_s
Structure of the TPwm interface. More...
struct | PwmHl_Config
Configuration structure of the TPwm interface. More...

Typedefs

typedef struct PwmHl_s | PwmHl
typedef void(* | PwmHl_Start) (PwmHl *handle)
typedef void(* | PwmHl_Pause) (PwmHl *handle)
typedef void(* | PwmHl_Resume) (PwmHl *handle)
typedef void(* | PwmHl_Stop) (PwmHl *handle)

Detailed Description

Multi-channels, dual-complementary PWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file PwmHl.h.

Data Structure Documentation

◆ PwmHl_Functions

struct PwmHl_Functions

Definition at line 39 of file PwmHl.h.

Collaboration diagram for PwmHl_Functions:
[legend]
Data Fields
PwmHl_Start | start
PwmHl_Stop | stop

◆ PwmHl_s

struct PwmHl_s

Structure of the TPwm interface.

Definition at line 46 of file PwmHl.h.

Data Fields
float32 | t12Frequency | Actual timer12 frequency.
Ifx_TimerValue | t12Period | Actual timer 12 period.
float32 | t13Frequency | Actual timer13 frequency.
Ifx_TimerValue | t13Period | Actual timer 13 period.

◆ PwmHl_Config

struct PwmHl_Config

Configuration structure of the TPwm interface.

Definition at line 58 of file PwmHl.h.

Data Fields
Ifx_ActiveState | activeState | Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks.
Ifx_TimerValue | noiseFilter | Specify hall sensor noise filter.
Ifx_TimerValue | phaseDelay | Specify the ticks before before updating each ouput hall pattern.
float32 | t12Frequency | Specify expected T12 PWM frequency in Hertz.
Ifx_TimerValue | t12Period | Specify expected T12 PWM period in ticks.
float32 | t13Frequency | Specify expected T13 PWM frequency in Hertz.
Ifx_TimerValue | t13Period | Specify expected T13 PWM period in ticks.

Typedef Documentation

◆ PwmHl

typedef struct PwmHl_s PwmHl

Definition at line 33 of file PwmHl.h.

◆ PwmHl_Pause

typedef void(* PwmHl_Pause) (PwmHl *handle)

Definition at line 35 of file PwmHl.h.

◆ PwmHl_Resume

typedef void(* PwmHl_Resume) (PwmHl *handle)

Definition at line 36 of file PwmHl.h.

◆ PwmHl_Start

typedef void(* PwmHl_Start) (PwmHl *handle)

Definition at line 34 of file PwmHl.h.

◆ PwmHl_Stop

typedef void(* PwmHl_Stop) (PwmHl *handle)

Definition at line 37 of file PwmHl.h.


iLLD_TC26B: Timer.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
Timer.h File Reference

Timer interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Timer.h:

Go to the source code of this file.

Data Structures

struct | Timer_Functions
struct | Timer_s
Structure of the Timer interface. More...
struct | Timer_Config
Configuration structure of the Timer interface. More...

Typedefs

typedef struct Timer_s | Timer
typedef void(* | Timer_Start) (Timer *handle)
typedef void(* | Timer_Stop) (Timer *handle)
typedef void(* | Timer_SynchronousStart) (Timer *handle)
typedef void(* | Timer_SynchronousStop) (Timer *handle)
typedef void(* | Timer_CountOneStep) (Timer *handle)
typedef void(* | Timer_StartSingleShotMode) (Timer *handle)

Detailed Description

Timer interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:19 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Timer.h.

Data Structure Documentation

◆ Timer_Functions

struct Timer_Functions

Definition at line 41 of file Timer.h.

Collaboration diagram for Timer_Functions:
[legend]
Data Fields
Timer_CountOneStep | countOneStep
Timer_Start | start
Timer_StartSingleShotMode | startSingleShotMode
Timer_Stop | stop
Timer_SynchronousStart | synchronousStart
Timer_SynchronousStop | synchronousStop

◆ Timer_s

struct Timer_s

Structure of the Timer interface.

Definition at line 52 of file Timer.h.

Data Fields
float32 | t12Frequency | Actual timer12 frequency.
Ifx_TimerValue | t12Period | Actual timer 12 period.
float32 | t13Frequency | Actual timer13 frequency.
Ifx_TimerValue | t13Period | Actual timer 13 period.

◆ Timer_Config

struct Timer_Config

Configuration structure of the Timer interface.

Definition at line 64 of file Timer.h.

Data Fields
Ifx_TimerValue | activeCount | Specify active PWM period (TCOUNT)
float32 | t12Frequency | Specify expected T12 PWM frequency in Hertz.
Ifx_TimerValue | t12Period | Specify expected T12 PWM period in ticks.
float32 | t13Frequency | Specify expected T13 PWM frequency in Hertz.
Ifx_TimerValue | t13Period | Specify expected T13 PWM period in ticks.
Ifx_TimerValue | waitingTime | Specify the expected ticks before timer starts (TWAIT)

Typedef Documentation

◆ Timer

typedef struct Timer_s Timer

Definition at line 33 of file Timer.h.

◆ Timer_CountOneStep

typedef void(* Timer_CountOneStep) (Timer *handle)

Definition at line 38 of file Timer.h.

◆ Timer_Start

typedef void(* Timer_Start) (Timer *handle)

Definition at line 34 of file Timer.h.

◆ Timer_StartSingleShotMode

typedef void(* Timer_StartSingleShotMode) (Timer *handle)

Definition at line 39 of file Timer.h.

◆ Timer_Stop

typedef void(* Timer_Stop) (Timer *handle)

Definition at line 35 of file Timer.h.

◆ Timer_SynchronousStart

typedef void(* Timer_SynchronousStart) (Timer *handle)

Definition at line 36 of file Timer.h.

◆ Timer_SynchronousStop

typedef void(* Timer_SynchronousStop) (Timer *handle)

Definition at line 37 of file Timer.h.


iLLD_TC26B: TPwm.h File Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Data Structures | Typedefs
TPwm.h File Reference

TPWM interface. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for TPwm.h:

Go to the source code of this file.

Data Structures

struct | TPwm_Functions
struct | TPwm_s
Structure of the TPwm interface. More...
struct | TPwm_Config
Configuration structure of the TPwm interface. More...

Typedefs

typedef struct TPwm_s | TPwm
typedef void(* | TPwm_Start) (TPwm *handle)
typedef void(* | TPwm_Pause) (TPwm *handle)
typedef void(* | TPwm_Resume) (TPwm *handle)
typedef void(* | TPwm_Stop) (TPwm *handle)

Detailed Description

TPWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:18 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file TPwm.h.

Data Structure Documentation

◆ TPwm_Functions

struct TPwm_Functions

Definition at line 39 of file TPwm.h.

Collaboration diagram for TPwm_Functions:
[legend]
Data Fields
TPwm_Pause | pause
TPwm_Resume | resume
TPwm_Start | start
TPwm_Stop | stop

◆ TPwm_s

struct TPwm_s

Structure of the TPwm interface.

Definition at line 48 of file TPwm.h.

Data Fields
float32 | frequency | Actual frequency.
Ifx_TimerValue | period | Actual timer period.

◆ TPwm_Config

struct TPwm_Config

Configuration structure of the TPwm interface.

Definition at line 58 of file TPwm.h.

Data Fields
Ifx_TimerValue | activeCount | Specify active PWM period (TCOUNT)
Ifx_ActiveState | activeState | Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks.
float32 | frequency | Specify expected PWM frequency in Hertz.
Ifx_TimerValue | period | Specify expected PWM period in ticks.
Ifx_TimerValue | waitingTime | Specify the expected ticks before timer starts (TWAIT)

Typedef Documentation

◆ TPwm

typedef struct TPwm_s TPwm

Definition at line 33 of file TPwm.h.

◆ TPwm_Pause

typedef void(* TPwm_Pause) (TPwm *handle)

Definition at line 35 of file TPwm.h.

◆ TPwm_Resume

typedef void(* TPwm_Resume) (TPwm *handle)

Definition at line 36 of file TPwm.h.

◆ TPwm_Start

typedef void(* TPwm_Start) (TPwm *handle)

Definition at line 34 of file TPwm.h.

◆ TPwm_Stop

typedef void(* TPwm_Stop) (TPwm *handle)

Definition at line 37 of file TPwm.h.


iLLD_TC26B: Data Structure Index

Data Structure Index
_ | c | i | p | s | t
_
IfxCcu6_Icu_Config IfxEray_Eray_ReceivedFrame IfxI2c_I2c IfxQspi_Sclk_Out
IfxCcu6_Icu_InterruptConfig IfxEray_Eray_Succ1Config IfxI2c_I2c_Config IfxQspi_Slsi_In
_Fifo IfxCcu6_Icu_Pins IfxEray_Eray_Succ2Config IfxI2c_I2c_Device IfxQspi_Slso_Out
c
IfxCcu6_Icu_TriggerConfig IfxEray_Eray_Succ3Config IfxI2c_I2c_deviceConfig IfxQspi_SpiMaster
IfxCcu6_PwmBc IfxEray_Eray_TransmitControl IfxI2c_Pins IfxQspi_SpiMaster_Channel_s
cfloat32 IfxCcu6_PwmBc_Config IfxEray_Header IfxI2c_Scl_InOut IfxQspi_SpiMaster_ChannelConfig
cfract IfxCcu6_PwmBc_InterruptConfig IfxEray_ReceivedHeader IfxI2c_Sda_InOut IfxQspi_SpiMaster_Config
csfract IfxCcu6_PwmBc_MultiChannelControl IfxEray_Rxd_In IfxIom_Driver IfxQspi_SpiMaster_Dma
csint16 IfxCcu6_PwmBc_Pins IfxEray_SlotConfig IfxIom_Driver_Config IfxQspi_SpiMaster_DmaConfig
csint32 IfxCcu6_PwmBc_Timer12 IfxEray_Txd_Out IfxIom_Driver_Lam IfxQspi_SpiMaster_ErrorFlags
i
IfxCcu6_PwmBc_Timer13 IfxEray_Txen_Out IfxIom_Driver_LamConfig IfxQspi_SpiMaster_Input
IfxCcu6_PwmBc_TriggerConfig IfxEth IfxIom_Driver_LamEventConfig IfxQspi_SpiMaster_InputOutput
Icu_Config IfxCcu6_PwmHl_Base IfxEth_AltRxDescr0_Bits IfxIom_Driver_LamEventWindowConfig IfxQspi_SpiMaster_Output
Icu_Functions IfxCcu6_PwmHl_Config IfxEth_AltRxDescr1_Bits IfxIom_Driver_LamFilterConfig IfxQspi_SpiMaster_Pins
Icu_s IfxCcu6_PwmHl_Mode IfxEth_AltTxDescr0_Bits IfxIom_Driver_LamMonConfig IfxQspi_SpiSlave
Ifc_Crc IfxCcu6_PwmHl_s IfxEth_AltTxDescr1_Bits IfxIom_Driver_LamRefConfig IfxQspi_SpiSlave_Config
Ifc_Crc_Table IfxCcu6_T12hr_In IfxEth_Col_In IfxModule_IndexMap IfxQspi_SpiSlave_Dma
Ifc_Crc_Table16 IfxCcu6_T13hr_In IfxEth_Config IfxMsc_En_Out IfxQspi_SpiSlave_DmaConfig
Ifc_Crc_Table32 IfxCcu6_Timer IfxEth_Crs_In IfxMsc_Fcln_Out IfxQspi_SpiSlave_ErrorFlags
Ifc_Crc_Table8 IfxCcu6_Timer_Clock IfxEth_Crsdv_In IfxMsc_Fclp_Out IfxQspi_SpiSlave_Pins
Ifx_AngleTrkF32 IfxCcu6_Timer_Config IfxEth_Mdc_Out IfxMsc_Inj_In IfxQspi_SpiSlave_Protocol
Ifx_AngleTrkF32_CfgData IfxCcu6_Timer_InterruptConfig IfxEth_Mdio_InOut IfxMsc_Msc IfxScu_Dcdcsync_Out
Ifx_AngleTrkF32_Config IfxCcu6_Timer_Pins IfxEth_MiiPins IfxMsc_Msc_Abra IfxScu_Emgstop_In
Ifx_AngleTrkF32_PosIf IfxCcu6_Timer_Timer12 IfxEth_Refclk_In IfxMsc_Msc_Clock IfxScu_Evrwup_In
Ifx_CircularBuffer IfxCcu6_Timer_Timer13 IfxEth_RingModeBuffersConfig IfxMsc_Msc_Config IfxScu_Extclk_Out
Ifx_ClpxFloat32_Integral IfxCcu6_Timer_TriggerConfig IfxEth_RingModeRxBuffersConfig IfxMsc_Msc_DownstreamControlConfig IfxScu_Hwcfg_In
Ifx_Console IfxCcu6_TimerWithTrigger IfxEth_RingModeTxBuffersConfig IfxMsc_Msc_DownstreamControlExtensionConfig IfxScu_Req_In
Ifx_DataBufferMode_TimeStampSingle IfxCcu6_TimerWithTrigger_Base IfxEth_RmiiPins IfxMsc_Msc_en IfxScu_Wdtlck_Out
Ifx_DateTime IfxCcu6_TimerWithTrigger_Config IfxEth_Rxclk_In IfxMsc_Msc_fcln IfxScuCcu_CcuconRegConfig
Ifx_Fifo_Shared IfxCcu6_TPwm IfxEth_Rxd_In IfxMsc_Msc_fclp IfxScuCcu_ClockDistributionConfig
Ifx_GlobalResources IfxCcu6_TPwm_Clock IfxEth_RxDescr IfxMsc_Msc_inj0 IfxScuCcu_Config
Ifx_GlobalResources_Item IfxCcu6_TPwm_Config IfxEth_RxDescr0 IfxMsc_Msc_inj1 IfxScuCcu_ErayPllConfig
Ifx_IntegralF32 IfxCcu6_TPwm_InterruptConfig IfxEth_RxDescr0_Bits IfxMsc_Msc_InterruptConfig IfxScuCcu_FlashWaitstateConfig
Ifx_InternalMux_Config IfxCcu6_TPwm_Pins IfxEth_RxDescr1 IfxMsc_Msc_Io IfxScuCcu_InitialStepConfig
Ifx_InternalMux_MuxConfig IfxCcu6_TPwm_Timer12 IfxEth_RxDescr1_Bits IfxMsc_Msc_OutputControlConfig IfxScuCcu_PllStepsConfig
Ifx_IsrSetting IfxCcu6_TPwm_Timer13 IfxEth_RxDescr2 IfxMsc_Msc_sdi IfxScuCcu_SysPllConfig
Ifx_LowPassPt1F32 IfxCcu6_TPwm_TriggerConfig IfxEth_RxDescr3 IfxMsc_Msc_son IfxScuWdt_Config
Ifx_LowPassPt1F32_Config IfxCif_Cam IfxEth_RxDescrList IfxMsc_Msc_sop IfxSent_Sent
Ifx_LutIndexedLinearF32 IfxCif_Cam_Common IfxEth_Rxdv_In IfxMsc_Msc_UpstreamStatusConfig IfxSent_Sent_Channel
Ifx_LutIndexedLinearF32_Item IfxCif_Cam_Config IfxEth_Rxer_In IfxMsc_Sdi_In IfxSent_Sent_ChannelConfig
Ifx_LutLinearF32 IfxCif_Cam_Downscaling IfxEth_Txclk_In IfxMsc_Son_Out IfxSent_Sent_Config
Ifx_LutLinearF32_Item IfxCif_Cam_JfifHeader IfxEth_Txd_Out IfxMsc_Sop_Out IfxSent_Sent_Enable
Ifx_RampF32 IfxCif_Cam_JpegTable IfxEth_TxDescr IfxMtu_SramItem IfxSent_Sent_EnabledInterrupts
Ifx_Shell IfxCif_Cam_JpegTables IfxEth_TxDescr0 IfxMultican_Can IfxSent_Sent_Frame
Ifx_Shell_CmdLine IfxCif_Cam_MemAreas IfxEth_TxDescr0_Bits IfxMultican_Can_Config IfxSent_Sent_In
Ifx_Shell_Command IfxCif_Cam_MemConfig IfxEth_TxDescr1 IfxMultican_Can_FdConfig IfxSent_Sent_InputOutputControl
Ifx_Shell_Config IfxCif_Cam_MemInfo IfxEth_TxDescr1_Bits IfxMultican_Can_GatewayConfig IfxSent_Sent_Interrupt
Ifx_Shell_Flags IfxCif_Cam_PictureInfo IfxEth_TxDescr2 IfxMultican_Can_InterruptConfig IfxSent_Sent_InterruptNodeControl
Ifx_Shell_Protocol IfxCif_Cam_TableInfo IfxEth_TxDescr3 IfxMultican_Can_InterruptSource IfxSent_Sent_NibbleControl
Ifx_Shell_Runtime IfxCif_Clk_In IfxEth_TxDescrList IfxMultican_Can_MsgObj IfxSent_Sent_Pins
Ifx_Shell_Syntax IfxCif_D_In IfxEth_Txen_Out IfxMultican_Can_MsgObjConfig IfxSent_Sent_ReceiveControl
IfxAsclin_Asc IfxCif_Hsnc_In IfxEth_Txer_Out IfxMultican_Can_MsgObjControl IfxSent_Sent_SerialMessageFrame
IfxAsclin_Asc_BaudRate IfxCif_Vsnc_In IfxFce_Crc IfxMultican_Can_Node IfxSent_Sent_TransmitControl
IfxAsclin_Asc_BitTimingControl IfxCpu_Counter IfxFce_Crc_Config IfxMultican_Can_NodeConfig IfxSent_Spc_Out
IfxAsclin_Asc_Config IfxCpu_Perf IfxFce_Crc_Crc IfxMultican_Message IfxSmu_configFsp
IfxAsclin_Asc_ErrorFlags IfxCpu_Trap IfxFce_Crc_CrcConfig IfxMultican_MsgObjStat IfxSmu_Fsp_Out
IfxAsclin_Asc_ErrorFlagsUnion IfxCpu_Trap_Id IfxFce_Crc_EnabledInterrupts IfxMultican_Rxd_In IfxStdIf_DPipe_
IfxAsclin_Asc_FifoControl IfxDma_Dma IfxFft_Fft IfxMultican_Txd_Out IfxStdIf_Pos_
IfxAsclin_Asc_FrameControl IfxDma_Dma_Channel IfxFft_Fft_Config IfxPort_Esr_Masks IfxStdIf_Pos_Config
IfxAsclin_Asc_InterruptConfig IfxDma_Dma_ChannelConfig IfxFft_Fft_Count64 IfxPort_Io_Config IfxStdIf_Pos_Status
IfxAsclin_Asc_Pins IfxDma_Dma_Config IfxFft_Fft_Job_s IfxPort_Io_ConfigPin IfxStdIf_Pos_Status.B
IfxAsclin_Cts_In IfxDsadc_Cgpwm_Out IfxFft_Fft_JobConfig IfxPort_Pin IfxStdIf_PwmHl_
IfxAsclin_Lin IfxDsadc_Cin_In IfxFlash_ErrorTracking_Address IfxPort_Pin_Config IfxStdIf_PwmHl_Config
IfxAsclin_Lin_AcknowledgementFlags IfxDsadc_Cout_Out IfxFlash_flashSector IfxPsi5_Psi5 IfxStdIf_Timer_
IfxAsclin_Lin_BaudrateDetection IfxDsadc_Din_In IfxGpt12_Capin_In IfxPsi5_Psi5_Channel IfxStdIf_Timer_Config
IfxAsclin_Lin_BaudrateGeneration IfxDsadc_Dsadc IfxGpt12_IncrEnc IfxPsi5_Psi5_ChannelConfig IfxStdIf_Timer_TrigConfig
IfxAsclin_Lin_BitSamplingControl IfxDsadc_Dsadc_AuxFilterConfig IfxGpt12_IncrEnc_Config IfxPsi5_Psi5_ChannelTrigger IfxStm_CompareConfig
IfxAsclin_Lin_BitTimingControl IfxDsadc_Dsadc_CarrierGenConfig IfxGpt12_TxEud_In IfxPsi5_Psi5_Clock IfxStm_Timer
IfxAsclin_Lin_Config IfxDsadc_Dsadc_Channel IfxGpt12_TxIn_In IfxPsi5_Psi5_Config IfxStm_Timer_Base
IfxAsclin_Lin_DataControl IfxDsadc_Dsadc_ChannelConfig IfxGpt12_TxOut_Out IfxPsi5_Psi5_Frame IfxStm_Timer_Config
IfxAsclin_Lin_EnabledInterrupts IfxDsadc_Dsadc_ChannelPins IfxGtm_Atom_Pwm_Config IfxPsi5_Psi5_FrameData IfxVadc_Adc
IfxAsclin_Lin_ErrorFlags IfxDsadc_Dsadc_CombFilterConfig IfxGtm_Atom_Pwm_Driver IfxPsi5_Psi5_InputOutputControl IfxVadc_Adc_ArbiterConfig
IfxAsclin_Lin_FifoControl IfxDsadc_Dsadc_Config IfxGtm_Atom_Pwm_Interrupt IfxPsi5_Psi5_Message IfxVadc_Adc_BackgroundScanConfig
IfxAsclin_Lin_FrameControl IfxDsadc_Dsadc_DemodulatorConfig IfxGtm_Atom_Pwm_pin IfxPsi5_Psi5_PinsConfig IfxVadc_Adc_Channel
IfxAsclin_Lin_FrameControlFlags IfxDsadc_Dsadc_FirFilterConfig IfxGtm_Atom_PwmHl_Base IfxPsi5_Psi5_PulseGeneration IfxVadc_Adc_ChannelConfig
IfxAsclin_Lin_FrameDataControl IfxDsadc_Dsadc_IntegratorConfig IfxGtm_Atom_PwmHl_Config IfxPsi5_Psi5_Rdm IfxVadc_Adc_ClassConfig
IfxAsclin_Lin_InterruptConfig IfxDsadc_Dsadc_ModulatorConfig IfxGtm_Atom_PwmHl_Mode IfxPsi5_Psi5_Rds IfxVadc_Adc_Config
IfxAsclin_Lin_LinControl IfxDsadc_Dsadc_RectifierConfig IfxGtm_Atom_PwmHl_s IfxPsi5_Psi5_ReceiveControl IfxVadc_Adc_EmuxControl
IfxAsclin_Lin_PduType IfxDsadc_Dsn_In IfxGtm_Atom_Timer IfxPsi5_Psi5_SerialMessage IfxVadc_Adc_EmuxPinConfig
IfxAsclin_Lin_Pins IfxDsadc_Dsp_In IfxGtm_Atom_Timer_Base IfxPsi5_Psi5_StartupOptions IfxVadc_Adc_GatingTriggerConfig
IfxAsclin_Rts_Out IfxDsadc_Itr_In IfxGtm_Atom_Timer_Config IfxPsi5_Psi5_TimeStampConfig IfxVadc_Adc_Group
IfxAsclin_Rx_In IfxDsadc_Rdc IfxGtm_Atom_ToutMap IfxPsi5_Psi5_TransmitControl IfxVadc_Adc_GroupConfig
IfxAsclin_Sclk_Out IfxDsadc_Rdc_Config IfxGtm_Clk_Out IfxPsi5_Rx_In IfxVadc_Adc_QueueConfig
IfxAsclin_Slso_Out IfxDsadc_Rdc_ConfigHw IfxGtm_Tim_In IfxPsi5_Tx_Out IfxVadc_Adc_ScanConfig
IfxAsclin_Spi IfxDsadc_Rdc_GtmTimestamp IfxGtm_Tim_In_Config IfxPsi5s_Clk_Out IfxVadc_Emux_Out
IfxAsclin_Spi_Baudrate IfxDsadc_Rdc_Hw IfxGtm_Tim_In_ConfigCapture IfxPsi5s_Psi5s IfxVadc_GxBfl_Out
IfxAsclin_Spi_BitSamplingControl IfxDsadc_Rdc_Ts IfxGtm_Tim_In_ConfigFilter IfxPsi5s_Psi5s_AscConfig IfxVadc_Vadcg_In
IfxAsclin_Spi_Config IfxDsadc_Sg_In IfxGtm_Tim_In_ConfigTimeout IfxPsi5s_Psi5s_Channel
p
IfxAsclin_Spi_ErrorFlags IfxDts_Dts_Config IfxGtm_Tim_TinMap IfxPsi5s_Psi5s_ChannelConfig
IfxAsclin_Spi_FifoControl IfxEray_Eray IfxGtm_Tom_Pwm_Config IfxPsi5s_Psi5s_ChannelTrigger PwmHl_Config
IfxAsclin_Spi_FrameControl IfxEray_Eray_BufferReconfig IfxGtm_Tom_Pwm_Driver IfxPsi5s_Psi5s_Clock PwmHl_Functions
IfxAsclin_Spi_InputOutputControl IfxEray_Eray_Config IfxGtm_Tom_Pwm_Interrupt IfxPsi5s_Psi5s_Config PwmHl_s
IfxAsclin_Spi_InterruptConfig IfxEray_Eray_ControllerConfig IfxGtm_Tom_Pwm_pin IfxPsi5s_Psi5s_Frame
s
IfxAsclin_Spi_Job IfxEray_Eray_Gtu01Config IfxGtm_Tom_PwmHl_Base IfxPsi5s_Psi5s_GlobalControlConfig
IfxAsclin_Spi_Pins IfxEray_Eray_Gtu02Config IfxGtm_Tom_PwmHl_Config IfxPsi5s_Psi5s_Pins Spi_ErrorChecks
IfxAsclin_Tx_Out IfxEray_Eray_Gtu03Config IfxGtm_Tom_PwmHl_Mode IfxPsi5s_Psi5s_PulseGeneration SpiIf_
IfxCcu6_Cc60_Out IfxEray_Eray_Gtu04Config IfxGtm_Tom_PwmHl_s IfxPsi5s_Psi5s_ReceiveControl SpiIf_Ch_
IfxCcu6_Cc60in_In IfxEray_Eray_Gtu05Config IfxGtm_Tom_TGC IfxPsi5s_Psi5s_ReceiveData SpiIf_ChConfig_
IfxCcu6_Cc61_Out IfxEray_Eray_Gtu06Config IfxGtm_Tom_Timer IfxPsi5s_Psi5s_ReceivedBits SpiIf_ChMode
IfxCcu6_Cc61in_In IfxEray_Eray_Gtu07Config IfxGtm_Tom_Timer_Base IfxPsi5s_Psi5s_ReceivedData SpiIf_Config
IfxCcu6_Cc62_Out IfxEray_Eray_Gtu08Config IfxGtm_Tom_Timer_Config IfxPsi5s_Psi5s_ReceiveStatus SpiIf_Flags
IfxCcu6_Cc62in_In IfxEray_Eray_Gtu09Config IfxGtm_Tom_ToutMap IfxPsi5s_Psi5s_ReceiveTimestamp SpiIf_funcs
IfxCcu6_Ccpos0_In IfxEray_Eray_Gtu10Config IfxGtm_Trig_AdcTrig_Table IfxPsi5s_Psi5s_Timestamp SpiIf_Job
IfxCcu6_Ccpos1_In IfxEray_Eray_Gtu11Config IfxGtm_Trig_Channel IfxPsi5s_Psi5s_TimeStampConfig
t
IfxCcu6_Ccpos2_In IfxEray_Eray_GTUConfig IfxGtm_Trig_Source IfxPsi5s_Psi5s_TransmitControl
IfxCcu6_Cout60_Out IfxEray_Eray_Interrupt IfxGtm_Trig_Trigger IfxPsi5s_Rx_In Timer_Config
IfxCcu6_Cout61_Out IfxEray_Eray_MessageRAMConfig IfxHssl_Hsct IfxPsi5s_Tx_Out Timer_Functions
IfxCcu6_Cout62_Out IfxEray_Eray_NodeA IfxHssl_Hsct_Config IfxQspi_DelayConst Timer_s
IfxCcu6_Cout63_Out IfxEray_Eray_NodeB IfxHssl_Hssl IfxQspi_Hsicin_In TPwm_Config
IfxCcu6_Ctrap_In IfxEray_Eray_NodeConfig IfxHssl_Hssl_AccessWindow IfxQspi_Mrst_In TPwm_Functions
IfxCcu6_Icu IfxEray_Eray_Pins IfxHssl_Hssl_Channel IfxQspi_Mrst_Out TPwm_s
IfxCcu6_Icu_Channel IfxEray_Eray_Prtc1Control IfxHssl_Hssl_ChannelConfig IfxQspi_Mtsr_In
IfxCcu6_Icu_ChannelConfig IfxEray_Eray_Prtc2Control IfxHssl_Hssl_Config IfxQspi_Mtsr_Out
IfxCcu6_Icu_Clock IfxEray_Eray_ReceiveControl IfxHssl_Hssl_errorFlags IfxQspi_Sclk_In
_ | c | i | p | s | t


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- a -

  • a : Ifx_LowPassPt1F32
  • A : IfxEth_RxDescr0 , IfxEth_RxDescr1 , IfxEth_TxDescr0 , IfxEth_TxDescr1
  • a : IfxPsi5_Psi5_StartupOptions
  • abd : IfxAsclin_Lin_BaudrateDetection
  • abraBlockBypass : IfxMsc_Msc_Abra
  • abraConfig : IfxMsc_Msc_Config
  • abraDownstreamBlockBaudrate : IfxMsc_Msc_Abra
  • ac : IfxCif_Cam_JpegTable
  • accelEst : Ifx_AngleTrkF32
  • acceptanceMask : IfxMultican_Can_MsgObjConfig
  • acceptedStartupDeviation : IfxEray_Eray_Gtu06Config
  • accessWindow0 : IfxHssl_Hssl_Config
  • accessWindow1 : IfxHssl_Hssl_Config
  • accessWindow2 : IfxHssl_Hssl_Config
  • accessWindow3 : IfxHssl_Hssl_Config
  • accumulatedCounterIndex : IfxIom_Driver_Lam
  • accumulatedEventUsedMask : IfxIom_Driver
  • acknowledgmentFlags : IfxAsclin_Lin
  • ackTimerIrq : IfxStdIf_Timer_
  • ackTriggerIrq : IfxStdIf_Timer_
  • ACT_TB : IfxGtm_Tom_TGC
  • activateSlso : IfxQspi_SpiMaster_Channel_s
  • activeChannel : SpiIf_
  • activeCount : Timer_Config , TPwm_Config
  • activeState : PwmHl_Config , TPwm_Config
  • actualUartFrameCount : IfxPsi5s_Psi5s_ReceivedBits
  • address : IfxFlash_ErrorTracking_Address
  • AFM : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • agc : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer
  • agcApplyUpdate : IfxGtm_Atom_Timer
  • agcDisableUpdate : IfxGtm_Atom_Timer
  • alertInterrupt : IfxMultican_Can_NodeConfig
  • align : Ifx_Console
  • ALL : IfxAsclin_Asc_ErrorFlagsUnion , IfxSent_Sent_EnabledInterrupts
  • allowSleepMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • alternateCrcSelected : IfxSent_Sent_ReceiveControl
  • alti : IfxAsclin_Lin_Config , IfxAsclin_Spi_InputOutputControl
  • analogFrequency : IfxVadc_Adc_Config
  • analyzerMode : IfxMultican_Can_NodeConfig
  • angleAtan : Ifx_AngleTrkF32
  • angleErr : Ifx_AngleTrkF32
  • angleEst : Ifx_AngleTrkF32
  • angleRef : Ifx_AngleTrkF32
  • angleTrk : IfxDsadc_Rdc
  • app0 : IfxCif_Cam_JfifHeader
  • applyUpdate : IfxStdIf_Timer_
  • arbiter : IfxVadc_Adc_GroupConfig
  • arbiterRoundLength : IfxVadc_Adc_ArbiterConfig
  • ascConfig : IfxPsi5s_Psi5s_Config
  • ascFramingErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • asclin : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Lin , IfxAsclin_Lin_Config , IfxAsclin_Spi , IfxAsclin_Spi_Config
  • ascOnlyMode : IfxPsi5s_Psi5s_GlobalControlConfig
  • ascOverrunErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • ascParityErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • assertion : IfxCpu_Trap_Id
  • asynchronousModeSelected : IfxPsi5_Psi5_ReceiveControl
  • atom : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Atom_ToutMap
  • atomChannel : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver
  • atomIndex : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer
  • autoBackgroundScanEnabled : IfxVadc_Adc_BackgroundScanConfig
  • autoCS : SpiIf_ChMode
  • automaticLengthReload : IfxFce_Crc_CrcConfig
  • autoscanEnabled : IfxVadc_Adc_ScanConfig
  • auxFilter : IfxDsadc_Dsadc_ChannelConfig
  • availMemSize : IfxCif_Cam


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- b -

  • b : Ifx_LowPassPt1F32
  • B : IfxMultican_MsgObjStat
  • b : IfxPsi5_Psi5_StartupOptions
  • B : IfxStdIf_Pos_Status
  • backgroundChannel : IfxVadc_Adc_ChannelConfig
  • backgroundScanRequest : IfxVadc_Adc_GroupConfig
  • bacon : IfxQspi_SpiMaster_Channel_s
  • base : Ifx_AngleTrkF32 , Ifx_CircularBuffer , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_IncrEnc_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config , IfxStm_Timer , IfxStm_Timer_Config
  • baudrate : IfxAsclin_Asc_BaudRate , IfxAsclin_Asc_Config , IfxAsclin_Lin_BaudrateGeneration , IfxAsclin_Spi_Baudrate , IfxAsclin_Spi_Config , IfxEray_Eray_Prtc1Control , IfxI2c_I2c , IfxI2c_I2c_Config , IfxMsc_Msc_Clock , IfxMultican_Can_NodeConfig , Spi_ErrorChecks , SpiIf_Ch_ , SpiIf_ChConfig_
  • baudrateError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • baudrateFrequency : IfxPsi5s_Psi5s_AscConfig
  • baudrateSelect : IfxPsi5_Psi5_ReceiveControl
  • baudrateSelection : IfxPsi5s_Psi5s_AscConfig
  • bitReversed : IfxDsadc_Dsadc_CarrierGenConfig
  • bitSampling : IfxAsclin_Spi_Config
  • bitStuffControl : IfxPsi5s_Psi5s_TransmitControl
  • bitStuffingEnabled : IfxPsi5_Psi5_TransmitControl
  • bitTiming : IfxAsclin_Asc_Config
  • blankoutTime : IfxPsi5_Psi5_PulseGeneration
  • blockMode : IfxDma_Dma_ChannelConfig
  • bottomMsgObjId : IfxMultican_Can_MsgObjControl
  • boundary : Ifx_LutLinearF32_Item
  • boundaryMode : IfxVadc_Adc_ChannelConfig
  • brd : IfxAsclin_Lin_Config
  • breakDetected : IfxAsclin_Lin_ErrorFlags
  • breakLength : IfxAsclin_Lin_LinControl
  • brg : IfxAsclin_Lin_Config
  • bsc : IfxAsclin_Lin_Config
  • btc : IfxAsclin_Lin_Config
  • buffer : _Fifo , SpiIf_Config
  • bufferDirection : IfxEray_Header
  • bufferIndex : IfxEray_Eray_ReceiveControl , IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • bufferReconfigEnabled : IfxEray_Eray_MessageRAMConfig
  • bufferServiceEnabled : IfxEray_Header
  • bufferSize : SpiIf_Config
  • buffMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • bus : IfxCpu_Trap_Id
  • busAccessError : IfxHssl_Hssl_errorFlags
  • busError : IfxFce_Crc_EnabledInterrupts
  • busPriority : IfxDma_Dma_ChannelConfig
  • busStatus : IfxI2c_I2c
  • bypassed : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • byteAccess : SpiIf_Flags
  • byteSwap : IfxCif_Cam_MemConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- c -

  • call : Ifx_Shell_Command
  • callbackData : SpiIf_Ch_
  • canReadCount : IfxStdIf_DPipe_
  • canWriteCount : IfxStdIf_DPipe_
  • capture : IfxGtm_Tim_In_Config
  • captureClockFrequency : IfxGtm_Tim_In
  • captureFrequency : IfxCcu6_Icu
  • carrierGen : IfxDsadc_Rdc_ConfigHw
  • carrierWaveformMode : IfxDsadc_Dsadc_CarrierGenConfig
  • cb : IfxCif_Cam_MemAreas
  • CC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • cc0 : IfxCcu6_PwmHl_Config
  • cc1 : IfxCcu6_PwmHl_Config
  • cc2 : IfxCcu6_PwmHl_Config
  • cc60In : IfxCcu6_Icu_Pins
  • cc60Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc61In : IfxCcu6_Icu_Pins
  • cc61Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc62In : IfxCcu6_Icu_Pins
  • cc62Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc6xInputMode : IfxCcu6_Icu_Pins
  • ccpos0 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos1 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos2 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccposxInputMode : IfxCcu6_Icu_Pins
  • ccu0Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu1Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu6 : IfxCcu6_Icu , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_Icu_Config , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • ccucon0 : IfxScuCcu_ClockDistributionConfig
  • ccucon1 : IfxScuCcu_ClockDistributionConfig
  • ccucon2 : IfxScuCcu_ClockDistributionConfig
  • ccucon5 : IfxScuCcu_ClockDistributionConfig
  • ccucon6 : IfxScuCcu_ClockDistributionConfig
  • ccucon7 : IfxScuCcu_ClockDistributionConfig
  • ccx : IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • ccxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • ccxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • CE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • cfgData : Ifx_AngleTrkF32
  • channel : IfxDma_Dma_Channel , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxGtm_Atom_ToutMap , IfxGtm_Tim_In , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxGtm_Trig_Source , IfxIom_Driver_Lam , IfxIom_Driver_LamConfig , IfxPsi5_Psi5_Channel , IfxSent_Sent_Channel , IfxVadc_Adc_Channel
  • channelAConnectedNode : IfxEray_Eray_Succ1Config
  • channelAFiltered : IfxEray_Header
  • channelAMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelASymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelBasedCs : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • channelBConnectedNode : IfxEray_Eray_Succ1Config
  • channelBFiltered : IfxEray_Header
  • channelBMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelBSymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelCount : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • channelId : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12 , IfxDma_Dma_Channel , IfxDma_Dma_ChannelConfig , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsadc_ChannelConfig , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_ReceivedBits , IfxQspi_SpiMaster_Channel_s , IfxScu_Req_In , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxSent_Sent_In , IfxSent_Spc_Out , IfxVadc_Adc_ChannelConfig , IfxVadc_Vadcg_In
  • channelIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • channelInterruptControl : IfxDma_Dma_ChannelConfig
  • channelInterruptEnabled : IfxDma_Dma_ChannelConfig
  • channelInterruptPriority : IfxDma_Dma_ChannelConfig
  • channelInterruptTypeOfService : IfxDma_Dma_ChannelConfig
  • channelMode : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12
  • channelNumberCodeError : IfxHssl_Hssl_errorFlags
  • channelOut : IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • channelPins : IfxDsadc_Dsadc_ChannelConfig
  • channelPriority : IfxVadc_Adc_ChannelConfig
  • channels : IfxVadc_Adc_EmuxControl
  • channelSelectionStyle : IfxVadc_Adc_EmuxControl
  • channelServProvider : IfxVadc_Adc_ChannelConfig
  • channelsMask : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • channelSrcNr : IfxVadc_Adc_ChannelConfig
  • channelTrigger : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • channelTriggerCounter : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • channelTriggerValue : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • checksum : IfxAsclin_Lin_DataControl
  • checksumMode : IfxAsclin_Lin_PduType
  • CIC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • cif : IfxCif_Cam
  • cin : IfxDsadc_Dsadc_ChannelPins
  • cinMode : IfxDsadc_Dsadc_ChannelPins
  • clearEvent : IfxIom_Driver_LamEventWindowConfig
  • clearRx : IfxStdIf_DPipe_
  • clearTimerOnGlitch : IfxIom_Driver_LamFilterConfig
  • clearTx : IfxStdIf_DPipe_
  • clk : IfxPsi5s_Psi5s_Pins
  • clkMode : IfxPsi5s_Psi5s_Pins
  • clock : IfxCcu6_Icu_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxCpu_Perf , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tim_In_ConfigFilter , IfxGtm_Tim_In_ConfigTimeout , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Config
  • clockConfig : IfxMsc_Msc_Config
  • clockCorrectionCyclesHalt : IfxEray_Eray_Succ3Config
  • clockCorrectionCyclesPassive : IfxEray_Eray_Succ3Config
  • clockDistribution : IfxScuCcu_Config
  • clockFreq : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • clockInput : IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • clockOutput : IfxPsi5s_Psi5s_AscConfig
  • clockPeriod : IfxDsadc_Rdc_Ts
  • clockPolarity : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • clockSelect : IfxMultican_Can_Config
  • clockSelectAbra : IfxMsc_Msc_Abra
  • clockSource : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • clockSyncErrorHalt : IfxEray_Eray_Succ1Config
  • clrInternalResetFlag : IfxScuWdt_Config
  • clusterDrift : IfxEray_Eray_Gtu05Config
  • cmd : Ifx_Shell
  • cmdHistory : Ifx_Shell
  • cmdState : Ifx_Shell_Runtime
  • cmdStr : Ifx_Shell_CmdLine , Ifx_Shell_Runtime
  • code : IfxVadc_Adc_EmuxControl
  • codeforOne : IfxPsi5s_Psi5s_PulseGeneration
  • codeforZero : IfxPsi5s_Psi5s_PulseGeneration
  • col : IfxEth_MiiPins
  • collisionAvoidanceDuration : IfxEray_Eray_Prtc1Control
  • collisionDetectionEnable : IfxAsclin_Lin_FrameControl
  • collisionDetectionError : IfxAsclin_Lin_ErrorFlags
  • combFilter : IfxDsadc_Dsadc_ChannelConfig
  • combFilterShift : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • combFilterType : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • commandDataCommandReceptionMode : IfxMsc_Msc_DownstreamControlConfig
  • commandFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • commandFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • commandFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • commandLine : Ifx_Shell_Command
  • commandList : Ifx_Shell , Ifx_Shell_Config
  • common : IfxCif_Cam_Config
  • commonModeVoltage : IfxDsadc_Dsadc_ModulatorConfig
  • comparator : IfxStm_CompareConfig , IfxStm_Timer , IfxStm_Timer_Config
  • comparatorInterrupt : IfxStm_CompareConfig
  • comparatorShift : IfxStm_Timer
  • comparatorValue : IfxStm_Timer
  • compareOffset : IfxStm_CompareConfig
  • compareSize : IfxStm_CompareConfig
  • compareValue : IfxCcu6_PwmBc_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • config : IfxEth , IfxGtm_Trig_Channel
  • configBit : IfxSent_Sent_SerialMessageFrame
  • configError : IfxFce_Crc_EnabledInterrupts
  • configResult : IfxCif_Cam
  • configuration : IfxPsi5_Psi5_Message
  • configurationError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • contextManagement : IfxCpu_Trap_Id
  • control : Ifx_Shell , IfxMultican_Can_MsgObjConfig
  • controlFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • controllerConfig : IfxEray_Eray_NodeConfig
  • controlSource : IfxIom_Driver_LamEventWindowConfig
  • copyData : IfxMultican_Can_GatewayConfig
  • copyDataLengthCode : IfxMultican_Can_GatewayConfig
  • copyId : IfxMultican_Can_GatewayConfig
  • correctionOffset : IfxEray_Eray_Gtu04Config
  • cosIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc
  • count : Ifx_Fifo_Shared
  • count64 : IfxFft_Fft_Job_s
  • countDir : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStdIf_Timer_Config , IfxStm_Timer_Base
  • counter : IfxCpu_Counter
  • counter1 : IfxCpu_Perf
  • counter2 : IfxCpu_Perf
  • counter3 : IfxCpu_Perf
  • counterValue : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer12 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • countingInputMode : IfxCcu6_Icu_Clock
  • countMode : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_Timer_Timer12 , IfxCcu6_TPwm_Timer12
  • countOneStep : Timer_Functions
  • cout0 : IfxCcu6_PwmHl_Config
  • cout1 : IfxCcu6_PwmHl_Config
  • cout2 : IfxCcu6_PwmHl_Config
  • cout60 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout61 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout62 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout63 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • coutx : IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • coutxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • coutxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • cpol : IfxAsclin_Spi_InputOutputControl
  • cr : IfxCif_Cam_MemAreas
  • crc : IfxPsi5_Psi5_FrameData , IfxPsi5_Psi5_Message , IfxPsi5s_Psi5s_ReceivedBits , IfxSent_Sent_SerialMessageFrame
  • crc32BitReflectionEnabled : IfxFce_Crc_CrcConfig
  • crc32Kernel : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcCheckCompared : IfxFce_Crc_CrcConfig
  • crcError : IfxHssl_Hssl_errorFlags , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedBits
  • crcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • crcErrorInterrupt : IfxSent_Sent_Enable
  • crcGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • crcGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • crchighbit : Ifc_Crc_Table
  • crcinit_direct : Ifc_Crc
  • crcinit_nondirect : Ifc_Crc
  • crcmask : Ifc_Crc_Table
  • crcMethodDisabled : IfxSent_Sent_ReceiveControl
  • crcMismatch : IfxFce_Crc_EnabledInterrupts
  • crcMode : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcModeDisabled : IfxSent_Sent_ReceiveControl
  • crcOrParity : IfxPsi5_Psi5_ReceiveControl , IfxPsi5s_Psi5s_ReceiveControl
  • crcResultInverted : IfxFce_Crc_CrcConfig
  • crctab : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8
  • crcxor : Ifc_Crc
  • crs : IfxEth_MiiPins
  • crsDiv : IfxEth_RmiiPins
  • csActiveLevel : SpiIf_ChMode
  • csEnable : IfxAsclin_Lin_LinControl
  • csi : IfxAsclin_Lin_LinControl
  • csInactiveDelay : SpiIf_ChMode
  • csLeadDelay : SpiIf_ChMode
  • cslpPolarity : IfxMsc_Msc_OutputControlConfig
  • csr : IfxFft_Fft_Job_s
  • csTrailDelay : SpiIf_ChMode
  • cts : IfxAsclin_Asc_Pins
  • ctsMode : IfxAsclin_Asc_Pins
  • currentFrameRequest : IfxHssl_Hssl_Channel
  • cursor : Ifx_Shell_CmdLine
  • cutOffFrequency : Ifx_LowPassPt1F32_Config
  • cycleCode : IfxEray_Header
  • cycleNumber : IfxEray_ReceivedHeader


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- d -

  • data : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8 , Ifx_DataBufferMode_TimeStampSingle , Ifx_Shell_Command , IfxAsclin_Lin_Config , IfxAsclin_Spi_Job , IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame , IfxMultican_Message , IfxPsi5s_Psi5s_Frame , IfxSent_Sent_Frame , SpiIf_Job
  • dataBufferMode : IfxAsclin_Asc , IfxAsclin_Asc_Config
  • dataByteReflectionEnabled : IfxFce_Crc_CrcConfig
  • dataCoherent : IfxGtm_Tim_In
  • dataFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • dataFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • dataFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • dataFramePassivePhaseLength : IfxMsc_Msc_DownstreamControlConfig
  • dataHeading : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • dataLength : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_DataControl , IfxAsclin_Lin_PduType , IfxAsclin_Spi_Config
  • dataLengthError : IfxHssl_Hssl_errorFlags
  • dataLost : IfxGtm_Tim_In
  • dataPointer : IfxEray_Header
  • dataPtr : IfxAsclin_Lin_PduType
  • dataReceived : IfxEray_Eray_ReceiveControl
  • dataShift : IfxDsadc_Dsadc_FirFilterConfig
  • dataSize : IfxMtu_SramItem
  • dataTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • dataWidth : IfxAsclin_Spi , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • DB : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • DBE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • dc : IfxCif_Cam_JpegTable
  • DC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • DE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • deactivateSlso : IfxQspi_SpiMaster_Channel_s
  • deadtime : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • deadTimeValue : IfxCcu6_TPwm_Timer12
  • debugPathEnabled : IfxCif_Cam_Common
  • decimationFactor : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • decodingCorrection : IfxEray_Eray_Gtu05Config
  • delay : IfxQspi_DelayConst
  • delayLength : IfxPsi5_Psi5_PulseGeneration
  • delta : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • demodulator : IfxDsadc_Dsadc_ChannelConfig
  • denominator : IfxAsclin_Lin_BaudrateGeneration
  • density : IfxCif_Cam_JfifHeader
  • densityX : IfxCif_Cam_JfifHeader
  • densityY : IfxCif_Cam_JfifHeader
  • description : Ifx_Shell_Syntax
  • descriptorMode : IfxEth , IfxEth_Config
  • destinationAddress : IfxDma_Dma_ChannelConfig
  • destinationAddressCircularRange : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • destinationCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • deviceAddress : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • DIC : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • digitalFrequency : IfxVadc_Adc_Config
  • digitalGlitchFilterDepth : IfxSent_Sent_InputOutputControl
  • digitalInputFilterDepth : IfxPsi5_Psi5_InputOutputControl
  • din : IfxDsadc_Dsadc_ChannelPins
  • dinMode : IfxDsadc_Dsadc_ChannelPins
  • direction : Ifx_AngleTrkF32_PosIf , IfxAsclin_Lin_PduType , IfxGpt12_IncrEnc
  • disablePostCalibration : IfxVadc_Adc_GroupConfig
  • disableUpdate : IfxStdIf_Timer_
  • disableWatchdog : IfxScuWdt_Config
  • discardCount : IfxDsadc_Dsadc_IntegratorConfig
  • discardDmaChannel : IfxFft_Fft
  • discardDmaChannelId : IfxFft_Fft_Config
  • dividerMode : IfxMsc_Msc_Clock
  • dma : IfxDma_Dma , IfxDma_Dma_Channel , IfxDma_Dma_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • downscaling : IfxCif_Cam_Config
  • downstreamConfig : IfxMsc_Msc_Config
  • downstreamDataSourcesHigh : IfxMsc_Msc_DownstreamControlConfig
  • downstreamDataSourcesLow : IfxMsc_Msc_DownstreamControlConfig
  • downstreamExtensionConfig : IfxMsc_Msc_Config
  • downstreamExtensionDataSourcesHigh : IfxMsc_Msc_DownstreamControlExtensionConfig
  • downstreamExtensionDataSourcesLow : IfxMsc_Msc_DownstreamControlExtensionConfig
  • DP : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • driftErrorsDisabled : IfxSent_Sent_ReceiveControl
  • driver : IfxQspi_SpiMaster_Output , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxStdIf_DPipe_ , IfxStdIf_Pos_ , IfxStdIf_PwmHl_ , IfxStdIf_Timer_ , SpiIf_ , SpiIf_Ch_ , SpiIf_ChConfig_
  • dsadc : IfxDsadc_Dsadc , IfxDsadc_Dsadc_Config , IfxDsadc_Rdc_Config
  • dsn : IfxDsadc_Dsadc_ChannelPins
  • dsnMode : IfxDsadc_Dsadc_ChannelPins
  • dsp : IfxDsadc_Dsadc_ChannelPins
  • dspMode : IfxDsadc_Dsadc_ChannelPins
  • dummyRxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dummyTxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dutyCycle : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • dynamicActionPoint : IfxEray_Eray_Gtu09Config
  • dynamicSlotCount : IfxEray_Eray_Gtu08Config
  • dynamicSlotLength : IfxEray_Eray_Gtu08Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- e -

  • EC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • eccInvPos0 : IfxMtu_SramItem
  • eccInvPos1 : IfxMtu_SramItem
  • eccSize : IfxMtu_SramItem
  • echo : Ifx_Shell_Config , Ifx_Shell_Flags , Ifx_Shell_Runtime
  • echoError : Ifx_Shell_Flags
  • ED : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • edgeCount : IfxGtm_Tim_In
  • edgeCounterCleared : IfxSent_Sent_InputOutputControl
  • edgeCounterUpper : IfxGtm_Tim_In
  • elementSize : _Fifo
  • emem : IfxCif_Cam
  • emergencyEnabled : IfxStdIf_PwmHl_Config
  • emergencyStopEnableBits : IfxMsc_Msc_DownstreamControlConfig
  • emergencyStopEnabled : IfxSmu_configFsp
  • emergencyStopExtensionEnableBits : IfxMsc_Msc_DownstreamControlExtensionConfig
  • emuxInterface : IfxVadc_Adc_EmuxControl
  • emuxOutPinConfig : IfxVadc_Adc_EmuxControl
  • en0 : IfxMsc_Msc_Io
  • en1 : IfxMsc_Msc_Io
  • en2 : IfxMsc_Msc_Io
  • en3 : IfxMsc_Msc_Io
  • enable : IfxSent_Sent_EnabledInterrupts
  • enableAutomaticPasswordChange : IfxScuWdt_Config
  • enabled : Ifx_Shell_Flags , IfxCif_Cam_Downscaling , IfxDsadc_Dsadc_RectifierConfig , IfxDsadc_Rdc_Ts , IfxMultican_Can_InterruptSource , IfxStdIf_Timer_TrigConfig , SpiIf_ChMode
  • enabledInterrupt : IfxAsclin_Lin_InterruptConfig
  • enabledInterrupts : IfxFce_Crc_CrcConfig , IfxSent_Sent_ChannelConfig
  • enableFaultToRunStateTransition : IfxSmu_configFsp
  • enableSecureLock : IfxDts_Dts_Config
  • enableSmuRestriction : IfxScuWdt_Config
  • enableTimerCheck : IfxScuWdt_Config
  • enableTimerCheckTolerance : IfxScuWdt_Config
  • enableTransmit : IfxMultican_Can_GatewayConfig
  • end : IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow
  • endIndex : _Fifo
  • ENDIS_CTRL : IfxGtm_Tom_TGC
  • ENDIS_STAT : IfxGtm_Tom_TGC
  • endPulseIgnored : IfxSent_Sent_ReceiveControl
  • enhancedProtocolSelected : IfxPsi5_Psi5_TransmitControl
  • enhancedProtocolSelection : IfxPsi5s_Psi5s_TransmitControl
  • entry : IfxCif_Cam_TableInfo
  • ep : IfxCif_Cam_MemAreas
  • eray : IfxEray_Eray
  • erPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • error : IfxEth
  • errorChecks : SpiIf_Ch_ , SpiIf_ChConfig_
  • errorFlag0 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlag1 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlags : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Spi , IfxHssl_Hssl , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave
  • errorFlagsStatus : IfxAsclin_Lin
  • errorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • errorThreshold : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • errorType : IfxFlash_ErrorTracking_Address
  • errorWarningLevel : IfxMultican_Can_NodeConfig
  • ES : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • escBracketNum : Ifx_Shell_Runtime
  • ethSfr : IfxEth , IfxEth_Config
  • event : IfxIom_Driver_LamConfig
  • eventGate : IfxDsadc_Dsadc_AuxFilterConfig
  • eventReader : _Fifo
  • eventSelect : IfxDsadc_Dsadc_AuxFilterConfig
  • eventWindow : IfxIom_Driver_LamConfig
  • eventWriter : _Fifo
  • exBreakDetected : IfxAsclin_Lin_EnabledInterrupts
  • exchange : SpiIf_funcs
  • exCollisionDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • execute : Ifx_Shell_Protocol
  • exFramingError : IfxAsclin_Lin_EnabledInterrupts
  • exHeaderTimeout : IfxAsclin_Lin_EnabledInterrupts
  • exLinAutobaudDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • exLinChecksumError : IfxAsclin_Lin_EnabledInterrupts
  • exLinParityError : IfxAsclin_Lin_EnabledInterrupts
  • expect : IfxFft_Fft_Count64
  • expectedCrc : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • expectTimeoutError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • exPriority : IfxAsclin_Lin_InterruptConfig
  • exReceiveFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • exResponseTimeout : IfxAsclin_Lin_EnabledInterrupts
  • ext : IfxEth_AltRxDescr0_Bits
  • extClockEnabled : IfxCcu6_Icu_Clock
  • extClockInput : IfxCcu6_Icu_Clock
  • extendedFrame : IfxMultican_Can_MsgObjControl
  • extendedSerialFrameMode : IfxSent_Sent_ReceiveControl
  • extension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • externalOffset : IfxEray_Eray_Gtu11Config
  • externalOffsetCorrection : IfxEray_Eray_Gtu11Config
  • externalRate : IfxEray_Eray_Gtu11Config
  • externalRateCorrection : IfxEray_Eray_Gtu11Config
  • externalSignalInjectionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • externalSignalInjectionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • externalTimeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • externalTrigger : IfxSent_Sent_InputOutputControl
  • externalTriggerSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5s_Psi5s_PulseGeneration
  • extInputTrigger : IfxCcu6_Icu_TriggerConfig
  • extInputTriggerMode : IfxCcu6_Icu_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • exTransmissionCompleted : IfxAsclin_Lin_EnabledInterrupts
  • exTransmitFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • extraPaths : IfxCif_Cam_Common


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- f -

  • fallingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • fallingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • fastBaudrate : IfxMultican_Can_FdConfig
  • fastBitRate : IfxMultican_Can_MsgObjControl , IfxMultican_Message
  • fastClock : IfxPsi5_Psi5_Config
  • fastNode : IfxMultican_Can_Node
  • fastSamplePoint : IfxMultican_Can_FdConfig
  • fastSynchJumpWidth : IfxMultican_Can_FdConfig
  • faultFreeStateFrequencyMax : IfxSmu_configFsp
  • faultFreeStateFrequencyMin : IfxSmu_configFsp
  • faultStateTime : IfxSmu_configFsp
  • fce : IfxFce_Crc , IfxFce_Crc_Config , IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • fclClockControl : IfxMsc_Msc_OutputControlConfig
  • fcln : IfxMsc_Msc_Io
  • fclp : IfxMsc_Msc_Io
  • fclpPolarity : IfxMsc_Msc_OutputControlConfig
  • fdConfig : IfxMultican_Can_NodeConfig
  • FF : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • fft : IfxFft_Fft , IfxFft_Fft_Config , IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • fftLength : IfxFft_Fft_JobConfig
  • fifo : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • fifoBufferStartIndex : IfxEray_Eray_MessageRAMConfig
  • fifoConfigured : IfxEray_Eray_MessageRAMConfig
  • fifoDepth : IfxEray_Eray_MessageRAMConfig
  • fifoNullFramesRejected : IfxEray_Eray_MessageRAMConfig
  • fifoPointer : IfxMultican_Can_MsgObj
  • fifoWarningLevel : IfxPsi5_Psi5_ReceiveControl
  • filter : IfxGtm_Tim_In_Config , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • filterDepth : IfxAsclin_Lin_BitSamplingControl
  • filteredCycleNumber : IfxEray_Eray_MessageRAMConfig
  • fir0Enabled : IfxDsadc_Dsadc_FirFilterConfig
  • fir1Enabled : IfxDsadc_Dsadc_FirFilterConfig
  • firFilter : IfxDsadc_Dsadc_ChannelConfig
  • firstDynamicBuffer : IfxEray_Eray_MessageRAMConfig
  • firstSlaveObjId : IfxMultican_Can_MsgObjConfig
  • firstWrite : IfxQspi_SpiMaster_Channel_s
  • FL : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • flags : IfxAsclin_Asc_ErrorFlagsUnion , IfxAsclin_Lin_FrameDataControl , IfxFft_Fft , SpiIf_Ch_
  • flashFconWaitStateConfig : IfxScuCcu_Config
  • flexibleDataRate : IfxMultican_Can_NodeConfig
  • flushQueueAfterInit : IfxVadc_Adc_QueueConfig
  • flushTx : IfxStdIf_DPipe_
  • fracDiv : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • fractionalDividerEnabled : IfxPsi5s_Psi5s_AscConfig
  • frame : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxMultican_Can_MsgObjConfig , IfxPsi5_Psi5_Frame
  • frameCheckMode : IfxSent_Sent_ReceiveControl
  • frameCounterInterrupt : IfxMultican_Can_NodeConfig
  • frameError : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • frameExpectation : IfxPsi5_Psi5_ReceiveControl
  • frameId : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5s_Psi5s_ReceivedBits
  • frameIdFilter : IfxEray_Eray_MessageRAMConfig
  • frameIdSelect : IfxPsi5s_Psi5s_ReceiveControl
  • frameLength : IfxSent_Sent_ReceiveControl
  • frameMode : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • frameTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • framingCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • framingErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • frequency : Icu_Config , Icu_s , IfxCcu6_Icu_Config , IfxDsadc_Dsadc_CarrierGenConfig , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxStdIf_Timer_Config , TPwm_Config , TPwm_s
  • frequencyDriftErrorInterrupt : IfxSent_Sent_Enable
  • frequencyRangeErrorInterrupt : IfxSent_Sent_Enable
  • FS : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr1_Bits
  • FT : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • functions : SpiIf_
  • FUPD_CTRL : IfxGtm_Tom_TGC


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- g -

  • gain : Ifx_LowPassPt1F32_Config , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item
  • gatewayConfig : IfxMultican_Can_MsgObjConfig
  • gatewayDstObjId : IfxMultican_Can_GatewayConfig
  • gatewayTransfers : IfxMultican_Can_MsgObjConfig
  • gatingMode : IfxVadc_Adc_GatingTriggerConfig
  • gatingSource : IfxVadc_Adc_GatingTriggerConfig
  • getAbsolutePosition : IfxStdIf_Pos_
  • getDeadtime : IfxStdIf_PwmHl_
  • getDirection : IfxStdIf_Pos_
  • getFault : IfxStdIf_Pos_
  • getFrequency : IfxStdIf_Timer_
  • getInputFrequency : IfxStdIf_Timer_
  • getMinPulse : IfxStdIf_PwmHl_
  • getMode : IfxStdIf_PwmHl_
  • getOffset : IfxStdIf_Pos_
  • getPeriod : IfxStdIf_Timer_
  • getPeriodPerRotation : IfxStdIf_Pos_
  • getPosition : IfxStdIf_Pos_
  • getRawPosition : IfxStdIf_Pos_
  • getReadCount : IfxStdIf_DPipe_
  • getReadEvent : IfxStdIf_DPipe_
  • getRefreshPeriod : IfxStdIf_Pos_
  • getResolution : IfxStdIf_Pos_ , IfxStdIf_Timer_
  • getSendCount : IfxStdIf_DPipe_
  • getSensorType : IfxStdIf_Pos_
  • getSpeed : IfxStdIf_Pos_
  • getStatus : SpiIf_funcs
  • getTimeStamp : Icu_Functions
  • getTrigger : IfxStdIf_Timer_
  • getTurn : IfxStdIf_Pos_
  • getTxTimeStamp : IfxStdIf_DPipe_
  • getWriteCount : IfxStdIf_DPipe_
  • getWriteEvent : IfxStdIf_DPipe_
  • GLB_CTRL : IfxGtm_Tom_TGC
  • glitch : IfxGtm_Tim_In
  • glitchFallingCleared : IfxSent_Sent_InputOutputControl
  • glitchRisingCleared : IfxSent_Sent_InputOutputControl
  • globalControlConfig : IfxPsi5s_Psi5s_Config
  • globalInputClass : IfxVadc_Adc_Config
  • globalResultUsage : IfxVadc_Adc_ChannelConfig
  • group : IfxVadc_Adc_Channel , IfxVadc_Adc_ChannelConfig , IfxVadc_Adc_Group
  • groupDelay : IfxDsadc_Rdc
  • groupId : IfxVadc_Adc_EmuxControl , IfxVadc_Adc_Group , IfxVadc_Adc_GroupConfig , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • gtm : IfxDsadc_Rdc_GtmTimestamp , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • gtmTimestamp : IfxDsadc_Rdc_ConfigHw
  • gtu01Config : IfxEray_Eray_GTUConfig
  • gtu02Config : IfxEray_Eray_GTUConfig
  • gtu03Config : IfxEray_Eray_GTUConfig
  • gtu04Config : IfxEray_Eray_GTUConfig
  • gtu05Config : IfxEray_Eray_GTUConfig
  • gtu06Config : IfxEray_Eray_GTUConfig
  • gtu07Config : IfxEray_Eray_GTUConfig
  • gtu08Config : IfxEray_Eray_GTUConfig
  • gtu09Config : IfxEray_Eray_GTUConfig
  • gtu10Config : IfxEray_Eray_GTUConfig
  • gtu11Config : IfxEray_Eray_GTUConfig
  • gtuConfig : IfxEray_Eray_ControllerConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- h -

  • halfTs : Ifx_AngleTrkF32
  • hallPatternIndex : IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config
  • hallSyncEvent : IfxCcu6_PwmBc_Config
  • hardware : IfxDsadc_Rdc , IfxDsadc_Rdc_Config
  • hardwareRequestEnabled : IfxDma_Dma_ChannelConfig
  • header : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame
  • headerCrc : IfxEray_ReceivedHeader
  • headerErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • headerErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • headerID : IfxAsclin_Lin_FrameDataControl
  • headerOnly : IfxAsclin_Lin_DataControl
  • headerReceived : IfxEray_Eray_ReceiveControl
  • headerTimeout : IfxAsclin_Lin_ErrorFlags , IfxAsclin_Lin_LinControl
  • headerTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • help : Ifx_Shell_Command
  • hFactor : IfxCif_Cam_Downscaling
  • highPhaseOfShiftClock : IfxMsc_Msc_Abra
  • highSpeedMode : IfxHssl_Hsct_Config
  • highWord : IfxPsi5_Psi5_Rdm
  • historyAdd : Ifx_Shell_CmdLine
  • historyItem : Ifx_Shell_CmdLine
  • hMode : IfxCif_Cam_Downscaling
  • hOffset : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • hookFunction : IfxScuCcu_PllStepsConfig
  • hours : Ifx_DateTime
  • hsct : IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • hSize : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • hssl : IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxHssl_Hssl_Config
  • hSyncPolarity : IfxCif_Cam_Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- i -

  • i2c : IfxI2c_I2c , IfxI2c_I2c_Config , IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • ibusyIsrProvider : IfxEray_Eray_Interrupt
  • ibusyPriority : IfxEray_Eray_Interrupt
  • IC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • id : IfxMultican_Message
  • ident : IfxCif_Cam_JfifHeader
  • idleDelay : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • idleDynamicSlots : IfxEray_Eray_Gtu09Config
  • idleTime : IfxPsi5s_Psi5s_GlobalControlConfig
  • IHE : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • ik : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • imag : cfloat32 , cfract , csfract , csint16 , csint32
  • image : IfxCif_Cam_MemInfo
  • immediateStartEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • in : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • index : Ifx_CircularBuffer , IfxModule_IndexMap
  • inhibitingAutomaticTransferEnabled : IfxPsi5_Psi5_TransmitControl
  • initPins : IfxGpt12_IncrEnc_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_Timer_Config
  • inj0 : IfxMsc_Msc_Io
  • inj1 : IfxMsc_Msc_Io
  • injectionPositionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • injectionPositionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • inMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • input : IfxFft_Fft_Count64 , IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig , IfxQspi_SpiMaster_InputOutput
  • inputbuffer : Ifx_Shell_Runtime
  • inputClass : IfxVadc_Adc_ChannelConfig , IfxVadc_Adc_GroupConfig
  • inputConfig : IfxDsadc_Rdc_ConfigHw
  • inputCos : IfxDsadc_Rdc_ConfigHw , IfxDsadc_Rdc_Hw
  • inputDataSource : IfxDsadc_Dsadc_DemodulatorConfig
  • inputDmaChannel : IfxFft_Fft
  • inputDmaChannelId : IfxFft_Fft_Config
  • inputFormat : IfxFft_Fft_JobConfig
  • inputFrequency : IfxScuWdt_Config
  • inputGain : IfxDsadc_Dsadc_ModulatorConfig
  • inputIdx : IfxFft_Fft
  • inputInterface : IfxCif_Cam_Common
  • inputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • inputLength : IfxFft_Fft_JobConfig
  • inputMode : IfxCcu6_PwmBc_Pins
  • inputOutput : IfxAsclin_Spi_Config
  • inputOutputControl : IfxPsi5_Psi5_ChannelConfig , IfxSent_Sent_ChannelConfig
  • inputPin : IfxDsadc_Dsadc_ModulatorConfig , IfxGtm_Tim_In_ConfigFilter
  • inputPinMode : IfxGtm_Tim_In_ConfigFilter
  • inputPriority : IfxFft_Fft_Config
  • inputPtr : IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • inputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • inputSin : IfxDsadc_Rdc_ConfigHw , IfxDsadc_Rdc_Hw
  • inSeconds : IfxDsadc_Rdc_Ts
  • inSelect : IfxEth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • instruction : IfxCpu_Perf
  • instructionErrors : IfxCpu_Trap_Id
  • int0IsrProvider : IfxEray_Eray_Interrupt
  • int0Priority : IfxEray_Eray_Interrupt
  • int1IsrProvider : IfxEray_Eray_Interrupt
  • int1Priority : IfxEray_Eray_Interrupt
  • INT_TRIG : IfxGtm_Tom_TGC
  • integrationCount : IfxDsadc_Dsadc_IntegratorConfig
  • integrationCycles : IfxDsadc_Dsadc_IntegratorConfig
  • integrationTrigger : IfxDsadc_Dsadc_DemodulatorConfig
  • integrator : IfxDsadc_Dsadc_ChannelConfig
  • interfaceMode : IfxHssl_Hsct_Config
  • internalProtection : IfxCpu_Trap_Id
  • internalShift : IfxDsadc_Dsadc_FirFilterConfig
  • interrupt : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxEray_Eray_Config , IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config , IfxSent_Sent_ChannelConfig
  • interrupt1 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt2 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt3 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt4 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interruptConfig : IfxMsc_Msc_Config
  • interruptRaiseThreshold : IfxDma_Dma_ChannelConfig
  • interuptNodeControl : IfxSent_Sent_ChannelConfig
  • inTicks : IfxDsadc_Rdc_Ts
  • intraIdx : IfxFft_Fft
  • intraPriority : IfxFft_Fft_Config
  • inverted : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxDsadc_Dsadc_CarrierGenConfig , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamEventWindowConfig , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • inWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • io : Ifx_Shell , IfxMsc_Msc_Config
  • iomDriver : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig
  • IPC : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • irqMode : IfxGtm_Tim_In_Config
  • irqModeTimer : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqModeTrigger : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqOnCntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnDatalost : IfxGtm_Tim_In_ConfigCapture
  • irqOnEcntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnGlitch : IfxGtm_Tim_In_ConfigFilter
  • irqOnNewVal : IfxGtm_Tim_In_ConfigCapture
  • irqOnTimeout : IfxGtm_Tim_In_ConfigTimeout
  • isInterruptMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • ispBpp : IfxCif_Cam
  • ispIn : IfxCif_Cam_Common
  • ispInterrupt : IfxCif_Cam_Common
  • ispMode : IfxCif_Cam , IfxCif_Cam_Config
  • ispRawBpp : IfxCif_Cam_Config
  • isrCount : IfxEth
  • isrPriority : IfxDts_Dts_Config , IfxEth_Config , IfxFce_Crc_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig
  • isrProvider : IfxEth_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxSent_Sent_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig , SpiIf_Config
  • isrRxCount : IfxEth
  • isrTxCount : IfxEth
  • isrTypeOfService : IfxDts_Dts_Config , IfxFce_Crc_Config
  • items : IfxEth_RxDescrList , IfxEth_TxDescrList
  • itr : IfxDsadc_Dsadc_ChannelPins
  • itrMode : IfxDsadc_Dsadc_ChannelPins


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- j -

  • jfif : IfxCif_Cam
  • job : IfxFft_Fft
  • jpegEnabled : IfxCif_Cam_Common
  • jpegTables : IfxCif_Cam_Common
  • JT : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- k -

  • k2Initial : IfxScuCcu_InitialStepConfig
  • k2Step : IfxScuCcu_PllStepsConfig
  • kd : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • ki : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • kp : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- l -

  • lamUsedMask : IfxIom_Driver
  • lastErrorCodeInterrupt : IfxMultican_Can_NodeConfig
  • latestTransmissionStart : IfxEray_Eray_ControllerConfig
  • LC : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • LE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • leadDelay : IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • length : Ifx_CircularBuffer , Ifx_Shell_CmdLine , IfxCif_Cam_JfifHeader , IfxCif_Cam_TableInfo
  • lengthCode : IfxMultican_Message
  • lengthError : IfxFce_Crc_EnabledInterrupts
  • limitCheck : IfxVadc_Adc_ChannelConfig
  • lin : IfxAsclin_Lin_Config
  • linAutobaudDetectionError : IfxAsclin_Lin_ErrorFlags
  • linChecksumError : IfxAsclin_Lin_ErrorFlags
  • linFrameData : IfxAsclin_Lin
  • linMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • linParityError : IfxAsclin_Lin_ErrorFlags
  • listenTimeOut : IfxEray_Eray_Succ2Config
  • listenTimeOutNoise : IfxEray_Eray_Succ2Config
  • lmu : IfxFft_Fft , IfxFft_Fft_Config
  • LOC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • locals : Ifx_Shell
  • loopBack : IfxAsclin_Asc_Config , IfxAsclin_Spi_InputOutputControl , IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • loopback : SpiIf_ChMode
  • loopbackEnabled : IfxPsi5s_Psi5s_AscConfig
  • loopBackMode : IfxMultican_Can_NodeConfig
  • loopDelayOffset : IfxMultican_Can_FdConfig
  • lowerBoundary : IfxVadc_Adc_ChannelConfig
  • lowerLimit : IfxAsclin_Lin_BaudrateDetection
  • lowerTemperatureLimit : IfxDts_Dts_Config
  • lowPhaseOfShiftClock : IfxMsc_Msc_Abra
  • lowPowerSupply : IfxDsadc_Dsadc_Config
  • lowWord : IfxPsi5_Psi5_Rdm
  • LS : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr1_Bits


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- m -

  • macAddress : IfxEth_Config
  • macroticksPerCycle : IfxEray_Eray_Gtu02Config
  • mainPath : IfxCif_Cam_Common
  • mask : Ifx_InternalMux_MuxConfig , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • masks : IfxPort_Esr_Masks
  • master : IfxVadc_Adc_GroupConfig
  • matchingId : IfxMultican_Can_MsgObjControl
  • maxColdStartAttempts : IfxEray_Eray_Succ1Config
  • maxcount : Ifx_Fifo_Shared
  • maxDriftOffset : IfxEray_Eray_Gtu06Config
  • maximumBaudrate : IfxQspi_SpiMaster , SpiIf_Config
  • maxOffsetCorrection : IfxEray_Eray_Gtu10Config
  • maxPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base
  • maxRateCorrection : IfxEray_Eray_Gtu10Config
  • maxSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • maxSyncFrames : IfxEray_Eray_Gtu02Config
  • maxTicks : IfxDsadc_Rdc_Ts
  • mbistDelay : IfxMtu_SramItem
  • mbsc0IsrProvider : IfxEray_Eray_Interrupt
  • mbsc0Priority : IfxEray_Eray_Interrupt
  • mbsc1IsrProvider : IfxEray_Eray_Interrupt
  • mbsc1Priority : IfxEray_Eray_Interrupt
  • mcan : IfxMultican_Can , IfxMultican_Can_Node
  • mdc : IfxEth_MiiPins , IfxEth_RmiiPins
  • mdio : IfxEth_MiiPins , IfxEth_RmiiPins
  • measured : IfxAsclin_Lin_BaudrateDetection
  • medianFilter : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl , IfxAsclin_Spi_BitSamplingControl
  • memAreas : IfxCif_Cam
  • memFactor : IfxCif_Cam_MemConfig
  • memoryAccessViolation : IfxHssl_Hssl_errorFlags
  • memoryManagement : IfxCpu_Trap_Id
  • message : IfxPsi5_Psi5_SerialMessage
  • messageId : IfxMultican_Can_MsgObjConfig , IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • messageLen : IfxMultican_Can_MsgObjControl
  • messageRAMConfig : IfxEray_Eray_NodeConfig
  • messagingBitsError : IfxPsi5_Psi5_FrameData
  • messagingBitsPresence : IfxPsi5_Psi5_ReceiveControl
  • microticksPerCycle : IfxEray_Eray_Gtu01Config
  • miiPins : IfxEth_Config
  • minPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • minResolution : IfxStdIf_Timer_Config
  • minSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • minutes : Ifx_DateTime
  • mode : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tom_Pwm_Interrupt , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamFilterConfig , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxSmu_configFsp , IfxVadc_Adc_EmuxControl , SpiIf_ChConfig_ , SpiIf_Config
  • modulator : IfxDsadc_Dsadc_ChannelConfig
  • modulatorClockFreq : IfxDsadc_Dsadc_ModulatorConfig
  • modulatorClockSelect : IfxDsadc_Dsadc_Config
  • module : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxCif_Clk_In , IfxCif_D_In , IfxCif_Hsnc_In , IfxCif_Vsnc_In , IfxDma_Dma_ChannelConfig , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsadc_ChannelConfig , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Eray_Config , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Mdio_InOut , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_IncrEnc , IfxGpt12_IncrEnc_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Clk_Out , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxIom_Driver , IfxIom_Driver_Config , IfxModule_IndexMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Can_Config , IfxMultican_Can_NodeConfig , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_Config , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Hwcfg_In , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_Config , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Adc_Group , IfxVadc_Adc_GroupConfig , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • moduleFreq : IfxMultican_Can_Config
  • moduleFrequency : IfxVadc_Adc_Config
  • mon : IfxIom_Driver_LamConfig
  • monIndex : IfxIom_Driver_Lam
  • monInput : IfxIom_Driver_Lam
  • moveSize : IfxDma_Dma_ChannelConfig
  • mrst : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mrstMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • msc : IfxMsc_Msc , IfxMsc_Msc_Config
  • msgObjCount : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig
  • msgObjId : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig
  • mtsr : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mtsrMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • multiChannelControl : IfxCcu6_PwmBc_Config
  • multiInputCaptureEnabled : IfxCcu6_Icu_ChannelConfig
  • muxConfig : Ifx_InternalMux_Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- n -

  • name : Ifx_GlobalResources_Item
  • NC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • ndat0IsrProvider : IfxEray_Eray_Interrupt
  • ndat0Priority : IfxEray_Eray_Interrupt
  • ndat1IsrProvider : IfxEray_Eray_Interrupt
  • ndat1Priority : IfxEray_Eray_Interrupt
  • nDivider : IfxScuCcu_InitialStepConfig
  • nDividerAbra : IfxMsc_Msc_Abra
  • nDividerDownstream : IfxMsc_Msc_DownstreamControlExtensionConfig
  • negativeInput : IfxDsadc_Dsadc_ModulatorConfig
  • networkStartIdleTime : IfxEray_Eray_Gtu04Config
  • networkVectorLength : IfxEray_Eray_ControllerConfig
  • newData : IfxGtm_Tim_In
  • nextFreeAddress : IfxCif_Cam
  • nextJob : IfxFft_Fft_Job_s
  • nibbleControl : IfxSent_Sent_ChannelConfig
  • nibblePointer0 : IfxSent_Sent_NibbleControl
  • nibblePointer1 : IfxSent_Sent_NibbleControl
  • nibblePointer2 : IfxSent_Sent_NibbleControl
  • nibblePointer3 : IfxSent_Sent_NibbleControl
  • nibblePointer4 : IfxSent_Sent_NibbleControl
  • nibblePointer5 : IfxSent_Sent_NibbleControl
  • nibblePointer6 : IfxSent_Sent_NibbleControl
  • nibblePointer7 : IfxSent_Sent_NibbleControl
  • nibblesValueOutOfRangeErrorInterrupt : IfxSent_Sent_Enable
  • nibblesWrongErrorInterrupt : IfxSent_Sent_Enable
  • node : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig , IfxMultican_Can_Node
  • nodeAPins : IfxEray_Eray_Pins
  • nodeBPins : IfxEray_Eray_Pins
  • nodeId : IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxMultican_Can_Node , IfxMultican_Can_NodeConfig , IfxMultican_Rxd_In , IfxMultican_Txd_Out
  • nodePointer : IfxMultican_Can_Config
  • noFrameReceivedError : IfxPsi5_Psi5_FrameData
  • noiseFilter : PwmHl_Config
  • nominalBaudrate : IfxMultican_Can_FdConfig
  • nominalSamplePoint : IfxMultican_Can_FdConfig
  • nominalSynchJumpWidth : IfxMultican_Can_FdConfig
  • nonMaskableInterrupt : IfxCpu_Trap_Id
  • notAcknowledgeError : IfxHssl_Hssl_errorFlags
  • nullFrameIndicator : IfxEray_ReceivedHeader
  • numberOfBitsError : IfxPsi5_Psi5_FrameData
  • numberOfCyclePairsForActive : IfxEray_Eray_Succ1Config
  • numberOfFramesExpected : IfxPsi5s_Psi5s_ReceiveControl
  • numberOfMessageBuffers : IfxEray_Eray_MessageRAMConfig
  • numBlocks : IfxMtu_SramItem
  • numerator : IfxAsclin_Lin_BaudrateGeneration
  • numOfPllDividerSteps : IfxScuCcu_SysPllConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- o -

  • object : Ifx_Shell_Protocol
  • obusyIsrProvider : IfxEray_Eray_Interrupt
  • obusyPriority : IfxEray_Eray_Interrupt
  • OE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • offset : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item , IfxDsadc_Rdc_Config , IfxGpt12_IncrEnc , IfxGtm_Atom_Timer , IfxGtm_Tom_Timer , IfxStdIf_Pos_Config
  • offsetCompensation : IfxDsadc_Dsadc_FirFilterConfig
  • onError : IfxStdIf_DPipe_ , SpiIf_funcs
  • oneShotModeEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • onEventA : IfxStdIf_Pos_
  • onExchangeEnd : SpiIf_Ch_
  • onReceive : IfxStdIf_DPipe_
  • onRx : SpiIf_funcs
  • onStart : Ifx_Shell_Protocol
  • onStartData : Ifx_Shell_Protocol
  • onTransfer : IfxQspi_SpiSlave , SpiIf_Flags
  • onTransmit : IfxStdIf_DPipe_
  • onTx : SpiIf_funcs
  • onZeroIrq : IfxStdIf_Pos_
  • operation : IfxFft_Fft_JobConfig
  • operationMode : IfxDma_Dma_ChannelConfig
  • order : Ifc_Crc_Table
  • out : Ifx_LowPassPt1F32 , IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • OUTEN_CTRL : IfxGtm_Tom_TGC
  • OUTEN_STAT : IfxGtm_Tom_TGC
  • outMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • output : IfxFft_Fft_Count64 , IfxQspi_SpiMaster_InputOutput
  • outputClock : IfxDsadc_Rdc_ConfigHw
  • outputControlConfig : IfxMsc_Msc_Config
  • outputDmaChannel : IfxFft_Fft
  • outputDmaChannelId : IfxFft_Fft_Config
  • outputDriver : IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig
  • outputEnabled : IfxStdIf_Timer_TrigConfig
  • outputFormat : IfxFft_Fft_JobConfig
  • outputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • outputLength : IfxFft_Fft_JobConfig
  • outputLine : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputMode : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig , IfxVadc_Adc_EmuxPinConfig
  • outputPin : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin
  • outputPriority : IfxFft_Fft_Config
  • outputPtr : IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • outputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • outputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputTriggerEnabled : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outSelect : IfxEth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • outWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • overflowCnt : IfxGtm_Tim_In
  • overflowInterrupt : IfxMsc_Msc_InterruptConfig
  • overflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • overlfow : IfxCpu_Counter
  • overrunCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • overrunErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • oversampling : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • OWN : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- p -

  • packetFrameCount : IfxPsi5s_Psi5s_ReceivedBits , IfxPsi5s_Psi5s_ReceivedData , IfxPsi5s_Psi5s_Timestamp
  • padDriver : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxI2c_Pins , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxVadc_Adc_EmuxPinConfig
  • parity : IfxMsc_Msc_UpstreamStatusConfig
  • parityBit : IfxAsclin_Asc_FrameControl
  • parityCheck : SpiIf_ChMode
  • parityCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • parityEnable : IfxAsclin_Lin_FrameControl
  • parityError : IfxAsclin_Asc_ErrorFlags , IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • parityErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • parityMode : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • parityType : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl
  • passiveTimeFrameCount : IfxMsc_Msc_DownstreamControlConfig
  • password : IfxScuWdt_Config
  • pattern : IfxDma_Dma_ChannelConfig
  • pause : TPwm_Functions
  • pauseOnBaudrateSpikeErrors : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • pauseRunTransition : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • payloadLength : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5_Psi5_ReceiveControl , IfxPsi5_Psi5_TransmitControl , IfxPsi5s_Psi5s_ReceiveControl , IfxPsi5s_Psi5s_TransmitControl
  • payloadPreambleIndicator : IfxEray_ReceivedHeader
  • PCE : IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • pDivider : IfxScuCcu_InitialStepConfig
  • pending : IfxAsclin_Spi_Job
  • period : IfxCcu6_Icu_Config , IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base , TPwm_Config , TPwm_s
  • periodicOrExternal : IfxPsi5s_Psi5s_PulseGeneration
  • periodicOrExternalOrBypass : IfxPsi5_Psi5_PulseGeneration
  • periodPerRotation : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxStdIf_Pos_Config
  • periodTick : IfxGtm_Tim_In
  • phase : Spi_ErrorChecks
  • phaseDelay : PwmHl_Config
  • phyInit : IfxEth_Config
  • phyInterfaceMode : IfxEth_Config
  • phyLink : IfxEth_Config
  • pid : IfxAsclin_Lin_PduType
  • pin : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxCif_Clk_In , IfxCif_D_In , IfxCif_Hsnc_In , IfxCif_Vsnc_In , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Mdio_InOut , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_ToutMap , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPort_Io_ConfigPin , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Hwcfg_In , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • pinA : IfxGpt12_IncrEnc_Config
  • pinB : IfxGpt12_IncrEnc_Config
  • pinDriver : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxDsadc_Dsadc_CarrierGenConfig , IfxDsadc_Dsadc_ChannelPins , IfxEray_Eray_NodeA , IfxEray_Eray_NodeB , IfxGpt12_IncrEnc_Config , IfxMsc_Msc_Io , IfxMultican_Can_NodeConfig , IfxPsi5_Psi5_PinsConfig , IfxPsi5s_Psi5s_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins , IfxSent_Sent_Pins
  • pinIndex : IfxPort_Pin , IfxPort_Pin_Config
  • pinMode : IfxDsadc_Dsadc_CarrierGenConfig , IfxGpt12_IncrEnc_Config
  • pinNeg : IfxDsadc_Dsadc_CarrierGenConfig
  • pinPos : IfxDsadc_Dsadc_CarrierGenConfig
  • pins : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxEray_Eray_NodeConfig , IfxI2c_I2c_Config , IfxPsi5s_Psi5s_Config , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config , IfxSent_Sent_ChannelConfig , IfxVadc_Adc_EmuxPinConfig
  • pinsConfig : IfxPsi5_Psi5_ChannelConfig
  • pinTable : IfxPort_Io_Config
  • pinZ : IfxGpt12_IncrEnc_Config
  • pllDividerStep : IfxScuCcu_SysPllConfig
  • pllInitialStep : IfxScuCcu_ErayPllConfig , IfxScuCcu_SysPllConfig
  • polynom : Ifc_Crc_Table
  • port : IfxPort_Esr_Masks , IfxPort_Pin , IfxPort_Pin_Config
  • positionConst : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • positiveInput : IfxDsadc_Dsadc_ModulatorConfig
  • pre : IfxQspi_DelayConst
  • preDivider : IfxHssl_Hssl_Config
  • prescaler : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • prescalerFactor : IfxIom_Driver_LamFilterConfig
  • priority : Ifx_IsrSetting , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxMultican_Can_InterruptConfig , IfxMultican_Can_MsgObjConfig , IfxSent_Sent_Interrupt
  • protocol : Ifx_Shell , Ifx_Shell_Config , IfxQspi_SpiSlave_Config
  • provider : Ifx_IsrSetting
  • prtc1Control : IfxEray_Eray_ControllerConfig
  • prtc2Control : IfxEray_Eray_ControllerConfig
  • pRxDescr : IfxEth
  • psi5 : IfxPsi5_Psi5 , IfxPsi5_Psi5_Config
  • psi5s : IfxPsi5s_Psi5s
  • pTxDescr : IfxEth
  • pulseDelayLength : IfxSent_Sent_TransmitControl
  • pulseGeneration : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • pulseLength : IfxPsi5_Psi5_PulseGeneration , IfxSent_Sent_TransmitControl
  • pulseLengthTick : IfxGtm_Tim_In
  • pulseTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • pwm : IfxDsadc_Rdc_Ts
  • pwmTim : IfxDsadc_Rdc_GtmTimestamp
  • pwmTimCh : IfxDsadc_Rdc_Hw


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- q -

  • q : IfxCif_Cam_JpegTable
  • qspi : IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • queueRequest : IfxVadc_Adc_GroupConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- r -

  • rawPosition : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • RBS1 : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • RBS2 : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • RCH : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • rdc : IfxDsadc_Rdc_Ts
  • rdcTim : IfxDsadc_Rdc_GtmTimestamp
  • rdcTimCh : IfxDsadc_Rdc_Hw
  • rdcTimChannel : IfxDsadc_Rdc_GtmTimestamp
  • rdcTimMuxValue : IfxDsadc_Rdc_GtmTimestamp
  • RDES0 : IfxEth_RxDescr
  • RDES1 : IfxEth_RxDescr
  • RDES2 : IfxEth_RxDescr
  • RDES3 : IfxEth_RxDescr
  • rdm : IfxPsi5_Psi5_Frame
  • rdr : IfxPsi5s_Psi5s_ReceiveData
  • rds : IfxPsi5_Psi5_SerialMessage , IfxPsi5s_Psi5s_ReceiveStatus
  • RE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • read : IfxStdIf_DPipe_
  • readData : IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedData
  • readDataCrc : IfxDma_Dma_ChannelConfig
  • readerWaitx : Ifx_Fifo_Shared
  • real : cfloat32 , cfract , csfract , csint16 , csint32
  • receive : Spi_ErrorChecks
  • receiveBufferErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • receiveBufferOverflowFlag : IfxPsi5s_Psi5s_ReceivedBits
  • receiveBufferOverflowInterrupt : IfxSent_Sent_Enable
  • receiveBufferOverflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveChannel : IfxEray_Eray_MessageRAMConfig
  • receiveControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig , IfxSent_Sent_ChannelConfig
  • receiveDataInterrupt : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_Enable
  • receiveDataInterruptNode : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_InterruptNodeControl
  • receiveDataRegisterTimestamp : IfxPsi5_Psi5_ReceiveControl
  • receivedBits : IfxPsi5s_Psi5s_ReceiveStatus
  • receivedData : IfxPsi5s_Psi5s_ReceiveData
  • receiveIdEnable : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • receiveMemoryOverflowError : IfxPsi5_Psi5_FrameData
  • receiveMode : IfxPsi5s_Psi5s_AscConfig
  • receiveRequested : IfxEray_Eray_ReceiveControl
  • receiverOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • receiveSuccessInterrupt : IfxSent_Sent_Enable
  • receiveSuccessInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupLowTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupTestDuration : IfxEray_Eray_Prtc1Control
  • rectifier : IfxDsadc_Dsadc_ChannelConfig
  • ref : IfxIom_Driver_LamConfig
  • refClk : IfxEth_RmiiPins
  • reference : IfxVadc_Adc_ChannelConfig
  • refin : Ifc_Crc_Table
  • refIndex : IfxIom_Driver_Lam
  • refInput : IfxIom_Driver_Lam
  • refout : Ifc_Crc
  • regAddr : Ifx_InternalMux_MuxConfig
  • rejectedFrameId : IfxEray_Eray_MessageRAMConfig
  • reload : IfxScuWdt_Config
  • remaining : SpiIf_Job
  • requestMode : IfxDma_Dma_ChannelConfig
  • requestSlotBackgroundScanEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotPrio : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • requestSlotQueueEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotScanEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotStartMode : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • requestSource : IfxDma_Dma_ChannelConfig
  • RER : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • reserved : Spi_ErrorChecks
  • reset : IfxStdIf_Pos_
  • resetFaults : IfxStdIf_Pos_
  • resetSendCount : IfxStdIf_DPipe_
  • resolution : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config , IfxVadc_Adc_ClassConfig
  • resolutionFactor : IfxStdIf_Pos_Config
  • resource : Ifx_GlobalResources_Item
  • responseTimeout : IfxAsclin_Lin_DataControl , IfxAsclin_Lin_ErrorFlags
  • responseTimeoutMode : IfxAsclin_Lin_DataControl
  • result : IfxFft_Fft_Count64
  • resultPriority : IfxVadc_Adc_ChannelConfig
  • resultreg : IfxVadc_Adc_Channel
  • resultRegister : IfxVadc_Adc_ChannelConfig
  • resultServProvider : IfxVadc_Adc_ChannelConfig
  • resultSrcNr : IfxVadc_Adc_ChannelConfig
  • resume : TPwm_Functions
  • resv : IfxEth_AltRxDescr1_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr1_Bits , IfxEth_TxDescr0_Bits
  • resv1 : IfxEth_AltRxDescr1_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_AltTxDescr1_Bits
  • resv2 : IfxEth_AltTxDescr1_Bits , IfxEth_RxDescr1_Bits
  • reversed : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxStdIf_Pos_Config
  • rightAlignedStorage : IfxVadc_Adc_ChannelConfig
  • ringModeBuffersConfig : IfxEth_Config
  • risingEdgeAtPeriod : IfxStdIf_Timer_TrigConfig
  • risingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • risingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • rmiiPins : IfxEth_Config
  • rts : IfxAsclin_Asc_Pins
  • rtsMode : IfxAsclin_Asc_Pins
  • run : IfxIom_Driver_LamEventWindowConfig , IfxStdIf_Timer_
  • RWT : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • rx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • rxBuffer : IfxAsclin_Asc_Config
  • rxBuffer1Size : IfxEth_RingModeRxBuffersConfig
  • rxBuffer1StartAddress : IfxEth_RingModeRxBuffersConfig
  • rxBuffer2Size : IfxEth_RingModeRxBuffersConfig
  • rxBuffer2StartAddress : IfxEth_RingModeRxBuffersConfig
  • rxBufferSize : IfxAsclin_Asc_Config
  • rxBufferUsed : IfxEth , IfxEth_RingModeRxBuffersConfig
  • rxClk : IfxEth_MiiPins
  • rxConfig : IfxEth_RingModeBuffersConfig
  • rxCount : IfxEth , SpiIf_
  • rxd0 : IfxEth_MiiPins , IfxEth_RmiiPins
  • rxd1 : IfxEth_MiiPins , IfxEth_RmiiPins
  • rxd2 : IfxEth_MiiPins
  • rxd3 : IfxEth_MiiPins
  • rxDescr : IfxEth , IfxEth_Config
  • rxDiff : IfxEth
  • rxDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • rxDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • rxDv : IfxEth_MiiPins
  • rxEr : IfxEth_MiiPins
  • rxFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • rxFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoUnderflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxHandler : SpiIf_Ch_
  • rxHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxIn : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInterrupt : IfxMultican_Can_MsgObjConfig
  • rxJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • rxMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins
  • rxPin : IfxMultican_Can_NodeConfig
  • rxPinMode : IfxMultican_Can_NodeConfig
  • rxPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • rxReceivedHeader : IfxAsclin_Lin_EnabledInterrupts
  • rxReceivedResponse : IfxAsclin_Lin_EnabledInterrupts
  • rxResponseData : IfxAsclin_Lin_FrameDataControl
  • rxResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxResponseLength : IfxAsclin_Lin_FrameDataControl
  • rxSwFifoOverflow : IfxAsclin_Asc


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- s -

  • SAF : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • sampleClockSource : IfxDsadc_Dsadc_DemodulatorConfig
  • samplePoint : IfxMultican_Can_NodeConfig
  • samplePointPosition : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl
  • sampleStrobe : IfxDsadc_Dsadc_DemodulatorConfig
  • sampleTime : IfxVadc_Adc_ClassConfig
  • sampleTimeControl : IfxVadc_Adc_EmuxControl
  • samplingEdge : IfxCif_Cam_Config
  • samplingTime : Ifx_LowPassPt1F32_Config
  • scanRequest : IfxVadc_Adc_GroupConfig
  • scl : IfxI2c_Pins
  • sclk : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sclkMode : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sda : IfxI2c_Pins
  • sdi : IfxMsc_Msc_Io
  • sdiLinePolarity : IfxMsc_Msc_OutputControlConfig
  • seconds : Ifx_DateTime
  • segmentCount : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • segments : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • select : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out
  • sendControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • sendCount : IfxAsclin_Asc
  • sending : IfxAsclin_Spi , SpiIf_
  • sendResultCode : Ifx_Shell_Config , Ifx_Shell_Flags
  • sensorControlDisabled : IfxDts_Dts_Config
  • sent : IfxSent_Sent
  • serialData : IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • serialDataCrcErrorInterrupt : IfxSent_Sent_Enable
  • serialDataDisabledCrcDisabled : IfxSent_Sent_ReceiveControl
  • serialDataProcessingEnabled : IfxSent_Sent_ReceiveControl
  • serialDataReceiveInterrupt : IfxSent_Sent_Enable
  • serialDataReceiveInterruptNode : IfxSent_Sent_InterruptNodeControl
  • serialMessageCRCFailedError : IfxPsi5_Psi5_Message
  • serviceReqNrPeriod : IfxCcu6_TimerWithTrigger_Config
  • serviceReqNrTrigger : IfxCcu6_TimerWithTrigger_Config
  • serviceRequest : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • serviceRequestDelay : IfxMsc_Msc_UpstreamStatusConfig
  • servReqPriority : IfxDsadc_Rdc_ConfigHw
  • servReqProvider : IfxDsadc_Rdc_ConfigHw
  • setDeadtime : IfxStdIf_PwmHl_
  • setFrequency : IfxStdIf_Timer_
  • setMinPulse : IfxStdIf_PwmHl_
  • setMode : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_
  • setOffset : IfxStdIf_Pos_
  • setOnTime : IfxStdIf_PwmHl_
  • setOnTimeAndShift : IfxStdIf_PwmHl_
  • setPeriod : IfxStdIf_Timer_
  • setPosition : IfxStdIf_Pos_
  • setPulse : IfxStdIf_PwmHl_
  • setRawPosition : IfxStdIf_Pos_
  • setRefreshPeriod : IfxStdIf_Pos_
  • setSingleMode : IfxStdIf_Timer_
  • setSpeed : IfxStdIf_Pos_
  • setTrigger : IfxStdIf_Timer_
  • setupChannels : IfxStdIf_PwmHl_
  • setupDataCount : IfxCif_Cam_Config
  • setupDataTable : IfxCif_Cam_Config
  • shadowAddress : IfxDma_Dma_ChannelConfig
  • shadowControl : IfxDma_Dma_ChannelConfig
  • shared : _Fifo
  • shift : Ifx_LutIndexedLinearF32
  • shiftClock : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • shiftDir : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • showPrompt : Ifx_Shell_Config , Ifx_Shell_Flags
  • signalLevel : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • signDelay : IfxDsadc_Dsadc_RectifierConfig
  • signPeriod : IfxDsadc_Dsadc_RectifierConfig
  • signSource : IfxDsadc_Dsadc_RectifierConfig
  • singleDataTransfer : IfxMultican_Can_MsgObjControl
  • singleShot : IfxStm_Timer_Base
  • singleTransmitTrial : IfxMultican_Can_MsgObjControl
  • sinIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc
  • size : _Fifo , Ifx_GlobalResources , Ifx_InternalMux_Config , IfxCif_Cam_MemInfo , IfxPort_Io_Config
  • sizeFactor : IfxCif_Cam_Downscaling
  • sleepModeEnabled : IfxSent_Sent_Config
  • slotControl : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig
  • slotCounter : IfxPsi5_Psi5_FrameData
  • slowClock : IfxPsi5_Psi5_Config
  • sls : IfxQspi_SpiMaster_ChannelConfig
  • slsi : IfxQspi_SpiSlave_Pins
  • slsiMisplacedInactivation : IfxQspi_SpiSlave_ErrorFlags
  • slsiMode : IfxQspi_SpiSlave_Pins
  • slso : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Channel_s
  • slsoActiveState : IfxQspi_SpiMaster_Channel_s
  • slsoMode : IfxAsclin_Spi_Pins
  • slsoNr : IfxQspi_Slso_Out
  • son : IfxMsc_Msc_Io
  • sop : IfxMsc_Msc_Io
  • sopPolarity : IfxMsc_Msc_OutputControlConfig
  • sorPayloadLength : IfxPsi5_Psi5_TransmitControl
  • source : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxGtm_Trig_Trigger , IfxIom_Driver_LamEventConfig
  • sourceAddress : IfxDma_Dma_ChannelConfig
  • sourceAddressCircularRange : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • sourceCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • sourceDestinationAddressCrc : IfxDma_Dma_ChannelConfig
  • spcMode : IfxSent_Sent_TransmitControl
  • spcModeOn : IfxSent_Sent_ChannelConfig
  • speed : IfxGpt12_IncrEnc
  • speedConstPulseCount : IfxGpt12_IncrEnc
  • speedConstTimeDiff : IfxGpt12_IncrEnc
  • speedEstA : Ifx_AngleTrkF32
  • speedEstB : Ifx_AngleTrkF32
  • speedFilerCutOffFrequency : IfxStdIf_Pos_Config
  • speedFilterEnabled : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • speedLpf : Ifx_AngleTrkF32 , IfxGpt12_IncrEnc
  • speedLpfFc : Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • speedModeThreshold : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • speedModeThresholdTick : IfxGpt12_IncrEnc
  • spol : IfxAsclin_Spi_InputOutputControl
  • sqrAmplMax : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • sqrAmplMin : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • srcId : IfxMultican_Can_InterruptSource
  • srcrOutDis : IfxFft_Fft
  • srcrOutEnd : IfxFft_Fft
  • srhActivePhaseSelection : IfxMsc_Msc_DownstreamControlConfig
  • srhBitsShiftedAtDataFramesExtension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • srhDataFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • srlActivePhaseSelection : IfxMsc_Msc_DownstreamControlConfig
  • srlBitsShiftedAtDataFramesExtension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • srlDataFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • ssrPayloadLength : IfxPsi5_Psi5_TransmitControl
  • standardIo : Ifx_Console , Ifx_Shell_Config
  • start : Ifx_Shell_Protocol , IfxCif_Cam_MemInfo , IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • startCapture : Icu_Functions
  • startChannel : IfxVadc_Adc_EmuxControl
  • started : Ifx_Shell_Protocol
  • startIndex : _Fifo
  • startOffset : IfxStdIf_Timer_Config
  • startScan : IfxDsadc_Rdc_ConfigHw
  • startSequenceGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • startSequenceGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • startSingleShotMode : Timer_Functions
  • startupCalibration : IfxVadc_Adc_Config
  • startupFrame : IfxEray_ReceivedHeader
  • startupFrameIndicator : IfxEray_Header
  • startupFrameTransmitted : IfxEray_Eray_Succ1Config
  • startValue : IfxDsadc_Dsadc_CombFilterConfig
  • staticActionPoint : IfxEray_Eray_Gtu09Config
  • staticFifoDisabled : IfxEray_Eray_MessageRAMConfig
  • staticFramepayload : IfxEray_Eray_ControllerConfig
  • staticSlotLength : IfxEray_Eray_Gtu07Config
  • staticSlotsCount : IfxEray_Eray_Gtu07Config
  • status : Ifx_AngleTrkF32_PosIf , IfxEth , IfxGpt12_IncrEnc , IfxI2c_I2c , IfxPsi5s_Psi5s_Frame , IfxStdIf_Pos_Status
  • statusNibble : IfxSent_Sent_Frame
  • statusNibbleEnabled : IfxSent_Sent_ReceiveControl
  • step : IfxMsc_Msc_Clock
  • stm : IfxStm_Timer , IfxStm_Timer_Config
  • stop : IfxStdIf_Timer_ , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • stopBit : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • stopBits : IfxPsi5s_Psi5s_AscConfig
  • stopCapture : Icu_Functions
  • streamingMode : IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • streamingModeOn : IfxHssl_Hssl_Channel
  • strobePosition : IfxEray_Eray_Prtc1Control
  • succ1Config : IfxEray_Eray_ControllerConfig
  • succ2Config : IfxEray_Eray_ControllerConfig
  • succ3Config : IfxEray_Eray_ControllerConfig
  • supplyVoltage : IfxVadc_Adc_Config
  • suspendTriggered : IfxSent_Sent_ReceiveControl
  • swapRequested : IfxEray_Eray_ReceiveControl
  • switchingSelect : IfxCcu6_PwmBc_MultiChannelControl
  • switchingSync : IfxCcu6_PwmBc_MultiChannelControl
  • syncFrame : IfxEray_ReceivedHeader
  • syncFrameIndicator : IfxEray_Header
  • syncFrameTransmitted : IfxEray_Eray_Succ1Config
  • synchJumpWidth : IfxMultican_Can_NodeConfig
  • synchonize : IfxVadc_Adc_ChannelConfig
  • synchronousOperation : IfxCcu6_Timer_Config
  • synchronousStart : Timer_Functions
  • synchronousStop : Timer_Functions
  • synchronousUpdateEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • syntax : Ifx_Shell_Syntax
  • sysPll : IfxScuCcu_Config
  • systemCall : IfxCpu_Trap_Id
  • systemEventTriggerThreshold : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- t -

  • t12countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t12ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t12Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t12Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12SyncDirection : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t12SyncEvent : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t13countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t13Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t13hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t13InSyncWithT12 : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t1xhrInputMode : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • table : Ifc_Crc , Ifx_GlobalResources
  • tAddr : IfxCpu_Trap
  • target : IfxMsc_En_Out , IfxMsc_Msc_Config
  • TBS1 : IfxEth_AltTxDescr1_Bits , IfxEth_TxDescr1_Bits
  • TBS2 : IfxEth_AltTxDescr1_Bits , IfxEth_TxDescr1_Bits
  • TCH : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • tClass : IfxCpu_Trap
  • tCpu : IfxCpu_Trap
  • TDES0 : IfxEth_TxDescr
  • TDES1 : IfxEth_TxDescr
  • TDES2 : IfxEth_TxDescr
  • TDES3 : IfxEth_TxDescr
  • TER : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • tgc : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer
  • tgcGlobalControlApplyUpdate : IfxGtm_Tom_Timer
  • tgcGlobalControlDisableUpdate : IfxGtm_Tom_Timer
  • threshold : IfxIom_Driver_LamEventWindowConfig
  • thumbData : IfxCif_Cam_JfifHeader
  • thumbX : IfxCif_Cam_JfifHeader
  • thumbY : IfxCif_Cam_JfifHeader
  • ticks : IfxStm_CompareConfig
  • tId : IfxCpu_Trap
  • tim : IfxGtm_Tim_TinMap
  • timeBase : IfxSent_Sent_TransmitControl
  • timeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • timeFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • timeFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • timeout : IfxGtm_Tim_In_Config , IfxGtm_Tim_In_ConfigTimeout
  • timeoutError : IfxHssl_Hssl_errorFlags
  • timer : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxStdIf_PwmHl_
  • timer12 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timer13 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timerChannel : IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • timerInterrupt : IfxMultican_Can_NodeConfig
  • timeslotError : IfxPsi5_Psi5_FrameData
  • timestamp : Ifx_DataBufferMode_TimeStampSingle , IfxDsadc_Rdc , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_Frame
  • timeStamp : IfxPsi5s_Psi5s_ReceiveTimestamp
  • timestamp : IfxPsi5s_Psi5s_Timestamp
  • timeStamp : IfxSent_Sent_Frame
  • timestampClock : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterA : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterB : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterC : IfxPsi5_Psi5_Config
  • timestampEnabled : IfxDma_Dma_ChannelConfig , IfxPsi5s_Psi5s_ReceiveControl
  • timeStampPreDivider : IfxSent_Sent_Config
  • timestampSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timestampTrigger : IfxDsadc_Dsadc_DemodulatorConfig
  • timestampTriggerSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • tint0IsrProvider : IfxEray_Eray_Interrupt
  • tint0Priority : IfxEray_Eray_Interrupt
  • tint1IsrProvider : IfxEray_Eray_Interrupt
  • tint1Priority : IfxEray_Eray_Interrupt
  • tom : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxGtm_Tom_ToutMap
  • tomChannel : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver
  • tomIndex : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer
  • topMsgObjId : IfxMultican_Can_MsgObjControl
  • totalMemSize : IfxCif_Cam
  • toutn : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • toutSel : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • transactionRequestLostInterruptEnabled : IfxDma_Dma_ChannelConfig
  • transactionTagError : IfxHssl_Hssl_errorFlags
  • transferBufferUnderflowInterrupt : IfxSent_Sent_Enable
  • transferBufferUnderflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferCount : IfxDma_Dma_ChannelConfig
  • transferDataInterrupt : IfxSent_Sent_Enable
  • transferDataInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferInProgress : IfxAsclin_Spi
  • transferInterrupt : IfxMultican_Can_NodeConfig
  • transferRequested : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • transmissionMode : IfxEray_Header , IfxMsc_Msc_DownstreamControlConfig
  • transmissionSlotMode : IfxEray_Eray_Succ1Config
  • transmissionStartTime : IfxEray_Eray_Prtc1Control
  • transmit : Spi_ErrorChecks
  • transmitControl : IfxSent_Sent_ChannelConfig
  • transmitErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • transmitMode : IfxPsi5s_Psi5s_AscConfig
  • transmitPayloadIndicatior : IfxEray_Header
  • transmitterOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • transmitWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupLowTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupRepetitions : IfxEray_Eray_Prtc1Control
  • trigger : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGtm_Trig_AdcTrig_Table , IfxIom_Driver_LamEventConfig , IfxStdIf_Timer_Config
  • triggerChannel : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • triggerConfig : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • triggerEnabled : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • triggerInput : IfxDsadc_Dsadc_DemodulatorConfig
  • triggerMode : IfxVadc_Adc_GatingTriggerConfig
  • triggerMonitorCleared : IfxSent_Sent_InputOutputControl
  • triggerOut : IfxCcu6_TimerWithTrigger_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • triggerPoint : IfxStdIf_Timer_TrigConfig
  • triggerPriority : IfxStm_CompareConfig
  • triggerSource : IfxSent_Sent_TransmitControl , IfxVadc_Adc_GatingTriggerConfig
  • Ts : Ifx_AngleTrkF32_PosIf
  • tsm : IfxPsi5s_Psi5s_ReceiveTimestamp
  • TTSE : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • TTSS : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • tUnit : IfxSent_Sent_ChannelConfig
  • turn : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • tx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • txBuffer : IfxAsclin_Asc_Config
  • txBuffer1Size : IfxEth_RingModeTxBuffersConfig
  • txBuffer1StartAddress : IfxEth_RingModeTxBuffersConfig
  • txBuffer2Size : IfxEth_RingModeTxBuffersConfig
  • txBuffer2StartAddress : IfxEth_RingModeTxBuffersConfig
  • txBufferSize : IfxAsclin_Asc_Config
  • txBufferUsed : IfxEth , IfxEth_RingModeTxBuffersConfig
  • txClk : IfxEth_MiiPins
  • txCompleted : IfxAsclin_Lin_AcknowledgementFlags
  • txConfig : IfxEth_RingModeBuffersConfig
  • txCount : IfxEth , SpiIf_
  • txd0 : IfxEth_MiiPins , IfxEth_RmiiPins
  • txd1 : IfxEth_MiiPins , IfxEth_RmiiPins
  • txd2 : IfxEth_MiiPins
  • txd3 : IfxEth_MiiPins
  • txDescr : IfxEth , IfxEth_Config
  • txDiff : IfxEth
  • txDisabled : IfxStdIf_DPipe_
  • txDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • txDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • txEn : IfxEth_MiiPins , IfxEth_RmiiPins
  • txEnOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEnOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEr : IfxEth_MiiPins
  • txFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • txFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • txFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txHandler : SpiIf_Ch_
  • txHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • txInProgress : IfxAsclin_Asc
  • txInterrupt : IfxMultican_Can_MsgObjConfig
  • txJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • txMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins
  • txOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txPin : IfxMultican_Can_NodeConfig
  • txPinMode : IfxMultican_Can_NodeConfig
  • txPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • txResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • txResponseLength : IfxAsclin_Lin_FrameDataControl
  • txSendHeaderOnly : IfxAsclin_Lin_FrameControlFlags
  • txSendResponse : IfxAsclin_Lin_FrameControlFlags
  • txTimestamp : IfxAsclin_Asc
  • txTransmittedHeader : IfxAsclin_Lin_EnabledInterrupts
  • txTransmittedResponse : IfxAsclin_Lin_EnabledInterrupts
  • type : IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock
  • typeOfService : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxFft_Fft_Config , IfxMultican_Can_InterruptConfig , IfxStm_CompareConfig


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- u -

  • U : IfxEth_RxDescr0 , IfxEth_RxDescr1 , IfxEth_RxDescr2 , IfxEth_RxDescr3 , IfxEth_RxDescrList , IfxEth_TxDescr0 , IfxEth_TxDescr1 , IfxEth_TxDescr2 , IfxEth_TxDescr3 , IfxEth_TxDescrList , IfxMultican_MsgObjStat
  • uartFrameCount : IfxPsi5s_Psi5s_ReceiveControl
  • UF : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • uk : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • underflowInterrupt : IfxMsc_Msc_InterruptConfig
  • underflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • unexpectedError : IfxHssl_Hssl_errorFlags
  • unknown : IfxCif_Cam_JfifHeader
  • update : IfxCcu6_PwmHl_Mode , IfxCcu6_PwmHl_s , IfxGpt12_IncrEnc , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s , IfxStdIf_Pos_
  • updateAndShift : IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • updateInputFrequency : IfxStdIf_Timer_
  • updatePeriod : IfxDsadc_Rdc , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • updatePulse : IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • upperBoundary : IfxVadc_Adc_ChannelConfig
  • upperLimit : IfxAsclin_Lin_BaudrateDetection
  • upperTemperatureLimit : IfxDts_Dts_Config
  • upstreamChannelFrameType : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamChannelReceivingRate : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamConfig : IfxMsc_Msc_Config
  • upstreamTimeoutInterrupt : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutInterruptNode : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutPrescaler : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamTimeoutValue : IfxMsc_Msc_UpstreamStatusConfig
  • useDma : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • userTs : IfxDsadc_Rdc_Config
  • useWindowFunction : IfxFft_Fft_JobConfig
  • uv : IfxCif_Cam_JpegTables


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- v -

  • vadc : IfxVadc_Adc , IfxVadc_Adc_Config , IfxVadc_Adc_EmuxControl
  • value : Ifx_InternalMux_MuxConfig , IfxPsi5_Psi5_Rds , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • verbose : IfxPsi5_Psi5_ReceiveControl
  • verboseForAsynchronousMode : IfxPsi5_Psi5_ReceiveControl
  • version : IfxCif_Cam_JfifHeader
  • vFactor : IfxCif_Cam_Downscaling
  • VLAN : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • vMode : IfxCif_Cam_Downscaling
  • vOffset : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • vSize : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • vSyncPolarity : IfxCif_Cam_Config


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- w -

  • waitingTime : Timer_Config , TPwm_Config
  • waitTime : IfxScuCcu_InitialStepConfig , IfxScuCcu_PllStepsConfig
  • wakeupPatternChannel : IfxEray_Eray_Succ1Config
  • watchdogEnabled : IfxCif_Cam_Common
  • watchdogErrorInterrupt : IfxSent_Sent_Enable
  • watchdogErrorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • watchdogTimeoutErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • watchdogTimerLimit : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • watchDogTimerLimit : IfxSent_Sent_ChannelConfig
  • watchdogTimerModeSelect : IfxPsi5s_Psi5s_ReceiveControl
  • windowSize : IfxDsadc_Dsadc_IntegratorConfig
  • wrapDestinationInterruptEnabled : IfxDma_Dma_ChannelConfig
  • wrapSourceInterruptEnabled : IfxDma_Dma_ChannelConfig
  • write : IfxStdIf_DPipe_
  • writerWaitx : Ifx_Fifo_Shared
  • wrongStatusNibbleErrorInterrupt : IfxSent_Sent_Enable


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- x -

  • xcrc : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcError : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • xtalFrequency : IfxScuCcu_Config
  • xxxCH1 : IfxGtm_Tom_TGC


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- y -

  • y : IfxCif_Cam_JpegTables , IfxCif_Cam_MemAreas


iLLD_TC26B: Data Fields

Here is a list of all struct and union fields with links to the structures/unions they belong to:

- z -

  • zeroIsrPriority : IfxGpt12_IncrEnc_Config
  • zeroIsrProvider : IfxGpt12_IncrEnc_Config


iLLD_TC26B: Data Fields - Variables

- a -

  • a : Ifx_LowPassPt1F32
  • A : IfxEth_RxDescr0 , IfxEth_RxDescr1 , IfxEth_TxDescr0 , IfxEth_TxDescr1
  • a : IfxPsi5_Psi5_StartupOptions
  • abd : IfxAsclin_Lin_BaudrateDetection
  • abraBlockBypass : IfxMsc_Msc_Abra
  • abraConfig : IfxMsc_Msc_Config
  • abraDownstreamBlockBaudrate : IfxMsc_Msc_Abra
  • ac : IfxCif_Cam_JpegTable
  • accelEst : Ifx_AngleTrkF32
  • acceptanceMask : IfxMultican_Can_MsgObjConfig
  • acceptedStartupDeviation : IfxEray_Eray_Gtu06Config
  • accessWindow0 : IfxHssl_Hssl_Config
  • accessWindow1 : IfxHssl_Hssl_Config
  • accessWindow2 : IfxHssl_Hssl_Config
  • accessWindow3 : IfxHssl_Hssl_Config
  • accumulatedCounterIndex : IfxIom_Driver_Lam
  • accumulatedEventUsedMask : IfxIom_Driver
  • acknowledgmentFlags : IfxAsclin_Lin
  • ackTimerIrq : IfxStdIf_Timer_
  • ackTriggerIrq : IfxStdIf_Timer_
  • ACT_TB : IfxGtm_Tom_TGC
  • activateSlso : IfxQspi_SpiMaster_Channel_s
  • activeChannel : SpiIf_
  • activeCount : Timer_Config , TPwm_Config
  • activeState : PwmHl_Config , TPwm_Config
  • actualUartFrameCount : IfxPsi5s_Psi5s_ReceivedBits
  • address : IfxFlash_ErrorTracking_Address
  • AFM : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • agc : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer
  • agcApplyUpdate : IfxGtm_Atom_Timer
  • agcDisableUpdate : IfxGtm_Atom_Timer
  • alertInterrupt : IfxMultican_Can_NodeConfig
  • align : Ifx_Console
  • ALL : IfxAsclin_Asc_ErrorFlagsUnion , IfxSent_Sent_EnabledInterrupts
  • allowSleepMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • alternateCrcSelected : IfxSent_Sent_ReceiveControl
  • alti : IfxAsclin_Lin_Config , IfxAsclin_Spi_InputOutputControl
  • analogFrequency : IfxVadc_Adc_Config
  • analyzerMode : IfxMultican_Can_NodeConfig
  • angleAtan : Ifx_AngleTrkF32
  • angleErr : Ifx_AngleTrkF32
  • angleEst : Ifx_AngleTrkF32
  • angleRef : Ifx_AngleTrkF32
  • angleTrk : IfxDsadc_Rdc
  • app0 : IfxCif_Cam_JfifHeader
  • applyUpdate : IfxStdIf_Timer_
  • arbiter : IfxVadc_Adc_GroupConfig
  • arbiterRoundLength : IfxVadc_Adc_ArbiterConfig
  • ascConfig : IfxPsi5s_Psi5s_Config
  • ascFramingErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • asclin : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Lin , IfxAsclin_Lin_Config , IfxAsclin_Spi , IfxAsclin_Spi_Config
  • ascOnlyMode : IfxPsi5s_Psi5s_GlobalControlConfig
  • ascOverrunErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • ascParityErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • assertion : IfxCpu_Trap_Id
  • asynchronousModeSelected : IfxPsi5_Psi5_ReceiveControl
  • atom : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Atom_ToutMap
  • atomChannel : IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver
  • atomIndex : IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer
  • autoBackgroundScanEnabled : IfxVadc_Adc_BackgroundScanConfig
  • autoCS : SpiIf_ChMode
  • automaticLengthReload : IfxFce_Crc_CrcConfig
  • autoscanEnabled : IfxVadc_Adc_ScanConfig
  • auxFilter : IfxDsadc_Dsadc_ChannelConfig
  • availMemSize : IfxCif_Cam


iLLD_TC26B: Data Fields - Variables

- b -

  • b : Ifx_LowPassPt1F32
  • B : IfxMultican_MsgObjStat
  • b : IfxPsi5_Psi5_StartupOptions
  • B : IfxStdIf_Pos_Status
  • backgroundChannel : IfxVadc_Adc_ChannelConfig
  • backgroundScanRequest : IfxVadc_Adc_GroupConfig
  • bacon : IfxQspi_SpiMaster_Channel_s
  • base : Ifx_AngleTrkF32 , Ifx_CircularBuffer , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_IncrEnc_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config , IfxStm_Timer , IfxStm_Timer_Config
  • baudrate : IfxAsclin_Asc_BaudRate , IfxAsclin_Asc_Config , IfxAsclin_Lin_BaudrateGeneration , IfxAsclin_Spi_Baudrate , IfxAsclin_Spi_Config , IfxEray_Eray_Prtc1Control , IfxI2c_I2c , IfxI2c_I2c_Config , IfxMsc_Msc_Clock , IfxMultican_Can_NodeConfig , Spi_ErrorChecks , SpiIf_Ch_ , SpiIf_ChConfig_
  • baudrateError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • baudrateFrequency : IfxPsi5s_Psi5s_AscConfig
  • baudrateSelect : IfxPsi5_Psi5_ReceiveControl
  • baudrateSelection : IfxPsi5s_Psi5s_AscConfig
  • bitReversed : IfxDsadc_Dsadc_CarrierGenConfig
  • bitSampling : IfxAsclin_Spi_Config
  • bitStuffControl : IfxPsi5s_Psi5s_TransmitControl
  • bitStuffingEnabled : IfxPsi5_Psi5_TransmitControl
  • bitTiming : IfxAsclin_Asc_Config
  • blankoutTime : IfxPsi5_Psi5_PulseGeneration
  • blockMode : IfxDma_Dma_ChannelConfig
  • bottomMsgObjId : IfxMultican_Can_MsgObjControl
  • boundary : Ifx_LutLinearF32_Item
  • boundaryMode : IfxVadc_Adc_ChannelConfig
  • brd : IfxAsclin_Lin_Config
  • breakDetected : IfxAsclin_Lin_ErrorFlags
  • breakLength : IfxAsclin_Lin_LinControl
  • brg : IfxAsclin_Lin_Config
  • bsc : IfxAsclin_Lin_Config
  • btc : IfxAsclin_Lin_Config
  • buffer : _Fifo , SpiIf_Config
  • bufferDirection : IfxEray_Header
  • bufferIndex : IfxEray_Eray_ReceiveControl , IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • bufferReconfigEnabled : IfxEray_Eray_MessageRAMConfig
  • bufferServiceEnabled : IfxEray_Header
  • bufferSize : SpiIf_Config
  • buffMode : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • bus : IfxCpu_Trap_Id
  • busAccessError : IfxHssl_Hssl_errorFlags
  • busError : IfxFce_Crc_EnabledInterrupts
  • busPriority : IfxDma_Dma_ChannelConfig
  • busStatus : IfxI2c_I2c
  • bypassed : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • byteAccess : SpiIf_Flags
  • byteSwap : IfxCif_Cam_MemConfig


iLLD_TC26B: Data Fields - Variables

- c -

  • call : Ifx_Shell_Command
  • callbackData : SpiIf_Ch_
  • canReadCount : IfxStdIf_DPipe_
  • canWriteCount : IfxStdIf_DPipe_
  • capture : IfxGtm_Tim_In_Config
  • captureClockFrequency : IfxGtm_Tim_In
  • captureFrequency : IfxCcu6_Icu
  • carrierGen : IfxDsadc_Rdc_ConfigHw
  • carrierWaveformMode : IfxDsadc_Dsadc_CarrierGenConfig
  • cb : IfxCif_Cam_MemAreas
  • CC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • cc0 : IfxCcu6_PwmHl_Config
  • cc1 : IfxCcu6_PwmHl_Config
  • cc2 : IfxCcu6_PwmHl_Config
  • cc60In : IfxCcu6_Icu_Pins
  • cc60Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc61In : IfxCcu6_Icu_Pins
  • cc61Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc62In : IfxCcu6_Icu_Pins
  • cc62Out : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cc6xInputMode : IfxCcu6_Icu_Pins
  • ccpos0 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos1 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccpos2 : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins
  • ccposxInputMode : IfxCcu6_Icu_Pins
  • ccu0Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu1Enabled : IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tom_Pwm_Interrupt
  • ccu6 : IfxCcu6_Icu , IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_Icu_Config , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TimerWithTrigger , IfxCcu6_TimerWithTrigger_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • ccucon0 : IfxScuCcu_ClockDistributionConfig
  • ccucon1 : IfxScuCcu_ClockDistributionConfig
  • ccucon2 : IfxScuCcu_ClockDistributionConfig
  • ccucon5 : IfxScuCcu_ClockDistributionConfig
  • ccucon6 : IfxScuCcu_ClockDistributionConfig
  • ccucon7 : IfxScuCcu_ClockDistributionConfig
  • ccx : IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • ccxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • ccxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • CE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • cfgData : Ifx_AngleTrkF32
  • channel : IfxDma_Dma_Channel , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxGtm_Atom_ToutMap , IfxGtm_Tim_In , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxGtm_Trig_Source , IfxIom_Driver_Lam , IfxIom_Driver_LamConfig , IfxPsi5_Psi5_Channel , IfxSent_Sent_Channel , IfxVadc_Adc_Channel
  • channelAConnectedNode : IfxEray_Eray_Succ1Config
  • channelAFiltered : IfxEray_Header
  • channelAMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelAReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelASymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelBasedCs : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • channelBConnectedNode : IfxEray_Eray_Succ1Config
  • channelBFiltered : IfxEray_Header
  • channelBMacrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBMicrotickInitialOffset : IfxEray_Eray_Gtu03Config
  • channelBReceptionDelay : IfxEray_Eray_Gtu05Config
  • channelBSymbolTransmitted : IfxEray_Eray_Succ1Config
  • channelCount : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • channelId : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12 , IfxDma_Dma_Channel , IfxDma_Dma_ChannelConfig , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsadc_ChannelConfig , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_ReceivedBits , IfxQspi_SpiMaster_Channel_s , IfxScu_Req_In , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxSent_Sent_In , IfxSent_Spc_Out , IfxVadc_Adc_ChannelConfig , IfxVadc_Vadcg_In
  • channelIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • channelInterruptControl : IfxDma_Dma_ChannelConfig
  • channelInterruptEnabled : IfxDma_Dma_ChannelConfig
  • channelInterruptPriority : IfxDma_Dma_ChannelConfig
  • channelInterruptTypeOfService : IfxDma_Dma_ChannelConfig
  • channelMode : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_TPwm_Timer12
  • channelNumberCodeError : IfxHssl_Hssl_errorFlags
  • channelOut : IfxCcu6_TPwm , IfxCcu6_TPwm_Config
  • channelPins : IfxDsadc_Dsadc_ChannelConfig
  • channelPriority : IfxVadc_Adc_ChannelConfig
  • channels : IfxVadc_Adc_EmuxControl
  • channelSelectionStyle : IfxVadc_Adc_EmuxControl
  • channelServProvider : IfxVadc_Adc_ChannelConfig
  • channelsMask : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • channelSrcNr : IfxVadc_Adc_ChannelConfig
  • channelTrigger : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • channelTriggerCounter : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • channelTriggerValue : IfxPsi5_Psi5_ChannelTrigger , IfxPsi5s_Psi5s_ChannelTrigger
  • checksum : IfxAsclin_Lin_DataControl
  • checksumMode : IfxAsclin_Lin_PduType
  • CIC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • cif : IfxCif_Cam
  • cin : IfxDsadc_Dsadc_ChannelPins
  • cinMode : IfxDsadc_Dsadc_ChannelPins
  • clearEvent : IfxIom_Driver_LamEventWindowConfig
  • clearRx : IfxStdIf_DPipe_
  • clearTimerOnGlitch : IfxIom_Driver_LamFilterConfig
  • clearTx : IfxStdIf_DPipe_
  • clk : IfxPsi5s_Psi5s_Pins
  • clkMode : IfxPsi5s_Psi5s_Pins
  • clock : IfxCcu6_Icu_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxCpu_Perf , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tim_In_ConfigFilter , IfxGtm_Tim_In_ConfigTimeout , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Config
  • clockConfig : IfxMsc_Msc_Config
  • clockCorrectionCyclesHalt : IfxEray_Eray_Succ3Config
  • clockCorrectionCyclesPassive : IfxEray_Eray_Succ3Config
  • clockDistribution : IfxScuCcu_Config
  • clockFreq : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • clockInput : IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • clockOutput : IfxPsi5s_Psi5s_AscConfig
  • clockPeriod : IfxDsadc_Rdc_Ts
  • clockPolarity : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • clockSelect : IfxMultican_Can_Config
  • clockSelectAbra : IfxMsc_Msc_Abra
  • clockSource : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • clockSyncErrorHalt : IfxEray_Eray_Succ1Config
  • clrInternalResetFlag : IfxScuWdt_Config
  • clusterDrift : IfxEray_Eray_Gtu05Config
  • cmd : Ifx_Shell
  • cmdHistory : Ifx_Shell
  • cmdState : Ifx_Shell_Runtime
  • cmdStr : Ifx_Shell_CmdLine , Ifx_Shell_Runtime
  • code : IfxVadc_Adc_EmuxControl
  • codeforOne : IfxPsi5s_Psi5s_PulseGeneration
  • codeforZero : IfxPsi5s_Psi5s_PulseGeneration
  • col : IfxEth_MiiPins
  • collisionAvoidanceDuration : IfxEray_Eray_Prtc1Control
  • collisionDetectionEnable : IfxAsclin_Lin_FrameControl
  • collisionDetectionError : IfxAsclin_Lin_ErrorFlags
  • combFilter : IfxDsadc_Dsadc_ChannelConfig
  • combFilterShift : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • combFilterType : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • commandDataCommandReceptionMode : IfxMsc_Msc_DownstreamControlConfig
  • commandFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • commandFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • commandFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • commandLine : Ifx_Shell_Command
  • commandList : Ifx_Shell , Ifx_Shell_Config
  • common : IfxCif_Cam_Config
  • commonModeVoltage : IfxDsadc_Dsadc_ModulatorConfig
  • comparator : IfxStm_CompareConfig , IfxStm_Timer , IfxStm_Timer_Config
  • comparatorInterrupt : IfxStm_CompareConfig
  • comparatorShift : IfxStm_Timer
  • comparatorValue : IfxStm_Timer
  • compareOffset : IfxStm_CompareConfig
  • compareSize : IfxStm_CompareConfig
  • compareValue : IfxCcu6_PwmBc_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • config : IfxEth , IfxGtm_Trig_Channel
  • configBit : IfxSent_Sent_SerialMessageFrame
  • configError : IfxFce_Crc_EnabledInterrupts
  • configResult : IfxCif_Cam
  • configuration : IfxPsi5_Psi5_Message
  • configurationError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • contextManagement : IfxCpu_Trap_Id
  • control : Ifx_Shell , IfxMultican_Can_MsgObjConfig
  • controlFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • controllerConfig : IfxEray_Eray_NodeConfig
  • controlSource : IfxIom_Driver_LamEventWindowConfig
  • copyData : IfxMultican_Can_GatewayConfig
  • copyDataLengthCode : IfxMultican_Can_GatewayConfig
  • copyId : IfxMultican_Can_GatewayConfig
  • correctionOffset : IfxEray_Eray_Gtu04Config
  • cosIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc
  • count : Ifx_Fifo_Shared
  • count64 : IfxFft_Fft_Job_s
  • countDir : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStdIf_Timer_Config , IfxStm_Timer_Base
  • counter : IfxCpu_Counter
  • counter1 : IfxCpu_Perf
  • counter2 : IfxCpu_Perf
  • counter3 : IfxCpu_Perf
  • counterValue : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer12 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer12 , IfxCcu6_TPwm_Timer13
  • countingInputMode : IfxCcu6_Icu_Clock
  • countMode : IfxCcu6_Icu_Config , IfxCcu6_PwmBc_Timer12 , IfxCcu6_Timer_Timer12 , IfxCcu6_TPwm_Timer12
  • countOneStep : Timer_Functions
  • cout0 : IfxCcu6_PwmHl_Config
  • cout1 : IfxCcu6_PwmHl_Config
  • cout2 : IfxCcu6_PwmHl_Config
  • cout60 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout61 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout62 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • cout63 : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins
  • coutx : IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s
  • coutxActiveState : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • coutxTemp : IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_s
  • cpol : IfxAsclin_Spi_InputOutputControl
  • cr : IfxCif_Cam_MemAreas
  • crc : IfxPsi5_Psi5_FrameData , IfxPsi5_Psi5_Message , IfxPsi5s_Psi5s_ReceivedBits , IfxSent_Sent_SerialMessageFrame
  • crc32BitReflectionEnabled : IfxFce_Crc_CrcConfig
  • crc32Kernel : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcCheckCompared : IfxFce_Crc_CrcConfig
  • crcError : IfxHssl_Hssl_errorFlags , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedBits
  • crcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • crcErrorInterrupt : IfxSent_Sent_Enable
  • crcGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • crcGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • crchighbit : Ifc_Crc_Table
  • crcinit_direct : Ifc_Crc
  • crcinit_nondirect : Ifc_Crc
  • crcmask : Ifc_Crc_Table
  • crcMethodDisabled : IfxSent_Sent_ReceiveControl
  • crcMismatch : IfxFce_Crc_EnabledInterrupts
  • crcMode : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • crcModeDisabled : IfxSent_Sent_ReceiveControl
  • crcOrParity : IfxPsi5_Psi5_ReceiveControl , IfxPsi5s_Psi5s_ReceiveControl
  • crcResultInverted : IfxFce_Crc_CrcConfig
  • crctab : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8
  • crcxor : Ifc_Crc
  • crs : IfxEth_MiiPins
  • crsDiv : IfxEth_RmiiPins
  • csActiveLevel : SpiIf_ChMode
  • csEnable : IfxAsclin_Lin_LinControl
  • csi : IfxAsclin_Lin_LinControl
  • csInactiveDelay : SpiIf_ChMode
  • csLeadDelay : SpiIf_ChMode
  • cslpPolarity : IfxMsc_Msc_OutputControlConfig
  • csr : IfxFft_Fft_Job_s
  • csTrailDelay : SpiIf_ChMode
  • cts : IfxAsclin_Asc_Pins
  • ctsMode : IfxAsclin_Asc_Pins
  • currentFrameRequest : IfxHssl_Hssl_Channel
  • cursor : Ifx_Shell_CmdLine
  • cutOffFrequency : Ifx_LowPassPt1F32_Config
  • cycleCode : IfxEray_Header
  • cycleNumber : IfxEray_ReceivedHeader


iLLD_TC26B: Data Fields - Variables

- d -

  • data : Ifc_Crc_Table16 , Ifc_Crc_Table32 , Ifc_Crc_Table8 , Ifx_DataBufferMode_TimeStampSingle , Ifx_Shell_Command , IfxAsclin_Lin_Config , IfxAsclin_Spi_Job , IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame , IfxMultican_Message , IfxPsi5s_Psi5s_Frame , IfxSent_Sent_Frame , SpiIf_Job
  • dataBufferMode : IfxAsclin_Asc , IfxAsclin_Asc_Config
  • dataByteReflectionEnabled : IfxFce_Crc_CrcConfig
  • dataCoherent : IfxGtm_Tim_In
  • dataFrameExtensionPassivePhaseLength : IfxMsc_Msc_DownstreamControlExtensionConfig
  • dataFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • dataFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • dataFramePassivePhaseLength : IfxMsc_Msc_DownstreamControlConfig
  • dataHeading : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • dataLength : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_DataControl , IfxAsclin_Lin_PduType , IfxAsclin_Spi_Config
  • dataLengthError : IfxHssl_Hssl_errorFlags
  • dataLost : IfxGtm_Tim_In
  • dataPointer : IfxEray_Header
  • dataPtr : IfxAsclin_Lin_PduType
  • dataReceived : IfxEray_Eray_ReceiveControl
  • dataShift : IfxDsadc_Dsadc_FirFilterConfig
  • dataSize : IfxMtu_SramItem
  • dataTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • dataWidth : IfxAsclin_Spi , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • DB : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • DBE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • dc : IfxCif_Cam_JpegTable
  • DC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • DE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • deactivateSlso : IfxQspi_SpiMaster_Channel_s
  • deadtime : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • deadTimeValue : IfxCcu6_TPwm_Timer12
  • debugPathEnabled : IfxCif_Cam_Common
  • decimationFactor : IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • decodingCorrection : IfxEray_Eray_Gtu05Config
  • delay : IfxQspi_DelayConst
  • delayLength : IfxPsi5_Psi5_PulseGeneration
  • delta : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • demodulator : IfxDsadc_Dsadc_ChannelConfig
  • denominator : IfxAsclin_Lin_BaudrateGeneration
  • density : IfxCif_Cam_JfifHeader
  • densityX : IfxCif_Cam_JfifHeader
  • densityY : IfxCif_Cam_JfifHeader
  • description : Ifx_Shell_Syntax
  • descriptorMode : IfxEth , IfxEth_Config
  • destinationAddress : IfxDma_Dma_ChannelConfig
  • destinationAddressCircularRange : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • destinationAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • destinationCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • deviceAddress : IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • DIC : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • digitalFrequency : IfxVadc_Adc_Config
  • digitalGlitchFilterDepth : IfxSent_Sent_InputOutputControl
  • digitalInputFilterDepth : IfxPsi5_Psi5_InputOutputControl
  • din : IfxDsadc_Dsadc_ChannelPins
  • dinMode : IfxDsadc_Dsadc_ChannelPins
  • direction : Ifx_AngleTrkF32_PosIf , IfxAsclin_Lin_PduType , IfxGpt12_IncrEnc
  • disablePostCalibration : IfxVadc_Adc_GroupConfig
  • disableUpdate : IfxStdIf_Timer_
  • disableWatchdog : IfxScuWdt_Config
  • discardCount : IfxDsadc_Dsadc_IntegratorConfig
  • discardDmaChannel : IfxFft_Fft
  • discardDmaChannelId : IfxFft_Fft_Config
  • dividerMode : IfxMsc_Msc_Clock
  • dma : IfxDma_Dma , IfxDma_Dma_Channel , IfxDma_Dma_Config , IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • downscaling : IfxCif_Cam_Config
  • downstreamConfig : IfxMsc_Msc_Config
  • downstreamDataSourcesHigh : IfxMsc_Msc_DownstreamControlConfig
  • downstreamDataSourcesLow : IfxMsc_Msc_DownstreamControlConfig
  • downstreamExtensionConfig : IfxMsc_Msc_Config
  • downstreamExtensionDataSourcesHigh : IfxMsc_Msc_DownstreamControlExtensionConfig
  • downstreamExtensionDataSourcesLow : IfxMsc_Msc_DownstreamControlExtensionConfig
  • DP : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • driftErrorsDisabled : IfxSent_Sent_ReceiveControl
  • driver : IfxQspi_SpiMaster_Output , IfxSent_Sent_Channel , IfxSent_Sent_ChannelConfig , IfxStdIf_DPipe_ , IfxStdIf_Pos_ , IfxStdIf_PwmHl_ , IfxStdIf_Timer_ , SpiIf_ , SpiIf_Ch_ , SpiIf_ChConfig_
  • dsadc : IfxDsadc_Dsadc , IfxDsadc_Dsadc_Config , IfxDsadc_Rdc_Config
  • dsn : IfxDsadc_Dsadc_ChannelPins
  • dsnMode : IfxDsadc_Dsadc_ChannelPins
  • dsp : IfxDsadc_Dsadc_ChannelPins
  • dspMode : IfxDsadc_Dsadc_ChannelPins
  • dummyRxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dummyTxValue : IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig
  • dutyCycle : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • dynamicActionPoint : IfxEray_Eray_Gtu09Config
  • dynamicSlotCount : IfxEray_Eray_Gtu08Config
  • dynamicSlotLength : IfxEray_Eray_Gtu08Config


iLLD_TC26B: Data Fields - Variables

- e -

  • EC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • eccInvPos0 : IfxMtu_SramItem
  • eccInvPos1 : IfxMtu_SramItem
  • eccSize : IfxMtu_SramItem
  • echo : Ifx_Shell_Config , Ifx_Shell_Flags , Ifx_Shell_Runtime
  • echoError : Ifx_Shell_Flags
  • ED : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • edgeCount : IfxGtm_Tim_In
  • edgeCounterCleared : IfxSent_Sent_InputOutputControl
  • edgeCounterUpper : IfxGtm_Tim_In
  • elementSize : _Fifo
  • emem : IfxCif_Cam
  • emergencyEnabled : IfxStdIf_PwmHl_Config
  • emergencyStopEnableBits : IfxMsc_Msc_DownstreamControlConfig
  • emergencyStopEnabled : IfxSmu_configFsp
  • emergencyStopExtensionEnableBits : IfxMsc_Msc_DownstreamControlExtensionConfig
  • emuxInterface : IfxVadc_Adc_EmuxControl
  • emuxOutPinConfig : IfxVadc_Adc_EmuxControl
  • en0 : IfxMsc_Msc_Io
  • en1 : IfxMsc_Msc_Io
  • en2 : IfxMsc_Msc_Io
  • en3 : IfxMsc_Msc_Io
  • enable : IfxSent_Sent_EnabledInterrupts
  • enableAutomaticPasswordChange : IfxScuWdt_Config
  • enabled : Ifx_Shell_Flags , IfxCif_Cam_Downscaling , IfxDsadc_Dsadc_RectifierConfig , IfxDsadc_Rdc_Ts , IfxMultican_Can_InterruptSource , IfxStdIf_Timer_TrigConfig , SpiIf_ChMode
  • enabledInterrupt : IfxAsclin_Lin_InterruptConfig
  • enabledInterrupts : IfxFce_Crc_CrcConfig , IfxSent_Sent_ChannelConfig
  • enableFaultToRunStateTransition : IfxSmu_configFsp
  • enableSecureLock : IfxDts_Dts_Config
  • enableSmuRestriction : IfxScuWdt_Config
  • enableTimerCheck : IfxScuWdt_Config
  • enableTimerCheckTolerance : IfxScuWdt_Config
  • enableTransmit : IfxMultican_Can_GatewayConfig
  • end : IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow
  • endIndex : _Fifo
  • ENDIS_CTRL : IfxGtm_Tom_TGC
  • ENDIS_STAT : IfxGtm_Tom_TGC
  • endPulseIgnored : IfxSent_Sent_ReceiveControl
  • enhancedProtocolSelected : IfxPsi5_Psi5_TransmitControl
  • enhancedProtocolSelection : IfxPsi5s_Psi5s_TransmitControl
  • entry : IfxCif_Cam_TableInfo
  • ep : IfxCif_Cam_MemAreas
  • eray : IfxEray_Eray
  • erPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • error : IfxEth
  • errorChecks : SpiIf_Ch_ , SpiIf_ChConfig_
  • errorFlag0 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlag1 : IfxPsi5s_Psi5s_ReceivedBits
  • errorFlags : IfxAsclin_Asc , IfxAsclin_Asc_Config , IfxAsclin_Spi , IfxHssl_Hssl , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiSlave
  • errorFlagsStatus : IfxAsclin_Lin
  • errorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • errorThreshold : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • errorType : IfxFlash_ErrorTracking_Address
  • errorWarningLevel : IfxMultican_Can_NodeConfig
  • ES : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • escBracketNum : Ifx_Shell_Runtime
  • ethSfr : IfxEth , IfxEth_Config
  • event : IfxIom_Driver_LamConfig
  • eventGate : IfxDsadc_Dsadc_AuxFilterConfig
  • eventReader : _Fifo
  • eventSelect : IfxDsadc_Dsadc_AuxFilterConfig
  • eventWindow : IfxIom_Driver_LamConfig
  • eventWriter : _Fifo
  • exBreakDetected : IfxAsclin_Lin_EnabledInterrupts
  • exchange : SpiIf_funcs
  • exCollisionDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • execute : Ifx_Shell_Protocol
  • exFramingError : IfxAsclin_Lin_EnabledInterrupts
  • exHeaderTimeout : IfxAsclin_Lin_EnabledInterrupts
  • exLinAutobaudDetectionError : IfxAsclin_Lin_EnabledInterrupts
  • exLinChecksumError : IfxAsclin_Lin_EnabledInterrupts
  • exLinParityError : IfxAsclin_Lin_EnabledInterrupts
  • expect : IfxFft_Fft_Count64
  • expectedCrc : IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • expectTimeoutError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • exPriority : IfxAsclin_Lin_InterruptConfig
  • exReceiveFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • exResponseTimeout : IfxAsclin_Lin_EnabledInterrupts
  • ext : IfxEth_AltRxDescr0_Bits
  • extClockEnabled : IfxCcu6_Icu_Clock
  • extClockInput : IfxCcu6_Icu_Clock
  • extendedFrame : IfxMultican_Can_MsgObjControl
  • extendedSerialFrameMode : IfxSent_Sent_ReceiveControl
  • extension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • externalOffset : IfxEray_Eray_Gtu11Config
  • externalOffsetCorrection : IfxEray_Eray_Gtu11Config
  • externalRate : IfxEray_Eray_Gtu11Config
  • externalRateCorrection : IfxEray_Eray_Gtu11Config
  • externalSignalInjectionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • externalSignalInjectionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • externalTimeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • externalTrigger : IfxSent_Sent_InputOutputControl
  • externalTriggerSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5s_Psi5s_PulseGeneration
  • extInputTrigger : IfxCcu6_Icu_TriggerConfig
  • extInputTriggerMode : IfxCcu6_Icu_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • exTransmissionCompleted : IfxAsclin_Lin_EnabledInterrupts
  • exTransmitFIFOOverflow : IfxAsclin_Lin_EnabledInterrupts
  • extraPaths : IfxCif_Cam_Common


iLLD_TC26B: Data Fields - Variables

- f -

  • fallingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • fallingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • fastBaudrate : IfxMultican_Can_FdConfig
  • fastBitRate : IfxMultican_Can_MsgObjControl , IfxMultican_Message
  • fastClock : IfxPsi5_Psi5_Config
  • fastNode : IfxMultican_Can_Node
  • fastSamplePoint : IfxMultican_Can_FdConfig
  • fastSynchJumpWidth : IfxMultican_Can_FdConfig
  • faultFreeStateFrequencyMax : IfxSmu_configFsp
  • faultFreeStateFrequencyMin : IfxSmu_configFsp
  • faultStateTime : IfxSmu_configFsp
  • fce : IfxFce_Crc , IfxFce_Crc_Config , IfxFce_Crc_Crc , IfxFce_Crc_CrcConfig
  • fclClockControl : IfxMsc_Msc_OutputControlConfig
  • fcln : IfxMsc_Msc_Io
  • fclp : IfxMsc_Msc_Io
  • fclpPolarity : IfxMsc_Msc_OutputControlConfig
  • fdConfig : IfxMultican_Can_NodeConfig
  • FF : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • fft : IfxFft_Fft , IfxFft_Fft_Config , IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • fftLength : IfxFft_Fft_JobConfig
  • fifo : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • fifoBufferStartIndex : IfxEray_Eray_MessageRAMConfig
  • fifoConfigured : IfxEray_Eray_MessageRAMConfig
  • fifoDepth : IfxEray_Eray_MessageRAMConfig
  • fifoNullFramesRejected : IfxEray_Eray_MessageRAMConfig
  • fifoPointer : IfxMultican_Can_MsgObj
  • fifoWarningLevel : IfxPsi5_Psi5_ReceiveControl
  • filter : IfxGtm_Tim_In_Config , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • filterDepth : IfxAsclin_Lin_BitSamplingControl
  • filteredCycleNumber : IfxEray_Eray_MessageRAMConfig
  • fir0Enabled : IfxDsadc_Dsadc_FirFilterConfig
  • fir1Enabled : IfxDsadc_Dsadc_FirFilterConfig
  • firFilter : IfxDsadc_Dsadc_ChannelConfig
  • firstDynamicBuffer : IfxEray_Eray_MessageRAMConfig
  • firstSlaveObjId : IfxMultican_Can_MsgObjConfig
  • firstWrite : IfxQspi_SpiMaster_Channel_s
  • FL : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • flags : IfxAsclin_Asc_ErrorFlagsUnion , IfxAsclin_Lin_FrameDataControl , IfxFft_Fft , SpiIf_Ch_
  • flashFconWaitStateConfig : IfxScuCcu_Config
  • flexibleDataRate : IfxMultican_Can_NodeConfig
  • flushQueueAfterInit : IfxVadc_Adc_QueueConfig
  • flushTx : IfxStdIf_DPipe_
  • fracDiv : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • fractionalDividerEnabled : IfxPsi5s_Psi5s_AscConfig
  • frame : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxMultican_Can_MsgObjConfig , IfxPsi5_Psi5_Frame
  • frameCheckMode : IfxSent_Sent_ReceiveControl
  • frameCounterInterrupt : IfxMultican_Can_NodeConfig
  • frameError : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • frameExpectation : IfxPsi5_Psi5_ReceiveControl
  • frameId : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5s_Psi5s_ReceivedBits
  • frameIdFilter : IfxEray_Eray_MessageRAMConfig
  • frameIdSelect : IfxPsi5s_Psi5s_ReceiveControl
  • frameLength : IfxSent_Sent_ReceiveControl
  • frameMode : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config
  • frameTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • framingCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • framingErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • frequency : Icu_Config , Icu_s , IfxCcu6_Icu_Config , IfxDsadc_Dsadc_CarrierGenConfig , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxStdIf_Timer_Config , TPwm_Config , TPwm_s
  • frequencyDriftErrorInterrupt : IfxSent_Sent_Enable
  • frequencyRangeErrorInterrupt : IfxSent_Sent_Enable
  • FS : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr1_Bits
  • FT : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • functions : SpiIf_
  • FUPD_CTRL : IfxGtm_Tom_TGC


iLLD_TC26B: Data Fields - Variables

- g -

  • gain : Ifx_LowPassPt1F32_Config , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item
  • gatewayConfig : IfxMultican_Can_MsgObjConfig
  • gatewayDstObjId : IfxMultican_Can_GatewayConfig
  • gatewayTransfers : IfxMultican_Can_MsgObjConfig
  • gatingMode : IfxVadc_Adc_GatingTriggerConfig
  • gatingSource : IfxVadc_Adc_GatingTriggerConfig
  • getAbsolutePosition : IfxStdIf_Pos_
  • getDeadtime : IfxStdIf_PwmHl_
  • getDirection : IfxStdIf_Pos_
  • getFault : IfxStdIf_Pos_
  • getFrequency : IfxStdIf_Timer_
  • getInputFrequency : IfxStdIf_Timer_
  • getMinPulse : IfxStdIf_PwmHl_
  • getMode : IfxStdIf_PwmHl_
  • getOffset : IfxStdIf_Pos_
  • getPeriod : IfxStdIf_Timer_
  • getPeriodPerRotation : IfxStdIf_Pos_
  • getPosition : IfxStdIf_Pos_
  • getRawPosition : IfxStdIf_Pos_
  • getReadCount : IfxStdIf_DPipe_
  • getReadEvent : IfxStdIf_DPipe_
  • getRefreshPeriod : IfxStdIf_Pos_
  • getResolution : IfxStdIf_Pos_ , IfxStdIf_Timer_
  • getSendCount : IfxStdIf_DPipe_
  • getSensorType : IfxStdIf_Pos_
  • getSpeed : IfxStdIf_Pos_
  • getStatus : SpiIf_funcs
  • getTimeStamp : Icu_Functions
  • getTrigger : IfxStdIf_Timer_
  • getTurn : IfxStdIf_Pos_
  • getTxTimeStamp : IfxStdIf_DPipe_
  • getWriteCount : IfxStdIf_DPipe_
  • getWriteEvent : IfxStdIf_DPipe_
  • GLB_CTRL : IfxGtm_Tom_TGC
  • glitch : IfxGtm_Tim_In
  • glitchFallingCleared : IfxSent_Sent_InputOutputControl
  • glitchRisingCleared : IfxSent_Sent_InputOutputControl
  • globalControlConfig : IfxPsi5s_Psi5s_Config
  • globalInputClass : IfxVadc_Adc_Config
  • globalResultUsage : IfxVadc_Adc_ChannelConfig
  • group : IfxVadc_Adc_Channel , IfxVadc_Adc_ChannelConfig , IfxVadc_Adc_Group
  • groupDelay : IfxDsadc_Rdc
  • groupId : IfxVadc_Adc_EmuxControl , IfxVadc_Adc_Group , IfxVadc_Adc_GroupConfig , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • gtm : IfxDsadc_Rdc_GtmTimestamp , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • gtmTimestamp : IfxDsadc_Rdc_ConfigHw
  • gtu01Config : IfxEray_Eray_GTUConfig
  • gtu02Config : IfxEray_Eray_GTUConfig
  • gtu03Config : IfxEray_Eray_GTUConfig
  • gtu04Config : IfxEray_Eray_GTUConfig
  • gtu05Config : IfxEray_Eray_GTUConfig
  • gtu06Config : IfxEray_Eray_GTUConfig
  • gtu07Config : IfxEray_Eray_GTUConfig
  • gtu08Config : IfxEray_Eray_GTUConfig
  • gtu09Config : IfxEray_Eray_GTUConfig
  • gtu10Config : IfxEray_Eray_GTUConfig
  • gtu11Config : IfxEray_Eray_GTUConfig
  • gtuConfig : IfxEray_Eray_ControllerConfig


iLLD_TC26B: Data Fields - Variables

- h -

  • halfTs : Ifx_AngleTrkF32
  • hallPatternIndex : IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config
  • hallSyncEvent : IfxCcu6_PwmBc_Config
  • hardware : IfxDsadc_Rdc , IfxDsadc_Rdc_Config
  • hardwareRequestEnabled : IfxDma_Dma_ChannelConfig
  • header : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig , IfxEray_Eray_ReceivedFrame
  • headerCrc : IfxEray_ReceivedHeader
  • headerErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • headerErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • headerID : IfxAsclin_Lin_FrameDataControl
  • headerOnly : IfxAsclin_Lin_DataControl
  • headerReceived : IfxEray_Eray_ReceiveControl
  • headerTimeout : IfxAsclin_Lin_ErrorFlags , IfxAsclin_Lin_LinControl
  • headerTransfered : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • help : Ifx_Shell_Command
  • hFactor : IfxCif_Cam_Downscaling
  • highPhaseOfShiftClock : IfxMsc_Msc_Abra
  • highSpeedMode : IfxHssl_Hsct_Config
  • highWord : IfxPsi5_Psi5_Rdm
  • historyAdd : Ifx_Shell_CmdLine
  • historyItem : Ifx_Shell_CmdLine
  • hMode : IfxCif_Cam_Downscaling
  • hOffset : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • hookFunction : IfxScuCcu_PllStepsConfig
  • hours : Ifx_DateTime
  • hsct : IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • hSize : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • hssl : IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig , IfxHssl_Hssl_Config
  • hSyncPolarity : IfxCif_Cam_Config


iLLD_TC26B: Data Fields - Variables

- i -

  • i2c : IfxI2c_I2c , IfxI2c_I2c_Config , IfxI2c_I2c_Device , IfxI2c_I2c_deviceConfig
  • ibusyIsrProvider : IfxEray_Eray_Interrupt
  • ibusyPriority : IfxEray_Eray_Interrupt
  • IC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • id : IfxMultican_Message
  • ident : IfxCif_Cam_JfifHeader
  • idleDelay : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • idleDynamicSlots : IfxEray_Eray_Gtu09Config
  • idleTime : IfxPsi5s_Psi5s_GlobalControlConfig
  • IHE : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • ik : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • imag : cfloat32 , cfract , csfract , csint16 , csint32
  • image : IfxCif_Cam_MemInfo
  • immediateStartEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • in : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • index : Ifx_CircularBuffer , IfxModule_IndexMap
  • inhibitingAutomaticTransferEnabled : IfxPsi5_Psi5_TransmitControl
  • initPins : IfxGpt12_IncrEnc_Config , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_Timer_Config
  • inj0 : IfxMsc_Msc_Io
  • inj1 : IfxMsc_Msc_Io
  • injectionPositionPin0 : IfxMsc_Msc_DownstreamControlConfig
  • injectionPositionPin1 : IfxMsc_Msc_DownstreamControlConfig
  • inMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • input : IfxFft_Fft_Count64 , IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig , IfxQspi_SpiMaster_InputOutput
  • inputbuffer : Ifx_Shell_Runtime
  • inputClass : IfxVadc_Adc_ChannelConfig , IfxVadc_Adc_GroupConfig
  • inputConfig : IfxDsadc_Rdc_ConfigHw
  • inputCos : IfxDsadc_Rdc_ConfigHw , IfxDsadc_Rdc_Hw
  • inputDataSource : IfxDsadc_Dsadc_DemodulatorConfig
  • inputDmaChannel : IfxFft_Fft
  • inputDmaChannelId : IfxFft_Fft_Config
  • inputFormat : IfxFft_Fft_JobConfig
  • inputFrequency : IfxScuWdt_Config
  • inputGain : IfxDsadc_Dsadc_ModulatorConfig
  • inputIdx : IfxFft_Fft
  • inputInterface : IfxCif_Cam_Common
  • inputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • inputLength : IfxFft_Fft_JobConfig
  • inputMode : IfxCcu6_PwmBc_Pins
  • inputOutput : IfxAsclin_Spi_Config
  • inputOutputControl : IfxPsi5_Psi5_ChannelConfig , IfxSent_Sent_ChannelConfig
  • inputPin : IfxDsadc_Dsadc_ModulatorConfig , IfxGtm_Tim_In_ConfigFilter
  • inputPinMode : IfxGtm_Tim_In_ConfigFilter
  • inputPriority : IfxFft_Fft_Config
  • inputPtr : IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • inputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • inputSin : IfxDsadc_Rdc_ConfigHw , IfxDsadc_Rdc_Hw
  • inSeconds : IfxDsadc_Rdc_Ts
  • inSelect : IfxEth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • instruction : IfxCpu_Perf
  • instructionErrors : IfxCpu_Trap_Id
  • int0IsrProvider : IfxEray_Eray_Interrupt
  • int0Priority : IfxEray_Eray_Interrupt
  • int1IsrProvider : IfxEray_Eray_Interrupt
  • int1Priority : IfxEray_Eray_Interrupt
  • INT_TRIG : IfxGtm_Tom_TGC
  • integrationCount : IfxDsadc_Dsadc_IntegratorConfig
  • integrationCycles : IfxDsadc_Dsadc_IntegratorConfig
  • integrationTrigger : IfxDsadc_Dsadc_DemodulatorConfig
  • integrator : IfxDsadc_Dsadc_ChannelConfig
  • interfaceMode : IfxHssl_Hsct_Config
  • internalProtection : IfxCpu_Trap_Id
  • internalShift : IfxDsadc_Dsadc_FirFilterConfig
  • interrupt : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxEray_Eray_Config , IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config , IfxSent_Sent_ChannelConfig
  • interrupt1 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt2 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt3 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interrupt4 : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • interruptConfig : IfxMsc_Msc_Config
  • interruptRaiseThreshold : IfxDma_Dma_ChannelConfig
  • interuptNodeControl : IfxSent_Sent_ChannelConfig
  • inTicks : IfxDsadc_Rdc_Ts
  • intraIdx : IfxFft_Fft
  • intraPriority : IfxFft_Fft_Config
  • inverted : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxDsadc_Dsadc_CarrierGenConfig , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamEventWindowConfig , IfxIom_Driver_LamMonConfig , IfxIom_Driver_LamRefConfig
  • inWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • io : Ifx_Shell , IfxMsc_Msc_Config
  • iomDriver : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig
  • IPC : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • irqMode : IfxGtm_Tim_In_Config
  • irqModeTimer : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqModeTrigger : IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • irqOnCntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnDatalost : IfxGtm_Tim_In_ConfigCapture
  • irqOnEcntOverflow : IfxGtm_Tim_In_ConfigCapture
  • irqOnGlitch : IfxGtm_Tim_In_ConfigFilter
  • irqOnNewVal : IfxGtm_Tim_In_ConfigCapture
  • irqOnTimeout : IfxGtm_Tim_In_ConfigTimeout
  • isInterruptMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • ispBpp : IfxCif_Cam
  • ispIn : IfxCif_Cam_Common
  • ispInterrupt : IfxCif_Cam_Common
  • ispMode : IfxCif_Cam , IfxCif_Cam_Config
  • ispRawBpp : IfxCif_Cam_Config
  • isrCount : IfxEth
  • isrPriority : IfxDts_Dts_Config , IfxEth_Config , IfxFce_Crc_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig
  • isrProvider : IfxEth_Config , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Tim_In_Config , IfxGtm_Tom_Pwm_Interrupt , IfxSent_Sent_Interrupt , IfxStdIf_Timer_Config , IfxStdIf_Timer_TrigConfig , SpiIf_Config
  • isrRxCount : IfxEth
  • isrTxCount : IfxEth
  • isrTypeOfService : IfxDts_Dts_Config , IfxFce_Crc_Config
  • items : IfxEth_RxDescrList , IfxEth_TxDescrList
  • itr : IfxDsadc_Dsadc_ChannelPins
  • itrMode : IfxDsadc_Dsadc_ChannelPins


iLLD_TC26B: Data Fields - Variables

- j -

  • jfif : IfxCif_Cam
  • job : IfxFft_Fft
  • jpegEnabled : IfxCif_Cam_Common
  • jpegTables : IfxCif_Cam_Common
  • JT : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits


iLLD_TC26B: Data Fields - Variables

- k -

  • k2Initial : IfxScuCcu_InitialStepConfig
  • k2Step : IfxScuCcu_PllStepsConfig
  • kd : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • ki : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • kp : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config


iLLD_TC26B: Data Fields - Variables

- l -

  • lamUsedMask : IfxIom_Driver
  • lastErrorCodeInterrupt : IfxMultican_Can_NodeConfig
  • latestTransmissionStart : IfxEray_Eray_ControllerConfig
  • LC : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • LE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • leadDelay : IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • length : Ifx_CircularBuffer , Ifx_Shell_CmdLine , IfxCif_Cam_JfifHeader , IfxCif_Cam_TableInfo
  • lengthCode : IfxMultican_Message
  • lengthError : IfxFce_Crc_EnabledInterrupts
  • limitCheck : IfxVadc_Adc_ChannelConfig
  • lin : IfxAsclin_Lin_Config
  • linAutobaudDetectionError : IfxAsclin_Lin_ErrorFlags
  • linChecksumError : IfxAsclin_Lin_ErrorFlags
  • linFrameData : IfxAsclin_Lin
  • linMode : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • linParityError : IfxAsclin_Lin_ErrorFlags
  • listenTimeOut : IfxEray_Eray_Succ2Config
  • listenTimeOutNoise : IfxEray_Eray_Succ2Config
  • lmu : IfxFft_Fft , IfxFft_Fft_Config
  • LOC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • locals : Ifx_Shell
  • loopBack : IfxAsclin_Asc_Config , IfxAsclin_Spi_InputOutputControl , IfxHssl_Hsct , IfxHssl_Hsct_Config , IfxHssl_Hssl , IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • loopback : SpiIf_ChMode
  • loopbackEnabled : IfxPsi5s_Psi5s_AscConfig
  • loopBackMode : IfxMultican_Can_NodeConfig
  • loopDelayOffset : IfxMultican_Can_FdConfig
  • lowerBoundary : IfxVadc_Adc_ChannelConfig
  • lowerLimit : IfxAsclin_Lin_BaudrateDetection
  • lowerTemperatureLimit : IfxDts_Dts_Config
  • lowPhaseOfShiftClock : IfxMsc_Msc_Abra
  • lowPowerSupply : IfxDsadc_Dsadc_Config
  • lowWord : IfxPsi5_Psi5_Rdm
  • LS : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr1_Bits


iLLD_TC26B: Data Fields - Variables

- m -

  • macAddress : IfxEth_Config
  • macroticksPerCycle : IfxEray_Eray_Gtu02Config
  • mainPath : IfxCif_Cam_Common
  • mask : Ifx_InternalMux_MuxConfig , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • masks : IfxPort_Esr_Masks
  • master : IfxVadc_Adc_GroupConfig
  • matchingId : IfxMultican_Can_MsgObjControl
  • maxColdStartAttempts : IfxEray_Eray_Succ1Config
  • maxcount : Ifx_Fifo_Shared
  • maxDriftOffset : IfxEray_Eray_Gtu06Config
  • maximumBaudrate : IfxQspi_SpiMaster , SpiIf_Config
  • maxOffsetCorrection : IfxEray_Eray_Gtu10Config
  • maxPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base
  • maxRateCorrection : IfxEray_Eray_Gtu10Config
  • maxSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • maxSyncFrames : IfxEray_Eray_Gtu02Config
  • maxTicks : IfxDsadc_Rdc_Ts
  • mbistDelay : IfxMtu_SramItem
  • mbsc0IsrProvider : IfxEray_Eray_Interrupt
  • mbsc0Priority : IfxEray_Eray_Interrupt
  • mbsc1IsrProvider : IfxEray_Eray_Interrupt
  • mbsc1Priority : IfxEray_Eray_Interrupt
  • mcan : IfxMultican_Can , IfxMultican_Can_Node
  • mdc : IfxEth_MiiPins , IfxEth_RmiiPins
  • mdio : IfxEth_MiiPins , IfxEth_RmiiPins
  • measured : IfxAsclin_Lin_BaudrateDetection
  • medianFilter : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl , IfxAsclin_Spi_BitSamplingControl
  • memAreas : IfxCif_Cam
  • memFactor : IfxCif_Cam_MemConfig
  • memoryAccessViolation : IfxHssl_Hssl_errorFlags
  • memoryManagement : IfxCpu_Trap_Id
  • message : IfxPsi5_Psi5_SerialMessage
  • messageId : IfxMultican_Can_MsgObjConfig , IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • messageLen : IfxMultican_Can_MsgObjControl
  • messageRAMConfig : IfxEray_Eray_NodeConfig
  • messagingBitsError : IfxPsi5_Psi5_FrameData
  • messagingBitsPresence : IfxPsi5_Psi5_ReceiveControl
  • microticksPerCycle : IfxEray_Eray_Gtu01Config
  • miiPins : IfxEth_Config
  • minPulse : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_Config
  • minResolution : IfxStdIf_Timer_Config
  • minSpeed : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • minutes : Ifx_DateTime
  • mode : IfxCcu6_PwmHl_Base , IfxCcu6_PwmHl_Mode , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Pwm_Driver , IfxGtm_Atom_Pwm_Interrupt , IfxGtm_Atom_PwmHl_Base , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Tim_In_ConfigCapture , IfxGtm_Tom_Pwm_Interrupt , IfxGtm_Tom_PwmHl_Base , IfxGtm_Tom_PwmHl_Mode , IfxIom_Driver_LamFilterConfig , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock , IfxQspi_SpiMaster_Channel_s , IfxQspi_SpiMaster_ChannelConfig , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxSmu_configFsp , IfxVadc_Adc_EmuxControl , SpiIf_ChConfig_ , SpiIf_Config
  • modulator : IfxDsadc_Dsadc_ChannelConfig
  • modulatorClockFreq : IfxDsadc_Dsadc_ModulatorConfig
  • modulatorClockSelect : IfxDsadc_Dsadc_Config
  • module : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxCif_Clk_In , IfxCif_D_In , IfxCif_Hsnc_In , IfxCif_Vsnc_In , IfxDma_Dma_ChannelConfig , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsadc_Channel , IfxDsadc_Dsadc_ChannelConfig , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Eray_Config , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Mdio_InOut , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_IncrEnc , IfxGpt12_IncrEnc_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Clk_Out , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxIom_Driver , IfxIom_Driver_Config , IfxModule_IndexMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Can_Config , IfxMultican_Can_NodeConfig , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPsi5_Psi5_Channel , IfxPsi5_Psi5_ChannelConfig , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Psi5s_Channel , IfxPsi5s_Psi5s_ChannelConfig , IfxPsi5s_Psi5s_Config , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Hwcfg_In , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_Config , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Adc_Group , IfxVadc_Adc_GroupConfig , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • moduleFreq : IfxMultican_Can_Config
  • moduleFrequency : IfxVadc_Adc_Config
  • mon : IfxIom_Driver_LamConfig
  • monIndex : IfxIom_Driver_Lam
  • monInput : IfxIom_Driver_Lam
  • moveSize : IfxDma_Dma_ChannelConfig
  • mrst : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mrstMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • msc : IfxMsc_Msc , IfxMsc_Msc_Config
  • msgObjCount : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig
  • msgObjId : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig
  • mtsr : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • mtsrMode : IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • multiChannelControl : IfxCcu6_PwmBc_Config
  • multiInputCaptureEnabled : IfxCcu6_Icu_ChannelConfig
  • muxConfig : Ifx_InternalMux_Config


iLLD_TC26B: Data Fields - Variables

- n -

  • name : Ifx_GlobalResources_Item
  • NC : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • ndat0IsrProvider : IfxEray_Eray_Interrupt
  • ndat0Priority : IfxEray_Eray_Interrupt
  • ndat1IsrProvider : IfxEray_Eray_Interrupt
  • ndat1Priority : IfxEray_Eray_Interrupt
  • nDivider : IfxScuCcu_InitialStepConfig
  • nDividerAbra : IfxMsc_Msc_Abra
  • nDividerDownstream : IfxMsc_Msc_DownstreamControlExtensionConfig
  • negativeInput : IfxDsadc_Dsadc_ModulatorConfig
  • networkStartIdleTime : IfxEray_Eray_Gtu04Config
  • networkVectorLength : IfxEray_Eray_ControllerConfig
  • newData : IfxGtm_Tim_In
  • nextFreeAddress : IfxCif_Cam
  • nextJob : IfxFft_Fft_Job_s
  • nibbleControl : IfxSent_Sent_ChannelConfig
  • nibblePointer0 : IfxSent_Sent_NibbleControl
  • nibblePointer1 : IfxSent_Sent_NibbleControl
  • nibblePointer2 : IfxSent_Sent_NibbleControl
  • nibblePointer3 : IfxSent_Sent_NibbleControl
  • nibblePointer4 : IfxSent_Sent_NibbleControl
  • nibblePointer5 : IfxSent_Sent_NibbleControl
  • nibblePointer6 : IfxSent_Sent_NibbleControl
  • nibblePointer7 : IfxSent_Sent_NibbleControl
  • nibblesValueOutOfRangeErrorInterrupt : IfxSent_Sent_Enable
  • nibblesWrongErrorInterrupt : IfxSent_Sent_Enable
  • node : IfxMultican_Can_MsgObj , IfxMultican_Can_MsgObjConfig , IfxMultican_Can_Node
  • nodeAPins : IfxEray_Eray_Pins
  • nodeBPins : IfxEray_Eray_Pins
  • nodeId : IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxMultican_Can_Node , IfxMultican_Can_NodeConfig , IfxMultican_Rxd_In , IfxMultican_Txd_Out
  • nodePointer : IfxMultican_Can_Config
  • noFrameReceivedError : IfxPsi5_Psi5_FrameData
  • noiseFilter : PwmHl_Config
  • nominalBaudrate : IfxMultican_Can_FdConfig
  • nominalSamplePoint : IfxMultican_Can_FdConfig
  • nominalSynchJumpWidth : IfxMultican_Can_FdConfig
  • nonMaskableInterrupt : IfxCpu_Trap_Id
  • notAcknowledgeError : IfxHssl_Hssl_errorFlags
  • nullFrameIndicator : IfxEray_ReceivedHeader
  • numberOfBitsError : IfxPsi5_Psi5_FrameData
  • numberOfCyclePairsForActive : IfxEray_Eray_Succ1Config
  • numberOfFramesExpected : IfxPsi5s_Psi5s_ReceiveControl
  • numberOfMessageBuffers : IfxEray_Eray_MessageRAMConfig
  • numBlocks : IfxMtu_SramItem
  • numerator : IfxAsclin_Lin_BaudrateGeneration
  • numOfPllDividerSteps : IfxScuCcu_SysPllConfig


iLLD_TC26B: Data Fields - Variables

- o -

  • object : Ifx_Shell_Protocol
  • obusyIsrProvider : IfxEray_Eray_Interrupt
  • obusyPriority : IfxEray_Eray_Interrupt
  • OE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • offset : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , Ifx_LutIndexedLinearF32_Item , Ifx_LutLinearF32_Item , IfxDsadc_Rdc_Config , IfxGpt12_IncrEnc , IfxGtm_Atom_Timer , IfxGtm_Tom_Timer , IfxStdIf_Pos_Config
  • offsetCompensation : IfxDsadc_Dsadc_FirFilterConfig
  • onError : IfxStdIf_DPipe_ , SpiIf_funcs
  • oneShotModeEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • onEventA : IfxStdIf_Pos_
  • onExchangeEnd : SpiIf_Ch_
  • onReceive : IfxStdIf_DPipe_
  • onRx : SpiIf_funcs
  • onStart : Ifx_Shell_Protocol
  • onStartData : Ifx_Shell_Protocol
  • onTransfer : IfxQspi_SpiSlave , SpiIf_Flags
  • onTransmit : IfxStdIf_DPipe_
  • onTx : SpiIf_funcs
  • onZeroIrq : IfxStdIf_Pos_
  • operation : IfxFft_Fft_JobConfig
  • operationMode : IfxDma_Dma_ChannelConfig
  • order : Ifc_Crc_Table
  • out : Ifx_LowPassPt1F32 , IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • OUTEN_CTRL : IfxGtm_Tom_TGC
  • OUTEN_STAT : IfxGtm_Tom_TGC
  • outMode : IfxPsi5_Psi5_PinsConfig , IfxSent_Sent_Pins
  • output : IfxFft_Fft_Count64 , IfxQspi_SpiMaster_InputOutput
  • outputClock : IfxDsadc_Rdc_ConfigHw
  • outputControlConfig : IfxMsc_Msc_Config
  • outputDmaChannel : IfxFft_Fft
  • outputDmaChannelId : IfxFft_Fft_Config
  • outputDriver : IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig
  • outputEnabled : IfxStdIf_Timer_TrigConfig
  • outputFormat : IfxFft_Fft_JobConfig
  • outputInverterEnabled : IfxPsi5_Psi5_InputOutputControl
  • outputLength : IfxFft_Fft_JobConfig
  • outputLine : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputMode : IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxStdIf_PwmHl_Config , IfxStdIf_Timer_TrigConfig , IfxVadc_Adc_EmuxPinConfig
  • outputPin : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin
  • outputPriority : IfxFft_Fft_Config
  • outputPtr : IfxFft_Fft_Job_s , IfxFft_Fft_JobConfig
  • outputPulsePolarityHigh : IfxSent_Sent_InputOutputControl
  • outputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outputTriggerEnabled : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • outSelect : IfxEth_Mdio_InOut , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut
  • outWidth : IfxAsclin_Asc_FifoControl , IfxAsclin_Lin_FifoControl , IfxAsclin_Spi_FifoControl
  • overflowCnt : IfxGtm_Tim_In
  • overflowInterrupt : IfxMsc_Msc_InterruptConfig
  • overflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • overlfow : IfxCpu_Counter
  • overrunCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • overrunErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • oversampling : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • OWN : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits


iLLD_TC26B: Data Fields - Variables

- p -

  • packetFrameCount : IfxPsi5s_Psi5s_ReceivedBits , IfxPsi5s_Psi5s_ReceivedData , IfxPsi5s_Psi5s_Timestamp
  • padDriver : IfxGtm_Atom_Pwm_pin , IfxGtm_Tom_Pwm_pin , IfxI2c_Pins , IfxPort_Io_ConfigPin , IfxPort_Pin_Config , IfxVadc_Adc_EmuxPinConfig
  • parity : IfxMsc_Msc_UpstreamStatusConfig
  • parityBit : IfxAsclin_Asc_FrameControl
  • parityCheck : SpiIf_ChMode
  • parityCheckEnabled : IfxPsi5s_Psi5s_AscConfig
  • parityEnable : IfxAsclin_Lin_FrameControl
  • parityError : IfxAsclin_Asc_ErrorFlags , IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • parityErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • parityMode : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • parityType : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl
  • passiveTimeFrameCount : IfxMsc_Msc_DownstreamControlConfig
  • password : IfxScuWdt_Config
  • pattern : IfxDma_Dma_ChannelConfig
  • pause : TPwm_Functions
  • pauseOnBaudrateSpikeErrors : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • pauseRunTransition : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • payloadLength : IfxEray_Header , IfxEray_ReceivedHeader , IfxPsi5_Psi5_ReceiveControl , IfxPsi5_Psi5_TransmitControl , IfxPsi5s_Psi5s_ReceiveControl , IfxPsi5s_Psi5s_TransmitControl
  • payloadPreambleIndicator : IfxEray_ReceivedHeader
  • PCE : IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • pDivider : IfxScuCcu_InitialStepConfig
  • pending : IfxAsclin_Spi_Job
  • period : IfxCcu6_Icu_Config , IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base , TPwm_Config , TPwm_s
  • periodicOrExternal : IfxPsi5s_Psi5s_PulseGeneration
  • periodicOrExternalOrBypass : IfxPsi5_Psi5_PulseGeneration
  • periodPerRotation : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxStdIf_Pos_Config
  • periodTick : IfxGtm_Tim_In
  • phase : Spi_ErrorChecks
  • phaseDelay : PwmHl_Config
  • phyInit : IfxEth_Config
  • phyInterfaceMode : IfxEth_Config
  • phyLink : IfxEth_Config
  • pid : IfxAsclin_Lin_PduType
  • pin : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxCif_Clk_In , IfxCif_D_In , IfxCif_Hsnc_In , IfxCif_Vsnc_In , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Mdio_InOut , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_Pwm_Config , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_ToutMap , IfxI2c_Scl_InOut , IfxI2c_Sda_InOut , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Msc_en , IfxMsc_Msc_fcln , IfxMsc_Msc_fclp , IfxMsc_Msc_inj0 , IfxMsc_Msc_inj1 , IfxMsc_Msc_sdi , IfxMsc_Msc_son , IfxMsc_Msc_sop , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPort_Io_ConfigPin , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxQspi_SpiMaster_Input , IfxQspi_SpiMaster_Output , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Hwcfg_In , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out , IfxVadc_Vadcg_In
  • pinA : IfxGpt12_IncrEnc_Config
  • pinB : IfxGpt12_IncrEnc_Config
  • pinDriver : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_TPwm_Pins , IfxDsadc_Dsadc_CarrierGenConfig , IfxDsadc_Dsadc_ChannelPins , IfxEray_Eray_NodeA , IfxEray_Eray_NodeB , IfxGpt12_IncrEnc_Config , IfxMsc_Msc_Io , IfxMultican_Can_NodeConfig , IfxPsi5_Psi5_PinsConfig , IfxPsi5s_Psi5s_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins , IfxSent_Sent_Pins
  • pinIndex : IfxPort_Pin , IfxPort_Pin_Config
  • pinMode : IfxDsadc_Dsadc_CarrierGenConfig , IfxGpt12_IncrEnc_Config
  • pinNeg : IfxDsadc_Dsadc_CarrierGenConfig
  • pinPos : IfxDsadc_Dsadc_CarrierGenConfig
  • pins : IfxAsclin_Asc_Config , IfxAsclin_Lin_Config , IfxAsclin_Spi_Config , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config , IfxEray_Eray_NodeConfig , IfxI2c_I2c_Config , IfxPsi5s_Psi5s_Config , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config , IfxSent_Sent_ChannelConfig , IfxVadc_Adc_EmuxPinConfig
  • pinsConfig : IfxPsi5_Psi5_ChannelConfig
  • pinTable : IfxPort_Io_Config
  • pinZ : IfxGpt12_IncrEnc_Config
  • pllDividerStep : IfxScuCcu_SysPllConfig
  • pllInitialStep : IfxScuCcu_ErayPllConfig , IfxScuCcu_SysPllConfig
  • polynom : Ifc_Crc_Table
  • port : IfxPort_Esr_Masks , IfxPort_Pin , IfxPort_Pin_Config
  • positionConst : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • positiveInput : IfxDsadc_Dsadc_ModulatorConfig
  • pre : IfxQspi_DelayConst
  • preDivider : IfxHssl_Hssl_Config
  • prescaler : IfxAsclin_Asc_BaudRate , IfxAsclin_Lin_BitTimingControl , IfxAsclin_Spi_Baudrate
  • prescalerFactor : IfxIom_Driver_LamFilterConfig
  • priority : Ifx_IsrSetting , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxMultican_Can_InterruptConfig , IfxMultican_Can_MsgObjConfig , IfxSent_Sent_Interrupt
  • protocol : Ifx_Shell , Ifx_Shell_Config , IfxQspi_SpiSlave_Config
  • provider : Ifx_IsrSetting
  • prtc1Control : IfxEray_Eray_ControllerConfig
  • prtc2Control : IfxEray_Eray_ControllerConfig
  • pRxDescr : IfxEth
  • psi5 : IfxPsi5_Psi5 , IfxPsi5_Psi5_Config
  • psi5s : IfxPsi5s_Psi5s
  • pTxDescr : IfxEth
  • pulseDelayLength : IfxSent_Sent_TransmitControl
  • pulseGeneration : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • pulseLength : IfxPsi5_Psi5_PulseGeneration , IfxSent_Sent_TransmitControl
  • pulseLengthTick : IfxGtm_Tim_In
  • pulseTimestampSelect : IfxPsi5_Psi5_ReceiveControl
  • pwm : IfxDsadc_Rdc_Ts
  • pwmTim : IfxDsadc_Rdc_GtmTimestamp
  • pwmTimCh : IfxDsadc_Rdc_Hw


iLLD_TC26B: Data Fields - Variables

- q -

  • q : IfxCif_Cam_JpegTable
  • qspi : IfxQspi_SpiMaster , IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave , IfxQspi_SpiSlave_Config
  • queueRequest : IfxVadc_Adc_GroupConfig


iLLD_TC26B: Data Fields - Variables

- r -

  • rawPosition : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • RBS1 : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • RBS2 : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • RCH : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • rdc : IfxDsadc_Rdc_Ts
  • rdcTim : IfxDsadc_Rdc_GtmTimestamp
  • rdcTimCh : IfxDsadc_Rdc_Hw
  • rdcTimChannel : IfxDsadc_Rdc_GtmTimestamp
  • rdcTimMuxValue : IfxDsadc_Rdc_GtmTimestamp
  • RDES0 : IfxEth_RxDescr
  • RDES1 : IfxEth_RxDescr
  • RDES2 : IfxEth_RxDescr
  • RDES3 : IfxEth_RxDescr
  • rdm : IfxPsi5_Psi5_Frame
  • rdr : IfxPsi5s_Psi5s_ReceiveData
  • rds : IfxPsi5_Psi5_SerialMessage , IfxPsi5s_Psi5s_ReceiveStatus
  • RE : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • read : IfxStdIf_DPipe_
  • readData : IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_ReceivedData
  • readDataCrc : IfxDma_Dma_ChannelConfig
  • readerWaitx : Ifx_Fifo_Shared
  • real : cfloat32 , cfract , csfract , csint16 , csint32
  • receive : Spi_ErrorChecks
  • receiveBufferErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • receiveBufferOverflowFlag : IfxPsi5s_Psi5s_ReceivedBits
  • receiveBufferOverflowInterrupt : IfxSent_Sent_Enable
  • receiveBufferOverflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveChannel : IfxEray_Eray_MessageRAMConfig
  • receiveControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig , IfxSent_Sent_ChannelConfig
  • receiveDataInterrupt : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_Enable
  • receiveDataInterruptNode : IfxMsc_Msc_InterruptConfig , IfxSent_Sent_InterruptNodeControl
  • receiveDataRegisterTimestamp : IfxPsi5_Psi5_ReceiveControl
  • receivedBits : IfxPsi5s_Psi5s_ReceiveStatus
  • receivedData : IfxPsi5s_Psi5s_ReceiveData
  • receiveIdEnable : IfxAsclin_Lin , IfxAsclin_Lin_Config
  • receiveMemoryOverflowError : IfxPsi5_Psi5_FrameData
  • receiveMode : IfxPsi5s_Psi5s_AscConfig
  • receiveRequested : IfxEray_Eray_ReceiveControl
  • receiverOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • receiveSuccessInterrupt : IfxSent_Sent_Enable
  • receiveSuccessInterruptNode : IfxSent_Sent_InterruptNodeControl
  • receiveWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupLowTime : IfxEray_Eray_Prtc2Control
  • receiveWakeupTestDuration : IfxEray_Eray_Prtc1Control
  • rectifier : IfxDsadc_Dsadc_ChannelConfig
  • ref : IfxIom_Driver_LamConfig
  • refClk : IfxEth_RmiiPins
  • reference : IfxVadc_Adc_ChannelConfig
  • refin : Ifc_Crc_Table
  • refIndex : IfxIom_Driver_Lam
  • refInput : IfxIom_Driver_Lam
  • refout : Ifc_Crc
  • regAddr : Ifx_InternalMux_MuxConfig
  • rejectedFrameId : IfxEray_Eray_MessageRAMConfig
  • reload : IfxScuWdt_Config
  • remaining : SpiIf_Job
  • requestMode : IfxDma_Dma_ChannelConfig
  • requestSlotBackgroundScanEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotPrio : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • requestSlotQueueEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotScanEnabled : IfxVadc_Adc_ArbiterConfig
  • requestSlotStartMode : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • requestSource : IfxDma_Dma_ChannelConfig
  • RER : IfxEth_AltRxDescr1_Bits , IfxEth_RxDescr1_Bits
  • reserved : Spi_ErrorChecks
  • reset : IfxStdIf_Pos_
  • resetFaults : IfxStdIf_Pos_
  • resetSendCount : IfxStdIf_DPipe_
  • resolution : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config , IfxVadc_Adc_ClassConfig
  • resolutionFactor : IfxStdIf_Pos_Config
  • resource : Ifx_GlobalResources_Item
  • responseTimeout : IfxAsclin_Lin_DataControl , IfxAsclin_Lin_ErrorFlags
  • responseTimeoutMode : IfxAsclin_Lin_DataControl
  • result : IfxFft_Fft_Count64
  • resultPriority : IfxVadc_Adc_ChannelConfig
  • resultreg : IfxVadc_Adc_Channel
  • resultRegister : IfxVadc_Adc_ChannelConfig
  • resultServProvider : IfxVadc_Adc_ChannelConfig
  • resultSrcNr : IfxVadc_Adc_ChannelConfig
  • resume : TPwm_Functions
  • resv : IfxEth_AltRxDescr1_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr1_Bits , IfxEth_TxDescr0_Bits
  • resv1 : IfxEth_AltRxDescr1_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_AltTxDescr1_Bits
  • resv2 : IfxEth_AltTxDescr1_Bits , IfxEth_RxDescr1_Bits
  • reversed : Ifx_AngleTrkF32_Config , Ifx_AngleTrkF32_PosIf , IfxDsadc_Rdc_Config , IfxStdIf_Pos_Config
  • rightAlignedStorage : IfxVadc_Adc_ChannelConfig
  • ringModeBuffersConfig : IfxEth_Config
  • risingEdgeAtPeriod : IfxStdIf_Timer_TrigConfig
  • risingEdgeFilterTime : IfxGtm_Tim_In_ConfigFilter , IfxIom_Driver_LamFilterConfig
  • risingEdgeMode : IfxGtm_Tim_In_ConfigFilter
  • rmiiPins : IfxEth_Config
  • rts : IfxAsclin_Asc_Pins
  • rtsMode : IfxAsclin_Asc_Pins
  • run : IfxIom_Driver_LamEventWindowConfig , IfxStdIf_Timer_
  • RWT : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • rx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • rxBuffer : IfxAsclin_Asc_Config
  • rxBuffer1Size : IfxEth_RingModeRxBuffersConfig
  • rxBuffer1StartAddress : IfxEth_RingModeRxBuffersConfig
  • rxBuffer2Size : IfxEth_RingModeRxBuffersConfig
  • rxBuffer2StartAddress : IfxEth_RingModeRxBuffersConfig
  • rxBufferSize : IfxAsclin_Asc_Config
  • rxBufferUsed : IfxEth , IfxEth_RingModeRxBuffersConfig
  • rxClk : IfxEth_MiiPins
  • rxConfig : IfxEth_RingModeBuffersConfig
  • rxCount : IfxEth , SpiIf_
  • rxd0 : IfxEth_MiiPins , IfxEth_RmiiPins
  • rxd1 : IfxEth_MiiPins , IfxEth_RmiiPins
  • rxd2 : IfxEth_MiiPins
  • rxd3 : IfxEth_MiiPins
  • rxDescr : IfxEth , IfxEth_Config
  • rxDiff : IfxEth
  • rxDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • rxDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • rxDv : IfxEth_MiiPins
  • rxEr : IfxEth_MiiPins
  • rxFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • rxFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • rxFifoUnderflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • rxFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • rxHandler : SpiIf_Ch_
  • rxHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxIn : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • rxInterrupt : IfxMultican_Can_MsgObjConfig
  • rxJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • rxMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins
  • rxPin : IfxMultican_Can_NodeConfig
  • rxPinMode : IfxMultican_Can_NodeConfig
  • rxPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • rxReceivedHeader : IfxAsclin_Lin_EnabledInterrupts
  • rxReceivedResponse : IfxAsclin_Lin_EnabledInterrupts
  • rxResponseData : IfxAsclin_Lin_FrameDataControl
  • rxResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • rxResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • rxResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • rxResponseLength : IfxAsclin_Lin_FrameDataControl
  • rxSwFifoOverflow : IfxAsclin_Asc


iLLD_TC26B: Data Fields - Variables

- s -

  • SAF : IfxEth_AltRxDescr0_Bits , IfxEth_RxDescr0_Bits
  • sampleClockSource : IfxDsadc_Dsadc_DemodulatorConfig
  • samplePoint : IfxMultican_Can_NodeConfig
  • samplePointPosition : IfxAsclin_Asc_BitTimingControl , IfxAsclin_Lin_BitSamplingControl
  • sampleStrobe : IfxDsadc_Dsadc_DemodulatorConfig
  • sampleTime : IfxVadc_Adc_ClassConfig
  • sampleTimeControl : IfxVadc_Adc_EmuxControl
  • samplingEdge : IfxCif_Cam_Config
  • samplingTime : Ifx_LowPassPt1F32_Config
  • scanRequest : IfxVadc_Adc_GroupConfig
  • scl : IfxI2c_Pins
  • sclk : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sclkMode : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Pins , IfxQspi_SpiSlave_Pins
  • sda : IfxI2c_Pins
  • sdi : IfxMsc_Msc_Io
  • sdiLinePolarity : IfxMsc_Msc_OutputControlConfig
  • seconds : Ifx_DateTime
  • segmentCount : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • segments : Ifx_LutIndexedLinearF32 , Ifx_LutLinearF32
  • select : IfxAsclin_Cts_In , IfxAsclin_Rts_Out , IfxAsclin_Rx_In , IfxAsclin_Sclk_Out , IfxAsclin_Slso_Out , IfxAsclin_Tx_Out , IfxCcu6_Cc60_Out , IfxCcu6_Cc60in_In , IfxCcu6_Cc61_Out , IfxCcu6_Cc61in_In , IfxCcu6_Cc62_Out , IfxCcu6_Cc62in_In , IfxCcu6_Ccpos0_In , IfxCcu6_Ccpos1_In , IfxCcu6_Ccpos2_In , IfxCcu6_Cout60_Out , IfxCcu6_Cout61_Out , IfxCcu6_Cout62_Out , IfxCcu6_Cout63_Out , IfxCcu6_Ctrap_In , IfxCcu6_T12hr_In , IfxCcu6_T13hr_In , IfxDsadc_Cgpwm_Out , IfxDsadc_Cin_In , IfxDsadc_Cout_Out , IfxDsadc_Din_In , IfxDsadc_Dsn_In , IfxDsadc_Dsp_In , IfxDsadc_Itr_In , IfxDsadc_Sg_In , IfxEray_Rxd_In , IfxEray_Txd_Out , IfxEray_Txen_Out , IfxEth_Col_In , IfxEth_Crs_In , IfxEth_Crsdv_In , IfxEth_Mdc_Out , IfxEth_Refclk_In , IfxEth_Rxclk_In , IfxEth_Rxd_In , IfxEth_Rxdv_In , IfxEth_Rxer_In , IfxEth_Txclk_In , IfxEth_Txd_Out , IfxEth_Txen_Out , IfxEth_Txer_Out , IfxGpt12_Capin_In , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_ToutMap , IfxGtm_Clk_Out , IfxGtm_Tim_TinMap , IfxGtm_Tom_ToutMap , IfxMsc_En_Out , IfxMsc_Fcln_Out , IfxMsc_Fclp_Out , IfxMsc_Inj_In , IfxMsc_Sdi_In , IfxMsc_Son_Out , IfxMsc_Sop_Out , IfxMultican_Rxd_In , IfxMultican_Txd_Out , IfxPsi5_Rx_In , IfxPsi5_Tx_Out , IfxPsi5s_Clk_Out , IfxPsi5s_Rx_In , IfxPsi5s_Tx_Out , IfxQspi_Hsicin_In , IfxQspi_Mrst_In , IfxQspi_Mrst_Out , IfxQspi_Mtsr_In , IfxQspi_Mtsr_Out , IfxQspi_Sclk_In , IfxQspi_Sclk_Out , IfxQspi_Slsi_In , IfxQspi_Slso_Out , IfxScu_Dcdcsync_Out , IfxScu_Emgstop_In , IfxScu_Evrwup_In , IfxScu_Extclk_Out , IfxScu_Req_In , IfxScu_Wdtlck_Out , IfxSent_Sent_In , IfxSent_Spc_Out , IfxSmu_Fsp_Out , IfxVadc_Emux_Out , IfxVadc_GxBfl_Out
  • sendControl : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • sendCount : IfxAsclin_Asc
  • sending : IfxAsclin_Spi , SpiIf_
  • sendResultCode : Ifx_Shell_Config , Ifx_Shell_Flags
  • sensorControlDisabled : IfxDts_Dts_Config
  • sent : IfxSent_Sent
  • serialData : IfxPsi5_Psi5_Message , IfxSent_Sent_SerialMessageFrame
  • serialDataCrcErrorInterrupt : IfxSent_Sent_Enable
  • serialDataDisabledCrcDisabled : IfxSent_Sent_ReceiveControl
  • serialDataProcessingEnabled : IfxSent_Sent_ReceiveControl
  • serialDataReceiveInterrupt : IfxSent_Sent_Enable
  • serialDataReceiveInterruptNode : IfxSent_Sent_InterruptNodeControl
  • serialMessageCRCFailedError : IfxPsi5_Psi5_Message
  • serviceReqNrPeriod : IfxCcu6_TimerWithTrigger_Config
  • serviceReqNrTrigger : IfxCcu6_TimerWithTrigger_Config
  • serviceRequest : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxDsadc_Dsadc_AuxFilterConfig , IfxDsadc_Dsadc_CombFilterConfig
  • serviceRequestDelay : IfxMsc_Msc_UpstreamStatusConfig
  • servReqPriority : IfxDsadc_Rdc_ConfigHw
  • servReqProvider : IfxDsadc_Rdc_ConfigHw
  • setDeadtime : IfxStdIf_PwmHl_
  • setFrequency : IfxStdIf_Timer_
  • setMinPulse : IfxStdIf_PwmHl_
  • setMode : IfxCcu6_PwmHl_Base , IfxGtm_Atom_PwmHl_Base , IfxGtm_Tom_PwmHl_Base , IfxStdIf_PwmHl_
  • setOffset : IfxStdIf_Pos_
  • setOnTime : IfxStdIf_PwmHl_
  • setOnTimeAndShift : IfxStdIf_PwmHl_
  • setPeriod : IfxStdIf_Timer_
  • setPosition : IfxStdIf_Pos_
  • setPulse : IfxStdIf_PwmHl_
  • setRawPosition : IfxStdIf_Pos_
  • setRefreshPeriod : IfxStdIf_Pos_
  • setSingleMode : IfxStdIf_Timer_
  • setSpeed : IfxStdIf_Pos_
  • setTrigger : IfxStdIf_Timer_
  • setupChannels : IfxStdIf_PwmHl_
  • setupDataCount : IfxCif_Cam_Config
  • setupDataTable : IfxCif_Cam_Config
  • shadowAddress : IfxDma_Dma_ChannelConfig
  • shadowControl : IfxDma_Dma_ChannelConfig
  • shared : _Fifo
  • shift : Ifx_LutIndexedLinearF32
  • shiftClock : IfxQspi_SpiSlave_Protocol , SpiIf_ChMode
  • shiftDir : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • showPrompt : Ifx_Shell_Config , Ifx_Shell_Flags
  • signalLevel : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • signDelay : IfxDsadc_Dsadc_RectifierConfig
  • signPeriod : IfxDsadc_Dsadc_RectifierConfig
  • signSource : IfxDsadc_Dsadc_RectifierConfig
  • singleDataTransfer : IfxMultican_Can_MsgObjControl
  • singleShot : IfxStm_Timer_Base
  • singleTransmitTrial : IfxMultican_Can_MsgObjControl
  • sinIn : Ifx_AngleTrkF32 , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc
  • size : _Fifo , Ifx_GlobalResources , Ifx_InternalMux_Config , IfxCif_Cam_MemInfo , IfxPort_Io_Config
  • sizeFactor : IfxCif_Cam_Downscaling
  • sleepModeEnabled : IfxSent_Sent_Config
  • slotControl : IfxEray_Eray_BufferReconfig , IfxEray_Eray_MessageRAMConfig
  • slotCounter : IfxPsi5_Psi5_FrameData
  • slowClock : IfxPsi5_Psi5_Config
  • sls : IfxQspi_SpiMaster_ChannelConfig
  • slsi : IfxQspi_SpiSlave_Pins
  • slsiMisplacedInactivation : IfxQspi_SpiSlave_ErrorFlags
  • slsiMode : IfxQspi_SpiSlave_Pins
  • slso : IfxAsclin_Spi_Pins , IfxQspi_SpiMaster_Channel_s
  • slsoActiveState : IfxQspi_SpiMaster_Channel_s
  • slsoMode : IfxAsclin_Spi_Pins
  • slsoNr : IfxQspi_Slso_Out
  • son : IfxMsc_Msc_Io
  • sop : IfxMsc_Msc_Io
  • sopPolarity : IfxMsc_Msc_OutputControlConfig
  • sorPayloadLength : IfxPsi5_Psi5_TransmitControl
  • source : IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxGtm_Trig_Trigger , IfxIom_Driver_LamEventConfig
  • sourceAddress : IfxDma_Dma_ChannelConfig
  • sourceAddressCircularRange : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementDirection : IfxDma_Dma_ChannelConfig
  • sourceAddressIncrementStep : IfxDma_Dma_ChannelConfig
  • sourceCircularBufferEnabled : IfxDma_Dma_ChannelConfig
  • sourceDestinationAddressCrc : IfxDma_Dma_ChannelConfig
  • spcMode : IfxSent_Sent_TransmitControl
  • spcModeOn : IfxSent_Sent_ChannelConfig
  • speed : IfxGpt12_IncrEnc
  • speedConstPulseCount : IfxGpt12_IncrEnc
  • speedConstTimeDiff : IfxGpt12_IncrEnc
  • speedEstA : Ifx_AngleTrkF32
  • speedEstB : Ifx_AngleTrkF32
  • speedFilerCutOffFrequency : IfxStdIf_Pos_Config
  • speedFilterEnabled : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • speedLpf : Ifx_AngleTrkF32 , IfxGpt12_IncrEnc
  • speedLpfFc : Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • speedModeThreshold : IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • speedModeThresholdTick : IfxGpt12_IncrEnc
  • spol : IfxAsclin_Spi_InputOutputControl
  • sqrAmplMax : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • sqrAmplMin : Ifx_AngleTrkF32_CfgData , Ifx_AngleTrkF32_Config , IfxDsadc_Rdc_Config
  • srcId : IfxMultican_Can_InterruptSource
  • srcrOutDis : IfxFft_Fft
  • srcrOutEnd : IfxFft_Fft
  • srhActivePhaseSelection : IfxMsc_Msc_DownstreamControlConfig
  • srhBitsShiftedAtDataFramesExtension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • srhDataFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • srlActivePhaseSelection : IfxMsc_Msc_DownstreamControlConfig
  • srlBitsShiftedAtDataFramesExtension : IfxMsc_Msc_DownstreamControlExtensionConfig
  • srlDataFrameLength : IfxMsc_Msc_DownstreamControlConfig
  • ssrPayloadLength : IfxPsi5_Psi5_TransmitControl
  • standardIo : Ifx_Console , Ifx_Shell_Config
  • start : Ifx_Shell_Protocol , IfxCif_Cam_MemInfo , IfxFlash_flashSector , IfxHssl_Hssl_AccessWindow , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • startCapture : Icu_Functions
  • startChannel : IfxVadc_Adc_EmuxControl
  • started : Ifx_Shell_Protocol
  • startIndex : _Fifo
  • startOffset : IfxStdIf_Timer_Config
  • startScan : IfxDsadc_Rdc_ConfigHw
  • startSequenceGenerationControl : IfxPsi5s_Psi5s_TransmitControl
  • startSequenceGenerationEnabled : IfxPsi5_Psi5_TransmitControl
  • startSingleShotMode : Timer_Functions
  • startupCalibration : IfxVadc_Adc_Config
  • startupFrame : IfxEray_ReceivedHeader
  • startupFrameIndicator : IfxEray_Header
  • startupFrameTransmitted : IfxEray_Eray_Succ1Config
  • startValue : IfxDsadc_Dsadc_CombFilterConfig
  • staticActionPoint : IfxEray_Eray_Gtu09Config
  • staticFifoDisabled : IfxEray_Eray_MessageRAMConfig
  • staticFramepayload : IfxEray_Eray_ControllerConfig
  • staticSlotLength : IfxEray_Eray_Gtu07Config
  • staticSlotsCount : IfxEray_Eray_Gtu07Config
  • status : Ifx_AngleTrkF32_PosIf , IfxEth , IfxGpt12_IncrEnc , IfxI2c_I2c , IfxPsi5s_Psi5s_Frame , IfxStdIf_Pos_Status
  • statusNibble : IfxSent_Sent_Frame
  • statusNibbleEnabled : IfxSent_Sent_ReceiveControl
  • step : IfxMsc_Msc_Clock
  • stm : IfxStm_Timer , IfxStm_Timer_Config
  • stop : IfxStdIf_Timer_ , PwmHl_Functions , Timer_Functions , TPwm_Functions
  • stopBit : IfxAsclin_Asc_FrameControl , IfxAsclin_Lin_FrameControl , IfxAsclin_Spi_FrameControl
  • stopBits : IfxPsi5s_Psi5s_AscConfig
  • stopCapture : Icu_Functions
  • streamingMode : IfxHssl_Hssl_Channel , IfxHssl_Hssl_ChannelConfig
  • streamingModeOn : IfxHssl_Hssl_Channel
  • strobePosition : IfxEray_Eray_Prtc1Control
  • succ1Config : IfxEray_Eray_ControllerConfig
  • succ2Config : IfxEray_Eray_ControllerConfig
  • succ3Config : IfxEray_Eray_ControllerConfig
  • supplyVoltage : IfxVadc_Adc_Config
  • suspendTriggered : IfxSent_Sent_ReceiveControl
  • swapRequested : IfxEray_Eray_ReceiveControl
  • switchingSelect : IfxCcu6_PwmBc_MultiChannelControl
  • switchingSync : IfxCcu6_PwmBc_MultiChannelControl
  • syncFrame : IfxEray_ReceivedHeader
  • syncFrameIndicator : IfxEray_Header
  • syncFrameTransmitted : IfxEray_Eray_Succ1Config
  • synchJumpWidth : IfxMultican_Can_NodeConfig
  • synchonize : IfxVadc_Adc_ChannelConfig
  • synchronousOperation : IfxCcu6_Timer_Config
  • synchronousStart : Timer_Functions
  • synchronousStop : Timer_Functions
  • synchronousUpdateEnabled : IfxGtm_Atom_Pwm_Config , IfxGtm_Tom_Pwm_Config
  • syntax : Ifx_Shell_Syntax
  • sysPll : IfxScuCcu_Config
  • systemCall : IfxCpu_Trap_Id
  • systemEventTriggerThreshold : IfxIom_Driver_Lam , IfxIom_Driver_LamConfig


iLLD_TC26B: Data Fields - Variables

- t -

  • t12countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t12ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t12ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t12Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t12Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t12SyncDirection : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t12SyncEvent : IfxCcu6_PwmBc_Timer13 , IfxCcu6_Timer_Timer13 , IfxCcu6_TPwm_Timer13
  • t13countingInputMode : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockEnabled : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtClockInput : IfxCcu6_Timer_Clock , IfxCcu6_TPwm_Clock
  • t13ExtInputTrigger : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13ExtInputTriggerMode : IfxCcu6_PwmBc_TriggerConfig
  • t13Frequency : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t13hr : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • t13InSyncWithT12 : IfxCcu6_PwmBc_TriggerConfig , IfxCcu6_Timer_TriggerConfig , IfxCcu6_TPwm_TriggerConfig
  • t13Period : PwmHl_Config , PwmHl_s , Timer_Config , Timer_s
  • t1xhrInputMode : IfxCcu6_Icu_Pins , IfxCcu6_PwmBc_Pins , IfxCcu6_Timer_Pins , IfxCcu6_TPwm_Pins
  • table : Ifc_Crc , Ifx_GlobalResources
  • tAddr : IfxCpu_Trap
  • target : IfxMsc_En_Out , IfxMsc_Msc_Config
  • TBS1 : IfxEth_AltTxDescr1_Bits , IfxEth_TxDescr1_Bits
  • TBS2 : IfxEth_AltTxDescr1_Bits , IfxEth_TxDescr1_Bits
  • TCH : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • tClass : IfxCpu_Trap
  • tCpu : IfxCpu_Trap
  • TDES0 : IfxEth_TxDescr
  • TDES1 : IfxEth_TxDescr
  • TDES2 : IfxEth_TxDescr
  • TDES3 : IfxEth_TxDescr
  • TER : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • tgc : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer
  • tgcGlobalControlApplyUpdate : IfxGtm_Tom_Timer
  • tgcGlobalControlDisableUpdate : IfxGtm_Tom_Timer
  • threshold : IfxIom_Driver_LamEventWindowConfig
  • thumbData : IfxCif_Cam_JfifHeader
  • thumbX : IfxCif_Cam_JfifHeader
  • thumbY : IfxCif_Cam_JfifHeader
  • ticks : IfxStm_CompareConfig
  • tId : IfxCpu_Trap
  • tim : IfxGtm_Tim_TinMap
  • timeBase : IfxSent_Sent_TransmitControl
  • timeBaseSelect : IfxPsi5_Psi5_PulseGeneration , IfxPsi5_Psi5_TimeStampConfig , IfxPsi5s_Psi5s_PulseGeneration , IfxPsi5s_Psi5s_TimeStampConfig
  • timeFrameInterrupt : IfxMsc_Msc_InterruptConfig
  • timeFrameInterruptNode : IfxMsc_Msc_InterruptConfig
  • timeout : IfxGtm_Tim_In_Config , IfxGtm_Tim_In_ConfigTimeout
  • timeoutError : IfxHssl_Hssl_errorFlags
  • timer : IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmHl_Config , IfxCcu6_PwmHl_s , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGpt12_TxEud_In , IfxGpt12_TxIn_In , IfxGpt12_TxOut_Out , IfxGtm_Atom_PwmHl_Config , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxStdIf_PwmHl_
  • timer12 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timer13 : IfxCcu6_PwmBc_Config , IfxCcu6_Timer_Config , IfxCcu6_TPwm_Config
  • timerChannel : IfxGtm_Atom_Timer , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config
  • timerInterrupt : IfxMultican_Can_NodeConfig
  • timeslotError : IfxPsi5_Psi5_FrameData
  • timestamp : Ifx_DataBufferMode_TimeStampSingle , IfxDsadc_Rdc , IfxPsi5_Psi5_FrameData , IfxPsi5s_Psi5s_Frame
  • timeStamp : IfxPsi5s_Psi5s_ReceiveTimestamp
  • timestamp : IfxPsi5s_Psi5s_Timestamp
  • timeStamp : IfxSent_Sent_Frame
  • timestampClock : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterA : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterB : IfxPsi5_Psi5_Config , IfxPsi5s_Psi5s_Config
  • timestampCounterC : IfxPsi5_Psi5_Config
  • timestampEnabled : IfxDma_Dma_ChannelConfig , IfxPsi5s_Psi5s_ReceiveControl
  • timeStampPreDivider : IfxSent_Sent_Config
  • timestampSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timestampTrigger : IfxDsadc_Dsadc_DemodulatorConfig
  • timestampTriggerSelect : IfxPsi5s_Psi5s_ReceiveControl
  • timIndex : IfxGtm_Tim_In , IfxGtm_Tim_In_Config
  • tint0IsrProvider : IfxEray_Eray_Interrupt
  • tint0Priority : IfxEray_Eray_Interrupt
  • tint1IsrProvider : IfxEray_Eray_Interrupt
  • tint1Priority : IfxEray_Eray_Interrupt
  • tom : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_PwmHl_Config , IfxGtm_Tom_PwmHl_s , IfxGtm_Tom_Timer , IfxGtm_Tom_Timer_Config , IfxGtm_Tom_ToutMap
  • tomChannel : IfxGtm_Tom_Pwm_Config , IfxGtm_Tom_Pwm_Driver
  • tomIndex : IfxGtm_Tom_Pwm_Driver , IfxGtm_Tom_Timer
  • topMsgObjId : IfxMultican_Can_MsgObjControl
  • totalMemSize : IfxCif_Cam
  • toutn : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • toutSel : IfxGtm_Atom_ToutMap , IfxGtm_Tom_ToutMap
  • transactionRequestLostInterruptEnabled : IfxDma_Dma_ChannelConfig
  • transactionTagError : IfxHssl_Hssl_errorFlags
  • transferBufferUnderflowInterrupt : IfxSent_Sent_Enable
  • transferBufferUnderflowInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferCount : IfxDma_Dma_ChannelConfig
  • transferDataInterrupt : IfxSent_Sent_Enable
  • transferDataInterruptNode : IfxSent_Sent_InterruptNodeControl
  • transferInProgress : IfxAsclin_Spi
  • transferInterrupt : IfxMultican_Can_NodeConfig
  • transferRequested : IfxEray_Eray_TransmitControl , IfxEray_SlotConfig
  • transmissionMode : IfxEray_Header , IfxMsc_Msc_DownstreamControlConfig
  • transmissionSlotMode : IfxEray_Eray_Succ1Config
  • transmissionStartTime : IfxEray_Eray_Prtc1Control
  • transmit : Spi_ErrorChecks
  • transmitControl : IfxSent_Sent_ChannelConfig
  • transmitErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • transmitMode : IfxPsi5s_Psi5s_AscConfig
  • transmitPayloadIndicatior : IfxEray_Header
  • transmitterOddParityEnabled : IfxPsi5s_Psi5s_AscConfig
  • transmitWakeupIdleTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupLowTime : IfxEray_Eray_Prtc2Control
  • transmitWakeupRepetitions : IfxEray_Eray_Prtc1Control
  • trigger : IfxCcu6_Icu_Channel , IfxCcu6_Icu_ChannelConfig , IfxCcu6_PwmBc , IfxCcu6_PwmBc_Config , IfxCcu6_Timer , IfxCcu6_Timer_Config , IfxCcu6_TPwm , IfxCcu6_TPwm_Config , IfxGtm_Trig_AdcTrig_Table , IfxIom_Driver_LamEventConfig , IfxStdIf_Timer_Config
  • triggerChannel : IfxGtm_Atom_Timer , IfxGtm_Tom_Timer
  • triggerConfig : IfxVadc_Adc_BackgroundScanConfig , IfxVadc_Adc_QueueConfig , IfxVadc_Adc_ScanConfig
  • triggerEnabled : IfxCcu6_TimerWithTrigger_Base , IfxGtm_Atom_Timer_Base , IfxGtm_Tom_Timer_Base , IfxStm_Timer_Base
  • triggerInput : IfxDsadc_Dsadc_DemodulatorConfig
  • triggerMode : IfxVadc_Adc_GatingTriggerConfig
  • triggerMonitorCleared : IfxSent_Sent_InputOutputControl
  • triggerOut : IfxCcu6_TimerWithTrigger_Config , IfxGtm_Atom_Timer_Config , IfxGtm_Tom_Timer_Config
  • triggerPoint : IfxStdIf_Timer_TrigConfig
  • triggerPriority : IfxStm_CompareConfig
  • triggerSource : IfxSent_Sent_TransmitControl , IfxVadc_Adc_GatingTriggerConfig
  • Ts : Ifx_AngleTrkF32_PosIf
  • tsm : IfxPsi5s_Psi5s_ReceiveTimestamp
  • TTSE : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr1_Bits
  • TTSS : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • tUnit : IfxSent_Sent_ChannelConfig
  • turn : Ifx_AngleTrkF32_PosIf , IfxGpt12_IncrEnc
  • tx : IfxAsclin_Asc , IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins , SpiIf_Ch_
  • txBuffer : IfxAsclin_Asc_Config
  • txBuffer1Size : IfxEth_RingModeTxBuffersConfig
  • txBuffer1StartAddress : IfxEth_RingModeTxBuffersConfig
  • txBuffer2Size : IfxEth_RingModeTxBuffersConfig
  • txBuffer2StartAddress : IfxEth_RingModeTxBuffersConfig
  • txBufferSize : IfxAsclin_Asc_Config
  • txBufferUsed : IfxEth , IfxEth_RingModeTxBuffersConfig
  • txClk : IfxEth_MiiPins
  • txCompleted : IfxAsclin_Lin_AcknowledgementFlags
  • txConfig : IfxEth_RingModeBuffersConfig
  • txCount : IfxEth , SpiIf_
  • txd0 : IfxEth_MiiPins , IfxEth_RmiiPins
  • txd1 : IfxEth_MiiPins , IfxEth_RmiiPins
  • txd2 : IfxEth_MiiPins
  • txd3 : IfxEth_MiiPins
  • txDescr : IfxEth , IfxEth_Config
  • txDiff : IfxEth
  • txDisabled : IfxStdIf_DPipe_
  • txDmaChannel : IfxQspi_SpiMaster_Dma , IfxQspi_SpiSlave_Dma
  • txDmaChannelId : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • txEn : IfxEth_MiiPins , IfxEth_RmiiPins
  • txEnOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEnOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txEr : IfxEth_MiiPins
  • txFifoInterruptLevel : IfxAsclin_Asc_FifoControl , IfxAsclin_Spi_FifoControl
  • txFifoMode : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoOverflow : IfxAsclin_Asc_ErrorFlags , IfxAsclin_Lin_ErrorFlags , IfxAsclin_Spi_ErrorFlags
  • txFifoOverflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txFifoThreshold : IfxQspi_SpiMaster_Config , IfxQspi_SpiSlave_Config
  • txFifoUnderflowError : IfxQspi_SpiMaster_ErrorFlags , IfxQspi_SpiSlave_ErrorFlags
  • txHandler : SpiIf_Ch_
  • txHeaderEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txHeaderErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txHeaderInProgress : IfxAsclin_Lin_FrameControlFlags
  • txInProgress : IfxAsclin_Asc
  • txInterrupt : IfxMultican_Can_MsgObjConfig
  • txJob : IfxAsclin_Spi , IfxQspi_SpiSlave
  • txMode : IfxAsclin_Asc_Pins , IfxAsclin_Lin_Pins , IfxAsclin_Spi_Pins , IfxPsi5s_Psi5s_Pins
  • txOut : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txOutMode : IfxEray_Eray_NodeA , IfxEray_Eray_NodeB
  • txPin : IfxMultican_Can_NodeConfig
  • txPinMode : IfxMultican_Can_NodeConfig
  • txPriority : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , SpiIf_Config
  • txResponseEnd : IfxAsclin_Lin_AcknowledgementFlags
  • txResponseErrorOccurred : IfxAsclin_Lin_FrameControlFlags
  • txResponseInProgress : IfxAsclin_Lin_FrameControlFlags
  • txResponseLength : IfxAsclin_Lin_FrameDataControl
  • txSendHeaderOnly : IfxAsclin_Lin_FrameControlFlags
  • txSendResponse : IfxAsclin_Lin_FrameControlFlags
  • txTimestamp : IfxAsclin_Asc
  • txTransmittedHeader : IfxAsclin_Lin_EnabledInterrupts
  • txTransmittedResponse : IfxAsclin_Lin_EnabledInterrupts
  • type : IfxPsi5_Psi5_Clock , IfxPsi5s_Psi5s_Clock
  • typeOfService : IfxAsclin_Asc_InterruptConfig , IfxAsclin_Lin_InterruptConfig , IfxAsclin_Spi_InterruptConfig , IfxCcu6_Icu_InterruptConfig , IfxCcu6_PwmBc_InterruptConfig , IfxCcu6_Timer_InterruptConfig , IfxCcu6_TPwm_InterruptConfig , IfxFft_Fft_Config , IfxMultican_Can_InterruptConfig , IfxStm_CompareConfig


iLLD_TC26B: Data Fields - Variables

- u -

  • U : IfxEth_RxDescr0 , IfxEth_RxDescr1 , IfxEth_RxDescr2 , IfxEth_RxDescr3 , IfxEth_RxDescrList , IfxEth_TxDescr0 , IfxEth_TxDescr1 , IfxEth_TxDescr2 , IfxEth_TxDescr3 , IfxEth_TxDescrList , IfxMultican_MsgObjStat
  • uartFrameCount : IfxPsi5s_Psi5s_ReceiveControl
  • UF : IfxEth_AltTxDescr0_Bits , IfxEth_TxDescr0_Bits
  • uk : Ifx_ClpxFloat32_Integral , Ifx_IntegralF32 , Ifx_RampF32
  • underflowInterrupt : IfxMsc_Msc_InterruptConfig
  • underflowInterruptNode : IfxMsc_Msc_InterruptConfig
  • unexpectedError : IfxHssl_Hssl_errorFlags
  • unknown : IfxCif_Cam_JfifHeader
  • update : IfxCcu6_PwmHl_Mode , IfxCcu6_PwmHl_s , IfxGpt12_IncrEnc , IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s , IfxStdIf_Pos_
  • updateAndShift : IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • updateInputFrequency : IfxStdIf_Timer_
  • updatePeriod : IfxDsadc_Rdc , IfxGpt12_IncrEnc , IfxStdIf_Pos_Config
  • updatePulse : IfxGtm_Atom_PwmHl_Mode , IfxGtm_Atom_PwmHl_s , IfxGtm_Tom_PwmHl_Mode , IfxGtm_Tom_PwmHl_s
  • upperBoundary : IfxVadc_Adc_ChannelConfig
  • upperLimit : IfxAsclin_Lin_BaudrateDetection
  • upperTemperatureLimit : IfxDts_Dts_Config
  • upstreamChannelFrameType : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamChannelReceivingRate : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamConfig : IfxMsc_Msc_Config
  • upstreamTimeoutInterrupt : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutInterruptNode : IfxMsc_Msc_InterruptConfig
  • upstreamTimeoutPrescaler : IfxMsc_Msc_UpstreamStatusConfig
  • upstreamTimeoutValue : IfxMsc_Msc_UpstreamStatusConfig
  • useDma : IfxQspi_SpiMaster_Dma , IfxQspi_SpiMaster_DmaConfig , IfxQspi_SpiSlave_Dma , IfxQspi_SpiSlave_DmaConfig
  • userTs : IfxDsadc_Rdc_Config
  • useWindowFunction : IfxFft_Fft_JobConfig
  • uv : IfxCif_Cam_JpegTables


iLLD_TC26B: Data Fields - Variables

- v -

  • vadc : IfxVadc_Adc , IfxVadc_Adc_Config , IfxVadc_Adc_EmuxControl
  • value : Ifx_InternalMux_MuxConfig , IfxPsi5_Psi5_Rds , IfxScuCcu_CcuconRegConfig , IfxScuCcu_FlashWaitstateConfig
  • verbose : IfxPsi5_Psi5_ReceiveControl
  • verboseForAsynchronousMode : IfxPsi5_Psi5_ReceiveControl
  • version : IfxCif_Cam_JfifHeader
  • vFactor : IfxCif_Cam_Downscaling
  • VLAN : IfxEth_AltRxDescr0_Bits , IfxEth_AltTxDescr0_Bits , IfxEth_RxDescr0_Bits , IfxEth_TxDescr0_Bits
  • vMode : IfxCif_Cam_Downscaling
  • vOffset : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • vSize : IfxCif_Cam_MemConfig , IfxCif_Cam_PictureInfo
  • vSyncPolarity : IfxCif_Cam_Config


iLLD_TC26B: Data Fields - Variables

- w -

  • waitingTime : Timer_Config , TPwm_Config
  • waitTime : IfxScuCcu_InitialStepConfig , IfxScuCcu_PllStepsConfig
  • wakeupPatternChannel : IfxEray_Eray_Succ1Config
  • watchdogEnabled : IfxCif_Cam_Common
  • watchdogErrorInterrupt : IfxSent_Sent_Enable
  • watchdogErrorInterruptNode : IfxSent_Sent_InterruptNodeControl
  • watchdogTimeoutErrorFlag : IfxPsi5s_Psi5s_ReceivedBits
  • watchdogTimerLimit : IfxPsi5_Psi5_ChannelConfig , IfxPsi5s_Psi5s_ChannelConfig
  • watchDogTimerLimit : IfxSent_Sent_ChannelConfig
  • watchdogTimerModeSelect : IfxPsi5s_Psi5s_ReceiveControl
  • windowSize : IfxDsadc_Dsadc_IntegratorConfig
  • wrapDestinationInterruptEnabled : IfxDma_Dma_ChannelConfig
  • wrapSourceInterruptEnabled : IfxDma_Dma_ChannelConfig
  • write : IfxStdIf_DPipe_
  • writerWaitx : Ifx_Fifo_Shared
  • wrongStatusNibbleErrorInterrupt : IfxSent_Sent_Enable


iLLD_TC26B: Data Fields - Variables

- x -

  • xcrc : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcError : IfxPsi5s_Psi5s_ReceivedBits
  • xcrcErrorConsideredForRSI : IfxPsi5s_Psi5s_GlobalControlConfig
  • xtalFrequency : IfxScuCcu_Config
  • xxxCH1 : IfxGtm_Tom_TGC


iLLD_TC26B: Data Fields - Variables

- y -

  • y : IfxCif_Cam_JpegTables , IfxCif_Cam_MemAreas


iLLD_TC26B: Data Fields - Variables

- z -

  • zeroIsrPriority : IfxGpt12_IncrEnc_Config
  • zeroIsrProvider : IfxGpt12_IncrEnc_Config


iLLD_TC26B: File List

File List
Here is a list of all files with brief descriptions:
Assert.c | Assert functions
Assert.h | Assert functions
Bsp.c | Board support package
Bsp.h | Board support package
CompilerDcc.c |
CompilerDcc.h |
CompilerGhs.c |
CompilerGhs.h |
CompilerGnuc.c |
CompilerGnuc.h |
Compilers.h |
CompilerTasking.c |
CompilerTasking.h |
Icu.h | ICU interface
Ifx_AngleTrkF32.c | Angle-tracking observer for sin/cos analog position sensor
Ifx_AngleTrkF32.h | Angle-tracking observer for sin/cos analog position sensor
Ifx_Assert.h | Assert functions
Ifx_Cf32.c | Floating point signal, vector, and matrix library
Ifx_Cf32.h | Floating point signal, vector, and matrix library
Ifx_CircularBuffer.asm.c | Circular buffer functions (assembler implementation)
Ifx_CircularBuffer.c | Circular buffer functions in C language
Ifx_CircularBuffer.h | Circular buffer functions
Ifx_Console.c | Main Ifx_Console module implementation file
Ifx_Console.h | Main Console module header file
Ifx_Crc.c | CRC algorithm
Ifx_Crc.h | CRC algorithm
Ifx_DateTime.c | Date and time functions
Ifx_DateTime.h | Date and time functions
Ifx_FftF32.c | Floating-point Fast Fourier Transform
Ifx_FftF32.h | Floating-point Fast Fourier Transform
Ifx_FftF32_BitReverseTable.c | Bit-reversal lookup for Floating-point Fast Fourier Transform
Ifx_FftF32_TwiddleTable.c | Floating-point Fast Fourier Transform Twiddle-Factors
Ifx_Fifo.c | FIFO functions
Ifx_Fifo.h | FIFO buffer functions
Ifx_GlobalResources.c |
Ifx_GlobalResources.h | Handling of global resources
Ifx_IntegralF32.c | Discrete integral approximation
Ifx_IntegralF32.h | Discrete integral approximation
Ifx_InternalMux.c | Mux configuration functions
Ifx_InternalMux.h | Mux configuration functions
Ifx_LowPassPt1F32.c | Low pass filter PT1
Ifx_LowPassPt1F32.h | Low pass filter PT1
Ifx_Lut.h | Lookup defintion with fixed-point angle data type
Ifx_LutAtan2F32.c | ATAN2 lookup functions with fixed-point angle data type
Ifx_LutAtan2F32.h | Floating point signal, vector, and matrix library
Ifx_LutAtan2F32_Table.c | Table data for ATAN2 lookup functions
Ifx_LutIndexedLinearF32.h | Look-up functionality
Ifx_LutLinearF32.c | Linear look-up function
Ifx_LutLinearF32.h | Look-up functionality
Ifx_LutLSincosF32.c | Table data for linear interpolation Sin/Cos lookup functions
Ifx_LutLSincosF32.h | Sin/Cos linear approximated lookup functions with fixed-point angle data type
Ifx_LutSincosF32.c | Sin/Cos lookup functions with fixed-point angle data type
Ifx_LutSincosF32.h | Sin/Cos lookup functions with fixed-point angle data type
Ifx_LutSincosF32_Table.c | Table data for Sin/Cos lookup functions
Ifx_RampF32.c | Ramp function
Ifx_RampF32.h | Ramp function
Ifx_Shell.c | Shell functions
Ifx_Shell.h | Shell functions
Ifx_Types.h | This files defines all types used by the IFX HAL and libraries
Ifx_TypesDcc.h |
Ifx_TypesGhs.h |
Ifx_TypesGnuc.h |
Ifx_TypesTasking.h |
Ifx_WndF32.h | Windowing function
Ifx_WndF32_BlackmanHarrisTable.c | Lookup table for Blackman-Harris window function
Ifx_WndF32_HannTable.c | Lookup table for Hann window function
IfxAsclin.c | ASCLIN basic functionality
IfxAsclin.h | ASCLIN basic functionality
IfxAsclin_Asc.c | ASCLIN ASC details
IfxAsclin_Asc.h | ASCLIN ASC details
IfxAsclin_cfg.c | ASCLIN on-chip implementation data
IfxAsclin_cfg.h | ASCLIN on-chip implementation data
IfxAsclin_Lin.c | ASCLIN LIN details
IfxAsclin_Lin.h | ASCLIN LIN details
IfxAsclin_PinMap.c | ASCLIN I/O map
IfxAsclin_PinMap.h | ASCLIN I/O map
IfxAsclin_Spi.c | ASCLIN SPI details
IfxAsclin_Spi.h | ASCLIN SPI details
IfxCcu6.c | CCU6 basic functionality
IfxCcu6.h | CCU6 basic functionality
IfxCcu6_cfg.c | CCU6 on-chip implementation data
IfxCcu6_cfg.h | CCU6 on-chip implementation data
IfxCcu6_Icu.c | CCU6 ICU details
IfxCcu6_Icu.h | CCU6 ICU details
IfxCcu6_PinMap.c | CCU6 I/O map
IfxCcu6_PinMap.h | CCU6 I/O map
IfxCcu6_PwmBc.c | CCU6 PWMBC details
IfxCcu6_PwmBc.h | CCU6 PWMBC details
IfxCcu6_PwmHl.c | CCU6 PWMHL details
IfxCcu6_PwmHl.h | CCU6 PWMHL details
IfxCcu6_Timer.c | CCU6 TIMER details
IfxCcu6_Timer.h | CCU6 TIMER details
IfxCcu6_TimerWithTrigger.c | CCU6 TIMERWITHTRIGGER details
IfxCcu6_TimerWithTrigger.h | CCU6 TIMERWITHTRIGGER details
IfxCcu6_TPwm.c | CCU6 TPWM details
IfxCcu6_TPwm.h | CCU6 TPWM details
IfxCif.c | CIF basic functionality
IfxCif.h | CIF basic functionality
IfxCif_Cam.c | CIF CAM details
IfxCif_Cam.h | CIF CAM details
IfxCif_cfg.c | CIF on-chip implementation data
IfxCif_cfg.h | CIF on-chip implementation data
IfxCif_PinMap.c | CIF I/O map
IfxCif_PinMap.h | CIF I/O map
IfxCpu.c | CPU basic functionality
IfxCpu.h | CPU basic functionality
IfxCpu_cfg.c | CPU on-chip implementation data
IfxCpu_cfg.h | CPU on-chip implementation data
IfxCpu_CStart.h | This file contains the Core startup sequence
IfxCpu_CStart0.c | This file contains the Core startup sequence for Cpu0
IfxCpu_CStart1.c | This file contains the Core startup sequence for Cpu1
IfxCpu_Intrinsics.h |
IfxCpu_IntrinsicsDcc.h |
IfxCpu_IntrinsicsGhs.h |
IfxCpu_IntrinsicsGnuc.h |
IfxCpu_IntrinsicsTasking.h |
IfxCpu_Irq.c | This file contains the APIs for Interrupt related functions
IfxCpu_Irq.h | This file contains the APIs for Interrupt related functions
IfxCpu_Trap.c | This file contains the APIs for Trap related functions
IfxCpu_Trap.h |
IfxDma.c | DMA basic functionality
IfxDma.h | DMA basic functionality
IfxDma_cfg.c | DMA on-chip implementation data
IfxDma_cfg.h | DMA on-chip implementation data
IfxDma_Dma.c | DMA DMA details
IfxDma_Dma.h | DMA DMA details
IfxDsadc.c | DSADC basic functionality
IfxDsadc.h | DSADC basic functionality
IfxDsadc_cfg.h | DSADC on-chip implementation data
IfxDsadc_Dsadc.c | DSADC DSADC details
IfxDsadc_Dsadc.h | DSADC DSADC details
IfxDsadc_PinMap.c | DSADC I/O map
IfxDsadc_PinMap.h | DSADC I/O map
IfxDsadc_Rdc.c | DSADC RDC details
IfxDsadc_Rdc.h | DSADC RDC details
IfxDts.c | DTS basic functionality
IfxDts.h | DTS basic functionality
IfxDts_cfg.h | DTS on-chip implementation data
IfxDts_Dts.c | DTS DTS details
IfxDts_Dts.h | DTS DTS details
IfxEmem.c | EMEM basic functionality
IfxEmem.h | EMEM basic functionality
IfxEmem_cfg.c | EMEM on-chip implementation data
IfxEmem_cfg.h | EMEM on-chip implementation data
IfxEray.c | ERAY basic functionality
IfxEray.h | ERAY basic functionality
IfxEray_cfg.c | ERAY on-chip implementation data
IfxEray_cfg.h | ERAY on-chip implementation data
IfxEray_Eray.c | ERAY ERAY details
IfxEray_Eray.h | ERAY ERAY details
IfxEray_PinMap.c | ERAY I/O map
IfxEray_PinMap.h | ERAY I/O map
IfxEth.c | ETH basic functionality
IfxEth.h | ETH basic functionality
IfxEth_cfg.h | ETH on-chip implementation data
IfxEth_Phy_Pef7071.c | ETH PHY_PEF7071 details
IfxEth_Phy_Pef7071.h | ETH PHY_PEF7071 details
IfxEth_PinMap.c | ETH I/O map
IfxEth_PinMap.h | ETH I/O map
IfxFce.c | FCE basic functionality
IfxFce.h | FCE basic functionality
IfxFce_cfg.h | FCE on-chip implementation data
IfxFce_Crc.c | FCE CRC details
IfxFce_Crc.h | FCE CRC details
IfxFft.c | FFT basic functionality
IfxFft.h | FFT basic functionality
IfxFft_cfg.h | FFT on-chip implementation data
IfxFft_Fft.c | FFT FFT details
IfxFft_Fft.h | FFT FFT details
IfxFlash.c | FLASH basic functionality
IfxFlash.h | FLASH basic functionality
IfxFlash_cfg.c | FLASH on-chip implementation data
IfxFlash_cfg.h | FLASH on-chip implementation data
IfxGlobal_cfg.h | Global definitions
IfxGpt12.c | GPT12 basic functionality
IfxGpt12.h | GPT12 basic functionality
IfxGpt12_cfg.h | GPT12 on-chip implementation data
IfxGpt12_IncrEnc.c | GPT12 INCRENC details
IfxGpt12_IncrEnc.h | GPT12 INCRENC details
IfxGpt12_PinMap.c | GPT12 I/O map
IfxGpt12_PinMap.h | GPT12 I/O map
IfxGtm.c | GTM basic functionality
IfxGtm.h | GTM basic functionality
IfxGtm_Atom.c | GTM basic functionality
IfxGtm_Atom.h | GTM basic functionality
IfxGtm_Atom_Pwm.c | GTM PWM details
IfxGtm_Atom_Pwm.h | GTM PWM details
IfxGtm_Atom_PwmHl.c | GTM PWMHL details
IfxGtm_Atom_PwmHl.h | GTM PWMHL details
IfxGtm_Atom_Timer.c | GTM TIMER details
IfxGtm_Atom_Timer.h | GTM TIMER details
IfxGtm_cfg.c | GTM on-chip implementation data
IfxGtm_cfg.h | GTM on-chip implementation data
IfxGtm_Cmu.c | GTM basic functionality
IfxGtm_Cmu.h | GTM basic functionality
IfxGtm_Dpll.c | GTM basic functionality
IfxGtm_Dpll.h | GTM basic functionality
IfxGtm_PinMap.c | GTM I/O map
IfxGtm_PinMap.h | GTM I/O map
IfxGtm_Tbu.c | GTM basic functionality
IfxGtm_Tbu.h | GTM basic functionality
IfxGtm_Tim.c | GTM basic functionality
IfxGtm_Tim.h | GTM basic functionality
IfxGtm_Tim_In.c | GTM IN details
IfxGtm_Tim_In.h | GTM IN details
IfxGtm_Tom.c | GTM basic functionality
IfxGtm_Tom.h | GTM basic functionality
IfxGtm_Tom_Pwm.c | GTM PWM details
IfxGtm_Tom_Pwm.h | GTM PWM details
IfxGtm_Tom_PwmHl.c | GTM PWMHL details
IfxGtm_Tom_PwmHl.h | GTM PWMHL details
IfxGtm_Tom_Timer.c | GTM TIMER details
IfxGtm_Tom_Timer.h | GTM TIMER details
IfxGtm_Trig.c | GTM TRIG details
IfxGtm_Trig.h | GTM TRIG details
IfxHssl.c | HSSL basic functionality
IfxHssl.h | HSSL basic functionality
IfxHssl_cfg.c | HSSL on-chip implementation data
IfxHssl_cfg.h | HSSL on-chip implementation data
IfxHssl_Hssl.c | HSSL HSSL details
IfxHssl_Hssl.h | HSSL HSSL details
IfxI2c.c | I2C basic functionality
IfxI2c.h | I2C basic functionality
IfxI2c_cfg.c | I2C on-chip implementation data
IfxI2c_cfg.h | I2C on-chip implementation data
IfxI2c_I2c.c | I2C I2C details
IfxI2c_I2c.h | I2C I2C details
IfxI2c_PinMap.c | I2C I/O map
IfxI2c_PinMap.h | I2C I/O map
IfxIom.c | IOM basic functionality
IfxIom.h | IOM basic functionality
IfxIom_cfg.h | IOM on-chip implementation data
IfxIom_Driver.c | IOM DRIVER details
IfxIom_Driver.h | IOM DRIVER details
IfxLldVersion.h |
IfxMsc.c | MSC basic functionality
IfxMsc.h | MSC basic functionality
IfxMsc_cfg.c | MSC on-chip implementation data
IfxMsc_cfg.h | MSC on-chip implementation data
IfxMsc_Msc.c | MSC MSC details
IfxMsc_Msc.h | MSC MSC details
IfxMsc_PinMap.c | MSC I/O map
IfxMsc_PinMap.h | MSC I/O map
IfxMtu.c | MTU basic functionality
IfxMtu.h | MTU basic functionality
IfxMtu_cfg.c | Mtu on-chip implementation data
IfxMtu_cfg.h | Mtu on-chip implementation data
IfxMultican.c | MULTICAN basic functionality
IfxMultican.h | MULTICAN basic functionality
IfxMultican_Can.c | MULTICAN CAN details
IfxMultican_Can.h | MULTICAN CAN details
IfxMultican_cfg.c | MULTICAN on-chip implementation data
IfxMultican_cfg.h | MULTICAN on-chip implementation data
IfxMultican_PinMap.c | MULTICAN I/O map
IfxMultican_PinMap.h | MULTICAN I/O map
IfxPort.c | PORT basic functionality
IfxPort.h | PORT basic functionality
IfxPort_cfg.c | PORT on-chip implementation data
IfxPort_cfg.h | PORT on-chip implementation data
IfxPort_Io.c | PORT IO details
IfxPort_Io.h | PORT IO details
IfxPort_PinMap.c | PORT I/O map
IfxPort_PinMap.h | PORT I/O map
IfxPsi5.c | PSI5 basic functionality
IfxPsi5.h | PSI5 basic functionality
IfxPsi5_cfg.c | PSI5 on-chip implementation data
IfxPsi5_cfg.h | PSI5 on-chip implementation data
IfxPsi5_PinMap.c | PSI5 I/O map
IfxPsi5_PinMap.h | PSI5 I/O map
IfxPsi5_Psi5.c | PSI5 PSI5 details
IfxPsi5_Psi5.h | PSI5 PSI5 details
IfxPsi5s.c | PSI5S basic functionality
IfxPsi5s.h | PSI5S basic functionality
IfxPsi5s_cfg.h | PSI5S on-chip implementation data
IfxPsi5s_PinMap.c | PSI5S I/O map
IfxPsi5s_PinMap.h | PSI5S I/O map
IfxPsi5s_Psi5s.c | PSI5S PSI5S details
IfxPsi5s_Psi5s.h | PSI5S PSI5S details
IfxQspi.c | QSPI basic functionality
IfxQspi.h | QSPI basic functionality
IfxQspi_cfg.c | QSPI on-chip implementation data
IfxQspi_cfg.h | QSPI on-chip implementation data
IfxQspi_PinMap.c | QSPI I/O map
IfxQspi_PinMap.h | QSPI I/O map
IfxQspi_SpiMaster.c | QSPI SPIMASTER details
IfxQspi_SpiMaster.h | QSPI SPIMASTER details
IfxQspi_SpiSlave.c | QSPI SPISLAVE details
IfxQspi_SpiSlave.h | QSPI SPISLAVE details
IfxScu_cfg.c | SCU on-chip implementation data
IfxScu_cfg.h | SCU on-chip implementation data
IfxScu_PinMap.c | SCU I/O map
IfxScu_PinMap.h | SCU I/O map
IfxScuCcu.c | SCU basic functionality
IfxScuCcu.h | SCU basic functionality
IfxScuEru.c | SCU basic functionality
IfxScuEru.h | SCU basic functionality
IfxScuWdt.asm.h | SCU basic functionality
IfxScuWdt.c | SCU basic functionality
IfxScuWdt.h | SCU basic functionality
IfxSent.c | SENT basic functionality
IfxSent.h | SENT basic functionality
IfxSent_cfg.c | SENT on-chip implementation data
IfxSent_cfg.h | SENT on-chip implementation data
IfxSent_PinMap.c | SENT I/O map
IfxSent_PinMap.h | SENT I/O map
IfxSent_Sent.c | SENT SENT details
IfxSent_Sent.h | SENT SENT details
IfxSmu.c | SMU basic functionality
IfxSmu.h | SMU basic functionality
IfxSmu_cfg.c | SMU on-chip implementation data
IfxSmu_cfg.h | SMU on-chip implementation data
IfxSmu_PinMap.c | SMU I/O map
IfxSmu_PinMap.h | SMU I/O map
IfxSrc.c | SRC basic functionality
IfxSrc.h | SRC basic functionality
IfxSrc_cfg.c | SRC on-chip implementation data
IfxSrc_cfg.h | SRC on-chip implementation data
IfxStdIf.h | Standard interface types
IfxStdIf_DPipe.c | Standard interface: Data Pipe
IfxStdIf_DPipe.h | Standard interface: Data Pipe
IfxStdIf_Pos.c | Standard interface: Position interface
IfxStdIf_Pos.h | Standard interface: Position interface
IfxStdIf_PwmHl.c | Standard interface: Multi-channels, dual-complementary PWM interface
IfxStdIf_PwmHl.h | Standard interface: Multi-channels, dual-complementary PWM interface
IfxStdIf_Timer.c | Standard interface: Timer
IfxStdIf_Timer.h | Standard interface: Timer
IfxStm.c | STM basic functionality
IfxStm.h | STM basic functionality
IfxStm_cfg.c | STM on-chip implementation data
IfxStm_cfg.h | STM on-chip implementation data
IfxStm_Timer.c | STM TIMER details
IfxStm_Timer.h | STM TIMER details
IfxVadc.c | VADC basic functionality
IfxVadc.h | VADC basic functionality
IfxVadc_Adc.c | VADC ADC details
IfxVadc_Adc.h | VADC ADC details
IfxVadc_cfg.c | VADC on-chip implementation data
IfxVadc_cfg.h | VADC on-chip implementation data
IfxVadc_PinMap.c | VADC I/O map
IfxVadc_PinMap.h | VADC I/O map
lld_api.c |
lld_codingRules.c |
lld_codingRules_codeFormating.c |
lld_codingRules_commonApis.c |
lld_conventions.c |
lld_conventionsDoxygen.c |
lld_dosanddont.c |
lld_dosanddont_enumUsage.c |
lld_dosanddont_namingConvention.c |
lld_dosanddont_optimisation.c |
lld_filesAndConfig.c |
lld_structure.c |
lld_versioning.c |
mainpage.c |
Platform_Types.h |
PwmHl.h | Multi-channels, dual-complementary PWM interface
SpiIf.c | SPI interface
SpiIf.h | SPI interface types
Timer.h | Timer interface
TPwm.h | TPWM interface


iLLD_TC26B: Assert.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Functions | Variables
Assert.c File Reference

Assert functions. More...

#include "Assert.h"
Include dependency graph for Assert.c:

Go to the source code of this file.

Functions

void | Ifx_Assert_doLevel (uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
boolean | Ifx_Assert_doValidate (boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)

Variables

const pchar Assert_level [6]

Detailed Description

Assert functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:29 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Assert.c.

Variable Documentation

◆ Assert_level

const pchar Assert_level[6]
Initial value:
= {
"OFF",
"FAILURE",
"ERROR",
"WARNING",
"INFO",
"DEBUG"
}

Definition at line 48 of file Assert.c.

Referenced by Ifx_Assert_doLevel(), and Ifx_Assert_doValidate().


iLLD_TC26B: CompilerDcc.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerDcc.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerDcc.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:39 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file CompilerDcc.c.


iLLD_TC26B: CompilerDcc.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerDcc.h File Reference
#include <stddef.h>
Include dependency graph for CompilerDcc.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS() __asm("\t .weak __A8_MEM, __A9_MEM");
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) _SMALL_DATA_
#define | __SDATA2(cpu) _LITERAL_DATA_
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static __inline__
#define | IFX_PACKED
#define | COMPILER_NAME "DCC"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION 0
#define | IFX_INTERRUPT_FAST IFX_INTERRUPT
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
#define | IFX_INTERRUPT_LEGACY(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file CompilerDcc.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 57 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 58 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 68 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 55 of file CompilerDcc.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 54 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __SDATA1

#define __SDATA1 ( cpu ) _SMALL_DATA_

Definition at line 73 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __SDATA2

#define __SDATA2 ( cpu ) _LITERAL_DATA_

Definition at line 74 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 75 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 76 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 71 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 56 of file CompilerDcc.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 53 of file CompilerDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ COMPILER_NAME

#define COMPILER_NAME "DCC"

Definition at line 86 of file CompilerDcc.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION 0

Definition at line 89 of file CompilerDcc.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 87 of file CompilerDcc.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 128 of file CompilerDcc.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS

Definition at line 133 of file CompilerDcc.h.

◆ IFX_INLINE

#define IFX_INLINE static __inline__

Definition at line 81 of file CompilerDcc.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 102 of file CompilerDcc.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST IFX_INTERRUPT

Definition at line 90 of file CompilerDcc.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt(prio) __vector_table(vectabNum) isr(void)

Definition at line 107 of file CompilerDcc.h.

◆ IFX_INTERRUPT_LEGACY

#define IFX_INTERRUPT_LEGACY | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__asm ("\t.align\t 5\n\t\.section .int."#prio"\n \t.sectionlink .inttab"#vectabNum".intvec."#prio"\n\#$$bf\n\__intvec_tc"#vectabNum"_"#prio":\n\ movh.a\t %a14,"#isr"@ha\n\ lea\t %a14,[%a14]"#isr"@l\n\ ji\t %a14\n\#$$ef\n\t\.section .intend."#prio"\n \t.sectionlink .text");\
__interrupt__ void isr (void)

Definition at line 112 of file CompilerDcc.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 137 of file CompilerDcc.h.

◆ IFX_PACKED

#define IFX_PACKED

Definition at line 84 of file CompilerDcc.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 141 of file CompilerDcc.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 145 of file CompilerDcc.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 149 of file CompilerDcc.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 153 of file CompilerDcc.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( ) __asm("\t .weak __A8_MEM, __A9_MEM");

ASM extern definitions

Definition at line 60 of file CompilerDcc.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
extern unsigned int __CSA##cpu##_END[];
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:54
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerDcc.h:55
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:57
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:53
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerDcc.h:56

context save area end

Definition at line 39 of file CompilerDcc.h.


iLLD_TC26B: CompilerGhs.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGhs.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerGhs.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:40 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file CompilerGhs.c.


iLLD_TC26B: CompilerGhs.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerGhs.h File Reference

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS()
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) __A0_MEM
#define | __SDATA2(cpu) __A1_MEM
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
#define | IFX_PACKED __packed
#define | COMPILER_NAME "GHS"
#define | COMPILER_VERSION __GHS_VERSION_NUMBER
#define | COMPILER_REVISION __GHS_REVISION_VALUE
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS __attribute__((fardata))
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file CompilerGhs.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 70 of file CompilerGhs.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 71 of file CompilerGhs.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 77 of file CompilerGhs.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 68 of file CompilerGhs.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 67 of file CompilerGhs.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) __A0_MEM

Definition at line 82 of file CompilerGhs.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) __A1_MEM

Definition at line 83 of file CompilerGhs.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 84 of file CompilerGhs.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 85 of file CompilerGhs.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 80 of file CompilerGhs.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 69 of file CompilerGhs.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 66 of file CompilerGhs.h.

◆ COMPILER_NAME

#define COMPILER_NAME "GHS"

Definition at line 102 of file CompilerGhs.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION __GHS_REVISION_VALUE

Definition at line 105 of file CompilerGhs.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __GHS_VERSION_NUMBER

Definition at line 103 of file CompilerGhs.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 134 of file CompilerGhs.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __attribute__((fardata))

Definition at line 139 of file CompilerGhs.h.

◆ IFX_INLINE

#define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */

Definition at line 97 of file CompilerGhs.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 117 of file CompilerGhs.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__attribute__((section(".intvec_tc"#vectabNum"_"#prio))) void iVecEntry##vectabNum##_##prio(void) \
{ \
__asm__("movh.a a14, %hi("#isr") \n" \
"lea a14, [a14]%lo("#isr")\n" \
"ji a14"); \
} \
__interrupt void isr(void)

Definition at line 121 of file CompilerGhs.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 143 of file CompilerGhs.h.

◆ IFX_PACKED

#define IFX_PACKED __packed

Definition at line 100 of file CompilerGhs.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 147 of file CompilerGhs.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 151 of file CompilerGhs.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 155 of file CompilerGhs.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 159 of file CompilerGhs.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( )
Value:
extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
extern unsigned int __A9_MEM[];

center of A9 addressable area

Definition at line 37 of file CompilerGhs.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
extern unsigned int __CSA##cpu##_END[];
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerGhs.h:68
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerGhs.h:67
__CSA
#define __CSA(cpu)
Definition: CompilerGhs.h:70
__USTACK
#define __USTACK(cpu)
Definition: CompilerGhs.h:66
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerGhs.h:69

context save area 1 begin

Definition at line 52 of file CompilerGhs.h.


iLLD_TC26B: CompilerGnuc.c File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerGnuc.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerGnuc.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:40 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file CompilerGnuc.c.


iLLD_TC26B: CompilerGnuc.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerGnuc.h File Reference
#include <stddef.h>
Include dependency graph for CompilerGnuc.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS()
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) __A0_MEM
#define | __SDATA2(cpu) __A1_MEM
#define | __SDATA3(cpu) __A8_MEM
#define | __SDATA4(cpu) __A9_MEM
#define | IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
#define | IFX_PACKED __attribute__ ((packed))
#define | COMPILER_NAME "GNUC"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION 0
#define | IFX_INTERRUPT_FAST IFX_INTERRUPT
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_ALIGN(n) __attribute__ ((aligned(n)))
#define | IFX_FAR_ABS __attribute__((fardata))
#define | IFX_NEAR_ABS
#define | IFX_REL_A0
#define | IFX_REL_A1
#define | IFX_REL_A8
#define | IFX_REL_A9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file CompilerGnuc.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 70 of file CompilerGnuc.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 71 of file CompilerGnuc.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 77 of file CompilerGnuc.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 68 of file CompilerGnuc.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 67 of file CompilerGnuc.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) __A0_MEM

Definition at line 82 of file CompilerGnuc.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) __A1_MEM

Definition at line 83 of file CompilerGnuc.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) __A8_MEM

Definition at line 84 of file CompilerGnuc.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) __A9_MEM

Definition at line 85 of file CompilerGnuc.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 80 of file CompilerGnuc.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 69 of file CompilerGnuc.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 66 of file CompilerGnuc.h.

◆ COMPILER_NAME

#define COMPILER_NAME "GNUC"

Definition at line 96 of file CompilerGnuc.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION 0

Definition at line 99 of file CompilerGnuc.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 97 of file CompilerGnuc.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((aligned(n)))

Definition at line 147 of file CompilerGnuc.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __attribute__((fardata))

Definition at line 152 of file CompilerGnuc.h.

◆ IFX_INLINE

#define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */

Definition at line 91 of file CompilerGnuc.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 112 of file CompilerGnuc.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST IFX_INTERRUPT

Definition at line 101 of file CompilerGnuc.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) |
Value:
__asm__ (".ifndef .intr.entry.include \n"\
".altmacro \n"\
".macro .int_entry.2 intEntryLabel, name # define the section and inttab entry code \n"\
" .pushsection .\\intEntryLabel,\"ax\",@progbits \n"\
" __\\intEntryLabel : \n"\
" svlcx \n"\
" movh.a %a14, hi:\\name \n"\
" lea %a14, [%a14]lo:\\name \n"\
" ji %a14 \n"\
" .popsection \n"\
".endm \n"\
".macro .int_entry.1 prio,vectabNum,u,name \n"\
".int_entry.2 intvec_tc\\vectabNum\\u\\prio,(name) # build the unique name \n"\
".endm \n"\
" \n"\
".macro .intr.entry name,vectabNum,prio \n"\
".int_entry.1 %(prio),%(vectabNum),_,name # evaluate the priority and the cpu number \n"\
".endm \n"\
".intr.entry.include: \n"\
".endif \n"\
".intr.entry "#isr","#vectabNum","#prio );\
IFX_EXTERN void __attribute__ ((interrupt_handler)) isr(); \
void isr (void)
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:28

Definition at line 117 of file CompilerGnuc.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS

Definition at line 156 of file CompilerGnuc.h.

◆ IFX_PACKED

#define IFX_PACKED __attribute__ ((packed))

Definition at line 94 of file CompilerGnuc.h.

◆ IFX_REL_A0

#define IFX_REL_A0

Definition at line 160 of file CompilerGnuc.h.

◆ IFX_REL_A1

#define IFX_REL_A1

Definition at line 164 of file CompilerGnuc.h.

◆ IFX_REL_A8

#define IFX_REL_A8

Definition at line 168 of file CompilerGnuc.h.

◆ IFX_REL_A9

#define IFX_REL_A9

Definition at line 172 of file CompilerGnuc.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( )
Value:
extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
extern unsigned int __A9_MEM[];

center of A9 addressable area

Definition at line 37 of file CompilerGnuc.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
extern unsigned int __CSA##cpu##_END[];
__USTACK
#define __USTACK(cpu)
Definition: CompilerGnuc.h:66
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerGnuc.h:69
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerGnuc.h:68
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerGnuc.h:67
__CSA
#define __CSA(cpu)
Definition: CompilerGnuc.h:70

context save area 1 begin

Definition at line 52 of file CompilerGnuc.h.


iLLD_TC26B: Compilers.h File Reference

  • Infra
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  • Tricore
  • Compilers
Macros | Functions
Compilers.h File Reference
#include "Ifx_Cfg.h"
Include dependency graph for Compilers.h:

Go to the source code of this file.

Macros

#define | IFX_STATIC static
#define | IFX_CONST const
#define | CONST_CFG const /* configuration constants are stored in ROM */
#define | IFX_EXTERN extern
#define | NULL_PTR ((void *)0)
#define | CFG_LONG_SIZE_T (0)
#define | IFX_INTERRUPT(isr, vectabNum, prio)
Macro to define Interrupt Service Routine. This macro makes following definitions:
1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.
2) define compiler specific attribute for the interrupt functions.
3) define the Interrupt service routine as Isr function.
To get details about usage of this macro, refer How to define Interrupts?. More...

Functions

void Ifx_C_Init (void)

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-04-07 12:13:19 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Compilers.h.

Macro Definition Documentation

◆ CFG_LONG_SIZE_T

#define CFG_LONG_SIZE_T (0)

Definition at line 58 of file Compilers.h.

◆ CONST_CFG

#define CONST_CFG const /* configuration constants are stored in ROM */

Definition at line 40 of file Compilers.h.

◆ IFX_CONST

#define IFX_CONST const

Definition at line 37 of file Compilers.h.

Referenced by IfxGtm_Trig_toSent(), and IfxGtm_Trig_toVadc().

◆ IFX_EXTERN

#define IFX_EXTERN extern

Definition at line 46 of file Compilers.h.

◆ IFX_STATIC

#define IFX_STATIC static

Definition at line 33 of file Compilers.h.

◆ NULL_PTR

#define NULL_PTR ((void *)0)

Definition at line 53 of file Compilers.h.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), Ifx_Assert_doLevel(), Ifx_Assert_doValidate(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_create(), Ifx_Fifo_init(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_GlobalResources_get(), Ifx_GlobalResources_getItem(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_commandFind(), Ifx_Shell_commandListFind(), Ifx_Shell_execute(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_parseToken(), Ifx_Shell_printSyntax(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), Ifx_Shell_skipWhitespace(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_initModuleConfig(), IfxAsclin_getAddress(), IfxAsclin_initCtsPin(), IfxAsclin_initRxPin(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Spi_initModule(), IfxAsclin_Spi_initModuleConfig(), IfxAsclin_Spi_read(), IfxAsclin_Spi_write(), IfxCcu6_getAddress(), IfxCcu6_Icu_initChannel(), IfxCcu6_Icu_initChannelConfig(), IfxCcu6_Icu_initModule(), IfxCcu6_Icu_initModuleConfig(), IfxCcu6_Icu_startCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_PwmHl_initConfig(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_setOutputPins(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_initConfig(), IfxCcu6_TPwm_initModule(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCif_Cam_getExtraPathPictureInfo(), IfxCif_Cam_initCif(), IfxCif_Cam_initCifDownscaler(), IfxCif_Cam_initMemSize(), IfxCpu_getAddress(), IfxDma_Dma_initChannelConfig(), IfxDsadc_Dsadc_initCarrierGen(), IfxDsadc_Dsadc_initCarrierGenConfig(), IfxDsadc_Dsadc_initChannel(), IfxDsadc_Dsadc_initChannelConfig(), IfxDsadc_initCinPin(), IfxDsadc_initCoutPin(), IfxDsadc_initDinPin(), IfxDsadc_initDsnPin(), IfxDsadc_initDspPin(), IfxDsadc_initItrPin(), IfxDsadc_initSgPin(), IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_stdIfPosInit(), IfxEray_Eray_Node_init(), IfxEray_Eray_Node_initConfig(), IfxEray_getAddress(), IfxEray_readData(), IfxEray_setSlot(), IfxEray_writeData(), IfxEth_getTransmitBuffer(), IfxEth_init(), IfxEth_initConfig(), IfxEth_setupMiiInputPins(), IfxEth_setupMiiOutputPins(), IfxEth_waitTransmitBuffer(), IfxFft_Fft_initJob(), IfxFft_Fft_initJobConfig(), IfxFft_Fft_isrInput(), IfxFft_Fft_isrOutput(), IfxFft_Fft_startJob(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_updateAndShiftOff(), IfxGtm_Atom_PwmHl_updatePulseOff(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Tim_In_init(), IfxGtm_Tim_In_initConfig(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_PwmHl_initConfig(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_updateAndShiftOff(), IfxGtm_Tom_PwmHl_updatePulseOff(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_initConfig(), IfxGtm_Trig_toSent(), IfxGtm_Trig_toVadc(), IfxHssl_getHsctAddress(), IfxHssl_getHsslAddress(), IfxI2c_getAddress(), IfxI2c_I2c_initConfig(), IfxI2c_I2c_initModule(), IfxMsc_getAddress(), IfxMsc_initEnPin(), IfxMsc_initFclnPin(), IfxMsc_initFclpPin(), IfxMsc_initInjPin(), IfxMsc_initSdiPin(), IfxMsc_initSonPin(), IfxMsc_initSopPin(), IfxMsc_Msc_initModule(), IfxMsc_Msc_initModuleConfig(), IfxMultican_Can_Node_init(), IfxMultican_Can_Node_initConfig(), IfxMultican_getAddress(), IfxPort_getAddress(), IfxPsi5_initRxPin(), IfxPsi5_initTxPin(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initChannelConfig(), IfxPsi5s_initClkPin(), IfxPsi5s_initRxPin(), IfxPsi5s_initTxPin(), IfxPsi5s_Psi5s_initChannelConfig(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxQspi_getAddress(), IfxQspi_SpiMaster_exchange(), IfxQspi_SpiMaster_getChannelConfig(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_initChannelConfig(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_initModuleConfig(), IfxQspi_SpiMaster_isrDmaReceive(), IfxQspi_SpiMaster_isrDmaTransmit(), IfxQspi_SpiMaster_isrError(), IfxQspi_SpiMaster_read(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_initModuleConfig(), IfxQspi_SpiSlave_read(), IfxQspi_SpiSlave_write(), IfxSent_initSentPin(), IfxSent_initSpcPin(), IfxSent_Sent_initChannel(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModuleConfig(), IfxStm_getAddress(), IfxVadc_Adc_initChannelConfig(), IfxVadc_Adc_initExternalMultiplexerMode(), IfxVadc_Adc_initExternalMultiplexerModeConfig(), and SpiIf_initConfig().

Function Documentation

◆ Ifx_C_Init()

void Ifx_C_Init ( void )

Referenced by _Core0_start().


iLLD_TC26B: CompilerTasking.c File Reference

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  • Platform
  • Tricore
  • Compilers
CompilerTasking.c File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Compilers.h"
Include dependency graph for CompilerTasking.c:

Go to the source code of this file.

Detailed Description

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:41 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file CompilerTasking.c.


iLLD_TC26B: CompilerTasking.h File Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Macros
CompilerTasking.h File Reference
#include <stddef.h>
Include dependency graph for CompilerTasking.h:

Go to the source code of this file.

Macros

#define | IFXCOMPILER_COMMON_LINKER_SYMBOLS() __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");
#define | IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
#define | __USTACK(cpu) __USTACK##cpu
#define | __ISTACK(cpu) __ISTACK##cpu
#define | __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
#define | __CSA(cpu) __CSA##cpu
#define | __CSA_END(cpu) __CSA##cpu##_END
#define | __INTTAB(cpu) __INTTAB_CPU##cpu
#define | __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
#define | __SDATA1(cpu) _SMALL_DATA_
#define | __SDATA2(cpu) _LITERAL_DATA_
#define | __SDATA3(cpu) _A8_DATA_
#define | __SDATA4(cpu) _A9_DATA_
#define | IFX_INLINE inline
#define | IFX_PACKED
#define | COMPILER_NAME "TASKING"
#define | COMPILER_VERSION __VERSION__
#define | COMPILER_REVISION __REVISION__
#define | IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
#define | IFX_INTERRUPT_FAST(isr, vectabNum, prio) void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)
#define | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
#define | IFX_ALIGN(n) __attribute__ ((__align(n)))
#define | IFX_FAR_ABS __far
#define | IFX_NEAR_ABS __near
#define | IFX_REL_A0 __a0
#define | IFX_REL_A1 __a1
#define | IFX_REL_A8 __a8
#define | IFX_REL_A9 __a9

Detailed Description

Version
iLLD_New
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file CompilerTasking.h.

Macro Definition Documentation

◆ __CSA

#define __CSA ( cpu ) __CSA##cpu

Definition at line 64 of file CompilerTasking.h.

◆ __CSA_END

#define __CSA_END ( cpu ) __CSA##cpu##_END

Definition at line 65 of file CompilerTasking.h.

◆ __INTTAB

#define __INTTAB ( cpu ) __INTTAB_CPU##cpu

Definition at line 71 of file CompilerTasking.h.

◆ __INTTAB_CPU

#define __INTTAB_CPU ( cpu ) __INTTAB_CPU##cpu

Definition at line 62 of file CompilerTasking.h.

◆ __ISTACK

#define __ISTACK ( cpu ) __ISTACK##cpu

Definition at line 61 of file CompilerTasking.h.

◆ __SDATA1

#define __SDATA1 ( cpu ) _SMALL_DATA_

Definition at line 76 of file CompilerTasking.h.

◆ __SDATA2

#define __SDATA2 ( cpu ) _LITERAL_DATA_

Definition at line 77 of file CompilerTasking.h.

◆ __SDATA3

#define __SDATA3 ( cpu ) _A8_DATA_

Definition at line 78 of file CompilerTasking.h.

◆ __SDATA4

#define __SDATA4 ( cpu ) _A9_DATA_

Definition at line 79 of file CompilerTasking.h.

◆ __TRAPTAB

#define __TRAPTAB ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 74 of file CompilerTasking.h.

◆ __TRAPTAB_CPU

#define __TRAPTAB_CPU ( cpu ) __TRAPTAB_CPU##cpu

Definition at line 63 of file CompilerTasking.h.

◆ __USTACK

#define __USTACK ( cpu ) __USTACK##cpu

Definition at line 60 of file CompilerTasking.h.

◆ COMPILER_NAME

#define COMPILER_NAME "TASKING"

Definition at line 93 of file CompilerTasking.h.

◆ COMPILER_REVISION

#define COMPILER_REVISION __REVISION__

Definition at line 97 of file CompilerTasking.h.

◆ COMPILER_VERSION

#define COMPILER_VERSION __VERSION__

Definition at line 94 of file CompilerTasking.h.

◆ IFX_ALIGN

#define IFX_ALIGN ( n ) __attribute__ ((__align(n)))

Definition at line 122 of file CompilerTasking.h.

◆ IFX_FAR_ABS

#define IFX_FAR_ABS __far

Definition at line 127 of file CompilerTasking.h.

◆ IFX_INLINE

#define IFX_INLINE inline

Definition at line 87 of file CompilerTasking.h.

◆ IFX_INTERRUPT

#define IFX_INTERRUPT | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)

Definition at line 110 of file CompilerTasking.h.

◆ IFX_INTERRUPT_FAST

#define IFX_INTERRUPT_FAST | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)

Definition at line 112 of file CompilerTasking.h.

◆ IFX_INTERRUPT_INTERNAL

#define IFX_INTERRUPT_INTERNAL | ( | isr,
 |  | vectabNum,
 |  | prio
 | ) | void __interrupt(prio) __vector_table(vectabNum) isr(void)

Definition at line 116 of file CompilerTasking.h.

◆ IFX_NEAR_ABS

#define IFX_NEAR_ABS __near

Definition at line 131 of file CompilerTasking.h.

◆ IFX_PACKED

#define IFX_PACKED

Definition at line 91 of file CompilerTasking.h.

◆ IFX_REL_A0

#define IFX_REL_A0 __a0

Definition at line 135 of file CompilerTasking.h.

◆ IFX_REL_A1

#define IFX_REL_A1 __a1

Definition at line 139 of file CompilerTasking.h.

◆ IFX_REL_A8

#define IFX_REL_A8 __a8

Definition at line 143 of file CompilerTasking.h.

◆ IFX_REL_A9

#define IFX_REL_A9 __a9

Definition at line 147 of file CompilerTasking.h.

◆ IFXCOMPILER_COMMON_LINKER_SYMBOLS

#define IFXCOMPILER_COMMON_LINKER_SYMBOLS ( ) __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");

Definition at line 38 of file CompilerTasking.h.

◆ IFXCOMPILER_CORE_LINKER_SYMBOLS

#define IFXCOMPILER_CORE_LINKER_SYMBOLS ( cpu )
Value:
__asm("\t .extern __USTACK"#cpu); /**< user stack end is required as asm to be used with setreg macro */ \
extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
extern unsigned int __CSA##cpu##_END[];
__CSA
#define __CSA(cpu)
Definition: CompilerTasking.h:64
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerTasking.h:61
__TRAPTAB_CPU
#define __TRAPTAB_CPU(cpu)
Definition: CompilerTasking.h:63
__INTTAB_CPU
#define __INTTAB_CPU(cpu)
Definition: CompilerTasking.h:62

context save area end

Definition at line 45 of file CompilerTasking.h.


iLLD_TC26B: Ifx_AngleTrkF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions
Ifx_AngleTrkF32.c File Reference

Angle-tracking observer for sin/cos analog position sensor. More...

#include "Ifx_AngleTrkF32.h"
#include <math.h>
#include "string.h"
#include "Ifx_LutAtan2F32.h"
Include dependency graph for Ifx_AngleTrkF32.c:

Go to the source code of this file.

Macros

#define | IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32
#define | ATO_T (15e-3f)
#define | ATO_K (39.05f)
#define | ATO_PSI (1.5f * IFX_PI)

Functions

void | Ifx_AngleTrkF32_setUserSampling (Ifx_AngleTrkF32 *aObsv, float32 Ts)
IFX_INLINE float32 | Ifx_AngleTrkF32_bound (float32 angle, float32 periodPerRotation)
IFX_INLINE float32 | Ifx_AngleTrkF32_boundInput (float32 input)
float32 | round_f (float32 val)
void | Ifx_AngleTrkF32_setControlGains (Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
void | Ifx_AngleTrkF32_initConfig (Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values. More...
void | Ifx_AngleTrkF32_init (Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object. More...
float32 | Ifx_AngleTrkF32_step (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisation (call to Ifx_AngleTrkF32_init()). More...
void | Ifx_AngleTrkF32_setOffset (Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks) More...
void | Ifx_AngleTrkF32_updateStatus (Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags. More...
void | Ifx_AngleTrkF32_update (Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input. More...
IfxStdIf_Pos_RawAngle | Ifx_AngleTrkF32_getRawPosition (Ifx_AngleTrkF32 *aObsv)
Returns the actual position. More...
float32 | Ifx_AngleTrkF32_getSpeed (Ifx_AngleTrkF32 *aObsv)
Returns the Speed. More...
float32 | Ifx_AngleTrkF32_getAbsolutePosition (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_Dir | Ifx_AngleTrkF32_getDirection (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_Status | Ifx_AngleTrkF32_getFault (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getOffset (Ifx_AngleTrkF32 *driver)
uint16 | Ifx_AngleTrkF32_getPeriodPerRotation (Ifx_AngleTrkF32 *driver)
float32 | Ifx_AngleTrkF32_getPosition (Ifx_AngleTrkF32 *driver)
float32 | Ifx_AngleTrkF32_getRefreshPeriod (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getResolution (Ifx_AngleTrkF32 *driver)
IfxStdIf_Pos_SensorType | Ifx_AngleTrkF32_getSensorType (Ifx_AngleTrkF32 *driver)
sint32 | Ifx_AngleTrkF32_getTurn (Ifx_AngleTrkF32 *driver)
void | Ifx_AngleTrkF32_resetFaults (Ifx_AngleTrkF32 *driver)
void | Ifx_AngleTrkF32_setRefreshPeriod (Ifx_AngleTrkF32 *driver, float32 updatePeriod)
void | Ifx_AngleTrkF32_reset (Ifx_AngleTrkF32 *driver)
boolean | Ifx_AngleTrkF32_stdIfPosInit (IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos". More...

Detailed Description

Angle-tracking observer for sin/cos analog position sensor.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_AngleTrkF32.c.

Macro Definition Documentation

◆ ATO_K

#define ATO_K (39.05f)

Definition at line 101 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ ATO_PSI

#define ATO_PSI (1.5f * IFX_PI)

Definition at line 102 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ ATO_T

#define ATO_T (15e-3f)

Definition at line 100 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ IFX_ANGLETRKF32_ATAN2F

#define IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32

Definition at line 37 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_step().

Function Documentation

◆ Ifx_AngleTrkF32_bound()

IFX_INLINE float32 Ifx_AngleTrkF32_bound | ( | float32 | angle,
 |  | float32 | periodPerRotation
 | ) |  |

Definition at line 53 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_boundInput().

◆ Ifx_AngleTrkF32_boundInput()

IFX_INLINE float32 Ifx_AngleTrkF32_boundInput ( float32 input )

Definition at line 73 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_step().

◆ Ifx_AngleTrkF32_setControlGains()

void Ifx_AngleTrkF32_setControlGains | ( | Ifx_AngleTrkF32_CfgData * | cfgData,
 |  | float32 | K,
 |  | float32 | T,
 |  | float32 | psi
 | ) |  |

Definition at line 104 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init(), and Ifx_AngleTrkF32_initConfig().

◆ Ifx_AngleTrkF32_setUserSampling()

void Ifx_AngleTrkF32_setUserSampling | ( | Ifx_AngleTrkF32 * | aObsv,
 |  | float32 | Ts
 | ) |  |

Definition at line 133 of file Ifx_AngleTrkF32.c.

Referenced by Ifx_AngleTrkF32_init().

◆ Ifx_AngleTrkF32_stdIfPosInit()

boolean Ifx_AngleTrkF32_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | Ifx_AngleTrkF32 * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | Virtual position sensor
Returns
TRUE on success else FALSE

Definition at line 410 of file Ifx_AngleTrkF32.c.

◆ round_f()

float32 round_f ( float32 val )

Definition at line 79 of file Ifx_AngleTrkF32.c.


iLLD_TC26B: Ifx_Cf32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_Cf32.c File Reference

Floating point signal, vector, and matrix library. More...

#include "Ifx_Cf32.h"
#include <float.h>
#include <stdio.h>
Include dependency graph for Ifx_Cf32.c:

Go to the source code of this file.

Functions

void | CplxVecRst_f32 (cfloat32 *X, short nX)
void | CplxVecCpy_f32S (cfloat32 *X, short *S, short nS, short incrS)
void | CplxVecCpy_f32 (cfloat32 *X, cfloat32 *S, short nS)
float32 * | CplxVecPwr_f32 (cfloat32 *X, short nX)
float32 * | CplxVecMag_f32 (cfloat32 *X, short nX)
void | CplxVecMul_f32 (cfloat32 *X, const cfloat32 *mul, short nX)
void | VecPwrdB_f32 (float32 *X, short nX)
void | VecPwrdB_SF (sint16 *R, float32 *X, short nX)
float32 | VecMaxIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
float32 | VecMinIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
void | VecOfs_f32 (float32 *X, float32 offset, short nX)
void | VecGain_f32 (float32 *X, float32 gain, short nX)
float32 | VecSum_f32 (float32 *X, short nX)
float32 | VecAvg_f32 (float32 *X, short nX)
float32 | VecMax_f32 (float32 *X, short nX)
float32 | VecMin_f32 (float32 *X, short nX)
void | VecHalfSwap_f32 (float32 *X, short nX)
void | VecWin_f32 (float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Cf32.c.

Function Documentation

◆ CplxVecCpy_f32()

void CplxVecCpy_f32 | ( | cfloat32 * | X,
 |  | cfloat32 * | S,
 |  | short | nS
 | ) |  |

Definition at line 50 of file Ifx_Cf32.c.

◆ CplxVecCpy_f32S()

void CplxVecCpy_f32S | ( | cfloat32 * | X,
 |  | short * | S,
 |  | short | nS,
 |  | short | incrS
 | ) |  |

Definition at line 39 of file Ifx_Cf32.c.

◆ CplxVecMag_f32()

float32* CplxVecMag_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 75 of file Ifx_Cf32.c.

◆ CplxVecMul_f32()

void CplxVecMul_f32 | ( | cfloat32 * | X,
 |  | const cfloat32 * | mul,
 |  | short | nX
 | ) |  |

Definition at line 90 of file Ifx_Cf32.c.

◆ CplxVecPwr_f32()

float32* CplxVecPwr_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 60 of file Ifx_Cf32.c.

◆ CplxVecRst_f32()

void CplxVecRst_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 29 of file Ifx_Cf32.c.

◆ VecAvg_f32()

float32 VecAvg_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 213 of file Ifx_Cf32.c.

◆ VecGain_f32()

void VecGain_f32 | ( | float32 * | X,
 |  | float32 | gain,
 |  | short | nX
 | ) |  |

Definition at line 186 of file Ifx_Cf32.c.

◆ VecHalfSwap_f32()

void VecHalfSwap_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 249 of file Ifx_Cf32.c.

◆ VecMax_f32()

float32 VecMax_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 219 of file Ifx_Cf32.c.

◆ VecMaxIdx_f32()

float32 VecMaxIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 124 of file Ifx_Cf32.c.

◆ VecMin_f32()

float32 VecMin_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 234 of file Ifx_Cf32.c.

◆ VecMinIdx_f32()

float32 VecMinIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 149 of file Ifx_Cf32.c.

◆ VecOfs_f32()

void VecOfs_f32 | ( | float32 * | X,
 |  | float32 | offset,
 |  | short | nX
 | ) |  |

Definition at line 174 of file Ifx_Cf32.c.

◆ VecPwrdB_f32()

void VecPwrdB_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 100 of file Ifx_Cf32.c.

◆ VecPwrdB_SF()

void VecPwrdB_SF | ( | sint16 * | R,
 |  | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 112 of file Ifx_Cf32.c.

◆ VecSum_f32()

float32 VecSum_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 198 of file Ifx_Cf32.c.

Referenced by VecAvg_f32().

◆ VecWin_f32()

void VecWin_f32 | ( | float32 * | X,
 |  | const float32 * | W,
 |  | short | nX,
 |  | short | nW,
 |  | short | incrX,
 |  | short | symW
 | ) |  |

Definition at line 268 of file Ifx_Cf32.c.

Referenced by Ifx_WndF32_apply().


iLLD_TC26B: Ifx_Cf32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions
Ifx_Cf32.h File Reference

Floating point signal, vector, and matrix library. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include <math.h>
Include dependency graph for Ifx_Cf32.h:

Go to the source code of this file.

Macros

#define | _DATAF(val) ((float32)(val))
#define | Cplx_f32_printf(...)

Functions

IFX_INLINE cfloat32 | IFX_Cf32_exp (const cfloat32 *c)
IFX_INLINE cfloat32 | IFX_Cf32_mul (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_amp (const cfloat32 *a, float32 gain)
IFX_INLINE float32 | IFX_Cf32_dot (const cfloat32 *b)
IFX_INLINE float32 | IFX_Cf32_mag (const cfloat32 *c)
IFX_INLINE cfloat32 | IFX_Cf32_div (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_add (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE cfloat32 | IFX_Cf32_sub (const cfloat32 *a, const cfloat32 *b)
IFX_INLINE void | IFX_Cf32_set (cfloat32 *a, float32 re, float32 im)
IFX_INLINE void | IFX_Cf32_reset (cfloat32 *a)
IFX_INLINE cfloat32 | IFX_Cf32_saturate (cfloat32 *a, float32 *ampl, float32 limit)
IFX_EXTERN void | CplxVecCpy_f32S (cfloat32 *X, short *S, short nS, short incrS)
IFX_EXTERN void | CplxVecRst_f32 (cfloat32 *X, short nX)
IFX_EXTERN void | CplxVecCpy_f32 (cfloat32 *X, cfloat32 *S, short nS)
IFX_EXTERN float32 * | CplxVecPwr_f32 (cfloat32 *X, short nX)
IFX_EXTERN float32 * | CplxVecMag_f32 (cfloat32 *X, short nX)
IFX_EXTERN void | CplxVecMul_f32 (cfloat32 *X, const cfloat32 *mul, short nX)
IFX_EXTERN void | VecWin_f32 (float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
IFX_EXTERN void | VecPwrdB_f32 (float32 *X, short nX)
IFX_EXTERN void | VecPwrdB_SF (sint16 *R, float32 *X, short nX)
IFX_EXTERN void | VecGain_f32 (float32 *X, float32 gain, short nX)
IFX_EXTERN void | VecOfs_f32 (float32 *X, float32 offset, short nX)
IFX_EXTERN float32 | VecSum_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecAvg_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMax_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMin_f32 (float32 *X, short nX)
IFX_EXTERN float32 | VecMinIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
IFX_EXTERN float32 | VecMaxIdx_f32 (float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
IFX_EXTERN void | VecHalfSwap_f32 (float32 *X, short nX)

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Cf32.h.

Macro Definition Documentation

◆ _DATAF

#define _DATAF ( val ) ((float32)(val))

Definition at line 34 of file Ifx_Cf32.h.

◆ Cplx_f32_printf

#define Cplx_f32_printf ( ... )

Definition at line 161 of file Ifx_Cf32.h.

Function Documentation

◆ CplxVecCpy_f32()

IFX_EXTERN void CplxVecCpy_f32 | ( | cfloat32 * | X,
 |  | cfloat32 * | S,
 |  | short | nS
 | ) |  |

Definition at line 50 of file Ifx_Cf32.c.

◆ CplxVecCpy_f32S()

IFX_EXTERN void CplxVecCpy_f32S | ( | cfloat32 * | X,
 |  | short * | S,
 |  | short | nS,
 |  | short | incrS
 | ) |  |

Definition at line 39 of file Ifx_Cf32.c.

◆ CplxVecMag_f32()

IFX_EXTERN float32* CplxVecMag_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 75 of file Ifx_Cf32.c.

◆ CplxVecMul_f32()

IFX_EXTERN void CplxVecMul_f32 | ( | cfloat32 * | X,
 |  | const cfloat32 * | mul,
 |  | short | nX
 | ) |  |

Definition at line 90 of file Ifx_Cf32.c.

◆ CplxVecPwr_f32()

IFX_EXTERN float32* CplxVecPwr_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 60 of file Ifx_Cf32.c.

◆ CplxVecRst_f32()

IFX_EXTERN void CplxVecRst_f32 | ( | cfloat32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 29 of file Ifx_Cf32.c.

◆ IFX_Cf32_add()

IFX_INLINE cfloat32 IFX_Cf32_add | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 87 of file Ifx_Cf32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ IFX_Cf32_amp()

IFX_INLINE cfloat32 IFX_Cf32_amp | ( | const cfloat32 * | a,
 |  | float32 | gain
 | ) |  |

Definition at line 56 of file Ifx_Cf32.h.

◆ IFX_Cf32_div()

IFX_INLINE cfloat32 IFX_Cf32_div | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 77 of file Ifx_Cf32.h.

◆ IFX_Cf32_dot()

IFX_INLINE float32 IFX_Cf32_dot ( const cfloat32 * b )

Definition at line 65 of file Ifx_Cf32.h.

Referenced by CplxVecPwr_f32(), IFX_Cf32_div(), and IFX_Cf32_mag().

◆ IFX_Cf32_exp()

IFX_INLINE cfloat32 IFX_Cf32_exp ( const cfloat32 * c )

Definition at line 37 of file Ifx_Cf32.h.

◆ IFX_Cf32_mag()

IFX_INLINE float32 IFX_Cf32_mag ( const cfloat32 * c )

Definition at line 71 of file Ifx_Cf32.h.

Referenced by CplxVecMag_f32(), and IFX_Cf32_saturate().

◆ IFX_Cf32_mul()

IFX_INLINE cfloat32 IFX_Cf32_mul | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 47 of file Ifx_Cf32.h.

Referenced by CplxVecMul_f32(), and Ifx_FftF32_radix2DecimationInTime().

◆ IFX_Cf32_reset()

IFX_INLINE void IFX_Cf32_reset ( cfloat32 * a )

Definition at line 112 of file Ifx_Cf32.h.

◆ IFX_Cf32_saturate()

IFX_INLINE cfloat32 IFX_Cf32_saturate | ( | cfloat32 * | a,
 |  | float32 * | ampl,
 |  | float32 | limit
 | ) |  |

Definition at line 118 of file Ifx_Cf32.h.

◆ IFX_Cf32_set()

IFX_INLINE void IFX_Cf32_set | ( | cfloat32 * | a,
 |  | float32 | re,
 |  | float32 | im
 | ) |  |

Definition at line 105 of file Ifx_Cf32.h.

Referenced by IFX_Cf32_reset().

◆ IFX_Cf32_sub()

IFX_INLINE cfloat32 IFX_Cf32_sub | ( | const cfloat32 * | a,
 |  | const cfloat32 * | b
 | ) |  |

Definition at line 96 of file Ifx_Cf32.h.

Referenced by Ifx_FftF32_radix2DecimationInTime().

◆ VecAvg_f32()

IFX_EXTERN float32 VecAvg_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 213 of file Ifx_Cf32.c.

◆ VecGain_f32()

IFX_EXTERN void VecGain_f32 | ( | float32 * | X,
 |  | float32 | gain,
 |  | short | nX
 | ) |  |

Definition at line 186 of file Ifx_Cf32.c.

◆ VecHalfSwap_f32()

IFX_EXTERN void VecHalfSwap_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 249 of file Ifx_Cf32.c.

◆ VecMax_f32()

IFX_EXTERN float32 VecMax_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 219 of file Ifx_Cf32.c.

◆ VecMaxIdx_f32()

IFX_EXTERN float32 VecMaxIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 124 of file Ifx_Cf32.c.

◆ VecMin_f32()

IFX_EXTERN float32 VecMin_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 234 of file Ifx_Cf32.c.

◆ VecMinIdx_f32()

IFX_EXTERN float32 VecMinIdx_f32 | ( | float32 * | X,
 |  | short | nX,
 |  | sint16 * | minIdx,
 |  | sint16 * | maxIdx
 | ) |  |

Definition at line 149 of file Ifx_Cf32.c.

◆ VecOfs_f32()

IFX_EXTERN void VecOfs_f32 | ( | float32 * | X,
 |  | float32 | offset,
 |  | short | nX
 | ) |  |

Definition at line 174 of file Ifx_Cf32.c.

◆ VecPwrdB_f32()

IFX_EXTERN void VecPwrdB_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 100 of file Ifx_Cf32.c.

◆ VecPwrdB_SF()

IFX_EXTERN void VecPwrdB_SF | ( | sint16 * | R,
 |  | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 112 of file Ifx_Cf32.c.

◆ VecSum_f32()

IFX_EXTERN float32 VecSum_f32 | ( | float32 * | X,
 |  | short | nX
 | ) |  |

Definition at line 198 of file Ifx_Cf32.c.

Referenced by VecAvg_f32().

◆ VecWin_f32()

IFX_EXTERN void VecWin_f32 | ( | float32 * | X,
 |  | const float32 * | W,
 |  | short | nX,
 |  | short | nW,
 |  | short | incrX,
 |  | short | symW
 | ) |  |

Definition at line 268 of file Ifx_Cf32.c.

Referenced by Ifx_WndF32_apply().


iLLD_TC26B: Ifx_CircularBuffer.asm.c File Reference

  • _Lib
  • DataHandling
Ifx_CircularBuffer.asm.c File Reference

Circular buffer functions (assembler implementation). More...

#include "Ifx_CircularBuffer.h"
Include dependency graph for Ifx_CircularBuffer.asm.c:

Go to the source code of this file.

Detailed Description

Circular buffer functions (assembler implementation).

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_CircularBuffer.asm.c.


iLLD_TC26B: Ifx_CircularBuffer.c File Reference

  • _Lib
  • DataHandling
Functions
Ifx_CircularBuffer.c File Reference

Circular buffer functions in C language. More...

#include "Ifx_CircularBuffer.h"
Include dependency graph for Ifx_CircularBuffer.c:

Go to the source code of this file.

Functions

uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
void | Ifx_CircularBuffer_addDataIncr (Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

Circular buffer functions in C language.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_CircularBuffer.c.

Function Documentation

◆ Ifx_CircularBuffer_addDataIncr()

void Ifx_CircularBuffer_addDataIncr | ( | Ifx_CircularBuffer * | buffer,
 |  | uint32 | data
 | ) |  |

Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer.

Parameters
buffer | Specifies circular buffer.
data | Specifies value to be added to the buffer.
Returns
None.

Definition at line 66 of file Ifx_CircularBuffer.c.


iLLD_TC26B: Ifx_CircularBuffer.h File Reference

  • _Lib
  • DataHandling
Macros | Functions
Ifx_CircularBuffer.h File Reference

Circular buffer functions. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_CircularBuffer.h:

Go to the source code of this file.

Macros

#define IFX_CFG_CIRCULARBUFFER_C (1)

Functions

uint16 | Ifx_CircularBuffer_get16 (Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer. More...
uint32 | Ifx_CircularBuffer_get32 (Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer. More...
void * | Ifx_CircularBuffer_read8 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array. More...
void * | Ifx_CircularBuffer_read32 (Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array. More...
const void * | Ifx_CircularBuffer_write8 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer. More...
const void * | Ifx_CircularBuffer_write32 (Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer. More...

Detailed Description

Circular buffer functions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_CircularBuffer.h.

Macro Definition Documentation

◆ IFX_CFG_CIRCULARBUFFER_C

#define IFX_CFG_CIRCULARBUFFER_C (1)

Definition at line 37 of file Ifx_CircularBuffer.h.


iLLD_TC26B: Ifx_Console.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Functions | Variables
Ifx_Console.c File Reference

Main Ifx_Console module implementation file. More...

#include <string.h>
#include <stdio.h>
#include <stdarg.h>
#include "Ifx_Console.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Console.c:

Go to the source code of this file.

Functions

void | Ifx_Console_init (IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object. More...
boolean | Ifx_Console_print (pchar format,...)
Print formatted string into Ifx_g_console. More...
boolean | Ifx_Console_printAlign (pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces. More...

Variables

Ifx_Console Ifx_g_console

Detailed Description

Main Ifx_Console module implementation file.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-03-13 15:49:47 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Console.c.

Variable Documentation

◆ Ifx_g_console

Ifx_Console Ifx_g_console

Definition at line 33 of file Ifx_Console.c.

Referenced by Ifx_Console_init(), Ifx_Console_print(), and Ifx_Console_printAlign().


iLLD_TC26B: Ifx_Crc.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_Crc.c File Reference

CRC algorithm. More...

#include "Ifx_Crc.h"
Include dependency graph for Ifx_Crc.c:

Go to the source code of this file.

Functions

uint32 | Ifx_Crc_reflect (uint32 crc, sint32 bitnum)
boolean | Ifx_Crc_init (Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
boolean | Ifx_Crc_createTable (Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
uint32 | Ifx_Crc_tableFast (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_table (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBit (Ifc_Crc *driver, uint8 *p, uint32 len)
uint32 | Ifx_Crc_bitByBitFast (Ifc_Crc *driver, uint8 *p, uint32 len)

Detailed Description

CRC algorithm.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Crc.c.

Function Documentation

◆ Ifx_Crc_reflect()

uint32 Ifx_Crc_reflect | ( | uint32 | crc,
 |  | sint32 | bitnum
 | ) |  |

Definition at line 184 of file Ifx_Crc.c.

Referenced by Ifx_Crc_bitByBit(), Ifx_Crc_bitByBitFast(), Ifx_Crc_createTable(), Ifx_Crc_table(), and Ifx_Crc_tableFast().


iLLD_TC26B: Ifx_DateTime.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Functions | Variables
Ifx_DateTime.c File Reference

Date and time functions. More...

#include "Ifx_DateTime.h"
#include "SysSe/Bsp/Bsp.h"
Include dependency graph for Ifx_DateTime.c:

Go to the source code of this file.

Functions

void | DateTime_get (Ifx_DateTime *dt)
Get the real time Note that this function is valid only if DateTime_set() has been called. More...
void | DateTime_set (Ifx_DateTime *dt)
Set the real time. More...

Variables

sint32 g_DateTimeOffset

Detailed Description

Date and time functions.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:37 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_DateTime.c.

Variable Documentation

◆ g_DateTimeOffset

sint32 g_DateTimeOffset

Definition at line 29 of file Ifx_DateTime.c.

Referenced by DateTime_get(), and DateTime_set().


iLLD_TC26B: Ifx_FftF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_FftF32.c File Reference

Floating-point Fast Fourier Transform. More...

#include "Ifx_FftF32.h"
#include <math.h>
Include dependency graph for Ifx_FftF32.c:

Go to the source code of this file.

Functions

cfloat32 * | Ifx_FftF32_generateTwiddleFactor (cfloat32 *TF, short nX)
Twiddle factor generator. More...
unsigned short | Ifx_FftF32_reverseBits (unsigned short n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits. More...
void | Ifx_FftF32_radix2DecimationInTime (cfloat32 *R, unsigned long p)
cfloat32 * | Ifx_FftF32_radix2 (cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Fast-Fourier Transform. More...
cfloat32 * | Ifx_FftF32_radix2I (cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Inverse Fast-Fourier Transform. More...

Detailed Description

Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_FftF32.c.

Function Documentation

◆ Ifx_FftF32_radix2DecimationInTime()

void Ifx_FftF32_radix2DecimationInTime | ( | cfloat32 * | R,
 |  | unsigned long | p
 | ) |  |

Definition at line 74 of file Ifx_FftF32.c.

Referenced by Ifx_FftF32_radix2(), and Ifx_FftF32_radix2I().


iLLD_TC26B: Ifx_FftF32_BitReverseTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_FftF32_BitReverseTable.c File Reference

Bit-reversal lookup for Floating-point Fast Fourier Transform. More...

#include "Ifx_FftF32.h"
Include dependency graph for Ifx_FftF32_BitReverseTable.c:

Go to the source code of this file.

Variables

CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable [IFX_FFTF32_MAX_LENGTH]

Detailed Description

Bit-reversal lookup for Floating-point Fast Fourier Transform.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_FftF32_BitReverseTable.c.

Variable Documentation

◆ Ifx_g_FftF32_bitReverseTable

CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]

Definition at line 29 of file Ifx_FftF32_BitReverseTable.c.


iLLD_TC26B: Ifx_FftF32_TwiddleTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_FftF32_TwiddleTable.c File Reference

Floating-point Fast Fourier Transform Twiddle-Factors. More...

#include "Ifx_FftF32.h"
Include dependency graph for Ifx_FftF32_TwiddleTable.c:

Go to the source code of this file.

Variables

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable [IFX_FFTF32_MAX_LENGTH/2]

Detailed Description

Floating-point Fast Fourier Transform Twiddle-Factors.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_FftF32_TwiddleTable.c.

Variable Documentation

◆ Ifx_g_FftF32_twiddleTable

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Definition at line 29 of file Ifx_FftF32_TwiddleTable.c.


iLLD_TC26B: Ifx_Fifo.c File Reference

  • _Lib
  • DataHandling
Functions
Ifx_Fifo.c File Reference

FIFO functions. More...

#include "Ifx_Fifo.h"
#include <stdlib.h>
#include "Ifx_CircularBuffer.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu.h"
#include "SysSe/Bsp/Bsp.h"
Include dependency graph for Ifx_Fifo.c:

Go to the source code of this file.

Functions

Ifx_Fifo * | Ifx_Fifo_create (Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object. More...
void | Ifx_Fifo_destroy (Ifx_Fifo *fifo)
Destroy the FIFO object. More...
Ifx_Fifo * | Ifx_Fifo_init (void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object. More...
boolean | Ifx_Fifo_canReadCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer. More...
Ifx_SizeT | Ifx_Fifo_read (Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer. More...
void | Ifx_Fifo_clear (Ifx_Fifo *fifo)
Clear fifo contents. More...
boolean | Ifx_Fifo_canWriteCount (Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer. More...
Ifx_SizeT | Ifx_Fifo_write (Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo. More...

Detailed Description

FIFO functions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Fifo.c.


iLLD_TC26B: Ifx_IntegralF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_IntegralF32.c File Reference

Discrete integral approximation. More...

#include "Ifx_IntegralF32.h"
Include dependency graph for Ifx_IntegralF32.c:

Go to the source code of this file.

Functions

void | Ifx_IntegralF32_reset (Ifx_IntegralF32 *ci)
Reset the integrator object. More...
void | Ifx_IntegralF32_init (Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
float32 | Ifx_IntegralF32_step (Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object. More...
void | Ifx_ClpxFloat32_Integral_reset (Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object. More...
void | Ifx_ClpxFloat32_Integral_init (Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object. More...
cfloat32 | Ifx_ClpxFloat32_Integral_step (Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object. More...

Detailed Description

Discrete integral approximation.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_IntegralF32.c.


iLLD_TC26B: Ifx_InternalMux.c File Reference

  • _Lib
  • InternalMux
Functions
Ifx_InternalMux.c File Reference

Mux configuration functions. More...

#include "Ifx_InternalMux.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_InternalMux.c:

Go to the source code of this file.

Functions

void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

Mux configuration functions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_InternalMux.c.


iLLD_TC26B: Ifx_InternalMux.h File Reference

  • _Lib
  • InternalMux
Data Structures | Functions
Ifx_InternalMux.h File Reference

Mux configuration functions. More...

#include "Cpu/Std/Ifx_Types.h"
Include dependency graph for Ifx_InternalMux.h:

Go to the source code of this file.

Data Structures

struct | Ifx_InternalMux_MuxConfig
struct | Ifx_InternalMux_Config

Functions

IFX_EXTERN void Ifx_InternalMux_init (const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration. More...

Detailed Description

Mux configuration functions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2015 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_InternalMux.h.


iLLD_TC26B: Ifx_LowPassPt1F32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LowPassPt1F32.c File Reference

Low pass filter PT1. More...

#include "SysSe/Math/Ifx_LowPassPt1F32.h"
Include dependency graph for Ifx_LowPassPt1F32.c:

Go to the source code of this file.

Functions

void | Ifx_LowPassPt1F32_init (Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration. More...
float32 | Ifx_LowPassPt1F32_do (Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter. More...

Detailed Description

Low pass filter PT1.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LowPassPt1F32.c.


iLLD_TC26B: Ifx_Lut.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Typedefs
Ifx_Lut.h File Reference

Lookup defintion with fixed-point angle data type. More...

#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for Ifx_Lut.h:

Go to the source code of this file.

Macros

#define | IFX_LUT_TABLE_CONST (1)
0 = Lookup tables are generated and stored in RAM, 1 = Lookup tables are precompiled and stored in FLASH More...
#define | IFX_LUT_TABLE const
Lookup table type modifier (stored in ROM) More...
#define | IFX_LUT_ANGLE_BITS (12)
Define the resolution (in bits) of cosinus and sinus table. More...
#define | IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
Define the cosinus and sinus table size. More...
#define | IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)
Value used as 180 degree angle. More...
#define | IFX_LUT_F32_TO_FXPANGLE(f) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))
Convert from float32 angle in radian into fixed-point angle type. More...
#define | IFX_LUT_FXPANGLE_TO_F32(fx) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)
Convert from fixed-point angle type to float32 angle in radian. More...

Typedefs

typedef sint32 Ifx_Lut_FxpAngle
Fixed-point angle type. More...

Detailed Description

Lookup defintion with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Lut.h.

Macro Definition Documentation

◆ IFX_LUT_ANGLE_PI

#define IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)

Value used as 180 degree angle.

Definition at line 58 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_fxpAngle(), Ifx_LutLSincosF32_cos(), Ifx_LutLSincosF32_cossin(), Ifx_LutSincosF32_cos(), Ifx_LutSincosF32_cossin(), Ifx_LutSincosF32_init(), and Ifx_LutSincosF32_sin().

◆ IFX_LUT_F32_TO_FXPANGLE

#define IFX_LUT_F32_TO_FXPANGLE ( f ) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))

Convert from float32 angle in radian into fixed-point angle type.

Definition at line 67 of file Ifx_Lut.h.

Referenced by Ifx_LutAtan2F32_init().

◆ IFX_LUT_FXPANGLE_TO_F32

#define IFX_LUT_FXPANGLE_TO_F32 ( fx ) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)

Convert from fixed-point angle type to float32 angle in radian.

Definition at line 70 of file Ifx_Lut.h.

◆ IFX_LUT_TABLE

#define IFX_LUT_TABLE const

Lookup table type modifier (stored in ROM)

Definition at line 45 of file Ifx_Lut.h.

◆ IFX_LUT_TABLE_CONST

#define IFX_LUT_TABLE_CONST (1)

0 = Lookup tables are generated and stored in RAM, 1 = Lookup tables are precompiled and stored in FLASH

Definition at line 40 of file Ifx_Lut.h.

Typedef Documentation

◆ Ifx_Lut_FxpAngle

typedef sint32 Ifx_Lut_FxpAngle

Fixed-point angle type.

Resolution is defined by IFX_LUT_ANGLE_RESOLUTION

Definition at line 64 of file Ifx_Lut.h.


iLLD_TC26B: Ifx_LutAtan2F32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutAtan2F32.c File Reference

ATAN2 lookup functions with fixed-point angle data type. More...

#include "Ifx_LutAtan2F32.h"
#include <math.h>
Include dependency graph for Ifx_LutAtan2F32.c:

Go to the source code of this file.

Functions

void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_INLINE Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAnglePrivate (float32 valf)
IFX_INLINE float32 | Ifx_LutAtan2F32_float32Private (float32 val)
Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...
float32 | Ifx_LutAtan2F32_float32 (float32 y, float32 x)

Detailed Description

ATAN2 lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutAtan2F32.c.

Function Documentation

◆ Ifx_LutAtan2F32_float32()

float32 Ifx_LutAtan2F32_float32 | ( | float32 | y,
 |  | float32 | x
 | ) |  |

Definition at line 128 of file Ifx_LutAtan2F32.c.

◆ Ifx_LutAtan2F32_float32Private()

IFX_INLINE float32 Ifx_LutAtan2F32_float32Private ( float32 val )

Definition at line 61 of file Ifx_LutAtan2F32.c.

Referenced by Ifx_LutAtan2F32_float32().

◆ Ifx_LutAtan2F32_fxpAnglePrivate()

IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate ( float32 valf )

Definition at line 46 of file Ifx_LutAtan2F32.c.

Referenced by Ifx_LutAtan2F32_fxpAngle().


iLLD_TC26B: Ifx_LutAtan2F32.h File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Functions | Variables
Ifx_LutAtan2F32.h File Reference

Floating point signal, vector, and matrix library. More...

#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutAtan2F32.h:

Go to the source code of this file.

Macros

#define IFX_LUTATAN2F32_SIZE (1024)
size of Ifx_LutAtan2F32 table More...

Functions

IFX_EXTERN void | Ifx_LutAtan2F32_init (void)
Initialise the lookup tables. More...
IFX_EXTERN Ifx_Lut_FxpAngle | Ifx_LutAtan2F32_fxpAngle (float32 x, float32 y)
Look-up arcus tangent value of y/x. More...
IFX_EXTERN float32 | Ifx_LutAtan2F32_float32 (float32 y, float32 x)

Variables

IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle | Ifx_g_LutAtan2F32_FxpAngle_table [IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle() More...
IFX_EXTERN IFX_LUT_TABLE float32 | Ifx_g_LutAtan2F32_table [IFX_LUTATAN2F32_SIZE+1]

Detailed Description

Floating point signal, vector, and matrix library.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutAtan2F32.h.

Macro Definition Documentation

◆ IFX_LUTATAN2F32_SIZE

#define IFX_LUTATAN2F32_SIZE (1024)

size of Ifx_LutAtan2F32 table

Definition at line 35 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_float32Private(), Ifx_LutAtan2F32_fxpAnglePrivate(), and Ifx_LutAtan2F32_init().

Function Documentation

◆ Ifx_LutAtan2F32_float32()

IFX_EXTERN float32 Ifx_LutAtan2F32_float32 | ( | float32 | y,
 |  | float32 | x
 | ) |  |

Definition at line 128 of file Ifx_LutAtan2F32.c.

Variable Documentation

◆ Ifx_g_LutAtan2F32_FxpAngle_table

IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]

Table I for Ifx_LutAtan2F32_fxpAngle()

Definition at line 40 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_fxpAnglePrivate(), and Ifx_LutAtan2F32_init().

◆ Ifx_g_LutAtan2F32_table

IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]

Definition at line 41 of file Ifx_LutAtan2F32.h.

Referenced by Ifx_LutAtan2F32_float32Private().


iLLD_TC26B: Ifx_LutAtan2F32_Table.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_LutAtan2F32_Table.c File Reference

Table data for ATAN2 lookup functions. More...

#include "Ifx_LutAtan2F32.h"
Include dependency graph for Ifx_LutAtan2F32_Table.c:

Go to the source code of this file.

Variables

const Ifx_Lut_FxpAngle | Ifx_g_LutAtan2F32_FxpAngle_table [1024+1]
const float32 | Ifx_g_LutAtan2F32_table [IFX_LUTATAN2F32_SIZE+1]

Detailed Description

Table data for ATAN2 lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutAtan2F32_Table.c.

Variable Documentation

◆ Ifx_g_LutAtan2F32_FxpAngle_table

const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024+1]

Definition at line 37 of file Ifx_LutAtan2F32_Table.c.

◆ Ifx_g_LutAtan2F32_table

const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]

Definition at line 1066 of file Ifx_LutAtan2F32_Table.c.


iLLD_TC26B: Ifx_LutLinearF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutLinearF32.c File Reference

Linear look-up function. More...

#include "Ifx_LutLinearF32.h"
Include dependency graph for Ifx_LutLinearF32.c:

Go to the source code of this file.

Functions

float32 Ifx_LutLinearF32_searchBin (const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation. More...

Detailed Description

Linear look-up function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutLinearF32.c.


iLLD_TC26B: Ifx_LutLSincosF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Macros | Variables
Ifx_LutLSincosF32.c File Reference

Table data for linear interpolation Sin/Cos lookup functions. More...

#include "Ifx_Lut.h"
#include "Ifx_LutIndexedLinearF32.h"
Include dependency graph for Ifx_LutLSincosF32.c:

Go to the source code of this file.

Macros

#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)

Variables

const Ifx_LutIndexedLinearF32_Item | Ifx_g_LutLSincosF32_table [128]
const Ifx_LutIndexedLinearF32 | Ifx_g_LutLSincosF32

Detailed Description

Table data for linear interpolation Sin/Cos lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Revision
614
Date
2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013)

Definition in file Ifx_LutLSincosF32.c.

Macro Definition Documentation

◆ IFX_F32_LUTL_SINCOS_ELEMENT_COUNT

#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)

Definition at line 43 of file Ifx_LutLSincosF32.c.

Variable Documentation

◆ Ifx_g_LutLSincosF32

const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Initial value:
= {
.segmentCount = IFX_F32_LUTL_SINCOS_ELEMENT_COUNT,
.shift = 5,
.segments = Ifx_g_LutLSincosF32_table
}
Ifx_g_LutLSincosF32_table
const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]
Definition: Ifx_LutLSincosF32.c:45
IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
Definition: Ifx_LutLSincosF32.c:43

Definition at line 176 of file Ifx_LutLSincosF32.c.

◆ Ifx_g_LutLSincosF32_table

const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]

Definition at line 45 of file Ifx_LutLSincosF32.c.


iLLD_TC26B: Ifx_LutSincosF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_LutSincosF32.c File Reference

Sin/Cos lookup functions with fixed-point angle data type. More...

#include "Ifx_LutSincosF32.h"
#include <math.h>
Include dependency graph for Ifx_LutSincosF32.c:

Go to the source code of this file.

Functions

void | Ifx_LutSincosF32_init (void)
Initialise the lookup tables. More...
float32 | Ifx_LutSincosF32_sin (Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function. More...

Detailed Description

Sin/Cos lookup functions with fixed-point angle data type.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_LutSincosF32.c.


iLLD_TC26B: Ifx_LutSincosF32_Table.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_LutSincosF32_Table.c File Reference

Table data for Sin/Cos lookup functions. More...

#include "Ifx_Lut.h"
Include dependency graph for Ifx_LutSincosF32_Table.c:

Go to the source code of this file.

Variables

const float32 Ifx_g_LutSincosF32_table [1025]

Detailed Description

Table data for Sin/Cos lookup functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Revision
614
Date
2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013)

Definition in file Ifx_LutSincosF32_Table.c.

Variable Documentation

◆ Ifx_g_LutSincosF32_table

const float32 Ifx_g_LutSincosF32_table[1025]

Definition at line 41 of file Ifx_LutSincosF32_Table.c.


iLLD_TC26B: Ifx_RampF32.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Functions
Ifx_RampF32.c File Reference

Ramp function. More...

#include "SysSe/Math/Ifx_RampF32.h"
Include dependency graph for Ifx_RampF32.c:

Go to the source code of this file.

Functions

float32 Ifx_RampF32_step (Ifx_RampF32 *ramp)
Execute the Ramp function. More...

Detailed Description

Ramp function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_RampF32.c.


iLLD_TC26B: Ifx_Shell.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Macros | Functions | Variables
Ifx_Shell.c File Reference

shell functions. More...

#include "Ifx_Shell.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include <string.h>
#include <stdlib.h>
#include <stdio.h>
Include dependency graph for Ifx_Shell.c:

Go to the source code of this file.

Macros

#define | IFX_SHELL_LLD "%lld "
#define | IFX_SHELL_LLX "%llx "
#define | IFX_SHELL_LLU "%llu "
#define | IFX_SHELL_MAX_MESSAGE_SIZE 255
#define | ISSPACE(c) (((c) == ' ') || ((c) == '\t'))
#define | IFX_SHELL_IF_ECHO(X) {if (shell->control.echo) {X; }}
#define | IFX_SHELL_WRITE_SPACES(X) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}
#define | IFX_SHELL_WRITE_BACKSPACES(X) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}

Functions

void | Ifx_Shell_execute (Ifx_Shell *shell, pchar commandLine)
void | Ifx_Shell_cmdEscapeProcess (Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
const Ifx_Shell_Command * | Ifx_Shell_commandListFind (Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
boolean | Ifx_Shell_isEndOfLine (pchar args)
Check whether the args is already at the end. More...
boolean | Ifx_Shell_showHelpSingle (Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list. More...
boolean | Ifx_Shell_showHelpSingleCommand (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
boolean | Ifx_Shell_showHelp (pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands. More...
boolean | Ifx_Shell_protocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol. More...
boolean | Ifx_Shell_bbProtocolStart (pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol. More...
void | Ifx_Shell_initConfig (Ifx_Shell_Config *config)
boolean | Ifx_Shell_init (Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell. More...
void | Ifx_Shell_process (Ifx_Shell *shell)
Process the shell. More...
void | Ifx_Shell_deinit (Ifx_Shell *shell)
Deinitialise the shell. More...
pchar | Ifx_Shell_skipWhitespace (pchar args)
Within the context of Shell.call, skip the whitespaces of the args string. More...
boolean | Ifx_Shell_matchToken (pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token. More...
boolean | Ifx_Shell_parseToken (pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token. More...
boolean | Ifx_Shell_parseAddress (pchar *argsPtr, void **address)
Parse an address. More...
boolean | Ifx_Shell_parseSInt32 (pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value. More...
boolean | Ifx_Shell_parseUInt32 (pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value. More...
boolean | Ifx_Shell_parseSInt64 (pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value. More...
boolean | Ifx_Shell_parseUInt64 (pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value. More...
boolean | Ifx_Shell_parseFloat64 (pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value. More...
boolean | Ifx_Shell_parseFloat32 (pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value. More...
const Ifx_Shell_Command * | Ifx_Shell_commandFind (Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List. More...
void | Ifx_Shell_enable (Ifx_Shell *shell)
Clear the receive buffer and enable the shell. More...
void | Ifx_Shell_disable (Ifx_Shell *shell)
Disable the shell. More...
void | Ifx_Shell_printSyntax (const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax. More...

Variables

char Ifx_Shell_cmdBuffer [IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]

Detailed Description

shell functions.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_Shell.c.

Macro Definition Documentation

◆ IFX_SHELL_IF_ECHO

#define IFX_SHELL_IF_ECHO ( X ) {if (shell->control.echo) {X; }}

Definition at line 46 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess(), and Ifx_Shell_process().

◆ IFX_SHELL_LLD

#define IFX_SHELL_LLD "%lld "

Definition at line 34 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseSInt64().

◆ IFX_SHELL_LLU

#define IFX_SHELL_LLU "%llu "

Definition at line 36 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt64().

◆ IFX_SHELL_LLX

#define IFX_SHELL_LLX "%llx "

Definition at line 35 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseUInt64().

◆ IFX_SHELL_MAX_MESSAGE_SIZE

#define IFX_SHELL_MAX_MESSAGE_SIZE 255

Definition at line 39 of file Ifx_Shell.c.

◆ IFX_SHELL_WRITE_BACKSPACES

#define IFX_SHELL_WRITE_BACKSPACES ( X ) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}

Definition at line 53 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess(), and Ifx_Shell_process().

◆ IFX_SHELL_WRITE_SPACES

#define IFX_SHELL_WRITE_SPACES ( X ) {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}

Definition at line 49 of file Ifx_Shell.c.

Referenced by Ifx_Shell_cmdEscapeProcess().

◆ ISSPACE

#define ISSPACE ( c ) (((c) == ' ') || ((c) == '\t'))

Definition at line 43 of file Ifx_Shell.c.

Referenced by Ifx_Shell_parseToken(), and Ifx_Shell_skipWhitespace().

Function Documentation

◆ Ifx_Shell_cmdEscapeProcess()

void Ifx_Shell_cmdEscapeProcess | ( | Ifx_Shell * | shell,
 |  | char | EscapeChar1,
 |  | char | EscapeChar2
 | ) |  |

Definition at line 1073 of file Ifx_Shell.c.

Referenced by Ifx_Shell_process().

◆ Ifx_Shell_commandListFind()

const Ifx_Shell_Command * Ifx_Shell_commandListFind | ( | Ifx_Shell * | shell,
 |  | pchar | commandLine,
 |  | pchar * | args,
 |  | Ifx_Shell_CommandListConst * | commandList
 | ) |  |

Definition at line 983 of file Ifx_Shell.c.

Referenced by Ifx_Shell_execute(), and Ifx_Shell_showHelpSingleCommand().

◆ Ifx_Shell_execute()

void Ifx_Shell_execute | ( | Ifx_Shell * | shell,
 |  | pchar | commandLine
 | ) |  |

Definition at line 1010 of file Ifx_Shell.c.

Referenced by Ifx_Shell_process().

◆ Ifx_Shell_isEndOfLine()

boolean Ifx_Shell_isEndOfLine ( pchar args )

Check whether the args is already at the end.

Parameters
args The argument null-terminated string

Definition at line 69 of file Ifx_Shell.c.

◆ Ifx_Shell_showHelpSingleCommand()

boolean Ifx_Shell_showHelpSingleCommand | ( | pchar | args,
 |  | void * | shellPtr,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Definition at line 180 of file Ifx_Shell.c.

Referenced by Ifx_Shell_showHelp().

Variable Documentation

◆ Ifx_Shell_cmdBuffer

char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]

Definition at line 57 of file Ifx_Shell.c.

Referenced by Ifx_Shell_init().


iLLD_TC26B: Ifx_TypesDcc.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesDcc.h File Reference

Go to the source code of this file.

Macros

#define FRACT_MAX 0x7fffffff

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw
typedef unsigned long long | circ_t

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_TypesDcc.h.

Macro Definition Documentation

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 25 of file Ifx_TypesDcc.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 30 of file Ifx_TypesDcc.h.

◆ __packhw

typedef long __packhw

Definition at line 32 of file Ifx_TypesDcc.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 31 of file Ifx_TypesDcc.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 33 of file Ifx_TypesDcc.h.

◆ circ_t

typedef unsigned long long circ_t

Definition at line 35 of file Ifx_TypesDcc.h.

◆ fract

typedef long fract

Definition at line 27 of file Ifx_TypesDcc.h.

◆ laccum

typedef long long laccum

Definition at line 29 of file Ifx_TypesDcc.h.

◆ sfract

typedef short sfract

Definition at line 28 of file Ifx_TypesDcc.h.


iLLD_TC26B: Ifx_TypesGhs.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesGhs.h File Reference

Go to the source code of this file.

Macros

#define | FRACT_MAX 0x7fffffff
#define | __interrupt(intno)

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_TypesGhs.h.

Macro Definition Documentation

◆ __interrupt

#define __interrupt ( intno )

Definition at line 27 of file Ifx_TypesGhs.h.

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 25 of file Ifx_TypesGhs.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 32 of file Ifx_TypesGhs.h.

◆ __packhw

typedef long __packhw

Definition at line 34 of file Ifx_TypesGhs.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 33 of file Ifx_TypesGhs.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 35 of file Ifx_TypesGhs.h.

◆ fract

typedef long fract

Definition at line 29 of file Ifx_TypesGhs.h.

◆ laccum

typedef long long laccum

Definition at line 31 of file Ifx_TypesGhs.h.

◆ sfract

typedef short sfract

Definition at line 30 of file Ifx_TypesGhs.h.


iLLD_TC26B: Ifx_TypesGnuc.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Ifx_TypesGnuc.h File Reference
#include <machine/cint.h>
Include dependency graph for Ifx_TypesGnuc.h:

Go to the source code of this file.

Macros

#define | FRACT_MAX 0x7fffffff
#define | __interrupt(intno)

Typedefs

typedef long | fract
typedef short | sfract
typedef long long | laccum
typedef long | __packb
typedef unsigned long | __upackb
typedef long | __packhw
typedef unsigned long | __upackhw

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_TypesGnuc.h.

Macro Definition Documentation

◆ __interrupt

#define __interrupt ( intno )

Definition at line 28 of file Ifx_TypesGnuc.h.

◆ FRACT_MAX

#define FRACT_MAX 0x7fffffff

Definition at line 25 of file Ifx_TypesGnuc.h.

Typedef Documentation

◆ __packb

typedef long __packb

Definition at line 33 of file Ifx_TypesGnuc.h.

◆ __packhw

typedef long __packhw

Definition at line 35 of file Ifx_TypesGnuc.h.

◆ __upackb

typedef unsigned long __upackb

Definition at line 34 of file Ifx_TypesGnuc.h.

◆ __upackhw

typedef unsigned long __upackhw

Definition at line 36 of file Ifx_TypesGnuc.h.

◆ fract

typedef long fract

Definition at line 30 of file Ifx_TypesGnuc.h.

◆ laccum

typedef long long laccum

Definition at line 32 of file Ifx_TypesGnuc.h.

◆ sfract

typedef short sfract

Definition at line 31 of file Ifx_TypesGnuc.h.


iLLD_TC26B: Ifx_TypesTasking.h File Reference

  • Cpu
  • Std
Macros
Ifx_TypesTasking.h File Reference

Go to the source code of this file.

Macros

#define | fract __fract
#define | sfract __sfract
#define | laccum __laccum
#define | __asm__ __asm

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_TypesTasking.h.

Macro Definition Documentation

◆ __asm__

#define __asm__ __asm

Definition at line 28 of file Ifx_TypesTasking.h.

Referenced by Ifx__absb(), Ifx__absdif(), Ifx__absh(), Ifx__abss(), Ifx__abssh(), Ifx__adds(), Ifx__addsu(), Ifx__cacheai(), Ifx__cacheawi(), Ifx__cacheawi_bo_post_inc(), Ifx__cacheiwi(), Ifx__clo(), Ifx__cls(), Ifx__clssf(), Ifx__cmpAndSwap(), Ifx__crc32(), Ifx__debug(), Ifx__disable_and_save(), Ifx__dsync(), Ifx__extr(), Ifx__extractbyte1(), Ifx__extractbyte2(), Ifx__extractbyte3(), Ifx__extractbyte4(), Ifx__extracthw1(), Ifx__extracthw2(), Ifx__extractubyte1(), Ifx__extractubyte2(), Ifx__extractubyte3(), Ifx__extractubyte4(), Ifx__extractuhw1(), Ifx__extractuhw2(), Ifx__extru(), Ifx__fabs(), Ifx__fabsf(), Ifx__fixpoint_to_float32(), Ifx__float_to_fract(), Ifx__fract_to_float(), Ifx__fract_to_sfract(), Ifx__getA11(), Ifx__getbyte1(), Ifx__getbyte2(), Ifx__getbyte3(), Ifx__getbyte4(), Ifx__getDataParamRet(), Ifx__getfract(), Ifx__gethw1(), Ifx__gethw2(), Ifx__getubyte1(), Ifx__getubyte2(), Ifx__getubyte3(), Ifx__getubyte4(), Ifx__getuhw1(), Ifx__getuhw2(), Ifx__initpackb(), Ifx__initpackhw(), Ifx__initupackb(), Ifx__initupackhw(), Ifx__ins(), Ifx__insert(), Ifx__insertbyte1(), Ifx__insertbyte2(), Ifx__insertbyte3(), Ifx__insertbyte4(), Ifx__inserthw1(), Ifx__inserthw2(), Ifx__insertubyte1(), Ifx__insertubyte2(), Ifx__insertubyte3(), Ifx__insertubyte4(), Ifx__insertuhw1(), Ifx__insertuhw2(), Ifx__insn(), Ifx__isync(), Ifx__jump_and_link(), Ifx__jumpBackToLink(), Ifx__ldmst(), Ifx__mac_r_sf(), Ifx__mac_sf(), Ifx__max(), Ifx__maxs(), Ifx__maxu(), Ifx__min(), Ifx__minb(), Ifx__minbu(), Ifx__minh(), Ifx__minhu(), Ifx__mins(), Ifx__minu(), Ifx__moveToAddrParam0(), Ifx__moveToDataParam0(), Ifx__moveToDataParamRet(), Ifx__mulfractfract(), Ifx__mulfractlong(), Ifx__mulsc(), Ifx__nop(), Ifx__nops(), Ifx__parity(), Ifx__popcnt(), Ifx__restore(), Ifx__rol(), Ifx__ror(), Ifx__round16(), Ifx__rslcx(), Ifx__s16_to_sfract(), Ifx__satb(), Ifx__satbu(), Ifx__sath(), Ifx__sathu(), Ifx__setbyte1(), Ifx__setbyte2(), Ifx__setbyte3(), Ifx__setbyte4(), Ifx__sethw1(), Ifx__sethw2(), Ifx__setStackPointer(), Ifx__setubyte1(), Ifx__setubyte2(), Ifx__setubyte3(), Ifx__setubyte4(), Ifx__setuhw1(), Ifx__setuhw2(), Ifx__sfract_to_s16(), Ifx__sfract_to_u16(), Ifx__shaaccum(), Ifx__shafracts(), Ifx__shasfracts(), Ifx__stopPerfCounters(), Ifx__subs(), Ifx__subsu(), Ifx__svlcx(), Ifx__swap(), Ifx__u16_to_sfract(), and IfxCpu_calculateCrc32().

◆ fract

#define fract __fract

Definition at line 25 of file Ifx_TypesTasking.h.

◆ laccum

#define laccum __laccum

Definition at line 27 of file Ifx_TypesTasking.h.

◆ sfract

#define sfract __sfract

Definition at line 26 of file Ifx_TypesTasking.h.


iLLD_TC26B: Ifx_WndF32_BlackmanHarrisTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_WndF32_BlackmanHarrisTable.c File Reference

Lookup table for Blackman-Harris window function. More...

#include "Ifx_WndF32.h"
Include dependency graph for Ifx_WndF32_BlackmanHarrisTable.c:

Go to the source code of this file.

Variables

CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable [(IFX_WNDF32_TABLE_LENGTH/2)]

Detailed Description

Lookup table for Blackman-Harris window function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_WndF32_BlackmanHarrisTable.c.

Variable Documentation

◆ Ifx_g_WndF32_blackmanHarrisTable

CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH/2)]

Definition at line 32 of file Ifx_WndF32_BlackmanHarrisTable.c.


iLLD_TC26B: Ifx_WndF32_HannTable.c File Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Variables
Ifx_WndF32_HannTable.c File Reference

Lookup table for Hann window function. More...

#include "Ifx_WndF32.h"
Include dependency graph for Ifx_WndF32_HannTable.c:

Go to the source code of this file.

Variables

CONST_CFG float32 Ifx_g_WndF32_hannTable [(IFX_WNDF32_TABLE_LENGTH/2)]

Detailed Description

Lookup table for Hann window function.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file Ifx_WndF32_HannTable.c.

Variable Documentation

◆ Ifx_g_WndF32_hannTable

CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH/2)]

Definition at line 32 of file Ifx_WndF32_HannTable.c.


iLLD_TC26B: IfxAsclin.c File Reference

  • Asclin
  • Std
Functions
IfxAsclin.c File Reference

ASCLIN basic functionality. More...

#include "IfxAsclin.h"
Include dependency graph for IfxAsclin.c:

Go to the source code of this file.

Functions

void | IfxAsclin_disableModule (Ifx_ASCLIN *asclin)
Disables the module. More...
void | IfxAsclin_enableAscErrorFlags (Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags. More...
void | IfxAsclin_enableModule (Ifx_ASCLIN *asclin)
Enables the module. More...
Ifx_ASCLIN * | IfxAsclin_getAddress (IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map. More...
float32 | IfxAsclin_getFaFrequency (Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz. More...
IfxAsclin_Index | IfxAsclin_getIndex (Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified. More...
float32 | IfxAsclin_getOvsFrequency (Ifx_ASCLIN *asclin)
Returns the OVS frequency. More...
float32 | IfxAsclin_getPdFrequency (Ifx_ASCLIN *asclin)
Returns the PD frequency. More...
float32 | IfxAsclin_getShiftFrequency (Ifx_ASCLIN *asclin)
Returns the SHIFT frequency. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerEr (Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerRx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx. More...
volatile Ifx_SRC_SRCR * | IfxAsclin_getSrcPointerTx (Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx. More...
uint32 | IfxAsclin_read16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits. More...
uint32 | IfxAsclin_read32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits. More...
uint32 | IfxAsclin_read8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits. More...
void | IfxAsclin_resetModule (Ifx_ASCLIN *asclin)
resets Asclin kernel More...
void | IfxAsclin_setBaudrateBitFields (Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields. More...
boolean | IfxAsclin_setBitTiming (Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing. More...
void | IfxAsclin_setClockSource (Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source. More...
uint32 | IfxAsclin_write16 (Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits. More...
uint32 | IfxAsclin_write32 (Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits. More...
uint32 | IfxAsclin_write8 (Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits. More...

Detailed Description

ASCLIN basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin.c.


iLLD_TC26B: IfxAsclin_Asc.c File Reference

  • Asclin
  • Asc
Functions
IfxAsclin_Asc.c File Reference

ASCLIN ASC details. More...

#include "IfxAsclin_Asc.h"
#include "string.h"
Include dependency graph for IfxAsclin_Asc.c:

Go to the source code of this file.

Functions

uint8 | IfxAsclin_Asc_blockingRead (IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO. More...
boolean | IfxAsclin_Asc_blockingWrite (IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO. More...
boolean | IfxAsclin_Asc_canReadCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
boolean | IfxAsclin_Asc_canWriteCount (IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
void | IfxAsclin_Asc_clearRx (IfxAsclin_Asc *asclin)
void | IfxAsclin_Asc_clearTx (IfxAsclin_Asc *asclin)
void | IfxAsclin_Asc_disableModule (IfxAsclin_Asc *asclin)
Disables the module. More...
boolean | IfxAsclin_Asc_flushTx (IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
sint32 | IfxAsclin_Asc_getReadCount (IfxAsclin_Asc *asclin)
IfxStdIf_DPipe_ReadEvent | IfxAsclin_Asc_getReadEvent (IfxAsclin_Asc *asclin)
uint32 | IfxAsclin_Asc_getSendCount (IfxAsclin_Asc *asclin)
Ifx_TickTime | IfxAsclin_Asc_getTxTimeStamp (IfxAsclin_Asc *asclin)
sint32 | IfxAsclin_Asc_getWriteCount (IfxAsclin_Asc *asclin)
IfxStdIf_DPipe_WriteEvent | IfxAsclin_Asc_getWriteEvent (IfxAsclin_Asc *asclin)
IfxAsclin_Status | IfxAsclin_Asc_initModule (IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module. More...
void | IfxAsclin_Asc_initModuleConfig (IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
void | IfxAsclin_Asc_initiateTransmission (IfxAsclin_Asc *asclin)
Initiate the data transmission. More...
void | IfxAsclin_Asc_isrError (IfxAsclin_Asc *asclin)
ISR error routine. More...
void | IfxAsclin_Asc_isrReceive (IfxAsclin_Asc *asclin)
ISR receive routine. More...
void | IfxAsclin_Asc_isrTransmit (IfxAsclin_Asc *asclin)
ISR transmit routine. More...
boolean | IfxAsclin_Asc_read (IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
void | IfxAsclin_Asc_resetSendCount (IfxAsclin_Asc *asclin)
boolean | IfxAsclin_Asc_stdIfDPipeInit (IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver. More...
boolean | IfxAsclin_Asc_write (IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)

Detailed Description

ASCLIN ASC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_Asc.c.

Function Documentation

◆ IfxAsclin_Asc_initiateTransmission()

void IfxAsclin_Asc_initiateTransmission ( IfxAsclin_Asc * asclin )

Initiate the data transmission.

Parameters
asclin module handle
Returns
None

A coding example can be found in How to use the ASCLIN ASC Interface driver?

Definition at line 385 of file IfxAsclin_Asc.c.

Referenced by IfxAsclin_Asc_write().

◆ IfxAsclin_Asc_stdIfDPipeInit()

boolean IfxAsclin_Asc_stdIfDPipeInit | ( | IfxStdIf_DPipe * | stdif,
 |  | IfxAsclin_Asc * | asclin
 | ) |  |

Initialize the standard interface to the device driver.

Parameters
stdif | standard interface object, will be initialized by the function
asclin | device driver object used by the standard interface. must be initialised separately
Returns
TRUE on success, else FALSE

Definition at line 563 of file IfxAsclin_Asc.c.


iLLD_TC26B: IfxAsclin_cfg.c File Reference

  • _Impl
Variables
IfxAsclin_cfg.c File Reference

ASCLIN on-chip implementation data. More...

#include "IfxAsclin_cfg.h"
Include dependency graph for IfxAsclin_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap [IFXASCLIN_NUM_MODULES]

Detailed Description

ASCLIN on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_cfg.c.

Variable Documentation

◆ IfxAsclin_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Initial value:
= {
{&MODULE_ASCLIN0, (uint32)IfxAsclin_Index_0},
{&MODULE_ASCLIN1, (uint32)IfxAsclin_Index_1},
{&MODULE_ASCLIN2, (uint32)IfxAsclin_Index_2},
{&MODULE_ASCLIN3, (uint32)IfxAsclin_Index_3}
}
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:61
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:63
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:64
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:62

Definition at line 35 of file IfxAsclin_cfg.c.

Referenced by IfxAsclin_getAddress(), and IfxAsclin_getIndex().


iLLD_TC26B: IfxAsclin_Lin.c File Reference

  • Asclin
  • Lin
Functions
IfxAsclin_Lin.c File Reference

ASCLIN LIN details. More...

#include "IfxAsclin_Lin.h"
Include dependency graph for IfxAsclin_Lin.c:

Go to the source code of this file.

Functions

void | IfxAsclin_Lin_checkForReceivedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header More...
void | IfxAsclin_Lin_checkForReceivedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response More...
void | IfxAsclin_Lin_checkForTransmittedHeaderFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header More...
void | IfxAsclin_Lin_checkForTransmittedResponseFlags (IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response More...
void | IfxAsclin_Lin_clearFlagsStatus (IfxAsclin_Lin *asclin)
clears the flags status structures More...
void | IfxAsclin_Lin_disableModule (IfxAsclin_Lin *asclin)
Disables the module. More...
void | IfxAsclin_Lin_ignoreHeader (IfxAsclin_Lin *asclin)
Ignores the latest header. More...
IfxAsclin_Status | IfxAsclin_Lin_initModule (IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module. More...
void | IfxAsclin_Lin_initModuleConfig (IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values. More...
void | IfxAsclin_Lin_receiveHeader (IfxAsclin_Lin *asclin, uint8 *id)
Receives the header. More...
void | IfxAsclin_Lin_receiveResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response. More...
void | IfxAsclin_Lin_sendHeader (IfxAsclin_Lin *asclin, uint8 *id)
Sends the header. More...
void | IfxAsclin_Lin_sendResponse (IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response More...
boolean | IfxAsclin_Lin_waitForReceivedHeader (IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForReceivedResponse (IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForTransmittedHeader (IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected More...
boolean | IfxAsclin_Lin_waitForTransmittedResponse (IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected More...
void | IfxAsclin_Lin_isrError (IfxAsclin_Lin *asclin)
ISR error routine. More...
void | IfxAsclin_Lin_isrReceive (IfxAsclin_Lin *asclin)
ISR receive routine. More...
void | IfxAsclin_Lin_isrTransmit (IfxAsclin_Lin *asclin)
ISR transmit routine. More...
void | IfxAsclin_Lin_sendFrame (IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Response 3.Send Header and Receive Response. More...

Detailed Description

ASCLIN LIN details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_Lin.c.


iLLD_TC26B: IfxAsclin_Spi.c File Reference

  • Asclin
  • Spi
Functions
IfxAsclin_Spi.c File Reference

ASCLIN SPI details. More...

#include "IfxAsclin_Spi.h"
Include dependency graph for IfxAsclin_Spi.c:

Go to the source code of this file.

Functions

IFX_STATIC IfxAsclin_Spi_Status | IfxAsclin_Spi_lock (IfxAsclin_Spi *asclin)
IFX_STATIC void | IfxAsclin_Spi_unlock (IfxAsclin_Spi *asclin)
void | IfxAsclin_Spi_disableModule (IfxAsclin_Spi *asclin)
Disables the module. More...
IfxAsclin_Spi_Status | IfxAsclin_Spi_exchange (IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange More...
IfxAsclin_Spi_Status | IfxAsclin_Spi_getStatus (IfxAsclin_Spi *asclin)
IfxAsclin_Status | IfxAsclin_Spi_initModule (IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module. More...
void | IfxAsclin_Spi_initModuleConfig (IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values. More...
void | IfxAsclin_Spi_isrError (IfxAsclin_Spi *asclin)
ISR error routine. More...
void | IfxAsclin_Spi_isrReceive (IfxAsclin_Spi *asclin)
ISR receive routine. More...
void | IfxAsclin_Spi_isrTransmit (IfxAsclin_Spi *asclin)
ISR transmit routine. More...
void | IfxAsclin_Spi_read (IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width. More...
void | IfxAsclin_Spi_write (IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width. More...

Detailed Description

ASCLIN SPI details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxAsclin_Spi.c.

Function Documentation

◆ IfxAsclin_Spi_getStatus()

IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 80 of file IfxAsclin_Spi.c.

◆ IfxAsclin_Spi_lock()

IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
status of the on going job

Definition at line 351 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_exchange().

◆ IfxAsclin_Spi_unlock()

IFX_STATIC void IfxAsclin_Spi_unlock ( IfxAsclin_Spi * asclin )
Parameters
asclin module handle
Returns
None

Definition at line 403 of file IfxAsclin_Spi.c.

Referenced by IfxAsclin_Spi_read().


iLLD_TC26B: IfxCcu6.c File Reference

  • Ccu6
  • Std
Functions
IfxCcu6.c File Reference

CCU6 basic functionality. More...

#include "IfxCcu6.h"
Include dependency graph for IfxCcu6.c:

Go to the source code of this file.

Functions

void | IfxCcu6_connectTrigger (Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
void | IfxCcu6_disableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
void | IfxCcu6_disableModule (Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel. More...
void | IfxCcu6_enableModulationOutput (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13. More...
void | IfxCcu6_enableModule (Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel. More...
Ifx_CCU6 * | IfxCcu6_getAddress (IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module. More...
uint32 | IfxCcu6_getCaptureRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel. More...
uint32 | IfxCcu6_getCaptureShadowRegisterValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel. More...
IfxCcu6_Index | IfxCcu6_getIndex (Ifx_CCU6 *ccu6)
Returns CCU6 index. More...
volatile Ifx_SRC_SRCR * | IfxCcu6_getSrcAddress (Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register. More...
uint32 | IfxCcu6_readTimer (Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register. More...
void | IfxCcu6_resetModule (Ifx_CCU6 *ccu6)
void | IfxCcu6_routeInterruptNode (Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests. More...
void | IfxCcu6_setOutputPassiveLevel (Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module. More...
void | IfxCcu6_setT12CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2) More...
void | IfxCcu6_setT12CompareValue (Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers) More...
float32 | IfxCcu6_setT12Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : CaptureFrequency. More...
void | IfxCcu6_setT12InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs. More...
void | IfxCcu6_setT13CaptureCompareState (Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST. More...
float32 | IfxCcu6_setT13Frequency (Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by successive divisions by 2) : Then the nearest frequency value is set ( >= desired value) The resulting frequency is captured in the handler element : captureFrequency. More...
void | IfxCcu6_setT13InputSignal (Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs. More...

Detailed Description

CCU6 basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6.c.

Function Documentation

◆ IfxCcu6_resetModule()

void IfxCcu6_resetModule ( Ifx_CCU6 * ccu6 )
Parameters
ccu6 pointer to ccu6 registers
Returns
None

Definition at line 247 of file IfxCcu6.c.


iLLD_TC26B: IfxCcu6_cfg.c File Reference

  • _Impl
Macros | Variables
IfxCcu6_cfg.c File Reference

CCU6 on-chip implementation data. More...

#include "IfxCcu6_cfg.h"
Include dependency graph for IfxCcu6_cfg.c:

Go to the source code of this file.

Macros

#define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)

Variables

IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap [IFXCCU6_NUM_MODULES]

Detailed Description

CCU6 on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_cfg.c.

Macro Definition Documentation

◆ IFXCCU6_EMPTY_OUTPUT_SLOT

#define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)

Definition at line 35 of file IfxCcu6_cfg.c.

Variable Documentation

◆ IfxCcu6_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Initial value:
= {
{&MODULE_CCU60, IfxCcu6_Index_0},
{&MODULE_CCU61, IfxCcu6_Index_1}
}
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:67
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:66

Definition at line 41 of file IfxCcu6_cfg.c.

Referenced by IfxCcu6_getAddress(), and IfxCcu6_getIndex().


iLLD_TC26B: IfxCcu6_Icu.c File Reference

  • Ccu6
  • Icu
Functions
IfxCcu6_Icu.c File Reference

CCU6 ICU details. More...

#include "IfxCcu6_Icu.h"
Include dependency graph for IfxCcu6_Icu.c:

Go to the source code of this file.

Functions

uint32 | IfxCcu6_Icu_getTimeStamp (IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) More...
void | IfxCcu6_Icu_initChannel (IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel. More...
void | IfxCcu6_Icu_initChannelConfig (IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values. More...
void | IfxCcu6_Icu_initModule (IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_Icu_initModuleConfig (IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_Icu_startCapture (IfxCcu6_Icu_Channel *channel)
Starts the input capture. More...
void | IfxCcu6_Icu_stopCapture (IfxCcu6_Icu_Channel *channel)
Stops the input capture. More...

Detailed Description

CCU6 ICU details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_Icu.c.


iLLD_TC26B: IfxCcu6_PwmBc.c File Reference

  • Ccu6
  • PwmBc
Functions
IfxCcu6_PwmBc.c File Reference

CCU6 PWMBC details. More...

#include "IfxCcu6_PwmBc.h"
Include dependency graph for IfxCcu6_PwmBc.c:

Go to the source code of this file.

Functions

uint32 | IfxCcu6_PwmBc_getMotorSpeed (IfxCcu6_PwmBc *pwmBc)
returns the current motor speed More...
void | IfxCcu6_PwmBc_initModule (IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_PwmBc_initModuleConfig (IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_PwmBc_start (IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM. More...
void | IfxCcu6_PwmBc_stop (IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM. More...
void | IfxCcu6_PwmBc_updateHallPattern (IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern. More...

Detailed Description

CCU6 PWMBC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_PwmBc.c.


iLLD_TC26B: IfxCcu6_PwmHl.c File Reference

  • Ccu6
  • PwmHl
Functions | Variables
IfxCcu6_PwmHl.c File Reference

CCU6 PWMHL details. More...

#include "IfxCcu6_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxCcu6_PwmHl.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxCcu6_PwmHl_disable (IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_enable (IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode. More...
IFX_STATIC void | IfxCcu6_PwmHl_setOutputPins (Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateCenterAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxCcu6_PwmHl_updateEdgeAligned (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxCcu6_PwmHl_updateOff (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
float32 | IfxCcu6_PwmHl_getDeadtime (IfxCcu6_PwmHl *driver)
Returns the dead time. More...
float32 | IfxCcu6_PwmHl_getMinPulse (IfxCcu6_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxCcu6_PwmHl_getMode (IfxCcu6_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxCcu6_PwmHl_init (IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object. More...
void | IfxCcu6_PwmHl_initConfig (IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxCcu6_PwmHl_setDeadtime (IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxCcu6_PwmHl_setMinPulse (IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxCcu6_PwmHl_setMode (IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxCcu6_PwmHl_setOnTime (IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are complementary. More...
void | IfxCcu6_PwmHl_setupChannels (IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state. More...
boolean | IfxCcu6_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

CCU6 PWMHL details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_PwmHl.c.

Variable Documentation

◆ IfxCcu6_PwmHl_modes

IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxCcu6_PwmHl_updateCenterAligned},
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxCcu6_PwmHl_updateCenterAligned},
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxCcu6_PwmHl_updateEdgeAligned },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxCcu6_PwmHl_updateEdgeAligned },
{Ifx_Pwm_Mode_off, FALSE, &IfxCcu6_PwmHl_updateOff }
}
IfxCcu6_PwmHl_updateOff
IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxCcu6_PwmHl.c:495
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:160
IfxCcu6_PwmHl_updateEdgeAligned
IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxCcu6_PwmHl.c:489
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCcu6_PwmHl_updateCenterAligned
IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxCcu6_PwmHl.c:483
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:162
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:164
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:161
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:163
TRUE
#define TRUE
Definition: Platform_Types.h:87

Definition at line 97 of file IfxCcu6_PwmHl.c.

Referenced by IfxCcu6_PwmHl_setMode().


iLLD_TC26B: IfxCcu6_Timer.c File Reference

  • Ccu6
  • Timer
Functions
IfxCcu6_Timer.c File Reference

CCU6 TIMER details. More...

#include "IfxCcu6_Timer.h"
Include dependency graph for IfxCcu6_Timer.c:

Go to the source code of this file.

Functions

void | IfxCcu6_Timer_countOneStep (IfxCcu6_Timer *timer)
Counts the timer one step. More...
void | IfxCcu6_Timer_initModule (IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_Timer_initModuleConfig (IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_Timer_start (IfxCcu6_Timer *timer)
Starts the timer. More...
void | IfxCcu6_Timer_startSingleShotMode (IfxCcu6_Timer *timer)
Starts the single shot mode of the timer. More...
void | IfxCcu6_Timer_stop (IfxCcu6_Timer *timer)
Stops the timer. More...
void | IfxCcu6_Timer_synchronousStart (IfxCcu6_Timer *timer)
Starts both the timers together. More...
void | IfxCcu6_Timer_synchronousStop (IfxCcu6_Timer *timer)
Starts both the timers together. More...

Detailed Description

CCU6 TIMER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_Timer.c.


iLLD_TC26B: IfxCcu6_TimerWithTrigger.c File Reference

  • Ccu6
  • TimerWithTrigger
Functions
IfxCcu6_TimerWithTrigger.c File Reference

CCU6 TIMERWITHTRIGGER details. More...

#include "IfxCcu6_TimerWithTrigger.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxCcu6_TimerWithTrigger.c:

Go to the source code of this file.

Functions

boolean | IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the timer event. More...
boolean | IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq (IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event. More...
void | IfxCcu6_TimerWithTrigger_applyUpdate (IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers. More...
void | IfxCcu6_TimerWithTrigger_disableUpdate (IfxCcu6_TimerWithTrigger *driver)
Disables the upadte
This function is has an empty body as the updated is disabled automatically after the shadow transfer. More...
float32 | IfxCcu6_TimerWithTrigger_getFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the frequency. More...
float32 | IfxCcu6_TimerWithTrigger_getInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxCcu6_TimerWithTrigger_getPeriod (IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxCcu6_TimerWithTrigger_getPointer (IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel. More...
float32 | IfxCcu6_TimerWithTrigger_getResolution (IfxCcu6_TimerWithTrigger *driver)
Returns the resolution. More...
boolean | IfxCcu6_TimerWithTrigger_init (IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object
T12 is configured as timer, T13 is optionally configured as trigger
T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution
Note: To achieve maximum PWM resolution, the requested T12 frequency should be the
lowest PWM frequency.
. More...
void | IfxCcu6_TimerWithTrigger_initConfig (IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default. More...
void | IfxCcu6_TimerWithTrigger_run (IfxCcu6_TimerWithTrigger *driver)
Runs the timer. More...
boolean | IfxCcu6_TimerWithTrigger_setFrequency (IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxCcu6_TimerWithTrigger_setPeriod (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxCcu6_TimerWithTrigger_setSingleMode (IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxCcu6_TimerWithTrigger_setTrigger (IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxCcu6_TimerWithTrigger_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer. More...
void | IfxCcu6_TimerWithTrigger_stop (IfxCcu6_TimerWithTrigger *driver)
Stops the timer. More...
void | IfxCcu6_TimerWithTrigger_updateInputFrequency (IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency. More...

Detailed Description

CCU6 TIMERWITHTRIGGER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_TimerWithTrigger.c.


iLLD_TC26B: IfxCcu6_TPwm.c File Reference

  • Ccu6
  • TPwm
Functions
IfxCcu6_TPwm.c File Reference

CCU6 TPWM details. More...

#include "IfxCcu6_TPwm.h"
Include dependency graph for IfxCcu6_TPwm.c:

Go to the source code of this file.

Functions

void | IfxCcu6_TPwm_initModule (IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration. More...
void | IfxCcu6_TPwm_initModuleConfig (IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values. More...
void | IfxCcu6_TPwm_pause (IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM. More...
void | IfxCcu6_TPwm_resume (IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM. More...
void | IfxCcu6_TPwm_start (IfxCcu6_TPwm *tPwm)
Starts the triggered PWM. More...
void | IfxCcu6_TPwm_stop (IfxCcu6_TPwm *tPwm)
Stops the triggered PWM. More...

Detailed Description

CCU6 TPWM details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCcu6_TPwm.c.


iLLD_TC26B: IfxCif.c File Reference

  • Cif
  • Std
Functions
IfxCif.c File Reference

CIF basic functionality. More...

#include "IfxCif.h"
Include dependency graph for IfxCif.c:

Go to the source code of this file.

Functions

void | IfxCif_clearEpError (IfxCif_EpErrorClearSources source)
Function to clear one extra path error. More...
void | IfxCif_clearEpInterrupt (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt. More...
void | IfxCif_clearIspError (IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source. More...
void | IfxCif_clearIspInterrupt (IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt. More...
void | IfxCif_clearJpeInterrupt (IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt. More...
void | IfxCif_clearMiInterrupt (IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt. More...
void | IfxCif_clearMiStatus (IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule. More...
void | IfxCif_clearSecurityWatchdogInterrupt (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt. More...
void | IfxCif_dpResetCounter (IfxCif_DpCounters counter)
Function to reset one debug path counter. More...
void | IfxCif_epForceConfigurationUpdate (IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path. More...
void | IfxCif_epSkipPicture (IfxCif_ExtraPath z)
Function to skip one picture of one extra path. More...
uint16 | IfxCif_getCurrentIspPictureOffset (IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier. More...
uint16 | IfxCif_getCurrentIspPictureSize (IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier. More...
IfxCif_State | IfxCif_getDpControlEnableState (IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source. More...
uint32 | IfxCif_getDpCounter (IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter. More...
uint16 | IfxCif_getDpUserDefinedSymbol (uint8 x)
Function to query the value of one user defined debug symbol. More...
uint32 | IfxCif_getEpBaseAddress (IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path. More...
uint32 | IfxCif_getEpBaseInitAddress (IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path. More...
uint16 | IfxCif_getEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path. More...
uint16 | IfxCif_getEpCroppingCurrentPictureOffset (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path. More...
uint16 | IfxCif_getEpCroppingCurrentPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path. More...
IfxCif_State | IfxCif_getEpCroppingEnableState (IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path. More...
uint16 | IfxCif_getEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path. More...
uint16 | IfxCif_getEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path. More...
uint16 | IfxCif_getEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path. More...
IfxCif_State | IfxCif_getEpCroppingRecenterState (IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path. More...
IfxCif_ErrorState | IfxCif_getEpErrorState (IfxCif_EpErrorSources source)
Function to query the state of an extra path error source. More...
IfxCif_State | IfxCif_getEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path. More...
uint32 | IfxCif_getEpInitSize (IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path. More...
uint32 | IfxCif_getEpInitialFillLevelInterruptOffset (IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path. More...
uint32 | IfxCif_getEpInitialOffsetCounter (IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path. More...
IfxCif_State | IfxCif_getEpInputEnableState (IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path. More...
IfxCif_State | IfxCif_getEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt. More...
uint32 | IfxCif_getEpInterruptOffset (IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path. More...
uint32 | IfxCif_getEpOffsetCounter (IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path. More...
uint32 | IfxCif_getEpOffsetCounterStart (IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path. More...
IfxCif_State | IfxCif_getEpOutputEnableState (IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path. More...
uint8 | IfxCif_getEpRecenterValue (IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path. More...
uint32 | IfxCif_getEpSize (IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path. More...
IfxCif_EpWriteFormat | IfxCif_getEpWriteFormat (IfxCif_ExtraPath z)
Function to query the write format of one extra path. More...
uint8 | IfxCif_getHuffmanAcTableLength (IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values. More...
IfxCif_State | IfxCif_getHuffmanAcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values. More...
uint8 | IfxCif_getHuffmanDcTableLength (IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values. More...
IfxCif_State | IfxCif_getHuffmanDcTableSelectorState (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values. More...
IfxCif_State | IfxCif_getInternalClockMode (IfxCif_Submodules submodule)
Function to query the clock state of a submodule. More...
uint16 | IfxCif_getIspAcquisitionOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier. More...
uint16 | IfxCif_getIspAcquisitionSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier. More...
IfxCif_ErrorState | IfxCif_getIspErrorState (IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source. More...
IfxCif_State | IfxCif_getIspInputSelectionAppendState (void)
Function to query the append state. More...
IfxCif_State | IfxCif_getIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
uint16 | IfxCif_getIspOutputWindowOffset (IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier. More...
uint16 | IfxCif_getIspPictureSize (IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier. More...
uint16 | IfxCif_getIspisCameraDisplacement (IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier. More...
uint16 | IfxCif_getIspisCurrentPictureOffset (IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier. More...
uint16 | IfxCif_getIspisCurrentPictureSize (IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier. More...
uint16 | IfxCif_getIspisMaximumDisplacement (IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier. More...
uint16 | IfxCif_getIspisOffsetOutputWindow (IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier. More...
uint16 | IfxCif_getIspisPictureSize (IfxCif_ImageTiers tier)
Function to query the current picture size for one tier. More...
IfxCif_State | IfxCif_getIspisRecenterEnableState (void)
Function to query the enabled state of image stabilization recenter feature. More...
IfxCif_JpeDebugSignalState | IfxCif_getJpeDebugSignalState (IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source. More...
IfxCif_State | IfxCif_getJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
IfxCif_JpeQTableSelector | IfxCif_getJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component. More...
IfxCif_State | IfxCif_getJpeScalingEnableState (IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source. More...
uint16 | IfxCif_getJpegCodecImageSize (IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier. More...
IfxCif_State | IfxCif_getKernelResetRequestState (void)
Function to query the state of the kernel reset request bit. More...
IfxCif_State | IfxCif_getLinearDownscalerEnableState (IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier. More...
uint8 | IfxCif_getLinearDownscalerScalingFactor (IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier. More...
IfxCif_LinearDownscalerScalingMode | IfxCif_getLinearDownscalerScalingMode (IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier. More...
uint32 | IfxCif_getMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt. More...
IfxCif_State | IfxCif_getMiDataPathInputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input. More...
IfxCif_State | IfxCif_getMiDataPathOutputEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output. More...
IfxCif_State | IfxCif_getMiFeatureEnableState (IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path. More...
IfxCif_State | IfxCif_getMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
uint32 | IfxCif_getMiMainPictureComponentBaseAddress (IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component. More...
uint32 | IfxCif_getMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component. More...
uint32 | IfxCif_getMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent. More...
uint32 | IfxCif_getMiMainPictureComponentOffsetCounter (IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path component. More...
uint32 | IfxCif_getMiMainPictureComponentOffsetCounterStart (IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component. More...
uint32 | IfxCif_getMiMainPictureComponentSize (IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component. More...
IfxCif_ErrorState | IfxCif_getMiStatusInformation (IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface module. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawEpInterruptTriggeredState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawIspInterruptTriggeredState (IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawJpeInterruptTriggeredState (IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawMiInterruptTriggeredState (IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt. More...
IfxCif_InterruptTriggeredState | IfxCif_getRawSecurityWatchdogInterruptTriggeredState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt. More...
IfxCif_State | IfxCif_getSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt. More...
uint16 | IfxCif_getSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier. More...
IfxCif_State | IfxCif_getSoftwareResetMode (IfxCif_Submodules submodule)
Function to query the reset mode of a submodule. More...
void | IfxCif_programJpeTable (IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
void | IfxCif_resetModule (Ifx_CIF_BBB *cifBbb)
resets CIF kernel More...
void | IfxCif_resetSecurityWatchdogCounter (IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter. More...
void | IfxCif_setDpControlEnableState (IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source. More...
void | IfxCif_setDpCounter (IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value. More...
void | IfxCif_setDpUserDefinedSymbol (uint8 x, uint16 value)
Function to set one user defined debug symbol. More...
void | IfxCif_setEpBaseInitAddress (IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path. More...
void | IfxCif_setEpCroppingCameraDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path. More...
void | IfxCif_setEpCroppingEnableState (IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path. More...
void | IfxCif_setEpCroppingMaximumDisplacement (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path. More...
void | IfxCif_setEpCroppingOffsetOutputWindow (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path. More...
void | IfxCif_setEpCroppingOffsetsOutputWindow (IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path. More...
void | IfxCif_setEpCroppingPictureSize (IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path. More...
void | IfxCif_setEpCroppingPictureSizes (IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path. More...
void | IfxCif_setEpFeatureEnableState (IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path. More...
void | IfxCif_setEpInitSize (IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path. More...
void | IfxCif_setEpInitialFillLevelInterruptOffset (uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path. More...
void | IfxCif_setEpInitialOffsetCounter (IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path. More...
void | IfxCif_setEpInterruptEnableState (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setEpInterruptRequestBit (IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setEpOffsetCounterStart (uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path. More...
void | IfxCif_setEpRecenterValue (IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter)) More...
void | IfxCif_setEpWriteFormat (IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path. More...
void | IfxCif_setHuffmanAcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values. More...
void | IfxCif_setHuffmanAcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values. More...
void | IfxCif_setHuffmanDcTableLength (IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values. More...
void | IfxCif_setHuffmanDcTableSelector (IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values. More...
void | IfxCif_setInternalClockMode (IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule. More...
void | IfxCif_setIspAcquisitionOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier. More...
void | IfxCif_setIspAcquisitionSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier. More...
void | IfxCif_setIspInputSelectionAppendState (IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal. More...
void | IfxCif_setIspInterruptEnableState (IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setIspInterruptRequestBit (IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setIspOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier. More...
void | IfxCif_setIspPictureSize (IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier. More...
void | IfxCif_setIspisCameraDisplacement (uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier. More...
void | IfxCif_setIspisMaximumDisplacement (IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier. More...
void | IfxCif_setIspisOutputWindowOffset (IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier. More...
void | IfxCif_setIspisPictureSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier. More...
void | IfxCif_setJpeInterruptEnableState (IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setJpeInterruptRequestBit (IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setJpeQTableSelector (IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component. More...
void | IfxCif_setJpeScalingEnableState (IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source. More...
void | IfxCif_setJpegCodecImageSize (IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier. More...
void | IfxCif_setLinearDownscalerEnableState (IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier. More...
void | IfxCif_setLinearDownscalerScalingFactor (IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier. More...
void | IfxCif_setLinearDownscalerScalingFactors (uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler. More...
void | IfxCif_setLinearDownscalerScalingMode (IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier. More...
void | IfxCif_setLinearDownscalerScalingModes (IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier. More...
void | IfxCif_setMiFeatureEnableState (IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path. More...
void | IfxCif_setMiInterruptEnableState (IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setMiInterruptRequestBit (IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setMiLuminanceBurstLength (IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data. More...
void | IfxCif_setMiMainPictureComponentBaseInitAddress (IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component. More...
void | IfxCif_setMiMainPictureComponentInitSize (IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component. More...
void | IfxCif_setMiMainPictureComponentInitialOffsetCounter (IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component. More...
void | IfxCif_setModuleStateRequest (IfxCif_State state)
Function to request enabling or disabling of the CIF module. More...
void | IfxCif_setSecurityWatchdogInterruptEnableState (IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt. More...
void | IfxCif_setSecurityWatchdogInterruptRequestBit (IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) More...
void | IfxCif_setSecurityWatchdogTimeout (IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout. More...
void | IfxCif_setSoftwareResetMode (IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule. More...

Detailed Description

CIF basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCif.c.


iLLD_TC26B: IfxCif_Cam.c File Reference

  • Cif
  • Cam
Macros | Functions
IfxCif_Cam.c File Reference

CIF CAM details. More...

#include "IfxCif_Cam.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxCif_Cam.c:

Go to the source code of this file.

Macros

#define | IFXCIF_CAM_ALIGN(size, align) ((((size) / (align)) * (align)) + ((((size) % (align)) != 0) ? (align) : 0))
#define | IFXCIF_CAM_MEM_ALIGN(size) IFXCIF_CAM_ALIGN(size, IFXCIF_CAM_MEM_ALIGN_SIZE)

Functions

IFX_STATIC IfxCif_Cam_Status | IfxCif_Cam_initMemSize (IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
IFX_INLINE uint32 | IfxCif_Cam_calcMem (uint32 bytes, float32 frames)
IFX_INLINE void | IfxCif_Cam_initPictInfo (IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
IFX_INLINE void | IfxCif_Cam_initPortPins (IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
initializes GPIO Ports for image capturing More...
IFX_INLINE boolean | IfxCif_Cam_isEmulationExtensionAvailable (void)
IFX_INLINE uint32 | IfxCif_Cam_yuvMemSize (const IfxCif_Cam *cam)
IFX_STATIC IfxCif_Cam_Status | IfxCif_Cam_initCamera (const IfxCif_Cam_Config *config)
OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash. More...
IFX_STATIC void | IfxCif_Cam_initCif (const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Initialises the CIF for image capturing. More...
IFX_STATIC void | IfxCif_Cam_initCifDownscaler (const IfxCif_Cam_Downscaling *ds)
IFX_STATIC void | IfxCif_Cam_initCifExtraPath (const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifIspUnit (const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifJpegEncoder (const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initCifMemInterface (const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
IFX_STATIC void | IfxCif_Cam_initEmem (void)
Enables CIF and EMEM and initialises all memory to 0. More...
void | IfxCif_Cam_clearAllFlags (const IfxCif_Cam *cam)
Clear all CIF module notification flags. More...
void | IfxCif_Cam_disableJpegEncoder (const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path. More...
void | IfxCif_Cam_enableJpegEncoder (const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly. More...
IFX_CONST IfxCif_Cam_PictureInfo * | IfxCif_Cam_getExtraPathPictureInfo (const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path. More...
boolean | IfxCif_Cam_getLastJpegEncodingInfo (IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process. More...
IfxCif_Cam_Status | IfxCif_Cam_init (IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself. More...
void | IfxCif_Cam_restartCapture (const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output. More...
void | IfxCif_Cam_startCapture (const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter. More...
void | IfxCif_Cam_stopCapture (const IfxCif_Cam *cam)
Stop capture by disabling the ISP output. More...

Detailed Description

CIF CAM details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCif_Cam.c.

Macro Definition Documentation

◆ IFXCIF_CAM_ALIGN

#define IFXCIF_CAM_ALIGN | ( | size,
 |  | align
 | ) | ((((size) / (align)) * (align)) + ((((size) % (align)) != 0) ? (align) : 0))

Definition at line 36 of file IfxCif_Cam.c.

◆ IFXCIF_CAM_MEM_ALIGN

#define IFXCIF_CAM_MEM_ALIGN ( size ) IFXCIF_CAM_ALIGN(size, IFXCIF_CAM_MEM_ALIGN_SIZE)

Definition at line 38 of file IfxCif_Cam.c.

Referenced by IfxCif_Cam_initMemSize().


iLLD_TC26B: IfxCif_cfg.c File Reference

  • _Impl
IfxCif_cfg.c File Reference

CIF on-chip implementation data. More...

#include "IfxCif_cfg.h"
Include dependency graph for IfxCif_cfg.c:

Go to the source code of this file.

Detailed Description

CIF on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCif_cfg.c.


iLLD_TC26B: IfxCpu.c File Reference

  • Cpu
  • Std
Functions
IfxCpu.c File Reference

CPU basic functionality. More...

#include "IfxCpu.h"
Include dependency graph for IfxCpu.c:

Go to the source code of this file.

Functions

boolean | IfxCpu_acquireMutex (IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore). More...
IfxCpu_CoreMode | IfxCpu_getCoreMode (Ifx_CPU *cpu)
API to get current mode of CPU. More...
IfxCpu_ResourceCpu | IfxCpu_getIndex (Ifx_CPU *cpu)
API to get current mode of CPU. More...
uint32 | IfxCpu_getRandomValue (uint32 *seed)
API to get random value. More...
uint32 | IfxCpu_getRandomValueWithinRange (uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range. More...
void | IfxCpu_releaseMutex (IfxCpu_mutexLock *lock)
API to unlock the mutex . More...
void | IfxCpu_resetSpinLock (IfxCpu_spinLock *lock)
API to unlock the resource . More...
boolean | IfxCpu_setCoreMode (Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU. More...
boolean | IfxCpu_setProgramCounter (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified. More...
boolean | IfxCpu_setSpinLock (IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout. More...
boolean | IfxCpu_startCore (Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU. More...
boolean | IfxCpu_waitEvent (IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation. More...
void | IfxCpu_emitEvent (IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event. More...

Detailed Description

CPU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu.c.


iLLD_TC26B: IfxCpu_cfg.c File Reference

  • _Impl
Variables
IfxCpu_cfg.c File Reference

CPU on-chip implementation data. More...

#include "IfxCpu_cfg.h"
Include dependency graph for IfxCpu_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap [IFXCPU_NUM_MODULES]

Detailed Description

CPU on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_cfg.c.

Variable Documentation

◆ IfxCpu_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Initial value:
= {
{&MODULE_CPU0, (uint32)IfxCpu_ResourceCpu_0},
{&MODULE_CPU1, (uint32)IfxCpu_ResourceCpu_1}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:138
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:139

Definition at line 35 of file IfxCpu_cfg.c.

Referenced by IfxCpu_getAddress(), and IfxCpu_getIndex().


iLLD_TC26B: IfxCpu_CStart.h File Reference

  • Cpu
  • CStart
Macros | Functions
IfxCpu_CStart.h File Reference

This file contains the Core startup sequence. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "Tricore/Compilers/Compilers.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxCpu_CStart.h:

Go to the source code of this file.

Macros

#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu)
Configuration for pre initialization hook function. More...

Functions

void | _Core1_start (void)
void | _Core2_start (void)

Detailed Description

This file contains the Core startup sequence.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_CStart.h.

Macro Definition Documentation

◆ IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK

#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK ( cpu )

Configuration for pre initialization hook function.

Hook function is empty if not configured

Definition at line 56 of file IfxCpu_CStart.h.

Referenced by _Core0_start(), and _Core1_start().

Function Documentation

◆ _Core1_start()

void _Core1_start ( void )

Definition at line 72 of file IfxCpu_CStart1.c.

Referenced by _Core0_start().

◆ _Core2_start()

void _Core2_start ( void )


iLLD_TC26B: IfxCpu_CStart0.c File Reference

  • Cpu
  • CStart
Macros | Functions | Variables
IfxCpu_CStart0.c File Reference

This file contains the Core startup sequence for Cpu0. More...

#include "Ifx_Cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Cpu/Std/IfxCpu.h"
#include "Cpu/CStart/IfxCpu_CStart.h"
#include "IfxScu_reg.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_CStart0.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1)
Configuration for CpuX enable. More...
#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1)
#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1)
Configuration for cache enable. More...
#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1)
#define | IFXCPU_CSTART_CCU_INIT_HOOK() (void)IfxScuCcu_init(&IfxScuCcu_defaultClockConfig); /*The status returned by Ccu init is ignored */
#define | IFXCSTART0_PSW_DEFAULT (0x00000980u)
#define | IFXCSTART0_PCX_O_S_DEFAULT (0xfff00000u)

Functions

IFX_EXTERN void | core0_main (void)
void | _Core0_start (void)
void | _START (void)

Variables

const uint32 | BootModeHeader_0 []
Boot Mode Header 0 Boot mode header at memory location 0c8000 0000. More...
const uint32 | BootModeHeader_1 []
Boot Mode Header 1 Boot mode header at memory location 0c8002 0000. More...

Detailed Description

This file contains the Core startup sequence for Cpu0.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_CStart0.c.

Macro Definition Documentation

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE0

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1)

Configuration for CpuX enable.

Cpu0 enabled by default

Definition at line 43 of file IfxCpu_CStart0.c.

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1)

Data Cache enabled by default

Definition at line 56 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1)

Configuration for cache enable.

Program Cache enabled by default

Definition at line 53 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE1

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1)

Cpu1 enabled by default

Definition at line 46 of file IfxCpu_CStart0.c.

◆ IFXCPU_CSTART_CCU_INIT_HOOK

#define IFXCPU_CSTART_CCU_INIT_HOOK ( ) (void)IfxScuCcu_init(&IfxScuCcu_defaultClockConfig); /*The status returned by Ccu init is ignored */

Definition at line 60 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

◆ IFXCSTART0_PCX_O_S_DEFAULT

#define IFXCSTART0_PCX_O_S_DEFAULT (0xfff00000u)

Definition at line 78 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

◆ IFXCSTART0_PSW_DEFAULT

#define IFXCSTART0_PSW_DEFAULT (0x00000980u)

Definition at line 77 of file IfxCpu_CStart0.c.

Referenced by _Core0_start().

Function Documentation

◆ _Core0_start()

void _Core0_start ( void )

Definition at line 87 of file IfxCpu_CStart0.c.

Referenced by _START().

◆ _START()

void _START ( void )

Definition at line 185 of file IfxCpu_CStart0.c.

◆ core0_main()

IFX_EXTERN void core0_main ( void )

Referenced by _Core0_start().

Variable Documentation

◆ BootModeHeader_0

const uint32 BootModeHeader_0[]
Initial value:
= {
0x00000000u,
0xb3590070u,
0x00000000u,
0x00000000u,
0x00000000u,
0x00000000u,
0x791eb864u,
0x86e1479bu
}
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:126

Boot Mode Header 0 Boot mode header at memory location 0c8000 0000.

Definition at line 223 of file IfxCpu_CStart0.c.

◆ BootModeHeader_1

const uint32 BootModeHeader_1[]
Initial value:
= {
0x00000000u,
0xB3590070u,
0x00000000u,
0x00000000u,
0x00000000u,
0x00000000u,
0x791eb864u,
0x86e1479bu
}
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:126

Boot Mode Header 1 Boot mode header at memory location 0c8002 0000.

Definition at line 263 of file IfxCpu_CStart0.c.


iLLD_TC26B: IfxCpu_CStart1.c File Reference

  • Cpu
  • CStart
Macros | Functions
IfxCpu_CStart1.c File Reference

This file contains the Core startup sequence for Cpu1. More...

#include "Ifx_Cfg.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
#include "Cpu/CStart/IfxCpu_CStart.h"
#include "IfxScu_reg.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_CStart1.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1)
Configuration for cache enable. More...
#define | IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1)
#define | IFXCSTART1_PSW_DEFAULT (0x00000980u)
#define | IFXCSTART1_PCX_O_S_DEFAULT (0xfff00000u)

Functions

IFX_EXTERN void | core1_main (void)
void | _Core1_start (void)

Detailed Description

This file contains the Core startup sequence for Cpu1.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_CStart1.c.

Macro Definition Documentation

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1)

Data Cache enabled by default

Definition at line 46 of file IfxCpu_CStart1.c.

Referenced by _Core1_start().

◆ IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE

#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1)

Configuration for cache enable.

Program Cache enabled by default

Definition at line 43 of file IfxCpu_CStart1.c.

Referenced by _Core1_start().

◆ IFXCSTART1_PCX_O_S_DEFAULT

#define IFXCSTART1_PCX_O_S_DEFAULT (0xfff00000u)

Definition at line 63 of file IfxCpu_CStart1.c.

Referenced by _Core1_start().

◆ IFXCSTART1_PSW_DEFAULT

#define IFXCSTART1_PSW_DEFAULT (0x00000980u)

Definition at line 62 of file IfxCpu_CStart1.c.

Referenced by _Core1_start().

Function Documentation

◆ _Core1_start()

void _Core1_start ( void )

Definition at line 72 of file IfxCpu_CStart1.c.

Referenced by _Core0_start().

◆ core1_main()

IFX_EXTERN void core1_main ( void )

Referenced by _Core1_start().


iLLD_TC26B: IfxCpu_IntrinsicsDcc.h File Reference

  • Cpu
  • Std
Macros | Functions | Variables
IfxCpu_IntrinsicsDcc.h File Reference
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_IntrinsicsDcc.h:

Go to the source code of this file.

Macros

#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__min __min
#define | Ifx__mins __mins
#define | Ifx__minu __minu
#define | Ifx__max __max
#define | Ifx__maxs __maxs
#define | Ifx__maxu __maxu
#define | Ifx__saturate(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( __minf(__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__extr __extr
#define | Ifx__extru __extru
#define | Ifx__getbit(address, bitoffset) __extru( *(address), bitoffset, 1 )
#define | Ifx__ins __ins
#define | Ifx__insert __insert
#define | Ifx__insn __insn
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
#define | Ifx__bisr __bisr
#define | Ifx__disable __disable
#define | Ifx__enable __enable
#define | Ifx__restore __restore
#define | Ifx__syscall __syscall
#define | Ifx__cacheawi __cacheawi
#define | Ifx__abs __abs
#define | Ifx__absdif __absdif
#define | Ifx__abss __abss
#define | Ifx__clo __clo
#define | Ifx__cls __cls
#define | Ifx__clz __clz
#define | Ifx__mfcr __mfcr
#define | Ifx__mtcr __mtcr
#define | Ifx__adds __adds
#define | Ifx__debug __debug
#define | Ifx__dsync __dsync
#define | Ifx__isync __isync
#define | Ifx__mem_barrier __scheduling_barrier
#define | Ifx__nop __nop
#define | Ifx__NOP __nops
#define | Ifx__rslcx
#define | Ifx__svlcx
#define | Ifx__setareg(areg, val) ___setareg(areg,val)
#define | ___setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __sqrf Ifx__sqrf
#define | __sqrtf Ifx__sqrtf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __float_to_fract Ifx__float_to_fract
#define | __fract_to_float Ifx__fract_to_float
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __getbit Ifx__getbit
#define | __imaskldmst Ifx__imaskldmst
#define | __putbit Ifx__putbit
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __cacheiwi Ifx__cacheiwi
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __absb Ifx__absb
#define | __absh Ifx__absh
#define | __abssh Ifx__abssh
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __initpackb Ifx__initpackb
#define | __initpackbl Ifx__initpackbl
#define | __initpackhw Ifx__initpackhw
#define | __initpackhwl Ifx__initpackhwl
#define | __initupackb Ifx__initupackb
#define | __initupackhw Ifx__initupackhw
#define | __insertbyte1 Ifx__insertbyte1
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte4 Ifx__insertbyte4
#define | __inserthw1 Ifx__inserthw1
#define | __inserthw2 Ifx__inserthw2
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte4 Ifx__insertubyte4
#define | __insertuhw1 Ifx__insertuhw1
#define | __insertuhw2 Ifx__insertuhw2
#define | __minb Ifx__minb
#define | __minbu Ifx__minbu
#define | __minh Ifx__minh
#define | __minhu Ifx__minhu
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __fabs Ifx__fabs
#define | __fabsf Ifx__fabsf
#define | __parity Ifx__parity
#define | __satb Ifx__satb
#define | __satbu Ifx__satbu
#define | __sath Ifx__sath
#define | __sathu Ifx__sathu
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __ldmst Ifx__ldmst
#define | __mem_barrier Ifx__mem_barrier
#define | NOP Ifx__NOP
#define | __nops Ifx__nops
#define | __nops1000 Ifx__nops1000
#define | __swap Ifx__swap
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __crc32 Ifx__crc32

Functions

asm volatile void | Ifx__non_return_call (void(*fun)(void))
asm volatile void | Ifx__jump_and_link (void(*fun)(void))
asm volatile void | Ifx__moveToDataParam0 (unsigned int var)
asm volatile void | Ifx__moveToDataParamRet (unsigned int var)
asm volatile unsigned int | Ifx__getDataParamRet (void)
asm volatile void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
asm volatile void | Ifx__jumpBackToLink (void)
sint32 | __min (sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32 | __mins (sint32, sint32) __attribute__((intrinsic_function(0x10b
uint32 | __minu (uint32, uint32) __attribute__((intrinsic_pseudo(3
sint32 | __max (sint32, sint32) __attribute__((intrinsic_pseudo(3
uint32 | __maxs (uint32, uint32) __attribute__((intrinsic_function(0x10b
uint32 | __maxu (uint32, uint32) __attribute__((intrinsic_pseudo(3
asm short | Ifx__clssf (sfract a)
asm fract | Ifx__float_to_fract (float a)
asm float | Ifx__fract_to_float (fract a)
Convert fract to float. More...
asm fract | Ifx__getfract (laccum a)
asm sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
asm sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
asm long | Ifx__mulfractfract (fract a, fract b)
asm long | Ifx__mulfractlong (fract a, long b)
asm sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | __float_to_sfract (float a)
asm sfract | Ifx__s16_to_sfract (short a)
asm short | Ifx__sfract_to_s16 (sfract a)
asm volatile uint16 | Ifx__sfract_to_u16 (sfract a)
asm laccum | Ifx__shaaccum (laccum a, sint32 b)
asm fract | Ifx__shafracts (fract a, sint32 b)
asm sfract | Ifx__shasfracts (sfract a, sint32 b)
asm sfract | Ifx__u16_to_sfract (uint16 a)
sint32 | __extr (sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __extru (uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
uint32 | __ins (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
uint32 | __insert (uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
uint32 | __insn (uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
asm volatile void | Ifx__imaskldmst (void *a, sint32 b, sint32 p, const sint32 w)
void | __bisr (const uint32) __attribute__((intrinsic_function(0x100
void | __disable (void) __attribute__((intrinsic_function(0x103
void | __enable (void) __attribute__((intrinsic_function(0x103
void | __restore (sint32) __attribute__((intrinsic_function(0x104
void | __syscall (const uint32) __attribute__((intrinsic_function(0x100
void | __cacheawi (void *) __attribute__((intrinsic_function(0x110
asm volatile uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
asm volatile void | Ifx__cacheiwi (uint8 *p)
asm circ_t | __initcirc (void *buf, uint16 bufsize, uint16 byteindex)
asm volatile sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
asm volatile uint32 | Ifx__rol (uint32 operand, uint32 count)
asm volatile uint32 | Ifx__ror (uint32 operand, uint32 count)
asm __packb | Ifx__absb (__packb a)
asm __packhw | Ifx__absh (__packhw a)
asm __packhw | Ifx__abssh (__packhw a)
asm sint8 | Ifx__extractbyte1 (__packb a)
Extract first byte from a __packb. More...
asm sint8 | Ifx__extractbyte2 (__packb a)
Extract second byte from a __packb. More...
asm sint8 | Ifx__extractbyte3 (__packb a)
Extract third byte from a __packb. More...
asm sint8 | Ifx__extractbyte4 (__packb a)
Extract fourth byte from a __packb. More...
asm short | Ifx__extracthw1 (__packhw a)
Extract first short from a __packhw. More...
asm short | Ifx__extracthw2 (__packhw a)
Extract second short from a __packhw. More...
asm volatile uint8 | Ifx__extractubyte1 (__upackb a)
asm volatile uint8 | Ifx__extractubyte2 (__upackb a)
asm volatile uint8 | Ifx__extractubyte3 (__upackb a)
asm volatile uint8 | Ifx__extractubyte4 (__upackb a)
asm volatile uint16 | Ifx__extractuhw1 (__upackhw a)
asm volatile uint16 | Ifx__extractuhw2 (__upackhw a)
asm sint8 | Ifx__getbyte1 (__packb *a)
asm sint8 | Ifx__getbyte2 (__packb *a)
asm sint8 | Ifx__getbyte3 (__packb *a)
asm sint8 | Ifx__getbyte4 (__packb *a)
asm short | Ifx__gethw1 (__packhw *a)
asm short | Ifx__gethw2 (__packhw *a)
asm volatile uint8 | Ifx__getubyte1 (__upackb *a)
asm volatile uint8 | Ifx__getubyte2 (__upackb *a)
asm volatile uint8 | Ifx__getubyte3 (__upackb *a)
asm volatile uint8 | Ifx__getubyte4 (__upackb *a)
asm volatile uint16 | Ifx__getuhw1 (__upackhw *a)
asm volatile uint16 | Ifx__getuhw2 (__upackhw *a)
asm __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
asm __packb | Ifx__initpackbl (long a)
asm __packhw | Ifx__initpackhw (short a, short b)
Initialize __packhw with two integers. More...
asm __packhw | Ifx__initpackhwl (long a)
asm __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
asm __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
asm __packb | Ifx__insertbyte1 (__packb a, sint8 b)
Insert sint8 into first byte of a __packb. More...
asm __packb | Ifx__insertbyte2 (__packb a, sint8 b)
Insert sint8 into second byte of a __packb. More...
asm __packb | Ifx__insertbyte3 (__packb a, sint8 b)
Insert sint8 into third byte of a __packb. More...
asm __packb | Ifx__insertbyte4 (__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb. More...
asm __packhw | Ifx__inserthw1 (__packhw a, short b)
asm __packhw | Ifx__inserthw2 (__packhw a, short b)
asm __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb. More...
asm __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb. More...
asm __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
asm __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
asm __packb | Ifx__minb (__packb a, __packb b)
asm __upackb | Ifx__minbu (__upackb a, __upackb b)
asm __packhw | Ifx__minh (__packhw a, __packhw b)
asm __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
asm volatile void | Ifx__setbyte1 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte2 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte3 (__packb *a, sint8 b)
asm volatile void | Ifx__setbyte4 (__packb *a, sint8 b)
asm volatile void | Ifx__sethw1 (__packhw *a, short b)
asm volatile void | Ifx__sethw2 (__packhw *a, short b)
asm volatile void | Ifx__setubyte1 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte2 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte3 (__upackb *a, uint8 b)
asm volatile void | Ifx__setubyte4 (__upackb *a, uint8 b)
asm volatile void | Ifx__setuhw1 (__upackhw *a, uint16 b)
asm volatile void | Ifx__setuhw2 (__upackhw *a, uint16 b)
sint32 | __abs (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __absdif (sint32, sint32) __attribute__((intrinsic_pseudo(1
sint32 | __abss (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clo (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __cls (sint32) __attribute__((intrinsic_pseudo(1
sint32 | __clz (sint32) __attribute__((intrinsic_pseudo(1
asm double | Ifx__fabs (double d)
asm float | Ifx__fabsf (float f)
sint32 | __mfcr (const uint32) __attribute__((intrinsic_function(0x101
void | __mtcr (const uint32, sint32) __attribute__((intrinsic_function(0x102
asm volatile sint32 | Ifx__parity (sint32 a)
asm sint8 | Ifx__satb (sint32 a)
asm volatile uint8 | Ifx__satbu (sint32 a)
asm short | Ifx__sath (sint32 a)
asm volatile uint16 | Ifx__sathu (sint32 a)
sint32 | __adds (sint32, sint32) __attribute__((intrinsic_pseudo(1
asm volatile uint32 | Ifx__addsu (uint32 a, uint32 b)
asm volatile sint32 | Ifx__subs (sint32 a, sint32 b)
asm volatile uint32 | Ifx__subsu (uint32 a, uint32 b)
void | __debug (void) __attribute__((intrinsic_function(0x103
void | __dsync (void) __attribute__((intrinsic_function(0x103
void | __isync (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
void | __scheduling_barrier (void) __attribute__((intrinsic_function(9
void | __nop (void) __attribute__((intrinsic_function(0x103
asm volatile void | Ifx__nops (uint32 cnt)
asm volatile void | Ifx__nops1000 (uint32 x)
void | __rslcx (void) __attribute__((intrinsic_function(0x103
void | __svlcx (void) __attribute__((intrinsic_function(0x103
asm volatile uint32 | Ifx__swap (void *place, uint32 value)
asm volatile unsigned int | Ifx__cmpAndSwap (unsigned int *address, unsigned long value, unsigned long CmpVal)
asm volatile void | Ifx__stopPerfCounters (void)
asm float | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
asm volatile void * | Ifx__getA11 (void)
asm void | Ifx__setStackPointer (void *stackAddr)
asm volatile unsigned int | Ifx__crc32 (uint32 b, uint32 a)
IFX_INLINE unsigned int | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
asm volatile uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
Generate the Random value. More...

Variables

sint32 min
sint32 min h
uint32 min u
sint32 max
sint32 extr
uint32 ins | t
uint32 insert
void | bisr
void | disable
void | enable
void | restore
void | syscall
void cachea | wi
sint32 abs
sint32 absdif
sint32 abss
sint32 clo
sint32 cls
sint32 clz
sint32 mfcr
void | mtcr
sint32 adds
void | debug
void | dsync
void | isync
void | $ $sb
void | nop
void | rslcx
void | svlcx

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_IntrinsicsDcc.h.

Macro Definition Documentation

◆ ___setareg

#define ___setareg | ( | areg,
 |  | val
 | ) |
Value:
{ __asm ("#$$bp"); \
__asm (" movh.a\t %a15,"#val"@ha\n"); \
__asm (" lea\t %a15,[%a15]"#val"@l\n"); \
__asm (" mov.aa %"#areg", %a15\n"); \
__asm ("#$$ep"); }

Definition at line 1440 of file IfxCpu_IntrinsicsDcc.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1632 of file IfxCpu_IntrinsicsDcc.h.

◆ __absb

#define __absb Ifx__absb

Definition at line 1764 of file IfxCpu_IntrinsicsDcc.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1612 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_AngleTrkF32_updateStatus(), IfxAsclin_setBitTiming(), IfxDsadc_Dsadc_calcDIVx(), IfxMultican_Can_initModule(), IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), IfxMultican_Node_setNominalBitTiming(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculatePrescaler(), and IfxQspi_calculateTimeQuantumLength().

◆ __absh

#define __absh Ifx__absh

Definition at line 1768 of file IfxCpu_IntrinsicsDcc.h.

◆ __abssh

#define __abssh Ifx__abssh

Definition at line 1772 of file IfxCpu_IntrinsicsDcc.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 2036 of file IfxCpu_IntrinsicsDcc.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1744 of file IfxCpu_IntrinsicsDcc.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1748 of file IfxCpu_IntrinsicsDcc.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1604 of file IfxCpu_IntrinsicsDcc.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1628 of file IfxCpu_IntrinsicsDcc.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1588 of file IfxCpu_IntrinsicsDcc.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1660 of file IfxCpu_IntrinsicsDcc.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 2072 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_acquireMutex(), and IfxCpu_setSpinLock().

◆ __crc32

#define __crc32 Ifx__crc32

Definition at line 2096 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1776 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1780 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1784 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1788 of file IfxCpu_IntrinsicsDcc.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1792 of file IfxCpu_IntrinsicsDcc.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1796 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1800 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1804 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1808 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1812 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1816 of file IfxCpu_IntrinsicsDcc.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1820 of file IfxCpu_IntrinsicsDcc.h.

◆ __fabs

#define __fabs Ifx__fabs

Definition at line 2008 of file IfxCpu_IntrinsicsDcc.h.

◆ __fabsf

#define __fabsf Ifx__fabsf

Definition at line 2012 of file IfxCpu_IntrinsicsDcc.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 2084 of file IfxCpu_IntrinsicsDcc.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1664 of file IfxCpu_IntrinsicsDcc.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1668 of file IfxCpu_IntrinsicsDcc.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1696 of file IfxCpu_IntrinsicsDcc.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1656 of file IfxCpu_IntrinsicsDcc.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 2088 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_Trap_extractTrapInfo().

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1732 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxPort_getPinState().

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1824 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1828 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1832 of file IfxCpu_IntrinsicsDcc.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1836 of file IfxCpu_IntrinsicsDcc.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1556 of file IfxCpu_IntrinsicsDcc.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1672 of file IfxCpu_IntrinsicsDcc.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1840 of file IfxCpu_IntrinsicsDcc.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1844 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1848 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1852 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1856 of file IfxCpu_IntrinsicsDcc.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1860 of file IfxCpu_IntrinsicsDcc.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1864 of file IfxCpu_IntrinsicsDcc.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1868 of file IfxCpu_IntrinsicsDcc.h.

◆ __imaskldmst

#define __imaskldmst Ifx__imaskldmst

Definition at line 1736 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 1872 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 1876 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 1880 of file IfxCpu_IntrinsicsDcc.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 1884 of file IfxCpu_IntrinsicsDcc.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 1888 of file IfxCpu_IntrinsicsDcc.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 1892 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 1896 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 1900 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 1904 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 1908 of file IfxCpu_IntrinsicsDcc.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 1912 of file IfxCpu_IntrinsicsDcc.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 1916 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 1920 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 1924 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 1928 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 1932 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 1936 of file IfxCpu_IntrinsicsDcc.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 1940 of file IfxCpu_IntrinsicsDcc.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1544 of file IfxCpu_IntrinsicsDcc.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1572 of file IfxCpu_IntrinsicsDcc.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1564 of file IfxCpu_IntrinsicsDcc.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1568 of file IfxCpu_IntrinsicsDcc.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 2048 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_InternalMux_init(), IfxPort_resetESR(), IfxPort_setESR(), IfxPort_setGroupModeInput(), IfxPort_setGroupModeOutput(), IfxPort_setGroupPadDriver(), IfxPort_setPinMode(), IfxPort_setPinPadDriver(), and IfxQspi_SpiMaster_initChannel().

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1652 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxDsadc_Dsadc_calcDIVx(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculatePrescaler(), and IfxQspi_calculateTimeQuantumLength().

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1676 of file IfxCpu_IntrinsicsDcc.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1680 of file IfxCpu_IntrinsicsDcc.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1640 of file IfxCpu_IntrinsicsDcc.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1620 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_RampF32_step(), IfxMultican_Can_initModule(), and VecMax_f32().

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1580 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 2052 of file IfxCpu_IntrinsicsDcc.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1636 of file IfxCpu_IntrinsicsDcc.h.

◆ __minb

#define __minb Ifx__minb

Definition at line 1944 of file IfxCpu_IntrinsicsDcc.h.

◆ __minbu

#define __minbu Ifx__minbu

Definition at line 1948 of file IfxCpu_IntrinsicsDcc.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1616 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_RampF32_step(), IfxMultican_Can_initModule(), and VecMin_f32().

◆ __minh

#define __minh Ifx__minh

Definition at line 1952 of file IfxCpu_IntrinsicsDcc.h.

◆ __minhu

#define __minhu Ifx__minhu

Definition at line 1956 of file IfxCpu_IntrinsicsDcc.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1576 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), and IfxGtm_Tom_PwmHl_updateShiftCenterAligned().

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1560 of file IfxCpu_IntrinsicsDcc.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1548 of file IfxCpu_IntrinsicsDcc.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1552 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1684 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1688 of file IfxCpu_IntrinsicsDcc.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1752 of file IfxCpu_IntrinsicsDcc.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1648 of file IfxCpu_IntrinsicsDcc.h.

Referenced by Ifx_AngleTrkF32_init(), IfxDsadc_Dsadc_calcDIVx(), and IfxQspi_calculateExtendedConfigurationValue().

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1540 of file IfxCpu_IntrinsicsDcc.h.

Referenced by _Core0_start(), _Core1_start(), and _START().

◆ __nops

#define __nops Ifx__nops

Definition at line 2060 of file IfxCpu_IntrinsicsDcc.h.

◆ __nops1000

#define __nops1000 Ifx__nops1000

Definition at line 2064 of file IfxCpu_IntrinsicsDcc.h.

◆ __parity

#define __parity Ifx__parity

Definition at line 2016 of file IfxCpu_IntrinsicsDcc.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1740 of file IfxCpu_IntrinsicsDcc.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1756 of file IfxCpu_IntrinsicsDcc.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1760 of file IfxCpu_IntrinsicsDcc.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1692 of file IfxCpu_IntrinsicsDcc.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1608 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCif_Cam_calcMem(), IfxQspi_calculateTimeQuantumLength(), IfxScuCcu_setGtmFrequency(), and IfxScuCcu_setSriFrequency().

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1704 of file IfxCpu_IntrinsicsDcc.h.

◆ __satb

#define __satb Ifx__satb

Definition at line 2020 of file IfxCpu_IntrinsicsDcc.h.

◆ __satbu

#define __satbu Ifx__satbu

Definition at line 2024 of file IfxCpu_IntrinsicsDcc.h.

◆ __sath

#define __sath Ifx__sath

Definition at line 2028 of file IfxCpu_IntrinsicsDcc.h.

◆ __sathu

#define __sathu Ifx__sathu

Definition at line 2032 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1592 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1644 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1624 of file IfxCpu_IntrinsicsDcc.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1584 of file IfxCpu_IntrinsicsDcc.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 2076 of file IfxCpu_IntrinsicsDcc.h.

Referenced by _Core0_start(), and _Core1_start().

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 1960 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 1964 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 1968 of file IfxCpu_IntrinsicsDcc.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 1972 of file IfxCpu_IntrinsicsDcc.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 1976 of file IfxCpu_IntrinsicsDcc.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 1980 of file IfxCpu_IntrinsicsDcc.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 2092 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 1984 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 1988 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 1992 of file IfxCpu_IntrinsicsDcc.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 1996 of file IfxCpu_IntrinsicsDcc.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 2000 of file IfxCpu_IntrinsicsDcc.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 2004 of file IfxCpu_IntrinsicsDcc.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1708 of file IfxCpu_IntrinsicsDcc.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1712 of file IfxCpu_IntrinsicsDcc.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1716 of file IfxCpu_IntrinsicsDcc.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1720 of file IfxCpu_IntrinsicsDcc.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1724 of file IfxCpu_IntrinsicsDcc.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1596 of file IfxCpu_IntrinsicsDcc.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1600 of file IfxCpu_IntrinsicsDcc.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 2080 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_stopCounters().

◆ __subs

#define __subs Ifx__subs

Definition at line 2040 of file IfxCpu_IntrinsicsDcc.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 2044 of file IfxCpu_IntrinsicsDcc.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 2068 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxAsclin_Spi_lock(), and IfxQspi_SpiMaster_lock().

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1728 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) | ___setareg(areg,val)

Insert n NOP instruction

Definition at line 1438 of file IfxCpu_IntrinsicsDcc.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 2056 of file IfxCpu_IntrinsicsDcc.h.

Function Documentation

◆ Ifx__crc32()

asm volatile unsigned int Ifx__crc32 | ( | uint32 | b,
 |  | uint32 | a
 | ) |  |

Definition at line 1487 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_calculateCrc32().

◆ Ifx__fixpoint_to_float32()

asm float Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1467 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getA11()

asm volatile void* Ifx__getA11 ( void )

Definition at line 1474 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__getDataParamRet()

asm volatile unsigned int Ifx__getDataParamRet ( void )

Definition at line 71 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpBackToLink()

asm volatile void Ifx__jumpBackToLink ( void )

Definition at line 94 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 84 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 89 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToAddrParam0()

asm volatile void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 77 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToDataParam0()

asm volatile void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 57 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__moveToDataParamRet()

asm volatile void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 64 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__setStackPointer()

asm void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1480 of file IfxCpu_IntrinsicsDcc.h.

◆ Ifx__stopPerfCounters()

asm volatile void Ifx__stopPerfCounters ( void )

Definition at line 1448 of file IfxCpu_IntrinsicsDcc.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE unsigned int IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1494 of file IfxCpu_IntrinsicsDcc.h.

◆ IfxCpu_getRandomVal()

asm volatile uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Generate the Random value.

This function generates the random value by taking a valid seed and limits.

Parameters
a | lower limit.
x | valid seed value.
m | upper limit.
Returns
Returns the random value.

Definition at line 1517 of file IfxCpu_IntrinsicsDcc.h.

Referenced by IfxCpu_getRandomValue().


iLLD_TC26B: IfxCpu_IntrinsicsGhs.h File Reference

  • Cpu
  • Std
Macros | Typedefs | Functions
IfxCpu_IntrinsicsGhs.h File Reference
#include "Ifx_Types.h"
#include <intrinsics.h>
Include dependency graph for IfxCpu_IntrinsicsGhs.h:

Go to the source code of this file.

Macros

#define | STRINGIFY(x) #x
#define | Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_sfract Ifx__round16
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __mem_barrier Ifx__mem_barrier
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __sqrf Ifx__sqrf
#define | __sqrtf Ifx__sqrtf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __fract_to_float Ifx__fract_to_float
#define | __float_to_fract Ifx__float_to_fract
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __float_to_sfract Ifx__float_to_sfract
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __extr Ifx__extr
#define | __extru Ifx__extru
#define | __getbit Ifx__getbit
#define | __insert Ifx__insert
#define | __putbit Ifx__putbit
#define | __cacheawi Ifx__cacheawi
#define | __cacheiwi Ifx__cacheiwi
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __initpackb Ifx__initpackb
#define | __initpackbl Ifx__initpackbl
#define | __initpackhw Ifx__initpackhw
#define | __initpackhwl Ifx__initpackhwl
#define | __initupackb Ifx__initupackb
#define | __initupackhw Ifx__initupackhw
#define | __insertbyte1 Ifx__insertbyte1
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte4 Ifx__insertbyte4
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte4 Ifx__insertubyte4
#define | __inserthw1 Ifx__inserthw1
#define | __inserthw2 Ifx__inserthw2
#define | __insertuhw1 Ifx__insertuhw1
#define | __insertuhw2 Ifx__insertuhw2
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __ldmst Ifx__ldmst
#define | __nops Ifx__nops
#define | __swap Ifx__swap
#define | NOP Ifx__NOP
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __popcnt Ifx__popcnt
#define | __cacheai Ifx__cacheai

Typedefs

typedef void(* voidfunc) ()

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (void(*fun)(void))
IFX_INLINE void | Ifx__jumpToFunctionWithLink (void(*fun)(void))
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
__asm__ laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)
IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE unsigned int | Ifx__cmpAndSwap (unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction. More...
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE void | Ifx__cacheai (uint8 *p)

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_IntrinsicsGhs.h.

Macro Definition Documentation

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1277 of file IfxCpu_IntrinsicsGhs.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1257 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheai

#define __cacheai Ifx__cacheai

Definition at line 1681 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheawi

#define __cacheawi Ifx__cacheawi

Definition at line 1397 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1405 of file IfxCpu_IntrinsicsGhs.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1401 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1249 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1273 of file IfxCpu_IntrinsicsGhs.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1229 of file IfxCpu_IntrinsicsGhs.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1305 of file IfxCpu_IntrinsicsGhs.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 1661 of file IfxCpu_IntrinsicsGhs.h.

◆ __extr

#define __extr Ifx__extr

Definition at line 1377 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1421 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1425 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1429 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1433 of file IfxCpu_IntrinsicsGhs.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1437 of file IfxCpu_IntrinsicsGhs.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1441 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1445 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1449 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1453 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1457 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1461 of file IfxCpu_IntrinsicsGhs.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1465 of file IfxCpu_IntrinsicsGhs.h.

◆ __extru

#define __extru Ifx__extru

Definition at line 1381 of file IfxCpu_IntrinsicsGhs.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 1665 of file IfxCpu_IntrinsicsGhs.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1313 of file IfxCpu_IntrinsicsGhs.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 1345 of file IfxCpu_IntrinsicsGhs.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1309 of file IfxCpu_IntrinsicsGhs.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1341 of file IfxCpu_IntrinsicsGhs.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1301 of file IfxCpu_IntrinsicsGhs.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 1669 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1385 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1469 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1473 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1477 of file IfxCpu_IntrinsicsGhs.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1481 of file IfxCpu_IntrinsicsGhs.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1193 of file IfxCpu_IntrinsicsGhs.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1317 of file IfxCpu_IntrinsicsGhs.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1485 of file IfxCpu_IntrinsicsGhs.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1489 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1493 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1497 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1501 of file IfxCpu_IntrinsicsGhs.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1505 of file IfxCpu_IntrinsicsGhs.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1509 of file IfxCpu_IntrinsicsGhs.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1513 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 1517 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 1521 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 1525 of file IfxCpu_IntrinsicsGhs.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 1529 of file IfxCpu_IntrinsicsGhs.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 1533 of file IfxCpu_IntrinsicsGhs.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 1537 of file IfxCpu_IntrinsicsGhs.h.

◆ __insert

#define __insert Ifx__insert

Definition at line 1389 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 1541 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 1545 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 1549 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 1553 of file IfxCpu_IntrinsicsGhs.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 1573 of file IfxCpu_IntrinsicsGhs.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 1577 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 1557 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 1561 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 1565 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 1569 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 1581 of file IfxCpu_IntrinsicsGhs.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 1585 of file IfxCpu_IntrinsicsGhs.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1181 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1209 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1201 of file IfxCpu_IntrinsicsGhs.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1205 of file IfxCpu_IntrinsicsGhs.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 1637 of file IfxCpu_IntrinsicsGhs.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1297 of file IfxCpu_IntrinsicsGhs.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1321 of file IfxCpu_IntrinsicsGhs.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1325 of file IfxCpu_IntrinsicsGhs.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1285 of file IfxCpu_IntrinsicsGhs.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1265 of file IfxCpu_IntrinsicsGhs.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1221 of file IfxCpu_IntrinsicsGhs.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 1213 of file IfxCpu_IntrinsicsGhs.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1281 of file IfxCpu_IntrinsicsGhs.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1261 of file IfxCpu_IntrinsicsGhs.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1217 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1197 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1185 of file IfxCpu_IntrinsicsGhs.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1189 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1329 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1333 of file IfxCpu_IntrinsicsGhs.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1409 of file IfxCpu_IntrinsicsGhs.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1293 of file IfxCpu_IntrinsicsGhs.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1177 of file IfxCpu_IntrinsicsGhs.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 1641 of file IfxCpu_IntrinsicsGhs.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 1677 of file IfxCpu_IntrinsicsGhs.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1393 of file IfxCpu_IntrinsicsGhs.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1413 of file IfxCpu_IntrinsicsGhs.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1417 of file IfxCpu_IntrinsicsGhs.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1337 of file IfxCpu_IntrinsicsGhs.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1253 of file IfxCpu_IntrinsicsGhs.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1349 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1233 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1289 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1269 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 1237 of file IfxCpu_IntrinsicsGhs.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1225 of file IfxCpu_IntrinsicsGhs.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 1653 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 1589 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 1593 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 1597 of file IfxCpu_IntrinsicsGhs.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 1601 of file IfxCpu_IntrinsicsGhs.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 1605 of file IfxCpu_IntrinsicsGhs.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 1609 of file IfxCpu_IntrinsicsGhs.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 1673 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 1613 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 1617 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 1621 of file IfxCpu_IntrinsicsGhs.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 1625 of file IfxCpu_IntrinsicsGhs.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 1629 of file IfxCpu_IntrinsicsGhs.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 1633 of file IfxCpu_IntrinsicsGhs.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1353 of file IfxCpu_IntrinsicsGhs.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1357 of file IfxCpu_IntrinsicsGhs.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1361 of file IfxCpu_IntrinsicsGhs.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1365 of file IfxCpu_IntrinsicsGhs.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1369 of file IfxCpu_IntrinsicsGhs.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1241 of file IfxCpu_IntrinsicsGhs.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1245 of file IfxCpu_IntrinsicsGhs.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 1657 of file IfxCpu_IntrinsicsGhs.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 1645 of file IfxCpu_IntrinsicsGhs.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1373 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__mem_barrier

#define Ifx__mem_barrier __asm__ volatile("":::"memory");

Insert a memory barrier

Definition at line 91 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm__ volatile ("ji %0"::"a"(fun))

Function call without return

Definition at line 43 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) |
Value:
{ uint32 reg_val= (uint32)val; \
asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
uint32
unsigned long uint32
Definition: Platform_Types.h:113

Definition at line 1065 of file IfxCpu_IntrinsicsGhs.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 1649 of file IfxCpu_IntrinsicsGhs.h.

◆ STRINGIFY

#define STRINGIFY ( x ) #x

Definition at line 37 of file IfxCpu_IntrinsicsGhs.h.

Typedef Documentation

◆ voidfunc

typedef void(* voidfunc) ()

Definition at line 39 of file IfxCpu_IntrinsicsGhs.h.

Function Documentation

◆ Ifx__cacheai()

IFX_INLINE void Ifx__cacheai ( uint8 * p )

Invalidate cache address "p". Generates CACHEA.I [Ab].

Definition at line 1168 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__cmpAndSwap()

IFX_INLINE unsigned int Ifx__cmpAndSwap | ( | unsigned int volatile * | address,
 |  | unsigned int | value,
 |  | unsigned int | condition
 | ) |  |

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 1085 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1109 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 1117 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 62 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 47 of file IfxCpu_IntrinsicsGhs.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 84 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( void(*)(void) fun )

Definition at line 74 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( void(*)(void) fun )

Definition at line 79 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 69 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 52 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 57 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1124 of file IfxCpu_IntrinsicsGhs.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

__mtcr (CPU_CCTRL, 0);

Definition at line 1071 of file IfxCpu_IntrinsicsGhs.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1129 of file IfxCpu_IntrinsicsGhs.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 1141 of file IfxCpu_IntrinsicsGhs.h.


iLLD_TC26B: IfxCpu_IntrinsicsGnuc.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_IntrinsicsGnuc.h File Reference
#include "Ifx_Types.h"
#include "machine/intrinsics.h"
Include dependency graph for IfxCpu_IntrinsicsGnuc.h:

Go to the source code of this file.

Macros

#define | IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
#define | STRINGIFY(x) #x
#define | Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( Ifx__min(Ifx__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
#define | Ifx__imaskldmst(address, value, bitoffset, bits)
#define | Ifx__putbit(value, address, bitoffset) Ifx__imaskldmst(address, value, bitoffset,1)
#define | Ifx__disable() __asm__ volatile ("disable" : : : "memory")
#define | Ifx__enable() __asm__ volatile ("enable" : : : "memory")
#define | Ifx__abs(a) __builtin_abs(a)
#define | Ifx__clz(a) __builtin_clz(a)
#define | Ifx__mem_barrier __asm__ volatile("":::"memory");
#define | Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
#define | Ifx__setareg(areg, val)
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __max Ifx__max
#define | __maxs Ifx__maxs
#define | __maxu Ifx__maxu
#define | __min Ifx__min
#define | __mins Ifx__mins
#define | __minu Ifx__minu
#define | __sqrtf Ifx__sqrtf
#define | __sqrf Ifx__sqrf
#define | __checkrange Ifx__checkrange
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __saturatef Ifx__saturatef
#define | __minf Ifx__minf
#define | __maxf Ifx__maxf
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __clssf Ifx__clssf
#define | __fract_to_float Ifx__fract_to_float
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __float_to_sfract Ifx__float_to_sfract
#define | __float_to_fract Ifx__float_to_fract
#define | __getfract Ifx__getfract
#define | __mac_r_sf Ifx__mac_r_sf
#define | __mac_sf Ifx__mac_sf
#define | __mulfractfract Ifx__mulfractfract
#define | __mulfractlong Ifx__mulfractlong
#define | __round16 Ifx__round16
#define | __s16_to_sfract Ifx__s16_to_sfract
#define | __sfract_to_s16 Ifx__sfract_to_s16
#define | __sfract_to_u16 Ifx__sfract_to_u16
#define | __shaaccum Ifx__shaaccum
#define | __shafracts Ifx__shafracts
#define | __shasfracts Ifx__shasfracts
#define | __u16_to_sfract Ifx__u16_to_sfract
#define | __extr Ifx__extr
#define | __extru Ifx__extru
#define | __getbit Ifx__getbit
#define | __ins Ifx__ins
#define | __insert Ifx__insert
#define | __insn Ifx__insn
#define | __putbit Ifx__putbit
#define | __imaskldmst Ifx__imaskldmst
#define | __bisr Ifx__bisr
#define | __disable Ifx__disable
#define | __disable_and_save Ifx__disable_and_save
#define | __enable Ifx__enable
#define | __restore Ifx__restore
#define | __syscall Ifx__syscall
#define | __tric_syscall Ifx__tric_syscall
#define | __cacheawi Ifx__cacheawi
#define | __cacheiwi Ifx__cacheiwi
#define | __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
#define | __mulsc Ifx__mulsc
#define | __rol Ifx__rol
#define | __ror Ifx__ror
#define | __extractbyte1 Ifx__extractbyte1
#define | __extractbyte2 Ifx__extractbyte2
#define | __extractbyte3 Ifx__extractbyte3
#define | __extractbyte4 Ifx__extractbyte4
#define | __extracthw1 Ifx__extracthw1
#define | __extracthw2 Ifx__extracthw2
#define | __extractubyte1 Ifx__extractubyte1
#define | __extractubyte2 Ifx__extractubyte2
#define | __extractubyte3 Ifx__extractubyte3
#define | __extractubyte4 Ifx__extractubyte4
#define | __extractuhw1 Ifx__extractuhw1
#define | __extractuhw2 Ifx__extractuhw2
#define | __getbyte1 Ifx__getbyte1
#define | __getbyte2 Ifx__getbyte2
#define | __getbyte3 Ifx__getbyte3
#define | __getbyte4 Ifx__getbyte4
#define | __gethw1 Ifx__gethw1
#define | __gethw2 Ifx__gethw2
#define | __getubyte1 Ifx__getubyte1
#define | __getubyte2 Ifx__getubyte2
#define | __getubyte3 Ifx__getubyte3
#define | __getubyte4 Ifx__getubyte4
#define | __getuhw1 Ifx__getuhw1
#define | __getuhw2 Ifx__getuhw2
#define | __setbyte1 Ifx__setbyte1
#define | __setbyte2 Ifx__setbyte2
#define | __setbyte3 Ifx__setbyte3
#define | __setbyte4 Ifx__setbyte4
#define | __sethw1 Ifx__sethw1
#define | __sethw2 Ifx__sethw2
#define | __setubyte1 Ifx__setubyte1
#define | __setubyte2 Ifx__setubyte2
#define | __setubyte3 Ifx__setubyte3
#define | __setubyte4 Ifx__setubyte4
#define | __setuhw1 Ifx__setuhw1
#define | __setuhw2 Ifx__setuhw2
#define | __minhu Ifx__minhu
#define | __minh Ifx__minh
#define | __minbu Ifx__minbu
#define | __minb Ifx__minb
#define | __insertuhw2 Ifx__insertuhw2
#define | __insertuhw1 Ifx__insertuhw1
#define | __inserthw2 Ifx__inserthw2
#define | __inserthw1 Ifx__inserthw1
#define | __insertubyte4 Ifx__insertubyte4
#define | __insertubyte3 Ifx__insertubyte3
#define | __insertubyte2 Ifx__insertubyte2
#define | __insertubyte1 Ifx__insertubyte1
#define | __insertbyte4 Ifx__insertbyte4
#define | __insertbyte3 Ifx__insertbyte3
#define | __insertbyte2 Ifx__insertbyte2
#define | __insertbyte1 Ifx__insertbyte1
#define | __initupackhw Ifx__initupackhw
#define | __initupackb Ifx__initupackb
#define | __initpackhwl Ifx__initpackhwl
#define | __initpackhw Ifx__initpackhw
#define | __initpackbl Ifx__initpackbl
#define | __initpackb Ifx__initpackb
#define | __absb Ifx__absb
#define | __absh Ifx__absh
#define | __abssh Ifx__abssh
#define | __abs Ifx__abs
#define | __absdif Ifx__absdif
#define | __abss Ifx__abss
#define | __clo Ifx__clo
#define | __cls Ifx__cls
#define | __clz Ifx__clz
#define | __fabs Ifx__fabs
#define | __fabsf Ifx__fabsf
#define | __mfcr Ifx__mfcr
#define | __mtcr Ifx__mtcr
#define | __parity Ifx__parity
#define | __satb Ifx__satb
#define | __satbu Ifx__satbu
#define | __sath Ifx__sath
#define | __sathu Ifx__sathu
#define | __adds Ifx__adds
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __debug Ifx__debug
#define | __mem_barrier Ifx__mem_barrier
#define | __dsync Ifx__dsync
#define | __isync Ifx__isync
#define | __ldmst Ifx__ldmst
#define | __nop Ifx__nop
#define | __nops Ifx__nops
#define | __rslcx Ifx__rslcx
#define | __svlcx Ifx__svlcx
#define | __swap Ifx__swap
#define | NOP Ifx__NOP
#define | __setareg Ifx__setareg
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __crc32 Ifx__crc32
#define | __popcnt Ifx__popcnt
#define | __cacheai Ifx__cacheai

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE sint32 | Ifx__max (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__maxs (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__maxu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__min (sint32 a, sint32 b)
IFX_INLINE sint16 | Ifx__mins (sint16 a, sint16 b)
IFX_INLINE uint32 | Ifx__minu (uint32 a, uint32 b)
IFX_INLINE sint16 | Ifx__clssf (sfract a)
IFX_INLINE float | Ifx__fract_to_float (fract a)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__fract_to_sfract (fract a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE fract | Ifx__getfract (laccum a)
IFX_INLINE sfract | Ifx__mac_r_sf (sfract a, sfract b, sfract c)
IFX_INLINE sfract | Ifx__mac_sf (sfract a, sfract b, sfract c)
IFX_INLINE long | Ifx__mulfractfract (fract a, fract b)
IFX_INLINE long | Ifx__mulfractlong (fract a, long b)
IFX_INLINE sfract | Ifx__round16 (fract a)
IFX_INLINE sfract | Ifx__s16_to_sfract (sint16 a)
IFX_INLINE sint16 | Ifx__sfract_to_s16 (sfract a)
IFX_INLINE uint16 | Ifx__sfract_to_u16 (sfract a)
IFX_INLINE laccum | Ifx__shaaccum (laccum a, sint32 b)
IFX_INLINE fract | Ifx__shafracts (fract a, sint32 b)
IFX_INLINE sfract | Ifx__shasfracts (sfract a, sint32 b)
IFX_INLINE sfract | Ifx__u16_to_sfract (uint16 a)
IFX_INLINE sint32 | Ifx__extr (sint32 a, uint32 p, uint32 w)
IFX_INLINE uint32 | Ifx__extru (uint32 a, uint32 p, uint32 w)
IFX_INLINE sint32 | Ifx__ins (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__insert (sint32 a, sint32 b, sint32 p, const sint32 w)
IFX_INLINE sint32 | Ifx__insn (sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
IFX_INLINE sint32 | Ifx__disable_and_save (void)
IFX_INLINE void | Ifx__restore (sint32 ie)
IFX_INLINE void | Ifx__cacheawi (uint8 *p)
IFX_INLINE void | Ifx__cacheiwi (uint8 *p)
IFX_INLINE uint8 * | Ifx__cacheawi_bo_post_inc (uint8 *p)
IFX_INLINE sint32 | Ifx__mulsc (sint32 a, sint32 b, sint32 offset)
IFX_INLINE uint32 | Ifx__rol (uint32 operand, uint32 count)
IFX_INLINE uint32 | Ifx__ror (uint32 operand, uint32 count)
IFX_INLINE __packb | Ifx__absb (__packb a)
IFX_INLINE __packhw | Ifx__absh (__packhw a)
IFX_INLINE __packhw | Ifx__abssh (__packhw a)
IFX_INLINE sint8 | Ifx__extractbyte1 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte2 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte3 (__packb a)
IFX_INLINE sint8 | Ifx__extractbyte4 (__packb a)
IFX_INLINE sint16 | Ifx__extracthw1 (__packhw a)
IFX_INLINE sint16 | Ifx__extracthw2 (__packhw a)
IFX_INLINE uint8 | Ifx__extractubyte1 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte2 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte3 (__upackb a)
IFX_INLINE uint8 | Ifx__extractubyte4 (__upackb a)
IFX_INLINE uint16 | Ifx__extractuhw1 (__upackhw a)
IFX_INLINE uint16 | Ifx__extractuhw2 (__upackhw a)
IFX_INLINE sint8 | Ifx__getbyte1 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte2 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte3 (__packb *a)
IFX_INLINE sint8 | Ifx__getbyte4 (__packb *a)
IFX_INLINE sint16 | Ifx__gethw1 (__packhw *a)
IFX_INLINE sint16 | Ifx__gethw2 (__packhw *a)
IFX_INLINE uint8 | Ifx__getubyte1 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte2 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte3 (__upackb *a)
IFX_INLINE uint8 | Ifx__getubyte4 (__upackb *a)
IFX_INLINE uint16 | Ifx__getuhw1 (__upackhw *a)
IFX_INLINE uint16 | Ifx__getuhw2 (__upackhw *a)
IFX_INLINE __packb | Ifx__initpackb (sint32 a, sint32 b, sint32 c, sint32 d)
IFX_INLINE __packb | Ifx__initpackbl (long a)
IFX_INLINE __packhw | Ifx__initpackhw (sint16 a, sint16 b)
IFX_INLINE __packhw | Ifx__initpackhwl (long a)
IFX_INLINE __upackb | Ifx__initupackb (uint32 a, uint32 b, uint32 c, uint32 d)
IFX_INLINE __upackhw | Ifx__initupackhw (uint16 a, uint16 b)
IFX_INLINE __packb | Ifx__insertbyte1 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte2 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte3 (__packb a, sint8 b)
IFX_INLINE __packb | Ifx__insertbyte4 (__packb a, sint8 b)
IFX_INLINE __upackb | Ifx__insertubyte1 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte2 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte3 (__upackb a, uint8 b)
IFX_INLINE __upackb | Ifx__insertubyte4 (__upackb a, uint8 b)
IFX_INLINE __packhw | Ifx__inserthw1 (__packhw a, sint16 b)
IFX_INLINE __packhw | Ifx__inserthw2 (__packhw a, sint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw1 (__upackhw a, uint16 b)
IFX_INLINE __upackhw | Ifx__insertuhw2 (__upackhw a, uint16 b)
IFX_INLINE __packb | Ifx__minb (__packb a, __packb b)
IFX_INLINE __upackb | Ifx__minbu (__upackb a, __upackb b)
IFX_INLINE __packhw | Ifx__minh (__packhw a, __packhw b)
IFX_INLINE __upackhw | Ifx__minhu (__upackhw a, __upackhw b)
IFX_INLINE void | Ifx__setbyte1 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte2 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte3 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__setbyte4 (__packb *a, sint8 b)
IFX_INLINE void | Ifx__sethw1 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__sethw2 (__packhw *a, sint16 b)
IFX_INLINE void | Ifx__setubyte1 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte2 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte3 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setubyte4 (__upackb *a, uint8 b)
IFX_INLINE void | Ifx__setuhw1 (__upackhw *a, uint16 b)
IFX_INLINE void | Ifx__setuhw2 (__upackhw *a, uint16 b)
IFX_INLINE sint32 | Ifx__absdif (sint32 a, sint32 b)
IFX_INLINE sint32 | Ifx__abss (sint32 a)
IFX_INLINE sint32 | Ifx__clo (sint32 a)
IFX_INLINE sint32 | Ifx__cls (sint32 a)
IFX_INLINE double | Ifx__fabs (double d)
IFX_INLINE float | Ifx__fabsf (float f)
IFX_INLINE sint32 | Ifx__parity (sint32 a)
IFX_INLINE sint8 | Ifx__satb (sint32 a)
IFX_INLINE uint8 | Ifx__satbu (sint32 a)
IFX_INLINE sint16 | Ifx__sath (sint32 a)
IFX_INLINE uint16 | Ifx__sathu (sint32 a)
IFX_INLINE sint32 | Ifx__adds (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__addsu (uint32 a, uint32 b)
IFX_INLINE sint32 | Ifx__subs (sint32 a, sint32 b)
IFX_INLINE uint32 | Ifx__subsu (uint32 a, uint32 b)
IFX_INLINE void | Ifx__debug (void)
IFX_INLINE void | Ifx__dsync (void)
IFX_INLINE void | Ifx__isync (void)
IFX_INLINE void | Ifx__ldmst (volatile void *address, uint32 mask, uint32 value)
IFX_INLINE void | Ifx__nop (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__rslcx (void)
IFX_INLINE void | Ifx__svlcx (void)
IFX_INLINE uint32 | Ifx__swap (void *place, uint32 value)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE unsigned int | Ifx__cmpAndSwap (unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction. More...
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | Ifx__crc32 (uint32 b, uint32 a)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE sint32 | Ifx__popcnt (sint32 a)
IFX_INLINE void | Ifx__cacheai (uint8 *p)

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_IntrinsicsGnuc.h.

Macro Definition Documentation

◆ __abs

#define __abs Ifx__abs

Definition at line 2152 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 1723 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absb

#define __absb Ifx__absb

Definition at line 2139 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absdif

#define __absdif Ifx__absdif

Definition at line 2156 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 1703 of file IfxCpu_IntrinsicsGnuc.h.

◆ __absh

#define __absh Ifx__absh

Definition at line 2143 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abss

#define __abss Ifx__abss

Definition at line 2160 of file IfxCpu_IntrinsicsGnuc.h.

◆ __abssh

#define __abssh Ifx__abssh

Definition at line 2147 of file IfxCpu_IntrinsicsGnuc.h.

◆ __adds

#define __adds Ifx__adds

Definition at line 2212 of file IfxCpu_IntrinsicsGnuc.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 2216 of file IfxCpu_IntrinsicsGnuc.h.

◆ __bisr

#define __bisr Ifx__bisr

Definition at line 1855 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheai

#define __cacheai Ifx__cacheai

Definition at line 2304 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheawi

#define __cacheawi Ifx__cacheawi

Definition at line 1883 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheawi_bo_post_inc

#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc

Definition at line 1891 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cacheiwi

#define __cacheiwi Ifx__cacheiwi

Definition at line 1887 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 1695 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 1719 of file IfxCpu_IntrinsicsGnuc.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 1651 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clo

#define __clo Ifx__clo

Definition at line 2164 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cls

#define __cls Ifx__cls

Definition at line 2168 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clssf

#define __clssf Ifx__clssf

Definition at line 1751 of file IfxCpu_IntrinsicsGnuc.h.

◆ __clz

#define __clz Ifx__clz

Definition at line 2172 of file IfxCpu_IntrinsicsGnuc.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 2280 of file IfxCpu_IntrinsicsGnuc.h.

◆ __crc32

#define __crc32 Ifx__crc32

Definition at line 2296 of file IfxCpu_IntrinsicsGnuc.h.

◆ __debug

#define __debug Ifx__debug

Definition at line 2228 of file IfxCpu_IntrinsicsGnuc.h.

◆ __disable

#define __disable Ifx__disable

Definition at line 1859 of file IfxCpu_IntrinsicsGnuc.h.

◆ __disable_and_save

#define __disable_and_save Ifx__disable_and_save

Definition at line 1863 of file IfxCpu_IntrinsicsGnuc.h.

◆ __dsync

#define __dsync Ifx__dsync

Definition at line 2236 of file IfxCpu_IntrinsicsGnuc.h.

◆ __enable

#define __enable Ifx__enable

Definition at line 1867 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extr

#define __extr Ifx__extr

Definition at line 1823 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte1

#define __extractbyte1 Ifx__extractbyte1

Definition at line 1907 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte2

#define __extractbyte2 Ifx__extractbyte2

Definition at line 1911 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte3

#define __extractbyte3 Ifx__extractbyte3

Definition at line 1915 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractbyte4

#define __extractbyte4 Ifx__extractbyte4

Definition at line 1919 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extracthw1

#define __extracthw1 Ifx__extracthw1

Definition at line 1923 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extracthw2

#define __extracthw2 Ifx__extracthw2

Definition at line 1927 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte1

#define __extractubyte1 Ifx__extractubyte1

Definition at line 1931 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte2

#define __extractubyte2 Ifx__extractubyte2

Definition at line 1935 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte3

#define __extractubyte3 Ifx__extractubyte3

Definition at line 1939 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractubyte4

#define __extractubyte4 Ifx__extractubyte4

Definition at line 1943 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractuhw1

#define __extractuhw1 Ifx__extractuhw1

Definition at line 1947 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extractuhw2

#define __extractuhw2 Ifx__extractuhw2

Definition at line 1951 of file IfxCpu_IntrinsicsGnuc.h.

◆ __extru

#define __extru Ifx__extru

Definition at line 1827 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fabs

#define __fabs Ifx__fabs

Definition at line 2176 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fabsf

#define __fabsf Ifx__fabsf

Definition at line 2180 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 2284 of file IfxCpu_IntrinsicsGnuc.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 1767 of file IfxCpu_IntrinsicsGnuc.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 1763 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 1755 of file IfxCpu_IntrinsicsGnuc.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 1759 of file IfxCpu_IntrinsicsGnuc.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 1747 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 2288 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbit

#define __getbit Ifx__getbit

Definition at line 1831 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte1

#define __getbyte1 Ifx__getbyte1

Definition at line 1955 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte2

#define __getbyte2 Ifx__getbyte2

Definition at line 1959 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte3

#define __getbyte3 Ifx__getbyte3

Definition at line 1963 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getbyte4

#define __getbyte4 Ifx__getbyte4

Definition at line 1967 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 1619 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getfract

#define __getfract Ifx__getfract

Definition at line 1771 of file IfxCpu_IntrinsicsGnuc.h.

◆ __gethw1

#define __gethw1 Ifx__gethw1

Definition at line 1971 of file IfxCpu_IntrinsicsGnuc.h.

◆ __gethw2

#define __gethw2 Ifx__gethw2

Definition at line 1975 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte1

#define __getubyte1 Ifx__getubyte1

Definition at line 1979 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte2

#define __getubyte2 Ifx__getubyte2

Definition at line 1983 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte3

#define __getubyte3 Ifx__getubyte3

Definition at line 1987 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getubyte4

#define __getubyte4 Ifx__getubyte4

Definition at line 1991 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getuhw1

#define __getuhw1 Ifx__getuhw1

Definition at line 1995 of file IfxCpu_IntrinsicsGnuc.h.

◆ __getuhw2

#define __getuhw2 Ifx__getuhw2

Definition at line 1999 of file IfxCpu_IntrinsicsGnuc.h.

◆ __imaskldmst

#define __imaskldmst Ifx__imaskldmst

Definition at line 1851 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackb

#define __initpackb Ifx__initpackb

Definition at line 2135 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackbl

#define __initpackbl Ifx__initpackbl

Definition at line 2131 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackhw

#define __initpackhw Ifx__initpackhw

Definition at line 2127 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initpackhwl

#define __initpackhwl Ifx__initpackhwl

Definition at line 2123 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initupackb

#define __initupackb Ifx__initupackb

Definition at line 2119 of file IfxCpu_IntrinsicsGnuc.h.

◆ __initupackhw

#define __initupackhw Ifx__initupackhw

Definition at line 2115 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ins

#define __ins Ifx__ins

Definition at line 1835 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insert

#define __insert Ifx__insert

Definition at line 1839 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte1

#define __insertbyte1 Ifx__insertbyte1

Definition at line 2111 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte2

#define __insertbyte2 Ifx__insertbyte2

Definition at line 2107 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte3

#define __insertbyte3 Ifx__insertbyte3

Definition at line 2103 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertbyte4

#define __insertbyte4 Ifx__insertbyte4

Definition at line 2099 of file IfxCpu_IntrinsicsGnuc.h.

◆ __inserthw1

#define __inserthw1 Ifx__inserthw1

Definition at line 2079 of file IfxCpu_IntrinsicsGnuc.h.

◆ __inserthw2

#define __inserthw2 Ifx__inserthw2

Definition at line 2075 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte1

#define __insertubyte1 Ifx__insertubyte1

Definition at line 2095 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte2

#define __insertubyte2 Ifx__insertubyte2

Definition at line 2091 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte3

#define __insertubyte3 Ifx__insertubyte3

Definition at line 2087 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertubyte4

#define __insertubyte4 Ifx__insertubyte4

Definition at line 2083 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertuhw1

#define __insertuhw1 Ifx__insertuhw1

Definition at line 2071 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insertuhw2

#define __insertuhw2 Ifx__insertuhw2

Definition at line 2067 of file IfxCpu_IntrinsicsGnuc.h.

◆ __insn

#define __insn Ifx__insn

Definition at line 1843 of file IfxCpu_IntrinsicsGnuc.h.

◆ __isync

#define __isync Ifx__isync

Definition at line 2240 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 1607 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 1635 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 1627 of file IfxCpu_IntrinsicsGnuc.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 1631 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 2244 of file IfxCpu_IntrinsicsGnuc.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 1743 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mac_r_sf

#define __mac_r_sf Ifx__mac_r_sf

Definition at line 1775 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mac_sf

#define __mac_sf Ifx__mac_sf

Definition at line 1779 of file IfxCpu_IntrinsicsGnuc.h.

◆ __max

#define __max Ifx__max

Definition at line 1663 of file IfxCpu_IntrinsicsGnuc.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 1735 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 1715 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxs

#define __maxs Ifx__maxs

Definition at line 1667 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxu

#define __maxu Ifx__maxu

Definition at line 1671 of file IfxCpu_IntrinsicsGnuc.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 1643 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 2232 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mfcr

#define __mfcr Ifx__mfcr

Definition at line 2184 of file IfxCpu_IntrinsicsGnuc.h.

◆ __min

#define __min Ifx__min

Definition at line 1675 of file IfxCpu_IntrinsicsGnuc.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 1731 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minb

#define __minb Ifx__minb

Definition at line 2063 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minbu

#define __minbu Ifx__minbu

Definition at line 2059 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 1711 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minh

#define __minh Ifx__minh

Definition at line 2055 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minhu

#define __minhu Ifx__minhu

Definition at line 2051 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mins

#define __mins Ifx__mins

Definition at line 1679 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minu

#define __minu Ifx__minu

Definition at line 1683 of file IfxCpu_IntrinsicsGnuc.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 1639 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 1623 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 1611 of file IfxCpu_IntrinsicsGnuc.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 1615 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mtcr

#define __mtcr Ifx__mtcr

Definition at line 2188 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 1783 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 1787 of file IfxCpu_IntrinsicsGnuc.h.

◆ __mulsc

#define __mulsc Ifx__mulsc

Definition at line 1895 of file IfxCpu_IntrinsicsGnuc.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 1739 of file IfxCpu_IntrinsicsGnuc.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 1603 of file IfxCpu_IntrinsicsGnuc.h.

◆ __nop

#define __nop Ifx__nop

Definition at line 2248 of file IfxCpu_IntrinsicsGnuc.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 2252 of file IfxCpu_IntrinsicsGnuc.h.

◆ __parity

#define __parity Ifx__parity

Definition at line 2192 of file IfxCpu_IntrinsicsGnuc.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 2300 of file IfxCpu_IntrinsicsGnuc.h.

◆ __putbit

#define __putbit Ifx__putbit

Definition at line 1847 of file IfxCpu_IntrinsicsGnuc.h.

◆ __restore

#define __restore Ifx__restore

Definition at line 1871 of file IfxCpu_IntrinsicsGnuc.h.

◆ __rol

#define __rol Ifx__rol

Definition at line 1899 of file IfxCpu_IntrinsicsGnuc.h.

◆ __ror

#define __ror Ifx__ror

Definition at line 1903 of file IfxCpu_IntrinsicsGnuc.h.

◆ __round16

#define __round16 Ifx__round16

Definition at line 1791 of file IfxCpu_IntrinsicsGnuc.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 1699 of file IfxCpu_IntrinsicsGnuc.h.

◆ __rslcx

#define __rslcx Ifx__rslcx

Definition at line 2256 of file IfxCpu_IntrinsicsGnuc.h.

◆ __s16_to_sfract

#define __s16_to_sfract Ifx__s16_to_sfract

Definition at line 1795 of file IfxCpu_IntrinsicsGnuc.h.

◆ __satb

#define __satb Ifx__satb

Definition at line 2196 of file IfxCpu_IntrinsicsGnuc.h.

◆ __satbu

#define __satbu Ifx__satbu

Definition at line 2200 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sath

#define __sath Ifx__sath

Definition at line 2204 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sathu

#define __sathu Ifx__sathu

Definition at line 2208 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 1655 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 1727 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 1707 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 1659 of file IfxCpu_IntrinsicsGnuc.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 1647 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 2272 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte1

#define __setbyte1 Ifx__setbyte1

Definition at line 2003 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte2

#define __setbyte2 Ifx__setbyte2

Definition at line 2007 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte3

#define __setbyte3 Ifx__setbyte3

Definition at line 2011 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setbyte4

#define __setbyte4 Ifx__setbyte4

Definition at line 2015 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sethw1

#define __sethw1 Ifx__sethw1

Definition at line 2019 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sethw2

#define __sethw2 Ifx__sethw2

Definition at line 2023 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 2292 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte1

#define __setubyte1 Ifx__setubyte1

Definition at line 2027 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte2

#define __setubyte2 Ifx__setubyte2

Definition at line 2031 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte3

#define __setubyte3 Ifx__setubyte3

Definition at line 2035 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setubyte4

#define __setubyte4 Ifx__setubyte4

Definition at line 2039 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setuhw1

#define __setuhw1 Ifx__setuhw1

Definition at line 2043 of file IfxCpu_IntrinsicsGnuc.h.

◆ __setuhw2

#define __setuhw2 Ifx__setuhw2

Definition at line 2047 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sfract_to_s16

#define __sfract_to_s16 Ifx__sfract_to_s16

Definition at line 1799 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sfract_to_u16

#define __sfract_to_u16 Ifx__sfract_to_u16

Definition at line 1803 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shaaccum

#define __shaaccum Ifx__shaaccum

Definition at line 1807 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shafracts

#define __shafracts Ifx__shafracts

Definition at line 1811 of file IfxCpu_IntrinsicsGnuc.h.

◆ __shasfracts

#define __shasfracts Ifx__shasfracts

Definition at line 1815 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 1691 of file IfxCpu_IntrinsicsGnuc.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 1687 of file IfxCpu_IntrinsicsGnuc.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 2276 of file IfxCpu_IntrinsicsGnuc.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 2220 of file IfxCpu_IntrinsicsGnuc.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 2224 of file IfxCpu_IntrinsicsGnuc.h.

◆ __svlcx

#define __svlcx Ifx__svlcx

Definition at line 2260 of file IfxCpu_IntrinsicsGnuc.h.

◆ __swap

#define __swap Ifx__swap

Definition at line 2264 of file IfxCpu_IntrinsicsGnuc.h.

◆ __syscall

#define __syscall Ifx__syscall

Definition at line 1875 of file IfxCpu_IntrinsicsGnuc.h.

◆ __tric_syscall

#define __tric_syscall Ifx__tric_syscall

Definition at line 1879 of file IfxCpu_IntrinsicsGnuc.h.

◆ __u16_to_sfract

#define __u16_to_sfract Ifx__u16_to_sfract

Definition at line 1819 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm__ volatile ("ji %0"::"a"(fun))

Function call without return

Definition at line 51 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) |
Value:
{ uint32 reg_val= (uint32)val; \
__asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
uint32
unsigned long uint32
Definition: Platform_Types.h:113

Definition at line 1482 of file IfxCpu_IntrinsicsGnuc.h.

◆ IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS

#define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1

Definition at line 35 of file IfxCpu_IntrinsicsGnuc.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 2268 of file IfxCpu_IntrinsicsGnuc.h.

◆ STRINGIFY

#define STRINGIFY ( x ) #x

Definition at line 47 of file IfxCpu_IntrinsicsGnuc.h.

Function Documentation

◆ Ifx__cacheai()

IFX_INLINE void Ifx__cacheai ( uint8 * p )

Invalidate cache address "p". Generates CACHEA.I [Ab].

Definition at line 1594 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__cmpAndSwap()

IFX_INLINE unsigned int Ifx__cmpAndSwap | ( | unsigned int volatile * | address,
 |  | unsigned int | value,
 |  | unsigned int | condition
 | ) |  |

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 1502 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__crc32()

IFX_INLINE uint32 Ifx__crc32 | ( | uint32 | b,
 |  | uint32 | a
 | ) |  |

Definition at line 1547 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 1527 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 1535 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 70 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 55 of file IfxCpu_IntrinsicsGnuc.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 92 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 82 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 87 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 77 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 60 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 65 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__popcnt()

IFX_INLINE sint32 Ifx__popcnt ( sint32 a )

Definition at line 1585 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 1542 of file IfxCpu_IntrinsicsGnuc.h.

◆ Ifx__stopPerfCounters()

IFX_INLINE void Ifx__stopPerfCounters ( void )

__mtcr (CPU_CCTRL, 0);

Definition at line 1488 of file IfxCpu_IntrinsicsGnuc.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 1556 of file IfxCpu_IntrinsicsGnuc.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 1568 of file IfxCpu_IntrinsicsGnuc.h.


iLLD_TC26B: IfxCpu_IntrinsicsTasking.h File Reference

  • Cpu
  • Std
Macros | Functions
IfxCpu_IntrinsicsTasking.h File Reference
#include "Ifx_Types.h"
Include dependency graph for IfxCpu_IntrinsicsTasking.h:

Go to the source code of this file.

Macros

#define | Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
#define | Ifx__minX(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxX(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturateX(X, Min, Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
#define | Ifx__checkrangeX(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__saturate(X, Min, Max) ( __min(__max(X, Min), Max) )
#define | Ifx__saturateu(X, Min, Max) ( __minu(__maxu(X, Min), Max) )
#define | Ifx__checkrange(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__sqrf(X) ((X) * (X))
#define | Ifx__sqrtf(X) sqrtf(X)
#define | Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
#define | Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
#define | Ifx__minf(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__maxf(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturatef(X, Min, Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
#define | Ifx__checkrangef(X, Min, Max) (((X) >= (Min)) && ((X) <= (Max)))
#define | Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
#define | Ifx__min_stdreal(X, Y) ( ((X) < (Y)) ? (X) : (Y) )
#define | Ifx__max_stdreal(X, Y) ( ((X) > (Y)) ? (X) : (Y) )
#define | Ifx__saturate_stdreal(X, Min, Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
#define | Ifx__neqf(X, Y) ( ((X) > (Y)) || ((X) < (Y)) )
#define | Ifx__leqf(X, Y) ( !((X) > (Y)) )
#define | Ifx__geqf(X, Y) ( !((X) < (Y)) )
#define | Ifx__fract_to_float(value) ((float)(value))
#define | Ifx__mulfractlong __mulfractlong
#define | Ifx__mulfractfract(fractvalue1, fractvalue2) ((fractvalue1)*(fractvalue2))
#define | Ifx__extru(a, p, w) __extru(a,p,w)
#define | Ifx__extr(a, p, w) __extr(a,p,w)
#define | Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
#define | Ifx__insert(a, b, p, w) __insert(a,b,p,w)
#define | Ifx__disable_and_save __disable_and_save
#define | Ifx__restore __restore
#define | Ifx__mtcr_no_isync(reg, val) __asm("mtcr %0,%1"::"i"(reg),"d"(val));
#define | Ifx__adds(a, b) ((__sat int)(a)+(__sat int)(b))
#define | Ifx__addsu(a, b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
#define | Ifx__subs(a, b) ((__sat int)(a)-(__sat int)(b))
#define | Ifx__subsu(a, b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
#define | Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
#define | Ifx__mem_barrier __asm("":::"memory");
#define | Ifx__fract_to_sfract __round16
#define | Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
#define | Ifx___setareg(areg, val) { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
#define | Ifx__setareg(areg, val) Ifx___setareg(areg,val)
#define | Ifx__cmpAndSwap(address, value, condition) __cmpswapw((address), ((unsigned long)value), (condition) )
This function is a implementation of a binary semaphore using compare and swap instruction. More...
#define | __non_return_call Ifx__non_return_call
#define | __jump_and_link Ifx__jump_and_link
#define | __moveToDataParam0 Ifx__moveToDataParam0
#define | __moveToAddrParam0 Ifx__moveToAddrParam0
#define | __getDataParamRet Ifx__getDataParamRet
#define | __moveToDataParamRet Ifx__moveToDataParamRet
#define | __jumpToFunction Ifx__jumpToFunction
#define | __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
#define | __jumpBackToLink Ifx__jumpBackToLink
#define | __minX Ifx__minX
#define | __maxX Ifx__maxX
#define | __saturateX Ifx__saturateX
#define | __checkrangeX Ifx__checkrangeX
#define | __saturate Ifx__saturate
#define | __saturateu Ifx__saturateu
#define | __checkrange Ifx__checkrange
#define | __sqrtf Ifx__sqrtf
#define | __sqrf Ifx__sqrf
#define | __roundf Ifx__roundf
#define | __absf Ifx__absf
#define | __maxf Ifx__maxf
#define | __saturatef Ifx__saturatef
#define | __minf Ifx__minf
#define | __checkrangef Ifx__checkrangef
#define | __abs_stdreal Ifx__abs_stdreal
#define | __saturate_stdreal Ifx__saturate_stdreal
#define | __min_stdreal Ifx__min_stdreal
#define | __max_stdreal Ifx__max_stdreal
#define | __neqf Ifx__neqf
#define | __leqf Ifx__leqf
#define | __geqf Ifx__geqf
#define | __fract_to_float Ifx__fract_to_float
#define | __mulfractlong Ifx__mulfractlong
#define | __mulfractfract Ifx__mulfractfract
#define | __disable_and_save Ifx__disable_and_save
#define | __restore Ifx__restore
#define | __mtcr_no_isync Ifx__mtcr_no_isync
#define | __adds Ifx__adds
#define | __addsu Ifx__addsu
#define | __subs Ifx__subs
#define | __subsu Ifx__subsu
#define | __nops Ifx__nops
#define | NOP Ifx__NOP
#define | __mem_barrier Ifx__mem_barrier
#define | __ldmst Ifx__ldmst
#define | __ldmstC Ifx__ldmstC
#define | __float_to_sfract Ifx__float_to_sfract
#define | __float_to_fract Ifx__float_to_fract
#define | __fract_to_sfract Ifx__fract_to_sfract
#define | __ldmstAsm Ifx__ldmstAsm
#define | __stopPerfCounters Ifx__stopPerfCounters
#define | __setareg Ifx__setareg
#define | ___setareg Ifx___setareg
#define | __cmpAndSwap Ifx__cmpAndSwap
#define | __fixpoint_to_float32 Ifx__fixpoint_to_float32
#define | __getA11 Ifx__getA11
#define | __setStackPointer Ifx__setStackPointer
#define | __popcnt Ifx__popcnt

Functions

IFX_INLINE void | Ifx__jump_and_link (void(*fun)(void))
IFX_INLINE void | Ifx__moveToDataParam0 (unsigned int var)
IFX_INLINE void | Ifx__moveToAddrParam0 (const void *var)
IFX_INLINE unsigned int | Ifx__getDataParamRet (void)
IFX_INLINE void | Ifx__moveToDataParamRet (unsigned int var)
IFX_INLINE void | Ifx__jumpToFunction (const void *fun)
IFX_INLINE void | Ifx__jumpToFunctionWithLink (const void *fun)
IFX_INLINE void | Ifx__jumpBackToLink (void)
IFX_INLINE void | Ifx__nops (void *cnt)
IFX_INLINE void | Ifx__ldmstAsm (volatile void *addr, uint32 mask, uint32 data)
IFX_INLINE fract | Ifx__float_to_fract (float a)
IFX_INLINE sfract | Ifx__float_to_sfract (float a)
IFX_INLINE void | Ifx__stopPerfCounters (void)
IFX_INLINE float32 | Ifx__fixpoint_to_float32 (fract value, sint32 shift)
Convert a fixpoint value to float32. More...
IFX_INLINE void * | Ifx__getA11 (void)
IFX_INLINE void | Ifx__setStackPointer (void *stackAddr)
IFX_INLINE uint32 | IfxCpu_calculateCrc32 (uint32 *startaddress, uint8 length)
IFX_INLINE uint32 | IfxCpu_getRandomVal (uint32 a, uint32 x, uint32 m)
IFX_INLINE sint32 | Ifx__popcnt (sint32 a)

Detailed Description

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_IntrinsicsTasking.h.

Macro Definition Documentation

◆ ___setareg

#define ___setareg Ifx___setareg

Definition at line 592 of file IfxCpu_IntrinsicsTasking.h.

◆ __abs_stdreal

#define __abs_stdreal Ifx__abs_stdreal

Definition at line 480 of file IfxCpu_IntrinsicsTasking.h.

◆ __absf

#define __absf Ifx__absf

Definition at line 460 of file IfxCpu_IntrinsicsTasking.h.

◆ __adds

#define __adds Ifx__adds

Definition at line 532 of file IfxCpu_IntrinsicsTasking.h.

◆ __addsu

#define __addsu Ifx__addsu

Definition at line 536 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrange

#define __checkrange Ifx__checkrange

Definition at line 444 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrangef

#define __checkrangef Ifx__checkrangef

Definition at line 476 of file IfxCpu_IntrinsicsTasking.h.

◆ __checkrangeX

#define __checkrangeX Ifx__checkrangeX

Definition at line 432 of file IfxCpu_IntrinsicsTasking.h.

◆ __cmpAndSwap

#define __cmpAndSwap Ifx__cmpAndSwap

Definition at line 596 of file IfxCpu_IntrinsicsTasking.h.

◆ __disable_and_save

#define __disable_and_save Ifx__disable_and_save

Definition at line 520 of file IfxCpu_IntrinsicsTasking.h.

◆ __fixpoint_to_float32

#define __fixpoint_to_float32 Ifx__fixpoint_to_float32

Definition at line 600 of file IfxCpu_IntrinsicsTasking.h.

◆ __float_to_fract

#define __float_to_fract Ifx__float_to_fract

Definition at line 572 of file IfxCpu_IntrinsicsTasking.h.

◆ __float_to_sfract

#define __float_to_sfract Ifx__float_to_sfract

Definition at line 568 of file IfxCpu_IntrinsicsTasking.h.

◆ __fract_to_float

#define __fract_to_float Ifx__fract_to_float

Definition at line 508 of file IfxCpu_IntrinsicsTasking.h.

◆ __fract_to_sfract

#define __fract_to_sfract Ifx__fract_to_sfract

Definition at line 576 of file IfxCpu_IntrinsicsTasking.h.

◆ __geqf

#define __geqf Ifx__geqf

Definition at line 504 of file IfxCpu_IntrinsicsTasking.h.

◆ __getA11

#define __getA11 Ifx__getA11

Definition at line 604 of file IfxCpu_IntrinsicsTasking.h.

◆ __getDataParamRet

#define __getDataParamRet Ifx__getDataParamRet

Definition at line 400 of file IfxCpu_IntrinsicsTasking.h.

◆ __jump_and_link

#define __jump_and_link Ifx__jump_and_link

Definition at line 388 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpBackToLink

#define __jumpBackToLink Ifx__jumpBackToLink

Definition at line 416 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpToFunction

#define __jumpToFunction Ifx__jumpToFunction

Definition at line 408 of file IfxCpu_IntrinsicsTasking.h.

◆ __jumpToFunctionWithLink

#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink

Definition at line 412 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmst

#define __ldmst Ifx__ldmst

Definition at line 560 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmstAsm

#define __ldmstAsm Ifx__ldmstAsm

Definition at line 580 of file IfxCpu_IntrinsicsTasking.h.

◆ __ldmstC

#define __ldmstC Ifx__ldmstC

Definition at line 564 of file IfxCpu_IntrinsicsTasking.h.

◆ __leqf

#define __leqf Ifx__leqf

Definition at line 500 of file IfxCpu_IntrinsicsTasking.h.

◆ __max_stdreal

#define __max_stdreal Ifx__max_stdreal

Definition at line 492 of file IfxCpu_IntrinsicsTasking.h.

◆ __maxf

#define __maxf Ifx__maxf

Definition at line 464 of file IfxCpu_IntrinsicsTasking.h.

◆ __maxX

#define __maxX Ifx__maxX

Definition at line 424 of file IfxCpu_IntrinsicsTasking.h.

◆ __mem_barrier

#define __mem_barrier Ifx__mem_barrier

Definition at line 556 of file IfxCpu_IntrinsicsTasking.h.

◆ __min_stdreal

#define __min_stdreal Ifx__min_stdreal

Definition at line 488 of file IfxCpu_IntrinsicsTasking.h.

◆ __minf

#define __minf Ifx__minf

Definition at line 472 of file IfxCpu_IntrinsicsTasking.h.

◆ __minX

#define __minX Ifx__minX

Definition at line 420 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToAddrParam0

#define __moveToAddrParam0 Ifx__moveToAddrParam0

Definition at line 396 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToDataParam0

#define __moveToDataParam0 Ifx__moveToDataParam0

Definition at line 392 of file IfxCpu_IntrinsicsTasking.h.

◆ __moveToDataParamRet

#define __moveToDataParamRet Ifx__moveToDataParamRet

Definition at line 404 of file IfxCpu_IntrinsicsTasking.h.

◆ __mtcr_no_isync

#define __mtcr_no_isync Ifx__mtcr_no_isync

Definition at line 528 of file IfxCpu_IntrinsicsTasking.h.

◆ __mulfractfract

#define __mulfractfract Ifx__mulfractfract

Definition at line 516 of file IfxCpu_IntrinsicsTasking.h.

◆ __mulfractlong

#define __mulfractlong Ifx__mulfractlong

Definition at line 512 of file IfxCpu_IntrinsicsTasking.h.

◆ __neqf

#define __neqf Ifx__neqf

Definition at line 496 of file IfxCpu_IntrinsicsTasking.h.

◆ __non_return_call

#define __non_return_call Ifx__non_return_call

Definition at line 384 of file IfxCpu_IntrinsicsTasking.h.

◆ __nops

#define __nops Ifx__nops

Definition at line 548 of file IfxCpu_IntrinsicsTasking.h.

◆ __popcnt

#define __popcnt Ifx__popcnt

Definition at line 612 of file IfxCpu_IntrinsicsTasking.h.

◆ __restore

#define __restore Ifx__restore

Definition at line 524 of file IfxCpu_IntrinsicsTasking.h.

◆ __roundf

#define __roundf Ifx__roundf

Definition at line 456 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturate

#define __saturate Ifx__saturate

Definition at line 436 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturate_stdreal

#define __saturate_stdreal Ifx__saturate_stdreal

Definition at line 484 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturatef

#define __saturatef Ifx__saturatef

Definition at line 468 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturateu

#define __saturateu Ifx__saturateu

Definition at line 440 of file IfxCpu_IntrinsicsTasking.h.

◆ __saturateX

#define __saturateX Ifx__saturateX

Definition at line 428 of file IfxCpu_IntrinsicsTasking.h.

◆ __setareg

#define __setareg Ifx__setareg

Definition at line 588 of file IfxCpu_IntrinsicsTasking.h.

◆ __setStackPointer

#define __setStackPointer Ifx__setStackPointer

Definition at line 608 of file IfxCpu_IntrinsicsTasking.h.

◆ __sqrf

#define __sqrf Ifx__sqrf

Definition at line 452 of file IfxCpu_IntrinsicsTasking.h.

◆ __sqrtf

#define __sqrtf Ifx__sqrtf

Definition at line 448 of file IfxCpu_IntrinsicsTasking.h.

◆ __stopPerfCounters

#define __stopPerfCounters Ifx__stopPerfCounters

Definition at line 584 of file IfxCpu_IntrinsicsTasking.h.

◆ __subs

#define __subs Ifx__subs

Definition at line 540 of file IfxCpu_IntrinsicsTasking.h.

◆ __subsu

#define __subsu Ifx__subsu

Definition at line 544 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx___setareg

#define Ifx___setareg | ( | areg,
 |  | val
 | ) | { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }

Definition at line 293 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__cmpAndSwap

#define Ifx__cmpAndSwap | ( | address,
 |  | value,
 |  | condition
 | ) | __cmpswapw((address), ((unsigned long)value), (condition) )

This function is a implementation of a binary semaphore using compare and swap instruction.

Parameters
address | address of resource.
value | This variable is updated with status of address
condition | if the value of address matches with the value of condition, then swap of value & address occurs.

Definition at line 303 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__non_return_call

#define Ifx__non_return_call ( fun ) __asm("\tji %0"::"a"(fun))

Function call without return

Definition at line 37 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__jumpToFunction().

◆ Ifx__setareg

#define Ifx__setareg | ( | areg,
 |  | val
 | ) | Ifx___setareg(areg,val)

Definition at line 295 of file IfxCpu_IntrinsicsTasking.h.

◆ NOP

#define NOP Ifx__NOP

Definition at line 552 of file IfxCpu_IntrinsicsTasking.h.

Function Documentation

◆ Ifx__fixpoint_to_float32()

IFX_INLINE float32 Ifx__fixpoint_to_float32 | ( | fract | value,
 |  | sint32 | shift
 | ) |  |

Convert a fixpoint value to float32.

This function converts a value from a fixpoint format to a float32 format.

Parameters
value | value to be converted.
shift | position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
Returns
Returns the converted value in the float32 format.

Definition at line 317 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__getA11()

IFX_INLINE void* Ifx__getA11 ( void )

Definition at line 328 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__getDataParamRet()

IFX_INLINE unsigned int Ifx__getDataParamRet ( void )

Definition at line 56 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jump_and_link()

IFX_INLINE void Ifx__jump_and_link ( void(*)(void) fun )

Jump and link

Definition at line 41 of file IfxCpu_IntrinsicsTasking.h.

Referenced by Ifx__jumpToFunctionWithLink().

◆ Ifx__jumpBackToLink()

IFX_INLINE void Ifx__jumpBackToLink ( void )

Definition at line 78 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jumpToFunction()

IFX_INLINE void Ifx__jumpToFunction ( const void * fun )

Definition at line 68 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__jumpToFunctionWithLink()

IFX_INLINE void Ifx__jumpToFunctionWithLink ( const void * fun )

Definition at line 73 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToAddrParam0()

IFX_INLINE void Ifx__moveToAddrParam0 ( const void * var )

Definition at line 51 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToDataParam0()

IFX_INLINE void Ifx__moveToDataParam0 ( unsigned int var )

Definition at line 46 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__moveToDataParamRet()

IFX_INLINE void Ifx__moveToDataParamRet ( unsigned int var )

Definition at line 63 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__popcnt()

IFX_INLINE sint32 Ifx__popcnt ( sint32 a )

Definition at line 372 of file IfxCpu_IntrinsicsTasking.h.

◆ Ifx__setStackPointer()

IFX_INLINE void Ifx__setStackPointer ( void * stackAddr )

Definition at line 335 of file IfxCpu_IntrinsicsTasking.h.

◆ IfxCpu_calculateCrc32()

IFX_INLINE uint32 IfxCpu_calculateCrc32 | ( | uint32 * | startaddress,
 |  | uint8 | length
 | ) |  |

Definition at line 340 of file IfxCpu_IntrinsicsTasking.h.

◆ IfxCpu_getRandomVal()

IFX_INLINE uint32 IfxCpu_getRandomVal | ( | uint32 | a,
 |  | uint32 | x,
 |  | uint32 | m
 | ) |  |

Definition at line 355 of file IfxCpu_IntrinsicsTasking.h.


iLLD_TC26B: IfxCpu_Irq.c File Reference

  • Cpu
  • Irq
IfxCpu_Irq.c File Reference

This file contains the APIs for Interrupt related functions. More...

#include "Cpu/Irq/IfxCpu_Irq.h"
#include "Tricore/Compilers/Compilers.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
Include dependency graph for IfxCpu_Irq.c:

Go to the source code of this file.

Detailed Description

This file contains the APIs for Interrupt related functions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_Irq.c.


iLLD_TC26B: IfxCpu_Irq.h File Reference

  • Cpu
  • Irq
Functions
IfxCpu_Irq.h File Reference

This file contains the APIs for Interrupt related functions. More...

#include "Ifx_Cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "Cpu/Std/IfxCpu.h"
#include "Src/Std/IfxSrc.h"
Include dependency graph for IfxCpu_Irq.h:

Go to the source code of this file.

Functions

IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos (IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU. More...

Detailed Description

This file contains the APIs for Interrupt related functions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_Irq.h.


iLLD_TC26B: IfxCpu_Trap.c File Reference

  • Cpu
  • Trap
Macros | Functions
IfxCpu_Trap.c File Reference

This file contains the APIs for Trap related functions. More...

#include "IfxCpu_Trap.h"
#include "Cpu/Std/IfxCpu.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "IfxCpu_reg.h"
#include "Ifx_Cfg.h"
Include dependency graph for IfxCpu_Trap.c:

Go to the source code of this file.

Macros

#define | IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch)
Configuration for CpuX enable. More...
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch) ((void)trapWatch)
#define | IFX_CFG_CPU_TRAP_DEBUG __debug()

Functions

IFX_INLINE IfxCpu_Trap | IfxCpu_Trap_extractTrapInfo (uint8 trapClass, uint32 tin)
void | IfxCpu_Trap_memoryManagementError (uint32 tin)
void | IfxCpu_Trap_internalProtectionError (uint32 tin)
void | IfxCpu_Trap_instructionError (uint32 tin)
void | IfxCpu_Trap_contextManagementError (uint32 tin)
void | IfxCpu_Trap_busError (uint32 tin)
void | IfxCpu_Trap_assertion (uint32 tin)
void | IfxCpu_Trap_systemCall_Cpu0 (uint32 tin)
void | IfxCpu_Trap_nonMaskableInterrupt (uint32 tin)
void | IfxCpu_Trap_vectorTable0 (void)

Detailed Description

This file contains the APIs for Trap related functions.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxCpu_Trap.c.

Macro Definition Documentation

◆ IFX_CFG_CPU_TRAP_ASSERT_HOOK

#define IFX_CFG_CPU_TRAP_ASSERT_HOOK ( trapWatch ) ((void)trapWatch)

By default assertion is empty

Definition at line 85 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion().

◆ IFX_CFG_CPU_TRAP_BE_HOOK

#define IFX_CFG_CPU_TRAP_BE_HOOK ( trapWatch ) ((void)trapWatch)

By default bus Error macro is empty

Definition at line 82 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_busError().

◆ IFX_CFG_CPU_TRAP_CME_HOOK

#define IFX_CFG_CPU_TRAP_CME_HOOK ( trapWatch ) ((void)trapWatch)

By default context Management Error macro is empty

Definition at line 79 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_contextManagementError().

◆ IFX_CFG_CPU_TRAP_DEBUG

#define IFX_CFG_CPU_TRAP_DEBUG __debug()

Definition at line 89 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion(), IfxCpu_Trap_busError(), IfxCpu_Trap_contextManagementError(), IfxCpu_Trap_instructionError(), IfxCpu_Trap_internalProtectionError(), and IfxCpu_Trap_memoryManagementError().

◆ IFX_CFG_CPU_TRAP_IE_HOOK

#define IFX_CFG_CPU_TRAP_IE_HOOK ( trapWatch ) ((void)trapWatch)

By default instruction Error macro is empty

Definition at line 76 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_instructionError().

◆ IFX_CFG_CPU_TRAP_IPE_HOOK

#define IFX_CFG_CPU_TRAP_IPE_HOOK ( trapWatch ) ((void)trapWatch)

By default internal Protection Error macro is empty

Definition at line 73 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_internalProtectionError().

◆ IFX_CFG_CPU_TRAP_MME_HOOK

#define IFX_CFG_CPU_TRAP_MME_HOOK ( trapWatch ) ((void)trapWatch)

By default memory Management Error macro is empty

Definition at line 70 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_memoryManagementError().

◆ IFX_CFG_CPU_TRAP_NMI_HOOK

#define IFX_CFG_CPU_TRAP_NMI_HOOK ( trapWatch ) ((void)trapWatch)

By default NMI macro is empty

Definition at line 67 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_nonMaskableInterrupt().

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 49 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_systemCall_Cpu0().

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 52 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 55 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 58 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 61 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK

#define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK ( trapWatch ) ((void)trapWatch)

By default macro is empty

Definition at line 64 of file IfxCpu_Trap.c.

◆ IFX_CFG_CPU_TRAP_TSR_HOOK

#define IFX_CFG_CPU_TRAP_TSR_HOOK ( trapWatch )

Configuration for CpuX enable.

By default macro is empty

Definition at line 46 of file IfxCpu_Trap.c.

Function Documentation

◆ IfxCpu_Trap_assertion()

void IfxCpu_Trap_assertion ( uint32 tin )

Definition at line 164 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_busError()

void IfxCpu_Trap_busError ( uint32 tin )

Definition at line 153 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_contextManagementError()

void IfxCpu_Trap_contextManagementError ( uint32 tin )

Definition at line 142 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_extractTrapInfo()

IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo | ( | uint8 | trapClass,
 |  | uint32 | tin
 | ) |  |

Definition at line 98 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_assertion(), IfxCpu_Trap_busError(), IfxCpu_Trap_contextManagementError(), IfxCpu_Trap_instructionError(), IfxCpu_Trap_internalProtectionError(), IfxCpu_Trap_memoryManagementError(), IfxCpu_Trap_nonMaskableInterrupt(), and IfxCpu_Trap_systemCall_Cpu0().

◆ IfxCpu_Trap_instructionError()

void IfxCpu_Trap_instructionError ( uint32 tin )

Definition at line 131 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_internalProtectionError()

void IfxCpu_Trap_internalProtectionError ( uint32 tin )

Definition at line 120 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_memoryManagementError()

void IfxCpu_Trap_memoryManagementError ( uint32 tin )

Definition at line 109 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_nonMaskableInterrupt()

void IfxCpu_Trap_nonMaskableInterrupt ( uint32 tin )

Definition at line 239 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_systemCall_Cpu0()

void IfxCpu_Trap_systemCall_Cpu0 ( uint32 tin )

Definition at line 175 of file IfxCpu_Trap.c.

Referenced by IfxCpu_Trap_vectorTable0().

◆ IfxCpu_Trap_vectorTable0()

void IfxCpu_Trap_vectorTable0 ( void )

Definition at line 266 of file IfxCpu_Trap.c.


iLLD_TC26B: IfxCpu_Trap.h File Reference

  • Cpu
  • Trap
Data Structures | Typedefs | Enumerations
IfxCpu_Trap.h File Reference
#include "Cpu/Std/Ifx_Types.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
#include "Ifx_Cfg.h"
Include dependency graph for IfxCpu_Trap.h:

Go to the source code of this file.

Data Structures

union | IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps. More...
struct | IfxCpu_Trap
Structure to contain the trap information. More...

Typedefs

typedef sint32 | IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap. More...
typedef sint32 | IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap. More...

Enumerations

enum IfxCpu_Trap_Class {
IfxCpu_Trap_Class_memoryManagement = 0U,
IfxCpu_Trap_Class_internalProtection = 1U,
IfxCpu_Trap_Class_instructionErrors = 2U,
IfxCpu_Trap_Class_contextManagement = 3U,
IfxCpu_Trap_Class_bus = 4U,
IfxCpu_Trap_Class_assertion = 5U,
IfxCpu_Trap_Class_systemCall = 6U,
IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
}
Enum for available Trap classes. More...
enum IfxCpu_Trap_MemoryManagement_Id {
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U
}
Enum for available Identification numbers under Memory Management Trap. More...
enum IfxCpu_Trap_InternalProtection_Id {
IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U
}
Enum for available Identification numbers under Internal Protection Trap. More...
enum IfxCpu_Trap_InstructionErrors_Id {
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U
}
Enum for available Identification numbers under Instruction Errors Trap. More...
enum IfxCpu_Trap_ContextManagement_Id {
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
IfxCpu_Trap_ContextManagement_Id_nestingError = 7U
}
Enum for available Identification numbers under Context Management Trap. More...
enum IfxCpu_Trap_Bus_Id {
IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U
}
Enum for available Identification numbers under Bus Trap. More...
enum IfxCpu_Trap_Assertion_Id {
IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U
}
Enum for available Identification numbers under Assertion Trap. More...


iLLD_TC26B: IfxDma.c File Reference

  • Dma
  • Std
IfxDma.c File Reference

DMA basic functionality. More...

#include "IfxDma.h"
Include dependency graph for IfxDma.c:

Go to the source code of this file.

Detailed Description

DMA basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDma.c.


iLLD_TC26B: IfxDma_cfg.c File Reference

  • _Impl
IfxDma_cfg.c File Reference

DMA on-chip implementation data. More...

#include "IfxDma_cfg.h"
Include dependency graph for IfxDma_cfg.c:

Go to the source code of this file.

Detailed Description

DMA on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDma_cfg.c.


iLLD_TC26B: IfxDma_Dma.c File Reference

  • Dma
  • Dma
Functions
IfxDma_Dma.c File Reference

DMA DMA details. More...

#include "IfxDma_Dma.h"
Include dependency graph for IfxDma_Dma.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxDma_Dma_configureTransactionSet (Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists) More...
void | IfxDma_Dma_createModuleHandle (IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available. More...
void | IfxDma_Dma_deInitChannel (IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel More...
void | IfxDma_Dma_initChannel (IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel More...
void | IfxDma_Dma_initChannelConfig (IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration More...
void | IfxDma_Dma_initLinkedListEntry (void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module More...
void | IfxDma_Dma_initModule (IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module. More...
void | IfxDma_Dma_initModuleConfig (IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration More...

Detailed Description

DMA DMA details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDma_Dma.c.

Function Documentation

◆ IfxDma_Dma_configureTransactionSet()

IFX_STATIC void IfxDma_Dma_configureTransactionSet | ( | Ifx_DMA_CH * | channel,
 |  | const IfxDma_Dma_ChannelConfig * | config
 | ) |  |

local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists)

Parameters
channel | Specifies the pointer to DMA channel registers
config | pointer to the DMA default channel configuration structure
Returns
None

Definition at line 46 of file IfxDma_Dma.c.

Referenced by IfxDma_Dma_initChannel(), and IfxDma_Dma_initLinkedListEntry().


iLLD_TC26B: IfxDsadc.c File Reference

  • Dsadc
  • Std
Functions
IfxDsadc.c File Reference

DSADC basic functionality. More...

#include "IfxDsadc.h"
Include dependency graph for IfxDsadc.c:

Go to the source code of this file.

Functions

volatile Ifx_SRC_SRCR * | IfxDsadc_getAuxSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register. More...
float32 | IfxDsadc_getIntegratorOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz. More...
float32 | IfxDsadc_getMainCombOutFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz. More...
float32 | IfxDsadc_getMainGroupDelay (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds. More...
volatile Ifx_SRC_SRCR * | IfxDsadc_getMainSrc (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event. More...
float32 | IfxDsadc_getModulatorClockFreq (Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz. More...
float32 | IfxDsadc_getModulatorInputClockFreq (Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz. More...
void | IfxDsadc_resetModule (Ifx_DSADC *dsadc)
resets the DSADC kernel More...

Detailed Description

DSADC basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDsadc.c.


iLLD_TC26B: IfxDsadc_Dsadc.c File Reference

  • Dsadc
  • Dsadc
Functions
IfxDsadc_Dsadc.c File Reference

DSADC DSADC details. More...

#include "IfxDsadc_Dsadc.h"
Include dependency graph for IfxDsadc_Dsadc.c:

Go to the source code of this file.

Functions

IFX_STATIC sint32 | IfxDsadc_Dsadc_calcDIVx (float32 sourceFreq, float32 *targetFreq)
calculate division factor More...
IFX_STATIC void | IfxDsadc_Dsadc_initAuxFilter (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config)
Initialises the auxilary filter. More...
IFX_STATIC void | IfxDsadc_Dsadc_initCombFilter (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config)
Initialises the comb filter. More...
IFX_STATIC void | IfxDsadc_Dsadc_initDemodulator (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config)
Initialises the demodulator. More...
IFX_STATIC void | IfxDsadc_Dsadc_initFirFilter (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config)
Initialises the fir filter. More...
IFX_STATIC void | IfxDsadc_Dsadc_initIntegrator (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config)
Initialises the integrator. More...
IFX_STATIC void | IfxDsadc_Dsadc_initModulator (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config)
Initialises the modulator. More...
IFX_STATIC void | IfxDsadc_Dsadc_initRectifier (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config)
Initialises the rectifier. More...
sint16 | IfxDsadc_Dsadc_getAuxResult (IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain. More...
void | IfxDsadc_Dsadc_initCarrierGen (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator. More...
void | IfxDsadc_Dsadc_initChannel (IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration. More...
void | IfxDsadc_Dsadc_initChannelConfig (IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration. More...
void | IfxDsadc_Dsadc_initModule (IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration. More...
void | IfxDsadc_Dsadc_initModuleConfig (IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration. More...
void | IfxDsadc_Dsadc_initCarrierGenConfig (IfxDsadc_Dsadc_CarrierGenConfig *config)

Detailed Description

DSADC DSADC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDsadc_Dsadc.c.

Function Documentation

◆ IfxDsadc_Dsadc_calcDIVx()

IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx | ( | float32 | sourceFreq,
 |  | float32 * | targetFreq
 | ) |  |

calculate division factor

Parameters
sourceFreq | Source frequency
targetFreq | Target frequency
Returns
division factor

Definition at line 95 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initCarrierGen(), and IfxDsadc_Dsadc_initModulator().

◆ IfxDsadc_Dsadc_initAuxFilter()

IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_AuxFilterConfig * | config
 | ) |  |

Initialises the auxilary filter.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC fir auxilary filter configuration
Returns
None

Definition at line 129 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initCarrierGenConfig()

void IfxDsadc_Dsadc_initCarrierGenConfig ( IfxDsadc_Dsadc_CarrierGenConfig * config )
Parameters
config Pointer to DSADC Carrier Configuration
Returns
None

Definition at line 463 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Rdc_initConfig().

◆ IfxDsadc_Dsadc_initCombFilter()

IFX_STATIC void IfxDsadc_Dsadc_initCombFilter | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_CombFilterConfig * | config
 | ) |  |

Initialises the comb filter.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC comb filter configuration
Returns
None

Definition at line 310 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initDemodulator()

IFX_STATIC void IfxDsadc_Dsadc_initDemodulator | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_DemodulatorConfig * | config
 | ) |  |

Initialises the demodulator.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC demodulator configuration
Returns
None

Definition at line 329 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initFirFilter()

IFX_STATIC void IfxDsadc_Dsadc_initFirFilter | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_FirFilterConfig * | config
 | ) |  |

Initialises the fir filter.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC fir filter configuration
Returns
None

Definition at line 351 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initIntegrator()

IFX_STATIC void IfxDsadc_Dsadc_initIntegrator | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_IntegratorConfig * | config
 | ) |  |

Initialises the integrator.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC fir integrator configuration
Returns
None

Definition at line 367 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initModulator()

IFX_STATIC void IfxDsadc_Dsadc_initModulator | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_ModulatorConfig * | config
 | ) |  |

Initialises the modulator.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC modulator configuration
Returns
None

Definition at line 382 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().

◆ IfxDsadc_Dsadc_initRectifier()

IFX_STATIC void IfxDsadc_Dsadc_initRectifier | ( | IfxDsadc_Dsadc_Channel * | channel,
 |  | const IfxDsadc_Dsadc_RectifierConfig * | config
 | ) |  |

Initialises the rectifier.

Parameters
channel | Pointer to the DSADC channel handle
config | pointer to the DSADC fir rectifier configuration
Returns
None

Definition at line 449 of file IfxDsadc_Dsadc.c.

Referenced by IfxDsadc_Dsadc_initChannel().


iLLD_TC26B: IfxDsadc_Rdc.c File Reference

  • Dsadc
  • Rdc
Functions | Variables
IfxDsadc_Rdc.c File Reference

DSADC RDC details. More...

#include "IfxDsadc_Rdc.h"
#include "string.h"
#include "Gtm/Trig/IfxGtm_Trig.h"
Include dependency graph for IfxDsadc_Rdc.c:

Go to the source code of this file.

Functions

IFX_STATIC Ifx_GTM_TIM_CH * | IfxDsadc_Rdc_initGtmTim (Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
IFX_STATIC boolean | IfxDsadc_Rdc_initHwChannels (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC hardware channels. More...
IFX_STATIC void | IfxDsadc_Rdc_initHwTimestamp (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the GTM timestamp hardware resources. More...
IFX_INLINE void | IfxDsadc_Rdc_updateTimestamp (IfxDsadc_Rdc *driver)
Updating RDC timestamps. More...
IFX_STATIC float32 | IfxDsadc_Rdc_calculateGroupDelay (IfxDsadc_Rdc *driver)
Group Dalay calculation. More...
IFX_STATIC float32 | IfxDsadc_Rdc_calculateTimestampPeriod (const IfxDsadc_Rdc_Config *config)
IFX_STATIC float32 | IfxDsadc_Rdc_getUpdatePeriod (IfxDsadc_Rdc *driver)
Return the update period. More...
float32 | IfxDsadc_Rdc_getAbsolutePosition (IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition More...
IfxStdIf_Pos_Dir | IfxDsadc_Rdc_getDirection (IfxDsadc_Rdc *driver)
sint32 | IfxDsadc_Rdc_getOffset (IfxDsadc_Rdc *driver)
float32 | IfxDsadc_Rdc_getPosition (IfxDsadc_Rdc *driver)
float32 | IfxDsadc_Rdc_getRefreshPeriod (IfxDsadc_Rdc *driver)
sint32 | IfxDsadc_Rdc_getResolution (IfxDsadc_Rdc *driver)
IfxStdIf_Pos_SensorType | IfxDsadc_Rdc_getSensorType (IfxDsadc_Rdc *driver)
sint32 | IfxDsadc_Rdc_getTurn (IfxDsadc_Rdc *driver)
boolean | IfxDsadc_Rdc_init (IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising: More...
void | IfxDsadc_Rdc_initConfig (IfxDsadc_Rdc_Config *config)
void | IfxDsadc_Rdc_onEventA (IfxDsadc_Rdc *driver)
void | IfxDsadc_Rdc_reset (IfxDsadc_Rdc *driver)
void | IfxDsadc_Rdc_resetFaults (IfxDsadc_Rdc *driver)
void | IfxDsadc_Rdc_setOffset (IfxDsadc_Rdc *driver, sint32 offset)
void | IfxDsadc_Rdc_setRefreshPeriod (IfxDsadc_Rdc *driver, float32 updatePeriod)
void | IfxDsadc_Rdc_startConversion (IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels. More...
boolean | IfxDsadc_Rdc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos". More...
void | IfxDsadc_Rdc_update (IfxDsadc_Rdc *driver)

Variables

IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg
GTM TIM Configuration settings. More...

Detailed Description

DSADC RDC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDsadc_Rdc.c.


iLLD_TC26B: IfxDts.c File Reference

  • Dts
  • Std
Functions
IfxDts.c File Reference

DTS basic functionality. More...

#include "IfxDts.h"
Include dependency graph for IfxDts.c:

Go to the source code of this file.

Functions

boolean IfxDts_isReady (void)
Returns the current READY status of the Sensor. More...

Detailed Description

DTS basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDts.c.

Function Documentation

◆ IfxDts_isReady()

boolean IfxDts_isReady ( void )

Returns the current READY status of the Sensor.

Returns
TRUE if Sensor is ready for measuring temperature otherwise FALSE

Definition at line 35 of file IfxDts.c.

Referenced by IfxDts_Dts_initModule().


iLLD_TC26B: IfxDts_Dts.c File Reference

  • Dts
  • Dts
Functions
IfxDts_Dts.c File Reference

DTS DTS details. More...

#include "IfxDts_Dts.h"
Include dependency graph for IfxDts_Dts.c:

Go to the source code of this file.

Functions

uint16 | IfxDts_Dts_convertFromCelsius (float32 temperatureValue)
Converts a temperature value in Celsius to DTS value. More...
float32 | IfxDts_Dts_convertToCelsius (uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius. More...
void | IfxDts_Dts_initModule (const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration. More...
void | IfxDts_Dts_initModuleConfig (IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration. More...

Detailed Description

DTS DTS details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxDts_Dts.c.


iLLD_TC26B: IfxEmem.c File Reference

  • Emem
  • Std
Functions
IfxEmem.c File Reference

EMEM basic functionality. More...

#include "IfxEmem.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxEmem.c:

Go to the source code of this file.

Functions

IfxEmem_LockedState | IfxEmem_getLockedState (void)
Gets the EMEM stand RAM lock state. More...
void | IfxEmem_setClockEnableState (const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application. for complete enable and disable of EMEM with endint protection handling, please use the following APIs /ref IfxEmem_enableModule /ref IfxEmem_disableModule. More...

Detailed Description

EMEM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEmem.c.


iLLD_TC26B: IfxEmem_cfg.c File Reference

  • _Impl
IfxEmem_cfg.c File Reference

EMEM on-chip implementation data. More...

#include "IfxEmem_cfg.h"
Include dependency graph for IfxEmem_cfg.c:

Go to the source code of this file.

Detailed Description

EMEM on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEmem_cfg.c.


iLLD_TC26B: IfxEray.c File Reference

  • Eray
  • Std
Functions
IfxEray.c File Reference

ERAY basic functionality. More...

#include "IfxEray.h"
Include dependency graph for IfxEray.c:

Go to the source code of this file.

Functions

uint16 | IfxEray_calcHeaderCrc (uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame. More...
boolean | IfxEray_changePocState (Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state. More...
void | IfxEray_clearAllFlags (Ifx_ERAY *eray)
Clears all the error flags. More...
void | IfxEray_enableInterruptLines (Ifx_ERAY *eray)
Enables all the Interrupt lines. More...
Ifx_ERAY * | IfxEray_getAddress (IfxEray_Index eray)
IfxEray_Index | IfxEray_getIndex (Ifx_ERAY *eray)
API to get the resource index of the ERAY specified. More...
void | IfxEray_readData (Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers. More...
void | IfxEray_readFrame (Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers. More...
void | IfxEray_resetModule (Ifx_ERAY *eray)
Resets the ERAY kernel. More...
void | IfxEray_setMessageBufferInterruptDestination (Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination. More...
void | IfxEray_setNewDataInterruptDestination (Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination. More...
void | IfxEray_setPocReady (Ifx_ERAY *eray)
Sets the POC state to Ready state. More...
void | IfxEray_setSlot (Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots. More...
void | IfxEray_writeData (Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers. More...

Detailed Description

ERAY basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEray.c.


iLLD_TC26B: IfxEray_cfg.c File Reference

  • _Impl
Variables
IfxEray_cfg.c File Reference

ERAY on-chip implementation data. More...

#include "IfxEray_cfg.h"
Include dependency graph for IfxEray_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap [IFXERAY_NUM_MODULES]

Detailed Description

ERAY on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEray_cfg.c.

Variable Documentation

◆ IfxEray_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Initial value:
= {
{&MODULE_ERAY0, (uint32)IfxEray_Index_0},
}
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:65

Definition at line 35 of file IfxEray_cfg.c.

Referenced by IfxEray_getAddress(), and IfxEray_getIndex().


iLLD_TC26B: IfxEray_Eray.c File Reference

  • Eray
  • Eray
Functions
IfxEray_Eray.c File Reference

ERAY ERAY details. More...

#include "IfxEray_Eray.h"
#include "Mtu/Std/IfxMtu.h"
Include dependency graph for IfxEray_Eray.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxEray_Eray_Node_initCommunicationController (IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller. More...
IFX_STATIC void | IfxEray_Eray_Node_initGTU (IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit. More...
IFX_STATIC void | IfxEray_Eray_Node_initMessageRAM (IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM. More...
void | IfxEray_Eray_Node_init (IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration. More...
void | IfxEray_Eray_Node_initConfig (IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer. More...
void | IfxEray_Eray_initModule (IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration. More...
void | IfxEray_Eray_initModuleConfig (IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer. More...
void | IfxEray_Eray_receiveFifoFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer. More...
void | IfxEray_Eray_receiveFrame (IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer. More...
void | IfxEray_Eray_transmitFrame (IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot. More...

Detailed Description

ERAY ERAY details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEray_Eray.c.


iLLD_TC26B: IfxEth.c File Reference

  • Eth
  • Std
Functions | Variables
IfxEth.c File Reference

ETH basic functionality. More...

#include "IfxEth.h"
Include dependency graph for IfxEth.c:

Go to the source code of this file.

Functions

void | IfxEth_disableModule (void)
Disable ETH Module. More...
void | IfxEth_enableModule (void)
Enable ETH Module. More...
void | IfxEth_freeReceiveBuffer (IfxEth *eth)
Free the receive buffer, enabling it for the further reception. More...
void * | IfxEth_getReceiveBuffer (IfxEth *eth)
Gets receive buffer
note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More...
void * | IfxEth_getTransmitBuffer (IfxEth *eth)
Get a free transmit buffer. More...
void | IfxEth_init (IfxEth *eth, const IfxEth_Config *config)
Initialises the driver. More...
void | IfxEth_initConfig (IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure. More...
void | IfxEth_initReceiveDescriptors (IfxEth *eth)
Initialises the receive descriptors. More...
void | IfxEth_initReceiveDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors. More...
void | IfxEth_initTransmitDescriptors (IfxEth *eth)
Initialises transmit descriptors. More...
void | IfxEth_initTransmitDescriptorsRingMode (IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors. More...
void | IfxEth_readMacAddress (IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register. More...
void | IfxEth_resetModule (void)
resets Ethernet kernel More...
void | IfxEth_sendTransmitBuffer (IfxEth *eth, uint16 len)
Request to send the transmit buffer. More...
void | IfxEth_sendTransmitBuffersRingMode (IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer. More...
void | IfxEth_setAndSendTransmitBuffer (IfxEth *eth, void *buffer, uint16 len)
void | IfxEth_setMacAddress (IfxEth *eth, const uint8 *macAddress)
Sets the MAC address. More...
void | IfxEth_setupChecksumEngine (IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine. More...
void | IfxEth_setupMiiInputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins. More...
void | IfxEth_setupMiiOutputPins (IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins More...
void | IfxEth_setupRmiiInputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins. More...
void | IfxEth_setupRmiiOutputPins (IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port More...
void | IfxEth_shuffleRxDescriptor (IfxEth *eth)
Shuffle to next RX descriptor. More...
void | IfxEth_shuffleTxDescriptor (IfxEth *eth)
Shuffle to next TX descriptor. More...
void | IfxEth_startReceiver (IfxEth *eth)
Start the receiver functions. More...
void | IfxEth_startTransmitter (IfxEth *eth)
Start the transmitter functions. More...
void | IfxEth_stopReceiver (IfxEth *eth)
Stops the receiver functions. More...
void | IfxEth_stopTransmitter (IfxEth *eth)
Stop the transmitter functions. More...
void | IfxEth_wakeupReceiver (IfxEth *eth)
Wakeup the receiver functions. More...
void | IfxEth_wakeupTransmitter (IfxEth *eth)
Wakeup the transmitter functions. More...
void | IfxEth_writeHeader (IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer More...

Variables

uint8 IfxEth_rxBuffer [IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
IfxEth_RxDescrList IfxEth_rxDescr
uint8 IfxEth_txBuffer [IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
IfxEth_TxDescrList IfxEth_txDescr

Detailed Description

ETH basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEth.c.

Variable Documentation

◆ IfxEth_rxBuffer

uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]

Definition at line 35 of file IfxEth.c.

Referenced by IfxEth_initReceiveDescriptors().

◆ IfxEth_rxDescr

IfxEth_RxDescrList IfxEth_rxDescr

Definition at line 37 of file IfxEth.c.

Referenced by IfxEth_initConfig().

◆ IfxEth_txBuffer

uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]

Definition at line 39 of file IfxEth.c.

Referenced by IfxEth_initTransmitDescriptors().

◆ IfxEth_txDescr

IfxEth_TxDescrList IfxEth_txDescr

Definition at line 41 of file IfxEth.c.

Referenced by IfxEth_initConfig().


iLLD_TC26B: IfxEth_Phy_Pef7071.c File Reference

  • Eth
  • Phy_Pef7071
Macros | Functions | Variables
IfxEth_Phy_Pef7071.c File Reference

ETH PHY_PEF7071 details. More...

#include "IfxEth_Phy_Pef7071.h"
Include dependency graph for IfxEth_Phy_Pef7071.c:

Go to the source code of this file.

Macros

#define | IFXETH_PHY_PEF7071_MDIO_CTRL 0x00
#define | IFXETH_PHY_PEF7071_MDIO_STAT 0x01
#define | IFXETH_PHY_PEF7071_MDIO_PHYID1 0x02
#define | IFXETH_PHY_PEF7071_MDIO_PHYID2 0x03
#define | IFXETH_PHY_PEF7071_MDIO_AN_ADV 0x04
#define | IFXETH_PHY_PEF7071_MDIO_AN_LPA 0x05
#define | IFXETH_PHY_PEF7071_MDIO_AN_EXP 0x06
#define | IFXETH_PHY_PEF7071_MDIO_AN_NPTX 0x07
#define | IFXETH_PHY_PEF7071_MDIO_AN_NPRX 0x08
#define | IFXETH_PHY_PEF7071_MDIO_GCTRL 0x09
#define | IFXETH_PHY_PEF7071_MDIO_GSTAT 0x0A
#define | IFXETH_PHY_PEF7071_MDIO_RES11 0x0B
#define | IFXETH_PHY_PEF7071_MDIO_RES12 0x0C
#define | IFXETH_PHY_PEF7071_MDIO_MMDCTRL 0x0D
#define | IFXETH_PHY_PEF7071_MDIO_MMDDATA 0x0E
#define | IFXETH_PHY_PEF7071_MDIO_XSTAT 0x0F
#define | IFXETH_PHY_PEF7071_MDIO_PHYPERF 0x10
#define | IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 0x11
#define | IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 0x12
#define | IFXETH_PHY_PEF7071_MDIO_PHYCTL1 0x13
#define | IFXETH_PHY_PEF7071_MDIO_PHYCTL2 0x14
#define | IFXETH_PHY_PEF7071_MDIO_ERRCNT 0x15
#define | IFXETH_PHY_PEF7071_MDIO_EECTRL 0x16
#define | IFXETH_PHY_PEF7071_MDIO_MIICTRL 0x17
#define | IFXETH_PHY_PEF7071_MDIO_MIISTAT 0x18
#define | IFXETH_PHY_PEF7071_MDIO_IMASK 0x19
#define | IFXETH_PHY_PEF7071_MDIO_ISTAT 0x1A
#define | IFXETH_PHY_PEF7071_MDIO_LED 0x1B
#define | IFXETH_PHY_PEF7071_MDIO_TPGCTRL 0x1C
#define | IFXETH_PHY_PEF7071_MDIO_TPGDATA 0x1D
#define | IFXETH_PHY_PEF7071_MDIO_FWV 0x1E
#define | IFXETH_PHY_PEF7071_MDIO_RES1F 0x1F
#define | IFXETH_PHY_PEF7071_WAIT_GMII_READY() while (ETH_GMII_ADDRESS.B.GB) {}
#define | IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR 0x00
Access type for indirectly accessing Address Type of MMD register in PHY. More...
#define | IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA 0x4000
Access type for indirectly accessing Data Type of MMD register in PHY. More...
#define | IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI 0x8000
Access type for indirectly accessing Data Type with post increment of MMD register in PHY. More...

Functions

uint32 | IfxEth_Phy_Pef7071_init (void)
boolean | IfxEth_Phy_Pef7071_link (void)
void | IfxEth_Phy_Pef7071_read_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 *pdata)
void | IfxEth_Phy_Pef7071_write_mdio_reg (uint32 layeraddr, uint32 regaddr, uint32 data)
void | IfxEth_Phy_Pef7071_write_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY. More...
void | IfxEth_Phy_Pef7071_read_mmd_indirect (uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY. More...

Variables

uint32 IfxEth_Phy_Pef7071_iPhyInitDone = 0

Detailed Description

ETH PHY_PEF7071 details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxEth_Phy_Pef7071.c.

Macro Definition Documentation

◆ IFXETH_PHY_PEF7071_MDIO_AN_ADV

#define IFXETH_PHY_PEF7071_MDIO_AN_ADV 0x04

Definition at line 43 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init().

◆ IFXETH_PHY_PEF7071_MDIO_AN_EXP

#define IFXETH_PHY_PEF7071_MDIO_AN_EXP 0x06

Definition at line 47 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_AN_LPA

#define IFXETH_PHY_PEF7071_MDIO_AN_LPA 0x05

Definition at line 45 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_AN_NPRX

#define IFXETH_PHY_PEF7071_MDIO_AN_NPRX 0x08

Definition at line 51 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_AN_NPTX

#define IFXETH_PHY_PEF7071_MDIO_AN_NPTX 0x07

Definition at line 49 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_CTRL

#define IFXETH_PHY_PEF7071_MDIO_CTRL 0x00

Definition at line 35 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init().

◆ IFXETH_PHY_PEF7071_MDIO_EECTRL

#define IFXETH_PHY_PEF7071_MDIO_EECTRL 0x16

Definition at line 79 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_ERRCNT

#define IFXETH_PHY_PEF7071_MDIO_ERRCNT 0x15

Definition at line 77 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_FWV

#define IFXETH_PHY_PEF7071_MDIO_FWV 0x1E

Definition at line 95 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_GCTRL

#define IFXETH_PHY_PEF7071_MDIO_GCTRL 0x09

Definition at line 53 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init().

◆ IFXETH_PHY_PEF7071_MDIO_GSTAT

#define IFXETH_PHY_PEF7071_MDIO_GSTAT 0x0A

Definition at line 55 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_IMASK

#define IFXETH_PHY_PEF7071_MDIO_IMASK 0x19

Definition at line 85 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_ISTAT

#define IFXETH_PHY_PEF7071_MDIO_ISTAT 0x1A

Definition at line 87 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_LED

#define IFXETH_PHY_PEF7071_MDIO_LED 0x1B

Definition at line 89 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_MIICTRL

#define IFXETH_PHY_PEF7071_MDIO_MIICTRL 0x17

Definition at line 81 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init().

◆ IFXETH_PHY_PEF7071_MDIO_MIISTAT

#define IFXETH_PHY_PEF7071_MDIO_MIISTAT 0x18

Definition at line 83 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_MMDCTRL

#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL 0x0D

Definition at line 61 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR

#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR 0x00

Access type for indirectly accessing Address Type of MMD register in PHY.

Definition at line 103 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA

#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA 0x4000

Access type for indirectly accessing Data Type of MMD register in PHY.

Definition at line 107 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI

#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI 0x8000

Access type for indirectly accessing Data Type with post increment of MMD register in PHY.

Definition at line 111 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_MMDDATA

#define IFXETH_PHY_PEF7071_MDIO_MMDDATA 0x0E

Definition at line 63 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_read_mmd_indirect(), and IfxEth_Phy_Pef7071_write_mmd_indirect().

◆ IFXETH_PHY_PEF7071_MDIO_PHYCTL1

#define IFXETH_PHY_PEF7071_MDIO_PHYCTL1 0x13

Definition at line 73 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYCTL2

#define IFXETH_PHY_PEF7071_MDIO_PHYCTL2 0x14

Definition at line 75 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYID1

#define IFXETH_PHY_PEF7071_MDIO_PHYID1 0x02

Definition at line 39 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYID2

#define IFXETH_PHY_PEF7071_MDIO_PHYID2 0x03

Definition at line 41 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYPERF

#define IFXETH_PHY_PEF7071_MDIO_PHYPERF 0x10

Definition at line 67 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYSTAT1

#define IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 0x11

Definition at line 69 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_PHYSTAT2

#define IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 0x12

Definition at line 71 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_RES11

#define IFXETH_PHY_PEF7071_MDIO_RES11 0x0B

Definition at line 57 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_RES12

#define IFXETH_PHY_PEF7071_MDIO_RES12 0x0C

Definition at line 59 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_RES1F

#define IFXETH_PHY_PEF7071_MDIO_RES1F 0x1F

Definition at line 97 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_STAT

#define IFXETH_PHY_PEF7071_MDIO_STAT 0x01

Definition at line 37 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_link().

◆ IFXETH_PHY_PEF7071_MDIO_TPGCTRL

#define IFXETH_PHY_PEF7071_MDIO_TPGCTRL 0x1C

Definition at line 91 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_TPGDATA

#define IFXETH_PHY_PEF7071_MDIO_TPGDATA 0x1D

Definition at line 93 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_MDIO_XSTAT

#define IFXETH_PHY_PEF7071_MDIO_XSTAT 0x0F

Definition at line 65 of file IfxEth_Phy_Pef7071.c.

◆ IFXETH_PHY_PEF7071_WAIT_GMII_READY

#define IFXETH_PHY_PEF7071_WAIT_GMII_READY ( ) while (ETH_GMII_ADDRESS.B.GB) {}

Definition at line 99 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init(), IfxEth_Phy_Pef7071_read_mdio_reg(), and IfxEth_Phy_Pef7071_write_mdio_reg().

Variable Documentation

◆ IfxEth_Phy_Pef7071_iPhyInitDone

uint32 IfxEth_Phy_Pef7071_iPhyInitDone = 0

Definition at line 117 of file IfxEth_Phy_Pef7071.c.

Referenced by IfxEth_Phy_Pef7071_init(), and IfxEth_Phy_Pef7071_link().


iLLD_TC26B: IfxFce.c File Reference

  • Fce
  • Std
Functions
IfxFce.c File Reference

FCE basic functionality. More...

#include "IfxFce.h"
Include dependency graph for IfxFce.c:

Go to the source code of this file.

Functions

Ifx_FCE_STS | IfxFce_getCrc16InterruptStatus (Ifx_FCE *fce)
Gets the CRC-16 interrupt status. More...
Ifx_FCE_STS | IfxFce_getCrc32InterruptStatus (Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status. More...
Ifx_FCE_STS | IfxFce_getCrc8InterruptStatus (Ifx_FCE *fce)
Gets the CRC-8 interrupt status. More...
uint32 | IfxFce_reflectCrc32 (uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it. More...
void | IfxFce_resetModule (Ifx_FCE *fce)
Reset the module by clearing the kernel. More...

Detailed Description

FCE basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFce.c.


iLLD_TC26B: IfxFce_Crc.c File Reference

  • Fce
  • Crc
Functions
IfxFce_Crc.c File Reference

FCE CRC details. More...

#include "IfxFce_Crc.h"
Include dependency graph for IfxFce_Crc.c:

Go to the source code of this file.

Functions

uint16 | IfxFce_Crc_calculateCrc16 (IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
uint32 | IfxFce_Crc_calculateCrc32 (IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
uint8 | IfxFce_Crc_calculateCrc8 (IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed. More...
void | IfxFce_Crc_clearErrorFlags (IfxFce_Crc_Crc *fce)
Clears the error flags. More...
void | IfxFce_Crc_deInitModule (IfxFce_Crc_Crc *fce)
Deinitialises the FCE module. More...
Ifx_FCE_STS | IfxFce_Crc_getInterruptStatus (IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status. More...
void | IfxFce_Crc_initCrc (IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode. More...
void | IfxFce_Crc_initCrcConfig (IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer. More...
void | IfxFce_Crc_initModule (IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?. More...
void | IfxFce_Crc_initModuleConfig (IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values. More...

Detailed Description

FCE CRC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFce_Crc.c.


iLLD_TC26B: IfxFft.c File Reference

  • Fft
  • Std
IfxFft.c File Reference

FFT basic functionality. More...

#include "IfxFft.h"
Include dependency graph for IfxFft.c:

Go to the source code of this file.

Detailed Description

FFT basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFft.c.


iLLD_TC26B: IfxFft_Fft.c File Reference

  • Fft
  • Fft
Macros | Functions | Variables
IfxFft_Fft.c File Reference

FFT FFT details. More...

#include "IfxFft_Fft.h"
Include dependency graph for IfxFft_Fft.c:

Go to the source code of this file.

Macros

#define | IFXFFT_FFT_DATA_TRANSFER (*((volatile uint64 *)IFXFFT_DATA_SPACE))
#define | IFXFFT_FFT_WINDOW_TRANSFER (*((volatile uint64 *)IFXFFT_WINDOW_SPACE))
#define | IFXFFT_FFT_DMADISCARDCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 2)
#define | IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 1)
#define | IFXFFT_FFT_DMAINPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE)
#define | IFXFFT_FFT_DMADISCARDCHANNELID (dmaDiscard->channelId)
#define | IFXFFT_FFT_DMAOUTPUTCHANNELID (dmaOutput->channelId)
#define | IFXFFT_FFT_DMAINPUTCHANNELID (dmaInput->channelId)
#define | IFXFFT_FFT_MOVE_BTR4 1
#define | IFXFFT_FFT_MOVE_SIZE IfxDma_ChannelMoveSize_256bit
#define | IFXFFT_FFT_MOVE_DIV 4
#define | IFXFFT_FFT_ISALIGNED(address) ((Ifx_AlignOn256((uint32)address) == (uint32)address))

Functions

IFX_STATIC uint32 | IfxFft_Fft_calcCSR (const IfxFft_Fft_JobConfig *config)
Configures the CSR register. More...
IFX_STATIC void | IfxFft_Fft_unloadOutput (IfxFft_Fft_Job *job)
Unloads output data from the FFT engine. More...
IFX_STATIC void | IfxFft_Fft_loadInput (IfxFft_Fft_Job *job)
Loads input data into the FFT engine. More...
IFX_STATIC void | IfxFft_Fft_calcCounters (IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Calculates the input counters and output counters. More...
void | IfxFft_Fft_cloneAndLinkJobs (IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs. More...
void | IfxFft_Fft_initJob (IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job. More...
void | IfxFft_Fft_initJobConfig (IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values. More...
void | IfxFft_Fft_initModule (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module. More...
void | IfxFft_Fft_initModuleConfig (IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values. More...
void | IfxFft_Fft_initWindow (IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer. More...
void | IfxFft_Fft_isrInput (IfxFft_Fft *fft)
ISR input routine. More...
void | IfxFft_Fft_isrOutput (IfxFft_Fft *fft)
ISR output routine. More...
void | IfxFft_Fft_modifyDataPointers (IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle. More...
boolean | IfxFft_Fft_startJob (IfxFft_Fft_Job *job)
Starts the FFT job. More...
void | IfxFft_Fft_isrIntra (IfxFft_Fft *fft)
void | IfxFft_Fft_initDma (IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialization of DMA. More...

Variables

IFX_STATIC uint64 IfxFft_Fft_dummy256 [IFXFFT_FFT_MOVE_DIV]

Detailed Description

FFT FFT details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFft_Fft.c.

Macro Definition Documentation

◆ IFXFFT_FFT_DATA_TRANSFER

#define IFXFFT_FFT_DATA_TRANSFER (*((volatile uint64 *)IFXFFT_DATA_SPACE))

Definition at line 35 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_loadInput(), and IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_DMADISCARDCHANNELID

#define IFXFFT_FFT_DMADISCARDCHANNELID (dmaDiscard->channelId)

Definition at line 45 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_DMADISCARDCHANNELID_OPT

#define IFXFFT_FFT_DMADISCARDCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 2)

Definition at line 39 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_DMAINPUTCHANNELID

#define IFXFFT_FFT_DMAINPUTCHANNELID (dmaInput->channelId)

Definition at line 49 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_loadInput().

◆ IFXFFT_FFT_DMAINPUTCHANNELID_OPT

#define IFXFFT_FFT_DMAINPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE)

Definition at line 43 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_loadInput().

◆ IFXFFT_FFT_DMAOUTPUTCHANNELID

#define IFXFFT_FFT_DMAOUTPUTCHANNELID (dmaOutput->channelId)

Definition at line 47 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT

#define IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 1)

Definition at line 41 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().

◆ IFXFFT_FFT_ISALIGNED

#define IFXFFT_FFT_ISALIGNED ( address ) ((Ifx_AlignOn256((uint32)address) == (uint32)address))

Definition at line 57 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initJob().

◆ IFXFFT_FFT_MOVE_BTR4

#define IFXFFT_FFT_MOVE_BTR4 1

Definition at line 51 of file IfxFft_Fft.c.

◆ IFXFFT_FFT_MOVE_DIV

#define IFXFFT_FFT_MOVE_DIV 4

Definition at line 55 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_calcCounters().

◆ IFXFFT_FFT_MOVE_SIZE

#define IFXFFT_FFT_MOVE_SIZE IfxDma_ChannelMoveSize_256bit

Definition at line 53 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initDma().

◆ IFXFFT_FFT_WINDOW_TRANSFER

#define IFXFFT_FFT_WINDOW_TRANSFER (*((volatile uint64 *)IFXFFT_WINDOW_SPACE))

Definition at line 37 of file IfxFft_Fft.c.

Function Documentation

◆ IfxFft_Fft_calcCounters()

IFX_STATIC void IfxFft_Fft_calcCounters | ( | IfxFft_Fft_Job * | job,
 |  | const IfxFft_Fft_JobConfig * | jobConfig
 | ) |  |

Calculates the input counters and output counters.

Parameters
job | job FFT job
jobConfig | jobConfig Pointer to the job configuration
Returns
None

Definition at line 551 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initJob().

◆ IfxFft_Fft_initDma()

void IfxFft_Fft_initDma | ( | IfxFft_Fft * | fft,
 |  | const IfxFft_Fft_Config * | config
 | ) |  |

Initialization of DMA.

Parameters
fft | fft Module handle
config | pointing to config strucuture of fft
Returns
None

Definition at line 623 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_initModule().

◆ IfxFft_Fft_isrIntra()

void IfxFft_Fft_isrIntra ( IfxFft_Fft * fft )
Returns
None

Definition at line 589 of file IfxFft_Fft.c.

Variable Documentation

◆ IfxFft_Fft_dummy256

IFX_STATIC uint64 IfxFft_Fft_dummy256[IFXFFT_FFT_MOVE_DIV]

Definition at line 110 of file IfxFft_Fft.c.

Referenced by IfxFft_Fft_unloadOutput().


iLLD_TC26B: IfxFlash.c File Reference

  • Flash
  • Std
Functions
IfxFlash.c File Reference

FLASH basic functionality. More...

#include "IfxFlash.h"
Include dependency graph for IfxFlash.c:

Go to the source code of this file.

Functions

void | IfxFlash_clearCorrectableErrorTracking (IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
void | IfxFlash_clearUncorrectableErrorTracking (IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
void | IfxFlash_disableCorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register. More...
void | IfxFlash_disableUncorrectableErrorTracking (IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register. More...
void | IfxFlash_disableWriteProtection (uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password. More...
uint32 | IfxFlash_getTrackedCorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers. More...
uint32 | IfxFlash_getTrackedUncorrectableErrors (IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers. More...
void | IfxFlash_selectCorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors. More...
void | IfxFlash_selectUncorrectableErrorTracking (IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors. More...

Detailed Description

FLASH basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFlash.c.


iLLD_TC26B: IfxFlash_cfg.c File Reference

  • _Impl
Variables
IfxFlash_cfg.c File Reference

FLASH on-chip implementation data. More...

#include "IfxFlash_cfg.h"
Include dependency graph for IfxFlash_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog [IFXFLASH_DFLASH_NUM_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys [IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog [IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog [IFXFLASH_PFLASH_NUM_LOG_SECTORS]
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys [IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]

Detailed Description

FLASH on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxFlash_cfg.c.

Variable Documentation

◆ IfxFlash_dFlashTableEepLog

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]
Initial value:
= {
{0xAF000000 + 0 * 0x2000, 0xAF000000 + 1 * 0x2000 - 1 },
{0xAF000000 + 1 * 0x2000, 0xAF000000 + 2 * 0x2000 - 1 },
{0xAF000000 + 2 * 0x2000, 0xAF000000 + 3 * 0x2000 - 1 },
{0xAF000000 + 3 * 0x2000, 0xAF000000 + 4 * 0x2000 - 1 },
{0xAF000000 + 4 * 0x2000, 0xAF000000 + 5 * 0x2000 - 1 },
{0xAF000000 + 5 * 0x2000, 0xAF000000 + 6 * 0x2000 - 1 },
{0xAF000000 + 6 * 0x2000, 0xAF000000 + 7 * 0x2000 - 1 },
{0xAF000000 + 7 * 0x2000, 0xAF000000 + 8 * 0x2000 - 1 },
{0xAF000000 + 8 * 0x2000, 0xAF000000 + 9 * 0x2000 - 1 },
{0xAF000000 + 9 * 0x2000, 0xAF000000 + 10 * 0x2000 - 1},
{0xAF000000 + 10 * 0x2000, 0xAF000000 + 11 * 0x2000 - 1},
{0xAF000000 + 11 * 0x2000, 0xAF000000 + 12 * 0x2000 - 1},
}

Definition at line 35 of file IfxFlash_cfg.c.

◆ IfxFlash_dFlashTablePhys

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Initial value:
= {
{IFXFLASH_DFLASH_START, IFXFLASH_DFLASH_END},
}
IFXFLASH_DFLASH_START
#define IFXFLASH_DFLASH_START
Definition: IfxFlash_cfg.h:80
IFXFLASH_DFLASH_END
#define IFXFLASH_DFLASH_END
Definition: IfxFlash_cfg.h:64

Definition at line 50 of file IfxFlash_cfg.c.

◆ IfxFlash_dFlashTableUcbLog

IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
Initial value:
= {
{0xaf100000, 0xaf1003ff},
{0xaf100400, 0xaf1007ff},
{0xaf100800, 0xaf100bff},
{0xaf100c00, 0xaf100fff},
{0xaf101000, 0xaf1013ff},
{0xaf101400, 0xaf1017ff},
{0xaf101800, 0xaf101bff},
{0xaf101c00, 0xaf101fff},
{0xaf102000, 0xaf1023ff},
{0xaf102400, 0xaf1027ff},
{0xaf102800, 0xaf102bff},
{0xaf102c00, 0xaf102fff},
{0xaf103000, 0xaf1033ff},
{0xaf103400, 0xaf1037ff},
{0xaf103800, 0xaf103bff},
{0xaf103c00, 0xaf103fff},
}

Definition at line 54 of file IfxFlash_cfg.c.

◆ IfxFlash_pFlashTableLog

IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]

Definition at line 73 of file IfxFlash_cfg.c.

◆ IfxFlash_pFlashTablePhys

IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Initial value:
= {
{0xa0000000, 0xa007ffff},
{0xa0080000, 0xa00fffff},
{0xa0100000, 0xa017ffff},
{0xa0180000, 0xa01fffff},
{0xa0200000, 0xa027ffff},
}

Definition at line 125 of file IfxFlash_cfg.c.


iLLD_TC26B: IfxGpt12.c File Reference

  • Gpt12
  • Std
Functions
IfxGpt12.c File Reference

GPT12 basic functionality. More...

#include "IfxGpt12.h"
Include dependency graph for IfxGpt12.c:

Go to the source code of this file.

Functions

float32 | IfxGpt12_T2_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer. More...
float32 | IfxGpt12_T3_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer. More...
float32 | IfxGpt12_T4_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer. More...
float32 | IfxGpt12_T5_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer. More...
float32 | IfxGpt12_T6_getFrequency (Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer. More...
void | IfxGpt12_disableModule (Ifx_GPT12 *gpt12)
Disables the module. More...
void | IfxGpt12_enableModule (Ifx_GPT12 *gpt12)
Enables the module. More...
void | IfxGpt12_initTxEudInPin (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input. More...
void | IfxGpt12_initTxEudInPinWithPadLevel (const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver. More...
void | IfxGpt12_initTxInPin (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input. More...
void | IfxGpt12_initTxInPinWithPadLevel (const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver. More...
void | IfxGpt12_resetModule (Ifx_GPT12 *gpt12)
resets GPT12 kernel More...

Detailed Description

GPT12 basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGpt12.c.

Function Documentation

◆ IfxGpt12_initTxEudInPinWithPadLevel()

void IfxGpt12_initTxEudInPinWithPadLevel | ( | const IfxGpt12_TxEud_In * | txEudIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver.

Parameters
txEudIn | the TxEUD_IN Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 285 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_initTxInPinWithPadLevel()

void IfxGpt12_initTxInPinWithPadLevel | ( | const IfxGpt12_TxIn_In * | txIn,
 |  | IfxPort_InputMode | inputMode,
 |  | IfxPort_PadDriver | padDriver
 | ) |  |

Provides functionality for both setting of TXIN pin direction as input and configuring pad driver.

Parameters
txIn | the TxIn Pin which should be configured
inputMode | the pin input mode which should be configured
padDriver | the pad driver mode which should be configured
Returns
None

Definition at line 340 of file IfxGpt12.c.

Referenced by IfxGpt12_IncrEnc_init().


iLLD_TC26B: IfxGpt12_IncrEnc.c File Reference

  • Gpt12
  • IncrEnc
Functions
IfxGpt12_IncrEnc.c File Reference

GPT12 INCRENC details. More...

#include "IfxGpt12_IncrEnc.h"
Include dependency graph for IfxGpt12_IncrEnc.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxGpt12_IncrEnc_updateFromT2 (IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T2.
This function shall be periodically called. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateFromT3 (IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T3.
This function shall be periodically called. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateSpeedFromT2 (IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed. More...
IFX_STATIC void | IfxGpt12_IncrEnc_updateSpeedFromT3 (IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed. More...
float32 | IfxGpt12_IncrEnc_getAbsolutePosition (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_Dir | IfxGpt12_IncrEnc_getDirection (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_Status | IfxGpt12_IncrEnc_getFault (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getOffset (IfxGpt12_IncrEnc *driver)
uint16 | IfxGpt12_IncrEnc_getPeriodPerRotation (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getPosition (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getRawPosition (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getRefreshPeriod (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getResolution (IfxGpt12_IncrEnc *driver)
IfxStdIf_Pos_SensorType | IfxGpt12_IncrEnc_getSensorType (IfxGpt12_IncrEnc *driver)
float32 | IfxGpt12_IncrEnc_getSpeed (IfxGpt12_IncrEnc *driver)
sint32 | IfxGpt12_IncrEnc_getTurn (IfxGpt12_IncrEnc *driver)
boolean | IfxGpt12_IncrEnc_init (IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface. More...
void | IfxGpt12_IncrEnc_initConfig (IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default. More...
void | IfxGpt12_IncrEnc_onZeroIrq (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_reset (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_resetFaults (IfxGpt12_IncrEnc *driver)
void | IfxGpt12_IncrEnc_setOffset (IfxGpt12_IncrEnc *driver, sint32 offset)
void | IfxGpt12_IncrEnc_setRefreshPeriod (IfxGpt12_IncrEnc *driver, float32 updatePeriod)
boolean | IfxGpt12_IncrEnc_stdIfPosInit (IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos". More...
void | IfxGpt12_IncrEnc_update (IfxGpt12_IncrEnc *driver)

Detailed Description

GPT12 INCRENC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGpt12_IncrEnc.c.

Function Documentation

◆ IfxGpt12_IncrEnc_stdIfPosInit()

boolean IfxGpt12_IncrEnc_stdIfPosInit | ( | IfxStdIf_Pos * | stdif,
 |  | IfxGpt12_IncrEnc * | driver
 | ) |  |

Initializes the standard interface "Pos".

Parameters
stdif | Standard interface position object
driver | incremental encoder interface Handle
Returns
TRUE on success else FALSE

Definition at line 361 of file IfxGpt12_IncrEnc.c.

◆ IfxGpt12_IncrEnc_updateFromT2()

IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2 ( IfxGpt12_IncrEnc * driver )

Update internal data when incremental mode is using T2.
This function shall be periodically called.

Parameters
driver driver handle
Returns
None

Definition at line 401 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_IncrEnc_updateFromT3()

IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3 ( IfxGpt12_IncrEnc * driver )

Update internal data when incremental mode is using T3.
This function shall be periodically called.

Parameters
driver driver handle
Returns
None

Definition at line 425 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_init().

◆ IfxGpt12_IncrEnc_updateSpeedFromT2()

IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2 | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | newPosition
 | ) |  |

Updates the speed.

Parameters
driver | driver handle
newPosition | new position
Returns
None

Definition at line 449 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_updateFromT2().

◆ IfxGpt12_IncrEnc_updateSpeedFromT3()

IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3 | ( | IfxGpt12_IncrEnc * | driver,
 |  | sint32 | newPosition
 | ) |  |

Updates the speed.

Parameters
driver | driver handle
newPosition | new position
Returns
None

Definition at line 483 of file IfxGpt12_IncrEnc.c.

Referenced by IfxGpt12_IncrEnc_updateFromT3().


iLLD_TC26B: IfxGtm.c File Reference

  • Gtm
  • Std
Functions
IfxGtm.c File Reference

GTM basic functionality. More...

#include "IfxGtm.h"
#include "Scu/Std/IfxScuWdt.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxGtm.c:

Go to the source code of this file.

Functions

void | IfxGtm_disable (Ifx_GTM *gtm)
Disables the module. More...
void | IfxGtm_enable (Ifx_GTM *gtm)
Enables the module. More...
float32 | IfxGtm_getSysClkFrequency (void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm.c.

Function Documentation

◆ IfxGtm_getSysClkFrequency()

float32 IfxGtm_getSysClkFrequency ( void )

returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK.

Returns
sysFreq

Definition at line 57 of file IfxGtm.c.

Referenced by IfxGtm_Cmu_getModuleFrequency().


iLLD_TC26B: IfxGtm_Atom.c File Reference

  • Gtm
  • Std
Macros | Functions
IfxGtm_Atom.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Atom.h"
#include "IfxGtm_bf.h"
Include dependency graph for IfxGtm_Atom.c:

Go to the source code of this file.

Macros

#define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)
Number of channels per ATOM AGC. More...

Functions

uint32 | IfxGtm_Atom_Agc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
uint32 | IfxGtm_Atom_Agc_buildFeatureForChannel (IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
void | IfxGtm_Atom_Agc_enableChannel (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
void | IfxGtm_Atom_Agc_enableChannelOutput (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
void | IfxGtm_Atom_Agc_enableChannelUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
void | IfxGtm_Atom_Agc_enableChannels (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
void | IfxGtm_Atom_Agc_enableChannelsOutput (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
void | IfxGtm_Atom_Agc_enableChannelsTrigger (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
void | IfxGtm_Atom_Agc_enableChannelsUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
void | IfxGtm_Atom_Agc_enableTimeTrigger (Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger. More...
void | IfxGtm_Atom_Agc_resetChannels (Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels. More...
void | IfxGtm_Atom_Agc_setChannelForceUpdate (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
void | IfxGtm_Atom_Agc_setChannelsForceUpdate (Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
void | IfxGtm_Atom_Agc_setTimeTrigger (Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
void | IfxGtm_Atom_Agc_trigger (Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...
void | IfxGtm_Atom_Ch_clearOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification. More...
void | IfxGtm_Atom_Ch_clearZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification. More...
void | IfxGtm_Atom_Ch_configurePwmMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
float32 | IfxGtm_Atom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz. More...
IfxGtm_Cmu_Clk | IfxGtm_Atom_Ch_getClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source. More...
uint32 | IfxGtm_Atom_Ch_getCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value. More...
volatile uint32 * | IfxGtm_Atom_Ch_getCompareOnePointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer. More...
uint32 | IfxGtm_Atom_Ch_getCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value. More...
volatile uint32 * | IfxGtm_Atom_Ch_getCompareZeroPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer. More...
boolean | IfxGtm_Atom_Ch_getOutputLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level. More...
volatile Ifx_SRC_SRCR * | IfxGtm_Atom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC. More...
volatile uint32 * | IfxGtm_Atom_Ch_getTimerPointer (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer. More...
boolean | IfxGtm_Atom_Ch_isOneNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification. More...
boolean | IfxGtm_Atom_Ch_isZeroNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification. More...
void | IfxGtm_Atom_Ch_raiseInterruptOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1. More...
void | IfxGtm_Atom_Ch_raiseInterruptZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0. More...
void | IfxGtm_Atom_Ch_setClockSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source. More...
void | IfxGtm_Atom_Ch_setCompare (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
void | IfxGtm_Atom_Ch_setCompareOne (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
void | IfxGtm_Atom_Ch_setCompareOneShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
void | IfxGtm_Atom_Ch_setCompareZero (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
void | IfxGtm_Atom_Ch_setCompareZeroShadow (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
void | IfxGtm_Atom_Ch_setCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value. More...
void | IfxGtm_Atom_Ch_setMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode More...
void | IfxGtm_Atom_Ch_setNotification (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
void | IfxGtm_Atom_Ch_setOneShotMode (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
void | IfxGtm_Atom_Ch_setResetSource (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
void | IfxGtm_Atom_Ch_setSignalLevel (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
void | IfxGtm_Atom_Ch_setTriggerOutput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
void | IfxGtm_Atom_Ch_setAruInput (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified. More...
uint32 | IfxGtm_Atom_Ch_getCounterValue (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value. More...
void | IfxGtm_Atom_Ch_setSomcControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel More...
void | IfxGtm_Atom_Ch_setSomcSignalLevelControl (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode. More...
void | IfxGtm_Atom_Ch_setAruReadAddress0 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0 More...
void | IfxGtm_Atom_Ch_setAruReadAddress1 (Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1 More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Atom.c.

Macro Definition Documentation

◆ IFXGTM_ATOM_NUM_AGC_CHANNELS

#define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)

Number of channels per ATOM AGC.

Definition at line 38 of file IfxGtm_Atom.c.

Referenced by IfxGtm_Atom_Agc_buildFeature(), and IfxGtm_Atom_Agc_resetChannels().

Function Documentation

◆ IfxGtm_Atom_Ch_setAruInput()

void IfxGtm_Atom_Ch_setAruInput | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | boolean | enabled
 | ) |  |

enable/disable ARU input for the ATOM channel specified.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
enabled | ARU enable status
Returns
None

Definition at line 504 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress0()

void IfxGtm_Atom_Ch_setAruReadAddress0 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 0

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 0
Returns
None

Definition at line 536 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setAruReadAddress1()

void IfxGtm_Atom_Ch_setAruReadAddress1 | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | uint32 | address
 | ) |  |

set the ARU read address 1

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
address | ARU read address 1
Returns
None

Definition at line 543 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcControl()

void IfxGtm_Atom_Ch_setSomcControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcControl | control
 | ) |  |

sets the SOMC control bits for the specified ATOM channel

Parameters
atom | pointer to ATOM instance
channel | ATOM channel index
control | SOMC control mode enum
Returns
None

Definition at line 520 of file IfxGtm_Atom.c.

◆ IfxGtm_Atom_Ch_setSomcSignalLevelControl()

void IfxGtm_Atom_Ch_setSomcSignalLevelControl | ( | Ifx_GTM_ATOM * | atom,
 |  | IfxGtm_Atom_Ch | channel,
 |  | IfxGtm_Atom_SomcSignalLevelControl | ctrl
 | ) |  |

sets the SL control for SOMC mode.

Parameters
atom | pointer to the ATOM instance
channel | index of ATOM channel
ctrl | SIgnal level control
Returns
None

Definition at line 528 of file IfxGtm_Atom.c.


iLLD_TC26B: IfxGtm_Atom_Pwm.c File Reference

  • Gtm
  • Atom
  • Pwm
Functions
IfxGtm_Atom_Pwm.c File Reference

GTM PWM details. More...

#include "IfxGtm_Atom_Pwm.h"
Include dependency graph for IfxGtm_Atom_Pwm.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Atom_Pwm_init (IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object. More...
void | IfxGtm_Atom_Pwm_initConfig (IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Atom_Pwm_start (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel. More...
void | IfxGtm_Atom_Pwm_stop (IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Atom_Pwm.c.


iLLD_TC26B: IfxGtm_Atom_PwmHl.c File Reference

  • Gtm
  • Atom
  • PwmHl
Functions | Variables
IfxGtm_Atom_PwmHl.c File Reference

GTM PWMHL details. More...

#include "IfxGtm_Atom_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Atom_PwmHl.c:

Go to the source code of this file.

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Atom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateAndShiftOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateEdgeAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateOff (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updatePulseOff (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Atom_PwmHl_updateShiftCenterAligned (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
float32 | IfxGtm_Atom_PwmHl_getDeadtime (IfxGtm_Atom_PwmHl *driver)
Returns the dead time. More...
float32 | IfxGtm_Atom_PwmHl_getMinPulse (IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxGtm_Atom_PwmHl_getMode (IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxGtm_Atom_PwmHl_init (IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. More...
void | IfxGtm_Atom_PwmHl_initConfig (IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxGtm_Atom_PwmHl_setDeadtime (IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxGtm_Atom_PwmHl_setMinPulse (IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxGtm_Atom_PwmHl_setMode (IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxGtm_Atom_PwmHl_setOnTime (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
void | IfxGtm_Atom_PwmHl_setOnTimeAndShift (IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
void | IfxGtm_Atom_PwmHl_setPulse (IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
void | IfxGtm_Atom_PwmHl_setupChannels (IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
boolean | IfxGtm_Atom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Atom_PwmHl.c.

Variable Documentation

◆ IfxGtm_Atom_PwmHl_modes

IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_PwmHl_updateOff, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulseOff},
}
IfxGtm_Atom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Atom_PwmHl.c:397
IfxGtm_Atom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Atom_PwmHl.c:657
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:160
IfxGtm_Atom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Atom_PwmHl.c:465
FALSE
#define FALSE
Definition: Platform_Types.h:90
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:162
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:164
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:161
IfxGtm_Atom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Atom_PwmHl.c:405
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:163
IfxGtm_Atom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Atom_PwmHl.c:541
IfxGtm_Atom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Atom_PwmHl.c:648
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Atom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Atom_PwmHl.c:525

Definition at line 109 of file IfxGtm_Atom_PwmHl.c.

Referenced by IfxGtm_Atom_PwmHl_setMode().


iLLD_TC26B: IfxGtm_Atom_Timer.c File Reference

  • Gtm
  • Atom
  • Timer
Functions
IfxGtm_Atom_Timer.c File Reference

GTM TIMER details. More...

#include "IfxGtm_Atom_Timer.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxGtm_bf.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Atom_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Atom_Timer_acknowledgeTimerIrq (IfxGtm_Atom_Timer *driver)
Returns the timer event. More...
boolean | IfxGtm_Atom_Timer_acknowledgeTriggerIrq (IfxGtm_Atom_Timer *driver)
Returns the trigger event. More...
void | IfxGtm_Atom_Timer_addToChannelMask (IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run. More...
void | IfxGtm_Atom_Timer_applyUpdate (IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers. More...
void | IfxGtm_Atom_Timer_disableUpdate (IfxGtm_Atom_Timer *driver)
Disables the upadte. More...
float32 | IfxGtm_Atom_Timer_getFrequency (IfxGtm_Atom_Timer *driver)
Returns the frequency. More...
float32 | IfxGtm_Atom_Timer_getInputFrequency (IfxGtm_Atom_Timer *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getOffset (IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getPeriod (IfxGtm_Atom_Timer *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxGtm_Atom_Timer_getPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel. More...
float32 | IfxGtm_Atom_Timer_getResolution (IfxGtm_Atom_Timer *driver)
Returns the resolution. More...
Ifx_TimerValue | IfxGtm_Atom_Timer_getTrigger (IfxGtm_Atom_Timer *driver)
Returns the trigger point. More...
volatile uint32 * | IfxGtm_Atom_Timer_getTriggerPointer (IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel. More...
boolean | IfxGtm_Atom_Timer_init (IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object. More...
void | IfxGtm_Atom_Timer_initConfig (IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Atom_Timer_run (IfxGtm_Atom_Timer *driver)
Runs the timer. More...
boolean | IfxGtm_Atom_Timer_setFrequency (IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxGtm_Atom_Timer_setPeriod (IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxGtm_Atom_Timer_setSingleMode (IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxGtm_Atom_Timer_setTrigger (IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxGtm_Atom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer. More...
void | IfxGtm_Atom_Timer_stop (IfxGtm_Atom_Timer *driver)
Stops the timer. More...
void | IfxGtm_Atom_Timer_updateInputFrequency (IfxGtm_Atom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Atom_Timer.c.


iLLD_TC26B: IfxGtm_cfg.c File Reference

  • _Impl
IfxGtm_cfg.c File Reference

GTM on-chip implementation data. More...

#include "IfxGtm_cfg.h"
Include dependency graph for IfxGtm_cfg.c:

Go to the source code of this file.

Detailed Description

GTM on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_cfg.c.


iLLD_TC26B: IfxGtm_Cmu.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Cmu.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Cmu.h"
#include "IfxGtm_Dpll.h"
#include "Scu/Std/IfxScuCcu.h"
#include "Scu/Std/IfxScuWdt.h"
#include "math.h"
#include "IfxGtm_bf.h"
#include "IfxGtm.h"
Include dependency graph for IfxGtm_Cmu.c:

Go to the source code of this file.

Functions

void | IfxGtm_Cmu_enableClocks (Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks. More...
float32 | IfxGtm_Cmu_getClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getFxClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getGclkFrequency (Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz. More...
float32 | IfxGtm_Cmu_getModuleFrequency (Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used. More...
boolean | IfxGtm_Cmu_isClkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status. More...
boolean | IfxGtm_Cmu_isEclkClockEnabled (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status. More...
boolean | IfxGtm_Cmu_isFxClockEnabled (Ifx_GTM *gtm)
Returns the fixed clock enable status. More...
void | IfxGtm_Cmu_selectClkInput (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks() More...
void | IfxGtm_Cmu_setClkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz. More...
void | IfxGtm_Cmu_setEclkFrequency (Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz. More...
void | IfxGtm_Cmu_setGclkFrequency (Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Cmu.c.


iLLD_TC26B: IfxGtm_Dpll.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Dpll.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Dpll.h"
Include dependency graph for IfxGtm_Dpll.c:

Go to the source code of this file.

Functions

float32 IfxGtm_Dpll_getSubIncFrequency (Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Dpll.c.


iLLD_TC26B: IfxGtm_Tbu.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tbu.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tbu.h"
#include "IfxGtm_Cmu.h"
Include dependency graph for IfxGtm_Tbu.c:

Go to the source code of this file.

Functions

float32 IfxGtm_Tbu_getClockFrequency (Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tbu.c.


iLLD_TC26B: IfxGtm_Tim.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tim.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tim.h"
Include dependency graph for IfxGtm_Tim.c:

Go to the source code of this file.

Functions

float32 | IfxGtm_Tim_Ch_getCaptureClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency. More...
IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getCaptureClockSource (Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected. More...
float32 | IfxGtm_Tim_Ch_getFilterClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency. More...
IfxGtm_Cmu_Tim_Filter_Clk | IfxGtm_Tim_Ch_getFilterClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected. More...
float32 | IfxGtm_Tim_Ch_getTimeoutClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency. More...
IfxGtm_Cmu_Clk | IfxGtm_Tim_Ch_getTimeoutClockSource (Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected. More...
void | IfxGtm_Tim_Ch_setChannelNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification. More...
void | IfxGtm_Tim_Ch_setClockSource (Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source. More...
void | IfxGtm_Tim_Ch_setFilterNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification. More...
void | IfxGtm_Tim_Ch_setNotificationMode (Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode. More...
void | IfxGtm_Tim_Ch_setTimeoutNotification (Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification. More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tim.c.


iLLD_TC26B: IfxGtm_Tim_In.c File Reference

  • Gtm
  • Tim
  • In
Functions
IfxGtm_Tim_In.c File Reference

GTM IN details. More...

#include "IfxGtm_Tim_In.h"
#include "IfxGtm_bf.h"
#include "string.h"
Include dependency graph for IfxGtm_Tim_In.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tim_In_init (IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object. More...
void | IfxGtm_Tim_In_initConfig (IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tim_In_onIsr (IfxGtm_Tim_In *driver)
will update the driver state
To be called in the interrupt generated by the IfxGtm_Tim_In driver More...
void | IfxGtm_Tim_In_update (IfxGtm_Tim_In *driver)
Updates the period and duty cycle. More...

Detailed Description

GTM IN details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tim_In.c.


iLLD_TC26B: IfxGtm_Tom.c File Reference

  • Gtm
  • Std
Functions
IfxGtm_Tom.c File Reference

GTM basic functionality. More...

#include "IfxGtm_Tom.h"
#include "IfxGtm_bf.h"
#include "IfxGtm_Cmu.h"
Include dependency graph for IfxGtm_Tom.c:

Go to the source code of this file.

Functions

void | IfxGtm_Tom_Ch_clearOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification. More...
void | IfxGtm_Tom_Ch_clearZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification. More...
float32 | IfxGtm_Tom_Ch_getClockFrequency (Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz. More...
IfxGtm_Tom_Ch_ClkSrc | IfxGtm_Tom_Ch_getClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source. More...
uint32 | IfxGtm_Tom_Ch_getCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value. More...
volatile uint32 * | IfxGtm_Tom_Ch_getCompareOnePointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer. More...
uint32 | IfxGtm_Tom_Ch_getCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value. More...
volatile uint32 * | IfxGtm_Tom_Ch_getCompareZeroPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer. More...
boolean | IfxGtm_Tom_Ch_getOutputLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level. More...
volatile Ifx_SRC_SRCR * | IfxGtm_Tom_Ch_getSrcPointer (Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC. More...
Ifx_GTM_TOM_TGC * | IfxGtm_Tom_Ch_getTgcPointer (Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer. More...
volatile uint32 * | IfxGtm_Tom_Ch_getTimerPointer (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer. More...
boolean | IfxGtm_Tom_Ch_isOneNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification. More...
boolean | IfxGtm_Tom_Ch_isZeroNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification. More...
void | IfxGtm_Tom_Ch_raiseInterruptOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1. More...
void | IfxGtm_Tom_Ch_raiseInterruptZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0. More...
void | IfxGtm_Tom_Ch_setClockSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source. More...
void | IfxGtm_Tom_Ch_setCompare (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values. More...
void | IfxGtm_Tom_Ch_setCompareOne (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value. More...
void | IfxGtm_Tom_Ch_setCompareOneShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value. More...
void | IfxGtm_Tom_Ch_setCompareShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values. More...
void | IfxGtm_Tom_Ch_setCompareZero (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value. More...
void | IfxGtm_Tom_Ch_setCompareZeroShadow (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value. More...
void | IfxGtm_Tom_Ch_setCounterValue (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value. More...
void | IfxGtm_Tom_Ch_setGatedCounter (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only) More...
void | IfxGtm_Tom_Ch_setNotification (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification. More...
void | IfxGtm_Tom_Ch_setOneShotMode (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode. More...
void | IfxGtm_Tom_Ch_setPcm (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only) More...
void | IfxGtm_Tom_Ch_setResetSource (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel. More...
void | IfxGtm_Tom_Ch_setSignalLevel (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level. More...
void | IfxGtm_Tom_Ch_setSpe (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only) More...
void | IfxGtm_Tom_Ch_setTriggerOutput (Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output. More...
uint32 | IfxGtm_Tom_Tgc_buildFeature (uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable. More...
uint32 | IfxGtm_Tom_Tgc_buildFeatureForChannel (IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel. More...
void | IfxGtm_Tom_Tgc_enableChannel (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS) More...
void | IfxGtm_Tom_Tgc_enableChannelOutput (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN) More...
void | IfxGtm_Tom_Tgc_enableChannelUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN) More...
void | IfxGtm_Tom_Tgc_enableChannels (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS) More...
void | IfxGtm_Tom_Tgc_enableChannelsOutput (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN) More...
void | IfxGtm_Tom_Tgc_enableChannelsTrigger (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger. More...
void | IfxGtm_Tom_Tgc_enableChannelsUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN) More...
void | IfxGtm_Tom_Tgc_enableTimeTrigger (Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger. More...
void | IfxGtm_Tom_Tgc_resetChannels (Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels. More...
void | IfxGtm_Tom_Tgc_setChannelForceUpdate (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD) More...
void | IfxGtm_Tom_Tgc_setChannelsForceUpdate (Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD) More...
void | IfxGtm_Tom_Tgc_setTimeTrigger (Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value. More...
void | IfxGtm_Tom_Tgc_trigger (Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG) More...

Detailed Description

GTM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tom.c.


iLLD_TC26B: IfxGtm_Tom_Pwm.c File Reference

  • Gtm
  • Tom
  • Pwm
Functions
IfxGtm_Tom_Pwm.c File Reference

GTM PWM details. More...

#include "IfxGtm_Tom_Pwm.h"
Include dependency graph for IfxGtm_Tom_Pwm.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tom_Pwm_init (IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object. More...
void | IfxGtm_Tom_Pwm_initConfig (IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tom_Pwm_start (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel More...
void | IfxGtm_Tom_Pwm_stop (IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel. More...

Detailed Description

GTM PWM details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tom_Pwm.c.

Function Documentation

◆ IfxGtm_Tom_Pwm_start()

void IfxGtm_Tom_Pwm_start | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

starts the PWM generation from the configured channel

Parameters
driver | handle for the PWM device
immediate | immediate start or not
Returns
None

Definition at line 132 of file IfxGtm_Tom_Pwm.c.

◆ IfxGtm_Tom_Pwm_stop()

void IfxGtm_Tom_Pwm_stop | ( | IfxGtm_Tom_Pwm_Driver * | driver,
 |  | boolean | immediate
 | ) |  |

Stops the PWM generation from the configured channel.

Parameters
driver | handle for the PWM device
immediate | immediate start or not.
Returns
None

Definition at line 143 of file IfxGtm_Tom_Pwm.c.


iLLD_TC26B: IfxGtm_Tom_PwmHl.c File Reference

  • Gtm
  • Tom
  • PwmHl
Functions | Variables
IfxGtm_Tom_PwmHl.c File Reference

GTM PWMHL details. More...

#include "IfxGtm_Tom_PwmHl.h"
#include "_Utilities/Ifx_Assert.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Tom_PwmHl.c:

Go to the source code of this file.

Functions

IFX_INLINE Ifx_ActiveState | IfxGtm_Tom_PwmHl_invertActiveState (Ifx_ActiveState activeState)
Inverts the active state. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateAndShiftOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateEdgeAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned) More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateOff (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updatePulseOff (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF. More...
IFX_STATIC void | IfxGtm_Tom_PwmHl_updateShiftCenterAligned (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned. More...
float32 | IfxGtm_Tom_PwmHl_getDeadtime (IfxGtm_Tom_PwmHl *driver)
Returns the dead time. More...
float32 | IfxGtm_Tom_PwmHl_getMinPulse (IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse. More...
Ifx_Pwm_Mode | IfxGtm_Tom_PwmHl_getMode (IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode. More...
boolean | IfxGtm_Tom_PwmHl_init (IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function. Note: all PWM channels must use the same TGC Note: the current implementation must use the same TGC for the timer and PWM channels. More...
void | IfxGtm_Tom_PwmHl_initConfig (IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default. More...
boolean | IfxGtm_Tom_PwmHl_setDeadtime (IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time. More...
boolean | IfxGtm_Tom_PwmHl_setMinPulse (IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse. More...
boolean | IfxGtm_Tom_PwmHl_setMode (IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate() More...
void | IfxGtm_Tom_PwmHl_setOnTime (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time. More...
void | IfxGtm_Tom_PwmHl_setOnTimeAndShift (IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift. More...
void | IfxGtm_Tom_PwmHl_setPulse (IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent. More...
void | IfxGtm_Tom_PwmHl_setupChannels (IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels. More...
boolean | IfxGtm_Tom_PwmHl_stdIfPwmHlInit (IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm. More...

Variables

IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes [Ifx_Pwm_Mode_off+1]

Detailed Description

GTM PWMHL details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tom_PwmHl.c.

Variable Documentation

◆ IfxGtm_Tom_PwmHl_modes

IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Initial value:
= {
{Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
{Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_PwmHl_updateOff, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulseOff}
}
IfxGtm_Tom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Tom_PwmHl.c:570
IfxGtm_Tom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Tom_PwmHl.c:433
IfxGtm_Tom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Tom_PwmHl.c:424
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:160
FALSE
#define FALSE
Definition: Platform_Types.h:90
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:162
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:164
IfxGtm_Tom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Tom_PwmHl.c:677
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:161
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:163
IfxGtm_Tom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Tom_PwmHl.c:685
IfxGtm_Tom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Tom_PwmHl.c:493
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Tom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Tom_PwmHl.c:553

Definition at line 109 of file IfxGtm_Tom_PwmHl.c.

Referenced by IfxGtm_Tom_PwmHl_setMode().


iLLD_TC26B: IfxGtm_Tom_Timer.c File Reference

  • Gtm
  • Tom
  • Timer
Functions
IfxGtm_Tom_Timer.c File Reference

GTM TIMER details. More...

#include "IfxGtm_Tom_Timer.h"
#include "_Utilities/Ifx_Assert.h"
#include "IfxGtm_bf.h"
#include "stddef.h"
#include "string.h"
Include dependency graph for IfxGtm_Tom_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxGtm_Tom_Timer_acknowledgeTimerIrq (IfxGtm_Tom_Timer *driver)
Returns the timer event. More...
boolean | IfxGtm_Tom_Timer_acknowledgeTriggerIrq (IfxGtm_Tom_Timer *driver)
Returns the trigger event. More...
void | IfxGtm_Tom_Timer_addToChannelMask (IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run. More...
void | IfxGtm_Tom_Timer_applyUpdate (IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers. More...
void | IfxGtm_Tom_Timer_disableUpdate (IfxGtm_Tom_Timer *driver)
Disables the upadte. More...
float32 | IfxGtm_Tom_Timer_getFrequency (IfxGtm_Tom_Timer *driver)
Returns the frequency. More...
float32 | IfxGtm_Tom_Timer_getInputFrequency (IfxGtm_Tom_Timer *driver)
Returns the Input frequncy. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getOffset (IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getPeriod (IfxGtm_Tom_Timer *driver)
Returns the period of the timer. More...
volatile uint32 * | IfxGtm_Tom_Timer_getPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel. More...
float32 | IfxGtm_Tom_Timer_getResolution (IfxGtm_Tom_Timer *driver)
Returns the resolution. More...
Ifx_TimerValue | IfxGtm_Tom_Timer_getTrigger (IfxGtm_Tom_Timer *driver)
Returns the trigger point. More...
volatile uint32 * | IfxGtm_Tom_Timer_getTriggerPointer (IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel. More...
boolean | IfxGtm_Tom_Timer_init (IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object. More...
void | IfxGtm_Tom_Timer_initConfig (IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default. More...
void | IfxGtm_Tom_Timer_run (IfxGtm_Tom_Timer *driver)
Runs the timer. More...
boolean | IfxGtm_Tom_Timer_setFrequency (IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency. More...
boolean | IfxGtm_Tom_Timer_setPeriod (IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer. More...
void | IfxGtm_Tom_Timer_setSingleMode (IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer. More...
void | IfxGtm_Tom_Timer_setTrigger (IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger. More...
boolean | IfxGtm_Tom_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer. More...
void | IfxGtm_Tom_Timer_stop (IfxGtm_Tom_Timer *driver)
Stops the timer. More...
void | IfxGtm_Tom_Timer_updateInputFrequency (IfxGtm_Tom_Timer *driver)
Updates the input frequency. More...

Detailed Description

GTM TIMER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Tom_Timer.c.


iLLD_TC26B: IfxGtm_Trig.c File Reference

  • Gtm
  • Trig
Data Structures | Functions | Variables
IfxGtm_Trig.c File Reference

GTM TRIG details. More...

#include "IfxGtm_Trig.h"
#include "_Utilities/Ifx_Assert.h"
#include "Cpu/Std/IfxCpu_Intrinsics.h"
Include dependency graph for IfxGtm_Trig.c:

Go to the source code of this file.

Data Structures

struct | IfxGtm_Trig_Channel
struct | IfxGtm_Trig_Source
struct | IfxGtm_Trig_Trigger
struct | IfxGtm_Trig_AdcTrig_Table

Functions

boolean | IfxGtm_Trig_fromDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
void | IfxGtm_Trig_toDsadc (Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
boolean | IfxGtm_Trig_toVadc (Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
boolean | IfxGtm_Trig_toSent (Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)

Variables

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table
Trigger table for SENT triggers. More...

Detailed Description

GTM TRIG details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxGtm_Trig.c.

Variable Documentation

◆ IfxGtm_Trig_AdcTrig_tableAdc0_1_2

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2
Initial value:
= {
.trigger = {
{.source = {
{.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}},
{.source = {
{.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}},
}}
}
}

Definition at line 77 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toSent(), and IfxGtm_Trig_toVadc().

◆ IfxGtm_Trig_AdcTrig_tableAdc3_4

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4
Initial value:
= {
.trigger = {
{.source = {
{.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}},
{.source = {
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}},
}}
}
}

Definition at line 102 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toSent(), and IfxGtm_Trig_toVadc().

◆ IfxGtm_Trig_SentTrig_table

IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table
Initial value:
= {
.trigger = {
{.source = {
{.channel = { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}},
{.source = {
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
{.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}},
}}
}
}

Trigger table for SENT triggers.

Definition at line 130 of file IfxGtm_Trig.c.

Referenced by IfxGtm_Trig_toSent().


iLLD_TC26B: IfxHssl.c File Reference

  • Hssl
  • Std
Functions
IfxHssl.c File Reference

HSSL basic functionality. More...

#include "IfxHssl.h"
Include dependency graph for IfxHssl.c:

Go to the source code of this file.

Functions

void | IfxHssl_disableHsctModule (Ifx_HSCT *hsct)
Disables hsct module. More...
void | IfxHssl_disableHsslModule (Ifx_HSSL *hssl)
DIsables the hssl module. More...
void | IfxHssl_enableHsctModule (Ifx_HSCT *hsct)
Enables hsct module. More...
void | IfxHssl_enableHsslModule (Ifx_HSSL *hssl)
Enables the hssl module. More...
Ifx_HSCT * | IfxHssl_getHsctAddress (IfxHssl_hsctIndex hsct)
IfxHssl_hsctIndex | IfxHssl_getHsctIndex (Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsctSrcPointer (Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT. More...
Ifx_HSSL * | IfxHssl_getHsslAddress (IfxHssl_hsslIndex hssl)
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslCOKSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslERRSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslEXISrcPointer (Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt. More...
IfxHssl_hsslIndex | IfxHssl_getHsslIndex (Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslRDISrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel. More...
volatile Ifx_SRC_SRCR * | IfxHssl_getHsslTRGSrcPointer (Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel. More...
void | IfxHssl_resetHsctKernel (Ifx_HSCT *hsct)
resets HSCT kernel More...
void | IfxHssl_resetHsslKernel (Ifx_HSSL *hssl)
resets the HSSL kernel More...

Detailed Description

HSSL basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxHssl.c.


iLLD_TC26B: IfxHssl_cfg.c File Reference

  • _Impl
Variables
IfxHssl_cfg.c File Reference

HSSL on-chip implementation data. More...

#include "IfxHssl_cfg.h"
Include dependency graph for IfxHssl_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap [IFXHSSL_NUM_MODULES]
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap [IFXHSSL_NUM_MODULES]

Detailed Description

HSSL on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxHssl_cfg.c.

Variable Documentation

◆ IfxHssl_cfg_hsctIndexMap

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Initial value:
= {
{&MODULE_HSCT, (uint32)IfxHssl_hsctIndex_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:66

Definition at line 35 of file IfxHssl_cfg.c.

Referenced by IfxHssl_getHsctAddress(), and IfxHssl_getHsctIndex().

◆ IfxHssl_cfg_hsslIndexMap

IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Initial value:
= {
{&MODULE_HSSL, (uint32)IfxHssl_hsslIndex_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:74

Definition at line 39 of file IfxHssl_cfg.c.

Referenced by IfxHssl_getHsslAddress(), and IfxHssl_getHsslIndex().


iLLD_TC26B: IfxHssl_Hssl.c File Reference

  • Hssl
  • Hssl
Functions
IfxHssl_Hssl.c File Reference

HSSL HSSL details. More...

#include "IfxHssl_Hssl.h"
Include dependency graph for IfxHssl_Hssl.c:

Go to the source code of this file.

Functions

void | IfxHssl_Hssl_checkErrors (IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure More...
void | IfxHssl_Hssl_clearErrorFlags (IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure More...
void | IfxHssl_Hssl_delay (IfxHssl_Hsct *hsct)
a simple software delay More...
void | IfxHssl_Hssl_initChannel (IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel. More...
void | IfxHssl_Hssl_initChannelConfig (IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values. More...
void | IfxHssl_Hssl_initHsctModule (IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module. More...
void | IfxHssl_Hssl_initHsctModuleConfig (IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values. More...
void | IfxHssl_Hssl_initHsslModule (IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module. More...
void | IfxHssl_Hssl_initHsslModuleConfig (IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values. More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_prepareStream (IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming. More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_read (IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request. More...
void | IfxHssl_Hssl_sendControlCommand (IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_singleFrameRequest (IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id) More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_waitAcknowledge (IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_write (IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address More...
IfxHssl_Hssl_Status | IfxHssl_Hssl_writeStream (IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and between devices. NOTE: This function should be called only for IfxHssl_ChannelId_2 More...

Detailed Description

HSSL HSSL details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxHssl_Hssl.c.


iLLD_TC26B: IfxI2c.c File Reference

  • I2c
  • Std
Functions
IfxI2c.c File Reference

I2C basic functionality. More...

#include "IfxI2c.h"
Include dependency graph for IfxI2c.c:

Go to the source code of this file.

Functions

void | IfxI2c_configureAsMaster (Ifx_I2C *i2c)
Configures the Module as Master. More...
void | IfxI2c_disableModule (Ifx_I2C *i2c)
Disables the I2c Module. More...
void | IfxI2c_enableBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt. More...
void | IfxI2c_enableErrorInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt. More...
void | IfxI2c_enableLastBurstDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt More...
void | IfxI2c_enableLastSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt More...
void | IfxI2c_enableModule (Ifx_I2C *i2c)
Enables the I2c Module. More...
void | IfxI2c_enableProtocolInterrupt (void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt. More...
void | IfxI2c_enableSingleDataTransferInterrupt (Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt More...
Ifx_I2C * | IfxI2c_getAddress (IfxI2c_Index i2c)
float32 | IfxI2c_getBaudrate (Ifx_I2C *i2c)
Returns the real Baudrate. More...
IfxI2c_Index | IfxI2c_getIndex (Ifx_I2C *i2c)
API to get the resource index of the I2C specified. More...
void | IfxI2c_initSclSdaPin (const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
void | IfxI2c_releaseBus (Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus. More...
void | IfxI2c_resetFifo (Ifx_I2C *i2c)
void | IfxI2c_resetModule (Ifx_I2C *i2c)
resets the I2c kernel More...
void | IfxI2c_setBaudrate (Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate. More...

Detailed Description

I2C basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxI2c.c.


iLLD_TC26B: IfxI2c_cfg.c File Reference

  • _Impl
Variables
IfxI2c_cfg.c File Reference

I2C on-chip implementation data. More...

#include "IfxI2c_cfg.h"
Include dependency graph for IfxI2c_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap [IFXI2C_NUM_MODULES]

Detailed Description

I2C on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxI2c_cfg.c.

Variable Documentation

◆ IfxI2c_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Initial value:
= {
{&MODULE_I2C0, (uint32)IfxI2c_Index_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:61

Definition at line 35 of file IfxI2c_cfg.c.

Referenced by IfxI2c_getAddress(), and IfxI2c_getIndex().


iLLD_TC26B: IfxI2c_I2c.c File Reference

  • I2c
  • I2c
Functions
IfxI2c_I2c.c File Reference

I2C I2C details. More...

#include "IfxI2c_I2c.h"
Include dependency graph for IfxI2c_I2c.c:

Go to the source code of this file.

Functions

void | IfxI2c_I2c_initConfig (IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values. More...
void | IfxI2c_I2c_initDevice (IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler. More...
void | IfxI2c_I2c_initDeviceConfig (IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values. More...
void | IfxI2c_I2c_initModule (IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module. More...
IfxI2c_I2c_Status | IfxI2c_I2c_read (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device More...
IfxI2c_I2c_Status | IfxI2c_I2c_write (IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device More...

Detailed Description

I2C I2C details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxI2c_I2c.c.


iLLD_TC26B: IfxIom.c File Reference

  • Iom
  • Std
Functions
IfxIom.c File Reference

IOM basic functionality. More...

#include "IfxIom.h"
#include "Scu/Std/IfxScuCcu.h"
Include dependency graph for IfxIom.c:

Go to the source code of this file.

Functions

float32 | IfxIom_getFrequency (Ifx_IOM *iom)
Return the frequency used for the filter and timers clock. More...
void | IfxIom_resetModule (Ifx_IOM *iom)
Reset the IOM module. More...

Detailed Description

IOM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxIom.c.


iLLD_TC26B: IfxIom_Driver.c File Reference

  • Iom
  • Driver
Macros | Functions
IfxIom_Driver.c File Reference

IOM DRIVER details. More...

#include "IfxIom_Driver.h"
#include "IfxIom_bf.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxIom_Driver.c:

Go to the source code of this file.

Macros

#define | IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))
#define | IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))
#define | IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput) ((refInput >> 0) & 0xFF)
#define | IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput) ((monInput >> 0) & 0xFF)

Functions

void | IfxIom_Driver_clearAllGlitch (IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags. More...
void | IfxIom_Driver_clearHistory (IfxIom_Driver *driver)
Clear the IOM event history. More...
void | IfxIom_Driver_clearLamMonGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag. More...
void | IfxIom_Driver_clearLamRefGlitch (IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag. More...
uint32 | IfxIom_Driver_disableEvents (IfxIom_Driver *driver)
Disable all event generation. More...
void | IfxIom_Driver_disableLamEvent (IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM. More...
void | IfxIom_Driver_enableLamEvent (IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM. More...
void | IfxIom_Driver_getHistory (IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ... More...
boolean | IfxIom_Driver_init (IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam() More...
void | IfxIom_Driver_initConfig (IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration. More...
boolean | IfxIom_Driver_initLam (IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel. More...
void | IfxIom_Driver_initLamConfig (IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration. More...
void | IfxIom_Driver_isLamMonGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags. More...
void | IfxIom_Driver_isLamRefGlitch (IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags. More...
void | IfxIom_Driver_restoreEvents (IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask. More...

Detailed Description

IOM DRIVER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxIom_Driver.c.

Macro Definition Documentation

◆ IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX

#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX ( monInput ) ((monInput >> 0) & 0xFF)

Definition at line 43 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL

#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL ( monInput ) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))

Definition at line 39 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX

#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX ( refInput ) ((refInput >> 0) & 0xFF)

Definition at line 41 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().

◆ IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL

#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL ( refInput ) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))

Definition at line 37 of file IfxIom_Driver.c.

Referenced by IfxIom_Driver_initLam().


iLLD_TC26B: IfxLldVersion.h File Reference

Macros
IfxLldVersion.h File Reference

Go to the source code of this file.

Macros

#define | IFX_LLD_VERSION_GENERATION 1
Indicates the driver generation. More...
#define | IFX_LLD_VERSION_MAJOR 0
Informs about changes which could lead to incompatibilities. More...
#define | IFX_LLD_VERSION_MAJOR_UPDATE 1
Informs about a release for a new derivative without further API changes. More...
#define | IFX_LLD_VERSION_MINOR 11
Informs about new additions to the library. More...
#define | IFX_LLD_VERSION_REVISION 0
Informs about patches and/or documentation changes. More...

Macro Definition Documentation

◆ IFX_LLD_VERSION_GENERATION

#define IFX_LLD_VERSION_GENERATION 1

Indicates the driver generation.

Definition at line 4 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MAJOR

#define IFX_LLD_VERSION_MAJOR 0

Informs about changes which could lead to incompatibilities.

Definition at line 5 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MAJOR_UPDATE

#define IFX_LLD_VERSION_MAJOR_UPDATE 1

Informs about a release for a new derivative without further API changes.

Definition at line 6 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_MINOR

#define IFX_LLD_VERSION_MINOR 11

Informs about new additions to the library.

Definition at line 7 of file IfxLldVersion.h.

◆ IFX_LLD_VERSION_REVISION

#define IFX_LLD_VERSION_REVISION 0

Informs about patches and/or documentation changes.

Definition at line 8 of file IfxLldVersion.h.


iLLD_TC26B: IfxMsc.c File Reference

  • Msc
  • Std
Functions
IfxMsc.c File Reference

MSC basic functionality. More...

#include "IfxMsc.h"
Include dependency graph for IfxMsc.c:

Go to the source code of this file.

Functions

void | IfxMsc_clearDataFrameInterruptFlag (Ifx_MSC *msc)
clear data frame interrupt flag More...
void | IfxMsc_clearReset (Ifx_MSC *msc)
Clear reset bit of MSC kernel. More...
void | IfxMsc_disableModule (Ifx_MSC *msc)
Disable MSC kernel. More...
uint32 | IfxMsc_downstreamAbraBaudCalculator (uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled. More...
uint64 | IfxMsc_downstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream. More...
uint32 | IfxMsc_downstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream. More...
void | IfxMsc_enableModule (Ifx_MSC *msc)
Enable MSC kernel. More...
boolean | IfxMsc_getActiveDataFrameStatus (Ifx_MSC *msc)
get the status of the active data frame More...
Ifx_MSC * | IfxMsc_getAddress (IfxMsc_Index msc)
boolean | IfxMsc_getDataFrameInterruptFlag (Ifx_MSC *msc)
get the status of the data frame interrupt flag More...
IfxMsc_Index | IfxMsc_getIndex (Ifx_MSC *msc)
API to get the resource index of the MSC specified. More...
void | IfxMsc_resetModule (Ifx_MSC *msc)
Reset MSC kernel. More...
uint64 | IfxMsc_upstreamFractionalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional. More...
uint32 | IfxMsc_upstreamNormalBaudCalculator (Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal. More...

Detailed Description

MSC basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMsc.c.

Function Documentation

◆ IfxMsc_clearDataFrameInterruptFlag()

void IfxMsc_clearDataFrameInterruptFlag ( Ifx_MSC * msc )

clear data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
None

Definition at line 35 of file IfxMsc.c.

Referenced by IfxMsc_Msc_clearDataFrameInterrupt().

◆ IfxMsc_downstreamFractionalBaudCalculator()

uint64 IfxMsc_downstreamFractionalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is fractional for downstream.

Parameters
msc | pointer to the base of MSC registers
baud | Required baud rate
Returns
Step Value

Definition at line 80 of file IfxMsc.c.

◆ IfxMsc_downstreamNormalBaudCalculator()

uint32 IfxMsc_downstreamNormalBaudCalculator | ( | Ifx_MSC * | msc,
 |  | uint32 | baud
 | ) |  |

Get the step value for the supplied baud rate when divider mode is normal for downstream.

Parameters
msc | Select DataType Ref
baud | Required baud rate
Returns
Step value

Definition at line 93 of file IfxMsc.c.

◆ IfxMsc_getActiveDataFrameStatus()

boolean IfxMsc_getActiveDataFrameStatus ( Ifx_MSC * msc )

get the status of the active data frame

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 115 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getActiveDataFrameStatus().

◆ IfxMsc_getDataFrameInterruptFlag()

boolean IfxMsc_getDataFrameInterruptFlag ( Ifx_MSC * msc )

get the status of the data frame interrupt flag

Parameters
msc pointer to the base of MSC registers
Returns
Status TRUE or FALSE

Definition at line 138 of file IfxMsc.c.

Referenced by IfxMsc_Msc_getDataFrameInterruptStatus().


iLLD_TC26B: IfxMsc_cfg.c File Reference

  • _Impl
Variables
IfxMsc_cfg.c File Reference

MSC on-chip implementation data. More...

#include "IfxMsc_cfg.h"
Include dependency graph for IfxMsc_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap [IFXMSC_NUM_MODULES]

Detailed Description

MSC on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMsc_cfg.c.

Variable Documentation

◆ IfxMsc_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Initial value:
= {
{&MODULE_MSC0, IfxMsc_Index_0},
{&MODULE_MSC1, IfxMsc_Index_1}
}
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:63
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:64

Definition at line 35 of file IfxMsc_cfg.c.

Referenced by IfxMsc_getAddress(), and IfxMsc_getIndex().


iLLD_TC26B: IfxMsc_Msc.c File Reference

  • Msc
  • Msc
Functions
IfxMsc_Msc.c File Reference

MSC MSC details. More...

#include "IfxMsc_Msc.h"
Include dependency graph for IfxMsc_Msc.c:

Go to the source code of this file.

Functions

void | IfxMsc_Msc_deInitModule (IfxMsc_Msc *msc)
de-initialize MSC module More...
IfxMsc_Target | IfxMsc_Msc_getTarget (IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase More...
void | IfxMsc_Msc_initModule (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module More...
void | IfxMsc_Msc_initModuleConfig (IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration More...
void | IfxMsc_Msc_initializeAbra (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block More...
void | IfxMsc_Msc_initializeDataExtension (IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation More...
uint32 | IfxMsc_Msc_receiveData (IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data More...
void | IfxMsc_Msc_sendCommand (IfxMsc_Msc *msc, uint32 command)
send downstream command More...
void | IfxMsc_Msc_sendData (IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low More...
void | IfxMsc_Msc_sendDataExtension (IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit) More...
void | IfxMsc_Msc_sendDataHigh (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
void | IfxMsc_Msc_sendDataLow (IfxMsc_Msc *msc, uint16 data)
send high downstream data More...
void | IfxMsc_Msc_setCommandTarget (IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target More...
void | IfxMsc_Msc_setDataTarget (IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase More...

Detailed Description

MSC MSC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMsc_Msc.c.


iLLD_TC26B: IfxMtu.c File Reference

  • Mtu
  • Std
Functions
IfxMtu.c File Reference

MTU basic functionality. More...

#include "IfxMtu.h"
Include dependency graph for IfxMtu.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxMtu_waitForMbistDone (uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
API to wait for requested tower depth. More...
void | IfxMtu_clearErrorTracking (IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
void | IfxMtu_clearSram (IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end. More...
void | IfxMtu_clearSramContinue (IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function should be called with safety endinit bit cleared. More...
void | IfxMtu_clearSramStart (IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared. More...
void | IfxMtu_enableErrorTracking (IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors. More...
uint32 | IfxMtu_getSystemAddress (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block) More...
uint8 | IfxMtu_getTrackedSramAddresses (IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers. CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005). More...
void | IfxMtu_readSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)
uint8 | IfxMtu_runNonDestructiveInversionTest (IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times. Test Steps: More...
void | IfxMtu_writeSramAddress (IfxMtu_MbistSel mbistSel, uint16 sramAddress)

Detailed Description

MTU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMtu.c.


iLLD_TC26B: IfxMtu_cfg.c File Reference

  • _Impl
Variables
IfxMtu_cfg.c File Reference

Mtu on-chip implementation data. More...

#include "IfxMtu_cfg.h"
#include "Mtu/Std/IfxMtu.h"
Include dependency graph for IfxMtu_cfg.c:

Go to the source code of this file.

Variables

const IfxMtu_SramItem IfxMtu_sramTable [IFXMTU_NUM_MBIST_TABLE_ITEMS]

Detailed Description

Mtu on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMtu_cfg.c.

Variable Documentation

◆ IfxMtu_sramTable

const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]

Definition at line 36 of file IfxMtu_cfg.c.

Referenced by IfxMtu_clearSram(), IfxMtu_clearSramStart(), IfxMtu_runNonDestructiveInversionTest(), and IfxMtu_writeSramAddress().


iLLD_TC26B: IfxMultican.c File Reference

  • Multican
  • Std
Functions
IfxMultican.c File Reference

MULTICAN basic functionality. More...

#include "IfxMultican.h"
Include dependency graph for IfxMultican.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxMultican_MsgObj_doReadLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Do actual long frame reading from the message object. More...
IFX_STATIC void | IfxMultican_MsgObj_doReadMessage (Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Do actual message reading from the message object. More...
boolean | IfxMultican_MsgObj_cancelSend (Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been started. More...
void | IfxMultican_MsgObj_clearStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object. More...
void | IfxMultican_MsgObj_deinit (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object
Append the message object to the end of idle list and reset message object registers. More...
IfxMultican_MsgObjId | IfxMultican_MsgObj_getPendingId (Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group. More...
IfxMultican_MsgObjStat | IfxMultican_MsgObj_getStatus (Ifx_CAN_MO *hwObj)
Get the message object status. More...
boolean | IfxMultican_MsgObj_getStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object. More...
IfxMultican_Status | IfxMultican_MsgObj_readLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame. More...
IfxMultican_Status | IfxMultican_MsgObj_readMessage (Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IfxMultican_Status | IfxMultican_MsgObj_sendLongFrame (Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message. More...
IfxMultican_Status | IfxMultican_MsgObj_sendMessage (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
IfxMultican_Status | IfxMultican_MsgObj_writeTxfifo (Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message. More...
void | IfxMultican_MsgObj_setFilter (Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter. More...
void | IfxMultican_MsgObj_setStatusFlag (Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object. More...
void | IfxMultican_Node_deinit (Ifx_CAN_N *hwNode)
Reset the CAN node. More...
boolean | IfxMultican_Node_initRxPin (Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin. More...
boolean | IfxMultican_Node_initTxPin (Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin. More...
IfxMultican_Status | IfxMultican_Node_recoverBusOff (Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off. More...
void | IfxMultican_Node_setBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register. More...
void | IfxMultican_Node_setFastBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register. More...
void | IfxMultican_Node_setNominalBitTiming (Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register. More...
void | IfxMultican_calcTimingFromBTR (float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing. More...
void | IfxMultican_deinit (Ifx_CAN *mcan)
Reset the CAN module
Reset and disable the CAN module, inclusive message object and node registers. More...
volatile Ifx_SRC_SRCR * | IfxMultican_getSrcPointer (Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register. More...
void | IfxMultican_resetModule (Ifx_CAN *can)
resets Multican kernel More...
void | IfxMultican_setListCommand (Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel. More...
IfxMultican_Index | IfxMultican_getIndex (Ifx_CAN *multican)
API to get the resource index of the CAN specified. More...
Ifx_CAN * | IfxMultican_getAddress (IfxMultican_Index multican)

Detailed Description

MULTICAN basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMultican.c.

Function Documentation

◆ IfxMultican_MsgObj_doReadLongFrame()

IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame | ( | Ifx_CAN * | mcan,
 |  | IfxMultican_MsgObjId | msgObjId,
 |  | IfxMultican_Message * | msg,
 |  | uint32 * | data
 | ) |  |

Do actual long frame reading from the message object.

Parameters
mcan | Specifies the CAN module
msgObjId | Specifies the message object index. Range = [0, IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
msg | This parameter is filled in by the function with the received message. Also when reading is not successful.
data | Pointer to data (in words)
Returns
None

Definition at line 104 of file IfxMultican.c.

Referenced by IfxMultican_MsgObj_readLongFrame().

◆ IfxMultican_MsgObj_doReadMessage()

IFX_STATIC void IfxMultican_MsgObj_doReadMessage | ( | Ifx_CAN_MO * | hwObj,
 |  | IfxMultican_Message * | msg
 | ) |  |

Do actual message reading from the message object.

Parameters
hwObj | Pointer to CAN message object registers
msg | This parameter is filled in by the function with the received message. Also when reading is not successful.
Returns
None

Definition at line 180 of file IfxMultican.c.

Referenced by IfxMultican_MsgObj_readMessage().


iLLD_TC26B: IfxMultican_Can.c File Reference

  • Multican
  • Can
Functions
IfxMultican_Can.c File Reference

MULTICAN CAN details. More...

#include "IfxMultican_Can.h"
Include dependency graph for IfxMultican_Can.c:

Go to the source code of this file.

Functions

void | IfxMultican_Can_MsgObj_getConfig (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration. More...
IfxMultican_Status | IfxMultican_Can_MsgObj_init (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object. More...
void | IfxMultican_Can_MsgObj_initConfig (IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters. More...
boolean | IfxMultican_Can_MsgObj_isRxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object. More...
boolean | IfxMultican_Can_MsgObj_isTransmitRequested (IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object. More...
boolean | IfxMultican_Can_MsgObj_isTxPending (IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object. More...
IfxMultican_Status | IfxMultican_Can_MsgObj_readMessage (IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message. More...
IfxMultican_Status | IfxMultican_Can_MsgObj_sendMessage (IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message. More...
void | IfxMultican_Can_Node_getConfig (IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration. More...
IfxMultican_Status | IfxMultican_Can_Node_init (IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node. More...
void | IfxMultican_Can_Node_initConfig (IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration. More...
void | IfxMultican_Can_Node_sendToBusOff (IfxMultican_Can_Node *node)
Sends the CAN node into bus off. More...
void | IfxMultican_Can_getConfig (IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration. More...
float32 | IfxMultican_Can_getModuleFrequency (IfxMultican_Can *mcan)
Get the module frequency. More...
IfxMultican_Status | IfxMultican_Can_initModule (IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module
The following configuration is used:
. More...
void | IfxMultican_Can_initModuleConfig (IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration. More...

Detailed Description

MULTICAN CAN details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMultican_Can.c.


iLLD_TC26B: IfxMultican_cfg.c File Reference

  • _Impl
Variables
IfxMultican_cfg.c File Reference

MULTICAN on-chip implementation data. More...

#include "IfxMultican_cfg.h"
Include dependency graph for IfxMultican_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap [IFXMULTICAN_NUM_MODULES]

Detailed Description

MULTICAN on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxMultican_cfg.c.

Variable Documentation

◆ IfxMultican_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]
Initial value:
= {
{&MODULE_CAN, (uint32)IfxMultican_Index_0}
}
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMultican_Index_0
MULTICAN index 0.
Definition: IfxMultican_cfg.h:75

Definition at line 35 of file IfxMultican_cfg.c.

Referenced by IfxMultican_getAddress(), and IfxMultican_getIndex().


iLLD_TC26B: IfxPort.c File Reference

  • Port
  • Std
Functions
IfxPort.c File Reference

PORT basic functionality. More...

#include "IfxPort.h"
Include dependency graph for IfxPort.c:

Go to the source code of this file.

Functions

boolean | IfxPort_disableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality. More...
boolean | IfxPort_enableEmergencyStop (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality. More...
Ifx_P * | IfxPort_getAddress (IfxPort_Index port)
Returns the module address of the selected Port module. More...
IfxPort_Index | IfxPort_getIndex (Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c) More...
void | IfxPort_resetESR (Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality. More...
void | IfxPort_setESR (Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality. More...
void | IfxPort_setGroupModeInput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by '1' by the mask. More...
void | IfxPort_setGroupModeOutput (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex. More...
void | IfxPort_setGroupPadDriver (Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by '1' by the mask. More...
void | IfxPort_setPinMode (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality which bydefault support analog functionality. More...
void | IfxPort_setPinModeLvdsHigh (Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21) More...
void | IfxPort_setPinModeLvdsMedium (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode More...
void | IfxPort_setPinPadDriver (Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode. More...

Detailed Description

PORT basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPort.c.

Function Documentation

◆ IfxPort_resetESR()

void IfxPort_resetESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be disabled.
Returns
None
See also
IfxPort_disableEmergencyStop()

Definition at line 118 of file IfxPort.c.

Referenced by IfxPort_disableEmergencyStop().

◆ IfxPort_setESR()

void IfxPort_setESR | ( | Ifx_P * | port,
 |  | uint8 | pinIndex
 | ) |  |

Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.

Parameters
port | Pointer to the port which should be accessed.
pinIndex | Specifies the pin for which the emergency stop function should be enabled.
Returns
None
See also
IfxPort_enableEmergencyStop()

Definition at line 128 of file IfxPort.c.

Referenced by IfxPort_enableEmergencyStop().


iLLD_TC26B: IfxPort_cfg.c File Reference

  • _Impl
Variables
IfxPort_cfg.c File Reference

PORT on-chip implementation data. More...

#include "IfxPort_cfg.h"
Include dependency graph for IfxPort_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks [IFXPORT_NUM_MODULES]
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap [IFXPORT_NUM_MODULES]

Detailed Description

PORT on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPort_cfg.c.

Variable Documentation

◆ IfxPort_cfg_esrMasks

IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Initial value:
= {
{&MODULE_P00, 0x0000FFFFUL},
{&MODULE_P02, 0x0000FFFFUL},
{&MODULE_P10, 0x0000FFFFUL},
{&MODULE_P11, 0x0000FFFFUL},
{&MODULE_P13, 0x0000FFFFUL},
{&MODULE_P14, 0x0000FFFFUL},
{&MODULE_P15, 0x0000FFFFUL},
{&MODULE_P20, 0x0000FFFFUL},
{&MODULE_P21, 0x0000FFFFUL},
{&MODULE_P22, 0x0000FFFFUL},
{&MODULE_P23, 0x0000FFFFUL},
{&MODULE_P32, 0x0000FFFFUL},
{&MODULE_P33, 0x0000FFFFUL},
}

Definition at line 36 of file IfxPort_cfg.c.

Referenced by IfxPort_disableEmergencyStop(), and IfxPort_enableEmergencyStop().

◆ IfxPort_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Initial value:
= {
{&MODULE_P00, IfxPort_Index_00},
{&MODULE_P02, IfxPort_Index_02},
{&MODULE_P10, IfxPort_Index_10},
{&MODULE_P11, IfxPort_Index_11},
{&MODULE_P13, IfxPort_Index_13},
{&MODULE_P14, IfxPort_Index_14},
{&MODULE_P15, IfxPort_Index_15},
{&MODULE_P20, IfxPort_Index_20},
{&MODULE_P21, IfxPort_Index_21},
{&MODULE_P22, IfxPort_Index_22},
{&MODULE_P23, IfxPort_Index_23},
{&MODULE_P32, IfxPort_Index_32},
{&MODULE_P33, IfxPort_Index_33}
}
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:65
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:63
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:61
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:71
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:73
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:69
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:67
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:66
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:68
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:72
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:70
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:62
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:64

Definition at line 53 of file IfxPort_cfg.c.

Referenced by IfxPort_getAddress(), and IfxPort_getIndex().


iLLD_TC26B: IfxPort_Io.c File Reference

  • Port
  • Io
Functions
IfxPort_Io.c File Reference

PORT IO details. More...

#include "IfxPort_Io.h"
Include dependency graph for IfxPort_Io.c:

Go to the source code of this file.

Functions

void IfxPort_Io_initModule (const IfxPort_Io_Config *config)

Detailed Description

PORT IO details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPort_Io.c.


iLLD_TC26B: IfxPsi5.c File Reference

  • Psi5
  • Std
Functions
IfxPsi5.c File Reference

PSI5 basic functionality. More...

#include "IfxPsi5.h"
Include dependency graph for IfxPsi5.c:

Go to the source code of this file.

Functions

void | IfxPsi5_disableModule (Ifx_PSI5 *psi5)
Disable PSI5 kernel. More...
void | IfxPsi5_resetModule (Ifx_PSI5 *psi5)
resets PSI5 kernel More...
void | IfxPsi5_enableModule (Ifx_PSI5 *psi5)

Detailed Description

PSI5 basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5.c.

Function Documentation

◆ IfxPsi5_enableModule()

void IfxPsi5_enableModule ( Ifx_PSI5 * psi5 )
Returns
None

Definition at line 62 of file IfxPsi5.c.


iLLD_TC26B: IfxPsi5_cfg.c File Reference

  • _Impl
IfxPsi5_cfg.c File Reference

PSI5 on-chip implementation data. More...

#include "IfxPsi5_cfg.h"
Include dependency graph for IfxPsi5_cfg.c:

Go to the source code of this file.

Detailed Description

PSI5 on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5_cfg.c.


iLLD_TC26B: IfxPsi5_Psi5.c File Reference

  • Psi5
  • Psi5
Functions
IfxPsi5_Psi5.c File Reference

PSI5 PSI5 details. More...

#include "IfxPsi5_Psi5.h"
Include dependency graph for IfxPsi5_Psi5.c:

Go to the source code of this file.

Functions

void | IfxPsi5_Psi5_deInitModule (IfxPsi5_Psi5 *psi5)
Resets the PSI5 module. More...
void | IfxPsi5_Psi5_enableModule (Ifx_PSI5 *psi5)
Enable PSI5 kernel. More...
uint32 | IfxPsi5_Psi5_getFracDivClock (Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz. More...
boolean | IfxPsi5_Psi5_initChannel (IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxPsi5_Psi5_initChannelConfig (IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings) More...
boolean | IfxPsi5_Psi5_initModule (IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation. More...
void | IfxPsi5_Psi5_initModuleConfig (IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration. More...
uint32 | IfxPsi5_Psi5_initializeClock (Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock. More...
boolean | IfxPsi5_Psi5_readChannelFrame (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel. More...
boolean | IfxPsi5_Psi5_readChannelSerialMessage (IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel. More...
void | IfxPsi5_Psi5_resetModule (Ifx_PSI5 *psi5)
Reset PSI5 kernel. More...
boolean | IfxPsi5_Psi5_sendChannelData (IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel. More...

Detailed Description

PSI5 PSI5 details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5_Psi5.c.


iLLD_TC26B: IfxPsi5s.c File Reference

  • Psi5s
  • Std
Functions
IfxPsi5s.c File Reference

PSI5S basic functionality. More...

#include "IfxPsi5s.h"
Include dependency graph for IfxPsi5s.c:

Go to the source code of this file.

Functions

void | IfxPsi5s_disableAscReceiver (Ifx_PSI5S *psi5s)
Asc receiver is disabled. More...
void | IfxPsi5s_disableModule (Ifx_PSI5S *psi5s)
Disable PSI5S kernel. More...
void | IfxPsi5s_enableAscReceiver (Ifx_PSI5S *psi5s)
Enable ASC receiver. More...
void | IfxPsi5s_enableDisableChannelTriggerCounters (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter. More...
void | IfxPsi5s_enableDisableChannels (Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter. More...
boolean | IfxPsi5s_getReadFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel. More...
boolean | IfxPsi5s_getSuccessfullyReceivedFrameStatus (Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame. More...
void | IfxPsi5s_resetModule (Ifx_PSI5S *psi5s)
resets PSI5S kernel More...
void | IfxPsi5s_startAscTransactions (Ifx_PSI5S *psi5s)
Start ASC transactions. More...
void | IfxPsi5s_stopAscTransactions (Ifx_PSI5S *psi5s)

Detailed Description

PSI5S basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5s.c.


iLLD_TC26B: IfxPsi5s_Psi5s.c File Reference

  • Psi5s
  • Psi5s
Functions
IfxPsi5s_Psi5s.c File Reference

PSI5S PSI5S details. More...

#include "IfxPsi5s_Psi5s.h"
Include dependency graph for IfxPsi5s_Psi5s.c:

Go to the source code of this file.

Functions

IFX_STATIC uint32 | IfxPsi5s_Psi5s_getFracDivClock (Ifx_PSI5S *psi5s)
get the fracDiv clock frequency More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_initializeClock (Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock. More...
IFX_STATIC uint32 | IfxPsi5s_Psi5s_setBaudrate (Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface. More...
void | IfxPsi5s_Psi5s_deInitModule (IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module. More...
void | IfxPsi5s_Psi5s_enableModule (Ifx_PSI5S *psi5s)
Enable PSI5S kernel. More...
boolean | IfxPsi5s_Psi5s_initChannel (IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxPsi5s_Psi5s_initChannelConfig (IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration. More...
boolean | IfxPsi5s_Psi5s_initModule (IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation. More...
void | IfxPsi5s_Psi5s_initModuleConfig (IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration. More...
void | IfxPsi5s_Psi5s_readFrame (IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel. More...
void | IfxPsi5s_Psi5s_resetModule (Ifx_PSI5S *psi5s)
Reset PSI5S kernel. More...
boolean | IfxPsi5s_Psi5s_sendChannelData (IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel. More...

Detailed Description

PSI5S PSI5S details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxPsi5s_Psi5s.c.


iLLD_TC26B: IfxQspi.c File Reference

  • Qspi
  • Std
Macros | Functions
IfxQspi.c File Reference

QSPI basic functionality. More...

#include "IfxQspi.h"
Include dependency graph for IfxQspi.c:

Go to the source code of this file.

Macros

#define | ABCQMIN (4)
#define | ABCQMAX (8 * 63)

Functions

float | IfxQspi_calcRealBaudrate (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel. More...
uint32 | IfxQspi_calculateBasicConfigurationValue (Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values. More...
uint32 | IfxQspi_calculateExtendedConfigurationValue (Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values. More...
uint32 | IfxQspi_calculatePrescaler (Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler. More...
uint32 | IfxQspi_calculateTimeQuantumLength (Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length. More...
Ifx_QSPI * | IfxQspi_getAddress (IfxQspi_Index qspi)
IfxQspi_Index | IfxQspi_getIndex (Ifx_QSPI *qspi)
Specifies the function to get Index. More...
void | IfxQspi_read16 (Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO. More...
void | IfxQspi_read32 (Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO. More...
void | IfxQspi_read8 (Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO. More...
uint32 | IfxQspi_recalcBasicConfiguration (uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON. More...
void | IfxQspi_resetModule (Ifx_QSPI *qspi)
resets QSPI kernel More...
void | IfxQspi_setSlaveSelectOutputControl (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output. More...
void | IfxQspi_write16 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO. More...
void | IfxQspi_write32 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO. More...
void | IfxQspi_write8 (Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO. More...
void | IfxQspi_calculateDelayConstants (const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. More...

Detailed Description

QSPI basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi.c.

Macro Definition Documentation

◆ ABCQMAX

#define ABCQMAX (8 * 63)

Referenced by IfxQspi_calculateTimeQuantumLength().

◆ ABCQMIN

#define ABCQMIN (4)

Referenced by IfxQspi_calculateTimeQuantumLength().


iLLD_TC26B: IfxQspi_cfg.c File Reference

  • _Impl
Variables
IfxQspi_cfg.c File Reference

QSPI on-chip implementation data. More...

#include "IfxQspi_cfg.h"
Include dependency graph for IfxQspi_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap [IFXQSPI_NUM_MODULES]

Detailed Description

QSPI on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi_cfg.c.

Variable Documentation

◆ IfxQspi_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Initial value:
= {
{&MODULE_QSPI0, IfxQspi_Index_0},
{&MODULE_QSPI1, IfxQspi_Index_1},
{&MODULE_QSPI2, IfxQspi_Index_2},
{&MODULE_QSPI3, IfxQspi_Index_3}
}
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:65
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:64
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:66
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:63

Definition at line 35 of file IfxQspi_cfg.c.

Referenced by IfxQspi_getAddress(), and IfxQspi_getIndex().


iLLD_TC26B: IfxQspi_SpiMaster.c File Reference

  • Qspi
  • SpiMaster
Functions
IfxQspi_SpiMaster.c File Reference

QSPI SPIMASTER details. More...

#include "IfxQspi_SpiMaster.h"
Include dependency graph for IfxQspi_SpiMaster.c:

Go to the source code of this file.

Functions

IFX_STATIC IfxQspi_SpiMaster_Channel * | IfxQspi_SpiMaster_activeChannel (IfxQspi_SpiMaster *handle)
Gets current active channel. More...
IFX_STATIC void | IfxQspi_SpiMaster_activateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin. More...
IFX_STATIC void | IfxQspi_SpiMaster_deactivateSlso (IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin. More...
IFX_STATIC SpiIf_Status | IfxQspi_SpiMaster_lock (IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it. More...
IFX_STATIC void | IfxQspi_SpiMaster_read (IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_unlock (IfxQspi_SpiMaster *handle)
Unlocks the transfers. More...
IFX_STATIC void | IfxQspi_SpiMaster_write (IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO. More...
IFX_STATIC void | IfxQspi_SpiMaster_writeLong (IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO. More...
SpiIf_Status | IfxQspi_SpiMaster_exchange (IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
SpiIf_ChConfig | IfxQspi_SpiMaster_getChannelConfig (IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration. More...
SpiIf_Status | IfxQspi_SpiMaster_getStatus (IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status. More...
SpiIf_Status | IfxQspi_SpiMaster_initChannel (IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel. More...
void | IfxQspi_SpiMaster_initChannelConfig (IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values. More...
void | IfxQspi_SpiMaster_initModule (IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module. More...
void | IfxQspi_SpiMaster_initModuleConfig (IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
void | IfxQspi_SpiMaster_isrDmaReceive (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiMaster_isrDmaTransmit (IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiMaster_isrError (IfxQspi_SpiMaster *handle)
Error Interrupt handler. More...
IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrPhaseTransition (IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler. More...
void | IfxQspi_SpiMaster_isrReceive (IfxQspi_SpiMaster *handle)
Receive Interrupt handler. More...
void | IfxQspi_SpiMaster_isrTransmit (IfxQspi_SpiMaster *handle)
Transmit interrupt handler. More...
IfxQspi_PhaseTransitionEvent | IfxQspi_SpiMaster_isrUserDefined (IfxQspi_SpiMaster *handle)
User defined interrupt handler. More...
void | IfxQspi_SpiMaster_packLongModeBuffer (IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer More...
SpiIf_Status | IfxQspi_SpiMaster_setChannelBaudrate (IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate. More...

Detailed Description

QSPI SPIMASTER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi_SpiMaster.c.

Function Documentation

◆ IfxQspi_SpiMaster_getChannelConfig()

SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig ( IfxQspi_SpiMaster_Channel * chHandle )

Gets the channel configuration.

Parameters
chHandle Module Channel handle
Returns
Channel configuration

Definition at line 163 of file IfxQspi_SpiMaster.c.

Referenced by IfxQspi_SpiMaster_setChannelBaudrate().

◆ IfxQspi_SpiMaster_setChannelBaudrate()

SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate | ( | IfxQspi_SpiMaster_Channel * | chHandle,
 |  | float32 | baudrate
 | ) |  |

Set the channel baudrate.

Parameters
chHandle | Module Channel handle
baudrate | Baudrate to be configured (in Baud)
Returns
Status of Channel (busy or ok or failure)

Definition at line 871 of file IfxQspi_SpiMaster.c.


iLLD_TC26B: IfxQspi_SpiSlave.c File Reference

  • Qspi
  • SpiSlave
Functions | Variables
IfxQspi_SpiSlave.c File Reference

QSPI SPISLAVE details. More...

#include "IfxQspi_SpiSlave.h"
Include dependency graph for IfxQspi_SpiSlave.c:

Go to the source code of this file.

Functions

IFX_STATIC void | IfxQspi_SpiSlave_read (IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO. More...
IFX_STATIC void | IfxQspi_SpiSlave_write (IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO. More...
SpiIf_Status | IfxQspi_SpiSlave_exchange (IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data. More...
SpiIf_Status | IfxQspi_SpiSlave_getStatus (IfxQspi_SpiSlave *handle)
Gets the transmission status. More...
void | IfxQspi_SpiSlave_initModule (IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module. More...
void | IfxQspi_SpiSlave_initModuleConfig (IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values. More...
void | IfxQspi_SpiSlave_isrDmaReceive (IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler. More...
void | IfxQspi_SpiSlave_isrDmaTransmit (IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler. More...
void | IfxQspi_SpiSlave_isrError (IfxQspi_SpiSlave *handle)
Error Interrupt handler. More...
void | IfxQspi_SpiSlave_isrReceive (IfxQspi_SpiSlave *handle)
Receive Interrupt handler. More...
void | IfxQspi_SpiSlave_isrTransmit (IfxQspi_SpiSlave *handle)
Transmit interrupt handler. More...

Variables

IFX_STATIC uint32 | IfxQspi_SpiSlave_dummyRxValue = 0
dummy variable where recived data is placed More...
IFX_STATIC IFX_CONST uint32 | IfxQspi_SpiSlave_dummyTxValue = ~0
dummy value to be transmitted More...

Detailed Description

QSPI SPISLAVE details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxQspi_SpiSlave.c.


iLLD_TC26B: IfxScu_cfg.c File Reference

  • _Impl
IfxScu_cfg.c File Reference

SCU on-chip implementation data. More...

#include "IfxScu_cfg.h"
Include dependency graph for IfxScu_cfg.c:

Go to the source code of this file.

Detailed Description

SCU on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScu_cfg.c.


iLLD_TC26B: IfxScuCcu.c File Reference

  • Scu
  • Std
Functions | Variables
IfxScuCcu.c File Reference

SCU basic functionality. More...

#include "IfxScuCcu.h"
Include dependency graph for IfxScuCcu.c:

Go to the source code of this file.

Functions

IFX_STATIC boolean | IfxScuCcu_isOscillatorStable (void)
Check if oscillator is stable. More...
IFX_STATIC void | IfxScuCcu_wait (float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled. More...
boolean | IfxScuCcu_calculateSysPllDividers (IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency. More...
float32 | IfxScuCcu_getBaud1Frequency (void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getBaud2Frequency (void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX. More...
float32 | IfxScuCcu_getBbbFrequency (void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getCpuFrequency (const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency. More...
float32 | IfxScuCcu_getFsi2Frequency (void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getFsiFrequency (void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getMaxFrequency (void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getModuleFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
float32 | IfxScuCcu_getOsc0Frequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getOscFrequency (void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator. More...
float32 | IfxScuCcu_getPllErayFrequency (void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
float32 | IfxScuCcu_getPllErayVcoFrequency (void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLERAYCON registers and the input oscillator. More...
float32 | IfxScuCcu_getPllFrequency (void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator. More...
float32 | IfxScuCcu_getPllVcoFrequency (void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divider values in PLLCON registers and the input oscillator. More...
float32 | IfxScuCcu_getSourceFrequency (void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with CCUCON register configuration. More...
float32 | IfxScuCcu_getSpbFrequency (void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers. More...
float32 | IfxScuCcu_getSriFrequency (void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE. More...
boolean | IfxScuCcu_init (const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure. More...
void | IfxScuCcu_initConfig (IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values. More...
boolean | IfxScuCcu_initErayPll (const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by the configuration structure. More...
void | IfxScuCcu_initErayPllConfig (IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values. More...
float32 | IfxScuCcu_setCpuFrequency (IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setGtmFrequency (float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setPll2ErayFrequency (float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setPll2Frequency (float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setSpbFrequency (float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
float32 | IfxScuCcu_setSriFrequency (float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value. More...
void | IfxScuCcu_switchToBackupClock (const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency. More...

Variables

IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps []
Default configuration for the PLL initial steps This is a structure array and the values are defined at the Scu implementation as a macro. More...
IFX_STATIC uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY
Crystal Frequency. More...
IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScuCcu.c.

Function Documentation

◆ IfxScuCcu_setGtmFrequency()

float32 IfxScuCcu_setGtmFrequency ( float32 gtmFreq )

API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value.

Parameters
gtmFreq Desired GTM frequency in Hz
Returns
Actual GTM frequency in HZ

Definition at line 1095 of file IfxScuCcu.c.

Variable Documentation

◆ IfxScuCcu_aDefaultPllConfigSteps

IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[]
Initial value:
= {
IFXSCU_CFG_PLL_STEPS
}
IFXSCU_CFG_PLL_STEPS
#define IFXSCU_CFG_PLL_STEPS
Definition: IfxScu_cfg.h:1327

Default configuration for the PLL initial steps This is a structure array and the values are defined at the Scu implementation as a macro.

Definition at line 61 of file IfxScuCcu.c.

◆ IfxScuCcu_defaultClockConfig

IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Initial value:
= {
{
sizeof(IfxScuCcu_aDefaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
(IfxScuCcu_PllStepsConfig *)IfxScuCcu_aDefaultPllConfigSteps,
IFXSCU_CFG_PLL_INITIAL_STEP,
},
IFXSCU_CFG_CLK_DISTRIBUTION,
IFXSCU_CFG_FLASH_WAITSTATE,
IFX_CFG_SCU_XTAL_FREQUENCY,
}
IFXSCU_CFG_FLASH_WAITSTATE
#define IFXSCU_CFG_FLASH_WAITSTATE
Definition: IfxScu_cfg.h:1334
IFXSCU_CFG_CLK_DISTRIBUTION
#define IFXSCU_CFG_CLK_DISTRIBUTION
Definition: IfxScu_cfg.h:1312
IFXSCU_CFG_PLL_INITIAL_STEP
#define IFXSCU_CFG_PLL_INITIAL_STEP
Definition: IfxScu_cfg.h:1332
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:43
IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:723
IfxScuCcu_aDefaultPllConfigSteps
IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[]
Default configuration for the PLL initial steps This is a structure array and the values are defined ...
Definition: IfxScuCcu.c:61

Definition at line 73 of file IfxScuCcu.c.

Referenced by IfxScuCcu_initConfig().

◆ IfxScuCcu_defaultErayPllConfig

IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig
Initial value:
= {
{(1 - 1), (24 - 1), (6 - 1), 0}
}

Definition at line 84 of file IfxScuCcu.c.

Referenced by IfxScuCcu_initErayPllConfig().

◆ IfxScuCcu_xtalFrequency

IFX_STATIC uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY

Crystal Frequency.

Definition at line 67 of file IfxScuCcu.c.

Referenced by IfxScuCcu_getOsc0Frequency(), IfxScuCcu_getOscFrequency(), IfxScuCcu_init(), and IfxScuCcu_isOscillatorStable().


iLLD_TC26B: IfxScuEru.c File Reference

  • Scu
  • Std
Macros | Functions
IfxScuEru.c File Reference

SCU basic functionality. More...

#include "IfxScuEru.h"
Include dependency graph for IfxScuEru.c:

Go to the source code of this file.

Macros

#define | IFXSCUERU_CHANNEL_NUMBER_ODD 1
#define | IFXSCUERU_TO_REGISTER_BASE 1

Functions

void | IfxScuEru_clearAllEventFlags (void)
Clears the external event flag of input channel x (INTFx) More...
void | IfxScuEru_clearEventFlag (IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx) More...
void | IfxScuEru_clearInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x. More...
void | IfxScuEru_clearOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
void | IfxScuEru_connectTrigger (IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1). More...
void | IfxScuEru_disableAutoClear (IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
void | IfxScuEru_disableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x. More...
void | IfxScuEru_disablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
void | IfxScuEru_disableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x. More...
void | IfxScuEru_disableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected. More...
void | IfxScuEru_enableAutoClear (IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected. More...
void | IfxScuEru_enableFallingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x. More...
void | IfxScuEru_enablePatternDetectionTrigger (IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detection changes. More...
void | IfxScuEru_enableRisingEdgeDetection (IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x. More...
void | IfxScuEru_enableTriggerPulse (IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected. More...
uint32 | IfxScuEru_getAllEventFlagsStatus (void)
Returns the status of the flags of all input channels. More...
boolean | IfxScuEru_getEventFlagStatus (IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx) More...
uint32 | IfxScuEru_getInputChannelConfiguration (IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x. More...
uint32 | IfxScuEru_getOutputChannelConfiguration (IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y. More...
boolean | IfxScuEru_getPatternDetectionResult (IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy) More...
uint32 | IfxScuEru_getWholePatternDetectionResult (void)
Returns the whole pattern detection result of all the selcted output channels. More...
void | IfxScuEru_selectExternalInput (IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x. More...
void | IfxScuEru_setEventFlag (IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx) More...
void | IfxScuEru_setFlagPatternDetection (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating. More...
void | IfxScuEru_setInterruptGatingPattern (IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScuEru.c.

Macro Definition Documentation

◆ IFXSCUERU_CHANNEL_NUMBER_ODD

#define IFXSCUERU_CHANNEL_NUMBER_ODD 1

Definition at line 36 of file IfxScuEru.c.

Referenced by IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getInputChannelConfiguration(), IfxScuEru_getOutputChannelConfiguration(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), and IfxScuEru_setInterruptGatingPattern().

◆ IFXSCUERU_TO_REGISTER_BASE

#define IFXSCUERU_TO_REGISTER_BASE 1

Definition at line 38 of file IfxScuEru.c.

Referenced by IfxScuEru_clearInputChannelConfiguration(), IfxScuEru_clearOutputChannelConfiguration(), IfxScuEru_connectTrigger(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getInputChannelConfiguration(), IfxScuEru_getOutputChannelConfiguration(), IfxScuEru_selectExternalInput(), IfxScuEru_setFlagPatternDetection(), and IfxScuEru_setInterruptGatingPattern().


iLLD_TC26B: IfxScuWdt.c File Reference

  • Scu
  • Std
Macros | Functions
IfxScuWdt.c File Reference

SCU basic functionality. More...

#include "IfxScuWdt.h"
#include "Cpu/Std/IfxCpu.h"
Include dependency graph for IfxScuWdt.c:

Go to the source code of this file.

Macros

#define IFXSCUWDT_RESET_PASSWORD (0x3CU)
Reset password of watchdog module. More...

Functions

void | IfxScuWdt_changeCpuWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password. More...
void | IfxScuWdt_changeCpuWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value. More...
void | IfxScuWdt_changeSafetyWatchdogPassword (uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password. More...
void | IfxScuWdt_changeSafetyWatchdogReload (uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value. More...
void | IfxScuWdt_clearCpuEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module. More...
void | IfxScuWdt_clearSafetyEndinit (uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module. More...
void | IfxScuWdt_disableCpuWatchdog (uint16 password)
SCUWDT API to disable CPU Watchdog functionality. More...
void | IfxScuWdt_disableSafetyWatchdog (uint16 password)
SCUWDT API to disable Safety Watchdog functionality. More...
void | IfxScuWdt_enableCpuWatchdog (uint16 password)
SCUWDT API to enable CPU Watchdog functionality. More...
void | IfxScuWdt_enableSafetyWatchdog (uint16 password)
SCUWDT API to enable Safety Watchdog functionality. More...
uint16 | IfxScuWdt_getCpuWatchdogPassword (void)
SCUWDT API to fetch current password of CPU Watchdog module. More...
boolean | IfxScuWdt_getCpuWatchdogEndInit (void)
SCUWDT API to fetch current endinit of CPU Watchdog module. More...
uint16 | IfxScuWdt_getSafetyWatchdogPassword (void)
SCUWDT API to fetch current password of Safety Watchdog module. More...
void | IfxScuWdt_initConfig (IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt configuration structure to default values, these default values are for software specific, not necessarily hardware reset values. User must use this API call before IfxScuWdt_Init API call. More...
void | IfxScuWdt_initCpuWatchdog (Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module. More...
void | IfxScuWdt_initSafetyWatchdog (Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module. More...
void | IfxScuWdt_serviceCpuWatchdog (uint16 password)
SCUWDT API to service CPU Watchdog functionality. More...
void | IfxScuWdt_serviceSafetyWatchdog (uint16 password)
SCUWDT API to service Safety Watchdog functionality. More...
void | IfxScuWdt_setCpuEndinit (uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module. More...
void | IfxScuWdt_setSafetyEndinit (uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module. More...
boolean | IfxScuWdt_enableWatchdogWithDebugger (void)
Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already. More...

Detailed Description

SCU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxScuWdt.c.

Macro Definition Documentation

◆ IFXSCUWDT_RESET_PASSWORD

#define IFXSCUWDT_RESET_PASSWORD (0x3CU)

Reset password of watchdog module.

Definition at line 39 of file IfxScuWdt.c.

Referenced by IfxScuWdt_initConfig().

Function Documentation

◆ IfxScuWdt_enableWatchdogWithDebugger()

boolean IfxScuWdt_enableWatchdogWithDebugger ( void )

Enables the watchdog functionality with debugger connected,
debug interface will also be enabled, if not enabled already.

Returns
Status, Success = 0, Failure = 1.

Definition at line 413 of file IfxScuWdt.c.


iLLD_TC26B: IfxSent.c File Reference

  • Sent
  • Std
Functions
IfxSent.c File Reference

SENT basic functionality. More...

#include "IfxSent.h"
Include dependency graph for IfxSent.c:

Go to the source code of this file.

Functions

float32 | IfxSent_getChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel. More...
float32 | IfxSent_getModuleClock (Ifx_SENT *sent)
Returns the current module frequency in Hertz. More...
void | IfxSent_initializeChannelUnitTime (Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel. More...
void | IfxSent_initializeModuleClock (Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel. More...
void | IfxSent_resetModule (Ifx_SENT *sent)
Resets the SENT module. More...

Detailed Description

SENT basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSent.c.

Function Documentation

◆ IfxSent_getChannelUnitTime()

float32 IfxSent_getChannelUnitTime | ( | Ifx_SENT * | sent,
 |  | IfxSent_ChannelId | channelId
 | ) |  |

Returns the current unit time (f_tick) of the given channel.

Parameters
sent | base address of the SENT register space
channelId | SENT channel number
Returns
The current unit time in seconds

Definition at line 36 of file IfxSent.c.


iLLD_TC26B: IfxSent_cfg.c File Reference

  • _Impl
IfxSent_cfg.c File Reference

SENT on-chip implementation data. More...

#include "IfxSent_cfg.h"
Include dependency graph for IfxSent_cfg.c:

Go to the source code of this file.

Detailed Description

SENT on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSent_cfg.c.


iLLD_TC26B: IfxSent_Sent.c File Reference

  • Sent
  • Sent
Functions
IfxSent_Sent.c File Reference

SENT SENT details. More...

#include "IfxSent_Sent.h"
Include dependency graph for IfxSent_Sent.c:

Go to the source code of this file.

Functions

void | IfxSent_Sent_deInitModule (IfxSent_Sent *driver)
Reset the SENT module. More...
boolean | IfxSent_Sent_initChannel (IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration. More...
void | IfxSent_Sent_initChannelConfig (IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration. More...
boolean | IfxSent_Sent_initModule (IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation. More...
void | IfxSent_Sent_initModuleConfig (IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration. More...
boolean | IfxSent_Sent_readChannelSerialDataFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register. More...
boolean | IfxSent_Sent_readChannelSerialMessageFrame (IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames More...

Detailed Description

SENT SENT details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSent_Sent.c.


iLLD_TC26B: IfxSmu.c File Reference

  • Smu
  • Std
Functions
IfxSmu.c File Reference

SMU basic functionality. More...

#include "IfxSmu.h"
#include "Port/Std/IfxPort.h"
Include dependency graph for IfxSmu.c:

Go to the source code of this file.

Functions

boolean | IfxSmu_initFsp (Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP. More...
boolean | IfxSmu_cmd (Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers. More...
float32 | IfxSmu_getFspFaultFreeFrequency (Ifx_SMU *smu)
Return FSP frequency (Time switching only) More...
float32 | IfxSmu_getFspFaultStateTime (Ifx_SMU *smu)
Return the minimal fault state time. More...
boolean | IfxSmu_unlock (Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
void | IfxSmu_lock (Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
void | IfxSmu_lockForever (Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection. More...
void | IfxSmu_setAlarmConfig (Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration. More...
void | IfxSmu_enableAlarmFsp (Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration. More...
boolean | IfxSmu_isAlarmSet (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status. More...
IfxSmu_Alarm | IfxSmu_getAlarm (Ifx_SMU *smu)
Get the alarm flag. More...
void | IfxSmu_clearAlarm (Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag. More...

Detailed Description

SMU basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSmu.c.


iLLD_TC26B: IfxSmu_cfg.c File Reference

  • _Impl
IfxSmu_cfg.c File Reference

SMU on-chip implementation data. More...

#include "IfxSmu_cfg.h"
Include dependency graph for IfxSmu_cfg.c:

Go to the source code of this file.

Detailed Description

SMU on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSmu_cfg.c.


iLLD_TC26B: IfxSrc.c File Reference

  • Src
  • Std
IfxSrc.c File Reference

SRC basic functionality. More...

#include "IfxSrc.h"
Include dependency graph for IfxSrc.c:

Go to the source code of this file.

Detailed Description

SRC basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSrc.c.


iLLD_TC26B: IfxSrc_cfg.c File Reference

  • _Impl
IfxSrc_cfg.c File Reference

SRC on-chip implementation data. More...

#include "IfxSrc_cfg.h"
Include dependency graph for IfxSrc_cfg.c:

Go to the source code of this file.

Detailed Description

SRC on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxSrc_cfg.c.


iLLD_TC26B: IfxStdIf_DPipe.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_DPipe.c File Reference

Standard interface: Data Pipe. More...

#include "IfxStdIf_DPipe.h"
#include "_Utilities/Ifx_Assert.h"
#include <string.h>
#include <stdio.h>
#include <stdarg.h>
Include dependency graph for IfxStdIf_DPipe.c:

Go to the source code of this file.

Functions

void IfxStdIf_DPipe_print (IfxStdIf_DPipe *stdIf, pchar format,...)

Detailed Description

Standard interface: Data Pipe.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:23 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf_DPipe.c.


iLLD_TC26B: IfxStdIf_Pos.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_Pos.c File Reference

Standard interface: Position interface. More...

#include "IfxStdIf_Pos.h"
Include dependency graph for IfxStdIf_Pos.c:

Go to the source code of this file.

Functions

void | IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config *config)
void | IfxStdIf_Pos_printStatus (IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status. More...

Detailed Description

Standard interface: Position interface.

Version
disabled
Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf_Pos.c.

Function Documentation

◆ IfxStdIf_Pos_initConfig()

void IfxStdIf_Pos_initConfig ( IfxStdIf_Pos_Config * config )

Initialize the configuration structure to default

Parameters
config Position interface configuration. This parameter is initialized by the function

Definition at line 28 of file IfxStdIf_Pos.c.

Referenced by IfxGpt12_IncrEnc_initConfig().

◆ IfxStdIf_Pos_printStatus()

void IfxStdIf_Pos_printStatus | ( | IfxStdIf_Pos * | driver,
 |  | IfxStdIf_DPipe * | io
 | ) |  |

Print the device status.

Parameters
driver | driver handle
io | Interface to which the status is output
Returns
none

Definition at line 44 of file IfxStdIf_Pos.c.


iLLD_TC26B: IfxStdIf_PwmHl.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_PwmHl.c File Reference

Standard interface: Multi-channels, dual-complementary PWM interface. More...

#include "IfxStdIf_PwmHl.h"
Include dependency graph for IfxStdIf_PwmHl.c:

Go to the source code of this file.

Functions

void IfxStdIf_PwmHl_initConfig (IfxStdIf_PwmHl_Config *config)

Detailed Description

Standard interface: Multi-channels, dual-complementary PWM interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:24 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf_PwmHl.c.

Function Documentation

◆ IfxStdIf_PwmHl_initConfig()

void IfxStdIf_PwmHl_initConfig ( IfxStdIf_PwmHl_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 28 of file IfxStdIf_PwmHl.c.

Referenced by IfxCcu6_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_initConfig(), and IfxGtm_Tom_PwmHl_initConfig().


iLLD_TC26B: IfxStdIf_Timer.c File Reference

  • Service
  • CpuGeneric
  • StdIf
Functions
IfxStdIf_Timer.c File Reference

Standard interface: Timer. More...

#include "IfxStdIf_Timer.h"
Include dependency graph for IfxStdIf_Timer.c:

Go to the source code of this file.

Functions

void | IfxStdIf_Timer_initConfig (IfxStdIf_Timer_Config *config)
void | IfxStdIf_Timer_initStdIf (IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)

Detailed Description

Standard interface: Timer.

Version
disabled
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStdIf_Timer.c.

Function Documentation

◆ IfxStdIf_Timer_initConfig()

void IfxStdIf_Timer_initConfig ( IfxStdIf_Timer_Config * config )

Initialize the configuration structure to default

Parameters
config Timer configuration. This parameter is initialised by the function

Definition at line 28 of file IfxStdIf_Timer.c.

Referenced by IfxCcu6_TimerWithTrigger_initConfig(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Tom_Timer_initConfig(), and IfxStm_Timer_initConfig().

◆ IfxStdIf_Timer_initStdIf()

void IfxStdIf_Timer_initStdIf | ( | IfxStdIf_Timer * | stdIf,
 |  | IfxStdIf_InterfaceDriver | driver
 | ) |  |

Initialize the stdIf so that all call back function default to no operation

Parameters
stdIf | Pointer to the interface driver object
driver | Interface driver object

Definition at line 126 of file IfxStdIf_Timer.c.

Referenced by IfxStm_Timer_stdIfTimerInit().


iLLD_TC26B: IfxStm.c File Reference

  • Stm
  • Std
Functions
IfxStm.c File Reference

STM basic functionality. More...

#include "IfxStm.h"
Include dependency graph for IfxStm.c:

Go to the source code of this file.

Functions

void | IfxStm_clearCompareFlag (Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag. More...
void | IfxStm_disableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt. More...
void | IfxStm_disableModule (Ifx_STM *stm)
Disables the Stm module. More...
void | IfxStm_enableComparatorInterrupt (Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt . More...
void | IfxStm_enableOcdsSuspend (Ifx_STM *stm)
enable suspend by debugger. More...
Ifx_STM * | IfxStm_getAddress (IfxStm_Index stm)
Returns the module index of the selected STM module. More...
IfxStm_Index | IfxStm_getIndex (Ifx_STM *stm)
API to get the resource index of the STM specified. More...
volatile Ifx_SRC_SRCR * | IfxStm_getSrcPointer (Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator. More...
boolean | IfxStm_initCompare (Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register. More...
void | IfxStm_initCompareConfig (IfxStm_CompareConfig *config)
Initialise compare configuration with default values. More...
boolean | IfxStm_isCompareFlagSet (Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set. More...
void | IfxStm_resetModule (Ifx_STM *stm)
void | IfxStm_setCompareControl (Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior. More...

Detailed Description

STM basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStm.c.

Function Documentation

◆ IfxStm_resetModule()

void IfxStm_resetModule ( Ifx_STM * stm )
Parameters
stm pointer to STM registers
Returns
None

Definition at line 231 of file IfxStm.c.


iLLD_TC26B: IfxStm_cfg.c File Reference

  • _Impl
Variables
IfxStm_cfg.c File Reference

STM on-chip implementation data. More...

#include "IfxStm_cfg.h"
Include dependency graph for IfxStm_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap [IFXSTM_NUM_MODULES]

Detailed Description

STM on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStm_cfg.c.

Variable Documentation

◆ IfxStm_cfg_indexMap

IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Initial value:
= {
{&MODULE_STM0, IfxStm_Index_0},
{&MODULE_STM1, IfxStm_Index_1}
}
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:71
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:70

Definition at line 35 of file IfxStm_cfg.c.

Referenced by IfxStm_getAddress(), and IfxStm_getIndex().


iLLD_TC26B: IfxStm_Timer.c File Reference

  • Stm
  • Timer
Functions
IfxStm_Timer.c File Reference

STM TIMER details. More...

#include "IfxStm_Timer.h"
#include "_Utilities/Ifx_Assert.h"
Include dependency graph for IfxStm_Timer.c:

Go to the source code of this file.

Functions

boolean | IfxStm_Timer_acknowledgeTimerIrq (IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq. More...
float32 | IfxStm_Timer_getFrequency (IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency. More...
float32 | IfxStm_Timer_getInputFrequency (IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency. More...
Ifx_TimerValue | IfxStm_Timer_getPeriod (IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod. More...
float32 | IfxStm_Timer_getResolution (IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution. More...
void | IfxStm_Timer_run (IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run. More...
boolean | IfxStm_Timer_setFrequency (IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency. More...
boolean | IfxStm_Timer_setPeriod (IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod. More...
void | IfxStm_Timer_setSingleMode (IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode. More...
boolean | IfxStm_Timer_stdIfTimerInit (IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer. More...
void | IfxStm_Timer_stop (IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop. More...
void | IfxStm_Timer_updateInputFrequency (IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency. More...
boolean | IfxStm_Timer_init (IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object. More...
void | IfxStm_Timer_initConfig (IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default. More...

Detailed Description

STM TIMER details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxStm_Timer.c.


iLLD_TC26B: IfxVadc.c File Reference

  • Vadc
  • Std
Functions
IfxVadc.c File Reference

VADC basic functionality. More...

#include "IfxVadc.h"
Include dependency graph for IfxVadc.c:

Go to the source code of this file.

Functions

void | IfxVadc_configExternalMultiplexerMode (Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
void | IfxVadc_disableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers. More...
void | IfxVadc_disablePostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration. More...
void | IfxVadc_enableAccess (Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers. More...
void | IfxVadc_enableGroupSync (Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068. More...
float32 | IfxVadc_getAdcAnalogFrequency (Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz. More...
float32 | IfxVadc_getAdcDigitalFrequency (Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz. More...
float32 | IfxVadc_getAdcModuleFrequency (void)
Module Frequency in Hz. More...
IfxVadc_Status | IfxVadc_getBackgroundScanStatus (Ifx_VADC *vadc)
Gives the background scan status for a group. More...
float32 | IfxVadc_getChannelConversionTime (Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing More...
IfxVadc_Status | IfxVadc_getQueueStatus (Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full. More...
Ifx_VADC_RES | IfxVadc_getResultBasedOnRequestSource (Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset. More...
IfxVadc_Status | IfxVadc_getScanStatus (Ifx_VADC_G *group)
Gives the scan status for a group. More...
volatile Ifx_SRC_SRCR * | IfxVadc_getSrcAddress (IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address. More...
void | IfxVadc_initialiseAdcArbiterClock (Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock. More...
void | IfxVadc_initialiseAdcConverterClock (Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock. More...
uint32 | IfxVadc_initializeFAdcD (Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock. More...
uint32 | IfxVadc_initializeFAdcI (Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock. More...
boolean | IfxVadc_isPostCalibration (Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status. More...
void | IfxVadc_resetKernel (Ifx_VADC *vadc)
Resets the kernel. More...
void | IfxVadc_selectPowerSupplyVoltage (Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage. More...
void | IfxVadc_setArbiterPriority (Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations. More...
void | IfxVadc_setScan (Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan. More...
void | IfxVadc_startupCalibration (Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process. More...

Detailed Description

VADC basic functionality.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxVadc.c.


iLLD_TC26B: IfxVadc_Adc.c File Reference

  • Vadc
  • Adc
Functions | Variables
IfxVadc_Adc.c File Reference

VADC ADC details. More...

#include "IfxVadc_Adc.h"
Include dependency graph for IfxVadc_Adc.c:

Go to the source code of this file.

Functions

IFX_INLINE IfxVadc_GroupId | IfxVadc_Adc_getMasterId (IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id. More...
IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL | IfxVadc_Adc_getMasterKernelIndex (IfxVadc_GroupId slave, IfxVadc_GroupId master)
Gets the current master kernel index. More...
void | IfxVadc_Adc_deInitGroup (IfxVadc_Adc_Group *group)
Reset the VADC group. More...
void | IfxVadc_Adc_disableModule (Ifx_VADC *vadc)
Disable VADC Module. More...
void | IfxVadc_Adc_getChannelConfig (IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings) More...
float32 | IfxVadc_Adc_getChannelConversionTime (IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time More...
void | IfxVadc_Adc_getGroupConfig (IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency) More...
IfxVadc_Status | IfxVadc_Adc_initChannel (IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration. More...
void | IfxVadc_Adc_initChannelConfig (IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration. More...
IfxVadc_Status | IfxVadc_Adc_initGroup (IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first. More...
void | IfxVadc_Adc_initGroupConfig (IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration. More...
IfxVadc_Status | IfxVadc_Adc_initModule (IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration. More...
void | IfxVadc_Adc_initModuleConfig (IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration. More...
void | IfxVadc_Adc_initExternalMultiplexerModeConfig (IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer More...
void | IfxVadc_Adc_initExternalMultiplexerMode (Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer. More...

Variables

IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex [IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS]

Detailed Description

VADC ADC details.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxVadc_Adc.c.


iLLD_TC26B: IfxVadc_cfg.c File Reference

  • _Impl
Variables
IfxVadc_cfg.c File Reference

VADC on-chip implementation data. More...

#include "IfxVadc_cfg.h"
Include dependency graph for IfxVadc_cfg.c:

Go to the source code of this file.

Variables

IFX_CONST uint32 IfxVadc_cfg_srcAddresses [(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]

Detailed Description

VADC on-chip implementation data.

Version
iLLD_1_0_1_11_0
Copyright
Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file IfxVadc_cfg.c.

Variable Documentation

◆ IfxVadc_cfg_srcAddresses

IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]
Initial value:
= {
(uint32)&SRC_VADC_G0_SR0,
(uint32)&SRC_VADC_G0_SR1,
(uint32)&SRC_VADC_G0_SR2,
(uint32)&SRC_VADC_G0_SR3,
(uint32)&SRC_VADC_G1_SR0,
(uint32)&SRC_VADC_G1_SR1,
(uint32)&SRC_VADC_G1_SR2,
(uint32)&SRC_VADC_G1_SR3,
(uint32)&SRC_VADC_G2_SR0,
(uint32)&SRC_VADC_G2_SR1,
(uint32)&SRC_VADC_G2_SR2,
(uint32)&SRC_VADC_G2_SR3,
(uint32)&SRC_VADC_G3_SR0,
(uint32)&SRC_VADC_G3_SR1,
(uint32)&SRC_VADC_G3_SR2,
(uint32)&SRC_VADC_G3_SR3,
(uint32)&SRC_VADC_CG0_SR0,
(uint32)&SRC_VADC_CG0_SR1,
(uint32)&SRC_VADC_CG0_SR2,
(uint32)&SRC_VADC_CG0_SR3,
(uint32)&SRC_VADC_CG1_SR0,
(uint32)&SRC_VADC_CG1_SR1,
(uint32)&SRC_VADC_CG1_SR2,
(uint32)&SRC_VADC_CG1_SR3
}
uint32
unsigned long uint32
Definition: Platform_Types.h:113

Definition at line 35 of file IfxVadc_cfg.c.

Referenced by IfxVadc_getSrcAddress().


iLLD_TC26B: lld_api.c File Reference

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lld_api.c File Reference

Go to the source code of this file.


iLLD_TC26B: lld_codingRules.c File Reference

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  • codingRules
lld_codingRules.c File Reference

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iLLD_TC26B: lld_codingRules_codeFormating.c File Reference

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lld_codingRules_codeFormating.c File Reference

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iLLD_TC26B: lld_codingRules_commonApis.c File Reference

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lld_codingRules_commonApis.c File Reference

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iLLD_TC26B: lld_conventions.c File Reference

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lld_conventions.c File Reference

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iLLD_TC26B: lld_conventionsDoxygen.c File Reference

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lld_conventionsDoxygen.c File Reference

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iLLD_TC26B: lld_dosanddont.c File Reference

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lld_dosanddont.c File Reference

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iLLD_TC26B: lld_dosanddont_enumUsage.c File Reference

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lld_dosanddont_enumUsage.c File Reference

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iLLD_TC26B: lld_dosanddont_namingConvention.c File Reference

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lld_dosanddont_namingConvention.c File Reference

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iLLD_TC26B: lld_dosanddont_optimisation.c File Reference

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lld_dosanddont_optimisation.c File Reference

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iLLD_TC26B: lld_filesAndConfig.c File Reference

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lld_filesAndConfig.c File Reference

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iLLD_TC26B: lld_structure.c File Reference

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lld_structure.c File Reference

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iLLD_TC26B: lld_versioning.c File Reference

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lld_versioning.c File Reference

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iLLD_TC26B: mainpage.c File Reference

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mainpage.c File Reference

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iLLD_TC26B: Platform_Types.h File Reference

  • Cpu
  • Std
Macros | Typedefs
Platform_Types.h File Reference

Go to the source code of this file.

Macros

#define | PLATFORM_VENDOR_ID (17u)
#define | PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)
#define | PLATFORM_AR_RELEASE_MINOR_VERSION (2u)
#define | PLATFORM_AR_RELEASE_REVISION_VERSION (2u)
#define | PLATFORM_SW_MAJOR_VERSION (1u)
#define | PLATFORM_SW_MINOR_VERSION (0u)
#define | PLATFORM_SW_PATCH_VERSION (0u)
#define | CPU_TYPE_8 (8u)
#define | CPU_TYPE_16 (16u)
#define | CPU_TYPE_32 (32u)
#define | CPU_TYPE CPU_TYPE_32 /* 32 bit */
#define | MSB_FIRST (0u) /* Big Endian bit ordering */
#define | LSB_FIRST (1u) /* Little Endian bit ordering */
#define | CPU_BIT_ORDER LSB_FIRST /* Little Endian */
#define | HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */
#define | LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */
#define | CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */
#define | TRUE (1u)
#define | FALSE (0u)

Typedefs

typedef unsigned char | boolean
typedef unsigned char | uint8
typedef unsigned short | uint16
typedef unsigned long | uint32
typedef unsigned long long | uint64
typedef signed char | sint8
typedef short | sint16
typedef long | sint32
typedef long long | sint64
typedef unsigned long | uint8_least
typedef unsigned long | uint16_least
typedef unsigned long | uint32_least
typedef signed long | sint8_least
typedef signed long | sint16_least
typedef signed long | sint32_least
typedef float | float32
typedef double | float64

Macro Definition Documentation

◆ CPU_BIT_ORDER

#define CPU_BIT_ORDER LSB_FIRST /* Little Endian */

Definition at line 71 of file Platform_Types.h.

◆ CPU_BYTE_ORDER

#define CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */

Definition at line 80 of file Platform_Types.h.

◆ CPU_TYPE

#define CPU_TYPE CPU_TYPE_32 /* 32 bit */

Definition at line 62 of file Platform_Types.h.

◆ CPU_TYPE_16

#define CPU_TYPE_16 (16u)

Definition at line 59 of file Platform_Types.h.

◆ CPU_TYPE_32

#define CPU_TYPE_32 (32u)

Definition at line 60 of file Platform_Types.h.

◆ CPU_TYPE_8

#define CPU_TYPE_8 (8u)

Definition at line 58 of file Platform_Types.h.

◆ FALSE

#define FALSE (0u)

Definition at line 90 of file Platform_Types.h.

Referenced by Ifx_AngleTrkF32_initConfig(), Ifx_AngleTrkF32_step(), Ifx_Crc_createTable(), Ifx_Crc_init(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), Ifx_Fifo_init(), Ifx_Fifo_isEmpty(), Ifx_Fifo_read(), Ifx_Fifo_write(), Ifx_GlobalResources_init(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_cmdEscapeProcess(), Ifx_Shell_execute(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_matchToken(), Ifx_Shell_parseAddress(), Ifx_Shell_parseFloat32(), Ifx_Shell_parseFloat64(), Ifx_Shell_parseSInt32(), Ifx_Shell_parseSInt64(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt32(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingle(), Ifx_Shell_showHelpSingleCommand(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_initModuleConfig(), IfxAsclin_Asc_isrTransmit(), IfxAsclin_Asc_stdIfDPipeInit(), IfxAsclin_Lin_ignoreHeader(), IfxAsclin_Lin_initModule(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Lin_isrError(), IfxAsclin_Lin_isrReceive(), IfxAsclin_Lin_isrTransmit(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_receiveHeader(), IfxAsclin_Lin_receiveResponse(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxAsclin_Spi_initModule(), IfxAsclin_Spi_initModuleConfig(), IfxCcu6_disableDelayBypass(), IfxCcu6_disableModulationOutput(), IfxCcu6_disableMultiChannelMode(), IfxCcu6_disableT13InvertedModulation(), IfxCcu6_disableTrapPin(), IfxCcu6_enableModule(), IfxCcu6_getDeadTimeStatus(), IfxCcu6_getHallPatternSampleState(), IfxCcu6_getInterruptStatusFlag(), IfxCcu6_getShadowTransferStatus(), IfxCcu6_getT12CaptureCompareState(), IfxCcu6_getT12CountDirection(), IfxCcu6_getTimerAvailabilityStatus(), IfxCcu6_getTimerRunStatus(), IfxCcu6_Icu_initChannelConfig(), IfxCcu6_Icu_initModule(), IfxCcu6_Icu_initModuleConfig(), IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModule(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmHl_disable(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_setupChannels(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModule(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_run(), IfxCcu6_TPwm_initModule(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCif_Cam_getLastJpegEncodingInfo(), IfxCif_Cam_init(), IfxCif_Cam_isEmulationExtensionAvailable(), IfxCif_programJpeTable(), IfxCpu_acquireMutex(), IfxCpu_isAddressCachable(), IfxCpu_restoreInterrupts(), IfxCpu_setCoreMode(), IfxCpu_setProgramCounter(), IfxCpu_setSpinLock(), IfxDma_Dma_initChannelConfig(), IfxDma_getDoubleBufferRead(), IfxDsadc_Dsadc_initCarrierGen(), IfxDsadc_Dsadc_initCarrierGenConfig(), IfxDsadc_Dsadc_initChannelConfig(), IfxDsadc_Dsadc_initCombFilter(), IfxDsadc_Dsadc_initFirFilter(), IfxDsadc_Rdc_initConfig(), IfxDsadc_Rdc_initGtmTim(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_update(), IfxDts_Dts_initModuleConfig(), IfxDts_isBusy(), IfxDts_isReady(), IfxEmem_isModuleEnabled(), IfxEray_changePocState(), IfxEray_Eray_Node_initConfig(), IfxEray_getInputBufferBusyHostStatus(), IfxEray_getInputBufferBusyShadowStatus(), IfxEray_getMessageBufferInterruptStatus(), IfxEray_getNewDataInterruptStatus(), IfxEray_getOutputBufferBusyShadowStatus(), IfxEray_setMessageBufferInterruptDestination(), IfxEray_setNewDataInterruptDestination(), IfxEth_getLoopbackMode(), IfxEth_getRxDataLength(), IfxEth_Phy_Pef7071_link(), IfxEth_TxDescr_isAvailable(), IfxFce_Crc_initCrcConfig(), IfxFft_Fft_initDma(), IfxFft_Fft_initJobConfig(), IfxFft_Fft_initModule(), IfxFft_Fft_startJob(), IfxGpt12_IncrEnc_init(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_Pwm_stop(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_updateCenterAligned(), IfxGtm_Atom_PwmHl_updateEdgeAligned(), IfxGtm_Atom_PwmHl_updatePulse(), IfxGtm_Atom_PwmHl_updateShiftCenterAligned(), IfxGtm_Atom_Timer_init(), IfxGtm_Cmu_getClkFrequency(), IfxGtm_Cmu_getEclkFrequency(), IfxGtm_Cmu_getFxClkFrequency(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_Tim_In_clearNewData(), IfxGtm_Tim_In_init(), IfxGtm_Tim_In_initConfig(), IfxGtm_Tim_In_update(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_Pwm_stop(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_updateCenterAligned(), IfxGtm_Tom_PwmHl_updateEdgeAligned(), IfxGtm_Tom_PwmHl_updatePulse(), IfxGtm_Tom_PwmHl_updateShiftCenterAligned(), IfxGtm_Tom_Timer_init(), IfxGtm_Trig_fromDsadc(), IfxGtm_Trig_toVadc(), IfxHssl_Hssl_initChannel(), IfxHssl_Hssl_initHsctModule(), IfxHssl_Hssl_initHsctModuleConfig(), IfxI2c_busIsFree(), IfxI2c_getErrorInterruptSourceStatus(), IfxI2c_getProtocolInterruptSourceStatus(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxI2c_isFifoRequest(), IfxI2c_releaseBus(), IfxIom_Driver_initLam(), IfxIom_Driver_initLamConfig(), IfxIom_Driver_isLamMonGlitch(), IfxIom_Driver_isLamRefGlitch(), IfxMtu_enableErrorTracking(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxMultican_Can_initModule(), IfxMultican_Can_MsgObj_init(), IfxMultican_Can_MsgObj_initConfig(), IfxMultican_Can_Node_getConfig(), IfxMultican_Can_Node_init(), IfxMultican_Can_Node_initConfig(), IfxMultican_Message_init(), IfxMultican_MsgObj_cancelSend(), IfxMultican_MsgObj_getStatusFlag(), IfxMultican_MsgObj_isRxPending(), IfxMultican_MsgObj_isTransmitRequested(), IfxMultican_MsgObj_isTxPending(), IfxMultican_MsgObj_readLongFrame(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_Node_setAnalyzerMode(), IfxMultican_Node_setBitTiming(), IfxMultican_Node_setFastBitTiming(), IfxMultican_Node_setLoopBackMode(), IfxMultican_Node_setNominalBitTiming(), IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getPinState(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initChannelConfig(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_readChannelFrame(), IfxPsi5_Psi5_sendChannelData(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initChannelConfig(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxPsi5s_Psi5s_sendChannelData(), IfxPsi5s_Psi5s_setBaudrate(), IfxQspi_calculateDelayConstants(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_calculateTimeQuantumLength(), IfxQspi_isModuleEnabled(), IfxQspi_recalcBasicConfiguration(), IfxQspi_SpiMaster_initChannel(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_initModuleConfig(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_exchange(), IfxQspi_SpiSlave_initModule(), IfxQspi_SpiSlave_initModuleConfig(), IfxQspi_SpiSlave_isrDmaReceive(), IfxQspi_SpiSlave_isrError(), IfxQspi_SpiSlave_read(), IfxScuEru_disableAutoClear(), IfxScuEru_disableFallingEdgeDetection(), IfxScuEru_disablePatternDetectionTrigger(), IfxScuEru_disableRisingEdgeDetection(), IfxScuEru_disableTriggerPulse(), IfxScuEru_getEventFlagStatus(), IfxScuEru_getPatternDetectionResult(), IfxScuWdt_initConfig(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModule(), IfxSmu_initFsp(), IfxSmu_initFspConfig(), IfxSmu_unlock(), IfxSrc_isOverrun(), IfxSrc_isRequested(), IfxStdIf_Pos_initConfig(), IfxStdIf_PwmHl_initConfig(), IfxStdIf_Timer_initConfig(), IfxStm_initCompare(), IfxStm_Timer_init(), IfxVadc_Adc_getChannelConfig(), IfxVadc_Adc_getGroupConfig(), IfxVadc_Adc_initChannel(), IfxVadc_Adc_initChannelConfig(), IfxVadc_Adc_initGroup(), IfxVadc_Adc_initGroupConfig(), IfxVadc_Adc_initModuleConfig(), IfxVadc_isPostCalibration(), IfxVadc_setArbiterPriority(), IfxVadc_startupCalibration(), isDeadLine(), poll(), SpiIf_wait(), and wait().

◆ HIGH_BYTE_FIRST

#define HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */

Definition at line 77 of file Platform_Types.h.

◆ LOW_BYTE_FIRST

#define LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */

Definition at line 78 of file Platform_Types.h.

◆ LSB_FIRST

#define LSB_FIRST (1u) /* Little Endian bit ordering */

Definition at line 69 of file Platform_Types.h.

◆ MSB_FIRST

#define MSB_FIRST (0u) /* Big Endian bit ordering */

Definition at line 68 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_MAJOR_VERSION

#define PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)

Definition at line 49 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_MINOR_VERSION

#define PLATFORM_AR_RELEASE_MINOR_VERSION (2u)

Definition at line 50 of file Platform_Types.h.

◆ PLATFORM_AR_RELEASE_REVISION_VERSION

#define PLATFORM_AR_RELEASE_REVISION_VERSION (2u)

Definition at line 51 of file Platform_Types.h.

◆ PLATFORM_SW_MAJOR_VERSION

#define PLATFORM_SW_MAJOR_VERSION (1u)

Definition at line 52 of file Platform_Types.h.

◆ PLATFORM_SW_MINOR_VERSION

#define PLATFORM_SW_MINOR_VERSION (0u)

Definition at line 53 of file Platform_Types.h.

◆ PLATFORM_SW_PATCH_VERSION

#define PLATFORM_SW_PATCH_VERSION (0u)

Definition at line 54 of file Platform_Types.h.

◆ PLATFORM_VENDOR_ID

#define PLATFORM_VENDOR_ID (17u)

Definition at line 48 of file Platform_Types.h.

◆ TRUE

#define TRUE (1u)

Definition at line 87 of file Platform_Types.h.

Referenced by Ifx_AngleTrkF32_stdIfPosInit(), Ifx_Console_print(), Ifx_Console_printAlign(), Ifx_Crc_createTable(), Ifx_Crc_init(), Ifx_Fifo_canReadCount(), Ifx_Fifo_canWriteCount(), Ifx_Fifo_clear(), Ifx_Fifo_init(), Ifx_Fifo_isEmpty(), Ifx_GlobalResources_init(), Ifx_Shell_bbProtocolStart(), Ifx_Shell_init(), Ifx_Shell_initConfig(), Ifx_Shell_isEndOfLine(), Ifx_Shell_matchToken(), Ifx_Shell_parseSInt32(), Ifx_Shell_parseToken(), Ifx_Shell_parseUInt32(), Ifx_Shell_parseUInt64(), Ifx_Shell_process(), Ifx_Shell_protocolStart(), Ifx_Shell_showHelp(), Ifx_Shell_showHelpSingleCommand(), IfxAsclin_Asc_blockingRead(), IfxAsclin_Asc_initiateTransmission(), IfxAsclin_Asc_initModule(), IfxAsclin_Asc_isrReceive(), IfxAsclin_Asc_stdIfDPipeInit(), IfxAsclin_Asc_write(), IfxAsclin_initCtsPin(), IfxAsclin_Lin_initModuleConfig(), IfxAsclin_Lin_isrError(), IfxAsclin_Lin_prepareHeaderReception(), IfxAsclin_Lin_prepareResponseReception(), IfxAsclin_Lin_sendFrame(), IfxAsclin_Lin_sendHeader(), IfxAsclin_Lin_sendResponse(), IfxAsclin_setBitTiming(), IfxAsclin_Spi_initModule(), IfxCcu6_clearDeadTimeCounters(), IfxCcu6_disableModule(), IfxCcu6_enableDelayBypass(), IfxCcu6_enableHallPatternShadowTransfer(), IfxCcu6_enableModulationOutput(), IfxCcu6_enableMultiChannelMode(), IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(), IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(), IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(), IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(), IfxCcu6_enableT13InvertedModulation(), IfxCcu6_enableTrapPin(), IfxCcu6_getDeadTimeStatus(), IfxCcu6_getHallPatternSampleState(), IfxCcu6_getInterruptStatusFlag(), IfxCcu6_getShadowTransferStatus(), IfxCcu6_getT12CaptureCompareState(), IfxCcu6_getT12CountDirection(), IfxCcu6_getTimerAvailabilityStatus(), IfxCcu6_getTimerRunStatus(), IfxCcu6_Icu_startCapture(), IfxCcu6_Icu_stopCapture(), IfxCcu6_PwmBc_initModuleConfig(), IfxCcu6_PwmBc_start(), IfxCcu6_PwmBc_stop(), IfxCcu6_PwmHl_enable(), IfxCcu6_PwmHl_init(), IfxCcu6_PwmHl_setDeadtime(), IfxCcu6_PwmHl_setMinPulse(), IfxCcu6_PwmHl_setMode(), IfxCcu6_PwmHl_stdIfPwmHlInit(), IfxCcu6_setT12Frequency(), IfxCcu6_setT13Frequency(), IfxCcu6_Timer_countOneStep(), IfxCcu6_Timer_initModuleConfig(), IfxCcu6_Timer_start(), IfxCcu6_Timer_startSingleShotMode(), IfxCcu6_Timer_stop(), IfxCcu6_Timer_synchronousStart(), IfxCcu6_Timer_synchronousStop(), IfxCcu6_TimerWithTrigger_applyUpdate(), IfxCcu6_TimerWithTrigger_init(), IfxCcu6_TimerWithTrigger_run(), IfxCcu6_TimerWithTrigger_setPeriod(), IfxCcu6_TimerWithTrigger_stdIfTimerInit(), IfxCcu6_TimerWithTrigger_stop(), IfxCcu6_TPwm_initModuleConfig(), IfxCcu6_TPwm_start(), IfxCcu6_TPwm_stop(), IfxCif_Cam_getLastJpegEncodingInfo(), IfxCif_Cam_isEmulationExtensionAvailable(), IfxCif_programJpeTable(), IfxCpu_acquireMutex(), IfxCpu_isAddressCachable(), IfxCpu_setCoreMode(), IfxCpu_setProgramCounter(), IfxCpu_setSpinLock(), IfxCpu_startCore(), IfxDma_getAndClearChannelInterrupt(), IfxDma_getAndClearChannelPatternDetectionInterrupt(), IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(), IfxDma_getAndClearChannelWrapSourceBufferInterrupt(), IfxDsadc_Dsadc_initChannelConfig(), IfxDsadc_Rdc_init(), IfxDsadc_Rdc_initHwChannels(), IfxDsadc_Rdc_initHwTimestamp(), IfxDsadc_Rdc_stdIfPosInit(), IfxDts_Dts_initModule(), IfxDts_isBusy(), IfxDts_isReady(), IfxEmem_isModuleEnabled(), IfxEray_changePocState(), IfxEray_Eray_Node_initConfig(), IfxEray_Eray_Node_initMessageRAM(), IfxEray_Eray_receiveFifoFrame(), IfxEray_Eray_receiveFrame(), IfxEray_Eray_transmitFrame(), IfxEray_Eray_wakeUpChannel(), IfxEray_getInputBufferBusyHostStatus(), IfxEray_getInputBufferBusyShadowStatus(), IfxEray_getMessageBufferInterruptStatus(), IfxEray_getNewDataInterruptStatus(), IfxEray_getOutputBufferBusyShadowStatus(), IfxEray_setSlot(), IfxEth_getLoopbackMode(), IfxEth_Phy_Pef7071_link(), IfxEth_TxDescr_isAvailable(), IfxFce_Crc_initCrcConfig(), IfxFft_Fft_initDma(), IfxGpt12_IncrEnc_init(), IfxGpt12_IncrEnc_initConfig(), IfxGpt12_IncrEnc_stdIfPosInit(), IfxGtm_Atom_Ch_getClockFrequency(), IfxGtm_Atom_Pwm_init(), IfxGtm_Atom_Pwm_initConfig(), IfxGtm_Atom_Pwm_start(), IfxGtm_Atom_PwmHl_init(), IfxGtm_Atom_PwmHl_initConfig(), IfxGtm_Atom_PwmHl_setDeadtime(), IfxGtm_Atom_PwmHl_setMinPulse(), IfxGtm_Atom_PwmHl_setMode(), IfxGtm_Atom_PwmHl_stdIfPwmHlInit(), IfxGtm_Atom_Timer_init(), IfxGtm_Atom_Timer_initConfig(), IfxGtm_Atom_Timer_run(), IfxGtm_Atom_Timer_setPeriod(), IfxGtm_Atom_Timer_stdIfTimerInit(), IfxGtm_Atom_Timer_stop(), IfxGtm_Cmu_setEclkFrequency(), IfxGtm_Cmu_setGclkFrequency(), IfxGtm_Tbu_getClockFrequency(), IfxGtm_Tim_Ch_getCaptureClockFrequency(), IfxGtm_Tim_Ch_getFilterClockFrequency(), IfxGtm_Tim_Ch_getTimeoutClockFrequency(), IfxGtm_Tim_In_init(), IfxGtm_Tom_Ch_getClockFrequency(), IfxGtm_Tom_Pwm_init(), IfxGtm_Tom_Pwm_initConfig(), IfxGtm_Tom_Pwm_start(), IfxGtm_Tom_PwmHl_init(), IfxGtm_Tom_PwmHl_initConfig(), IfxGtm_Tom_PwmHl_setDeadtime(), IfxGtm_Tom_PwmHl_setMinPulse(), IfxGtm_Tom_PwmHl_setMode(), IfxGtm_Tom_PwmHl_stdIfPwmHlInit(), IfxGtm_Tom_Timer_init(), IfxGtm_Tom_Timer_initConfig(), IfxGtm_Tom_Timer_run(), IfxGtm_Tom_Timer_setPeriod(), IfxGtm_Tom_Timer_stdIfTimerInit(), IfxGtm_Tom_Timer_stop(), IfxHssl_Hssl_prepareStream(), IfxI2c_busIsFree(), IfxI2c_getErrorInterruptSourceStatus(), IfxI2c_getProtocolInterruptSourceStatus(), IfxI2c_I2c_read(), IfxI2c_I2c_write(), IfxI2c_isFifoRequest(), IfxIom_Driver_init(), IfxIom_Driver_initLam(), IfxMtu_isErrorTrackingEnabled(), IfxMtu_isErrorTrackingOverflow(), IfxMultican_Can_MsgObj_init(), IfxMultican_Can_MsgObj_initConfig(), IfxMultican_Can_Node_getConfig(), IfxMultican_Can_Node_init(), IfxMultican_MsgObj_cancelSend(), IfxMultican_MsgObj_getStatusFlag(), IfxMultican_MsgObj_isRxPending(), IfxMultican_MsgObj_isTransmitRequested(), IfxMultican_MsgObj_isTxPending(), IfxMultican_MsgObj_readLongFrame(), IfxMultican_MsgObj_sendLongFrame(), IfxMultican_Node_initRxPin(), IfxMultican_Node_initTxPin(), IfxPort_disableEmergencyStop(), IfxPort_enableEmergencyStop(), IfxPort_getPinState(), IfxPsi5_Psi5_initChannel(), IfxPsi5_Psi5_initModule(), IfxPsi5_Psi5_readChannelFrame(), IfxPsi5_Psi5_readChannelSerialMessage(), IfxPsi5_Psi5_sendChannelData(), IfxPsi5_Psi5_startupChannel(), IfxPsi5s_Psi5s_initChannel(), IfxPsi5s_Psi5s_initModule(), IfxPsi5s_Psi5s_initModuleConfig(), IfxPsi5s_Psi5s_sendChannelData(), IfxQspi_calculateDelayConstants(), IfxQspi_calculateExtendedConfigurationValue(), IfxQspi_isModuleEnabled(), IfxQspi_SpiMaster_exchange(), IfxQspi_SpiMaster_initModule(), IfxQspi_SpiMaster_write(), IfxQspi_SpiMaster_writeLong(), IfxQspi_SpiSlave_exchange(), IfxQspi_SpiSlave_initModule(), IfxScuCcu_initErayPll(), IfxScuEru_enableAutoClear(), IfxScuEru_enableFallingEdgeDetection(), IfxScuEru_enablePatternDetectionTrigger(), IfxScuEru_enableRisingEdgeDetection(), IfxScuEru_enableTriggerPulse(), IfxScuEru_getEventFlagStatus(), IfxScuEru_getPatternDetectionResult(), IfxSent_Sent_initChannel(), IfxSent_Sent_initChannelConfig(), IfxSent_Sent_initModule(), IfxSent_Sent_initModuleConfig(), IfxSent_Sent_readChannelSerialDataFrame(), IfxSent_Sent_readChannelSerialMessageFrame(), IfxSmu_initFsp(), IfxSmu_unlock(), IfxSrc_isOverrun(), IfxSrc_isRequested(), IfxStm_initCompare(), IfxStm_Timer_init(), IfxStm_Timer_setPeriod(), IfxStm_Timer_stdIfTimerInit(), IfxVadc_Adc_clearQueue(), IfxVadc_Adc_getChannelConfig(), IfxVadc_Adc_getGroupConfig(), IfxVadc_Adc_initGroup(), IfxVadc_Adc_initGroupConfig(), IfxVadc_Adc_initModule(), IfxVadc_disablePostCalibration(), and IfxVadc_startupCalibration().

Typedef Documentation

◆ boolean

typedef unsigned char boolean

Definition at line 101 of file Platform_Types.h.

◆ float32

typedef float float32

Definition at line 167 of file Platform_Types.h.

◆ float64

typedef double float64

Definition at line 172 of file Platform_Types.h.

◆ sint16

typedef short sint16

Definition at line 126 of file Platform_Types.h.

◆ sint16_least

typedef signed long sint16_least

Definition at line 158 of file Platform_Types.h.

◆ sint32

typedef long sint32

Definition at line 131 of file Platform_Types.h.

◆ sint32_least

typedef signed long sint32_least

Definition at line 162 of file Platform_Types.h.

◆ sint64

typedef long long sint64

Definition at line 138 of file Platform_Types.h.

◆ sint8

typedef signed char sint8

Definition at line 122 of file Platform_Types.h.

◆ sint8_least

typedef signed long sint8_least

Definition at line 154 of file Platform_Types.h.

◆ uint16

typedef unsigned short uint16

Definition at line 109 of file Platform_Types.h.

◆ uint16_least

typedef unsigned long uint16_least

Definition at line 146 of file Platform_Types.h.

◆ uint32

typedef unsigned long uint32

Definition at line 113 of file Platform_Types.h.

◆ uint32_least

typedef unsigned long uint32_least

Definition at line 150 of file Platform_Types.h.

◆ uint64

typedef unsigned long long uint64

Definition at line 118 of file Platform_Types.h.

◆ uint8

typedef unsigned char uint8

Definition at line 105 of file Platform_Types.h.

◆ uint8_least

typedef unsigned long uint8_least

Definition at line 142 of file Platform_Types.h.


iLLD_TC26B: SpiIf.c File Reference

  • Service
  • CpuGeneric
  • If
Functions
SpiIf.c File Reference

SPI interface. More...

#include "SpiIf.h"
Include dependency graph for SpiIf.c:

Go to the source code of this file.

Functions

void | SpiIf_initConfig (SpiIf_Config *config)
void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)

Detailed Description

SPI interface.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:21 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file SpiIf.c.


iLLD_TC26B: SpiIf.h File Reference

  • Service
  • CpuGeneric
  • If
Data Structures | Typedefs | Enumerations | Functions
SpiIf.h File Reference

SPI interface types. More...

#include "Src/Std/IfxSrc.h"
Include dependency graph for SpiIf.h:

Go to the source code of this file.

Data Structures

struct | SpiIf_Flags
struct | SpiIf_Job
struct | SpiIf_funcs
struct | SpiIf_
struct | SpiIf_Config
struct | Spi_ErrorChecks
struct | SpiIf_ChMode
struct | SpiIf_Ch_
struct | SpiIf_ChConfig_

Typedefs

typedef struct SpiIf_Ch_ | SpiIf_Ch
Alias to the channel structure. More...
typedef struct SpiIf_ChConfig_ | SpiIf_ChConfig
typedef struct SpiIf_ | SpiIf
typedef SpiIf_Status(* | SpiIf_Exchange) (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
typedef SpiIf_Status(* | SpiIf_GetStatus) (SpiIf_Ch *handle)
typedef void(* | SpiIf_OnEvent) (SpiIf *handle)
typedef uint32 | SpiIf_SlsoTiming_HalfTsclk
typedef void(* | SpiIf_Cbk) (void *data)
SPI channel callback prototype. More...
typedef void(* | TxRxHandler) (SpiIf_Ch *handle)

Enumerations

enum SpiIf_Status {
SpiIf_Status_ok,
SpiIf_Status_busy,
SpiIf_Status_unknown
}
SPI Interface Status. More...
enum SpiIf_SlsoTiming {
SpiIf_SlsoTiming_0 = 0,
SpiIf_SlsoTiming_1,
SpiIf_SlsoTiming_2,
SpiIf_SlsoTiming_3,
SpiIf_SlsoTiming_4,
SpiIf_SlsoTiming_5,
SpiIf_SlsoTiming_6,
SpiIf_SlsoTiming_7
}
Slave select output timing. More...
enum SpiIf_DataHeading {
SpiIf_DataHeading_lsbFirst = 0,
SpiIf_DataHeading_msbFirst
}
Heading. More...
enum SpiIf_ShiftClock {
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0,
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
}
Clock phase. More...
enum SpiIf_ClockPolarity {
SpiIf_ClockPolarity_idleLow = 0,
SpiIf_ClockPolarity_idleHigh
}
Clock polarity. More...
enum SpiIf_Mode {
SpiIf_Mode_master,
SpiIf_Mode_slave,
SpiIf_Mode_undefined
}

Functions

IFX_INLINE void | SpiIf_wait (SpiIf_Ch *handle)
IFX_EXTERN void | SpiIf_initConfig (SpiIf_Config *config)
IFX_EXTERN void | SpiIf_initChannelConfig (SpiIf_ChConfig *config, SpiIf *driver)
Virtual functions

These functions are implemented by a driver.

IFX_INLINE SpiIf_Status | SpiIf_exchange (SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
IFX_INLINE SpiIf_Status | SpiIf_getStatus (SpiIf_Ch *handle)

Detailed Description

SPI interface types.

Copyright
Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
Date
2014-02-27 20:08:22 GMT
                            IMPORTANT NOTICE

Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.

THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

Definition in file SpiIf.h.


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- $ -

  • $ $sb : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- _ -

  • ___setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __abs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __abs_stdreal : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __absb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __absdif : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __absf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __absh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __abss : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __abssh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __addr_to_cx() : IfxCpu_Intrinsics.h
  • __adds : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __addsu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __asm__ : Ifx_TypesTasking.h
  • __bisr() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheai : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheawi : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __cacheawi_bo_post_inc : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheiwi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __clo : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __cls : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __clssf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __clz() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __cmpAndSwap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __crc32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __CSA : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __CSA_END : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __cx_to_addr() : IfxCpu_Intrinsics.h
  • __debug : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __disable : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __disable_and_save : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __dsync : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __enable : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __extr : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __extractbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extracthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extracthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractuhw2 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __extru : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __fabs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __fabsf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __fixpoint_to_float32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __float_to_fract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __float_to_sfract : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __fract_to_float : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getA11 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __gethw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __gethw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __imaskldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __initcirc() : IfxCpu_IntrinsicsDcc.h
  • __initpackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackbl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackhwl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initupackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initupackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __ins : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __insert : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __insertbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __inserthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __inserthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte1 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __insertubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insn : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __interrupt : Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __INTTAB : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __INTTAB_CPU : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __ISTACK : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __isync : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __jump_and_link : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpBackToLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpToFunction : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpToFunctionWithLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __ld32() : IfxCpu_Intrinsics.h
  • __ld64() : IfxCpu_Intrinsics.h
  • __ld64_lu() : IfxCpu_Intrinsics.h
  • __ldmst : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __ldmst_c() : IfxCpu_Intrinsics.h
  • __ldmstAsm : IfxCpu_IntrinsicsTasking.h
  • __ldmstC : IfxCpu_IntrinsicsTasking.h
  • __leqf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __mac_r_sf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __mac_sf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __max() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __max_stdreal : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __maxf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __maxs : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __maxu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __maxX : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __mem_barrier : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __mfcr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __min() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __minb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minbu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __minh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minhu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __mins : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __minu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __moveToAddrParam0 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __moveToDataParam0 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __moveToDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mtcr : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __mtcr_no_isync : IfxCpu_IntrinsicsTasking.h
  • __mulfractfract : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __mulfractlong : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __mulsc : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __non_return_call : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __nop : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __nops : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __nops1000 : IfxCpu_IntrinsicsDcc.h
  • __packb : Ifx_TypesGhs.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h
  • __packhw : Ifx_TypesGhs.h , Ifx_TypesGnuc.h , Ifx_TypesDcc.h
  • __parity : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __popcnt : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __putbit : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __restore() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __rol : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __ror : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __round16 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __roundf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __rslcx : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __s16_to_sfract : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __satb : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __satbu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __sath : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __sathu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __saturate : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __saturate_stdreal : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __saturatef : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __saturateu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __saturateX : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __scheduling_barrier() : IfxCpu_IntrinsicsDcc.h
  • __SDATA1 : CompilerTasking.h , CompilerGnuc.h , CompilerDcc.h , CompilerGhs.h
  • __SDATA2 : CompilerGnuc.h , CompilerGhs.h , CompilerTasking.h , CompilerDcc.h
  • __SDATA3 : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h , CompilerGhs.h
  • __SDATA4 : CompilerTasking.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h
  • __setareg : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __setbyte1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __setbyte2 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __setbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __setbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __sethw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __sethw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __setStackPointer : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __setubyte1 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __setubyte2 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __setubyte4 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __setuhw1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __setuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __sfract_to_s16 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __sfract_to_u16 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __shaaccum : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __shafracts : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __shasfracts : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __sqrf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __sqrtf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __st32() : IfxCpu_Intrinsics.h
  • __st64() : IfxCpu_Intrinsics.h
  • __st64_lu() : IfxCpu_Intrinsics.h
  • __stopPerfCounters : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __subs : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __subsu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __svlcx() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __swap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __syscall() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __TRAPTAB : CompilerGhs.h , CompilerTasking.h , CompilerGnuc.h , CompilerDcc.h
  • __TRAPTAB_CPU : CompilerGnuc.h , CompilerTasking.h , CompilerGhs.h , CompilerDcc.h
  • __tric_syscall : IfxCpu_IntrinsicsGnuc.h
  • __u16_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __upackb : Ifx_TypesGnuc.h , Ifx_TypesGhs.h , Ifx_TypesDcc.h
  • __upackhw : Ifx_TypesGhs.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h
  • __USTACK : CompilerDcc.h , CompilerTasking.h , CompilerGhs.h , CompilerGnuc.h
  • _Core0_start() : IfxCpu_CStart0.c
  • _Core1_start() : IfxCpu_CStart1.c , IfxCpu_CStart.h
  • _Core2_start() : IfxCpu_CStart.h
  • _DATAF : Ifx_Cf32.h
  • _START() : IfxCpu_CStart0.c


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- a -

  • ABCQMAX : IfxQspi.c
  • ABCQMIN : IfxQspi.c
  • abs : IfxCpu_IntrinsicsDcc.h
  • absdif : IfxCpu_IntrinsicsDcc.h
  • abss : IfxCpu_IntrinsicsDcc.h
  • adds : IfxCpu_IntrinsicsDcc.h
  • addTTime() : Bsp.h
  • areInterruptsEnabled() : Bsp.h
  • Assert_level : Assert.c
  • ATO_K : Ifx_AngleTrkF32.c
  • ATO_PSI : Ifx_AngleTrkF32.c
  • ATO_T : Ifx_AngleTrkF32.c


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- b -

  • bisr : IfxCpu_IntrinsicsDcc.h
  • boolean : Platform_Types.h
  • BootModeHeader_0 : IfxCpu_CStart0.c
  • BootModeHeader_1 : IfxCpu_CStart0.c
  • BSP_DEFAULT_TIMER : Bsp.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- c -

  • CFG_LONG_SIZE_T : Compilers.h
  • circ_t : Ifx_TypesDcc.h
  • clo : IfxCpu_IntrinsicsDcc.h
  • cls : IfxCpu_IntrinsicsDcc.h
  • clz : IfxCpu_IntrinsicsDcc.h
  • COMPILER_NAME : CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h
  • COMPILER_REVISION : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • COMPILER_VERSION : CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h
  • CONSOLE : Ifx_Console.h
  • CONST_CFG : Compilers.h
  • core0_main() : IfxCpu_CStart0.c
  • core1_main() : IfxCpu_CStart1.c
  • Cplx_f32_printf : Ifx_Cf32.h
  • CplxVecCpy_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecCpy_f32S() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecMag_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecMul_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecPwr_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecRst_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CPU_BIT_ORDER : Platform_Types.h
  • CPU_BYTE_ORDER : Platform_Types.h
  • CPU_TYPE : Platform_Types.h
  • CPU_TYPE_16 : Platform_Types.h
  • CPU_TYPE_32 : Platform_Types.h
  • CPU_TYPE_8 : Platform_Types.h
  • CRC_ENABLE_DPIPE : Ifx_Crc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- d -

  • DateTime_get() : Ifx_DateTime.c , Ifx_DateTime.h
  • DateTime_set() : Ifx_DateTime.h , Ifx_DateTime.c
  • debug : IfxCpu_IntrinsicsDcc.h
  • disable : IfxCpu_IntrinsicsDcc.h
  • disableInterrupts() : Bsp.h
  • dsync : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- e -

  • elapsed() : Bsp.h
  • enable : IfxCpu_IntrinsicsDcc.h
  • enableInterrupts() : Bsp.h
  • ENDL : IfxStdIf_DPipe.h
  • extr : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- f -

  • FALSE : Platform_Types.h
  • float32 : Platform_Types.h
  • float64 : Platform_Types.h
  • forceDisableInterrupts() : Bsp.h
  • fract : Ifx_TypesGnuc.h , Ifx_TypesGhs.h , Ifx_TypesTasking.h , Ifx_TypesDcc.h
  • FRACT_MAX : Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- g -

  • g_DateTimeOffset : Ifx_DateTime.c
  • getDeadLine() : Bsp.h
  • getTimeout() : Bsp.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- h -

  • h : IfxCpu_IntrinsicsDcc.h
  • HIGH_BYTE_FIRST : Platform_Types.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- i -

  • Icu : Icu.h
  • Icu_GetTimeStamp : Icu.h
  • Icu_StartCapture : Icu.h
  • Icu_StopCapture : Icu.h
  • Ifx___setareg : IfxCpu_IntrinsicsTasking.h
  • Ifx__abs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__abs_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__absb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__absdif : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__absh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__abss : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__abssh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__adds : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__addsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__bisr : IfxCpu_IntrinsicsDcc.h
  • Ifx__cacheai() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheawi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheawi_bo_post_inc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheiwi() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__clo : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cls : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__clssf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__clz : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__cmpAndSwap : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__crc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__debug : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__disable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__disable_and_save : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__dsync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__enable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extracthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extracthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extru : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fabs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fabsf() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__fixpoint_to_float32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__float_to_fract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__float_to_sfract() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__fract_to_float : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getA11() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__gethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__gethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__imaskldmst : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__initpackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackbl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackhwl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initupackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initupackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ins : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insert : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__inserthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__inserthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte3() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • Ifx__insertubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insn : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__isync : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__jump_and_link() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpBackToLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpToFunction() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpToFunctionWithLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__ldmst : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ldmstAsm() : IfxCpu_IntrinsicsTasking.h
  • Ifx__leqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mac_r_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mac_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__max : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__maxs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__maxu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mfcr : IfxCpu_IntrinsicsDcc.h
  • Ifx__min : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__minb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__minh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minhu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mins : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__moveToAddrParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__moveToDataParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__moveToDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mtcr : IfxCpu_IntrinsicsDcc.h
  • Ifx__mtcr_no_isync : IfxCpu_IntrinsicsTasking.h
  • Ifx__mulfractfract : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mulfractlong : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mulsc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__non_return_call : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__nop : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__nops() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__nops1000() : IfxCpu_IntrinsicsDcc.h
  • Ifx__parity() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__popcnt() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__putbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__restore : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__rol() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ror() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__round16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__roundf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__rslcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__s16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__satb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__satbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sath() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sathu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__saturate : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturate_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturatef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturateu : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturateX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__setbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setStackPointer() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__setubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sfract_to_s16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sfract_to_u16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shaaccum() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shafracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shasfracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sqrf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__sqrtf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__stopPerfCounters() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__subs : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__subsu : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__svlcx : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__swap() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__syscall : IfxCpu_IntrinsicsDcc.h
  • Ifx__u16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx_ActiveState : Ifx_Types.h
  • Ifx_ActiveState_high : Ifx_Types.h
  • Ifx_ActiveState_low : Ifx_Types.h
  • Ifx_AddressValue : Ifx_Types.h
  • IFX_ALIGN : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_ALIGN_128 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_16 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_256 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_32 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_64 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_8 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn128 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn16 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn256 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn32 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn64 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn8 : IfxCpu_Intrinsics.h
  • IFX_ANGLETRKF32_ATAN2F : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_bound() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_boundInput() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_getAbsolutePosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getDirection() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getFault() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getLoopSpeed() : Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getPeriodPerRotation() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getRawPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getResolution() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getSensorType() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getSpeed() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getTurn() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_init() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_initConfig() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_reset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_resetFaults() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setControlGains() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_setOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setUserSampling() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_stdIfPosInit() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_step() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_update() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_updateStatus() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • IFX_ASSERT : Ifx_Assert.h , Assert.h
  • Ifx_Assert_doLevel() : Assert.c , Assert.h
  • Ifx_Assert_doValidate() : Assert.c , Assert.h
  • IFX_ASSERT_FEATURE_NOT_AVAILABLE : Ifx_Assert.h
  • IFX_ASSERT_FEATURE_NOT_IMPLEMENTED : Ifx_Assert.h
  • Ifx_Assert_setStandardIo : Assert.h
  • Ifx_C_Init() : Compilers.h
  • IFX_Cf32_add() : Ifx_Cf32.h
  • IFX_Cf32_amp() : Ifx_Cf32.h
  • IFX_Cf32_div() : Ifx_Cf32.h
  • IFX_Cf32_dot() : Ifx_Cf32.h
  • IFX_Cf32_exp() : Ifx_Cf32.h
  • IFX_Cf32_mag() : Ifx_Cf32.h
  • IFX_Cf32_mul() : Ifx_Cf32.h
  • IFX_Cf32_reset() : Ifx_Cf32.h
  • IFX_Cf32_saturate() : Ifx_Cf32.h
  • IFX_Cf32_set() : Ifx_Cf32.h
  • IFX_Cf32_sub() : Ifx_Cf32.h
  • IFX_CFG_ANGLETRKF32_FILTERED_SPEED : Ifx_AngleTrkF32.h
  • IFX_CFG_ANGLETRKF32_SPEED_FILTER : Ifx_AngleTrkF32.h
  • IFX_CFG_ASSERT_STDIO : Assert.h
  • IFX_CFG_ASSERT_USE_BREAKPOINT : Assert.h
  • IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT : Assert.h
  • IFX_CFG_CIRCULARBUFFER_C : Ifx_CircularBuffer.h
  • IFX_CFG_CONSOLE_INDENT_SIZE : Ifx_Console.h
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE : IfxCpu_CStart1.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE : IfxCpu_CStart1.c
  • IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK : IfxCpu_CStart.h
  • IFX_CFG_CPU_TRAP_ASSERT_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_BE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_CME_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_DEBUG : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_IE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_IPE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_MME_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_NMI_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_TSR_HOOK : IfxCpu_Trap.c
  • IFX_CFG_GLOBAL_RESOURCES_ENABLED : Ifx_GlobalResources.h
  • IFX_CFG_SCU_PLL_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SCU_XTAL_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SHELL_CMD_HISTORY_SIZE : Ifx_Shell.h
  • IFX_CFG_SHELL_CMD_LINE_SIZE : Ifx_Shell.h
  • IFX_CFG_SHELL_COMMAND_LISTS : Ifx_Shell.h
  • IFX_CFG_SHELL_PROMPT : Ifx_Shell.h
  • Ifx_CircularBuffer_addDataIncr() : Ifx_CircularBuffer.c
  • Ifx_CircularBuffer_get16() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_get32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_read32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_read8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_write32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_write8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_ClpxFloat32_Integral_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_ClpxFloat32_Integral_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_ClpxFloat32_Integral_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_Console_decrAlign() : Ifx_Console.h
  • Ifx_Console_getIo() : Ifx_Console.h
  • Ifx_Console_incrAlign() : Ifx_Console.h
  • Ifx_Console_init() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Console_print() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Console_printAlign() : Ifx_Console.c , Ifx_Console.h
  • IFX_CONST : Compilers.h
  • Ifx_COUNTOF : IfxCpu_Intrinsics.h
  • Ifx_Crc_bitByBit() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_bitByBitFast() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_createTable() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_init() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_reflect() : Ifx_Crc.c
  • Ifx_Crc_table() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_tableFast() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_DataBufferMode : Ifx_Types.h
  • Ifx_DataBufferMode_normal : Ifx_Types.h
  • Ifx_DataBufferMode_timeStampSingle : Ifx_Types.h
  • IFX_EXTERN : Compilers.h
  • IFX_F32_LUTL_SINCOS_ELEMENT_COUNT : Ifx_LutLSincosF32.c
  • IFX_FAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • Ifx_FftF32_generateTwiddleFactor() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_lookUpReversedBits() : Ifx_FftF32.h
  • Ifx_FftF32_lookUpTwiddleFactor() : Ifx_FftF32.h
  • IFX_FFTF32_MAX_LENGTH : Ifx_FftF32.h
  • IFX_FFTF32_MAX_RESOLUTION : Ifx_FftF32.h
  • Ifx_FftF32_radix2() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_radix2DecimationInTime() : Ifx_FftF32.c
  • Ifx_FftF32_radix2I() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_reverseBits() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_Fifo : Ifx_Fifo.h
  • Ifx_Fifo_canReadCount() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_canWriteCount() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_clear() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_create() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_destroy() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_flush() : Ifx_Fifo.h
  • Ifx_Fifo_init() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_isEmpty() : Ifx_Fifo.h
  • Ifx_Fifo_read() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_readCount() : Ifx_Fifo.h
  • Ifx_Fifo_write() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_writeCount() : Ifx_Fifo.h
  • Ifx_g_console : Ifx_Console.c , Ifx_Console.h
  • Ifx_g_FftF32_bitReverseTable : Ifx_FftF32.h , Ifx_FftF32_BitReverseTable.c
  • Ifx_g_FftF32_twiddleTable : Ifx_FftF32.h , Ifx_FftF32_TwiddleTable.c
  • Ifx_g_LutAtan2F32_FxpAngle_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c
  • Ifx_g_LutAtan2F32_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c
  • Ifx_g_LutLSincosF32 : Ifx_LutLSincosF32.c , Ifx_LutLSincosF32.h
  • Ifx_g_LutLSincosF32_table : Ifx_LutLSincosF32.c
  • Ifx_g_LutSincosF32_table : Ifx_LutSincosF32.h , Ifx_LutSincosF32_Table.c
  • Ifx_g_WndF32_blackmanHarrisTable : Ifx_WndF32.h , Ifx_WndF32_BlackmanHarrisTable.c
  • Ifx_g_WndF32_hannTable : Ifx_WndF32.h , Ifx_WndF32_HannTable.c
  • Ifx_GlobalResources_get() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getIndex() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getItem() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getName() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_init() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GTM_TOM_TGC : IfxGtm_cfg.h
  • IFX_INLINE : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • Ifx_IntegralF32_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_IntegralF32_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_IntegralF32_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_InternalMux_init() : Ifx_InternalMux.c , Ifx_InternalMux.h
  • IFX_INTERRUPT : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , Compilers.h , CompilerTasking.h
  • IFX_INTERRUPT_FAST : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT_INTERNAL : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT_LEGACY : CompilerDcc.h
  • IFX_LLD_VERSION_GENERATION : IfxLldVersion.h
  • IFX_LLD_VERSION_MAJOR : IfxLldVersion.h
  • IFX_LLD_VERSION_MAJOR_UPDATE : IfxLldVersion.h
  • IFX_LLD_VERSION_MINOR : IfxLldVersion.h
  • IFX_LLD_VERSION_REVISION : IfxLldVersion.h
  • Ifx_LowPassPt1F32_do() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h
  • Ifx_LowPassPt1F32_init() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h
  • Ifx_LowPassPt1F32_reset() : Ifx_LowPassPt1F32.h
  • IFX_LUT_ANGLE_BITS : Ifx_Lut.h
  • IFX_LUT_ANGLE_PI : Ifx_Lut.h
  • IFX_LUT_ANGLE_RESOLUTION : Ifx_Lut.h
  • IFX_LUT_F32_TO_FXPANGLE : Ifx_Lut.h
  • Ifx_Lut_FxpAngle : Ifx_Lut.h
  • IFX_LUT_FXPANGLE_TO_F32 : Ifx_Lut.h
  • IFX_LUT_TABLE : Ifx_Lut.h
  • IFX_LUT_TABLE_CONST : Ifx_Lut.h
  • Ifx_LutAtan2F32_float32() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutAtan2F32_float32Private() : Ifx_LutAtan2F32.c
  • Ifx_LutAtan2F32_fxpAngle() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutAtan2F32_fxpAnglePrivate() : Ifx_LutAtan2F32.c
  • Ifx_LutAtan2F32_init() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • IFX_LUTATAN2F32_SIZE : Ifx_LutAtan2F32.h
  • Ifx_LutIndexedLinearF32_search() : Ifx_LutIndexedLinearF32.h
  • Ifx_LutLinearF32_searchBin() : Ifx_LutLinearF32.c , Ifx_LutLinearF32.h
  • Ifx_LutLinearF32_searchNegSeq() : Ifx_LutLinearF32.h
  • Ifx_LutLinearF32_searchPosSeq() : Ifx_LutLinearF32.h
  • Ifx_LutLSincosF32_cos() : Ifx_LutLSincosF32.h
  • Ifx_LutLSincosF32_cossin() : Ifx_LutLSincosF32.h
  • Ifx_LutLSincosF32_sin() : Ifx_LutLSincosF32.h
  • Ifx_LutSincosF32_cos() : Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_cossin() : Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_init() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_sin() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h
  • IFX_NEAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_ONE_OVER_SQRT_THREE : Ifx_Types.h
  • IFX_ONES : Ifx_Types.h
  • IFX_PACKED : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • Ifx_ParityMode : Ifx_Types.h
  • Ifx_ParityMode_even : Ifx_Types.h
  • Ifx_ParityMode_odd : Ifx_Types.h
  • IFX_PI : Ifx_Types.h
  • Ifx_Priority : Ifx_Types.h
  • Ifx_Pwm_Mode : Ifx_Types.h
  • Ifx_Pwm_Mode_centerAligned : Ifx_Types.h
  • Ifx_Pwm_Mode_centerAlignedInverted : Ifx_Types.h
  • Ifx_Pwm_Mode_count : Ifx_Types.h
  • Ifx_Pwm_Mode_init : Ifx_Types.h
  • Ifx_Pwm_Mode_leftAligned : Ifx_Types.h
  • Ifx_Pwm_Mode_off : Ifx_Types.h
  • Ifx_Pwm_Mode_rightAligned : Ifx_Types.h
  • Ifx_RampF32_getRef() : Ifx_RampF32.h
  • Ifx_RampF32_getValue() : Ifx_RampF32.h
  • Ifx_RampF32_init() : Ifx_RampF32.h
  • Ifx_RampF32_reset() : Ifx_RampF32.h
  • Ifx_RampF32_setRef() : Ifx_RampF32.h
  • Ifx_RampF32_setSlewRate() : Ifx_RampF32.h
  • Ifx_RampF32_step() : Ifx_RampF32.c , Ifx_RampF32.h
  • IFX_REL_A0 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A1 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A8 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A9 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • Ifx_RxSel : Ifx_Types.h
  • Ifx_RxSel_a : Ifx_Types.h
  • Ifx_RxSel_b : Ifx_Types.h
  • Ifx_RxSel_c : Ifx_Types.h
  • Ifx_RxSel_d : Ifx_Types.h
  • Ifx_RxSel_e : Ifx_Types.h
  • Ifx_RxSel_f : Ifx_Types.h
  • Ifx_RxSel_g : Ifx_Types.h
  • Ifx_RxSel_h : Ifx_Types.h
  • Ifx_Shell_bbProtocolStart() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_Call : Ifx_Shell.h
  • IFX_SHELL_CMD_HISTORY_NO_ITEM : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE_BRACKET : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_NORMAL : Ifx_Shell.h
  • Ifx_Shell_cmdBuffer : Ifx_Shell.c
  • Ifx_Shell_cmdEscapeProcess() : Ifx_Shell.c
  • Ifx_Shell_CmdState : Ifx_Shell.h
  • IFX_SHELL_COMMAND_LIST_END : Ifx_Shell.h
  • Ifx_Shell_commandFind() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_CommandList : Ifx_Shell.h
  • Ifx_Shell_CommandListConst : Ifx_Shell.h
  • Ifx_Shell_commandListFind() : Ifx_Shell.c
  • Ifx_Shell_deinit() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_disable() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_enable() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_execute() : Ifx_Shell.c
  • IFX_SHELL_IF_ECHO : Ifx_Shell.c
  • Ifx_Shell_init() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_initConfig() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_isEndOfLine() : Ifx_Shell.c
  • IFX_SHELL_LLD : Ifx_Shell.c
  • IFX_SHELL_LLU : Ifx_Shell.c
  • IFX_SHELL_LLX : Ifx_Shell.c
  • Ifx_Shell_matchToken() : Ifx_Shell.c , Ifx_Shell.h
  • IFX_SHELL_MAX_MESSAGE_SIZE : Ifx_Shell.c
  • IFX_SHELL_NULL_CHAR : Ifx_Shell.h
  • Ifx_Shell_parseAddress() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseFloat32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseFloat64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseSInt32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseSInt64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseToken() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseUInt32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseUInt64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_printSyntax() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_process() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_protocolStart() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_ResultCode : Ifx_Shell.h
  • Ifx_Shell_ResultCode_nok : Ifx_Shell.h
  • Ifx_Shell_ResultCode_ok : Ifx_Shell.h
  • Ifx_Shell_ResultCode_undefined : Ifx_Shell.h
  • Ifx_Shell_ResultCode_unknown : Ifx_Shell.h
  • Ifx_Shell_showHelp() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelpSingle() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelpSingleCommand() : Ifx_Shell.c
  • Ifx_Shell_skipWhitespace() : Ifx_Shell.c , Ifx_Shell.h
  • IFX_SHELL_SYNTAX_LIST_END : Ifx_Shell.h
  • IFX_SHELL_WRITE_BACKSPACES : Ifx_Shell.c
  • IFX_SHELL_WRITE_SPACES : Ifx_Shell.c
  • Ifx_SignedTimerVal : Ifx_Types.h
  • Ifx_SizeT : Ifx_Types.h
  • IFX_SIZET_MAX : Ifx_Types.h
  • IFX_SQRT_THREE : Ifx_Types.h
  • IFX_SQRT_TWO : Ifx_Types.h
  • IFX_STATIC : Compilers.h
  • Ifx_TickTime : Ifx_Types.h
  • Ifx_TimerValue : Ifx_Types.h
  • IFX_TWO_OVER_PI : Ifx_Types.h
  • IFX_UNUSED_PARAMETER : Ifx_Types.h
  • IFX_VALIDATE : Ifx_Assert.h , Assert.h
  • IFX_VERBOSE_LEVEL_DEBUG : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_ERROR : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_FAILURE : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_INFO : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_OFF : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_WARNING : Ifx_Assert.h
  • Ifx_WndF32_apply() : Ifx_WndF32.h
  • IFX_WNDF32_TABLE_LENGTH : Ifx_WndF32.h
  • IFX_ZEROS : Ifx_Types.h
  • IfxAsclin0_CTSA_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RTS_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXA_P14_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXB_P15_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_SCLK_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_SCLK_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P14_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P15_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_CTSA_P20_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_CTSB_P32_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RTS_P20_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RTS_P23_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXA_P15_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXB_P15_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXC_P20_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXD_P14_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXE_P11_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXF_P33_13_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXG_P02_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P33_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P20_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P33_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P02_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P11_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P14_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P33_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_CTSA_P10_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_CTSB_P33_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RTS_P10_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RTS_P33_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXA_P14_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXB_P02_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXD_P10_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXE_P33_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXG_P02_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P02_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P10_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P33_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P02_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P33_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P02_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P33_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_CTSA_P00_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RTS_P00_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXA_P15_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXC_P20_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXD_P32_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXE_P00_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXF_P21_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P00_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P15_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P21_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P33_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P00_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P21_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P21_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P33_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P00_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P15_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P20_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P32_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Asc_blockingRead() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_blockingWrite() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_canReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_canWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_clearRx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_clearTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_disableModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_flushTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getReadEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getTxTimeStamp() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getWriteEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initiateTransmission() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initModuleConfig() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrError() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrReceive() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrTransmit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_read() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_resetSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_stdIfDPipeInit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_write() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_cfg_indexMap : IfxAsclin_cfg.c , IfxAsclin_cfg.h
  • IfxAsclin_Checksum : IfxAsclin.h
  • IfxAsclin_Checksum_classic : IfxAsclin.h
  • IfxAsclin_Checksum_enhanced : IfxAsclin.h
  • IfxAsclin_ChecksumInjection : IfxAsclin.h
  • IfxAsclin_ChecksumInjection_notWritten : IfxAsclin.h
  • IfxAsclin_ChecksumInjection_written : IfxAsclin.h
  • IfxAsclin_clearAllFlags() : IfxAsclin.h
  • IfxAsclin_clearBreakDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearCollisionDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearFallingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearFrameErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearHeaderTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_clearKernelResetStatus() : IfxAsclin.h
  • IfxAsclin_clearLinAutoBaudDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearLinChecksumErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearLinParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearRaisingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearResponseTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoUnderflowFlag() : IfxAsclin.h
  • IfxAsclin_clearRxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_clearRxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_clearTransmissionCompletedFlag() : IfxAsclin.h
  • IfxAsclin_clearTxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_clearTxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_clearTxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_clearTxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_ClockPolarity : IfxAsclin.h
  • IfxAsclin_ClockPolarity_idleHigh : IfxAsclin.h
  • IfxAsclin_ClockPolarity_idleLow : IfxAsclin.h
  • IfxAsclin_ClockSource : IfxAsclin.h
  • IfxAsclin_ClockSource_ascFastClock : IfxAsclin.h
  • IfxAsclin_ClockSource_ascSlowClock : IfxAsclin.h
  • IfxAsclin_ClockSource_flexRayClock : IfxAsclin.h
  • IfxAsclin_ClockSource_kernelClock : IfxAsclin.h
  • IfxAsclin_ClockSource_noClock : IfxAsclin.h
  • IfxAsclin_ClockSource_oscillatorClock : IfxAsclin.h
  • IfxAsclin_Cts_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_CtsInputSelect : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_0 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_1 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_2 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_3 : IfxAsclin.h
  • IfxAsclin_DataLength : IfxAsclin.h
  • IfxAsclin_DataLength_1 : IfxAsclin.h
  • IfxAsclin_DataLength_10 : IfxAsclin.h
  • IfxAsclin_DataLength_11 : IfxAsclin.h
  • IfxAsclin_DataLength_12 : IfxAsclin.h
  • IfxAsclin_DataLength_13 : IfxAsclin.h
  • IfxAsclin_DataLength_14 : IfxAsclin.h
  • IfxAsclin_DataLength_15 : IfxAsclin.h
  • IfxAsclin_DataLength_16 : IfxAsclin.h
  • IfxAsclin_DataLength_2 : IfxAsclin.h
  • IfxAsclin_DataLength_3 : IfxAsclin.h
  • IfxAsclin_DataLength_4 : IfxAsclin.h
  • IfxAsclin_DataLength_5 : IfxAsclin.h
  • IfxAsclin_DataLength_6 : IfxAsclin.h
  • IfxAsclin_DataLength_7 : IfxAsclin.h
  • IfxAsclin_DataLength_8 : IfxAsclin.h
  • IfxAsclin_DataLength_9 : IfxAsclin.h
  • IfxAsclin_disableAllFlags() : IfxAsclin.h
  • IfxAsclin_disableModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableAscErrorFlags() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableAutoBaudrateDetection() : IfxAsclin.h
  • IfxAsclin_enableBreakDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableCollisionDetection() : IfxAsclin.h
  • IfxAsclin_enableCollisionDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableCts() : IfxAsclin.h
  • IfxAsclin_enableFallingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableFrameErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableHardwareChecksum() : IfxAsclin.h
  • IfxAsclin_enableHeaderTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_enableLinAutoBaudDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLinChecksumErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLinParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLoopBackMode() : IfxAsclin.h
  • IfxAsclin_enableModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableParity() : IfxAsclin.h
  • IfxAsclin_enableParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableRaisingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableResponseTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoInlet() : IfxAsclin.h
  • IfxAsclin_enableRxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoUnderflowFlag() : IfxAsclin.h
  • IfxAsclin_enableRxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_enableRxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_enableTransmissionCompletedFlag() : IfxAsclin.h
  • IfxAsclin_enableTxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_enableTxFifoOutlet() : IfxAsclin.h
  • IfxAsclin_enableTxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_enableTxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_enableTxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_flushRxFifo() : IfxAsclin.h
  • IfxAsclin_flushTxFifo() : IfxAsclin.h
  • IfxAsclin_FrameMode : IfxAsclin.h
  • IfxAsclin_FrameMode_asc : IfxAsclin.h
  • IfxAsclin_FrameMode_initialise : IfxAsclin.h
  • IfxAsclin_FrameMode_lin : IfxAsclin.h
  • IfxAsclin_FrameMode_spi : IfxAsclin.h
  • IfxAsclin_getAddress() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getAllErrorFlagsStatus() : IfxAsclin.h
  • IfxAsclin_getBreakDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getClockSource() : IfxAsclin.h
  • IfxAsclin_getClockStatus() : IfxAsclin.h
  • IfxAsclin_getCollisionDetectionErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getFaFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getFallingEdgeDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getFrameErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getHeaderTimeoutFlagStatus() : IfxAsclin.h
  • IfxAsclin_getIndex() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getKernelResetStatus() : IfxAsclin.h
  • IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getLinChecksumErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getLinParityErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getModuleStatus() : IfxAsclin.h
  • IfxAsclin_getOvsFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getParityErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getPdFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getPrescaler() : IfxAsclin.h
  • IfxAsclin_getRaisingEdgeDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getReceiveSignalStatus() : IfxAsclin.h
  • IfxAsclin_getResponseTimeoutFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoFillLevel() : IfxAsclin.h
  • IfxAsclin_getRxFifoFillLevelFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoOutletWidth() : IfxAsclin.h
  • IfxAsclin_getRxFifoOverflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoUnderflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxHeaderEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxResponseEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getShiftFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerEr() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerRx() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerTx() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getTransmissionCompletedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTransmitSignalStatus() : IfxAsclin.h
  • IfxAsclin_getTxFifoFillLevel() : IfxAsclin.h
  • IfxAsclin_getTxFifoFillLevelFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxFifoInletWidth() : IfxAsclin.h
  • IfxAsclin_getTxFifoOverflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxHeaderEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxResponseEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect_headerAndResponse : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect_headerOnly : IfxAsclin.h
  • IfxAsclin_IdleDelay : IfxAsclin.h
  • IfxAsclin_IdleDelay_0 : IfxAsclin.h
  • IfxAsclin_IdleDelay_1 : IfxAsclin.h
  • IfxAsclin_IdleDelay_2 : IfxAsclin.h
  • IfxAsclin_IdleDelay_3 : IfxAsclin.h
  • IfxAsclin_IdleDelay_4 : IfxAsclin.h
  • IfxAsclin_IdleDelay_5 : IfxAsclin.h
  • IfxAsclin_IdleDelay_6 : IfxAsclin.h
  • IfxAsclin_IdleDelay_7 : IfxAsclin.h
  • IfxAsclin_Index : IfxAsclin_cfg.h
  • IfxAsclin_Index_0 : IfxAsclin_cfg.h
  • IfxAsclin_Index_1 : IfxAsclin_cfg.h
  • IfxAsclin_Index_2 : IfxAsclin_cfg.h
  • IfxAsclin_Index_3 : IfxAsclin_cfg.h
  • IfxAsclin_Index_none : IfxAsclin_cfg.h
  • IfxAsclin_initCtsPin() : IfxAsclin.h
  • IfxAsclin_initRtsPin() : IfxAsclin.h
  • IfxAsclin_initRxPin() : IfxAsclin.h
  • IfxAsclin_initSclkPin() : IfxAsclin.h
  • IfxAsclin_initSlsoPin() : IfxAsclin.h
  • IfxAsclin_initTxPin() : IfxAsclin.h
  • IfxAsclin_isModuleSuspended() : IfxAsclin.h
  • IfxAsclin_LeadDelay : IfxAsclin.h
  • IfxAsclin_LeadDelay_0 : IfxAsclin.h
  • IfxAsclin_LeadDelay_1 : IfxAsclin.h
  • IfxAsclin_LeadDelay_2 : IfxAsclin.h
  • IfxAsclin_LeadDelay_3 : IfxAsclin.h
  • IfxAsclin_LeadDelay_4 : IfxAsclin.h
  • IfxAsclin_LeadDelay_5 : IfxAsclin.h
  • IfxAsclin_LeadDelay_6 : IfxAsclin.h
  • IfxAsclin_LeadDelay_7 : IfxAsclin.h
  • IfxAsclin_Lin_checkForReceivedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForReceivedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForTransmittedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForTransmittedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_clearFlagsStatus() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeader : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeaderAndResponse : IfxAsclin_Lin.h
  • IfxAsclin_Lin_disableModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_ignoreHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_initModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_initModuleConfig() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrError() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrReceive() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrTransmit() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_prepareHeaderReception() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_prepareResponseReception() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_readHeader() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_readResponse() : IfxAsclin_Lin.h
  • IFXASCLIN_LIN_RECEIVE_RESPONSE : IfxAsclin_Lin.h
  • IfxAsclin_Lin_receiveHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_receiveResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IFXASCLIN_LIN_SEND_RESPONSE : IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendFrame() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForReceivedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForReceivedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForTransmittedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForTransmittedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_LinMode : IfxAsclin.h
  • IfxAsclin_LinMode_master : IfxAsclin.h
  • IfxAsclin_LinMode_slave : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode_frameTimeout : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode_responseTimeout : IfxAsclin.h
  • IFXASCLIN_NUM_MODULES : IfxAsclin_cfg.h
  • IfxAsclin_OversamplingFactor : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_10 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_11 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_12 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_13 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_14 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_15 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_16 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_4 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_5 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_6 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_7 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_8 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_9 : IfxAsclin.h
  • IfxAsclin_ParityType : IfxAsclin.h
  • IfxAsclin_ParityType_even : IfxAsclin.h
  • IfxAsclin_ParityType_odd : IfxAsclin.h
  • IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_NUM_MODULES : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IfxAsclin_read16() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_read32() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_read8() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_readRxData() : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode_rxBuffer : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode_rxFifo : IfxAsclin.h
  • IfxAsclin_resetModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_Rts_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_RtsCtsPolarity : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity_activeHigh : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity_activeLow : IfxAsclin.h
  • IfxAsclin_Rx_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_RxFifoInterruptLevel : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_1 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_10 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_11 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_12 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_13 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_14 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_15 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_16 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_2 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_3 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_4 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_5 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_6 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_7 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_8 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_9 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_0 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_1 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_2 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_3 : IfxAsclin.h
  • IfxAsclin_RxInputSelect : IfxAsclin.h
  • IfxAsclin_RxInputSelect_0 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_1 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_2 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_3 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_4 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_5 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_6 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_7 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_1 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_10 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_11 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_12 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_13 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_14 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_15 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_2 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_3 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_4 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_5 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_6 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_7 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_8 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_9 : IfxAsclin.h
  • IfxAsclin_SamplesPerBit : IfxAsclin.h
  • IfxAsclin_SamplesPerBit_one : IfxAsclin.h
  • IfxAsclin_SamplesPerBit_three : IfxAsclin.h
  • IfxAsclin_Sclk_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_setBaudrateBitFields() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBitTiming() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBrdLowerlimt() : IfxAsclin.h
  • IfxAsclin_setBrdUpperlimt() : IfxAsclin.h
  • IfxAsclin_setChecksumInjection() : IfxAsclin.h
  • IfxAsclin_setChecksumMode() : IfxAsclin.h
  • IfxAsclin_setClockPolarity() : IfxAsclin.h
  • IfxAsclin_setClockSource() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setCtsInput() : IfxAsclin.h
  • IfxAsclin_setDataLength() : IfxAsclin.h
  • IfxAsclin_setDenominator() : IfxAsclin.h
  • IfxAsclin_setDisableModuleRequest() : IfxAsclin.h
  • IfxAsclin_setEnableModuleRequest() : IfxAsclin.h
  • IfxAsclin_setFilterDepth() : IfxAsclin.h
  • IfxAsclin_setFrameMode() : IfxAsclin.h
  • IfxAsclin_setHeaderResponseSelect() : IfxAsclin.h
  • IfxAsclin_setIdleDelay() : IfxAsclin.h
  • IfxAsclin_setKernelResetOne() : IfxAsclin.h
  • IfxAsclin_setKernelResetZero() : IfxAsclin.h
  • IfxAsclin_setLeadDelay() : IfxAsclin.h
  • IfxAsclin_setLinBreakLength() : IfxAsclin.h
  • IfxAsclin_setLinHeaderTimeout() : IfxAsclin.h
  • IfxAsclin_setLinMode() : IfxAsclin.h
  • IfxAsclin_setLinResponseTimeoutMode() : IfxAsclin.h
  • IfxAsclin_setLinResponseTimeoutThreshold() : IfxAsclin.h
  • IfxAsclin_setNumerator() : IfxAsclin.h
  • IfxAsclin_setOversampling() : IfxAsclin.h
  • IfxAsclin_setParityType() : IfxAsclin.h
  • IfxAsclin_setPrescaler() : IfxAsclin.h
  • IfxAsclin_setRtsCtsPolarity() : IfxAsclin.h
  • IfxAsclin_setRxBufferMode() : IfxAsclin.h
  • IfxAsclin_setRxFifoInterruptLevel() : IfxAsclin.h
  • IfxAsclin_setRxFifoOutletWidth() : IfxAsclin.h
  • IfxAsclin_setRxInput() : IfxAsclin.h
  • IfxAsclin_setSampleMode() : IfxAsclin.h
  • IfxAsclin_setSamplePointPosition() : IfxAsclin.h
  • IfxAsclin_setShiftDirection() : IfxAsclin.h
  • IfxAsclin_setSlavePolarity() : IfxAsclin.h
  • IfxAsclin_setSleepMode() : IfxAsclin.h
  • IfxAsclin_setStopBit() : IfxAsclin.h
  • IfxAsclin_setSuspendMode() : IfxAsclin.h
  • IfxAsclin_setTransmitHeaderRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTransmitResponseRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTransmitWakeRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTxFifoInletWidth() : IfxAsclin.h
  • IfxAsclin_setTxFifoInterruptLevel() : IfxAsclin.h
  • IfxAsclin_ShiftDirection : IfxAsclin.h
  • IfxAsclin_ShiftDirection_lsbFirst : IfxAsclin.h
  • IfxAsclin_ShiftDirection_msbFirst : IfxAsclin.h
  • IfxAsclin_SlavePolarity : IfxAsclin.h
  • IfxAsclin_SlavePolarity_idlehigh : IfxAsclin.h
  • IfxAsclin_SlavePolarity_idleLow : IfxAsclin.h
  • IfxAsclin_SleepMode : IfxAsclin.h
  • IfxAsclin_SleepMode_disable : IfxAsclin.h
  • IfxAsclin_SleepMode_enable : IfxAsclin.h
  • IfxAsclin_Slso_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Spi_disableModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_exchange() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_getStatus() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_initModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_initModuleConfig() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrError() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrReceive() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrTransmit() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_lock() : IfxAsclin_Spi.c
  • IfxAsclin_Spi_read() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_busy : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_ok : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_unknown : IfxAsclin_Spi.h
  • IfxAsclin_Spi_unlock() : IfxAsclin_Spi.c
  • IfxAsclin_Spi_write() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Status : IfxAsclin.h
  • IfxAsclin_Status_configurationError : IfxAsclin.h
  • IfxAsclin_Status_noError : IfxAsclin.h
  • IfxAsclin_StopBit : IfxAsclin.h
  • IfxAsclin_StopBit_0 : IfxAsclin.h
  • IfxAsclin_StopBit_1 : IfxAsclin.h
  • IfxAsclin_StopBit_2 : IfxAsclin.h
  • IfxAsclin_StopBit_3 : IfxAsclin.h
  • IfxAsclin_StopBit_4 : IfxAsclin.h
  • IfxAsclin_StopBit_5 : IfxAsclin.h
  • IfxAsclin_StopBit_6 : IfxAsclin.h
  • IfxAsclin_StopBit_7 : IfxAsclin.h
  • IfxAsclin_SuspendMode : IfxAsclin.h
  • IfxAsclin_SuspendMode_hard : IfxAsclin.h
  • IfxAsclin_SuspendMode_none : IfxAsclin.h
  • IfxAsclin_SuspendMode_soft : IfxAsclin.h
  • IfxAsclin_Tx_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_TxFifoInletWidth : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_0 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_1 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_2 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_3 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_0 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_1 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_10 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_11 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_12 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_13 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_14 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_15 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_2 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_3 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_4 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_5 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_6 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_7 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_8 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_9 : IfxAsclin.h
  • IfxAsclin_write16() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_write32() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_write8() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_writeTxData() : IfxAsclin.h
  • IfxCcu60_CC60_P02_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P02_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P11_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P15_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INA_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INB_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INC_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P02_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P02_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P11_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P15_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INA_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INB_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INC_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P02_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P02_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P11_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P15_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INA_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INB_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0A_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0C_P10_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0D_P40_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1A_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1B_P40_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1C_P10_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1D_P40_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2A_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2B_P40_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2C_P10_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P02_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P11_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P15_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P02_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P11_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P15_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P02_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P11_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P14_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P00_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P11_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P14_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P32_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CTRAPA_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRB_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRE_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T13HRB_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T13HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P00_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P00_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P20_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P33_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INA_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INB_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INC_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P00_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P00_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P20_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P33_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INA_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INB_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INC_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P00_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P00_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P20_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P33_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INA_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INB_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0A_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0C_P33_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1A_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1B_P40_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1C_P33_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1D_P40_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2A_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2B_P40_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2C_P33_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2D_P40_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P00_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P20_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P33_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P00_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P20_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P33_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P00_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P20_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P33_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P00_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P00_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P20_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CTRAPA_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CTRAPC_P33_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRB_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRE_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T13HRB_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T13HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_CaptureCompareInput : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC60 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC61 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC62 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS0 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS1 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS2 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cTRAP : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_a : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_b : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_c : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_d : IfxCcu6.h
  • IfxCcu6_CaptureCompareState : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_clear : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_set : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_toggle : IfxCcu6.h
  • IfxCcu6_Cc60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc60in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc61in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc62in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos0_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos1_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos2_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_cfg_indexMap : IfxCcu6_cfg.c , IfxCcu6_cfg.h
  • IfxCcu6_ChannelOut : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc0 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc1 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc2 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout0 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout1 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout2 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout3 : IfxCcu6.h
  • IfxCcu6_clearAllInterruptStatusFlags() : IfxCcu6.h
  • IfxCcu6_clearCounter() : IfxCcu6.h
  • IfxCcu6_clearDeadTimeCounters() : IfxCcu6.h
  • IfxCcu6_clearInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_clearT12OneNotification() : IfxCcu6.h
  • IfxCcu6_clearT12PeriodNotification() : IfxCcu6.h
  • IfxCcu6_clearT13CompareNotification() : IfxCcu6.h
  • IfxCcu6_connectTrigger() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_CountingInputMode : IfxCcu6.h
  • IfxCcu6_CountingInputMode_externalFalling : IfxCcu6.h
  • IfxCcu6_CountingInputMode_externalRising : IfxCcu6.h
  • IfxCcu6_CountingInputMode_internal : IfxCcu6.h
  • IfxCcu6_CountingInputMode_manual : IfxCcu6.h
  • IfxCcu6_Cout60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout63_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ctrap_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_DelayBypass : IfxCcu6.h
  • IfxCcu6_DelayBypass_active : IfxCcu6.h
  • IfxCcu6_DelayBypass_notActive : IfxCcu6.h
  • IfxCcu6_disableAdditionalPrescaler() : IfxCcu6.h
  • IfxCcu6_disableDeadTime() : IfxCcu6.h
  • IfxCcu6_disableDelayBypass() : IfxCcu6.h
  • IfxCcu6_disableInterrupt() : IfxCcu6.h
  • IfxCcu6_disableModulationOutput() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableMultiChannelMode() : IfxCcu6.h
  • IfxCcu6_disableShadowTransfer() : IfxCcu6.h
  • IfxCcu6_disableSingleShotMode() : IfxCcu6.h
  • IfxCcu6_disableT13InvertedModulation() : IfxCcu6.h
  • IfxCcu6_disableTimer() : IfxCcu6.h
  • IfxCcu6_disableTrap() : IfxCcu6.h
  • IfxCcu6_disableTrapPin() : IfxCcu6.h
  • IFXCCU6_EMPTY_OUTPUT_SLOT : IfxCcu6_cfg.c
  • IfxCcu6_enableAdditionalPrescaler() : IfxCcu6.h
  • IfxCcu6_enableCountEvent() : IfxCcu6.h
  • IfxCcu6_enableDeadTime() : IfxCcu6.h
  • IfxCcu6_enableDelayBypass() : IfxCcu6.h
  • IfxCcu6_enableHallPatternShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableInterrupt() : IfxCcu6.h
  • IfxCcu6_enableModulationOutput() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_enableModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_enableMultiChannelMode() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelModeAvailability() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelPwmPatternShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableSingleShotMode() : IfxCcu6.h
  • IfxCcu6_enableT13InvertedModulation() : IfxCcu6.h
  • IfxCcu6_enableTimer() : IfxCcu6.h
  • IfxCcu6_enableTrap() : IfxCcu6.h
  • IfxCcu6_enableTrapPin() : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_anyEdge : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_disable : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_fallingEdge : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_risingEdge : IfxCcu6.h
  • IfxCcu6_getAddress() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getCaptureRegisterValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getCaptureShadowRegisterValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getDeadTimeStatus() : IfxCcu6.h
  • IfxCcu6_getHallPatternSampleState() : IfxCcu6.h
  • IfxCcu6_getIndex() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_getMultiChannelModeAvailabilityStatus() : IfxCcu6.h
  • IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus() : IfxCcu6.h
  • IfxCcu6_getShadowTransferStatus() : IfxCcu6.h
  • IfxCcu6_getSrcAddress() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getT12CaptureCompareState() : IfxCcu6.h
  • IfxCcu6_getT12CountDirection() : IfxCcu6.h
  • IfxCcu6_getT12TimerPointer() : IfxCcu6.h
  • IfxCcu6_getT13CaptureCompareState() : IfxCcu6.h
  • IfxCcu6_getTimerAvailabilityStatus() : IfxCcu6.h
  • IfxCcu6_getTimerRunStatus() : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM61CountingDown : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM61CountingUp : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM63 : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_off : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_permanentCheck : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t12OMCountingDown : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t12PMCountingUp : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t13PM : IfxCcu6.h
  • IfxCcu6_Icu_getTimeStamp() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initChannel() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initChannelConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initModule() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initModuleConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_startCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_stopCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Index : IfxCcu6_cfg.h
  • IfxCcu6_Index_0 : IfxCcu6_cfg.h
  • IfxCcu6_Index_1 : IfxCcu6_cfg.h
  • IfxCcu6_Index_none : IfxCcu6_cfg.h
  • IfxCcu6_initCc60InPin() : IfxCcu6.h
  • IfxCcu6_initCc60InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc60OutPin() : IfxCcu6.h
  • IfxCcu6_initCc61InPin() : IfxCcu6.h
  • IfxCcu6_initCc61InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc61OutPin() : IfxCcu6.h
  • IfxCcu6_initCc62InPin() : IfxCcu6.h
  • IfxCcu6_initCc62InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc62OutPin() : IfxCcu6.h
  • IfxCcu6_initCcpos0Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos0PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCcpos1Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos1PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCcpos2Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos2PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCout60Pin() : IfxCcu6.h
  • IfxCcu6_initCout61Pin() : IfxCcu6.h
  • IfxCcu6_initCout62Pin() : IfxCcu6.h
  • IfxCcu6_initCout63Pin() : IfxCcu6.h
  • IfxCcu6_initCtrapPin() : IfxCcu6.h
  • IfxCcu6_initCtrapPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initT12hrPin() : IfxCcu6.h
  • IfxCcu6_initT12hrPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initT13hrPin() : IfxCcu6.h
  • IfxCcu6_initT13hrPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_InterruptSource : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc60FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc60RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc61FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc61RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc62FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc62RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_correctHallEvent : IfxCcu6.h
  • IfxCcu6_InterruptSource_t12OneMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t12PeriodMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t13CompareMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t13PeriodMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_trap : IfxCcu6.h
  • IfxCcu6_InterruptSource_wrongHallEvent : IfxCcu6.h
  • IfxCcu6_isModuleEnabled() : IfxCcu6.h
  • IfxCcu6_isModuleSuspended() : IfxCcu6.h
  • IfxCcu6_isT12OneNotification() : IfxCcu6.h
  • IfxCcu6_isT12PeriodNotification() : IfxCcu6.h
  • IfxCcu6_isT13CompareNotification() : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_noEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_direct : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch : IfxCcu6.h
  • IFXCCU6_NUM_MODULES : IfxCcu6_cfg.h
  • IFXCCU6_NUM_SERVICE_REQUESTS : IfxCcu6_cfg.h
  • IFXCCU6_NUM_T12_CHANNELS : IfxCcu6_cfg.h
  • IFXCCU6_NUM_T13_CHANNELS : IfxCcu6_cfg.h
  • IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_NUM_MODULES : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IfxCcu6_PwmBc_getMotorSpeed() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_initModule() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_initModuleConfig() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_start() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_stop() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_updateHallPattern() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmHl : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_disable() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_enable() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_getDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_getMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_getMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_init() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_initConfig() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_invertActiveState() : IfxCcu6_PwmHl.h
  • IFXCCU6_PWMHL_MAX_CHANNELS : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_modes : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_setDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setOnTime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setOutputPins() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_setupChannels() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_stdIfPwmHlInit() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_Update : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_updateCenterAligned() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_updateEdgeAligned() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_updateOff() : IfxCcu6_PwmHl.c
  • IfxCcu6_readTimer() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_resetModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_routeInterruptNode() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_ServiceRequest : IfxCcu6.h
  • IfxCcu6_ServiceRequest_0 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_1 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_2 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_3 : IfxCcu6.h
  • IfxCcu6_setCaptureCompareInputSignal() : IfxCcu6.h
  • IfxCcu6_setCountingInputMode() : IfxCcu6.h
  • IfxCcu6_setCurrentHallPattern() : IfxCcu6.h
  • IfxCcu6_setDeadTimeValue() : IfxCcu6.h
  • IfxCcu6_setExpectedHallPattern() : IfxCcu6.h
  • IfxCcu6_setExternalRunMode() : IfxCcu6.h
  • IfxCcu6_setHallSensorTriggerMode() : IfxCcu6.h
  • IfxCcu6_setInputClockFrequency() : IfxCcu6.h
  • IfxCcu6_setInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_setMultiChannelPwmPattern() : IfxCcu6.h
  • IfxCcu6_setMultiChannelSwitchingMode() : IfxCcu6.h
  • IfxCcu6_setMultiChannelSwitchingSync() : IfxCcu6.h
  • IfxCcu6_setOutputPassiveLevel() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setOutputPassiveState() : IfxCcu6.h
  • IfxCcu6_setSingleShotModeEnable() : IfxCcu6.h
  • IfxCcu6_setSleepMode() : IfxCcu6.h
  • IfxCcu6_setSuspendMode() : IfxCcu6.h
  • IfxCcu6_setT12CaptureCompareState() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12ChannelMode() : IfxCcu6.h
  • IfxCcu6_setT12CompareValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12CounterValue() : IfxCcu6.h
  • IfxCcu6_setT12CountMode() : IfxCcu6.h
  • IfxCcu6_setT12Frequency() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12InputSignal() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12PeriodValue() : IfxCcu6.h
  • IfxCcu6_setT13CaptureCompareState() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13CompareValue() : IfxCcu6.h
  • IfxCcu6_setT13CounterValue() : IfxCcu6.h
  • IfxCcu6_setT13Frequency() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13InputSignal() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13PeriodValue() : IfxCcu6.h
  • IfxCcu6_setT13TriggerEventDirection() : IfxCcu6.h
  • IfxCcu6_setT13TriggerEventMode() : IfxCcu6.h
  • IfxCcu6_setTrapMode() : IfxCcu6.h
  • IfxCcu6_setTrapState() : IfxCcu6.h
  • IfxCcu6_SleepMode : IfxCcu6.h
  • IfxCcu6_SleepMode_disable : IfxCcu6.h
  • IfxCcu6_SleepMode_enable : IfxCcu6.h
  • IfxCcu6_startTimer() : IfxCcu6.h
  • IfxCcu6_stopTimer() : IfxCcu6.h
  • IfxCcu6_SuspendMode : IfxCcu6.h
  • IfxCcu6_SuspendMode_hard : IfxCcu6.h
  • IfxCcu6_SuspendMode_none : IfxCcu6.h
  • IfxCcu6_SuspendMode_soft : IfxCcu6.h
  • IfxCcu6_T12Channel : IfxCcu6.h
  • IfxCcu6_T12Channel_0 : IfxCcu6.h
  • IfxCcu6_T12Channel_1 : IfxCcu6.h
  • IfxCcu6_T12Channel_2 : IfxCcu6.h
  • IfxCcu6_T12ChannelMode : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_compareMode : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_hallSensor : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_hysteresisLikecompare : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureAny : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureBothRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_off : IfxCcu6.h
  • IfxCcu6_T12CountDirection : IfxCcu6.h
  • IfxCcu6_T12CountDirection_down : IfxCcu6.h
  • IfxCcu6_T12CountDirection_up : IfxCcu6.h
  • IfxCcu6_T12CountMode : IfxCcu6.h
  • IfxCcu6_T12CountMode_centerAligned : IfxCcu6.h
  • IfxCcu6_T12CountMode_edgeAligned : IfxCcu6.h
  • IfxCcu6_T12hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_T13hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_T13TriggerDirection : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_anyT12 : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_noAction : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_onT12CountingDown : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_onT12CountingUp : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_noAction : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onAnyT12Compare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC60RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC61RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC62RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCCPOSxEdge : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onT12Period : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onT12Zero : IfxCcu6.h
  • IfxCcu6_Timer_countOneStep() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_initModule() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_initModuleConfig() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_start() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_startSingleShotMode() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_stop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_synchronousStart() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_synchronousStop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_TimerId : IfxCcu6.h
  • IfxCcu6_TimerId_t12 : IfxCcu6.h
  • IfxCcu6_TimerId_t13 : IfxCcu6.h
  • IfxCcu6_TimerInputClock : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By128 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By16 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By2 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By32 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By4 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By64 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By8 : IfxCcu6.h
  • IfxCcu6_TimerInputSignal : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_a : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_b : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_c : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_d : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_e : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_f : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_g : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_h : IfxCcu6.h
  • IfxCcu6_TimerRunStatus : IfxCcu6.h
  • IfxCcu6_TimerRunStatus_running : IfxCcu6.h
  • IfxCcu6_TimerRunStatus_stopped : IfxCcu6.h
  • IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_applyUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_disableUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getPointer() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getResolution() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_init() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_initConfig() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_run() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setSingleMode() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setTrigger() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_stdIfTimerInit() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_stop() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_updateInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TPwm_initModule() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_initModuleConfig() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_pause() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_resume() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_start() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_stop() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TrapMode : IfxCcu6.h
  • IfxCcu6_TrapMode_automatic : IfxCcu6.h
  • IfxCcu6_TrapMode_manual : IfxCcu6.h
  • IfxCcu6_TrapState : IfxCcu6.h
  • IfxCcu6_TrapState_immediate : IfxCcu6.h
  • IfxCcu6_TrapState_t12Sync : IfxCcu6.h
  • IfxCcu6_TrapState_t13Sync : IfxCcu6.h
  • IfxCcu6_TrigOut : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_0 : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_1 : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_2 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc60 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc61 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc62 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cout63 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_sr1 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_sr3 : IfxCcu6_cfg.h
  • IfxCcu6_updateHallPattern() : IfxCcu6.h
  • IFXCIF_CAM_ALIGN : IfxCif_Cam.c
  • IfxCif_Cam_calcMem() : IfxCif_Cam.c
  • IfxCif_Cam_clearAllFlags() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_clearFrameReceptionFlag() : IfxCif_Cam.h
  • IfxCif_Cam_clearJpegEncodingCompleteFlag() : IfxCif_Cam.h
  • IfxCif_Cam_disableJpegEncoder() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_enableJpegEncoder() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getBbbAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraFrameSize() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraPathMemInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraPathPictureInfo() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getFrameSize() : IfxCif_Cam.h
  • IfxCif_Cam_getJpegEncodedSize() : IfxCif_Cam.h
  • IfxCif_Cam_getLastExtraAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getLastExtraCaptureInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getLastFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getLastFrameCaptureInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getLastJpegEncodingInfo() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getNextFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getNextJpegFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_incrementAddress() : IfxCif_Cam.h
  • IfxCif_Cam_init() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_initCamera() : IfxCif_Cam.c
  • IfxCif_Cam_initCif() : IfxCif_Cam.c
  • IfxCif_Cam_initCifDownscaler() : IfxCif_Cam.c
  • IfxCif_Cam_initCifExtraPath() : IfxCif_Cam.c
  • IfxCif_Cam_initCifIspUnit() : IfxCif_Cam.c
  • IfxCif_Cam_initCifJpegEncoder() : IfxCif_Cam.c
  • IfxCif_Cam_initCifMemInterface() : IfxCif_Cam.c
  • IfxCif_Cam_initEmem() : IfxCif_Cam.c
  • IfxCif_Cam_initMemSize() : IfxCif_Cam.c
  • IfxCif_Cam_initPictInfo() : IfxCif_Cam.c
  • IfxCif_Cam_initPortPins() : IfxCif_Cam.c
  • IfxCif_Cam_isEmulationExtensionAvailable() : IfxCif_Cam.c
  • IfxCif_Cam_isFrameReceptionComplete() : IfxCif_Cam.h
  • IfxCif_Cam_isJpegEncodingComplete() : IfxCif_Cam.h
  • IfxCif_Cam_IspMode : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_raw : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_undefined : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_yuvInterleaved : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_yuvPlanar : IfxCif_Cam.h
  • IFXCIF_CAM_MEM_ALIGN : IfxCif_Cam.c
  • IFXCIF_CAM_MEM_ALIGN_SIZE : IfxCif_Cam.h
  • IFXCIF_CAM_MEM_GAPSIZE : IfxCif_Cam.h
  • IfxCif_Cam_restartCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_skipPicture() : IfxCif_Cam.h
  • IfxCif_Cam_startCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_State : IfxCif_Cam.h
  • IfxCif_Cam_State_running : IfxCif_Cam.h
  • IfxCif_Cam_State_stopped : IfxCif_Cam.h
  • IfxCif_Cam_Status : IfxCif_Cam.h
  • IfxCif_Cam_Status_cameraCommError : IfxCif_Cam.h
  • IfxCif_Cam_Status_notAvailable : IfxCif_Cam.h
  • IfxCif_Cam_Status_notEnoughMemory : IfxCif_Cam.h
  • IfxCif_Cam_Status_ok : IfxCif_Cam.h
  • IfxCif_Cam_stopCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_yuvMemSize() : IfxCif_Cam.c
  • IfxCif_clearEpError() : IfxCif.c , IfxCif.h
  • IfxCif_clearEpInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearIspError() : IfxCif.c , IfxCif.h
  • IfxCif_clearIspInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearJpeInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearKernelResetState() : IfxCif.h
  • IfxCif_clearMiInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearMiStatus() : IfxCif.c , IfxCif.h
  • IfxCif_clearSecurityWatchdogInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_CLK_P00_7_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D0_P02_0_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D10_P00_1_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D11_P00_2_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D12_P00_3_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D13_P00_4_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D14_P00_5_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D15_P00_6_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D1_P02_1_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D2_P02_2_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D3_P02_3_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D4_P02_4_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D5_P02_5_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D6_P02_6_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D7_P02_7_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D8_P02_8_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D9_P00_0_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_DataPathSelectorForMainPath : IfxCif.h
  • IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder : IfxCif.h
  • IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed : IfxCif.h
  • IfxCif_DataPathSelectorForMainPath_Disabled : IfxCif.h
  • IFXCIF_DEBUG : IfxCif_cfg.h
  • IfxCif_DpControlSources : IfxCif.h
  • IfxCif_DpControlSources_FrameNumberCounter : IfxCif.h
  • IfxCif_DpControlSources_LineNumberCounter : IfxCif.h
  • IfxCif_DpControlSources_TimestampCounter : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol1 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol2 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol3 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol4 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol5 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol6 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol7 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol8 : IfxCif.h
  • IfxCif_DpCounters : IfxCif.h
  • IfxCif_DpCounters_FrameNumberCounter : IfxCif.h
  • IfxCif_DpCounters_LineNumberCounter : IfxCif.h
  • IfxCif_DpCounters_PredividerCounter : IfxCif.h
  • IfxCif_DpCounters_TimestampCounter : IfxCif.h
  • IfxCif_dpResetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_DpSourcePath : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath1 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath2 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath4 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath5 : IfxCif.h
  • IfxCif_DpSourcePath_MainPath : IfxCif.h
  • IfxCif_EpErrorClearSources : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath1SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath2SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath3SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath4SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath5SizeError : IfxCif.h
  • IfxCif_EpErrorSources : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath1FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath1SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath2FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath2SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath3FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath3SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath4FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath4SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath5FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath5SizeError : IfxCif.h
  • IfxCif_EpFeatures : IfxCif.h
  • IfxCif_EpFeatures_ByteSwap : IfxCif.h
  • IfxCif_EpFeatures_InitBaseAddress : IfxCif.h
  • IfxCif_EpFeatures_InitOffsetCounter : IfxCif.h
  • IfxCif_EpFeatures_PictureDataPath : IfxCif.h
  • IfxCif_epForceConfigurationUpdate() : IfxCif.c , IfxCif.h
  • IfxCif_EpInterrupts : IfxCif.h
  • IfxCif_EpInterrupts_Count : IfxCif.h
  • IfxCif_EpInterrupts_FillLevel : IfxCif.h
  • IfxCif_EpInterrupts_FrameEnd : IfxCif.h
  • IfxCif_EpInterrupts_MacroBlockLine : IfxCif.h
  • IfxCif_EpInterrupts_WrapAround : IfxCif.h
  • IfxCif_epSkipPicture() : IfxCif.c , IfxCif.h
  • IfxCif_EpWriteFormat : IfxCif.h
  • IfxCif_EpWriteFormat_Raw8Bit : IfxCif.h
  • IfxCif_EpWriteFormat_RawAndData : IfxCif.h
  • IfxCif_EpWriteFormat_RawGreater : IfxCif.h
  • IfxCif_EpWriteFormat_YCbCr : IfxCif.h
  • IfxCif_ErrorState : IfxCif.h
  • IfxCif_ErrorState_Error : IfxCif.h
  • IfxCif_ErrorState_NoError : IfxCif.h
  • IFXCIF_EXTRA_PATHS : IfxCif_cfg.h
  • IfxCif_ExtraPath : IfxCif.h
  • IfxCif_ExtraPath_1 : IfxCif.h
  • IfxCif_ExtraPath_2 : IfxCif.h
  • IfxCif_ExtraPath_3 : IfxCif.h
  • IfxCif_ExtraPath_4 : IfxCif.h
  • IfxCif_ExtraPath_5 : IfxCif.h
  • IfxCif_generateIspFrameSynchronousConfigUpdateSignal() : IfxCif.h
  • IfxCif_generateIspImmediateConfigUpdateSignal() : IfxCif.h
  • IfxCif_generateMiImmediateConfigUpdateSignal() : IfxCif.h
  • IfxCif_getBaseAddressInitializationEnableState() : IfxCif.h
  • IfxCif_getCifModuleId() : IfxCif.h
  • IfxCif_getCifModulePortInputSelection() : IfxCif.h
  • IfxCif_getCifModuleRevision() : IfxCif.h
  • IfxCif_getCifModuleType() : IfxCif.h
  • IfxCif_getClockControlLogicState() : IfxCif.h
  • IfxCif_getCurrentIspFrameCount() : IfxCif.h
  • IfxCif_getCurrentIspInformFieldInformation() : IfxCif.h
  • IfxCif_getCurrentIspInputFormatterState() : IfxCif.h
  • IfxCif_getCurrentIspPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getCurrentIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getDataPathSelectorForMainPath() : IfxCif.h
  • IfxCif_getDpControlEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getDpCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getDpEnableState() : IfxCif.h
  • IfxCif_getDpSourcePath() : IfxCif.h
  • IfxCif_getDpUserDefinedSymbol() : IfxCif.c , IfxCif.h
  • IfxCif_getEpBaseAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getEpBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCurrentPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCurrentPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingRecenterState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpErrorState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitialFillLevelInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOutputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpRecenterValue() : IfxCif.c , IfxCif.h
  • IfxCif_getEpSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpWriteFormat() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanAcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanAcTableSelectorState() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanDcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanDcTableSelectorState() : IfxCif.c , IfxCif.h
  • IfxCif_getInputInterface() : IfxCif.h
  • IfxCif_getInternalClockMode() : IfxCif.c , IfxCif.h
  • IfxCif_getIspAcquisitionOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspAcquisitionSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspCcirSequence() : IfxCif.h
  • IfxCif_getIspColorSpaceMatrixCrominanceClippingRange() : IfxCif.h
  • IfxCif_getIspColorSpaceMatrixLuminanceClippingRange() : IfxCif.h
  • IfxCif_getIspErrorState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspFieldInvertState() : IfxCif.h
  • IfxCif_getIspFieldSelection() : IfxCif.h
  • IfxCif_getIspHSyncPolarity() : IfxCif.h
  • IfxCif_getIspInputFormatterState() : IfxCif.h
  • IfxCif_getIspInputInterface() : IfxCif.h
  • IfxCif_getIspInputPortSDataState() : IfxCif.h
  • IfxCif_getIspInputPortSHSyncState() : IfxCif.h
  • IfxCif_getIspInputPortSVSyncState() : IfxCif.h
  • IfxCif_getIspInputSelectionAppendState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCurrentPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCurrentPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisEnableState() : IfxCif.h
  • IfxCif_getIspisMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisRecenterEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisRecenterValue() : IfxCif.h
  • IfxCif_getIspMode() : IfxCif.h
  • IfxCif_getIspOutputState() : IfxCif.h
  • IfxCif_getIspOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspSamplingEdge() : IfxCif.h
  • IfxCif_getIspState() : IfxCif.h
  • IfxCif_getIspVSyncPolarity() : IfxCif.h
  • IfxCif_getJpeDebugSignalState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpegCodecImageSize() : IfxCif.c , IfxCif.h
  • IfxCif_getJpegJfifStreamEncoderContinuousMode() : IfxCif.h
  • IfxCif_getJpegPictureEncodingFormat() : IfxCif.h
  • IfxCif_getJpeHeaderGenerationMode() : IfxCif.h
  • IfxCif_getJpeHeaderMode() : IfxCif.h
  • IfxCif_getJpeInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeMode() : IfxCif.h
  • IfxCif_getJpeQTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeRestartInterval() : IfxCif.h
  • IfxCif_getJpeScalingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeState() : IfxCif.h
  • IfxCif_getJpeTableId() : IfxCif.h
  • IfxCif_getKernelResetRequestState() : IfxCif.c , IfxCif.h
  • IfxCif_getKernelResetStatus() : IfxCif.h
  • IfxCif_getLinearDownscalerEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getLinearDownscalerScalingFactor() : IfxCif.c , IfxCif.h
  • IfxCif_getLinearDownscalerScalingMode() : IfxCif.c , IfxCif.h
  • IfxCif_getMainPictureComponentBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedEpInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedIspInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedJpeInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedMiInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiByteCount() : IfxCif.h
  • IfxCif_getMiByteSwapEnableState() : IfxCif.h
  • IfxCif_getMiChrominanceBurstLength() : IfxCif.h
  • IfxCif_getMiDataPathInputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiDataPathOutputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiLuminanceBurstLength() : IfxCif.h
  • IfxCif_getMiMainPictureComponentBaseAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentSize() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureWriteFormat() : IfxCif.h
  • IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset() : IfxCif.h
  • IfxCif_getMiMainPictureYInterruptOffset() : IfxCif.h
  • IfxCif_getMiOffsetCounterInitializationEnableState() : IfxCif.h
  • IfxCif_getMiStatusInformation() : IfxCif.c , IfxCif.h
  • IfxCif_getModuleNumber() : IfxCif.h
  • IfxCif_getModuleRevisionNumber() : IfxCif.h
  • IfxCif_getModuleState() : IfxCif.h
  • IfxCif_getModuleType() : IfxCif.h
  • IfxCif_getNumberOfAcquisitionFrames() : IfxCif.h
  • IfxCif_getRawEpInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawIspInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawJpeInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawMiInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawSecurityWatchdogInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getSecurityWatchdogCounterPredivider() : IfxCif.h
  • IfxCif_getSecurityWatchdogEnableState() : IfxCif.h
  • IfxCif_getSecurityWatchdogInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getSecurityWatchdogTimeout() : IfxCif.c , IfxCif.h
  • IfxCif_getSoftwareResetMode() : IfxCif.c , IfxCif.h
  • IfxCif_getYCSplitterChannelMode() : IfxCif.h
  • IfxCif_HSNC_P00_9_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_HuffmanTableComponents : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component0 : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component1 : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component2 : IfxCif.h
  • IfxCif_HuffmanTables : IfxCif.h
  • IfxCif_HuffmanTables_Table0 : IfxCif.h
  • IfxCif_HuffmanTables_Table1 : IfxCif.h
  • IfxCif_ImageTiers : IfxCif.h
  • IfxCif_ImageTiers_Horizontal : IfxCif.h
  • IfxCif_ImageTiers_Vertical : IfxCif.h
  • IfxCif_initJpegEncoder() : IfxCif.h
  • IfxCif_InputInterface : IfxCif.h
  • IfxCif_InputInterface_ParallelInterface : IfxCif.h
  • IfxCif_InterruptTriggeredState : IfxCif.h
  • IfxCif_InterruptTriggeredState_NotTriggered : IfxCif.h
  • IfxCif_InterruptTriggeredState_Triggered : IfxCif.h
  • IfxCif_IspCcirSequence : IfxCif.h
  • IfxCif_IspCcirSequence_CbYCrY : IfxCif.h
  • IfxCif_IspCcirSequence_YCbYCr : IfxCif.h
  • IfxCif_IspCcirSequence_YCrYCb : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 : IfxCif.h
  • IfxCif_IspErrorSources : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInInformSubmodule : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule : IfxCif.h
  • IfxCif_IspFieldSelection : IfxCif.h
  • IfxCif_IspFieldSelection_AllFields : IfxCif.h
  • IfxCif_IspFieldSelection_OnlyEvenFields : IfxCif.h
  • IfxCif_IspFieldSelection_OnlyOddFields : IfxCif.h
  • IfxCif_IspInformFieldInformation : IfxCif.h
  • IfxCif_IspInformFieldInformation_Even : IfxCif.h
  • IfxCif_IspInformFieldInformation_Odd : IfxCif.h
  • IfxCif_IspInputInterface : IfxCif.h
  • IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_16BitExternalInterface : IfxCif.h
  • IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInterruptSources : IfxCif.h
  • IfxCif_IspInterruptSources_FrameCompletelyPutOut : IfxCif.h
  • IfxCif_IspInterruptSources_IspTurnedOff : IfxCif.h
  • IfxCif_IspInterruptSources_LossOfData : IfxCif.h
  • IfxCif_IspInterruptSources_PictureSizeViolationOccurred : IfxCif.h
  • IfxCif_IspInterruptSources_SampledInputFrameComplete : IfxCif.h
  • IfxCif_IspInterruptSources_SecurityWatchdogTimeout : IfxCif.h
  • IfxCif_IspInterruptSources_StartEdgeOfHSync : IfxCif.h
  • IfxCif_IspInterruptSources_StartEdgeOfVSync : IfxCif.h
  • IfxCif_IspMode : IfxCif.h
  • IfxCif_IspMode_DataMode : IfxCif.h
  • IfxCif_IspMode_ItuRBT601 : IfxCif.h
  • IfxCif_IspMode_ItuRBT656 : IfxCif.h
  • IfxCif_IspMode_RawPicture : IfxCif.h
  • IfxCif_IspMode_RawPictureWithItuRBT656Sync : IfxCif.h
  • IfxCif_IspSamplingEdge : IfxCif.h
  • IfxCif_IspSamplingEdge_NegativeEdge : IfxCif.h
  • IfxCif_IspSamplingEdge_PositiveEdge : IfxCif.h
  • IfxCif_IspSyncPolarity : IfxCif.h
  • IfxCif_IspSyncPolarity_HighActive : IfxCif.h
  • IfxCif_IspSyncPolarity_LowActive : IfxCif.h
  • IfxCif_JpeDebugSignalSources : IfxCif.h
  • IfxCif_JpeDebugSignalSources_BadTableAccess : IfxCif.h
  • IfxCif_JpeDebugSignalSources_QiqTableAccess : IfxCif.h
  • IfxCif_JpeDebugSignalSources_R2BMemoryFull : IfxCif.h
  • IfxCif_JpeDebugSignalSources_VlcEncodeBusy : IfxCif.h
  • IfxCif_JpeDebugSignalSources_VlcTableBusy : IfxCif.h
  • IfxCif_JpeDebugSignalState : IfxCif.h
  • IfxCif_JpeDebugSignalState_Active : IfxCif.h
  • IfxCif_JpeDebugSignalState_Inactive : IfxCif.h
  • IfxCif_jpeGenerateHeader() : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat_400 : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat_422 : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage : IfxCif.h
  • IfxCif_JpeHeaderMode : IfxCif.h
  • IfxCif_JpeHeaderMode_JfifHeader : IfxCif.h
  • IfxCif_JpeHeaderMode_NoAppnHeader : IfxCif.h
  • IfxCif_JpeInterruptSources : IfxCif.h
  • IfxCif_JpeInterruptSources_DcTableError : IfxCif.h
  • IfxCif_JpeInterruptSources_EncodingComplete : IfxCif.h
  • IfxCif_JpeInterruptSources_HeaderGenerationComplete : IfxCif.h
  • IfxCif_JpeInterruptSources_R2BImageSizeError : IfxCif.h
  • IfxCif_JpeInterruptSources_VlcSymbolError : IfxCif.h
  • IfxCif_JpeInterruptSources_VlcTableError : IfxCif.h
  • IfxCif_JpeQTableSelector : IfxCif.h
  • IfxCif_JpeQTableSelector_Table0 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table1 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table2 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table3 : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_U : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_V : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_Y : IfxCif.h
  • IfxCif_JpeScalingValueSources : IfxCif.h
  • IfxCif_JpeScalingValueSources_CbCr : IfxCif.h
  • IfxCif_JpeScalingValueSources_Y : IfxCif.h
  • IfxCif_JpeState : IfxCif.h
  • IfxCif_JpeState_Busy : IfxCif.h
  • IfxCif_JpeState_Free : IfxCif.h
  • IfxCif_JpeTableId : IfxCif.h
  • IfxCif_JpeTableId_QTable0 : IfxCif.h
  • IfxCif_JpeTableId_QTable1 : IfxCif.h
  • IfxCif_JpeTableId_QTable2 : IfxCif.h
  • IfxCif_JpeTableId_QTable3 : IfxCif.h
  • IfxCif_JpeTableId_VlcAcTable0 : IfxCif.h
  • IfxCif_JpeTableId_VlcAcTable1 : IfxCif.h
  • IfxCif_JpeTableId_VlcDcTable0 : IfxCif.h
  • IfxCif_JpeTableId_VlcDcTable1 : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_Disabled : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_DoublePass : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_DoubleSkip : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_SinglePass : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_SingleSkip : IfxCif.h
  • IFXCIF_MAX_I2CNAK : IfxCif_cfg.h
  • IfxCif_MiBurstLength : IfxCif.h
  • IfxCif_MiBurstLength_4BeatBursts : IfxCif.h
  • IfxCif_MiBurstLength_8BeatBursts : IfxCif.h
  • IfxCif_MiDataPaths : IfxCif.h
  • IfxCif_MiDataPaths_JpegData : IfxCif.h
  • IfxCif_MiDataPaths_MainPictureData : IfxCif.h
  • IfxCif_MiDataPaths_RawData : IfxCif.h
  • IfxCif_MiInterruptSources : IfxCif.h
  • IfxCif_MiInterruptSources_BusError : IfxCif.h
  • IfxCif_MiInterruptSources_FillMainPictureY : IfxCif.h
  • IfxCif_MiInterruptSources_MacroBlockLine : IfxCif.h
  • IfxCif_MiInterruptSources_MainPictureFrameEnd : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureCb : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureCr : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureY : IfxCif.h
  • IfxCif_MiMainPicturePathComponents : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Cb : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Cr : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Y : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit : IfxCif.h
  • IfxCif_miSkipPicture() : IfxCif.h
  • IfxCif_MiStatusClearSources : IfxCif.h
  • IfxCif_MiStatusClearSources_BusWriteError : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath1FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath2FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath3FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath4FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath5FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureCbFifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureCrFifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureYFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources : IfxCif.h
  • IfxCif_MiStatusInformationSources_BusWriteError : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureCbFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureCrFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureYFifoFull : IfxCif.h
  • IFXCIF_NUM_MODULES : IfxCif_cfg.h
  • IfxCif_PortInputSelection : IfxCif.h
  • IfxCif_PortInputSelection_PinMapping0 : IfxCif.h
  • IfxCif_PortInputSelection_PinMapping1 : IfxCif.h
  • IfxCif_programJpeTable() : IfxCif.c , IfxCif.h
  • IfxCif_resetModule() : IfxCif.c , IfxCif.h
  • IfxCif_resetSecurityWatchdogCounter() : IfxCif.c , IfxCif.h
  • IfxCif_SecurityWatchdogCounters : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Horizontal : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Predivider : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Vertical : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters_EndStart : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters_StartEnd : IfxCif.h
  • IfxCif_setClockControlLogicState() : IfxCif.h
  • IfxCif_setDataPathSelectorForMainPath() : IfxCif.h
  • IfxCif_setDpControlEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setDpCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setDpEnableState() : IfxCif.h
  • IfxCif_setDpSourcePath() : IfxCif.h
  • IfxCif_setDpUserDefinedSymbol() : IfxCif.c , IfxCif.h
  • IfxCif_setEpBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingOffsetsOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingPictureSizes() : IfxCif.c , IfxCif.h
  • IfxCif_setEpFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitialFillLevelInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setEpOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_setEpRecenterValue() : IfxCif.c , IfxCif.h
  • IfxCif_setEpWriteFormat() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanAcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanAcTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanDcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanDcTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setInputInterface() : IfxCif.h
  • IfxCif_setInternalClockMode() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionOffsets() : IfxCif.h
  • IfxCif_setIspAcquisitionSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionSizes() : IfxCif.h
  • IfxCif_setIspCcirSequence() : IfxCif.h
  • IfxCif_setIspColorSpaceMatrixCrominanceClippingRange() : IfxCif.h
  • IfxCif_setIspColorSpaceMatrixLuminanceClippingRange() : IfxCif.h
  • IfxCif_setIspFieldInvertState() : IfxCif.h
  • IfxCif_setIspFieldSelection() : IfxCif.h
  • IfxCif_setIspHSyncPolarity() : IfxCif.h
  • IfxCif_setIspInputFormatterState() : IfxCif.h
  • IfxCif_setIspInputInterface() : IfxCif.h
  • IfxCif_setIspInputSelectionAppendState() : IfxCif.c , IfxCif.h
  • IfxCif_setIspInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setIspInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisEnableState() : IfxCif.h
  • IfxCif_setIspisMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisOutputWindowOffsets() : IfxCif.h
  • IfxCif_setIspisPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisPictureSizes() : IfxCif.h
  • IfxCif_setIspisRecenterValue() : IfxCif.h
  • IfxCif_setIspMode() : IfxCif.h
  • IfxCif_setIspOutputState() : IfxCif.h
  • IfxCif_setIspOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspOutputWindowOffsets() : IfxCif.h
  • IfxCif_setIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspPictureSizes() : IfxCif.h
  • IfxCif_setIspSamplingEdge() : IfxCif.h
  • IfxCif_setIspVSyncPolarity() : IfxCif.h
  • IfxCif_setJpegCodecImageSize() : IfxCif.c , IfxCif.h
  • IfxCif_setJpegCodecImageSizes() : IfxCif.h
  • IfxCif_setJpegJfifStreamEncoderContinuousMode() : IfxCif.h
  • IfxCif_setJpegPictureEncodingFormat() : IfxCif.h
  • IfxCif_setJpeHeaderGenerationMode() : IfxCif.h
  • IfxCif_setJpeHeaderMode() : IfxCif.h
  • IfxCif_setJpeInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeQTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeRestartInterval() : IfxCif.h
  • IfxCif_setJpeScalingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeTableDataLsb() : IfxCif.h
  • IfxCif_setJpeTableDataMsb() : IfxCif.h
  • IfxCif_setJpeTableId() : IfxCif.h
  • IfxCif_setKernelResetRequestState() : IfxCif.h
  • IfxCif_setLinearDownscalerEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingFactor() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingFactors() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingMode() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingModes() : IfxCif.c , IfxCif.h
  • IfxCif_setMiBaseAddressInitializationEnableState() : IfxCif.h
  • IfxCif_setMiByteSwapEnableState() : IfxCif.h
  • IfxCif_setMiChrominanceBurstLength() : IfxCif.h
  • IfxCif_setMiFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setMiInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setMiInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setMiLuminanceBurstLength() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureWriteFormat() : IfxCif.h
  • IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset() : IfxCif.h
  • IfxCif_setMiOffsetCounterInitializationEnableState() : IfxCif.h
  • IfxCif_setModuleStateRequest() : IfxCif.c , IfxCif.h
  • IfxCif_setNumberOfAcquisitionFrames() : IfxCif.h
  • IfxCif_setSecurityWatchdogCounterPredivider() : IfxCif.h
  • IfxCif_setSecurityWatchdogEnableState() : IfxCif.h
  • IfxCif_setSecurityWatchdogInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setSecurityWatchdogInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setSecurityWatchdogTimeout() : IfxCif.c , IfxCif.h
  • IfxCif_setSoftwareResetMode() : IfxCif.c , IfxCif.h
  • IfxCif_setYCSplitterChannelMode() : IfxCif.h
  • IfxCif_startJpegJfifStreamEncoder() : IfxCif.h
  • IfxCif_State : IfxCif.h
  • IfxCif_State_Disabled : IfxCif.h
  • IfxCif_State_Enabled : IfxCif.h
  • IfxCif_Submodules : IfxCif.h
  • IfxCif_Submodules_AllModules : IfxCif.h
  • IfxCif_Submodules_Debug : IfxCif.h
  • IfxCif_Submodules_ExtraPaths : IfxCif.h
  • IfxCif_Submodules_ImageSignalProcessing : IfxCif.h
  • IfxCif_Submodules_JpegEncoder : IfxCif.h
  • IfxCif_Submodules_LinearDownscaler : IfxCif.h
  • IfxCif_Submodules_MemoryInterface : IfxCif.h
  • IfxCif_Submodules_SecurityWatchdog : IfxCif.h
  • IfxCif_Submodules_YCSplitter : IfxCif.h
  • IfxCif_VSNC_P00_8_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_YCSplitterChannelMode : IfxCif.h
  • IfxCif_YCSplitterChannelMode_Disabled : IfxCif.h
  • IfxCif_YCSplitterChannelMode_MainPathAndRawMode : IfxCif.h
  • IFXCOMPILER_COMMON_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFXCOMPILER_CORE_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IfxCpu_acquireMutex() : IfxCpu.c , IfxCpu.h
  • IFXCPU_ALLCORE_DONE : IfxCpu_cfg.h
  • IfxCpu_areInterruptsEnabled() : IfxCpu.h
  • IFXCPU_CACHABLE_FLASH_SEGMENT : IfxCpu_cfg.h
  • IFXCPU_CACHABLE_LMU_SEGMENT : IfxCpu_cfg.h
  • IfxCpu_calculateCrc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • IFXCPU_CFG_ALLCORE_DONE : IfxCpu_cfg.h
  • IfxCpu_cfg_indexMap : IfxCpu_cfg.c , IfxCpu_cfg.h
  • IfxCpu_CoreMode : IfxCpu.h
  • IfxCpu_CoreMode_halt : IfxCpu.h
  • IfxCpu_CoreMode_idle : IfxCpu.h
  • IfxCpu_CoreMode_run : IfxCpu.h
  • IfxCpu_CoreMode_sleep : IfxCpu.h
  • IfxCpu_CoreMode_stby : IfxCpu.h
  • IfxCpu_CoreMode_unknown : IfxCpu.h
  • IfxCpu_CounterMode : IfxCpu.h
  • IfxCpu_CounterMode_normal : IfxCpu.h
  • IfxCpu_CounterMode_task : IfxCpu.h
  • IFXCPU_CSTART_CCU_INIT_HOOK : IfxCpu_CStart0.c
  • IfxCpu_DBGST_HALT : IfxCpu_cfg.h
  • IfxCpu_DBGST_HALT_halt : IfxCpu_cfg.h
  • IfxCpu_DBGST_HALT_run : IfxCpu_cfg.h
  • IfxCpu_disableInterrupts() : IfxCpu.h
  • IfxCpu_emitEvent() : IfxCpu.c , IfxCpu.h
  • IfxCpu_enableInterrupts() : IfxCpu.h
  • IfxCpu_enableSegmentSpecificDataAccessCacheability() : IfxCpu.h
  • IfxCpu_enableSegmentSpecificInstructionAccessCacheability() : IfxCpu.h
  • IfxCpu_forceDisableInterrupts() : IfxCpu.h
  • IfxCpu_getAddress() : IfxCpu.h
  • IfxCpu_getClockCounter() : IfxCpu.h
  • IfxCpu_getClockCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getCoreId() : IfxCpu.h
  • IfxCpu_getCoreIndex() : IfxCpu.h
  • IfxCpu_getCoreMode() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getIndex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getInstructionCounter() : IfxCpu.h
  • IfxCpu_getInstructionCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getPerformanceCounter() : IfxCpu.h
  • IfxCpu_getPerformanceCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getRandomVal() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • IfxCpu_getRandomValue() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getRandomValueWithinRange() : IfxCpu.c , IfxCpu.h
  • IFXCPU_GLB_ADDR_DSPR : IfxCpu.h
  • IFXCPU_GLB_ADDR_PSPR : IfxCpu.h
  • IfxCpu_Id : IfxCpu_cfg.h
  • IfxCpu_Id_0 : IfxCpu_cfg.h
  • IfxCpu_Id_1 : IfxCpu_cfg.h
  • IfxCpu_Id_none : IfxCpu_cfg.h
  • IfxCpu_Index : IfxCpu_cfg.h
  • IfxCpu_Index_0 : IfxCpu_cfg.h
  • IfxCpu_Index_1 : IfxCpu_cfg.h
  • IfxCpu_Index_none : IfxCpu_cfg.h
  • IfxCpu_initCSA() : IfxCpu.h
  • IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS : IfxCpu_IntrinsicsGnuc.h
  • IfxCpu_invalidateProgramCache() : IfxCpu.h
  • IfxCpu_Irq_getTos() : IfxCpu_Irq.h
  • IfxCpu_isAddressCachable() : IfxCpu.h
  • IfxCpu_mutexLock : IfxCpu.h
  • IFXCPU_NUM_MODULES : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_idleMode : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_idleModeRequest : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_normalMode : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_sleepModeRequest : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_standbyModeRequest : IfxCpu_cfg.h
  • IfxCpu_releaseMutex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_resetAndStartCounters() : IfxCpu.h
  • IfxCpu_resetSpinLock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_ResourceCpu : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_0 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_1 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_none : IfxCpu_cfg.h
  • IfxCpu_restoreInterrupts() : IfxCpu.h
  • IfxCpu_setCoreMode() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setDataCache() : IfxCpu.h
  • IfxCpu_setPerformanceCountersEnableBit() : IfxCpu.h
  • IfxCpu_setProgramCache() : IfxCpu.h
  • IfxCpu_setProgramCounter() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setSafetyTaskIdentifier() : IfxCpu.h
  • IfxCpu_setSpinLock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_spinLock : IfxCpu.h
  • IfxCpu_startCore() : IfxCpu.c , IfxCpu.h
  • IfxCpu_stopCounters() : IfxCpu.h
  • IfxCpu_syncEvent : IfxCpu.h
  • IfxCpu_Trap_assertion() : IfxCpu_Trap.c
  • IfxCpu_Trap_Assertion_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_Assertion_Id_arithmeticOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataAccessSynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_programFetchSynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_programMemoryIntegrityError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_temporalAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_busError() : IfxCpu_Trap.c
  • IfxCpu_Trap_Class : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_assertion : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_bus : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_contextManagement : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_instructionErrors : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_internalProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_memoryManagement : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_nonMaskableInterrupt : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_systemCall : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callDepthOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callStackUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_contextType : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_nestingError : IfxCpu_Trap.h
  • IfxCpu_Trap_contextManagementError() : IfxCpu_Trap.c
  • IfxCpu_Trap_extractTrapInfo() : IfxCpu_Trap.c
  • IfxCpu_Trap_instructionError() : IfxCpu_Trap.c
  • IfxCpu_Trap_InstructionErrors_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_illegalOpcode : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_invalidOperand : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_privilegeViolation : IfxCpu_Trap.h
  • IfxCpu_Trap_internalProtectionError() : IfxCpu_Trap.c
  • IfxCpu_Trap_MemoryManagement_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_memoryManagementError() : IfxCpu_Trap.c
  • IfxCpu_Trap_nonMaskableInterrupt() : IfxCpu_Trap.c
  • IfxCpu_Trap_NonMaskableInterrupt_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_systemCall_Cpu0() : IfxCpu_Trap.c
  • IfxCpu_Trap_SystemCall_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_vectorTable0() : IfxCpu_Trap.c
  • IfxCpu_triggerSwReset() : IfxCpu.h
  • IfxCpu_updateClockCounter() : IfxCpu.h
  • IfxCpu_updateInstructionCounter() : IfxCpu.h
  • IfxCpu_updatePerformanceCounter() : IfxCpu.h
  • IfxCpu_waitEvent() : IfxCpu.c , IfxCpu.h
  • IFXCSTART0_PCX_O_S_DEFAULT : IfxCpu_CStart0.c
  • IFXCSTART0_PSW_DEFAULT : IfxCpu_CStart0.c
  • IFXCSTART1_PCX_O_S_DEFAULT : IfxCpu_CStart1.c
  • IFXCSTART1_PSW_DEFAULT : IfxCpu_CStart1.c
  • IfxDma_BusMasterMode : IfxDma.h
  • IfxDma_BusMasterMode_supervisor : IfxDma.h
  • IfxDma_BusMasterMode_user : IfxDma.h
  • IfxDma_ChannelBusPriority : IfxDma.h
  • IfxDma_ChannelBusPriority_high : IfxDma.h
  • IfxDma_ChannelBusPriority_low : IfxDma.h
  • IfxDma_ChannelBusPriority_medium : IfxDma.h
  • IfxDma_ChannelId : IfxDma_cfg.h
  • IfxDma_ChannelId_0 : IfxDma_cfg.h
  • IfxDma_ChannelId_1 : IfxDma_cfg.h
  • IfxDma_ChannelId_10 : IfxDma_cfg.h
  • IfxDma_ChannelId_11 : IfxDma_cfg.h
  • IfxDma_ChannelId_12 : IfxDma_cfg.h
  • IfxDma_ChannelId_13 : IfxDma_cfg.h
  • IfxDma_ChannelId_14 : IfxDma_cfg.h
  • IfxDma_ChannelId_15 : IfxDma_cfg.h
  • IfxDma_ChannelId_16 : IfxDma_cfg.h
  • IfxDma_ChannelId_17 : IfxDma_cfg.h
  • IfxDma_ChannelId_18 : IfxDma_cfg.h
  • IfxDma_ChannelId_19 : IfxDma_cfg.h
  • IfxDma_ChannelId_2 : IfxDma_cfg.h
  • IfxDma_ChannelId_20 : IfxDma_cfg.h
  • IfxDma_ChannelId_21 : IfxDma_cfg.h
  • IfxDma_ChannelId_22 : IfxDma_cfg.h
  • IfxDma_ChannelId_23 : IfxDma_cfg.h
  • IfxDma_ChannelId_24 : IfxDma_cfg.h
  • IfxDma_ChannelId_25 : IfxDma_cfg.h
  • IfxDma_ChannelId_26 : IfxDma_cfg.h
  • IfxDma_ChannelId_27 : IfxDma_cfg.h
  • IfxDma_ChannelId_28 : IfxDma_cfg.h
  • IfxDma_ChannelId_29 : IfxDma_cfg.h
  • IfxDma_ChannelId_3 : IfxDma_cfg.h
  • IfxDma_ChannelId_30 : IfxDma_cfg.h
  • IfxDma_ChannelId_31 : IfxDma_cfg.h
  • IfxDma_ChannelId_32 : IfxDma_cfg.h
  • IfxDma_ChannelId_33 : IfxDma_cfg.h
  • IfxDma_ChannelId_34 : IfxDma_cfg.h
  • IfxDma_ChannelId_35 : IfxDma_cfg.h
  • IfxDma_ChannelId_36 : IfxDma_cfg.h
  • IfxDma_ChannelId_37 : IfxDma_cfg.h
  • IfxDma_ChannelId_38 : IfxDma_cfg.h
  • IfxDma_ChannelId_39 : IfxDma_cfg.h
  • IfxDma_ChannelId_4 : IfxDma_cfg.h
  • IfxDma_ChannelId_40 : IfxDma_cfg.h
  • IfxDma_ChannelId_41 : IfxDma_cfg.h
  • IfxDma_ChannelId_42 : IfxDma_cfg.h
  • IfxDma_ChannelId_43 : IfxDma_cfg.h
  • IfxDma_ChannelId_44 : IfxDma_cfg.h
  • IfxDma_ChannelId_45 : IfxDma_cfg.h
  • IfxDma_ChannelId_46 : IfxDma_cfg.h
  • IfxDma_ChannelId_47 : IfxDma_cfg.h
  • IfxDma_ChannelId_5 : IfxDma_cfg.h
  • IfxDma_ChannelId_6 : IfxDma_cfg.h
  • IfxDma_ChannelId_7 : IfxDma_cfg.h
  • IfxDma_ChannelId_8 : IfxDma_cfg.h
  • IfxDma_ChannelId_9 : IfxDma_cfg.h
  • IfxDma_ChannelId_none : IfxDma_cfg.h
  • IfxDma_ChannelIncrementCircular : IfxDma.h
  • IfxDma_ChannelIncrementCircular_1024 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_128 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_16 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_16384 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_2 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_2048 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_256 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_32 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_32768 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_4 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_4096 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_512 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_64 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_8 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_8192 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_none : IfxDma.h
  • IfxDma_ChannelIncrementDirection : IfxDma.h
  • IfxDma_ChannelIncrementDirection_negative : IfxDma.h
  • IfxDma_ChannelIncrementDirection_positive : IfxDma.h
  • IfxDma_ChannelIncrementStep : IfxDma.h
  • IfxDma_ChannelIncrementStep_1 : IfxDma.h
  • IfxDma_ChannelIncrementStep_128 : IfxDma.h
  • IfxDma_ChannelIncrementStep_16 : IfxDma.h
  • IfxDma_ChannelIncrementStep_2 : IfxDma.h
  • IfxDma_ChannelIncrementStep_32 : IfxDma.h
  • IfxDma_ChannelIncrementStep_4 : IfxDma.h
  • IfxDma_ChannelIncrementStep_64 : IfxDma.h
  • IfxDma_ChannelIncrementStep_8 : IfxDma.h
  • IfxDma_ChannelInterruptControl : IfxDma.h
  • IfxDma_ChannelInterruptControl_thresholdLimitMatch : IfxDma.h
  • IfxDma_ChannelInterruptControl_transferCountDecremented : IfxDma.h
  • IfxDma_ChannelMove : IfxDma.h
  • IfxDma_ChannelMove_1 : IfxDma.h
  • IfxDma_ChannelMove_16 : IfxDma.h
  • IfxDma_ChannelMove_2 : IfxDma.h
  • IfxDma_ChannelMove_3 : IfxDma.h
  • IfxDma_ChannelMove_4 : IfxDma.h
  • IfxDma_ChannelMove_5 : IfxDma.h
  • IfxDma_ChannelMove_8 : IfxDma.h
  • IfxDma_ChannelMove_9 : IfxDma.h
  • IfxDma_ChannelMoveSize : IfxDma.h
  • IfxDma_ChannelMoveSize_128bit : IfxDma.h
  • IfxDma_ChannelMoveSize_16bit : IfxDma.h
  • IfxDma_ChannelMoveSize_256bit : IfxDma.h
  • IfxDma_ChannelMoveSize_32bit : IfxDma.h
  • IfxDma_ChannelMoveSize_64bit : IfxDma.h
  • IfxDma_ChannelMoveSize_8bit : IfxDma.h
  • IfxDma_ChannelOperationMode : IfxDma.h
  • IfxDma_ChannelOperationMode_continuous : IfxDma.h
  • IfxDma_ChannelOperationMode_single : IfxDma.h
  • IfxDma_ChannelPattern : IfxDma.h
  • IfxDma_ChannelPattern_0_disable : IfxDma.h
  • IfxDma_ChannelPattern_0_mode1 : IfxDma.h
  • IfxDma_ChannelPattern_0_mode2 : IfxDma.h
  • IfxDma_ChannelPattern_0_mode3 : IfxDma.h
  • IfxDma_ChannelPattern_1_disable : IfxDma.h
  • IfxDma_ChannelPattern_1_mode1 : IfxDma.h
  • IfxDma_ChannelPattern_1_mode2 : IfxDma.h
  • IfxDma_ChannelPattern_1_mode3 : IfxDma.h
  • IfxDma_ChannelPriority : IfxDma.h
  • IfxDma_ChannelPriority_high : IfxDma.h
  • IfxDma_ChannelPriority_low : IfxDma.h
  • IfxDma_ChannelPriority_medium : IfxDma.h
  • IfxDma_ChannelRequestMode : IfxDma.h
  • IfxDma_ChannelRequestMode_completeTransactionPerRequest : IfxDma.h
  • IfxDma_ChannelRequestMode_oneTransferPerRequest : IfxDma.h
  • IfxDma_ChannelRequestSource : IfxDma.h
  • IfxDma_ChannelRequestSource_daisyChain : IfxDma.h
  • IfxDma_ChannelRequestSource_peripheral : IfxDma.h
  • IfxDma_ChannelShadow : IfxDma.h
  • IfxDma_ChannelShadow_accumulatedLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_conditionalLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_dst : IfxDma.h
  • IfxDma_ChannelShadow_dstDirectWrite : IfxDma.h
  • IfxDma_ChannelShadow_linkedList : IfxDma.h
  • IfxDma_ChannelShadow_none : IfxDma.h
  • IfxDma_ChannelShadow_safeLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_src : IfxDma.h
  • IfxDma_ChannelShadow_srcDirectWrite : IfxDma.h
  • IfxDma_clearChannelHalt() : IfxDma.h
  • IfxDma_clearChannelInterrupt() : IfxDma.h
  • IfxDma_clearChannelTransactionRequestLost() : IfxDma.h
  • IfxDma_clearErrorFlags() : IfxDma.h
  • IfxDma_disableChannelInterrupt() : IfxDma.h
  • IfxDma_disableChannelTransaction() : IfxDma.h
  • IfxDma_disableChannelTransactionLostError() : IfxDma.h
  • IfxDma_disableMoveEngineDestinationError() : IfxDma.h
  • IfxDma_disableMoveEngineSourceError() : IfxDma.h
  • IfxDma_Dma_clearChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_configureTransactionSet() : IfxDma_Dma.c
  • IfxDma_Dma_createModuleHandle() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_deInitChannel() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_getAndClearChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_getChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_getSrcPointer() : IfxDma_Dma.h
  • IfxDma_Dma_initChannel() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initChannelConfig() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initLinkedListEntry() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initModule() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initModuleConfig() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_isChannelTransactionPending() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelDestinationAddress() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelSourceAddress() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelTransferCount() : IfxDma_Dma.h
  • IfxDma_Dma_startChannelTransaction() : IfxDma_Dma.h
  • IfxDma_enableChannelInterrupt() : IfxDma.h
  • IfxDma_enableChannelTransaction() : IfxDma.h
  • IfxDma_enableChannelTransactionLostError() : IfxDma.h
  • IfxDma_enableDestinationCircularBuffer() : IfxDma.h
  • IfxDma_enableMoveEngineDestinationError() : IfxDma.h
  • IfxDma_enableMoveEngineSourceError() : IfxDma.h
  • IfxDma_enableSourceCircularBuffer() : IfxDma.h
  • IFXDMA_ERROR_D : IfxDma_cfg.h
  • IFXDMA_ERROR_DLL : IfxDma_cfg.h
  • IFXDMA_ERROR_RAM : IfxDma_cfg.h
  • IFXDMA_ERROR_S : IfxDma_cfg.h
  • IFXDMA_ERROR_SLL : IfxDma_cfg.h
  • IFXDMA_ERROR_SPB : IfxDma_cfg.h
  • IFXDMA_ERROR_SRI : IfxDma_cfg.h
  • IfxDma_getAndClearChannelInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelPatternDetectionInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelWrapDestinationBufferInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelWrapSourceBufferInterrupt() : IfxDma.h
  • IfxDma_getChannelDestinationAddress() : IfxDma.h
  • IfxDma_getChannelHalt() : IfxDma.h
  • IfxDma_getChannelInterrupt() : IfxDma.h
  • IfxDma_getChannelPatternDetectionOldValue() : IfxDma.h
  • IfxDma_getChannelSourceAddress() : IfxDma.h
  • IfxDma_getChannelSuspendModeStatus() : IfxDma.h
  • IfxDma_getChannelTransactionRequestLost() : IfxDma.h
  • IfxDma_getChannelTransferCount() : IfxDma.h
  • IfxDma_getCircularRangeCode() : IfxDma.h
  • IfxDma_getDataCRC() : IfxDma.h
  • IfxDma_getDoubleBufferRead() : IfxDma.h
  • IfxDma_getDoubleBufferSelection() : IfxDma.h
  • IfxDma_getErrorFlags() : IfxDma.h
  • IfxDma_getErrPointer() : IfxDma.h
  • IfxDma_getSourceAndDestinationCRC() : IfxDma.h
  • IfxDma_getSrcPointer() : IfxDma.h
  • IfxDma_getTimestamp() : IfxDma.h
  • IfxDma_HardwareResourcePartition : IfxDma.h
  • IfxDma_HardwareResourcePartition_0 : IfxDma.h
  • IfxDma_HardwareResourcePartition_1 : IfxDma.h
  • IfxDma_HardwareResourcePartition_2 : IfxDma.h
  • IfxDma_HardwareResourcePartition_3 : IfxDma.h
  • IfxDma_isChannelReset() : IfxDma.h
  • IfxDma_isChannelTransactionEnabled() : IfxDma.h
  • IfxDma_isChannelTransactionPending() : IfxDma.h
  • IfxDma_keepDoubleBufferActive() : IfxDma.h
  • IfxDma_MoveEngine : IfxDma.h
  • IfxDma_MoveEngine_0 : IfxDma.h
  • IfxDma_MoveEngine_1 : IfxDma.h
  • IFXDMA_NUM_CHANNELS : IfxDma_cfg.h
  • IFXDMA_NUM_MODULES : IfxDma_cfg.h
  • IfxDma_resetChannel() : IfxDma.h
  • IfxDma_setChannelBlockMode() : IfxDma.h
  • IfxDma_setChannelContinuousMode() : IfxDma.h
  • IfxDma_setChannelDestinationAddress() : IfxDma.h
  • IfxDma_setChannelDestinationIncrementStep() : IfxDma.h
  • IfxDma_setChannelHalt() : IfxDma.h
  • IfxDma_setChannelHardwareResourcePartition() : IfxDma.h
  • IfxDma_setChannelInterruptServiceRequest() : IfxDma.h
  • IfxDma_setChannelMoveSize() : IfxDma.h
  • IfxDma_setChannelShadow() : IfxDma.h
  • IfxDma_setChannelSingleMode() : IfxDma.h
  • IfxDma_setChannelSingleTransaction() : IfxDma.h
  • IfxDma_setChannelSingleTransfer() : IfxDma.h
  • IfxDma_setChannelSourceAddress() : IfxDma.h
  • IfxDma_setChannelSourceIncrementStep() : IfxDma.h
  • IfxDma_setChannelSuspendEnable() : IfxDma.h
  • IfxDma_setChannelTransferCount() : IfxDma.h
  • IfxDma_setCircularBufferDestinationLength() : IfxDma.h
  • IfxDma_setCircularBufferSourceLength() : IfxDma.h
  • IfxDma_setInterruptControlValue() : IfxDma.h
  • IfxDma_setSleepMode() : IfxDma.h
  • IfxDma_SleepMode : IfxDma.h
  • IfxDma_SleepMode_disable : IfxDma.h
  • IfxDma_SleepMode_enable : IfxDma.h
  • IfxDma_startChannelTransaction() : IfxDma.h
  • IfxDma_switchDoubleBuffer() : IfxDma.h
  • IfxDma_writeChannelShadowDisable() : IfxDma.h
  • IfxDma_writeChannelShadowEnable() : IfxDma.h
  • IfxDsadc_AuxCombFilterShift : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_noShift : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb1 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb2 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb3 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_combF : IfxDsadc.h
  • IfxDsadc_AuxEvent : IfxDsadc.h
  • IfxDsadc_AuxEvent_everyNewResult : IfxDsadc.h
  • IfxDsadc_AuxEvent_insideBoundary : IfxDsadc.h
  • IfxDsadc_AuxEvent_outsideBoundary : IfxDsadc.h
  • IfxDsadc_AuxGate : IfxDsadc.h
  • IfxDsadc_AuxGate_coupledToIntegrator : IfxDsadc.h
  • IfxDsadc_AuxGate_definedByESEL : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_altSource : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_auxFilter : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_never : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_sine : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_square : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_stopped : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_triangle : IfxDsadc.h
  • IfxDsadc_Cgpwm_Out_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P00_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P02_0_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P33_11_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P00_6_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P02_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P33_12_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ChannelId : IfxDsadc.h
  • IfxDsadc_ChannelId_0 : IfxDsadc.h
  • IfxDsadc_ChannelId_2 : IfxDsadc.h
  • IfxDsadc_ChannelId_3 : IfxDsadc.h
  • IfxDsadc_CIN0A_P00_1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN0B_P33_5_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN2A_P00_5_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN2B_P33_1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN3A_P00_3_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN3B_P02_7_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Cin_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CommonModeVoltage : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_a : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_b : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_c : IfxDsadc.h
  • IfxDsadc_COUT0_P00_11_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT0_P00_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT0_P33_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT2_P00_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT2_P33_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT3_P00_3_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT3_P02_7_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Cout_Out_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN0A_P00_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN0B_P33_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN2A_P00_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN2B_P33_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN3A_P00_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN3B_P02_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Din_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0NA_AN3_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0NB_AN1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0PA_AN2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0PB_AN0_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS2NA_AN21_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS2PA_AN20_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NA_AN37_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NA_P40_7_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NB_AN39_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NB_P40_9_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NC_AN45_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3ND_AN47_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PA_AN36_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PA_P40_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PB_AN38_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PB_P40_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PC_AN44_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PD_AN46_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Dsadc_calcDIVx() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_getAuxResult() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getAuxSrc() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getMainResult() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getMainSrc() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initAuxFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initCarrierGen() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initCarrierGenConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initChannel() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initChannelConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initCombFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initDemodulator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initFirFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initIntegrator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initModulator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initModule() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initModuleConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initRectifier() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_startScan() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_stopScan() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsn_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Dsp_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_FirDataShift : IfxDsadc.h
  • IfxDsadc_FirDataShift_noShift : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_FirInternalShift : IfxDsadc.h
  • IfxDsadc_FirInternalShift_noShift : IfxDsadc.h
  • IfxDsadc_FirInternalShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_getAuxResult() : IfxDsadc.h
  • IfxDsadc_getAuxSrc() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getIntegratorOutFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainCombDecimation() : IfxDsadc.h
  • IfxDsadc_getMainCombOutFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainGroupDelay() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainResult() : IfxDsadc.h
  • IfxDsadc_getMainSrc() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getModulatorClockFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getModulatorInputClockFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_initCgPwmPin() : IfxDsadc.h
  • IfxDsadc_initCinPin() : IfxDsadc.h
  • IfxDsadc_initCoutPin() : IfxDsadc.h
  • IfxDsadc_initDinPin() : IfxDsadc.h
  • IfxDsadc_initDsnPin() : IfxDsadc.h
  • IfxDsadc_initDspPin() : IfxDsadc.h
  • IfxDsadc_initItrPin() : IfxDsadc.h
  • IfxDsadc_initSgPin() : IfxDsadc.h
  • IfxDsadc_InputConfig : IfxDsadc.h
  • IfxDsadc_InputConfig_commonModeVoltage : IfxDsadc.h
  • IfxDsadc_InputConfig_inputPin : IfxDsadc.h
  • IfxDsadc_InputConfig_referenceGround : IfxDsadc.h
  • IfxDsadc_InputConfig_supplyVoltage : IfxDsadc.h
  • IfxDsadc_InputDataSource : IfxDsadc.h
  • IfxDsadc_InputDataSource_directInputA : IfxDsadc.h
  • IfxDsadc_InputDataSource_directInputB : IfxDsadc.h
  • IfxDsadc_InputDataSource_invertedInputA : IfxDsadc.h
  • IfxDsadc_InputDataSource_invertedInputB : IfxDsadc.h
  • IfxDsadc_InputDataSource_onChipCombined : IfxDsadc.h
  • IfxDsadc_InputDataSource_onChipStandAlone : IfxDsadc.h
  • IfxDsadc_InputGain : IfxDsadc.h
  • IfxDsadc_InputGain_factor1 : IfxDsadc.h
  • IfxDsadc_InputGain_factor16 : IfxDsadc.h
  • IfxDsadc_InputGain_factor2 : IfxDsadc.h
  • IfxDsadc_InputGain_factor4 : IfxDsadc.h
  • IfxDsadc_InputGain_factor8 : IfxDsadc.h
  • IfxDsadc_InputPin : IfxDsadc.h
  • IfxDsadc_InputPin_a : IfxDsadc.h
  • IfxDsadc_InputPin_b : IfxDsadc.h
  • IfxDsadc_InputPin_c : IfxDsadc.h
  • IfxDsadc_InputPin_d : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize_externalControl : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize_internalControl : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_alwaysActive : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_bypassed : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_fallingEdge : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_risingEdge : IfxDsadc.h
  • IfxDsadc_isModuleEnabled() : IfxDsadc.h
  • IfxDsadc_ITR0E_P33_0_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR0F_P33_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR2E_P33_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR2F_P33_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR3E_P02_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR3F_P00_9_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Itr_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_LowPowerSupply : IfxDsadc.h
  • IfxDsadc_LowPowerSupply_3_3V : IfxDsadc.h
  • IfxDsadc_LowPowerSupply_5V : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_noShift : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb1 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb2 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb3 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_combF : IfxDsadc.h
  • IfxDsadc_MainServiceRequest : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_everyNewResult : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_highGateSignal : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_lowGateSignal : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_never : IfxDsadc.h
  • IfxDsadc_ModulatorClock : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fDSD : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fERAY : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fOSC0 : IfxDsadc.h
  • IfxDsadc_ModulatorClock_off : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div10 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div12 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div14 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div16 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div18 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div2 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div20 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div22 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div24 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div26 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div28 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div30 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div32 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div4 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div6 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div8 : IfxDsadc.h
  • IFXDSADC_NUM_CHANNELS : IfxDsadc_cfg.h
  • IFXDSADC_NUM_MODULES : IfxDsadc_cfg.h
  • IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_NUM_CHANNELS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_NUM_MODULES : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_SG_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IfxDsadc_Rdc_calculateGroupDelay() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_calculateTimestampPeriod() : IfxDsadc_Rdc.c
  • IFXDSADC_RDC_CFG_DEBUG : IfxDsadc_Rdc.h
  • IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getAbsolutePosition() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getDirection() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getFault() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getOffset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getPeriodPerRotation() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getPosition() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getRawPosition() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getRefreshPeriod() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getResolution() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getSensorType() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getSpeed() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getTimestamp() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getTurn() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getUpdatePeriod() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_GtmTimCfg : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_init() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_initConfig() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_initGtmTim() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_initHwChannels() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_initHwTimestamp() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_onEventA() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_reset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_resetFaults() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_setOffset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_setRefreshPeriod() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_startConversion() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_stdIfPosInit() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_update() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_updateTimestamp() : IfxDsadc_Rdc.c
  • IfxDsadc_RectifierSignSource : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_externalA : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_externalB : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_nextChannel : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_onChipGenerator : IfxDsadc.h
  • IfxDsadc_resetModule() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_SampleClockSource : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputA : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputB : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputC : IfxDsadc.h
  • IfxDsadc_SampleClockSource_internal : IfxDsadc.h
  • IfxDsadc_SampleStrobe : IfxDsadc.h
  • IfxDsadc_SampleStrobe_noDataStrobe : IfxDsadc.h
  • IfxDsadc_SampleStrobe_reserved : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnBothEdges : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnFallingEdge : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnRisingEdge : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges : IfxDsadc.h
  • IfxDsadc_setCarrierMode() : IfxDsadc.h
  • IfxDsadc_setSleepMode() : IfxDsadc.h
  • IfxDsadc_Sg_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_SGNA_P00_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_SGNB_P33_13_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_SleepMode : IfxDsadc.h
  • IfxDsadc_SleepMode_disable : IfxDsadc.h
  • IfxDsadc_SleepMode_enable : IfxDsadc.h
  • IfxDsadc_startScan() : IfxDsadc.h
  • IfxDsadc_stopScan() : IfxDsadc.h
  • IfxDsadc_TimestampTrigger : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_eachEdge : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_fallingEdge : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_noTrigger : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_risingEdge : IfxDsadc.h
  • IfxDsadc_TriggerInput : IfxDsadc.h
  • IfxDsadc_TriggerInput_a : IfxDsadc.h
  • IfxDsadc_TriggerInput_b : IfxDsadc.h
  • IfxDsadc_TriggerInput_c : IfxDsadc.h
  • IfxDsadc_TriggerInput_d : IfxDsadc.h
  • IfxDsadc_TriggerInput_e : IfxDsadc.h
  • IfxDsadc_TriggerInput_f : IfxDsadc.h
  • IfxDsadc_TriggerInput_g : IfxDsadc.h
  • IfxDsadc_TriggerInput_h : IfxDsadc.h
  • IfxDts_disableSensorControl() : IfxDts.h
  • IfxDts_Dts_convertFromCelsius() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_convertToCelsius() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_getTemperatureCelsius() : IfxDts_Dts.h
  • IfxDts_Dts_getTemperatureValue() : IfxDts_Dts.h
  • IfxDts_Dts_initModule() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_initModuleConfig() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_isBusy() : IfxDts_Dts.h
  • IfxDts_Dts_startSensor() : IfxDts_Dts.h
  • IfxDts_enableSensor() : IfxDts.h
  • IfxDts_getSrcPointer() : IfxDts.h
  • IfxDts_getTemperatureValue() : IfxDts.h
  • IfxDts_isBusy() : IfxDts.h
  • IfxDts_isReady() : IfxDts.c , IfxDts.h
  • IFXDTS_NUM_MODULES : IfxDts_cfg.h
  • IfxDts_startSensor() : IfxDts.h
  • IfxEmem_getLockedState() : IfxEmem.c , IfxEmem.h
  • IfxEmem_isModuleEnabled() : IfxEmem.h
  • IfxEmem_LockedState : IfxEmem.h
  • IfxEmem_LockedState_locked : IfxEmem.h
  • IfxEmem_LockedState_unlocked : IfxEmem.h
  • IFXEMEM_NUM_MODULES : IfxEmem_cfg.h
  • IfxEmem_setClockEnableState() : IfxEmem.c , IfxEmem.h
  • IfxEmem_setTileConfigMode() : IfxEmem.h
  • IfxEmem_setUnlockStandbyLockFlag() : IfxEmem.h
  • IFXEMEM_SIZE : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_BBB : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_CPU : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_CPU_CACHED : IfxEmem_cfg.h
  • IfxEmem_State : IfxEmem.h
  • IfxEmem_State_disabled : IfxEmem.h
  • IfxEmem_State_enabled : IfxEmem.h
  • IfxEmem_TileConfigMode : IfxEmem.h
  • IfxEmem_TileConfigMode_calibMode : IfxEmem.h
  • IfxEmem_TileNumber : IfxEmem.h
  • IfxEmem_TileNumber_0 : IfxEmem.h
  • IfxEmem_TileNumber_1 : IfxEmem.h
  • IfxEmem_TileNumber_10 : IfxEmem.h
  • IfxEmem_TileNumber_11 : IfxEmem.h
  • IfxEmem_TileNumber_12 : IfxEmem.h
  • IfxEmem_TileNumber_13 : IfxEmem.h
  • IfxEmem_TileNumber_14 : IfxEmem.h
  • IfxEmem_TileNumber_15 : IfxEmem.h
  • IfxEmem_TileNumber_2 : IfxEmem.h
  • IfxEmem_TileNumber_3 : IfxEmem.h
  • IfxEmem_TileNumber_4 : IfxEmem.h
  • IfxEmem_TileNumber_5 : IfxEmem.h
  • IfxEmem_TileNumber_6 : IfxEmem.h
  • IfxEmem_TileNumber_7 : IfxEmem.h
  • IfxEmem_TileNumber_8 : IfxEmem.h
  • IfxEmem_TileNumber_9 : IfxEmem.h
  • IfxEray0_RXDA0_P14_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA1_P11_9_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA2_P02_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB0_P14_7_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB1_P11_10_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB2_P02_3_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P02_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P11_3_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P14_10_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P02_2_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P11_12_OUT : IfxEray_PinMap.h , IfxEray_PinMap.c
  • IfxEray0_TXDB_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P14_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P02_4_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P02_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P11_11_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P14_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_Baudrate : IfxEray.h
  • IfxEray_Baudrate_10 : IfxEray.h
  • IfxEray_Baudrate_2_5 : IfxEray.h
  • IfxEray_Baudrate_5 : IfxEray.h
  • IfxEray_BufferDirection : IfxEray.h
  • IfxEray_BufferDirection_receive : IfxEray.h
  • IfxEray_BufferDirection_transmit : IfxEray.h
  • IfxEray_calcHeaderCrc() : IfxEray.c , IfxEray.h
  • IfxEray_cfg_indexMap : IfxEray_cfg.c , IfxEray_cfg.h
  • IfxEray_changePocState() : IfxEray.c , IfxEray.h
  • IfxEray_Channel : IfxEray.h
  • IfxEray_Channel_a : IfxEray.h
  • IfxEray_Channel_b : IfxEray.h
  • IfxEray_clearAllFlags() : IfxEray.c , IfxEray.h
  • IfxEray_clearErrorFlag() : IfxEray.h
  • IfxEray_ClearErrorFlag : IfxEray.h
  • IfxEray_ClearErrorFlag_ccf : IfxEray.h
  • IfxEray_ClearErrorFlag_ccl : IfxEray.h
  • IfxEray_ClearErrorFlag_cna : IfxEray.h
  • IfxEray_ClearErrorFlag_eda : IfxEray.h
  • IfxEray_ClearErrorFlag_edb : IfxEray.h
  • IfxEray_ClearErrorFlag_eerr : IfxEray.h
  • IfxEray_ClearErrorFlag_efa : IfxEray.h
  • IfxEray_ClearErrorFlag_iiba : IfxEray.h
  • IfxEray_ClearErrorFlag_ioba : IfxEray.h
  • IfxEray_ClearErrorFlag_ltva : IfxEray.h
  • IfxEray_ClearErrorFlag_ltvb : IfxEray.h
  • IfxEray_ClearErrorFlag_mhf : IfxEray.h
  • IfxEray_ClearErrorFlag_pemc : IfxEray.h
  • IfxEray_ClearErrorFlag_rfo : IfxEray.h
  • IfxEray_ClearErrorFlag_sfbm : IfxEray.h
  • IfxEray_ClearErrorFlag_sfo : IfxEray.h
  • IfxEray_ClearErrorFlag_taba : IfxEray.h
  • IfxEray_ClearErrorFlag_tabb : IfxEray.h
  • IfxEray_ClearStatusFlag : IfxEray.h
  • IfxEray_clearStatusFlag() : IfxEray.h
  • IfxEray_ClearStatusFlag_cas : IfxEray.h
  • IfxEray_ClearStatusFlag_cycs : IfxEray.h
  • IfxEray_ClearStatusFlag_mbsi : IfxEray.h
  • IfxEray_ClearStatusFlag_mtsa : IfxEray.h
  • IfxEray_ClearStatusFlag_mtsb : IfxEray.h
  • IfxEray_ClearStatusFlag_nmvc : IfxEray.h
  • IfxEray_ClearStatusFlag_rfcl : IfxEray.h
  • IfxEray_ClearStatusFlag_rfne : IfxEray.h
  • IfxEray_ClearStatusFlag_rxi : IfxEray.h
  • IfxEray_ClearStatusFlag_sds : IfxEray.h
  • IfxEray_ClearStatusFlag_sucs : IfxEray.h
  • IfxEray_ClearStatusFlag_swe : IfxEray.h
  • IfxEray_ClearStatusFlag_ti0 : IfxEray.h
  • IfxEray_ClearStatusFlag_ti1 : IfxEray.h
  • IfxEray_ClearStatusFlag_tibc : IfxEray.h
  • IfxEray_ClearStatusFlag_tobc : IfxEray.h
  • IfxEray_ClearStatusFlag_txi : IfxEray.h
  • IfxEray_ClearStatusFlag_wst : IfxEray.h
  • IfxEray_ClearStatusFlag_wupa : IfxEray.h
  • IfxEray_ClearStatusFlag_wupb : IfxEray.h
  • IfxEray_ClockDivider : IfxEray.h
  • IfxEray_ClockDivider_1 : IfxEray.h
  • IfxEray_ClockDivider_2 : IfxEray.h
  • IfxEray_ClockDivider_3 : IfxEray.h
  • IfxEray_ClockDivider_4 : IfxEray.h
  • IfxEray_ClockDivider_5 : IfxEray.h
  • IfxEray_ClockDivider_6 : IfxEray.h
  • IfxEray_ClockDivider_7 : IfxEray.h
  • IfxEray_ClockDivider_none : IfxEray.h
  • IfxEray_disableModule() : IfxEray.h
  • IfxEray_enableInterruptLines() : IfxEray.c , IfxEray.h
  • IfxEray_enableModule() : IfxEray.h
  • IfxEray_Eray_allowColdStart() : IfxEray_Eray.h
  • IfxEray_Eray_bufferReconfig() : IfxEray_Eray.h
  • IfxEray_Eray_changePocState() : IfxEray_Eray.h
  • IfxEray_Eray_clearErrorFlag() : IfxEray_Eray.h
  • IfxEray_Eray_clearStatusFlag() : IfxEray_Eray.h
  • IfxEray_Eray_deInitModule() : IfxEray_Eray.h
  • IfxEray_Eray_getErrorInterrupts() : IfxEray_Eray.h
  • IfxEray_Eray_getMessageBufferInterruptStatus() : IfxEray_Eray.h
  • IfxEray_Eray_getNewDataInterruptStatus() : IfxEray_Eray.h
  • IfxEray_Eray_getPocState() : IfxEray_Eray.h
  • IfxEray_Eray_getStatusInterrupts() : IfxEray_Eray.h
  • IfxEray_Eray_getWakeupPatternReceivedChannel() : IfxEray_Eray.h
  • IfxEray_Eray_initModule() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_initModuleConfig() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_init() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_initCommunicationController() : IfxEray_Eray.c
  • IfxEray_Eray_Node_initConfig() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_initGTU() : IfxEray_Eray.c
  • IfxEray_Eray_Node_initMessageRAM() : IfxEray_Eray.c
  • IfxEray_Eray_readData() : IfxEray_Eray.h
  • IfxEray_Eray_readFrame() : IfxEray_Eray.h
  • IfxEray_Eray_receiveFifoFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_receiveFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_setMessageBufferInterruptDestination() : IfxEray_Eray.h
  • IfxEray_Eray_setNewDataInterruptDestination() : IfxEray_Eray.h
  • IfxEray_Eray_setPocAllSlots() : IfxEray_Eray.h
  • IfxEray_Eray_startCommunication() : IfxEray_Eray.h
  • IfxEray_Eray_transmitFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_wakeUpChannel() : IfxEray_Eray.h
  • IfxEray_Eray_wakeUpCluster() : IfxEray_Eray.h
  • IfxEray_Eray_writeData() : IfxEray_Eray.h
  • IfxEray_ExternalOffset : IfxEray.h
  • IfxEray_ExternalOffset_correctionAdded : IfxEray.h
  • IfxEray_ExternalOffset_correctionSubtracted : IfxEray.h
  • IfxEray_ExternalOffset_noCorrection : IfxEray.h
  • IfxEray_ExternalOffsetCorrection : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_0 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_1 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_2 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_3 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_4 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_5 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_6 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_7 : IfxEray.h
  • IfxEray_ExternalRate : IfxEray.h
  • IfxEray_ExternalRate_correctionAdded : IfxEray.h
  • IfxEray_ExternalRate_correctionSubtracted : IfxEray.h
  • IfxEray_ExternalRate_noCorrection : IfxEray.h
  • IfxEray_ExternalRateCorrection : IfxEray.h
  • IfxEray_ExternalRateCorrection_0 : IfxEray.h
  • IfxEray_ExternalRateCorrection_1 : IfxEray.h
  • IfxEray_ExternalRateCorrection_2 : IfxEray.h
  • IfxEray_ExternalRateCorrection_3 : IfxEray.h
  • IfxEray_ExternalRateCorrection_4 : IfxEray.h
  • IfxEray_ExternalRateCorrection_5 : IfxEray.h
  • IfxEray_ExternalRateCorrection_6 : IfxEray.h
  • IfxEray_ExternalRateCorrection_7 : IfxEray.h
  • IfxEray_getAddress() : IfxEray.c , IfxEray.h
  • IfxEray_getErrorInterrupts() : IfxEray.h
  • IfxEray_getFifoIndex() : IfxEray.h
  • IfxEray_getFifoStatus() : IfxEray.h
  • IfxEray_getIndex() : IfxEray.c , IfxEray.h
  • IfxEray_getInputBufferBusyHostStatus() : IfxEray.h
  • IfxEray_getInputBufferBusyShadowStatus() : IfxEray.h
  • IfxEray_getInputBufferBusySrcPtr() : IfxEray.h
  • IfxEray_getInterruptLine0SrcPtr() : IfxEray.h
  • IfxEray_getInterruptLine1SrcPtr() : IfxEray.h
  • IfxEray_getMessageBufferInterruptStatus() : IfxEray.h
  • IfxEray_getMessageBufferStatus0SrcPtr() : IfxEray.h
  • IfxEray_getMessageBufferStatus1SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterrupt0SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterrupt1SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterruptStatus() : IfxEray.h
  • IfxEray_getOutputBuffer() : IfxEray.h
  • IfxEray_getOutputBufferBusyShadowStatus() : IfxEray.h
  • IfxEray_getOutputBufferBusySrcPtr() : IfxEray.h
  • IfxEray_getPocState() : IfxEray.h
  • IfxEray_getStatusInterrupts() : IfxEray.h
  • IfxEray_getTimerInterrupt0SrcPtr() : IfxEray.h
  • IfxEray_getTimerInterrupt1SrcPtr() : IfxEray.h
  • IfxEray_getWakeupPatternReceivedChannel() : IfxEray.h
  • IfxEray_IdleDynamicSlots : IfxEray.h
  • IfxEray_IdleDynamicSlots_0 : IfxEray.h
  • IfxEray_IdleDynamicSlots_1 : IfxEray.h
  • IfxEray_IdleDynamicSlots_2 : IfxEray.h
  • IfxEray_Index : IfxEray_cfg.h
  • IfxEray_Index_0 : IfxEray_cfg.h
  • IfxEray_Index_none : IfxEray_cfg.h
  • IfxEray_initRxPin() : IfxEray.h
  • IfxEray_initRxPinWithPadLevel() : IfxEray.h
  • IfxEray_initTxEnPin() : IfxEray.h
  • IfxEray_initTxPin() : IfxEray.h
  • IfxEray_isModuleSuspended() : IfxEray.h
  • IfxEray_ListenTimeOutNoise : IfxEray.h
  • IfxEray_ListenTimeOutNoise_10 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_11 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_12 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_13 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_14 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_15 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_16 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_2 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_3 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_4 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_5 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_6 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_7 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_8 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_9 : IfxEray.h
  • IfxEray_MaxSynchFrames : IfxEray.h
  • IfxEray_MaxSynchFrames_10 : IfxEray.h
  • IfxEray_MaxSynchFrames_11 : IfxEray.h
  • IfxEray_MaxSynchFrames_12 : IfxEray.h
  • IfxEray_MaxSynchFrames_13 : IfxEray.h
  • IfxEray_MaxSynchFrames_14 : IfxEray.h
  • IfxEray_MaxSynchFrames_15 : IfxEray.h
  • IfxEray_MaxSynchFrames_2 : IfxEray.h
  • IfxEray_MaxSynchFrames_3 : IfxEray.h
  • IfxEray_MaxSynchFrames_4 : IfxEray.h
  • IfxEray_MaxSynchFrames_5 : IfxEray.h
  • IfxEray_MaxSynchFrames_6 : IfxEray.h
  • IfxEray_MaxSynchFrames_7 : IfxEray.h
  • IfxEray_MaxSynchFrames_8 : IfxEray.h
  • IfxEray_MaxSynchFrames_9 : IfxEray.h
  • IfxEray_NodeId : IfxEray_cfg.h
  • IfxEray_NodeId_a : IfxEray_cfg.h
  • IfxEray_NodeId_b : IfxEray_cfg.h
  • IfxEray_NodeId_none : IfxEray_cfg.h
  • IFXERAY_NUM_CHANNELS : IfxEray_cfg.h
  • IFXERAY_NUM_MODULES : IfxEray_cfg.h
  • IFXERAY_NUM_SLOTS : IfxEray_cfg.h
  • IFXERAY_PINMAP_NUM_MODULES : IfxEray_PinMap.h
  • IFXERAY_PINMAP_NUM_NODES : IfxEray_PinMap.h
  • IFXERAY_PINMAP_RXD_IN_NUM_ITEMS : IfxEray_PinMap.h
  • IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS : IfxEray_PinMap.h
  • IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEray_PinMap.h
  • IfxEray_PocCommand : IfxEray.h
  • IfxEray_PocCommand_allSlots : IfxEray.h
  • IfxEray_PocCommand_clearRam : IfxEray.h
  • IfxEray_PocCommand_coldStart : IfxEray.h
  • IfxEray_PocCommand_config : IfxEray.h
  • IfxEray_PocCommand_freeze : IfxEray.h
  • IfxEray_PocCommand_halt : IfxEray.h
  • IfxEray_PocCommand_monitor : IfxEray.h
  • IfxEray_PocCommand_notAccepted : IfxEray.h
  • IfxEray_PocCommand_ready : IfxEray.h
  • IfxEray_PocCommand_reset : IfxEray.h
  • IfxEray_PocCommand_run : IfxEray.h
  • IfxEray_PocCommand_sendMts : IfxEray.h
  • IfxEray_PocCommand_wakeup : IfxEray.h
  • IfxEray_PocState : IfxEray.h
  • IfxEray_PocState_coldStartListen : IfxEray.h
  • IfxEray_PocState_collisionResolution : IfxEray.h
  • IfxEray_PocState_config : IfxEray.h
  • IfxEray_PocState_consistencyCheck : IfxEray.h
  • IfxEray_PocState_defaultConfig : IfxEray.h
  • IfxEray_PocState_gap : IfxEray.h
  • IfxEray_PocState_halt : IfxEray.h
  • IfxEray_PocState_initializeSchedule : IfxEray.h
  • IfxEray_PocState_integrationCheck : IfxEray.h
  • IfxEray_PocState_integrationConsistencyCheck : IfxEray.h
  • IfxEray_PocState_integrationListen : IfxEray.h
  • IfxEray_PocState_join : IfxEray.h
  • IfxEray_PocState_monitor : IfxEray.h
  • IfxEray_PocState_normalActive : IfxEray.h
  • IfxEray_PocState_normalPassive : IfxEray.h
  • IfxEray_PocState_ready : IfxEray.h
  • IfxEray_PocState_startup : IfxEray.h
  • IfxEray_PocState_startupSucced : IfxEray.h
  • IfxEray_PocState_staruAborted : IfxEray.h
  • IfxEray_PocState_wakeupDetect : IfxEray.h
  • IfxEray_PocState_wakeupListen : IfxEray.h
  • IfxEray_PocState_wakeupSend : IfxEray.h
  • IfxEray_PocState_wakeupStandby : IfxEray.h
  • IfxEray_readData() : IfxEray.c , IfxEray.h
  • IfxEray_readFrame() : IfxEray.c , IfxEray.h
  • IfxEray_ReceiveChannel : IfxEray.h
  • IfxEray_ReceiveChannel_a : IfxEray.h
  • IfxEray_ReceiveChannel_b : IfxEray.h
  • IfxEray_ReceiveChannel_both : IfxEray.h
  • IfxEray_ReceiveChannel_none : IfxEray.h
  • IfxEray_receiveData() : IfxEray.h
  • IfxEray_receiveHeader() : IfxEray.h
  • IfxEray_resetModule() : IfxEray.c , IfxEray.h
  • IfxEray_Rxd_In_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_sendData() : IfxEray.h
  • IfxEray_sendHeader() : IfxEray.h
  • IfxEray_setActiveCyclePairs() : IfxEray.h
  • IfxEray_setAutoDelayBuffers() : IfxEray.h
  • IfxEray_setBaudrate() : IfxEray.h
  • IfxEray_setBufferReconfigSecure() : IfxEray.h
  • IfxEray_setChannelAInitialOffsets() : IfxEray.h
  • IfxEray_setChannelBInitialOffsets() : IfxEray.h
  • IfxEray_setChannelsReceiveDelay() : IfxEray.h
  • IfxEray_setClockCorrectionCycles() : IfxEray.h
  • IfxEray_setClockSynchErrorHalt() : IfxEray.h
  • IfxEray_setClusterDriftValues() : IfxEray.h
  • IfxEray_setClusterStartupDeviation() : IfxEray.h
  • IfxEray_setCollisionAvoidanceDuration() : IfxEray.h
  • IfxEray_setCycleDurationMacroticks() : IfxEray.h
  • IfxEray_setCycleDurationMicroticks() : IfxEray.h
  • IfxEray_setDecodingCorrectionValue() : IfxEray.h
  • IfxEray_setDynamicSlots() : IfxEray.h
  • IfxEray_setExternalCorrectionControl() : IfxEray.h
  • IfxEray_setExternalCorrectionValues() : IfxEray.h
  • IfxEray_setFifoBufferStartIndex() : IfxEray.h
  • IfxEray_setFifoFilterConfigurations() : IfxEray.h
  • IfxEray_setFifoMessageBufferConfigurations() : IfxEray.h
  • IfxEray_setFirstDynamicBuffer() : IfxEray.h
  • IfxEray_setListenTimeOuts() : IfxEray.h
  • IfxEray_setMaxColdStartAttempts() : IfxEray.h
  • IfxEray_setMaxCorrectionValues() : IfxEray.h
  • IfxEray_setMaxSynchFrames() : IfxEray.h
  • IfxEray_setMessageBufferCount() : IfxEray.h
  • IfxEray_setMessageBufferInterruptDestination() : IfxEray.c , IfxEray.h
  • IfxEray_setMessageHandlerConfigurations() : IfxEray.h
  • IfxEray_setNetworkStartIdleTime() : IfxEray.h
  • IfxEray_setNetworkVectorLength() : IfxEray.h
  • IfxEray_setNewDataInterruptDestination() : IfxEray.c , IfxEray.h
  • IfxEray_setNodeChannels() : IfxEray.h
  • IfxEray_setOffsetCorrection() : IfxEray.h
  • IfxEray_setPocReady() : IfxEray.c , IfxEray.h
  • IfxEray_setReceiveRequest() : IfxEray.h
  • IfxEray_setReceiveWakeupTimes() : IfxEray.h
  • IfxEray_setRxBufferNumber() : IfxEray.h
  • IfxEray_setSleepMode() : IfxEray.h
  • IfxEray_setSlot() : IfxEray.c , IfxEray.h
  • IfxEray_setSlotActionPoints() : IfxEray.h
  • IfxEray_setStaticSlots() : IfxEray.h
  • IfxEray_setStrobePosition() : IfxEray.h
  • IfxEray_setSuspendMode() : IfxEray.h
  • IfxEray_setSymbolChannels() : IfxEray.h
  • IfxEray_setTransmissionSlotMode() : IfxEray.h
  • IfxEray_setTransmissionStartTime() : IfxEray.h
  • IfxEray_setTransmitRequest() : IfxEray.h
  • IfxEray_setTransmittedFrames() : IfxEray.h
  • IfxEray_setTransmitWakeupTimes() : IfxEray.h
  • IfxEray_setTxBufferNumber() : IfxEray.h
  • IfxEray_setViewData() : IfxEray.h
  • IfxEray_setWakeupPatternChannel() : IfxEray.h
  • IfxEray_SleepMode : IfxEray.h
  • IfxEray_SleepMode_disable : IfxEray.h
  • IfxEray_SleepMode_enable : IfxEray.h
  • IfxEray_StrobePosition : IfxEray.h
  • IfxEray_StrobePosition_4 : IfxEray.h
  • IfxEray_StrobePosition_5 : IfxEray.h
  • IfxEray_StrobePosition_6 : IfxEray.h
  • IfxEray_SuspendMode : IfxEray.h
  • IfxEray_SuspendMode_hard : IfxEray.h
  • IfxEray_SuspendMode_none : IfxEray.h
  • IfxEray_SuspendMode_soft : IfxEray.h
  • IfxEray_TransmissionMode : IfxEray.h
  • IfxEray_TransmissionMode_continuous : IfxEray.h
  • IfxEray_TransmissionMode_singleShot : IfxEray.h
  • IfxEray_TransmissionSlotMode : IfxEray.h
  • IfxEray_TransmissionSlotMode_all : IfxEray.h
  • IfxEray_TransmissionSlotMode_single : IfxEray.h
  • IfxEray_Txd_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_Txen_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_waitForPocState() : IfxEray.h
  • IfxEray_WakeupChannel : IfxEray.h
  • IfxEray_WakeupChannel_a : IfxEray.h
  • IfxEray_WakeupChannel_b : IfxEray.h
  • IfxEray_writeData() : IfxEray.c , IfxEray.h
  • IfxEth_applySoftwareReset() : IfxEth.h
  • IfxEth_ChecksumMode : IfxEth.h
  • IfxEth_ChecksumMode_bypass : IfxEth.h
  • IfxEth_ChecksumMode_ipv4 : IfxEth.h
  • IfxEth_ChecksumMode_tcpUdpIcmpFull : IfxEth.h
  • IfxEth_ChecksumMode_tcpUdpIcmpSegment : IfxEth.h
  • IfxEth_clearEriInterrupt() : IfxEth.h
  • IfxEth_clearMacConfiguration() : IfxEth.h
  • IfxEth_clearRxInterrupt() : IfxEth.h
  • IfxEth_clearTuInterrupt() : IfxEth.h
  • IfxEth_clearTxInterrupt() : IfxEth.h
  • IfxEth_Crsdv_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_CRSDVA_P11_11_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IFXETH_DESCR_SIZE : IfxEth.h
  • IfxEth_DescriptorMode : IfxEth.h
  • IfxEth_DescriptorMode_chain : IfxEth.h
  • IfxEth_DescriptorMode_ring : IfxEth.h
  • IfxEth_disableModule() : IfxEth.c , IfxEth.h
  • IfxEth_disableTimeStampCoarseUpdate() : IfxEth.h
  • IfxEth_disableTimeStampForIpv4Frames() : IfxEth.h
  • IfxEth_enableMmcCounter() : IfxEth.h
  • IfxEth_enableModule() : IfxEth.c , IfxEth.h
  • IfxEth_enableTimeStamp() : IfxEth.h
  • IfxEth_enableTimeStampCoarseUpdate() : IfxEth.h
  • IfxEth_enableTimeStampForAllFrames() : IfxEth.h
  • IfxEth_enableTimeStampForEthFrames() : IfxEth.h
  • IfxEth_enableTimeStampForIpv4Frames() : IfxEth.h
  • IfxEth_enableTimeStampForVer2Format() : IfxEth.h
  • IfxEth_freeReceiveBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getActualRxDescriptor() : IfxEth.h
  • IfxEth_getActualRxIndex() : IfxEth.h
  • IfxEth_getActualTxDescriptor() : IfxEth.h
  • IfxEth_getBaseRxDescriptor() : IfxEth.h
  • IfxEth_getBaseTxDescriptor() : IfxEth.h
  • IfxEth_getLoopbackMode() : IfxEth.h
  • IfxEth_getMacAddressPointer() : IfxEth.h
  • IfxEth_getReceiveBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getReceiveProcessState() : IfxEth.h
  • IfxEth_getRxDataLength() : IfxEth.h
  • IfxEth_getSrcPointer() : IfxEth.h
  • IfxEth_getTimeStampInitialiseStatus() : IfxEth.h
  • IfxEth_getTimeStampUpdateStatus() : IfxEth.h
  • IfxEth_getTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getTransmitProcessState() : IfxEth.h
  • IfxEth_init() : IfxEth.c , IfxEth.h
  • IfxEth_initConfig() : IfxEth.c , IfxEth.h
  • IfxEth_initialiseTimeStamp() : IfxEth.h
  • IfxEth_initReceiveDescriptors() : IfxEth.c , IfxEth.h
  • IfxEth_initReceiveDescriptorsRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_initTransmitDescriptors() : IfxEth.c , IfxEth.h
  • IfxEth_initTransmitDescriptorsRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_isEriInterrupt() : IfxEth.h
  • IfxEth_isLinkActive() : IfxEth.h
  • IfxEth_isNisInterrupt() : IfxEth.h
  • IfxEth_isRxChecksumError() : IfxEth.h
  • IfxEth_isRxDataAvailable() : IfxEth.h
  • IfxEth_isRxInterrupt() : IfxEth.h
  • IfxEth_isSoftwareResetDone() : IfxEth.h
  • IfxEth_isTuInterrupt() : IfxEth.h
  • IfxEth_isTxInterrupt() : IfxEth.h
  • IFXETH_MAX_RX_BUFFERS : IfxEth.h
  • IFXETH_MAX_TIMEOUT_VALUE : IfxEth_cfg.h
  • IFXETH_MAX_TX_BUFFERS : IfxEth.h
  • IfxEth_Mdc_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P02_8_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P21_0_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P21_2_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Mdio_InOut_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIO_P21_1_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIOA_P00_0_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIOD_P21_3_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IFXETH_NUM_MODULES : IfxEth_cfg.h
  • IfxEth_Phy_Pef7071_init() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_iPhyInitDone : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_link() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IFXETH_PHY_PEF7071_MDIO_AN_ADV : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_EXP : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_LPA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_NPRX : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_NPTX : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_CTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_EECTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_ERRCNT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_FWV : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_GCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_GSTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_IMASK : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_ISTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_LED : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MIICTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MIISTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDDATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYCTL1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYCTL2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYID1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYID2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYPERF : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES11 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES12 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES1F : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_STAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_TPGCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_TPGDATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_XSTAT : IfxEth_Phy_Pef7071.c
  • IfxEth_Phy_Pef7071_read_mdio_reg() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_read_mmd_indirect() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IFXETH_PHY_PEF7071_WAIT_GMII_READY : IfxEth_Phy_Pef7071.c
  • IfxEth_Phy_Pef7071_write_mdio_reg() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_write_mmd_indirect() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_PhyInterfaceMode : IfxEth.h
  • IfxEth_PhyInterfaceMode_mii : IfxEth.h
  • IfxEth_PhyInterfaceMode_rmii : IfxEth.h
  • IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_MDC_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_NUM_MODULES : IfxEth_PinMap.h
  • IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXD_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXER_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXD_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IfxEth_readAllFlags() : IfxEth.h
  • IfxEth_readMacAddress() : IfxEth.c , IfxEth.h
  • IfxEth_ReceiveProcessState : IfxEth.h
  • IfxEth_ReceiveProcessState_closing : IfxEth.h
  • IfxEth_ReceiveProcessState_fetching : IfxEth.h
  • IfxEth_ReceiveProcessState_none : IfxEth.h
  • IfxEth_ReceiveProcessState_reset : IfxEth.h
  • IfxEth_ReceiveProcessState_suspended : IfxEth.h
  • IfxEth_ReceiveProcessState_timestampWrite : IfxEth.h
  • IfxEth_ReceiveProcessState_transfering : IfxEth.h
  • IfxEth_ReceiveProcessState_waiting : IfxEth.h
  • IfxEth_Refclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_REFCLK_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_resetModule() : IfxEth.c , IfxEth.h
  • IfxEth_RingModeBufferUsed : IfxEth.h
  • IfxEth_RingModeBufferUsed_bothBuffers : IfxEth.h
  • IfxEth_RingModeBufferUsed_buffer1 : IfxEth.h
  • IfxEth_RingModeBufferUsed_buffer2 : IfxEth.h
  • IFXETH_RTX_BUFFER_SIZE : IfxEth.h
  • IfxEth_rxBuffer : IfxEth.c , IfxEth.h
  • IfxEth_Rxclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXCLKA_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXD0_P11_10_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXD1_P11_9_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Rxd_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_rxDescr : IfxEth.c , IfxEth.h
  • IfxEth_RxDescr_getNext() : IfxEth.h
  • IfxEth_RxDescr_release() : IfxEth.h
  • IfxEth_RxDescr_setBuffer() : IfxEth.h
  • IfxEth_Rxer_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXERB_P21_7_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_sendTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_sendTransmitBuffersRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_setAddToTimeUpdate() : IfxEth.h
  • IfxEth_setAndSendTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_setBinaryRolloverControl() : IfxEth.h
  • IfxEth_setLoopbackMode() : IfxEth.h
  • IfxEth_setMacAddress() : IfxEth.c , IfxEth.h
  • IfxEth_setNanoSecondsUpdateValue() : IfxEth.h
  • IfxEth_setPhyInterfaceMode() : IfxEth.h
  • IfxEth_setReceiveBuffer1RingMode() : IfxEth.h
  • IfxEth_setReceiveBuffer2RingMode() : IfxEth.h
  • IfxEth_setReceiveDescriptorAddress() : IfxEth.h
  • IfxEth_setSecondsUpdateValue() : IfxEth.h
  • IfxEth_setSubSecondIncrementValue() : IfxEth.h
  • IfxEth_setSubtractToTimeUpdate() : IfxEth.h
  • IfxEth_setTransmitBuffer1RingMode() : IfxEth.h
  • IfxEth_setTransmitBuffer2RingMode() : IfxEth.h
  • IfxEth_setTransmitDescriptorAddress() : IfxEth.h
  • IfxEth_setupChecksumEngine() : IfxEth.c , IfxEth.h
  • IfxEth_setupMiiInputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupMiiOutputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupRmiiInputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupRmiiOutputPins() : IfxEth.c , IfxEth.h
  • IfxEth_shuffleRxDescriptor() : IfxEth.c , IfxEth.h
  • IfxEth_shuffleTxDescriptor() : IfxEth.c , IfxEth.h
  • IfxEth_startReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_startTransmitter() : IfxEth.c , IfxEth.h
  • IfxEth_stopReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_stopTransmitter() : IfxEth.c , IfxEth.h
  • IfxEth_TransmitProcessState : IfxEth.h
  • IfxEth_TransmitProcessState_closing : IfxEth.h
  • IfxEth_TransmitProcessState_fetching : IfxEth.h
  • IfxEth_TransmitProcessState_none : IfxEth.h
  • IfxEth_TransmitProcessState_reading : IfxEth.h
  • IfxEth_TransmitProcessState_reset : IfxEth.h
  • IfxEth_TransmitProcessState_suspended : IfxEth.h
  • IfxEth_TransmitProcessState_timestampWrite : IfxEth.h
  • IfxEth_TransmitProcessState_waiting : IfxEth.h
  • IfxEth_txBuffer : IfxEth.c , IfxEth.h
  • IfxEth_Txclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXCLKB_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXD0_P11_3_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXD1_P11_2_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Txd_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_txDescr : IfxEth.c , IfxEth.h
  • IfxEth_TxDescr_getNext() : IfxEth.h
  • IfxEth_TxDescr_isAvailable() : IfxEth.h
  • IfxEth_TxDescr_release() : IfxEth.h
  • IfxEth_TxDescr_setBuffer() : IfxEth.h
  • IfxEth_TxDescr_setup() : IfxEth.h
  • IfxEth_Txen_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXEN_P11_6_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_updateTimeStamp() : IfxEth.h
  • IfxEth_waitTransmitBuffer() : IfxEth.h
  • IfxEth_wakeupReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_wakeupTransmitter() : IfxEth.c , IfxEth.h
  • IfxEth_writeHeader() : IfxEth.c , IfxEth.h
  • IfxFce_clearCrc16ErrorFlags() : IfxFce.h
  • IfxFce_clearCrc32ErrorFlags() : IfxFce.h
  • IfxFce_clearCrc8ErrorFlags() : IfxFce.h
  • IfxFce_Crc32Kernel : IfxFce.h
  • IfxFce_Crc32Kernel_0 : IfxFce.h
  • IfxFce_Crc32Kernel_1 : IfxFce.h
  • IfxFce_Crc_calculateCrc16() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_calculateCrc32() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_calculateCrc8() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_clearErrorFlags() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_deInitModule() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_getInterruptStatus() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initCrc() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initCrcConfig() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initModule() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initModuleConfig() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_CrcMode : IfxFce.h
  • IfxFce_CrcMode_16 : IfxFce.h
  • IfxFce_CrcMode_32 : IfxFce.h
  • IfxFce_CrcMode_8 : IfxFce.h
  • IfxFce_disableModule() : IfxFce.h
  • IfxFce_enableModule() : IfxFce.h
  • IfxFce_getCrc16InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getCrc32InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getCrc8InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getSrcPointer() : IfxFce.h
  • IFXFCE_NUM_KERNEL : IfxFce_cfg.h
  • IFXFCE_NUM_MODULES : IfxFce_cfg.h
  • IfxFce_reflectCrc32() : IfxFce.c , IfxFce.h
  • IfxFce_resetModule() : IfxFce.c , IfxFce.h
  • IFXFFT_DATA_SPACE : IfxFft_cfg.h
  • IfxFft_disableModule() : IfxFft.h
  • IfxFft_enableModule() : IfxFft.h
  • IfxFft_Fft_calcCounters() : IfxFft_Fft.c
  • IfxFft_Fft_calcCSR() : IfxFft_Fft.c
  • IfxFft_Fft_cloneAndLinkJobs() : IfxFft_Fft.c , IfxFft_Fft.h
  • IFXFFT_FFT_DATA_TRANSFER : IfxFft_Fft.c
  • IFXFFT_FFT_DMA_CHANNEL_BASE : IfxFft_cfg.h
  • IFXFFT_FFT_DMA_SUPPORT : IfxFft_cfg.h
  • IFXFFT_FFT_DMADISCARDCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMADISCARDCHANNELID_OPT : IfxFft_Fft.c
  • IFXFFT_FFT_DMAINPUTCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMAINPUTCHANNELID_OPT : IfxFft_Fft.c
  • IFXFFT_FFT_DMAOUTPUTCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT : IfxFft_Fft.c
  • IfxFft_Fft_dummy256 : IfxFft_Fft.c
  • IFXFFT_FFT_FLAG_DONE : IfxFft_Fft.h
  • IFXFFT_FFT_FLAG_INPUT : IfxFft_Fft.h
  • IFXFFT_FFT_HW_EXEC : IfxFft_Fft.h
  • IfxFft_Fft_initDma() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initJob() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initJobConfig() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initModule() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initModuleConfig() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initWindow() : IfxFft_Fft.c , IfxFft_Fft.h
  • IFXFFT_FFT_ISALIGNED : IfxFft_Fft.c
  • IfxFft_Fft_isrInput() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_isrIntra() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_isrOutput() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_Job : IfxFft_Fft.h
  • IfxFft_Fft_loadInput() : IfxFft_Fft.c
  • IfxFft_Fft_modifyDataPointers() : IfxFft_Fft.c , IfxFft_Fft.h
  • IFXFFT_FFT_MOVE_BTR4 : IfxFft_Fft.c
  • IFXFFT_FFT_MOVE_DIV : IfxFft_Fft.c
  • IFXFFT_FFT_MOVE_SIZE : IfxFft_Fft.c
  • IFXFFT_FFT_NUM_JOBS : IfxFft_cfg.h
  • IFXFFT_FFT_OPTIMIZED : IfxFft_cfg.h
  • IFXFFT_FFT_PIPELINED : IfxFft_cfg.h
  • IfxFft_Fft_startJob() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_triggerEngine() : IfxFft_Fft.h
  • IfxFft_Fft_unloadOutput() : IfxFft_Fft.c
  • IFXFFT_FFT_WINDOW_TRANSFER : IfxFft_Fft.c
  • IfxFft_getInputFormat() : IfxFft.h
  • IfxFft_getLength() : IfxFft.h
  • IfxFft_getLengthCode() : IfxFft.h
  • IfxFft_getLengthFromCode() : IfxFft.h
  • IfxFft_getOutputFormat() : IfxFft.h
  • IfxFft_getSrcPointerDone() : IfxFft.h
  • IfxFft_getSrcPointerRfs() : IfxFft.h
  • IfxFft_getTransformLength() : IfxFft.h
  • IfxFft_Input : IfxFft.h
  • IfxFft_Input_complexSInt16 : IfxFft.h
  • IfxFft_Input_complexSInt32 : IfxFft.h
  • IfxFft_Input_realSInt16 : IfxFft.h
  • IfxFft_Input_realSInt32 : IfxFft.h
  • IfxFft_isEngineBusy() : IfxFft.h
  • IfxFft_isModuleEnabled() : IfxFft.h
  • IfxFft_isModuleSuspended() : IfxFft.h
  • IfxFft_isReadyForStart() : IfxFft.h
  • IfxFft_Length : IfxFft.h
  • IfxFft_Length_1024 : IfxFft.h
  • IfxFft_Length_128 : IfxFft.h
  • IfxFft_Length_16 : IfxFft.h
  • IfxFft_Length_256 : IfxFft.h
  • IfxFft_Length_32 : IfxFft.h
  • IfxFft_Length_512 : IfxFft.h
  • IfxFft_Length_64 : IfxFft.h
  • IfxFft_Length_8 : IfxFft.h
  • IFXFFT_MAX_LENGTH : IfxFft_cfg.h
  • IFXFFT_MAX_WINDOW_LENGTH : IfxFft_cfg.h
  • IFXFFT_NUM_MODULES : IfxFft_cfg.h
  • IfxFft_Operation : IfxFft.h
  • IfxFft_Operation_fft : IfxFft.h
  • IfxFft_Operation_ifft : IfxFft.h
  • IfxFft_Output : IfxFft.h
  • IfxFft_Output_complexSInt16 : IfxFft.h
  • IfxFft_Output_complexSInt32 : IfxFft.h
  • IfxFft_setSuspendMode() : IfxFft.h
  • IfxFft_SuspendMode : IfxFft.h
  • IfxFft_SuspendMode_hard : IfxFft.h
  • IfxFft_SuspendMode_none : IfxFft.h
  • IfxFft_SuspendMode_soft : IfxFft.h
  • IFXFFT_WINDOW_SPACE : IfxFft_cfg.h
  • IfxFlash_clearCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_clearStatus() : IfxFlash.h
  • IfxFlash_clearUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IFXFLASH_CMD_BASE_ADDRESS : IfxFlash_cfg.h
  • IFXFLASH_CMD_BASE_OFFSET : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_BANKS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_BURST_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_END : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_PAGE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_SIZE : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_START : IfxFlash_cfg.h
  • IfxFlash_dFlashTableEepLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTableUcbLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_disableCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_disableUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_disableWriteProtection() : IfxFlash.c , IfxFlash.h
  • IfxFlash_enterPageMode() : IfxFlash.h
  • IfxFlash_eraseMultiplePhysicalSectors() : IfxFlash.h
  • IfxFlash_eraseMultipleSectors() : IfxFlash.h
  • IfxFlash_erasePhysicalSector() : IfxFlash.h
  • IfxFlash_eraseSector() : IfxFlash.h
  • IfxFlash_eraseVerifyMultipleSectors() : IfxFlash.h
  • IfxFlash_eraseVerifySector() : IfxFlash.h
  • IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS : IfxFlash_cfg.h
  • IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS : IfxFlash_cfg.h
  • IfxFlash_ErrorTracking : IfxFlash.h
  • IfxFlash_ErrorTracking_correctedDoubleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_correctedSingleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_none : IfxFlash.h
  • IfxFlash_ErrorTracking_uncorrectableMultiBitError : IfxFlash.h
  • IfxFlash_FlashType : IfxFlash_cfg.h
  • IfxFlash_FlashType_D0 : IfxFlash_cfg.h
  • IfxFlash_FlashType_D1 : IfxFlash_cfg.h
  • IfxFlash_FlashType_Fa : IfxFlash_cfg.h
  • IfxFlash_FlashType_P0 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P1 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P2 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P3 : IfxFlash_cfg.h
  • IfxFlash_getTrackedCorrectableErrors() : IfxFlash.c , IfxFlash.h
  • IfxFlash_getTrackedUncorrectableErrors() : IfxFlash.c , IfxFlash.h
  • IfxFlash_loadPage() : IfxFlash.h
  • IfxFlash_loadPage2X32() : IfxFlash.h
  • IFXFLASH_NUM_FLASH_MODULES : IfxFlash_cfg.h
  • IFXFLASH_NUM_MODULES : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_BANKS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_BURST_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_END : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_OFFSET : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_PAGE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_SIZE : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_START : IfxFlash_cfg.h
  • IfxFlash_pFlashTableLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_pFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_PortId : IfxFlash.h
  • IfxFlash_PortId_PortId_0 : IfxFlash.h
  • IfxFlash_PortId_PortId_1 : IfxFlash.h
  • IfxFlash_resetToRead() : IfxFlash.h
  • IfxFlash_resumeProtection() : IfxFlash.h
  • IfxFlash_selectCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_selectUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_suspendResumeMultipleSectors() : IfxFlash.h
  • IfxFlash_suspendResumeSector() : IfxFlash.h
  • IfxFlash_UcbType : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucb0 : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucb1 : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucbHsmc : IfxFlash_cfg.h
  • IfxFlash_waitUnbusy() : IfxFlash.h
  • IfxFlash_waitUnbusyAll() : IfxFlash.h
  • IfxFlash_writeBurst() : IfxFlash.h
  • IfxFlash_writePage() : IfxFlash.h
  • IfxFlash_writePageOnce() : IfxFlash.h
  • IFXGLOBAL_DERIVATIVE_NAME : IfxGlobal_cfg.h
  • IFXGLOBAL_DERIVATIVE_TC26xB : IfxGlobal_cfg.h
  • IfxGpt120_CAPINA_P13_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2EUDA_P00_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2EUDB_P33_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2INA_P00_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2INB_P33_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3EUDA_P02_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3EUDB_P10_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3INA_P02_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3INB_P10_4_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3OUT_P10_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3OUT_P21_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4EUDA_P00_9_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4EUDB_P33_5_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4INA_P02_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4INB_P10_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5EUDA_P21_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5EUDB_P10_1_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5INA_P21_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5INB_P10_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6EUDA_P20_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6EUDB_P10_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6INA_P20_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6INB_P10_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6OUT_P10_5_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6OUT_P21_7_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_Capin_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_CaptureInput : IfxGpt12.h
  • IfxGpt12_CaptureInput_A : IfxGpt12.h
  • IfxGpt12_CaptureInput_B : IfxGpt12.h
  • IfxGpt12_CaptureInput_C : IfxGpt12.h
  • IfxGpt12_CaptureInput_D : IfxGpt12.h
  • IfxGpt12_CaptureInputMode : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_none : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CaptureTrigger : IfxGpt12.h
  • IfxGpt12_CaptureTrigger_capin : IfxGpt12.h
  • IfxGpt12_CaptureTrigger_t3inOrT3EUD : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_disabled : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_fallingEdge : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_randomEdge : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_risingEdge : IfxGpt12.h
  • IfxGpt12_CounterInputMode : IfxGpt12.h
  • IfxGpt12_CounterInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_bothEdgesTxOTL : IfxGpt12.h
  • IfxGpt12_CounterInputMode_counterDisabled : IfxGpt12.h
  • IfxGpt12_CounterInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_fallingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_CounterInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_risingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_disableModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_enableModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_EudInput : IfxGpt12.h
  • IfxGpt12_EudInput_A : IfxGpt12.h
  • IfxGpt12_EudInput_B : IfxGpt12.h
  • IfxGpt12_EudInput_C : IfxGpt12.h
  • IfxGpt12_EudInput_D : IfxGpt12.h
  • IfxGpt12_getCaptureSrc() : IfxGpt12.h
  • IfxGpt12_getModuleFrequency() : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_16 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_32 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_4 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_8 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_16 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_2 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_4 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_8 : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx : IfxGpt12.h
  • IfxGpt12_IncrEnc_getAbsolutePosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getDirection() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getFault() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getPeriodPerRotation() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getRawPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getResolution() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getSensorType() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getSpeed() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getTurn() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_init() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_initConfig() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_onZeroIrq() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_reset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_resetFaults() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_setOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_setRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_stdIfPosInit() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_update() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_Update : IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_updateFromT2() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateFromT3() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateSpeedFromT2() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateSpeedFromT3() : IfxGpt12_IncrEnc.c
  • IfxGpt12_initCapInPin() : IfxGpt12.h
  • IfxGpt12_initCapInPinWithPadLevel() : IfxGpt12.h
  • IfxGpt12_initTxEudInPin() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxEudInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxInPin() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxOutPin() : IfxGpt12.h
  • IfxGpt12_Input : IfxGpt12.h
  • IfxGpt12_Input_A : IfxGpt12.h
  • IfxGpt12_Input_B : IfxGpt12.h
  • IfxGpt12_Input_C : IfxGpt12.h
  • IfxGpt12_Input_D : IfxGpt12.h
  • IfxGpt12_isModuleSuspended() : IfxGpt12.h
  • IfxGpt12_Mode : IfxGpt12.h
  • IfxGpt12_Mode_capture : IfxGpt12.h
  • IfxGpt12_Mode_counter : IfxGpt12.h
  • IfxGpt12_Mode_highGatedTimer : IfxGpt12.h
  • IfxGpt12_Mode_incrementalInterfaceEdgeDetection : IfxGpt12.h
  • IfxGpt12_Mode_incrementalInterfaceRotationDetection : IfxGpt12.h
  • IfxGpt12_Mode_lowGatedTimer : IfxGpt12.h
  • IfxGpt12_Mode_reload : IfxGpt12.h
  • IfxGpt12_Mode_timer : IfxGpt12.h
  • IFXGPT12_NUM_MODULES : IfxGpt12_cfg.h
  • IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_NUM_MODULES : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_NUM_TIMERS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS : IfxGpt12_PinMap.h
  • IfxGpt12_ReloadInputMode : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_bothEdgesTxOTL : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_counterDisabled : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_fallingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_risingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_resetModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_setCaptureInput() : IfxGpt12.h
  • IfxGpt12_setCaptureReload() : IfxGpt12.h
  • IfxGpt12_setGpt1BlockPrescaler() : IfxGpt12.h
  • IfxGpt12_setGpt2BlockPrescaler() : IfxGpt12.h
  • IfxGpt12_setSleepMode() : IfxGpt12.h
  • IfxGpt12_setSuspendMode() : IfxGpt12.h
  • IfxGpt12_SleepMode : IfxGpt12.h
  • IfxGpt12_SleepMode_disable : IfxGpt12.h
  • IfxGpt12_SleepMode_enable : IfxGpt12.h
  • IfxGpt12_SuspendMode : IfxGpt12.h
  • IfxGpt12_SuspendMode_hard : IfxGpt12.h
  • IfxGpt12_SuspendMode_none : IfxGpt12.h
  • IfxGpt12_SuspendMode_soft : IfxGpt12.h
  • IfxGpt12_T2_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T2_getMode() : IfxGpt12.h
  • IfxGpt12_T2_getSrc() : IfxGpt12.h
  • IfxGpt12_T2_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T2_run() : IfxGpt12.h
  • IfxGpt12_T2_setCaptureInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T2_setEudInput() : IfxGpt12.h
  • IfxGpt12_T2_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setInput() : IfxGpt12.h
  • IfxGpt12_T2_setInterruptEnable() : IfxGpt12.h
  • IfxGpt12_T2_setMode() : IfxGpt12.h
  • IfxGpt12_T2_setReloadInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T2_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T2_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T2_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T3_enableOutput() : IfxGpt12.h
  • IfxGpt12_T3_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T3_getMode() : IfxGpt12.h
  • IfxGpt12_T3_getSrc() : IfxGpt12.h
  • IfxGpt12_T3_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T3_run() : IfxGpt12.h
  • IfxGpt12_T3_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T3_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T3_setEudInput() : IfxGpt12.h
  • IfxGpt12_T3_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T3_setInput() : IfxGpt12.h
  • IfxGpt12_T3_setMode() : IfxGpt12.h
  • IfxGpt12_T3_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T3_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T3_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T4_enableClearTimerT2() : IfxGpt12.h
  • IfxGpt12_T4_enableClearTimerT3() : IfxGpt12.h
  • IfxGpt12_T4_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T4_getMode() : IfxGpt12.h
  • IfxGpt12_T4_getSrc() : IfxGpt12.h
  • IfxGpt12_T4_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T4_run() : IfxGpt12.h
  • IfxGpt12_T4_setCaptureInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T4_setEudInput() : IfxGpt12.h
  • IfxGpt12_T4_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setInput() : IfxGpt12.h
  • IfxGpt12_T4_setInterruptEnable() : IfxGpt12.h
  • IfxGpt12_T4_setMode() : IfxGpt12.h
  • IfxGpt12_T4_setReloadInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T4_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T4_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T4_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T5_enableClearTimer() : IfxGpt12.h
  • IfxGpt12_T5_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T5_getMode() : IfxGpt12.h
  • IfxGpt12_T5_getSrc() : IfxGpt12.h
  • IfxGpt12_T5_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T5_run() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTrigger() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTriggerEnable() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTriggerMode() : IfxGpt12.h
  • IfxGpt12_T5_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T5_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T5_setEudInput() : IfxGpt12.h
  • IfxGpt12_T5_setInput() : IfxGpt12.h
  • IfxGpt12_T5_setMode() : IfxGpt12.h
  • IfxGpt12_T5_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T5_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T5_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T5_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T6_enableClearTimer() : IfxGpt12.h
  • IfxGpt12_T6_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T6_getMode() : IfxGpt12.h
  • IfxGpt12_T6_getSrc() : IfxGpt12.h
  • IfxGpt12_T6_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T6_run() : IfxGpt12.h
  • IfxGpt12_T6_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T6_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T6_setEudInput() : IfxGpt12.h
  • IfxGpt12_T6_setInput() : IfxGpt12.h
  • IfxGpt12_T6_setMode() : IfxGpt12.h
  • IfxGpt12_T6_setReloadMode() : IfxGpt12.h
  • IfxGpt12_T6_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T6_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T6_setTimerValue() : IfxGpt12.h
  • IfxGpt12_TimerDirection : IfxGpt12.h
  • IfxGpt12_TimerDirection_down : IfxGpt12.h
  • IfxGpt12_TimerDirection_up : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource_external : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource_internal : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_1 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_128 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_16 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_2 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_32 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_4 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_64 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_8 : IfxGpt12.h
  • IfxGpt12_TimerReloadMode : IfxGpt12.h
  • IfxGpt12_TimerReloadMode_disable : IfxGpt12.h
  • IfxGpt12_TimerReloadMode_enable : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl_off : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl_on : IfxGpt12.h
  • IfxGpt12_TimerRun : IfxGpt12.h
  • IfxGpt12_TimerRun_start : IfxGpt12.h
  • IfxGpt12_TimerRun_stop : IfxGpt12.h
  • IfxGpt12_TxEud_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxIn_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxOut_Out_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGtm_Atom : IfxGtm_cfg.h
  • IfxGtm_ATOM0_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Atom_0 : IfxGtm_cfg.h
  • IfxGtm_Atom_1 : IfxGtm_cfg.h
  • IfxGtm_Atom_2 : IfxGtm_cfg.h
  • IfxGtm_Atom_3 : IfxGtm_cfg.h
  • IfxGtm_Atom_Agc_buildFeature() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_buildFeatureForChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_resetChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelsForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelsUpdate() : IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_trigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_AruInput : IfxGtm_Atom.h
  • IfxGtm_Atom_AruInput_disabled : IfxGtm_Atom.h
  • IfxGtm_Atom_AruInput_enabled : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_clearOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_clearZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_configurePwmMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getChannelPointer() : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getClockFrequency() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getOutputLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getSrcPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getTimerPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_isOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_isZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_OutputTrigger : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_OutputTrigger_forward : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_OutputTrigger_generate : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_raiseInterruptOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_raiseInterruptZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent_onCm0 : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent_onTrigger : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruInput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruReadAddress0() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruReadAddress1() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompare() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareOneShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareShadow() : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareZeroShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setOneShotMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setResetSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSignalLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSomcControl() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSomcSignalLevelControl() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setTriggerOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Mode : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputCompare : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputImmediate : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputPwm : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputSerial : IfxGtm_Atom.h
  • IFXGTM_ATOM_NUM_AGC_CHANNELS : IfxGtm_Atom.c
  • IfxGtm_Atom_Pwm_init() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_initConfig() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_start() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_stop() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_PwmHl : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_getDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_getMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_getMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_init() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_initConfig() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_invertActiveState() : IfxGtm_Atom_PwmHl.c
  • IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_modes : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_setDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setOnTime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setOnTimeAndShift() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setupChannels() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_stdIfPwmHlInit() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_Update : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_updateAndShiftOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateCenterAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateEdgeAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_UpdatePulse : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_updatePulse() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updatePulseOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_UpdateShift : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_updateShiftCenterAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_SomcControl : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_cancelCompare : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0Ts0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_compareBoth : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_compareBoth1 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_noChange : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_sl0out0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_sl0out1 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_toggle : IfxGtm_Atom.h
  • IfxGtm_Atom_Timer_acknowledgeTimerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_acknowledgeTriggerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_addToChannelMask() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_applyUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_disableUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getOffset() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getResolution() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getTriggerPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_init() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_initConfig() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_run() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setSingleMode() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_stdIfTimerInit() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_stop() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_updateInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_ToutMapP : IfxGtm_PinMap.h
  • IfxGtm_ChXSel : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_a : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_b : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_c : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_d : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_e : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_f : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_g : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_h : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_i : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_j : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_k : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_l : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_m : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_n : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_o : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_p : IfxGtm_PinMap.h
  • IfxGtm_CLK0_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_CLK1_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_CLK2_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Cmu_Clk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_3 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_4 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_5 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_6 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_7 : IfxGtm_Cmu.h
  • IFXGTM_CMU_CLKDIS_ALL : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK3 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK4 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK5 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK6 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK7 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_FXCLK : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ALL : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK3 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK4 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK5 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK6 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK7 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_FXCLK : IfxGtm_cfg.h
  • IfxGtm_Cmu_Eclk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_enableClocks() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_3 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_4 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_getClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getFxClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getModuleFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_isClkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_isEclkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_isFxClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_selectClkInput() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_setClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_setEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_setGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_6 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_7 : IfxGtm_Cmu.h
  • IfxGtm_disable() : IfxGtm.c , IfxGtm.h
  • IfxGtm_Dpll_getSubIncFrequency() : IfxGtm_Dpll.c , IfxGtm_Dpll.h
  • IfxGtm_Dpll_SubInc : IfxGtm_cfg.h
  • IfxGtm_Dpll_SubInc_1 : IfxGtm_cfg.h
  • IfxGtm_Dpll_SubInc_2 : IfxGtm_cfg.h
  • IfxGtm_enable() : IfxGtm.c , IfxGtm.h
  • IfxGtm_FeatureControl : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_disable : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_disabled : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_enable : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_enabled : IfxGtm_cfg.h
  • IfxGtm_getSysClkFrequency() : IfxGtm.c , IfxGtm.h
  • IfxGtm_IrqMode : IfxGtm.h
  • IfxGtm_IrqMode_level : IfxGtm.h
  • IfxGtm_IrqMode_pulse : IfxGtm.h
  • IfxGtm_IrqMode_pulseNotify : IfxGtm.h
  • IfxGtm_IrqMode_singlePulse : IfxGtm.h
  • IfxGtm_isEnabled() : IfxGtm.h
  • IfxGtm_isModuleSuspended() : IfxGtm.h
  • IFXGTM_NUM_ATOM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_ATOM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_MODULES : IfxGtm_cfg.h
  • IFXGTM_NUM_TIM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_TOM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_TOM_OBJECTS : IfxGtm_cfg.h
  • IfxGtm_PinMap_setAtomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_PinMap_setTimTin() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_PinMap_setTomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_setSuspendMode() : IfxGtm.h
  • IfxGtm_SuspendMode : IfxGtm.h
  • IfxGtm_SuspendMode_hard : IfxGtm.h
  • IfxGtm_SuspendMode_none : IfxGtm.h
  • IfxGtm_SuspendMode_soft : IfxGtm.h
  • IfxGtm_Tbu_enableChannel() : IfxGtm_Tbu.h
  • IfxGtm_Tbu_getClockFrequency() : IfxGtm_Tbu.c , IfxGtm_Tbu.h
  • IfxGtm_Tbu_isChannelEnabled() : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_0 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_1 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_2 : IfxGtm_Tbu.h
  • IfxGtm_Tim : IfxGtm_cfg.h
  • IfxGtm_TIM0_0_TIN0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN109_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN18_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN26_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN32_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN34_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN48_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN53_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN77_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN85_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN87_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN8_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN9_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN103_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN10_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN11_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN19_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN27_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN31_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN35_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN47_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN54_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN78_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN86_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN104_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN107_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN20_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN28_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN33_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN36_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN46_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN55_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN79_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN105_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN108_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN21_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN29_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN38_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN49_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN51_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN56_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN60_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN80_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN102_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN22_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN30_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN39_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN50_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN52_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN57_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN61_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN81_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN110_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN23_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN40_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN41_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN58_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN82_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN106_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN24_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN42_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN43_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN59_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN62_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN83_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN25_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN44_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN45_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN63_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN64_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN84_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN109_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN18_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN26_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN32_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN48_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN53_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN68_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN76_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN77_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN85_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN87_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN94_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN103_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN19_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN27_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN31_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN47_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN54_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN69_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN78_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN86_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN95_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN104_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN107_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN12_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN20_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN28_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN33_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN46_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN55_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN70_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN79_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN96_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN105_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN108_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN13_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN21_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN29_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN38_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN49_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN56_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN71_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN80_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN97_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN102_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN14_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN22_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN30_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN39_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN50_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN57_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN72_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN81_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN98_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN110_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN15_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN40_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN41_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN58_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN65_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN73_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN82_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN91_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN99_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN100_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN106_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN16_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN24_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN42_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN43_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN59_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN66_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN6_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN74_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN83_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN92_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN101_P11_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN17_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN25_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN44_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN45_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN64_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN67_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN75_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN84_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN93_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN34_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN68_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN76_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN8_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN94_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN9_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN10_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN11_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN35_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN69_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN95_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN12_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN36_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN70_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN88_P14_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN96_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN13_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN60_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN71_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN89_P14_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN97_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN14_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN51_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN61_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN72_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN90_P14_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN98_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN15_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN52_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN65_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN73_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN91_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN99_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN100_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN16_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN62_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN66_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN74_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN92_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN101_P11_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN17_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN63_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN67_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN75_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN93_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Tim_0 : IfxGtm_cfg.h
  • IfxGtm_Tim_1 : IfxGtm_cfg.h
  • IfxGtm_Tim_2 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_clearCntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearDataLostEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearEcntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearGlitchEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearNewValueEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getCaptureClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getCaptureClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getFilterClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getFilterClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getSrcPointer() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getTimeoutClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getTimeoutClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isCntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isDataLostEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isEcntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isGlitchEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isNewValueEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_resetChannel() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setChannelNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setFilterNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setNotificationMode() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setTimeoutNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_CntsSel : IfxGtm_Tim.h
  • IfxGtm_Tim_CntsSel_cntReg : IfxGtm_Tim.h
  • IfxGtm_Tim_CntsSel_tbuTs0 : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter_hold : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode_immediateEdgePropagation : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode_individualDeglitchTime : IfxGtm_Tim.h
  • IfxGtm_Tim_getChannel() : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_cnts : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs0 : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs1 : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs2 : IfxGtm_Tim.h
  • IfxGtm_Tim_In_clearNewData() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_none : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getDutyPercent() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPeriodSecond() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPeriodTicks() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPulseLengthTick() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_init() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_initConfig() : IfxGtm_Tim_In.h , IfxGtm_Tim_In.c
  • IfxGtm_Tim_In_Input : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_adjacentChannel : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_aux : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_currentChannel : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_isDataLost() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_isNewData() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_onIsr() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_update() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_Input : IfxGtm_Tim.h
  • IfxGtm_Tim_Input_adjacentChannel : IfxGtm_Tim.h
  • IfxGtm_Tim_Input_currentChannel : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_bitCompression : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_inputEvent : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_inputPrescaler : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_pulseIntegration : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_pwmMeasurement : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_bothEdge : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_disabled : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_fallingEdge : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim.h
  • IfxGtm_Tom : IfxGtm_cfg.h
  • IfxGtm_TOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_9_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Tom_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_10 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_11 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_12 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_13 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_14 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_15 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_8 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_9 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_clearOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_clearZeroNotification() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_ClkSrc : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_noClock : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getChannelPointer() : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getClockFrequency() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareOnePointer() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareZeroPointer() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getOutputLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getSrcPointer() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getTgcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getTimerPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_isOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_isZeroNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_OutputTrigger : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_OutputTrigger_forward : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_OutputTrigger_generate : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_raiseInterruptOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_raiseInterruptZero() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_ResetEvent : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent_onCm0 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent_onTrigger : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompare() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareOneShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareZeroShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCounterValue() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setGatedCounter() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setOneShotMode() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setPcm() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setResetSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setSignalLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setSpe() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setTriggerOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IFXGTM_TOM_NUM_TGC_CHANNELS : IfxGtm_Tom.h
  • IfxGtm_Tom_Pwm_init() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_initConfig() : IfxGtm_Tom_Pwm.h , IfxGtm_Tom_Pwm.c
  • IfxGtm_Tom_Pwm_start() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_stop() : IfxGtm_Tom_Pwm.h , IfxGtm_Tom_Pwm.c
  • IfxGtm_Tom_PwmHl : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_getDeadtime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_getMinPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_getMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_init() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_initConfig() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_invertActiveState() : IfxGtm_Tom_PwmHl.c
  • IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_modes : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setDeadtime() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setMinPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setMode() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setOnTime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setOnTimeAndShift() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setupChannels() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_stdIfPwmHlInit() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_Update : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_updateAndShiftOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateCenterAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateEdgeAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_UpdatePulse : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_updatePulse() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updatePulseOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_UpdateShift : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_updateShiftCenterAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_Tgc : IfxGtm_cfg.h
  • IfxGtm_Tom_Tgc_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_Tgc_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_Tgc_buildFeature() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_buildFeatureForChannel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannels() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableTimeTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_resetChannels() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setChannelForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setChannelsForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setTimeTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_trigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_writeGlobalControl() : IfxGtm_Tom.h
  • IfxGtm_Tom_Timer_acknowledgeTimerIrq() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_acknowledgeTriggerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_addToChannelMask() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_applyUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_disableUpdate() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_getFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getInputFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getOffset() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getPeriod() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_getPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getResolution() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_getTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getTriggerPointer() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_init() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_initConfig() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_run() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setFrequency() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_setPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setSingleMode() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_setTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_stdIfTimerInit() : IfxGtm_Tom_Timer.h , IfxGtm_Tom_Timer.c
  • IfxGtm_Tom_Timer_stop() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_updateInputFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_ToutMapP : IfxGtm_PinMap.h
  • IfxGtm_ToutSel : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_a : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_b : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_c : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_d : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_e : IfxGtm_PinMap.h
  • IfxGtm_Trig_AdcGroup : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_tableAdc0_1_2 : IfxGtm_Trig.c
  • IfxGtm_Trig_AdcTrig_tableAdc3_4 : IfxGtm_Trig.c
  • IfxGtm_Trig_AdcTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_fromDsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig_table : IfxGtm_Trig.c
  • IfxGtm_Trig_SentTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_toDsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toSent() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toVadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxHssl_cfg_hsctIndexMap : IfxHssl_cfg.c , IfxHssl_cfg.h
  • IfxHssl_cfg_hsslIndexMap : IfxHssl_cfg.c , IfxHssl_cfg.h
  • IfxHssl_ChannelId : IfxHssl.h
  • IfxHssl_ChannelId_0 : IfxHssl.h
  • IfxHssl_ChannelId_1 : IfxHssl.h
  • IfxHssl_ChannelId_2 : IfxHssl.h
  • IfxHssl_ChannelId_3 : IfxHssl.h
  • IfxHssl_clearHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_clearHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_clearHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_clearInitialiseModeFlag() : IfxHssl.h
  • IfxHssl_ClockFrequencyRate : IfxHssl.h
  • IfxHssl_ClockFrequencyRate_10Mhz : IfxHssl.h
  • IfxHssl_ClockFrequencyRate_20Mhz : IfxHssl.h
  • IfxHssl_Command : IfxHssl.h
  • IfxHssl_Command_noAction : IfxHssl.h
  • IfxHssl_Command_readFrame : IfxHssl.h
  • IfxHssl_Command_triggerFrame : IfxHssl.h
  • IfxHssl_Command_writeFrame : IfxHssl.h
  • IfxHssl_ControlCommand : IfxHssl.h
  • IfxHssl_ControlCommand_disableReception : IfxHssl.h
  • IfxHssl_ControlCommand_enableReception : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedClockStart : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedClockStop : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedTransmission : IfxHssl.h
  • IfxHssl_ControlCommand_lowSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_lowSpeedTransmission : IfxHssl.h
  • IfxHssl_ControlCommand_mediumSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_ping : IfxHssl.h
  • IfxHssl_ControlCommand_turnOffClockTestMode : IfxHssl.h
  • IfxHssl_ControlCommand_turnOnClockTestMode : IfxHssl.h
  • IfxHssl_ControlCommand_turnOnPayloadLoopback : IfxHssl.h
  • IfxHssl_DataLength : IfxHssl.h
  • IfxHssl_DataLength_16bit : IfxHssl.h
  • IfxHssl_DataLength_32bit : IfxHssl.h
  • IfxHssl_DataLength_8bit : IfxHssl.h
  • IfxHssl_disableHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsctModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_disableHsctReceivePath() : IfxHssl.h
  • IfxHssl_disableHsctTransmitPath() : IfxHssl.h
  • IfxHssl_disableHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsslModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_enableAllErrorFlags() : IfxHssl.h
  • IfxHssl_enableHsctInterrupt() : IfxHssl.h
  • IfxHssl_enableHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsctModule() : IfxHssl.h , IfxHssl.c
  • IfxHssl_enableHsctReceivePath() : IfxHssl.h
  • IfxHssl_enableHsctTransmitPath() : IfxHssl.h
  • IfxHssl_enableHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsslCOKInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslERRInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslEXIInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsslModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_enableHsslRDIInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslTRGInterrupt() : IfxHssl.h
  • IfxHssl_getAllMflagsStatus() : IfxHssl.h
  • IfxHssl_getCurrentCount() : IfxHssl.h
  • IfxHssl_getHsctAddress() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctIndex() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsctSrcPointer() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsctUnsolicitedStatusMessage() : IfxHssl.h
  • IfxHssl_getHsslAddress() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslChannelErrorInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsslCOKSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslERRSrcPointer() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsslEXISrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslGloabalErrorInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsslIndex() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslRDISrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslTRGSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getInitialiseModeFlagStatus() : IfxHssl.h
  • IfxHssl_getReloadCount() : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_commandError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_headerError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_payloadError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_pingAnswerReceived : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_pllLockLosterror : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_speedModeSwitchError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_txTransferError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished : IfxHssl.h
  • IfxHssl_Hsct_SleepMode : IfxHssl.h
  • IfxHssl_Hsct_SleepMode_disable : IfxHssl.h
  • IfxHssl_Hsct_SleepMode_enable : IfxHssl.h
  • IfxHssl_hsctIndex : IfxHssl_cfg.h
  • IfxHssl_hsctIndex_0 : IfxHssl_cfg.h
  • IfxHssl_hsctIndex_none : IfxHssl_cfg.h
  • IfxHssl_Hssl_checkErrors() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_clearErrorFlags() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_delay() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_ERRInterruptSource : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_timeoutError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_transactionTagError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_unexpectedError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_busAccessError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_crcError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_dataLengthError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation : IfxHssl.h
  • IfxHssl_Hssl_FrameRequest : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_noAction : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_readFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_readId : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_triggerFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_writeFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_getReadData() : IfxHssl_Hssl.h
  • IfxHssl_Hssl_initChannel() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initChannelConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initHsctModule() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initHsctModuleConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initHsslModule() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initHsslModuleConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_prepareStream() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_read() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_sendControlCommand() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_singleFrameRequest() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_SleepMode : IfxHssl.h
  • IfxHssl_Hssl_SleepMode_disable : IfxHssl.h
  • IfxHssl_Hssl_SleepMode_enable : IfxHssl.h
  • IfxHssl_Hssl_Status : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_busy : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_error : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_ok : IfxHssl_Hssl.h
  • IfxHssl_Hssl_waitAcknowledge() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_write() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_writeStream() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_hsslIndex : IfxHssl_cfg.h
  • IfxHssl_hsslIndex_0 : IfxHssl_cfg.h
  • IfxHssl_hsslIndex_none : IfxHssl_cfg.h
  • IfxHssl_InterfaceMode : IfxHssl.h
  • IfxHssl_InterfaceMode_master : IfxHssl.h
  • IfxHssl_InterfaceMode_slave : IfxHssl.h
  • IfxHssl_isModuleSuspended() : IfxHssl.h
  • IFXHSSL_JTAG_ID_ADDRESS : IfxHssl_cfg.h
  • IfxHssl_MasterModeRxSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_highSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_lowSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_mediumSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed_highSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed_lowSpeed : IfxHssl.h
  • IFXHSSL_NUM_CHANNELS : IfxHssl_cfg.h
  • IFXHSSL_NUM_MODULES : IfxHssl_cfg.h
  • IfxHssl_PllReferenceClock : IfxHssl.h
  • IfxHssl_PllReferenceClock_hsctSystemClockInput : IfxHssl.h
  • IfxHssl_PllReferenceClock_oscillatorInput : IfxHssl.h
  • IfxHssl_resetHsctKernel() : IfxHssl.c , IfxHssl.h
  • IfxHssl_resetHsslKernel() : IfxHssl.c , IfxHssl.h
  • IfxHssl_sendHsctUnsolicitedStatusMessage() : IfxHssl.h
  • IfxHssl_setHsctRxLinkSpeed() : IfxHssl.h
  • IfxHssl_setHsctSleepMode() : IfxHssl.h
  • IfxHssl_setHsctTxLinkSpeed() : IfxHssl.h
  • IfxHssl_setHsslSleepMode() : IfxHssl.h
  • IfxHssl_setInitialiseModeFlag() : IfxHssl.h
  • IfxHssl_setReloadCount() : IfxHssl.h
  • IfxHssl_setSuspendMode() : IfxHssl.h
  • IfxHssl_setTimeoutReloadValue() : IfxHssl.h
  • IfxHssl_StreamingMode : IfxHssl.h
  • IfxHssl_StreamingMode_continuous : IfxHssl.h
  • IfxHssl_StreamingMode_single : IfxHssl.h
  • IfxHssl_SuspendMode : IfxHssl.h
  • IfxHssl_SuspendMode_hard : IfxHssl.h
  • IfxHssl_SuspendMode_none : IfxHssl.h
  • IfxHssl_SuspendMode_soft : IfxHssl.h
  • IfxI2c0_SCL_P02_5_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SCL_P13_1_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SCL_P15_4_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SDA_P02_4_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SDA_P13_2_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SDA_P15_5_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c_busIsFree() : IfxI2c.h
  • IfxI2c_BusStatus : IfxI2c.h
  • IfxI2c_BusStatus_busyMaster : IfxI2c.h
  • IfxI2c_BusStatus_idle : IfxI2c.h
  • IfxI2c_BusStatus_remoteSlave : IfxI2c.h
  • IfxI2c_BusStatus_started : IfxI2c.h
  • IfxI2c_cfg_indexMap : IfxI2c_cfg.c , IfxI2c_cfg.h
  • IfxI2c_clearAllDtrInterruptSources() : IfxI2c.h
  • IfxI2c_clearAllErrorInterruptSources() : IfxI2c.h
  • IfxI2c_clearAllProtocolInterruptSources() : IfxI2c.h
  • IfxI2c_clearBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearErrorInterruptSource() : IfxI2c.h
  • IfxI2c_clearLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_clearSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_configureAsMaster() : IfxI2c.c , IfxI2c.h
  • IfxI2c_disableBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableErrorInterruptFlag() : IfxI2c.h
  • IfxI2c_disableErrorInterruptSource() : IfxI2c.h
  • IfxI2c_disableLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_disableProtocolInterruptFlag() : IfxI2c.h
  • IfxI2c_disableProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_disableSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableBurstDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableErrorInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableErrorInterruptFlag() : IfxI2c.h
  • IfxI2c_enableErrorInterruptSource() : IfxI2c.h
  • IfxI2c_enableLastBurstDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableLastSingleDataTransferInterrupt() : IfxI2c.h , IfxI2c.c
  • IfxI2c_enableLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableProtocolInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableProtocolInterruptFlag() : IfxI2c.h
  • IfxI2c_enableProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_enableSingleDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_ErrorInterruptSource : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_rxFifoOverflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_rxFifoUnderflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_txFifoOverflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_txFifoUnderflow : IfxI2c.h
  • IfxI2c_getAddress() : IfxI2c.c , IfxI2c.h
  • IfxI2c_getBaudrate() : IfxI2c.c , IfxI2c.h
  • IfxI2c_getBurstDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getBurstRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getBusStatus() : IfxI2c.h
  • IfxI2c_getErrorInterruptFlagStatus() : IfxI2c.h
  • IfxI2c_getErrorInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getErrorSrcPointer() : IfxI2c.h
  • IfxI2c_getIndex() : IfxI2c.c , IfxI2c.h
  • IfxI2c_getLastBurstDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getLastBurstRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getLastSingleDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getLastSingleRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getProtocolInterruptFlagStatus() : IfxI2c.h
  • IfxI2c_getProtocolInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getProtocolSrcPointer() : IfxI2c.h
  • IfxI2c_getSingleDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getSingleRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_I2c_initConfig() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_initDevice() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_initDeviceConfig() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_initModule() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_read() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_Status : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_al : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_busNotFree : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_error : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_nak : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_ok : IfxI2c_I2c.h
  • IfxI2c_I2c_write() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_Index : IfxI2c_cfg.h
  • IfxI2c_Index_0 : IfxI2c_cfg.h
  • IfxI2c_Index_none : IfxI2c_cfg.h
  • IfxI2c_initSclSdaPin() : IfxI2c.c , IfxI2c.h
  • IfxI2c_isFifoRequest() : IfxI2c.h
  • IFXI2C_NUM_MODULES : IfxI2c_cfg.h
  • IFXI2C_PINMAP_NUM_MODULES : IfxI2c_PinMap.h
  • IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS : IfxI2c_PinMap.h
  • IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS : IfxI2c_PinMap.h
  • IfxI2c_PinSelect : IfxI2c.h
  • IfxI2c_PinSelect_a : IfxI2c.h
  • IfxI2c_PinSelect_b : IfxI2c.h
  • IfxI2c_PinSelect_c : IfxI2c.h
  • IfxI2c_PinSelect_d : IfxI2c.h
  • IfxI2c_PinSelect_e : IfxI2c.h
  • IfxI2c_PinSelect_f : IfxI2c.h
  • IfxI2c_PinSelect_g : IfxI2c.h
  • IfxI2c_PinSelect_h : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_addressMatch : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_arbitrationLost : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_generalCall : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_masterCode : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_receiveMode : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_transmissionEnd : IfxI2c.h
  • IfxI2c_releaseBus() : IfxI2c.c , IfxI2c.h
  • IfxI2c_resetFifo() : IfxI2c.c , IfxI2c.h
  • IfxI2c_resetModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_run() : IfxI2c.h
  • IfxI2c_Scl_InOut_pinTable : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c_Sda_InOut_pinTable : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c_setBaudrate() : IfxI2c.c , IfxI2c.h
  • IfxI2c_setPinSelection() : IfxI2c.h
  • IfxI2c_setReceivePacketSize() : IfxI2c.h
  • IfxI2c_setSlaveDeviceAddress() : IfxI2c.h
  • IfxI2c_setSleepMode() : IfxI2c.h
  • IfxI2c_setTransmitPacketSize() : IfxI2c.h
  • IfxI2c_SleepMode : IfxI2c.h
  • IfxI2c_SleepMode_disable : IfxI2c.h
  • IfxI2c_SleepMode_enable : IfxI2c.h
  • IfxI2c_stop() : IfxI2c.h
  • IfxI2c_waitBusFree() : IfxI2c.h
  • IfxI2c_writeFifo() : IfxI2c.h
  • IfxIom_disableModule() : IfxIom.h
  • IfxIom_Driver_clearAllGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_clearHistory() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_clearLamMonGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_clearLamRefGlitch() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_disableEvents() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_disableLamEvent() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_enableLamEvent() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_getHistory() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_init() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_initConfig() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_initLam() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_initLamConfig() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_isLamMonGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_isLamRefGlitch() : IfxIom_Driver.c , IfxIom_Driver.h
  • IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL : IfxIom_Driver.c
  • IfxIom_Driver_restoreEvents() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_enableModule() : IfxIom.h
  • IfxIom_getFrequency() : IfxIom.c , IfxIom.h
  • IfxIom_LamEventSource : IfxIom.h
  • IfxIom_LamEventSource_mon : IfxIom.h
  • IfxIom_LamEventSource_monXorRef : IfxIom.h
  • IfxIom_LamEventTrigger : IfxIom.h
  • IfxIom_LamEventTrigger_anyEdge : IfxIom.h
  • IfxIom_LamEventTrigger_fallingEdge : IfxIom.h
  • IfxIom_LamEventTrigger_none : IfxIom.h
  • IfxIom_LamEventTrigger_risingEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_anyEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_fallingEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_none : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_risingEdge : IfxIom.h
  • IfxIom_LamEventWindowControlSource : IfxIom.h
  • IfxIom_LamEventWindowControlSource_mon : IfxIom.h
  • IfxIom_LamEventWindowControlSource_ref : IfxIom.h
  • IfxIom_LamEventWindowRunControl : IfxIom.h
  • IfxIom_LamEventWindowRunControl_freeRunning : IfxIom.h
  • IfxIom_LamEventWindowRunControl_gated : IfxIom.h
  • IfxIom_LamFilterMode : IfxIom.h
  • IfxIom_LamFilterMode_delayDebounceBothEdge : IfxIom.h
  • IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceBothEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceRisingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_noFilter : IfxIom.h
  • IfxIom_LamFilterMode_prescalerOnFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_prescalerOnRisingEdge : IfxIom.h
  • IfxIom_LamId : IfxIom.h
  • IfxIom_LamId_0 : IfxIom.h
  • IfxIom_LamId_1 : IfxIom.h
  • IfxIom_LamId_10 : IfxIom.h
  • IfxIom_LamId_11 : IfxIom.h
  • IfxIom_LamId_12 : IfxIom.h
  • IfxIom_LamId_13 : IfxIom.h
  • IfxIom_LamId_14 : IfxIom.h
  • IfxIom_LamId_15 : IfxIom.h
  • IfxIom_LamId_2 : IfxIom.h
  • IfxIom_LamId_3 : IfxIom.h
  • IfxIom_LamId_4 : IfxIom.h
  • IfxIom_LamId_5 : IfxIom.h
  • IfxIom_LamId_6 : IfxIom.h
  • IfxIom_LamId_7 : IfxIom.h
  • IfxIom_LamId_8 : IfxIom.h
  • IfxIom_LamId_9 : IfxIom.h
  • IfxIom_MonInput : IfxIom_cfg.h
  • IfxIom_MonInput_asclin0Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin1Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin2Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin3Atx : IfxIom_cfg.h
  • IfxIom_MonInput_canNode0Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode1Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode2Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode3Txd : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout63 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout63 : IfxIom_cfg.h
  • IfxIom_MonInput_gnd : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout104 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout105 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout106 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout22 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout23 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout24 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout25 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout26 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout27 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout28 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout29 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout30 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout31 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout32 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout33 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout34 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout68 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout69 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout70 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_12 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_13 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_14 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_0 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_1 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_10 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_11 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_12 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_2 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_3 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_4 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_5 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_6 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_7 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_8 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_9 : IfxIom_cfg.h
  • IfxIom_MonInput_psi5Psitx0 : IfxIom_cfg.h
  • IfxIom_MonInput_psi5Psitx1 : IfxIom_cfg.h
  • IfxIom_MonInput_qspi0Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi1Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi2Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi3Mrst : IfxIom_cfg.h
  • IfxIom_MonInputSignal : IfxIom_cfg.h
  • IfxIom_MonInputSignal_0 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_1 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_2 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_p : IfxIom_cfg.h
  • IFXIOM_NUM_CHANNELS : IfxIom_cfg.h
  • IfxIom_RefInput : IfxIom_cfg.h
  • IfxIom_RefInput_asclin0Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin1Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin2Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin3Atx : IfxIom_cfg.h
  • IfxIom_RefInput_canNode0Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode1Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode2Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode3Txd : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout63 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout63 : IfxIom_cfg.h
  • IfxIom_RefInput_exorCombiner : IfxIom_cfg.h
  • IfxIom_RefInput_gnd : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout0 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout1 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout10 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout107 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout108 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout109 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout11 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout12 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout13 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout14 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout15 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout2 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout3 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout4 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout5 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout6 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout7 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout8 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout9 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_12 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_13 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_14 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_0 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_1 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_10 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_11 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_12 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_2 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_3 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_4 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_5 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_6 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_7 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_8 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_9 : IfxIom_cfg.h
  • IfxIom_RefInput_psi5Psitx0 : IfxIom_cfg.h
  • IfxIom_RefInput_psi5Psitx2 : IfxIom_cfg.h
  • IfxIom_RefInput_qspi0Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi1Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi2Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi3Mrst : IfxIom_cfg.h
  • IfxIom_RefInputSignal : IfxIom_cfg.h
  • IfxIom_RefInputSignal_0 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_1 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_2 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_p : IfxIom_cfg.h
  • IfxIom_RefInputSignal_xorCombiner : IfxIom_cfg.h
  • IfxIom_resetModule() : IfxIom.c , IfxIom.h
  • IfxIom_setSleepMode() : IfxIom.h
  • IfxIom_SleepMode : IfxIom.h
  • IfxIom_SleepMode_disable : IfxIom.h
  • IfxIom_SleepMode_enable : IfxIom.h
  • IfxMsc0_EN0_P10_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN0_P10_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P10_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P11_11_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P14_10_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN0_P15_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN1_P10_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P11_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN1_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P14_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN1_P15_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P10_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P10_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END2_P10_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P11_11_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END2_P14_10_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P15_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END3_P10_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P11_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P14_9_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END3_P15_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLN_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLND_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLP_P11_6_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLP_P13_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLP_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_INJ0_P00_0_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_INJ1_P10_5_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI0_P11_10_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SDI1_P10_2_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI2_P14_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SDI3_P11_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SON_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SOND_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SOP_P11_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SOP_P13_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_EN0_P23_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_EN0_P32_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_EN1_P23_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_END2_P23_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_END2_P32_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_END3_P23_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_FCLN_P22_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_FCLND_P22_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_FCLP_P22_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_INJ0_P23_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_INJ1_P33_13_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SDI0_P23_1_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SDI1_P02_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SDI2_P32_4_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SON_P22_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SOND_P22_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SOP_P22_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_ActivePhaseSelection : IfxMsc.h
  • IfxMsc_ActivePhaseSelection_lowLevel : IfxMsc.h
  • IfxMsc_ActivePhaseSelection_none : IfxMsc.h
  • IfxMsc_AsynchronousBlock : IfxMsc.h
  • IfxMsc_AsynchronousBlock_bypassed : IfxMsc.h
  • IfxMsc_AsynchronousBlock_noBypassed : IfxMsc.h
  • IfxMsc_cfg_indexMap : IfxMsc_cfg.c , IfxMsc_cfg.h
  • IfxMsc_ChipSelectActiveState : IfxMsc.h
  • IfxMsc_ChipSelectActiveState_high : IfxMsc.h
  • IfxMsc_ChipSelectActiveState_low : IfxMsc.h
  • IfxMsc_clearAbraOverflowFlag() : IfxMsc.h
  • IfxMsc_clearAbraUnderflowFlag() : IfxMsc.h
  • IfxMsc_clearDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h
  • IfxMsc_clearRecieveDataInterruptFlag() : IfxMsc.h
  • IfxMsc_clearReset() : IfxMsc.h , IfxMsc.c
  • IfxMsc_clearUpstreamTimeout() : IfxMsc.h
  • IfxMsc_clearUpstreamValidFlag() : IfxMsc.h
  • IfxMsc_clearValidbit() : IfxMsc.h
  • IfxMsc_ClockSelect : IfxMsc.h
  • IfxMsc_ClockSelect_feray : IfxMsc.h
  • IfxMsc_ClockSelect_fspb : IfxMsc.h
  • IfxMsc_ClockSelect_fsri : IfxMsc.h
  • IfxMsc_ClockSelect_noClock : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode_disabled : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode_enabled : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt_enabled : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_CommandFrameLength : IfxMsc.h
  • IfxMsc_CommandFrameLength_0 : IfxMsc.h
  • IfxMsc_CommandFrameLength_1 : IfxMsc.h
  • IfxMsc_CommandFrameLength_10 : IfxMsc.h
  • IfxMsc_CommandFrameLength_11 : IfxMsc.h
  • IfxMsc_CommandFrameLength_12 : IfxMsc.h
  • IfxMsc_CommandFrameLength_13 : IfxMsc.h
  • IfxMsc_CommandFrameLength_14 : IfxMsc.h
  • IfxMsc_CommandFrameLength_15 : IfxMsc.h
  • IfxMsc_CommandFrameLength_16 : IfxMsc.h
  • IfxMsc_CommandFrameLength_17 : IfxMsc.h
  • IfxMsc_CommandFrameLength_18 : IfxMsc.h
  • IfxMsc_CommandFrameLength_19 : IfxMsc.h
  • IfxMsc_CommandFrameLength_2 : IfxMsc.h
  • IfxMsc_CommandFrameLength_20 : IfxMsc.h
  • IfxMsc_CommandFrameLength_21 : IfxMsc.h
  • IfxMsc_CommandFrameLength_22 : IfxMsc.h
  • IfxMsc_CommandFrameLength_23 : IfxMsc.h
  • IfxMsc_CommandFrameLength_24 : IfxMsc.h
  • IfxMsc_CommandFrameLength_25 : IfxMsc.h
  • IfxMsc_CommandFrameLength_26 : IfxMsc.h
  • IfxMsc_CommandFrameLength_27 : IfxMsc.h
  • IfxMsc_CommandFrameLength_28 : IfxMsc.h
  • IfxMsc_CommandFrameLength_29 : IfxMsc.h
  • IfxMsc_CommandFrameLength_3 : IfxMsc.h
  • IfxMsc_CommandFrameLength_30 : IfxMsc.h
  • IfxMsc_CommandFrameLength_31 : IfxMsc.h
  • IfxMsc_CommandFrameLength_32 : IfxMsc.h
  • IfxMsc_CommandFrameLength_4 : IfxMsc.h
  • IfxMsc_CommandFrameLength_5 : IfxMsc.h
  • IfxMsc_CommandFrameLength_6 : IfxMsc.h
  • IfxMsc_CommandFrameLength_7 : IfxMsc.h
  • IfxMsc_CommandFrameLength_8 : IfxMsc.h
  • IfxMsc_CommandFrameLength_9 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_0 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_1 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_10 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_100 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_101 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_102 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_103 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_104 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_105 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_106 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_107 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_108 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_109 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_11 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_110 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_111 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_112 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_113 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_114 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_115 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_116 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_117 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_118 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_119 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_12 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_120 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_121 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_122 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_123 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_124 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_125 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_126 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_127 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_13 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_14 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_15 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_16 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_17 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_18 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_19 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_20 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_21 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_22 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_23 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_24 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_25 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_26 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_27 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_28 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_29 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_30 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_31 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_32 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_33 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_34 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_35 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_36 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_37 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_38 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_39 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_4 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_40 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_41 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_42 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_43 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_44 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_45 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_46 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_47 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_48 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_49 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_5 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_50 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_51 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_52 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_53 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_54 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_55 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_56 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_57 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_58 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_59 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_6 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_60 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_61 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_62 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_63 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_64 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_65 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_66 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_67 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_68 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_69 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_7 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_70 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_71 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_72 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_73 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_74 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_75 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_76 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_77 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_78 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_79 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_8 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_80 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_81 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_82 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_83 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_84 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_85 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_86 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_87 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_88 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_89 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_9 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_90 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_91 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_92 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_93 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_94 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_95 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_96 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_97 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_98 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_99 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_0 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_1 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_DataFrameInterrupt : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_atFirstDataBit : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_atLastDataBit : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_DataFrameLength : IfxMsc.h
  • IfxMsc_DataFrameLength_0 : IfxMsc.h
  • IfxMsc_DataFrameLength_1 : IfxMsc.h
  • IfxMsc_DataFrameLength_10 : IfxMsc.h
  • IfxMsc_DataFrameLength_11 : IfxMsc.h
  • IfxMsc_DataFrameLength_12 : IfxMsc.h
  • IfxMsc_DataFrameLength_13 : IfxMsc.h
  • IfxMsc_DataFrameLength_14 : IfxMsc.h
  • IfxMsc_DataFrameLength_15 : IfxMsc.h
  • IfxMsc_DataFrameLength_16 : IfxMsc.h
  • IfxMsc_DataFrameLength_2 : IfxMsc.h
  • IfxMsc_DataFrameLength_3 : IfxMsc.h
  • IfxMsc_DataFrameLength_4 : IfxMsc.h
  • IfxMsc_DataFrameLength_5 : IfxMsc.h
  • IfxMsc_DataFrameLength_6 : IfxMsc.h
  • IfxMsc_DataFrameLength_7 : IfxMsc.h
  • IfxMsc_DataFrameLength_8 : IfxMsc.h
  • IfxMsc_DataFrameLength_9 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_10 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_11 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_12 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_13 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_14 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_15 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_16 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_17 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_18 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_19 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_20 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_21 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_22 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_23 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_24 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_25 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_26 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_27 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_28 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_29 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_30 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_31 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_32 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_4 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_5 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_6 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_7 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_8 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_9 : IfxMsc.h
  • IfxMsc_disableModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_disableUpstreamTimeoutInterrupt() : IfxMsc.h
  • IfxMsc_DividerMode : IfxMsc.h
  • IfxMsc_DividerMode_fractional : IfxMsc.h
  • IfxMsc_DividerMode_normal : IfxMsc.h
  • IfxMsc_downstreamAbraBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_downstreamFractionalBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_downstreamNormalBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_EmergencyStop : IfxMsc.h
  • IfxMsc_EmergencyStop_disabled : IfxMsc.h
  • IfxMsc_EmergencyStop_enabled : IfxMsc.h
  • IfxMsc_En_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_enableModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_enableUpstreamTimeoutInterrupt() : IfxMsc.h
  • IfxMsc_Extension : IfxMsc.h
  • IfxMsc_Extension_disabled : IfxMsc.h
  • IfxMsc_Extension_enabled : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_0 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_1 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_10 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_11 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_12 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_13 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_14 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_15 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_16 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_17 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_18 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_19 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_2 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_20 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_21 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_22 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_23 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_24 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_25 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_26 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_27 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_28 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_29 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_3 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_30 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_31 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_32 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_33 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_34 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_35 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_36 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_37 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_38 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_39 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_4 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_40 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_41 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_42 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_43 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_44 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_45 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_46 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_47 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_48 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_49 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_5 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_50 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_51 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_52 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_53 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_54 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_55 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_56 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_57 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_58 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_59 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_6 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_60 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_61 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_62 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_63 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_7 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_8 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_9 : IfxMsc.h
  • IfxMsc_ExternalSignalInjection : IfxMsc.h
  • IfxMsc_ExternalSignalInjection_disabled : IfxMsc.h
  • IfxMsc_ExternalSignalInjection_enabled : IfxMsc.h
  • IfxMsc_FclClockControlEnabled : IfxMsc.h
  • IfxMsc_FclClockControlEnabled_activePhaseOnly : IfxMsc.h
  • IfxMsc_FclClockControlEnabled_always : IfxMsc.h
  • IfxMsc_FclLinePolarity : IfxMsc.h
  • IfxMsc_FclLinePolarity_inverted : IfxMsc.h
  • IfxMsc_FclLinePolarity_nonInverted : IfxMsc.h
  • IfxMsc_Fcln_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Fclp_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_getActiveDataFrameStatus() : IfxMsc.h , IfxMsc.c
  • IfxMsc_getAddress() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getAsyncClockBypass() : IfxMsc.h
  • IfxMsc_getData() : IfxMsc.h
  • IfxMsc_getDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getDataHighTarget() : IfxMsc.h
  • IfxMsc_getDataLowTarget() : IfxMsc.h
  • IfxMsc_getDownStreamExtension() : IfxMsc.h
  • IfxMsc_getIndex() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getRecieveDataInterruptFlag() : IfxMsc.h
  • IfxMsc_getSrcPointer() : IfxMsc.h
  • IfxMsc_getUpstreamData() : IfxMsc.h
  • IfxMsc_getUpstreamParityErrorFlag() : IfxMsc.h
  • IfxMsc_getUpstreamTimeoutFlag() : IfxMsc.h
  • IfxMsc_getUpstreamValidFlag() : IfxMsc.h
  • IfxMsc_HardwareClock : IfxMsc.h
  • IfxMsc_HardwareClock_disabled : IfxMsc.h
  • IfxMsc_HardwareClock_enabled : IfxMsc.h
  • IfxMsc_Index : IfxMsc_cfg.h
  • IfxMsc_Index_0 : IfxMsc_cfg.h
  • IfxMsc_Index_1 : IfxMsc_cfg.h
  • IfxMsc_Index_none : IfxMsc_cfg.h
  • IfxMsc_initEnPin() : IfxMsc.h
  • IfxMsc_initFclnPin() : IfxMsc.h
  • IfxMsc_initFclpPin() : IfxMsc.h
  • IfxMsc_initInjPin() : IfxMsc.h
  • IfxMsc_initSdiPin() : IfxMsc.h
  • IfxMsc_initSonPin() : IfxMsc.h
  • IfxMsc_initSopPin() : IfxMsc.h
  • IfxMsc_Inj_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_InterruptServiceRequest : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_0 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_1 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_2 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_3 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_4 : IfxMsc.h
  • IfxMsc_isModuleSuspended() : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_hardSuspend : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_noSuspend : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_softSuspend : IfxMsc.h
  • IfxMsc_MsbBitDataExtension : IfxMsc.h
  • IfxMsc_MsbBitDataExtension_notPresent : IfxMsc.h
  • IfxMsc_MsbBitDataExtension_present : IfxMsc.h
  • IfxMsc_Msc_clearDataFrameInterrupt() : IfxMsc_Msc.h
  • IfxMsc_Msc_deInitModule() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_getActiveDataFrameStatus() : IfxMsc_Msc.h
  • IfxMsc_Msc_getDataFrameInterruptStatus() : IfxMsc_Msc.h
  • IfxMsc_Msc_getTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_initializeAbra() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initializeDataExtension() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_initModule() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_initModuleConfig() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_receiveData() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendCommand() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_sendData() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendDataExtension() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_sendDataHigh() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendDataLow() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_setCommandTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_setDataTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_Target : IfxMsc_Msc.h
  • IfxMsc_Msc_Target_high : IfxMsc_Msc.h
  • IfxMsc_Msc_Target_low : IfxMsc_Msc.h
  • IfxMsc_NDividerAbra : IfxMsc.h
  • IfxMsc_NDividerAbra_1 : IfxMsc.h
  • IfxMsc_NDividerAbra_2 : IfxMsc.h
  • IfxMsc_NDividerAbra_3 : IfxMsc.h
  • IfxMsc_NDividerAbra_4 : IfxMsc.h
  • IfxMsc_NDividerAbra_5 : IfxMsc.h
  • IfxMsc_NDividerAbra_6 : IfxMsc.h
  • IfxMsc_NDividerAbra_7 : IfxMsc.h
  • IfxMsc_NDividerAbra_8 : IfxMsc.h
  • IfxMsc_NDividerDownstream : IfxMsc.h
  • IfxMsc_NDividerDownstream_1 : IfxMsc.h
  • IfxMsc_NDividerDownstream_10 : IfxMsc.h
  • IfxMsc_NDividerDownstream_11 : IfxMsc.h
  • IfxMsc_NDividerDownstream_12 : IfxMsc.h
  • IfxMsc_NDividerDownstream_13 : IfxMsc.h
  • IfxMsc_NDividerDownstream_14 : IfxMsc.h
  • IfxMsc_NDividerDownstream_15 : IfxMsc.h
  • IfxMsc_NDividerDownstream_16 : IfxMsc.h
  • IfxMsc_NDividerDownstream_2 : IfxMsc.h
  • IfxMsc_NDividerDownstream_3 : IfxMsc.h
  • IfxMsc_NDividerDownstream_4 : IfxMsc.h
  • IfxMsc_NDividerDownstream_5 : IfxMsc.h
  • IfxMsc_NDividerDownstream_6 : IfxMsc.h
  • IfxMsc_NDividerDownstream_7 : IfxMsc.h
  • IfxMsc_NDividerDownstream_8 : IfxMsc.h
  • IfxMsc_NDividerDownstream_9 : IfxMsc.h
  • IFXMSC_NUM_ENABLE_SELECT_LINES : IfxMsc_cfg.h
  • IFXMSC_NUM_MODULES : IfxMsc_cfg.h
  • IfxMsc_OverflowInterrupt : IfxMsc.h
  • IfxMsc_OverflowInterrupt_disabled : IfxMsc.h
  • IfxMsc_OverflowInterrupt_enabled : IfxMsc.h
  • IfxMsc_OverflowInterruptNode : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_Parity : IfxMsc.h
  • IfxMsc_Parity_even : IfxMsc.h
  • IfxMsc_Parity_odd : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_0 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_1 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_10 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_11 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_12 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_13 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_14 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_15 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_2 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_3 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_4 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_5 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_6 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_7 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_8 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_9 : IfxMsc.h
  • IFXMSC_PINMAP_EN_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_INJ_IN_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_NUM_MODULES : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_NUM_TARGETS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SDI_IN_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SON_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IfxMsc_ReceiveDataInterrupt : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_disabled : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onDataReceive : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onRdieSet : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_resetModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_Sdi_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_SdiLinePolarity : IfxMsc.h
  • IfxMsc_SdiLinePolarity_invertedSi : IfxMsc.h
  • IfxMsc_SdiLinePolarity_likeSi : IfxMsc.h
  • IfxMsc_SerialDataInput : IfxMsc.h
  • IfxMsc_SerialDataInput_0 : IfxMsc.h
  • IfxMsc_SerialDataInput_1 : IfxMsc.h
  • IfxMsc_SerialDataInput_2 : IfxMsc.h
  • IfxMsc_SerialDataInput_3 : IfxMsc.h
  • IfxMsc_SerialDataInput_4 : IfxMsc.h
  • IfxMsc_SerialDataInput_5 : IfxMsc.h
  • IfxMsc_SerialDataInput_6 : IfxMsc.h
  • IfxMsc_SerialDataInput_7 : IfxMsc.h
  • IfxMsc_ServiceRequestDelay : IfxMsc.h
  • IfxMsc_ServiceRequestDelay_1bit : IfxMsc.h
  • IfxMsc_ServiceRequestDelay_noDelay : IfxMsc.h
  • IfxMsc_setAsyncClockBypass() : IfxMsc.h
  • IfxMsc_setCommandTarget() : IfxMsc.h
  • IfxMsc_setDataHighTarget() : IfxMsc.h
  • IfxMsc_setDataLowTarget() : IfxMsc.h
  • IfxMsc_setDownStreamData() : IfxMsc.h
  • IfxMsc_setDownStreamExtension() : IfxMsc.h
  • IfxMsc_setDownStreamExtensionData() : IfxMsc.h
  • IfxMsc_setFractionalDividerStep() : IfxMsc.h
  • IfxMsc_setNdividerDownstream() : IfxMsc.h
  • IfxMsc_setSerialDataInputSelect() : IfxMsc.h
  • IfxMsc_setSleepMode() : IfxMsc.h
  • IfxMsc_setSuspendMode() : IfxMsc.h
  • IfxMsc_setTransmissionMode() : IfxMsc.h
  • IfxMsc_setUpstreamChannelRecieveRate() : IfxMsc.h
  • IfxMsc_setUpstreamTimeout() : IfxMsc.h
  • IfxMsc_setUpstreamTimeoutPrescalar() : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_1 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_10 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_11 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_12 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_13 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_14 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_15 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_16 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_2 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_3 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_4 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_5 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_6 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_7 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_8 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_9 : IfxMsc.h
  • IfxMsc_SleepMode : IfxMsc.h
  • IfxMsc_SleepMode_disable : IfxMsc.h
  • IfxMsc_SleepMode_enable : IfxMsc.h
  • IfxMsc_SoLinePolarity : IfxMsc.h
  • IfxMsc_SoLinePolarity_inverted : IfxMsc.h
  • IfxMsc_SoLinePolarity_nonInverted : IfxMsc.h
  • IfxMsc_Son_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Sop_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Source : IfxMsc.h
  • IfxMsc_Source_alternateInputLine : IfxMsc.h
  • IfxMsc_Source_alternateInputLineInverted : IfxMsc.h
  • IfxMsc_Source_downstreamDataRegister : IfxMsc.h
  • IfxMsc_SuspendMode : IfxMsc.h
  • IfxMsc_SuspendMode_hard : IfxMsc.h
  • IfxMsc_SuspendMode_none : IfxMsc.h
  • IfxMsc_SuspendMode_soft : IfxMsc.h
  • IfxMsc_Target : IfxMsc.h
  • IfxMsc_Target_en0 : IfxMsc.h
  • IfxMsc_Target_en1 : IfxMsc.h
  • IfxMsc_Target_en2 : IfxMsc.h
  • IfxMsc_Target_en3 : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt_enabled : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_TransmissionMode : IfxMsc.h
  • IfxMsc_TransmissionMode_dataRepetition : IfxMsc.h
  • IfxMsc_TransmissionMode_triggered : IfxMsc.h
  • IfxMsc_UnderflowInterrupt : IfxMsc.h
  • IfxMsc_UnderflowInterrupt_disabled : IfxMsc.h
  • IfxMsc_UnderflowInterrupt_enabled : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType_12bit : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType_16bit : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_128 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_16 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_256 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_32 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_4 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_64 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_8 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_disabled : IfxMsc.h
  • IfxMsc_upstreamFractionalBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_upstreamNormalBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt_disabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt_enabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_1024 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_128 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_16 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_16384 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_2048 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_256 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_32 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_32768 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_4096 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_512 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_64 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_8 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_8192 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_10 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_11 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_12 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_13 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_14 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_15 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_16 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_3 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_5 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_6 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_7 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_8 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_9 : IfxMsc.h
  • IfxMtu_checkErrorFlags() : IfxMtu.h
  • IfxMtu_clearErrorTracking() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSram() : IfxMtu.h , IfxMtu.c
  • IfxMtu_clearSramContinue() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSramStart() : IfxMtu.c , IfxMtu.h
  • IfxMtu_disableMbistShell() : IfxMtu.h
  • IfxMtu_enableErrorTracking() : IfxMtu.h , IfxMtu.c
  • IfxMtu_enableMbistShell() : IfxMtu.h
  • IfxMtu_enableModule() : IfxMtu.h
  • IFXMTU_ERROR_FLAGS_MASK : IfxMtu.h
  • IfxMtu_getSystemAddress() : IfxMtu.h , IfxMtu.c
  • IfxMtu_getTrackedSramAddresses() : IfxMtu.c , IfxMtu.h
  • IfxMtu_isAutoInitRunning() : IfxMtu.h
  • IfxMtu_isErrorTrackingEnabled() : IfxMtu.h
  • IfxMtu_isErrorTrackingOverflow() : IfxMtu.h
  • IfxMtu_isMbistDone() : IfxMtu.h
  • IfxMtu_isModuleEnabled() : IfxMtu.h
  • IFXMTU_MAX_TRACKED_ADDRESSES : IfxMtu_cfg.h
  • IfxMtu_MbistSel : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cifCif : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cifJpeg1_4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cifJpeg3 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dtag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_dma : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem2 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem3 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem5 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem6 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem7 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ememXtm0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ememXtm1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayIbfTbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayMbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayObf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ethermac : IfxMtu_cfg.h
  • IfxMtu_MbistSel_fft0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_fft1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll1a : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll1b : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll2 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmFifo : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcan : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcds : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mod4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_none : IfxMtu_cfg.h
  • IfxMtu_MbistSel_psi5 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_stdbyRam1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_stdbyRam2 : IfxMtu_cfg.h
  • IFXMTU_MC_ADDRESS_BASE : IfxMtu_cfg.h
  • IFXMTU_NUM_MBIST_TABLE_ITEMS : IfxMtu_cfg.h
  • IfxMtu_readSramAddress() : IfxMtu.c , IfxMtu.h
  • IfxMtu_runNonDestructiveInversionTest() : IfxMtu.c , IfxMtu.h
  • IfxMtu_sramTable : IfxMtu_cfg.c , IfxMtu_cfg.h
  • IfxMtu_waitForMbistDone() : IfxMtu.c
  • IfxMtu_writeSramAddress() : IfxMtu.c , IfxMtu.h
  • IfxMultican_calcTimingFromBTR() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Can_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_getConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_getModuleFrequency() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_initModule() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_initModuleConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_cancelSend() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_clearRxPending() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_clearTxPending() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_getConfig() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_MsgObj_getPendingId() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_getStatus() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_init() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_initConfig() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_MsgObj_isRxPending() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_isTransmitRequested() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_isTxPending() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_readLongFrame() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_readMessage() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_sendLongFrame() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_sendMessage() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_Node_activate() : IfxMultican_Can.h
  • IfxMultican_Can_Node_deactivate() : IfxMultican_Can.h
  • IfxMultican_Can_Node_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_Node_getConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_Node_init() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_Node_initConfig() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_Node_recoverBusOff() : IfxMultican_Can.h
  • IfxMultican_Can_Node_sendToBusOff() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_cfg_indexMap : IfxMultican_cfg.h , IfxMultican_cfg.c
  • IfxMultican_clearMessagePendingSeletor() : IfxMultican.h
  • IfxMultican_clearPendingMessageNotification() : IfxMultican.h
  • IfxMultican_ClockSelect : IfxMultican.h
  • IfxMultican_ClockSelect_fclc : IfxMultican.h
  • IfxMultican_ClockSelect_fErayPll : IfxMultican.h
  • IfxMultican_ClockSelect_fosc0 : IfxMultican.h
  • IfxMultican_ClockSelect_noClock : IfxMultican.h
  • IfxMultican_DataLengthCode : IfxMultican.h
  • IfxMultican_DataLengthCode_0 : IfxMultican.h
  • IfxMultican_DataLengthCode_1 : IfxMultican.h
  • IfxMultican_DataLengthCode_12 : IfxMultican.h
  • IfxMultican_DataLengthCode_16 : IfxMultican.h
  • IfxMultican_DataLengthCode_2 : IfxMultican.h
  • IfxMultican_DataLengthCode_20 : IfxMultican.h
  • IfxMultican_DataLengthCode_24 : IfxMultican.h
  • IfxMultican_DataLengthCode_3 : IfxMultican.h
  • IfxMultican_DataLengthCode_32 : IfxMultican.h
  • IfxMultican_DataLengthCode_4 : IfxMultican.h
  • IfxMultican_DataLengthCode_48 : IfxMultican.h
  • IfxMultican_DataLengthCode_5 : IfxMultican.h
  • IfxMultican_DataLengthCode_6 : IfxMultican.h
  • IfxMultican_DataLengthCode_64 : IfxMultican.h
  • IfxMultican_DataLengthCode_7 : IfxMultican.h
  • IfxMultican_DataLengthCode_8 : IfxMultican.h
  • IfxMultican_deinit() : IfxMultican.c , IfxMultican.h
  • IfxMultican_disableModule() : IfxMultican.h
  • IfxMultican_disableSleepMode() : IfxMultican.h
  • IfxMultican_enableModule() : IfxMultican.h
  • IfxMultican_enableSleepMode() : IfxMultican.h
  • IfxMultican_Frame : IfxMultican.h
  • IfxMultican_Frame_receive : IfxMultican.h
  • IfxMultican_Frame_remoteAnswer : IfxMultican.h
  • IfxMultican_Frame_remoteRequest : IfxMultican.h
  • IfxMultican_Frame_transmit : IfxMultican.h
  • IfxMultican_FrameCounterMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_bitTimingMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_errorCountMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_frameCountMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_timeStampMode : IfxMultican.h
  • IfxMultican_getAddress() : IfxMultican.c , IfxMultican.h
  • IfxMultican_getFractionalDividerMode() : IfxMultican.h
  • IfxMultican_getFractionalDividerStepValue() : IfxMultican.h
  • IfxMultican_getIndex() : IfxMultican.h , IfxMultican.c
  • IfxMultican_getInputClock() : IfxMultican.h
  • IfxMultican_getSrcPointer() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Index : IfxMultican_cfg.h
  • IfxMultican_Index_0 : IfxMultican_cfg.h
  • IfxMultican_Index_none : IfxMultican_cfg.h
  • IfxMultican_isModuleEnabled() : IfxMultican.h
  • IfxMultican_isModuleSuspended() : IfxMultican.h
  • IfxMultican_Message_init() : IfxMultican.h
  • IfxMultican_Message_longFrameInit() : IfxMultican.h
  • IfxMultican_MsgObj_cancelSend() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_clearDataRegisters() : IfxMultican.h
  • IfxMultican_MsgObj_clearFifoGatewayPointers() : IfxMultican.h
  • IfxMultican_MsgObj_clearRxPending() : IfxMultican.h
  • IfxMultican_MsgObj_clearStatusFlag() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_clearTxPending() : IfxMultican.h
  • IfxMultican_MsgObj_deinit() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_doReadLongFrame() : IfxMultican.c
  • IfxMultican_MsgObj_doReadMessage() : IfxMultican.c
  • IfxMultican_MsgObj_getBottomObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getDataLengthCode() : IfxMultican.h
  • IfxMultican_MsgObj_getMessageId() : IfxMultican.h
  • IfxMultican_MsgObj_getNextObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getPendingId() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_getPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getStatus() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_getStatusFlag() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_isExtendedFrame() : IfxMultican.h
  • IfxMultican_MsgObj_isRxPending() : IfxMultican.h
  • IfxMultican_MsgObj_isTransmitRequested() : IfxMultican.h
  • IfxMultican_MsgObj_isTxPending() : IfxMultican.h
  • IfxMultican_MsgObj_readLongFrame() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_readMessage() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_sendLongFrame() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_sendMessage() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_setAcceptanceMask() : IfxMultican.h
  • IfxMultican_MsgObj_setBitRateSwitch() : IfxMultican.h
  • IfxMultican_MsgObj_setBottomObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setCurrentObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setDataCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setDataLengthCode() : IfxMultican.h
  • IfxMultican_MsgObj_setDataLengthCodeCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setExtendedDataLength() : IfxMultican.h
  • IfxMultican_MsgObj_setFilter() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_setGatewayDataFrameSend() : IfxMultican.h
  • IfxMultican_MsgObj_setIdentifierCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setIdentifierExtension() : IfxMultican.h
  • IfxMultican_MsgObj_setMatchingId() : IfxMultican.h
  • IfxMultican_MsgObj_setMessageId() : IfxMultican.h
  • IfxMultican_MsgObj_setMessageMode() : IfxMultican.h
  • IfxMultican_MsgObj_setMessagePendingNumber() : IfxMultican.h
  • IfxMultican_MsgObj_setOverflowInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setPriorityClass() : IfxMultican.h
  • IfxMultican_MsgObj_setReceiveInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setReceiveInterruptNodePointer() : IfxMultican.h
  • IfxMultican_MsgObj_setRemoteMonitoring() : IfxMultican.h
  • IfxMultican_MsgObj_setSelectObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setSingleDataTransfer() : IfxMultican.h
  • IfxMultican_MsgObj_setSingleTransmitTrial() : IfxMultican.h
  • IfxMultican_MsgObj_setStatusFlag() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_setTopObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setTransmitInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setTransmitInterruptNodePointer() : IfxMultican.h
  • IfxMultican_MsgObj_writeTxfifo() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObjGroup : IfxMultican.h
  • IfxMultican_MsgObjGroup_0 : IfxMultican.h
  • IfxMultican_MsgObjGroup_1 : IfxMultican.h
  • IfxMultican_MsgObjGroup_2 : IfxMultican.h
  • IfxMultican_MsgObjGroup_3 : IfxMultican.h
  • IfxMultican_MsgObjGroup_4 : IfxMultican.h
  • IfxMultican_MsgObjGroup_5 : IfxMultican.h
  • IfxMultican_MsgObjGroup_6 : IfxMultican.h
  • IfxMultican_MsgObjGroup_7 : IfxMultican.h
  • IfxMultican_MsgObjId : IfxMultican.h
  • IfxMultican_MsgObjMode : IfxMultican.h
  • IfxMultican_MsgObjMode_canFD64 : IfxMultican.h
  • IfxMultican_MsgObjMode_gatewaySource : IfxMultican.h
  • IfxMultican_MsgObjMode_receiveFifoBase : IfxMultican.h
  • IfxMultican_MsgObjMode_standard : IfxMultican.h
  • IfxMultican_MsgObjMode_transmitFifoBase : IfxMultican.h
  • IfxMultican_MsgObjMode_transmitFifoSlave : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageDirection : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageLost : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageValid : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_newData : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveEnable : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receivePending : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveTransmitSelected : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveUpdating : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitEnable0 : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitEnable1 : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitPending : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitRequest : IfxMultican.h
  • IfxMultican_Node_activate() : IfxMultican.h
  • IfxMultican_Node_deactivate() : IfxMultican.h
  • IfxMultican_Node_deinit() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Node_disableConfigurationChange() : IfxMultican.h
  • IfxMultican_Node_enableConfigurationChange() : IfxMultican.h
  • IfxMultican_Node_getCodeFromDataLength() : IfxMultican.h
  • IfxMultican_Node_getDataLengthFromCode() : IfxMultican.h
  • IfxMultican_Node_getPointer() : IfxMultican.h
  • IfxMultican_Node_initRxPin() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_initTxPin() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Node_recoverBusOff() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_resetControlRegister() : IfxMultican.h
  • IfxMultican_Node_resetErrorCounters() : IfxMultican.h
  • IfxMultican_Node_resetInterruptPointers() : IfxMultican.h
  • IfxMultican_Node_setAlertInterrupt() : IfxMultican.h
  • IfxMultican_Node_setAlertInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setAnalyzerMode() : IfxMultican.h
  • IfxMultican_Node_setBitTiming() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_setErrorWarningLevel() : IfxMultican.h
  • IfxMultican_Node_setFastBitTiming() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Node_setFastNode() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterInterrupt() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterMode() : IfxMultican.h
  • IfxMultican_Node_setLastErrorCodeInterrupt() : IfxMultican.h
  • IfxMultican_Node_setLastErrorCodeInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setLoopBackMode() : IfxMultican.h
  • IfxMultican_Node_setNominalBitTiming() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_setReceiveErrorCounter() : IfxMultican.h
  • IfxMultican_Node_setTimerEventInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setTransceiverDelayCompensation() : IfxMultican.h
  • IfxMultican_Node_setTransceiverDelayCompensationOffset() : IfxMultican.h
  • IfxMultican_Node_setTransferInterrupt() : IfxMultican.h
  • IfxMultican_Node_setTransferInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setTransmitErrorCounter() : IfxMultican.h
  • IfxMultican_NodeId : IfxMultican_cfg.h
  • IfxMultican_NodeId_0 : IfxMultican_cfg.h
  • IfxMultican_NodeId_1 : IfxMultican_cfg.h
  • IfxMultican_NodeId_2 : IfxMultican_cfg.h
  • IfxMultican_NodeId_3 : IfxMultican_cfg.h
  • IfxMultican_NodeId_none : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_MESSAGE_OBJECTS : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_MODULES : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_NODES : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_SRC : IfxMultican_cfg.h
  • IFXMULTICAN_PINMAP_NUM_MODULES : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_NUM_NODES : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS : IfxMultican_PinMap.h
  • IfxMultican_Priority : IfxMultican.h
  • IfxMultican_Priority_CAN_ID : IfxMultican.h
  • IfxMultican_Priority_ListOrder : IfxMultican.h
  • IFXMULTICAN_R_NUM_SRC : IfxMultican_cfg.h
  • IfxMultican_resetModule() : IfxMultican.h , IfxMultican.c
  • IfxMultican_RXD0A_P02_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD0B_P20_7_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD0D_P02_4_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD0E_P33_7_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1A_P15_3_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1B_P14_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1D_P00_1_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_RXD2A_P15_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2B_P02_3_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_RXD2D_P14_8_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2E_P10_2_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3A_P00_3_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3B_P32_2_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3C_P20_0_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3D_P11_10_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3E_P20_9_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_Rxd_In_pinTable : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_setFractionalDividerMode() : IfxMultican.h
  • IfxMultican_setFractionalDividerStepValue() : IfxMultican.h
  • IfxMultican_setInputClock() : IfxMultican.h
  • IfxMultican_setListCommand() : IfxMultican.c , IfxMultican.h
  • IfxMultican_setMessageIndexMask() : IfxMultican.h
  • IfxMultican_setSleepMode() : IfxMultican.h
  • IfxMultican_setSuspendMode() : IfxMultican.h
  • IfxMultican_SleepMode : IfxMultican.h
  • IfxMultican_SleepMode_disable : IfxMultican.h
  • IfxMultican_SleepMode_enable : IfxMultican.h
  • IfxMultican_SrcId : IfxMultican_cfg.h
  • IfxMultican_SrcId_0 : IfxMultican_cfg.h
  • IfxMultican_SrcId_1 : IfxMultican_cfg.h
  • IfxMultican_SrcId_10 : IfxMultican_cfg.h
  • IfxMultican_SrcId_11 : IfxMultican_cfg.h
  • IfxMultican_SrcId_12 : IfxMultican_cfg.h
  • IfxMultican_SrcId_13 : IfxMultican_cfg.h
  • IfxMultican_SrcId_14 : IfxMultican_cfg.h
  • IfxMultican_SrcId_15 : IfxMultican_cfg.h
  • IfxMultican_SrcId_2 : IfxMultican_cfg.h
  • IfxMultican_SrcId_3 : IfxMultican_cfg.h
  • IfxMultican_SrcId_4 : IfxMultican_cfg.h
  • IfxMultican_SrcId_5 : IfxMultican_cfg.h
  • IfxMultican_SrcId_6 : IfxMultican_cfg.h
  • IfxMultican_SrcId_7 : IfxMultican_cfg.h
  • IfxMultican_SrcId_8 : IfxMultican_cfg.h
  • IfxMultican_SrcId_9 : IfxMultican_cfg.h
  • IfxMultican_Status : IfxMultican.h
  • IfxMultican_Status_busHeavy : IfxMultican.h
  • IfxMultican_Status_busOff : IfxMultican.h
  • IfxMultican_Status_messageLost : IfxMultican.h
  • IfxMultican_Status_newData : IfxMultican.h
  • IfxMultican_Status_newDataButOneLost : IfxMultican.h
  • IfxMultican_Status_notInitialised : IfxMultican.h
  • IfxMultican_Status_notSentBusy : IfxMultican.h
  • IfxMultican_Status_ok : IfxMultican.h
  • IfxMultican_Status_receiveEmpty : IfxMultican.h
  • IfxMultican_Status_wrongParam : IfxMultican.h
  • IfxMultican_Status_wrongPin : IfxMultican.h
  • IfxMultican_SuspendMode : IfxMultican.h
  • IfxMultican_SuspendMode_hard : IfxMultican.h
  • IfxMultican_SuspendMode_none : IfxMultican.h
  • IfxMultican_SuspendMode_soft : IfxMultican.h
  • IfxMultican_TXD0_P02_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD0_P02_5_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_TXD0_P20_8_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD0_P33_8_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD1_P00_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD1_P14_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD1_P15_2_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P02_2_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P10_3_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P14_10_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P15_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P00_2_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P11_12_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P20_10_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P20_3_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P32_3_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_Txd_Out_pinTable : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_waitListReady() : IfxMultican.h
  • IfxPort_cfg_esrMasks : IfxPort_cfg.c , IfxPort_cfg.h
  • IfxPort_cfg_indexMap : IfxPort_cfg.c , IfxPort_cfg.h
  • IfxPort_ControlledBy : IfxPort.h
  • IfxPort_ControlledBy_hsct : IfxPort.h
  • IfxPort_ControlledBy_port : IfxPort.h
  • IfxPort_disableEmergencyStop() : IfxPort.h , IfxPort.c
  • IfxPort_enableEmergencyStop() : IfxPort.h , IfxPort.c
  • IfxPort_getAddress() : IfxPort.c , IfxPort.h
  • IfxPort_getGroupState() : IfxPort.h
  • IfxPort_getIndex() : IfxPort.h , IfxPort.c
  • IfxPort_getPinState() : IfxPort.h
  • IfxPort_Index : IfxPort_cfg.h
  • IfxPort_Index_00 : IfxPort_cfg.h
  • IfxPort_Index_02 : IfxPort_cfg.h
  • IfxPort_Index_10 : IfxPort_cfg.h
  • IfxPort_Index_11 : IfxPort_cfg.h
  • IfxPort_Index_13 : IfxPort_cfg.h
  • IfxPort_Index_14 : IfxPort_cfg.h
  • IfxPort_Index_15 : IfxPort_cfg.h
  • IfxPort_Index_20 : IfxPort_cfg.h
  • IfxPort_Index_21 : IfxPort_cfg.h
  • IfxPort_Index_22 : IfxPort_cfg.h
  • IfxPort_Index_23 : IfxPort_cfg.h
  • IfxPort_Index_32 : IfxPort_cfg.h
  • IfxPort_Index_33 : IfxPort_cfg.h
  • IfxPort_Index_none : IfxPort_cfg.h
  • IfxPort_InputMode : IfxPort.h
  • IfxPort_InputMode_noPullDevice : IfxPort.h
  • IfxPort_InputMode_pullDown : IfxPort.h
  • IfxPort_InputMode_pullUp : IfxPort.h
  • IfxPort_InputMode_undefined : IfxPort.h
  • IfxPort_Io_initModule() : IfxPort_Io.h , IfxPort_Io.c
  • IfxPort_Mode : IfxPort.h
  • IfxPort_Mode_inputNoPullDevice : IfxPort.h
  • IfxPort_Mode_inputPullDown : IfxPort.h
  • IfxPort_Mode_inputPullUp : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt1 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt2 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt3 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt4 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt5 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt6 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt7 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainGeneral : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt1 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt2 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt3 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt4 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt5 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt6 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt7 : IfxPort.h
  • IfxPort_Mode_outputPushPullGeneral : IfxPort.h
  • IFXPORT_NUM_MODULES : IfxPort_cfg.h
  • IFXPORT_OUTOUTFEATURE_NONE : IfxPort_cfg.h
  • IfxPort_OutputIdx : IfxPort.h
  • IfxPort_OutputIdx_alt1 : IfxPort.h
  • IfxPort_OutputIdx_alt2 : IfxPort.h
  • IfxPort_OutputIdx_alt3 : IfxPort.h
  • IfxPort_OutputIdx_alt4 : IfxPort.h
  • IfxPort_OutputIdx_alt5 : IfxPort.h
  • IfxPort_OutputIdx_alt6 : IfxPort.h
  • IfxPort_OutputIdx_alt7 : IfxPort.h
  • IfxPort_OutputIdx_general : IfxPort.h
  • IfxPort_OutputMode : IfxPort.h
  • IfxPort_OutputMode_openDrain : IfxPort.h
  • IfxPort_OutputMode_pushPull : IfxPort.h
  • IfxPort_P00_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P00_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_12 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P15_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_13 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_9 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P22_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_11 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_5 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_7 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_PadDriver : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed1 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed2 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed3 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed4 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed1 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed2 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed3 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed4 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed1 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed2 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed3 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed4 : IfxPort.h
  • IfxPort_PadSupply : IfxPort.h
  • IfxPort_PadSupply_3v : IfxPort.h
  • IfxPort_PadSupply_5v : IfxPort.h
  • IfxPort_Pin_pinTable : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IFXPORT_PINMAP_NUM_MODULES : IfxPort_PinMap.h
  • IFXPORT_PINMAP_PIN_NUM_ITEMS : IfxPort_PinMap.h
  • IfxPort_resetESR() : IfxPort.h , IfxPort.c
  • IfxPort_setESR() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupModeInput() : IfxPort.h , IfxPort.c
  • IfxPort_setGroupModeOutput() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupPadDriver() : IfxPort.h , IfxPort.c
  • IfxPort_setGroupState() : IfxPort.h
  • IfxPort_setPinHigh() : IfxPort.h
  • IfxPort_setPinLow() : IfxPort.h
  • IfxPort_setPinMode() : IfxPort.c , IfxPort.h
  • IfxPort_setPinModeInput() : IfxPort.h
  • IfxPort_setPinModeLvdsHigh() : IfxPort.h , IfxPort.c
  • IfxPort_setPinModeLvdsMedium() : IfxPort.c , IfxPort.h
  • IfxPort_setPinModeOutput() : IfxPort.h
  • IfxPort_setPinPadDriver() : IfxPort.c , IfxPort.h
  • IfxPort_setPinState() : IfxPort.h
  • IfxPort_State : IfxPort.h
  • IfxPort_State_high : IfxPort.h
  • IfxPort_State_low : IfxPort.h
  • IfxPort_State_notChanged : IfxPort.h
  • IfxPort_State_toggled : IfxPort.h
  • IfxPort_togglePin() : IfxPort.h
  • IfxPsi5_AlternateInput : IfxPsi5.h
  • IfxPsi5_AlternateInput_0 : IfxPsi5.h
  • IfxPsi5_AlternateInput_1 : IfxPsi5.h
  • IfxPsi5_AlternateInput_2 : IfxPsi5.h
  • IfxPsi5_AlternateInput_3 : IfxPsi5.h
  • IfxPsi5_BaudRate : IfxPsi5.h
  • IfxPsi5_BaudRate_125 : IfxPsi5.h
  • IfxPsi5_BaudRate_189 : IfxPsi5.h
  • IfxPsi5_ChannelId : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_0 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_1 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_2 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_none : IfxPsi5_cfg.h
  • IfxPsi5_ClockType : IfxPsi5.h
  • IfxPsi5_ClockType_fastClock_189 : IfxPsi5.h
  • IfxPsi5_ClockType_fracDiv : IfxPsi5.h
  • IfxPsi5_ClockType_slowClock_125 : IfxPsi5.h
  • IfxPsi5_ClockType_timeStamp : IfxPsi5.h
  • IfxPsi5_CRCorParity : IfxPsi5.h
  • IfxPsi5_CRCorParity_crc : IfxPsi5.h
  • IfxPsi5_CRCorParity_parity : IfxPsi5.h
  • IFXPSI5_DEFAULT_FASTCLOCK_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_DEFAULT_TIMESTAMP_FREQ : IfxPsi5_cfg.h
  • IfxPsi5_DigitalInputFilterDepth : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_0 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_1 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_10 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_11 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_12 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_13 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_14 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_15 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_2 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_3 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_4 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_5 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_6 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_7 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_8 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_9 : IfxPsi5.h
  • IfxPsi5_disableModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_DividerMode : IfxPsi5.h
  • IfxPsi5_DividerMode_fractional : IfxPsi5.h
  • IfxPsi5_DividerMode_normal : IfxPsi5.h
  • IfxPsi5_DividerMode_off : IfxPsi5.h
  • IfxPsi5_DividerMode_spb : IfxPsi5.h
  • IFXPSI5_ENABLE_CHANNEL : IfxPsi5_cfg.h
  • IFXPSI5_ENABLE_CHANNELTRIGGER : IfxPsi5_cfg.h
  • IfxPsi5_enableAllChannels() : IfxPsi5.h
  • IfxPsi5_enableModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_highbitrate : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_lowbitrate : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_normal : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_timestamp : IfxPsi5.h
  • IfxPsi5_FrameExpectation : IfxPsi5.h
  • IfxPsi5_FrameExpectation_expected : IfxPsi5.h
  • IfxPsi5_FrameExpectation_notExpected : IfxPsi5.h
  • IfxPsi5_getSrcPointer() : IfxPsi5.h
  • IfxPsi5_getStatusCrci() : IfxPsi5.h
  • IfxPsi5_getStatusMei() : IfxPsi5.h
  • IfxPsi5_getStatusNbi() : IfxPsi5.h
  • IfxPsi5_getStatusNfi() : IfxPsi5.h
  • IfxPsi5_getStatusRdi() : IfxPsi5.h
  • IfxPsi5_getStatusRmi() : IfxPsi5.h
  • IfxPsi5_getStatusRsi() : IfxPsi5.h
  • IfxPsi5_getStatusTei() : IfxPsi5.h
  • IfxPsi5_initRxPin() : IfxPsi5.h
  • IfxPsi5_initTxPin() : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_0 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_1 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_2 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_3 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_4 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_5 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_6 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_7 : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister_a : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister_b : IfxPsi5.h
  • IfxPsi5_isModuleSuspended() : IfxPsi5.h
  • IfxPsi5_MessagingBits : IfxPsi5.h
  • IfxPsi5_MessagingBits_absent : IfxPsi5.h
  • IfxPsi5_MessagingBits_present : IfxPsi5.h
  • IFXPSI5_NUM_CHANNELS : IfxPsi5_cfg.h
  • IFXPSI5_NUM_MODULES : IfxPsi5_cfg.h
  • IFXPSI5_NUM_SLOTS : IfxPsi5_cfg.h
  • IFXPSI5_NUM_WDTS : IfxPsi5_cfg.h
  • IFXPSI5_PINMAP_NUM_CHANNELS : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_NUM_MODULES : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5_PinMap.h
  • IfxPsi5_Psi5_deInitModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_enableModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_getFracDivClock() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_initChannel() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initChannelConfig() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_initializeClock() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initModuleConfig() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_readChannelFrame() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_readChannelSerialMessage() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_resetModule() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_sendChannelData() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_startupChannel() : IfxPsi5_Psi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp_frame : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp_pulse : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_a : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_b : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_c : IfxPsi5.h
  • IfxPsi5_resetModule() : IfxPsi5.h , IfxPsi5.c
  • IfxPsi5_RX0A_P00_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX0B_P02_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX0C_P33_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1A_P00_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1B_P02_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1C_P33_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX2A_P00_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX2B_P02_7_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX2C_P33_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_Rx_In_pinTable : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_setFractionalDivider() : IfxPsi5.h
  • IfxPsi5_setRxInput() : IfxPsi5.h
  • IfxPsi5_setSuspendMode() : IfxPsi5.h
  • IfxPsi5_Slot : IfxPsi5.h
  • IfxPsi5_Slot_0 : IfxPsi5.h
  • IfxPsi5_Slot_1 : IfxPsi5.h
  • IfxPsi5_Slot_2 : IfxPsi5.h
  • IfxPsi5_Slot_3 : IfxPsi5.h
  • IfxPsi5_Slot_4 : IfxPsi5.h
  • IfxPsi5_Slot_5 : IfxPsi5.h
  • IFXPSI5_STEP_RANGE : IfxPsi5_cfg.h
  • IfxPsi5_SuspendMode : IfxPsi5.h
  • IfxPsi5_SuspendMode_hard : IfxPsi5.h
  • IfxPsi5_SuspendMode_none : IfxPsi5.h
  • IfxPsi5_SuspendMode_soft : IfxPsi5.h
  • IfxPsi5_TimeBase : IfxPsi5.h
  • IfxPsi5_TimeBase_external : IfxPsi5.h
  • IfxPsi5_TimeBase_internal : IfxPsi5.h
  • IfxPsi5_TimestampRegister : IfxPsi5.h
  • IfxPsi5_TimestampRegister_a : IfxPsi5.h
  • IfxPsi5_TimestampRegister_b : IfxPsi5.h
  • IfxPsi5_TimestampRegister_c : IfxPsi5.h
  • IfxPsi5_Trigger : IfxPsi5.h
  • IfxPsi5_Trigger_0 : IfxPsi5.h
  • IfxPsi5_Trigger_1 : IfxPsi5.h
  • IfxPsi5_Trigger_2 : IfxPsi5.h
  • IfxPsi5_Trigger_3 : IfxPsi5.h
  • IfxPsi5_Trigger_4 : IfxPsi5.h
  • IfxPsi5_Trigger_5 : IfxPsi5.h
  • IfxPsi5_TriggerType : IfxPsi5.h
  • IfxPsi5_TriggerType_bypass : IfxPsi5.h
  • IfxPsi5_TriggerType_external : IfxPsi5.h
  • IfxPsi5_TriggerType_periodic : IfxPsi5.h
  • IfxPsi5_TX0_P00_2_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX0_P02_2_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX0_P33_2_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX1_P00_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX1_P02_6_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX1_P33_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX2_P00_6_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX2_P02_8_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX2_P33_6_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_Tx_Out_pinTable : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_Verbose : IfxPsi5.h
  • IfxPsi5_Verbose_off : IfxPsi5.h
  • IfxPsi5_Verbose_on : IfxPsi5.h
  • IfxPsi5s_AlternateInput : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_0 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_1 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_2 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_3 : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar_divideBy2 : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar_divideBy3 : IfxPsi5s.h
  • IfxPsi5s_AscMode : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_7bitDataWithParity : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitData : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitDataWithParity : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitDataWithWakeup : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_9bitData : IfxPsi5s.h
  • IfxPsi5s_AscMode_sync : IfxPsi5s.h
  • IfxPsi5s_AscStopBits : IfxPsi5s.h
  • IfxPsi5s_AscStopBits_1 : IfxPsi5s.h
  • IfxPsi5s_AscStopBits_2 : IfxPsi5s.h
  • IFXPSI5S_BAUDRATE_1562500 : IfxPsi5s_cfg.h
  • IFXPSI5S_BG_RANGE : IfxPsi5s_cfg.h
  • IfxPsi5s_ChannelId : IfxPsi5s.h
  • IfxPsi5s_ChannelId_0 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_1 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_2 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_3 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_4 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_5 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_6 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_7 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_none : IfxPsi5s.h
  • IfxPsi5s_Clk_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_CLK_P02_4_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_CLK_P33_10_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_ClockType : IfxPsi5s.h
  • IfxPsi5s_ClockType_ascFracDiv : IfxPsi5s.h
  • IfxPsi5s_ClockType_ascOutput : IfxPsi5s.h
  • IfxPsi5s_ClockType_fracDiv : IfxPsi5s.h
  • IfxPsi5s_ClockType_timeStamp : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity_crc : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity_parity : IfxPsi5s.h
  • IFXPSI5S_DEFAULT_FASTCLOCK_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_TIMESTAMP_FREQ : IfxPsi5s_cfg.h
  • IfxPsi5s_disableAscReceiver() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_disableModule() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_DividerMode : IfxPsi5s.h
  • IfxPsi5s_DividerMode_fractional : IfxPsi5s.h
  • IfxPsi5s_DividerMode_normal : IfxPsi5s.h
  • IfxPsi5s_DividerMode_off : IfxPsi5s.h
  • IfxPsi5s_DividerMode_spb : IfxPsi5s.h
  • IFXPSI5S_ENABLE_CHANNEL : IfxPsi5s_cfg.h
  • IFXPSI5S_ENABLE_CHANNELTRIGGER : IfxPsi5s_cfg.h
  • IfxPsi5s_enableAscReceiver() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableDisableChannels() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableDisableChannelTriggerCounters() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_EnhancedProtocol : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_toothGapMethod : IfxPsi5s.h
  • IFXPSI5S_FDV_RANGE : IfxPsi5s_cfg.h
  • IfxPsi5s_FrameId : IfxPsi5s.h
  • IfxPsi5s_FrameId_frameHeader : IfxPsi5s.h
  • IfxPsi5s_FrameId_rollingNumber : IfxPsi5s.h
  • IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK : IfxPsi5s_cfg.h
  • IFXPSI5S_GCR_CHANNELS_ENABLE_MASK : IfxPsi5s_cfg.h
  • IfxPsi5s_getReadFrameStatus() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_getSuccessfullyReceivedFrameStatus() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_IdleTime : IfxPsi5s.h
  • IfxPsi5s_IdleTime_1 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_10 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_11 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_12 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_13 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_14 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_15 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_16 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_2 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_3 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_4 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_5 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_6 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_7 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_8 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_9 : IfxPsi5s.h
  • IfxPsi5s_initClkPin() : IfxPsi5s.h
  • IfxPsi5s_initRxPin() : IfxPsi5s.h
  • IfxPsi5s_initTxPin() : IfxPsi5s.h
  • IfxPsi5s_isModuleSuspended() : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode_disable : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode_enable : IfxPsi5s.h
  • IfxPsi5s_MessagingBits : IfxPsi5s.h
  • IfxPsi5s_MessagingBits_absent : IfxPsi5s.h
  • IfxPsi5s_MessagingBits_present : IfxPsi5s.h
  • IFXPSI5S_NUM_CHANNELS : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_MODULES : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_SLOTS : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_WDTS : IfxPsi5s_cfg.h
  • IfxPsi5s_NumberExpectedFrames : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_1 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_2 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_3 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_4 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_5 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_6 : IfxPsi5s.h
  • IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_NUM_MODULES : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IfxPsi5s_Psi5s_deInitModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_enableAscReceiver() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableDisableChannels() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_getFracDivClock() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_getReadFrameStatus() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initChannel() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initChannelConfig() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initializeClock() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_initModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initModuleConfig() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_readFrame() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_resetModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_sendChannelData() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_setBaudrate() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_startAscTransactions() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_resetModule() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_Rx_In_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_RXA_P00_3_IN : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_RXB_P02_5_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_RXC_P33_5_IN : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_setRxInput() : IfxPsi5s.h
  • IfxPsi5s_setSleepMode() : IfxPsi5s.h
  • IfxPsi5s_setSuspendMode() : IfxPsi5s.h
  • IfxPsi5s_SleepMode : IfxPsi5s.h
  • IfxPsi5s_SleepMode_disable : IfxPsi5s.h
  • IfxPsi5s_SleepMode_enable : IfxPsi5s.h
  • IfxPsi5s_startAscTransactions() : IfxPsi5s.c , IfxPsi5s.h
  • IFXPSI5S_STEP_RANGE : IfxPsi5s_cfg.h
  • IfxPsi5s_stopAscTransactions() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_SuspendMode : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_hard : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_none : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_soft : IfxPsi5s.h
  • IfxPsi5s_TimeBase : IfxPsi5s.h
  • IfxPsi5s_TimeBase_external : IfxPsi5s.h
  • IfxPsi5s_TimeBase_internal : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister_a : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister_b : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger_frame : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger_syncPulse : IfxPsi5s.h
  • IfxPsi5s_Trigger : IfxPsi5s.h
  • IfxPsi5s_Trigger_0 : IfxPsi5s.h
  • IfxPsi5s_Trigger_1 : IfxPsi5s.h
  • IfxPsi5s_Trigger_2 : IfxPsi5s.h
  • IfxPsi5s_Trigger_3 : IfxPsi5s.h
  • IfxPsi5s_Trigger_4 : IfxPsi5s.h
  • IfxPsi5s_Trigger_5 : IfxPsi5s.h
  • IfxPsi5s_Trigger_6 : IfxPsi5s.h
  • IfxPsi5s_Trigger_7 : IfxPsi5s.h
  • IfxPsi5s_TriggerType : IfxPsi5s.h
  • IfxPsi5s_TriggerType_external : IfxPsi5s.h
  • IfxPsi5s_TriggerType_periodic : IfxPsi5s.h
  • IfxPsi5s_Tx_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_TX_P00_4_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_TX_P02_6_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_TX_P33_6_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_UartFrameCount : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_3 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_4 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_5 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_6 : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode_frame : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode_syncPulse : IfxPsi5s.h
  • IfxQspi0_MRST_P20_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MRSTA_P20_12_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSR_P20_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MTSR_P20_14_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSRA_P20_14_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLK_P20_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SCLK_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLKA_P20_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSIA_P20_13_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSIB_P20_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO0_P20_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO13_P15_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO3_P11_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO6_P20_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO7_P33_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO8_P20_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P10_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MRST_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P11_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRSTA_P10_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRSTB_P11_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSR_P10_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P10_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSR_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P11_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSRA_P10_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSRB_P11_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSRC_P10_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLK_P10_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SCLK_P11_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLKA_P10_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SCLKB_P11_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSIA_P11_10_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO0_P20_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO10_P10_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO2_P20_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO3_P11_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO4_P11_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO6_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO7_P33_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO8_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO9_P10_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_HSICINA_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_HSICINB_P15_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRST_P15_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRST_P15_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRSTA_P15_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTB_P15_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRSTCN_P21_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRSTCP_P21_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRSTE_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSR_P15_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSR_P15_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRA_P15_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSRB_P15_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSRN_P13_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSRP_P13_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLK_P15_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLK_P15_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLK_P15_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLKA_P15_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKB_P15_8_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLKN_P13_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKP_P13_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSIA_P15_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSIB_P15_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO0_P15_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO1_P14_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO2_P14_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO3_P14_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO4_P14_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO5_P15_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO6_P33_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO7_P20_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO8_P20_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_HSICINA_P33_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_HSICINB_P33_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P02_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRST_P10_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P22_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P33_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTA_P02_5_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRSTB_P10_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTD_P33_13_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRSTE_P22_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTFN_P21_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTFP_P21_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSR_P02_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSR_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSR_P22_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSR_P33_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRA_P02_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRB_P10_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRD_P33_12_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRE_P22_0_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRN_P22_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRP_P22_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLK_P02_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLK_P10_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLK_P22_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLK_P33_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKA_P02_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKB_P10_8_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKD_P33_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKE_P22_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKN_P22_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLKP_P22_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSIA_P02_4_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSIC_P33_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSID_P22_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO0_P02_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO11_P33_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO12_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO13_P23_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO1_P02_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO1_P33_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO2_P02_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO2_P33_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO3_P02_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO4_P02_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO4_P23_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO5_P02_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO5_P23_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO6_P00_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO7_P00_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO7_P33_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO8_P10_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IFXQSPI_BACONSIZE : IfxQspi.h
  • IfxQspi_calcRealBaudrate() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateBasicConfigurationValue() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateDelayConstants() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateExtendedConfigurationValue() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculatePrescaler() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateTimeQuantumLength() : IfxQspi.c , IfxQspi.h
  • IfxQspi_cfg_indexMap : IfxQspi_cfg.c , IfxQspi_cfg.h
  • IfxQspi_ChannelId : IfxQspi.h
  • IfxQspi_ChannelId_0 : IfxQspi.h
  • IfxQspi_ChannelId_1 : IfxQspi.h
  • IfxQspi_ChannelId_10 : IfxQspi.h
  • IfxQspi_ChannelId_11 : IfxQspi.h
  • IfxQspi_ChannelId_12 : IfxQspi.h
  • IfxQspi_ChannelId_13 : IfxQspi.h
  • IfxQspi_ChannelId_14 : IfxQspi.h
  • IfxQspi_ChannelId_2 : IfxQspi.h
  • IfxQspi_ChannelId_3 : IfxQspi.h
  • IfxQspi_ChannelId_4 : IfxQspi.h
  • IfxQspi_ChannelId_5 : IfxQspi.h
  • IfxQspi_ChannelId_6 : IfxQspi.h
  • IfxQspi_ChannelId_7 : IfxQspi.h
  • IfxQspi_ChannelId_8 : IfxQspi.h
  • IfxQspi_ChannelId_9 : IfxQspi.h
  • IfxQspi_clearAllEventFlags() : IfxQspi.h
  • IfxQspi_clearRxReq() : IfxQspi.h
  • IfxQspi_clearTxReq() : IfxQspi.h
  • IfxQspi_configPT1Event() : IfxQspi.h
  • IfxQspi_configPT2Event() : IfxQspi.h
  • IfxQspi_DataLengthUnit : IfxQspi.h
  • IfxQspi_DataLengthUnit_bit : IfxQspi.h
  • IfxQspi_DataLengthUnit_byte : IfxQspi.h
  • IfxQspi_enableLoopbackMode() : IfxQspi.h
  • IfxQspi_enablePT1Event() : IfxQspi.h
  • IfxQspi_enablePT2Event() : IfxQspi.h
  • IfxQspi_enableUsrEvent() : IfxQspi.h
  • IfxQspi_Error : IfxQspi.h
  • IfxQspi_Error_baudrate : IfxQspi.h
  • IfxQspi_Error_configuration : IfxQspi.h
  • IfxQspi_Error_expectTimeout : IfxQspi.h
  • IfxQspi_Error_none : IfxQspi.h
  • IfxQspi_Error_parity : IfxQspi.h
  • IfxQspi_Error_rxfifoOverflow : IfxQspi.h
  • IfxQspi_Error_rxfifoUnderflow : IfxQspi.h
  • IfxQspi_Error_slsiMisplacedInactivation : IfxQspi.h
  • IfxQspi_Error_txfifoOverflow : IfxQspi.h
  • IfxQspi_Error_txfifoUnderflow : IfxQspi.h
  • IFXQSPI_ERRORENABLEMASK : IfxQspi.h
  • IfxQspi_ExpectTimeout : IfxQspi.h
  • IfxQspi_ExpectTimeout_1024 : IfxQspi.h
  • IfxQspi_ExpectTimeout_1048576 : IfxQspi.h
  • IfxQspi_ExpectTimeout_128 : IfxQspi.h
  • IfxQspi_ExpectTimeout_131072 : IfxQspi.h
  • IfxQspi_ExpectTimeout_16384 : IfxQspi.h
  • IfxQspi_ExpectTimeout_2048 : IfxQspi.h
  • IfxQspi_ExpectTimeout_2097152 : IfxQspi.h
  • IfxQspi_ExpectTimeout_256 : IfxQspi.h
  • IfxQspi_ExpectTimeout_262144 : IfxQspi.h
  • IfxQspi_ExpectTimeout_32768 : IfxQspi.h
  • IfxQspi_ExpectTimeout_4096 : IfxQspi.h
  • IfxQspi_ExpectTimeout_512 : IfxQspi.h
  • IfxQspi_ExpectTimeout_524288 : IfxQspi.h
  • IfxQspi_ExpectTimeout_64 : IfxQspi.h
  • IfxQspi_ExpectTimeout_65536 : IfxQspi.h
  • IfxQspi_ExpectTimeout_8192 : IfxQspi.h
  • IFXQSPI_FIFO32BITSIZE : IfxQspi.h
  • IfxQspi_FifoMode : IfxQspi.h
  • IfxQspi_FifoMode_batchMove : IfxQspi.h
  • IfxQspi_FifoMode_combinedMove : IfxQspi.h
  • IfxQspi_FifoMode_singleMove : IfxQspi.h
  • IfxQspi_getAddress() : IfxQspi.c , IfxQspi.h
  • IfxQspi_getErrorFlags() : IfxQspi.h
  • IfxQspi_getErrorSrc() : IfxQspi.h
  • IfxQspi_getIndex() : IfxQspi.c , IfxQspi.h
  • IFXQSPI_GETLONGMODEFIFOSIZE : IfxQspi.h
  • IfxQspi_getMode() : IfxQspi.h
  • IfxQspi_getModuleFrequency() : IfxQspi.h
  • IfxQspi_getPhase() : IfxQspi.h
  • IfxQspi_getReceiveFifoLevel() : IfxQspi.h
  • IfxQspi_getReceiveSrc() : IfxQspi.h
  • IfxQspi_getRxFifoMode() : IfxQspi.h
  • IfxQspi_getTimeQuantaFrequency() : IfxQspi.h
  • IfxQspi_getTransmitFifoLevel() : IfxQspi.h
  • IfxQspi_getTransmitSrc() : IfxQspi.h
  • IfxQspi_getTxFifoMode() : IfxQspi.h
  • IfxQspi_Hsicin_In_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IFXQSPI_HWFIFO_DEPTH : IfxQspi_cfg.h
  • IfxQspi_Index : IfxQspi_cfg.h
  • IfxQspi_Index_0 : IfxQspi_cfg.h
  • IfxQspi_Index_1 : IfxQspi_cfg.h
  • IfxQspi_Index_2 : IfxQspi_cfg.h
  • IfxQspi_Index_3 : IfxQspi_cfg.h
  • IfxQspi_Index_none : IfxQspi_cfg.h
  • IfxQspi_initMrstInPin() : IfxQspi.h
  • IfxQspi_initMrstInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initMrstOutPin() : IfxQspi.h
  • IfxQspi_initMtsrInPin() : IfxQspi.h
  • IfxQspi_initMtsrInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initMtsrOutPin() : IfxQspi.h
  • IfxQspi_initSclkInPin() : IfxQspi.h
  • IfxQspi_initSclkInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initSclkOutPin() : IfxQspi.h
  • IfxQspi_initSlsi() : IfxQspi.h
  • IfxQspi_initSlsiWithPadLevel() : IfxQspi.h
  • IfxQspi_initSlso() : IfxQspi.h
  • IfxQspi_isModuleEnabled() : IfxQspi.h
  • IfxQspi_isModuleSuspended() : IfxQspi.h
  • IfxQspi_Mode : IfxQspi.h
  • IfxQspi_Mode_master : IfxQspi.h
  • IfxQspi_Mode_pwmOverQspi : IfxQspi.h
  • IfxQspi_Mode_slave : IfxQspi.h
  • IfxQspi_Mrst_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mrst_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mtsr_In_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Mtsr_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IFXQSPI_NUM_CHANNELS : IfxQspi_cfg.h
  • IFXQSPI_NUM_MODULES : IfxQspi_cfg.h
  • IfxQspi_pause() : IfxQspi.h
  • IfxQspi_PauseRunTransition : IfxQspi.h
  • IfxQspi_PauseRunTransition_pause : IfxQspi.h
  • IfxQspi_PauseRunTransition_run : IfxQspi.h
  • IfxQspi_permutateBigEndian() : IfxQspi.h
  • IfxQspi_Phase : IfxQspi.h
  • IfxQspi_Phase_data : IfxQspi.h
  • IfxQspi_Phase_expect : IfxQspi.h
  • IfxQspi_Phase_idleA : IfxQspi.h
  • IfxQspi_Phase_idleB : IfxQspi.h
  • IfxQspi_Phase_lead : IfxQspi.h
  • IfxQspi_Phase_leadStrobe : IfxQspi.h
  • IfxQspi_Phase_trail : IfxQspi.h
  • IfxQspi_Phase_trailStrobe : IfxQspi.h
  • IfxQspi_Phase_wait : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_dataNotAvailable : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfExpect : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfFrame : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfWait : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_receiveBufferFilled : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_serialClockPolarityChange : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_startOfFrame : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_transmitBufferEmptied : IfxQspi.h
  • IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_NUM_MODULES : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_NUM_SLAVESELECTS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IfxQspi_read16() : IfxQspi.h , IfxQspi.c
  • IfxQspi_read32() : IfxQspi.c , IfxQspi.h
  • IfxQspi_read8() : IfxQspi.h , IfxQspi.c
  • IfxQspi_readReceiveFifo() : IfxQspi.h
  • IfxQspi_recalcBasicConfiguration() : IfxQspi.c , IfxQspi.h
  • IfxQspi_requestReset() : IfxQspi.h
  • IfxQspi_Reset : IfxQspi.h
  • IfxQspi_Reset_kernel : IfxQspi.h
  • IfxQspi_Reset_none : IfxQspi.h
  • IfxQspi_Reset_stateMachineAndFifo : IfxQspi.h
  • IfxQspi_resetModule() : IfxQspi.c , IfxQspi.h
  • IfxQspi_run() : IfxQspi.h
  • IfxQspi_RxFifoInt : IfxQspi.h
  • IfxQspi_RxFifoInt_0 : IfxQspi.h
  • IfxQspi_RxFifoInt_1 : IfxQspi.h
  • IfxQspi_RxFifoInt_2 : IfxQspi.h
  • IfxQspi_RxFifoInt_3 : IfxQspi.h
  • IfxQspi_Sclk_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Sclk_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_setBitsegment1() : IfxQspi.h
  • IfxQspi_setBitsegment2() : IfxQspi.h
  • IfxQspi_setBitsegment3() : IfxQspi.h
  • IfxQspi_setDisableModuleRequest() : IfxQspi.h
  • IfxQspi_setEnableModuleRequest() : IfxQspi.h
  • IfxQspi_setReceiveFifoInterrruptThreshold() : IfxQspi.h
  • IfxQspi_setRxFifoMode() : IfxQspi.h
  • IfxQspi_setSlaveSelectOutputControl() : IfxQspi.c , IfxQspi.h
  • IfxQspi_setSleepMode() : IfxQspi.h
  • IfxQspi_setSuspendMode() : IfxQspi.h
  • IfxQspi_setTimeQuantum() : IfxQspi.h
  • IfxQspi_setTransmitFifoInterrruptThreshold() : IfxQspi.h
  • IfxQspi_setTxFifoMode() : IfxQspi.h
  • IfxQspi_SleepMode : IfxQspi.h
  • IfxQspi_SleepMode_disable : IfxQspi.h
  • IfxQspi_SleepMode_enable : IfxQspi.h
  • IfxQspi_Slsi_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Slso_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_SpiMaster_activateSlso() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_activeChannel() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_AutoSlso : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Channel : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_ChannelBasedCs : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_ChannelBasedCs_disabled : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_ChannelBasedCs_enabled : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_deactivateSlso() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_exchange() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_getChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_getStatus() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initChannel() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initModule() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initModuleConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrDmaReceive() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrDmaTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrError() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrPhaseTransition() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrReceive() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrUserDefined() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_lock() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_Mode : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_long : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_longContinuous : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_short : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_shortContinuous : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_xxl : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_packLongModeBuffer() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_read() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_readReceiveFifo() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_setChannelBaudrate() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_unlock() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_write() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_writeBasicConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeExtendedConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeLong() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_writeMixedDataConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeTransmitFifo() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiSlave_dummyRxValue : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_dummyTxValue : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_exchange() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_getStatus() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_initModule() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_initModuleConfig() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrDmaReceive() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_isrDmaTransmit() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrError() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_isrReceive() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrTransmit() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_read() : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_readReceiveFifo() : IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_write() : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_writeTransmitFifo() : IfxQspi_SpiSlave.h
  • IfxQspi_StrobeDelay : IfxQspi.h
  • IfxQspi_StrobeDelay_1 : IfxQspi.h
  • IfxQspi_StrobeDelay_10 : IfxQspi.h
  • IfxQspi_StrobeDelay_11 : IfxQspi.h
  • IfxQspi_StrobeDelay_12 : IfxQspi.h
  • IfxQspi_StrobeDelay_13 : IfxQspi.h
  • IfxQspi_StrobeDelay_14 : IfxQspi.h
  • IfxQspi_StrobeDelay_15 : IfxQspi.h
  • IfxQspi_StrobeDelay_16 : IfxQspi.h
  • IfxQspi_StrobeDelay_17 : IfxQspi.h
  • IfxQspi_StrobeDelay_18 : IfxQspi.h
  • IfxQspi_StrobeDelay_19 : IfxQspi.h
  • IfxQspi_StrobeDelay_2 : IfxQspi.h
  • IfxQspi_StrobeDelay_20 : IfxQspi.h
  • IfxQspi_StrobeDelay_21 : IfxQspi.h
  • IfxQspi_StrobeDelay_22 : IfxQspi.h
  • IfxQspi_StrobeDelay_23 : IfxQspi.h
  • IfxQspi_StrobeDelay_24 : IfxQspi.h
  • IfxQspi_StrobeDelay_25 : IfxQspi.h
  • IfxQspi_StrobeDelay_26 : IfxQspi.h
  • IfxQspi_StrobeDelay_27 : IfxQspi.h
  • IfxQspi_StrobeDelay_28 : IfxQspi.h
  • IfxQspi_StrobeDelay_29 : IfxQspi.h
  • IfxQspi_StrobeDelay_3 : IfxQspi.h
  • IfxQspi_StrobeDelay_30 : IfxQspi.h
  • IfxQspi_StrobeDelay_31 : IfxQspi.h
  • IfxQspi_StrobeDelay_32 : IfxQspi.h
  • IfxQspi_StrobeDelay_4 : IfxQspi.h
  • IfxQspi_StrobeDelay_5 : IfxQspi.h
  • IfxQspi_StrobeDelay_6 : IfxQspi.h
  • IfxQspi_StrobeDelay_7 : IfxQspi.h
  • IfxQspi_StrobeDelay_8 : IfxQspi.h
  • IfxQspi_StrobeDelay_9 : IfxQspi.h
  • IfxQspi_SuspendMode : IfxQspi.h
  • IfxQspi_SuspendMode_hard : IfxQspi.h
  • IfxQspi_SuspendMode_none : IfxQspi.h
  • IfxQspi_SuspendMode_soft : IfxQspi.h
  • IfxQspi_TxFifoInt : IfxQspi.h
  • IfxQspi_TxFifoInt_1 : IfxQspi.h
  • IfxQspi_TxFifoInt_2 : IfxQspi.h
  • IfxQspi_TxFifoInt_3 : IfxQspi.h
  • IfxQspi_TxFifoInt_4 : IfxQspi.h
  • IfxQspi_write16() : IfxQspi.c , IfxQspi.h
  • IfxQspi_write32() : IfxQspi.c , IfxQspi.h
  • IfxQspi_write8() : IfxQspi.c , IfxQspi.h
  • IfxQspi_writeBasicConfiguration() : IfxQspi.h
  • IfxQspi_writeBasicConfigurationBeginStream() : IfxQspi.h
  • IfxQspi_writeBasicConfigurationEndStream() : IfxQspi.h
  • IfxQspi_writeExtendedConfiguration() : IfxQspi.h
  • IfxQspi_writeMixedDataTransmitFifo() : IfxQspi.h
  • IfxQspi_writeTransmitFifo() : IfxQspi.h
  • IfxScu_CCUCON0_CLKSEL : IfxScu_cfg.h
  • IfxScu_CCUCON0_CLKSEL_fBack : IfxScu_cfg.h
  • IfxScu_CCUCON0_CLKSEL_fPll : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL_fOsc0 : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL_fOsc1 : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CLK_DISTRIBUTION : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_MSK : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_FREQ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_XTAL_FREQ : IfxScu_cfg.h
  • IfxScu_Dcdcsync_Out_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_DCDCSYNC_P32_2_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_DCDCSYNC_P33_13_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_Emgstop_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EMGSTOPA_P33_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EMGSTOPB_P21_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IFXSCU_EVR_OSC_FREQUENCY : IfxScu_cfg.h
  • IfxScu_Evrwup_In_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EVRWUPA_P14_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EVRWUPB_P15_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK0_P23_1_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK1_P11_12_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK1_P32_4_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_Extclk_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG0DCLDO_P14_6_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG1EVR33_P14_5_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG2EVR13_P14_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG3_BMI_P14_3_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG4_P10_5_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG5_P10_6_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG6_P14_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Hwcfg_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_NUM_MODULES : IfxScu_PinMap.h
  • IFXSCU_PINMAP_NUM_REQUESTS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_REQ_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PLL_FREERUNNING_FREQUENCY : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Idle : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Run : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Sleep : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Stby : IfxScu_cfg.h
  • IfxScu_REQ0_P15_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ10_P14_3_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ11_P20_9_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ12_P11_10_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ13_P15_5_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ14_P02_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ15_P14_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ16_P15_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ1_P15_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ2_P10_2_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ3_P10_3_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ4_P10_7_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ5_P10_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ6_P02_0_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ7_P00_4_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ8_P33_7_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ9_P20_0_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_Req_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IFXSCU_VCO_BASE_FREQUENCY : IfxScu_cfg.h
  • IfxScu_WDT0LCK_P20_8_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_WDT1LCK_P20_7_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_WDTCON1_IR : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy16384 : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy256 : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy64 : IfxScu_cfg.h
  • IfxScu_Wdtlck_Out_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_WDTSLCK_P20_9_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScuCcu_aDefaultPllConfigSteps : IfxScuCcu.c
  • IfxScuCcu_calculateSysPllDividers() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_defaultClockConfig : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_defaultErayPllConfig : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getBaud1Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getBaud2Frequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getBbbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getCanFrequency() : IfxScuCcu.h
  • IfxScuCcu_getCpuFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getEvrFrequency() : IfxScuCcu.h
  • IfxScuCcu_getFsi2Frequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getFsiFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getGtmFrequency() : IfxScuCcu.h
  • IfxScuCcu_getMaxFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getModuleFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getOsc0Frequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getOscFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getPll2ErayFrequency() : IfxScuCcu.h
  • IfxScuCcu_getPll2Frequency() : IfxScuCcu.h
  • IfxScuCcu_getPllErayFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getPllErayVcoFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getPllFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getPllVcoFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getSourceFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getSourceSelection() : IfxScuCcu.h
  • IfxScuCcu_getSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getSriFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getStmFrequency() : IfxScuCcu.h
  • IfxScuCcu_init() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_initConfig() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_initErayPll() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_initErayPllConfig() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_isOscillatorStable() : IfxScuCcu.c
  • IfxScuCcu_K1divider : IfxScuCcu.h
  • IfxScuCcu_K1divider_1 : IfxScuCcu.h
  • IfxScuCcu_K1divider_10 : IfxScuCcu.h
  • IfxScuCcu_K1divider_100 : IfxScuCcu.h
  • IfxScuCcu_K1divider_101 : IfxScuCcu.h
  • IfxScuCcu_K1divider_102 : IfxScuCcu.h
  • IfxScuCcu_K1divider_103 : IfxScuCcu.h
  • IfxScuCcu_K1divider_104 : IfxScuCcu.h
  • IfxScuCcu_K1divider_105 : IfxScuCcu.h
  • IfxScuCcu_K1divider_106 : IfxScuCcu.h
  • IfxScuCcu_K1divider_107 : IfxScuCcu.h
  • IfxScuCcu_K1divider_108 : IfxScuCcu.h
  • IfxScuCcu_K1divider_109 : IfxScuCcu.h
  • IfxScuCcu_K1divider_11 : IfxScuCcu.h
  • IfxScuCcu_K1divider_110 : IfxScuCcu.h
  • IfxScuCcu_K1divider_111 : IfxScuCcu.h
  • IfxScuCcu_K1divider_112 : IfxScuCcu.h
  • IfxScuCcu_K1divider_113 : IfxScuCcu.h
  • IfxScuCcu_K1divider_114 : IfxScuCcu.h
  • IfxScuCcu_K1divider_115 : IfxScuCcu.h
  • IfxScuCcu_K1divider_116 : IfxScuCcu.h
  • IfxScuCcu_K1divider_117 : IfxScuCcu.h
  • IfxScuCcu_K1divider_118 : IfxScuCcu.h
  • IfxScuCcu_K1divider_119 : IfxScuCcu.h
  • IfxScuCcu_K1divider_12 : IfxScuCcu.h
  • IfxScuCcu_K1divider_120 : IfxScuCcu.h
  • IfxScuCcu_K1divider_121 : IfxScuCcu.h
  • IfxScuCcu_K1divider_122 : IfxScuCcu.h
  • IfxScuCcu_K1divider_123 : IfxScuCcu.h
  • IfxScuCcu_K1divider_124 : IfxScuCcu.h
  • IfxScuCcu_K1divider_125 : IfxScuCcu.h
  • IfxScuCcu_K1divider_126 : IfxScuCcu.h
  • IfxScuCcu_K1divider_127 : IfxScuCcu.h
  • IfxScuCcu_K1divider_128 : IfxScuCcu.h
  • IfxScuCcu_K1divider_13 : IfxScuCcu.h
  • IfxScuCcu_K1divider_14 : IfxScuCcu.h
  • IfxScuCcu_K1divider_15 : IfxScuCcu.h
  • IfxScuCcu_K1divider_16 : IfxScuCcu.h
  • IfxScuCcu_K1divider_17 : IfxScuCcu.h
  • IfxScuCcu_K1divider_18 : IfxScuCcu.h
  • IfxScuCcu_K1divider_19 : IfxScuCcu.h
  • IfxScuCcu_K1divider_2 : IfxScuCcu.h
  • IfxScuCcu_K1divider_20 : IfxScuCcu.h
  • IfxScuCcu_K1divider_21 : IfxScuCcu.h
  • IfxScuCcu_K1divider_22 : IfxScuCcu.h
  • IfxScuCcu_K1divider_23 : IfxScuCcu.h
  • IfxScuCcu_K1divider_24 : IfxScuCcu.h
  • IfxScuCcu_K1divider_25 : IfxScuCcu.h
  • IfxScuCcu_K1divider_26 : IfxScuCcu.h
  • IfxScuCcu_K1divider_27 : IfxScuCcu.h
  • IfxScuCcu_K1divider_28 : IfxScuCcu.h
  • IfxScuCcu_K1divider_29 : IfxScuCcu.h
  • IfxScuCcu_K1divider_3 : IfxScuCcu.h
  • IfxScuCcu_K1divider_30 : IfxScuCcu.h
  • IfxScuCcu_K1divider_31 : IfxScuCcu.h
  • IfxScuCcu_K1divider_32 : IfxScuCcu.h
  • IfxScuCcu_K1divider_33 : IfxScuCcu.h
  • IfxScuCcu_K1divider_34 : IfxScuCcu.h
  • IfxScuCcu_K1divider_35 : IfxScuCcu.h
  • IfxScuCcu_K1divider_36 : IfxScuCcu.h
  • IfxScuCcu_K1divider_37 : IfxScuCcu.h
  • IfxScuCcu_K1divider_38 : IfxScuCcu.h
  • IfxScuCcu_K1divider_39 : IfxScuCcu.h
  • IfxScuCcu_K1divider_4 : IfxScuCcu.h
  • IfxScuCcu_K1divider_40 : IfxScuCcu.h
  • IfxScuCcu_K1divider_41 : IfxScuCcu.h
  • IfxScuCcu_K1divider_42 : IfxScuCcu.h
  • IfxScuCcu_K1divider_43 : IfxScuCcu.h
  • IfxScuCcu_K1divider_44 : IfxScuCcu.h
  • IfxScuCcu_K1divider_45 : IfxScuCcu.h
  • IfxScuCcu_K1divider_46 : IfxScuCcu.h
  • IfxScuCcu_K1divider_47 : IfxScuCcu.h
  • IfxScuCcu_K1divider_48 : IfxScuCcu.h
  • IfxScuCcu_K1divider_49 : IfxScuCcu.h
  • IfxScuCcu_K1divider_5 : IfxScuCcu.h
  • IfxScuCcu_K1divider_50 : IfxScuCcu.h
  • IfxScuCcu_K1divider_51 : IfxScuCcu.h
  • IfxScuCcu_K1divider_52 : IfxScuCcu.h
  • IfxScuCcu_K1divider_53 : IfxScuCcu.h
  • IfxScuCcu_K1divider_54 : IfxScuCcu.h
  • IfxScuCcu_K1divider_55 : IfxScuCcu.h
  • IfxScuCcu_K1divider_56 : IfxScuCcu.h
  • IfxScuCcu_K1divider_57 : IfxScuCcu.h
  • IfxScuCcu_K1divider_58 : IfxScuCcu.h
  • IfxScuCcu_K1divider_59 : IfxScuCcu.h
  • IfxScuCcu_K1divider_6 : IfxScuCcu.h
  • IfxScuCcu_K1divider_60 : IfxScuCcu.h
  • IfxScuCcu_K1divider_61 : IfxScuCcu.h
  • IfxScuCcu_K1divider_62 : IfxScuCcu.h
  • IfxScuCcu_K1divider_63 : IfxScuCcu.h
  • IfxScuCcu_K1divider_64 : IfxScuCcu.h
  • IfxScuCcu_K1divider_65 : IfxScuCcu.h
  • IfxScuCcu_K1divider_66 : IfxScuCcu.h
  • IfxScuCcu_K1divider_67 : IfxScuCcu.h
  • IfxScuCcu_K1divider_68 : IfxScuCcu.h
  • IfxScuCcu_K1divider_69 : IfxScuCcu.h
  • IfxScuCcu_K1divider_7 : IfxScuCcu.h
  • IfxScuCcu_K1divider_70 : IfxScuCcu.h
  • IfxScuCcu_K1divider_71 : IfxScuCcu.h
  • IfxScuCcu_K1divider_72 : IfxScuCcu.h
  • IfxScuCcu_K1divider_73 : IfxScuCcu.h
  • IfxScuCcu_K1divider_74 : IfxScuCcu.h
  • IfxScuCcu_K1divider_75 : IfxScuCcu.h
  • IfxScuCcu_K1divider_76 : IfxScuCcu.h
  • IfxScuCcu_K1divider_77 : IfxScuCcu.h
  • IfxScuCcu_K1divider_78 : IfxScuCcu.h
  • IfxScuCcu_K1divider_79 : IfxScuCcu.h
  • IfxScuCcu_K1divider_8 : IfxScuCcu.h
  • IfxScuCcu_K1divider_80 : IfxScuCcu.h
  • IfxScuCcu_K1divider_81 : IfxScuCcu.h
  • IfxScuCcu_K1divider_82 : IfxScuCcu.h
  • IfxScuCcu_K1divider_83 : IfxScuCcu.h
  • IfxScuCcu_K1divider_84 : IfxScuCcu.h
  • IfxScuCcu_K1divider_85 : IfxScuCcu.h
  • IfxScuCcu_K1divider_86 : IfxScuCcu.h
  • IfxScuCcu_K1divider_87 : IfxScuCcu.h
  • IfxScuCcu_K1divider_88 : IfxScuCcu.h
  • IfxScuCcu_K1divider_89 : IfxScuCcu.h
  • IfxScuCcu_K1divider_9 : IfxScuCcu.h
  • IfxScuCcu_K1divider_90 : IfxScuCcu.h
  • IfxScuCcu_K1divider_91 : IfxScuCcu.h
  • IfxScuCcu_K1divider_92 : IfxScuCcu.h
  • IfxScuCcu_K1divider_93 : IfxScuCcu.h
  • IfxScuCcu_K1divider_94 : IfxScuCcu.h
  • IfxScuCcu_K1divider_95 : IfxScuCcu.h
  • IfxScuCcu_K1divider_96 : IfxScuCcu.h
  • IfxScuCcu_K1divider_97 : IfxScuCcu.h
  • IfxScuCcu_K1divider_98 : IfxScuCcu.h
  • IfxScuCcu_K1divider_99 : IfxScuCcu.h
  • IfxScuCcu_K2divider : IfxScuCcu.h
  • IfxScuCcu_K2divider_1 : IfxScuCcu.h
  • IfxScuCcu_K2divider_10 : IfxScuCcu.h
  • IfxScuCcu_K2divider_100 : IfxScuCcu.h
  • IfxScuCcu_K2divider_101 : IfxScuCcu.h
  • IfxScuCcu_K2divider_102 : IfxScuCcu.h
  • IfxScuCcu_K2divider_103 : IfxScuCcu.h
  • IfxScuCcu_K2divider_104 : IfxScuCcu.h
  • IfxScuCcu_K2divider_105 : IfxScuCcu.h
  • IfxScuCcu_K2divider_106 : IfxScuCcu.h
  • IfxScuCcu_K2divider_107 : IfxScuCcu.h
  • IfxScuCcu_K2divider_108 : IfxScuCcu.h
  • IfxScuCcu_K2divider_109 : IfxScuCcu.h
  • IfxScuCcu_K2divider_11 : IfxScuCcu.h
  • IfxScuCcu_K2divider_110 : IfxScuCcu.h
  • IfxScuCcu_K2divider_111 : IfxScuCcu.h
  • IfxScuCcu_K2divider_112 : IfxScuCcu.h
  • IfxScuCcu_K2divider_113 : IfxScuCcu.h
  • IfxScuCcu_K2divider_114 : IfxScuCcu.h
  • IfxScuCcu_K2divider_115 : IfxScuCcu.h
  • IfxScuCcu_K2divider_116 : IfxScuCcu.h
  • IfxScuCcu_K2divider_117 : IfxScuCcu.h
  • IfxScuCcu_K2divider_118 : IfxScuCcu.h
  • IfxScuCcu_K2divider_119 : IfxScuCcu.h
  • IfxScuCcu_K2divider_12 : IfxScuCcu.h
  • IfxScuCcu_K2divider_120 : IfxScuCcu.h
  • IfxScuCcu_K2divider_121 : IfxScuCcu.h
  • IfxScuCcu_K2divider_122 : IfxScuCcu.h
  • IfxScuCcu_K2divider_123 : IfxScuCcu.h
  • IfxScuCcu_K2divider_124 : IfxScuCcu.h
  • IfxScuCcu_K2divider_125 : IfxScuCcu.h
  • IfxScuCcu_K2divider_126 : IfxScuCcu.h
  • IfxScuCcu_K2divider_127 : IfxScuCcu.h
  • IfxScuCcu_K2divider_128 : IfxScuCcu.h
  • IfxScuCcu_K2divider_13 : IfxScuCcu.h
  • IfxScuCcu_K2divider_14 : IfxScuCcu.h
  • IfxScuCcu_K2divider_15 : IfxScuCcu.h
  • IfxScuCcu_K2divider_16 : IfxScuCcu.h
  • IfxScuCcu_K2divider_17 : IfxScuCcu.h
  • IfxScuCcu_K2divider_18 : IfxScuCcu.h
  • IfxScuCcu_K2divider_19 : IfxScuCcu.h
  • IfxScuCcu_K2divider_2 : IfxScuCcu.h
  • IfxScuCcu_K2divider_20 : IfxScuCcu.h
  • IfxScuCcu_K2divider_21 : IfxScuCcu.h
  • IfxScuCcu_K2divider_22 : IfxScuCcu.h
  • IfxScuCcu_K2divider_23 : IfxScuCcu.h
  • IfxScuCcu_K2divider_24 : IfxScuCcu.h
  • IfxScuCcu_K2divider_25 : IfxScuCcu.h
  • IfxScuCcu_K2divider_26 : IfxScuCcu.h
  • IfxScuCcu_K2divider_27 : IfxScuCcu.h
  • IfxScuCcu_K2divider_28 : IfxScuCcu.h
  • IfxScuCcu_K2divider_29 : IfxScuCcu.h
  • IfxScuCcu_K2divider_3 : IfxScuCcu.h
  • IfxScuCcu_K2divider_30 : IfxScuCcu.h
  • IfxScuCcu_K2divider_31 : IfxScuCcu.h
  • IfxScuCcu_K2divider_32 : IfxScuCcu.h
  • IfxScuCcu_K2divider_33 : IfxScuCcu.h
  • IfxScuCcu_K2divider_34 : IfxScuCcu.h
  • IfxScuCcu_K2divider_35 : IfxScuCcu.h
  • IfxScuCcu_K2divider_36 : IfxScuCcu.h
  • IfxScuCcu_K2divider_37 : IfxScuCcu.h
  • IfxScuCcu_K2divider_38 : IfxScuCcu.h
  • IfxScuCcu_K2divider_39 : IfxScuCcu.h
  • IfxScuCcu_K2divider_4 : IfxScuCcu.h
  • IfxScuCcu_K2divider_40 : IfxScuCcu.h
  • IfxScuCcu_K2divider_41 : IfxScuCcu.h
  • IfxScuCcu_K2divider_42 : IfxScuCcu.h
  • IfxScuCcu_K2divider_43 : IfxScuCcu.h
  • IfxScuCcu_K2divider_44 : IfxScuCcu.h
  • IfxScuCcu_K2divider_45 : IfxScuCcu.h
  • IfxScuCcu_K2divider_46 : IfxScuCcu.h
  • IfxScuCcu_K2divider_47 : IfxScuCcu.h
  • IfxScuCcu_K2divider_48 : IfxScuCcu.h
  • IfxScuCcu_K2divider_49 : IfxScuCcu.h
  • IfxScuCcu_K2divider_5 : IfxScuCcu.h
  • IfxScuCcu_K2divider_50 : IfxScuCcu.h
  • IfxScuCcu_K2divider_51 : IfxScuCcu.h
  • IfxScuCcu_K2divider_52 : IfxScuCcu.h
  • IfxScuCcu_K2divider_53 : IfxScuCcu.h
  • IfxScuCcu_K2divider_54 : IfxScuCcu.h
  • IfxScuCcu_K2divider_55 : IfxScuCcu.h
  • IfxScuCcu_K2divider_56 : IfxScuCcu.h
  • IfxScuCcu_K2divider_57 : IfxScuCcu.h
  • IfxScuCcu_K2divider_58 : IfxScuCcu.h
  • IfxScuCcu_K2divider_59 : IfxScuCcu.h
  • IfxScuCcu_K2divider_6 : IfxScuCcu.h
  • IfxScuCcu_K2divider_60 : IfxScuCcu.h
  • IfxScuCcu_K2divider_61 : IfxScuCcu.h
  • IfxScuCcu_K2divider_62 : IfxScuCcu.h
  • IfxScuCcu_K2divider_63 : IfxScuCcu.h
  • IfxScuCcu_K2divider_64 : IfxScuCcu.h
  • IfxScuCcu_K2divider_65 : IfxScuCcu.h
  • IfxScuCcu_K2divider_66 : IfxScuCcu.h
  • IfxScuCcu_K2divider_67 : IfxScuCcu.h
  • IfxScuCcu_K2divider_68 : IfxScuCcu.h
  • IfxScuCcu_K2divider_69 : IfxScuCcu.h
  • IfxScuCcu_K2divider_7 : IfxScuCcu.h
  • IfxScuCcu_K2divider_70 : IfxScuCcu.h
  • IfxScuCcu_K2divider_71 : IfxScuCcu.h
  • IfxScuCcu_K2divider_72 : IfxScuCcu.h
  • IfxScuCcu_K2divider_73 : IfxScuCcu.h
  • IfxScuCcu_K2divider_74 : IfxScuCcu.h
  • IfxScuCcu_K2divider_75 : IfxScuCcu.h
  • IfxScuCcu_K2divider_76 : IfxScuCcu.h
  • IfxScuCcu_K2divider_77 : IfxScuCcu.h
  • IfxScuCcu_K2divider_78 : IfxScuCcu.h
  • IfxScuCcu_K2divider_79 : IfxScuCcu.h
  • IfxScuCcu_K2divider_8 : IfxScuCcu.h
  • IfxScuCcu_K2divider_80 : IfxScuCcu.h
  • IfxScuCcu_K2divider_81 : IfxScuCcu.h
  • IfxScuCcu_K2divider_82 : IfxScuCcu.h
  • IfxScuCcu_K2divider_83 : IfxScuCcu.h
  • IfxScuCcu_K2divider_84 : IfxScuCcu.h
  • IfxScuCcu_K2divider_85 : IfxScuCcu.h
  • IfxScuCcu_K2divider_86 : IfxScuCcu.h
  • IfxScuCcu_K2divider_87 : IfxScuCcu.h
  • IfxScuCcu_K2divider_88 : IfxScuCcu.h
  • IfxScuCcu_K2divider_89 : IfxScuCcu.h
  • IfxScuCcu_K2divider_9 : IfxScuCcu.h
  • IfxScuCcu_K2divider_90 : IfxScuCcu.h
  • IfxScuCcu_K2divider_91 : IfxScuCcu.h
  • IfxScuCcu_K2divider_92 : IfxScuCcu.h
  • IfxScuCcu_K2divider_93 : IfxScuCcu.h
  • IfxScuCcu_K2divider_94 : IfxScuCcu.h
  • IfxScuCcu_K2divider_95 : IfxScuCcu.h
  • IfxScuCcu_K2divider_96 : IfxScuCcu.h
  • IfxScuCcu_K2divider_97 : IfxScuCcu.h
  • IfxScuCcu_K2divider_98 : IfxScuCcu.h
  • IfxScuCcu_K2divider_99 : IfxScuCcu.h
  • IfxScuCcu_K3divider : IfxScuCcu.h
  • IfxScuCcu_K3divider_1 : IfxScuCcu.h
  • IfxScuCcu_K3divider_10 : IfxScuCcu.h
  • IfxScuCcu_K3divider_100 : IfxScuCcu.h
  • IfxScuCcu_K3divider_101 : IfxScuCcu.h
  • IfxScuCcu_K3divider_102 : IfxScuCcu.h
  • IfxScuCcu_K3divider_103 : IfxScuCcu.h
  • IfxScuCcu_K3divider_104 : IfxScuCcu.h
  • IfxScuCcu_K3divider_105 : IfxScuCcu.h
  • IfxScuCcu_K3divider_106 : IfxScuCcu.h
  • IfxScuCcu_K3divider_107 : IfxScuCcu.h
  • IfxScuCcu_K3divider_108 : IfxScuCcu.h
  • IfxScuCcu_K3divider_109 : IfxScuCcu.h
  • IfxScuCcu_K3divider_11 : IfxScuCcu.h
  • IfxScuCcu_K3divider_110 : IfxScuCcu.h
  • IfxScuCcu_K3divider_111 : IfxScuCcu.h
  • IfxScuCcu_K3divider_112 : IfxScuCcu.h
  • IfxScuCcu_K3divider_113 : IfxScuCcu.h
  • IfxScuCcu_K3divider_114 : IfxScuCcu.h
  • IfxScuCcu_K3divider_115 : IfxScuCcu.h
  • IfxScuCcu_K3divider_116 : IfxScuCcu.h
  • IfxScuCcu_K3divider_117 : IfxScuCcu.h
  • IfxScuCcu_K3divider_118 : IfxScuCcu.h
  • IfxScuCcu_K3divider_119 : IfxScuCcu.h
  • IfxScuCcu_K3divider_12 : IfxScuCcu.h
  • IfxScuCcu_K3divider_120 : IfxScuCcu.h
  • IfxScuCcu_K3divider_121 : IfxScuCcu.h
  • IfxScuCcu_K3divider_122 : IfxScuCcu.h
  • IfxScuCcu_K3divider_123 : IfxScuCcu.h
  • IfxScuCcu_K3divider_124 : IfxScuCcu.h
  • IfxScuCcu_K3divider_125 : IfxScuCcu.h
  • IfxScuCcu_K3divider_126 : IfxScuCcu.h
  • IfxScuCcu_K3divider_127 : IfxScuCcu.h
  • IfxScuCcu_K3divider_128 : IfxScuCcu.h
  • IfxScuCcu_K3divider_13 : IfxScuCcu.h
  • IfxScuCcu_K3divider_14 : IfxScuCcu.h
  • IfxScuCcu_K3divider_15 : IfxScuCcu.h
  • IfxScuCcu_K3divider_16 : IfxScuCcu.h
  • IfxScuCcu_K3divider_17 : IfxScuCcu.h
  • IfxScuCcu_K3divider_18 : IfxScuCcu.h
  • IfxScuCcu_K3divider_19 : IfxScuCcu.h
  • IfxScuCcu_K3divider_2 : IfxScuCcu.h
  • IfxScuCcu_K3divider_20 : IfxScuCcu.h
  • IfxScuCcu_K3divider_21 : IfxScuCcu.h
  • IfxScuCcu_K3divider_22 : IfxScuCcu.h
  • IfxScuCcu_K3divider_23 : IfxScuCcu.h
  • IfxScuCcu_K3divider_24 : IfxScuCcu.h
  • IfxScuCcu_K3divider_25 : IfxScuCcu.h
  • IfxScuCcu_K3divider_26 : IfxScuCcu.h
  • IfxScuCcu_K3divider_27 : IfxScuCcu.h
  • IfxScuCcu_K3divider_28 : IfxScuCcu.h
  • IfxScuCcu_K3divider_29 : IfxScuCcu.h
  • IfxScuCcu_K3divider_3 : IfxScuCcu.h
  • IfxScuCcu_K3divider_30 : IfxScuCcu.h
  • IfxScuCcu_K3divider_31 : IfxScuCcu.h
  • IfxScuCcu_K3divider_32 : IfxScuCcu.h
  • IfxScuCcu_K3divider_33 : IfxScuCcu.h
  • IfxScuCcu_K3divider_34 : IfxScuCcu.h
  • IfxScuCcu_K3divider_35 : IfxScuCcu.h
  • IfxScuCcu_K3divider_36 : IfxScuCcu.h
  • IfxScuCcu_K3divider_37 : IfxScuCcu.h
  • IfxScuCcu_K3divider_38 : IfxScuCcu.h
  • IfxScuCcu_K3divider_39 : IfxScuCcu.h
  • IfxScuCcu_K3divider_4 : IfxScuCcu.h
  • IfxScuCcu_K3divider_40 : IfxScuCcu.h
  • IfxScuCcu_K3divider_41 : IfxScuCcu.h
  • IfxScuCcu_K3divider_42 : IfxScuCcu.h
  • IfxScuCcu_K3divider_43 : IfxScuCcu.h
  • IfxScuCcu_K3divider_44 : IfxScuCcu.h
  • IfxScuCcu_K3divider_45 : IfxScuCcu.h
  • IfxScuCcu_K3divider_46 : IfxScuCcu.h
  • IfxScuCcu_K3divider_47 : IfxScuCcu.h
  • IfxScuCcu_K3divider_48 : IfxScuCcu.h
  • IfxScuCcu_K3divider_49 : IfxScuCcu.h
  • IfxScuCcu_K3divider_5 : IfxScuCcu.h
  • IfxScuCcu_K3divider_50 : IfxScuCcu.h
  • IfxScuCcu_K3divider_51 : IfxScuCcu.h
  • IfxScuCcu_K3divider_52 : IfxScuCcu.h
  • IfxScuCcu_K3divider_53 : IfxScuCcu.h
  • IfxScuCcu_K3divider_54 : IfxScuCcu.h
  • IfxScuCcu_K3divider_55 : IfxScuCcu.h
  • IfxScuCcu_K3divider_56 : IfxScuCcu.h
  • IfxScuCcu_K3divider_57 : IfxScuCcu.h
  • IfxScuCcu_K3divider_58 : IfxScuCcu.h
  • IfxScuCcu_K3divider_59 : IfxScuCcu.h
  • IfxScuCcu_K3divider_6 : IfxScuCcu.h
  • IfxScuCcu_K3divider_60 : IfxScuCcu.h
  • IfxScuCcu_K3divider_61 : IfxScuCcu.h
  • IfxScuCcu_K3divider_62 : IfxScuCcu.h
  • IfxScuCcu_K3divider_63 : IfxScuCcu.h
  • IfxScuCcu_K3divider_64 : IfxScuCcu.h
  • IfxScuCcu_K3divider_65 : IfxScuCcu.h
  • IfxScuCcu_K3divider_66 : IfxScuCcu.h
  • IfxScuCcu_K3divider_67 : IfxScuCcu.h
  • IfxScuCcu_K3divider_68 : IfxScuCcu.h
  • IfxScuCcu_K3divider_69 : IfxScuCcu.h
  • IfxScuCcu_K3divider_7 : IfxScuCcu.h
  • IfxScuCcu_K3divider_70 : IfxScuCcu.h
  • IfxScuCcu_K3divider_71 : IfxScuCcu.h
  • IfxScuCcu_K3divider_72 : IfxScuCcu.h
  • IfxScuCcu_K3divider_73 : IfxScuCcu.h
  • IfxScuCcu_K3divider_74 : IfxScuCcu.h
  • IfxScuCcu_K3divider_75 : IfxScuCcu.h
  • IfxScuCcu_K3divider_76 : IfxScuCcu.h
  • IfxScuCcu_K3divider_77 : IfxScuCcu.h
  • IfxScuCcu_K3divider_78 : IfxScuCcu.h
  • IfxScuCcu_K3divider_79 : IfxScuCcu.h
  • IfxScuCcu_K3divider_8 : IfxScuCcu.h
  • IfxScuCcu_K3divider_80 : IfxScuCcu.h
  • IfxScuCcu_K3divider_81 : IfxScuCcu.h
  • IfxScuCcu_K3divider_82 : IfxScuCcu.h
  • IfxScuCcu_K3divider_83 : IfxScuCcu.h
  • IfxScuCcu_K3divider_84 : IfxScuCcu.h
  • IfxScuCcu_K3divider_85 : IfxScuCcu.h
  • IfxScuCcu_K3divider_86 : IfxScuCcu.h
  • IfxScuCcu_K3divider_87 : IfxScuCcu.h
  • IfxScuCcu_K3divider_88 : IfxScuCcu.h
  • IfxScuCcu_K3divider_89 : IfxScuCcu.h
  • IfxScuCcu_K3divider_9 : IfxScuCcu.h
  • IfxScuCcu_K3divider_90 : IfxScuCcu.h
  • IfxScuCcu_K3divider_91 : IfxScuCcu.h
  • IfxScuCcu_K3divider_92 : IfxScuCcu.h
  • IfxScuCcu_K3divider_93 : IfxScuCcu.h
  • IfxScuCcu_K3divider_94 : IfxScuCcu.h
  • IfxScuCcu_K3divider_95 : IfxScuCcu.h
  • IfxScuCcu_K3divider_96 : IfxScuCcu.h
  • IfxScuCcu_K3divider_97 : IfxScuCcu.h
  • IfxScuCcu_K3divider_98 : IfxScuCcu.h
  • IfxScuCcu_K3divider_99 : IfxScuCcu.h
  • IfxScuCcu_Ndivider : IfxScuCcu.h
  • IfxScuCcu_Ndivider_1 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_10 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_100 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_101 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_102 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_103 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_104 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_105 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_106 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_107 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_108 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_109 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_11 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_110 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_111 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_112 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_113 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_114 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_115 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_116 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_117 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_118 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_119 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_12 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_120 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_121 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_122 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_123 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_124 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_125 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_126 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_127 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_128 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_13 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_14 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_15 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_16 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_17 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_18 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_19 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_2 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_20 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_21 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_22 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_23 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_24 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_25 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_26 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_27 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_28 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_29 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_3 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_30 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_31 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_32 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_33 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_34 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_35 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_36 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_37 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_38 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_39 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_4 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_40 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_41 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_42 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_43 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_44 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_45 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_46 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_47 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_48 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_49 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_5 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_50 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_51 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_52 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_53 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_54 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_55 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_56 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_57 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_58 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_59 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_6 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_60 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_61 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_62 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_63 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_64 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_65 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_66 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_67 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_68 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_69 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_7 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_70 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_71 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_72 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_73 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_74 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_75 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_76 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_77 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_78 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_79 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_8 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_80 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_81 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_82 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_83 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_84 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_85 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_86 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_87 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_88 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_89 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_9 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_90 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_91 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_92 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_93 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_94 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_95 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_96 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_97 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_98 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_99 : IfxScuCcu.h
  • IFXSCUCCU_OSC_STABLECHK_TIME : IfxScuCcu.h
  • IfxScuCcu_Pdivider : IfxScuCcu.h
  • IfxScuCcu_Pdivider_1 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_10 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_11 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_12 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_13 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_14 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_15 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_16 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_2 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_3 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_4 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_5 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_6 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_7 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_8 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_9 : IfxScuCcu.h
  • IfxScuCcu_PllStepsFunctionHook : IfxScuCcu.h
  • IfxScuCcu_setCpuFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setGtmFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setPll2ErayFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setPll2Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setSriFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_switchToBackupClock() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_wait() : IfxScuCcu.c
  • IfxScuCcu_xtalFrequency : IfxScuCcu.c
  • IFXSCUERU_CHANNEL_NUMBER_ODD : IfxScuEru.c
  • IfxScuEru_clearAllEventFlags() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_clearEventFlag() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_clearInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_clearOutputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_connectTrigger() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableAutoClear() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_disableFallingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_disablePatternDetectionTrigger() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableRisingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_disableTriggerPulse() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enableAutoClear() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableFallingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enablePatternDetectionTrigger() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableRisingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableTriggerPulse() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_ExternalInputSelection : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_0 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_1 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_2 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_3 : IfxScuEru.h
  • IfxScuEru_getAllEventFlagsStatus() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getEventFlagStatus() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getOutputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getPatternDetectionResult() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getWholePatternDetectionResult() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_initReqPin() : IfxScuEru.h
  • IfxScuEru_InputChannel : IfxScuEru.h
  • IfxScuEru_InputChannel_0 : IfxScuEru.h
  • IfxScuEru_InputChannel_1 : IfxScuEru.h
  • IfxScuEru_InputChannel_2 : IfxScuEru.h
  • IfxScuEru_InputChannel_3 : IfxScuEru.h
  • IfxScuEru_InputChannel_4 : IfxScuEru.h
  • IfxScuEru_InputChannel_5 : IfxScuEru.h
  • IfxScuEru_InputChannel_6 : IfxScuEru.h
  • IfxScuEru_InputChannel_7 : IfxScuEru.h
  • IfxScuEru_InputNodePointer : IfxScuEru.h
  • IfxScuEru_InputNodePointer_0 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_1 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_2 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_3 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_4 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_5 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_6 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_7 : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_alwaysActive : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_none : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_patternMatch : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_patternMiss : IfxScuEru.h
  • IfxScuEru_OutputChannel : IfxScuEru.h
  • IfxScuEru_OutputChannel_0 : IfxScuEru.h
  • IfxScuEru_OutputChannel_1 : IfxScuEru.h
  • IfxScuEru_OutputChannel_2 : IfxScuEru.h
  • IfxScuEru_OutputChannel_3 : IfxScuEru.h
  • IfxScuEru_OutputChannel_4 : IfxScuEru.h
  • IfxScuEru_OutputChannel_5 : IfxScuEru.h
  • IfxScuEru_OutputChannel_6 : IfxScuEru.h
  • IfxScuEru_OutputChannel_7 : IfxScuEru.h
  • IfxScuEru_selectExternalInput() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_setEventFlag() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_setFlagPatternDetection() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_setInterruptGatingPattern() : IfxScuEru.c , IfxScuEru.h
  • IFXSCUERU_TO_REGISTER_BASE : IfxScuEru.c
  • IFXSCUWDT_CALCULATELFSR : IfxScuWdt.asm.h
  • IfxScuWdt_calculateLfsr() : IfxScuWdt.asm.h
  • IfxScuWdt_changeCpuWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeCpuWatchdogReload() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeSafetyWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeSafetyWatchdogReload() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_clearCpuEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_clearCpuEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_clearSafetyEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_clearSafetyEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_disableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_disableSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_enableCpuWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_enableSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_enableWatchdogWithDebugger() : IfxScuWdt.c , IfxScuWdt.h
  • IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT : IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogEndInit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getCpuWatchdogEndInitInline() : IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogEndInit() : IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getSafetyWatchdogPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_initConfig() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_initCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_initSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IFXSCUWDT_RESET_PASSWORD : IfxScuWdt.c
  • IfxScuWdt_serviceCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_serviceSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setCpuEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setCpuEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_setSafetyEndinit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_setSafetyEndinitInline() : IfxScuWdt.h
  • IfxSent_AlternateInput : IfxSent.h
  • IfxSent_AlternateInput_0 : IfxSent.h
  • IfxSent_AlternateInput_1 : IfxSent.h
  • IfxSent_AlternateInput_2 : IfxSent.h
  • IfxSent_AlternateInput_3 : IfxSent.h
  • IFXSENT_CFG_CHANNEL_INTEN : IfxSent_cfg.h
  • IFXSENT_CFG_STEP_RANGE : IfxSent_cfg.h
  • IFXSENT_CFG_TIMEOUT_VALUE : IfxSent_cfg.h
  • IfxSent_ChannelId : IfxSent_cfg.h
  • IfxSent_ChannelId_0 : IfxSent_cfg.h
  • IfxSent_ChannelId_1 : IfxSent_cfg.h
  • IfxSent_ChannelId_2 : IfxSent_cfg.h
  • IfxSent_ChannelId_3 : IfxSent_cfg.h
  • IfxSent_ChannelId_4 : IfxSent_cfg.h
  • IfxSent_ChannelId_5 : IfxSent_cfg.h
  • IfxSent_ChannelId_none : IfxSent_cfg.h
  • IfxSent_ChannelStatus : IfxSent.h
  • IfxSent_ChannelStatus_initialize : IfxSent.h
  • IfxSent_ChannelStatus_running : IfxSent.h
  • IfxSent_ChannelStatus_stop : IfxSent.h
  • IfxSent_ChannelStatus_synchronize : IfxSent.h
  • IfxSent_clearInterruptStatus() : IfxSent.h
  • IfxSent_ClockDividerMode : IfxSent.h
  • IfxSent_ClockDividerMode_fractional : IfxSent.h
  • IfxSent_ClockDividerMode_normal : IfxSent.h
  • IfxSent_ClockDividerMode_off : IfxSent.h
  • IfxSent_ConfigBit : IfxSent.h
  • IfxSent_ConfigBit_0 : IfxSent.h
  • IfxSent_ConfigBit_1 : IfxSent.h
  • IfxSent_DigitalGlitchesLength : IfxSent.h
  • IfxSent_DigitalGlitchesLength_1 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_10 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_11 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_12 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_13 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_14 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_15 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_2 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_3 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_4 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_5 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_6 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_7 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_8 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_9 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_off : IfxSent.h
  • IfxSent_disableChannel() : IfxSent.h
  • IfxSent_disableModule() : IfxSent.h
  • IfxSent_enableChannel() : IfxSent.h
  • IfxSent_enableModule() : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode_extended : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode_standard : IfxSent.h
  • IfxSent_ExternalTrigger : IfxSent.h
  • IfxSent_ExternalTrigger_0 : IfxSent.h
  • IfxSent_ExternalTrigger_1 : IfxSent.h
  • IfxSent_ExternalTrigger_2 : IfxSent.h
  • IfxSent_ExternalTrigger_3 : IfxSent.h
  • IfxSent_ExternalTrigger_4 : IfxSent.h
  • IfxSent_ExternalTrigger_5 : IfxSent.h
  • IfxSent_ExternalTrigger_6 : IfxSent.h
  • IfxSent_ExternalTrigger_7 : IfxSent.h
  • IfxSent_ExternalTrigger_8 : IfxSent.h
  • IfxSent_ExternalTrigger_9 : IfxSent.h
  • IfxSent_FrameCheckMode : IfxSent.h
  • IfxSent_FrameCheckMode_futureSuncPulse : IfxSent.h
  • IfxSent_FrameCheckMode_pastSyncPulse : IfxSent.h
  • IfxSent_getAndClearInterruptStatus() : IfxSent.h
  • IfxSent_getChannelInterruptStatus() : IfxSent.h
  • IfxSent_getChannelSrc() : IfxSent.h
  • IfxSent_getChannelUnitTime() : IfxSent.h , IfxSent.c
  • IfxSent_getInterruptStatus() : IfxSent.h
  • IfxSent_getModuleClock() : IfxSent.c , IfxSent.h
  • IfxSent_initializeChannelUnitTime() : IfxSent.h , IfxSent.c
  • IfxSent_initializeModuleClock() : IfxSent.h , IfxSent.c
  • IfxSent_initSentPin() : IfxSent.h
  • IfxSent_initSpcPin() : IfxSent.h
  • IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS : IfxSent.h
  • IfxSent_InterruptNodePointer : IfxSent.h
  • IfxSent_InterruptNodePointer_0 : IfxSent.h
  • IfxSent_InterruptNodePointer_1 : IfxSent.h
  • IfxSent_InterruptNodePointer_2 : IfxSent.h
  • IfxSent_InterruptNodePointer_3 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo0 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo1 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo2 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo3 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo4 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo5 : IfxSent.h
  • IfxSent_InterruptSource : IfxSent.h
  • IfxSent_InterruptSource_crci : IfxSent.h
  • IfxSent_InterruptSource_fdi : IfxSent.h
  • IfxSent_InterruptSource_fri : IfxSent.h
  • IfxSent_InterruptSource_nni : IfxSent.h
  • IfxSent_InterruptSource_nvi : IfxSent.h
  • IfxSent_InterruptSource_rbi : IfxSent.h
  • IfxSent_InterruptSource_rdi : IfxSent.h
  • IfxSent_InterruptSource_rsi : IfxSent.h
  • IfxSent_InterruptSource_scri : IfxSent.h
  • IfxSent_InterruptSource_sdi : IfxSent.h
  • IfxSent_InterruptSource_tbi : IfxSent.h
  • IfxSent_InterruptSource_tdi : IfxSent.h
  • IfxSent_InterruptSource_wdi : IfxSent.h
  • IfxSent_InterruptSource_wsi : IfxSent.h
  • IfxSent_isModuleEnabled() : IfxSent.h
  • IfxSent_isModuleSuspended() : IfxSent.h
  • IfxSent_Nibble : IfxSent.h
  • IfxSent_Nibble_0 : IfxSent.h
  • IfxSent_Nibble_1 : IfxSent.h
  • IfxSent_Nibble_2 : IfxSent.h
  • IfxSent_Nibble_3 : IfxSent.h
  • IfxSent_Nibble_4 : IfxSent.h
  • IfxSent_Nibble_5 : IfxSent.h
  • IfxSent_Nibble_6 : IfxSent.h
  • IfxSent_Nibble_7 : IfxSent.h
  • IFXSENT_NUM_CHANNELS : IfxSent_cfg.h
  • IFXSENT_NUM_MODULES : IfxSent_cfg.h
  • IFXSENT_PINMAP_NUM_CHANNELS : IfxSent_PinMap.h
  • IFXSENT_PINMAP_NUM_MODULES : IfxSent_PinMap.h
  • IFXSENT_PINMAP_SENT_IN_NUM_ITEMS : IfxSent_PinMap.h
  • IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS : IfxSent_PinMap.h
  • IfxSent_readReceivedChannelStatus() : IfxSent.h
  • IfxSent_readReceivedCrc() : IfxSent.h
  • IfxSent_readReceivedData() : IfxSent.h
  • IfxSent_readReceivedStatus() : IfxSent.h
  • IfxSent_readReceivedStatusAndCommunicationNibble() : IfxSent.h
  • IfxSent_readReceivedTimeStamp() : IfxSent.h
  • IfxSent_readSpcDelayLength() : IfxSent.h
  • IfxSent_readSpcPulseLength() : IfxSent.h
  • IfxSent_resetModule() : IfxSent.h , IfxSent.c
  • IfxSent_SENT0A_AN24_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT0A_P40_0_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT0B_P00_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT0C_P02_8_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT1A_AN25_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT1A_P40_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT1B_P00_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT1C_P02_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2A_AN26_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2A_P40_2_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2B_P00_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2C_P02_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2D_AN36_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2D_P40_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3A_AN27_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3A_P40_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3B_P00_4_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3C_P02_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3D_AN37_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3D_P40_7_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4A_AN38_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT4A_P40_8_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4B_P00_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT4C_P33_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT5A_AN39_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT5A_P40_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT5B_P00_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT5C_P33_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_Sent_deInitModule() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_getAndClearInterruptStatus() : IfxSent_Sent.h
  • IfxSent_Sent_In_pinTable : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_Sent_initChannel() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_initChannelConfig() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_initModule() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_initModuleConfig() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_readChannelSerialDataFrame() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_readChannelSerialMessageFrame() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_setAltiInput() : IfxSent.h
  • IfxSent_setChannelFractionalDivider() : IfxSent.h
  • IfxSent_setChannelPreDivider() : IfxSent.h
  • IfxSent_setSleepMode() : IfxSent.h
  • IfxSent_setSuspendMode() : IfxSent.h
  • IfxSent_setTimeStampPredivider() : IfxSent.h
  • IfxSent_setWatchDogTimerLimit() : IfxSent.h
  • IfxSent_SleepMode : IfxSent.h
  • IfxSent_SleepMode_disable : IfxSent.h
  • IfxSent_SleepMode_enable : IfxSent.h
  • IfxSent_SPC0_P00_1_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC1_P02_7_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC2_P00_3_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC3_P00_4_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC4_P00_5_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC5_P00_6_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_Spc_Out_pinTable : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SpcMode : IfxSent.h
  • IfxSent_SpcMode_bidirectional : IfxSent.h
  • IfxSent_SpcMode_range : IfxSent.h
  • IfxSent_SpcMode_sync : IfxSent.h
  • IfxSent_SuspendMode : IfxSent.h
  • IfxSent_SuspendMode_hard : IfxSent.h
  • IfxSent_SuspendMode_none : IfxSent.h
  • IfxSent_SuspendMode_soft : IfxSent.h
  • IfxSent_TimeBase : IfxSent.h
  • IfxSent_TimeBase_measuredFrequency : IfxSent.h
  • IfxSent_TimeBase_nominalFrequency : IfxSent.h
  • IfxSent_TriggerSource : IfxSent.h
  • IfxSent_TriggerSource_externalTrigger : IfxSent.h
  • IfxSent_TriggerSource_fallingEdge : IfxSent.h
  • IfxSent_TriggerSource_immediate : IfxSent.h
  • IfxSent_TriggerSource_off : IfxSent.h
  • IfxSmu_activateFsp() : IfxSmu.h
  • IfxSmu_activatePes() : IfxSmu.h
  • IfxSmu_Alarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0LockstepComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1LockstepComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_IomPinMismatchIndication : IfxSmu_cfg.h
  • IfxSmu_Alarm_IrEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuEccError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_noAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuAddressBufferFull : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuAddressingError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuDoubleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuEdcComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuNonCorrectableMultipleBit : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuPflashEccError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguInputClockOutOfRange : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuDtsTemperatureOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuDtsTemperatureUnderflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuExternalEmergencyStopSignal : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtsWatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtWatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuErrorPinFaultStateActivation : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuTimer0TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuTimer1TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm0 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm1 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm10 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm11 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm12 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm13 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm14 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm15 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm2 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm3 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm4 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm5 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm6 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm7 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm8 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm9 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SpbAccessEnableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SpbBusError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriBusError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcAddressPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcReadPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcWritePhaseError : IfxSmu_cfg.h
  • IfxSmu_AlarmConfig : IfxSmu.h
  • IfxSmu_AlarmConfig_cpuIdle : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet0 : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet1 : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet2 : IfxSmu.h
  • IfxSmu_AlarmConfig_nmi : IfxSmu.h
  • IfxSmu_AlarmConfig_noAction : IfxSmu.h
  • IfxSmu_AlarmConfig_scuReset : IfxSmu.h
  • IfxSmu_AlarmGroup : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_0 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_1 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_2 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_3 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_4 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_5 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_6 : IfxSmu_cfg.h
  • IfxSmu_clearAlarm() : IfxSmu.c , IfxSmu.h
  • IfxSmu_cmd() : IfxSmu.h
  • IfxSmu_Cmd : IfxSmu.h
  • IfxSmu_cmd() : IfxSmu.c
  • IfxSmu_Cmd_activateFsp : IfxSmu.h
  • IfxSmu_Cmd_activatePes : IfxSmu.h
  • IfxSmu_Cmd_enableClearAlarmStatus : IfxSmu.h
  • IfxSmu_Cmd_releaseFsp : IfxSmu.h
  • IfxSmu_Cmd_start : IfxSmu.h
  • IfxSmu_Cmd_stopRecoveryTimer : IfxSmu.h
  • IfxSmu_Cmd_triggerAlarm : IfxSmu.h
  • IfxSmu_enableAlarmFsp() : IfxSmu.c , IfxSmu.h
  • IfxSmu_enableClearAlarmStatus() : IfxSmu.h
  • IfxSmu_Fsp_Mode : IfxSmu.h
  • IfxSmu_Fsp_Mode_bistable : IfxSmu.h
  • IfxSmu_Fsp_Mode_timeSwitching : IfxSmu.h
  • IfxSmu_Fsp_Out_pinTable : IfxSmu_PinMap.h , IfxSmu_PinMap.c
  • IfxSmu_FSP_P33_8_OUT : IfxSmu_PinMap.c , IfxSmu_PinMap.h
  • IfxSmu_getAlarm() : IfxSmu.h , IfxSmu.c
  • IfxSmu_getFspFaultFreeFrequency() : IfxSmu.h , IfxSmu.c
  • IfxSmu_getFspFaultStateTime() : IfxSmu.c , IfxSmu.h
  • IfxSmu_initFsp() : IfxSmu.c , IfxSmu.h
  • IfxSmu_initFspConfig() : IfxSmu.h
  • IfxSmu_isAlarmSet() : IfxSmu.c , IfxSmu.h
  • IfxSmu_lock() : IfxSmu.h , IfxSmu.c
  • IfxSmu_lockForever() : IfxSmu.c , IfxSmu.h
  • IFXSMU_NUM_MODULES : IfxSmu_cfg.h
  • IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS : IfxSmu_PinMap.h
  • IFXSMU_PINMAP_NUM_MODULES : IfxSmu_PinMap.h
  • IfxSmu_RecoveryTimer : IfxSmu_cfg.h
  • IfxSmu_RecoveryTimer_0 : IfxSmu_cfg.h
  • IfxSmu_RecoveryTimer_1 : IfxSmu_cfg.h
  • IfxSmu_releaseFsp() : IfxSmu.h
  • IfxSmu_setAlarmConfig() : IfxSmu.c , IfxSmu.h
  • IfxSmu_start() : IfxSmu.h
  • IfxSmu_stopRecoveryTimer() : IfxSmu.h
  • IfxSmu_triggerAlarm() : IfxSmu.h
  • IfxSmu_unlock() : IfxSmu.c , IfxSmu.h
  • IfxSrc_clearOverrun() : IfxSrc.h
  • IfxSrc_clearRequest() : IfxSrc.h
  • IfxSrc_deinit() : IfxSrc.h
  • IfxSrc_disable() : IfxSrc.h
  • IfxSrc_enable() : IfxSrc.h
  • IfxSrc_init() : IfxSrc.h
  • IfxSrc_isOverrun() : IfxSrc.h
  • IfxSrc_isRequested() : IfxSrc.h
  • IfxSrc_setRequest() : IfxSrc.h
  • IfxSrc_Tos : IfxSrc_cfg.h
  • IfxSrc_Tos_cpu0 : IfxSrc_cfg.h
  • IfxSrc_Tos_cpu1 : IfxSrc_cfg.h
  • IfxSrc_Tos_dma : IfxSrc_cfg.h
  • IfxStdIf_DPipe : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_CanReadCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_canReadCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_canWriteCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_CanWriteCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_clearRx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ClearRx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_clearTx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ClearTx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_FlushTx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_flushTx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getReadCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetReadCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetReadEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getReadEvent() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetSendCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getSendCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getTxTimeStamp() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetTxTimeStamp : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getWriteCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetWriteCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getWriteEvent() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetWriteEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnError : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onError() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onReceive() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnReceive : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnTransmit : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onTransmit() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_print() : IfxStdIf_DPipe.h , IfxStdIf_DPipe.c
  • IfxStdIf_DPipe_Read : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_read() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ReadEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_resetSendCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ResetSendCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_Write : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_write() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_WriteEvent : IfxStdIf_DPipe.h
  • IfxStdIf_InterfaceDriver : IfxStdIf.h
  • IfxStdIf_Pos : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_unknown : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getAbsolutePosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetAbsolutePosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getDirection() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetDirection : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getFault() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetFault : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getOffset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetOffset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getPeriodPerRotation() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetPeriodPerRotation : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getRawPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetRawPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetRefreshPeriod : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getRefreshPeriod() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getResolution() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetResolution : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getSensorType() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetSensorType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getSpeed() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetSpeed : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetTurn : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getTurn() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_initConfig() : IfxStdIf_Pos.c , IfxStdIf_Pos.h
  • IfxStdIf_Pos_isFault() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType_linear : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType_rotating : IfxStdIf_Pos.h
  • IfxStdIf_Pos_OnEventA : IfxStdIf_Pos.h
  • IfxStdIf_Pos_onEventA() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_OnZeroIrq : IfxStdIf_Pos.h
  • IfxStdIf_Pos_onZeroIrq() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_printStatus() : IfxStdIf_Pos.c , IfxStdIf_Pos.h
  • IfxStdIf_Pos_radsToRpm() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_RawAngle : IfxStdIf_Pos.h
  • IfxStdIf_Pos_reset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Reset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResetFaults : IfxStdIf_Pos.h
  • IfxStdIf_Pos_resetFaults() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_fourFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_oneFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_twoFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_rpmToRads() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_angletrk : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_encoder : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_hall : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_igmr : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_resolver : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_virtual : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetOffset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setOffset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetRawPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setRawPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetRefreshPeriod : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setRefreshPeriod() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setSpeed() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetSpeed : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Update : IfxStdIf_Pos.h
  • IfxStdIf_Pos_update() : IfxStdIf_Pos.h
  • IfxStdIf_PwmHl : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetDeadtime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getDeadtime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetMinPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getMinPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetMode : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getMode() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getTimer() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_initConfig() : IfxStdIf_PwmHl.c , IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setDeadtime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetDeadtime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setMinPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetMinPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setMode() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetMode : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetOnTime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setOnTime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetOnTimeAndShift : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setOnTimeAndShift() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setupChannels() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetupChannels : IfxStdIf_PwmHl.h
  • IfxStdIf_Timer : IfxStdIf_Timer.h
  • IfxStdIf_Timer_AckTimerIrq : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ackTimerIrq() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_AckTriggerIrq : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ackTriggerIrq() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_applyUpdate() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ApplyUpdate : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_down : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_up : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_upAndDown : IfxStdIf_Timer.h
  • IfxStdIf_Timer_DisableUpdate : IfxStdIf_Timer.h
  • IfxStdIf_Timer_disableUpdate() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetInputFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getInputFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetPeriod : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getPeriod() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getPeriodSecond() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetResolution : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getResolution() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getTrigger() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetTrigger : IfxStdIf_Timer.h
  • IfxStdIf_Timer_initConfig() : IfxStdIf_Timer.h , IfxStdIf_Timer.c
  • IfxStdIf_Timer_initStdIf() : IfxStdIf_Timer.h , IfxStdIf_Timer.c
  • IfxStdIf_Timer_Output_disabled : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Output_enabled : IfxStdIf_Timer.h
  • IfxStdIf_Timer_OutputEvent : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Run : IfxStdIf_Timer.h
  • IfxStdIf_Timer_run() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetPeriod : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setPeriod() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setSingleMode() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetSingleMode : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setTrigger() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetTrigger : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Stop : IfxStdIf_Timer.h
  • IfxStdIf_Timer_stop() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_sToTick() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_tickToS() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_UpdateInputFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_updateInputFrequency() : IfxStdIf_Timer.h
  • IfxStm_cfg_indexMap : IfxStm_cfg.h , IfxStm_cfg.c
  • IfxStm_clearCompareFlag() : IfxStm.h , IfxStm.c
  • IfxStm_Comparator : IfxStm.h
  • IfxStm_Comparator_0 : IfxStm.h
  • IfxStm_Comparator_1 : IfxStm.h
  • IfxStm_ComparatorInterrupt : IfxStm.h
  • IfxStm_ComparatorInterrupt_ir0 : IfxStm.h
  • IfxStm_ComparatorInterrupt_ir1 : IfxStm.h
  • IfxStm_ComparatorOffset : IfxStm.h
  • IfxStm_ComparatorOffset_0 : IfxStm.h
  • IfxStm_ComparatorOffset_1 : IfxStm.h
  • IfxStm_ComparatorOffset_10 : IfxStm.h
  • IfxStm_ComparatorOffset_11 : IfxStm.h
  • IfxStm_ComparatorOffset_12 : IfxStm.h
  • IfxStm_ComparatorOffset_13 : IfxStm.h
  • IfxStm_ComparatorOffset_14 : IfxStm.h
  • IfxStm_ComparatorOffset_15 : IfxStm.h
  • IfxStm_ComparatorOffset_16 : IfxStm.h
  • IfxStm_ComparatorOffset_17 : IfxStm.h
  • IfxStm_ComparatorOffset_18 : IfxStm.h
  • IfxStm_ComparatorOffset_19 : IfxStm.h
  • IfxStm_ComparatorOffset_2 : IfxStm.h
  • IfxStm_ComparatorOffset_20 : IfxStm.h
  • IfxStm_ComparatorOffset_21 : IfxStm.h
  • IfxStm_ComparatorOffset_22 : IfxStm.h
  • IfxStm_ComparatorOffset_23 : IfxStm.h
  • IfxStm_ComparatorOffset_24 : IfxStm.h
  • IfxStm_ComparatorOffset_25 : IfxStm.h
  • IfxStm_ComparatorOffset_26 : IfxStm.h
  • IfxStm_ComparatorOffset_27 : IfxStm.h
  • IfxStm_ComparatorOffset_28 : IfxStm.h
  • IfxStm_ComparatorOffset_29 : IfxStm.h
  • IfxStm_ComparatorOffset_3 : IfxStm.h
  • IfxStm_ComparatorOffset_30 : IfxStm.h
  • IfxStm_ComparatorOffset_31 : IfxStm.h
  • IfxStm_ComparatorOffset_4 : IfxStm.h
  • IfxStm_ComparatorOffset_5 : IfxStm.h
  • IfxStm_ComparatorOffset_6 : IfxStm.h
  • IfxStm_ComparatorOffset_7 : IfxStm.h
  • IfxStm_ComparatorOffset_8 : IfxStm.h
  • IfxStm_ComparatorOffset_9 : IfxStm.h
  • IfxStm_ComparatorSize : IfxStm.h
  • IfxStm_ComparatorSize_10Bits : IfxStm.h
  • IfxStm_ComparatorSize_11Bits : IfxStm.h
  • IfxStm_ComparatorSize_12Bits : IfxStm.h
  • IfxStm_ComparatorSize_13Bits : IfxStm.h
  • IfxStm_ComparatorSize_14Bits : IfxStm.h
  • IfxStm_ComparatorSize_15Bits : IfxStm.h
  • IfxStm_ComparatorSize_16Bits : IfxStm.h
  • IfxStm_ComparatorSize_17Bits : IfxStm.h
  • IfxStm_ComparatorSize_18Bits : IfxStm.h
  • IfxStm_ComparatorSize_19Bits : IfxStm.h
  • IfxStm_ComparatorSize_1Bit : IfxStm.h
  • IfxStm_ComparatorSize_20Bits : IfxStm.h
  • IfxStm_ComparatorSize_21Bits : IfxStm.h
  • IfxStm_ComparatorSize_22Bits : IfxStm.h
  • IfxStm_ComparatorSize_23Bits : IfxStm.h
  • IfxStm_ComparatorSize_24Bits : IfxStm.h
  • IfxStm_ComparatorSize_25Bits : IfxStm.h
  • IfxStm_ComparatorSize_26Bits : IfxStm.h
  • IfxStm_ComparatorSize_27Bits : IfxStm.h
  • IfxStm_ComparatorSize_28Bits : IfxStm.h
  • IfxStm_ComparatorSize_29Bits : IfxStm.h
  • IfxStm_ComparatorSize_2Bits : IfxStm.h
  • IfxStm_ComparatorSize_30Bits : IfxStm.h
  • IfxStm_ComparatorSize_31Bits : IfxStm.h
  • IfxStm_ComparatorSize_32Bits : IfxStm.h
  • IfxStm_ComparatorSize_3Bits : IfxStm.h
  • IfxStm_ComparatorSize_4Bits : IfxStm.h
  • IfxStm_ComparatorSize_5Bits : IfxStm.h
  • IfxStm_ComparatorSize_6Bits : IfxStm.h
  • IfxStm_ComparatorSize_7Bits : IfxStm.h
  • IfxStm_ComparatorSize_8Bits : IfxStm.h
  • IfxStm_ComparatorSize_9Bits : IfxStm.h
  • IfxStm_disableComparatorInterrupt() : IfxStm.h , IfxStm.c
  • IfxStm_disableModule() : IfxStm.c , IfxStm.h
  • IfxStm_enableComparatorInterrupt() : IfxStm.c , IfxStm.h
  • IfxStm_enableOcdsSuspend() : IfxStm.c , IfxStm.h
  • IfxStm_get() : IfxStm.h
  • IfxStm_getAddress() : IfxStm.c , IfxStm.h
  • IfxStm_getCompare() : IfxStm.h
  • IfxStm_getFrequency() : IfxStm.h
  • IfxStm_getIndex() : IfxStm.c , IfxStm.h
  • IfxStm_getLower() : IfxStm.h
  • IfxStm_getOffset12Timer() : IfxStm.h
  • IfxStm_getOffset16Timer() : IfxStm.h
  • IfxStm_getOffset20Timer() : IfxStm.h
  • IfxStm_getOffset32Timer() : IfxStm.h
  • IfxStm_getOffset4Timer() : IfxStm.h
  • IfxStm_getOffset8Timer() : IfxStm.h
  • IfxStm_getOffsetTimer() : IfxStm.h
  • IfxStm_getSrcPointer() : IfxStm.c , IfxStm.h
  • IfxStm_getTicksFromMicroseconds() : IfxStm.h
  • IfxStm_getTicksFromMilliseconds() : IfxStm.h
  • IfxStm_increaseCompare() : IfxStm.h
  • IfxStm_Index : IfxStm_cfg.h
  • IfxStm_Index_0 : IfxStm_cfg.h
  • IfxStm_Index_1 : IfxStm_cfg.h
  • IfxStm_Index_none : IfxStm_cfg.h
  • IfxStm_initCompare() : IfxStm.c , IfxStm.h
  • IfxStm_initCompareConfig() : IfxStm.h , IfxStm.c
  • IfxStm_isCompareFlagSet() : IfxStm.c , IfxStm.h
  • IfxStm_isModuleSuspended() : IfxStm.h
  • IFXSTM_NUM_COMPARATORS : IfxStm_cfg.h
  • IFXSTM_NUM_MODULES : IfxStm_cfg.h
  • IfxStm_resetModule() : IfxStm.c , IfxStm.h
  • IfxStm_setCompareControl() : IfxStm.c , IfxStm.h
  • IfxStm_setSleepMode() : IfxStm.h
  • IfxStm_setSuspendMode() : IfxStm.h
  • IfxStm_SleepMode : IfxStm.h
  • IfxStm_SleepMode_disable : IfxStm.h
  • IfxStm_SleepMode_enable : IfxStm.h
  • IfxStm_SuspendMode : IfxStm.h
  • IfxStm_SuspendMode_hard : IfxStm.h
  • IfxStm_SuspendMode_none : IfxStm.h
  • IfxStm_SuspendMode_soft : IfxStm.h
  • IfxStm_Timer_acknowledgeTimerIrq() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_getFrequency() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_getInputFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getPeriod() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getResolution() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_init() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_initConfig() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_run() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_setFrequency() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_setPeriod() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_setSingleMode() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_stdIfTimerInit() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_stop() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_updateInputFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_updateCompare() : IfxStm.h
  • IfxStm_waitTicks() : IfxStm.h
  • IfxVadc_Adc_addToQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_clearQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_configureWaitForReadMode() : IfxVadc_Adc.h
  • IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister() : IfxVadc_Adc.h
  • IfxVadc_Adc_deInitGroup() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_deInitModule() : IfxVadc_Adc.h
  • IfxVadc_Adc_disableModule() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_getBackgroundScanStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getChannelConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_getChannelConversionTime() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_getDebugResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGlobalResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGroupConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_getGroupRegsFromGroup() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGroupResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getMasterId() : IfxVadc_Adc.c
  • IfxVadc_Adc_getMasterKernelIndex() : IfxVadc_Adc.c
  • IfxVadc_Adc_getModuleConfig() : IfxVadc_Adc.h
  • IfxVadc_Adc_getQueueStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getResultBasedOnRequestSource() : IfxVadc_Adc.h
  • IfxVadc_Adc_getScanStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getVadcFromGroup() : IfxVadc_Adc.h
  • IfxVadc_Adc_initChannel() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initChannelConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initExternalMultiplexerMode() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initExternalMultiplexerModeConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initGroup() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initGroupConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initModule() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initModuleConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_masterIndex : IfxVadc_Adc.c
  • IfxVadc_Adc_setBackgroundScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_setScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_startBackgroundScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_startQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_startScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_SYNCTR_STSEL : IfxVadc_Adc.h
  • IfxVadc_addToQueue() : IfxVadc.h
  • IFXVADC_ANALOG_FREQUENCY_MAX : IfxVadc_cfg.h
  • IFXVADC_ANALOG_FREQUENCY_MIN : IfxVadc_cfg.h
  • IfxVadc_AnalogConverterMode : IfxVadc.h
  • IfxVadc_AnalogConverterMode_fastStandby : IfxVadc.h
  • IfxVadc_AnalogConverterMode_normalOperation : IfxVadc.h
  • IfxVadc_AnalogConverterMode_off : IfxVadc.h
  • IfxVadc_AnalogConverterMode_slowStandby : IfxVadc.h
  • IfxVadc_ArbitrationRounds : IfxVadc.h
  • IfxVadc_ArbitrationRounds_16_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_20_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_4_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_8_slots : IfxVadc.h
  • IfxVadc_BoundaryExtension : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult1 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult10 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult11 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult12 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult13 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult14 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult15 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult2 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult3 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult4 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult5 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult6 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult7 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult8 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult9 : IfxVadc.h
  • IfxVadc_BoundaryExtension_standard : IfxVadc.h
  • IfxVadc_BoundarySelection : IfxVadc.h
  • IfxVadc_BoundarySelection_global0 : IfxVadc.h
  • IfxVadc_BoundarySelection_global1 : IfxVadc.h
  • IfxVadc_BoundarySelection_group0 : IfxVadc.h
  • IfxVadc_BoundarySelection_group1 : IfxVadc.h
  • IfxVadc_calculateSampleTime() : IfxVadc.h
  • IfxVadc_cfg_srcAddresses : IfxVadc_cfg.c , IfxVadc_cfg.h
  • IfxVadc_ChannelId : IfxVadc.h
  • IfxVadc_ChannelId_0 : IfxVadc.h
  • IfxVadc_ChannelId_1 : IfxVadc.h
  • IfxVadc_ChannelId_10 : IfxVadc.h
  • IfxVadc_ChannelId_11 : IfxVadc.h
  • IfxVadc_ChannelId_12 : IfxVadc.h
  • IfxVadc_ChannelId_13 : IfxVadc.h
  • IfxVadc_ChannelId_14 : IfxVadc.h
  • IfxVadc_ChannelId_15 : IfxVadc.h
  • IfxVadc_ChannelId_2 : IfxVadc.h
  • IfxVadc_ChannelId_3 : IfxVadc.h
  • IfxVadc_ChannelId_4 : IfxVadc.h
  • IfxVadc_ChannelId_5 : IfxVadc.h
  • IfxVadc_ChannelId_6 : IfxVadc.h
  • IfxVadc_ChannelId_7 : IfxVadc.h
  • IfxVadc_ChannelId_8 : IfxVadc.h
  • IfxVadc_ChannelId_9 : IfxVadc.h
  • IfxVadc_ChannelId_none : IfxVadc.h
  • IfxVadc_ChannelReference : IfxVadc.h
  • IfxVadc_ChannelReference_channel0 : IfxVadc.h
  • IfxVadc_ChannelReference_standard : IfxVadc.h
  • IfxVadc_ChannelResolution : IfxVadc.h
  • IfxVadc_ChannelResolution_10bit : IfxVadc.h
  • IfxVadc_ChannelResolution_10bitFast : IfxVadc.h
  • IfxVadc_ChannelResolution_12bit : IfxVadc.h
  • IfxVadc_ChannelResolution_8bit : IfxVadc.h
  • IfxVadc_ChannelResult : IfxVadc.h
  • IfxVadc_ChannelResult_0 : IfxVadc.h
  • IfxVadc_ChannelResult_1 : IfxVadc.h
  • IfxVadc_ChannelResult_10 : IfxVadc.h
  • IfxVadc_ChannelResult_11 : IfxVadc.h
  • IfxVadc_ChannelResult_12 : IfxVadc.h
  • IfxVadc_ChannelResult_13 : IfxVadc.h
  • IfxVadc_ChannelResult_14 : IfxVadc.h
  • IfxVadc_ChannelResult_15 : IfxVadc.h
  • IfxVadc_ChannelResult_2 : IfxVadc.h
  • IfxVadc_ChannelResult_3 : IfxVadc.h
  • IfxVadc_ChannelResult_4 : IfxVadc.h
  • IfxVadc_ChannelResult_5 : IfxVadc.h
  • IfxVadc_ChannelResult_6 : IfxVadc.h
  • IfxVadc_ChannelResult_7 : IfxVadc.h
  • IfxVadc_ChannelResult_8 : IfxVadc.h
  • IfxVadc_ChannelResult_9 : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle_binary : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle_channelNumber : IfxVadc.h
  • IfxVadc_clearAllResultRequests() : IfxVadc.h
  • IfxVadc_clearChannelRequest() : IfxVadc.h
  • IfxVadc_clearQueue() : IfxVadc.h
  • IfxVadc_configExternalMultiplexerMode() : IfxVadc.c , IfxVadc.h
  • IfxVadc_configureWaitForReadMode() : IfxVadc.h
  • IfxVadc_configureWaitForReadModeForGlobalResultRegister() : IfxVadc.h
  • IfxVadc_ConversionType : IfxVadc.h
  • IfxVadc_ConversionType_Compatible : IfxVadc.h
  • IFXVADC_DEFAULT_ANALOG_FREQ : IfxVadc_cfg.h
  • IfxVadc_disableAccess() : IfxVadc.c , IfxVadc.h
  • IfxVadc_disableModule() : IfxVadc.h
  • IfxVadc_disablePostCalibration() : IfxVadc.h , IfxVadc.c
  • IfxVadc_disableQueueSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_disableScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_EMUX00_P02_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX00_P33_3_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX01_P02_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX01_P33_2_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX02_P02_8_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX02_P33_1_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX10_P00_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX10_P33_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX11_P00_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX11_P33_5_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX12_P00_8_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX12_P33_4_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_Emux_Out_pinTable : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EmuxCodingScheme : IfxVadc.h
  • IfxVadc_EmuxCodingScheme_binary : IfxVadc.h
  • IfxVadc_EmuxCodingScheme_gray : IfxVadc.h
  • IfxVadc_EmuxInterface : IfxVadc.h
  • IfxVadc_EmuxInterface_0 : IfxVadc.h
  • IfxVadc_EmuxInterface_1 : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl_always : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl_settingChanges : IfxVadc.h
  • IfxVadc_EmuxSelectValue : IfxVadc.h
  • IfxVadc_EmuxSelectValue_0 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_1 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_2 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_3 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_4 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_5 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_6 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_7 : IfxVadc.h
  • IfxVadc_enableAccess() : IfxVadc.c , IfxVadc.h
  • IfxVadc_enableBackgroundScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableFifoMode() : IfxVadc.h
  • IfxVadc_enableGroupSync() : IfxVadc.c , IfxVadc.h
  • IfxVadc_enableModule() : IfxVadc.h
  • IfxVadc_enableQueueSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableServiceRequest() : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_sequence : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_singleStep : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_softwareControl : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_steady : IfxVadc.h
  • IfxVadc_FifoMode : IfxVadc.h
  • IfxVadc_FifoMode_fifoStructure : IfxVadc.h
  • IfxVadc_FifoMode_maximumMode : IfxVadc.h
  • IfxVadc_FifoMode_minimumMode : IfxVadc.h
  • IfxVadc_FifoMode_seperateResultRegister : IfxVadc.h
  • IfxVadc_G0_0_AN0_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_10_AN10_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_11_AN11_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_12_AN12_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_13_AN13_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_1_AN1_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_2_AN2_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_3_AN3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_4_AN4_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_5_AN5_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_6_AN6_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_7_AN7_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_8_AN8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL0_P33_4_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL1_P33_5_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0BFL2_P33_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL3_P33_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_0_AN16_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_10_AN26_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_10_P40_2_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_11_AN27_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_11_P40_3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_12_AN28_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_13_AN29_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_1_AN17_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_2_AN18_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_3_AN19_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_4_AN20_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_5_AN21_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_8_AN24_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_8_P40_0_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_9_AN25_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_9_P40_1_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1BFL0_P33_0_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1BFL1_P33_1_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1BFL2_P33_2_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1BFL3_P33_3_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_0_AN32_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_10_AN44_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_11_AN45_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_12_AN46_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_13_AN47_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_14_AN48_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_15_AN49_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_1_AN33_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_3_AN35_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_4_AN36_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_4_P40_6_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_5_AN37_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_5_P40_7_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_6_AN38_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_6_P40_8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_7_AN39_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_7_P40_9_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL0_P00_4_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL1_P00_5_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL2_P00_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL3_P00_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_0_P00_12_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_10_P00_2_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_11_P00_1_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_1_P00_11_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_2_P00_10_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_3_P00_9_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_4_P00_8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_5_P00_7_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_6_P00_6_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_7_P00_5_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_8_P00_4_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_9_P00_3_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3BFL0_P10_0_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3BFL0_P10_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL1_P10_1_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3BFL1_P10_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL2_P10_2_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL3_P10_3_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_GatingMode : IfxVadc.h
  • IfxVadc_GatingMode_always : IfxVadc.h
  • IfxVadc_GatingMode_disabled : IfxVadc.h
  • IfxVadc_GatingMode_gatingHigh : IfxVadc.h
  • IfxVadc_GatingMode_gatingLow : IfxVadc.h
  • IfxVadc_GatingSource : IfxVadc.h
  • IfxVadc_GatingSource_0 : IfxVadc.h
  • IfxVadc_GatingSource_1 : IfxVadc.h
  • IfxVadc_GatingSource_10 : IfxVadc.h
  • IfxVadc_GatingSource_11 : IfxVadc.h
  • IfxVadc_GatingSource_12 : IfxVadc.h
  • IfxVadc_GatingSource_13 : IfxVadc.h
  • IfxVadc_GatingSource_14 : IfxVadc.h
  • IfxVadc_GatingSource_15 : IfxVadc.h
  • IfxVadc_GatingSource_2 : IfxVadc.h
  • IfxVadc_GatingSource_3 : IfxVadc.h
  • IfxVadc_GatingSource_4 : IfxVadc.h
  • IfxVadc_GatingSource_5 : IfxVadc.h
  • IfxVadc_GatingSource_6 : IfxVadc.h
  • IfxVadc_GatingSource_7 : IfxVadc.h
  • IfxVadc_GatingSource_8 : IfxVadc.h
  • IfxVadc_GatingSource_9 : IfxVadc.h
  • IfxVadc_getAdcAnalogFrequency() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getAdcCalibrationActiveState() : IfxVadc.h
  • IfxVadc_getAdcDigitalFrequency() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getAdcModuleFrequency() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getArbiterRoundLength() : IfxVadc.h
  • IfxVadc_getAssignedChannels() : IfxVadc.h
  • IfxVadc_getBackgroundScanGatingMode() : IfxVadc.h
  • IfxVadc_getBackgroundScanGatingSource() : IfxVadc.h
  • IfxVadc_getBackgroundScanSlotPriority() : IfxVadc.h
  • IfxVadc_getBackgroundScanSlotStartMode() : IfxVadc.h
  • IfxVadc_getBackgroundScanStatus() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getBackgroundScanTriggerInput() : IfxVadc.h
  • IfxVadc_getBackgroundScanTriggerMode() : IfxVadc.h
  • IfxVadc_getChannelControlConfig() : IfxVadc.h
  • IfxVadc_getChannelConversionTime() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getChannelInputClass() : IfxVadc.h
  • IfxVadc_getChannelResultServiceRequestNodePointer0() : IfxVadc.h
  • IfxVadc_getChannelResultServiceRequestNodePointer1() : IfxVadc.h
  • IfxVadc_getChannelServiceRequestNodePointer0() : IfxVadc.h
  • IfxVadc_getChannelServiceRequestNodePointer1() : IfxVadc.h
  • IfxVadc_getDebugResult() : IfxVadc.h
  • IfxVadc_getEmuxGlobalResolution() : IfxVadc.h
  • IfxVadc_getEmuxGlobalSampleTime() : IfxVadc.h
  • IfxVadc_getEmuxGroupResolution() : IfxVadc.h
  • IfxVadc_getEmuxGroupSampleTime() : IfxVadc.h
  • IfxVadc_getGlobalConfigValue() : IfxVadc.h
  • IfxVadc_getGlobalResolution() : IfxVadc.h
  • IfxVadc_getGlobalResult() : IfxVadc.h
  • IfxVadc_getGlobalSampleTime() : IfxVadc.h
  • IfxVadc_getGroupResolution() : IfxVadc.h
  • IfxVadc_getGroupResult() : IfxVadc.h
  • IfxVadc_getGroupSampleTime() : IfxVadc.h
  • IfxVadc_getMasterIndex() : IfxVadc.h
  • IfxVadc_getQueueSlotGatingMode() : IfxVadc.h
  • IfxVadc_getQueueSlotGatingSource() : IfxVadc.h
  • IfxVadc_getQueueSlotPriority() : IfxVadc.h
  • IfxVadc_getQueueSlotStartMode() : IfxVadc.h
  • IfxVadc_getQueueSlotTriggerInput() : IfxVadc.h
  • IfxVadc_getQueueSlotTriggerMode() : IfxVadc.h
  • IfxVadc_getQueueStatus() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getResult() : IfxVadc.h
  • IfxVadc_getResultBasedOnRequestSource() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getScanSlotGatingMode() : IfxVadc.h
  • IfxVadc_getScanSlotGatingSource() : IfxVadc.h
  • IfxVadc_getScanSlotPriority() : IfxVadc.h
  • IfxVadc_getScanSlotStartMode() : IfxVadc.h
  • IfxVadc_getScanSlotTriggerInput() : IfxVadc.h
  • IfxVadc_getScanSlotTriggerMode() : IfxVadc.h
  • IfxVadc_getScanStatus() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getSrcAddress() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getStartupCalibration() : IfxVadc.h
  • IfxVadc_GroupId : IfxVadc_cfg.h
  • IfxVadc_GroupId_0 : IfxVadc_cfg.h
  • IfxVadc_GroupId_1 : IfxVadc_cfg.h
  • IfxVadc_GroupId_2 : IfxVadc_cfg.h
  • IfxVadc_GroupId_3 : IfxVadc_cfg.h
  • IfxVadc_GroupId_global0 : IfxVadc_cfg.h
  • IfxVadc_GroupId_global1 : IfxVadc_cfg.h
  • IfxVadc_GxBfl_Out_pinTable : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_initEmuxPin() : IfxVadc.h
  • IfxVadc_initGxBflPin() : IfxVadc.h
  • IfxVadc_initialiseAdcArbiterClock() : IfxVadc.c , IfxVadc.h
  • IfxVadc_initialiseAdcConverterClock() : IfxVadc.c , IfxVadc.h
  • IfxVadc_initializeFAdcD() : IfxVadc.h , IfxVadc.c
  • IfxVadc_initializeFAdcI() : IfxVadc.h , IfxVadc.c
  • IfxVadc_initiateStartupCalibration() : IfxVadc.h
  • IfxVadc_InputClasses : IfxVadc.h
  • IfxVadc_InputClasses_global0 : IfxVadc.h
  • IfxVadc_InputClasses_global1 : IfxVadc.h
  • IfxVadc_InputClasses_group0 : IfxVadc.h
  • IfxVadc_InputClasses_group1 : IfxVadc.h
  • IfxVadc_isAutoBackgroundScanEnabled() : IfxVadc.h
  • IfxVadc_isAutoScanEnabled() : IfxVadc.h
  • IfxVadc_isPostCalibration() : IfxVadc.c , IfxVadc.h
  • IfxVadc_isRequestBackgroundScanSlotEnabled() : IfxVadc.h
  • IfxVadc_isRequestQueueSlotEnabled() : IfxVadc.h
  • IfxVadc_isRequestScanSlotEnabled() : IfxVadc.h
  • IfxVadc_LimitCheck : IfxVadc.h
  • IfxVadc_LimitCheck_always : IfxVadc.h
  • IfxVadc_LimitCheck_eventIfInArea : IfxVadc.h
  • IfxVadc_LimitCheck_eventIfOutsideArea : IfxVadc.h
  • IfxVadc_LimitCheck_noCheck : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect_3V : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect_5V : IfxVadc.h
  • IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_CAL_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_COMMON_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_EMUX_INTERFACE : IfxVadc_cfg.h
  • IFXVADC_NUM_GLOBAL_INPUTCLASSES : IfxVadc_cfg.h
  • IFXVADC_NUM_INPUTCLASSES : IfxVadc_cfg.h
  • IFXVADC_NUM_MODULES : IfxVadc_cfg.h
  • IFXVADC_NUM_REQUESTSLOTS : IfxVadc_cfg.h
  • IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_NUM_GROUPS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_NUM_MODULES : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS : IfxVadc_PinMap.h
  • IfxVadc_Protection : IfxVadc.h
  • IfxVadc_Protection_channelControl0 : IfxVadc.h
  • IfxVadc_Protection_channelControl1 : IfxVadc.h
  • IfxVadc_Protection_channelControl10 : IfxVadc.h
  • IfxVadc_Protection_channelControl11 : IfxVadc.h
  • IfxVadc_Protection_channelControl12 : IfxVadc.h
  • IfxVadc_Protection_channelControl13 : IfxVadc.h
  • IfxVadc_Protection_channelControl14 : IfxVadc.h
  • IfxVadc_Protection_channelControl2 : IfxVadc.h
  • IfxVadc_Protection_channelControl3 : IfxVadc.h
  • IfxVadc_Protection_channelControl4 : IfxVadc.h
  • IfxVadc_Protection_channelControl5 : IfxVadc.h
  • IfxVadc_Protection_channelControl6 : IfxVadc.h
  • IfxVadc_Protection_channelControl7 : IfxVadc.h
  • IfxVadc_Protection_channelControl8 : IfxVadc.h
  • IfxVadc_Protection_channelControl9 : IfxVadc.h
  • IfxVadc_Protection_externalMultiplexer : IfxVadc.h
  • IfxVadc_Protection_globalConfig : IfxVadc.h
  • IfxVadc_Protection_initGroup0 : IfxVadc.h
  • IfxVadc_Protection_initGroup1 : IfxVadc.h
  • IfxVadc_Protection_initGroup10 : IfxVadc.h
  • IfxVadc_Protection_initGroup11 : IfxVadc.h
  • IfxVadc_Protection_initGroup12 : IfxVadc.h
  • IfxVadc_Protection_initGroup13 : IfxVadc.h
  • IfxVadc_Protection_initGroup14 : IfxVadc.h
  • IfxVadc_Protection_initGroup2 : IfxVadc.h
  • IfxVadc_Protection_initGroup3 : IfxVadc.h
  • IfxVadc_Protection_initGroup4 : IfxVadc.h
  • IfxVadc_Protection_initGroup5 : IfxVadc.h
  • IfxVadc_Protection_initGroup6 : IfxVadc.h
  • IfxVadc_Protection_initGroup7 : IfxVadc.h
  • IfxVadc_Protection_initGroup8 : IfxVadc.h
  • IfxVadc_Protection_initGroup9 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup0 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup1 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup10 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup11 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup12 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup13 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup14 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup2 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup3 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup4 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup5 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup6 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup7 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup8 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup9 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup0 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup1 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup10 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup11 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup12 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup13 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup14 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup2 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup3 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup4 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup5 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup6 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup7 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup8 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup9 : IfxVadc.h
  • IfxVadc_Protection_testFunction : IfxVadc.h
  • IFXVADC_QUEUE_REFILL : IfxVadc_cfg.h
  • IfxVadc_RequestSlotPriority : IfxVadc.h
  • IfxVadc_RequestSlotPriority_high : IfxVadc.h
  • IfxVadc_RequestSlotPriority_highest : IfxVadc.h
  • IfxVadc_RequestSlotPriority_low : IfxVadc.h
  • IfxVadc_RequestSlotPriority_lowest : IfxVadc.h
  • IfxVadc_RequestSlotStartMode : IfxVadc.h
  • IfxVadc_RequestSlotStartMode_cancelInjectRepeat : IfxVadc.h
  • IfxVadc_RequestSlotStartMode_waitForStart : IfxVadc.h
  • IfxVadc_RequestSource : IfxVadc.h
  • IfxVadc_RequestSource_background : IfxVadc.h
  • IfxVadc_RequestSource_queue : IfxVadc.h
  • IfxVadc_RequestSource_scan : IfxVadc.h
  • IfxVadc_resetGroup() : IfxVadc.h
  • IfxVadc_resetKernel() : IfxVadc.c , IfxVadc.h
  • IFXVADC_SAMPLETIME_MIN : IfxVadc_cfg.h
  • IfxVadc_selectPowerSupplyVoltage() : IfxVadc.c , IfxVadc.h
  • IfxVadc_setAnalogConvertControl() : IfxVadc.h
  • IfxVadc_setArbiterPriority() : IfxVadc.c , IfxVadc.h
  • IfxVadc_setArbitrationRoundLength() : IfxVadc.h
  • IfxVadc_setAutoBackgroundScan() : IfxVadc.h
  • IfxVadc_setAutoScan() : IfxVadc.h
  • IfxVadc_setBackgroundPriorityChannel() : IfxVadc.h
  • IfxVadc_setBackgroundResultTarget() : IfxVadc.h
  • IfxVadc_setBackgroundScan() : IfxVadc.h
  • IfxVadc_setBackgroundScanSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setBackgroundScanSlotTriggerConfig() : IfxVadc.h
  • IfxVadc_setBoundaryMode() : IfxVadc.h
  • IfxVadc_setChannelEventNodePointer0() : IfxVadc.h
  • IfxVadc_setChannelEventNodePointer1() : IfxVadc.h
  • IfxVadc_setChannelInputClass() : IfxVadc.h
  • IfxVadc_setChannelLimitCheckMode() : IfxVadc.h
  • IfxVadc_setEmuxGlobalResolution() : IfxVadc.h
  • IfxVadc_setEmuxGlobalSampleTime() : IfxVadc.h
  • IfxVadc_setEmuxGroupResolution() : IfxVadc.h
  • IfxVadc_setEmuxGroupSampletime() : IfxVadc.h
  • IfxVadc_setEmuxInterfaceForGroup() : IfxVadc.h
  • IfxVadc_setGlobalResolution() : IfxVadc.h
  • IfxVadc_setGlobalSampleTime() : IfxVadc.h
  • IfxVadc_setGroupPriorityChannel() : IfxVadc.h
  • IfxVadc_setGroupResolution() : IfxVadc.h
  • IfxVadc_setGroupSampleTime() : IfxVadc.h
  • IfxVadc_setLowerBoundary() : IfxVadc.h
  • IfxVadc_setMasterIndex() : IfxVadc.h
  • IfxVadc_setQueueSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setQueueSlotTriggerOperatingConfig() : IfxVadc.h
  • IfxVadc_setReferenceInput() : IfxVadc.h
  • IfxVadc_setResultNodeEventPointer0() : IfxVadc.h
  • IfxVadc_setResultNodeEventPointer1() : IfxVadc.h
  • IfxVadc_setResultPosition() : IfxVadc.h
  • IfxVadc_setScan() : IfxVadc.c , IfxVadc.h
  • IfxVadc_setScanSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setScanSlotTriggerConfig() : IfxVadc.h
  • IfxVadc_setSleepMode() : IfxVadc.h
  • IfxVadc_setSyncRequest() : IfxVadc.h
  • IfxVadc_setUpperBoundary() : IfxVadc.h
  • IfxVadc_SleepMode : IfxVadc.h
  • IfxVadc_SleepMode_disable : IfxVadc.h
  • IfxVadc_SleepMode_enable : IfxVadc.h
  • IfxVadc_SrcNr : IfxVadc.h
  • IfxVadc_SrcNr_group0 : IfxVadc.h
  • IfxVadc_SrcNr_group1 : IfxVadc.h
  • IfxVadc_SrcNr_group2 : IfxVadc.h
  • IfxVadc_SrcNr_group3 : IfxVadc.h
  • IfxVadc_SrcNr_shared0 : IfxVadc.h
  • IfxVadc_SrcNr_shared1 : IfxVadc.h
  • IfxVadc_SrcNr_shared2 : IfxVadc.h
  • IfxVadc_SrcNr_shared3 : IfxVadc.h
  • IfxVadc_startBackgroundScan() : IfxVadc.h
  • IfxVadc_startQueue() : IfxVadc.h
  • IfxVadc_startScan() : IfxVadc.h
  • IfxVadc_startupCalibration() : IfxVadc.c , IfxVadc.h
  • IfxVadc_Status : IfxVadc.h
  • IfxVadc_Status_channelsStillPending : IfxVadc.h
  • IfxVadc_Status_invalidChannel : IfxVadc.h
  • IfxVadc_Status_invalidGroup : IfxVadc.h
  • IfxVadc_Status_noAccess : IfxVadc.h
  • IfxVadc_Status_noError : IfxVadc.h
  • IfxVadc_Status_notInitialised : IfxVadc.h
  • IfxVadc_Status_queueFull : IfxVadc.h
  • IfxVadc_storeGroupResult() : IfxVadc.h
  • IfxVadc_TriggerMode : IfxVadc.h
  • IfxVadc_TriggerMode_noExternalTrigger : IfxVadc.h
  • IfxVadc_TriggerMode_uponAnyEdge : IfxVadc.h
  • IfxVadc_TriggerMode_uponFallingEdge : IfxVadc.h
  • IfxVadc_TriggerMode_uponRisingEdge : IfxVadc.h
  • IfxVadc_TriggerSource : IfxVadc.h
  • IfxVadc_TriggerSource_0 : IfxVadc.h
  • IfxVadc_TriggerSource_1 : IfxVadc.h
  • IfxVadc_TriggerSource_10 : IfxVadc.h
  • IfxVadc_TriggerSource_11 : IfxVadc.h
  • IfxVadc_TriggerSource_12 : IfxVadc.h
  • IfxVadc_TriggerSource_13 : IfxVadc.h
  • IfxVadc_TriggerSource_14 : IfxVadc.h
  • IfxVadc_TriggerSource_15 : IfxVadc.h
  • IfxVadc_TriggerSource_2 : IfxVadc.h
  • IfxVadc_TriggerSource_3 : IfxVadc.h
  • IfxVadc_TriggerSource_4 : IfxVadc.h
  • IfxVadc_TriggerSource_5 : IfxVadc.h
  • IfxVadc_TriggerSource_6 : IfxVadc.h
  • IfxVadc_TriggerSource_7 : IfxVadc.h
  • IfxVadc_TriggerSource_8 : IfxVadc.h
  • IfxVadc_TriggerSource_9 : IfxVadc.h
  • IfxVadc_Vadcg_In_pinTable : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • initTime() : Bsp.c , Bsp.h
  • insert : IfxCpu_IntrinsicsDcc.h
  • isDeadLine() : Bsp.h
  • ISSPACE : Ifx_Shell.c
  • isync : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- l -

  • laccum : Ifx_TypesTasking.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h
  • LOW_BYTE_FIRST : Platform_Types.h
  • LSB_FIRST : Platform_Types.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- m -

  • max : IfxCpu_IntrinsicsDcc.h
  • mfcr : IfxCpu_IntrinsicsDcc.h
  • min : IfxCpu_IntrinsicsDcc.h
  • MSB_FIRST : Platform_Types.h
  • mtcr : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- n -

  • nop : IfxCpu_IntrinsicsDcc.h
  • NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • now() : Bsp.h
  • nowWithoutCriticalSection() : Bsp.h
  • NULL_PTR : Compilers.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- p -

  • pchar : Ifx_Types.h
  • PIN_DRIVER_STRONG_SHARP : Bsp.h
  • Pin_enableEmgStop : Bsp.h
  • Pin_getGroupState : Bsp.h
  • Pin_getState : Bsp.h
  • Pin_setDriver : Bsp.h
  • Pin_setGroupModeInput : Bsp.h
  • Pin_setGroupModeOutput : Bsp.h
  • Pin_setGroupState : Bsp.h
  • Pin_setMode : Bsp.h
  • Pin_setState : Bsp.h
  • Pin_setStateHigh : Bsp.h
  • Pin_setStateLow : Bsp.h
  • PLATFORM_AR_RELEASE_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_MINOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_REVISION_VERSION : Platform_Types.h
  • PLATFORM_SW_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_SW_MINOR_VERSION : Platform_Types.h
  • PLATFORM_SW_PATCH_VERSION : Platform_Types.h
  • PLATFORM_VENDOR_ID : Platform_Types.h
  • poll() : Bsp.h
  • pvoid : Ifx_Types.h
  • PwmHl : PwmHl.h
  • PwmHl_Pause : PwmHl.h
  • PwmHl_Resume : PwmHl.h
  • PwmHl_Start : PwmHl.h
  • PwmHl_Stop : PwmHl.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- r -

  • restore : IfxCpu_IntrinsicsDcc.h
  • restoreInterrupts() : Bsp.h
  • round_f() : Ifx_AngleTrkF32.c
  • rslcx : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- s -

  • sfract : Ifx_TypesTasking.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h , Ifx_TypesGhs.h
  • SHELL_HELP_DESCRIPTION_TEXT : Ifx_Shell.h
  • sint16 : Platform_Types.h
  • sint16_least : Platform_Types.h
  • sint32 : Platform_Types.h
  • sint32_least : Platform_Types.h
  • sint64 : Platform_Types.h
  • sint8 : Platform_Types.h
  • sint8_least : Platform_Types.h
  • SpiIf : SpiIf.h
  • SpiIf_Cbk : SpiIf.h
  • SpiIf_Ch : SpiIf.h
  • SpiIf_ChConfig : SpiIf.h
  • SpiIf_ClockPolarity : SpiIf.h
  • SpiIf_ClockPolarity_idleHigh : SpiIf.h
  • SpiIf_ClockPolarity_idleLow : SpiIf.h
  • SpiIf_DataHeading : SpiIf.h
  • SpiIf_DataHeading_lsbFirst : SpiIf.h
  • SpiIf_DataHeading_msbFirst : SpiIf.h
  • SpiIf_exchange() : SpiIf.h
  • SpiIf_Exchange : SpiIf.h
  • SpiIf_GetStatus : SpiIf.h
  • SpiIf_getStatus() : SpiIf.h
  • SpiIf_initChannelConfig() : SpiIf.c , SpiIf.h
  • SpiIf_initConfig() : SpiIf.c , SpiIf.h
  • SpiIf_Mode : SpiIf.h
  • SpiIf_Mode_master : SpiIf.h
  • SpiIf_Mode_slave : SpiIf.h
  • SpiIf_Mode_undefined : SpiIf.h
  • SpiIf_OnEvent : SpiIf.h
  • SpiIf_ShiftClock : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge : SpiIf.h
  • SpiIf_SlsoTiming : SpiIf.h
  • SpiIf_SlsoTiming_0 : SpiIf.h
  • SpiIf_SlsoTiming_1 : SpiIf.h
  • SpiIf_SlsoTiming_2 : SpiIf.h
  • SpiIf_SlsoTiming_3 : SpiIf.h
  • SpiIf_SlsoTiming_4 : SpiIf.h
  • SpiIf_SlsoTiming_5 : SpiIf.h
  • SpiIf_SlsoTiming_6 : SpiIf.h
  • SpiIf_SlsoTiming_7 : SpiIf.h
  • SpiIf_SlsoTiming_HalfTsclk : SpiIf.h
  • SpiIf_Status : SpiIf.h
  • SpiIf_Status_busy : SpiIf.h
  • SpiIf_Status_ok : SpiIf.h
  • SpiIf_Status_unknown : SpiIf.h
  • SpiIf_wait() : SpiIf.h
  • STDIF_DPIPE_MAX_PRINT_SIZE : IfxStdIf_DPipe.h
  • STRINGIFY : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • svlcx : IfxCpu_IntrinsicsDcc.h
  • syscall : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- t -

  • t : IfxCpu_IntrinsicsDcc.h
  • TIME_INFINITE : Ifx_Types.h
  • TIME_NULL : Ifx_Types.h
  • TimeConst : Bsp.c , Bsp.h
  • TimeConst_0s : Bsp.h
  • TimeConst_100ms : Bsp.h
  • TimeConst_100ns : Bsp.h
  • TimeConst_100s : Bsp.h
  • TimeConst_100us : Bsp.h
  • TimeConst_10ms : Bsp.h
  • TimeConst_10ns : Bsp.h
  • TimeConst_10s : Bsp.h
  • TimeConst_10us : Bsp.h
  • TimeConst_1ms : Bsp.h
  • TimeConst_1s : Bsp.h
  • TimeConst_1us : Bsp.h
  • Timer : Timer.h
  • TIMER_COUNT : Bsp.h
  • Timer_CountOneStep : Timer.h
  • TIMER_INDEX_100MS : Bsp.h
  • TIMER_INDEX_100NS : Bsp.h
  • TIMER_INDEX_100S : Bsp.h
  • TIMER_INDEX_100US : Bsp.h
  • TIMER_INDEX_10MS : Bsp.h
  • TIMER_INDEX_10NS : Bsp.h
  • TIMER_INDEX_10S : Bsp.h
  • TIMER_INDEX_10US : Bsp.h
  • TIMER_INDEX_1MS : Bsp.h
  • TIMER_INDEX_1S : Bsp.h
  • TIMER_INDEX_1US : Bsp.h
  • Timer_Start : Timer.h
  • Timer_StartSingleShotMode : Timer.h
  • Timer_Stop : Timer.h
  • Timer_SynchronousStart : Timer.h
  • Timer_SynchronousStop : Timer.h
  • timingNoInterruptEnd() : Bsp.h
  • timingNoInterruptStart() : Bsp.h
  • TPwm : TPwm.h
  • TPwm_Pause : TPwm.h
  • TPwm_Resume : TPwm.h
  • TPwm_Start : TPwm.h
  • TPwm_Stop : TPwm.h
  • TRUE : Platform_Types.h
  • TxRxHandler : SpiIf.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- u -

  • u : IfxCpu_IntrinsicsDcc.h
  • uint16 : Platform_Types.h
  • uint16_least : Platform_Types.h
  • uint32 : Platform_Types.h
  • uint32_least : Platform_Types.h
  • uint64 : Platform_Types.h
  • uint8 : Platform_Types.h
  • uint8_least : Platform_Types.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- v -

  • VecAvg_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecGain_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecHalfSwap_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMax_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecMaxIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMin_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMinIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecOfs_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecPwrdB_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_SF() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecSum_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecWin_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • voidfunc : IfxCpu_IntrinsicsGhs.h
  • voidfuncvoid : Ifx_Types.h
  • vvoid : Ifx_Types.h


iLLD_TC26B: Globals

Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:

- w -

  • wait() : Bsp.h
  • waitPoll() : Bsp.c , Bsp.h
  • waitTime() : Bsp.h , Bsp.c
  • WaitTimeFunction : Bsp.h
  • wi : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- _ -

  • __abs() : IfxCpu_IntrinsicsDcc.h
  • __absdif() : IfxCpu_IntrinsicsDcc.h
  • __abss() : IfxCpu_IntrinsicsDcc.h
  • __addr_to_cx() : IfxCpu_Intrinsics.h
  • __adds() : IfxCpu_IntrinsicsDcc.h
  • __bisr() : IfxCpu_IntrinsicsDcc.h
  • __cacheawi() : IfxCpu_IntrinsicsDcc.h
  • __clo() : IfxCpu_IntrinsicsDcc.h
  • __cls() : IfxCpu_IntrinsicsDcc.h
  • __clz() : IfxCpu_IntrinsicsDcc.h
  • __cx_to_addr() : IfxCpu_Intrinsics.h
  • __debug() : IfxCpu_IntrinsicsDcc.h
  • __disable() : IfxCpu_IntrinsicsDcc.h
  • __dsync() : IfxCpu_IntrinsicsDcc.h
  • __enable() : IfxCpu_IntrinsicsDcc.h
  • __extr() : IfxCpu_IntrinsicsDcc.h
  • __extru() : IfxCpu_IntrinsicsDcc.h
  • __float_to_sfract() : IfxCpu_IntrinsicsDcc.h
  • __initcirc() : IfxCpu_IntrinsicsDcc.h
  • __ins() : IfxCpu_IntrinsicsDcc.h
  • __insert() : IfxCpu_IntrinsicsDcc.h
  • __insn() : IfxCpu_IntrinsicsDcc.h
  • __isync() : IfxCpu_IntrinsicsDcc.h
  • __ld32() : IfxCpu_Intrinsics.h
  • __ld64() : IfxCpu_Intrinsics.h
  • __ld64_lu() : IfxCpu_Intrinsics.h
  • __ldmst_c() : IfxCpu_Intrinsics.h
  • __max() : IfxCpu_IntrinsicsDcc.h
  • __maxs() : IfxCpu_IntrinsicsDcc.h
  • __maxu() : IfxCpu_IntrinsicsDcc.h
  • __mfcr() : IfxCpu_IntrinsicsDcc.h
  • __min() : IfxCpu_IntrinsicsDcc.h
  • __mins() : IfxCpu_IntrinsicsDcc.h
  • __minu() : IfxCpu_IntrinsicsDcc.h
  • __mtcr() : IfxCpu_IntrinsicsDcc.h
  • __nop() : IfxCpu_IntrinsicsDcc.h
  • __restore() : IfxCpu_IntrinsicsDcc.h
  • __rslcx() : IfxCpu_IntrinsicsDcc.h
  • __scheduling_barrier() : IfxCpu_IntrinsicsDcc.h
  • __st32() : IfxCpu_Intrinsics.h
  • __st64() : IfxCpu_Intrinsics.h
  • __st64_lu() : IfxCpu_Intrinsics.h
  • __svlcx() : IfxCpu_IntrinsicsDcc.h
  • __syscall() : IfxCpu_IntrinsicsDcc.h
  • _Core0_start() : IfxCpu_CStart0.c
  • _Core1_start() : IfxCpu_CStart1.c , IfxCpu_CStart.h
  • _Core2_start() : IfxCpu_CStart.h
  • _START() : IfxCpu_CStart0.c


iLLD_TC26B: Globals

- a -

  • addTTime() : Bsp.h
  • areInterruptsEnabled() : Bsp.h


iLLD_TC26B: Globals

- c -

  • core0_main() : IfxCpu_CStart0.c
  • core1_main() : IfxCpu_CStart1.c
  • CplxVecCpy_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecCpy_f32S() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecMag_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • CplxVecMul_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecPwr_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • CplxVecRst_f32() : Ifx_Cf32.h , Ifx_Cf32.c


iLLD_TC26B: Globals

- d -

  • DateTime_get() : Ifx_DateTime.c , Ifx_DateTime.h
  • DateTime_set() : Ifx_DateTime.h , Ifx_DateTime.c
  • disableInterrupts() : Bsp.h


iLLD_TC26B: Globals

- e -

  • elapsed() : Bsp.h
  • enableInterrupts() : Bsp.h


iLLD_TC26B: Globals

- f -

  • forceDisableInterrupts() : Bsp.h


iLLD_TC26B: Globals

- g -

  • getDeadLine() : Bsp.h
  • getTimeout() : Bsp.h


iLLD_TC26B: Globals

- i -

  • Ifx__absb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__absdif() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__absh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__abss() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__abssh() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__adds() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__addsu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheai() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheawi() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheawi_bo_post_inc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cacheiwi() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__clo() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__cls() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__clssf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cmpAndSwap() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__crc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__debug() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__disable_and_save() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__dsync() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__extr() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extracthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extracthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extractuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extru() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fabs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fabsf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fixpoint_to_float32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__float_to_fract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__float_to_sfract() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__fract_to_float() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__fract_to_sfract() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__getA11() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__gethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__gethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte2() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • Ifx__getubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__getuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__imaskldmst() : IfxCpu_IntrinsicsDcc.h
  • Ifx__initpackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackbl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initpackhwl() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initupackb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__initupackhw() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ins() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__insert() : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__inserthw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__inserthw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insertuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__insn() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__isync() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__jump_and_link() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpBackToLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpToFunction() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__jumpToFunctionWithLink() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__ldmst() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ldmstAsm() : IfxCpu_IntrinsicsTasking.h
  • Ifx__mac_r_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mac_sf() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__max() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__maxs() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__maxu() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__min() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__minb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minh() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__minhu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mins() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__minu() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__moveToAddrParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__moveToDataParam0() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__moveToDataParamRet() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mulfractfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mulfractlong() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__mulsc() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__non_return_call() : IfxCpu_IntrinsicsDcc.h
  • Ifx__nop() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__nops() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__nops1000() : IfxCpu_IntrinsicsDcc.h
  • Ifx__parity() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__popcnt() : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__restore() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__rol() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__ror() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__round16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__rslcx() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__s16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__satb() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__satbu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sath() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sathu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setbyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sethw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sethw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setStackPointer() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__setubyte1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte3() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setubyte4() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setuhw1() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__setuhw2() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sfract_to_s16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__sfract_to_u16() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shaaccum() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shafracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__shasfracts() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__stopPerfCounters() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__subs() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__subsu() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__svlcx() : IfxCpu_IntrinsicsGnuc.h
  • Ifx__swap() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__u16_to_sfract() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx_AngleTrkF32_bound() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_boundInput() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_getAbsolutePosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getDirection() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getFault() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getLoopSpeed() : Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getPeriodPerRotation() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getRawPosition() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getResolution() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getSensorType() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getSpeed() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_getTurn() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_init() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_initConfig() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_reset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_resetFaults() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setControlGains() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_setOffset() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setRefreshPeriod() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_setUserSampling() : Ifx_AngleTrkF32.c
  • Ifx_AngleTrkF32_stdIfPosInit() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_step() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_update() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_AngleTrkF32_updateStatus() : Ifx_AngleTrkF32.c , Ifx_AngleTrkF32.h
  • Ifx_Assert_doLevel() : Assert.c , Assert.h
  • Ifx_Assert_doValidate() : Assert.c , Assert.h
  • Ifx_C_Init() : Compilers.h
  • IFX_Cf32_add() : Ifx_Cf32.h
  • IFX_Cf32_amp() : Ifx_Cf32.h
  • IFX_Cf32_div() : Ifx_Cf32.h
  • IFX_Cf32_dot() : Ifx_Cf32.h
  • IFX_Cf32_exp() : Ifx_Cf32.h
  • IFX_Cf32_mag() : Ifx_Cf32.h
  • IFX_Cf32_mul() : Ifx_Cf32.h
  • IFX_Cf32_reset() : Ifx_Cf32.h
  • IFX_Cf32_saturate() : Ifx_Cf32.h
  • IFX_Cf32_set() : Ifx_Cf32.h
  • IFX_Cf32_sub() : Ifx_Cf32.h
  • Ifx_CircularBuffer_addDataIncr() : Ifx_CircularBuffer.c
  • Ifx_CircularBuffer_get16() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_get32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_read32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_read8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_write32() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_CircularBuffer_write8() : Ifx_CircularBuffer.c , Ifx_CircularBuffer.h
  • Ifx_ClpxFloat32_Integral_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_ClpxFloat32_Integral_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_ClpxFloat32_Integral_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_Console_decrAlign() : Ifx_Console.h
  • Ifx_Console_getIo() : Ifx_Console.h
  • Ifx_Console_incrAlign() : Ifx_Console.h
  • Ifx_Console_init() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Console_print() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Console_printAlign() : Ifx_Console.c , Ifx_Console.h
  • Ifx_Crc_bitByBit() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_bitByBitFast() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_createTable() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_init() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_reflect() : Ifx_Crc.c
  • Ifx_Crc_table() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_Crc_tableFast() : Ifx_Crc.c , Ifx_Crc.h
  • Ifx_FftF32_generateTwiddleFactor() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_lookUpReversedBits() : Ifx_FftF32.h
  • Ifx_FftF32_lookUpTwiddleFactor() : Ifx_FftF32.h
  • Ifx_FftF32_radix2() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_radix2DecimationInTime() : Ifx_FftF32.c
  • Ifx_FftF32_radix2I() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_FftF32_reverseBits() : Ifx_FftF32.c , Ifx_FftF32.h
  • Ifx_Fifo_canReadCount() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_canWriteCount() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_clear() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_create() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_destroy() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_flush() : Ifx_Fifo.h
  • Ifx_Fifo_init() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_isEmpty() : Ifx_Fifo.h
  • Ifx_Fifo_read() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_readCount() : Ifx_Fifo.h
  • Ifx_Fifo_write() : Ifx_Fifo.c , Ifx_Fifo.h
  • Ifx_Fifo_writeCount() : Ifx_Fifo.h
  • Ifx_GlobalResources_get() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getIndex() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getItem() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_getName() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_GlobalResources_init() : Ifx_GlobalResources.c , Ifx_GlobalResources.h
  • Ifx_IntegralF32_init() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_IntegralF32_reset() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_IntegralF32_step() : Ifx_IntegralF32.c , Ifx_IntegralF32.h
  • Ifx_InternalMux_init() : Ifx_InternalMux.c , Ifx_InternalMux.h
  • Ifx_LowPassPt1F32_do() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h
  • Ifx_LowPassPt1F32_init() : Ifx_LowPassPt1F32.c , Ifx_LowPassPt1F32.h
  • Ifx_LowPassPt1F32_reset() : Ifx_LowPassPt1F32.h
  • Ifx_LutAtan2F32_float32() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutAtan2F32_float32Private() : Ifx_LutAtan2F32.c
  • Ifx_LutAtan2F32_fxpAngle() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutAtan2F32_fxpAnglePrivate() : Ifx_LutAtan2F32.c
  • Ifx_LutAtan2F32_init() : Ifx_LutAtan2F32.c , Ifx_LutAtan2F32.h
  • Ifx_LutIndexedLinearF32_search() : Ifx_LutIndexedLinearF32.h
  • Ifx_LutLinearF32_searchBin() : Ifx_LutLinearF32.c , Ifx_LutLinearF32.h
  • Ifx_LutLinearF32_searchNegSeq() : Ifx_LutLinearF32.h
  • Ifx_LutLinearF32_searchPosSeq() : Ifx_LutLinearF32.h
  • Ifx_LutLSincosF32_cos() : Ifx_LutLSincosF32.h
  • Ifx_LutLSincosF32_cossin() : Ifx_LutLSincosF32.h
  • Ifx_LutLSincosF32_sin() : Ifx_LutLSincosF32.h
  • Ifx_LutSincosF32_cos() : Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_cossin() : Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_init() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h
  • Ifx_LutSincosF32_sin() : Ifx_LutSincosF32.c , Ifx_LutSincosF32.h
  • Ifx_RampF32_getRef() : Ifx_RampF32.h
  • Ifx_RampF32_getValue() : Ifx_RampF32.h
  • Ifx_RampF32_init() : Ifx_RampF32.h
  • Ifx_RampF32_reset() : Ifx_RampF32.h
  • Ifx_RampF32_setRef() : Ifx_RampF32.h
  • Ifx_RampF32_setSlewRate() : Ifx_RampF32.h
  • Ifx_RampF32_step() : Ifx_RampF32.c , Ifx_RampF32.h
  • Ifx_Shell_bbProtocolStart() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_cmdEscapeProcess() : Ifx_Shell.c
  • Ifx_Shell_commandFind() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_commandListFind() : Ifx_Shell.c
  • Ifx_Shell_deinit() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_disable() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_enable() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_execute() : Ifx_Shell.c
  • Ifx_Shell_init() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_initConfig() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_isEndOfLine() : Ifx_Shell.c
  • Ifx_Shell_matchToken() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseAddress() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseFloat32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseFloat64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseSInt32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseSInt64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseToken() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseUInt32() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_parseUInt64() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_printSyntax() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_process() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_protocolStart() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelp() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelpSingle() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_Shell_showHelpSingleCommand() : Ifx_Shell.c
  • Ifx_Shell_skipWhitespace() : Ifx_Shell.c , Ifx_Shell.h
  • Ifx_WndF32_apply() : Ifx_WndF32.h
  • IfxAsclin_Asc_blockingRead() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_blockingWrite() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_canReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_canWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_clearRx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_clearTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_disableModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_flushTx() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getReadCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getReadEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getTxTimeStamp() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getWriteCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_getWriteEvent() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initiateTransmission() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initModule() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_initModuleConfig() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrError() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrReceive() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_isrTransmit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_read() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_resetSendCount() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_stdIfDPipeInit() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_Asc_write() : IfxAsclin_Asc.c , IfxAsclin_Asc.h
  • IfxAsclin_clearAllFlags() : IfxAsclin.h
  • IfxAsclin_clearBreakDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearCollisionDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearFallingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearFrameErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearHeaderTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_clearKernelResetStatus() : IfxAsclin.h
  • IfxAsclin_clearLinAutoBaudDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearLinChecksumErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearLinParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_clearRaisingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_clearResponseTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_clearRxFifoUnderflowFlag() : IfxAsclin.h
  • IfxAsclin_clearRxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_clearRxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_clearTransmissionCompletedFlag() : IfxAsclin.h
  • IfxAsclin_clearTxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_clearTxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_clearTxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_clearTxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_disableAllFlags() : IfxAsclin.h
  • IfxAsclin_disableModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableAscErrorFlags() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableAutoBaudrateDetection() : IfxAsclin.h
  • IfxAsclin_enableBreakDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableCollisionDetection() : IfxAsclin.h
  • IfxAsclin_enableCollisionDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableCts() : IfxAsclin.h
  • IfxAsclin_enableFallingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableFrameErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableHardwareChecksum() : IfxAsclin.h
  • IfxAsclin_enableHeaderTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_enableLinAutoBaudDetectionErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLinChecksumErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLinParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableLoopBackMode() : IfxAsclin.h
  • IfxAsclin_enableModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_enableParity() : IfxAsclin.h
  • IfxAsclin_enableParityErrorFlag() : IfxAsclin.h
  • IfxAsclin_enableRaisingEdgeDetectedFlag() : IfxAsclin.h
  • IfxAsclin_enableResponseTimeoutFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoInlet() : IfxAsclin.h
  • IfxAsclin_enableRxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_enableRxFifoUnderflowFlag() : IfxAsclin.h
  • IfxAsclin_enableRxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_enableRxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_enableTransmissionCompletedFlag() : IfxAsclin.h
  • IfxAsclin_enableTxFifoFillLevelFlag() : IfxAsclin.h
  • IfxAsclin_enableTxFifoOutlet() : IfxAsclin.h
  • IfxAsclin_enableTxFifoOverflowFlag() : IfxAsclin.h
  • IfxAsclin_enableTxHeaderEndFlag() : IfxAsclin.h
  • IfxAsclin_enableTxResponseEndFlag() : IfxAsclin.h
  • IfxAsclin_flushRxFifo() : IfxAsclin.h
  • IfxAsclin_flushTxFifo() : IfxAsclin.h
  • IfxAsclin_getAddress() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getAllErrorFlagsStatus() : IfxAsclin.h
  • IfxAsclin_getBreakDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getClockSource() : IfxAsclin.h
  • IfxAsclin_getClockStatus() : IfxAsclin.h
  • IfxAsclin_getCollisionDetectionErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getFaFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getFallingEdgeDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getFrameErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getHeaderTimeoutFlagStatus() : IfxAsclin.h
  • IfxAsclin_getIndex() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getKernelResetStatus() : IfxAsclin.h
  • IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getLinChecksumErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getLinParityErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getModuleStatus() : IfxAsclin.h
  • IfxAsclin_getOvsFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getParityErrorFlagStatus() : IfxAsclin.h
  • IfxAsclin_getPdFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getPrescaler() : IfxAsclin.h
  • IfxAsclin_getRaisingEdgeDetectedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getReceiveSignalStatus() : IfxAsclin.h
  • IfxAsclin_getResponseTimeoutFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoFillLevel() : IfxAsclin.h
  • IfxAsclin_getRxFifoFillLevelFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoOutletWidth() : IfxAsclin.h
  • IfxAsclin_getRxFifoOverflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxFifoUnderflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxHeaderEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getRxResponseEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getShiftFrequency() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerEr() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerRx() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getSrcPointerTx() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_getTransmissionCompletedFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTransmitSignalStatus() : IfxAsclin.h
  • IfxAsclin_getTxFifoFillLevel() : IfxAsclin.h
  • IfxAsclin_getTxFifoFillLevelFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxFifoInletWidth() : IfxAsclin.h
  • IfxAsclin_getTxFifoOverflowFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxHeaderEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_getTxResponseEndFlagStatus() : IfxAsclin.h
  • IfxAsclin_initCtsPin() : IfxAsclin.h
  • IfxAsclin_initRtsPin() : IfxAsclin.h
  • IfxAsclin_initRxPin() : IfxAsclin.h
  • IfxAsclin_initSclkPin() : IfxAsclin.h
  • IfxAsclin_initSlsoPin() : IfxAsclin.h
  • IfxAsclin_initTxPin() : IfxAsclin.h
  • IfxAsclin_isModuleSuspended() : IfxAsclin.h
  • IfxAsclin_Lin_checkForReceivedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForReceivedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForTransmittedHeaderFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_checkForTransmittedResponseFlags() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_clearFlagsStatus() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_disableModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_ignoreHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_initModule() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_initModuleConfig() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrError() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrReceive() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_isrTransmit() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_prepareHeaderReception() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_prepareResponseReception() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_readHeader() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_readResponse() : IfxAsclin_Lin.h
  • IfxAsclin_Lin_receiveHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_receiveResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendFrame() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_sendResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForReceivedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForReceivedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForTransmittedHeader() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_Lin_waitForTransmittedResponse() : IfxAsclin_Lin.c , IfxAsclin_Lin.h
  • IfxAsclin_read16() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_read32() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_read8() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_readRxData() : IfxAsclin.h
  • IfxAsclin_resetModule() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBaudrateBitFields() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBitTiming() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setBrdLowerlimt() : IfxAsclin.h
  • IfxAsclin_setBrdUpperlimt() : IfxAsclin.h
  • IfxAsclin_setChecksumInjection() : IfxAsclin.h
  • IfxAsclin_setChecksumMode() : IfxAsclin.h
  • IfxAsclin_setClockPolarity() : IfxAsclin.h
  • IfxAsclin_setClockSource() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_setCtsInput() : IfxAsclin.h
  • IfxAsclin_setDataLength() : IfxAsclin.h
  • IfxAsclin_setDenominator() : IfxAsclin.h
  • IfxAsclin_setDisableModuleRequest() : IfxAsclin.h
  • IfxAsclin_setEnableModuleRequest() : IfxAsclin.h
  • IfxAsclin_setFilterDepth() : IfxAsclin.h
  • IfxAsclin_setFrameMode() : IfxAsclin.h
  • IfxAsclin_setHeaderResponseSelect() : IfxAsclin.h
  • IfxAsclin_setIdleDelay() : IfxAsclin.h
  • IfxAsclin_setKernelResetOne() : IfxAsclin.h
  • IfxAsclin_setKernelResetZero() : IfxAsclin.h
  • IfxAsclin_setLeadDelay() : IfxAsclin.h
  • IfxAsclin_setLinBreakLength() : IfxAsclin.h
  • IfxAsclin_setLinHeaderTimeout() : IfxAsclin.h
  • IfxAsclin_setLinMode() : IfxAsclin.h
  • IfxAsclin_setLinResponseTimeoutMode() : IfxAsclin.h
  • IfxAsclin_setLinResponseTimeoutThreshold() : IfxAsclin.h
  • IfxAsclin_setNumerator() : IfxAsclin.h
  • IfxAsclin_setOversampling() : IfxAsclin.h
  • IfxAsclin_setParityType() : IfxAsclin.h
  • IfxAsclin_setPrescaler() : IfxAsclin.h
  • IfxAsclin_setRtsCtsPolarity() : IfxAsclin.h
  • IfxAsclin_setRxBufferMode() : IfxAsclin.h
  • IfxAsclin_setRxFifoInterruptLevel() : IfxAsclin.h
  • IfxAsclin_setRxFifoOutletWidth() : IfxAsclin.h
  • IfxAsclin_setRxInput() : IfxAsclin.h
  • IfxAsclin_setSampleMode() : IfxAsclin.h
  • IfxAsclin_setSamplePointPosition() : IfxAsclin.h
  • IfxAsclin_setShiftDirection() : IfxAsclin.h
  • IfxAsclin_setSlavePolarity() : IfxAsclin.h
  • IfxAsclin_setSleepMode() : IfxAsclin.h
  • IfxAsclin_setStopBit() : IfxAsclin.h
  • IfxAsclin_setSuspendMode() : IfxAsclin.h
  • IfxAsclin_setTransmitHeaderRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTransmitResponseRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTransmitWakeRequestFlag() : IfxAsclin.h
  • IfxAsclin_setTxFifoInletWidth() : IfxAsclin.h
  • IfxAsclin_setTxFifoInterruptLevel() : IfxAsclin.h
  • IfxAsclin_Spi_disableModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_exchange() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_getStatus() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_initModule() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_initModuleConfig() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrError() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrReceive() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_isrTransmit() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_lock() : IfxAsclin_Spi.c
  • IfxAsclin_Spi_read() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_Spi_unlock() : IfxAsclin_Spi.c
  • IfxAsclin_Spi_write() : IfxAsclin_Spi.c , IfxAsclin_Spi.h
  • IfxAsclin_write16() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_write32() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_write8() : IfxAsclin.c , IfxAsclin.h
  • IfxAsclin_writeTxData() : IfxAsclin.h
  • IfxCcu6_clearAllInterruptStatusFlags() : IfxCcu6.h
  • IfxCcu6_clearCounter() : IfxCcu6.h
  • IfxCcu6_clearDeadTimeCounters() : IfxCcu6.h
  • IfxCcu6_clearInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_clearT12OneNotification() : IfxCcu6.h
  • IfxCcu6_clearT12PeriodNotification() : IfxCcu6.h
  • IfxCcu6_clearT13CompareNotification() : IfxCcu6.h
  • IfxCcu6_connectTrigger() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableAdditionalPrescaler() : IfxCcu6.h
  • IfxCcu6_disableDeadTime() : IfxCcu6.h
  • IfxCcu6_disableDelayBypass() : IfxCcu6.h
  • IfxCcu6_disableInterrupt() : IfxCcu6.h
  • IfxCcu6_disableModulationOutput() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_disableMultiChannelMode() : IfxCcu6.h
  • IfxCcu6_disableShadowTransfer() : IfxCcu6.h
  • IfxCcu6_disableSingleShotMode() : IfxCcu6.h
  • IfxCcu6_disableT13InvertedModulation() : IfxCcu6.h
  • IfxCcu6_disableTimer() : IfxCcu6.h
  • IfxCcu6_disableTrap() : IfxCcu6.h
  • IfxCcu6_disableTrapPin() : IfxCcu6.h
  • IfxCcu6_enableAdditionalPrescaler() : IfxCcu6.h
  • IfxCcu6_enableCountEvent() : IfxCcu6.h
  • IfxCcu6_enableDeadTime() : IfxCcu6.h
  • IfxCcu6_enableDelayBypass() : IfxCcu6.h
  • IfxCcu6_enableHallPatternShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableInterrupt() : IfxCcu6.h
  • IfxCcu6_enableModulationOutput() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_enableModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_enableMultiChannelMode() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelModeAvailability() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelPwmPatternShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableShadowTransfer() : IfxCcu6.h
  • IfxCcu6_enableSingleShotMode() : IfxCcu6.h
  • IfxCcu6_enableT13InvertedModulation() : IfxCcu6.h
  • IfxCcu6_enableTimer() : IfxCcu6.h
  • IfxCcu6_enableTrap() : IfxCcu6.h
  • IfxCcu6_enableTrapPin() : IfxCcu6.h
  • IfxCcu6_getAddress() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getCaptureRegisterValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getCaptureShadowRegisterValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getDeadTimeStatus() : IfxCcu6.h
  • IfxCcu6_getHallPatternSampleState() : IfxCcu6.h
  • IfxCcu6_getIndex() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_getMultiChannelModeAvailabilityStatus() : IfxCcu6.h
  • IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus() : IfxCcu6.h
  • IfxCcu6_getShadowTransferStatus() : IfxCcu6.h
  • IfxCcu6_getSrcAddress() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_getT12CaptureCompareState() : IfxCcu6.h
  • IfxCcu6_getT12CountDirection() : IfxCcu6.h
  • IfxCcu6_getT12TimerPointer() : IfxCcu6.h
  • IfxCcu6_getT13CaptureCompareState() : IfxCcu6.h
  • IfxCcu6_getTimerAvailabilityStatus() : IfxCcu6.h
  • IfxCcu6_getTimerRunStatus() : IfxCcu6.h
  • IfxCcu6_Icu_getTimeStamp() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initChannel() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initChannelConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initModule() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_initModuleConfig() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_startCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_Icu_stopCapture() : IfxCcu6_Icu.c , IfxCcu6_Icu.h
  • IfxCcu6_initCc60InPin() : IfxCcu6.h
  • IfxCcu6_initCc60InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc60OutPin() : IfxCcu6.h
  • IfxCcu6_initCc61InPin() : IfxCcu6.h
  • IfxCcu6_initCc61InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc61OutPin() : IfxCcu6.h
  • IfxCcu6_initCc62InPin() : IfxCcu6.h
  • IfxCcu6_initCc62InPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCc62OutPin() : IfxCcu6.h
  • IfxCcu6_initCcpos0Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos0PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCcpos1Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos1PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCcpos2Pin() : IfxCcu6.h
  • IfxCcu6_initCcpos2PinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initCout60Pin() : IfxCcu6.h
  • IfxCcu6_initCout61Pin() : IfxCcu6.h
  • IfxCcu6_initCout62Pin() : IfxCcu6.h
  • IfxCcu6_initCout63Pin() : IfxCcu6.h
  • IfxCcu6_initCtrapPin() : IfxCcu6.h
  • IfxCcu6_initCtrapPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initT12hrPin() : IfxCcu6.h
  • IfxCcu6_initT12hrPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_initT13hrPin() : IfxCcu6.h
  • IfxCcu6_initT13hrPinWithPadLevel() : IfxCcu6.h
  • IfxCcu6_isModuleEnabled() : IfxCcu6.h
  • IfxCcu6_isModuleSuspended() : IfxCcu6.h
  • IfxCcu6_isT12OneNotification() : IfxCcu6.h
  • IfxCcu6_isT12PeriodNotification() : IfxCcu6.h
  • IfxCcu6_isT13CompareNotification() : IfxCcu6.h
  • IfxCcu6_PwmBc_getMotorSpeed() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_initModule() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_initModuleConfig() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_start() : IfxCcu6_PwmBc.h , IfxCcu6_PwmBc.c
  • IfxCcu6_PwmBc_stop() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmBc_updateHallPattern() : IfxCcu6_PwmBc.c , IfxCcu6_PwmBc.h
  • IfxCcu6_PwmHl_disable() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_enable() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_getDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_getMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_getMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_init() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_initConfig() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_invertActiveState() : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setDeadtime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setMinPulse() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setMode() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setOnTime() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_setOutputPins() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_setupChannels() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_stdIfPwmHlInit() : IfxCcu6_PwmHl.c , IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_updateCenterAligned() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_updateEdgeAligned() : IfxCcu6_PwmHl.c
  • IfxCcu6_PwmHl_updateOff() : IfxCcu6_PwmHl.c
  • IfxCcu6_readTimer() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_resetModule() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_routeInterruptNode() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setCaptureCompareInputSignal() : IfxCcu6.h
  • IfxCcu6_setCountingInputMode() : IfxCcu6.h
  • IfxCcu6_setCurrentHallPattern() : IfxCcu6.h
  • IfxCcu6_setDeadTimeValue() : IfxCcu6.h
  • IfxCcu6_setExpectedHallPattern() : IfxCcu6.h
  • IfxCcu6_setExternalRunMode() : IfxCcu6.h
  • IfxCcu6_setHallSensorTriggerMode() : IfxCcu6.h
  • IfxCcu6_setInputClockFrequency() : IfxCcu6.h
  • IfxCcu6_setInterruptStatusFlag() : IfxCcu6.h
  • IfxCcu6_setMultiChannelPwmPattern() : IfxCcu6.h
  • IfxCcu6_setMultiChannelSwitchingMode() : IfxCcu6.h
  • IfxCcu6_setMultiChannelSwitchingSync() : IfxCcu6.h
  • IfxCcu6_setOutputPassiveLevel() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setOutputPassiveState() : IfxCcu6.h
  • IfxCcu6_setSingleShotModeEnable() : IfxCcu6.h
  • IfxCcu6_setSleepMode() : IfxCcu6.h
  • IfxCcu6_setSuspendMode() : IfxCcu6.h
  • IfxCcu6_setT12CaptureCompareState() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12ChannelMode() : IfxCcu6.h
  • IfxCcu6_setT12CompareValue() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12CounterValue() : IfxCcu6.h
  • IfxCcu6_setT12CountMode() : IfxCcu6.h
  • IfxCcu6_setT12Frequency() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12InputSignal() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT12PeriodValue() : IfxCcu6.h
  • IfxCcu6_setT13CaptureCompareState() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13CompareValue() : IfxCcu6.h
  • IfxCcu6_setT13CounterValue() : IfxCcu6.h
  • IfxCcu6_setT13Frequency() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13InputSignal() : IfxCcu6.c , IfxCcu6.h
  • IfxCcu6_setT13PeriodValue() : IfxCcu6.h
  • IfxCcu6_setT13TriggerEventDirection() : IfxCcu6.h
  • IfxCcu6_setT13TriggerEventMode() : IfxCcu6.h
  • IfxCcu6_setTrapMode() : IfxCcu6.h
  • IfxCcu6_setTrapState() : IfxCcu6.h
  • IfxCcu6_startTimer() : IfxCcu6.h
  • IfxCcu6_stopTimer() : IfxCcu6.h
  • IfxCcu6_Timer_countOneStep() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_initModule() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_initModuleConfig() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_start() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_startSingleShotMode() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_stop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_synchronousStart() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_Timer_synchronousStop() : IfxCcu6_Timer.c , IfxCcu6_Timer.h
  • IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_applyUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_disableUpdate() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getPointer() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_getResolution() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_init() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_initConfig() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_run() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setPeriod() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setSingleMode() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_setTrigger() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_stdIfTimerInit() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_stop() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TimerWithTrigger_updateInputFrequency() : IfxCcu6_TimerWithTrigger.c , IfxCcu6_TimerWithTrigger.h
  • IfxCcu6_TPwm_initModule() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_initModuleConfig() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_pause() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_resume() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_start() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_TPwm_stop() : IfxCcu6_TPwm.c , IfxCcu6_TPwm.h
  • IfxCcu6_updateHallPattern() : IfxCcu6.h
  • IfxCif_Cam_calcMem() : IfxCif_Cam.c
  • IfxCif_Cam_clearAllFlags() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_clearFrameReceptionFlag() : IfxCif_Cam.h
  • IfxCif_Cam_clearJpegEncodingCompleteFlag() : IfxCif_Cam.h
  • IfxCif_Cam_disableJpegEncoder() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_enableJpegEncoder() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getBbbAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraFrameSize() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraPathMemInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getExtraPathPictureInfo() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getFrameSize() : IfxCif_Cam.h
  • IfxCif_Cam_getJpegEncodedSize() : IfxCif_Cam.h
  • IfxCif_Cam_getLastExtraAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getLastExtraCaptureInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getLastFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getLastFrameCaptureInfo() : IfxCif_Cam.h
  • IfxCif_Cam_getLastJpegEncodingInfo() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_getNextFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_getNextJpegFrameAddress() : IfxCif_Cam.h
  • IfxCif_Cam_incrementAddress() : IfxCif_Cam.h
  • IfxCif_Cam_init() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_initCamera() : IfxCif_Cam.c
  • IfxCif_Cam_initCif() : IfxCif_Cam.c
  • IfxCif_Cam_initCifDownscaler() : IfxCif_Cam.c
  • IfxCif_Cam_initCifExtraPath() : IfxCif_Cam.c
  • IfxCif_Cam_initCifIspUnit() : IfxCif_Cam.c
  • IfxCif_Cam_initCifJpegEncoder() : IfxCif_Cam.c
  • IfxCif_Cam_initCifMemInterface() : IfxCif_Cam.c
  • IfxCif_Cam_initEmem() : IfxCif_Cam.c
  • IfxCif_Cam_initMemSize() : IfxCif_Cam.c
  • IfxCif_Cam_initPictInfo() : IfxCif_Cam.c
  • IfxCif_Cam_initPortPins() : IfxCif_Cam.c
  • IfxCif_Cam_isEmulationExtensionAvailable() : IfxCif_Cam.c
  • IfxCif_Cam_isFrameReceptionComplete() : IfxCif_Cam.h
  • IfxCif_Cam_isJpegEncodingComplete() : IfxCif_Cam.h
  • IfxCif_Cam_restartCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_skipPicture() : IfxCif_Cam.h
  • IfxCif_Cam_startCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_stopCapture() : IfxCif_Cam.c , IfxCif_Cam.h
  • IfxCif_Cam_yuvMemSize() : IfxCif_Cam.c
  • IfxCif_clearEpError() : IfxCif.c , IfxCif.h
  • IfxCif_clearEpInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearIspError() : IfxCif.c , IfxCif.h
  • IfxCif_clearIspInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearJpeInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearKernelResetState() : IfxCif.h
  • IfxCif_clearMiInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_clearMiStatus() : IfxCif.c , IfxCif.h
  • IfxCif_clearSecurityWatchdogInterrupt() : IfxCif.c , IfxCif.h
  • IfxCif_dpResetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_epForceConfigurationUpdate() : IfxCif.c , IfxCif.h
  • IfxCif_epSkipPicture() : IfxCif.c , IfxCif.h
  • IfxCif_generateIspFrameSynchronousConfigUpdateSignal() : IfxCif.h
  • IfxCif_generateIspImmediateConfigUpdateSignal() : IfxCif.h
  • IfxCif_generateMiImmediateConfigUpdateSignal() : IfxCif.h
  • IfxCif_getBaseAddressInitializationEnableState() : IfxCif.h
  • IfxCif_getCifModuleId() : IfxCif.h
  • IfxCif_getCifModulePortInputSelection() : IfxCif.h
  • IfxCif_getCifModuleRevision() : IfxCif.h
  • IfxCif_getCifModuleType() : IfxCif.h
  • IfxCif_getClockControlLogicState() : IfxCif.h
  • IfxCif_getCurrentIspFrameCount() : IfxCif.h
  • IfxCif_getCurrentIspInformFieldInformation() : IfxCif.h
  • IfxCif_getCurrentIspInputFormatterState() : IfxCif.h
  • IfxCif_getCurrentIspPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getCurrentIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getDataPathSelectorForMainPath() : IfxCif.h
  • IfxCif_getDpControlEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getDpCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getDpEnableState() : IfxCif.h
  • IfxCif_getDpSourcePath() : IfxCif.h
  • IfxCif_getDpUserDefinedSymbol() : IfxCif.c , IfxCif.h
  • IfxCif_getEpBaseAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getEpBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCurrentPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingCurrentPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpCroppingRecenterState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpErrorState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitialFillLevelInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_getEpOutputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getEpRecenterValue() : IfxCif.c , IfxCif.h
  • IfxCif_getEpSize() : IfxCif.c , IfxCif.h
  • IfxCif_getEpWriteFormat() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanAcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanAcTableSelectorState() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanDcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_getHuffmanDcTableSelectorState() : IfxCif.c , IfxCif.h
  • IfxCif_getInputInterface() : IfxCif.h
  • IfxCif_getInternalClockMode() : IfxCif.c , IfxCif.h
  • IfxCif_getIspAcquisitionOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspAcquisitionSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspCcirSequence() : IfxCif.h
  • IfxCif_getIspColorSpaceMatrixCrominanceClippingRange() : IfxCif.h
  • IfxCif_getIspColorSpaceMatrixLuminanceClippingRange() : IfxCif.h
  • IfxCif_getIspErrorState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspFieldInvertState() : IfxCif.h
  • IfxCif_getIspFieldSelection() : IfxCif.h
  • IfxCif_getIspHSyncPolarity() : IfxCif.h
  • IfxCif_getIspInputFormatterState() : IfxCif.h
  • IfxCif_getIspInputInterface() : IfxCif.h
  • IfxCif_getIspInputPortSDataState() : IfxCif.h
  • IfxCif_getIspInputPortSHSyncState() : IfxCif.h
  • IfxCif_getIspInputPortSVSyncState() : IfxCif.h
  • IfxCif_getIspInputSelectionAppendState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCurrentPictureOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisCurrentPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisEnableState() : IfxCif.h
  • IfxCif_getIspisMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisRecenterEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getIspisRecenterValue() : IfxCif.h
  • IfxCif_getIspMode() : IfxCif.h
  • IfxCif_getIspOutputState() : IfxCif.h
  • IfxCif_getIspOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_getIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_getIspSamplingEdge() : IfxCif.h
  • IfxCif_getIspState() : IfxCif.h
  • IfxCif_getIspVSyncPolarity() : IfxCif.h
  • IfxCif_getJpeDebugSignalState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpegCodecImageSize() : IfxCif.c , IfxCif.h
  • IfxCif_getJpegJfifStreamEncoderContinuousMode() : IfxCif.h
  • IfxCif_getJpegPictureEncodingFormat() : IfxCif.h
  • IfxCif_getJpeHeaderGenerationMode() : IfxCif.h
  • IfxCif_getJpeHeaderMode() : IfxCif.h
  • IfxCif_getJpeInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeMode() : IfxCif.h
  • IfxCif_getJpeQTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeRestartInterval() : IfxCif.h
  • IfxCif_getJpeScalingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getJpeState() : IfxCif.h
  • IfxCif_getJpeTableId() : IfxCif.h
  • IfxCif_getKernelResetRequestState() : IfxCif.c , IfxCif.h
  • IfxCif_getKernelResetStatus() : IfxCif.h
  • IfxCif_getLinearDownscalerEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getLinearDownscalerScalingFactor() : IfxCif.c , IfxCif.h
  • IfxCif_getLinearDownscalerScalingMode() : IfxCif.c , IfxCif.h
  • IfxCif_getMainPictureComponentBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedEpInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedIspInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedJpeInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedMiInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiByteCount() : IfxCif.h
  • IfxCif_getMiByteSwapEnableState() : IfxCif.h
  • IfxCif_getMiChrominanceBurstLength() : IfxCif.h
  • IfxCif_getMiDataPathInputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiDataPathOutputEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getMiLuminanceBurstLength() : IfxCif.h
  • IfxCif_getMiMainPictureComponentBaseAddress() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureComponentSize() : IfxCif.c , IfxCif.h
  • IfxCif_getMiMainPictureWriteFormat() : IfxCif.h
  • IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset() : IfxCif.h
  • IfxCif_getMiMainPictureYInterruptOffset() : IfxCif.h
  • IfxCif_getMiOffsetCounterInitializationEnableState() : IfxCif.h
  • IfxCif_getMiStatusInformation() : IfxCif.c , IfxCif.h
  • IfxCif_getModuleNumber() : IfxCif.h
  • IfxCif_getModuleRevisionNumber() : IfxCif.h
  • IfxCif_getModuleState() : IfxCif.h
  • IfxCif_getModuleType() : IfxCif.h
  • IfxCif_getNumberOfAcquisitionFrames() : IfxCif.h
  • IfxCif_getRawEpInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawIspInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawJpeInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawMiInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getRawSecurityWatchdogInterruptTriggeredState() : IfxCif.c , IfxCif.h
  • IfxCif_getSecurityWatchdogCounterPredivider() : IfxCif.h
  • IfxCif_getSecurityWatchdogEnableState() : IfxCif.h
  • IfxCif_getSecurityWatchdogInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_getSecurityWatchdogTimeout() : IfxCif.c , IfxCif.h
  • IfxCif_getSoftwareResetMode() : IfxCif.c , IfxCif.h
  • IfxCif_getYCSplitterChannelMode() : IfxCif.h
  • IfxCif_initJpegEncoder() : IfxCif.h
  • IfxCif_jpeGenerateHeader() : IfxCif.h
  • IfxCif_miSkipPicture() : IfxCif.h
  • IfxCif_programJpeTable() : IfxCif.c , IfxCif.h
  • IfxCif_resetModule() : IfxCif.c , IfxCif.h
  • IfxCif_resetSecurityWatchdogCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setClockControlLogicState() : IfxCif.h
  • IfxCif_setDataPathSelectorForMainPath() : IfxCif.h
  • IfxCif_setDpControlEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setDpCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setDpEnableState() : IfxCif.h
  • IfxCif_setDpSourcePath() : IfxCif.h
  • IfxCif_setDpUserDefinedSymbol() : IfxCif.c , IfxCif.h
  • IfxCif_setEpBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingOffsetOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingOffsetsOutputWindow() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setEpCroppingPictureSizes() : IfxCif.c , IfxCif.h
  • IfxCif_setEpFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitialFillLevelInterruptOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setEpInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setEpOffsetCounterStart() : IfxCif.c , IfxCif.h
  • IfxCif_setEpRecenterValue() : IfxCif.c , IfxCif.h
  • IfxCif_setEpWriteFormat() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanAcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanAcTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanDcTableLength() : IfxCif.c , IfxCif.h
  • IfxCif_setHuffmanDcTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setInputInterface() : IfxCif.h
  • IfxCif_setInternalClockMode() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionOffsets() : IfxCif.h
  • IfxCif_setIspAcquisitionSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspAcquisitionSizes() : IfxCif.h
  • IfxCif_setIspCcirSequence() : IfxCif.h
  • IfxCif_setIspColorSpaceMatrixCrominanceClippingRange() : IfxCif.h
  • IfxCif_setIspColorSpaceMatrixLuminanceClippingRange() : IfxCif.h
  • IfxCif_setIspFieldInvertState() : IfxCif.h
  • IfxCif_setIspFieldSelection() : IfxCif.h
  • IfxCif_setIspHSyncPolarity() : IfxCif.h
  • IfxCif_setIspInputFormatterState() : IfxCif.h
  • IfxCif_setIspInputInterface() : IfxCif.h
  • IfxCif_setIspInputSelectionAppendState() : IfxCif.c , IfxCif.h
  • IfxCif_setIspInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setIspInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisCameraDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisEnableState() : IfxCif.h
  • IfxCif_setIspisMaximumDisplacement() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisOutputWindowOffsets() : IfxCif.h
  • IfxCif_setIspisPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspisPictureSizes() : IfxCif.h
  • IfxCif_setIspisRecenterValue() : IfxCif.h
  • IfxCif_setIspMode() : IfxCif.h
  • IfxCif_setIspOutputState() : IfxCif.h
  • IfxCif_setIspOutputWindowOffset() : IfxCif.c , IfxCif.h
  • IfxCif_setIspOutputWindowOffsets() : IfxCif.h
  • IfxCif_setIspPictureSize() : IfxCif.c , IfxCif.h
  • IfxCif_setIspPictureSizes() : IfxCif.h
  • IfxCif_setIspSamplingEdge() : IfxCif.h
  • IfxCif_setIspVSyncPolarity() : IfxCif.h
  • IfxCif_setJpegCodecImageSize() : IfxCif.c , IfxCif.h
  • IfxCif_setJpegCodecImageSizes() : IfxCif.h
  • IfxCif_setJpegJfifStreamEncoderContinuousMode() : IfxCif.h
  • IfxCif_setJpegPictureEncodingFormat() : IfxCif.h
  • IfxCif_setJpeHeaderGenerationMode() : IfxCif.h
  • IfxCif_setJpeHeaderMode() : IfxCif.h
  • IfxCif_setJpeInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeQTableSelector() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeRestartInterval() : IfxCif.h
  • IfxCif_setJpeScalingEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setJpeTableDataLsb() : IfxCif.h
  • IfxCif_setJpeTableDataMsb() : IfxCif.h
  • IfxCif_setJpeTableId() : IfxCif.h
  • IfxCif_setKernelResetRequestState() : IfxCif.h
  • IfxCif_setLinearDownscalerEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingFactor() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingFactors() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingMode() : IfxCif.c , IfxCif.h
  • IfxCif_setLinearDownscalerScalingModes() : IfxCif.c , IfxCif.h
  • IfxCif_setMiBaseAddressInitializationEnableState() : IfxCif.h
  • IfxCif_setMiByteSwapEnableState() : IfxCif.h
  • IfxCif_setMiChrominanceBurstLength() : IfxCif.h
  • IfxCif_setMiFeatureEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setMiInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setMiInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setMiLuminanceBurstLength() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentBaseInitAddress() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentInitialOffsetCounter() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureComponentInitSize() : IfxCif.c , IfxCif.h
  • IfxCif_setMiMainPictureWriteFormat() : IfxCif.h
  • IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset() : IfxCif.h
  • IfxCif_setMiOffsetCounterInitializationEnableState() : IfxCif.h
  • IfxCif_setModuleStateRequest() : IfxCif.c , IfxCif.h
  • IfxCif_setNumberOfAcquisitionFrames() : IfxCif.h
  • IfxCif_setSecurityWatchdogCounterPredivider() : IfxCif.h
  • IfxCif_setSecurityWatchdogEnableState() : IfxCif.h
  • IfxCif_setSecurityWatchdogInterruptEnableState() : IfxCif.c , IfxCif.h
  • IfxCif_setSecurityWatchdogInterruptRequestBit() : IfxCif.c , IfxCif.h
  • IfxCif_setSecurityWatchdogTimeout() : IfxCif.c , IfxCif.h
  • IfxCif_setSoftwareResetMode() : IfxCif.c , IfxCif.h
  • IfxCif_setYCSplitterChannelMode() : IfxCif.h
  • IfxCif_startJpegJfifStreamEncoder() : IfxCif.h
  • IfxCpu_acquireMutex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_areInterruptsEnabled() : IfxCpu.h
  • IfxCpu_calculateCrc32() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • IfxCpu_disableInterrupts() : IfxCpu.h
  • IfxCpu_emitEvent() : IfxCpu.c , IfxCpu.h
  • IfxCpu_enableInterrupts() : IfxCpu.h
  • IfxCpu_enableSegmentSpecificDataAccessCacheability() : IfxCpu.h
  • IfxCpu_enableSegmentSpecificInstructionAccessCacheability() : IfxCpu.h
  • IfxCpu_forceDisableInterrupts() : IfxCpu.h
  • IfxCpu_getAddress() : IfxCpu.h
  • IfxCpu_getClockCounter() : IfxCpu.h
  • IfxCpu_getClockCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getCoreId() : IfxCpu.h
  • IfxCpu_getCoreIndex() : IfxCpu.h
  • IfxCpu_getCoreMode() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getIndex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getInstructionCounter() : IfxCpu.h
  • IfxCpu_getInstructionCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getPerformanceCounter() : IfxCpu.h
  • IfxCpu_getPerformanceCounterStickyOverflow() : IfxCpu.h
  • IfxCpu_getRandomVal() : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • IfxCpu_getRandomValue() : IfxCpu.c , IfxCpu.h
  • IfxCpu_getRandomValueWithinRange() : IfxCpu.c , IfxCpu.h
  • IfxCpu_initCSA() : IfxCpu.h
  • IfxCpu_invalidateProgramCache() : IfxCpu.h
  • IfxCpu_Irq_getTos() : IfxCpu_Irq.h
  • IfxCpu_isAddressCachable() : IfxCpu.h
  • IfxCpu_releaseMutex() : IfxCpu.c , IfxCpu.h
  • IfxCpu_resetAndStartCounters() : IfxCpu.h
  • IfxCpu_resetSpinLock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_restoreInterrupts() : IfxCpu.h
  • IfxCpu_setCoreMode() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setDataCache() : IfxCpu.h
  • IfxCpu_setPerformanceCountersEnableBit() : IfxCpu.h
  • IfxCpu_setProgramCache() : IfxCpu.h
  • IfxCpu_setProgramCounter() : IfxCpu.c , IfxCpu.h
  • IfxCpu_setSafetyTaskIdentifier() : IfxCpu.h
  • IfxCpu_setSpinLock() : IfxCpu.c , IfxCpu.h
  • IfxCpu_startCore() : IfxCpu.c , IfxCpu.h
  • IfxCpu_stopCounters() : IfxCpu.h
  • IfxCpu_Trap_assertion() : IfxCpu_Trap.c
  • IfxCpu_Trap_busError() : IfxCpu_Trap.c
  • IfxCpu_Trap_contextManagementError() : IfxCpu_Trap.c
  • IfxCpu_Trap_extractTrapInfo() : IfxCpu_Trap.c
  • IfxCpu_Trap_instructionError() : IfxCpu_Trap.c
  • IfxCpu_Trap_internalProtectionError() : IfxCpu_Trap.c
  • IfxCpu_Trap_memoryManagementError() : IfxCpu_Trap.c
  • IfxCpu_Trap_nonMaskableInterrupt() : IfxCpu_Trap.c
  • IfxCpu_Trap_systemCall_Cpu0() : IfxCpu_Trap.c
  • IfxCpu_Trap_vectorTable0() : IfxCpu_Trap.c
  • IfxCpu_triggerSwReset() : IfxCpu.h
  • IfxCpu_updateClockCounter() : IfxCpu.h
  • IfxCpu_updateInstructionCounter() : IfxCpu.h
  • IfxCpu_updatePerformanceCounter() : IfxCpu.h
  • IfxCpu_waitEvent() : IfxCpu.c , IfxCpu.h
  • IfxDma_clearChannelHalt() : IfxDma.h
  • IfxDma_clearChannelInterrupt() : IfxDma.h
  • IfxDma_clearChannelTransactionRequestLost() : IfxDma.h
  • IfxDma_clearErrorFlags() : IfxDma.h
  • IfxDma_disableChannelInterrupt() : IfxDma.h
  • IfxDma_disableChannelTransaction() : IfxDma.h
  • IfxDma_disableChannelTransactionLostError() : IfxDma.h
  • IfxDma_disableMoveEngineDestinationError() : IfxDma.h
  • IfxDma_disableMoveEngineSourceError() : IfxDma.h
  • IfxDma_Dma_clearChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_configureTransactionSet() : IfxDma_Dma.c
  • IfxDma_Dma_createModuleHandle() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_deInitChannel() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_getAndClearChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_getChannelInterrupt() : IfxDma_Dma.h
  • IfxDma_Dma_getSrcPointer() : IfxDma_Dma.h
  • IfxDma_Dma_initChannel() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initChannelConfig() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initLinkedListEntry() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initModule() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_initModuleConfig() : IfxDma_Dma.c , IfxDma_Dma.h
  • IfxDma_Dma_isChannelTransactionPending() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelDestinationAddress() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelSourceAddress() : IfxDma_Dma.h
  • IfxDma_Dma_setChannelTransferCount() : IfxDma_Dma.h
  • IfxDma_Dma_startChannelTransaction() : IfxDma_Dma.h
  • IfxDma_enableChannelInterrupt() : IfxDma.h
  • IfxDma_enableChannelTransaction() : IfxDma.h
  • IfxDma_enableChannelTransactionLostError() : IfxDma.h
  • IfxDma_enableDestinationCircularBuffer() : IfxDma.h
  • IfxDma_enableMoveEngineDestinationError() : IfxDma.h
  • IfxDma_enableMoveEngineSourceError() : IfxDma.h
  • IfxDma_enableSourceCircularBuffer() : IfxDma.h
  • IfxDma_getAndClearChannelInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelPatternDetectionInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelWrapDestinationBufferInterrupt() : IfxDma.h
  • IfxDma_getAndClearChannelWrapSourceBufferInterrupt() : IfxDma.h
  • IfxDma_getChannelDestinationAddress() : IfxDma.h
  • IfxDma_getChannelHalt() : IfxDma.h
  • IfxDma_getChannelInterrupt() : IfxDma.h
  • IfxDma_getChannelPatternDetectionOldValue() : IfxDma.h
  • IfxDma_getChannelSourceAddress() : IfxDma.h
  • IfxDma_getChannelSuspendModeStatus() : IfxDma.h
  • IfxDma_getChannelTransactionRequestLost() : IfxDma.h
  • IfxDma_getChannelTransferCount() : IfxDma.h
  • IfxDma_getCircularRangeCode() : IfxDma.h
  • IfxDma_getDataCRC() : IfxDma.h
  • IfxDma_getDoubleBufferRead() : IfxDma.h
  • IfxDma_getDoubleBufferSelection() : IfxDma.h
  • IfxDma_getErrorFlags() : IfxDma.h
  • IfxDma_getErrPointer() : IfxDma.h
  • IfxDma_getSourceAndDestinationCRC() : IfxDma.h
  • IfxDma_getSrcPointer() : IfxDma.h
  • IfxDma_getTimestamp() : IfxDma.h
  • IfxDma_isChannelReset() : IfxDma.h
  • IfxDma_isChannelTransactionEnabled() : IfxDma.h
  • IfxDma_isChannelTransactionPending() : IfxDma.h
  • IfxDma_keepDoubleBufferActive() : IfxDma.h
  • IfxDma_resetChannel() : IfxDma.h
  • IfxDma_setChannelBlockMode() : IfxDma.h
  • IfxDma_setChannelContinuousMode() : IfxDma.h
  • IfxDma_setChannelDestinationAddress() : IfxDma.h
  • IfxDma_setChannelDestinationIncrementStep() : IfxDma.h
  • IfxDma_setChannelHalt() : IfxDma.h
  • IfxDma_setChannelHardwareResourcePartition() : IfxDma.h
  • IfxDma_setChannelInterruptServiceRequest() : IfxDma.h
  • IfxDma_setChannelMoveSize() : IfxDma.h
  • IfxDma_setChannelShadow() : IfxDma.h
  • IfxDma_setChannelSingleMode() : IfxDma.h
  • IfxDma_setChannelSingleTransaction() : IfxDma.h
  • IfxDma_setChannelSingleTransfer() : IfxDma.h
  • IfxDma_setChannelSourceAddress() : IfxDma.h
  • IfxDma_setChannelSourceIncrementStep() : IfxDma.h
  • IfxDma_setChannelSuspendEnable() : IfxDma.h
  • IfxDma_setChannelTransferCount() : IfxDma.h
  • IfxDma_setCircularBufferDestinationLength() : IfxDma.h
  • IfxDma_setCircularBufferSourceLength() : IfxDma.h
  • IfxDma_setInterruptControlValue() : IfxDma.h
  • IfxDma_setSleepMode() : IfxDma.h
  • IfxDma_startChannelTransaction() : IfxDma.h
  • IfxDma_switchDoubleBuffer() : IfxDma.h
  • IfxDma_writeChannelShadowDisable() : IfxDma.h
  • IfxDma_writeChannelShadowEnable() : IfxDma.h
  • IfxDsadc_Dsadc_calcDIVx() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_getAuxResult() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getAuxSrc() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getMainResult() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_getMainSrc() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initAuxFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initCarrierGen() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initCarrierGenConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initChannel() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initChannelConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initCombFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initDemodulator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initFirFilter() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initIntegrator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initModulator() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_initModule() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initModuleConfig() : IfxDsadc_Dsadc.c , IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_initRectifier() : IfxDsadc_Dsadc.c
  • IfxDsadc_Dsadc_startScan() : IfxDsadc_Dsadc.h
  • IfxDsadc_Dsadc_stopScan() : IfxDsadc_Dsadc.h
  • IfxDsadc_getAuxResult() : IfxDsadc.h
  • IfxDsadc_getAuxSrc() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getIntegratorOutFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainCombDecimation() : IfxDsadc.h
  • IfxDsadc_getMainCombOutFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainGroupDelay() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getMainResult() : IfxDsadc.h
  • IfxDsadc_getMainSrc() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getModulatorClockFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_getModulatorInputClockFreq() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_initCgPwmPin() : IfxDsadc.h
  • IfxDsadc_initCinPin() : IfxDsadc.h
  • IfxDsadc_initCoutPin() : IfxDsadc.h
  • IfxDsadc_initDinPin() : IfxDsadc.h
  • IfxDsadc_initDsnPin() : IfxDsadc.h
  • IfxDsadc_initDspPin() : IfxDsadc.h
  • IfxDsadc_initItrPin() : IfxDsadc.h
  • IfxDsadc_initSgPin() : IfxDsadc.h
  • IfxDsadc_isModuleEnabled() : IfxDsadc.h
  • IfxDsadc_Rdc_calculateGroupDelay() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_calculateTimestampPeriod() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_getAbsolutePosition() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getDirection() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getFault() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getOffset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getPeriodPerRotation() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getPosition() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getRawPosition() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getRefreshPeriod() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getResolution() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getSensorType() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getSpeed() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getTimestamp() : IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getTurn() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_getUpdatePeriod() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_init() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_initConfig() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_initGtmTim() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_initHwChannels() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_initHwTimestamp() : IfxDsadc_Rdc.c
  • IfxDsadc_Rdc_onEventA() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_reset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_resetFaults() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_setOffset() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_setRefreshPeriod() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_startConversion() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_stdIfPosInit() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_update() : IfxDsadc_Rdc.c , IfxDsadc_Rdc.h
  • IfxDsadc_Rdc_updateTimestamp() : IfxDsadc_Rdc.c
  • IfxDsadc_resetModule() : IfxDsadc.c , IfxDsadc.h
  • IfxDsadc_setCarrierMode() : IfxDsadc.h
  • IfxDsadc_setSleepMode() : IfxDsadc.h
  • IfxDsadc_startScan() : IfxDsadc.h
  • IfxDsadc_stopScan() : IfxDsadc.h
  • IfxDts_disableSensorControl() : IfxDts.h
  • IfxDts_Dts_convertFromCelsius() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_convertToCelsius() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_getTemperatureCelsius() : IfxDts_Dts.h
  • IfxDts_Dts_getTemperatureValue() : IfxDts_Dts.h
  • IfxDts_Dts_initModule() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_initModuleConfig() : IfxDts_Dts.c , IfxDts_Dts.h
  • IfxDts_Dts_isBusy() : IfxDts_Dts.h
  • IfxDts_Dts_startSensor() : IfxDts_Dts.h
  • IfxDts_enableSensor() : IfxDts.h
  • IfxDts_getSrcPointer() : IfxDts.h
  • IfxDts_getTemperatureValue() : IfxDts.h
  • IfxDts_isBusy() : IfxDts.h
  • IfxDts_isReady() : IfxDts.c , IfxDts.h
  • IfxDts_startSensor() : IfxDts.h
  • IfxEmem_getLockedState() : IfxEmem.c , IfxEmem.h
  • IfxEmem_isModuleEnabled() : IfxEmem.h
  • IfxEmem_setClockEnableState() : IfxEmem.c , IfxEmem.h
  • IfxEmem_setTileConfigMode() : IfxEmem.h
  • IfxEmem_setUnlockStandbyLockFlag() : IfxEmem.h
  • IfxEray_calcHeaderCrc() : IfxEray.c , IfxEray.h
  • IfxEray_changePocState() : IfxEray.c , IfxEray.h
  • IfxEray_clearAllFlags() : IfxEray.c , IfxEray.h
  • IfxEray_clearErrorFlag() : IfxEray.h
  • IfxEray_clearStatusFlag() : IfxEray.h
  • IfxEray_disableModule() : IfxEray.h
  • IfxEray_enableInterruptLines() : IfxEray.c , IfxEray.h
  • IfxEray_enableModule() : IfxEray.h
  • IfxEray_Eray_allowColdStart() : IfxEray_Eray.h
  • IfxEray_Eray_bufferReconfig() : IfxEray_Eray.h
  • IfxEray_Eray_changePocState() : IfxEray_Eray.h
  • IfxEray_Eray_clearErrorFlag() : IfxEray_Eray.h
  • IfxEray_Eray_clearStatusFlag() : IfxEray_Eray.h
  • IfxEray_Eray_deInitModule() : IfxEray_Eray.h
  • IfxEray_Eray_getErrorInterrupts() : IfxEray_Eray.h
  • IfxEray_Eray_getMessageBufferInterruptStatus() : IfxEray_Eray.h
  • IfxEray_Eray_getNewDataInterruptStatus() : IfxEray_Eray.h
  • IfxEray_Eray_getPocState() : IfxEray_Eray.h
  • IfxEray_Eray_getStatusInterrupts() : IfxEray_Eray.h
  • IfxEray_Eray_getWakeupPatternReceivedChannel() : IfxEray_Eray.h
  • IfxEray_Eray_initModule() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_initModuleConfig() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_init() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_initCommunicationController() : IfxEray_Eray.c
  • IfxEray_Eray_Node_initConfig() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_Node_initGTU() : IfxEray_Eray.c
  • IfxEray_Eray_Node_initMessageRAM() : IfxEray_Eray.c
  • IfxEray_Eray_readData() : IfxEray_Eray.h
  • IfxEray_Eray_readFrame() : IfxEray_Eray.h
  • IfxEray_Eray_receiveFifoFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_receiveFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_setMessageBufferInterruptDestination() : IfxEray_Eray.h
  • IfxEray_Eray_setNewDataInterruptDestination() : IfxEray_Eray.h
  • IfxEray_Eray_setPocAllSlots() : IfxEray_Eray.h
  • IfxEray_Eray_startCommunication() : IfxEray_Eray.h
  • IfxEray_Eray_transmitFrame() : IfxEray_Eray.c , IfxEray_Eray.h
  • IfxEray_Eray_wakeUpChannel() : IfxEray_Eray.h
  • IfxEray_Eray_wakeUpCluster() : IfxEray_Eray.h
  • IfxEray_Eray_writeData() : IfxEray_Eray.h
  • IfxEray_getAddress() : IfxEray.c , IfxEray.h
  • IfxEray_getErrorInterrupts() : IfxEray.h
  • IfxEray_getFifoIndex() : IfxEray.h
  • IfxEray_getFifoStatus() : IfxEray.h
  • IfxEray_getIndex() : IfxEray.c , IfxEray.h
  • IfxEray_getInputBufferBusyHostStatus() : IfxEray.h
  • IfxEray_getInputBufferBusyShadowStatus() : IfxEray.h
  • IfxEray_getInputBufferBusySrcPtr() : IfxEray.h
  • IfxEray_getInterruptLine0SrcPtr() : IfxEray.h
  • IfxEray_getInterruptLine1SrcPtr() : IfxEray.h
  • IfxEray_getMessageBufferInterruptStatus() : IfxEray.h
  • IfxEray_getMessageBufferStatus0SrcPtr() : IfxEray.h
  • IfxEray_getMessageBufferStatus1SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterrupt0SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterrupt1SrcPtr() : IfxEray.h
  • IfxEray_getNewDataInterruptStatus() : IfxEray.h
  • IfxEray_getOutputBuffer() : IfxEray.h
  • IfxEray_getOutputBufferBusyShadowStatus() : IfxEray.h
  • IfxEray_getOutputBufferBusySrcPtr() : IfxEray.h
  • IfxEray_getPocState() : IfxEray.h
  • IfxEray_getStatusInterrupts() : IfxEray.h
  • IfxEray_getTimerInterrupt0SrcPtr() : IfxEray.h
  • IfxEray_getTimerInterrupt1SrcPtr() : IfxEray.h
  • IfxEray_getWakeupPatternReceivedChannel() : IfxEray.h
  • IfxEray_initRxPin() : IfxEray.h
  • IfxEray_initRxPinWithPadLevel() : IfxEray.h
  • IfxEray_initTxEnPin() : IfxEray.h
  • IfxEray_initTxPin() : IfxEray.h
  • IfxEray_isModuleSuspended() : IfxEray.h
  • IfxEray_readData() : IfxEray.c , IfxEray.h
  • IfxEray_readFrame() : IfxEray.c , IfxEray.h
  • IfxEray_receiveData() : IfxEray.h
  • IfxEray_receiveHeader() : IfxEray.h
  • IfxEray_resetModule() : IfxEray.c , IfxEray.h
  • IfxEray_sendData() : IfxEray.h
  • IfxEray_sendHeader() : IfxEray.h
  • IfxEray_setActiveCyclePairs() : IfxEray.h
  • IfxEray_setAutoDelayBuffers() : IfxEray.h
  • IfxEray_setBaudrate() : IfxEray.h
  • IfxEray_setBufferReconfigSecure() : IfxEray.h
  • IfxEray_setChannelAInitialOffsets() : IfxEray.h
  • IfxEray_setChannelBInitialOffsets() : IfxEray.h
  • IfxEray_setChannelsReceiveDelay() : IfxEray.h
  • IfxEray_setClockCorrectionCycles() : IfxEray.h
  • IfxEray_setClockSynchErrorHalt() : IfxEray.h
  • IfxEray_setClusterDriftValues() : IfxEray.h
  • IfxEray_setClusterStartupDeviation() : IfxEray.h
  • IfxEray_setCollisionAvoidanceDuration() : IfxEray.h
  • IfxEray_setCycleDurationMacroticks() : IfxEray.h
  • IfxEray_setCycleDurationMicroticks() : IfxEray.h
  • IfxEray_setDecodingCorrectionValue() : IfxEray.h
  • IfxEray_setDynamicSlots() : IfxEray.h
  • IfxEray_setExternalCorrectionControl() : IfxEray.h
  • IfxEray_setExternalCorrectionValues() : IfxEray.h
  • IfxEray_setFifoBufferStartIndex() : IfxEray.h
  • IfxEray_setFifoFilterConfigurations() : IfxEray.h
  • IfxEray_setFifoMessageBufferConfigurations() : IfxEray.h
  • IfxEray_setFirstDynamicBuffer() : IfxEray.h
  • IfxEray_setListenTimeOuts() : IfxEray.h
  • IfxEray_setMaxColdStartAttempts() : IfxEray.h
  • IfxEray_setMaxCorrectionValues() : IfxEray.h
  • IfxEray_setMaxSynchFrames() : IfxEray.h
  • IfxEray_setMessageBufferCount() : IfxEray.h
  • IfxEray_setMessageBufferInterruptDestination() : IfxEray.c , IfxEray.h
  • IfxEray_setMessageHandlerConfigurations() : IfxEray.h
  • IfxEray_setNetworkStartIdleTime() : IfxEray.h
  • IfxEray_setNetworkVectorLength() : IfxEray.h
  • IfxEray_setNewDataInterruptDestination() : IfxEray.c , IfxEray.h
  • IfxEray_setNodeChannels() : IfxEray.h
  • IfxEray_setOffsetCorrection() : IfxEray.h
  • IfxEray_setPocReady() : IfxEray.c , IfxEray.h
  • IfxEray_setReceiveRequest() : IfxEray.h
  • IfxEray_setReceiveWakeupTimes() : IfxEray.h
  • IfxEray_setRxBufferNumber() : IfxEray.h
  • IfxEray_setSleepMode() : IfxEray.h
  • IfxEray_setSlot() : IfxEray.c , IfxEray.h
  • IfxEray_setSlotActionPoints() : IfxEray.h
  • IfxEray_setStaticSlots() : IfxEray.h
  • IfxEray_setStrobePosition() : IfxEray.h
  • IfxEray_setSuspendMode() : IfxEray.h
  • IfxEray_setSymbolChannels() : IfxEray.h
  • IfxEray_setTransmissionSlotMode() : IfxEray.h
  • IfxEray_setTransmissionStartTime() : IfxEray.h
  • IfxEray_setTransmitRequest() : IfxEray.h
  • IfxEray_setTransmittedFrames() : IfxEray.h
  • IfxEray_setTransmitWakeupTimes() : IfxEray.h
  • IfxEray_setTxBufferNumber() : IfxEray.h
  • IfxEray_setViewData() : IfxEray.h
  • IfxEray_setWakeupPatternChannel() : IfxEray.h
  • IfxEray_waitForPocState() : IfxEray.h
  • IfxEray_writeData() : IfxEray.c , IfxEray.h
  • IfxEth_applySoftwareReset() : IfxEth.h
  • IfxEth_clearEriInterrupt() : IfxEth.h
  • IfxEth_clearMacConfiguration() : IfxEth.h
  • IfxEth_clearRxInterrupt() : IfxEth.h
  • IfxEth_clearTuInterrupt() : IfxEth.h
  • IfxEth_clearTxInterrupt() : IfxEth.h
  • IfxEth_disableModule() : IfxEth.c , IfxEth.h
  • IfxEth_disableTimeStampCoarseUpdate() : IfxEth.h
  • IfxEth_disableTimeStampForIpv4Frames() : IfxEth.h
  • IfxEth_enableMmcCounter() : IfxEth.h
  • IfxEth_enableModule() : IfxEth.c , IfxEth.h
  • IfxEth_enableTimeStamp() : IfxEth.h
  • IfxEth_enableTimeStampCoarseUpdate() : IfxEth.h
  • IfxEth_enableTimeStampForAllFrames() : IfxEth.h
  • IfxEth_enableTimeStampForEthFrames() : IfxEth.h
  • IfxEth_enableTimeStampForIpv4Frames() : IfxEth.h
  • IfxEth_enableTimeStampForVer2Format() : IfxEth.h
  • IfxEth_freeReceiveBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getActualRxDescriptor() : IfxEth.h
  • IfxEth_getActualRxIndex() : IfxEth.h
  • IfxEth_getActualTxDescriptor() : IfxEth.h
  • IfxEth_getBaseRxDescriptor() : IfxEth.h
  • IfxEth_getBaseTxDescriptor() : IfxEth.h
  • IfxEth_getLoopbackMode() : IfxEth.h
  • IfxEth_getMacAddressPointer() : IfxEth.h
  • IfxEth_getReceiveBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getReceiveProcessState() : IfxEth.h
  • IfxEth_getRxDataLength() : IfxEth.h
  • IfxEth_getSrcPointer() : IfxEth.h
  • IfxEth_getTimeStampInitialiseStatus() : IfxEth.h
  • IfxEth_getTimeStampUpdateStatus() : IfxEth.h
  • IfxEth_getTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_getTransmitProcessState() : IfxEth.h
  • IfxEth_init() : IfxEth.c , IfxEth.h
  • IfxEth_initConfig() : IfxEth.c , IfxEth.h
  • IfxEth_initialiseTimeStamp() : IfxEth.h
  • IfxEth_initReceiveDescriptors() : IfxEth.c , IfxEth.h
  • IfxEth_initReceiveDescriptorsRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_initTransmitDescriptors() : IfxEth.c , IfxEth.h
  • IfxEth_initTransmitDescriptorsRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_isEriInterrupt() : IfxEth.h
  • IfxEth_isLinkActive() : IfxEth.h
  • IfxEth_isNisInterrupt() : IfxEth.h
  • IfxEth_isRxChecksumError() : IfxEth.h
  • IfxEth_isRxDataAvailable() : IfxEth.h
  • IfxEth_isRxInterrupt() : IfxEth.h
  • IfxEth_isSoftwareResetDone() : IfxEth.h
  • IfxEth_isTuInterrupt() : IfxEth.h
  • IfxEth_isTxInterrupt() : IfxEth.h
  • IfxEth_Phy_Pef7071_init() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_link() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_read_mdio_reg() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_read_mmd_indirect() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_write_mdio_reg() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Phy_Pef7071_write_mmd_indirect() : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_readAllFlags() : IfxEth.h
  • IfxEth_readMacAddress() : IfxEth.c , IfxEth.h
  • IfxEth_resetModule() : IfxEth.c , IfxEth.h
  • IfxEth_RxDescr_getNext() : IfxEth.h
  • IfxEth_RxDescr_release() : IfxEth.h
  • IfxEth_RxDescr_setBuffer() : IfxEth.h
  • IfxEth_sendTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_sendTransmitBuffersRingMode() : IfxEth.c , IfxEth.h
  • IfxEth_setAddToTimeUpdate() : IfxEth.h
  • IfxEth_setAndSendTransmitBuffer() : IfxEth.c , IfxEth.h
  • IfxEth_setBinaryRolloverControl() : IfxEth.h
  • IfxEth_setLoopbackMode() : IfxEth.h
  • IfxEth_setMacAddress() : IfxEth.c , IfxEth.h
  • IfxEth_setNanoSecondsUpdateValue() : IfxEth.h
  • IfxEth_setPhyInterfaceMode() : IfxEth.h
  • IfxEth_setReceiveBuffer1RingMode() : IfxEth.h
  • IfxEth_setReceiveBuffer2RingMode() : IfxEth.h
  • IfxEth_setReceiveDescriptorAddress() : IfxEth.h
  • IfxEth_setSecondsUpdateValue() : IfxEth.h
  • IfxEth_setSubSecondIncrementValue() : IfxEth.h
  • IfxEth_setSubtractToTimeUpdate() : IfxEth.h
  • IfxEth_setTransmitBuffer1RingMode() : IfxEth.h
  • IfxEth_setTransmitBuffer2RingMode() : IfxEth.h
  • IfxEth_setTransmitDescriptorAddress() : IfxEth.h
  • IfxEth_setupChecksumEngine() : IfxEth.c , IfxEth.h
  • IfxEth_setupMiiInputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupMiiOutputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupRmiiInputPins() : IfxEth.c , IfxEth.h
  • IfxEth_setupRmiiOutputPins() : IfxEth.c , IfxEth.h
  • IfxEth_shuffleRxDescriptor() : IfxEth.c , IfxEth.h
  • IfxEth_shuffleTxDescriptor() : IfxEth.c , IfxEth.h
  • IfxEth_startReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_startTransmitter() : IfxEth.c , IfxEth.h
  • IfxEth_stopReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_stopTransmitter() : IfxEth.c , IfxEth.h
  • IfxEth_TxDescr_getNext() : IfxEth.h
  • IfxEth_TxDescr_isAvailable() : IfxEth.h
  • IfxEth_TxDescr_release() : IfxEth.h
  • IfxEth_TxDescr_setBuffer() : IfxEth.h
  • IfxEth_TxDescr_setup() : IfxEth.h
  • IfxEth_updateTimeStamp() : IfxEth.h
  • IfxEth_waitTransmitBuffer() : IfxEth.h
  • IfxEth_wakeupReceiver() : IfxEth.c , IfxEth.h
  • IfxEth_wakeupTransmitter() : IfxEth.c , IfxEth.h
  • IfxEth_writeHeader() : IfxEth.c , IfxEth.h
  • IfxFce_clearCrc16ErrorFlags() : IfxFce.h
  • IfxFce_clearCrc32ErrorFlags() : IfxFce.h
  • IfxFce_clearCrc8ErrorFlags() : IfxFce.h
  • IfxFce_Crc_calculateCrc16() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_calculateCrc32() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_calculateCrc8() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_clearErrorFlags() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_deInitModule() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_getInterruptStatus() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initCrc() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initCrcConfig() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initModule() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_Crc_initModuleConfig() : IfxFce_Crc.c , IfxFce_Crc.h
  • IfxFce_disableModule() : IfxFce.h
  • IfxFce_enableModule() : IfxFce.h
  • IfxFce_getCrc16InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getCrc32InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getCrc8InterruptStatus() : IfxFce.c , IfxFce.h
  • IfxFce_getSrcPointer() : IfxFce.h
  • IfxFce_reflectCrc32() : IfxFce.c , IfxFce.h
  • IfxFce_resetModule() : IfxFce.h , IfxFce.c
  • IfxFft_disableModule() : IfxFft.h
  • IfxFft_enableModule() : IfxFft.h
  • IfxFft_Fft_calcCounters() : IfxFft_Fft.c
  • IfxFft_Fft_calcCSR() : IfxFft_Fft.c
  • IfxFft_Fft_cloneAndLinkJobs() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initDma() : IfxFft_Fft.h , IfxFft_Fft.c
  • IfxFft_Fft_initJob() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initJobConfig() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initModule() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_initModuleConfig() : IfxFft_Fft.h , IfxFft_Fft.c
  • IfxFft_Fft_initWindow() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_isrInput() : IfxFft_Fft.h , IfxFft_Fft.c
  • IfxFft_Fft_isrIntra() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_isrOutput() : IfxFft_Fft.h , IfxFft_Fft.c
  • IfxFft_Fft_loadInput() : IfxFft_Fft.c
  • IfxFft_Fft_modifyDataPointers() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_startJob() : IfxFft_Fft.c , IfxFft_Fft.h
  • IfxFft_Fft_triggerEngine() : IfxFft_Fft.h
  • IfxFft_Fft_unloadOutput() : IfxFft_Fft.c
  • IfxFft_getInputFormat() : IfxFft.h
  • IfxFft_getLength() : IfxFft.h
  • IfxFft_getLengthCode() : IfxFft.h
  • IfxFft_getLengthFromCode() : IfxFft.h
  • IfxFft_getOutputFormat() : IfxFft.h
  • IfxFft_getSrcPointerDone() : IfxFft.h
  • IfxFft_getSrcPointerRfs() : IfxFft.h
  • IfxFft_getTransformLength() : IfxFft.h
  • IfxFft_isEngineBusy() : IfxFft.h
  • IfxFft_isModuleEnabled() : IfxFft.h
  • IfxFft_isModuleSuspended() : IfxFft.h
  • IfxFft_isReadyForStart() : IfxFft.h
  • IfxFft_setSuspendMode() : IfxFft.h
  • IfxFlash_clearCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_clearStatus() : IfxFlash.h
  • IfxFlash_clearUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_disableCorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_disableUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_disableWriteProtection() : IfxFlash.c , IfxFlash.h
  • IfxFlash_enterPageMode() : IfxFlash.h
  • IfxFlash_eraseMultiplePhysicalSectors() : IfxFlash.h
  • IfxFlash_eraseMultipleSectors() : IfxFlash.h
  • IfxFlash_erasePhysicalSector() : IfxFlash.h
  • IfxFlash_eraseSector() : IfxFlash.h
  • IfxFlash_eraseVerifyMultipleSectors() : IfxFlash.h
  • IfxFlash_eraseVerifySector() : IfxFlash.h
  • IfxFlash_getTrackedCorrectableErrors() : IfxFlash.h , IfxFlash.c
  • IfxFlash_getTrackedUncorrectableErrors() : IfxFlash.c , IfxFlash.h
  • IfxFlash_loadPage() : IfxFlash.h
  • IfxFlash_loadPage2X32() : IfxFlash.h
  • IfxFlash_resetToRead() : IfxFlash.h
  • IfxFlash_resumeProtection() : IfxFlash.h
  • IfxFlash_selectCorrectableErrorTracking() : IfxFlash.h , IfxFlash.c
  • IfxFlash_selectUncorrectableErrorTracking() : IfxFlash.c , IfxFlash.h
  • IfxFlash_suspendResumeMultipleSectors() : IfxFlash.h
  • IfxFlash_suspendResumeSector() : IfxFlash.h
  • IfxFlash_waitUnbusy() : IfxFlash.h
  • IfxFlash_waitUnbusyAll() : IfxFlash.h
  • IfxFlash_writeBurst() : IfxFlash.h
  • IfxFlash_writePage() : IfxFlash.h
  • IfxFlash_writePageOnce() : IfxFlash.h
  • IfxGpt12_disableModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_enableModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_getCaptureSrc() : IfxGpt12.h
  • IfxGpt12_getModuleFrequency() : IfxGpt12.h
  • IfxGpt12_IncrEnc_getAbsolutePosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getDirection() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getFault() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getPeriodPerRotation() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getRawPosition() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getResolution() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getSensorType() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getSpeed() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_getTurn() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_init() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_initConfig() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_onZeroIrq() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_reset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_resetFaults() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_setOffset() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_setRefreshPeriod() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_stdIfPosInit() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_update() : IfxGpt12_IncrEnc.c , IfxGpt12_IncrEnc.h
  • IfxGpt12_IncrEnc_updateFromT2() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateFromT3() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateSpeedFromT2() : IfxGpt12_IncrEnc.c
  • IfxGpt12_IncrEnc_updateSpeedFromT3() : IfxGpt12_IncrEnc.c
  • IfxGpt12_initCapInPin() : IfxGpt12.h
  • IfxGpt12_initCapInPinWithPadLevel() : IfxGpt12.h
  • IfxGpt12_initTxEudInPin() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxEudInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxInPin() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxInPinWithPadLevel() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_initTxOutPin() : IfxGpt12.h
  • IfxGpt12_isModuleSuspended() : IfxGpt12.h
  • IfxGpt12_resetModule() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_setCaptureInput() : IfxGpt12.h
  • IfxGpt12_setCaptureReload() : IfxGpt12.h
  • IfxGpt12_setGpt1BlockPrescaler() : IfxGpt12.h
  • IfxGpt12_setGpt2BlockPrescaler() : IfxGpt12.h
  • IfxGpt12_setSleepMode() : IfxGpt12.h
  • IfxGpt12_setSuspendMode() : IfxGpt12.h
  • IfxGpt12_T2_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T2_getMode() : IfxGpt12.h
  • IfxGpt12_T2_getSrc() : IfxGpt12.h
  • IfxGpt12_T2_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T2_run() : IfxGpt12.h
  • IfxGpt12_T2_setCaptureInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T2_setEudInput() : IfxGpt12.h
  • IfxGpt12_T2_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setInput() : IfxGpt12.h
  • IfxGpt12_T2_setInterruptEnable() : IfxGpt12.h
  • IfxGpt12_T2_setMode() : IfxGpt12.h
  • IfxGpt12_T2_setReloadInputMode() : IfxGpt12.h
  • IfxGpt12_T2_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T2_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T2_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T2_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T3_enableOutput() : IfxGpt12.h
  • IfxGpt12_T3_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T3_getMode() : IfxGpt12.h
  • IfxGpt12_T3_getSrc() : IfxGpt12.h
  • IfxGpt12_T3_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T3_run() : IfxGpt12.h
  • IfxGpt12_T3_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T3_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T3_setEudInput() : IfxGpt12.h
  • IfxGpt12_T3_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T3_setInput() : IfxGpt12.h
  • IfxGpt12_T3_setMode() : IfxGpt12.h
  • IfxGpt12_T3_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T3_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T3_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T4_enableClearTimerT2() : IfxGpt12.h
  • IfxGpt12_T4_enableClearTimerT3() : IfxGpt12.h
  • IfxGpt12_T4_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T4_getMode() : IfxGpt12.h
  • IfxGpt12_T4_getSrc() : IfxGpt12.h
  • IfxGpt12_T4_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T4_run() : IfxGpt12.h
  • IfxGpt12_T4_setCaptureInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T4_setEudInput() : IfxGpt12.h
  • IfxGpt12_T4_setIncrementalInterfaceInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setInput() : IfxGpt12.h
  • IfxGpt12_T4_setInterruptEnable() : IfxGpt12.h
  • IfxGpt12_T4_setMode() : IfxGpt12.h
  • IfxGpt12_T4_setReloadInputMode() : IfxGpt12.h
  • IfxGpt12_T4_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T4_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T4_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T4_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T5_enableClearTimer() : IfxGpt12.h
  • IfxGpt12_T5_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T5_getMode() : IfxGpt12.h
  • IfxGpt12_T5_getSrc() : IfxGpt12.h
  • IfxGpt12_T5_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T5_run() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTrigger() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTriggerEnable() : IfxGpt12.h
  • IfxGpt12_T5_setCaptureTriggerMode() : IfxGpt12.h
  • IfxGpt12_T5_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T5_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T5_setEudInput() : IfxGpt12.h
  • IfxGpt12_T5_setInput() : IfxGpt12.h
  • IfxGpt12_T5_setMode() : IfxGpt12.h
  • IfxGpt12_T5_setRemoteControl() : IfxGpt12.h
  • IfxGpt12_T5_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T5_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T5_setTimerValue() : IfxGpt12.h
  • IfxGpt12_T6_enableClearTimer() : IfxGpt12.h
  • IfxGpt12_T6_getFrequency() : IfxGpt12.c , IfxGpt12.h
  • IfxGpt12_T6_getMode() : IfxGpt12.h
  • IfxGpt12_T6_getSrc() : IfxGpt12.h
  • IfxGpt12_T6_getTimerValue() : IfxGpt12.h
  • IfxGpt12_T6_run() : IfxGpt12.h
  • IfxGpt12_T6_setCounterInputMode() : IfxGpt12.h
  • IfxGpt12_T6_setDirectionSource() : IfxGpt12.h
  • IfxGpt12_T6_setEudInput() : IfxGpt12.h
  • IfxGpt12_T6_setInput() : IfxGpt12.h
  • IfxGpt12_T6_setMode() : IfxGpt12.h
  • IfxGpt12_T6_setReloadMode() : IfxGpt12.h
  • IfxGpt12_T6_setTimerDirection() : IfxGpt12.h
  • IfxGpt12_T6_setTimerPrescaler() : IfxGpt12.h
  • IfxGpt12_T6_setTimerValue() : IfxGpt12.h
  • IfxGtm_Atom_Agc_buildFeature() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_buildFeatureForChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelsUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableChannelUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_enableTimeTrigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_resetChannels() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelsForceUpdate() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setChannelsUpdate() : IfxGtm_Atom.h
  • IfxGtm_Atom_Agc_setTimeTrigger() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Agc_trigger() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_clearOneNotification() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_clearZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_configurePwmMode() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_getChannelPointer() : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getClockFrequency() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareOnePointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCompareZeroPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getOutputLevel() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getSrcPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_getTimerPointer() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_isOneNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_isZeroNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_raiseInterruptOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_raiseInterruptZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruInput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruReadAddress0() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setAruReadAddress1() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setClockSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompare() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareOne() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareOneShadow() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareShadow() : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareZero() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setCompareZeroShadow() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setCounterValue() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setMode() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setNotification() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setOneShotMode() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setResetSource() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSignalLevel() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setSomcControl() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_setSomcSignalLevelControl() : IfxGtm_Atom.h , IfxGtm_Atom.c
  • IfxGtm_Atom_Ch_setTriggerOutput() : IfxGtm_Atom.c , IfxGtm_Atom.h
  • IfxGtm_Atom_Pwm_init() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_initConfig() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_Pwm_start() : IfxGtm_Atom_Pwm.h , IfxGtm_Atom_Pwm.c
  • IfxGtm_Atom_Pwm_stop() : IfxGtm_Atom_Pwm.c , IfxGtm_Atom_Pwm.h
  • IfxGtm_Atom_PwmHl_getDeadtime() : IfxGtm_Atom_PwmHl.h , IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_getMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_getMode() : IfxGtm_Atom_PwmHl.h , IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_init() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_initConfig() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_invertActiveState() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_setDeadtime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setMinPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setMode() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setOnTime() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setOnTimeAndShift() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setPulse() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_setupChannels() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_stdIfPwmHlInit() : IfxGtm_Atom_PwmHl.c , IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_updateAndShiftOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateCenterAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateEdgeAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updatePulse() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updatePulseOff() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_PwmHl_updateShiftCenterAligned() : IfxGtm_Atom_PwmHl.c
  • IfxGtm_Atom_Timer_acknowledgeTimerIrq() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_acknowledgeTriggerIrq() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_addToChannelMask() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_applyUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_disableUpdate() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getFrequency() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getOffset() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getPeriod() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getPointer() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_getResolution() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_getTriggerPointer() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_init() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_initConfig() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_run() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_setFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setPeriod() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_setSingleMode() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_setTrigger() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_stdIfTimerInit() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Atom_Timer_stop() : IfxGtm_Atom_Timer.h , IfxGtm_Atom_Timer.c
  • IfxGtm_Atom_Timer_updateInputFrequency() : IfxGtm_Atom_Timer.c , IfxGtm_Atom_Timer.h
  • IfxGtm_Cmu_enableClocks() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_getClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getEclkFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_getFxClkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_getModuleFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_isClkClockEnabled() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_isEclkClockEnabled() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_isFxClockEnabled() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_selectClkInput() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_setClkFrequency() : IfxGtm_Cmu.h , IfxGtm_Cmu.c
  • IfxGtm_Cmu_setEclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_Cmu_setGclkFrequency() : IfxGtm_Cmu.c , IfxGtm_Cmu.h
  • IfxGtm_disable() : IfxGtm.c , IfxGtm.h
  • IfxGtm_Dpll_getSubIncFrequency() : IfxGtm_Dpll.h , IfxGtm_Dpll.c
  • IfxGtm_enable() : IfxGtm.c , IfxGtm.h
  • IfxGtm_getSysClkFrequency() : IfxGtm.h , IfxGtm.c
  • IfxGtm_isEnabled() : IfxGtm.h
  • IfxGtm_isModuleSuspended() : IfxGtm.h
  • IfxGtm_PinMap_setAtomTout() : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_PinMap_setTimTin() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_PinMap_setTomTout() : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_setSuspendMode() : IfxGtm.h
  • IfxGtm_Tbu_enableChannel() : IfxGtm_Tbu.h
  • IfxGtm_Tbu_getClockFrequency() : IfxGtm_Tbu.h , IfxGtm_Tbu.c
  • IfxGtm_Tbu_isChannelEnabled() : IfxGtm_Tbu.h
  • IfxGtm_Tim_Ch_clearCntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearDataLostEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearEcntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearGlitchEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_clearNewValueEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getCaptureClockFrequency() : IfxGtm_Tim.h , IfxGtm_Tim.c
  • IfxGtm_Tim_Ch_getCaptureClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getFilterClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getFilterClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getSrcPointer() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getTimeoutClockFrequency() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_getTimeoutClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isCntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isDataLostEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isEcntOverflowEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isGlitchEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_isNewValueEvent() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_resetChannel() : IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setChannelNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setClockSource() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setFilterNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setNotificationMode() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_Ch_setTimeoutNotification() : IfxGtm_Tim.c , IfxGtm_Tim.h
  • IfxGtm_Tim_getChannel() : IfxGtm_Tim.h
  • IfxGtm_Tim_In_clearNewData() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getDutyPercent() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPeriodSecond() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPeriodTicks() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_getPulseLengthTick() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_init() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_initConfig() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_isDataLost() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_isNewData() : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_onIsr() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_update() : IfxGtm_Tim_In.c , IfxGtm_Tim_In.h
  • IfxGtm_Tom_Ch_clearOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_clearZeroNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getChannelPointer() : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getClockFrequency() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareOnePointer() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getCompareZero() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getCompareZeroPointer() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getOutputLevel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getSrcPointer() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_getTgcPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_getTimerPointer() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_isOneNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_isZeroNotification() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_raiseInterruptOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_raiseInterruptZero() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setClockSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompare() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setCompareOne() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareOneShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCompareZero() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setCompareZeroShadow() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setCounterValue() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setGatedCounter() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setNotification() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setOneShotMode() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setPcm() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setResetSource() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setSignalLevel() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Ch_setSpe() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_setTriggerOutput() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Pwm_init() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_initConfig() : IfxGtm_Tom_Pwm.h , IfxGtm_Tom_Pwm.c
  • IfxGtm_Tom_Pwm_start() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_Pwm_stop() : IfxGtm_Tom_Pwm.c , IfxGtm_Tom_Pwm.h
  • IfxGtm_Tom_PwmHl_getDeadtime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_getMinPulse() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_getMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_init() : IfxGtm_Tom_PwmHl.h , IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_initConfig() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_invertActiveState() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_setDeadtime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setMinPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setMode() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setOnTime() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setOnTimeAndShift() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setPulse() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_setupChannels() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_stdIfPwmHlInit() : IfxGtm_Tom_PwmHl.c , IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_updateAndShiftOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateCenterAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateEdgeAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updatePulse() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updatePulseOff() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_PwmHl_updateShiftCenterAligned() : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Tom_Tgc_buildFeature() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_buildFeatureForChannel() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannel() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableChannelOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannels() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableChannelsOutput() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelsUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_enableChannelUpdate() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_enableTimeTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_resetChannels() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_setChannelForceUpdate() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_setChannelsForceUpdate() : IfxGtm_Tom.h , IfxGtm_Tom.c
  • IfxGtm_Tom_Tgc_setTimeTrigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_trigger() : IfxGtm_Tom.c , IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_writeGlobalControl() : IfxGtm_Tom.h
  • IfxGtm_Tom_Timer_acknowledgeTimerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_acknowledgeTriggerIrq() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_addToChannelMask() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_applyUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_disableUpdate() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getInputFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getOffset() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getResolution() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_getTriggerPointer() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_init() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_initConfig() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_run() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setPeriod() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setSingleMode() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_setTrigger() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_stdIfTimerInit() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_stop() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Tom_Timer_updateInputFrequency() : IfxGtm_Tom_Timer.c , IfxGtm_Tom_Timer.h
  • IfxGtm_Trig_fromDsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toDsadc() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toSent() : IfxGtm_Trig.c , IfxGtm_Trig.h
  • IfxGtm_Trig_toVadc() : IfxGtm_Trig.h , IfxGtm_Trig.c
  • IfxHssl_clearHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_clearHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_clearHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_clearInitialiseModeFlag() : IfxHssl.h
  • IfxHssl_disableHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsctModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_disableHsctReceivePath() : IfxHssl.h
  • IfxHssl_disableHsctTransmitPath() : IfxHssl.h
  • IfxHssl_disableHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_disableHsslModule() : IfxHssl.c , IfxHssl.h
  • IfxHssl_enableAllErrorFlags() : IfxHssl.h
  • IfxHssl_enableHsctInterrupt() : IfxHssl.h
  • IfxHssl_enableHsctInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsctModule() : IfxHssl.h , IfxHssl.c
  • IfxHssl_enableHsctReceivePath() : IfxHssl.h
  • IfxHssl_enableHsctTransmitPath() : IfxHssl.h
  • IfxHssl_enableHsslChannelErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsslCOKInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslERRInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslEXIInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslGlobalErrorInterruptFlag() : IfxHssl.h
  • IfxHssl_enableHsslModule() : IfxHssl.h , IfxHssl.c
  • IfxHssl_enableHsslRDIInterrupt() : IfxHssl.h
  • IfxHssl_enableHsslTRGInterrupt() : IfxHssl.h
  • IfxHssl_getAllMflagsStatus() : IfxHssl.h
  • IfxHssl_getCurrentCount() : IfxHssl.h
  • IfxHssl_getHsctAddress() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctIndex() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsctSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsctUnsolicitedStatusMessage() : IfxHssl.h
  • IfxHssl_getHsslAddress() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslChannelErrorInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsslCOKSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslERRSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslEXISrcPointer() : IfxHssl.h , IfxHssl.c
  • IfxHssl_getHsslGloabalErrorInterruptFlagStatus() : IfxHssl.h
  • IfxHssl_getHsslIndex() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslRDISrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getHsslTRGSrcPointer() : IfxHssl.c , IfxHssl.h
  • IfxHssl_getInitialiseModeFlagStatus() : IfxHssl.h
  • IfxHssl_getReloadCount() : IfxHssl.h
  • IfxHssl_Hssl_checkErrors() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_clearErrorFlags() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_delay() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_getReadData() : IfxHssl_Hssl.h
  • IfxHssl_Hssl_initChannel() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initChannelConfig() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initHsctModule() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initHsctModuleConfig() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_initHsslModule() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_initHsslModuleConfig() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_prepareStream() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_read() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_sendControlCommand() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_singleFrameRequest() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_waitAcknowledge() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_Hssl_write() : IfxHssl_Hssl.h , IfxHssl_Hssl.c
  • IfxHssl_Hssl_writeStream() : IfxHssl_Hssl.c , IfxHssl_Hssl.h
  • IfxHssl_isModuleSuspended() : IfxHssl.h
  • IfxHssl_resetHsctKernel() : IfxHssl.c , IfxHssl.h
  • IfxHssl_resetHsslKernel() : IfxHssl.h , IfxHssl.c
  • IfxHssl_sendHsctUnsolicitedStatusMessage() : IfxHssl.h
  • IfxHssl_setHsctRxLinkSpeed() : IfxHssl.h
  • IfxHssl_setHsctSleepMode() : IfxHssl.h
  • IfxHssl_setHsctTxLinkSpeed() : IfxHssl.h
  • IfxHssl_setHsslSleepMode() : IfxHssl.h
  • IfxHssl_setInitialiseModeFlag() : IfxHssl.h
  • IfxHssl_setReloadCount() : IfxHssl.h
  • IfxHssl_setSuspendMode() : IfxHssl.h
  • IfxHssl_setTimeoutReloadValue() : IfxHssl.h
  • IfxI2c_busIsFree() : IfxI2c.h
  • IfxI2c_clearAllDtrInterruptSources() : IfxI2c.h
  • IfxI2c_clearAllErrorInterruptSources() : IfxI2c.h
  • IfxI2c_clearAllProtocolInterruptSources() : IfxI2c.h
  • IfxI2c_clearBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearErrorInterruptSource() : IfxI2c.h
  • IfxI2c_clearLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_clearProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_clearSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_configureAsMaster() : IfxI2c.h , IfxI2c.c
  • IfxI2c_disableBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableErrorInterruptFlag() : IfxI2c.h
  • IfxI2c_disableErrorInterruptSource() : IfxI2c.h
  • IfxI2c_disableLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_disableModule() : IfxI2c.h , IfxI2c.c
  • IfxI2c_disableProtocolInterruptFlag() : IfxI2c.h
  • IfxI2c_disableProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_disableSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableBurstDataTransferInterrupt() : IfxI2c.h , IfxI2c.c
  • IfxI2c_enableBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableErrorInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableErrorInterruptFlag() : IfxI2c.h
  • IfxI2c_enableErrorInterruptSource() : IfxI2c.h
  • IfxI2c_enableLastBurstDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableLastBurstRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableLastSingleDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableLastSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_enableModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableProtocolInterrupt() : IfxI2c.h , IfxI2c.c
  • IfxI2c_enableProtocolInterruptFlag() : IfxI2c.h
  • IfxI2c_enableProtocolInterruptSource() : IfxI2c.h
  • IfxI2c_enableSingleDataTransferInterrupt() : IfxI2c.c , IfxI2c.h
  • IfxI2c_enableSingleRequestInterruptSource() : IfxI2c.h
  • IfxI2c_getAddress() : IfxI2c.c , IfxI2c.h
  • IfxI2c_getBaudrate() : IfxI2c.h , IfxI2c.c
  • IfxI2c_getBurstDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getBurstRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getBusStatus() : IfxI2c.h
  • IfxI2c_getErrorInterruptFlagStatus() : IfxI2c.h
  • IfxI2c_getErrorInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getErrorSrcPointer() : IfxI2c.h
  • IfxI2c_getIndex() : IfxI2c.h , IfxI2c.c
  • IfxI2c_getLastBurstDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getLastBurstRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getLastSingleDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getLastSingleRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getProtocolInterruptFlagStatus() : IfxI2c.h
  • IfxI2c_getProtocolInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_getProtocolSrcPointer() : IfxI2c.h
  • IfxI2c_getSingleDataTransferSrcPointer() : IfxI2c.h
  • IfxI2c_getSingleRequestInterruptSourceStatus() : IfxI2c.h
  • IfxI2c_I2c_initConfig() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_initDevice() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_initDeviceConfig() : IfxI2c_I2c.h , IfxI2c_I2c.c
  • IfxI2c_I2c_initModule() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_read() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_I2c_write() : IfxI2c_I2c.c , IfxI2c_I2c.h
  • IfxI2c_initSclSdaPin() : IfxI2c.c , IfxI2c.h
  • IfxI2c_isFifoRequest() : IfxI2c.h
  • IfxI2c_releaseBus() : IfxI2c.c , IfxI2c.h
  • IfxI2c_resetFifo() : IfxI2c.h , IfxI2c.c
  • IfxI2c_resetModule() : IfxI2c.c , IfxI2c.h
  • IfxI2c_run() : IfxI2c.h
  • IfxI2c_setBaudrate() : IfxI2c.c , IfxI2c.h
  • IfxI2c_setPinSelection() : IfxI2c.h
  • IfxI2c_setReceivePacketSize() : IfxI2c.h
  • IfxI2c_setSlaveDeviceAddress() : IfxI2c.h
  • IfxI2c_setSleepMode() : IfxI2c.h
  • IfxI2c_setTransmitPacketSize() : IfxI2c.h
  • IfxI2c_stop() : IfxI2c.h
  • IfxI2c_waitBusFree() : IfxI2c.h
  • IfxI2c_writeFifo() : IfxI2c.h
  • IfxIom_disableModule() : IfxIom.h
  • IfxIom_Driver_clearAllGlitch() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_clearHistory() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_clearLamMonGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_clearLamRefGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_disableEvents() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_disableLamEvent() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_enableLamEvent() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_getHistory() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_init() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_initConfig() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_initLam() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_initLamConfig() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_isLamMonGlitch() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_Driver_isLamRefGlitch() : IfxIom_Driver.c , IfxIom_Driver.h
  • IfxIom_Driver_restoreEvents() : IfxIom_Driver.h , IfxIom_Driver.c
  • IfxIom_enableModule() : IfxIom.h
  • IfxIom_getFrequency() : IfxIom.h , IfxIom.c
  • IfxIom_resetModule() : IfxIom.c , IfxIom.h
  • IfxIom_setSleepMode() : IfxIom.h
  • IfxMsc_clearAbraOverflowFlag() : IfxMsc.h
  • IfxMsc_clearAbraUnderflowFlag() : IfxMsc.h
  • IfxMsc_clearDataFrameInterruptFlag() : IfxMsc.h , IfxMsc.c
  • IfxMsc_clearRecieveDataInterruptFlag() : IfxMsc.h
  • IfxMsc_clearReset() : IfxMsc.c , IfxMsc.h
  • IfxMsc_clearUpstreamTimeout() : IfxMsc.h
  • IfxMsc_clearUpstreamValidFlag() : IfxMsc.h
  • IfxMsc_clearValidbit() : IfxMsc.h
  • IfxMsc_disableModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_disableUpstreamTimeoutInterrupt() : IfxMsc.h
  • IfxMsc_downstreamAbraBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_downstreamFractionalBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMsc_downstreamNormalBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMsc_enableModule() : IfxMsc.c , IfxMsc.h
  • IfxMsc_enableUpstreamTimeoutInterrupt() : IfxMsc.h
  • IfxMsc_getActiveDataFrameStatus() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getAddress() : IfxMsc.h , IfxMsc.c
  • IfxMsc_getAsyncClockBypass() : IfxMsc.h
  • IfxMsc_getData() : IfxMsc.h
  • IfxMsc_getDataFrameInterruptFlag() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getDataHighTarget() : IfxMsc.h
  • IfxMsc_getDataLowTarget() : IfxMsc.h
  • IfxMsc_getDownStreamExtension() : IfxMsc.h
  • IfxMsc_getIndex() : IfxMsc.c , IfxMsc.h
  • IfxMsc_getRecieveDataInterruptFlag() : IfxMsc.h
  • IfxMsc_getSrcPointer() : IfxMsc.h
  • IfxMsc_getUpstreamData() : IfxMsc.h
  • IfxMsc_getUpstreamParityErrorFlag() : IfxMsc.h
  • IfxMsc_getUpstreamTimeoutFlag() : IfxMsc.h
  • IfxMsc_getUpstreamValidFlag() : IfxMsc.h
  • IfxMsc_initEnPin() : IfxMsc.h
  • IfxMsc_initFclnPin() : IfxMsc.h
  • IfxMsc_initFclpPin() : IfxMsc.h
  • IfxMsc_initInjPin() : IfxMsc.h
  • IfxMsc_initSdiPin() : IfxMsc.h
  • IfxMsc_initSonPin() : IfxMsc.h
  • IfxMsc_initSopPin() : IfxMsc.h
  • IfxMsc_isModuleSuspended() : IfxMsc.h
  • IfxMsc_Msc_clearDataFrameInterrupt() : IfxMsc_Msc.h
  • IfxMsc_Msc_deInitModule() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_getActiveDataFrameStatus() : IfxMsc_Msc.h
  • IfxMsc_Msc_getDataFrameInterruptStatus() : IfxMsc_Msc.h
  • IfxMsc_Msc_getTarget() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_initializeAbra() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initializeDataExtension() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_initModule() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_initModuleConfig() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_receiveData() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendCommand() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendData() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_sendDataExtension() : IfxMsc_Msc.c , IfxMsc_Msc.h
  • IfxMsc_Msc_sendDataHigh() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_sendDataLow() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_setCommandTarget() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_Msc_setDataTarget() : IfxMsc_Msc.h , IfxMsc_Msc.c
  • IfxMsc_resetModule() : IfxMsc.h , IfxMsc.c
  • IfxMsc_setAsyncClockBypass() : IfxMsc.h
  • IfxMsc_setCommandTarget() : IfxMsc.h
  • IfxMsc_setDataHighTarget() : IfxMsc.h
  • IfxMsc_setDataLowTarget() : IfxMsc.h
  • IfxMsc_setDownStreamData() : IfxMsc.h
  • IfxMsc_setDownStreamExtension() : IfxMsc.h
  • IfxMsc_setDownStreamExtensionData() : IfxMsc.h
  • IfxMsc_setFractionalDividerStep() : IfxMsc.h
  • IfxMsc_setNdividerDownstream() : IfxMsc.h
  • IfxMsc_setSerialDataInputSelect() : IfxMsc.h
  • IfxMsc_setSleepMode() : IfxMsc.h
  • IfxMsc_setSuspendMode() : IfxMsc.h
  • IfxMsc_setTransmissionMode() : IfxMsc.h
  • IfxMsc_setUpstreamChannelRecieveRate() : IfxMsc.h
  • IfxMsc_setUpstreamTimeout() : IfxMsc.h
  • IfxMsc_setUpstreamTimeoutPrescalar() : IfxMsc.h
  • IfxMsc_upstreamFractionalBaudCalculator() : IfxMsc.h , IfxMsc.c
  • IfxMsc_upstreamNormalBaudCalculator() : IfxMsc.c , IfxMsc.h
  • IfxMtu_checkErrorFlags() : IfxMtu.h
  • IfxMtu_clearErrorTracking() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSram() : IfxMtu.c , IfxMtu.h
  • IfxMtu_clearSramContinue() : IfxMtu.h , IfxMtu.c
  • IfxMtu_clearSramStart() : IfxMtu.c , IfxMtu.h
  • IfxMtu_disableMbistShell() : IfxMtu.h
  • IfxMtu_enableErrorTracking() : IfxMtu.h , IfxMtu.c
  • IfxMtu_enableMbistShell() : IfxMtu.h
  • IfxMtu_enableModule() : IfxMtu.h
  • IfxMtu_getSystemAddress() : IfxMtu.c , IfxMtu.h
  • IfxMtu_getTrackedSramAddresses() : IfxMtu.c , IfxMtu.h
  • IfxMtu_isAutoInitRunning() : IfxMtu.h
  • IfxMtu_isErrorTrackingEnabled() : IfxMtu.h
  • IfxMtu_isErrorTrackingOverflow() : IfxMtu.h
  • IfxMtu_isMbistDone() : IfxMtu.h
  • IfxMtu_isModuleEnabled() : IfxMtu.h
  • IfxMtu_readSramAddress() : IfxMtu.c , IfxMtu.h
  • IfxMtu_runNonDestructiveInversionTest() : IfxMtu.c , IfxMtu.h
  • IfxMtu_waitForMbistDone() : IfxMtu.c
  • IfxMtu_writeSramAddress() : IfxMtu.h , IfxMtu.c
  • IfxMultican_calcTimingFromBTR() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Can_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_getConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_getModuleFrequency() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_initModule() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_initModuleConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_cancelSend() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_clearRxPending() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_clearTxPending() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_getConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_getPendingId() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_getStatus() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_init() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_initConfig() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_isRxPending() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_MsgObj_isTransmitRequested() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_isTxPending() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_readLongFrame() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_readMessage() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_MsgObj_sendLongFrame() : IfxMultican_Can.h
  • IfxMultican_Can_MsgObj_sendMessage() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_Can_Node_activate() : IfxMultican_Can.h
  • IfxMultican_Can_Node_deactivate() : IfxMultican_Can.h
  • IfxMultican_Can_Node_deinit() : IfxMultican_Can.h
  • IfxMultican_Can_Node_getConfig() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_Node_init() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_Node_initConfig() : IfxMultican_Can.h , IfxMultican_Can.c
  • IfxMultican_Can_Node_recoverBusOff() : IfxMultican_Can.h
  • IfxMultican_Can_Node_sendToBusOff() : IfxMultican_Can.c , IfxMultican_Can.h
  • IfxMultican_clearMessagePendingSeletor() : IfxMultican.h
  • IfxMultican_clearPendingMessageNotification() : IfxMultican.h
  • IfxMultican_deinit() : IfxMultican.c , IfxMultican.h
  • IfxMultican_disableModule() : IfxMultican.h
  • IfxMultican_disableSleepMode() : IfxMultican.h
  • IfxMultican_enableModule() : IfxMultican.h
  • IfxMultican_enableSleepMode() : IfxMultican.h
  • IfxMultican_getAddress() : IfxMultican.h , IfxMultican.c
  • IfxMultican_getFractionalDividerMode() : IfxMultican.h
  • IfxMultican_getFractionalDividerStepValue() : IfxMultican.h
  • IfxMultican_getIndex() : IfxMultican.c , IfxMultican.h
  • IfxMultican_getInputClock() : IfxMultican.h
  • IfxMultican_getSrcPointer() : IfxMultican.h , IfxMultican.c
  • IfxMultican_isModuleEnabled() : IfxMultican.h
  • IfxMultican_isModuleSuspended() : IfxMultican.h
  • IfxMultican_Message_init() : IfxMultican.h
  • IfxMultican_Message_longFrameInit() : IfxMultican.h
  • IfxMultican_MsgObj_cancelSend() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_clearDataRegisters() : IfxMultican.h
  • IfxMultican_MsgObj_clearFifoGatewayPointers() : IfxMultican.h
  • IfxMultican_MsgObj_clearRxPending() : IfxMultican.h
  • IfxMultican_MsgObj_clearStatusFlag() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_clearTxPending() : IfxMultican.h
  • IfxMultican_MsgObj_deinit() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_doReadLongFrame() : IfxMultican.c
  • IfxMultican_MsgObj_doReadMessage() : IfxMultican.c
  • IfxMultican_MsgObj_getBottomObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getDataLengthCode() : IfxMultican.h
  • IfxMultican_MsgObj_getMessageId() : IfxMultican.h
  • IfxMultican_MsgObj_getNextObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getPendingId() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_getPointer() : IfxMultican.h
  • IfxMultican_MsgObj_getStatus() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_getStatusFlag() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_isExtendedFrame() : IfxMultican.h
  • IfxMultican_MsgObj_isRxPending() : IfxMultican.h
  • IfxMultican_MsgObj_isTransmitRequested() : IfxMultican.h
  • IfxMultican_MsgObj_isTxPending() : IfxMultican.h
  • IfxMultican_MsgObj_readLongFrame() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_readMessage() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_sendLongFrame() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_sendMessage() : IfxMultican.h , IfxMultican.c
  • IfxMultican_MsgObj_setAcceptanceMask() : IfxMultican.h
  • IfxMultican_MsgObj_setBitRateSwitch() : IfxMultican.h
  • IfxMultican_MsgObj_setBottomObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setCurrentObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setDataCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setDataLengthCode() : IfxMultican.h
  • IfxMultican_MsgObj_setDataLengthCodeCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setExtendedDataLength() : IfxMultican.h
  • IfxMultican_MsgObj_setFilter() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_setGatewayDataFrameSend() : IfxMultican.h
  • IfxMultican_MsgObj_setIdentifierCopy() : IfxMultican.h
  • IfxMultican_MsgObj_setIdentifierExtension() : IfxMultican.h
  • IfxMultican_MsgObj_setMatchingId() : IfxMultican.h
  • IfxMultican_MsgObj_setMessageId() : IfxMultican.h
  • IfxMultican_MsgObj_setMessageMode() : IfxMultican.h
  • IfxMultican_MsgObj_setMessagePendingNumber() : IfxMultican.h
  • IfxMultican_MsgObj_setOverflowInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setPriorityClass() : IfxMultican.h
  • IfxMultican_MsgObj_setReceiveInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setReceiveInterruptNodePointer() : IfxMultican.h
  • IfxMultican_MsgObj_setRemoteMonitoring() : IfxMultican.h
  • IfxMultican_MsgObj_setSelectObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setSingleDataTransfer() : IfxMultican.h
  • IfxMultican_MsgObj_setSingleTransmitTrial() : IfxMultican.h
  • IfxMultican_MsgObj_setStatusFlag() : IfxMultican.c , IfxMultican.h
  • IfxMultican_MsgObj_setTopObjectPointer() : IfxMultican.h
  • IfxMultican_MsgObj_setTransmitInterrupt() : IfxMultican.h
  • IfxMultican_MsgObj_setTransmitInterruptNodePointer() : IfxMultican.h
  • IfxMultican_MsgObj_writeTxfifo() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Node_activate() : IfxMultican.h
  • IfxMultican_Node_deactivate() : IfxMultican.h
  • IfxMultican_Node_deinit() : IfxMultican.h , IfxMultican.c
  • IfxMultican_Node_disableConfigurationChange() : IfxMultican.h
  • IfxMultican_Node_enableConfigurationChange() : IfxMultican.h
  • IfxMultican_Node_getCodeFromDataLength() : IfxMultican.h
  • IfxMultican_Node_getDataLengthFromCode() : IfxMultican.h
  • IfxMultican_Node_getPointer() : IfxMultican.h
  • IfxMultican_Node_initRxPin() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_initTxPin() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_recoverBusOff() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_resetControlRegister() : IfxMultican.h
  • IfxMultican_Node_resetErrorCounters() : IfxMultican.h
  • IfxMultican_Node_resetInterruptPointers() : IfxMultican.h
  • IfxMultican_Node_setAlertInterrupt() : IfxMultican.h
  • IfxMultican_Node_setAlertInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setAnalyzerMode() : IfxMultican.h
  • IfxMultican_Node_setBitTiming() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_setErrorWarningLevel() : IfxMultican.h
  • IfxMultican_Node_setFastBitTiming() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_setFastNode() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterInterrupt() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setFrameCounterMode() : IfxMultican.h
  • IfxMultican_Node_setLastErrorCodeInterrupt() : IfxMultican.h
  • IfxMultican_Node_setLastErrorCodeInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setLoopBackMode() : IfxMultican.h
  • IfxMultican_Node_setNominalBitTiming() : IfxMultican.c , IfxMultican.h
  • IfxMultican_Node_setReceiveErrorCounter() : IfxMultican.h
  • IfxMultican_Node_setTimerEventInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setTransceiverDelayCompensation() : IfxMultican.h
  • IfxMultican_Node_setTransceiverDelayCompensationOffset() : IfxMultican.h
  • IfxMultican_Node_setTransferInterrupt() : IfxMultican.h
  • IfxMultican_Node_setTransferInterruptPointer() : IfxMultican.h
  • IfxMultican_Node_setTransmitErrorCounter() : IfxMultican.h
  • IfxMultican_resetModule() : IfxMultican.h , IfxMultican.c
  • IfxMultican_setFractionalDividerMode() : IfxMultican.h
  • IfxMultican_setFractionalDividerStepValue() : IfxMultican.h
  • IfxMultican_setInputClock() : IfxMultican.h
  • IfxMultican_setListCommand() : IfxMultican.c , IfxMultican.h
  • IfxMultican_setMessageIndexMask() : IfxMultican.h
  • IfxMultican_setSleepMode() : IfxMultican.h
  • IfxMultican_setSuspendMode() : IfxMultican.h
  • IfxMultican_waitListReady() : IfxMultican.h
  • IfxPort_disableEmergencyStop() : IfxPort.c , IfxPort.h
  • IfxPort_enableEmergencyStop() : IfxPort.c , IfxPort.h
  • IfxPort_getAddress() : IfxPort.c , IfxPort.h
  • IfxPort_getGroupState() : IfxPort.h
  • IfxPort_getIndex() : IfxPort.c , IfxPort.h
  • IfxPort_getPinState() : IfxPort.h
  • IfxPort_Io_initModule() : IfxPort_Io.c , IfxPort_Io.h
  • IfxPort_resetESR() : IfxPort.c , IfxPort.h
  • IfxPort_setESR() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupModeInput() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupModeOutput() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupPadDriver() : IfxPort.c , IfxPort.h
  • IfxPort_setGroupState() : IfxPort.h
  • IfxPort_setPinHigh() : IfxPort.h
  • IfxPort_setPinLow() : IfxPort.h
  • IfxPort_setPinMode() : IfxPort.h , IfxPort.c
  • IfxPort_setPinModeInput() : IfxPort.h
  • IfxPort_setPinModeLvdsHigh() : IfxPort.c , IfxPort.h
  • IfxPort_setPinModeLvdsMedium() : IfxPort.h , IfxPort.c
  • IfxPort_setPinModeOutput() : IfxPort.h
  • IfxPort_setPinPadDriver() : IfxPort.c , IfxPort.h
  • IfxPort_setPinState() : IfxPort.h
  • IfxPort_togglePin() : IfxPort.h
  • IfxPsi5_disableModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_enableAllChannels() : IfxPsi5.h
  • IfxPsi5_enableModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_getSrcPointer() : IfxPsi5.h
  • IfxPsi5_getStatusCrci() : IfxPsi5.h
  • IfxPsi5_getStatusMei() : IfxPsi5.h
  • IfxPsi5_getStatusNbi() : IfxPsi5.h
  • IfxPsi5_getStatusNfi() : IfxPsi5.h
  • IfxPsi5_getStatusRdi() : IfxPsi5.h
  • IfxPsi5_getStatusRmi() : IfxPsi5.h
  • IfxPsi5_getStatusRsi() : IfxPsi5.h
  • IfxPsi5_getStatusTei() : IfxPsi5.h
  • IfxPsi5_initRxPin() : IfxPsi5.h
  • IfxPsi5_initTxPin() : IfxPsi5.h
  • IfxPsi5_isModuleSuspended() : IfxPsi5.h
  • IfxPsi5_Psi5_deInitModule() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_enableModule() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_getFracDivClock() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_initChannel() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initChannelConfig() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_initializeClock() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_initModuleConfig() : IfxPsi5_Psi5.c , IfxPsi5_Psi5.h
  • IfxPsi5_Psi5_readChannelFrame() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_readChannelSerialMessage() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_resetModule() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_sendChannelData() : IfxPsi5_Psi5.h , IfxPsi5_Psi5.c
  • IfxPsi5_Psi5_startupChannel() : IfxPsi5_Psi5.h
  • IfxPsi5_resetModule() : IfxPsi5.c , IfxPsi5.h
  • IfxPsi5_setFractionalDivider() : IfxPsi5.h
  • IfxPsi5_setRxInput() : IfxPsi5.h
  • IfxPsi5_setSuspendMode() : IfxPsi5.h
  • IfxPsi5s_disableAscReceiver() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_disableModule() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableAscReceiver() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableDisableChannels() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_enableDisableChannelTriggerCounters() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_getReadFrameStatus() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_getSuccessfullyReceivedFrameStatus() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_initClkPin() : IfxPsi5s.h
  • IfxPsi5s_initRxPin() : IfxPsi5s.h
  • IfxPsi5s_initTxPin() : IfxPsi5s.h
  • IfxPsi5s_isModuleSuspended() : IfxPsi5s.h
  • IfxPsi5s_Psi5s_deInitModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_enableAscReceiver() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableDisableChannels() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_enableModule() : IfxPsi5s_Psi5s.h , IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_getFracDivClock() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_getReadFrameStatus() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initChannel() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initChannelConfig() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initializeClock() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_initModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_initModuleConfig() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_readFrame() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_resetModule() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_sendChannelData() : IfxPsi5s_Psi5s.c , IfxPsi5s_Psi5s.h
  • IfxPsi5s_Psi5s_setBaudrate() : IfxPsi5s_Psi5s.c
  • IfxPsi5s_Psi5s_startAscTransactions() : IfxPsi5s_Psi5s.h
  • IfxPsi5s_resetModule() : IfxPsi5s.h , IfxPsi5s.c
  • IfxPsi5s_setRxInput() : IfxPsi5s.h
  • IfxPsi5s_setSleepMode() : IfxPsi5s.h
  • IfxPsi5s_setSuspendMode() : IfxPsi5s.h
  • IfxPsi5s_startAscTransactions() : IfxPsi5s.c , IfxPsi5s.h
  • IfxPsi5s_stopAscTransactions() : IfxPsi5s.h , IfxPsi5s.c
  • IfxQspi_calcRealBaudrate() : IfxQspi.h , IfxQspi.c
  • IfxQspi_calculateBasicConfigurationValue() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateDelayConstants() : IfxQspi.c , IfxQspi.h
  • IfxQspi_calculateExtendedConfigurationValue() : IfxQspi.h , IfxQspi.c
  • IfxQspi_calculatePrescaler() : IfxQspi.h , IfxQspi.c
  • IfxQspi_calculateTimeQuantumLength() : IfxQspi.h , IfxQspi.c
  • IfxQspi_clearAllEventFlags() : IfxQspi.h
  • IfxQspi_clearRxReq() : IfxQspi.h
  • IfxQspi_clearTxReq() : IfxQspi.h
  • IfxQspi_configPT1Event() : IfxQspi.h
  • IfxQspi_configPT2Event() : IfxQspi.h
  • IfxQspi_enableLoopbackMode() : IfxQspi.h
  • IfxQspi_enablePT1Event() : IfxQspi.h
  • IfxQspi_enablePT2Event() : IfxQspi.h
  • IfxQspi_enableUsrEvent() : IfxQspi.h
  • IfxQspi_getAddress() : IfxQspi.c , IfxQspi.h
  • IfxQspi_getErrorFlags() : IfxQspi.h
  • IfxQspi_getErrorSrc() : IfxQspi.h
  • IfxQspi_getIndex() : IfxQspi.h , IfxQspi.c
  • IfxQspi_getMode() : IfxQspi.h
  • IfxQspi_getModuleFrequency() : IfxQspi.h
  • IfxQspi_getPhase() : IfxQspi.h
  • IfxQspi_getReceiveFifoLevel() : IfxQspi.h
  • IfxQspi_getReceiveSrc() : IfxQspi.h
  • IfxQspi_getRxFifoMode() : IfxQspi.h
  • IfxQspi_getTimeQuantaFrequency() : IfxQspi.h
  • IfxQspi_getTransmitFifoLevel() : IfxQspi.h
  • IfxQspi_getTransmitSrc() : IfxQspi.h
  • IfxQspi_getTxFifoMode() : IfxQspi.h
  • IfxQspi_initMrstInPin() : IfxQspi.h
  • IfxQspi_initMrstInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initMrstOutPin() : IfxQspi.h
  • IfxQspi_initMtsrInPin() : IfxQspi.h
  • IfxQspi_initMtsrInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initMtsrOutPin() : IfxQspi.h
  • IfxQspi_initSclkInPin() : IfxQspi.h
  • IfxQspi_initSclkInPinWithPadLevel() : IfxQspi.h
  • IfxQspi_initSclkOutPin() : IfxQspi.h
  • IfxQspi_initSlsi() : IfxQspi.h
  • IfxQspi_initSlsiWithPadLevel() : IfxQspi.h
  • IfxQspi_initSlso() : IfxQspi.h
  • IfxQspi_isModuleEnabled() : IfxQspi.h
  • IfxQspi_isModuleSuspended() : IfxQspi.h
  • IfxQspi_pause() : IfxQspi.h
  • IfxQspi_permutateBigEndian() : IfxQspi.h
  • IfxQspi_read16() : IfxQspi.h , IfxQspi.c
  • IfxQspi_read32() : IfxQspi.h , IfxQspi.c
  • IfxQspi_read8() : IfxQspi.c , IfxQspi.h
  • IfxQspi_readReceiveFifo() : IfxQspi.h
  • IfxQspi_recalcBasicConfiguration() : IfxQspi.c , IfxQspi.h
  • IfxQspi_requestReset() : IfxQspi.h
  • IfxQspi_resetModule() : IfxQspi.c , IfxQspi.h
  • IfxQspi_run() : IfxQspi.h
  • IfxQspi_setBitsegment1() : IfxQspi.h
  • IfxQspi_setBitsegment2() : IfxQspi.h
  • IfxQspi_setBitsegment3() : IfxQspi.h
  • IfxQspi_setDisableModuleRequest() : IfxQspi.h
  • IfxQspi_setEnableModuleRequest() : IfxQspi.h
  • IfxQspi_setReceiveFifoInterrruptThreshold() : IfxQspi.h
  • IfxQspi_setRxFifoMode() : IfxQspi.h
  • IfxQspi_setSlaveSelectOutputControl() : IfxQspi.c , IfxQspi.h
  • IfxQspi_setSleepMode() : IfxQspi.h
  • IfxQspi_setSuspendMode() : IfxQspi.h
  • IfxQspi_setTimeQuantum() : IfxQspi.h
  • IfxQspi_setTransmitFifoInterrruptThreshold() : IfxQspi.h
  • IfxQspi_setTxFifoMode() : IfxQspi.h
  • IfxQspi_SpiMaster_activateSlso() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_activeChannel() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_deactivateSlso() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_exchange() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_getChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_getStatus() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_initChannel() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_initChannelConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_initModule() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_initModuleConfig() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrDmaReceive() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrDmaTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrError() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrPhaseTransition() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrReceive() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_isrTransmit() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_isrUserDefined() : IfxQspi_SpiMaster.h , IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_lock() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_packLongModeBuffer() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_read() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_readReceiveFifo() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_setChannelBaudrate() : IfxQspi_SpiMaster.c , IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_unlock() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_write() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_writeBasicConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeExtendedConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeLong() : IfxQspi_SpiMaster.c
  • IfxQspi_SpiMaster_writeMixedDataConfiguration() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_writeTransmitFifo() : IfxQspi_SpiMaster.h
  • IfxQspi_SpiSlave_exchange() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_getStatus() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_initModule() : IfxQspi_SpiSlave.c , IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_initModuleConfig() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrDmaReceive() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrDmaTransmit() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrError() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrReceive() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_isrTransmit() : IfxQspi_SpiSlave.h , IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_read() : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_readReceiveFifo() : IfxQspi_SpiSlave.h
  • IfxQspi_SpiSlave_write() : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_writeTransmitFifo() : IfxQspi_SpiSlave.h
  • IfxQspi_write16() : IfxQspi.h , IfxQspi.c
  • IfxQspi_write32() : IfxQspi.h , IfxQspi.c
  • IfxQspi_write8() : IfxQspi.c , IfxQspi.h
  • IfxQspi_writeBasicConfiguration() : IfxQspi.h
  • IfxQspi_writeBasicConfigurationBeginStream() : IfxQspi.h
  • IfxQspi_writeBasicConfigurationEndStream() : IfxQspi.h
  • IfxQspi_writeExtendedConfiguration() : IfxQspi.h
  • IfxQspi_writeMixedDataTransmitFifo() : IfxQspi.h
  • IfxQspi_writeTransmitFifo() : IfxQspi.h
  • IfxScuCcu_calculateSysPllDividers() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getBaud1Frequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getBaud2Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getBbbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getCanFrequency() : IfxScuCcu.h
  • IfxScuCcu_getCpuFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getEvrFrequency() : IfxScuCcu.h
  • IfxScuCcu_getFsi2Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getFsiFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getGtmFrequency() : IfxScuCcu.h
  • IfxScuCcu_getMaxFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getModuleFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getOsc0Frequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getOscFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getPll2ErayFrequency() : IfxScuCcu.h
  • IfxScuCcu_getPll2Frequency() : IfxScuCcu.h
  • IfxScuCcu_getPllErayFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getPllErayVcoFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getPllFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getPllVcoFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getSourceFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getSourceSelection() : IfxScuCcu.h
  • IfxScuCcu_getSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_getSriFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_getStmFrequency() : IfxScuCcu.h
  • IfxScuCcu_init() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_initConfig() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_initErayPll() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_initErayPllConfig() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_isOscillatorStable() : IfxScuCcu.c
  • IfxScuCcu_setCpuFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setGtmFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setPll2ErayFrequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setPll2Frequency() : IfxScuCcu.c , IfxScuCcu.h
  • IfxScuCcu_setSpbFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_setSriFrequency() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_switchToBackupClock() : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_wait() : IfxScuCcu.c
  • IfxScuEru_clearAllEventFlags() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_clearEventFlag() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_clearInputChannelConfiguration() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_clearOutputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_connectTrigger() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableAutoClear() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_disableFallingEdgeDetection() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disablePatternDetectionTrigger() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_disableRisingEdgeDetection() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_disableTriggerPulse() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableAutoClear() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enableFallingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enablePatternDetectionTrigger() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_enableRisingEdgeDetection() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_enableTriggerPulse() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getAllEventFlagsStatus() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getEventFlagStatus() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getInputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getOutputChannelConfiguration() : IfxScuEru.c , IfxScuEru.h
  • IfxScuEru_getPatternDetectionResult() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_getWholePatternDetectionResult() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_initReqPin() : IfxScuEru.h
  • IfxScuEru_selectExternalInput() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_setEventFlag() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_setFlagPatternDetection() : IfxScuEru.h , IfxScuEru.c
  • IfxScuEru_setInterruptGatingPattern() : IfxScuEru.c , IfxScuEru.h
  • IfxScuWdt_calculateLfsr() : IfxScuWdt.asm.h
  • IfxScuWdt_changeCpuWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_changeCpuWatchdogReload() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeSafetyWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_changeSafetyWatchdogReload() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_clearCpuEndinit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_clearCpuEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_clearSafetyEndinit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_clearSafetyEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_disableCpuWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_disableSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_enableCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_enableSafetyWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_enableWatchdogWithDebugger() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogEndInit() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getCpuWatchdogEndInitInline() : IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogPassword() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_getCpuWatchdogPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogEndInit() : IfxScuWdt.h
  • IfxScuWdt_getSafetyWatchdogPassword() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_getSafetyWatchdogPasswordInline() : IfxScuWdt.h
  • IfxScuWdt_initConfig() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_initCpuWatchdog() : IfxScuWdt.h , IfxScuWdt.c
  • IfxScuWdt_initSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_serviceCpuWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_serviceSafetyWatchdog() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setCpuEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setCpuEndinitInline() : IfxScuWdt.h
  • IfxScuWdt_setSafetyEndinit() : IfxScuWdt.c , IfxScuWdt.h
  • IfxScuWdt_setSafetyEndinitInline() : IfxScuWdt.h
  • IfxSent_clearInterruptStatus() : IfxSent.h
  • IfxSent_disableChannel() : IfxSent.h
  • IfxSent_disableModule() : IfxSent.h
  • IfxSent_enableChannel() : IfxSent.h
  • IfxSent_enableModule() : IfxSent.h
  • IfxSent_getAndClearInterruptStatus() : IfxSent.h
  • IfxSent_getChannelInterruptStatus() : IfxSent.h
  • IfxSent_getChannelSrc() : IfxSent.h
  • IfxSent_getChannelUnitTime() : IfxSent.h , IfxSent.c
  • IfxSent_getInterruptStatus() : IfxSent.h
  • IfxSent_getModuleClock() : IfxSent.h , IfxSent.c
  • IfxSent_initializeChannelUnitTime() : IfxSent.c , IfxSent.h
  • IfxSent_initializeModuleClock() : IfxSent.c , IfxSent.h
  • IfxSent_initSentPin() : IfxSent.h
  • IfxSent_initSpcPin() : IfxSent.h
  • IfxSent_isModuleEnabled() : IfxSent.h
  • IfxSent_isModuleSuspended() : IfxSent.h
  • IfxSent_readReceivedChannelStatus() : IfxSent.h
  • IfxSent_readReceivedCrc() : IfxSent.h
  • IfxSent_readReceivedData() : IfxSent.h
  • IfxSent_readReceivedStatus() : IfxSent.h
  • IfxSent_readReceivedStatusAndCommunicationNibble() : IfxSent.h
  • IfxSent_readReceivedTimeStamp() : IfxSent.h
  • IfxSent_readSpcDelayLength() : IfxSent.h
  • IfxSent_readSpcPulseLength() : IfxSent.h
  • IfxSent_resetModule() : IfxSent.h , IfxSent.c
  • IfxSent_Sent_deInitModule() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_getAndClearInterruptStatus() : IfxSent_Sent.h
  • IfxSent_Sent_initChannel() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_initChannelConfig() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_initModule() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_Sent_initModuleConfig() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_readChannelSerialDataFrame() : IfxSent_Sent.h , IfxSent_Sent.c
  • IfxSent_Sent_readChannelSerialMessageFrame() : IfxSent_Sent.c , IfxSent_Sent.h
  • IfxSent_setAltiInput() : IfxSent.h
  • IfxSent_setChannelFractionalDivider() : IfxSent.h
  • IfxSent_setChannelPreDivider() : IfxSent.h
  • IfxSent_setSleepMode() : IfxSent.h
  • IfxSent_setSuspendMode() : IfxSent.h
  • IfxSent_setTimeStampPredivider() : IfxSent.h
  • IfxSent_setWatchDogTimerLimit() : IfxSent.h
  • IfxSmu_activateFsp() : IfxSmu.h
  • IfxSmu_activatePes() : IfxSmu.h
  • IfxSmu_clearAlarm() : IfxSmu.h , IfxSmu.c
  • IfxSmu_cmd() : IfxSmu.c , IfxSmu.h
  • IfxSmu_enableAlarmFsp() : IfxSmu.h , IfxSmu.c
  • IfxSmu_enableClearAlarmStatus() : IfxSmu.h
  • IfxSmu_getAlarm() : IfxSmu.h , IfxSmu.c
  • IfxSmu_getFspFaultFreeFrequency() : IfxSmu.h , IfxSmu.c
  • IfxSmu_getFspFaultStateTime() : IfxSmu.h , IfxSmu.c
  • IfxSmu_initFsp() : IfxSmu.h , IfxSmu.c
  • IfxSmu_initFspConfig() : IfxSmu.h
  • IfxSmu_isAlarmSet() : IfxSmu.h , IfxSmu.c
  • IfxSmu_lock() : IfxSmu.c , IfxSmu.h
  • IfxSmu_lockForever() : IfxSmu.c , IfxSmu.h
  • IfxSmu_releaseFsp() : IfxSmu.h
  • IfxSmu_setAlarmConfig() : IfxSmu.c , IfxSmu.h
  • IfxSmu_start() : IfxSmu.h
  • IfxSmu_stopRecoveryTimer() : IfxSmu.h
  • IfxSmu_triggerAlarm() : IfxSmu.h
  • IfxSmu_unlock() : IfxSmu.c , IfxSmu.h
  • IfxSrc_clearOverrun() : IfxSrc.h
  • IfxSrc_clearRequest() : IfxSrc.h
  • IfxSrc_deinit() : IfxSrc.h
  • IfxSrc_disable() : IfxSrc.h
  • IfxSrc_enable() : IfxSrc.h
  • IfxSrc_init() : IfxSrc.h
  • IfxSrc_isOverrun() : IfxSrc.h
  • IfxSrc_isRequested() : IfxSrc.h
  • IfxSrc_setRequest() : IfxSrc.h
  • IfxStdIf_DPipe_canReadCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_canWriteCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_clearRx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_clearTx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_flushTx() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getReadCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getReadEvent() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getSendCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getTxTimeStamp() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getWriteCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_getWriteEvent() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onError() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onReceive() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_onTransmit() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_print() : IfxStdIf_DPipe.c , IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_read() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_resetSendCount() : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_write() : IfxStdIf_DPipe.h
  • IfxStdIf_Pos_getAbsolutePosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getDirection() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getFault() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getOffset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getPeriodPerRotation() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getRawPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getRefreshPeriod() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getResolution() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getSensorType() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getSpeed() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_getTurn() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_initConfig() : IfxStdIf_Pos.c , IfxStdIf_Pos.h
  • IfxStdIf_Pos_isFault() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_onEventA() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_onZeroIrq() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_printStatus() : IfxStdIf_Pos.c , IfxStdIf_Pos.h
  • IfxStdIf_Pos_radsToRpm() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_reset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_resetFaults() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_rpmToRads() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setOffset() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setRawPosition() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setRefreshPeriod() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_setSpeed() : IfxStdIf_Pos.h
  • IfxStdIf_Pos_update() : IfxStdIf_Pos.h
  • IfxStdIf_PwmHl_getDeadtime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getMinPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getMode() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_getTimer() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_initConfig() : IfxStdIf_PwmHl.c , IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setDeadtime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setMinPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setMode() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setOnTime() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setOnTimeAndShift() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setPulse() : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_setupChannels() : IfxStdIf_PwmHl.h
  • IfxStdIf_Timer_ackTimerIrq() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ackTriggerIrq() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_applyUpdate() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_disableUpdate() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getInputFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getPeriod() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getPeriodSecond() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getResolution() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_getTrigger() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_initConfig() : IfxStdIf_Timer.c , IfxStdIf_Timer.h
  • IfxStdIf_Timer_initStdIf() : IfxStdIf_Timer.h , IfxStdIf_Timer.c
  • IfxStdIf_Timer_run() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setFrequency() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setPeriod() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setSingleMode() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_setTrigger() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_stop() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_sToTick() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_tickToS() : IfxStdIf_Timer.h
  • IfxStdIf_Timer_updateInputFrequency() : IfxStdIf_Timer.h
  • IfxStm_clearCompareFlag() : IfxStm.c , IfxStm.h
  • IfxStm_disableComparatorInterrupt() : IfxStm.c , IfxStm.h
  • IfxStm_disableModule() : IfxStm.c , IfxStm.h
  • IfxStm_enableComparatorInterrupt() : IfxStm.h , IfxStm.c
  • IfxStm_enableOcdsSuspend() : IfxStm.c , IfxStm.h
  • IfxStm_get() : IfxStm.h
  • IfxStm_getAddress() : IfxStm.c , IfxStm.h
  • IfxStm_getCompare() : IfxStm.h
  • IfxStm_getFrequency() : IfxStm.h
  • IfxStm_getIndex() : IfxStm.h , IfxStm.c
  • IfxStm_getLower() : IfxStm.h
  • IfxStm_getOffset12Timer() : IfxStm.h
  • IfxStm_getOffset16Timer() : IfxStm.h
  • IfxStm_getOffset20Timer() : IfxStm.h
  • IfxStm_getOffset32Timer() : IfxStm.h
  • IfxStm_getOffset4Timer() : IfxStm.h
  • IfxStm_getOffset8Timer() : IfxStm.h
  • IfxStm_getOffsetTimer() : IfxStm.h
  • IfxStm_getSrcPointer() : IfxStm.c , IfxStm.h
  • IfxStm_getTicksFromMicroseconds() : IfxStm.h
  • IfxStm_getTicksFromMilliseconds() : IfxStm.h
  • IfxStm_increaseCompare() : IfxStm.h
  • IfxStm_initCompare() : IfxStm.h , IfxStm.c
  • IfxStm_initCompareConfig() : IfxStm.c , IfxStm.h
  • IfxStm_isCompareFlagSet() : IfxStm.h , IfxStm.c
  • IfxStm_isModuleSuspended() : IfxStm.h
  • IfxStm_resetModule() : IfxStm.c , IfxStm.h
  • IfxStm_setCompareControl() : IfxStm.h , IfxStm.c
  • IfxStm_setSleepMode() : IfxStm.h
  • IfxStm_setSuspendMode() : IfxStm.h
  • IfxStm_Timer_acknowledgeTimerIrq() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_getFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getInputFrequency() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_getPeriod() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_getResolution() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_init() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_initConfig() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_run() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_setFrequency() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_setPeriod() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_setSingleMode() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_Timer_stdIfTimerInit() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_stop() : IfxStm_Timer.c , IfxStm_Timer.h
  • IfxStm_Timer_updateInputFrequency() : IfxStm_Timer.h , IfxStm_Timer.c
  • IfxStm_updateCompare() : IfxStm.h
  • IfxStm_waitTicks() : IfxStm.h
  • IfxVadc_Adc_addToQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_clearQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_configureWaitForReadMode() : IfxVadc_Adc.h
  • IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister() : IfxVadc_Adc.h
  • IfxVadc_Adc_deInitGroup() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_deInitModule() : IfxVadc_Adc.h
  • IfxVadc_Adc_disableModule() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_getBackgroundScanStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getChannelConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_getChannelConversionTime() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_getDebugResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGlobalResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGroupConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_getGroupRegsFromGroup() : IfxVadc_Adc.h
  • IfxVadc_Adc_getGroupResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getMasterId() : IfxVadc_Adc.c
  • IfxVadc_Adc_getMasterKernelIndex() : IfxVadc_Adc.c
  • IfxVadc_Adc_getModuleConfig() : IfxVadc_Adc.h
  • IfxVadc_Adc_getQueueStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getResult() : IfxVadc_Adc.h
  • IfxVadc_Adc_getResultBasedOnRequestSource() : IfxVadc_Adc.h
  • IfxVadc_Adc_getScanStatus() : IfxVadc_Adc.h
  • IfxVadc_Adc_getVadcFromGroup() : IfxVadc_Adc.h
  • IfxVadc_Adc_initChannel() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initChannelConfig() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initExternalMultiplexerMode() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initExternalMultiplexerModeConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initGroup() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initGroupConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_initModule() : IfxVadc_Adc.h , IfxVadc_Adc.c
  • IfxVadc_Adc_initModuleConfig() : IfxVadc_Adc.c , IfxVadc_Adc.h
  • IfxVadc_Adc_setBackgroundScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_setScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_startBackgroundScan() : IfxVadc_Adc.h
  • IfxVadc_Adc_startQueue() : IfxVadc_Adc.h
  • IfxVadc_Adc_startScan() : IfxVadc_Adc.h
  • IfxVadc_addToQueue() : IfxVadc.h
  • IfxVadc_calculateSampleTime() : IfxVadc.h
  • IfxVadc_clearAllResultRequests() : IfxVadc.h
  • IfxVadc_clearChannelRequest() : IfxVadc.h
  • IfxVadc_clearQueue() : IfxVadc.h
  • IfxVadc_configExternalMultiplexerMode() : IfxVadc.c , IfxVadc.h
  • IfxVadc_configureWaitForReadMode() : IfxVadc.h
  • IfxVadc_configureWaitForReadModeForGlobalResultRegister() : IfxVadc.h
  • IfxVadc_disableAccess() : IfxVadc.h , IfxVadc.c
  • IfxVadc_disableModule() : IfxVadc.h
  • IfxVadc_disablePostCalibration() : IfxVadc.c , IfxVadc.h
  • IfxVadc_disableQueueSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_disableScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableAccess() : IfxVadc.h , IfxVadc.c
  • IfxVadc_enableBackgroundScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableFifoMode() : IfxVadc.h
  • IfxVadc_enableGroupSync() : IfxVadc.h , IfxVadc.c
  • IfxVadc_enableModule() : IfxVadc.h
  • IfxVadc_enableQueueSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableScanSlotExternalTrigger() : IfxVadc.h
  • IfxVadc_enableServiceRequest() : IfxVadc.h
  • IfxVadc_getAdcAnalogFrequency() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getAdcCalibrationActiveState() : IfxVadc.h
  • IfxVadc_getAdcDigitalFrequency() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getAdcModuleFrequency() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getArbiterRoundLength() : IfxVadc.h
  • IfxVadc_getAssignedChannels() : IfxVadc.h
  • IfxVadc_getBackgroundScanGatingMode() : IfxVadc.h
  • IfxVadc_getBackgroundScanGatingSource() : IfxVadc.h
  • IfxVadc_getBackgroundScanSlotPriority() : IfxVadc.h
  • IfxVadc_getBackgroundScanSlotStartMode() : IfxVadc.h
  • IfxVadc_getBackgroundScanStatus() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getBackgroundScanTriggerInput() : IfxVadc.h
  • IfxVadc_getBackgroundScanTriggerMode() : IfxVadc.h
  • IfxVadc_getChannelControlConfig() : IfxVadc.h
  • IfxVadc_getChannelConversionTime() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getChannelInputClass() : IfxVadc.h
  • IfxVadc_getChannelResultServiceRequestNodePointer0() : IfxVadc.h
  • IfxVadc_getChannelResultServiceRequestNodePointer1() : IfxVadc.h
  • IfxVadc_getChannelServiceRequestNodePointer0() : IfxVadc.h
  • IfxVadc_getChannelServiceRequestNodePointer1() : IfxVadc.h
  • IfxVadc_getDebugResult() : IfxVadc.h
  • IfxVadc_getEmuxGlobalResolution() : IfxVadc.h
  • IfxVadc_getEmuxGlobalSampleTime() : IfxVadc.h
  • IfxVadc_getEmuxGroupResolution() : IfxVadc.h
  • IfxVadc_getEmuxGroupSampleTime() : IfxVadc.h
  • IfxVadc_getGlobalConfigValue() : IfxVadc.h
  • IfxVadc_getGlobalResolution() : IfxVadc.h
  • IfxVadc_getGlobalResult() : IfxVadc.h
  • IfxVadc_getGlobalSampleTime() : IfxVadc.h
  • IfxVadc_getGroupResolution() : IfxVadc.h
  • IfxVadc_getGroupResult() : IfxVadc.h
  • IfxVadc_getGroupSampleTime() : IfxVadc.h
  • IfxVadc_getMasterIndex() : IfxVadc.h
  • IfxVadc_getQueueSlotGatingMode() : IfxVadc.h
  • IfxVadc_getQueueSlotGatingSource() : IfxVadc.h
  • IfxVadc_getQueueSlotPriority() : IfxVadc.h
  • IfxVadc_getQueueSlotStartMode() : IfxVadc.h
  • IfxVadc_getQueueSlotTriggerInput() : IfxVadc.h
  • IfxVadc_getQueueSlotTriggerMode() : IfxVadc.h
  • IfxVadc_getQueueStatus() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getResult() : IfxVadc.h
  • IfxVadc_getResultBasedOnRequestSource() : IfxVadc.c , IfxVadc.h
  • IfxVadc_getScanSlotGatingMode() : IfxVadc.h
  • IfxVadc_getScanSlotGatingSource() : IfxVadc.h
  • IfxVadc_getScanSlotPriority() : IfxVadc.h
  • IfxVadc_getScanSlotStartMode() : IfxVadc.h
  • IfxVadc_getScanSlotTriggerInput() : IfxVadc.h
  • IfxVadc_getScanSlotTriggerMode() : IfxVadc.h
  • IfxVadc_getScanStatus() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getSrcAddress() : IfxVadc.h , IfxVadc.c
  • IfxVadc_getStartupCalibration() : IfxVadc.h
  • IfxVadc_initEmuxPin() : IfxVadc.h
  • IfxVadc_initGxBflPin() : IfxVadc.h
  • IfxVadc_initialiseAdcArbiterClock() : IfxVadc.h , IfxVadc.c
  • IfxVadc_initialiseAdcConverterClock() : IfxVadc.c , IfxVadc.h
  • IfxVadc_initializeFAdcD() : IfxVadc.c , IfxVadc.h
  • IfxVadc_initializeFAdcI() : IfxVadc.c , IfxVadc.h
  • IfxVadc_initiateStartupCalibration() : IfxVadc.h
  • IfxVadc_isAutoBackgroundScanEnabled() : IfxVadc.h
  • IfxVadc_isAutoScanEnabled() : IfxVadc.h
  • IfxVadc_isPostCalibration() : IfxVadc.h , IfxVadc.c
  • IfxVadc_isRequestBackgroundScanSlotEnabled() : IfxVadc.h
  • IfxVadc_isRequestQueueSlotEnabled() : IfxVadc.h
  • IfxVadc_isRequestScanSlotEnabled() : IfxVadc.h
  • IfxVadc_resetGroup() : IfxVadc.h
  • IfxVadc_resetKernel() : IfxVadc.c , IfxVadc.h
  • IfxVadc_selectPowerSupplyVoltage() : IfxVadc.c , IfxVadc.h
  • IfxVadc_setAnalogConvertControl() : IfxVadc.h
  • IfxVadc_setArbiterPriority() : IfxVadc.c , IfxVadc.h
  • IfxVadc_setArbitrationRoundLength() : IfxVadc.h
  • IfxVadc_setAutoBackgroundScan() : IfxVadc.h
  • IfxVadc_setAutoScan() : IfxVadc.h
  • IfxVadc_setBackgroundPriorityChannel() : IfxVadc.h
  • IfxVadc_setBackgroundResultTarget() : IfxVadc.h
  • IfxVadc_setBackgroundScan() : IfxVadc.h
  • IfxVadc_setBackgroundScanSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setBackgroundScanSlotTriggerConfig() : IfxVadc.h
  • IfxVadc_setBoundaryMode() : IfxVadc.h
  • IfxVadc_setChannelEventNodePointer0() : IfxVadc.h
  • IfxVadc_setChannelEventNodePointer1() : IfxVadc.h
  • IfxVadc_setChannelInputClass() : IfxVadc.h
  • IfxVadc_setChannelLimitCheckMode() : IfxVadc.h
  • IfxVadc_setEmuxGlobalResolution() : IfxVadc.h
  • IfxVadc_setEmuxGlobalSampleTime() : IfxVadc.h
  • IfxVadc_setEmuxGroupResolution() : IfxVadc.h
  • IfxVadc_setEmuxGroupSampletime() : IfxVadc.h
  • IfxVadc_setEmuxInterfaceForGroup() : IfxVadc.h
  • IfxVadc_setGlobalResolution() : IfxVadc.h
  • IfxVadc_setGlobalSampleTime() : IfxVadc.h
  • IfxVadc_setGroupPriorityChannel() : IfxVadc.h
  • IfxVadc_setGroupResolution() : IfxVadc.h
  • IfxVadc_setGroupSampleTime() : IfxVadc.h
  • IfxVadc_setLowerBoundary() : IfxVadc.h
  • IfxVadc_setMasterIndex() : IfxVadc.h
  • IfxVadc_setQueueSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setQueueSlotTriggerOperatingConfig() : IfxVadc.h
  • IfxVadc_setReferenceInput() : IfxVadc.h
  • IfxVadc_setResultNodeEventPointer0() : IfxVadc.h
  • IfxVadc_setResultNodeEventPointer1() : IfxVadc.h
  • IfxVadc_setResultPosition() : IfxVadc.h
  • IfxVadc_setScan() : IfxVadc.c , IfxVadc.h
  • IfxVadc_setScanSlotGatingConfig() : IfxVadc.h
  • IfxVadc_setScanSlotTriggerConfig() : IfxVadc.h
  • IfxVadc_setSleepMode() : IfxVadc.h
  • IfxVadc_setSyncRequest() : IfxVadc.h
  • IfxVadc_setUpperBoundary() : IfxVadc.h
  • IfxVadc_startBackgroundScan() : IfxVadc.h
  • IfxVadc_startQueue() : IfxVadc.h
  • IfxVadc_startScan() : IfxVadc.h
  • IfxVadc_startupCalibration() : IfxVadc.c , IfxVadc.h
  • IfxVadc_storeGroupResult() : IfxVadc.h
  • initTime() : Bsp.h , Bsp.c
  • isDeadLine() : Bsp.h


iLLD_TC26B: Globals

- n -

  • now() : Bsp.h
  • nowWithoutCriticalSection() : Bsp.h


iLLD_TC26B: Globals

- p -

  • poll() : Bsp.h


iLLD_TC26B: Globals

- r -

  • restoreInterrupts() : Bsp.h
  • round_f() : Ifx_AngleTrkF32.c


iLLD_TC26B: Globals

- s -

  • SpiIf_exchange() : SpiIf.h
  • SpiIf_getStatus() : SpiIf.h
  • SpiIf_initChannelConfig() : SpiIf.h , SpiIf.c
  • SpiIf_initConfig() : SpiIf.h , SpiIf.c
  • SpiIf_wait() : SpiIf.h


iLLD_TC26B: Globals

- t -

  • timingNoInterruptEnd() : Bsp.h
  • timingNoInterruptStart() : Bsp.h


iLLD_TC26B: Globals

- v -

  • VecAvg_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecGain_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecHalfSwap_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMax_f32() : Ifx_Cf32.h , Ifx_Cf32.c
  • VecMaxIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMin_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecMinIdx_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecOfs_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecPwrdB_SF() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecSum_f32() : Ifx_Cf32.c , Ifx_Cf32.h
  • VecWin_f32() : Ifx_Cf32.h , Ifx_Cf32.c


iLLD_TC26B: Globals

- w -

  • wait() : Bsp.h
  • waitPoll() : Bsp.c , Bsp.h
  • waitTime() : Bsp.c , Bsp.h


iLLD_TC26B: Globals

- $ -

  • $ $sb : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- a -

  • abs : IfxCpu_IntrinsicsDcc.h
  • absdif : IfxCpu_IntrinsicsDcc.h
  • abss : IfxCpu_IntrinsicsDcc.h
  • adds : IfxCpu_IntrinsicsDcc.h
  • Assert_level : Assert.c


iLLD_TC26B: Globals

- b -

  • bisr : IfxCpu_IntrinsicsDcc.h
  • BootModeHeader_0 : IfxCpu_CStart0.c
  • BootModeHeader_1 : IfxCpu_CStart0.c


iLLD_TC26B: Globals

- c -

  • clo : IfxCpu_IntrinsicsDcc.h
  • cls : IfxCpu_IntrinsicsDcc.h
  • clz : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- d -

  • debug : IfxCpu_IntrinsicsDcc.h
  • disable : IfxCpu_IntrinsicsDcc.h
  • dsync : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- e -

  • enable : IfxCpu_IntrinsicsDcc.h
  • extr : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- g -

  • g_DateTimeOffset : Ifx_DateTime.c


iLLD_TC26B: Globals

- h -

  • h : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- i -

  • Ifx_g_console : Ifx_Console.c , Ifx_Console.h
  • Ifx_g_FftF32_bitReverseTable : Ifx_FftF32_BitReverseTable.c , Ifx_FftF32.h
  • Ifx_g_FftF32_twiddleTable : Ifx_FftF32.h , Ifx_FftF32_TwiddleTable.c
  • Ifx_g_LutAtan2F32_FxpAngle_table : Ifx_LutAtan2F32_Table.c , Ifx_LutAtan2F32.h
  • Ifx_g_LutAtan2F32_table : Ifx_LutAtan2F32.h , Ifx_LutAtan2F32_Table.c
  • Ifx_g_LutLSincosF32 : Ifx_LutLSincosF32.c , Ifx_LutLSincosF32.h
  • Ifx_g_LutLSincosF32_table : Ifx_LutLSincosF32.c
  • Ifx_g_LutSincosF32_table : Ifx_LutSincosF32.h , Ifx_LutSincosF32_Table.c
  • Ifx_g_WndF32_blackmanHarrisTable : Ifx_WndF32.h , Ifx_WndF32_BlackmanHarrisTable.c
  • Ifx_g_WndF32_hannTable : Ifx_WndF32.h , Ifx_WndF32_HannTable.c
  • Ifx_Shell_cmdBuffer : Ifx_Shell.c
  • IfxAsclin0_CTSA_P14_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RTS_P14_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXA_P14_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_RXB_P15_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_SCLK_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_SCLK_P15_2_OUT : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin0_TX_P14_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P14_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P15_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin0_TX_P15_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_CTSA_P20_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_CTSB_P32_4_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RTS_P20_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RTS_P23_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXA_P15_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXB_P15_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXC_P20_9_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXD_P14_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXE_P11_10_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXF_P33_13_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_RXG_P02_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P15_0_OUT : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin1_SCLK_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P33_11_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SCLK_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P20_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_SLSO_P33_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P02_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P11_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P14_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P15_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P20_10_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P33_12_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin1_TX_P33_13_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_CTSA_P10_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_CTSB_P33_5_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RTS_P10_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RTS_P33_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXA_P14_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXB_P02_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXD_P10_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXE_P33_8_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_RXG_P02_0_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P02_4_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P10_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P33_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SCLK_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P02_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_SLSO_P10_5_OUT : IfxAsclin_PinMap.h , IfxAsclin_PinMap.c
  • IfxAsclin2_SLSO_P33_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P02_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P10_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P14_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P33_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin2_TX_P33_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_CTSA_P00_12_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RTS_P00_9_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXA_P15_7_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXC_P20_3_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXD_P32_2_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXE_P00_1_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_RXF_P21_6_IN : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P00_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P15_8_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P21_5_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SCLK_P33_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P00_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P14_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P21_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P21_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_SLSO_P33_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P00_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P00_1_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P15_6_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P15_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P20_0_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P20_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P21_7_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P32_2_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin3_TX_P32_3_OUT : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_cfg_indexMap : IfxAsclin_cfg.c , IfxAsclin_cfg.h
  • IfxAsclin_Cts_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Rts_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Rx_In_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Sclk_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Slso_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxAsclin_Tx_Out_pinTable : IfxAsclin_PinMap.c , IfxAsclin_PinMap.h
  • IfxCcu60_CC60_P02_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P02_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P11_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60_P15_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INA_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INB_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC60INC_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P02_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P02_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P11_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61_P15_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INA_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INB_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC61INC_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P02_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P02_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P11_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62_P15_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INA_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CC62INB_P00_5_IN : IfxCcu6_PinMap.h , IfxCcu6_PinMap.c
  • IfxCcu60_CC62INC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0A_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0C_P10_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS0D_P40_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1A_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1B_P40_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1C_P10_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS1D_P40_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2A_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2B_P40_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CCPOS2C_P10_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P02_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P11_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT60_P15_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P02_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P11_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT61_P15_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P02_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P11_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT62_P14_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P00_0_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P11_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P14_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_COUT63_P32_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_CTRAPA_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRB_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T12HRE_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T13HRB_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu60_T13HRC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P00_1_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P00_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P20_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60_P33_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INA_P00_1_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INB_P02_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC60INC_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P00_3_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P00_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P20_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61_P33_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INA_P00_3_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INB_P02_2_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC61INC_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P00_5_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P00_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P20_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62_P33_9_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INA_P00_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INB_P02_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CC62INC_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0A_P00_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS0C_P33_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1A_P00_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1B_P40_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1C_P33_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS1D_P40_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2A_P00_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2B_P40_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2C_P33_5_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CCPOS2D_P40_9_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P00_2_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P20_11_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT60_P33_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P00_4_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P20_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT61_P33_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P00_6_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P20_13_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT62_P33_8_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P00_10_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P00_12_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_COUT63_P20_7_OUT : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CTRAPA_P00_0_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_CTRAPC_P33_4_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRB_P02_6_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T12HRE_P00_11_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T13HRB_P02_7_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu61_T13HRC_P02_8_IN : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc60in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc61in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cc62in_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos0_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos1_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ccpos2_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_cfg_indexMap : IfxCcu6_cfg.c , IfxCcu6_cfg.h
  • IfxCcu6_Cout60_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout61_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout62_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Cout63_Out_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_Ctrap_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_PwmHl_modes : IfxCcu6_PwmHl.c
  • IfxCcu6_T12hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCcu6_T13hr_In_pinTable : IfxCcu6_PinMap.c , IfxCcu6_PinMap.h
  • IfxCif_CLK_P00_7_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D0_P02_0_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D10_P00_1_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D11_P00_2_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D12_P00_3_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D13_P00_4_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D14_P00_5_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D15_P00_6_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D1_P02_1_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D2_P02_2_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D3_P02_3_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D4_P02_4_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D5_P02_5_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D6_P02_6_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D7_P02_7_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D8_P02_8_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_D9_P00_0_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_HSNC_P00_9_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCif_VSNC_P00_8_IN : IfxCif_PinMap.c , IfxCif_PinMap.h
  • IfxCpu_cfg_indexMap : IfxCpu_cfg.c , IfxCpu_cfg.h
  • IfxDsadc_Cgpwm_Out_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P00_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P02_0_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMN_P33_11_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P00_6_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P02_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CGPWMP_P33_12_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN0A_P00_1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN0B_P33_5_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN2A_P00_5_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN2B_P33_1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN3A_P00_3_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_CIN3B_P02_7_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Cin_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT0_P00_11_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT0_P00_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT0_P33_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT2_P00_5_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT2_P33_1_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT3_P00_3_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_COUT3_P02_7_OUT : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Cout_Out_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN0A_P00_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN0B_P33_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN2A_P00_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN2B_P33_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN3A_P00_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DIN3B_P02_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Din_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0NA_AN3_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0NB_AN1_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0PA_AN2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS0PB_AN0_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS2NA_AN21_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS2PA_AN20_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NA_AN37_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NA_P40_7_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NB_AN39_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NB_P40_9_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3NC_AN45_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3ND_AN47_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PA_AN36_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PA_P40_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PB_AN38_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PB_P40_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PC_AN44_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_DS3PD_AN46_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Dsn_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Dsp_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR0E_P33_0_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR0F_P33_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR2E_P33_2_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR2F_P33_6_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR3E_P02_8_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_ITR3F_P00_9_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Itr_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_Rdc_GtmTimCfg : IfxDsadc_Rdc.c
  • IfxDsadc_Sg_In_pinTable : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_SGNA_P00_4_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxDsadc_SGNB_P33_13_IN : IfxDsadc_PinMap.c , IfxDsadc_PinMap.h
  • IfxEray0_RXDA0_P14_8_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA1_P11_9_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA2_P02_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDA3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB0_P14_7_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB1_P11_10_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB2_P02_3_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_RXDB3_P14_1_IN : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P02_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P11_3_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDA_P14_10_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P02_2_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P11_12_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P14_0_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXDB_P14_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P02_4_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENA_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P02_5_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P11_11_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P11_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P14_6_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray0_TXENB_P14_9_OUT : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_cfg_indexMap : IfxEray_cfg.c , IfxEray_cfg.h
  • IfxEray_Rxd_In_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_Txd_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEray_Txen_Out_pinTable : IfxEray_PinMap.c , IfxEray_PinMap.h
  • IfxEth_Crsdv_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_CRSDVA_P11_11_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Mdc_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P02_8_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P21_0_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDC_P21_2_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Mdio_InOut_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIO_P21_1_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIOA_P00_0_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_MDIOD_P21_3_INOUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Phy_Pef7071_iPhyInitDone : IfxEth_Phy_Pef7071.c , IfxEth_Phy_Pef7071.h
  • IfxEth_Refclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_REFCLK_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_rxBuffer : IfxEth.c , IfxEth.h
  • IfxEth_Rxclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXCLKA_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXD0_P11_10_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXD1_P11_9_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Rxd_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_rxDescr : IfxEth.c , IfxEth.h
  • IfxEth_Rxer_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_RXERB_P21_7_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_txBuffer : IfxEth.c , IfxEth.h
  • IfxEth_Txclk_In_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXCLKB_P11_12_IN : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXD0_P11_3_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXD1_P11_2_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_Txd_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_txDescr : IfxEth.c , IfxEth.h
  • IfxEth_Txen_Out_pinTable : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxEth_TXEN_P11_6_OUT : IfxEth_PinMap.c , IfxEth_PinMap.h
  • IfxFft_Fft_dummy256 : IfxFft_Fft.c
  • IfxFlash_dFlashTableEepLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_dFlashTableUcbLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_pFlashTableLog : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxFlash_pFlashTablePhys : IfxFlash_cfg.c , IfxFlash_cfg.h
  • IfxGpt120_CAPINA_P13_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2EUDA_P00_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2EUDB_P33_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2INA_P00_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T2INB_P33_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3EUDA_P02_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3EUDB_P10_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3INA_P02_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3INB_P10_4_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3OUT_P10_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T3OUT_P21_6_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4EUDA_P00_9_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4EUDB_P33_5_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4INA_P02_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T4INB_P10_8_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5EUDA_P21_6_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5EUDB_P10_1_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5INA_P21_7_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T5INB_P10_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6EUDA_P20_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6EUDB_P10_0_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6INA_P20_3_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6INB_P10_2_IN : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6OUT_P10_5_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt120_T6OUT_P21_7_OUT : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_Capin_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxEud_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxIn_In_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGpt12_TxOut_Out_pinTable : IfxGpt12_PinMap.c , IfxGpt12_PinMap.h
  • IfxGtm_ATOM0_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM0_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM1_7_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM2_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_ATOM3_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Atom_PwmHl_modes : IfxGtm_Atom_PwmHl.c
  • IfxGtm_CLK0_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_CLK1_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_CLK2_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN109_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN18_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN26_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN32_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN34_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN48_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN53_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN77_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN85_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN87_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN8_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_0_TIN9_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN103_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN10_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN11_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN19_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN27_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN31_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN35_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN47_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN54_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN78_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_1_TIN86_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN104_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN107_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN20_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN28_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN33_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN36_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN46_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN55_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_2_TIN79_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN105_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN108_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN21_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN29_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN38_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN49_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN51_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN56_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN60_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_3_TIN80_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN102_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN22_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN30_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN39_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN50_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN52_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN57_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN61_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_4_TIN81_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN110_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN23_P33_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN40_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN41_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN58_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_5_TIN82_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN106_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN24_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN42_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN43_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN59_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN62_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_6_TIN83_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN25_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN44_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN45_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN63_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN64_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM0_7_TIN84_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN0_P02_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN109_P10_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN18_P00_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN26_P33_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN32_P33_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN48_P22_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN53_P21_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN68_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN76_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN77_P15_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN85_P14_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN87_P14_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_0_TIN94_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN103_P10_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN19_P00_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN1_P02_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN27_P33_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN31_P33_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN47_P22_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN54_P21_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN69_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN78_P15_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN86_P14_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_1_TIN95_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN104_P10_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN107_P10_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN12_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN20_P00_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN28_P33_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN2_P02_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN33_P33_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN46_P23_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN55_P21_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN70_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN79_P15_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_2_TIN96_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN105_P10_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN108_P10_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN13_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN21_P00_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN29_P33_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN38_P32_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN3_P02_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN49_P22_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN56_P21_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN71_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN80_P14_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_3_TIN97_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN102_P10_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN14_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN22_P33_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN30_P33_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN39_P32_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN4_P02_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN50_P22_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN57_P21_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN72_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN81_P14_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_4_TIN98_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN110_P10_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN15_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN40_P32_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN41_P23_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN58_P21_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN5_P02_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN65_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN73_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN82_P14_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN91_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_5_TIN99_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN100_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN106_P10_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN16_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN24_P33_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN42_P23_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN43_P23_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN59_P20_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN66_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN6_P02_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN74_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN83_P14_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_6_TIN92_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN101_P11_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN17_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN25_P33_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN44_P23_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN45_P23_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN64_P20_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN67_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN75_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN7_P02_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN84_P14_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM1_7_TIN93_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN34_P33_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN68_P20_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN76_P15_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN8_P02_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN94_P13_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_0_TIN9_P00_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN10_P00_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN11_P00_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN35_P33_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN69_P20_13_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_1_TIN95_P11_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN12_P00_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN36_P32_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN70_P20_14_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN88_P14_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_2_TIN96_P11_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN13_P00_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN60_P20_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN71_P15_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN89_P14_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_3_TIN97_P11_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN14_P00_5_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN51_P21_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN61_P20_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN72_P15_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN90_P14_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_4_TIN98_P11_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN15_P00_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN52_P21_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN65_P20_9_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN73_P15_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN91_P13_0_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_5_TIN99_P11_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN100_P11_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN16_P00_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN62_P20_6_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN66_P20_10_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN74_P15_3_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_6_TIN92_P13_1_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN101_P11_12_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN17_P00_8_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN63_P20_7_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN67_P20_11_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN75_P15_4_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TIM2_7_TIN93_P13_2_IN : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_10_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT43_P23_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_11_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT44_P23_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_12_TOUT98_P11_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT73_P15_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_13_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT16_P00_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_14_TOUT74_P15_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT17_P00_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT42_P23_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_8_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM0_9_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT18_P00_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT26_P33_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT32_P33_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT48_P22_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT53_P21_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT68_P20_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT76_P15_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT77_P15_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT85_P14_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT87_P14_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT8_P02_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT94_P13_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_0_TOUT9_P00_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT104_P10_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT107_P10_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT2_P02_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_10_TOUT62_P20_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT105_P10_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT108_P10_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT3_P02_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT60_P20_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_11_TOUT63_P20_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT102_P10_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT34_P33_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT4_P02_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_12_TOUT61_P20_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT110_P10_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT35_P33_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT5_P02_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_13_TOUT65_P20_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT36_P32_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT66_P20_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_14_TOUT6_P02_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT67_P20_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_15_TOUT7_P02_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT10_P00_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT11_P00_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT19_P00_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT27_P33_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT31_P33_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT47_P22_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT54_P21_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT69_P20_13_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT78_P15_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT86_P14_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_1_TOUT95_P11_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT12_P00_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT20_P00_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT28_P33_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT33_P33_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT46_P23_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT55_P21_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT70_P20_14_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT79_P15_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT88_P14_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_2_TOUT96_P11_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT13_P00_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT21_P00_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT29_P33_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT38_P32_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT49_P22_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT56_P21_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT71_P15_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT80_P14_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT89_P14_9_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_3_TOUT97_P11_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT14_P00_5_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT22_P33_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT30_P33_8_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT39_P32_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT50_P22_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT57_P21_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT72_P15_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT81_P14_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT90_P14_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_4_TOUT98_P11_9_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT15_P00_6_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT23_P33_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT40_P32_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT41_P23_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT58_P21_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT73_P15_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT82_P14_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_5_TOUT91_P13_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_5_TOUT99_P11_10_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT100_P11_11_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT106_P10_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT16_P00_7_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT24_P33_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT43_P23_2_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT59_P20_0_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT74_P15_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_6_TOUT83_P14_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_6_TOUT92_P13_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT101_P11_12_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT17_P00_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT25_P33_3_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT44_P23_3_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT45_P23_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT64_P20_8_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_7_TOUT75_P15_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT84_P14_4_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_7_TOUT93_P13_2_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT0_P02_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_8_TOUT109_P10_7_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_8_TOUT51_P21_0_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_9_TOUT103_P10_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_TOM1_9_TOUT1_P02_1_OUT : IfxGtm_PinMap.h , IfxGtm_PinMap.c
  • IfxGtm_TOM1_9_TOUT52_P21_1_OUT : IfxGtm_PinMap.c , IfxGtm_PinMap.h
  • IfxGtm_Tom_PwmHl_modes : IfxGtm_Tom_PwmHl.c
  • IfxGtm_Trig_AdcTrig_tableAdc0_1_2 : IfxGtm_Trig.c
  • IfxGtm_Trig_AdcTrig_tableAdc3_4 : IfxGtm_Trig.c
  • IfxGtm_Trig_SentTrig_table : IfxGtm_Trig.c
  • IfxHssl_cfg_hsctIndexMap : IfxHssl_cfg.h , IfxHssl_cfg.c
  • IfxHssl_cfg_hsslIndexMap : IfxHssl_cfg.c , IfxHssl_cfg.h
  • IfxI2c0_SCL_P02_5_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c0_SCL_P13_1_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SCL_P15_4_INOUT : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxI2c0_SDA_P02_4_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SDA_P13_2_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c0_SDA_P15_5_INOUT : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c_cfg_indexMap : IfxI2c_cfg.h , IfxI2c_cfg.c
  • IfxI2c_Scl_InOut_pinTable : IfxI2c_PinMap.c , IfxI2c_PinMap.h
  • IfxI2c_Sda_InOut_pinTable : IfxI2c_PinMap.h , IfxI2c_PinMap.c
  • IfxMsc0_EN0_P10_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P10_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN0_P10_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P11_11_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P14_10_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN0_P15_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P10_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN1_P11_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_EN1_P14_9_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_EN1_P15_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P10_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P10_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P10_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END2_P11_11_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END2_P14_10_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END2_P15_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P10_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_END3_P11_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P14_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_END3_P15_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLN_P13_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLND_P13_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLP_P11_6_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_FCLP_P13_1_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_FCLP_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_INJ0_P00_0_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_INJ1_P10_5_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SDI0_P11_10_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SDI1_P10_2_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SDI2_P14_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SDI3_P11_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SON_P13_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SOND_P13_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc0_SOP_P11_9_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc0_SOP_P13_3_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_EN0_P23_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_EN0_P32_4_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_EN1_P23_5_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_END2_P23_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_END2_P32_4_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_END3_P23_5_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_FCLN_P22_0_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_FCLND_P22_0_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_FCLP_P22_1_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_INJ0_P23_3_IN : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_INJ1_P33_13_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SDI0_P23_1_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SDI1_P02_3_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SDI2_P32_4_IN : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SON_P22_2_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc1_SOND_P22_2_OUT : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc1_SOP_P22_3_OUT : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_cfg_indexMap : IfxMsc_cfg.h , IfxMsc_cfg.c
  • IfxMsc_En_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Fcln_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Fclp_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Inj_In_pinTable : IfxMsc_PinMap.h , IfxMsc_PinMap.c
  • IfxMsc_Sdi_In_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Son_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMsc_Sop_Out_pinTable : IfxMsc_PinMap.c , IfxMsc_PinMap.h
  • IfxMtu_sramTable : IfxMtu_cfg.h , IfxMtu_cfg.c
  • IfxMultican_cfg_indexMap : IfxMultican_cfg.c , IfxMultican_cfg.h
  • IfxMultican_RXD0A_P02_1_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_RXD0B_P20_7_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD0D_P02_4_IN : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_RXD0E_P33_7_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1A_P15_3_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1B_P14_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD1D_P00_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2A_P15_1_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2B_P02_3_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2D_P14_8_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD2E_P10_2_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3A_P00_3_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3B_P32_2_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3C_P20_0_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3D_P11_10_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_RXD3E_P20_9_IN : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_Rxd_In_pinTable : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD0_P02_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD0_P02_5_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_TXD0_P20_8_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD0_P33_8_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD1_P00_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD1_P14_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD1_P15_2_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P02_2_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P10_3_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD2_P14_10_OUT : IfxMultican_PinMap.c , IfxMultican_PinMap.h
  • IfxMultican_TXD2_P15_0_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P00_2_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P11_12_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P20_10_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P20_3_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_TXD3_P32_3_OUT : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxMultican_Txd_Out_pinTable : IfxMultican_PinMap.h , IfxMultican_PinMap.c
  • IfxPort_cfg_esrMasks : IfxPort_cfg.c , IfxPort_cfg.h
  • IfxPort_cfg_indexMap : IfxPort_cfg.h , IfxPort_cfg.c
  • IfxPort_P00_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P00_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_1 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P02_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P02_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P10_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P10_8 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P11_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P11_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P13_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P14_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P14_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P15_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_14 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P20_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P20_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_4 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P21_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P21_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_0 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P22_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P23_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P23_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_2 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P32_3 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P32_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_10 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_11 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_12 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_13 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P33_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_4 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_5 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_6 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P33_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_0 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_1 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_2 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_3 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_6 : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPort_P40_7 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_8 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_P40_9 : IfxPort_PinMap.h , IfxPort_PinMap.c
  • IfxPort_Pin_pinTable : IfxPort_PinMap.c , IfxPort_PinMap.h
  • IfxPsi5_RX0A_P00_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX0B_P02_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX0C_P33_1_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1A_P00_3_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1B_P02_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX1C_P33_3_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX2A_P00_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_RX2B_P02_7_IN : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_RX2C_P33_5_IN : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_Rx_In_pinTable : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX0_P00_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX0_P02_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX0_P33_2_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX1_P00_4_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX1_P02_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX1_P33_4_OUT : IfxPsi5_PinMap.c , IfxPsi5_PinMap.h
  • IfxPsi5_TX2_P00_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX2_P02_8_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_TX2_P33_6_OUT : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5_Tx_Out_pinTable : IfxPsi5_PinMap.h , IfxPsi5_PinMap.c
  • IfxPsi5s_Clk_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_CLK_P02_4_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_CLK_P33_10_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_Rx_In_pinTable : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_RXA_P00_3_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_RXB_P02_5_IN : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_RXC_P33_5_IN : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_Tx_Out_pinTable : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_TX_P00_4_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxPsi5s_TX_P02_6_OUT : IfxPsi5s_PinMap.c , IfxPsi5s_PinMap.h
  • IfxPsi5s_TX_P33_6_OUT : IfxPsi5s_PinMap.h , IfxPsi5s_PinMap.c
  • IfxQspi0_MRST_P20_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MRSTA_P20_12_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSR_P20_12_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_MTSR_P20_14_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_MTSRA_P20_14_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SCLK_P20_11_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SCLK_P20_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SCLKA_P20_11_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSIA_P20_13_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSIB_P20_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO0_P20_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO13_P15_0_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO3_P11_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO6_P20_10_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO7_P33_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi0_SLSO8_P20_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi0_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P10_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MRST_P11_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MRSTA_P10_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MRSTB_P11_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P10_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P10_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P10_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSR_P11_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSRA_P10_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_MTSRB_P11_9_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_MTSRC_P10_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLK_P10_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLK_P11_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLKA_P10_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SCLKB_P11_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSIA_P11_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO0_P20_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO10_P10_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO1_P20_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO2_P20_13_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO3_P11_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO4_P11_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO5_P11_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi1_SLSO6_P33_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO7_P33_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO8_P10_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi1_SLSO9_P10_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_HSICINA_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_HSICINB_P15_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRST_P15_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRST_P15_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTA_P15_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MRSTB_P15_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTCN_P21_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTCP_P21_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MRSTE_P15_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSR_P15_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_MTSR_P15_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRA_P15_5_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRB_P15_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRN_P13_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_MTSRP_P13_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLK_P15_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLK_P15_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLK_P15_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SCLKA_P15_3_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKB_P15_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKN_P13_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SCLKP_P13_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSIA_P15_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSIB_P15_1_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO0_P15_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi2_SLSO1_P14_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO2_P14_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO3_P14_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO4_P14_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO5_P15_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO6_P33_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO7_P20_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO8_P20_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi2_SLSO9_P20_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_HSICINA_P33_9_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_HSICINB_P33_10_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRST_P02_5_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P10_7_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRST_P22_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRST_P33_13_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRSTA_P02_5_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTB_P10_7_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTD_P33_13_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTE_P22_1_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MRSTFN_P21_2_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MRSTFP_P21_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSR_P02_6_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSR_P10_6_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSR_P22_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSR_P33_12_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRA_P02_6_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRB_P10_6_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRD_P33_12_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRE_P22_0_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_MTSRN_P22_2_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_MTSRP_P22_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLK_P02_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLK_P10_8_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLK_P22_3_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLK_P33_11_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKA_P02_7_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLKB_P10_8_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLKD_P33_11_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKE_P22_3_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SCLKN_P22_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SCLKP_P22_1_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSIA_P02_4_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSIC_P33_10_IN : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSID_P22_2_IN : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO0_P02_4_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO11_P33_10_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO12_P22_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO13_P23_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO1_P02_0_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO1_P33_9_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO2_P02_1_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO2_P33_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO3_P02_2_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO4_P02_3_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO4_P23_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO5_P02_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO5_P23_4_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO6_P00_8_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO7_P00_9_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi3_SLSO7_P33_7_OUT : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi3_SLSO8_P10_5_OUT : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_cfg_indexMap : IfxQspi_cfg.h , IfxQspi_cfg.c
  • IfxQspi_Hsicin_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mrst_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mrst_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Mtsr_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Mtsr_Out_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Sclk_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Sclk_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_Slsi_In_pinTable : IfxQspi_PinMap.c , IfxQspi_PinMap.h
  • IfxQspi_Slso_Out_pinTable : IfxQspi_PinMap.h , IfxQspi_PinMap.c
  • IfxQspi_SpiSlave_dummyRxValue : IfxQspi_SpiSlave.c
  • IfxQspi_SpiSlave_dummyTxValue : IfxQspi_SpiSlave.c
  • IfxScu_Dcdcsync_Out_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_DCDCSYNC_P32_2_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_DCDCSYNC_P33_13_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_Emgstop_In_pinTable : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EMGSTOPA_P33_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EMGSTOPB_P21_2_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_Evrwup_In_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EVRWUPA_P14_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EVRWUPB_P15_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK0_P23_1_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_EXTCLK1_P11_12_OUT : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_EXTCLK1_P32_4_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Extclk_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG0DCLDO_P14_6_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG1EVR33_P14_5_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG2EVR13_P14_2_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_HWCFG3_BMI_P14_3_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG4_P10_5_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG5_P10_6_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_HWCFG6_P14_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Hwcfg_In_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ0_P15_4_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ10_P14_3_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ11_P20_9_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ12_P11_10_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ13_P15_5_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ14_P02_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ15_P14_1_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ16_P15_1_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ1_P15_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ2_P10_2_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ3_P10_3_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ4_P10_7_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ5_P10_8_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ6_P02_0_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ7_P00_4_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_REQ8_P33_7_IN : IfxScu_PinMap.h , IfxScu_PinMap.c
  • IfxScu_REQ9_P20_0_IN : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Req_In_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_WDT0LCK_P20_8_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_WDT1LCK_P20_7_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_Wdtlck_Out_pinTable : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScu_WDTSLCK_P20_9_OUT : IfxScu_PinMap.c , IfxScu_PinMap.h
  • IfxScuCcu_aDefaultPllConfigSteps : IfxScuCcu.c
  • IfxScuCcu_defaultClockConfig : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_defaultErayPllConfig : IfxScuCcu.h , IfxScuCcu.c
  • IfxScuCcu_xtalFrequency : IfxScuCcu.c
  • IfxSent_SENT0A_AN24_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT0A_P40_0_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT0B_P00_1_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT0C_P02_8_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT1A_AN25_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT1A_P40_1_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT1B_P00_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT1C_P02_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2A_AN26_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2A_P40_2_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2B_P00_3_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2C_P02_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT2D_AN36_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT2D_P40_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3A_AN27_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3A_P40_3_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3B_P00_4_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3C_P02_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT3D_AN37_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT3D_P40_7_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT4A_AN38_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT4A_P40_8_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4B_P00_5_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT4C_P33_6_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT5A_AN39_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SENT5A_P40_9_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT5B_P00_6_IN : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SENT5C_P33_5_IN : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_Sent_In_pinTable : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC0_P00_1_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC1_P02_7_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC2_P00_3_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC3_P00_4_OUT : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSent_SPC4_P00_5_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_SPC5_P00_6_OUT : IfxSent_PinMap.h , IfxSent_PinMap.c
  • IfxSent_Spc_Out_pinTable : IfxSent_PinMap.c , IfxSent_PinMap.h
  • IfxSmu_Fsp_Out_pinTable : IfxSmu_PinMap.c , IfxSmu_PinMap.h
  • IfxSmu_FSP_P33_8_OUT : IfxSmu_PinMap.c , IfxSmu_PinMap.h
  • IfxStm_cfg_indexMap : IfxStm_cfg.c , IfxStm_cfg.h
  • IfxVadc_Adc_masterIndex : IfxVadc_Adc.c
  • IfxVadc_cfg_srcAddresses : IfxVadc_cfg.c , IfxVadc_cfg.h
  • IfxVadc_EMUX00_P02_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX00_P33_3_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX01_P02_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX01_P33_2_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX02_P02_8_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX02_P33_1_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX10_P00_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX10_P33_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX11_P00_7_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX11_P33_5_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_EMUX12_P00_8_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_EMUX12_P33_4_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_Emux_Out_pinTable : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_0_AN0_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_10_AN10_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_11_AN11_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_12_AN12_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_13_AN13_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_1_AN1_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_2_AN2_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_3_AN3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0_4_AN4_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_5_AN5_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_6_AN6_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_7_AN7_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0_8_AN8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL0_P33_4_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL1_P33_5_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G0BFL2_P33_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G0BFL3_P33_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_0_AN16_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_10_AN26_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_10_P40_2_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_11_AN27_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_11_P40_3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_12_AN28_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_13_AN29_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_1_AN17_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_2_AN18_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_3_AN19_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_4_AN20_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_5_AN21_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_8_AN24_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G1_8_P40_0_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_9_AN25_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1_9_P40_1_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1BFL0_P33_0_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1BFL1_P33_1_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1BFL2_P33_2_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G1BFL3_P33_3_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_0_AN32_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_10_AN44_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_11_AN45_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_12_AN46_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_13_AN47_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_14_AN48_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_15_AN49_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_1_AN33_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_3_AN35_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_4_AN36_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_4_P40_6_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_5_AN37_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_5_P40_7_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_6_AN38_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_6_P40_8_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G2_7_AN39_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2_7_P40_9_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL0_P00_4_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL1_P00_5_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL2_P00_6_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G2BFL3_P00_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_0_P00_12_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_10_P00_2_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_11_P00_1_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_1_P00_11_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_2_P00_10_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_3_P00_9_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_4_P00_8_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_5_P00_7_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_6_P00_6_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_7_P00_5_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3_8_P00_4_IN : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3_9_P00_3_IN : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL0_P10_0_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3BFL0_P10_6_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL1_P10_1_OUT : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_G3BFL1_P10_7_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL2_P10_2_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_G3BFL3_P10_3_OUT : IfxVadc_PinMap.c , IfxVadc_PinMap.h
  • IfxVadc_GxBfl_Out_pinTable : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • IfxVadc_Vadcg_In_pinTable : IfxVadc_PinMap.h , IfxVadc_PinMap.c
  • insert : IfxCpu_IntrinsicsDcc.h
  • isync : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- m -

  • max : IfxCpu_IntrinsicsDcc.h
  • mfcr : IfxCpu_IntrinsicsDcc.h
  • min : IfxCpu_IntrinsicsDcc.h
  • mtcr : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- n -

  • nop : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- r -

  • restore : IfxCpu_IntrinsicsDcc.h
  • rslcx : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- s -

  • svlcx : IfxCpu_IntrinsicsDcc.h
  • syscall : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- t -

  • t : IfxCpu_IntrinsicsDcc.h
  • TimeConst : Bsp.h , Bsp.c


iLLD_TC26B: Globals

- u -

  • u : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- w -

  • wi : IfxCpu_IntrinsicsDcc.h


iLLD_TC26B: Globals

- _ -

  • __packb : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __packhw : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __upackb : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __upackhw : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h

- b -

  • boolean : Platform_Types.h

- c -

  • circ_t : Ifx_TypesDcc.h

- f -

  • float32 : Platform_Types.h
  • float64 : Platform_Types.h
  • fract : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h

- i -

  • Icu : Icu.h
  • Icu_GetTimeStamp : Icu.h
  • Icu_StartCapture : Icu.h
  • Icu_StopCapture : Icu.h
  • Ifx_AddressValue : Ifx_Types.h
  • Ifx_Fifo : Ifx_Fifo.h
  • Ifx_GTM_TOM_TGC : IfxGtm_cfg.h
  • Ifx_Lut_FxpAngle : Ifx_Lut.h
  • Ifx_Priority : Ifx_Types.h
  • Ifx_Shell_Call : Ifx_Shell.h
  • Ifx_Shell_CommandList : Ifx_Shell.h
  • Ifx_Shell_CommandListConst : Ifx_Shell.h
  • Ifx_SignedTimerVal : Ifx_Types.h
  • Ifx_SizeT : Ifx_Types.h
  • Ifx_TickTime : Ifx_Types.h
  • Ifx_TimerValue : Ifx_Types.h
  • IfxCcu6_PwmHl : IfxCcu6_PwmHl.h
  • IfxCcu6_PwmHl_Update : IfxCcu6_PwmHl.h
  • IfxCpu_mutexLock : IfxCpu.h
  • IfxCpu_spinLock : IfxCpu.h
  • IfxCpu_syncEvent : IfxCpu.h
  • IfxCpu_Trap_NonMaskableInterrupt_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_SystemCall_Id : IfxCpu_Trap.h
  • IfxFft_Fft_Job : IfxFft_Fft.h
  • IfxGpt12_IncrEnc_Update : IfxGpt12_IncrEnc.h
  • IfxGtm_Atom_PwmHl : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_Update : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_UpdatePulse : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_PwmHl_UpdateShift : IfxGtm_Atom_PwmHl.h
  • IfxGtm_Atom_ToutMapP : IfxGtm_PinMap.h
  • IfxGtm_Tom_PwmHl : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_Update : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_UpdatePulse : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_PwmHl_UpdateShift : IfxGtm_Tom_PwmHl.h
  • IfxGtm_Tom_ToutMapP : IfxGtm_PinMap.h
  • IfxMultican_MsgObjId : IfxMultican.h
  • IfxQspi_SpiMaster_AutoSlso : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Channel : IfxQspi_SpiMaster.h
  • IfxScuCcu_PllStepsFunctionHook : IfxScuCcu.h
  • IfxStdIf_DPipe : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_CanReadCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_CanWriteCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ClearRx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ClearTx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_FlushTx : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetReadCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetReadEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetSendCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetTxTimeStamp : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetWriteCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_GetWriteEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnError : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnReceive : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_OnTransmit : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_Read : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ReadEvent : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_ResetSendCount : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_Write : IfxStdIf_DPipe.h
  • IfxStdIf_DPipe_WriteEvent : IfxStdIf_DPipe.h
  • IfxStdIf_InterfaceDriver : IfxStdIf.h
  • IfxStdIf_Pos : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetAbsolutePosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetDirection : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetFault : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetOffset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetPeriodPerRotation : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetRawPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetRefreshPeriod : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetResolution : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetSensorType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetSpeed : IfxStdIf_Pos.h
  • IfxStdIf_Pos_GetTurn : IfxStdIf_Pos.h
  • IfxStdIf_Pos_OnEventA : IfxStdIf_Pos.h
  • IfxStdIf_Pos_OnZeroIrq : IfxStdIf_Pos.h
  • IfxStdIf_Pos_RawAngle : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Reset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResetFaults : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetOffset : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetRawPosition : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetRefreshPeriod : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SetSpeed : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Update : IfxStdIf_Pos.h
  • IfxStdIf_PwmHl : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetDeadtime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetMinPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_GetMode : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetDeadtime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetMinPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetMode : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetOnTime : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetOnTimeAndShift : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetPulse : IfxStdIf_PwmHl.h
  • IfxStdIf_PwmHl_SetupChannels : IfxStdIf_PwmHl.h
  • IfxStdIf_Timer : IfxStdIf_Timer.h
  • IfxStdIf_Timer_AckTimerIrq : IfxStdIf_Timer.h
  • IfxStdIf_Timer_AckTriggerIrq : IfxStdIf_Timer.h
  • IfxStdIf_Timer_ApplyUpdate : IfxStdIf_Timer.h
  • IfxStdIf_Timer_DisableUpdate : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetInputFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetPeriod : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetResolution : IfxStdIf_Timer.h
  • IfxStdIf_Timer_GetTrigger : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Run : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetFrequency : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetPeriod : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetSingleMode : IfxStdIf_Timer.h
  • IfxStdIf_Timer_SetTrigger : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Stop : IfxStdIf_Timer.h
  • IfxStdIf_Timer_UpdateInputFrequency : IfxStdIf_Timer.h
  • IfxVadc_Adc_SYNCTR_STSEL : IfxVadc_Adc.h

- l -

  • laccum : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h

- p -

  • pchar : Ifx_Types.h
  • pvoid : Ifx_Types.h
  • PwmHl : PwmHl.h
  • PwmHl_Pause : PwmHl.h
  • PwmHl_Resume : PwmHl.h
  • PwmHl_Start : PwmHl.h
  • PwmHl_Stop : PwmHl.h

- s -

  • sfract : Ifx_TypesDcc.h , Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • sint16 : Platform_Types.h
  • sint16_least : Platform_Types.h
  • sint32 : Platform_Types.h
  • sint32_least : Platform_Types.h
  • sint64 : Platform_Types.h
  • sint8 : Platform_Types.h
  • sint8_least : Platform_Types.h
  • SpiIf : SpiIf.h
  • SpiIf_Cbk : SpiIf.h
  • SpiIf_Ch : SpiIf.h
  • SpiIf_ChConfig : SpiIf.h
  • SpiIf_Exchange : SpiIf.h
  • SpiIf_GetStatus : SpiIf.h
  • SpiIf_OnEvent : SpiIf.h
  • SpiIf_SlsoTiming_HalfTsclk : SpiIf.h

- t -

  • Timer : Timer.h
  • Timer_CountOneStep : Timer.h
  • Timer_Start : Timer.h
  • Timer_StartSingleShotMode : Timer.h
  • Timer_Stop : Timer.h
  • Timer_SynchronousStart : Timer.h
  • Timer_SynchronousStop : Timer.h
  • TPwm : TPwm.h
  • TPwm_Pause : TPwm.h
  • TPwm_Resume : TPwm.h
  • TPwm_Start : TPwm.h
  • TPwm_Stop : TPwm.h
  • TxRxHandler : SpiIf.h

- u -

  • uint16 : Platform_Types.h
  • uint16_least : Platform_Types.h
  • uint32 : Platform_Types.h
  • uint32_least : Platform_Types.h
  • uint64 : Platform_Types.h
  • uint8 : Platform_Types.h
  • uint8_least : Platform_Types.h

- v -

  • voidfunc : IfxCpu_IntrinsicsGhs.h
  • voidfuncvoid : Ifx_Types.h
  • vvoid : Ifx_Types.h

- w -

  • WaitTimeFunction : Bsp.h


iLLD_TC26B: Globals

- i -

  • Ifx_ActiveState : Ifx_Types.h
  • Ifx_DataBufferMode : Ifx_Types.h
  • Ifx_ParityMode : Ifx_Types.h
  • Ifx_Pwm_Mode : Ifx_Types.h
  • Ifx_RxSel : Ifx_Types.h
  • Ifx_Shell_CmdState : Ifx_Shell.h
  • Ifx_Shell_ResultCode : Ifx_Shell.h
  • IfxAsclin_Checksum : IfxAsclin.h
  • IfxAsclin_ChecksumInjection : IfxAsclin.h
  • IfxAsclin_ClockPolarity : IfxAsclin.h
  • IfxAsclin_ClockSource : IfxAsclin.h
  • IfxAsclin_CtsInputSelect : IfxAsclin.h
  • IfxAsclin_DataLength : IfxAsclin.h
  • IfxAsclin_FrameMode : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect : IfxAsclin.h
  • IfxAsclin_IdleDelay : IfxAsclin.h
  • IfxAsclin_Index : IfxAsclin_cfg.h
  • IfxAsclin_LeadDelay : IfxAsclin.h
  • IfxAsclin_Lin_Direction : IfxAsclin_Lin.h
  • IfxAsclin_LinMode : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode : IfxAsclin.h
  • IfxAsclin_OversamplingFactor : IfxAsclin.h
  • IfxAsclin_ParityType : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth : IfxAsclin.h
  • IfxAsclin_RxInputSelect : IfxAsclin.h
  • IfxAsclin_SamplePointPosition : IfxAsclin.h
  • IfxAsclin_SamplesPerBit : IfxAsclin.h
  • IfxAsclin_ShiftDirection : IfxAsclin.h
  • IfxAsclin_SlavePolarity : IfxAsclin.h
  • IfxAsclin_SleepMode : IfxAsclin.h
  • IfxAsclin_Spi_Status : IfxAsclin_Spi.h
  • IfxAsclin_Status : IfxAsclin.h
  • IfxAsclin_StopBit : IfxAsclin.h
  • IfxAsclin_SuspendMode : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel : IfxAsclin.h
  • IfxCcu6_CaptureCompareInput : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal : IfxCcu6.h
  • IfxCcu6_CaptureCompareState : IfxCcu6.h
  • IfxCcu6_ChannelOut : IfxCcu6.h
  • IfxCcu6_CountingInputMode : IfxCcu6.h
  • IfxCcu6_DelayBypass : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode : IfxCcu6.h
  • IfxCcu6_Index : IfxCcu6_cfg.h
  • IfxCcu6_InterruptSource : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync : IfxCcu6.h
  • IfxCcu6_ServiceRequest : IfxCcu6.h
  • IfxCcu6_SleepMode : IfxCcu6.h
  • IfxCcu6_SuspendMode : IfxCcu6.h
  • IfxCcu6_T12Channel : IfxCcu6.h
  • IfxCcu6_T12ChannelMode : IfxCcu6.h
  • IfxCcu6_T12CountDirection : IfxCcu6.h
  • IfxCcu6_T12CountMode : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent : IfxCcu6.h
  • IfxCcu6_TimerId : IfxCcu6.h
  • IfxCcu6_TimerInputClock : IfxCcu6.h
  • IfxCcu6_TimerInputSignal : IfxCcu6.h
  • IfxCcu6_TimerRunStatus : IfxCcu6.h
  • IfxCcu6_TrapMode : IfxCcu6.h
  • IfxCcu6_TrapState : IfxCcu6.h
  • IfxCcu6_TrigOut : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel : IfxCcu6_cfg.h
  • IfxCif_Cam_IspMode : IfxCif_Cam.h
  • IfxCif_Cam_State : IfxCif_Cam.h
  • IfxCif_Cam_Status : IfxCif_Cam.h
  • IfxCif_DataPathSelectorForMainPath : IfxCif.h
  • IfxCif_DpControlSources : IfxCif.h
  • IfxCif_DpCounters : IfxCif.h
  • IfxCif_DpSourcePath : IfxCif.h
  • IfxCif_EpErrorClearSources : IfxCif.h
  • IfxCif_EpErrorSources : IfxCif.h
  • IfxCif_EpFeatures : IfxCif.h
  • IfxCif_EpInterrupts : IfxCif.h
  • IfxCif_EpWriteFormat : IfxCif.h
  • IfxCif_ErrorState : IfxCif.h
  • IfxCif_ExtraPath : IfxCif.h
  • IfxCif_HuffmanTableComponents : IfxCif.h
  • IfxCif_HuffmanTables : IfxCif.h
  • IfxCif_ImageTiers : IfxCif.h
  • IfxCif_InputInterface : IfxCif.h
  • IfxCif_InterruptTriggeredState : IfxCif.h
  • IfxCif_IspCcirSequence : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange : IfxCif.h
  • IfxCif_IspErrorSources : IfxCif.h
  • IfxCif_IspFieldSelection : IfxCif.h
  • IfxCif_IspInformFieldInformation : IfxCif.h
  • IfxCif_IspInputInterface : IfxCif.h
  • IfxCif_IspInterruptSources : IfxCif.h
  • IfxCif_IspMode : IfxCif.h
  • IfxCif_IspSamplingEdge : IfxCif.h
  • IfxCif_IspSyncPolarity : IfxCif.h
  • IfxCif_JpeDebugSignalSources : IfxCif.h
  • IfxCif_JpeDebugSignalState : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode : IfxCif.h
  • IfxCif_JpeHeaderMode : IfxCif.h
  • IfxCif_JpeInterruptSources : IfxCif.h
  • IfxCif_JpeQTableSelector : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents : IfxCif.h
  • IfxCif_JpeScalingValueSources : IfxCif.h
  • IfxCif_JpeState : IfxCif.h
  • IfxCif_JpeTableId : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode : IfxCif.h
  • IfxCif_MiBurstLength : IfxCif.h
  • IfxCif_MiDataPaths : IfxCif.h
  • IfxCif_MiInterruptSources : IfxCif.h
  • IfxCif_MiMainPicturePathComponents : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat : IfxCif.h
  • IfxCif_MiStatusClearSources : IfxCif.h
  • IfxCif_MiStatusInformationSources : IfxCif.h
  • IfxCif_PortInputSelection : IfxCif.h
  • IfxCif_SecurityWatchdogCounters : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters : IfxCif.h
  • IfxCif_State : IfxCif.h
  • IfxCif_Submodules : IfxCif.h
  • IfxCif_YCSplitterChannelMode : IfxCif.h
  • IfxCpu_CoreMode : IfxCpu.h
  • IfxCpu_CounterMode : IfxCpu.h
  • IfxCpu_DBGST_HALT : IfxCpu_cfg.h
  • IfxCpu_Id : IfxCpu_cfg.h
  • IfxCpu_Index : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu : IfxCpu_cfg.h
  • IfxCpu_Trap_Assertion_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_Class : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id : IfxCpu_Trap.h
  • IfxDma_BusMasterMode : IfxDma.h
  • IfxDma_ChannelBusPriority : IfxDma.h
  • IfxDma_ChannelId : IfxDma_cfg.h
  • IfxDma_ChannelIncrementCircular : IfxDma.h
  • IfxDma_ChannelIncrementDirection : IfxDma.h
  • IfxDma_ChannelIncrementStep : IfxDma.h
  • IfxDma_ChannelInterruptControl : IfxDma.h
  • IfxDma_ChannelMove : IfxDma.h
  • IfxDma_ChannelMoveSize : IfxDma.h
  • IfxDma_ChannelOperationMode : IfxDma.h
  • IfxDma_ChannelPattern : IfxDma.h
  • IfxDma_ChannelPriority : IfxDma.h
  • IfxDma_ChannelRequestMode : IfxDma.h
  • IfxDma_ChannelRequestSource : IfxDma.h
  • IfxDma_ChannelShadow : IfxDma.h
  • IfxDma_HardwareResourcePartition : IfxDma.h
  • IfxDma_MoveEngine : IfxDma.h
  • IfxDma_SleepMode : IfxDma.h
  • IfxDsadc_AuxCombFilterShift : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType : IfxDsadc.h
  • IfxDsadc_AuxEvent : IfxDsadc.h
  • IfxDsadc_AuxGate : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode : IfxDsadc.h
  • IfxDsadc_ChannelId : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage : IfxDsadc.h
  • IfxDsadc_FirDataShift : IfxDsadc.h
  • IfxDsadc_FirInternalShift : IfxDsadc.h
  • IfxDsadc_InputConfig : IfxDsadc.h
  • IfxDsadc_InputDataSource : IfxDsadc.h
  • IfxDsadc_InputGain : IfxDsadc.h
  • IfxDsadc_InputPin : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger : IfxDsadc.h
  • IfxDsadc_LowPowerSupply : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift : IfxDsadc.h
  • IfxDsadc_MainCombFilterType : IfxDsadc.h
  • IfxDsadc_MainServiceRequest : IfxDsadc.h
  • IfxDsadc_ModulatorClock : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider : IfxDsadc.h
  • IfxDsadc_RectifierSignSource : IfxDsadc.h
  • IfxDsadc_SampleClockSource : IfxDsadc.h
  • IfxDsadc_SampleStrobe : IfxDsadc.h
  • IfxDsadc_SleepMode : IfxDsadc.h
  • IfxDsadc_TimestampTrigger : IfxDsadc.h
  • IfxDsadc_TriggerInput : IfxDsadc.h
  • IfxEmem_LockedState : IfxEmem.h
  • IfxEmem_State : IfxEmem.h
  • IfxEmem_TileConfigMode : IfxEmem.h
  • IfxEmem_TileNumber : IfxEmem.h
  • IfxEray_Baudrate : IfxEray.h
  • IfxEray_BufferDirection : IfxEray.h
  • IfxEray_Channel : IfxEray.h
  • IfxEray_ClearErrorFlag : IfxEray.h
  • IfxEray_ClearStatusFlag : IfxEray.h
  • IfxEray_ClockDivider : IfxEray.h
  • IfxEray_ExternalOffset : IfxEray.h
  • IfxEray_ExternalOffsetCorrection : IfxEray.h
  • IfxEray_ExternalRate : IfxEray.h
  • IfxEray_ExternalRateCorrection : IfxEray.h
  • IfxEray_IdleDynamicSlots : IfxEray.h
  • IfxEray_Index : IfxEray_cfg.h
  • IfxEray_ListenTimeOutNoise : IfxEray.h
  • IfxEray_MaxSynchFrames : IfxEray.h
  • IfxEray_NodeId : IfxEray_cfg.h
  • IfxEray_PocCommand : IfxEray.h
  • IfxEray_PocState : IfxEray.h
  • IfxEray_ReceiveChannel : IfxEray.h
  • IfxEray_SleepMode : IfxEray.h
  • IfxEray_StrobePosition : IfxEray.h
  • IfxEray_SuspendMode : IfxEray.h
  • IfxEray_TransmissionMode : IfxEray.h
  • IfxEray_TransmissionSlotMode : IfxEray.h
  • IfxEray_WakeupChannel : IfxEray.h
  • IfxEth_ChecksumMode : IfxEth.h
  • IfxEth_DescriptorMode : IfxEth.h
  • IfxEth_PhyInterfaceMode : IfxEth.h
  • IfxEth_ReceiveProcessState : IfxEth.h
  • IfxEth_RingModeBufferUsed : IfxEth.h
  • IfxEth_TransmitProcessState : IfxEth.h
  • IfxFce_Crc32Kernel : IfxFce.h
  • IfxFce_CrcMode : IfxFce.h
  • IfxFft_Input : IfxFft.h
  • IfxFft_Length : IfxFft.h
  • IfxFft_Operation : IfxFft.h
  • IfxFft_Output : IfxFft.h
  • IfxFft_SuspendMode : IfxFft.h
  • IfxFlash_ErrorTracking : IfxFlash.h
  • IfxFlash_FlashType : IfxFlash_cfg.h
  • IfxFlash_PortId : IfxFlash.h
  • IfxFlash_UcbType : IfxFlash_cfg.h
  • IfxGpt12_CaptureInput : IfxGpt12.h
  • IfxGpt12_CaptureInputMode : IfxGpt12.h
  • IfxGpt12_CaptureTrigger : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode : IfxGpt12.h
  • IfxGpt12_CounterInputMode : IfxGpt12.h
  • IfxGpt12_EudInput : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode : IfxGpt12.h
  • IfxGpt12_Input : IfxGpt12.h
  • IfxGpt12_Mode : IfxGpt12.h
  • IfxGpt12_ReloadInputMode : IfxGpt12.h
  • IfxGpt12_SleepMode : IfxGpt12.h
  • IfxGpt12_SuspendMode : IfxGpt12.h
  • IfxGpt12_TimerDirection : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler : IfxGpt12.h
  • IfxGpt12_TimerReloadMode : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl : IfxGpt12.h
  • IfxGpt12_TimerRun : IfxGpt12.h
  • IfxGtm_Atom : IfxGtm_cfg.h
  • IfxGtm_Atom_AruInput : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_OutputTrigger : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl : IfxGtm_Atom.h
  • IfxGtm_ChXSel : IfxGtm_PinMap.h
  • IfxGtm_Cmu_Clk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk : IfxGtm_Cmu.h
  • IfxGtm_Dpll_SubInc : IfxGtm_cfg.h
  • IfxGtm_FeatureControl : IfxGtm_cfg.h
  • IfxGtm_IrqMode : IfxGtm.h
  • IfxGtm_SuspendMode : IfxGtm.h
  • IfxGtm_Tbu_Ts : IfxGtm_Tbu.h
  • IfxGtm_Tim : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch : IfxGtm_cfg.h
  • IfxGtm_Tim_CntsSel : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel : IfxGtm_Tim.h
  • IfxGtm_Tim_In_ConfigFilterMode : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input : IfxGtm_Tim_In.h
  • IfxGtm_Tim_Input : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout : IfxGtm_Tim.h
  • IfxGtm_Tom : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_ClkSrc : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_OutputTrigger : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent : IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc : IfxGtm_cfg.h
  • IfxGtm_ToutSel : IfxGtm_PinMap.h
  • IfxGtm_Trig_AdcGroup : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource : IfxGtm_Trig.h
  • IfxHssl_ChannelId : IfxHssl.h
  • IfxHssl_ClockFrequencyRate : IfxHssl.h
  • IfxHssl_Command : IfxHssl.h
  • IfxHssl_ControlCommand : IfxHssl.h
  • IfxHssl_DataLength : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource : IfxHssl.h
  • IfxHssl_Hsct_SleepMode : IfxHssl.h
  • IfxHssl_hsctIndex : IfxHssl_cfg.h
  • IfxHssl_Hssl_ERRInterruptSource : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource : IfxHssl.h
  • IfxHssl_Hssl_FrameRequest : IfxHssl_Hssl.h
  • IfxHssl_Hssl_SleepMode : IfxHssl.h
  • IfxHssl_Hssl_Status : IfxHssl_Hssl.h
  • IfxHssl_hsslIndex : IfxHssl_cfg.h
  • IfxHssl_InterfaceMode : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed : IfxHssl.h
  • IfxHssl_PllReferenceClock : IfxHssl.h
  • IfxHssl_StreamingMode : IfxHssl.h
  • IfxHssl_SuspendMode : IfxHssl.h
  • IfxI2c_BusStatus : IfxI2c.h
  • IfxI2c_ErrorInterruptSource : IfxI2c.h
  • IfxI2c_I2c_Status : IfxI2c_I2c.h
  • IfxI2c_Index : IfxI2c_cfg.h
  • IfxI2c_PinSelect : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource : IfxI2c.h
  • IfxI2c_SleepMode : IfxI2c.h
  • IfxIom_LamEventSource : IfxIom.h
  • IfxIom_LamEventTrigger : IfxIom.h
  • IfxIom_LamEventWindowClearEvent : IfxIom.h
  • IfxIom_LamEventWindowControlSource : IfxIom.h
  • IfxIom_LamEventWindowRunControl : IfxIom.h
  • IfxIom_LamFilterMode : IfxIom.h
  • IfxIom_LamId : IfxIom.h
  • IfxIom_MonInput : IfxIom_cfg.h
  • IfxIom_MonInputSignal : IfxIom_cfg.h
  • IfxIom_RefInput : IfxIom_cfg.h
  • IfxIom_RefInputSignal : IfxIom_cfg.h
  • IfxIom_SleepMode : IfxIom.h
  • IfxMsc_ActivePhaseSelection : IfxMsc.h
  • IfxMsc_AsynchronousBlock : IfxMsc.h
  • IfxMsc_ChipSelectActiveState : IfxMsc.h
  • IfxMsc_ClockSelect : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode : IfxMsc.h
  • IfxMsc_CommandFrameLength : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength : IfxMsc.h
  • IfxMsc_DataFrameInterrupt : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode : IfxMsc.h
  • IfxMsc_DataFrameLength : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength : IfxMsc.h
  • IfxMsc_DividerMode : IfxMsc.h
  • IfxMsc_EmergencyStop : IfxMsc.h
  • IfxMsc_Extension : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition : IfxMsc.h
  • IfxMsc_ExternalSignalInjection : IfxMsc.h
  • IfxMsc_FclClockControlEnabled : IfxMsc.h
  • IfxMsc_FclLinePolarity : IfxMsc.h
  • IfxMsc_HardwareClock : IfxMsc.h
  • IfxMsc_Index : IfxMsc_cfg.h
  • IfxMsc_InterruptServiceRequest : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit : IfxMsc.h
  • IfxMsc_MsbBitDataExtension : IfxMsc.h
  • IfxMsc_Msc_Target : IfxMsc_Msc.h
  • IfxMsc_NDividerAbra : IfxMsc.h
  • IfxMsc_NDividerDownstream : IfxMsc.h
  • IfxMsc_OverflowInterrupt : IfxMsc.h
  • IfxMsc_OverflowInterruptNode : IfxMsc.h
  • IfxMsc_Parity : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode : IfxMsc.h
  • IfxMsc_SdiLinePolarity : IfxMsc.h
  • IfxMsc_SerialDataInput : IfxMsc.h
  • IfxMsc_ServiceRequestDelay : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration : IfxMsc.h
  • IfxMsc_SleepMode : IfxMsc.h
  • IfxMsc_SoLinePolarity : IfxMsc.h
  • IfxMsc_Source : IfxMsc.h
  • IfxMsc_SuspendMode : IfxMsc.h
  • IfxMsc_Target : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode : IfxMsc.h
  • IfxMsc_TransmissionMode : IfxMsc.h
  • IfxMsc_UnderflowInterrupt : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue : IfxMsc.h
  • IfxMtu_MbistSel : IfxMtu_cfg.h
  • IfxMultican_ClockSelect : IfxMultican.h
  • IfxMultican_DataLengthCode : IfxMultican.h
  • IfxMultican_Frame : IfxMultican.h
  • IfxMultican_FrameCounterMode : IfxMultican.h
  • IfxMultican_Index : IfxMultican_cfg.h
  • IfxMultican_MsgObjGroup : IfxMultican.h
  • IfxMultican_MsgObjMode : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag : IfxMultican.h
  • IfxMultican_NodeId : IfxMultican_cfg.h
  • IfxMultican_Priority : IfxMultican.h
  • IfxMultican_SleepMode : IfxMultican.h
  • IfxMultican_SrcId : IfxMultican_cfg.h
  • IfxMultican_Status : IfxMultican.h
  • IfxMultican_SuspendMode : IfxMultican.h
  • IfxPort_ControlledBy : IfxPort.h
  • IfxPort_Index : IfxPort_cfg.h
  • IfxPort_InputMode : IfxPort.h
  • IfxPort_Mode : IfxPort.h
  • IfxPort_OutputIdx : IfxPort.h
  • IfxPort_OutputMode : IfxPort.h
  • IfxPort_PadDriver : IfxPort.h
  • IfxPort_PadSupply : IfxPort.h
  • IfxPort_State : IfxPort.h
  • IfxPsi5_AlternateInput : IfxPsi5.h
  • IfxPsi5_BaudRate : IfxPsi5.h
  • IfxPsi5_ChannelId : IfxPsi5_cfg.h
  • IfxPsi5_ClockType : IfxPsi5.h
  • IfxPsi5_CRCorParity : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth : IfxPsi5.h
  • IfxPsi5_DividerMode : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister : IfxPsi5.h
  • IfxPsi5_FrameExpectation : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister : IfxPsi5.h
  • IfxPsi5_MessagingBits : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister : IfxPsi5.h
  • IfxPsi5_Slot : IfxPsi5.h
  • IfxPsi5_SuspendMode : IfxPsi5.h
  • IfxPsi5_TimeBase : IfxPsi5.h
  • IfxPsi5_TimestampRegister : IfxPsi5.h
  • IfxPsi5_Trigger : IfxPsi5.h
  • IfxPsi5_TriggerType : IfxPsi5.h
  • IfxPsi5_Verbose : IfxPsi5.h
  • IfxPsi5s_AlternateInput : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar : IfxPsi5s.h
  • IfxPsi5s_AscMode : IfxPsi5s.h
  • IfxPsi5s_AscStopBits : IfxPsi5s.h
  • IfxPsi5s_ChannelId : IfxPsi5s.h
  • IfxPsi5s_ClockType : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity : IfxPsi5s.h
  • IfxPsi5s_DividerMode : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol : IfxPsi5s.h
  • IfxPsi5s_FrameId : IfxPsi5s.h
  • IfxPsi5s_IdleTime : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode : IfxPsi5s.h
  • IfxPsi5s_MessagingBits : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames : IfxPsi5s.h
  • IfxPsi5s_SleepMode : IfxPsi5s.h
  • IfxPsi5s_SuspendMode : IfxPsi5s.h
  • IfxPsi5s_TimeBase : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger : IfxPsi5s.h
  • IfxPsi5s_Trigger : IfxPsi5s.h
  • IfxPsi5s_TriggerType : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode : IfxPsi5s.h
  • IfxQspi_ChannelId : IfxQspi.h
  • IfxQspi_DataLengthUnit : IfxQspi.h
  • IfxQspi_Error : IfxQspi.h
  • IfxQspi_ExpectTimeout : IfxQspi.h
  • IfxQspi_FifoMode : IfxQspi.h
  • IfxQspi_Index : IfxQspi_cfg.h
  • IfxQspi_Mode : IfxQspi.h
  • IfxQspi_PauseRunTransition : IfxQspi.h
  • IfxQspi_Phase : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent : IfxQspi.h
  • IfxQspi_Reset : IfxQspi.h
  • IfxQspi_RxFifoInt : IfxQspi.h
  • IfxQspi_SleepMode : IfxQspi.h
  • IfxQspi_SpiMaster_ChannelBasedCs : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode : IfxQspi_SpiMaster.h
  • IfxQspi_StrobeDelay : IfxQspi.h
  • IfxQspi_SuspendMode : IfxQspi.h
  • IfxQspi_TxFifoInt : IfxQspi.h
  • IfxScu_CCUCON0_CLKSEL : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR : IfxScu_cfg.h
  • IfxScuCcu_K1divider : IfxScuCcu.h
  • IfxScuCcu_K2divider : IfxScuCcu.h
  • IfxScuCcu_K3divider : IfxScuCcu.h
  • IfxScuCcu_Ndivider : IfxScuCcu.h
  • IfxScuCcu_Pdivider : IfxScuCcu.h
  • IfxScuEru_ExternalInputSelection : IfxScuEru.h
  • IfxScuEru_InputChannel : IfxScuEru.h
  • IfxScuEru_InputNodePointer : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern : IfxScuEru.h
  • IfxScuEru_OutputChannel : IfxScuEru.h
  • IfxSent_AlternateInput : IfxSent.h
  • IfxSent_ChannelId : IfxSent_cfg.h
  • IfxSent_ChannelStatus : IfxSent.h
  • IfxSent_ClockDividerMode : IfxSent.h
  • IfxSent_ConfigBit : IfxSent.h
  • IfxSent_DigitalGlitchesLength : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode : IfxSent.h
  • IfxSent_ExternalTrigger : IfxSent.h
  • IfxSent_FrameCheckMode : IfxSent.h
  • IfxSent_InterruptNodePointer : IfxSent.h
  • IfxSent_InterruptSource : IfxSent.h
  • IfxSent_Nibble : IfxSent.h
  • IfxSent_SleepMode : IfxSent.h
  • IfxSent_SpcMode : IfxSent.h
  • IfxSent_SuspendMode : IfxSent.h
  • IfxSent_TimeBase : IfxSent.h
  • IfxSent_TriggerSource : IfxSent.h
  • IfxSmu_Alarm : IfxSmu_cfg.h
  • IfxSmu_AlarmConfig : IfxSmu.h
  • IfxSmu_AlarmGroup : IfxSmu_cfg.h
  • IfxSmu_Cmd : IfxSmu.h
  • IfxSmu_Fsp_Mode : IfxSmu.h
  • IfxSmu_RecoveryTimer : IfxSmu_cfg.h
  • IfxSrc_Tos : IfxSrc_cfg.h
  • IfxStdIf_Pos_Dir : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType : IfxStdIf_Pos.h
  • IfxStdIf_Timer_CountDir : IfxStdIf_Timer.h
  • IfxStdIf_Timer_OutputEvent : IfxStdIf_Timer.h
  • IfxStm_Comparator : IfxStm.h
  • IfxStm_ComparatorInterrupt : IfxStm.h
  • IfxStm_ComparatorOffset : IfxStm.h
  • IfxStm_ComparatorSize : IfxStm.h
  • IfxStm_Index : IfxStm_cfg.h
  • IfxStm_SleepMode : IfxStm.h
  • IfxStm_SuspendMode : IfxStm.h
  • IfxVadc_AnalogConverterMode : IfxVadc.h
  • IfxVadc_ArbitrationRounds : IfxVadc.h
  • IfxVadc_BoundaryExtension : IfxVadc.h
  • IfxVadc_BoundarySelection : IfxVadc.h
  • IfxVadc_ChannelId : IfxVadc.h
  • IfxVadc_ChannelReference : IfxVadc.h
  • IfxVadc_ChannelResolution : IfxVadc.h
  • IfxVadc_ChannelResult : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle : IfxVadc.h
  • IfxVadc_ConversionType : IfxVadc.h
  • IfxVadc_EmuxCodingScheme : IfxVadc.h
  • IfxVadc_EmuxInterface : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl : IfxVadc.h
  • IfxVadc_EmuxSelectValue : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode : IfxVadc.h
  • IfxVadc_FifoMode : IfxVadc.h
  • IfxVadc_GatingMode : IfxVadc.h
  • IfxVadc_GatingSource : IfxVadc.h
  • IfxVadc_GroupId : IfxVadc_cfg.h
  • IfxVadc_InputClasses : IfxVadc.h
  • IfxVadc_LimitCheck : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect : IfxVadc.h
  • IfxVadc_Protection : IfxVadc.h
  • IfxVadc_RequestSlotPriority : IfxVadc.h
  • IfxVadc_RequestSlotStartMode : IfxVadc.h
  • IfxVadc_RequestSource : IfxVadc.h
  • IfxVadc_SleepMode : IfxVadc.h
  • IfxVadc_SrcNr : IfxVadc.h
  • IfxVadc_Status : IfxVadc.h
  • IfxVadc_TriggerMode : IfxVadc.h
  • IfxVadc_TriggerSource : IfxVadc.h


iLLD_TC26B: Globals

- s -

  • SpiIf_ClockPolarity : SpiIf.h
  • SpiIf_DataHeading : SpiIf.h
  • SpiIf_Mode : SpiIf.h
  • SpiIf_ShiftClock : SpiIf.h
  • SpiIf_SlsoTiming : SpiIf.h
  • SpiIf_Status : SpiIf.h


iLLD_TC26B: Globals

- i -

  • Ifx_ActiveState_high : Ifx_Types.h
  • Ifx_ActiveState_low : Ifx_Types.h
  • Ifx_DataBufferMode_normal : Ifx_Types.h
  • Ifx_DataBufferMode_timeStampSingle : Ifx_Types.h
  • Ifx_ParityMode_even : Ifx_Types.h
  • Ifx_ParityMode_odd : Ifx_Types.h
  • Ifx_Pwm_Mode_centerAligned : Ifx_Types.h
  • Ifx_Pwm_Mode_centerAlignedInverted : Ifx_Types.h
  • Ifx_Pwm_Mode_count : Ifx_Types.h
  • Ifx_Pwm_Mode_init : Ifx_Types.h
  • Ifx_Pwm_Mode_leftAligned : Ifx_Types.h
  • Ifx_Pwm_Mode_off : Ifx_Types.h
  • Ifx_Pwm_Mode_rightAligned : Ifx_Types.h
  • Ifx_RxSel_a : Ifx_Types.h
  • Ifx_RxSel_b : Ifx_Types.h
  • Ifx_RxSel_c : Ifx_Types.h
  • Ifx_RxSel_d : Ifx_Types.h
  • Ifx_RxSel_e : Ifx_Types.h
  • Ifx_RxSel_f : Ifx_Types.h
  • Ifx_RxSel_g : Ifx_Types.h
  • Ifx_RxSel_h : Ifx_Types.h
  • IFX_SHELL_CMD_STATE_ESCAPE : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE_BRACKET : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER : Ifx_Shell.h
  • IFX_SHELL_CMD_STATE_NORMAL : Ifx_Shell.h
  • Ifx_Shell_ResultCode_nok : Ifx_Shell.h
  • Ifx_Shell_ResultCode_ok : Ifx_Shell.h
  • Ifx_Shell_ResultCode_undefined : Ifx_Shell.h
  • Ifx_Shell_ResultCode_unknown : Ifx_Shell.h
  • IfxAsclin_Checksum_classic : IfxAsclin.h
  • IfxAsclin_Checksum_enhanced : IfxAsclin.h
  • IfxAsclin_ChecksumInjection_notWritten : IfxAsclin.h
  • IfxAsclin_ChecksumInjection_written : IfxAsclin.h
  • IfxAsclin_ClockPolarity_idleHigh : IfxAsclin.h
  • IfxAsclin_ClockPolarity_idleLow : IfxAsclin.h
  • IfxAsclin_ClockSource_ascFastClock : IfxAsclin.h
  • IfxAsclin_ClockSource_ascSlowClock : IfxAsclin.h
  • IfxAsclin_ClockSource_flexRayClock : IfxAsclin.h
  • IfxAsclin_ClockSource_kernelClock : IfxAsclin.h
  • IfxAsclin_ClockSource_noClock : IfxAsclin.h
  • IfxAsclin_ClockSource_oscillatorClock : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_0 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_1 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_2 : IfxAsclin.h
  • IfxAsclin_CtsInputSelect_3 : IfxAsclin.h
  • IfxAsclin_DataLength_1 : IfxAsclin.h
  • IfxAsclin_DataLength_10 : IfxAsclin.h
  • IfxAsclin_DataLength_11 : IfxAsclin.h
  • IfxAsclin_DataLength_12 : IfxAsclin.h
  • IfxAsclin_DataLength_13 : IfxAsclin.h
  • IfxAsclin_DataLength_14 : IfxAsclin.h
  • IfxAsclin_DataLength_15 : IfxAsclin.h
  • IfxAsclin_DataLength_16 : IfxAsclin.h
  • IfxAsclin_DataLength_2 : IfxAsclin.h
  • IfxAsclin_DataLength_3 : IfxAsclin.h
  • IfxAsclin_DataLength_4 : IfxAsclin.h
  • IfxAsclin_DataLength_5 : IfxAsclin.h
  • IfxAsclin_DataLength_6 : IfxAsclin.h
  • IfxAsclin_DataLength_7 : IfxAsclin.h
  • IfxAsclin_DataLength_8 : IfxAsclin.h
  • IfxAsclin_DataLength_9 : IfxAsclin.h
  • IfxAsclin_FrameMode_asc : IfxAsclin.h
  • IfxAsclin_FrameMode_initialise : IfxAsclin.h
  • IfxAsclin_FrameMode_lin : IfxAsclin.h
  • IfxAsclin_FrameMode_spi : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect_headerAndResponse : IfxAsclin.h
  • IfxAsclin_HeaderResponseSelect_headerOnly : IfxAsclin.h
  • IfxAsclin_IdleDelay_0 : IfxAsclin.h
  • IfxAsclin_IdleDelay_1 : IfxAsclin.h
  • IfxAsclin_IdleDelay_2 : IfxAsclin.h
  • IfxAsclin_IdleDelay_3 : IfxAsclin.h
  • IfxAsclin_IdleDelay_4 : IfxAsclin.h
  • IfxAsclin_IdleDelay_5 : IfxAsclin.h
  • IfxAsclin_IdleDelay_6 : IfxAsclin.h
  • IfxAsclin_IdleDelay_7 : IfxAsclin.h
  • IfxAsclin_Index_0 : IfxAsclin_cfg.h
  • IfxAsclin_Index_1 : IfxAsclin_cfg.h
  • IfxAsclin_Index_2 : IfxAsclin_cfg.h
  • IfxAsclin_Index_3 : IfxAsclin_cfg.h
  • IfxAsclin_Index_none : IfxAsclin_cfg.h
  • IfxAsclin_LeadDelay_0 : IfxAsclin.h
  • IfxAsclin_LeadDelay_1 : IfxAsclin.h
  • IfxAsclin_LeadDelay_2 : IfxAsclin.h
  • IfxAsclin_LeadDelay_3 : IfxAsclin.h
  • IfxAsclin_LeadDelay_4 : IfxAsclin.h
  • IfxAsclin_LeadDelay_5 : IfxAsclin.h
  • IfxAsclin_LeadDelay_6 : IfxAsclin.h
  • IfxAsclin_LeadDelay_7 : IfxAsclin.h
  • IfxAsclin_Lin_Direction_TransmitHeader : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse : IfxAsclin_Lin.h
  • IfxAsclin_Lin_Direction_TransmitHeaderAndResponse : IfxAsclin_Lin.h
  • IfxAsclin_LinMode_master : IfxAsclin.h
  • IfxAsclin_LinMode_slave : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode_frameTimeout : IfxAsclin.h
  • IfxAsclin_LinResponseTimeoutMode_responseTimeout : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_10 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_11 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_12 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_13 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_14 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_15 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_16 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_4 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_5 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_6 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_7 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_8 : IfxAsclin.h
  • IfxAsclin_OversamplingFactor_9 : IfxAsclin.h
  • IfxAsclin_ParityType_even : IfxAsclin.h
  • IfxAsclin_ParityType_odd : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode_rxBuffer : IfxAsclin.h
  • IfxAsclin_ReceiveBufferMode_rxFifo : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity_activeHigh : IfxAsclin.h
  • IfxAsclin_RtsCtsPolarity_activeLow : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_1 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_10 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_11 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_12 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_13 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_14 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_15 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_16 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_2 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_3 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_4 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_5 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_6 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_7 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_8 : IfxAsclin.h
  • IfxAsclin_RxFifoInterruptLevel_9 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_0 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_1 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_2 : IfxAsclin.h
  • IfxAsclin_RxFifoOutletWidth_3 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_0 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_1 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_2 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_3 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_4 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_5 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_6 : IfxAsclin.h
  • IfxAsclin_RxInputSelect_7 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_1 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_10 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_11 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_12 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_13 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_14 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_15 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_2 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_3 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_4 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_5 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_6 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_7 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_8 : IfxAsclin.h
  • IfxAsclin_SamplePointPosition_9 : IfxAsclin.h
  • IfxAsclin_SamplesPerBit_one : IfxAsclin.h
  • IfxAsclin_SamplesPerBit_three : IfxAsclin.h
  • IfxAsclin_ShiftDirection_lsbFirst : IfxAsclin.h
  • IfxAsclin_ShiftDirection_msbFirst : IfxAsclin.h
  • IfxAsclin_SlavePolarity_idlehigh : IfxAsclin.h
  • IfxAsclin_SlavePolarity_idleLow : IfxAsclin.h
  • IfxAsclin_SleepMode_disable : IfxAsclin.h
  • IfxAsclin_SleepMode_enable : IfxAsclin.h
  • IfxAsclin_Spi_Status_busy : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_ok : IfxAsclin_Spi.h
  • IfxAsclin_Spi_Status_unknown : IfxAsclin_Spi.h
  • IfxAsclin_Status_configurationError : IfxAsclin.h
  • IfxAsclin_Status_noError : IfxAsclin.h
  • IfxAsclin_StopBit_0 : IfxAsclin.h
  • IfxAsclin_StopBit_1 : IfxAsclin.h
  • IfxAsclin_StopBit_2 : IfxAsclin.h
  • IfxAsclin_StopBit_3 : IfxAsclin.h
  • IfxAsclin_StopBit_4 : IfxAsclin.h
  • IfxAsclin_StopBit_5 : IfxAsclin.h
  • IfxAsclin_StopBit_6 : IfxAsclin.h
  • IfxAsclin_StopBit_7 : IfxAsclin.h
  • IfxAsclin_SuspendMode_hard : IfxAsclin.h
  • IfxAsclin_SuspendMode_none : IfxAsclin.h
  • IfxAsclin_SuspendMode_soft : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_0 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_1 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_2 : IfxAsclin.h
  • IfxAsclin_TxFifoInletWidth_3 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_0 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_1 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_10 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_11 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_12 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_13 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_14 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_15 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_2 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_3 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_4 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_5 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_6 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_7 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_8 : IfxAsclin.h
  • IfxAsclin_TxFifoInterruptLevel_9 : IfxAsclin.h
  • IfxCcu6_CaptureCompareInput_cC60 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC61 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cC62 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS0 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS1 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cCPOS2 : IfxCcu6.h
  • IfxCcu6_CaptureCompareInput_cTRAP : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_a : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_b : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_c : IfxCcu6.h
  • IfxCcu6_CaptureCompareInputSignal_d : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_clear : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_set : IfxCcu6.h
  • IfxCcu6_CaptureCompareState_toggle : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc0 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc1 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cc2 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout0 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout1 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout2 : IfxCcu6.h
  • IfxCcu6_ChannelOut_cout3 : IfxCcu6.h
  • IfxCcu6_CountingInputMode_externalFalling : IfxCcu6.h
  • IfxCcu6_CountingInputMode_externalRising : IfxCcu6.h
  • IfxCcu6_CountingInputMode_internal : IfxCcu6.h
  • IfxCcu6_CountingInputMode_manual : IfxCcu6.h
  • IfxCcu6_DelayBypass_active : IfxCcu6.h
  • IfxCcu6_DelayBypass_notActive : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_anyEdge : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_disable : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_fallingEdge : IfxCcu6.h
  • IfxCcu6_ExternalTriggerMode_risingEdge : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM61CountingDown : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM61CountingUp : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_cM63 : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_off : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_permanentCheck : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t12OMCountingDown : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t12PMCountingUp : IfxCcu6.h
  • IfxCcu6_HallSensorTriggerMode_t13PM : IfxCcu6.h
  • IfxCcu6_Index_0 : IfxCcu6_cfg.h
  • IfxCcu6_Index_1 : IfxCcu6_cfg.h
  • IfxCcu6_Index_none : IfxCcu6_cfg.h
  • IfxCcu6_InterruptSource_cc60FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc60RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc61FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc61RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc62FallingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_cc62RisingEdge : IfxCcu6.h
  • IfxCcu6_InterruptSource_correctHallEvent : IfxCcu6.h
  • IfxCcu6_InterruptSource_t12OneMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t12PeriodMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t13CompareMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_t13PeriodMatch : IfxCcu6.h
  • IfxCcu6_InterruptSource_trap : IfxCcu6.h
  • IfxCcu6_InterruptSource_wrongHallEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_noEvent : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_direct : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch : IfxCcu6.h
  • IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch : IfxCcu6.h
  • IfxCcu6_ServiceRequest_0 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_1 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_2 : IfxCcu6.h
  • IfxCcu6_ServiceRequest_3 : IfxCcu6.h
  • IfxCcu6_SleepMode_disable : IfxCcu6.h
  • IfxCcu6_SleepMode_enable : IfxCcu6.h
  • IfxCcu6_SuspendMode_hard : IfxCcu6.h
  • IfxCcu6_SuspendMode_none : IfxCcu6.h
  • IfxCcu6_SuspendMode_soft : IfxCcu6.h
  • IfxCcu6_T12Channel_0 : IfxCcu6.h
  • IfxCcu6_T12Channel_1 : IfxCcu6.h
  • IfxCcu6_T12Channel_2 : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_compareMode : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_hallSensor : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_hysteresisLikecompare : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureAny : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureBothRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling : IfxCcu6.h
  • IfxCcu6_T12ChannelMode_off : IfxCcu6.h
  • IfxCcu6_T12CountDirection_down : IfxCcu6.h
  • IfxCcu6_T12CountDirection_up : IfxCcu6.h
  • IfxCcu6_T12CountMode_centerAligned : IfxCcu6.h
  • IfxCcu6_T12CountMode_edgeAligned : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_anyT12 : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_noAction : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_onT12CountingDown : IfxCcu6.h
  • IfxCcu6_T13TriggerDirection_onT12CountingUp : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_noAction : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onAnyT12Compare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC60RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC61RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCC62RCompare : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onCCPOSxEdge : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onT12Period : IfxCcu6.h
  • IfxCcu6_T13TriggerEvent_onT12Zero : IfxCcu6.h
  • IfxCcu6_TimerId_t12 : IfxCcu6.h
  • IfxCcu6_TimerId_t13 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By128 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By16 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By2 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By32 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By4 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By64 : IfxCcu6.h
  • IfxCcu6_TimerInputClock_fcc6By8 : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_a : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_b : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_c : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_d : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_e : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_f : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_g : IfxCcu6.h
  • IfxCcu6_TimerInputSignal_h : IfxCcu6.h
  • IfxCcu6_TimerRunStatus_running : IfxCcu6.h
  • IfxCcu6_TimerRunStatus_stopped : IfxCcu6.h
  • IfxCcu6_TrapMode_automatic : IfxCcu6.h
  • IfxCcu6_TrapMode_manual : IfxCcu6.h
  • IfxCcu6_TrapState_immediate : IfxCcu6.h
  • IfxCcu6_TrapState_t12Sync : IfxCcu6.h
  • IfxCcu6_TrapState_t13Sync : IfxCcu6.h
  • IfxCcu6_TrigOut_0 : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_1 : IfxCcu6_cfg.h
  • IfxCcu6_TrigOut_2 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc60 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc61 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cc62 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_cout63 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_sr1 : IfxCcu6_cfg.h
  • IfxCcu6_TrigSel_sr3 : IfxCcu6_cfg.h
  • IfxCif_Cam_IspMode_raw : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_undefined : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_yuvInterleaved : IfxCif_Cam.h
  • IfxCif_Cam_IspMode_yuvPlanar : IfxCif_Cam.h
  • IfxCif_Cam_State_running : IfxCif_Cam.h
  • IfxCif_Cam_State_stopped : IfxCif_Cam.h
  • IfxCif_Cam_Status_cameraCommError : IfxCif_Cam.h
  • IfxCif_Cam_Status_notAvailable : IfxCif_Cam.h
  • IfxCif_Cam_Status_notEnoughMemory : IfxCif_Cam.h
  • IfxCif_Cam_Status_ok : IfxCif_Cam.h
  • IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder : IfxCif.h
  • IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed : IfxCif.h
  • IfxCif_DataPathSelectorForMainPath_Disabled : IfxCif.h
  • IfxCif_DpControlSources_FrameNumberCounter : IfxCif.h
  • IfxCif_DpControlSources_LineNumberCounter : IfxCif.h
  • IfxCif_DpControlSources_TimestampCounter : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol1 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol2 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol3 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol4 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol5 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol6 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol7 : IfxCif.h
  • IfxCif_DpControlSources_UserDefinedSymbol8 : IfxCif.h
  • IfxCif_DpCounters_FrameNumberCounter : IfxCif.h
  • IfxCif_DpCounters_LineNumberCounter : IfxCif.h
  • IfxCif_DpCounters_PredividerCounter : IfxCif.h
  • IfxCif_DpCounters_TimestampCounter : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath1 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath2 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath4 : IfxCif.h
  • IfxCif_DpSourcePath_ExtraPath5 : IfxCif.h
  • IfxCif_DpSourcePath_MainPath : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath1SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath2SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath3SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath4SizeError : IfxCif.h
  • IfxCif_EpErrorClearSources_ExtraPath5SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath1FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath1SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath2FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath2SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath3FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath3SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath4FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath4SizeError : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath5FifoFull : IfxCif.h
  • IfxCif_EpErrorSources_ExtraPath5SizeError : IfxCif.h
  • IfxCif_EpFeatures_ByteSwap : IfxCif.h
  • IfxCif_EpFeatures_InitBaseAddress : IfxCif.h
  • IfxCif_EpFeatures_InitOffsetCounter : IfxCif.h
  • IfxCif_EpFeatures_PictureDataPath : IfxCif.h
  • IfxCif_EpInterrupts_Count : IfxCif.h
  • IfxCif_EpInterrupts_FillLevel : IfxCif.h
  • IfxCif_EpInterrupts_FrameEnd : IfxCif.h
  • IfxCif_EpInterrupts_MacroBlockLine : IfxCif.h
  • IfxCif_EpInterrupts_WrapAround : IfxCif.h
  • IfxCif_EpWriteFormat_Raw8Bit : IfxCif.h
  • IfxCif_EpWriteFormat_RawAndData : IfxCif.h
  • IfxCif_EpWriteFormat_RawGreater : IfxCif.h
  • IfxCif_EpWriteFormat_YCbCr : IfxCif.h
  • IfxCif_ErrorState_Error : IfxCif.h
  • IfxCif_ErrorState_NoError : IfxCif.h
  • IfxCif_ExtraPath_1 : IfxCif.h
  • IfxCif_ExtraPath_2 : IfxCif.h
  • IfxCif_ExtraPath_3 : IfxCif.h
  • IfxCif_ExtraPath_4 : IfxCif.h
  • IfxCif_ExtraPath_5 : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component0 : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component1 : IfxCif.h
  • IfxCif_HuffmanTableComponents_Component2 : IfxCif.h
  • IfxCif_HuffmanTables_Table0 : IfxCif.h
  • IfxCif_HuffmanTables_Table1 : IfxCif.h
  • IfxCif_ImageTiers_Horizontal : IfxCif.h
  • IfxCif_ImageTiers_Vertical : IfxCif.h
  • IfxCif_InputInterface_ParallelInterface : IfxCif.h
  • IfxCif_InterruptTriggeredState_NotTriggered : IfxCif.h
  • IfxCif_InterruptTriggeredState_Triggered : IfxCif.h
  • IfxCif_IspCcirSequence_CbYCrY : IfxCif.h
  • IfxCif_IspCcirSequence_YCbYCr : IfxCif.h
  • IfxCif_IspCcirSequence_YCrYCb : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 : IfxCif.h
  • IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInInformSubmodule : IfxCif.h
  • IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule : IfxCif.h
  • IfxCif_IspFieldSelection_AllFields : IfxCif.h
  • IfxCif_IspFieldSelection_OnlyEvenFields : IfxCif.h
  • IfxCif_IspFieldSelection_OnlyOddFields : IfxCif.h
  • IfxCif_IspInformFieldInformation_Even : IfxCif.h
  • IfxCif_IspInformFieldInformation_Odd : IfxCif.h
  • IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInputInterface_16BitExternalInterface : IfxCif.h
  • IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb : IfxCif.h
  • IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros : IfxCif.h
  • IfxCif_IspInterruptSources_FrameCompletelyPutOut : IfxCif.h
  • IfxCif_IspInterruptSources_IspTurnedOff : IfxCif.h
  • IfxCif_IspInterruptSources_LossOfData : IfxCif.h
  • IfxCif_IspInterruptSources_PictureSizeViolationOccurred : IfxCif.h
  • IfxCif_IspInterruptSources_SampledInputFrameComplete : IfxCif.h
  • IfxCif_IspInterruptSources_SecurityWatchdogTimeout : IfxCif.h
  • IfxCif_IspInterruptSources_StartEdgeOfHSync : IfxCif.h
  • IfxCif_IspInterruptSources_StartEdgeOfVSync : IfxCif.h
  • IfxCif_IspMode_DataMode : IfxCif.h
  • IfxCif_IspMode_ItuRBT601 : IfxCif.h
  • IfxCif_IspMode_ItuRBT656 : IfxCif.h
  • IfxCif_IspMode_RawPicture : IfxCif.h
  • IfxCif_IspMode_RawPictureWithItuRBT656Sync : IfxCif.h
  • IfxCif_IspSamplingEdge_NegativeEdge : IfxCif.h
  • IfxCif_IspSamplingEdge_PositiveEdge : IfxCif.h
  • IfxCif_IspSyncPolarity_HighActive : IfxCif.h
  • IfxCif_IspSyncPolarity_LowActive : IfxCif.h
  • IfxCif_JpeDebugSignalSources_BadTableAccess : IfxCif.h
  • IfxCif_JpeDebugSignalSources_QiqTableAccess : IfxCif.h
  • IfxCif_JpeDebugSignalSources_R2BMemoryFull : IfxCif.h
  • IfxCif_JpeDebugSignalSources_VlcEncodeBusy : IfxCif.h
  • IfxCif_JpeDebugSignalSources_VlcTableBusy : IfxCif.h
  • IfxCif_JpeDebugSignalState_Active : IfxCif.h
  • IfxCif_JpeDebugSignalState_Inactive : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically : IfxCif.h
  • IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat_400 : IfxCif.h
  • IfxCif_JpegPictureEncodingFormat_422 : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes : IfxCif.h
  • IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage : IfxCif.h
  • IfxCif_JpeHeaderMode_JfifHeader : IfxCif.h
  • IfxCif_JpeHeaderMode_NoAppnHeader : IfxCif.h
  • IfxCif_JpeInterruptSources_DcTableError : IfxCif.h
  • IfxCif_JpeInterruptSources_EncodingComplete : IfxCif.h
  • IfxCif_JpeInterruptSources_HeaderGenerationComplete : IfxCif.h
  • IfxCif_JpeInterruptSources_R2BImageSizeError : IfxCif.h
  • IfxCif_JpeInterruptSources_VlcSymbolError : IfxCif.h
  • IfxCif_JpeInterruptSources_VlcTableError : IfxCif.h
  • IfxCif_JpeQTableSelector_Table0 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table1 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table2 : IfxCif.h
  • IfxCif_JpeQTableSelector_Table3 : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_U : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_V : IfxCif.h
  • IfxCif_JpeQTableSelectorComponents_Y : IfxCif.h
  • IfxCif_JpeScalingValueSources_CbCr : IfxCif.h
  • IfxCif_JpeScalingValueSources_Y : IfxCif.h
  • IfxCif_JpeState_Busy : IfxCif.h
  • IfxCif_JpeState_Free : IfxCif.h
  • IfxCif_JpeTableId_QTable0 : IfxCif.h
  • IfxCif_JpeTableId_QTable1 : IfxCif.h
  • IfxCif_JpeTableId_QTable2 : IfxCif.h
  • IfxCif_JpeTableId_QTable3 : IfxCif.h
  • IfxCif_JpeTableId_VlcAcTable0 : IfxCif.h
  • IfxCif_JpeTableId_VlcAcTable1 : IfxCif.h
  • IfxCif_JpeTableId_VlcDcTable0 : IfxCif.h
  • IfxCif_JpeTableId_VlcDcTable1 : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_Disabled : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_DoublePass : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_DoubleSkip : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_SinglePass : IfxCif.h
  • IfxCif_LinearDownscalerScalingMode_SingleSkip : IfxCif.h
  • IfxCif_MiBurstLength_4BeatBursts : IfxCif.h
  • IfxCif_MiBurstLength_8BeatBursts : IfxCif.h
  • IfxCif_MiDataPaths_JpegData : IfxCif.h
  • IfxCif_MiDataPaths_MainPictureData : IfxCif.h
  • IfxCif_MiDataPaths_RawData : IfxCif.h
  • IfxCif_MiInterruptSources_BusError : IfxCif.h
  • IfxCif_MiInterruptSources_FillMainPictureY : IfxCif.h
  • IfxCif_MiInterruptSources_MacroBlockLine : IfxCif.h
  • IfxCif_MiInterruptSources_MainPictureFrameEnd : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureCb : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureCr : IfxCif.h
  • IfxCif_MiInterruptSources_WrapMainPictureY : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Cb : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Cr : IfxCif.h
  • IfxCif_MiMainPicturePathComponents_Y : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit : IfxCif.h
  • IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit : IfxCif.h
  • IfxCif_MiStatusClearSources_BusWriteError : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath1FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath2FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath3FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath4FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_ExtraPath5FifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureCbFifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureCrFifoFull : IfxCif.h
  • IfxCif_MiStatusClearSources_MainPictureYFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources_BusWriteError : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureCbFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureCrFifoFull : IfxCif.h
  • IfxCif_MiStatusInformationSources_MainPictureYFifoFull : IfxCif.h
  • IfxCif_PortInputSelection_PinMapping0 : IfxCif.h
  • IfxCif_PortInputSelection_PinMapping1 : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Horizontal : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Predivider : IfxCif.h
  • IfxCif_SecurityWatchdogCounters_Vertical : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters_EndStart : IfxCif.h
  • IfxCif_SecurityWatchdogTimeoutCounters_StartEnd : IfxCif.h
  • IfxCif_State_Disabled : IfxCif.h
  • IfxCif_State_Enabled : IfxCif.h
  • IfxCif_Submodules_AllModules : IfxCif.h
  • IfxCif_Submodules_Debug : IfxCif.h
  • IfxCif_Submodules_ExtraPaths : IfxCif.h
  • IfxCif_Submodules_ImageSignalProcessing : IfxCif.h
  • IfxCif_Submodules_JpegEncoder : IfxCif.h
  • IfxCif_Submodules_LinearDownscaler : IfxCif.h
  • IfxCif_Submodules_MemoryInterface : IfxCif.h
  • IfxCif_Submodules_SecurityWatchdog : IfxCif.h
  • IfxCif_Submodules_YCSplitter : IfxCif.h
  • IfxCif_YCSplitterChannelMode_Disabled : IfxCif.h
  • IfxCif_YCSplitterChannelMode_MainPathAndRawMode : IfxCif.h
  • IfxCpu_CoreMode_halt : IfxCpu.h
  • IfxCpu_CoreMode_idle : IfxCpu.h
  • IfxCpu_CoreMode_run : IfxCpu.h
  • IfxCpu_CoreMode_sleep : IfxCpu.h
  • IfxCpu_CoreMode_stby : IfxCpu.h
  • IfxCpu_CoreMode_unknown : IfxCpu.h
  • IfxCpu_CounterMode_normal : IfxCpu.h
  • IfxCpu_CounterMode_task : IfxCpu.h
  • IfxCpu_DBGST_HALT_halt : IfxCpu_cfg.h
  • IfxCpu_DBGST_HALT_run : IfxCpu_cfg.h
  • IfxCpu_Id_0 : IfxCpu_cfg.h
  • IfxCpu_Id_1 : IfxCpu_cfg.h
  • IfxCpu_Id_none : IfxCpu_cfg.h
  • IfxCpu_Index_0 : IfxCpu_cfg.h
  • IfxCpu_Index_1 : IfxCpu_cfg.h
  • IfxCpu_Index_none : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_idleMode : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_idleModeRequest : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_normalMode : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_sleepModeRequest : IfxCpu_cfg.h
  • IfxCpu_PMCSR_PMST_standbyModeRequest : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_0 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_1 : IfxCpu_cfg.h
  • IfxCpu_ResourceCpu_none : IfxCpu_cfg.h
  • IfxCpu_Trap_Assertion_Id_arithmeticOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataAccessSynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_programFetchSynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_programMemoryIntegrityError : IfxCpu_Trap.h
  • IfxCpu_Trap_Bus_Id_temporalAsynchronousError : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_assertion : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_bus : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_contextManagement : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_instructionErrors : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_internalProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_memoryManagement : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_nonMaskableInterrupt : IfxCpu_Trap.h
  • IfxCpu_Trap_Class_systemCall : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callDepthOverflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_callStackUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_contextType : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow : IfxCpu_Trap.h
  • IfxCpu_Trap_ContextManagement_Id_nestingError : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_illegalOpcode : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_invalidOperand : IfxCpu_Trap.h
  • IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite : IfxCpu_Trap.h
  • IfxCpu_Trap_InternalProtection_Id_privilegeViolation : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill : IfxCpu_Trap.h
  • IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection : IfxCpu_Trap.h
  • IfxDma_BusMasterMode_supervisor : IfxDma.h
  • IfxDma_BusMasterMode_user : IfxDma.h
  • IfxDma_ChannelBusPriority_high : IfxDma.h
  • IfxDma_ChannelBusPriority_low : IfxDma.h
  • IfxDma_ChannelBusPriority_medium : IfxDma.h
  • IfxDma_ChannelId_0 : IfxDma_cfg.h
  • IfxDma_ChannelId_1 : IfxDma_cfg.h
  • IfxDma_ChannelId_10 : IfxDma_cfg.h
  • IfxDma_ChannelId_11 : IfxDma_cfg.h
  • IfxDma_ChannelId_12 : IfxDma_cfg.h
  • IfxDma_ChannelId_13 : IfxDma_cfg.h
  • IfxDma_ChannelId_14 : IfxDma_cfg.h
  • IfxDma_ChannelId_15 : IfxDma_cfg.h
  • IfxDma_ChannelId_16 : IfxDma_cfg.h
  • IfxDma_ChannelId_17 : IfxDma_cfg.h
  • IfxDma_ChannelId_18 : IfxDma_cfg.h
  • IfxDma_ChannelId_19 : IfxDma_cfg.h
  • IfxDma_ChannelId_2 : IfxDma_cfg.h
  • IfxDma_ChannelId_20 : IfxDma_cfg.h
  • IfxDma_ChannelId_21 : IfxDma_cfg.h
  • IfxDma_ChannelId_22 : IfxDma_cfg.h
  • IfxDma_ChannelId_23 : IfxDma_cfg.h
  • IfxDma_ChannelId_24 : IfxDma_cfg.h
  • IfxDma_ChannelId_25 : IfxDma_cfg.h
  • IfxDma_ChannelId_26 : IfxDma_cfg.h
  • IfxDma_ChannelId_27 : IfxDma_cfg.h
  • IfxDma_ChannelId_28 : IfxDma_cfg.h
  • IfxDma_ChannelId_29 : IfxDma_cfg.h
  • IfxDma_ChannelId_3 : IfxDma_cfg.h
  • IfxDma_ChannelId_30 : IfxDma_cfg.h
  • IfxDma_ChannelId_31 : IfxDma_cfg.h
  • IfxDma_ChannelId_32 : IfxDma_cfg.h
  • IfxDma_ChannelId_33 : IfxDma_cfg.h
  • IfxDma_ChannelId_34 : IfxDma_cfg.h
  • IfxDma_ChannelId_35 : IfxDma_cfg.h
  • IfxDma_ChannelId_36 : IfxDma_cfg.h
  • IfxDma_ChannelId_37 : IfxDma_cfg.h
  • IfxDma_ChannelId_38 : IfxDma_cfg.h
  • IfxDma_ChannelId_39 : IfxDma_cfg.h
  • IfxDma_ChannelId_4 : IfxDma_cfg.h
  • IfxDma_ChannelId_40 : IfxDma_cfg.h
  • IfxDma_ChannelId_41 : IfxDma_cfg.h
  • IfxDma_ChannelId_42 : IfxDma_cfg.h
  • IfxDma_ChannelId_43 : IfxDma_cfg.h
  • IfxDma_ChannelId_44 : IfxDma_cfg.h
  • IfxDma_ChannelId_45 : IfxDma_cfg.h
  • IfxDma_ChannelId_46 : IfxDma_cfg.h
  • IfxDma_ChannelId_47 : IfxDma_cfg.h
  • IfxDma_ChannelId_5 : IfxDma_cfg.h
  • IfxDma_ChannelId_6 : IfxDma_cfg.h
  • IfxDma_ChannelId_7 : IfxDma_cfg.h
  • IfxDma_ChannelId_8 : IfxDma_cfg.h
  • IfxDma_ChannelId_9 : IfxDma_cfg.h
  • IfxDma_ChannelId_none : IfxDma_cfg.h
  • IfxDma_ChannelIncrementCircular_1024 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_128 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_16 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_16384 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_2 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_2048 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_256 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_32 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_32768 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_4 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_4096 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_512 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_64 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_8 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_8192 : IfxDma.h
  • IfxDma_ChannelIncrementCircular_none : IfxDma.h
  • IfxDma_ChannelIncrementDirection_negative : IfxDma.h
  • IfxDma_ChannelIncrementDirection_positive : IfxDma.h
  • IfxDma_ChannelIncrementStep_1 : IfxDma.h
  • IfxDma_ChannelIncrementStep_128 : IfxDma.h
  • IfxDma_ChannelIncrementStep_16 : IfxDma.h
  • IfxDma_ChannelIncrementStep_2 : IfxDma.h
  • IfxDma_ChannelIncrementStep_32 : IfxDma.h
  • IfxDma_ChannelIncrementStep_4 : IfxDma.h
  • IfxDma_ChannelIncrementStep_64 : IfxDma.h
  • IfxDma_ChannelIncrementStep_8 : IfxDma.h
  • IfxDma_ChannelInterruptControl_thresholdLimitMatch : IfxDma.h
  • IfxDma_ChannelInterruptControl_transferCountDecremented : IfxDma.h
  • IfxDma_ChannelMove_1 : IfxDma.h
  • IfxDma_ChannelMove_16 : IfxDma.h
  • IfxDma_ChannelMove_2 : IfxDma.h
  • IfxDma_ChannelMove_3 : IfxDma.h
  • IfxDma_ChannelMove_4 : IfxDma.h
  • IfxDma_ChannelMove_5 : IfxDma.h
  • IfxDma_ChannelMove_8 : IfxDma.h
  • IfxDma_ChannelMove_9 : IfxDma.h
  • IfxDma_ChannelMoveSize_128bit : IfxDma.h
  • IfxDma_ChannelMoveSize_16bit : IfxDma.h
  • IfxDma_ChannelMoveSize_256bit : IfxDma.h
  • IfxDma_ChannelMoveSize_32bit : IfxDma.h
  • IfxDma_ChannelMoveSize_64bit : IfxDma.h
  • IfxDma_ChannelMoveSize_8bit : IfxDma.h
  • IfxDma_ChannelOperationMode_continuous : IfxDma.h
  • IfxDma_ChannelOperationMode_single : IfxDma.h
  • IfxDma_ChannelPattern_0_disable : IfxDma.h
  • IfxDma_ChannelPattern_0_mode1 : IfxDma.h
  • IfxDma_ChannelPattern_0_mode2 : IfxDma.h
  • IfxDma_ChannelPattern_0_mode3 : IfxDma.h
  • IfxDma_ChannelPattern_1_disable : IfxDma.h
  • IfxDma_ChannelPattern_1_mode1 : IfxDma.h
  • IfxDma_ChannelPattern_1_mode2 : IfxDma.h
  • IfxDma_ChannelPattern_1_mode3 : IfxDma.h
  • IfxDma_ChannelPriority_high : IfxDma.h
  • IfxDma_ChannelPriority_low : IfxDma.h
  • IfxDma_ChannelPriority_medium : IfxDma.h
  • IfxDma_ChannelRequestMode_completeTransactionPerRequest : IfxDma.h
  • IfxDma_ChannelRequestMode_oneTransferPerRequest : IfxDma.h
  • IfxDma_ChannelRequestSource_daisyChain : IfxDma.h
  • IfxDma_ChannelRequestSource_peripheral : IfxDma.h
  • IfxDma_ChannelShadow_accumulatedLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_conditionalLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch : IfxDma.h
  • IfxDma_ChannelShadow_dst : IfxDma.h
  • IfxDma_ChannelShadow_dstDirectWrite : IfxDma.h
  • IfxDma_ChannelShadow_linkedList : IfxDma.h
  • IfxDma_ChannelShadow_none : IfxDma.h
  • IfxDma_ChannelShadow_safeLinkedList : IfxDma.h
  • IfxDma_ChannelShadow_src : IfxDma.h
  • IfxDma_ChannelShadow_srcDirectWrite : IfxDma.h
  • IfxDma_HardwareResourcePartition_0 : IfxDma.h
  • IfxDma_HardwareResourcePartition_1 : IfxDma.h
  • IfxDma_HardwareResourcePartition_2 : IfxDma.h
  • IfxDma_HardwareResourcePartition_3 : IfxDma.h
  • IfxDma_MoveEngine_0 : IfxDma.h
  • IfxDma_MoveEngine_1 : IfxDma.h
  • IfxDma_SleepMode_disable : IfxDma.h
  • IfxDma_SleepMode_enable : IfxDma.h
  • IfxDsadc_AuxCombFilterShift_noShift : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb1 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb2 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_comb3 : IfxDsadc.h
  • IfxDsadc_AuxCombFilterType_combF : IfxDsadc.h
  • IfxDsadc_AuxEvent_everyNewResult : IfxDsadc.h
  • IfxDsadc_AuxEvent_insideBoundary : IfxDsadc.h
  • IfxDsadc_AuxEvent_outsideBoundary : IfxDsadc.h
  • IfxDsadc_AuxGate_coupledToIntegrator : IfxDsadc.h
  • IfxDsadc_AuxGate_definedByESEL : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_altSource : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_auxFilter : IfxDsadc.h
  • IfxDsadc_AuxServiceRequest_never : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_sine : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_square : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_stopped : IfxDsadc.h
  • IfxDsadc_CarrierWaveformMode_triangle : IfxDsadc.h
  • IfxDsadc_ChannelId_0 : IfxDsadc.h
  • IfxDsadc_ChannelId_2 : IfxDsadc.h
  • IfxDsadc_ChannelId_3 : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_a : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_b : IfxDsadc.h
  • IfxDsadc_CommonModeVoltage_c : IfxDsadc.h
  • IfxDsadc_FirDataShift_noShift : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_FirDataShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_FirInternalShift_noShift : IfxDsadc.h
  • IfxDsadc_FirInternalShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_InputConfig_commonModeVoltage : IfxDsadc.h
  • IfxDsadc_InputConfig_inputPin : IfxDsadc.h
  • IfxDsadc_InputConfig_referenceGround : IfxDsadc.h
  • IfxDsadc_InputConfig_supplyVoltage : IfxDsadc.h
  • IfxDsadc_InputDataSource_directInputA : IfxDsadc.h
  • IfxDsadc_InputDataSource_directInputB : IfxDsadc.h
  • IfxDsadc_InputDataSource_invertedInputA : IfxDsadc.h
  • IfxDsadc_InputDataSource_invertedInputB : IfxDsadc.h
  • IfxDsadc_InputDataSource_onChipCombined : IfxDsadc.h
  • IfxDsadc_InputDataSource_onChipStandAlone : IfxDsadc.h
  • IfxDsadc_InputGain_factor1 : IfxDsadc.h
  • IfxDsadc_InputGain_factor16 : IfxDsadc.h
  • IfxDsadc_InputGain_factor2 : IfxDsadc.h
  • IfxDsadc_InputGain_factor4 : IfxDsadc.h
  • IfxDsadc_InputGain_factor8 : IfxDsadc.h
  • IfxDsadc_InputPin_a : IfxDsadc.h
  • IfxDsadc_InputPin_b : IfxDsadc.h
  • IfxDsadc_InputPin_c : IfxDsadc.h
  • IfxDsadc_InputPin_d : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize_externalControl : IfxDsadc.h
  • IfxDsadc_IntegrationWindowSize_internalControl : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_alwaysActive : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_bypassed : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_fallingEdge : IfxDsadc.h
  • IfxDsadc_IntegratorTrigger_risingEdge : IfxDsadc.h
  • IfxDsadc_LowPowerSupply_3_3V : IfxDsadc.h
  • IfxDsadc_LowPowerSupply_5V : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_noShift : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy1 : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy2 : IfxDsadc.h
  • IfxDsadc_MainCombFilterShift_shiftBy3 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb1 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb2 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_comb3 : IfxDsadc.h
  • IfxDsadc_MainCombFilterType_combF : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_everyNewResult : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_highGateSignal : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_lowGateSignal : IfxDsadc.h
  • IfxDsadc_MainServiceRequest_never : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fDSD : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fERAY : IfxDsadc.h
  • IfxDsadc_ModulatorClock_fOSC0 : IfxDsadc.h
  • IfxDsadc_ModulatorClock_off : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div10 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div12 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div14 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div16 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div18 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div2 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div20 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div22 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div24 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div26 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div28 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div30 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div32 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div4 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div6 : IfxDsadc.h
  • IfxDsadc_ModulatorClockDivider_div8 : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_externalA : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_externalB : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_nextChannel : IfxDsadc.h
  • IfxDsadc_RectifierSignSource_onChipGenerator : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputA : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputB : IfxDsadc.h
  • IfxDsadc_SampleClockSource_inputC : IfxDsadc.h
  • IfxDsadc_SampleClockSource_internal : IfxDsadc.h
  • IfxDsadc_SampleStrobe_noDataStrobe : IfxDsadc.h
  • IfxDsadc_SampleStrobe_reserved : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnBothEdges : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnFallingEdge : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnRisingEdge : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges : IfxDsadc.h
  • IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges : IfxDsadc.h
  • IfxDsadc_SleepMode_disable : IfxDsadc.h
  • IfxDsadc_SleepMode_enable : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_eachEdge : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_fallingEdge : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_noTrigger : IfxDsadc.h
  • IfxDsadc_TimestampTrigger_risingEdge : IfxDsadc.h
  • IfxDsadc_TriggerInput_a : IfxDsadc.h
  • IfxDsadc_TriggerInput_b : IfxDsadc.h
  • IfxDsadc_TriggerInput_c : IfxDsadc.h
  • IfxDsadc_TriggerInput_d : IfxDsadc.h
  • IfxDsadc_TriggerInput_e : IfxDsadc.h
  • IfxDsadc_TriggerInput_f : IfxDsadc.h
  • IfxDsadc_TriggerInput_g : IfxDsadc.h
  • IfxDsadc_TriggerInput_h : IfxDsadc.h
  • IfxEmem_LockedState_locked : IfxEmem.h
  • IfxEmem_LockedState_unlocked : IfxEmem.h
  • IfxEmem_State_disabled : IfxEmem.h
  • IfxEmem_State_enabled : IfxEmem.h
  • IfxEmem_TileConfigMode_calibMode : IfxEmem.h
  • IfxEmem_TileNumber_0 : IfxEmem.h
  • IfxEmem_TileNumber_1 : IfxEmem.h
  • IfxEmem_TileNumber_10 : IfxEmem.h
  • IfxEmem_TileNumber_11 : IfxEmem.h
  • IfxEmem_TileNumber_12 : IfxEmem.h
  • IfxEmem_TileNumber_13 : IfxEmem.h
  • IfxEmem_TileNumber_14 : IfxEmem.h
  • IfxEmem_TileNumber_15 : IfxEmem.h
  • IfxEmem_TileNumber_2 : IfxEmem.h
  • IfxEmem_TileNumber_3 : IfxEmem.h
  • IfxEmem_TileNumber_4 : IfxEmem.h
  • IfxEmem_TileNumber_5 : IfxEmem.h
  • IfxEmem_TileNumber_6 : IfxEmem.h
  • IfxEmem_TileNumber_7 : IfxEmem.h
  • IfxEmem_TileNumber_8 : IfxEmem.h
  • IfxEmem_TileNumber_9 : IfxEmem.h
  • IfxEray_Baudrate_10 : IfxEray.h
  • IfxEray_Baudrate_2_5 : IfxEray.h
  • IfxEray_Baudrate_5 : IfxEray.h
  • IfxEray_BufferDirection_receive : IfxEray.h
  • IfxEray_BufferDirection_transmit : IfxEray.h
  • IfxEray_Channel_a : IfxEray.h
  • IfxEray_Channel_b : IfxEray.h
  • IfxEray_ClearErrorFlag_ccf : IfxEray.h
  • IfxEray_ClearErrorFlag_ccl : IfxEray.h
  • IfxEray_ClearErrorFlag_cna : IfxEray.h
  • IfxEray_ClearErrorFlag_eda : IfxEray.h
  • IfxEray_ClearErrorFlag_edb : IfxEray.h
  • IfxEray_ClearErrorFlag_eerr : IfxEray.h
  • IfxEray_ClearErrorFlag_efa : IfxEray.h
  • IfxEray_ClearErrorFlag_iiba : IfxEray.h
  • IfxEray_ClearErrorFlag_ioba : IfxEray.h
  • IfxEray_ClearErrorFlag_ltva : IfxEray.h
  • IfxEray_ClearErrorFlag_ltvb : IfxEray.h
  • IfxEray_ClearErrorFlag_mhf : IfxEray.h
  • IfxEray_ClearErrorFlag_pemc : IfxEray.h
  • IfxEray_ClearErrorFlag_rfo : IfxEray.h
  • IfxEray_ClearErrorFlag_sfbm : IfxEray.h
  • IfxEray_ClearErrorFlag_sfo : IfxEray.h
  • IfxEray_ClearErrorFlag_taba : IfxEray.h
  • IfxEray_ClearErrorFlag_tabb : IfxEray.h
  • IfxEray_ClearStatusFlag_cas : IfxEray.h
  • IfxEray_ClearStatusFlag_cycs : IfxEray.h
  • IfxEray_ClearStatusFlag_mbsi : IfxEray.h
  • IfxEray_ClearStatusFlag_mtsa : IfxEray.h
  • IfxEray_ClearStatusFlag_mtsb : IfxEray.h
  • IfxEray_ClearStatusFlag_nmvc : IfxEray.h
  • IfxEray_ClearStatusFlag_rfcl : IfxEray.h
  • IfxEray_ClearStatusFlag_rfne : IfxEray.h
  • IfxEray_ClearStatusFlag_rxi : IfxEray.h
  • IfxEray_ClearStatusFlag_sds : IfxEray.h
  • IfxEray_ClearStatusFlag_sucs : IfxEray.h
  • IfxEray_ClearStatusFlag_swe : IfxEray.h
  • IfxEray_ClearStatusFlag_ti0 : IfxEray.h
  • IfxEray_ClearStatusFlag_ti1 : IfxEray.h
  • IfxEray_ClearStatusFlag_tibc : IfxEray.h
  • IfxEray_ClearStatusFlag_tobc : IfxEray.h
  • IfxEray_ClearStatusFlag_txi : IfxEray.h
  • IfxEray_ClearStatusFlag_wst : IfxEray.h
  • IfxEray_ClearStatusFlag_wupa : IfxEray.h
  • IfxEray_ClearStatusFlag_wupb : IfxEray.h
  • IfxEray_ClockDivider_1 : IfxEray.h
  • IfxEray_ClockDivider_2 : IfxEray.h
  • IfxEray_ClockDivider_3 : IfxEray.h
  • IfxEray_ClockDivider_4 : IfxEray.h
  • IfxEray_ClockDivider_5 : IfxEray.h
  • IfxEray_ClockDivider_6 : IfxEray.h
  • IfxEray_ClockDivider_7 : IfxEray.h
  • IfxEray_ClockDivider_none : IfxEray.h
  • IfxEray_ExternalOffset_correctionAdded : IfxEray.h
  • IfxEray_ExternalOffset_correctionSubtracted : IfxEray.h
  • IfxEray_ExternalOffset_noCorrection : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_0 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_1 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_2 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_3 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_4 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_5 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_6 : IfxEray.h
  • IfxEray_ExternalOffsetCorrection_7 : IfxEray.h
  • IfxEray_ExternalRate_correctionAdded : IfxEray.h
  • IfxEray_ExternalRate_correctionSubtracted : IfxEray.h
  • IfxEray_ExternalRate_noCorrection : IfxEray.h
  • IfxEray_ExternalRateCorrection_0 : IfxEray.h
  • IfxEray_ExternalRateCorrection_1 : IfxEray.h
  • IfxEray_ExternalRateCorrection_2 : IfxEray.h
  • IfxEray_ExternalRateCorrection_3 : IfxEray.h
  • IfxEray_ExternalRateCorrection_4 : IfxEray.h
  • IfxEray_ExternalRateCorrection_5 : IfxEray.h
  • IfxEray_ExternalRateCorrection_6 : IfxEray.h
  • IfxEray_ExternalRateCorrection_7 : IfxEray.h
  • IfxEray_IdleDynamicSlots_0 : IfxEray.h
  • IfxEray_IdleDynamicSlots_1 : IfxEray.h
  • IfxEray_IdleDynamicSlots_2 : IfxEray.h
  • IfxEray_Index_0 : IfxEray_cfg.h
  • IfxEray_Index_none : IfxEray_cfg.h
  • IfxEray_ListenTimeOutNoise_10 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_11 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_12 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_13 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_14 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_15 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_16 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_2 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_3 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_4 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_5 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_6 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_7 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_8 : IfxEray.h
  • IfxEray_ListenTimeOutNoise_9 : IfxEray.h
  • IfxEray_MaxSynchFrames_10 : IfxEray.h
  • IfxEray_MaxSynchFrames_11 : IfxEray.h
  • IfxEray_MaxSynchFrames_12 : IfxEray.h
  • IfxEray_MaxSynchFrames_13 : IfxEray.h
  • IfxEray_MaxSynchFrames_14 : IfxEray.h
  • IfxEray_MaxSynchFrames_15 : IfxEray.h
  • IfxEray_MaxSynchFrames_2 : IfxEray.h
  • IfxEray_MaxSynchFrames_3 : IfxEray.h
  • IfxEray_MaxSynchFrames_4 : IfxEray.h
  • IfxEray_MaxSynchFrames_5 : IfxEray.h
  • IfxEray_MaxSynchFrames_6 : IfxEray.h
  • IfxEray_MaxSynchFrames_7 : IfxEray.h
  • IfxEray_MaxSynchFrames_8 : IfxEray.h
  • IfxEray_MaxSynchFrames_9 : IfxEray.h
  • IfxEray_NodeId_a : IfxEray_cfg.h
  • IfxEray_NodeId_b : IfxEray_cfg.h
  • IfxEray_NodeId_none : IfxEray_cfg.h
  • IfxEray_PocCommand_allSlots : IfxEray.h
  • IfxEray_PocCommand_clearRam : IfxEray.h
  • IfxEray_PocCommand_coldStart : IfxEray.h
  • IfxEray_PocCommand_config : IfxEray.h
  • IfxEray_PocCommand_freeze : IfxEray.h
  • IfxEray_PocCommand_halt : IfxEray.h
  • IfxEray_PocCommand_monitor : IfxEray.h
  • IfxEray_PocCommand_notAccepted : IfxEray.h
  • IfxEray_PocCommand_ready : IfxEray.h
  • IfxEray_PocCommand_reset : IfxEray.h
  • IfxEray_PocCommand_run : IfxEray.h
  • IfxEray_PocCommand_sendMts : IfxEray.h
  • IfxEray_PocCommand_wakeup : IfxEray.h
  • IfxEray_PocState_coldStartListen : IfxEray.h
  • IfxEray_PocState_collisionResolution : IfxEray.h
  • IfxEray_PocState_config : IfxEray.h
  • IfxEray_PocState_consistencyCheck : IfxEray.h
  • IfxEray_PocState_defaultConfig : IfxEray.h
  • IfxEray_PocState_gap : IfxEray.h
  • IfxEray_PocState_halt : IfxEray.h
  • IfxEray_PocState_initializeSchedule : IfxEray.h
  • IfxEray_PocState_integrationCheck : IfxEray.h
  • IfxEray_PocState_integrationConsistencyCheck : IfxEray.h
  • IfxEray_PocState_integrationListen : IfxEray.h
  • IfxEray_PocState_join : IfxEray.h
  • IfxEray_PocState_monitor : IfxEray.h
  • IfxEray_PocState_normalActive : IfxEray.h
  • IfxEray_PocState_normalPassive : IfxEray.h
  • IfxEray_PocState_ready : IfxEray.h
  • IfxEray_PocState_startup : IfxEray.h
  • IfxEray_PocState_startupSucced : IfxEray.h
  • IfxEray_PocState_staruAborted : IfxEray.h
  • IfxEray_PocState_wakeupDetect : IfxEray.h
  • IfxEray_PocState_wakeupListen : IfxEray.h
  • IfxEray_PocState_wakeupSend : IfxEray.h
  • IfxEray_PocState_wakeupStandby : IfxEray.h
  • IfxEray_ReceiveChannel_a : IfxEray.h
  • IfxEray_ReceiveChannel_b : IfxEray.h
  • IfxEray_ReceiveChannel_both : IfxEray.h
  • IfxEray_ReceiveChannel_none : IfxEray.h
  • IfxEray_SleepMode_disable : IfxEray.h
  • IfxEray_SleepMode_enable : IfxEray.h
  • IfxEray_StrobePosition_4 : IfxEray.h
  • IfxEray_StrobePosition_5 : IfxEray.h
  • IfxEray_StrobePosition_6 : IfxEray.h
  • IfxEray_SuspendMode_hard : IfxEray.h
  • IfxEray_SuspendMode_none : IfxEray.h
  • IfxEray_SuspendMode_soft : IfxEray.h
  • IfxEray_TransmissionMode_continuous : IfxEray.h
  • IfxEray_TransmissionMode_singleShot : IfxEray.h
  • IfxEray_TransmissionSlotMode_all : IfxEray.h
  • IfxEray_TransmissionSlotMode_single : IfxEray.h
  • IfxEray_WakeupChannel_a : IfxEray.h
  • IfxEray_WakeupChannel_b : IfxEray.h
  • IfxEth_ChecksumMode_bypass : IfxEth.h
  • IfxEth_ChecksumMode_ipv4 : IfxEth.h
  • IfxEth_ChecksumMode_tcpUdpIcmpFull : IfxEth.h
  • IfxEth_ChecksumMode_tcpUdpIcmpSegment : IfxEth.h
  • IfxEth_DescriptorMode_chain : IfxEth.h
  • IfxEth_DescriptorMode_ring : IfxEth.h
  • IfxEth_PhyInterfaceMode_mii : IfxEth.h
  • IfxEth_PhyInterfaceMode_rmii : IfxEth.h
  • IfxEth_ReceiveProcessState_closing : IfxEth.h
  • IfxEth_ReceiveProcessState_fetching : IfxEth.h
  • IfxEth_ReceiveProcessState_none : IfxEth.h
  • IfxEth_ReceiveProcessState_reset : IfxEth.h
  • IfxEth_ReceiveProcessState_suspended : IfxEth.h
  • IfxEth_ReceiveProcessState_timestampWrite : IfxEth.h
  • IfxEth_ReceiveProcessState_transfering : IfxEth.h
  • IfxEth_ReceiveProcessState_waiting : IfxEth.h
  • IfxEth_RingModeBufferUsed_bothBuffers : IfxEth.h
  • IfxEth_RingModeBufferUsed_buffer1 : IfxEth.h
  • IfxEth_RingModeBufferUsed_buffer2 : IfxEth.h
  • IfxEth_TransmitProcessState_closing : IfxEth.h
  • IfxEth_TransmitProcessState_fetching : IfxEth.h
  • IfxEth_TransmitProcessState_none : IfxEth.h
  • IfxEth_TransmitProcessState_reading : IfxEth.h
  • IfxEth_TransmitProcessState_reset : IfxEth.h
  • IfxEth_TransmitProcessState_suspended : IfxEth.h
  • IfxEth_TransmitProcessState_timestampWrite : IfxEth.h
  • IfxEth_TransmitProcessState_waiting : IfxEth.h
  • IfxFce_Crc32Kernel_0 : IfxFce.h
  • IfxFce_Crc32Kernel_1 : IfxFce.h
  • IfxFce_CrcMode_16 : IfxFce.h
  • IfxFce_CrcMode_32 : IfxFce.h
  • IfxFce_CrcMode_8 : IfxFce.h
  • IfxFft_Input_complexSInt16 : IfxFft.h
  • IfxFft_Input_complexSInt32 : IfxFft.h
  • IfxFft_Input_realSInt16 : IfxFft.h
  • IfxFft_Input_realSInt32 : IfxFft.h
  • IfxFft_Length_1024 : IfxFft.h
  • IfxFft_Length_128 : IfxFft.h
  • IfxFft_Length_16 : IfxFft.h
  • IfxFft_Length_256 : IfxFft.h
  • IfxFft_Length_32 : IfxFft.h
  • IfxFft_Length_512 : IfxFft.h
  • IfxFft_Length_64 : IfxFft.h
  • IfxFft_Length_8 : IfxFft.h
  • IfxFft_Operation_fft : IfxFft.h
  • IfxFft_Operation_ifft : IfxFft.h
  • IfxFft_Output_complexSInt16 : IfxFft.h
  • IfxFft_Output_complexSInt32 : IfxFft.h
  • IfxFft_SuspendMode_hard : IfxFft.h
  • IfxFft_SuspendMode_none : IfxFft.h
  • IfxFft_SuspendMode_soft : IfxFft.h
  • IfxFlash_ErrorTracking_correctedDoubleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_correctedSingleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError : IfxFlash.h
  • IfxFlash_ErrorTracking_none : IfxFlash.h
  • IfxFlash_ErrorTracking_uncorrectableMultiBitError : IfxFlash.h
  • IfxFlash_FlashType_D0 : IfxFlash_cfg.h
  • IfxFlash_FlashType_D1 : IfxFlash_cfg.h
  • IfxFlash_FlashType_Fa : IfxFlash_cfg.h
  • IfxFlash_FlashType_P0 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P1 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P2 : IfxFlash_cfg.h
  • IfxFlash_FlashType_P3 : IfxFlash_cfg.h
  • IfxFlash_PortId_PortId_0 : IfxFlash.h
  • IfxFlash_PortId_PortId_1 : IfxFlash.h
  • IfxFlash_UcbType_ucb0 : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucb1 : IfxFlash_cfg.h
  • IfxFlash_UcbType_ucbHsmc : IfxFlash_cfg.h
  • IfxGpt12_CaptureInput_A : IfxGpt12.h
  • IfxGpt12_CaptureInput_B : IfxGpt12.h
  • IfxGpt12_CaptureInput_C : IfxGpt12.h
  • IfxGpt12_CaptureInput_D : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_none : IfxGpt12.h
  • IfxGpt12_CaptureInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CaptureTrigger_capin : IfxGpt12.h
  • IfxGpt12_CaptureTrigger_t3inOrT3EUD : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_disabled : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_fallingEdge : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_randomEdge : IfxGpt12.h
  • IfxGpt12_CaptureTriggerMode_risingEdge : IfxGpt12.h
  • IfxGpt12_CounterInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_bothEdgesTxOTL : IfxGpt12.h
  • IfxGpt12_CounterInputMode_counterDisabled : IfxGpt12.h
  • IfxGpt12_CounterInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_fallingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_CounterInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_CounterInputMode_risingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_EudInput_A : IfxGpt12.h
  • IfxGpt12_EudInput_B : IfxGpt12.h
  • IfxGpt12_EudInput_C : IfxGpt12.h
  • IfxGpt12_EudInput_D : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_16 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_32 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_4 : IfxGpt12.h
  • IfxGpt12_Gpt1BlockPrescaler_8 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_16 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_2 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_4 : IfxGpt12.h
  • IfxGpt12_Gpt2BlockPrescaler_8 : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD : IfxGpt12.h
  • IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx : IfxGpt12.h
  • IfxGpt12_Input_A : IfxGpt12.h
  • IfxGpt12_Input_B : IfxGpt12.h
  • IfxGpt12_Input_C : IfxGpt12.h
  • IfxGpt12_Input_D : IfxGpt12.h
  • IfxGpt12_Mode_capture : IfxGpt12.h
  • IfxGpt12_Mode_counter : IfxGpt12.h
  • IfxGpt12_Mode_highGatedTimer : IfxGpt12.h
  • IfxGpt12_Mode_incrementalInterfaceEdgeDetection : IfxGpt12.h
  • IfxGpt12_Mode_incrementalInterfaceRotationDetection : IfxGpt12.h
  • IfxGpt12_Mode_lowGatedTimer : IfxGpt12.h
  • IfxGpt12_Mode_reload : IfxGpt12.h
  • IfxGpt12_Mode_timer : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_bothEdgesTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_bothEdgesTxOTL : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_counterDisabled : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_fallingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_fallingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_risingEdgeTxIN : IfxGpt12.h
  • IfxGpt12_ReloadInputMode_risingEdgeTxOTL : IfxGpt12.h
  • IfxGpt12_SleepMode_disable : IfxGpt12.h
  • IfxGpt12_SleepMode_enable : IfxGpt12.h
  • IfxGpt12_SuspendMode_hard : IfxGpt12.h
  • IfxGpt12_SuspendMode_none : IfxGpt12.h
  • IfxGpt12_SuspendMode_soft : IfxGpt12.h
  • IfxGpt12_TimerDirection_down : IfxGpt12.h
  • IfxGpt12_TimerDirection_up : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource_external : IfxGpt12.h
  • IfxGpt12_TimerDirectionSource_internal : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_1 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_128 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_16 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_2 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_32 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_4 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_64 : IfxGpt12.h
  • IfxGpt12_TimerInputPrescaler_8 : IfxGpt12.h
  • IfxGpt12_TimerReloadMode_disable : IfxGpt12.h
  • IfxGpt12_TimerReloadMode_enable : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl_off : IfxGpt12.h
  • IfxGpt12_TimerRemoteControl_on : IfxGpt12.h
  • IfxGpt12_TimerRun_start : IfxGpt12.h
  • IfxGpt12_TimerRun_stop : IfxGpt12.h
  • IfxGtm_Atom_0 : IfxGtm_cfg.h
  • IfxGtm_Atom_1 : IfxGtm_cfg.h
  • IfxGtm_Atom_2 : IfxGtm_cfg.h
  • IfxGtm_Atom_3 : IfxGtm_cfg.h
  • IfxGtm_Atom_AruInput_disabled : IfxGtm_Atom.h
  • IfxGtm_Atom_AruInput_enabled : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Atom_Ch_OutputTrigger_forward : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_OutputTrigger_generate : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent_onCm0 : IfxGtm_Atom.h
  • IfxGtm_Atom_Ch_ResetEvent_onTrigger : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputCompare : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputImmediate : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputPwm : IfxGtm_Atom.h
  • IfxGtm_Atom_Mode_outputSerial : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_cancelCompare : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0Ts0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_ccu1Ts12 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_compareBoth : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcControl_compareBoth1 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_noChange : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_sl0out0 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_sl0out1 : IfxGtm_Atom.h
  • IfxGtm_Atom_SomcSignalLevelControl_toggle : IfxGtm_Atom.h
  • IfxGtm_ChXSel_a : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_b : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_c : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_d : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_e : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_f : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_g : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_h : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_i : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_j : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_k : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_l : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_m : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_n : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_o : IfxGtm_PinMap.h
  • IfxGtm_ChXSel_p : IfxGtm_PinMap.h
  • IfxGtm_Cmu_Clk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_3 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_4 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_5 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_6 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Clk_7 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Eclk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_2 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_3 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Fxclk_4 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_0 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_1 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_6 : IfxGtm_Cmu.h
  • IfxGtm_Cmu_Tim_Filter_Clk_7 : IfxGtm_Cmu.h
  • IfxGtm_Dpll_SubInc_1 : IfxGtm_cfg.h
  • IfxGtm_Dpll_SubInc_2 : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_disable : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_disabled : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_enable : IfxGtm_cfg.h
  • IfxGtm_FeatureControl_enabled : IfxGtm_cfg.h
  • IfxGtm_IrqMode_level : IfxGtm.h
  • IfxGtm_IrqMode_pulse : IfxGtm.h
  • IfxGtm_IrqMode_pulseNotify : IfxGtm.h
  • IfxGtm_IrqMode_singlePulse : IfxGtm.h
  • IfxGtm_SuspendMode_hard : IfxGtm.h
  • IfxGtm_SuspendMode_none : IfxGtm.h
  • IfxGtm_SuspendMode_soft : IfxGtm.h
  • IfxGtm_Tbu_Ts_0 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_1 : IfxGtm_Tbu.h
  • IfxGtm_Tbu_Ts_2 : IfxGtm_Tbu.h
  • IfxGtm_Tim_0 : IfxGtm_cfg.h
  • IfxGtm_Tim_1 : IfxGtm_cfg.h
  • IfxGtm_Tim_2 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Tim_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Tim_CntsSel_cntReg : IfxGtm_Tim.h
  • IfxGtm_Tim_CntsSel_tbuTs0 : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter_hold : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode_immediateEdgePropagation : IfxGtm_Tim.h
  • IfxGtm_Tim_FilterMode_individualDeglitchTime : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_cnts : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs0 : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs1 : IfxGtm_Tim.h
  • IfxGtm_Tim_GprSel_tbuTs2 : IfxGtm_Tim.h
  • IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_ConfigFilterMode_none : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_adjacentChannel : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_aux : IfxGtm_Tim_In.h
  • IfxGtm_Tim_In_Input_currentChannel : IfxGtm_Tim_In.h
  • IfxGtm_Tim_Input_adjacentChannel : IfxGtm_Tim.h
  • IfxGtm_Tim_Input_currentChannel : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_bitCompression : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_inputEvent : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_inputPrescaler : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_pulseIntegration : IfxGtm_Tim.h
  • IfxGtm_Tim_Mode_pwmMeasurement : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_bothEdge : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_disabled : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_fallingEdge : IfxGtm_Tim.h
  • IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim.h
  • IfxGtm_Tom_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_1 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_10 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_11 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_12 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_13 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_14 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_15 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_2 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_3 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_4 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_5 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_6 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_7 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_8 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_9 : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ClkSrc_noClock : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_none : IfxGtm_cfg.h
  • IfxGtm_Tom_Ch_OutputTrigger_forward : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_OutputTrigger_generate : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent_onCm0 : IfxGtm_Tom.h
  • IfxGtm_Tom_Ch_ResetEvent_onTrigger : IfxGtm_Tom.h
  • IfxGtm_Tom_Tgc_0 : IfxGtm_cfg.h
  • IfxGtm_Tom_Tgc_1 : IfxGtm_cfg.h
  • IfxGtm_ToutSel_a : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_b : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_c : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_d : IfxGtm_PinMap.h
  • IfxGtm_ToutSel_e : IfxGtm_PinMap.h
  • IfxGtm_Trig_AdcGroup_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcGroup_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrig_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_AdcTrigSource_tom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrig_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_atomX_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_DsadcTrigSource_tomX_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentGroup_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrig_0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_13 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_14 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_15 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_4 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_5 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_6 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_7 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigChannel_count : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom1 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom2 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_atom3 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_count : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom0 : IfxGtm_Trig.h
  • IfxGtm_Trig_SentTrigSource_tom1 : IfxGtm_Trig.h
  • IfxHssl_ChannelId_0 : IfxHssl.h
  • IfxHssl_ChannelId_1 : IfxHssl.h
  • IfxHssl_ChannelId_2 : IfxHssl.h
  • IfxHssl_ChannelId_3 : IfxHssl.h
  • IfxHssl_ClockFrequencyRate_10Mhz : IfxHssl.h
  • IfxHssl_ClockFrequencyRate_20Mhz : IfxHssl.h
  • IfxHssl_Command_noAction : IfxHssl.h
  • IfxHssl_Command_readFrame : IfxHssl.h
  • IfxHssl_Command_triggerFrame : IfxHssl.h
  • IfxHssl_Command_writeFrame : IfxHssl.h
  • IfxHssl_ControlCommand_disableReception : IfxHssl.h
  • IfxHssl_ControlCommand_enableReception : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedClockStart : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedClockStop : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_highSpeedTransmission : IfxHssl.h
  • IfxHssl_ControlCommand_lowSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_lowSpeedTransmission : IfxHssl.h
  • IfxHssl_ControlCommand_mediumSpeedReception : IfxHssl.h
  • IfxHssl_ControlCommand_ping : IfxHssl.h
  • IfxHssl_ControlCommand_turnOffClockTestMode : IfxHssl.h
  • IfxHssl_ControlCommand_turnOnClockTestMode : IfxHssl.h
  • IfxHssl_ControlCommand_turnOnPayloadLoopback : IfxHssl.h
  • IfxHssl_DataLength_16bit : IfxHssl.h
  • IfxHssl_DataLength_32bit : IfxHssl.h
  • IfxHssl_DataLength_8bit : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_commandError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_headerError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_payloadError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_pingAnswerReceived : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_pllLockLosterror : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_speedModeSwitchError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_txTransferError : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived : IfxHssl.h
  • IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished : IfxHssl.h
  • IfxHssl_Hsct_SleepMode_disable : IfxHssl.h
  • IfxHssl_Hsct_SleepMode_enable : IfxHssl.h
  • IfxHssl_hsctIndex_0 : IfxHssl_cfg.h
  • IfxHssl_hsctIndex_none : IfxHssl_cfg.h
  • IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_timeoutError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_transactionTagError : IfxHssl.h
  • IfxHssl_Hssl_ERRInterruptSource_unexpectedError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_busAccessError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_crcError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_dataLengthError : IfxHssl.h
  • IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation : IfxHssl.h
  • IfxHssl_Hssl_FrameRequest_noAction : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_readFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_readId : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_triggerFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_FrameRequest_writeFrame : IfxHssl_Hssl.h
  • IfxHssl_Hssl_SleepMode_disable : IfxHssl.h
  • IfxHssl_Hssl_SleepMode_enable : IfxHssl.h
  • IfxHssl_Hssl_Status_busy : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_error : IfxHssl_Hssl.h
  • IfxHssl_Hssl_Status_ok : IfxHssl_Hssl.h
  • IfxHssl_hsslIndex_0 : IfxHssl_cfg.h
  • IfxHssl_hsslIndex_none : IfxHssl_cfg.h
  • IfxHssl_InterfaceMode_master : IfxHssl.h
  • IfxHssl_InterfaceMode_slave : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_highSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_lowSpeed : IfxHssl.h
  • IfxHssl_MasterModeRxSpeed_mediumSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed_highSpeed : IfxHssl.h
  • IfxHssl_MasterModeTxSpeed_lowSpeed : IfxHssl.h
  • IfxHssl_PllReferenceClock_hsctSystemClockInput : IfxHssl.h
  • IfxHssl_PllReferenceClock_oscillatorInput : IfxHssl.h
  • IfxHssl_StreamingMode_continuous : IfxHssl.h
  • IfxHssl_StreamingMode_single : IfxHssl.h
  • IfxHssl_SuspendMode_hard : IfxHssl.h
  • IfxHssl_SuspendMode_none : IfxHssl.h
  • IfxHssl_SuspendMode_soft : IfxHssl.h
  • IfxI2c_BusStatus_busyMaster : IfxI2c.h
  • IfxI2c_BusStatus_idle : IfxI2c.h
  • IfxI2c_BusStatus_remoteSlave : IfxI2c.h
  • IfxI2c_BusStatus_started : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_rxFifoOverflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_rxFifoUnderflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_txFifoOverflow : IfxI2c.h
  • IfxI2c_ErrorInterruptSource_txFifoUnderflow : IfxI2c.h
  • IfxI2c_I2c_Status_al : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_busNotFree : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_error : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_nak : IfxI2c_I2c.h
  • IfxI2c_I2c_Status_ok : IfxI2c_I2c.h
  • IfxI2c_Index_0 : IfxI2c_cfg.h
  • IfxI2c_Index_none : IfxI2c_cfg.h
  • IfxI2c_PinSelect_a : IfxI2c.h
  • IfxI2c_PinSelect_b : IfxI2c.h
  • IfxI2c_PinSelect_c : IfxI2c.h
  • IfxI2c_PinSelect_d : IfxI2c.h
  • IfxI2c_PinSelect_e : IfxI2c.h
  • IfxI2c_PinSelect_f : IfxI2c.h
  • IfxI2c_PinSelect_g : IfxI2c.h
  • IfxI2c_PinSelect_h : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_addressMatch : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_arbitrationLost : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_generalCall : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_masterCode : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_receiveMode : IfxI2c.h
  • IfxI2c_ProtocolInterruptSource_transmissionEnd : IfxI2c.h
  • IfxI2c_SleepMode_disable : IfxI2c.h
  • IfxI2c_SleepMode_enable : IfxI2c.h
  • IfxIom_LamEventSource_mon : IfxIom.h
  • IfxIom_LamEventSource_monXorRef : IfxIom.h
  • IfxIom_LamEventTrigger_anyEdge : IfxIom.h
  • IfxIom_LamEventTrigger_fallingEdge : IfxIom.h
  • IfxIom_LamEventTrigger_none : IfxIom.h
  • IfxIom_LamEventTrigger_risingEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_anyEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_fallingEdge : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_none : IfxIom.h
  • IfxIom_LamEventWindowClearEvent_risingEdge : IfxIom.h
  • IfxIom_LamEventWindowControlSource_mon : IfxIom.h
  • IfxIom_LamEventWindowControlSource_ref : IfxIom.h
  • IfxIom_LamEventWindowRunControl_freeRunning : IfxIom.h
  • IfxIom_LamEventWindowRunControl_gated : IfxIom.h
  • IfxIom_LamFilterMode_delayDebounceBothEdge : IfxIom.h
  • IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceBothEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceRisingEdge : IfxIom.h
  • IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_noFilter : IfxIom.h
  • IfxIom_LamFilterMode_prescalerOnFallingEdge : IfxIom.h
  • IfxIom_LamFilterMode_prescalerOnRisingEdge : IfxIom.h
  • IfxIom_LamId_0 : IfxIom.h
  • IfxIom_LamId_1 : IfxIom.h
  • IfxIom_LamId_10 : IfxIom.h
  • IfxIom_LamId_11 : IfxIom.h
  • IfxIom_LamId_12 : IfxIom.h
  • IfxIom_LamId_13 : IfxIom.h
  • IfxIom_LamId_14 : IfxIom.h
  • IfxIom_LamId_15 : IfxIom.h
  • IfxIom_LamId_2 : IfxIom.h
  • IfxIom_LamId_3 : IfxIom.h
  • IfxIom_LamId_4 : IfxIom.h
  • IfxIom_LamId_5 : IfxIom.h
  • IfxIom_LamId_6 : IfxIom.h
  • IfxIom_LamId_7 : IfxIom.h
  • IfxIom_LamId_8 : IfxIom.h
  • IfxIom_LamId_9 : IfxIom.h
  • IfxIom_MonInput_asclin0Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin1Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin2Atx : IfxIom_cfg.h
  • IfxIom_MonInput_asclin3Atx : IfxIom_cfg.h
  • IfxIom_MonInput_canNode0Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode1Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode2Txd : IfxIom_cfg.h
  • IfxIom_MonInput_canNode3Txd : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cc62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu60Cout63 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cc62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout60 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout61 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout62 : IfxIom_cfg.h
  • IfxIom_MonInput_ccu61Cout63 : IfxIom_cfg.h
  • IfxIom_MonInput_gnd : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout104 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout105 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout106 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout22 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout23 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout24 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout25 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout26 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout27 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout28 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout29 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout30 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout31 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout32 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout33 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout34 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout68 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout69 : IfxIom_cfg.h
  • IfxIom_MonInput_gtmTout70 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_12 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_13 : IfxIom_cfg.h
  • IfxIom_MonInput_p20_14 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_0 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_1 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_10 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_11 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_12 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_2 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_3 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_4 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_5 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_6 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_7 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_8 : IfxIom_cfg.h
  • IfxIom_MonInput_p33_9 : IfxIom_cfg.h
  • IfxIom_MonInput_psi5Psitx0 : IfxIom_cfg.h
  • IfxIom_MonInput_psi5Psitx1 : IfxIom_cfg.h
  • IfxIom_MonInput_qspi0Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi1Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi2Mrst : IfxIom_cfg.h
  • IfxIom_MonInput_qspi3Mrst : IfxIom_cfg.h
  • IfxIom_MonInputSignal_0 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_1 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_2 : IfxIom_cfg.h
  • IfxIom_MonInputSignal_p : IfxIom_cfg.h
  • IfxIom_RefInput_asclin0Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin1Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin2Atx : IfxIom_cfg.h
  • IfxIom_RefInput_asclin3Atx : IfxIom_cfg.h
  • IfxIom_RefInput_canNode0Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode1Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode2Txd : IfxIom_cfg.h
  • IfxIom_RefInput_canNode3Txd : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cc62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu60Cout63 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cc62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout60 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout61 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout62 : IfxIom_cfg.h
  • IfxIom_RefInput_ccu61Cout63 : IfxIom_cfg.h
  • IfxIom_RefInput_exorCombiner : IfxIom_cfg.h
  • IfxIom_RefInput_gnd : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout0 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout1 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout10 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout107 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout108 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout109 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout11 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout12 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout13 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout14 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout15 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout2 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout3 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout4 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout5 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout6 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout7 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout8 : IfxIom_cfg.h
  • IfxIom_RefInput_gtmTout9 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_12 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_13 : IfxIom_cfg.h
  • IfxIom_RefInput_p20_14 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_0 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_1 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_10 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_11 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_12 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_2 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_3 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_4 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_5 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_6 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_7 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_8 : IfxIom_cfg.h
  • IfxIom_RefInput_p33_9 : IfxIom_cfg.h
  • IfxIom_RefInput_psi5Psitx0 : IfxIom_cfg.h
  • IfxIom_RefInput_psi5Psitx2 : IfxIom_cfg.h
  • IfxIom_RefInput_qspi0Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi1Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi2Mrst : IfxIom_cfg.h
  • IfxIom_RefInput_qspi3Mrst : IfxIom_cfg.h
  • IfxIom_RefInputSignal_0 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_1 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_2 : IfxIom_cfg.h
  • IfxIom_RefInputSignal_p : IfxIom_cfg.h
  • IfxIom_RefInputSignal_xorCombiner : IfxIom_cfg.h
  • IfxIom_SleepMode_disable : IfxIom.h
  • IfxIom_SleepMode_enable : IfxIom.h
  • IfxMsc_ActivePhaseSelection_lowLevel : IfxMsc.h
  • IfxMsc_ActivePhaseSelection_none : IfxMsc.h
  • IfxMsc_AsynchronousBlock_bypassed : IfxMsc.h
  • IfxMsc_AsynchronousBlock_noBypassed : IfxMsc.h
  • IfxMsc_ChipSelectActiveState_high : IfxMsc.h
  • IfxMsc_ChipSelectActiveState_low : IfxMsc.h
  • IfxMsc_ClockSelect_feray : IfxMsc.h
  • IfxMsc_ClockSelect_fspb : IfxMsc.h
  • IfxMsc_ClockSelect_fsri : IfxMsc.h
  • IfxMsc_ClockSelect_noClock : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode_disabled : IfxMsc.h
  • IfxMsc_CommandDataCommandRepetitionMode_enabled : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_CommandFrameInterrupt_enabled : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_CommandFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_CommandFrameLength_0 : IfxMsc.h
  • IfxMsc_CommandFrameLength_1 : IfxMsc.h
  • IfxMsc_CommandFrameLength_10 : IfxMsc.h
  • IfxMsc_CommandFrameLength_11 : IfxMsc.h
  • IfxMsc_CommandFrameLength_12 : IfxMsc.h
  • IfxMsc_CommandFrameLength_13 : IfxMsc.h
  • IfxMsc_CommandFrameLength_14 : IfxMsc.h
  • IfxMsc_CommandFrameLength_15 : IfxMsc.h
  • IfxMsc_CommandFrameLength_16 : IfxMsc.h
  • IfxMsc_CommandFrameLength_17 : IfxMsc.h
  • IfxMsc_CommandFrameLength_18 : IfxMsc.h
  • IfxMsc_CommandFrameLength_19 : IfxMsc.h
  • IfxMsc_CommandFrameLength_2 : IfxMsc.h
  • IfxMsc_CommandFrameLength_20 : IfxMsc.h
  • IfxMsc_CommandFrameLength_21 : IfxMsc.h
  • IfxMsc_CommandFrameLength_22 : IfxMsc.h
  • IfxMsc_CommandFrameLength_23 : IfxMsc.h
  • IfxMsc_CommandFrameLength_24 : IfxMsc.h
  • IfxMsc_CommandFrameLength_25 : IfxMsc.h
  • IfxMsc_CommandFrameLength_26 : IfxMsc.h
  • IfxMsc_CommandFrameLength_27 : IfxMsc.h
  • IfxMsc_CommandFrameLength_28 : IfxMsc.h
  • IfxMsc_CommandFrameLength_29 : IfxMsc.h
  • IfxMsc_CommandFrameLength_3 : IfxMsc.h
  • IfxMsc_CommandFrameLength_30 : IfxMsc.h
  • IfxMsc_CommandFrameLength_31 : IfxMsc.h
  • IfxMsc_CommandFrameLength_32 : IfxMsc.h
  • IfxMsc_CommandFrameLength_4 : IfxMsc.h
  • IfxMsc_CommandFrameLength_5 : IfxMsc.h
  • IfxMsc_CommandFrameLength_6 : IfxMsc.h
  • IfxMsc_CommandFrameLength_7 : IfxMsc.h
  • IfxMsc_CommandFrameLength_8 : IfxMsc.h
  • IfxMsc_CommandFrameLength_9 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_0 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_1 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_10 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_100 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_101 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_102 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_103 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_104 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_105 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_106 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_107 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_108 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_109 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_11 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_110 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_111 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_112 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_113 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_114 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_115 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_116 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_117 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_118 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_119 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_12 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_120 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_121 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_122 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_123 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_124 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_125 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_126 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_127 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_13 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_14 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_15 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_16 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_17 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_18 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_19 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_20 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_21 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_22 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_23 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_24 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_25 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_26 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_27 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_28 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_29 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_30 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_31 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_32 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_33 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_34 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_35 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_36 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_37 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_38 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_39 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_4 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_40 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_41 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_42 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_43 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_44 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_45 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_46 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_47 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_48 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_49 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_5 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_50 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_51 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_52 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_53 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_54 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_55 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_56 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_57 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_58 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_59 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_6 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_60 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_61 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_62 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_63 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_64 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_65 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_66 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_67 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_68 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_69 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_7 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_70 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_71 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_72 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_73 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_74 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_75 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_76 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_77 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_78 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_79 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_8 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_80 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_81 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_82 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_83 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_84 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_85 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_86 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_87 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_88 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_89 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_9 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_90 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_91 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_92 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_93 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_94 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_95 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_96 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_97 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_98 : IfxMsc.h
  • IfxMsc_ControlFrameExtensionPassivePhaseLength_99 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_0 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_1 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_DataFrameExtensionPassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_atFirstDataBit : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_atLastDataBit : IfxMsc.h
  • IfxMsc_DataFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_DataFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_DataFrameLength_0 : IfxMsc.h
  • IfxMsc_DataFrameLength_1 : IfxMsc.h
  • IfxMsc_DataFrameLength_10 : IfxMsc.h
  • IfxMsc_DataFrameLength_11 : IfxMsc.h
  • IfxMsc_DataFrameLength_12 : IfxMsc.h
  • IfxMsc_DataFrameLength_13 : IfxMsc.h
  • IfxMsc_DataFrameLength_14 : IfxMsc.h
  • IfxMsc_DataFrameLength_15 : IfxMsc.h
  • IfxMsc_DataFrameLength_16 : IfxMsc.h
  • IfxMsc_DataFrameLength_2 : IfxMsc.h
  • IfxMsc_DataFrameLength_3 : IfxMsc.h
  • IfxMsc_DataFrameLength_4 : IfxMsc.h
  • IfxMsc_DataFrameLength_5 : IfxMsc.h
  • IfxMsc_DataFrameLength_6 : IfxMsc.h
  • IfxMsc_DataFrameLength_7 : IfxMsc.h
  • IfxMsc_DataFrameLength_8 : IfxMsc.h
  • IfxMsc_DataFrameLength_9 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_10 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_11 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_12 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_13 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_14 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_15 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_16 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_17 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_18 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_19 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_2 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_20 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_21 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_22 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_23 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_24 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_25 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_26 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_27 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_28 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_29 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_3 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_30 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_31 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_32 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_4 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_5 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_6 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_7 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_8 : IfxMsc.h
  • IfxMsc_DataFramePassivePhaseLength_9 : IfxMsc.h
  • IfxMsc_DividerMode_fractional : IfxMsc.h
  • IfxMsc_DividerMode_normal : IfxMsc.h
  • IfxMsc_EmergencyStop_disabled : IfxMsc.h
  • IfxMsc_EmergencyStop_enabled : IfxMsc.h
  • IfxMsc_Extension_disabled : IfxMsc.h
  • IfxMsc_Extension_enabled : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_0 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_1 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_10 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_11 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_12 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_13 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_14 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_15 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_16 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_17 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_18 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_19 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_2 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_20 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_21 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_22 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_23 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_24 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_25 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_26 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_27 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_28 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_29 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_3 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_30 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_31 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_32 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_33 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_34 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_35 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_36 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_37 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_38 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_39 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_4 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_40 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_41 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_42 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_43 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_44 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_45 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_46 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_47 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_48 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_49 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_5 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_50 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_51 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_52 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_53 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_54 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_55 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_56 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_57 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_58 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_59 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_6 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_60 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_61 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_62 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_63 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_7 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_8 : IfxMsc.h
  • IfxMsc_ExternalBitInjectionPosition_9 : IfxMsc.h
  • IfxMsc_ExternalSignalInjection_disabled : IfxMsc.h
  • IfxMsc_ExternalSignalInjection_enabled : IfxMsc.h
  • IfxMsc_FclClockControlEnabled_activePhaseOnly : IfxMsc.h
  • IfxMsc_FclClockControlEnabled_always : IfxMsc.h
  • IfxMsc_FclLinePolarity_inverted : IfxMsc.h
  • IfxMsc_FclLinePolarity_nonInverted : IfxMsc.h
  • IfxMsc_HardwareClock_disabled : IfxMsc.h
  • IfxMsc_HardwareClock_enabled : IfxMsc.h
  • IfxMsc_Index_0 : IfxMsc_cfg.h
  • IfxMsc_Index_1 : IfxMsc_cfg.h
  • IfxMsc_Index_none : IfxMsc_cfg.h
  • IfxMsc_InterruptServiceRequest_0 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_1 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_2 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_3 : IfxMsc.h
  • IfxMsc_InterruptServiceRequest_4 : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_hardSuspend : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_noSuspend : IfxMsc.h
  • IfxMsc_ModuleSuspendRequestBit_softSuspend : IfxMsc.h
  • IfxMsc_MsbBitDataExtension_notPresent : IfxMsc.h
  • IfxMsc_MsbBitDataExtension_present : IfxMsc.h
  • IfxMsc_Msc_Target_high : IfxMsc_Msc.h
  • IfxMsc_Msc_Target_low : IfxMsc_Msc.h
  • IfxMsc_NDividerAbra_1 : IfxMsc.h
  • IfxMsc_NDividerAbra_2 : IfxMsc.h
  • IfxMsc_NDividerAbra_3 : IfxMsc.h
  • IfxMsc_NDividerAbra_4 : IfxMsc.h
  • IfxMsc_NDividerAbra_5 : IfxMsc.h
  • IfxMsc_NDividerAbra_6 : IfxMsc.h
  • IfxMsc_NDividerAbra_7 : IfxMsc.h
  • IfxMsc_NDividerAbra_8 : IfxMsc.h
  • IfxMsc_NDividerDownstream_1 : IfxMsc.h
  • IfxMsc_NDividerDownstream_10 : IfxMsc.h
  • IfxMsc_NDividerDownstream_11 : IfxMsc.h
  • IfxMsc_NDividerDownstream_12 : IfxMsc.h
  • IfxMsc_NDividerDownstream_13 : IfxMsc.h
  • IfxMsc_NDividerDownstream_14 : IfxMsc.h
  • IfxMsc_NDividerDownstream_15 : IfxMsc.h
  • IfxMsc_NDividerDownstream_16 : IfxMsc.h
  • IfxMsc_NDividerDownstream_2 : IfxMsc.h
  • IfxMsc_NDividerDownstream_3 : IfxMsc.h
  • IfxMsc_NDividerDownstream_4 : IfxMsc.h
  • IfxMsc_NDividerDownstream_5 : IfxMsc.h
  • IfxMsc_NDividerDownstream_6 : IfxMsc.h
  • IfxMsc_NDividerDownstream_7 : IfxMsc.h
  • IfxMsc_NDividerDownstream_8 : IfxMsc.h
  • IfxMsc_NDividerDownstream_9 : IfxMsc.h
  • IfxMsc_OverflowInterrupt_disabled : IfxMsc.h
  • IfxMsc_OverflowInterrupt_enabled : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_OverflowInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_Parity_even : IfxMsc.h
  • IfxMsc_Parity_odd : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_0 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_1 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_10 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_11 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_12 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_13 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_14 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_15 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_2 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_3 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_4 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_5 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_6 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_7 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_8 : IfxMsc.h
  • IfxMsc_PassiveTimeFrameCount_9 : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_disabled : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onDataReceive : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 : IfxMsc.h
  • IfxMsc_ReceiveDataInterrupt_onRdieSet : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_ReceiveDataInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_SdiLinePolarity_invertedSi : IfxMsc.h
  • IfxMsc_SdiLinePolarity_likeSi : IfxMsc.h
  • IfxMsc_SerialDataInput_0 : IfxMsc.h
  • IfxMsc_SerialDataInput_1 : IfxMsc.h
  • IfxMsc_SerialDataInput_2 : IfxMsc.h
  • IfxMsc_SerialDataInput_3 : IfxMsc.h
  • IfxMsc_SerialDataInput_4 : IfxMsc.h
  • IfxMsc_SerialDataInput_5 : IfxMsc.h
  • IfxMsc_SerialDataInput_6 : IfxMsc.h
  • IfxMsc_SerialDataInput_7 : IfxMsc.h
  • IfxMsc_ServiceRequestDelay_1bit : IfxMsc.h
  • IfxMsc_ServiceRequestDelay_noDelay : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_1 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_10 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_11 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_12 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_13 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_14 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_15 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_16 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_2 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_3 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_4 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_5 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_6 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_7 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_8 : IfxMsc.h
  • IfxMsc_ShiftClockPhaseDuration_9 : IfxMsc.h
  • IfxMsc_SleepMode_disable : IfxMsc.h
  • IfxMsc_SleepMode_enable : IfxMsc.h
  • IfxMsc_SoLinePolarity_inverted : IfxMsc.h
  • IfxMsc_SoLinePolarity_nonInverted : IfxMsc.h
  • IfxMsc_Source_alternateInputLine : IfxMsc.h
  • IfxMsc_Source_alternateInputLineInverted : IfxMsc.h
  • IfxMsc_Source_downstreamDataRegister : IfxMsc.h
  • IfxMsc_SuspendMode_hard : IfxMsc.h
  • IfxMsc_SuspendMode_none : IfxMsc.h
  • IfxMsc_SuspendMode_soft : IfxMsc.h
  • IfxMsc_Target_en0 : IfxMsc.h
  • IfxMsc_Target_en1 : IfxMsc.h
  • IfxMsc_Target_en2 : IfxMsc.h
  • IfxMsc_Target_en3 : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt_disabled : IfxMsc.h
  • IfxMsc_TimeFrameInterrupt_enabled : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_TimeFrameInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_TransmissionMode_dataRepetition : IfxMsc.h
  • IfxMsc_TransmissionMode_triggered : IfxMsc.h
  • IfxMsc_UnderflowInterrupt_disabled : IfxMsc.h
  • IfxMsc_UnderflowInterrupt_enabled : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_UnderflowInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType_12bit : IfxMsc.h
  • IfxMsc_UpstreamChannelFrameType_16bit : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_128 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_16 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_256 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_32 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_4 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_64 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_8 : IfxMsc.h
  • IfxMsc_UpstreamChannelReceivingRate_disabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt_disabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterrupt_enabled : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR0 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR3 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutInterruptNode_SR4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_1024 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_128 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_16 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_16384 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_2048 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_256 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_32 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_32768 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_4096 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_512 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_64 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_8 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutPrescaler_8192 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_1 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_10 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_11 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_12 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_13 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_14 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_15 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_16 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_2 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_3 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_4 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_5 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_6 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_7 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_8 : IfxMsc.h
  • IfxMsc_UpstreamTimeoutValue_9 : IfxMsc.h
  • IfxMtu_MbistSel_cifCif : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cifJpeg1_4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cifJpeg3 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu0Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Dtag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Pspr : IfxMtu_cfg.h
  • IfxMtu_MbistSel_cpu1Ptag : IfxMtu_cfg.h
  • IfxMtu_MbistSel_dma : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem2 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem3 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem5 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem6 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_emem7 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ememXtm0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ememXtm1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayIbfTbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayMbf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_erayObf : IfxMtu_cfg.h
  • IfxMtu_MbistSel_ethermac : IfxMtu_cfg.h
  • IfxMtu_MbistSel_fft0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_fft1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll1a : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll1b : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmDpll2 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmFifo : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs0 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_gtmMcs1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcan : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mcds : IfxMtu_cfg.h
  • IfxMtu_MbistSel_mod4 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_none : IfxMtu_cfg.h
  • IfxMtu_MbistSel_psi5 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_stdbyRam1 : IfxMtu_cfg.h
  • IfxMtu_MbistSel_stdbyRam2 : IfxMtu_cfg.h
  • IfxMultican_ClockSelect_fclc : IfxMultican.h
  • IfxMultican_ClockSelect_fErayPll : IfxMultican.h
  • IfxMultican_ClockSelect_fosc0 : IfxMultican.h
  • IfxMultican_ClockSelect_noClock : IfxMultican.h
  • IfxMultican_DataLengthCode_0 : IfxMultican.h
  • IfxMultican_DataLengthCode_1 : IfxMultican.h
  • IfxMultican_DataLengthCode_12 : IfxMultican.h
  • IfxMultican_DataLengthCode_16 : IfxMultican.h
  • IfxMultican_DataLengthCode_2 : IfxMultican.h
  • IfxMultican_DataLengthCode_20 : IfxMultican.h
  • IfxMultican_DataLengthCode_24 : IfxMultican.h
  • IfxMultican_DataLengthCode_3 : IfxMultican.h
  • IfxMultican_DataLengthCode_32 : IfxMultican.h
  • IfxMultican_DataLengthCode_4 : IfxMultican.h
  • IfxMultican_DataLengthCode_48 : IfxMultican.h
  • IfxMultican_DataLengthCode_5 : IfxMultican.h
  • IfxMultican_DataLengthCode_6 : IfxMultican.h
  • IfxMultican_DataLengthCode_64 : IfxMultican.h
  • IfxMultican_DataLengthCode_7 : IfxMultican.h
  • IfxMultican_DataLengthCode_8 : IfxMultican.h
  • IfxMultican_Frame_receive : IfxMultican.h
  • IfxMultican_Frame_remoteAnswer : IfxMultican.h
  • IfxMultican_Frame_remoteRequest : IfxMultican.h
  • IfxMultican_Frame_transmit : IfxMultican.h
  • IfxMultican_FrameCounterMode_bitTimingMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_errorCountMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_frameCountMode : IfxMultican.h
  • IfxMultican_FrameCounterMode_timeStampMode : IfxMultican.h
  • IfxMultican_Index_0 : IfxMultican_cfg.h
  • IfxMultican_Index_none : IfxMultican_cfg.h
  • IfxMultican_MsgObjGroup_0 : IfxMultican.h
  • IfxMultican_MsgObjGroup_1 : IfxMultican.h
  • IfxMultican_MsgObjGroup_2 : IfxMultican.h
  • IfxMultican_MsgObjGroup_3 : IfxMultican.h
  • IfxMultican_MsgObjGroup_4 : IfxMultican.h
  • IfxMultican_MsgObjGroup_5 : IfxMultican.h
  • IfxMultican_MsgObjGroup_6 : IfxMultican.h
  • IfxMultican_MsgObjGroup_7 : IfxMultican.h
  • IfxMultican_MsgObjMode_canFD64 : IfxMultican.h
  • IfxMultican_MsgObjMode_gatewaySource : IfxMultican.h
  • IfxMultican_MsgObjMode_receiveFifoBase : IfxMultican.h
  • IfxMultican_MsgObjMode_standard : IfxMultican.h
  • IfxMultican_MsgObjMode_transmitFifoBase : IfxMultican.h
  • IfxMultican_MsgObjMode_transmitFifoSlave : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageDirection : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageLost : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_messageValid : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_newData : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveEnable : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receivePending : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveTransmitSelected : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_receiveUpdating : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitEnable0 : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitEnable1 : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitPending : IfxMultican.h
  • IfxMultican_MsgObjStatusFlag_transmitRequest : IfxMultican.h
  • IfxMultican_NodeId_0 : IfxMultican_cfg.h
  • IfxMultican_NodeId_1 : IfxMultican_cfg.h
  • IfxMultican_NodeId_2 : IfxMultican_cfg.h
  • IfxMultican_NodeId_3 : IfxMultican_cfg.h
  • IfxMultican_NodeId_none : IfxMultican_cfg.h
  • IfxMultican_Priority_CAN_ID : IfxMultican.h
  • IfxMultican_Priority_ListOrder : IfxMultican.h
  • IfxMultican_SleepMode_disable : IfxMultican.h
  • IfxMultican_SleepMode_enable : IfxMultican.h
  • IfxMultican_SrcId_0 : IfxMultican_cfg.h
  • IfxMultican_SrcId_1 : IfxMultican_cfg.h
  • IfxMultican_SrcId_10 : IfxMultican_cfg.h
  • IfxMultican_SrcId_11 : IfxMultican_cfg.h
  • IfxMultican_SrcId_12 : IfxMultican_cfg.h
  • IfxMultican_SrcId_13 : IfxMultican_cfg.h
  • IfxMultican_SrcId_14 : IfxMultican_cfg.h
  • IfxMultican_SrcId_15 : IfxMultican_cfg.h
  • IfxMultican_SrcId_2 : IfxMultican_cfg.h
  • IfxMultican_SrcId_3 : IfxMultican_cfg.h
  • IfxMultican_SrcId_4 : IfxMultican_cfg.h
  • IfxMultican_SrcId_5 : IfxMultican_cfg.h
  • IfxMultican_SrcId_6 : IfxMultican_cfg.h
  • IfxMultican_SrcId_7 : IfxMultican_cfg.h
  • IfxMultican_SrcId_8 : IfxMultican_cfg.h
  • IfxMultican_SrcId_9 : IfxMultican_cfg.h
  • IfxMultican_Status_busHeavy : IfxMultican.h
  • IfxMultican_Status_busOff : IfxMultican.h
  • IfxMultican_Status_messageLost : IfxMultican.h
  • IfxMultican_Status_newData : IfxMultican.h
  • IfxMultican_Status_newDataButOneLost : IfxMultican.h
  • IfxMultican_Status_notInitialised : IfxMultican.h
  • IfxMultican_Status_notSentBusy : IfxMultican.h
  • IfxMultican_Status_ok : IfxMultican.h
  • IfxMultican_Status_receiveEmpty : IfxMultican.h
  • IfxMultican_Status_wrongParam : IfxMultican.h
  • IfxMultican_Status_wrongPin : IfxMultican.h
  • IfxMultican_SuspendMode_hard : IfxMultican.h
  • IfxMultican_SuspendMode_none : IfxMultican.h
  • IfxMultican_SuspendMode_soft : IfxMultican.h
  • IfxPort_ControlledBy_hsct : IfxPort.h
  • IfxPort_ControlledBy_port : IfxPort.h
  • IfxPort_Index_00 : IfxPort_cfg.h
  • IfxPort_Index_02 : IfxPort_cfg.h
  • IfxPort_Index_10 : IfxPort_cfg.h
  • IfxPort_Index_11 : IfxPort_cfg.h
  • IfxPort_Index_13 : IfxPort_cfg.h
  • IfxPort_Index_14 : IfxPort_cfg.h
  • IfxPort_Index_15 : IfxPort_cfg.h
  • IfxPort_Index_20 : IfxPort_cfg.h
  • IfxPort_Index_21 : IfxPort_cfg.h
  • IfxPort_Index_22 : IfxPort_cfg.h
  • IfxPort_Index_23 : IfxPort_cfg.h
  • IfxPort_Index_32 : IfxPort_cfg.h
  • IfxPort_Index_33 : IfxPort_cfg.h
  • IfxPort_Index_none : IfxPort_cfg.h
  • IfxPort_InputMode_noPullDevice : IfxPort.h
  • IfxPort_InputMode_pullDown : IfxPort.h
  • IfxPort_InputMode_pullUp : IfxPort.h
  • IfxPort_InputMode_undefined : IfxPort.h
  • IfxPort_Mode_inputNoPullDevice : IfxPort.h
  • IfxPort_Mode_inputPullDown : IfxPort.h
  • IfxPort_Mode_inputPullUp : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt1 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt2 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt3 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt4 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt5 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt6 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainAlt7 : IfxPort.h
  • IfxPort_Mode_outputOpenDrainGeneral : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt1 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt2 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt3 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt4 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt5 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt6 : IfxPort.h
  • IfxPort_Mode_outputPushPullAlt7 : IfxPort.h
  • IfxPort_Mode_outputPushPullGeneral : IfxPort.h
  • IfxPort_OutputIdx_alt1 : IfxPort.h
  • IfxPort_OutputIdx_alt2 : IfxPort.h
  • IfxPort_OutputIdx_alt3 : IfxPort.h
  • IfxPort_OutputIdx_alt4 : IfxPort.h
  • IfxPort_OutputIdx_alt5 : IfxPort.h
  • IfxPort_OutputIdx_alt6 : IfxPort.h
  • IfxPort_OutputIdx_alt7 : IfxPort.h
  • IfxPort_OutputIdx_general : IfxPort.h
  • IfxPort_OutputMode_openDrain : IfxPort.h
  • IfxPort_OutputMode_pushPull : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed1 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed2 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed3 : IfxPort.h
  • IfxPort_PadDriver_cmosAutomotiveSpeed4 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed1 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed2 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed3 : IfxPort.h
  • IfxPort_PadDriver_lvdsSpeed4 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed1 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed2 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed3 : IfxPort.h
  • IfxPort_PadDriver_ttlSpeed4 : IfxPort.h
  • IfxPort_PadSupply_3v : IfxPort.h
  • IfxPort_PadSupply_5v : IfxPort.h
  • IfxPort_State_high : IfxPort.h
  • IfxPort_State_low : IfxPort.h
  • IfxPort_State_notChanged : IfxPort.h
  • IfxPort_State_toggled : IfxPort.h
  • IfxPsi5_AlternateInput_0 : IfxPsi5.h
  • IfxPsi5_AlternateInput_1 : IfxPsi5.h
  • IfxPsi5_AlternateInput_2 : IfxPsi5.h
  • IfxPsi5_AlternateInput_3 : IfxPsi5.h
  • IfxPsi5_BaudRate_125 : IfxPsi5.h
  • IfxPsi5_BaudRate_189 : IfxPsi5.h
  • IfxPsi5_ChannelId_0 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_1 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_2 : IfxPsi5_cfg.h
  • IfxPsi5_ChannelId_none : IfxPsi5_cfg.h
  • IfxPsi5_ClockType_fastClock_189 : IfxPsi5.h
  • IfxPsi5_ClockType_fracDiv : IfxPsi5.h
  • IfxPsi5_ClockType_slowClock_125 : IfxPsi5.h
  • IfxPsi5_ClockType_timeStamp : IfxPsi5.h
  • IfxPsi5_CRCorParity_crc : IfxPsi5.h
  • IfxPsi5_CRCorParity_parity : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_0 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_1 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_10 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_11 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_12 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_13 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_14 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_15 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_2 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_3 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_4 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_5 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_6 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_7 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_8 : IfxPsi5.h
  • IfxPsi5_DigitalInputFilterDepth_9 : IfxPsi5.h
  • IfxPsi5_DividerMode_fractional : IfxPsi5.h
  • IfxPsi5_DividerMode_normal : IfxPsi5.h
  • IfxPsi5_DividerMode_off : IfxPsi5.h
  • IfxPsi5_DividerMode_spb : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_highbitrate : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_lowbitrate : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_normal : IfxPsi5.h
  • IfxPsi5_FractionalDividerRegister_timestamp : IfxPsi5.h
  • IfxPsi5_FrameExpectation_expected : IfxPsi5.h
  • IfxPsi5_FrameExpectation_notExpected : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_0 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_1 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_2 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_3 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_4 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_5 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_6 : IfxPsi5.h
  • IfxPsi5_InterruptServiceRequest_7 : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister_a : IfxPsi5.h
  • IfxPsi5_InterruptStatusRegister_b : IfxPsi5.h
  • IfxPsi5_MessagingBits_absent : IfxPsi5.h
  • IfxPsi5_MessagingBits_present : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp_frame : IfxPsi5.h
  • IfxPsi5_ReceiveDataRegisterTimestamp_pulse : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_a : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_b : IfxPsi5.h
  • IfxPsi5_ReceiverControlRegister_c : IfxPsi5.h
  • IfxPsi5_Slot_0 : IfxPsi5.h
  • IfxPsi5_Slot_1 : IfxPsi5.h
  • IfxPsi5_Slot_2 : IfxPsi5.h
  • IfxPsi5_Slot_3 : IfxPsi5.h
  • IfxPsi5_Slot_4 : IfxPsi5.h
  • IfxPsi5_Slot_5 : IfxPsi5.h
  • IfxPsi5_SuspendMode_hard : IfxPsi5.h
  • IfxPsi5_SuspendMode_none : IfxPsi5.h
  • IfxPsi5_SuspendMode_soft : IfxPsi5.h
  • IfxPsi5_TimeBase_external : IfxPsi5.h
  • IfxPsi5_TimeBase_internal : IfxPsi5.h
  • IfxPsi5_TimestampRegister_a : IfxPsi5.h
  • IfxPsi5_TimestampRegister_b : IfxPsi5.h
  • IfxPsi5_TimestampRegister_c : IfxPsi5.h
  • IfxPsi5_Trigger_0 : IfxPsi5.h
  • IfxPsi5_Trigger_1 : IfxPsi5.h
  • IfxPsi5_Trigger_2 : IfxPsi5.h
  • IfxPsi5_Trigger_3 : IfxPsi5.h
  • IfxPsi5_Trigger_4 : IfxPsi5.h
  • IfxPsi5_Trigger_5 : IfxPsi5.h
  • IfxPsi5_TriggerType_bypass : IfxPsi5.h
  • IfxPsi5_TriggerType_external : IfxPsi5.h
  • IfxPsi5_TriggerType_periodic : IfxPsi5.h
  • IfxPsi5_Verbose_off : IfxPsi5.h
  • IfxPsi5_Verbose_on : IfxPsi5.h
  • IfxPsi5s_AlternateInput_0 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_1 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_2 : IfxPsi5s.h
  • IfxPsi5s_AlternateInput_3 : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar_divideBy2 : IfxPsi5s.h
  • IfxPsi5s_AscBaudratePrescalar_divideBy3 : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_7bitDataWithParity : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitData : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitDataWithParity : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_8bitDataWithWakeup : IfxPsi5s.h
  • IfxPsi5s_AscMode_async_9bitData : IfxPsi5s.h
  • IfxPsi5s_AscMode_sync : IfxPsi5s.h
  • IfxPsi5s_AscStopBits_1 : IfxPsi5s.h
  • IfxPsi5s_AscStopBits_2 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_0 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_1 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_2 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_3 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_4 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_5 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_6 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_7 : IfxPsi5s.h
  • IfxPsi5s_ChannelId_none : IfxPsi5s.h
  • IfxPsi5s_ClockType_ascFracDiv : IfxPsi5s.h
  • IfxPsi5s_ClockType_ascOutput : IfxPsi5s.h
  • IfxPsi5s_ClockType_fracDiv : IfxPsi5s.h
  • IfxPsi5s_ClockType_timeStamp : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity_crc : IfxPsi5s.h
  • IfxPsi5s_CrcOrParity_parity : IfxPsi5s.h
  • IfxPsi5s_DividerMode_fractional : IfxPsi5s.h
  • IfxPsi5s_DividerMode_normal : IfxPsi5s.h
  • IfxPsi5s_DividerMode_off : IfxPsi5s.h
  • IfxPsi5s_DividerMode_spb : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 : IfxPsi5s.h
  • IfxPsi5s_EnhancedProtocol_toothGapMethod : IfxPsi5s.h
  • IfxPsi5s_FrameId_frameHeader : IfxPsi5s.h
  • IfxPsi5s_FrameId_rollingNumber : IfxPsi5s.h
  • IfxPsi5s_IdleTime_1 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_10 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_11 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_12 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_13 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_14 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_15 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_16 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_2 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_3 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_4 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_5 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_6 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_7 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_8 : IfxPsi5s.h
  • IfxPsi5s_IdleTime_9 : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode_disable : IfxPsi5s.h
  • IfxPsi5s_LoopBackMode_enable : IfxPsi5s.h
  • IfxPsi5s_MessagingBits_absent : IfxPsi5s.h
  • IfxPsi5s_MessagingBits_present : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_1 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_2 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_3 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_4 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_5 : IfxPsi5s.h
  • IfxPsi5s_NumberExpectedFrames_6 : IfxPsi5s.h
  • IfxPsi5s_SleepMode_disable : IfxPsi5s.h
  • IfxPsi5s_SleepMode_enable : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_hard : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_none : IfxPsi5s.h
  • IfxPsi5s_SuspendMode_soft : IfxPsi5s.h
  • IfxPsi5s_TimeBase_external : IfxPsi5s.h
  • IfxPsi5s_TimeBase_internal : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister_a : IfxPsi5s.h
  • IfxPsi5s_TimestampRegister_b : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger_frame : IfxPsi5s.h
  • IfxPsi5s_TimestampTrigger_syncPulse : IfxPsi5s.h
  • IfxPsi5s_Trigger_0 : IfxPsi5s.h
  • IfxPsi5s_Trigger_1 : IfxPsi5s.h
  • IfxPsi5s_Trigger_2 : IfxPsi5s.h
  • IfxPsi5s_Trigger_3 : IfxPsi5s.h
  • IfxPsi5s_Trigger_4 : IfxPsi5s.h
  • IfxPsi5s_Trigger_5 : IfxPsi5s.h
  • IfxPsi5s_Trigger_6 : IfxPsi5s.h
  • IfxPsi5s_Trigger_7 : IfxPsi5s.h
  • IfxPsi5s_TriggerType_external : IfxPsi5s.h
  • IfxPsi5s_TriggerType_periodic : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_3 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_4 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_5 : IfxPsi5s.h
  • IfxPsi5s_UartFrameCount_6 : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode_frame : IfxPsi5s.h
  • IfxPsi5s_WatchdogTimerMode_syncPulse : IfxPsi5s.h
  • IfxQspi_ChannelId_0 : IfxQspi.h
  • IfxQspi_ChannelId_1 : IfxQspi.h
  • IfxQspi_ChannelId_10 : IfxQspi.h
  • IfxQspi_ChannelId_11 : IfxQspi.h
  • IfxQspi_ChannelId_12 : IfxQspi.h
  • IfxQspi_ChannelId_13 : IfxQspi.h
  • IfxQspi_ChannelId_14 : IfxQspi.h
  • IfxQspi_ChannelId_2 : IfxQspi.h
  • IfxQspi_ChannelId_3 : IfxQspi.h
  • IfxQspi_ChannelId_4 : IfxQspi.h
  • IfxQspi_ChannelId_5 : IfxQspi.h
  • IfxQspi_ChannelId_6 : IfxQspi.h
  • IfxQspi_ChannelId_7 : IfxQspi.h
  • IfxQspi_ChannelId_8 : IfxQspi.h
  • IfxQspi_ChannelId_9 : IfxQspi.h
  • IfxQspi_DataLengthUnit_bit : IfxQspi.h
  • IfxQspi_DataLengthUnit_byte : IfxQspi.h
  • IfxQspi_Error_baudrate : IfxQspi.h
  • IfxQspi_Error_configuration : IfxQspi.h
  • IfxQspi_Error_expectTimeout : IfxQspi.h
  • IfxQspi_Error_none : IfxQspi.h
  • IfxQspi_Error_parity : IfxQspi.h
  • IfxQspi_Error_rxfifoOverflow : IfxQspi.h
  • IfxQspi_Error_rxfifoUnderflow : IfxQspi.h
  • IfxQspi_Error_slsiMisplacedInactivation : IfxQspi.h
  • IfxQspi_Error_txfifoOverflow : IfxQspi.h
  • IfxQspi_Error_txfifoUnderflow : IfxQspi.h
  • IfxQspi_ExpectTimeout_1024 : IfxQspi.h
  • IfxQspi_ExpectTimeout_1048576 : IfxQspi.h
  • IfxQspi_ExpectTimeout_128 : IfxQspi.h
  • IfxQspi_ExpectTimeout_131072 : IfxQspi.h
  • IfxQspi_ExpectTimeout_16384 : IfxQspi.h
  • IfxQspi_ExpectTimeout_2048 : IfxQspi.h
  • IfxQspi_ExpectTimeout_2097152 : IfxQspi.h
  • IfxQspi_ExpectTimeout_256 : IfxQspi.h
  • IfxQspi_ExpectTimeout_262144 : IfxQspi.h
  • IfxQspi_ExpectTimeout_32768 : IfxQspi.h
  • IfxQspi_ExpectTimeout_4096 : IfxQspi.h
  • IfxQspi_ExpectTimeout_512 : IfxQspi.h
  • IfxQspi_ExpectTimeout_524288 : IfxQspi.h
  • IfxQspi_ExpectTimeout_64 : IfxQspi.h
  • IfxQspi_ExpectTimeout_65536 : IfxQspi.h
  • IfxQspi_ExpectTimeout_8192 : IfxQspi.h
  • IfxQspi_FifoMode_batchMove : IfxQspi.h
  • IfxQspi_FifoMode_combinedMove : IfxQspi.h
  • IfxQspi_FifoMode_singleMove : IfxQspi.h
  • IfxQspi_Index_0 : IfxQspi_cfg.h
  • IfxQspi_Index_1 : IfxQspi_cfg.h
  • IfxQspi_Index_2 : IfxQspi_cfg.h
  • IfxQspi_Index_3 : IfxQspi_cfg.h
  • IfxQspi_Index_none : IfxQspi_cfg.h
  • IfxQspi_Mode_master : IfxQspi.h
  • IfxQspi_Mode_pwmOverQspi : IfxQspi.h
  • IfxQspi_Mode_slave : IfxQspi.h
  • IfxQspi_PauseRunTransition_pause : IfxQspi.h
  • IfxQspi_PauseRunTransition_run : IfxQspi.h
  • IfxQspi_Phase_data : IfxQspi.h
  • IfxQspi_Phase_expect : IfxQspi.h
  • IfxQspi_Phase_idleA : IfxQspi.h
  • IfxQspi_Phase_idleB : IfxQspi.h
  • IfxQspi_Phase_lead : IfxQspi.h
  • IfxQspi_Phase_leadStrobe : IfxQspi.h
  • IfxQspi_Phase_trail : IfxQspi.h
  • IfxQspi_Phase_trailStrobe : IfxQspi.h
  • IfxQspi_Phase_wait : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_dataNotAvailable : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfExpect : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfFrame : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_endOfWait : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_receiveBufferFilled : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_serialClockPolarityChange : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_startOfFrame : IfxQspi.h
  • IfxQspi_PhaseTransitionEvent_transmitBufferEmptied : IfxQspi.h
  • IfxQspi_Reset_kernel : IfxQspi.h
  • IfxQspi_Reset_none : IfxQspi.h
  • IfxQspi_Reset_stateMachineAndFifo : IfxQspi.h
  • IfxQspi_RxFifoInt_0 : IfxQspi.h
  • IfxQspi_RxFifoInt_1 : IfxQspi.h
  • IfxQspi_RxFifoInt_2 : IfxQspi.h
  • IfxQspi_RxFifoInt_3 : IfxQspi.h
  • IfxQspi_SleepMode_disable : IfxQspi.h
  • IfxQspi_SleepMode_enable : IfxQspi.h
  • IfxQspi_SpiMaster_ChannelBasedCs_disabled : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_ChannelBasedCs_enabled : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_long : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_longContinuous : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_short : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_shortContinuous : IfxQspi_SpiMaster.h
  • IfxQspi_SpiMaster_Mode_xxl : IfxQspi_SpiMaster.h
  • IfxQspi_StrobeDelay_1 : IfxQspi.h
  • IfxQspi_StrobeDelay_10 : IfxQspi.h
  • IfxQspi_StrobeDelay_11 : IfxQspi.h
  • IfxQspi_StrobeDelay_12 : IfxQspi.h
  • IfxQspi_StrobeDelay_13 : IfxQspi.h
  • IfxQspi_StrobeDelay_14 : IfxQspi.h
  • IfxQspi_StrobeDelay_15 : IfxQspi.h
  • IfxQspi_StrobeDelay_16 : IfxQspi.h
  • IfxQspi_StrobeDelay_17 : IfxQspi.h
  • IfxQspi_StrobeDelay_18 : IfxQspi.h
  • IfxQspi_StrobeDelay_19 : IfxQspi.h
  • IfxQspi_StrobeDelay_2 : IfxQspi.h
  • IfxQspi_StrobeDelay_20 : IfxQspi.h
  • IfxQspi_StrobeDelay_21 : IfxQspi.h
  • IfxQspi_StrobeDelay_22 : IfxQspi.h
  • IfxQspi_StrobeDelay_23 : IfxQspi.h
  • IfxQspi_StrobeDelay_24 : IfxQspi.h
  • IfxQspi_StrobeDelay_25 : IfxQspi.h
  • IfxQspi_StrobeDelay_26 : IfxQspi.h
  • IfxQspi_StrobeDelay_27 : IfxQspi.h
  • IfxQspi_StrobeDelay_28 : IfxQspi.h
  • IfxQspi_StrobeDelay_29 : IfxQspi.h
  • IfxQspi_StrobeDelay_3 : IfxQspi.h
  • IfxQspi_StrobeDelay_30 : IfxQspi.h
  • IfxQspi_StrobeDelay_31 : IfxQspi.h
  • IfxQspi_StrobeDelay_32 : IfxQspi.h
  • IfxQspi_StrobeDelay_4 : IfxQspi.h
  • IfxQspi_StrobeDelay_5 : IfxQspi.h
  • IfxQspi_StrobeDelay_6 : IfxQspi.h
  • IfxQspi_StrobeDelay_7 : IfxQspi.h
  • IfxQspi_StrobeDelay_8 : IfxQspi.h
  • IfxQspi_StrobeDelay_9 : IfxQspi.h
  • IfxQspi_SuspendMode_hard : IfxQspi.h
  • IfxQspi_SuspendMode_none : IfxQspi.h
  • IfxQspi_SuspendMode_soft : IfxQspi.h
  • IfxQspi_TxFifoInt_1 : IfxQspi.h
  • IfxQspi_TxFifoInt_2 : IfxQspi.h
  • IfxQspi_TxFifoInt_3 : IfxQspi.h
  • IfxQspi_TxFifoInt_4 : IfxQspi.h
  • IfxScu_CCUCON0_CLKSEL_fBack : IfxScu_cfg.h
  • IfxScu_CCUCON0_CLKSEL_fPll : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL_fOsc0 : IfxScu_cfg.h
  • IfxScu_CCUCON1_INSEL_fOsc1 : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Idle : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Run : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Sleep : IfxScu_cfg.h
  • IfxScu_PMCSR_REQSLP_Stby : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy16384 : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy256 : IfxScu_cfg.h
  • IfxScu_WDTCON1_IR_divBy64 : IfxScu_cfg.h
  • IfxScuCcu_K1divider_1 : IfxScuCcu.h
  • IfxScuCcu_K1divider_10 : IfxScuCcu.h
  • IfxScuCcu_K1divider_100 : IfxScuCcu.h
  • IfxScuCcu_K1divider_101 : IfxScuCcu.h
  • IfxScuCcu_K1divider_102 : IfxScuCcu.h
  • IfxScuCcu_K1divider_103 : IfxScuCcu.h
  • IfxScuCcu_K1divider_104 : IfxScuCcu.h
  • IfxScuCcu_K1divider_105 : IfxScuCcu.h
  • IfxScuCcu_K1divider_106 : IfxScuCcu.h
  • IfxScuCcu_K1divider_107 : IfxScuCcu.h
  • IfxScuCcu_K1divider_108 : IfxScuCcu.h
  • IfxScuCcu_K1divider_109 : IfxScuCcu.h
  • IfxScuCcu_K1divider_11 : IfxScuCcu.h
  • IfxScuCcu_K1divider_110 : IfxScuCcu.h
  • IfxScuCcu_K1divider_111 : IfxScuCcu.h
  • IfxScuCcu_K1divider_112 : IfxScuCcu.h
  • IfxScuCcu_K1divider_113 : IfxScuCcu.h
  • IfxScuCcu_K1divider_114 : IfxScuCcu.h
  • IfxScuCcu_K1divider_115 : IfxScuCcu.h
  • IfxScuCcu_K1divider_116 : IfxScuCcu.h
  • IfxScuCcu_K1divider_117 : IfxScuCcu.h
  • IfxScuCcu_K1divider_118 : IfxScuCcu.h
  • IfxScuCcu_K1divider_119 : IfxScuCcu.h
  • IfxScuCcu_K1divider_12 : IfxScuCcu.h
  • IfxScuCcu_K1divider_120 : IfxScuCcu.h
  • IfxScuCcu_K1divider_121 : IfxScuCcu.h
  • IfxScuCcu_K1divider_122 : IfxScuCcu.h
  • IfxScuCcu_K1divider_123 : IfxScuCcu.h
  • IfxScuCcu_K1divider_124 : IfxScuCcu.h
  • IfxScuCcu_K1divider_125 : IfxScuCcu.h
  • IfxScuCcu_K1divider_126 : IfxScuCcu.h
  • IfxScuCcu_K1divider_127 : IfxScuCcu.h
  • IfxScuCcu_K1divider_128 : IfxScuCcu.h
  • IfxScuCcu_K1divider_13 : IfxScuCcu.h
  • IfxScuCcu_K1divider_14 : IfxScuCcu.h
  • IfxScuCcu_K1divider_15 : IfxScuCcu.h
  • IfxScuCcu_K1divider_16 : IfxScuCcu.h
  • IfxScuCcu_K1divider_17 : IfxScuCcu.h
  • IfxScuCcu_K1divider_18 : IfxScuCcu.h
  • IfxScuCcu_K1divider_19 : IfxScuCcu.h
  • IfxScuCcu_K1divider_2 : IfxScuCcu.h
  • IfxScuCcu_K1divider_20 : IfxScuCcu.h
  • IfxScuCcu_K1divider_21 : IfxScuCcu.h
  • IfxScuCcu_K1divider_22 : IfxScuCcu.h
  • IfxScuCcu_K1divider_23 : IfxScuCcu.h
  • IfxScuCcu_K1divider_24 : IfxScuCcu.h
  • IfxScuCcu_K1divider_25 : IfxScuCcu.h
  • IfxScuCcu_K1divider_26 : IfxScuCcu.h
  • IfxScuCcu_K1divider_27 : IfxScuCcu.h
  • IfxScuCcu_K1divider_28 : IfxScuCcu.h
  • IfxScuCcu_K1divider_29 : IfxScuCcu.h
  • IfxScuCcu_K1divider_3 : IfxScuCcu.h
  • IfxScuCcu_K1divider_30 : IfxScuCcu.h
  • IfxScuCcu_K1divider_31 : IfxScuCcu.h
  • IfxScuCcu_K1divider_32 : IfxScuCcu.h
  • IfxScuCcu_K1divider_33 : IfxScuCcu.h
  • IfxScuCcu_K1divider_34 : IfxScuCcu.h
  • IfxScuCcu_K1divider_35 : IfxScuCcu.h
  • IfxScuCcu_K1divider_36 : IfxScuCcu.h
  • IfxScuCcu_K1divider_37 : IfxScuCcu.h
  • IfxScuCcu_K1divider_38 : IfxScuCcu.h
  • IfxScuCcu_K1divider_39 : IfxScuCcu.h
  • IfxScuCcu_K1divider_4 : IfxScuCcu.h
  • IfxScuCcu_K1divider_40 : IfxScuCcu.h
  • IfxScuCcu_K1divider_41 : IfxScuCcu.h
  • IfxScuCcu_K1divider_42 : IfxScuCcu.h
  • IfxScuCcu_K1divider_43 : IfxScuCcu.h
  • IfxScuCcu_K1divider_44 : IfxScuCcu.h
  • IfxScuCcu_K1divider_45 : IfxScuCcu.h
  • IfxScuCcu_K1divider_46 : IfxScuCcu.h
  • IfxScuCcu_K1divider_47 : IfxScuCcu.h
  • IfxScuCcu_K1divider_48 : IfxScuCcu.h
  • IfxScuCcu_K1divider_49 : IfxScuCcu.h
  • IfxScuCcu_K1divider_5 : IfxScuCcu.h
  • IfxScuCcu_K1divider_50 : IfxScuCcu.h
  • IfxScuCcu_K1divider_51 : IfxScuCcu.h
  • IfxScuCcu_K1divider_52 : IfxScuCcu.h
  • IfxScuCcu_K1divider_53 : IfxScuCcu.h
  • IfxScuCcu_K1divider_54 : IfxScuCcu.h
  • IfxScuCcu_K1divider_55 : IfxScuCcu.h
  • IfxScuCcu_K1divider_56 : IfxScuCcu.h
  • IfxScuCcu_K1divider_57 : IfxScuCcu.h
  • IfxScuCcu_K1divider_58 : IfxScuCcu.h
  • IfxScuCcu_K1divider_59 : IfxScuCcu.h
  • IfxScuCcu_K1divider_6 : IfxScuCcu.h
  • IfxScuCcu_K1divider_60 : IfxScuCcu.h
  • IfxScuCcu_K1divider_61 : IfxScuCcu.h
  • IfxScuCcu_K1divider_62 : IfxScuCcu.h
  • IfxScuCcu_K1divider_63 : IfxScuCcu.h
  • IfxScuCcu_K1divider_64 : IfxScuCcu.h
  • IfxScuCcu_K1divider_65 : IfxScuCcu.h
  • IfxScuCcu_K1divider_66 : IfxScuCcu.h
  • IfxScuCcu_K1divider_67 : IfxScuCcu.h
  • IfxScuCcu_K1divider_68 : IfxScuCcu.h
  • IfxScuCcu_K1divider_69 : IfxScuCcu.h
  • IfxScuCcu_K1divider_7 : IfxScuCcu.h
  • IfxScuCcu_K1divider_70 : IfxScuCcu.h
  • IfxScuCcu_K1divider_71 : IfxScuCcu.h
  • IfxScuCcu_K1divider_72 : IfxScuCcu.h
  • IfxScuCcu_K1divider_73 : IfxScuCcu.h
  • IfxScuCcu_K1divider_74 : IfxScuCcu.h
  • IfxScuCcu_K1divider_75 : IfxScuCcu.h
  • IfxScuCcu_K1divider_76 : IfxScuCcu.h
  • IfxScuCcu_K1divider_77 : IfxScuCcu.h
  • IfxScuCcu_K1divider_78 : IfxScuCcu.h
  • IfxScuCcu_K1divider_79 : IfxScuCcu.h
  • IfxScuCcu_K1divider_8 : IfxScuCcu.h
  • IfxScuCcu_K1divider_80 : IfxScuCcu.h
  • IfxScuCcu_K1divider_81 : IfxScuCcu.h
  • IfxScuCcu_K1divider_82 : IfxScuCcu.h
  • IfxScuCcu_K1divider_83 : IfxScuCcu.h
  • IfxScuCcu_K1divider_84 : IfxScuCcu.h
  • IfxScuCcu_K1divider_85 : IfxScuCcu.h
  • IfxScuCcu_K1divider_86 : IfxScuCcu.h
  • IfxScuCcu_K1divider_87 : IfxScuCcu.h
  • IfxScuCcu_K1divider_88 : IfxScuCcu.h
  • IfxScuCcu_K1divider_89 : IfxScuCcu.h
  • IfxScuCcu_K1divider_9 : IfxScuCcu.h
  • IfxScuCcu_K1divider_90 : IfxScuCcu.h
  • IfxScuCcu_K1divider_91 : IfxScuCcu.h
  • IfxScuCcu_K1divider_92 : IfxScuCcu.h
  • IfxScuCcu_K1divider_93 : IfxScuCcu.h
  • IfxScuCcu_K1divider_94 : IfxScuCcu.h
  • IfxScuCcu_K1divider_95 : IfxScuCcu.h
  • IfxScuCcu_K1divider_96 : IfxScuCcu.h
  • IfxScuCcu_K1divider_97 : IfxScuCcu.h
  • IfxScuCcu_K1divider_98 : IfxScuCcu.h
  • IfxScuCcu_K1divider_99 : IfxScuCcu.h
  • IfxScuCcu_K2divider_1 : IfxScuCcu.h
  • IfxScuCcu_K2divider_10 : IfxScuCcu.h
  • IfxScuCcu_K2divider_100 : IfxScuCcu.h
  • IfxScuCcu_K2divider_101 : IfxScuCcu.h
  • IfxScuCcu_K2divider_102 : IfxScuCcu.h
  • IfxScuCcu_K2divider_103 : IfxScuCcu.h
  • IfxScuCcu_K2divider_104 : IfxScuCcu.h
  • IfxScuCcu_K2divider_105 : IfxScuCcu.h
  • IfxScuCcu_K2divider_106 : IfxScuCcu.h
  • IfxScuCcu_K2divider_107 : IfxScuCcu.h
  • IfxScuCcu_K2divider_108 : IfxScuCcu.h
  • IfxScuCcu_K2divider_109 : IfxScuCcu.h
  • IfxScuCcu_K2divider_11 : IfxScuCcu.h
  • IfxScuCcu_K2divider_110 : IfxScuCcu.h
  • IfxScuCcu_K2divider_111 : IfxScuCcu.h
  • IfxScuCcu_K2divider_112 : IfxScuCcu.h
  • IfxScuCcu_K2divider_113 : IfxScuCcu.h
  • IfxScuCcu_K2divider_114 : IfxScuCcu.h
  • IfxScuCcu_K2divider_115 : IfxScuCcu.h
  • IfxScuCcu_K2divider_116 : IfxScuCcu.h
  • IfxScuCcu_K2divider_117 : IfxScuCcu.h
  • IfxScuCcu_K2divider_118 : IfxScuCcu.h
  • IfxScuCcu_K2divider_119 : IfxScuCcu.h
  • IfxScuCcu_K2divider_12 : IfxScuCcu.h
  • IfxScuCcu_K2divider_120 : IfxScuCcu.h
  • IfxScuCcu_K2divider_121 : IfxScuCcu.h
  • IfxScuCcu_K2divider_122 : IfxScuCcu.h
  • IfxScuCcu_K2divider_123 : IfxScuCcu.h
  • IfxScuCcu_K2divider_124 : IfxScuCcu.h
  • IfxScuCcu_K2divider_125 : IfxScuCcu.h
  • IfxScuCcu_K2divider_126 : IfxScuCcu.h
  • IfxScuCcu_K2divider_127 : IfxScuCcu.h
  • IfxScuCcu_K2divider_128 : IfxScuCcu.h
  • IfxScuCcu_K2divider_13 : IfxScuCcu.h
  • IfxScuCcu_K2divider_14 : IfxScuCcu.h
  • IfxScuCcu_K2divider_15 : IfxScuCcu.h
  • IfxScuCcu_K2divider_16 : IfxScuCcu.h
  • IfxScuCcu_K2divider_17 : IfxScuCcu.h
  • IfxScuCcu_K2divider_18 : IfxScuCcu.h
  • IfxScuCcu_K2divider_19 : IfxScuCcu.h
  • IfxScuCcu_K2divider_2 : IfxScuCcu.h
  • IfxScuCcu_K2divider_20 : IfxScuCcu.h
  • IfxScuCcu_K2divider_21 : IfxScuCcu.h
  • IfxScuCcu_K2divider_22 : IfxScuCcu.h
  • IfxScuCcu_K2divider_23 : IfxScuCcu.h
  • IfxScuCcu_K2divider_24 : IfxScuCcu.h
  • IfxScuCcu_K2divider_25 : IfxScuCcu.h
  • IfxScuCcu_K2divider_26 : IfxScuCcu.h
  • IfxScuCcu_K2divider_27 : IfxScuCcu.h
  • IfxScuCcu_K2divider_28 : IfxScuCcu.h
  • IfxScuCcu_K2divider_29 : IfxScuCcu.h
  • IfxScuCcu_K2divider_3 : IfxScuCcu.h
  • IfxScuCcu_K2divider_30 : IfxScuCcu.h
  • IfxScuCcu_K2divider_31 : IfxScuCcu.h
  • IfxScuCcu_K2divider_32 : IfxScuCcu.h
  • IfxScuCcu_K2divider_33 : IfxScuCcu.h
  • IfxScuCcu_K2divider_34 : IfxScuCcu.h
  • IfxScuCcu_K2divider_35 : IfxScuCcu.h
  • IfxScuCcu_K2divider_36 : IfxScuCcu.h
  • IfxScuCcu_K2divider_37 : IfxScuCcu.h
  • IfxScuCcu_K2divider_38 : IfxScuCcu.h
  • IfxScuCcu_K2divider_39 : IfxScuCcu.h
  • IfxScuCcu_K2divider_4 : IfxScuCcu.h
  • IfxScuCcu_K2divider_40 : IfxScuCcu.h
  • IfxScuCcu_K2divider_41 : IfxScuCcu.h
  • IfxScuCcu_K2divider_42 : IfxScuCcu.h
  • IfxScuCcu_K2divider_43 : IfxScuCcu.h
  • IfxScuCcu_K2divider_44 : IfxScuCcu.h
  • IfxScuCcu_K2divider_45 : IfxScuCcu.h
  • IfxScuCcu_K2divider_46 : IfxScuCcu.h
  • IfxScuCcu_K2divider_47 : IfxScuCcu.h
  • IfxScuCcu_K2divider_48 : IfxScuCcu.h
  • IfxScuCcu_K2divider_49 : IfxScuCcu.h
  • IfxScuCcu_K2divider_5 : IfxScuCcu.h
  • IfxScuCcu_K2divider_50 : IfxScuCcu.h
  • IfxScuCcu_K2divider_51 : IfxScuCcu.h
  • IfxScuCcu_K2divider_52 : IfxScuCcu.h
  • IfxScuCcu_K2divider_53 : IfxScuCcu.h
  • IfxScuCcu_K2divider_54 : IfxScuCcu.h
  • IfxScuCcu_K2divider_55 : IfxScuCcu.h
  • IfxScuCcu_K2divider_56 : IfxScuCcu.h
  • IfxScuCcu_K2divider_57 : IfxScuCcu.h
  • IfxScuCcu_K2divider_58 : IfxScuCcu.h
  • IfxScuCcu_K2divider_59 : IfxScuCcu.h
  • IfxScuCcu_K2divider_6 : IfxScuCcu.h
  • IfxScuCcu_K2divider_60 : IfxScuCcu.h
  • IfxScuCcu_K2divider_61 : IfxScuCcu.h
  • IfxScuCcu_K2divider_62 : IfxScuCcu.h
  • IfxScuCcu_K2divider_63 : IfxScuCcu.h
  • IfxScuCcu_K2divider_64 : IfxScuCcu.h
  • IfxScuCcu_K2divider_65 : IfxScuCcu.h
  • IfxScuCcu_K2divider_66 : IfxScuCcu.h
  • IfxScuCcu_K2divider_67 : IfxScuCcu.h
  • IfxScuCcu_K2divider_68 : IfxScuCcu.h
  • IfxScuCcu_K2divider_69 : IfxScuCcu.h
  • IfxScuCcu_K2divider_7 : IfxScuCcu.h
  • IfxScuCcu_K2divider_70 : IfxScuCcu.h
  • IfxScuCcu_K2divider_71 : IfxScuCcu.h
  • IfxScuCcu_K2divider_72 : IfxScuCcu.h
  • IfxScuCcu_K2divider_73 : IfxScuCcu.h
  • IfxScuCcu_K2divider_74 : IfxScuCcu.h
  • IfxScuCcu_K2divider_75 : IfxScuCcu.h
  • IfxScuCcu_K2divider_76 : IfxScuCcu.h
  • IfxScuCcu_K2divider_77 : IfxScuCcu.h
  • IfxScuCcu_K2divider_78 : IfxScuCcu.h
  • IfxScuCcu_K2divider_79 : IfxScuCcu.h
  • IfxScuCcu_K2divider_8 : IfxScuCcu.h
  • IfxScuCcu_K2divider_80 : IfxScuCcu.h
  • IfxScuCcu_K2divider_81 : IfxScuCcu.h
  • IfxScuCcu_K2divider_82 : IfxScuCcu.h
  • IfxScuCcu_K2divider_83 : IfxScuCcu.h
  • IfxScuCcu_K2divider_84 : IfxScuCcu.h
  • IfxScuCcu_K2divider_85 : IfxScuCcu.h
  • IfxScuCcu_K2divider_86 : IfxScuCcu.h
  • IfxScuCcu_K2divider_87 : IfxScuCcu.h
  • IfxScuCcu_K2divider_88 : IfxScuCcu.h
  • IfxScuCcu_K2divider_89 : IfxScuCcu.h
  • IfxScuCcu_K2divider_9 : IfxScuCcu.h
  • IfxScuCcu_K2divider_90 : IfxScuCcu.h
  • IfxScuCcu_K2divider_91 : IfxScuCcu.h
  • IfxScuCcu_K2divider_92 : IfxScuCcu.h
  • IfxScuCcu_K2divider_93 : IfxScuCcu.h
  • IfxScuCcu_K2divider_94 : IfxScuCcu.h
  • IfxScuCcu_K2divider_95 : IfxScuCcu.h
  • IfxScuCcu_K2divider_96 : IfxScuCcu.h
  • IfxScuCcu_K2divider_97 : IfxScuCcu.h
  • IfxScuCcu_K2divider_98 : IfxScuCcu.h
  • IfxScuCcu_K2divider_99 : IfxScuCcu.h
  • IfxScuCcu_K3divider_1 : IfxScuCcu.h
  • IfxScuCcu_K3divider_10 : IfxScuCcu.h
  • IfxScuCcu_K3divider_100 : IfxScuCcu.h
  • IfxScuCcu_K3divider_101 : IfxScuCcu.h
  • IfxScuCcu_K3divider_102 : IfxScuCcu.h
  • IfxScuCcu_K3divider_103 : IfxScuCcu.h
  • IfxScuCcu_K3divider_104 : IfxScuCcu.h
  • IfxScuCcu_K3divider_105 : IfxScuCcu.h
  • IfxScuCcu_K3divider_106 : IfxScuCcu.h
  • IfxScuCcu_K3divider_107 : IfxScuCcu.h
  • IfxScuCcu_K3divider_108 : IfxScuCcu.h
  • IfxScuCcu_K3divider_109 : IfxScuCcu.h
  • IfxScuCcu_K3divider_11 : IfxScuCcu.h
  • IfxScuCcu_K3divider_110 : IfxScuCcu.h
  • IfxScuCcu_K3divider_111 : IfxScuCcu.h
  • IfxScuCcu_K3divider_112 : IfxScuCcu.h
  • IfxScuCcu_K3divider_113 : IfxScuCcu.h
  • IfxScuCcu_K3divider_114 : IfxScuCcu.h
  • IfxScuCcu_K3divider_115 : IfxScuCcu.h
  • IfxScuCcu_K3divider_116 : IfxScuCcu.h
  • IfxScuCcu_K3divider_117 : IfxScuCcu.h
  • IfxScuCcu_K3divider_118 : IfxScuCcu.h
  • IfxScuCcu_K3divider_119 : IfxScuCcu.h
  • IfxScuCcu_K3divider_12 : IfxScuCcu.h
  • IfxScuCcu_K3divider_120 : IfxScuCcu.h
  • IfxScuCcu_K3divider_121 : IfxScuCcu.h
  • IfxScuCcu_K3divider_122 : IfxScuCcu.h
  • IfxScuCcu_K3divider_123 : IfxScuCcu.h
  • IfxScuCcu_K3divider_124 : IfxScuCcu.h
  • IfxScuCcu_K3divider_125 : IfxScuCcu.h
  • IfxScuCcu_K3divider_126 : IfxScuCcu.h
  • IfxScuCcu_K3divider_127 : IfxScuCcu.h
  • IfxScuCcu_K3divider_128 : IfxScuCcu.h
  • IfxScuCcu_K3divider_13 : IfxScuCcu.h
  • IfxScuCcu_K3divider_14 : IfxScuCcu.h
  • IfxScuCcu_K3divider_15 : IfxScuCcu.h
  • IfxScuCcu_K3divider_16 : IfxScuCcu.h
  • IfxScuCcu_K3divider_17 : IfxScuCcu.h
  • IfxScuCcu_K3divider_18 : IfxScuCcu.h
  • IfxScuCcu_K3divider_19 : IfxScuCcu.h
  • IfxScuCcu_K3divider_2 : IfxScuCcu.h
  • IfxScuCcu_K3divider_20 : IfxScuCcu.h
  • IfxScuCcu_K3divider_21 : IfxScuCcu.h
  • IfxScuCcu_K3divider_22 : IfxScuCcu.h
  • IfxScuCcu_K3divider_23 : IfxScuCcu.h
  • IfxScuCcu_K3divider_24 : IfxScuCcu.h
  • IfxScuCcu_K3divider_25 : IfxScuCcu.h
  • IfxScuCcu_K3divider_26 : IfxScuCcu.h
  • IfxScuCcu_K3divider_27 : IfxScuCcu.h
  • IfxScuCcu_K3divider_28 : IfxScuCcu.h
  • IfxScuCcu_K3divider_29 : IfxScuCcu.h
  • IfxScuCcu_K3divider_3 : IfxScuCcu.h
  • IfxScuCcu_K3divider_30 : IfxScuCcu.h
  • IfxScuCcu_K3divider_31 : IfxScuCcu.h
  • IfxScuCcu_K3divider_32 : IfxScuCcu.h
  • IfxScuCcu_K3divider_33 : IfxScuCcu.h
  • IfxScuCcu_K3divider_34 : IfxScuCcu.h
  • IfxScuCcu_K3divider_35 : IfxScuCcu.h
  • IfxScuCcu_K3divider_36 : IfxScuCcu.h
  • IfxScuCcu_K3divider_37 : IfxScuCcu.h
  • IfxScuCcu_K3divider_38 : IfxScuCcu.h
  • IfxScuCcu_K3divider_39 : IfxScuCcu.h
  • IfxScuCcu_K3divider_4 : IfxScuCcu.h
  • IfxScuCcu_K3divider_40 : IfxScuCcu.h
  • IfxScuCcu_K3divider_41 : IfxScuCcu.h
  • IfxScuCcu_K3divider_42 : IfxScuCcu.h
  • IfxScuCcu_K3divider_43 : IfxScuCcu.h
  • IfxScuCcu_K3divider_44 : IfxScuCcu.h
  • IfxScuCcu_K3divider_45 : IfxScuCcu.h
  • IfxScuCcu_K3divider_46 : IfxScuCcu.h
  • IfxScuCcu_K3divider_47 : IfxScuCcu.h
  • IfxScuCcu_K3divider_48 : IfxScuCcu.h
  • IfxScuCcu_K3divider_49 : IfxScuCcu.h
  • IfxScuCcu_K3divider_5 : IfxScuCcu.h
  • IfxScuCcu_K3divider_50 : IfxScuCcu.h
  • IfxScuCcu_K3divider_51 : IfxScuCcu.h
  • IfxScuCcu_K3divider_52 : IfxScuCcu.h
  • IfxScuCcu_K3divider_53 : IfxScuCcu.h
  • IfxScuCcu_K3divider_54 : IfxScuCcu.h
  • IfxScuCcu_K3divider_55 : IfxScuCcu.h
  • IfxScuCcu_K3divider_56 : IfxScuCcu.h
  • IfxScuCcu_K3divider_57 : IfxScuCcu.h
  • IfxScuCcu_K3divider_58 : IfxScuCcu.h
  • IfxScuCcu_K3divider_59 : IfxScuCcu.h
  • IfxScuCcu_K3divider_6 : IfxScuCcu.h
  • IfxScuCcu_K3divider_60 : IfxScuCcu.h
  • IfxScuCcu_K3divider_61 : IfxScuCcu.h
  • IfxScuCcu_K3divider_62 : IfxScuCcu.h
  • IfxScuCcu_K3divider_63 : IfxScuCcu.h
  • IfxScuCcu_K3divider_64 : IfxScuCcu.h
  • IfxScuCcu_K3divider_65 : IfxScuCcu.h
  • IfxScuCcu_K3divider_66 : IfxScuCcu.h
  • IfxScuCcu_K3divider_67 : IfxScuCcu.h
  • IfxScuCcu_K3divider_68 : IfxScuCcu.h
  • IfxScuCcu_K3divider_69 : IfxScuCcu.h
  • IfxScuCcu_K3divider_7 : IfxScuCcu.h
  • IfxScuCcu_K3divider_70 : IfxScuCcu.h
  • IfxScuCcu_K3divider_71 : IfxScuCcu.h
  • IfxScuCcu_K3divider_72 : IfxScuCcu.h
  • IfxScuCcu_K3divider_73 : IfxScuCcu.h
  • IfxScuCcu_K3divider_74 : IfxScuCcu.h
  • IfxScuCcu_K3divider_75 : IfxScuCcu.h
  • IfxScuCcu_K3divider_76 : IfxScuCcu.h
  • IfxScuCcu_K3divider_77 : IfxScuCcu.h
  • IfxScuCcu_K3divider_78 : IfxScuCcu.h
  • IfxScuCcu_K3divider_79 : IfxScuCcu.h
  • IfxScuCcu_K3divider_8 : IfxScuCcu.h
  • IfxScuCcu_K3divider_80 : IfxScuCcu.h
  • IfxScuCcu_K3divider_81 : IfxScuCcu.h
  • IfxScuCcu_K3divider_82 : IfxScuCcu.h
  • IfxScuCcu_K3divider_83 : IfxScuCcu.h
  • IfxScuCcu_K3divider_84 : IfxScuCcu.h
  • IfxScuCcu_K3divider_85 : IfxScuCcu.h
  • IfxScuCcu_K3divider_86 : IfxScuCcu.h
  • IfxScuCcu_K3divider_87 : IfxScuCcu.h
  • IfxScuCcu_K3divider_88 : IfxScuCcu.h
  • IfxScuCcu_K3divider_89 : IfxScuCcu.h
  • IfxScuCcu_K3divider_9 : IfxScuCcu.h
  • IfxScuCcu_K3divider_90 : IfxScuCcu.h
  • IfxScuCcu_K3divider_91 : IfxScuCcu.h
  • IfxScuCcu_K3divider_92 : IfxScuCcu.h
  • IfxScuCcu_K3divider_93 : IfxScuCcu.h
  • IfxScuCcu_K3divider_94 : IfxScuCcu.h
  • IfxScuCcu_K3divider_95 : IfxScuCcu.h
  • IfxScuCcu_K3divider_96 : IfxScuCcu.h
  • IfxScuCcu_K3divider_97 : IfxScuCcu.h
  • IfxScuCcu_K3divider_98 : IfxScuCcu.h
  • IfxScuCcu_K3divider_99 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_1 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_10 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_100 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_101 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_102 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_103 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_104 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_105 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_106 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_107 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_108 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_109 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_11 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_110 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_111 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_112 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_113 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_114 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_115 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_116 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_117 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_118 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_119 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_12 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_120 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_121 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_122 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_123 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_124 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_125 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_126 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_127 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_128 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_13 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_14 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_15 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_16 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_17 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_18 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_19 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_2 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_20 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_21 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_22 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_23 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_24 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_25 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_26 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_27 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_28 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_29 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_3 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_30 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_31 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_32 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_33 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_34 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_35 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_36 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_37 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_38 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_39 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_4 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_40 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_41 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_42 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_43 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_44 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_45 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_46 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_47 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_48 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_49 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_5 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_50 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_51 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_52 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_53 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_54 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_55 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_56 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_57 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_58 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_59 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_6 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_60 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_61 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_62 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_63 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_64 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_65 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_66 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_67 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_68 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_69 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_7 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_70 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_71 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_72 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_73 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_74 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_75 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_76 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_77 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_78 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_79 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_8 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_80 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_81 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_82 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_83 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_84 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_85 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_86 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_87 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_88 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_89 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_9 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_90 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_91 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_92 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_93 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_94 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_95 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_96 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_97 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_98 : IfxScuCcu.h
  • IfxScuCcu_Ndivider_99 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_1 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_10 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_11 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_12 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_13 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_14 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_15 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_16 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_2 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_3 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_4 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_5 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_6 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_7 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_8 : IfxScuCcu.h
  • IfxScuCcu_Pdivider_9 : IfxScuCcu.h
  • IfxScuEru_ExternalInputSelection_0 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_1 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_2 : IfxScuEru.h
  • IfxScuEru_ExternalInputSelection_3 : IfxScuEru.h
  • IfxScuEru_InputChannel_0 : IfxScuEru.h
  • IfxScuEru_InputChannel_1 : IfxScuEru.h
  • IfxScuEru_InputChannel_2 : IfxScuEru.h
  • IfxScuEru_InputChannel_3 : IfxScuEru.h
  • IfxScuEru_InputChannel_4 : IfxScuEru.h
  • IfxScuEru_InputChannel_5 : IfxScuEru.h
  • IfxScuEru_InputChannel_6 : IfxScuEru.h
  • IfxScuEru_InputChannel_7 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_0 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_1 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_2 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_3 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_4 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_5 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_6 : IfxScuEru.h
  • IfxScuEru_InputNodePointer_7 : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_alwaysActive : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_none : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_patternMatch : IfxScuEru.h
  • IfxScuEru_InterruptGatingPattern_patternMiss : IfxScuEru.h
  • IfxScuEru_OutputChannel_0 : IfxScuEru.h
  • IfxScuEru_OutputChannel_1 : IfxScuEru.h
  • IfxScuEru_OutputChannel_2 : IfxScuEru.h
  • IfxScuEru_OutputChannel_3 : IfxScuEru.h
  • IfxScuEru_OutputChannel_4 : IfxScuEru.h
  • IfxScuEru_OutputChannel_5 : IfxScuEru.h
  • IfxScuEru_OutputChannel_6 : IfxScuEru.h
  • IfxScuEru_OutputChannel_7 : IfxScuEru.h
  • IfxSent_AlternateInput_0 : IfxSent.h
  • IfxSent_AlternateInput_1 : IfxSent.h
  • IfxSent_AlternateInput_2 : IfxSent.h
  • IfxSent_AlternateInput_3 : IfxSent.h
  • IfxSent_ChannelId_0 : IfxSent_cfg.h
  • IfxSent_ChannelId_1 : IfxSent_cfg.h
  • IfxSent_ChannelId_2 : IfxSent_cfg.h
  • IfxSent_ChannelId_3 : IfxSent_cfg.h
  • IfxSent_ChannelId_4 : IfxSent_cfg.h
  • IfxSent_ChannelId_5 : IfxSent_cfg.h
  • IfxSent_ChannelId_none : IfxSent_cfg.h
  • IfxSent_ChannelStatus_initialize : IfxSent.h
  • IfxSent_ChannelStatus_running : IfxSent.h
  • IfxSent_ChannelStatus_stop : IfxSent.h
  • IfxSent_ChannelStatus_synchronize : IfxSent.h
  • IfxSent_ClockDividerMode_fractional : IfxSent.h
  • IfxSent_ClockDividerMode_normal : IfxSent.h
  • IfxSent_ClockDividerMode_off : IfxSent.h
  • IfxSent_ConfigBit_0 : IfxSent.h
  • IfxSent_ConfigBit_1 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_1 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_10 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_11 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_12 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_13 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_14 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_15 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_2 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_3 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_4 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_5 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_6 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_7 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_8 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_9 : IfxSent.h
  • IfxSent_DigitalGlitchesLength_off : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode_extended : IfxSent.h
  • IfxSent_ExtendedSerialFrameMode_standard : IfxSent.h
  • IfxSent_ExternalTrigger_0 : IfxSent.h
  • IfxSent_ExternalTrigger_1 : IfxSent.h
  • IfxSent_ExternalTrigger_2 : IfxSent.h
  • IfxSent_ExternalTrigger_3 : IfxSent.h
  • IfxSent_ExternalTrigger_4 : IfxSent.h
  • IfxSent_ExternalTrigger_5 : IfxSent.h
  • IfxSent_ExternalTrigger_6 : IfxSent.h
  • IfxSent_ExternalTrigger_7 : IfxSent.h
  • IfxSent_ExternalTrigger_8 : IfxSent.h
  • IfxSent_ExternalTrigger_9 : IfxSent.h
  • IfxSent_FrameCheckMode_futureSuncPulse : IfxSent.h
  • IfxSent_FrameCheckMode_pastSyncPulse : IfxSent.h
  • IfxSent_InterruptNodePointer_0 : IfxSent.h
  • IfxSent_InterruptNodePointer_1 : IfxSent.h
  • IfxSent_InterruptNodePointer_2 : IfxSent.h
  • IfxSent_InterruptNodePointer_3 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo0 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo1 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo2 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo3 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo4 : IfxSent.h
  • IfxSent_InterruptNodePointer_trigo5 : IfxSent.h
  • IfxSent_InterruptSource_crci : IfxSent.h
  • IfxSent_InterruptSource_fdi : IfxSent.h
  • IfxSent_InterruptSource_fri : IfxSent.h
  • IfxSent_InterruptSource_nni : IfxSent.h
  • IfxSent_InterruptSource_nvi : IfxSent.h
  • IfxSent_InterruptSource_rbi : IfxSent.h
  • IfxSent_InterruptSource_rdi : IfxSent.h
  • IfxSent_InterruptSource_rsi : IfxSent.h
  • IfxSent_InterruptSource_scri : IfxSent.h
  • IfxSent_InterruptSource_sdi : IfxSent.h
  • IfxSent_InterruptSource_tbi : IfxSent.h
  • IfxSent_InterruptSource_tdi : IfxSent.h
  • IfxSent_InterruptSource_wdi : IfxSent.h
  • IfxSent_InterruptSource_wsi : IfxSent.h
  • IfxSent_Nibble_0 : IfxSent.h
  • IfxSent_Nibble_1 : IfxSent.h
  • IfxSent_Nibble_2 : IfxSent.h
  • IfxSent_Nibble_3 : IfxSent.h
  • IfxSent_Nibble_4 : IfxSent.h
  • IfxSent_Nibble_5 : IfxSent.h
  • IfxSent_Nibble_6 : IfxSent.h
  • IfxSent_Nibble_7 : IfxSent.h
  • IfxSent_SleepMode_disable : IfxSent.h
  • IfxSent_SleepMode_enable : IfxSent.h
  • IfxSent_SpcMode_bidirectional : IfxSent.h
  • IfxSent_SpcMode_range : IfxSent.h
  • IfxSent_SpcMode_sync : IfxSent.h
  • IfxSent_SuspendMode_hard : IfxSent.h
  • IfxSent_SuspendMode_none : IfxSent.h
  • IfxSent_SuspendMode_soft : IfxSent.h
  • IfxSent_TimeBase_measuredFrequency : IfxSent.h
  • IfxSent_TimeBase_nominalFrequency : IfxSent.h
  • IfxSent_TriggerSource_externalTrigger : IfxSent.h
  • IfxSent_TriggerSource_fallingEdge : IfxSent.h
  • IfxSent_TriggerSource_immediate : IfxSent.h
  • IfxSent_TriggerSource_off : IfxSent.h
  • IfxSmu_Alarm_CanSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_CanSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0LockstepComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1LockstepComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_EmemSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_FlexraySramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_GtmSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_IomPinMismatchIndication : IfxSmu_cfg.h
  • IfxSmu_Alarm_IrEdcError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuEccError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_LmuSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_noAlarm : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuAddressBufferFull : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuAddressingError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuDoubleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuEdcComparatorError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuNonCorrectableMultipleBit : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuPflashEccError : IfxSmu_cfg.h
  • IfxSmu_Alarm_PmuSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguInputClockOutOfRange : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuDtsTemperatureOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuDtsTemperatureUnderflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuExternalEmergencyStopSignal : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtsWatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_ScuWdtWatchdogTimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuErrorPinFaultStateActivation : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuTimer0TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SmuTimer1TimeOut : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm0 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm1 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm10 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm11 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm12 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm13 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm14 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm15 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm2 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm3 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm4 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm5 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm6 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm7 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm8 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SoftwareAlarm9 : IfxSmu_cfg.h
  • IfxSmu_Alarm_SpbAccessEnableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SpbBusError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramAddressBufferOverflow : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramAddressError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramSingleBitCorrection : IfxSmu_cfg.h
  • IfxSmu_Alarm_SramsSramUncorrectableError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriBusError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcAddressPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcReadPhaseError : IfxSmu_cfg.h
  • IfxSmu_Alarm_SriEdcWritePhaseError : IfxSmu_cfg.h
  • IfxSmu_AlarmConfig_cpuIdle : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet0 : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet1 : IfxSmu.h
  • IfxSmu_AlarmConfig_interruptSet2 : IfxSmu.h
  • IfxSmu_AlarmConfig_nmi : IfxSmu.h
  • IfxSmu_AlarmConfig_noAction : IfxSmu.h
  • IfxSmu_AlarmConfig_scuReset : IfxSmu.h
  • IfxSmu_AlarmGroup_0 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_1 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_2 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_3 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_4 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_5 : IfxSmu_cfg.h
  • IfxSmu_AlarmGroup_6 : IfxSmu_cfg.h
  • IfxSmu_Cmd_activateFsp : IfxSmu.h
  • IfxSmu_Cmd_activatePes : IfxSmu.h
  • IfxSmu_Cmd_enableClearAlarmStatus : IfxSmu.h
  • IfxSmu_Cmd_releaseFsp : IfxSmu.h
  • IfxSmu_Cmd_start : IfxSmu.h
  • IfxSmu_Cmd_stopRecoveryTimer : IfxSmu.h
  • IfxSmu_Cmd_triggerAlarm : IfxSmu.h
  • IfxSmu_Fsp_Mode_bistable : IfxSmu.h
  • IfxSmu_Fsp_Mode_timeSwitching : IfxSmu.h
  • IfxSmu_RecoveryTimer_0 : IfxSmu_cfg.h
  • IfxSmu_RecoveryTimer_1 : IfxSmu_cfg.h
  • IfxSrc_Tos_cpu0 : IfxSrc_cfg.h
  • IfxSrc_Tos_cpu1 : IfxSrc_cfg.h
  • IfxSrc_Tos_dma : IfxSrc_cfg.h
  • IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos.h
  • IfxStdIf_Pos_Dir_unknown : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType_linear : IfxStdIf_Pos.h
  • IfxStdIf_Pos_MotionType_rotating : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_fourFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_oneFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_ResolutionFactor_twoFold : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_angletrk : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_encoder : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_hall : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_igmr : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_resolver : IfxStdIf_Pos.h
  • IfxStdIf_Pos_SensorType_virtual : IfxStdIf_Pos.h
  • IfxStdIf_Timer_CountDir_down : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_up : IfxStdIf_Timer.h
  • IfxStdIf_Timer_CountDir_upAndDown : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Output_disabled : IfxStdIf_Timer.h
  • IfxStdIf_Timer_Output_enabled : IfxStdIf_Timer.h
  • IfxStm_Comparator_0 : IfxStm.h
  • IfxStm_Comparator_1 : IfxStm.h
  • IfxStm_ComparatorInterrupt_ir0 : IfxStm.h
  • IfxStm_ComparatorInterrupt_ir1 : IfxStm.h
  • IfxStm_ComparatorOffset_0 : IfxStm.h
  • IfxStm_ComparatorOffset_1 : IfxStm.h
  • IfxStm_ComparatorOffset_10 : IfxStm.h
  • IfxStm_ComparatorOffset_11 : IfxStm.h
  • IfxStm_ComparatorOffset_12 : IfxStm.h
  • IfxStm_ComparatorOffset_13 : IfxStm.h
  • IfxStm_ComparatorOffset_14 : IfxStm.h
  • IfxStm_ComparatorOffset_15 : IfxStm.h
  • IfxStm_ComparatorOffset_16 : IfxStm.h
  • IfxStm_ComparatorOffset_17 : IfxStm.h
  • IfxStm_ComparatorOffset_18 : IfxStm.h
  • IfxStm_ComparatorOffset_19 : IfxStm.h
  • IfxStm_ComparatorOffset_2 : IfxStm.h
  • IfxStm_ComparatorOffset_20 : IfxStm.h
  • IfxStm_ComparatorOffset_21 : IfxStm.h
  • IfxStm_ComparatorOffset_22 : IfxStm.h
  • IfxStm_ComparatorOffset_23 : IfxStm.h
  • IfxStm_ComparatorOffset_24 : IfxStm.h
  • IfxStm_ComparatorOffset_25 : IfxStm.h
  • IfxStm_ComparatorOffset_26 : IfxStm.h
  • IfxStm_ComparatorOffset_27 : IfxStm.h
  • IfxStm_ComparatorOffset_28 : IfxStm.h
  • IfxStm_ComparatorOffset_29 : IfxStm.h
  • IfxStm_ComparatorOffset_3 : IfxStm.h
  • IfxStm_ComparatorOffset_30 : IfxStm.h
  • IfxStm_ComparatorOffset_31 : IfxStm.h
  • IfxStm_ComparatorOffset_4 : IfxStm.h
  • IfxStm_ComparatorOffset_5 : IfxStm.h
  • IfxStm_ComparatorOffset_6 : IfxStm.h
  • IfxStm_ComparatorOffset_7 : IfxStm.h
  • IfxStm_ComparatorOffset_8 : IfxStm.h
  • IfxStm_ComparatorOffset_9 : IfxStm.h
  • IfxStm_ComparatorSize_10Bits : IfxStm.h
  • IfxStm_ComparatorSize_11Bits : IfxStm.h
  • IfxStm_ComparatorSize_12Bits : IfxStm.h
  • IfxStm_ComparatorSize_13Bits : IfxStm.h
  • IfxStm_ComparatorSize_14Bits : IfxStm.h
  • IfxStm_ComparatorSize_15Bits : IfxStm.h
  • IfxStm_ComparatorSize_16Bits : IfxStm.h
  • IfxStm_ComparatorSize_17Bits : IfxStm.h
  • IfxStm_ComparatorSize_18Bits : IfxStm.h
  • IfxStm_ComparatorSize_19Bits : IfxStm.h
  • IfxStm_ComparatorSize_1Bit : IfxStm.h
  • IfxStm_ComparatorSize_20Bits : IfxStm.h
  • IfxStm_ComparatorSize_21Bits : IfxStm.h
  • IfxStm_ComparatorSize_22Bits : IfxStm.h
  • IfxStm_ComparatorSize_23Bits : IfxStm.h
  • IfxStm_ComparatorSize_24Bits : IfxStm.h
  • IfxStm_ComparatorSize_25Bits : IfxStm.h
  • IfxStm_ComparatorSize_26Bits : IfxStm.h
  • IfxStm_ComparatorSize_27Bits : IfxStm.h
  • IfxStm_ComparatorSize_28Bits : IfxStm.h
  • IfxStm_ComparatorSize_29Bits : IfxStm.h
  • IfxStm_ComparatorSize_2Bits : IfxStm.h
  • IfxStm_ComparatorSize_30Bits : IfxStm.h
  • IfxStm_ComparatorSize_31Bits : IfxStm.h
  • IfxStm_ComparatorSize_32Bits : IfxStm.h
  • IfxStm_ComparatorSize_3Bits : IfxStm.h
  • IfxStm_ComparatorSize_4Bits : IfxStm.h
  • IfxStm_ComparatorSize_5Bits : IfxStm.h
  • IfxStm_ComparatorSize_6Bits : IfxStm.h
  • IfxStm_ComparatorSize_7Bits : IfxStm.h
  • IfxStm_ComparatorSize_8Bits : IfxStm.h
  • IfxStm_ComparatorSize_9Bits : IfxStm.h
  • IfxStm_Index_0 : IfxStm_cfg.h
  • IfxStm_Index_1 : IfxStm_cfg.h
  • IfxStm_Index_none : IfxStm_cfg.h
  • IfxStm_SleepMode_disable : IfxStm.h
  • IfxStm_SleepMode_enable : IfxStm.h
  • IfxStm_SuspendMode_hard : IfxStm.h
  • IfxStm_SuspendMode_none : IfxStm.h
  • IfxStm_SuspendMode_soft : IfxStm.h
  • IfxVadc_AnalogConverterMode_fastStandby : IfxVadc.h
  • IfxVadc_AnalogConverterMode_normalOperation : IfxVadc.h
  • IfxVadc_AnalogConverterMode_off : IfxVadc.h
  • IfxVadc_AnalogConverterMode_slowStandby : IfxVadc.h
  • IfxVadc_ArbitrationRounds_16_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_20_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_4_slots : IfxVadc.h
  • IfxVadc_ArbitrationRounds_8_slots : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult1 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult10 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult11 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult12 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult13 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult14 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult15 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult2 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult3 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult4 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult5 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult6 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult7 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult8 : IfxVadc.h
  • IfxVadc_BoundaryExtension_fastCompareResult9 : IfxVadc.h
  • IfxVadc_BoundaryExtension_standard : IfxVadc.h
  • IfxVadc_BoundarySelection_global0 : IfxVadc.h
  • IfxVadc_BoundarySelection_global1 : IfxVadc.h
  • IfxVadc_BoundarySelection_group0 : IfxVadc.h
  • IfxVadc_BoundarySelection_group1 : IfxVadc.h
  • IfxVadc_ChannelId_0 : IfxVadc.h
  • IfxVadc_ChannelId_1 : IfxVadc.h
  • IfxVadc_ChannelId_10 : IfxVadc.h
  • IfxVadc_ChannelId_11 : IfxVadc.h
  • IfxVadc_ChannelId_12 : IfxVadc.h
  • IfxVadc_ChannelId_13 : IfxVadc.h
  • IfxVadc_ChannelId_14 : IfxVadc.h
  • IfxVadc_ChannelId_15 : IfxVadc.h
  • IfxVadc_ChannelId_2 : IfxVadc.h
  • IfxVadc_ChannelId_3 : IfxVadc.h
  • IfxVadc_ChannelId_4 : IfxVadc.h
  • IfxVadc_ChannelId_5 : IfxVadc.h
  • IfxVadc_ChannelId_6 : IfxVadc.h
  • IfxVadc_ChannelId_7 : IfxVadc.h
  • IfxVadc_ChannelId_8 : IfxVadc.h
  • IfxVadc_ChannelId_9 : IfxVadc.h
  • IfxVadc_ChannelId_none : IfxVadc.h
  • IfxVadc_ChannelReference_channel0 : IfxVadc.h
  • IfxVadc_ChannelReference_standard : IfxVadc.h
  • IfxVadc_ChannelResolution_10bit : IfxVadc.h
  • IfxVadc_ChannelResolution_10bitFast : IfxVadc.h
  • IfxVadc_ChannelResolution_12bit : IfxVadc.h
  • IfxVadc_ChannelResolution_8bit : IfxVadc.h
  • IfxVadc_ChannelResult_0 : IfxVadc.h
  • IfxVadc_ChannelResult_1 : IfxVadc.h
  • IfxVadc_ChannelResult_10 : IfxVadc.h
  • IfxVadc_ChannelResult_11 : IfxVadc.h
  • IfxVadc_ChannelResult_12 : IfxVadc.h
  • IfxVadc_ChannelResult_13 : IfxVadc.h
  • IfxVadc_ChannelResult_14 : IfxVadc.h
  • IfxVadc_ChannelResult_15 : IfxVadc.h
  • IfxVadc_ChannelResult_2 : IfxVadc.h
  • IfxVadc_ChannelResult_3 : IfxVadc.h
  • IfxVadc_ChannelResult_4 : IfxVadc.h
  • IfxVadc_ChannelResult_5 : IfxVadc.h
  • IfxVadc_ChannelResult_6 : IfxVadc.h
  • IfxVadc_ChannelResult_7 : IfxVadc.h
  • IfxVadc_ChannelResult_8 : IfxVadc.h
  • IfxVadc_ChannelResult_9 : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle_binary : IfxVadc.h
  • IfxVadc_ChannelSelectionStyle_channelNumber : IfxVadc.h
  • IfxVadc_ConversionType_Compatible : IfxVadc.h
  • IfxVadc_EmuxCodingScheme_binary : IfxVadc.h
  • IfxVadc_EmuxCodingScheme_gray : IfxVadc.h
  • IfxVadc_EmuxInterface_0 : IfxVadc.h
  • IfxVadc_EmuxInterface_1 : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl_always : IfxVadc.h
  • IfxVadc_EmuxSampleTimeControl_settingChanges : IfxVadc.h
  • IfxVadc_EmuxSelectValue_0 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_1 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_2 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_3 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_4 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_5 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_6 : IfxVadc.h
  • IfxVadc_EmuxSelectValue_7 : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_sequence : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_singleStep : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_softwareControl : IfxVadc.h
  • IfxVadc_ExternalMultiplexerMode_steady : IfxVadc.h
  • IfxVadc_FifoMode_fifoStructure : IfxVadc.h
  • IfxVadc_FifoMode_maximumMode : IfxVadc.h
  • IfxVadc_FifoMode_minimumMode : IfxVadc.h
  • IfxVadc_FifoMode_seperateResultRegister : IfxVadc.h
  • IfxVadc_GatingMode_always : IfxVadc.h
  • IfxVadc_GatingMode_disabled : IfxVadc.h
  • IfxVadc_GatingMode_gatingHigh : IfxVadc.h
  • IfxVadc_GatingMode_gatingLow : IfxVadc.h
  • IfxVadc_GatingSource_0 : IfxVadc.h
  • IfxVadc_GatingSource_1 : IfxVadc.h
  • IfxVadc_GatingSource_10 : IfxVadc.h
  • IfxVadc_GatingSource_11 : IfxVadc.h
  • IfxVadc_GatingSource_12 : IfxVadc.h
  • IfxVadc_GatingSource_13 : IfxVadc.h
  • IfxVadc_GatingSource_14 : IfxVadc.h
  • IfxVadc_GatingSource_15 : IfxVadc.h
  • IfxVadc_GatingSource_2 : IfxVadc.h
  • IfxVadc_GatingSource_3 : IfxVadc.h
  • IfxVadc_GatingSource_4 : IfxVadc.h
  • IfxVadc_GatingSource_5 : IfxVadc.h
  • IfxVadc_GatingSource_6 : IfxVadc.h
  • IfxVadc_GatingSource_7 : IfxVadc.h
  • IfxVadc_GatingSource_8 : IfxVadc.h
  • IfxVadc_GatingSource_9 : IfxVadc.h
  • IfxVadc_GroupId_0 : IfxVadc_cfg.h
  • IfxVadc_GroupId_1 : IfxVadc_cfg.h
  • IfxVadc_GroupId_2 : IfxVadc_cfg.h
  • IfxVadc_GroupId_3 : IfxVadc_cfg.h
  • IfxVadc_GroupId_global0 : IfxVadc_cfg.h
  • IfxVadc_GroupId_global1 : IfxVadc_cfg.h
  • IfxVadc_InputClasses_global0 : IfxVadc.h
  • IfxVadc_InputClasses_global1 : IfxVadc.h
  • IfxVadc_InputClasses_group0 : IfxVadc.h
  • IfxVadc_InputClasses_group1 : IfxVadc.h
  • IfxVadc_LimitCheck_always : IfxVadc.h
  • IfxVadc_LimitCheck_eventIfInArea : IfxVadc.h
  • IfxVadc_LimitCheck_eventIfOutsideArea : IfxVadc.h
  • IfxVadc_LimitCheck_noCheck : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect_3V : IfxVadc.h
  • IfxVadc_LowSupplyVoltageSelect_5V : IfxVadc.h
  • IfxVadc_Protection_channelControl0 : IfxVadc.h
  • IfxVadc_Protection_channelControl1 : IfxVadc.h
  • IfxVadc_Protection_channelControl10 : IfxVadc.h
  • IfxVadc_Protection_channelControl11 : IfxVadc.h
  • IfxVadc_Protection_channelControl12 : IfxVadc.h
  • IfxVadc_Protection_channelControl13 : IfxVadc.h
  • IfxVadc_Protection_channelControl14 : IfxVadc.h
  • IfxVadc_Protection_channelControl2 : IfxVadc.h
  • IfxVadc_Protection_channelControl3 : IfxVadc.h
  • IfxVadc_Protection_channelControl4 : IfxVadc.h
  • IfxVadc_Protection_channelControl5 : IfxVadc.h
  • IfxVadc_Protection_channelControl6 : IfxVadc.h
  • IfxVadc_Protection_channelControl7 : IfxVadc.h
  • IfxVadc_Protection_channelControl8 : IfxVadc.h
  • IfxVadc_Protection_channelControl9 : IfxVadc.h
  • IfxVadc_Protection_externalMultiplexer : IfxVadc.h
  • IfxVadc_Protection_globalConfig : IfxVadc.h
  • IfxVadc_Protection_initGroup0 : IfxVadc.h
  • IfxVadc_Protection_initGroup1 : IfxVadc.h
  • IfxVadc_Protection_initGroup10 : IfxVadc.h
  • IfxVadc_Protection_initGroup11 : IfxVadc.h
  • IfxVadc_Protection_initGroup12 : IfxVadc.h
  • IfxVadc_Protection_initGroup13 : IfxVadc.h
  • IfxVadc_Protection_initGroup14 : IfxVadc.h
  • IfxVadc_Protection_initGroup2 : IfxVadc.h
  • IfxVadc_Protection_initGroup3 : IfxVadc.h
  • IfxVadc_Protection_initGroup4 : IfxVadc.h
  • IfxVadc_Protection_initGroup5 : IfxVadc.h
  • IfxVadc_Protection_initGroup6 : IfxVadc.h
  • IfxVadc_Protection_initGroup7 : IfxVadc.h
  • IfxVadc_Protection_initGroup8 : IfxVadc.h
  • IfxVadc_Protection_initGroup9 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup0 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup1 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup10 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup11 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup12 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup13 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup14 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup2 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup3 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup4 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup5 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup6 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup7 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup8 : IfxVadc.h
  • IfxVadc_Protection_resultRegisterGroup9 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup0 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup1 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup10 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup11 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup12 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup13 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup14 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup2 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup3 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup4 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup5 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup6 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup7 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup8 : IfxVadc.h
  • IfxVadc_Protection_serviceGroup9 : IfxVadc.h
  • IfxVadc_Protection_testFunction : IfxVadc.h
  • IfxVadc_RequestSlotPriority_high : IfxVadc.h
  • IfxVadc_RequestSlotPriority_highest : IfxVadc.h
  • IfxVadc_RequestSlotPriority_low : IfxVadc.h
  • IfxVadc_RequestSlotPriority_lowest : IfxVadc.h
  • IfxVadc_RequestSlotStartMode_cancelInjectRepeat : IfxVadc.h
  • IfxVadc_RequestSlotStartMode_waitForStart : IfxVadc.h
  • IfxVadc_RequestSource_background : IfxVadc.h
  • IfxVadc_RequestSource_queue : IfxVadc.h
  • IfxVadc_RequestSource_scan : IfxVadc.h
  • IfxVadc_SleepMode_disable : IfxVadc.h
  • IfxVadc_SleepMode_enable : IfxVadc.h
  • IfxVadc_SrcNr_group0 : IfxVadc.h
  • IfxVadc_SrcNr_group1 : IfxVadc.h
  • IfxVadc_SrcNr_group2 : IfxVadc.h
  • IfxVadc_SrcNr_group3 : IfxVadc.h
  • IfxVadc_SrcNr_shared0 : IfxVadc.h
  • IfxVadc_SrcNr_shared1 : IfxVadc.h
  • IfxVadc_SrcNr_shared2 : IfxVadc.h
  • IfxVadc_SrcNr_shared3 : IfxVadc.h
  • IfxVadc_Status_channelsStillPending : IfxVadc.h
  • IfxVadc_Status_invalidChannel : IfxVadc.h
  • IfxVadc_Status_invalidGroup : IfxVadc.h
  • IfxVadc_Status_noAccess : IfxVadc.h
  • IfxVadc_Status_noError : IfxVadc.h
  • IfxVadc_Status_notInitialised : IfxVadc.h
  • IfxVadc_Status_queueFull : IfxVadc.h
  • IfxVadc_TriggerMode_noExternalTrigger : IfxVadc.h
  • IfxVadc_TriggerMode_uponAnyEdge : IfxVadc.h
  • IfxVadc_TriggerMode_uponFallingEdge : IfxVadc.h
  • IfxVadc_TriggerMode_uponRisingEdge : IfxVadc.h
  • IfxVadc_TriggerSource_0 : IfxVadc.h
  • IfxVadc_TriggerSource_1 : IfxVadc.h
  • IfxVadc_TriggerSource_10 : IfxVadc.h
  • IfxVadc_TriggerSource_11 : IfxVadc.h
  • IfxVadc_TriggerSource_12 : IfxVadc.h
  • IfxVadc_TriggerSource_13 : IfxVadc.h
  • IfxVadc_TriggerSource_14 : IfxVadc.h
  • IfxVadc_TriggerSource_15 : IfxVadc.h
  • IfxVadc_TriggerSource_2 : IfxVadc.h
  • IfxVadc_TriggerSource_3 : IfxVadc.h
  • IfxVadc_TriggerSource_4 : IfxVadc.h
  • IfxVadc_TriggerSource_5 : IfxVadc.h
  • IfxVadc_TriggerSource_6 : IfxVadc.h
  • IfxVadc_TriggerSource_7 : IfxVadc.h
  • IfxVadc_TriggerSource_8 : IfxVadc.h
  • IfxVadc_TriggerSource_9 : IfxVadc.h


iLLD_TC26B: Globals

- s -

  • SpiIf_ClockPolarity_idleHigh : SpiIf.h
  • SpiIf_ClockPolarity_idleLow : SpiIf.h
  • SpiIf_DataHeading_lsbFirst : SpiIf.h
  • SpiIf_DataHeading_msbFirst : SpiIf.h
  • SpiIf_Mode_master : SpiIf.h
  • SpiIf_Mode_slave : SpiIf.h
  • SpiIf_Mode_undefined : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf.h
  • SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge : SpiIf.h
  • SpiIf_SlsoTiming_0 : SpiIf.h
  • SpiIf_SlsoTiming_1 : SpiIf.h
  • SpiIf_SlsoTiming_2 : SpiIf.h
  • SpiIf_SlsoTiming_3 : SpiIf.h
  • SpiIf_SlsoTiming_4 : SpiIf.h
  • SpiIf_SlsoTiming_5 : SpiIf.h
  • SpiIf_SlsoTiming_6 : SpiIf.h
  • SpiIf_SlsoTiming_7 : SpiIf.h
  • SpiIf_Status_busy : SpiIf.h
  • SpiIf_Status_ok : SpiIf.h
  • SpiIf_Status_unknown : SpiIf.h


iLLD_TC26B: Globals

- _ -

  • ___setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • __abs : IfxCpu_IntrinsicsGnuc.h
  • __abs_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __absb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __absdif : IfxCpu_IntrinsicsGnuc.h
  • __absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __absh : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __abss : IfxCpu_IntrinsicsGnuc.h
  • __abssh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __adds : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __addsu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __asm__ : Ifx_TypesTasking.h
  • __bisr : IfxCpu_IntrinsicsGnuc.h
  • __cacheai : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheawi : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __cacheawi_bo_post_inc : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __cacheiwi : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __clo : IfxCpu_IntrinsicsGnuc.h
  • __cls : IfxCpu_IntrinsicsGnuc.h
  • __clssf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __clz : IfxCpu_IntrinsicsGnuc.h
  • __cmpAndSwap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __crc32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __CSA : CompilerTasking.h , CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h
  • __CSA_END : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __debug : IfxCpu_IntrinsicsGnuc.h
  • __disable : IfxCpu_IntrinsicsGnuc.h
  • __disable_and_save : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __dsync : IfxCpu_IntrinsicsGnuc.h
  • __enable : IfxCpu_IntrinsicsGnuc.h
  • __extr : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extracthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extracthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extractuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __extru : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __fabs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __fabsf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __fixpoint_to_float32 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __float_to_fract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __float_to_sfract : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • __fract_to_float : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getA11 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __getfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __gethw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __gethw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __getuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __imaskldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackbl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initpackhwl : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initupackb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __initupackhw : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __ins : IfxCpu_IntrinsicsGnuc.h
  • __insert : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertbyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __inserthw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __inserthw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertuhw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insertuhw2 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __insn : IfxCpu_IntrinsicsGnuc.h
  • __interrupt : Ifx_TypesGhs.h , Ifx_TypesGnuc.h
  • __INTTAB : CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h
  • __INTTAB_CPU : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __ISTACK : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • __isync : IfxCpu_IntrinsicsGnuc.h
  • __jump_and_link : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpBackToLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpToFunction : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __jumpToFunctionWithLink : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __ldmst : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __ldmstAsm : IfxCpu_IntrinsicsTasking.h
  • __ldmstC : IfxCpu_IntrinsicsTasking.h
  • __leqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mac_r_sf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __mac_sf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __max : IfxCpu_IntrinsicsGnuc.h
  • __max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __maxs : IfxCpu_IntrinsicsGnuc.h
  • __maxu : IfxCpu_IntrinsicsGnuc.h
  • __maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • __mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • __mfcr : IfxCpu_IntrinsicsGnuc.h
  • __min : IfxCpu_IntrinsicsGnuc.h
  • __min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __minb : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minbu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __minh : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __minhu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __mins : IfxCpu_IntrinsicsGnuc.h
  • __minu : IfxCpu_IntrinsicsGnuc.h
  • __minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __moveToAddrParam0 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • __moveToDataParam0 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • __moveToDataParamRet : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h
  • __mtcr : IfxCpu_IntrinsicsGnuc.h
  • __mtcr_no_isync : IfxCpu_IntrinsicsTasking.h
  • __mulfractfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mulfractlong : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __mulsc : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __neqf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __non_return_call : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __nop : IfxCpu_IntrinsicsGnuc.h
  • __nops : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __nops1000 : IfxCpu_IntrinsicsDcc.h
  • __parity : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __popcnt : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __putbit : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __restore : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __rol : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __ror : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __round16 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __roundf : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __rslcx : IfxCpu_IntrinsicsGnuc.h
  • __s16_to_sfract : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __satb : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __satbu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __sath : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __sathu : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __saturate : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __saturate_stdreal : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __saturatef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • __saturateu : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • __saturateX : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __SDATA1 : CompilerGhs.h , CompilerDcc.h , CompilerTasking.h , CompilerGnuc.h
  • __SDATA2 : CompilerGhs.h , CompilerTasking.h , CompilerGnuc.h , CompilerDcc.h
  • __SDATA3 : CompilerGnuc.h , CompilerGhs.h , CompilerTasking.h , CompilerDcc.h
  • __SDATA4 : CompilerDcc.h , CompilerTasking.h , CompilerGhs.h , CompilerGnuc.h
  • __setareg : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __setbyte1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte2 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __setbyte4 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __sethw1 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __sethw2 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __setStackPointer : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __setubyte1 : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __setubyte2 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __setubyte3 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __setubyte4 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __setuhw1 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __setuhw2 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sfract_to_s16 : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __sfract_to_u16 : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __shaaccum : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __shafracts : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsDcc.h
  • __shasfracts : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsGhs.h
  • __sqrf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsDcc.h
  • __sqrtf : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h
  • __stopPerfCounters : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • __subs : IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • __subsu : IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • __svlcx : IfxCpu_IntrinsicsGnuc.h
  • __swap : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __syscall : IfxCpu_IntrinsicsGnuc.h
  • __TRAPTAB : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h , CompilerGhs.h
  • __TRAPTAB_CPU : CompilerGnuc.h , CompilerTasking.h , CompilerGhs.h , CompilerDcc.h
  • __tric_syscall : IfxCpu_IntrinsicsGnuc.h
  • __u16_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • __USTACK : CompilerGhs.h , CompilerTasking.h , CompilerDcc.h , CompilerGnuc.h
  • _DATAF : Ifx_Cf32.h


iLLD_TC26B: Globals

- a -

  • ABCQMAX : IfxQspi.c
  • ABCQMIN : IfxQspi.c
  • ATO_K : Ifx_AngleTrkF32.c
  • ATO_PSI : Ifx_AngleTrkF32.c
  • ATO_T : Ifx_AngleTrkF32.c


iLLD_TC26B: Globals

- b -

  • BSP_DEFAULT_TIMER : Bsp.h


iLLD_TC26B: Globals

- c -

  • CFG_LONG_SIZE_T : Compilers.h
  • COMPILER_NAME : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h , CompilerGhs.h
  • COMPILER_REVISION : CompilerGnuc.h , CompilerTasking.h , CompilerDcc.h , CompilerGhs.h
  • COMPILER_VERSION : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • CONSOLE : Ifx_Console.h
  • CONST_CFG : Compilers.h
  • Cplx_f32_printf : Ifx_Cf32.h
  • CPU_BIT_ORDER : Platform_Types.h
  • CPU_BYTE_ORDER : Platform_Types.h
  • CPU_TYPE : Platform_Types.h
  • CPU_TYPE_16 : Platform_Types.h
  • CPU_TYPE_32 : Platform_Types.h
  • CPU_TYPE_8 : Platform_Types.h
  • CRC_ENABLE_DPIPE : Ifx_Crc.h


iLLD_TC26B: Globals

- e -

  • ENDL : IfxStdIf_DPipe.h


iLLD_TC26B: Globals

- f -

  • FALSE : Platform_Types.h
  • fract : Ifx_TypesTasking.h
  • FRACT_MAX : Ifx_TypesGhs.h , Ifx_TypesDcc.h , Ifx_TypesGnuc.h


iLLD_TC26B: Globals

- h -

  • HIGH_BYTE_FIRST : Platform_Types.h


iLLD_TC26B: Globals

- i -

  • Ifx___setareg : IfxCpu_IntrinsicsTasking.h
  • Ifx__abs : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__abs_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__absdif : IfxCpu_IntrinsicsDcc.h
  • Ifx__absf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__abss : IfxCpu_IntrinsicsDcc.h
  • Ifx__adds : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__addsu : IfxCpu_IntrinsicsTasking.h
  • Ifx__bisr : IfxCpu_IntrinsicsDcc.h
  • Ifx__cacheawi : IfxCpu_IntrinsicsDcc.h
  • Ifx__checkrange : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__checkrangef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__checkrangeX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__clo : IfxCpu_IntrinsicsDcc.h
  • Ifx__cls : IfxCpu_IntrinsicsDcc.h
  • Ifx__clz : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__cmpAndSwap : IfxCpu_IntrinsicsTasking.h
  • Ifx__debug : IfxCpu_IntrinsicsDcc.h
  • Ifx__disable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__disable_and_save : IfxCpu_IntrinsicsTasking.h
  • Ifx__dsync : IfxCpu_IntrinsicsDcc.h
  • Ifx__enable : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__extr : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__extru : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__fract_to_float : IfxCpu_IntrinsicsTasking.h
  • Ifx__fract_to_sfract : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__geqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__getbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__imaskldmst : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__ins : IfxCpu_IntrinsicsDcc.h
  • Ifx__insert : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__insn : IfxCpu_IntrinsicsDcc.h
  • Ifx__isync : IfxCpu_IntrinsicsDcc.h
  • Ifx__ldmst : IfxCpu_IntrinsicsTasking.h
  • Ifx__leqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__max : IfxCpu_IntrinsicsDcc.h
  • Ifx__max_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__maxf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__maxs : IfxCpu_IntrinsicsDcc.h
  • Ifx__maxu : IfxCpu_IntrinsicsDcc.h
  • Ifx__maxX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mem_barrier : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mfcr : IfxCpu_IntrinsicsDcc.h
  • Ifx__min : IfxCpu_IntrinsicsDcc.h
  • Ifx__min_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__minf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mins : IfxCpu_IntrinsicsDcc.h
  • Ifx__minu : IfxCpu_IntrinsicsDcc.h
  • Ifx__minX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__mtcr : IfxCpu_IntrinsicsDcc.h
  • Ifx__mtcr_no_isync : IfxCpu_IntrinsicsTasking.h
  • Ifx__mulfractfract : IfxCpu_IntrinsicsTasking.h
  • Ifx__mulfractlong : IfxCpu_IntrinsicsTasking.h
  • Ifx__neqf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__non_return_call : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__nop : IfxCpu_IntrinsicsDcc.h
  • Ifx__NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__putbit : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h
  • Ifx__restore : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__roundf : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsDcc.h
  • Ifx__rslcx : IfxCpu_IntrinsicsDcc.h
  • Ifx__saturate : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturate_stdreal : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturatef : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturateu : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__saturateX : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__setareg : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__sqrf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__sqrtf : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h , IfxCpu_IntrinsicsTasking.h
  • Ifx__subs : IfxCpu_IntrinsicsTasking.h
  • Ifx__subsu : IfxCpu_IntrinsicsTasking.h
  • Ifx__svlcx : IfxCpu_IntrinsicsDcc.h
  • Ifx__syscall : IfxCpu_IntrinsicsDcc.h
  • IFX_ALIGN : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_ALIGN_128 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_16 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_256 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_32 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_64 : IfxCpu_Intrinsics.h
  • IFX_ALIGN_8 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn128 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn16 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn256 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn32 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn64 : IfxCpu_Intrinsics.h
  • Ifx_AlignOn8 : IfxCpu_Intrinsics.h
  • IFX_ANGLETRKF32_ATAN2F : Ifx_AngleTrkF32.c
  • IFX_ASSERT : Ifx_Assert.h , Assert.h
  • IFX_ASSERT_FEATURE_NOT_AVAILABLE : Ifx_Assert.h
  • IFX_ASSERT_FEATURE_NOT_IMPLEMENTED : Ifx_Assert.h
  • Ifx_Assert_setStandardIo : Assert.h
  • IFX_CFG_ANGLETRKF32_FILTERED_SPEED : Ifx_AngleTrkF32.h
  • IFX_CFG_ANGLETRKF32_SPEED_FILTER : Ifx_AngleTrkF32.h
  • IFX_CFG_ASSERT_STDIO : Assert.h
  • IFX_CFG_ASSERT_USE_BREAKPOINT : Assert.h
  • IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT : Assert.h
  • IFX_CFG_CIRCULARBUFFER_C : Ifx_CircularBuffer.h
  • IFX_CFG_CONSOLE_INDENT_SIZE : Ifx_Console.h
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 : IfxCpu_CStart0.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE : IfxCpu_CStart1.c
  • IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE : IfxCpu_CStart1.c
  • IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK : IfxCpu_CStart.h
  • IFX_CFG_CPU_TRAP_ASSERT_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_BE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_CME_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_DEBUG : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_IE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_IPE_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_MME_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_NMI_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK : IfxCpu_Trap.c
  • IFX_CFG_CPU_TRAP_TSR_HOOK : IfxCpu_Trap.c
  • IFX_CFG_GLOBAL_RESOURCES_ENABLED : Ifx_GlobalResources.h
  • IFX_CFG_SCU_PLL_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SCU_XTAL_FREQUENCY : IfxScu_cfg.h
  • IFX_CFG_SHELL_CMD_HISTORY_SIZE : Ifx_Shell.h
  • IFX_CFG_SHELL_CMD_LINE_SIZE : Ifx_Shell.h
  • IFX_CFG_SHELL_COMMAND_LISTS : Ifx_Shell.h
  • IFX_CFG_SHELL_PROMPT : Ifx_Shell.h
  • IFX_CONST : Compilers.h
  • Ifx_COUNTOF : IfxCpu_Intrinsics.h
  • IFX_EXTERN : Compilers.h
  • IFX_F32_LUTL_SINCOS_ELEMENT_COUNT : Ifx_LutLSincosF32.c
  • IFX_FAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_FFTF32_MAX_LENGTH : Ifx_FftF32.h
  • IFX_FFTF32_MAX_RESOLUTION : Ifx_FftF32.h
  • IFX_INLINE : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , Compilers.h , CompilerTasking.h
  • IFX_INTERRUPT_FAST : CompilerDcc.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT_INTERNAL : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_INTERRUPT_LEGACY : CompilerDcc.h
  • IFX_LLD_VERSION_GENERATION : IfxLldVersion.h
  • IFX_LLD_VERSION_MAJOR : IfxLldVersion.h
  • IFX_LLD_VERSION_MAJOR_UPDATE : IfxLldVersion.h
  • IFX_LLD_VERSION_MINOR : IfxLldVersion.h
  • IFX_LLD_VERSION_REVISION : IfxLldVersion.h
  • IFX_LUT_ANGLE_BITS : Ifx_Lut.h
  • IFX_LUT_ANGLE_PI : Ifx_Lut.h
  • IFX_LUT_ANGLE_RESOLUTION : Ifx_Lut.h
  • IFX_LUT_F32_TO_FXPANGLE : Ifx_Lut.h
  • IFX_LUT_FXPANGLE_TO_F32 : Ifx_Lut.h
  • IFX_LUT_TABLE : Ifx_Lut.h
  • IFX_LUT_TABLE_CONST : Ifx_Lut.h
  • IFX_LUTATAN2F32_SIZE : Ifx_LutAtan2F32.h
  • IFX_NEAR_ABS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_ONE_OVER_SQRT_THREE : Ifx_Types.h
  • IFX_ONES : Ifx_Types.h
  • IFX_PACKED : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_PI : Ifx_Types.h
  • IFX_REL_A0 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A1 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A8 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_REL_A9 : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFX_SHELL_CMD_HISTORY_NO_ITEM : Ifx_Shell.h
  • IFX_SHELL_COMMAND_LIST_END : Ifx_Shell.h
  • IFX_SHELL_IF_ECHO : Ifx_Shell.c
  • IFX_SHELL_LLD : Ifx_Shell.c
  • IFX_SHELL_LLU : Ifx_Shell.c
  • IFX_SHELL_LLX : Ifx_Shell.c
  • IFX_SHELL_MAX_MESSAGE_SIZE : Ifx_Shell.c
  • IFX_SHELL_NULL_CHAR : Ifx_Shell.h
  • IFX_SHELL_SYNTAX_LIST_END : Ifx_Shell.h
  • IFX_SHELL_WRITE_BACKSPACES : Ifx_Shell.c
  • IFX_SHELL_WRITE_SPACES : Ifx_Shell.c
  • IFX_SIZET_MAX : Ifx_Types.h
  • IFX_SQRT_THREE : Ifx_Types.h
  • IFX_SQRT_TWO : Ifx_Types.h
  • IFX_STATIC : Compilers.h
  • IFX_TWO_OVER_PI : Ifx_Types.h
  • IFX_UNUSED_PARAMETER : Ifx_Types.h
  • IFX_VALIDATE : Ifx_Assert.h , Assert.h
  • IFX_VERBOSE_LEVEL_DEBUG : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_ERROR : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_FAILURE : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_INFO : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_OFF : Ifx_Assert.h
  • IFX_VERBOSE_LEVEL_WARNING : Ifx_Assert.h
  • IFX_WNDF32_TABLE_LENGTH : Ifx_WndF32.h
  • IFX_ZEROS : Ifx_Types.h
  • IFXASCLIN_LIN_RECEIVE_RESPONSE : IfxAsclin_Lin.h
  • IFXASCLIN_LIN_SEND_RESPONSE : IfxAsclin_Lin.h
  • IFXASCLIN_NUM_MODULES : IfxAsclin_cfg.h
  • IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_NUM_MODULES : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS : IfxAsclin_PinMap.h
  • IFXCCU6_EMPTY_OUTPUT_SLOT : IfxCcu6_cfg.c
  • IFXCCU6_NUM_MODULES : IfxCcu6_cfg.h
  • IFXCCU6_NUM_SERVICE_REQUESTS : IfxCcu6_cfg.h
  • IFXCCU6_NUM_T12_CHANNELS : IfxCcu6_cfg.h
  • IFXCCU6_NUM_T13_CHANNELS : IfxCcu6_cfg.h
  • IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_NUM_MODULES : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS : IfxCcu6_PinMap.h
  • IFXCCU6_PWMHL_MAX_CHANNELS : IfxCcu6_PwmHl.h
  • IFXCIF_CAM_ALIGN : IfxCif_Cam.c
  • IFXCIF_CAM_MEM_ALIGN : IfxCif_Cam.c
  • IFXCIF_CAM_MEM_ALIGN_SIZE : IfxCif_Cam.h
  • IFXCIF_CAM_MEM_GAPSIZE : IfxCif_Cam.h
  • IFXCIF_DEBUG : IfxCif_cfg.h
  • IFXCIF_EXTRA_PATHS : IfxCif_cfg.h
  • IFXCIF_MAX_I2CNAK : IfxCif_cfg.h
  • IFXCIF_NUM_MODULES : IfxCif_cfg.h
  • IFXCOMPILER_COMMON_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFXCOMPILER_CORE_LINKER_SYMBOLS : CompilerDcc.h , CompilerGhs.h , CompilerGnuc.h , CompilerTasking.h
  • IFXCPU_ALLCORE_DONE : IfxCpu_cfg.h
  • IFXCPU_CACHABLE_FLASH_SEGMENT : IfxCpu_cfg.h
  • IFXCPU_CACHABLE_LMU_SEGMENT : IfxCpu_cfg.h
  • IFXCPU_CFG_ALLCORE_DONE : IfxCpu_cfg.h
  • IFXCPU_CSTART_CCU_INIT_HOOK : IfxCpu_CStart0.c
  • IFXCPU_GLB_ADDR_DSPR : IfxCpu.h
  • IFXCPU_GLB_ADDR_PSPR : IfxCpu.h
  • IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS : IfxCpu_IntrinsicsGnuc.h
  • IFXCPU_NUM_MODULES : IfxCpu_cfg.h
  • IFXCSTART0_PCX_O_S_DEFAULT : IfxCpu_CStart0.c
  • IFXCSTART0_PSW_DEFAULT : IfxCpu_CStart0.c
  • IFXCSTART1_PCX_O_S_DEFAULT : IfxCpu_CStart1.c
  • IFXCSTART1_PSW_DEFAULT : IfxCpu_CStart1.c
  • IFXDMA_ERROR_D : IfxDma_cfg.h
  • IFXDMA_ERROR_DLL : IfxDma_cfg.h
  • IFXDMA_ERROR_RAM : IfxDma_cfg.h
  • IFXDMA_ERROR_S : IfxDma_cfg.h
  • IFXDMA_ERROR_SLL : IfxDma_cfg.h
  • IFXDMA_ERROR_SPB : IfxDma_cfg.h
  • IFXDMA_ERROR_SRI : IfxDma_cfg.h
  • IFXDMA_NUM_CHANNELS : IfxDma_cfg.h
  • IFXDMA_NUM_MODULES : IfxDma_cfg.h
  • IFXDSADC_NUM_CHANNELS : IfxDsadc_cfg.h
  • IFXDSADC_NUM_MODULES : IfxDsadc_cfg.h
  • IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_NUM_CHANNELS : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_NUM_MODULES : IfxDsadc_PinMap.h
  • IFXDSADC_PINMAP_SG_IN_NUM_ITEMS : IfxDsadc_PinMap.h
  • IFXDSADC_RDC_CFG_DEBUG : IfxDsadc_Rdc.h
  • IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION : IfxDsadc_Rdc.h
  • IFXDTS_NUM_MODULES : IfxDts_cfg.h
  • IFXEMEM_NUM_MODULES : IfxEmem_cfg.h
  • IFXEMEM_SIZE : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_BBB : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_CPU : IfxEmem_cfg.h
  • IFXEMEM_START_ADDR_CPU_CACHED : IfxEmem_cfg.h
  • IFXERAY_NUM_CHANNELS : IfxEray_cfg.h
  • IFXERAY_NUM_MODULES : IfxEray_cfg.h
  • IFXERAY_NUM_SLOTS : IfxEray_cfg.h
  • IFXERAY_PINMAP_NUM_MODULES : IfxEray_PinMap.h
  • IFXERAY_PINMAP_NUM_NODES : IfxEray_PinMap.h
  • IFXERAY_PINMAP_RXD_IN_NUM_ITEMS : IfxEray_PinMap.h
  • IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS : IfxEray_PinMap.h
  • IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEray_PinMap.h
  • IFXETH_DESCR_SIZE : IfxEth.h
  • IFXETH_MAX_RX_BUFFERS : IfxEth.h
  • IFXETH_MAX_TIMEOUT_VALUE : IfxEth_cfg.h
  • IFXETH_MAX_TX_BUFFERS : IfxEth.h
  • IFXETH_NUM_MODULES : IfxEth_cfg.h
  • IFXETH_PHY_PEF7071_MDIO_AN_ADV : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_EXP : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_LPA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_NPRX : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_AN_NPTX : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_CTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_EECTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_ERRCNT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_FWV : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_GCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_GSTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_IMASK : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_ISTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_LED : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MIICTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MIISTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_MMDDATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYCTL1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYCTL2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYID1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYID2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYPERF : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES11 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES12 : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_RES1F : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_STAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_TPGCTRL : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_TPGDATA : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_MDIO_XSTAT : IfxEth_Phy_Pef7071.c
  • IFXETH_PHY_PEF7071_WAIT_GMII_READY : IfxEth_Phy_Pef7071.c
  • IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_MDC_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_NUM_MODULES : IfxEth_PinMap.h
  • IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXD_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_RXER_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXD_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS : IfxEth_PinMap.h
  • IFXETH_RTX_BUFFER_SIZE : IfxEth.h
  • IFXFCE_NUM_KERNEL : IfxFce_cfg.h
  • IFXFCE_NUM_MODULES : IfxFce_cfg.h
  • IFXFFT_DATA_SPACE : IfxFft_cfg.h
  • IFXFFT_FFT_DATA_TRANSFER : IfxFft_Fft.c
  • IFXFFT_FFT_DMA_CHANNEL_BASE : IfxFft_cfg.h
  • IFXFFT_FFT_DMA_SUPPORT : IfxFft_cfg.h
  • IFXFFT_FFT_DMADISCARDCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMADISCARDCHANNELID_OPT : IfxFft_Fft.c
  • IFXFFT_FFT_DMAINPUTCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMAINPUTCHANNELID_OPT : IfxFft_Fft.c
  • IFXFFT_FFT_DMAOUTPUTCHANNELID : IfxFft_Fft.c
  • IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT : IfxFft_Fft.c
  • IFXFFT_FFT_FLAG_DONE : IfxFft_Fft.h
  • IFXFFT_FFT_FLAG_INPUT : IfxFft_Fft.h
  • IFXFFT_FFT_HW_EXEC : IfxFft_Fft.h
  • IFXFFT_FFT_ISALIGNED : IfxFft_Fft.c
  • IFXFFT_FFT_MOVE_BTR4 : IfxFft_Fft.c
  • IFXFFT_FFT_MOVE_DIV : IfxFft_Fft.c
  • IFXFFT_FFT_MOVE_SIZE : IfxFft_Fft.c
  • IFXFFT_FFT_NUM_JOBS : IfxFft_cfg.h
  • IFXFFT_FFT_OPTIMIZED : IfxFft_cfg.h
  • IFXFFT_FFT_PIPELINED : IfxFft_cfg.h
  • IFXFFT_FFT_WINDOW_TRANSFER : IfxFft_Fft.c
  • IFXFFT_MAX_LENGTH : IfxFft_cfg.h
  • IFXFFT_MAX_WINDOW_LENGTH : IfxFft_cfg.h
  • IFXFFT_NUM_MODULES : IfxFft_cfg.h
  • IFXFFT_WINDOW_SPACE : IfxFft_cfg.h
  • IFXFLASH_CMD_BASE_ADDRESS : IfxFlash_cfg.h
  • IFXFLASH_CMD_BASE_OFFSET : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_BANKS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_BURST_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_END : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_PAGE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_SIZE : IfxFlash_cfg.h
  • IFXFLASH_DFLASH_START : IfxFlash_cfg.h
  • IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS : IfxFlash_cfg.h
  • IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS : IfxFlash_cfg.h
  • IFXFLASH_NUM_FLASH_MODULES : IfxFlash_cfg.h
  • IFXFLASH_NUM_MODULES : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_BANKS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_BURST_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_END : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_NUM_LOG_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_OFFSET : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_PAGE_LENGTH : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_SIZE : IfxFlash_cfg.h
  • IFXFLASH_PFLASH_START : IfxFlash_cfg.h
  • IFXGLOBAL_DERIVATIVE_NAME : IfxGlobal_cfg.h
  • IFXGLOBAL_DERIVATIVE_TC26xB : IfxGlobal_cfg.h
  • IFXGPT12_NUM_MODULES : IfxGpt12_cfg.h
  • IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_NUM_MODULES : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_NUM_TIMERS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS : IfxGpt12_PinMap.h
  • IFXGTM_ATOM_NUM_AGC_CHANNELS : IfxGtm_Atom.c
  • IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Atom_PwmHl.h
  • IFXGTM_CMU_CLKDIS_ALL : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK3 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK4 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK5 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK6 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_CLK7 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_ECLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKDIS_FXCLK : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ALL : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK3 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK4 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK5 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK6 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_CLK7 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK0 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK1 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_ECLK2 : IfxGtm_cfg.h
  • IFXGTM_CMU_CLKEN_FXCLK : IfxGtm_cfg.h
  • IFXGTM_NUM_ATOM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_ATOM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_NUM_MODULES : IfxGtm_cfg.h
  • IFXGTM_NUM_TIM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_TOM_CHANNELS : IfxGtm_cfg.h
  • IFXGTM_NUM_TOM_OBJECTS : IfxGtm_cfg.h
  • IFXGTM_TOM_NUM_TGC_CHANNELS : IfxGtm_Tom.h
  • IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS : IfxGtm_Tom_PwmHl.h
  • IFXHSSL_JTAG_ID_ADDRESS : IfxHssl_cfg.h
  • IFXHSSL_NUM_CHANNELS : IfxHssl_cfg.h
  • IFXHSSL_NUM_MODULES : IfxHssl_cfg.h
  • IFXI2C_NUM_MODULES : IfxI2c_cfg.h
  • IFXI2C_PINMAP_NUM_MODULES : IfxI2c_PinMap.h
  • IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS : IfxI2c_PinMap.h
  • IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS : IfxI2c_PinMap.h
  • IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX : IfxIom_Driver.c
  • IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL : IfxIom_Driver.c
  • IFXIOM_NUM_CHANNELS : IfxIom_cfg.h
  • IFXMSC_NUM_ENABLE_SELECT_LINES : IfxMsc_cfg.h
  • IFXMSC_NUM_MODULES : IfxMsc_cfg.h
  • IFXMSC_PINMAP_EN_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_INJ_IN_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_NUM_MODULES : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_NUM_TARGETS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SDI_IN_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SON_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS : IfxMsc_PinMap.h
  • IFXMTU_ERROR_FLAGS_MASK : IfxMtu.h
  • IFXMTU_MAX_TRACKED_ADDRESSES : IfxMtu_cfg.h
  • IFXMTU_MC_ADDRESS_BASE : IfxMtu_cfg.h
  • IFXMTU_NUM_MBIST_TABLE_ITEMS : IfxMtu_cfg.h
  • IFXMULTICAN_NUM_MESSAGE_OBJECTS : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_MODULES : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_NODES : IfxMultican_cfg.h
  • IFXMULTICAN_NUM_SRC : IfxMultican_cfg.h
  • IFXMULTICAN_PINMAP_NUM_MODULES : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_NUM_NODES : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS : IfxMultican_PinMap.h
  • IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS : IfxMultican_PinMap.h
  • IFXMULTICAN_R_NUM_SRC : IfxMultican_cfg.h
  • IFXPORT_NUM_MODULES : IfxPort_cfg.h
  • IFXPORT_OUTOUTFEATURE_NONE : IfxPort_cfg.h
  • IFXPORT_PINMAP_NUM_MODULES : IfxPort_PinMap.h
  • IFXPORT_PINMAP_PIN_NUM_ITEMS : IfxPort_PinMap.h
  • IFXPSI5_DEFAULT_FASTCLOCK_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_DEFAULT_TIMESTAMP_FREQ : IfxPsi5_cfg.h
  • IFXPSI5_ENABLE_CHANNEL : IfxPsi5_cfg.h
  • IFXPSI5_ENABLE_CHANNELTRIGGER : IfxPsi5_cfg.h
  • IFXPSI5_NUM_CHANNELS : IfxPsi5_cfg.h
  • IFXPSI5_NUM_MODULES : IfxPsi5_cfg.h
  • IFXPSI5_NUM_SLOTS : IfxPsi5_cfg.h
  • IFXPSI5_NUM_WDTS : IfxPsi5_cfg.h
  • IFXPSI5_PINMAP_NUM_CHANNELS : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_NUM_MODULES : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5_PinMap.h
  • IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5_PinMap.h
  • IFXPSI5_STEP_RANGE : IfxPsi5_cfg.h
  • IFXPSI5S_BAUDRATE_1562500 : IfxPsi5s_cfg.h
  • IFXPSI5S_BG_RANGE : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_FASTCLOCK_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_DEFAULT_TIMESTAMP_FREQ : IfxPsi5s_cfg.h
  • IFXPSI5S_ENABLE_CHANNEL : IfxPsi5s_cfg.h
  • IFXPSI5S_ENABLE_CHANNELTRIGGER : IfxPsi5s_cfg.h
  • IFXPSI5S_FDV_RANGE : IfxPsi5s_cfg.h
  • IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK : IfxPsi5s_cfg.h
  • IFXPSI5S_GCR_CHANNELS_ENABLE_MASK : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_CHANNELS : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_MODULES : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_SLOTS : IfxPsi5s_cfg.h
  • IFXPSI5S_NUM_WDTS : IfxPsi5s_cfg.h
  • IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_NUM_MODULES : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS : IfxPsi5s_PinMap.h
  • IFXPSI5S_STEP_RANGE : IfxPsi5s_cfg.h
  • IFXQSPI_BACONSIZE : IfxQspi.h
  • IFXQSPI_ERRORENABLEMASK : IfxQspi.h
  • IFXQSPI_FIFO32BITSIZE : IfxQspi.h
  • IFXQSPI_GETLONGMODEFIFOSIZE : IfxQspi.h
  • IFXQSPI_HWFIFO_DEPTH : IfxQspi_cfg.h
  • IFXQSPI_NUM_CHANNELS : IfxQspi_cfg.h
  • IFXQSPI_NUM_MODULES : IfxQspi_cfg.h
  • IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_NUM_MODULES : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_NUM_SLAVESELECTS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS : IfxQspi_PinMap.h
  • IFXSCU_CFG_ASCLINFDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINFDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ASCLINSDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD1DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BAUD2DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_BBBDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CANDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON0_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON1_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON2_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON5_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON6_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7 : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_CCUCON7_MASK : IfxScu_cfg.h
  • IFXSCU_CFG_CLK_DISTRIBUTION : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU0DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_CPU1DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ERAYDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_ETHDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_MSK : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSI2DIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_FSIDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_GTMDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_MAXDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_FREQ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_BASIC : IfxScu_cfg.h
  • IFXSCU_CFG_PLL_STEPS_BASIC_ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SPBDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_SRIDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_133MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_160MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_200MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_240MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_300MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_STMDIV_80MHZ : IfxScu_cfg.h
  • IFXSCU_CFG_XTAL_FREQ : IfxScu_cfg.h
  • IFXSCU_EVR_OSC_FREQUENCY : IfxScu_cfg.h
  • IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_NUM_MODULES : IfxScu_PinMap.h
  • IFXSCU_PINMAP_NUM_REQUESTS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_REQ_IN_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS : IfxScu_PinMap.h
  • IFXSCU_PLL_FREERUNNING_FREQUENCY : IfxScu_cfg.h
  • IFXSCU_VCO_BASE_FREQUENCY : IfxScu_cfg.h
  • IFXSCUCCU_OSC_STABLECHK_TIME : IfxScuCcu.h
  • IFXSCUERU_CHANNEL_NUMBER_ODD : IfxScuEru.c
  • IFXSCUERU_TO_REGISTER_BASE : IfxScuEru.c
  • IFXSCUWDT_CALCULATELFSR : IfxScuWdt.asm.h
  • IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT : IfxScuWdt.h
  • IFXSCUWDT_RESET_PASSWORD : IfxScuWdt.c
  • IFXSENT_CFG_CHANNEL_INTEN : IfxSent_cfg.h
  • IFXSENT_CFG_STEP_RANGE : IfxSent_cfg.h
  • IFXSENT_CFG_TIMEOUT_VALUE : IfxSent_cfg.h
  • IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS : IfxSent.h
  • IFXSENT_NUM_CHANNELS : IfxSent_cfg.h
  • IFXSENT_NUM_MODULES : IfxSent_cfg.h
  • IFXSENT_PINMAP_NUM_CHANNELS : IfxSent_PinMap.h
  • IFXSENT_PINMAP_NUM_MODULES : IfxSent_PinMap.h
  • IFXSENT_PINMAP_SENT_IN_NUM_ITEMS : IfxSent_PinMap.h
  • IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS : IfxSent_PinMap.h
  • IFXSMU_NUM_MODULES : IfxSmu_cfg.h
  • IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS : IfxSmu_PinMap.h
  • IFXSMU_PINMAP_NUM_MODULES : IfxSmu_PinMap.h
  • IFXSTM_NUM_COMPARATORS : IfxStm_cfg.h
  • IFXSTM_NUM_MODULES : IfxStm_cfg.h
  • IFXVADC_ANALOG_FREQUENCY_MAX : IfxVadc_cfg.h
  • IFXVADC_ANALOG_FREQUENCY_MIN : IfxVadc_cfg.h
  • IFXVADC_DEFAULT_ANALOG_FREQ : IfxVadc_cfg.h
  • IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_CAL_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_COMMON_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_ADC_GROUPS : IfxVadc_cfg.h
  • IFXVADC_NUM_EMUX_INTERFACE : IfxVadc_cfg.h
  • IFXVADC_NUM_GLOBAL_INPUTCLASSES : IfxVadc_cfg.h
  • IFXVADC_NUM_INPUTCLASSES : IfxVadc_cfg.h
  • IFXVADC_NUM_MODULES : IfxVadc_cfg.h
  • IFXVADC_NUM_REQUESTSLOTS : IfxVadc_cfg.h
  • IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_NUM_GROUPS : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_NUM_MODULES : IfxVadc_PinMap.h
  • IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS : IfxVadc_PinMap.h
  • IFXVADC_QUEUE_REFILL : IfxVadc_cfg.h
  • IFXVADC_SAMPLETIME_MIN : IfxVadc_cfg.h
  • ISSPACE : Ifx_Shell.c


iLLD_TC26B: Globals

- l -

  • laccum : Ifx_TypesTasking.h
  • LOW_BYTE_FIRST : Platform_Types.h
  • LSB_FIRST : Platform_Types.h


iLLD_TC26B: Globals

- m -

  • MSB_FIRST : Platform_Types.h


iLLD_TC26B: Globals

- n -

  • NOP : IfxCpu_IntrinsicsDcc.h , IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsTasking.h , IfxCpu_IntrinsicsGnuc.h
  • NULL_PTR : Compilers.h


iLLD_TC26B: Globals

- p -

  • PIN_DRIVER_STRONG_SHARP : Bsp.h
  • Pin_enableEmgStop : Bsp.h
  • Pin_getGroupState : Bsp.h
  • Pin_getState : Bsp.h
  • Pin_setDriver : Bsp.h
  • Pin_setGroupModeInput : Bsp.h
  • Pin_setGroupModeOutput : Bsp.h
  • Pin_setGroupState : Bsp.h
  • Pin_setMode : Bsp.h
  • Pin_setState : Bsp.h
  • Pin_setStateHigh : Bsp.h
  • Pin_setStateLow : Bsp.h
  • PLATFORM_AR_RELEASE_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_MINOR_VERSION : Platform_Types.h
  • PLATFORM_AR_RELEASE_REVISION_VERSION : Platform_Types.h
  • PLATFORM_SW_MAJOR_VERSION : Platform_Types.h
  • PLATFORM_SW_MINOR_VERSION : Platform_Types.h
  • PLATFORM_SW_PATCH_VERSION : Platform_Types.h
  • PLATFORM_VENDOR_ID : Platform_Types.h


iLLD_TC26B: Globals

- s -

  • sfract : Ifx_TypesTasking.h
  • SHELL_HELP_DESCRIPTION_TEXT : Ifx_Shell.h
  • STDIF_DPIPE_MAX_PRINT_SIZE : IfxStdIf_DPipe.h
  • STRINGIFY : IfxCpu_IntrinsicsGhs.h , IfxCpu_IntrinsicsGnuc.h


iLLD_TC26B: Globals

- t -

  • TIME_INFINITE : Ifx_Types.h
  • TIME_NULL : Ifx_Types.h
  • TimeConst_0s : Bsp.h
  • TimeConst_100ms : Bsp.h
  • TimeConst_100ns : Bsp.h
  • TimeConst_100s : Bsp.h
  • TimeConst_100us : Bsp.h
  • TimeConst_10ms : Bsp.h
  • TimeConst_10ns : Bsp.h
  • TimeConst_10s : Bsp.h
  • TimeConst_10us : Bsp.h
  • TimeConst_1ms : Bsp.h
  • TimeConst_1s : Bsp.h
  • TimeConst_1us : Bsp.h
  • TIMER_COUNT : Bsp.h
  • TIMER_INDEX_100MS : Bsp.h
  • TIMER_INDEX_100NS : Bsp.h
  • TIMER_INDEX_100S : Bsp.h
  • TIMER_INDEX_100US : Bsp.h
  • TIMER_INDEX_10MS : Bsp.h
  • TIMER_INDEX_10NS : Bsp.h
  • TIMER_INDEX_10S : Bsp.h
  • TIMER_INDEX_10US : Bsp.h
  • TIMER_INDEX_1MS : Bsp.h
  • TIMER_INDEX_1S : Bsp.h
  • TIMER_INDEX_1US : Bsp.h
  • TRUE : Platform_Types.h


iLLD_TC26B: Assert.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Assert.c
Go to the documentation of this file.
1 /**
2 * \file Assert.c
3 * \brief Assert functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:29 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 #include "Assert.h"
26
27 #if IFX_CFG_ASSERT_STDIO == 1
28 /** Current standard IO used for the IFX_ASSERT and IFX_VALIDATE */
29 IfxStdIf_DPipe *Assert_io = NULL_PTR;
30 #endif
31
32 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
33 uint32 Assert_verboseLevel = IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT;
34 #endif
35
36 #if IFX_CFG_ASSERT_STDIO == 1
37 void Ifx_Assert_setStandardIo(IfxStdIf_DPipe *standardIo)
38 {
39 Assert_io = standardIo;
40 }
41
42
43 #endif
44
45 /** \internal
46 * Text used to display the king of assertion
47 */
48 const pchar Assert_level[6] = {
49 "OFF",
50 "FAILURE",
51 "ERROR",
52 "WARNING",
53 "INFO",
54 "DEBUG"
55 };
56
57 void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
58 {
59 #if IFX_CFG_ASSERT_USE_BREAKPOINT == 1
60
61 if (level <= IFX_VERBOSE_LEVEL_ERROR)
62 {
63 __debug();
64 }
65
66 #endif
67
68 #if IFX_CFG_ASSERT_STDIO == 1
69
70 if (Assert_io != NULL_PTR)
71 {
72 IfxStdIf_DPipe_print(Assert_io, "ASSERTION %s '%s' in %s:%u (function '%s()')" ENDL, Assert_level[level],
73 __assertion, __file, __line, __function);
74 }
75
76 #endif
77 }
78
79
80 boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
81 {
82 if (!((expr) || (level > Assert_verboseLevel)))
83 {
84 #if IFX_CFG_ASSERT_USE_BREAKPOINT == 1
85
86 if (level <= IFX_VERBOSE_LEVEL_ERROR)
87 {
88 __debug();
89 }
90
91 #endif
92
93 #if IFX_CFG_ASSERT_STDIO == 1
94
95 if (Assert_io != NULL_PTR)
96 {
97 IfxStdIf_DPipe_print(Assert_io, "VALIDATION %s '%s' in %s:%u (function '%s()')" ENDL, Assert_level[level],
98 __assertion, __file, __line, __function);
99 }
100
101 #endif
102 }
103 else
104 {}
105
106 return expr;
107 }
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
uint32
unsigned long uint32
Definition: Platform_Types.h:113
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:47
Assert.h
Assert functions.
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:33
IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
#define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
defines the assertion default level
Definition: Assert.h:72
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
Assert_level
const pchar Assert_level[6]
Definition: Assert.c:48
Ifx_Assert_doValidate
boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:80
Ifx_Assert_doLevel
void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:57
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx_Assert_setStandardIo
#define Ifx_Assert_setStandardIo(standardIo)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE.
Definition: Assert.h:88


iLLD_TC26B: Assert.h Source File

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  • CpuGeneric
  • SysSe
  • Bsp
Assert.h
Go to the documentation of this file.
1 /**
2 * \file Assert.h
3 * \brief Assert functions.
4 * \ingroup library_srvsw_sysse_bsp_assert
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:34 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup library_srvsw_sysse_bsp_assert Assertion
25 * This module implements assertion functions.
26 * \ingroup library_srvsw_sysse_bsp
27 */
28
29 #ifndef ASSERT_H
30 #define ASSERT_H 1
31
32 #include "_Utilities/Ifx_Assert.h"
33
34 /** \addtogroup library_srvsw_sysse_bsp_assert
35 * Global configuration settings (Ifx_Cfg.h) :
36 * - IFX_CFG_ASSERT_STDIO: if IFX_CFG_ASSERT_STDIO=1, the assertion is output to the io
37 * defined by \ref Ifx_Assert_setStandardIo (). if IFX_CFG_ASSERT_STDIO=0, no text
38 * output is done.
39 * Default is IFX_CFG_ASSERT_STDIO=0
40 * - IFX_CFG_ASSERT_USE_BREAKPOINT: if IFX_CFG_ASSERT_USE_BREAKPOINT=1, a debug instruction is
41 * inserted in case an assertion occurs with a level of
42 * \ref IFX_VERBOSE_LEVEL_FAILURE or \ref IFX_VERBOSE_LEVEL_ERROR. If IFX_CFG_ASSERT_USE_BREAKPOINT=0 then
43 * no debug instruction is inserted.
44 * Default is IFX_CFG_ASSERT_USE_BREAKPOINT=0.
45 * - IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT: Set the assertion limit,
46 * assertion with a level below or equal to the limit are taken in
47 * account, other are ignored. range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
48 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
49 * \ref IFX_VERBOSE_LEVEL_DEBUG]
50 * Default is IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT=\ref IFX_VERBOSE_LEVEL_INFO.
51 *
52 * Do not include this file but use # include "_Utilities/Ifx_Assert.h" instead
53 * \{ */
54
55 #ifndef IFX_CFG_ASSERT_STDIO
56 # define IFX_CFG_ASSERT_STDIO (0) /**< \brief If set to 1, the assert message is send to the Assert_io interface */
57 #endif
58
59 #if IFX_CFG_ASSERT_STDIO == 1
60 # include "StdIf/IfxStdIf_DPipe.h"
61 #endif
62
63 #ifndef IFX_CFG_ASSERT_USE_BREAKPOINT
64 # define IFX_CFG_ASSERT_USE_BREAKPOINT (0) /**< \brief If set to 1, the assert function will break the execution (breakpoint) */
65 #endif
66
67 #ifndef IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT
68 /** \brief defines the assertion default level
69 *
70 * If not defined, the default assert level is set to IFX_VERBOSE_LEVEL_INFO
71 * */
72 #define IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT (IFX_VERBOSE_LEVEL_INFO)
73 #endif
74
75 /** \brief Set the standard output used for \ref IFX_ASSERT and \ref IFX_VALIDATE
76 *
77 * For example the standard IO could redirect the output to a serial interface, CAN interface, ...
78 *
79 * \param standardIo Specifies the standard output used
80 *
81 * Enable only if (IFX_CFG_ASSERT_STDIO!=0)
82 *
83 * \return None.
84 */
85 #if IFX_CFG_ASSERT_STDIO == 1
86 IFX_EXTERN void Ifx_Assert_setStandardIo(IfxStdIf_DPipe *standardIo);
87 #else
88 #define Ifx_Assert_setStandardIo(standardIo) ((void)0)
89 #endif
90
91 /** \internal
92 * \brief Execute the assertion and display the assertion message
93 *
94 * Do not call this function directly, use IFX_ASSERT() instead
95 *
96 * \param level assertion level
97 * \param __assertion test as string, is displayed with the assertion message
98 * \param __file file in which the assertion occurred
99 * \param __line line number where the assertion occurred
100 * \param __function name of the function in which the assertion occurred
101 * \return void
102 */
103 IFX_EXTERN void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function);
104
105 /** \internal
106 * \brief Execute the assertion and display the assertion message.
107 *
108 * Do not call this function directly, use IFX_VALIDATE() instead
109 *
110 * \param expr expression value, assertion occurs if FALSE
111 * \param level assertion level
112 * \param __assertion test as string, is displayed with the assertion message
113 * \param __file file in which the assertion occurred
114 * \param __line line number where the assertion occurred
115 * \param __function name of the function in which the assertion occurred
116 * \return expr
117 */
118 IFX_EXTERN boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function);
119
120 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
121 IFX_EXTERN uint32 Assert_verboseLevel; /**< \bri-ef Current verbose level, this value is initialised to IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT */
122
123 #else
124
125 # undef IFX_CFG_ASSERT_STDIO
126 # define IFX_CFG_ASSERT_STDIO (0)
127
128 #endif
129
130 #undef IFX_ASSERT
131 #undef IFX_VALIDATE
132
133 /** \brief Assertion function (assert)
134 *
135 * If expr is FALSE, then an assertion message is displayed. The message
136 * indicates the assertion level, the file, line and function where the
137 * assertion occurred, and also display expr as text. In case the debug break
138 * point is enabled then a debug instruction will also be inserted so that the debugger stops
139 *
140 * If expr is true, nothing is additional done.
141 *
142 * The expr expression is ignored (code disabled) in case the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT is \ref IFX_VERBOSE_LEVEL_OFF.
143 *
144 * The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.
145 *
146 * \param level level of the assertion, range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
147 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
148 * \ref IFX_VERBOSE_LEVEL_DEBUG]
149 * \param expr expression to be tested. If FALSE the assertion is executed else nothing is done
150 *
151 * \return void
152 */
153 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
154 # define IFX_ASSERT(level, expr) (((expr) || (level > Assert_verboseLevel)) ? ((void)0) : Ifx_Assert_doLevel(level,#expr, __FILE__, __LINE__, __func__))
155 #else
156 # define IFX_ASSERT(level, expr) ((void)0)
157 #endif
158
159 /** \brief Assertion function (validate)
160 *
161 * If expr is FALSE, then an assertion message is displayed. The message
162 * indicates the assertion level, the file, line and function where the
163 * assertion occurred, and also display expr as text. In case the debug
164 * break point is enabled then a debug instruction will also be inserted so
165 * that the debugger stops.
166 *
167 * \ref IFX_VALIDATE differs from \ref IFX_ASSERT in the way that the expr expression is
168 * evaluated whatever the assertion level set by IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT.
169 *
170 * The output needs to the be set with the function Ifx_Assert_setStandardIo() in order for the message to be displayed.
171 *
172 * \param level level of the assertion, range=[\ref IFX_VERBOSE_LEVEL_OFF, \ref IFX_VERBOSE_LEVEL_FAILURE,
173 * \ref IFX_VERBOSE_LEVEL_ERROR, \ref IFX_VERBOSE_LEVEL_WARNING, \ref IFX_VERBOSE_LEVEL_INFO,
174 * \ref IFX_VERBOSE_LEVEL_DEBUG]
175 * \param expr expression to be tested. If FALSE the assertion is executed else nothing is done
176 *
177 * \return void
178 */
179 #if IFX_CFG_ASSERT_VERBOSE_LEVEL_DEFAULT > IFX_VERBOSE_LEVEL_OFF
180 # define IFX_VALIDATE(level, expr) (Ifx_Assert_doValidate(expr, level,#expr, __FILE__, __LINE__, __func__))
181 #else
182 # define IFX_VALIDATE(level, expr) (expr)
183 #endif
184
185 /** \} */
186
187 //#include "_Utilities/Ifx_Assert.h" /* Needs to be at the end of the file */
188
189 #endif
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_Assert.h
Assert functions.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifx_Assert_doValidate
IFX_EXTERN boolean Ifx_Assert_doValidate(boolean expr, uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:80
Ifx_Assert_doLevel
IFX_EXTERN void Ifx_Assert_doLevel(uint8 level, pchar __assertion, pchar __file, unsigned int __line, pchar __function)
Definition: Assert.c:57
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx_Assert_setStandardIo
#define Ifx_Assert_setStandardIo(standardIo)
Set the standard output used for IFX_ASSERT and IFX_VALIDATE.
Definition: Assert.h:88


iLLD_TC26B: Bsp.c Source File

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  • CpuGeneric
  • SysSe
  • Bsp
Bsp.c
Go to the documentation of this file.
1 /**
2 * \file Bsp.c
3 * \brief Board support package
4 * \ingroup library_srvsw_sysse_bsp_bsp
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:34 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "Bsp.h"
27
28 Ifx_TickTime TimeConst[TIMER_COUNT];
29
30 /** \brief Initialize the time constants.
31 *
32 * Initialize the time constants TimeConst_0s, TimeConst_100ns, TimeConst_1us,
33 * TimeConst_10us, TimeConst_100us, TimeConst_1ms, TimeConst_10ms, TimeConst_100ms,
34 * TimeConst_1s, TimeConst_10s
35 * \return None.
36 */
37 void initTime(void)
38 {
39 sint32 Fsys = IfxStm_getFrequency(BSP_DEFAULT_TIMER);
40
41 TimeConst[TIMER_INDEX_10NS] = Fsys / (1000000000 / 10);
42 TimeConst[TIMER_INDEX_100NS] = Fsys / (1000000000 / 100);
43 TimeConst[TIMER_INDEX_1US] = Fsys / (1000000 / 1);
44 TimeConst[TIMER_INDEX_10US] = Fsys / (1000000 / 10);
45 TimeConst[TIMER_INDEX_100US] = Fsys / (1000000 / 100);
46 TimeConst[TIMER_INDEX_1MS] = Fsys / (1000 / 1);
47 TimeConst[TIMER_INDEX_10MS] = Fsys / (1000 / 10);
48 TimeConst[TIMER_INDEX_100MS] = Fsys / (1000 / 100);
49 TimeConst[TIMER_INDEX_1S] = Fsys * (1);
50 TimeConst[TIMER_INDEX_10S] = Fsys * (10);
51 TimeConst[TIMER_INDEX_100S] = Fsys * (100);
52 }
53
54
55 /** \brief Wait function.
56 *
57 * This is an empty function that just spend some time waiting.
58 *
59 * \return None.
60 */
61 void waitPoll(void)
62 {}
63
64 /** \brief Wait time function.
65 *
66 * This is an empty function that that returns after the timeout elapsed. The
67 * minimal time spend in the function is guaranteed, but not the max time.
68 *
69 * \param timeout Specifies the time the function waits for before returning
70 *
71 * \return None.
72 */
73 void waitTime(Ifx_TickTime timeout)
74 {
75 wait(timeout);
76 }
TIMER_INDEX_10S
#define TIMER_INDEX_10S
Definition: Bsp.h:141
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:59
TIMER_INDEX_100MS
#define TIMER_INDEX_100MS
Definition: Bsp.h:139
TIMER_INDEX_100NS
#define TIMER_INDEX_100NS
Definition: Bsp.h:133
TIMER_INDEX_100S
#define TIMER_INDEX_100S
Definition: Bsp.h:142
TimeConst
Ifx_TickTime TimeConst[TIMER_COUNT]
Definition: Bsp.c:28
TIMER_INDEX_10US
#define TIMER_INDEX_10US
Definition: Bsp.h:135
waitTime
void waitTime(Ifx_TickTime timeout)
Wait time function.
Definition: Bsp.c:73
TIMER_COUNT
#define TIMER_COUNT
Definition: Bsp.h:131
TIMER_INDEX_1MS
#define TIMER_INDEX_1MS
Definition: Bsp.h:137
Bsp.h
Board support package.
TIMER_INDEX_1S
#define TIMER_INDEX_1S
Definition: Bsp.h:140
wait
IFX_INLINE void wait(Ifx_TickTime timeout)
Wait for a while.
Definition: Bsp.h:399
TIMER_INDEX_10NS
#define TIMER_INDEX_10NS
Definition: Bsp.h:132
TIMER_INDEX_10MS
#define TIMER_INDEX_10MS
Definition: Bsp.h:138
TIMER_INDEX_100US
#define TIMER_INDEX_100US
Definition: Bsp.h:136
initTime
void initTime(void)
Initialize the time constants.
Definition: Bsp.c:37
IfxStm_getFrequency
IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
Returns the system timer frequency.
Definition: IfxStm.h:543
waitPoll
void waitPoll(void)
Wait function.
Definition: Bsp.c:61
sint32
long sint32
Definition: Platform_Types.h:131
BSP_DEFAULT_TIMER
#define BSP_DEFAULT_TIMER
Definition: Bsp.h:45
TIMER_INDEX_1US
#define TIMER_INDEX_1US
Definition: Bsp.h:134


iLLD_TC26B: Bsp.h Source File

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  • CpuGeneric
  • SysSe
  • Bsp
Bsp.h
Go to the documentation of this file.
1 /**
2 * \file Bsp.h
3 * \brief Board support package
4 * \ingroup library_srvsw_sysse_bsp_bsp
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:35 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup library_srvsw_sysse_bsp_bsp Board support package
25 * This module implements the board support package
26 * \ingroup library_srvsw_sysse_bsp
27 *
28 */
29
30 #ifndef BSP_H
31 #define BSP_H 1
32
33 #include "Ifx_Cfg.h" /* Do not remove this include */
34 #include "Cpu/Std/IfxCpu_Intrinsics.h" /* Do not remove this include */
35 #include "_Utilities/Ifx_Assert.h" /* Do not remove this include */
36
37 #include "Cpu/Std/IfxCpu.h"
38 #include "Port/Std/IfxPort.h"
39 #include "Src/Std/IfxSrc.h"
40 #include "Stm/Std/IfxStm.h"
41 #include "Scu/Std/IfxScuCcu.h"
42
43 #ifndef BSP_DEFAULT_TIMER
44 /** Defined the default timer used */
45 #define BSP_DEFAULT_TIMER (&MODULE_STM0)
46 #endif
47
48 /******************************************************************************/
49 /* Function prototypes */
50 /******************************************************************************/
51
52 /** \addtogroup library_srvsw_sysse_bsp_bsp
53 * \{ */
54 /** \name Interrupt APIs
55 * \{ */
56 IFX_INLINE boolean areInterruptsEnabled(void);
57 IFX_INLINE boolean disableInterrupts(void);
58 IFX_INLINE void enableInterrupts(void);
59 IFX_INLINE void restoreInterrupts(boolean enabled);
60 IFX_INLINE void forceDisableInterrupts(void);
61 /** \} */
62 /** \} */
63
64 /******************************************************************************/
65 /* Functions */
66 /******************************************************************************/
67
68 /** \brief Return the status of the global interrupts
69 *
70 * \retval TRUE if the global interrupts are enabled.
71 * \retval FALSE if the global interrupts are disabled.
72 *
73 * \see restoreInterrupts(), disableInterrupts()
74 */
75 IFX_INLINE boolean areInterruptsEnabled(void)
76 {
77 return IfxCpu_areInterruptsEnabled();
78 }
79
80
81 /** \brief Disable the global interrupts
82 *
83 * \retval TRUE if the global interrupts were enabled before the call to the function.
84 * \retval FALSE if the global interrupts are disabled before the call to the function.
85 *
86 * \see areInterruptsEnabled(), restoreInterrupts()
87 */
88 IFX_INLINE boolean disableInterrupts(void)
89 {
90 return IfxCpu_disableInterrupts();
91 }
92
93
94 /** \brief Disable the global interrupts forcefully
95 *
96 *
97 * \see areInterruptsEnabled(), restoreInterrupts()
98 */
99 IFX_INLINE void forceDisableInterrupts(void)
100 {
101 IfxCpu_forceDisableInterrupts();
102 }
103
104
105 /** \brief enable the global interrupts
106 *
107 */
108 IFX_INLINE void enableInterrupts(void)
109 {
110 IfxCpu_enableInterrupts();
111 }
112
113
114 /** \brief Restore the state of the global interrupts.
115 *
116 * \param enabled if TRUE, re-enable the global interrupts, else do nothing.
117 *
118 * \return None.
119 *
120 * \see areInterruptsEnabled(), disableInterrupts()
121 */
122 IFX_INLINE void restoreInterrupts(boolean enabled)
123 {
124 IfxCpu_restoreInterrupts(enabled);
125 }
126
127
128 /******************************************************************************/
129 /* Macros */
130 /******************************************************************************/
131 #define TIMER_COUNT (11) /**< \internal \brief number of timer values defined */
132 #define TIMER_INDEX_10NS (0) /**< \internal \brief Index of the time value 10ns*/
133 #define TIMER_INDEX_100NS (1) /**< \internal \brief Index of the time value 100ns*/
134 #define TIMER_INDEX_1US (2) /**< \internal \brief Index of the time value 1us*/
135 #define TIMER_INDEX_10US (3) /**< \internal \brief Index of the time value 10us*/
136 #define TIMER_INDEX_100US (4) /**< \internal \brief Index of the time value 100us*/
137 #define TIMER_INDEX_1MS (5) /**< \internal \brief Index of the time value 1ms*/
138 #define TIMER_INDEX_10MS (6) /**< \internal \brief Index of the time value 10ms*/
139 #define TIMER_INDEX_100MS (7) /**< \internal \brief Index of the time value 100ms*/
140 #define TIMER_INDEX_1S (8) /**< \internal \brief Index of the time value 1s*/
141 #define TIMER_INDEX_10S (9) /**< \internal \brief Index of the time value 10s*/
142 #define TIMER_INDEX_100S (10) /**< \internal \brief Index of the time value 100s*/
143
144 /** \internal
145 * Array containing the time constants. This variable should not be used in the application. TimeConst_0s, TimeConst_10ns, ... should be used instead
146 *
147 */
148 IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT];
149
150 /******************************************************************************/
151 /* Function prototypes */
152 /******************************************************************************/
153 /** \addtogroup library_srvsw_sysse_bsp_bsp
154 * \{ */
155 /** \name Time APIs
156 * \{ */
157 IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b);
158 IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since);
159 IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout);
160 IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline);
161 IFX_EXTERN void initTime(void);
162 IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine);
163 IFX_INLINE Ifx_TickTime now(void);
164 IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void);
165 IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout);
166 IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled);
167 IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled);
168 IFX_INLINE void wait(Ifx_TickTime timeout);
169 IFX_EXTERN void waitPoll(void);
170 IFX_EXTERN void waitTime(Ifx_TickTime timeout);
171
172 /** Prototype for wait() functions */
173 typedef void (*WaitTimeFunction)(Ifx_TickTime timeout);
174
175 #define TimeConst_0s ((Ifx_TickTime)0) /**< \brief time constant equal to 1s */
176 #define TimeConst_10ns (TimeConst[TIMER_INDEX_10NS]) /**< \brief time constant equal to 10ns */
177 #define TimeConst_100ns (TimeConst[TIMER_INDEX_100NS]) /**< \brief time constant equal to 100ns */
178 #define TimeConst_1us (TimeConst[TIMER_INDEX_1US]) /**< \brief time constant equal to 1us */
179 #define TimeConst_10us (TimeConst[TIMER_INDEX_10US]) /**< \brief time constant equal to 10us */
180 #define TimeConst_100us (TimeConst[TIMER_INDEX_100US]) /**< \brief time constant equal to 100us */
181 #define TimeConst_1ms (TimeConst[TIMER_INDEX_1MS]) /**< \brief time constant equal to 1ms */
182 #define TimeConst_10ms (TimeConst[TIMER_INDEX_10MS]) /**< \brief time constant equal to 10ms */
183 #define TimeConst_100ms (TimeConst[TIMER_INDEX_100MS]) /**< \brief time constant equal to 100ms */
184 #define TimeConst_1s (TimeConst[TIMER_INDEX_1S]) /**< \brief time constant equal to 1s */
185 #define TimeConst_10s (TimeConst[TIMER_INDEX_10S]) /**< \brief time constant equal to 10s */
186 #define TimeConst_100s (TimeConst[TIMER_INDEX_100S]) /**< \brief time constant equal to 100s */
187
188 /**\}*/
189 /**\}*/
190 /******************************************************************************/
191 /* Functions */
192 /******************************************************************************/
193
194 /** \brief Return system timer value (critical section).
195 *
196 * The function IfxStm_get() is called in a critical section, disabling
197 * the interrupts. The system timer value is limited to TIME_INFINITE.
198 *
199 * \return Returns system timer value.
200 */
201 IFX_INLINE Ifx_TickTime now(void)
202 {
203 Ifx_TickTime stmNow;
204 boolean interruptState;
205
206 interruptState = disableInterrupts();
207 stmNow = (Ifx_TickTime)IfxStm_get(BSP_DEFAULT_TIMER) & TIME_INFINITE;
208 restoreInterrupts(interruptState);
209
210 return stmNow;
211 }
212
213
214 /** \brief Return system timer value (without critical section).
215 *
216 * The function IfxStm_get() is called. The system timer value is limited to TIME_INFINITE.
217 *
218 * \return Returns system timer value.
219 */
220 IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void)
221 {
222 Ifx_TickTime stmNow;
223
224 stmNow = (Ifx_TickTime)IfxStm_get(BSP_DEFAULT_TIMER) & TIME_INFINITE;
225
226 return stmNow;
227 }
228
229
230 /** \brief Add 2 Ifx_TickTime values and return the result
231 *
232 * \param a parameter a
233 * \param b parameter b
234 *
235 * \return a + b. If either a or b is TIME_INFINITE, the result is TIME_INFINITE
236 */
237 IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b)
238 {
239 Ifx_TickTime result;
240
241 if ((a == TIME_INFINITE) || (b == TIME_INFINITE))
242 {
243 result = TIME_INFINITE;
244 }
245 else
246 {
247 result = a + b; /* FIXME check for overflow */
248 }
249
250 return result;
251 }
252
253
254 /** \brief Return the elapsed time in ticks.
255 *
256 * Return the elapsed time between the current time and the time passed as parameter
257 *
258 * \return Returns the elapsed time.
259 */
260 IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since)
261 {
262 return now() - since;
263 }
264
265
266 /** \brief Return the time dead line.
267 *
268 * \param timeout Specifies the dead line from now: Deadline = Now + Timeout
269 *
270 * \return Return the time dead line.
271 */
272 IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout)
273 {
274 Ifx_TickTime deadLine;
275
276 if (timeout == TIME_INFINITE)
277 {
278 deadLine = TIME_INFINITE;
279 }
280 else
281 {
282 deadLine = now() + timeout;
283 }
284
285 return deadLine;
286 }
287
288
289 /** \brief Return the time until the dead line.
290 *
291 * \param deadline Specifies the dead line from now: Deadline = Now + Timeout
292 *
293 * \return Return the time until the dead line.
294 */
295 IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline)
296 {
297 Ifx_TickTime timeout;
298
299 if (deadline == TIME_INFINITE)
300 {
301 timeout = TIME_INFINITE;
302 }
303 else
304 {
305 timeout = deadline - now();
306 }
307
308 return timeout;
309 }
310
311
312 /** \brief Return TRUE if the dead line is over.
313 *
314 * \param deadLine Specifies the dead line.
315 *
316 * \retval TRUE Returns TRUE if the dead line is over
317 * \retval FALSE Returns FALSE if the dead line is not yet over
318 */
319 IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine)
320 {
321 boolean result;
322
323 if (deadLine == TIME_INFINITE)
324 {
325 result = FALSE;
326 }
327 else
328 {
329 result = now() >= deadLine;
330 }
331
332 return result;
333 }
334
335
336 /** \brief Poll a variable for a time.
337 *
338 * \param test Specifies the variable to test.
339 * \param timeout Specifies the maximal time the variable will be tested
340 *
341 * \retval TRUE Returns TRUE if the variable gets TRUE before the timeout elapse
342 * \retval FALSE Returns FALSE if the variable is FALSE as the timeout elapse
343 */
344 IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout)
345 {
346 Ifx_TickTime deadLine = getDeadLine(timeout);
347
348 while ((*test == FALSE) && (isDeadLine(deadLine) == FALSE))
349 {}
350
351 return *test;
352 }
353
354
355 /** \brief Return the elapsed time in system timer ticks, and enable the interrupts.
356 *
357 * The interrupts are enable by the function
358 *
359 * \param since time returned by timingNoInterruptStart()
360 * \param interruptEnabled If TRUE, the interrupts will be enabled before the function exit. This parameter should be set to the value returned by \ref timingNoInterruptStart()
361 *
362 * \return Returns the elapsed time.
363 *
364 * \see timingNoInterruptStart()
365 */
366 IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled)
367 {
368 Ifx_TickTime stmNow;
369
370 stmNow = nowWithoutCriticalSection();
371 restoreInterrupts(interruptEnabled);
372
373 return stmNow - since;
374 }
375
376
377 /** \brief Disable the interrupt and return system timer value.
378 *
379 * The interrupt remains disabled after the function call
380 *
381 * \return Returns system timer value.
382 *
383 * \see timingNoInterruptEnd()
384 */
385 IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled)
386 {
387 *interruptEnabled = disableInterrupts();
388
389 return nowWithoutCriticalSection();
390 }
391
392
393 /** \brief Wait for a while.
394 *
395 * \param timeout Specifies the waiting time
396 *
397 * \return None.
398 */
399 IFX_INLINE void wait(Ifx_TickTime timeout)
400 {
401 Ifx_TickTime deadLine = getDeadLine(timeout);
402
403 while (isDeadLine(deadLine) == FALSE)
404 {}
405 }
406
407
408 #define PIN_DRIVER_STRONG_SHARP IfxPort_PadDriver_cmosAutomotiveSpeed1
409 #define Pin_setState(pin, mode) IfxPort_setPinState((pin)->port, (pin)->pinIndex, (mode))
410 #define Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
411 #define Pin_setMode(pin, mode) IfxPort_setPinMode((pin)->port, (pin)->pinIndex, (mode))
412 #define Pin_setDriver(pin, mode) IfxPort_setPinPadDriver((pin)->port, (pin)->pinIndex, (mode))
413 #define Pin_setStateHigh(pin) IfxPort_setPinHigh((pin)->port, (pin)->pinIndex)
414 #define Pin_setStateLow(pin) IfxPort_setPinLow((pin)->port, (pin)->pinIndex)
415 #define Pin_getState(pin) IfxPort_getPinState((pin)->port, (pin)->pinIndex)
416 #define Pin_setGroupModeOutput(pin, mask, mode, outputIdx) IfxPort_setGroupModeOutput((pin)->port, (pin)->pinIndex, (mask), (mode), (outputIdx))
417 #define Pin_setGroupModeInput(pin, mask, mode) IfxPort_setGroupModeInput((pin)->port, (pin)->pinIndex, (mask), (mode))
418 #define Pin_setGroupState(pin, mask, data) IfxPort_setGroupState((pin)->port, (pin)->pinIndex, (mask), (data))
419 #define Pin_getGroupState(pin, mask) IfxPort_getGroupState((pin)->port, (pin)->pinIndex, (mask))
420 #define Pin_enableEmgStop(pin) IfxPort_enableEmergencyStop((pin)->port, (pin)->pinIndex)
421 //------------------------------------------------------------------------------
422
423 #endif /* BSP_H */
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:59
nowWithoutCriticalSection
IFX_INLINE Ifx_TickTime nowWithoutCriticalSection(void)
Return system timer value (without critical section).
Definition: Bsp.h:220
IfxStm.h
STM basic functionality.
forceDisableInterrupts
IFX_INLINE void forceDisableInterrupts(void)
Disable the global interrupts forcefully.
Definition: Bsp.h:99
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:201
timingNoInterruptEnd
IFX_INLINE Ifx_TickTime timingNoInterruptEnd(Ifx_TickTime since, boolean interruptEnabled)
Return the elapsed time in system timer ticks, and enable the interrupts.
Definition: Bsp.h:366
disableInterrupts
IFX_INLINE boolean disableInterrupts(void)
Disable the global interrupts.
Definition: Bsp.h:88
IfxCpu_enableInterrupts
IFX_INLINE void IfxCpu_enableInterrupts(void)
API to enable global interrupt. This API simply enables the global interrupt.
Definition: IfxCpu.h:649
Ifx_Assert.h
Assert functions.
enableInterrupts
IFX_INLINE void enableInterrupts(void)
enable the global interrupts
Definition: Bsp.h:108
IfxSrc.h
SRC basic functionality.
waitTime
IFX_EXTERN void waitTime(Ifx_TickTime timeout)
Wait time function.
Definition: Bsp.c:73
IfxCpu_Intrinsics.h
TIMER_COUNT
#define TIMER_COUNT
Definition: Bsp.h:131
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
getDeadLine
IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout)
Return the time dead line.
Definition: Bsp.h:272
TimeConst
IFX_EXTERN Ifx_TickTime TimeConst[TIMER_COUNT]
Definition: Bsp.h:148
elapsed
IFX_INLINE Ifx_TickTime elapsed(Ifx_TickTime since)
Return the elapsed time in ticks.
Definition: Bsp.h:260
FALSE
#define FALSE
Definition: Platform_Types.h:90
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
wait
IFX_INLINE void wait(Ifx_TickTime timeout)
Wait for a while.
Definition: Bsp.h:399
isDeadLine
IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine)
Return TRUE if the dead line is over.
Definition: Bsp.h:319
IfxCpu.h
CPU basic functionality.
initTime
IFX_EXTERN void initTime(void)
Initialize the time constants.
Definition: Bsp.c:37
restoreInterrupts
IFX_INLINE void restoreInterrupts(boolean enabled)
Restore the state of the global interrupts.
Definition: Bsp.h:122
WaitTimeFunction
void(* WaitTimeFunction)(Ifx_TickTime timeout)
Definition: Bsp.h:173
addTTime
IFX_INLINE Ifx_TickTime addTTime(Ifx_TickTime a, Ifx_TickTime b)
Add 2 Ifx_TickTime values and return the result.
Definition: Bsp.h:237
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:60
waitPoll
IFX_EXTERN void waitPoll(void)
Wait function.
Definition: Bsp.c:61
IfxScuCcu.h
SCU basic functionality.
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:631
timingNoInterruptStart
IFX_INLINE Ifx_TickTime timingNoInterruptStart(boolean *interruptEnabled)
Disable the interrupt and return system timer value.
Definition: Bsp.h:385
areInterruptsEnabled
IFX_INLINE boolean areInterruptsEnabled(void)
Return the status of the global interrupts.
Definition: Bsp.h:75
BSP_DEFAULT_TIMER
#define BSP_DEFAULT_TIMER
Definition: Bsp.h:45
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:526
IfxCpu_forceDisableInterrupts
IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
Disable the Global Interrupt.
Definition: IfxCpu.h:717
getTimeout
IFX_INLINE Ifx_TickTime getTimeout(Ifx_TickTime deadline)
Return the time until the dead line.
Definition: Bsp.h:295
IfxPort.h
PORT basic functionality.
poll
IFX_INLINE boolean poll(volatile boolean *test, Ifx_TickTime timeout)
Poll a variable for a time.
Definition: Bsp.h:344


iLLD_TC26B: CompilerDcc.c Source File

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CompilerDcc.c
Go to the documentation of this file.
1 /**
2 * \file CompilerDcc.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:39 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #include "Cpu/Std/Ifx_Types.h"
25 #include "Compilers.h"
26
27 #if defined(__DCC__)
28 /*!
29 * \brief Initializes C variables
30 *
31 * This function is called in the startup. This function initialize the all variables in .data section
32 * and clears the .bss section
33 *
34 * Parameters: Nil
35 * Return: Nil
36 */
37 void Ifx_C_Init(void)
38 {
39 extern void __init_main(void);
40
41 __init_main(); /* initialize data */
42 }
43
44
45 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
46 /*Dummy main function
47 * This function is required only for the Windriver, which looks for main while linking
48 * ! DO NOT USE THIS FUNCTION !*/
49 int main(void)
50 {
51 return 0;
52 }
53
54
55 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
56 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: CompilerDcc.h Source File

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CompilerDcc.h
Go to the documentation of this file.
1 /**
2 * \file CompilerDcc.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #ifndef COMPILERDCC_H
25 #define COMPILERDCC_H 1
26
27 /******************************************************************************/
28
29 #include <stddef.h>
30
31 /*Linker definitions which are specific to Dcc */
32 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
33 * to use the default compiler linker varaibles and startup */
34 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
35
36 /*Start: Core 0 definitions ********************************************** */
37
38 /*C extern defintions */
39 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
40 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
41 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
42 extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
43 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
44 extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
45 extern unsigned int __CSA##cpu##_END[]; /**< context save area end */
46
47 #define __USTACK(cpu) __USTACK##cpu
48 #define __ISTACK(cpu) __ISTACK##cpu
49 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
50 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
51 #define __CSA(cpu) __CSA##cpu
52 #define __CSA_END(cpu) __CSA##cpu##_END
53
54 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
55 __asm("\t .weak __A8_MEM, __A9_MEM"); /**< ASM extern definitions */
56
57 /*Wrapper macros for the tool specific definitions */
58 #if defined(IFX_USE_SW_MANAGED_INT)
59 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
60 #else
61 #define __INTTAB(cpu) __INTTAB_CPU##cpu
62 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
63
64 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
65
66 #define __SDATA1(cpu) _SMALL_DATA_
67 #define __SDATA2(cpu) _LITERAL_DATA_
68 #define __SDATA3(cpu) __A8_MEM
69 #define __SDATA4(cpu) __A9_MEM
70
71 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
72
73 /******************************************************************************/
74 #define IFX_INLINE static __inline__
75
76 /* FXIME check how to pack structure members */
77 #define IFX_PACKED
78
79 #define COMPILER_NAME "DCC"
80 #define COMPILER_VERSION __VERSION__
81
82 #define COMPILER_REVISION 0
83 #define IFX_INTERRUPT_FAST IFX_INTERRUPT
84
85 #if defined(IFX_USE_SW_MANAGED_INT)
86
87 #ifndef IFX_INTERRUPT
88 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
89 #endif
90
91 #else
92 /* *INDENT-OFF* */
93
94 #ifndef IFX_INTERRUPT
95 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
96 #endif
97 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
98
99 #ifndef IFX_INTERRUPT_INTERNAL
100 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
101 void __interrupt(prio) __vector_table(vectabNum) isr(void)
102 #endif
103
104 /*Macro IFX_INTERRUPT_LEGACY is to be used for compiler version pror to 5.9.3.0*/
105 #define IFX_INTERRUPT_LEGACY(isr, vectabNum, prio) \
106 __asm ("\t.align\t 5\n\t\
107 .section .int."#prio"\n \t.sectionlink .inttab"#vectabNum".intvec."#prio"\n\
108 #$$bf\n\
109 __intvec_tc"#vectabNum"_"#prio":\n\
110 movh.a\t %a14,"#isr"@ha\n\
111 lea\t %a14,[%a14]"#isr"@l\n\
112 ji\t %a14\n\
113 #$$ef\n\t\
114 .section .intend."#prio"\n \t.sectionlink .text");\
115 __interrupt__ void isr (void)
116
117 /* *INDENT-ON* */
118
119 /******************************************************************************/
120
121 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
122
123 /******************************************************************************/
124 /*Memory qualifiers*/
125 #ifndef IFX_FAR_ABS
126 #define IFX_FAR_ABS
127 #endif
128
129 #ifndef IFX_NEAR_ABS
130 #define IFX_NEAR_ABS
131 #endif
132
133 #ifndef IFX_REL_A0
134 #define IFX_REL_A0
135 #endif
136
137 #ifndef IFX_REL_A1
138 #define IFX_REL_A1
139 #endif
140
141 #ifndef IFX_REL_A8
142 #define IFX_REL_A8
143 #endif
144
145 #ifndef IFX_REL_A9
146 #define IFX_REL_A9
147 #endif
148 /******************************************************************************/
149
150 #endif /* COMPILERDCC_H */


iLLD_TC26B: CompilerGhs.c Source File

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CompilerGhs.c
Go to the documentation of this file.
1 /**
2 * \file CompilerGhs.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:40 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #include "Cpu/Std/Ifx_Types.h"
25 #include "Compilers.h"
26
27 #if defined(__ghs__) && !defined(WIN32)
28
29 typedef int ptrdiff_t;
30 typedef unsigned int syze_t;
31 typedef signed int signed_size_t;
32 #define size_t syze_t
33
34 extern void *memcpy(void *s1, const void *s2, syze_t n);
35 extern void *memset(void *s, int c, syze_t n);
36
37 /* rodata is absolute */
38 typedef const char rodata_ptr[];
39 # define PIRBASE 0
40
41 #define CONST_FUNCP *const
42
43 /*!
44 * \brief Initializes C variables.
45 *
46 * This function is called in the startup. This function initialize the all variables in .data section
47 * and clears the .bss section
48 *
49 * Parameters: Nil
50 * Return: Nil
51 */
52 void Ifx_C_Init(void)
53 {
54 /*----------------------------------------------------------------------*/
55 /* */
56 /* Clear BSS */
57 /* */
58 /*----------------------------------------------------------------------*/
59 { /* The .secinfo section is in text; declare functions to force PIC */
60
61 #pragma ghs rodata
62 extern rodata_ptr __ghsbinfo_clear;
63 #pragma ghs rodata
64 extern rodata_ptr __ghseinfo_clear;
65
66 void **b = (void **) ((char *)__ghsbinfo_clear);
67 void **e = (void **) ((char *)__ghseinfo_clear);
68
69 while (b != e) {
70 void * t; /* target pointer */
71 ptrdiff_t v; /* value to set */
72 size_t n; /* set n bytes */
73 t = (char *)(*b++);
74 v = *((ptrdiff_t *) b); b++;
75 n = *((size_t *) b); b++;
76 memset(t, v, n);
77 }
78 }
79
80 /*----------------*/
81 /* initialize iob */
82 /*----------------*/
83 {
84 #pragma weak __gh_iob_init
85 extern void __gh_iob_init(void);
86 static void (CONST_FUNCP iob_init_funcp)(void) = __gh_iob_init;
87 /* if cciob.c is loaded, initialize _iob for stdin,stdout,stderr */
88 if (iob_init_funcp) __gh_iob_init();
89 }
90 }
91
92
93 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
t
uint32 ins t
Definition: IfxCpu_IntrinsicsDcc.h:397
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: CompilerGhs.h Source File

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CompilerGhs.h
Go to the documentation of this file.
1 /**
2 * \file CompilerGhs.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #ifndef COMPILERGHS_H
25 #define COMPILERGHS_H 1
26
27 /******************************************************************************/
28
29 // #include <stddef.h>
30
31 /*Linker definitions which are specific to Ghs */
32 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
33 * to use the default compiler linker varaibles and startup */
34 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
35
36 /*Start: Common definitions ********************************************** */
37 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
38 extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
39 extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
40 extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
41 extern unsigned int __A9_MEM[]; /**< center of A9 addressable area */
42
43 /*End: Common definitions ************************************************ */
44
45 /*Start: Core 0 definitions ********************************************** */
46
47 /*C extern defintions */
48 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
49 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
50 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
51 extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
52 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
53 extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
54 extern unsigned int __CSA##cpu##_END[]; /**< context save area 1 begin */
55
56 #define __USTACK(cpu) __USTACK##cpu
57 #define __ISTACK(cpu) __ISTACK##cpu
58 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
59 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
60 #define __CSA(cpu) __CSA##cpu
61 #define __CSA_END(cpu) __CSA##cpu##_END
62
63 /*Wrapper macros for the tool specific definitions */
64 #if defined(IFX_USE_SW_MANAGED_INT)
65 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
66 #else
67 #define __INTTAB(cpu) __INTTAB_CPU##cpu
68 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
69
70 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
71
72 #define __SDATA1(cpu) __A0_MEM
73 #define __SDATA2(cpu) __A1_MEM
74 #define __SDATA3(cpu) __A8_MEM
75 #define __SDATA4(cpu) __A9_MEM
76
77 /* MHWS+
78 #define __SDATA1(cpu) __A0_MEM
79 #define __SDATA2(cpu) __A1_MEM
80 #define __SDATA3(cpu) __A8_MEM
81 #define __SDATA4(cpu) __A9_MEM
82 MHWS- */
83 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
84
85 /******************************************************************************/
86 #ifndef IFX_INLINE
87 #define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
88 #endif
89
90 #define IFX_PACKED __packed
91
92 #define COMPILER_NAME "GHS"
93 #define COMPILER_VERSION __GHS_VERSION_NUMBER
94
95 #define COMPILER_REVISION __GHS_REVISION_VALUE
96
97 #if defined(IFX_USE_SW_MANAGED_INT)
98
99 #ifndef IFX_INTERRUPT
100 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
101 #endif
102
103 #else
104 /* *INDENT-OFF* */
105
106 #ifndef IFX_INTERRUPT
107 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
108 #endif
109 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
110
111 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
112 __attribute__((section(".intvec_tc"#vectabNum"_"#prio))) void iVecEntry##vectabNum##_##prio(void) \
113 { \
114 __asm__("movh.a a14, %hi("#isr") \n" \
115 "lea a14, [a14]%lo("#isr")\n" \
116 "ji a14"); \
117 } \
118 __interrupt void isr(void)
119
120 /* *INDENT-ON* */
121
122 /******************************************************************************/
123
124 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
125
126 /******************************************************************************/
127 /*Memory qualifiers*/
128 #ifndef IFX_FAR_ABS
129 #define IFX_FAR_ABS __attribute__((fardata))
130 #endif
131
132 #ifndef IFX_NEAR_ABS
133 #define IFX_NEAR_ABS
134 #endif
135
136 #ifndef IFX_REL_A0
137 #define IFX_REL_A0
138 #endif
139
140 #ifndef IFX_REL_A1
141 #define IFX_REL_A1
142 #endif
143
144 #ifndef IFX_REL_A8
145 #define IFX_REL_A8
146 #endif
147
148 #ifndef IFX_REL_A9
149 #define IFX_REL_A9
150 #endif
151 /******************************************************************************/
152
153 #endif /* COMPILERGHS_H */


iLLD_TC26B: CompilerGnuc.c Source File

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  • Compilers
CompilerGnuc.c
Go to the documentation of this file.
1 /**
2 * \file CompilerGnuc.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:40 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #include "Cpu/Std/Ifx_Types.h"
25 #include "Compilers.h"
26
27 #if defined(__HIGHTEC__) && !defined(WIN32)
28 /*!
29 * \brief Data s C variables.
30 */
31 extern uint32 __clear_table[]; /**< clear table entry */
32 extern uint32 __copy_table[]; /**< copy table entry */
33
34 typedef volatile union
35 {
36 uint8 *ucPtr;
37 uint16 *usPtr;
38 uint32 *uiPtr;
39 unsigned long long *ullPtr;
40 } IfxStart_CTablePtr;
41
42 /*!
43 * \brief Initializes C variables.
44 *
45 * This function is called in the startup. This function initialize the all variables in .data section
46 * and clears the .bss section
47 *
48 * Parameters: Nil
49 * Return: Nil
50 */
51 void Ifx_C_Init(void)
52 {
53 IfxStart_CTablePtr pBlockDest, pBlockSrc;
54 uint32 uiLength, uiCnt;
55 uint32 *pTable;
56 /* clear table */
57 pTable = (uint32 *)&__clear_table;
58
59 while (pTable)
60 {
61 pBlockDest.uiPtr = (uint32 *)*pTable++;
62 uiLength = *pTable++;
63
64 /* we are finished when length == -1 */
65 if (uiLength == 0xFFFFFFFF)
66 {
67 break;
68 }
69
70 uiCnt = uiLength / 8;
71
72 while (uiCnt--)
73 {
74 *pBlockDest.ullPtr++ = 0;
75 }
76
77 if (uiLength & 0x4)
78 {
79 *pBlockDest.uiPtr++ = 0;
80 }
81
82 if (uiLength & 0x2)
83 {
84 *pBlockDest.usPtr++ = 0;
85 }
86
87 if (uiLength & 0x1)
88 {
89 *pBlockDest.ucPtr = 0;
90 }
91 }
92
93 /* copy table */
94 pTable = (uint32 *)&__copy_table;
95
96 while (pTable)
97 {
98 pBlockSrc.uiPtr = (uint32 *)*pTable++;
99 pBlockDest.uiPtr = (uint32 *)*pTable++;
100 uiLength = *pTable++;
101
102 /* we are finished when length == -1 */
103 if (uiLength == 0xFFFFFFFF)
104 {
105 break;
106 }
107
108 uiCnt = uiLength / 8;
109
110 while (uiCnt--)
111 {
112 *pBlockDest.ullPtr++ = *pBlockSrc.ullPtr++;
113 }
114
115 if (uiLength & 0x4)
116 {
117 *pBlockDest.uiPtr++ = *pBlockSrc.uiPtr++;
118 }
119
120 if (uiLength & 0x2)
121 {
122 *pBlockDest.usPtr++ = *pBlockSrc.usPtr++;
123 }
124
125 if (uiLength & 0x1)
126 {
127 *pBlockDest.ucPtr = *pBlockSrc.ucPtr;
128 }
129 }
130 }
131
132
133 #endif
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
uint16
unsigned short uint16
Definition: Platform_Types.h:109
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: CompilerGnuc.h Source File

  • Infra
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  • Tricore
  • Compilers
CompilerGnuc.h
Go to the documentation of this file.
1 /**
2 * \file CompilerGnuc.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #ifndef COMPILERGNUC_H
25 #define COMPILERGNUC_H 1
26
27 /******************************************************************************/
28
29 #include <stddef.h>
30
31 /*Linker definitions which are specific to Gnuc */
32 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
33 * to use the default compiler linker varaibles and startup */
34 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
35
36 /*Start: Common definitions ********************************************** */
37 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
38 extern unsigned int __A0_MEM[]; /**< center of A0 addressable area */ \
39 extern unsigned int __A1_MEM[]; /**< center of A1 addressable area */ \
40 extern unsigned int __A8_MEM[]; /**< center of A8 addressable area */ \
41 extern unsigned int __A9_MEM[]; /**< center of A9 addressable area */
42
43 /*End: Common definitions ************************************************ */
44
45 /*Start: Core 0 definitions ********************************************** */
46
47 /*C extern defintions */
48 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
49 extern unsigned int __USTACK##cpu[]; /**< user stack end */ \
50 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
51 extern unsigned int __INTTAB_CPU##cpu[]; /**< Interrupt vector table */ \
52 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap table */ \
53 extern unsigned int __CSA##cpu[]; /**< context save area 1 begin */ \
54 extern unsigned int __CSA##cpu##_END[]; /**< context save area 1 begin */
55
56 #define __USTACK(cpu) __USTACK##cpu
57 #define __ISTACK(cpu) __ISTACK##cpu
58 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
59 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
60 #define __CSA(cpu) __CSA##cpu
61 #define __CSA_END(cpu) __CSA##cpu##_END
62
63 /*Wrapper macros for the tool specific definitions */
64 #if defined(IFX_USE_SW_MANAGED_INT)
65 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
66 #else
67 #define __INTTAB(cpu) __INTTAB_CPU##cpu
68 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
69
70 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
71
72 #define __SDATA1(cpu) __A0_MEM
73 #define __SDATA2(cpu) __A1_MEM
74 #define __SDATA3(cpu) __A8_MEM
75 #define __SDATA4(cpu) __A9_MEM
76
77 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
78
79 /******************************************************************************/
80 #ifndef IFX_INLINE
81 #define IFX_INLINE static inline __attribute__ ((always_inline)) /*Makes the function always inlined */
82 #endif
83
84 #define IFX_PACKED __attribute__ ((packed))
85
86 #define COMPILER_NAME "GNUC"
87 #define COMPILER_VERSION __VERSION__
88
89 #define COMPILER_REVISION 0
90
91 #define IFX_INTERRUPT_FAST IFX_INTERRUPT
92
93 #if defined(IFX_USE_SW_MANAGED_INT)
94
95 #ifndef IFX_INTERRUPT
96 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
97 #endif
98
99 #else
100 /* *INDENT-OFF* */
101 #ifndef IFX_INTERRUPT
102 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
103 #endif
104 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
105
106 #ifndef IFX_INTERRUPT_INTERNAL
107 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) \
108 __asm__ (".ifndef .intr.entry.include \n"\
109 ".altmacro \n"\
110 ".macro .int_entry.2 intEntryLabel, name # define the section and inttab entry code \n"\
111 " .pushsection .\\intEntryLabel,\"ax\",@progbits \n"\
112 " __\\intEntryLabel : \n"\
113 " svlcx \n"\
114 " movh.a %a14, hi:\\name \n"\
115 " lea %a14, [%a14]lo:\\name \n"\
116 " ji %a14 \n"\
117 " .popsection \n"\
118 ".endm \n"\
119 ".macro .int_entry.1 prio,vectabNum,u,name \n"\
120 ".int_entry.2 intvec_tc\\vectabNum\\u\\prio,(name) # build the unique name \n"\
121 ".endm \n"\
122 " \n"\
123 ".macro .intr.entry name,vectabNum,prio \n"\
124 ".int_entry.1 %(prio),%(vectabNum),_,name # evaluate the priority and the cpu number \n"\
125 ".endm \n"\
126 ".intr.entry.include: \n"\
127 ".endif \n"\
128 ".intr.entry "#isr","#vectabNum","#prio );\
129 IFX_EXTERN void __attribute__ ((interrupt_handler)) isr(); \
130 void isr (void)
131 #endif /* IFX_INTERRUPT_INTERNAL */
132
133 /* *INDENT-ON* */
134
135 /******************************************************************************/
136
137 #define IFX_ALIGN(n) __attribute__ ((aligned(n)))
138
139 /******************************************************************************/
140 /*Memory qualifiers*/
141 #ifndef IFX_FAR_ABS
142 #define IFX_FAR_ABS __attribute__((fardata))
143 #endif
144
145 #ifndef IFX_NEAR_ABS
146 #define IFX_NEAR_ABS
147 #endif
148
149 #ifndef IFX_REL_A0
150 #define IFX_REL_A0
151 #endif
152
153 #ifndef IFX_REL_A1
154 #define IFX_REL_A1
155 #endif
156
157 #ifndef IFX_REL_A8
158 #define IFX_REL_A8
159 #endif
160
161 #ifndef IFX_REL_A9
162 #define IFX_REL_A9
163 #endif
164 /******************************************************************************/
165
166 #endif /* COMPILERGNUC_H */


iLLD_TC26B: CompilerTasking.c Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
CompilerTasking.c
Go to the documentation of this file.
1 /**
2 * \file CompilerTasking.c
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-02-27 20:08:41 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #include "Cpu/Std/Ifx_Types.h"
25 #include "Compilers.h"
26
27 #if defined(__TASKING__)
28 /*!
29 * \brief Initializes C variables
30 *
31 * This function is called in the startup. This function initialize the all variables in .data section
32 * and clears the .bss section
33 *
34 * Parameters: Nil
35 * Return: Nil
36 */
37 void Ifx_C_Init(void)
38 {
39 extern void _c_init(void);
40
41 _c_init(); /* initialize data */
42 }
43
44
45 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: CompilerTasking.h Source File

  • Infra
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  • Compilers
CompilerTasking.h
Go to the documentation of this file.
1 /**
2 * \file CompilerTasking.h
3 *
4 * \version iLLD_New
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #ifndef COMPILERTASKING_H
25 #define COMPILERTASKING_H 1
26
27 /******************************************************************************/
28
29 #include <stddef.h>
30
31 /*Linker definitions which are specific to Tasking */
32 /* IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h
33 * to use the default compiler linker varaibles and startup */
34 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
35
36 #ifndef __cplusplus
37 /*Start: Common definitions ********************************************** */
38 #define IFXCOMPILER_COMMON_LINKER_SYMBOLS() \
39 __asm("\t .extern _SMALL_DATA_, _LITERAL_DATA_, _A8_DATA_, _A9_DATA_");
40
41 /*End: Common definitions ********************************************** */
42
43 /*Start: Core 0 definitions ********************************************** */
44
45 #define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu) \
46 __asm("\t .extern __USTACK"#cpu); /**< user stack end is required as asm to be used with setreg macro */ \
47 extern unsigned int __ISTACK##cpu[]; /**< interrupt stack end */ \
48 extern unsigned int __INTTAB_CPU##cpu[]; /**< interrupt vector table */ \
49 extern unsigned int __TRAPTAB_CPU##cpu[]; /**< trap vector table */ \
50 extern unsigned int __CSA##cpu[]; /**< context save area begin */ \
51 extern unsigned int __CSA##cpu##_END[]; /**< context save area end */
52 #endif
53
54 #define __USTACK(cpu) __USTACK##cpu
55 #define __ISTACK(cpu) __ISTACK##cpu
56 #define __INTTAB_CPU(cpu) __INTTAB_CPU##cpu
57 #define __TRAPTAB_CPU(cpu) __TRAPTAB_CPU##cpu
58 #define __CSA(cpu) __CSA##cpu
59 #define __CSA_END(cpu) __CSA##cpu##_END
60
61 /*Wrapper macros for the tool specific definitions */
62 #if defined(IFX_USE_SW_MANAGED_INT)
63 #define __INTTAB(cpu) ((unsigned int)__INTTAB_CPU##cpu | (unsigned int)0x1FE0)
64 #else
65 #define __INTTAB(cpu) __INTTAB_CPU##cpu
66 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
67
68 #define __TRAPTAB(cpu) __TRAPTAB_CPU##cpu
69
70 #define __SDATA1(cpu) _SMALL_DATA_
71 #define __SDATA2(cpu) _LITERAL_DATA_
72 #define __SDATA3(cpu) _A8_DATA_
73 #define __SDATA4(cpu) _A9_DATA_
74
75 #endif /*IFX_CFG_USE_COMPILER_DEFAULT_LINKER*/
76
77 /******************************************************************************/
78 #ifdef __cplusplus
79 #define IFX_INLINE static inline
80 #else
81 #define IFX_INLINE inline
82 #endif
83
84 /* FXIME check how to pack structure members */
85 #define IFX_PACKED
86
87 #define COMPILER_NAME "TASKING"
88 #define COMPILER_VERSION __VERSION__
89
90 /* Note that __REVISION__ is only available for tasking compiler! */
91 #define COMPILER_REVISION __REVISION__
92
93 /******************************************************************************/
94
95 #if defined(IFX_USE_SW_MANAGED_INT)
96
97 #ifndef IFX_INTERRUPT
98 #define IFX_INTERRUPT(isr, vectabNum, prio) void isr(void)
99 #endif
100
101 #else
102 /* *INDENT-OFF* */
103 #ifndef IFX_INTERRUPT
104 #define IFX_INTERRUPT(isr, vectabNum, prio) IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
105 #endif
106 #define IFX_INTERRUPT_FAST(isr, vectabNum, prio) void __interrupt_fast(prio) __vector_table(vectabNum) isr(void)
107
108 #endif /*defined(IFX_USE_SW_MANAGED_INT)*/
109
110 #define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio) void __interrupt(prio) __vector_table(vectabNum) isr(void)
111
112 /* *INDENT-ON* */
113
114 /******************************************************************************/
115
116 #define IFX_ALIGN(n) __attribute__ ((__align(n)))
117
118 /******************************************************************************/
119 /*Memory qualifiers*/
120 #ifndef IFX_FAR_ABS
121 #define IFX_FAR_ABS __far
122 #endif
123
124 #ifndef IFX_NEAR_ABS
125 #define IFX_NEAR_ABS __near
126 #endif
127
128 #ifndef IFX_REL_A0
129 #define IFX_REL_A0 __a0
130 #endif
131
132 #ifndef IFX_REL_A1
133 #define IFX_REL_A1 __a1
134 #endif
135
136 #ifndef IFX_REL_A8
137 #define IFX_REL_A8 __a8
138 #endif
139
140 #ifndef IFX_REL_A9
141 #define IFX_REL_A9 __a9
142 #endif
143 /******************************************************************************/
144
145 #endif /* COMPILERTASKING_H */


iLLD_TC26B: Compilers.h Source File

  • Infra
  • Platform
  • Tricore
  • Compilers
Compilers.h
Go to the documentation of this file.
1 /**
2 * \file Compilers.h
3 *
4 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
5 *
6 * $Date: 2014-04-07 12:13:19 GMT$
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 */
23
24 #ifndef COMPILERS_H
25 #define COMPILERS_H 1
26
27 /******************************************************************************/
28
29 #include "Ifx_Cfg.h"
30
31 /*this file shall not be modified by the user, IFX_XXXX defines shall be defined in Ifx_Cfg.h */
32 #ifndef IFX_STATIC
33 #define IFX_STATIC static
34 #endif
35
36 #ifndef IFX_CONST
37 #define IFX_CONST const
38 #endif
39 #ifndef CONST_CFG
40 #define CONST_CFG const /* configuration constants are stored in ROM */
41 #endif
42
43 #ifdef __cplusplus
44 #define IFX_EXTERN extern "C"
45 #else
46 #define IFX_EXTERN extern
47 #endif
48
49 #ifndef NULL_PTR
50 #ifdef __cplusplus
51 #define NULL_PTR (0)
52 #else /*#ifdef __cplusplus */
53 #define NULL_PTR ((void *)0)
54 #endif /*#ifdef __cplusplus */
55 #endif /*#ifndef NULL_PTR */
56
57 #ifndef CFG_LONG_SIZE_T
58 #define CFG_LONG_SIZE_T (0)
59 #endif
60
61 #if defined(__DCC__)
62 #include "CompilerDcc.h"
63
64 #elif defined(__HIGHTEC__)
65 #include "CompilerGnuc.h"
66
67 #elif defined(__TASKING__)
68 #include "CompilerTasking.h"
69
70 #elif defined(__ghs__)
71 #include "CompilerGhs.h"
72
73 #elif defined(__MSVC__)
74 #include "CompilerMsvc.h"
75
76 #else
77
78 /** \addtogroup IfxLld_Cpu_Std_Interrupt
79 * \{ */
80 /** \brief Macro to define Interrupt Service Routine.
81 * This macro makes following definitions:\n
82 * 1) Define linker section as .intvec_tc<vector number>_<interrupt priority>.\n
83 * 2) define compiler specific attribute for the interrupt functions.\n
84 * 3) define the Interrupt service routine as Isr function.\n
85 * To get details about usage of this macro, refer \ref IfxLld_Cpu_Irq_Usage
86 *
87 * \param isr Name of the Isr function.
88 * \param vectabNum Vector table number.
89 * \param prio Interrupt priority. Refer Usage of Interrupt Macro for more details.
90 */
91 #define IFX_INTERRUPT(isr, vectabNum, prio)
92
93 /** \} */
94 #error "Compiler unsupported"
95 #endif
96
97 #if defined(__HIGHTEC__)
98 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec aw 4)
99 #define DATA_SECTION(sec) _Pragma(#sec)
100 #define END_DATA_SECTION DATA_SECTION(section)
101 #elif defined(__TASKING__)
102 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section farbss #sec)
103 #define DATA_SECTION(sec) _Pragma(#sec)
104 #define END_DATA_SECTION DATA_SECTION(section farbss align restore) \
105 DATA_SECTION(section farbss)
106 #elif defined(__DCC__)
107 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec WX)
108 #define DATA_SECTION(sec) _Pragma(#sec)
109 #define END_DATA_SECTION DATA_SECTION(section DATA X)
110 #elif defined(__ghs__)
111 #define BEGIN_DATA_SECTION(sec) DATA_SECTION(section #sec WX)
112 #define DATA_SECTION(sec) _Pragma(#sec)
113 #define END_DATA_SECTION DATA_SECTION(section DATA X)
114 #else
115 #error "Please specify compiler."
116 #endif
117
118 /* Functions prototypes */
119 /******************************************************************************/
120 void Ifx_C_Init(void);
121 /******************************************************************************/
122
123
124 #endif /* COMPILERS_H */
CompilerTasking.h
CompilerGhs.h
CompilerDcc.h
CompilerGnuc.h
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: Icu.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Icu.h
Go to the documentation of this file.
1 /**
2 * \file Icu.h
3 * \brief ICU interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_if_icu ICU interface
24 * \ingroup library_srvsw_if
25 *
26 */
27
28 #ifndef ICU_H_
29 #define ICU_H_ 1
30
31 #include "Cpu/Std/Ifx_Types.h"
32
33 typedef struct Icu_s Icu;
34 typedef void (*Icu_StartCapture)(Icu *handle);
35 typedef void (*Icu_StopCapture)(Icu *handle);
36 typedef void (*Icu_GetTimeStamp)(Icu *handle);
37
38 typedef struct
39 {
40 Icu_StartCapture startCapture;
41 Icu_StopCapture stopCapture;
42 Icu_GetTimeStamp getTimeStamp;
43 } Icu_Functions;
44
45 /** \brief Structure of the Icu interface */
46 struct Icu_s
47 {
48 float32 frequency; /**< \brief dummy member to avoid error */
49 #if IFX_CFG_USE_STANDARD_INTERFACE
50 Icu_Functions functions; /**< \brief Actual timer period */
51 #endif
52 };
53
54 /** \brief Configuration structure of the Icu interface */
55 typedef struct
56 {
57 float32 frequency; /**< \brief dummy member to avoid error */
58 // IfxCcu6_Timer *timer;
59 } Icu_Config;
60
61 #if IFX_CFG_USE_STANDARD_INTERFACE
62 IFX_INLINE void Icu_startCapture(Icu *handle) {handle->functions.startCapture(handle); }
63 IFX_INLINE void Icu_stopCapture(Icu *handle) {handle->functions.stopCapture(handle); }
64 IFX_INLINE void Icu_getTimeStamp(Icu *handle) {handle->functions.getTimeStamp(handle); }
65 #endif
66
67 #endif /* ICU_H_ */
Icu_Config
Configuration structure of the Icu interface.
Definition: Icu.h:55
Icu_Functions::stopCapture
Icu_StopCapture stopCapture
Definition: Icu.h:41
float32
float float32
Definition: Platform_Types.h:167
Icu_Functions
Definition: Icu.h:38
Icu_StartCapture
void(* Icu_StartCapture)(Icu *handle)
Definition: Icu.h:34
Icu_s::frequency
float32 frequency
dummy member to avoid error
Definition: Icu.h:48
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Icu_Functions::startCapture
Icu_StartCapture startCapture
Definition: Icu.h:40
Icu_StopCapture
void(* Icu_StopCapture)(Icu *handle)
Definition: Icu.h:35
Icu_Functions::getTimeStamp
Icu_GetTimeStamp getTimeStamp
Definition: Icu.h:42
Icu_s
Structure of the Icu interface.
Definition: Icu.h:46
Icu_GetTimeStamp
void(* Icu_GetTimeStamp)(Icu *handle)
Definition: Icu.h:36


iLLD_TC26B: Ifx_AngleTrkF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_AngleTrkF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_AngleTrkF32.c
3 * \brief Angle-tracking observer for sin/cos analog position sensor
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 //________________________________________________________________________________________
27 // INCLUDES
28
29 #include "Ifx_AngleTrkF32.h"
30 #include <math.h>
31 #include "string.h"
32 #include "Ifx_LutAtan2F32.h"
33
34 //________________________________________________________________________________________
35 // LOCAL DEFINITIONS
36
37 #define IFX_ANGLETRKF32_ATAN2F Ifx_LutAtan2F32_float32
38
39 //________________________________________________________________________________________
40 // LOCAL FUNCTION PROTOTYPES
41
42 void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts);
43
44 //________________________________________________________________________________________
45 // GLOBAL VARIABLES
46
47 //________________________________________________________________________________________
48 // LOCAL VARIABLES
49
50 //________________________________________________________________________________________
51 // LOCAL FUNCTION IMPLEMENTATIONS
52
53 IFX_INLINE float32 Ifx_AngleTrkF32_bound(float32 angle, float32 periodPerRotation)
54 {
55 IFX_UNUSED_PARAMETER(periodPerRotation);
56 float32 fullPeriod = 2 * IFX_PI;
57
58 if (angle >= (fullPeriod / 2))
59 {
60 angle = angle - fullPeriod;
61 }
62 else if (angle < (-fullPeriod / 2))
63 {
64 angle = angle + fullPeriod;
65 }
66 else
67 {}
68
69 return angle;
70 }
71
72
73 IFX_INLINE float32 Ifx_AngleTrkF32_boundInput(float32 input)
74 {
75 return Ifx_AngleTrkF32_bound(input, 1);
76 }
77
78
79 float32 round_f(float32 val)
80 {
81 /*lint -e632 -e633 -e524*/
82 sint32 val_i = (sint32)val;
83
84 /*lint +e632 +e633 +e524*/
85 if ((val - (float32)val_i) > 0.5)
86 {
87 val = (float32)(val_i + 1);
88 }
89 else
90 {
91 val = (float32)val_i;
92 }
93
94 return val;
95 }
96
97
98 //________________________________________________________________________________________
99 // PUBLIC FUNCTION IMPLEMENTATIONS
100 #define ATO_T (15e-3f)
101 #define ATO_K (39.05f)
102 #define ATO_PSI (1.5f * IFX_PI)
103
104 void Ifx_AngleTrkF32_setControlGains(Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
105 {
106 cfgData->kp = ((2 * K) + (psi * psi) + 1) / (T * T);
107 cfgData->ki = K * ((psi * psi) + 1) / (T * T * T);
108 cfgData->kd = (K + 2) / T;
109 }
110
111
112 /** \brief Fill config with default values */
113 void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
114 {
115 Ifx_AngleTrkF32_CfgData cfgData;
116 Ifx_AngleTrkF32_setControlGains(&cfgData, ATO_K, ATO_T, ATO_PSI);
117 config->kp = cfgData.kp;
118 config->ki = cfgData.ki;
119 config->kd = cfgData.kd;
120 config->sinIn = sinIn;
121 config->cosIn = cosIn;
122 config->errorThreshold = 5.0f / 180 * IFX_PI;
123 config->sqrAmplMax = (sint32)((1.01f * 1.01f) * 2048);
124 config->sqrAmplMin = (sint32)((0.99f * 0.99f) * 2048);
125 config->speedLpfFc = 100;
126 config->periodPerRotation = 1;
127 config->reversed = FALSE;
128 config->offset = 0;
129 config->resolution = (1UL << 12);/** \brief 12-bit default resolution */
130 }
131
132
133 void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts)
134 {
135 aObsv->base.Ts = Ts;
136 aObsv->halfTs = aObsv->base.Ts / 2.0F;
137 }
138
139
140 /** \brief Initialize the Angle Tracking object
141 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
142 * \param config Pointer to the configuration data
143 * \param Ts sampling period in seconds
144 */
145 void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
146 {
147 aObsv->base.offset = config->offset;
148 aObsv->base.resolution = config->resolution;
149 aObsv->base.reversed = config->reversed;
150 aObsv->base.Ts = Ts;
151 aObsv->base.rawPosition = 0;
152 aObsv->base.direction = IfxStdIf_Pos_Dir_unknown;
153 aObsv->base.turn = 0;
154 aObsv->base.status.status = 0;
155 aObsv->base.periodPerRotation = config->periodPerRotation;
156 aObsv->base.positionConst = 1.0 / (float32)aObsv->base.resolution * 2.0 * IFX_PI;
157
158 aObsv->cfgData.kd = config->kd;
159 aObsv->cfgData.ki = config->ki;
160 aObsv->cfgData.kp = config->kp;
161 aObsv->cfgData.errorThreshold = config->errorThreshold;
162 aObsv->cfgData.sqrAmplMax = config->sqrAmplMax;
163 aObsv->cfgData.sqrAmplMin = config->sqrAmplMin;
164 aObsv->sinIn = config->sinIn;
165 aObsv->cosIn = config->cosIn;
166
167 if (!__neqf(config->kp, 0) && !__neqf(config->ki, 0) && !__neqf(config->kp, 0))
168 { /* all gains are zero, use default */
169 /* FIXME might not be requied as set by Ifx_AngleTrkF32_initConfig() */
170 Ifx_AngleTrkF32_setControlGains(&aObsv->cfgData, ATO_K, ATO_T, ATO_PSI);
171 }
172
173 Ifx_AngleTrkF32_setUserSampling(aObsv, Ts);
174 aObsv->angleErr = 0.0F;
175 aObsv->angleEst = 0.0F;
176 aObsv->accelEst = 0.0F;
177 aObsv->speedEstA = 0.0F;
178 aObsv->speedEstB = 0.0F;
179 aObsv->angleRef = 0.0F;
180 {
181 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
182 Ifx_LowPassPt1F32_Config lpfConfig;
183 lpfConfig.gain = 1.0F;
184 lpfConfig.cutOffFrequency = (2 * IFX_PI * config->speedLpfFc);
185 lpfConfig.samplingTime = Ts;
186 Ifx_LowPassPt1F32_init(&aObsv->speedLpf, &lpfConfig);
187 #endif
188 }
189 }
190
191
192 /** \brief Step function of Ifx_AngleTrkF32 should be called at every sampling period provided
193 * during initialisation (call to Ifx_AngleTrkF32_init()).
194 *
195 * \note This function is automatically called by Ifx_AngleTrkF32_update()
196 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
197 * \param sinIn sine input signal. The offset shall be zero.
198 * \param cosIn cosine input signal. The offset shall be zero.
199 * \param phase phase of input signal.
200 * \note This function returns the angular position in radians
201 * \note The amplitude of both sinIn and cosIn signal shall be the same.
202 */
203 float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
204 {
205 float32 angleRef, angleEst, dAccel, dSpeed, dAngle;
206
207 if (aObsv->base.reversed != FALSE)
208 {
209 angleRef = IFX_ANGLETRKF32_ATAN2F((float32)cosIn, (float32)sinIn);
210 }
211 else
212 {
213 angleRef = IFX_ANGLETRKF32_ATAN2F((float32)sinIn, (float32)cosIn);
214 }
215
216 aObsv->angleAtan = angleRef;
217 angleRef = angleRef + phase;
218
219 aObsv->angleRef = angleRef;
220
221 // Acceleration, zero-order-hold integrator:
222 dAccel = aObsv->cfgData.ki * aObsv->angleErr;
223 aObsv->accelEst = aObsv->accelEst + (dAccel * aObsv->base.Ts);
224
225 // Speed, zero-order-hold integrator:
226 dSpeed = ((aObsv->cfgData.kp * aObsv->angleErr) + aObsv->accelEst);
227 aObsv->speedEstA = aObsv->speedEstA + (dSpeed * aObsv->base.Ts);
228
229 // Angle, first-order-hold integrator:
230 dAngle = ((aObsv->cfgData.kd * aObsv->angleErr) + aObsv->speedEstA);
231 angleEst = aObsv->angleEst + ((dAngle + aObsv->speedEstB) * aObsv->halfTs);
232 aObsv->speedEstB = dAngle;
233
234 aObsv->angleEst = Ifx_AngleTrkF32_boundInput(angleEst);
235
236 // Error, is calculated here to compensate one period delay
237 aObsv->angleErr = Ifx_AngleTrkF32_boundInput(aObsv->angleRef - aObsv->angleEst);
238
239 aObsv->base.direction = aObsv->speedEstB > 0 ? IfxStdIf_Pos_Dir_forward : IfxStdIf_Pos_Dir_backward;
240
241 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
242 // Filter speed:
243 Ifx_LowPassPt1F32_do(&aObsv->speedLpf, aObsv->speedEstB);
244 #endif
245
246 return aObsv->angleEst;
247 }
248
249
250 /** \brief Set the position offset (in ticks)
251 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
252 * \param offset Position offset in ticks
253 */
254 void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
255 {
256 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
257 base->offset = offset;
258 }
259
260
261 /** \brief Update the status flags.
262 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
263 * \param sinIn Sinus value
264 * \param cosIn Cosinus value
265 * \note This function is automatically called by Ifx_AngleTrkF32_update()
266 */
267 void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
268 {
269 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
270 sint32 sqrAmpl = ((sint32)sinIn * (sint32)sinIn) + ((sint32)cosIn * (sint32)cosIn);
271 base->status.B.signalLoss = (sqrAmpl < aObsv->cfgData.sqrAmplMin);
272 base->status.B.signalDegradation = (sqrAmpl > aObsv->cfgData.sqrAmplMax);
273 base->status.B.trackingLoss = __absf(aObsv->angleErr) > aObsv->cfgData.errorThreshold;
274 }
275
276
277 /** \brief Update the object directly from its analog input
278 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
279 */
280 void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
281 {
282 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
283 float32 angleEst = Ifx_AngleTrkF32_step(aObsv, *aObsv->sinIn, *aObsv->cosIn, 0);
284
285 IfxStdIf_Pos_RawAngle newPosition = (IfxStdIf_Pos_RawAngle)(angleEst * (aObsv->base.resolution / 2) / IFX_PI);
286 newPosition = newPosition & (aObsv->base.resolution - 1);
287 base->rawPosition = newPosition;
288
289 Ifx_AngleTrkF32_updateStatus(aObsv, *aObsv->sinIn, *aObsv->cosIn);
290 }
291
292
293 /** \brief Returns the actual position
294 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
295 * \note This function returns the angular position in ticks [0 .. Ifx_AngleTrkF32.base.resolution-1] (represents 0..360 degree)
296 */
297 IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
298 {
299 Ifx_AngleTrkF32_PosIf *base = &aObsv->base;
300 return base->rawPosition;
301 }
302
303
304 /** \brief Returns the Speed
305 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
306 */
307 float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
308 {
309 #if !IFX_CFG_ANGLETRKF32_FILTERED_SPEED
310 return aObsv->speedEstB; /* note: using speedEstB has better dynamic */
311 #else
312 return aObsv->speedLpf.out; /* note: using filtered speed has less ripples */
313 #endif
314 }
315
316
317 /*>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>*/
318 float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
319 {
320 return ((float32)driver->base.turn + (float32)driver->base.rawPosition / (float32)driver->base.resolution) * 2.0 * IFX_PI;
321 }
322
323
324 IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
325 {
326 return driver->base.direction;
327 }
328
329
330 IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
331 {
332 return driver->base.status;
333 }
334
335
336 sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
337 {
338 return driver->base.offset;
339 }
340
341
342 uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
343 {
344 return driver->base.periodPerRotation;
345 }
346
347
348 float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
349 {
350 return (float32)driver->base.rawPosition * driver->base.positionConst;
351 }
352
353
354 float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
355 {
356 return driver->base.Ts;
357 }
358
359
360 sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
361 {
362 return driver->base.resolution;
363 }
364
365
366 IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
367 {
368 IFX_UNUSED_PARAMETER(driver);
369 return IfxStdIf_Pos_SensorType_angletrk;
370 }
371
372
373 sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
374 {
375 return driver->base.turn;
376 }
377
378
379 void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
380 {
381 driver->base.status.status = 0;
382 }
383
384
385 void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
386 {
387 driver->base.Ts = updatePeriod;
388 }
389
390
391 void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
392 {
393 driver->base.rawPosition = 0;
394 driver->base.direction = IfxStdIf_Pos_Dir_unknown;
395 driver->base.turn = 0;
396 driver->angleErr = 0.0F;
397 driver->angleEst = 0.0F;
398 driver->accelEst = 0.0F;
399 driver->speedEstA = 0.0F;
400 driver->speedEstB = 0.0F;
401 driver->angleRef = 0.0F;
402 #if IFX_CFG_ANGLETRKF32_SPEED_FILTER
403 Ifx_LowPassPt1F32_reset(&driver->speedLpf);
404 #endif
405
406 driver->base.status.status = 0;
407 }
408
409
410 boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
411 {
412 /* Ensure the stdif is reset to zeros */
413 memset(stdif, 0, sizeof(IfxStdIf_Pos));
414
415 /* Set the driver */
416 stdif->driver = driver;
417
418 /* *INDENT-OFF* Note: this file was indented manually by the author. */
419 /* Set the API link */
420 stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )NULL_PTR;
421 stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&Ifx_AngleTrkF32_getAbsolutePosition;
422 stdif->getDirection =(IfxStdIf_Pos_GetDirection )&Ifx_AngleTrkF32_getDirection;
423 stdif->getFault =(IfxStdIf_Pos_GetFault )&Ifx_AngleTrkF32_getFault;
424 stdif->getOffset =(IfxStdIf_Pos_GetOffset )&Ifx_AngleTrkF32_getOffset;
425 stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&Ifx_AngleTrkF32_getPeriodPerRotation;
426 stdif->getPosition =(IfxStdIf_Pos_GetPosition )&Ifx_AngleTrkF32_getPosition;
427 stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&Ifx_AngleTrkF32_getRawPosition;
428 stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&Ifx_AngleTrkF32_getRefreshPeriod;
429 stdif->getResolution =(IfxStdIf_Pos_GetResolution )&Ifx_AngleTrkF32_getResolution;
430 stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&Ifx_AngleTrkF32_getSensorType;
431 stdif->reset =(IfxStdIf_Pos_Reset )&Ifx_AngleTrkF32_reset;
432 stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&Ifx_AngleTrkF32_resetFaults;
433 stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&Ifx_AngleTrkF32_getSpeed;
434 stdif->update =(IfxStdIf_Pos_Update )&Ifx_AngleTrkF32_update;
435 stdif->setPosition =(IfxStdIf_Pos_SetPosition )NULL_PTR;
436 stdif->setRawPosition =(IfxStdIf_Pos_SetRawPosition )NULL_PTR;
437 stdif->setSpeed =(IfxStdIf_Pos_SetSpeed )NULL_PTR;
438 stdif->setOffset =(IfxStdIf_Pos_SetOffset )&Ifx_AngleTrkF32_setOffset;
439 stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&Ifx_AngleTrkF32_setRefreshPeriod;
440 stdif->getTurn =(IfxStdIf_Pos_GetTurn )&Ifx_AngleTrkF32_getTurn;
441 /* *INDENT-ON* */
442
443 return TRUE;
444 }
Ifx_AngleTrkF32_resetFaults
void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:379
Ifx_AngleTrkF32_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: Ifx_AngleTrkF32.h:65
Ifx_AngleTrkF32_update
void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input.
Definition: Ifx_AngleTrkF32.c:280
Ifx_AngleTrkF32_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
Definition: Ifx_AngleTrkF32.h:68
Ifx_AngleTrkF32_getRawPosition
IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
Returns the actual position.
Definition: Ifx_AngleTrkF32.c:297
Ifx_AngleTrkF32_getAbsolutePosition
float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:318
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:170
round_f
float32 round_f(float32 val)
Definition: Ifx_AngleTrkF32.c:79
Ifx_AngleTrkF32_initConfig
void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values.
Definition: Ifx_AngleTrkF32.c:113
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1648
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:290
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:48
ATO_K
#define ATO_K
Definition: Ifx_AngleTrkF32.c:101
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:122
Ifx_LowPassPt1F32_do
float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:56
Ifx_AngleTrkF32::angleAtan
float32 angleAtan
Definition: Ifx_AngleTrkF32.h:106
Ifx_AngleTrkF32::base
Ifx_AngleTrkF32_PosIf base
Definition: Ifx_AngleTrkF32.h:101
IfxStdIf_Pos_SetRawPosition
void(* IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:248
IfxStdIf_Pos_SensorType_angletrk
Definition: IfxStdIf_Pos.h:69
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:286
IfxStdIf_Pos_::setPosition
IfxStdIf_Pos_SetPosition setPosition
Definition: IfxStdIf_Pos.h:287
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:188
Ifx_AngleTrkF32_CfgData::kd
float32 kd
Derivative gain.
Definition: Ifx_AngleTrkF32.h:77
Ifx_AngleTrkF32_getResolution
sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:360
Ifx_AngleTrkF32::angleEst
float32 angleEst
Definition: Ifx_AngleTrkF32.h:108
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:268
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:79
Ifx_AngleTrkF32_CfgData::ki
float32 ki
Integrator gain.
Definition: Ifx_AngleTrkF32.h:76
Ifx_AngleTrkF32_PosIf::rawPosition
IfxStdIf_Pos_RawAngle rawPosition
raw position in ticks.
Definition: Ifx_AngleTrkF32.h:85
Ifx_AngleTrkF32_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:63
float32
float float32
Definition: Platform_Types.h:167
Ifx_AngleTrkF32::angleErr
float32 angleErr
Definition: Ifx_AngleTrkF32.h:112
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:275
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:276
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:85
Ifx_AngleTrkF32_Config::resolution
sint32 resolution
Sensor resolution.
Definition: Ifx_AngleTrkF32.h:67
Ifx_LowPassPt1F32_reset
IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable.
Definition: Ifx_LowPassPt1F32.h:73
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:96
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:279
Ifx_AngleTrkF32_boundInput
IFX_INLINE float32 Ifx_AngleTrkF32_boundInput(float32 input)
Definition: Ifx_AngleTrkF32.c:73
Ifx_AngleTrkF32_init
void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object.
Definition: Ifx_AngleTrkF32.c:145
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:273
Ifx_AngleTrkF32_getFault
IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:330
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:115
Ifx_AngleTrkF32_step
float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisa...
Definition: Ifx_AngleTrkF32.c:203
Ifx_AngleTrkF32_getSensorType
IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:366
IfxStdIf_Pos_::setRawPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
Definition: IfxStdIf_Pos.h:288
FALSE
#define FALSE
Definition: Platform_Types.h:90
Ifx_AngleTrkF32::speedEstB
float32 speedEstB
Definition: Ifx_AngleTrkF32.h:110
Ifx_AngleTrkF32_CfgData::kp
float32 kp
Proportional gain.
Definition: Ifx_AngleTrkF32.h:75
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:277
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
Ifx_AngleTrkF32.h
Angle-tracking observer for sin/cos analog position sensor.
Ifx_AngleTrkF32_Config::sinIn
sint16 * sinIn
Pointer to SIN input variable.
Definition: Ifx_AngleTrkF32.h:69
Ifx_AngleTrkF32_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop.
Definition: Ifx_AngleTrkF32.h:62
Ifx_AngleTrkF32_getDirection
IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:324
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:272
sint16
short sint16
Definition: Platform_Types.h:126
Ifx_AngleTrkF32::cfgData
Ifx_AngleTrkF32_CfgData cfgData
Definition: Ifx_AngleTrkF32.h:102
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:200
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:274
Ifx_AngleTrkF32_bound
IFX_INLINE float32 Ifx_AngleTrkF32_bound(float32 angle, float32 periodPerRotation)
Definition: Ifx_AngleTrkF32.c:53
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1612
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:182
Ifx_AngleTrkF32_reset
void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:391
IfxStdIf_Pos_SetPosition
void(* IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:242
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:164
Ifx_AngleTrkF32::halfTs
float32 halfTs
Definition: Ifx_AngleTrkF32.h:105
Ifx_LowPassPt1F32_init
void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:38
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_AngleTrkF32_setControlGains
void Ifx_AngleTrkF32_setControlGains(Ifx_AngleTrkF32_CfgData *cfgData, float32 K, float32 T, float32 psi)
Definition: Ifx_AngleTrkF32.c:104
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:141
Ifx_AngleTrkF32_getTurn
sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:373
Ifx_AngleTrkF32_PosIf::resolution
IfxStdIf_Pos_RawAngle resolution
resolution of this position sensor interface
Definition: Ifx_AngleTrkF32.h:93
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:262
Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration.
Definition: Ifx_AngleTrkF32.h:56
Ifx_AngleTrkF32_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter.
Definition: Ifx_AngleTrkF32.h:61
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:75
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:155
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:78
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:278
Ifx_AngleTrkF32_setRefreshPeriod
void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
Definition: Ifx_AngleTrkF32.c:385
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:266
Ifx_AngleTrkF32_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: Ifx_AngleTrkF32.h:66
ATO_PSI
#define ATO_PSI
Definition: Ifx_AngleTrkF32.c:102
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:77
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:64
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
Ifx_AngleTrkF32_PosIf::turn
sint32 turn
number of mechanical turns. FIXME to be implemented
Definition: Ifx_AngleTrkF32.h:86
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:148
Ifx_AngleTrkF32_setUserSampling
void Ifx_AngleTrkF32_setUserSampling(Ifx_AngleTrkF32 *aObsv, float32 Ts)
Definition: Ifx_AngleTrkF32.c:133
Ifx_AngleTrkF32_stdIfPosInit
boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos".
Definition: Ifx_AngleTrkF32.c:410
Ifx_AngleTrkF32_getRefreshPeriod
float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:354
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:56
Ifx_AngleTrkF32::angleRef
float32 angleRef
Definition: Ifx_AngleTrkF32.h:107
Ifx_AngleTrkF32::speedLpf
Ifx_LowPassPt1F32 speedLpf
Definition: Ifx_AngleTrkF32.h:113
Ifx_AngleTrkF32_getSpeed
float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
Returns the Speed.
Definition: Ifx_AngleTrkF32.c:307
IfxStdIf_Pos_SetSpeed
void(* IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:255
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:284
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:235
Ifx_AngleTrkF32
Angle Tracking Observer object.
Definition: Ifx_AngleTrkF32.h:99
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:219
Ifx_AngleTrkF32_PosIf
Definition: Ifx_AngleTrkF32.h:83
Ifx_AngleTrkF32_CfgData
Definition: Ifx_AngleTrkF32.h:73
Ifx_AngleTrkF32_Config::cosIn
sint16 * cosIn
Pointer to COS input variable.
Definition: Ifx_AngleTrkF32.h:70
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:271
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_AngleTrkF32_getPeriodPerRotation
uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:342
ATO_T
#define ATO_T
Definition: Ifx_AngleTrkF32.c:100
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:270
Ifx_AngleTrkF32::accelEst
float32 accelEst
Definition: Ifx_AngleTrkF32.h:111
Ifx_AngleTrkF32_PosIf::Ts
float32 Ts
update period in seconds
Definition: Ifx_AngleTrkF32.h:94
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:194
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_AngleTrkF32_PosIf::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: Ifx_AngleTrkF32.h:87
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:54
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:109
Ifx_AngleTrkF32_PosIf::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: Ifx_AngleTrkF32.h:88
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:283
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:210
IFX_ANGLETRKF32_ATAN2F
#define IFX_ANGLETRKF32_ATAN2F
Definition: Ifx_AngleTrkF32.c:37
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:269
Ifx_AngleTrkF32_getOffset
sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:336
Ifx_AngleTrkF32_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:64
Ifx_AngleTrkF32_getPosition
float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:348
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:83
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:55
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:52
TRUE
#define TRUE
Definition: Platform_Types.h:87
Ifx_AngleTrkF32::speedEstA
float32 speedEstA
Definition: Ifx_AngleTrkF32.h:109
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:280
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:282
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:132
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:176
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:228
IfxStdIf_Pos_::setSpeed
IfxStdIf_Pos_SetSpeed setSpeed
Definition: IfxStdIf_Pos.h:289
Ifx_AngleTrkF32_setOffset
void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks)
Definition: Ifx_AngleTrkF32.c:254
Ifx_AngleTrkF32_PosIf::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: Ifx_AngleTrkF32.h:95
Ifx_AngleTrkF32_updateStatus
void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags.
Definition: Ifx_AngleTrkF32.c:267


iLLD_TC26B: Ifx_AngleTrkF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_AngleTrkF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_AngleTrkF32.h
3 * \brief Angle-tracking observer for sin/cos analog position sensor
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 *
14 * Infineon Technologies AG (Infineon) is supplying this file for use
15 * exclusively with Infineon's microcontroller products. This file can be freely
16 * distributed within development tools that are supporting such microcontroller
17 * products.
18 *
19 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
20 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
22 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
23 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
24 *
25 * \defgroup library_srvsw_sysse_math_f32_angletrk Angle-Tracking Observer
26 * This driver implements \ref library_srvsw_stdif_posif using 3rd order Angle-Tracking Observer algorithm.
27 * \ingroup library_srvsw_sysse_math_f32
28 *
29 */
30
31 #ifndef IFX_ANGLETRKF32_H
32 #define IFX_ANGLETRKF32_H
33
34 //________________________________________________________________________________________
35 // INCLUDES
36
37 #include "StdIf/IfxStdIf_Pos.h"
38 #include "SysSe/Math/Ifx_LowPassPt1F32.h"
39
40 //________________________________________________________________________________________
41 // CONFIGURATION DEFINES
42
43 #ifndef IFX_CFG_ANGLETRKF32_SPEED_FILTER
44 #define IFX_CFG_ANGLETRKF32_SPEED_FILTER (1)
45 #endif
46
47 /** \brief Specify whether the speed reading is filtered by low-pass filter or not */
48 #ifndef IFX_CFG_ANGLETRKF32_FILTERED_SPEED
49 #define IFX_CFG_ANGLETRKF32_FILTERED_SPEED (1)
50 #endif
51
52 //________________________________________________________________________________________
53 // DATA STRUCTURES
54
55 /** \brief Angle Tracking Observer configuration */
56 typedef struct
57 {
58 float32 kp; /**< \brief Proportional gain */
59 float32 ki; /**< \brief Integrator gain */
60 float32 kd; /**< \brief Derivative gain */
61 float32 speedLpfFc; /**< \brief Cut-off frequency of speed low-pass filter. */
62 float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop */
63 sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
64 sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
65 uint16 periodPerRotation; /**< \brief Number of electrical periods per mechanical rotation */
66 boolean reversed; /**< \brief TRUE: reversed direction, FALSE: straight direction */
67 sint32 resolution; /**< \brief Sensor resolution */
68 IfxStdIf_Pos_RawAngle offset; /**< \brief Offset in ticks. [0 .. (\ref Ifx_AngleTrkF32_Config.resolution - 1)] */
69 sint16 *sinIn; /**< \brief Pointer to SIN input variable */
70 sint16 *cosIn; /**< \brief Pointer to COS input variable */
71 } Ifx_AngleTrkF32_Config;
72
73 typedef struct
74 {
75 float32 kp; /**< \brief Proportional gain */
76 float32 ki; /**< \brief Integrator gain */
77 float32 kd; /**< \brief Derivative gain */
78 float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop */
79 sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
80 sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
81 } Ifx_AngleTrkF32_CfgData;
82
83 typedef struct
84 {
85 IfxStdIf_Pos_RawAngle rawPosition; /**< \brief raw position in ticks. \note: the value already contains the offset */
86 sint32 turn; /**< \brief number of mechanical turns. FIXME to be implemented */
87 IfxStdIf_Pos_Dir direction; /**< \brief rotation direction */
88 IfxStdIf_Pos_Status status; /**< \brief error code (0 = no error) */
89 /* configuration */
90 IfxStdIf_Pos_RawAngle offset; /**< \brief raw position offset */
91 boolean reversed; /**< \brief reverse direction */
92 uint16 periodPerRotation; /**< \brief sensor 'electrical' periods per mechanical rotation */
93 IfxStdIf_Pos_RawAngle resolution; /**< \brief resolution of this position sensor interface */
94 float32 Ts; /**< \brief update period in seconds */
95 float32 positionConst; /**< \brief constant for calculating mechanical position (in rad) from raw position */
96 } Ifx_AngleTrkF32_PosIf;
97
98 /** \brief Angle Tracking Observer object */
99 typedef struct
100 {
101 Ifx_AngleTrkF32_PosIf base;
102 Ifx_AngleTrkF32_CfgData cfgData;
103 sint16 *sinIn; /**< \brief Pointer to SIN input variable */
104 sint16 *cosIn; /**< \brief Pointer to COS input variable */
105 float32 halfTs;
106 float32 angleAtan;
107 float32 angleRef;
108 float32 angleEst;
109 float32 speedEstA;
110 float32 speedEstB;
111 float32 accelEst;
112 float32 angleErr;
113 Ifx_LowPassPt1F32 speedLpf; /**< Only used if IFX_CFG_ANGLETRKF32_SPEED_FILTER is set */
114 } Ifx_AngleTrkF32;
115
116 /** \addtogroup library_srvsw_sysse_math_f32_angletrk
117 * \{ */
118
119 //________________________________________________________________________________________
120 // PUBLIC FUNCTION PROTOTYPES
121
122 /** \name Initialisation functions
123 * Example use:
124 * \code
125 * extern sint16 g_SinInput, g_CosInput;
126 * Ifx_AngleTrkF32_Config driverConfig;
127 * Ifx_AngleTrkF32 driverData;
128 * Ifx_AngleTrkF32_initConfig(&driverConfig, &g_SinInput, g_CosInput);
129 * driverConfig.errorThreshold = 5.0 / 180 * IFX_PI; // 5 degree error
130 * driverConfig.sqrAmplMax = 1.01 * 1.01;
131 * driverConfig.sqrAmplMin = 0.99 * 0.99;
132 * driverConfig.speedLpfFc = 100;
133 * driverConfig.periodPerRotation = 1;
134 * driverConfig.reversed = FALSE;
135 * driverConfig.offset = 0;
136 * Ifx_AngleTrkF32_init(&driverData, &driverConfig);
137 * \endcode
138 * Prototypes:
139 * \{ */
140 IFX_EXTERN void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts);
141 IFX_EXTERN void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn);
142 /** \} */
143
144 /** \name Protected functions
145 * These functions are not for end-user but may be used by another driver which extends
146 * the functionality of library_srvsw_sysse_math_f32_angletrk
147 * \{ */
148 IFX_EXTERN float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase);
149 IFX_EXTERN void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn);
150 IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv);
151 /** \} */
152
153 /** \} */
154
155 /** \brief get the speed.
156 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
157 */
158 IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv)
159 {
160 return aObsv->speedEstB; /* note: using speedEstB has better dynamic */
161 /* return aObsv->speedLpf.out; */
162 }
163
164
165 /** \addtogroup library_srvsw_sysse_math_f32_angletrk
166 * \{ */
167
168 /******************************************************************************/
169 /*-------------------------Global Function Prototypes-------------------------*/
170 /******************************************************************************/
171
172 /** \brief \see IfxStdIf_Pos_GetAbsolutePosition
173 * \param driver driver handle
174 * \return absolute position
175 */
176 IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver);
177
178 /** \brief \see IfxStdIf_Pos_GetDirection
179 * \param driver driver handle
180 * \return direction
181 */
182 IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver);
183
184 /** \brief \see IfxStdIf_Pos_GetFault
185 * \param driver driver handle
186 * \return Fault
187 */
188 IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver);
189
190 /** \brief \see IfxStdIf_Pos_GetOffset
191 * \param driver driver handle
192 * \return offset address
193 */
194 IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver);
195
196 /** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
197 * \param driver driver handle
198 * \return Period per rotation
199 */
200 IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver);
201
202 /** \brief \see IfxStdIf_Pos_GetPosition
203 * \param driver driver handle
204 * \return position
205 */
206 IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver);
207
208 /** \brief \see IfxStdIf_Pos_GetRawPosition
209 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
210 * \return position in ticks
211 */
212 IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv);
213
214 /** \brief \see IfxStdIf_Pos_GetRefreshPeriod
215 * \param driver driver handle
216 * \return update period
217 */
218 IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver);
219
220 /** \brief \see IfxStdIf_Pos_GetResolution
221 * \param driver driver handle
222 * \return resolution
223 */
224 IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver);
225
226 /** \brief \see IfxStdIf_Pos_GetTurn
227 * \param driver driver handle
228 * \return Returns the number of turns
229 */
230 IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver);
231
232 /** \brief \see IfxStdIf_Pos_GetSensorType
233 * \param driver driver handle
234 * \return sensor type
235 */
236 IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver);
237
238 /** \brief \see IfxStdIf_Pos_GetSpeed
239 * \param aObsv Pointer to the Ifx_AngleTrkF32 object
240 * \return speed
241 */
242 IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv);
243
244 /** \brief \see IfxStdIf_Pos_Reset
245 * \param driver driver handle
246 * \return None
247 */
248 IFX_EXTERN void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver);
249
250 /** \brief \see IfxStdIf_Pos_ResetFaults
251 * \param driver driver handle
252 * \return None
253 */
254 IFX_EXTERN void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver);
255
256 /** \brief \see IfxStdIf_Pos_SetOffset
257 * \param aObsv driver handle
258 * \param offset offset
259 * \return None
260 */
261 IFX_EXTERN void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset);
262
263 /** \brief \see IfxStdIf_Pos_SetRefreshPeriod
264 * \param driver driver handle
265 * \param updatePeriod update period
266 * \return None
267 */
268 IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod);
269
270 /** \brief \see IfxStdIf_Pos_Update
271 * \param aObsv driver handle
272 * \return None
273 */
274 IFX_EXTERN void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv);
275
276 /** \} */
277
278 /******************************************************************************/
279 /*-------------------------Global Function Prototypes-------------------------*/
280 /******************************************************************************/
281
282 /** \brief Initializes the standard interface "Pos"
283 * \param stdif Standard interface position object
284 * \param driver Virtual position sensor
285 * \return TRUE on success else FALSE
286 */
287 IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver);
288
289 #endif /* IFX_ANGLETRKF32_H */
Ifx_AngleTrkF32_resetFaults
IFX_EXTERN void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:379
Ifx_AngleTrkF32_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: Ifx_AngleTrkF32.h:65
Ifx_AngleTrkF32_update
IFX_EXTERN void Ifx_AngleTrkF32_update(Ifx_AngleTrkF32 *aObsv)
Update the object directly from its analog input.
Definition: Ifx_AngleTrkF32.c:280
Ifx_AngleTrkF32_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
Definition: Ifx_AngleTrkF32.h:68
Ifx_AngleTrkF32_getRawPosition
IFX_EXTERN IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
Returns the actual position.
Definition: Ifx_AngleTrkF32.c:297
Ifx_AngleTrkF32_getAbsolutePosition
IFX_EXTERN float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:318
Ifx_AngleTrkF32_initConfig
IFX_EXTERN void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values.
Definition: Ifx_AngleTrkF32.c:113
Ifx_AngleTrkF32::angleAtan
float32 angleAtan
Definition: Ifx_AngleTrkF32.h:106
Ifx_AngleTrkF32_stdIfPosInit
IFX_EXTERN boolean Ifx_AngleTrkF32_stdIfPosInit(IfxStdIf_Pos *stdif, Ifx_AngleTrkF32 *driver)
Initializes the standard interface "Pos".
Definition: Ifx_AngleTrkF32.c:410
Ifx_AngleTrkF32::base
Ifx_AngleTrkF32_PosIf base
Definition: Ifx_AngleTrkF32.h:101
Ifx_AngleTrkF32_Config::kd
float32 kd
Derivative gain.
Definition: Ifx_AngleTrkF32.h:60
Ifx_AngleTrkF32_getResolution
IFX_EXTERN sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:360
Ifx_AngleTrkF32::angleEst
float32 angleEst
Definition: Ifx_AngleTrkF32.h:108
Ifx_AngleTrkF32_Config::ki
float32 ki
Integrator gain.
Definition: Ifx_AngleTrkF32.h:59
Ifx_AngleTrkF32_PosIf::rawPosition
IfxStdIf_Pos_RawAngle rawPosition
raw position in ticks.
Definition: Ifx_AngleTrkF32.h:85
Ifx_AngleTrkF32_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:63
float32
float float32
Definition: Platform_Types.h:167
Ifx_AngleTrkF32::angleErr
float32 angleErr
Definition: Ifx_AngleTrkF32.h:112
Ifx_AngleTrkF32_Config::resolution
sint32 resolution
Sensor resolution.
Definition: Ifx_AngleTrkF32.h:67
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:96
Ifx_AngleTrkF32_init
IFX_EXTERN void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object.
Definition: Ifx_AngleTrkF32.c:145
Ifx_AngleTrkF32_getFault
IFX_EXTERN IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:330
Ifx_AngleTrkF32_step
IFX_EXTERN float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisa...
Definition: Ifx_AngleTrkF32.c:203
Ifx_AngleTrkF32_getSensorType
IFX_EXTERN IfxStdIf_Pos_SensorType Ifx_AngleTrkF32_getSensorType(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:366
Ifx_AngleTrkF32::speedEstB
float32 speedEstB
Definition: Ifx_AngleTrkF32.h:110
Ifx_AngleTrkF32_Config::kp
float32 kp
Proportional gain.
Definition: Ifx_AngleTrkF32.h:58
Ifx_AngleTrkF32_Config::sinIn
sint16 * sinIn
Pointer to SIN input variable.
Definition: Ifx_AngleTrkF32.h:69
Ifx_AngleTrkF32_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop.
Definition: Ifx_AngleTrkF32.h:62
Ifx_AngleTrkF32_getDirection
IFX_EXTERN IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:324
sint16
short sint16
Definition: Platform_Types.h:126
Ifx_AngleTrkF32::cfgData
Ifx_AngleTrkF32_CfgData cfgData
Definition: Ifx_AngleTrkF32.h:102
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:44
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStdIf_Pos.h
Standard interface: Position interface.
Ifx_AngleTrkF32_reset
IFX_EXTERN void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:391
Ifx_AngleTrkF32::halfTs
float32 halfTs
Definition: Ifx_AngleTrkF32.h:105
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_AngleTrkF32_getTurn
IFX_EXTERN sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:373
Ifx_AngleTrkF32_PosIf::resolution
IfxStdIf_Pos_RawAngle resolution
resolution of this position sensor interface
Definition: Ifx_AngleTrkF32.h:93
Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration.
Definition: Ifx_AngleTrkF32.h:56
Ifx_AngleTrkF32_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter.
Definition: Ifx_AngleTrkF32.h:61
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:75
Ifx_AngleTrkF32_setRefreshPeriod
IFX_EXTERN void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
Definition: Ifx_AngleTrkF32.c:385
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:266
Ifx_AngleTrkF32_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: Ifx_AngleTrkF32.h:66
Ifx_LowPassPt1F32.h
Low pass filter PT1.
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:64
Ifx_AngleTrkF32_getLoopSpeed
IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv)
get the speed.
Definition: Ifx_AngleTrkF32.h:158
Ifx_AngleTrkF32_PosIf::turn
sint32 turn
number of mechanical turns. FIXME to be implemented
Definition: Ifx_AngleTrkF32.h:86
Ifx_AngleTrkF32_getRefreshPeriod
IFX_EXTERN float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:354
Ifx_AngleTrkF32::angleRef
float32 angleRef
Definition: Ifx_AngleTrkF32.h:107
Ifx_AngleTrkF32::speedLpf
Ifx_LowPassPt1F32 speedLpf
Definition: Ifx_AngleTrkF32.h:113
Ifx_AngleTrkF32_getSpeed
IFX_EXTERN float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
Returns the Speed.
Definition: Ifx_AngleTrkF32.c:307
Ifx_AngleTrkF32
Angle Tracking Observer object.
Definition: Ifx_AngleTrkF32.h:99
Ifx_AngleTrkF32_PosIf
Definition: Ifx_AngleTrkF32.h:83
Ifx_AngleTrkF32_CfgData
Definition: Ifx_AngleTrkF32.h:73
Ifx_AngleTrkF32_Config::cosIn
sint16 * cosIn
Pointer to COS input variable.
Definition: Ifx_AngleTrkF32.h:70
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_AngleTrkF32_getPeriodPerRotation
IFX_EXTERN uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:342
Ifx_AngleTrkF32::accelEst
float32 accelEst
Definition: Ifx_AngleTrkF32.h:111
Ifx_AngleTrkF32_PosIf::Ts
float32 Ts
update period in seconds
Definition: Ifx_AngleTrkF32.h:94
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_AngleTrkF32_PosIf::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: Ifx_AngleTrkF32.h:87
Ifx_AngleTrkF32_PosIf::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: Ifx_AngleTrkF32.h:88
Ifx_AngleTrkF32_getOffset
IFX_EXTERN sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:336
Ifx_AngleTrkF32_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:64
Ifx_AngleTrkF32_getPosition
IFX_EXTERN float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:348
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:83
Ifx_AngleTrkF32::speedEstA
float32 speedEstA
Definition: Ifx_AngleTrkF32.h:109
Ifx_AngleTrkF32_setOffset
IFX_EXTERN void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks)
Definition: Ifx_AngleTrkF32.c:254
Ifx_AngleTrkF32_PosIf::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: Ifx_AngleTrkF32.h:95
Ifx_AngleTrkF32_updateStatus
IFX_EXTERN void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags.
Definition: Ifx_AngleTrkF32.c:267


iLLD_TC26B: Ifx_Assert.h Source File

  • Service
  • CpuGeneric
  • _Utilities
Ifx_Assert.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Assert.h
3 * \brief Assert functions.
4 * \ingroup library_srvsw_utilities_assert
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-28 14:15:42 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup library_srvsw_utilities_assert Assertion
25 * This module implements assertion functions.
26 * \ingroup library_srvsw_utilities
27 *
28 */
29
30 #ifndef IFX_ASSERT_H
31 #define IFX_ASSERT_H 1
32
33 #include "Ifx_Cfg.h" /* Do not remove this include */
34 #include "Cpu/Std/Ifx_Types.h" /* Do not remove this include */
35
36 /** \addtogroup library_srvsw_utilities_assert
37 * \{ */
38
39 #define IFX_VERBOSE_LEVEL_OFF (0) /**< \brief Assertion level off, assertion is disabled */
40 #define IFX_VERBOSE_LEVEL_FAILURE (1) /**< \brief Assertion level failure, a debug instruction is inserted if enabled */
41 #define IFX_VERBOSE_LEVEL_ERROR (2) /**< \brief Assertion level error, a debug instruction is inserted if enabled */
42 #define IFX_VERBOSE_LEVEL_WARNING (3) /**< \brief Assertion level warning */
43 #define IFX_VERBOSE_LEVEL_INFO (4) /**< \brief Assertion level info */
44 #define IFX_VERBOSE_LEVEL_DEBUG (5) /**< \brief Assertion level debug */
45
46 /** \brief Constant to be used to indicate not implemented feature */
47 #define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED (FALSE)
48 /** \brief Feature is not available on the selected hardware */
49 #define IFX_ASSERT_FEATURE_NOT_AVAILABLE (FALSE)
50
51 #ifndef IFX_ASSERT
52 # define IFX_ASSERT(level, expr) ((void)0)
53 #endif
54
55 #ifndef IFX_VALIDATE
56 # define IFX_VALIDATE(level, expr) (expr)
57 #endif
58
59 #ifdef IFX_CFG_ASSERT_INCLUDE
60 /** Configuration switch: IFX_CFG_ASSERT_INCLUDE
61 * This switch is used to enable user defined assertion implementation.
62 * A usage exmaple is given below:
63 *
64 * \code
65 * // File "Ifx_Cfg.h"
66 * #define IFX_CFG_ASSERT_INCLUDE "SysSe/Bsp/Assert.h"
67 * \endcode
68 */
69 #include IFX_CFG_ASSERT_INCLUDE
70 #endif
71 /** \} */
72
73 #endif
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC26B: Ifx_Cf32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Cf32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Cf32.c
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 */
24
25 #include "Ifx_Cf32.h"
26 #include <float.h>
27 #include <stdio.h>
28
29 void CplxVecRst_f32(cfloat32 *X, short nX)
30 {
31 for ( ; nX > 0; nX--)
32 {
33 X->real = X->imag = 0.0;
34 X++;
35 }
36 }
37
38
39 void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
40 {
41 for ( ; nS > 0; nS--)
42 {
43 (*X).imag = 0.0;
44 (*X).real = *(S);
45 X++; S += incrS;
46 }
47 }
48
49
50 void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
51 {
52 for ( ; nS > 0; nS--)
53 {
54 *X = *S;
55 X++; S++;
56 }
57 }
58
59
60 float32 *CplxVecPwr_f32(cfloat32 *X, short nX)
61 {
62 unsigned short i;
63 float32 *r = (float32 *)X;
64
65 for (i = 0; i < nX; i++)
66 {
67 *r = IFX_Cf32_dot(X);
68 r++; X++;
69 }
70
71 return &r[-nX];
72 }
73
74
75 float32 *CplxVecMag_f32(cfloat32 *X, short nX)
76 {
77 unsigned short i;
78 float32 *r = (float32 *)X;
79
80 for (i = 0; i < nX; i++)
81 {
82 *r = IFX_Cf32_mag(X);
83 r++; X++;
84 }
85
86 return &r[-nX];
87 }
88
89
90 void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
91 {
92 for ( ; nX > 0; nX--)
93 {
94 *X = IFX_Cf32_mul(X, mul);
95 X++;
96 }
97 }
98
99
100 void VecPwrdB_f32(float32 *X, short nX)
101 {
102 unsigned short i;
103
104 for (i = 0; i < nX; i++)
105 {
106 *X = (float32)20.0 * log10f(*X);
107 X++;
108 }
109 }
110
111
112 void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
113 {
114 unsigned short i;
115
116 for (i = 0; i < nX; i++)
117 {
118 *R = (sint16)(20.0 * log10f(*X));
119 R++; X++;
120 }
121 }
122
123
124 float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
125 {
126 float32 maxPeak = FLT_MIN;
127 unsigned short m;
128
129 for (m = 0; m < nX; m++)
130 {
131 if (*X > maxPeak)
132 {
133 maxPeak = *X;
134 *minIdx = m;
135 }
136
137 if (*X >= maxPeak)
138 {
139 *maxIdx = m;
140 }
141
142 X++;
143 }
144
145 return maxPeak;
146 }
147
148
149 float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
150 {
151 float32 minPeak = FLT_MAX;
152 short m;
153
154 for (m = 0; m < nX; m++)
155 {
156 if (*X < minPeak)
157 {
158 minPeak = *X;
159 *minIdx = m;
160 }
161
162 if (*X <= minPeak)
163 {
164 *maxIdx = m;
165 }
166
167 X++;
168 }
169
170 return minPeak;
171 }
172
173
174 void VecOfs_f32(float32 *X, float32 offset, short nX)
175 {
176 unsigned short i;
177
178 for (i = 0; i < nX; i++)
179 {
180 *X -= offset;
181 X++;
182 }
183 }
184
185
186 void VecGain_f32(float32 *X, float32 gain, short nX)
187 {
188 unsigned short i;
189
190 for (i = 0; i < nX; i++)
191 {
192 *X = *X * gain;
193 X++;
194 }
195 }
196
197
198 float32 VecSum_f32(float32 *X, short nX)
199 {
200 float32 sumX = 0;
201 unsigned short i;
202
203 for (i = 0; i < nX; i++)
204 {
205 sumX += *X;
206 X++;
207 }
208
209 return sumX;
210 }
211
212
213 float32 VecAvg_f32(float32 *X, short nX)
214 {
215 return VecSum_f32(X, nX) / nX;
216 }
217
218
219 float32 VecMax_f32(float32 *X, short nX)
220 {
221 unsigned short i;
222 float32 r = FLT_MIN;
223
224 for (i = 0; i < nX; i++)
225 {
226 r = __maxf(r, *X);
227 X++;
228 }
229
230 return r;
231 }
232
233
234 float32 VecMin_f32(float32 *X, short nX)
235 {
236 unsigned short i;
237 float32 r = FLT_MAX;
238
239 for (i = 0; i < nX; i++)
240 {
241 r = __minf(r, *X);
242 X++;
243 }
244
245 return r;
246 }
247
248
249 void VecHalfSwap_f32(float32 *X, short nX)
250 {
251 unsigned short i;
252 unsigned short half = nX / 2;
253 float32 *F = &X[half];
254
255 for (i = 0; i < half; i++)
256 {
257 float32 tmp = *F;
258 *F = *X;
259 *X = tmp;
260 F++; X++;
261 }
262 }
263
264
265 /* NOTE:
266 * (nX <= nW) && ((nW % nX) == 0) && ((nX % 2) == 0)
267 * (symW != 0) when the window is symmetrical */
268 void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
269 {
270 short step = nW / nX;
271 short i;
272
273 if (symW != 0)
274 { /* symmetrical window, using half of the length */
275 for (i = 0; i < nX / 2; i++)
276 {
277 *X = *X * *W;
278 X = &X[incrX];
279 W = &W[step];
280 }
281
282 W = &W[-step];
283
284 for ( ; i < nX; i++)
285 {
286 *X = *X * *W;
287 X = &X[incrX];
288 W = &W[-step];
289 }
290 }
291 }
292
293
294 #ifdef __WIN32__
295
296 #define ENDL "\r\n"
297
298 void DataF_printf(FILE *fp, pchar fileName, float32 *data, long nX, int enclosed)
299 {
300 long i;
301
302 if (fileName != NULL)
303 {
304 fp = fopen(fileName, "w+");
305 }
306
307 if (fp != NULL)
308 {
309 if (enclosed)
310 {
311 for (i = 0; i < nX; i++)
312 {
313 fprintf(fp, "_DATAF(%10.20f)," ENDL, *data);
314 data = &data[1];
315 }
316 }
317 else
318 {
319 for (i = 0; i < nX; i++)
320 {
321 fprintf(fp, "%10.20f," ENDL, *data);
322 data = &data[1];
323 }
324 }
325 }
326
327 if (fileName != NULL)
328 {
329 fclose(fp);
330 }
331 }
332
333
334 void Cplx_f32_printf(FILE *fp, pchar fileName, cfloat32 *data, long nX, int encloseData)
335 {
336 long i;
337
338 if (fileName != NULL)
339 {
340 fp = fopen(fileName, "w+");
341 }
342
343 if (fp != NULL)
344 {
345 if (encloseData)
346 {
347 for (i = 0; i < nX; i++)
348 {
349 fprintf(fp, "{_DATAF(%10.20f), _DATAF(%10.20f)}," ENDL, data->real, data->imag);
350 data = &data[1];
351 }
352 }
353 else
354 {
355 for (i = 0; i < nX; i++)
356 {
357 fprintf(fp, "%10.20f, %10.20f" ENDL, data->real, data->imag);
358 data = &data[1];
359 }
360 }
361 }
362
363 if (fileName != NULL)
364 {
365 fclose(fp);
366 }
367 }
368
369
370 #endif
CplxVecMul_f32
void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
Definition: Ifx_Cf32.c:90
VecGain_f32
void VecGain_f32(float32 *X, float32 gain, short nX)
Definition: Ifx_Cf32.c:186
CplxVecPwr_f32
float32 * CplxVecPwr_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:60
VecOfs_f32
void VecOfs_f32(float32 *X, float32 offset, short nX)
Definition: Ifx_Cf32.c:174
Cplx_f32_printf
#define Cplx_f32_printf(...)
Definition: Ifx_Cf32.h:161
VecWin_f32
void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:268
VecSum_f32
float32 VecSum_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:198
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:47
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:47
VecMax_f32
float32 VecMax_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:219
float32
float float32
Definition: Platform_Types.h:167
VecMaxIdx_f32
float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:124
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:44
CplxVecMag_f32
float32 * CplxVecMag_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:75
VecPwrdB_f32
void VecPwrdB_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:100
__maxf
#define __maxf
Definition: IfxCpu_IntrinsicsDcc.h:1620
cfloat32
Definition: Ifx_Types.h:41
sint16
short sint16
Definition: Platform_Types.h:126
VecAvg_f32
float32 VecAvg_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:213
VecMin_f32
float32 VecMin_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:234
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:43
CplxVecRst_f32
void CplxVecRst_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:29
VecMinIdx_f32
float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:149
VecHalfSwap_f32
void VecHalfSwap_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:249
__minf
#define __minf
Definition: IfxCpu_IntrinsicsDcc.h:1616
IFX_Cf32_dot
IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
Definition: Ifx_Cf32.h:65
CplxVecCpy_f32S
void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
Definition: Ifx_Cf32.c:39
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
VecPwrdB_SF
void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
Definition: Ifx_Cf32.c:112
IFX_Cf32_mag
IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
Definition: Ifx_Cf32.h:71
CplxVecCpy_f32
void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
Definition: Ifx_Cf32.c:50


iLLD_TC26B: Ifx_Cf32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Cf32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Cf32.h
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup library_srvsw_sysse_math_cf32 Floating point signal, vector, and matrix library
25 * \ingroup library_srvsw_sysse_math_f32
26 */
27
28 #ifndef IFX_CF32_H
29 #define IFX_CF32_H
30
31 #include "Cpu/Std/IfxCpu_Intrinsics.h"
32 #include <math.h>
33
34 #define _DATAF(val) ((float32)(val))
35
36 /* Complex Arithmetic --------------------------------------------------------*/
37 IFX_INLINE cfloat32 IFX_Cf32_exp(const cfloat32 *c)
38 {
39 float32 f = (float32)expf(c->real);
40 cfloat32 R;
41 R.real = f * (float32)cosf(c->imag);
42 R.imag = f * (float32)sinf(c->imag);
43 return R;
44 }
45
46
47 IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
48 {
49 cfloat32 R;
50 R.real = (a->real * b->real) - (a->imag * b->imag);
51 R.imag = (a->imag * b->real) + (a->real * b->imag);
52 return R;
53 }
54
55
56 IFX_INLINE cfloat32 IFX_Cf32_amp(const cfloat32 *a, float32 gain)
57 {
58 cfloat32 R;
59 R.real = a->real * gain;
60 R.imag = a->imag * gain;
61 return R;
62 }
63
64
65 IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
66 {
67 return (b->real * b->real) + (b->imag * b->imag);
68 }
69
70
71 IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
72 {
73 return (float32)sqrtf(IFX_Cf32_dot(c));
74 }
75
76
77 IFX_INLINE cfloat32 IFX_Cf32_div(const cfloat32 *a, const cfloat32 *b)
78 {
79 float32 denom = IFX_Cf32_dot(b);
80 cfloat32 R;
81 R.real = ((a->real * b->real) + (a->imag * b->imag)) / denom;
82 R.imag = ((a->imag * b->real) - (a->real * b->imag)) / denom;
83 return R;
84 }
85
86
87 IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
88 {
89 cfloat32 R;
90 R.real = (a->real + b->real);
91 R.imag = (a->imag + b->imag);
92 return R;
93 }
94
95
96 IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
97 {
98 cfloat32 R;
99 R.real = (a->real - b->real);
100 R.imag = (a->imag - b->imag);
101 return R;
102 }
103
104
105 IFX_INLINE void IFX_Cf32_set(cfloat32 *a, float32 re, float32 im)
106 {
107 a->real = re;
108 a->imag = im;
109 }
110
111
112 IFX_INLINE void IFX_Cf32_reset(cfloat32 *a)
113 {
114 IFX_Cf32_set(a, 0.0, 0.0);
115 }
116
117
118 IFX_INLINE cfloat32 IFX_Cf32_saturate(cfloat32 *a, float32 *ampl, float32 limit)
119 {
120 cfloat32 R = *a;
121 *ampl = IFX_Cf32_mag(a);
122
123 if (*ampl > limit)
124 {
125 float32 scale = limit / *ampl;
126 R.imag = R.imag * scale;
127 R.real = R.real * scale;
128 }
129
130 return R;
131 }
132
133
134 IFX_EXTERN void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS);
135 IFX_EXTERN void CplxVecRst_f32(cfloat32 *X, short nX);
136 IFX_EXTERN void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS);
137 IFX_EXTERN float32 *CplxVecPwr_f32(cfloat32 *X, short nX);
138 IFX_EXTERN float32 *CplxVecMag_f32(cfloat32 *X, short nX);
139 IFX_EXTERN void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX);
140
141 /* Vector Operation ----------------------------------------------------------*/
142
143 IFX_EXTERN void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW);
144 IFX_EXTERN void VecPwrdB_f32(float32 *X, short nX);
145 IFX_EXTERN void VecPwrdB_SF(sint16 *R, float32 *X, short nX);
146 IFX_EXTERN void VecGain_f32(float32 *X, float32 gain, short nX);
147 IFX_EXTERN void VecOfs_f32(float32 *X, float32 offset, short nX);
148 IFX_EXTERN float32 VecSum_f32(float32 *X, short nX);
149 IFX_EXTERN float32 VecAvg_f32(float32 *X, short nX);
150 IFX_EXTERN float32 VecMax_f32(float32 *X, short nX);
151 IFX_EXTERN float32 VecMin_f32(float32 *X, short nX);
152 IFX_EXTERN float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx);
153 IFX_EXTERN float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx);
154 IFX_EXTERN void VecHalfSwap_f32(float32 *X, short nX);
155
156 /* Helper functions ----------------------------------------------------------*/
157 #ifdef __WIN32__
158 #include <stdio.h>
159 void Cplx_f32_printf(FILE *fp, pchar fileName, cfloat32 *data, long nX, int encloseData);
160 #else
161 #define Cplx_f32_printf(...)
162 #endif
163
164 #endif /* IFX_CF32_H */
IFX_Cf32_reset
IFX_INLINE void IFX_Cf32_reset(cfloat32 *a)
Definition: Ifx_Cf32.h:112
VecPwrdB_SF
IFX_EXTERN void VecPwrdB_SF(sint16 *R, float32 *X, short nX)
Definition: Ifx_Cf32.c:112
VecSum_f32
IFX_EXTERN float32 VecSum_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:198
Cplx_f32_printf
#define Cplx_f32_printf(...)
Definition: Ifx_Cf32.h:161
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:47
VecMaxIdx_f32
IFX_EXTERN float32 VecMaxIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:124
VecOfs_f32
IFX_EXTERN void VecOfs_f32(float32 *X, float32 offset, short nX)
Definition: Ifx_Cf32.c:174
float32
float float32
Definition: Platform_Types.h:167
IfxCpu_Intrinsics.h
VecAvg_f32
IFX_EXTERN float32 VecAvg_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:213
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:44
VecWin_f32
IFX_EXTERN void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:268
CplxVecCpy_f32
IFX_EXTERN void CplxVecCpy_f32(cfloat32 *X, cfloat32 *S, short nS)
Definition: Ifx_Cf32.c:50
cfloat32
Definition: Ifx_Types.h:41
sint16
short sint16
Definition: Platform_Types.h:126
IFX_Cf32_amp
IFX_INLINE cfloat32 IFX_Cf32_amp(const cfloat32 *a, float32 gain)
Definition: Ifx_Cf32.h:56
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
VecHalfSwap_f32
IFX_EXTERN void VecHalfSwap_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:249
VecPwrdB_f32
IFX_EXTERN void VecPwrdB_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:100
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IFX_Cf32_sub
IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:96
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:43
CplxVecCpy_f32S
IFX_EXTERN void CplxVecCpy_f32S(cfloat32 *X, short *S, short nS, short incrS)
Definition: Ifx_Cf32.c:39
IFX_Cf32_div
IFX_INLINE cfloat32 IFX_Cf32_div(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:77
IFX_Cf32_dot
IFX_INLINE float32 IFX_Cf32_dot(const cfloat32 *b)
Definition: Ifx_Cf32.h:65
VecMinIdx_f32
IFX_EXTERN float32 VecMinIdx_f32(float32 *X, short nX, sint16 *minIdx, sint16 *maxIdx)
Definition: Ifx_Cf32.c:149
VecMax_f32
IFX_EXTERN float32 VecMax_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:219
IFX_Cf32_add
IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:87
CplxVecPwr_f32
IFX_EXTERN float32 * CplxVecPwr_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:60
VecMin_f32
IFX_EXTERN float32 VecMin_f32(float32 *X, short nX)
Definition: Ifx_Cf32.c:234
VecGain_f32
IFX_EXTERN void VecGain_f32(float32 *X, float32 gain, short nX)
Definition: Ifx_Cf32.c:186
IFX_Cf32_set
IFX_INLINE void IFX_Cf32_set(cfloat32 *a, float32 re, float32 im)
Definition: Ifx_Cf32.h:105
IFX_Cf32_exp
IFX_INLINE cfloat32 IFX_Cf32_exp(const cfloat32 *c)
Definition: Ifx_Cf32.h:37
CplxVecMul_f32
IFX_EXTERN void CplxVecMul_f32(cfloat32 *X, const cfloat32 *mul, short nX)
Definition: Ifx_Cf32.c:90
CplxVecRst_f32
IFX_EXTERN void CplxVecRst_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:29
CplxVecMag_f32
IFX_EXTERN float32 * CplxVecMag_f32(cfloat32 *X, short nX)
Definition: Ifx_Cf32.c:75
IFX_Cf32_saturate
IFX_INLINE cfloat32 IFX_Cf32_saturate(cfloat32 *a, float32 *ampl, float32 limit)
Definition: Ifx_Cf32.h:118
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
IFX_Cf32_mag
IFX_INLINE float32 IFX_Cf32_mag(const cfloat32 *c)
Definition: Ifx_Cf32.h:71


iLLD_TC26B: Ifx_CircularBuffer.asm.c Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.asm.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.asm.c
3 * \brief Circular buffer functions (assembler implementation).
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 #include "Ifx_CircularBuffer.h"
26
27 #if !(IFX_CFG_CIRCULARBUFFER_C)
28
29 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
30 {
31 uint32 data;
32
33 __asm(" ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
34 " ld.w\t%0,[a14/a15+c]\n" /* Get the value from the buffer, and increment the buffer pointer */
35 " st.da\t[%1],a14/a15\n" /* Store the new circular buffer state */
36 : "=d" (data) : "a" (buffer) : "a14", "a15");
37
38 return data;
39 }
40
41
42 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
43 {
44 Ifx_SizeT data;
45
46 __asm(" ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
47 " ld.h\t%0,[a14/a15+c]\n" /* Get the value from the buffer, and increment the buffer pointer */
48 " st.da\t[%1],a14/a15\n" /* Store the new circular buffer state */
49 : "=d" (data) : "a" (buffer) : "a14", "a15");
50
51 return data;
52 }
53
54
55 /** \brief Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer
56 *
57 * \param buffer Specifies circular buffer.
58 * \param data Specifies value to be added to the buffer.
59 *
60 * \return None.
61 */
62 void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
63 {
64 __asm(" ld.da\ta14/a15,[%0]\n" /* Get circular buffer state */
65 " st.w\t[a14/a15+c]0,%1\n" /* Store the value to the buffer, and increment the buffer pointer */
66 " ld.w\t%1,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
67 " st.da\t[%0],a14/a15\n" /* Store the new circular buffer state */
68 :
69 : "a" (buffer), "d" (data) : "a14", "a15");
70 }
71
72
73 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
74 {
75 count--;
76 __asm(" mov.a\ta13,%3\n" /* Get count value */
77 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
78 "Ifx_CircularBuffer_read1:" " ld.b\td15,[a14/a15+c]\n"/* read the value from the buffer, and increment the buffer pointer */
79 " st.b\t[%2+],d15\n" /* Store value to the data buffer, and increment the pointer */
80 " loop\ta13,Ifx_CircularBuffer_read1\n" /* loop */
81 " mov.d\t%0,a15\n" /* Get the new index value */
82 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
83 "d15");
84
85 return data;
86 }
87
88
89 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
90 {
91 count--;
92 __asm(" mov.a\ta13,%3\n" /* Get count value */
93 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
94 "Ifx_CircularBuffer_read2:" " ld.w\td15,[a14/a15+c]\n"/* read the value from the buffer, and increment the buffer pointer */
95 " st.w\t[%2+],d15\n" /* Store value to the data buffer, and increment the pointer */
96 " loop\ta13,Ifx_CircularBuffer_read2\n" /* loop */
97 " mov.d\t%0,a15\n" /* Get the new index value */
98 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
99 "d15");
100
101 return data;
102 }
103
104
105 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
106 {
107 count--;
108 __asm(" mov.a\ta13,%3\n" /* Get count value */
109 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
110 "Ifx_CircularBuffer_write1:" " ld.b\td15,[%2+]\n"/* Get value from the data buffer, and increment the pointer */
111 " st.b\t[a14/a15+c]0,d15\n" /* Store the value to the buffer, and increment the buffer pointer */
112 " ld.b\td15,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
113 " loop\ta13,Ifx_CircularBuffer_write1\n" /* loop */
114 " mov.d\t%0,a15\n" /* Get the new index value */
115 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
116 "d15");
117
118 return data;
119 }
120
121
122 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
123 {
124 count--;
125 __asm(" mov.a\ta13,%3\n" /* Get count value */
126 " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
127 "Ifx_CircularBuffer_write2:" " ld.w\td15,[%2+]\n"/* Get value from the data buffer, and increment the pointer */
128 " st.w\t[a14/a15+c]0,d15\n" /* Store the value to the buffer, and increment the buffer pointer */
129 " ld.w\td15,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
130 " loop\ta13,Ifx_CircularBuffer_write2\n" /* loop */
131 " mov.d\t%0,a15\n" /* Get the new index value */
132 " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
133 "d15");
134
135 return data;
136 }
137
138
139 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:122
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:99
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:29
Ifx_CircularBuffer_addDataIncr
void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer...
Definition: Ifx_CircularBuffer.c:66
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:76
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:78
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:143
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:44
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:79


iLLD_TC26B: Ifx_CircularBuffer.c Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.c
3 * \brief Circular buffer functions in C language.
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 #include "Ifx_CircularBuffer.h"
26
27 #if (IFX_CFG_CIRCULARBUFFER_C)
28
29 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
30 {
31 uint32 data = ((uint32 *)buffer->base)[buffer->index];
32
33 buffer->index += 4;
34
35 if (buffer->index >= buffer->length)
36 {
37 buffer->index = 0;
38 }
39
40 return data;
41 }
42
43
44 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
45 {
46 uint16 data = ((uint16 *)buffer->base)[buffer->index];
47
48 buffer->index += 2;
49
50 if (buffer->index >= buffer->length)
51 {
52 buffer->index = 0;
53 }
54
55 return data;
56 }
57
58
59 /** \brief Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer
60 *
61 * \param buffer Specifies circular buffer.
62 * \param data Specifies value to be added to the buffer.
63 *
64 * \return None.
65 */
66 void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
67 {
68 ((uint32 *)buffer->base)[buffer->index] = data;
69 buffer->index += 4;
70
71 if (buffer->index >= buffer->length)
72 {
73 buffer->index = 0;
74 }
75 }
76
77
78 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
79 {
80 uint8 *Dest = (uint8 *)data;
81
82 do
83 {
84 count--;
85 *Dest = ((uint8 *)buffer->base)[buffer->index];
86 Dest = &Dest[1];
87 buffer->index++;
88
89 if (buffer->index >= buffer->length)
90 {
91 buffer->index = 0;
92 }
93 } while (count > 0);
94
95 return Dest;
96 }
97
98
99 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
100 {
101 uint32 *Dest = (uint32 *)data;
102 uint8 *base = buffer->base;
103
104 do
105 {
106 *Dest = *((uint32 *)(&base[buffer->index]));
107 Dest = &Dest[1];
108 buffer->index = buffer->index + 4;
109
110 if (buffer->index >= buffer->length)
111 {
112 buffer->index = 0;
113 }
114
115 count--;
116 } while (count > 0);
117
118 return Dest;
119 }
120
121
122 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
123 {
124 const uint8 *source = (const uint8 *)data;
125
126 do
127 {
128 count--;
129 ((uint8 *)buffer->base)[buffer->index] = *source;
130 source = &source[1];
131 buffer->index++;
132
133 if (buffer->index >= buffer->length)
134 {
135 buffer->index = 0;
136 }
137 } while (count > 0);
138
139 return source;
140 }
141
142
143 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
144 {
145 const uint32 *source = (const uint32 *)data;
146 uint8 *base = buffer->base;
147
148 do
149 {
150 *((uint32 *)(&base[buffer->index])) = *source;
151 source = &source[1];
152 buffer->index = buffer->index + 4;
153
154 if (buffer->index >= buffer->length)
155 {
156 buffer->index = 0;
157 }
158
159 count--;
160 } while (count > 0);
161
162 return source;
163 }
164
165
166 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:122
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:99
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:80
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:78
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:29
Ifx_CircularBuffer_addDataIncr
void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer...
Definition: Ifx_CircularBuffer.c:66
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:76
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:78
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:143
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:44
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:79
uint8
unsigned char uint8
Definition: Platform_Types.h:105


iLLD_TC26B: Ifx_CircularBuffer.h Source File

  • _Lib
  • DataHandling
Ifx_CircularBuffer.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_CircularBuffer.h
3 * \brief Circular buffer functions.
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup IfxLld_lib_datahandling_circularbuffer Circular buffer
24 * This module implements circular buffer functions.
25 * \ingroup IfxLld_lib_datahandling
26 *
27 */
28
29 #ifndef IFX_CIRCULARBUFFER_H
30 #define IFX_CIRCULARBUFFER_H 1
31
32 //---------------------------------------------------------------------------
33 #include "Cpu/Std/IfxCpu_Intrinsics.h"
34 //---------------------------------------------------------------------------
35
36 #ifndef IFX_CFG_CIRCULARBUFFER_C
37 #define IFX_CFG_CIRCULARBUFFER_C (1)
38 #endif
39
40 /** \addtogroup IfxLld_lib_datahandling_circularbuffer
41 * \{
42 */
43 /** \brief Return the circular buffer 16 bit value, and post-increment the circular buffer pointer
44 *
45 * \param buffer Specifies circular buffer.
46 *
47 * \return Return the next circular buffer value.
48 */
49 uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer);
50
51 /** \brief Return the circular buffer 32 bit value, and post-increment the circular buffer pointer
52 *
53 * \param buffer Specifies circular buffer.
54 *
55 * \return Return the next circular buffer value.
56 */
57 uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer);
58
59 /** \brief Copy count bytes from the circular buffer to the data array
60 *
61 * \param buffer Specifies circular buffer.
62 * \param data Specifies destination pointer.
63 * \param count Specifies number of bytes to be copied. count MUST be >= 1.
64 *
65 * \return Returns the updated data pointer data = ((uint8*)data) + count
66 */
67 void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count);
68
69 /** \brief Copy count 32 bit words from the circular buffer to the data array
70 *
71 * \param buffer Specifies circular buffer.
72 * \param data Specifies destination pointer.
73 * \param count Specifies number of 32 bit words to be copied. count MUST be >= 1.
74 *
75 * \return Returns the updated data pointer data = ((uint32*)data) + count
76 */
77 void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count);
78
79 /** \brief Copy count bytes from the data array to the circular buffer
80 *
81 * \param buffer Specifies circular buffer.
82 * \param data Specifies source pointer.
83 * \param count Specifies number of bytes to be copied. count MUST be >= 1.
84 *
85 * \return Returns the updated data pointer data = ((uint8*)data) + count
86 */
87 const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count);
88
89 /** \brief Copy count 32 bit words from the data array to the circular buffer
90 *
91 * \param buffer Specifies circular buffer.
92 * \param data Specifies source pointer.
93 * \param count Specifies number of 32 bit words to be copied. count MUST be >= 1.
94 *
95 * \return Returns the updated data pointer data = ((uint32*)data) + count
96 */
97 const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count);
98
99 /** \} */
100 //---------------------------------------------------------------------------
101 #endif
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:122
Ifx_CircularBuffer_read32
void * Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count 32 bit words from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:99
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxCpu_Intrinsics.h
Ifx_CircularBuffer_get32
uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
Return the circular buffer 32 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:29
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:76
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:78
Ifx_CircularBuffer_write32
const void * Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count 32 bit words from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:143
Ifx_CircularBuffer_get16
uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
Return the circular buffer 16 bit value, and post-increment the circular buffer pointer.
Definition: Ifx_CircularBuffer.c:44
uint16
unsigned short uint16
Definition: Platform_Types.h:109


iLLD_TC26B: Ifx_Console.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Ifx_Console.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Console.c
3 * \brief Main Ifx_Console module implementation file
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-03-13 15:49:47 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 #include <string.h>
26 #include <stdio.h>
27 #include <stdarg.h>
28
29 #include "Ifx_Console.h"
30 #include "_Utilities/Ifx_Assert.h"
31 #include "Cpu/Std/IfxCpu_Intrinsics.h"
32
33 Ifx_Console Ifx_g_console;
34
35 /**
36 * \brief Initialize the \ref Ifx_g_console object.
37 * \param standardIo Pointer to the IfxStdIf_DPipe object used by the \ref Ifx_g_console.
38 */
39 void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
40 {
41 Ifx_g_console.standardIo = standardIo;
42 Ifx_g_console.align = 0;
43 }
44
45
46 /**
47 * \brief Print formatted string into \ref Ifx_g_console.
48 * \param format printf-compatible formatted string.
49 * \retval TRUE if the string is printed successfully
50 * \retval FALSE if the function failed.
51 */
52 boolean Ifx_Console_print(pchar format, ...)
53 {
54 if (!Ifx_g_console.standardIo->txDisabled)
55 {
56 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
57 Ifx_SizeT count;
58 va_list args;
59 va_start(args, format);
60 vsprintf((char *)message, format, args);
61 va_end(args);
62 count = (Ifx_SizeT)strlen(message);
63 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
64
65 return IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)message, &count, TIME_INFINITE);
66 }
67 else
68 {
69 return TRUE;
70 }
71 }
72
73
74 /**
75 * \brief Print formatted string into \ref Ifx_g_console.
76 * Indented with a number of spaces.
77 * \param format printf-compatible formatted string.
78 * \retval TRUE if the string is printed successfully
79 * \retval FALSE if the function failed.
80 */
81 boolean Ifx_Console_printAlign(pchar format, ...)
82 {
83 if (!Ifx_g_console.standardIo->txDisabled)
84 {
85 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
86 Ifx_SizeT align, count;
87 char spaces[17] = " ";
88 va_list args;
89 va_start(args, format);
90 vsprintf((char *)message, format, args);
91 va_end(args);
92 count = (Ifx_SizeT)strlen(message);
93 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
94 align = Ifx_g_console.align;
95
96 while (align > 0)
97 {
98 Ifx_SizeT scount;
99 scount = __min(align, 10);
100 IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)spaces, &scount, TIME_INFINITE);
101 align = align - scount;
102 }
103
104 return IfxStdIf_DPipe_write(Ifx_g_console.standardIo, (void *)message, &count, TIME_INFINITE);
105 }
106 else
107 {
108 return TRUE;
109 }
110 }
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:216
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
Ifx_Console.h
Main Console module header file.
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
STDIF_DPIPE_MAX_PRINT_SIZE
#define STDIF_DPIPE_MAX_PRINT_SIZE
Size of the buffer allocated on the stack for the print function.
Definition: IfxStdIf_DPipe.h:57
Ifx_Console::align
sint16 align
Variable for storing the actual (left)indentation level of the Ifx_g_console.
Definition: Ifx_Console.h:41
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
Ifx_Console::standardIo
IfxStdIf_DPipe * standardIo
Pointer to the IfxStdIf_DPipe object used as general console.
Definition: Ifx_Console.h:40
IfxCpu_Intrinsics.h
Ifx_Console
Definition: Ifx_Console.h:38
Ifx_g_console
Ifx_Console Ifx_g_console
Definition: Ifx_Console.c:33
Ifx_Console_print
boolean Ifx_Console_print(pchar format,...)
Print formatted string into Ifx_g_console.
Definition: Ifx_Console.c:52
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:242
Ifx_Console_init
void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object.
Definition: Ifx_Console.c:39
Ifx_Console_printAlign
boolean Ifx_Console_printAlign(pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces.
Definition: Ifx_Console.c:81
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:60
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
TRUE
#define TRUE
Definition: Platform_Types.h:87
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36


iLLD_TC26B: Ifx_Console.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Ifx_Console.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Console.h
3 * \brief Main Console module header file
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:36 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_sysse_comm_console Console
24 * This module implements "Main Console" functions
25 * \ingroup library_srvsw_sysse_comm
26 *
27 */
28 #ifndef IFX_CONSOLE_H
29 #define IFX_CONSOLE_H 1
30
31 #include "StdIf/IfxStdIf_DPipe.h"
32
33 //----------------------------------------------------------------------------------------
34 #if !defined(IFX_CFG_CONSOLE_INDENT_SIZE)
35 #define IFX_CFG_CONSOLE_INDENT_SIZE (4) /**<\brief Default indentation/alignment size */
36 #endif
37
38 typedef struct
39 {
40 IfxStdIf_DPipe *standardIo; /**<\brief Pointer to the \ref IfxStdIf_DPipe object used as general console */
41 sint16 align; /**<\brief Variable for storing the actual (left)indentation level of the \ref Ifx_g_console */
42 } Ifx_Console;
43
44 IFX_EXTERN Ifx_Console Ifx_g_console; /**< \brief Default main console global variable */
45
46 //----------------------------------------------------------------------------------------
47 /** \addtogroup library_srvsw_sysse_comm_console
48 * \{ */
49
50 #ifndef CONSOLE
51
52 /* FIXME (Alann to discuss with Dian) there is no requirement to define multiple console, CONSOLE should be removed, and APIs used instead */
53 /** \brief Alias \ref Ifx_g_console object (by value) */
54 #define CONSOLE Ifx_g_console
55
56 /** \brief Return pointer to the default console object
57 *
58 * User can override this function by defining new \ref CONSOLE macro and this function
59 * externally, e.g. inside Ifx_Cfg.h file.*/
60 IFX_INLINE IfxStdIf_DPipe *Ifx_Console_getIo(void)
61 {
62 return Ifx_g_console.standardIo;
63 }
64
65
66 #endif
67
68 IFX_EXTERN void Ifx_Console_init(IfxStdIf_DPipe *standardIo);
69 IFX_EXTERN boolean Ifx_Console_print(pchar format, ...);
70 IFX_EXTERN boolean Ifx_Console_printAlign(pchar format, ...);
71
72 /**
73 * \brief Decrement the alignment/indentation using the given value
74 * \param value the increment. If value == 0, \ref IFX_CFG_CONSOLE_INDENT_SIZE will be used.
75 */
76 IFX_INLINE void Ifx_Console_decrAlign(sint16 value)
77 {
78 value = (sint16)(Ifx_g_console.align - ((value == 0U) ? IFX_CFG_CONSOLE_INDENT_SIZE : value));
79 Ifx_g_console.align = (value > 0) ? value : 0;
80 }
81
82
83 /**
84 * \brief Increment the alignment/indentation using the given value
85 * \param value the increment. If value == 0, \ref IFX_CFG_CONSOLE_INDENT_SIZE will be used.
86 */
87 IFX_INLINE void Ifx_Console_incrAlign(sint16 value)
88 {
89 Ifx_g_console.align += ((value == 0) ? (sint16)IFX_CFG_CONSOLE_INDENT_SIZE : value);
90 }
91
92
93 /** \} */
94 //----------------------------------------------------------------------------------------
95 #endif
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
Ifx_Console::align
sint16 align
Variable for storing the actual (left)indentation level of the Ifx_g_console.
Definition: Ifx_Console.h:41
Ifx_Console_incrAlign
IFX_INLINE void Ifx_Console_incrAlign(sint16 value)
Increment the alignment/indentation using the given value.
Definition: Ifx_Console.h:87
Ifx_Console::standardIo
IfxStdIf_DPipe * standardIo
Pointer to the IfxStdIf_DPipe object used as general console.
Definition: Ifx_Console.h:40
Ifx_Console
Definition: Ifx_Console.h:38
Ifx_Console_getIo
IFX_INLINE IfxStdIf_DPipe * Ifx_Console_getIo(void)
Return pointer to the default console object.
Definition: Ifx_Console.h:60
sint16
short sint16
Definition: Platform_Types.h:126
Ifx_Console_decrAlign
IFX_INLINE void Ifx_Console_decrAlign(sint16 value)
Decrement the alignment/indentation using the given value.
Definition: Ifx_Console.h:76
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IFX_CFG_CONSOLE_INDENT_SIZE
#define IFX_CFG_CONSOLE_INDENT_SIZE
Default indentation/alignment size.
Definition: Ifx_Console.h:35
Ifx_Console_print
IFX_EXTERN boolean Ifx_Console_print(pchar format,...)
Print formatted string into Ifx_g_console.
Definition: Ifx_Console.c:52
Ifx_Console_init
IFX_EXTERN void Ifx_Console_init(IfxStdIf_DPipe *standardIo)
Initialize the Ifx_g_console object.
Definition: Ifx_Console.c:39
Ifx_Console_printAlign
IFX_EXTERN boolean Ifx_Console_printAlign(pchar format,...)
Print formatted string into Ifx_g_console. Indented with a number of spaces.
Definition: Ifx_Console.c:81
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifx_g_console
IFX_EXTERN Ifx_Console Ifx_g_console
Default main console global variable.
Definition: Ifx_Console.h:44
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36


iLLD_TC26B: Ifx_Crc.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Crc.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Crc.c
3 * \brief CRC algorithm
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24 #include "Ifx_Crc.h"
25
26 uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum);
27
28 boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
29 {
30 sint32 i;
31 uint32 bit, crc;
32
33 if (crcinit != (crcinit & table->crcmask))
34 {
35 //IfxStdIf_DPipe_print(io,"ERROR, invalid crcinit."ENDL);
36 return FALSE;
37 }
38
39 if (crcxor != (crcxor & table->crcmask))
40 {
41 //IfxStdIf_DPipe_print(io,"ERROR, invalid crcxor."ENDL);
42 return FALSE;
43 }
44
45 driver->table = table;
46 driver->crcxor = crcxor;
47 driver->refout = refout;
48
49 // compute missing initial CRC value
50
51 if (!direct)
52 {
53 driver->crcinit_nondirect = crcinit;
54 crc = crcinit;
55
56 for (i = 0; i < table->order; i++)
57 {
58 bit = crc & table->crchighbit;
59 crc <<= 1;
60
61 if (bit)
62 {
63 crc ^= table->polynom;
64 }
65 }
66
67 crc &= table->crcmask;
68 driver->crcinit_direct = crc;
69 }
70
71 else
72 {
73 driver->crcinit_direct = crcinit;
74 crc = crcinit;
75
76 for (i = 0; i < table->order; i++)
77 {
78 bit = crc & 1;
79
80 if (bit)
81 {
82 crc ^= table->polynom;
83 }
84
85 crc >>= 1;
86
87 if (bit)
88 {
89 crc |= table->crchighbit;
90 }
91 }
92
93 driver->crcinit_nondirect = crc;
94 }
95
96 return TRUE;
97 }
98
99
100 boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
101 {
102 uint32 crcmask;
103 // at first, compute constant bit masks for whole CRC and CRC high bit
104
105 crcmask = ((((uint32)1 << (order - 1)) - 1) << 1) | 1;
106
107 // check parameters
108
109 if ((order < 1) || (order > 32))
110 {
111 //IfxStdIf_DPipe_print(io,"ERROR, invalid order, it must be between 1..32."ENDL);
112 return FALSE;
113 }
114
115 if (polynom != (polynom & crcmask))
116 {
117 //IfxStdIf_DPipe_print(io,"ERROR, invalid polynom."ENDL);
118 return FALSE;
119 }
120
121 table->order = order;
122 table->polynom = polynom;
123 table->refin = refin;
124 table->crchighbit = (uint32)1 << (order - 1);
125 table->crcmask = crcmask;
126 // generate lookup table
127 // make CRC lookup table used by table algorithms
128 {
129 sint32 i, j;
130 uint32 bit, crc;
131
132 for (i = 0; i < 256; i++)
133 {
134 crc = (uint32)i;
135
136 if (refin)
137 {
138 crc = Ifx_Crc_reflect(crc, 8);
139 }
140
141 crc <<= order - 8;
142
143 for (j = 0; j < 8; j++)
144 {
145 bit = crc & table->crchighbit;
146 crc <<= 1;
147
148 if (bit)
149 {
150 crc ^= polynom;
151 }
152 }
153
154 if (refin)
155 {
156 crc = Ifx_Crc_reflect(crc, order);
157 }
158
159 crc &= crcmask;
160
161 if (order <= 8)
162 {
163 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
164 crctab[i] = (uint8)crc;
165 }
166 else if (order <= 16)
167 {
168 uint16 *crctab = (uint16 *)((uint32)table + sizeof(Ifc_Crc_Table));
169 crctab[i] = (uint16)crc;
170 }
171 else
172 {
173 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
174 crctab[i] = crc;
175 }
176 }
177 }
178 return TRUE;
179 }
180
181
182 // subroutines
183
184 uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum)
185 {
186 // reflects the lower 'bitnum' bits of 'crc'
187
188 uint32 i, j = 1, crcout = 0;
189
190 for (i = (uint32)1 << (bitnum - 1); i; i >>= 1)
191 {
192 if (crc & i)
193 {
194 crcout |= j;
195 }
196
197 j <<= 1;
198 }
199
200 return crcout;
201 }
202
203
204 uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
205 {
206 // fast lookup table algorithm without augmented zero bytes, e.g. used in pkzip.
207 // only usable with polynom orders of 8, 16, 24 or 32.
208
209 uint32 crc = driver->crcinit_direct;
210 sint32 orderMinusHeight = driver->table->order - 8;
211
212 if (driver->table->refin)
213 {
214 crc = Ifx_Crc_reflect(crc, driver->table->order);
215 }
216
217 if (driver->table->order <= 8)
218 {
219 uint8 *crctab = (uint8 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
220
221 if (!driver->table->refin)
222 {
223 while (len--)
224 {
225 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
226 }
227 }
228 else
229 {
230 while (len--)
231 {
232 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
233 }
234 }
235 }
236 else if (driver->table->order <= 16)
237 {
238 uint16 *crctab = (uint16 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
239
240 if (!driver->table->refin)
241 {
242 while (len--)
243 {
244 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
245 }
246 }
247 else
248 {
249 while (len--)
250 {
251 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
252 }
253 }
254 }
255 else
256 {
257 uint32 *crctab = (uint32 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
258
259 if (!driver->table->refin)
260 {
261 while (len--)
262 {
263 crc = (crc << 8) ^ crctab[((crc >> (orderMinusHeight)) & 0xff) ^ *p++];
264 }
265 }
266 else
267 {
268 while (len--)
269 {
270 crc = (crc >> 8) ^ crctab[(crc & 0xff) ^ *p++];
271 }
272 }
273 }
274
275 if (driver->refout ^ driver->table->refin)
276 {
277 crc = Ifx_Crc_reflect(crc, driver->table->order);
278 }
279
280 crc ^= driver->crcxor;
281 crc &= driver->table->crcmask;
282
283 return crc;
284 }
285
286
287 uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
288 {
289 // normal lookup table algorithm with augmented zero bytes.
290 // only usable with polynom orders of 8, 16, 24 or 32.
291
292 uint32 crc = driver->crcinit_nondirect;
293 sint32 orderMinusHeight = driver->table->order - 8;
294
295 if (driver->table->refin)
296 {
297 crc = Ifx_Crc_reflect(crc, driver->table->order);
298 }
299
300 if (driver->table->order <= 8)
301 {
302 uint8 *crctab = (uint8 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
303
304 if (!driver->table->refin)
305 {
306 while (len--)
307 {
308 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
309 }
310 }
311 else
312 {
313 while (len--)
314 {
315 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
316 }
317 }
318
319 if (!driver->table->refin)
320 {
321 while (++len < (driver->table->order >> 3))
322 {
323 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
324 }
325 }
326 else
327 {
328 while (++len < (driver->table->order >> 3))
329 {
330 crc = (crc >> 8) ^ crctab[crc & 0xff];
331 }
332 }
333 }
334 else if (driver->table->order <= 16)
335 {
336 uint16 *crctab = (uint16 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
337
338 if (!driver->table->refin)
339 {
340 while (len--)
341 {
342 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
343 }
344 }
345 else
346 {
347 while (len--)
348 {
349 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
350 }
351 }
352
353 if (!driver->table->refin)
354 {
355 while (++len < (driver->table->order >> 3))
356 {
357 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
358 }
359 }
360 else
361 {
362 while (++len < (driver->table->order >> 3))
363 {
364 crc = (crc >> 8) ^ crctab[crc & 0xff];
365 }
366 }
367 }
368 else if (driver->table->order <= 32)
369 {
370 uint32 *crctab = (uint32 *)((uint32)driver->table + sizeof(Ifc_Crc_Table));
371
372 if (!driver->table->refin)
373 {
374 while (len--)
375 {
376 crc = ((crc << 8) | *p++) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
377 }
378 }
379 else
380 {
381 while (len--)
382 {
383 crc = ((crc >> 8) | (*p++ << (orderMinusHeight))) ^ crctab[crc & 0xff];
384 }
385 }
386
387 if (!driver->table->refin)
388 {
389 while (++len < (driver->table->order >> 3))
390 {
391 crc = (crc << 8) ^ crctab[(crc >> (orderMinusHeight)) & 0xff];
392 }
393 }
394 else
395 {
396 while (++len < (driver->table->order >> 3))
397 {
398 crc = (crc >> 8) ^ crctab[crc & 0xff];
399 }
400 }
401 }
402
403 if (driver->refout ^ driver->table->refin)
404 {
405 crc = Ifx_Crc_reflect(crc, driver->table->order);
406 }
407
408 crc ^= driver->crcxor;
409 crc &= driver->table->crcmask;
410
411 return crc;
412 }
413
414
415 uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
416 {
417 // bit by bit algorithm with augmented zero bytes.
418 // does not use lookup table, suited for polynom driver->table->orders between 1...32.
419
420 uint32 i, j, c, bit;
421 uint32 crc = driver->crcinit_nondirect;
422
423 for (i = 0; i < len; i++)
424 {
425 c = (uint32)*p++;
426
427 if (driver->table->refin)
428 {
429 c = Ifx_Crc_reflect(c, 8);
430 }
431
432 for (j = 0x80; j; j >>= 1)
433 {
434 bit = crc & driver->table->crchighbit;
435 crc <<= 1;
436
437 if (c & j)
438 {
439 crc |= 1;
440 }
441
442 if (bit)
443 {
444 crc ^= driver->table->polynom;
445 }
446 }
447 }
448
449 for (i = 0; i < driver->table->order; i++)
450 {
451 bit = crc & driver->table->crchighbit;
452 crc <<= 1;
453
454 if (bit)
455 {
456 crc ^= driver->table->polynom;
457 }
458 }
459
460 if (driver->refout)
461 {
462 crc = Ifx_Crc_reflect(crc, driver->table->order);
463 }
464
465 crc ^= driver->crcxor;
466 crc &= driver->table->crcmask;
467
468 return crc;
469 }
470
471
472 uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
473 {
474 // fast bit by bit algorithm without augmented zero bytes.
475 // does not use lookup table, suited for polynom driver->table->orders between 1...32.
476
477 uint32 i, j, c, bit;
478 uint32 crc = driver->crcinit_direct;
479
480 for (i = 0; i < len; i++)
481 {
482 c = (uint32)*p++;
483
484 if (driver->table->refin)
485 {
486 c = Ifx_Crc_reflect(c, 8);
487 }
488
489 for (j = 0x80; j; j >>= 1)
490 {
491 bit = crc & driver->table->crchighbit;
492 crc <<= 1;
493
494 if (c & j)
495 {
496 bit ^= driver->table->crchighbit;
497 }
498
499 if (bit)
500 {
501 crc ^= driver->table->polynom;
502 }
503 }
504 }
505
506 if (driver->refout)
507 {
508 crc = Ifx_Crc_reflect(crc, driver->table->order);
509 }
510
511 crc ^= driver->crcxor;
512 crc &= driver->table->crcmask;
513
514 return crc;
515 }
516
517
518 #if CRC_ENABLE_DPIPE
519 void Ifx_Crc_printTable(Ifc_Crc_Table *table, IfxStdIf_DPipe *io)
520 {
521 sint32 i = 0;
522
523 uint32 typeSize;
524
525 if (table->order <= 8)
526 {
527 typeSize = 8;
528 }
529 else if (table->order <= 16)
530 {
531 typeSize = 16;
532 }
533 else
534 {
535 typeSize = 32;
536 }
537
538 IfxStdIf_DPipe_print(io, ENDL "Ifc_Crc_Table%d <tabe name> = {" ENDL, typeSize);
539 IfxStdIf_DPipe_print(io, " .data.order=%d," ENDL, table->order);
540 IfxStdIf_DPipe_print(io, " .data.polynom=0x%X," ENDL, table->polynom);
541 IfxStdIf_DPipe_print(io, " .data.refin=%d," ENDL, table->refin);
542 IfxStdIf_DPipe_print(io, " .data.crchighbit=%d," ENDL, table->crchighbit);
543 IfxStdIf_DPipe_print(io, " .data.crcmask=0x%X," ENDL, table->crcmask);
544 IfxStdIf_DPipe_print(io, " .crctab={" ENDL);
545 IfxStdIf_DPipe_print(io, " ");
546
547 while (i < 256)
548 {
549 if (table->order <= 4)
550 {
551 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
552 IfxStdIf_DPipe_print(io, "0x%01X, ", crctab[i]);
553 }
554 else if (table->order <= 8)
555 {
556 uint8 *crctab = (uint8 *)((uint32)table + sizeof(Ifc_Crc_Table));
557 IfxStdIf_DPipe_print(io, "0x%02X, ", crctab[i]);
558 }
559 else if (table->order <= 16)
560 {
561 uint16 *crctab = (uint16 *)((uint32)table + sizeof(Ifc_Crc_Table));
562 IfxStdIf_DPipe_print(io, "0x%04X, ", crctab[i]);
563 }
564 else if (table->order <= 24)
565 {
566 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
567 IfxStdIf_DPipe_print(io, "0x%06X, ", crctab[i]);
568 }
569 else
570 {
571 uint32 *crctab = (uint32 *)((uint32)table + sizeof(Ifc_Crc_Table));
572 IfxStdIf_DPipe_print(io, "0x%08X, ", crctab[i]);
573 }
574
575 i++;
576
577 if ((i % 16) == 0)
578 {
579 IfxStdIf_DPipe_print(io, ENDL " ");
580 }
581 }
582
583 IfxStdIf_DPipe_print(io, " }" ENDL);
584 IfxStdIf_DPipe_print(io, "};" ENDL);
585 }
586
587
588 boolean Ifx_Crc_Test(Ifc_Crc *driver, uint8 *string, uint32 length, IfxStdIf_DPipe *io)
589 {
590 IfxStdIf_DPipe_print(io, "" ENDL);
591 IfxStdIf_DPipe_print(io, "CRC tester v1.1 written on 13/01/2003 by Sven Reifegerste (zorc/reflex)" ENDL);
592 IfxStdIf_DPipe_print(io, "-----------------------------------------------------------------------" ENDL);
593 IfxStdIf_DPipe_print(io, "" ENDL);
594 IfxStdIf_DPipe_print(io, "Parameters:" ENDL);
595 IfxStdIf_DPipe_print(io, "" ENDL);
596 IfxStdIf_DPipe_print(io, " polynom : 0x%x" ENDL, driver->table->polynom);
597 IfxStdIf_DPipe_print(io, " order : %d" ENDL, driver->table->order);
598 IfxStdIf_DPipe_print(io, " crcinit : 0x%x direct, 0x%x nondirect" ENDL, driver->crcinit_direct, driver->crcinit_nondirect);
599 IfxStdIf_DPipe_print(io, " crcxor : 0x%x" ENDL, driver->crcxor);
600 IfxStdIf_DPipe_print(io, " refin : %d" ENDL, driver->table->refin);
601 IfxStdIf_DPipe_print(io, " refout : %d" ENDL, driver->refout);
602 IfxStdIf_DPipe_print(io, "" ENDL);
603 // IfxStdIf_DPipe_print(io," data string : '%s' (%d bytes)"ENDL, string, stringLength);
604 IfxStdIf_DPipe_print(io, "" ENDL);
605 IfxStdIf_DPipe_print(io, "Results:" ENDL);
606 IfxStdIf_DPipe_print(io, "" ENDL);
607 #if 0
608 IfxCpu_Perf perf;
609 uint32 result;
610
611 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
612 result = Ifx_Crc_bitByBit(driver, (uint8 *)string, length);
613 perf = IfxCpu_stopCounters();
614 IfxStdIf_DPipe_print(io, " crc bit by bit : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
615
616 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
617 result = Ifx_Crc_bitByBitFast(driver, (uint8 *)string, length);
618 perf = IfxCpu_stopCounters();
619 IfxStdIf_DPipe_print(io, " crc bit by bit fast : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
620
621 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
622 result = Ifx_Crc_table(driver, (uint8 *)string, length);
623 perf = IfxCpu_stopCounters();
624 IfxStdIf_DPipe_print(io, " crc table : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
625
626 IfxCpu_resetAndStartCounters(IfxCpu_CounterMode_normal);
627 result = Ifx_Crc_tableFast(driver, (uint8 *)string, length);
628 perf = IfxCpu_stopCounters();
629 IfxStdIf_DPipe_print(io, " crc table fast : 0x%X, %d cycles" ENDL, result, perf.clock.counter);
630
631 #endif
632 return TRUE;
633 }
634
635
636 #endif
Ifc_Crc
Definition: Ifx_Crc.h:68
Ifc_Crc_Table::polynom
uint32 polynom
Definition: Ifx_Crc.h:45
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
IfxCpu_stopCounters
IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
Stop instruction and clock counters, return their values.
Definition: IfxCpu.h:989
IfxCpu_Perf
Performance counter result.
Definition: IfxCpu.h:152
Ifc_Crc::crcxor
uint32 crcxor
Definition: Ifx_Crc.h:70
uint32
unsigned long uint32
Definition: Platform_Types.h:113
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:47
Ifc_Crc_Table::crcmask
uint32 crcmask
Definition: Ifx_Crc.h:48
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:33
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCpu_Perf::clock
IfxCpu_Counter clock
CPU clock counter.
Definition: IfxCpu.h:155
Ifx_Crc_tableFast
uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:204
Ifx_Crc_table
uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:287
Ifc_Crc::crcinit_direct
uint32 crcinit_direct
Definition: Ifx_Crc.h:73
Ifc_Crc::refout
sint32 refout
Definition: Ifx_Crc.h:71
Ifx_Crc_bitByBit
uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:415
Ifx_Crc.h
CRC algorithm.
Ifc_Crc_Table::order
sint32 order
Definition: Ifx_Crc.h:44
IfxCpu_resetAndStartCounters
IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters.
Definition: IfxCpu.h:894
Ifc_Crc_Table::crchighbit
uint32 crchighbit
Definition: Ifx_Crc.h:47
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCpu_Counter::counter
uint32 counter
Counter value.
Definition: IfxCpu.h:142
Ifx_Crc_init
boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
Definition: Ifx_Crc.c:28
Ifc_Crc_Table::refin
sint32 refin
Definition: Ifx_Crc.h:46
Ifc_Crc_Table
Definition: Ifx_Crc.h:42
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_Crc_createTable
boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
Definition: Ifx_Crc.c:100
IfxCpu_CounterMode_normal
Normal counter mode:the counter increments on their respective triggers.
Definition: IfxCpu.h:126
TRUE
#define TRUE
Definition: Platform_Types.h:87
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx_Crc_reflect
uint32 Ifx_Crc_reflect(uint32 crc, sint32 bitnum)
Definition: Ifx_Crc.c:184
Ifx_Crc_bitByBitFast
uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:472
Ifc_Crc::crcinit_nondirect
uint32 crcinit_nondirect
Definition: Ifx_Crc.h:74
Ifc_Crc::table
const Ifc_Crc_Table * table
Definition: Ifx_Crc.h:75


iLLD_TC26B: Ifx_Crc.h Source File

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  • CpuGeneric
  • SysSe
  • Math
Ifx_Crc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Crc.h
3 * \brief CRC algorithm
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_sysse_math_crc CRC
24 * This module implements CRC algorithm
25 * \ingroup library_srvsw_sysse_math
26 *
27 */
28
29 #ifndef IFX_CRC_H
30 #define IFX_CRC_H 1
31 //---------------------------------------------------------------------------
32 #include "Cpu/Std/Ifx_Types.h"
33
34 #ifndef CRC_ENABLE_DPIPE
35 #define CRC_ENABLE_DPIPE 0
36 #endif
37
38 #if CRC_ENABLE_DPIPE
39 #include "IfxStdIf_DPipe.h"
40 #endif
41 //---------------------------------------------------------------------------
42 typedef struct
43 {
44 sint32 order;
45 uint32 polynom;
46 sint32 refin;
47 uint32 crchighbit;
48 uint32 crcmask;
49 }Ifc_Crc_Table;
50 typedef struct
51 {
52 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
53 uint8 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
54 }Ifc_Crc_Table8;
55
56 typedef struct
57 {
58 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
59 uint16 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
60 }Ifc_Crc_Table16;
61
62 typedef struct
63 {
64 Ifc_Crc_Table data; /**< \brief CRC data, must be 1st member of the struct */
65 uint32 crctab[256]; /**< \brief CRC Table, must be 2st member of the struct */
66 }Ifc_Crc_Table32;
67
68 typedef struct
69 {
70 uint32 crcxor;
71 sint32 refout;
72
73 uint32 crcinit_direct;
74 uint32 crcinit_nondirect;
75 const Ifc_Crc_Table *table;
76 }Ifc_Crc;
77
78 /** \addtogroup library_srvsw_sysse_math_crc
79 * \{ */
80 /**
81 * \param direct [0,1] specifies the kind of algorithm: 1=direct, no augmented zero bits
82 * \param driver pointer to the crc driver
83 * \param table pointer to crc table
84 * \param direct direct
85 * \param crcinit is the initial CRC value belonging to that algorithm
86 * \param crcxor is the final XOR value
87 * \param refout [0,1] specifies if the CRC will be reflected before XOR
88 * \param table pointer to the table: Ifc_Crc_Table8, Ifc_Crc_Table16, Ifc_Crc_Table32
89 */
90 boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor);
91 /**
92 * \param table pointer to the crc table
93 * \param order [1..32] is the CRC polynom order, counted without the leading '1' bit
94 * \param polynom is the CRC polynom without leading '1' bit
95 * \param refin [0,1] specifies if a data byte is reflected before processing (UART) or not
96 */
97 boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin);
98
99 #if CRC_ENABLE_DPIPE
100 boolean Ifx_Crc_Test(Ifc_Crc *driver, uint8 *string, uint32 length, IfxStdIf_DPipe *io);
101 void Ifx_Crc_printTable(Ifc_Crc_Table *table, IfxStdIf_DPipe *io);
102 #endif
103 uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len);
104 uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len);
105 uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len);
106 uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len);
107 /** \} */
108
109 //---------------------------------------------------------------------------
110 #endif // IFX_CRC_H
Ifc_Crc
Definition: Ifx_Crc.h:68
Ifc_Crc_Table::polynom
uint32 polynom
Definition: Ifx_Crc.h:45
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
Ifc_Crc::crcxor
uint32 crcxor
Definition: Ifx_Crc.h:70
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifc_Crc_Table::crcmask
uint32 crcmask
Definition: Ifx_Crc.h:48
Ifx_Crc_tableFast
uint32 Ifx_Crc_tableFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:204
Ifx_Crc_table
uint32 Ifx_Crc_table(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:287
Ifc_Crc::crcinit_direct
uint32 crcinit_direct
Definition: Ifx_Crc.h:73
Ifc_Crc::refout
sint32 refout
Definition: Ifx_Crc.h:71
Ifc_Crc_Table8::data
Ifc_Crc_Table data
CRC data, must be 1st member of the struct.
Definition: Ifx_Crc.h:52
Ifx_Crc_bitByBit
uint32 Ifx_Crc_bitByBit(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:415
Ifc_Crc_Table16
Definition: Ifx_Crc.h:56
Ifc_Crc_Table32
Definition: Ifx_Crc.h:62
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
Ifc_Crc_Table::order
sint32 order
Definition: Ifx_Crc.h:44
Ifc_Crc_Table::crchighbit
uint32 crchighbit
Definition: Ifx_Crc.h:47
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_Crc_init
boolean Ifx_Crc_init(Ifc_Crc *driver, const Ifc_Crc_Table *table, sint32 direct, sint32 refout, uint32 crcinit, uint32 crcxor)
Definition: Ifx_Crc.c:28
Ifc_Crc_Table::refin
sint32 refin
Definition: Ifx_Crc.h:46
Ifc_Crc_Table
Definition: Ifx_Crc.h:42
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_Crc_createTable
boolean Ifx_Crc_createTable(Ifc_Crc_Table *table, sint32 order, uint32 polynom, sint32 refin)
Definition: Ifx_Crc.c:100
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifc_Crc_Table8
Definition: Ifx_Crc.h:50
Ifx_Crc_bitByBitFast
uint32 Ifx_Crc_bitByBitFast(Ifc_Crc *driver, uint8 *p, uint32 len)
Definition: Ifx_Crc.c:472
Ifc_Crc::crcinit_nondirect
uint32 crcinit_nondirect
Definition: Ifx_Crc.h:74
Ifc_Crc::table
const Ifc_Crc_Table * table
Definition: Ifx_Crc.h:75


iLLD_TC26B: Ifx_DateTime.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Time
Ifx_DateTime.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_DateTime.c
3 * \brief Date and time functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:37 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 #include "Ifx_DateTime.h"
26 #include "SysSe/Bsp/Bsp.h"
27
28 /* FIXME make compatible to unix time */
29 sint32 g_DateTimeOffset;
30
31 /** \brief Get the real time
32 * Note that this function is valid only if DateTime_set() has been called */
33 void DateTime_get(Ifx_DateTime *dt)
34 {
35 sint32 seconds = (sint32)(now() / TimeConst_1s);
36
37 seconds = seconds + g_DateTimeOffset;
38 dt->hours = seconds / 3600;
39 dt->minutes = seconds / 60;
40 dt->minutes = dt->minutes % 60;
41 dt->seconds = seconds % 60;
42 }
43
44
45 /** \brief Set the real time */
46 void DateTime_set(Ifx_DateTime *dt)
47 {
48 sint32 seconds = dt->seconds - ((sint32)(now() / TimeConst_1s));
49
50 seconds = seconds + (3600 * dt->hours);
51 seconds = seconds + (60 * dt->minutes);
52 g_DateTimeOffset = seconds;
53 }
DateTime_set
void DateTime_set(Ifx_DateTime *dt)
Set the real time.
Definition: Ifx_DateTime.c:46
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:201
Ifx_DateTime::hours
sint32 hours
Definition: Ifx_DateTime.h:33
Ifx_DateTime::minutes
sint32 minutes
Definition: Ifx_DateTime.h:34
Bsp.h
Board support package.
DateTime_get
void DateTime_get(Ifx_DateTime *dt)
Get the real time Note that this function is valid only if DateTime_set() has been called...
Definition: Ifx_DateTime.c:33
Ifx_DateTime
Definition: Ifx_DateTime.h:31
Ifx_DateTime.h
Date and time functions.
Ifx_DateTime::seconds
sint32 seconds
Definition: Ifx_DateTime.h:35
TimeConst_1s
#define TimeConst_1s
time constant equal to 1s
Definition: Bsp.h:184
sint32
long sint32
Definition: Platform_Types.h:131
g_DateTimeOffset
sint32 g_DateTimeOffset
Definition: Ifx_DateTime.c:29


iLLD_TC26B: Ifx_DateTime.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Time
Ifx_DateTime.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_DateTime.h
3 * \brief Date and time functions.
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:40 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_sysse_time_datetime DateTime
24 * This module implements the Date-Time functions.
25 * \ingroup library_srvsw_sysse_time
26 */
27
28 #ifndef REALTIME_H_
29 #define REALTIME_H_ 1
30 #include "Cpu/Std/Ifx_Types.h"
31 typedef struct
32 {
33 sint32 hours;
34 sint32 minutes;
35 sint32 seconds;
36 } Ifx_DateTime;
37 /** \addtogroup library_srvsw_sysse_time_datetime
38 * \{ */
39 IFX_EXTERN void DateTime_set(Ifx_DateTime *time);
40 IFX_EXTERN void DateTime_get(Ifx_DateTime *time);
41 /** \} */
42
43 #endif /* REALTIME_H_ */
DateTime_set
IFX_EXTERN void DateTime_set(Ifx_DateTime *time)
Set the real time.
Definition: Ifx_DateTime.c:46
Ifx_DateTime::hours
sint32 hours
Definition: Ifx_DateTime.h:33
Ifx_DateTime::minutes
sint32 minutes
Definition: Ifx_DateTime.h:34
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
DateTime_get
IFX_EXTERN void DateTime_get(Ifx_DateTime *time)
Get the real time Note that this function is valid only if DateTime_set() has been called...
Definition: Ifx_DateTime.c:33
Ifx_DateTime
Definition: Ifx_DateTime.h:31
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_DateTime::seconds
sint32 seconds
Definition: Ifx_DateTime.h:35
sint32
long sint32
Definition: Platform_Types.h:131


iLLD_TC26B: Ifx_FftF32.c Source File

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  • CpuGeneric
  • SysSe
  • Math
Ifx_FftF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_FftF32.c
3 * \brief Floating-point Fast Fourier Transform
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "Ifx_FftF32.h"
27 #include <math.h>
28
29 //#include "Compiler.h"
30
31 cfloat32 *Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, short nX)
32 {
33 int i;
34 double Theta;
35
36 // prepare twiddle coefficients
37 for (i = 0; i < nX / 2; i++)
38 {
39 Theta = 2 * IFX_PI * i / nX;
40
41 TF[i].real = (float32)(cosf(Theta));
42 TF[i].imag = (float32)(-sinf(Theta));
43 }
44
45 return TF;
46 }
47
48
49 /******************************************************************************/
50 unsigned short Ifx_FftF32_reverseBits(unsigned short n, unsigned bits)
51 {
52 /* This code is from:
53 * http://graphics.stanford.edu/~seander/bithacks.html
54 * */
55 unsigned long v = n; // 32-bit word to reverse bit order
56
57 // swap odd and even bits
58 v = ((v >> 1) & 0x55555555UL) | ((v & 0x55555555UL) << 1);
59 // swap consecutive pairs
60 v = ((v >> 2) & 0x33333333UL) | ((v & 0x33333333UL) << 2);
61 // swap nibbles ...
62 v = ((v >> 4) & 0x0F0F0F0FUL) | ((v & 0x0F0F0F0FUL) << 4);
63 // swap bytes
64 v = ((v >> 8) & 0x00FF00FFUL) | ((v & 0x00FF00FFUL) << 8);
65 // swap 2-byte long pairs
66 v = (v >> 16) | (v << 16);
67
68 v = v >> (32 - bits);
69 return (unsigned short)v;
70 }
71
72
73 /******************************************************************************/
74 void Ifx_FftF32_radix2DecimationInTime(cfloat32 *R, unsigned long p)
75 {
76 /* http://www.engineeringproductivitytools.com/stuff/T0001/PT04.HTM#Head317
77 * */
78 /*Perform in place Ifx_FftF32_radix2DecimationInTime of 2^p points (=size of f)
79 * N.B. The input array f is in bit reversed order! So all the
80 * 'even' input samples are in the 'top' half, all the 'odd'
81 * input samples are in the 'bottom' halR..etc (recursively).
82 */
83 /*Ifx_FftF32_radix2DecimationInTime*/
84 unsigned long Bp, Np, Npx, P, b, k, BaseT, BaseB;
85 cfloat32 top, bot;
86 /*initialise pass parameters*/
87 Bp = 1 << (p - 1); /*No. of blocks*/
88 Np = 2; /*No. of points in each block*/
89
90 /*perform p passes*/
91 for (P = 0; P < p; P++)
92 {
93 /*pass loop*/
94 Npx = Np >> 1; /*No. of butterflies*/
95 BaseT = 0; /*Reset even base index*/
96
97 for (b = 0; b < Bp; b++)
98 {
99 /*block loop*/
100 BaseB = BaseT + Npx; /*calc odd base index*/
101
102 for (k = 0; k < Npx; k++)
103 {
104 //printf("P = %d; b = %d; Np = %d; k = %d\n", P, b, Np, k);
105 /*butterfly loop*/
106 top = Ifx_FftF32_lookUpTwiddleFactor(Np, k);
107 bot = IFX_Cf32_mul(&R[BaseB + k], &top); /*twiddle the odd n results*/
108 top = R[BaseT + k];
109 R[BaseT + k] = IFX_Cf32_add(&top, &bot); /*top subset*/
110 R[BaseB + k] = IFX_Cf32_sub(&top, &bot); /*bottom subset*/
111 } /*butterfly loop*/
112
113 BaseT = BaseT + Np; /*start of next block*/
114 } /*block loop*/
115
116 /*calc parameters for next pass*/
117 Bp = Bp >> 1; /*half as many blocks*/
118 Np = Np << 1; /*twice as many points in each block*/
119 } /*pass loop*/
120 } /*Ifx_FftF32_radix2DecimationInTime*/
121
122
123 cfloat32 *Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, unsigned short nX)
124 {
125 unsigned int logN = 31 - __clz(nX);
126 unsigned short n, k;
127
128 /* Arrange in bit-reversed index */
129 for (n = 0; n < nX; n++)
130 {
131 //k = Ifx_FftF32_reverseBits(n, logN);
132 k = Ifx_FftF32_lookUpReversedBits(n, logN);
133 R[k] = X[n];
134 }
135
136 Ifx_FftF32_radix2DecimationInTime(R, logN);
137
138 return R;
139 }
140
141
142 cfloat32 *Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, unsigned short nX)
143 {
144 unsigned int logN = 31 - __clz(nX);
145 unsigned short n, k = 0;
146
147 /* Arrange in bit-reversed index, and conjugate the input */
148 for (n = 0; n < nX; n++)
149 {
150 //k = Ifx_FftF32_reverseBits(n, logN);
151 k = Ifx_FftF32_lookUpReversedBits(n, logN);
152 R[k].real = X[n].real;
153 R[k].imag = -X[n].imag;
154 }
155
156 Ifx_FftF32_radix2DecimationInTime(R, logN);
157
158 /* Conjugate the output */
159 for (n = 0; n < nX; n++)
160 {
161 R[n].imag = -R[n].imag;
162 }
163
164 return R;
165 }
Ifx_FftF32_generateTwiddleFactor
cfloat32 * Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, short nX)
Twiddle factor generator.
Definition: Ifx_FftF32.c:31
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
Ifx_FftF32_reverseBits
unsigned short Ifx_FftF32_reverseBits(unsigned short n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits.
Definition: Ifx_FftF32.c:50
IFX_Cf32_mul
IFX_INLINE cfloat32 IFX_Cf32_mul(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:47
float32
float float32
Definition: Platform_Types.h:167
Ifx_FftF32_radix2DecimationInTime
void Ifx_FftF32_radix2DecimationInTime(cfloat32 *R, unsigned long p)
Definition: Ifx_FftF32.c:74
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:44
cfloat32
Definition: Ifx_Types.h:41
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:200
IFX_Cf32_sub
IFX_INLINE cfloat32 IFX_Cf32_sub(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:96
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:43
Ifx_FftF32.h
Floating-point Fast Fourier Transform.
Ifx_FftF32_radix2
cfloat32 * Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Fast-Fourier Transform.
Definition: Ifx_FftF32.c:123
IFX_Cf32_add
IFX_INLINE cfloat32 IFX_Cf32_add(const cfloat32 *a, const cfloat32 *b)
Definition: Ifx_Cf32.h:87
Ifx_FftF32_lookUpTwiddleFactor
IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.
Definition: Ifx_FftF32.h:82
Ifx_FftF32_radix2I
cfloat32 * Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, unsigned short nX)
Radix-2 Inverse Fast-Fourier Transform.
Definition: Ifx_FftF32.c:142
Ifx_FftF32_lookUpReversedBits
IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits...
Definition: Ifx_FftF32.h:73


iLLD_TC26B: Ifx_FftF32.h Source File

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Ifx_FftF32.h
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1 /**
2 * \file Ifx_FftF32.h
3 * \brief Floating-point Fast Fourier Transform
4 * \ingroup library_srvsw_sysse_math_f32_fft
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 *
15 * Infineon Technologies AG (Infineon) is supplying this file for use
16 * exclusively with Infineon's microcontroller products. This file can be freely
17 * distributed within development tools that are supporting such microcontroller
18 * products.
19 *
20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
23 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
24 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
25 *
26 * \defgroup library_srvsw_sysse_math_f32_fft Floating-point FFT
27 * This module implements the Fast Fourier Transform in single precision floating-point
28 * \ingroup library_srvsw_sysse_math_f32
29 *
30 */
31
32 #ifndef IFX_FFTF32_H
33 #define IFX_FFTF32_H
34
35 #include "Ifx_Cf32.h"
36
37 /** \brief Maximum FFT resolution (bits).
38 * If redefined, then \ref Ifx_g_FftF32_bitReverseTable and \ref Ifx_g_FftF32_twiddleTable shall be regenerated. */
39 #define IFX_FFTF32_MAX_RESOLUTION (14)
40
41 /** \brief Maximum FFT length.
42 * If redefined, then \ref Ifx_g_FftF32_bitReverseTable and \ref Ifx_g_FftF32_twiddleTable shall be regenerated. */
43 #define IFX_FFTF32_MAX_LENGTH (1U << IFX_FFTF32_MAX_RESOLUTION)
44
45 /** \brief Bit reversal table */
46 IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH];
47
48 /** \brief Twiddle factor table */
49 IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH / 2];
50
51 //----------------------------------------------------------------------------------------
52 /** \addtogroup library_srvsw_sysse_math_f32_fft
53 * \{ */
54
55 /** \name Transform functions
56 * \{ */
57
58 /** \brief Twiddle factor generator */
59 IFX_EXTERN cfloat32 *Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, sint16 nX);
60
61 /** \brief Radix-2 Fast-Fourier Transform */
62 IFX_EXTERN cfloat32 *Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, uint16 nX);
63
64 /** \brief Radix-2 Inverse Fast-Fourier Transform */
65 IFX_EXTERN cfloat32 *Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, uint16 nX);
66
67 /** \} */
68 //----------------------------------------------------------------------------------------
69 /** \name Utility functions
70 * \{ */
71
72 /** \brief Lookup from \ref Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits */
73 IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
74 {
75 unsigned shift = IFX_FFTF32_MAX_RESOLUTION - bits;
76 uint16 index = Ifx_g_FftF32_bitReverseTable[n];
77 return index >> shift;
78 }
79
80
81 /** \brief Lookup from \ref Ifx_g_FftF32_twiddleTable the twiddle factor for N, k */
82 IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
83 {
84 return Ifx_g_FftF32_twiddleTable[k * IFX_FFTF32_MAX_LENGTH / N];
85 }
86
87
88 /** \brief Calculate the bit-reversed <n> with <bits> as number of bits */
89 IFX_EXTERN uint16 Ifx_FftF32_reverseBits(uint16 n, unsigned bits);
90
91 /** \} */
92 //----------------------------------------------------------------------------------------
93 /** \} */
94
95 #endif /* IFX_FFTF32_H */
Ifx_FftF32_generateTwiddleFactor
IFX_EXTERN cfloat32 * Ifx_FftF32_generateTwiddleFactor(cfloat32 *TF, sint16 nX)
Twiddle factor generator.
Definition: Ifx_FftF32.c:31
Ifx_FftF32_reverseBits
IFX_EXTERN uint16 Ifx_FftF32_reverseBits(uint16 n, unsigned bits)
Calculate the bit-reversed <n> with <bits> as number of bits.
Definition: Ifx_FftF32.c:50
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
cfloat32
Definition: Ifx_Types.h:41
sint16
short sint16
Definition: Platform_Types.h:126
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IFX_FFTF32_MAX_LENGTH
#define IFX_FFTF32_MAX_LENGTH
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...
Definition: Ifx_FftF32.h:43
Ifx_FftF32_radix2
IFX_EXTERN cfloat32 * Ifx_FftF32_radix2(cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Fast-Fourier Transform.
Definition: Ifx_FftF32.c:123
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_FftF32_lookUpTwiddleFactor
IFX_INLINE cfloat32 Ifx_FftF32_lookUpTwiddleFactor(sint32 N, sint32 k)
Lookup from Ifx_g_FftF32_twiddleTable the twiddle factor for N, k.
Definition: Ifx_FftF32.h:82
Ifx_g_FftF32_bitReverseTable
IFX_EXTERN IFX_CONST uint16 Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]
Bit reversal table.
Definition: Ifx_FftF32.h:46
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
sint32
long sint32
Definition: Platform_Types.h:131
IFX_FFTF32_MAX_RESOLUTION
#define IFX_FFTF32_MAX_RESOLUTION
Maximum FFT resolution (bits). If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twidd...
Definition: Ifx_FftF32.h:39
Ifx_g_FftF32_twiddleTable
IFX_EXTERN IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]
Twiddle factor table.
Definition: Ifx_FftF32.h:49
Ifx_FftF32_radix2I
IFX_EXTERN cfloat32 * Ifx_FftF32_radix2I(cfloat32 *R, const cfloat32 *X, uint16 nX)
Radix-2 Inverse Fast-Fourier Transform.
Definition: Ifx_FftF32.c:142
Ifx_FftF32_lookUpReversedBits
IFX_INLINE uint16 Ifx_FftF32_lookUpReversedBits(uint16 n, unsigned bits)
Lookup from Ifx_g_FftF32_bitReverseTable the bit-reversed <n> with <bits> as number of bits...
Definition: Ifx_FftF32.h:73


iLLD_TC26B: Ifx_FftF32_BitReverseTable.c Source File

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Ifx_FftF32_BitReverseTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_FftF32_BitReverseTable.c
3 * \brief Bit-reversal lookup for Floating-point Fast Fourier Transform
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "Ifx_FftF32.h"
27
28 /*lint -e915*/
29 CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH] = {
30 0,
31 8192,
32 4096,
33 12288,
34 2048,
35 10240,
36 6144,
37 14336,
38 1024,
39 9216,
40 5120,
41 13312,
42 3072,
43 11264,
44 7168,
45 15360,
46 512,
47 8704,
48 4608,
49 12800,
50 2560,
51 10752,
52 6656,
53 14848,
54 1536,
55 9728,
56 5632,
57 13824,
58 3584,
59 11776,
60 7680,
61 15872,
62 256,
63 8448,
64 4352,
65 12544,
66 2304,
67 10496,
68 6400,
69 14592,
70 1280,
71 9472,
72 5376,
73 13568,
74 3328,
75 11520,
76 7424,
77 15616,
78 768,
79 8960,
80 4864,
81 13056,
82 2816,
83 11008,
84 6912,
85 15104,
86 1792,
87 9984,
88 5888,
89 14080,
90 3840,
91 12032,
92 7936,
93 16128,
94 128,
95 8320,
96 4224,
97 12416,
98 2176,
99 10368,
100 6272,
101 14464,
102 1152,
103 9344,
104 5248,
105 13440,
106 3200,
107 11392,
108 7296,
109 15488,
110 640,
111 8832,
112 4736,
113 12928,
114 2688,
115 10880,
116 6784,
117 14976,
118 1664,
119 9856,
120 5760,
121 13952,
122 3712,
123 11904,
124 7808,
125 16000,
126 384,
127 8576,
128 4480,
129 12672,
130 2432,
131 10624,
132 6528,
133 14720,
134 1408,
135 9600,
136 5504,
137 13696,
138 3456,
139 11648,
140 7552,
141 15744,
142 896,
143 9088,
144 4992,
145 13184,
146 2944,
147 11136,
148 7040,
149 15232,
150 1920,
151 10112,
152 6016,
153 14208,
154 3968,
155 12160,
156 8064,
157 16256,
158 64,
159 8256,
160 4160,
161 12352,
162 2112,
163 10304,
164 6208,
165 14400,
166 1088,
167 9280,
168 5184,
169 13376,
170 3136,
171 11328,
172 7232,
173 15424,
174 576,
175 8768,
176 4672,
177 12864,
178 2624,
179 10816,
180 6720,
181 14912,
182 1600,
183 9792,
184 5696,
185 13888,
186 3648,
187 11840,
188 7744,
189 15936,
190 320,
191 8512,
192 4416,
193 12608,
194 2368,
195 10560,
196 6464,
197 14656,
198 1344,
199 9536,
200 5440,
201 13632,
202 3392,
203 11584,
204 7488,
205 15680,
206 832,
207 9024,
208 4928,
209 13120,
210 2880,
211 11072,
212 6976,
213 15168,
214 1856,
215 10048,
216 5952,
217 14144,
218 3904,
219 12096,
220 8000,
221 16192,
222 192,
223 8384,
224 4288,
225 12480,
226 2240,
227 10432,
228 6336,
229 14528,
230 1216,
231 9408,
232 5312,
233 13504,
234 3264,
235 11456,
236 7360,
237 15552,
238 704,
239 8896,
240 4800,
241 12992,
242 2752,
243 10944,
244 6848,
245 15040,
246 1728,
247 9920,
248 5824,
249 14016,
250 3776,
251 11968,
252 7872,
253 16064,
254 448,
255 8640,
256 4544,
257 12736,
258 2496,
259 10688,
260 6592,
261 14784,
262 1472,
263 9664,
264 5568,
265 13760,
266 3520,
267 11712,
268 7616,
269 15808,
270 960,
271 9152,
272 5056,
273 13248,
274 3008,
275 11200,
276 7104,
277 15296,
278 1984,
279 10176,
280 6080,
281 14272,
282 4032,
283 12224,
284 8128,
285 16320,
286 32,
287 8224,
288 4128,
289 12320,
290 2080,
291 10272,
292 6176,
293 14368,
294 1056,
295 9248,
296 5152,
297 13344,
298 3104,
299 11296,
300 7200,
301 15392,
302 544,
303 8736,
304 4640,
305 12832,
306 2592,
307 10784,
308 6688,
309 14880,
310 1568,
311 9760,
312 5664,
313 13856,
314 3616,
315 11808,
316 7712,
317 15904,
318 288,
319 8480,
320 4384,
321 12576,
322 2336,
323 10528,
324 6432,
325 14624,
326 1312,
327 9504,
328 5408,
329 13600,
330 3360,
331 11552,
332 7456,
333 15648,
334 800,
335 8992,
336 4896,
337 13088,
338 2848,
339 11040,
340 6944,
341 15136,
342 1824,
343 10016,
344 5920,
345 14112,
346 3872,
347 12064,
348 7968,
349 16160,
350 160,
351 8352,
352 4256,
353 12448,
354 2208,
355 10400,
356 6304,
357 14496,
358 1184,
359 9376,
360 5280,
361 13472,
362 3232,
363 11424,
364 7328,
365 15520,
366 672,
367 8864,
368 4768,
369 12960,
370 2720,
371 10912,
372 6816,
373 15008,
374 1696,
375 9888,
376 5792,
377 13984,
378 3744,
379 11936,
380 7840,
381 16032,
382 416,
383 8608,
384 4512,
385 12704,
386 2464,
387 10656,
388 6560,
389 14752,
390 1440,
391 9632,
392 5536,
393 13728,
394 3488,
395 11680,
396 7584,
397 15776,
398 928,
399 9120,
400 5024,
401 13216,
402 2976,
403 11168,
404 7072,
405 15264,
406 1952,
407 10144,
408 6048,
409 14240,
410 4000,
411 12192,
412 8096,
413 16288,
414 96,
415 8288,
416 4192,
417 12384,
418 2144,
419 10336,
420 6240,
421 14432,
422 1120,
423 9312,
424 5216,
425 13408,
426 3168,
427 11360,
428 7264,
429 15456,
430 608,
431 8800,
432 4704,
433 12896,
434 2656,
435 10848,
436 6752,
437 14944,
438 1632,
439 9824,
440 5728,
441 13920,
442 3680,
443 11872,
444 7776,
445 15968,
446 352,
447 8544,
448 4448,
449 12640,
450 2400,
451 10592,
452 6496,
453 14688,
454 1376,
455 9568,
456 5472,
457 13664,
458 3424,
459 11616,
460 7520,
461 15712,
462 864,
463 9056,
464 4960,
465 13152,
466 2912,
467 11104,
468 7008,
469 15200,
470 1888,
471 10080,
472 5984,
473 14176,
474 3936,
475 12128,
476 8032,
477 16224,
478 224,
479 8416,
480 4320,
481 12512,
482 2272,
483 10464,
484 6368,
485 14560,
486 1248,
487 9440,
488 5344,
489 13536,
490 3296,
491 11488,
492 7392,
493 15584,
494 736,
495 8928,
496 4832,
497 13024,
498 2784,
499 10976,
500 6880,
501 15072,
502 1760,
503 9952,
504 5856,
505 14048,
506 3808,
507 12000,
508 7904,
509 16096,
510 480,
511 8672,
512 4576,
513 12768,
514 2528,
515 10720,
516 6624,
517 14816,
518 1504,
519 9696,
520 5600,
521 13792,
522 3552,
523 11744,
524 7648,
525 15840,
526 992,
527 9184,
528 5088,
529 13280,
530 3040,
531 11232,
532 7136,
533 15328,
534 2016,
535 10208,
536 6112,
537 14304,
538 4064,
539 12256,
540 8160,
541 16352,
542 16,
543 8208,
544 4112,
545 12304,
546 2064,
547 10256,
548 6160,
549 14352,
550 1040,
551 9232,
552 5136,
553 13328,
554 3088,
555 11280,
556 7184,
557 15376,
558 528,
559 8720,
560 4624,
561 12816,
562 2576,
563 10768,
564 6672,
565 14864,
566 1552,
567 9744,
568 5648,
569 13840,
570 3600,
571 11792,
572 7696,
573 15888,
574 272,
575 8464,
576 4368,
577 12560,
578 2320,
579 10512,
580 6416,
581 14608,
582 1296,
583 9488,
584 5392,
585 13584,
586 3344,
587 11536,
588 7440,
589 15632,
590 784,
591 8976,
592 4880,
593 13072,
594 2832,
595 11024,
596 6928,
597 15120,
598 1808,
599 10000,
600 5904,
601 14096,
602 3856,
603 12048,
604 7952,
605 16144,
606 144,
607 8336,
608 4240,
609 12432,
610 2192,
611 10384,
612 6288,
613 14480,
614 1168,
615 9360,
616 5264,
617 13456,
618 3216,
619 11408,
620 7312,
621 15504,
622 656,
623 8848,
624 4752,
625 12944,
626 2704,
627 10896,
628 6800,
629 14992,
630 1680,
631 9872,
632 5776,
633 13968,
634 3728,
635 11920,
636 7824,
637 16016,
638 400,
639 8592,
640 4496,
641 12688,
642 2448,
643 10640,
644 6544,
645 14736,
646 1424,
647 9616,
648 5520,
649 13712,
650 3472,
651 11664,
652 7568,
653 15760,
654 912,
655 9104,
656 5008,
657 13200,
658 2960,
659 11152,
660 7056,
661 15248,
662 1936,
663 10128,
664 6032,
665 14224,
666 3984,
667 12176,
668 8080,
669 16272,
670 80,
671 8272,
672 4176,
673 12368,
674 2128,
675 10320,
676 6224,
677 14416,
678 1104,
679 9296,
680 5200,
681 13392,
682 3152,
683 11344,
684 7248,
685 15440,
686 592,
687 8784,
688 4688,
689 12880,
690 2640,
691 10832,
692 6736,
693 14928,
694 1616,
695 9808,
696 5712,
697 13904,
698 3664,
699 11856,
700 7760,
701 15952,
702 336,
703 8528,
704 4432,
705 12624,
706 2384,
707 10576,
708 6480,
709 14672,
710 1360,
711 9552,
712 5456,
713 13648,
714 3408,
715 11600,
716 7504,
717 15696,
718 848,
719 9040,
720 4944,
721 13136,
722 2896,
723 11088,
724 6992,
725 15184,
726 1872,
727 10064,
728 5968,
729 14160,
730 3920,
731 12112,
732 8016,
733 16208,
734 208,
735 8400,
736 4304,
737 12496,
738 2256,
739 10448,
740 6352,
741 14544,
742 1232,
743 9424,
744 5328,
745 13520,
746 3280,
747 11472,
748 7376,
749 15568,
750 720,
751 8912,
752 4816,
753 13008,
754 2768,
755 10960,
756 6864,
757 15056,
758 1744,
759 9936,
760 5840,
761 14032,
762 3792,
763 11984,
764 7888,
765 16080,
766 464,
767 8656,
768 4560,
769 12752,
770 2512,
771 10704,
772 6608,
773 14800,
774 1488,
775 9680,
776 5584,
777 13776,
778 3536,
779 11728,
780 7632,
781 15824,
782 976,
783 9168,
784 5072,
785 13264,
786 3024,
787 11216,
788 7120,
789 15312,
790 2000,
791 10192,
792 6096,
793 14288,
794 4048,
795 12240,
796 8144,
797 16336,
798 48,
799 8240,
800 4144,
801 12336,
802 2096,
803 10288,
804 6192,
805 14384,
806 1072,
807 9264,
808 5168,
809 13360,
810 3120,
811 11312,
812 7216,
813 15408,
814 560,
815 8752,
816 4656,
817 12848,
818 2608,
819 10800,
820 6704,
821 14896,
822 1584,
823 9776,
824 5680,
825 13872,
826 3632,
827 11824,
828 7728,
829 15920,
830 304,
831 8496,
832 4400,
833 12592,
834 2352,
835 10544,
836 6448,
837 14640,
838 1328,
839 9520,
840 5424,
841 13616,
842 3376,
843 11568,
844 7472,
845 15664,
846 816,
847 9008,
848 4912,
849 13104,
850 2864,
851 11056,
852 6960,
853 15152,
854 1840,
855 10032,
856 5936,
857 14128,
858 3888,
859 12080,
860 7984,
861 16176,
862 176,
863 8368,
864 4272,
865 12464,
866 2224,
867 10416,
868 6320,
869 14512,
870 1200,
871 9392,
872 5296,
873 13488,
874 3248,
875 11440,
876 7344,
877 15536,
878 688,
879 8880,
880 4784,
881 12976,
882 2736,
883 10928,
884 6832,
885 15024,
886 1712,
887 9904,
888 5808,
889 14000,
890 3760,
891 11952,
892 7856,
893 16048,
894 432,
895 8624,
896 4528,
897 12720,
898 2480,
899 10672,
900 6576,
901 14768,
902 1456,
903 9648,
904 5552,
905 13744,
906 3504,
907 11696,
908 7600,
909 15792,
910 944,
911 9136,
912 5040,
913 13232,
914 2992,
915 11184,
916 7088,
917 15280,
918 1968,
919 10160,
920 6064,
921 14256,
922 4016,
923 12208,
924 8112,
925 16304,
926 112,
927 8304,
928 4208,
929 12400,
930 2160,
931 10352,
932 6256,
933 14448,
934 1136,
935 9328,
936 5232,
937 13424,
938 3184,
939 11376,
940 7280,
941 15472,
942 624,
943 8816,
944 4720,
945 12912,
946 2672,
947 10864,
948 6768,
949 14960,
950 1648,
951 9840,
952 5744,
953 13936,
954 3696,
955 11888,
956 7792,
957 15984,
958 368,
959 8560,
960 4464,
961 12656,
962 2416,
963 10608,
964 6512,
965 14704,
966 1392,
967 9584,
968 5488,
969 13680,
970 3440,
971 11632,
972 7536,
973 15728,
974 880,
975 9072,
976 4976,
977 13168,
978 2928,
979 11120,
980 7024,
981 15216,
982 1904,
983 10096,
984 6000,
985 14192,
986 3952,
987 12144,
988 8048,
989 16240,
990 240,
991 8432,
992 4336,
993 12528,
994 2288,
995 10480,
996 6384,
997 14576,
998 1264,
999 9456,
1000 5360,
1001 13552,
1002 3312,
1003 11504,
1004 7408,
1005 15600,
1006 752,
1007 8944,
1008 4848,
1009 13040,
1010 2800,
1011 10992,
1012 6896,
1013 15088,
1014 1776,
1015 9968,
1016 5872,
1017 14064,
1018 3824,
1019 12016,
1020 7920,
1021 16112,
1022 496,
1023 8688,
1024 4592,
1025 12784,
1026 2544,
1027 10736,
1028 6640,
1029 14832,
1030 1520,
1031 9712,
1032 5616,
1033 13808,
1034 3568,
1035 11760,
1036 7664,
1037 15856,
1038 1008,
1039 9200,
1040 5104,
1041 13296,
1042 3056,
1043 11248,
1044 7152,
1045 15344,
1046 2032,
1047 10224,
1048 6128,
1049 14320,
1050 4080,
1051 12272,
1052 8176,
1053 16368,
1054 8,
1055 8200,
1056 4104,
1057 12296,
1058 2056,
1059 10248,
1060 6152,
1061 14344,
1062 1032,
1063 9224,
1064 5128,
1065 13320,
1066 3080,
1067 11272,
1068 7176,
1069 15368,
1070 520,
1071 8712,
1072 4616,
1073 12808,
1074 2568,
1075 10760,
1076 6664,
1077 14856,
1078 1544,
1079 9736,
1080 5640,
1081 13832,
1082 3592,
1083 11784,
1084 7688,
1085 15880,
1086 264,
1087 8456,
1088 4360,
1089 12552,
1090 2312,
1091 10504,
1092 6408,
1093 14600,
1094 1288,
1095 9480,
1096 5384,
1097 13576,
1098 3336,
1099 11528,
1100 7432,
1101 15624,
1102 776,
1103 8968,
1104 4872,
1105 13064,
1106 2824,
1107 11016,
1108 6920,
1109 15112,
1110 1800,
1111 9992,
1112 5896,
1113 14088,
1114 3848,
1115 12040,
1116 7944,
1117 16136,
1118 136,
1119 8328,
1120 4232,
1121 12424,
1122 2184,
1123 10376,
1124 6280,
1125 14472,
1126 1160,
1127 9352,
1128 5256,
1129 13448,
1130 3208,
1131 11400,
1132 7304,
1133 15496,
1134 648,
1135 8840,
1136 4744,
1137 12936,
1138 2696,
1139 10888,
1140 6792,
1141 14984,
1142 1672,
1143 9864,
1144 5768,
1145 13960,
1146 3720,
1147 11912,
1148 7816,
1149 16008,
1150 392,
1151 8584,
1152 4488,
1153 12680,
1154 2440,
1155 10632,
1156 6536,
1157 14728,
1158 1416,
1159 9608,
1160 5512,
1161 13704,
1162 3464,
1163 11656,
1164 7560,
1165 15752,
1166 904,
1167 9096,
1168 5000,
1169 13192,
1170 2952,
1171 11144,
1172 7048,
1173 15240,
1174 1928,
1175 10120,
1176 6024,
1177 14216,
1178 3976,
1179 12168,
1180 8072,
1181 16264,
1182 72,
1183 8264,
1184 4168,
1185 12360,
1186 2120,
1187 10312,
1188 6216,
1189 14408,
1190 1096,
1191 9288,
1192 5192,
1193 13384,
1194 3144,
1195 11336,
1196 7240,
1197 15432,
1198 584,
1199 8776,
1200 4680,
1201 12872,
1202 2632,
1203 10824,
1204 6728,
1205 14920,
1206 1608,
1207 9800,
1208 5704,
1209 13896,
1210 3656,
1211 11848,
1212 7752,
1213 15944,
1214 328,
1215 8520,
1216 4424,
1217 12616,
1218 2376,
1219 10568,
1220 6472,
1221 14664,
1222 1352,
1223 9544,
1224 5448,
1225 13640,
1226 3400,
1227 11592,
1228 7496,
1229 15688,
1230 840,
1231 9032,
1232 4936,
1233 13128,
1234 2888,
1235 11080,
1236 6984,
1237 15176,
1238 1864,
1239 10056,
1240 5960,
1241 14152,
1242 3912,
1243 12104,
1244 8008,
1245 16200,
1246 200,
1247 8392,
1248 4296,
1249 12488,
1250 2248,
1251 10440,
1252 6344,
1253 14536,
1254 1224,
1255 9416,
1256 5320,
1257 13512,
1258 3272,
1259 11464,
1260 7368,
1261 15560,
1262 712,
1263 8904,
1264 4808,
1265 13000,
1266 2760,
1267 10952,
1268 6856,
1269 15048,
1270 1736,
1271 9928,
1272 5832,
1273 14024,
1274 3784,
1275 11976,
1276 7880,
1277 16072,
1278 456,
1279 8648,
1280 4552,
1281 12744,
1282 2504,
1283 10696,
1284 6600,
1285 14792,
1286 1480,
1287 9672,
1288 5576,
1289 13768,
1290 3528,
1291 11720,
1292 7624,
1293 15816,
1294 968,
1295 9160,
1296 5064,
1297 13256,
1298 3016,
1299 11208,
1300 7112,
1301 15304,
1302 1992,
1303 10184,
1304 6088,
1305 14280,
1306 4040,
1307 12232,
1308 8136,
1309 16328,
1310 40,
1311 8232,
1312 4136,
1313 12328,
1314 2088,
1315 10280,
1316 6184,
1317 14376,
1318 1064,
1319 9256,
1320 5160,
1321 13352,
1322 3112,
1323 11304,
1324 7208,
1325 15400,
1326 552,
1327 8744,
1328 4648,
1329 12840,
1330 2600,
1331 10792,
1332 6696,
1333 14888,
1334 1576,
1335 9768,
1336 5672,
1337 13864,
1338 3624,
1339 11816,
1340 7720,
1341 15912,
1342 296,
1343 8488,
1344 4392,
1345 12584,
1346 2344,
1347 10536,
1348 6440,
1349 14632,
1350 1320,
1351 9512,
1352 5416,
1353 13608,
1354 3368,
1355 11560,
1356 7464,
1357 15656,
1358 808,
1359 9000,
1360 4904,
1361 13096,
1362 2856,
1363 11048,
1364 6952,
1365 15144,
1366 1832,
1367 10024,
1368 5928,
1369 14120,
1370 3880,
1371 12072,
1372 7976,
1373 16168,
1374 168,
1375 8360,
1376 4264,
1377 12456,
1378 2216,
1379 10408,
1380 6312,
1381 14504,
1382 1192,
1383 9384,
1384 5288,
1385 13480,
1386 3240,
1387 11432,
1388 7336,
1389 15528,
1390 680,
1391 8872,
1392 4776,
1393 12968,
1394 2728,
1395 10920,
1396 6824,
1397 15016,
1398 1704,
1399 9896,
1400 5800,
1401 13992,
1402 3752,
1403 11944,
1404 7848,
1405 16040,
1406 424,
1407 8616,
1408 4520,
1409 12712,
1410 2472,
1411 10664,
1412 6568,
1413 14760,
1414 1448,
1415 9640,
1416 5544,
1417 13736,
1418 3496,
1419 11688,
1420 7592,
1421 15784,
1422 936,
1423 9128,
1424 5032,
1425 13224,
1426 2984,
1427 11176,
1428 7080,
1429 15272,
1430 1960,
1431 10152,
1432 6056,
1433 14248,
1434 4008,
1435 12200,
1436 8104,
1437 16296,
1438 104,
1439 8296,
1440 4200,
1441 12392,
1442 2152,
1443 10344,
1444 6248,
1445 14440,
1446 1128,
1447 9320,
1448 5224,
1449 13416,
1450 3176,
1451 11368,
1452 7272,
1453 15464,
1454 616,
1455 8808,
1456 4712,
1457 12904,
1458 2664,
1459 10856,
1460 6760,
1461 14952,
1462 1640,
1463 9832,
1464 5736,
1465 13928,
1466 3688,
1467 11880,
1468 7784,
1469 15976,
1470 360,
1471 8552,
1472 4456,
1473 12648,
1474 2408,
1475 10600,
1476 6504,
1477 14696,
1478 1384,
1479 9576,
1480 5480,
1481 13672,
1482 3432,
1483 11624,
1484 7528,
1485 15720,
1486 872,
1487 9064,
1488 4968,
1489 13160,
1490 2920,
1491 11112,
1492 7016,
1493 15208,
1494 1896,
1495 10088,
1496 5992,
1497 14184,
1498 3944,
1499 12136,
1500 8040,
1501 16232,
1502 232,
1503 8424,
1504 4328,
1505 12520,
1506 2280,
1507 10472,
1508 6376,
1509 14568,
1510 1256,
1511 9448,
1512 5352,
1513 13544,
1514 3304,
1515 11496,
1516 7400,
1517 15592,
1518 744,
1519 8936,
1520 4840,
1521 13032,
1522 2792,
1523 10984,
1524 6888,
1525 15080,
1526 1768,
1527 9960,
1528 5864,
1529 14056,
1530 3816,
1531 12008,
1532 7912,
1533 16104,
1534 488,
1535 8680,
1536 4584,
1537 12776,
1538 2536,
1539 10728,
1540 6632,
1541 14824,
1542 1512,
1543 9704,
1544 5608,
1545 13800,
1546 3560,
1547 11752,
1548 7656,
1549 15848,
1550 1000,
1551 9192,
1552 5096,
1553 13288,
1554 3048,
1555 11240,
1556 7144,
1557 15336,
1558 2024,
1559 10216,
1560 6120,
1561 14312,
1562 4072,
1563 12264,
1564 8168,
1565 16360,
1566 24,
1567 8216,
1568 4120,
1569 12312,
1570 2072,
1571 10264,
1572 6168,
1573 14360,
1574 1048,
1575 9240,
1576 5144,
1577 13336,
1578 3096,
1579 11288,
1580 7192,
1581 15384,
1582 536,
1583 8728,
1584 4632,
1585 12824,
1586 2584,
1587 10776,
1588 6680,
1589 14872,
1590 1560,
1591 9752,
1592 5656,
1593 13848,
1594 3608,
1595 11800,
1596 7704,
1597 15896,
1598 280,
1599 8472,
1600 4376,
1601 12568,
1602 2328,
1603 10520,
1604 6424,
1605 14616,
1606 1304,
1607 9496,
1608 5400,
1609 13592,
1610 3352,
1611 11544,
1612 7448,
1613 15640,
1614 792,
1615 8984,
1616 4888,
1617 13080,
1618 2840,
1619 11032,
1620 6936,
1621 15128,
1622 1816,
1623 10008,
1624 5912,
1625 14104,
1626 3864,
1627 12056,
1628 7960,
1629 16152,
1630 152,
1631 8344,
1632 4248,
1633 12440,
1634 2200,
1635 10392,
1636 6296,
1637 14488,
1638 1176,
1639 9368,
1640 5272,
1641 13464,
1642 3224,
1643 11416,
1644 7320,
1645 15512,
1646 664,
1647 8856,
1648 4760,
1649 12952,
1650 2712,
1651 10904,
1652 6808,
1653 15000,
1654 1688,
1655 9880,
1656 5784,
1657 13976,
1658 3736,
1659 11928,
1660 7832,
1661 16024,
1662 408,
1663 8600,
1664 4504,
1665 12696,
1666 2456,
1667 10648,
1668 6552,
1669 14744,
1670 1432,
1671 9624,
1672 5528,
1673 13720,
1674 3480,
1675 11672,
1676 7576,
1677 15768,
1678 920,
1679 9112,
1680 5016,
1681 13208,
1682 2968,
1683 11160,
1684 7064,
1685 15256,
1686 1944,
1687 10136,
1688 6040,
1689 14232,
1690 3992,
1691 12184,
1692 8088,
1693 16280,
1694 88,
1695 8280,
1696 4184,
1697 12376,
1698 2136,
1699 10328,
1700 6232,
1701 14424,
1702 1112,
1703 9304,
1704 5208,
1705 13400,
1706 3160,
1707 11352,
1708 7256,
1709 15448,
1710 600,
1711 8792,
1712 4696,
1713 12888,
1714 2648,
1715 10840,
1716 6744,
1717 14936,
1718 1624,
1719 9816,
1720 5720,
1721 13912,
1722 3672,
1723 11864,
1724 7768,
1725 15960,
1726 344,
1727 8536,
1728 4440,
1729 12632,
1730 2392,
1731 10584,
1732 6488,
1733 14680,
1734 1368,
1735 9560,
1736 5464,
1737 13656,
1738 3416,
1739 11608,
1740 7512,
1741 15704,
1742 856,
1743 9048,
1744 4952,
1745 13144,
1746 2904,
1747 11096,
1748 7000,
1749 15192,
1750 1880,
1751 10072,
1752 5976,
1753 14168,
1754 3928,
1755 12120,
1756 8024,
1757 16216,
1758 216,
1759 8408,
1760 4312,
1761 12504,
1762 2264,
1763 10456,
1764 6360,
1765 14552,
1766 1240,
1767 9432,
1768 5336,
1769 13528,
1770 3288,
1771 11480,
1772 7384,
1773 15576,
1774 728,
1775 8920,
1776 4824,
1777 13016,
1778 2776,
1779 10968,
1780 6872,
1781 15064,
1782 1752,
1783 9944,
1784 5848,
1785 14040,
1786 3800,
1787 11992,
1788 7896,
1789 16088,
1790 472,
1791 8664,
1792 4568,
1793 12760,
1794 2520,
1795 10712,
1796 6616,
1797 14808,
1798 1496,
1799 9688,
1800 5592,
1801 13784,
1802 3544,
1803 11736,
1804 7640,
1805 15832,
1806 984,
1807 9176,
1808 5080,
1809 13272,
1810 3032,
1811 11224,
1812 7128,
1813 15320,
1814 2008,
1815 10200,
1816 6104,
1817 14296,
1818 4056,
1819 12248,
1820 8152,
1821 16344,
1822 56,
1823 8248,
1824 4152,
1825 12344,
1826 2104,
1827 10296,
1828 6200,
1829 14392,
1830 1080,
1831 9272,
1832 5176,
1833 13368,
1834 3128,
1835 11320,
1836 7224,
1837 15416,
1838 568,
1839 8760,
1840 4664,
1841 12856,
1842 2616,
1843 10808,
1844 6712,
1845 14904,
1846 1592,
1847 9784,
1848 5688,
1849 13880,
1850 3640,
1851 11832,
1852 7736,
1853 15928,
1854 312,
1855 8504,
1856 4408,
1857 12600,
1858 2360,
1859 10552,
1860 6456,
1861 14648,
1862 1336,
1863 9528,
1864 5432,
1865 13624,
1866 3384,
1867 11576,
1868 7480,
1869 15672,
1870 824,
1871 9016,
1872 4920,
1873 13112,
1874 2872,
1875 11064,
1876 6968,
1877 15160,
1878 1848,
1879 10040,
1880 5944,
1881 14136,
1882 3896,
1883 12088,
1884 7992,
1885 16184,
1886 184,
1887 8376,
1888 4280,
1889 12472,
1890 2232,
1891 10424,
1892 6328,
1893 14520,
1894 1208,
1895 9400,
1896 5304,
1897 13496,
1898 3256,
1899 11448,
1900 7352,
1901 15544,
1902 696,
1903 8888,
1904 4792,
1905 12984,
1906 2744,
1907 10936,
1908 6840,
1909 15032,
1910 1720,
1911 9912,
1912 5816,
1913 14008,
1914 3768,
1915 11960,
1916 7864,
1917 16056,
1918 440,
1919 8632,
1920 4536,
1921 12728,
1922 2488,
1923 10680,
1924 6584,
1925 14776,
1926 1464,
1927 9656,
1928 5560,
1929 13752,
1930 3512,
1931 11704,
1932 7608,
1933 15800,
1934 952,
1935 9144,
1936 5048,
1937 13240,
1938 3000,
1939 11192,
1940 7096,
1941 15288,
1942 1976,
1943 10168,
1944 6072,
1945 14264,
1946 4024,
1947 12216,
1948 8120,
1949 16312,
1950 120,
1951 8312,
1952 4216,
1953 12408,
1954 2168,
1955 10360,
1956 6264,
1957 14456,
1958 1144,
1959 9336,
1960 5240,
1961 13432,
1962 3192,
1963 11384,
1964 7288,
1965 15480,
1966 632,
1967 8824,
1968 4728,
1969 12920,
1970 2680,
1971 10872,
1972 6776,
1973 14968,
1974 1656,
1975 9848,
1976 5752,
1977 13944,
1978 3704,
1979 11896,
1980 7800,
1981 15992,
1982 376,
1983 8568,
1984 4472,
1985 12664,
1986 2424,
1987 10616,
1988 6520,
1989 14712,
1990 1400,
1991 9592,
1992 5496,
1993 13688,
1994 3448,
1995 11640,
1996 7544,
1997 15736,
1998 888,
1999 9080,
2000 4984,
2001 13176,
2002 2936,
2003 11128,
2004 7032,
2005 15224,
2006 1912,
2007 10104,
2008 6008,
2009 14200,
2010 3960,
2011 12152,
2012 8056,
2013 16248,
2014 248,
2015 8440,
2016 4344,
2017 12536,
2018 2296,
2019 10488,
2020 6392,
2021 14584,
2022 1272,
2023 9464,
2024 5368,
2025 13560,
2026 3320,
2027 11512,
2028 7416,
2029 15608,
2030 760,
2031 8952,
2032 4856,
2033 13048,
2034 2808,
2035 11000,
2036 6904,
2037 15096,
2038 1784,
2039 9976,
2040 5880,
2041 14072,
2042 3832,
2043 12024,
2044 7928,
2045 16120,
2046 504,
2047 8696,
2048 4600,
2049 12792,
2050 2552,
2051 10744,
2052 6648,
2053 14840,
2054 1528,
2055 9720,
2056 5624,
2057 13816,
2058 3576,
2059 11768,
2060 7672,
2061 15864,
2062 1016,
2063 9208,
2064 5112,
2065 13304,
2066 3064,
2067 11256,
2068 7160,
2069 15352,
2070 2040,
2071 10232,
2072 6136,
2073 14328,
2074 4088,
2075 12280,
2076 8184,
2077 16376,
2078 4,
2079 8196,
2080 4100,
2081 12292,
2082 2052,
2083 10244,
2084 6148,
2085 14340,
2086 1028,
2087 9220,
2088 5124,
2089 13316,
2090 3076,
2091 11268,
2092 7172,
2093 15364,
2094 516,
2095 8708,
2096 4612,
2097 12804,
2098 2564,
2099 10756,
2100 6660,
2101 14852,
2102 1540,
2103 9732,
2104 5636,
2105 13828,
2106 3588,
2107 11780,
2108 7684,
2109 15876,
2110 260,
2111 8452,
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2800 4820,
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2802 2772,
2803 10964,
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2900 6964,
2901 15156,
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2931 10932,
2932 6836,
2933 15028,
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2962 2996,
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2965 15284,
2966 1972,
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2971 12212,
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2990 628,
2991 8820,
2992 4724,
2993 12916,
2994 2676,
2995 10868,
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2998 1652,
2999 9844,
3000 5748,
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3020 7540,
3021 15732,
3022 884,
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3026 2932,
3027 11124,
3028 7028,
3029 15220,
3030 1908,
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3035 12148,
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3141 14604,
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3200 4492,
3201 12684,
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3210 3468,
3211 11660,
3212 7564,
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3222 1932,
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3230 76,
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3233 12364,
3234 2124,
3235 10316,
3236 6220,
3237 14412,
3238 1100,
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3249 12876,
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3262 332,
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3280 4940,
3281 13132,
3282 2892,
3283 11084,
3284 6988,
3285 15180,
3286 1868,
3287 10060,
3288 5964,
3289 14156,
3290 3916,
3291 12108,
3292 8012,
3293 16204,
3294 204,
3295 8396,
3296 4300,
3297 12492,
3298 2252,
3299 10444,
3300 6348,
3301 14540,
3302 1228,
3303 9420,
3304 5324,
3305 13516,
3306 3276,
3307 11468,
3308 7372,
3309 15564,
3310 716,
3311 8908,
3312 4812,
3313 13004,
3314 2764,
3315 10956,
3316 6860,
3317 15052,
3318 1740,
3319 9932,
3320 5836,
3321 14028,
3322 3788,
3323 11980,
3324 7884,
3325 16076,
3326 460,
3327 8652,
3328 4556,
3329 12748,
3330 2508,
3331 10700,
3332 6604,
3333 14796,
3334 1484,
3335 9676,
3336 5580,
3337 13772,
3338 3532,
3339 11724,
3340 7628,
3341 15820,
3342 972,
3343 9164,
3344 5068,
3345 13260,
3346 3020,
3347 11212,
3348 7116,
3349 15308,
3350 1996,
3351 10188,
3352 6092,
3353 14284,
3354 4044,
3355 12236,
3356 8140,
3357 16332,
3358 44,
3359 8236,
3360 4140,
3361 12332,
3362 2092,
3363 10284,
3364 6188,
3365 14380,
3366 1068,
3367 9260,
3368 5164,
3369 13356,
3370 3116,
3371 11308,
3372 7212,
3373 15404,
3374 556,
3375 8748,
3376 4652,
3377 12844,
3378 2604,
3379 10796,
3380 6700,
3381 14892,
3382 1580,
3383 9772,
3384 5676,
3385 13868,
3386 3628,
3387 11820,
3388 7724,
3389 15916,
3390 300,
3391 8492,
3392 4396,
3393 12588,
3394 2348,
3395 10540,
3396 6444,
3397 14636,
3398 1324,
3399 9516,
3400 5420,
3401 13612,
3402 3372,
3403 11564,
3404 7468,
3405 15660,
3406 812,
3407 9004,
3408 4908,
3409 13100,
3410 2860,
3411 11052,
3412 6956,
3413 15148,
3414 1836,
3415 10028,
3416 5932,
3417 14124,
3418 3884,
3419 12076,
3420 7980,
3421 16172,
3422 172,
3423 8364,
3424 4268,
3425 12460,
3426 2220,
3427 10412,
3428 6316,
3429 14508,
3430 1196,
3431 9388,
3432 5292,
3433 13484,
3434 3244,
3435 11436,
3436 7340,
3437 15532,
3438 684,
3439 8876,
3440 4780,
3441 12972,
3442 2732,
3443 10924,
3444 6828,
3445 15020,
3446 1708,
3447 9900,
3448 5804,
3449 13996,
3450 3756,
3451 11948,
3452 7852,
3453 16044,
3454 428,
3455 8620,
3456 4524,
3457 12716,
3458 2476,
3459 10668,
3460 6572,
3461 14764,
3462 1452,
3463 9644,
3464 5548,
3465 13740,
3466 3500,
3467 11692,
3468 7596,
3469 15788,
3470 940,
3471 9132,
3472 5036,
3473 13228,
3474 2988,
3475 11180,
3476 7084,
3477 15276,
3478 1964,
3479 10156,
3480 6060,
3481 14252,
3482 4012,
3483 12204,
3484 8108,
3485 16300,
3486 108,
3487 8300,
3488 4204,
3489 12396,
3490 2156,
3491 10348,
3492 6252,
3493 14444,
3494 1132,
3495 9324,
3496 5228,
3497 13420,
3498 3180,
3499 11372,
3500 7276,
3501 15468,
3502 620,
3503 8812,
3504 4716,
3505 12908,
3506 2668,
3507 10860,
3508 6764,
3509 14956,
3510 1644,
3511 9836,
3512 5740,
3513 13932,
3514 3692,
3515 11884,
3516 7788,
3517 15980,
3518 364,
3519 8556,
3520 4460,
3521 12652,
3522 2412,
3523 10604,
3524 6508,
3525 14700,
3526 1388,
3527 9580,
3528 5484,
3529 13676,
3530 3436,
3531 11628,
3532 7532,
3533 15724,
3534 876,
3535 9068,
3536 4972,
3537 13164,
3538 2924,
3539 11116,
3540 7020,
3541 15212,
3542 1900,
3543 10092,
3544 5996,
3545 14188,
3546 3948,
3547 12140,
3548 8044,
3549 16236,
3550 236,
3551 8428,
3552 4332,
3553 12524,
3554 2284,
3555 10476,
3556 6380,
3557 14572,
3558 1260,
3559 9452,
3560 5356,
3561 13548,
3562 3308,
3563 11500,
3564 7404,
3565 15596,
3566 748,
3567 8940,
3568 4844,
3569 13036,
3570 2796,
3571 10988,
3572 6892,
3573 15084,
3574 1772,
3575 9964,
3576 5868,
3577 14060,
3578 3820,
3579 12012,
3580 7916,
3581 16108,
3582 492,
3583 8684,
3584 4588,
3585 12780,
3586 2540,
3587 10732,
3588 6636,
3589 14828,
3590 1516,
3591 9708,
3592 5612,
3593 13804,
3594 3564,
3595 11756,
3596 7660,
3597 15852,
3598 1004,
3599 9196,
3600 5100,
3601 13292,
3602 3052,
3603 11244,
3604 7148,
3605 15340,
3606 2028,
3607 10220,
3608 6124,
3609 14316,
3610 4076,
3611 12268,
3612 8172,
3613 16364,
3614 28,
3615 8220,
3616 4124,
3617 12316,
3618 2076,
3619 10268,
3620 6172,
3621 14364,
3622 1052,
3623 9244,
3624 5148,
3625 13340,
3626 3100,
3627 11292,
3628 7196,
3629 15388,
3630 540,
3631 8732,
3632 4636,
3633 12828,
3634 2588,
3635 10780,
3636 6684,
3637 14876,
3638 1564,
3639 9756,
3640 5660,
3641 13852,
3642 3612,
3643 11804,
3644 7708,
3645 15900,
3646 284,
3647 8476,
3648 4380,
3649 12572,
3650 2332,
3651 10524,
3652 6428,
3653 14620,
3654 1308,
3655 9500,
3656 5404,
3657 13596,
3658 3356,
3659 11548,
3660 7452,
3661 15644,
3662 796,
3663 8988,
3664 4892,
3665 13084,
3666 2844,
3667 11036,
3668 6940,
3669 15132,
3670 1820,
3671 10012,
3672 5916,
3673 14108,
3674 3868,
3675 12060,
3676 7964,
3677 16156,
3678 156,
3679 8348,
3680 4252,
3681 12444,
3682 2204,
3683 10396,
3684 6300,
3685 14492,
3686 1180,
3687 9372,
3688 5276,
3689 13468,
3690 3228,
3691 11420,
3692 7324,
3693 15516,
3694 668,
3695 8860,
3696 4764,
3697 12956,
3698 2716,
3699 10908,
3700 6812,
3701 15004,
3702 1692,
3703 9884,
3704 5788,
3705 13980,
3706 3740,
3707 11932,
3708 7836,
3709 16028,
3710 412,
3711 8604,
3712 4508,
3713 12700,
3714 2460,
3715 10652,
3716 6556,
3717 14748,
3718 1436,
3719 9628,
3720 5532,
3721 13724,
3722 3484,
3723 11676,
3724 7580,
3725 15772,
3726 924,
3727 9116,
3728 5020,
3729 13212,
3730 2972,
3731 11164,
3732 7068,
3733 15260,
3734 1948,
3735 10140,
3736 6044,
3737 14236,
3738 3996,
3739 12188,
3740 8092,
3741 16284,
3742 92,
3743 8284,
3744 4188,
3745 12380,
3746 2140,
3747 10332,
3748 6236,
3749 14428,
3750 1116,
3751 9308,
3752 5212,
3753 13404,
3754 3164,
3755 11356,
3756 7260,
3757 15452,
3758 604,
3759 8796,
3760 4700,
3761 12892,
3762 2652,
3763 10844,
3764 6748,
3765 14940,
3766 1628,
3767 9820,
3768 5724,
3769 13916,
3770 3676,
3771 11868,
3772 7772,
3773 15964,
3774 348,
3775 8540,
3776 4444,
3777 12636,
3778 2396,
3779 10588,
3780 6492,
3781 14684,
3782 1372,
3783 9564,
3784 5468,
3785 13660,
3786 3420,
3787 11612,
3788 7516,
3789 15708,
3790 860,
3791 9052,
3792 4956,
3793 13148,
3794 2908,
3795 11100,
3796 7004,
3797 15196,
3798 1884,
3799 10076,
3800 5980,
3801 14172,
3802 3932,
3803 12124,
3804 8028,
3805 16220,
3806 220,
3807 8412,
3808 4316,
3809 12508,
3810 2268,
3811 10460,
3812 6364,
3813 14556,
3814 1244,
3815 9436,
3816 5340,
3817 13532,
3818 3292,
3819 11484,
3820 7388,
3821 15580,
3822 732,
3823 8924,
3824 4828,
3825 13020,
3826 2780,
3827 10972,
3828 6876,
3829 15068,
3830 1756,
3831 9948,
3832 5852,
3833 14044,
3834 3804,
3835 11996,
3836 7900,
3837 16092,
3838 476,
3839 8668,
3840 4572,
3841 12764,
3842 2524,
3843 10716,
3844 6620,
3845 14812,
3846 1500,
3847 9692,
3848 5596,
3849 13788,
3850 3548,
3851 11740,
3852 7644,
3853 15836,
3854 988,
3855 9180,
3856 5084,
3857 13276,
3858 3036,
3859 11228,
3860 7132,
3861 15324,
3862 2012,
3863 10204,
3864 6108,
3865 14300,
3866 4060,
3867 12252,
3868 8156,
3869 16348,
3870 60,
3871 8252,
3872 4156,
3873 12348,
3874 2108,
3875 10300,
3876 6204,
3877 14396,
3878 1084,
3879 9276,
3880 5180,
3881 13372,
3882 3132,
3883 11324,
3884 7228,
3885 15420,
3886 572,
3887 8764,
3888 4668,
3889 12860,
3890 2620,
3891 10812,
3892 6716,
3893 14908,
3894 1596,
3895 9788,
3896 5692,
3897 13884,
3898 3644,
3899 11836,
3900 7740,
3901 15932,
3902 316,
3903 8508,
3904 4412,
3905 12604,
3906 2364,
3907 10556,
3908 6460,
3909 14652,
3910 1340,
3911 9532,
3912 5436,
3913 13628,
3914 3388,
3915 11580,
3916 7484,
3917 15676,
3918 828,
3919 9020,
3920 4924,
3921 13116,
3922 2876,
3923 11068,
3924 6972,
3925 15164,
3926 1852,
3927 10044,
3928 5948,
3929 14140,
3930 3900,
3931 12092,
3932 7996,
3933 16188,
3934 188,
3935 8380,
3936 4284,
3937 12476,
3938 2236,
3939 10428,
3940 6332,
3941 14524,
3942 1212,
3943 9404,
3944 5308,
3945 13500,
3946 3260,
3947 11452,
3948 7356,
3949 15548,
3950 700,
3951 8892,
3952 4796,
3953 12988,
3954 2748,
3955 10940,
3956 6844,
3957 15036,
3958 1724,
3959 9916,
3960 5820,
3961 14012,
3962 3772,
3963 11964,
3964 7868,
3965 16060,
3966 444,
3967 8636,
3968 4540,
3969 12732,
3970 2492,
3971 10684,
3972 6588,
3973 14780,
3974 1468,
3975 9660,
3976 5564,
3977 13756,
3978 3516,
3979 11708,
3980 7612,
3981 15804,
3982 956,
3983 9148,
3984 5052,
3985 13244,
3986 3004,
3987 11196,
3988 7100,
3989 15292,
3990 1980,
3991 10172,
3992 6076,
3993 14268,
3994 4028,
3995 12220,
3996 8124,
3997 16316,
3998 124,
3999 8316,
4000 4220,
4001 12412,
4002 2172,
4003 10364,
4004 6268,
4005 14460,
4006 1148,
4007 9340,
4008 5244,
4009 13436,
4010 3196,
4011 11388,
4012 7292,
4013 15484,
4014 636,
4015 8828,
4016 4732,
4017 12924,
4018 2684,
4019 10876,
4020 6780,
4021 14972,
4022 1660,
4023 9852,
4024 5756,
4025 13948,
4026 3708,
4027 11900,
4028 7804,
4029 15996,
4030 380,
4031 8572,
4032 4476,
4033 12668,
4034 2428,
4035 10620,
4036 6524,
4037 14716,
4038 1404,
4039 9596,
4040 5500,
4041 13692,
4042 3452,
4043 11644,
4044 7548,
4045 15740,
4046 892,
4047 9084,
4048 4988,
4049 13180,
4050 2940,
4051 11132,
4052 7036,
4053 15228,
4054 1916,
4055 10108,
4056 6012,
4057 14204,
4058 3964,
4059 12156,
4060 8060,
4061 16252,
4062 252,
4063 8444,
4064 4348,
4065 12540,
4066 2300,
4067 10492,
4068 6396,
4069 14588,
4070 1276,
4071 9468,
4072 5372,
4073 13564,
4074 3324,
4075 11516,
4076 7420,
4077 15612,
4078 764,
4079 8956,
4080 4860,
4081 13052,
4082 2812,
4083 11004,
4084 6908,
4085 15100,
4086 1788,
4087 9980,
4088 5884,
4089 14076,
4090 3836,
4091 12028,
4092 7932,
4093 16124,
4094 508,
4095 8700,
4096 4604,
4097 12796,
4098 2556,
4099 10748,
4100 6652,
4101 14844,
4102 1532,
4103 9724,
4104 5628,
4105 13820,
4106 3580,
4107 11772,
4108 7676,
4109 15868,
4110 1020,
4111 9212,
4112 5116,
4113 13308,
4114 3068,
4115 11260,
4116 7164,
4117 15356,
4118 2044,
4119 10236,
4120 6140,
4121 14332,
4122 4092,
4123 12284,
4124 8188,
4125 16380,
4126 2,
4127 8194,
4128 4098,
4129 12290,
4130 2050,
4131 10242,
4132 6146,
4133 14338,
4134 1026,
4135 9218,
4136 5122,
4137 13314,
4138 3074,
4139 11266,
4140 7170,
4141 15362,
4142 514,
4143 8706,
4144 4610,
4145 12802,
4146 2562,
4147 10754,
4148 6658,
4149 14850,
4150 1538,
4151 9730,
4152 5634,
4153 13826,
4154 3586,
4155 11778,
4156 7682,
4157 15874,
4158 258,
4159 8450,
4160 4354,
4161 12546,
4162 2306,
4163 10498,
4164 6402,
4165 14594,
4166 1282,
4167 9474,
4168 5378,
4169 13570,
4170 3330,
4171 11522,
4172 7426,
4173 15618,
4174 770,
4175 8962,
4176 4866,
4177 13058,
4178 2818,
4179 11010,
4180 6914,
4181 15106,
4182 1794,
4183 9986,
4184 5890,
4185 14082,
4186 3842,
4187 12034,
4188 7938,
4189 16130,
4190 130,
4191 8322,
4192 4226,
4193 12418,
4194 2178,
4195 10370,
4196 6274,
4197 14466,
4198 1154,
4199 9346,
4200 5250,
4201 13442,
4202 3202,
4203 11394,
4204 7298,
4205 15490,
4206 642,
4207 8834,
4208 4738,
4209 12930,
4210 2690,
4211 10882,
4212 6786,
4213 14978,
4214 1666,
4215 9858,
4216 5762,
4217 13954,
4218 3714,
4219 11906,
4220 7810,
4221 16002,
4222 386,
4223 8578,
4224 4482,
4225 12674,
4226 2434,
4227 10626,
4228 6530,
4229 14722,
4230 1410,
4231 9602,
4232 5506,
4233 13698,
4234 3458,
4235 11650,
4236 7554,
4237 15746,
4238 898,
4239 9090,
4240 4994,
4241 13186,
4242 2946,
4243 11138,
4244 7042,
4245 15234,
4246 1922,
4247 10114,
4248 6018,
4249 14210,
4250 3970,
4251 12162,
4252 8066,
4253 16258,
4254 66,
4255 8258,
4256 4162,
4257 12354,
4258 2114,
4259 10306,
4260 6210,
4261 14402,
4262 1090,
4263 9282,
4264 5186,
4265 13378,
4266 3138,
4267 11330,
4268 7234,
4269 15426,
4270 578,
4271 8770,
4272 4674,
4273 12866,
4274 2626,
4275 10818,
4276 6722,
4277 14914,
4278 1602,
4279 9794,
4280 5698,
4281 13890,
4282 3650,
4283 11842,
4284 7746,
4285 15938,
4286 322,
4287 8514,
4288 4418,
4289 12610,
4290 2370,
4291 10562,
4292 6466,
4293 14658,
4294 1346,
4295 9538,
4296 5442,
4297 13634,
4298 3394,
4299 11586,
4300 7490,
4301 15682,
4302 834,
4303 9026,
4304 4930,
4305 13122,
4306 2882,
4307 11074,
4308 6978,
4309 15170,
4310 1858,
4311 10050,
4312 5954,
4313 14146,
4314 3906,
4315 12098,
4316 8002,
4317 16194,
4318 194,
4319 8386,
4320 4290,
4321 12482,
4322 2242,
4323 10434,
4324 6338,
4325 14530,
4326 1218,
4327 9410,
4328 5314,
4329 13506,
4330 3266,
4331 11458,
4332 7362,
4333 15554,
4334 706,
4335 8898,
4336 4802,
4337 12994,
4338 2754,
4339 10946,
4340 6850,
4341 15042,
4342 1730,
4343 9922,
4344 5826,
4345 14018,
4346 3778,
4347 11970,
4348 7874,
4349 16066,
4350 450,
4351 8642,
4352 4546,
4353 12738,
4354 2498,
4355 10690,
4356 6594,
4357 14786,
4358 1474,
4359 9666,
4360 5570,
4361 13762,
4362 3522,
4363 11714,
4364 7618,
4365 15810,
4366 962,
4367 9154,
4368 5058,
4369 13250,
4370 3010,
4371 11202,
4372 7106,
4373 15298,
4374 1986,
4375 10178,
4376 6082,
4377 14274,
4378 4034,
4379 12226,
4380 8130,
4381 16322,
4382 34,
4383 8226,
4384 4130,
4385 12322,
4386 2082,
4387 10274,
4388 6178,
4389 14370,
4390 1058,
4391 9250,
4392 5154,
4393 13346,
4394 3106,
4395 11298,
4396 7202,
4397 15394,
4398 546,
4399 8738,
4400 4642,
4401 12834,
4402 2594,
4403 10786,
4404 6690,
4405 14882,
4406 1570,
4407 9762,
4408 5666,
4409 13858,
4410 3618,
4411 11810,
4412 7714,
4413 15906,
4414 290,
4415 8482,
4416 4386,
4417 12578,
4418 2338,
4419 10530,
4420 6434,
4421 14626,
4422 1314,
4423 9506,
4424 5410,
4425 13602,
4426 3362,
4427 11554,
4428 7458,
4429 15650,
4430 802,
4431 8994,
4432 4898,
4433 13090,
4434 2850,
4435 11042,
4436 6946,
4437 15138,
4438 1826,
4439 10018,
4440 5922,
4441 14114,
4442 3874,
4443 12066,
4444 7970,
4445 16162,
4446 162,
4447 8354,
4448 4258,
4449 12450,
4450 2210,
4451 10402,
4452 6306,
4453 14498,
4454 1186,
4455 9378,
4456 5282,
4457 13474,
4458 3234,
4459 11426,
4460 7330,
4461 15522,
4462 674,
4463 8866,
4464 4770,
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16222 191,
16223 8383,
16224 4287,
16225 12479,
16226 2239,
16227 10431,
16228 6335,
16229 14527,
16230 1215,
16231 9407,
16232 5311,
16233 13503,
16234 3263,
16235 11455,
16236 7359,
16237 15551,
16238 703,
16239 8895,
16240 4799,
16241 12991,
16242 2751,
16243 10943,
16244 6847,
16245 15039,
16246 1727,
16247 9919,
16248 5823,
16249 14015,
16250 3775,
16251 11967,
16252 7871,
16253 16063,
16254 447,
16255 8639,
16256 4543,
16257 12735,
16258 2495,
16259 10687,
16260 6591,
16261 14783,
16262 1471,
16263 9663,
16264 5567,
16265 13759,
16266 3519,
16267 11711,
16268 7615,
16269 15807,
16270 959,
16271 9151,
16272 5055,
16273 13247,
16274 3007,
16275 11199,
16276 7103,
16277 15295,
16278 1983,
16279 10175,
16280 6079,
16281 14271,
16282 4031,
16283 12223,
16284 8127,
16285 16319,
16286 127,
16287 8319,
16288 4223,
16289 12415,
16290 2175,
16291 10367,
16292 6271,
16293 14463,
16294 1151,
16295 9343,
16296 5247,
16297 13439,
16298 3199,
16299 11391,
16300 7295,
16301 15487,
16302 639,
16303 8831,
16304 4735,
16305 12927,
16306 2687,
16307 10879,
16308 6783,
16309 14975,
16310 1663,
16311 9855,
16312 5759,
16313 13951,
16314 3711,
16315 11903,
16316 7807,
16317 15999,
16318 383,
16319 8575,
16320 4479,
16321 12671,
16322 2431,
16323 10623,
16324 6527,
16325 14719,
16326 1407,
16327 9599,
16328 5503,
16329 13695,
16330 3455,
16331 11647,
16332 7551,
16333 15743,
16334 895,
16335 9087,
16336 4991,
16337 13183,
16338 2943,
16339 11135,
16340 7039,
16341 15231,
16342 1919,
16343 10111,
16344 6015,
16345 14207,
16346 3967,
16347 12159,
16348 8063,
16349 16255,
16350 255,
16351 8447,
16352 4351,
16353 12543,
16354 2303,
16355 10495,
16356 6399,
16357 14591,
16358 1279,
16359 9471,
16360 5375,
16361 13567,
16362 3327,
16363 11519,
16364 7423,
16365 15615,
16366 767,
16367 8959,
16368 4863,
16369 13055,
16370 2815,
16371 11007,
16372 6911,
16373 15103,
16374 1791,
16375 9983,
16376 5887,
16377 14079,
16378 3839,
16379 12031,
16380 7935,
16381 16127,
16382 511,
16383 8703,
16384 4607,
16385 12799,
16386 2559,
16387 10751,
16388 6655,
16389 14847,
16390 1535,
16391 9727,
16392 5631,
16393 13823,
16394 3583,
16395 11775,
16396 7679,
16397 15871,
16398 1023,
16399 9215,
16400 5119,
16401 13311,
16402 3071,
16403 11263,
16404 7167,
16405 15359,
16406 2047,
16407 10239,
16408 6143,
16409 14335,
16410 4095,
16411 12287,
16412 8191,
16413 16383,
16414 };
16415 /*lint +e915*/
Ifx_g_FftF32_bitReverseTable
CONST_CFG unsigned short Ifx_g_FftF32_bitReverseTable[IFX_FFTF32_MAX_LENGTH]
Definition: Ifx_FftF32_BitReverseTable.c:29
IFX_FFTF32_MAX_LENGTH
#define IFX_FFTF32_MAX_LENGTH
Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...
Definition: Ifx_FftF32.h:43
Ifx_FftF32.h
Floating-point Fast Fourier Transform.
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:40


iLLD_TC26B: Ifx_FftF32_TwiddleTable.c Source File

Service

CpuGeneric

SysSe

Math

Ifx_FftF32_TwiddleTable.c

Go to the documentation of this file.

1 /**

2 * \file Ifx_FftF32_TwiddleTable.c

3 * \brief Floating-point Fast Fourier Transform Twiddle-Factors

4 *

5 *

6 * \version disabled

7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.

8 *

9 *

10 * IMPORTANT NOTICE

11 *

12 *

13 * Infineon Technologies AG (Infineon) is supplying this file for use

14 * exclusively with Infineon's microcontroller products. This file can be freely

15 * distributed within development tools that are supporting such microcontroller

16 * products.

17 *

18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED

19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF

20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.

21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,

22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

23 *

24 */

25

26 #include "Ifx_FftF32.h"

27

28 /*lint -e915*/

29 IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH / 2] = {

30 {_DATAF(1.00000000000000000000), _DATAF(-0.00000000000000000000)},

31 {_DATAF(0.99999994039535522000), _DATAF(-0.00038349517853930593)},

32 {_DATAF(0.99999970197677612000), _DATAF(-0.00076699029887095094)},

33 {_DATAF(0.99999934434890747000), _DATAF(-0.00115048536099493500)},

34 {_DATAF(0.99999880790710449000), _DATAF(-0.00153398013208061460)},

35 {_DATAF(0.99999815225601196000), _DATAF(-0.00191747478675097230)},

36 {_DATAF(0.99999737739562988000), _DATAF(-0.00230096909217536450)},

37 {_DATAF(0.99999642372131348000), _DATAF(-0.00268446304835379120)},

38 {_DATAF(0.99999529123306274000), _DATAF(-0.00306795677170157430)},

39 {_DATAF(0.99999403953552246000), _DATAF(-0.00345145002938807010)},

40 {_DATAF(0.99999266862869263000), _DATAF(-0.00383494258858263490)},

41 {_DATAF(0.99999111890792847000), _DATAF(-0.00421843444928526880)},

42 {_DATAF(0.99998939037322998000), _DATAF(-0.00460192607715725900)},

43 {_DATAF(0.99998760223388672000), _DATAF(-0.00498541677370667460)},

44 {_DATAF(0.99998557567596436000), _DATAF(-0.00536890700459480290)},

45 {_DATAF(0.99998342990875244000), _DATAF(-0.00575239630416035650)},

46 {_DATAF(0.99998116493225098000), _DATAF(-0.00613588467240333560)},

47 {_DATAF(0.99997872114181519000), _DATAF(-0.00651937210932374000)},

48 {_DATAF(0.99997615814208984000), _DATAF(-0.00690285861492156980)},

49 {_DATAF(0.99997347593307495000), _DATAF(-0.00728634418919682500)},

50 {_DATAF(0.99997061491012573000), _DATAF(-0.00766982883214950560)},

51 {_DATAF(0.99996757507324219000), _DATAF(-0.00805331207811832430)},

52 {_DATAF(0.99996441602706909000), _DATAF(-0.00843679439276456830)},

53 {_DATAF(0.99996107816696167000), _DATAF(-0.00882027484476566310)},

54 {_DATAF(0.99995762109756470000), _DATAF(-0.00920375436544418330)},

55 {_DATAF(0.99995404481887817000), _DATAF(-0.00958723295480012890)},

56 {_DATAF(0.99995028972625732000), _DATAF(-0.00997070968151092530)},

57 {_DATAF(0.99994641542434692000), _DATAF(-0.01035418547689914700)},

58 {_DATAF(0.99994236230850220000), _DATAF(-0.01073765940964222000)},

59 {_DATAF(0.99993813037872314000), _DATAF(-0.01112113147974014300)},

60 {_DATAF(0.99993383884429932000), _DATAF(-0.01150460168719291700)},

61 {_DATAF(0.99992930889129639000), _DATAF(-0.01188807096332311600)},

62 {_DATAF(0.99992471933364868000), _DATAF(-0.01227153837680816700)},

63 {_DATAF(0.99991995096206665000), _DATAF(-0.01265500392764806700)},

64 {_DATAF(0.99991500377655029000), _DATAF(-0.01303846761584281900)},

65 {_DATAF(0.99990993738174438000), _DATAF(-0.01342192851006984700)},

66 {_DATAF(0.99990469217300415000), _DATAF(-0.01380538847297430000)},

67 {_DATAF(0.99989932775497437000), _DATAF(-0.01418884657323360400)},

68 {_DATAF(0.99989384412765503000), _DATAF(-0.01457230187952518500)},

69 {_DATAF(0.99988818168640137000), _DATAF(-0.01495575532317161600)},

70 {_DATAF(0.99988234043121338000), _DATAF(-0.01533920597285032300)},

71 {_DATAF(0.99987637996673584000), _DATAF(-0.01572265475988388100)},

72 {_DATAF(0.99987030029296875000), _DATAF(-0.01610610261559486400)},

73 {_DATAF(0.99986404180526733000), _DATAF(-0.01648954674601554900)},

74 {_DATAF(0.99985766410827637000), _DATAF(-0.01687298715114593500)},

75 {_DATAF(0.99985110759735107000), _DATAF(-0.01725642755627632100)},

76 {_DATAF(0.99984443187713623000), _DATAF(-0.01763986423611640900)},

77 {_DATAF(0.99983757734298706000), _DATAF(-0.01802329905331134800)},

78 {_DATAF(0.99983060359954834000), _DATAF(-0.01840673014521598800)},

79 {_DATAF(0.99982345104217529000), _DATAF(-0.01879015937447547900)},

80 {_DATAF(0.99981617927551270000), _DATAF(-0.01917358487844467200)},

81 {_DATAF(0.99980872869491577000), _DATAF(-0.01955700851976871500)},

82 {_DATAF(0.99980115890502930000), _DATAF(-0.01994042843580246000)},

83 {_DATAF(0.99979346990585327000), _DATAF(-0.02032384648919105500)},

84 {_DATAF(0.99978560209274292000), _DATAF(-0.02070726081728935200)},

85 {_DATAF(0.99977755546569824000), _DATAF(-0.02109067142009735100)},

86 {_DATAF(0.99976938962936401000), _DATAF(-0.02147408016026020100)},

87 {_DATAF(0.99976110458374023000), _DATAF(-0.02185748517513275100)},

88 {_DATAF(0.99975264072418213000), _DATAF(-0.02224088832736015300)},

89 {_DATAF(0.99974405765533447000), _DATAF(-0.02262428589165210700)},

90 {_DATAF(0.99973529577255249000), _DATAF(-0.02300768159329891200)},

91 {_DATAF(0.99972641468048096000), _DATAF(-0.02339107356965541800)},

92 {_DATAF(0.99971735477447510000), _DATAF(-0.02377446182072162600)},

93 {_DATAF(0.99970817565917969000), _DATAF(-0.02415784634649753600)},

94 {_DATAF(0.99969881772994995000), _DATAF(-0.02454122900962829600)},

95 {_DATAF(0.99968934059143066000), _DATAF(-0.02492460608482360800)},

96 {_DATAF(0.99967968463897705000), _DATAF(-0.02530798129737377200)},

97 {_DATAF(0.99966990947723389000), _DATAF(-0.02569135092198848700)},

98 {_DATAF(0.99966001510620117000), _DATAF(-0.02607471868395805400)},

99 {_DATAF(0.99964994192123413000), _DATAF(-0.02645808085799217200)},

100 {_DATAF(0.99963968992233276000), _DATAF(-0.02684143930673599200)},

101 {_DATAF(0.99962931871414185000), _DATAF(-0.02722479403018951400)},

102 {_DATAF(0.99961882829666138000), _DATAF(-0.02760814502835273700)},

103 {_DATAF(0.99960815906524658000), _DATAF(-0.02799149230122566200)},

104 {_DATAF(0.99959737062454224000), _DATAF(-0.02837483584880828900)},

105 {_DATAF(0.99958640336990356000), _DATAF(-0.02875817380845546700)},

106 {_DATAF(0.99957531690597534000), _DATAF(-0.02914150804281234700)},

107 {_DATAF(0.99956405162811279000), _DATAF(-0.02952483855187892900)},

108 {_DATAF(0.99955266714096069000), _DATAF(-0.02990816533565521200)},

109 {_DATAF(0.99954110383987427000), _DATAF(-0.03029148653149604800)},

110 {_DATAF(0.99952942132949829000), _DATAF(-0.03067480400204658500)},

111 {_DATAF(0.99951756000518799000), _DATAF(-0.03105811588466167400)},

112 {_DATAF(0.99950557947158813000), _DATAF(-0.03144142404198646500)},

113 {_DATAF(0.99949347972869873000), _DATAF(-0.03182472661137580900)},

114 {_DATAF(0.99948120117187500000), _DATAF(-0.03220802545547485400)},

115 {_DATAF(0.99946874380111694000), _DATAF(-0.03259132057428360000)},

116 {_DATAF(0.99945616722106934000), _DATAF(-0.03297460824251174900)},

117 {_DATAF(0.99944347143173218000), _DATAF(-0.03335789218544960000)},

118 {_DATAF(0.99943059682846069000), _DATAF(-0.03374117240309715300)},

119 {_DATAF(0.99941760301589966000), _DATAF(-0.03412444517016410800)},

120 {_DATAF(0.99940443038940430000), _DATAF(-0.03450771421194076500)},

121 {_DATAF(0.99939113855361938000), _DATAF(-0.03489097952842712400)},

122 {_DATAF(0.99937766790390015000), _DATAF(-0.03527423739433288600)},

123 {_DATAF(0.99936407804489136000), _DATAF(-0.03565749153494834900)},

124 {_DATAF(0.99935030937194824000), _DATAF(-0.03604074195027351400)},

125 {_DATAF(0.99933642148971558000), _DATAF(-0.03642398491501808200)},

126 {_DATAF(0.99932235479354858000), _DATAF(-0.03680722415447235100)},

127 {_DATAF(0.99930816888809204000), _DATAF(-0.03719045594334602400)},

128 {_DATAF(0.99929386377334595000), _DATAF(-0.03757368400692939800)},

129 {_DATAF(0.99927937984466553000), _DATAF(-0.03795690461993217500)},

130 {_DATAF(0.99926477670669556000), _DATAF(-0.03834012150764465300)},

131 {_DATAF(0.99924999475479126000), _DATAF(-0.03872333094477653500)},

132 {_DATAF(0.99923503398895264000), _DATAF(-0.03910653665661811800)},

133 {_DATAF(0.99921995401382446000), _DATAF(-0.03948973491787910500)},

134 {_DATAF(0.99920475482940674000), _DATAF(-0.03987292572855949400)},

135 {_DATAF(0.99918937683105469000), _DATAF(-0.04025611653923988300)},

136 {_DATAF(0.99917387962341309000), _DATAF(-0.04063929617404937700)},

137 {_DATAF(0.99915820360183716000), _DATAF(-0.04102247208356857300)},

138 {_DATAF(0.99914240837097168000), _DATAF(-0.04140564054250717200)},

139 {_DATAF(0.99912649393081665000), _DATAF(-0.04178880527615547200)},

140 {_DATAF(0.99911034107208252000), _DATAF(-0.04217196255922317500)},

141 {_DATAF(0.99909412860870361000), _DATAF(-0.04255511239171028100)},

142 {_DATAF(0.99907773733139038000), _DATAF(-0.04293825849890708900)},

143 {_DATAF(0.99906116724014282000), _DATAF(-0.04332139343023300200)},

144 {_DATAF(0.99904447793960571000), _DATAF(-0.04370452836155891400)},

145 {_DATAF(0.99902766942977905000), _DATAF(-0.04408765211701393100)},

146 {_DATAF(0.99901068210601807000), _DATAF(-0.04447077214717865000)},

147 {_DATAF(0.99899357557296753000), _DATAF(-0.04485388472676277200)},

148 {_DATAF(0.99897629022598267000), _DATAF(-0.04523698985576629600)},

149 {_DATAF(0.99895888566970825000), _DATAF(-0.04562009125947952300)},

150 {_DATAF(0.99894130229949951000), _DATAF(-0.04600318148732185400)},

151 {_DATAF(0.99892359972000122000), _DATAF(-0.04638626798987388600)},

152 {_DATAF(0.99890571832656860000), _DATAF(-0.04676934704184532200)},

153 {_DATAF(0.99888771772384644000), _DATAF(-0.04715241864323616000)},

154 {_DATAF(0.99886953830718994000), _DATAF(-0.04753548279404640200)},

155 {_DATAF(0.99885123968124390000), _DATAF(-0.04791854321956634500)},

156 {_DATAF(0.99883282184600830000), _DATAF(-0.04830159246921539300)},

157 {_DATAF(0.99881422519683838000), _DATAF(-0.04868463799357414200)},

158 {_DATAF(0.99879544973373413000), _DATAF(-0.04906767606735229500)},

159 {_DATAF(0.99877655506134033000), _DATAF(-0.04945070296525955200)},

160 {_DATAF(0.99875754117965698000), _DATAF(-0.04983372613787651100)},

161 {_DATAF(0.99873834848403931000), _DATAF(-0.05021674185991287200)},

162 {_DATAF(0.99871903657913208000), _DATAF(-0.05059975013136863700)},

163 {_DATAF(0.99869954586029053000), _DATAF(-0.05098275095224380500)},

164 {_DATAF(0.99867993593215942000), _DATAF(-0.05136574059724807700)},

165 {_DATAF(0.99866014719009399000), _DATAF(-0.05174872651696205100)},

166 {_DATAF(0.99864023923873901000), _DATAF(-0.05213170498609542800)},

167 {_DATAF(0.99862015247344971000), _DATAF(-0.05251467600464820900)},

168 {_DATAF(0.99859994649887085000), _DATAF(-0.05289763584733009300)},

169 {_DATAF(0.99857956171035767000), _DATAF(-0.05328059196472168000)},

170 {_DATAF(0.99855905771255493000), _DATAF(-0.05366353690624237100)},

171 {_DATAF(0.99853843450546265000), _DATAF(-0.05404647812247276300)},

172 {_DATAF(0.99851763248443604000), _DATAF(-0.05442940816283226000)},

173 {_DATAF(0.99849665164947510000), _DATAF(-0.05481233075261116000)},

174 {_DATAF(0.99847555160522461000), _DATAF(-0.05519524589180946400)},

175 {_DATAF(0.99845433235168457000), _DATAF(-0.05557814985513687100)},

176 {_DATAF(0.99843293428421021000), _DATAF(-0.05596105009317398100)},

177 {_DATAF(0.99841141700744629000), _DATAF(-0.05634393915534019500)},

178 {_DATAF(0.99838972091674805000), _DATAF(-0.05672682076692581200)},

179 {_DATAF(0.99836790561676025000), _DATAF(-0.05710969492793083200)},

180 {_DATAF(0.99834591150283813000), _DATAF(-0.05749255791306495700)},

181 {_DATAF(0.99832379817962646000), _DATAF(-0.05787541717290878300)},

182 {_DATAF(0.99830156564712524000), _DATAF(-0.05825826525688171400)},

183 {_DATAF(0.99827915430068970000), _DATAF(-0.05864110589027404800)},

184 {_DATAF(0.99825656414031982000), _DATAF(-0.05902393534779548600)},

185 {_DATAF(0.99823385477066040000), _DATAF(-0.05940675735473632800)},

186 {_DATAF(0.99821102619171143000), _DATAF(-0.05978957191109657300)},

187 {_DATAF(0.99818801879882813000), _DATAF(-0.06017237529158592200)},

188 {_DATAF(0.99816483259201050000), _DATAF(-0.06055517122149467500)},

189 {_DATAF(0.99814152717590332000), _DATAF(-0.06093795970082283000)},

190 {_DATAF(0.99811810255050659000), _DATAF(-0.06132073700428009000)},

191 {_DATAF(0.99809449911117554000), _DATAF(-0.06170350685715675400)},

192 {_DATAF(0.99807077646255493000), _DATAF(-0.06208626553416252100)},

193 {_DATAF(0.99804687500000000000), _DATAF(-0.06246901676058769200)},

194 {_DATAF(0.99802285432815552000), _DATAF(-0.06285175681114196800)},

195 {_DATAF(0.99799871444702148000), _DATAF(-0.06323449313640594500)},

196 {_DATAF(0.99797439575195313000), _DATAF(-0.06361721456050872800)},

197 {_DATAF(0.99794989824295044000), _DATAF(-0.06399992853403091400)},

198 {_DATAF(0.99792528152465820000), _DATAF(-0.06438262760639190700)},

199 {_DATAF(0.99790054559707642000), _DATAF(-0.06476532667875289900)},

200 {_DATAF(0.99787563085556030000), _DATAF(-0.06514801084995269800)},

201 {_DATAF(0.99785053730010986000), _DATAF(-0.06553068757057189900)},

202 {_DATAF(0.99782532453536987000), _DATAF(-0.06591334939002990700)},

203 {_DATAF(0.99779999256134033000), _DATAF(-0.06629601120948791500)},

204 {_DATAF(0.99777448177337646000), _DATAF(-0.06667865812778472900)},

205 {_DATAF(0.99774885177612305000), _DATAF(-0.06706129014492034900)},

206 {_DATAF(0.99772304296493530000), _DATAF(-0.06744392216205596900)},

207 {_DATAF(0.99769711494445801000), _DATAF(-0.06782653927803039600)},

208 {_DATAF(0.99767106771469116000), _DATAF(-0.06820914149284362800)},

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8215 {_DATAF(-0.99999642372131348000), _DATAF(-0.00268446304835379120)},

8216 {_DATAF(-0.99999737739562988000), _DATAF(-0.00230096909217536450)},

8217 {_DATAF(-0.99999815225601196000), _DATAF(-0.00191747478675097230)},

8218 {_DATAF(-0.99999880790710449000), _DATAF(-0.00153398013208061460)},

8219 {_DATAF(-0.99999934434890747000), _DATAF(-0.00115048536099493500)},

8220 {_DATAF(-0.99999970197677612000), _DATAF(-0.00076699029887095094)},

8221 {_DATAF(-0.99999994039535522000), _DATAF(-0.00038349517853930593)},

8222 };

8223 /*lint +e915*/

Ifx_g_FftF32_twiddleTable

IFX_CONST cfloat32 Ifx_g_FftF32_twiddleTable[IFX_FFTF32_MAX_LENGTH/2]

Definition: Ifx_FftF32_TwiddleTable.c:29

IFX_CONST

#define IFX_CONST

Definition: Compilers.h:37

cfloat32

Definition: Ifx_Types.h:41

IFX_FFTF32_MAX_LENGTH

#define IFX_FFTF32_MAX_LENGTH

Maximum FFT length. If redefined, then Ifx_g_FftF32_bitReverseTable and Ifx_g_FftF32_twiddleTable sha...

Definition: Ifx_FftF32.h:43

Ifx_FftF32.h

Floating-point Fast Fourier Transform.

_DATAF

#define _DATAF(val)

Definition: Ifx_Cf32.h:34


iLLD_TC26B: Ifx_Fifo.c Source File

  • _Lib
  • DataHandling
Ifx_Fifo.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Fifo.c
3 * \brief FIFO functions
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 //------------------------------------------------------------------------------
26 #include "Ifx_Fifo.h"
27 #include <stdlib.h>
28 #include "Ifx_CircularBuffer.h"
29 #include "_Utilities/Ifx_Assert.h"
30 #include "Cpu/Std/IfxCpu.h"
31 #include "SysSe/Bsp/Bsp.h"
32 //------------------------------------------------------------------------------
33 /*
34 * Note: the fifo function can be used to exchange data between the main task and interrupts:
35 * - a mutex using the interrupt enable / disable is implemented to insure
36 * data consitancy
37 * - it is supposed that all access to 8, 16, 32 bit data are atomic and are
38 * therefore not protected by a critical section
39 * - the following is possible
40 * reader(main) -- writer(main)
41 * reader(main) -- writer(interrupt)
42 * reader(interrupt) -- writer(main)
43 * reader(interrupt) -- writer(interrupt)
44 * - Only one reader and one writer are allowed by FIFO, no nested read write
45 * Implementation note: as an interrupt runs at a higher cpu level than the thread
46 * the interrupt is not disabled in the IntfifoXXX() functions
47 * This is valid is an OS is used.
48 *
49 */
50 //------------------------------------------------------------------------------
51 Ifx_Fifo *Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
52 {
53 Ifx_Fifo *fifo = NULL_PTR;
54
55 size = Ifx_AlignOn32(size); /* data transfer is optimised for 32 bit access */
56
57 fifo = malloc(size + sizeof(Ifx_Fifo) + 8); /* +8 because of padding in case the pointer is not aligned on 64 */
58
59 if (IFX_VALIDATE(IFX_VERBOSE_LEVEL_ERROR, (fifo != NULL_PTR)))
60 {
61 fifo = Ifx_Fifo_init(fifo, size, elementSize);
62 }
63
64 return fifo;
65 }
66
67
68 void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
69 {
70 free(fifo);
71 }
72
73
74 Ifx_Fifo *Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
75 {
76 Ifx_Fifo *fifo = NULL_PTR;
77
78 size = Ifx_AlignOn32(size); /* data transfer is optimised for 32 bit access */
79 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, elementSize <= size);
80 /* Check size over maximum FIFO size */
81 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (size <= IFX_SIZET_MAX));
82
83 {
84 fifo = (Ifx_Fifo *)buffer;
85 fifo->eventReader = FALSE;
86 fifo->eventWriter = TRUE;
87 fifo->buffer = (uint8 *)Ifx_AlignOn64(((uint32)fifo) + sizeof(Ifx_Fifo));
88 fifo->shared.count = 0;
89 fifo->shared.maxcount = 0;
90 fifo->shared.readerWaitx = fifo->shared.writerWaitx = 0;
91 fifo->startIndex = fifo->endIndex = 0;
92 fifo->size = size;
93 fifo->elementSize = elementSize;
94 }
95
96 return fifo;
97 }
98
99
100 /**
101 * param: count in bytes
102 */
103 static Ifx_SizeT Ifx_Fifo_beginRead(Ifx_Fifo *fifo, Ifx_SizeT count)
104 {
105 boolean interruptState;
106 Ifx_SizeT blockSize;
107
108 interruptState = IfxCpu_disableInterrupts();
109 blockSize = __min(count, Ifx_Fifo_readCount(fifo));
110 blockSize -= blockSize % fifo->elementSize;
111 fifo->eventReader = FALSE;
112 fifo->shared.readerWaitx = __min(count - blockSize, fifo->size);
113 IfxCpu_restoreInterrupts(interruptState);
114
115 return blockSize;
116 }
117
118
119 boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
120 {
121 boolean result;
122
123 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
124
125 if ((count < fifo->elementSize) || (count > fifo->size))
126 { /* Only complete elements can be read from the buffer */
127 result = FALSE;
128 }
129 else
130 {
131 boolean interruptState;
132 sint32 waitCount;
133 interruptState = IfxCpu_disableInterrupts();
134 waitCount = count - Ifx_Fifo_readCount(fifo);
135
136 if (waitCount <= 0)
137 {
138 fifo->shared.readerWaitx = 0;
139 fifo->eventReader = TRUE;
140 IfxCpu_restoreInterrupts(interruptState);
141 result = TRUE;
142 }
143 else
144 {
145 Ifx_TickTime DeadLine = getDeadLine(timeout);
146 fifo->eventReader = FALSE;
147 fifo->shared.readerWaitx = waitCount;
148 IfxCpu_restoreInterrupts(interruptState);
149
150 while ((fifo->eventReader == FALSE) && (isDeadLine(DeadLine) == FALSE))
151 {}
152 /* After the timeout, the reader is not waiting for any data */
153 fifo->shared.readerWaitx = 0;
154 result = fifo->eventReader == TRUE;
155 }
156 }
157
158 return result;
159 }
160
161
162 /**
163 * param: count in bytes
164 */
165 static Ifx_SizeT Ifx_Fifo_readEnd(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_SizeT blockSize)
166 {
167 boolean interruptState;
168
169 /* Set the shared values */
170 interruptState = IfxCpu_disableInterrupts();
171
172 fifo->shared.count -= blockSize;
173
174 if (fifo->shared.writerWaitx != 0)
175 {
176 fifo->shared.writerWaitx -= blockSize;
177
178 if (fifo->shared.writerWaitx <= 0)
179 {
180 fifo->shared.writerWaitx = 0;
181 fifo->eventWriter = TRUE; /* Signal the writer */
182 }
183 }
184
185 IfxCpu_restoreInterrupts(interruptState);
186
187 return count - blockSize;
188 }
189
190
191 Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
192 {
193 Ifx_TickTime DeadLine;
194 Ifx_SizeT blockSize;
195 Ifx_CircularBuffer buffer;
196 boolean Stop = FALSE;
197
198 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
199 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, data != NULL_PTR);
200
201 if (count != 0)
202 {
203 buffer.base = fifo->buffer;
204 buffer.length = (uint16)fifo->size; /* size always fit into 16 bit */
205 buffer.index = (uint16)fifo->startIndex; /* startIndex always fit into size */
206 DeadLine = getDeadLine(timeout);
207
208 do
209 {
210 blockSize = Ifx_Fifo_beginRead(fifo, count);
211
212 if (blockSize != 0)
213 {
214 /* read element from the buffer */
215 data = Ifx_CircularBuffer_read8(&buffer, data, blockSize);
216 count = Ifx_Fifo_readEnd(fifo, count, blockSize);
217 }
218
219 if ((Stop != FALSE) || (isDeadLine(DeadLine) != FALSE))
220 {
221 /*When exiting, the reader is not waiting for any data */
222 fifo->shared.readerWaitx = 0;
223 break;
224 }
225
226 if (count != 0)
227 {
228 while ((fifo->eventReader == FALSE) && (isDeadLine(DeadLine) == FALSE))
229 {}
230
231 Stop = (fifo->eventReader == FALSE); /* If the function timeout, the maximum number of characters are read before returning */
232 }
233 } while (count != 0);
234
235 fifo->startIndex = buffer.index;
236 }
237
238 return count;
239 }
240
241
242 void Ifx_Fifo_clear(Ifx_Fifo *fifo)
243 {
244 boolean interruptState;
245
246 interruptState = IfxCpu_disableInterrupts();
247
248 if (fifo->shared.writerWaitx != 0)
249 {
250 fifo->shared.writerWaitx = 0;
251 fifo->eventWriter = TRUE; /* Signal the writer */
252 }
253
254 fifo->eventReader = FALSE;
255 fifo->shared.readerWaitx = 0;
256 fifo->shared.count = 0;
257 fifo->shared.maxcount = 0;
258 fifo->startIndex = fifo->endIndex;
259 IfxCpu_restoreInterrupts(interruptState);
260 }
261
262
263 static Ifx_SizeT Ifx_Fifo_beginWrite(Ifx_Fifo *fifo, Ifx_SizeT count)
264 {
265 Ifx_SizeT blockSize;
266 boolean interruptState;
267
268 interruptState = IfxCpu_disableInterrupts();
269 blockSize = __min(count, fifo->size - Ifx_Fifo_readCount(fifo));
270 blockSize -= blockSize % fifo->elementSize;
271 fifo->eventWriter = FALSE;
272 fifo->shared.writerWaitx = __min(count - blockSize, fifo->size);
273 IfxCpu_restoreInterrupts(interruptState);
274
275 return blockSize;
276 }
277
278
279 boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
280 {
281 boolean result;
282
283 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
284
285
286 if ((count < fifo->elementSize) || (count > fifo->size))
287 { /* Only complete elements can be written to the buffer */
288 result = FALSE;
289 }
290
291 else
292 {
293 boolean interruptState;
294 interruptState = IfxCpu_disableInterrupts();
295
296 if ((fifo->size - Ifx_Fifo_readCount(fifo)) >= count)
297 {
298 fifo->shared.writerWaitx = 0;
299 fifo->eventWriter = TRUE;
300 IfxCpu_restoreInterrupts(interruptState);
301 result = TRUE;
302 }
303 else
304 {
305 Ifx_TickTime DeadLine = getDeadLine(timeout);
306 fifo->eventWriter = FALSE;
307 fifo->shared.writerWaitx = __max(0, count - (fifo->size - Ifx_Fifo_readCount(fifo)));
308 IfxCpu_restoreInterrupts(interruptState);
309
310 while ((fifo->eventWriter == FALSE) && (isDeadLine(DeadLine) == FALSE))
311 {}
312 /* After the timeout, the writer is not waiting for any space */
313 fifo->shared.writerWaitx = 0;
314 result = fifo->eventWriter == TRUE;
315 }
316 }
317
318 return result;
319 }
320
321 static Ifx_SizeT Ifx_Fifo_endWrite(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_SizeT blockSize)
322 {
323 boolean interruptState;
324
325 /* Set the shared values */
326 interruptState = IfxCpu_disableInterrupts();
327
328 fifo->shared.count += blockSize;
329 fifo->shared.maxcount = __max(fifo->shared.maxcount, fifo->shared.count); /* Update maximum value */
330
331 if (fifo->shared.readerWaitx != 0)
332 {
333 fifo->shared.readerWaitx -= blockSize;
334
335 if (fifo->shared.readerWaitx <= 0)
336 {
337 fifo->shared.readerWaitx = 0;
338 fifo->eventReader = TRUE; /* Signal the reader - a re-scheduling may occur at this point! */
339 }
340 }
341
342 IfxCpu_restoreInterrupts(interruptState);
343
344 return count - blockSize;
345 }
346
347
348
349 Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
350 {
351 Ifx_TickTime DeadLine;
352 Ifx_SizeT blockSize;
353 Ifx_CircularBuffer buffer;
354 boolean Stop = FALSE;
355
356 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
357 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, data != NULL_PTR);
358
359 if (count != 0)
360 {
361 buffer.base = fifo->buffer;
362 buffer.length = (uint16)fifo->size; /* size always fit into 16 bit */
363 buffer.index = (uint16)fifo->endIndex; /* startIndex always fit into size */
364 DeadLine = getDeadLine(timeout);
365
366 do
367 {
368 blockSize = Ifx_Fifo_beginWrite(fifo, count);
369
370 if (blockSize != 0)
371 {
372 /* write element to the buffer */
373 data = Ifx_CircularBuffer_write8(&buffer, data, blockSize);
374 count = Ifx_Fifo_endWrite(fifo, count, blockSize);
375 }
376
377 if ((Stop != FALSE) || (isDeadLine(DeadLine) != FALSE))
378 {
379 /*When exiting, the writer is not waiting for any space */
380 fifo->shared.writerWaitx = 0;
381 break;
382 }
383
384 if (count != 0)
385 {
386 while ((fifo->eventWriter == FALSE) && (isDeadLine(DeadLine) == FALSE))
387 {}
388
389 Stop = fifo->eventWriter == FALSE; /* If the function timeout, the maximum number of characters are written before returning */
390 }
391 } while (count != 0);
392
393 fifo->endIndex = buffer.index;
394 }
395
396 return count;
397 }
398
399 //------------------------------------------------------------------------------
Ifx_CircularBuffer_write8
const void * Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
Copy count bytes from the data array to the circular buffer.
Definition: Ifx_CircularBuffer.c:122
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:59
_Fifo::buffer
void * buffer
aligned on 64 bit boundary
Definition: Ifx_Fifo.h:55
_Fifo::startIndex
Ifx_SizeT startIndex
buffer valid data start index
Definition: Ifx_Fifo.h:57
Ifx_Fifo_write
Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:349
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
Ifx_Fifo_canReadCount
boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:119
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:80
_Fifo::eventReader
volatile boolean eventReader
event set by the writer to signal the reader that the required data are available in the buffer ...
Definition: Ifx_Fifo.h:61
IFX_SIZET_MAX
#define IFX_SIZET_MAX
Definition: Ifx_Types.h:71
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_AlignOn64
#define Ifx_AlignOn64(Size)
Definition: IfxCpu_Intrinsics.h:57
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
Ifx_Fifo_Shared::writerWaitx
sint32 writerWaitx
Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signa...
Definition: Ifx_Fifo.h:44
Ifx_Fifo_init
Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:74
Ifx_Fifo_destroy
void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
Destroy the FIFO object.
Definition: Ifx_Fifo.c:68
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:78
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
getDeadLine
IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout)
Return the time dead line.
Definition: Bsp.h:272
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
Ifx_Fifo_Shared::maxcount
Ifx_SizeT maxcount
Highest value seen in the count.
Definition: Ifx_Fifo.h:45
_Fifo::endIndex
Ifx_SizeT endIndex
buffer valid data end index
Definition: Ifx_Fifo.h:58
FALSE
#define FALSE
Definition: Platform_Types.h:90
Ifx_Fifo_read
Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:191
_Fifo::shared
Ifx_Fifo_Shared shared
data shared between reader / writer
Definition: Ifx_Fifo.h:56
Bsp.h
Board support package.
Ifx_Fifo_canWriteCount
boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:279
Ifx_Fifo.h
FIFO buffer functions.
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:62
Ifx_AlignOn32
#define Ifx_AlignOn32(Size)
Definition: IfxCpu_Intrinsics.h:58
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:76
_Fifo::elementSize
Ifx_SizeT elementSize
minimum number of bytes (block) added / removed to / from the buffer
Definition: Ifx_Fifo.h:60
_Fifo
Definition: Ifx_Fifo.h:53
Ifx_CircularBuffer_read8
void * Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
Copy count bytes from the circular buffer to the data array.
Definition: Ifx_CircularBuffer.c:78
Ifx_Fifo_create
Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:51
Ifx_Fifo_Shared::count
Ifx_SizeT count
number of bytes contained in the buffer
Definition: Ifx_Fifo.h:42
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:186
Ifx_Fifo_clear
void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:242
IFX_VALIDATE
#define IFX_VALIDATE(level, expr)
Definition: Ifx_Assert.h:56
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:59
isDeadLine
IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine)
Return TRUE if the dead line is over.
Definition: Bsp.h:319
IfxCpu.h
CPU basic functionality.
Ifx_CircularBuffer.h
Circular buffer functions.
uint16
unsigned short uint16
Definition: Platform_Types.h:109
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_Fifo_Shared::readerWaitx
sint32 readerWaitx
Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signale...
Definition: Ifx_Fifo.h:43
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
TRUE
#define TRUE
Definition: Platform_Types.h:87
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:79
uint8
unsigned char uint8
Definition: Platform_Types.h:105


iLLD_TC26B: Ifx_Fifo.h Source File

  • _Lib
  • DataHandling
Ifx_Fifo.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Fifo.h
3 * \brief FIFO buffer functions
4 * \ingroup IfxLld_lib_datahandling_fifo
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_lib_datahandling_fifo FIFO
25 * This module implements the FIFO buffer functionality.
26 * \ingroup IfxLld_lib_datahandling
27 *
28 */
29
30 #ifndef IFX_FIFO_H
31 #define IFX_FIFO_H 1
32 //------------------------------------------------------------------------------
33 #include "Ifx_Cfg.h"
34 #include "Cpu/Std/IfxCpu_Intrinsics.h"
35 //------------------------------------------------------------------------------
36
37 /** Shared data of the FIFO
38 *
39 */
40 typedef struct
41 {
42 Ifx_SizeT count; /**< \brief number of bytes contained in the buffer */
43 sint32 readerWaitx; /**< \brief Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signaled */
44 sint32 writerWaitx; /**< \brief Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signaled */
45 Ifx_SizeT maxcount; /**< \brief Highest value seen in the count */
46 } Ifx_Fifo_Shared;
47
48 /** \addtogroup IfxLld_lib_datahandling_fifo
49 * \{ */
50 /** Fifo object
51 *
52 */
53 typedef struct _Fifo
54 {
55 void *buffer; /**< \brief aligned on 64 bit boundary */
56 Ifx_Fifo_Shared shared; /**< \brief data shared between reader / writer */
57 Ifx_SizeT startIndex; /**< \brief buffer valid data start index */
58 Ifx_SizeT endIndex; /**< \brief buffer valid data end index */
59 Ifx_SizeT size; /**< \brief multiple of 8 bit, max 0xFFF8 */
60 Ifx_SizeT elementSize; /**< \brief minimum number of bytes (block) added / removed to / from the buffer */
61 volatile boolean eventReader; /**< \brief event set by the writer to signal the reader that the required data are available in the buffer */
62 volatile boolean eventWriter; /**< \brief event set by the reader to signal the writer that the required free space are available in the buffer */
63 } Ifx_Fifo;
64
65 /** \brief Indicates if the required number of bytes are available in the buffer
66 *
67 * Should not be called from an interrupt as this function may wait forever
68 * \param fifo Pointer on the Fifo object
69 * \param count in bytes
70 * \param timeout in system timer ticks
71 *
72 * \return TRUE if at least count bytes can be read from the buffer, else
73 * the Event is armed to be set when the buffer count is bigger or equal to the requested count
74 */
75 IFX_EXTERN boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout);
76 /** \brief Indicates if there is enough free space to write the data in the buffer
77 *
78 * Should not be called from an interrupt as this function may wait forever
79 *
80 * \param fifo Pointer on the Fifo object
81 * \param count in bytes
82 * \param timeout in system timer ticks
83 *
84 * \return TRUE if at least count bytes can be written to the buffer,
85 * if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
86 */
87 IFX_EXTERN boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout);
88
89 /** \brief Clear fifo contents.
90 *
91 * \param fifo Pointer on the Fifo object
92 *
93 * \return void
94 */
95 IFX_EXTERN void Ifx_Fifo_clear(Ifx_Fifo *fifo);
96
97 /** \brief Create a Fifo object
98 *
99 * The memory required for the object is allocated dynamically.
100 *
101 * \param size Specifies the FIFO buffer size in bytes
102 * \param elementSize Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
103 *
104 * \return returns a pointer to the FIFO object
105 *
106 * \see Ifx_Fifo_destroy()
107 */
108 IFX_EXTERN Ifx_Fifo *Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize);
109
110 /** \brief Destroy the FIFO object
111 *
112 * This function must be called to destroy the fifo object when created with \ref Ifx_Fifo_create()
113 *
114 * \param fifo Pointer on the Fifo object
115 * \return void
116 *
117 * \see Ifx_Fifo_create()
118 */
119 IFX_EXTERN void Ifx_Fifo_destroy(Ifx_Fifo *fifo);
120
121 /** \brief Initialize the FIFO buffer object
122 *
123 * \param buffer Specifies the FIFO object address.
124 * \param size Specifies the FIFO buffer size in bytes
125 * \param elementSize Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
126 *
127 * \return Returns a pointer on the FIFO object
128 *
129 * \note: The buffer parameter must point on a free memory location where the
130 * buffer object will be initialised. The size of this area must be at least
131 * equals to "size + sizeof(Ifx_Fifo) + 8". Not taking this in account may result
132 * in unpredictable behavior.
133 */
134 IFX_EXTERN Ifx_Fifo *Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize);
135
136 /** \brief Read data from a fifo and remove them from the buffer.
137 *
138 * Only complete elements are returned, if count is not a multiple of
139 * elementSize then the incomplete element is not read/removed from the buffer.
140 *
141 * \param fifo Pointer on the Fifo object
142 * \param data Pointer to the data buffer for storing values
143 * \param count in bytes
144 * \param timeout in system timer ticks
145 *
146 * \return return the number of byte that could not be read
147 */
148 IFX_EXTERN Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout);
149
150 /** \brief Write data into a fifo.
151 *
152 * Only complete elements are written to the buffer, if count is not a multiple of
153 * elementSize then the incomplete element are not written to the buffer.
154 *
155 * \param fifo Pointer on the Fifo object
156 * \param data Pointer to the data buffer to write into the Fifo
157 * \param count in bytes
158 * \param timeout in system timer ticks
159 */
160 IFX_EXTERN Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout);
161
162 /** \brief Empty the fifo
163 *
164 * \param fifo Pointer on the Fifo object
165 * \param timeout in system timer ticks
166 *
167 * \return TRUE if the buffer is emptied.
168 */
169 IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
170 {
171 return Ifx_Fifo_canWriteCount(fifo, fifo->size, timeout);
172 }
173
174
175 /**
176 * \brief Returns the size of the data in the buffer in bytes
177 *
178 * \param fifo Pointer on the Fifo object
179 *
180 * Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are
181 * a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return
182 * a multiple of fifo->elementSize
183 *
184 * \return Returns the size of the data in the buffer in bytes
185 */
186 IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
187 {
188 return fifo->shared.count;
189 }
190
191
192 /** \brief Returns the free size in bytes
193 *
194 * \param fifo Pointer on the Fifo object
195 *
196 * Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are
197 * a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return
198 * a multiple of fifo->elementSize
199 *
200 * \return Returns the free size in bytes
201 */
202 IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
203 {
204 return (Ifx_SizeT)(fifo->size - Ifx_Fifo_readCount(fifo));
205 }
206
207
208 /** \brief Indicates if the fifo is empty
209 *
210 * \param fifo Pointer on the Ifx_Fifo object
211 *
212 * \retval TRUE is the buffer is empty
213 * \retval FALSE is the buffer is not empty
214 */
215 IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
216 {
217 return (Ifx_Fifo_readCount(fifo) != FALSE) ? FALSE : TRUE;
218 }
219
220
221 /**\}*/
222 //------------------------------------------------------------------------------
223 #endif
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:59
_Fifo::buffer
void * buffer
aligned on 64 bit boundary
Definition: Ifx_Fifo.h:55
_Fifo::startIndex
Ifx_SizeT startIndex
buffer valid data start index
Definition: Ifx_Fifo.h:57
Ifx_Fifo_write
IFX_EXTERN Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:349
Ifx_Fifo
struct _Fifo Ifx_Fifo
Ifx_Fifo_canReadCount
IFX_EXTERN boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:119
_Fifo::eventReader
volatile boolean eventReader
event set by the writer to signal the reader that the required data are available in the buffer ...
Definition: Ifx_Fifo.h:61
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
Ifx_Fifo_Shared::writerWaitx
sint32 writerWaitx
Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signa...
Definition: Ifx_Fifo.h:44
Ifx_Fifo_init
IFX_EXTERN Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:74
Ifx_Fifo_destroy
IFX_EXTERN void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
Destroy the FIFO object.
Definition: Ifx_Fifo.c:68
IfxCpu_Intrinsics.h
Ifx_Fifo_Shared::maxcount
Ifx_SizeT maxcount
Highest value seen in the count.
Definition: Ifx_Fifo.h:45
_Fifo::endIndex
Ifx_SizeT endIndex
buffer valid data end index
Definition: Ifx_Fifo.h:58
FALSE
#define FALSE
Definition: Platform_Types.h:90
Ifx_Fifo_read
IFX_EXTERN Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:191
_Fifo::shared
Ifx_Fifo_Shared shared
data shared between reader / writer
Definition: Ifx_Fifo.h:56
Ifx_Fifo_canWriteCount
IFX_EXTERN boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:279
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:62
_Fifo::elementSize
Ifx_SizeT elementSize
minimum number of bytes (block) added / removed to / from the buffer
Definition: Ifx_Fifo.h:60
Ifx_Fifo_Shared
Definition: Ifx_Fifo.h:40
_Fifo
Definition: Ifx_Fifo.h:53
Ifx_Fifo_flush
IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo.
Definition: Ifx_Fifo.h:169
Ifx_Fifo_create
IFX_EXTERN Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:51
Ifx_Fifo_Shared::count
Ifx_SizeT count
number of bytes contained in the buffer
Definition: Ifx_Fifo.h:42
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:186
Ifx_Fifo_clear
IFX_EXTERN void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:242
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:59
Ifx_Fifo_writeCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
Returns the free size in bytes.
Definition: Ifx_Fifo.h:202
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_Fifo_isEmpty
IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
Indicates if the fifo is empty.
Definition: Ifx_Fifo.h:215
Ifx_Fifo_Shared::readerWaitx
sint32 readerWaitx
Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signale...
Definition: Ifx_Fifo.h:43
TRUE
#define TRUE
Definition: Platform_Types.h:87


iLLD_TC26B: Ifx_GlobalResources.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • General
Ifx_GlobalResources.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_GlobalResources.h
3 * \brief Handling of global resources
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:36 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 #include "Ifx_GlobalResources.h"
26 /** \brief Global resource object */
27 typedef struct
28 {
29 const Ifx_GlobalResources_Item *table; /**< \brief Pointer to the global resource table */
30 sint32 size; /**< \brief Size of the global resource table */
31 } Ifx_GlobalResources;
32
33 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
34
35 Ifx_GlobalResources ifx_GlobalResource;
36 #endif
37
38 void *Ifx_GlobalResources_get(sint32 id)
39 {
40 void *result;
41
42 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
43
44 if (id < ifx_GlobalResource.size)
45 {
46 result = ifx_GlobalResource.table[id].resource;
47 }
48 else
49 {
50 result = NULL_PTR;
51 }
52
53 #else
54 result = NULL_PTR;
55
56 #endif
57
58 return result;
59 }
60
61
62 sint32 Ifx_GlobalResources_getIndex(void *resource)
63 {
64 sint32 id = -1;
65
66 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
67 int i;
68
69 for (i = 0; i < ifx_GlobalResource.size; i++)
70 {
71 if (resource == ifx_GlobalResource.table[i].resource)
72 {
73 id = i;
74 }
75 else
76 {}
77 }
78
79 #else
80 #endif
81
82 return id;
83 }
84
85
86 const Ifx_GlobalResources_Item *Ifx_GlobalResources_getItem(sint32 id)
87 {
88 const Ifx_GlobalResources_Item *result;
89
90 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
91
92 if (id < ifx_GlobalResource.size)
93 {
94 result = &ifx_GlobalResource.table[id];
95 }
96 else
97 {
98 result = NULL_PTR;
99 }
100
101 #else
102 result = NULL_PTR;
103
104 #endif
105
106 return result;
107 }
108
109
110 pchar Ifx_GlobalResources_getName(sint32 id)
111 {
112 pchar name;
113
114 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
115
116 if (id < ifx_GlobalResource.size)
117 {
118 name = ifx_GlobalResource.table[id].name;
119 }
120 else
121 {
122 name = "unknown";
123 }
124
125 #else
126 name = "unknown";
127
128 #endif
129
130 return name;
131 }
132
133
134 boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
135 {
136 boolean result;
137
138 #if IFX_CFG_GLOBAL_RESOURCES_ENABLED
139 ifx_GlobalResource.table = table;
140 ifx_GlobalResource.size = size;
141 result = TRUE;
142 #else
143 result = FALSE;
144
145 #endif
146
147 return result;
148 }
Ifx_GlobalResources_getName
pchar Ifx_GlobalResources_getName(sint32 id)
Definition: Ifx_GlobalResources.c:110
Ifx_GlobalResources_Item::name
pchar name
Definition: Ifx_GlobalResources.h:41
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_GlobalResources.h
Handling of global resources.
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
FALSE
#define FALSE
Definition: Platform_Types.h:90
Ifx_GlobalResources::table
const Ifx_GlobalResources_Item * table
Pointer to the global resource table.
Definition: Ifx_GlobalResources.c:29
Ifx_GlobalResources_get
void * Ifx_GlobalResources_get(sint32 id)
Definition: Ifx_GlobalResources.c:38
Ifx_GlobalResources_init
boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
Definition: Ifx_GlobalResources.c:134
Ifx_GlobalResources_getItem
const Ifx_GlobalResources_Item * Ifx_GlobalResources_getItem(sint32 id)
Definition: Ifx_GlobalResources.c:86
Ifx_GlobalResources::size
sint32 size
Size of the global resource table.
Definition: Ifx_GlobalResources.c:30
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_GlobalResources_Item::resource
void * resource
Definition: Ifx_GlobalResources.h:40
Ifx_GlobalResources_Item
Definition: Ifx_GlobalResources.h:38
Ifx_GlobalResources
Global resource object.
Definition: Ifx_GlobalResources.c:27
TRUE
#define TRUE
Definition: Platform_Types.h:87
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
Ifx_GlobalResources_getIndex
sint32 Ifx_GlobalResources_getIndex(void *resource)
Returns the global resource index.
Definition: Ifx_GlobalResources.c:62


iLLD_TC26B: Ifx_GlobalResources.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • General
Ifx_GlobalResources.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_GlobalResources.h
3 * \brief Handling of global resources
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-28 14:15:39 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_sysse_general_globalresources Global resources
24 * This module implements the global resources handling
25 * \ingroup library_srvsw_sysse_general
26 */
27
28 #ifndef IFX_GLOBALRESOURCES_H
29 #define IFX_GLOBALRESOURCES_H 1
30
31 #include "Ifx_Cfg.h"
32 #include "Cpu/Std/Ifx_Types.h"
33
34 #ifndef IFX_CFG_GLOBAL_RESOURCES_ENABLED
35 #define IFX_CFG_GLOBAL_RESOURCES_ENABLED (0)
36 #endif
37
38 typedef struct
39 {
40 void *resource;
41 pchar name;
42 } Ifx_GlobalResources_Item;
43
44 /** \addtogroup library_srvsw_sysse_general_globalresources
45 * \{ */
46 /** Return a pointer to the global resource
47 *
48 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
49 *
50 * \return return Ifx_GlobalResources_Item.resource
51 */
52 IFX_EXTERN void *Ifx_GlobalResources_get(sint32 id);
53
54 /** \brief Returns the global resource index.
55 *
56 * \return Returns the global resource index, -1 if not found
57 */
58 IFX_EXTERN sint32 Ifx_GlobalResources_getIndex(void *resource);
59
60 /** Return a pointer to the global resource item
61 *
62 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
63 *
64 * \return return the Ifx_GlobalResources_Item
65 */
66 IFX_EXTERN const Ifx_GlobalResources_Item *Ifx_GlobalResources_getItem(sint32 id);
67
68 /** Return a the resource name as an NULL terminated string
69 *
70 * \param id index of the Ifx_GlobalResources_Item in the table, the index starts with 0
71 *
72 * \return return Ifx_GlobalResources_Item.name
73 */
74 IFX_EXTERN pchar Ifx_GlobalResources_getName(sint32 id);
75
76 /** Initialize the global resource handler
77 *
78 * \param table pointer to an array of Ifx_GlobalResources_Item
79 * \param size number of item in the table corresponds to sizeof(table)
80 *
81 * return returns TRUE in case of success else FALSE
82 *
83 */
84 IFX_EXTERN boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size);
85 /** \} */
86
87 #endif /* IFX_GLOBALRESOURCES_H */
Ifx_GlobalResources_getName
IFX_EXTERN pchar Ifx_GlobalResources_getName(sint32 id)
Definition: Ifx_GlobalResources.c:110
Ifx_GlobalResources_Item::name
pchar name
Definition: Ifx_GlobalResources.h:41
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_GlobalResources_get
IFX_EXTERN void * Ifx_GlobalResources_get(sint32 id)
Definition: Ifx_GlobalResources.c:38
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_GlobalResources_init
IFX_EXTERN boolean Ifx_GlobalResources_init(const Ifx_GlobalResources_Item *table, uint32 size)
Definition: Ifx_GlobalResources.c:134
Ifx_GlobalResources_getItem
IFX_EXTERN const Ifx_GlobalResources_Item * Ifx_GlobalResources_getItem(sint32 id)
Definition: Ifx_GlobalResources.c:86
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_GlobalResources_Item::resource
void * resource
Definition: Ifx_GlobalResources.h:40
Ifx_GlobalResources_Item
Definition: Ifx_GlobalResources.h:38
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
Ifx_GlobalResources_getIndex
IFX_EXTERN sint32 Ifx_GlobalResources_getIndex(void *resource)
Returns the global resource index.
Definition: Ifx_GlobalResources.c:62


iLLD_TC26B: Ifx_IntegralF32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_IntegralF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_IntegralF32.c
3 * \brief Discrete integral approximation
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25 #include "Ifx_IntegralF32.h"
26
27 void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
28 {
29 ci->uk = 0;
30 ci->ik = 0;
31 }
32
33
34 void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
35 {
36 ci->delta = gain * Ts / 2;
37 }
38
39
40 float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
41 {
42 ci->uk = ci->uk + (ik + ci->ik) * ci->delta;
43 ci->ik = ik;
44
45 return ci->uk;
46 }
47
48
49 void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
50 {
51 ci->uk.real = 0;
52 ci->uk.imag = 0;
53 ci->ik.real = 0;
54 ci->ik.imag = 0;
55 }
56
57
58 void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
59 {
60 Ifx_ClpxFloat32_Integral_reset(ci);
61 ci->delta = gain * Ts / 2;
62 }
63
64
65 cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
66 {
67 ci->uk.real = ci->uk.real + (ik.real + ci->ik.real) * ci->delta;
68 ci->uk.imag = ci->uk.imag + (ik.imag + ci->ik.imag) * ci->delta;
69 ci->ik = ik;
70
71 return ci->uk;
72 }
Ifx_IntegralF32.h
Discrete integral approximation.
Ifx_ClpxFloat32_Integral_init
void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:58
Ifx_IntegralF32::delta
float32 delta
Definition: Ifx_IntegralF32.h:41
Ifx_ClpxFloat32_Integral_step
cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:65
float32
float float32
Definition: Platform_Types.h:167
Ifx_ClpxFloat32_Integral::uk
cfloat32 uk
Definition: Ifx_IntegralF32.h:47
Ifx_ClpxFloat32_Integral_reset
void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:49
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:44
Ifx_IntegralF32::ik
float32 ik
Definition: Ifx_IntegralF32.h:40
cfloat32
Definition: Ifx_Types.h:41
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:43
Ifx_IntegralF32::uk
float32 uk
Definition: Ifx_IntegralF32.h:39
Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type.
Definition: Ifx_IntegralF32.h:45
Ifx_ClpxFloat32_Integral::ik
cfloat32 ik
Definition: Ifx_IntegralF32.h:48
Ifx_IntegralF32_step
float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:40
Ifx_IntegralF32_init
void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:34
Ifx_IntegralF32_reset
void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:27
Ifx_IntegralF32
Integrator object for float32 data type.
Definition: Ifx_IntegralF32.h:37


iLLD_TC26B: Ifx_IntegralF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_IntegralF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_IntegralF32.h
3 * \brief Discrete integral approximation
4 * \ingroup library_srvsw_sysse_math_f32_integral
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 *
15 * Infineon Technologies AG (Infineon) is supplying this file for use
16 * exclusively with Infineon's microcontroller products. This file can be freely
17 * distributed within development tools that are supporting such microcontroller
18 * products.
19 *
20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
23 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
24 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
25 *
26 * \defgroup library_srvsw_sysse_math_f32_integral Discrete Integral Approximation
27 * \ingroup library_srvsw_sysse_math_f32
28 *
29 */
30
31 #ifndef INTEGRAL_H
32 #define INTEGRAL_H
33
34 #include "Ifx_Cf32.h"
35
36 /** \brief Integrator object for float32 data type */
37 typedef struct
38 {
39 float32 uk;
40 float32 ik;
41 float32 delta;
42 } Ifx_IntegralF32;
43
44 /** \brief Integrator object for cfloat32 data type */
45 typedef struct
46 {
47 cfloat32 uk;
48 cfloat32 ik;
49 float32 delta;
50 } Ifx_ClpxFloat32_Integral;
51
52 /** \addtogroup library_srvsw_sysse_math_f32_integral
53 * \{ */
54
55 /** \brief Initialize the integrator object
56 * \param ci Pointer to the integrator object
57 * \param gain Integrator gain
58 * \param Ts Sampling period */
59 void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts);
60
61 /** \brief Step function of the integrator object
62 * \param ci Pointer to the integrator object
63 * \param ik input value
64 * \return most actual integrator value */
65 float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik);
66
67 /** \brief Reset the integrator object
68 * \param ci Pointer to the integrator object */
69 void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci);
70
71 /** \brief Initialize the integrator object
72 * \param ci Pointer to the integrator object
73 * \param gain Integrator gain
74 * \param Ts Sampling period */
75 void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts);
76
77 /** \brief Step function of the integrator object
78 * \param ci Pointer to the integrator object
79 * \param ik input value
80 * \return most actual integrator value */
81 cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik);
82
83 /** \brief Reset the integrator object
84 * \param ci Pointer to the integrator object */
85 void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci);
86
87 /**\}*/
88
89 #endif /* INTEGRAL_H */
Ifx_ClpxFloat32_Integral_init
void Ifx_ClpxFloat32_Integral_init(Ifx_ClpxFloat32_Integral *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:58
Ifx_IntegralF32::delta
float32 delta
Definition: Ifx_IntegralF32.h:41
Ifx_ClpxFloat32_Integral_step
cfloat32 Ifx_ClpxFloat32_Integral_step(Ifx_ClpxFloat32_Integral *ci, cfloat32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:65
float32
float float32
Definition: Platform_Types.h:167
Ifx_ClpxFloat32_Integral::uk
cfloat32 uk
Definition: Ifx_IntegralF32.h:47
Ifx_ClpxFloat32_Integral_reset
void Ifx_ClpxFloat32_Integral_reset(Ifx_ClpxFloat32_Integral *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:49
Ifx_IntegralF32::ik
float32 ik
Definition: Ifx_IntegralF32.h:40
cfloat32
Definition: Ifx_Types.h:41
Ifx_IntegralF32::uk
float32 uk
Definition: Ifx_IntegralF32.h:39
Ifx_ClpxFloat32_Integral
Integrator object for cfloat32 data type.
Definition: Ifx_IntegralF32.h:45
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_ClpxFloat32_Integral::ik
cfloat32 ik
Definition: Ifx_IntegralF32.h:48
Ifx_IntegralF32_step
float32 Ifx_IntegralF32_step(Ifx_IntegralF32 *ci, float32 ik)
Step function of the integrator object.
Definition: Ifx_IntegralF32.c:40
Ifx_IntegralF32_init
void Ifx_IntegralF32_init(Ifx_IntegralF32 *ci, float32 gain, float32 Ts)
Initialize the integrator object.
Definition: Ifx_IntegralF32.c:34
Ifx_IntegralF32_reset
void Ifx_IntegralF32_reset(Ifx_IntegralF32 *ci)
Reset the integrator object.
Definition: Ifx_IntegralF32.c:27
Ifx_IntegralF32
Integrator object for float32 data type.
Definition: Ifx_IntegralF32.h:37


iLLD_TC26B: Ifx_InternalMux.c Source File

  • _Lib
  • InternalMux
Ifx_InternalMux.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_InternalMux.c
3 * \brief Mux configuration functions
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "Ifx_InternalMux.h"
30 #include "Cpu/Std/IfxCpu_Intrinsics.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
37 {
38 uint32 i;
39
40 for (i = 0; i < cfg->size; i++)
41 {
42 Ifx_InternalMux_MuxConfig muxCfg = cfg->muxConfig[i];
43
44 /*Load modify store operation done to insert the value to the register bit field*/
45 __ldmst((volatile void *)(muxCfg.regAddr), muxCfg.mask, muxCfg.value);
46 }
47 }
Ifx_InternalMux_MuxConfig::value
uint32 value
Mux/Demux configuration value.
Definition: Ifx_InternalMux.h:49
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_InternalMux_MuxConfig::mask
uint32 mask
Bit field position for the Mux/Demux selection.
Definition: Ifx_InternalMux.h:48
IfxCpu_Intrinsics.h
Ifx_InternalMux.h
Mux configuration functions.
Ifx_InternalMux_Config
Definition: Ifx_InternalMux.h:55
Ifx_InternalMux_Config::size
uint32 size
Definition: Ifx_InternalMux.h:57
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2048
Ifx_InternalMux_init
void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration.
Definition: Ifx_InternalMux.c:36
Ifx_InternalMux_MuxConfig::regAddr
volatile void * regAddr
pointer to the register for Mux/Demux configuration
Definition: Ifx_InternalMux.h:47
Ifx_InternalMux_MuxConfig
Definition: Ifx_InternalMux.h:45
Ifx_InternalMux_Config::muxConfig
Ifx_InternalMux_MuxConfig * muxConfig
Definition: Ifx_InternalMux.h:58


iLLD_TC26B: Ifx_InternalMux.h Source File

  • _Lib
  • InternalMux
Ifx_InternalMux.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_InternalMux.h
3 * \brief Mux configuration functions
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2015 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup IfxLld_lib_internalmux_internalmux FIFO
24 * This module implements the Internal Mux functionality.
25 * \ingroup IfxLld_lib_internalmux
26 */
27
28 #ifndef IFX_INTERNALMUX_H
29 #define IFX_INTERNALMUX_H 1
30
31 /******************************************************************************/
32 /*----------------------------------Includes----------------------------------*/
33 /******************************************************************************/
34
35 #include "Cpu/Std/Ifx_Types.h"
36
37 /******************************************************************************/
38 /*-----------------------------Data Structures--------------------------------*/
39 /******************************************************************************/
40 /** \addtogroup IfxLld_lib_internalmux_internalmux
41 * \{ */
42 /** Individual Mux configuration structure
43 *
44 */
45 typedef struct
46 {
47 volatile void *regAddr; /**< \brief pointer to the register for Mux/Demux configuration */
48 uint32 mask; /**< \brief Bit field position for the Mux/Demux selection */
49 uint32 value; /**< \brief Mux/Demux configuration value */
50 } Ifx_InternalMux_MuxConfig;
51
52 /** Global/Combined Mux configuration object
53 *
54 */
55 typedef struct
56 {
57 uint32 size; /**< size of the internal mux configuration array*/
58 Ifx_InternalMux_MuxConfig *muxConfig; /**< pointer to the internal mux config array*/
59 }Ifx_InternalMux_Config;
60
61 /******************************************************************************/
62 /*-------------------------Global Function Prototypes-------------------------*/
63 /******************************************************************************/
64 /** \brief Initialises the internal mux configuration
65 *
66 * \param cfg Pointer on the Global Mux Configuration object
67 *
68 * \return None
69 */
70 IFX_EXTERN void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg);
71
72 /**\}*/
73
74 #endif /* IFX_INTERNALMUX_H */
Ifx_InternalMux_MuxConfig::value
uint32 value
Mux/Demux configuration value.
Definition: Ifx_InternalMux.h:49
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_InternalMux_MuxConfig::mask
uint32 mask
Bit field position for the Mux/Demux selection.
Definition: Ifx_InternalMux.h:48
Ifx_InternalMux_Config
Definition: Ifx_InternalMux.h:55
Ifx_InternalMux_Config::size
uint32 size
Definition: Ifx_InternalMux.h:57
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_InternalMux_init
IFX_EXTERN void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
Initialises the internal mux configuration.
Definition: Ifx_InternalMux.c:36
Ifx_InternalMux_MuxConfig::regAddr
volatile void * regAddr
pointer to the register for Mux/Demux configuration
Definition: Ifx_InternalMux.h:47
Ifx_InternalMux_MuxConfig
Definition: Ifx_InternalMux.h:45
Ifx_InternalMux_Config::muxConfig
Ifx_InternalMux_MuxConfig * muxConfig
Definition: Ifx_InternalMux.h:58


iLLD_TC26B: Ifx_LowPassPt1F32.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LowPassPt1F32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LowPassPt1F32.c
3 * \brief Low pass filter PT1
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 //------------------------------------------------------------------------------
26 #include "SysSe/Math/Ifx_LowPassPt1F32.h"
27 //------------------------------------------------------------------------------
28
29 /** \brief Set the low pass filter configuration
30 *
31 * This function sets the low pass filter configuration and reset the filter output.
32 *
33 * \param filter Specifies PT1 filter.
34 * \param config Specifies the PT1 filter configuration.
35 *
36 * \return None
37 */
38 void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
39 {
40 float32 tStar;
41 float32 T = 1 / config->cutOffFrequency;
42 tStar = 1 / (T / config->samplingTime + 1);
43
44 filter->a = config->gain * tStar;
45 filter->b = tStar;
46 filter->out = 0;
47 }
48
49
50 /** \brief Execute the low pass filter
51 * \param filter Specifies PT1 filter.
52 * \param input Specifies the filter input.
53 *
54 * \return Returns the filter output
55 */
56 float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
57 {
58 filter->out = filter->out + filter->a * input - filter->b * filter->out;
59 return filter->out;
60 }
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:48
Ifx_LowPassPt1F32_do
float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:56
float32
float float32
Definition: Platform_Types.h:167
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:44
Ifx_LowPassPt1F32_init
void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:38
Ifx_LowPassPt1F32.h
Low pass filter PT1.
Ifx_LowPassPt1F32::b
float32 b
b parameter
Definition: Ifx_LowPassPt1F32.h:47
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:56
Ifx_LowPassPt1F32::a
float32 a
a parameter
Definition: Ifx_LowPassPt1F32.h:46
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:54
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:55
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:52


iLLD_TC26B: Ifx_LowPassPt1F32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_LowPassPt1F32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LowPassPt1F32.h
3 * \brief Low pass filter PT1
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_sysse_math_f32_lowpasspt1 Low-pass Filter: Type PT1
24 * This module implements a PT1 low pass filter.
25 * http://de.wikipedia.org/wiki/PT1-Glied
26 *
27 * Formula: \n
28 * \f$ y_k = y_{k-1} + a * x_k - b * y_{k-1} \f$ \n
29 * with \f$(T^* = \frac{T_s}{T+T_s})\f$, \f$(a = K*T^*)\f$, \f$(b = T^*)\f$
30 * with \f$(T_s: Sample time)\f$, \f$(K: Gain)\f$, \f$(T = \frac{1}{\omega_0})\f$
31 *
32 * \ingroup library_srvsw_sysse_math_f32
33 *
34 */
35
36 #if !defined(IFX_LOWPASSPT1F32)
37 #define IFX_LOWPASSPT1F32
38 //------------------------------------------------------------------------------
39 #include "Cpu/Std/Ifx_Types.h"
40 //------------------------------------------------------------------------------
41
42 /** \brief PT1 object definition.
43 */
44 typedef struct
45 {
46 float32 a; /**< \brief a parameter */
47 float32 b; /**< \brief b parameter */
48 float32 out; /**< \brief last output */
49 } Ifx_LowPassPt1F32;
50
51 /** \brief PT1 configuration */
52 typedef struct
53 {
54 float32 cutOffFrequency; /**< \brief Cut off frequency */
55 float32 gain; /**< \brief Gain */
56 float32 samplingTime; /**< \brief Sampling time */
57 } Ifx_LowPassPt1F32_Config;
58
59 //------------------------------------------------------------------------------
60
61 /** \addtogroup library_srvsw_sysse_math_f32_lowpasspt1
62 * \{ */
63 IFX_EXTERN void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config);
64 IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter);
65 IFX_EXTERN float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input);
66 /** \} */
67
68 //------------------------------------------------------------------------------
69
70 /** \brief Reset the internal filter variable
71 * \param filter Specifies PT1 filter.
72 */
73 IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
74 {
75 filter->out = 0.0;
76 }
77
78
79 //------------------------------------------------------------------------------
80 #endif
Ifx_LowPassPt1F32::out
float32 out
last output
Definition: Ifx_LowPassPt1F32.h:48
Ifx_LowPassPt1F32_do
IFX_EXTERN float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:56
float32
float float32
Definition: Platform_Types.h:167
Ifx_LowPassPt1F32_reset
IFX_INLINE void Ifx_LowPassPt1F32_reset(Ifx_LowPassPt1F32 *filter)
Reset the internal filter variable.
Definition: Ifx_LowPassPt1F32.h:73
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:44
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_LowPassPt1F32_init
IFX_EXTERN void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:38
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_LowPassPt1F32::b
float32 b
b parameter
Definition: Ifx_LowPassPt1F32.h:47
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:56
Ifx_LowPassPt1F32::a
float32 a
a parameter
Definition: Ifx_LowPassPt1F32.h:46
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:54
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:55
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:52


iLLD_TC26B: Ifx_Lut.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_Lut.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Lut.h
3 * \brief Lookup defintion with fixed-point angle data type
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 *
14 * Infineon Technologies AG (Infineon) is supplying this file for use
15 * exclusively with Infineon's microcontroller products. This file can be freely
16 * distributed within development tools that are supporting such microcontroller
17 * products.
18 *
19 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
20 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
22 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
23 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
24 *
25 * \defgroup library_srvsw_sysse_math_lut Look-ups
26 * \ingroup library_srvsw_sysse_math
27 *
28 * \defgroup library_srvsw_sysse_math_f32_lut Look-ups float32
29 * \ingroup library_srvsw_sysse_math_lut
30 *
31 */
32 #ifndef IFX_LUT_H
33 #define IFX_LUT_H
34 //________________________________________________________________________________________
35 #include "Cpu/Std/IfxCpu_Intrinsics.h"
36 //________________________________________________________________________________________
37 #ifndef IFX_LUT_TABLE_CONST
38 /** \brief 0 = Lookup tables are generated and stored in RAM,
39 * 1 = Lookup tables are precompiled and stored in FLASH */
40 #define IFX_LUT_TABLE_CONST (1)
41 #endif
42
43 #if (IFX_LUT_TABLE_CONST != 0)
44 /** \brief Lookup table type modifier (stored in ROM) */
45 # define IFX_LUT_TABLE const
46 #else
47 /** \brief Lookup table type modifier (stored in RAM) */
48 # define IFX_LUT_TABLE
49 #endif
50
51 /** \brief Define the resolution (in bits) of cosinus and sinus table \ingroup library_srvsw_sysse_math_lut */
52 #define IFX_LUT_ANGLE_BITS (12)
53
54 /** \brief Define the cosinus and sinus table size \ingroup library_srvsw_sysse_math_lut */
55 #define IFX_LUT_ANGLE_RESOLUTION (1 << IFX_LUT_ANGLE_BITS)
56
57 /** \brief Value used as 180 degree angle */
58 #define IFX_LUT_ANGLE_PI (IFX_LUT_ANGLE_RESOLUTION / 2)
59
60 //________________________________________________________________________________________
61 /** \brief Fixed-point angle type.
62 *
63 * Resolution is defined by \ref IFX_LUT_ANGLE_RESOLUTION */
64 typedef sint32 Ifx_Lut_FxpAngle;
65
66 /** \brief Convert from float32 angle in radian into fixed-point angle type */
67 #define IFX_LUT_F32_TO_FXPANGLE(f) ((Ifx_Lut_FxpAngle)(f / IFX_PI * IFX_LUT_ANGLE_PI))
68
69 /** \brief Convert from fixed-point angle type to float32 angle in radian */
70 #define IFX_LUT_FXPANGLE_TO_F32(fx) ((float32)fx * IFX_PI / IFX_LUT_ANGLE_PI)
71
72 //________________________________________________________________________________________
73 #if (1U << IFX_LUT_ANGLE_BITS) != IFX_LUT_ANGLE_RESOLUTION
74 #error (1U << IFX_LUT_ANGLE_BITS) != IFX_LUT_ANGLE_RESOLUTION
75 #endif
76 //________________________________________________________________________________________
77 #endif /* IFX_LUT_H */
IfxCpu_Intrinsics.h
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:64


iLLD_TC26B: Ifx_LutAtan2F32.c Source File

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Ifx_LutAtan2F32.c
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1 /**
2 * \file Ifx_LutAtan2F32.c
3 * \brief ATAN2 lookup functions with fixed-point angle data type
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25 #include "Ifx_LutAtan2F32.h"
26
27 #include <math.h>
28
29 void Ifx_LutAtan2F32_init(void)
30 {
31 #if IFX_LUT_TABLE_CONST == 0
32 { /* generate arctan table */
33 sint32 k;
34 float32 Step, value;
35 Step = (double)IFX_LUT_ATAN_LIMIT_LOW / IFX_LUT_ATAN_SIZE_LOW;
36
37 for (k = 0; k < IFX_LUTATAN2F32_SIZE; k++)
38 {
39 Ifx_g_LutAtan2F32_FxpAngle_table[k] = IFX_LUT_F32_TO_FXPANGLE(atanf(k / Step));
40 }
41 }
42 #endif
43 }
44
45
46 IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate(float32 valf)
47 {
48 uint32 vali;
49 valf = IFX_LUTATAN2F32_SIZE * valf;
50 vali = (uint32)valf;
51
52 if ((valf - (float32)vali) > 0.5)
53 { /* Round to nearest */
54 vali++;
55 }
56
57 return Ifx_g_LutAtan2F32_FxpAngle_table[vali];
58 }
59
60
61 IFX_INLINE float32 Ifx_LutAtan2F32_float32Private(float32 val)
62 { /* FIXME round to nearest ?? */
63 return Ifx_g_LutAtan2F32_table[(int)(val * IFX_LUTATAN2F32_SIZE)];
64 }
65
66
67 Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
68 {
69 Ifx_Lut_FxpAngle angle;
70 float32 fx = (float32)x;
71 float32 fy = (float32)y;
72
73 if (y < 0)
74 {
75 if (x < 0)
76 {
77 if (-y < -x)
78 { // 180 .. 225 deg
79 angle = -IFX_LUT_ANGLE_PI + Ifx_LutAtan2F32_fxpAnglePrivate(-fy / -fx);
80 }
81 else
82 { // 225 .. 270 deg
83 angle = -(IFX_LUT_ANGLE_PI / 2) - Ifx_LutAtan2F32_fxpAnglePrivate(-fx / -fy);
84 }
85 }
86 else // x >= 0
87 {
88 if (-y < x)
89 { // 315 .. 360 deg
90 angle = -Ifx_LutAtan2F32_fxpAnglePrivate(-fy / fx); // ok
91 }
92 else
93 { // 225 .. 270 deg
94 angle = -(IFX_LUT_ANGLE_PI / 2) + Ifx_LutAtan2F32_fxpAnglePrivate(fx / -fy);
95 }
96 }
97 }
98 else // y >= 0
99 {
100 if (x < 0)
101 {
102 if (y < -x)
103 { // 135 .. 180 deg
104 angle = IFX_LUT_ANGLE_PI - Ifx_LutAtan2F32_fxpAnglePrivate(fy / -fx); // ok
105 }
106 else
107 { // 90 .. 135 deg
108 angle = (IFX_LUT_ANGLE_PI / 2) + Ifx_LutAtan2F32_fxpAnglePrivate(-fx / fy); // ok
109 }
110 }
111 else // x >= 0
112 {
113 if (y < x)
114 { // 0 .. 45 deg
115 angle = Ifx_LutAtan2F32_fxpAnglePrivate(fy / fx); // ok
116 }
117 else
118 { // 45 .. 90 deg
119 angle = (IFX_LUT_ANGLE_PI / 2) - Ifx_LutAtan2F32_fxpAnglePrivate(fx / fy); // ok
120 }
121 }
122 }
123
124 return angle & (IFX_LUT_ANGLE_RESOLUTION - 1);
125 }
126
127
128 float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
129 {
130 float32 angle;
131
132 if (y < 0)
133 {
134 if (x < 0)
135 {
136 if (-y < -x)
137 { // 180 .. 225 deg
138 angle = -IFX_PI + Ifx_LutAtan2F32_float32Private(-y / -x);
139 }
140 else
141 { // 225 .. 270 deg
142 angle = -(IFX_PI / 2) - Ifx_LutAtan2F32_float32Private(-x / -y);
143 }
144 }
145 else // x >= 0
146 {
147 if (-y < x)
148 { // 315 .. 360 deg
149 angle = -Ifx_LutAtan2F32_float32Private(-y / x); // ok
150 }
151 else
152 { // 225 .. 270 deg
153 angle = -(IFX_PI / 2) + Ifx_LutAtan2F32_float32Private(x / -y);
154 }
155 }
156 }
157 else // y >= 0
158 {
159 if (x < 0)
160 {
161 if (y < -x)
162 { // 135 .. 180 deg
163 angle = IFX_PI - Ifx_LutAtan2F32_float32Private(y / -x); // ok
164 }
165 else
166 { // 90 .. 135 deg
167 angle = (IFX_PI / 2) + Ifx_LutAtan2F32_float32Private(-x / y); // ok
168 }
169 }
170 else // x >= 0
171 {
172 if (y < x)
173 { // 0 .. 45 deg
174 angle = Ifx_LutAtan2F32_float32Private(y / x); // ok
175 }
176 else
177 { // 45 .. 90 deg
178 angle = (IFX_PI / 2) - Ifx_LutAtan2F32_float32Private(x / y); // ok
179 }
180 }
181 }
182
183 return angle;
184 }
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:35
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:58
Ifx_g_LutAtan2F32_FxpAngle_table
IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle()
Definition: Ifx_LutAtan2F32.h:40
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_g_LutAtan2F32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32.h:41
float32
float float32
Definition: Platform_Types.h:167
Ifx_LutAtan2F32_float32
float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
Definition: Ifx_LutAtan2F32.c:128
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:200
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_LutAtan2F32_float32Private
IFX_INLINE float32 Ifx_LutAtan2F32_float32Private(float32 val)
Definition: Ifx_LutAtan2F32.c:61
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:64
IFX_LUT_F32_TO_FXPANGLE
#define IFX_LUT_F32_TO_FXPANGLE(f)
Convert from float32 angle in radian into fixed-point angle type.
Definition: Ifx_Lut.h:67
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:55
Ifx_LutAtan2F32_fxpAnglePrivate
IFX_INLINE Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAnglePrivate(float32 valf)
Definition: Ifx_LutAtan2F32.c:46
Ifx_LutAtan2F32_init
void Ifx_LutAtan2F32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutAtan2F32.c:29
Ifx_LutAtan2F32_fxpAngle
Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
Look-up arcus tangent value of y/x.
Definition: Ifx_LutAtan2F32.c:67


iLLD_TC26B: Ifx_LutAtan2F32.h Source File

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Ifx_LutAtan2F32.h
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1 /**
2 * \file Ifx_LutAtan2F32.h
3 * \brief Floating point signal, vector, and matrix library
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup library_srvsw_sysse_math_lut_atan2 ATAN lookup table
25 * \ingroup library_srvsw_sysse_math_f32_lut
26 */
27
28 #ifndef IFX_LUTATAN2F32_H
29 #define IFX_LUTATAN2F32_H
30 //----------------------------------------------------------------------------------------
31 #include "Ifx_Lut.h"
32
33 //----------------------------------------------------------------------------------------
34
35 #define IFX_LUTATAN2F32_SIZE (1024) /**< \brief size of Ifx_LutAtan2F32 table */
36
37 //----------------------------------------------------------------------------------------
38
39 /** \brief Table I for Ifx_LutAtan2F32_fxpAngle() */
40 IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE + 1];
41 IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE + 1];
42
43 /** \brief Initialise the lookup tables
44 * \ingroup library_srvsw_sysse_math_lut_atan2
45 */
46 IFX_EXTERN void Ifx_LutAtan2F32_init(void);
47
48 /**
49 * \brief Look-up arcus tangent value of y/x.
50 * \return fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
51 * \ingroup library_srvsw_sysse_math_lut_atan2
52 */
53 IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y);
54 IFX_EXTERN float32 Ifx_LutAtan2F32_float32(float32 y, float32 x);
55
56 #endif
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:35
Ifx_LutAtan2F32_float32
IFX_EXTERN float32 Ifx_LutAtan2F32_float32(float32 y, float32 x)
Definition: Ifx_LutAtan2F32.c:128
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_g_LutAtan2F32_FxpAngle_table
IFX_EXTERN IFX_LUT_TABLE Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE+1]
Table I for Ifx_LutAtan2F32_fxpAngle()
Definition: Ifx_LutAtan2F32.h:40
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:45
Ifx_g_LutAtan2F32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32.h:41
float32
float float32
Definition: Platform_Types.h:167
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:64
Ifx_LutAtan2F32_init
IFX_EXTERN void Ifx_LutAtan2F32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutAtan2F32.c:29
Ifx_LutAtan2F32_fxpAngle
IFX_EXTERN Ifx_Lut_FxpAngle Ifx_LutAtan2F32_fxpAngle(float32 x, float32 y)
Look-up arcus tangent value of y/x.
Definition: Ifx_LutAtan2F32.c:67


iLLD_TC26B: Ifx_LutAtan2F32_Table.c Source File

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Ifx_LutAtan2F32_Table.c
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1 /**
2 * \file Ifx_LutAtan2F32_Table.c
3 * \brief Table data for ATAN2 lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "Ifx_LutAtan2F32.h"
27
28 #if IFX_LUT_TABLE_CONST == 0
29 /* FIXME Table size and type not consistent */
30 sint16 Ifx_g_LutAtan2F32_FxpAngle_table[IFX_LUTATAN2F32_SIZE];
31 #else
32
33 #if (IFX_LUTATAN2F32_SIZE != 1024)
34 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
35 #endif
36
37 const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024 + 1] = {
38 IFX_LUT_F32_TO_FXPANGLE(0),
39 IFX_LUT_F32_TO_FXPANGLE(0.000976562189559319),
40 IFX_LUT_F32_TO_FXPANGLE(0.00195312251647882),
41 IFX_LUT_F32_TO_FXPANGLE(0.00292967911813999),
42 IFX_LUT_F32_TO_FXPANGLE(0.00390623013196697),
43 IFX_LUT_F32_TO_FXPANGLE(0.00488277369544783),
44 IFX_LUT_F32_TO_FXPANGLE(0.00585930794615589),
45 IFX_LUT_F32_TO_FXPANGLE(0.00683583102177106),
46 IFX_LUT_F32_TO_FXPANGLE(0.00781234106010111),
47 IFX_LUT_F32_TO_FXPANGLE(0.008788836199103),
48 IFX_LUT_F32_TO_FXPANGLE(0.00976531457690415),
49 IFX_LUT_F32_TO_FXPANGLE(0.0107417743318238),
50 IFX_LUT_F32_TO_FXPANGLE(0.0117182136023941),
51 IFX_LUT_F32_TO_FXPANGLE(0.0126946305273818),
52 IFX_LUT_F32_TO_FXPANGLE(0.0136710232458091),
53 IFX_LUT_F32_TO_FXPANGLE(0.014647389896975),
54 IFX_LUT_F32_TO_FXPANGLE(0.0156237286204768),
55 IFX_LUT_F32_TO_FXPANGLE(0.0166000375562313),
56 IFX_LUT_F32_TO_FXPANGLE(0.0175763148444956),
57 IFX_LUT_F32_TO_FXPANGLE(0.018552558625889),
58 IFX_LUT_F32_TO_FXPANGLE(0.0195287670414137),
59 IFX_LUT_F32_TO_FXPANGLE(0.0205049382324764),
60 IFX_LUT_F32_TO_FXPANGLE(0.0214810703409091),
61 IFX_LUT_F32_TO_FXPANGLE(0.0224571615089906),
62 IFX_LUT_F32_TO_FXPANGLE(0.0234332098794676),
63 IFX_LUT_F32_TO_FXPANGLE(0.0244092135955758),
64 IFX_LUT_F32_TO_FXPANGLE(0.0253851708010611),
65 IFX_LUT_F32_TO_FXPANGLE(0.0263610796402008),
66 IFX_LUT_F32_TO_FXPANGLE(0.0273369382578244),
67 IFX_LUT_F32_TO_FXPANGLE(0.0283127447993352),
68 IFX_LUT_F32_TO_FXPANGLE(0.029288497410731),
69 IFX_LUT_F32_TO_FXPANGLE(0.0302641942386252),
70 IFX_LUT_F32_TO_FXPANGLE(0.0312398334302683),
71 IFX_LUT_F32_TO_FXPANGLE(0.0322154131335681),
72 IFX_LUT_F32_TO_FXPANGLE(0.0331909314971116),
73 IFX_LUT_F32_TO_FXPANGLE(0.0341663866701854),
74 IFX_LUT_F32_TO_FXPANGLE(0.0351417768027968),
75 IFX_LUT_F32_TO_FXPANGLE(0.036117100045695),
76 IFX_LUT_F32_TO_FXPANGLE(0.0370923545503918),
77 IFX_LUT_F32_TO_FXPANGLE(0.0380675384691825),
78 IFX_LUT_F32_TO_FXPANGLE(0.039042649955167),
79 IFX_LUT_F32_TO_FXPANGLE(0.0400176871622703),
80 IFX_LUT_F32_TO_FXPANGLE(0.0409926482452638),
81 IFX_LUT_F32_TO_FXPANGLE(0.0419675313597857),
82 IFX_LUT_F32_TO_FXPANGLE(0.0429423346623622),
83 IFX_LUT_F32_TO_FXPANGLE(0.0439170563104278),
84 IFX_LUT_F32_TO_FXPANGLE(0.0448916944623465),
85 IFX_LUT_F32_TO_FXPANGLE(0.0458662472774322),
86 IFX_LUT_F32_TO_FXPANGLE(0.0468407129159697),
87 IFX_LUT_F32_TO_FXPANGLE(0.0478150895392348),
88 IFX_LUT_F32_TO_FXPANGLE(0.0487893753095156),
89 IFX_LUT_F32_TO_FXPANGLE(0.0497635683901328),
90 IFX_LUT_F32_TO_FXPANGLE(0.0507376669454602),
91 IFX_LUT_F32_TO_FXPANGLE(0.0517116691409454),
92 IFX_LUT_F32_TO_FXPANGLE(0.05268557314313),
93 IFX_LUT_F32_TO_FXPANGLE(0.0536593771196708),
94 IFX_LUT_F32_TO_FXPANGLE(0.0546330792393595),
95 IFX_LUT_F32_TO_FXPANGLE(0.0556066776721433),
96 IFX_LUT_F32_TO_FXPANGLE(0.0565801705891457),
97 IFX_LUT_F32_TO_FXPANGLE(0.0575535561626864),
98 IFX_LUT_F32_TO_FXPANGLE(0.0585268325663018),
99 IFX_LUT_F32_TO_FXPANGLE(0.0594999979747652),
100 IFX_LUT_F32_TO_FXPANGLE(0.0604730505641073),
101 IFX_LUT_F32_TO_FXPANGLE(0.0614459885116361),
102 IFX_LUT_F32_TO_FXPANGLE(0.0624188099959574),
103 IFX_LUT_F32_TO_FXPANGLE(0.0633915131969944),
104 IFX_LUT_F32_TO_FXPANGLE(0.0643640962960086),
105 IFX_LUT_F32_TO_FXPANGLE(0.0653365574756192),
106 IFX_LUT_F32_TO_FXPANGLE(0.0663088949198235),
107 IFX_LUT_F32_TO_FXPANGLE(0.0672811068140167),
108 IFX_LUT_F32_TO_FXPANGLE(0.068253191345012),
109 IFX_LUT_F32_TO_FXPANGLE(0.0692251467010603),
110 IFX_LUT_F32_TO_FXPANGLE(0.0701969710718705),
111 IFX_LUT_F32_TO_FXPANGLE(0.0711686626486288),
112 IFX_LUT_F32_TO_FXPANGLE(0.0721402196240188),
113 IFX_LUT_F32_TO_FXPANGLE(0.0731116401922413),
114 IFX_LUT_F32_TO_FXPANGLE(0.0740829225490337),
115 IFX_LUT_F32_TO_FXPANGLE(0.0750540648916902),
116 IFX_LUT_F32_TO_FXPANGLE(0.0760250654190807),
117 IFX_LUT_F32_TO_FXPANGLE(0.0769959223316711),
118 IFX_LUT_F32_TO_FXPANGLE(0.0779666338315423),
119 IFX_LUT_F32_TO_FXPANGLE(0.07893719812241),
120 IFX_LUT_F32_TO_FXPANGLE(0.0799076134096439),
121 IFX_LUT_F32_TO_FXPANGLE(0.0808778779002873),
122 IFX_LUT_F32_TO_FXPANGLE(0.0818479898030765),
123 IFX_LUT_F32_TO_FXPANGLE(0.0828179473284599),
124 IFX_LUT_F32_TO_FXPANGLE(0.0837877486886171),
125 IFX_LUT_F32_TO_FXPANGLE(0.0847573920974787),
126 IFX_LUT_F32_TO_FXPANGLE(0.0857268757707448),
127 IFX_LUT_F32_TO_FXPANGLE(0.0866961979259047),
128 IFX_LUT_F32_TO_FXPANGLE(0.0876653567822554),
129 IFX_LUT_F32_TO_FXPANGLE(0.0886343505609211),
130 IFX_LUT_F32_TO_FXPANGLE(0.0896031774848717),
131 IFX_LUT_F32_TO_FXPANGLE(0.0905718357789422),
132 IFX_LUT_F32_TO_FXPANGLE(0.0915403236698511),
133 IFX_LUT_F32_TO_FXPANGLE(0.0925086393862194),
134 IFX_LUT_F32_TO_FXPANGLE(0.0934767811585895),
135 IFX_LUT_F32_TO_FXPANGLE(0.0944447472194436),
136 IFX_LUT_F32_TO_FXPANGLE(0.0954125358032227),
137 IFX_LUT_F32_TO_FXPANGLE(0.0963801451463448),
138 IFX_LUT_F32_TO_FXPANGLE(0.0973475734872237),
139 IFX_LUT_F32_TO_FXPANGLE(0.0983148190662873),
140 IFX_LUT_F32_TO_FXPANGLE(0.0992818801259964),
141 IFX_LUT_F32_TO_FXPANGLE(0.100248754910863),
142 IFX_LUT_F32_TO_FXPANGLE(0.101215441667467),
143 IFX_LUT_F32_TO_FXPANGLE(0.102181938644477),
144 IFX_LUT_F32_TO_FXPANGLE(0.103148244092669),
145 IFX_LUT_F32_TO_FXPANGLE(0.10411435626494),
146 IFX_LUT_F32_TO_FXPANGLE(0.10508027341633),
147 IFX_LUT_F32_TO_FXPANGLE(0.106045993804039),
148 IFX_LUT_F32_TO_FXPANGLE(0.107011515687447),
149 IFX_LUT_F32_TO_FXPANGLE(0.107976837328126),
150 IFX_LUT_F32_TO_FXPANGLE(0.108941956989866),
151 IFX_LUT_F32_TO_FXPANGLE(0.109906872938685),
152 IFX_LUT_F32_TO_FXPANGLE(0.110871583442852),
153 IFX_LUT_F32_TO_FXPANGLE(0.111836086772904),
154 IFX_LUT_F32_TO_FXPANGLE(0.112800381201659),
155 IFX_LUT_F32_TO_FXPANGLE(0.113764465004242),
156 IFX_LUT_F32_TO_FXPANGLE(0.114728336458092),
157 IFX_LUT_F32_TO_FXPANGLE(0.115691993842991),
158 IFX_LUT_F32_TO_FXPANGLE(0.116655435441069),
159 IFX_LUT_F32_TO_FXPANGLE(0.117618659536834),
160 IFX_LUT_F32_TO_FXPANGLE(0.118581664417177),
161 IFX_LUT_F32_TO_FXPANGLE(0.1195444483714),
162 IFX_LUT_F32_TO_FXPANGLE(0.120507009691225),
163 IFX_LUT_F32_TO_FXPANGLE(0.121469346670814),
164 IFX_LUT_F32_TO_FXPANGLE(0.122431457606789),
165 IFX_LUT_F32_TO_FXPANGLE(0.123393340798243),
166 IFX_LUT_F32_TO_FXPANGLE(0.124354994546761),
167 IFX_LUT_F32_TO_FXPANGLE(0.125316417156437),
168 IFX_LUT_F32_TO_FXPANGLE(0.126277606933887),
169 IFX_LUT_F32_TO_FXPANGLE(0.127238562188269),
170 IFX_LUT_F32_TO_FXPANGLE(0.128199281231298),
171 IFX_LUT_F32_TO_FXPANGLE(0.129159762377265),
172 IFX_LUT_F32_TO_FXPANGLE(0.130120003943049),
173 IFX_LUT_F32_TO_FXPANGLE(0.131080004248137),
174 IFX_LUT_F32_TO_FXPANGLE(0.132039761614639),
175 IFX_LUT_F32_TO_FXPANGLE(0.132999274367304),
176 IFX_LUT_F32_TO_FXPANGLE(0.133958540833537),
177 IFX_LUT_F32_TO_FXPANGLE(0.134917559343415),
178 IFX_LUT_F32_TO_FXPANGLE(0.135876328229701),
179 IFX_LUT_F32_TO_FXPANGLE(0.136834845827863),
180 IFX_LUT_F32_TO_FXPANGLE(0.137793110476088),
181 IFX_LUT_F32_TO_FXPANGLE(0.138751120515297),
182 IFX_LUT_F32_TO_FXPANGLE(0.139708874289164),
183 IFX_LUT_F32_TO_FXPANGLE(0.140666370144127),
184 IFX_LUT_F32_TO_FXPANGLE(0.14162360642941),
185 IFX_LUT_F32_TO_FXPANGLE(0.14258058149703),
186 IFX_LUT_F32_TO_FXPANGLE(0.143537293701821),
187 IFX_LUT_F32_TO_FXPANGLE(0.144493741401443),
188 IFX_LUT_F32_TO_FXPANGLE(0.145449922956401),
189 IFX_LUT_F32_TO_FXPANGLE(0.146405836730058),
190 IFX_LUT_F32_TO_FXPANGLE(0.147361481088652),
191 IFX_LUT_F32_TO_FXPANGLE(0.148316854401309),
192 IFX_LUT_F32_TO_FXPANGLE(0.14927195504006),
193 IFX_LUT_F32_TO_FXPANGLE(0.150226781379856),
194 IFX_LUT_F32_TO_FXPANGLE(0.15118133179858),
195 IFX_LUT_F32_TO_FXPANGLE(0.152135604677064),
196 IFX_LUT_F32_TO_FXPANGLE(0.153089598399105),
197 IFX_LUT_F32_TO_FXPANGLE(0.154043311351475),
198 IFX_LUT_F32_TO_FXPANGLE(0.154996741923941),
199 IFX_LUT_F32_TO_FXPANGLE(0.155949888509276),
200 IFX_LUT_F32_TO_FXPANGLE(0.156902749503275),
201 IFX_LUT_F32_TO_FXPANGLE(0.157855323304766),
202 IFX_LUT_F32_TO_FXPANGLE(0.158807608315631),
203 IFX_LUT_F32_TO_FXPANGLE(0.159759602940813),
204 IFX_LUT_F32_TO_FXPANGLE(0.160711305588332),
205 IFX_LUT_F32_TO_FXPANGLE(0.161662714669305),
206 IFX_LUT_F32_TO_FXPANGLE(0.162613828597949),
207 IFX_LUT_F32_TO_FXPANGLE(0.163564645791604),
208 IFX_LUT_F32_TO_FXPANGLE(0.164515164670743),
209 IFX_LUT_F32_TO_FXPANGLE(0.165465383658987),
210 IFX_LUT_F32_TO_FXPANGLE(0.166415301183115),
211 IFX_LUT_F32_TO_FXPANGLE(0.167364915673083),
212 IFX_LUT_F32_TO_FXPANGLE(0.168314225562034),
213 IFX_LUT_F32_TO_FXPANGLE(0.169263229286312),
214 IFX_LUT_F32_TO_FXPANGLE(0.170211925285474),
215 IFX_LUT_F32_TO_FXPANGLE(0.171160312002307),
216 IFX_LUT_F32_TO_FXPANGLE(0.172108387882836),
217 IFX_LUT_F32_TO_FXPANGLE(0.17305615137634),
218 IFX_LUT_F32_TO_FXPANGLE(0.174003600935368),
219 IFX_LUT_F32_TO_FXPANGLE(0.174950735015743),
220 IFX_LUT_F32_TO_FXPANGLE(0.175897552076585),
221 IFX_LUT_F32_TO_FXPANGLE(0.176844050580316),
222 IFX_LUT_F32_TO_FXPANGLE(0.177790228992676),
223 IFX_LUT_F32_TO_FXPANGLE(0.178736085782736),
224 IFX_LUT_F32_TO_FXPANGLE(0.179681619422909),
225 IFX_LUT_F32_TO_FXPANGLE(0.180626828388963),
226 IFX_LUT_F32_TO_FXPANGLE(0.181571711160032),
227 IFX_LUT_F32_TO_FXPANGLE(0.182516266218631),
228 IFX_LUT_F32_TO_FXPANGLE(0.183460492050666),
229 IFX_LUT_F32_TO_FXPANGLE(0.184404387145446),
230 IFX_LUT_F32_TO_FXPANGLE(0.185347949995695),
231 IFX_LUT_F32_TO_FXPANGLE(0.186291179097566),
232 IFX_LUT_F32_TO_FXPANGLE(0.187234072950649),
233 IFX_LUT_F32_TO_FXPANGLE(0.188176630057987),
234 IFX_LUT_F32_TO_FXPANGLE(0.189118848926084),
235 IFX_LUT_F32_TO_FXPANGLE(0.190060728064918),
236 IFX_LUT_F32_TO_FXPANGLE(0.191002265987953),
237 IFX_LUT_F32_TO_FXPANGLE(0.191943461212149),
238 IFX_LUT_F32_TO_FXPANGLE(0.192884312257975),
239 IFX_LUT_F32_TO_FXPANGLE(0.193824817649417),
240 IFX_LUT_F32_TO_FXPANGLE(0.194764975913995),
241 IFX_LUT_F32_TO_FXPANGLE(0.195704785582767),
242 IFX_LUT_F32_TO_FXPANGLE(0.196644245190345),
243 IFX_LUT_F32_TO_FXPANGLE(0.197583353274903),
244 IFX_LUT_F32_TO_FXPANGLE(0.19852210837819),
245 IFX_LUT_F32_TO_FXPANGLE(0.199460509045539),
246 IFX_LUT_F32_TO_FXPANGLE(0.200398553825879),
247 IFX_LUT_F32_TO_FXPANGLE(0.201336241271742),
248 IFX_LUT_F32_TO_FXPANGLE(0.202273569939279),
249 IFX_LUT_F32_TO_FXPANGLE(0.203210538388266),
250 IFX_LUT_F32_TO_FXPANGLE(0.204147145182117),
251 IFX_LUT_F32_TO_FXPANGLE(0.205083388887891),
252 IFX_LUT_F32_TO_FXPANGLE(0.206019268076305),
253 IFX_LUT_F32_TO_FXPANGLE(0.206954781321742),
254 IFX_LUT_F32_TO_FXPANGLE(0.207889927202263),
255 IFX_LUT_F32_TO_FXPANGLE(0.208824704299615),
256 IFX_LUT_F32_TO_FXPANGLE(0.209759111199241),
257 IFX_LUT_F32_TO_FXPANGLE(0.210693146490291),
258 IFX_LUT_F32_TO_FXPANGLE(0.21162680876563),
259 IFX_LUT_F32_TO_FXPANGLE(0.212560096621847),
260 IFX_LUT_F32_TO_FXPANGLE(0.213493008659266),
261 IFX_LUT_F32_TO_FXPANGLE(0.214425543481956),
262 IFX_LUT_F32_TO_FXPANGLE(0.215357699697738),
263 IFX_LUT_F32_TO_FXPANGLE(0.216289475918194),
264 IFX_LUT_F32_TO_FXPANGLE(0.217220870758679),
265 IFX_LUT_F32_TO_FXPANGLE(0.218151882838326),
266 IFX_LUT_F32_TO_FXPANGLE(0.219082510780058),
267 IFX_LUT_F32_TO_FXPANGLE(0.220012753210596),
268 IFX_LUT_F32_TO_FXPANGLE(0.220942608760466),
269 IFX_LUT_F32_TO_FXPANGLE(0.22187207606401),
270 IFX_LUT_F32_TO_FXPANGLE(0.222801153759395),
271 IFX_LUT_F32_TO_FXPANGLE(0.223729840488615),
272 IFX_LUT_F32_TO_FXPANGLE(0.22465813489751),
273 IFX_LUT_F32_TO_FXPANGLE(0.225586035635764),
274 IFX_LUT_F32_TO_FXPANGLE(0.22651354135692),
275 IFX_LUT_F32_TO_FXPANGLE(0.227440650718385),
276 IFX_LUT_F32_TO_FXPANGLE(0.228367362381439),
277 IFX_LUT_F32_TO_FXPANGLE(0.229293675011242),
278 IFX_LUT_F32_TO_FXPANGLE(0.230219587276844),
279 IFX_LUT_F32_TO_FXPANGLE(0.231145097851188),
280 IFX_LUT_F32_TO_FXPANGLE(0.232070205411125),
281 IFX_LUT_F32_TO_FXPANGLE(0.232994908637414),
282 IFX_LUT_F32_TO_FXPANGLE(0.233919206214733),
283 IFX_LUT_F32_TO_FXPANGLE(0.234843096831689),
284 IFX_LUT_F32_TO_FXPANGLE(0.23576657918082),
285 IFX_LUT_F32_TO_FXPANGLE(0.236689651958605),
286 IFX_LUT_F32_TO_FXPANGLE(0.237612313865471),
287 IFX_LUT_F32_TO_FXPANGLE(0.238534563605801),
288 IFX_LUT_F32_TO_FXPANGLE(0.239456399887938),
289 IFX_LUT_F32_TO_FXPANGLE(0.240377821424194),
290 IFX_LUT_F32_TO_FXPANGLE(0.241298826930859),
291 IFX_LUT_F32_TO_FXPANGLE(0.242219415128201),
292 IFX_LUT_F32_TO_FXPANGLE(0.24313958474048),
293 IFX_LUT_F32_TO_FXPANGLE(0.244059334495949),
294 IFX_LUT_F32_TO_FXPANGLE(0.244978663126864),
295 IFX_LUT_F32_TO_FXPANGLE(0.24589756936949),
296 IFX_LUT_F32_TO_FXPANGLE(0.246816051964103),
297 IFX_LUT_F32_TO_FXPANGLE(0.247734109655002),
298 IFX_LUT_F32_TO_FXPANGLE(0.248651741190513),
299 IFX_LUT_F32_TO_FXPANGLE(0.249568945322993),
300 IFX_LUT_F32_TO_FXPANGLE(0.250485720808836),
301 IFX_LUT_F32_TO_FXPANGLE(0.251402066408485),
302 IFX_LUT_F32_TO_FXPANGLE(0.252317980886427),
303 IFX_LUT_F32_TO_FXPANGLE(0.25323346301121),
304 IFX_LUT_F32_TO_FXPANGLE(0.254148511555439),
305 IFX_LUT_F32_TO_FXPANGLE(0.25506312529579),
306 IFX_LUT_F32_TO_FXPANGLE(0.255977303013006),
307 IFX_LUT_F32_TO_FXPANGLE(0.25689104349191),
308 IFX_LUT_F32_TO_FXPANGLE(0.25780434552141),
309 IFX_LUT_F32_TO_FXPANGLE(0.258717207894497),
310 IFX_LUT_F32_TO_FXPANGLE(0.259629629408258),
311 IFX_LUT_F32_TO_FXPANGLE(0.260541608863876),
312 IFX_LUT_F32_TO_FXPANGLE(0.261453145066638),
313 IFX_LUT_F32_TO_FXPANGLE(0.262364236825938),
314 IFX_LUT_F32_TO_FXPANGLE(0.263274882955282),
315 IFX_LUT_F32_TO_FXPANGLE(0.264185082272293),
316 IFX_LUT_F32_TO_FXPANGLE(0.265094833598715),
317 IFX_LUT_F32_TO_FXPANGLE(0.266004135760417),
318 IFX_LUT_F32_TO_FXPANGLE(0.2669129875874),
319 IFX_LUT_F32_TO_FXPANGLE(0.267821387913799),
320 IFX_LUT_F32_TO_FXPANGLE(0.268729335577886),
321 IFX_LUT_F32_TO_FXPANGLE(0.269636829422078),
322 IFX_LUT_F32_TO_FXPANGLE(0.270543868292937),
323 IFX_LUT_F32_TO_FXPANGLE(0.271450451041176),
324 IFX_LUT_F32_TO_FXPANGLE(0.272356576521665),
325 IFX_LUT_F32_TO_FXPANGLE(0.27326224359343),
326 IFX_LUT_F32_TO_FXPANGLE(0.274167451119659),
327 IFX_LUT_F32_TO_FXPANGLE(0.275072197967707),
328 IFX_LUT_F32_TO_FXPANGLE(0.275976483009098),
329 IFX_LUT_F32_TO_FXPANGLE(0.27688030511953),
330 IFX_LUT_F32_TO_FXPANGLE(0.277783663178873),
331 IFX_LUT_F32_TO_FXPANGLE(0.278686556071182),
332 IFX_LUT_F32_TO_FXPANGLE(0.27958898268469),
333 IFX_LUT_F32_TO_FXPANGLE(0.280490941911819),
334 IFX_LUT_F32_TO_FXPANGLE(0.281392432649178),
335 IFX_LUT_F32_TO_FXPANGLE(0.282293453797569),
336 IFX_LUT_F32_TO_FXPANGLE(0.283194004261987),
337 IFX_LUT_F32_TO_FXPANGLE(0.284094082951627),
338 IFX_LUT_F32_TO_FXPANGLE(0.284993688779881),
339 IFX_LUT_F32_TO_FXPANGLE(0.285892820664347),
340 IFX_LUT_F32_TO_FXPANGLE(0.286791477526827),
341 IFX_LUT_F32_TO_FXPANGLE(0.28768965829333),
342 IFX_LUT_F32_TO_FXPANGLE(0.288587361894077),
343 IFX_LUT_F32_TO_FXPANGLE(0.289484587263501),
344 IFX_LUT_F32_TO_FXPANGLE(0.29038133334025),
345 IFX_LUT_F32_TO_FXPANGLE(0.291277599067188),
346 IFX_LUT_F32_TO_FXPANGLE(0.292173383391399),
347 IFX_LUT_F32_TO_FXPANGLE(0.293068685264188),
348 IFX_LUT_F32_TO_FXPANGLE(0.293963503641084),
349 IFX_LUT_F32_TO_FXPANGLE(0.294857837481838),
350 IFX_LUT_F32_TO_FXPANGLE(0.295751685750432),
351 IFX_LUT_F32_TO_FXPANGLE(0.296645047415071),
352 IFX_LUT_F32_TO_FXPANGLE(0.297537921448196),
353 IFX_LUT_F32_TO_FXPANGLE(0.298430306826474),
354 IFX_LUT_F32_TO_FXPANGLE(0.299322202530807),
355 IFX_LUT_F32_TO_FXPANGLE(0.300213607546333),
356 IFX_LUT_F32_TO_FXPANGLE(0.301104520862424),
357 IFX_LUT_F32_TO_FXPANGLE(0.301994941472688),
358 IFX_LUT_F32_TO_FXPANGLE(0.302884868374971),
359 IFX_LUT_F32_TO_FXPANGLE(0.303774300571361),
360 IFX_LUT_F32_TO_FXPANGLE(0.304663237068183),
361 IFX_LUT_F32_TO_FXPANGLE(0.305551676876003),
362 IFX_LUT_F32_TO_FXPANGLE(0.30643961900963),
363 IFX_LUT_F32_TO_FXPANGLE(0.307327062488116),
364 IFX_LUT_F32_TO_FXPANGLE(0.308214006334753),
365 IFX_LUT_F32_TO_FXPANGLE(0.309100449577082),
366 IFX_LUT_F32_TO_FXPANGLE(0.309986391246883),
367 IFX_LUT_F32_TO_FXPANGLE(0.310871830380185),
368 IFX_LUT_F32_TO_FXPANGLE(0.31175676601726),
369 IFX_LUT_F32_TO_FXPANGLE(0.312641197202625),
370 IFX_LUT_F32_TO_FXPANGLE(0.313525122985044),
371 IFX_LUT_F32_TO_FXPANGLE(0.314408542417527),
372 IFX_LUT_F32_TO_FXPANGLE(0.31529145455733),
373 IFX_LUT_F32_TO_FXPANGLE(0.316173858465954),
374 IFX_LUT_F32_TO_FXPANGLE(0.317055753209147),
375 IFX_LUT_F32_TO_FXPANGLE(0.317937137856902),
376 IFX_LUT_F32_TO_FXPANGLE(0.318818011483458),
377 IFX_LUT_F32_TO_FXPANGLE(0.3196983731673),
378 IFX_LUT_F32_TO_FXPANGLE(0.320578221991157),
379 IFX_LUT_F32_TO_FXPANGLE(0.321457557042003),
380 IFX_LUT_F32_TO_FXPANGLE(0.322336377411056),
381 IFX_LUT_F32_TO_FXPANGLE(0.323214682193777),
382 IFX_LUT_F32_TO_FXPANGLE(0.324092470489872),
383 IFX_LUT_F32_TO_FXPANGLE(0.324969741403286),
384 IFX_LUT_F32_TO_FXPANGLE(0.325846494042208),
385 IFX_LUT_F32_TO_FXPANGLE(0.326722727519067),
386 IFX_LUT_F32_TO_FXPANGLE(0.327598440950531),
387 IFX_LUT_F32_TO_FXPANGLE(0.328473633457506),
388 IFX_LUT_F32_TO_FXPANGLE(0.329348304165139),
389 IFX_LUT_F32_TO_FXPANGLE(0.330222452202808),
390 IFX_LUT_F32_TO_FXPANGLE(0.331096076704132),
391 IFX_LUT_F32_TO_FXPANGLE(0.33196917680696),
392 IFX_LUT_F32_TO_FXPANGLE(0.332841751653376),
393 IFX_LUT_F32_TO_FXPANGLE(0.333713800389694),
394 IFX_LUT_F32_TO_FXPANGLE(0.334585322166459),
395 IFX_LUT_F32_TO_FXPANGLE(0.335456316138443),
396 IFX_LUT_F32_TO_FXPANGLE(0.336326781464645),
397 IFX_LUT_F32_TO_FXPANGLE(0.33719671730829),
398 IFX_LUT_F32_TO_FXPANGLE(0.338066122836825),
399 IFX_LUT_F32_TO_FXPANGLE(0.338934997221921),
400 IFX_LUT_F32_TO_FXPANGLE(0.339803339639465),
401 IFX_LUT_F32_TO_FXPANGLE(0.340671149269565),
402 IFX_LUT_F32_TO_FXPANGLE(0.341538425296542),
403 IFX_LUT_F32_TO_FXPANGLE(0.342405166908932),
404 IFX_LUT_F32_TO_FXPANGLE(0.343271373299484),
405 IFX_LUT_F32_TO_FXPANGLE(0.344137043665154),
406 IFX_LUT_F32_TO_FXPANGLE(0.345002177207105),
407 IFX_LUT_F32_TO_FXPANGLE(0.345866773130707),
408 IFX_LUT_F32_TO_FXPANGLE(0.34673083064553),
409 IFX_LUT_F32_TO_FXPANGLE(0.347594348965346),
410 IFX_LUT_F32_TO_FXPANGLE(0.348457327308122),
411 IFX_LUT_F32_TO_FXPANGLE(0.349319764896022),
412 IFX_LUT_F32_TO_FXPANGLE(0.350181660955402),
413 IFX_LUT_F32_TO_FXPANGLE(0.351043014716805),
414 IFX_LUT_F32_TO_FXPANGLE(0.351903825414965),
415 IFX_LUT_F32_TO_FXPANGLE(0.352764092288795),
416 IFX_LUT_F32_TO_FXPANGLE(0.353623814581394),
417 IFX_LUT_F32_TO_FXPANGLE(0.354482991540035),
418 IFX_LUT_F32_TO_FXPANGLE(0.355341622416168),
419 IFX_LUT_F32_TO_FXPANGLE(0.356199706465416),
420 IFX_LUT_F32_TO_FXPANGLE(0.357057242947567),
421 IFX_LUT_F32_TO_FXPANGLE(0.35791423112658),
422 IFX_LUT_F32_TO_FXPANGLE(0.358770670270572),
423 IFX_LUT_F32_TO_FXPANGLE(0.359626559651822),
424 IFX_LUT_F32_TO_FXPANGLE(0.360481898546763),
425 IFX_LUT_F32_TO_FXPANGLE(0.361336686235982),
426 IFX_LUT_F32_TO_FXPANGLE(0.362190922004212),
427 IFX_LUT_F32_TO_FXPANGLE(0.363044605140335),
428 IFX_LUT_F32_TO_FXPANGLE(0.363897734937373),
429 IFX_LUT_F32_TO_FXPANGLE(0.364750310692485),
430 IFX_LUT_F32_TO_FXPANGLE(0.365602331706967),
431 IFX_LUT_F32_TO_FXPANGLE(0.366453797286243),
432 IFX_LUT_F32_TO_FXPANGLE(0.367304706739864),
433 IFX_LUT_F32_TO_FXPANGLE(0.368155059381507),
434 IFX_LUT_F32_TO_FXPANGLE(0.369004854528964),
435 IFX_LUT_F32_TO_FXPANGLE(0.369854091504145),
436 IFX_LUT_F32_TO_FXPANGLE(0.370702769633069),
437 IFX_LUT_F32_TO_FXPANGLE(0.371550888245862),
438 IFX_LUT_F32_TO_FXPANGLE(0.372398446676754),
439 IFX_LUT_F32_TO_FXPANGLE(0.373245444264073),
440 IFX_LUT_F32_TO_FXPANGLE(0.374091880350239),
441 IFX_LUT_F32_TO_FXPANGLE(0.374937754281765),
442 IFX_LUT_F32_TO_FXPANGLE(0.375783065409249),
443 IFX_LUT_F32_TO_FXPANGLE(0.376627813087368),
444 IFX_LUT_F32_TO_FXPANGLE(0.377471996674877),
445 IFX_LUT_F32_TO_FXPANGLE(0.378315615534604),
446 IFX_LUT_F32_TO_FXPANGLE(0.379158669033442),
447 IFX_LUT_F32_TO_FXPANGLE(0.380001156542349),
448 IFX_LUT_F32_TO_FXPANGLE(0.380843077436342),
449 IFX_LUT_F32_TO_FXPANGLE(0.381684431094488),
450 IFX_LUT_F32_TO_FXPANGLE(0.382525216899905),
451 IFX_LUT_F32_TO_FXPANGLE(0.383365434239755),
452 IFX_LUT_F32_TO_FXPANGLE(0.384205082505239),
453 IFX_LUT_F32_TO_FXPANGLE(0.385044161091591),
454 IFX_LUT_F32_TO_FXPANGLE(0.385882669398074),
455 IFX_LUT_F32_TO_FXPANGLE(0.386720606827975),
456 IFX_LUT_F32_TO_FXPANGLE(0.387557972788602),
457 IFX_LUT_F32_TO_FXPANGLE(0.388394766691274),
458 IFX_LUT_F32_TO_FXPANGLE(0.389230987951321),
459 IFX_LUT_F32_TO_FXPANGLE(0.390066635988073),
460 IFX_LUT_F32_TO_FXPANGLE(0.390901710224862),
461 IFX_LUT_F32_TO_FXPANGLE(0.39173621008901),
462 IFX_LUT_F32_TO_FXPANGLE(0.392570135011829),
463 IFX_LUT_F32_TO_FXPANGLE(0.393403484428609),
464 IFX_LUT_F32_TO_FXPANGLE(0.394236257778621),
465 IFX_LUT_F32_TO_FXPANGLE(0.395068454505103),
466 IFX_LUT_F32_TO_FXPANGLE(0.395900074055263),
467 IFX_LUT_F32_TO_FXPANGLE(0.396731115880264),
468 IFX_LUT_F32_TO_FXPANGLE(0.397561579435227),
469 IFX_LUT_F32_TO_FXPANGLE(0.39839146417922),
470 IFX_LUT_F32_TO_FXPANGLE(0.399220769575253),
471 IFX_LUT_F32_TO_FXPANGLE(0.400049495090274),
472 IFX_LUT_F32_TO_FXPANGLE(0.400877640195163),
473 IFX_LUT_F32_TO_FXPANGLE(0.401705204364725),
474 IFX_LUT_F32_TO_FXPANGLE(0.402532187077683),
475 IFX_LUT_F32_TO_FXPANGLE(0.403358587816674),
476 IFX_LUT_F32_TO_FXPANGLE(0.404184406068245),
477 IFX_LUT_F32_TO_FXPANGLE(0.405009641322841),
478 IFX_LUT_F32_TO_FXPANGLE(0.405834293074804),
479 IFX_LUT_F32_TO_FXPANGLE(0.406658360822366),
480 IFX_LUT_F32_TO_FXPANGLE(0.407481844067642),
481 IFX_LUT_F32_TO_FXPANGLE(0.408304742316622),
482 IFX_LUT_F32_TO_FXPANGLE(0.409127055079168),
483 IFX_LUT_F32_TO_FXPANGLE(0.409948781869008),
484 IFX_LUT_F32_TO_FXPANGLE(0.410769922203726),
485 IFX_LUT_F32_TO_FXPANGLE(0.411590475604759),
486 IFX_LUT_F32_TO_FXPANGLE(0.412410441597387),
487 IFX_LUT_F32_TO_FXPANGLE(0.413229819710733),
488 IFX_LUT_F32_TO_FXPANGLE(0.414048609477749),
489 IFX_LUT_F32_TO_FXPANGLE(0.414866810435215),
490 IFX_LUT_F32_TO_FXPANGLE(0.415684422123729),
491 IFX_LUT_F32_TO_FXPANGLE(0.416501444087703),
492 IFX_LUT_F32_TO_FXPANGLE(0.417317875875355),
493 IFX_LUT_F32_TO_FXPANGLE(0.418133717038701),
494 IFX_LUT_F32_TO_FXPANGLE(0.418948967133553),
495 IFX_LUT_F32_TO_FXPANGLE(0.419763625719506),
496 IFX_LUT_F32_TO_FXPANGLE(0.420577692359935),
497 IFX_LUT_F32_TO_FXPANGLE(0.42139116662199),
498 IFX_LUT_F32_TO_FXPANGLE(0.422204048076584),
499 IFX_LUT_F32_TO_FXPANGLE(0.423016336298389),
500 IFX_LUT_F32_TO_FXPANGLE(0.423828030865831),
501 IFX_LUT_F32_TO_FXPANGLE(0.42463913136108),
502 IFX_LUT_F32_TO_FXPANGLE(0.425449637370042),
503 IFX_LUT_F32_TO_FXPANGLE(0.426259548482358),
504 IFX_LUT_F32_TO_FXPANGLE(0.427068864291389),
505 IFX_LUT_F32_TO_FXPANGLE(0.427877584394215),
506 IFX_LUT_F32_TO_FXPANGLE(0.428685708391626),
507 IFX_LUT_F32_TO_FXPANGLE(0.429493235888114),
508 IFX_LUT_F32_TO_FXPANGLE(0.430300166491866),
509 IFX_LUT_F32_TO_FXPANGLE(0.431106499814758),
510 IFX_LUT_F32_TO_FXPANGLE(0.431912235472348),
511 IFX_LUT_F32_TO_FXPANGLE(0.432717373083866),
512 IFX_LUT_F32_TO_FXPANGLE(0.433521912272209),
513 IFX_LUT_F32_TO_FXPANGLE(0.434325852663933),
514 IFX_LUT_F32_TO_FXPANGLE(0.435129193889247),
515 IFX_LUT_F32_TO_FXPANGLE(0.435931935582003),
516 IFX_LUT_F32_TO_FXPANGLE(0.43673407737969),
517 IFX_LUT_F32_TO_FXPANGLE(0.437535618923428),
518 IFX_LUT_F32_TO_FXPANGLE(0.438336559857958),
519 IFX_LUT_F32_TO_FXPANGLE(0.439136899831635),
520 IFX_LUT_F32_TO_FXPANGLE(0.439936638496422),
521 IFX_LUT_F32_TO_FXPANGLE(0.440735775507881),
522 IFX_LUT_F32_TO_FXPANGLE(0.441534310525167),
523 IFX_LUT_F32_TO_FXPANGLE(0.442332243211017),
524 IFX_LUT_F32_TO_FXPANGLE(0.443129573231746),
525 IFX_LUT_F32_TO_FXPANGLE(0.443926300257239),
526 IFX_LUT_F32_TO_FXPANGLE(0.444722423960939),
527 IFX_LUT_F32_TO_FXPANGLE(0.445517944019847),
528 IFX_LUT_F32_TO_FXPANGLE(0.446312860114506),
529 IFX_LUT_F32_TO_FXPANGLE(0.447107171928999),
530 IFX_LUT_F32_TO_FXPANGLE(0.447900879150937),
531 IFX_LUT_F32_TO_FXPANGLE(0.448693981471457),
532 IFX_LUT_F32_TO_FXPANGLE(0.449486478585208),
533 IFX_LUT_F32_TO_FXPANGLE(0.450278370190345),
534 IFX_LUT_F32_TO_FXPANGLE(0.451069655988523),
535 IFX_LUT_F32_TO_FXPANGLE(0.451860335684889),
536 IFX_LUT_F32_TO_FXPANGLE(0.452650408988071),
537 IFX_LUT_F32_TO_FXPANGLE(0.453439875610172),
538 IFX_LUT_F32_TO_FXPANGLE(0.454228735266762),
539 IFX_LUT_F32_TO_FXPANGLE(0.455016987676872),
540 IFX_LUT_F32_TO_FXPANGLE(0.45580463256298),
541 IFX_LUT_F32_TO_FXPANGLE(0.456591669651011),
542 IFX_LUT_F32_TO_FXPANGLE(0.457378098670321),
543 IFX_LUT_F32_TO_FXPANGLE(0.458163919353695),
544 IFX_LUT_F32_TO_FXPANGLE(0.458949131437335),
545 IFX_LUT_F32_TO_FXPANGLE(0.459733734660856),
546 IFX_LUT_F32_TO_FXPANGLE(0.460517728767271),
547 IFX_LUT_F32_TO_FXPANGLE(0.461301113502991),
548 IFX_LUT_F32_TO_FXPANGLE(0.46208388861781),
549 IFX_LUT_F32_TO_FXPANGLE(0.462866053864901),
550 IFX_LUT_F32_TO_FXPANGLE(0.463647609000806),
551 IFX_LUT_F32_TO_FXPANGLE(0.464428553785428),
552 IFX_LUT_F32_TO_FXPANGLE(0.465208887982023),
553 IFX_LUT_F32_TO_FXPANGLE(0.46598861135719),
554 IFX_LUT_F32_TO_FXPANGLE(0.466767723680866),
555 IFX_LUT_F32_TO_FXPANGLE(0.467546224726316),
556 IFX_LUT_F32_TO_FXPANGLE(0.468324114270123),
557 IFX_LUT_F32_TO_FXPANGLE(0.46910139209218),
558 IFX_LUT_F32_TO_FXPANGLE(0.469878057975687),
559 IFX_LUT_F32_TO_FXPANGLE(0.470654111707133),
560 IFX_LUT_F32_TO_FXPANGLE(0.471429553076297),
561 IFX_LUT_F32_TO_FXPANGLE(0.472204381876234),
562 IFX_LUT_F32_TO_FXPANGLE(0.472978597903266),
563 IFX_LUT_F32_TO_FXPANGLE(0.473752200956977),
564 IFX_LUT_F32_TO_FXPANGLE(0.474525190840205),
565 IFX_LUT_F32_TO_FXPANGLE(0.475297567359028),
566 IFX_LUT_F32_TO_FXPANGLE(0.476069330322761),
567 IFX_LUT_F32_TO_FXPANGLE(0.476840479543945),
568 IFX_LUT_F32_TO_FXPANGLE(0.477611014838337),
569 IFX_LUT_F32_TO_FXPANGLE(0.478380936024907),
570 IFX_LUT_F32_TO_FXPANGLE(0.479150242925823),
571 IFX_LUT_F32_TO_FXPANGLE(0.479918935366444),
572 IFX_LUT_F32_TO_FXPANGLE(0.480687013175316),
573 IFX_LUT_F32_TO_FXPANGLE(0.481454476184158),
574 IFX_LUT_F32_TO_FXPANGLE(0.482221324227854),
575 IFX_LUT_F32_TO_FXPANGLE(0.482987557144447),
576 IFX_LUT_F32_TO_FXPANGLE(0.48375317477513),
577 IFX_LUT_F32_TO_FXPANGLE(0.484518176964233),
578 IFX_LUT_F32_TO_FXPANGLE(0.485282563559221),
579 IFX_LUT_F32_TO_FXPANGLE(0.48604633441068),
580 IFX_LUT_F32_TO_FXPANGLE(0.48680948937231),
581 IFX_LUT_F32_TO_FXPANGLE(0.487572028300918),
582 IFX_LUT_F32_TO_FXPANGLE(0.488333951056406),
583 IFX_LUT_F32_TO_FXPANGLE(0.489095257501764),
584 IFX_LUT_F32_TO_FXPANGLE(0.489855947503062),
585 IFX_LUT_F32_TO_FXPANGLE(0.490616020929441),
586 IFX_LUT_F32_TO_FXPANGLE(0.491375477653102),
587 IFX_LUT_F32_TO_FXPANGLE(0.4921343175493),
588 IFX_LUT_F32_TO_FXPANGLE(0.492892540496335),
589 IFX_LUT_F32_TO_FXPANGLE(0.49365014637554),
590 IFX_LUT_F32_TO_FXPANGLE(0.494407135071275),
591 IFX_LUT_F32_TO_FXPANGLE(0.49516350647092),
592 IFX_LUT_F32_TO_FXPANGLE(0.495919260464861),
593 IFX_LUT_F32_TO_FXPANGLE(0.496674396946486),
594 IFX_LUT_F32_TO_FXPANGLE(0.497428915812172),
595 IFX_LUT_F32_TO_FXPANGLE(0.498182816961281),
596 IFX_LUT_F32_TO_FXPANGLE(0.498936100296146),
597 IFX_LUT_F32_TO_FXPANGLE(0.499688765722065),
598 IFX_LUT_F32_TO_FXPANGLE(0.500440813147294),
599 IFX_LUT_F32_TO_FXPANGLE(0.501192242483033),
600 IFX_LUT_F32_TO_FXPANGLE(0.501943053643421),
601 IFX_LUT_F32_TO_FXPANGLE(0.502693246545526),
602 IFX_LUT_F32_TO_FXPANGLE(0.503442821109336),
603 IFX_LUT_F32_TO_FXPANGLE(0.504191777257751),
604 IFX_LUT_F32_TO_FXPANGLE(0.504940114916572),
605 IFX_LUT_F32_TO_FXPANGLE(0.505687834014494),
606 IFX_LUT_F32_TO_FXPANGLE(0.506434934483097),
607 IFX_LUT_F32_TO_FXPANGLE(0.507181416256835),
608 IFX_LUT_F32_TO_FXPANGLE(0.50792727927303),
609 IFX_LUT_F32_TO_FXPANGLE(0.508672523471861),
610 IFX_LUT_F32_TO_FXPANGLE(0.509417148796356),
611 IFX_LUT_F32_TO_FXPANGLE(0.510161155192383),
612 IFX_LUT_F32_TO_FXPANGLE(0.51090454260864),
613 IFX_LUT_F32_TO_FXPANGLE(0.511647310996647),
614 IFX_LUT_F32_TO_FXPANGLE(0.512389460310738),
615 IFX_LUT_F32_TO_FXPANGLE(0.513130990508049),
616 IFX_LUT_F32_TO_FXPANGLE(0.513871901548512),
617 IFX_LUT_F32_TO_FXPANGLE(0.514612193394845),
618 IFX_LUT_F32_TO_FXPANGLE(0.515351866012543),
619 IFX_LUT_F32_TO_FXPANGLE(0.51609091936987),
620 IFX_LUT_F32_TO_FXPANGLE(0.516829353437846),
621 IFX_LUT_F32_TO_FXPANGLE(0.517567168190245),
622 IFX_LUT_F32_TO_FXPANGLE(0.518304363603578),
623 IFX_LUT_F32_TO_FXPANGLE(0.519040939657092),
624 IFX_LUT_F32_TO_FXPANGLE(0.519776896332754),
625 IFX_LUT_F32_TO_FXPANGLE(0.520512233615247),
626 IFX_LUT_F32_TO_FXPANGLE(0.521246951491958),
627 IFX_LUT_F32_TO_FXPANGLE(0.521981049952972),
628 IFX_LUT_F32_TO_FXPANGLE(0.522714528991058),
629 IFX_LUT_F32_TO_FXPANGLE(0.523447388601666),
630 IFX_LUT_F32_TO_FXPANGLE(0.524179628782913),
631 IFX_LUT_F32_TO_FXPANGLE(0.524911249535579),
632 IFX_LUT_F32_TO_FXPANGLE(0.525642250863092),
633 IFX_LUT_F32_TO_FXPANGLE(0.526372632771524),
634 IFX_LUT_F32_TO_FXPANGLE(0.52710239526958),
635 IFX_LUT_F32_TO_FXPANGLE(0.527831538368588),
636 IFX_LUT_F32_TO_FXPANGLE(0.528560062082493),
637 IFX_LUT_F32_TO_FXPANGLE(0.529287966427846),
638 IFX_LUT_F32_TO_FXPANGLE(0.530015251423793),
639 IFX_LUT_F32_TO_FXPANGLE(0.530741917092071),
640 IFX_LUT_F32_TO_FXPANGLE(0.531467963456995),
641 IFX_LUT_F32_TO_FXPANGLE(0.53219339054545),
642 IFX_LUT_F32_TO_FXPANGLE(0.532918198386882),
643 IFX_LUT_F32_TO_FXPANGLE(0.533642387013291),
644 IFX_LUT_F32_TO_FXPANGLE(0.534365956459219),
645 IFX_LUT_F32_TO_FXPANGLE(0.535088906761743),
646 IFX_LUT_F32_TO_FXPANGLE(0.535811237960464),
647 IFX_LUT_F32_TO_FXPANGLE(0.5365329500975),
648 IFX_LUT_F32_TO_FXPANGLE(0.537254043217479),
649 IFX_LUT_F32_TO_FXPANGLE(0.537974517367523),
650 IFX_LUT_F32_TO_FXPANGLE(0.538694372597247),
651 IFX_LUT_F32_TO_FXPANGLE(0.539413608958744),
652 IFX_LUT_F32_TO_FXPANGLE(0.540132226506582),
653 IFX_LUT_F32_TO_FXPANGLE(0.540850225297788),
654 IFX_LUT_F32_TO_FXPANGLE(0.541567605391845),
655 IFX_LUT_F32_TO_FXPANGLE(0.542284366850679),
656 IFX_LUT_F32_TO_FXPANGLE(0.543000509738655),
657 IFX_LUT_F32_TO_FXPANGLE(0.54371603412256),
658 IFX_LUT_F32_TO_FXPANGLE(0.544430940071603),
659 IFX_LUT_F32_TO_FXPANGLE(0.545145227657401),
660 IFX_LUT_F32_TO_FXPANGLE(0.54585889695397),
661 IFX_LUT_F32_TO_FXPANGLE(0.546571948037719),
662 IFX_LUT_F32_TO_FXPANGLE(0.547284380987437),
663 IFX_LUT_F32_TO_FXPANGLE(0.547996195884288),
664 IFX_LUT_F32_TO_FXPANGLE(0.548707392811801),
665 IFX_LUT_F32_TO_FXPANGLE(0.549417971855859),
666 IFX_LUT_F32_TO_FXPANGLE(0.550127933104693),
667 IFX_LUT_F32_TO_FXPANGLE(0.55083727664887),
668 IFX_LUT_F32_TO_FXPANGLE(0.551546002581289),
669 IFX_LUT_F32_TO_FXPANGLE(0.552254110997165),
670 IFX_LUT_F32_TO_FXPANGLE(0.552961601994028),
671 IFX_LUT_F32_TO_FXPANGLE(0.553668475671709),
672 IFX_LUT_F32_TO_FXPANGLE(0.554374732132331),
673 IFX_LUT_F32_TO_FXPANGLE(0.555080371480305),
674 IFX_LUT_F32_TO_FXPANGLE(0.555785393822314),
675 IFX_LUT_F32_TO_FXPANGLE(0.55648979926731),
676 IFX_LUT_F32_TO_FXPANGLE(0.557193587926504),
677 IFX_LUT_F32_TO_FXPANGLE(0.557896759913355),
678 IFX_LUT_F32_TO_FXPANGLE(0.558599315343562),
679 IFX_LUT_F32_TO_FXPANGLE(0.559301254335059),
680 IFX_LUT_F32_TO_FXPANGLE(0.560002577007999),
681 IFX_LUT_F32_TO_FXPANGLE(0.560703283484751),
682 IFX_LUT_F32_TO_FXPANGLE(0.561403373889889),
683 IFX_LUT_F32_TO_FXPANGLE(0.562102848350186),
684 IFX_LUT_F32_TO_FXPANGLE(0.562801706994599),
685 IFX_LUT_F32_TO_FXPANGLE(0.563499949954267),
686 IFX_LUT_F32_TO_FXPANGLE(0.564197577362498),
687 IFX_LUT_F32_TO_FXPANGLE(0.564894589354762),
688 IFX_LUT_F32_TO_FXPANGLE(0.565590986068683),
689 IFX_LUT_F32_TO_FXPANGLE(0.566286767644028),
690 IFX_LUT_F32_TO_FXPANGLE(0.5669819342227),
691 IFX_LUT_F32_TO_FXPANGLE(0.56767648594873),
692 IFX_LUT_F32_TO_FXPANGLE(0.568370422968264),
693 IFX_LUT_F32_TO_FXPANGLE(0.569063745429561),
694 IFX_LUT_F32_TO_FXPANGLE(0.569756453482978),
695 IFX_LUT_F32_TO_FXPANGLE(0.570448547280968),
696 IFX_LUT_F32_TO_FXPANGLE(0.571140026978063),
697 IFX_LUT_F32_TO_FXPANGLE(0.571830892730873),
698 IFX_LUT_F32_TO_FXPANGLE(0.572521144698072),
699 IFX_LUT_F32_TO_FXPANGLE(0.573210783040395),
700 IFX_LUT_F32_TO_FXPANGLE(0.573899807920624),
701 IFX_LUT_F32_TO_FXPANGLE(0.57458821950358),
702 IFX_LUT_F32_TO_FXPANGLE(0.575276017956118),
703 IFX_LUT_F32_TO_FXPANGLE(0.575963203447116),
704 IFX_LUT_F32_TO_FXPANGLE(0.576649776147467),
705 IFX_LUT_F32_TO_FXPANGLE(0.577335736230069),
706 IFX_LUT_F32_TO_FXPANGLE(0.57802108386982),
707 IFX_LUT_F32_TO_FXPANGLE(0.578705819243603),
708 IFX_LUT_F32_TO_FXPANGLE(0.579389942530287),
709 IFX_LUT_F32_TO_FXPANGLE(0.580073453910708),
710 IFX_LUT_F32_TO_FXPANGLE(0.58075635356767),
711 IFX_LUT_F32_TO_FXPANGLE(0.58143864168593),
712 IFX_LUT_F32_TO_FXPANGLE(0.582120318452191),
713 IFX_LUT_F32_TO_FXPANGLE(0.582801384055095),
714 IFX_LUT_F32_TO_FXPANGLE(0.583481838685215),
715 IFX_LUT_F32_TO_FXPANGLE(0.584161682535044),
716 IFX_LUT_F32_TO_FXPANGLE(0.584840915798988),
717 IFX_LUT_F32_TO_FXPANGLE(0.585519538673358),
718 IFX_LUT_F32_TO_FXPANGLE(0.586197551356361),
719 IFX_LUT_F32_TO_FXPANGLE(0.586874954048091),
720 IFX_LUT_F32_TO_FXPANGLE(0.587551746950524),
721 IFX_LUT_F32_TO_FXPANGLE(0.588227930267504),
722 IFX_LUT_F32_TO_FXPANGLE(0.588903504204738),
723 IFX_LUT_F32_TO_FXPANGLE(0.58957846896979),
724 IFX_LUT_F32_TO_FXPANGLE(0.590252824772067),
725 IFX_LUT_F32_TO_FXPANGLE(0.590926571822816),
726 IFX_LUT_F32_TO_FXPANGLE(0.591599710335111),
727 IFX_LUT_F32_TO_FXPANGLE(0.592272240523851),
728 IFX_LUT_F32_TO_FXPANGLE(0.592944162605743),
729 IFX_LUT_F32_TO_FXPANGLE(0.593615476799303),
730 IFX_LUT_F32_TO_FXPANGLE(0.594286183324841),
731 IFX_LUT_F32_TO_FXPANGLE(0.594956282404456),
732 IFX_LUT_F32_TO_FXPANGLE(0.595625774262027),
733 IFX_LUT_F32_TO_FXPANGLE(0.596294659123204),
734 IFX_LUT_F32_TO_FXPANGLE(0.596962937215402),
735 IFX_LUT_F32_TO_FXPANGLE(0.597630608767789),
736 IFX_LUT_F32_TO_FXPANGLE(0.598297674011284),
737 IFX_LUT_F32_TO_FXPANGLE(0.598964133178543),
738 IFX_LUT_F32_TO_FXPANGLE(0.599629986503951),
739 IFX_LUT_F32_TO_FXPANGLE(0.600295234223621),
740 IFX_LUT_F32_TO_FXPANGLE(0.600959876575375),
741 IFX_LUT_F32_TO_FXPANGLE(0.601623913798746),
742 IFX_LUT_F32_TO_FXPANGLE(0.602287346134964),
743 IFX_LUT_F32_TO_FXPANGLE(0.60295017382695),
744 IFX_LUT_F32_TO_FXPANGLE(0.603612397119307),
745 IFX_LUT_F32_TO_FXPANGLE(0.604274016258314),
746 IFX_LUT_F32_TO_FXPANGLE(0.604935031491914),
747 IFX_LUT_F32_TO_FXPANGLE(0.605595443069711),
748 IFX_LUT_F32_TO_FXPANGLE(0.606255251242958),
749 IFX_LUT_F32_TO_FXPANGLE(0.606914456264552),
750 IFX_LUT_F32_TO_FXPANGLE(0.607573058389022),
751 IFX_LUT_F32_TO_FXPANGLE(0.608231057872528),
752 IFX_LUT_F32_TO_FXPANGLE(0.608888454972845),
753 IFX_LUT_F32_TO_FXPANGLE(0.609545249949361),
754 IFX_LUT_F32_TO_FXPANGLE(0.610201443063065),
755 IFX_LUT_F32_TO_FXPANGLE(0.610857034576544),
756 IFX_LUT_F32_TO_FXPANGLE(0.611512024753969),
757 IFX_LUT_F32_TO_FXPANGLE(0.612166413861094),
758 IFX_LUT_F32_TO_FXPANGLE(0.612820202165241),
759 IFX_LUT_F32_TO_FXPANGLE(0.613473389935299),
760 IFX_LUT_F32_TO_FXPANGLE(0.614125977441711),
761 IFX_LUT_F32_TO_FXPANGLE(0.614777964956469),
762 IFX_LUT_F32_TO_FXPANGLE(0.615429352753105),
763 IFX_LUT_F32_TO_FXPANGLE(0.616080141106684),
764 IFX_LUT_F32_TO_FXPANGLE(0.616730330293797),
765 IFX_LUT_F32_TO_FXPANGLE(0.617379920592551),
766 IFX_LUT_F32_TO_FXPANGLE(0.618028912282562),
767 IFX_LUT_F32_TO_FXPANGLE(0.61867730564495),
768 IFX_LUT_F32_TO_FXPANGLE(0.619325100962327),
769 IFX_LUT_F32_TO_FXPANGLE(0.619972298518794),
770 IFX_LUT_F32_TO_FXPANGLE(0.620618898599929),
771 IFX_LUT_F32_TO_FXPANGLE(0.621264901492783),
772 IFX_LUT_F32_TO_FXPANGLE(0.621910307485869),
773 IFX_LUT_F32_TO_FXPANGLE(0.622555116869157),
774 IFX_LUT_F32_TO_FXPANGLE(0.623199329934066),
775 IFX_LUT_F32_TO_FXPANGLE(0.623842946973455),
776 IFX_LUT_F32_TO_FXPANGLE(0.624485968281619),
777 IFX_LUT_F32_TO_FXPANGLE(0.625128394154276),
778 IFX_LUT_F32_TO_FXPANGLE(0.625770224888563),
779 IFX_LUT_F32_TO_FXPANGLE(0.626411460783031),
780 IFX_LUT_F32_TO_FXPANGLE(0.62705210213763),
781 IFX_LUT_F32_TO_FXPANGLE(0.627692149253711),
782 IFX_LUT_F32_TO_FXPANGLE(0.62833160243401),
783 IFX_LUT_F32_TO_FXPANGLE(0.628970461982645),
784 IFX_LUT_F32_TO_FXPANGLE(0.62960872820511),
785 IFX_LUT_F32_TO_FXPANGLE(0.630246401408263),
786 IFX_LUT_F32_TO_FXPANGLE(0.630883481900322),
787 IFX_LUT_F32_TO_FXPANGLE(0.631519969990857),
788 IFX_LUT_F32_TO_FXPANGLE(0.632155865990784),
789 IFX_LUT_F32_TO_FXPANGLE(0.632791170212352),
790 IFX_LUT_F32_TO_FXPANGLE(0.633425882969145),
791 IFX_LUT_F32_TO_FXPANGLE(0.634060004576065),
792 IFX_LUT_F32_TO_FXPANGLE(0.634693535349333),
793 IFX_LUT_F32_TO_FXPANGLE(0.635326475606475),
794 IFX_LUT_F32_TO_FXPANGLE(0.635958825666321),
795 IFX_LUT_F32_TO_FXPANGLE(0.636590585848993),
796 IFX_LUT_F32_TO_FXPANGLE(0.637221756475899),
797 IFX_LUT_F32_TO_FXPANGLE(0.637852337869727),
798 IFX_LUT_F32_TO_FXPANGLE(0.638482330354438),
799 IFX_LUT_F32_TO_FXPANGLE(0.639111734255255),
800 IFX_LUT_F32_TO_FXPANGLE(0.639740549898664),
801 IFX_LUT_F32_TO_FXPANGLE(0.640368777612397),
802 IFX_LUT_F32_TO_FXPANGLE(0.640996417725432),
803 IFX_LUT_F32_TO_FXPANGLE(0.641623470567984),
804 IFX_LUT_F32_TO_FXPANGLE(0.642249936471496),
805 IFX_LUT_F32_TO_FXPANGLE(0.642875815768636),
806 IFX_LUT_F32_TO_FXPANGLE(0.643501108793284),
807 IFX_LUT_F32_TO_FXPANGLE(0.644125815880533),
808 IFX_LUT_F32_TO_FXPANGLE(0.644749937366675),
809 IFX_LUT_F32_TO_FXPANGLE(0.645373473589196),
810 IFX_LUT_F32_TO_FXPANGLE(0.645996424886772),
811 IFX_LUT_F32_TO_FXPANGLE(0.646618791599258),
812 IFX_LUT_F32_TO_FXPANGLE(0.647240574067683),
813 IFX_LUT_F32_TO_FXPANGLE(0.647861772634245),
814 IFX_LUT_F32_TO_FXPANGLE(0.648482387642301),
815 IFX_LUT_F32_TO_FXPANGLE(0.649102419436359),
816 IFX_LUT_F32_TO_FXPANGLE(0.649721868362078),
817 IFX_LUT_F32_TO_FXPANGLE(0.650340734766252),
818 IFX_LUT_F32_TO_FXPANGLE(0.650959018996812),
819 IFX_LUT_F32_TO_FXPANGLE(0.651576721402813),
820 IFX_LUT_F32_TO_FXPANGLE(0.652193842334429),
821 IFX_LUT_F32_TO_FXPANGLE(0.652810382142948),
822 IFX_LUT_F32_TO_FXPANGLE(0.653426341180762),
823 IFX_LUT_F32_TO_FXPANGLE(0.654041719801364),
824 IFX_LUT_F32_TO_FXPANGLE(0.65465651835934),
825 IFX_LUT_F32_TO_FXPANGLE(0.655270737210358),
826 IFX_LUT_F32_TO_FXPANGLE(0.655884376711171),
827 IFX_LUT_F32_TO_FXPANGLE(0.656497437219599),
828 IFX_LUT_F32_TO_FXPANGLE(0.657109919094532),
829 IFX_LUT_F32_TO_FXPANGLE(0.657721822695918),
830 IFX_LUT_F32_TO_FXPANGLE(0.658333148384756),
831 IFX_LUT_F32_TO_FXPANGLE(0.658943896523094),
832 IFX_LUT_F32_TO_FXPANGLE(0.659554067474019),
833 IFX_LUT_F32_TO_FXPANGLE(0.660163661601649),
834 IFX_LUT_F32_TO_FXPANGLE(0.660772679271133),
835 IFX_LUT_F32_TO_FXPANGLE(0.661381120848635),
836 IFX_LUT_F32_TO_FXPANGLE(0.661988986701338),
837 IFX_LUT_F32_TO_FXPANGLE(0.662596277197427),
838 IFX_LUT_F32_TO_FXPANGLE(0.663202992706093),
839 IFX_LUT_F32_TO_FXPANGLE(0.663809133597518),
840 IFX_LUT_F32_TO_FXPANGLE(0.664414700242873),
841 IFX_LUT_F32_TO_FXPANGLE(0.665019693014312),
842 IFX_LUT_F32_TO_FXPANGLE(0.665624112284961),
843 IFX_LUT_F32_TO_FXPANGLE(0.666227958428919),
844 IFX_LUT_F32_TO_FXPANGLE(0.666831231821246),
845 IFX_LUT_F32_TO_FXPANGLE(0.667433932837957),
846 IFX_LUT_F32_TO_FXPANGLE(0.66803606185602),
847 IFX_LUT_F32_TO_FXPANGLE(0.668637619253345),
848 IFX_LUT_F32_TO_FXPANGLE(0.66923860540878),
849 IFX_LUT_F32_TO_FXPANGLE(0.669839020702103),
850 IFX_LUT_F32_TO_FXPANGLE(0.670438865514021),
851 IFX_LUT_F32_TO_FXPANGLE(0.671038140226157),
852 IFX_LUT_F32_TO_FXPANGLE(0.671636845221047),
853 IFX_LUT_F32_TO_FXPANGLE(0.672234980882134),
854 IFX_LUT_F32_TO_FXPANGLE(0.672832547593763),
855 IFX_LUT_F32_TO_FXPANGLE(0.673429545741172),
856 IFX_LUT_F32_TO_FXPANGLE(0.674025975710487),
857 IFX_LUT_F32_TO_FXPANGLE(0.674621837888718),
858 IFX_LUT_F32_TO_FXPANGLE(0.67521713266375),
859 IFX_LUT_F32_TO_FXPANGLE(0.675811860424338),
860 IFX_LUT_F32_TO_FXPANGLE(0.676406021560103),
861 IFX_LUT_F32_TO_FXPANGLE(0.676999616461522),
862 IFX_LUT_F32_TO_FXPANGLE(0.677592645519925),
863 IFX_LUT_F32_TO_FXPANGLE(0.678185109127489),
864 IFX_LUT_F32_TO_FXPANGLE(0.678777007677231),
865 IFX_LUT_F32_TO_FXPANGLE(0.679368341563002),
866 IFX_LUT_F32_TO_FXPANGLE(0.679959111179482),
867 IFX_LUT_F32_TO_FXPANGLE(0.680549316922172),
868 IFX_LUT_F32_TO_FXPANGLE(0.681138959187393),
869 IFX_LUT_F32_TO_FXPANGLE(0.681728038372273),
870 IFX_LUT_F32_TO_FXPANGLE(0.682316554874748),
871 IFX_LUT_F32_TO_FXPANGLE(0.682904509093552),
872 IFX_LUT_F32_TO_FXPANGLE(0.683491901428213),
873 IFX_LUT_F32_TO_FXPANGLE(0.684078732279046),
874 IFX_LUT_F32_TO_FXPANGLE(0.684665002047149),
875 IFX_LUT_F32_TO_FXPANGLE(0.685250711134394),
876 IFX_LUT_F32_TO_FXPANGLE(0.685835859943427),
877 IFX_LUT_F32_TO_FXPANGLE(0.686420448877654),
878 IFX_LUT_F32_TO_FXPANGLE(0.687004478341245),
879 IFX_LUT_F32_TO_FXPANGLE(0.68758794873912),
880 IFX_LUT_F32_TO_FXPANGLE(0.688170860476949),
881 IFX_LUT_F32_TO_FXPANGLE(0.688753213961141),
882 IFX_LUT_F32_TO_FXPANGLE(0.689335009598846),
883 IFX_LUT_F32_TO_FXPANGLE(0.689916247797941),
884 IFX_LUT_F32_TO_FXPANGLE(0.69049692896703),
885 IFX_LUT_F32_TO_FXPANGLE(0.691077053515437),
886 IFX_LUT_F32_TO_FXPANGLE(0.6916566218532),
887 IFX_LUT_F32_TO_FXPANGLE(0.692235634391065),
888 IFX_LUT_F32_TO_FXPANGLE(0.692814091540483),
889 IFX_LUT_F32_TO_FXPANGLE(0.693391993713601),
890 IFX_LUT_F32_TO_FXPANGLE(0.69396934132326),
891 IFX_LUT_F32_TO_FXPANGLE(0.694546134782985),
892 IFX_LUT_F32_TO_FXPANGLE(0.695122374506987),
893 IFX_LUT_F32_TO_FXPANGLE(0.695698060910148),
894 IFX_LUT_F32_TO_FXPANGLE(0.696273194408024),
895 IFX_LUT_F32_TO_FXPANGLE(0.696847775416835),
896 IFX_LUT_F32_TO_FXPANGLE(0.697421804353461),
897 IFX_LUT_F32_TO_FXPANGLE(0.697995281635439),
898 IFX_LUT_F32_TO_FXPANGLE(0.69856820768095),
899 IFX_LUT_F32_TO_FXPANGLE(0.699140582908824),
900 IFX_LUT_F32_TO_FXPANGLE(0.699712407738527),
901 IFX_LUT_F32_TO_FXPANGLE(0.70028368259016),
902 IFX_LUT_F32_TO_FXPANGLE(0.70085440788445),
903 IFX_LUT_F32_TO_FXPANGLE(0.70142458404275),
904 IFX_LUT_F32_TO_FXPANGLE(0.701994211487028),
905 IFX_LUT_F32_TO_FXPANGLE(0.702563290639866),
906 IFX_LUT_F32_TO_FXPANGLE(0.703131821924454),
907 IFX_LUT_F32_TO_FXPANGLE(0.703699805764582),
908 IFX_LUT_F32_TO_FXPANGLE(0.704267242584639),
909 IFX_LUT_F32_TO_FXPANGLE(0.704834132809605),
910 IFX_LUT_F32_TO_FXPANGLE(0.705400476865049),
911 IFX_LUT_F32_TO_FXPANGLE(0.705966275177119),
912 IFX_LUT_F32_TO_FXPANGLE(0.706531528172541),
913 IFX_LUT_F32_TO_FXPANGLE(0.707096236278612),
914 IFX_LUT_F32_TO_FXPANGLE(0.707660399923198),
915 IFX_LUT_F32_TO_FXPANGLE(0.708224019534724),
916 IFX_LUT_F32_TO_FXPANGLE(0.708787095542173),
917 IFX_LUT_F32_TO_FXPANGLE(0.70934962837508),
918 IFX_LUT_F32_TO_FXPANGLE(0.709911618463525),
919 IFX_LUT_F32_TO_FXPANGLE(0.710473066238132),
920 IFX_LUT_F32_TO_FXPANGLE(0.711033972130061),
921 IFX_LUT_F32_TO_FXPANGLE(0.711594336571003),
922 IFX_LUT_F32_TO_FXPANGLE(0.712154159993179),
923 IFX_LUT_F32_TO_FXPANGLE(0.712713442829328),
924 IFX_LUT_F32_TO_FXPANGLE(0.713272185512711),
925 IFX_LUT_F32_TO_FXPANGLE(0.713830388477098),
926 IFX_LUT_F32_TO_FXPANGLE(0.714388052156769),
927 IFX_LUT_F32_TO_FXPANGLE(0.714945176986506),
928 IFX_LUT_F32_TO_FXPANGLE(0.715501763401588),
929 IFX_LUT_F32_TO_FXPANGLE(0.71605781183779),
930 IFX_LUT_F32_TO_FXPANGLE(0.716613322731375),
931 IFX_LUT_F32_TO_FXPANGLE(0.717168296519088),
932 IFX_LUT_F32_TO_FXPANGLE(0.717722733638155),
933 IFX_LUT_F32_TO_FXPANGLE(0.718276634526277),
934 IFX_LUT_F32_TO_FXPANGLE(0.718829999621625),
935 IFX_LUT_F32_TO_FXPANGLE(0.719382829362832),
936 IFX_LUT_F32_TO_FXPANGLE(0.719935124188996),
937 IFX_LUT_F32_TO_FXPANGLE(0.720486884539668),
938 IFX_LUT_F32_TO_FXPANGLE(0.721038110854852),
939 IFX_LUT_F32_TO_FXPANGLE(0.721588803574998),
940 IFX_LUT_F32_TO_FXPANGLE(0.722138963140998),
941 IFX_LUT_F32_TO_FXPANGLE(0.722688589994184),
942 IFX_LUT_F32_TO_FXPANGLE(0.723237684576318),
943 IFX_LUT_F32_TO_FXPANGLE(0.723786247329592),
944 IFX_LUT_F32_TO_FXPANGLE(0.724334278696622),
945 IFX_LUT_F32_TO_FXPANGLE(0.724881779120445),
946 IFX_LUT_F32_TO_FXPANGLE(0.725428749044511),
947 IFX_LUT_F32_TO_FXPANGLE(0.725975188912682),
948 IFX_LUT_F32_TO_FXPANGLE(0.726521099169226),
949 IFX_LUT_F32_TO_FXPANGLE(0.727066480258813),
950 IFX_LUT_F32_TO_FXPANGLE(0.727611332626511),
951 IFX_LUT_F32_TO_FXPANGLE(0.72815565671778),
952 IFX_LUT_F32_TO_FXPANGLE(0.72869945297847),
953 IFX_LUT_F32_TO_FXPANGLE(0.729242721854815),
954 IFX_LUT_F32_TO_FXPANGLE(0.729785463793429),
955 IFX_LUT_F32_TO_FXPANGLE(0.730327679241302),
956 IFX_LUT_F32_TO_FXPANGLE(0.730869368645794),
957 IFX_LUT_F32_TO_FXPANGLE(0.731410532454635),
958 IFX_LUT_F32_TO_FXPANGLE(0.731951171115917),
959 IFX_LUT_F32_TO_FXPANGLE(0.732491285078088),
960 IFX_LUT_F32_TO_FXPANGLE(0.733030874789955),
961 IFX_LUT_F32_TO_FXPANGLE(0.733569940700672),
962 IFX_LUT_F32_TO_FXPANGLE(0.73410848325974),
963 IFX_LUT_F32_TO_FXPANGLE(0.734646502917002),
964 IFX_LUT_F32_TO_FXPANGLE(0.73518400012264),
965 IFX_LUT_F32_TO_FXPANGLE(0.735720975327167),
966 IFX_LUT_F32_TO_FXPANGLE(0.736257428981428),
967 IFX_LUT_F32_TO_FXPANGLE(0.736793361536592),
968 IFX_LUT_F32_TO_FXPANGLE(0.737328773444149),
969 IFX_LUT_F32_TO_FXPANGLE(0.737863665155908),
970 IFX_LUT_F32_TO_FXPANGLE(0.73839803712399),
971 IFX_LUT_F32_TO_FXPANGLE(0.738931889800823),
972 IFX_LUT_F32_TO_FXPANGLE(0.739465223639145),
973 IFX_LUT_F32_TO_FXPANGLE(0.73999803909199),
974 IFX_LUT_F32_TO_FXPANGLE(0.740530336612693),
975 IFX_LUT_F32_TO_FXPANGLE(0.741062116654879),
976 IFX_LUT_F32_TO_FXPANGLE(0.741593379672465),
977 IFX_LUT_F32_TO_FXPANGLE(0.74212412611965),
978 IFX_LUT_F32_TO_FXPANGLE(0.742654356450918),
979 IFX_LUT_F32_TO_FXPANGLE(0.743184071121027),
980 IFX_LUT_F32_TO_FXPANGLE(0.74371327058501),
981 IFX_LUT_F32_TO_FXPANGLE(0.74424195529817),
982 IFX_LUT_F32_TO_FXPANGLE(0.744770125716075),
983 IFX_LUT_F32_TO_FXPANGLE(0.745297782294555),
984 IFX_LUT_F32_TO_FXPANGLE(0.745824925489697),
985 IFX_LUT_F32_TO_FXPANGLE(0.746351555757843),
986 IFX_LUT_F32_TO_FXPANGLE(0.746877673555588),
987 IFX_LUT_F32_TO_FXPANGLE(0.747403279339768),
988 IFX_LUT_F32_TO_FXPANGLE(0.747928373567467),
989 IFX_LUT_F32_TO_FXPANGLE(0.748452956696006),
990 IFX_LUT_F32_TO_FXPANGLE(0.748977029182941),
991 IFX_LUT_F32_TO_FXPANGLE(0.749500591486061),
992 IFX_LUT_F32_TO_FXPANGLE(0.750023644063381),
993 IFX_LUT_F32_TO_FXPANGLE(0.750546187373141),
994 IFX_LUT_F32_TO_FXPANGLE(0.751068221873802),
995 IFX_LUT_F32_TO_FXPANGLE(0.751589748024043),
996 IFX_LUT_F32_TO_FXPANGLE(0.752110766282754),
997 IFX_LUT_F32_TO_FXPANGLE(0.752631277109036),
998 IFX_LUT_F32_TO_FXPANGLE(0.753151280962194),
999 IFX_LUT_F32_TO_FXPANGLE(0.75367077830174),
1000 IFX_LUT_F32_TO_FXPANGLE(0.754189769587379),
1001 IFX_LUT_F32_TO_FXPANGLE(0.754708255279016),
1002 IFX_LUT_F32_TO_FXPANGLE(0.755226235836745),
1003 IFX_LUT_F32_TO_FXPANGLE(0.755743711720849),
1004 IFX_LUT_F32_TO_FXPANGLE(0.756260683391796),
1005 IFX_LUT_F32_TO_FXPANGLE(0.756777151310235),
1006 IFX_LUT_F32_TO_FXPANGLE(0.757293115936992),
1007 IFX_LUT_F32_TO_FXPANGLE(0.757808577733069),
1008 IFX_LUT_F32_TO_FXPANGLE(0.758323537159635),
1009 IFX_LUT_F32_TO_FXPANGLE(0.758837994678031),
1010 IFX_LUT_F32_TO_FXPANGLE(0.759351950749758),
1011 IFX_LUT_F32_TO_FXPANGLE(0.75986540583648),
1012 IFX_LUT_F32_TO_FXPANGLE(0.760378360400016),
1013 IFX_LUT_F32_TO_FXPANGLE(0.760890814902341),
1014 IFX_LUT_F32_TO_FXPANGLE(0.761402769805578),
1015 IFX_LUT_F32_TO_FXPANGLE(0.761914225571999),
1016 IFX_LUT_F32_TO_FXPANGLE(0.762425182664017),
1017 IFX_LUT_F32_TO_FXPANGLE(0.762935641544187),
1018 IFX_LUT_F32_TO_FXPANGLE(0.763445602675202),
1019 IFX_LUT_F32_TO_FXPANGLE(0.763955066519886),
1020 IFX_LUT_F32_TO_FXPANGLE(0.764464033541195),
1021 IFX_LUT_F32_TO_FXPANGLE(0.764972504202212),
1022 IFX_LUT_F32_TO_FXPANGLE(0.765480478966144),
1023 IFX_LUT_F32_TO_FXPANGLE(0.765987958296319),
1024 IFX_LUT_F32_TO_FXPANGLE(0.766494942656179),
1025 IFX_LUT_F32_TO_FXPANGLE(0.767001432509286),
1026 IFX_LUT_F32_TO_FXPANGLE(0.767507428319308),
1027 IFX_LUT_F32_TO_FXPANGLE(0.768012930550024),
1028 IFX_LUT_F32_TO_FXPANGLE(0.768517939665315),
1029 IFX_LUT_F32_TO_FXPANGLE(0.769022456129166),
1030 IFX_LUT_F32_TO_FXPANGLE(0.769526480405658),
1031 IFX_LUT_F32_TO_FXPANGLE(0.77003001295897),
1032 IFX_LUT_F32_TO_FXPANGLE(0.770533054253371),
1033 IFX_LUT_F32_TO_FXPANGLE(0.771035604753219),
1034 IFX_LUT_F32_TO_FXPANGLE(0.77153766492296),
1035 IFX_LUT_F32_TO_FXPANGLE(0.77203923522712),
1036 IFX_LUT_F32_TO_FXPANGLE(0.772540316130307),
1037 IFX_LUT_F32_TO_FXPANGLE(0.773040908097206),
1038 IFX_LUT_F32_TO_FXPANGLE(0.773541011592573),
1039 IFX_LUT_F32_TO_FXPANGLE(0.774040627081239),
1040 IFX_LUT_F32_TO_FXPANGLE(0.7745397550281),
1041 IFX_LUT_F32_TO_FXPANGLE(0.775038395898116),
1042 IFX_LUT_F32_TO_FXPANGLE(0.775536550156312),
1043 IFX_LUT_F32_TO_FXPANGLE(0.776034218267768),
1044 IFX_LUT_F32_TO_FXPANGLE(0.776531400697624),
1045 IFX_LUT_F32_TO_FXPANGLE(0.77702809791107),
1046 IFX_LUT_F32_TO_FXPANGLE(0.777524310373348),
1047 IFX_LUT_F32_TO_FXPANGLE(0.778020038549745),
1048 IFX_LUT_F32_TO_FXPANGLE(0.778515282905595),
1049 IFX_LUT_F32_TO_FXPANGLE(0.779010043906271),
1050 IFX_LUT_F32_TO_FXPANGLE(0.779504322017186),
1051 IFX_LUT_F32_TO_FXPANGLE(0.77999811770379),
1052 IFX_LUT_F32_TO_FXPANGLE(0.780491431431562),
1053 IFX_LUT_F32_TO_FXPANGLE(0.780984263666015),
1054 IFX_LUT_F32_TO_FXPANGLE(0.781476614872688),
1055 IFX_LUT_F32_TO_FXPANGLE(0.781968485517144),
1056 IFX_LUT_F32_TO_FXPANGLE(0.782459876064968),
1057 IFX_LUT_F32_TO_FXPANGLE(0.782950786981764),
1058 IFX_LUT_F32_TO_FXPANGLE(0.783441218733152),
1059 IFX_LUT_F32_TO_FXPANGLE(0.783931171784766),
1060 IFX_LUT_F32_TO_FXPANGLE(0.784420646602251),
1061 IFX_LUT_F32_TO_FXPANGLE(0.784909643651259),
1062 IFX_LUT_F32_TO_FXPANGLE(0.785398163397448),
1063 };
1064 #endif
1065
1066 const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE + 1] =
1067 {0, 0.000976562189559319f, 0.00195312251647882f, 0.00292967911813999f, 0.00390623013196697f, 0.00488277369544783f, 0.00585930794615589f, 0.00683583102177106f, 0.00781234106010111f, 0.008788836199103f,
1068 0.00976531457690415f, 0.0107417743318238f, 0.0117182136023941f, 0.0126946305273818f, 0.0136710232458091f, 0.014647389896975f, 0.0156237286204768f, 0.0166000375562313f, 0.0175763148444956f,
1069 0.018552558625889f, 0.0195287670414137f, 0.0205049382324764f, 0.0214810703409091f, 0.0224571615089906f, 0.0234332098794676f, 0.0244092135955758f, 0.0253851708010611f, 0.0263610796402008f,
1070 0.0273369382578244f, 0.0283127447993352f, 0.029288497410731f, 0.0302641942386252f, 0.0312398334302683f, 0.0322154131335681f, 0.0331909314971116f, 0.0341663866701854f, 0.0351417768027968f,
1071 0.036117100045695f, 0.0370923545503918f, 0.0380675384691825f, 0.039042649955167f, 0.0400176871622703f, 0.0409926482452638f, 0.0419675313597857f, 0.0429423346623622f, 0.0439170563104278f,
1072 0.0448916944623465f, 0.0458662472774322f, 0.0468407129159697f, 0.0478150895392348f, 0.0487893753095156f, 0.0497635683901328f, 0.0507376669454602f, 0.0517116691409454f, 0.05268557314313f,
1073 0.0536593771196708f, 0.0546330792393595f, 0.0556066776721433f, 0.0565801705891457f, 0.0575535561626864f, 0.0585268325663018f, 0.0594999979747652f, 0.0604730505641073f, 0.0614459885116361f,
1074 0.0624188099959574f, 0.0633915131969944f, 0.0643640962960086f, 0.0653365574756192f, 0.0663088949198235f, 0.0672811068140167f, 0.068253191345012f, 0.0692251467010603f, 0.0701969710718705f,
1075 0.0711686626486288f, 0.0721402196240188f, 0.0731116401922413f, 0.0740829225490337f, 0.0750540648916902f, 0.0760250654190807f, 0.0769959223316711f, 0.0779666338315423f, 0.07893719812241f,
1076 0.0799076134096439f, 0.0808778779002873f, 0.0818479898030765f, 0.0828179473284599f, 0.0837877486886171f, 0.0847573920974787f, 0.0857268757707448f, 0.0866961979259047f, 0.0876653567822554f,
1077 0.0886343505609211f, 0.0896031774848717f, 0.0905718357789422f, 0.0915403236698511f, 0.0925086393862194f, 0.0934767811585895f, 0.0944447472194436f, 0.0954125358032227f, 0.0963801451463448f,
1078 0.0973475734872237f, 0.0983148190662873f, 0.0992818801259964f, 0.100248754910863f, 0.101215441667467f, 0.102181938644477f, 0.103148244092669f, 0.10411435626494f, 0.10508027341633f, 0.106045993804039f,
1079 0.107011515687447f, 0.107976837328126f, 0.108941956989866f, 0.109906872938685f, 0.110871583442852f, 0.111836086772904f, 0.112800381201659f, 0.113764465004242f, 0.114728336458092f, 0.115691993842991f,
1080 0.116655435441069f, 0.117618659536834f, 0.118581664417177f, 0.1195444483714f, 0.120507009691225f, 0.121469346670814f, 0.122431457606789f, 0.123393340798243f, 0.124354994546761f, 0.125316417156437f,
1081 0.126277606933887f, 0.127238562188269f, 0.128199281231298f, 0.129159762377265f, 0.130120003943049f, 0.131080004248137f, 0.132039761614639f, 0.132999274367304f, 0.133958540833537f, 0.134917559343415f,
1082 0.135876328229701f, 0.136834845827863f, 0.137793110476088f, 0.138751120515297f, 0.139708874289164f, 0.140666370144127f, 0.14162360642941f, 0.14258058149703f, 0.143537293701821f, 0.144493741401443f,
1083 0.145449922956401f, 0.146405836730058f, 0.147361481088652f, 0.148316854401309f, 0.14927195504006f, 0.150226781379856f, 0.15118133179858f, 0.152135604677064f, 0.153089598399105f, 0.154043311351475f,
1084 0.154996741923941f, 0.155949888509276f, 0.156902749503275f, 0.157855323304766f, 0.158807608315631f, 0.159759602940813f, 0.160711305588332f, 0.161662714669305f, 0.162613828597949f, 0.163564645791604f,
1085 0.164515164670743f, 0.165465383658987f, 0.166415301183115f, 0.167364915673083f, 0.168314225562034f, 0.169263229286312f, 0.170211925285474f, 0.171160312002307f, 0.172108387882836f, 0.17305615137634f,
1086 0.174003600935368f, 0.174950735015743f, 0.175897552076585f, 0.176844050580316f, 0.177790228992676f, 0.178736085782736f, 0.179681619422909f, 0.180626828388963f, 0.181571711160032f, 0.182516266218631f,
1087 0.183460492050666f, 0.184404387145446f, 0.185347949995695f, 0.186291179097566f, 0.187234072950649f, 0.188176630057987f, 0.189118848926084f, 0.190060728064918f, 0.191002265987953f, 0.191943461212149f,
1088 0.192884312257975f, 0.193824817649417f, 0.194764975913995f, 0.195704785582767f, 0.196644245190345f, 0.197583353274903f, 0.19852210837819f, 0.199460509045539f, 0.200398553825879f, 0.201336241271742f,
1089 0.202273569939279f, 0.203210538388266f, 0.204147145182117f, 0.205083388887891f, 0.206019268076305f, 0.206954781321742f, 0.207889927202263f, 0.208824704299615f, 0.209759111199241f, 0.210693146490291f,
1090 0.21162680876563f, 0.212560096621847f, 0.213493008659266f, 0.214425543481956f, 0.215357699697738f, 0.216289475918194f, 0.217220870758679f, 0.218151882838326f, 0.219082510780058f, 0.220012753210596f,
1091 0.220942608760466f, 0.22187207606401f, 0.222801153759395f, 0.223729840488615f, 0.22465813489751f, 0.225586035635764f, 0.22651354135692f, 0.227440650718385f, 0.228367362381439f, 0.229293675011242f,
1092 0.230219587276844f, 0.231145097851188f, 0.232070205411125f, 0.232994908637414f, 0.233919206214733f, 0.234843096831689f, 0.23576657918082f, 0.236689651958605f, 0.237612313865471f, 0.238534563605801f,
1093 0.239456399887938f, 0.240377821424194f, 0.241298826930859f, 0.242219415128201f, 0.24313958474048f, 0.244059334495949f, 0.244978663126864f, 0.24589756936949f, 0.246816051964103f, 0.247734109655002f,
1094 0.248651741190513f, 0.249568945322993f, 0.250485720808836f, 0.251402066408485f, 0.252317980886427f, 0.25323346301121f, 0.254148511555439f, 0.25506312529579f, 0.255977303013006f, 0.25689104349191f,
1095 0.25780434552141f, 0.258717207894497f, 0.259629629408258f, 0.260541608863876f, 0.261453145066638f, 0.262364236825938f, 0.263274882955282f, 0.264185082272293f, 0.265094833598715f, 0.266004135760417f,
1096 0.2669129875874f, 0.267821387913799f, 0.268729335577886f, 0.269636829422078f, 0.270543868292937f, 0.271450451041176f, 0.272356576521665f, 0.27326224359343f, 0.274167451119659f, 0.275072197967707f,
1097 0.275976483009098f, 0.27688030511953f, 0.277783663178873f, 0.278686556071182f, 0.27958898268469f, 0.280490941911819f, 0.281392432649178f, 0.282293453797569f, 0.283194004261987f, 0.284094082951627f,
1098 0.284993688779881f, 0.285892820664347f, 0.286791477526827f, 0.28768965829333f, 0.288587361894077f, 0.289484587263501f, 0.29038133334025f, 0.291277599067188f, 0.292173383391399f, 0.293068685264188f,
1099 0.293963503641084f, 0.294857837481838f, 0.295751685750432f, 0.296645047415071f, 0.297537921448196f, 0.298430306826474f, 0.299322202530807f, 0.300213607546333f, 0.301104520862424f, 0.301994941472688f,
1100 0.302884868374971f, 0.303774300571361f, 0.304663237068183f, 0.305551676876003f, 0.30643961900963f, 0.307327062488116f, 0.308214006334753f, 0.309100449577082f, 0.309986391246883f, 0.310871830380185f,
1101 0.31175676601726f, 0.312641197202625f, 0.313525122985044f, 0.314408542417527f, 0.31529145455733f, 0.316173858465954f, 0.317055753209147f, 0.317937137856902f, 0.318818011483458f, 0.3196983731673f,
1102 0.320578221991157f, 0.321457557042003f, 0.322336377411056f, 0.323214682193777f, 0.324092470489872f, 0.324969741403286f, 0.325846494042208f, 0.326722727519067f, 0.327598440950531f, 0.328473633457506f,
1103 0.329348304165139f, 0.330222452202808f, 0.331096076704132f, 0.33196917680696f, 0.332841751653376f, 0.333713800389694f, 0.334585322166459f, 0.335456316138443f, 0.336326781464645f, 0.33719671730829f,
1104 0.338066122836825f, 0.338934997221921f, 0.339803339639465f, 0.340671149269565f, 0.341538425296542f, 0.342405166908932f, 0.343271373299484f, 0.344137043665154f, 0.345002177207105f, 0.345866773130707f,
1105 0.34673083064553f, 0.347594348965346f, 0.348457327308122f, 0.349319764896022f, 0.350181660955402f, 0.351043014716805f, 0.351903825414965f, 0.352764092288795f, 0.353623814581394f, 0.354482991540035f,
1106 0.355341622416168f, 0.356199706465416f, 0.357057242947567f, 0.35791423112658f, 0.358770670270572f, 0.359626559651822f, 0.360481898546763f, 0.361336686235982f, 0.362190922004212f, 0.363044605140335f,
1107 0.363897734937373f, 0.364750310692485f, 0.365602331706967f, 0.366453797286243f, 0.367304706739864f, 0.368155059381507f, 0.369004854528964f, 0.369854091504145f, 0.370702769633069f, 0.371550888245862f,
1108 0.372398446676754f, 0.373245444264073f, 0.374091880350239f, 0.374937754281765f, 0.375783065409249f, 0.376627813087368f, 0.377471996674877f, 0.378315615534604f, 0.379158669033442f, 0.380001156542349f,
1109 0.380843077436342f, 0.381684431094488f, 0.382525216899905f, 0.383365434239755f, 0.384205082505239f, 0.385044161091591f, 0.385882669398074f, 0.386720606827975f, 0.387557972788602f, 0.388394766691274f,
1110 0.389230987951321f, 0.390066635988073f, 0.390901710224862f, 0.39173621008901f, 0.392570135011829f, 0.393403484428609f, 0.394236257778621f, 0.395068454505103f, 0.395900074055263f, 0.396731115880264f,
1111 0.397561579435227f, 0.39839146417922f, 0.399220769575253f, 0.400049495090274f, 0.400877640195163f, 0.401705204364725f, 0.402532187077683f, 0.403358587816674f, 0.404184406068245f, 0.405009641322841f,
1112 0.405834293074804f, 0.406658360822366f, 0.407481844067642f, 0.408304742316622f, 0.409127055079168f, 0.409948781869008f, 0.410769922203726f, 0.411590475604759f, 0.412410441597387f, 0.413229819710733f,
1113 0.414048609477749f, 0.414866810435215f, 0.415684422123729f, 0.416501444087703f, 0.417317875875355f, 0.418133717038701f, 0.418948967133553f, 0.419763625719506f, 0.420577692359935f, 0.42139116662199f,
1114 0.422204048076584f, 0.423016336298389f, 0.423828030865831f, 0.42463913136108f, 0.425449637370042f, 0.426259548482358f, 0.427068864291389f, 0.427877584394215f, 0.428685708391626f, 0.429493235888114f,
1115 0.430300166491866f, 0.431106499814758f, 0.431912235472348f, 0.432717373083866f, 0.433521912272209f, 0.434325852663933f, 0.435129193889247f, 0.435931935582003f, 0.43673407737969f, 0.437535618923428f,
1116 0.438336559857958f, 0.439136899831635f, 0.439936638496422f, 0.440735775507881f, 0.441534310525167f, 0.442332243211017f, 0.443129573231746f, 0.443926300257239f, 0.444722423960939f, 0.445517944019847f,
1117 0.446312860114506f, 0.447107171928999f, 0.447900879150937f, 0.448693981471457f, 0.449486478585208f, 0.450278370190345f, 0.451069655988523f, 0.451860335684889f, 0.452650408988071f, 0.453439875610172f,
1118 0.454228735266762f, 0.455016987676872f, 0.45580463256298f, 0.456591669651011f, 0.457378098670321f, 0.458163919353695f, 0.458949131437335f, 0.459733734660856f, 0.460517728767271f, 0.461301113502991f,
1119 0.46208388861781f, 0.462866053864901f, 0.463647609000806f, 0.464428553785428f, 0.465208887982023f, 0.46598861135719f, 0.466767723680866f, 0.467546224726316f, 0.468324114270123f, 0.46910139209218f,
1120 0.469878057975687f, 0.470654111707133f, 0.471429553076297f, 0.472204381876234f, 0.472978597903266f, 0.473752200956977f, 0.474525190840205f, 0.475297567359028f, 0.476069330322761f, 0.476840479543945f,
1121 0.477611014838337f, 0.478380936024907f, 0.479150242925823f, 0.479918935366444f, 0.480687013175316f, 0.481454476184158f, 0.482221324227854f, 0.482987557144447f, 0.48375317477513f, 0.484518176964233f,
1122 0.485282563559221f, 0.48604633441068f, 0.48680948937231f, 0.487572028300918f, 0.488333951056406f, 0.489095257501764f, 0.489855947503062f, 0.490616020929441f, 0.491375477653102f, 0.4921343175493f,
1123 0.492892540496335f, 0.49365014637554f, 0.494407135071275f, 0.49516350647092f, 0.495919260464861f, 0.496674396946486f, 0.497428915812172f, 0.498182816961281f, 0.498936100296146f, 0.499688765722065f,
1124 0.500440813147294f, 0.501192242483033f, 0.501943053643421f, 0.502693246545526f, 0.503442821109336f, 0.504191777257751f, 0.504940114916572f, 0.505687834014494f, 0.506434934483097f, 0.507181416256835f,
1125 0.50792727927303f, 0.508672523471861f, 0.509417148796356f, 0.510161155192383f, 0.51090454260864f, 0.511647310996647f, 0.512389460310738f, 0.513130990508049f, 0.513871901548512f, 0.514612193394845f,
1126 0.515351866012543f, 0.51609091936987f, 0.516829353437846f, 0.517567168190245f, 0.518304363603578f, 0.519040939657092f, 0.519776896332754f, 0.520512233615247f, 0.521246951491958f, 0.521981049952972f,
1127 0.522714528991058f, 0.523447388601666f, 0.524179628782913f, 0.524911249535579f, 0.525642250863092f, 0.526372632771524f, 0.52710239526958f, 0.527831538368588f, 0.528560062082493f, 0.529287966427846f,
1128 0.530015251423793f, 0.530741917092071f, 0.531467963456995f, 0.53219339054545f, 0.532918198386882f, 0.533642387013291f, 0.534365956459219f, 0.535088906761743f, 0.535811237960464f, 0.5365329500975f,
1129 0.537254043217479f, 0.537974517367523f, 0.538694372597247f, 0.539413608958744f, 0.540132226506582f, 0.540850225297788f, 0.541567605391845f, 0.542284366850679f, 0.543000509738655f, 0.54371603412256f,
1130 0.544430940071603f, 0.545145227657401f, 0.54585889695397f, 0.546571948037719f, 0.547284380987437f, 0.547996195884288f, 0.548707392811801f, 0.549417971855859f, 0.550127933104693f, 0.55083727664887f,
1131 0.551546002581289f, 0.552254110997165f, 0.552961601994028f, 0.553668475671709f, 0.554374732132331f, 0.555080371480305f, 0.555785393822314f, 0.55648979926731f, 0.557193587926504f, 0.557896759913355f,
1132 0.558599315343562f, 0.559301254335059f, 0.560002577007999f, 0.560703283484751f, 0.561403373889889f, 0.562102848350186f, 0.562801706994599f, 0.563499949954267f, 0.564197577362498f, 0.564894589354762f,
1133 0.565590986068683f, 0.566286767644028f, 0.5669819342227f, 0.56767648594873f, 0.568370422968264f, 0.569063745429561f, 0.569756453482978f, 0.570448547280968f, 0.571140026978063f, 0.571830892730873f,
1134 0.572521144698072f, 0.573210783040395f, 0.573899807920624f, 0.57458821950358f, 0.575276017956118f, 0.575963203447116f, 0.576649776147467f, 0.577335736230069f, 0.57802108386982f, 0.578705819243603f,
1135 0.579389942530287f, 0.580073453910708f, 0.58075635356767f, 0.58143864168593f, 0.582120318452191f, 0.582801384055095f, 0.583481838685215f, 0.584161682535044f, 0.584840915798988f, 0.585519538673358f,
1136 0.586197551356361f, 0.586874954048091f, 0.587551746950524f, 0.588227930267504f, 0.588903504204738f, 0.58957846896979f, 0.590252824772067f, 0.590926571822816f, 0.591599710335111f, 0.592272240523851f,
1137 0.592944162605743f, 0.593615476799303f, 0.594286183324841f, 0.594956282404456f, 0.595625774262027f, 0.596294659123204f, 0.596962937215402f, 0.597630608767789f, 0.598297674011284f, 0.598964133178543f,
1138 0.599629986503951f, 0.600295234223621f, 0.600959876575375f, 0.601623913798746f, 0.602287346134964f, 0.60295017382695f, 0.603612397119307f, 0.604274016258314f, 0.604935031491914f, 0.605595443069711f,
1139 0.606255251242958f, 0.606914456264552f, 0.607573058389022f, 0.608231057872528f, 0.608888454972845f, 0.609545249949361f, 0.610201443063065f, 0.610857034576544f, 0.611512024753969f, 0.612166413861094f,
1140 0.612820202165241f, 0.613473389935299f, 0.614125977441711f, 0.614777964956469f, 0.615429352753105f, 0.616080141106684f, 0.616730330293797f, 0.617379920592551f, 0.618028912282562f, 0.61867730564495f,
1141 0.619325100962327f, 0.619972298518794f, 0.620618898599929f, 0.621264901492783f, 0.621910307485869f, 0.622555116869157f, 0.623199329934066f, 0.623842946973455f, 0.624485968281619f, 0.625128394154276f,
1142 0.625770224888563f, 0.626411460783031f, 0.62705210213763f, 0.627692149253711f, 0.62833160243401f, 0.628970461982645f, 0.62960872820511f, 0.630246401408263f, 0.630883481900322f, 0.631519969990857f,
1143 0.632155865990784f, 0.632791170212352f, 0.633425882969145f, 0.634060004576065f, 0.634693535349333f, 0.635326475606475f, 0.635958825666321f, 0.636590585848993f, 0.637221756475899f, 0.637852337869727f,
1144 0.638482330354438f, 0.639111734255255f, 0.639740549898664f, 0.640368777612397f, 0.640996417725432f, 0.641623470567984f, 0.642249936471496f, 0.642875815768636f, 0.643501108793284f, 0.644125815880533f,
1145 0.644749937366675f, 0.645373473589196f, 0.645996424886772f, 0.646618791599258f, 0.647240574067683f, 0.647861772634245f, 0.648482387642301f, 0.649102419436359f, 0.649721868362078f, 0.650340734766252f,
1146 0.650959018996812f, 0.651576721402813f, 0.652193842334429f, 0.652810382142948f, 0.653426341180762f, 0.654041719801364f, 0.65465651835934f, 0.655270737210358f, 0.655884376711171f, 0.656497437219599f,
1147 0.657109919094532f, 0.657721822695918f, 0.658333148384756f, 0.658943896523094f, 0.659554067474019f, 0.660163661601649f, 0.660772679271133f, 0.661381120848635f, 0.661988986701338f, 0.662596277197427f,
1148 0.663202992706093f, 0.663809133597518f, 0.664414700242873f, 0.665019693014312f, 0.665624112284961f, 0.666227958428919f, 0.666831231821246f, 0.667433932837957f, 0.66803606185602f, 0.668637619253345f,
1149 0.66923860540878f, 0.669839020702103f, 0.670438865514021f, 0.671038140226157f, 0.671636845221047f, 0.672234980882134f, 0.672832547593763f, 0.673429545741172f, 0.674025975710487f, 0.674621837888718f,
1150 0.67521713266375f, 0.675811860424338f, 0.676406021560103f, 0.676999616461522f, 0.677592645519925f, 0.678185109127489f, 0.678777007677231f, 0.679368341563002f, 0.679959111179482f, 0.680549316922172f,
1151 0.681138959187393f, 0.681728038372273f, 0.682316554874748f, 0.682904509093552f, 0.683491901428213f, 0.684078732279046f, 0.684665002047149f, 0.685250711134394f, 0.685835859943427f, 0.686420448877654f,
1152 0.687004478341245f, 0.68758794873912f, 0.688170860476949f, 0.688753213961141f, 0.689335009598846f, 0.689916247797941f, 0.69049692896703f, 0.691077053515437f, 0.6916566218532f, 0.692235634391065f,
1153 0.692814091540483f, 0.693391993713601f, 0.69396934132326f, 0.694546134782985f, 0.695122374506987f, 0.695698060910148f, 0.696273194408024f, 0.696847775416835f, 0.697421804353461f, 0.697995281635439f,
1154 0.69856820768095f, 0.699140582908824f, 0.699712407738527f, 0.70028368259016f, 0.70085440788445f, 0.70142458404275f, 0.701994211487028f, 0.702563290639866f, 0.703131821924454f, 0.703699805764582f,
1155 0.704267242584639f, 0.704834132809605f, 0.705400476865049f, 0.705966275177119f, 0.706531528172541f, 0.707096236278612f, 0.707660399923198f, 0.708224019534724f, 0.708787095542173f, 0.70934962837508f,
1156 0.709911618463525f, 0.710473066238132f, 0.711033972130061f, 0.711594336571003f, 0.712154159993179f, 0.712713442829328f, 0.713272185512711f, 0.713830388477098f, 0.714388052156769f, 0.714945176986506f,
1157 0.715501763401588f, 0.71605781183779f, 0.716613322731375f, 0.717168296519088f, 0.717722733638155f, 0.718276634526277f, 0.718829999621625f, 0.719382829362832f, 0.719935124188996f, 0.720486884539668f,
1158 0.721038110854852f, 0.721588803574998f, 0.722138963140998f, 0.722688589994184f, 0.723237684576318f, 0.723786247329592f, 0.724334278696622f, 0.724881779120445f, 0.725428749044511f, 0.725975188912682f,
1159 0.726521099169226f, 0.727066480258813f, 0.727611332626511f, 0.72815565671778f, 0.72869945297847f, 0.729242721854815f, 0.729785463793429f, 0.730327679241302f, 0.730869368645794f, 0.731410532454635f,
1160 0.731951171115917f, 0.732491285078088f, 0.733030874789955f, 0.733569940700672f, 0.73410848325974f, 0.734646502917002f, 0.73518400012264f, 0.735720975327167f, 0.736257428981428f, 0.736793361536592f,
1161 0.737328773444149f, 0.737863665155908f, 0.73839803712399f, 0.738931889800823f, 0.739465223639145f, 0.73999803909199f, 0.740530336612693f, 0.741062116654879f, 0.741593379672465f, 0.74212412611965f,
1162 0.742654356450918f, 0.743184071121027f, 0.74371327058501f, 0.74424195529817f, 0.744770125716075f, 0.745297782294555f, 0.745824925489697f, 0.746351555757843f, 0.746877673555588f, 0.747403279339768f,
1163 0.747928373567467f, 0.748452956696006f, 0.748977029182941f, 0.749500591486061f, 0.750023644063381f, 0.750546187373141f, 0.751068221873802f, 0.751589748024043f, 0.752110766282754f, 0.752631277109036f,
1164 0.753151280962194f, 0.75367077830174f, 0.754189769587379f, 0.754708255279016f, 0.755226235836745f, 0.755743711720849f, 0.756260683391796f, 0.756777151310235f, 0.757293115936992f, 0.757808577733069f,
1165 0.758323537159635f, 0.758837994678031f, 0.759351950749758f, 0.75986540583648f, 0.760378360400016f, 0.760890814902341f, 0.761402769805578f, 0.761914225571999f, 0.762425182664017f, 0.762935641544187f,
1166 0.763445602675202f, 0.763955066519886f, 0.764464033541195f, 0.764972504202212f, 0.765480478966144f, 0.765987958296319f, 0.766494942656179f, 0.767001432509286f, 0.767507428319308f, 0.768012930550024f,
1167 0.768517939665315f, 0.769022456129166f, 0.769526480405658f, 0.77003001295897f, 0.770533054253371f, 0.771035604753219f, 0.77153766492296f, 0.77203923522712f, 0.772540316130307f, 0.773040908097206f,
1168 0.773541011592573f, 0.774040627081239f, 0.7745397550281f, 0.775038395898116f, 0.775536550156312f, 0.776034218267768f, 0.776531400697624f, 0.77702809791107f, 0.777524310373348f, 0.778020038549745f,
1169 0.778515282905595f, 0.779010043906271f, 0.779504322017186f, 0.77999811770379f, 0.780491431431562f, 0.780984263666015f, 0.781476614872688f, 0.781968485517144f, 0.782459876064968f, 0.782950786981764f,
1170 0.783441218733152f, 0.783931171784766f, 0.784420646602251f, 0.784909643651259f, 0.785398163397448f};
IFX_LUTATAN2F32_SIZE
#define IFX_LUTATAN2F32_SIZE
size of Ifx_LutAtan2F32 table
Definition: Ifx_LutAtan2F32.h:35
float32
float float32
Definition: Platform_Types.h:167
sint16
short sint16
Definition: Platform_Types.h:126
Ifx_g_LutAtan2F32_FxpAngle_table
const Ifx_Lut_FxpAngle Ifx_g_LutAtan2F32_FxpAngle_table[1024+1]
Definition: Ifx_LutAtan2F32_Table.c:37
Ifx_LutAtan2F32.h
Floating point signal, vector, and matrix library.
Ifx_g_LutAtan2F32_table
const float32 Ifx_g_LutAtan2F32_table[IFX_LUTATAN2F32_SIZE+1]
Definition: Ifx_LutAtan2F32_Table.c:1066
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:64
IFX_LUT_F32_TO_FXPANGLE
#define IFX_LUT_F32_TO_FXPANGLE(f)
Convert from float32 angle in radian into fixed-point angle type.
Definition: Ifx_Lut.h:67


iLLD_TC26B: Ifx_LutIndexedLinearF32.h Source File

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  • CpuGeneric
  • SysSe
  • Math
Ifx_LutIndexedLinearF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutIndexedLinearF32.h
3 * \brief Look-up functionality
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 *
14 * Infineon Technologies AG (Infineon) is supplying this file for use
15 * exclusively with Infineon's microcontroller products. This file can be freely
16 * distributed within development tools that are supporting such microcontroller
17 * products.
18 *
19 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
20 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
22 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
23 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
24 *
25 * \defgroup library_srvsw_sysse_math_f32_lut_indexedLinear Indexes look-up table (with linear interpolation)
26 * \ingroup library_srvsw_sysse_math_f32_lut
27 *
28 */
29
30 #ifndef IFX_LUTINDEXEDLINEARF32_H
31 #define IFX_LUTINDEXEDLINEARF32_H
32
33 //________________________________________________________________________________________
34 // INCLUDES
35 #include "Cpu/Std/Ifx_Types.h"
36
37 typedef struct
38 {
39 float32 gain; /**< \brief channel gain */
40 float32 offset; /**< \brief channel offset */
41 } Ifx_LutIndexedLinearF32_Item;
42
43 typedef struct
44 {
45 uint16 segmentCount;
46 sint8 shift;
47 const Ifx_LutIndexedLinearF32_Item *segments;
48 } Ifx_LutIndexedLinearF32;
49
50 //________________________________________________________________________________________
51 // FUNCTION PROTOTYPES
52
53 /** \addtogroup library_srvsw_sysse_math_f32_lut_indexedLinear
54 * \{ */
55 IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index);
56 /** \} */
57
58 //________________________________________________________________________________________
59 // INLINE FUNCTION IMPLEMENTATION
60
61 /** \brief Look-up table search
62 *
63 *
64 * \param ml pointer to the multi-segment object
65 * \param index
66 * \return interpolated value */
67 IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
68 {
69 uint32 i;
70 i = index >> ml->shift;
71
72 return (ml->segments[i].gain * index) + ml->segments[i].offset;
73 }
74
75
76 #endif /* IFX_LUTINDEXEDLINEARF32_H */
Ifx_LutIndexedLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutIndexedLinearF32.h:39
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:43
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
Ifx_LutIndexedLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutIndexedLinearF32.h:40
Ifx_LutIndexedLinearF32_search
IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search.
Definition: Ifx_LutIndexedLinearF32.h:67
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LutIndexedLinearF32_Item
Definition: Ifx_LutIndexedLinearF32.h:37
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_LutIndexedLinearF32::segmentCount
uint16 segmentCount
Definition: Ifx_LutIndexedLinearF32.h:45
Ifx_LutIndexedLinearF32::segments
const Ifx_LutIndexedLinearF32_Item * segments
Definition: Ifx_LutIndexedLinearF32.h:47
sint8
signed char sint8
Definition: Platform_Types.h:122
Ifx_LutIndexedLinearF32::shift
sint8 shift
Definition: Ifx_LutIndexedLinearF32.h:46


iLLD_TC26B: Ifx_LutLSincosF32.c Source File

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  • CpuGeneric
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Ifx_LutLSincosF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLSincosF32.c
3 * \brief Table data for linear interpolation Sin/Cos lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * $Revision: 614 $
25 * $Date: 2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013) $
26 *
27 */
28
29 #include "Ifx_Lut.h"
30 #include "Ifx_LutIndexedLinearF32.h"
31
32 #if IFX_LUT_TABLE_CONST == 0
33 /* FIXME Table size not consistent */
34 IFX_LUT_TABLE float32 Ifx_g_LutLSincosF32_table[IFX_LUT_ANGLE_RESOLUTION + (IFX_LUT_ANGLE_RESOLUTION / 4)];
35 IFX_LUT_TABLE Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32;
36 #else
37
38 #if (IFX_LUT_ANGLE_RESOLUTION != 4096)
39 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
40 #endif
41
42 /*lint -e915*/
43 #define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT (128)
44
45 const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128] = {
46 {0.00153336482273181, 0 },
47 {0.00152967081256696, 0.000118208325275426},
48 {0.00152229169143129, 0.000590472077958315},
49 {0.00151124523627395, 0.00165093177306225 },
50 {0.00149655805897299, 0.00353089046758576 },
51 {0.00147826554222495, 0.00645769314727157 },
52 {0.00145641175430493, 0.010653620427916 },
53 {0.00143104934290218, 0.0163348005821319 },
54 {0.00140223940828726, 0.0237101438435514 },
55 {0.00137005135611611, 0.0329803028688421 },
56 {0.00133456273022575, 0.0443366631537574 },
57 {0.00129585902582439, 0.057960367103036 },
58 {0.00125403348352597, 0.074021375345628 },
59 {0.00120918686472538, 0.0926775687666757 },
60 {0.0011614272088554, 0.114073894596426 },
61 {0.00111086957311029, 0.138341559754081 },
62 {0.00105763575526286, 0.165597274491961 },
63 {0.00100185400024306, 0.195942549222735 },
64 {0.00094365869118462, 0.229463047240396 },
65 {0.000883190025684388, 0.266227995864537 },
66 {0.000820593678053965, 0.306289658348008 },
67 {0.000756020448377588, 0.349682868690533 },
68 {0.000689625899221512, 0.39642463129641 },
69 {0.000621569980870106, 0.446513787203045 },
70 {0.00055201664599169, 0.499930748389669 },
71 {0.000481133454662129, 0.556637301453318 },
72 {0.00040909117069797, 0.616576481711498 },
73 {0.000336063350271452, 0.67967251856001 },
74 {0.000262225923798456, 0.745830852679814 },
75 {0.000187756772106744, 0.814938225449723 },
76 {0.000112835297905487, 0.886862840682929 },
77 {3.76419935883623E-05, 0.961454598565517 },
78 {-3.76419935883623E-05, 1.03854540143448 },
79 {-0.000112835297905484, 1.11794953079336 },
80 {-0.000187756772106747, 1.19946409472434 },
81 {-0.000262225923798456, 1.28286954461905 },
82 {-0.000336063350271452, 1.36793025991594 },
83 {-0.00040909117069797, 1.45439519930094 },
84 {-0.000481133454662129, 1.54199861660136 },
85 {-0.00055201664599169, 1.63046083938065 },
86 {-0.000621569980870103, 1.71948910802502 },
87 {-0.000689625899221512, 1.80877847290207 },
88 {-0.000756020448377592, 1.89801274696784 },
89 {-0.000820593678053958, 1.98686551100252 },
90 {-0.000883190025684391, 2.07500116846617 },
91 {-0.00094365869118462, 2.1620760467865 },
92 {-0.00100185400024307, 2.24773954172053 },
93 {-0.00105763575526286, 2.3316353012703 },
94 {-0.00111086957311028, 2.41340244548394 },
95 {-0.00116142720885541, 2.4926768183323 },
96 {-0.00120918686472538, 2.56909226772425 },
97 {-0.00125403348352598, 2.64228194960683 },
98 {-0.00129585902582439, 2.71187965199138 },
99 {-0.00133456273022575, 2.77752113465609 },
100 {-0.00137005135611612, 2.83884548019465 },
101 {-0.00140223940828725, 2.89549645201585 },
102 {-0.00143104934290217, 2.94712385484579 },
103 {-0.00145641175430494, 2.99338489324442 },
104 {-0.00147826554222495, 3.03394552362397 },
105 {-0.00149655805897298, 3.06848179524426 },
106 {-0.00151124523627396, 3.09668117566214 },
107 {-0.00152229169143128, 3.11824385612922 },
108 {-0.00152967081256696, 3.13288403246242 },
109 {-0.00153336482273181, 3.14033115695474 },
110 {-0.00153336482273181, 3.14033115695474 },
111 {-0.00152967081256696, 3.13264761581187 },
112 {-0.00152229169143128, 3.11706291197331 },
113 {-0.00151124523627396, 3.09337931211601 },
114 {-0.00149655805897298, 3.06142001430908 },
115 {-0.00147826554222495, 3.02103013732942 },
116 {-0.00145641175430494, 2.9720776523886 },
117 {-0.00143104934290217, 2.91445425368152 },
118 {-0.00140223940828725, 2.84807616432874 },
119 {-0.00137005135611612, 2.77288487445697 },
120 {-0.00133456273022575, 2.68884780834857 },
121 {-0.00129585902582439, 2.59595891778531 },
122 {-0.00125403348352598, 2.49423919891558 },
123 {-0.00120918686472538, 2.38373713019089 },
124 {-0.00116142720885541, 2.26452902913946 },
125 {-0.00111086957311028, 2.13671932597577 },
126 {-0.00105763575526286, 2.00044075228637 },
127 {-0.00100185400024306, 1.85585444327504 },
128 {-0.000943658691184637, 1.70314995230575 },
129 {-0.000883190025684381, 1.54254517673707 },
130 {-0.000820593678053962, 1.3742861943065 },
131 {-0.000756020448377592, 1.19864700958678 },
132 {-0.000689625899221506, 1.01592921030923 },
133 {-0.000621569980870106, 0.826461533618933 },
134 {-0.000552016645991697, 0.630599342601331 },
135 {-0.000481133454662126, 0.428724013694713 },
136 {-0.000409091170697973, 0.221242235877955 },
137 {-0.000336063350271448, 0.00858522279591345 },
138 {-0.000262225923798456, -0.208792160740577 },
139 {-0.000187756772106751, -0.430412356175091 },
140 {-0.000112835297905484, -0.655776150572502 },
141 {-3.76419935883623E-05, -0.884363795696551 },
142 {3.76419935883623E-05, -1.11563620430345 },
143 {0.000112835297905484, -1.34903622090379 },
144 {0.000187756772106751, -1.58398996399897 },
145 {0.000262225923798452, -1.81990823655828 },
146 {0.000336063350271452, -2.05618800127188 },
147 {0.00040909117069797, -2.29221391689038 },
148 {0.000481133454662126, -2.52735993174939 },
149 {0.000552016645991697, -2.76099093037165 },
150 {0.000621569980870103, -2.99246442884699 },
151 {0.000689625899221509, -3.22113231450771 },
152 {0.000756020448377588, -3.44634262524513 },
153 {0.000820593678053962, -3.66744136365704 },
154 {0.000883190025684381, -3.88377434106776 },
155 {0.000943658691184637, -4.09468904633266 },
156 {0.00100185400024306, -4.29953653421829 },
157 {0.00105763575526286, -4.49767332804863 },
158 {0.00111086957311028, -4.6884633312138 },
159 {0.0011614272088554, -4.87127974206814 },
160 {0.0012091868647254, -5.04550696668189 },
161 {0.00125403348352597, -5.21054252386801 },
162 {0.00129585902582438, -5.36579893687972 },
163 {0.00133456273022575, -5.51070560615843 },
164 {0.00137005135611611, -5.64471065752041 },
165 {0.00140223940828725, -5.76728276018815 },
166 {0.0014310493429022, -5.87791290910954 },
167 {0.00145641175430492, -5.97611616606088 },
168 {0.00147826554222495, -6.06143335410066 },
169 {0.00149655805897298, -6.13343270002092 },
170 {0.00151124523627395, -6.19171141955115 },
171 {0.00152229169143131, -6.2358972401806 },
172 {0.00152967081256695, -6.2656498565995 },
173 {0.00153336482273181, -6.28066231390948 },
174 };
175
176 const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32 = {
177 .segmentCount = IFX_F32_LUTL_SINCOS_ELEMENT_COUNT,
178 .shift = 5,
179 .segments = Ifx_g_LutLSincosF32_table
180 };
181 #endif
Ifx_g_LutLSincosF32_table
const Ifx_LutIndexedLinearF32_Item Ifx_g_LutLSincosF32_table[128]
Definition: Ifx_LutLSincosF32.c:45
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:43
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:45
float32
float float32
Definition: Platform_Types.h:167
Ifx_g_LutLSincosF32
const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Definition: Ifx_LutLSincosF32.c:176
IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
#define IFX_F32_LUTL_SINCOS_ELEMENT_COUNT
Definition: Ifx_LutLSincosF32.c:43
Ifx_LutIndexedLinearF32_Item
Definition: Ifx_LutIndexedLinearF32.h:37
Ifx_LutIndexedLinearF32::segmentCount
uint16 segmentCount
Definition: Ifx_LutIndexedLinearF32.h:45
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:55
Ifx_LutIndexedLinearF32.h
Look-up functionality.


iLLD_TC26B: Ifx_LutLSincosF32.h Source File

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  • CpuGeneric
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Ifx_LutLSincosF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLSincosF32.h
3 * \brief Sin/Cos linear approximated lookup functions with fixed-point angle data type
4 * \ingroup library_srvsw_sysse_math_lut_lsincos
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 *
15 * Infineon Technologies AG (Infineon) is supplying this file for use
16 * exclusively with Infineon's microcontroller products. This file can be freely
17 * distributed within development tools that are supporting such microcontroller
18 * products.
19 *
20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
23 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
24 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
25 *
26 * \defgroup library_srvsw_sysse_math_lut_lsincos Linear trigonometric Look-ups
27 * \ingroup library_srvsw_sysse_math_f32_lut
28 *
29 */
30
31 #ifndef IFX_LUTLSINCOSF32_H
32 #define IFX_LUTLSINCOSF32_H
33 //________________________________________________________________________________________
34
35 #include "SysSe/Math/IFX_Cf32.h"
36 #include "Ifx_Lut.h"
37 #include "Ifx_LutIndexedLinearF32.h"
38 //________________________________________________________________________________________
39
40 /**
41 * \brief Look-up table for sin */
42 IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32;
43
44 /**
45 * \brief Sine lookup function
46 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
47 * \return sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
48 * \ingroup library_srvsw_sysse_math_lut_lsincos
49 */
50 IFX_INLINE float32 Ifx_LutLSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
51 {
52 fxpAngle = fxpAngle & (IFX_LUT_ANGLE_RESOLUTION - 1);
53
54 return Ifx_LutIndexedLinearF32_search(&Ifx_g_LutLSincosF32, fxpAngle);
55 }
56
57
58 /**
59 * \brief Cosine lookup function
60 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
61 * \return cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
62 * \ingroup library_srvsw_sysse_math_lut_lsincos
63 */
64 IFX_INLINE float32 Ifx_LutLSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
65 {
66 return Ifx_LutLSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
67 }
68
69
70 /**
71 * \brief Sine and Cosine lookup function
72 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
73 * \retval real = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
74 * \retval imag = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
75 * \ingroup library_srvsw_sysse_math_lut_lsincos
76 */
77 IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
78 {
79 cfloat32 result;
80 result.imag = Ifx_LutLSincosF32_sin(fxpAngle);
81 result.real = Ifx_LutLSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
82 return result;
83 }
84
85
86 //________________________________________________________________________________________
87 #endif
Ifx_LutLSincosF32_cossin
IFX_INLINE cfloat32 Ifx_LutLSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function.
Definition: Ifx_LutLSincosF32.h:77
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_g_LutLSincosF32
IFX_EXTERN const Ifx_LutIndexedLinearF32 Ifx_g_LutLSincosF32
Look-up table for sin.
Definition: Ifx_LutLSincosF32.h:42
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:58
Ifx_LutIndexedLinearF32
Definition: Ifx_LutIndexedLinearF32.h:43
float32
float float32
Definition: Platform_Types.h:167
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:44
Ifx_LutLSincosF32_sin
IFX_INLINE float32 Ifx_LutLSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutLSincosF32.h:50
cfloat32
Definition: Ifx_Types.h:41
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_LutIndexedLinearF32_search
IFX_INLINE float32 Ifx_LutIndexedLinearF32_search(const Ifx_LutIndexedLinearF32 *ml, uint32 index)
Look-up table search.
Definition: Ifx_LutIndexedLinearF32.h:67
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_LutLSincosF32_cos
IFX_INLINE float32 Ifx_LutLSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function.
Definition: Ifx_LutLSincosF32.h:64
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:43
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:64
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:55
Ifx_LutIndexedLinearF32.h
Look-up functionality.


iLLD_TC26B: Ifx_LutLinearF32.c Source File

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  • CpuGeneric
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Ifx_LutLinearF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLinearF32.c
3 * \brief Linear look-up function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "Ifx_LutLinearF32.h"
27
28 /** \brief Look-up table with binary search implementation
29 *
30 * Value inside table will be linearly interpolated.
31 * Value outside table will be linearly extrapolated.
32 *
33 * \param ml pointer to the multi-segment object
34 * \param index
35 * \return linear interpolated value */
36 float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
37 {
38 sint16 imin;
39 sint16 imax;
40 sint16 imid;
41
42 imin = 0;
43 imax = ml->segmentCount - 1;
44
45 if (ml->segments[1].boundary > ml->segments[0].boundary)
46 {
47 while (imin < imax)
48 {
49 imid = imin + (imax - imin) / 2;
50
51 if (index > ml->segments[imid].boundary)
52 {
53 imin = imid + 1;
54 }
55 else
56 {
57 imax = imid;
58 }
59 }
60 }
61 else
62 {
63 while (imin < imax)
64 {
65 imid = imin + (imax - imin) / 2;
66
67 if (index < ml->segments[imid].boundary)
68 {
69 imin = imid + 1;
70 }
71 else
72 {
73 imax = imid;
74 }
75 }
76 }
77
78 return (ml->segments[imin].gain * index) + ml->segments[imin].offset;
79 }
Ifx_LutLinearF32::segmentCount
sint8 segmentCount
Definition: Ifx_LutLinearF32.h:46
Ifx_LutLinearF32_searchBin
float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation.
Definition: Ifx_LutLinearF32.c:36
float32
float float32
Definition: Platform_Types.h:167
Ifx_LutLinearF32_Item::boundary
float32 boundary
segment input upper limit
Definition: Ifx_LutLinearF32.h:41
Ifx_LutLinearF32::segments
const Ifx_LutLinearF32_Item * segments
Definition: Ifx_LutLinearF32.h:47
sint16
short sint16
Definition: Platform_Types.h:126
Ifx_LutLinearF32
Definition: Ifx_LutLinearF32.h:44
Ifx_LutLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutLinearF32.h:40
Ifx_LutLinearF32.h
Look-up functionality.
Ifx_LutLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutLinearF32.h:39


iLLD_TC26B: Ifx_LutLinearF32.h Source File

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  • CpuGeneric
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  • Math
Ifx_LutLinearF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutLinearF32.h
3 * \brief Look-up functionality
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 *
14 * Infineon Technologies AG (Infineon) is supplying this file for use
15 * exclusively with Infineon's microcontroller products. This file can be freely
16 * distributed within development tools that are supporting such microcontroller
17 * products.
18 *
19 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
20 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
22 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
23 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
24 *
25 * \defgroup library_srvsw_sysse_math_f32_lut_linear Look-up table (with linear interpolation)
26 * \ingroup library_srvsw_sysse_math_f32_lut
27 *
28 */
29
30 #ifndef IFX_LUTLINEARF32_H
31 #define IFX_LUTLINEARF32_H
32
33 //________________________________________________________________________________________
34 // INCLUDES
35 #include "Cpu/Std/Ifx_Types.h"
36
37 typedef struct
38 {
39 float32 gain; /**< \brief channel gain */
40 float32 offset; /**< \brief channel offset */
41 float32 boundary; /**< \brief segment input upper limit */
42 } Ifx_LutLinearF32_Item;
43
44 typedef struct
45 {
46 sint8 segmentCount;
47 const Ifx_LutLinearF32_Item *segments;
48 } Ifx_LutLinearF32;
49
50 //________________________________________________________________________________________
51 // FUNCTION PROTOTYPES
52
53 /** \addtogroup library_srvsw_sysse_math_f32_lut_linear
54 * \{ */
55 IFX_EXTERN float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index);
56 IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index);
57 IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index);
58 /** \} */
59
60 //________________________________________________________________________________________
61 // INLINE FUNCTION IMPLEMENTATION
62
63 /** \brief Look-up table with positive sequential search implementation
64 *
65 * Value inside table will be linearly interpolated
66 * Value outside table will be linearly extrapolated
67 *
68 * \param ml pointer to the multi-segment object
69 * \param index
70 * \return interpolated value */
71 IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index)
72 {
73 sint8 i = 0;
74
75 while ((index > ml->segments[i].boundary) && (i < ml->segmentCount - 1))
76 {
77 i++;
78 }
79
80 return (ml->segments[i].gain * index) + ml->segments[i].offset;
81 }
82
83
84 /** \brief Look-up table with negative sequential search implementation
85 *
86 * Value inside table will be linearly interpolated
87 * Value outside table will be linearly extrapolated
88 *
89 * \param ml pointer to the multi-segment object
90 * \param index
91 * \return interpolated value */
92 IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index)
93 {
94 sint8 i = ml->segmentCount - 1;
95
96 while ((i - 1 >= 0) && (index > ml->segments[i - 1].boundary))
97 {
98 i--;
99 }
100
101 return (ml->segments[i].gain * index) + ml->segments[i].offset;
102 }
103
104
105 #endif /* IFX_LUTLINEARF32_H */
Ifx_LutLinearF32::segmentCount
sint8 segmentCount
Definition: Ifx_LutLinearF32.h:46
Ifx_LutLinearF32_searchBin
IFX_EXTERN float32 Ifx_LutLinearF32_searchBin(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with binary search implementation.
Definition: Ifx_LutLinearF32.c:36
float32
float float32
Definition: Platform_Types.h:167
Ifx_LutLinearF32_Item::boundary
float32 boundary
segment input upper limit
Definition: Ifx_LutLinearF32.h:41
Ifx_LutLinearF32::segments
const Ifx_LutLinearF32_Item * segments
Definition: Ifx_LutLinearF32.h:47
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_LutLinearF32_Item
Definition: Ifx_LutLinearF32.h:37
Ifx_LutLinearF32_searchNegSeq
IFX_INLINE float32 Ifx_LutLinearF32_searchNegSeq(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with negative sequential search implementation.
Definition: Ifx_LutLinearF32.h:92
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx_LutLinearF32
Definition: Ifx_LutLinearF32.h:44
Ifx_LutLinearF32_Item::offset
float32 offset
channel offset
Definition: Ifx_LutLinearF32.h:40
Ifx_LutLinearF32_searchPosSeq
IFX_INLINE float32 Ifx_LutLinearF32_searchPosSeq(const Ifx_LutLinearF32 *ml, float32 index)
Look-up table with positive sequential search implementation.
Definition: Ifx_LutLinearF32.h:71
sint8
signed char sint8
Definition: Platform_Types.h:122
Ifx_LutLinearF32_Item::gain
float32 gain
channel gain
Definition: Ifx_LutLinearF32.h:39


iLLD_TC26B: Ifx_LutSincosF32.c Source File

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  • CpuGeneric
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Ifx_LutSincosF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32.c
3 * \brief Sin/Cos lookup functions with fixed-point angle data type
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25 #include "Ifx_LutSincosF32.h"
26
27 #include <math.h>
28
29 void Ifx_LutSincosF32_init(void)
30 {
31 #if IFX_LUT_TABLE_CONST == 0
32 { /* generate sin and cos table */
33 sint32 k;
34
35 for (k = 0; k <= (IFX_LUT_ANGLE_PI / 2); k++)
36 {
37 Ifx_g_LutSincosF32_table[k] = sinf((IFX_PI * 2 * k) / IFX_LUT_ANGLE_RESOLUTION);
38 }
39 }
40 #endif
41 }
42
43
44 float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
45 {
46 float32 result;
47 fxpAngle = fxpAngle & (IFX_LUT_ANGLE_RESOLUTION - 1);
48
49 if (fxpAngle < (IFX_LUT_ANGLE_PI / 2))
50 {
51 result = Ifx_g_LutSincosF32_table[fxpAngle];
52 }
53 else if (fxpAngle < IFX_LUT_ANGLE_PI)
54 {
55 fxpAngle = IFX_LUT_ANGLE_PI - fxpAngle;
56 result = Ifx_g_LutSincosF32_table[fxpAngle];
57 }
58 else if (fxpAngle < (IFX_LUT_ANGLE_PI / 2 * 3))
59 {
60 fxpAngle = fxpAngle - IFX_LUT_ANGLE_PI;
61 result = -Ifx_g_LutSincosF32_table[fxpAngle];
62 }
63 else
64 {
65 fxpAngle = IFX_LUT_ANGLE_RESOLUTION - fxpAngle;
66 result = -Ifx_g_LutSincosF32_table[fxpAngle];
67 }
68
69 return result;
70 }
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:58
float32
float float32
Definition: Platform_Types.h:167
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:200
Ifx_LutSincosF32.h
Sin/Cos lookup functions with fixed-point angle data type.
Ifx_LutSincosF32_init
void Ifx_LutSincosF32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutSincosF32.c:29
Ifx_g_LutSincosF32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.
Definition: Ifx_LutSincosF32.h:42
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_LutSincosF32_sin
float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutSincosF32.c:44
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:64
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:55


iLLD_TC26B: Ifx_LutSincosF32.h Source File

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  • CpuGeneric
  • SysSe
  • Math
Ifx_LutSincosF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32.h
3 * \brief Sin/Cos lookup functions with fixed-point angle data type
4 * \ingroup library_srvsw_sysse_math_lut_sincos
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 *
15 * Infineon Technologies AG (Infineon) is supplying this file for use
16 * exclusively with Infineon's microcontroller products. This file can be freely
17 * distributed within development tools that are supporting such microcontroller
18 * products.
19 *
20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
23 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
24 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
25 *
26 * \defgroup library_srvsw_sysse_math_lut_sincos Sinus and cosinus Look-ups
27 * \ingroup library_srvsw_sysse_math_f32_lut
28 *
29 */
30
31 #ifndef IFX_LUTSINCOSF32_H
32 #define IFX_LUTSINCOSF32_H
33 //________________________________________________________________________________________
34
35 #include "SysSe/Math/Ifx_Cf32.h"
36 #include "Ifx_Lut.h"
37 //________________________________________________________________________________________
38
39 /**
40 * \brief Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION),
41 * where k = 0..IFX_LUT_ANGLE_RESOLUTION */
42 IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI / 2) + 1];
43
44 /** \brief Initialise the lookup tables
45 * \note This is not required if (\ref IFX_LUT_TABLE_CONST == 1)
46 * \ingroup library_srvsw_sysse_math_lut_sincos
47 */
48 IFX_EXTERN void Ifx_LutSincosF32_init(void);
49
50 /**
51 * \brief Sine lookup function
52 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1)
53 * \return sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
54 * \ingroup library_srvsw_sysse_math_lut_sincos
55 */
56 IFX_EXTERN float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle);
57
58 /**
59 * \brief Cosine lookup function
60 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
61 * \return cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
62 * \ingroup library_srvsw_sysse_math_lut_sincos
63 */
64 IFX_INLINE float32 Ifx_LutSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
65 {
66 return Ifx_LutSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
67 }
68
69
70 /**
71 * \brief Sine and Cosine lookup function
72 * \param fxpAngle 0 .. (IFX_LUT_ANGLE_RESOLUTION - 1), which represents 0 .. 2*IFX_PI
73 * \retval real = cos(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
74 * \retval imag = sin(2*IFX_PI*fxpAngle/IFX_LUT_ANGLE_RESOLUTION)
75 * \ingroup library_srvsw_sysse_math_lut_sincos
76 */
77 IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
78 {
79 cfloat32 result;
80 result.imag = Ifx_LutSincosF32_sin(fxpAngle);
81 result.real = Ifx_LutSincosF32_sin((IFX_LUT_ANGLE_PI / 2) - fxpAngle);
82 return result;
83 }
84
85
86 //________________________________________________________________________________________
87 #endif
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
Ifx_LutSincosF32_cos
IFX_INLINE float32 Ifx_LutSincosF32_cos(Ifx_Lut_FxpAngle fxpAngle)
Cosine lookup function.
Definition: Ifx_LutSincosF32.h:64
IFX_LUT_ANGLE_PI
#define IFX_LUT_ANGLE_PI
Value used as 180 degree angle.
Definition: Ifx_Lut.h:58
Ifx_LutSincosF32_cossin
IFX_INLINE cfloat32 Ifx_LutSincosF32_cossin(Ifx_Lut_FxpAngle fxpAngle)
Sine and Cosine lookup function.
Definition: Ifx_LutSincosF32.h:77
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:45
float32
float float32
Definition: Platform_Types.h:167
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:44
cfloat32
Definition: Ifx_Types.h:41
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:43
Ifx_LutSincosF32_init
IFX_EXTERN void Ifx_LutSincosF32_init(void)
Initialise the lookup tables.
Definition: Ifx_LutSincosF32.c:29
Ifx_g_LutSincosF32_table
IFX_EXTERN IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[(IFX_LUT_ANGLE_PI/2)+1]
Look-up table for sin(IFX_PI*2*k/IFX_LUT_ANGLE_RESOLUTION), where k = 0..IFX_LUT_ANGLE_RESOLUTION.
Definition: Ifx_LutSincosF32.h:42
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_LutSincosF32_sin
IFX_EXTERN float32 Ifx_LutSincosF32_sin(Ifx_Lut_FxpAngle fxpAngle)
Sine lookup function.
Definition: Ifx_LutSincosF32.c:44
Ifx_Lut_FxpAngle
sint32 Ifx_Lut_FxpAngle
Fixed-point angle type.
Definition: Ifx_Lut.h:64


iLLD_TC26B: Ifx_LutSincosF32_Table.c Source File

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  • CpuGeneric
  • SysSe
  • Math
Ifx_LutSincosF32_Table.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_LutSincosF32_Table.c
3 * \brief Table data for Sin/Cos lookup functions
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * $Revision: 614 $
25 * $Date: 2013-03-04 14:09:48 +0100 (Mon, 04 Mar 2013) $
26 *
27 */
28
29 #include "Ifx_Lut.h"
30
31 #if IFX_LUT_TABLE_CONST == 0
32 /* FIXME Table size not consistent */
33 IFX_LUT_TABLE float32 Ifx_g_LutSincosF32_table[IFX_LUT_ANGLE_RESOLUTION + (IFX_LUT_ANGLE_RESOLUTION / 4)];
34 #else
35
36 #if (IFX_LUT_ANGLE_RESOLUTION != 4096)
37 #error "Inconsistent between Lookup Table and configuration. Please regenerate."
38 #endif
39
40 /*lint -e915*/
41 const float32 Ifx_g_LutSincosF32_table[1025] = {
42 0,
43 0.00153398018628477,
44 0.00306795676296598,
45 0.00460192612044857,
46 0.00613588464915448,
47 0.0076698287395311,
48 0.00920375478205982,
49 0.0107376591672645,
50 0.0122715382857199,
51 0.0138053885280604,
52 0.0153392062849881,
53 0.0168729879472817,
54 0.0184067299058048,
55 0.0199404285515144,
56 0.0214740802754695,
57 0.0230076814688394,
58 0.0245412285229123,
59 0.0260747178291039,
60 0.0276081457789657,
61 0.0291415087641937,
62 0.0306748031766366,
63 0.0322080254083046,
64 0.0337411718513776,
65 0.0352742388982139,
66 0.0368072229413588,
67 0.0383401203735527,
68 0.0398729275877398,
69 0.0414056409770767,
70 0.0429382569349408,
71 0.0444707718549387,
72 0.0460031821309146,
73 0.0475354841569593,
74 0.049067674327418,
75 0.0505997490368993,
76 0.0521317046802833,
77 0.0536635376527305,
78 0.0551952443496899,
79 0.0567268211669077,
80 0.0582582645004358,
81 0.0597895707466399,
82 0.0613207363022086,
83 0.0628517575641614,
84 0.0643826309298575,
85 0.0659133527970038,
86 0.0674439195636641,
87 0.0689743276282667,
88 0.0705045733896139,
89 0.0720346532468893,
90 0.0735645635996674,
91 0.0750943008479213,
92 0.0766238613920315,
93 0.0781532416327942,
94 0.0796824379714301,
95 0.0812114468095924,
96 0.0827402645493757,
97 0.0842688875933241,
98 0.0857973123444399,
99 0.0873255352061921,
100 0.0888535525825246,
101 0.090381360877865,
102 0.0919089564971327,
103 0.0934363358457478,
104 0.094963495329639,
105 0.0964904313552526,
106 0.0980171403295606,
107 0.0995436186600693,
108 0.101069862754828,
109 0.102595869022436,
110 0.104121633872055,
111 0.105647153713411,
112 0.107172424956809,
113 0.108697444013139,
114 0.110222207293883,
115 0.111746711211127,
116 0.113270952177564,
117 0.11479492660651,
118 0.116318630911905,
119 0.117842061508325,
120 0.119365214810991,
121 0.120888087235777,
122 0.122410675199216,
123 0.123932975118512,
124 0.125454983411546,
125 0.126976696496886,
126 0.128498110793793,
127 0.130019222722233,
128 0.131540028702883,
129 0.133060525157139,
130 0.134580708507126,
131 0.136100575175706,
132 0.137620121586486,
133 0.139139344163826,
134 0.140658239332849,
135 0.142176803519448,
136 0.143695033150294,
137 0.145212924652847,
138 0.146730474455362,
139 0.148247678986896,
140 0.149764534677322,
141 0.15128103795733,
142 0.152797185258443,
143 0.15431297301302,
144 0.155828397654265,
145 0.157343455616238,
146 0.158858143333861,
147 0.160372457242928,
148 0.161886393780112,
149 0.163399949382973,
150 0.16491312048997,
151 0.166425903540464,
152 0.167938294974731,
153 0.169450291233968,
154 0.170961888760301,
155 0.172473083996796,
156 0.173983873387464,
157 0.175494253377271,
158 0.177004220412149,
159 0.178513770938998,
160 0.1800229014057,
161 0.181531608261125,
162 0.183039887955141,
163 0.18454773693862,
164 0.186055151663447,
165 0.18756212858253,
166 0.189068664149806,
167 0.190574754820253,
168 0.192080397049892,
169 0.193585587295804,
170 0.195090322016128,
171 0.19659459767008,
172 0.198098410717954,
173 0.199601757621131,
174 0.201104634842092,
175 0.202607038844421,
176 0.204108966092817,
177 0.205610413053099,
178 0.207111376192219,
179 0.208611851978263,
180 0.21011183688047,
181 0.211611327369228,
182 0.213110319916091,
183 0.214608810993787,
184 0.21610679707622,
185 0.217604274638484,
186 0.21910124015687,
187 0.220597690108874,
188 0.222093620973204,
189 0.22358902922979,
190 0.225083911359793,
191 0.22657826384561,
192 0.228072083170886,
193 0.229565365820519,
194 0.231058108280671,
195 0.232550307038775,
196 0.234041958583543,
197 0.235533059404975,
198 0.237023605994367,
199 0.238513594844318,
200 0.240003022448741,
201 0.241491885302869,
202 0.242980179903264,
203 0.244467902747824,
204 0.245955050335795,
205 0.247441619167773,
206 0.24892760574572,
207 0.250413006572965,
208 0.251897818154217,
209 0.25338203699557,
210 0.254865659604515,
211 0.256348682489943,
212 0.257831102162159,
213 0.259312915132886,
214 0.260794117915276,
215 0.262274707023914,
216 0.263754678974831,
217 0.265234030285512,
218 0.266712757474898,
219 0.268190857063403,
220 0.269668325572915,
221 0.271145159526808,
222 0.272621355449949,
223 0.274096909868706,
224 0.275571819310958,
225 0.2770460803061,
226 0.278519689385053,
227 0.279992643080273,
228 0.281464937925758,
229 0.282936570457055,
230 0.284407537211272,
231 0.285877834727081,
232 0.28734745954473,
233 0.288816408206049,
234 0.290284677254462,
235 0.291752263234989,
236 0.293219162694259,
237 0.294685372180514,
238 0.296150888243624,
239 0.297615707435086,
240 0.29907982630804,
241 0.300543241417273,
242 0.302005949319228,
243 0.303467946572011,
244 0.304929229735402,
245 0.306389795370861,
246 0.307849640041535,
247 0.309308760312269,
248 0.310767152749611,
249 0.312224813921825,
250 0.313681740398892,
251 0.315137928752522,
252 0.316593375556166,
253 0.318048077385015,
254 0.319502030816016,
255 0.320955232427875,
256 0.32240767880107,
257 0.323859366517853,
258 0.325310292162263,
259 0.326760452320132,
260 0.328209843579092,
261 0.329658462528587,
262 0.331106305759876,
263 0.332553369866044,
264 0.333999651442009,
265 0.335445147084532,
266 0.33688985339222,
267 0.338333766965541,
268 0.339776884406827,
269 0.341219202320282,
270 0.342660717311994,
271 0.344101425989939,
272 0.345541324963989,
273 0.346980410845924,
274 0.348418680249435,
275 0.349856129790135,
276 0.351292756085567,
277 0.352728555755211,
278 0.35416352542049,
279 0.355597661704784,
280 0.35703096123343,
281 0.358463420633737,
282 0.359895036534988,
283 0.361325805568454,
284 0.362755724367397,
285 0.36418478956708,
286 0.365612997804774,
287 0.367040345719767,
288 0.368466829953372,
289 0.369892447148934,
290 0.371317193951838,
291 0.372741067009516,
292 0.374164062971458,
293 0.375586178489217,
294 0.377007410216418,
295 0.378427754808766,
296 0.379847208924051,
297 0.381265769222162,
298 0.38268343236509,
299 0.384100195016935,
300 0.385516053843919,
301 0.386931005514389,
302 0.388345046698826,
303 0.389758174069856,
304 0.391170384302254,
305 0.392581674072951,
306 0.393992040061048,
307 0.395401478947816,
308 0.39680998741671,
309 0.398217562153374,
310 0.399624199845647,
311 0.401029897183576,
312 0.402434650859418,
313 0.403838457567654,
314 0.40524131400499,
315 0.406643216870369,
316 0.408044162864979,
317 0.409444148692258,
318 0.410843171057904,
319 0.412241226669883,
320 0.413638312238435,
321 0.415034424476082,
322 0.416429560097637,
323 0.417823715820212,
324 0.419216888363224,
325 0.420609074448403,
326 0.4220002707998,
327 0.423390474143796,
328 0.424779681209109,
329 0.4261678887268,
330 0.427555093430282,
331 0.428941292055329,
332 0.430326481340083,
333 0.431710658025057,
334 0.433093818853152,
335 0.434475960569656,
336 0.435857079922255,
337 0.437237173661044,
338 0.438616238538528,
339 0.439994271309633,
340 0.441371268731717,
341 0.44274722756457,
342 0.444122144570429,
343 0.445496016513982,
344 0.446868840162374,
345 0.44824061228522,
346 0.449611329654607,
347 0.450980989045104,
348 0.452349587233771,
349 0.453717121000164,
350 0.455083587126344,
351 0.456448982396884,
352 0.457813303598877,
353 0.459176547521944,
354 0.46053871095824,
355 0.461899790702463,
356 0.46325978355186,
357 0.464618686306238,
358 0.465976495767966,
359 0.467333208741988,
360 0.468688822035828,
361 0.470043332459596,
362 0.471396736825998,
363 0.472749031950343,
364 0.47410021465055,
365 0.475450281747156,
366 0.476799230063322,
367 0.478147056424843,
368 0.479493757660153,
369 0.480839330600334,
370 0.482183772079123,
371 0.483527078932919,
372 0.484869248000791,
373 0.486210276124486,
374 0.487550160148436,
375 0.488888896919763,
376 0.490226483288291,
377 0.49156291610655,
378 0.492898192229784,
379 0.49423230851596,
380 0.495565261825773,
381 0.496897049022654,
382 0.498227666972782,
383 0.499557112545082,
384 0.500885382611241,
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1033 0.998719012233873,
1034 0.998795456205172,
1035 0.998869549914284,
1036 0.998941293186857,
1037 0.999010685854073,
1038 0.999077727752645,
1039 0.999142418724817,
1040 0.999204758618364,
1041 0.999264747286594,
1042 0.99932238458835,
1043 0.999377670388003,
1044 0.999430604555462,
1045 0.999481186966167,
1046 0.999529417501093,
1047 0.999575296046749,
1048 0.999618822495179,
1049 0.999659996743959,
1050 0.999698818696204,
1051 0.999735288260562,
1052 0.999769405351215,
1053 0.999801169887884,
1054 0.999830581795823,
1055 0.999857641005824,
1056 0.999882347454213,
1057 0.999904701082853,
1058 0.999924701839145,
1059 0.999942349676024,
1060 0.999957644551964,
1061 0.999970586430974,
1062 0.999981175282601,
1063 0.999989411081928,
1064 0.999995293809576,
1065 0.999998823451702,
1066 1,
1067 };
1068
1069 #endif
Ifx_Lut.h
Lookup defintion with fixed-point angle data type.
IFX_LUT_TABLE
#define IFX_LUT_TABLE
Lookup table type modifier (stored in ROM)
Definition: Ifx_Lut.h:45
float32
float float32
Definition: Platform_Types.h:167
Ifx_g_LutSincosF32_table
const float32 Ifx_g_LutSincosF32_table[1025]
Definition: Ifx_LutSincosF32_Table.c:41
IFX_LUT_ANGLE_RESOLUTION
#define IFX_LUT_ANGLE_RESOLUTION
Define the cosinus and sinus table size.
Definition: Ifx_Lut.h:55


iLLD_TC26B: Ifx_RampF32.c Source File

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  • CpuGeneric
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  • Math
Ifx_RampF32.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_RampF32.c
3 * \brief Ramp function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "SysSe/Math/Ifx_RampF32.h"
27
28 /**
29 * \brief Execute the Ramp function
30 *
31 * NOTE: shall be called every 'period'.
32 * The period was defined by Ifx_RampF32_init() or Ifx_RampF32_setSlewRate()
33 *
34 * \param ramp Pointer to the Ifx_RampF32 object
35 * \return Actual value
36 */
37 float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
38 {
39 if (ramp->uk < ramp->ik)
40 {
41 ramp->uk = __minf(ramp->ik, ramp->uk + ramp->delta);
42 }
43 else if (ramp->uk > ramp->ik)
44 {
45 ramp->uk = __maxf(ramp->ik, ramp->uk - ramp->delta);
46 }
47 else
48 {}
49
50 return ramp->uk;
51 }
Ifx_RampF32_step
float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
Execute the Ramp function.
Definition: Ifx_RampF32.c:37
float32
float float32
Definition: Platform_Types.h:167
__maxf
#define __maxf
Definition: IfxCpu_IntrinsicsDcc.h:1620
Ifx_RampF32::uk
float32 uk
Definition: Ifx_RampF32.h:40
Ifx_RampF32::ik
float32 ik
Definition: Ifx_RampF32.h:41
__minf
#define __minf
Definition: IfxCpu_IntrinsicsDcc.h:1616
Ifx_RampF32::delta
float32 delta
Definition: Ifx_RampF32.h:42
Ifx_RampF32
Ifx_RampF32 object definition.
Definition: Ifx_RampF32.h:38
Ifx_RampF32.h
Ramp function.


iLLD_TC26B: Ifx_RampF32.h Source File

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  • CpuGeneric
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Ifx_RampF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_RampF32.h
3 * \brief Ramp function
4 *
5 *
6 *
7 * \version disabled
8 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 *
14 * Infineon Technologies AG (Infineon) is supplying this file for use
15 * exclusively with Infineon's microcontroller products. This file can be freely
16 * distributed within development tools that are supporting such microcontroller
17 * products.
18 *
19 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
20 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
22 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
23 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
24 *
25 * \defgroup library_srvsw_sysse_math_f32_ramp Ramp
26 * \ingroup library_srvsw_sysse_math_f32
27 *
28 */
29
30 #ifndef IFX_RAMPF32_H
31 #define IFX_RAMPF32_H
32
33 #include "Cpu/Std/IfxCpu_Intrinsics.h"
34
35 /**
36 * \brief Ifx_RampF32 object definition
37 */
38 typedef struct
39 {
40 float32 uk;
41 float32 ik;
42 float32 delta;
43 } Ifx_RampF32;
44
45 //________________________________________________________________________________________
46 // FUNCTION PROTOTYPES
47
48 /** \addtogroup library_srvsw_sysse_math_f32_ramp
49 * \{ */
50 IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period);
51 IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp);
52 IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period);
53 IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref);
54 IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp);
55 IFX_EXTERN float32 Ifx_RampF32_step(Ifx_RampF32 *ramp);
56 /** \} */
57
58 //________________________________________________________________________________________
59 // INLINE FUNCTION IMPLEMENTATION
60
61 /**
62 * \brief Reset internal values
63 * \param ramp Pointer to the Ifx_RampF32 object
64 */
65 IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp)
66 {
67 ramp->ik = 0;
68 ramp->uk = 0;
69 }
70
71
72 /**
73 * \brief Get the reference value
74 * \param ramp Pointer to the Ifx_RampF32 object
75 * \return Returns the ref value
76 */
77 IFX_INLINE float32 Ifx_RampF32_getRef(Ifx_RampF32 *ramp)
78 {
79 return ramp->ik;
80 }
81
82
83 /**
84 * \brief Set the maximum slew rate
85 * \param ramp Pointer to the Ifx_RampF32 object
86 * \param slewRate Maximum slew rate, value per second
87 * \param period Sampling period of the Ifx_RampF32_step() function
88 */
89 IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
90 {
91 ramp->delta = slewRate * period;
92 }
93
94
95 /**
96 * \brief Initialize the Ifx_RampF32 object.
97 * \param ramp Pointer to the Ifx_RampF32 object
98 * \param slewRate Maximum slew rate, value per second
99 * \param period Sampling period of the Ifx_RampF32_step() function
100 */
101 IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
102 {
103 Ifx_RampF32_setSlewRate(ramp, slewRate, period);
104 Ifx_RampF32_reset(ramp);
105 }
106
107
108 /**
109 * \brief Set the reference value
110 * \param ramp Pointer to the Ifx_RampF32 object
111 * \param ref Reference value
112 */
113 IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref)
114 {
115 ramp->ik = ref;
116 }
117
118
119 /**
120 * \brief Get the actual output value
121 * \param ramp Pointer to the Ifx_RampF32 object
122 * \return Actual value
123 */
124 IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp)
125 {
126 return ramp->uk;
127 }
128
129
130 #endif /* IFX_RAMPF32_H */
Ifx_RampF32_getValue
IFX_INLINE float32 Ifx_RampF32_getValue(Ifx_RampF32 *ramp)
Get the actual output value.
Definition: Ifx_RampF32.h:124
Ifx_RampF32_getRef
IFX_INLINE float32 Ifx_RampF32_getRef(Ifx_RampF32 *ramp)
Get the reference value.
Definition: Ifx_RampF32.h:77
Ifx_RampF32_step
IFX_EXTERN float32 Ifx_RampF32_step(Ifx_RampF32 *ramp)
Execute the Ramp function.
Definition: Ifx_RampF32.c:37
float32
float float32
Definition: Platform_Types.h:167
Ifx_RampF32_init
IFX_INLINE void Ifx_RampF32_init(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Initialize the Ifx_RampF32 object.
Definition: Ifx_RampF32.h:101
IfxCpu_Intrinsics.h
Ifx_RampF32::uk
float32 uk
Definition: Ifx_RampF32.h:40
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_RampF32::ik
float32 ik
Definition: Ifx_RampF32.h:41
Ifx_RampF32_reset
IFX_INLINE void Ifx_RampF32_reset(Ifx_RampF32 *ramp)
Reset internal values.
Definition: Ifx_RampF32.h:65
Ifx_RampF32_setSlewRate
IFX_INLINE void Ifx_RampF32_setSlewRate(Ifx_RampF32 *ramp, float32 slewRate, float32 period)
Set the maximum slew rate.
Definition: Ifx_RampF32.h:89
Ifx_RampF32::delta
float32 delta
Definition: Ifx_RampF32.h:42
Ifx_RampF32
Ifx_RampF32 object definition.
Definition: Ifx_RampF32.h:38
Ifx_RampF32_setRef
IFX_INLINE void Ifx_RampF32_setRef(Ifx_RampF32 *ramp, float32 ref)
Set the reference value.
Definition: Ifx_RampF32.h:113


iLLD_TC26B: Ifx_Shell.c Source File

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  • Comm
Ifx_Shell.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_Shell.c
3 * \brief shell functions.
4 *
5 * \version disabled
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 //---------------------------------------------------------------------------
26 #include "Ifx_Shell.h"
27 #include "_Utilities/Ifx_Assert.h"
28 #include "Cpu/Std/IfxCpu_Intrinsics.h"
29
30 #include <string.h>
31 #include <stdlib.h>
32 #include <stdio.h>
33
34 #define IFX_SHELL_LLD "%lld "
35 #define IFX_SHELL_LLX "%llx "
36 #define IFX_SHELL_LLU "%llu "
37
38 //---------------------------------------------------------------------------
39 #define IFX_SHELL_MAX_MESSAGE_SIZE 255
40 //---------------------------------------------------------------------------
41
42 /* Macro to detect space character */
43 #define ISSPACE(c) (((c) == ' ') || ((c) == '\t'))
44
45 /* Macro to only execute parameter if echo is enabled for this shell */
46 #define IFX_SHELL_IF_ECHO(X) {if (shell->control.echo) {X; }}
47
48 /* Macro to write lots of spaces */
49 #define IFX_SHELL_WRITE_SPACES(X) \
50 {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, " "); }}
51
52 /* Macro to write lots of backspaces */
53 #define IFX_SHELL_WRITE_BACKSPACES(X) \
54 {int ii; for (ii = 0; ii < (X); ii++) {IfxStdIf_DPipe_print(shell->io, "\b"); }}
55
56 //---------------------------------------------------------------------------
57 char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE * IFX_CFG_SHELL_CMD_HISTORY_SIZE];
58 //---------------------------------------------------------------------------
59 void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine);
60 void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2);
61 const Ifx_Shell_Command *Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList);
62 static boolean Ifx_Shell_matchCommand(pchar *argsPtr, pchar *match);
63
64 //---------------------------------------------------------------------------
65 /**
66 * \brief Check whether the args is already at the end.
67 * \param args The argument null-terminated string
68 */
69 boolean Ifx_Shell_isEndOfLine(pchar args)
70 {
71 return ((args == NULL_PTR) || (*args == IFX_SHELL_NULL_CHAR)) ? TRUE : FALSE;
72 }
73
74
75 static boolean Ifx_Shell_writeResult(Ifx_Shell *shell, Ifx_SizeT Code)
76 {
77 Ifx_SizeT length = sizeof(Code);
78 boolean result = IfxStdIf_DPipe_write(shell->io, &Code, &length, TIME_INFINITE);
79
80 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result != FALSE);
81
82 return result;
83 }
84
85
86 //---------------------------------------------------------------------------
87 boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
88 {
89 const Ifx_Shell_Command *command = commandList;
90 uint32 index = 0;
91 pchar space = "";
92 pchar spaceParam = "";
93
94 while (command->commandLine != NULL_PTR)
95 {
96 pchar help = command->help;
97 pchar chunk;
98 boolean isParam = FALSE;
99 boolean isSyntax = FALSE;
100 IfxStdIf_DPipe_print(io, "%s%s", space, command->commandLine);
101
102 while (*help != IFX_SHELL_NULL_CHAR)
103 {
104 Ifx_SizeT count;
105 pchar matchp = "/p";
106 pchar matchs = "/s";
107 spaceParam = "";
108
109 if (Ifx_Shell_matchCommand(&help, &matchp))
110 { /* Parameter description found */
111 isParam = TRUE;
112 isSyntax = FALSE,
113 spaceParam = " ";
114 }
115 else if (Ifx_Shell_matchCommand(&help, &matchs))
116 { /* Parameter description found */
117 isParam = FALSE;
118 isSyntax = TRUE,
119 spaceParam = " SYNTAX: ";
120 }
121 else
122 { /* Other text */
123 if (isParam)
124 { /* Show param details*/
125 spaceParam = " ";
126 }
127 else if (isSyntax)
128 { /* Show param details*/
129 spaceParam = " ";
130 }
131 }
132
133 /* Split print by ENDL */
134 chunk = strstr(help, ENDL);
135
136 if (chunk == NULL_PTR)
137 {
138 chunk = help + strlen(help);
139 }
140 else
141 {
142 if (!briefOnly)
143 {
144 chunk += strlen(ENDL);
145 }
146 }
147
148 count = chunk - help;
149 IfxStdIf_DPipe_print(io, "%s%s", space, spaceParam);
150 IfxStdIf_DPipe_write(io, (void *)help, &count, TIME_INFINITE);
151
152 help += count;
153
154 if (briefOnly)
155 { /* Print Brief only */
156 break;
157 }
158 }
159
160 IfxStdIf_DPipe_print(io, ENDL);
161
162 if ((command->call == NULL_PTR) && (index == 0))
163 {
164 index = 1;
165 space = " ";
166 }
167
168 command = &command[1];
169
170 if (singleCommand)
171 {
172 break;
173 }
174 }
175
176 return TRUE;
177 }
178
179
180 boolean Ifx_Shell_showHelpSingleCommand(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
181 {
182 Ifx_Shell_CommandListConst commandList;
183 const Ifx_Shell_Command *shellCommand = Ifx_Shell_commandListFind(shellPtr, args, &args, &commandList);
184
185 if (shellCommand != NULL_PTR)
186 {
187 if (shellCommand->call == NULL_PTR)
188 {
189 Ifx_Shell_showHelpSingle(commandList, io, FALSE, FALSE);
190 }
191 else
192 {
193 if (commandList->call == NULL_PTR)
194 {
195 IfxStdIf_DPipe_print(io, "%s ", commandList->commandLine);
196 }
197
198 Ifx_Shell_showHelpSingle(shellCommand, io, FALSE, TRUE);
199 }
200
201 return TRUE;
202 }
203 else
204 {
205 IfxStdIf_DPipe_print(io, "unknown command");
206 return FALSE;
207 }
208 }
209
210
211 boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
212 {
213 sint32 i;
214 Ifx_Shell *shell = shellPtr;
215 boolean result = TRUE;
216
217 if (*args == IFX_SHELL_NULL_CHAR)
218 {
219 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
220 {
221 if (shell->commandList[i] != NULL_PTR)
222 {
223 Ifx_Shell_showHelpSingle(shell->commandList[i], io, TRUE, FALSE);
224 }
225 }
226 }
227 else
228 {
229 result = Ifx_Shell_showHelpSingleCommand(args, shellPtr, io);
230 }
231
232 return result;
233 }
234
235
236 boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
237 {
238 Ifx_Shell *shell = data;
239 boolean Result = TRUE;
240
241 if (Ifx_Shell_matchToken(&args, "?") != FALSE)
242 {
243 IfxStdIf_DPipe_print(io, "Syntax : protocol start" ENDL);
244 IfxStdIf_DPipe_print(io, " > start a protocol" ENDL);
245 }
246 else if (Ifx_Shell_matchToken(&args, "start") != FALSE)
247 {
248 if ((shell->protocol.start != NULL_PTR) && (shell->protocol.object != NULL_PTR))
249 {
250 Result = shell->protocol.start(shell->protocol.object, io);
251 shell->protocol.started = (Result != FALSE);
252
253 if (shell->protocol.onStart != NULL_PTR)
254 {
255 shell->protocol.onStart(shell->protocol.object, shell->protocol.onStartData);
256 }
257 }
258 else
259 {
260 Result = FALSE;
261 }
262 }
263 else
264 {}
265
266 return Result;
267 }
268
269
270 boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
271 {
272 boolean result = TRUE;
273
274 if (Ifx_Shell_matchToken(&args, "?") != FALSE)
275 {
276 IfxStdIf_DPipe_print(io, "Syntax : protocol start" ENDL);
277 IfxStdIf_DPipe_print(io, " > start a protocol" ENDL);
278 }
279 else if (Ifx_Shell_matchToken(&args, "protocol") != FALSE)
280 {
281 result = Ifx_Shell_protocolStart(args, data, io);
282 }
283 else
284 {}
285
286 return result;
287 }
288
289
290 //---------------------------------------------------------------------------
291 void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
292 {
293 uint32 i;
294
295 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
296 {
297 config->commandList[i] = NULL_PTR;
298 }
299
300 config->standardIo = NULL_PTR;
301 config->echo = TRUE;
302 config->protocol.execute = NULL_PTR;
303 config->protocol.object = NULL_PTR;
304 config->protocol.onStart = NULL_PTR;
305 config->protocol.onStartData = NULL_PTR;
306 config->protocol.start = NULL_PTR;
307 config->protocol.started = FALSE;
308 config->sendResultCode = FALSE;
309 config->showPrompt = TRUE;
310 config->standardIo = NULL_PTR;
311 }
312
313
314 boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
315 {
316 sint32 i;
317 char **CmdHistory = NULL_PTR; /* Pointer to array of pointers for command history items */
318
319 /* Ensure state variable is cleared */
320 memset(shell, 0, sizeof(*shell));
321
322 shell->protocol = config->protocol;
323 shell->protocol.started = FALSE;
324
325 shell->io = config->standardIo;
326 shell->control.showPrompt = config->showPrompt;
327 shell->control.sendResultCode = config->sendResultCode;
328 shell->control.echo = config->echo;
329 shell->control.echoError = TRUE;
330 shell->control.enabled = TRUE;
331
332 shell->locals.escBracketNum = IFX_SHELL_NULL_CHAR; /* Used to cache number in sequence "ESC [ 1/2/3/4 ~" */
333 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
334
335 /* Copy command line buffer pointer into state variable */
336 shell->cmd.cmdStr = shell->locals.cmdStr;
337
338 /* Initialize command history space and cache pointer */
339 memset(Ifx_Shell_cmdBuffer, 0, sizeof(Ifx_Shell_cmdBuffer));
340 shell->cmdHistory[0] = &Ifx_Shell_cmdBuffer[0];
341
342 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
343 {
344 shell->commandList[i] = config->commandList[i];
345 }
346
347 /* Initialize command history pointers */
348 CmdHistory = shell->cmdHistory;
349
350 for (i = 1; i < IFX_CFG_SHELL_CMD_HISTORY_SIZE; i++)
351 {
352 CmdHistory[i] = &CmdHistory[i - 1][IFX_CFG_SHELL_CMD_LINE_SIZE]; /* Items are just offsets into a large allocated area */
353 }
354
355 shell->cmd.historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM;
356
357 /* Pre-load useful commands into history buffer */
358 strcpy(CmdHistory[0], "help");
359 //strcpy(CmdHistory[1], "protocol start");
360
361 if (shell->control.showPrompt != 0)
362 {
363 IfxStdIf_DPipe_print(shell->io, ENDL);
364 IfxStdIf_DPipe_print(shell->io, IFX_CFG_SHELL_PROMPT);
365 }
366
367 return TRUE;
368 }
369
370
371 void Ifx_Shell_process(Ifx_Shell *shell)
372 {
373 Ifx_SizeT i, j; /* Loop variables */
374 Ifx_SizeT count;
375 Ifx_SizeT readCount;
376 boolean NormalKeyPress; /* Indicates if this is a normal keypress, i.e. not part of an escape code */
377
378 Ifx_Shell_CmdLine *Cmd = &shell->cmd;
379 char *inputbuffer = shell->locals.inputbuffer;
380 char *cmdStr = shell->locals.cmdStr;
381 char **CmdHistory = shell->cmdHistory;
382
383 if (shell->control.enabled == 0)
384 {
385 return;
386 }
387
388 if ((shell->protocol.object != NULL_PTR) && (shell->protocol.started != FALSE))
389 {
390 shell->protocol.execute(shell->protocol.object);
391 }
392 else
393 {
394 /**** NORMAL MODE ****/
395
396 /********************************************************************************/
397 /* Read all characters until enter inclusive. */
398 /* If the command is bigger than IFX_SHELL_CMD_SIZE, the command is ignored. */
399 /* */
400 /* Escape sequences are handled by a state machine. */
401 /* The following escape sequences (prefix "ESC [") are supported: */
402 /* */
403 /* A - up B - down C - right D - left */
404 /* 1~ - HOME 2~ - INSERT 3~ - DELETE 5~ - END */
405 /* */
406 /* Backspace ('\b') is also supported. */
407 /********************************************************************************/
408
409 count = 0;
410 readCount = IFX_CFG_SHELL_CMD_LINE_SIZE - count;
411 IfxStdIf_DPipe_read(shell->io, &inputbuffer[count], &readCount, TIME_NULL);
412 count += readCount;
413
414 for (i = 0; i < count; i++)
415 {
416 /* By default, we assume character is part of escape sequence */
417 NormalKeyPress = FALSE;
418
419 /* Process key pressed */
420 switch (inputbuffer[i])
421 {
422 /* New line (ENTER) */
423 case '\n':
424 case '\r':
425 /* Print new line to terminal if requested */
426 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, ENDL))
427
428 /* Execute command if length is valid - i.e. not an over-full buffer
429 * (prevents attempted execution of junk) */
430 if (Cmd->length < IFX_CFG_SHELL_CMD_LINE_SIZE)
431 {
432 cmdStr[Cmd->length] = IFX_SHELL_NULL_CHAR; /* Terminate cmdStr */
433
434 if (Cmd->historyAdd != FALSE)
435 {
436 /* Shuffle history up */
437 for (j = IFX_CFG_SHELL_CMD_HISTORY_SIZE - 1; j > 0; j--)
438 {
439 /* Copy text */
440 strncpy(CmdHistory[j], CmdHistory[j - 1], IFX_CFG_SHELL_CMD_LINE_SIZE);
441 }
442
443 /* Copy in new entry */
444 strncpy(CmdHistory[0], cmdStr, IFX_CFG_SHELL_CMD_LINE_SIZE);
445 }
446
447 /* Execute command */
448 Ifx_Shell_execute(shell, cmdStr);
449 }
450
451 /* Show prompt if in main shell */
452 if (shell->control.showPrompt != 0)
453 {
454 IfxStdIf_DPipe_print(shell->io, IFX_CFG_SHELL_PROMPT);
455 }
456
457 /* Reset command line buffer length */
458 Cmd->length = 0;
459
460 /* Reset command line buffer cursor position */
461 Cmd->cursor = 0;
462
463 /* Clear flag */
464 Cmd->historyAdd = FALSE;
465
466 /* Ensure we're not in command history list */
467 Cmd->historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM;
468 break;
469
470 /* Backspace (may occur in middle of text if cursor location is not at end) */
471 case '\b':
472
473 if (Cmd->cursor > 0)
474 {
475 /* Update on screen */
476 if (shell->control.echo != 0)
477 {
478 /* Move left one character */
479 IfxStdIf_DPipe_print(shell->io, "\b");
480
481 /* Update line with new characters */
482 for (j = Cmd->cursor; j < Cmd->length; j++)
483 {
484 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[j]);
485 }
486
487 /* Write over duplicated character at end */
488 IfxStdIf_DPipe_print(shell->io, " ");
489 IFX_SHELL_WRITE_BACKSPACES((Cmd->length - Cmd->cursor) + 1)
490 }
491
492 /* Update in command line variable. Shuffle text left */
493 strncpy(&cmdStr[Cmd->cursor - 1], &cmdStr[Cmd->cursor], Cmd->length - Cmd->cursor);
494
495 /* Terminate string at end of shorter string */
496 cmdStr[Cmd->length - 1] = IFX_SHELL_NULL_CHAR;
497
498 Cmd->length--;
499 Cmd->cursor--;
500
501 /* Command line has been modified */
502 Cmd->historyAdd = TRUE;
503 }
504
505 break;
506
507 /* Escape character */
508 case '\x1B': /*'\x1B': */
509 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE;
510 break;
511
512 /* '[' - check to see if this is second part of an escape sequence */
513 case '[':
514
515 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE)
516 {
517 /* ESC [ pressed */
518 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE_BRACKET;
519 }
520 else
521 {
522 NormalKeyPress = TRUE;
523 }
524
525 break;
526
527 /* Check for supported characters in escape sequences ( ESC [ A/B/C/D ) */
528 case 'A':
529 case 'B':
530 case 'C':
531 case 'D':
532
533 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET)
534 {
535 /* Process arrow keys */
536 Ifx_Shell_cmdEscapeProcess(shell, inputbuffer[i], 0);
537
538 /* End of escape sequence */
539 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
540 }
541 else
542 {
543 NormalKeyPress = TRUE;
544 }
545
546 break;
547
548 /* Check for supported characters in escape sequences (ESC [ 2/4/5 ~) */
549 case '1':
550 case '2':
551 case '3':
552 case '4':
553
554 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET)
555 {
556 /* Store number for use once complete escape sequence is confirmed (below) */
557 shell->locals.escBracketNum = inputbuffer[i];
558 shell->locals.cmdState = IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER;
559 }
560 else
561 {
562 NormalKeyPress = TRUE;
563 }
564
565 break;
566
567 /* Check for supported characters in escape sequences (ESC [ 2/4/5 ~) */
568 case '~':
569
570 if (shell->locals.cmdState == IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER)
571 {
572 /* Process home/delete/end */
573 Ifx_Shell_cmdEscapeProcess(shell, shell->locals.escBracketNum, '~');
574
575 /* End of escape sequence */
576 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
577 }
578 else
579 {
580 NormalKeyPress = TRUE;
581 }
582
583 break;
584
585 /* Normal character - add to command string */
586 default:
587 NormalKeyPress = TRUE;
588 break;
589 }
590
591 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->length >= Cmd->cursor); /* Sanity check */
592
593 /* If this was a normal key press (not part of an escape sequence),
594 * add it to the command string */
595 if (NormalKeyPress != FALSE)
596 {
597 /* Ensure state machine is reset */
598 shell->locals.cmdState = IFX_SHELL_CMD_STATE_NORMAL;
599
600 /* If not filled buffer, add in this character */
601 if (Cmd->length < (IFX_CFG_SHELL_CMD_LINE_SIZE - 1))
602 {
603 /* Command line has been modified */
604 Cmd->historyAdd = TRUE;
605
606 /* Copy into command line */
607 cmdStr[Cmd->cursor] = inputbuffer[i];
608 Cmd->cursor++;
609
610 /* Update length of buffer */
611 Cmd->length = __max(Cmd->length, Cmd->cursor);
612
613 if (shell->control.echo != 0)
614 {
615 /* echo character to shell output if requested */
616 shell->locals.echo[0] = inputbuffer[i];
617 IfxStdIf_DPipe_print(shell->io, shell->locals.echo);
618 }
619 }
620 else
621 {
622 /* Line too long - ignore further characters */
623 Cmd->historyAdd = FALSE; /* Invalid command line */
624 }
625 }
626 }
627 }
628 }
629
630
631 void Ifx_Shell_deinit(Ifx_Shell *shell)
632 {
633 (void)shell; /* ignore compiler warning; */
634 // tbd free necessary memory
635 }
636
637
638 pchar Ifx_Shell_skipWhitespace(pchar args)
639 {
640 if (args != NULL_PTR)
641 {
642 while ((*args != IFX_SHELL_NULL_CHAR) && (ISSPACE(*args)))
643 {
644 args = &args[1];
645 }
646 }
647
648 return args;
649 }
650
651
652 boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
653 {
654 pchar savedArguments = *argsPtr;
655 char buffer[256];
656 boolean result = FALSE;
657
658 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) != FALSE)
659 {
660 if (strcmp(token, buffer) == 0)
661 {
662 result = TRUE;
663 }
664 }
665
666 if (result == FALSE)
667 {
668 // No match: don't advance pointer
669 *argsPtr = savedArguments;
670 }
671
672 return result;
673 }
674
675
676 static boolean Ifx_Shell_matchCommand(pchar *argsPtr, pchar *match)
677 {
678 boolean result = FALSE;
679 pchar savedArguments = *argsPtr;
680 pchar savedMatch = *match;
681 char buffer0[256];
682 char buffer1[256];
683
684 if ((Ifx_Shell_parseToken(argsPtr, buffer0, Ifx_COUNTOF(buffer0)) != FALSE)
685 && (Ifx_Shell_parseToken(match, buffer1, Ifx_COUNTOF(buffer1)) != FALSE))
686 {
687 if (strcmp(buffer1, buffer0) == 0)
688 {
689 result = TRUE;
690 }
691 }
692
693 if (result == FALSE)
694 {
695 // No match: don't advance pointer
696 *argsPtr = savedArguments;
697 *match = savedMatch;
698 }
699
700 return result;
701 }
702
703
704 boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
705 {
706 int mindex = 0;
707 pchar args = Ifx_Shell_skipWhitespace(*argsPtr);
708
709 tokenBuffer[0] = IFX_SHELL_NULL_CHAR;
710
711 if (args == NULL_PTR)
712 {
713 return FALSE;
714 }
715
716 if (*args == '\"')
717 {
718 args = &args[1];
719
720 while ((*args != IFX_SHELL_NULL_CHAR) && (*args != '\"'))
721 {
722 if (mindex < bufferLength)
723 {
724 tokenBuffer[mindex] = *args;
725 mindex++;
726 }
727
728 args = &args[1];
729 }
730
731 // error if no closing quote
732 if (*args != '\"')
733 {
734 return FALSE;
735 }
736
737 args = &args[1];
738 }
739 else
740 {
741 // don't allow unquoted empty tokens
742 if (*args == IFX_SHELL_NULL_CHAR)
743 {
744 return FALSE;
745 }
746
747 while ((*args != IFX_SHELL_NULL_CHAR) && (!ISSPACE(*args)))
748 {
749 if (mindex < bufferLength)
750 {
751 tokenBuffer[mindex] = *args;
752 mindex++;
753 }
754
755 args = &args[1];
756 }
757 }
758
759 // make sure string is zero terminated
760 if (bufferLength > 0)
761 {
762 tokenBuffer[__min(mindex, bufferLength - 1)] = IFX_SHELL_NULL_CHAR;
763 }
764
765 *argsPtr = Ifx_Shell_skipWhitespace(args);
766
767 return TRUE;
768 }
769
770
771 boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
772 {
773 char buffer[32];
774 boolean result;
775
776 *address = 0;
777
778 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
779 {
780 result = FALSE;
781 }
782 else
783 {
784 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%x ", (unsigned int *)address) == 1);
785 }
786
787 return result;
788 }
789
790
791 boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
792 {
793 sint64 value64;
794 boolean result;
795
796 *value = 0;
797
798 if (Ifx_Shell_parseSInt64(argsPtr, &value64) == FALSE)
799 {
800 result = FALSE;
801 }
802 else
803 {
804 *value = (sint32)value64;
805 result = TRUE;
806 }
807
808 return result;
809 }
810
811
812 boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
813 {
814 uint64 value64;
815 boolean result;
816
817 *value = 0;
818
819 if (Ifx_Shell_parseUInt64(argsPtr, &value64, hex) == FALSE)
820 {
821 result = FALSE;
822 }
823 else
824 {
825 *value = (uint32)value64;
826 result = TRUE;
827 }
828
829 return result;
830 }
831
832
833 boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
834 {
835 char buffer[64];
836 boolean result;
837
838 *value = 0;
839
840 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
841 {
842 result = FALSE;
843 }
844 else
845 {
846 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, IFX_SHELL_LLD, value) == 1);
847 }
848
849 return result;
850 }
851
852
853 boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
854 {
855 char buffer[64];
856 boolean result;
857
858 *value = 0;
859
860 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
861 {
862 result = FALSE;
863 }
864 else
865 {
866 char *bufferPointer = buffer;
867
868 if ((buffer[0] == '0') && (buffer[1] == 'x'))
869 {
870 bufferPointer = &bufferPointer[2];
871 hex = TRUE;
872 }
873
874 if (hex != FALSE)
875 {
876 result = (bufferPointer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(bufferPointer, IFX_SHELL_LLX, value) == 1);
877 }
878 else
879 {
880 result = (bufferPointer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(bufferPointer, IFX_SHELL_LLU, value) == 1);
881 }
882 }
883
884 return result;
885 }
886
887
888 boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
889 {
890 char buffer[64];
891 boolean result;
892
893 *value = 0;
894
895 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
896 {
897 result = FALSE;
898 }
899 else
900 {
901 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%lf ", value) == 1);
902 }
903
904 return result;
905 }
906
907
908 boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
909 {
910 char buffer[64];
911 boolean result;
912
913 *value = 0;
914
915 if (Ifx_Shell_parseToken(argsPtr, buffer, Ifx_COUNTOF(buffer)) == FALSE)
916 {
917 result = FALSE;
918 }
919 else
920 {
921 result = (buffer[0] != IFX_SHELL_NULL_CHAR) && (sscanf(buffer, "%f ", value) == 1);
922 }
923
924 return result;
925 }
926
927
928 const Ifx_Shell_Command *Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
929 {
930 const Ifx_Shell_Command *command = commandList;
931 const Ifx_Shell_Command *result = NULL_PTR;
932 pchar cmdLineTemp = commandLine;
933 uint32 matchInit = 0;
934 uint32 index = 0;
935
936 boolean hasPrefix;
937
938 hasPrefix = (command->commandLine != NULL_PTR) && (command->call == NULL_PTR);
939 *match = 0;
940
941 while (command->commandLine != NULL_PTR)
942 {
943 pchar commandTemp = command->commandLine;
944 pchar commandLineTemp = cmdLineTemp;
945 char buffer[256];
946 uint32 matchCount = matchInit;
947
948 while (Ifx_Shell_matchCommand(&commandLineTemp, &commandTemp) != FALSE)
949 {
950 matchCount++;
951 }
952
953 if ((matchCount > *match) && (Ifx_Shell_parseToken(&commandTemp, buffer, Ifx_COUNTOF(buffer)) == FALSE))
954 {
955 if ((index == 0) && (command->call == NULL_PTR))
956 { /* List has a prefix */
957 cmdLineTemp = commandLineTemp;
958 matchInit = matchCount;
959 }
960
961 *match = matchCount;
962 *args = commandLineTemp;
963 result = command;
964 }
965 else
966 {
967 if ((index == 0) && hasPrefix)
968 {
969 /* Prefix does not match */
970 break;
971 }
972 }
973
974 command = &command[1];
975
976 index++;
977 }
978
979 return result;
980 }
981
982
983 const Ifx_Shell_Command *Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
984 {
985 int i;
986 const Ifx_Shell_Command *shellCommand = NULL_PTR;
987 const Ifx_Shell_Command *Command = NULL_PTR;
988 uint32 matchMax = 0;
989 uint32 match;
990
991 for (i = 0; i < IFX_CFG_SHELL_COMMAND_LISTS; i++)
992 {
993 if (shell->commandList[i] != NULL_PTR)
994 {
995 shellCommand = Ifx_Shell_commandFind(shell->commandList[i], commandLine, args, &match);
996
997 if ((shellCommand != NULL_PTR) && (match > matchMax))
998 {
999 matchMax = match;
1000 Command = shellCommand;
1001 *commandList = shell->commandList[i];
1002 }
1003 }
1004 }
1005
1006 return Command;
1007 }
1008
1009
1010 void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine)
1011 {
1012 pchar args = NULL_PTR;
1013 Ifx_Shell_CommandListConst commandList;
1014 const Ifx_Shell_Command *shellCommand = Ifx_Shell_commandListFind(shell, commandLine, &args, &commandList);
1015
1016 if (shellCommand != NULL_PTR)
1017 {
1018 if (shellCommand->call == NULL_PTR)
1019 {
1020 Ifx_Shell_showHelp(commandLine, shell, shell->io);
1021 }
1022 else if (shellCommand->call(args, shellCommand->data, shell->io) != FALSE)
1023 {
1024 if (shell->control.sendResultCode != 0)
1025 {
1026 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_ok);
1027 }
1028 }
1029 else
1030 {
1031 if (shell->control.sendResultCode != 0)
1032 {
1033 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_nok);
1034 }
1035 else if (shell->control.echoError != 0)
1036 {
1037 IfxStdIf_DPipe_print(shell->io, "\r\nShell command error: %s" ENDL, commandLine);
1038 }
1039 else
1040 {}
1041 }
1042 }
1043 else
1044 {
1045 if (commandLine[0] != IFX_SHELL_NULL_CHAR)
1046 {
1047 if (shell->control.sendResultCode != 0)
1048 {
1049 Ifx_Shell_writeResult(shell, Ifx_Shell_ResultCode_unknown);
1050 }
1051 else if (shell->control.echoError != 0)
1052 {
1053 IfxStdIf_DPipe_print(shell->io, "\r\nUnknown command: %s" ENDL, commandLine);
1054 }
1055 else
1056 {}
1057 }
1058 }
1059 }
1060
1061
1062 /****************************************************************************************/
1063 /* Processes escape sequences, including handling command history. */
1064 /* The following escape sequences (prefix "ESC [") are supported: */
1065 /* A - up B - down C - right D - left */
1066 /* 1~ - HOME 2~ - INSERT 3~ - DELETE 4~ - END */
1067 /* */
1068 /* Parameters: */
1069 /* EscapeChar1 - First character to follow ESC [ */
1070 /* EscapeChar2 - Second character following ESC [ , if applicable */
1071 /* */
1072 /****************************************************************************************/
1073 void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
1074 {
1075 Ifx_Shell_CmdLine *Cmd = NULL_PTR; /* Command line editing state */
1076 char *cmdStr = NULL_PTR; /* Cached pointer to command line being edited */
1077 sint32 i = 0; /* Loop variable */
1078
1079 /* Validate parameters */
1080 boolean result = (shell != NULL_PTR);
1081
1082 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result != FALSE);
1083
1084 if (result == FALSE)
1085 {
1086 return; /* ERROR CASE - no thread data available! */
1087 }
1088
1089 /* Cache command state and command line pointer */
1090 Cmd = &shell->cmd;
1091 cmdStr = Cmd->cmdStr;
1092
1093 /* Validate command line state */
1094 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, cmdStr != NULL_PTR);
1095 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->cursor < IFX_CFG_SHELL_CMD_LINE_SIZE);
1096 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, Cmd->length < IFX_CFG_SHELL_CMD_LINE_SIZE);
1097
1098 /* Switch on first character after ESC [ */
1099 switch (EscapeChar1)
1100 {
1101 case 'A': /* Up arrow */
1102
1103 if (Cmd->historyItem == IFX_SHELL_CMD_HISTORY_NO_ITEM)
1104 {
1105 /* Not using list at the moment - take most recent item [0] */
1106 Cmd->historyItem = 0;
1107 }
1108 else
1109 {
1110 if (Cmd->historyItem < (IFX_CFG_SHELL_CMD_HISTORY_SIZE - 1))
1111 {
1112 /* If not already at oldest, go back one in list */
1113 Cmd->historyItem++;
1114 }
1115 }
1116
1117 /* Copy text into buffer */
1118 strncpy(cmdStr, shell->cmdHistory[Cmd->historyItem], IFX_CFG_SHELL_CMD_LINE_SIZE);
1119
1120 /* echo to screen if requested */
1121 if (shell->control.echo != 0)
1122 {
1123 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1124 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1125 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1126 IfxStdIf_DPipe_print(shell->io, cmdStr); /* Copy buffer to screen */
1127 }
1128
1129 Cmd->cursor = (Ifx_SizeT)strlen(cmdStr); /* Store cursor position */
1130 Cmd->length = Cmd->cursor; /* Store command line length */
1131 Cmd->historyAdd = FALSE; /* Don't add back to history unless modified */
1132 break;
1133
1134 case 'B': /* Down arrow */
1135
1136 if ((Cmd->historyItem == IFX_SHELL_CMD_HISTORY_NO_ITEM) || (Cmd->historyItem == 0))
1137 {
1138 /* Not using list at the moment, or have dropped off the end - just clear command line */
1139 if (shell->control.echo != 0)
1140 {
1141 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1142 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1143 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1144 }
1145
1146 Cmd->length = 0; /* Reset command line length */
1147 Cmd->cursor = 0;
1148 Cmd->historyItem = IFX_SHELL_CMD_HISTORY_NO_ITEM; /* Ensure we are not using list */
1149 }
1150 else
1151 {
1152 /* Within list - move to more recent entry */
1153 Cmd->historyItem--;
1154
1155 /* Copy text into buffer */
1156 strncpy(cmdStr, shell->cmdHistory[Cmd->historyItem], IFX_CFG_SHELL_CMD_LINE_SIZE);
1157
1158 if (shell->control.echo != 0)
1159 {
1160 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) /* Move cursor back to start */
1161 IFX_SHELL_WRITE_SPACES(Cmd->length) /* Overwrite text with spaces */
1162 IFX_SHELL_WRITE_BACKSPACES(Cmd->length) /* Move cursor back to start */
1163 IfxStdIf_DPipe_print(shell->io, cmdStr); /* Copy buffer to screen */
1164 }
1165
1166 Cmd->cursor = (Ifx_SizeT)strlen(cmdStr); /* Store cursor position */
1167 Cmd->length = Cmd->cursor; /* Store command line length */
1168 }
1169
1170 Cmd->historyAdd = FALSE;
1171 break;
1172
1173 case 'C': /* Right arrow */
1174
1175 if (Cmd->cursor < Cmd->length)
1176 {
1177 /* Move cursor one place to right */
1178 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[Cmd->cursor])) Cmd->cursor++;
1179 }
1180
1181 break;
1182
1183 case 'D': /* Left arrow */
1184
1185 if (Cmd->cursor > 0)
1186 {
1187 /* Move cursor one place to left */
1188 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "\b")) Cmd->cursor--;
1189 }
1190
1191 break;
1192
1193 default:
1194 break;
1195 }
1196
1197 /* If second character after ESC [ is ~ then switch on number */
1198 if (EscapeChar2 == '~')
1199 {
1200 switch (EscapeChar1)
1201 {
1202 case '1': /* HOME - move to start of buffer */
1203
1204 if (Cmd->cursor > 0)
1205 {
1206 IFX_SHELL_WRITE_BACKSPACES(Cmd->cursor) Cmd->cursor = 0;
1207 }
1208
1209 break;
1210
1211 case '2': /* INSERT - insert blank character at cursor and move all remaining characters right one */
1212
1213 if ((Cmd->cursor < Cmd->length) && (Cmd->length < (IFX_CFG_SHELL_CMD_LINE_SIZE - 1)))
1214 {
1215 /* Update on screen */
1216 if (shell->control.echo != FALSE)
1217 {
1218 /* write over duplicated character at cursor */
1219 IfxStdIf_DPipe_print(shell->io, " ");
1220
1221 /* Update line with new characters */
1222 for (i = Cmd->cursor; i < Cmd->length; i++)
1223 {
1224 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[i]);
1225 }
1226
1227 /* Move cursor back to new place */
1228 IFX_SHELL_WRITE_BACKSPACES((Cmd->length + 1) - Cmd->cursor)
1229 }
1230
1231 /* Update in command line variable */
1232 for (i = Cmd->length; i > Cmd->cursor; i--)
1233 {
1234 cmdStr[i] = cmdStr[i - 1]; /* Shuffle text right */
1235 }
1236
1237 cmdStr[Cmd->length + 1] = IFX_SHELL_NULL_CHAR; /* Terminate string at end of longer string */
1238 cmdStr[Cmd->cursor] = ' '; /* Blank character at cursor */
1239
1240 Cmd->length++; /* Now one character longer */
1241 }
1242
1243 break;
1244
1245 case '3': /* DELETE - delete character to right and move all remaining characters left one */
1246
1247 if (Cmd->cursor < Cmd->length)
1248 {
1249 /* Update on screen */
1250 if (shell->control.echo != 0)
1251 {
1252 for (i = Cmd->cursor; i < (Cmd->length - 1); i++)
1253 {
1254 /* Update line with new characters */
1255 IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[i + 1]);
1256 }
1257
1258 /* write over duplicated character at end */
1259 IfxStdIf_DPipe_print(shell->io, " ");
1260
1261 /* Move cursor back to right place */
1262 IFX_SHELL_WRITE_BACKSPACES(Cmd->length - Cmd->cursor)
1263 }
1264
1265 /* Update in command line variable. Shuffle text left */
1266 strncpy(&cmdStr[Cmd->cursor], &cmdStr[Cmd->cursor + 1], Cmd->length - Cmd->cursor - 1);
1267
1268 cmdStr[Cmd->length - 1] = IFX_SHELL_NULL_CHAR; /* Terminate string at end of shorter string */
1269 Cmd->length--; /* Now one character shorter */
1270 }
1271
1272 break;
1273
1274 case '4': /* END - ensure cursor is at end */
1275
1276 while (Cmd->cursor < Cmd->length)
1277 {
1278 IFX_SHELL_IF_ECHO(IfxStdIf_DPipe_print(shell->io, "%c", cmdStr[Cmd->cursor])) Cmd->cursor++;
1279 }
1280
1281 break;
1282
1283 default:
1284 break;
1285 }
1286 }
1287 }
1288
1289
1290 void Ifx_Shell_enable(Ifx_Shell *shell)
1291 {
1292 // Clear the Rx buffer!
1293 IfxStdIf_DPipe_clearRx(shell->io);
1294 // Enable the shell
1295 shell->control.enabled = 1;
1296 }
1297
1298
1299 void Ifx_Shell_disable(Ifx_Shell *shell)
1300 {
1301 shell->control.enabled = 0;
1302 }
1303
1304
1305 void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
1306 {
1307 const Ifx_Shell_Syntax *syntax = syntaxList;
1308
1309 while (syntax->syntax != NULL_PTR)
1310 {
1311 IfxStdIf_DPipe_print(io, "Syntax : %s" ENDL, syntax->syntax);
1312 IfxStdIf_DPipe_print(io, " > %s" ENDL, syntax->description);
1313 syntax = &syntax[1];
1314 }
1315 }
Ifx_Shell_commandListFind
const Ifx_Shell_Command * Ifx_Shell_commandListFind(Ifx_Shell *shell, pchar commandLine, pchar *args, Ifx_Shell_CommandListConst *commandList)
Definition: Ifx_Shell.c:983
Ifx_Shell::io
IfxStdIf_DPipe * io
Pointer to IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:217
Ifx_Shell_Runtime::cmdState
Ifx_Shell_CmdState cmdState
Definition: Ifx_Shell.h:206
Ifx_Shell_Flags::enabled
uint16 enabled
Definition: Ifx_Shell.h:194
Ifx_Shell_parseUInt32
boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value.
Definition: Ifx_Shell.c:812
Ifx_Shell::locals
Ifx_Shell_Runtime locals
Runtime data.
Definition: Ifx_Shell.h:227
Ifx_Shell_Command::help
pchar help
Definition: Ifx_Shell.h:155
Ifx_Shell_CmdLine::cmdStr
char * cmdStr
Pointer to current string containing command line as so far processed.
Definition: Ifx_Shell.h:163
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
Ifx_Shell::control
Ifx_Shell_Flags control
control flags
Definition: Ifx_Shell.h:219
ISSPACE
#define ISSPACE(c)
Definition: Ifx_Shell.c:43
Ifx_Shell_Flags::echoError
uint16 echoError
Definition: Ifx_Shell.h:197
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
Ifx_Shell_Command
Shell command object.
Definition: Ifx_Shell.h:152
Ifx_Shell_ResultCode_nok
Definition: Ifx_Shell.h:143
Ifx_Shell_skipWhitespace
pchar Ifx_Shell_skipWhitespace(pchar args)
Within the context of Shell.call, skip the whitespaces of the args string.
Definition: Ifx_Shell.c:638
Ifx_Shell_cmdEscapeProcess
void Ifx_Shell_cmdEscapeProcess(Ifx_Shell *shell, char EscapeChar1, char EscapeChar2)
Definition: Ifx_Shell.c:1073
Ifx_Shell_CmdLine::historyAdd
boolean historyAdd
If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent...
Definition: Ifx_Shell.h:166
Ifx_Shell_Protocol::start
boolean(* start)(void *protocol, IfxStdIf_DPipe *io)
Definition: Ifx_Shell.h:182
Ifx_Shell_Config::sendResultCode
boolean sendResultCode
Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
Definition: Ifx_Shell.h:249
Ifx_Shell::cmd
Ifx_Shell_CmdLine cmd
Current status of command line editing (saves passing many parameters around)
Definition: Ifx_Shell.h:225
uint32
unsigned long uint32
Definition: Platform_Types.h:113
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:47
float32
float float32
Definition: Platform_Types.h:167
Ifx_Assert.h
Assert functions.
Ifx_Shell_Runtime::echo
char echo[2]
Definition: Ifx_Shell.h:203
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IFX_CFG_SHELL_PROMPT
#define IFX_CFG_SHELL_PROMPT
Shell prompt.
Definition: Ifx_Shell.h:122
Ifx_Shell_enable
void Ifx_Shell_enable(Ifx_Shell *shell)
Clear the receive buffer and enable the shell.
Definition: Ifx_Shell.c:1290
Ifx_Shell_CmdLine
Command line editing state.
Definition: Ifx_Shell.h:161
Ifx_Shell_Syntax
Shell Syntax Description.
Definition: Ifx_Shell.h:257
IfxCpu_Intrinsics.h
Ifx_Shell_showHelpSingle
boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list.
Definition: Ifx_Shell.c:87
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
Ifx_Shell_commandFind
const Ifx_Shell_Command * Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List.
Definition: Ifx_Shell.c:928
Ifx_Shell_Flags::sendResultCode
uint16 sendResultCode
Definition: Ifx_Shell.h:195
Ifx_Shell_parseFloat64
boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value.
Definition: Ifx_Shell.c:888
Ifx_Shell_printSyntax
void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax.
Definition: Ifx_Shell.c:1305
Ifx_Shell_Runtime::cmdStr
char cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE]
Definition: Ifx_Shell.h:205
IFX_SHELL_LLX
#define IFX_SHELL_LLX
Definition: Ifx_Shell.c:35
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:33
TIME_NULL
#define TIME_NULL
Definition: Ifx_Types.h:61
FALSE
#define FALSE
Definition: Platform_Types.h:90
Ifx_Shell_parseSInt64
boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value.
Definition: Ifx_Shell.c:833
Ifx_Shell_parseSInt32
boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value.
Definition: Ifx_Shell.c:791
Ifx_Shell_Runtime::escBracketNum
char escBracketNum
Definition: Ifx_Shell.h:207
Ifx_Shell_parseAddress
boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
Parse an address.
Definition: Ifx_Shell.c:771
IFX_SHELL_IF_ECHO
#define IFX_SHELL_IF_ECHO(X)
Definition: Ifx_Shell.c:46
Ifx_Shell_protocolStart
boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol.
Definition: Ifx_Shell.c:236
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
Ifx_Shell_Syntax::description
pchar description
description
Definition: Ifx_Shell.h:260
IFX_SHELL_LLU
#define IFX_SHELL_LLU
Definition: Ifx_Shell.c:36
Ifx_Shell::cmdHistory
char * cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE]
Array of pointers to the history entries.
Definition: Ifx_Shell.h:222
Ifx_Shell_showHelpSingleCommand
boolean Ifx_Shell_showHelpSingleCommand(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Definition: Ifx_Shell.c:180
IFX_SHELL_NULL_CHAR
#define IFX_SHELL_NULL_CHAR
Definition: Ifx_Shell.h:107
Ifx_Shell::protocol
Ifx_Shell_Protocol protocol
Protocol handler data.
Definition: Ifx_Shell.h:238
Ifx_Shell_Config::echo
boolean echo
Specifies whether each command shall be echoed back to user.
Definition: Ifx_Shell.h:247
Ifx_Shell_Runtime::inputbuffer
char inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE+1]
Definition: Ifx_Shell.h:204
IFX_SHELL_CMD_HISTORY_NO_ITEM
#define IFX_SHELL_CMD_HISTORY_NO_ITEM
Signifies no item in use in command history list.
Definition: Ifx_Shell.h:137
Ifx_Shell_parseToken
boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token...
Definition: Ifx_Shell.c:704
Ifx_Shell_parseFloat32
boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value.
Definition: Ifx_Shell.c:908
Ifx_Shell_Protocol::onStart
void(* onStart)(void *protocol, void *data)
Definition: Ifx_Shell.h:184
Ifx_Shell_Protocol::onStartData
void * onStartData
Definition: Ifx_Shell.h:185
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:242
IFX_CFG_SHELL_CMD_HISTORY_SIZE
#define IFX_CFG_SHELL_CMD_HISTORY_SIZE
Number of commands to store in history.
Definition: Ifx_Shell.h:110
Ifx_Shell_Command::call
Ifx_Shell_Call call
Definition: Ifx_Shell.h:157
sint64
long long sint64
Definition: Platform_Types.h:138
Ifx_Shell_init
boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell.
Definition: Ifx_Shell.c:314
IfxStdIf_DPipe_clearRx
IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:322
IFX_SHELL_LLD
#define IFX_SHELL_LLD
Definition: Ifx_Shell.c:34
Ifx_Shell_ResultCode_ok
Definition: Ifx_Shell.h:145
Ifx_Shell_Command::data
void * data
Definition: Ifx_Shell.h:156
Ifx_Shell_CmdLine::historyItem
Ifx_SizeT historyItem
Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e...
Definition: Ifx_Shell.h:167
Ifx_Shell_Config::standardIo
IfxStdIf_DPipe * standardIo
Pointer to a IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:246
IFX_SHELL_WRITE_SPACES
#define IFX_SHELL_WRITE_SPACES(X)
Definition: Ifx_Shell.c:49
Ifx_Shell_Config
Shell configuration.
Definition: Ifx_Shell.h:244
Ifx_Shell_Protocol::object
void * object
Definition: Ifx_Shell.h:186
float64
double float64
Definition: Platform_Types.h:172
Ifx_COUNTOF
#define Ifx_COUNTOF(x)
Definition: IfxCpu_Intrinsics.h:62
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
Ifx_Shell_bbProtocolStart
boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol.
Definition: Ifx_Shell.c:270
Ifx_Shell_Config::showPrompt
boolean showPrompt
Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command. ...
Definition: Ifx_Shell.h:248
Ifx_Shell_Syntax::syntax
pchar syntax
syntax
Definition: Ifx_Shell.h:259
Ifx_Shell_matchToken
boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token.
Definition: Ifx_Shell.c:652
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:60
Ifx_Shell_Flags::echo
uint16 echo
Definition: Ifx_Shell.h:196
Ifx_Shell_Protocol::execute
void(* execute)(void *protocol)
Definition: Ifx_Shell.h:183
Ifx_Shell_showHelp
boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands.
Definition: Ifx_Shell.c:211
Ifx_Shell_initConfig
void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
Definition: Ifx_Shell.c:291
IFX_CFG_SHELL_CMD_LINE_SIZE
#define IFX_CFG_SHELL_CMD_LINE_SIZE
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1
Definition: Ifx_Shell.h:114
sint32
long sint32
Definition: Platform_Types.h:131
IFX_SHELL_CMD_STATE_NORMAL
Normal - no special sequences being processed.
Definition: Ifx_Shell.h:173
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IFX_SHELL_CMD_STATE_ESCAPE
Escape character has been pressed.
Definition: Ifx_Shell.h:174
Ifx_Shell_Flags::showPrompt
uint16 showPrompt
Definition: Ifx_Shell.h:193
Ifx_Shell::commandList
Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS]
Array of pointers to command list. The pointed location shall be constant during Shell lifetime...
Definition: Ifx_Shell.h:236
IFX_SHELL_WRITE_BACKSPACES
#define IFX_SHELL_WRITE_BACKSPACES(X)
Definition: Ifx_Shell.c:53
IfxStdIf_DPipe_read
IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:250
Ifx_Shell_CmdLine::length
Ifx_SizeT length
Pointer to variable containing total length of command line.
Definition: Ifx_Shell.h:165
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
ESC [ (number) pressed.
Definition: Ifx_Shell.h:176
Ifx_Shell_execute
void Ifx_Shell_execute(Ifx_Shell *shell, pchar commandLine)
Definition: Ifx_Shell.c:1010
Ifx_Shell_CmdLine::cursor
Ifx_SizeT cursor
Pointer to variable containing position of cursor in so-far-processed command line.
Definition: Ifx_Shell.h:164
Ifx_Shell_Command::commandLine
pchar commandLine
Definition: Ifx_Shell.h:154
Ifx_Shell_ResultCode_unknown
Definition: Ifx_Shell.h:142
Ifx_Shell_parseUInt64
boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value.
Definition: Ifx_Shell.c:853
Ifx_Shell_deinit
void Ifx_Shell_deinit(Ifx_Shell *shell)
Deinitialise the shell.
Definition: Ifx_Shell.c:631
Ifx_Shell_process
void Ifx_Shell_process(Ifx_Shell *shell)
Process the shell.
Definition: Ifx_Shell.c:371
Ifx_Shell_isEndOfLine
boolean Ifx_Shell_isEndOfLine(pchar args)
Check whether the args is already at the end.
Definition: Ifx_Shell.c:69
Ifx_Shell_disable
void Ifx_Shell_disable(Ifx_Shell *shell)
Disable the shell.
Definition: Ifx_Shell.c:1299
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET
ESC [ pressed.
Definition: Ifx_Shell.h:175
TRUE
#define TRUE
Definition: Platform_Types.h:87
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
Ifx_Shell.h
Shell functions.
Ifx_Shell_cmdBuffer
char Ifx_Shell_cmdBuffer[IFX_CFG_SHELL_CMD_LINE_SIZE *IFX_CFG_SHELL_CMD_HISTORY_SIZE]
Definition: Ifx_Shell.c:57
Ifx_Shell_Protocol::started
boolean started
Definition: Ifx_Shell.h:187
Ifx_Shell
Shell object definition.
Definition: Ifx_Shell.h:215
IFX_CFG_SHELL_COMMAND_LISTS
#define IFX_CFG_SHELL_COMMAND_LISTS
Number of command lists.
Definition: Ifx_Shell.h:118


iLLD_TC26B: Ifx_Shell.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Ifx_Shell.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Shell.h
3 * \brief Shell functions.
4 * \ingroup library_srvsw_sysse_comm_shell
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup library_srvsw_sysse_comm_shell Shell
25 * This module implements the Shell functions.
26 * It parses a command line and call the corresponding command execution.
27 * Multiple command list can be used in parallel.
28 *
29 * Only full command match is accepted.
30 *
31 * New feature / change:
32 * - Prefix can be defined for each command list
33 * - Help for a single command is displayed with "help <command>"
34 * - help for a command list is displayed with "help <listPrefix>"
35 * - command short cut is not allowed
36 * - command with identical start option "opt1 opt2" and "opt1 opt3" are accepted, and root to different handlers
37 * - Enhanced help info print
38 *
39 * Help text xyntax:
40 * - /p indicates a parameter description, can be multi-line, lines must be separated with ENDL
41 * - /s Indicates a syntax help
42 *
43 * Example of help list:
44 * \code
45 * Ifx_Shell_Command Ifx_g_OsciShell_commands[] =
46 * {
47 * {IFX_OSCI_SHELL_PREFIX, " : Oscilloscope functions"
48 * , NULL_PTR, NULL_PTR },
49 * {"run", " : run the oscilloscope"ENDL
50 * "/s run [single|auto|normal]"
51 * , NULL_PTR, &Ifx_OsciShell_run },
52 * {"stop", " : stop oscilloscope"
53 * , NULL_PTR, &Ifx_OsciShell_stop },
54 * {"trigger", " : trigger settings"ENDL
55 * "/s trigger [force|single|level <value>|raising|falling|source <chNum>|interval <value>]"ENDL
56 * "/p force: Force the trigger"ENDL
57 * "/p single: Single the trigger"ENDL
58 * "/p level <value>: Set trigger level to value"ENDL
59 * "/p [raising|falling]: Set trigger to raising or falling edges"ENDL
60 * "/p source <chNum>: Set trigger channel number"ENDL
61 * "<chNum> can be obtained with 'channel' command"ENDL
62 * "/p interval <value>: Set sampling interval to value"
63 *
64 * , NULL_PTR, &Ifx_OsciShell_trigger },
65 * {"status", " : display status"
66 * , NULL_PTR, &Ifx_OsciShell_status },
67 * {"channel", " : channel information"ENDL
68 * "/s channel: Show the channels information"ENDL
69 * "/s channel <ch> <sig>: Assign a signal to a channel"
70 * , NULL_PTR, &Ifx_OsciShell_channel },
71 * {"analyze", " : signal analysis of a ch"ENDL
72 * "/s analyze <ch>: analyze the input channel <ch>"
73 * , NULL_PTR, &Ifx_OsciShell_analyze },
74 * {"simulate", " : simulate a signal"ENDL
75 * "/s simulate <ch> <op> <wave> <freq> <ampl> <offs> <phase> : Simulate a signal generation"ENDL
76 * "/p <ch> : {0 .. Channel count}"ENDL
77 * "/p <op> : {add,sub,mul,clr}"ENDL
78 * "/p <wave> : {sine,square}"ENDL
79 * "/p <freq> : -INF .. INF"ENDL
80 * "/p <offs> : -INF .. INF"ENDL
81 * "/p <ampl> : -INF .. INF"ENDL
82 * "/p <phase>: 0 .. 360 [degree]"ENDL
83 * "/s simulate <ch> atan <ych> <xch>: Compute atan(ych/xch) and store in channel <ch>"
84 * , NULL_PTR, &Ifx_OsciShell_simulate},
85 * {"dump", " : dump values (all channels)"ENDL
86 * "/s dump <ch> [hex]"ENDL
87 * "/p <ch>: Dump the values of the channel <ch>"ENDL
88 * "/p hex: If hex is specified, values will be in hexadecimal"
89 * , NULL_PTR, &Ifx_OsciShell_dump },
90 * IFX_SHELL_COMMAND_LIST_END,
91 * };
92 * \endcode
93 *
94 * To enable help command, include the below command in the main command list
95 * {"help", SHELL_HELP_DESCRIPTION_TEXT , &<Ifx_Shell>, &Ifx_Shell_showHelp, },
96 *
97 * \ingroup library_srvsw_sysse_comm
98 *
99 */
100
101 #ifndef IFX_SHELL_H
102 #define IFX_SHELL_H 1
103 //----------------------------------------------------------------------------------------
104 #include "StdIf/IfxStdIf_DPipe.h"
105 #include "Ifx_Cfg.h"
106 //----------------------------------------------------------------------------------------
107 #define IFX_SHELL_NULL_CHAR '\0'
108
109 #ifndef IFX_CFG_SHELL_CMD_HISTORY_SIZE
110 #define IFX_CFG_SHELL_CMD_HISTORY_SIZE (10) /**<\brief Number of commands to store in history */
111 #endif
112
113 #ifndef IFX_CFG_SHELL_CMD_LINE_SIZE
114 #define IFX_CFG_SHELL_CMD_LINE_SIZE (128) /**<\brief max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1 */
115 #endif
116
117 #ifndef IFX_CFG_SHELL_COMMAND_LISTS
118 #define IFX_CFG_SHELL_COMMAND_LISTS (1) /**<\brief Number of command lists */
119 #endif
120
121 #ifndef IFX_CFG_SHELL_PROMPT
122 #define IFX_CFG_SHELL_PROMPT "Shell>" /**<\brief Shell prompt */
123 #endif
124
125 #define SHELL_HELP_DESCRIPTION_TEXT \
126 " : Display command list, and command help."ENDL \
127 "/s help: show all commands"ENDL \
128 "/s help <command>: show the command details"
129
130 /** \brief Marker for end of command list, the end of list is detected by commandLine=NULL */
131 #define IFX_SHELL_COMMAND_LIST_END {0, 0, 0, 0}
132
133 /** \brief Marker for end of syntax list */
134 #define IFX_SHELL_SYNTAX_LIST_END {0, 0}
135
136 /** \brief Signifies no item in use in command history list */
137 #define IFX_SHELL_CMD_HISTORY_NO_ITEM (-1)
138 //----------------------------------------------------------------------------------------
139 /** \brief Result code definition used after each executed Shell command */
140 typedef enum
141 {
142 Ifx_Shell_ResultCode_unknown = (128),
143 Ifx_Shell_ResultCode_nok = (129),
144 Ifx_Shell_ResultCode_undefined = (130),
145 Ifx_Shell_ResultCode_ok = (255)
146 } Ifx_Shell_ResultCode;
147
148 /** \brief Definition of a callback function which handles a Shell command */
149 typedef boolean (*Ifx_Shell_Call)(pchar args, void *data, IfxStdIf_DPipe *io);
150
151 /** \brief Shell command object */
152 typedef struct
153 {
154 pchar commandLine;
155 pchar help;
156 void *data;
157 Ifx_Shell_Call call;
158 } Ifx_Shell_Command;
159
160 /** \brief Command line editing state */
161 typedef struct
162 {
163 char *cmdStr; /**< \brief Pointer to current string containing command line as so far processed */
164 Ifx_SizeT cursor; /**< \brief Pointer to variable containing position of cursor in so-far-processed command line */
165 Ifx_SizeT length; /**< \brief Pointer to variable containing total length of command line */
166 boolean historyAdd; /**< \brief If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent) */
167 Ifx_SizeT historyItem; /**< \brief Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e.g. new command) */
168 } Ifx_Shell_CmdLine;
169
170 /** \brief Shell command processing state */
171 typedef enum
172 {
173 IFX_SHELL_CMD_STATE_NORMAL, /**< \brief Normal - no special sequences being processed */
174 IFX_SHELL_CMD_STATE_ESCAPE, /**< \brief Escape character has been pressed */
175 IFX_SHELL_CMD_STATE_ESCAPE_BRACKET, /**< \brief ESC [ pressed */
176 IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER /**< \brief ESC [ (number) pressed */
177 } Ifx_Shell_CmdState;
178
179 /** \brief Shell protocol configuration */
180 typedef struct
181 {
182 boolean (*start)(void *protocol, IfxStdIf_DPipe *io);
183 void (*execute)(void *protocol);
184 void (*onStart)(void *protocol, void *data);
185 void *onStartData;
186 void *object;
187 boolean started;
188 } Ifx_Shell_Protocol;
189
190 /** \brief Shell control flags */
191 typedef struct
192 {
193 uint16 showPrompt : 1;
194 uint16 enabled : 1;
195 uint16 sendResultCode : 1;
196 uint16 echo : 1;
197 uint16 echoError : 1;
198 } Ifx_Shell_Flags;
199
200 /** \brief internal Shell run-time data */
201 typedef struct
202 {
203 char echo[2];
204 char inputbuffer[IFX_CFG_SHELL_CMD_LINE_SIZE + 1];
205 char cmdStr[IFX_CFG_SHELL_CMD_LINE_SIZE];
206 Ifx_Shell_CmdState cmdState;
207 char escBracketNum;
208 } Ifx_Shell_Runtime;
209
210 typedef Ifx_Shell_Command *Ifx_Shell_CommandList;
211 typedef const Ifx_Shell_Command *Ifx_Shell_CommandListConst;
212 /**
213 * \brief Shell object definition
214 */
215 typedef struct
216 {
217 IfxStdIf_DPipe *io; /**< \brief Pointer to IfxStdIf_DPipe object used by the Shell */
218
219 Ifx_Shell_Flags control; /**< \brief control flags */
220
221 /** \brief Array of pointers to the history entries */
222 char *cmdHistory[IFX_CFG_SHELL_CMD_HISTORY_SIZE];
223
224 /** \brief Current status of command line editing (saves passing many parameters around) */
225 Ifx_Shell_CmdLine cmd;
226
227 Ifx_Shell_Runtime locals; /**< \brief Runtime data */
228
229 /** \brief Array of pointers to command list. The pointed location shall be constant
230 * during Shell lifetime, e.g. stored in non-volatile memory or as global variable
231 *
232 * The 1st item in the list is use as a group command prefix if its "call" parameter is NULL pointer, else it is use as other entries.
233 * In case "call" is NULL, the corresponding 'data' is ignored, and the 'help' is displayed.
234 *
235 **/
236 Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS];
237
238 Ifx_Shell_Protocol protocol; /**< \brief Protocol handler data */
239 } Ifx_Shell;
240
241 /**
242 * \brief Shell configuration.
243 */
244 typedef struct
245 {
246 IfxStdIf_DPipe *standardIo; /**<\brief Pointer to a IfxStdIf_DPipe object used by the Shell */
247 boolean echo; /**<\brief Specifies whether each command shall be echoed back to user */
248 boolean showPrompt; /**<\brief Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command */
249 boolean sendResultCode; /**<\brief Specifies whether the Ifx_Shell_ResultCode shall be sent to user */
250 Ifx_Shell_CommandListConst commandList[IFX_CFG_SHELL_COMMAND_LISTS]; /**< \brief Specifies pointer to the command list */
251 Ifx_Shell_Protocol protocol; /**<\brief Configuration for the Ifx_Shell_Protocol */
252 } Ifx_Shell_Config;
253
254 /**
255 * \brief Shell Syntax Description.
256 */
257 typedef struct
258 {
259 pchar syntax; /**<\brief syntax */
260 pchar description; /**<\brief description */
261 } Ifx_Shell_Syntax;
262
263 //----------------------------------------------------------------------------------------
264 /** \addtogroup library_srvsw_sysse_comm_shell
265 * \{ */
266
267 /** \name Basic functionality
268 * \{ */
269
270 /** Set the config default parameter
271 *
272 * \param config Pointer to the configuration structure to be initialized
273 */
274 void Ifx_Shell_initConfig(Ifx_Shell_Config *config);
275
276 /**
277 * \brief Initialize the shell
278 * \param shell Pointer to the \ref Ifx_Shell object
279 * \param config Pointer to the configuration structure
280 */
281 IFX_EXTERN boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config);
282
283 /**
284 * \brief Deinitialise the shell
285 * \param shell Pointer to the \ref Ifx_Shell object
286 */
287 IFX_EXTERN void Ifx_Shell_deinit(Ifx_Shell *shell);
288
289 /**
290 * \brief Clear the receive buffer and enable the shell
291 * \param shell Pointer to the \ref Ifx_Shell object
292 */
293 IFX_EXTERN void Ifx_Shell_enable(Ifx_Shell *shell);
294
295 /**
296 * \brief Disable the shell
297 * \param shell Pointer to the \ref Ifx_Shell object
298 */
299 IFX_EXTERN void Ifx_Shell_disable(Ifx_Shell *shell);
300
301 /**
302 * \brief Process the shell.
303 *
304 * This function shall be called within a loop or periodic timer to guarantee the correct
305 * processing of the incoming/received data.
306 *
307 * \param shell Pointer to the \ref Ifx_Shell object
308 */
309 IFX_EXTERN void Ifx_Shell_process(Ifx_Shell *shell);
310
311 /** \} */
312 //----------------------------------------------------------------------------------------
313 /** \name Parsing functions
314 * \{ */
315
316 /**
317 * \brief Within the context of Shell.call, skip the whitespaces of the args string.
318 * \param args Pointer to the original string
319 * \return Pointer to the string after skipping the whitespaces
320 */
321 IFX_EXTERN pchar Ifx_Shell_skipWhitespace(pchar args);
322
323 /**
324 * \brief Match string pointed by the *argsPtr with a given token
325 * \param argsPtr Pointer to the argument null-terminated string
326 * \param token Pointer to the token string to match
327 * \retval TRUE if the given token match with the string pointed by argsPtr
328 */
329 IFX_EXTERN boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token);
330
331 /**
332 * \brief Parse a token
333 * Return the next token in tokenBuffer and move the argsPtr pointer after this token
334 * \param argsPtr Pointer to the argument null-terminated string
335 * \param tokenBuffer Pointer to the value storage
336 * \param bufferLength Maximum parsing length
337 */
338 IFX_EXTERN boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength);
339
340 /**
341 * \brief Parse an address
342 * \param argsPtr Pointer to the argument null-terminated string
343 * \param address Pointer to the value storage
344 */
345 IFX_EXTERN boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address);
346
347 /**
348 * \brief Parse a signed 32-bit integer value
349 * \param argsPtr Pointer to the argument null-terminated string
350 * \param value Pointer to the value storage
351 */
352 IFX_EXTERN boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value);
353
354 /**
355 * \brief Parse an unsigned 32-bit integer value
356 * \param argsPtr Pointer to the argument null-terminated string
357 * \param value Pointer to the value storage
358 * \param hex if TRUE, hex parsing will be done, else decimal parsing
359 */
360 IFX_EXTERN boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex);
361
362 /**
363 * \brief Parse a signed 64-bit integer value
364 * \param argsPtr Pointer to the argument null-terminated string
365 * \param value Pointer to the value storage
366 */
367 IFX_EXTERN boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value);
368
369 /**
370 * \brief Parse an unsigned 64-bit integer value
371 * \param argsPtr Pointer to the argument null-terminated string
372 * \param value Pointer to the value storage
373 * \param hex if TRUE, hex parsing will be done, else decimal parsing
374 */
375 IFX_EXTERN boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex);
376
377 /**
378 * \brief Parse a 64-bit (double precision) floating-point value
379 * \param argsPtr Pointer to the argument null-terminated string
380 * \param value Pointer to the value storage
381 */
382 IFX_EXTERN boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value);
383
384 /**
385 * \brief Parse a 32-bit (single precision) floating-point value
386 * \param argsPtr Pointer to the argument null-terminated string
387 * \param value Pointer to the value storage
388 */
389 IFX_EXTERN boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value);
390
391 /** \} */
392 //----------------------------------------------------------------------------------------
393 /** \name Command list functions
394 * \{ */
395
396 /**
397 * \brief Find command in command List
398 * \param commandList Pointer to the first entry of an array of \ref Ifx_Shell_Command
399 * \param commandLine Pointer to null-terminated string containings the command to search.
400 * \param args Pointer to the argument null-terminated string
401 * \param match Return the number of arguments that matches
402 */
403 IFX_EXTERN const Ifx_Shell_Command *Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match);
404
405 /**
406 * \brief Implementation of \ref Ifx_Shell_Call. Show the help menu from single command list.
407 * \param commandList Pointer to an array of Ifx_Shell_Command
408 * \param io Pointer to the IfxStdIf_DPipe object
409 * \param briefOnly if TRUE, show only the brief description, else show the full description
410 * \param singleCommand If TRUE, only show the 1st command pointed by commandList, else show the full list
411 */
412 IFX_EXTERN boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand);
413
414 /**
415 * \brief Implementation of \ref Ifx_Shell_Call. Show the help menu and list of commands.
416 * \param args The argument null-terminated string
417 * \param shellPtr Pointer to a Shell object
418 * \param io Pointer to \ref IfxStdIf_DPipe object
419 */
420 IFX_EXTERN boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io);
421
422 /**
423 * \brief Implementation of \ref Ifx_Shell_Call. print the syntax.
424 * \param syntaxList Pointer to syntax list
425 * \param io Pointer to \ref IfxStdIf_DPipe object
426 */
427 IFX_EXTERN void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io);
428
429 /** \} */
430 //----------------------------------------------------------------------------------------
431 /** \name Sub protocol functions
432 * \{ */
433
434 /**
435 * \brief Implementation of \ref Ifx_Shell_Call. Start the Shell protocol.
436 * \param args The argument null-terminated string
437 * \param data Pointer to \ref Ifx_Shell object
438 * \param io Pointer to \ref IfxStdIf_DPipe object
439 */
440 IFX_EXTERN boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io);
441
442 /**
443 * \brief Implementation of \ref Ifx_Shell_Call. Start the ShellBb protocol.
444 * \param args The argument null-terminated string
445 * \param data Pointer to \ref Ifx_Shell object
446 * \param io Pointer to \ref IfxStdIf_DPipe object
447 */
448 IFX_EXTERN boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io);
449
450 /** \} */
451 //----------------------------------------------------------------------------------------
452 /** \} */
453
454 #endif
Ifx_Shell::io
IfxStdIf_DPipe * io
Pointer to IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:217
Ifx_Shell_Runtime::cmdState
Ifx_Shell_CmdState cmdState
Definition: Ifx_Shell.h:206
Ifx_Shell_Flags::enabled
uint16 enabled
Definition: Ifx_Shell.h:194
Ifx_Shell_parseUInt32
IFX_EXTERN boolean Ifx_Shell_parseUInt32(pchar *argsPtr, uint32 *value, boolean hex)
Parse an unsigned 32-bit integer value.
Definition: Ifx_Shell.c:812
Ifx_Shell::locals
Ifx_Shell_Runtime locals
Runtime data.
Definition: Ifx_Shell.h:227
Ifx_Shell_Command::help
pchar help
Definition: Ifx_Shell.h:155
Ifx_Shell_CmdLine::cmdStr
char * cmdStr
Pointer to current string containing command line as so far processed.
Definition: Ifx_Shell.h:163
Ifx_Shell::control
Ifx_Shell_Flags control
control flags
Definition: Ifx_Shell.h:219
Ifx_Shell_Flags::echoError
uint16 echoError
Definition: Ifx_Shell.h:197
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
Ifx_Shell_Command
Shell command object.
Definition: Ifx_Shell.h:152
Ifx_Shell_ResultCode_nok
Definition: Ifx_Shell.h:143
Ifx_Shell_skipWhitespace
IFX_EXTERN pchar Ifx_Shell_skipWhitespace(pchar args)
Within the context of Shell.call, skip the whitespaces of the args string.
Definition: Ifx_Shell.c:638
Ifx_Shell_CmdLine::historyAdd
boolean historyAdd
If TRUE, when Enter is pressed, the current cmdLine should be added to the command history (in parent...
Definition: Ifx_Shell.h:166
Ifx_Shell_Config::sendResultCode
boolean sendResultCode
Specifies whether the Ifx_Shell_ResultCode shall be sent to user.
Definition: Ifx_Shell.h:249
Ifx_Shell_Runtime
internal Shell run-time data
Definition: Ifx_Shell.h:201
Ifx_Shell::cmd
Ifx_Shell_CmdLine cmd
Current status of command line editing (saves passing many parameters around)
Definition: Ifx_Shell.h:225
Ifx_Shell_CommandListConst
const Ifx_Shell_Command * Ifx_Shell_CommandListConst
Definition: Ifx_Shell.h:211
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_Shell_ResultCode
Ifx_Shell_ResultCode
Result code definition used after each executed Shell command.
Definition: Ifx_Shell.h:140
float32
float float32
Definition: Platform_Types.h:167
Ifx_Shell_CmdState
Ifx_Shell_CmdState
Shell command processing state.
Definition: Ifx_Shell.h:171
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
Ifx_Shell_Call
boolean(* Ifx_Shell_Call)(pchar args, void *data, IfxStdIf_DPipe *io)
Definition of a callback function which handles a Shell command.
Definition: Ifx_Shell.h:149
Ifx_Shell_enable
IFX_EXTERN void Ifx_Shell_enable(Ifx_Shell *shell)
Clear the receive buffer and enable the shell.
Definition: Ifx_Shell.c:1290
Ifx_Shell_CmdLine
Command line editing state.
Definition: Ifx_Shell.h:161
Ifx_Shell_Flags
Shell control flags.
Definition: Ifx_Shell.h:191
Ifx_Shell_Syntax
Shell Syntax Description.
Definition: Ifx_Shell.h:257
Ifx_Shell_showHelpSingle
IFX_EXTERN boolean Ifx_Shell_showHelpSingle(Ifx_Shell_CommandListConst commandList, IfxStdIf_DPipe *io, boolean briefOnly, boolean singleCommand)
Implementation of Ifx_Shell_Call. Show the help menu from single command list.
Definition: Ifx_Shell.c:87
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
Ifx_Shell_commandFind
IFX_EXTERN const Ifx_Shell_Command * Ifx_Shell_commandFind(Ifx_Shell_CommandListConst commandList, pchar commandLine, pchar *args, uint32 *match)
Find command in command List.
Definition: Ifx_Shell.c:928
Ifx_Shell_Flags::sendResultCode
uint16 sendResultCode
Definition: Ifx_Shell.h:195
Ifx_Shell_parseFloat64
IFX_EXTERN boolean Ifx_Shell_parseFloat64(pchar *argsPtr, float64 *value)
Parse a 64-bit (double precision) floating-point value.
Definition: Ifx_Shell.c:888
Ifx_Shell_printSyntax
IFX_EXTERN void Ifx_Shell_printSyntax(const Ifx_Shell_Syntax *syntaxList, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. print the syntax.
Definition: Ifx_Shell.c:1305
Ifx_Shell_parseSInt64
IFX_EXTERN boolean Ifx_Shell_parseSInt64(pchar *argsPtr, sint64 *value)
Parse a signed 64-bit integer value.
Definition: Ifx_Shell.c:833
Ifx_Shell_parseSInt32
IFX_EXTERN boolean Ifx_Shell_parseSInt32(pchar *argsPtr, sint32 *value)
Parse a signed 32-bit integer value.
Definition: Ifx_Shell.c:791
Ifx_Shell_Runtime::escBracketNum
char escBracketNum
Definition: Ifx_Shell.h:207
Ifx_Shell_parseAddress
IFX_EXTERN boolean Ifx_Shell_parseAddress(pchar *argsPtr, void **address)
Parse an address.
Definition: Ifx_Shell.c:771
Ifx_Shell_protocolStart
IFX_EXTERN boolean Ifx_Shell_protocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the Shell protocol.
Definition: Ifx_Shell.c:236
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_Shell_CommandList
Ifx_Shell_Command * Ifx_Shell_CommandList
Definition: Ifx_Shell.h:210
Ifx_Shell_Syntax::description
pchar description
description
Definition: Ifx_Shell.h:260
Ifx_Shell::protocol
Ifx_Shell_Protocol protocol
Protocol handler data.
Definition: Ifx_Shell.h:238
Ifx_Shell_Config::echo
boolean echo
Specifies whether each command shall be echoed back to user.
Definition: Ifx_Shell.h:247
Ifx_Shell_parseToken
IFX_EXTERN boolean Ifx_Shell_parseToken(pchar *argsPtr, char *tokenBuffer, int bufferLength)
Parse a token Return the next token in tokenBuffer and move the argsPtr pointer after this token...
Definition: Ifx_Shell.c:704
Ifx_Shell_parseFloat32
IFX_EXTERN boolean Ifx_Shell_parseFloat32(pchar *argsPtr, float32 *value)
Parse a 32-bit (single precision) floating-point value.
Definition: Ifx_Shell.c:908
Ifx_Shell_Protocol::onStartData
void * onStartData
Definition: Ifx_Shell.h:185
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IFX_CFG_SHELL_CMD_HISTORY_SIZE
#define IFX_CFG_SHELL_CMD_HISTORY_SIZE
Number of commands to store in history.
Definition: Ifx_Shell.h:110
Ifx_Shell_Command::call
Ifx_Shell_Call call
Definition: Ifx_Shell.h:157
sint64
long long sint64
Definition: Platform_Types.h:138
Ifx_Shell_init
IFX_EXTERN boolean Ifx_Shell_init(Ifx_Shell *shell, const Ifx_Shell_Config *config)
Initialize the shell.
Definition: Ifx_Shell.c:314
Ifx_Shell_ResultCode_ok
Definition: Ifx_Shell.h:145
Ifx_Shell_ResultCode_undefined
Definition: Ifx_Shell.h:144
Ifx_Shell_Command::data
void * data
Definition: Ifx_Shell.h:156
boolean
unsigned char boolean
Definition: Platform_Types.h:101
Ifx_Shell_CmdLine::historyItem
Ifx_SizeT historyItem
Item ID in command history list, or IFX_SHELL_CMD_HISTORY_NO_ITEM if not using list (e...
Definition: Ifx_Shell.h:167
Ifx_Shell_Config::standardIo
IfxStdIf_DPipe * standardIo
Pointer to a IfxStdIf_DPipe object used by the Shell.
Definition: Ifx_Shell.h:246
Ifx_Shell_Config
Shell configuration.
Definition: Ifx_Shell.h:244
Ifx_Shell_Protocol::object
void * object
Definition: Ifx_Shell.h:186
float64
double float64
Definition: Platform_Types.h:172
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_Shell_bbProtocolStart
IFX_EXTERN boolean Ifx_Shell_bbProtocolStart(pchar args, void *data, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Start the ShellBb protocol.
Definition: Ifx_Shell.c:270
Ifx_Shell_Config::showPrompt
boolean showPrompt
Specifies whether the IFX_CFG_SHELL_PROMPT shall be displayed after each command. ...
Definition: Ifx_Shell.h:248
Ifx_Shell_Syntax::syntax
pchar syntax
syntax
Definition: Ifx_Shell.h:259
Ifx_Shell_matchToken
IFX_EXTERN boolean Ifx_Shell_matchToken(pchar *argsPtr, pchar token)
Match string pointed by the *argsPtr with a given token.
Definition: Ifx_Shell.c:652
Ifx_Shell_Flags::echo
uint16 echo
Definition: Ifx_Shell.h:196
Ifx_Shell_showHelp
IFX_EXTERN boolean Ifx_Shell_showHelp(pchar args, void *shellPtr, IfxStdIf_DPipe *io)
Implementation of Ifx_Shell_Call. Show the help menu and list of commands.
Definition: Ifx_Shell.c:211
Ifx_Shell_initConfig
void Ifx_Shell_initConfig(Ifx_Shell_Config *config)
Definition: Ifx_Shell.c:291
IFX_CFG_SHELL_CMD_LINE_SIZE
#define IFX_CFG_SHELL_CMD_LINE_SIZE
max command line IFX_CFG_SHELL_CMD_LINE_SIZE - 1
Definition: Ifx_Shell.h:114
sint32
long sint32
Definition: Platform_Types.h:131
IFX_SHELL_CMD_STATE_NORMAL
Normal - no special sequences being processed.
Definition: Ifx_Shell.h:173
IFX_SHELL_CMD_STATE_ESCAPE
Escape character has been pressed.
Definition: Ifx_Shell.h:174
Ifx_Shell_Flags::showPrompt
uint16 showPrompt
Definition: Ifx_Shell.h:193
Ifx_Shell_CmdLine::length
Ifx_SizeT length
Pointer to variable containing total length of command line.
Definition: Ifx_Shell.h:165
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET_NUMBER
ESC [ (number) pressed.
Definition: Ifx_Shell.h:176
Ifx_Shell_CmdLine::cursor
Ifx_SizeT cursor
Pointer to variable containing position of cursor in so-far-processed command line.
Definition: Ifx_Shell.h:164
Ifx_Shell_Command::commandLine
pchar commandLine
Definition: Ifx_Shell.h:154
Ifx_Shell_Protocol
Shell protocol configuration.
Definition: Ifx_Shell.h:180
Ifx_Shell_ResultCode_unknown
Definition: Ifx_Shell.h:142
Ifx_Shell_parseUInt64
IFX_EXTERN boolean Ifx_Shell_parseUInt64(pchar *argsPtr, uint64 *value, boolean hex)
Parse an unsigned 64-bit integer value.
Definition: Ifx_Shell.c:853
Ifx_Shell_deinit
IFX_EXTERN void Ifx_Shell_deinit(Ifx_Shell *shell)
Deinitialise the shell.
Definition: Ifx_Shell.c:631
Ifx_Shell_process
IFX_EXTERN void Ifx_Shell_process(Ifx_Shell *shell)
Process the shell.
Definition: Ifx_Shell.c:371
Ifx_Shell_disable
IFX_EXTERN void Ifx_Shell_disable(Ifx_Shell *shell)
Disable the shell.
Definition: Ifx_Shell.c:1299
IFX_SHELL_CMD_STATE_ESCAPE_BRACKET
ESC [ pressed.
Definition: Ifx_Shell.h:175
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
Ifx_Shell_Protocol::started
boolean started
Definition: Ifx_Shell.h:187
Ifx_Shell
Shell object definition.
Definition: Ifx_Shell.h:215
IFX_CFG_SHELL_COMMAND_LISTS
#define IFX_CFG_SHELL_COMMAND_LISTS
Number of command lists.
Definition: Ifx_Shell.h:118


iLLD_TC26B: Ifx_Types.h Source File

  • Cpu
  • Std
Ifx_Types.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_Types.h
3 * \brief This files defines all types used by the IFX HAL and libraries
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 #ifndef IFX_TYPES_H
26 #define IFX_TYPES_H 1
27
28 /******************************************************************************/
29 #include "Tricore/Compilers/Compilers.h" /* mapping compiler specific keywords */
30 #include "Platform_Types.h"
31
32 /*******************************************************************************
33 ** Global Data Types **
34 ** (Types not defined by AUTOSAR) **
35 *******************************************************************************/
36 typedef const char *pchar; /**< \brief const char pointer */
37 typedef void *pvoid; /**< \brief void pointer */
38 typedef volatile void *vvoid; /**< \brief volatile void pointer */
39 typedef void (*voidfuncvoid) (void); /**< \brief void pointer which takes void argument */
40
41 typedef struct
42 {
43 float32 real; /**< \brief Real part */
44 float32 imag; /**< \brief Imaginary part */
45 } cfloat32;
46
47 typedef struct
48 {
49 sint32 real; /**< \brief Real part */
50 sint32 imag; /**< \brief Imaginary part */
51 } csint32;
52
53 typedef struct
54 {
55 sint16 real; /**< \brief Real part */
56 sint16 imag; /**< \brief Imaginary part */
57 } csint16;
58
59 typedef sint64 Ifx_TickTime; /**< \brief Time in ticks */
60 #define TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)
61 #define TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)
62
63 #define IFX_ONES (0xFFFFFFFFFFFFFFFFU)
64 #define IFX_ZEROS (0x0000000000000000U)
65
66
67 #if CFG_LONG_SIZE_T
68 #define IFX_SIZET_MAX (0x7FFFFFFFL)
69 typedef sint32 Ifx_SizeT; /**< \brief Type used for data stream size */
70 #else
71 #define IFX_SIZET_MAX (0x7FFF)
72 typedef sint16 Ifx_SizeT; /**< \brief Type used for data stream size */
73 #endif
74
75 /** \brief Circular buffer definition. */
76 typedef struct
77 {
78 void *base; /**< \brief buffer base address */
79 uint16 index; /**< \brief buffer current index */
80 uint16 length; /**< \brief buffer length*/
81 } Ifx_CircularBuffer;
82
83 typedef uint16 Ifx_Priority; /**< \brief Used in interrupt service priorities */
84 typedef uint32 Ifx_TimerValue; /**< \brief Used in timer values */
85 typedef sint32 Ifx_SignedTimerVal; /**< \brief Used in signed timer values */
86
87 typedef pvoid Ifx_AddressValue; /**< \brief Used in address values */
88
89 typedef struct
90 {
91 uint16 priority;
92 uint16 provider;
93 } Ifx_IsrSetting;
94
95 /** \brief Signal active state definition. */
96 typedef enum
97 {
98 Ifx_ActiveState_low = 0, /**< \brief The signal is low active */
99 Ifx_ActiveState_high = 1 /**< \brief The signal is high active */
100 } Ifx_ActiveState;
101
102 typedef enum
103 {
104 Ifx_ParityMode_even = 0,
105 Ifx_ParityMode_odd = 1
106 } Ifx_ParityMode;
107
108 /** \brief input multiplexer definition used in PinMaps
109 */
110 typedef enum
111 {
112 Ifx_RxSel_a,
113 Ifx_RxSel_b,
114 Ifx_RxSel_c,
115 Ifx_RxSel_d,
116 Ifx_RxSel_e,
117 Ifx_RxSel_f,
118 Ifx_RxSel_g,
119 Ifx_RxSel_h
120 } Ifx_RxSel;
121
122 /** \brief Module address and index map */
123 typedef struct
124 {
125 volatile void *module; /**< \brief Module address */
126 sint32 index; /**< \brief Module index */
127 } IfxModule_IndexMap;
128
129 typedef struct
130 {
131 Ifx_TickTime timestamp;
132 uint8 data;
133 }Ifx_DataBufferMode_TimeStampSingle;
134
135 /*
136 * typedef struct
137 * {
138 * Ifx_TickTime timestamp;
139 * uint8 count[1]; // Number of valid data
140 * uint8 data[7];
141 * }Ifx_DataBufferMode_TimeStampBurst;
142 */
143
144 typedef enum
145 {
146 Ifx_DataBufferMode_normal = 0, /**< \brief normal mode, each received byte is moved to the rx fifo */
147 Ifx_DataBufferMode_timeStampSingle, /**< \brief Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items. */
148 // Ifx_DataBufferMode_timeStameBurst /**< \brief Burst byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampBurst items. */
149 }Ifx_DataBufferMode;
150
151 /**
152 * Defines the PWM modes
153 *
154 * The 1st member shall start with value 0, and the next members value shall be the previous member +1
155 * pwmMode_off shall be the member with the higher index
156 * \note enum order and values should not be modified, except Ifx_Pwm_Mode_init and Ifx_Pwm_Mode_count
157 */
158 typedef enum
159 {
160 Ifx_Pwm_Mode_centerAligned = 0, /**< \brief Center aligned mode */
161 Ifx_Pwm_Mode_centerAlignedInverted = 1, /**< \brief Center aligned inverted aligned mode */
162 Ifx_Pwm_Mode_leftAligned = 2, /**< \brief Left aligned mode. The PWM period starts with a rising edge */
163 Ifx_Pwm_Mode_rightAligned = 3, /**< \brief Right aligned mode. The PWM period starts with a falling edge*/
164 Ifx_Pwm_Mode_off = 4, /**< \brief All switch open */
165 Ifx_Pwm_Mode_init = 5, /**< \brief Initialisation mode, do not use at run time */
166 Ifx_Pwm_Mode_count /**< \brief Number of defined modes */
167 } Ifx_Pwm_Mode;
168
169 #ifdef __DCC__
170 #include "Ifx_TypesDcc.h"
171
172 #elif defined(__TASKING__)
173 #include "Ifx_TypesTasking.h"
174
175 #elif defined(__HIGHTEC__)
176 #include "Ifx_TypesGnuc.h"
177
178 #elif defined(__ghs__)
179 #include "Ifx_TypesGhs.h"
180
181 #elif defined(__MSVC__)
182 #include "Ifx_TypesMsvc.h"
183 #else
184 #error Unsupported compiler.
185 #endif
186
187
188 typedef struct
189 {
190 fract real; /**< \brief Real part */
191 fract imag; /**< \brief Imaginary part */
192 } cfract;
193
194 typedef struct
195 {
196 sfract real; /**< \brief Real part */
197 sfract imag; /**< \brief Imaginary part */
198 } csfract;
199
200 #define IFX_PI (3.1415926535897932384626433832795f)
201 #define IFX_TWO_OVER_PI (2.0 / IFX_PI)
202 #define IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)
203 #define IFX_SQRT_TWO (1.4142135623730950488016887242097f)
204 #define IFX_SQRT_THREE (1.7320508075688772935274463415059f)
205 #define IFX_UNUSED_PARAMETER(x) if(x){} /**< \brief Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc) */
206
207 #endif /* IFX_TYPES_H */
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
Ifx_SignedTimerVal
sint32 Ifx_SignedTimerVal
Used in signed timer values.
Definition: Ifx_Types.h:85
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:98
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:59
Ifx_RxSel_e
Definition: Ifx_Types.h:116
Ifx_RxSel_d
Definition: Ifx_Types.h:115
csfract
Definition: Ifx_Types.h:194
Ifx_DataBufferMode
Ifx_DataBufferMode
Definition: Ifx_Types.h:144
Ifx_RxSel_g
Definition: Ifx_Types.h:118
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
Ifx_CircularBuffer::length
uint16 length
buffer length
Definition: Ifx_Types.h:80
Ifx_DataBufferMode_TimeStampSingle::data
uint8 data
Definition: Ifx_Types.h:132
sfract
short sfract
Definition: Ifx_TypesDcc.h:28
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:160
csint32::imag
sint32 imag
Imaginary part.
Definition: Ifx_Types.h:50
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_ParityMode_even
Definition: Ifx_Types.h:104
float32
float float32
Definition: Platform_Types.h:167
Ifx_DataBufferMode_normal
normal mode, each received byte is moved to the rx fifo
Definition: Ifx_Types.h:146
Ifx_RxSel_a
Definition: Ifx_Types.h:112
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
pvoid
void * pvoid
void pointer
Definition: Ifx_Types.h:37
Ifx_DataBufferMode_timeStampSingle
Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items...
Definition: Ifx_Types.h:147
Ifx_CircularBuffer::base
void * base
buffer base address
Definition: Ifx_Types.h:78
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
Ifx_TypesGhs.h
Ifx_Pwm_Mode_count
Number of defined modes.
Definition: Ifx_Types.h:166
Ifx_DataBufferMode_TimeStampSingle
Definition: Ifx_Types.h:129
Ifx_RxSel_h
Definition: Ifx_Types.h:119
cfloat32::imag
float32 imag
Imaginary part.
Definition: Ifx_Types.h:44
Ifx_RxSel_b
Definition: Ifx_Types.h:113
cfloat32
Definition: Ifx_Types.h:41
sint16
short sint16
Definition: Platform_Types.h:126
Ifx_IsrSetting
Definition: Ifx_Types.h:89
fract
long fract
Definition: Ifx_TypesDcc.h:27
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:162
Ifx_IsrSetting::priority
uint16 priority
Definition: Ifx_Types.h:91
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:165
IfxModule_IndexMap::module
volatile void * module
Module address.
Definition: Ifx_Types.h:125
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:43
Ifx_CircularBuffer
Circular buffer definition.
Definition: Ifx_Types.h:76
csfract::real
sfract real
Real part.
Definition: Ifx_Types.h:196
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:164
Ifx_RxSel_c
Definition: Ifx_Types.h:114
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:161
Ifx_DataBufferMode_TimeStampSingle::timestamp
Ifx_TickTime timestamp
Definition: Ifx_Types.h:131
csint16::real
sint16 real
Real part.
Definition: Ifx_Types.h:55
csint32::real
sint32 real
Real part.
Definition: Ifx_Types.h:49
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:163
Ifx_TypesGnuc.h
cfract::real
fract real
Real part.
Definition: Ifx_Types.h:190
sint64
long long sint64
Definition: Platform_Types.h:138
Platform_Types.h
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:87
voidfuncvoid
void(* voidfuncvoid)(void)
void pointer which takes void argument
Definition: Ifx_Types.h:39
cfract::imag
fract imag
Imaginary part.
Definition: Ifx_Types.h:191
Compilers.h
Ifx_RxSel_f
Definition: Ifx_Types.h:117
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
csfract::imag
sfract imag
Imaginary part.
Definition: Ifx_Types.h:197
sint32
long sint32
Definition: Platform_Types.h:131
Ifx_IsrSetting::provider
uint16 provider
Definition: Ifx_Types.h:92
Ifx_TypesDcc.h
csint16
Definition: Ifx_Types.h:53
csint32
Definition: Ifx_Types.h:47
vvoid
volatile void * vvoid
volatile void pointer
Definition: Ifx_Types.h:38
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
Ifx_ParityMode_odd
Definition: Ifx_Types.h:105
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
Ifx_CircularBuffer::index
uint16 index
buffer current index
Definition: Ifx_Types.h:79
IfxModule_IndexMap::index
sint32 index
Module index.
Definition: Ifx_Types.h:126
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx_ParityMode
Ifx_ParityMode
Definition: Ifx_Types.h:102
csint16::imag
sint16 imag
Imaginary part.
Definition: Ifx_Types.h:56
Ifx_TypesTasking.h
cfract
Definition: Ifx_Types.h:188


iLLD_TC26B: Ifx_TypesDcc.h Source File

  • Cpu
  • Std
Ifx_TypesDcc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesDcc.h
3 * \version iLLD_1_0_1_11_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 *
10 * Infineon Technologies AG (Infineon) is supplying this file for use
11 * exclusively with Infineon's microcontroller products. This file can be freely
12 * distributed within development tools that are supporting such microcontroller
13 * products.
14 *
15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
18 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
19 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
20 *
21 */
22 #ifndef IFX_TYPESDDC_H_
23 #define IFX_TYPESDDC_H_
24 /******************************************************************************/
25 #define FRACT_MAX 0x7fffffff
26
27 typedef long fract;
28 typedef short sfract;
29 typedef long long laccum;
30 typedef long __packb; //MSMRK should be struct of four chars
31 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
32 typedef long __packhw; //MSMRK should be struct of two shorts
33 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
34
35 typedef unsigned long long circ_t;
36
37 /******************************************************************************/
38 #endif /* IFX_TYPESDDC_H_ */
__packb
long __packb
Definition: Ifx_TypesDcc.h:30
sfract
short sfract
Definition: Ifx_TypesDcc.h:28
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:33
circ_t
unsigned long long circ_t
Definition: Ifx_TypesDcc.h:35
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:32
fract
long fract
Definition: Ifx_TypesDcc.h:27
laccum
long long laccum
Definition: Ifx_TypesDcc.h:29
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:31


iLLD_TC26B: Ifx_TypesGhs.h Source File

  • Cpu
  • Std
Ifx_TypesGhs.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesGhs.h
3 * \version iLLD_1_0_1_11_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 *
10 * Infineon Technologies AG (Infineon) is supplying this file for use
11 * exclusively with Infineon's microcontroller products. This file can be freely
12 * distributed within development tools that are supporting such microcontroller
13 * products.
14 *
15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
18 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
19 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
20 *
21 */
22 #ifndef IFX_TYPESGHS_H_
23 #define IFX_TYPESGHS_H_
24 /******************************************************************************/
25 #define FRACT_MAX 0x7fffffff
26
27 #define __interrupt(intno)
28
29 typedef long fract;
30 typedef short sfract;
31 typedef long long laccum;
32 typedef long __packb; //MSMRK should be struct of four chars
33 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
34 typedef long __packhw; //MSMRK should be struct of two shorts
35 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
36 /******************************************************************************/
37
38 #endif /* IFX_TYPESGHS_H_ */
sfract
short sfract
Definition: Ifx_TypesGhs.h:30
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesGhs.h:35
__packhw
long __packhw
Definition: Ifx_TypesGhs.h:34
__packb
long __packb
Definition: Ifx_TypesGhs.h:32
laccum
long long laccum
Definition: Ifx_TypesGhs.h:31
fract
long fract
Definition: Ifx_TypesGhs.h:29
__upackb
unsigned long __upackb
Definition: Ifx_TypesGhs.h:33


iLLD_TC26B: Ifx_TypesGnuc.h Source File

  • Cpu
  • Std
Ifx_TypesGnuc.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesGnuc.h
3 * \version iLLD_1_0_1_11_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 *
10 * Infineon Technologies AG (Infineon) is supplying this file for use
11 * exclusively with Infineon's microcontroller products. This file can be freely
12 * distributed within development tools that are supporting such microcontroller
13 * products.
14 *
15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
18 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
19 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
20 *
21 */
22 #ifndef IFX_TYPESGNUC_H_
23 #define IFX_TYPESGNUC_H_
24 /******************************************************************************/
25 #define FRACT_MAX 0x7fffffff
26
27 #include <machine/cint.h>
28 #define __interrupt(intno)
29
30 typedef long fract;
31 typedef short sfract;
32 typedef long long laccum;
33 typedef long __packb; //MSMRK should be struct of four chars
34 typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
35 typedef long __packhw; //MSMRK should be struct of two shorts
36 typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
37 /******************************************************************************/
38
39 #endif /* IFX_TYPESGNUC_H_ */
laccum
long long laccum
Definition: Ifx_TypesGnuc.h:32
__packb
long __packb
Definition: Ifx_TypesGnuc.h:33
__upackb
unsigned long __upackb
Definition: Ifx_TypesGnuc.h:34
sfract
short sfract
Definition: Ifx_TypesGnuc.h:31
__packhw
long __packhw
Definition: Ifx_TypesGnuc.h:35
fract
long fract
Definition: Ifx_TypesGnuc.h:30
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesGnuc.h:36


iLLD_TC26B: Ifx_TypesTasking.h Source File

  • Cpu
  • Std
Ifx_TypesTasking.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_TypesTasking.h
3 * \version iLLD_1_0_1_11_0
4 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 * IMPORTANT NOTICE
8 *
9 *
10 * Infineon Technologies AG (Infineon) is supplying this file for use
11 * exclusively with Infineon's microcontroller products. This file can be freely
12 * distributed within development tools that are supporting such microcontroller
13 * products.
14 *
15 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
16 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
17 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
18 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
19 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
20 *
21 */
22 #ifndef IFX_TYPESTASKING_H_
23 #define IFX_TYPESTASKING_H_
24 /******************************************************************************/
25 #define fract __fract // see http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf
26 #define sfract __sfract // see http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf
27 #define laccum __laccum
28 #define __asm__ __asm
29 /******************************************************************************/
30
31 /******************************************************************************/
32
33 #endif /* IFX_TYPESTASKING_H_ */


iLLD_TC26B: Ifx_WndF32.h Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32.h
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32.h
3 * \brief Windowing function
4 * \ingroup library_srvsw_sysse_math_f32_wnd
5 *
6 *
7 *
8 * \version disabled
9 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
10 *
11 *
12 * IMPORTANT NOTICE
13 *
14 *
15 * Infineon Technologies AG (Infineon) is supplying this file for use
16 * exclusively with Infineon's microcontroller products. This file can be freely
17 * distributed within development tools that are supporting such microcontroller
18 * products.
19 *
20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
23 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
24 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
25 *
26 * \defgroup library_srvsw_sysse_math_f32_wnd Window functions
27 * \ingroup library_srvsw_sysse_math_f32
28 */
29
30 #ifndef IFX_WNDF32_H
31 #define IFX_WNDF32_H
32
33 #include "Ifx_Cf32.h"
34
35 #define IFX_WNDF32_TABLE_LENGTH (1024)
36
37 /** \addtogroup library_srvsw_sysse_math_f32_wnd
38 * \{ */
39
40 IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH / 2];
41 IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH / 2];
42
43 /** \brief Apply a window to complex array x which has nX length.
44 *
45 * Example: Ifx_WndF32_apply(x, Ifx_g_WndF32_hannTable, 1024); */
46 IFX_INLINE void Ifx_WndF32_apply(cfloat32 *x, CONST_CFG float32 *window, short nX)
47 {
48 VecWin_f32(&x->real, window, nX, IFX_WNDF32_TABLE_LENGTH, 2, 1);
49 }
50
51
52 /** \} */
53
54 #endif /* IFX_WNDF32_H */
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:35
Ifx_g_WndF32_hannTable
IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_hannTable[IFX_WNDF32_TABLE_LENGTH/2]
Definition: Ifx_WndF32.h:40
VecWin_f32
void VecWin_f32(float32 *X, const float32 *W, short nX, short nW, short incrX, short symW)
Definition: Ifx_Cf32.c:268
float32
float float32
Definition: Platform_Types.h:167
Ifx_g_WndF32_blackmanHarrisTable
IFX_EXTERN CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[IFX_WNDF32_TABLE_LENGTH/2]
Definition: Ifx_WndF32.h:41
cfloat32
Definition: Ifx_Types.h:41
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
cfloat32::real
float32 real
Real part.
Definition: Ifx_Types.h:43
Ifx_Cf32.h
Floating point signal, vector, and matrix library.
Ifx_WndF32_apply
IFX_INLINE void Ifx_WndF32_apply(cfloat32 *x, CONST_CFG float32 *window, short nX)
Apply a window to complex array x which has nX length.
Definition: Ifx_WndF32.h:46
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:40


iLLD_TC26B: Ifx_WndF32_BlackmanHarrisTable.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32_BlackmanHarrisTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32_BlackmanHarrisTable.c
3 * \brief Lookup table for Blackman-Harris window function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "Ifx_WndF32.h"
27
28 #if IFX_WNDF32_TABLE_LENGTH != 1024
29 #error This was generated with IFX_WNDF32_TABLE_LENGTH = 1024. Please regenerate.
30 #endif
31
32 CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH / 2)] = {
33 _DATAF(0.000060000000000001),
34 _DATAF(6.05336435769415E-05),
35 _DATAF(6.21351621010909E-05),
36 _DATAF(6.48063189517042E-05),
37 _DATAF(6.85500530901977E-05),
38 _DATAF(7.33704790552552E-05),
39 _DATAF(7.92728869546643E-05),
40 _DATAF(8.62637424542366E-05),
41 _DATAF(9.43506867646833E-05),
42 _DATAF(0.000103542536623254),
43 _DATAF(0.000113849284272844),
44 _DATAF(0.00012528209743509),
45 _DATAF(0.000137853319279022),
46 _DATAF(0.000151576468382483),
47 _DATAF(0.000166466238687386),
48 _DATAF(0.000182538499446352),
49 _DATAF(0.000199810295160321),
50 _DATAF(0.000218299845506252),
51 _DATAF(0.000238026545253333),
52 _DATAF(0.000259010964166398),
53 _DATAF(0.000281274846895671),
54 _DATAF(0.000304841112851225),
55 _DATAF(0.000329733856060103),
56 _DATAF(0.000355978345005534),
57 _DATAF(0.000383601022445701),
58 _DATAF(0.00041262950521132),
59 _DATAF(0.000443092583978778),
60 _DATAF(0.000475020223018621),
61 _DATAF(0.000508443559916298),
62 _DATAF(0.000543394905263906),
63 _DATAF(0.000579907742319714),
64 _DATAF(0.000618016726635444),
65 _DATAF(0.000657757685646449),
66 _DATAF(0.000699167618224639),
67 _DATAF(0.000742284694190907),
68 _DATAF(0.000787148253784491),
69 _DATAF(0.000833798807087666),
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71 _DATAF(0.000932628780575385),
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73 _DATAF(0.00103912206720055),
74 _DATAF(0.00109535613825471),
75 _DATAF(0.00115364479162906),
76 _DATAF(0.00121403670584417),
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81 _DATAF(0.00154933030452976),
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91 _DATAF(0.00240895689015029),
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96 _DATAF(0.00294878040713723),
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98 _DATAF(0.00318795176743033),
99 _DATAF(0.00331281113774309),
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103 _DATAF(0.00384919539927517),
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203 _DATAF(0.0550998401785474),
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518 _DATAF(0.984762200807557),
519 _DATAF(0.985883178364764),
520 _DATAF(0.986962145382792),
521 _DATAF(0.987998972920675),
522 _DATAF(0.988993537007913),
523 _DATAF(0.989945718667196),
524 _DATAF(0.990855403936222),
525 _DATAF(0.991722483888599),
526 _DATAF(0.992546854653837),
527 _DATAF(0.993328417436418),
528 _DATAF(0.994067078533934),
529 _DATAF(0.994762749354304),
530 _DATAF(0.995415346432055),
531 _DATAF(0.996024791443661),
532 _DATAF(0.996591011221945),
533 _DATAF(0.997113937769534),
534 _DATAF(0.997593508271372),
535 _DATAF(0.998029665106271),
536 _DATAF(0.99842235585752),
537 _DATAF(0.998771533322532),
538 _DATAF(0.999077155521532),
539 _DATAF(0.99933918570529),
540 _DATAF(0.999557592361884),
541 _DATAF(0.999732349222509),
542 _DATAF(0.999863435266309),
543 _DATAF(0.999950834724255),
544 _DATAF(0.999994537082046),
545 };
Ifx_WndF32.h
Windowing function.
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:35
float32
float float32
Definition: Platform_Types.h:167
Ifx_g_WndF32_blackmanHarrisTable
CONST_CFG float32 Ifx_g_WndF32_blackmanHarrisTable[(IFX_WNDF32_TABLE_LENGTH/2)]
Definition: Ifx_WndF32_BlackmanHarrisTable.c:32
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:40
_DATAF
#define _DATAF(val)
Definition: Ifx_Cf32.h:34


iLLD_TC26B: Ifx_WndF32_HannTable.c Source File

  • Service
  • CpuGeneric
  • SysSe
  • Math
Ifx_WndF32_HannTable.c
Go to the documentation of this file.
1 /**
2 * \file Ifx_WndF32_HannTable.c
3 * \brief Lookup table for Hann window function
4 *
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "Ifx_WndF32.h"
27
28 #if IFX_WNDF32_TABLE_LENGTH != 1024
29 #error This was generated with IFX_WNDF32_TABLE_LENGTH = 1024. Please regenerate.
30 #endif
31
32 CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH / 2)] = {
33 _DATAF(0.00000000000000000000),
34 _DATAF(0.00000943076884141192),
35 _DATAF(0.00003772272248170339),
36 _DATAF(0.00008487478771712631),
37 _DATAF(0.00015088518557604402),
38 _DATAF(0.00023575144587084651),
39 _DATAF(0.00033947033807635307),
40 _DATAF(0.00046203794772736728),
41 _DATAF(0.00060344970552250743),
42 _DATAF(0.00076370022725313902),
43 _DATAF(0.00094278343021869659),
44 _DATAF(0.00114069262053817510),
45 _DATAF(0.00135742034763097760),
46 _DATAF(0.00159295846242457630),
47 _DATAF(0.00184729788452386860),
48 _DATAF(0.00212042918428778650),
49 _DATAF(0.00241234223358333110),
50 _DATAF(0.00272302562370896340),
51 _DATAF(0.00305246794596314430),
52 _DATAF(0.00340065662749111650),
53 _DATAF(0.00376757839694619180),
54 _DATAF(0.00415321951732039450),
55 _DATAF(0.00455756578594446180),
56 _DATAF(0.00498060183599591260),
57 _DATAF(0.00542231136932969090),
58 _DATAF(0.00588267762213945390),
59 _DATAF(0.00636168383061885830),
60 _DATAF(0.00685931136831641200),
61 _DATAF(0.00737554160878062250),
62 _DATAF(0.00791035499423742290),
63 _DATAF(0.00846373196691274640),
64 _DATAF(0.00903565157204866410),
65 _DATAF(0.00962609145790338520),
66 _DATAF(0.01023502927273511900),
67 _DATAF(0.01086244266480207400),
68 _DATAF(0.01150830835103988600),
69 _DATAF(0.01217260118573904000),
70 _DATAF(0.01285529602319002200),
71 _DATAF(0.01355636864900589000),
72 _DATAF(0.01427579019218683200),
73 _DATAF(0.01501353550702333500),
74 _DATAF(0.01576957479119300800),
75 _DATAF(0.01654388196766376500),
76 _DATAF(0.01733642630279064200),
77 _DATAF(0.01814717799425125100),
78 _DATAF(0.01897610723972320600),
79 _DATAF(0.01982318051159381900),
80 _DATAF(0.02068836987018585200),
81 _DATAF(0.02157163806259632100),
82 _DATAF(0.02247295528650283800),
83 _DATAF(0.02339228615164756800),
84 _DATAF(0.02432959713041782400),
85 _DATAF(0.02528485096991062200),
86 _DATAF(0.02625801227986812600),
87 _DATAF(0.02724904380738735200),
88 _DATAF(0.02825791016221046400),
89 _DATAF(0.02928457222878933000),
90 _DATAF(0.03032899089157581300),
91 _DATAF(0.03139112517237663300),
92 _DATAF(0.03247094154357910200),
93 _DATAF(0.03356838971376419100),
94 _DATAF(0.03468343615531921400),
95 _DATAF(0.03581603243947029100),
96 _DATAF(0.03696614131331443800),
97 _DATAF(0.03813371807336807300),
98 _DATAF(0.03931871801614761400),
99 _DATAF(0.04052109271287918100),
100 _DATAF(0.04174080491065979000),
101 _DATAF(0.04297780245542526200),
102 _DATAF(0.04423204064369201700),
103 _DATAF(0.04550346732139587400),
104 _DATAF(0.04679204523563385000),
105 _DATAF(0.04809771478176116900),
106 _DATAF(0.04942043498158454900),
107 _DATAF(0.05076014995574951200),
108 _DATAF(0.05211681500077247600),
109 _DATAF(0.05349037423729896500),
110 _DATAF(0.05488077551126480100),
111 _DATAF(0.05628796666860580400),
112 _DATAF(0.05771189928054809600),
113 _DATAF(0.05915251374244689900),
114 _DATAF(0.06060976162552833600),
115 _DATAF(0.06208358332514762900),
116 _DATAF(0.06357392668724060100),
117 _DATAF(0.06508072465658187900),
118 _DATAF(0.06660393625497818000),
119 _DATAF(0.06814350187778472900),
120 _DATAF(0.06969934701919555700),
121 _DATAF(0.07127143442630767800),
122 _DATAF(0.07285968959331512500),
123 _DATAF(0.07446406036615371700),
124 _DATAF(0.07608447968959808300),
125 _DATAF(0.07772088795900344800),
126 _DATAF(0.07937323302030563400),
127 _DATAF(0.08104144036769866900),
128 _DATAF(0.08272545784711837800),
129 _DATAF(0.08442521095275878900),
130 _DATAF(0.08614064753055572500),
131 _DATAF(0.08787168562412262000),
132 _DATAF(0.08961828052997589100),
133 _DATAF(0.09138035029172897300),
134 _DATAF(0.09315783530473709100),
135 _DATAF(0.09495066851377487200),
136 _DATAF(0.09675878286361694300),
137 _DATAF(0.09858211129903793300),
138 _DATAF(0.10042057186365128000),
139 _DATAF(0.10227411240339279000),
140 _DATAF(0.10414265841245651000),
141 _DATAF(0.10602613538503647000),
142 _DATAF(0.10792447626590729000),
143 _DATAF(0.10983760654926300000),
144 _DATAF(0.11176545172929764000),
145 _DATAF(0.11370794475078583000),
146 _DATAF(0.11566501110792160000),
147 _DATAF(0.11763656884431839000),
148 _DATAF(0.11962255835533142000),
149 _DATAF(0.12162289768457413000),
150 _DATAF(0.12363750487565994000),
151 _DATAF(0.12566630542278290000),
152 _DATAF(0.12770923972129822000),
153 _DATAF(0.12976621091365814000),
154 _DATAF(0.13183714449405670000),
155 _DATAF(0.13392198085784912000),
156 _DATAF(0.13602061569690704000),
157 _DATAF(0.13813297450542450000),
158 _DATAF(0.14025899767875671000),
159 _DATAF(0.14239858090877533000),
160 _DATAF(0.14455166459083557000),
161 _DATAF(0.14671814441680908000),
162 _DATAF(0.14889796078205109000),
163 _DATAF(0.15109102427959442000),
164 _DATAF(0.15329724550247192000),
165 _DATAF(0.15551653504371643000),
166 _DATAF(0.15774883329868317000),
167 _DATAF(0.15999403595924377000),
168 _DATAF(0.16225206851959229000),
169 _DATAF(0.16452284157276154000),
170 _DATAF(0.16680626571178436000),
171 _DATAF(0.16910226643085480000),
172 _DATAF(0.17141073942184448000),
173 _DATAF(0.17373161017894745000),
174 _DATAF(0.17606478929519653000),
175 _DATAF(0.17841020226478577000),
176 _DATAF(0.18076772987842560000),
177 _DATAF(0.18313729763031006000),
178 _DATAF(0.18551883101463318000),
179 _DATAF(0.18791222572326660000),
180 _DATAF(0.19031739234924316000),
181 _DATAF(0.19273422658443451000),
182 _DATAF(0.19516266882419586000),
183 _DATAF(0.19760259985923767000),
184 _DATAF(0.20005394518375397000),
185 _DATAF(0.20251661539077759000),
186 _DATAF(0.20499049127101898000),
187 _DATAF(0.20747549831867218000),
188 _DATAF(0.20997154712677002000),
189 _DATAF(0.21247853338718414000),
190 _DATAF(0.21499636769294739000),
191 _DATAF(0.21752494573593140000),
192 _DATAF(0.22006417810916901000),
193 _DATAF(0.22261397540569305000),
194 _DATAF(0.22517424821853638000),
195 _DATAF(0.22774487733840942000),
196 _DATAF(0.23032577335834503000),
197 _DATAF(0.23291684687137604000),
198 _DATAF(0.23551799356937408000),
199 _DATAF(0.23812912404537201000),
200 _DATAF(0.24075011909008026000),
201 _DATAF(0.24338090419769287000),
202 _DATAF(0.24602137506008148000),
203 _DATAF(0.24867141246795654000),
204 _DATAF(0.25133094191551208000),
205 _DATAF(0.25399985909461975000),
206 _DATAF(0.25667804479598999000),
207 _DATAF(0.25936540961265564000),
208 _DATAF(0.26206183433532715000),
209 _DATAF(0.26476725935935974000),
210 _DATAF(0.26748156547546387000),
211 _DATAF(0.27020460367202759000),
212 _DATAF(0.27293634414672852000),
213 _DATAF(0.27567663788795471000),
214 _DATAF(0.27842539548873901000),
215 _DATAF(0.28118252754211426000),
216 _DATAF(0.28394788503646851000),
217 _DATAF(0.28672140836715698000),
218 _DATAF(0.28950297832489014000),
219 _DATAF(0.29229250550270081000),
220 _DATAF(0.29508984088897705000),
221 _DATAF(0.29789492487907410000),
222 _DATAF(0.30070760846138000000),
223 _DATAF(0.30352783203125000000),
224 _DATAF(0.30635544657707214000),
225 _DATAF(0.30919039249420166000),
226 _DATAF(0.31203252077102661000),
227 _DATAF(0.31488174200057983000),
228 _DATAF(0.31773793697357178000),
229 _DATAF(0.32060101628303528000),
230 _DATAF(0.32347086071968079000),
231 _DATAF(0.32634738087654114000),
232 _DATAF(0.32923042774200439000),
233 _DATAF(0.33211994171142578000),
234 _DATAF(0.33501577377319336000),
235 _DATAF(0.33791780471801758000),
236 _DATAF(0.34082597494125366000),
237 _DATAF(0.34374016523361206000),
238 _DATAF(0.34666022658348083000),
239 _DATAF(0.34958606958389282000),
240 _DATAF(0.35251760482788086000),
241 _DATAF(0.35545471310615540000),
242 _DATAF(0.35839724540710449000),
243 _DATAF(0.36134514212608337000),
244 _DATAF(0.36429825425148010000),
245 _DATAF(0.36725649237632751000),
246 _DATAF(0.37021973729133606000),
247 _DATAF(0.37318786978721619000),
248 _DATAF(0.37616080045700073000),
249 _DATAF(0.37913838028907776000),
250 _DATAF(0.38212051987648010000),
251 _DATAF(0.38510712981224060000),
252 _DATAF(0.38809806108474731000),
253 _DATAF(0.39109322428703308000),
254 _DATAF(0.39409247040748596000),
255 _DATAF(0.39709573984146118000),
256 _DATAF(0.40010288357734680000),
257 _DATAF(0.40311378240585327000),
258 _DATAF(0.40612834692001343000),
259 _DATAF(0.40914645791053772000),
260 _DATAF(0.41216799616813660000),
261 _DATAF(0.41519284248352051000),
262 _DATAF(0.41822087764739990000),
263 _DATAF(0.42125201225280762000),
264 _DATAF(0.42428609728813171000),
265 _DATAF(0.42732307314872742000),
266 _DATAF(0.43036276102066040000),
267 _DATAF(0.43340510129928589000),
268 _DATAF(0.43644991517066956000),
269 _DATAF(0.43949717283248901000),
270 _DATAF(0.44254666566848755000),
271 _DATAF(0.44559836387634277000),
272 _DATAF(0.44865208864212036000),
273 _DATAF(0.45170778036117554000),
274 _DATAF(0.45476526021957397000),
275 _DATAF(0.45782446861267090000),
276 _DATAF(0.46088525652885437000),
277 _DATAF(0.46394753456115723000),
278 _DATAF(0.46701115369796753000),
279 _DATAF(0.47007602453231812000),
280 _DATAF(0.47314202785491943000),
281 _DATAF(0.47620904445648193000),
282 _DATAF(0.47927695512771606000),
283 _DATAF(0.48234564065933228000),
284 _DATAF(0.48541501164436340000),
285 _DATAF(0.48848491907119751000),
286 _DATAF(0.49155527353286743000),
287 _DATAF(0.49462592601776123000),
288 _DATAF(0.49769678711891174000),
289 _DATAF(0.50076776742935181000),
290 _DATAF(0.50383865833282471000),
291 _DATAF(0.50690943002700806000),
292 _DATAF(0.50997996330261230000),
293 _DATAF(0.51305007934570313000),
294 _DATAF(0.51611977815628052000),
295 _DATAF(0.51918876171112061000),
296 _DATAF(0.52225708961486816000),
297 _DATAF(0.52532458305358887000),
298 _DATAF(0.52839112281799316000),
299 _DATAF(0.53145653009414673000),
300 _DATAF(0.53452080488204956000),
301 _DATAF(0.53758376836776733000),
302 _DATAF(0.54064530134201050000),
303 _DATAF(0.54370534420013428000),
304 _DATAF(0.54676371812820435000),
305 _DATAF(0.54982030391693115000),
306 _DATAF(0.55287504196166992000),
307 _DATAF(0.55592775344848633000),
308 _DATAF(0.55897837877273560000),
309 _DATAF(0.56202673912048340000),
310 _DATAF(0.56507277488708496000),
311 _DATAF(0.56811636686325073000),
312 _DATAF(0.57115739583969116000),
313 _DATAF(0.57419574260711670000),
314 _DATAF(0.57723128795623779000),
315 _DATAF(0.58026391267776489000),
316 _DATAF(0.58329355716705322000),
317 _DATAF(0.58631998300552368000),
318 _DATAF(0.58934319019317627000),
319 _DATAF(0.59236299991607666000),
320 _DATAF(0.59537935256958008000),
321 _DATAF(0.59839212894439697000),
322 _DATAF(0.60140115022659302000),
323 _DATAF(0.60440635681152344000),
324 _DATAF(0.60740762948989868000),
325 _DATAF(0.61040484905242920000),
326 _DATAF(0.61339795589447021000),
327 _DATAF(0.61638671159744263000),
328 _DATAF(0.61937111616134644000),
329 _DATAF(0.62235099077224731000),
330 _DATAF(0.62532627582550049000),
331 _DATAF(0.62829679250717163000),
332 _DATAF(0.63126254081726074000),
333 _DATAF(0.63422328233718872000),
334 _DATAF(0.63717895746231079000),
335 _DATAF(0.64012944698333740000),
336 _DATAF(0.64307469129562378000),
337 _DATAF(0.64601451158523560000),
338 _DATAF(0.64894884824752808000),
339 _DATAF(0.65187758207321167000),
340 _DATAF(0.65480053424835205000),
341 _DATAF(0.65771764516830444000),
342 _DATAF(0.66062885522842407000),
343 _DATAF(0.66353398561477661000),
344 _DATAF(0.66643291711807251000),
345 _DATAF(0.66932559013366699000),
346 _DATAF(0.67221188545227051000),
347 _DATAF(0.67509168386459351000),
348 _DATAF(0.67796486616134644000),
349 _DATAF(0.68083137273788452000),
350 _DATAF(0.68369102478027344000),
351 _DATAF(0.68654376268386841000),
352 _DATAF(0.68938946723937988000),
353 _DATAF(0.69222795963287354000),
354 _DATAF(0.69505929946899414000),
355 _DATAF(0.69788318872451782000),
356 _DATAF(0.70069968700408936000),
357 _DATAF(0.70350855588912964000),
358 _DATAF(0.70630979537963867000),
359 _DATAF(0.70910322666168213000),
360 _DATAF(0.71188879013061523000),
361 _DATAF(0.71466636657714844000),
362 _DATAF(0.71743583679199219000),
363 _DATAF(0.72019708156585693000),
364 _DATAF(0.72295004129409790000),
365 _DATAF(0.72569459676742554000),
366 _DATAF(0.72843056917190552000),
367 _DATAF(0.73115801811218262000),
368 _DATAF(0.73387670516967773000),
369 _DATAF(0.73658657073974609000),
370 _DATAF(0.73928749561309814000),
371 _DATAF(0.74197942018508911000),
372 _DATAF(0.74466222524642944000),
373 _DATAF(0.74733579158782959000),
374 _DATAF(0.75000000000000000000),
375 _DATAF(0.75265479087829590000),
376 _DATAF(0.75530004501342773000),
377 _DATAF(0.75793570280075073000),
378 _DATAF(0.76056158542633057000),
379 _DATAF(0.76317769289016724000),
380 _DATAF(0.76578384637832642000),
381 _DATAF(0.76837992668151855000),
382 _DATAF(0.77096593379974365000),
383 _DATAF(0.77354174852371216000),
384 _DATAF(0.77610719203948975000),
385 _DATAF(0.77866220474243164000),
386 _DATAF(0.78120678663253784000),
387 _DATAF(0.78374069929122925000),
388 _DATAF(0.78626388311386108000),
389 _DATAF(0.78877633810043335000),
390 _DATAF(0.79127782583236694000),
391 _DATAF(0.79376840591430664000),
392 _DATAF(0.79624783992767334000),
393 _DATAF(0.79871612787246704000),
394 _DATAF(0.80117315053939819000),
395 _DATAF(0.80361878871917725000),
396 _DATAF(0.80605298280715942000),
397 _DATAF(0.80847567319869995000),
398 _DATAF(0.81088668107986450000),
399 _DATAF(0.81328594684600830000),
400 _DATAF(0.81567341089248657000),
401 _DATAF(0.81804895401000977000),
402 _DATAF(0.82041257619857788000),
403 _DATAF(0.82276403903961182000),
404 _DATAF(0.82510334253311157000),
405 _DATAF(0.82743036746978760000),
406 _DATAF(0.82974505424499512000),
407 _DATAF(0.83204728364944458000),
408 _DATAF(0.83433699607849121000),
409 _DATAF(0.83661413192749023000),
410 _DATAF(0.83887857198715210000),
411 _DATAF(0.84113019704818726000),
412 _DATAF(0.84336894750595093000),
413 _DATAF(0.84559476375579834000),
414 _DATAF(0.84780752658843994000),
415 _DATAF(0.85000717639923096000),
416 _DATAF(0.85219359397888184000),
417 _DATAF(0.85436677932739258000),
418 _DATAF(0.85652655363082886000),
419 _DATAF(0.85867291688919067000),
420 _DATAF(0.86080569028854370000),
421 _DATAF(0.86292493343353271000),
422 _DATAF(0.86503040790557861000),
423 _DATAF(0.86712217330932617000),
424 _DATAF(0.86920005083084106000),
425 _DATAF(0.87126404047012329000),
426 _DATAF(0.87331396341323853000),
427 _DATAF(0.87534987926483154000),
428 _DATAF(0.87737154960632324000),
429 _DATAF(0.87937903404235840000),
430 _DATAF(0.88137221336364746000),
431 _DATAF(0.88335102796554565000),
432 _DATAF(0.88531535863876343000),
433 _DATAF(0.88726514577865601000),
434 _DATAF(0.88920032978057861000),
435 _DATAF(0.89112079143524170000),
436 _DATAF(0.89302653074264526000),
437 _DATAF(0.89491748809814453000),
438 _DATAF(0.89679348468780518000),
439 _DATAF(0.89865452051162720000),
440 _DATAF(0.90050053596496582000),
441 _DATAF(0.90233147144317627000),
442 _DATAF(0.90414720773696899000),
443 _DATAF(0.90594768524169922000),
444 _DATAF(0.90773284435272217000),
445 _DATAF(0.90950262546539307000),
446 _DATAF(0.91125696897506714000),
447 _DATAF(0.91299575567245483000),
448 _DATAF(0.91471904516220093000),
449 _DATAF(0.91642659902572632000),
450 _DATAF(0.91811853647232056000),
451 _DATAF(0.91979461908340454000),
452 _DATAF(0.92145490646362305000),
453 _DATAF(0.92309933900833130000),
454 _DATAF(0.92472773790359497000),
455 _DATAF(0.92634016275405884000),
456 _DATAF(0.92793643474578857000),
457 _DATAF(0.92951661348342896000),
458 _DATAF(0.93108057975769043000),
459 _DATAF(0.93262833356857300000),
460 _DATAF(0.93415969610214233000),
461 _DATAF(0.93567472696304321000),
462 _DATAF(0.93717330694198608000),
463 _DATAF(0.93865537643432617000),
464 _DATAF(0.94012093544006348000),
465 _DATAF(0.94156986474990845000),
466 _DATAF(0.94300216436386108000),
467 _DATAF(0.94441771507263184000),
468 _DATAF(0.94581651687622070000),
469 _DATAF(0.94719851016998291000),
470 _DATAF(0.94856363534927368000),
471 _DATAF(0.94991183280944824000),
472 _DATAF(0.95124304294586182000),
473 _DATAF(0.95255726575851440000),
474 _DATAF(0.95385438203811646000),
475 _DATAF(0.95513439178466797000),
476 _DATAF(0.95639723539352417000),
477 _DATAF(0.95764285326004028000),
478 _DATAF(0.95887118577957153000),
479 _DATAF(0.96008229255676270000),
480 _DATAF(0.96127593517303467000),
481 _DATAF(0.96245223283767700000),
482 _DATAF(0.96361112594604492000),
483 _DATAF(0.96475243568420410000),
484 _DATAF(0.96587628126144409000),
485 _DATAF(0.96698254346847534000),
486 _DATAF(0.96807116270065308000),
487 _DATAF(0.96914213895797729000),
488 _DATAF(0.97019541263580322000),
489 _DATAF(0.97123098373413086000),
490 _DATAF(0.97224873304367065000),
491 _DATAF(0.97324872016906738000),
492 _DATAF(0.97423082590103149000),
493 _DATAF(0.97519499063491821000),
494 _DATAF(0.97614127397537231000),
495 _DATAF(0.97706961631774902000),
496 _DATAF(0.97797995805740356000),
497 _DATAF(0.97887223958969116000),
498 _DATAF(0.97974646091461182000),
499 _DATAF(0.98060262203216553000),
500 _DATAF(0.98144060373306274000),
501 _DATAF(0.98226046562194824000),
502 _DATAF(0.98306214809417725000),
503 _DATAF(0.98384553194046021000),
504 _DATAF(0.98461073637008667000),
505 _DATAF(0.98535764217376709000),
506 _DATAF(0.98608618974685669000),
507 _DATAF(0.98679643869400024000),
508 _DATAF(0.98748832941055298000),
509 _DATAF(0.98816186189651489000),
510 _DATAF(0.98881691694259644000),
511 _DATAF(0.98945355415344238000),
512 _DATAF(0.99007177352905273000),
513 _DATAF(0.99067145586013794000),
514 _DATAF(0.99125260114669800000),
515 _DATAF(0.99181526899337769000),
516 _DATAF(0.99235939979553223000),
517 _DATAF(0.99288487434387207000),
518 _DATAF(0.99339181184768677000),
519 _DATAF(0.99388015270233154000),
520 _DATAF(0.99434983730316162000),
521 _DATAF(0.99480086565017700000),
522 _DATAF(0.99523323774337769000),
523 _DATAF(0.99564695358276367000),
524 _DATAF(0.99604195356369019000),
525 _DATAF(0.99641823768615723000),
526 _DATAF(0.99677580595016479000),
527 _DATAF(0.99711459875106812000),
528 _DATAF(0.99743467569351196000),
529 _DATAF(0.99773597717285156000),
530 _DATAF(0.99801850318908691000),
531 _DATAF(0.99828219413757324000),
532 _DATAF(0.99852716922760010000),
533 _DATAF(0.99875330924987793000),
534 _DATAF(0.99896061420440674000),
535 _DATAF(0.99914908409118652000),
536 _DATAF(0.99931877851486206000),
537 _DATAF(0.99946963787078857000),
538 _DATAF(0.99960160255432129000),
539 _DATAF(0.99971473217010498000),
540 _DATAF(0.99980902671813965000),
541 _DATAF(0.99988448619842529000),
542 _DATAF(0.99994105100631714000),
543 _DATAF(0.99997878074645996000),
544 _DATAF(0.99999761581420898000),
545 };
Ifx_WndF32.h
Windowing function.
IFX_WNDF32_TABLE_LENGTH
#define IFX_WNDF32_TABLE_LENGTH
Definition: Ifx_WndF32.h:35
float32
float float32
Definition: Platform_Types.h:167
CONST_CFG
#define CONST_CFG
Definition: Compilers.h:40
Ifx_g_WndF32_hannTable
CONST_CFG float32 Ifx_g_WndF32_hannTable[(IFX_WNDF32_TABLE_LENGTH/2)]
Definition: Ifx_WndF32_HannTable.c:32
_DATAF
#define _DATAF(val)
Definition: Ifx_Cf32.h:34


iLLD_TC26B: IfxAsclin.c Source File

  • Asclin
  • Std
IfxAsclin.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin.c
3 * \brief ASCLIN basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxAsclin.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
36 {
37 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
38 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection*/
39 IfxAsclin_setDisableModuleRequest(asclin); /* disables the module*/
40 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on*/
41 }
42
43
44 void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
45 {
46 IfxAsclin_enableParityErrorFlag(asclin, parEnable); /* enables parity error*/
47 IfxAsclin_enableRxFifoOverflowFlag(asclin, rfoEnable); /* enables Rx fifo Overflow error*/
48 }
49
50
51 void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
52 {
53 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
54 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection*/
55 IfxAsclin_setEnableModuleRequest(asclin); /* enables the module*/
56 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on*/
57 }
58
59
60 Ifx_ASCLIN *IfxAsclin_getAddress(IfxAsclin_Index asclin)
61 {
62 Ifx_ASCLIN *module;
63
64 if (asclin < IFXASCLIN_NUM_MODULES)
65 {
66 module = (Ifx_ASCLIN *)IfxAsclin_cfg_indexMap[asclin].module;
67 }
68 else
69 {
70 module = NULL_PTR;
71 }
72
73 return module;
74 }
75
76
77 float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
78 {
79 float32 frequency;
80 IfxAsclin_ClockSource clockSource = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin); /* gets the current clock source*/
81
82 switch (clockSource)
83 {
84 case IfxAsclin_ClockSource_noClock: /* gets the respective frequency*/
85 frequency = 0.0;
86 break;
87 case IfxAsclin_ClockSource_kernelClock:
88 frequency = IfxScuCcu_getSpbFrequency();
89 break;
90 case IfxAsclin_ClockSource_oscillatorClock:
91 frequency = IfxScuCcu_getOsc0Frequency();
92 break;
93 case IfxAsclin_ClockSource_flexRayClock:
94 frequency = IfxScuCcu_getPllErayFrequency();
95 break;
96 case IfxAsclin_ClockSource_ascFastClock:
97 frequency = IfxScuCcu_getBaud2Frequency();
98 break;
99 case IfxAsclin_ClockSource_ascSlowClock:
100 frequency = IfxScuCcu_getBaud1Frequency();
101 break;
102 default:
103 frequency = 0.0;
104 break;
105 }
106
107 return frequency;
108 }
109
110
111 IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
112 {
113 uint32 index;
114 IfxAsclin_Index result;
115
116 result = IfxAsclin_Index_none;
117
118 for (index = 0; index < IFXASCLIN_NUM_MODULES; index++)
119 {
120 if (IfxAsclin_cfg_indexMap[index].module == asclin)
121 {
122 result = (IfxAsclin_Index)IfxAsclin_cfg_indexMap[index].index;
123 break;
124 }
125 }
126
127 return result;
128 }
129
130
131 float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
132 {
133 return (IfxAsclin_getPdFrequency(asclin) * asclin->BRG.B.NUMERATOR) / asclin->BRG.B.DENOMINATOR;
134 }
135
136
137 float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
138 {
139 return IfxAsclin_getFaFrequency(asclin) / (asclin->BITCON.B.PRESCALER + 1);
140 }
141
142
143 float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
144 {
145 return IfxAsclin_getOvsFrequency(asclin) / asclin->BITCON.B.OVERSAMPLING;
146 }
147
148
149 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
150 {
151 return (volatile Ifx_SRC_SRCR *)(&MODULE_SRC.ASCLIN.ASCLIN[IfxAsclin_getIndex(asclin)].ERR);
152 }
153
154
155 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
156 {
157 return (volatile Ifx_SRC_SRCR *)(&MODULE_SRC.ASCLIN.ASCLIN[IfxAsclin_getIndex(asclin)].RX);
158 }
159
160
161 volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
162 {
163 return (volatile Ifx_SRC_SRCR *)(&MODULE_SRC.ASCLIN.ASCLIN[IfxAsclin_getIndex(asclin)].TX);
164 }
165
166
167 uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
168 {
169 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
170
171 while (count > 0)
172 {
173 *data++ = (uint16)rxData->U;
174 count--;
175 }
176
177 return count;
178 }
179
180
181 uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
182 {
183 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
184
185 while (count > 0)
186 {
187 *data++ = rxData->U;
188 count--;
189 }
190
191 return count;
192 }
193
194
195 uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
196 {
197 volatile Ifx_ASCLIN_RXDATA *rxData = (volatile Ifx_ASCLIN_RXDATA *)&asclin->RXDATA.U;
198
199 while (count > 0)
200 {
201 *data++ = (uint8)rxData->U;
202 count--;
203 }
204
205 return count;
206 }
207
208
209 void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
210 {
211 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
212 IfxScuWdt_clearCpuEndinit(passwd);
213
214 asclin->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
215 asclin->KRST1.B.RST = 1;
216 IfxScuWdt_setCpuEndinit(passwd);
217
218 while (0 == asclin->KRST0.B.RSTSTAT) /* Wait until reset is executed */
219 {}
220
221 IfxScuWdt_clearCpuEndinit(passwd);
222 asclin->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
223
224 IfxScuWdt_setCpuEndinit(passwd);
225 }
226
227
228 void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
229 {
230 IfxAsclin_ClockSource clockSource = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin); /* gets the current clock source */
231 IfxAsclin_setClockSource(asclin, IfxAsclin_ClockSource_noClock); /* turns off the clock for settings */
232 IfxAsclin_setPrescaler(asclin, prescaler); /* sets the prescaler*/
233 IfxAsclin_setNumerator(asclin, numerator); /* sets the numerator*/
234 IfxAsclin_setDenominator(asclin, denominator); /* sets the denominator*/
235 IfxAsclin_setOversampling(asclin, oversampling); /* sets the oversampling*/
236 IfxAsclin_setClockSource(asclin, clockSource); /* sets the clock source back on*/
237 }
238
239
240 boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
241 {
242 IfxAsclin_ClockSource source = (IfxAsclin_ClockSource)IfxAsclin_getClockSource(asclin);
243 float32 fOvs;
244 uint32 d = 0, n, dBest = 1, nBest = 1;
245 float32 f;
246
247 /* Set the PD frequency */
248 float32 fpd = IfxAsclin_getPdFrequency(asclin);
249 oversampling = (IfxAsclin_OversamplingFactor)__maxu((oversampling + 1), 4);
250 samplepoint = (IfxAsclin_SamplePointPosition)__maxu(samplepoint, 1);
251 fOvs = baudrate * oversampling;
252 float32 relError = fOvs;
253 float32 limit = 0.001 * fOvs; // save the error limit
254
255 boolean terminated = FALSE;
256 float32 newRelError; //modified by Hassan
257 uint32 adder_facL, adder_facH, adder_facL_min, count; //modified by Hassan
258
259 d = (uint32)(fpd / fOvs);
260 n = 1;
261
262 if (d >> 12)
263 {
264 if (((uint32)(fpd / (baudrate * 16))) >> 12)
265 {
266 /* Increase the value of the prescalar to generate the required baudrate */
267 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE);
268 }
269 else
270 {
271 /* Increase the value of the oversampling to generate the required baudrate */
272 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE);
273 }
274 }
275
276 dBest = d;
277 nBest = n;
278 adder_facL_min = 0;
279 f = (fpd * n) / d;
280 relError = __absf(fOvs - f);
281
282 if (relError <= limit)
283 {
284 terminated = TRUE;
285 }
286
287 for (n = 2; ((!terminated) && ((n * d) <= 0xFFF)); n++)
288 {
289 if (n == 2)
290 {
291 adder_facL = 1;
292 adder_facH = 1;
293 }
294 else
295 {
296 adder_facL = (adder_facL_min * n) / nBest;
297 adder_facH = adder_facL + 1;
298 }
299
300 for (count = adder_facL; count <= adder_facH; count++)
301 {
302 f = (fpd * n) / (n * d + count);
303 newRelError = __absf(fOvs - f);
304
305 if (relError > (newRelError))
306 {
307 relError = newRelError;
308 nBest = n;
309 dBest = (n * d + count);
310 adder_facL_min = count;
311 }
312 }
313
314 if (relError <= limit)
315 {
316 break;
317 }
318 }
319
320 IfxAsclin_setClockSource(asclin, IfxAsclin_ClockSource_noClock);
321 asclin->BRG.B.DENOMINATOR = dBest;
322 asclin->BRG.B.NUMERATOR = nBest;
323
324 /* Set the SHIFT frequency */
325 asclin->BITCON.B.OVERSAMPLING = oversampling - 1;
326
327 /* Set the sampling point */
328 asclin->BITCON.B.SAMPLEPOINT = samplepoint;
329
330 /* Set the median filter */
331 asclin->BITCON.B.SM = medianFilter ? 1 : 0;
332
333 IfxAsclin_setClockSource(asclin, source);
334
335 return TRUE;
336 }
337
338
339 void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
340 {
341 asclin->CSR.B.CLKSEL = clockSource; /* selects the given clock source*/
342
343 /* Waits TW or polls for CSR.CON to change */
344 if (clockSource == IfxAsclin_ClockSource_noClock)
345 {
346 while (IfxAsclin_getClockStatus(asclin) != 0U)
347 {}
348 }
349 else
350 {
351 while (IfxAsclin_getClockStatus(asclin) != 1U)
352 {}
353 }
354 }
355
356
357 uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
358 {
359 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
360
361 while ((count > 0))
362 {
363 txData->U = *data++;
364 count--;
365 }
366
367 return count;
368 }
369
370
371 uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
372 {
373 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
374
375 while ((count > 0))
376 {
377 txData->U = *data++;
378 count--;
379 }
380
381 return count;
382 }
383
384
385 uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
386 {
387 volatile Ifx_ASCLIN_TXDATA *txData = (volatile Ifx_ASCLIN_TXDATA *)&asclin->TXDATA.U;
388
389 while ((count > 0))
390 {
391 txData->U = *data++;
392 count--;
393 }
394
395 return count;
396 }
IfxAsclin_getAddress
Ifx_ASCLIN * IfxAsclin_getAddress(IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map.
Definition: IfxAsclin.c:60
IfxAsclin_write32
uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits.
Definition: IfxAsclin.c:371
IfxAsclin_setNumerator
IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider.
Definition: IfxAsclin.h:2299
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxAsclin_getIndex
IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified.
Definition: IfxAsclin.c:111
IfxAsclin_getShiftFrequency
float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
Returns the SHIFT frequency.
Definition: IfxAsclin.c:143
IfxScuCcu_getPllErayFrequency
float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:440
IfxAsclin_resetModule
void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
resets Asclin kernel
Definition: IfxAsclin.c:209
IfxAsclin_read32
uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits.
Definition: IfxAsclin.c:181
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:149
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:326
IfxAsclin_getOvsFrequency
float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
Returns the OVS frequency.
Definition: IfxAsclin.c:131
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:96
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:51
IfxAsclin_getFaFrequency
float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz.
Definition: IfxAsclin.c:77
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:58
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxAsclin_setDenominator
IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider.
Definition: IfxAsclin.h:2209
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxAsclin_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.c:35
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:48
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:240
IfxScuCcu_getOsc0Frequency
float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:412
IfxAsclin_ClockSource_oscillatorClock
XTAL oscillator clock foso0 will be supplied.
Definition: IfxAsclin.h:94
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1804
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:42
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:161
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:208
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxScuCcu_getBaud2Frequency
float32 IfxScuCcu_getBaud2Frequency(void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value i...
Definition: IfxScuCcu.c:213
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1612
IfxScuCcu_getBaud1Frequency
float32 IfxScuCcu_getBaud1Frequency(void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.c:195
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:90
IfxAsclin_enableAscErrorFlags
void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags.
Definition: IfxAsclin.c:44
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2317
IfxAsclin_Index_none
Not Selected.
Definition: IfxAsclin_cfg.h:60
IfxAsclin_ClockSource_flexRayClock
f eray will be supplied
Definition: IfxAsclin.h:95
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1834
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:304
IfxAsclin_setBaudrateBitFields
void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields.
Definition: IfxAsclin.c:228
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:155
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:195
IfxAsclin_ClockSource_ascSlowClock
f asclins will be supplied
Definition: IfxAsclin.h:97
IfxAsclin_write16
uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:357
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:385
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxAsclin_getClockStatus
IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
Returns the clock status.
Definition: IfxAsclin.h:1918
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:93
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxAsclin_disableModule
void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
Disables the module.
Definition: IfxAsclin.c:35
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:92
IfxAsclin_setEnableModuleRequest
IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
Sets the enable module request.
Definition: IfxAsclin.h:2221
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxAsclin_setOversampling
IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider.
Definition: IfxAsclin.h:2305
IfxAsclin_read16
uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:167
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxAsclin_getClockSource
IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
Returns the clock source.
Definition: IfxAsclin.h:1912
IfxAsclin.h
ASCLIN basic functionality.
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2215
IfxAsclin_getPdFrequency
float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
Returns the PD frequency.
Definition: IfxAsclin.c:137
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:339


iLLD_TC26B: IfxAsclin.h Source File

  • Asclin
  • Std
IfxAsclin.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin.h
3 * \brief ASCLIN basic functionality
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Asclin_Std_Enumerations Enumerations
25 * \ingroup IfxLld_Asclin_Std
26 * \defgroup IfxLld_Asclin_Std_Operative Operative Functions
27 * \ingroup IfxLld_Asclin_Std
28 * \defgroup IfxLld_Asclin_Std_Utility Utility Functions
29 * \ingroup IfxLld_Asclin_Std
30 * \defgroup IfxLld_Asclin_Std_Configuration Configuration Functions
31 * \ingroup IfxLld_Asclin_Std
32 * \defgroup IfxLld_Asclin_Std_External External Functions
33 * \ingroup IfxLld_Asclin_Std
34 * \defgroup IfxLld_Asclin_Std_IO IO Pin Configuration Functions
35 * \ingroup IfxLld_Asclin_Std
36 */
37
38 #ifndef IFXASCLIN_H
39 #define IFXASCLIN_H 1
40
41 /******************************************************************************/
42 /*----------------------------------Includes----------------------------------*/
43 /******************************************************************************/
44
45 #include "_Impl/IfxAsclin_cfg.h"
46 #include "Scu/Std/IfxScuCcu.h"
47 #include "Scu/Std/IfxScuWdt.h"
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49 #include "IfxAsclin_reg.h"
50 #include "Src/Std/IfxSrc.h"
51 #include "_PinMap/IfxAsclin_PinMap.h"
52
53 /******************************************************************************/
54 /*--------------------------------Enumerations--------------------------------*/
55 /******************************************************************************/
56
57 /** \addtogroup IfxLld_Asclin_Std_Enumerations
58 * \{ */
59 /** \brief Defines if the classic or the enhanced checksum will be calculated by the checksum block.\n
60 * Definition in Ifx_ASCLIN.DATCON.B.CSM
61 */
62 typedef enum
63 {
64 IfxAsclin_Checksum_classic = 0, /**< \brief classic checksum */
65 IfxAsclin_Checksum_enhanced = 1 /**< \brief enhanced checksum */
66 } IfxAsclin_Checksum;
67
68 /** \brief Defines if the received checksum byte is written into the RXFifo or not.\n
69 * Definition in Ifx_ASCLIN.LIN.CON.B.CSI
70 */
71 typedef enum
72 {
73 IfxAsclin_ChecksumInjection_notWritten = 0, /**< \brief checksum byte is not written */
74 IfxAsclin_ChecksumInjection_written = 1 /**< \brief checksum byte is written */
75 } IfxAsclin_ChecksumInjection;
76
77 /** \brief CPOL defines the idle level of the clock signal in the SPI mode.\n
78 * Idle level is the level outside the data transmission time intervals.\n
79 * Definition in Ifx_ASCLIN.IOCR.B.CPOL
80 */
81 typedef enum
82 {
83 IfxAsclin_ClockPolarity_idleLow = 0, /**< \brief idle low */
84 IfxAsclin_ClockPolarity_idleHigh = 1 /**< \brief idle high */
85 } IfxAsclin_ClockPolarity;
86
87 /** \brief Selection of clock source\n
88 * Definition in Ifx_ASCLIN.CSR.B.CLKSEL
89 */
90 typedef enum
91 {
92 IfxAsclin_ClockSource_noClock = 0, /**< \brief no clock will be supplied */
93 IfxAsclin_ClockSource_kernelClock = 1, /**< \brief f clc will be supplied */
94 IfxAsclin_ClockSource_oscillatorClock = 2, /**< \brief XTAL oscillator clock foso0 will be supplied */
95 IfxAsclin_ClockSource_flexRayClock = 4, /**< \brief f eray will be supplied */
96 IfxAsclin_ClockSource_ascFastClock = 8, /**< \brief f asclinf wiil be supplied */
97 IfxAsclin_ClockSource_ascSlowClock = 16 /**< \brief f asclins will be supplied */
98 } IfxAsclin_ClockSource;
99
100 /** \brief CTS input pin selection\n
101 * Definition in Ifx_ASCLIN.IOCR.B.CTS
102 */
103 typedef enum
104 {
105 IfxAsclin_CtsInputSelect_0, /**< \brief CTS input pin 0 */
106 IfxAsclin_CtsInputSelect_1, /**< \brief CTS input pin 1 */
107 IfxAsclin_CtsInputSelect_2, /**< \brief CTS input pin 2 */
108 IfxAsclin_CtsInputSelect_3 /**< \brief CTS input pin 3 */
109 } IfxAsclin_CtsInputSelect;
110
111 /** \brief Number of bits per transfer\n
112 * Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN
113 */
114 typedef enum
115 {
116 IfxAsclin_DataLength_1 = 0, /**< \brief number of bits per transfer 0 */
117 IfxAsclin_DataLength_2, /**< \brief number of bits per transfer 1 */
118 IfxAsclin_DataLength_3, /**< \brief number of bits per transfer 2 */
119 IfxAsclin_DataLength_4, /**< \brief number of bits per transfer 3 */
120 IfxAsclin_DataLength_5, /**< \brief number of bits per transfer 4 */
121 IfxAsclin_DataLength_6, /**< \brief number of bits per transfer 5 */
122 IfxAsclin_DataLength_7, /**< \brief number of bits per transfer 6 */
123 IfxAsclin_DataLength_8, /**< \brief number of bits per transfer 7 */
124 IfxAsclin_DataLength_9, /**< \brief number of bits per transfer 8 */
125 IfxAsclin_DataLength_10, /**< \brief number of bits per transfer 9 */
126 IfxAsclin_DataLength_11, /**< \brief number of bits per transfer 10 */
127 IfxAsclin_DataLength_12, /**< \brief number of bits per transfer 11 */
128 IfxAsclin_DataLength_13, /**< \brief number of bits per transfer 12 */
129 IfxAsclin_DataLength_14, /**< \brief number of bits per transfer 13 */
130 IfxAsclin_DataLength_15, /**< \brief number of bits per transfer 14 */
131 IfxAsclin_DataLength_16 /**< \brief number of bits per transfer 15 */
132 } IfxAsclin_DataLength;
133
134 /** \brief Defines the basic operating mode of the module. Changing the mode must be done by switching first to initialize mode, and then to the other mode.\n
135 * Definition in Ifx_ASCLIN.FRAMECON.B.MODE
136 */
137 typedef enum
138 {
139 IfxAsclin_FrameMode_initialise = 0, /**< \brief initialise mode */
140 IfxAsclin_FrameMode_asc = 1, /**< \brief asc mode */
141 IfxAsclin_FrameMode_spi = 2, /**< \brief spi mode */
142 IfxAsclin_FrameMode_lin = 3 /**< \brief lin mode */
143 } IfxAsclin_FrameMode;
144
145 /** \brief Defines if LIN frame shall consist of a header and response or of a header only.\n
146 * Definition in Ifx_ASCLIN.DATCON.B.HO
147 */
148 typedef enum
149 {
150 IfxAsclin_HeaderResponseSelect_headerAndResponse = 0, /**< \brief header and response expected */
151 IfxAsclin_HeaderResponseSelect_headerOnly = 1 /**< \brief header only expected */
152 } IfxAsclin_HeaderResponseSelect;
153
154 /** \brief Defines the duration of the IDLE delay in bit times.\n
155 * SPI mode: this is the idle time between the frames.\n
156 * ASC and LIN mode: this is the pause inserted between transmission of bytes.\n
157 * Definition in Ifx_ASCLIN.FRAMECON.B.IDLE
158 */
159 typedef enum
160 {
161 IfxAsclin_IdleDelay_0, /**< \brief idle delay in 0 bit times */
162 IfxAsclin_IdleDelay_1, /**< \brief idle delay in 1 bit times */
163 IfxAsclin_IdleDelay_2, /**< \brief idle delay in 2 bit times */
164 IfxAsclin_IdleDelay_3, /**< \brief idle delay in 3 bit times */
165 IfxAsclin_IdleDelay_4, /**< \brief idle delay in 4 bit times */
166 IfxAsclin_IdleDelay_5, /**< \brief idle delay in 5 bit times */
167 IfxAsclin_IdleDelay_6, /**< \brief idle delay in 6 bit times */
168 IfxAsclin_IdleDelay_7 /**< \brief idle delay in 7 bit times */
169 } IfxAsclin_IdleDelay;
170
171 /** \brief Defines the leading delay in bit times in SPI mode. ASC mode: not applicable.\n
172 * LIN mode: delay between the end of the break and the start of the sync character.\n
173 * Definition in Ifx_ASCLIN.FRAMECON.B.LEAD
174 */
175 typedef enum
176 {
177 IfxAsclin_LeadDelay_0, /**< \brief lead delay in 0 bit times */
178 IfxAsclin_LeadDelay_1, /**< \brief lead delay in 1 bit times */
179 IfxAsclin_LeadDelay_2, /**< \brief lead delay in 2 bit times */
180 IfxAsclin_LeadDelay_3, /**< \brief lead delay in 3 bit times */
181 IfxAsclin_LeadDelay_4, /**< \brief lead delay in 4 bit times */
182 IfxAsclin_LeadDelay_5, /**< \brief lead delay in 5 bit times */
183 IfxAsclin_LeadDelay_6, /**< \brief lead delay in 6 bit times */
184 IfxAsclin_LeadDelay_7 /**< \brief lead delay in 7 bit times */
185 } IfxAsclin_LeadDelay;
186
187 /** \brief Configures if the module in LIN mode operates as master or slave\n
188 * Definition in Ifx_ASCLIN.LIN.CON.B.MS
189 */
190 typedef enum
191 {
192 IfxAsclin_LinMode_slave = 0, /**< \brief operates in slave mode */
193 IfxAsclin_LinMode_master = 1 /**< \brief operates in master mode */
194 } IfxAsclin_LinMode;
195
196 /** \brief Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout.\n
197 * Definition in Ifx_ASCLIN.DATCON.B.RM
198 */
199 typedef enum
200 {
201 IfxAsclin_LinResponseTimeoutMode_frameTimeout = 0, /**< \brief timeout threshold is for frame */
202 IfxAsclin_LinResponseTimeoutMode_responseTimeout = 1 /**< \brief timeout threshold is for reponse */
203 } IfxAsclin_LinResponseTimeoutMode;
204
205 /** \brief Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed\n
206 * Definition in Ifx_ASCLIN.BITCON.B.OVERSAMPLING
207 */
208 typedef enum
209 {
210 IfxAsclin_OversamplingFactor_4 = 3, /**< \brief oversampling factor 4 */
211 IfxAsclin_OversamplingFactor_5 = 4, /**< \brief oversampling factor 5 */
212 IfxAsclin_OversamplingFactor_6 = 5, /**< \brief oversampling factor 6 */
213 IfxAsclin_OversamplingFactor_7 = 6, /**< \brief oversampling factor 7 */
214 IfxAsclin_OversamplingFactor_8 = 7, /**< \brief oversampling factor 8 */
215 IfxAsclin_OversamplingFactor_9 = 8, /**< \brief oversampling factor 9 */
216 IfxAsclin_OversamplingFactor_10 = 9, /**< \brief oversampling factor 10 */
217 IfxAsclin_OversamplingFactor_11 = 10, /**< \brief oversampling factor 11 */
218 IfxAsclin_OversamplingFactor_12 = 11, /**< \brief oversampling factor 12 */
219 IfxAsclin_OversamplingFactor_13 = 12, /**< \brief oversampling factor 13 */
220 IfxAsclin_OversamplingFactor_14 = 13, /**< \brief oversampling factor 14 */
221 IfxAsclin_OversamplingFactor_15 = 14, /**< \brief oversampling factor 15 */
222 IfxAsclin_OversamplingFactor_16 = 15 /**< \brief oversampling factor 16 */
223 } IfxAsclin_OversamplingFactor;
224
225 /** \brief Type of parity bit attached to data bits\n
226 * Definition in Ifx_ASCLIN.FRAMECON.B.ODD
227 */
228 typedef enum
229 {
230 IfxAsclin_ParityType_even = 0, /**< \brief even parity */
231 IfxAsclin_ParityType_odd = 1 /**< \brief odd parity */
232 } IfxAsclin_ParityType;
233
234 /** \brief Receive buffer mode\n
235 * Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF
236 */
237 typedef enum
238 {
239 IfxAsclin_ReceiveBufferMode_rxFifo = 0, /**< \brief RxFIFO mode */
240 IfxAsclin_ReceiveBufferMode_rxBuffer = 1 /**< \brief single stage Rx buffer */
241 } IfxAsclin_ReceiveBufferMode;
242
243 /** \brief Polarity of the RTS and CTS signals\n
244 * Definition in Ifx_ASCLIN.IOCR.B.RCPOL
245 */
246 typedef enum
247 {
248 IfxAsclin_RtsCtsPolarity_activeHigh = 0, /**< \brief ready/clear are active-high */
249 IfxAsclin_RtsCtsPolarity_activeLow = 1 /**< \brief ready/clear are active-low */
250 } IfxAsclin_RtsCtsPolarity;
251
252 /** \brief Defines the filling level that triggers a drain (RX) interrupt or DMA access\n
253 * Definition in Ifx_ASCLIN.RXFIFOCON.B.INTLEVEL
254 */
255 typedef enum
256 {
257 IfxAsclin_RxFifoInterruptLevel_1, /**< \brief RX FIFO level 1 */
258 IfxAsclin_RxFifoInterruptLevel_2, /**< \brief RX FIFO level 2 */
259 IfxAsclin_RxFifoInterruptLevel_3, /**< \brief RX FIFO level 3 */
260 IfxAsclin_RxFifoInterruptLevel_4, /**< \brief RX FIFO level 4 */
261 IfxAsclin_RxFifoInterruptLevel_5, /**< \brief RX FIFO level 5 */
262 IfxAsclin_RxFifoInterruptLevel_6, /**< \brief RX FIFO level 6 */
263 IfxAsclin_RxFifoInterruptLevel_7, /**< \brief RX FIFO level 7 */
264 IfxAsclin_RxFifoInterruptLevel_8, /**< \brief RX FIFO level 8 */
265 IfxAsclin_RxFifoInterruptLevel_9, /**< \brief RX FIFO level 9 */
266 IfxAsclin_RxFifoInterruptLevel_10, /**< \brief RX FIFO level 10 */
267 IfxAsclin_RxFifoInterruptLevel_11, /**< \brief RX FIFO level 11 */
268 IfxAsclin_RxFifoInterruptLevel_12, /**< \brief RX FIFO level 12 */
269 IfxAsclin_RxFifoInterruptLevel_13, /**< \brief RX FIFO level 13 */
270 IfxAsclin_RxFifoInterruptLevel_14, /**< \brief RX FIFO level 14 */
271 IfxAsclin_RxFifoInterruptLevel_15, /**< \brief RX FIFO level 15 */
272 IfxAsclin_RxFifoInterruptLevel_16 /**< \brief RX FIFO level 16 */
273 } IfxAsclin_RxFifoInterruptLevel;
274
275 /** \brief Defines the number of bytes read from the Rx FIFO with one FPI bus read\n
276 * Definition in Ifx_ASCLIN.RXFIFOCON.B.OUTW
277 */
278 typedef enum
279 {
280 IfxAsclin_RxFifoOutletWidth_0, /**< \brief number of bytes 0 */
281 IfxAsclin_RxFifoOutletWidth_1, /**< \brief number of bytes 1 */
282 IfxAsclin_RxFifoOutletWidth_2, /**< \brief number of bytes 2 */
283 IfxAsclin_RxFifoOutletWidth_3 /**< \brief number of bytes 3 */
284 } IfxAsclin_RxFifoOutletWidth;
285
286 /** \brief Alternate input selection for Rx signal.\n
287 * Definition in Ifx_ASCLIN.IOCR.B.ALTI
288 */
289 typedef enum
290 {
291 IfxAsclin_RxInputSelect_0, /**< \brief alternate input selection 0 */
292 IfxAsclin_RxInputSelect_1, /**< \brief alternate input selection 1 */
293 IfxAsclin_RxInputSelect_2, /**< \brief alternate input selection 2 */
294 IfxAsclin_RxInputSelect_3, /**< \brief alternate input selection 3 */
295 IfxAsclin_RxInputSelect_4, /**< \brief alternate input selection 4 */
296 IfxAsclin_RxInputSelect_5, /**< \brief alternate input selection 5 */
297 IfxAsclin_RxInputSelect_6, /**< \brief alternate input selection 6 */
298 IfxAsclin_RxInputSelect_7 /**< \brief alternate input selection 7 */
299 } IfxAsclin_RxInputSelect;
300
301 /** \brief Sample point position\n
302 * Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT
303 */
304 typedef enum
305 {
306 IfxAsclin_SamplePointPosition_1 = 1, /**< \brief sample point position at 1 */
307 IfxAsclin_SamplePointPosition_2 = 2, /**< \brief sample point position at 2 */
308 IfxAsclin_SamplePointPosition_3 = 3, /**< \brief sample point position at 3 */
309 IfxAsclin_SamplePointPosition_4 = 4, /**< \brief sample point position at 4 */
310 IfxAsclin_SamplePointPosition_5 = 5, /**< \brief sample point position at 5 */
311 IfxAsclin_SamplePointPosition_6 = 6, /**< \brief sample point position at 6 */
312 IfxAsclin_SamplePointPosition_7 = 7, /**< \brief sample point position at 7 */
313 IfxAsclin_SamplePointPosition_8 = 8, /**< \brief sample point position at 8 */
314 IfxAsclin_SamplePointPosition_9 = 9, /**< \brief sample point position at 9 */
315 IfxAsclin_SamplePointPosition_10 = 10, /**< \brief sample point position at 10 */
316 IfxAsclin_SamplePointPosition_11 = 11, /**< \brief sample point position at 11 */
317 IfxAsclin_SamplePointPosition_12 = 12, /**< \brief sample point position at 12 */
318 IfxAsclin_SamplePointPosition_13 = 13, /**< \brief sample point position at 13 */
319 IfxAsclin_SamplePointPosition_14 = 14, /**< \brief sample point position at 14 */
320 IfxAsclin_SamplePointPosition_15 = 15 /**< \brief sample point position at 15 */
321 } IfxAsclin_SamplePointPosition;
322
323 /** \brief Number of samples per bit, sample mode/medianfilter\n
324 * Definition in Ifx_ASCLIN.BITCON.B.SM
325 */
326 typedef enum
327 {
328 IfxAsclin_SamplesPerBit_one = 0, /**< \brief one sample per bit */
329 IfxAsclin_SamplesPerBit_three = 1 /**< \brief three samples per bit */
330 } IfxAsclin_SamplesPerBit;
331
332 /** \brief SPI mode: defines the shift direction of the shift register.\n
333 * ASC and LIN mode: should be set to 0.\n
334 * Definition in Ifx_ASCLIN.FRAMECON.B.MSB
335 */
336 typedef enum
337 {
338 IfxAsclin_ShiftDirection_lsbFirst = 0, /**< \brief LSB first */
339 IfxAsclin_ShiftDirection_msbFirst = 1 /**< \brief MSB first */
340 } IfxAsclin_ShiftDirection;
341
342 /** \brief Defines the idle level of the SLSO signal, which is the level.\n
343 * Outside the data transmission, leading and trailing time intervals.\n
344 * Definition in Ifx_ASCLIN.IOCR.B.SPOL
345 */
346 typedef enum
347 {
348 IfxAsclin_SlavePolarity_idleLow = 0, /**< \brief idle low */
349 IfxAsclin_SlavePolarity_idlehigh = 1 /**< \brief idle high */
350 } IfxAsclin_SlavePolarity;
351
352 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
353 * Definition in Ifx_ASCLIN.CLC.B.EDIS
354 */
355 typedef enum
356 {
357 IfxAsclin_SleepMode_enable = 0, /**< \brief enables sleep mode */
358 IfxAsclin_SleepMode_disable = 1 /**< \brief disables sleep mode */
359 } IfxAsclin_SleepMode;
360
361 /** \brief Error status
362 */
363 typedef enum
364 {
365 IfxAsclin_Status_configurationError = 0, /**< \brief Configuration error */
366 IfxAsclin_Status_noError = 1 /**< \brief No error */
367 } IfxAsclin_Status;
368
369 /** \brief ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay.\n
370 * Definition in Ifx_ASCLIN.FRAMECON.B.STOP
371 */
372 typedef enum
373 {
374 IfxAsclin_StopBit_0, /**< \brief number of stop bits 0 */
375 IfxAsclin_StopBit_1, /**< \brief number of stop bits 1 */
376 IfxAsclin_StopBit_2, /**< \brief number of stop bits 2 */
377 IfxAsclin_StopBit_3, /**< \brief number of stop bits 3 */
378 IfxAsclin_StopBit_4, /**< \brief number of stop bits 4 */
379 IfxAsclin_StopBit_5, /**< \brief number of stop bits 5 */
380 IfxAsclin_StopBit_6, /**< \brief number of stop bits 6 */
381 IfxAsclin_StopBit_7 /**< \brief number of stop bits 7 */
382 } IfxAsclin_StopBit;
383
384 /** \brief OCDS Suspend Control (OCDS.SUS)
385 */
386 typedef enum
387 {
388 IfxAsclin_SuspendMode_none = 0, /**< \brief No suspend */
389 IfxAsclin_SuspendMode_hard = 1, /**< \brief Hard Suspend */
390 IfxAsclin_SuspendMode_soft = 2 /**< \brief Soft Suspend */
391 } IfxAsclin_SuspendMode;
392
393 /** \brief Defines the number of bytes written to the Tx FIFO with one FPI bus write\n
394 * Definition in Ifx_ASCLIN.TXFIFOCON.B.INW
395 */
396 typedef enum
397 {
398 IfxAsclin_TxFifoInletWidth_0, /**< \brief number of bytes 0 */
399 IfxAsclin_TxFifoInletWidth_1, /**< \brief number of bytes 1 */
400 IfxAsclin_TxFifoInletWidth_2, /**< \brief number of bytes 2 */
401 IfxAsclin_TxFifoInletWidth_3 /**< \brief number of bytes 3 */
402 } IfxAsclin_TxFifoInletWidth;
403
404 /** \brief Defines the filling level that triggers a refill (TX) interrupt or DMA access\n
405 * Definition in Ifx_ASCLIN.TXFIFOCON.B.INTLEVEL
406 */
407 typedef enum
408 {
409 IfxAsclin_TxFifoInterruptLevel_0, /**< \brief TX FIFO level 0 */
410 IfxAsclin_TxFifoInterruptLevel_1, /**< \brief TX FIFO level 1 */
411 IfxAsclin_TxFifoInterruptLevel_2, /**< \brief TX FIFO level 2 */
412 IfxAsclin_TxFifoInterruptLevel_3, /**< \brief TX FIFO level 3 */
413 IfxAsclin_TxFifoInterruptLevel_4, /**< \brief TX FIFO level 4 */
414 IfxAsclin_TxFifoInterruptLevel_5, /**< \brief TX FIFO level 5 */
415 IfxAsclin_TxFifoInterruptLevel_6, /**< \brief TX FIFO level 6 */
416 IfxAsclin_TxFifoInterruptLevel_7, /**< \brief TX FIFO level 7 */
417 IfxAsclin_TxFifoInterruptLevel_8, /**< \brief TX FIFO level 8 */
418 IfxAsclin_TxFifoInterruptLevel_9, /**< \brief TX FIFO level 9 */
419 IfxAsclin_TxFifoInterruptLevel_10, /**< \brief TX FIFO level 10 */
420 IfxAsclin_TxFifoInterruptLevel_11, /**< \brief TX FIFO level 11 */
421 IfxAsclin_TxFifoInterruptLevel_12, /**< \brief TX FIFO level 12 */
422 IfxAsclin_TxFifoInterruptLevel_13, /**< \brief TX FIFO level 13 */
423 IfxAsclin_TxFifoInterruptLevel_14, /**< \brief TX FIFO level 14 */
424 IfxAsclin_TxFifoInterruptLevel_15 /**< \brief TX FIFO level 15 */
425 } IfxAsclin_TxFifoInterruptLevel;
426
427 /** \} */
428
429 /** \addtogroup IfxLld_Asclin_Std_Operative
430 * \{ */
431
432 /******************************************************************************/
433 /*-------------------------Inline Function Prototypes-------------------------*/
434 /******************************************************************************/
435
436 /** \brief clears all the flags
437 * \param asclin pointer to ASCLIN registers
438 * \return None
439 */
440 IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin);
441
442 /** \brief Clears the break detected flag
443 * \param asclin pointer to ASCLIN registers
444 * \return None
445 */
446 IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin);
447
448 /** \brief Clears the collision detection error flag
449 * \param asclin pointer to ASCLIN registers
450 * \return None
451 */
452 IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin);
453
454 /** \brief Clears the falling edge detected flag
455 * \param asclin pointer to ASCLIN registers
456 * \return None
457 */
458 IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin);
459
460 /** \brief Clears the frame error flag
461 * \param asclin pointer to ASCLIN registers
462 * \return None
463 */
464 IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin);
465
466 /** \brief Clears the header timeout flag
467 * \param asclin pointer to ASCLIN registers
468 * \return None
469 */
470 IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin);
471
472 /** \brief Clears the kernel reset status
473 * \param asclin pointer to ASCLIN registers
474 * \return None
475 */
476 IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin);
477
478 /** \brief Clears the auto baudrate detection error flag
479 * \param asclin pointer to ASCLIN registers
480 * \return None
481 */
482 IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin);
483
484 /** \brief Clears the LIN checksum error flag
485 * \param asclin pointer to ASCLIN registers
486 * \return None
487 */
488 IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin);
489
490 /** \brief Clears the LIN parity error flag
491 * \param asclin pointer to ASCLIN registers
492 * \return None
493 */
494 IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin);
495
496 /** \brief Clears the parity error flag
497 * \param asclin pointer to ASCLIN registers
498 * \return None
499 */
500 IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin);
501
502 /** \brief Clears the raising edge detected flag
503 * \param asclin pointer to ASCLIN registers
504 * \return None
505 */
506 IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin);
507
508 /** \brief Clears the response timeout flag
509 * \param asclin pointer to ASCLIN registers
510 * \return None
511 */
512 IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin);
513
514 /** \brief Clears the Rx FIFO level flag
515 * \param asclin pointer to ASCLIN registers
516 * \return None
517 */
518 IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin);
519
520 /** \brief Clears the Rx FIFO overflow flag
521 * \param asclin pointer to ASCLIN registers
522 * \return None
523 */
524 IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin);
525
526 /** \brief Clears the Rx FIFO underflow flag
527 * \param asclin pointer to ASCLIN registers
528 * \return None
529 */
530 IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin);
531
532 /** \brief Clears the receive header end flag
533 * \param asclin pointer to ASCLIN registers
534 * \return None
535 */
536 IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin);
537
538 /** \brief Clears the receive response end flag
539 * \param asclin pointer to ASCLIN registers
540 * \return None
541 */
542 IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin);
543
544 /** \brief Clears the transmission pending flag
545 * \param asclin pointer to ASCLIN registers
546 * \return None
547 */
548 IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin);
549
550 /** \brief Clears the Tx FIFO level flag
551 * \param asclin pointer to ASCLIN registers
552 * \return None
553 */
554 IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin);
555
556 /** \brief Clears the Tx FIFO overflow flag
557 * \param asclin pointer to ASCLIN registers
558 * \return None
559 */
560 IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin);
561
562 /** \brief Clears the transmit header end flag
563 * \param asclin pointer to ASCLIN registers
564 * \return None
565 */
566 IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin);
567
568 /** \brief Clears the transmit response end flag
569 * \param asclin pointer to ASCLIN registers
570 * \return None
571 */
572 IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin);
573
574 /** \brief Flushes (empties) the Rx FIFO
575 * \param asclin pointer to ASCLIN registers
576 * \return None
577 */
578 IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin);
579
580 /** \brief Flushes (empties) the Tx FIFO
581 * \param asclin pointer to ASCLIN registers
582 * \return None
583 */
584 IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin);
585
586 /** \brief Sets the baudrate detection's lower limit
587 * \param asclin pointer to ASCLIN registers
588 * \param limit value of the lower limit
589 * \return None
590 */
591 IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit);
592
593 /** \brief Sets the baudrate detection's upper limit
594 * \param asclin pointer to ASCLIN registers
595 * \param limit value of the upper limit
596 * \return None
597 */
598 IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit);
599
600 /** \brief Sets the checksum injection
601 * \param asclin pointer to ASCLIN registers
602 * \param csi checksum injection selection (not written / written)
603 * \return None
604 */
605 IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi);
606
607 /** \brief Sets the checksum mode
608 * \param asclin pointer to ASCLIN registers
609 * \param mode checksum mode selection (classic / enhanced)
610 * \return None
611 */
612 IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode);
613
614 /** \brief Sets the data length (number of bits per transfer)
615 * \param asclin pointer to ASCLIN registers
616 * \param length data length selection
617 * \return None
618 */
619 IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length);
620
621 /** \brief Sets the denominator of the fractional divider
622 * \param asclin pointer to ASCLIN registers
623 * \param denominator value of the denominator
624 * \return None
625 */
626 IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator);
627
628 /** \brief Sets the disable module request
629 * \param asclin pointer to ASCLIN registers
630 * \return None
631 */
632 IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin);
633
634 /** \brief Sets the enable module request
635 * \param asclin pointer to ASCLIN registers
636 * \return None
637 */
638 IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin);
639
640 /** \brief Sets digital glitch filter depth
641 * \param asclin pointer to ASCLIN registers
642 * \param depth digital glitch filter depth selection (1 to 63)
643 * \return None
644 */
645 IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth);
646
647 /** \brief Sets the header response selection
648 * \param asclin pointer to ASCLIN registers
649 * \param type type of selection (header and response or header only)
650 * \return None
651 */
652 IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type);
653
654 /** \brief Sets the idle delay
655 * \param asclin pointer to ASCLIN registers
656 * \param delay idle delay selection
657 * \return None
658 */
659 IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay);
660
661 /** \brief Sets the kernal reset of the KRST1
662 * \param asclin pointer to ASCLIN registers
663 * \return None
664 */
665 IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin);
666
667 /** \brief Sets the kernel reset of the KRST0
668 * \param asclin pointer to ASCLIN registers
669 * \return None
670 */
671 IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin);
672
673 /** \brief Sets the lead delay
674 * \param asclin pointer to ASCLIN registers
675 * \param delay lead delay selection
676 * \return None
677 */
678 IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay);
679
680 /** \brief Sets the LIN break length
681 * \param asclin pointer to ASCLIN registers
682 * \param length value of the break length
683 * \return None
684 */
685 IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length);
686
687 /** \brief Sets the LIN header timeout
688 * \param asclin pointer to ASCLIN registers
689 * \param timeout value of the header timeout
690 * \return None
691 */
692 IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout);
693
694 /** \brief Sets the LIN mode of operation
695 * \param asclin pointer to ASCLIN registers
696 * \param mode mode selection (slave / master)
697 * \return None
698 */
699 IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode);
700
701 /** \brief Sets the LIN response timeout mode
702 * \param asclin pointer to ASCLIN registers
703 * \param mode LIN response timeout mode selection
704 * \return None
705 */
706 IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode);
707
708 /** \brief Sets the LIN response timeout threshold
709 * \param asclin pointer to ASCLIN registers
710 * \param threshold value of the tomeout threshold (1 to 256 bit times)
711 * \return None
712 */
713 IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold);
714
715 /** \brief Sets the numerator of the fractional divider
716 * \param asclin pointer to ASCLIN registers
717 * \param numerator value of the numerator
718 * \return None
719 */
720 IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator);
721
722 /** \brief Sets the division ratio of the baudrate post divider
723 * \param asclin pointer to ASCLIN registers
724 * \param ovsFactor value of oversampling factor
725 * \return None
726 */
727 IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor);
728
729 /** \brief Sets the parity type
730 * \param asclin pointer to ASCLIN registers
731 * \param type parity type selction (even / odd)
732 * \return None
733 */
734 IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type);
735
736 /** \brief Sets the division ratio of the predivider (prescaler)
737 * \param asclin pointer to ASCLIN registers
738 * \param prescaler value of prescaler
739 * \return None
740 */
741 IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler);
742
743 /** \brief Sets the receive buffer mode
744 * \param asclin pointer to ASCLIN registers
745 * \param mode receive buffer mode selection (Rx FIFO or single stage Rx buffer)
746 * \return None
747 */
748 IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode);
749
750 /** \brief Sets the Tx FIFO interrupt level
751 * \param asclin pointer to ASCLIN registers
752 * \param level interrupt level selection
753 * \return None
754 */
755 IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level);
756
757 /** \brief Sets the receive FIFO outlet width
758 * \param asclin pointer to ASCLIN registers
759 * \param width number of bytes read to the Rx FIFO with one FPI bus read
760 * \return None
761 */
762 IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width);
763
764 /** \brief Sets the sample mode (number of samples per bit / median filter)
765 * \param asclin pointer to ASCLIN registers
766 * \param medianFilter value of the median filter
767 * \return None
768 */
769 IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter);
770
771 /** \brief Sets the sampling point position
772 * \param asclin pointer to ASCLIN registers
773 * \param spPosition sample point position selection
774 * \return None
775 */
776 IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition);
777
778 /** \brief Sets the shift direction
779 * \param asclin pointer to ASCLIN registers
780 * \param dir shift direction selection (LSB / MSB first)
781 * \return None
782 */
783 IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir);
784
785 /** \brief Sets the number of stop bits
786 * \param asclin pointer to ASCLIN registers
787 * \param stopBit number of stop bits selection
788 * \return None
789 */
790 IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit);
791
792 /** \brief Sets the transmit header request flag
793 * \param asclin pointer to ASCLIN registers
794 * \return None
795 */
796 IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin);
797
798 /** \brief Sets the transmit response request flag
799 * \param asclin pointer to ASCLIN registers
800 * \return None
801 */
802 IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin);
803
804 /** \brief Sets the transmission wake request flag
805 * \param asclin pointer to ASCLIN registers
806 * \return None
807 */
808 IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin);
809
810 /** \brief Sets the transmit FIFO inlet width
811 * \param asclin pointer to ASCLIN registers
812 * \param width number of bytes written to the Tx FIFO with one FPI bus write
813 * \return None
814 */
815 IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width);
816
817 /** \brief Sets the Tx FIFO interrupt level
818 * \param asclin pointer to ASCLIN registers
819 * \param level interrupt level selection
820 * \return None
821 */
822 IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level);
823
824 /** \} */
825
826 /** \addtogroup IfxLld_Asclin_Std_Utility
827 * \{ */
828
829 /******************************************************************************/
830 /*-------------------------Inline Function Prototypes-------------------------*/
831 /******************************************************************************/
832
833 /** \brief Returns the break detected flag status
834 * \param asclin pointer to ASCLIN registers
835 * \return break detected flag status
836 */
837 IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin);
838
839 /** \brief Returns the clock source
840 * \param asclin pointer to ASCLIN registers
841 * \return clock source
842 */
843 IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin);
844
845 /** \brief Returns the clock status
846 * \param asclin pointer to ASCLIN registers
847 * \return clock status (off / on)
848 */
849 IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin);
850
851 /** \brief Returns the collision detection error flag status
852 * \param asclin pointer to ASCLIN registers
853 * \return collision detection error flag status
854 */
855 IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin);
856
857 /** \brief Returns the falling edge detected flag status
858 * \param asclin pointer to ASCLIN registers
859 * \return falling edge detected flag status
860 */
861 IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin);
862
863 /** \brief Returns the frame error flag status
864 * \param asclin pointer to ASCLIN registers
865 * \return frame error flag status
866 */
867 IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin);
868
869 /** \brief Returns the header timeout flag status
870 * \param asclin pointer to ASCLIN registers
871 * \return header timeout flag status
872 */
873 IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin);
874
875 /** \brief Returns the kernel reset status
876 * \param asclin pointer to ASCLIN registers
877 * \return kernel reset status
878 */
879 IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin);
880
881 /** \brief Returns the LIN auto baudrate detection error flag status
882 * \param asclin pointer to ASCLIN registers
883 * \return LIN auto baudrate detection error flag status
884 */
885 IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin);
886
887 /** \brief Returns the LIN checksum error flag status
888 * \param asclin pointer to ASCLIN registers
889 * \return LIN checksum error flag status
890 */
891 IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin);
892
893 /** \brief Returns the LIN parity error flag status
894 * \param asclin pointer to ASCLIN registers
895 * \return LIN parity error flag status
896 */
897 IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin);
898
899 /** \brief Returns the module status
900 * \param asclin pointer to ASCLIN registers
901 * \return module status (enabled / disabled)
902 */
903 IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin);
904
905 /** \brief Returns the parity error flag status
906 * \param asclin pointer to ASCLIN registers
907 * \return parity error flag status
908 */
909 IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin);
910
911 /** \brief Returns the division ratio of the predivider (prescaler)
912 * \param asclin pointer to ASCLIN registers
913 * \return value of prescaler
914 */
915 IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin);
916
917 /** \brief Returns the raising edge detected flag status
918 * \param asclin pointer to ASCLIN registers
919 * \return raising edge detected flag status
920 */
921 IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin);
922
923 /** \brief Returns the received signal status
924 * \param asclin pointer to ASCLIN registers
925 * \return received signal status (0 is low & 1 is high)
926 */
927 IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin);
928
929 /** \brief Returns the response timeout flag status
930 * \param asclin pointer to ASCLIN registers
931 * \return response timeout flag status
932 */
933 IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin);
934
935 /** \brief Returns the current filling level of Tx FIFO
936 * \param asclin pointer to ASCLIN registers
937 * \return current filling level of Rx FIFO
938 */
939 IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin);
940
941 /** \brief Returns the Rx FIFO level flag status
942 * \param asclin pointer to ASCLIN registers
943 * \return Rx FIFO level flag status
944 */
945 IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin);
946
947 /** \brief Returns the receive FIFO inlet width
948 * \param asclin pointer to ASCLIN registers
949 * \return number of bytes read to the Rx FIFO with one FPI bus read
950 */
951 IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin);
952
953 /** \brief Returns the Rx FIFO overflow flag status
954 * \param asclin pointer to ASCLIN registers
955 * \return Rx FIFO overflow flag status
956 */
957 IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin);
958
959 /** \brief Returns the Rx FIFO underflow flag status
960 * \param asclin pointer to ASCLIN registers
961 * \return Rx FIFO underflow flag status
962 */
963 IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin);
964
965 /** \brief Returns the receive header end flag status
966 * \param asclin pointer to ASCLIN registers
967 * \return receive header end flag status
968 */
969 IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin);
970
971 /** \brief Returns the receive response end flag status
972 * \param asclin pointer to ASCLIN registers
973 * \return receive response end flag status
974 */
975 IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin);
976
977 /** \brief Returns the transmission pending flag status
978 * \param asclin pointer to ASCLIN registers
979 * \return transmission pending flag status
980 */
981 IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin);
982
983 /** \brief Returns the transmit signal status
984 * \param asclin pointer to ASCLIN registers
985 * \return transmit signal status (0 is low & 1 is high)
986 */
987 IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin);
988
989 /** \brief Returns the current filling level of Tx FIFO
990 * \param asclin pointer to ASCLIN registers
991 * \return current filling level of Tx FIFO
992 */
993 IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin);
994
995 /** \brief Returns the Tx FIFO level flag status
996 * \param asclin pointer to ASCLIN registers
997 * \return Tx FIFO level flag status
998 */
999 IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin);
1000
1001 /** \brief Returns the transmit FIFO inlet width
1002 * \param asclin pointer to ASCLIN registers
1003 * \return number of bytes written to the Tx FIFO with one FPI bus write
1004 */
1005 IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin);
1006
1007 /** \brief Returns the Tx FIFO overflow flag status
1008 * \param asclin pointer to ASCLIN registers
1009 * \return Tx FIFO overflow flag status
1010 */
1011 IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin);
1012
1013 /** \brief Returns the transmit header end flag status
1014 * \param asclin pointer to ASCLIN registers
1015 * \return transmit header end flag status
1016 */
1017 IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin);
1018
1019 /** \brief Returns the transmit response end flag status
1020 * \param asclin pointer to ASCLIN registers
1021 * \return transmit response end flag status
1022 */
1023 IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin);
1024
1025 /** \brief Sets the sensitivity of the module to sleep signal
1026 * \param asclin pointer to ASCLIN registers
1027 * \param mode mode selection (enable / disable)
1028 * \return None
1029 */
1030 IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode);
1031
1032 /******************************************************************************/
1033 /*-------------------------Global Function Prototypes-------------------------*/
1034 /******************************************************************************/
1035
1036 /** \brief API to get the address for ASCLIN HW module register memory map
1037 * \param asclin Resource index of the ASCLIN
1038 * \return ASCLIN module register address
1039 */
1040 IFX_EXTERN Ifx_ASCLIN *IfxAsclin_getAddress(IfxAsclin_Index asclin);
1041
1042 /** \brief Returns the ASCLIN module FA frequency in Hz
1043 * \param asclin pointer to ASCLIN registers
1044 * \return Returns the ASCLIN module FA frequency in Hz
1045 */
1046 IFX_EXTERN float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin);
1047
1048 /** \brief API to get the resource index of the ASCLIN specified.
1049 * \return asclin resource index
1050 */
1051 IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin);
1052
1053 /** \brief Returns the OVS frequency
1054 * \param asclin pointer to ASCLIN registers
1055 * \return Returns the ASCLIN module OVS frequency in Hz
1056 */
1057 IFX_EXTERN float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin);
1058
1059 /** \brief Returns the PD frequency
1060 * \param asclin pointer to ASCLIN registers
1061 * \return Returns the ASCLIN module PD frequency in Hz
1062 */
1063 IFX_EXTERN float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin);
1064
1065 /** \brief Returns the SHIFT frequency
1066 * \param asclin pointer to ASCLIN registers
1067 * \return Returns the ASCLIN module SHIFT frequency in Hz
1068 */
1069 IFX_EXTERN float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin);
1070
1071 /** \brief resets Asclin kernel
1072 * \param asclin pointer to ASCLIN resgisters
1073 * \return None
1074 */
1075 IFX_EXTERN void IfxAsclin_resetModule(Ifx_ASCLIN *asclin);
1076
1077 /** \} */
1078
1079 /** \addtogroup IfxLld_Asclin_Std_Configuration
1080 * \{ */
1081
1082 /******************************************************************************/
1083 /*-------------------------Inline Function Prototypes-------------------------*/
1084 /******************************************************************************/
1085
1086 /** \brief disables all flags
1087 * \param asclin pointer to ASCLIN registers
1088 * \return None
1089 */
1090 IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin);
1091
1092 /** \brief Enables/disables the auto baudrate detection
1093 * \param asclin pointer to ASCLIN registers
1094 * \param enable choice (enable / disable)
1095 * \return None
1096 */
1097 IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable);
1098
1099 /** \brief Enables/disables break detected flag
1100 * \param asclin pointer to ASCLIN registers
1101 * \param enable choice (enable / disable)
1102 * \return None
1103 */
1104 IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1105
1106 /** \brief Enables/disables the collision detection
1107 * \param asclin pointer to ASCLIN registers
1108 * \param enable choice (enable/disable)
1109 * \return None
1110 */
1111 IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable);
1112
1113 /** \brief Enables/disables LIN collision detection error flag
1114 * \param asclin pointer to ASCLIN registers
1115 * \param enable choice (enable / disable)
1116 * \return None
1117 */
1118 IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1119
1120 /** \brief Enables/disables CTS
1121 * \param asclin pointer to ASCLIN registers
1122 * \param enable choice (enable/disable)
1123 * \return None
1124 */
1125 IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable);
1126
1127 /** \brief Enables/disables falling edge detected flag
1128 * \param asclin pointer to ASCLIN registers
1129 * \param enable choice (enable / disable)
1130 * \return None
1131 */
1132 IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1133
1134 /** \brief Enables/disables frame error flag
1135 * \param asclin pointer to ASCLIN registers
1136 * \param enable choice (enable / disable)
1137 * \return None
1138 */
1139 IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1140
1141 /** \brief Enables/disables the hardware checksum
1142 * \param asclin pointer to ASCLIN registers
1143 * \param enable choice (enable / disable)
1144 * \return None
1145 */
1146 IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable);
1147
1148 /** \brief Enables/disables header timeout flag
1149 * \param asclin pointer to ASCLIN registers
1150 * \param enable choice (enable / disable)
1151 * \return None
1152 */
1153 IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable);
1154
1155 /** \brief Enables/disables LIN auto baudrate detection error flag
1156 * \param asclin pointer to ASCLIN registers
1157 * \param enable choice (enable / disable)
1158 * \return None
1159 */
1160 IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1161
1162 /** \brief Enables/disables LIN checksum error flag
1163 * \param asclin pointer to ASCLIN registers
1164 * \param enable choice (enable / disable)
1165 * \return None
1166 */
1167 IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1168
1169 /** \brief Enables/disables LIN parity error flag
1170 * \param asclin pointer to ASCLIN registers
1171 * \param enable choice (enable / disable)
1172 * \return None
1173 */
1174 IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1175
1176 /** \brief Enables/disables the loop back mode
1177 * \param asclin pointer to ASCLIN registers
1178 * \param enable choice (enable/disable)
1179 * \return None
1180 */
1181 IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable);
1182
1183 /** \brief Enables/disables the parity bit attachment to tha data bits
1184 * \param asclin pointer to ASCLIN registers
1185 * \param enable choice (enable/disable)
1186 * \return None
1187 */
1188 IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable);
1189
1190 /** \brief Enables/disables parity error flag
1191 * \param asclin pointer to ASCLIN registers
1192 * \param enable choice (enable / disable)
1193 * \return None
1194 */
1195 IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable);
1196
1197 /** \brief Enables/disables raising edge detected flag
1198 * \param asclin pointer to ASCLIN registers
1199 * \param enable choice (enable / disable)
1200 * \return None
1201 */
1202 IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable);
1203
1204 /** \brief Enables/disables response timeout flag
1205 * \param asclin pointer to ASCLIN registers
1206 * \param enable choice (enable / disable)
1207 * \return None
1208 */
1209 IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable);
1210
1211 /** \brief Enables/disables Rx FIFO level flag
1212 * \param asclin pointer to ASCLIN registers
1213 * \param enable choice (enable / disable)
1214 * \return None
1215 */
1216 IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable);
1217
1218 /** \brief Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register
1219 * \param asclin pointer to ASCLIN registers
1220 * \param enable choice (enable/disable)
1221 * \return None
1222 */
1223 IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable);
1224
1225 /** \brief Enables/disables Rx FIFO overflow flag
1226 * \param asclin pointer to ASCLIN registers
1227 * \param enable choice (enable / disable)
1228 * \return None
1229 */
1230 IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1231
1232 /** \brief Enables/disables Rx FIFO underflow flag
1233 * \param asclin pointer to ASCLIN registers
1234 * \param enable choice (enable / disable)
1235 * \return None
1236 */
1237 IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1238
1239 /** \brief Enables/disables receive header end flag
1240 * \param asclin pointer to ASCLIN registers
1241 * \param enable choice (enable / disable)
1242 * \return None
1243 */
1244 IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1245
1246 /** \brief Enables/disables receive response end flag
1247 * \param asclin pointer to ASCLIN registers
1248 * \param enable choice (enable / disable)
1249 * \return None
1250 */
1251 IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1252
1253 /** \brief Enables/disables transmission completed flag
1254 * \param asclin pointer to ASCLIN registers
1255 * \param enable choice (enable / disable)
1256 * \return None
1257 */
1258 IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable);
1259
1260 /** \brief Enables/disables Tx FIFO level flag
1261 * \param asclin pointer to ASCLIN registers
1262 * \param enable choice (enable / disable)
1263 * \return None
1264 */
1265 IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable);
1266
1267 /** \brief Enables/disables the transmit FIFO outlet to allow transmission
1268 * \param asclin pointer to ASCLIN registers
1269 * \param enable choice (enable/disable)
1270 * \return None
1271 */
1272 IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable);
1273
1274 /** \brief Enables/disables Tx FIFO overflow flag
1275 * \param asclin pointer to ASCLIN registers
1276 * \param enable choice (enable / disable)
1277 * \return None
1278 */
1279 IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable);
1280
1281 /** \brief Enables/disables transmit header end flag
1282 * \param asclin pointer to ASCLIN registers
1283 * \param enable choice (enable / disable)
1284 * \return None
1285 */
1286 IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1287
1288 /** \brief Enables/disables transmit response end flag
1289 * \param asclin pointer to ASCLIN registers
1290 * \param enable choice (enable / disable)
1291 * \return None
1292 */
1293 IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable);
1294
1295 /** \brief Returns the module's suspend state.
1296 * TRUE :if module is suspended.
1297 * FALSE:if module is not yet suspended.
1298 * \param asclin Pointer to ASCLIN module registers
1299 * \return Suspend status (TRUE / FALSE)
1300 */
1301 IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin);
1302
1303 /** \brief Selects the clock polarity
1304 * \param asclin pointer to ASCLIN registers
1305 * \param cpol CPOL selection
1306 * \return None
1307 */
1308 IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol);
1309
1310 /** \brief Selects the CTS input pin
1311 * \param asclin pointer to ASCLIN registers
1312 * \param ctsi CTS input pin selection
1313 * \return None
1314 */
1315 IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi);
1316
1317 /** \brief Selects the module's mode of operation
1318 * \param asclin pointer to ASCLIN registers
1319 * \param mode mode selction
1320 * \return None
1321 */
1322 IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode);
1323
1324 /** \brief Selects the RTS/CTS polarity
1325 * \param asclin pointer to ASCLIN registers
1326 * \param rcpol RCPOL selection
1327 * \return None
1328 */
1329 IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol);
1330
1331 /** \brief Selects the alternate input for Rx signal
1332 * \param asclin pointer to ASCLIN registers
1333 * \param alti alternate input selection of Rx signal
1334 * \return None
1335 */
1336 IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti);
1337
1338 /** \brief Selects the slave polarity
1339 * \param asclin pointer to ASCLIN registers
1340 * \param spol SPOL selection
1341 * \return None
1342 */
1343 IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol);
1344
1345 /** \brief Configure the Module to Hard/Soft suspend mode.
1346 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1347 * \param asclin Pointer to ASCLIN module registers
1348 * \param mode Module suspend mode
1349 * \return None
1350 */
1351 IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode);
1352
1353 /******************************************************************************/
1354 /*-------------------------Global Function Prototypes-------------------------*/
1355 /******************************************************************************/
1356
1357 /** \brief Set the bit timing
1358 *
1359 * \note this function required FA source and the PD frequency to be set to their final values
1360 * \param asclin pointer to ASCLIN registers
1361 * \param baudrate Required baudrate
1362 * \param oversampling The oversampling factor
1363 * \param samplepoint The sample point position
1364 * \param medianFilter Number of samples per bit (median filter)
1365 * \return TRUE if configuration was successfull
1366 */
1367 IFX_EXTERN boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter);
1368
1369 /** \} */
1370
1371 /** \addtogroup IfxLld_Asclin_Std_External
1372 * \{ */
1373
1374 /******************************************************************************/
1375 /*-------------------------Global Function Prototypes-------------------------*/
1376 /******************************************************************************/
1377
1378 /** \brief Disables the module
1379 * \param asclin pointer to ASCLIN registers
1380 * \return None
1381 */
1382 IFX_EXTERN void IfxAsclin_disableModule(Ifx_ASCLIN *asclin);
1383
1384 /** \brief Enables the ASC error interrupt Flags
1385 * \param asclin pointer to ASCLIN registers
1386 * \param parEnable parity error
1387 * \param rfoEnable Rx FIFO overflow error
1388 * \return None
1389 */
1390 IFX_EXTERN void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable);
1391
1392 /** \brief Enables the module
1393 * \param asclin pointer to ASCLIN registers
1394 * \return None
1395 */
1396 IFX_EXTERN void IfxAsclin_enableModule(Ifx_ASCLIN *asclin);
1397
1398 /** \brief Returns the SRC pointer for ERR
1399 * \param asclin pointer to ASCLIN registers
1400 */
1401 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin);
1402
1403 /** \brief Returns the SRC pointer for Rx
1404 * \param asclin pointer to ASCLIN registers
1405 */
1406 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin);
1407
1408 /** \brief Returns the SRC pointer for Tx
1409 * \param asclin pointer to ASCLIN registers
1410 */
1411 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin);
1412
1413 /** \brief Reads data up to 16 bits
1414 * \param asclin pointer to ASCLIN registers
1415 * \param data Array where the read data shall be stored
1416 * \param count number of items to read
1417 * \return number of items that could not be read
1418 */
1419 IFX_EXTERN uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count);
1420
1421 /** \brief Reads data up to 32 bits
1422 * \param asclin pointer to ASCLIN registers
1423 * \param data Array where the read data shall be stored
1424 * \param count number of items to read
1425 * \return number of items that could not be read
1426 */
1427 IFX_EXTERN uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count);
1428
1429 /** \brief Reads data up to 8 bits
1430 * \param asclin pointer to ASCLIN registers
1431 * \param data Array where the read data shall be stored
1432 * \param count number of items to read
1433 * \return number of items that could not be read
1434 */
1435 IFX_EXTERN uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count);
1436
1437 /** \brief Sets the baudrate bit fields
1438 * \param asclin pointer to ASCLIN registers
1439 * \param prescaler division ratio of the predivider
1440 * \param numerator numerator of the fractional divider
1441 * \param denominator denominator of the fractional divider
1442 * \param oversampling division ratio of the baudrate postdivider
1443 * \return None
1444 */
1445 IFX_EXTERN void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling);
1446
1447 /** \brief Sets the clock source
1448 * \param asclin pointer to ASCLIN registers
1449 * \param clockSource clock source selection
1450 * \return None
1451 */
1452 IFX_EXTERN void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource);
1453
1454 /** \brief Writes data up to 16 bits
1455 * \param asclin pointer to ASCLIN registers
1456 * \param data Array of data to be send
1457 * \param count number of items to be send
1458 * \return the number of items that could not be send
1459 */
1460 IFX_EXTERN uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count);
1461
1462 /** \brief Writes data up to 32 bits
1463 * \param asclin pointer to ASCLIN registers
1464 * \param data Array of data to be send
1465 * \param count number of items to be send
1466 * \return the number of items that could not be send
1467 */
1468 IFX_EXTERN uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count);
1469
1470 /** \brief Writes data up to 8 bits
1471 * \param asclin pointer to ASCLIN registers
1472 * \param data Array of data to be send
1473 * \param count number of items to be send
1474 * \return the number of items that could not be send
1475 */
1476 IFX_EXTERN uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count);
1477
1478 /** \} */
1479
1480 /** \addtogroup IfxLld_Asclin_Std_IO
1481 * \{ */
1482
1483 /******************************************************************************/
1484 /*-------------------------Inline Function Prototypes-------------------------*/
1485 /******************************************************************************/
1486
1487 /** \brief Initializes a CTS input
1488 *
1489 * Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.
1490 *
1491 * This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);
1492 *
1493 * After the function call, the current clock can be enabled again.
1494 * \param cts the CTS Pin which should be configured
1495 * \param inputMode the pin input mode which should be configured
1496 * \param padDriver the pad driver mode which should be configured
1497 * \return None
1498 */
1499 IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1500
1501 /** \brief Initializes a RTS output
1502 * \param rts the RTS Pin which should be configured
1503 * \param outputMode the pin output mode which should be configured
1504 * \param padDriver the pad driver mode which should be configured
1505 * \return None
1506 */
1507 IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1508
1509 /** \brief Initializes a RX input
1510 *
1511 * Attention: the kernel clock has to be disabled whenever the input multiplexer is changed.
1512 *
1513 * This can be done with IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock);
1514 *
1515 * After the function call, the current clock can be enabled again.
1516 * \param rx the RX Pin which should be configured
1517 * \param inputMode the pin input mode which should be configured
1518 * \param padDriver the pad driver mode which should be configured
1519 * \return None
1520 */
1521 IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1522
1523 /** \brief Initializes a SCLK output
1524 * \param sclk the SCLK Pin which should be configured
1525 * \param outputMode the pin output mode which should be configured
1526 * \param padDriver the pad driver mode which should be configured
1527 * \return None
1528 */
1529 IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1530
1531 /** \brief Initializes a SLSO output
1532 * \param slso the SLSO Pin which should be configured
1533 * \param outputMode the pin output mode which should be configured
1534 * \param padDriver the pad driver mode which should be configured
1535 * \return None
1536 */
1537 IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1538
1539 /** \brief Initializes a TX output
1540 * \param tx the TX Pin which should be configured
1541 * \param outputMode the pin output mode which should be configured
1542 * \param padDriver the pad driver mode which should be configured
1543 * \return None
1544 */
1545 IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1546
1547 /** \} */
1548
1549 /******************************************************************************/
1550 /*-------------------------Inline Function Prototypes-------------------------*/
1551 /******************************************************************************/
1552
1553 /**
1554 * \param asclin pointer to ASCLIN registers
1555 * \return returns the value of RxDATA register
1556 */
1557 IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin);
1558
1559 /**
1560 * \param asclin pointer to ASCLIN registers
1561 * \param data data to be written
1562 * \return None
1563 */
1564 IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data);
1565
1566 /** \brief Returns the status of all error flags
1567 * \param asclin pointer to ASCLIN registers
1568 * \return status
1569 */
1570 IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin);
1571
1572 /******************************************************************************/
1573 /*---------------------Inline Function Implementations------------------------*/
1574 /******************************************************************************/
1575
1576 IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
1577 {
1578 asclin->FLAGSCLEAR.U = 0xFFFFFFFF;
1579 }
1580
1581
1582 IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
1583 {
1584 asclin->FLAGSCLEAR.B.BDC = 1;
1585 }
1586
1587
1588 IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
1589 {
1590 asclin->FLAGSCLEAR.B.CEC = 1;
1591 }
1592
1593
1594 IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
1595 {
1596 asclin->FLAGSCLEAR.B.FEDC = 1;
1597 }
1598
1599
1600 IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
1601 {
1602 asclin->FLAGSCLEAR.B.FEC = 1;
1603 }
1604
1605
1606 IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
1607 {
1608 asclin->FLAGSCLEAR.B.HTC = 1;
1609 }
1610
1611
1612 IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin)
1613 {
1614 asclin->KRSTCLR.B.CLR = 1;
1615 }
1616
1617
1618 IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
1619 {
1620 asclin->FLAGSCLEAR.B.LAC = 1;
1621 }
1622
1623
1624 IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
1625 {
1626 asclin->FLAGSCLEAR.B.LCC = 1;
1627 }
1628
1629
1630 IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
1631 {
1632 asclin->FLAGSCLEAR.B.LPC = 1;
1633 }
1634
1635
1636 IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
1637 {
1638 asclin->FLAGSCLEAR.B.PEC = 1;
1639 }
1640
1641
1642 IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
1643 {
1644 asclin->FLAGSCLEAR.B.REDC = 1;
1645 }
1646
1647
1648 IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
1649 {
1650 asclin->FLAGSCLEAR.B.RTC = 1;
1651 }
1652
1653
1654 IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
1655 {
1656 asclin->FLAGSCLEAR.B.RFLC = 1;
1657 }
1658
1659
1660 IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
1661 {
1662 asclin->FLAGSCLEAR.B.RFOC = 1;
1663 }
1664
1665
1666 IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
1667 {
1668 asclin->FLAGSCLEAR.B.RFUC = 1;
1669 }
1670
1671
1672 IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
1673 {
1674 asclin->FLAGSCLEAR.B.RHC = 1;
1675 }
1676
1677
1678 IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
1679 {
1680 asclin->FLAGSCLEAR.B.RRC = 1;
1681 }
1682
1683
1684 IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
1685 {
1686 asclin->FLAGSCLEAR.B.TCC = 1;
1687 }
1688
1689
1690 IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
1691 {
1692 asclin->FLAGSCLEAR.B.TFLC = 1;
1693 }
1694
1695
1696 IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
1697 {
1698 asclin->FLAGSCLEAR.B.TFOC = 1;
1699 }
1700
1701
1702 IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
1703 {
1704 asclin->FLAGSCLEAR.B.THC = 1;
1705 }
1706
1707
1708 IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
1709 {
1710 asclin->FLAGSCLEAR.B.TRC = 1;
1711 }
1712
1713
1714 IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
1715 {
1716 asclin->FLAGSENABLE.U = 0x00000000;
1717 }
1718
1719
1720 IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
1721 {
1722 asclin->LIN.CON.B.ABD = enable ? 1 : 0;
1723 }
1724
1725
1726 IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1727 {
1728 asclin->FLAGSENABLE.B.BDE = enable ? 1 : 0;
1729 }
1730
1731
1732 IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
1733 {
1734 asclin->FRAMECON.B.CEN = enable ? 1 : 0;
1735 }
1736
1737
1738 IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1739 {
1740 asclin->FLAGSENABLE.B.CEE = enable ? 1 : 0;
1741 }
1742
1743
1744 IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable)
1745 {
1746 asclin->IOCR.B.CTSEN = enable ? 1 : 0;
1747 }
1748
1749
1750 IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1751 {
1752 asclin->FLAGSENABLE.B.FEDE = enable ? 1 : 0;
1753 }
1754
1755
1756 IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1757 {
1758 asclin->FLAGSENABLE.B.FEE = enable ? 1 : 0;
1759 }
1760
1761
1762 IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
1763 {
1764 asclin->LIN.CON.B.CSEN = enable ? 1 : 0;
1765 }
1766
1767
1768 IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
1769 {
1770 asclin->FLAGSENABLE.B.HTE = enable ? 1 : 0;
1771 }
1772
1773
1774 IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1775 {
1776 asclin->FLAGSENABLE.B.ABE = enable ? 1 : 0;
1777 }
1778
1779
1780 IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1781 {
1782 asclin->FLAGSENABLE.B.LCE = enable ? 1 : 0;
1783 }
1784
1785
1786 IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1787 {
1788 asclin->FLAGSENABLE.B.LPE = enable ? 1 : 0;
1789 }
1790
1791
1792 IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
1793 {
1794 asclin->IOCR.B.LB = enable ? 1 : 0;
1795 }
1796
1797
1798 IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
1799 {
1800 asclin->FRAMECON.B.PEN = enable ? 1 : 0;
1801 }
1802
1803
1804 IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
1805 {
1806 asclin->FLAGSENABLE.B.PEE = enable ? 1 : 0;
1807 }
1808
1809
1810 IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
1811 {
1812 asclin->FLAGSENABLE.B.REDE = enable ? 1 : 0;
1813 }
1814
1815
1816 IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
1817 {
1818 asclin->FLAGSENABLE.B.RTE = enable ? 1 : 0;
1819 }
1820
1821
1822 IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
1823 {
1824 asclin->FLAGSENABLE.B.RFLE = enable ? 1 : 0;
1825 }
1826
1827
1828 IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
1829 {
1830 asclin->RXFIFOCON.B.ENI = enable ? 1 : 0;
1831 }
1832
1833
1834 IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1835 {
1836 asclin->FLAGSENABLE.B.RFOE = enable ? 1 : 0;
1837 }
1838
1839
1840 IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1841 {
1842 asclin->FLAGSENABLE.B.RFUE = enable ? 1 : 0;
1843 }
1844
1845
1846 IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1847 {
1848 asclin->FLAGSENABLE.B.RHE = enable ? 1 : 0;
1849 }
1850
1851
1852 IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1853 {
1854 asclin->FLAGSENABLE.B.RRE = enable ? 1 : 0;
1855 }
1856
1857
1858 IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable)
1859 {
1860 asclin->FLAGSENABLE.B.TCE = enable ? 1 : 0;
1861 }
1862
1863
1864 IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
1865 {
1866 asclin->FLAGSENABLE.B.TFLE = enable ? 1 : 0;
1867 }
1868
1869
1870 IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
1871 {
1872 asclin->TXFIFOCON.B.ENO = enable ? 1 : 0;
1873 }
1874
1875
1876 IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
1877 {
1878 asclin->FLAGSENABLE.B.TFOE = enable ? 1 : 0;
1879 }
1880
1881
1882 IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1883 {
1884 asclin->FLAGSENABLE.B.THE = enable ? 1 : 0;
1885 }
1886
1887
1888 IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
1889 {
1890 asclin->FLAGSENABLE.B.TRE = enable ? 1 : 0;
1891 }
1892
1893
1894 IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
1895 {
1896 asclin->RXFIFOCON.B.FLUSH = 1;
1897 }
1898
1899
1900 IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
1901 {
1902 asclin->TXFIFOCON.B.FLUSH = 1;
1903 }
1904
1905
1906 IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
1907 {
1908 return asclin->FLAGS.B.BD;
1909 }
1910
1911
1912 IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
1913 {
1914 return asclin->CSR.B.CLKSEL;
1915 }
1916
1917
1918 IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
1919 {
1920 return asclin->CSR.B.CON;
1921 }
1922
1923
1924 IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
1925 {
1926 return asclin->FLAGS.B.CE;
1927 }
1928
1929
1930 IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
1931 {
1932 return asclin->FLAGS.B.FED;
1933 }
1934
1935
1936 IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
1937 {
1938 return asclin->FLAGS.B.FE;
1939 }
1940
1941
1942 IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
1943 {
1944 return asclin->FLAGS.B.HT;
1945 }
1946
1947
1948 IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin)
1949 {
1950 return asclin->KRST0.B.RSTSTAT;
1951 }
1952
1953
1954 IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
1955 {
1956 return asclin->FLAGS.B.LA;
1957 }
1958
1959
1960 IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
1961 {
1962 return asclin->FLAGS.B.LC;
1963 }
1964
1965
1966 IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
1967 {
1968 return asclin->FLAGS.B.LP;
1969 }
1970
1971
1972 IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin)
1973 {
1974 return asclin->CLC.B.DISS;
1975 }
1976
1977
1978 IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
1979 {
1980 return asclin->FLAGS.B.PE;
1981 }
1982
1983
1984 IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin)
1985 {
1986 return asclin->BITCON.B.PRESCALER + 1;
1987 }
1988
1989
1990 IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
1991 {
1992 return asclin->FLAGS.B.RED;
1993 }
1994
1995
1996 IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin)
1997 {
1998 return asclin->IOCR.B.RXM;
1999 }
2000
2001
2002 IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
2003 {
2004 return asclin->FLAGS.B.RT;
2005 }
2006
2007
2008 IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
2009 {
2010 return asclin->RXFIFOCON.B.FILL;
2011 }
2012
2013
2014 IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
2015 {
2016 return asclin->FLAGS.B.RFL;
2017 }
2018
2019
2020 IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin)
2021 {
2022 return asclin->RXFIFOCON.B.OUTW;
2023 }
2024
2025
2026 IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
2027 {
2028 return asclin->FLAGS.B.RFO;
2029 }
2030
2031
2032 IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
2033 {
2034 return asclin->FLAGS.B.RFU;
2035 }
2036
2037
2038 IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
2039 {
2040 return asclin->FLAGS.B.RH;
2041 }
2042
2043
2044 IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
2045 {
2046 return asclin->FLAGS.B.RR;
2047 }
2048
2049
2050 IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
2051 {
2052 return asclin->FLAGS.B.TC;
2053 }
2054
2055
2056 IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin)
2057 {
2058 return asclin->IOCR.B.TXM;
2059 }
2060
2061
2062 IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
2063 {
2064 return asclin->TXFIFOCON.B.FILL;
2065 }
2066
2067
2068 IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
2069 {
2070 return asclin->FLAGS.B.TFL;
2071 }
2072
2073
2074 IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin)
2075 {
2076 return asclin->TXFIFOCON.B.INW;
2077 }
2078
2079
2080 IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
2081 {
2082 return asclin->FLAGS.B.TFO;
2083 }
2084
2085
2086 IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
2087 {
2088 return asclin->FLAGS.B.TH;
2089 }
2090
2091
2092 IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
2093 {
2094 return asclin->FLAGS.B.TR;
2095 }
2096
2097
2098 IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
2099 {
2100 if (cts->pin.port != NULL_PTR)
2101 {
2102 IfxPort_setPinModeInput(cts->pin.port, cts->pin.pinIndex, inputMode);
2103 IfxPort_setPinPadDriver(cts->pin.port, cts->pin.pinIndex, padDriver);
2104 IfxAsclin_enableCts(cts->module, TRUE);
2105 IfxAsclin_setCtsInput(cts->module, (IfxAsclin_CtsInputSelect)cts->select);
2106 }
2107 }
2108
2109
2110 IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2111 {
2112 IfxPort_setPinModeOutput(rts->pin.port, rts->pin.pinIndex, outputMode, rts->select);
2113 IfxPort_setPinPadDriver(rts->pin.port, rts->pin.pinIndex, padDriver);
2114 }
2115
2116
2117 IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
2118 {
2119 if (rx->pin.port != NULL_PTR)
2120 {
2121 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
2122 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
2123 IfxAsclin_setRxInput(rx->module, (IfxAsclin_RxInputSelect)rx->select);
2124 }
2125 }
2126
2127
2128 IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2129 {
2130 IfxPort_setPinModeOutput(sclk->pin.port, sclk->pin.pinIndex, outputMode, sclk->select);
2131 IfxPort_setPinPadDriver(sclk->pin.port, sclk->pin.pinIndex, padDriver);
2132 }
2133
2134
2135 IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2136 {
2137 IfxPort_setPinModeOutput(slso->pin.port, slso->pin.pinIndex, outputMode, slso->select);
2138 IfxPort_setPinPadDriver(slso->pin.port, slso->pin.pinIndex, padDriver);
2139 }
2140
2141
2142 IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2143 {
2144 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
2145 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
2146 }
2147
2148
2149 IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin)
2150 {
2151 Ifx_ASCLIN_OCS ocs;
2152
2153 // read the status
2154 ocs.U = asclin->OCS.U;
2155
2156 // return the status
2157 return ocs.B.SUSSTA;
2158 }
2159
2160
2161 IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
2162 {
2163 return asclin->RXDATA.U;
2164 }
2165
2166
2167 IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
2168 {
2169 asclin->BRD.B.LOWERLIMIT = limit;
2170 }
2171
2172
2173 IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
2174 {
2175 asclin->BRD.B.UPPERLIMIT = limit;
2176 }
2177
2178
2179 IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
2180 {
2181 asclin->LIN.CON.B.CSI = csi;
2182 }
2183
2184
2185 IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
2186 {
2187 asclin->DATCON.B.CSM = mode;
2188 }
2189
2190
2191 IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
2192 {
2193 asclin->IOCR.B.CPOL = cpol;
2194 }
2195
2196
2197 IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
2198 {
2199 asclin->IOCR.B.CTS = ctsi;
2200 }
2201
2202
2203 IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
2204 {
2205 asclin->DATCON.B.DATLEN = length;
2206 }
2207
2208
2209 IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
2210 {
2211 asclin->BRG.B.DENOMINATOR = denominator;
2212 }
2213
2214
2215 IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
2216 {
2217 asclin->CLC.B.DISR = 1;
2218 }
2219
2220
2221 IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
2222 {
2223 asclin->CLC.B.DISR = 0;
2224 }
2225
2226
2227 IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth)
2228 {
2229 asclin->IOCR.B.DEPTH = __minu(depth, 63);
2230 }
2231
2232
2233 IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
2234 {
2235 asclin->FRAMECON.B.MODE = mode;
2236 }
2237
2238
2239 IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
2240 {
2241 asclin->DATCON.B.HO = type;
2242 }
2243
2244
2245 IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
2246 {
2247 asclin->FRAMECON.B.IDLE = delay;
2248 }
2249
2250
2251 IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin)
2252 {
2253 asclin->KRST1.B.RST = 1;
2254 }
2255
2256
2257 IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin)
2258 {
2259 asclin->KRST0.B.RST = 1;
2260 }
2261
2262
2263 IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
2264 {
2265 asclin->FRAMECON.B.LEAD = delay;
2266 }
2267
2268
2269 IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
2270 {
2271 asclin->LIN.BTIMER.B.BREAK = length;
2272 }
2273
2274
2275 IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
2276 {
2277 asclin->LIN.HTIMER.B.HEADER = timeout;
2278 }
2279
2280
2281 IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
2282 {
2283 asclin->LIN.CON.B.MS = mode;
2284 }
2285
2286
2287 IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
2288 {
2289 asclin->DATCON.B.RM = mode;
2290 }
2291
2292
2293 IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
2294 {
2295 asclin->DATCON.B.RESPONSE = __minu(threshold, 256);
2296 }
2297
2298
2299 IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
2300 {
2301 asclin->BRG.B.NUMERATOR = numerator;
2302 }
2303
2304
2305 IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
2306 {
2307 asclin->BITCON.B.OVERSAMPLING = ovsFactor;
2308 }
2309
2310
2311 IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
2312 {
2313 asclin->FRAMECON.B.ODD = type;
2314 }
2315
2316
2317 IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
2318 {
2319 asclin->BITCON.B.PRESCALER = prescaler - 1;
2320 }
2321
2322
2323 IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
2324 {
2325 asclin->IOCR.B.RCPOL = rcpol;
2326 }
2327
2328
2329 IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
2330 {
2331 asclin->RXFIFOCON.B.BUF = mode;
2332 }
2333
2334
2335 IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
2336 {
2337 asclin->RXFIFOCON.B.INTLEVEL = __minu(level, 15);
2338 }
2339
2340
2341 IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
2342 {
2343 asclin->RXFIFOCON.B.OUTW = width;
2344 }
2345
2346
2347 IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
2348 {
2349 asclin->IOCR.B.ALTI = alti;
2350 }
2351
2352
2353 IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
2354 {
2355 asclin->BITCON.B.SM = medianFilter;
2356 }
2357
2358
2359 IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
2360 {
2361 asclin->BITCON.B.SAMPLEPOINT = __minu(spPosition, asclin->BITCON.B.OVERSAMPLING);
2362 }
2363
2364
2365 IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
2366 {
2367 asclin->FRAMECON.B.MSB = dir;
2368 }
2369
2370
2371 IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
2372 {
2373 asclin->IOCR.B.SPOL = spol;
2374 }
2375
2376
2377 IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
2378 {
2379 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2380 IfxScuWdt_clearCpuEndinit(passwd);
2381 asclin->CLC.B.EDIS = mode;
2382 IfxScuWdt_setCpuEndinit(passwd);
2383 }
2384
2385
2386 IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
2387 {
2388 asclin->FRAMECON.B.STOP = stopBit;
2389 }
2390
2391
2392 IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
2393 {
2394 Ifx_ASCLIN_OCS ocs;
2395
2396 // remove protection and configure the suspend mode.
2397 ocs.B.SUS_P = 1;
2398 ocs.B.SUS = mode;
2399 asclin->OCS.U = ocs.U;
2400 }
2401
2402
2403 IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
2404 {
2405 asclin->FLAGSSET.B.THRQS = 1;
2406 }
2407
2408
2409 IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
2410 {
2411 asclin->FLAGSSET.B.TRRQS = 1;
2412 }
2413
2414
2415 IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin)
2416 {
2417 asclin->FLAGSSET.B.TWRQS = 1;
2418 }
2419
2420
2421 IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
2422 {
2423 asclin->TXFIFOCON.B.INW = width;
2424 }
2425
2426
2427 IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
2428 {
2429 asclin->TXFIFOCON.B.INTLEVEL = __minu(level, 15);
2430 }
2431
2432
2433 IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
2434 {
2435 asclin->TXDATA.U = data;
2436 }
2437
2438
2439 IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin)
2440 {
2441 return (uint16)(asclin->FLAGS.U >> 16);
2442 }
2443
2444
2445 #endif /* IFXASCLIN_H */
IfxAsclin_SamplePointPosition_13
sample point position at 13
Definition: IfxAsclin.h:318
IfxAsclin_getAddress
IFX_EXTERN Ifx_ASCLIN * IfxAsclin_getAddress(IfxAsclin_Index asclin)
API to get the address for ASCLIN HW module register memory map.
Definition: IfxAsclin.c:60
IfxAsclin_TxFifoInterruptLevel_15
TX FIFO level 15.
Definition: IfxAsclin.h:424
IfxAsclin_OversamplingFactor_5
oversampling factor 5
Definition: IfxAsclin.h:211
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:39
IfxAsclin_RxFifoInterruptLevel_7
RX FIFO level 7.
Definition: IfxAsclin.h:263
IfxAsclin_enableFallingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_enableFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables falling edge detected flag.
Definition: IfxAsclin.h:1750
IfxAsclin_SuspendMode_hard
Hard Suspend.
Definition: IfxAsclin.h:389
IfxAsclin_write32
IFX_EXTERN uint32 IfxAsclin_write32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Writes data up to 32 bits.
Definition: IfxAsclin.c:371
IfxAsclin_SamplePointPosition_12
sample point position at 12
Definition: IfxAsclin.h:317
IfxAsclin_setLinResponseTimeoutMode
IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode.
Definition: IfxAsclin.h:2287
IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status.
Definition: IfxAsclin.h:1954
IfxAsclin_setNumerator
IFX_INLINE void IfxAsclin_setNumerator(Ifx_ASCLIN *asclin, uint16 numerator)
Sets the numerator of the fractional divider.
Definition: IfxAsclin.h:2299
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin_IdleDelay_3
idle delay in 3 bit times
Definition: IfxAsclin.h:164
IfxAsclin_ClockPolarity_idleLow
idle low
Definition: IfxAsclin.h:83
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:161
IfxAsclin_RtsCtsPolarity_activeHigh
ready/clear are active-high
Definition: IfxAsclin.h:248
IfxAsclin_getIndex
IFX_EXTERN IfxAsclin_Index IfxAsclin_getIndex(Ifx_ASCLIN *asclin)
API to get the resource index of the ASCLIN specified.
Definition: IfxAsclin.c:111
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:237
IfxAsclin_RxFifoInterruptLevel_8
RX FIFO level 8.
Definition: IfxAsclin.h:264
IfxAsclin_getResponseTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the response timeout flag status.
Definition: IfxAsclin.h:2002
IfxAsclin_getModuleStatus
IFX_INLINE boolean IfxAsclin_getModuleStatus(Ifx_ASCLIN *asclin)
Returns the module status.
Definition: IfxAsclin.h:1972
IfxAsclin_initCtsPin
IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input.
Definition: IfxAsclin.h:2098
IfxAsclin_DataLength_6
number of bits per transfer 5
Definition: IfxAsclin.h:121
IfxAsclin_getCollisionDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the collision detection error flag status.
Definition: IfxAsclin.h:1924
IfxAsclin_clearKernelResetStatus
IFX_INLINE void IfxAsclin_clearKernelResetStatus(Ifx_ASCLIN *asclin)
Clears the kernel reset status.
Definition: IfxAsclin.h:1612
IfxAsclin_SamplePointPosition_1
sample point position at 1
Definition: IfxAsclin.h:306
IfxAsclin_OversamplingFactor_16
oversampling factor 16
Definition: IfxAsclin.h:222
IfxAsclin_getShiftFrequency
IFX_EXTERN float32 IfxAsclin_getShiftFrequency(Ifx_ASCLIN *asclin)
Returns the SHIFT frequency.
Definition: IfxAsclin.c:143
IfxAsclin_TxFifoInterruptLevel_6
TX FIFO level 6.
Definition: IfxAsclin.h:415
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2245
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:239
IfxAsclin_resetModule
IFX_EXTERN void IfxAsclin_resetModule(Ifx_ASCLIN *asclin)
resets Asclin kernel
Definition: IfxAsclin.c:209
IfxAsclin_initSlsoPin
IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxAsclin.h:2135
IfxAsclin_setSleepMode
IFX_INLINE void IfxAsclin_setSleepMode(Ifx_ASCLIN *asclin, IfxAsclin_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxAsclin.h:2377
IfxAsclin_getTxFifoFillLevelFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO level flag status.
Definition: IfxAsclin.h:2068
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:338
IfxAsclin_TxFifoInterruptLevel_0
TX FIFO level 0.
Definition: IfxAsclin.h:409
IfxAsclin_read32
IFX_EXTERN uint32 IfxAsclin_read32(Ifx_ASCLIN *asclin, uint32 *data, uint32 count)
Reads data up to 32 bits.
Definition: IfxAsclin.c:181
IfxAsclin_Status_configurationError
Configuration error.
Definition: IfxAsclin.h:365
IfxAsclin_StopBit_6
number of stop bits 6
Definition: IfxAsclin.h:380
IfxAsclin_getSrcPointerEr
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:149
IfxAsclin_ClockPolarity_idleHigh
idle high
Definition: IfxAsclin.h:84
IfxAsclin_CtsInputSelect_3
CTS input pin 3.
Definition: IfxAsclin.h:108
IfxAsclin_RxFifoInterruptLevel_11
RX FIFO level 11.
Definition: IfxAsclin.h:267
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:63
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2032
IfxAsclin_ShiftDirection_msbFirst
MSB first.
Definition: IfxAsclin.h:339
IfxAsclin_DataLength_2
number of bits per transfer 1
Definition: IfxAsclin.h:117
IfxAsclin_enableCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_enableCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN collision detection error flag.
Definition: IfxAsclin.h:1738
IfxAsclin_TxFifoInterruptLevel_9
TX FIFO level 9.
Definition: IfxAsclin.h:418
IfxAsclin_clearTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag.
Definition: IfxAsclin.h:1690
IfxAsclin_SamplePointPosition_14
sample point position at 14
Definition: IfxAsclin.h:319
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2080
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:326
IfxAsclin_TxFifoInterruptLevel_7
TX FIFO level 7.
Definition: IfxAsclin.h:416
IfxAsclin_getOvsFrequency
IFX_EXTERN float32 IfxAsclin_getOvsFrequency(Ifx_ASCLIN *asclin)
Returns the OVS frequency.
Definition: IfxAsclin.c:131
IfxAsclin_TxFifoInterruptLevel_1
TX FIFO level 1.
Definition: IfxAsclin.h:410
IfxAsclin_ClockSource_ascFastClock
f asclinf wiil be supplied
Definition: IfxAsclin.h:96
IfxAsclin_enableModule
IFX_EXTERN void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:51
IfxAsclin_getFaFrequency
IFX_EXTERN float32 IfxAsclin_getFaFrequency(Ifx_ASCLIN *asclin)
Returns the ASCLIN module FA frequency in Hz.
Definition: IfxAsclin.c:77
IfxAsclin_TxFifoInterruptLevel_5
TX FIFO level 5.
Definition: IfxAsclin.h:414
IfxAsclin_getFallingEdgeDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getFallingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the falling edge detected flag status.
Definition: IfxAsclin.h:1930
IfxAsclin_setLinHeaderTimeout
IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout.
Definition: IfxAsclin.h:2275
IfxAsclin_SamplePointPosition_5
sample point position at 5
Definition: IfxAsclin.h:310
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:278
IfxAsclin_LeadDelay_3
lead delay in 3 bit times
Definition: IfxAsclin.h:180
IfxAsclin_SamplePointPosition_4
sample point position at 4
Definition: IfxAsclin.h:309
IfxAsclin_SamplePointPosition_15
sample point position at 15
Definition: IfxAsclin.h:320
IfxAsclin_getLinParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status.
Definition: IfxAsclin.h:1966
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1900
IfxAsclin_CtsInputSelect_2
CTS input pin 2.
Definition: IfxAsclin.h:107
IfxAsclin_RxFifoOutletWidth_0
number of bytes 0
Definition: IfxAsclin.h:280
IfxAsclin_clearTxResponseEndFlag
IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit response end flag.
Definition: IfxAsclin.h:1708
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:58
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:257
IfxAsclin_OversamplingFactor_13
oversampling factor 13
Definition: IfxAsclin.h:219
IfxAsclin_IdleDelay_4
idle delay in 4 bit times
Definition: IfxAsclin.h:165
IfxAsclin_enableRxResponseEndFlag
IFX_INLINE void IfxAsclin_enableRxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive response end flag.
Definition: IfxAsclin.h:1852
float32
float float32
Definition: Platform_Types.h:167
IfxAsclin_Cts_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxAsclin_PinMap.h:42
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:71
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2117
IfxAsclin_setDenominator
IFX_INLINE void IfxAsclin_setDenominator(Ifx_ASCLIN *asclin, uint16 denominator)
Sets the denominator of the fractional divider.
Definition: IfxAsclin.h:2209
IfxAsclin_RxFifoInterruptLevel_5
RX FIFO level 5.
Definition: IfxAsclin.h:261
IfxAsclin_OversamplingFactor_7
oversampling factor 7
Definition: IfxAsclin.h:213
IfxAsclin_StopBit_3
number of stop bits 3
Definition: IfxAsclin.h:377
IfxAsclin_setBrdUpperlimt
IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s upper limit.
Definition: IfxAsclin.h:2173
IfxAsclin_SuspendMode_none
No suspend.
Definition: IfxAsclin.h:388
IfxAsclin_Rts_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxAsclin_PinMap.h:59
IfxAsclin_getRxFifoOutletWidth
IFX_INLINE uint8 IfxAsclin_getRxFifoOutletWidth(Ifx_ASCLIN *asclin)
Returns the receive FIFO inlet width.
Definition: IfxAsclin.h:2020
IfxAsclin_getTxFifoInletWidth
IFX_INLINE uint8 IfxAsclin_getTxFifoInletWidth(Ifx_ASCLIN *asclin)
Returns the transmit FIFO inlet width.
Definition: IfxAsclin.h:2074
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:372
IfxAsclin_DataLength_12
number of bits per transfer 11
Definition: IfxAsclin.h:127
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1576
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxAsclin_DataLength_4
number of bits per transfer 3
Definition: IfxAsclin.h:119
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:289
IfxAsclin_Checksum
IfxAsclin_Checksum
Defines if the classic or the enhanced checksum will be calculated by the checksum block...
Definition: IfxAsclin.h:62
IfxAsclin_RxFifoInterruptLevel_13
RX FIFO level 13.
Definition: IfxAsclin.h:269
IfxAsclin_RxFifoInterruptLevel_16
RX FIFO level 16.
Definition: IfxAsclin.h:272
IfxSrc.h
SRC basic functionality.
IfxAsclin_LinMode
IfxAsclin_LinMode
Configures if the module in LIN mode operates as master or slave Definition in Ifx_ASCLIN.LIN.CON.B.MS.
Definition: IfxAsclin.h:190
IfxAsclin_DataLength_16
number of bits per transfer 15
Definition: IfxAsclin.h:131
IfxAsclin_TxFifoInterruptLevel_8
TX FIFO level 8.
Definition: IfxAsclin.h:417
IfxAsclin_LinResponseTimeoutMode
IfxAsclin_LinResponseTimeoutMode
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout...
Definition: IfxAsclin.h:199
IfxCpu_Intrinsics.h
IfxAsclin_ChecksumInjection_written
checksum byte is written
Definition: IfxAsclin.h:74
IfxAsclin_getReceiveSignalStatus
IFX_INLINE boolean IfxAsclin_getReceiveSignalStatus(Ifx_ASCLIN *asclin)
Returns the received signal status.
Definition: IfxAsclin.h:1996
IfxAsclin_clearLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag.
Definition: IfxAsclin.h:1618
IfxAsclin_OversamplingFactor_11
oversampling factor 11
Definition: IfxAsclin.h:217
IfxAsclin_LeadDelay_2
lead delay in 2 bit times
Definition: IfxAsclin.h:179
IfxAsclin_clearRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag.
Definition: IfxAsclin.h:1654
IfxAsclin_HeaderResponseSelect
IfxAsclin_HeaderResponseSelect
Defines if LIN frame shall consist of a header and response or of a header only. Definition in Ifx_AS...
Definition: IfxAsclin.h:148
IfxAsclin_DataLength_1
number of bits per transfer 0
Definition: IfxAsclin.h:116
IfxAsclin_setLinBreakLength
IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length.
Definition: IfxAsclin.h:2269
IfxAsclin_PinMap.h
ASCLIN I/O map.
IfxAsclin_OversamplingFactor_15
oversampling factor 15
Definition: IfxAsclin.h:221
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:255
IfxAsclin_LinResponseTimeoutMode_frameTimeout
timeout threshold is for frame
Definition: IfxAsclin.h:201
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxAsclin_enableCollisionDetection
IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection.
Definition: IfxAsclin.h:1732
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1666
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxAsclin_RxFifoInterruptLevel_14
RX FIFO level 14.
Definition: IfxAsclin.h:270
IfxAsclin_TxFifoInletWidth_3
number of bytes 3
Definition: IfxAsclin.h:401
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2311
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1822
IfxAsclin_setBitTiming
IFX_EXTERN boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:240
IfxAsclin_setTransmitHeaderRequestFlag
IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit header request flag.
Definition: IfxAsclin.h:2403
IfxAsclin_DataLength_11
number of bits per transfer 10
Definition: IfxAsclin.h:126
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2341
IfxAsclin_setKernelResetZero
IFX_INLINE void IfxAsclin_setKernelResetZero(Ifx_ASCLIN *asclin)
Sets the kernel reset of the KRST0.
Definition: IfxAsclin.h:2257
IfxAsclin_ChecksumInjection_notWritten
checksum byte is not written
Definition: IfxAsclin.h:73
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:407
IfxAsclin_IdleDelay_2
idle delay in 2 bit times
Definition: IfxAsclin.h:163
IfxAsclin_ClockSource_oscillatorClock
XTAL oscillator clock foso0 will be supplied.
Definition: IfxAsclin.h:94
IfxAsclin_RxFifoInterruptLevel_9
RX FIFO level 9.
Definition: IfxAsclin.h:265
IfxAsclin_SamplePointPosition_10
sample point position at 10
Definition: IfxAsclin.h:315
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1804
IfxAsclin_ParityType_odd
odd parity
Definition: IfxAsclin.h:231
IfxScuWdt.h
SCU basic functionality.
IfxAsclin_Cts_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxAsclin_PinMap.h:43
IfxAsclin_DataLength_9
number of bits per transfer 8
Definition: IfxAsclin.h:124
IfxAsclin_getTxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit header end flag status.
Definition: IfxAsclin.h:2086
IfxAsclin_CtsInputSelect_1
CTS input pin 1.
Definition: IfxAsclin.h:106
IfxAsclin_DataLength_10
number of bits per transfer 9
Definition: IfxAsclin.h:125
IfxAsclin_enableTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag.
Definition: IfxAsclin.h:1876
IfxAsclin_getSrcPointerTx
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:161
IfxAsclin_SlavePolarity_idlehigh
idle high
Definition: IfxAsclin.h:349
IfxAsclin_setClockPolarity
IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity.
Definition: IfxAsclin.h:2191
IfxAsclin_enableRaisingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_enableRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables raising edge detected flag.
Definition: IfxAsclin.h:1810
IfxAsclin_clearParityErrorFlag
IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the parity error flag.
Definition: IfxAsclin.h:1636
IfxAsclin_enableCts
IFX_INLINE void IfxAsclin_enableCts(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables CTS.
Definition: IfxAsclin.h:1744
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:208
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxAsclin_enableHardwareChecksum
IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum.
Definition: IfxAsclin.h:1762
IfxAsclin_getRxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive response end flag status.
Definition: IfxAsclin.h:2044
IfxAsclin_setChecksumInjection
IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection.
Definition: IfxAsclin.h:2179
IfxAsclin_ReceiveBufferMode_rxBuffer
single stage Rx buffer
Definition: IfxAsclin.h:240
IfxAsclin_SuspendMode
IfxAsclin_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxAsclin.h:386
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2329
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:366
IfxAsclin_DataLength_5
number of bits per transfer 4
Definition: IfxAsclin.h:120
IfxAsclin_SamplePointPosition_9
sample point position at 9
Definition: IfxAsclin.h:314
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:281
IfxAsclin_RxFifoOutletWidth_3
number of bytes 3
Definition: IfxAsclin.h:283
IfxAsclin_HeaderResponseSelect_headerAndResponse
header and response expected
Definition: IfxAsclin.h:150
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxAsclin_OversamplingFactor_9
oversampling factor 9
Definition: IfxAsclin.h:215
IfxAsclin_getRxFifoFillLevelFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoFillLevelFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO level flag status.
Definition: IfxAsclin.h:2014
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:175
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1756
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:137
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1660
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:159
IfxAsclin_DataLength_3
number of bits per transfer 2
Definition: IfxAsclin.h:118
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2347
IfxAsclin_TxFifoInterruptLevel_14
TX FIFO level 14.
Definition: IfxAsclin.h:423
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2335
IfxAsclin_setRtsCtsPolarity
IFX_INLINE void IfxAsclin_setRtsCtsPolarity(Ifx_ASCLIN *asclin, IfxAsclin_RtsCtsPolarity rcpol)
Selects the RTS/CTS polarity.
Definition: IfxAsclin.h:2323
IfxAsclin_clearRxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the receive header end flag.
Definition: IfxAsclin.h:1672
IfxAsclin_setChecksumMode
IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode.
Definition: IfxAsclin.h:2185
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:90
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:114
IfxAsclin_SamplePointPosition_2
sample point position at 2
Definition: IfxAsclin.h:307
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1600
IfxAsclin_LeadDelay_0
lead delay in 0 bit times
Definition: IfxAsclin.h:177
IfxAsclin_setSampleMode
IFX_INLINE void IfxAsclin_setSampleMode(Ifx_ASCLIN *asclin, IfxAsclin_SamplesPerBit medianFilter)
Sets the sample mode (number of samples per bit / median filter)
Definition: IfxAsclin.h:2353
IfxAsclin_enableHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_enableHeaderTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables header timeout flag.
Definition: IfxAsclin.h:1768
IfxAsclin_ChecksumInjection
IfxAsclin_ChecksumInjection
Defines if the received checksum byte is written into the RXFifo or not. Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:71
IfxAsclin_getKernelResetStatus
IFX_INLINE boolean IfxAsclin_getKernelResetStatus(Ifx_ASCLIN *asclin)
Returns the kernel reset status.
Definition: IfxAsclin.h:1948
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:55
IfxAsclin_enableAscErrorFlags
IFX_EXTERN void IfxAsclin_enableAscErrorFlags(Ifx_ASCLIN *asclin, boolean parEnable, boolean rfoEnable)
Enables the ASC error interrupt Flags.
Definition: IfxAsclin.c:44
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2263
IfxAsclin_setLinResponseTimeoutThreshold
IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold.
Definition: IfxAsclin.h:2293
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2317
IfxAsclin_RxInputSelect_2
alternate input selection 2
Definition: IfxAsclin.h:293
IfxAsclin_IdleDelay_5
idle delay in 5 bit times
Definition: IfxAsclin.h:166
IfxAsclin_getLinChecksumErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status.
Definition: IfxAsclin.h:1960
IfxAsclin_OversamplingFactor_10
oversampling factor 10
Definition: IfxAsclin.h:216
IfxAsclin_LeadDelay_6
lead delay in 6 bit times
Definition: IfxAsclin.h:183
IfxAsclin_ClockSource_flexRayClock
f eray will be supplied
Definition: IfxAsclin.h:95
IfxAsclin_setTransmitWakeRequestFlag
IFX_INLINE void IfxAsclin_setTransmitWakeRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmission wake request flag.
Definition: IfxAsclin.h:2415
IfxAsclin_TxFifoInletWidth_2
number of bytes 2
Definition: IfxAsclin.h:400
IfxAsclin_SlavePolarity
IfxAsclin_SlavePolarity
Defines the idle level of the SLSO signal, which is the level. Outside the data transmission, leading and trailing time intervals. Definition in Ifx_ASCLIN.IOCR.B.SPOL.
Definition: IfxAsclin.h:346
IfxAsclin_setHeaderResponseSelect
IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection.
Definition: IfxAsclin.h:2239
IfxAsclin_StopBit_0
number of stop bits 0
Definition: IfxAsclin.h:374
IfxAsclin_getTxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit response end flag status.
Definition: IfxAsclin.h:2092
IfxAsclin_clearHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the header timeout flag.
Definition: IfxAsclin.h:1606
IfxAsclin_HeaderResponseSelect_headerOnly
header only expected
Definition: IfxAsclin.h:151
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:230
IfxAsclin_Cts_In::module
Ifx_ASCLIN * module
Base address.
Definition: IfxAsclin_PinMap.h:41
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1834
IfxAsclin_StopBit_5
number of stop bits 5
Definition: IfxAsclin.h:379
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2062
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:304
IfxAsclin_enableAutoBaudrateDetection
IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection.
Definition: IfxAsclin.h:1720
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxAsclin_enableLinParityErrorFlag
IFX_INLINE void IfxAsclin_enableLinParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN parity error flag.
Definition: IfxAsclin.h:1786
IfxAsclin_setBaudrateBitFields
IFX_EXTERN void IfxAsclin_setBaudrateBitFields(Ifx_ASCLIN *asclin, uint16 prescaler, uint16 numerator, uint16 denominator, IfxAsclin_OversamplingFactor oversampling)
Sets the baudrate bit fields.
Definition: IfxAsclin.c:228
IfxAsclin_SamplesPerBit_three
three samples per bit
Definition: IfxAsclin.h:329
IfxAsclin_ClockPolarity
IfxAsclin_ClockPolarity
CPOL defines the idle level of the clock signal in the SPI mode. Idle level is the level outside the ...
Definition: IfxAsclin.h:81
IfxAsclin_RxFifoInterruptLevel_6
RX FIFO level 6.
Definition: IfxAsclin.h:262
IfxAsclin_RxFifoInterruptLevel_15
RX FIFO level 15.
Definition: IfxAsclin.h:271
IfxAsclin_setLinMode
IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation.
Definition: IfxAsclin.h:2281
IfxAsclin_DataLength_14
number of bits per transfer 13
Definition: IfxAsclin.h:129
IfxAsclin_getSrcPointerRx
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:155
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1894
IfxAsclin_SlavePolarity_idleLow
idle low
Definition: IfxAsclin.h:348
IfxAsclin_IdleDelay_1
idle delay in 1 bit times
Definition: IfxAsclin.h:162
IfxAsclin_enableLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_enableLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN auto baudrate detection error flag.
Definition: IfxAsclin.h:1774
IfxAsclin_TxFifoInterruptLevel_2
TX FIFO level 2.
Definition: IfxAsclin.h:411
IfxAsclin_FrameMode_lin
lin mode
Definition: IfxAsclin.h:142
IfxAsclin_LinResponseTimeoutMode_responseTimeout
timeout threshold is for reponse
Definition: IfxAsclin.h:202
IfxAsclin_enableTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_enableTransmissionCompletedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmission completed flag.
Definition: IfxAsclin.h:1858
IfxAsclin_initSclkPin
IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxAsclin.h:2128
IfxAsclin_clearCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the collision detection error flag.
Definition: IfxAsclin.h:1588
IfxAsclin_RxInputSelect_5
alternate input selection 5
Definition: IfxAsclin.h:296
IfxAsclin_RxInputSelect_4
alternate input selection 4
Definition: IfxAsclin.h:295
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:396
IfxAsclin_Checksum_classic
classic checksum
Definition: IfxAsclin.h:64
IfxAsclin_read8
IFX_EXTERN uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:195
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:308
IfxAsclin_setSuspendMode
IFX_INLINE void IfxAsclin_setSuspendMode(Ifx_ASCLIN *asclin, IfxAsclin_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxAsclin.h:2392
IfxAsclin_readRxData
IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
Definition: IfxAsclin.h:2161
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1798
IfxAsclin_LeadDelay_5
lead delay in 5 bit times
Definition: IfxAsclin.h:182
IfxAsclin_StopBit_7
number of stop bits 7
Definition: IfxAsclin.h:381
IfxAsclin_clearLinParityErrorFlag
IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN parity error flag.
Definition: IfxAsclin.h:1630
IfxAsclin_ClockSource_ascSlowClock
f asclins will be supplied
Definition: IfxAsclin.h:97
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2008
IfxAsclin_enableRxHeaderEndFlag
IFX_INLINE void IfxAsclin_enableRxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables receive header end flag.
Definition: IfxAsclin.h:1846
IfxAsclin_CtsInputSelect_0
CTS input pin 0.
Definition: IfxAsclin.h:105
IfxAsclin_enableRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag.
Definition: IfxAsclin.h:1840
IfxAsclin_CtsInputSelect
IfxAsclin_CtsInputSelect
CTS input pin selection Definition in Ifx_ASCLIN.IOCR.B.CTS.
Definition: IfxAsclin.h:103
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1714
IfxAsclin_IdleDelay_7
idle delay in 7 bit times
Definition: IfxAsclin.h:168
IfxAsclin_TxFifoInterruptLevel_10
TX FIFO level 10.
Definition: IfxAsclin.h:419
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2142
IfxAsclin_write16
IFX_EXTERN uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:357
IfxAsclin_LeadDelay_7
lead delay in 7 bit times
Definition: IfxAsclin.h:184
IfxAsclin_clearRxResponseEndFlag
IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the receive response end flag.
Definition: IfxAsclin.h:1678
IfxAsclin_TxFifoInletWidth_0
number of bytes 0
Definition: IfxAsclin.h:398
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2421
IfxAsclin_OversamplingFactor_6
oversampling factor 6
Definition: IfxAsclin.h:212
IfxAsclin_write8
IFX_EXTERN uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:385
IfxAsclin_setSlavePolarity
IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity.
Definition: IfxAsclin.h:2371
IfxAsclin_SamplePointPosition_11
sample point position at 11
Definition: IfxAsclin.h:316
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1792
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1870
IfxAsclin_SuspendMode_soft
Soft Suspend.
Definition: IfxAsclin.h:390
IfxAsclin_RxFifoOutletWidth_2
number of bytes 2
Definition: IfxAsclin.h:282
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2233
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2026
IfxAsclin_clearTxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit header end flag.
Definition: IfxAsclin.h:1702
IfxAsclin_RxFifoInterruptLevel_10
RX FIFO level 10.
Definition: IfxAsclin.h:266
IfxAsclin_RxFifoInterruptLevel_4
RX FIFO level 4.
Definition: IfxAsclin.h:260
IfxAsclin_DataLength_13
number of bits per transfer 12
Definition: IfxAsclin.h:128
IfxAsclin_enableResponseTimeoutFlag
IFX_INLINE void IfxAsclin_enableResponseTimeoutFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables response timeout flag.
Definition: IfxAsclin.h:1816
IfxAsclin_IdleDelay_6
idle delay in 6 bit times
Definition: IfxAsclin.h:167
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:336
IfxAsclin_FrameMode_spi
spi mode
Definition: IfxAsclin.h:141
IfxAsclin_enableBreakDetectedFlag
IFX_INLINE void IfxAsclin_enableBreakDetectedFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables break detected flag.
Definition: IfxAsclin.h:1726
IfxAsclin_initRtsPin
IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output.
Definition: IfxAsclin.h:2110
IfxAsclin_clearRaisingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_clearRaisingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
Clears the raising edge detected flag.
Definition: IfxAsclin.h:1642
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:375
IfxAsclin_RxInputSelect_6
alternate input selection 6
Definition: IfxAsclin.h:297
IfxAsclin_getClockStatus
IFX_INLINE boolean IfxAsclin_getClockStatus(Ifx_ASCLIN *asclin)
Returns the clock status.
Definition: IfxAsclin.h:1918
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:93
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:291
IfxAsclin_LinMode_slave
operates in slave mode
Definition: IfxAsclin.h:192
IfxAsclin_LinMode_master
operates in master mode
Definition: IfxAsclin.h:193
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:178
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxAsclin_RxFifoInterruptLevel_12
RX FIFO level 12.
Definition: IfxAsclin.h:268
IfxAsclin_getBreakDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the break detected flag status.
Definition: IfxAsclin.h:1906
IfxAsclin_setFilterDepth
IFX_INLINE void IfxAsclin_setFilterDepth(Ifx_ASCLIN *asclin, uint8 depth)
Sets digital glitch filter depth.
Definition: IfxAsclin.h:2227
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:460
IfxAsclin_enableLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_enableLinChecksumErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables LIN checksum error flag.
Definition: IfxAsclin.h:1780
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1828
IfxAsclin_SamplePointPosition_6
sample point position at 6
Definition: IfxAsclin.h:311
IfxAsclin_SamplePointPosition_8
sample point position at 8
Definition: IfxAsclin.h:313
IfxAsclin_TxFifoInterruptLevel_11
TX FIFO level 11.
Definition: IfxAsclin.h:420
IfxAsclin_RtsCtsPolarity_activeLow
ready/clear are active-low
Definition: IfxAsclin.h:249
IfxAsclin_setTransmitResponseRequestFlag
IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit response request flag.
Definition: IfxAsclin.h:2409
IfxAsclin_DataLength_15
number of bits per transfer 14
Definition: IfxAsclin.h:130
IfxAsclin_isModuleSuspended
IFX_INLINE boolean IfxAsclin_isModuleSuspended(Ifx_ASCLIN *asclin)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxAsclin.h:2149
IfxAsclin_disableModule
IFX_EXTERN void IfxAsclin_disableModule(Ifx_ASCLIN *asclin)
Disables the module.
Definition: IfxAsclin.c:35
IfxAsclin_StopBit_2
number of stop bits 2
Definition: IfxAsclin.h:376
IfxAsclin_getAllErrorFlagsStatus
IFX_INLINE uint16 IfxAsclin_getAllErrorFlagsStatus(Ifx_ASCLIN *asclin)
Returns the status of all error flags.
Definition: IfxAsclin.h:2439
IfxAsclin_writeTxData
IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
Definition: IfxAsclin.h:2433
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:92
IfxAsclin_enableTxHeaderEndFlag
IFX_INLINE void IfxAsclin_enableTxHeaderEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit header end flag.
Definition: IfxAsclin.h:1882
IfxAsclin_FrameMode_asc
asc mode
Definition: IfxAsclin.h:140
IfxAsclin_getHeaderTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the header timeout flag status.
Definition: IfxAsclin.h:1942
IfxAsclin_TxFifoInterruptLevel_4
TX FIFO level 4.
Definition: IfxAsclin.h:413
IfxAsclin_setSamplePointPosition
IFX_INLINE void IfxAsclin_setSamplePointPosition(Ifx_ASCLIN *asclin, IfxAsclin_SamplePointPosition spPosition)
Sets the sampling point position.
Definition: IfxAsclin.h:2359
IfxAsclin_setEnableModuleRequest
IFX_INLINE void IfxAsclin_setEnableModuleRequest(Ifx_ASCLIN *asclin)
Sets the enable module request.
Definition: IfxAsclin.h:2221
IfxAsclin_getTransmissionCompletedFlagStatus
IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmission pending flag status.
Definition: IfxAsclin.h:2050
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxAsclin_setCtsInput
IFX_INLINE void IfxAsclin_setCtsInput(Ifx_ASCLIN *asclin, IfxAsclin_CtsInputSelect ctsi)
Selects the CTS input pin.
Definition: IfxAsclin.h:2197
IfxAsclin_RxInputSelect_1
alternate input selection 1
Definition: IfxAsclin.h:292
IfxAsclin_LeadDelay_4
lead delay in 4 bit times
Definition: IfxAsclin.h:181
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:399
IfxAsclin_clearLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag.
Definition: IfxAsclin.h:1624
IfxAsclin_RxInputSelect_3
alternate input selection 3
Definition: IfxAsclin.h:294
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:228
IfxAsclin_setOversampling
IFX_INLINE void IfxAsclin_setOversampling(Ifx_ASCLIN *asclin, IfxAsclin_OversamplingFactor ovsFactor)
Sets the division ratio of the baudrate post divider.
Definition: IfxAsclin.h:2305
IfxAsclin_setKernelResetOne
IFX_INLINE void IfxAsclin_setKernelResetOne(Ifx_ASCLIN *asclin)
Sets the kernal reset of the KRST1.
Definition: IfxAsclin.h:2251
IfxAsclin_read16
IFX_EXTERN uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:167
IfxAsclin_RxInputSelect_7
alternate input selection 7
Definition: IfxAsclin.h:298
IfxAsclin_getRxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive header end flag status.
Definition: IfxAsclin.h:2038
IfxAsclin_RxFifoInterruptLevel_3
RX FIFO level 3.
Definition: IfxAsclin.h:259
IfxAsclin_clearTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
Clears the transmission pending flag.
Definition: IfxAsclin.h:1684
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:139
IfxAsclin_enableTxResponseEndFlag
IFX_INLINE void IfxAsclin_enableTxResponseEndFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables transmit response end flag.
Definition: IfxAsclin.h:1888
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:123
IfxAsclin_OversamplingFactor_4
oversampling factor 4
Definition: IfxAsclin.h:210
IfxAsclin_setBrdLowerlimt
IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s lower limit.
Definition: IfxAsclin.h:2167
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:328
IfxAsclin_SleepMode_disable
disables sleep mode
Definition: IfxAsclin.h:358
IfxAsclin_getClockSource
IFX_INLINE uint8 IfxAsclin_getClockSource(Ifx_ASCLIN *asclin)
Returns the clock source.
Definition: IfxAsclin.h:1912
IfxAsclin_SleepMode_enable
enables sleep mode
Definition: IfxAsclin.h:357
IfxAsclin_clearFallingEdgeDetectedFlag
IFX_INLINE void IfxAsclin_clearFallingEdgeDetectedFlag(Ifx_ASCLIN *asclin)
Clears the falling edge detected flag.
Definition: IfxAsclin.h:1594
IfxAsclin_DataLength_7
number of bits per transfer 6
Definition: IfxAsclin.h:122
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2386
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2365
IfxAsclin_getPrescaler
IFX_INLINE uint16 IfxAsclin_getPrescaler(Ifx_ASCLIN *asclin)
Returns the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:1984
IfxAsclin_TxFifoInterruptLevel_13
TX FIFO level 13.
Definition: IfxAsclin.h:422
IfxAsclin_RxFifoInterruptLevel_2
RX FIFO level 2.
Definition: IfxAsclin.h:258
IfxAsclin_OversamplingFactor_8
oversampling factor 8
Definition: IfxAsclin.h:214
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1936
IfxAsclin_OversamplingFactor_12
oversampling factor 12
Definition: IfxAsclin.h:218
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2215
IfxAsclin_SamplePointPosition_7
sample point position at 7
Definition: IfxAsclin.h:312
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxAsclin_clearBreakDetectedFlag
IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
Clears the break detected flag.
Definition: IfxAsclin.h:1582
IfxAsclin_Checksum_enhanced
enhanced checksum
Definition: IfxAsclin.h:65
IfxAsclin_getTransmitSignalStatus
IFX_INLINE boolean IfxAsclin_getTransmitSignalStatus(Ifx_ASCLIN *asclin)
Returns the transmit signal status.
Definition: IfxAsclin.h:2056
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1864
IfxAsclin_TxFifoInterruptLevel_12
TX FIFO level 12.
Definition: IfxAsclin.h:421
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1696
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:363
IfxAsclin_StopBit_4
number of stop bits 4
Definition: IfxAsclin.h:378
IfxAsclin_getPdFrequency
IFX_EXTERN float32 IfxAsclin_getPdFrequency(Ifx_ASCLIN *asclin)
Returns the PD frequency.
Definition: IfxAsclin.c:137
IfxAsclin_SleepMode
IfxAsclin_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_ASCLIN.CLC.B.EDIS.
Definition: IfxAsclin.h:355
IfxAsclin_OversamplingFactor_14
oversampling factor 14
Definition: IfxAsclin.h:220
IfxAsclin_getRaisingEdgeDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getRaisingEdgeDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the raising edge detected flag status.
Definition: IfxAsclin.h:1990
IfxAsclin_clearResponseTimeoutFlag
IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the response timeout flag.
Definition: IfxAsclin.h:1648
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2203
IfxAsclin_TxFifoInterruptLevel_3
TX FIFO level 3.
Definition: IfxAsclin.h:412
IfxAsclin_RtsCtsPolarity
IfxAsclin_RtsCtsPolarity
Polarity of the RTS and CTS signals Definition in Ifx_ASCLIN.IOCR.B.RCPOL.
Definition: IfxAsclin.h:246
IfxAsclin_getParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the parity error flag status.
Definition: IfxAsclin.h:1978
IfxAsclin_setClockSource
IFX_EXTERN void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:339
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2427


iLLD_TC26B: IfxAsclin_Asc.c Source File

  • Asclin
  • Asc
IfxAsclin_Asc.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Asc.c
3 * \brief ASCLIN ASC details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxAsclin_Asc.h"
30 #include "string.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
37 {
38 Ifx_SizeT count = 1;
39 uint8 data;
40
41 while (IfxAsclin_Asc_read(asclin, &data, &count, TIME_INFINITE) != TRUE)
42 {}
43
44 return data;
45 }
46
47
48 boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
49 {
50 Ifx_SizeT count = 1;
51
52 return IfxAsclin_Asc_write(asclin, &data, &count, TIME_INFINITE);
53 }
54
55
56 boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
57 {
58 return Ifx_Fifo_canReadCount(asclin->rx, count, timeout);
59 }
60
61
62 boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
63 {
64 return Ifx_Fifo_canWriteCount(asclin->tx, count, timeout);
65 }
66
67
68 void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
69 {
70 IfxAsclin_flushRxFifo(asclin->asclin);
71 Ifx_Fifo_clear(asclin->rx);
72 }
73
74
75 void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
76 {
77 Ifx_Fifo_clear(asclin->tx);
78 IfxAsclin_flushTxFifo(asclin->asclin);
79 }
80
81
82 void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
83 {
84 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
85 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
86 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection */
87 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module */
88 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on */
89 }
90
91
92 boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
93 {
94 Ifx_TickTime deadline = getDeadLine(timeout);
95 boolean result;
96
97 /* Flush the software FIFO */
98 result = Ifx_Fifo_flush(asclin->tx, timeout);
99
100 if (result)
101 {
102 /* Flush the hardware FIFO (wait until all bytes have been transmitted) */
103 do
104 {
105 result = IfxAsclin_getTxFifoFillLevel(asclin->asclin) == 0;
106 } while (!result && !isDeadLine(deadline));
107 }
108
109 return result;
110 }
111
112
113 sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
114 {
115 return Ifx_Fifo_readCount(asclin->rx);
116 }
117
118
119 IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
120 {
121 return &asclin->rx->eventWriter;
122 }
123
124
125 uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
126 {
127 return asclin->sendCount;
128 }
129
130
131 Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
132 {
133 return asclin->txTimestamp;
134 }
135
136
137 sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
138 {
139 return Ifx_Fifo_writeCount(asclin->tx);
140 }
141
142
143 IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
144 {
145 return &asclin->tx->eventWriter;
146 }
147
148
149 IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
150 {
151 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers*/
152 IfxAsclin_Status status = IfxAsclin_Status_noError;
153
154 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
155
156 IfxAsclin_enableModule(asclinSFR); /* enabling the module*/
157 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
158 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode*/
159 IfxAsclin_setPrescaler(asclinSFR, config->baudrate.prescaler); /* sets the prescaler */
160 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* temporary set the clock source for baudrate configuration*/
161 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, /* setting the baudrate bit fields to generate the required baudrate*/
162 config->baudrate.baudrate,
163 config->baudrate.oversampling,
164 config->bitTiming.samplePointPosition,
165 config->bitTiming.medianFilter);
166 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again*/
167
168 IfxAsclin_enableLoopBackMode(asclinSFR, config->loopBack); /* selecting the loopback mode */
169 IfxAsclin_enableParity(asclinSFR, config->frame.parityBit); /* setting parity enable */
170 IfxAsclin_setParityType(asclinSFR, config->frame.parityType); /* setting parity type (odd/even)*/
171 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit */
172 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction */
173 IfxAsclin_setDataLength(asclinSFR, config->frame.dataLength); /* setting the data length */
174 IfxAsclin_setTxFifoInletWidth(asclinSFR, config->fifo.inWidth); /* setting Tx FIFO inlet width */
175 IfxAsclin_setRxFifoOutletWidth(asclinSFR, config->fifo.outWidth); /* setting Rx FIFO outlet width */
176 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay */
177 IfxAsclin_setTxFifoInterruptLevel(asclinSFR, config->fifo.txFifoInterruptLevel); /* setting Tx FIFO level at which a Tx interrupt will be triggered*/
178 IfxAsclin_setRxFifoInterruptLevel(asclinSFR, config->fifo.rxFifoInterruptLevel); /* setting Rx FIFO interrupt level at which a Rx interrupt will be triggered*/
179 IfxAsclin_setFrameMode(asclinSFR, config->frame.frameMode); /* selecting the frame mode*/
180
181 /* Pin mapping */
182 const IfxAsclin_Asc_Pins *pins = config->pins;
183
184 if (pins != NULL_PTR)
185 {
186 IfxAsclin_Cts_In *cts = pins->cts;
187
188 if (cts != NULL_PTR)
189 {
190 IfxAsclin_initCtsPin(cts, pins->ctsMode, pins->pinDriver);
191 }
192
193 IfxAsclin_Rx_In *rx = pins->rx;
194
195 if (rx != NULL_PTR)
196 {
197 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
198 }
199
200 IfxAsclin_Rts_Out *rts = pins->rts;
201
202 if (rts != NULL_PTR)
203 {
204 IfxAsclin_initRtsPin(rts, pins->rtsMode, pins->pinDriver);
205 }
206
207 IfxAsclin_Tx_Out *tx = pins->tx;
208
209 if (tx != NULL_PTR)
210 {
211 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
212 }
213 }
214
215 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* select the clock source*/
216
217 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags */
218 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
219
220 /* HW error flags */
221 asclin->errorFlags.ALL = 0;
222
223 if (config->errorFlags.flags.parityError)
224 {
225 IfxAsclin_enableParityErrorFlag(asclinSFR, TRUE);
226 }
227
228 if (config->errorFlags.flags.frameError)
229 {
230 IfxAsclin_enableFrameErrorFlag(asclinSFR, TRUE);
231 }
232
233 if (config->errorFlags.flags.rxFifoOverflow)
234 {
235 IfxAsclin_enableRxFifoOverflowFlag(asclinSFR, TRUE);
236 }
237
238 if (config->errorFlags.flags.rxFifoUnderflow)
239 {
240 IfxAsclin_enableRxFifoUnderflowFlag(asclinSFR, TRUE);
241 }
242
243 if (config->errorFlags.flags.txFifoOverflow)
244 {
245 IfxAsclin_enableTxFifoOverflowFlag(asclinSFR, TRUE);
246 }
247
248 /* transmission flags */
249 asclin->rxSwFifoOverflow = FALSE;
250 asclin->txInProgress = FALSE;
251
252 /* Buffer mode */
253 Ifx_SizeT elementSize;
254 asclin->dataBufferMode = config->dataBufferMode;
255 asclin->txTimestamp = 0;
256 asclin->sendCount = 0;
257
258 switch (asclin->dataBufferMode)
259 {
260 case Ifx_DataBufferMode_normal:
261 elementSize = 1;
262 break;
263 case Ifx_DataBufferMode_timeStampSingle:
264 elementSize = sizeof(Ifx_DataBufferMode_TimeStampSingle);
265 break;
266 default:
267 elementSize = 0;
268 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
269 break;
270 }
271
272 /* SW Fifos */
273 if (config->txBuffer != NULL_PTR)
274 {
275 asclin->tx = Ifx_Fifo_init(config->txBuffer, config->txBufferSize, elementSize);
276 }
277 else
278 {
279 asclin->tx = Ifx_Fifo_create(config->txBufferSize, elementSize);
280 }
281
282 if (config->rxBuffer != NULL_PTR)
283 {
284 asclin->rx = Ifx_Fifo_init(config->rxBuffer, config->rxBufferSize, elementSize);
285 }
286 else
287 {
288 asclin->rx = Ifx_Fifo_create(config->rxBufferSize, elementSize);
289 }
290
291 /* initialising the interrupts */
292 IfxSrc_Tos tos = config->interrupt.typeOfService;
293
294 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
295 {
296 volatile Ifx_SRC_SRCR *src;
297 src = IfxAsclin_getSrcPointerRx(asclinSFR);
298 IfxSrc_init(src, tos, config->interrupt.rxPriority);
299 IfxAsclin_enableRxFifoFillLevelFlag(asclinSFR, TRUE);
300 IfxSrc_enable(src);
301 }
302
303 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
304 {
305 volatile Ifx_SRC_SRCR *src;
306 src = IfxAsclin_getSrcPointerTx(asclinSFR);
307 IfxSrc_init(src, tos, config->interrupt.txPriority);
308 IfxAsclin_enableTxFifoFillLevelFlag(asclinSFR, TRUE);
309 IfxSrc_enable(src);
310 }
311
312 if (config->interrupt.erPriority > 0) /*These interrupts are not serviced by dma*/
313 {
314 volatile Ifx_SRC_SRCR *src;
315 src = IfxAsclin_getSrcPointerEr(asclinSFR);
316 IfxSrc_init(src, tos, config->interrupt.erPriority);
317 IfxAsclin_enableParityErrorFlag(asclinSFR, TRUE);
318 IfxSrc_enable(src);
319 }
320
321 /* enable transfers */
322 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); // enabling Rx FIFO for recieving
323 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); // enabling Tx FIFO for transmitting
324
325 IfxAsclin_flushRxFifo(asclinSFR); // flushing Rx FIFO
326 IfxAsclin_flushTxFifo(asclinSFR); // flushing Tx FIFO
327
328 return status;
329 }
330
331
332 void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
333 {
334 config->asclin = asclin;
335
336 /* loop back disabled */
337 config->loopBack = FALSE; /* no loop back*/
338
339 /* Default values for baudrate */
340 config->clockSource = IfxAsclin_ClockSource_kernelClock; /* kernel clock, fclc*/
341 config->baudrate.prescaler = 1; /* default prescaler*/
342 config->baudrate.baudrate = 115200; /* default baudrate (the fractional dividier setup will be calculated in initModule*/
343 config->baudrate.oversampling = IfxAsclin_OversamplingFactor_4; /* default oversampling factor*/
344
345 /* Default Values for Bit Timings */
346 config->bitTiming.medianFilter = IfxAsclin_SamplesPerBit_one; /* one sample per bit*/
347 config->bitTiming.samplePointPosition = IfxAsclin_SamplePointPosition_3; /* sample point position at 3*/
348 /* Default Values for Frame Control */
349 config->frame.idleDelay = IfxAsclin_IdleDelay_0; /* no idle delay*/
350 config->frame.stopBit = IfxAsclin_StopBit_1; /* one stop bit*/
351 config->frame.frameMode = IfxAsclin_FrameMode_asc; /* ASC mode*/
352 config->frame.shiftDir = IfxAsclin_ShiftDirection_lsbFirst; /* shift diection LSB first*/
353 config->frame.parityBit = FALSE; /* disable parity*/
354 config->frame.parityType = IfxAsclin_ParityType_even; /* even parity (if parity enabled)*/
355 config->frame.dataLength = IfxAsclin_DataLength_8; /* number of bits per transfer 8*/
356
357 /* Default Values for Fifo Control */
358 config->fifo.inWidth = IfxAsclin_TxFifoInletWidth_1; /* 8-bit wide write*/
359 config->fifo.outWidth = IfxAsclin_RxFifoOutletWidth_1; /* 8-bit wide read*/
360 config->fifo.txFifoInterruptLevel = IfxAsclin_TxFifoInterruptLevel_0; /* txFifoInterruptLevel = 0. optimised to write upto 16 bytes at a time */
361 config->fifo.rxFifoInterruptLevel = IfxAsclin_RxFifoInterruptLevel_1;
362 config->fifo.buffMode = IfxAsclin_ReceiveBufferMode_rxFifo; /* RxFIFO*/
363
364 /* Default Values for Interrupt Config */
365 config->interrupt.rxPriority = 0; /* receive interrupt priority 0*/
366 config->interrupt.txPriority = 0; /* transmit interrupt priority 0*/
367 config->interrupt.erPriority = 0; /* error interrupt priority 0*/
368 config->interrupt.typeOfService = IfxSrc_Tos_cpu0; /* type of service CPU0*/
369
370 /* Enable error flags */
371 config->errorFlags.ALL = ~0; /* all error flags enabled*/
372
373 /* init pointers */
374 config->pins = NULL_PTR; /* pins to null pointer*/
375 config->rxBuffer = NULL_PTR; /* Rx Fifo buffer*/
376 config->txBuffer = NULL_PTR; /* Tx Fifo buffer*/
377
378 config->txBufferSize = 0; /* Rx Fifo buffer size*/
379 config->rxBufferSize = 0; /* Rx Fifo buffer size*/
380
381 config->dataBufferMode = Ifx_DataBufferMode_normal;
382 }
383
384
385 void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
386 {
387 if (asclin->txInProgress == FALSE) /* Send first byte: send init */
388 {
389 if (Ifx_Fifo_isEmpty(asclin->tx) == FALSE)
390 {
391 uint8 data;
392 asclin->txInProgress = TRUE;
393
394 switch (asclin->dataBufferMode)
395 {
396 case Ifx_DataBufferMode_normal:
397 {
398 Ifx_Fifo_read(asclin->tx, &data, 1, TIME_NULL);
399 }
400 break;
401 case Ifx_DataBufferMode_timeStampSingle:
402 {
403 Ifx_DataBufferMode_TimeStampSingle packedData;
404 Ifx_Fifo_read(asclin->tx, &packedData, sizeof(packedData), TIME_NULL);
405 data = packedData.data;
406 }
407 break;
408 }
409
410 IfxAsclin_write8(asclin->asclin, &data, 1);
411 }
412 }
413 }
414
415
416 void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
417 {
418 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
419
420 /* store all the flags in the variable */
421 if (IfxAsclin_getParityErrorFlagStatus(asclinSFR))
422 {
423 IfxAsclin_clearParityErrorFlag(asclinSFR);
424 asclin->errorFlags.flags.parityError = 1;
425 }
426
427 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
428 {
429 IfxAsclin_clearFrameErrorFlag(asclinSFR);
430 asclin->errorFlags.flags.frameError = 1;
431 }
432
433 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
434 {
435 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
436 asclin->errorFlags.flags.rxFifoOverflow = 1;
437 }
438
439 if (IfxAsclin_getRxFifoUnderflowFlagStatus(asclinSFR))
440 {
441 IfxAsclin_clearRxFifoUnderflowFlag(asclinSFR);
442 asclin->errorFlags.flags.rxFifoUnderflow = 1;
443 }
444
445 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
446 {
447 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
448 asclin->errorFlags.flags.txFifoOverflow = 1;
449 }
450 }
451
452
453 void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
454 {
455 uint8 ascData[16]; /*FIFO size is 16 bytes*/
456
457 switch (asclin->dataBufferMode)
458 {
459 case Ifx_DataBufferMode_normal:
460 {
461 uint8 count;
462 count = IfxAsclin_getRxFifoFillLevel(asclin->asclin);
463 IfxAsclin_read8(asclin->asclin, &ascData[0], count);
464
465 if (Ifx_Fifo_write(asclin->rx, &ascData[0], count, TIME_NULL) != 0)
466 {
467 /* Receive buffer is full, data is discard */
468 asclin->rxSwFifoOverflow = TRUE;
469 }
470
471 break;
472 }
473 case Ifx_DataBufferMode_timeStampSingle:
474 {
475 Ifx_DataBufferMode_TimeStampSingle packedData;
476
477 while (IfxAsclin_getRxFifoFillLevel(asclin->asclin) > 0)
478 {
479 packedData.timestamp = now();
480 IfxAsclin_read8(asclin->asclin, &ascData[0], 1);
481 packedData.data = ascData[0];
482
483 if (Ifx_Fifo_write(asclin->rx, &packedData, sizeof(packedData), TIME_NULL) != 0)
484 {
485 /* Receive buffer is full, data is discard */
486 asclin->rxSwFifoOverflow = TRUE;
487 }
488 }
489 }
490 break;
491 }
492 }
493
494
495 void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
496 {
497 asclin->txTimestamp = now();
498 asclin->sendCount++;
499
500 if (Ifx_Fifo_isEmpty(asclin->tx) == FALSE)
501 {
502 switch (asclin->dataBufferMode)
503 {
504 case Ifx_DataBufferMode_normal:
505 {
506 uint8 ascData[16];
507 uint16 count = 0, i_count = 0;
508 volatile uint8 hw_tx_fill_level = 0;
509
510 count = Ifx_Fifo_readCount(asclin->tx); /*SW FIFO fill level*/
511
512 hw_tx_fill_level = IfxAsclin_getTxFifoFillLevel(asclin->asclin);
513
514 i_count = (16 - hw_tx_fill_level);
515
516 if (i_count > count)
517 {
518 i_count = count;
519 }
520
521 Ifx_Fifo_read(asclin->tx, &ascData[0], i_count, TIME_NULL);
522 IfxAsclin_write8(asclin->asclin, &ascData[0], i_count);
523 }
524 break;
525
526 case Ifx_DataBufferMode_timeStampSingle:
527 {
528 Ifx_DataBufferMode_TimeStampSingle packedData;
529 uint8 ascData;
530
531 Ifx_Fifo_read(asclin->tx, &packedData, sizeof(packedData), TIME_NULL);
532
533 ascData = packedData.data;
534 IfxAsclin_write8(asclin->asclin, &ascData, 1);
535 }
536 break;
537 }
538 }
539 else
540 {
541 /* Transmit buffer is empty */
542 asclin->txInProgress = FALSE;
543 }
544 }
545
546
547 boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
548 {
549 Ifx_SizeT left = Ifx_Fifo_read(asclin->rx, data, *count, timeout);
550
551 *count -= left;
552
553 return left == 0;
554 }
555
556
557 void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
558 {
559 asclin->sendCount = 0;
560 }
561
562
563 boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
564 {
565 /* Ensure the stdif is reset to zeros */
566 memset(stdif, 0, sizeof(IfxStdIf_DPipe));
567
568 /* Set the API link */
569 stdif->driver = asclin;
570 stdif->write = (IfxStdIf_DPipe_Write) & IfxAsclin_Asc_write;
571 stdif->read = (IfxStdIf_DPipe_Read) & IfxAsclin_Asc_read;
572 stdif->getReadCount = (IfxStdIf_DPipe_GetReadCount) & IfxAsclin_Asc_getReadCount;
573 stdif->getReadEvent = (IfxStdIf_DPipe_GetReadEvent) & IfxAsclin_Asc_getReadEvent;
574 stdif->getWriteCount = (IfxStdIf_DPipe_GetWriteCount) & IfxAsclin_Asc_getWriteCount;
575 stdif->getWriteEvent = (IfxStdIf_DPipe_GetWriteEvent) & IfxAsclin_Asc_getWriteEvent;
576 stdif->canReadCount = (IfxStdIf_DPipe_CanReadCount) & IfxAsclin_Asc_canReadCount;
577 stdif->canWriteCount = (IfxStdIf_DPipe_CanWriteCount) & IfxAsclin_Asc_canWriteCount;
578 stdif->flushTx = (IfxStdIf_DPipe_FlushTx) & IfxAsclin_Asc_flushTx;
579 stdif->clearTx = (IfxStdIf_DPipe_ClearTx) & IfxAsclin_Asc_clearTx;
580 stdif->clearRx = (IfxStdIf_DPipe_ClearRx) & IfxAsclin_Asc_clearRx;
581 stdif->onReceive = (IfxStdIf_DPipe_OnReceive) & IfxAsclin_Asc_isrReceive;
582 stdif->onTransmit = (IfxStdIf_DPipe_OnTransmit) & IfxAsclin_Asc_isrTransmit;
583 stdif->onError = (IfxStdIf_DPipe_OnError) & IfxAsclin_Asc_isrError;
584 stdif->getSendCount = (IfxStdIf_DPipe_GetSendCount) & IfxAsclin_Asc_getSendCount;
585 stdif->getTxTimeStamp = (IfxStdIf_DPipe_GetTxTimeStamp) & IfxAsclin_Asc_getTxTimeStamp;
586 stdif->resetSendCount = (IfxStdIf_DPipe_ResetSendCount) & IfxAsclin_Asc_resetSendCount;
587 stdif->txDisabled = FALSE;
588 return TRUE;
589 }
590
591
592 boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
593 {
594 Ifx_SizeT left;
595 boolean result = TRUE;
596 boolean tx_status = asclin->txInProgress;
597 uint16 tx_fifo_size = (uint16)asclin->tx->size;
598
599 if (*count != 0)
600 {
601 if ((!tx_status) && (*count > tx_fifo_size)) /*Transmission not initialised and data size is greater than S/W FIFO*/
602 {
603 Ifx_Fifo_write(asclin->tx, data, tx_fifo_size, timeout); /*Fill upto the S/W FIFO size and initiate transmission*/
604 IfxAsclin_Asc_initiateTransmission(asclin);
605
606 left = Ifx_Fifo_write(asclin->tx, (((const uint8 *)data) + tx_fifo_size), (*count) - tx_fifo_size, timeout);
607 IfxAsclin_Asc_initiateTransmission(asclin); /*Will initiate transmission only if txInProgress is False, otherwise interrupts will continue to push data to H/W FIFO*/
608 }
609
610 else
611 {
612 left = Ifx_Fifo_write(asclin->tx, data, *count, timeout);
613 IfxAsclin_Asc_initiateTransmission(asclin);
614 }
615
616 *count -= left;
617 result = left == 0;
618 }
619
620 return result;
621 }
IfxAsclin_Asc_Config::baudrate
IfxAsclin_Asc_BaudRate baudrate
structure for baudrate
Definition: IfxAsclin_Asc.h:341
IfxStdIf_DPipe_::resetSendCount
IfxStdIf_DPipe_ResetSendCount resetSendCount
Definition: IfxStdIf_DPipe.h:236
IfxStdIf_DPipe_::canWriteCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
Definition: IfxStdIf_DPipe.h:226
IfxStdIf_DPipe_ResetSendCount
void(* IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:209
IfxAsclin_Asc_Config::rxBufferSize
Ifx_SizeT rxBufferSize
Size of the rx buffer.
Definition: IfxAsclin_Asc.h:355
IfxAsclin_Asc.h
ASCLIN ASC details.
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:39
IfxAsclin_Asc_isrError
void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
ISR error routine.
Definition: IfxAsclin_Asc.c:416
IfxAsclin_Asc_getReadCount
sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:113
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:216
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:59
Ifx_Fifo_write
Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Write data into a fifo.
Definition: Ifx_Fifo.c:349
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:161
IfxAsclin_Asc_Config::frame
IfxAsclin_Asc_FrameControl frame
structure for frame control
Definition: IfxAsclin_Asc.h:343
IfxAsclin_initCtsPin
IFX_INLINE void IfxAsclin_initCtsPin(const IfxAsclin_Cts_In *cts, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a CTS input.
Definition: IfxAsclin.h:2098
IfxStdIf_DPipe_::getTxTimeStamp
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
Definition: IfxStdIf_DPipe.h:235
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxStdIf_DPipe_::onTransmit
IfxStdIf_DPipe_OnTransmit onTransmit
Definition: IfxStdIf_DPipe.h:231
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
IfxAsclin_Asc_getWriteEvent
IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:143
IfxAsclin_Asc_Config::rxBuffer
void * rxBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:356
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2245
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:239
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:338
IfxAsclin_Asc
Module Handle.
Definition: IfxAsclin_Asc.h:323
IfxAsclin_TxFifoInterruptLevel_0
TX FIFO level 0.
Definition: IfxAsclin.h:409
Ifx_Fifo_canReadCount
boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available in the buffer.
Definition: Ifx_Fifo.c:119
IfxAsclin_Asc_BitTimingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
Definition: IfxAsclin_Asc.h:256
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:149
IfxAsclin_Asc_getTxTimeStamp
Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:131
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2032
IfxStdIf_DPipe_::getWriteEvent
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
Definition: IfxStdIf_DPipe.h:224
Ifx_DataBufferMode_TimeStampSingle::data
uint8 data
Definition: Ifx_Types.h:132
IfxStdIf_DPipe_::getWriteCount
IfxStdIf_DPipe_GetWriteCount getWriteCount
Definition: IfxStdIf_DPipe.h:223
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2080
IfxAsclin_Asc_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Asc.h:347
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:201
IfxAsclin_Asc_initModule
IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module.
Definition: IfxAsclin_Asc.c:149
IfxAsclin_Asc_getSendCount
uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:125
IfxStdIf_DPipe_GetSendCount
uint32(* IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:111
IfxAsclin_Asc_initiateTransmission
void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
Initiate the data transmission.
Definition: IfxAsclin_Asc.c:385
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:51
IfxStdIf_DPipe_OnTransmit
void(* IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:195
IfxAsclin_Asc_getReadEvent
IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:119
IfxAsclin_Asc_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Asc.h:264
IfxAsclin_Asc_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:266
IfxAsclin_Asc_Pins::cts
IFX_CONST IfxAsclin_Cts_In * cts
ASC clear to send (CTS) pin.
Definition: IfxAsclin_Asc.h:298
IfxAsclin_Asc_isrReceive
void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
ISR receive routine.
Definition: IfxAsclin_Asc.c:453
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1900
IfxAsclin_Asc_BaudRate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Asc.h:247
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStdIf_DPipe_::onError
IfxStdIf_DPipe_OnError onError
Definition: IfxStdIf_DPipe.h:232
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:257
IfxAsclin_Asc_Config::fifo
IfxAsclin_Asc_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Asc.h:344
IfxAsclin_Asc_ErrorFlags::parityError
uint8 parityError
parity error
Definition: IfxAsclin_Asc.h:234
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
Ifx_DataBufferMode_normal
normal mode, each received byte is moved to the rx fifo
Definition: Ifx_Types.h:146
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2117
IfxAsclin_Asc_getWriteCount
sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:137
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxStdIf_DPipe_::read
IfxStdIf_DPipe_Read read
Definition: IfxStdIf_DPipe.h:220
IfxAsclin_Asc_Pins::ctsMode
IfxPort_InputMode ctsMode
Cts pin as input.
Definition: IfxAsclin_Asc.h:299
Ifx_Fifo_init
Ifx_Fifo * Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
Initialize the FIFO buffer object.
Definition: Ifx_Fifo.c:74
IfxAsclin_Asc_BaudRate::prescaler
uint16 prescaler
BITCON.PRESCALER, the division ratio of the predevider.
Definition: IfxAsclin_Asc.h:248
IfxAsclin_Asc::sendCount
volatile uint32 sendCount
Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() ...
Definition: IfxAsclin_Asc.h:332
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1576
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
Ifx_DataBufferMode_timeStampSingle
Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items...
Definition: Ifx_Types.h:147
IfxAsclin_Asc_isrTransmit
void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
ISR transmit routine.
Definition: IfxAsclin_Asc.c:495
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxAsclin_Asc_FrameControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Asc.h:280
Ifx_DataBufferMode_TimeStampSingle
Definition: Ifx_Types.h:129
IfxAsclin_Asc_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
Definition: IfxAsclin_Asc.h:268
IfxAsclin_Asc_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Asc.h:265
IfxAsclin_Asc_Config::interrupt
IfxAsclin_Asc_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Asc.h:345
IfxStdIf_DPipe_::getSendCount
IfxStdIf_DPipe_GetSendCount getSendCount
Definition: IfxStdIf_DPipe.h:234
IfxStdIf_DPipe_::canReadCount
IfxStdIf_DPipe_CanReadCount canReadCount
Definition: IfxStdIf_DPipe.h:225
getDeadLine
IFX_INLINE Ifx_TickTime getDeadLine(Ifx_TickTime timeout)
Return the time dead line.
Definition: Bsp.h:272
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxAsclin_Asc::errorFlags
IfxAsclin_Asc_ErrorFlagsUnion errorFlags
error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Definition: IfxAsclin_Asc.h:330
IfxStdIf_DPipe_CanWriteCount
boolean(* IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:157
IfxStdIf_DPipe_::write
IfxStdIf_DPipe_Write write
Definition: IfxStdIf_DPipe.h:219
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1666
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2311
TIME_NULL
#define TIME_NULL
Definition: Ifx_Types.h:61
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1822
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:240
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2341
IfxAsclin_Asc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Asc.h:306
IfxAsclin_enableParityErrorFlag
IFX_INLINE void IfxAsclin_enableParityErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables parity error flag.
Definition: IfxAsclin.h:1804
IfxAsclin_Asc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Asc.h:291
Ifx_Fifo_read
Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
Read data from a fifo and remove them from the buffer.
Definition: Ifx_Fifo.c:191
IfxAsclin_Asc_BaudRate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
Definition: IfxAsclin_Asc.h:249
IfxAsclin_enableTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableTxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO overflow flag.
Definition: IfxAsclin.h:1876
IfxAsclin_Asc::txInProgress
volatile boolean txInProgress
Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isr...
Definition: IfxAsclin_Asc.h:328
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:161
IfxAsclin_Asc_Config::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Asc.h:361
IfxAsclin_clearParityErrorFlag
IFX_INLINE void IfxAsclin_clearParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the parity error flag.
Definition: IfxAsclin.h:1636
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:135
IfxAsclin_Asc_FrameControl::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module.
Definition: IfxAsclin_Asc.h:277
Ifx_Fifo_canWriteCount
boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: Ifx_Fifo.c:279
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:366
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:103
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:281
IfxStdIf_DPipe_::flushTx
IfxStdIf_DPipe_FlushTx flushTx
Definition: IfxStdIf_DPipe.h:227
IfxAsclin_Asc_Pins::rts
IFX_CONST IfxAsclin_Rts_Out * rts
ASC (request to send) RTS pin.
Definition: IfxAsclin_Asc.h:302
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1756
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1660
_Fifo::eventWriter
volatile boolean eventWriter
event set by the reader to signal the writer that the required free space are available in the buffer...
Definition: Ifx_Fifo.h:62
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2335
IfxAsclin_Asc_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:267
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1600
IfxStdIf_DPipe_::onReceive
IfxStdIf_DPipe_OnReceive onReceive
Definition: IfxStdIf_DPipe.h:230
IfxAsclin_Asc_blockingRead
uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO.
Definition: IfxAsclin_Asc.c:36
IfxAsclin_Asc_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Asc.h:275
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:55
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
IfxStdIf_DPipe_Write
boolean(* IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:72
IfxAsclin_Asc::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Asc.h:325
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2317
IfxAsclin_Asc_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxAsclin_Asc.h:301
IfxAsclin_Asc_stdIfDPipeInit
boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver.
Definition: IfxAsclin_Asc.c:563
IfxAsclin_Asc_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxAsclin_Asc.h:305
IfxStdIf_DPipe_OnReceive
void(* IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:188
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:230
IfxStdIf_DPipe_::driver
IfxStdIf_InterfaceDriver driver
Pointer to the specific driver object.
Definition: IfxStdIf_DPipe.h:215
IfxAsclin_enableRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoOverflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO overflow flag.
Definition: IfxAsclin.h:1834
Ifx_Fifo_flush
IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
Empty the fifo.
Definition: Ifx_Fifo.h:169
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2062
IfxAsclin_Asc_Config::bitTiming
IfxAsclin_Asc_BitTimingControl bitTiming
structure for bit timings
Definition: IfxAsclin_Asc.h:342
IfxAsclin_Asc_resetSendCount
void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:557
IfxAsclin_Asc_Config::pins
IFX_CONST IfxAsclin_Asc_Pins * pins
structure for ASC pins
Definition: IfxAsclin_Asc.h:346
IfxStdIf_DPipe_CanReadCount
boolean(* IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:146
IfxAsclin_Asc_BitTimingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Asc.h:257
Ifx_Fifo_create
Ifx_Fifo * Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
Create a Fifo object.
Definition: Ifx_Fifo.c:51
IfxAsclin_Asc_clearRx
void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:68
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
Ifx_DataBufferMode_TimeStampSingle::timestamp
Ifx_TickTime timestamp
Definition: Ifx_Types.h:131
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:155
IfxAsclin_Asc_Config
Configuration structure of the module.
Definition: IfxAsclin_Asc.h:338
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1894
Ifx_Fifo_readCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
Returns the size of the data in the buffer in bytes.
Definition: Ifx_Fifo.h:186
IfxAsclin_Asc::tx
Ifx_Fifo * tx
Transmit FIFO buffer.
Definition: IfxAsclin_Asc.h:326
IfxStdIf_DPipe_::getReadEvent
IfxStdIf_DPipe_GetReadEvent getReadEvent
Definition: IfxStdIf_DPipe.h:222
Ifx_Fifo_clear
void Ifx_Fifo_clear(Ifx_Fifo *fifo)
Clear fifo contents.
Definition: Ifx_Fifo.c:242
IfxAsclin_Asc_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Asc.h:288
IfxAsclin_Asc_ErrorFlagsUnion::flags
IfxAsclin_Asc_ErrorFlags flags
Definition: IfxAsclin_Asc.h:316
_Fifo::size
Ifx_SizeT size
multiple of 8 bit, max 0xFFF8
Definition: Ifx_Fifo.h:59
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:195
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:308
IfxAsclin_Asc_canWriteCount
boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:62
Ifx_Fifo_writeCount
IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
Returns the free size in bytes.
Definition: Ifx_Fifo.h:202
isDeadLine
IFX_INLINE boolean isDeadLine(Ifx_TickTime deadLine)
Return TRUE if the dead line is over.
Definition: Bsp.h:319
IfxStdIf_DPipe_GetWriteCount
sint32(* IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:127
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1798
IfxAsclin_Asc_initModuleConfig
void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Asc.c:332
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2008
IfxAsclin_Asc_write
boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:592
IfxAsclin_Asc_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Asc.h:278
IfxAsclin_Asc_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Asc.h:237
IfxAsclin_Asc_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Asc.h:279
IfxAsclin_enableRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_enableRxFifoUnderflowFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO underflow flag.
Definition: IfxAsclin.h:1840
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1714
IfxAsclin_Asc_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
ASC Rx pin.
Definition: IfxAsclin_Asc.h:300
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2142
IfxAsclin_Asc_flushTx
boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:92
IfxAsclin_Asc_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Asc.h:238
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2421
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:385
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxAsclin_Asc_FrameControl::parityBit
boolean parityBit
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Asc.h:281
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1792
IfxStdIf_DPipe_::getReadCount
IfxStdIf_DPipe_GetReadCount getReadCount
Definition: IfxStdIf_DPipe.h:221
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1870
IfxAsclin_Asc_Pins::rtsMode
IfxPort_OutputMode rtsMode
Rts as output.
Definition: IfxAsclin_Asc.h:303
IfxStdIf_DPipe_FlushTx
boolean(* IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:166
IfxStdIf_DPipe_::clearRx
IfxStdIf_DPipe_ClearRx clearRx
Definition: IfxStdIf_DPipe.h:229
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2233
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2026
IfxAsclin_Asc_ErrorFlagsUnion::ALL
uint8 ALL
Definition: IfxAsclin_Asc.h:315
IfxAsclin_Asc_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Asc.h:290
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:60
IfxAsclin_Asc_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
ASC Tx pin.
Definition: IfxAsclin_Asc.h:304
IfxAsclin_Asc_clearTx
void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:75
IfxAsclin_Asc_blockingWrite
boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO.
Definition: IfxAsclin_Asc.c:48
IfxAsclin_Asc_Config::txBuffer
void * txBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:350
IfxAsclin_initRtsPin
IFX_INLINE void IfxAsclin_initRtsPin(const IfxAsclin_Rts_Out *rts, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a RTS output.
Definition: IfxAsclin.h:2110
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:375
IfxAsclin_Asc_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Asc.h:289
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:93
IfxStdIf_DPipe_Read
boolean(* IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:87
sint32
long sint32
Definition: Platform_Types.h:131
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:53
Ifx_Fifo_isEmpty
IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
Indicates if the fifo is empty.
Definition: Ifx_Fifo.h:215
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxStdIf_DPipe_GetReadCount
sint32(* IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:95
IfxAsclin_Asc::txTimestamp
volatile Ifx_TickTime txTimestamp
Time stamp of the latest send byte.
Definition: IfxAsclin_Asc.h:333
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1828
IfxStdIf_DPipe_GetTxTimeStamp
Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:119
IfxAsclin_Asc_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Asc.h:276
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:92
IfxStdIf_DPipe_ClearTx
void(* IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:180
IfxAsclin_FrameMode_asc
asc mode
Definition: IfxAsclin.h:140
IfxStdIf_DPipe_OnError
void(* IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:202
IfxAsclin_Asc_Config::txBufferSize
Ifx_SizeT txBufferSize
Size of the tx buffer.
Definition: IfxAsclin_Asc.h:349
IfxAsclin_Asc_Pins
Structure for ASC pin configuration.
Definition: IfxAsclin_Asc.h:296
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:399
IfxAsclin_Asc::rxSwFifoOverflow
volatile boolean rxSwFifoOverflow
Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
Definition: IfxAsclin_Asc.h:329
IfxAsclin_Asc_read
boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:547
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:139
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:123
IfxAsclin_OversamplingFactor_4
oversampling factor 4
Definition: IfxAsclin.h:210
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:328
IfxStdIf_DPipe_::clearTx
IfxStdIf_DPipe_ClearTx clearTx
Definition: IfxStdIf_DPipe.h:228
IfxAsclin_Asc::rx
Ifx_Fifo * rx
Receive FIFO buffer.
Definition: IfxAsclin_Asc.h:327
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2386
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxAsclin_Asc_ErrorFlags::frameError
uint8 frameError
transmit complete/pending error
Definition: IfxAsclin_Asc.h:235
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2365
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1936
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2215
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:54
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1864
IfxAsclin_Asc_disableModule
void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
Disables the module.
Definition: IfxAsclin_Asc.c:82
IfxAsclin_Asc_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Asc.h:236
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1696
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:363
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2203
IfxStdIf_DPipe_ClearRx
void(* IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:173
IfxAsclin_getParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the parity error flag status.
Definition: IfxAsclin.h:1978
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:339
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2427
IfxAsclin_Asc::dataBufferMode
Ifx_DataBufferMode dataBufferMode
Rx buffer mode.
Definition: IfxAsclin_Asc.h:331
IfxAsclin_Asc_canReadCount
boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:56


iLLD_TC26B: IfxAsclin_Asc.h Source File

  • Asclin
  • Asc
IfxAsclin_Asc.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Asc.h
3 * \brief ASCLIN ASC details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Asclin_Asc_Usage How to use the ASCLIN ASC Interface driver?
25 * \ingroup IfxLld_Asclin
26 *
27 * The ASC interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.
28 *
29 * Data transfers are buffered by the hardware based FIFOs, and in addition by software based FIFOs with a configurable size. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
30 *
31 * In the following sections it will be described, how to integrate the driver into the application framework.
32 *
33 * \section IfxLld_Asclin_Asc_Preparation Preparation
34 * \subsection IfxLld_Asclin_Asc_Include Include Files
35 *
36 * Include following header file into your C code:
37 * \code
38 * #include <Asclin/Asc/IfxAsclin_Asc.h>
39 * \endcode
40 *
41 * \subsection IfxLld_Asclin_Asc_Variables Variables
42 *
43 * Declare the ASC handle and the FIFOs as global variables in your C code:
44 *
45 * \code
46 * // used globally
47 * static IfxAsclin_Asc asc;
48 *
49 * #define ASC_TX_BUFFER_SIZE 64
50 * static uint8 ascTxBuffer[ASC_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
51 *
52 * #define ASC_RX_BUFFER_SIZE 64
53 * static uint8 ascRxBuffer[ASC_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
54 * \endcode
55 *
56 * As you can see above, the transfer buffers allocate not only memory for the data itself, but also for FIFO runtime variables. 8 bytes have to be added to ensure a proper circular buffer handling independent from the address to which the buffers have been located.
57 *
58 * \subsection IfxLld_Asclin_Asc_Interrupt Interrupt Handler Installation
59 *
60 * See also \ref IfxLld_Cpu_Irq_Usage
61 *
62 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
63 * \code
64 * // priorities are normally defined in Ifx_IntPrioDef.h
65 * #define IFX_INTPRIO_ASCLIN0_TX 1
66 * #define IFX_INTPRIO_ASCLIN0_RX 2
67 * #define IFX_INTPRIO_ASCLIN0_ER 3
68 * \endcode
69 *
70 * Add the interrupt service routines to your C code. They have to call the ASC interrupt handlers by passing the asc handle:
71 * \code
72 * IFX_INTERRUPT(asclin0TxISR, 0, IFX_INTPRIO_ASCLIN0_TX)
73 * {
74 * IfxAsclin_Asc_isrTransmit(&asc);
75 * }
76 *
77 * IFX_INTERRUPT(asclin0RxISR, 0, IFX_INTPRIO_ASCLIN0_RX)
78 * {
79 * IfxAsclin_Asc_isrReceive(&asc);
80 * }
81 *
82 * IFX_INTERRUPT(asclin0ErISR, 0, IFX_INTPRIO_ASCLIN0_ER)
83 * {
84 * IfxAsclin_Asc_isrError(&asc);
85 * }
86 * \endcode
87 *
88 * Finally install the interrupt handlers in your initialisation function:
89 * \code
90 * // install interrupt handlers
91 * IfxCpu_Irq_installInterruptHandler(&asclin0TxISR, IFX_INTPRIO_ASCLIN0_TX);
92 * IfxCpu_Irq_installInterruptHandler(&asclin0RxISR, IFX_INTPRIO_ASCLIN0_RX);
93 * IfxCpu_Irq_installInterruptHandler(&asclin0ErISR, IFX_INTPRIO_ASCLIN0_ER);
94 * IfxCpu_enableInterrupts();
95 * \endcode
96 *
97 * \subsection IfxLld_Asclin_Asc_Init Module Initialisation
98 *
99 * The module initialisation can be done in the same function. Here an example:
100 * \code
101 * // create module config
102 * IfxAsclin_Asc_Config ascConfig;
103 * IfxAsclin_Asc_initModuleConfig(&ascConfig, &MODULE_ASCLIN0);
104 *
105 * // set the desired baudrate
106 * ascConfig.baudrate.prescaler = 1;
107 * ascConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
108 *
109 * // ISR priorities and interrupt target
110 * ascConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN0_TX;
111 * ascConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN0_RX;
112 * ascConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN0_ER;
113 * ascConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
114 *
115 * // FIFO configuration
116 * ascConfig.txBuffer = &ascTxBuffer;
117 * ascConfig.txBufferSize = ASC_TX_BUFFER_SIZE;
118 *
119 * ascConfig.rxBuffer = &ascRxBuffer;
120 * ascConfig.rxBufferSize = ASC_RX_BUFFER_SIZE;
121 *
122 * // pin configuration
123 * const IfxAsclin_Asc_Pins pins = {
124 * NULL, IfxPort_InputMode_pullUp, // CTS pin not used
125 * &IfxAsclin0_RXA_P14_1_IN, IfxPort_InputMode_pullUp, // Rx pin
126 * NULL, IfxPort_OutputMode_pushPull, // RTS pin not used
127 * &IfxAsclin0_TX_P14_0_OUT, IfxPort_OutputMode_pushPull, // Tx pin
128 * IfxPort_PadDriver_cmosAutomotiveSpeed1
129 * };
130 * ascConfig.pins = &pins;
131 *
132 * // initialize module
133 * //IfxAsclin_Asc asc; // defined globally
134 * IfxAsclin_Asc_initModule(&asc, &ascConfig);
135 * \endcode
136 *
137 * The ASC is ready for use now!
138 *
139 *
140 * \section IfxLld_Asclin_Asc_DataTransfers Data Transfers
141 *
142 * \subsection IfxLld_Asclin_Asc_DataSimple Simple Transfers
143 *
144 * The ASC driver provides simple to use transfer functions, which are blocking.
145 *
146 * This means: you can send as much data as you want without taking care for the fill state of the FIFO. If the FIFO is full, the blocking function will wait until the next byte has been transfered to ASCLIN before putting the new byte into the FIFO:
147 * \code
148 * // send 3 bytes
149 * IfxAsclin_Asc_blockingWrite(&asc, 0x01);
150 * IfxAsclin_Asc_blockingWrite(&asc, 0x02);
151 * IfxAsclin_Asc_blockingWrite(&asc, 0x03);
152 * \endcode
153 *
154 * A simple to use receive function is available as well. If no data is in the receive FIFO, it will wait until the next byte has been received:
155 * \code
156 * // receive a byte
157 * uint8 data = IfxAsclin_Asc_blockingRead(&asc);
158 * \endcode
159 *
160 *
161 * \subsection IfxLld_Asclin_Asc_DataStream Streamed Transfers
162 *
163 * Streamed transfers are handled faster by the ASC driver and therefore they are recommended whenever a large bulk of data should be sent. Here an example:
164 * \code
165 * uint8 txData[9] = { 0x49, 0x6e, 0x66, 0x69, 0x6e, 0x65, 0x6f, 0x6e, 0x0a };
166 * {
167 * Ifx_SizeT count = 9;
168 * IfxAsclin_Asc_write(&asc, txData, &count, TIME_INFINITE);
169 * }
170 * \endcode
171 *
172 *
173 * Data can be received the following way:
174 * \code
175 * uint8 rxData[5];
176 *
177 * {
178 * // wait until 5 bytes have been received
179 * Ifx_SizeT count = 5;
180 * IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
181 * }
182 * \endcode
183 *
184 * Or alternatively with:
185 * \code
186 * uint8 rxData[5];
187 *
188 * {
189 * // how many bytes have been received?
190 * Ifx_SizeT count = IfxAsclin_Asc_getReadCount(&asc);
191 *
192 * // limit to our buffer size
193 * count = count < 5 ? count : 5;
194 *
195 * // transfer received data into buffer
196 * IfxAsclin_Asc_read(&asc, rxData, &count, TIME_INFINITE);
197 * }
198 * \endcode
199 *
200 * \defgroup IfxLld_Asclin_Asc ASC
201 * \ingroup IfxLld_Asclin
202 * \defgroup IfxLld_Asclin_Asc_DataStructures Data Structures
203 * \ingroup IfxLld_Asclin_Asc
204 * \defgroup IfxLld_Asclin_Asc_InterruptFunctions Interrupt Functions
205 * \ingroup IfxLld_Asclin_Asc
206 * \defgroup IfxLld_Asclin_Asc_SimpleCom Simple Communication
207 * \ingroup IfxLld_Asclin_Asc
208 * \defgroup IfxLld_Asclin_Asc_StreamCom Stream based Communication (STDIO)
209 * \ingroup IfxLld_Asclin_Asc
210 * \defgroup IfxLld_Asclin_Asc_ModuleFunctions Module Functions
211 * \ingroup IfxLld_Asclin_Asc
212 */
213
214 #ifndef IFXASCLIN_ASC_H
215 #define IFXASCLIN_ASC_H 1
216
217 /******************************************************************************/
218 /*----------------------------------Includes----------------------------------*/
219 /******************************************************************************/
220
221 #include "Asclin/Std/IfxAsclin.h"
222 #include "_Lib/DataHandling/Ifx_Fifo.h"
223 #include "SysSe/Bsp/Bsp.h"
224 #include "StdIf/IfxStdIf_DPipe.h"
225
226 /******************************************************************************/
227 /*-----------------------------Data Structures--------------------------------*/
228 /******************************************************************************/
229
230 /** \brief Structure for Error Flags
231 */
232 typedef struct
233 {
234 uint8 parityError : 1; /**< \brief parity error */
235 uint8 frameError : 1; /**< \brief transmit complete/pending error */
236 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
237 uint8 rxFifoUnderflow : 1; /**< \brief receive FIFO underflow error */
238 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
239 } IfxAsclin_Asc_ErrorFlags;
240
241 /** \addtogroup IfxLld_Asclin_Asc_DataStructures
242 * \{ */
243 /** \brief Structure for baudrate
244 */
245 typedef struct
246 {
247 float32 baudrate; /**< \brief value of the required baudrate */
248 uint16 prescaler; /**< \brief BITCON.PRESCALER, the division ratio of the predevider */
249 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, division ratio of the baudrate post devider */
250 } IfxAsclin_Asc_BaudRate;
251
252 /** \brief Structure for bit timings
253 */
254 typedef struct
255 {
256 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter */
257 IfxAsclin_SamplePointPosition samplePointPosition; /**< \brief BITCON.SAMPLEPOINT, sample point position */
258 } IfxAsclin_Asc_BitTimingControl;
259
260 /** \brief Structure for FIFO control
261 */
262 typedef struct
263 {
264 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
265 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
266 IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel; /**< \brief TXFIFOCON.INTLEVEL, Tx FIFO interrupt level */
267 IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel; /**< \brief RXFIFOCON.INTLEVEL, Rx FIFO interrupt level */
268 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer) */
269 } IfxAsclin_Asc_FifoControl;
270
271 /** \brief Structure for frame control
272 */
273 typedef struct
274 {
275 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
276 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
277 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module */
278 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
279 IfxAsclin_ParityType parityType; /**< \brief FRAMECON.ODD, parity type (even or odd) */
280 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
281 boolean parityBit; /**< \brief FRAMECON.PEN, parity enable */
282 } IfxAsclin_Asc_FrameControl;
283
284 /** \brief Structure for interrupt configuration
285 */
286 typedef struct
287 {
288 uint16 txPriority; /**< \brief transmit interrupt priority */
289 uint16 rxPriority; /**< \brief receive interrupt priority */
290 uint16 erPriority; /**< \brief error interrupt priority */
291 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
292 } IfxAsclin_Asc_InterruptConfig;
293
294 /** \brief Structure for ASC pin configuration
295 */
296 typedef struct
297 {
298 IFX_CONST IfxAsclin_Cts_In *cts; /**< \brief ASC clear to send (CTS) pin */
299 IfxPort_InputMode ctsMode; /**< \brief Cts pin as input */
300 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief ASC Rx pin */
301 IfxPort_InputMode rxMode; /**< \brief Rx pin as input */
302 IFX_CONST IfxAsclin_Rts_Out *rts; /**< \brief ASC (request to send) RTS pin */
303 IfxPort_OutputMode rtsMode; /**< \brief Rts as output */
304 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief ASC Tx pin */
305 IfxPort_OutputMode txMode; /**< \brief Tx as output */
306 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
307 } IfxAsclin_Asc_Pins;
308
309 /** \} */
310
311 /** \brief This union contains the error flags. In addition it allows to write and read to/from all flags as once via the ALL member.
312 */
313 typedef union
314 {
315 uint8 ALL;
316 IfxAsclin_Asc_ErrorFlags flags;
317 } IfxAsclin_Asc_ErrorFlagsUnion;
318
319 /** \addtogroup IfxLld_Asclin_Asc_DataStructures
320 * \{ */
321 /** \brief Module Handle
322 */
323 typedef struct
324 {
325 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
326 Ifx_Fifo *tx; /**< \brief Transmit FIFO buffer */
327 Ifx_Fifo *rx; /**< \brief Receive FIFO buffer */
328 volatile boolean txInProgress; /**< \brief Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isrTransmit */
329 volatile boolean rxSwFifoOverflow; /**< \brief Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed */
330 IfxAsclin_Asc_ErrorFlagsUnion errorFlags; /**< \brief error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError) */
331 Ifx_DataBufferMode dataBufferMode; /**< \brief Rx buffer mode */
332 volatile uint32 sendCount; /**< \brief Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() */
333 volatile Ifx_TickTime txTimestamp; /**< \brief Time stamp of the latest send byte */
334 } IfxAsclin_Asc;
335
336 /** \brief Configuration structure of the module
337 */
338 typedef struct
339 {
340 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
341 IfxAsclin_Asc_BaudRate baudrate; /**< \brief structure for baudrate */
342 IfxAsclin_Asc_BitTimingControl bitTiming; /**< \brief structure for bit timings */
343 IfxAsclin_Asc_FrameControl frame; /**< \brief structure for frame control */
344 IfxAsclin_Asc_FifoControl fifo; /**< \brief structure for FIFO control */
345 IfxAsclin_Asc_InterruptConfig interrupt; /**< \brief structure for interrupt configuration */
346 IFX_CONST IfxAsclin_Asc_Pins *pins; /**< \brief structure for ASC pins */
347 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
348 IfxAsclin_Asc_ErrorFlagsUnion errorFlags; /**< \brief structure for error flags */
349 Ifx_SizeT txBufferSize; /**< \brief Size of the tx buffer */
350 void *txBuffer; /**< \brief The buffer parameter must point on a free memory location where the buffer object will be Initialised.
351 *
352 * The Size of this area must be at least equals to "txBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior.
353 *
354 * If set to NULL_PTR, the buffer will be allocated dynamically according to txBufferSize */
355 Ifx_SizeT rxBufferSize; /**< \brief Size of the rx buffer */
356 void *rxBuffer; /**< \brief The buffer parameter must point on a free memory location where the buffer object will be Initialised.
357 *
358 * The Size of this area must be at least equals to "rxBufferSize + sizeof(Ifx_Fifo) + 8". Not tacking this in account may result in unpredictable behavior.
359 *
360 * If set to NULL, the buffer will be allocated dynamically according to rxBufferSize */
361 boolean loopBack; /**< \brief IOCR.LB, loop back mode selection, 0 for disable, 1 for enable */
362 Ifx_DataBufferMode dataBufferMode; /**< \brief Rx buffer mode */
363 } IfxAsclin_Asc_Config;
364
365 /** \} */
366
367 /** \addtogroup IfxLld_Asclin_Asc_InterruptFunctions
368 * \{ */
369
370 /******************************************************************************/
371 /*-------------------------Global Function Prototypes-------------------------*/
372 /******************************************************************************/
373
374 /** \brief ISR error routine.
375 * \see IfxSdtIf_DPipe_OnError
376 *
377 * Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happened.
378 * The user software could react on these flags, e.g. it could re-initialize the module.
379 * \param asclin module handler
380 * \return None
381 */
382 IFX_EXTERN void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin);
383
384 /** \brief ISR receive routine
385 * \see IfxSdtIf_DPipe_OnReceive
386 * \param asclin module handler
387 * \return None
388 */
389 IFX_EXTERN void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin);
390
391 /** \brief ISR transmit routine
392 * \see IfxSdtIf_DPipe_OnTransmit
393 * \param asclin module handler
394 * \return None
395 */
396 IFX_EXTERN void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin);
397
398 /** \} */
399
400 /** \addtogroup IfxLld_Asclin_Asc_SimpleCom
401 * \{ */
402
403 /******************************************************************************/
404 /*-------------------------Global Function Prototypes-------------------------*/
405 /******************************************************************************/
406
407 /** \brief Reads data from the Rx FIFO
408 * \param asclin module handle
409 * \return number of received data words
410 *
411 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
412 *
413 */
414 IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin);
415
416 /** \brief Writes data into the Tx FIFO
417 * \param asclin module handle
418 * \param data the data byte which should be sent
419 * \return Returns TRUE if data could be written
420 *
421 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
422 *
423 */
424 IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data);
425
426 /** \} */
427
428 /** \addtogroup IfxLld_Asclin_Asc_StreamCom
429 * \{ */
430
431 /******************************************************************************/
432 /*-------------------------Global Function Prototypes-------------------------*/
433 /******************************************************************************/
434
435 /** \brief \see IfxStdIf_DPipe_CanReadCount
436 * \param asclin module handle
437 * \param count Count of data which should be checked (in bytes)
438 * \param timeout in system timer ticks
439 * \return Returns TRUE if at least count bytes are available for read in the rx buffer, if not the Event is armed to be set when the buffer count is bigger or equal to the requested count.
440 */
441 IFX_EXTERN boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout);
442
443 /** \brief \see IfxStdIf_DPipe_CanWriteCount
444 * \param asclin module handle
445 * \param count Count of data which should be checked (in bytes)
446 * \param timeout in system timer ticks
447 * \return Returns TRUE if at least count bytes can be written to the tx buffer, if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
448 */
449 IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout);
450
451 /** \brief \see IfxStdIf_DPipe_ClearRx
452 * \param asclin module handle
453 * \return None
454 */
455 IFX_EXTERN void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin);
456
457 /** \brief \see IfxStdIf_DPipe_ClearTx
458 * \param asclin module handle
459 * \return None
460 */
461 IFX_EXTERN void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin);
462
463 /** \brief \see IfxStdIf_DPipe_FlushTx
464 * \param asclin module handle
465 * \param timeout in system timer ticks
466 * \return Returns TRUE if the FIFO is empty
467 */
468 IFX_EXTERN boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout);
469
470 /** \brief \see IfxStdIf_DPipe_GetReadCount
471 * \param asclin module handle
472 * \return The number of bytes in the rx buffer
473 */
474 IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin);
475
476 /** \brief \see IIfxStdIf_DPipe_GetReadEvent
477 * \param asclin module handle
478 * \return Read event object
479 */
480 IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin);
481
482 /** \brief \see IfxStdIf_DPipe_GetSendCount
483 * \param asclin module handle
484 * \return number of bytes send
485 */
486 IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin);
487
488 /** \brief \see IfxStdIf_DPipe_GetTxTimeStamp
489 * \param asclin module handle
490 * \return Time in ticks
491 */
492 IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin);
493
494 /** \brief \see IfxStdIf_DPipe_GetWriteCount
495 * \param asclin module handle
496 * \return The number of free bytes in the tx buffer
497 */
498 IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin);
499
500 /** \brief \see IIfxStdIf_DPipe_GetWriteEvent
501 * \param asclin module handle
502 * \return Write event object
503 */
504 IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin);
505
506 /** \brief \see IfxStdIf_DPipe_Read
507 * \param asclin module handle
508 * \param data Pointer to the start of data
509 * \param count Pointer to the count of data (in bytes).
510 * \param timeout in system timer ticks
511 * \return Returns TRUE if all items could be read\n
512 * Returns FALSE if not all the items could be read
513 *
514 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
515 *
516 */
517 IFX_EXTERN boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
518
519 /** \brief \see IfxStdIf_DPipe_ResetSendCount
520 * \param asclin module handle
521 * \return None
522 */
523 IFX_EXTERN void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin);
524
525 /** \brief \see IfxStdIf_DPipe_Write
526 * \param asclin module handle
527 * \param data Pointer to the start of data
528 * \param count Pointer to the count of data (in bytes).
529 * \param timeout in system timer ticks
530 * \return Returns TRUE if all items could be written\n
531 * Returns FALSE if not all the items could be written
532 *
533 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
534 *
535 */
536 IFX_EXTERN boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
537
538 /** \} */
539
540 /** \addtogroup IfxLld_Asclin_Asc_ModuleFunctions
541 * \{ */
542
543 /******************************************************************************/
544 /*-------------------------Global Function Prototypes-------------------------*/
545 /******************************************************************************/
546
547 /** \brief Disables the module
548 * \param asclin module handle
549 * \return None
550 */
551 IFX_EXTERN void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin);
552
553 /** \brief Initialises the module
554 * \param asclin module handle
555 * \param config predefined configuration structure of the module
556 * \return Status
557 *
558 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
559 *
560 */
561 IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config);
562
563 /** \brief Fills the config structure with default values
564 * \param config configuration structure of the module
565 * \param asclin pointer to ASCLIN registers
566 * \return None
567 *
568 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
569 *
570 */
571 IFX_EXTERN void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin);
572
573 /** \} */
574
575 /******************************************************************************/
576 /*-------------------------Global Function Prototypes-------------------------*/
577 /******************************************************************************/
578
579 /** \brief Initiate the data transmission
580 * \param asclin module handle
581 * \return None
582 *
583 * A coding example can be found in \ref IfxLld_Asclin_Asc_Usage
584 *
585 */
586 IFX_EXTERN void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin);
587
588 /** \brief Initialize the standard interface to the device driver
589 * \param stdif standard interface object, will be initialized by the function
590 * \param asclin device driver object used by the standard interface. must be initialised separately
591 * \return TRUE on success, else FALSE
592 */
593 IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin);
594
595 #endif /* IFXASCLIN_ASC_H */
IfxAsclin_Asc_Config::baudrate
IfxAsclin_Asc_BaudRate baudrate
structure for baudrate
Definition: IfxAsclin_Asc.h:341
IfxAsclin_Asc_Config::rxBufferSize
Ifx_SizeT rxBufferSize
Size of the rx buffer.
Definition: IfxAsclin_Asc.h:355
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:39
IfxAsclin_Asc_isrError
IFX_EXTERN void IfxAsclin_Asc_isrError(IfxAsclin_Asc *asclin)
ISR error routine.
Definition: IfxAsclin_Asc.c:416
IfxAsclin_Asc_getReadCount
IFX_EXTERN sint32 IfxAsclin_Asc_getReadCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:113
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:59
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin_Asc_Config::frame
IfxAsclin_Asc_FrameControl frame
structure for frame control
Definition: IfxAsclin_Asc.h:343
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:237
Ifx_DataBufferMode
Ifx_DataBufferMode
Definition: Ifx_Types.h:144
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
IfxAsclin_Asc_getWriteEvent
IFX_EXTERN IfxStdIf_DPipe_WriteEvent IfxAsclin_Asc_getWriteEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:143
IfxAsclin_Asc_Config::rxBuffer
void * rxBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:356
IfxAsclin_Asc
Module Handle.
Definition: IfxAsclin_Asc.h:323
IfxAsclin_Asc_BitTimingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, number of samples per bit (1 or 3), sample mode/median filter.
Definition: IfxAsclin_Asc.h:256
IfxAsclin_Asc_getTxTimeStamp
IFX_EXTERN Ifx_TickTime IfxAsclin_Asc_getTxTimeStamp(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:131
IfxAsclin_Asc_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Asc.h:347
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:326
IfxAsclin_Asc_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Asc_initModule(IfxAsclin_Asc *asclin, const IfxAsclin_Asc_Config *config)
Initialises the module.
Definition: IfxAsclin_Asc.c:149
IfxAsclin_Asc_getSendCount
IFX_EXTERN uint32 IfxAsclin_Asc_getSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:125
IfxAsclin_Asc_getReadEvent
IFX_EXTERN IfxStdIf_DPipe_ReadEvent IfxAsclin_Asc_getReadEvent(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:119
IfxAsclin_Asc_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Asc.h:264
IfxAsclin_Asc_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:266
IfxAsclin_Asc_Pins::cts
IFX_CONST IfxAsclin_Cts_In * cts
ASC clear to send (CTS) pin.
Definition: IfxAsclin_Asc.h:298
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:278
IfxAsclin_Asc_isrReceive
IFX_EXTERN void IfxAsclin_Asc_isrReceive(IfxAsclin_Asc *asclin)
ISR receive routine.
Definition: IfxAsclin_Asc.c:453
IfxAsclin_Asc_BaudRate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Asc.h:247
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxAsclin_Asc_stdIfDPipeInit
IFX_EXTERN boolean IfxAsclin_Asc_stdIfDPipeInit(IfxStdIf_DPipe *stdif, IfxAsclin_Asc *asclin)
Initialize the standard interface to the device driver.
Definition: IfxAsclin_Asc.c:563
IfxAsclin_Asc_Config::fifo
IfxAsclin_Asc_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Asc.h:344
IfxAsclin_Asc_ErrorFlags::parityError
uint8 parityError
parity error
Definition: IfxAsclin_Asc.h:234
float32
float float32
Definition: Platform_Types.h:167
IfxAsclin_Asc_getWriteCount
IFX_EXTERN sint32 IfxAsclin_Asc_getWriteCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:137
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxAsclin_Asc_Pins::ctsMode
IfxPort_InputMode ctsMode
Cts pin as input.
Definition: IfxAsclin_Asc.h:299
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:372
IfxAsclin_Asc_BaudRate::prescaler
uint16 prescaler
BITCON.PRESCALER, the division ratio of the predevider.
Definition: IfxAsclin_Asc.h:248
IfxAsclin_Asc::sendCount
volatile uint32 sendCount
Number of byte that are send out, this value is reset with the function Asc_If_resetSendCount() ...
Definition: IfxAsclin_Asc.h:332
IfxAsclin_Asc_InterruptConfig
Structure for interrupt configuration.
Definition: IfxAsclin_Asc.h:286
IfxAsclin_Asc_isrTransmit
IFX_EXTERN void IfxAsclin_Asc_isrTransmit(IfxAsclin_Asc *asclin)
ISR transmit routine.
Definition: IfxAsclin_Asc.c:495
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxAsclin_Asc_FrameControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Asc.h:280
IfxAsclin_Asc_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUFF, receive buffer mode (Rx FIFO or Rx buffer)
Definition: IfxAsclin_Asc.h:268
IfxAsclin_Asc_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Asc.h:265
IfxAsclin_Asc_Config::interrupt
IfxAsclin_Asc_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Asc.h:345
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:255
IfxAsclin_Asc_ErrorFlagsUnion
This union contains the error flags. In addition it allows to write and read to/from all flags as onc...
Definition: IfxAsclin_Asc.h:313
IfxAsclin_Asc::errorFlags
IfxAsclin_Asc_ErrorFlagsUnion errorFlags
error reported by ASCLIN during runtime (written by IfxAsclin_Asc_isrError)
Definition: IfxAsclin_Asc.h:330
IfxAsclin_Asc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Asc.h:306
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:407
IfxAsclin_Asc_BitTimingControl
Structure for bit timings.
Definition: IfxAsclin_Asc.h:254
IfxAsclin_Asc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Asc.h:291
IfxAsclin_Asc_BaudRate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, division ratio of the baudrate post devider.
Definition: IfxAsclin_Asc.h:249
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxAsclin_Asc::txInProgress
volatile boolean txInProgress
Ongoing transfer. Will be set by IfxAsclin_Asc_initiateTransmission, and cleared by IfxAsclin_Asc_isr...
Definition: IfxAsclin_Asc.h:328
IfxAsclin_Asc_Config::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Asc.h:361
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:208
Bsp.h
Board support package.
IfxAsclin_Asc_FrameControl::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module.
Definition: IfxAsclin_Asc.h:277
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_Fifo.h
FIFO buffer functions.
IfxAsclin_Asc_BaudRate
Structure for baudrate.
Definition: IfxAsclin_Asc.h:245
IfxAsclin_Asc_Pins::rts
IFX_CONST IfxAsclin_Rts_Out * rts
ASC (request to send) RTS pin.
Definition: IfxAsclin_Asc.h:302
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:137
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:159
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin_Asc_initiateTransmission
IFX_EXTERN void IfxAsclin_Asc_initiateTransmission(IfxAsclin_Asc *asclin)
Initiate the data transmission.
Definition: IfxAsclin_Asc.c:385
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:90
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:114
IfxAsclin_Asc_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Asc.h:267
IfxAsclin_Asc_blockingRead
IFX_EXTERN uint8 IfxAsclin_Asc_blockingRead(IfxAsclin_Asc *asclin)
Reads data from the Rx FIFO.
Definition: IfxAsclin_Asc.c:36
IfxAsclin_Asc_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Asc.h:275
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:55
IfxAsclin_Asc::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Asc.h:325
IfxAsclin_Asc_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxAsclin_Asc.h:301
IfxAsclin_Asc_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxAsclin_Asc.h:305
_Fifo
Definition: Ifx_Fifo.h:53
IfxAsclin_Asc_Config::bitTiming
IfxAsclin_Asc_BitTimingControl bitTiming
structure for bit timings
Definition: IfxAsclin_Asc.h:342
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:304
IfxAsclin_Asc_resetSendCount
IFX_EXTERN void IfxAsclin_Asc_resetSendCount(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:557
IfxAsclin_Asc_Config::pins
IFX_CONST IfxAsclin_Asc_Pins * pins
structure for ASC pins
Definition: IfxAsclin_Asc.h:346
IfxAsclin_Asc_BitTimingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Asc.h:257
IfxAsclin_Asc_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Asc.h:232
IfxAsclin_Asc_clearRx
IFX_EXTERN void IfxAsclin_Asc_clearRx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:68
IfxAsclin_Asc_Config
Configuration structure of the module.
Definition: IfxAsclin_Asc.h:338
IfxAsclin_Asc::tx
Ifx_Fifo * tx
Transmit FIFO buffer.
Definition: IfxAsclin_Asc.h:326
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IfxAsclin_Asc_FrameControl
Structure for frame control.
Definition: IfxAsclin_Asc.h:273
IfxAsclin_Asc_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Asc.h:288
IfxAsclin_Asc_ErrorFlagsUnion::flags
IfxAsclin_Asc_ErrorFlags flags
Definition: IfxAsclin_Asc.h:316
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:396
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxAsclin_Asc_canWriteCount
IFX_EXTERN boolean IfxAsclin_Asc_canWriteCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:62
IfxAsclin_Asc_initModuleConfig
IFX_EXTERN void IfxAsclin_Asc_initModuleConfig(IfxAsclin_Asc_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Asc.c:332
IfxAsclin_Asc_write
IFX_EXTERN boolean IfxAsclin_Asc_write(IfxAsclin_Asc *asclin, const void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:592
IfxAsclin_Asc_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Asc.h:278
IfxAsclin_Asc_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Asc.h:237
IfxAsclin_Asc_FifoControl
Structure for FIFO control.
Definition: IfxAsclin_Asc.h:262
IfxAsclin_Asc_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Asc.h:279
IfxAsclin_Asc_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
ASC Rx pin.
Definition: IfxAsclin_Asc.h:300
IfxAsclin_Asc_flushTx
IFX_EXTERN boolean IfxAsclin_Asc_flushTx(IfxAsclin_Asc *asclin, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:92
IfxAsclin_Asc_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Asc.h:238
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxAsclin_Asc_FrameControl::parityBit
boolean parityBit
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Asc.h:281
IfxAsclin_Asc_Pins::rtsMode
IfxPort_OutputMode rtsMode
Rts as output.
Definition: IfxAsclin_Asc.h:303
IfxAsclin_Asc_ErrorFlagsUnion::ALL
uint8 ALL
Definition: IfxAsclin_Asc.h:315
IfxAsclin_Asc_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Asc.h:290
IfxAsclin_Asc_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
ASC Tx pin.
Definition: IfxAsclin_Asc.h:304
IfxAsclin_Asc_clearTx
IFX_EXTERN void IfxAsclin_Asc_clearTx(IfxAsclin_Asc *asclin)
Definition: IfxAsclin_Asc.c:75
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:336
IfxAsclin_Asc_blockingWrite
IFX_EXTERN boolean IfxAsclin_Asc_blockingWrite(IfxAsclin_Asc *asclin, uint8 data)
Writes data into the Tx FIFO.
Definition: IfxAsclin_Asc.c:48
IfxAsclin_Asc_Config::txBuffer
void * txBuffer
The buffer parameter must point on a free memory location where the buffer object will be Initialised...
Definition: IfxAsclin_Asc.h:350
IfxAsclin_Asc_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Asc.h:289
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
sint32
long sint32
Definition: Platform_Types.h:131
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:53
IfxAsclin_Asc::txTimestamp
volatile Ifx_TickTime txTimestamp
Time stamp of the latest send byte.
Definition: IfxAsclin_Asc.h:333
IfxAsclin_Asc_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Asc.h:276
IfxAsclin_Asc_Config::txBufferSize
Ifx_SizeT txBufferSize
Size of the tx buffer.
Definition: IfxAsclin_Asc.h:349
IfxAsclin_Asc_Pins
Structure for ASC pin configuration.
Definition: IfxAsclin_Asc.h:296
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:228
IfxAsclin_Asc::rxSwFifoOverflow
volatile boolean rxSwFifoOverflow
Will be set by IfxAsclin_Asc_isrReceive if the SW Fifo overflowed.
Definition: IfxAsclin_Asc.h:329
IfxAsclin_Asc_read
IFX_EXTERN boolean IfxAsclin_Asc_read(IfxAsclin_Asc *asclin, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:547
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Asc::rx
Ifx_Fifo * rx
Receive FIFO buffer.
Definition: IfxAsclin_Asc.h:327
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxAsclin_Asc_ErrorFlags::frameError
uint8 frameError
transmit complete/pending error
Definition: IfxAsclin_Asc.h:235
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:54
IfxAsclin_Asc_disableModule
IFX_EXTERN void IfxAsclin_Asc_disableModule(IfxAsclin_Asc *asclin)
Disables the module.
Definition: IfxAsclin_Asc.c:82
IfxAsclin_Asc_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Asc.h:236
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:363
IfxAsclin_Asc::dataBufferMode
Ifx_DataBufferMode dataBufferMode
Rx buffer mode.
Definition: IfxAsclin_Asc.h:331
IfxAsclin_Asc_canReadCount
IFX_EXTERN boolean IfxAsclin_Asc_canReadCount(IfxAsclin_Asc *asclin, Ifx_SizeT count, Ifx_TickTime timeout)
Definition: IfxAsclin_Asc.c:56


iLLD_TC26B: IfxAsclin_Lin.c Source File

  • Asclin
  • Lin
IfxAsclin_Lin.c
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1 /**
2 * \file IfxAsclin_Lin.c
3 * \brief ASCLIN LIN details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxAsclin_Lin.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
36 {
37 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
38
39 /* check Rx header end acknowledgement */
40 if (IfxAsclin_getRxHeaderEndFlagStatus(asclinSFR)) /* RHE flag*/
41 {
42 IfxAsclin_clearRxHeaderEndFlag(asclinSFR);
43 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
44 }
45
46 /* check for Rx header error flags */
47 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR)) /* HT flag*/
48 {
49 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
50 asclin->errorFlagsStatus.headerTimeout = 1;
51 }
52
53 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
54 {
55 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
56 asclin->errorFlagsStatus.collisionDetectionError = 1;
57 }
58
59 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
60 {
61 IfxAsclin_clearFrameErrorFlag(asclinSFR);
62 asclin->errorFlagsStatus.frameError = 1;
63 }
64
65 if (IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(asclinSFR)) /* LA flag*/
66 {
67 IfxAsclin_clearLinAutoBaudDetectionErrorFlag(asclinSFR);
68 asclin->errorFlagsStatus.linAutobaudDetectionError = 1;
69 }
70
71 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR)) /* LP flag*/
72 {
73 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
74 asclin->errorFlagsStatus.linParityError = 1;
75 }
76 }
77
78
79 void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
80 {
81 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
82
83 /* check Rx response end acknowledgement*/
84 if (IfxAsclin_getRxResponseEndFlagStatus(asclinSFR))
85 {
86 IfxAsclin_clearRxResponseEndFlag(asclinSFR);
87 asclin->acknowledgmentFlags.rxResponseEnd = 1;
88 }
89
90 /* check for Rx response error flags */
91 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR)) /* RFO flag*/
92 {
93 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
94 asclin->errorFlagsStatus.rxFifoOverflow = 1;
95 }
96
97 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
98 {
99 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
100 asclin->errorFlagsStatus.collisionDetectionError = 1;
101 }
102
103 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
104 {
105 IfxAsclin_clearFrameErrorFlag(asclinSFR);
106 asclin->errorFlagsStatus.frameError = 1;
107 }
108
109 if (IfxAsclin_getLinChecksumErrorFlagStatus(asclinSFR)) /* LC flag*/
110 {
111 IfxAsclin_clearLinChecksumErrorFlag(asclinSFR);
112 asclin->errorFlagsStatus.linChecksumError = 1;
113 }
114
115 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR)) /* RT flag*/
116 {
117 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
118 asclin->errorFlagsStatus.responseTimeout = 1;
119 }
120
121 if ((asclin->linMode == IfxAsclin_LinMode_slave) && (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))) /* BD flag only in slave mode*/
122 {
123 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
124 asclin->errorFlagsStatus.breakDetected = 1;
125 }
126 }
127
128
129 void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
130 {
131 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
132
133 /* check Tx header end acknowledgement */
134 if (IfxAsclin_getTxHeaderEndFlagStatus(asclinSFR)) /* THE flag*/
135 {
136 IfxAsclin_clearTxHeaderEndFlag(asclinSFR);
137 asclin->acknowledgmentFlags.txHeaderEnd = 1;
138 }
139
140 /* check for Tx header error flags */
141 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR)) /* HT flag*/
142 {
143 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
144 asclin->errorFlagsStatus.headerTimeout = 1;
145 }
146
147 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
148 {
149 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
150 asclin->errorFlagsStatus.collisionDetectionError = 1;
151 }
152
153 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR)) /* FE flag*/
154 {
155 IfxAsclin_clearFrameErrorFlag(asclinSFR);
156 asclin->errorFlagsStatus.frameError = 1;
157 }
158
159 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR)) /* LP flag*/
160 {
161 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
162 asclin->errorFlagsStatus.linParityError = 1;
163 }
164 }
165
166
167 void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
168 {
169 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
170
171 /* check Tx response end acknowledgement */
172 if (IfxAsclin_getTxResponseEndFlagStatus(asclinSFR)) /* TRE flag*/
173 {
174 IfxAsclin_clearTxResponseEndFlag(asclinSFR);
175 asclin->acknowledgmentFlags.txResponseEnd = 1;
176 }
177
178 /* check for Tx response error flags */
179 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR)) /* TFO flag*/
180 {
181 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
182 asclin->errorFlagsStatus.txFifoOverflow = 1;
183 }
184
185 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR)) /* CE flag*/
186 {
187 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
188 asclin->errorFlagsStatus.collisionDetectionError = 1;
189 }
190
191 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR)) /* RT flag*/
192 {
193 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
194 asclin->errorFlagsStatus.responseTimeout = 1;
195 }
196
197 if ((asclin->linMode == IfxAsclin_LinMode_slave) && (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))) /* BD flag only in slave mode*/
198 {
199 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
200 asclin->errorFlagsStatus.breakDetected = 1;
201 }
202 }
203
204
205 void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
206 {
207 /*clear acknowledgement flags status */
208 asclin->acknowledgmentFlags.txHeaderEnd = 0;
209 asclin->acknowledgmentFlags.rxHeaderEnd = 0;
210 asclin->acknowledgmentFlags.txResponseEnd = 0;
211 asclin->acknowledgmentFlags.rxResponseEnd = 0;
212 asclin->acknowledgmentFlags.txCompleted = 0;
213
214 /* clear error flags status*/
215 asclin->errorFlagsStatus.headerTimeout = 0;
216 asclin->errorFlagsStatus.collisionDetectionError = 0;
217 asclin->errorFlagsStatus.frameError = 0;
218 asclin->errorFlagsStatus.responseTimeout = 0;
219 asclin->errorFlagsStatus.linParityError = 0;
220 asclin->errorFlagsStatus.breakDetected = 0;
221 asclin->errorFlagsStatus.linAutobaudDetectionError = 0;
222 asclin->errorFlagsStatus.linChecksumError = 0;
223 asclin->errorFlagsStatus.txFifoOverflow = 0;
224 asclin->errorFlagsStatus.rxFifoOverflow = 0;
225 }
226
227
228 void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
229 {
230 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
231 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
232 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection*/
233 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module*/
234 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on*/
235 }
236
237
238 void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
239 {
240 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
241 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disable Rx FIFO*/
242 IfxAsclin_setHeaderResponseSelect(asclinSFR, IfxAsclin_HeaderResponseSelect_headerOnly); /* set header only mode*/
243 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags*/
244 }
245
246
247 IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
248 {
249 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers */
250 IfxAsclin_Status status = IfxAsclin_Status_noError;
251
252 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
253 IfxAsclin_enableModule(asclinSFR); /* enabling the module*/
254
255 /* mode initialisation */
256 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
257 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode*/
258 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
259
260 /* lin mode initialisation */
261 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock*/
262 IfxAsclin_setFrameMode(asclinSFR, config->frameMode); /* setting the module in Lin mode*/
263 IfxAsclin_setLinMode(asclinSFR, config->linMode); /* configuring lin mode of operation (master/slave)*/
264 IfxAsclin_setRxInput(asclinSFR, config->alti); /* selecting the Rx(alternate) input pin*/
265 IfxAsclin_setPrescaler(asclinSFR, config->btc.prescaler); /* setting the prescaler*/
266 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
267
268 /* baudrate generation in both modes */
269 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, config->brg.baudrate,
270 config->btc.oversampling,
271 config->bsc.samplePointPosition,
272 config->bsc.medianFilter); /* setting the baudrate bit fields to generate the required baudrate*/
273
274 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again*/
275
276 /* auto baud rate detection in slave mode */
277 if (config->linMode == IfxAsclin_LinMode_slave)
278 {
279 IfxAsclin_enableAutoBaudrateDetection(asclinSFR, config->brd.abd); /* setting the auto baudrate detection (enable/disable)*/
280 IfxAsclin_setBrdUpperlimt(asclinSFR, config->brd.upperLimit); /* setting the upper limit for abd*/
281 IfxAsclin_setBrdLowerlimt(asclinSFR, config->brd.lowerLimit); /* setting the lower limit for abd*/
282 }
283
284 /* frame control initialisation */
285 IfxAsclin_enableParity(asclinSFR, config->frame.parityEnable); /* setting parity (enable/disable)*/
286 IfxAsclin_setParityType(asclinSFR, config->frame.parityType); /* setting parity type (odd/even)*/
287 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit*/
288 IfxAsclin_enableCollisionDetection(asclinSFR, config->frame.collisionDetectionEnable); /* setting collision detection (enable/disable)*/
289 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction*/
290
291 /* data control initialisation */
292 IfxAsclin_setDataLength(asclinSFR, config->data.dataLength); /* setting the number of bytes to be transfered*/
293 IfxAsclin_setHeaderResponseSelect(asclinSFR, config->data.headerOnly); /* setting the header only or header and response mode*/
294 IfxAsclin_setLinResponseTimeoutMode(asclinSFR, config->data.responseTimeoutMode); /* setting the response timeout mode (frame/response)*/
295 IfxAsclin_setChecksumMode(asclinSFR, config->data.checksum); /* setting the checksum mode (classic/enhanced)*/
296 IfxAsclin_setLinResponseTimeoutThreshold(asclinSFR, config->data.responseTimeout); /* setting the lin response timeout threshold*/
297
298 /* lin control initialisation */
299 IfxAsclin_enableHardwareChecksum(asclinSFR, config->lin.csEnable); /* setting the hardware checksum (enable/disable)*/
300 IfxAsclin_setChecksumInjection(asclinSFR, config->lin.csi); /* setting checksum injection*/
301
302 /* master specific initialisation */
303 if (config->linMode == IfxAsclin_LinMode_master)
304 {
305 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay for master*/
306 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay for master mode*/
307 IfxAsclin_setLinBreakLength(asclinSFR, config->lin.breakLength); /* setting the break generation length*/
308 IfxAsclin_setLinHeaderTimeout(asclinSFR, config->lin.headerTimeout); /* setting the header timeout value for master*/
309 asclin->receiveIdEnable = config->receiveIdEnable; /* echoing the selection of receiving Id in its own Rx FIFO*/
310 }
311
312 /* slave specific initialisation */
313 if (config->linMode == IfxAsclin_LinMode_slave)
314 {
315 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay for slave */
316 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay for slave mode */
317 IfxAsclin_setLinBreakLength(asclinSFR, config->lin.breakLength); /* setting the break detection length */
318 IfxAsclin_setLinHeaderTimeout(asclinSFR, config->lin.headerTimeout); /* setting the header timeout value for slave*/
319 }
320
321 /* fifo control initialisation */
322 IfxAsclin_setTxFifoInletWidth(asclinSFR, config->fifo.inWidth); /* setting Tx FIFO inlet width*/
323 IfxAsclin_setRxFifoOutletWidth(asclinSFR, config->fifo.outWidth); /* setting Rx FIFO outlet width*/
324 IfxAsclin_setRxBufferMode(asclinSFR, config->fifo.buffMode); /* setting Rx FIFO mode*/
325 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* disabling Rx FIFO for recieving*/
326 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disabling Tx FIFO for transmitting*/
327 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
328 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO*/
329
330 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags*/
331 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags*/
332
333 /* Initialising the Interrupts */
334 asclin->isInterruptMode = config->isInterruptMode;
335 IfxSrc_Tos tos = config->interrupt.typeOfService;
336
337 if (config->isInterruptMode)
338 {
339 Ifx_ASCLIN_FLAGSENABLE flagsenable;
340 flagsenable.U = asclinSFR->FLAGSENABLE.U;
341
342 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
343 {
344 volatile Ifx_SRC_SRCR *src;
345 src = IfxAsclin_getSrcPointerRx(asclinSFR);
346 IfxSrc_init(src, tos, config->interrupt.rxPriority);
347
348 flagsenable.B.RHE = config->interrupt.enabledInterrupt.rxReceivedHeader;
349 flagsenable.B.RRE = config->interrupt.enabledInterrupt.rxReceivedResponse;
350
351 IfxSrc_enable(src);
352 }
353
354 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
355 {
356 volatile Ifx_SRC_SRCR *src;
357 src = IfxAsclin_getSrcPointerTx(asclinSFR);
358 IfxSrc_init(src, tos, config->interrupt.txPriority);
359
360 flagsenable.B.THE = config->interrupt.enabledInterrupt.txTransmittedHeader;
361 flagsenable.B.TRE = config->interrupt.enabledInterrupt.txTransmittedResponse;
362
363 IfxSrc_enable(src);
364 }
365
366 if (config->interrupt.exPriority > 0) /*These interrupts are not serviced by dma*/
367 {
368 volatile Ifx_SRC_SRCR *src;
369 src = IfxAsclin_getSrcPointerEr(asclinSFR);
370 IfxSrc_init(src, tos, config->interrupt.exPriority);
371
372 flagsenable.B.BDE = config->interrupt.enabledInterrupt.exBreakDetected;
373 flagsenable.B.TCE = config->interrupt.enabledInterrupt.exTransmissionCompleted;
374
375 flagsenable.B.CEE = config->interrupt.enabledInterrupt.exCollisionDetectionError;
376 flagsenable.B.FEE = config->interrupt.enabledInterrupt.exFramingError;
377 flagsenable.B.HTE = config->interrupt.enabledInterrupt.exHeaderTimeout;
378 flagsenable.B.ABE = config->interrupt.enabledInterrupt.exLinAutobaudDetectionError;
379 flagsenable.B.LCE = config->interrupt.enabledInterrupt.exLinChecksumError;
380 flagsenable.B.LPE = config->interrupt.enabledInterrupt.exLinParityError;
381 flagsenable.B.RFOE = config->interrupt.enabledInterrupt.exReceiveFIFOOverflow;
382 flagsenable.B.RTE = config->interrupt.enabledInterrupt.exResponseTimeout;
383 flagsenable.B.TFOE = config->interrupt.enabledInterrupt.exTransmitFIFOOverflow;
384
385 IfxSrc_enable(src);
386 }
387
388 /*Update FLAGSENABLE register in one shot*/
389 asclinSFR->FLAGSENABLE.U = flagsenable.U;
390 }
391
392 /* Pin mapping*/
393 const IfxAsclin_Lin_Pins *pins = config->pins;
394
395 if (pins != NULL_PTR)
396 {
397 IfxAsclin_Rx_In *rx = pins->rx;
398
399 if (rx != NULL_PTR)
400 {
401 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
402 }
403
404 IfxAsclin_Tx_Out *tx = pins->tx;
405
406 if (tx != NULL_PTR)
407 {
408 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
409 }
410 }
411
412 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
413
414 asclin->linMode = config->linMode; /* echoing the mode of operation to module handler*/
415
416 return status;
417 }
418
419
420 void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
421 {
422 config->asclin = asclin;
423 config->frameMode = IfxAsclin_FrameMode_lin; /* LIN mode*/
424 config->linMode = IfxAsclin_LinMode_master; /* Lin Master mode*/
425 config->clockSource = IfxAsclin_ClockSource_kernelClock; /* kernel clock, fclc*/
426 config->alti = IfxAsclin_RxInputSelect_0; /* alternate input 0;*/
427
428 /* Default values for baudrate */
429 config->brg.baudrate = 19200.0; /* default baudrate (the fractional dividier setup will be calculated in initModule)*/
430 /* Default Values for Bit Timings */
431 config->btc.prescaler = 4; /* default prescaler*/
432 config->btc.oversampling = IfxAsclin_OversamplingFactor_16; /* default oversampling factor*/
433 /* Default Values for Bit sampling */
434 config->bsc.filterDepth = 24U; /* digital glitch filter depth 24*/
435 config->bsc.medianFilter = IfxAsclin_SamplesPerBit_one; /* one sample per bit*/
436 config->bsc.samplePointPosition = IfxAsclin_SamplePointPosition_3; /* sample point position at 3*/
437 /* Default Values for Frame Control */
438 config->frame.parityEnable = FALSE; /* disable parity*/
439 config->frame.parityType = IfxAsclin_ParityType_even; /* even parity (if parity enabled) */
440 config->frame.stopBit = IfxAsclin_StopBit_1; /* one stop bit */
441 config->frame.shiftDir = IfxAsclin_ShiftDirection_lsbFirst; /* shift diection LSB first */
442 config->frame.collisionDetectionEnable = FALSE;
443 /* Default Values for Data Control */
444 config->data.dataLength = IfxAsclin_DataLength_8; /* number of bytes of the response */
445 config->data.headerOnly = IfxAsclin_HeaderResponseSelect_headerAndResponse; /* header and response */
446 config->data.responseTimeoutMode = IfxAsclin_LinResponseTimeoutMode_frameTimeout; /* frame timeout */
447 config->data.checksum = IfxAsclin_Checksum_enhanced; /* enhanced checksum */
448 config->data.responseTimeout = 255;
449 /* Default Values for fifo Control */
450 config->fifo.outWidth = IfxAsclin_RxFifoOutletWidth_1; /* 8-bit wide read */
451 config->fifo.inWidth = IfxAsclin_TxFifoInletWidth_1; /* 8-bit wide write */
452 config->fifo.buffMode = IfxAsclin_ReceiveBufferMode_rxFifo; /* RxFIFO */
453 /* Default Values for Lin Control */
454 config->lin.csEnable = TRUE; /* checksum enable */
455 config->lin.csi = IfxAsclin_ChecksumInjection_written; /* 8-bit wide write */
456
457 /* Default Values for Interrupt Config */
458 config->interrupt.rxPriority = 0; /* receive interrupt priority 0*/
459 config->interrupt.txPriority = 0; /* transmit interrupt priority 0*/
460 config->interrupt.exPriority = 0; /* error interrupt priority 0*/
461 config->interrupt.typeOfService = IfxSrc_Tos_cpu0; /* type of service CPU0*/
462 config->isInterruptMode = FALSE; /* default is in polling mode*/
463
464 /* configuration for master mode */
465 {
466 config->receiveIdEnable = FALSE; /* receive Id in Rx Fifo after sending */
467 config->frame.idleDelay = IfxAsclin_IdleDelay_2; /* idle dalay 2 bits */
468 config->frame.leadDelay = IfxAsclin_LeadDelay_1; /*lead delay in master 1 bit */
469 /* Default Values for Lin Control */
470 config->lin.breakLength = 13; /* break generation length 13 */
471 config->lin.headerTimeout = 56; /* header timeout value in master 56 */
472 }
473
474 /*configuration for enabling interrupts*/
475 {
476 config->interrupt.enabledInterrupt.rxReceivedHeader = FALSE;
477 config->interrupt.enabledInterrupt.rxReceivedResponse = FALSE;
478 config->interrupt.enabledInterrupt.txTransmittedHeader = FALSE;
479 config->interrupt.enabledInterrupt.txTransmittedResponse = FALSE;
480 config->interrupt.enabledInterrupt.exBreakDetected = FALSE;
481 config->interrupt.enabledInterrupt.exTransmissionCompleted = FALSE;
482 config->interrupt.enabledInterrupt.exHeaderTimeout = FALSE;
483 config->interrupt.enabledInterrupt.exResponseTimeout = FALSE;
484 config->interrupt.enabledInterrupt.exLinParityError = FALSE;
485 config->interrupt.enabledInterrupt.exLinAutobaudDetectionError = FALSE;
486 config->interrupt.enabledInterrupt.exLinChecksumError = FALSE;
487 config->interrupt.enabledInterrupt.exFramingError = FALSE;
488 config->interrupt.enabledInterrupt.exCollisionDetectionError = FALSE;
489 config->interrupt.enabledInterrupt.exReceiveFIFOOverflow = FALSE;
490 config->interrupt.enabledInterrupt.exTransmitFIFOOverflow = FALSE;
491 }
492
493 config->pins = NULL_PTR; /* pins to null pointer*/
494 }
495
496
497 void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
498 {
499 boolean result = 0;
500 IfxAsclin_Lin_prepareHeaderReception(asclin); /* prepare for header reception */
501 result |= IfxAsclin_Lin_waitForReceivedHeader(asclin); /* wait until receive header end acknowledgemnet*/
502
503 if (result == 1)
504 {
505 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
506 }
507 else
508 {
509 IfxAsclin_Lin_readHeader(asclin, id); /*read the ID byte*/
510 }
511 }
512
513
514 void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
515 {
516 boolean result = 0;
517 IfxAsclin_Lin_prepareResponseReception(asclin, length); /* prepare the response reception */
518 result |= IfxAsclin_Lin_waitForReceivedResponse(asclin); /* wait until receive response end acknowledgemnet or an error is occured*/
519
520 if (result == 1)
521 {
522 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
523 }
524 else
525 {
526 IfxAsclin_Lin_readResponse(asclin, data, length); /* read the data bytes */
527 }
528 }
529
530
531 void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
532 {
533 boolean result = 0;
534 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
535 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
536
537 if (asclin->receiveIdEnable) /* if receiving the sent id byte into its own Rx FIFO is selected*/
538 {
539 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
540 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enabling Rx FIFO */
541 }
542 else
543 {
544 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disabling Rx FIFO */
545 }
546
547 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
548 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* enabling Tx FIFO for transmitting*/
549 IfxAsclin_write8(asclinSFR, id, 1U); /* writing the ID byte */
550 IfxAsclin_setTransmitHeaderRequestFlag(asclinSFR); /* setting THRQS flag */
551
552 if (asclin->isInterruptMode == FALSE) /*Only for Polling Mode*/
553 {
554 result |= IfxAsclin_Lin_waitForTransmittedHeader(asclin); /* waiting until transmit header end acknowledgemnet */
555
556 if (result == 1)
557 {
558 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
559 }
560 }
561 else
562 {
563 IfxAsclin_Lin_clearFlagsStatus(asclin);
564 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
565 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
566 }
567 }
568
569
570 void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
571 {
572 boolean result = 0;
573 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
574 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(length - 1)); /* set number of bytes to be transfered */
575 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
576 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
577 IfxAsclin_enableRxFifoInlet(asclinSFR, FALSE); /* disable Rx FIFO */
578 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* enable Tx FIFO for transmitting */
579 IfxAsclin_write8(asclinSFR, data, length); /* write the data bytes; */
580 IfxAsclin_setTransmitResponseRequestFlag(asclinSFR); /* set TRRQS flag */
581 result |= IfxAsclin_Lin_waitForTransmittedResponse(asclin); /* wait until transmit response end acknowledgemnet */
582
583 if (result == 1)
584 {
585 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
586 }
587 }
588
589
590 boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
591 {
592 boolean result = 0;
593 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
594
595 /* wait until receive header end acknowledgemnet has been detected */
596 while (asclin->acknowledgmentFlags.rxHeaderEnd != 1)
597 {
598 IfxAsclin_Lin_checkForReceivedHeaderFlags(asclin);
599
600 if ((asclin->errorFlagsStatus.headerTimeout == 1)
601 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
602 || (asclin->errorFlagsStatus.frameError == 1)
603 || (asclin->errorFlagsStatus.linAutobaudDetectionError == 1)
604 || (asclin->errorFlagsStatus.linParityError == 1))
605 {
606 result = 1;
607 break;
608 }
609 }
610
611 return result;
612 }
613
614
615 boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
616 {
617 boolean result = 0;
618 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
619
620 /* wait until receive response end acknowledgemnet has been detected */
621 while (asclin->acknowledgmentFlags.rxResponseEnd != 1)
622 {
623 IfxAsclin_Lin_checkForReceivedResponseFlags(asclin);
624
625 if ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
626 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
627 || (asclin->errorFlagsStatus.frameError == 1)
628 || (asclin->errorFlagsStatus.linChecksumError == 1)
629 || (asclin->errorFlagsStatus.responseTimeout == 1)
630 || (asclin->errorFlagsStatus.breakDetected == 1))
631 {
632 result = 1;
633 break;
634 }
635 }
636
637 return result;
638 }
639
640
641 boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
642 {
643 boolean result = 0;
644 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
645
646 /* wait until transmit header end acknowledgemnet has been detected */
647 while (asclin->acknowledgmentFlags.txHeaderEnd != 1)
648 {
649 IfxAsclin_Lin_checkForTransmittedHeaderFlags(asclin);
650
651 if ((asclin->errorFlagsStatus.headerTimeout == 1)
652 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
653 || (asclin->errorFlagsStatus.frameError == 1)
654 || (asclin->errorFlagsStatus.linParityError == 1))
655 {
656 result = 1;
657 break;
658 }
659 }
660
661 return result;
662 }
663
664
665 boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
666 {
667 boolean result = 0;
668 IfxAsclin_Lin_clearFlagsStatus(asclin); /* clear all aknowledgement and error flags status */
669
670 /* wait until transmit response end acknowledgemnet has been detected */
671 while (asclin->acknowledgmentFlags.txResponseEnd != 1)
672 {
673 IfxAsclin_Lin_checkForTransmittedResponseFlags(asclin);
674
675 if ((asclin->errorFlagsStatus.txFifoOverflow == 1)
676 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
677 || (asclin->errorFlagsStatus.responseTimeout == 1)
678 || (asclin->errorFlagsStatus.breakDetected == 1))
679 {
680 result = 1;
681 break;
682 }
683 }
684
685 return result;
686 }
687
688
689 void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
690 {
691 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
692
693 /* store and clear the flags*/
694 if (IfxAsclin_getLinParityErrorFlagStatus(asclinSFR))
695 {
696 IfxAsclin_clearLinParityErrorFlag(asclinSFR);
697 asclin->errorFlagsStatus.linParityError = 1;
698 }
699
700 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
701 {
702 IfxAsclin_clearFrameErrorFlag(asclinSFR);
703 asclin->errorFlagsStatus.frameError = 1;
704 }
705
706 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
707 {
708 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
709 asclin->errorFlagsStatus.rxFifoOverflow = 1;
710 }
711
712 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
713 {
714 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
715 asclin->errorFlagsStatus.txFifoOverflow = 1;
716 }
717
718 if (IfxAsclin_getHeaderTimeoutFlagStatus(asclinSFR))
719 {
720 IfxAsclin_clearHeaderTimeoutFlag(asclinSFR);
721 asclin->errorFlagsStatus.headerTimeout = 1;
722 }
723
724 if (IfxAsclin_getResponseTimeoutFlagStatus(asclinSFR))
725 {
726 IfxAsclin_clearResponseTimeoutFlag(asclinSFR);
727 asclin->errorFlagsStatus.responseTimeout = 1;
728 }
729
730 if (IfxAsclin_getBreakDetectedFlagStatus(asclinSFR))
731 {
732 IfxAsclin_clearBreakDetectedFlag(asclinSFR);
733 asclin->errorFlagsStatus.breakDetected = 1;
734 }
735
736 if (IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(asclinSFR))
737 {
738 IfxAsclin_clearLinAutoBaudDetectionErrorFlag(asclinSFR);
739 asclin->errorFlagsStatus.linAutobaudDetectionError = 1;
740 }
741
742 if (IfxAsclin_getLinChecksumErrorFlagStatus(asclinSFR))
743 {
744 IfxAsclin_clearLinChecksumErrorFlag(asclinSFR);
745 asclin->errorFlagsStatus.linChecksumError = 1;
746 }
747
748 if (IfxAsclin_getCollisionDetectionErrorFlagStatus(asclinSFR))
749 {
750 IfxAsclin_clearCollisionDetectionErrorFlag(asclinSFR);
751 asclin->errorFlagsStatus.collisionDetectionError = 1;
752 }
753
754 if (IfxAsclin_getTransmissionCompletedFlagStatus(asclinSFR))
755 {
756 IfxAsclin_clearTransmissionCompletedFlag(asclinSFR);
757 asclin->acknowledgmentFlags.txCompleted = 1;
758 }
759
760 /*Update acknowledgment flags*/
761 if ((asclin->linFrameData.flags.txHeaderInProgress == 1)
762 && ((asclin->errorFlagsStatus.headerTimeout == 1)
763 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
764 || (asclin->errorFlagsStatus.frameError == 1)
765 || (asclin->errorFlagsStatus.linParityError == 1)))
766 {
767 asclin->linFrameData.flags.txHeaderErrorOccurred = TRUE;
768 asclin->acknowledgmentFlags.txHeaderEnd = 1;
769 asclin->linFrameData.flags.txHeaderInProgress = FALSE;
770 }
771
772 if ((asclin->linFrameData.flags.txResponseInProgress == 1)
773 && ((asclin->errorFlagsStatus.txFifoOverflow == 1)
774 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
775 || (asclin->errorFlagsStatus.responseTimeout == 1)
776 || (asclin->errorFlagsStatus.breakDetected == 1)))
777 {
778 asclin->linFrameData.flags.txResponseErrorOccurred = TRUE;
779 asclin->acknowledgmentFlags.txResponseEnd = 1;
780 asclin->linFrameData.flags.txResponseInProgress = FALSE;
781 }
782
783 if ((asclin->linFrameData.flags.rxHeaderInProgress == 1)
784 && ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
785 || (asclin->errorFlagsStatus.headerTimeout == 1)
786 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
787 || (asclin->errorFlagsStatus.frameError == 1)
788 || (asclin->errorFlagsStatus.linAutobaudDetectionError == 1)
789 || (asclin->errorFlagsStatus.linParityError == 1)))
790 {
791 asclin->linFrameData.flags.rxHeaderErrorOccurred = TRUE;
792 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
793 asclin->linFrameData.flags.rxHeaderInProgress = FALSE;
794 }
795
796 if ((asclin->linFrameData.flags.rxResponseInProgress == 1)
797 && ((asclin->errorFlagsStatus.rxFifoOverflow == 1)
798 || (asclin->errorFlagsStatus.collisionDetectionError == 1)
799 || (asclin->errorFlagsStatus.frameError == 1)
800 || (asclin->errorFlagsStatus.linChecksumError == 1)
801 || (asclin->errorFlagsStatus.responseTimeout == 1)
802 || (asclin->errorFlagsStatus.breakDetected == 1)))
803 {
804 asclin->linFrameData.flags.rxResponseErrorOccurred = TRUE;
805 asclin->acknowledgmentFlags.rxResponseEnd = 1;
806 asclin->linFrameData.flags.rxResponseInProgress = FALSE;
807 }
808 }
809
810
811 void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
812 {
813 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
814
815 if (IfxAsclin_getRxHeaderEndFlagStatus(asclinSFR))
816 {
817 IfxAsclin_clearRxHeaderEndFlag(asclinSFR);
818 IfxAsclin_Lin_readHeader(asclin, &(asclin->linFrameData.headerID)); /*read the ID byte*/
819 asclin->acknowledgmentFlags.rxHeaderEnd = 1;
820 asclin->linFrameData.flags.rxHeaderInProgress = FALSE;
821 asclinSFR->TXFIFOCON.B.ENO = 0; /*TX FIFO Outlet is disabled*/
822 }
823
824 if (IfxAsclin_getRxResponseEndFlagStatus(asclinSFR))
825 {
826 IfxAsclin_clearRxResponseEndFlag(asclinSFR);
827 IfxAsclin_Lin_readResponse(asclin, &(asclin->linFrameData.rxResponseData[0]), (asclin->linFrameData.rxResponseLength)); /* read the data bytes */
828 asclin->acknowledgmentFlags.rxResponseEnd = 1;
829 asclin->linFrameData.flags.rxResponseInProgress = FALSE;
830 }
831 }
832
833
834 void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
835 {
836 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
837
838 /* clear H/w Flag and update S/w Flags */
839 if (IfxAsclin_getTxHeaderEndFlagStatus(asclinSFR))
840 {
841 IfxAsclin_clearTxHeaderEndFlag(asclinSFR);
842 asclin->acknowledgmentFlags.txHeaderEnd = 1;
843 asclin->linFrameData.flags.txHeaderInProgress = FALSE;
844 }
845
846 if (IfxAsclin_getTxResponseEndFlagStatus(asclinSFR))
847 {
848 IfxAsclin_clearTxResponseEndFlag(asclinSFR);
849 asclin->acknowledgmentFlags.txResponseEnd = 1;
850 asclin->linFrameData.flags.txResponseInProgress = FALSE;
851 }
852 }
853
854
855 void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
856 {
857 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
858 IfxAsclin_setChecksumMode(asclinSFR, pduptr->checksumMode); /* setting the checksum mode (classic/enhanced)*/
859 asclin->linFrameData.headerID = pduptr->pid;
860
861 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeader)
862 {
863 asclin->linFrameData.flags.txSendResponse = FALSE;
864 asclin->linFrameData.txResponseLength = 0;
865 asclin->linFrameData.flags.txSendHeaderOnly = TRUE;
866
867 /*Enable Interrupt flags for Header Transmission*/
868 Ifx_ASCLIN_FLAGSENABLE flagsenable;
869 flagsenable.U = asclinSFR->FLAGSENABLE.U;
870 flagsenable.B.THE = 1;
871 flagsenable.B.HTE = 1;
872 flagsenable.B.CEE = 1;
873 flagsenable.B.FEE = 1;
874 flagsenable.B.LPE = 1;
875 asclinSFR->FLAGSENABLE.U = flagsenable.U;
876
877 IfxAsclin_Lin_sendHeader(asclin, &(pduptr->pid));
878 }
879
880 else if ((pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse) || (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse))
881 {
882 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(pduptr->dataLength - 1)); /* set number of bytes to be transfered */
883
884 /*Configure RXFIFO*/
885 Ifx_ASCLIN_RXFIFOCON rxfifocon;
886 rxfifocon.U = asclinSFR->RXFIFOCON.U;
887
888 rxfifocon.B.BUF = 0; /*RX in FIFO Mode*/
889 rxfifocon.B.FLUSH = 1; /*Empty Rx Fifo*/
890 rxfifocon.B.ENI = 1; /*RX FIFO Inlet is enabled*/
891
892 asclinSFR->RXFIFOCON.U = rxfifocon.U;
893
894 /*Configure TXFIFO*/
895 Ifx_ASCLIN_TXFIFOCON txfifocon;
896 txfifocon.U = asclinSFR->TXFIFOCON.U;
897
898 txfifocon.B.FLUSH = 1; /*Empty Tx Fifo*/
899 txfifocon.B.ENO = 1; /*TX FIFO Outlet is enabled*/
900
901 asclinSFR->TXFIFOCON.U = txfifocon.U;
902
903 /*Clear interrupt event flags*/
904 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
905 IfxAsclin_Lin_clearFlagsStatus(asclin);
906
907 Ifx_ASCLIN_FLAGSENABLE flagsenable;
908 flagsenable.U = asclinSFR->FLAGSENABLE.U;
909
910 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse)
911 {
912 /*Enable Tx interrupts*/
913 flagsenable.B.THE = 1;
914 flagsenable.B.TRE = 1;
915 flagsenable.B.HTE = 1;
916
917 /*Enable Ex interrupts*/
918 flagsenable.B.TFOE = 1;
919 flagsenable.B.CEE = 1;
920 flagsenable.B.FEE = 1;
921 flagsenable.B.RTE = 1;
922 flagsenable.B.LPE = 1;
923 flagsenable.B.BDE = 1;
924
925 asclin->linFrameData.flags.txSendResponse = TRUE;
926 asclin->linFrameData.flags.txSendHeaderOnly = FALSE;
927 asclin->linFrameData.txResponseLength = pduptr->dataLength;
928
929 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
930 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
931 asclin->linFrameData.flags.txResponseInProgress = TRUE;
932 asclin->linFrameData.flags.txResponseErrorOccurred = FALSE;
933 }
934 else if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse)
935 {
936 /*Enable Rx interrupts*/
937 flagsenable.B.RRE = 1;
938 flagsenable.B.THE = 1;
939 flagsenable.B.RHE = 1;
940 flagsenable.B.HTE = 1;
941
942 /*Enable Ex interrupts*/
943 flagsenable.B.RFOE = 1;
944 flagsenable.B.CEE = 1;
945 flagsenable.B.FEE = 1;
946 flagsenable.B.RTE = 1;
947 flagsenable.B.LCE = 1;
948 flagsenable.B.BDE = 1;
949
950 asclinSFR->RXFIFOCON.B.ENI = 1; /*RX FIFO Inlet is enabled*/
951
952 asclin->linFrameData.flags.txSendResponse = TRUE;
953 asclin->linFrameData.flags.txSendHeaderOnly = FALSE;
954 asclin->linFrameData.rxResponseLength = pduptr->dataLength;
955 asclin->linFrameData.flags.txHeaderInProgress = TRUE;
956 asclin->linFrameData.flags.txHeaderErrorOccurred = FALSE;
957 asclin->linFrameData.flags.rxResponseInProgress = TRUE;
958 asclin->linFrameData.flags.rxResponseErrorOccurred = FALSE;
959 }
960
961 asclinSFR->FLAGSENABLE.U = flagsenable.U;
962
963 IfxAsclin_write8(asclinSFR, &(pduptr->pid), 1U); /* writing the ID byte */
964
965 if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndResponse)
966 {
967 IfxAsclin_write8(asclinSFR, pduptr->dataPtr, pduptr->dataLength); /* writing data bytes */
968
969 Ifx_ASCLIN_FLAGSSET flagsset;
970 flagsset.U = asclinSFR->FLAGSSET.U;
971
972 flagsset.B.THRQS = 1;
973 flagsset.B.TRRQS = 1;
974
975 asclinSFR->FLAGSSET.U = flagsset.U;
976 }
977
978 else if (pduptr->direction == IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse)
979 {
980 //asclinSFR->RXFIFOCON.B.ENI = 1; /*RX FIFO Inlet is enabled*/
981 asclinSFR->FLAGSSET.B.THRQS = 1;
982 }
983 }
984 }
IfxAsclin_Lin_sendResponse
void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response
Definition: IfxAsclin_Lin.c:570
IfxAsclin_Lin_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Lin.h:456
IfxAsclin_Lin_EnabledInterrupts::exResponseTimeout
uint16 exResponseTimeout
Response Timeout.
Definition: IfxAsclin_Lin.h:336
IfxAsclin_Lin_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Lin.h:478
IfxAsclin_setLinResponseTimeoutMode
IFX_INLINE void IfxAsclin_setLinResponseTimeoutMode(Ifx_ASCLIN *asclin, IfxAsclin_LinResponseTimeoutMode mode)
Sets the LIN response timeout mode.
Definition: IfxAsclin.h:2287
IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinAutoBaudDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN auto baudrate detection error flag status.
Definition: IfxAsclin.h:1954
IfxAsclin_Lin_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Lin.h:537
IfxAsclin_Lin_sendFrame
void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Respo...
Definition: IfxAsclin_Lin.c:855
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin_getResponseTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getResponseTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the response timeout flag status.
Definition: IfxAsclin.h:2002
IfxAsclin_Lin_AcknowledgementFlags::txCompleted
uint8 txCompleted
transmission completed
Definition: IfxAsclin_Lin.h:374
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxAsclin_Lin_ErrorFlags::linAutobaudDetectionError
uint8 linAutobaudDetectionError
lin autobaud detection error
Definition: IfxAsclin_Lin.h:434
IfxAsclin_getCollisionDetectionErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getCollisionDetectionErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the collision detection error flag status.
Definition: IfxAsclin.h:1924
IfxAsclin_Lin_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Lin.h:479
IfxAsclin_Lin_BaudrateDetection::upperLimit
uint8 upperLimit
BRD.UPPERLIMIT, auto baudrate detection upperlimit.
Definition: IfxAsclin_Lin.h:383
IfxAsclin_Lin_Config::fifo
IfxAsclin_Lin_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Lin.h:533
IfxAsclin_OversamplingFactor_16
oversampling factor 16
Definition: IfxAsclin.h:222
IfxAsclin_Lin_FrameControlFlags::txSendHeaderOnly
uint16 txSendHeaderOnly
Flag indicating that only Header is transmitted.
Definition: IfxAsclin_Lin.h:350
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2245
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:239
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:338
IfxAsclin_Lin_EnabledInterrupts::exLinChecksumError
uint16 exLinChecksumError
Lin Checksum Error.
Definition: IfxAsclin_Lin.h:339
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:149
IfxAsclin_Lin_EnabledInterrupts::rxReceivedHeader
uint16 rxReceivedHeader
Received Header.
Definition: IfxAsclin_Lin.h:329
IfxAsclin_Lin_BitTimingControl::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Lin.h:410
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse
Transmit Header and Receive Response.
Definition: IfxAsclin_Lin.h:314
IfxAsclin_Lin_BaudrateGeneration::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Lin.h:392
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2080
IfxAsclin_Lin_receiveHeader
void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
Receives the header.
Definition: IfxAsclin_Lin.c:497
IfxAsclin_Lin_readResponse
IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response.
Definition: IfxAsclin_Lin.h:831
IfxAsclin_Lin_ErrorFlags::collisionDetectionError
uint8 collisionDetectionError
collision detection error
Definition: IfxAsclin_Lin.h:436
IfxAsclin_Lin_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Lin.h:458
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:51
IfxAsclin_Lin_PduType::dataLength
uint8 dataLength
Length of LIN Response.
Definition: IfxAsclin_Lin.h:549
IfxAsclin_Lin_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Lin.h:503
IfxAsclin_Lin_receiveResponse
void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response.
Definition: IfxAsclin_Lin.c:514
IfxAsclin_setLinHeaderTimeout
IFX_INLINE void IfxAsclin_setLinHeaderTimeout(Ifx_ASCLIN *asclin, uint8 timeout)
Sets the LIN header timeout.
Definition: IfxAsclin.h:2275
IfxAsclin_getLinParityErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinParityErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN parity error flag status.
Definition: IfxAsclin.h:1966
IfxAsclin_Lin_PduType::checksumMode
IfxAsclin_Checksum checksumMode
LIN Checksum Mode.
Definition: IfxAsclin_Lin.h:552
IfxAsclin_Lin_checkForTransmittedHeaderFlags
void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header
Definition: IfxAsclin_Lin.c:129
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1900
IfxAsclin_Lin_ErrorFlags::breakDetected
uint8 breakDetected
break detected
Definition: IfxAsclin_Lin.h:432
IfxAsclin_Lin::isInterruptMode
boolean isInterruptMode
Value to indicate if APIs work in Polling mode or Interrupt mode.
Definition: IfxAsclin_Lin.h:518
IfxAsclin_clearTxResponseEndFlag
IFX_INLINE void IfxAsclin_clearTxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit response end flag.
Definition: IfxAsclin.h:1708
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxAsclin_Lin_Pins
Structure for LIN pin configuration.
Definition: IfxAsclin_Lin.h:497
IfxAsclin_Lin_ErrorFlags::headerTimeout
uint8 headerTimeout
header timeout
Definition: IfxAsclin_Lin.h:430
IfxAsclin_Lin_checkForReceivedResponseFlags
void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response
Definition: IfxAsclin_Lin.c:79
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2117
IfxAsclin_setBrdUpperlimt
IFX_INLINE void IfxAsclin_setBrdUpperlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s upper limit.
Definition: IfxAsclin.h:2173
IfxAsclin_Lin::receiveIdEnable
boolean receiveIdEnable
setting to receive Id in Rx Fifo after sending it
Definition: IfxAsclin_Lin.h:517
IfxAsclin_Lin_DataControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Lin.h:418
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1576
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxAsclin_Lin_ErrorFlags::responseTimeout
uint8 responseTimeout
response timeout
Definition: IfxAsclin_Lin.h:431
IfxAsclin_Lin_EnabledInterrupts::exTransmitFIFOOverflow
uint16 exTransmitFIFOOverflow
Transmit FIFO Overflow.
Definition: IfxAsclin_Lin.h:343
IfxAsclin_Lin_ignoreHeader
void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
Ignores the latest header.
Definition: IfxAsclin_Lin.c:238
IfxAsclin_Lin_Config::frame
IfxAsclin_Lin_FrameControl frame
structure for frame control
Definition: IfxAsclin_Lin.h:532
IfxAsclin_Lin_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Lin.h:447
IfxAsclin_Lin_EnabledInterrupts::txTransmittedResponse
uint16 txTransmittedResponse
Transmitted Response.
Definition: IfxAsclin_Lin.h:332
IfxAsclin_Lin_initModule
IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module.
Definition: IfxAsclin_Lin.c:247
IfxAsclin_Lin::acknowledgmentFlags
IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags
structure for acknowledgement flags
Definition: IfxAsclin_Lin.h:515
IfxAsclin_Lin_isrTransmit
void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
ISR transmit routine.
Definition: IfxAsclin_Lin.c:834
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxAsclin_ChecksumInjection_written
checksum byte is written
Definition: IfxAsclin.h:74
IfxAsclin_Lin_BitSamplingControl::filterDepth
uint8 filterDepth
IOCR.DEPTH, digital glitch filter depth.
Definition: IfxAsclin_Lin.h:401
IfxAsclin_Lin_PduType::direction
IfxAsclin_Lin_Direction direction
Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) ...
Definition: IfxAsclin_Lin.h:551
IfxAsclin_clearLinAutoBaudDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearLinAutoBaudDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the auto baudrate detection error flag.
Definition: IfxAsclin.h:1618
IfxAsclin_Lin_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
LIN Rx pin.
Definition: IfxAsclin_Lin.h:499
IfxAsclin_Lin_FrameControlFlags::rxResponseErrorOccurred
uint16 rxResponseErrorOccurred
Flag to indicate error occurred during reception of Response.
Definition: IfxAsclin_Lin.h:359
IfxAsclin_setLinBreakLength
IFX_INLINE void IfxAsclin_setLinBreakLength(Ifx_ASCLIN *asclin, uint8 length)
Sets the LIN break length.
Definition: IfxAsclin.h:2269
IfxAsclin_LinResponseTimeoutMode_frameTimeout
timeout threshold is for frame
Definition: IfxAsclin.h:201
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxAsclin_enableCollisionDetection
IFX_INLINE void IfxAsclin_enableCollisionDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the collision detection.
Definition: IfxAsclin.h:1732
IfxAsclin_Lin_InterruptConfig::exPriority
uint16 exPriority
error interrupt priority
Definition: IfxAsclin_Lin.h:480
IfxAsclin_Lin_FrameControlFlags::txResponseErrorOccurred
uint16 txResponseErrorOccurred
Flag to indicate error occurred during transmission of Response.
Definition: IfxAsclin_Lin.h:357
IfxAsclin_Lin_prepareHeaderReception
IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
Prepares the module to receive the header.
Definition: IfxAsclin_Lin.h:803
IfxAsclin_Lin_EnabledInterrupts::txTransmittedHeader
uint16 txTransmittedHeader
Transmitted Header.
Definition: IfxAsclin_Lin.h:331
IfxAsclin_setParityType
IFX_INLINE void IfxAsclin_setParityType(Ifx_ASCLIN *asclin, IfxAsclin_ParityType type)
Sets the parity type.
Definition: IfxAsclin.h:2311
IfxAsclin_Lin_FrameDataControl::rxResponseLength
uint8 rxResponseLength
Length of received response.
Definition: IfxAsclin_Lin.h:470
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:240
IfxAsclin_setTransmitHeaderRequestFlag
IFX_INLINE void IfxAsclin_setTransmitHeaderRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit header request flag.
Definition: IfxAsclin.h:2403
IfxAsclin_Lin_EnabledInterrupts::exLinAutobaudDetectionError
uint16 exLinAutobaudDetectionError
Lin Autobaud Detection Error.
Definition: IfxAsclin_Lin.h:338
IfxAsclin_Lin::linFrameData
IfxAsclin_Lin_FrameDataControl linFrameData
Structure for Lin Frame Data and Control.
Definition: IfxAsclin_Lin.h:513
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2341
IfxAsclin_Lin_waitForReceivedHeader
boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:590
IfxAsclin_IdleDelay_2
idle delay in 2 bit times
Definition: IfxAsclin.h:163
IfxAsclin_Lin_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Lin.h:429
IfxAsclin_Lin_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
LIN Tx pin.
Definition: IfxAsclin_Lin.h:501
IfxAsclin_getTxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit header end flag status.
Definition: IfxAsclin.h:2086
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:161
IfxAsclin_Lin_Config::bsc
IfxAsclin_Lin_BitSamplingControl bsc
structure for bit sampling
Definition: IfxAsclin_Lin.h:531
IfxAsclin_Lin_Config::brg
IfxAsclin_Lin_BaudrateGeneration brg
structure for baudrate generation
Definition: IfxAsclin_Lin.h:528
IfxAsclin_Lin_FrameControlFlags::rxHeaderInProgress
uint16 rxHeaderInProgress
Flag to indicate Header reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:354
IfxAsclin_Lin_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Lin.h:502
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxAsclin_enableHardwareChecksum
IFX_INLINE void IfxAsclin_enableHardwareChecksum(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the hardware checksum.
Definition: IfxAsclin.h:1762
IfxAsclin_getRxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive response end flag status.
Definition: IfxAsclin.h:2044
IfxAsclin_Lin_EnabledInterrupts::exTransmissionCompleted
uint16 exTransmissionCompleted
Transmission Completed.
Definition: IfxAsclin_Lin.h:334
IfxAsclin_Lin_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Lin.h:457
IfxAsclin_Lin_ErrorFlags::linParityError
uint8 linParityError
lin parity error
Definition: IfxAsclin_Lin.h:433
IfxAsclin_setChecksumInjection
IFX_INLINE void IfxAsclin_setChecksumInjection(Ifx_ASCLIN *asclin, IfxAsclin_ChecksumInjection csi)
Sets the checksum injection.
Definition: IfxAsclin.h:2179
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2329
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:366
IfxAsclin_Lin_AcknowledgementFlags::txResponseEnd
uint8 txResponseEnd
transmit response end
Definition: IfxAsclin_Lin.h:371
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:281
IfxAsclin_HeaderResponseSelect_headerAndResponse
header and response expected
Definition: IfxAsclin.h:150
IfxAsclin_Lin_EnabledInterrupts::exBreakDetected
uint16 exBreakDetected
Break Detected.
Definition: IfxAsclin_Lin.h:333
IfxAsclin_Lin_EnabledInterrupts::exHeaderTimeout
uint16 exHeaderTimeout
Header Timeout.
Definition: IfxAsclin_Lin.h:335
IfxAsclin_Lin_DataControl::responseTimeout
uint16 responseTimeout
DATCON.RESPONSE, timeout limit.
Definition: IfxAsclin_Lin.h:422
IfxAsclin_Lin_FrameControlFlags::txSendResponse
uint16 txSendResponse
Flag to indicate Response is transmitted.
Definition: IfxAsclin_Lin.h:351
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1660
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2347
IfxAsclin_Lin_PduType::pid
uint8 pid
PID of LIN Header.
Definition: IfxAsclin_Lin.h:548
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin_clearRxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearRxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the receive header end flag.
Definition: IfxAsclin.h:1672
IfxAsclin_Lin_initModuleConfig
void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Lin.c:420
IfxAsclin_Lin_FrameControlFlags::rxHeaderErrorOccurred
uint16 rxHeaderErrorOccurred
Flag to indicate error occurred during reception of Header.
Definition: IfxAsclin_Lin.h:358
IfxAsclin_Lin_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Lin.h:438
IfxAsclin_setChecksumMode
IFX_INLINE void IfxAsclin_setChecksumMode(Ifx_ASCLIN *asclin, IfxAsclin_Checksum mode)
Sets the checksum mode.
Definition: IfxAsclin.h:2185
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:114
IfxAsclin_Lin_Config::btc
IfxAsclin_Lin_BitTimingControl btc
structure for bit timings
Definition: IfxAsclin_Lin.h:530
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1600
IfxAsclin_Lin_FrameDataControl::txResponseLength
uint8 txResponseLength
Length of transmitted response.
Definition: IfxAsclin_Lin.h:469
IfxAsclin_Lin_ErrorFlags::linChecksumError
uint8 linChecksumError
lin checksum error
Definition: IfxAsclin_Lin.h:435
IfxAsclin_Lin_BaudrateDetection::lowerLimit
uint8 lowerLimit
BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
Definition: IfxAsclin_Lin.h:382
IfxAsclin_Lin_Config::pins
IFX_CONST IfxAsclin_Lin_Pins * pins
structure for LIN pins
Definition: IfxAsclin_Lin.h:536
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2263
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
IfxAsclin_Lin_FrameDataControl::flags
IfxAsclin_Lin_FrameControlFlags flags
LIN frame control flags.
Definition: IfxAsclin_Lin.h:471
IfxAsclin_setLinResponseTimeoutThreshold
IFX_INLINE void IfxAsclin_setLinResponseTimeoutThreshold(Ifx_ASCLIN *asclin, uint16 threshold)
Sets the LIN response timeout threshold.
Definition: IfxAsclin.h:2293
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2317
IfxAsclin_getLinChecksumErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getLinChecksumErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the LIN checksum error flag status.
Definition: IfxAsclin.h:1960
IfxAsclin_Lin_isrError
void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
ISR error routine.
Definition: IfxAsclin_Lin.c:689
IfxAsclin_Lin_checkForTransmittedResponseFlags
void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response
Definition: IfxAsclin_Lin.c:167
IfxAsclin_setHeaderResponseSelect
IFX_INLINE void IfxAsclin_setHeaderResponseSelect(Ifx_ASCLIN *asclin, IfxAsclin_HeaderResponseSelect type)
Sets the header response selection.
Definition: IfxAsclin.h:2239
IfxAsclin_Lin_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Lin.h:526
IfxAsclin_getTxResponseEndFlagStatus
IFX_INLINE boolean IfxAsclin_getTxResponseEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmit response end flag status.
Definition: IfxAsclin.h:2092
IfxAsclin_HeaderResponseSelect_headerOnly
header only expected
Definition: IfxAsclin.h:151
IfxAsclin_clearHeaderTimeoutFlag
IFX_INLINE void IfxAsclin_clearHeaderTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the header timeout flag.
Definition: IfxAsclin.h:1606
IfxAsclin_ParityType_even
even parity
Definition: IfxAsclin.h:230
IfxAsclin_enableAutoBaudrateDetection
IFX_INLINE void IfxAsclin_enableAutoBaudrateDetection(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the auto baudrate detection.
Definition: IfxAsclin.h:1720
IfxAsclin_Lin_Config::brd
IfxAsclin_Lin_BaudrateDetection brd
structure for baudrate detection
Definition: IfxAsclin_Lin.h:529
IfxAsclin_Lin_prepareResponseReception
IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response.
Definition: IfxAsclin_Lin.h:813
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxAsclin_setLinMode
IFX_INLINE void IfxAsclin_setLinMode(Ifx_ASCLIN *asclin, IfxAsclin_LinMode mode)
Sets the LIN mode of operation.
Definition: IfxAsclin.h:2281
IfxAsclin_Lin_Config::interrupt
IfxAsclin_Lin_InterruptConfig interrupt
structure for lin interrupt configuration
Definition: IfxAsclin_Lin.h:539
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:155
IfxAsclin_Lin_FrameDataControl::rxResponseData
uint8 rxResponseData[8]
Array to store received response data.
Definition: IfxAsclin_Lin.h:467
IfxAsclin_Lin_BitSamplingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Lin.h:403
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1894
IfxAsclin_Lin_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Lin.h:500
IfxAsclin_Lin_Config
Configuration structure of the module.
Definition: IfxAsclin_Lin.h:523
IfxAsclin_Lin_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Lin.h:481
IfxAsclin_FrameMode_lin
lin mode
Definition: IfxAsclin.h:142
IfxAsclin_Lin::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Lin.h:512
IfxAsclin_Lin_InterruptConfig::enabledInterrupt
IfxAsclin_Lin_EnabledInterrupts enabledInterrupt
Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
Definition: IfxAsclin_Lin.h:482
IfxAsclin_clearCollisionDetectionErrorFlag
IFX_INLINE void IfxAsclin_clearCollisionDetectionErrorFlag(Ifx_ASCLIN *asclin)
Clears the collision detection error flag.
Definition: IfxAsclin.h:1588
IfxAsclin_Lin_Direction_TransmitHeader
Transmit Header.
Definition: IfxAsclin_Lin.h:312
IfxAsclin_Lin_waitForReceivedResponse
boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:615
IfxAsclin_Lin_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Lin.h:437
IfxAsclin_SamplePointPosition_3
sample point position at 3
Definition: IfxAsclin.h:308
IfxAsclin_Lin_BitTimingControl::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Lin.h:411
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1798
IfxAsclin_Lin_BaudrateDetection::abd
boolean abd
LINCON.ABD, autobaud detection enable.
Definition: IfxAsclin_Lin.h:381
IfxAsclin_clearLinParityErrorFlag
IFX_INLINE void IfxAsclin_clearLinParityErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN parity error flag.
Definition: IfxAsclin.h:1630
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1714
IfxAsclin_Lin_disableModule
void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
Disables the module.
Definition: IfxAsclin_Lin.c:228
IfxAsclin_Lin_sendHeader
void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
Sends the header.
Definition: IfxAsclin_Lin.c:531
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2142
IfxAsclin_clearRxResponseEndFlag
IFX_INLINE void IfxAsclin_clearRxResponseEndFlag(Ifx_ASCLIN *asclin)
Clears the receive response end flag.
Definition: IfxAsclin.h:1678
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2421
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:385
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxAsclin_Lin_AcknowledgementFlags::rxHeaderEnd
uint8 rxHeaderEnd
receive header end
Definition: IfxAsclin_Lin.h:372
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1870
IfxAsclin_Lin_EnabledInterrupts::rxReceivedResponse
uint16 rxReceivedResponse
Received Response.
Definition: IfxAsclin_Lin.h:330
IfxAsclin_Lin_FrameControlFlags::rxResponseInProgress
uint16 rxResponseInProgress
Flag to indicate Response reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:355
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2233
IfxAsclin_Lin_FrameControl::parityEnable
boolean parityEnable
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Lin.h:459
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2026
IfxAsclin_clearTxHeaderEndFlag
IFX_INLINE void IfxAsclin_clearTxHeaderEndFlag(Ifx_ASCLIN *asclin)
Clears the transmit header end flag.
Definition: IfxAsclin.h:1702
IfxAsclin_Lin_Config::data
IfxAsclin_Lin_DataControl data
structure for data control
Definition: IfxAsclin_Lin.h:534
IfxAsclin_Lin_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Lin.h:455
IfxAsclin_Lin::errorFlagsStatus
IfxAsclin_Lin_ErrorFlags errorFlagsStatus
structure for error flags status
Definition: IfxAsclin_Lin.h:516
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:375
IfxAsclin_Lin_FrameDataControl::headerID
uint8 headerID
header ID
Definition: IfxAsclin_Lin.h:468
IfxAsclin_Lin_FrameControlFlags::txHeaderErrorOccurred
uint16 txHeaderErrorOccurred
Flag to indicate error occurred during transmission of Header.
Definition: IfxAsclin_Lin.h:356
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:93
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:291
IfxAsclin_LinMode_slave
operates in slave mode
Definition: IfxAsclin.h:192
IfxAsclin_Lin_Config::lin
IfxAsclin_Lin_LinControl lin
structure for lin control
Definition: IfxAsclin_Lin.h:535
IfxAsclin_LinMode_master
operates in master mode
Definition: IfxAsclin.h:193
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:178
IfxAsclin_Lin_EnabledInterrupts::exCollisionDetectionError
uint16 exCollisionDetectionError
Collision Detection Error.
Definition: IfxAsclin_Lin.h:341
IfxAsclin_getBreakDetectedFlagStatus
IFX_INLINE boolean IfxAsclin_getBreakDetectedFlagStatus(Ifx_ASCLIN *asclin)
Returns the break detected flag status.
Definition: IfxAsclin.h:1906
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxAsclin_Lin_LinControl::csEnable
boolean csEnable
LINCON.CSEN, hardware checksum generation and checking.
Definition: IfxAsclin_Lin.h:489
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1828
IfxAsclin_setTransmitResponseRequestFlag
IFX_INLINE void IfxAsclin_setTransmitResponseRequestFlag(Ifx_ASCLIN *asclin)
Sets the transmit response request flag.
Definition: IfxAsclin.h:2409
IfxAsclin_Lin_DataControl::headerOnly
IfxAsclin_HeaderResponseSelect headerOnly
DATCON.HO, Lin frame with header and response or header only.
Definition: IfxAsclin_Lin.h:419
IfxAsclin_Lin_isrReceive
void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
ISR receive routine.
Definition: IfxAsclin_Lin.c:811
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:92
IfxAsclin_Lin.h
ASCLIN LIN details.
IfxAsclin_Lin_waitForTransmittedResponse
boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:665
IfxAsclin_getHeaderTimeoutFlagStatus
IFX_INLINE boolean IfxAsclin_getHeaderTimeoutFlagStatus(Ifx_ASCLIN *asclin)
Returns the header timeout flag status.
Definition: IfxAsclin.h:1942
IfxAsclin_Lin_checkForReceivedHeaderFlags
void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header
Definition: IfxAsclin_Lin.c:35
IfxAsclin_Lin_DataControl::checksum
IfxAsclin_Checksum checksum
DATCON.CSM, checksum mode (classic or enhanced)
Definition: IfxAsclin_Lin.h:421
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse
Transmit both Header and Response.
Definition: IfxAsclin_Lin.h:313
IfxAsclin_getTransmissionCompletedFlagStatus
IFX_INLINE boolean IfxAsclin_getTransmissionCompletedFlagStatus(Ifx_ASCLIN *asclin)
Returns the transmission pending flag status.
Definition: IfxAsclin.h:2050
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxAsclin_Lin
Definition: IfxAsclin_Lin.h:510
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:399
IfxAsclin_clearLinChecksumErrorFlag
IFX_INLINE void IfxAsclin_clearLinChecksumErrorFlag(Ifx_ASCLIN *asclin)
Clears the LIN checksum error flag.
Definition: IfxAsclin.h:1624
IfxAsclin_Lin_clearFlagsStatus
void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
clears the flags status structures
Definition: IfxAsclin_Lin.c:205
IfxAsclin_Lin_AcknowledgementFlags::txHeaderEnd
uint8 txHeaderEnd
transmit header end
Definition: IfxAsclin_Lin.h:370
IfxAsclin_Lin_readHeader
IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
Reads the header.
Definition: IfxAsclin_Lin.h:824
IfxAsclin_getRxHeaderEndFlagStatus
IFX_INLINE boolean IfxAsclin_getRxHeaderEndFlagStatus(Ifx_ASCLIN *asclin)
Returns the receive header end flag status.
Definition: IfxAsclin.h:2038
IfxAsclin_Lin_Config::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Lin.h:538
IfxAsclin_Lin::linMode
IfxAsclin_LinMode linMode
LINCON.MS, lin mode of operation (master or slave)
Definition: IfxAsclin_Lin.h:514
IfxAsclin_clearTransmissionCompletedFlag
IFX_INLINE void IfxAsclin_clearTransmissionCompletedFlag(Ifx_ASCLIN *asclin)
Clears the transmission pending flag.
Definition: IfxAsclin.h:1684
IfxAsclin_Lin_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Lin.h:454
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:139
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:123
IfxAsclin_Lin_LinControl::csi
IfxAsclin_ChecksumInjection csi
LINCON.CSI, checksum injection (not written or written) into RxFIFO.
Definition: IfxAsclin_Lin.h:490
IfxAsclin_setBrdLowerlimt
IFX_INLINE void IfxAsclin_setBrdLowerlimt(Ifx_ASCLIN *asclin, uint8 limit)
Sets the baudrate detection&#39;s lower limit.
Definition: IfxAsclin.h:2167
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:328
IfxAsclin_Lin_FrameControl::collisionDetectionEnable
boolean collisionDetectionEnable
FRAMECON.CEN, collision detection enable.
Definition: IfxAsclin_Lin.h:460
IfxAsclin_Lin_waitForTransmittedHeader
boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:641
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2386
IfxAsclin_Lin_EnabledInterrupts::exReceiveFIFOOverflow
uint16 exReceiveFIFOOverflow
Receive FIFO Overflow.
Definition: IfxAsclin_Lin.h:342
IfxAsclin_Lin_AcknowledgementFlags::rxResponseEnd
uint8 rxResponseEnd
receive response end
Definition: IfxAsclin_Lin.h:373
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxAsclin_Lin_EnabledInterrupts::exLinParityError
uint16 exLinParityError
Lin Parity Error.
Definition: IfxAsclin_Lin.h:337
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2365
IfxAsclin_Lin_DataControl::responseTimeoutMode
IfxAsclin_LinResponseTimeoutMode responseTimeoutMode
DATCON.RM, response mode (response or frame timeout threshold)
Definition: IfxAsclin_Lin.h:420
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1936
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2215
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxAsclin_clearBreakDetectedFlag
IFX_INLINE void IfxAsclin_clearBreakDetectedFlag(Ifx_ASCLIN *asclin)
Clears the break detected flag.
Definition: IfxAsclin.h:1582
IfxAsclin_Checksum_enhanced
enhanced checksum
Definition: IfxAsclin.h:65
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1696
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:363
IfxAsclin_Lin_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Lin.h:402
IfxAsclin_Lin_FrameControlFlags::txResponseInProgress
uint16 txResponseInProgress
Flag to indicate Response transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:353
IfxAsclin_Lin_LinControl::breakLength
uint8 breakLength
LINBTIMER.BREAK, break pulse generation and detection length.
Definition: IfxAsclin_Lin.h:491
IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data.
Definition: IfxAsclin_Lin.h:546
IfxAsclin_Lin_FrameControlFlags::txHeaderInProgress
uint16 txHeaderInProgress
Flag to indicate Header transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:352
IfxAsclin_clearResponseTimeoutFlag
IFX_INLINE void IfxAsclin_clearResponseTimeoutFlag(Ifx_ASCLIN *asclin)
Clears the response timeout flag.
Definition: IfxAsclin.h:1648
IfxAsclin_Lin_PduType::dataPtr
uint8 * dataPtr
Pointer for LIN Response data.
Definition: IfxAsclin_Lin.h:550
IfxAsclin_Lin_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Lin.h:445
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2203
IfxAsclin_Lin_EnabledInterrupts::exFramingError
uint16 exFramingError
Framing Error.
Definition: IfxAsclin_Lin.h:340
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:339
IfxAsclin_Lin_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Lin.h:446


iLLD_TC26B: IfxAsclin_Lin.h Source File

  • Asclin
  • Lin
IfxAsclin_Lin.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Lin.h
3 * \brief ASCLIN LIN details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Asclin_Lin_Usage How to use the ASCLIN LIN Interface driver?
25 * \ingroup IfxLld_Asclin
26 *
27 * The LIN interface driver provides a default ASCLIN configuration for asynchronous serial communication in 8bit mode, and a set of data transfer routines.
28 * It supports all four elementary LIN transactions in polling mode.
29 * TxH - Transmission of Header
30 * TxR - Transmission of Response
31 * RxH - Reception of Header
32 * RxR - Reception of Response
33 *
34 * The driver also provides a LIN Master to be configured in Interrupt mode. In interrupt mode, following Lin frame transactions are provided.
35 * 1.Transmit Header only.
36 * 2.Transmit both Header and Response.
37 * 3.Transmit Header and Receive Response.
38 *
39 * In the following sections it will be described, how to integrate the driver into the application framework.
40 *
41 * \section IfxLld_Asclin_Lin_Preparation Preparation
42 * \subsection IfxLld_Asclin_Lin_Include Include Files
43 *
44 * Include following header file into your C code:
45 * \code
46 * #include <Asclin/Lin/IfxAsclin_Lin.h>
47 * \endcode
48 *
49 * \subsection IfxLld_Asclin_Lin_Variables Variables
50 *
51 * Declare the LIN handle as global variable in your C code:
52 *
53 * \code
54 * // used globally
55 * static IfxAsclin_Lin linMaster;
56 * static IfxAsclin_Lin linSlave;
57 * \endcode
58 *
59 * \subsection IfxLld_Asclin_Lin_Interrupt Interrupt Handler Installation
60 *
61 * Define priorities for the Interrrupt handlers.
62 * \code
63 *
64 * #define IFX_INTPRIO_ASCLIN1_RX 4 // Define the LIN1 receive interrupt priority.
65 * #define IFX_INTPRIO_ASCLIN1_TX 8 // Define the LIN1 transmit interrupt priority.
66 * #define IFX_INTPRIO_ASCLIN1_EX 12 // Define the LIN1 error interrupt priority.
67 *
68 * \endcode
69 *
70 * Add the interrupt service routines to your C code. They have to call the LIN interrupt handlers by passing the lin handle:
71 * \code
72 * IFX_INTERRUPT(ISR_Lin1_rx, 0, IFX_INTPRIO_ASCLIN1_RX);
73 * IFX_INTERRUPT(ISR_Lin1_tx, 0, IFX_INTPRIO_ASCLIN1_TX);
74 * IFX_INTERRUPT(ISR_Lin1_ex, 0, IFX_INTPRIO_ASCLIN1_EX);
75 *
76 * void ISR_Lin1_rx(void)
77 * {
78 * IfxAsclin_Lin_isrReceive(&linMaster);
79 * }
80 * void ISR_Lin1_tx(void)
81 * {
82 * IfxAsclin_Lin_isrTransmit(&linMaster);
83 * }
84 * void ISR_Lin1_ex(void)
85 * {
86 * IfxAsclin_Lin_isrError(&linMaster);
87 * }
88 * \endcode
89 *
90 * \subsection IfxLld_Asclin_Lin_Init Module Initialisation
91 *
92 * The module can be initialised as either Master or Slave. Here an example:
93 *
94 * \subsection IfxLld_Asclin_Lin_Init_Master Module Initialisation as Master
95 *
96 * \code
97 * // create module config
98 * IfxAsclin_Lin_Config linMasterConfig;
99 * IfxAsclin_Lin_initModuleConfig(&linMasterConfig, &MODULE_ASCLIN1);
100 *
101 * // set the lin mode of operation
102 * linMasterConfig.linMode = IfxAsclin_LinMode_master;
103 *
104 * // set the desired baudrate
105 * linMasterConfig.btc.prescaler = 4;
106 * linMasterConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
107 *
108 * // pin configuration
109 * const IfxAsclin_Lin_Pins pins = {
110 * &IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
111 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
112 * IfxPort_PadDriver_cmosAutomotiveSpeed1
113 * };
114 * linMasterConfig.pins = &pins;
115 *
116 * //Lin Master Interrupt Config. Only needed for interrupt mode.
117 * linConfig.isInterruptMode = TRUE;
118 * linConfig.interrupt.rxPriority = ISR_PRIORITY(INTERRUPT_LIN1_RX);
119 * linConfig.interrupt.txPriority = ISR_PRIORITY(INTERRUPT_LIN1_TX);
120 * linConfig.interrupt.exPriority = ISR_PRIORITY(INTERRUPT_LIN1_EX);
121 *
122 * //Optionally, if any interrupt has to be enabled during initialisation it can be done as follows.
123 * //Otherwise the driver will enable required interrupts during run time.
124 *
125 * linConfig.interrupt.enabledInterrupt.exCollisionDetectionError = TRUE; //This is optional example.
126 *
127 * linConfig.lin.csi = FALSE;//checksum injection not written into RxFIFO
128 *
129 * // initialize module
130 * IfxAsclin_Lin_initModule(&linMaster, &linMasterConfig);
131 * \endcode
132 *
133 * \subsection IfxLld_Asclin_Lin_Init_Slave Module Initialisation as Slave
134 *
135 * \code
136 * // create module config
137 * IfxAsclin_Lin_Config linSlaveConfig;
138 * IfxAsclin_Lin_initModuleConfig(&linSlaveConfig, &MODULE_ASCLIN1);
139 *
140 * // set the lin mode of operation
141 * linSlaveConfig.linMode = IfxAsclin_LinMode_slave;
142 *
143 * // set the desired baudrate
144 * linSlaveConfig.btc.prescaler = 4;
145 * linSlaveConfig.brg.baudrate = 19200; // FDR values will be calculated in initModule
146 *
147 * // choose the auto baudrate detection configuration
148 * linSlaveConfig.brd.abd = FALSE;
149 * linSlaveConfig.brd.lowerLimit = 0x4;
150 * linSlaveConfig.brd.upperLimit = 0xF0;
151 *
152 * // pin configuration
153 * const IfxAsclin_Lin_Pins pins = {
154 * &IfxAsclin1_RXB_P15_5_IN, IfxPort_InputMode_pullUp, // Rx pin
155 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
156 * IfxPort_PadDriver_cmosAutomotiveSpeed1
157 * };
158 * linSlaveConfig.pins = &pins;
159 *
160 *
161 *
162 * // initialize module
163 * //IfxAsclin_Lin linSlave; // defined globally
164 * IfxAsclin_Lin_initModule(&linSlave, &linSlaveConfig);
165 * \endcode
166 *
167 * The LIN is ready for use now!
168 *
169 * \section IfxLld_Asclin_Lin_DataTransfers Data Transfers
170 *
171 * \subsection IfxLld_Asclin_Lin_DataMaster Master Transfers
172 *
173 * The LIN driver provides all three master elementary transfers.
174 *
175 * This means: you can send a header and based on the id byte, after transmission of header
176 * you can send or receive response and also can ignore the header based on the id:
177 * \code
178 * // set the id bytes
179 * uint8 txId = 0x80; // for sending respose after header
180 * uint8 rxId = 0xC1; // for receiving respose after header
181 *
182 * // prepare transmit bytes incase of sending response
183 * uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
184 *
185 * // prepare receive buffer incase of receiving response
186 * uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
187 *
188 * uint32 size = 8;
189 *
190 * //Polling mode APIs
191 * //send response case
192 * IfxAsclin_Lin_sendHeader(&linMaster, &txId);
193 *
194 * if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
195 * {
196 * IfxAsclin_Lin_sendResponse(&linMaster, txData, size);
197 * }
198 *
199 * //receive response case
200 * IfxAsclin_Lin_sendHeader(&linMaster, &rxId);
201 *
202 * if (lin.acknowledgmentFlags.txHeaderEnd == 1) // if the header is been transmitted succesfully
203 * {
204 * IfxAsclin_Lin_receiveResponse(&linMaster, rxData, size);
205 * }
206 *
207 * //Interrupt mode APIs
208 * IfxAsclin_Lin_PduType pdu;
209 * pdu.pid = 0x42;
210 * pdu.checksumMode = IfxAsclin_Checksum_enhanced;
211 * pdu.dataLength = 8;
212 * pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndResponse; //Transmits both Header and Response
213 * pdu.dataPtr = &txData[0];
214 * IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
215 * //Here Poll for linMaster.acknowledgmentFlags.txResponseEnd to detect end of transmission of frame.
216 *
217 * pdu.pid = 0xC4;
218 * pdu.direction = IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse; //Transmits Header and expects slave to respond
219 * IfxAsclin_Lin_sendFrame(&linMaster,&pdu);
220 * //Here Poll for linMaster.acknowledgmentFlags.rxResponseEnd
221 * //linMaster.linFrameData.rxResponseData[8] will have received response data if slave replies.
222 *
223 * \endcode
224 *
225 *
226 * \subsection IfxLld_Asclin_Lin_DataSlave Slave Transfers
227 *
228 * Same as master the LIN driver provides all three slave elemnatry tranfers.
229 *
230 * This means: you can receive a header and based on the id byte received,
231 * you can send or receive response and can also ignore the header based on the id:
232 * \code
233 * uint8 id; // for storing received id byte
234 *
235 * // prepare transmit bytes incase of sending response
236 * uint8 txData[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
237 *
238 * // prepare receive buffer incase of receiving response
239 * uint8 rxData[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
240 *
241 * uint32 size = 8;
242 *
243 * // receive header
244 * IfxAsclin_Lin_receiveHeader(&linSlave, &id);
245 *
246 * // if data is requsted by master
247 * if(id == txId)
248 * {
249 * IfxAsclin_Lin_sendResponse(&linSlave, txData, size); // send response
250 * }
251 *
252 * // if header is follwed by response
253 * else if(id == rxId)
254 * {
255 * IfxAsclin_Lin_receiveResponse(&linSlave, rxData, size); // receive response
256 * }
257 *
258 * // if header is not for this slave
259 * else
260 * {
261 * IfxAsclin_Lin_ignoreHeader(&linSlave);
262 * }
263 * \endcode
264 *
265 * \defgroup IfxLld_Asclin_Lin LIN
266 * \ingroup IfxLld_Asclin
267 * \defgroup IfxLld_Asclin_Lin_DataStructures Data Structures
268 * \ingroup IfxLld_Asclin_Lin
269 * \defgroup IfxLld_Asclin_Lin_ElementaryTransactions Elementary Transactions
270 * \ingroup IfxLld_Asclin_Lin
271 * \defgroup IfxLld_Asclin_Lin_ModuleFunctions Module Functions
272 * \ingroup IfxLld_Asclin_Lin
273 * \defgroup IfxLld_Asclin_Lin_errorHandlingFunctions Error Handling Functions
274 * \ingroup IfxLld_Asclin_Lin
275 * \defgroup IfxLld_Asclin_Lin_InterruptFunctions Interrupt Functions
276 * \ingroup IfxLld_Asclin_Lin
277 * \defgroup IfxLld_Asclin_Lin_Enumerations Enumerations
278 * \ingroup IfxLld_Asclin_Lin
279 */
280
281 #ifndef IFXASCLIN_LIN_H
282 #define IFXASCLIN_LIN_H 1
283
284 /******************************************************************************/
285 /*----------------------------------Includes----------------------------------*/
286 /******************************************************************************/
287
288 #include "Asclin/Std/IfxAsclin.h"
289 #include "_Utilities/Ifx_Assert.h"
290
291 /******************************************************************************/
292 /*-----------------------------------Macros-----------------------------------*/
293 /******************************************************************************/
294
295 #define IFXASCLIN_LIN_SEND_RESPONSE (0x80)
296
297 #define IFXASCLIN_LIN_RECEIVE_RESPONSE (0xC1)
298
299 /******************************************************************************/
300 /*--------------------------------Enumerations--------------------------------*/
301 /******************************************************************************/
302
303 /** \addtogroup IfxLld_Asclin_Lin_Enumerations
304 * \{ */
305 /** \brief Defines the type of Lin Master Frame.
306 * (Transmit Header only) or
307 * (Transmit Header and Response) or
308 * (Transmit Header and Receive Response).
309 */
310 typedef enum
311 {
312 IfxAsclin_Lin_Direction_TransmitHeader = 0, /**< \brief Transmit Header */
313 IfxAsclin_Lin_Direction_TransmitHeaderAndResponse = 1, /**< \brief Transmit both Header and Response */
314 IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse = 2 /**< \brief Transmit Header and Receive Response */
315 } IfxAsclin_Lin_Direction;
316
317 /** \} */
318
319 /******************************************************************************/
320 /*-----------------------------Data Structures--------------------------------*/
321 /******************************************************************************/
322
323 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
324 * \{ */
325 /** \brief Structure to store interrupts which are enabled during initialisation.
326 */
327 typedef struct
328 {
329 uint16 rxReceivedHeader : 1; /**< \brief Received Header */
330 uint16 rxReceivedResponse : 1; /**< \brief Received Response */
331 uint16 txTransmittedHeader : 1; /**< \brief Transmitted Header */
332 uint16 txTransmittedResponse : 1; /**< \brief Transmitted Response */
333 uint16 exBreakDetected : 1; /**< \brief Break Detected */
334 uint16 exTransmissionCompleted : 1; /**< \brief Transmission Completed */
335 uint16 exHeaderTimeout : 1; /**< \brief Header Timeout */
336 uint16 exResponseTimeout : 1; /**< \brief Response Timeout */
337 uint16 exLinParityError : 1; /**< \brief Lin Parity Error */
338 uint16 exLinAutobaudDetectionError : 1; /**< \brief Lin Autobaud Detection Error */
339 uint16 exLinChecksumError : 1; /**< \brief Lin Checksum Error */
340 uint16 exFramingError : 1; /**< \brief Framing Error */
341 uint16 exCollisionDetectionError : 1; /**< \brief Collision Detection Error */
342 uint16 exReceiveFIFOOverflow : 1; /**< \brief Receive FIFO Overflow */
343 uint16 exTransmitFIFOOverflow : 1; /**< \brief Transmit FIFO Overflow */
344 } IfxAsclin_Lin_EnabledInterrupts;
345
346 /** \brief Structure for Lin Frame Control flags
347 */
348 typedef struct
349 {
350 uint16 txSendHeaderOnly : 1; /**< \brief Flag indicating that only Header is transmitted */
351 uint16 txSendResponse : 1; /**< \brief Flag to indicate Response is transmitted */
352 uint16 txHeaderInProgress : 1; /**< \brief Flag to indicate Header transmission is initiated and is in progress */
353 uint16 txResponseInProgress : 1; /**< \brief Flag to indicate Response transmission is initiated and is in progress */
354 uint16 rxHeaderInProgress : 1; /**< \brief Flag to indicate Header reception is initiated and is in progress */
355 uint16 rxResponseInProgress : 1; /**< \brief Flag to indicate Response reception is initiated and is in progress */
356 uint16 txHeaderErrorOccurred : 1; /**< \brief Flag to indicate error occurred during transmission of Header */
357 uint16 txResponseErrorOccurred : 1; /**< \brief Flag to indicate error occurred during transmission of Response */
358 uint16 rxHeaderErrorOccurred : 1; /**< \brief Flag to indicate error occurred during reception of Header */
359 uint16 rxResponseErrorOccurred : 1; /**< \brief Flag to indicate error occurred during reception of Response */
360 } IfxAsclin_Lin_FrameControlFlags;
361
362 /** \} */
363
364 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
365 * \{ */
366 /** \brief Structure for Acknowledgement Flags
367 */
368 typedef struct
369 {
370 uint8 txHeaderEnd : 1; /**< \brief transmit header end */
371 uint8 txResponseEnd : 1; /**< \brief transmit response end */
372 uint8 rxHeaderEnd : 1; /**< \brief receive header end */
373 uint8 rxResponseEnd : 1; /**< \brief receive response end */
374 uint8 txCompleted : 1; /**< \brief transmission completed */
375 } IfxAsclin_Lin_AcknowledgementFlags;
376
377 /** \brief Structure for Baudrate Detection
378 */
379 typedef struct
380 {
381 boolean abd; /**< \brief LINCON.ABD, autobaud detection enable */
382 uint8 lowerLimit; /**< \brief BRD.LOWERLIMIT, auto baudrate detection lowerlimit */
383 uint8 upperLimit; /**< \brief BRD.UPPERLIMIT, auto baudrate detection upperlimit */
384 uint8 measured; /**< \brief BRD.MEASURED, measured time interval between the
385 * first and the fifth falling edge of the sync byte */
386 } IfxAsclin_Lin_BaudrateDetection;
387
388 /** \brief Structure for Baudrate Generation
389 */
390 typedef struct
391 {
392 float32 baudrate; /**< \brief value of the required baudrate */
393 uint16 numerator; /**< \brief BRG.NUMERATOR, defines the numerator of fractional divider */
394 uint16 denominator; /**< \brief BRG.DENOMINATOR, defines the denominator of fractional divider */
395 } IfxAsclin_Lin_BaudrateGeneration;
396
397 /** \brief Structure for Bit Sampling
398 */
399 typedef struct
400 {
401 uint8 filterDepth; /**< \brief IOCR.DEPTH, digital glitch filter depth */
402 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, no. of samples per bit 1 or 3 */
403 IfxAsclin_SamplePointPosition samplePointPosition; /**< \brief BITCON.SAMPLEPOINT, sample point position */
404 } IfxAsclin_Lin_BitSamplingControl;
405
406 /** \brief Structure for Bit Timing
407 */
408 typedef struct
409 {
410 uint16 prescaler; /**< \brief BITCON.PRESCALER, predivider to generate the baud rate */
411 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, postdivider, used for oversampling */
412 } IfxAsclin_Lin_BitTimingControl;
413
414 /** \brief Structure for Data Control
415 */
416 typedef struct
417 {
418 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
419 IfxAsclin_HeaderResponseSelect headerOnly; /**< \brief DATCON.HO, Lin frame with header and response or header only */
420 IfxAsclin_LinResponseTimeoutMode responseTimeoutMode; /**< \brief DATCON.RM, response mode (response or frame timeout threshold) */
421 IfxAsclin_Checksum checksum; /**< \brief DATCON.CSM, checksum mode (classic or enhanced) */
422 uint16 responseTimeout; /**< \brief DATCON.RESPONSE, timeout limit */
423 } IfxAsclin_Lin_DataControl;
424
425 /** \brief Structure for Error Flags
426 */
427 typedef struct
428 {
429 uint8 frameError : 1; /**< \brief frame error */
430 uint8 headerTimeout : 1; /**< \brief header timeout */
431 uint8 responseTimeout : 1; /**< \brief response timeout */
432 uint8 breakDetected : 1; /**< \brief break detected */
433 uint8 linParityError : 1; /**< \brief lin parity error */
434 uint8 linAutobaudDetectionError : 1; /**< \brief lin autobaud detection error */
435 uint8 linChecksumError : 1; /**< \brief lin checksum error */
436 uint8 collisionDetectionError : 1; /**< \brief collision detection error */
437 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
438 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
439 } IfxAsclin_Lin_ErrorFlags;
440
441 /** \brief Structure for FIFO Control
442 */
443 typedef struct
444 {
445 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer) */
446 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
447 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
448 } IfxAsclin_Lin_FifoControl;
449
450 /** \brief Structure for Frame Control
451 */
452 typedef struct
453 {
454 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
455 IfxAsclin_LeadDelay leadDelay; /**< \brief FRAMECON.LEAD, lead delay */
456 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
457 IfxAsclin_ParityType parityType; /**< \brief FRAMECON.ODD, parity type (even or odd) */
458 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
459 boolean parityEnable; /**< \brief FRAMECON.PEN, parity enable */
460 boolean collisionDetectionEnable; /**< \brief FRAMECON.CEN, collision detection enable */
461 } IfxAsclin_Lin_FrameControl;
462
463 /** \brief Structure for Frame Data and Control flags
464 */
465 typedef struct
466 {
467 uint8 rxResponseData[8]; /**< \brief Array to store received response data */
468 uint8 headerID; /**< \brief header ID */
469 uint8 txResponseLength; /**< \brief Length of transmitted response */
470 uint8 rxResponseLength; /**< \brief Length of received response */
471 IfxAsclin_Lin_FrameControlFlags flags; /**< \brief LIN frame control flags */
472 } IfxAsclin_Lin_FrameDataControl;
473
474 /** \brief Structure for LIN Interrupt Configuration
475 */
476 typedef struct
477 {
478 uint16 txPriority; /**< \brief transmit interrupt priority */
479 uint16 rxPriority; /**< \brief receive interrupt priority */
480 uint16 exPriority; /**< \brief error interrupt priority */
481 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
482 IfxAsclin_Lin_EnabledInterrupts enabledInterrupt; /**< \brief Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register. */
483 } IfxAsclin_Lin_InterruptConfig;
484
485 /** \brief Structure for lin Control
486 */
487 typedef struct
488 {
489 boolean csEnable; /**< \brief LINCON.CSEN, hardware checksum generation and checking */
490 IfxAsclin_ChecksumInjection csi; /**< \brief LINCON.CSI, checksum injection (not written or written) into RxFIFO */
491 uint8 breakLength; /**< \brief LINBTIMER.BREAK, break pulse generation and detection length */
492 uint8 headerTimeout; /**< \brief LINHTIMER.HEADER, header timeout threshold value */
493 } IfxAsclin_Lin_LinControl;
494
495 /** \brief Structure for LIN pin configuration
496 */
497 typedef struct
498 {
499 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief LIN Rx pin */
500 IfxPort_InputMode rxMode; /**< \brief rx pin as input */
501 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief LIN Tx pin */
502 IfxPort_OutputMode txMode; /**< \brief tx as output */
503 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
504 } IfxAsclin_Lin_Pins;
505
506 /** \} */
507
508 /** \addtogroup IfxLld_Asclin_Lin_DataStructures
509 * \{ */
510 typedef struct
511 {
512 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
513 IfxAsclin_Lin_FrameDataControl linFrameData; /**< \brief Structure for Lin Frame Data and Control */
514 IfxAsclin_LinMode linMode; /**< \brief LINCON.MS, lin mode of operation (master or slave) */
515 IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags; /**< \brief structure for acknowledgement flags */
516 IfxAsclin_Lin_ErrorFlags errorFlagsStatus; /**< \brief structure for error flags status */
517 boolean receiveIdEnable; /**< \brief setting to receive Id in Rx Fifo after sending it */
518 boolean isInterruptMode; /**< \brief Value to indicate if APIs work in Polling mode or Interrupt mode */
519 } IfxAsclin_Lin;
520
521 /** \brief Configuration structure of the module
522 */
523 typedef struct
524 {
525 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
526 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN) */
527 IfxAsclin_LinMode linMode; /**< \brief LINCON.MS, lin mode of operation (master or slave) */
528 IfxAsclin_Lin_BaudrateGeneration brg; /**< \brief structure for baudrate generation */
529 IfxAsclin_Lin_BaudrateDetection brd; /**< \brief structure for baudrate detection */
530 IfxAsclin_Lin_BitTimingControl btc; /**< \brief structure for bit timings */
531 IfxAsclin_Lin_BitSamplingControl bsc; /**< \brief structure for bit sampling */
532 IfxAsclin_Lin_FrameControl frame; /**< \brief structure for frame control */
533 IfxAsclin_Lin_FifoControl fifo; /**< \brief structure for FIFO control */
534 IfxAsclin_Lin_DataControl data; /**< \brief structure for data control */
535 IfxAsclin_Lin_LinControl lin; /**< \brief structure for lin control */
536 IFX_CONST IfxAsclin_Lin_Pins *pins; /**< \brief structure for LIN pins */
537 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
538 IfxAsclin_RxInputSelect alti; /**< \brief IOCR.ALTI, Rx input (alternate input) pin selection */
539 IfxAsclin_Lin_InterruptConfig interrupt; /**< \brief structure for lin interrupt configuration */
540 boolean isInterruptMode; /**< \brief flag to indicate Interrupt Mode (TRUE) or Polling Mode (FALSE) */
541 boolean receiveIdEnable; /**< \brief setting to receive Id in Rx Fifo after sending it */
542 } IfxAsclin_Lin_Config;
543
544 /** \brief Structure to hold Lin Pdu data
545 */
546 typedef struct
547 {
548 uint8 pid; /**< \brief PID of LIN Header */
549 uint8 dataLength; /**< \brief Length of LIN Response */
550 uint8 *dataPtr; /**< \brief Pointer for LIN Response data */
551 IfxAsclin_Lin_Direction direction; /**< \brief Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) */
552 IfxAsclin_Checksum checksumMode; /**< \brief LIN Checksum Mode */
553 } IfxAsclin_Lin_PduType;
554
555 /** \} */
556
557 /** \addtogroup IfxLld_Asclin_Lin_ElementaryTransactions
558 * \{ */
559
560 /******************************************************************************/
561 /*-------------------------Inline Function Prototypes-------------------------*/
562 /******************************************************************************/
563
564 /** \brief Prepares the module to receive the header
565 * \param asclin module handle
566 * \return None
567 *
568 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
569 *
570 */
571 IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin);
572
573 /** \brief Prepares the module to Receive the response
574 * \param asclin module handle
575 * \param length count of data (in bytes).
576 * \return None
577 *
578 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
579 *
580 */
581 IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length);
582
583 /** \brief Reads the header
584 * \param asclin module handle
585 * \param id the id byte which should be received
586 * \return None
587 *
588 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
589 *
590 */
591 IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id);
592
593 /** \brief Reads the response
594 * \param asclin module handle
595 * \param data Pointer to the start of data which should be received
596 * \param length count of data (in bytes).
597 * \return None
598 *
599 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
600 *
601 */
602 IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
603
604 /******************************************************************************/
605 /*-------------------------Global Function Prototypes-------------------------*/
606 /******************************************************************************/
607
608 /** \brief Ignores the latest header
609 * \param asclin module handle
610 * \return None
611 *
612 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
613 *
614 */
615 IFX_EXTERN void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin);
616
617 /** \brief Receives the header
618 * \param asclin module handle
619 * \param id the id byte which should be received
620 * \return None
621 *
622 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
623 *
624 */
625 IFX_EXTERN void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id);
626
627 /** \brief Receives the response
628 * \param asclin module handle
629 * \param data Pointer to the start of data which should be received
630 * \param length count of data (in bytes).
631 * \return None
632 *
633 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
634 *
635 */
636 IFX_EXTERN void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
637
638 /** \brief Sends the header
639 * \param asclin module handle
640 * \param id the id byte which should be sent
641 * \return None
642 *
643 * A coding example of send header in polling mode can be found in \ref IfxLld_Asclin_Lin_Usage. For interrupt mode, this fuction is internally used by IfxAsclin_Lin_sendFrame API and the the polling part is bypassed.
644 *
645 */
646 IFX_EXTERN void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id);
647
648 /** \brief sends the response
649 * \param asclin module handle
650 * \param data Pointer to the start of data which should be sent
651 * \param length count of data (in bytes).
652 * \return None
653 *
654 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
655 *
656 */
657 IFX_EXTERN void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length);
658
659 /** \} */
660
661 /** \addtogroup IfxLld_Asclin_Lin_ModuleFunctions
662 * \{ */
663
664 /******************************************************************************/
665 /*-------------------------Global Function Prototypes-------------------------*/
666 /******************************************************************************/
667
668 /** \brief Disables the module
669 * \param asclin module handle
670 * \return None
671 */
672 IFX_EXTERN void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin);
673
674 /** \brief Initialises the module
675 * \param asclin module handle
676 * \param config predefined configuration structure of the module
677 * \return Status
678 *
679 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
680 *
681 */
682 IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config);
683
684 /** \brief Fills the config structure with default values
685 * \param config predefined configuration structure of the module
686 * \param asclin pointer to ASCLIN registers
687 * \return None
688 *
689 * A coding example can be found in \ref IfxLld_Asclin_Lin_Usage
690 *
691 */
692 IFX_EXTERN void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin);
693
694 /** \brief This API must be used in interrupt mode. It can be used to
695 * 1.Send Header
696 * 2.Send both Header and Response
697 * 3.Send Header and Receive Response
698 * \param asclin asclin module handle
699 * \param pduptr lin pdu configuration
700 * \return None
701 *
702 * A coding example of sendFrame in interrupt mode can be found in \ref IfxLld_Asclin_Lin_Usage.
703 *
704 */
705 IFX_EXTERN void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr);
706
707 /** \} */
708
709 /** \addtogroup IfxLld_Asclin_Lin_errorHandlingFunctions
710 * \{ */
711
712 /******************************************************************************/
713 /*-------------------------Global Function Prototypes-------------------------*/
714 /******************************************************************************/
715
716 /** \brief checks for acknowledgement and error flags for received header
717 * \param asclin module handle
718 * \return None
719 */
720 IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin);
721
722 /** \brief checks for acknowledgement and error flags for received response
723 * \param asclin module handle
724 * \return None
725 */
726 IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin);
727
728 /** \brief checks for acknowledgement and error flags for transmitted header
729 * \param asclin module handle
730 * \return None
731 */
732 IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin);
733
734 /** \brief checks for acknowledgement and error flags for transmitted response
735 * \param asclin module handle
736 * \return None
737 */
738 IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin);
739
740 /** \brief clears the flags status structures
741 * \param asclin module handle
742 * \return None
743 */
744 IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin);
745
746 /** \brief waits until receive header end acknowledgemnet or an error has been detected
747 * \param asclin module handle
748 * \return Result, TRUE: if error, FALSE: is no error
749 */
750 IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin);
751
752 /** \brief waits until receive response end acknowledgemnet or an error has been detected
753 * \param asclin module handle
754 * \return Result, TRUE: if error, FALSE: is no error
755 */
756 IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin);
757
758 /** \brief waits until transmit header end acknowledgemnet or an error has been detected
759 * \param asclin module handle
760 * \return Result, TRUE: if error, FALSE: is no error
761 */
762 IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin);
763
764 /** \brief waits until transmit response end acknowledgemnet or an error has been detected
765 * \param asclin module handle
766 * \return Result, TRUE: if error, FALSE: is no error
767 */
768 IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin);
769
770 /** \} */
771
772 /** \addtogroup IfxLld_Asclin_Lin_InterruptFunctions
773 * \{ */
774
775 /******************************************************************************/
776 /*-------------------------Global Function Prototypes-------------------------*/
777 /******************************************************************************/
778
779 /** \brief ISR error routine.
780 * \param asclin module handle
781 * \return None
782 */
783 IFX_EXTERN void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin);
784
785 /** \brief ISR receive routine.
786 * \param asclin module handle
787 * \return None
788 */
789 IFX_EXTERN void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin);
790
791 /** \brief ISR transmit routine.
792 * \param asclin module handle
793 * \return None
794 */
795 IFX_EXTERN void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin);
796
797 /** \} */
798
799 /******************************************************************************/
800 /*---------------------Inline Function Implementations------------------------*/
801 /******************************************************************************/
802
803 IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
804 {
805 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
806 IfxAsclin_clearAllFlags(asclinSFR); /* clearing all flags*/
807 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO*/
808 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* enabling Tx FIFO for transmitting*/
809 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enabling Rx FIFO for receiving*/
810 }
811
812
813 IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
814 {
815 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
816 IfxAsclin_setDataLength(asclinSFR, (IfxAsclin_DataLength)(length - 1)); /* set number of bytes to be received*/
817 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
818 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO */
819 IfxAsclin_enableTxFifoOutlet(asclinSFR, FALSE); /* enable Tx FIFO for transmitting */
820 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* enable Rx FIFO for receiving */
821 }
822
823
824 IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
825 {
826 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
827 IfxAsclin_read8(asclinSFR, id, 1U); /*reading the ID byte*/
828 }
829
830
831 IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
832 {
833 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
834 IfxAsclin_read8(asclinSFR, data, length); /* read the data bytes; */
835 }
836
837
838 #endif /* IFXASCLIN_LIN_H */
IfxAsclin_Lin_sendResponse
IFX_EXTERN void IfxAsclin_Lin_sendResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
sends the response
Definition: IfxAsclin_Lin.c:570
IfxAsclin_Lin_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Lin.h:456
IfxAsclin_Lin_EnabledInterrupts::exResponseTimeout
uint16 exResponseTimeout
Response Timeout.
Definition: IfxAsclin_Lin.h:336
IfxAsclin_Lin_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Lin.h:478
IfxAsclin_Lin_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Lin.h:537
IfxAsclin_Lin_sendFrame
IFX_EXTERN void IfxAsclin_Lin_sendFrame(IfxAsclin_Lin *asclin, IfxAsclin_Lin_PduType *pduptr)
This API must be used in interrupt mode. It can be used to 1.Send Header 2.Send both Header and Respo...
Definition: IfxAsclin_Lin.c:855
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin_Lin_DataControl
Structure for Data Control.
Definition: IfxAsclin_Lin.h:416
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:237
IfxAsclin_Lin_AcknowledgementFlags::txCompleted
uint8 txCompleted
transmission completed
Definition: IfxAsclin_Lin.h:374
IfxAsclin_Lin_ErrorFlags::linAutobaudDetectionError
uint8 linAutobaudDetectionError
lin autobaud detection error
Definition: IfxAsclin_Lin.h:434
IfxAsclin_Lin_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Lin.h:479
IfxAsclin_Lin_BaudrateDetection::upperLimit
uint8 upperLimit
BRD.UPPERLIMIT, auto baudrate detection upperlimit.
Definition: IfxAsclin_Lin.h:383
IfxAsclin_Lin_Config::fifo
IfxAsclin_Lin_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Lin.h:533
IfxAsclin_Lin_FrameControlFlags::txSendHeaderOnly
uint16 txSendHeaderOnly
Flag indicating that only Header is transmitted.
Definition: IfxAsclin_Lin.h:350
IfxAsclin_Lin_EnabledInterrupts::exLinChecksumError
uint16 exLinChecksumError
Lin Checksum Error.
Definition: IfxAsclin_Lin.h:339
IfxAsclin_Lin_EnabledInterrupts::rxReceivedHeader
uint16 rxReceivedHeader
Received Header.
Definition: IfxAsclin_Lin.h:329
IfxAsclin_Lin_BitTimingControl::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Lin.h:410
IfxAsclin_Lin_Direction_TransmitHeaderAndReceiveResponse
Transmit Header and Receive Response.
Definition: IfxAsclin_Lin.h:314
IfxAsclin_Lin_BaudrateGeneration::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Lin.h:392
IfxAsclin_Lin_receiveHeader
IFX_EXTERN void IfxAsclin_Lin_receiveHeader(IfxAsclin_Lin *asclin, uint8 *id)
Receives the header.
Definition: IfxAsclin_Lin.c:497
IfxAsclin_Lin_readResponse
IFX_INLINE void IfxAsclin_Lin_readResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Reads the response.
Definition: IfxAsclin_Lin.h:831
IfxAsclin_Lin_ErrorFlags::collisionDetectionError
uint8 collisionDetectionError
collision detection error
Definition: IfxAsclin_Lin.h:436
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:326
IfxAsclin_Lin_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Lin.h:458
IfxAsclin_Lin_BaudrateGeneration::numerator
uint16 numerator
BRG.NUMERATOR, defines the numerator of fractional divider.
Definition: IfxAsclin_Lin.h:393
IfxAsclin_Lin_PduType::dataLength
uint8 dataLength
Length of LIN Response.
Definition: IfxAsclin_Lin.h:549
IfxAsclin_Lin_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Lin.h:503
IfxAsclin_Lin_receiveResponse
IFX_EXTERN void IfxAsclin_Lin_receiveResponse(IfxAsclin_Lin *asclin, uint8 *data, uint32 length)
Receives the response.
Definition: IfxAsclin_Lin.c:514
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:278
IfxAsclin_Lin_FifoControl
Structure for FIFO Control.
Definition: IfxAsclin_Lin.h:443
IfxAsclin_Lin_PduType::checksumMode
IfxAsclin_Checksum checksumMode
LIN Checksum Mode.
Definition: IfxAsclin_Lin.h:552
IfxAsclin_Lin_checkForTransmittedHeaderFlags
IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted header
Definition: IfxAsclin_Lin.c:129
IfxAsclin_Lin_ErrorFlags::breakDetected
uint8 breakDetected
break detected
Definition: IfxAsclin_Lin.h:432
IfxAsclin_Lin::isInterruptMode
boolean isInterruptMode
Value to indicate if APIs work in Polling mode or Interrupt mode.
Definition: IfxAsclin_Lin.h:518
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxAsclin_Lin_Pins
Structure for LIN pin configuration.
Definition: IfxAsclin_Lin.h:497
IfxAsclin_Lin_ErrorFlags::headerTimeout
uint8 headerTimeout
header timeout
Definition: IfxAsclin_Lin.h:430
IfxAsclin_Lin_checkForReceivedResponseFlags
IFX_EXTERN void IfxAsclin_Lin_checkForReceivedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received response
Definition: IfxAsclin_Lin.c:79
float32
float float32
Definition: Platform_Types.h:167
Ifx_Assert.h
Assert functions.
IfxAsclin_Lin::receiveIdEnable
boolean receiveIdEnable
setting to receive Id in Rx Fifo after sending it
Definition: IfxAsclin_Lin.h:517
IfxAsclin_Lin_FrameControl
Structure for Frame Control.
Definition: IfxAsclin_Lin.h:452
IfxAsclin_Lin_DataControl::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Lin.h:418
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:372
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1576
IfxAsclin_Lin_ErrorFlags::responseTimeout
uint8 responseTimeout
response timeout
Definition: IfxAsclin_Lin.h:431
IfxAsclin_Lin_EnabledInterrupts::exTransmitFIFOOverflow
uint16 exTransmitFIFOOverflow
Transmit FIFO Overflow.
Definition: IfxAsclin_Lin.h:343
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:289
IfxAsclin_Lin_ignoreHeader
IFX_EXTERN void IfxAsclin_Lin_ignoreHeader(IfxAsclin_Lin *asclin)
Ignores the latest header.
Definition: IfxAsclin_Lin.c:238
IfxAsclin_Checksum
IfxAsclin_Checksum
Defines if the classic or the enhanced checksum will be calculated by the checksum block...
Definition: IfxAsclin.h:62
IfxAsclin_Lin_Config::frame
IfxAsclin_Lin_FrameControl frame
structure for frame control
Definition: IfxAsclin_Lin.h:532
IfxAsclin_Lin_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Lin.h:447
IfxAsclin_Lin_EnabledInterrupts::txTransmittedResponse
uint16 txTransmittedResponse
Transmitted Response.
Definition: IfxAsclin_Lin.h:332
IfxAsclin_Lin_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Lin_initModule(IfxAsclin_Lin *asclin, const IfxAsclin_Lin_Config *config)
Initialises the module.
Definition: IfxAsclin_Lin.c:247
IfxAsclin_LinMode
IfxAsclin_LinMode
Configures if the module in LIN mode operates as master or slave Definition in Ifx_ASCLIN.LIN.CON.B.MS.
Definition: IfxAsclin.h:190
IfxAsclin_Lin::acknowledgmentFlags
IfxAsclin_Lin_AcknowledgementFlags acknowledgmentFlags
structure for acknowledgement flags
Definition: IfxAsclin_Lin.h:515
IfxAsclin_Lin_isrTransmit
IFX_EXTERN void IfxAsclin_Lin_isrTransmit(IfxAsclin_Lin *asclin)
ISR transmit routine.
Definition: IfxAsclin_Lin.c:834
IfxAsclin_LinResponseTimeoutMode
IfxAsclin_LinResponseTimeoutMode
Defines the timeout threshold of RESPOSE bit is for LIN response timeout or LIN frame timeout...
Definition: IfxAsclin.h:199
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxAsclin_Lin_BitSamplingControl::filterDepth
uint8 filterDepth
IOCR.DEPTH, digital glitch filter depth.
Definition: IfxAsclin_Lin.h:401
IfxAsclin_Lin_PduType::direction
IfxAsclin_Lin_Direction direction
Direction Control (Tx Header only, Tx both Header and Response, Tx Header and Rx Response) ...
Definition: IfxAsclin_Lin.h:551
IfxAsclin_Lin_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
LIN Rx pin.
Definition: IfxAsclin_Lin.h:499
IfxAsclin_Lin_FrameControlFlags::rxResponseErrorOccurred
uint16 rxResponseErrorOccurred
Flag to indicate error occurred during reception of Response.
Definition: IfxAsclin_Lin.h:359
IfxAsclin_HeaderResponseSelect
IfxAsclin_HeaderResponseSelect
Defines if LIN frame shall consist of a header and response or of a header only. Definition in Ifx_AS...
Definition: IfxAsclin.h:148
IfxAsclin_Lin_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Lin.h:427
IfxAsclin_Lin_InterruptConfig::exPriority
uint16 exPriority
error interrupt priority
Definition: IfxAsclin_Lin.h:480
IfxAsclin_Lin_prepareHeaderReception
IFX_INLINE void IfxAsclin_Lin_prepareHeaderReception(IfxAsclin_Lin *asclin)
Prepares the module to receive the header.
Definition: IfxAsclin_Lin.h:803
IfxAsclin_Lin_FrameControlFlags::txResponseErrorOccurred
uint16 txResponseErrorOccurred
Flag to indicate error occurred during transmission of Response.
Definition: IfxAsclin_Lin.h:357
IfxAsclin_Lin_EnabledInterrupts::txTransmittedHeader
uint16 txTransmittedHeader
Transmitted Header.
Definition: IfxAsclin_Lin.h:331
IfxAsclin_Lin_FrameDataControl::rxResponseLength
uint8 rxResponseLength
Length of received response.
Definition: IfxAsclin_Lin.h:470
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxAsclin_Lin_BaudrateDetection::measured
uint8 measured
BRD.MEASURED, measured time interval between the first and the fifth falling edge of the sync byte...
Definition: IfxAsclin_Lin.h:384
IfxAsclin_Lin_EnabledInterrupts::exLinAutobaudDetectionError
uint16 exLinAutobaudDetectionError
Lin Autobaud Detection Error.
Definition: IfxAsclin_Lin.h:338
IfxAsclin_Lin::linFrameData
IfxAsclin_Lin_FrameDataControl linFrameData
Structure for Lin Frame Data and Control.
Definition: IfxAsclin_Lin.h:513
IfxAsclin_Lin_waitForReceivedHeader
IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedHeader(IfxAsclin_Lin *asclin)
waits until receive header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:590
IfxAsclin_Lin_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Lin.h:429
IfxAsclin_Lin_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
LIN Tx pin.
Definition: IfxAsclin_Lin.h:501
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxAsclin_Lin_Config::bsc
IfxAsclin_Lin_BitSamplingControl bsc
structure for bit sampling
Definition: IfxAsclin_Lin.h:531
IfxAsclin_Lin_Config::brg
IfxAsclin_Lin_BaudrateGeneration brg
structure for baudrate generation
Definition: IfxAsclin_Lin.h:528
IfxAsclin_Lin_FrameControlFlags::rxHeaderInProgress
uint16 rxHeaderInProgress
Flag to indicate Header reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:354
IfxAsclin_Lin_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Lin.h:502
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:208
IfxAsclin_Lin_EnabledInterrupts::exTransmissionCompleted
uint16 exTransmissionCompleted
Transmission Completed.
Definition: IfxAsclin_Lin.h:334
IfxAsclin_Lin_FrameControl::parityType
IfxAsclin_ParityType parityType
FRAMECON.ODD, parity type (even or odd)
Definition: IfxAsclin_Lin.h:457
IfxAsclin_Lin_ErrorFlags::linParityError
uint8 linParityError
lin parity error
Definition: IfxAsclin_Lin.h:433
IfxAsclin_Lin_AcknowledgementFlags::txResponseEnd
uint8 txResponseEnd
transmit response end
Definition: IfxAsclin_Lin.h:371
IfxAsclin_Lin_BitTimingControl
Structure for Bit Timing.
Definition: IfxAsclin_Lin.h:408
IfxAsclin_Lin_EnabledInterrupts::exBreakDetected
uint16 exBreakDetected
Break Detected.
Definition: IfxAsclin_Lin.h:333
IfxAsclin_Lin_EnabledInterrupts::exHeaderTimeout
uint16 exHeaderTimeout
Header Timeout.
Definition: IfxAsclin_Lin.h:335
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxAsclin_Lin_DataControl::responseTimeout
uint16 responseTimeout
DATCON.RESPONSE, timeout limit.
Definition: IfxAsclin_Lin.h:422
IfxAsclin_Lin_FrameControlFlags::txSendResponse
uint16 txSendResponse
Flag to indicate Response is transmitted.
Definition: IfxAsclin_Lin.h:351
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:175
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:137
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:159
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxAsclin_Lin_PduType::pid
uint8 pid
PID of LIN Header.
Definition: IfxAsclin_Lin.h:548
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin_Lin_initModuleConfig
IFX_EXTERN void IfxAsclin_Lin_initModuleConfig(IfxAsclin_Lin_Config *config, Ifx_ASCLIN *asclin)
Fills the config structure with default values.
Definition: IfxAsclin_Lin.c:420
IfxAsclin_Lin_FrameControlFlags::rxHeaderErrorOccurred
uint16 rxHeaderErrorOccurred
Flag to indicate error occurred during reception of Header.
Definition: IfxAsclin_Lin.h:358
IfxAsclin_Lin_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Lin.h:438
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:90
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:114
IfxAsclin_Lin_Config::btc
IfxAsclin_Lin_BitTimingControl btc
structure for bit timings
Definition: IfxAsclin_Lin.h:530
IfxAsclin_Lin_LinControl
Structure for lin Control.
Definition: IfxAsclin_Lin.h:487
IfxAsclin_ChecksumInjection
IfxAsclin_ChecksumInjection
Defines if the received checksum byte is written into the RXFifo or not. Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:71
IfxAsclin_Lin_FrameDataControl::txResponseLength
uint8 txResponseLength
Length of transmitted response.
Definition: IfxAsclin_Lin.h:469
IfxAsclin_Lin_ErrorFlags::linChecksumError
uint8 linChecksumError
lin checksum error
Definition: IfxAsclin_Lin.h:435
IfxAsclin_Lin_BaudrateDetection::lowerLimit
uint8 lowerLimit
BRD.LOWERLIMIT, auto baudrate detection lowerlimit.
Definition: IfxAsclin_Lin.h:382
IfxAsclin_Lin_Config::pins
IFX_CONST IfxAsclin_Lin_Pins * pins
structure for LIN pins
Definition: IfxAsclin_Lin.h:536
IfxAsclin_Lin_FrameDataControl::flags
IfxAsclin_Lin_FrameControlFlags flags
LIN frame control flags.
Definition: IfxAsclin_Lin.h:471
IfxAsclin_Lin_isrError
IFX_EXTERN void IfxAsclin_Lin_isrError(IfxAsclin_Lin *asclin)
ISR error routine.
Definition: IfxAsclin_Lin.c:689
IfxAsclin_Lin_checkForTransmittedResponseFlags
IFX_EXTERN void IfxAsclin_Lin_checkForTransmittedResponseFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for transmitted response
Definition: IfxAsclin_Lin.c:167
IfxAsclin_Lin_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Lin.h:526
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:304
IfxAsclin_Lin_Config::brd
IfxAsclin_Lin_BaudrateDetection brd
structure for baudrate detection
Definition: IfxAsclin_Lin.h:529
IfxAsclin_Lin_prepareResponseReception
IFX_INLINE void IfxAsclin_Lin_prepareResponseReception(IfxAsclin_Lin *asclin, uint32 length)
Prepares the module to Receive the response.
Definition: IfxAsclin_Lin.h:813
IfxAsclin_Lin_Config::interrupt
IfxAsclin_Lin_InterruptConfig interrupt
structure for lin interrupt configuration
Definition: IfxAsclin_Lin.h:539
IfxAsclin_Lin_BitSamplingControl::samplePointPosition
IfxAsclin_SamplePointPosition samplePointPosition
BITCON.SAMPLEPOINT, sample point position.
Definition: IfxAsclin_Lin.h:403
IfxAsclin_Lin_FrameDataControl
Structure for Frame Data and Control flags.
Definition: IfxAsclin_Lin.h:465
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1894
IfxAsclin_Lin_BaudrateGeneration
Structure for Baudrate Generation.
Definition: IfxAsclin_Lin.h:390
IfxAsclin_Lin_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Lin.h:500
IfxAsclin_Lin_Config
Configuration structure of the module.
Definition: IfxAsclin_Lin.h:523
IfxAsclin_Lin_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Lin.h:481
IfxAsclin_Lin_InterruptConfig
Structure for LIN Interrupt Configuration.
Definition: IfxAsclin_Lin.h:476
IfxAsclin_Lin::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Lin.h:512
IfxAsclin_Lin_InterruptConfig::enabledInterrupt
IfxAsclin_Lin_EnabledInterrupts enabledInterrupt
Interrupts which have to be enabled during initialisation as configured by application. Does not reflect current status of FLAGSENABLE register.
Definition: IfxAsclin_Lin.h:482
IfxAsclin_Lin_Direction_TransmitHeader
Transmit Header.
Definition: IfxAsclin_Lin.h:312
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:396
IfxAsclin_Lin_waitForReceivedResponse
IFX_EXTERN boolean IfxAsclin_Lin_waitForReceivedResponse(IfxAsclin_Lin *asclin)
waits until receive response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:615
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:195
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxAsclin_Lin_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Lin.h:437
IfxAsclin_Lin_BitTimingControl::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Lin.h:411
IfxAsclin_Lin_BaudrateDetection::abd
boolean abd
LINCON.ABD, autobaud detection enable.
Definition: IfxAsclin_Lin.h:381
IfxAsclin_Lin_Direction
IfxAsclin_Lin_Direction
Defines the type of Lin Master Frame. (Transmit Header only) or (Transmit Header and Response) or (Tr...
Definition: IfxAsclin_Lin.h:310
IfxAsclin_Lin_disableModule
IFX_EXTERN void IfxAsclin_Lin_disableModule(IfxAsclin_Lin *asclin)
Disables the module.
Definition: IfxAsclin_Lin.c:228
IfxAsclin_Lin_sendHeader
IFX_EXTERN void IfxAsclin_Lin_sendHeader(IfxAsclin_Lin *asclin, uint8 *id)
Sends the header.
Definition: IfxAsclin_Lin.c:531
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxAsclin_Lin_BaudrateGeneration::denominator
uint16 denominator
BRG.DENOMINATOR, defines the denominator of fractional divider.
Definition: IfxAsclin_Lin.h:394
IfxAsclin_Lin_AcknowledgementFlags::rxHeaderEnd
uint8 rxHeaderEnd
receive header end
Definition: IfxAsclin_Lin.h:372
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1870
IfxAsclin_Lin_EnabledInterrupts::rxReceivedResponse
uint16 rxReceivedResponse
Received Response.
Definition: IfxAsclin_Lin.h:330
IfxAsclin_Lin_FrameControlFlags::rxResponseInProgress
uint16 rxResponseInProgress
Flag to indicate Response reception is initiated and is in progress.
Definition: IfxAsclin_Lin.h:355
IfxAsclin_Lin_FrameControl::parityEnable
boolean parityEnable
FRAMECON.PEN, parity enable.
Definition: IfxAsclin_Lin.h:459
IfxAsclin_Lin_Config::data
IfxAsclin_Lin_DataControl data
structure for data control
Definition: IfxAsclin_Lin.h:534
IfxAsclin_Lin_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Lin.h:455
IfxAsclin_Lin::errorFlagsStatus
IfxAsclin_Lin_ErrorFlags errorFlagsStatus
structure for error flags status
Definition: IfxAsclin_Lin.h:516
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:336
IfxAsclin_Lin_FrameDataControl::headerID
uint8 headerID
header ID
Definition: IfxAsclin_Lin.h:468
IfxAsclin_Lin_FrameControlFlags::txHeaderErrorOccurred
uint16 txHeaderErrorOccurred
Flag to indicate error occurred during transmission of Header.
Definition: IfxAsclin_Lin.h:356
IfxAsclin_Lin_Config::lin
IfxAsclin_Lin_LinControl lin
structure for lin control
Definition: IfxAsclin_Lin.h:535
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxAsclin_Lin_EnabledInterrupts::exCollisionDetectionError
uint16 exCollisionDetectionError
Collision Detection Error.
Definition: IfxAsclin_Lin.h:341
IfxAsclin_Lin_LinControl::csEnable
boolean csEnable
LINCON.CSEN, hardware checksum generation and checking.
Definition: IfxAsclin_Lin.h:489
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1828
IfxAsclin_Lin_BitSamplingControl
Structure for Bit Sampling.
Definition: IfxAsclin_Lin.h:399
IfxAsclin_Lin_DataControl::headerOnly
IfxAsclin_HeaderResponseSelect headerOnly
DATCON.HO, Lin frame with header and response or header only.
Definition: IfxAsclin_Lin.h:419
IfxAsclin_Lin_isrReceive
IFX_EXTERN void IfxAsclin_Lin_isrReceive(IfxAsclin_Lin *asclin)
ISR receive routine.
Definition: IfxAsclin_Lin.c:811
IfxAsclin_Lin_waitForTransmittedResponse
IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedResponse(IfxAsclin_Lin *asclin)
waits until transmit response end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:665
IfxAsclin_Lin_EnabledInterrupts
Structure to store interrupts which are enabled during initialisation.
Definition: IfxAsclin_Lin.h:327
IfxAsclin_Lin_checkForReceivedHeaderFlags
IFX_EXTERN void IfxAsclin_Lin_checkForReceivedHeaderFlags(IfxAsclin_Lin *asclin)
checks for acknowledgement and error flags for received header
Definition: IfxAsclin_Lin.c:35
IfxAsclin_Lin_DataControl::checksum
IfxAsclin_Checksum checksum
DATCON.CSM, checksum mode (classic or enhanced)
Definition: IfxAsclin_Lin.h:421
IfxAsclin_Lin_Direction_TransmitHeaderAndResponse
Transmit both Header and Response.
Definition: IfxAsclin_Lin.h:313
IfxAsclin_Lin
Definition: IfxAsclin_Lin.h:510
IfxAsclin_ParityType
IfxAsclin_ParityType
Type of parity bit attached to data bits Definition in Ifx_ASCLIN.FRAMECON.B.ODD. ...
Definition: IfxAsclin.h:228
IfxAsclin_Lin_clearFlagsStatus
IFX_EXTERN void IfxAsclin_Lin_clearFlagsStatus(IfxAsclin_Lin *asclin)
clears the flags status structures
Definition: IfxAsclin_Lin.c:205
IfxAsclin_Lin_AcknowledgementFlags::txHeaderEnd
uint8 txHeaderEnd
transmit header end
Definition: IfxAsclin_Lin.h:370
IfxAsclin_Lin_readHeader
IFX_INLINE void IfxAsclin_Lin_readHeader(IfxAsclin_Lin *asclin, uint8 *id)
Reads the header.
Definition: IfxAsclin_Lin.h:824
IfxAsclin_Lin_Config::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Lin.h:538
IfxAsclin_Lin_AcknowledgementFlags
Structure for Acknowledgement Flags.
Definition: IfxAsclin_Lin.h:368
IfxAsclin_Lin::linMode
IfxAsclin_LinMode linMode
LINCON.MS, lin mode of operation (master or slave)
Definition: IfxAsclin_Lin.h:514
IfxAsclin_Lin_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Lin.h:454
IfxAsclin_Lin_LinControl::csi
IfxAsclin_ChecksumInjection csi
LINCON.CSI, checksum injection (not written or written) into RxFIFO.
Definition: IfxAsclin_Lin.h:490
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Lin_FrameControl::collisionDetectionEnable
boolean collisionDetectionEnable
FRAMECON.CEN, collision detection enable.
Definition: IfxAsclin_Lin.h:460
IfxAsclin_Lin_waitForTransmittedHeader
IFX_EXTERN boolean IfxAsclin_Lin_waitForTransmittedHeader(IfxAsclin_Lin *asclin)
waits until transmit header end acknowledgemnet or an error has been detected
Definition: IfxAsclin_Lin.c:641
IfxAsclin_Lin_EnabledInterrupts::exReceiveFIFOOverflow
uint16 exReceiveFIFOOverflow
Receive FIFO Overflow.
Definition: IfxAsclin_Lin.h:342
IfxAsclin_Lin_AcknowledgementFlags::rxResponseEnd
uint8 rxResponseEnd
receive response end
Definition: IfxAsclin_Lin.h:373
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxAsclin_Lin_EnabledInterrupts::exLinParityError
uint16 exLinParityError
Lin Parity Error.
Definition: IfxAsclin_Lin.h:337
IfxAsclin_Lin_FrameControlFlags
Structure for Lin Frame Control flags.
Definition: IfxAsclin_Lin.h:348
IfxAsclin_Lin_DataControl::responseTimeoutMode
IfxAsclin_LinResponseTimeoutMode responseTimeoutMode
DATCON.RM, response mode (response or frame timeout threshold)
Definition: IfxAsclin_Lin.h:420
IfxAsclin_Lin_BaudrateDetection
Structure for Baudrate Detection.
Definition: IfxAsclin_Lin.h:379
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:363
IfxAsclin_Lin_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Lin.h:402
IfxAsclin_Lin_FrameControlFlags::txResponseInProgress
uint16 txResponseInProgress
Flag to indicate Response transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:353
IfxAsclin_Lin_LinControl::breakLength
uint8 breakLength
LINBTIMER.BREAK, break pulse generation and detection length.
Definition: IfxAsclin_Lin.h:491
IfxAsclin_Lin_PduType
Structure to hold Lin Pdu data.
Definition: IfxAsclin_Lin.h:546
IfxAsclin_Lin_FrameControlFlags::txHeaderInProgress
uint16 txHeaderInProgress
Flag to indicate Header transmission is initiated and is in progress.
Definition: IfxAsclin_Lin.h:352
IfxAsclin_Lin_PduType::dataPtr
uint8 * dataPtr
Pointer for LIN Response data.
Definition: IfxAsclin_Lin.h:550
IfxAsclin_Lin_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Lin.h:445
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2203
IfxAsclin_Lin_EnabledInterrupts::exFramingError
uint16 exFramingError
Framing Error.
Definition: IfxAsclin_Lin.h:340
IfxAsclin_Lin_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Lin.h:446


iLLD_TC26B: IfxAsclin_PinMap.c Source File

  • _PinMap
IfxAsclin_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_PinMap.c
3 * \brief ASCLIN I/O map
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxAsclin_PinMap.h"
27
28 IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a};
29 IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a};
30 IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b};
31 IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a};
32 IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b};
33 IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a};
34 IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2};
35 IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2};
36 IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2};
37 IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2};
38 IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2};
39 IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3};
40 IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a};
41 IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b};
42 IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a};
43 IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b};
44 IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c};
45 IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d};
46 IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e};
47 IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f};
48 IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g};
49 IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a};
50 IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b};
51 IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d};
52 IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e};
53 IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g};
54 IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a};
55 IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c};
56 IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d};
57 IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e};
58 IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f};
59 IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6};
60 IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6};
61 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6};
62 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6};
63 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2};
64 IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4};
65 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2};
66 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2};
67 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6};
68 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2};
69 IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4};
70 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2};
71 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2};
72 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6};
73 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6};
74 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3};
75 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2};
76 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3};
77 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4};
78 IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2};
79 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4};
80 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2};
81 IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4};
82 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2};
83 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6};
84 IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2};
85 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2};
86 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5};
87 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2};
88 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2};
89 IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2};
90 IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2};
91 IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2};
92 IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2};
93 IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2};
94 IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2};
95 IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2};
96 IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4};
97 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2};
98 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2};
99 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2};
100 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2};
101 IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2};
102 IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2};
103 IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2};
104 IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2};
105 IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2};
106 IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2};
107 IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2};
108 IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2};
109 IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2};
110 IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3};
111 IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2};
112 IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2};
113 IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2};
114 IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2};
115 IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2};
116 IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2};
117 IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2};
118 IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2};
119
120
121 const IfxAsclin_Cts_In *IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS] = {
122 {
123 &IfxAsclin0_CTSA_P14_9_IN,
124 NULL_PTR
125 },
126 {
127 &IfxAsclin1_CTSA_P20_7_IN,
128 &IfxAsclin1_CTSB_P32_4_IN
129 },
130 {
131 &IfxAsclin2_CTSA_P10_7_IN,
132 &IfxAsclin2_CTSB_P33_5_IN
133 },
134 {
135 &IfxAsclin3_CTSA_P00_12_IN,
136 NULL_PTR
137 }
138 };
139
140 const IfxAsclin_Rts_Out *IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS] = {
141 {
142 &IfxAsclin0_RTS_P14_7_OUT,
143 NULL_PTR
144 },
145 {
146 &IfxAsclin1_RTS_P20_6_OUT,
147 &IfxAsclin1_RTS_P23_1_OUT
148 },
149 {
150 &IfxAsclin2_RTS_P10_8_OUT,
151 &IfxAsclin2_RTS_P33_4_OUT
152 },
153 {
154 &IfxAsclin3_RTS_P00_9_OUT,
155 NULL_PTR
156 }
157 };
158
159 const IfxAsclin_Rx_In *IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS] = {
160 {
161 &IfxAsclin0_RXA_P14_1_IN,
162 &IfxAsclin0_RXB_P15_3_IN,
163 NULL_PTR,
164 NULL_PTR,
165 NULL_PTR,
166 NULL_PTR,
167 NULL_PTR
168 },
169 {
170 &IfxAsclin1_RXA_P15_1_IN,
171 &IfxAsclin1_RXB_P15_5_IN,
172 &IfxAsclin1_RXC_P20_9_IN,
173 &IfxAsclin1_RXD_P14_8_IN,
174 &IfxAsclin1_RXE_P11_10_IN,
175 &IfxAsclin1_RXF_P33_13_IN,
176 &IfxAsclin1_RXG_P02_3_IN
177 },
178 {
179 &IfxAsclin2_RXA_P14_3_IN,
180 &IfxAsclin2_RXB_P02_1_IN,
181 NULL_PTR,
182 &IfxAsclin2_RXD_P10_6_IN,
183 &IfxAsclin2_RXE_P33_8_IN,
184 NULL_PTR,
185 &IfxAsclin2_RXG_P02_0_IN
186 },
187 {
188 &IfxAsclin3_RXA_P15_7_IN,
189 NULL_PTR,
190 &IfxAsclin3_RXC_P20_3_IN,
191 &IfxAsclin3_RXD_P32_2_IN,
192 &IfxAsclin3_RXE_P00_1_IN,
193 &IfxAsclin3_RXF_P21_6_IN,
194 NULL_PTR
195 }
196 };
197
198 const IfxAsclin_Sclk_Out *IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS] = {
199 {
200 &IfxAsclin0_SCLK_P14_0_OUT,
201 &IfxAsclin0_SCLK_P15_2_OUT,
202 NULL_PTR,
203 NULL_PTR,
204 NULL_PTR,
205 NULL_PTR,
206 NULL_PTR,
207 NULL_PTR,
208 NULL_PTR
209 },
210 {
211 &IfxAsclin1_SCLK_P15_0_OUT,
212 &IfxAsclin1_SCLK_P20_10_OUT,
213 &IfxAsclin1_SCLK_P33_11_OUT,
214 &IfxAsclin1_SCLK_P33_12_OUT,
215 NULL_PTR,
216 NULL_PTR,
217 NULL_PTR,
218 NULL_PTR,
219 NULL_PTR
220 },
221 {
222 &IfxAsclin2_SCLK_P02_4_OUT,
223 &IfxAsclin2_SCLK_P10_6_OUT,
224 &IfxAsclin2_SCLK_P14_2_OUT,
225 &IfxAsclin2_SCLK_P33_7_OUT,
226 &IfxAsclin2_SCLK_P33_9_OUT,
227 NULL_PTR,
228 NULL_PTR,
229 NULL_PTR,
230 NULL_PTR
231 },
232 {
233 &IfxAsclin3_SCLK_P00_0_OUT,
234 &IfxAsclin3_SCLK_P00_2_OUT,
235 &IfxAsclin3_SCLK_P15_6_OUT,
236 &IfxAsclin3_SCLK_P15_8_OUT,
237 &IfxAsclin3_SCLK_P20_0_OUT,
238 &IfxAsclin3_SCLK_P21_5_OUT,
239 &IfxAsclin3_SCLK_P21_7_OUT,
240 &IfxAsclin3_SCLK_P32_3_OUT,
241 &IfxAsclin3_SCLK_P33_2_OUT
242 }
243 };
244
245 const IfxAsclin_Slso_Out *IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS] = {
246 {
247 NULL_PTR,
248 NULL_PTR,
249 NULL_PTR,
250 NULL_PTR,
251 NULL_PTR
252 },
253 {
254 &IfxAsclin1_SLSO_P14_3_OUT,
255 &IfxAsclin1_SLSO_P20_8_OUT,
256 &IfxAsclin1_SLSO_P33_10_OUT,
257 NULL_PTR,
258 NULL_PTR
259 },
260 {
261 &IfxAsclin2_SLSO_P02_3_OUT,
262 &IfxAsclin2_SLSO_P10_5_OUT,
263 &IfxAsclin2_SLSO_P33_6_OUT,
264 NULL_PTR,
265 NULL_PTR
266 },
267 {
268 &IfxAsclin3_SLSO_P00_3_OUT,
269 &IfxAsclin3_SLSO_P14_3_OUT,
270 &IfxAsclin3_SLSO_P21_2_OUT,
271 &IfxAsclin3_SLSO_P21_6_OUT,
272 &IfxAsclin3_SLSO_P33_1_OUT
273 }
274 };
275
276 const IfxAsclin_Tx_Out *IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS] = {
277 {
278 &IfxAsclin0_TX_P14_0_OUT,
279 &IfxAsclin0_TX_P14_1_OUT,
280 &IfxAsclin0_TX_P15_2_OUT,
281 &IfxAsclin0_TX_P15_3_OUT,
282 NULL_PTR,
283 NULL_PTR,
284 NULL_PTR,
285 NULL_PTR,
286 NULL_PTR,
287 NULL_PTR
288 },
289 {
290 &IfxAsclin1_TX_P02_2_OUT,
291 &IfxAsclin1_TX_P11_12_OUT,
292 &IfxAsclin1_TX_P14_10_OUT,
293 &IfxAsclin1_TX_P15_0_OUT,
294 &IfxAsclin1_TX_P15_1_OUT,
295 &IfxAsclin1_TX_P15_4_OUT,
296 &IfxAsclin1_TX_P15_5_OUT,
297 &IfxAsclin1_TX_P20_10_OUT,
298 &IfxAsclin1_TX_P33_12_OUT,
299 &IfxAsclin1_TX_P33_13_OUT
300 },
301 {
302 &IfxAsclin2_TX_P02_0_OUT,
303 &IfxAsclin2_TX_P10_5_OUT,
304 &IfxAsclin2_TX_P14_2_OUT,
305 &IfxAsclin2_TX_P14_3_OUT,
306 &IfxAsclin2_TX_P33_8_OUT,
307 &IfxAsclin2_TX_P33_9_OUT,
308 NULL_PTR,
309 NULL_PTR,
310 NULL_PTR,
311 NULL_PTR
312 },
313 {
314 &IfxAsclin3_TX_P00_0_OUT,
315 &IfxAsclin3_TX_P00_1_OUT,
316 &IfxAsclin3_TX_P15_6_OUT,
317 &IfxAsclin3_TX_P15_7_OUT,
318 &IfxAsclin3_TX_P20_0_OUT,
319 &IfxAsclin3_TX_P20_3_OUT,
320 &IfxAsclin3_TX_P21_7_OUT,
321 &IfxAsclin3_TX_P32_2_OUT,
322 &IfxAsclin3_TX_P32_3_OUT,
323 NULL_PTR
324 }
325 };
IfxAsclin1_TX_P33_13_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
Definition: IfxAsclin_PinMap.c:103
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:39
IfxAsclin_Slso_Out_pinTable
const IfxAsclin_Slso_Out * IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:245
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin1_SCLK_P20_10_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
Definition: IfxAsclin_PinMap.c:62
IfxAsclin3_SLSO_P21_2_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
Definition: IfxAsclin_PinMap.c:87
IfxAsclin3_TX_P20_3_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
Definition: IfxAsclin_PinMap.c:115
Ifx_RxSel_e
Definition: Ifx_Types.h:116
IfxAsclin3_TX_P21_7_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
Definition: IfxAsclin_PinMap.c:116
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxAsclin2_SLSO_P33_6_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
Definition: IfxAsclin_PinMap.c:84
IfxAsclin1_TX_P20_10_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
Definition: IfxAsclin_PinMap.c:101
IfxAsclin2_TX_P14_3_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
Definition: IfxAsclin_PinMap.c:107
IfxAsclin_Rx_In_pinTable
const IfxAsclin_Rx_In * IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:159
IfxAsclin0_RXA_P14_1_IN
IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
Definition: IfxAsclin_PinMap.c:40
IfxAsclin1_RXB_P15_5_IN
IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
Definition: IfxAsclin_PinMap.c:43
IfxAsclin1_SCLK_P33_11_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
Definition: IfxAsclin_PinMap.c:63
IfxAsclin2_RXB_P02_1_IN
IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
Definition: IfxAsclin_PinMap.c:50
IfxAsclin1_TX_P15_4_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
Definition: IfxAsclin_PinMap.c:99
Ifx_RxSel_g
Definition: Ifx_Types.h:118
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:63
IfxAsclin1_CTSB_P32_4_IN
IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
Definition: IfxAsclin_PinMap.c:30
IfxAsclin1_TX_P02_2_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
Definition: IfxAsclin_PinMap.c:94
IfxAsclin3_TX_P00_0_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
Definition: IfxAsclin_PinMap.c:110
IfxAsclin1_SCLK_P15_0_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
Definition: IfxAsclin_PinMap.c:61
IfxAsclin2_RXG_P02_0_IN
IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
Definition: IfxAsclin_PinMap.c:53
IfxAsclin1_TX_P33_12_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
Definition: IfxAsclin_PinMap.c:102
IfxAsclin2_RXA_P14_3_IN
IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
Definition: IfxAsclin_PinMap.c:49
IfxAsclin2_CTSA_P10_7_IN
IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
Definition: IfxAsclin_PinMap.c:31
IfxAsclin1_TX_P15_1_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
Definition: IfxAsclin_PinMap.c:98
IfxAsclin1_RXG_P02_3_IN
IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
Definition: IfxAsclin_PinMap.c:48
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:71
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxAsclin1_RXE_P11_10_IN
IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
Definition: IfxAsclin_PinMap.c:46
IfxAsclin1_TX_P11_12_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
Definition: IfxAsclin_PinMap.c:95
IfxAsclin_Sclk_Out_pinTable
const IfxAsclin_Sclk_Out * IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:198
IfxAsclin1_RTS_P23_1_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
Definition: IfxAsclin_PinMap.c:36
IfxAsclin2_SCLK_P02_4_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
Definition: IfxAsclin_PinMap.c:65
IfxAsclin3_SCLK_P21_5_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
Definition: IfxAsclin_PinMap.c:75
IfxAsclin3_TX_P20_0_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
Definition: IfxAsclin_PinMap.c:114
IfxAsclin1_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:79
IfxAsclin0_TX_P14_0_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
Definition: IfxAsclin_PinMap.c:90
IfxAsclin0_CTSA_P14_9_IN
IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
Definition: IfxAsclin_PinMap.c:28
IfxAsclin1_SCLK_P33_12_OUT
IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
Definition: IfxAsclin_PinMap.c:64
IfxAsclin3_SCLK_P00_2_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
Definition: IfxAsclin_PinMap.c:71
IfxAsclin2_RTS_P10_8_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
Definition: IfxAsclin_PinMap.c:37
IfxAsclin_PinMap.h
ASCLIN I/O map.
IfxAsclin2_SLSO_P02_3_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
Definition: IfxAsclin_PinMap.c:82
IfxAsclin_Rts_Out_pinTable
const IfxAsclin_Rts_Out * IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:140
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:184
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxAsclin3_SCLK_P20_0_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
Definition: IfxAsclin_PinMap.c:74
IfxAsclin2_RXD_P10_6_IN
IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
Definition: IfxAsclin_PinMap.c:51
IfxAsclin2_TX_P33_8_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
Definition: IfxAsclin_PinMap.c:108
IfxAsclin3_SLSO_P21_6_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
Definition: IfxAsclin_PinMap.c:88
IfxAsclin2_RTS_P33_4_OUT
IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
Definition: IfxAsclin_PinMap.c:38
IfxAsclin3_RTS_P00_9_OUT
IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
Definition: IfxAsclin_PinMap.c:39
IfxAsclin1_TX_P15_0_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
Definition: IfxAsclin_PinMap.c:97
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxAsclin1_RTS_P20_6_OUT
IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
Definition: IfxAsclin_PinMap.c:35
IfxAsclin3_SCLK_P00_0_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
Definition: IfxAsclin_PinMap.c:70
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:105
IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:185
IfxAsclin2_SCLK_P33_7_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
Definition: IfxAsclin_PinMap.c:68
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin3_SCLK_P33_2_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
Definition: IfxAsclin_PinMap.c:78
IfxAsclin3_RXE_P00_1_IN
IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
Definition: IfxAsclin_PinMap.c:57
IfxAsclin3_RXC_P20_3_IN
IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
Definition: IfxAsclin_PinMap.c:55
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:55
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxAsclin2_SCLK_P14_2_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
Definition: IfxAsclin_PinMap.c:67
IfxAsclin1_SLSO_P20_8_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
Definition: IfxAsclin_PinMap.c:80
IfxAsclin1_RXF_P33_13_IN
IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
Definition: IfxAsclin_PinMap.c:47
IfxAsclin1_CTSA_P20_7_IN
IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
Definition: IfxAsclin_PinMap.c:29
IfxAsclin3_TX_P32_3_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
Definition: IfxAsclin_PinMap.c:118
IfxAsclin2_TX_P10_5_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
Definition: IfxAsclin_PinMap.c:105
IfxAsclin3_SLSO_P14_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
Definition: IfxAsclin_PinMap.c:86
IfxAsclin0_SCLK_P14_0_OUT
IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
Definition: IfxAsclin_PinMap.c:59
IfxAsclin1_RXD_P14_8_IN
IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
Definition: IfxAsclin_PinMap.c:45
IfxAsclin3_CTSA_P00_12_IN
IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
Definition: IfxAsclin_PinMap.c:33
IfxAsclin1_RXA_P15_1_IN
IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
Definition: IfxAsclin_PinMap.c:42
IfxAsclin1_TX_P14_10_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
Definition: IfxAsclin_PinMap.c:96
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IfxAsclin3_SLSO_P33_1_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
Definition: IfxAsclin_PinMap.c:89
IFXASCLIN_PINMAP_NUM_MODULES
#define IFXASCLIN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxAsclin_PinMap.h:179
IfxAsclin2_SCLK_P10_6_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
Definition: IfxAsclin_PinMap.c:66
IfxAsclin2_TX_P14_2_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
Definition: IfxAsclin_PinMap.c:106
IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:180
IfxAsclin3_TX_P32_2_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
Definition: IfxAsclin_PinMap.c:117
IfxAsclin2_CTSB_P33_5_IN
IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
Definition: IfxAsclin_PinMap.c:32
IfxAsclin0_RTS_P14_7_OUT
IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
Definition: IfxAsclin_PinMap.c:34
Ifx_RxSel_f
Definition: Ifx_Types.h:117
IfxAsclin2_SLSO_P10_5_OUT
IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
Definition: IfxAsclin_PinMap.c:83
IfxAsclin2_RXE_P33_8_IN
IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
Definition: IfxAsclin_PinMap.c:52
IfxAsclin3_RXD_P32_2_IN
IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
Definition: IfxAsclin_PinMap.c:56
IfxAsclin3_SCLK_P15_6_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
Definition: IfxAsclin_PinMap.c:72
IfxAsclin0_TX_P14_1_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
Definition: IfxAsclin_PinMap.c:91
IfxAsclin3_TX_P00_1_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
Definition: IfxAsclin_PinMap.c:111
IfxAsclin0_SCLK_P15_2_OUT
IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
Definition: IfxAsclin_PinMap.c:60
IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:183
IfxAsclin_Tx_Out_pinTable
const IfxAsclin_Tx_Out * IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:276
IfxAsclin3_SLSO_P00_3_OUT
IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
Definition: IfxAsclin_PinMap.c:85
IfxAsclin2_TX_P33_9_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
Definition: IfxAsclin_PinMap.c:109
IfxAsclin_Cts_In_pinTable
const IfxAsclin_Cts_In * IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
Definition: IfxAsclin_PinMap.c:121
IfxAsclin0_RXB_P15_3_IN
IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
Definition: IfxAsclin_PinMap.c:41
IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:181
IfxAsclin2_SCLK_P33_9_OUT
IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
Definition: IfxAsclin_PinMap.c:69
IfxAsclin3_SCLK_P15_8_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
Definition: IfxAsclin_PinMap.c:73
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxAsclin3_RXA_P15_7_IN
IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
Definition: IfxAsclin_PinMap.c:54
IfxAsclin2_TX_P02_0_OUT
IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
Definition: IfxAsclin_PinMap.c:104
IfxAsclin3_SCLK_P21_7_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
Definition: IfxAsclin_PinMap.c:76
IfxAsclin0_TX_P15_3_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
Definition: IfxAsclin_PinMap.c:93
IfxAsclin1_RXC_P20_9_IN
IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
Definition: IfxAsclin_PinMap.c:44
IfxAsclin3_SCLK_P32_3_OUT
IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
Definition: IfxAsclin_PinMap.c:77
IfxAsclin0_TX_P15_2_OUT
IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
Definition: IfxAsclin_PinMap.c:92
IfxAsclin1_SLSO_P33_10_OUT
IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
Definition: IfxAsclin_PinMap.c:81
IfxAsclin3_TX_P15_6_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
Definition: IfxAsclin_PinMap.c:112
IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:182
IfxAsclin1_TX_P15_5_OUT
IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
Definition: IfxAsclin_PinMap.c:100
IfxAsclin3_RXF_P21_6_IN
IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
Definition: IfxAsclin_PinMap.c:58
IfxAsclin3_TX_P15_7_OUT
IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
Definition: IfxAsclin_PinMap.c:113


iLLD_TC26B: IfxAsclin_PinMap.h Source File

  • _PinMap
IfxAsclin_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_PinMap.h
3 * \brief ASCLIN I/O map
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Asclin_pinmap ASCLIN Pin Mapping
25 * \ingroup IfxLld_Asclin
26 */
27
28 #ifndef IFXASCLIN_PINMAP_H
29 #define IFXASCLIN_PINMAP_H
30
31 #include <IfxAsclin_reg.h>
32 #include <_Impl/IfxAsclin_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Asclin_pinmap
36 * \{ */
37
38 /** \brief CTS pin mapping structure */
39 typedef const struct
40 {
41 Ifx_ASCLIN* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel select; /**< \brief Input multiplexer value */
44 } IfxAsclin_Cts_In;
45
46 /** \brief RX pin mapping structure */
47 typedef const struct
48 {
49 Ifx_ASCLIN* module; /**< \brief Base address */
50 IfxPort_Pin pin; /**< \brief Port pin */
51 Ifx_RxSel select; /**< \brief Input multiplexer value */
52 } IfxAsclin_Rx_In;
53
54 /** \brief RTS pin mapping structure */
55 typedef const struct
56 {
57 Ifx_ASCLIN* module; /**< \brief Base address */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 IfxPort_OutputIdx select; /**< \brief Port control code */
60 } IfxAsclin_Rts_Out;
61
62 /** \brief SCLK pin mapping structure */
63 typedef const struct
64 {
65 Ifx_ASCLIN* module; /**< \brief Base address */
66 IfxPort_Pin pin; /**< \brief Port pin */
67 IfxPort_OutputIdx select; /**< \brief Port control code */
68 } IfxAsclin_Sclk_Out;
69
70 /** \brief SLSO pin mapping structure */
71 typedef const struct
72 {
73 Ifx_ASCLIN* module; /**< \brief Base address */
74 IfxPort_Pin pin; /**< \brief Port pin */
75 IfxPort_OutputIdx select; /**< \brief Port control code */
76 } IfxAsclin_Slso_Out;
77
78 /** \brief TX pin mapping structure */
79 typedef const struct
80 {
81 Ifx_ASCLIN* module; /**< \brief Base address */
82 IfxPort_Pin pin; /**< \brief Port pin */
83 IfxPort_OutputIdx select; /**< \brief Port control code */
84 } IfxAsclin_Tx_Out;
85
86 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN; /**< \brief ASCLIN0_CTSA: ASCLIN0 input */
87 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN; /**< \brief ASCLIN1_CTSA: ASCLIN1 input */
88 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN; /**< \brief ASCLIN1_CTSB: ASCLIN1 input */
89 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN; /**< \brief ASCLIN2_CTSA: ASCLIN2 input */
90 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN; /**< \brief ASCLIN2_CTSB: ASCLIN2 input */
91 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN; /**< \brief ASCLIN3_CTSA: ASCLIN3 input */
92 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT; /**< \brief ASCLIN0_RTS: ASCLIN0 output */
93 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT; /**< \brief ASCLIN1_RTS: ASCLIN1 output */
94 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT; /**< \brief ASCLIN1_RTS: ASCLIN1 output */
95 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT; /**< \brief ASCLIN2_RTS: ASCLIN2 output */
96 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT; /**< \brief ASCLIN2_RTS: ASCLIN2 output */
97 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT; /**< \brief ASCLIN3_RTS: ASCLIN3 output */
98 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN; /**< \brief ASCLIN0_RXA: ASCLIN0 input */
99 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN; /**< \brief ASCLIN0_RXB: ASCLIN0 input */
100 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN; /**< \brief ASCLIN1_RXA: ASCLIN1 input */
101 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN; /**< \brief ASCLIN1_RXB: ASCLIN1 input */
102 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN; /**< \brief ASCLIN1_RXC: ASCLIN1 input */
103 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN; /**< \brief ASCLIN1_RXD: ASCLIN1 input */
104 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN; /**< \brief ASCLIN1_RXE: ASCLIN1 input */
105 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN; /**< \brief ASCLIN1_RXF: ASCLIN1 input */
106 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN; /**< \brief ASCLIN1_RXG: ASCLIN1 input */
107 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN; /**< \brief ASCLIN2_RXA: ASCLIN2 input */
108 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN; /**< \brief ASCLIN2_RXB: ASCLIN2 input */
109 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN; /**< \brief ASCLIN2_RXD: ASCLIN2 input */
110 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN; /**< \brief ASCLIN2_RXE: ASCLIN2 input */
111 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN; /**< \brief ASCLIN2_RXG: ASCLIN2 input */
112 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN; /**< \brief ASCLIN3_RXA: ASCLIN3 input */
113 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN; /**< \brief ASCLIN3_RXC: ASCLIN3 input */
114 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN; /**< \brief ASCLIN3_RXD: ASCLIN3 input */
115 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN; /**< \brief ASCLIN3_RXE: ASCLIN3 input */
116 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN; /**< \brief ASCLIN3_RXF: ASCLIN3 input */
117 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT; /**< \brief ASCLIN0_SCLK: ASCLIN0 output */
118 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT; /**< \brief ASCLIN0_SCLK: ASCLIN0 output */
119 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
120 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
121 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
122 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
123 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
124 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
125 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
126 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
127 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
128 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
129 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
130 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
131 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
132 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
133 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
134 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
135 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
136 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
137 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
138 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
139 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
140 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
141 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
142 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
143 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
144 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
145 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
146 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
147 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
148 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. */
149 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. */
150 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
151 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
152 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
153 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
154 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
155 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
156 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
157 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
158 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
159 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
160 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
161 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
162 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
163 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
164 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
165 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
166 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
167 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
168 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
169 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
170 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
171 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
172 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
173 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
174 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
175 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
176 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
177
178 /** \brief Table dimensions */
179 #define IFXASCLIN_PINMAP_NUM_MODULES 4
180 #define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
181 #define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
182 #define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7
183 #define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9
184 #define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5
185 #define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10
186
187
188 /** \brief IfxAsclin_Cts_In table */
189 IFX_EXTERN const IfxAsclin_Cts_In *IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS];
190
191 /** \brief IfxAsclin_Rts_Out table */
192 IFX_EXTERN const IfxAsclin_Rts_Out *IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS];
193
194 /** \brief IfxAsclin_Rx_In table */
195 IFX_EXTERN const IfxAsclin_Rx_In *IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS];
196
197 /** \brief IfxAsclin_Sclk_Out table */
198 IFX_EXTERN const IfxAsclin_Sclk_Out *IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS];
199
200 /** \brief IfxAsclin_Slso_Out table */
201 IFX_EXTERN const IfxAsclin_Slso_Out *IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS];
202
203 /** \brief IfxAsclin_Tx_Out table */
204 IFX_EXTERN const IfxAsclin_Tx_Out *IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS];
205
206 /** \} */
207
208 #endif /* IFXASCLIN_PINMAP_H */
IfxAsclin2_CTSB_P33_5_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN
ASCLIN2_CTSB: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:90
IfxAsclin_Cts_In
CTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:39
IfxAsclin0_SCLK_P14_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT
ASCLIN0_SCLK: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:117
IfxAsclin3_TX_P32_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:175
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin3_TX_P15_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:171
IfxAsclin3_TX_P15_6_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:170
IfxAsclin1_CTSB_P32_4_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN
ASCLIN1_CTSB: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:88
IfxAsclin2_RXA_P14_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN
ASCLIN2_RXA: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:107
IfxAsclin3_RXE_P00_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN
ASCLIN3_RXE: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:115
IfxAsclin0_SCLK_P15_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT
ASCLIN0_SCLK: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:118
IfxAsclin3_RXC_P20_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN
ASCLIN3_RXC: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:113
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:63
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxAsclin1_TX_P33_12_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:160
IfxAsclin0_RTS_P14_7_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT
ASCLIN0_RTS: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:92
IfxAsclin2_CTSA_P10_7_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN
ASCLIN2_CTSA: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:89
IfxAsclin3_SCLK_P21_5_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:133
IfxAsclin2_RTS_P33_4_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT
ASCLIN2_RTS: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:96
IfxAsclin1_SLSO_P14_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT
ASCLIN1_SLSO: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:137
IfxAsclin_Rx_In_pinTable
IFX_EXTERN const IfxAsclin_Rx_In * IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS]
IfxAsclin_Rx_In table.
Definition: IfxAsclin_PinMap.h:195
IfxAsclin0_RXB_P15_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN
ASCLIN0_RXB: ASCLIN0 input.
Definition: IfxAsclin_PinMap.h:99
IfxAsclin1_SLSO_P33_10_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT
ASCLIN1_SLSO: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:139
IfxAsclin_Cts_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxAsclin_PinMap.h:42
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:71
IfxAsclin_Rts_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxAsclin_PinMap.h:59
IfxAsclin1_TX_P14_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:154
IfxAsclin0_CTSA_P14_9_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN
ASCLIN0_CTSA: ASCLIN0 input.
Definition: IfxAsclin_PinMap.h:86
IfxAsclin1_RTS_P23_1_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT
ASCLIN1_RTS: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:94
IfxAsclin3_TX_P00_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:168
IfxAsclin3_SCLK_P32_3_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:135
IfxAsclin_Cts_In_pinTable
IFX_EXTERN const IfxAsclin_Cts_In * IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS]
IfxAsclin_Cts_In table.
Definition: IfxAsclin_PinMap.h:189
IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:184
IfxAsclin1_TX_P15_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:158
IfxAsclin2_SCLK_P33_7_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:126
IfxAsclin2_SLSO_P02_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT
ASCLIN2_SLSO: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:140
IfxAsclin_Cts_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxAsclin_PinMap.h:43
IfxAsclin1_TX_P15_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:155
IfxAsclin1_CTSA_P20_7_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN
ASCLIN1_CTSA: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:87
IfxAsclin1_TX_P02_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:152
IfxAsclin1_TX_P15_4_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:157
IfxAsclin2_SCLK_P14_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:125
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxAsclin2_SLSO_P10_5_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT
ASCLIN2_SLSO: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:141
IfxAsclin_Sclk_Out_pinTable
IFX_EXTERN const IfxAsclin_Sclk_Out * IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxAsclin_Sclk_Out table.
Definition: IfxAsclin_PinMap.h:198
IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:185
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin2_TX_P33_9_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:167
IfxAsclin0_TX_P14_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin.
Definition: IfxAsclin_PinMap.h:149
IfxAsclin2_RXB_P02_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN
ASCLIN2_RXB: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:108
IfxAsclin1_SCLK_P33_11_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT
ASCLIN1_SCLK: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:121
IfxAsclin2_TX_P10_5_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:163
IfxAsclin2_TX_P14_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:164
IfxAsclin1_TX_P33_13_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:161
IfxAsclin_Rts_Out
RTS pin mapping structure.
Definition: IfxAsclin_PinMap.h:55
IfxAsclin2_SCLK_P02_4_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:123
IfxAsclin3_SCLK_P20_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:132
IfxAsclin1_SCLK_P20_10_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT
ASCLIN1_SCLK: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:120
IfxAsclin1_TX_P11_12_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:153
IfxAsclin3_SCLK_P33_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:136
IfxAsclin_Cts_In::module
Ifx_ASCLIN * module
Base address.
Definition: IfxAsclin_PinMap.h:41
IfxAsclin2_TX_P33_8_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:166
IfxAsclin_Tx_Out_pinTable
IFX_EXTERN const IfxAsclin_Tx_Out * IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS]
IfxAsclin_Tx_Out table.
Definition: IfxAsclin_PinMap.h:204
IfxAsclin3_RXA_P15_7_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN
ASCLIN3_RXA: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:112
IfxAsclin3_SLSO_P21_2_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:145
IfxAsclin1_RXD_P14_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN
ASCLIN1_RXD: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:103
IfxAsclin3_SCLK_P00_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:128
IfxAsclin3_TX_P21_7_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:174
IfxAsclin3_SCLK_P15_6_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:130
IfxAsclin0_RXA_P14_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN
ASCLIN0_RXA: ASCLIN0 input.
Definition: IfxAsclin_PinMap.h:98
IfxAsclin2_RXE_P33_8_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN
ASCLIN2_RXE: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:110
IfxAsclin1_RXF_P33_13_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN
ASCLIN1_RXF: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:105
IfxAsclin2_SCLK_P10_6_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:124
IfxAsclin1_TX_P15_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:156
IfxAsclin3_TX_P20_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:172
IfxAsclin1_RXA_P15_1_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN
ASCLIN1_RXA: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:100
IfxAsclin1_RXB_P15_5_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN
ASCLIN1_RXB: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:101
IfxAsclin1_SLSO_P20_8_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT
ASCLIN1_SLSO: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:138
IFXASCLIN_PINMAP_NUM_MODULES
#define IFXASCLIN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxAsclin_PinMap.h:179
IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:180
IfxAsclin3_CTSA_P00_12_IN
IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN
ASCLIN3_CTSA: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:91
IfxAsclin0_TX_P15_2_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT
ASCLIN0_TX: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:150
IfxAsclin3_SLSO_P21_6_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:146
IfxAsclin3_RXF_P21_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN
ASCLIN3_RXF: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:116
IfxAsclin3_TX_P20_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:173
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxAsclin3_SCLK_P00_2_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:129
IfxAsclin1_RXE_P11_10_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN
ASCLIN1_RXE: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:104
IfxAsclin3_SCLK_P15_8_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:131
IfxAsclin_Rts_Out_pinTable
IFX_EXTERN const IfxAsclin_Rts_Out * IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS]
IfxAsclin_Rts_Out table.
Definition: IfxAsclin_PinMap.h:192
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxAsclin3_TX_P00_1_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:169
IfxAsclin2_TX_P02_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:162
IfxAsclin2_SLSO_P33_6_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT
ASCLIN2_SLSO: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:142
IfxAsclin1_RXC_P20_9_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN
ASCLIN1_RXC: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:102
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxAsclin3_SLSO_P33_1_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:147
IfxAsclin3_SLSO_P14_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:144
IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:183
IfxAsclin1_RTS_P20_6_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT
ASCLIN1_RTS: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:93
IfxAsclin2_TX_P14_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT
ASCLIN2_TX: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:165
IfxAsclin2_RTS_P10_8_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT
ASCLIN2_RTS: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:95
IfxAsclin3_SCLK_P21_7_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT
ASCLIN3_SCLK: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:134
IfxAsclin3_SLSO_P00_3_OUT
IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT
ASCLIN3_SLSO: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:143
IfxAsclin3_RXD_P32_2_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN
ASCLIN3_RXD: ASCLIN3 input.
Definition: IfxAsclin_PinMap.h:114
IfxAsclin0_TX_P15_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT
ASCLIN0_TX: ASCLIN0 output.
Definition: IfxAsclin_PinMap.h:151
IfxAsclin2_SCLK_P33_9_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT
ASCLIN2_SCLK: ASCLIN2 output.
Definition: IfxAsclin_PinMap.h:127
IfxAsclin3_TX_P32_3_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT
ASCLIN3_TX: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:176
IfxAsclin2_RXD_P10_6_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN
ASCLIN2_RXD: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:109
IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:181
IfxAsclin1_SCLK_P15_0_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT
ASCLIN1_SCLK: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:119
IfxAsclin3_RTS_P00_9_OUT
IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT
ASCLIN3_RTS: ASCLIN3 output.
Definition: IfxAsclin_PinMap.h:97
IfxAsclin0_TX_P14_0_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT
ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin.
Definition: IfxAsclin_PinMap.h:148
IfxAsclin1_SCLK_P33_12_OUT
IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT
ASCLIN1_SCLK: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:122
IfxAsclin1_RXG_P02_3_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN
ASCLIN1_RXG: ASCLIN1 input.
Definition: IfxAsclin_PinMap.h:106
IfxAsclin1_TX_P20_10_OUT
IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT
ASCLIN1_TX: ASCLIN1 output.
Definition: IfxAsclin_PinMap.h:159
IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxAsclin_PinMap.h:182
IfxPort.h
PORT basic functionality.
IfxAsclin_Slso_Out_pinTable
IFX_EXTERN const IfxAsclin_Slso_Out * IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxAsclin_Slso_Out table.
Definition: IfxAsclin_PinMap.h:201
IfxAsclin2_RXG_P02_0_IN
IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN
ASCLIN2_RXG: ASCLIN2 input.
Definition: IfxAsclin_PinMap.h:111


iLLD_TC26B: IfxAsclin_Spi.c Source File

  • Asclin
  • Spi
IfxAsclin_Spi.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Spi.c
3 * \brief ASCLIN SPI details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxAsclin_Spi.h"
30
31 /******************************************************************************/
32 /*-----------------------Private Function Prototypes--------------------------*/
33 /******************************************************************************/
34
35 /**
36 * \param asclin module handle
37 * \return status of the on going job
38 */
39 IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin);
40
41 /**
42 * \param asclin module handle
43 * \return None
44 */
45 IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin);
46
47 /******************************************************************************/
48 /*-------------------------Function Implementations---------------------------*/
49 /******************************************************************************/
50
51 void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
52 {
53 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
54 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
55 IfxScuWdt_clearCpuEndinit(psw); /* clearing the endinit protection*/
56 IfxAsclin_setDisableModuleRequest(asclinSFR); /* disabling the module */
57 IfxScuWdt_setCpuEndinit(psw); /* setting the endinit protection back on */
58 }
59
60
61 IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
62 {
63 IfxAsclin_Spi_Status status = IfxAsclin_Spi_lock(asclin); /* lock the driver until the communication is done */
64
65 if (status == IfxAsclin_Spi_Status_ok)
66 {
67 asclin->transferInProgress = 1; /* setting transfer in progress status */
68 asclin->txJob.data = src; /* data to be transmitted */
69 asclin->txJob.pending = count; /* count of Tx data */
70 asclin->rxJob.data = dest; /* empty buffer to receive data */
71 asclin->rxJob.pending = count; /* count of Rx data */
72
73 IfxAsclin_Spi_write(asclin); /* write data into Tx fifo */
74 }
75
76 return status;
77 }
78
79
80 IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
81 {
82 IfxAsclin_Spi_Status status = IfxAsclin_Spi_Status_ok;
83
84 if ((asclin->transferInProgress != 0) || (asclin->sending != 0))
85 {
86 status = IfxAsclin_Spi_Status_busy;
87 }
88
89 return status;
90 }
91
92
93 IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
94 {
95 Ifx_ASCLIN *asclinSFR = config->asclin; /* pointer to ASCLIN registers */
96 IfxAsclin_Status status = IfxAsclin_Status_noError;
97
98 asclin->asclin = asclinSFR; /* adding register pointer to module handler*/
99 IfxAsclin_enableModule(asclinSFR); /* enabling the module */
100
101 /* mode initialisation */
102 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock */
103 IfxAsclin_setFrameMode(asclinSFR, IfxAsclin_FrameMode_initialise); /* setting the module in Initialise mode */
104 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source */
105
106 /* spi mode initialisation */
107 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock */
108 IfxAsclin_setFrameMode(asclinSFR, config->frameMode); /* setting the module in Spi mode */
109 IfxAsclin_setPrescaler(asclinSFR, config->baudrate.prescaler); /* setting the prescaler*/
110 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source */
111
112 IfxAsclin_SamplePointPosition samplePointPosition = (IfxAsclin_SamplePointPosition)((config->baudrate.oversampling + 1) / 2); /* sample point position at half of oversampling factor */
113
114 /* baudrate generation */
115 status = (IfxAsclin_Status)IfxAsclin_setBitTiming(asclinSFR, config->baudrate.baudrate,
116 config->baudrate.oversampling,
117 samplePointPosition,
118 config->bitSampling.medianFilter); /* setting the baudrate bit fields to generate the required baudrate */
119
120 IfxAsclin_setClockSource(asclinSFR, IfxAsclin_ClockSource_noClock); /* disabling the clock again */
121
122 /* input output control initialisation */
123 IfxAsclin_setRxInput(asclinSFR, config->inputOutput.alti); /* selecting the Rx(alternate) input pin */
124 IfxAsclin_setClockPolarity(asclinSFR, config->inputOutput.cpol); /* setting the clock polarity */
125 IfxAsclin_setSlavePolarity(asclinSFR, config->inputOutput.spol); /* setting the slave polarity */
126 IfxAsclin_enableLoopBackMode(asclinSFR, config->inputOutput.loopBack); /* selecting loopbak (enable/disable) */
127
128 /* frame control initialisation */
129 IfxAsclin_setIdleDelay(asclinSFR, config->frame.idleDelay); /* setting idle delay */
130 IfxAsclin_setLeadDelay(asclinSFR, config->frame.leadDelay); /* setting lead delay */
131 IfxAsclin_setStopBit(asclinSFR, config->frame.stopBit); /* setting the stop bit (trail delay) */
132 IfxAsclin_setShiftDirection(asclinSFR, config->frame.shiftDir); /* setting the shift direction */
133
134 /* data control initialisation */
135 IfxAsclin_setDataLength(asclinSFR, config->dataLength); /* setting the number of bytes to be transfered */
136
137 /* fifo control initialisation */
138 /* set the FIFO widths based on the supplied datalength */
139 if (config->dataLength <= 8)
140 {
141 IfxAsclin_setTxFifoInletWidth(asclinSFR, IfxAsclin_TxFifoInletWidth_1); /* setting Tx FIFO inlet width to 1 byte */
142 IfxAsclin_setRxFifoOutletWidth(asclinSFR, IfxAsclin_RxFifoOutletWidth_1); /* setting Rx FIFO outlet width to 1 byte */
143 asclin->dataWidth = 1; /* echo the data width to module handle*/
144 }
145
146 else
147 {
148 IfxAsclin_setTxFifoInletWidth(asclinSFR, IfxAsclin_TxFifoInletWidth_2); /* setting Tx FIFO inlet width to 2 bytes */
149 IfxAsclin_setRxFifoOutletWidth(asclinSFR, IfxAsclin_RxFifoOutletWidth_2); /* setting Rx FIFO outlet width to 2 bytes */
150 asclin->dataWidth = 2; /* echo the data width to module handle*/
151 }
152
153 IfxAsclin_setRxBufferMode(asclinSFR, config->fifo.buffMode); /* setting Rx FIFO mode */
154 IfxAsclin_setTxFifoInterruptLevel(asclinSFR, config->fifo.txFifoInterruptLevel); /* setting Tx FIFO level at which a Tx interrupt will be triggered */
155 IfxAsclin_setRxFifoInterruptLevel(asclinSFR, config->fifo.rxFifoInterruptLevel); /* setting Rx FIFO interrupt level at which a Rx interrupt will be triggered */
156 IfxAsclin_flushRxFifo(asclinSFR); /* flushing Rx FIFO */
157 IfxAsclin_flushTxFifo(asclinSFR); /* flushing Tx FIFO */
158
159 IfxAsclin_disableAllFlags(asclinSFR); /* disable all flags */
160 IfxAsclin_clearAllFlags(asclinSFR); /* clear all flags */
161
162 /* initialising the interrupts */
163 IfxSrc_Tos tos = config->interrupt.typeOfService;
164
165 if ((config->interrupt.rxPriority > 0) || (tos == IfxSrc_Tos_dma))
166 {
167 volatile Ifx_SRC_SRCR *src;
168 src = IfxAsclin_getSrcPointerRx(asclinSFR);
169 IfxSrc_init(src, tos, config->interrupt.rxPriority);
170 IfxAsclin_enableRxFifoFillLevelFlag(asclinSFR, TRUE);
171 IfxSrc_enable(src);
172 }
173
174 if ((config->interrupt.txPriority > 0) || (tos == IfxSrc_Tos_dma))
175 {
176 volatile Ifx_SRC_SRCR *src;
177 src = IfxAsclin_getSrcPointerTx(asclinSFR);
178 IfxSrc_init(src, tos, config->interrupt.txPriority);
179 IfxAsclin_enableTxFifoFillLevelFlag(asclinSFR, TRUE);
180 IfxSrc_enable(src);
181 }
182
183 if (config->interrupt.erPriority > 0) /*These interrupts are not serviced by dma*/
184 {
185 volatile Ifx_SRC_SRCR *src;
186 src = IfxAsclin_getSrcPointerEr(asclinSFR);
187 IfxSrc_init(src, tos, config->interrupt.erPriority);
188 IfxAsclin_enableFrameErrorFlag(asclinSFR, TRUE);
189 IfxSrc_enable(src);
190 }
191
192 /* Pin mapping */
193 const IfxAsclin_Spi_Pins *pins = config->pins;
194
195 if (pins != NULL_PTR)
196 {
197 IfxAsclin_Sclk_Out *sclk = pins->sclk;
198
199 if (sclk != NULL_PTR)
200 {
201 IfxAsclin_initSclkPin(sclk, pins->sclkMode, pins->pinDriver);
202 }
203
204 IfxAsclin_Rx_In *rx = pins->rx;
205
206 if (rx != NULL_PTR)
207 {
208 IfxAsclin_initRxPin(rx, pins->rxMode, pins->pinDriver);
209 }
210
211 IfxAsclin_Tx_Out *tx = pins->tx;
212
213 if (tx != NULL_PTR)
214 {
215 IfxAsclin_initTxPin(tx, pins->txMode, pins->pinDriver);
216 }
217
218 IfxAsclin_Slso_Out *slso = pins->slso;
219
220 if (slso != NULL_PTR)
221 {
222 IfxAsclin_initSlsoPin(slso, pins->slsoMode, pins->pinDriver);
223 }
224 }
225
226 IfxAsclin_enableParity(asclinSFR, FALSE); /* no parity */
227
228 IfxAsclin_setClockSource(asclinSFR, config->clockSource); /* setting the clock source*/
229
230 asclin->sending = 0;
231 IfxAsclin_enableTxFifoOutlet(asclinSFR, TRUE); /* disabling Rx FIFO for recieving */
232 IfxAsclin_enableRxFifoInlet(asclinSFR, TRUE); /* disabling Tx FIFO for transmitting */
233
234 return status;
235 }
236
237
238 void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
239 {
240 const IfxAsclin_Spi_Config defaultConfig = {
241 .asclin = NULL_PTR, /* will be initialized below */
242
243 .frameMode = IfxAsclin_FrameMode_spi, /* SPI mode */
244 .clockSource = IfxAsclin_ClockSource_kernelClock, /* kernel clock, fclc*/
245
246 /* Default values for input output control */
247 .inputOutput = {
248 .alti = IfxAsclin_RxInputSelect_0, /* alternate input 0; */
249 .cpol = IfxAsclin_ClockPolarity_idleLow, /* CPOL active low */
250 .spol = IfxAsclin_SlavePolarity_idlehigh, /* SPOL active high */
251 .loopBack = FALSE, /* no loop back */
252 },
253
254 /* Default values for baudrate */
255 .baudrate = {
256 .baudrate = 100000.0, /* default baudrate (the fractional dividier setup will be calculated in initModule) */
257 .prescaler = 2, /* default prescaler */
258 .oversampling = IfxAsclin_OversamplingFactor_8, /* default oversampling factor */
259 },
260
261 /* Default Values for Bit sampling */
262 .bitSampling = {
263 .medianFilter = IfxAsclin_SamplesPerBit_one, /* one sample per bit */
264 },
265
266 /* Default Values for Frame Control */
267 .frame = {
268 .idleDelay = IfxAsclin_IdleDelay_0, /* no idle delay */
269 .leadDelay = IfxAsclin_LeadDelay_1, /* one lead bit */
270 .stopBit = IfxAsclin_StopBit_1, /* one stop bit (trail delay) */
271 .shiftDir = IfxAsclin_ShiftDirection_lsbFirst, /* shift direction LSB first */
272 },
273
274 /* Default Values for Data Control*/
275 .dataLength = IfxAsclin_DataLength_8, /* number of bits per transfer 8*/
276
277 /* Default Values for fifo Control */
278 .fifo = {
279 .outWidth = IfxAsclin_RxFifoOutletWidth_1, /* 8-bit wide read */
280 .inWidth = IfxAsclin_TxFifoInletWidth_1, /*8-bit wide write */
281 .buffMode = IfxAsclin_ReceiveBufferMode_rxFifo, /* RxFIFO */
282 .txFifoInterruptLevel = IfxAsclin_TxFifoInterruptLevel_15, /* Tx FIFO interrupt level */
283 .rxFifoInterruptLevel = IfxAsclin_RxFifoInterruptLevel_1, /* Rx FIFO interrupt level */
284 },
285
286 /* Default Values for Interrupt Config */
287 .interrupt = {
288 .rxPriority = 0, /* receive interrupt priority 0 */
289 .txPriority = 0, /* transmit interrupt priority 0 */
290 .erPriority = 0, /* error interrupt priority 0 */
291 .typeOfService = IfxSrc_Tos_cpu0, /* type of service CPU0 */
292 },
293
294 .pins = NULL_PTR, /* pins to null pointer */
295 };
296
297 /* Default Configuration */
298 *config = defaultConfig;
299 /* take over module pointer */
300 config->asclin = asclin;
301 }
302
303
304 void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
305 {
306 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
307
308 /* store all the flags in the variable */
309 if (IfxAsclin_getFrameErrorFlagStatus(asclinSFR))
310 {
311 IfxAsclin_clearFrameErrorFlag(asclinSFR);
312 asclin->errorFlags.frameError = 1;
313 }
314
315 if (IfxAsclin_getRxFifoOverflowFlagStatus(asclinSFR))
316 {
317 IfxAsclin_clearRxFifoOverflowFlag(asclinSFR);
318 asclin->errorFlags.rxFifoOverflow = 1;
319 }
320
321 if (IfxAsclin_getRxFifoUnderflowFlagStatus(asclinSFR))
322 {
323 IfxAsclin_clearRxFifoUnderflowFlag(asclinSFR);
324 asclin->errorFlags.rxFifoUnderflow = 1;
325 }
326
327 if (IfxAsclin_getTxFifoOverflowFlagStatus(asclinSFR))
328 {
329 IfxAsclin_clearTxFifoOverflowFlag(asclinSFR);
330 asclin->errorFlags.txFifoOverflow = 1;
331 }
332 }
333
334
335 void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
336 {
337 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler*/
338 IfxAsclin_clearRxFifoFillLevelFlag(asclinSFR); /* clear the interrupt flag */
339 IfxAsclin_Spi_read(asclin); /* read the remaining data */
340 }
341
342
343 void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
344 {
345 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
346 IfxAsclin_clearTxFifoFillLevelFlag(asclinSFR); /* clear the interrupt flag */
347 IfxAsclin_Spi_write(asclin); /* write the remaining data */
348 }
349
350
351 IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin)
352 {
353 sint32 sending = __swap((void *)&asclin->sending, 1UL);
354 return (sending == 0) ? IfxAsclin_Spi_Status_ok : IfxAsclin_Spi_Status_busy;
355 }
356
357
358 void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
359 {
360 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
361 IfxAsclin_Spi_Job *job = &asclin->rxJob; /* getting the rxJob structure from module handler */
362
363 uint32 count = (uint32)IfxAsclin_getRxFifoFillLevel(asclinSFR); /* get the readable count of Rx fifo */
364 count = __min(job->pending, count); /* check for the end of the data */
365
366 if (job->data == NULL_PTR) /* incase of no data to be received (only transmit case) */
367 {
368 uint32 i;
369 job->pending = job->pending - count; /* discount the current reading count from job pending */
370
371 for (i = 0; i < count; i++)
372 {
373 IfxAsclin_readRxData(asclinSFR); /* do dummy reads */
374 }
375 }
376 else if (job->pending > 0)
377 {
378 job->pending = job->pending - count; /* discount the current reading count from job pending */
379
380 /* read data up to the count based on the out width */
381 switch (asclin->dataWidth)
382 {
383 case 1: /* in case of 8 bit wide */
384 IfxAsclin_read8(asclinSFR, job->data, count); /* reading from Rx FIFO */
385 job->data = &(((uint8 *)job->data)[count]); /* pointing to the remaining data */
386 break;
387
388 case 2: /* in case of 16 bit wide*/
389 IfxAsclin_read16(asclinSFR, job->data, count); /* reading from Rx FIFO */
390 job->data = &(((uint16 *)job->data)[count]); /* pointing to the remaining data */
391 break;
392 }
393 }
394
395 if (job->pending == 0)
396 {
397 asclin->transferInProgress = 0; /* clearing the transfer in progress status */
398 IfxAsclin_Spi_unlock(asclin); /* unlock the driver */
399 }
400 }
401
402
403 IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin)
404 {
405 asclin->sending = 0UL;
406 }
407
408
409 void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
410 {
411 Ifx_ASCLIN *asclinSFR = asclin->asclin; /* getting the pointer to ASCLIN registers from module handler */
412 IfxAsclin_Spi_Job *job = &asclin->txJob; /* getting the txJob structure from module handler */
413
414 if (job->pending)
415 {
416 boolean interruptState = IfxCpu_disableInterrupts();
417
418 uint32 count = (uint32)(16 - IfxAsclin_getTxFifoFillLevel(asclinSFR)); /* getting the fillable count of the Tx Fifo */
419 count = __min(job->pending, count); /* checking for the end of the data */
420
421 if (job->data == NULL_PTR) /* incase of no data to be transmitted (only receive case) */
422 {
423 uint32 i;
424 job->pending = job->pending - count; /* discount the current filling count from job pending */
425
426 for (i = 0; i < count; i++)
427 {
428 IfxAsclin_writeTxData(asclinSFR, ~0); /* write all 1's */
429 }
430 }
431 else
432 {
433 job->pending = job->pending - count; /* discount the current filling count from job pending */
434
435 /* write data up to the count based on the in width */
436 switch (asclin->dataWidth)
437 {
438 case 1: /* in case of 8 bit wide */
439 IfxAsclin_write8(asclinSFR, job->data, count); /* writing to Tx FIFO */
440 job->data = &(((uint8 *)job->data)[count]); /* pointing to the remaining data */
441 break;
442
443 case 2: /* in case of 16 bit wide*/
444 IfxAsclin_write16(asclinSFR, job->data, count); /* writing to Tx FIFO */
445 job->data = &(((uint16 *)job->data)[count]); /* pointing to the remaining data */
446 break;
447 }
448 }
449
450 IfxCpu_restoreInterrupts(interruptState);
451 }
452 }
IfxAsclin_Spi_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Spi.h:266
IfxAsclin_TxFifoInterruptLevel_15
TX FIFO level 15.
Definition: IfxAsclin.h:424
IfxAsclin_Spi_Pins::sclkMode
IfxPort_OutputMode sclkMode
sclk as output
Definition: IfxAsclin_Spi.h:305
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin_ClockPolarity_idleLow
idle low
Definition: IfxAsclin.h:83
IfxAsclin_Spi_exchange
IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange
Definition: IfxAsclin_Spi.c:61
IfxAsclin_IdleDelay_0
idle delay in 0 bit times
Definition: IfxAsclin.h:161
IfxAsclin_Spi_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Spi.h:238
IfxAsclin_Spi_Status
IfxAsclin_Spi_Status
Enumeration for job status.
Definition: IfxAsclin_Spi.h:212
IfxAsclin_Spi_isrReceive
void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
ISR receive routine.
Definition: IfxAsclin_Spi.c:335
IfxAsclin_Spi_Pins::sclk
IFX_CONST IfxAsclin_Sclk_Out * sclk
SPI clock select pin.
Definition: IfxAsclin_Spi.h:304
IfxAsclin_setIdleDelay
IFX_INLINE void IfxAsclin_setIdleDelay(Ifx_ASCLIN *asclin, IfxAsclin_IdleDelay delay)
Sets the idle delay.
Definition: IfxAsclin.h:2245
IfxAsclin_ReceiveBufferMode_rxFifo
RxFIFO mode.
Definition: IfxAsclin.h:239
IfxAsclin_Spi_Job
Structure for data transfer jobs.
Definition: IfxAsclin_Spi.h:294
IfxAsclin_initSlsoPin
IFX_INLINE void IfxAsclin_initSlsoPin(const IfxAsclin_Slso_Out *slso, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxAsclin.h:2135
IfxAsclin_ShiftDirection_lsbFirst
LSB first.
Definition: IfxAsclin.h:338
IfxAsclin_Spi_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Spi.h:267
IfxAsclin_Spi_InputOutputControl::cpol
IfxAsclin_ClockPolarity cpol
IOCR.CPOL clock polarity selection.
Definition: IfxAsclin_Spi.h:277
IfxAsclin_getSrcPointerEr
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerEr(Ifx_ASCLIN *asclin)
Returns the SRC pointer for ERR.
Definition: IfxAsclin.c:149
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:63
IfxAsclin_Spi_Job::data
void * data
pointer to user data
Definition: IfxAsclin_Spi.h:296
IfxAsclin_getRxFifoUnderflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoUnderflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO underflow flag status.
Definition: IfxAsclin.h:2032
IfxAsclin_Spi
Module handle.
Definition: IfxAsclin_Spi.h:321
IfxAsclin_clearTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearTxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO level flag.
Definition: IfxAsclin.h:1690
IfxAsclin_Spi_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Spi.h:309
IfxAsclin_Spi_InputOutputControl::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Spi.h:279
IfxAsclin_getTxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getTxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Tx FIFO overflow flag status.
Definition: IfxAsclin.h:2080
IfxAsclin_enableModule
void IfxAsclin_enableModule(Ifx_ASCLIN *asclin)
Enables the module.
Definition: IfxAsclin.c:51
IfxAsclin_Spi::txJob
IfxAsclin_Spi_Job txJob
structure for Tx job
Definition: IfxAsclin_Spi.h:324
IfxAsclin_flushTxFifo
IFX_INLINE void IfxAsclin_flushTxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Tx FIFO.
Definition: IfxAsclin.h:1900
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxAsclin_Spi_Config::baudrate
IfxAsclin_Spi_Baudrate baudrate
structure for baudrate
Definition: IfxAsclin_Spi.h:339
IfxAsclin_Spi_Config::frame
IfxAsclin_Spi_FrameControl frame
structure for frame control
Definition: IfxAsclin_Spi.h:341
IfxAsclin_RxFifoInterruptLevel_1
RX FIFO level 1.
Definition: IfxAsclin.h:257
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:71
IfxAsclin_initRxPin
IFX_INLINE void IfxAsclin_initRxPin(const IfxAsclin_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxAsclin.h:2117
IfxAsclin_Spi_Status_ok
Definition: IfxAsclin_Spi.h:214
IfxAsclin_Spi_unlock
IFX_STATIC void IfxAsclin_Spi_unlock(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:403
IfxAsclin_clearAllFlags
IFX_INLINE void IfxAsclin_clearAllFlags(Ifx_ASCLIN *asclin)
clears all the flags
Definition: IfxAsclin.h:1576
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxAsclin_Spi_Baudrate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Spi.h:229
IfxAsclin_Spi_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
SPI Tx pin.
Definition: IfxAsclin_Spi.h:308
IfxAsclin_Spi_Pins
Structure for SPI pin configuration.
Definition: IfxAsclin_Spi.h:302
IfxAsclin_Spi_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Spi.h:312
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxAsclin_Spi_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Spi.h:246
IfxAsclin_clearRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_clearRxFifoFillLevelFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO level flag.
Definition: IfxAsclin.h:1654
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
IfxAsclin_Spi_disableModule
void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
Disables the module.
Definition: IfxAsclin_Spi.c:51
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxAsclin_Spi_isrError
void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
ISR error routine.
Definition: IfxAsclin_Spi.c:304
IfxAsclin_clearRxFifoUnderflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoUnderflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO underflow flag.
Definition: IfxAsclin.h:1666
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxAsclin_Spi_Baudrate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Spi.h:231
IfxAsclin_enableRxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableRxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Rx FIFO level flag.
Definition: IfxAsclin.h:1822
IfxAsclin_setBitTiming
boolean IfxAsclin_setBitTiming(Ifx_ASCLIN *asclin, float32 baudrate, IfxAsclin_OversamplingFactor oversampling, IfxAsclin_SamplePointPosition samplepoint, IfxAsclin_SamplesPerBit medianFilter)
Set the bit timing.
Definition: IfxAsclin.c:240
IfxAsclin_setRxFifoOutletWidth
IFX_INLINE void IfxAsclin_setRxFifoOutletWidth(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoOutletWidth width)
Sets the receive FIFO outlet width.
Definition: IfxAsclin.h:2341
IfxAsclin_Spi_initModule
IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module.
Definition: IfxAsclin_Spi.c:93
IfxAsclin_Spi_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
SPI Rx pin.
Definition: IfxAsclin_Spi.h:306
IfxAsclin_Spi_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Spi.h:346
IfxAsclin_SlavePolarity_idlehigh
idle high
Definition: IfxAsclin.h:349
IfxAsclin_getSrcPointerTx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerTx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Tx.
Definition: IfxAsclin.c:161
IfxAsclin_setClockPolarity
IFX_INLINE void IfxAsclin_setClockPolarity(Ifx_ASCLIN *asclin, IfxAsclin_ClockPolarity cpol)
Selects the clock polarity.
Definition: IfxAsclin.h:2191
IfxAsclin_Spi_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Spi.h:248
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxAsclin_setRxBufferMode
IFX_INLINE void IfxAsclin_setRxBufferMode(Ifx_ASCLIN *asclin, IfxAsclin_ReceiveBufferMode mode)
Sets the receive buffer mode.
Definition: IfxAsclin.h:2329
IfxAsclin_Status_noError
No error.
Definition: IfxAsclin.h:366
IfxAsclin_Spi_initModuleConfig
void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values.
Definition: IfxAsclin_Spi.c:238
IfxAsclin_RxFifoOutletWidth_1
number of bytes 1
Definition: IfxAsclin.h:281
IfxAsclin_Spi_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Spi.h:288
IfxAsclin_Spi_Status_busy
Definition: IfxAsclin_Spi.h:215
IfxAsclin_enableFrameErrorFlag
IFX_INLINE void IfxAsclin_enableFrameErrorFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables frame error flag.
Definition: IfxAsclin.h:1756
IfxAsclin_clearRxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearRxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Rx FIFO overflow flag.
Definition: IfxAsclin.h:1660
IfxAsclin_setRxInput
IFX_INLINE void IfxAsclin_setRxInput(Ifx_ASCLIN *asclin, IfxAsclin_RxInputSelect alti)
Selects the alternate input for Rx signal.
Definition: IfxAsclin.h:2347
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin_setRxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setRxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_RxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2335
IfxAsclin_Spi_Config::inputOutput
IfxAsclin_Spi_InputOutputControl inputOutput
structure for input output control
Definition: IfxAsclin_Spi.h:338
IfxAsclin_Spi_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Spi.h:245
IfxAsclin_Spi::rxJob
IfxAsclin_Spi_Job rxJob
structure for Rx job
Definition: IfxAsclin_Spi.h:325
IfxAsclin_Spi_Config::bitSampling
IfxAsclin_Spi_BitSamplingControl bitSampling
structure for bit sampling
Definition: IfxAsclin_Spi.h:340
IfxAsclin_clearFrameErrorFlag
IFX_INLINE void IfxAsclin_clearFrameErrorFlag(Ifx_ASCLIN *asclin)
Clears the frame error flag.
Definition: IfxAsclin.h:1600
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2068
IfxAsclin_Spi_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Spi.h:247
IfxAsclin_Spi_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Spi.h:289
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxAsclin_setLeadDelay
IFX_INLINE void IfxAsclin_setLeadDelay(Ifx_ASCLIN *asclin, IfxAsclin_LeadDelay delay)
Sets the lead delay.
Definition: IfxAsclin.h:2263
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
IfxAsclin_setPrescaler
IFX_INLINE void IfxAsclin_setPrescaler(Ifx_ASCLIN *asclin, uint16 prescaler)
Sets the division ratio of the predivider (prescaler)
Definition: IfxAsclin.h:2317
IfxAsclin_Spi_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Spi.h:259
IfxAsclin_TxFifoInletWidth_2
number of bytes 2
Definition: IfxAsclin.h:400
IfxAsclin_Spi_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Spi.h:286
IfxAsclin_getTxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getTxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2062
IfxAsclin_SamplePointPosition
IfxAsclin_SamplePointPosition
Sample point position Definition in Ifx_ASCLIN.BITCON.B.SAMPLEPOINT.
Definition: IfxAsclin.h:304
IfxAsclin_Spi.h
ASCLIN SPI details.
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxAsclin_Spi_Config::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Spi.h:342
IfxAsclin_getSrcPointerRx
volatile Ifx_SRC_SRCR * IfxAsclin_getSrcPointerRx(Ifx_ASCLIN *asclin)
Returns the SRC pointer for Rx.
Definition: IfxAsclin.c:155
IfxAsclin_flushRxFifo
IFX_INLINE void IfxAsclin_flushRxFifo(Ifx_ASCLIN *asclin)
Flushes (empties) the Rx FIFO.
Definition: IfxAsclin.h:1894
IfxAsclin_Spi_InputOutputControl::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Spi.h:276
IfxAsclin_initSclkPin
IFX_INLINE void IfxAsclin_initSclkPin(const IfxAsclin_Sclk_Out *sclk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxAsclin.h:2128
IfxAsclin_read8
uint32 IfxAsclin_read8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Reads data up to 8 bits.
Definition: IfxAsclin.c:195
IfxAsclin_Spi::transferInProgress
boolean transferInProgress
status of the transfer In progress
Definition: IfxAsclin_Spi.h:329
IfxAsclin_readRxData
IFX_INLINE uint32 IfxAsclin_readRxData(Ifx_ASCLIN *asclin)
Definition: IfxAsclin.h:2161
IfxAsclin_Spi::errorFlags
IfxAsclin_Spi_ErrorFlags errorFlags
structure for error flags status
Definition: IfxAsclin_Spi.h:327
IfxAsclin_enableParity
IFX_INLINE void IfxAsclin_enableParity(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the parity bit attachment to tha data bits.
Definition: IfxAsclin.h:1798
IfxAsclin_Spi_write
void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width.
Definition: IfxAsclin_Spi.c:409
IfxAsclin_Spi_lock
IFX_STATIC IfxAsclin_Spi_Status IfxAsclin_Spi_lock(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:351
IfxAsclin_getRxFifoFillLevel
IFX_INLINE uint8 IfxAsclin_getRxFifoFillLevel(Ifx_ASCLIN *asclin)
Returns the current filling level of Tx FIFO.
Definition: IfxAsclin.h:2008
IfxAsclin_disableAllFlags
IFX_INLINE void IfxAsclin_disableAllFlags(Ifx_ASCLIN *asclin)
disables all flags
Definition: IfxAsclin.h:1714
IfxAsclin_Spi_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:258
IfxAsclin_initTxPin
IFX_INLINE void IfxAsclin_initTxPin(const IfxAsclin_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxAsclin.h:2142
IfxAsclin_write16
uint32 IfxAsclin_write16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Writes data up to 16 bits.
Definition: IfxAsclin.c:357
IfxAsclin_setTxFifoInletWidth
IFX_INLINE void IfxAsclin_setTxFifoInletWidth(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInletWidth width)
Sets the transmit FIFO inlet width.
Definition: IfxAsclin.h:2421
IfxAsclin_Spi_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Spi.h:287
IfxAsclin_Spi_Config::fifo
IfxAsclin_Spi_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Spi.h:343
IfxAsclin_write8
uint32 IfxAsclin_write8(Ifx_ASCLIN *asclin, uint8 *data, uint32 count)
Writes data up to 8 bits.
Definition: IfxAsclin.c:385
IfxAsclin_setSlavePolarity
IFX_INLINE void IfxAsclin_setSlavePolarity(Ifx_ASCLIN *asclin, IfxAsclin_SlavePolarity spol)
Selects the slave polarity.
Definition: IfxAsclin.h:2371
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxAsclin_Spi_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:256
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxAsclin_enableLoopBackMode
IFX_INLINE void IfxAsclin_enableLoopBackMode(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the loop back mode.
Definition: IfxAsclin.h:1792
IfxAsclin_enableTxFifoOutlet
IFX_INLINE void IfxAsclin_enableTxFifoOutlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the transmit FIFO outlet to allow transmission.
Definition: IfxAsclin.h:1870
IfxAsclin_RxFifoOutletWidth_2
number of bytes 2
Definition: IfxAsclin.h:282
IfxAsclin_setFrameMode
IFX_INLINE void IfxAsclin_setFrameMode(Ifx_ASCLIN *asclin, IfxAsclin_FrameMode mode)
Selects the module&#39;s mode of operation.
Definition: IfxAsclin.h:2233
IfxAsclin_getRxFifoOverflowFlagStatus
IFX_INLINE boolean IfxAsclin_getRxFifoOverflowFlagStatus(Ifx_ASCLIN *asclin)
Returns the Rx FIFO overflow flag status.
Definition: IfxAsclin.h:2026
IfxAsclin_FrameMode_spi
spi mode
Definition: IfxAsclin.h:141
IfxAsclin_Spi_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Spi.h:307
IfxAsclin_StopBit_1
number of stop bits 1
Definition: IfxAsclin.h:375
IfxAsclin_Spi_Pins::slsoMode
IfxPort_OutputMode slsoMode
slso as output
Definition: IfxAsclin_Spi.h:311
IfxAsclin_ClockSource_kernelClock
f clc will be supplied
Definition: IfxAsclin.h:93
IfxAsclin_RxInputSelect_0
alternate input selection 0
Definition: IfxAsclin.h:291
sint32
long sint32
Definition: Platform_Types.h:131
IfxAsclin_LeadDelay_1
lead delay in 1 bit times
Definition: IfxAsclin.h:178
IfxAsclin_Spi_Config::pins
IFX_CONST IfxAsclin_Spi_Pins * pins
structure for SPI pins
Definition: IfxAsclin_Spi.h:345
IfxAsclin_enableRxFifoInlet
IFX_INLINE void IfxAsclin_enableRxFifoInlet(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables the receive FIFO outlet to allow filling of Rx FIFO through shift register...
Definition: IfxAsclin.h:1828
IfxAsclin_Spi_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Spi.h:268
IfxAsclin_writeTxData
IFX_INLINE void IfxAsclin_writeTxData(Ifx_ASCLIN *asclin, uint32 data)
Definition: IfxAsclin.h:2433
IfxAsclin_ClockSource_noClock
no clock will be supplied
Definition: IfxAsclin.h:92
IfxAsclin_Spi_Baudrate::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Spi.h:230
IfxAsclin_Spi_Config
Configuration structure of the module.
Definition: IfxAsclin_Spi.h:334
IfxAsclin_Spi_InputOutputControl::spol
IfxAsclin_SlavePolarity spol
IOCR.SPOL slave polarity selection.
Definition: IfxAsclin_Spi.h:278
IfxAsclin_Spi_Config::interrupt
IfxAsclin_Spi_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Spi.h:344
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxAsclin_Spi_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Spi.h:269
IfxAsclin_TxFifoInletWidth_1
number of bytes 1
Definition: IfxAsclin.h:399
IfxAsclin_read16
uint32 IfxAsclin_read16(Ifx_ASCLIN *asclin, uint16 *data, uint32 count)
Reads data up to 16 bits.
Definition: IfxAsclin.c:167
IfxAsclin_Spi_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Spi.h:337
IfxAsclin_Spi_isrTransmit
void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
ISR transmit routine.
Definition: IfxAsclin_Spi.c:343
IfxAsclin_FrameMode_initialise
initialise mode
Definition: IfxAsclin.h:139
IfxAsclin_DataLength_8
number of bits per transfer 7
Definition: IfxAsclin.h:123
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxAsclin_SamplesPerBit_one
one sample per bit
Definition: IfxAsclin.h:328
IfxAsclin_Spi_read
void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width.
Definition: IfxAsclin_Spi.c:358
IfxAsclin_Spi_getStatus
IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:80
IfxAsclin_Spi::sending
uint32 sending
sending in progress status
Definition: IfxAsclin_Spi.h:326
IfxAsclin_setStopBit
IFX_INLINE void IfxAsclin_setStopBit(Ifx_ASCLIN *asclin, IfxAsclin_StopBit stopBit)
Sets the number of stop bits.
Definition: IfxAsclin.h:2386
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxAsclin_setShiftDirection
IFX_INLINE void IfxAsclin_setShiftDirection(Ifx_ASCLIN *asclin, IfxAsclin_ShiftDirection dir)
Sets the shift direction.
Definition: IfxAsclin.h:2365
IfxAsclin_OversamplingFactor_8
oversampling factor 8
Definition: IfxAsclin.h:214
IfxAsclin_getFrameErrorFlagStatus
IFX_INLINE boolean IfxAsclin_getFrameErrorFlagStatus(Ifx_ASCLIN *asclin)
Returns the frame error flag status.
Definition: IfxAsclin.h:1936
IfxAsclin_setDisableModuleRequest
IFX_INLINE void IfxAsclin_setDisableModuleRequest(Ifx_ASCLIN *asclin)
Sets the disable module request.
Definition: IfxAsclin.h:2215
IfxAsclin_Spi::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Spi.h:323
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxAsclin_enableTxFifoFillLevelFlag
IFX_INLINE void IfxAsclin_enableTxFifoFillLevelFlag(Ifx_ASCLIN *asclin, boolean enable)
Enables/disables Tx FIFO level flag.
Definition: IfxAsclin.h:1864
IfxAsclin_Spi::dataWidth
uint8 dataWidth
width of the data in bytes
Definition: IfxAsclin_Spi.h:328
IfxAsclin_clearTxFifoOverflowFlag
IFX_INLINE void IfxAsclin_clearTxFifoOverflowFlag(Ifx_ASCLIN *asclin)
Clears the Tx FIFO overflow flag.
Definition: IfxAsclin.h:1696
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:363
IfxAsclin_Spi_Job::pending
uint32 pending
job remaining (count of the data)
Definition: IfxAsclin_Spi.h:297
IfxAsclin_setDataLength
IFX_INLINE void IfxAsclin_setDataLength(Ifx_ASCLIN *asclin, IfxAsclin_DataLength length)
Sets the data length (number of bits per transfer)
Definition: IfxAsclin.h:2203
IfxAsclin_Spi_Pins::slso
IFX_CONST IfxAsclin_Slso_Out * slso
SPI slave select pin.
Definition: IfxAsclin_Spi.h:310
IfxAsclin_setClockSource
void IfxAsclin_setClockSource(Ifx_ASCLIN *asclin, IfxAsclin_ClockSource clockSource)
Sets the clock source.
Definition: IfxAsclin.c:339
IfxAsclin_setTxFifoInterruptLevel
IFX_INLINE void IfxAsclin_setTxFifoInterruptLevel(Ifx_ASCLIN *asclin, IfxAsclin_TxFifoInterruptLevel level)
Sets the Tx FIFO interrupt level.
Definition: IfxAsclin.h:2427


iLLD_TC26B: IfxAsclin_Spi.h Source File

  • Asclin
  • Spi
IfxAsclin_Spi.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_Spi.h
3 * \brief ASCLIN SPI details
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Asclin_Spi_Usage How to use the ASCLIN SPI Interface driver?
25 * \ingroup IfxLld_Asclin
26 *
27 * The SPI interface driver provides a default ASCLIN configuration for synchronous serial communication in 8 and 16 bit mode, and a set of data transfer routines.
28 *
29 * Data transfers are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the ASCLIN peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
30 *
31 * The SPI interface driver works only as Master
32 *
33 * In the following sections it will be described, how to integrate the driver into the application framework.
34 *
35 * \section IfxLld_Asclin_Spi_Preparation Preparation
36 *
37 * \subsection IfxLld_Asclin_Spi_Include Include Files
38 *
39 * Include following header file into your C code:
40 *
41 * \code
42 * #include <Asclin/Spi/IfxAsclin_Spi.h>
43 * \endcode
44 *
45 * \subsection IfxLld_Asclin_Spi_Variables Variables
46 *
47 * Declare the Spi handle as global variable in your C code:
48 *
49 * \code
50 * // used globally
51 * static IfxAsclin_Spi spi;
52 * \endcode
53 *
54 * In addition, declare global transmit and receive buffers for the data transfers:
55 *
56 * \code
57 * #define SPI_BUFFER_SIZE 8
58 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
59 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
60 * \endcode
61 *
62 * \subsection IfxLld_Asclin_Spi_Interrupt Interrupt Handler Installation
63 *
64 * See also \ref IfxLld_Cpu_Irq_Usage
65 *
66 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
67 *
68 * \code
69 * // priorities are normally defined in Ifx_IntPrioDef.h
70 * #define IFX_INTPRIO_ASCLIN1_TX 1
71 * #define IFX_INTPRIO_ASCLIN1_RX 2
72 * #define IFX_INTPRIO_ASCLIN1_ER 3
73 * \endcode
74 *
75 * Add the interrupt service routines to your C code. They have to call the SPI interrupt handlers by passing the spi handle:
76 *
77 * \code
78 * IFX_INTERRUPT(asclin1TxISR, 0, IFX_INTPRIO_ASCLIN1_TX)
79 * {
80 * IfxAsclin_Spi_isrTransmit(&spi);
81 * }
82 *
83 * IFX_INTERRUPT(asclin1RxISR, 0, IFX_INTPRIO_ASCLIN1_RX)
84 * {
85 * IfxAsclin_Spi_isrReceive(&spi);
86 * }
87 *
88 * IFX_INTERRUPT(asclin1ErISR, 0, IFX_INTPRIO_ASCLIN1_ER)
89 * {
90 * IfxAsclin_Spi_isrError(&spi);
91 * }
92 * \endcode
93 *
94 * Finally install the interrupt handlers in your initialisation function:
95 *
96 * \code
97 * // install interrupt handlers
98 * IfxCpu_Irq_installInterruptHandler(&asclin1TxISR, IFX_INTPRIO_ASCLIN1_TX);
99 * IfxCpu_Irq_installInterruptHandler(&asclin1RxISR, IFX_INTPRIO_ASCLIN1_RX);
100 * IfxCpu_Irq_installInterruptHandler(&asclin1ErISR, IFX_INTPRIO_ASCLIN1_ER);
101 * IfxCpu_enableInterrupts();
102 * \endcode
103 *
104 * \subsection IfxLld_Asclin_Spi_Init Module Initialisation
105 *
106 * The module initialisation can be done in the same function. Here an example:
107 *
108 * \code
109 * // create module config
110 * IfxAsclin_Spi_Config spiConfig;
111 * IfxAsclin_Spi_initModuleConfig(&spiConfig, &MODULE_ASCLIN1);
112 *
113 * // set the desired baudrate
114 * spiConfig.baudrate.prescaler = 1;
115 * spiConfig.baudrate.baudrate = 1000000; // FDR values will be calculated in initModule
116 *
117 * // ISR priorities and interrupt target
118 * spiConfig.interrupt.txPriority = IFX_INTPRIO_ASCLIN1_TX; // see also \ref IfxLld_Asclin
119 * spiConfig.interrupt.rxPriority = IFX_INTPRIO_ASCLIN1_RX; // see also \ref IfxLld_Asclin
120 * spiConfig.interrupt.erPriority = IFX_INTPRIO_ASCLIN1_ER; // see also \ref IfxLld_Asclin
121 * spiConfig.interrupt.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
122 *
123 * // pin configuration
124 * const IfxAsclin_Spi_Pins pins = {
125 * &IfxAsclin1_SCLK_P15_0_OUT, IfxPort_OutputMode_pushPull, // Clock out pin
126 * &IfxAsclin1_RXA_P15_1_IN, IfxPort_InputMode_pullUp, // Rx pin
127 * &IfxAsclin1_TX_P15_4_OUT, IfxPort_OutputMode_pushPull, // Tx pin
128 * &IfxAsclin1_SLSO_P20_8_OUT, IfxPort_OutputMode_pushPull, // Slave select pin
129 * IfxPort_PadDriver_cmosAutomotiveSpeed1
130 * };
131 * spiConfig.pins = &pins;
132 *
133 * // initialize module
134 * //IfxAsclin_Spi spi; // defined globally
135 * IfxAsclin_Spi_initModule(&spi, &spiConfig);
136 * \endcode
137 *
138 * The SPI is ready for use now!
139 *
140 *
141 * \section IfxLld_Asclin_Spi_DataTransfers Data Transfers
142 *
143 * In following examples we assume, that following buffers are declared globally:
144 *
145 * \code
146 * // load the data buffers
147 * int i;
148 * for (i = 0; i < SPI_BUFFER_SIZE; i++)
149 * {
150 * spiTxBuffer[i] = i + 1;
151 * spiRxBuffer[i] = 0;
152 * }
153 * \endcode
154 *
155 * Sending and Receiving a data stream:
156 *
157 * \code
158 * // wait until transfer of previous data stream is finished
159 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
160 *
161 * // send/receive new stream
162 * IfxAsclin_Spi_exchange(&spi, spiTxBuffer, spiRxBuffer, 8);
163 * \endcode
164 *
165 * Send only, discard received data:
166 *
167 * \code
168 * // wait until transfer of previous data stream is finished
169 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
170 *
171 * // send new stream
172 * IfxAsclin_Spi_exchange(&spi, spiTxBuffer, NULL_PTR, 8);
173 * \endcode
174 *
175 * Receive only, send all 1's
176 *
177 * \code
178 * // wait until transfer of previous data stream is finished
179 * while( IfxAsclin_Spi_getStatus(&spi) == IfxAsclin_Spi_Status_busy );
180 *
181 * // receive new stream
182 * IfxAsclin_Spi_exchange(&spi, NULL_PTR, spiRxBuffer, 8);
183 * \endcode
184 *
185 * \defgroup IfxLld_Asclin_Spi SPI
186 * \ingroup IfxLld_Asclin
187 * \defgroup IfxLld_Asclin_Spi_DataStructures Data Structures
188 * \ingroup IfxLld_Asclin_Spi
189 * \defgroup IfxLld_Asclin_Spi_ModuleFunctions Module Functions
190 * \ingroup IfxLld_Asclin_Spi
191 * \defgroup IfxLld_Asclin_Spi_InterruptFunctions Interrupt Functions
192 * \ingroup IfxLld_Asclin_Spi
193 * \defgroup IfxLld_Asclin_Spi_CommunicationFunctions Communication Functions
194 * \ingroup IfxLld_Asclin_Spi
195 */
196
197 #ifndef IFXASCLIN_SPI_H
198 #define IFXASCLIN_SPI_H 1
199
200 /******************************************************************************/
201 /*----------------------------------Includes----------------------------------*/
202 /******************************************************************************/
203
204 #include "Asclin/Std/IfxAsclin.h"
205
206 /******************************************************************************/
207 /*-------------------------------Enumerations---------------------------------*/
208 /******************************************************************************/
209
210 /** \brief Enumeration for job status
211 */
212 typedef enum
213 {
214 IfxAsclin_Spi_Status_ok = 0,
215 IfxAsclin_Spi_Status_busy = 1,
216 IfxAsclin_Spi_Status_unknown = 2
217 } IfxAsclin_Spi_Status;
218
219 /******************************************************************************/
220 /*-----------------------------Data Structures--------------------------------*/
221 /******************************************************************************/
222
223 /** \addtogroup IfxLld_Asclin_Spi_DataStructures
224 * \{ */
225 /** \brief Structure for Baudrate Generation
226 */
227 typedef struct
228 {
229 float32 baudrate; /**< \brief value of the required baudrate */
230 uint16 prescaler; /**< \brief BITCON.PRESCALER, predivider to generate the baud rate */
231 IfxAsclin_OversamplingFactor oversampling; /**< \brief BITCON.OVERSAMPLING, postdivider, used for oversampling */
232 } IfxAsclin_Spi_Baudrate;
233
234 /** \brief Structure for Bit Sampling
235 */
236 typedef struct
237 {
238 IfxAsclin_SamplesPerBit medianFilter; /**< \brief BITCON.SM, no. of samples per bit 1 or 3 */
239 } IfxAsclin_Spi_BitSamplingControl;
240
241 /** \brief Structure for Error Flags
242 */
243 typedef struct
244 {
245 uint8 frameError : 1; /**< \brief frame error */
246 uint8 rxFifoOverflow : 1; /**< \brief receive FIFO overflow error */
247 uint8 rxFifoUnderflow : 1; /**< \brief receive FIFO underflow error */
248 uint8 txFifoOverflow : 1; /**< \brief transmit FIFO overflow error */
249 } IfxAsclin_Spi_ErrorFlags;
250
251 /** \brief Structure for FIFO Control
252 */
253 typedef struct
254 {
255 IfxAsclin_TxFifoInletWidth inWidth; /**< \brief TXFIFOCON.INW, transmit FIFO inlet width */
256 IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel; /**< \brief TXFIFOCON.INTLEVEL, Tx FIFO interrupt level */
257 IfxAsclin_RxFifoOutletWidth outWidth; /**< \brief RXFIFOCON.OTW, receive FIFO oulet width */
258 IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel; /**< \brief RXFIFOCON.INTLEVEL, Rx FIFO interrupt level */
259 IfxAsclin_ReceiveBufferMode buffMode; /**< \brief RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer) */
260 } IfxAsclin_Spi_FifoControl;
261
262 /** \brief Structure for Frame Control
263 */
264 typedef struct
265 {
266 IfxAsclin_IdleDelay idleDelay; /**< \brief FRAMECON.IDLE, idle delay */
267 IfxAsclin_StopBit stopBit; /**< \brief FRAMECON.STOP, number of stop bits */
268 IfxAsclin_LeadDelay leadDelay; /**< \brief FRAMECON.LEAD, lead delay */
269 IfxAsclin_ShiftDirection shiftDir; /**< \brief FRAMECON.MSB, shift direction */
270 } IfxAsclin_Spi_FrameControl;
271
272 /** \brief Structure for input output control
273 */
274 typedef struct
275 {
276 IfxAsclin_RxInputSelect alti; /**< \brief IOCR.ALTI, Rx input (alternate input) pin selection */
277 IfxAsclin_ClockPolarity cpol; /**< \brief IOCR.CPOL clock polarity selection */
278 IfxAsclin_SlavePolarity spol; /**< \brief IOCR.SPOL slave polarity selection */
279 boolean loopBack; /**< \brief IOCR.LB, loop back mode selection, 0 for disable, 1 for enable */
280 } IfxAsclin_Spi_InputOutputControl;
281
282 /** \brief Structure for interrupt configuration
283 */
284 typedef struct
285 {
286 uint16 txPriority; /**< \brief transmit interrupt priority */
287 uint16 rxPriority; /**< \brief receive interrupt priority */
288 uint16 erPriority; /**< \brief error interrupt priority */
289 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
290 } IfxAsclin_Spi_InterruptConfig;
291
292 /** \brief Structure for data transfer jobs
293 */
294 typedef struct
295 {
296 void *data; /**< \brief pointer to user data */
297 uint32 pending; /**< \brief job remaining (count of the data) */
298 } IfxAsclin_Spi_Job;
299
300 /** \brief Structure for SPI pin configuration
301 */
302 typedef struct
303 {
304 IFX_CONST IfxAsclin_Sclk_Out *sclk; /**< \brief SPI clock select pin */
305 IfxPort_OutputMode sclkMode; /**< \brief sclk as output */
306 IFX_CONST IfxAsclin_Rx_In *rx; /**< \brief SPI Rx pin */
307 IfxPort_InputMode rxMode; /**< \brief rx pin as input */
308 IFX_CONST IfxAsclin_Tx_Out *tx; /**< \brief SPI Tx pin */
309 IfxPort_OutputMode txMode; /**< \brief tx as output */
310 IFX_CONST IfxAsclin_Slso_Out *slso; /**< \brief SPI slave select pin */
311 IfxPort_OutputMode slsoMode; /**< \brief slso as output */
312 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
313 } IfxAsclin_Spi_Pins;
314
315 /** \} */
316
317 /** \addtogroup IfxLld_Asclin_Spi_DataStructures
318 * \{ */
319 /** \brief Module handle
320 */
321 typedef struct
322 {
323 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
324 IfxAsclin_Spi_Job txJob; /**< \brief structure for Tx job */
325 IfxAsclin_Spi_Job rxJob; /**< \brief structure for Rx job */
326 uint32 sending; /**< \brief sending in progress status */
327 IfxAsclin_Spi_ErrorFlags errorFlags; /**< \brief structure for error flags status */
328 uint8 dataWidth; /**< \brief width of the data in bytes */
329 boolean transferInProgress; /**< \brief status of the transfer In progress */
330 } IfxAsclin_Spi;
331
332 /** \brief Configuration structure of the module
333 */
334 typedef struct
335 {
336 Ifx_ASCLIN *asclin; /**< \brief pointer to ASCLIN registers */
337 IfxAsclin_FrameMode frameMode; /**< \brief FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN) */
338 IfxAsclin_Spi_InputOutputControl inputOutput; /**< \brief structure for input output control */
339 IfxAsclin_Spi_Baudrate baudrate; /**< \brief structure for baudrate */
340 IfxAsclin_Spi_BitSamplingControl bitSampling; /**< \brief structure for bit sampling */
341 IfxAsclin_Spi_FrameControl frame; /**< \brief structure for frame control */
342 IfxAsclin_DataLength dataLength; /**< \brief DATCON.DATALENGTH, data length, number of bits per transfer */
343 IfxAsclin_Spi_FifoControl fifo; /**< \brief structure for FIFO control */
344 IfxAsclin_Spi_InterruptConfig interrupt; /**< \brief structure for interrupt configuration */
345 IFX_CONST IfxAsclin_Spi_Pins *pins; /**< \brief structure for SPI pins */
346 IfxAsclin_ClockSource clockSource; /**< \brief CSR.CLKSEL, clock source selection */
347 } IfxAsclin_Spi_Config;
348
349 /** \} */
350
351 /** \addtogroup IfxLld_Asclin_Spi_ModuleFunctions
352 * \{ */
353
354 /******************************************************************************/
355 /*-------------------------Global Function Prototypes-------------------------*/
356 /******************************************************************************/
357
358 /** \brief Disables the module
359 * \param asclin module handle
360 * \return None
361 */
362 IFX_EXTERN void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin);
363
364 /** \brief Initialises the module
365 * \param asclin module handle
366 * \param config predefined configuration structure of the module
367 * \return Status
368 *
369 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
370 *
371 */
372 IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config);
373
374 /** \brief Fills the configuration structure with default values
375 * \param config predefined configuration structure of the module
376 * \param asclin pointer to ASCLIN registers
377 * \return None
378 *
379 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
380 *
381 */
382 IFX_EXTERN void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin);
383
384 /** \} */
385
386 /** \addtogroup IfxLld_Asclin_Spi_InterruptFunctions
387 * \{ */
388
389 /******************************************************************************/
390 /*-------------------------Global Function Prototypes-------------------------*/
391 /******************************************************************************/
392
393 /** \brief ISR error routine.
394 *
395 * Currently it only stores error flags in the handle (asclin->errorFlags) whenever an error happens.
396 * The user software could react on these flags, e.g. re-initialising the module.
397 * \param asclin module handle
398 * \return None
399 */
400 IFX_EXTERN void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin);
401
402 /** \brief ISR receive routine
403 * \param asclin module handle
404 * \return None
405 */
406 IFX_EXTERN void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin);
407
408 /** \brief ISR transmit routine
409 * \param asclin module handle
410 * \return None
411 */
412 IFX_EXTERN void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin);
413
414 /** \} */
415
416 /** \addtogroup IfxLld_Asclin_Spi_CommunicationFunctions
417 * \{ */
418
419 /******************************************************************************/
420 /*-------------------------Global Function Prototypes-------------------------*/
421 /******************************************************************************/
422
423 /** \brief starts the data exchange
424 * \param asclin module handle
425 * \param src pointer to transmit data buffer
426 * \param dest pointer to receive data buffer
427 * \param count count of the data
428 * \return status
429 *
430 * A coding example can be found in \ref IfxLld_Asclin_Spi_Usage
431 *
432 */
433 IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count);
434
435 /** \brief Reads data from the Rx FIFO based on the outlet width
436 * \param asclin module handle
437 * \return None
438 */
439 IFX_EXTERN void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin);
440
441 /** \brief Writes data into the Tx FIFO based on the inlet width
442 * \param asclin module handle
443 * \return None
444 */
445 IFX_EXTERN void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin);
446
447 /** \} */
448
449 /******************************************************************************/
450 /*-------------------------Global Function Prototypes-------------------------*/
451 /******************************************************************************/
452
453 /**
454 * \param asclin module handle
455 * \return status of the on going job
456 */
457 IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin);
458
459 #endif /* IFXASCLIN_SPI_H */
IfxAsclin_Spi_FrameControl::idleDelay
IfxAsclin_IdleDelay idleDelay
FRAMECON.IDLE, idle delay.
Definition: IfxAsclin_Spi.h:266
IfxAsclin_Spi_FifoControl
Structure for FIFO Control.
Definition: IfxAsclin_Spi.h:253
IfxAsclin_Spi_Pins::sclkMode
IfxPort_OutputMode sclkMode
sclk as output
Definition: IfxAsclin_Spi.h:305
IfxAsclin_Tx_Out
TX pin mapping structure.
Definition: IfxAsclin_PinMap.h:79
IfxAsclin_Spi_exchange
IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_exchange(IfxAsclin_Spi *asclin, void *src, void *dest, uint32 count)
starts the data exchange
Definition: IfxAsclin_Spi.c:61
IfxAsclin_ReceiveBufferMode
IfxAsclin_ReceiveBufferMode
Receive buffer mode Definition in Ifx_ASCLIN.RXFIFOCON.B.BUF.
Definition: IfxAsclin.h:237
IfxAsclin_Spi_Baudrate
Structure for Baudrate Generation.
Definition: IfxAsclin_Spi.h:227
IfxAsclin_Spi_BitSamplingControl::medianFilter
IfxAsclin_SamplesPerBit medianFilter
BITCON.SM, no. of samples per bit 1 or 3.
Definition: IfxAsclin_Spi.h:238
IfxAsclin_Spi_Status
IfxAsclin_Spi_Status
Enumeration for job status.
Definition: IfxAsclin_Spi.h:212
IfxAsclin_Spi_isrReceive
IFX_EXTERN void IfxAsclin_Spi_isrReceive(IfxAsclin_Spi *asclin)
ISR receive routine.
Definition: IfxAsclin_Spi.c:335
IfxAsclin_Spi_Pins::sclk
IFX_CONST IfxAsclin_Sclk_Out * sclk
SPI clock select pin.
Definition: IfxAsclin_Spi.h:304
IfxAsclin_Spi_Job
Structure for data transfer jobs.
Definition: IfxAsclin_Spi.h:294
IfxAsclin_Spi_FrameControl::stopBit
IfxAsclin_StopBit stopBit
FRAMECON.STOP, number of stop bits.
Definition: IfxAsclin_Spi.h:267
IfxAsclin_Spi_InputOutputControl::cpol
IfxAsclin_ClockPolarity cpol
IOCR.CPOL clock polarity selection.
Definition: IfxAsclin_Spi.h:277
IfxAsclin_Sclk_Out
SCLK pin mapping structure.
Definition: IfxAsclin_PinMap.h:63
IfxAsclin_Spi_Job::data
void * data
pointer to user data
Definition: IfxAsclin_Spi.h:296
IfxAsclin_Spi
Module handle.
Definition: IfxAsclin_Spi.h:321
IfxAsclin_Spi_Pins::txMode
IfxPort_OutputMode txMode
tx as output
Definition: IfxAsclin_Spi.h:309
IfxAsclin_Spi_InputOutputControl::loopBack
boolean loopBack
IOCR.LB, loop back mode selection, 0 for disable, 1 for enable.
Definition: IfxAsclin_Spi.h:279
IfxAsclin_SamplesPerBit
IfxAsclin_SamplesPerBit
Number of samples per bit, sample mode/medianfilter Definition in Ifx_ASCLIN.BITCON.B.SM.
Definition: IfxAsclin.h:326
IfxAsclin_Spi::txJob
IfxAsclin_Spi_Job txJob
structure for Tx job
Definition: IfxAsclin_Spi.h:324
IfxAsclin_RxFifoOutletWidth
IfxAsclin_RxFifoOutletWidth
Defines the number of bytes read from the Rx FIFO with one FPI bus read Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:278
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxAsclin_Spi_Config::baudrate
IfxAsclin_Spi_Baudrate baudrate
structure for baudrate
Definition: IfxAsclin_Spi.h:339
IfxAsclin_Spi_Config::frame
IfxAsclin_Spi_FrameControl frame
structure for frame control
Definition: IfxAsclin_Spi.h:341
float32
float float32
Definition: Platform_Types.h:167
IfxAsclin_Slso_Out
SLSO pin mapping structure.
Definition: IfxAsclin_PinMap.h:71
IfxAsclin_Spi_Status_ok
Definition: IfxAsclin_Spi.h:214
IfxAsclin_StopBit
IfxAsclin_StopBit
ASC and LIN mode: number of stop bits (0 is not allowed), SPI mode: trailing delay. Definition in Ifx_ASCLIN.FRAMECON.B.STOP.
Definition: IfxAsclin.h:372
IfxAsclin_Spi_Baudrate::baudrate
float32 baudrate
value of the required baudrate
Definition: IfxAsclin_Spi.h:229
IfxAsclin_Spi_Pins::tx
IFX_CONST IfxAsclin_Tx_Out * tx
SPI Tx pin.
Definition: IfxAsclin_Spi.h:308
IfxAsclin_RxInputSelect
IfxAsclin_RxInputSelect
Alternate input selection for Rx signal. Definition in Ifx_ASCLIN.IOCR.B.ALTI.
Definition: IfxAsclin.h:289
IfxAsclin_Spi_Pins
Structure for SPI pin configuration.
Definition: IfxAsclin_Spi.h:302
IfxAsclin_Spi_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxAsclin_Spi.h:312
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxAsclin_Spi_ErrorFlags::rxFifoOverflow
uint8 rxFifoOverflow
receive FIFO overflow error
Definition: IfxAsclin_Spi.h:246
IfxAsclin_Spi_disableModule
IFX_EXTERN void IfxAsclin_Spi_disableModule(IfxAsclin_Spi *asclin)
Disables the module.
Definition: IfxAsclin_Spi.c:51
IfxAsclin_RxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel
Defines the filling level that triggers a drain (RX) interrupt or DMA access Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:255
IfxAsclin_Spi_isrError
IFX_EXTERN void IfxAsclin_Spi_isrError(IfxAsclin_Spi *asclin)
ISR error routine.
Definition: IfxAsclin_Spi.c:304
IfxAsclin_Spi_Baudrate::oversampling
IfxAsclin_OversamplingFactor oversampling
BITCON.OVERSAMPLING, postdivider, used for oversampling.
Definition: IfxAsclin_Spi.h:231
IfxAsclin_TxFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel
Defines the filling level that triggers a refill (TX) interrupt or DMA access Definition in Ifx_ASCLI...
Definition: IfxAsclin.h:407
IfxAsclin_Spi_initModule
IFX_EXTERN IfxAsclin_Status IfxAsclin_Spi_initModule(IfxAsclin_Spi *asclin, const IfxAsclin_Spi_Config *config)
Initialises the module.
Definition: IfxAsclin_Spi.c:93
IfxAsclin_Spi_InterruptConfig
Structure for interrupt configuration.
Definition: IfxAsclin_Spi.h:284
IfxAsclin_Spi_Pins::rx
IFX_CONST IfxAsclin_Rx_In * rx
SPI Rx pin.
Definition: IfxAsclin_Spi.h:306
IfxAsclin_Spi_Config::clockSource
IfxAsclin_ClockSource clockSource
CSR.CLKSEL, clock source selection.
Definition: IfxAsclin_Spi.h:346
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxAsclin_Spi_ErrorFlags::txFifoOverflow
uint8 txFifoOverflow
transmit FIFO overflow error
Definition: IfxAsclin_Spi.h:248
IfxAsclin_OversamplingFactor
IfxAsclin_OversamplingFactor
Defines the bit length in ticks in the range of 1 to 16. The lengths of 1 to 3 are not allowed Defini...
Definition: IfxAsclin.h:208
IfxAsclin_Spi_initModuleConfig
IFX_EXTERN void IfxAsclin_Spi_initModuleConfig(IfxAsclin_Spi_Config *config, Ifx_ASCLIN *asclin)
Fills the configuration structure with default values.
Definition: IfxAsclin_Spi.c:238
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxAsclin_Spi_InterruptConfig::erPriority
uint16 erPriority
error interrupt priority
Definition: IfxAsclin_Spi.h:288
IfxAsclin_Spi_getStatus
IFX_EXTERN IfxAsclin_Spi_Status IfxAsclin_Spi_getStatus(IfxAsclin_Spi *asclin)
Definition: IfxAsclin_Spi.c:80
IfxAsclin_Spi_Status_busy
Definition: IfxAsclin_Spi.h:215
IfxAsclin_LeadDelay
IfxAsclin_LeadDelay
Defines the leading delay in bit times in SPI mode. ASC mode: not applicable. LIN mode: delay between...
Definition: IfxAsclin.h:175
IfxAsclin_FrameMode
IfxAsclin_FrameMode
Defines the basic operating mode of the module. Changing the mode must be done by switching first to ...
Definition: IfxAsclin.h:137
IfxAsclin_IdleDelay
IfxAsclin_IdleDelay
Defines the duration of the IDLE delay in bit times. SPI mode: this is the idle time between the fram...
Definition: IfxAsclin.h:159
IfxAsclin_Rx_In
RX pin mapping structure.
Definition: IfxAsclin_PinMap.h:47
IfxAsclin_ClockSource
IfxAsclin_ClockSource
Selection of clock source Definition in Ifx_ASCLIN.CSR.B.CLKSEL.
Definition: IfxAsclin.h:90
IfxAsclin_DataLength
IfxAsclin_DataLength
Number of bits per transfer Definition in Ifx_ASCLIN.FRAMECON.B.DATALEN.
Definition: IfxAsclin.h:114
IfxAsclin_Spi_Config::inputOutput
IfxAsclin_Spi_InputOutputControl inputOutput
structure for input output control
Definition: IfxAsclin_Spi.h:338
IfxAsclin_Spi_ErrorFlags::frameError
uint8 frameError
frame error
Definition: IfxAsclin_Spi.h:245
IfxAsclin_Spi::rxJob
IfxAsclin_Spi_Job rxJob
structure for Rx job
Definition: IfxAsclin_Spi.h:325
IfxAsclin_Spi_Config::bitSampling
IfxAsclin_Spi_BitSamplingControl bitSampling
structure for bit sampling
Definition: IfxAsclin_Spi.h:340
IfxAsclin_Spi_ErrorFlags::rxFifoUnderflow
uint8 rxFifoUnderflow
receive FIFO underflow error
Definition: IfxAsclin_Spi.h:247
IfxAsclin_Spi_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxAsclin_Spi.h:289
IfxAsclin_Spi_FifoControl::buffMode
IfxAsclin_ReceiveBufferMode buffMode
RXFIFOCON.BUF, receive buffer mode (RXFIFO or RXBuffer)
Definition: IfxAsclin_Spi.h:259
IfxAsclin_Spi_FifoControl::outWidth
IfxAsclin_RxFifoOutletWidth outWidth
RXFIFOCON.OTW, receive FIFO oulet width.
Definition: IfxAsclin_Spi.h:257
IfxAsclin_SlavePolarity
IfxAsclin_SlavePolarity
Defines the idle level of the SLSO signal, which is the level. Outside the data transmission, leading and trailing time intervals. Definition in Ifx_ASCLIN.IOCR.B.SPOL.
Definition: IfxAsclin.h:346
IfxAsclin_Spi_InterruptConfig::txPriority
uint16 txPriority
transmit interrupt priority
Definition: IfxAsclin_Spi.h:286
IfxAsclin_ClockPolarity
IfxAsclin_ClockPolarity
CPOL defines the idle level of the clock signal in the SPI mode. Idle level is the level outside the ...
Definition: IfxAsclin.h:81
IfxAsclin_Spi_Config::dataLength
IfxAsclin_DataLength dataLength
DATCON.DATALENGTH, data length, number of bits per transfer.
Definition: IfxAsclin_Spi.h:342
IfxAsclin_Spi_InputOutputControl::alti
IfxAsclin_RxInputSelect alti
IOCR.ALTI, Rx input (alternate input) pin selection.
Definition: IfxAsclin_Spi.h:276
IfxAsclin_TxFifoInletWidth
IfxAsclin_TxFifoInletWidth
Defines the number of bytes written to the Tx FIFO with one FPI bus write Definition in Ifx_ASCLIN...
Definition: IfxAsclin.h:396
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxAsclin_Spi::transferInProgress
boolean transferInProgress
status of the transfer In progress
Definition: IfxAsclin_Spi.h:329
IfxAsclin_Spi_BitSamplingControl
Structure for Bit Sampling.
Definition: IfxAsclin_Spi.h:236
IfxAsclin_Spi_ErrorFlags
Structure for Error Flags.
Definition: IfxAsclin_Spi.h:243
IfxAsclin_Spi::errorFlags
IfxAsclin_Spi_ErrorFlags errorFlags
structure for error flags status
Definition: IfxAsclin_Spi.h:327
IfxAsclin_Spi_write
IFX_EXTERN void IfxAsclin_Spi_write(IfxAsclin_Spi *asclin)
Writes data into the Tx FIFO based on the inlet width.
Definition: IfxAsclin_Spi.c:409
IfxAsclin_Spi_FifoControl::rxFifoInterruptLevel
IfxAsclin_RxFifoInterruptLevel rxFifoInterruptLevel
RXFIFOCON.INTLEVEL, Rx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:258
IfxAsclin_Spi_InputOutputControl
Structure for input output control.
Definition: IfxAsclin_Spi.h:274
IfxAsclin_Spi_InterruptConfig::rxPriority
uint16 rxPriority
receive interrupt priority
Definition: IfxAsclin_Spi.h:287
IfxAsclin_Spi_Config::fifo
IfxAsclin_Spi_FifoControl fifo
structure for FIFO control
Definition: IfxAsclin_Spi.h:343
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxAsclin_Spi_FifoControl::txFifoInterruptLevel
IfxAsclin_TxFifoInterruptLevel txFifoInterruptLevel
TXFIFOCON.INTLEVEL, Tx FIFO interrupt level.
Definition: IfxAsclin_Spi.h:256
IfxAsclin_ShiftDirection
IfxAsclin_ShiftDirection
SPI mode: defines the shift direction of the shift register. ASC and LIN mode: should be set to 0...
Definition: IfxAsclin.h:336
IfxAsclin_Spi_Pins::rxMode
IfxPort_InputMode rxMode
rx pin as input
Definition: IfxAsclin_Spi.h:307
IfxAsclin_Spi_Pins::slsoMode
IfxPort_OutputMode slsoMode
slso as output
Definition: IfxAsclin_Spi.h:311
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxAsclin_Spi_Config::pins
IFX_CONST IfxAsclin_Spi_Pins * pins
structure for SPI pins
Definition: IfxAsclin_Spi.h:345
IfxAsclin_Spi_FrameControl::leadDelay
IfxAsclin_LeadDelay leadDelay
FRAMECON.LEAD, lead delay.
Definition: IfxAsclin_Spi.h:268
IfxAsclin_Spi_Baudrate::prescaler
uint16 prescaler
BITCON.PRESCALER, predivider to generate the baud rate.
Definition: IfxAsclin_Spi.h:230
IfxAsclin_Spi_Status_unknown
Definition: IfxAsclin_Spi.h:216
IfxAsclin_Spi_Config
Configuration structure of the module.
Definition: IfxAsclin_Spi.h:334
IfxAsclin_Spi_InputOutputControl::spol
IfxAsclin_SlavePolarity spol
IOCR.SPOL slave polarity selection.
Definition: IfxAsclin_Spi.h:278
IfxAsclin_Spi_Config::interrupt
IfxAsclin_Spi_InterruptConfig interrupt
structure for interrupt configuration
Definition: IfxAsclin_Spi.h:344
IfxAsclin_Spi_FrameControl::shiftDir
IfxAsclin_ShiftDirection shiftDir
FRAMECON.MSB, shift direction.
Definition: IfxAsclin_Spi.h:269
IfxAsclin_Spi_Config::frameMode
IfxAsclin_FrameMode frameMode
FRAMECON.MODE, mode of operation of the module (ASC, SPI, LIN)
Definition: IfxAsclin_Spi.h:337
IfxAsclin_Spi_isrTransmit
IFX_EXTERN void IfxAsclin_Spi_isrTransmit(IfxAsclin_Spi *asclin)
ISR transmit routine.
Definition: IfxAsclin_Spi.c:343
IfxAsclin_Spi_FifoControl::inWidth
IfxAsclin_TxFifoInletWidth inWidth
TXFIFOCON.INW, transmit FIFO inlet width.
Definition: IfxAsclin_Spi.h:255
IfxAsclin_Spi_read
IFX_EXTERN void IfxAsclin_Spi_read(IfxAsclin_Spi *asclin)
Reads data from the Rx FIFO based on the outlet width.
Definition: IfxAsclin_Spi.c:358
IfxAsclin.h
ASCLIN basic functionality.
IfxAsclin_Spi::sending
uint32 sending
sending in progress status
Definition: IfxAsclin_Spi.h:326
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxAsclin_Spi::asclin
Ifx_ASCLIN * asclin
pointer to ASCLIN registers
Definition: IfxAsclin_Spi.h:323
IfxAsclin_Spi::dataWidth
uint8 dataWidth
width of the data in bytes
Definition: IfxAsclin_Spi.h:328
IfxAsclin_Status
IfxAsclin_Status
Error status.
Definition: IfxAsclin.h:363
IfxAsclin_Spi_Job::pending
uint32 pending
job remaining (count of the data)
Definition: IfxAsclin_Spi.h:297
IfxAsclin_Spi_Pins::slso
IFX_CONST IfxAsclin_Slso_Out * slso
SPI slave select pin.
Definition: IfxAsclin_Spi.h:310
IfxAsclin_Spi_FrameControl
Structure for Frame Control.
Definition: IfxAsclin_Spi.h:264


iLLD_TC26B: IfxAsclin_cfg.c Source File

  • _Impl
IfxAsclin_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_cfg.c
3 * \brief ASCLIN on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxAsclin_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES] = {
36 {&MODULE_ASCLIN0, (uint32)IfxAsclin_Index_0},
37 {&MODULE_ASCLIN1, (uint32)IfxAsclin_Index_1},
38 {&MODULE_ASCLIN2, (uint32)IfxAsclin_Index_2},
39 {&MODULE_ASCLIN3, (uint32)IfxAsclin_Index_3}
40 };
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:61
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:63
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxAsclin_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.c:35
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:48
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:64
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:62
IfxAsclin_cfg.h
ASCLIN on-chip implementation data.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123


iLLD_TC26B: IfxAsclin_cfg.h Source File

  • _Impl
IfxAsclin_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxAsclin_cfg.h
3 * \brief ASCLIN on-chip implementation data
4 * \ingroup IfxLld_Asclin
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Asclin ASCLIN
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Asclin_Impl Implementation
27 * \ingroup IfxLld_Asclin
28 * \defgroup IfxLld_Asclin_Std Standard Driver
29 * \ingroup IfxLld_Asclin
30 * \defgroup IfxLld_Asclin_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Asclin_Impl
32 */
33
34 #ifndef IFXASCLIN_CFG_H
35 #define IFXASCLIN_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "IfxAsclin_reg.h"
43
44 /******************************************************************************/
45 /*-----------------------------------Macros-----------------------------------*/
46 /******************************************************************************/
47
48 #define IFXASCLIN_NUM_MODULES (4)
49
50 /******************************************************************************/
51 /*--------------------------------Enumerations--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_Asclin_Impl_Enumerations
55 * \{ */
56 /** \brief List of the available Asclin resources
57 */
58 typedef enum
59 {
60 IfxAsclin_Index_none = -1, /**< \brief Not Selected */
61 IfxAsclin_Index_0 = 0, /**< \brief ASCLIN Index 0 */
62 IfxAsclin_Index_1, /**< \brief ASCLIN Index 1 */
63 IfxAsclin_Index_2, /**< \brief ASCLIN Index 2 */
64 IfxAsclin_Index_3 /**< \brief ASCLIN Index 3 */
65 } IfxAsclin_Index;
66
67 /** \} */
68
69 /******************************************************************************/
70 /*-------------------Global Exported Variables/Constants----------------------*/
71 /******************************************************************************/
72
73 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES];
74
75 #endif /* IFXASCLIN_CFG_H */
IfxAsclin_Index_0
ASCLIN Index 0.
Definition: IfxAsclin_cfg.h:61
IfxAsclin_Index_2
ASCLIN Index 2.
Definition: IfxAsclin_cfg.h:63
IfxAsclin_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES]
Definition: IfxAsclin_cfg.h:73
IfxAsclin_Index
IfxAsclin_Index
List of the available Asclin resources.
Definition: IfxAsclin_cfg.h:58
IFXASCLIN_NUM_MODULES
#define IFXASCLIN_NUM_MODULES
Definition: IfxAsclin_cfg.h:48
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxAsclin_Index_3
ASCLIN Index 3.
Definition: IfxAsclin_cfg.h:64
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxAsclin_Index_none
Not Selected.
Definition: IfxAsclin_cfg.h:60
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxAsclin_Index_1
ASCLIN Index 1.
Definition: IfxAsclin_cfg.h:62
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123


iLLD_TC26B: IfxCcu6.c Source File

  • Ccu6
  • Std
IfxCcu6.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6.c
3 * \brief CCU6 basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxCcu6.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
37 {
38 unsigned mosel = ccu6->MOSEL.U;
39 uint16 shift = (uint16)outputLine;
40 uint16 data = 2 * selectedTrigger;
41
42 if (ccu6 == &MODULE_CCU61)
43 {
44 data = data + 1;
45 }
46
47 mosel = ccu6->MOSEL.U;
48 __ldmst_c(&mosel, (0x7U << shift), (data << shift));
49 ccu6->MOSEL.U = mosel;
50 }
51
52
53 void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
54 {
55 uint32 shift, mask;
56
57 if (timer != IfxCcu6_TimerId_t13)
58 {
59 if (channelOut != IfxCcu6_ChannelOut_cout3)
60 {
61 shift = channelOut;
62 mask = (1 << shift);
63 ccu6->MODCTR.U = ccu6->MODCTR.U & ~(mask);
64 }
65 else
66 {}
67 }
68 else
69 {
70 if (channelOut != IfxCcu6_ChannelOut_cout3)
71 {
72 shift = channelOut + 8;
73 mask = (1 << shift);
74 ccu6->MODCTR.U = ccu6->MODCTR.U & ~(mask);
75 }
76 else
77 {
78 ccu6->MODCTR.B.ECT13O = FALSE;
79 }
80 }
81 }
82
83
84 void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
85 {
86 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
87 IfxScuWdt_clearCpuEndinit(passwd);
88 ccu6->CLC.U = 0x00000001;
89 IfxScuWdt_setCpuEndinit(passwd);
90
91 /* Wait until module is disabled */
92 while (IfxCcu6_isModuleEnabled(ccu6) == TRUE)
93 {}
94 }
95
96
97 void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
98 {
99 uint32 shift, mask;
100
101 if (timer != IfxCcu6_TimerId_t13)
102 {
103 if (channelOut != IfxCcu6_ChannelOut_cout3)
104 {
105 shift = channelOut;
106 mask = (1 << shift);
107 ccu6->MODCTR.U = ccu6->MODCTR.U | (mask);
108 }
109 else
110 {}
111 }
112 else
113 {
114 if (channelOut != IfxCcu6_ChannelOut_cout3)
115 {
116 shift = channelOut + 8;
117 mask = (1 << shift);
118 ccu6->MODCTR.U = ccu6->MODCTR.U | (mask);
119 }
120 else
121 {
122 ccu6->MODCTR.B.ECT13O = TRUE;
123 }
124 }
125 }
126
127
128 void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
129 {
130 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
131 IfxScuWdt_clearCpuEndinit(passwd);
132 ccu6->CLC.B.DISR = 0U; /* Enable module */
133 IfxScuWdt_setCpuEndinit(passwd);
134
135 /* Wait until module is enabled */
136 while (IfxCcu6_isModuleEnabled(ccu6) == FALSE)
137 {}
138 }
139
140
141 Ifx_CCU6 *IfxCcu6_getAddress(IfxCcu6_Index ccu6)
142 {
143 Ifx_CCU6 *module;
144
145 if (ccu6 < IFXCCU6_NUM_MODULES)
146 {
147 module = (Ifx_CCU6 *)IfxCcu6_cfg_indexMap[ccu6].module;
148 }
149 else
150 {
151 module = NULL_PTR;
152 }
153
154 return module;
155 }
156
157
158 uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
159 {
160 uint32 value = 0;
161
162 switch (channel)
163 {
164 case IfxCcu6_T12Channel_0:
165 value = ccu6->CC60R.U;
166 break;
167 case IfxCcu6_T12Channel_1:
168 value = ccu6->CC61R.U;
169 break;
170 case IfxCcu6_T12Channel_2:
171 value = ccu6->CC62R.U;
172 break;
173 }
174
175 return value;
176 }
177
178
179 uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
180 {
181 uint32 value = 0;
182
183 switch (channel)
184 {
185 case IfxCcu6_T12Channel_0:
186 value = ccu6->CC60SR.U;
187 break;
188 case IfxCcu6_T12Channel_1:
189 value = ccu6->CC61SR.U;
190 break;
191 case IfxCcu6_T12Channel_2:
192 value = ccu6->CC62SR.U;
193 break;
194 }
195
196 return value;
197 }
198
199
200 IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
201 {
202 uint32 index;
203 IfxCcu6_Index result;
204
205 result = IfxCcu6_Index_none;
206
207 for (index = 0; index < IFXCCU6_NUM_MODULES; index++)
208 {
209 if (IfxCcu6_cfg_indexMap[index].module == ccu6)
210 {
211 result = (IfxCcu6_Index)IfxCcu6_cfg_indexMap[index].index;
212 break;
213 }
214 }
215
216 return result;
217 }
218
219
220 volatile Ifx_SRC_SRCR *IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
221 {
222 sint32 moduleIdx = IfxCcu6_getIndex(ccu6);
223 volatile Ifx_SRC_SRCR *srcr;
224
225 srcr = &(MODULE_SRC.CCU6.CCU6[moduleIdx].SR0);
226 return &(srcr[serviceRequest]);
227 }
228
229
230 uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
231 {
232 uint32 result = 0;
233
234 if (timer != IfxCcu6_TimerId_t13)
235 {
236 result = ccu6->T12.U;
237 }
238 else
239 {
240 result = ccu6->T13.U;
241 }
242
243 return result;
244 }
245
246
247 void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
248 {
249 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
250
251 IfxScuWdt_clearCpuEndinit(passwd);
252 ccu6->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
253 ccu6->KRST1.B.RST = 1;
254 IfxScuWdt_setCpuEndinit(passwd);
255
256 while (0 == ccu6->KRST0.B.RSTSTAT) /* Wait until reset is executed */
257
258 {}
259
260 IfxScuWdt_clearCpuEndinit(passwd);
261 ccu6->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
262 IfxScuWdt_setCpuEndinit(passwd);
263 }
264
265
266 void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
267 {
268 if ((source == IfxCcu6_InterruptSource_cc60RisingEdge) || (source == IfxCcu6_InterruptSource_cc60FallingEdge))
269 {
270 ccu6->INP.B.INPCC60 = serviceRequest;
271 }
272 else if ((source == IfxCcu6_InterruptSource_cc61RisingEdge) || (source == IfxCcu6_InterruptSource_cc61FallingEdge))
273 {
274 ccu6->INP.B.INPCC61 = serviceRequest;
275 }
276 else if ((source == IfxCcu6_InterruptSource_cc62RisingEdge) || (source == IfxCcu6_InterruptSource_cc62FallingEdge))
277 {
278 ccu6->INP.B.INPCC62 = serviceRequest;
279 }
280 else if ((source == IfxCcu6_InterruptSource_correctHallEvent))
281 {
282 ccu6->INP.B.INPCHE = serviceRequest;
283 }
284 else if ((source == IfxCcu6_InterruptSource_trap) || (source == IfxCcu6_InterruptSource_wrongHallEvent))
285 {
286 ccu6->INP.B.INPERR = serviceRequest;
287 }
288 else if ((source == IfxCcu6_InterruptSource_t12OneMatch) || (source == IfxCcu6_InterruptSource_t12PeriodMatch))
289 {
290 ccu6->INP.B.INPT12 = serviceRequest;
291 }
292 else if ((source == IfxCcu6_InterruptSource_t13CompareMatch) || (source == IfxCcu6_InterruptSource_t13PeriodMatch))
293 {
294 ccu6->INP.B.INPT13 = serviceRequest;
295 }
296 else
297 {
298 __debug();
299 }
300 }
301
302
303 void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
304 {
305 if (channelOut != IfxCcu6_ChannelOut_cout3)
306 {
307 uint32 shift = channelOut;
308 uint32 mask = (1 << shift);
309 ccu6->PSLR.U = (ccu6->PSLR.U & ~mask) | ((uint32)state << shift);
310 }
311 else
312 {
313 ccu6->PSLR.B.PSL63 = state;
314 }
315 }
316
317
318 void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
319 {
320 uint32 mask = (0x0101U << channel);
321 uint32 mode;
322
323 if (state == IfxCcu6_CaptureCompareState_set)
324 {
325 mode = 0x0001U;
326 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
327 }
328
329 if (state == IfxCcu6_CaptureCompareState_clear)
330 {
331 mode = 0x0100U;
332 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
333 }
334
335 if (state == IfxCcu6_CaptureCompareState_toggle)
336 {
337 mode = 0x0101U;
338 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << channel);
339 }
340 }
341
342
343 void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
344 {
345 switch (channel)
346 {
347 case IfxCcu6_T12Channel_0:
348 ccu6->CC60SR.B.CCS = value;
349 break;
350 case IfxCcu6_T12Channel_1:
351 ccu6->CC61SR.B.CCS = value;
352 break;
353 case IfxCcu6_T12Channel_2:
354 ccu6->CC62SR.B.CCS = value;
355 break;
356 }
357 }
358
359
360 float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
361 {
362 uint16 prescaler;
363 float32 freqCC6 = IfxScuCcu_getSpbFrequency();
364 uint16 divFactor = freqCC6 / frequency;
365
366 for (prescaler = 0; prescaler < 16; prescaler++)
367 {
368 divFactor = divFactor / 2;
369
370 if (divFactor == (uint8)0)
371 {
372 break;
373 }
374 }
375
376 if (prescaler < 16)
377 {
378 uint16 periodVal;
379 boolean additionalPrescaler;
380 IfxCcu6_TimerInputClock clockInput;
381
382 periodVal = (uint16)((countMode != IfxCcu6_T12CountMode_edgeAligned) ? ((period / 2) - 1) : (period - 1));
383 IfxCcu6_setT12PeriodValue(ccu6, periodVal);
384 IfxCcu6_enableShadowTransfer(ccu6, TRUE, FALSE);
385
386 clockInput = (IfxCcu6_TimerInputClock)(prescaler & 0x7U);
387 IfxCcu6_setInputClockFrequency(ccu6, IfxCcu6_TimerId_t12, clockInput);
388
389 additionalPrescaler = ((prescaler & 0x8U) != 0);
390
391 if (additionalPrescaler)
392 {
393 IfxCcu6_enableAdditionalPrescaler(ccu6, IfxCcu6_TimerId_t12);
394 }
395
396 IfxCcu6_setT12CountMode(ccu6, countMode);
397
398 frequency = freqCC6 / (0x1u << prescaler); // Frequency = FREQ_CCU6 / (2 ^ prescaler)
399 }
400 else
401 {
402 frequency = 0;
403 }
404
405 return frequency;
406 }
407
408
409 void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
410 {
411 ccu6->PISEL2.B.T12EXT = extInput->select >= Ifx_RxSel_e;
412 ccu6->PISEL0.B.IST12HR = extInput->select;
413
414 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, extInput->module == ccu6);
415 }
416
417
418 void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
419 {
420 uint32 shift = 6;
421 uint32 mask = (0x0101U << shift);
422 uint32 mode;
423
424 if (state == IfxCcu6_CaptureCompareState_set)
425 {
426 mode = 0x0001U;
427 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
428 }
429
430 if (state == IfxCcu6_CaptureCompareState_clear)
431 {
432 mode = 0x0100U;
433 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
434 }
435
436 if (state == IfxCcu6_CaptureCompareState_toggle)
437 {
438 mode = 0x0101U;
439 ccu6->CMPMODIF.U = (ccu6->CMPMODIF.U & ~mask) | (mode << shift);
440 }
441 }
442
443
444 float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
445 {
446 uint16 prescaler;
447 float32 freqCC6 = IfxScuCcu_getSpbFrequency();
448 uint16 divFactor = freqCC6 / frequency;
449
450 for (prescaler = 0; prescaler < 16; prescaler++)
451 {
452 divFactor = divFactor / 2;
453
454 if (divFactor == (uint8)0)
455 {
456 break;
457 }
458 }
459
460 if (prescaler < 16)
461 {
462 uint16 periodVal;
463 boolean additionalPrescaler;
464 IfxCcu6_TimerInputClock clockInput;
465
466 periodVal = (uint16)(period - 1);
467 IfxCcu6_setT13PeriodValue(ccu6, periodVal);
468 IfxCcu6_enableShadowTransfer(ccu6, FALSE, TRUE);
469
470 clockInput = (IfxCcu6_TimerInputClock)(prescaler & 0x7U);
471 IfxCcu6_setInputClockFrequency(ccu6, IfxCcu6_TimerId_t13, clockInput);
472
473 additionalPrescaler = ((prescaler & 0x8U) != 0);
474
475 if (additionalPrescaler)
476 {
477 IfxCcu6_enableAdditionalPrescaler(ccu6, IfxCcu6_TimerId_t13);
478 }
479
480 frequency = freqCC6 / (0x1u << prescaler); // Frequency = FREQ_CCU6 / (2 ^ prescaler)
481 }
482 else
483 {
484 /** \retval IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the
485 * required frequency */
486 frequency = 0;
487 }
488
489 return frequency;
490 }
491
492
493 void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
494 {
495 ccu6->PISEL2.B.T13EXT = extInput->select >= Ifx_RxSel_e;
496 ccu6->PISEL2.B.IST13HR = extInput->select;
497
498 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, extInput->module == ccu6);
499 }
IfxCcu6_enableAdditionalPrescaler
IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support h...
Definition: IfxCcu6.h:1505
IfxCcu6_Index_none
Not Selected.
Definition: IfxCcu6_cfg.h:65
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
Ifx_RxSel_e
Definition: Ifx_Types.h:116
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:220
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:63
IfxCcu6_InterruptSource_cc62FallingEdge
Capture compare match falling edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:174
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:282
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:179
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:162
IfxCcu6_InterruptSource_wrongHallEvent
Interrupt enable for wrong hall event.
Definition: IfxCcu6.h:182
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:179
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:178
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:180
IfxCcu6_CaptureCompareState_clear
Bit CC6xST is cleared.
Definition: IfxCcu6.h:87
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:93
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:164
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCcu6_InterruptSource_cc61FallingEdge
Capture compare match falling edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:170
float32
float float32
Definition: Platform_Types.h:167
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:91
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:166
IfxCcu6_T12hr_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:99
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxCcu6_getAddress
Ifx_CCU6 * IfxCcu6_getAddress(IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module.
Definition: IfxCcu6.c:141
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:266
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:320
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:168
IfxCcu6_disableModule
void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel.
Definition: IfxCcu6.c:84
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:360
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1586
IfxCcu6_T12hr_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:97
IfxCcu6_CaptureCompareState_toggle
Bit CC6xST is toggled.
Definition: IfxCcu6.h:88
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:319
IfxCcu6_CaptureCompareState_set
Bit CC6xST is set.
Definition: IfxCcu6.h:86
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:101
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:493
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2062
IfxCcu6_readTimer
uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register.
Definition: IfxCcu6.c:230
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:241
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:176
IfxCcu6.h
CCU6 basic functionality.
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:49
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:213
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:317
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1897
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:280
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:343
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:53
IfxCcu6_setT12CaptureCompareState
void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xS...
Definition: IfxCcu6.c:318
IfxCcu6_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.c:41
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_getIndex
IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
Returns CCU6 index.
Definition: IfxCcu6.c:200
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:126
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_setInputClockFrequency
IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13)
Definition: IfxCcu6.h:1983
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:36
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:177
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:243
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:244
sint32
long sint32
Definition: Platform_Types.h:131
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxCcu6_InterruptSource_correctHallEvent
Interrupt enable for correct hall event.
Definition: IfxCcu6.h:181
IfxCcu6_InterruptSource_cc62RisingEdge
Capture compare match rising edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:172
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:409
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:245
IfxCcu6_setOutputPassiveLevel
void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:303
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:77
IfxCcu6_setT13CaptureCompareState
void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63S...
Definition: IfxCcu6.c:418
IfxCcu6_CaptureCompareState
IfxCcu6_CaptureCompareState
capture/compare state to set / clear the CC6xST-bits
Definition: IfxCcu6.h:84
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:70
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2074
IfxCcu6_resetModule
void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
Definition: IfxCcu6.c:247
TRUE
#define TRUE
Definition: Platform_Types.h:87
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2092
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:128
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:326
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:97
IfxCcu6_getCaptureRegisterValue
uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:158
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:444


iLLD_TC26B: IfxCcu6.h Source File

  • Ccu6
  • Std
IfxCcu6.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6.h
3 * \brief CCU6 basic functionality
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Ccu6_Std_Enum Enumerations
26 * \ingroup IfxLld_Ccu6_Std
27 * \defgroup IfxLld_Ccu6_Std_Operative Operative Functions
28 * \ingroup IfxLld_Ccu6_Std
29 * \defgroup IfxLld_Ccu6_Std_Utility Utility Functions
30 * \ingroup IfxLld_Ccu6_Std
31 * \defgroup IfxLld_Ccu6_Std_Configuration Configuration Functions
32 * \ingroup IfxLld_Ccu6_Std
33 * \defgroup IfxLld_Ccu6_Std_IO IO Pin Configuration Functions
34 * \ingroup IfxLld_Ccu6_Std
35 */
36
37 #ifndef IFXCCU6_H
38 #define IFXCCU6_H 1
39
40 /******************************************************************************/
41 /*----------------------------------Includes----------------------------------*/
42 /******************************************************************************/
43
44 #include "_Impl/IfxCcu6_cfg.h"
45 #include "Src/Std/IfxSrc.h"
46 #include "Cpu/Std/IfxCpu_Intrinsics.h"
47 #include "Scu/Std/IfxScuWdt.h"
48 #include "Scu/Std/IfxScuCcu.h"
49 #include "_Utilities/Ifx_Assert.h"
50 #include "_PinMap/IfxCcu6_PinMap.h"
51
52 /******************************************************************************/
53 /*--------------------------------Enumerations--------------------------------*/
54 /******************************************************************************/
55
56 /** \addtogroup IfxLld_Ccu6_Std_Enum
57 * \{ */
58 /** \brief Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )\n
59 * Definition in Ifx_CCU.PISEL0
60 */
61 typedef enum
62 {
63 IfxCcu6_CaptureCompareInput_cC60 = IFX_CCU6_PISEL0_ISCC60_OFF, /**< \brief CC60 capture input */
64 IfxCcu6_CaptureCompareInput_cC61 = IFX_CCU6_PISEL0_ISCC61_OFF, /**< \brief CC61 capture input */
65 IfxCcu6_CaptureCompareInput_cC62 = IFX_CCU6_PISEL0_ISCC62_OFF, /**< \brief CC62 capture input */
66 IfxCcu6_CaptureCompareInput_cTRAP = IFX_CCU6_PISEL0_ISTRP_OFF, /**< \brief CTRAP input */
67 IfxCcu6_CaptureCompareInput_cCPOS0 = IFX_CCU6_PISEL0_ISPOS0_OFF, /**< \brief CCPOS0 input */
68 IfxCcu6_CaptureCompareInput_cCPOS1 = IFX_CCU6_PISEL0_ISPOS1_OFF, /**< \brief CCPOS1 input */
69 IfxCcu6_CaptureCompareInput_cCPOS2 = IFX_CCU6_PISEL0_ISPOS2_OFF /**< \brief CCPOS2 input */
70 } IfxCcu6_CaptureCompareInput;
71
72 /** \brief Selection of actual input signal for the capture compare inputs
73 */
74 typedef enum
75 {
76 IfxCcu6_CaptureCompareInputSignal_a = 0, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
77 IfxCcu6_CaptureCompareInputSignal_b = 1, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
78 IfxCcu6_CaptureCompareInputSignal_c = 2, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
79 IfxCcu6_CaptureCompareInputSignal_d = 3 /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
80 } IfxCcu6_CaptureCompareInputSignal;
81
82 /** \brief capture/compare state to set / clear the CC6xST-bits
83 */
84 typedef enum
85 {
86 IfxCcu6_CaptureCompareState_set = 0, /**< \brief Bit CC6xST is set */
87 IfxCcu6_CaptureCompareState_clear = 1, /**< \brief Bit CC6xST is cleared */
88 IfxCcu6_CaptureCompareState_toggle = 2 /**< \brief Bit CC6xST is toggled */
89 } IfxCcu6_CaptureCompareState;
90
91 /** \brief Capture compare output pins
92 */
93 typedef enum
94 {
95 IfxCcu6_ChannelOut_cc0 = 0, /**< \brief CC60 compare output CC0 */
96 IfxCcu6_ChannelOut_cout0 = 1, /**< \brief CC60 compare output COUT0 */
97 IfxCcu6_ChannelOut_cc1 = 2, /**< \brief CC61 compare output CC1 */
98 IfxCcu6_ChannelOut_cout1 = 3, /**< \brief CC61 compare output COUT1 */
99 IfxCcu6_ChannelOut_cc2 = 4, /**< \brief CC62 compare output CC2 */
100 IfxCcu6_ChannelOut_cout2 = 5, /**< \brief CC62 compare output COUT2 */
101 IfxCcu6_ChannelOut_cout3 = 6 /**< \brief CC63 compare output COUT3 */
102 } IfxCcu6_ChannelOut;
103
104 /** \brief Defines the input event leading to a counting action of the timer (T12 / T13)\n
105 * Definition in Ifx_CCU.PISEL2.B.ISCNT12 / Ifx_CCU.PISEL2.B.ISCNT13
106 */
107 typedef enum
108 {
109 IfxCcu6_CountingInputMode_internal = 0, /**< \brief The T1x prescaler generates the counting events,
110 * Bit TCTR4.T1xCNT is not taken into account. */
111 IfxCcu6_CountingInputMode_manual = 1, /**< \brief Bit TCTR4.T1xCNT written with 1 is a counting
112 * event. The T1x prescaler is not taken into account */
113 IfxCcu6_CountingInputMode_externalRising = 2, /**< \brief The timer T1x is counting each rising edge
114 * detected in the selected T1xHR signal */
115 IfxCcu6_CountingInputMode_externalFalling = 3 /**< \brief The timer T1x is counting each falling edge
116 * detected in the selected T1xHR signal */
117 } IfxCcu6_CountingInputMode;
118
119 /** \brief Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is delayed by the Dead-Time Counter 0\n
120 * Definition in Ifx_CCU.T12MSEL.B.DBYP
121 */
122 typedef enum
123 {
124 IfxCcu6_DelayBypass_notActive = 0, /**< \brief Dead-Time Counter 0 is generating a delay after
125 * the source signal becomes active */
126 IfxCcu6_DelayBypass_active = 1 /**< \brief Dead-Time Counter 0 is not used for a delay */
127 } IfxCcu6_DelayBypass;
128
129 /** \brief Defines the event of signal T1xHR that can set the run bit T1xR by HW\n
130 * Definition in Ifx_CCU.TCTR2.B.T12RSEL / IIfx_CCU.TCTR2.B.T13RSEL
131 */
132 typedef enum
133 {
134 IfxCcu6_ExternalTriggerMode_disable = 0, /**< \brief The external setting of T1xR is disabled */
135 IfxCcu6_ExternalTriggerMode_risingEdge = 1, /**< \brief Bit T1xR is set if a rising edge of signal T1xHR is
136 * detected. */
137 IfxCcu6_ExternalTriggerMode_fallingEdge = 2, /**< \brief Bit T1xR is set if a falling edge of signal T1xHR is
138 * detected. */
139 IfxCcu6_ExternalTriggerMode_anyEdge = 3 /**< \brief Bit T1xR is set if an edge of signal T1xHR is
140 * detected */
141 } IfxCcu6_ExternalTriggerMode;
142
143 /** \brief Defines the source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields\n
144 * Definition in Ifx_CCU.T12MSEL.HSYNC
145 */
146 typedef enum
147 {
148 IfxCcu6_HallSensorTriggerMode_permanentCheck = 0, /**< \brief Any edge at any of the inputs CCPOSx, independent from any PWM
149 * signal */
150 IfxCcu6_HallSensorTriggerMode_cM63 = 1, /**< \brief A T13 Compare-Match */
151 IfxCcu6_HallSensorTriggerMode_t13PM = 2, /**< \brief A T13 Period-Match */
152 IfxCcu6_HallSensorTriggerMode_off = 3, /**< \brief Hall sampling triggered by HW sources is switched off */
153 IfxCcu6_HallSensorTriggerMode_t12PMCountingUp = 4, /**< \brief A T12 Period-Match while counting up (T12_PM and CDIR = 0) */
154 IfxCcu6_HallSensorTriggerMode_t12OMCountingDown = 5, /**< \brief A T12 One-Match while counting down (T12_PM and CDIR = 1) */
155 IfxCcu6_HallSensorTriggerMode_cM61CountingUp = 6, /**< \brief A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0) */
156 IfxCcu6_HallSensorTriggerMode_cM61CountingDown = 7 /**< \brief A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1) */
157 } IfxCcu6_HallSensorTriggerMode;
158
159 /** \brief Interrupt source selection
160 * Description in Ifx_CCU.IEN
161 */
162 typedef enum
163 {
164 IfxCcu6_InterruptSource_cc60RisingEdge = IFX_CCU6_IS_ICC60R_OFF, /**< \brief Capture compare match rising edge interrupt
165 * enable for channel CC60 */
166 IfxCcu6_InterruptSource_cc60FallingEdge = IFX_CCU6_IS_ICC60F_OFF, /**< \brief Capture compare match falling edge interrupt
167 * enable for channel CC60 */
168 IfxCcu6_InterruptSource_cc61RisingEdge = IFX_CCU6_IS_ICC61R_OFF, /**< \brief Capture compare match rising edge interrupt
169 * enable for channel CC61 */
170 IfxCcu6_InterruptSource_cc61FallingEdge = IFX_CCU6_IS_ICC61F_OFF, /**< \brief Capture compare match falling edge interrupt
171 * enable for channel CC61 */
172 IfxCcu6_InterruptSource_cc62RisingEdge = IFX_CCU6_IS_ICC62R_OFF, /**< \brief Capture compare match rising edge interrupt
173 * enable for channel CC62 */
174 IfxCcu6_InterruptSource_cc62FallingEdge = IFX_CCU6_IS_ICC62F_OFF, /**< \brief Capture compare match falling edge interrupt
175 * enable for channel CC62 */
176 IfxCcu6_InterruptSource_t12OneMatch = IFX_CCU6_IS_T12OM_OFF, /**< \brief Interrupt enable for T12 one-match */
177 IfxCcu6_InterruptSource_t12PeriodMatch = IFX_CCU6_IS_T12PM_OFF, /**< \brief Interrupt enable for T12 period-match */
178 IfxCcu6_InterruptSource_t13CompareMatch = IFX_CCU6_IS_T13CM_OFF, /**< \brief Interrupt enable for T13 compare-match */
179 IfxCcu6_InterruptSource_t13PeriodMatch = IFX_CCU6_IS_T13PM_OFF, /**< \brief Interrupt enable for T13 period-match */
180 IfxCcu6_InterruptSource_trap = IFX_CCU6_IS_TRPF_OFF, /**< \brief Interrupt enable for trap flag */
181 IfxCcu6_InterruptSource_correctHallEvent = IFX_CCU6_IS_CHE_OFF, /**< \brief Interrupt enable for correct hall event */
182 IfxCcu6_InterruptSource_wrongHallEvent = IFX_CCU6_IS_WHE_OFF /**< \brief Interrupt enable for wrong hall event */
183 } IfxCcu6_InterruptSource;
184
185 /** \brief Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP\n
186 * Definition in Ifx_CCU.MCMCTR.B.SWSEL
187 */
188 typedef enum
189 {
190 IfxCcu6_MultiChannelSwitchingSelect_noEvent = 0, /**< \brief No trigger request will be generated */
191 IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent = 1, /**< \brief Correct Hall pattern detected (CM_CHE) */
192 IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch = 2, /**< \brief T13 period-match detected (while counting up) */
193 IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch = 3, /**< \brief T12 one-match (while counting down) */
194 IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch = 4, /**< \brief T12 channel 1 compare-match detected (phase
195 * delay function) */
196 IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch = 5 /**< \brief T12 period match detected (while counting up) */
197 } IfxCcu6_MultiChannelSwitchingSelect;
198
199 /** \brief Selection of the synchronization mechanism for the shadow transfer event MCM_ST\n
200 * Definition in Ifx_CCU.MCMCTR.B.SWSYN
201 */
202 typedef enum
203 {
204 IfxCcu6_MultiChannelSwitchingSync_direct = 0, /**< \brief Direct, the trigger event immediately leads to the
205 * shadow transfer */
206 IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch = 1, /**< \brief A T13 zero-match triggers the shadow transfer */
207 IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch = 2 /**< \brief A T12 zero-match (while counting up) triggers the
208 * shadow transfer */
209 } IfxCcu6_MultiChannelSwitchingSync;
210
211 /** \brief Selection of service request outputs
212 */
213 typedef enum
214 {
215 IfxCcu6_ServiceRequest_0 = 0, /**< \brief Service request output SR0 */
216 IfxCcu6_ServiceRequest_1, /**< \brief Service request output SR1 */
217 IfxCcu6_ServiceRequest_2, /**< \brief Service request output SR2 */
218 IfxCcu6_ServiceRequest_3 /**< \brief Service request output SR3 */
219 } IfxCcu6_ServiceRequest;
220
221 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
222 * Definition in Ifx_CCU6.CLC.B.EDIS
223 */
224 typedef enum
225 {
226 IfxCcu6_SleepMode_enable = 0, /**< \brief enables sleep mode */
227 IfxCcu6_SleepMode_disable = 1 /**< \brief disables sleep mode */
228 } IfxCcu6_SleepMode;
229
230 /** \brief OCDS Suspend Control (OCDS.SUS)
231 */
232 typedef enum
233 {
234 IfxCcu6_SuspendMode_none = 0, /**< \brief No suspend */
235 IfxCcu6_SuspendMode_hard = 1, /**< \brief Hard Suspend */
236 IfxCcu6_SuspendMode_soft = 2 /**< \brief Soft Suspend */
237 } IfxCcu6_SuspendMode;
238
239 /** \brief Capture compare channel of Timer12
240 */
241 typedef enum
242 {
243 IfxCcu6_T12Channel_0 = 0, /**< \brief T12 channel CC60 */
244 IfxCcu6_T12Channel_1, /**< \brief T12 channel CC61 */
245 IfxCcu6_T12Channel_2 /**< \brief T12 channel CC62 */
246 } IfxCcu6_T12Channel;
247
248 /** \brief The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
249 */
250 typedef enum
251 {
252 IfxCcu6_T12ChannelMode_off = 0, /**< \brief Capture/Compare modes switched off */
253 IfxCcu6_T12ChannelMode_compareMode = 1, /**< \brief Compare mode */
254 IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling = 4, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR */
255 IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising = 5, /**< \brief CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR */
256 IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling = 6, /**< \brief CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR */
257 IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny = 7, /**< \brief CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR */
258 IfxCcu6_T12ChannelMode_hallSensor = 8, /**< \brief Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be
259 * programmed to Hall Sensor mode */
260 IfxCcu6_T12ChannelMode_hysteresisLikecompare = 9, /**< \brief Hysteresis-like compare mode */
261 IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling = 10, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR */
262 IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising = 11, /**< \brief CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR */
263 IfxCcu6_T12ChannelMode_multiInputCaptureBothRising = 12, /**< \brief CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR */
264 IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling = 13, /**< \brief CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR */
265 IfxCcu6_T12ChannelMode_multiInputCaptureAny = 14 /**< \brief CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR */
266 } IfxCcu6_T12ChannelMode;
267
268 /** \brief Counting direction of Timer12\n
269 * Definition in Ifx_CCU.TCTR0.B.CDIR
270 */
271 typedef enum
272 {
273 IfxCcu6_T12CountDirection_up = 0, /**< \brief Counting up */
274 IfxCcu6_T12CountDirection_down = 1 /**< \brief Counting down */
275 } IfxCcu6_T12CountDirection;
276
277 /** \brief Operating mode of Timer 12\n
278 * Definition in Ifx_CCU.TCTR0.B.CTM
279 */
280 typedef enum
281 {
282 IfxCcu6_T12CountMode_edgeAligned = 0, /**< \brief T12 always counts up and continues counting
283 * from zero after reaching the period value. */
284 IfxCcu6_T12CountMode_centerAligned = 1 /**< \brief T12 counts down after detecting a period-match
285 * and counts up after detecting a one-match. */
286 } IfxCcu6_T12CountMode;
287
288 /** \brief Delivers additional information to control the automatic set of bit T13R in the case that the trigger action defined by T13 trigger event control (T13TEC) is detected.\n
289 * Definition in Ifx_CCU.TCTR2.B.T13TED
290 */
291 typedef enum
292 {
293 IfxCcu6_T13TriggerDirection_noAction = 0, /**< \brief no action */
294 IfxCcu6_T13TriggerDirection_onT12CountingUp = 1, /**< \brief while T12 is counting up */
295 IfxCcu6_T13TriggerDirection_onT12CountingDown = 2, /**< \brief while T12 is counting down */
296 IfxCcu6_T13TriggerDirection_anyT12 = 3 /**< \brief independent on the count direction of T12 */
297 } IfxCcu6_T13TriggerDirection;
298
299 /** \brief Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare signals)\n
300 * Definition in Ifx_CCU.TCTR2.B.T13TEC
301 */
302 typedef enum
303 {
304 IfxCcu6_T13TriggerEvent_noAction = 0, /**< \brief no action */
305 IfxCcu6_T13TriggerEvent_onCC60RCompare = 1, /**< \brief set T13R on a T12 compare event on channel 0 */
306 IfxCcu6_T13TriggerEvent_onCC61RCompare = 2, /**< \brief set T13R on a T12 compare event on channel 1 */
307 IfxCcu6_T13TriggerEvent_onCC62RCompare = 3, /**< \brief set T13R on a T12 compare event on channel 2 */
308 IfxCcu6_T13TriggerEvent_onAnyT12Compare = 4, /**< \brief set T13R on any T12 compare event (ch. 0, 1, 2) */
309 IfxCcu6_T13TriggerEvent_onT12Period = 5, /**< \brief set T13R upon a period-match of T12 */
310 IfxCcu6_T13TriggerEvent_onT12Zero = 6, /**< \brief set T13R upon a zero-match of T12 (while
311 * counting up) */
312 IfxCcu6_T13TriggerEvent_onCCPOSxEdge = 7 /**< \brief set T13R on any edge of inputs CCPOSx */
313 } IfxCcu6_T13TriggerEvent;
314
315 /** \brief Timer number ( T12 / T13 )
316 */
317 typedef enum
318 {
319 IfxCcu6_TimerId_t12 = 0, /**< \brief Timer 12 */
320 IfxCcu6_TimerId_t13 = 1 /**< \brief Timer 13 */
321 } IfxCcu6_TimerId;
322
323 /** \brief Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according to the equation\n
324 * Definition in Ifx_CCU.TCTR0.B.T12CLK / Ifx_CCU.TCTR0.B.T13CLK
325 */
326 typedef enum
327 {
328 IfxCcu6_TimerInputClock_fcc6 = 0, /**< \brief fcc6 */
329 IfxCcu6_TimerInputClock_fcc6By2 = 1, /**< \brief fcc6 / 2 */
330 IfxCcu6_TimerInputClock_fcc6By4 = 2, /**< \brief fcc6 / 4 */
331 IfxCcu6_TimerInputClock_fcc6By8 = 3, /**< \brief fcc6 / 8 */
332 IfxCcu6_TimerInputClock_fcc6By16 = 4, /**< \brief fcc6 / 16 */
333 IfxCcu6_TimerInputClock_fcc6By32 = 5, /**< \brief fcc6 / 32 */
334 IfxCcu6_TimerInputClock_fcc6By64 = 6, /**< \brief fcc6 / 64 */
335 IfxCcu6_TimerInputClock_fcc6By128 = 7 /**< \brief fcc6 / 128 */
336 } IfxCcu6_TimerInputClock;
337
338 /** \brief Selection of actual input signal for the timer inputs
339 */
340 typedef enum
341 {
342 IfxCcu6_TimerInputSignal_a = 0, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
343 IfxCcu6_TimerInputSignal_b = 1, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
344 IfxCcu6_TimerInputSignal_c = 2, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
345 IfxCcu6_TimerInputSignal_d = 3, /**< \brief defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input. */
346 IfxCcu6_TimerInputSignal_e = 0, /**< \brief defines the input signal used as T1xHR input. */
347 IfxCcu6_TimerInputSignal_f = 1, /**< \brief defines the input signal used as T1xHR input. */
348 IfxCcu6_TimerInputSignal_g = 2, /**< \brief defines the input signal used as T1xHR input. */
349 IfxCcu6_TimerInputSignal_h = 3 /**< \brief defines the input signal used as T1xHR input. */
350 } IfxCcu6_TimerInputSignal;
351
352 /** \brief Timer (T12 / T13) run status\n
353 * Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R
354 */
355 typedef enum
356 {
357 IfxCcu6_TimerRunStatus_stopped = 0, /**< \brief Timer T1x is stopped. */
358 IfxCcu6_TimerRunStatus_running = 1 /**< \brief Timer T1x is running. */
359 } IfxCcu6_TimerRunStatus;
360
361 /** \brief Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (either by CTRAP = 1 or by TRPPEN = 0)\n
362 * Definition in Ifx_CCU.TRPCTR.B.TRPM2
363 */
364 typedef enum
365 {
366 IfxCcu6_TrapMode_automatic = 0, /**< \brief Bit TRPF is cleared by HW */
367 IfxCcu6_TrapMode_manual = 1 /**< \brief Bit TRPF stays 0, It has to be cleared by SW by writing
368 * ISR.RTRPF = 1 */
369 } IfxCcu6_TrapMode;
370
371 /** \brief Defines the behavior of the selected outputs when leaving the trap state, after the trap condition has become inactive again\n
372 * Definition in Ifx_CCU.TRPCTR.B.TRPMx (x = 0, 1)
373 */
374 typedef enum
375 {
376 IfxCcu6_TrapState_t12Sync = 0, /**< \brief The trap state is left when a zero-match
377 * of T12 (while counting up) is detected */
378 IfxCcu6_TrapState_t13Sync = 1, /**< \brief The trap state is left when a zeromatch
379 * of T13 is detected */
380 IfxCcu6_TrapState_immediate = 3 /**< \brief The trap state is left immediately without any synchronization to T12 or T13 */
381 } IfxCcu6_TrapState;
382
383 /** \} */
384
385 /** \addtogroup IfxLld_Ccu6_Std_Operative
386 * \{ */
387
388 /******************************************************************************/
389 /*-------------------------Inline Function Prototypes-------------------------*/
390 /******************************************************************************/
391
392 /** \brief Clears the counters of the Timers (T12, T13 individually or together based on the selection)
393 * \param ccu6 Pointer to the base of CCU6 registers
394 * \param t12 Timer12 choice (enable / disable)
395 * \param t13 Timer13 choice (enable / disable)
396 * \return None
397 */
398 IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
399
400 /** \brief Clears all the three dead-time counter channels to zero.
401 * \param ccu6 Pointer to the base of CCU6 registers
402 * \return None
403 */
404 IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6);
405
406 /** \brief Clears the selected interrupt flag
407 * \param ccu6 Pointer to the base of CCU6 registers
408 * \param source Interrupt source selection
409 * \return None
410 */
411 IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
412
413 /** \brief Clears the T12 One notification
414 * \param ccu6 Pointer to the base of CCU6 registers
415 * \return None
416 */
417 IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6);
418
419 /** \brief Clears the T12 period notification
420 * \param ccu6 Pointer to the base of CCU6 registers
421 * \return None
422 */
423 IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6);
424
425 /** \brief Clears the T13 compare notification
426 * \param ccu6 Pointer to the base of CCU6 registers
427 * \return None
428 */
429 IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6);
430
431 /** \brief Returns the Timer pointer
432 * \param ccu6 Pointer to the base of CCU6 registers
433 * \return Timer pointer
434 */
435 IFX_INLINE volatile uint32 *IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6);
436
437 /** \brief Returns the status of module enabled or disabled
438 * \param ccu6 Pointer to the base of CCU6 registers
439 * \return Status (TRUE / FALSE)
440 */
441 IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6);
442
443 /** \brief Returns the status of T12 one notification
444 * \param ccu6 Pointer to the base of CCU6 registers
445 * \return Status (TRUE / FALSE)
446 */
447 IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6);
448
449 /** \brief Returns the status of T12 period notification
450 * \param ccu6 Pointer to the base of CCU6 registers
451 * \return Status (TRUE / FALSE)
452 */
453 IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6);
454
455 /** \brief Returns the status of T13 compare notification
456 * \param ccu6 Pointer to the base of CCU6 registers
457 * \return Status (TRUE / FALSE)
458 */
459 IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6);
460
461 /** \brief Sets the input event leading to a counting action of Timers (T12 / T13).
462 * \param ccu6 Pointer to the base of CCU6 registers
463 * \param timer Timer selection, ( Timer12 / Timer13 )
464 * \param mode Input event leading to a counting action of the timer (T12 / T13)
465 * \return None
466 */
467 IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode);
468
469 /** \brief Sets the current hall pattern for the multichannel mode (writes into shadow register)
470 * \param ccu6 Pointer to the base of CCU6 registers
471 * \param pattern Current hall pattern
472 * \return None
473 */
474 IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern);
475
476 /** \brief Sets the delay between switching from the passive state to the active state of the selected outputs (dead time)
477 * \param ccu6 Pointer to the base of CCU6 registers
478 * \param value Value of the dead time to be induced
479 * \return None
480 */
481 IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value);
482
483 /** \brief Sets the expected hall pattern for the multichannel mode (writes into shadow register)
484 * \param ccu6 Pointer to the base of CCU6 registers
485 * \param pattern Expected hall pattern
486 * \return None
487 */
488 IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern);
489
490 /** \brief Sets the event of signal T1xHR that can set the run bit T1xR by HW
491 * \param ccu6 Pointer to the base of CCU6 registers
492 * \param timer Timer selection, ( Timer12 / Timer13 )
493 * \param mode External trigger mode
494 * \return None
495 */
496 IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode);
497
498 /** \brief Sets source for the sampling of the Hall input pattern and the comparison to the current and the expected Hall pattern bit fields
499 * \param ccu6 Pointer to the base of CCU6 registers
500 * \param mode Hall sensor input trigger event
501 * \return None
502 */
503 IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode);
504
505 /** \brief Sets the input clock for timers (T12 or T13)
506 * \param ccu6 Pointer to the base of CCU6 registers
507 * \param timer Timer selection, ( Timer12 / Timer13 )
508 * \param frequency Input clock for timers (T12 or T13)
509 * \return None
510 */
511 IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency);
512
513 /** \brief Sets the selected interrupt flag
514 * \param ccu6 Pointer to the base of CCU6 registers
515 * \param source Interrupt source selection
516 * \return None
517 */
518 IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
519
520 /** \brief Sets the output pattern for the multichannel mode (writes into shadow register)
521 * \param ccu6 Pointer to the base of CCU6 registers
522 * \param pattern Output pattern for the multichannel mode.
523 * \return None
524 */
525 IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern);
526
527 /** \brief Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP
528 * \param ccu6 Pointer to the base of CCU6 registers
529 * \param mode Trigger request source (next multi-channel event) for the shadow transfer MCM_ST
530 * \return None
531 */
532 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode);
533
534 /** \brief Sets the synchronization mechanism of the shadow transfer event MCM_ST\n
535 * if it has been requested before (flag R set by an event selected by SWSEL) and if MCMEN = 1
536 * \param ccu6 Pointer to the base of CCU6 registers
537 * \param sync Synchronization mechanism of the shadow transfer event MCM_ST
538 * \return None
539 */
540 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync);
541
542 /** \brief Sets the state of the corresponding compare channel, that is considered to be the passive state
543 * \param ccu6 Pointer to the base of CCU6 registers
544 * \param channelOut Capture compare output selection
545 * \param state FALSE: passive state when CC6xST == 0\n
546 * TRUE : passive state when CC6xST == 1
547 * \return None
548 */
549 IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state);
550
551 /** \brief Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the selection)
552 * \param ccu6 Pointer to the base of CCU6 registers
553 * \param t12 Timer12 choice (enable / disable)
554 * \param t13 Timer13 choice (enable / disable)
555 * \return None
556 */
557 IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
558
559 /** \brief Sets the operating mode of the Timer12 capture/compare channels
560 * \param ccu6 Pointer to the base of CCU6 registers
561 * \param channel Timer12 Capture compare channel number
562 * \param mode The operating mode for the T12 channels
563 * \return None
564 */
565 IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode);
566
567 /**
568 * \param ccu6 Pointer to the base of CCU6 registers
569 * \param mode Operating mode of Timer 12
570 * \return None
571 */
572 IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode);
573
574 /** \brief Sets the 16-bit counter value of Timer12
575 * \param ccu6 Pointer to the base of CCU6 registers
576 * \param value Counter value
577 * \return None
578 */
579 IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value);
580
581 /** \brief Sets the period value that leads Timer12 counter value to a period-match
582 * \param ccu6 Pointer to the base of CCU6 registers
583 * \param value Period value
584 * \return None
585 */
586 IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value);
587
588 /** \brief Sets the 16-bit compare value of Timer13 (writes into shadow register)
589 * \param ccu6 Pointer to the base of CCU6 registers
590 * \param value Compare value
591 * \return None
592 */
593 IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value);
594
595 /** \brief Sets the 16-bit counter value of Timer13
596 * \param ccu6 Pointer to the base of CCU6 registers
597 * \param value counter value
598 * \return None
599 */
600 IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value);
601
602 /** \brief Sets the period value that leads Timer13 counter value to a period-match
603 * \param ccu6 Pointer to the base of CCU6 registers
604 * \param value period value
605 * \return None
606 */
607 IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value);
608
609 /** \brief Sets the Timer13 trigger event direction
610 * \param ccu6 Pointer to the base of CCU6 registers
611 * \param direction T13 trigger event direction
612 * \return None
613 */
614 IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction);
615
616 /** \brief Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare signals)
617 * \param ccu6 Pointer to the base of CCU6 registers
618 * \param mode The trigger event to start T13
619 * \return None
620 */
621 IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode);
622
623 /** \brief Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid
624 * \param ccu6 Pointer to the base of CCU6 registers
625 * \param mode Trap mode selection
626 * \return None
627 */
628 IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode);
629
630 /** \brief Sets behaviour of the selected outputs when leaving the trap state after the trap condition has become inactive again.
631 * \param ccu6 Pointer to the base of CCU6 registers
632 * \param state Trap state selection
633 * \return None
634 */
635 IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state);
636
637 /** \brief starts the timers (T12, T13 individually or together based on the selection)
638 * \param ccu6 Pointer to the base of CCU6 registers
639 * \param t12 Timer12 start choice (enable / disable)
640 * \param t13 Timer13 start choice (enable / disable)
641 * \return None
642 */
643 IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
644
645 /** \brief starts the timers (T12, T13 individually or together based on the selection)
646 * \param ccu6 Pointer to the base of CCU6 registers
647 * \param t12 Timer12 stop choice (enable / disable)
648 * \param t13 Timer13 stop choice (enable / disable)
649 * \return None
650 */
651 IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
652
653 /** \brief Updates the hall pattern (current hall, expected hall, moduleation output), in a single write
654 * \param ccu6 Pointer to the base of CCU6 registers
655 * \param currentHall Current hall pattern
656 * \param expectedHall Expected hall pattern
657 * \param output Output pattern for the multichannel mode.
658 * \return None
659 */
660 IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output);
661
662 /******************************************************************************/
663 /*-------------------------Global Function Prototypes-------------------------*/
664 /******************************************************************************/
665
666 /**
667 * \param ccu6 Specifies Ccu6 module
668 * \param outputLine Output Line
669 * \param selectedTrigger Trigger selection
670 * \return None
671 */
672 IFX_EXTERN void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger);
673
674 /** \brief Routes the interrupt node pointer to the selected service requests
675 * \param ccu6 Pointer to the base of CCU6 registers
676 * \param source Interrupt source selection
677 * \param serviceRequest Selection of service request outputs
678 * \return None
679 */
680 IFX_EXTERN void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest);
681
682 /** \brief Sets the passive state level of the PWM outputs of the module
683 * \param ccu6 Pointer to the base of CCU6 registers
684 * \param channelOut Capture compare output selection
685 * \param state FALSE: The passive level is 0.
686 * TRUE : The passive level is 1.
687 * \return None
688 */
689 IFX_EXTERN void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state);
690
691 /** \brief Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xST (x=0,1,2)
692 * \param ccu6 Pointer to the base of CCU6 registers
693 * \param channel Timer12 Capture compare channel number
694 * \param state capture/compare state selection (set / clear / toggle)
695 * \return None
696 */
697 IFX_EXTERN void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state);
698
699 /** \brief Sets the 16-bit compare value of Timer12 (writes into shadow registers)
700 * \param ccu6 Pointer to the base of CCU6 registers
701 * \param channel Timer12 Capture compare channel number
702 * \param value Compare value
703 * \return None
704 */
705 IFX_EXTERN void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value);
706
707 /** \brief Sets the frequency and clock input of the Timer 12.
708 * Caution: If desired frequency cannot achieved (by successive divisions by 2) :
709 * Then the nearest frequency value is set ( >= desired value)
710 * The resulting frequency is captured in the handler element : CaptureFrequency.
711 * \param ccu6 Pointer to the base of CCU6 registers
712 * \param frequency Requested timer frequency in Hz
713 * \param period period value to be configured
714 * \param countMode Counting mode of Timer12
715 * \return Zero, if the function failed to fulfill requested frequency and resolution\n
716 * Positive, if the function can find settings close to the requested frequency and resolution above the requested
717 */
718 IFX_EXTERN float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode);
719
720 /** \brief selects the actual input signal for the timer inputs.
721 * \param ccu6 Pointer to the base of CCU6 registers
722 * \param extInput External input signal for the Timer 12
723 * \return None
724 */
725 IFX_EXTERN void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput);
726
727 /** \brief Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63ST
728 * \param ccu6 Pointer to the base of CCU6 registers
729 * \param state capture/compare state selection (set / clear / toggle)
730 * \return None
731 */
732 IFX_EXTERN void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state);
733
734 /** \brief Sets the frequency and clock input of the Timer 13
735 * Caution: If desired frequency cannot achieved (by successive divisions by 2) :
736 * Then the nearest frequency value is set ( >= desired value)
737 * The resulting frequency is captured in the handler element : captureFrequency.
738 * \param ccu6 Pointer to the base of CCU6 registers
739 * \param frequency Requested timer frequency in Hz
740 * \param period period value to be configured
741 * \return Zero, if the function failed to fulfill requested frequency and resolution\n
742 * Positive, if the function can find settings close to the requested frequency and resolution above the requested
743 */
744 IFX_EXTERN float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period);
745
746 /** \brief selects the actual input signal for the timer inputs.
747 * \param ccu6 Pointer to the base of CCU6 registers
748 * \param extInput External input signal for the Timer 13
749 * \return None
750 */
751 IFX_EXTERN void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput);
752
753 /** \} */
754
755 /** \addtogroup IfxLld_Ccu6_Std_Utility
756 * \{ */
757
758 /******************************************************************************/
759 /*-------------------------Inline Function Prototypes-------------------------*/
760 /******************************************************************************/
761
762 /** \brief Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12
763 * \param ccu6 Pointer to the base of CCU6 registers
764 * \param channel Timer12 Capture compare channel number
765 * \return Status TRUE or FALSE
766 */
767 IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
768
769 /** \brief Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0, 1, 2)\n
770 * that has been compared to the current and expected value
771 * \param ccu6 Pointer to the base of CCU6 registers
772 * \param channel Timer12 Capture compare channel number
773 * \return Status\n
774 * TRUE : The input CCPOSx has been sampled as 0\n
775 * FALSE : The input CCPOSx has been sampled as 1
776 */
777 IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
778
779 /** \brief Gets the status of the selected interrupt flag
780 * \param ccu6 Pointer to the base of CCU6 registers
781 * \param source Interrupt source selection
782 * \return Status (TRUE / FALSE)
783 */
784 IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
785
786 /** \brief indicates if the multi-channel mode functionality is available
787 * \param ccu6 Pointer to the base of CCU6 registers
788 * \return Status (TRUE / FALSE)
789 */
790 IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6);
791
792 /** \brief Gets the status of the shadow transfer request from MCMPS to MCMP
793 * \param ccu6 Pointer to the base of CCU6 registers
794 * \return Status\n
795 * FALSE: A shadow transfer MCM_ST is not requested\n
796 * TRUE: A shadow transfer MCM_ST is requested, but has not yet been executed
797 */
798 IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6);
799
800 /** \brief Returns the Timer (T12 / T13) shadow transfer enable status
801 * \param ccu6 Pointer to the base of CCU6 registers
802 * \param timer Timer selection, ( Timer12 / Timer13 )
803 * \return Status (TRUE: enable / FALSE: disable)
804 */
805 IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
806
807 /** \brief Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)
808 * \param ccu6 Pointer to the base of CCU6 registers
809 * \param channel Timer12 Capture compare channel number
810 * \return Status TRUE or FALSE
811 */
812 IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
813
814 /** \brief Returns the current counting direction of Timer12
815 * \param ccu6 Pointer to the base of CCU6 registers
816 * \return direction (up / down)
817 */
818 IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6);
819
820 /** \brief Returns the state of the Timer13 capture/compare channel CC63ST
821 * \param ccu6 Pointer to the base of CCU6 registers
822 * \return Status TRUE or FALSE
823 */
824 IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6);
825
826 /** \brief indicates the Timer blocks (T12 / T13) availability
827 * \param ccu6 Pointer to the base of CCU6 registers
828 * \param timer Timer selection, ( Timer12 / Timer13 )
829 * \return Status (TRUE / FALSE)
830 */
831 IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
832
833 /** \brief Returns the Timer (T12 / T13) run status
834 * \param ccu6 Pointer to the base of CCU6 registers
835 * \param timer Timer selection, ( Timer12 / Timer13 )
836 * \return Status (stopped / running)
837 */
838 IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
839
840 /** \brief Returns the module's suspend state.
841 * TRUE :if module is suspended.
842 * FALSE:if module is not yet suspended.
843 * \param ccu6 Pointer to CCU6 module registers
844 * \return Suspend status (TRUE / FALSE)
845 */
846 IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6);
847
848 /** \brief Configure the Module to Hard/Soft suspend mode.
849 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
850 * \param ccu6 Pointer to CCU6 module registers
851 * \param mode Module suspend mode
852 * \return None
853 */
854 IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode);
855
856 /******************************************************************************/
857 /*-------------------------Global Function Prototypes-------------------------*/
858 /******************************************************************************/
859
860 /** \brief Returns the module index of the selected CCU6 module
861 * \param ccu6 Pointer to CCU6 module registers
862 * \return CCU6 module register address
863 */
864 IFX_EXTERN Ifx_CCU6 *IfxCcu6_getAddress(IfxCcu6_Index ccu6);
865
866 /** \brief Returns the capture register value of the selected channel
867 * \param ccu6 Pointer to the base of CCU6 registers
868 * \param channel Timer12 Capture compare channel number
869 * \return current value of the capture register of a selected channel
870 */
871 IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
872
873 /** \brief Returns the capture shadow register value of the selected channel
874 * \param ccu6 Pointer to the base of CCU6 registers
875 * \param channel Timer12 Capture compare channel number
876 * \return current value of the capture shadow register of a selected channel
877 */
878 IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
879
880 /** \brief Returns CCU6 index
881 * \param ccu6 Specifies the pointer to the base of CCU6 registers
882 * \return Returns index. returns -1 in case of unknown index
883 */
884 IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6);
885
886 /** \brief Returns the service request register
887 * \param ccu6 Specifies Ccu6 module
888 * \param serviceRequest Selection of service request outputs
889 * \return The service request register
890 */
891 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest);
892
893 /** \brief Returns the current value of the timer register
894 * \param ccu6 Pointer to the base of CCU6 registers
895 * \param timer Timer selection, ( Timer12 / Timer13 )
896 * \return current value of the timer register
897 */
898 IFX_EXTERN uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
899
900 /** \} */
901
902 /** \addtogroup IfxLld_Ccu6_Std_Configuration
903 * \{ */
904
905 /******************************************************************************/
906 /*-------------------------Inline Function Prototypes-------------------------*/
907 /******************************************************************************/
908
909 /** \brief Clears all Interrupt flags
910 * \param ccu6 Pointer to the base of CCU6 registers
911 * \return None
912 */
913 IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6);
914
915 /** \brief Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies
916 * \param ccu6 Pointer to the base of CCU6 registers
917 * \param timer Timer selection, ( Timer12 / Timer13 )
918 * \return None
919 */
920 IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
921
922 /** \brief Disables the dead time generation for each compare channel (0, 1, 2) of Timer12
923 * \param ccu6 Pointer to the base of CCU6 registers
924 * \param channel Timer12 Capture compare channel number
925 * \return None
926 */
927 IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
928
929 /** \brief Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)
930 * \param ccu6 Pointer to the base of CCU6 registers
931 * \return None
932 */
933 IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6);
934
935 /** \brief Disables the selected interrupt
936 * \param ccu6 Pointer to the base of CCU6 registers
937 * \param source Interrupt source selection
938 * \return None
939 */
940 IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
941
942 /** \brief Sets multi channel mode unavailable, A write access to MCMOUTS is ignored
943 * \param ccu6 Pointer to the base of CCU6 registers
944 * \return None
945 */
946 IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6);
947
948 /** \brief Disables shadow transfers of the timers (T12, T13 individually or together based on the selection)
949 * \param ccu6 Pointer to the base of CCU6 registers
950 * \param t12 Timer12 choice (enable / disable)
951 * \param t13 Timer13 choice (enable / disable)
952 * \return None
953 */
954 IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
955
956 /** \brief Disables the single shot-mode of Timers (T12 T13).
957 * \param ccu6 Pointer to the base of CCU6 registers
958 * \param timer Timer selection, ( Timer12 / Timer13 )
959 * \return None
960 */
961 IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
962
963 /** \brief Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals\n
964 * T13 output CC63_O is equal to CC63ST
965 * \param ccu6 Pointer to the base of CCU6 registers
966 * \return None
967 */
968 IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6);
969
970 /** \brief Sets Timer12 block unavailable, A write access to T12PR is ignored
971 * \param ccu6 Pointer to the base of CCU6 registers
972 * \param timer Timer selection, ( Timer12 / Timer13 )
973 * \return None
974 */
975 IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
976
977 /** \brief Disables the trap functionality for the corresponding output signals
978 * \param ccu6 Pointer to the base of CCU6 registers
979 * \param channelOut Capture compare output selection
980 * \return None
981 */
982 IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut);
983
984 /** \brief Disables the input (pin) function for the trap generation
985 * \param ccu6 Pointer to the base of CCU6 registers
986 * \return None
987 */
988 IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6);
989
990 /** \brief Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support higher clock frequencies
991 * \param ccu6 Pointer to the base of CCU6 registers
992 * \param timer Timer selection, ( Timer12 / Timer13 )
993 * \return None
994 */
995 IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
996
997 /** \brief Sets the single shot-mode of Timers (T12, T13).
998 * \param ccu6 Pointer to the base of CCU6 registers
999 * \param t12 Timer12 choice (enable / disable)
1000 * \param t13 Timer13 choice (enable / disable)
1001 * \return None
1002 */
1003 IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
1004
1005 /** \brief Enables the dead time generation for each compare channel (0, 1, 2) of Timer12
1006 * \param ccu6 Pointer to the base of CCU6 registers
1007 * \param channel Timer12 Capture compare channel number
1008 * \return None
1009 */
1010 IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel);
1011
1012 /** \brief Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC) by the Dead-Time Counter 0
1013 * \param ccu6 Pointer to the base of CCU6 registers
1014 * \return None
1015 */
1016 IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6);
1017
1018 /** \brief Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS
1019 * \param ccu6 Pointer to the base of CCU6 registers
1020 * \return None
1021 */
1022 IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6);
1023
1024 /** \brief Enables the selected interrupt
1025 * \param ccu6 Pointer to the base of CCU6 registers
1026 * \param source Interrupt source selection
1027 * \return None
1028 */
1029 IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source);
1030
1031 /** \brief Sets multi channel mode available, A write access to MCMOUTS is executed
1032 * \param ccu6 Pointer to the base of CCU6 registers
1033 * \return None
1034 */
1035 IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6);
1036
1037 /** \brief Enables the Multi Channel Mode Availability
1038 * \param ccu6 Pointer to the base of CCU6 registers
1039 * \return None
1040 */
1041 IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6);
1042
1043 /** \brief Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.
1044 * \param ccu6 Pointer to the base of CCU6 registers
1045 * \return None
1046 */
1047 IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6);
1048
1049 /** \brief Enables the shadow transfer T12_ST if flag MCMOUT.R is set or\n
1050 * becomes set while a T12 one match is detected while counting down
1051 * \param ccu6 Pointer to the base of CCU6 registers
1052 * \return None
1053 */
1054 IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6);
1055
1056 /** \brief Enables the shadow transfer T12_ST if flag MCMOUT.R is set or\n
1057 * becomes set while a T12 period match is detected while counting up
1058 * \param ccu6 Pointer to the base of CCU6 registers
1059 * \return None
1060 */
1061 IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6);
1062
1063 /** \brief Enables the shadow transfer T13_ST if flag MCMOUT.R is set or\n
1064 * becomes set while a T13 period match is detected
1065 * \param ccu6 Pointer to the base of CCU6 registers
1066 * \return None
1067 */
1068 IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6);
1069
1070 /** \brief Enables shadow transfers of the timers (T12, T13 individually or together based on the selection)
1071 * \param ccu6 Pointer to the base of CCU6 registers
1072 * \param t12 Timer12 choice (enable / disable)
1073 * \param t13 Timer13 choice (enable / disable)
1074 * \return None
1075 */
1076 IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13);
1077
1078 /** \brief Enables the single shot-mode of Timers (T12 T13).
1079 * \param ccu6 Pointer to the base of CCU6 registers
1080 * \param timer Timer selection, ( Timer12 / Timer13 )
1081 * \return None
1082 */
1083 IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
1084
1085 /** \brief Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0, 1, 2) signals\n
1086 * T13 output CC63_O is equal to CC63ST.
1087 * \param ccu6 Pointer to the base of CCU6 registers
1088 * \return None
1089 */
1090 IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6);
1091
1092 /** \brief Sets Timer12 block available, A write access to T12PR is executed
1093 * \param ccu6 Pointer to the base of CCU6 registers
1094 * \param timer Timer selection, ( Timer12 / Timer13 )
1095 * \return None
1096 */
1097 IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer);
1098
1099 /** \brief Enables the trap functionality for the corresponding output signals
1100 * \param ccu6 Pointer to the base of CCU6 registers
1101 * \param channelOut Capture compare output selection
1102 * \return None
1103 */
1104 IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut);
1105
1106 /** \brief Enables the input (pin) function for the trap generation
1107 * \param ccu6 Pointer to the base of CCU6 registers
1108 * \return None
1109 */
1110 IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6);
1111
1112 /** \brief selects the actual input signal for the capture compare inputs.
1113 * \param ccu6 Pointer to the base of CCU6 registers
1114 * \param input Input selection, ( CC6x capture input / CTRAP input / CCPOSx input )
1115 * \param signal selection of actual input signal for the module inputs
1116 * \return None
1117 */
1118 IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal);
1119
1120 /******************************************************************************/
1121 /*-------------------------Global Function Prototypes-------------------------*/
1122 /******************************************************************************/
1123
1124 /** \brief Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.
1125 * \param ccu6 Pointer to the base of CCU6 registers
1126 * \param timer Timer selection, ( Timer12 / Timer13 )
1127 * \param channelOut Capture compare output selection
1128 * \return None
1129 */
1130 IFX_EXTERN void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut);
1131
1132 /** \brief Disables the selected CCU6 kernel
1133 * \param ccu6 Pointer to the base of CCU6 registers
1134 * \return None
1135 */
1136 IFX_EXTERN void IfxCcu6_disableModule(Ifx_CCU6 *ccu6);
1137
1138 /** \brief Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 and T13.
1139 * \param ccu6 Pointer to the base of CCU6 registers
1140 * \param timer Timer selection, ( Timer12 / Timer13 )
1141 * \param channelOut Capture compare output selection
1142 * \return None
1143 */
1144 IFX_EXTERN void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut);
1145
1146 /** \brief Enables the selected CCU6 kernel
1147 * \param ccu6 Pointer to the base of CCU6 registers
1148 * \return None
1149 */
1150 IFX_EXTERN void IfxCcu6_enableModule(Ifx_CCU6 *ccu6);
1151
1152 /** \} */
1153
1154 /** \addtogroup IfxLld_Ccu6_Std_IO
1155 * \{ */
1156
1157 /******************************************************************************/
1158 /*-------------------------Inline Function Prototypes-------------------------*/
1159 /******************************************************************************/
1160
1161 /** \brief Initialises a CC60 input pin
1162 * \param cc60In CC60 capture input CC60IN
1163 * \param inputMode The pin input mode which should be configured
1164 * \return None
1165 */
1166 IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode);
1167
1168 /** \brief Initialises a CC60 output pin
1169 * \param cc60Out CC60 compare output CC0
1170 * \param outputMode The pin output mode which should be configured
1171 * \param padDriver The pad driver mode which should be configured
1172 * \return None
1173 */
1174 IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1175
1176 /** \brief Initialises a CC61 input pin
1177 * \param cc61In CC61 capture input CC61IN
1178 * \param inputMode The pin input mode which should be configured
1179 * \return None
1180 */
1181 IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode);
1182
1183 /** \brief Initialises a CC61 output pin
1184 * \param cc61Out CC61 compare output CC1
1185 * \param outputMode The pin output mode which should be configured
1186 * \param padDriver The pad driver mode which should be configured
1187 * \return None
1188 */
1189 IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1190
1191 /** \brief Initialises a CC62 input pin
1192 * \param cc62In CC62 capture input CC62IN
1193 * \param inputMode The pin input mode which should be configured
1194 * \return None
1195 */
1196 IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode);
1197
1198 /** \brief Initialises a CC62 output pin
1199 * \param cc62Out CC62 compare output CC2
1200 * \param outputMode The pin output mode which should be configured
1201 * \param padDriver The pad driver mode which should be configured
1202 * \return None
1203 */
1204 IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1205
1206 /** \brief Initialises a CCPOS0 input pin
1207 * \param ccpos0 CC60 capture input CCPOS0
1208 * \param inputMode The pin input mode which should be configured
1209 * \return None
1210 */
1211 IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode);
1212
1213 /** \brief Initialises a CCPOS1 input pin
1214 * \param ccpos1 CC61 capture input CCPOS1
1215 * \param inputMode The pin input mode which should be configured
1216 * \return None
1217 */
1218 IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode);
1219
1220 /** \brief Initialises a CCPOS0 input pin
1221 * \param ccpos2 CC62 capture input CCPOS2
1222 * \param inputMode The pin input mode which should be configured
1223 * \return None
1224 */
1225 IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode);
1226
1227 /** \brief Initialises a COUT60 output pin
1228 * \param cout60 CC60 compare output COUT0
1229 * \param outputMode The pin output mode which should be configured
1230 * \param padDriver The pad driver mode which should be configured
1231 * \return None
1232 */
1233 IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1234
1235 /** \brief Initialises a COUT61 output pin
1236 * \param cout61 CC61 compare output COUT1
1237 * \param outputMode The pin output mode which should be configured
1238 * \param padDriver The pad driver mode which should be configured
1239 * \return None
1240 */
1241 IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1242
1243 /** \brief Initialises a COUT62 output pin
1244 * \param cout62 CC62 compare output COUT2
1245 * \param outputMode The pin output mode which should be configured
1246 * \param padDriver The pad driver mode which should be configured
1247 * \return None
1248 */
1249 IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1250
1251 /** \brief Initialises a COUT63 output pin
1252 * \param cout63 CC63 compare output COUT3
1253 * \param outputMode The pin output mode which should be configured
1254 * \param padDriver The pad driver mode which should be configured
1255 * \return None
1256 */
1257 IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1258
1259 /** \brief Initialises a CTRAP input pin
1260 * \param ctrap CTRAP input
1261 * \param inputMode The pin input mode which should be configured
1262 * \return None
1263 */
1264 IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode);
1265
1266 /** \brief Initialises a T12HR input pin
1267 * \param t12hrIn Timer 12 HR input T12HR
1268 * \param inputMode The pin input mode which should be configured
1269 * \return None
1270 */
1271 IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode);
1272
1273 /** \brief Initialises a T13HR input pin
1274 * \param t13hrIn Timer 12 HR input T12HR
1275 * \param inputMode The pin input mode which should be configured
1276 * \return None
1277 */
1278 IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode);
1279
1280 /** \} */
1281
1282 /******************************************************************************/
1283 /*-------------------------Inline Function Prototypes-------------------------*/
1284 /******************************************************************************/
1285
1286 /** \brief Provides functionality for both setting of CC60 pin direction as input and configuring pad driver
1287 * \param cc60In CC60 capture input CC60IN
1288 * \param inputMode The pin input mode which should be configured
1289 * \param padDriver Pad Driver
1290 * \return None
1291 */
1292 IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1293
1294 /** \brief Provides functionality for both setting of CC61 pin direction as input and configuring pad driver
1295 * \param cc61In CC61 capture input CC61IN
1296 * \param inputMode The pin input mode which should be configured
1297 * \param padDriver Pad Driver
1298 * \return None
1299 */
1300 IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1301
1302 /** \brief Provides functionality for both setting of CC62 pin direction as input and configuring pad driver
1303 * \param cc62In CC62 capture input CC62IN
1304 * \param inputMode The pin input mode which should be configured
1305 * \param padDriver Pad Driver
1306 * \return None
1307 */
1308 IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1309
1310 /** \brief Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver
1311 * \param ccpos0 CC60 capture input CCPOS0
1312 * \param inputMode The pin input mode which should be configured
1313 * \param padDriver Pad Driver
1314 * \return None
1315 */
1316 IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1317
1318 /** \brief Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver
1319 * \param ccpos1 CC61 capture input CCPOS1
1320 * \param inputMode The pin input mode which should be configured
1321 * \param padDriver Pad Driver
1322 * \return None
1323 */
1324 IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1325
1326 /** \brief Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver
1327 * \param ccpos2 CC62 capture input CCPOS2
1328 * \param inputMode The pin input mode which should be configured
1329 * \param padDriver Pad Driver
1330 * \return None
1331 */
1332 IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1333
1334 /** \brief Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver
1335 * \param ctrap CTRAP input
1336 * \param inputMode The pin input mode which should be configured
1337 * \param padDriver Pad Driver
1338 * \return None
1339 */
1340 IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1341
1342 /** \brief Provides functionality for both setting of T12HR pin direction as input and configuring pad driver
1343 * \param t12hrIn Timer 12 HR input T12HR
1344 * \param inputMode The pin input mode which should be configured
1345 * \param padDriver Pad driver
1346 * \return None
1347 */
1348 IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1349
1350 /** \brief Provides functionality for both setting of T13HR pin direction as input and configuring pad driver
1351 * \param t13hrIn Timer 13 HR input T13HR
1352 * \param inputMode The pin input mode which should be configured
1353 * \param padDriver Pad Driver
1354 * \return None
1355 */
1356 IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1357
1358 /** \brief Sets the sensitivity of the module to sleep signal
1359 * \param ccu6 pointer to CCU6 registers
1360 * \param mode mode selection (enable/disable)
1361 * \return None
1362 */
1363 IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode);
1364
1365 /******************************************************************************/
1366 /*-------------------------Global Function Prototypes-------------------------*/
1367 /******************************************************************************/
1368
1369 /**
1370 * \param ccu6 pointer to ccu6 registers
1371 * \return None
1372 */
1373 IFX_EXTERN void IfxCcu6_resetModule(Ifx_CCU6 *ccu6);
1374
1375 /******************************************************************************/
1376 /*---------------------Inline Function Implementations------------------------*/
1377 /******************************************************************************/
1378
1379 IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6)
1380 {
1381 ccu6->ISR.U = 0xFFFF;
1382 }
1383
1384
1385 IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1386 {
1387 Ifx_CCU6_TCTR4 tctr4;
1388 tctr4.U = 0;
1389 tctr4.B.T12RES = t12;
1390 tctr4.B.T13RES = t13;
1391 ccu6->TCTR4.U = tctr4.U;
1392 }
1393
1394
1395 IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6)
1396 {
1397 ccu6->TCTR4.B.DTRES = TRUE;
1398 }
1399
1400
1401 IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1402 {
1403 uint32 mask = (1U << source);
1404 ccu6->ISR.U = mask;
1405 }
1406
1407
1408 IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
1409 {
1410 ccu6->ISR.B.RT12OM = 1;
1411 }
1412
1413
1414 IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6)
1415 {
1416 ccu6->ISR.B.RT12PM = 1;
1417 }
1418
1419
1420 IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
1421 {
1422 ccu6->ISR.B.RT13CM = 1;
1423 }
1424
1425
1426 IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1427 {
1428 uint32 shift = ((timer * 8) + 3);
1429 uint32 mask = (1U << shift);
1430 ccu6->TCTR0.U = ccu6->TCTR0.U & ~(mask);
1431 }
1432
1433
1434 IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1435 {
1436 uint32 shift = (8 + channel);
1437 uint32 mask = (1 << shift);
1438 ccu6->T12DTC.U = ccu6->T12DTC.U & ~(mask);
1439 }
1440
1441
1442 IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
1443 {
1444 ccu6->T12MSEL.B.DBYP = FALSE;
1445 }
1446
1447
1448 IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1449 {
1450 uint32 mask = (1U << source);
1451 ccu6->IEN.U = ccu6->IEN.U & ~(mask);
1452 }
1453
1454
1455 IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6)
1456 {
1457 ccu6->MODCTR.B.MCMEN = FALSE;
1458 }
1459
1460
1461 IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1462 {
1463 Ifx_CCU6_TCTR4 tctr4;
1464 tctr4.U = 0;
1465 tctr4.B.T12STD = t12;
1466 tctr4.B.T13STD = t13;
1467 ccu6->TCTR4.U = tctr4.U;
1468 }
1469
1470
1471 IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1472 {
1473 uint32 mask = (1U << timer);
1474 ccu6->TCTR2.U = ccu6->TCTR2.U & ~(mask);
1475 }
1476
1477
1478 IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6)
1479 {
1480 ccu6->CMPSTAT.B.T13IM = FALSE;
1481 }
1482
1483
1484 IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1485 {
1486 uint32 mask = (1U << timer);
1487 ccu6->MCFG.U = ccu6->MCFG.U & ~(mask);
1488 }
1489
1490
1491 IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
1492 {
1493 uint32 shift = (8 + channelOut); // offset at location TRPCTR.8 for output CC60
1494 uint32 mask = (1U << shift);
1495 ccu6->TRPCTR.U = ccu6->TRPCTR.U & ~(mask);
1496 }
1497
1498
1499 IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6)
1500 {
1501 ccu6->TRPCTR.B.TRPPEN = FALSE;
1502 }
1503
1504
1505 IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1506 {
1507 uint32 shift = ((timer * 8) + 3);
1508 uint32 mask = (1U << shift);
1509 ccu6->TCTR0.U = ccu6->TCTR0.U | (mask);
1510 }
1511
1512
1513 IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1514 {
1515 Ifx_CCU6_TCTR4 tctr4;
1516 tctr4.U = 0;
1517 tctr4.B.T12CNT = t12;
1518 tctr4.B.T13CNT = t13;
1519 ccu6->TCTR4.U = tctr4.U;
1520 }
1521
1522
1523 IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1524 {
1525 uint32 shift = (8 + channel);
1526 uint32 mask = (1 << shift);
1527 ccu6->T12DTC.U = ccu6->T12DTC.U | (mask);
1528 }
1529
1530
1531 IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6)
1532 {
1533 ccu6->T12MSEL.B.DBYP = TRUE;
1534 }
1535
1536
1537 IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6)
1538 {
1539 ccu6->MCMOUTS.B.STRHP = TRUE;
1540 }
1541
1542
1543 IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1544 {
1545 uint32 mask = (1U << source);
1546 ccu6->IEN.U = ccu6->IEN.U | (mask);
1547 }
1548
1549
1550 IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6)
1551 {
1552 ccu6->MODCTR.B.MCMEN = TRUE;
1553 }
1554
1555
1556 IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6)
1557 {
1558 ccu6->MCFG.B.MCM = 1;
1559 }
1560
1561
1562 IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6)
1563 {
1564 ccu6->MCMOUTS.B.STRMCM = TRUE;
1565 }
1566
1567
1568 IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6)
1569 {
1570 ccu6->MCMCTR.B.STE12D = TRUE;
1571 }
1572
1573
1574 IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
1575 {
1576 ccu6->MCMCTR.B.STE12U = TRUE;
1577 }
1578
1579
1580 IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
1581 {
1582 ccu6->MCMCTR.B.STE13U = TRUE;
1583 }
1584
1585
1586 IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
1587 {
1588 Ifx_CCU6_TCTR4 tctr4;
1589 tctr4.U = 0;
1590 tctr4.B.T12STR = t12;
1591 tctr4.B.T13STR = t13;
1592 ccu6->TCTR4.U = tctr4.U;
1593 }
1594
1595
1596 IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1597 {
1598 uint32 mask = (1U << timer);
1599 ccu6->TCTR2.U = ccu6->TCTR2.U | (mask);
1600 }
1601
1602
1603 IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6)
1604 {
1605 ccu6->CMPSTAT.B.T13IM = TRUE;
1606 }
1607
1608
1609 IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1610 {
1611 uint32 mask = (1U << timer);
1612 ccu6->MCFG.U = ccu6->MCFG.U | (mask);
1613 }
1614
1615
1616 IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
1617 {
1618 uint32 shift = (8 + channelOut); // offset at location TRPCTR.8 for output CC60
1619 uint32 mask = (1U << shift);
1620 ccu6->TRPCTR.U = ccu6->TRPCTR.U | (mask);
1621 }
1622
1623
1624 IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6)
1625 {
1626 ccu6->TRPCTR.B.TRPPEN = TRUE;
1627 }
1628
1629
1630 IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1631 {
1632 uint32 shift = (12 + channel);
1633 uint32 mask = 1 << shift;
1634 return (ccu6->T12DTC.U & mask) ? TRUE : FALSE;
1635 }
1636
1637
1638 IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1639 {
1640 uint32 shift = (channel + 3);
1641 uint32 mask = (1U << shift);
1642 return (ccu6->CMPSTAT.U & mask) ? TRUE : FALSE;
1643 }
1644
1645
1646 IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1647 {
1648 uint32 shift = (1U << source);
1649 return (ccu6->IS.U & shift) ? TRUE : FALSE;
1650 }
1651
1652
1653 IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6)
1654 {
1655 return ccu6->MCFG.B.MCM != 0;
1656 }
1657
1658
1659 IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6)
1660 {
1661 return ccu6->MCMOUT.B.R != 0;
1662 }
1663
1664
1665 IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1666 {
1667 uint32 shift = ((timer * 8) + 5);
1668 uint32 mask = (1U << shift);
1669 return (ccu6->TCTR0.U & mask) ? TRUE : FALSE;
1670 }
1671
1672
1673 IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
1674 {
1675 uint32 mask = (1U << channel);
1676 return (ccu6->CMPSTAT.U & mask) ? TRUE : FALSE;
1677 }
1678
1679
1680 IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6)
1681 {
1682 return (IfxCcu6_T12CountDirection)((ccu6->TCTR0.B.CDIR) ? TRUE : FALSE);
1683 }
1684
1685
1686 IFX_INLINE volatile uint32 *IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
1687 {
1688 return (volatile uint32 *)&ccu6->T12PR;
1689 }
1690
1691
1692 IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6)
1693 {
1694 return ccu6->CMPSTAT.B.CC63ST != 0;
1695 }
1696
1697
1698 IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1699 {
1700 uint32 mask = (1U << timer);
1701 return (ccu6->MCFG.U & mask) ? TRUE : FALSE;
1702 }
1703
1704
1705 IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
1706 {
1707 uint32 shift = ((timer * 8) + 4);
1708 uint32 mask = (1U << shift);
1709 return (IfxCcu6_TimerRunStatus)((ccu6->TCTR0.U & mask) ? TRUE : FALSE);
1710 }
1711
1712
1713 IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
1714 {
1715 IfxPort_setPinModeInput(cc60In->pin.port, cc60In->pin.pinIndex, inputMode);
1716 IfxCcu6_setCaptureCompareInputSignal(cc60In->module, IfxCcu6_CaptureCompareInput_cC60, (IfxCcu6_CaptureCompareInputSignal)cc60In->select);
1717 }
1718
1719
1720 IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1721 {
1722 IfxPort_setPinModeInput(cc60In->pin.port, cc60In->pin.pinIndex, inputMode);
1723 IfxPort_setPinPadDriver(cc60In->pin.port, cc60In->pin.pinIndex, padDriver);
1724 IfxCcu6_setCaptureCompareInputSignal(cc60In->module, IfxCcu6_CaptureCompareInput_cC60, (IfxCcu6_CaptureCompareInputSignal)cc60In->select);
1725 }
1726
1727
1728 IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1729 {
1730 IfxPort_setPinModeOutput(cc60Out->pin.port, cc60Out->pin.pinIndex, outputMode, cc60Out->select);
1731 IfxPort_setPinPadDriver(cc60Out->pin.port, cc60Out->pin.pinIndex, padDriver);
1732 }
1733
1734
1735 IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
1736 {
1737 IfxPort_setPinModeInput(cc61In->pin.port, cc61In->pin.pinIndex, inputMode);
1738 IfxCcu6_setCaptureCompareInputSignal(cc61In->module, IfxCcu6_CaptureCompareInput_cC61, (IfxCcu6_CaptureCompareInputSignal)cc61In->select);
1739 }
1740
1741
1742 IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1743 {
1744 IfxPort_setPinModeInput(cc61In->pin.port, cc61In->pin.pinIndex, inputMode);
1745 IfxPort_setPinPadDriver(cc61In->pin.port, cc61In->pin.pinIndex, padDriver);
1746 IfxCcu6_setCaptureCompareInputSignal(cc61In->module, IfxCcu6_CaptureCompareInput_cC61, (IfxCcu6_CaptureCompareInputSignal)cc61In->select);
1747 }
1748
1749
1750 IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1751 {
1752 IfxPort_setPinModeOutput(cc61Out->pin.port, cc61Out->pin.pinIndex, outputMode, cc61Out->select);
1753 IfxPort_setPinPadDriver(cc61Out->pin.port, cc61Out->pin.pinIndex, padDriver);
1754 }
1755
1756
1757 IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
1758 {
1759 IfxPort_setPinModeInput(cc62In->pin.port, cc62In->pin.pinIndex, inputMode);
1760 IfxCcu6_setCaptureCompareInputSignal(cc62In->module, IfxCcu6_CaptureCompareInput_cC62, (IfxCcu6_CaptureCompareInputSignal)cc62In->select);
1761 }
1762
1763
1764 IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1765 {
1766 IfxPort_setPinModeInput(cc62In->pin.port, cc62In->pin.pinIndex, inputMode);
1767 IfxPort_setPinPadDriver(cc62In->pin.port, cc62In->pin.pinIndex, padDriver);
1768 IfxCcu6_setCaptureCompareInputSignal(cc62In->module, IfxCcu6_CaptureCompareInput_cC62, (IfxCcu6_CaptureCompareInputSignal)cc62In->select);
1769 }
1770
1771
1772 IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1773 {
1774 IfxPort_setPinModeOutput(cc62Out->pin.port, cc62Out->pin.pinIndex, outputMode, cc62Out->select);
1775 IfxPort_setPinPadDriver(cc62Out->pin.port, cc62Out->pin.pinIndex, padDriver);
1776 }
1777
1778
1779 IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
1780 {
1781 IfxPort_setPinModeInput(ccpos0->pin.port, ccpos0->pin.pinIndex, inputMode);
1782 IfxCcu6_setCaptureCompareInputSignal(ccpos0->module, IfxCcu6_CaptureCompareInput_cCPOS0, (IfxCcu6_CaptureCompareInputSignal)ccpos0->select);
1783 }
1784
1785
1786 IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1787 {
1788 IfxPort_setPinModeInput(ccpos0->pin.port, ccpos0->pin.pinIndex, inputMode);
1789 IfxPort_setPinPadDriver(ccpos0->pin.port, ccpos0->pin.pinIndex, padDriver);
1790 IfxCcu6_setCaptureCompareInputSignal(ccpos0->module, IfxCcu6_CaptureCompareInput_cCPOS0, (IfxCcu6_CaptureCompareInputSignal)ccpos0->select);
1791 }
1792
1793
1794 IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
1795 {
1796 IfxPort_setPinModeInput(ccpos1->pin.port, ccpos1->pin.pinIndex, inputMode);
1797 IfxCcu6_setCaptureCompareInputSignal(ccpos1->module, IfxCcu6_CaptureCompareInput_cCPOS1, (IfxCcu6_CaptureCompareInputSignal)ccpos1->select);
1798 }
1799
1800
1801 IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1802 {
1803 IfxPort_setPinModeInput(ccpos1->pin.port, ccpos1->pin.pinIndex, inputMode);
1804 IfxPort_setPinPadDriver(ccpos1->pin.port, ccpos1->pin.pinIndex, padDriver);
1805 IfxCcu6_setCaptureCompareInputSignal(ccpos1->module, IfxCcu6_CaptureCompareInput_cCPOS1, (IfxCcu6_CaptureCompareInputSignal)ccpos1->select);
1806 }
1807
1808
1809 IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
1810 {
1811 IfxPort_setPinModeInput(ccpos2->pin.port, ccpos2->pin.pinIndex, inputMode);
1812 IfxCcu6_setCaptureCompareInputSignal(ccpos2->module, IfxCcu6_CaptureCompareInput_cCPOS2, (IfxCcu6_CaptureCompareInputSignal)ccpos2->select);
1813 }
1814
1815
1816 IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1817 {
1818 IfxPort_setPinModeInput(ccpos2->pin.port, ccpos2->pin.pinIndex, inputMode);
1819 IfxPort_setPinPadDriver(ccpos2->pin.port, ccpos2->pin.pinIndex, padDriver);
1820 IfxCcu6_setCaptureCompareInputSignal(ccpos2->module, IfxCcu6_CaptureCompareInput_cCPOS2, (IfxCcu6_CaptureCompareInputSignal)ccpos2->select);
1821 }
1822
1823
1824 IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1825 {
1826 IfxPort_setPinModeOutput(cout60->pin.port, cout60->pin.pinIndex, outputMode, cout60->select);
1827 IfxPort_setPinPadDriver(cout60->pin.port, cout60->pin.pinIndex, padDriver);
1828 }
1829
1830
1831 IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1832 {
1833 IfxPort_setPinModeOutput(cout61->pin.port, cout61->pin.pinIndex, outputMode, cout61->select);
1834 IfxPort_setPinPadDriver(cout61->pin.port, cout61->pin.pinIndex, padDriver);
1835 }
1836
1837
1838 IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1839 {
1840 IfxPort_setPinModeOutput(cout62->pin.port, cout62->pin.pinIndex, outputMode, cout62->select);
1841 IfxPort_setPinPadDriver(cout62->pin.port, cout62->pin.pinIndex, padDriver);
1842 }
1843
1844
1845 IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1846 {
1847 IfxPort_setPinModeOutput(cout63->pin.port, cout63->pin.pinIndex, outputMode, cout63->select);
1848 IfxPort_setPinPadDriver(cout63->pin.port, cout63->pin.pinIndex, padDriver);
1849 }
1850
1851
1852 IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
1853 {
1854 IfxPort_setPinModeInput(ctrap->pin.port, ctrap->pin.pinIndex, inputMode);
1855 IfxCcu6_setCaptureCompareInputSignal(ctrap->module, IfxCcu6_CaptureCompareInput_cTRAP, (IfxCcu6_CaptureCompareInputSignal)ctrap->select);
1856 }
1857
1858
1859 IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1860 {
1861 IfxPort_setPinModeInput(ctrap->pin.port, ctrap->pin.pinIndex, inputMode);
1862 IfxPort_setPinPadDriver(ctrap->pin.port, ctrap->pin.pinIndex, padDriver);
1863 IfxCcu6_setCaptureCompareInputSignal(ctrap->module, IfxCcu6_CaptureCompareInput_cTRAP, (IfxCcu6_CaptureCompareInputSignal)ctrap->select);
1864 }
1865
1866
1867 IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
1868 {
1869 IfxPort_setPinModeInput(t12hrIn->pin.port, t12hrIn->pin.pinIndex, inputMode);
1870 IfxCcu6_setT12InputSignal(t12hrIn->module, t12hrIn);
1871 }
1872
1873
1874 IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1875 {
1876 IfxPort_setPinModeInput(t12hrIn->pin.port, t12hrIn->pin.pinIndex, inputMode);
1877 IfxPort_setPinPadDriver(t12hrIn->pin.port, t12hrIn->pin.pinIndex, padDriver);
1878 IfxCcu6_setT12InputSignal(t12hrIn->module, t12hrIn);
1879 }
1880
1881
1882 IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
1883 {
1884 IfxPort_setPinModeInput(t13hrIn->pin.port, t13hrIn->pin.pinIndex, inputMode);
1885 IfxCcu6_setT13InputSignal(t13hrIn->module, t13hrIn);
1886 }
1887
1888
1889 IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1890 {
1891 IfxPort_setPinModeInput(t13hrIn->pin.port, t13hrIn->pin.pinIndex, inputMode);
1892 IfxPort_setPinPadDriver(t13hrIn->pin.port, t13hrIn->pin.pinIndex, padDriver);
1893 IfxCcu6_setT13InputSignal(t13hrIn->module, t13hrIn);
1894 }
1895
1896
1897 IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
1898 {
1899 return ccu6->CLC.B.DISS == 0;
1900 }
1901
1902
1903 IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6)
1904 {
1905 Ifx_CCU6_OCS ocs;
1906
1907 // read the status
1908 ocs.U = ccu6->OCS.U;
1909
1910 // return the status
1911 return ocs.B.SUSSTA;
1912 }
1913
1914
1915 IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
1916 {
1917 return ccu6->IS.B.T12OM != 0;
1918 }
1919
1920
1921 IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6)
1922 {
1923 return ccu6->IS.B.T12PM != 0;
1924 }
1925
1926
1927 IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
1928 {
1929 return ccu6->IS.B.T13CM != 0;
1930 }
1931
1932
1933 IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
1934 {
1935 uint32 shift = (uint32)input;
1936 uint32 mask = (0x3U << shift);
1937 ccu6->PISEL0.U = (ccu6->PISEL0.U & ~mask) | ((uint32)signal << shift);
1938 }
1939
1940
1941 IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
1942 {
1943 uint32 shift = ((timer * 2) + 2);
1944 uint32 mask = (0x3U << shift);
1945 ccu6->PISEL2.U = (ccu6->PISEL2.U & ~mask) | ((uint32)mode << shift);
1946 }
1947
1948
1949 IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
1950 {
1951 ccu6->MCMOUTS.B.CURHS = pattern;
1952 }
1953
1954
1955 IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
1956 {
1957 ccu6->T12DTC.B.DTM = value;
1958 }
1959
1960
1961 IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
1962 {
1963 ccu6->MCMOUTS.B.EXPHS = pattern;
1964 }
1965
1966
1967 IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
1968 {
1969 uint32 shift = ((timer * 2) + 8);
1970 uint32 mask = (0x3U << shift);
1971 ccu6->TCTR2.U = (ccu6->TCTR2.U & ~mask) | ((uint32)mode << shift);
1972 }
1973
1974
1975 IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
1976 {
1977 uint32 shift = 12;
1978 uint32 mask = (0x7U << shift);
1979 ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((uint32)mode << shift);
1980 }
1981
1982
1983 IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
1984 {
1985 uint32 shift = (timer * 8);
1986 uint32 mask = (0x7U << shift);
1987 ccu6->TCTR0.U = (ccu6->TCTR0.U & ~mask) | ((uint32)frequency << shift);
1988 }
1989
1990
1991 IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
1992 {
1993 uint32 mask = (1U << source);
1994 ccu6->ISS.U = ccu6->ISS.U | (mask);
1995 }
1996
1997
1998 IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
1999 {
2000 ccu6->MCMOUTS.B.MCMPS = pattern;
2001 }
2002
2003
2004 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
2005 {
2006 ccu6->MCMCTR.B.SWSEL = mode;
2007 }
2008
2009
2010 IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
2011 {
2012 ccu6->MCMCTR.B.SWSYN = sync;
2013 }
2014
2015
2016 IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
2017 {
2018 uint32 shift = (channelOut + 8); // offset at location CC60PS
2019 uint32 mask = (1U << shift);
2020 ccu6->CMPSTAT.U = (ccu6->CMPSTAT.U & ~mask) | ((uint32)state << shift);
2021 }
2022
2023
2024 IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2025 {
2026 Ifx_CCU6_TCTR2 tctr2;
2027 tctr2.U = ccu6->TCTR2.U;
2028 tctr2.B.T12SSC = t12;
2029 tctr2.B.T13SSC = t13;
2030 ccu6->TCTR2.U = tctr2.U;
2031 }
2032
2033
2034 IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
2035 {
2036 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2037 IfxScuWdt_clearCpuEndinit(passwd);
2038 ccu6->CLC.B.EDIS = mode;
2039 IfxScuWdt_setCpuEndinit(passwd);
2040 }
2041
2042
2043 IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
2044 {
2045 Ifx_CCU6_OCS ocs;
2046
2047 // remove protection and configure the suspend mode.
2048 ocs.B.SUS_P = 1;
2049 ocs.B.SUS = mode;
2050 ccu6->OCS.U = ocs.U;
2051 }
2052
2053
2054 IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
2055 {
2056 uint32 shift = (4 * channel);
2057 uint32 mask = (0xFU << shift);
2058 ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((uint32)mode << shift);
2059 }
2060
2061
2062 IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
2063 {
2064 ccu6->TCTR0.B.CTM = mode;
2065 }
2066
2067
2068 IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
2069 {
2070 ccu6->T12.B.T12CV = value;
2071 }
2072
2073
2074 IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
2075 {
2076 ccu6->T12PR.B.T12PV = value;
2077 }
2078
2079
2080 IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
2081 {
2082 ccu6->CC63SR.B.CCS = value;
2083 }
2084
2085
2086 IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
2087 {
2088 ccu6->T13.B.T13CV = value;
2089 }
2090
2091
2092 IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
2093 {
2094 ccu6->T13PR.B.T13PV = value;
2095 }
2096
2097
2098 IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
2099 {
2100 ccu6->TCTR2.B.T13TED = direction;
2101 }
2102
2103
2104 IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
2105 {
2106 ccu6->TCTR2.B.T13TEC = mode;
2107 }
2108
2109
2110 IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
2111 {
2112 ccu6->TRPCTR.B.TRPM2 = mode;
2113 }
2114
2115
2116 IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
2117 {
2118 uint32 mask = 0x3U;
2119 ccu6->TRPCTR.U = (ccu6->TRPCTR.U & ~mask) | ((uint32)state);
2120 }
2121
2122
2123 IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2124 {
2125 Ifx_CCU6_TCTR4 tctr4;
2126 tctr4.U = 0;
2127 tctr4.B.T12RS = t12;
2128 tctr4.B.T13RS = t13;
2129 ccu6->TCTR4.U = tctr4.U;
2130 }
2131
2132
2133 IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
2134 {
2135 Ifx_CCU6_TCTR4 tctr4;
2136 tctr4.U = 0;
2137 tctr4.B.T12RR = t12;
2138 tctr4.B.T13RR = t13;
2139 ccu6->TCTR4.U = tctr4.U;
2140 }
2141
2142
2143 IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
2144 {
2145 Ifx_CCU6_MCMOUTS mcmouts;
2146 mcmouts.U = ccu6->MCMOUTS.U;
2147
2148 mcmouts.B.CURHS = currentHall;
2149 mcmouts.B.EXPHS = expectedHall;
2150 mcmouts.B.MCMPS = output;
2151
2152 ccu6->MCMOUTS.U = mcmouts.U;
2153 }
2154
2155
2156 #endif /* IFXCCU6_H */
IfxCcu6_enableDelayBypass
IFX_INLINE void IfxCcu6_enableDelayBypass(Ifx_CCU6 *ccu6)
Enables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC)...
Definition: IfxCcu6.h:1531
IfxCcu6_CaptureCompareInput_cC62
CC62 capture input.
Definition: IfxCcu6.h:65
IfxCcu6_resetModule
IFX_EXTERN void IfxCcu6_resetModule(Ifx_CCU6 *ccu6)
Definition: IfxCcu6.c:247
IfxCcu6_SuspendMode
IfxCcu6_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxCcu6.h:232
IfxCcu6_HallSensorTriggerMode_permanentCheck
Any edge at any of the inputs CCPOSx, independent from any PWM signal.
Definition: IfxCcu6.h:148
IfxCcu6_TimerInputSignal
IfxCcu6_TimerInputSignal
Selection of actual input signal for the timer inputs.
Definition: IfxCcu6.h:340
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:39
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:47
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2133
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:55
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:218
IfxCcu6_setMultiChannelPwmPattern
IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register)
Definition: IfxCcu6.h:1998
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:134
IfxCcu6_initCc60InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1720
IfxCcu6_enableAdditionalPrescaler
IFX_INLINE void IfxCcu6_enableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support h...
Definition: IfxCcu6.h:1505
IfxCcu6_disableAdditionalPrescaler
IFX_INLINE void IfxCcu6_disableAdditionalPrescaler(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the additional prescaler of 1/256 can be enabled for the prescaler of T12 or T13 to support ...
Definition: IfxCcu6.h:1426
IfxCcu6_disableTrapPin
IFX_INLINE void IfxCcu6_disableTrapPin(Ifx_CCU6 *ccu6)
Disables the input (pin) function for the trap generation.
Definition: IfxCcu6.h:1499
IfxCcu6_ChannelOut_cout1
CC61 compare output COUT1.
Definition: IfxCcu6.h:98
IfxCcu6_clearCounter
IFX_INLINE void IfxCcu6_clearCounter(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Clears the counters of the Timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1385
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1967
IfxCcu6_clearT13CompareNotification
IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
Clears the T13 compare notification.
Definition: IfxCcu6.h:1420
IfxCcu6_getSrcAddress
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:220
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:127
IfxCcu6_Cc60in_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCcu6_PinMap.h:42
IfxCcu6_T12ChannelMode_multiInputCaptureAny
CC6xIN any active edge : T12 stored in CC6xR, CCPOSx any active edge: T12 stored in CC6xSR...
Definition: IfxCcu6.h:265
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:71
IfxCcu6_clearAllInterruptStatusFlags
IFX_INLINE void IfxCcu6_clearAllInterruptStatusFlags(Ifx_CCU6 *ccu6)
Clears all Interrupt flags.
Definition: IfxCcu6.h:1379
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:63
IfxCcu6_TimerInputClock_fcc6By64
fcc6 / 64
Definition: IfxCcu6.h:334
IfxCcu6_initCcpos0PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1786
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1523
IfxCcu6_InterruptSource_cc62FallingEdge
Capture compare match falling edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:174
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:282
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:179
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch
T12 period match detected (while counting up)
Definition: IfxCcu6.h:196
IfxCcu6_initCc60InPin
IFX_INLINE void IfxCcu6_initCc60InPin(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode)
Initialises a CC60 input pin.
Definition: IfxCcu6.h:1713
IfxCcu6_getDeadTimeStatus
IFX_INLINE boolean IfxCcu6_getDeadTimeStatus(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Indicate the status of the dead time generation for each compare channel (0, 1, 2) of timer T12...
Definition: IfxCcu6.h:1630
IfxCcu6_T13TriggerEvent_onCCPOSxEdge
set T13R on any edge of inputs CCPOSx
Definition: IfxCcu6.h:312
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:162
IfxCcu6_InterruptSource_wrongHallEvent
Interrupt enable for wrong hall event.
Definition: IfxCcu6.h:182
IfxCcu6_MultiChannelSwitchingSelect
IfxCcu6_MultiChannelSwitchingSelect
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST fro...
Definition: IfxCcu6.h:188
IfxCcu6_TrapMode_manual
Bit TRPF stays 0, It has to be cleared by SW by writing ISR.RTRPF = 1.
Definition: IfxCcu6.h:367
IfxCcu6_getCaptureShadowRegisterValue
IFX_EXTERN uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:179
IfxCcu6_disableDeadTime
IFX_INLINE void IfxCcu6_disableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Disables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1434
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:159
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2104
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:111
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:178
IfxCcu6_HallSensorTriggerMode_cM61CountingUp
A T12 Compare-Match of compare channel CC61 while counting up (CM_61 and CDIR = 0) ...
Definition: IfxCcu6.h:155
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:180
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1609
IfxCcu6_setCaptureCompareInputSignal
IFX_INLINE void IfxCcu6_setCaptureCompareInputSignal(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareInput input, IfxCcu6_CaptureCompareInputSignal signal)
selects the actual input signal for the capture compare inputs.
Definition: IfxCcu6.h:1933
IfxCcu6_T12ChannelMode_multiInputCaptureRisingAndFalling
CC6xIN rising edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:261
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2054
IfxCcu6_CaptureCompareState_clear
Bit CC6xST is cleared.
Definition: IfxCcu6.h:87
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:93
IfxCcu6_TrapMode_automatic
Bit TRPF is cleared by HW.
Definition: IfxCcu6.h:366
IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT13UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T13_ST if flag MCMOUT.R is set or becomes set while a T13 period match is...
Definition: IfxCcu6.h:1580
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:164
IfxCcu6_disableInterrupt
IFX_INLINE void IfxCcu6_disableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Disables the selected interrupt.
Definition: IfxCcu6.h:1448
IfxCcu6_disableMultiChannelMode
IFX_INLINE void IfxCcu6_disableMultiChannelMode(Ifx_CCU6 *ccu6)
Sets multi channel mode unavailable, A write access to MCMOUTS is ignored.
Definition: IfxCcu6.h:1455
IfxCcu6_TimerRunStatus_stopped
Timer T1x is stopped.
Definition: IfxCcu6.h:357
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxCcu6_CaptureCompareInput_cTRAP
CTRAP input.
Definition: IfxCcu6.h:66
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:87
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:217
IfxCcu6_InterruptSource_cc61FallingEdge
Capture compare match falling edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:170
IfxCcu6_CaptureCompareInputSignal
IfxCcu6_CaptureCompareInputSignal
Selection of actual input signal for the capture compare inputs.
Definition: IfxCcu6.h:74
IfxCcu6_getT12CaptureCompareState
IFX_INLINE boolean IfxCcu6_getT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the state of the Timer12 capture/compare channels CC6xST (x = 0, 1, 2)
Definition: IfxCcu6.h:1673
float32
float float32
Definition: Platform_Types.h:167
IfxCcu6_MultiChannelSwitchingSelect_t12OneMatch
T12 one-match (while counting down)
Definition: IfxCcu6.h:193
IfxCcu6_HallSensorTriggerMode_t12PMCountingUp
A T12 Period-Match while counting up (T12_PM and CDIR = 0)
Definition: IfxCcu6.h:153
IfxCcu6_MultiChannelSwitchingSync_direct
Direct, the trigger event immediately leads to the shadow transfer.
Definition: IfxCcu6.h:204
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerInputSignal_a
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:342
IfxCcu6_SleepMode_enable
enables sleep mode
Definition: IfxCcu6.h:226
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:166
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1955
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxCcu6_Cc60in_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:43
IfxCcu6_HallSensorTriggerMode
IfxCcu6_HallSensorTriggerMode
Defines the source for the sampling of the Hall input pattern and the comparison to the current and t...
Definition: IfxCcu6.h:146
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:309
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1772
IfxCcu6_T12CountDirection
IfxCcu6_T12CountDirection
Counting direction of Timer12 Definition in Ifx_CCU.TCTR0.B.CDIR.
Definition: IfxCcu6.h:271
IfxCcu6_getShadowTransferStatus
IFX_INLINE boolean IfxCcu6_getShadowTransferStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) shadow transfer enable status.
Definition: IfxCcu6.h:1665
IfxSrc.h
SRC basic functionality.
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1831
IfxCcu6_getAddress
IFX_EXTERN Ifx_CCU6 * IfxCcu6_getAddress(IfxCcu6_Index ccu6)
Returns the module index of the selected CCU6 module.
Definition: IfxCcu6.c:141
IfxCcu6_MultiChannelSwitchingSelect_t13PeriodMatch
T13 period-match detected (while counting up)
Definition: IfxCcu6.h:192
IfxCcu6_CaptureCompareInputSignal_a
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:76
IfxCcu6_routeInterruptNode
IFX_EXTERN void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:266
IfxCcu6_enableMultiChannelMode
IFX_INLINE void IfxCcu6_enableMultiChannelMode(Ifx_CCU6 *ccu6)
Sets multi channel mode available, A write access to MCMOUTS is executed.
Definition: IfxCcu6.h:1550
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:291
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:284
IfxCcu6_TimerInputSignal_c
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:344
IfxCcu6_initCc61InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1742
IfxCcu6_initCc62InPin
IFX_INLINE void IfxCcu6_initCc62InPin(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode)
Initialises a CC62 input pin.
Definition: IfxCcu6.h:1757
IfxCpu_Intrinsics.h
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:305
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:320
IfxCcu6_ChannelOut_cc1
CC61 compare output CC1.
Definition: IfxCcu6.h:97
IfxCcu6_disableTimer
IFX_INLINE void IfxCcu6_disableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block unavailable, A write access to T12PR is ignored.
Definition: IfxCcu6.h:1484
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:168
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1698
IfxCcu6_setSingleShotModeEnable
IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the sel...
Definition: IfxCcu6.h:2024
IfxCcu6_disableModule
IFX_EXTERN void IfxCcu6_disableModule(Ifx_CCU6 *ccu6)
Disables the selected CCU6 kernel.
Definition: IfxCcu6.c:84
IfxCcu6_HallSensorTriggerMode_cM63
A T13 Compare-Match.
Definition: IfxCcu6.h:150
IfxCcu6_CaptureCompareInputSignal_b
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:77
IfxCcu6_setTrapState
IFX_INLINE void IfxCcu6_setTrapState(Ifx_CCU6 *ccu6, IfxCcu6_TrapState state)
Sets behaviour of the selected outputs when leaving the trap state after the trap condition has becom...
Definition: IfxCcu6.h:2116
IfxCcu6_disableSingleShotMode
IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1471
IfxCcu6_ExternalTriggerMode_anyEdge
Bit T1xR is set if an edge of signal T1xHR is detected.
Definition: IfxCcu6.h:139
IfxCcu6_Cc60_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxCcu6_PinMap.h:115
IfxCcu6_isT13CompareNotification
IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification.
Definition: IfxCcu6.h:1927
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2068
IfxCcu6_setT12Frequency
IFX_EXTERN float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:360
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:253
IfxCcu6_TimerInputSignal_h
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:349
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1586
IfxCcu6_setHallSensorTriggerMode
IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expe...
Definition: IfxCcu6.h:1975
IfxCcu6_SleepMode
IfxCcu6_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_CCU6.CLC.B.EDIS.
Definition: IfxCcu6.h:224
IfxCcu6_getHallPatternSampleState
IFX_INLINE boolean IfxCcu6_getHallPatternSampleState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the value of the input Hall pattern of the Timer12 capture/compare channels CC6POS6x (x = 0...
Definition: IfxCcu6.h:1638
IfxScuWdt.h
SCU basic functionality.
IfxCcu6_Cc60in_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:41
IfxCcu6_setInterruptStatusFlag
IFX_INLINE void IfxCcu6_setInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Sets the selected interrupt flag.
Definition: IfxCcu6.h:1991
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1824
IfxCcu6_getT12CountDirection
IFX_INLINE IfxCcu6_T12CountDirection IfxCcu6_getT12CountDirection(Ifx_CCU6 *ccu6)
Returns the current counting direction of Timer12.
Definition: IfxCcu6.h:1680
IfxCcu6_T12ChannelMode_multiInputCaptureBothRising
CC6xIN rising edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:263
IfxCcu6_T12ChannelMode_multiInputCaptureBothFalling
CC6xIN falling edge: T12 stored in CC6xR, CCPOSx falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:264
IfxCcu6_CaptureCompareState_toggle
Bit CC6xST is toggled.
Definition: IfxCcu6.h:88
IfxCcu6_TimerRunStatus
IfxCcu6_TimerRunStatus
Timer (T12 / T13) run status Definition in Ifx_CCU.TCTR0.B.T12R and Ifx_CCU.TCTR0.B.T13R.
Definition: IfxCcu6.h:355
IfxCcu6_setSleepMode
IFX_INLINE void IfxCcu6_setSleepMode(Ifx_CCU6 *ccu6, IfxCcu6_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxCcu6.h:2034
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRisingAndFalling
CC6xIN rising edge: T12 stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:254
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch
A T13 zero-match triggers the shadow transfer.
Definition: IfxCcu6.h:206
IfxCcu6_TimerInputSignal_e
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:346
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:151
IfxCcu6_CaptureCompareInput_cCPOS1
CCPOS1 input.
Definition: IfxCcu6.h:68
IfxCcu6_CaptureCompareInput_cC61
CC61 capture input.
Definition: IfxCcu6.h:64
IfxCcu6_CountingInputMode_externalRising
The timer T1x is counting each rising edge detected in the selected T1xHR signal. ...
Definition: IfxCcu6.h:113
IfxCcu6_HallSensorTriggerMode_cM61CountingDown
A T12 Compare-Match of compare channel CC61 while counting down (CM_61 and CDIR = 1) ...
Definition: IfxCcu6.h:156
IfxCcu6_TimerInputSignal_f
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:347
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1596
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:63
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu6_T13TriggerDirection_anyT12
independent on the count direction of T12
Definition: IfxCcu6.h:296
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1543
IfxCcu6_T13TriggerEvent_onT12Zero
set T13R upon a zero-match of T12 (while counting up)
Definition: IfxCcu6.h:310
IfxCcu6_T13TriggerEvent_onCC62RCompare
set T13R on a T12 compare event on channel 2
Definition: IfxCcu6.h:307
IfxCcu6_ChannelOut_cc0
CC60 compare output CC0.
Definition: IfxCcu6.h:95
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCcu6_ChannelOut_cout2
CC62 compare output COUT2.
Definition: IfxCcu6.h:100
IfxCcu6_TimerInputClock_fcc6By128
fcc6 / 128
Definition: IfxCcu6.h:335
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:107
IfxCcu6_TimerInputClock_fcc6By16
fcc6 / 16
Definition: IfxCcu6.h:332
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:319
IfxCcu6_CaptureCompareInput_cCPOS2
CCPOS2 input.
Definition: IfxCcu6.h:69
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IfxCcu6_TrapState_t13Sync
The trap state is left when a zeromatch of T13 is detected.
Definition: IfxCcu6.h:378
IfxCcu6_setTrapMode
IFX_INLINE void IfxCcu6_setTrapMode(Ifx_CCU6 *ccu6, IfxCcu6_TrapMode mode)
Sets the mode of clearing the trap flag TRPF after the trap input condition is no longer valid...
Definition: IfxCcu6.h:2110
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2004
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:135
IfxCcu6_TimerInputSignal_g
defines the input signal used as T1xHR input.
Definition: IfxCcu6.h:348
IfxCcu6_CaptureCompareState_set
Bit CC6xST is set.
Definition: IfxCcu6.h:86
IfxCcu6_getT13CaptureCompareState
IFX_INLINE boolean IfxCcu6_getT13CaptureCompareState(Ifx_CCU6 *ccu6)
Returns the state of the Timer13 capture/compare channel CC63ST.
Definition: IfxCcu6.h:1692
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:101
IfxCcu6_T12CountDirection_down
Counting down.
Definition: IfxCcu6.h:274
IfxCcu6_setT13InputSignal
IFX_EXTERN void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:493
IfxCcu6_isModuleSuspended
IFX_INLINE boolean IfxCcu6_isModuleSuspended(Ifx_CCU6 *ccu6)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxCcu6.h:1903
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2062
IfxCcu6_TimerInputClock_fcc6By32
fcc6 / 32
Definition: IfxCcu6.h:333
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:293
IfxCcu6_readTimer
IFX_EXTERN uint32 IfxCcu6_readTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the current value of the timer register.
Definition: IfxCcu6.c:230
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:135
IfxCcu6_HallSensorTriggerMode_off
Hall sampling triggered by HW sources is switched off.
Definition: IfxCcu6.h:152
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1728
IfxCcu6_enableMultiChannelModeAvailability
IFX_INLINE void IfxCcu6_enableMultiChannelModeAvailability(Ifx_CCU6 *ccu6)
Enables the Multi Channel Mode Availability.
Definition: IfxCcu6.h:1556
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:241
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:176
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:250
IfxCcu6_initCc61InPin
IFX_INLINE void IfxCcu6_initCc61InPin(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode)
Initialises a CC61 input pin.
Definition: IfxCcu6.h:1735
IfxCcu6_enableMultiChannelPwmPatternShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelPwmPatternShadowTransfer(Ifx_CCU6 *ccu6)
Sets MCM_ST immediately to update bit field MCMP by the value of MCMPS.
Definition: IfxCcu6.h:1562
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu6_enableHallPatternShadowTransfer
IFX_INLINE void IfxCcu6_enableHallPatternShadowTransfer(Ifx_CCU6 *ccu6)
Sets HP_ST immediately to update bit fields EXPH and CURH by EXPHS and CURHS.
Definition: IfxCcu6.h:1537
IfxCcu6_disableT13InvertedModulation
IFX_INLINE void IfxCcu6_disableT13InvertedModulation(Ifx_CCU6 *ccu6)
Disables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0...
Definition: IfxCcu6.h:1478
IfxCcu6_MultiChannelSwitchingSelect_correctHallEvent
Correct Hall pattern detected (CM_CHE)
Definition: IfxCcu6.h:191
IfxCcu6_T13TriggerEvent_onCC61RCompare
set T13R on a T12 compare event on channel 1
Definition: IfxCcu6.h:306
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:213
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:302
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:109
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:317
IfxCcu6_T13TriggerEvent_onAnyT12Compare
set T13R on any T12 compare event (ch. 0, 1, 2)
Definition: IfxCcu6.h:308
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1897
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:255
IfxCcu6_T12ChannelMode_off
Capture/Compare modes switched off.
Definition: IfxCcu6.h:252
IfxCcu6_initT13hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1889
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxCcu6_TrapState_t12Sync
The trap state is left when a zero-match of T12 (while counting up) is detected.
Definition: IfxCcu6.h:376
IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus
IFX_INLINE boolean IfxCcu6_getMultiChannelPWMPatternShadowTransferStatus(Ifx_CCU6 *ccu6)
Gets the status of the shadow transfer request from MCMPS to MCMP.
Definition: IfxCcu6.h:1659
IfxCcu6_initCtrapPinWithPadLevel
IFX_INLINE void IfxCcu6_initCtrapPinWithPadLevel(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CTRAP pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1859
IfxCcu6_DelayBypass_active
Dead-Time Counter 0 is not used for a delay.
Definition: IfxCcu6.h:126
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:294
IfxCcu6_clearInterruptStatusFlag
IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag.
Definition: IfxCcu6.h:1401
IfxCcu6_getInterruptStatusFlag
IFX_INLINE boolean IfxCcu6_getInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Gets the status of the selected interrupt flag.
Definition: IfxCcu6.h:1646
IfxCcu6_enableCountEvent
IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13).
Definition: IfxCcu6.h:1513
IfxCcu6_TimerInputClock_fcc6By4
fcc6 / 4
Definition: IfxCcu6.h:330
IfxCcu6_T12ChannelMode_doubleRegisterCaptureFalling
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:256
IfxCcu6_initCcpos2Pin
IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1809
IfxCcu6_HallSensorTriggerMode_t13PM
A T13 Period-Match.
Definition: IfxCcu6.h:151
IfxCcu6_SuspendMode_hard
Hard Suspend.
Definition: IfxCcu6.h:235
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1867
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:280
IfxCcu6_setSuspendMode
IFX_INLINE void IfxCcu6_setSuspendMode(Ifx_CCU6 *ccu6, IfxCcu6_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxCcu6.h:2043
IfxCcu6_setT12CompareValue
IFX_EXTERN void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:343
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:119
IfxCcu6_setCurrentHallPattern
IFX_INLINE void IfxCcu6_setCurrentHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the current hall pattern for the multichannel mode (writes into shadow register) ...
Definition: IfxCcu6.h:1949
IfxCcu6_TimerInputClock_fcc6By2
fcc6 / 2
Definition: IfxCcu6.h:329
IfxCcu6_ChannelOut_cc2
CC62 compare output CC2.
Definition: IfxCcu6.h:99
IfxCcu6_enableTrapPin
IFX_INLINE void IfxCcu6_enableTrapPin(Ifx_CCU6 *ccu6)
Enables the input (pin) function for the trap generation.
Definition: IfxCcu6.h:1624
IfxCcu6_disableModulationOutput
IFX_EXTERN void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:53
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch
T12 channel 1 compare-match detected (phase delay function)
Definition: IfxCcu6.h:194
IfxCcu6_clearT12OneNotification
IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
Clears the T12 One notification.
Definition: IfxCcu6.h:1408
IfxCcu6_disableTrap
IFX_INLINE void IfxCcu6_disableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Disables the trap functionality for the corresponding output signals.
Definition: IfxCcu6.h:1491
IfxCcu6_TrapState
IfxCcu6_TrapState
Defines the behavior of the selected outputs when leaving the trap state, after the trap condition ha...
Definition: IfxCcu6.h:374
IfxCcu6_setT12CaptureCompareState
IFX_EXTERN void IfxCcu6_setT12CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer12 channel state bits CC6xS...
Definition: IfxCcu6.c:318
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1941
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxCcu6_CountingInputMode_manual
Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account...
Definition: IfxCcu6.h:111
IfxCcu6_TimerInputClock_fcc6By8
fcc6 / 8
Definition: IfxCcu6.h:331
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2086
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:132
IfxCcu6_DelayBypass_notActive
Dead-Time Counter 0 is generating a delay after the source signal becomes active. ...
Definition: IfxCcu6.h:124
IfxCcu6_ChannelOut_cout0
CC60 compare output COUT0.
Definition: IfxCcu6.h:96
IfxCcu6_SuspendMode_none
No suspend.
Definition: IfxCcu6.h:234
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_enableT13InvertedModulation
IFX_INLINE void IfxCcu6_enableT13InvertedModulation(Ifx_CCU6 *ccu6)
Enables the Inversion of T13 signal for the modulation of the CC6x and COUT6x (x = 0...
Definition: IfxCcu6.h:1603
IfxCcu6_initCcpos2PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1816
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:304
IfxCcu6_TrapMode
IfxCcu6_TrapMode
Defines how the trap flag TRPF can be cleared after the trap input condition is no longer valid (eith...
Definition: IfxCcu6.h:364
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch
A T12 zero-match (while counting up) triggers the shadow transfer.
Definition: IfxCcu6.h:207
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1882
IfxCcu6_getIndex
IFX_EXTERN IfxCcu6_Index IfxCcu6_getIndex(Ifx_CCU6 *ccu6)
Returns CCU6 index.
Definition: IfxCcu6.c:200
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_T12ChannelMode_doubleRegisterCaptureAny
CC6xIN any active edge: CC6nSR stored in CC6xR, any active edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:257
IfxCcu6_T12ChannelMode_multiInputCaptureFallingAndRising
CC6xIN falling edge: T12 stored in CC6xR, CCPOSx rising edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:262
IfxCcu6_updateHallPattern
IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write...
Definition: IfxCcu6.h:2143
IfxCcu6_setInputClockFrequency
IFX_INLINE void IfxCcu6_setInputClockFrequency(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_TimerInputClock frequency)
Sets the input clock for timers (T12 or T13)
Definition: IfxCcu6.h:1983
IfxCcu6_setExpectedHallPattern
IFX_INLINE void IfxCcu6_setExpectedHallPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the expected hall pattern for the multichannel mode (writes into shadow register) ...
Definition: IfxCcu6.h:1961
IfxCcu6_connectTrigger
IFX_EXTERN void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:36
IfxCcu6_isT12PeriodNotification
IFX_INLINE boolean IfxCcu6_isT12PeriodNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 period notification.
Definition: IfxCcu6.h:1921
IfxCcu6_initCc62InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1764
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:177
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:243
IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT12DowncountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or becomes set while a T12 one match is de...
Definition: IfxCcu6.h:1568
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:244
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:216
IfxCcu6_isT12OneNotification
IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 one notification.
Definition: IfxCcu6.h:1915
IfxCcu6_InterruptSource_correctHallEvent
Interrupt enable for correct hall event.
Definition: IfxCcu6.h:181
IfxCcu6_DelayBypass
IfxCcu6_DelayBypass
Controls whether the source signal for the sampling of the Hall input pattern (selected by HSYNC) is ...
Definition: IfxCcu6.h:122
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxCcu6_clearDeadTimeCounters
IFX_INLINE void IfxCcu6_clearDeadTimeCounters(Ifx_CCU6 *ccu6)
Clears all the three dead-time counter channels to zero.
Definition: IfxCcu6.h:1395
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1845
IfxCcu6_InterruptSource_cc62RisingEdge
Capture compare match rising edge interrupt enable for channel CC62.
Definition: IfxCcu6.h:172
IfxCcu6_T13TriggerDirection_onT12CountingDown
while T12 is counting down
Definition: IfxCcu6.h:295
IfxCcu6_setT12InputSignal
IFX_EXTERN void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:409
IfxCcu6_initCtrapPin
IFX_INLINE void IfxCcu6_initCtrapPin(const IfxCcu6_Ctrap_In *ctrap, IfxPort_InputMode inputMode)
Initialises a CTRAP input pin.
Definition: IfxCcu6.h:1852
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:245
IfxCcu6_setOutputPassiveLevel
IFX_EXTERN void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:303
IfxCcu6_CountingInputMode_externalFalling
The timer T1x is counting each falling edge detected in the selected T1xHR signal.
Definition: IfxCcu6.h:115
IfxCcu6_getT12TimerPointer
IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
Returns the Timer pointer.
Definition: IfxCcu6.h:1686
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:77
IfxCcu6_ExternalTriggerMode_fallingEdge
Bit T1xR is set if a falling edge of signal T1xHR is detected.
Definition: IfxCcu6.h:137
IfxCcu6_SleepMode_disable
disables sleep mode
Definition: IfxCcu6.h:227
IfxCcu6_TrapState_immediate
The trap state is left immediately without any synchronization to T12 or T13.
Definition: IfxCcu6.h:380
IfxCcu6_clearT12PeriodNotification
IFX_INLINE void IfxCcu6_clearT12PeriodNotification(Ifx_CCU6 *ccu6)
Clears the T12 period notification.
Definition: IfxCcu6.h:1414
IfxCcu6_TimerRunStatus_running
Timer T1x is running.
Definition: IfxCcu6.h:358
IfxCcu6_T12CountDirection_up
Counting up.
Definition: IfxCcu6.h:273
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1461
IfxCcu6_setT13CaptureCompareState
IFX_EXTERN void IfxCcu6_setT13CaptureCompareState(Ifx_CCU6 *ccu6, IfxCcu6_CaptureCompareState state)
Sets software-control (independent set and clear conditions) for the Timer13 channel state bits CC63S...
Definition: IfxCcu6.c:418
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:79
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2098
IfxCcu6_initT12hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1874
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:143
IfxCcu6_initCcpos0Pin
IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1779
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1838
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2010
IfxCcu6_CaptureCompareInputSignal_c
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:78
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2080
IfxCcu6_CaptureCompareState
IfxCcu6_CaptureCompareState
capture/compare state to set / clear the CC6xST-bits
Definition: IfxCcu6.h:84
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxCcu6_CaptureCompareInputSignal_d
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:79
IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer
IFX_INLINE void IfxCcu6_enableMultiChannelT12UpcountingShadowTransfer(Ifx_CCU6 *ccu6)
Enables the shadow transfer T12_ST if flag MCMOUT.R is set or becomes set while a T12 period match is...
Definition: IfxCcu6.h:1574
IfxCcu6_getTimerRunStatus
IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status.
Definition: IfxCcu6.h:1705
IfxCcu6_CaptureCompareInput_cC60
CC60 capture input.
Definition: IfxCcu6.h:63
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:70
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2074
IfxCcu6_MultiChannelSwitchingSync
IfxCcu6_MultiChannelSwitchingSync
Selection of the synchronization mechanism for the shadow transfer event MCM_ST Definition in Ifx_CCU...
Definition: IfxCcu6.h:202
IfxCcu6_TimerInputClock_fcc6
fcc6
Definition: IfxCcu6.h:328
IfxCcu6_TimerInputSignal_d
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:345
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2123
IfxCcu6_initCcpos1Pin
IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin.
Definition: IfxCcu6.h:1794
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxCcu6_getMultiChannelModeAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getMultiChannelModeAvailabilityStatus(Ifx_CCU6 *ccu6)
indicates if the multi-channel mode functionality is available
Definition: IfxCcu6.h:1653
IfxCcu6_SuspendMode_soft
Soft Suspend.
Definition: IfxCcu6.h:236
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2092
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1750
IfxCcu6_TimerInputSignal_b
defines the input signal used as CC6x / CTRAP / CCPOSx / T1xHR input.
Definition: IfxCcu6.h:343
IfxCcu6_MultiChannelSwitchingSelect_noEvent
No trigger request will be generated.
Definition: IfxCcu6.h:190
IfxCcu6_initCcpos1PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1801
IfxCcu6_HallSensorTriggerMode_t12OMCountingDown
A T12 One-Match while counting down (T12_PM and CDIR = 1)
Definition: IfxCcu6.h:154
IfxCcu6_enableTrap
IFX_INLINE void IfxCcu6_enableTrap(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut)
Enables the trap functionality for the corresponding output signals.
Definition: IfxCcu6.h:1616
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxCcu6_disableDelayBypass
IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC...
Definition: IfxCcu6.h:1442
IfxCcu6_enableModule
IFX_EXTERN void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:128
IfxCcu6_T12ChannelMode_hallSensor
Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programme...
Definition: IfxCcu6.h:258
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:326
IfxCcu6_enableModulationOutput
IFX_EXTERN void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:97
IfxCcu6_T12ChannelMode_hysteresisLikecompare
Hysteresis-like compare mode.
Definition: IfxCcu6.h:260
IfxCcu6_getCaptureRegisterValue
IFX_EXTERN uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:158
IfxCcu6_setT13Frequency
IFX_EXTERN float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:444
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:215
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2016
IfxCcu6_CaptureCompareInput
IfxCcu6_CaptureCompareInput
Input selection, ( CC6x capture input / CTRAP input / CCPOSx input ) Definition in Ifx_CCU...
Definition: IfxCcu6.h:61
IfxCcu6_CaptureCompareInput_cCPOS0
CCPOS0 input.
Definition: IfxCcu6.h:67


iLLD_TC26B: IfxCcu6_Icu.c Source File

  • Ccu6
  • Icu
IfxCcu6_Icu.c
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1 /**
2 * \file IfxCcu6_Icu.c
3 * \brief CCU6 ICU details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxCcu6_Icu.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
37 {
38 uint32 timeStamp = 0;
39
40 timeStamp = IfxCcu6_getCaptureShadowRegisterValue(channel->ccu6, channel->channelId);
41
42 return timeStamp;
43 }
44
45
46 void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
47 {
48 channel->ccu6 = channelConfig->ccu6;
49
50 /* -- capture input initialisation -- */
51
52 const IfxCcu6_Icu_Pins *pins = channelConfig->pins;
53
54 if (pins != NULL_PTR)
55 {
56 IfxCcu6_Cc60in_In *cc60In = pins->cc60In;
57
58 if (cc60In != NULL_PTR)
59 {
60 IfxCcu6_initCc60InPinWithPadLevel(cc60In, pins->cc6xInputMode, pins->pinDriver);
61 }
62
63 IfxCcu6_Cc61in_In *cc61In = pins->cc61In;
64
65 if (cc61In != NULL_PTR)
66 {
67 IfxCcu6_initCc61InPinWithPadLevel(cc61In, pins->cc6xInputMode, pins->pinDriver);
68 }
69
70 IfxCcu6_Cc62in_In *cc62In = pins->cc62In;
71
72 if (cc62In != NULL_PTR)
73 {
74 IfxCcu6_initCc62InPinWithPadLevel(cc62In, pins->cc6xInputMode, pins->pinDriver);
75 }
76
77 if (channelConfig->multiInputCaptureEnabled)
78 {
79 IfxCcu6_Ccpos0_In *ccpos0 = pins->ccpos0;
80
81 if (ccpos0 != NULL_PTR)
82 {
83 IfxCcu6_initCcpos0PinWithPadLevel(ccpos0, pins->ccposxInputMode, pins->pinDriver);
84 }
85
86 IfxCcu6_Ccpos1_In *ccpos1 = pins->ccpos1;
87
88 if (ccpos1 != NULL_PTR)
89 {
90 IfxCcu6_initCcpos1PinWithPadLevel(ccpos1, pins->ccposxInputMode, pins->pinDriver);
91 }
92
93 IfxCcu6_Ccpos2_In *ccpos2 = pins->ccpos2;
94
95 if (ccpos2 != NULL_PTR)
96 {
97 IfxCcu6_initCcpos2PinWithPadLevel(ccpos2, pins->ccposxInputMode, pins->pinDriver);
98 }
99 }
100
101 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
102
103 if (t12hr != NULL_PTR)
104 {
105 IfxCcu6_initT12hrPinWithPadLevel(t12hr, pins->t1xhrInputMode, pins->pinDriver);
106 }
107
108 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
109
110 if (t13hr != NULL_PTR)
111 {
112 IfxCcu6_initT13hrPinWithPadLevel(t13hr, pins->t1xhrInputMode, pins->pinDriver);
113 }
114 }
115
116 /* -- interrupt initialisation -- */
117
118 if (channelConfig->interrupt1.priority > 0)
119 {
120 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt1.source);
121 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt1.source, channelConfig->interrupt1.serviceRequest);
122
123 volatile Ifx_SRC_SRCR *src;
124 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt1.serviceRequest);
125 IfxSrc_init(src, channelConfig->interrupt1.typeOfService, channelConfig->interrupt1.priority);
126 IfxSrc_enable(src);
127 }
128
129 if (channelConfig->interrupt2.priority > 0)
130 {
131 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt2.source);
132 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt2.source, channelConfig->interrupt2.serviceRequest);
133
134 volatile Ifx_SRC_SRCR *src;
135 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt2.serviceRequest);
136 IfxSrc_init(src, channelConfig->interrupt2.typeOfService, channelConfig->interrupt2.priority);
137 IfxSrc_enable(src);
138 }
139
140 if (channelConfig->interrupt3.priority > 0)
141 {
142 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt3.source);
143 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt3.source, channelConfig->interrupt3.serviceRequest);
144
145 volatile Ifx_SRC_SRCR *src;
146 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt3.serviceRequest);
147 IfxSrc_init(src, channelConfig->interrupt3.typeOfService, channelConfig->interrupt3.priority);
148 IfxSrc_enable(src);
149 }
150
151 if (channelConfig->interrupt4.priority > 0)
152 {
153 IfxCcu6_enableInterrupt(channelConfig->ccu6, channelConfig->interrupt4.source);
154 IfxCcu6_routeInterruptNode(channelConfig->ccu6, channelConfig->interrupt4.source, channelConfig->interrupt4.serviceRequest);
155
156 volatile Ifx_SRC_SRCR *src;
157 src = IfxCcu6_getSrcAddress(channelConfig->ccu6, channelConfig->interrupt4.serviceRequest);
158 IfxSrc_init(src, channelConfig->interrupt4.typeOfService, channelConfig->interrupt4.priority);
159 IfxSrc_enable(src);
160 }
161
162 channel->trigger = channelConfig->trigger;
163 channel->channelId = channelConfig->channelId;
164 channel->channelMode = channelConfig->channelMode;
165
166 #if IFX_CFG_USE_STANDARD_INTERFACE
167 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)icu == ((uint32)&icu->base));
168 icu->base.functions.startCapture = (Icu_StartCapture) & IfxCcu6_Icu_startCapture;
169 icu->base.functions.stopCapture = (Icu_StopCapture) & IfxCcu6_Icu_stopCapture;
170 icu->base.functions.getTimeStamp = (Icu_GetTimeStamp) & IfxCcu6_Icu_getTimeStamp;
171 #endif
172 }
173
174
175 void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
176 {
177 channelConfig->ccu6 = ccu6;
178
179 channelConfig->channelId = IfxCcu6_T12Channel_0; // default channel 0
180 channelConfig->channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising; // default CC6xIN rising edge
181
182 channelConfig->interrupt1.source = IfxCcu6_InterruptSource_cc60RisingEdge;
183 channelConfig->interrupt1.serviceRequest = IfxCcu6_ServiceRequest_0;
184 channelConfig->interrupt1.priority = 0; // interrupt priority 0
185 channelConfig->interrupt1.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
186
187 channelConfig->interrupt2.source = IfxCcu6_InterruptSource_cc60FallingEdge;
188 channelConfig->interrupt2.serviceRequest = IfxCcu6_ServiceRequest_1;
189 channelConfig->interrupt2.priority = 0; // interrupt priority 0
190 channelConfig->interrupt2.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
191
192 channelConfig->interrupt3.source = IfxCcu6_InterruptSource_cc61RisingEdge;
193 channelConfig->interrupt3.serviceRequest = IfxCcu6_ServiceRequest_2;
194 channelConfig->interrupt3.priority = 0; // interrupt priority 0
195 channelConfig->interrupt3.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
196
197 channelConfig->interrupt4.source = IfxCcu6_InterruptSource_trap;
198 channelConfig->interrupt4.serviceRequest = IfxCcu6_ServiceRequest_3;
199 channelConfig->interrupt4.priority = 0; // interrupt priority 0
200 channelConfig->interrupt4.typeOfService = IfxSrc_Tos_cpu0; // type of service CPU0
201
202 channelConfig->trigger.extInputTrigger = channelConfig->timer.trigger.t12ExtInputTrigger;
203 channelConfig->trigger.extInputTriggerMode = channelConfig->timer.trigger.extInputTriggerMode;
204
205 channelConfig->pins = NULL_PTR;
206
207 channelConfig->multiInputCaptureEnabled = FALSE;
208 }
209
210
211 void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
212 {
213 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
214 icu->ccu6 = ccu6SFR; // adding register pointer to module handler
215
216 /* -- hardware module initialisation -- */
217
218 // enable module if it hasn't been enabled by any other interface //
219 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
220 {
221 IfxCcu6_enableModule(ccu6SFR);
222 }
223
224 /* -- timer initialisation -- */
225
226 // enable Timer12 if it hasn't been enabled by any other interface //
227 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
228 {
229 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
230 }
231
232 // clock initialization //
233
234 Ifx_TimerValue period = config->period;
235
236 if (config->clock.extClockEnabled) // if external source is selected as reference
237 {
238 // input signal selection
239 if (config->clock.extClockInput != NULL_PTR)
240 {
241 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.extClockInput);
242 }
243
244 // counting input mode selection
245 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.countingInputMode);
246
247 // countining mode selection
248 IfxCcu6_setT12CountMode(ccu6SFR, config->countMode);
249
250 // period selection for center aligned mode
251 if (config->countMode == IfxCcu6_T12CountMode_centerAligned)
252 {
253 period = (period / 2) - 1;
254 }
255
256 // period setting
257 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
258
259 // frequency is meaningless here : set to 0
260 icu->captureFrequency = 0;
261 }
262 else // if internal clock is selected as reference
263 {
264 // in case of in sync with T13, T12 runs at same frequency as T13
265 icu->captureFrequency = IfxCcu6_setT12Frequency(ccu6SFR, config->frequency, period, config->countMode);
266 }
267
268 // counter initialisation //
269
270 IfxCcu6_setT12CounterValue(ccu6SFR, config->counterValue);
271 }
272
273
274 void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
275 {
276 config->ccu6 = ccu6;
277
278 config->frequency = 400000;
279 config->period = 0xFFFE; /* max(uint16) - 1 */
280
281 config->clock.extClockEnabled = FALSE;
282 config->clock.extClockInput = NULL_PTR;
283 config->clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
284
285 config->countMode = IfxCcu6_T12CountMode_edgeAligned;
286 config->counterValue = 0;
287 }
288
289
290 void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
291 {
292 if (IfxCcu6_getTimerRunStatus(channel->ccu6, IfxCcu6_TimerId_t12) != IfxCcu6_TimerRunStatus_running)
293 {
294 // enable shadow transfer
295 IfxCcu6_enableShadowTransfer(channel->ccu6, TRUE, FALSE);
296
297 // start the timer
298 if (channel->trigger.extInputTrigger != NULL_PTR)
299 {
300 // external input setting
301 IfxCcu6_setExternalRunMode(channel->ccu6, IfxCcu6_TimerId_t12, channel->trigger.extInputTriggerMode);
302 IfxCcu6_setT12InputSignal(channel->ccu6, channel->trigger.extInputTrigger);
303 }
304 else
305 {
306 // internal start
307 IfxCcu6_startTimer(channel->ccu6, TRUE, FALSE);
308 }
309 }
310
311 // enable capture mode
312 IfxCcu6_setT12ChannelMode(channel->ccu6, channel->channelId, channel->channelMode);
313 }
314
315
316 void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
317 {
318 // disable shadow transfer
319 IfxCcu6_disableShadowTransfer(channel->ccu6, TRUE, FALSE);
320
321 // disable capture mode
322 IfxCcu6_setT12ChannelMode(channel->ccu6, channel->channelId, IfxCcu6_T12ChannelMode_off);
323
324 // remove the external input
325 IfxCcu6_setExternalRunMode(channel->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
326
327 // stop the timer
328 IfxCcu6_stopTimer(channel->ccu6, TRUE, FALSE);
329 }
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:39
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:47
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2133
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:55
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:218
IfxCcu6_Icu_Channel::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_Icu.h:292
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:134
IfxCcu6_Icu_TriggerConfig::extInputTrigger
IfxCcu6_T12hr_In * extInputTrigger
External input signal selection for timer.
Definition: IfxCcu6_Icu.h:269
IfxCcu6_initCc60InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc60InPinWithPadLevel(const IfxCcu6_Cc60in_In *cc60In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC60 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1720
IfxCcu6_Icu_ChannelConfig::interrupt3
IfxCcu6_Icu_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Icu.h:306
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1967
IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel.
Definition: IfxCcu6_Icu.h:298
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:220
IfxCcu6_Icu_Pins::ccposxInputMode
IfxPort_InputMode ccposxInputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:258
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxCcu6_Icu_Channel::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_Icu.h:293
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:71
IfxCcu6_Icu_Config::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Icu.h:322
IfxCcu6_initCcpos0PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos0PinWithPadLevel(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS0 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1786
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:282
IfxCcu6_Icu_ChannelConfig::pins
IfxCcu6_Icu_Pins * pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:309
IfxCcu6_Icu_ChannelConfig::interrupt2
IfxCcu6_Icu_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Icu.h:305
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:179
IfxCcu6_Icu_Channel
Channel handle.
Definition: IfxCcu6_Icu.h:287
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:180
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1609
IfxCcu6_Icu_Channel::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Icu.h:290
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:255
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2054
IfxCcu6_Icu_Config::period
Ifx_TimerValue period
PWM period in ticks.
Definition: IfxCcu6_Icu.h:320
IfxCcu6_Icu_ChannelConfig::interrupt4
IfxCcu6_Icu_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Icu.h:307
IfxCcu6_Icu_Pins::cc62In
IFX_CONST IfxCcu6_Cc62in_In * cc62In
CC62 input signal.
Definition: IfxCcu6_Icu.h:253
IfxCcu6_InterruptSource_cc60RisingEdge
Capture compare match rising edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:164
IfxCcu6_Icu_ChannelConfig::multiInputCaptureEnabled
boolean multiInputCaptureEnabled
Choice of multi input capture.
Definition: IfxCcu6_Icu.h:310
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCcu6_Icu_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:261
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:217
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxCcu6_InterruptSource_cc60FallingEdge
Capture compare match falling edge interrupt enable for channel CC60.
Definition: IfxCcu6.h:166
IfxCcu6_Timer::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:281
IfxCcu6_Icu_Clock::extClockInput
IfxCcu6_T12hr_In * extClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Icu.h:233
IfxCcu6_Icu_initChannelConfig
void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values.
Definition: IfxCcu6_Icu.c:175
IfxCcu6_Icu_initChannel
void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxCcu6_Icu.c:46
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:266
IfxCcu6_Icu_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Icu.h:259
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:284
IfxCcu6_Icu_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Icu.h:260
Icu_StartCapture
void(* Icu_StartCapture)(Icu *handle)
Definition: Icu.h:34
IfxCcu6_initCc61InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc61InPinWithPadLevel(const IfxCcu6_Cc61in_In *cc61In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC61 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1742
IfxCcu6_Icu_Config
Configuration structure of the module.
Definition: IfxCcu6_Icu.h:316
IfxCcu6_InterruptSource_cc61RisingEdge
Capture compare match rising edge interrupt enable for channel CC61.
Definition: IfxCcu6.h:168
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1698
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2068
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:360
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1586
IfxCcu6_Icu_Pins::cc60In
IFX_CONST IfxCcu6_Cc60in_In * cc60In
CC60 input signal.
Definition: IfxCcu6_Icu.h:251
IfxCcu6_Icu
Module handle.
Definition: IfxCcu6_Icu.h:279
IfxCcu6_Icu_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: IfxCcu6_Icu.h:319
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:63
IfxCcu6_Icu_Config::clock
IfxCcu6_Icu_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:321
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1543
IfxCcu6_Icu_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_Icu.h:270
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:319
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2062
IfxCcu6_Icu_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:255
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:109
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1897
IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising
CC6xIN rising edge: CC6nSR stored in CC6xR, falling edge: T12 stored in CC6xSR.
Definition: IfxCcu6.h:255
IfxCcu6_T12ChannelMode_off
Capture/Compare modes switched off.
Definition: IfxCcu6.h:252
IfxCcu6_Icu.h
CCU6 ICU details.
IfxCcu6_initT13hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT13hrPinWithPadLevel(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T13HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1889
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxCcu6_Icu_getTimeStamp
uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) ...
Definition: IfxCcu6_Icu.c:36
IfxCcu6_Icu_Clock::extClockEnabled
boolean extClockEnabled
external clock enable / disable selection
Definition: IfxCcu6_Icu.h:232
IfxCcu6_Icu_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_Icu.h:254
IfxCcu6_Icu_stopCapture
void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
Stops the input capture.
Definition: IfxCcu6_Icu.c:316
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1941
IfxCcu6_Icu_Channel::trigger
IfxCcu6_Icu_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Icu.h:291
IfxCcu6_Icu_initModule
void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Icu.c:211
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_initCcpos2PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos2PinWithPadLevel(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS2 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1816
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_Icu_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxCcu6_Icu.h:262
IfxCcu6_Icu_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Icu.h:241
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Icu_StopCapture
void(* Icu_StopCapture)(Icu *handle)
Definition: Icu.h:35
IfxCcu6_Icu_initModuleConfig
void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Icu.c:274
IfxCcu6_Icu_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Icu.h:244
IfxCcu6_initCc62InPinWithPadLevel
IFX_INLINE void IfxCcu6_initCc62InPinWithPadLevel(const IfxCcu6_Cc62in_In *cc62In, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CC62 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1764
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:243
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:216
IfxCcu6_Icu_ChannelConfig::interrupt1
IfxCcu6_Icu_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Icu.h:304
IfxCcu6_Icu_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:256
IfxCcu6_Icu_Pins::cc6xInputMode
IfxPort_InputMode cc6xInputMode
The CC6x pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:257
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:409
IfxCcu6_Icu_Config::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Icu.h:323
IfxCcu6_TimerRunStatus_running
Timer T1x is running.
Definition: IfxCcu6.h:358
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1461
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:257
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:79
IfxCcu6_initT12hrPinWithPadLevel
IFX_INLINE void IfxCcu6_initT12hrPinWithPadLevel(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of T12HR pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1874
IfxCcu6_Icu_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Icu.h:243
IfxCcu6_getTimerRunStatus
IFX_INLINE IfxCcu6_TimerRunStatus IfxCcu6_getTimerRunStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Returns the Timer (T12 / T13) run status.
Definition: IfxCcu6.h:1705
IfxCcu6_Icu_ChannelConfig::timer
IfxCcu6_Timer timer
Timer handle.
Definition: IfxCcu6_Icu.h:311
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2074
IfxCcu6_Icu_Pins::cc61In
IFX_CONST IfxCcu6_Cc61in_In * cc61In
CC61 input signal.
Definition: IfxCcu6_Icu.h:252
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2123
TRUE
#define TRUE
Definition: Platform_Types.h:87
Icu_GetTimeStamp
void(* Icu_GetTimeStamp)(Icu *handle)
Definition: Icu.h:36
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxCcu6_initCcpos1PinWithPadLevel
IFX_INLINE void IfxCcu6_initCcpos1PinWithPadLevel(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CCPOS1 pin direction as input and configuring pad driver...
Definition: IfxCcu6.h:1801
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:128
IfxCcu6_Icu_Clock::countingInputMode
IfxCcu6_CountingInputMode countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Icu.h:234
IfxCcu6_Icu_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Icu.h:242
IfxCcu6_Icu_Pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:249
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:215
IfxCcu6_Icu::captureFrequency
float32 captureFrequency
Configured CCU6 capture frequency ( set to 0 for external counting mode)
Definition: IfxCcu6_Icu.h:282
IfxCcu6_Icu_startCapture
void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
Starts the input capture.
Definition: IfxCcu6_Icu.c:290


iLLD_TC26B: IfxCcu6_Icu.h Source File

  • Ccu6
  • Icu
IfxCcu6_Icu.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Icu.h
3 * \brief CCU6 ICU details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Ccu6_Icu_Usage How to use the CCU6 ICU Interface driver?
26 * \ingroup IfxLld_Ccu6_Icu
27 *
28 * The ICU interface driver provides a default CCU6 configuration for capturing the input from the selected channel
29 *
30 * User can select the various configuration options that hardware allows
31 *
32 * In the following sections it will be described, how to integrate the driver into the application framework.
33 *
34 *
35 * \section IfxLld_Ccu6_Icu_Preparation Preparation
36 *
37 *
38 * \subsection IfxLld_Ccu6_Icu_Include Include Files
39 *
40 * Include following header file into your C code:
41 *
42 * \code
43 * #include <Ccu6/Icu/IfxCcu6_Icu.h>
44 * \endcode
45 *
46 * \subsection IfxLld_Ccu6_Icu_Variables Variables
47 *
48 * Declare the ICU handle and channel handle as global variables in your C code:
49 *
50 * \code
51 * // used globally
52 * static IfxCcu6_Icu icu;
53 * static IfxCcu6_IcuChannel icuChannel;
54 * \endcode
55 *
56 * \subsection IfxLld_Ccu6_Icu_Interrupt Interrupt Handler Installation
57 *
58 * See also \ref IfxLld_Cpu_Irq_Usage
59 *
60 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
61 *
62 * \code
63 * // priorities are normally defined in Ifx_IntPrioDef.h
64 * #define IFX_INTPRIO_CCU6 1
65 * \endcode
66 *
67 * Add the interrupt service routine to your C code.
68 *
69 * \code
70 * IFX_INTERRUPT(ccu60ISR_Icu, 0, IFX_INTPRIO_CCU6)
71 * {
72 * //user code
73 * }
74 * \endcode
75 *
76 * Finally install the interrupt handlers in your initialisation function:
77 *
78 * \code
79 * // install interrupt handlers
80 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Icu, IFX_INTPRIO_CCU6);
81 * IfxCpu_enableInterrupts();
82 * \endcode
83 *
84 * \subsection IfxLld_Ccu6_Icu_Init Module Initialisation
85 *
86 * The module can be initialised in two ways, as a stand alone driver or in conjunction with Timer driver
87 * The module initialisation can be done in the same function. Here an example:
88 *
89 * \code
90 * // ---- when not using inconjunction with Timer driver ---- //
91 * // create configuration
92 * IfxCcu6_Icu_Config icuConfig;
93 * IfxCcu6_Icu_initModuleConfig(&icuConfig, &MODULE_CCU60);
94 *
95 * // configure the frequency of the timer in case of internal start
96 * icuConfig.frequency = 400000;
97 *
98 * // configure the period of the timer
99 * icuConfig.period = 100;
100 *
101 * // configure the clock for internal mode
102 * icuConfig.clock.extClockEnabled = FALSE;
103 * icuConfig.clock.extClockInput = NULL_PTR;
104 * icuConfig.clock.countingInputMode = IfxCcu6_CountingInputMode_internal;
105 *
106 * // configure count operation
107 * icuConfig.countMode = IfxCcu6_T12CountMode_edgeAligned;
108 * icuConfig.counterValue = 0;
109 *
110 * // initialize the module
111 * IfxCcu6_Icu_initModule(&icu, &icuConfig);
112 * // -------------------------------------------------------- //
113 *
114 * // ---- when not using inconjunction with Timer driver ---- //
115 * // after initialising the timer
116 * IfxCcu6_Timer timer;
117 * IfxCcu6_TimerConfig timerConfig;
118 * IfxCcu6_Timer_initModule(&timer, &timerConfig); // e.g. Timer 12 is specified previously in timerConfig.
119 * // -------------------------------------------------------- //
120 *
121 * // create Icu channel config
122 * IfxCcu6_Icu_channelConfig icuChannelConfig;
123 * IfxCcu6_Icu_initChannelConfig(&icuChannelConfig, &MODULE_CCU60);
124 *
125 * // ---- when using inconjunction with Timer driver ---- //
126 * icuChannelConfig.timer = (Timer*)&timer;
127 * // ---------------------------------------------------- //
128 *
129 * // configure the channel
130 * icuChannelConfig.channelNumber = IfxCcu6_T12Channel_0;
131 * icuChannelConfig.channelMode = IfxCcu6_T12ChannelMode_doubleRegisterCaptureRising;
132 *
133 * // configure the interrupts
134 * icuChannelConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc60RisingEdge;
135 * icuChannelConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
136 * icuChannelConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
137 * icuChannelConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
138 *
139 * // ---- when not using inconjunction with Timer driver ---- //
140 * // configure input and output triggers
141 * icuChannelConfig.trigger.extInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
142 * icuChannelConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
143 * // -------------------------------------------------------- //
144 *
145 * // pin configuration, in case of multi input capture mode select the respective CC6xIn and CCPOSxIn pins of the selected channel
146 * const IfxCcu6_Icu_Pins pins = {
147 * IfxCcu60_CC60INA_P02_0_IN, // CC60In pin
148 * NULL, // CC61In pin not used
149 * NULL, // CC62In pin not used
150 * NULL, // CCPOS0In pin not used
151 * NULL, // CCPOS1In pin not used
152 * NULL, // CCPOS2In pin not used
153 * IfxPort_InputMode_pullUp,
154 * IfxPort_InputMode_pullUp
155 * };
156 * IcuConfig.pins = &pins;
157 *
158 * // configure multi input capture mode
159 * icuChannelConfig->multiInputCaptureEnabled = FALSE;
160 *
161 * // initialize the channel
162 * IfxCcu6_Icu_initChannel(&icuChannel, &icuChannelConfig);
163 * \endcode
164 *
165 *
166 * The Icu is ready for use now!
167 *
168 *
169 * \section IfxLld_Ccu6_Icu_Control Control
170 *
171 *
172 * The ICU driver provides simple to use Capture Control functions
173 *
174 * This means: you can start and stop the capture process, and you can also get a time stamp at any point of time during the capture process
175 *
176 * Start Capture
177 *
178 * \code
179 * IfxCcu6_Icu_startCapture(&icuChannel);
180 * \endcode
181 *
182 * Stop Capture
183 *
184 * \code
185 * IfxCcu6_Icu_stopCapture(&icuChannel);
186 * \endcode
187 *
188 * Get time stamp at any point of time during the capture process
189 * (can also be used in ISR)
190 *
191 * \code
192 * // assumed to be declared globally
193 * // uint32 timeStamp[100] = 0;
194 *
195 * // store the time stamp in an array
196 * timeStamp[i] = IfxCcu6_Icu_getTimeStamp(&icuChannel);
197 * \endcode
198 *
199 * \defgroup IfxLld_Ccu6_Icu ICU Interface driver
200 * \ingroup IfxLld_Ccu6
201 * \defgroup IfxLld_Ccu6_Icu_DataStructures Data Structures
202 * \ingroup IfxLld_Ccu6_Icu
203 * \defgroup IfxLld_Ccu6_Icu_Module_Initialize_Functions Module Initialize Functions
204 * \ingroup IfxLld_Ccu6_Icu
205 * \defgroup IfxLld_Ccu6_Icu_Capture_Control_Functions Capture Control Functions
206 * \ingroup IfxLld_Ccu6_Icu
207 * \defgroup IfxLld_Ccu6_Icu_Channel_Initialize_Functions Channel Initialize Functions
208 * \ingroup IfxLld_Ccu6_Icu
209 */
210
211 #ifndef IFXCCU6_ICU_H
212 #define IFXCCU6_ICU_H 1
213
214 /******************************************************************************/
215 /*----------------------------------Includes----------------------------------*/
216 /******************************************************************************/
217
218 #include "Ccu6/Std/IfxCcu6.h"
219 #include "If/Ccu6If/Icu.h"
220 #include "Ccu6/Timer/IfxCcu6_Timer.h"
221
222 /******************************************************************************/
223 /*-----------------------------Data Structures--------------------------------*/
224 /******************************************************************************/
225
226 /** \addtogroup IfxLld_Ccu6_Icu_DataStructures
227 * \{ */
228 /** \brief Structure for clock configuration
229 */
230 typedef struct
231 {
232 boolean extClockEnabled; /**< \brief external clock enable / disable selection */
233 IfxCcu6_T12hr_In *extClockInput; /**< \brief External input signal selection for timer 12 */
234 IfxCcu6_CountingInputMode countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
235 } IfxCcu6_Icu_Clock;
236
237 /** \brief Structure for interrupt configuration
238 */
239 typedef struct
240 {
241 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
242 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
243 uint16 priority; /**< \brief Interrupt priority */
244 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
245 } IfxCcu6_Icu_InterruptConfig;
246
247 /** \brief Structure for capture input pins
248 */
249 typedef struct
250 {
251 IFX_CONST IfxCcu6_Cc60in_In *cc60In; /**< \brief CC60 input signal */
252 IFX_CONST IfxCcu6_Cc61in_In *cc61In; /**< \brief CC61 input signal */
253 IFX_CONST IfxCcu6_Cc62in_In *cc62In; /**< \brief CC62 input signal */
254 IFX_CONST IfxCcu6_Ccpos0_In *ccpos0; /**< \brief CCPOS0 input signal */
255 IFX_CONST IfxCcu6_Ccpos1_In *ccpos1; /**< \brief CCPOS2 input signal */
256 IFX_CONST IfxCcu6_Ccpos2_In *ccpos2; /**< \brief CCPOS2 input signal */
257 IfxPort_InputMode cc6xInputMode; /**< \brief The CC6x pin input mode which should be configured */
258 IfxPort_InputMode ccposxInputMode; /**< \brief The CCPOSx pin input mode which should be configured */
259 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
260 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
261 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
262 IfxPort_PadDriver pinDriver; /**< \brief Pad Driver */
263 } IfxCcu6_Icu_Pins;
264
265 /** \brief Configuration structure for external triggers
266 */
267 typedef struct
268 {
269 IfxCcu6_T12hr_In *extInputTrigger; /**< \brief External input signal selection for timer */
270 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T12HR that can set the run bit T12R by HW */
271 } IfxCcu6_Icu_TriggerConfig;
272
273 /** \} */
274
275 /** \addtogroup IfxLld_Ccu6_Icu_DataStructures
276 * \{ */
277 /** \brief Module handle
278 */
279 typedef struct
280 {
281 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
282 float32 captureFrequency; /**< \brief Configured CCU6 capture frequency ( set to 0 for external counting mode) */
283 } IfxCcu6_Icu;
284
285 /** \brief Channel handle
286 */
287 typedef struct
288 {
289 Icu base; /**< \brief Base ICU object */
290 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
291 IfxCcu6_Icu_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
292 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
293 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
294 } IfxCcu6_Icu_Channel;
295
296 /** \brief Configuration structure of the channel
297 */
298 typedef struct
299 {
300 Icu_Config base; /**< \brief Base configuration */
301 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
302 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
303 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
304 IfxCcu6_Icu_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
305 IfxCcu6_Icu_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
306 IfxCcu6_Icu_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
307 IfxCcu6_Icu_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
308 IfxCcu6_Icu_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
309 IfxCcu6_Icu_Pins *pins; /**< \brief Structure for capture input pins */
310 boolean multiInputCaptureEnabled; /**< \brief Choice of multi input capture */
311 IfxCcu6_Timer timer; /**< \brief Timer handle */
312 } IfxCcu6_Icu_ChannelConfig;
313
314 /** \brief Configuration structure of the module
315 */
316 typedef struct
317 {
318 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
319 float32 frequency; /**< \brief Specify expected PWM frequency in Hertz */
320 Ifx_TimerValue period; /**< \brief PWM period in ticks */
321 IfxCcu6_Icu_Clock clock; /**< \brief Structure for clock configuration */
322 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
323 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
324 } IfxCcu6_Icu_Config;
325
326 /** \} */
327
328 /** \addtogroup IfxLld_Ccu6_Icu_Module_Initialize_Functions
329 * \{ */
330
331 /******************************************************************************/
332 /*-------------------------Global Function Prototypes-------------------------*/
333 /******************************************************************************/
334
335 /** \brief Initialises the module with default configuration
336 * \param icu Module handle
337 * \param config Configuration structure of the module
338 * \return None
339 *
340 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
341 *
342 */
343 IFX_EXTERN void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config);
344
345 /** \brief Fills the config structure with default values
346 * \param config Configuration structure of the module
347 * \param ccu6 Pointer to the base of CCU6 registers
348 * \return None
349 *
350 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
351 *
352 */
353 IFX_EXTERN void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6);
354
355 /** \} */
356
357 /** \addtogroup IfxLld_Ccu6_Icu_Capture_Control_Functions
358 * \{ */
359
360 /******************************************************************************/
361 /*-------------------------Global Function Prototypes-------------------------*/
362 /******************************************************************************/
363
364 /** \brief Returns the cuurent value stored in the Compare Shadow register (current time stamp)
365 * \param channel Channel handle
366 * \return timeStamp (cuurent CC6xSR register value)
367 *
368 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
369 *
370 */
371 IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel);
372
373 /** \brief Starts the input capture
374 * \param channel Channel handle
375 * \return None
376 *
377 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
378 *
379 */
380 IFX_EXTERN void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel);
381
382 /** \brief Stops the input capture
383 * \param channel Channel handle
384 * \return None
385 *
386 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
387 *
388 */
389 IFX_EXTERN void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel);
390
391 /** \} */
392
393 /** \addtogroup IfxLld_Ccu6_Icu_Channel_Initialize_Functions
394 * \{ */
395
396 /******************************************************************************/
397 /*-------------------------Global Function Prototypes-------------------------*/
398 /******************************************************************************/
399
400 /** \brief Initialises the channel
401 * \param channel Channel handle
402 * \param channelConfig Configuration structure of the channel
403 * \return None
404 *
405 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
406 *
407 */
408 IFX_EXTERN void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig);
409
410 /** \brief Fills the channel config structure with default values
411 * \param channelConfig Configuration structure of the channel
412 * \param ccu6 Pointer to the base of CCU6 registers
413 * \return None
414 *
415 * A coding example can be found in \ref IfxLld_Ccu6_Icu_Usage
416 *
417 */
418 IFX_EXTERN void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6);
419
420 /** \} */
421
422 #endif /* IFXCCU6_ICU_H */
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:39
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:47
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:55
IfxCcu6_Icu_Channel::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_Icu.h:292
IfxCcu6_Icu_TriggerConfig::extInputTrigger
IfxCcu6_T12hr_In * extInputTrigger
External input signal selection for timer.
Definition: IfxCcu6_Icu.h:269
Icu.h
ICU interface.
IfxCcu6_Icu_ChannelConfig::interrupt3
IfxCcu6_Icu_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Icu.h:306
IfxCcu6_Icu_ChannelConfig
Configuration structure of the channel.
Definition: IfxCcu6_Icu.h:298
Icu_Config
Configuration structure of the Icu interface.
Definition: Icu.h:55
IfxCcu6_Icu_Pins::ccposxInputMode
IfxPort_InputMode ccposxInputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:258
IfxCcu6_Icu_Channel::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_Icu.h:293
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:71
IfxCcu6_Icu_Config::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Icu.h:322
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:162
IfxCcu6_Timer.h
CCU6 TIMER details.
IfxCcu6_Icu_ChannelConfig::pins
IfxCcu6_Icu_Pins * pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:309
IfxCcu6_Icu_ChannelConfig::interrupt2
IfxCcu6_Icu_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Icu.h:305
IfxCcu6_Icu_Channel
Channel handle.
Definition: IfxCcu6_Icu.h:287
IfxCcu6_Icu::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Icu.h:281
IfxCcu6_Icu_Config::period
Ifx_TimerValue period
PWM period in ticks.
Definition: IfxCcu6_Icu.h:320
IfxCcu6_Icu_Channel::base
Icu base
Base ICU object.
Definition: IfxCcu6_Icu.h:289
IfxCcu6_Icu_ChannelConfig::interrupt4
IfxCcu6_Icu_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Icu.h:307
IfxCcu6_Icu_Pins::cc62In
IFX_CONST IfxCcu6_Cc62in_In * cc62In
CC62 input signal.
Definition: IfxCcu6_Icu.h:253
IfxCcu6_Icu_ChannelConfig::multiInputCaptureEnabled
boolean multiInputCaptureEnabled
Choice of multi input capture.
Definition: IfxCcu6_Icu.h:310
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCcu6_Icu_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:261
float32
float float32
Definition: Platform_Types.h:167
IfxCcu6_Icu_Clock::extClockInput
IfxCcu6_T12hr_In * extClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Icu.h:233
IfxCcu6_Icu_initChannelConfig
IFX_EXTERN void IfxCcu6_Icu_initChannelConfig(IfxCcu6_Icu_ChannelConfig *channelConfig, Ifx_CCU6 *ccu6)
Fills the channel config structure with default values.
Definition: IfxCcu6_Icu.c:175
IfxCcu6_Icu_initChannel
IFX_EXTERN void IfxCcu6_Icu_initChannel(IfxCcu6_Icu_Channel *channel, const IfxCcu6_Icu_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxCcu6_Icu.c:46
IfxCcu6_Icu_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Icu.h:259
IfxCcu6_Icu_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Icu.h:260
IfxCcu6_Icu_Config
Configuration structure of the module.
Definition: IfxCcu6_Icu.h:316
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:276
IfxCcu6_Icu_Pins::cc60In
IFX_CONST IfxCcu6_Cc60in_In * cc60In
CC60 input signal.
Definition: IfxCcu6_Icu.h:251
IfxCcu6_Icu
Module handle.
Definition: IfxCcu6_Icu.h:279
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCcu6_Icu_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: IfxCcu6_Icu.h:319
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:63
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu6_Icu_Config::clock
IfxCcu6_Icu_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:321
IfxCcu6_Icu_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_Icu.h:270
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:107
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:241
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:250
IfxCcu6_Icu_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:255
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:213
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:280
IfxCcu6_Icu_getTimeStamp
IFX_EXTERN uint32 IfxCcu6_Icu_getTimeStamp(IfxCcu6_Icu_Channel *channel)
Returns the cuurent value stored in the Compare Shadow register (current time stamp) ...
Definition: IfxCcu6_Icu.c:36
IfxCcu6_Icu_Clock::extClockEnabled
boolean extClockEnabled
external clock enable / disable selection
Definition: IfxCcu6_Icu.h:232
IfxCcu6_Icu_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_Icu.h:254
IfxCcu6_Icu_stopCapture
IFX_EXTERN void IfxCcu6_Icu_stopCapture(IfxCcu6_Icu_Channel *channel)
Stops the input capture.
Definition: IfxCcu6_Icu.c:316
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:132
IfxCcu6_Icu_Channel::trigger
IfxCcu6_Icu_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Icu.h:291
IfxCcu6_Icu_initModule
IFX_EXTERN void IfxCcu6_Icu_initModule(IfxCcu6_Icu *icu, const IfxCcu6_Icu_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Icu.c:211
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_Icu_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxCcu6_Icu.h:262
IfxCcu6_Icu_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Icu.h:241
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_Icu_initModuleConfig
IFX_EXTERN void IfxCcu6_Icu_initModuleConfig(IfxCcu6_Icu_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Icu.c:274
IfxCcu6_Icu_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Icu.h:244
IfxCcu6_Icu_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_Icu.h:239
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxCcu6_Icu_ChannelConfig::interrupt1
IfxCcu6_Icu_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Icu.h:304
IfxCcu6_Icu_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_Icu.h:267
IfxCcu6_Icu_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_Icu.h:256
IfxCcu6_Icu_Pins::cc6xInputMode
IfxPort_InputMode cc6xInputMode
The CC6x pin input mode which should be configured.
Definition: IfxCcu6_Icu.h:257
IfxCcu6_Icu_Config::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Icu.h:323
IfxCcu6_Icu_Clock
Structure for clock configuration.
Definition: IfxCcu6_Icu.h:230
Icu_s
Structure of the Icu interface.
Definition: Icu.h:46
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:79
IfxCcu6_Icu_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Icu.h:243
IfxCcu6_Icu_ChannelConfig::timer
IfxCcu6_Timer timer
Timer handle.
Definition: IfxCcu6_Icu.h:311
IfxCcu6_Icu_Pins::cc61In
IFX_CONST IfxCcu6_Cc61in_In * cc61In
CC61 input signal.
Definition: IfxCcu6_Icu.h:252
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxCcu6_Icu_ChannelConfig::base
Icu_Config base
Base configuration.
Definition: IfxCcu6_Icu.h:300
IfxCcu6_Icu_Clock::countingInputMode
IfxCcu6_CountingInputMode countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Icu.h:234
IfxCcu6_Icu_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Icu.h:242
IfxCcu6_Icu_Pins
Structure for capture input pins.
Definition: IfxCcu6_Icu.h:249
IfxCcu6_Icu::captureFrequency
float32 captureFrequency
Configured CCU6 capture frequency ( set to 0 for external counting mode)
Definition: IfxCcu6_Icu.h:282
IfxCcu6_Icu_startCapture
IFX_EXTERN void IfxCcu6_Icu_startCapture(IfxCcu6_Icu_Channel *channel)
Starts the input capture.
Definition: IfxCcu6_Icu.c:290


iLLD_TC26B: IfxCcu6_PinMap.c Source File

  • _PinMap
IfxCcu6_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PinMap.c
3 * \brief CCU6 I/O map
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxCcu6_PinMap.h"
27
28 IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7};
29 IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7};
30 IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7};
31 IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7};
32 IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7};
33 IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7};
34 IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7};
35 IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7};
36 IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a};
37 IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b};
38 IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c};
39 IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a};
40 IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b};
41 IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c};
42 IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7};
43 IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7};
44 IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7};
45 IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7};
46 IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7};
47 IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7};
48 IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7};
49 IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7};
50 IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a};
51 IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b};
52 IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c};
53 IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a};
54 IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b};
55 IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c};
56 IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7};
57 IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7};
58 IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7};
59 IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7};
60 IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7};
61 IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7};
62 IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7};
63 IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7};
64 IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a};
65 IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b};
66 IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c};
67 IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a};
68 IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b};
69 IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c};
70 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a};
71 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c};
72 IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d};
73 IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a};
74 IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c};
75 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a};
76 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b};
77 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c};
78 IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d};
79 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a};
80 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b};
81 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c};
82 IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d};
83 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a};
84 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b};
85 IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c};
86 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a};
87 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b};
88 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c};
89 IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d};
90 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7};
91 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7};
92 IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7};
93 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7};
94 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7};
95 IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7};
96 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7};
97 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7};
98 IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7};
99 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7};
100 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7};
101 IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7};
102 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7};
103 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7};
104 IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7};
105 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7};
106 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7};
107 IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7};
108 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7};
109 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7};
110 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7};
111 IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7};
112 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7};
113 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7};
114 IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7};
115 IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a};
116 IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a};
117 IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c};
118 IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b};
119 IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c};
120 IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e};
121 IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b};
122 IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c};
123 IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e};
124 IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b};
125 IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c};
126 IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b};
127 IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c};
128
129
130 const IfxCcu6_Cc60_Out *IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS] = {
131 {
132 &IfxCcu60_CC60_P02_0_OUT,
133 &IfxCcu60_CC60_P02_6_OUT,
134 &IfxCcu60_CC60_P11_12_OUT,
135 &IfxCcu60_CC60_P15_6_OUT
136 },
137 {
138 &IfxCcu61_CC60_P00_1_OUT,
139 &IfxCcu61_CC60_P00_7_OUT,
140 &IfxCcu61_CC60_P20_8_OUT,
141 &IfxCcu61_CC60_P33_13_OUT
142 }
143 };
144
145 const IfxCcu6_Cc60in_In *IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS] = {
146 {
147 &IfxCcu60_CC60INA_P02_0_IN,
148 &IfxCcu60_CC60INB_P00_1_IN,
149 &IfxCcu60_CC60INC_P02_6_IN
150 },
151 {
152 &IfxCcu61_CC60INA_P00_1_IN,
153 &IfxCcu61_CC60INB_P02_0_IN,
154 &IfxCcu61_CC60INC_P00_7_IN
155 }
156 };
157
158 const IfxCcu6_Cc61_Out *IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS] = {
159 {
160 &IfxCcu60_CC61_P02_2_OUT,
161 &IfxCcu60_CC61_P02_7_OUT,
162 &IfxCcu60_CC61_P11_11_OUT,
163 &IfxCcu60_CC61_P15_5_OUT
164 },
165 {
166 &IfxCcu61_CC61_P00_3_OUT,
167 &IfxCcu61_CC61_P00_8_OUT,
168 &IfxCcu61_CC61_P20_9_OUT,
169 &IfxCcu61_CC61_P33_11_OUT
170 }
171 };
172
173 const IfxCcu6_Cc61in_In *IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS] = {
174 {
175 &IfxCcu60_CC61INA_P02_2_IN,
176 &IfxCcu60_CC61INB_P00_3_IN,
177 &IfxCcu60_CC61INC_P02_7_IN
178 },
179 {
180 &IfxCcu61_CC61INA_P00_3_IN,
181 &IfxCcu61_CC61INB_P02_2_IN,
182 &IfxCcu61_CC61INC_P00_8_IN
183 }
184 };
185
186 const IfxCcu6_Cc62_Out *IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS] = {
187 {
188 &IfxCcu60_CC62_P02_4_OUT,
189 &IfxCcu60_CC62_P02_8_OUT,
190 &IfxCcu60_CC62_P11_10_OUT,
191 &IfxCcu60_CC62_P15_4_OUT
192 },
193 {
194 &IfxCcu61_CC62_P00_5_OUT,
195 &IfxCcu61_CC62_P00_9_OUT,
196 &IfxCcu61_CC62_P20_10_OUT,
197 &IfxCcu61_CC62_P33_9_OUT
198 }
199 };
200
201 const IfxCcu6_Cc62in_In *IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS] = {
202 {
203 &IfxCcu60_CC62INA_P02_4_IN,
204 &IfxCcu60_CC62INB_P00_5_IN,
205 &IfxCcu60_CC62INC_P02_8_IN
206 },
207 {
208 &IfxCcu61_CC62INA_P00_5_IN,
209 &IfxCcu61_CC62INB_P02_4_IN,
210 &IfxCcu61_CC62INC_P00_9_IN
211 }
212 };
213
214 const IfxCcu6_Ccpos0_In *IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS] = {
215 {
216 &IfxCcu60_CCPOS0A_P02_6_IN,
217 NULL_PTR,
218 &IfxCcu60_CCPOS0C_P10_4_IN,
219 &IfxCcu60_CCPOS0D_P40_0_IN
220 },
221 {
222 &IfxCcu61_CCPOS0A_P00_7_IN,
223 NULL_PTR,
224 &IfxCcu61_CCPOS0C_P33_7_IN,
225 NULL_PTR
226 }
227 };
228
229 const IfxCcu6_Ccpos1_In *IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS] = {
230 {
231 &IfxCcu60_CCPOS1A_P02_7_IN,
232 &IfxCcu60_CCPOS1B_P40_1_IN,
233 &IfxCcu60_CCPOS1C_P10_7_IN,
234 &IfxCcu60_CCPOS1D_P40_2_IN
235 },
236 {
237 &IfxCcu61_CCPOS1A_P00_8_IN,
238 &IfxCcu61_CCPOS1B_P40_6_IN,
239 &IfxCcu61_CCPOS1C_P33_6_IN,
240 &IfxCcu61_CCPOS1D_P40_7_IN
241 }
242 };
243
244 const IfxCcu6_Ccpos2_In *IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS] = {
245 {
246 &IfxCcu60_CCPOS2A_P02_8_IN,
247 &IfxCcu60_CCPOS2B_P40_3_IN,
248 &IfxCcu60_CCPOS2C_P10_8_IN,
249 NULL_PTR
250 },
251 {
252 &IfxCcu61_CCPOS2A_P00_9_IN,
253 &IfxCcu61_CCPOS2B_P40_8_IN,
254 &IfxCcu61_CCPOS2C_P33_5_IN,
255 &IfxCcu61_CCPOS2D_P40_9_IN
256 }
257 };
258
259 const IfxCcu6_Cout60_Out *IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS] = {
260 {
261 &IfxCcu60_COUT60_P02_1_OUT,
262 &IfxCcu60_COUT60_P11_9_OUT,
263 &IfxCcu60_COUT60_P15_7_OUT
264 },
265 {
266 &IfxCcu61_COUT60_P00_2_OUT,
267 &IfxCcu61_COUT60_P20_11_OUT,
268 &IfxCcu61_COUT60_P33_12_OUT
269 }
270 };
271
272 const IfxCcu6_Cout61_Out *IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS] = {
273 {
274 &IfxCcu60_COUT61_P02_3_OUT,
275 &IfxCcu60_COUT61_P11_6_OUT,
276 &IfxCcu60_COUT61_P15_8_OUT
277 },
278 {
279 &IfxCcu61_COUT61_P00_4_OUT,
280 &IfxCcu61_COUT61_P20_12_OUT,
281 &IfxCcu61_COUT61_P33_10_OUT
282 }
283 };
284
285 const IfxCcu6_Cout62_Out *IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS] = {
286 {
287 &IfxCcu60_COUT62_P02_5_OUT,
288 &IfxCcu60_COUT62_P11_3_OUT,
289 &IfxCcu60_COUT62_P14_0_OUT
290 },
291 {
292 &IfxCcu61_COUT62_P00_6_OUT,
293 &IfxCcu61_COUT62_P20_13_OUT,
294 &IfxCcu61_COUT62_P33_8_OUT
295 }
296 };
297
298 const IfxCcu6_Cout63_Out *IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS] = {
299 {
300 &IfxCcu60_COUT63_P00_0_OUT,
301 &IfxCcu60_COUT63_P11_2_OUT,
302 &IfxCcu60_COUT63_P14_1_OUT,
303 &IfxCcu60_COUT63_P32_4_OUT
304 },
305 {
306 &IfxCcu61_COUT63_P00_10_OUT,
307 &IfxCcu61_COUT63_P00_12_OUT,
308 &IfxCcu61_COUT63_P20_7_OUT,
309 NULL_PTR
310 }
311 };
312
313 const IfxCcu6_Ctrap_In *IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS] = {
314 {
315 &IfxCcu60_CTRAPA_P00_11_IN,
316 NULL_PTR,
317 NULL_PTR
318 },
319 {
320 &IfxCcu61_CTRAPA_P00_0_IN,
321 NULL_PTR,
322 &IfxCcu61_CTRAPC_P33_4_IN
323 }
324 };
325
326 const IfxCcu6_T12hr_In *IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS] = {
327 {
328 NULL_PTR,
329 &IfxCcu60_T12HRB_P00_7_IN,
330 &IfxCcu60_T12HRC_P00_9_IN,
331 NULL_PTR,
332 &IfxCcu60_T12HRE_P00_0_IN
333 },
334 {
335 NULL_PTR,
336 &IfxCcu61_T12HRB_P02_6_IN,
337 &IfxCcu61_T12HRC_P02_8_IN,
338 NULL_PTR,
339 &IfxCcu61_T12HRE_P00_11_IN
340 }
341 };
342
343 const IfxCcu6_T13hr_In *IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS] = {
344 {
345 NULL_PTR,
346 &IfxCcu60_T13HRB_P00_8_IN,
347 &IfxCcu60_T13HRC_P00_9_IN
348 },
349 {
350 NULL_PTR,
351 &IfxCcu61_T13HRB_P02_7_IN,
352 &IfxCcu61_T13HRC_P02_8_IN
353 }
354 };
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:39
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:47
IfxCcu61_CCPOS1A_P00_8_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
Definition: IfxCcu6_PinMap.c:79
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:55
IfxCcu61_COUT62_P00_6_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
Definition: IfxCcu6_PinMap.c:105
IfxCcu60_CTRAPA_P00_11_IN
IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
Definition: IfxCcu6_PinMap.c:115
IfxCcu60_COUT62_P02_5_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
Definition: IfxCcu6_PinMap.c:102
IfxCcu60_T13HRB_P00_8_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
Definition: IfxCcu6_PinMap.c:124
Ifx_RxSel_e
Definition: Ifx_Types.h:116
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxCcu61_CC62_P33_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
Definition: IfxCcu6_PinMap.c:63
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:127
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:71
IfxCcu60_CC61INB_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
Definition: IfxCcu6_PinMap.c:51
IfxCcu6_Ccpos2_In_pinTable
const IfxCcu6_Ccpos2_In * IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:244
IfxCcu61_CC62_P00_9_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
Definition: IfxCcu6_PinMap.c:61
IfxCcu61_CC62INB_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
Definition: IfxCcu6_PinMap.c:68
IfxCcu60_CCPOS1C_P10_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
Definition: IfxCcu6_PinMap.c:77
IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:280
IfxCcu60_CC61INA_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
Definition: IfxCcu6_PinMap.c:50
IfxCcu61_COUT60_P00_2_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
Definition: IfxCcu6_PinMap.c:93
IfxCcu60_CC62INC_P02_8_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
Definition: IfxCcu6_PinMap.c:66
IfxCcu60_COUT63_P11_2_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
Definition: IfxCcu6_PinMap.c:109
IfxCcu61_T12HRB_P02_6_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
Definition: IfxCcu6_PinMap.c:121
IfxCcu6_Cout60_Out_pinTable
const IfxCcu6_Cout60_Out * IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:259
IfxCcu6_Cc62_Out_pinTable
const IfxCcu6_Cc62_Out * IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:186
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:159
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:111
IfxCcu60_CC60_P02_0_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
Definition: IfxCcu6_PinMap.c:28
IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:270
IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:284
IfxCcu61_CC62_P20_10_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
Definition: IfxCcu6_PinMap.c:62
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:87
IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:271
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:276
IfxCcu6_Ccpos1_In_pinTable
const IfxCcu6_Ccpos1_In * IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:229
IfxCcu60_CC61_P02_2_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
Definition: IfxCcu6_PinMap.c:42
IfxCcu60_CC61INC_P02_7_IN
IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
Definition: IfxCcu6_PinMap.c:52
IfxCcu60_CCPOS2A_P02_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
Definition: IfxCcu6_PinMap.c:83
IfxCcu6_Ctrap_In_pinTable
const IfxCcu6_Ctrap_In * IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:313
IfxCcu61_CCPOS2D_P40_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
Definition: IfxCcu6_PinMap.c:89
IfxCcu60_CC60INC_P02_6_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
Definition: IfxCcu6_PinMap.c:38
IfxCcu61_CCPOS2B_P40_8_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
Definition: IfxCcu6_PinMap.c:87
IfxCcu60_CCPOS0A_P02_6_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
Definition: IfxCcu6_PinMap.c:70
IfxCcu61_CC61INB_P02_2_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
Definition: IfxCcu6_PinMap.c:54
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu61_CC61INC_P00_8_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
Definition: IfxCcu6_PinMap.c:55
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:275
IfxCcu61_CTRAPA_P00_0_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
Definition: IfxCcu6_PinMap.c:116
IfxCcu60_CCPOS1A_P02_7_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
Definition: IfxCcu6_PinMap.c:75
IfxCcu60_T12HRB_P00_7_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
Definition: IfxCcu6_PinMap.c:118
IfxCcu60_CC61_P02_7_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
Definition: IfxCcu6_PinMap.c:43
IfxCcu61_COUT60_P33_12_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
Definition: IfxCcu6_PinMap.c:95
IfxCcu60_CC61_P11_11_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
Definition: IfxCcu6_PinMap.c:44
IfxCcu6_Cc61in_In_pinTable
const IfxCcu6_Cc61in_In * IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:173
IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:269
IfxCcu60_COUT60_P11_9_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
Definition: IfxCcu6_PinMap.c:91
IfxCcu60_T13HRC_P00_9_IN
IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:125
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:151
IfxCcu61_COUT61_P20_12_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
Definition: IfxCcu6_PinMap.c:100
IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:279
IfxCcu60_COUT63_P14_1_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
Definition: IfxCcu6_PinMap.c:110
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:63
IfxCcu61_CC60_P33_13_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
Definition: IfxCcu6_PinMap.c:35
IfxCcu61_CC62_P00_5_OUT
IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
Definition: IfxCcu6_PinMap.c:60
IfxCcu60_CC60_P02_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
Definition: IfxCcu6_PinMap.c:29
IfxCcu61_CC61_P00_3_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
Definition: IfxCcu6_PinMap.c:46
IfxCcu60_COUT62_P14_0_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
Definition: IfxCcu6_PinMap.c:104
IfxCcu60_COUT63_P00_0_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
Definition: IfxCcu6_PinMap.c:108
IfxCcu61_CC60INC_P00_7_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
Definition: IfxCcu6_PinMap.c:41
IfxCcu60_CC60INA_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
Definition: IfxCcu6_PinMap.c:36
IfxCcu60_T12HRC_P00_9_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
Definition: IfxCcu6_PinMap.c:119
IfxCcu60_CC62_P02_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
Definition: IfxCcu6_PinMap.c:56
IfxCcu61_CC60INB_P02_0_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
Definition: IfxCcu6_PinMap.c:40
IfxCcu60_T12HRE_P00_0_IN
IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
Definition: IfxCcu6_PinMap.c:120
IfxCcu60_COUT60_P02_1_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
Definition: IfxCcu6_PinMap.c:90
IfxCcu6_Ccpos0_In_pinTable
const IfxCcu6_Ccpos0_In * IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:214
IfxCcu60_CC62_P15_4_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
Definition: IfxCcu6_PinMap.c:59
IfxCcu6_Cout62_Out_pinTable
const IfxCcu6_Cout62_Out * IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:285
IfxCcu61_CCPOS0C_P33_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
Definition: IfxCcu6_PinMap.c:74
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:135
IfxCcu60_COUT62_P11_3_OUT
IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
Definition: IfxCcu6_PinMap.c:103
IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:283
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxCcu60_CCPOS0C_P10_4_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
Definition: IfxCcu6_PinMap.c:71
IfxCcu61_COUT63_P20_7_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
Definition: IfxCcu6_PinMap.c:114
IfxCcu61_CC61INA_P00_3_IN
IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
Definition: IfxCcu6_PinMap.c:53
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu61_COUT63_P00_12_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
Definition: IfxCcu6_PinMap.c:113
IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:273
IfxCcu6_T12hr_In_pinTable
const IfxCcu6_T12hr_In * IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:326
IfxCcu60_COUT61_P11_6_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
Definition: IfxCcu6_PinMap.c:97
IfxCcu61_CCPOS1C_P33_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
Definition: IfxCcu6_PinMap.c:81
IfxCcu61_CC61_P33_11_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
Definition: IfxCcu6_PinMap.c:49
IfxCcu61_CC60_P00_7_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
Definition: IfxCcu6_PinMap.c:33
IfxCcu61_T12HRC_P02_8_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:122
IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:272
IfxCcu60_COUT61_P02_3_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
Definition: IfxCcu6_PinMap.c:96
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:119
IfxCcu61_CC60INA_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
Definition: IfxCcu6_PinMap.c:39
IfxCcu60_CCPOS1B_P40_1_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
Definition: IfxCcu6_PinMap.c:76
IfxCcu61_CCPOS2A_P00_9_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
Definition: IfxCcu6_PinMap.c:86
IfxCcu61_CC62INC_P00_9_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
Definition: IfxCcu6_PinMap.c:69
IfxCcu6_Cc60in_In_pinTable
const IfxCcu6_Cc60in_In * IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:145
IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:282
IfxCcu61_CC60_P00_1_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
Definition: IfxCcu6_PinMap.c:32
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu61_CCPOS0A_P00_7_IN
IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
Definition: IfxCcu6_PinMap.c:73
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_Cout63_Out_pinTable
const IfxCcu6_Cout63_Out * IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:298
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:109
IfxCcu61_COUT62_P33_8_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
Definition: IfxCcu6_PinMap.c:107
IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:281
IfxCcu60_CC62_P02_8_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
Definition: IfxCcu6_PinMap.c:57
IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:277
IfxCcu60_CCPOS2C_P10_8_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
Definition: IfxCcu6_PinMap.c:85
IfxCcu60_CC60_P11_12_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
Definition: IfxCcu6_PinMap.c:30
IfxCcu61_T13HRC_P02_8_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
Definition: IfxCcu6_PinMap.c:127
IfxCcu61_CCPOS2C_P33_5_IN
IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
Definition: IfxCcu6_PinMap.c:88
IfxCcu61_T13HRB_P02_7_IN
IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
Definition: IfxCcu6_PinMap.c:126
IfxCcu6_Cout61_Out_pinTable
const IfxCcu6_Cout61_Out * IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:272
IfxCcu61_CC60_P20_8_OUT
IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
Definition: IfxCcu6_PinMap.c:34
IfxCcu60_CC62INB_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
Definition: IfxCcu6_PinMap.c:65
IfxCcu61_COUT62_P20_13_OUT
IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
Definition: IfxCcu6_PinMap.c:106
IfxCcu6_Cc62in_In_pinTable
const IfxCcu6_Cc62in_In * IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:201
IfxCcu6_T13hr_In_pinTable
const IfxCcu6_T13hr_In * IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:343
IfxCcu60_CC62INA_P02_4_IN
IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
Definition: IfxCcu6_PinMap.c:64
IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:274
IfxCcu60_COUT61_P15_8_OUT
IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
Definition: IfxCcu6_PinMap.c:98
IfxCcu60_CCPOS0D_P40_0_IN
IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
Definition: IfxCcu6_PinMap.c:72
IfxCcu61_CCPOS1B_P40_6_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
Definition: IfxCcu6_PinMap.c:80
IfxCcu60_CC60INB_P00_1_IN
IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
Definition: IfxCcu6_PinMap.c:37
IFXCCU6_PINMAP_NUM_MODULES
#define IFXCCU6_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxCcu6_PinMap.h:268
IfxCcu60_COUT63_P32_4_OUT
IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
Definition: IfxCcu6_PinMap.c:111
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:79
IfxCcu61_COUT61_P00_4_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
Definition: IfxCcu6_PinMap.c:99
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:143
IfxCcu61_CC61_P00_8_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
Definition: IfxCcu6_PinMap.c:47
IfxCcu61_CC62INA_P00_5_IN
IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
Definition: IfxCcu6_PinMap.c:67
IfxCcu60_CC62_P11_10_OUT
IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
Definition: IfxCcu6_PinMap.c:58
IfxCcu61_CTRAPC_P33_4_IN
IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
Definition: IfxCcu6_PinMap.c:117
IfxCcu61_COUT63_P00_10_OUT
IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
Definition: IfxCcu6_PinMap.c:112
IfxCcu6_Cc60_Out_pinTable
const IfxCcu6_Cc60_Out * IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:130
IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:278
IfxCcu61_CCPOS1D_P40_7_IN
IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
Definition: IfxCcu6_PinMap.c:82
IfxCcu61_COUT60_P20_11_OUT
IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
Definition: IfxCcu6_PinMap.c:94
IfxCcu61_CC61_P20_9_OUT
IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
Definition: IfxCcu6_PinMap.c:48
IfxCcu60_COUT60_P15_7_OUT
IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
Definition: IfxCcu6_PinMap.c:92
IfxCcu60_CC61_P15_5_OUT
IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
Definition: IfxCcu6_PinMap.c:45
IfxCcu60_CC60_P15_6_OUT
IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
Definition: IfxCcu6_PinMap.c:31
IfxCcu60_CCPOS1D_P40_2_IN
IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
Definition: IfxCcu6_PinMap.c:78
IfxCcu61_COUT61_P33_10_OUT
IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
Definition: IfxCcu6_PinMap.c:101
IfxCcu61_T12HRE_P00_11_IN
IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
Definition: IfxCcu6_PinMap.c:123
IfxCcu6_Cc61_Out_pinTable
const IfxCcu6_Cc61_Out * IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
Definition: IfxCcu6_PinMap.c:158
IfxCcu60_CCPOS2B_P40_3_IN
IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
Definition: IfxCcu6_PinMap.c:84


iLLD_TC26B: IfxCcu6_PinMap.h Source File

  • _PinMap
IfxCcu6_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PinMap.h
3 * \brief CCU6 I/O map
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Ccu6_pinmap CCU6 Pin Mapping
25 * \ingroup IfxLld_Ccu6
26 */
27
28 #ifndef IFXCCU6_PINMAP_H
29 #define IFXCCU6_PINMAP_H
30
31 #include <IfxCcu6_reg.h>
32 #include <_Impl/IfxCcu6_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Ccu6_pinmap
36 * \{ */
37
38 /** \brief CC60IN pin mapping structure */
39 typedef const struct
40 {
41 Ifx_CCU6* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel select; /**< \brief Input multiplexer value */
44 } IfxCcu6_Cc60in_In;
45
46 /** \brief CC61IN pin mapping structure */
47 typedef const struct
48 {
49 Ifx_CCU6* module; /**< \brief Base address */
50 IfxPort_Pin pin; /**< \brief Port pin */
51 Ifx_RxSel select; /**< \brief Input multiplexer value */
52 } IfxCcu6_Cc61in_In;
53
54 /** \brief CC62IN pin mapping structure */
55 typedef const struct
56 {
57 Ifx_CCU6* module; /**< \brief Base address */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 Ifx_RxSel select; /**< \brief Input multiplexer value */
60 } IfxCcu6_Cc62in_In;
61
62 /** \brief CCPOS0 pin mapping structure */
63 typedef const struct
64 {
65 Ifx_CCU6* module; /**< \brief Base address */
66 IfxPort_Pin pin; /**< \brief Port pin */
67 Ifx_RxSel select; /**< \brief Input multiplexer value */
68 } IfxCcu6_Ccpos0_In;
69
70 /** \brief CCPOS1 pin mapping structure */
71 typedef const struct
72 {
73 Ifx_CCU6* module; /**< \brief Base address */
74 IfxPort_Pin pin; /**< \brief Port pin */
75 Ifx_RxSel select; /**< \brief Input multiplexer value */
76 } IfxCcu6_Ccpos1_In;
77
78 /** \brief CCPOS2 pin mapping structure */
79 typedef const struct
80 {
81 Ifx_CCU6* module; /**< \brief Base address */
82 IfxPort_Pin pin; /**< \brief Port pin */
83 Ifx_RxSel select; /**< \brief Input multiplexer value */
84 } IfxCcu6_Ccpos2_In;
85
86 /** \brief CTRAP pin mapping structure */
87 typedef const struct
88 {
89 Ifx_CCU6* module; /**< \brief Base address */
90 IfxPort_Pin pin; /**< \brief Port pin */
91 Ifx_RxSel select; /**< \brief Input multiplexer value */
92 } IfxCcu6_Ctrap_In;
93
94 /** \brief T12HR pin mapping structure */
95 typedef const struct
96 {
97 Ifx_CCU6* module; /**< \brief Base address */
98 IfxPort_Pin pin; /**< \brief Port pin */
99 Ifx_RxSel select; /**< \brief Input multiplexer value */
100 } IfxCcu6_T12hr_In;
101
102 /** \brief T13HR pin mapping structure */
103 typedef const struct
104 {
105 Ifx_CCU6* module; /**< \brief Base address */
106 IfxPort_Pin pin; /**< \brief Port pin */
107 Ifx_RxSel select; /**< \brief Input multiplexer value */
108 } IfxCcu6_T13hr_In;
109
110 /** \brief CC60 pin mapping structure */
111 typedef const struct
112 {
113 Ifx_CCU6* module; /**< \brief Base address */
114 IfxPort_Pin pin; /**< \brief Port pin */
115 IfxPort_OutputIdx select; /**< \brief Port control code */
116 } IfxCcu6_Cc60_Out;
117
118 /** \brief CC61 pin mapping structure */
119 typedef const struct
120 {
121 Ifx_CCU6* module; /**< \brief Base address */
122 IfxPort_Pin pin; /**< \brief Port pin */
123 IfxPort_OutputIdx select; /**< \brief Port control code */
124 } IfxCcu6_Cc61_Out;
125
126 /** \brief CC62 pin mapping structure */
127 typedef const struct
128 {
129 Ifx_CCU6* module; /**< \brief Base address */
130 IfxPort_Pin pin; /**< \brief Port pin */
131 IfxPort_OutputIdx select; /**< \brief Port control code */
132 } IfxCcu6_Cc62_Out;
133
134 /** \brief COUT60 pin mapping structure */
135 typedef const struct
136 {
137 Ifx_CCU6* module; /**< \brief Base address */
138 IfxPort_Pin pin; /**< \brief Port pin */
139 IfxPort_OutputIdx select; /**< \brief Port control code */
140 } IfxCcu6_Cout60_Out;
141
142 /** \brief COUT61 pin mapping structure */
143 typedef const struct
144 {
145 Ifx_CCU6* module; /**< \brief Base address */
146 IfxPort_Pin pin; /**< \brief Port pin */
147 IfxPort_OutputIdx select; /**< \brief Port control code */
148 } IfxCcu6_Cout61_Out;
149
150 /** \brief COUT62 pin mapping structure */
151 typedef const struct
152 {
153 Ifx_CCU6* module; /**< \brief Base address */
154 IfxPort_Pin pin; /**< \brief Port pin */
155 IfxPort_OutputIdx select; /**< \brief Port control code */
156 } IfxCcu6_Cout62_Out;
157
158 /** \brief COUT63 pin mapping structure */
159 typedef const struct
160 {
161 Ifx_CCU6* module; /**< \brief Base address */
162 IfxPort_Pin pin; /**< \brief Port pin */
163 IfxPort_OutputIdx select; /**< \brief Port control code */
164 } IfxCcu6_Cout63_Out;
165
166 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT; /**< \brief CCU60_CC60: CCU60 output */
167 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT; /**< \brief CCU60_CC60: CCU60 output */
168 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT; /**< \brief CCU60_CC60: CCU60 output */
169 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT; /**< \brief CCU60_CC60: CCU60 output */
170 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT; /**< \brief CCU61_CC60: CCU61 output */
171 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT; /**< \brief CCU61_CC60: CCU61 output */
172 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT; /**< \brief CCU61_CC60: CCU61 output */
173 IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT; /**< \brief CCU61_CC60: CCU61 output */
174 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN; /**< \brief CCU60_CC60INA: CCU60 input */
175 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN; /**< \brief CCU60_CC60INB: CCU60 input */
176 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN; /**< \brief CCU60_CC60INC: CCU60 input */
177 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN; /**< \brief CCU61_CC60INA: CCU61 input */
178 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN; /**< \brief CCU61_CC60INB: CCU61 input */
179 IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN; /**< \brief CCU61_CC60INC: CCU61 input */
180 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT; /**< \brief CCU60_CC61: CCU60 output */
181 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT; /**< \brief CCU60_CC61: CCU60 output */
182 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT; /**< \brief CCU60_CC61: CCU60 output */
183 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT; /**< \brief CCU60_CC61: CCU60 output */
184 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT; /**< \brief CCU61_CC61: CCU61 output */
185 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT; /**< \brief CCU61_CC61: CCU61 output */
186 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT; /**< \brief CCU61_CC61: CCU61 output */
187 IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT; /**< \brief CCU61_CC61: CCU61 output */
188 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN; /**< \brief CCU60_CC61INA: CCU60 input */
189 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN; /**< \brief CCU60_CC61INB: CCU60 input */
190 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN; /**< \brief CCU60_CC61INC: CCU60 input */
191 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN; /**< \brief CCU61_CC61INA: CCU61 input */
192 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN; /**< \brief CCU61_CC61INB: CCU61 input */
193 IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN; /**< \brief CCU61_CC61INC: CCU61 input */
194 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT; /**< \brief CCU60_CC62: CCU60 output */
195 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT; /**< \brief CCU60_CC62: CCU60 output */
196 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT; /**< \brief CCU60_CC62: CCU60 output */
197 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT; /**< \brief CCU60_CC62: CCU60 output */
198 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT; /**< \brief CCU61_CC62: CCU61 output */
199 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT; /**< \brief CCU61_CC62: CCU61 output */
200 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT; /**< \brief CCU61_CC62: CCU61 output */
201 IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT; /**< \brief CCU61_CC62: CCU61 output */
202 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN; /**< \brief CCU60_CC62INA: CCU60 input */
203 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN; /**< \brief CCU60_CC62INB: CCU60 input */
204 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN; /**< \brief CCU60_CC62INC: CCU60 input */
205 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN; /**< \brief CCU61_CC62INA: CCU61 input */
206 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN; /**< \brief CCU61_CC62INB: CCU61 input */
207 IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN; /**< \brief CCU61_CC62INC: CCU61 input */
208 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN; /**< \brief CCU60_CCPOS0A: CCU60 input */
209 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN; /**< \brief CCU60_CCPOS0C: CCU60 input */
210 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN; /**< \brief CCU60_CCPOS0D: CCU60 input */
211 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN; /**< \brief CCU61_CCPOS0A: CCU61 input */
212 IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN; /**< \brief CCU61_CCPOS0C: CCU61 input */
213 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN; /**< \brief CCU60_CCPOS1A: CCU60 input */
214 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN; /**< \brief CCU60_CCPOS1B: CCU60 input */
215 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN; /**< \brief CCU60_CCPOS1C: CCU60 input */
216 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN; /**< \brief CCU60_CCPOS1D: CCU60 input */
217 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN; /**< \brief CCU61_CCPOS1A: CCU61 input */
218 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN; /**< \brief CCU61_CCPOS1B: CCU61 input */
219 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN; /**< \brief CCU61_CCPOS1C: CCU61 input */
220 IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN; /**< \brief CCU61_CCPOS1D: CCU61 input */
221 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN; /**< \brief CCU60_CCPOS2A: CCU60 input */
222 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN; /**< \brief CCU60_CCPOS2B: CCU60 input */
223 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN; /**< \brief CCU60_CCPOS2C: CCU60 input */
224 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN; /**< \brief CCU61_CCPOS2A: CCU61 input */
225 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN; /**< \brief CCU61_CCPOS2B: CCU61 input */
226 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN; /**< \brief CCU61_CCPOS2C: CCU61 input */
227 IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN; /**< \brief CCU61_CCPOS2D: CCU61 input */
228 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT; /**< \brief CCU60_COUT60: CCU60 output */
229 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT; /**< \brief CCU60_COUT60: CCU60 output */
230 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT; /**< \brief CCU60_COUT60: CCU60 output */
231 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT; /**< \brief CCU61_COUT60: CCU61 output */
232 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT; /**< \brief CCU61_COUT60: CCU61 output */
233 IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT; /**< \brief CCU61_COUT60: CCU61 output */
234 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT; /**< \brief CCU60_COUT61: CCU60 output */
235 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT; /**< \brief CCU60_COUT61: CCU60 output */
236 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT; /**< \brief CCU60_COUT61: CCU60 output */
237 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT; /**< \brief CCU61_COUT61: CCU61 output */
238 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT; /**< \brief CCU61_COUT61: CCU61 output */
239 IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT; /**< \brief CCU61_COUT61: CCU61 output */
240 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT; /**< \brief CCU60_COUT62: CCU60 output */
241 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT; /**< \brief CCU60_COUT62: CCU60 output */
242 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT; /**< \brief CCU60_COUT62: CCU60 output */
243 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT; /**< \brief CCU61_COUT62: CCU61 output */
244 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT; /**< \brief CCU61_COUT62: CCU61 output */
245 IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT; /**< \brief CCU61_COUT62: CCU61 output */
246 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT; /**< \brief CCU60_COUT63: CCU60 output */
247 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT; /**< \brief CCU60_COUT63: CCU60 output */
248 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT; /**< \brief CCU60_COUT63: CCU60 output */
249 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT; /**< \brief CCU60_COUT63: CCU60 output */
250 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT; /**< \brief CCU61_COUT63: CCU61 output */
251 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT; /**< \brief CCU61_COUT63: CCU61 output */
252 IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT; /**< \brief CCU61_COUT63: CCU61 output */
253 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN; /**< \brief CCU60_CTRAPA: CCU60 input */
254 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN; /**< \brief CCU61_CTRAPA: CCU61 input */
255 IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN; /**< \brief CCU61_CTRAPC: CCU61 input */
256 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN; /**< \brief CCU60_T12HRB: CCU60 input */
257 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN; /**< \brief CCU60_T12HRC: CCU60 input */
258 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN; /**< \brief CCU60_T12HRE: CCU60 input */
259 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN; /**< \brief CCU61_T12HRB: CCU61 input */
260 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN; /**< \brief CCU61_T12HRC: CCU61 input */
261 IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN; /**< \brief CCU61_T12HRE: CCU61 input */
262 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN; /**< \brief CCU60_T13HRB: CCU60 input */
263 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN; /**< \brief CCU60_T13HRC: CCU60 input */
264 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN; /**< \brief CCU61_T13HRB: CCU61 input */
265 IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN; /**< \brief CCU61_T13HRC: CCU61 input */
266
267 /** \brief Table dimensions */
268 #define IFXCCU6_PINMAP_NUM_MODULES 2
269 #define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4
270 #define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
271 #define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4
272 #define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
273 #define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4
274 #define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
275 #define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
276 #define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
277 #define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
278 #define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3
279 #define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3
280 #define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3
281 #define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4
282 #define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
283 #define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
284 #define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3
285
286
287 /** \brief IfxCcu6_Cc60_Out table */
288 IFX_EXTERN const IfxCcu6_Cc60_Out *IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS];
289
290 /** \brief IfxCcu6_Cc60in_In table */
291 IFX_EXTERN const IfxCcu6_Cc60in_In *IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS];
292
293 /** \brief IfxCcu6_Cc61_Out table */
294 IFX_EXTERN const IfxCcu6_Cc61_Out *IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS];
295
296 /** \brief IfxCcu6_Cc61in_In table */
297 IFX_EXTERN const IfxCcu6_Cc61in_In *IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS];
298
299 /** \brief IfxCcu6_Cc62_Out table */
300 IFX_EXTERN const IfxCcu6_Cc62_Out *IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS];
301
302 /** \brief IfxCcu6_Cc62in_In table */
303 IFX_EXTERN const IfxCcu6_Cc62in_In *IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS];
304
305 /** \brief IfxCcu6_Ccpos0_In table */
306 IFX_EXTERN const IfxCcu6_Ccpos0_In *IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS];
307
308 /** \brief IfxCcu6_Ccpos1_In table */
309 IFX_EXTERN const IfxCcu6_Ccpos1_In *IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS];
310
311 /** \brief IfxCcu6_Ccpos2_In table */
312 IFX_EXTERN const IfxCcu6_Ccpos2_In *IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS];
313
314 /** \brief IfxCcu6_Cout60_Out table */
315 IFX_EXTERN const IfxCcu6_Cout60_Out *IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS];
316
317 /** \brief IfxCcu6_Cout61_Out table */
318 IFX_EXTERN const IfxCcu6_Cout61_Out *IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS];
319
320 /** \brief IfxCcu6_Cout62_Out table */
321 IFX_EXTERN const IfxCcu6_Cout62_Out *IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS];
322
323 /** \brief IfxCcu6_Cout63_Out table */
324 IFX_EXTERN const IfxCcu6_Cout63_Out *IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS];
325
326 /** \brief IfxCcu6_Ctrap_In table */
327 IFX_EXTERN const IfxCcu6_Ctrap_In *IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS];
328
329 /** \brief IfxCcu6_T12hr_In table */
330 IFX_EXTERN const IfxCcu6_T12hr_In *IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS];
331
332 /** \brief IfxCcu6_T13hr_In table */
333 IFX_EXTERN const IfxCcu6_T13hr_In *IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS];
334
335 /** \} */
336
337 #endif /* IFXCCU6_PINMAP_H */
IfxCcu6_Cc60in_In
CC60IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:39
IfxCcu6_Cc61in_In
CC61IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:47
IfxCcu6_Cc62in_In
CC62IN pin mapping structure.
Definition: IfxCcu6_PinMap.h:55
IfxCcu61_CCPOS2B_P40_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN
CCU61_CCPOS2B: CCU61 input.
Definition: IfxCcu6_PinMap.h:225
IfxCcu60_CCPOS1C_P10_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN
CCU60_CCPOS1C: CCU60 input.
Definition: IfxCcu6_PinMap.h:215
IfxCcu61_CCPOS1A_P00_8_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN
CCU61_CCPOS1A: CCU61 input.
Definition: IfxCcu6_PinMap.h:217
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:127
IfxCcu60_CC61INB_P00_3_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN
CCU60_CC61INB: CCU60 input.
Definition: IfxCcu6_PinMap.h:189
IfxCcu6_Cc60in_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCcu6_PinMap.h:42
IfxCcu60_T13HRB_P00_8_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN
CCU60_T13HRB: CCU60 input.
Definition: IfxCcu6_PinMap.h:262
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:71
IfxCcu61_CC62_P33_9_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT
CCU61_CC62: CCU61 output.
Definition: IfxCcu6_PinMap.h:201
IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:280
IfxCcu61_COUT60_P20_11_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT
CCU61_COUT60: CCU61 output.
Definition: IfxCcu6_PinMap.h:232
IfxCcu60_COUT60_P02_1_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT
CCU60_COUT60: CCU60 output.
Definition: IfxCcu6_PinMap.h:228
IfxCcu61_CC61_P00_8_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT
CCU61_CC61: CCU61 output.
Definition: IfxCcu6_PinMap.h:185
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxCcu6_Cc61_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc61_Out * IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS]
IfxCcu6_Cc61_Out table.
Definition: IfxCcu6_PinMap.h:294
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:159
IfxCcu60_T12HRE_P00_0_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN
CCU60_T12HRE: CCU60 input.
Definition: IfxCcu6_PinMap.h:258
IfxCcu60_COUT61_P02_3_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT
CCU60_COUT61: CCU60 output.
Definition: IfxCcu6_PinMap.h:234
IfxCcu61_CC62_P00_9_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT
CCU61_CC62: CCU61 output.
Definition: IfxCcu6_PinMap.h:199
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:111
IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:270
IfxCcu60_CC62INC_P02_8_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN
CCU60_CC62INC: CCU60 input.
Definition: IfxCcu6_PinMap.h:204
IfxCcu6_Ccpos1_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos1_In * IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS]
IfxCcu6_Ccpos1_In table.
Definition: IfxCcu6_PinMap.h:309
IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:284
IfxCcu60_COUT60_P15_7_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT
CCU60_COUT60: CCU60 output.
Definition: IfxCcu6_PinMap.h:230
IfxCcu60_CCPOS2C_P10_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN
CCU60_CCPOS2C: CCU60 input.
Definition: IfxCcu6_PinMap.h:223
IfxCcu60_CC61_P02_2_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT
CCU60_CC61: CCU60 output.
Definition: IfxCcu6_PinMap.h:180
IfxCcu6_Ctrap_In
CTRAP pin mapping structure.
Definition: IfxCcu6_PinMap.h:87
IfxCcu60_CC62INB_P00_5_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN
CCU60_CC62INB: CCU60 input.
Definition: IfxCcu6_PinMap.h:203
IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:271
IfxCcu61_CCPOS2A_P00_9_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN
CCU61_CCPOS2A: CCU61 input.
Definition: IfxCcu6_PinMap.h:224
IfxCcu6_T13hr_In_pinTable
IFX_EXTERN const IfxCcu6_T13hr_In * IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS]
IfxCcu6_T13hr_In table.
Definition: IfxCcu6_PinMap.h:333
IfxCcu60_CCPOS1B_P40_1_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN
CCU60_CCPOS1B: CCU60 input.
Definition: IfxCcu6_PinMap.h:214
IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:276
IfxCcu61_CTRAPC_P33_4_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN
CCU61_CTRAPC: CCU61 input.
Definition: IfxCcu6_PinMap.h:255
IfxCcu60_COUT60_P11_9_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT
CCU60_COUT60: CCU60 output.
Definition: IfxCcu6_PinMap.h:229
IfxCcu60_CC60INC_P02_6_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN
CCU60_CC60INC: CCU60 input.
Definition: IfxCcu6_PinMap.h:176
IfxCcu60_CC62_P15_4_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT
CCU60_CC62: CCU60 output.
Definition: IfxCcu6_PinMap.h:197
IfxCcu6_Cc60in_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxCcu6_PinMap.h:43
IfxCcu61_COUT62_P00_6_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT
CCU61_COUT62: CCU61 output.
Definition: IfxCcu6_PinMap.h:243
IfxCcu60_CC62_P02_4_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT
CCU60_CC62: CCU60 output.
Definition: IfxCcu6_PinMap.h:194
IfxCcu6_T12hr_In_pinTable
IFX_EXTERN const IfxCcu6_T12hr_In * IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS]
IfxCcu6_T12hr_In table.
Definition: IfxCcu6_PinMap.h:330
IfxCcu61_CCPOS2C_P33_5_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN
CCU61_CCPOS2C: CCU61 input.
Definition: IfxCcu6_PinMap.h:226
IfxCcu60_CC61_P11_11_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT
CCU60_CC61: CCU60 output.
Definition: IfxCcu6_PinMap.h:182
IfxCcu6_Ccpos2_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos2_In * IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS]
IfxCcu6_Ccpos2_In table.
Definition: IfxCcu6_PinMap.h:312
IfxCcu60_CC60_P02_6_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT
CCU60_CC60: CCU60 output.
Definition: IfxCcu6_PinMap.h:167
IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:275
IfxCcu6_Cc60_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxCcu6_PinMap.h:115
IfxCcu61_T12HRB_P02_6_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN
CCU61_T12HRB: CCU61 input.
Definition: IfxCcu6_PinMap.h:259
IfxCcu61_COUT62_P33_8_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT
CCU61_COUT62: CCU61 output.
Definition: IfxCcu6_PinMap.h:245
IfxCcu61_CCPOS1D_P40_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN
CCU61_CCPOS1D: CCU61 input.
Definition: IfxCcu6_PinMap.h:220
IfxCcu61_CC60_P33_13_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT
CCU61_CC60: CCU61 output.
Definition: IfxCcu6_PinMap.h:173
IfxCcu6_Cc60in_In::module
Ifx_CCU6 * module
Base address.
Definition: IfxCcu6_PinMap.h:41
IfxCcu61_T12HRE_P00_11_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN
CCU61_T12HRE: CCU61 input.
Definition: IfxCcu6_PinMap.h:261
IfxCcu60_T12HRC_P00_9_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN
CCU60_T12HRC: CCU60 input.
Definition: IfxCcu6_PinMap.h:257
IfxCcu61_CC62INC_P00_9_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN
CCU61_CC62INC: CCU61 input.
Definition: IfxCcu6_PinMap.h:207
IfxCcu61_CCPOS0A_P00_7_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN
CCU61_CCPOS0A: CCU61 input.
Definition: IfxCcu6_PinMap.h:211
IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:269
IfxCcu61_COUT63_P00_10_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT
CCU61_COUT63: CCU61 output.
Definition: IfxCcu6_PinMap.h:250
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:151
IfxCcu61_COUT63_P20_7_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT
CCU61_COUT63: CCU61 output.
Definition: IfxCcu6_PinMap.h:252
IfxCcu60_CC60_P02_0_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT
CCU60_CC60: CCU60 output.
Definition: IfxCcu6_PinMap.h:166
IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:279
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:63
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu60_CC61INA_P02_2_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN
CCU60_CC61INA: CCU60 input.
Definition: IfxCcu6_PinMap.h:188
IfxCcu60_COUT63_P00_0_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT
CCU60_COUT63: CCU60 output.
Definition: IfxCcu6_PinMap.h:246
IfxCcu61_CCPOS0C_P33_7_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN
CCU61_CCPOS0C: CCU61 input.
Definition: IfxCcu6_PinMap.h:212
IfxCcu61_CC61INB_P02_2_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN
CCU61_CC61INB: CCU61 input.
Definition: IfxCcu6_PinMap.h:192
IfxCcu60_CC62_P02_8_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT
CCU60_CC62: CCU60 output.
Definition: IfxCcu6_PinMap.h:195
IfxCcu61_COUT60_P00_2_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT
CCU61_COUT60: CCU61 output.
Definition: IfxCcu6_PinMap.h:231
IfxCcu60_CC61_P15_5_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT
CCU60_CC61: CCU60 output.
Definition: IfxCcu6_PinMap.h:183
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IfxCcu60_CC60INB_P00_1_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN
CCU60_CC60INB: CCU60 input.
Definition: IfxCcu6_PinMap.h:175
IfxCcu60_CCPOS2A_P02_8_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN
CCU60_CCPOS2A: CCU60 input.
Definition: IfxCcu6_PinMap.h:221
IfxCcu6_Cc62_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc62_Out * IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS]
IfxCcu6_Cc62_Out table.
Definition: IfxCcu6_PinMap.h:300
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:135
IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:283
IfxCcu60_COUT61_P15_8_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT
CCU60_COUT61: CCU60 output.
Definition: IfxCcu6_PinMap.h:236
IfxCcu61_CC60_P20_8_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT
CCU61_CC60: CCU61 output.
Definition: IfxCcu6_PinMap.h:172
IfxCcu6_Cout63_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout63_Out * IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS]
IfxCcu6_Cout63_Out table.
Definition: IfxCcu6_PinMap.h:324
IfxCcu61_COUT60_P33_12_OUT
IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT
CCU61_COUT60: CCU61 output.
Definition: IfxCcu6_PinMap.h:233
IfxCcu60_T12HRB_P00_7_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN
CCU60_T12HRB: CCU60 input.
Definition: IfxCcu6_PinMap.h:256
IfxCcu60_CTRAPA_P00_11_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN
CCU60_CTRAPA: CCU60 input.
Definition: IfxCcu6_PinMap.h:253
IfxCcu60_COUT62_P02_5_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT
CCU60_COUT62: CCU60 output.
Definition: IfxCcu6_PinMap.h:240
IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:273
IfxCcu60_CCPOS0C_P10_4_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN
CCU60_CCPOS0C: CCU60 input.
Definition: IfxCcu6_PinMap.h:209
IfxCcu61_CC62_P00_5_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT
CCU61_CC62: CCU61 output.
Definition: IfxCcu6_PinMap.h:198
IfxCcu61_CCPOS1B_P40_6_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN
CCU61_CCPOS1B: CCU61 input.
Definition: IfxCcu6_PinMap.h:218
IfxCcu61_CC60INB_P02_0_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN
CCU61_CC60INB: CCU61 input.
Definition: IfxCcu6_PinMap.h:178
IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:272
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:119
IfxCcu61_CC61INA_P00_3_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN
CCU61_CC61INA: CCU61 input.
Definition: IfxCcu6_PinMap.h:191
IfxCcu6_Cc60_Out_pinTable
IFX_EXTERN const IfxCcu6_Cc60_Out * IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS]
IfxCcu6_Cc60_Out table.
Definition: IfxCcu6_PinMap.h:288
IfxCcu61_CCPOS1C_P33_6_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN
CCU61_CCPOS1C: CCU61 input.
Definition: IfxCcu6_PinMap.h:219
IfxCcu61_CC61_P00_3_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT
CCU61_CC61: CCU61 output.
Definition: IfxCcu6_PinMap.h:184
IfxCcu61_COUT63_P00_12_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT
CCU61_COUT63: CCU61 output.
Definition: IfxCcu6_PinMap.h:251
IfxCcu60_CC60_P15_6_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT
CCU60_CC60: CCU60 output.
Definition: IfxCcu6_PinMap.h:169
IfxCcu60_CC61INC_P02_7_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN
CCU60_CC61INC: CCU60 input.
Definition: IfxCcu6_PinMap.h:190
IfxCcu60_COUT61_P11_6_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT
CCU60_COUT61: CCU60 output.
Definition: IfxCcu6_PinMap.h:235
IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:282
IfxCcu60_CCPOS0D_P40_0_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN
CCU60_CCPOS0D: CCU60 input.
Definition: IfxCcu6_PinMap.h:210
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_Cout60_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout60_Out * IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS]
IfxCcu6_Cout60_Out table.
Definition: IfxCcu6_PinMap.h:315
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu61_T12HRC_P02_8_IN
IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN
CCU61_T12HRC: CCU61 input.
Definition: IfxCcu6_PinMap.h:260
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:281
IfxCcu61_COUT61_P00_4_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT
CCU61_COUT61: CCU61 output.
Definition: IfxCcu6_PinMap.h:237
IfxCcu60_T13HRC_P00_9_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN
CCU60_T13HRC: CCU60 input.
Definition: IfxCcu6_PinMap.h:263
IfxCcu6_Ctrap_In_pinTable
IFX_EXTERN const IfxCcu6_Ctrap_In * IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS]
IfxCcu6_Ctrap_In table.
Definition: IfxCcu6_PinMap.h:327
IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:277
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxCcu61_CC61INC_P00_8_IN
IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN
CCU61_CC61INC: CCU61 input.
Definition: IfxCcu6_PinMap.h:193
IfxCcu60_CC60_P11_12_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT
CCU60_CC60: CCU60 output.
Definition: IfxCcu6_PinMap.h:168
IfxCcu61_CC60_P00_1_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT
CCU61_CC60: CCU61 output.
Definition: IfxCcu6_PinMap.h:170
IfxCcu60_CCPOS1A_P02_7_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN
CCU60_CCPOS1A: CCU60 input.
Definition: IfxCcu6_PinMap.h:213
IfxCcu61_CC60_P00_7_OUT
IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT
CCU61_CC60: CCU61 output.
Definition: IfxCcu6_PinMap.h:171
IfxCcu60_COUT63_P11_2_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT
CCU60_COUT63: CCU60 output.
Definition: IfxCcu6_PinMap.h:247
IfxCcu60_COUT63_P32_4_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT
CCU60_COUT63: CCU60 output.
Definition: IfxCcu6_PinMap.h:249
IfxCcu61_T13HRC_P02_8_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN
CCU61_T13HRC: CCU61 input.
Definition: IfxCcu6_PinMap.h:265
IfxCcu60_CC62INA_P02_4_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN
CCU60_CC62INA: CCU60 input.
Definition: IfxCcu6_PinMap.h:202
IfxCcu61_CTRAPA_P00_0_IN
IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN
CCU61_CTRAPA: CCU61 input.
Definition: IfxCcu6_PinMap.h:254
IfxCcu61_COUT61_P20_12_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT
CCU61_COUT61: CCU61 output.
Definition: IfxCcu6_PinMap.h:238
IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:274
IfxCcu6_Cc60in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc60in_In * IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS]
IfxCcu6_Cc60in_In table.
Definition: IfxCcu6_PinMap.h:291
IfxCcu60_CC62_P11_10_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT
CCU60_CC62: CCU60 output.
Definition: IfxCcu6_PinMap.h:196
IfxCcu60_CC60INA_P02_0_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN
CCU60_CC60INA: CCU60 input.
Definition: IfxCcu6_PinMap.h:174
IfxCcu6_Ccpos0_In_pinTable
IFX_EXTERN const IfxCcu6_Ccpos0_In * IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS]
IfxCcu6_Ccpos0_In table.
Definition: IfxCcu6_PinMap.h:306
IfxCcu61_CC62INA_P00_5_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN
CCU61_CC62INA: CCU61 input.
Definition: IfxCcu6_PinMap.h:205
IfxCcu61_CCPOS2D_P40_9_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN
CCU61_CCPOS2D: CCU61 input.
Definition: IfxCcu6_PinMap.h:227
IfxCcu61_CC60INA_P00_1_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN
CCU61_CC60INA: CCU61 input.
Definition: IfxCcu6_PinMap.h:177
IFXCCU6_PINMAP_NUM_MODULES
#define IFXCCU6_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxCcu6_PinMap.h:268
IfxCcu6_Cc61in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc61in_In * IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS]
IfxCcu6_Cc61in_In table.
Definition: IfxCcu6_PinMap.h:297
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:79
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:143
IfxCcu61_COUT61_P33_10_OUT
IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT
CCU61_COUT61: CCU61 output.
Definition: IfxCcu6_PinMap.h:239
IfxCcu60_COUT62_P14_0_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT
CCU60_COUT62: CCU60 output.
Definition: IfxCcu6_PinMap.h:242
IfxCcu61_CC60INC_P00_7_IN
IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN
CCU61_CC60INC: CCU61 input.
Definition: IfxCcu6_PinMap.h:179
IfxCcu60_CCPOS1D_P40_2_IN
IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN
CCU60_CCPOS1D: CCU60 input.
Definition: IfxCcu6_PinMap.h:216
IfxCcu60_COUT62_P11_3_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT
CCU60_COUT62: CCU60 output.
Definition: IfxCcu6_PinMap.h:241
IfxCcu61_CC62_P20_10_OUT
IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT
CCU61_CC62: CCU61 output.
Definition: IfxCcu6_PinMap.h:200
IfxCcu60_CCPOS2B_P40_3_IN
IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN
CCU60_CCPOS2B: CCU60 input.
Definition: IfxCcu6_PinMap.h:222
IfxCcu60_CCPOS0A_P02_6_IN
IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN
CCU60_CCPOS0A: CCU60 input.
Definition: IfxCcu6_PinMap.h:208
IfxCcu60_CC61_P02_7_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT
CCU60_CC61: CCU60 output.
Definition: IfxCcu6_PinMap.h:181
IfxCcu61_CC62INB_P02_4_IN
IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN
CCU61_CC62INB: CCU61 input.
Definition: IfxCcu6_PinMap.h:206
IfxCcu6_Cc62in_In_pinTable
IFX_EXTERN const IfxCcu6_Cc62in_In * IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS]
IfxCcu6_Cc62in_In table.
Definition: IfxCcu6_PinMap.h:303
IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS
Definition: IfxCcu6_PinMap.h:278
IfxCcu61_T13HRB_P02_7_IN
IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN
CCU61_T13HRB: CCU61 input.
Definition: IfxCcu6_PinMap.h:264
IfxCcu6_Cout62_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout62_Out * IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS]
IfxCcu6_Cout62_Out table.
Definition: IfxCcu6_PinMap.h:321
IfxCcu61_COUT62_P20_13_OUT
IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT
CCU61_COUT62: CCU61 output.
Definition: IfxCcu6_PinMap.h:244
IfxCcu60_COUT63_P14_1_OUT
IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT
CCU60_COUT63: CCU60 output.
Definition: IfxCcu6_PinMap.h:248
IfxCcu61_CC61_P33_11_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT
CCU61_CC61: CCU61 output.
Definition: IfxCcu6_PinMap.h:187
IfxCcu61_CC61_P20_9_OUT
IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT
CCU61_CC61: CCU61 output.
Definition: IfxCcu6_PinMap.h:186
IfxCcu6_Cout61_Out_pinTable
IFX_EXTERN const IfxCcu6_Cout61_Out * IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS]
IfxCcu6_Cout61_Out table.
Definition: IfxCcu6_PinMap.h:318
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxCcu6_PwmBc.c Source File

  • Ccu6
  • PwmBc
IfxCcu6_PwmBc.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmBc.c
3 * \brief CCU6 PWMBC details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxCcu6_PwmBc.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
37 {
38 uint32 currentTime, previousTime;
39 float32 speed;
40
41 currentTime = IfxCcu6_getCaptureRegisterValue(pwmBc->ccu6, IfxCcu6_T12Channel_0);
42 previousTime = IfxCcu6_getCaptureShadowRegisterValue(pwmBc->ccu6, IfxCcu6_T12Channel_0);
43
44 // TODO -- FIX IT --
45 speed = (currentTime - previousTime) * (6 / (pwmBc->base.t13Frequency));
46 speed = speed * 60 * 100000; //convertion to RPM (minutes),
47 return speed;
48 }
49
50
51 void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
52 {
53 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
54 pwmBc->ccu6 = ccu6SFR; // adding register pointer to module handler
55
56 /* -- hardware module initialisation -- */
57
58 // enable module if it hasn't been enabled by any other interface //
59 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
60 {
61 IfxCcu6_enableModule(ccu6SFR);
62 }
63
64 /* -- Timer13 initialisation -- */
65
66 // enable Timer13 if it hasn't been enabled by any other interface //
67 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
68 {
69 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
70 }
71
72 // clock initialisation //
73 pwmBc->base.t13Frequency = IfxCcu6_setT13Frequency(ccu6SFR, config->base.t13Frequency, config->base.t13Period);
74
75 // duty cycle initialisation //
76
77 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
78
79 IfxCcu6_setT13CompareValue(ccu6SFR, config->timer13.compareValue);
80
81 // if Timer 13 start is in sync with Timer 12 //
82
83 if (config->trigger.t13InSyncWithT12)
84 {
85 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
86 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
87 }
88
89 /* -- Timer12 initialisation -- */
90
91 // enable Timer12 if it hasn't been enabled by any other interface //
92 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
93 {
94 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
95 }
96
97 // clock initialisation //
98
99 IfxCcu6_setT12Frequency(ccu6SFR, config->base.t12Frequency, config->base.t12Period, config->timer12.countMode);
100
101 // duty cycle initialisation //
102
103 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
104
105 // hall effect noise filter initialisation
106 if (config->base.noiseFilter)
107 {
108 IfxCcu6_setDeadTimeValue(ccu6SFR, (uint8)config->base.noiseFilter);
109 IfxCcu6_enableDeadTime(ccu6SFR, IfxCcu6_T12Channel_0);
110 IfxCcu6_disableDelayBypass(ccu6SFR);
111 }
112
113 // channel initialisation for hall sensor mode ( for Brush Less DC motor)
114 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_0, IfxCcu6_T12ChannelMode_hallSensor);
115 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_1, IfxCcu6_T12ChannelMode_hallSensor);
116 IfxCcu6_setT12ChannelMode(ccu6SFR, IfxCcu6_T12Channel_2, IfxCcu6_T12ChannelMode_hallSensor);
117
118 // phase delay initialisation
119 IfxCcu6_setT12CompareValue(ccu6SFR, IfxCcu6_T12Channel_1, (uint16)config->base.phaseDelay);
120
121 // multichannel control / output pattern control initialisation
122 IfxCcu6_setMultiChannelSwitchingMode(ccu6SFR, config->multiChannelControl.switchingSelect);
123 IfxCcu6_setMultiChannelSwitchingSync(ccu6SFR, config->multiChannelControl.switchingSync);
124
125 /* -- output path initialisation -- */
126
127 //enable Timer13 modulation output path for all T12 channel outs//
128
129 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc0);
130 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc1);
131 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc2);
132
133 if (config->pins->cout63 != NULL_PTR)
134 {
135 IfxCcu6_enableModulationOutput(ccu6SFR, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
136 }
137
138 // output passive logic configuration //
139 //TODO check correct polarity:
140
141 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc0, config->base.activeState);
142 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc1, config->base.activeState);
143 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cc2, config->base.activeState);
144
145 if (config->pins->cout63 != NULL_PTR)
146
147 {
148 IfxCcu6_setOutputPassiveState(ccu6SFR, IfxCcu6_ChannelOut_cout3, config->base.activeState);
149 }
150
151 /* -- Pin mapping -- */
152
153 const IfxCcu6_PwmBc_Pins *pins = config->pins;
154
155 if (pins != NULL_PTR)
156 {
157 // modulation output pins
158
159 IfxCcu6_Cc60_Out *cc60Out = pins->cc60Out;
160
161 if (cc60Out != NULL_PTR)
162 {
163 IfxCcu6_initCc60OutPin(cc60Out, pins->outputMode, pins->pinDriver);
164 }
165
166 IfxCcu6_Cc61_Out *cc61Out = pins->cc61Out;
167
168 if (cc61Out != NULL_PTR)
169 {
170 IfxCcu6_initCc61OutPin(cc61Out, pins->outputMode, pins->pinDriver);
171 }
172
173 IfxCcu6_Cc62_Out *cc62Out = pins->cc62Out;
174
175 if (cc62Out != NULL_PTR)
176 {
177 IfxCcu6_initCc62OutPin(cc62Out, pins->outputMode, pins->pinDriver);
178 }
179
180 IfxCcu6_Cout60_Out *cout60 = pins->cout60;
181
182 if (cout60 != NULL_PTR)
183 {
184 IfxCcu6_initCout60Pin(cout60, pins->outputMode, pins->pinDriver);
185 }
186
187 IfxCcu6_Cout61_Out *cout61 = pins->cout61;
188
189 if (cout61 != NULL_PTR)
190 {
191 IfxCcu6_initCout61Pin(cout61, pins->outputMode, pins->pinDriver);
192 }
193
194 IfxCcu6_Cout62_Out *cout62 = pins->cout62;
195
196 if (cout62 != NULL_PTR)
197 {
198 IfxCcu6_initCout62Pin(cout62, pins->outputMode, pins->pinDriver);
199 }
200
201 IfxCcu6_Cout63_Out *cout63 = pins->cout63;
202
203 if (cout63 != NULL_PTR)
204 {
205 IfxCcu6_initCout63Pin(cout63, pins->outputMode, pins->pinDriver);
206 }
207
208 // hall sensor input pins
209
210 IfxCcu6_Ccpos0_In *ccpos0 = pins->ccpos0;
211
212 if (ccpos0 != NULL_PTR)
213 {
214 IfxCcu6_initCcpos0Pin(ccpos0, pins->inputMode);
215 }
216
217 IfxCcu6_Ccpos1_In *ccpos1 = pins->ccpos1;
218
219 if (ccpos1 != NULL_PTR)
220 {
221 IfxCcu6_initCcpos1Pin(ccpos1, pins->inputMode);
222 }
223
224 IfxCcu6_Ccpos2_In *ccpos2 = pins->ccpos2;
225
226 if (ccpos2 != NULL_PTR)
227 {
228 IfxCcu6_initCcpos2Pin(ccpos2, pins->inputMode);
229 }
230
231 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
232
233 if (t12hr != NULL_PTR)
234 {
235 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
236 }
237
238 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
239
240 if (t13hr != NULL_PTR)
241 {
242 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
243 }
244 }
245
246 /* -- hall pattern configuration (when to start the hall pattern evaluation) -- */
247
248 IfxCcu6_setHallSensorTriggerMode(ccu6SFR, config->hallSyncEvent);
249
250 /* -- interrupt initialisation -- */
251
252 if (config->interrupt1.priority > 0)
253 {
254 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
255 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
256
257 volatile Ifx_SRC_SRCR *src;
258 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
259 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
260 IfxSrc_enable(src);
261 }
262
263 if (config->interrupt2.priority > 0)
264 {
265 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
266 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
267
268 volatile Ifx_SRC_SRCR *src;
269 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
270 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
271 IfxSrc_enable(src);
272 }
273
274 if (config->interrupt3.priority > 0)
275 {
276 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
277 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
278
279 volatile Ifx_SRC_SRCR *src;
280 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
281 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
282 IfxSrc_enable(src);
283 }
284
285 if (config->interrupt4.priority > 0)
286 {
287 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
288 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
289
290 volatile Ifx_SRC_SRCR *src;
291 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
292 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
293 IfxSrc_enable(src);
294 }
295
296 /* -- output trigger initialisation --*/
297
298 if (config->trigger.outputTriggerEnabled)
299 {
300 IfxCcu6_connectTrigger(ccu6SFR, config->trigger.outputLine, config->trigger.outputTrigger);
301 }
302
303 pwmBc->trigger = config->trigger;
304 pwmBc->hallPatternIndex = 0;
305
306 #if IFX_CFG_USE_STANDARD_INTERFACE
307 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)pwmBc == ((uint32)&pwmBc->base));
308 pwmBc->base.functions.start = (PwmBc_Start) & IfxCcu6_PwmBc_start;
309 pwmBc->base.functions.stop = (PwmBc_Stop) & IfxCcu6_PwmBc_stop;
310 pwmBc->base.functions.updateHallPattern = (PwmBc_UpdateHallPattern) & IfxCcu6_PwmBc_updateHallPattern;
311 pwmBc->base.functions.getMotorSpeed = (PwmBc_GetMotorSpeed) & IfxCcu6_PwmBc_getMotorSpeed;
312 #endif
313 }
314
315
316 void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
317 {
318 const IfxCcu6_PwmBc_Config defaultConfig = {
319 .base = {
320 .t12Frequency = 400000,
321 .t12Period = 100,
322 .t13Frequency = 400000,
323 .t13Period = 100,
324 .phaseDelay = 20,
325 .noiseFilter = 10,
326 .activeState = Ifx_ActiveState_high,
327 },
328
329 .ccu6 = NULL_PTR, // will be initialized below
330
331 .timer12 = {
332 .countMode = IfxCcu6_T12CountMode_edgeAligned,
333 .counterValue = 0,
334 },
335
336 .timer13 = {
337 .counterValue = 0,
338 .compareValue = 0,
339 .t12SyncEvent = IfxCcu6_T13TriggerEvent_noAction,
340 .t12SyncDirection = IfxCcu6_T13TriggerDirection_noAction,
341 },
342
343 .hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
344
345 .hallPatternIndex = 0,
346
347 .multiChannelControl = {
348 .switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
349 .switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
350 },
351
352 .pins = NULL_PTR,
353
354 .interrupt1 = {
355 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
356 .serviceRequest = IfxCcu6_ServiceRequest_0,
357 .priority = 0, // interrupt priority 0
358 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
359 },
360
361 .interrupt2 = {
362 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
363 .serviceRequest = IfxCcu6_ServiceRequest_1,
364 .priority = 0, // interrupt priority 0
365 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
366 },
367
368 .interrupt3 = {
369 .source = IfxCcu6_InterruptSource_t12OneMatch,
370 .serviceRequest = IfxCcu6_ServiceRequest_2,
371 .priority = 0, // interrupt priority 0
372 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
373 },
374
375 .interrupt4 = {
376 .source = IfxCcu6_InterruptSource_trap,
377 .serviceRequest = IfxCcu6_ServiceRequest_3,
378 .priority = 0, // interrupt priority 0
379 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
380 },
381
382 .trigger = {
383 .t12ExtInputTrigger = NULL_PTR,
384 .t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
385 .t13ExtInputTrigger = NULL_PTR,
386 .t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
387 .t13InSyncWithT12 = FALSE,
388
389 .outputTriggerEnabled = TRUE,
390 .outputLine = IfxCcu6_TrigOut_0,
391 .outputTrigger = IfxCcu6_TrigSel_cout63,
392 },
393 };
394
395 /* Default Configuration */
396 *config = defaultConfig;
397
398 /* take over module pointer */
399 config->ccu6 = ccu6;
400 }
401
402
403 void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
404 {
405 // enable shadow transfers
406 IfxCcu6_enableShadowTransfer(pwmBc->ccu6, TRUE, TRUE);
407
408 // internal start
409 if ((pwmBc->trigger.t13ExtInputTrigger == NULL_PTR) && (pwmBc->trigger.t12ExtInputTrigger == NULL_PTR))
410 {
411 // if T13 start is in sync with T12 start the T12
412 if (pwmBc->trigger.t13InSyncWithT12)
413 {
414 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, FALSE);
415 }
416 else // start both timers
417 {
418 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, TRUE);
419 }
420 }
421
422 // external start
423 else
424 {
425 // if T13 start is not in sync with T12
426 if (!(pwmBc->trigger.t13InSyncWithT12))
427 {
428 // T13 external start if selected
429 if (pwmBc->trigger.t13ExtInputTrigger != NULL_PTR)
430 {
431 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t13, pwmBc->trigger.t13ExtInputTriggerMode);
432 IfxCcu6_setT13InputSignal(pwmBc->ccu6, pwmBc->trigger.t13ExtInputTrigger);
433 }
434 else // internal start of T13 alone
435 {
436 IfxCcu6_startTimer(pwmBc->ccu6, FALSE, TRUE);
437 }
438 }
439 else
440 {}
441
442 // T12 external start if selected
443 if (pwmBc->trigger.t12ExtInputTrigger != NULL_PTR)
444 {
445 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t12, pwmBc->trigger.t12ExtInputTriggerMode);
446 IfxCcu6_setT12InputSignal(pwmBc->ccu6, pwmBc->trigger.t12ExtInputTrigger);
447 }
448 else // internal start of T12 alone
449 {
450 IfxCcu6_startTimer(pwmBc->ccu6, TRUE, FALSE);
451 }
452 }
453 }
454
455
456 void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
457 {
458 IfxCcu6_disableShadowTransfer(pwmBc->ccu6, TRUE, TRUE);
459
460 // if T13 start is in sync with T12, remove sync trigger
461 if (pwmBc->trigger.t13InSyncWithT12)
462 {
463 IfxCcu6_setT13TriggerEventMode(pwmBc->ccu6, IfxCcu6_T13TriggerEvent_noAction);
464 IfxCcu6_setT13TriggerEventDirection(pwmBc->ccu6, IfxCcu6_T13TriggerDirection_noAction);
465 }
466
467 // remove external triggers if any
468 if ((pwmBc->trigger.t13ExtInputTrigger != NULL_PTR) || (pwmBc->trigger.t12ExtInputTrigger != NULL_PTR))
469 {
470 if (pwmBc->trigger.t13ExtInputTrigger != NULL_PTR)
471 {
472 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
473 }
474 else
475 {
476 IfxCcu6_setExternalRunMode(pwmBc->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
477 }
478 }
479 else
480 {}
481
482 // stop both timers
483 IfxCcu6_stopTimer(pwmBc->ccu6, TRUE, TRUE);
484
485 //disable Timer13 modulation output path for all T12 channel outs//
486
487 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc0);
488 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc1);
489 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cc2);
490 IfxCcu6_disableModulationOutput(pwmBc->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
491 }
492
493
494 void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
495 {
496 uint8 index = pwmBc->hallPatternIndex;
497
498 IfxCcu6_updateHallPattern(pwmBc->ccu6, controlTable[index][0], controlTable[index][1], controlTable[index][2]);
499
500 index++;
501
502 if (index >= 6)
503 {
504 index = 0;
505 }
506
507 pwmBc->hallPatternIndex = index;
508 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxCcu6_PwmBc_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_PwmBc.h:306
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2133
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:218
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:134
IfxCcu6_PwmBc_Config::interrupt2
IfxCcu6_PwmBc_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_PwmBc.h:352
IfxCcu6_PwmBc_getMotorSpeed
uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
returns the current motor speed
Definition: IfxCcu6_PwmBc.c:36
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1967
PwmHl_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: PwmHl.h:50
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:220
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:127
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxCcu6_PwmBc_Config
Configuration structure of the module.
Definition: IfxCcu6_PwmBc.h:341
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:71
PwmHl_Config::phaseDelay
Ifx_TimerValue phaseDelay
Specify the ticks before before updating each ouput hall pattern.
Definition: PwmHl.h:64
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1523
IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:273
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:282
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:179
IfxCcu6_PwmBc_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_PwmBc.h:285
IfxCcu6_PwmBc_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:290
IfxCcu6_PwmBc::base
PwmHl base
Base PWMHL object.
Definition: IfxCcu6_PwmBc.h:333
IfxCcu6_getCaptureShadowRegisterValue
uint32 IfxCcu6_getCaptureShadowRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture shadow register value of the selected channel.
Definition: IfxCcu6.c:179
IfxCcu6_PwmBc_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_PwmBc.h:257
IfxCcu6_PwmBc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_PwmBc.h:286
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:159
IfxCcu6_PwmBc_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_PwmBc.h:305
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2104
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:111
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:180
IfxCcu6_PwmBc_MultiChannelControl::switchingSync
IfxCcu6_MultiChannelSwitchingSync switchingSync
Synchronization selection for the shadow transfer event MCM_ST.
Definition: IfxCcu6_PwmBc.h:268
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1609
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2054
PwmHl_Config::t12Frequency
float32 t12Frequency
Specify expected T12 PWM frequency in Hertz.
Definition: PwmHl.h:60
IfxCcu6_PwmBc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_PwmBc.h:260
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:217
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
PwmHl_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: PwmHl.h:67
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1955
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1772
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1831
IfxCcu6_PwmBc_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_PwmBc.h:279
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:266
IfxCcu6_PwmBc::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_PwmBc.h:334
IfxCcu6_PwmBc_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_PwmBc.h:289
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:320
IfxCcu6_PwmBc_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_PwmBc.h:276
IfxCcu6_ChannelOut_cc1
CC61 compare output CC1.
Definition: IfxCcu6.h:97
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1698
IfxCcu6_PwmBc_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_PwmBc.h:320
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu6_PwmBc_Config::timer12
IfxCcu6_PwmBc_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:345
IfxCcu6_PwmBc_Config::interrupt4
IfxCcu6_PwmBc_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_PwmBc.h:354
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2068
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:360
IfxCcu6_PwmBc::hallPatternIndex
uint8 hallPatternIndex
Hall pattern index of motor control table.
Definition: IfxCcu6_PwmBc.h:336
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCcu6_PwmBc_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_PwmBc.h:297
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1586
IfxCcu6_setHallSensorTriggerMode
IFX_INLINE void IfxCcu6_setHallSensorTriggerMode(Ifx_CCU6 *ccu6, IfxCcu6_HallSensorTriggerMode mode)
Sets source for the sampling of the Hall input pattern and the comparison to the current and the expe...
Definition: IfxCcu6.h:1975
IfxCcu6_PwmBc_Config::hallSyncEvent
IfxCcu6_HallSensorTriggerMode hallSyncEvent
Hall pattern evaluation trigger selection (HSYNC)
Definition: IfxCcu6_PwmBc.h:348
IfxCcu6_PwmBc_stop
void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:456
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1824
IfxCcu6_PwmBc_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:283
IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch
A T13 zero-match triggers the shadow transfer.
Definition: IfxCcu6.h:206
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:151
IfxCcu6_PwmBc_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_PwmBc.h:308
IfxCcu6_PwmBc_Config::base
PwmHl_Config base
Base configuration.
Definition: IfxCcu6_PwmBc.h:343
IfxCcu6_PwmBc_MultiChannelControl::switchingSelect
IfxCcu6_MultiChannelSwitchingSelect switchingSelect
Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP...
Definition: IfxCcu6_PwmBc.h:267
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:63
IfxCcu6_PwmBc_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_PwmBc.h:277
PwmHl_Config::noiseFilter
Ifx_TimerValue noiseFilter
Specify hall sensor noise filter.
Definition: PwmHl.h:65
IfxCcu6_PwmBc_start
void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:403
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1543
IfxCcu6_PwmBc_initModule
void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_PwmBc.c:51
IfxCcu6_ChannelOut_cc0
CC60 compare output CC0.
Definition: IfxCcu6.h:95
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:319
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2004
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:135
IfxCcu6_PwmBc.h
CCU6 PWMBC details.
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:101
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:493
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:293
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:135
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1728
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:176
IfxCcu6_PwmBc_Pins::inputMode
IfxPort_InputMode inputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:287
IfxCcu6_PwmBc_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_PwmBc.h:288
IfxCcu6_PwmBc_initModuleConfig
void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_PwmBc.c:316
IfxCcu6_PwmBc_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_PwmBc.h:258
IfxCcu6_PwmBc_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_PwmBc.h:321
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1897
IfxCcu6_PwmBc_Config::trigger
IfxCcu6_PwmBc_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_PwmBc.h:355
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:72
IfxCcu6_PwmBc_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_PwmBc.h:282
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxCcu6_initCcpos2Pin
IFX_INLINE void IfxCcu6_initCcpos2Pin(const IfxCcu6_Ccpos2_In *ccpos2, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1809
IfxCcu6_HallSensorTriggerMode_t13PM
A T13 Period-Match.
Definition: IfxCcu6.h:151
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1867
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:343
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:119
IfxCcu6_ChannelOut_cc2
CC62 compare output CC2.
Definition: IfxCcu6.h:99
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:53
IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch
T12 channel 1 compare-match detected (phase delay function)
Definition: IfxCcu6.h:194
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_PwmBc.h:316
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_PwmBc.h:317
IfxCcu6_PwmBc_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:284
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2086
IfxCcu6_PwmBc_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_PwmBc.h:259
IfxCcu6_PwmBc_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_PwmBc.h:307
IfxCcu6_PwmBc_Config::interrupt1
IfxCcu6_PwmBc_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_PwmBc.h:351
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:304
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1882
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:79
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_updateHallPattern
IFX_INLINE void IfxCcu6_updateHallPattern(Ifx_CCU6 *ccu6, uint8 currentHall, uint8 expectedHall, uint8 output)
Updates the hall pattern (current hall, expected hall, moduleation output), in a single write...
Definition: IfxCcu6.h:2143
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:36
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:177
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:243
IfxCcu6_PwmBc
Module handle.
Definition: IfxCcu6_PwmBc.h:331
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:244
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:216
PwmHl_Config::t12Period
Ifx_TimerValue t12Period
Specify expected T12 PWM period in ticks.
Definition: PwmHl.h:61
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1845
PwmHl_Config::t13Period
Ifx_TimerValue t13Period
Specify expected T13 PWM period in ticks.
Definition: PwmHl.h:63
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode
Event of signal T13HR that can set the run bit T13R by HW.
Definition: IfxCcu6_PwmBc.h:318
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:409
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:245
IfxCcu6_PwmBc_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_PwmBc.h:275
IfxCcu6_PwmBc_Config::pins
IfxCcu6_PwmBc_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:350
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1461
IfxCcu6_PwmBc_Config::timer13
IfxCcu6_PwmBc_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:346
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:79
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2098
IfxCcu6_PwmBc_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_PwmBc.h:319
IfxCcu6_initCcpos0Pin
IFX_INLINE void IfxCcu6_initCcpos0Pin(const IfxCcu6_Ccpos0_In *ccpos0, IfxPort_InputMode inputMode)
Initialises a CCPOS0 input pin.
Definition: IfxCcu6.h:1779
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:143
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1838
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2010
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2080
IfxCcu6_PwmBc_Config::interrupt3
IfxCcu6_PwmBc_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_PwmBc.h:353
IfxCcu6_PwmBc_Config::multiChannelControl
IfxCcu6_PwmBc_MultiChannelControl multiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:349
IfxCcu6_PwmBc_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_PwmBc.h:280
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2123
IfxCcu6_initCcpos1Pin
IFX_INLINE void IfxCcu6_initCcpos1Pin(const IfxCcu6_Ccpos1_In *ccpos1, IfxPort_InputMode inputMode)
Initialises a CCPOS1 input pin.
Definition: IfxCcu6.h:1794
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxCcu6_PwmBc_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_PwmBc.h:281
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1750
IfxCcu6_PwmBc_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Trigger selection.
Definition: IfxCcu6_PwmBc.h:322
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxCcu6_PwmBc_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_PwmBc.h:278
IfxCcu6_disableDelayBypass
IFX_INLINE void IfxCcu6_disableDelayBypass(Ifx_CCU6 *ccu6)
Disables the delay of the source signal for the sampling of the Hall input pattern (selected by HSYNC...
Definition: IfxCcu6.h:1442
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:128
IfxCcu6_T12ChannelMode_hallSensor
Hall Sensor Mode, In order to properly enable this mode, all three MSEL6x fields have to be programme...
Definition: IfxCcu6.h:258
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:97
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_PwmBc.h:315
IfxCcu6_getCaptureRegisterValue
uint32 IfxCcu6_getCaptureRegisterValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Returns the capture register value of the selected channel.
Definition: IfxCcu6.c:158
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:444
IfxCcu6_PwmBc_updateHallPattern
void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern.
Definition: IfxCcu6_PwmBc.c:494
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:215
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2016


iLLD_TC26B: IfxCcu6_PwmBc.h Source File

  • Ccu6
  • PwmBc
IfxCcu6_PwmBc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmBc.h
3 * \brief CCU6 PWMBC details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Ccu6_PwmBc_Usage How to use the CCU6 PWMBC Interface driver?
26 * \ingroup IfxLld_Ccu6_PwmBc
27 *
28 * The PWMBC interface driver provides a default CCU6 configuration specifically for running a Brush Less DC Motor using hall sensor inputs, by utilising both the timers
29 *
30 * After evaluating the hall input pattern at every T13 period match, new out pattern is given to the module after the phase delay at the T13 zero match
31 *
32 * User has to prepare the control table for the respective motor he/she is using,
33 *
34 * In the following sections it will be described, how to integrate the driver into the application framework.
35 *
36 *
37 * \section IfxLld_Ccu6_PwmBc_Preparation Preparation
38 *
39 *
40 * \subsection IfxLld_Ccu6_PwmBc_Include Include Files
41 *
42 * Include following header file into your C code:
43 * \code
44 * #include <Ccu6/PwmBc/IfxCcu6_PwmBc.h>
45 * \endcode
46 *
47 * \subsection IfxLld_Ccu6_PwmBc_Variables Variables
48 *
49 * Declare the PWMBC handle and the motor control table as global variables in your C code:
50 *
51 * \code
52 * // used globally
53 * static IfxCcu6_PwmBc pwmBc;
54 * // prepare the control table
55 * uint8 controlTable[6][3] = {{1, 5, 17} ,
56 * {2, 3, 36} ,
57 * {3, 1, 6} ,
58 * {4, 6, 18} ,
59 * {5, 4, 24} ,
60 * {6, 2, 9}};
61 * // to store value of the speed
62 * uint32 speed = 0;
63 * \endcode
64 *
65 * \subsection IfxLld_Ccu6_PwmBc_Interrupt Interrupt Handler Installation
66 *
67 * See also \ref IfxLld_Cpu_Irq_Usage
68 *
69 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
70 * \code
71 * // priorities are normally defined in Ifx_IntPrioDef.h
72 * #define IFX_INTPRIO_CCU6 1
73 * \endcode
74 *
75 * Add the interrupt service routine to your C code.
76 * \code
77 * IFX_INTERRUPT(ccu60ISR_PwmBc, 0, IFX_INTPRIO_CCU6)
78 * {
79 * //user code
80 * }
81 * \endcode
82 *
83 * Finally install the interrupt handlers in your initialisation function:
84 * \code
85 * // install interrupt handlers
86 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_PwmBc, IFX_INTPRIO_CCU6);
87 * IfxCpu_enableInterrupts();
88 * \endcode
89 *
90 * \subsection IfxLld_Ccu6_PwmBc_Init Module Initialisation
91 *
92 * The module initialisation can be done in the same function. Here an example:
93 *
94 * \code
95 * // create configuration
96 * IfxCcu6_PwmBc_Config pwmBcConfig;
97 * IfxCcu6_PwmBc_initModuleConfig(&pwmBcConfig, &MODULE_CCU60);
98 *
99 * // configure the frequencies of both the timers
100 * pwmBcConfig.base.t12Frequency = 400000;
101 * pwmBcConfig.base.t13Frequency = 400000;
102 *
103 * // configure the periods of both the timers
104 * pwmBcConfig.base.t12Period = 100;
105 * pwmBcConfig.base.t13Period = 100;
106 *
107 * // configure the phase delay and noise filter for hall input
108 * pwmBcConfig.base.phaseDelay = 20;
109 * pwmBcConfig.base.noiseFilter = 10;
110 *
111 * // select the active state of the output
112 * pwmBcConfig.base.activeState = Ifx_ActiveState_high;
113 *
114 * // configure timer12
115 * pwmBcConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
116 * pwmBcConfig.timer12.counterValue = 0;
117 *
118 * // configure timer13
119 * pwmBcConfig.timer13.counterValue = 0;
120 * pwmBcConfig.timer13.compareValue = 100;
121 * // configure the syncronisation, in case of sync start with T12
122 * pwmBcConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
123 * pwmBcConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
124 *
125 * // configure hall sync event that starts the hall input pattern evaluation
126 * pwmBcConfig.hallSyncEvent = IfxCcu6_HallSensorTriggerMode_t13PM,
127 *
128 * // configure multi channel control
129 * pwmBcConfig.multiChannelControl.switchingSelect = IfxCcu6_MultiChannelSwitchingSelect_t12Channel1CompareMatch,
130 * pwmBcConfig.multiChannelControl.switchingSync = IfxCcu6_MultiChannelSwitchingSync_t13ZeroMatch,
131 *
132 * // pin configuration
133 * const IfxCcu6_PwmBc_Pins pins = {
134 * IfxCcu60_CC60_P02_0_OUT, // CC60Out pin
135 * IfxCcu60_CC61_P02_2_OUT, // CC61Out pin
136 * IfxCcu60_CC62_P02_4_OUT, // CC62Out pin
137 * IfxCcu60_COUT60_P02_1_OUT, // COUT60 pin
138 * IfxCcu60_COUT60_P02_3_OUT, // COUT61 pin
139 * IfxCcu60_COUT60_P02_5_OUT, // COUT62 pin
140 * NULL, // COUT63 pin not used
141 *
142 * IfxCcu60_COUT60_P02_6_OUT // CCPOS0In pin
143 * IfxCcu60_COUT60_P02_7_OUT // CCPOS1In pin
144 * IfxCcu60_COUT60_P02_8_OUT // CCPOS2In pin
145 *
146 * IfxPort_OutputMode_pushPull,
147 * IfxPort_PadDriver_cmosAutomotiveSpeed1,
148 * IfxPort_InputMode_pullUp
149 * };
150 * pwmBcConfig.pins = &pins;
151 *
152 * // configure the interrupts
153 * pwmBcConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_cc61FallingEdge;
154 * pwmBcConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
155 * pwmBcConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
156 * pwmBcConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
157 *
158 * // configure input and output triggers
159 * pwmBcConfig.trigger.t12ExtInputTrigger = NULL_PTR;
160 * pwmBcConfig.trigger.t12ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
161 * pwmBcConfig.trigger.t13ExtInputTrigger = NULL_PTR;
162 * pwmBcConfig.trigger.t13ExtInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
163 * pwmBcConfig.trigger.t13InSyncWithT12 = FALSE;
164 *
165 * pwmBcConfig.trigger.outputTriggerEnabled = TRUE;
166 * pwmBcConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
167 * pwmBcConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
168 *
169 *
170 * // initialize the module
171 * IfxCcu6_PwmBc_initModule(&pwmBc, &pwmBcConfig);
172 * \endcode
173 *
174 *
175 * The PwmBc is ready for use now!
176 *
177 *
178 * \section IfxLld_Ccu6_PwmBc_ModulationControl Modulation Control
179 *
180 *
181 * The PWMBC driver provides simple to use Motor Control functions
182 *
183 * This means: you can start, stop, the BLDC motor once the module is initialised with the appropriate configuration
184 * You can optionally get the speed of the motor at any point of time
185 *
186 * Start the motor
187 *
188 * \code
189 * IfxCcu6_PwmBc_start(&pwmBc);
190 * \endcode
191 *
192 * Stop the motor
193 *
194 * \code
195 * IfxCcu6_PwmBc_stop(&pwmBc);
196 * \endcode
197 *
198 * Update the output pattern
199 *
200 * \code
201 * // prepare the control table
202 * // assumed to be declared globally
203 * uint8 controlTable[6][3] = {{1, 5, 17} ,
204 * {2, 3, 36} ,
205 * {3, 1, 6} ,
206 * {4, 6, 18} ,
207 * {5, 4, 24} ,
208 * {6, 2, 9}};
209 *
210 * // update the output pattern
211 * IfxCcu6_PwmBc_updateHallPattern(&pwmBc, controlTable[6][3]);
212 * \endcode
213 *
214 * Get the current motor speed
215 * (can also be called in ISR)
216 *
217 * \code
218 * // assumed to be declared globally
219 * uint32 speed = 0;
220 *
221 * // get the current motor speed
222 * speed = IfxCcu6_PwmBc_getMotorSpeed(&pwmBc);
223 * \endcode
224 *
225 * \defgroup IfxLld_Ccu6_PwmBc PWMBC Interface driver
226 * \ingroup IfxLld_Ccu6
227 * \defgroup IfxLld_Ccu6_PwmBc_DataStructures Data Structures
228 * \ingroup IfxLld_Ccu6_PwmBc
229 * \defgroup IfxLld_Ccu6_PwmBc_Module_Initialize_Functions Module Initialize Functions
230 * \ingroup IfxLld_Ccu6_PwmBc
231 * \defgroup IfxLld_Ccu6_PwmBc_Modulation_Control_Functions Modulation Control Functions
232 * \ingroup IfxLld_Ccu6_PwmBc
233 * \defgroup IfxLld_Ccu6_PwmBc_Hall_Pattern_Functions Hall Pattern Functions
234 * \ingroup IfxLld_Ccu6_PwmBc
235 */
236
237 #ifndef IFXCCU6_PWMBC_H
238 #define IFXCCU6_PWMBC_H 1
239
240 /******************************************************************************/
241 /*----------------------------------Includes----------------------------------*/
242 /******************************************************************************/
243
244 #include "Ccu6/Std/IfxCcu6.h"
245 #include "If/Ccu6If/PwmHl.h"
246
247 /******************************************************************************/
248 /*-----------------------------Data Structures--------------------------------*/
249 /******************************************************************************/
250
251 /** \addtogroup IfxLld_Ccu6_PwmBc_DataStructures
252 * \{ */
253 /** \brief Structure for interrupt configuration
254 */
255 typedef struct
256 {
257 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
258 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
259 uint16 priority; /**< \brief Interrupt priority */
260 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
261 } IfxCcu6_PwmBc_InterruptConfig;
262
263 /** \brief Structure for multichannel mode control
264 */
265 typedef struct
266 {
267 IfxCcu6_MultiChannelSwitchingSelect switchingSelect; /**< \brief Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP */
268 IfxCcu6_MultiChannelSwitchingSync switchingSync; /**< \brief Synchronization selection for the shadow transfer event MCM_ST */
269 } IfxCcu6_PwmBc_MultiChannelControl;
270
271 /** \brief Structure for CCU6 output pin configuration
272 */
273 typedef struct
274 {
275 IFX_CONST IfxCcu6_Cc60_Out *cc60Out; /**< \brief CC60 compare output CC0 */
276 IFX_CONST IfxCcu6_Cc61_Out *cc61Out; /**< \brief CC61 compare output CC1 */
277 IFX_CONST IfxCcu6_Cc62_Out *cc62Out; /**< \brief CC62 compare output CC2 */
278 IFX_CONST IfxCcu6_Cout60_Out *cout60; /**< \brief CC60 compare output COUT0 */
279 IFX_CONST IfxCcu6_Cout61_Out *cout61; /**< \brief CC61 compare output COUT1 */
280 IFX_CONST IfxCcu6_Cout62_Out *cout62; /**< \brief CC62 compare output COUT2 */
281 IFX_CONST IfxCcu6_Cout63_Out *cout63; /**< \brief CC63 compare output COUT3 */
282 IFX_CONST IfxCcu6_Ccpos0_In *ccpos0; /**< \brief CCPOS0 input signal */
283 IFX_CONST IfxCcu6_Ccpos1_In *ccpos1; /**< \brief CCPOS2 input signal */
284 IFX_CONST IfxCcu6_Ccpos2_In *ccpos2; /**< \brief CCPOS2 input signal */
285 IfxPort_OutputMode outputMode; /**< \brief The pin output mode which should be configured */
286 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
287 IfxPort_InputMode inputMode; /**< \brief The CCPOSx pin input mode which should be configured */
288 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
289 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
290 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
291 } IfxCcu6_PwmBc_Pins;
292
293 /** \brief Structure for Timer 12
294 */
295 typedef struct
296 {
297 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
298 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
299 } IfxCcu6_PwmBc_Timer12;
300
301 /** \brief Structure for Timer 13
302 */
303 typedef struct
304 {
305 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
306 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
307 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
308 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
309 } IfxCcu6_PwmBc_Timer13;
310
311 /** \brief Configuration structure for external triggers
312 */
313 typedef struct
314 {
315 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External input signal selection for timer 12 */
316 IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode; /**< \brief Event of signal T12HR that can set the run bit T12R by HW */
317 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External input signal selection for timer 13 */
318 IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode; /**< \brief Event of signal T13HR that can set the run bit T13R by HW */
319 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
320 boolean outputTriggerEnabled; /**< \brief Output trigger connection to VADC enable / disable choice */
321 IfxCcu6_TrigOut outputLine; /**< \brief Trigger out selection */
322 IfxCcu6_TrigSel outputTrigger; /**< \brief Trigger selection */
323 } IfxCcu6_PwmBc_TriggerConfig;
324
325 /** \} */
326
327 /** \addtogroup IfxLld_Ccu6_PwmBc_DataStructures
328 * \{ */
329 /** \brief Module handle
330 */
331 typedef struct
332 {
333 PwmHl base; /**< \brief Base PWMHL object */
334 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
335 IfxCcu6_PwmBc_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
336 uint8 hallPatternIndex; /**< \brief Hall pattern index of motor control table */
337 } IfxCcu6_PwmBc;
338
339 /** \brief Configuration structure of the module
340 */
341 typedef struct
342 {
343 PwmHl_Config base; /**< \brief Base configuration */
344 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
345 IfxCcu6_PwmBc_Timer12 timer12; /**< \brief Structure for Timer 12 */
346 IfxCcu6_PwmBc_Timer13 timer13; /**< \brief Structure for Timer 13 */
347 uint8 hallPatternIndex; /**< \brief Hall pattern index of motor control table */
348 IfxCcu6_HallSensorTriggerMode hallSyncEvent; /**< \brief Hall pattern evaluation trigger selection (HSYNC) */
349 IfxCcu6_PwmBc_MultiChannelControl multiChannelControl; /**< \brief Structure for multichannel mode control */
350 IfxCcu6_PwmBc_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
351 IfxCcu6_PwmBc_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
352 IfxCcu6_PwmBc_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
353 IfxCcu6_PwmBc_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
354 IfxCcu6_PwmBc_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
355 IfxCcu6_PwmBc_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
356 } IfxCcu6_PwmBc_Config;
357
358 /** \} */
359
360 /** \addtogroup IfxLld_Ccu6_PwmBc_Module_Initialize_Functions
361 * \{ */
362
363 /******************************************************************************/
364 /*-------------------------Global Function Prototypes-------------------------*/
365 /******************************************************************************/
366
367 /** \brief Initialises the module with default configuration
368 * \param pwmBc Module handle
369 * \param config Configuration structure of the module
370 * \return None
371 *
372 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
373 *
374 */
375 IFX_EXTERN void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config);
376
377 /** \brief Fills the config structure with default values
378 * \param config Configuration structure of the module
379 * \param ccu6 Pointer to the base of CCU6 registers
380 * \return None
381 *
382 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
383 *
384 */
385 IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6);
386
387 /** \} */
388
389 /** \addtogroup IfxLld_Ccu6_PwmBc_Modulation_Control_Functions
390 * \{ */
391
392 /******************************************************************************/
393 /*-------------------------Global Function Prototypes-------------------------*/
394 /******************************************************************************/
395
396 /** \brief Starts the Hall sensored based PWM
397 * \param pwmBc Module handle
398 * \return None
399 *
400 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
401 *
402 */
403 IFX_EXTERN void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc);
404
405 /** \brief Stops the Hall sensored based PWM
406 * \param pwmBc Module handle
407 * \return None
408 *
409 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
410 *
411 */
412 IFX_EXTERN void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc);
413
414 /** \} */
415
416 /** \addtogroup IfxLld_Ccu6_PwmBc_Hall_Pattern_Functions
417 * \{ */
418
419 /******************************************************************************/
420 /*-------------------------Global Function Prototypes-------------------------*/
421 /******************************************************************************/
422
423 /** \brief returns the current motor speed
424 * \param pwmBc Module handle
425 * \return speed
426 *
427 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
428 *
429 */
430 IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc);
431
432 /** \brief Updates the Hall pattern
433 * \param pwmBc Module handle
434 * \param controlTable Motor Control table
435 * \return None
436 *
437 * A coding example can be found in \ref IfxLld_Ccu6_PwmBc_Usage
438 *
439 */
440 IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc * pwmBc, uint8 controlTable[6][3]);
441
442 /** \} */
443
444 #endif /* IFXCCU6_PWMBC_H */
IfxCcu6_PwmBc_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_PwmBc.h:306
IfxCcu6_PwmBc_Config::interrupt2
IfxCcu6_PwmBc_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_PwmBc.h:352
IfxCcu6_PwmBc_getMotorSpeed
IFX_EXTERN uint32 IfxCcu6_PwmBc_getMotorSpeed(IfxCcu6_PwmBc *pwmBc)
returns the current motor speed
Definition: IfxCcu6_PwmBc.c:36
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:127
IfxCcu6_PwmBc_Config
Configuration structure of the module.
Definition: IfxCcu6_PwmBc.h:341
IfxCcu6_Ccpos1_In
CCPOS1 pin mapping structure.
Definition: IfxCcu6_PinMap.h:71
IfxCcu6_PwmBc_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:273
IfxCcu6_PwmBc_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_PwmBc.h:285
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:162
IfxCcu6_MultiChannelSwitchingSelect
IfxCcu6_MultiChannelSwitchingSelect
Selection of the trigger request source (next multi-channel event) for the shadow transfer MCM_ST fro...
Definition: IfxCcu6.h:188
IfxCcu6_PwmBc_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:290
IfxCcu6_PwmBc::base
PwmHl base
Base PWMHL object.
Definition: IfxCcu6_PwmBc.h:333
IfxCcu6_PwmBc_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_PwmBc.h:257
IfxCcu6_PwmBc_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_PwmBc.h:286
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:159
IfxCcu6_PwmBc_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_PwmBc.h:298
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:111
IfxCcu6_PwmBc_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_PwmBc.h:255
IfxCcu6_PwmBc_MultiChannelControl::switchingSync
IfxCcu6_MultiChannelSwitchingSync switchingSync
Synchronization selection for the shadow transfer event MCM_ST.
Definition: IfxCcu6_PwmBc.h:268
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxCcu6_PwmBc_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_PwmBc.h:260
uint32
unsigned long uint32
Definition: Platform_Types.h:113
PwmHl_Config
Configuration structure of the TPwm interface.
Definition: PwmHl.h:58
IfxCcu6_HallSensorTriggerMode
IfxCcu6_HallSensorTriggerMode
Defines the source for the sampling of the Hall input pattern and the comparison to the current and t...
Definition: IfxCcu6.h:146
IfxCcu6_PwmBc_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_PwmBc.h:279
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:291
IfxCcu6_PwmBc_Timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:295
IfxCcu6_PwmBc_Timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:303
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxCcu6_PwmBc::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_PwmBc.h:334
IfxCcu6_PwmBc_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_PwmBc.h:289
IfxCcu6_PwmBc_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_PwmBc.h:276
PwmHl.h
Multi-channels, dual-complementary PWM interface.
IfxCcu6_PwmBc_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_PwmBc.h:320
IfxCcu6_PwmBc_Config::timer12
IfxCcu6_PwmBc_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_PwmBc.h:345
IfxCcu6_PwmBc_Config::interrupt4
IfxCcu6_PwmBc_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_PwmBc.h:354
IfxCcu6_PwmBc::hallPatternIndex
uint8 hallPatternIndex
Hall pattern index of motor control table.
Definition: IfxCcu6_PwmBc.h:336
PwmHl_s
Structure of the TPwm interface.
Definition: PwmHl.h:46
IfxCcu6_PwmBc_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_PwmBc.h:297
IfxCcu6_PwmBc_Config::hallSyncEvent
IfxCcu6_HallSensorTriggerMode hallSyncEvent
Hall pattern evaluation trigger selection (HSYNC)
Definition: IfxCcu6_PwmBc.h:348
IfxCcu6_PwmBc_stop
IFX_EXTERN void IfxCcu6_PwmBc_stop(IfxCcu6_PwmBc *pwmBc)
Stops the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:456
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCcu6_PwmBc_Pins::ccpos1
IFX_CONST IfxCcu6_Ccpos1_In * ccpos1
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:283
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:151
IfxCcu6_PwmBc_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_PwmBc.h:308
IfxCcu6_PwmBc_Config::base
PwmHl_Config base
Base configuration.
Definition: IfxCcu6_PwmBc.h:343
IfxCcu6_PwmBc_MultiChannelControl::switchingSelect
IfxCcu6_MultiChannelSwitchingSelect switchingSelect
Trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS to MCMP...
Definition: IfxCcu6_PwmBc.h:267
IfxCcu6_Ccpos0_In
CCPOS0 pin mapping structure.
Definition: IfxCcu6_PinMap.h:63
IfxCcu6_PwmBc_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_PwmBc.h:277
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu6_PwmBc_start
IFX_EXTERN void IfxCcu6_PwmBc_start(IfxCcu6_PwmBc *pwmBc)
Starts the Hall sensored based PWM.
Definition: IfxCcu6_PwmBc.c:403
IfxCcu6_PwmBc_initModule
IFX_EXTERN void IfxCcu6_PwmBc_initModule(IfxCcu6_PwmBc *pwmBc, const IfxCcu6_PwmBc_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_PwmBc.c:51
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:135
IfxCcu6_PwmBc_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_PwmBc.h:313
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_PwmBc_Pins::inputMode
IfxPort_InputMode inputMode
The CCPOSx pin input mode which should be configured.
Definition: IfxCcu6_PwmBc.h:287
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:213
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:302
IfxCcu6_PwmBc_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_PwmBc.h:288
IfxCcu6_PwmBc_initModuleConfig
IFX_EXTERN void IfxCcu6_PwmBc_initModuleConfig(IfxCcu6_PwmBc_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_PwmBc.c:316
IfxCcu6_PwmBc_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_PwmBc.h:258
IfxCcu6_PwmBc_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_PwmBc.h:321
IfxCcu6_PwmBc::trigger
IfxCcu6_PwmBc_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_PwmBc.h:335
IfxCcu6_PwmBc_Pins::ccpos0
IFX_CONST IfxCcu6_Ccpos0_In * ccpos0
CCPOS0 input signal.
Definition: IfxCcu6_PwmBc.h:282
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:280
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:119
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t12ExtInputTriggerMode
Event of signal T12HR that can set the run bit T12R by HW.
Definition: IfxCcu6_PwmBc.h:316
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_PwmBc.h:317
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxCcu6_PwmBc_Pins::ccpos2
IFX_CONST IfxCcu6_Ccpos2_In * ccpos2
CCPOS2 input signal.
Definition: IfxCcu6_PwmBc.h:284
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:132
IfxCcu6_PwmBc_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_PwmBc.h:259
IfxCcu6_PwmBc_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_PwmBc.h:307
IfxCcu6_PwmBc_Config::interrupt1
IfxCcu6_PwmBc_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_PwmBc.h:351
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_PwmBc_MultiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:265
IfxCcu6_PwmBc
Module handle.
Definition: IfxCcu6_PwmBc.h:331
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxCcu6_PwmBc_TriggerConfig::t13ExtInputTriggerMode
IfxCcu6_ExternalTriggerMode t13ExtInputTriggerMode
Event of signal T13HR that can set the run bit T13R by HW.
Definition: IfxCcu6_PwmBc.h:318
IfxCcu6_PwmBc_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_PwmBc.h:275
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:77
IfxCcu6_PwmBc_Config::pins
IfxCcu6_PwmBc_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_PwmBc.h:350
IfxCcu6_PwmBc_Config::timer13
IfxCcu6_PwmBc_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_PwmBc.h:346
IfxCcu6_Ccpos2_In
CCPOS2 pin mapping structure.
Definition: IfxCcu6_PinMap.h:79
IfxCcu6_PwmBc_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_PwmBc.h:319
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:143
IfxCcu6_PwmBc_Config::interrupt3
IfxCcu6_PwmBc_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_PwmBc.h:353
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:70
IfxCcu6_PwmBc_Config::multiChannelControl
IfxCcu6_PwmBc_MultiChannelControl multiChannelControl
Structure for multichannel mode control.
Definition: IfxCcu6_PwmBc.h:349
IfxCcu6_MultiChannelSwitchingSync
IfxCcu6_MultiChannelSwitchingSync
Selection of the synchronization mechanism for the shadow transfer event MCM_ST Definition in Ifx_CCU...
Definition: IfxCcu6.h:202
IfxCcu6_PwmBc_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_PwmBc.h:280
IfxCcu6_PwmBc_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_PwmBc.h:281
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCcu6_PwmBc_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Trigger selection.
Definition: IfxCcu6_PwmBc.h:322
IfxCcu6_PwmBc_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_PwmBc.h:278
IfxCcu6_PwmBc_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_PwmBc.h:315
IfxCcu6_PwmBc_updateHallPattern
IFX_EXTERN void IfxCcu6_PwmBc_updateHallPattern(IfxCcu6_PwmBc *pwmBc, uint8 controlTable[6][3])
Updates the Hall pattern.
Definition: IfxCcu6_PwmBc.c:494


iLLD_TC26B: IfxCcu6_PwmHl.c Source File

  • Ccu6
  • PwmHl
IfxCcu6_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmHl.c
3 * \brief CCU6 PWMHL details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxCcu6_PwmHl.h"
30 #include "_Utilities/Ifx_Assert.h"
31 #include "stddef.h"
32 #include "string.h"
33
34 /** \addtogroup IfxLld_Ccu6_PwmHl_StdIf_Functions
35 * \{ */
36
37 /******************************************************************************/
38 /*-----------------------Private Function Prototypes--------------------------*/
39 /******************************************************************************/
40
41 /** \brief Turn-off the complementary PWM generation mode.
42 *
43 * \note The changes are not applied until Timer->applyUpdate() is called.
44 * \note This function will set the ON time to ZERO, overriding previous call to
45 * IfxCcu6_PwmHl_setOnTime().
46 * \note This function will disable PWM in all channels, overriding previous call to
47 * IfxCcu6_PwmHl_setupChannels().
48 * \param driver CCU6 PWM driver
49 * \return None
50 */
51 IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver);
52
53 /** \brief Turn-on the complementary PWM generation mode.
54 *
55 * \note The changes are not applied until Timer->applyUpdate() is called.
56 * \note This function will disable PWM in all channels, overriding previous call to
57 * IfxCcu6_PwmHl_setupChannels().
58 * \param driver CCU6 PWM driver
59 * \return None
60 */
61 IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver);
62
63 /** \brief Sets up the output pins
64 * \param module Pointer to register base
65 * \param config CCU6 : PWM HL configuration
66 * \return None
67 */
68 IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config);
69
70 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
71 * \param driver CCU6 PWM driver
72 * \param tOn T on
73 * \return None
74 */
75 IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
76
77 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
78 * \param driver CCU6 PWM driver
79 * \param tOn T on
80 * \return None
81 */
82 IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
83
84 /** \brief Set the outputs to inactive
85 * \param driver CCU6 PWM driver
86 * \param tOn T on
87 * \return None
88 */
89 IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
90
91 /** \} */
92
93 /******************************************************************************/
94 /*------------------------Private Variables/Constants-------------------------*/
95 /******************************************************************************/
96
97 IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
98 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxCcu6_PwmHl_updateCenterAligned},
99 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxCcu6_PwmHl_updateCenterAligned},
100 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxCcu6_PwmHl_updateEdgeAligned },
101 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxCcu6_PwmHl_updateEdgeAligned },
102 {Ifx_Pwm_Mode_off, FALSE, &IfxCcu6_PwmHl_updateOff }
103 };
104
105 /******************************************************************************/
106 /*-------------------------Function Implementations---------------------------*/
107 /******************************************************************************/
108
109 IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver)
110 {
111 IfxCcu6_TimerWithTrigger *timer = driver->timer;
112 Ifx_CCU6 *module = timer->ccu6;
113 Ifx_CCU6_CMPSTAT cmpstat;
114
115 Ifx_TimerValue tOn[3] = {0, 0, 0};
116 IfxCcu6_PwmHl_setOnTime(driver, tOn);
117
118 /** - All TOP and BOTTOM channel (COUTx) states equals CC6xST */
119 cmpstat.U = 0;
120 //cmpstat.B.T13IM = 0;
121 //cmpstat.B.COUT63PS = 0;
122 //cmpstat.B.CC60PS = 0;
123 //cmpstat.B.CC61PS = 0;
124 //cmpstat.B.CC62PS = 0;
125 //cmpstat.B.COUT60PS = 0;
126 //cmpstat.B.COUT61PS = 0;
127 //cmpstat.B.COUT62PS = 0;
128 module->CMPSTAT.U = cmpstat.U;
129
130 {
131 /* set all into stuck-states */
132 //boolean active[6] = {TRUE, TRUE, TRUE, TRUE, TRUE, TRUE};
133 boolean active[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
134 boolean stuckState[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
135 IfxCcu6_PwmHl_setupChannels(driver, active, stuckState);
136 }
137 }
138
139
140 IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver)
141 {
142 IfxCcu6_TimerWithTrigger *timer = (IfxCcu6_TimerWithTrigger *)driver->timer;
143 Ifx_CCU6 *module = timer->ccu6;
144 /** - All TOP and BOTTOM channel (COUTx) states equals CC6xST */
145 Ifx_CCU6_CMPSTAT cmpstat;
146 cmpstat.U = 0;
147 //cmpstat.B.T13IM = 0;
148 //cmpstat.B.COUT63PS = 0;
149 //cmpstat.B.CC60PS = 0;
150 //cmpstat.B.CC61PS = 0;
151 //cmpstat.B.CC62PS = 0;
152 cmpstat.B.COUT60PS = 1;
153 cmpstat.B.COUT61PS = 1;
154 cmpstat.B.COUT62PS = 1;
155
156 module->CMPSTAT.U = cmpstat.U;
157 {
158 /* set all into non stuck-states */
159 boolean active[6] = {TRUE, TRUE, TRUE, TRUE, TRUE, TRUE};
160 boolean stuckState[6] = {FALSE, FALSE, FALSE, FALSE, FALSE, FALSE};
161 IfxCcu6_PwmHl_setupChannels(driver, active, stuckState);
162 }
163 }
164
165
166 float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
167 {
168 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
169 }
170
171
172 float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
173 {
174 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
175 }
176
177
178 Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
179 {
180 return driver->base.mode;
181 }
182
183
184 boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
185 {
186 boolean result = TRUE;
187
188 IfxCcu6_TimerWithTrigger *timer = config->timer;
189 Ifx_CCU6 *module = timer->ccu6;
190
191 driver->base.mode = Ifx_Pwm_Mode_init;
192 driver->timer = timer;
193 driver->base.setMode = 0;
194 driver->base.inverted = FALSE;
195 driver->base.ccxActiveState = config->base.ccxActiveState;
196 driver->base.coutxActiveState = config->base.coutxActiveState;
197
198 driver->base.channelCount = __minu(config->base.channelCount, IFXCCU6_PWMHL_MAX_CHANNELS);
199
200 IfxCcu6_PwmHl_setDeadtime(driver, config->base.deadtime);
201 IfxCcu6_PwmHl_setMinPulse(driver, config->base.minPulse);
202
203 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount == IFXCCU6_PWMHL_MAX_CHANNELS);
204 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->timer->base.countDir == IfxStdIf_Timer_CountDir_upAndDown);
205
206 unsigned int passiveState;
207 Ifx_CCU6_PSLR pslr;
208 Ifx_CCU6_MODCTR modctr;
209 Ifx_CCU6_MCMOUTS mcmouts;
210 Ifx_CCU6_MCMCTR mcmctr;
211
212 /** - All T12 channels (0,1,2) are set in compare mode */
213
214 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_0, IfxCcu6_T12ChannelMode_compareMode);
215 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_1, IfxCcu6_T12ChannelMode_compareMode);
216 IfxCcu6_setT12ChannelMode(module, IfxCcu6_T12Channel_2, IfxCcu6_T12ChannelMode_compareMode);
217
218 /** - Enable T12 modulation mode */
219 modctr.U = module->MODCTR.U;
220 modctr.B.MCMEN = 1;
221 modctr.B.T12MODEN = 0x3FU;
222 module->MODCTR.U = modctr.U;
223
224 IfxCcu6_setMultiChannelSwitchingMode(module, IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch);
225
226 IfxCcu6_setMultiChannelSwitchingSync(module, IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch);
227
228 mcmctr.U = module->MCMCTR.U;
229 mcmctr.B.STE12D = FALSE;
230 mcmctr.B.STE12U = FALSE;
231 mcmctr.B.STE13U = FALSE;
232 module->MCMCTR.U = mcmctr.U;
233
234 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_0);
235 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_1);
236 IfxCcu6_enableDeadTime(module, IfxCcu6_T12Channel_2);
237
238 /* Configure the passive state */
239 pslr.B.PSL = 0;
240 passiveState = (config->base.ccxActiveState == Ifx_ActiveState_high) ? 0 : 1;
241 pslr.B.PSL |= (passiveState << 0);
242 pslr.B.PSL |= (passiveState << 2);
243 pslr.B.PSL |= (passiveState << 4);
244
245 passiveState = (config->base.coutxActiveState == Ifx_ActiveState_high) ? 0 : 1;
246 pslr.B.PSL |= (passiveState << 1);
247 pslr.B.PSL |= (passiveState << 3);
248 pslr.B.PSL |= (passiveState << 5);
249
250 module->PSLR.B.PSL = pslr.B.PSL;
251
252 IfxCcu6_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
253
254 Ifx_TimerValue tOn[IFXCCU6_PWMHL_MAX_CHANNELS] = {0};
255 IfxCcu6_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
256
257 mcmouts.U = module->MCMOUTS.U;
258 mcmouts.B.MCMPS = 0x3F;
259 mcmouts.B.STRMCM = 1;
260 module->MCMOUTS.U = mcmouts.U;
261
262 IfxCcu6_PwmHl_setOutputPins(module, config);
263
264 //config->base.emergencyEnabled;
265
266 /* Transfer the shadow registers */
267 IfxCcu6_TimerWithTrigger_applyUpdate(driver->timer);
268
269 return result;
270 }
271
272
273 void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
274 {
275 IfxStdIf_PwmHl_initConfig(&config->base);
276 config->timer = NULL_PTR;
277 config->cc0 = NULL_PTR;
278 config->cc1 = NULL_PTR;
279 config->cc2 = NULL_PTR;
280 config->cout0 = NULL_PTR;
281 config->cout1 = NULL_PTR;
282 config->cout2 = NULL_PTR;
283 }
284
285
286 boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
287 {
288 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
289
290 driver->base.deadtime = __minu(__minu(value, driver->timer->base.period / 2), 255);
291
292 IfxCcu6_setDeadTimeValue(driver->timer->ccu6, (uint8)driver->base.deadtime);
293 return TRUE;
294 }
295
296
297 boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
298 {
299 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
300
301 driver->base.minPulse = value + driver->base.deadtime;
302 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
303
304 return TRUE;
305 }
306
307
308 boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
309 {
310 boolean result = TRUE;
311 IfxCcu6_PwmHl_Base *base = &driver->base;
312
313 if (base->mode != mode)
314 {
315 if ((mode > Ifx_Pwm_Mode_off) || (IfxCcu6_PwmHl_modes[mode].update == NULL_PTR))
316 {
317 mode = Ifx_Pwm_Mode_off;
318 result = FALSE;
319 }
320
321 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxCcu6_PwmHl_modes[mode].mode);
322
323 base->mode = mode;
324 driver->update = IfxCcu6_PwmHl_modes[mode].update;
325
326 if (base->mode == Ifx_Pwm_Mode_off)
327 {
328 IfxCcu6_PwmHl_disable(driver);
329 }
330 else
331 {
332 IfxCcu6_PwmHl_enable(driver);
333 }
334 }
335
336 return result;
337 }
338
339
340 void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
341 {
342 // Period = 12
343 // Ton = 2
344 // Center-aligned (the CCx equals CC6xST):
345 // T12PR = (Period/2)-1
346 // T12 = 0 1 2 3 4 5 6 5 4 3 2 1 0 1 2 3
347 // CC6xR = (Period - Ton) / 2 = 5
348 // CC6xST = 1 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0
349 // Right-aligned (the CCx equals CC6xST):
350 // T12PR = (Period-1)
351 // T12 = 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3
352 // CC6xR = (Period - Ton) = 10
353 // CC6xST = 1 0 0 0 0 0 0 0 0 0 0 1 1 0 0 0
354 // Left-aligned (the CCx equals ~CC6xST):
355 // T12PR = (Period-1)
356 // T12 = 0 1 2 3 4 5 6 7 8 9 10 11 0 1 2 3
357 // CC6xR = Ton = 2
358 // CC6xST = 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 0
359 IfxCcu6_TimerWithTrigger *timer = (IfxCcu6_TimerWithTrigger *)driver->timer;
360 Ifx_CCU6 *module = timer->ccu6;
361 int i;
362 int channels = driver->base.channelCount;
363 Ifx_TimerValue period = driver->timer->base.period;
364
365 for (i = 0; i < channels; i++)
366 {
367 Ifx_TimerValue cmp;
368 Ifx_TimerValue tOnX = tOn[i];
369
370 if (tOnX < driver->base.minPulse)
371 {
372 tOnX = 0;
373 }
374 else if (tOnX > driver->base.maxPulse)
375 {
376 tOnX = period;
377 }
378 else
379 {}
380
381 cmp = (period - tOnX);
382 cmp = cmp >> ((driver->base.mode == Ifx_Pwm_Mode_centerAligned) ? 1 : 0);
383 IfxCcu6_setT12CompareValue(module, (IfxCcu6_T12Channel)i, (uint16)cmp);
384 }
385 }
386
387
388 IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
389 {
390 IFX_UNUSED_PARAMETER(module->CLC.U != (uint32)0)
391
392 if (config->cc0 != NULL_PTR)
393 {
394 IfxCcu6_initCc60OutPin(config->cc0, config->base.outputMode, config->base.outputDriver);
395 }
396
397 if (config->cc1 != NULL_PTR)
398 {
399 IfxCcu6_initCc61OutPin(config->cc1, config->base.outputMode, config->base.outputDriver);
400 }
401
402 if (config->cc2 != NULL_PTR)
403 {
404 IfxCcu6_initCc62OutPin(config->cc2, config->base.outputMode, config->base.outputDriver);
405 }
406
407 if (config->cout0 != NULL_PTR)
408 {
409 IfxCcu6_initCout60Pin(config->cout0, config->base.outputMode, config->base.outputDriver);
410 }
411
412 if (config->cout1 != NULL_PTR)
413 {
414 IfxCcu6_initCout61Pin(config->cout1, config->base.outputMode, config->base.outputDriver);
415 }
416
417 if (config->cout2 != NULL_PTR)
418 {
419 IfxCcu6_initCout62Pin(config->cout2, config->base.outputMode, config->base.outputDriver);
420 }
421 }
422
423
424 void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
425 {
426 IfxCcu6_TimerWithTrigger *timer = driver->timer;
427 Ifx_CCU6 *module = timer->ccu6;
428 {
429 uint8 pattern;
430
431 pattern = 0;
432 pattern |= ((activeCh[0] != FALSE) ? 1 : 0) << 0;
433 pattern |= ((activeCh[1] != FALSE) ? 1 : 0) << 1;
434 pattern |= ((activeCh[2] != FALSE) ? 1 : 0) << 2;
435 pattern |= ((activeCh[3] != FALSE) ? 1 : 0) << 3;
436 pattern |= ((activeCh[4] != FALSE) ? 1 : 0) << 4;
437 pattern |= ((activeCh[5] != FALSE) ? 1 : 0) << 5;
438
439 IfxCcu6_setMultiChannelPwmPattern(module, pattern);
440 }
441 {
442 Ifx_CCU6_PSLR pslr;
443 pslr.U = module->PSLR.U;
444 pslr.B.PSL = 0;
445
446 // top:
447 pslr.B.PSL |= ((activeCh[0] == FALSE) ? ((stuckSt[0] == FALSE) ? 0 : 1) : 0) << 0;
448 pslr.B.PSL |= ((activeCh[2] == FALSE) ? ((stuckSt[2] == FALSE) ? 0 : 1) : 0) << 2;
449 pslr.B.PSL |= ((activeCh[4] == FALSE) ? ((stuckSt[4] == FALSE) ? 0 : 1) : 0) << 4;
450
451 // bottom:
452 pslr.B.PSL |= ((activeCh[1] == FALSE) ? ((stuckSt[1] == FALSE) ? 0 : 1) : 0) << 1;
453 pslr.B.PSL |= ((activeCh[3] == FALSE) ? ((stuckSt[3] == FALSE) ? 0 : 1) : 0) << 3;
454 pslr.B.PSL |= ((activeCh[5] == FALSE) ? ((stuckSt[5] == FALSE) ? 0 : 1) : 0) << 5;
455 module->PSLR.U = pslr.U;
456 }
457 }
458
459
460 boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
461 {
462 /* Ensure the stdif is reset to zeros */
463 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
464
465 /* *INDENT-OFF* Note: this file was indented manually by the author. */
466 /* Set the API link */
467 stdif->driver = driver;
468 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxCcu6_PwmHl_setDeadtime;
469 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxCcu6_PwmHl_getDeadtime;
470 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxCcu6_PwmHl_setMinPulse;
471 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxCcu6_PwmHl_getMinPulse;
472 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxCcu6_PwmHl_getMode;
473 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxCcu6_PwmHl_setMode;
474 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxCcu6_PwmHl_setOnTime;
475 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels)&IfxCcu6_PwmHl_setupChannels;
476 IfxCcu6_TimerWithTrigger_stdIfTimerInit(&stdif->timer, driver->timer);
477 /* *INDENT-ON* */
478
479 return TRUE;
480 }
481
482
483 IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
484 {
485 IfxCcu6_PwmHl_setOnTime(driver, tOn);
486 }
487
488
489 IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
490 {
491 IfxCcu6_PwmHl_setOnTime(driver, tOn);
492 }
493
494
495 IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
496 {
497 /* Nothing to do */
498 IFX_UNUSED_PARAMETER(driver)
499 IFX_UNUSED_PARAMETER(tOn)
500 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxCcu6_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxCcu6_PwmHl.h:87
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:72
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
IfxCcu6_PwmHl_updateOff
IFX_STATIC void IfxCcu6_PwmHl_updateOff(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxCcu6_PwmHl.c:495
IfxCcu6_setMultiChannelPwmPattern
IFX_INLINE void IfxCcu6_setMultiChannelPwmPattern(Ifx_CCU6 *ccu6, uint8 pattern)
Sets the output pattern for the multichannel mode (writes into shadow register)
Definition: IfxCcu6.h:1998
IfxCcu6_PwmHl_getMode
Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
Returns Pwm mode.
Definition: IfxCcu6_PwmHl.c:178
IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:79
IfxCcu6_PwmHl_Config::cc2
IfxCcu6_Cc62_Out * cc2
CC2 channel used.
Definition: IfxCcu6_PwmHl.h:104
IfxCcu6_PwmHl_getDeadtime
float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
Returns the dead time.
Definition: IfxCcu6_PwmHl.c:166
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:163
IfxCcu6_PwmHl_s
CCU6 PWM driver.
Definition: IfxCcu6_PwmHl.h:121
IfxCcu6_PwmHl_setOutputPins
IFX_STATIC void IfxCcu6_PwmHl_setOutputPins(Ifx_CCU6 *module, const IfxCcu6_PwmHl_Config *config)
Sets up the output pins.
Definition: IfxCcu6_PwmHl.c:388
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1523
IfxCcu6_MultiChannelSwitchingSelect_t12PeriodMatch
T12 period match detected (while counting up)
Definition: IfxCcu6.h:196
IfxCcu6_PwmHl.h
CCU6 PWMHL details.
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:169
IfxCcu6_PwmHl_Config::cout1
IfxCcu6_Cout61_Out * cout1
COUT1 channel used.
Definition: IfxCcu6_PwmHl.h:106
IfxCcu6_PwmHl_Config::cc0
IfxCcu6_Cc60_Out * cc0
CC0 channel used.
Definition: IfxCcu6_PwmHl.h:102
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:160
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:63
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:418
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:151
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2054
IfxCcu6_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxCcu6_PwmHl.h:112
IfxCcu6_PwmHl_getMinPulse
float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxCcu6_PwmHl.c:172
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:101
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:182
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:429
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:160
IfxCcu6_PwmHl_s::base
IfxCcu6_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:123
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:70
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1955
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxCcu6_PwmHl_init
boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object.
Definition: IfxCcu6_PwmHl.c:184
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1772
IfxCcu6_PwmHl_updateEdgeAligned
IFX_STATIC void IfxCcu6_PwmHl_updateEdgeAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxCcu6_PwmHl.c:489
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1831
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:157
IfxCcu6_PwmHl_setMode
boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxCcu6_PwmHl.c:308
IfxCcu6_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxCcu6_PwmHl.h:88
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu6_PwmHl_stdIfPwmHlInit
boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxCcu6_PwmHl.c:460
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:253
FALSE
#define FALSE
Definition: Platform_Types.h:90
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1824
IfxCcu6_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxCcu6_PwmHl.h:86
IfxCcu6_PwmHl_modes
IFX_STATIC IFX_CONST IfxCcu6_PwmHl_Mode IfxCcu6_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxCcu6_PwmHl.c:97
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:71
IfxCcu6_PwmHl_updateCenterAligned
IFX_STATIC void IfxCcu6_PwmHl_updateCenterAligned(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxCcu6_PwmHl.c:483
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:164
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:62
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:185
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:162
IfxCcu6_PwmHl_s::timer
IfxCcu6_TimerWithTrigger * timer
Pointer to the linked timer object.
Definition: IfxCcu6_PwmHl.h:124
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:93
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:183
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:60
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:165
IfxCcu6_PwmHl_Config::cout2
IfxCcu6_Cout62_Out * cout2
COUT2 channel used.
Definition: IfxCcu6_PwmHl.h:107
IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration.
Definition: IfxCcu6_PwmHl.h:98
IfxCcu6_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxCcu6_PwmHl.h:83
IfxCcu6_setMultiChannelSwitchingMode
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingMode(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSelect mode)
Sets the trigger request source (next multi-channel event) for the shadow transfer MCM_ST from MCMPS ...
Definition: IfxCcu6.h:2004
IfxCcu6_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxCcu6_PwmHl.h:100
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:155
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:164
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1728
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:241
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:85
IfxCcu6_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxCcu6_PwmHl.h:82
IfxCcu6_PwmHl_disable
IFX_STATIC void IfxCcu6_PwmHl_disable(IfxCcu6_PwmHl *driver)
Turn-off the complementary PWM generation mode.
Definition: IfxCcu6_PwmHl.c:109
IfxCcu6_PwmHl_s::update
IfxCcu6_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxCcu6_PwmHl.h:125
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:161
IfxCcu6_PwmHl_setOnTime
void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are compl...
Definition: IfxCcu6_PwmHl.c:340
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:177
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:163
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:343
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:28
IfxCcu6_PwmHl_initConfig
void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxCcu6_PwmHl.c:273
IfxCcu6_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxCcu6_PwmHl.h:84
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:186
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:179
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:166
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:69
IfxCcu6_PwmHl_Config::cout0
IfxCcu6_Cout60_Out * cout0
COUT0 channel used.
Definition: IfxCcu6_PwmHl.h:105
IfxCcu6_MultiChannelSwitchingSync_t12ZeroMatch
A T12 zero-match (while counting up) triggers the shadow transfer.
Definition: IfxCcu6.h:207
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:178
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:171
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_PwmHl_enable
IFX_STATIC void IfxCcu6_PwmHl_enable(IfxCcu6_PwmHl *driver)
Turn-on the complementary PWM generation mode.
Definition: IfxCcu6_PwmHl.c:140
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:162
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:243
IfxCcu6_T12Channel_1
T12 channel CC61.
Definition: IfxCcu6.h:244
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxCcu6_PwmHl_setDeadtime
boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxCcu6_PwmHl.c:286
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:116
IfxCcu6_PwmHl_Config::cc1
IfxCcu6_Cc61_Out * cc1
CC1 channel used.
Definition: IfxCcu6_PwmHl.h:103
IfxCcu6_T12Channel_2
T12 channel CC62.
Definition: IfxCcu6.h:245
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:161
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:165
IfxCcu6_PwmHl_setMinPulse
boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxCcu6_PwmHl.c:297
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1838
IfxCcu6_setMultiChannelSwitchingSync
IFX_INLINE void IfxCcu6_setMultiChannelSwitchingSync(Ifx_CCU6 *ccu6, IfxCcu6_MultiChannelSwitchingSync sync)
Sets the synchronization mechanism of the shadow transfer event MCM_ST if it has been requested befor...
Definition: IfxCcu6.h:2010
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:77
IfxCcu6_TimerWithTrigger_applyUpdate
void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:70
TRUE
#define TRUE
Definition: Platform_Types.h:87
IFXCCU6_PWMHL_MAX_CHANNELS
#define IFXCCU6_PWMHL_MAX_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxCcu6_PwmHl.h:61
IfxCcu6_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxCcu6_PwmHl.h:89
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1750
IfxCcu6_PwmHl_setupChannels
void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxCcu6_PwmHl.c:424
IfxCcu6_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxCcu6_PwmHl.h:85
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:109
IfxCcu6_TimerWithTrigger_stdIfTimerInit
boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:318
IfxCcu6_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxCcu6_PwmHl.h:81
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:73


iLLD_TC26B: IfxCcu6_PwmHl.h Source File

  • Ccu6
  • PwmHl
IfxCcu6_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_PwmHl.h
3 * \brief CCU6 PWMHL details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Ccu6_PwmHl_Usage How to use the CCU6 PWM Driver
25 * \ingroup IfxLld_Ccu6_PwmHl
26 *
27 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
28 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
29 *
30 * \section Specific Specific implementation
31 * \todo add documentation
32 *
33 * For a detailed configuration of the microcontroller, see \ref IfxCcu6_PwmHl_init().
34 *
35 * \defgroup IfxLld_Ccu6_PwmHl PWM Interface Driver
36 * \ingroup IfxLld_Ccu6
37 * \defgroup IfxLld_Ccu6_PwmHl_DataStructures Data Structures
38 * \ingroup IfxLld_Ccu6_PwmHl
39 * \defgroup IfxLld_Ccu6_PwmHl_PwmHl_Functions PwmHl Functions
40 * \ingroup IfxLld_Ccu6_PwmHl
41 * \defgroup IfxLld_Ccu6_PwmHl_StdIf_Functions StdIf Functions
42 * \ingroup IfxLld_Ccu6_PwmHl
43 */
44
45 #ifndef IFXCCU6_PWMHL_H
46 #define IFXCCU6_PWMHL_H 1
47
48 /******************************************************************************/
49 /*----------------------------------Includes----------------------------------*/
50 /******************************************************************************/
51
52 #include "StdIf/IfxStdIf_PwmHl.h"
53 #include "Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h"
54
55 /******************************************************************************/
56 /*-----------------------------------Macros-----------------------------------*/
57 /******************************************************************************/
58
59 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
60 */
61 #define IFXCCU6_PWMHL_MAX_CHANNELS (3)
62
63 /******************************************************************************/
64 /*------------------------------Type Definitions------------------------------*/
65 /******************************************************************************/
66
67 typedef struct IfxCcu6_PwmHl_s IfxCcu6_PwmHl;
68
69 typedef void (*IfxCcu6_PwmHl_Update)(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
70
71 /******************************************************************************/
72 /*-----------------------------Data Structures--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_Ccu6_PwmHl_DataStructures
76 * \{ */
77 /** \brief Multi-channels PWM object definition (channels only)
78 */
79 typedef struct
80 {
81 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
82 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
83 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
84 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
85 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
86 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
87 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
88 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
89 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
90 } IfxCcu6_PwmHl_Base;
91
92 /** \} */
93
94 /** \addtogroup IfxLld_Ccu6_PwmHl_DataStructures
95 * \{ */
96 /** \brief CCU6: PWM HL configuration
97 */
98 typedef struct
99 {
100 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
101 IfxCcu6_TimerWithTrigger *timer; /**< \brief Pointer to the linked timer object */
102 IfxCcu6_Cc60_Out *cc0; /**< \brief CC0 channel used */
103 IfxCcu6_Cc61_Out *cc1; /**< \brief CC1 channel used */
104 IfxCcu6_Cc62_Out *cc2; /**< \brief CC2 channel used */
105 IfxCcu6_Cout60_Out *cout0; /**< \brief COUT0 channel used */
106 IfxCcu6_Cout61_Out *cout1; /**< \brief COUT1 channel used */
107 IfxCcu6_Cout62_Out *cout2; /**< \brief COUT2 channel used */
108 } IfxCcu6_PwmHl_Config;
109
110 /** \brief Structure for PWM configuration
111 */
112 typedef struct
113 {
114 Ifx_Pwm_Mode mode; /**< \brief pwm mode */
115 boolean inverted; /**< \brief Inverted configuration for the selected mode */
116 IfxCcu6_PwmHl_Update update; /**< \brief update call back function for the selected mode */
117 } IfxCcu6_PwmHl_Mode;
118
119 /** \brief CCU6 PWM driver
120 */
121 struct IfxCcu6_PwmHl_s
122 {
123 IfxCcu6_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
124 IfxCcu6_TimerWithTrigger *timer; /**< \brief Pointer to the linked timer object */
125 IfxCcu6_PwmHl_Update update; /**< \brief Update function for actual selected mode */
126 };
127
128 /** \} */
129
130 /** \addtogroup IfxLld_Ccu6_PwmHl_PwmHl_Functions
131 * \{ */
132
133 /******************************************************************************/
134 /*-------------------------Global Function Prototypes-------------------------*/
135 /******************************************************************************/
136
137 /** \brief Initializes the timer object
138 * \note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
139 * Initialise the CCU6 module for PWM generation of high- and low switches usage, e.g.
140 * - electric motor drive
141 * - half-bridge switches
142 *
143 * It is assumed that the whole CCU6 module is only used for purposes mentioned at the
144 * IfxCcu6_PwmHl API. No part of CCU6 module is used for other purpose.
145 *
146 * The timer used should configure the T12 as PWM base timer and T13 as trigger.
147 * \param driver CCU6 PWM driver
148 * \param config CCU6 : PWM HL configuration
149 * \return TRUE on success else FALSE
150 */
151 IFX_EXTERN boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config);
152
153 /** \brief Initialize the configuration structure to default
154 * \param config Channel configuration. This parameter is Initialised by the function
155 * \return None
156 */
157 IFX_EXTERN void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config);
158
159 /** \} */
160
161 /** \addtogroup IfxLld_Ccu6_PwmHl_StdIf_Functions
162 * \{ */
163
164 /******************************************************************************/
165 /*-------------------------Inline Function Prototypes-------------------------*/
166 /******************************************************************************/
167
168 /** \brief Inverts the active state
169 * \param activeState Active state
170 * \return State
171 */
172 IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState);
173
174 /******************************************************************************/
175 /*-------------------------Global Function Prototypes-------------------------*/
176 /******************************************************************************/
177
178 /** \brief Returns the dead time
179 * \param driver CCU6 PWM driver
180 * \return Dead Time
181 *
182 * \see IfxStdIf_PwmHl_GetDeadtime
183 *
184 */
185 IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver);
186
187 /** \brief Returns the minimum pulse
188 * \param driver CCU6 PWM driver
189 * \return Min Pulse
190 *
191 * \see IfxStdIf_PwmHl_GetMinPulse
192 *
193 */
194 IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver);
195
196 /** \brief Returns Pwm mode
197 * \param driver CCU6 PWM driver
198 * \return Pwm mode
199 *
200 * \see IfxStdIf_PwmHl_GetMode
201 *
202 */
203 IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver);
204
205 /** \brief Sets the dead time
206 * \note The changes are not applied until Timer->applyUpdate() is called.
207 * \param driver CCU6 PWM driver
208 * \param deadtime Dead time value
209 * \return TRUE on success else FALSE
210 *
211 * \see IfxStdIf_PwmHl_SetDeadtime
212 *
213 */
214 IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime);
215
216 /** \brief Sets the minimum pulse
217 * \param driver CCU6 PWM driver
218 * \param minPulse Minimum pulse
219 * \return TRUE on success else FALSE
220 *
221 * \see IfxStdIf_PwmHl_SetMinPulse
222 *
223 */
224 IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse);
225
226 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
227 * \param driver CCU6 PWM driver
228 * \param mode Pwm mode
229 * \return TRUE on success else FALSE
230 *
231 * \see IfxStdIf_PwmHl_SetMode
232 *
233 */
234 IFX_EXTERN boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode);
235
236 /** \brief Sets the ON time
237 * Assign the ON time to the TOP channels.
238 * The ON time of the BOTTOM channels are complementary.
239 *
240 * \note The changes are not applied until Timer->applyUpdate() is called.
241 * \param driver CCU6 PWM driver
242 * \param tOn ON time
243 * \return None
244 *
245 * \see IfxStdIf_PwmHl_SetOnTime
246 *
247 */
248 IFX_EXTERN void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn);
249
250 /** \brief Set channels which are generating PWM or in "stuck-at" state.
251 *
252 * \note The values for the parameters are arranged as follows:
253 * index = 0 --> phase 0 top
254 * index = 1 --> phase 0 bottom
255 * index = 2 --> phase 1 top
256 * index = 3 --> phase 1 bottom
257 * index = 4 --> phase 2 top
258 * index = 5 --> phase 2 bottom
259 * \param driver CCU6 PWM driver
260 * \param activeCh Pointer to boolean array containing values for PWM channels.
261 * If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
262 * \param stuckSt Pointer to boolean array containing values for active channels.
263 * If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
264 * \return None
265 *
266 * \see IfxStdIf_PwmHl_SetupChannels
267 *
268 */
269 IFX_EXTERN void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
270
271 /** \brief Initialises the statndard interface Pwm
272 * \param stdif Standard interface object, will be initialized by the function
273 * \param driver Interface driver to be used by the standard interface. must be initialised separately
274 * \return TRUE on success else FALSE
275 */
276 IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver);
277
278 /** \} */
279
280 /******************************************************************************/
281 /*---------------------Inline Function Implementations------------------------*/
282 /******************************************************************************/
283
284 IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState)
285 {
286 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
287 }
288
289
290 #endif /* IFXCCU6_PWMHL_H */
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxCcu6_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxCcu6_PwmHl.h:87
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
IfxCcu6_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxCcu6_PwmHl_getMode(IfxCcu6_PwmHl *driver)
Returns Pwm mode.
Definition: IfxCcu6_PwmHl.c:178
IfxCcu6_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:79
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:98
IfxCcu6_PwmHl_Config::cc2
IfxCcu6_Cc62_Out * cc2
CC2 channel used.
Definition: IfxCcu6_PwmHl.h:104
IfxCcu6_PwmHl_getDeadtime
IFX_EXTERN float32 IfxCcu6_PwmHl_getDeadtime(IfxCcu6_PwmHl *driver)
Returns the dead time.
Definition: IfxCcu6_PwmHl.c:166
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:127
IfxCcu6_PwmHl_s
CCU6 PWM driver.
Definition: IfxCcu6_PwmHl.h:121
IfxCcu6_PwmHl_Config::cout1
IfxCcu6_Cout61_Out * cout1
COUT1 channel used.
Definition: IfxCcu6_PwmHl.h:106
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:111
IfxCcu6_PwmHl_Config::cc0
IfxCcu6_Cc60_Out * cc0
CC0 channel used.
Definition: IfxCcu6_PwmHl.h:102
IfxCcu6_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxCcu6_PwmHl.h:112
IfxCcu6_PwmHl_getMinPulse
IFX_EXTERN float32 IfxCcu6_PwmHl_getMinPulse(IfxCcu6_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxCcu6_PwmHl.c:172
float32
float float32
Definition: Platform_Types.h:167
IfxCcu6_PwmHl_s::base
IfxCcu6_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxCcu6_PwmHl.h:123
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:70
IfxCcu6_PwmHl_init
IFX_EXTERN boolean IfxCcu6_PwmHl_init(IfxCcu6_PwmHl *driver, const IfxCcu6_PwmHl_Config *config)
Initializes the timer object.
Definition: IfxCcu6_PwmHl.c:184
IfxCcu6_PwmHl_setMode
IFX_EXTERN boolean IfxCcu6_PwmHl_setMode(IfxCcu6_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxCcu6_PwmHl.c:308
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxCcu6_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxCcu6_PwmHl.h:88
IfxCcu6_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxCcu6_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxCcu6_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxCcu6_PwmHl.c:460
IfxCcu6_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxCcu6_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxCcu6_PwmHl.h:284
IfxCcu6_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxCcu6_PwmHl.h:86
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:151
IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu6_PwmHl_Config::timer
IfxCcu6_TimerWithTrigger * timer
Pointer to the linked timer object.
Definition: IfxCcu6_PwmHl.h:101
IfxCcu6_PwmHl_Update
void(* IfxCcu6_PwmHl_Update)(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxCcu6_PwmHl.h:69
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCcu6_PwmHl_Config::cout2
IfxCcu6_Cout62_Out * cout2
COUT2 channel used.
Definition: IfxCcu6_PwmHl.h:107
IfxCcu6_PwmHl_Config
CCU6: PWM HL configuration.
Definition: IfxCcu6_PwmHl.h:98
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:175
IfxCcu6_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxCcu6_PwmHl.h:83
IfxCcu6_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxCcu6_PwmHl.h:100
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:135
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:155
IfxCcu6_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxCcu6_PwmHl.h:82
IfxCcu6_PwmHl_Mode::update
IfxCcu6_PwmHl_Update update
update call back function for the selected mode
Definition: IfxCcu6_PwmHl.h:116
IfxCcu6_PwmHl_setOnTime
IFX_EXTERN void IfxCcu6_PwmHl_setOnTime(IfxCcu6_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time Assign the ON time to the TOP channels. The ON time of the BOTTOM channels are compl...
Definition: IfxCcu6_PwmHl.c:340
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:119
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxCcu6_PwmHl_initConfig
IFX_EXTERN void IfxCcu6_PwmHl_initConfig(IfxCcu6_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxCcu6_PwmHl.c:273
IfxCcu6_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxCcu6_PwmHl.h:84
IfxCcu6_PwmHl_Config::cout0
IfxCcu6_Cout60_Out * cout0
COUT0 channel used.
Definition: IfxCcu6_PwmHl.h:105
IfxCcu6_PwmHl_setDeadtime
IFX_EXTERN boolean IfxCcu6_PwmHl_setDeadtime(IfxCcu6_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxCcu6_PwmHl.c:286
IfxCcu6_PwmHl_Config::cc1
IfxCcu6_Cc61_Out * cc1
CC1 channel used.
Definition: IfxCcu6_PwmHl.h:103
IfxCcu6_PwmHl_setMinPulse
IFX_EXTERN boolean IfxCcu6_PwmHl_setMinPulse(IfxCcu6_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxCcu6_PwmHl.c:297
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:143
IfxCcu6_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxCcu6_PwmHl.h:89
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
uint8
unsigned char uint8
Definition: Platform_Types.h:105
sint8
signed char sint8
Definition: Platform_Types.h:122
IfxCcu6_PwmHl_setupChannels
IFX_EXTERN void IfxCcu6_PwmHl_setupChannels(IfxCcu6_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxCcu6_PwmHl.c:424
IfxCcu6_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxCcu6_PwmHl.h:85
IfxCcu6_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxCcu6_PwmHl.h:81


iLLD_TC26B: IfxCcu6_TPwm.c Source File

  • Ccu6
  • TPwm
IfxCcu6_TPwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TPwm.c
3 * \brief CCU6 TPWM details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxCcu6_TPwm.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
37 {
38 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
39 tPwm->ccu6 = ccu6SFR; // adding register pointer to module handler
40
41 /* -- hardware module initialisation -- */
42
43 // enable module if it hasn't been enabled by any other interface //
44 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
45 {
46 IfxCcu6_enableModule(ccu6SFR);
47 }
48
49 /* -- timer initialisation -- */
50
51 // Timer 13 initialisation //
52
53 if (config->timer == IfxCcu6_TimerId_t13)
54 {
55 // enable Timer13 if it hasn't been enabled by any other interface //
56 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
57 {
58 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
59 }
60
61 // clock initialisation //
62
63 if (config->clock.t13ExtClockEnabled) // if external source is selected as reference
64 {
65 // input signal selection
66 if (config->clock.t13ExtClockInput != NULL_PTR)
67 {
68 IfxCcu6_setT13InputSignal(config->ccu6, config->clock.t13ExtClockInput);
69 }
70
71 // counting input mode selection
72 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t13, config->clock.t13countingInputMode);
73
74 // period setting
75 IfxCcu6_setT13PeriodValue(ccu6SFR, (uint16)config->base.period);
76 }
77 else // if internal clock is selected as reference
78 {
79 IfxCcu6_setT13Frequency(ccu6SFR, config->base.frequency, config->base.period);
80 }
81
82 // duty cycle initialisation //
83
84 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
85
86 IfxCcu6_setT13CompareValue(ccu6SFR, config->timer13.compareValue);
87
88 // if Timer 13 start is in sync with Timer 12 //
89 if (config->trigger.t13InSyncWithT12)
90 {
91 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
92 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
93 }
94 }
95 else
96 {}
97
98 // Timer 12 initialisation //
99
100 if ((config->timer == IfxCcu6_TimerId_t12) || (config->trigger.t13InSyncWithT12))
101 {
102 Ifx_TimerValue period = config->base.period;
103 Ifx_TimerValue compareValue = config->timer12.compareValue;
104
105 // enable Timer12 if it hasn't been enabled by any other interface //
106 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
107 {
108 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
109 }
110
111 // if Timer 13 start is in sync with Timer 12 //
112 if ((config->trigger.t13InSyncWithT12) && (config->base.waitingTime != 0))
113 {
114 // if in sync with T12 period match
115 if (config->timer13.t12SyncEvent == IfxCcu6_T13TriggerEvent_onT12Period)
116 {
117 period = config->base.waitingTime; // waiting time as period
118 }
119 else if (config->timer13.t12SyncEvent != IfxCcu6_T13TriggerEvent_noAction)
120 {
121 compareValue = config->base.waitingTime; // waiting time as compare value
122 period = config->base.activeCount;
123 }
124 }
125 else
126 {
127 // configuration error
128 }
129
130 // clock initialisation //
131
132 if (config->clock.t12ExtClockEnabled) // if external source is selected as reference
133 {
134 // input signal selection
135 if (config->clock.t12ExtClockInput != NULL_PTR)
136 {
137 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.t12ExtClockInput);
138 }
139
140 // counting input mode selection
141 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.t12countingInputMode);
142
143 // countining mode selection
144 IfxCcu6_setT12CountMode(ccu6SFR, config->timer12.countMode);
145
146 // period selection for center aligned mode
147 if (config->timer12.countMode == IfxCcu6_T12CountMode_centerAligned)
148 {
149 period = (period / 2) - 1;
150 }
151
152 // period setting
153 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
154 }
155 else // if internal clock is selected as reference
156 {
157 // in case of in sync with T13 T12 runs at same frequency as T13
158 IfxCcu6_setT12Frequency(ccu6SFR, config->base.frequency, period, config->timer12.countMode);
159 }
160
161 // duty cycle initialisation //
162
163 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
164
165 IfxCcu6_setT12ChannelMode(ccu6SFR, config->timer12.channelId, config->timer12.channelMode);
166
167 IfxCcu6_setT12CompareValue(ccu6SFR, config->timer12.channelId, (uint16)compareValue);
168
169 // dead time injection if selected
170 if (config->timer12.deadTimeValue)
171 {
172 IfxCcu6_setDeadTimeValue(ccu6SFR, config->timer12.deadTimeValue);
173 IfxCcu6_enableDeadTime(ccu6SFR, config->timer12.channelId);
174 }
175 }
176 else
177 {}
178
179 /* -- output path initialisation -- */
180
181 //enable modulation output path //
182 IfxCcu6_enableModulationOutput(ccu6SFR, config->timer, config->channelOut);
183
184 // output passive logic configuration //
185 //TODO check correct polarity:
186 IfxCcu6_setOutputPassiveState(ccu6SFR, config->channelOut, config->base.activeState);
187
188 /* -- Pin mapping -- */
189
190 const IfxCcu6_TPwm_Pins *pins = config->pins;
191
192 if (pins != NULL_PTR)
193 {
194 IfxCcu6_Cc60_Out *cc60Out = pins->cc60Out;
195
196 if (cc60Out != NULL_PTR)
197 {
198 IfxCcu6_initCc60OutPin(cc60Out, pins->outputMode, pins->pinDriver);
199 }
200
201 IfxCcu6_Cc61_Out *cc61Out = pins->cc61Out;
202
203 if (cc61Out != NULL_PTR)
204 {
205 IfxCcu6_initCc61OutPin(cc61Out, pins->outputMode, pins->pinDriver);
206 }
207
208 IfxCcu6_Cc62_Out *cc62Out = pins->cc62Out;
209
210 if (cc62Out != NULL_PTR)
211 {
212 IfxCcu6_initCc62OutPin(cc62Out, pins->outputMode, pins->pinDriver);
213 }
214
215 IfxCcu6_Cout60_Out *cout60 = pins->cout60;
216
217 if (cout60 != NULL_PTR)
218 {
219 IfxCcu6_initCout60Pin(cout60, pins->outputMode, pins->pinDriver);
220 }
221
222 IfxCcu6_Cout61_Out *cout61 = pins->cout61;
223
224 if (cout61 != NULL_PTR)
225 {
226 IfxCcu6_initCout61Pin(cout61, pins->outputMode, pins->pinDriver);
227 }
228
229 IfxCcu6_Cout62_Out *cout62 = pins->cout62;
230
231 if (cout62 != NULL_PTR)
232 {
233 IfxCcu6_initCout62Pin(cout62, pins->outputMode, pins->pinDriver);
234 }
235
236 IfxCcu6_Cout63_Out *cout63 = pins->cout63;
237
238 if (cout63 != NULL_PTR)
239 {
240 IfxCcu6_initCout63Pin(cout63, pins->outputMode, pins->pinDriver);
241 }
242
243 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
244
245 if (t12hr != NULL_PTR)
246 {
247 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
248 }
249
250 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
251
252 if (t13hr != NULL_PTR)
253 {
254 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
255 }
256 }
257
258 /* -- interrupt initialisation -- */
259
260 if (config->interrupt1.priority > 0)
261 {
262 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
263 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
264
265 volatile Ifx_SRC_SRCR *src;
266 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
267 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
268 IfxSrc_enable(src);
269 }
270
271 if (config->interrupt2.priority > 0)
272 {
273 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
274 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
275
276 volatile Ifx_SRC_SRCR *src;
277 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
278 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
279 IfxSrc_enable(src);
280 }
281
282 if (config->interrupt3.priority > 0)
283 {
284 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
285 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
286
287 volatile Ifx_SRC_SRCR *src;
288 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
289 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
290 IfxSrc_enable(src);
291 }
292
293 if (config->interrupt4.priority > 0)
294 {
295 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
296 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
297
298 volatile Ifx_SRC_SRCR *src;
299 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
300 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
301 IfxSrc_enable(src);
302 }
303
304 /* -- output trigger initialisation --*/
305
306 if (config->trigger.outputTriggerEnabled)
307 {
308 IfxCcu6_connectTrigger(ccu6SFR, config->trigger.outputLine, config->trigger.outputTrigger);
309 }
310
311 tPwm->timer = config->timer;
312 tPwm->channelOut = config->channelOut;
313 tPwm->trigger = config->trigger;
314
315 #if IFX_CFG_USE_STANDARD_INTERFACE
316 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)tPwm == ((uint32)&tPwm->base));
317 tPwm->base.functions.start = (TPwm_Start) & IfxCcu6_TPwm_start;
318 tPwm->base.functions.pause = (TPwm_Pause) & IfxCcu6_TPwm_pause;
319 tPwm->base.functions.resume = (TPwm_Resume) & IfxCcu6_TPwm_resume;
320 tPwm->base.functions.stop = (TPwm_Stop) & IfxCcu6_TPwm_stop;
321 #endif
322 }
323
324
325 void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
326 {
327 const IfxCcu6_TPwm_Config defaultConfig = {
328 .base = {
329 .frequency = 400000,
330 .waitingTime = 20,
331 .activeCount = 0,
332 .period = 100,
333 .activeState = Ifx_ActiveState_high,
334 },
335
336 .ccu6 = NULL_PTR, // will be initialized below
337
338 .timer = IfxCcu6_TimerId_t13,
339
340 .clock = {
341 .t12ExtClockEnabled = FALSE,
342 .t12ExtClockInput = NULL_PTR,
343 .t12countingInputMode = IfxCcu6_CountingInputMode_internal,
344
345 .t13ExtClockEnabled = FALSE,
346 .t13ExtClockInput = NULL_PTR,
347 .t13countingInputMode = IfxCcu6_CountingInputMode_internal,
348 },
349
350 .timer12 = {
351 .channelId = IfxCcu6_T12Channel_0,
352 .channelMode = IfxCcu6_T12ChannelMode_compareMode,
353 .countMode = IfxCcu6_T12CountMode_edgeAligned,
354 .counterValue = 0,
355 .deadTimeValue = 0,
356 .compareValue = 0,
357 },
358
359 .timer13 = {
360 .counterValue = 0,
361 .compareValue = 0,
362 .t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare,
363 .t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp,
364 },
365
366 .channelOut = IfxCcu6_ChannelOut_cout3,
367
368 .pins = NULL_PTR,
369
370 .interrupt1 = {
371 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
372 .serviceRequest = IfxCcu6_ServiceRequest_0,
373 .priority = 0, // interrupt priority 0
374 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
375 },
376
377 .interrupt2 = {
378 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
379 .serviceRequest = IfxCcu6_ServiceRequest_1,
380 .priority = 0, // interrupt priority 0
381 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
382 },
383
384 .interrupt3 = {
385 .source = IfxCcu6_InterruptSource_t12OneMatch,
386 .serviceRequest = IfxCcu6_ServiceRequest_2,
387 .priority = 0, // interrupt priority 0
388 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
389 },
390
391 .interrupt4 = {
392 .source = IfxCcu6_InterruptSource_trap,
393 .serviceRequest = IfxCcu6_ServiceRequest_3,
394 .priority = 0, // interrupt priority 0
395 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
396 },
397
398 .trigger = {
399 .t12ExtInputTrigger = NULL_PTR,
400 .t13ExtInputTrigger = NULL_PTR,
401 .extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
402 .t13InSyncWithT12 = TRUE,
403
404 .outputTriggerEnabled = TRUE,
405 .outputLine = IfxCcu6_TrigOut_0,
406 .outputTrigger = IfxCcu6_TrigSel_cout63,
407 },
408 };
409
410 /* Default Configuration */
411 *config = defaultConfig;
412
413 /* take over module pointer */
414 config->ccu6 = ccu6;
415 }
416
417
418 void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
419 {
420 IfxCcu6_disableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
421 }
422
423
424 void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
425 {
426 IfxCcu6_enableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
427 }
428
429
430 void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
431 {
432 // Timer 13 modulation //
433
434 if (tPwm->timer == IfxCcu6_TimerId_t13)
435 {
436 // enable shadow transfer
437 IfxCcu6_enableShadowTransfer(tPwm->ccu6, FALSE, TRUE);
438
439 // start Timer 13 when not in sync with Timer 12
440 if (!(tPwm->trigger.t13InSyncWithT12))
441 {
442 if (tPwm->trigger.t13ExtInputTrigger != NULL_PTR)
443 {
444 // external start
445 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t13, tPwm->trigger.extInputTriggerMode);
446 IfxCcu6_setT13InputSignal(tPwm->ccu6, tPwm->trigger.t13ExtInputTrigger);
447 }
448 else
449 {
450 // internal start
451 IfxCcu6_startTimer(tPwm->ccu6, FALSE, TRUE);
452 }
453 }
454 else
455 {}
456 }
457 else
458 {}
459
460 // Timer 12 alone for modulation or when in sync with Timer 13 //
461
462 if ((tPwm->timer == IfxCcu6_TimerId_t12) || (tPwm->trigger.t13InSyncWithT12))
463 {
464 // enable shadow transfer
465 IfxCcu6_enableShadowTransfer(tPwm->ccu6, TRUE, FALSE);
466
467 //start Timer 12
468 if (tPwm->trigger.t12ExtInputTrigger != NULL_PTR)
469 {
470 // external start
471 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t12, tPwm->trigger.extInputTriggerMode);
472 IfxCcu6_setT12InputSignal(tPwm->ccu6, tPwm->trigger.t12ExtInputTrigger);
473 }
474 else
475 {
476 // internal start
477 IfxCcu6_startTimer(tPwm->ccu6, TRUE, FALSE);
478 }
479 }
480 else
481 {}
482 }
483
484
485 void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
486 {
487 // Timer 13 modulation //
488
489 if ((tPwm->timer == IfxCcu6_TimerId_t13) || (tPwm->trigger.t13InSyncWithT12))
490 {
491 // disable shadow transfer
492 IfxCcu6_disableShadowTransfer(tPwm->ccu6, FALSE, TRUE);
493
494 // remove external input trigger if any
495 if (tPwm->trigger.t13ExtInputTrigger != NULL_PTR)
496 {
497 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
498 }
499
500 // remove the sync with Timer 12
501 if (tPwm->trigger.t13InSyncWithT12)
502 {
503 IfxCcu6_setT13TriggerEventMode(tPwm->ccu6, IfxCcu6_T13TriggerEvent_noAction);
504 IfxCcu6_setT13TriggerEventDirection(tPwm->ccu6, IfxCcu6_T13TriggerDirection_noAction);
505 }
506
507 // stop Timer 13
508 IfxCcu6_stopTimer(tPwm->ccu6, FALSE, TRUE);
509 }
510
511 // Timer 12 modulation //
512
513 else
514 {
515 // disable shadow transfer
516 IfxCcu6_disableShadowTransfer(tPwm->ccu6, TRUE, FALSE);
517
518 // remove external input trigger if any
519 if (tPwm->trigger.t12ExtInputTrigger != NULL_PTR)
520 {
521 IfxCcu6_setExternalRunMode(tPwm->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
522 }
523
524 // stop Timer 12
525 IfxCcu6_stopTimer(tPwm->ccu6, TRUE, FALSE);
526 }
527
528 // disable the modulation
529 IfxCcu6_disableModulationOutput(tPwm->ccu6, tPwm->timer, tPwm->channelOut);
530 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2133
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:218
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:134
IfxCcu6_TPwm_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_TPwm.h:282
IfxCcu6_TPwm
Module handle.
Definition: IfxCcu6_TPwm.h:293
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1967
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:220
IfxCcu6_TPwm_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:214
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:127
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxCcu6_TPwm_Config::pins
IfxCcu6_TPwm_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:313
IfxCcu6_enableDeadTime
IFX_INLINE void IfxCcu6_enableDeadTime(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel)
Enables the dead time generation for each compare channel (0, 1, 2) of Timer12.
Definition: IfxCcu6.h:1523
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:282
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:179
IfxCcu6_TPwm_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_TPwm.h:215
TPwm_Pause
void(* TPwm_Pause)(TPwm *handle)
Definition: TPwm.h:35
IfxCcu6_TPwm_Config::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_TPwm.h:307
IfxCcu6_TPwm_Config::timer12
IfxCcu6_TPwm_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:310
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:159
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2104
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:111
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:180
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1609
IfxCcu6_setT12ChannelMode
IFX_INLINE void IfxCcu6_setT12ChannelMode(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, IfxCcu6_T12ChannelMode mode)
Sets the operating mode of the Timer12 capture/compare channels.
Definition: IfxCcu6.h:2054
IfxCcu6_TPwm_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_TPwm.h:280
IfxCcu6_TPwm_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_TPwm.h:228
IfxCcu6_TPwm_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_TPwm.h:226
TPwm_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: TPwm.h:64
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCcu6_TPwm_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_TPwm.h:229
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:217
IfxCcu6_TPwm_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_TPwm.h:246
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxCcu6_TPwm_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_TPwm.h:281
IfxCcu6_setDeadTimeValue
IFX_INLINE void IfxCcu6_setDeadTimeValue(Ifx_CCU6 *ccu6, uint8 value)
Sets the delay between switching from the passive state to the active state of the selected outputs (...
Definition: IfxCcu6.h:1955
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:309
IfxCcu6_initCc62OutPin
IFX_INLINE void IfxCcu6_initCc62OutPin(const IfxCcu6_Cc62_Out *cc62Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC62 output pin.
Definition: IfxCcu6.h:1772
IfxCcu6_TPwm_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_TPwm.h:227
IfxCcu6_initCout61Pin
IFX_INLINE void IfxCcu6_initCout61Pin(const IfxCcu6_Cout61_Out *cout61, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT61 output pin.
Definition: IfxCcu6.h:1831
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:266
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:284
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:305
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:320
IfxCcu6_TPwm_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_TPwm.h:219
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1698
TPwm_Start
void(* TPwm_Start)(TPwm *handle)
Definition: TPwm.h:34
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2068
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:360
IfxCcu6_T12ChannelMode_compareMode
Compare mode.
Definition: IfxCcu6.h:253
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1586
IfxCcu6_TPwm_Config::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_TPwm.h:308
IfxCcu6_TPwm_Config::clock
IfxCcu6_TPwm_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:309
IfxCcu6_initCout60Pin
IFX_INLINE void IfxCcu6_initCout60Pin(const IfxCcu6_Cout60_Out *cout60, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT60 output pin.
Definition: IfxCcu6.h:1824
IfxCcu6_TPwm_pause
void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM.
Definition: IfxCcu6_TPwm.c:418
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:151
IfxCcu6_TPwm_Config::interrupt2
IfxCcu6_TPwm_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_TPwm.h:315
IfxCcu6_TPwm_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_TPwm.h:268
IfxCcu6_TPwm_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_TPwm.h:243
IfxCcu6_TPwm_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External trigger input signal selection to start the timer 12.
Definition: IfxCcu6_TPwm.h:278
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1543
IfxCcu6_TPwm_resume
void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM.
Definition: IfxCcu6_TPwm.c:424
IfxCcu6_TPwm_initModule
void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_TPwm.c:36
IfxCcu6_TPwm_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_TPwm.h:238
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:319
IfxCcu6_TPwm.h
CCU6 TPWM details.
TPwm_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: TPwm.h:62
IfxCcu6_TPwm_Config::interrupt3
IfxCcu6_TPwm_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_TPwm.h:316
IfxCcu6_TPwm_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_TPwm.h:216
IfxCcu6_TPwm_Timer12::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_TPwm.h:255
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:135
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:101
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:493
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2062
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:293
IfxCcu6_TPwm_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:217
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:135
IfxCcu6_initCc60OutPin
IFX_INLINE void IfxCcu6_initCc60OutPin(const IfxCcu6_Cc60_Out *cc60Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC60 output pin.
Definition: IfxCcu6.h:1728
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:176
IfxCcu6_TPwm_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_TPwm.h:271
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:109
IfxCcu6_TPwm_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_TPwm.h:237
IfxCcu6_TPwm_start
void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
Starts the triggered PWM.
Definition: IfxCcu6_TPwm.c:430
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1897
IfxCcu6_TPwm::base
TPwm base
Base TPWM object.
Definition: IfxCcu6_TPwm.h:295
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:72
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:294
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxCcu6_TPwm_Config
Configuration structure of the module.
Definition: IfxCcu6_TPwm.h:304
IfxCcu6_TPwm_Config::timer13
IfxCcu6_TPwm_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:311
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1867
IfxCcu6_TPwm_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Output Trigger selection.
Definition: IfxCcu6_TPwm.h:284
IfxCcu6_setT12CompareValue
void IfxCcu6_setT12CompareValue(Ifx_CCU6 *ccu6, IfxCcu6_T12Channel channel, uint16 value)
Sets the 16-bit compare value of Timer12 (writes into shadow registers)
Definition: IfxCcu6.c:343
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:119
IfxCcu6_TPwm_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_TPwm.h:236
IfxCcu6_disableModulationOutput
void IfxCcu6_disableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Disables the modulation of the corresponding output signal by PWM pattern generated by the timers T12...
Definition: IfxCcu6.c:53
IfxCcu6_TPwm_stop
void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
Stops the triggered PWM.
Definition: IfxCcu6_TPwm.c:485
TPwm_Config::frequency
float32 frequency
Specify expected PWM frequency in Hertz.
Definition: TPwm.h:60
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1941
IfxCcu6_TPwm_Timer12::deadTimeValue
uint8 deadTimeValue
Value of the dead time to be induced.
Definition: IfxCcu6_TPwm.h:259
IfxCcu6_TPwm_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_TPwm.h:218
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2086
TPwm_Config::period
Ifx_TimerValue period
Specify expected PWM period in ticks.
Definition: TPwm.h:63
IfxCcu6_TPwm_initModuleConfig
void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_TPwm.c:325
IfxCcu6_TPwm_Timer13::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_TPwm.h:269
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_TPwm_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_TPwm.h:241
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:304
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1882
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:79
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_TPwm_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_TPwm.h:270
IfxCcu6_TPwm_Timer12::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_TPwm.h:256
IfxCcu6_TPwm_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_TPwm.h:239
IfxCcu6_connectTrigger
void IfxCcu6_connectTrigger(Ifx_CCU6 *ccu6, IfxCcu6_TrigOut outputLine, IfxCcu6_TrigSel selectedTrigger)
Definition: IfxCcu6.c:36
TPwm_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: TPwm.h:61
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:177
IfxCcu6_T12Channel_0
T12 channel CC60.
Definition: IfxCcu6.h:243
IfxCcu6_TPwm_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_TPwm.h:240
IfxCcu6_TPwm_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_TPwm.h:242
IfxCcu6_TPwm_Config::base
TPwm_Config base
Base configuration.
Definition: IfxCcu6_TPwm.h:306
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:216
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1845
IfxCcu6_TPwm_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_TPwm.h:244
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:409
IfxCcu6_TPwm_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_TPwm.h:247
IfxCcu6_TPwm_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_TPwm.h:245
IfxCcu6_TPwm_Config::channelOut
IfxCcu6_ChannelOut channelOut
Capture compare output pin selection.
Definition: IfxCcu6_TPwm.h:312
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1461
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2098
IfxCcu6_TPwm_Config::interrupt1
IfxCcu6_TPwm_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_TPwm.h:314
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:143
IfxCcu6_initCout62Pin
IFX_INLINE void IfxCcu6_initCout62Pin(const IfxCcu6_Cout62_Out *cout62, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT62 output pin.
Definition: IfxCcu6.h:1838
IfxCcu6_setT13CompareValue
IFX_INLINE void IfxCcu6_setT13CompareValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit compare value of Timer13 (writes into shadow register)
Definition: IfxCcu6.h:2080
IfxCcu6_TPwm_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_TPwm.h:283
IfxCcu6_TPwm_Config::trigger
IfxCcu6_TPwm_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_TPwm.h:318
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2074
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2123
TRUE
#define TRUE
Definition: Platform_Types.h:87
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2092
IfxCcu6_initCc61OutPin
IFX_INLINE void IfxCcu6_initCc61OutPin(const IfxCcu6_Cc61_Out *cc61Out, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a CC61 output pin.
Definition: IfxCcu6.h:1750
IfxCcu6_TPwm_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_TPwm.h:257
IfxCcu6_TPwm_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External trigger input signal selection to start the timer 13.
Definition: IfxCcu6_TPwm.h:279
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxCcu6_TPwm_Config::interrupt4
IfxCcu6_TPwm_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_TPwm.h:317
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:128
TPwm_Resume
void(* TPwm_Resume)(TPwm *handle)
Definition: TPwm.h:36
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:97
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:444
TPwm_Stop
void(* TPwm_Stop)(TPwm *handle)
Definition: TPwm.h:37
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:215
IfxCcu6_setOutputPassiveState
IFX_INLINE void IfxCcu6_setOutputPassiveState(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the state of the corresponding compare channel, that is considered to be the passive state...
Definition: IfxCcu6.h:2016
IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:234


iLLD_TC26B: IfxCcu6_TPwm.h Source File

  • Ccu6
  • TPwm
IfxCcu6_TPwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TPwm.h
3 * \brief CCU6 TPWM details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Ccu6_TPwm_Usage How to use the CCU6 TPWM Interface driver?
26 * \ingroup IfxLld_Ccu6_TPwm
27 *
28 * The TPWM interface driver provides a default CCU6 configuration for PWM modulation output through the selected timer block.
29 *
30 * User can select the various configuration options that hardware allows
31 *
32 * In the following sections it will be described, how to integrate the driver into the application framework.
33 *
34 *
35 * \section IfxLld_Ccu6_TPwm_Preparation Preparation
36 *
37 *
38 * \subsection IfxLld_Ccu6_TPwm_Include Include Files
39 *
40 * Include following header file into your C code:
41 * \code
42 * #include <Ccu6/TPwm/IfxCcu6_TPwm.h>
43 * \endcode
44 *
45 * \subsection IfxLld_Ccu6_TPwm_Variables Variables
46 *
47 * Declare the TPWM handle as global variable in your C code:
48 *
49 * \code
50 * // used globally
51 * static IfxCcu6_TPwm tPwm;
52 * \endcode
53 *
54 * \subsection IfxLld_Ccu6_TPwm_Interrupt Interrupt Handler Installation
55 *
56 * See also \ref IfxLld_Cpu_Irq_Usage
57 *
58 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
59 * \code
60 * // priorities are normally defined in Ifx_IntPrioDef.h
61 * #define IFX_INTPRIO_CCU6 1
62 * \endcode
63 *
64 * Add the interrupt service routine to your C code.
65 * \code
66 * IFX_INTERRUPT(ccu60ISR_TPwm, 0, IFX_INTPRIO_CCU6)
67 * {
68 * //user code
69 * }
70 * \endcode
71 *
72 * Finally install the interrupt handlers in your initialisation function:
73 * \code
74 * // install interrupt handlers
75 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_TPwm, IFX_INTPRIO_CCU6);
76 * IfxCpu_enableInterrupts();
77 * \endcode
78 *
79 * \subsection IfxLld_Ccu6_TPwm_Init Module Initialisation
80 *
81 * The module initialisation can be done in the same function. Here an example:
82 * \code
83 * // create configuration
84 * IfxCcu6_TPwm_Config tPwmConfig;
85 * IfxCcu6_TPwm_initModuleConfig(&tPwmConfig, &MODULE_CCU60);
86 *
87 * // configure the frequency of the timer in case of internal start
88 * // this frequency will be set for the timer block selected later
89 * tPwmConfig.base.frequency = 400000;
90 *
91 * // configure the period of the timer
92 * tPwmConfig.base.period = 100;
93 *
94 * // configure the waiting time in case of delayed T13 start in sync with T12
95 * tPwmConfig.base.waitingTime = 20;
96 *
97 * // select the active state of the output
98 * tPwmConfig.base.activeState = Ifx_ActiveState_high;
99 *
100 * // select the timer through which PWM is to be generated
101 * tPwmConfig.timer = IfxCcu6_TimerId_t13;
102 *
103 * // configure the clock for internal mode
104 * tPwmConfig.clock.t13ExtClockEnabled = FALSE;
105 * tPwmConfig.clock.t13ExtClockInput = NULL_PTR;
106 * tPwmConfig.clock.t13countingInputMode = IfxCcu6_CountingInputMode_internal;
107 *
108 * // configure the selcted timer block
109 * tPwmConfig.timer13.counterValue = 0;
110 * tPwmConfig.timer13.compareValue = 100;
111 * // configure the syncronisation, in case of sync start with T12
112 * tPwmConfig.timer13.t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare;
113 * tPwmConfig.timer13.t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp;
114 *
115 * //select the channel out for modulation
116 * tPwmConfig.channelOut = IfxCcu6_ChannelOut_cout3;
117 *
118 * // pin configuration
119 * const IfxCcu6_TPwm_Pins pins = {
120 * NULL, // CC60Out pin not used
121 * NULL, // CC61Out pin not used
122 * NULL, // CC62Out pin not used
123 * NULL, // COUT60 pin not used
124 * NULL, // COUT61 pin not used
125 * NULL, // COUT62 pin not used
126 * IfxCcu60_COUT63_P00_0_OUT, // COUT63 pin
127 * IfxPort_OutputMode_pushPull,
128 * IfxPort_PadDriver_cmosAutomotiveSpeed1
129 * };
130 * tPwmConfig.pins = &pins;
131 *
132 * // configure the interrupts
133 * tPwmConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t13CompareMatch;
134 * tPwmConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
135 * tPwmConfig.interrupt1.priority = IFX_INTPRIO_CCU6;
136 * tPwmConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
137 *
138 * // configure input and output triggers
139 * tPwmConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
140 * tPwmConfig.trigger.t13ExtInputTrigger = NULL_PTR;
141 * tPwmConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
142 * tPwmConfig.trigger.t13InSyncWithT12 = TRUE;
143 *
144 * tPwmConfig.trigger.outputTriggerEnabled = TRUE;
145 * tPwmConfig.trigger.outputLine = IfxCcu6_TrigOut_0;
146 * tPwmConfig.trigger.outputTrigger = IfxCcu6_TrigSel_cout63;
147 *
148 *
149 * // initialize the module
150 * IfxCcu6_TPwm_initModule(&tPwm, &tPwmConfig);
151 * \endcode
152 *
153 *
154 * The TPWM is ready for use now!
155 *
156 *
157 * \section IfxLld_Ccu6_TPwm_ModulationControl Modulation Control
158 *
159 *
160 * The TPWM driver provides simple to use Modulation Control functions
161 *
162 * This means: you can start, stop, pause and resume the modulation once the module is initialised with the appropriate configuration
163 *
164 * Start the modulation
165 * \code
166 * IfxCcu6_TPwm_start(&tPwm);
167 * \endcode
168 *
169 * Stop the modulation
170 * \code
171 * IfxCcu6_TPwm_stop(&tPwm);
172 * \endcode
173 *
174 * Pause the modulation
175 * \code
176 * IfxCcu6_TPwm_pause(&tPwm);
177 * \endcode
178 *
179 * Resume the modulation
180 * \code
181 * IfxCcu6_TPwm_resume(&tPwm);
182 * \endcode
183 *
184 * \defgroup IfxLld_Ccu6_TPwm TPWM Interface driver
185 * \ingroup IfxLld_Ccu6
186 * \defgroup IfxLld_Ccu6_TPwm_DataStructures Data Structures
187 * \ingroup IfxLld_Ccu6_TPwm
188 * \defgroup IfxLld_Ccu6_TPwm_Module_Initialize_Functions Module Initialize Functions
189 * \ingroup IfxLld_Ccu6_TPwm
190 * \defgroup IfxLld_Ccu6_TPwm_Modultion_Control_Functions Modultion Control Functions
191 * \ingroup IfxLld_Ccu6_TPwm
192 */
193
194 #ifndef IFXCCU6_TPWM_H
195 #define IFXCCU6_TPWM_H 1
196
197 /******************************************************************************/
198 /*----------------------------------Includes----------------------------------*/
199 /******************************************************************************/
200
201 #include "Ccu6/Std/IfxCcu6.h"
202 #include "If/Ccu6If/TPwm.h"
203
204 /******************************************************************************/
205 /*-----------------------------Data Structures--------------------------------*/
206 /******************************************************************************/
207
208 /** \addtogroup IfxLld_Ccu6_TPwm_DataStructures
209 * \{ */
210 /** \brief Structure for clock configuration
211 */
212 typedef struct
213 {
214 boolean t12ExtClockEnabled; /**< \brief Timer 12 external clock enable / disable selection */
215 IfxCcu6_T12hr_In *t12ExtClockInput; /**< \brief External input signal selection for timer 12 */
216 IfxCcu6_CountingInputMode t12countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
217 boolean t13ExtClockEnabled; /**< \brief Timer 13 external clock enable / disable selection */
218 IfxCcu6_T13hr_In *t13ExtClockInput; /**< \brief External input signal selection for timer 13 */
219 IfxCcu6_CountingInputMode t13countingInputMode; /**< \brief Input event leading to a counting action of the timer T13 */
220 } IfxCcu6_TPwm_Clock;
221
222 /** \brief Structure for interrupt configuration
223 */
224 typedef struct
225 {
226 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
227 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
228 uint16 priority; /**< \brief Interrupt priority */
229 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
230 } IfxCcu6_TPwm_InterruptConfig;
231
232 /** \brief Structure for CCU6 output pin configuration
233 */
234 typedef struct
235 {
236 IFX_CONST IfxCcu6_Cc60_Out *cc60Out; /**< \brief CC60 compare output CC0 */
237 IFX_CONST IfxCcu6_Cc61_Out *cc61Out; /**< \brief CC61 compare output CC1 */
238 IFX_CONST IfxCcu6_Cc62_Out *cc62Out; /**< \brief CC62 compare output CC2 */
239 IFX_CONST IfxCcu6_Cout60_Out *cout60; /**< \brief CC60 compare output COUT0 */
240 IFX_CONST IfxCcu6_Cout61_Out *cout61; /**< \brief CC61 compare output COUT1 */
241 IFX_CONST IfxCcu6_Cout62_Out *cout62; /**< \brief CC62 compare output COUT2 */
242 IFX_CONST IfxCcu6_Cout63_Out *cout63; /**< \brief CC63 compare output COUT3 */
243 IfxPort_OutputMode outputMode; /**< \brief The pin output mode which should be configured */
244 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
245 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
246 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
247 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
248 } IfxCcu6_TPwm_Pins;
249
250 /** \brief Structure for Timer 12
251 */
252 typedef struct
253 {
254 IfxCcu6_TimerInputClock clockInput; /**< \brief Input clock selection (prescaler) */
255 IfxCcu6_T12Channel channelId; /**< \brief Capture compare channel of the Timer12 */
256 IfxCcu6_T12ChannelMode channelMode; /**< \brief The operating mode for the T12 channel */
257 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
258 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
259 uint8 deadTimeValue; /**< \brief Value of the dead time to be induced */
260 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
261 } IfxCcu6_TPwm_Timer12;
262
263 /** \brief Structure for Timer 13
264 */
265 typedef struct
266 {
267 IfxCcu6_TimerInputClock clockInput; /**< \brief Input clock selection (prescaler) */
268 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
269 uint16 compareValue; /**< \brief 16-bit comapre value of Timer12 */
270 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
271 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
272 } IfxCcu6_TPwm_Timer13;
273
274 /** \brief Configuration structure for external triggers
275 */
276 typedef struct
277 {
278 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External trigger input signal selection to start the timer 12 */
279 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External trigger input signal selection to start the timer 13 */
280 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T1xHR that can set the run bit T1xR by HW */
281 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
282 boolean outputTriggerEnabled; /**< \brief Output trigger connection to VADC enable / disable choice */
283 IfxCcu6_TrigOut outputLine; /**< \brief Trigger out selection */
284 IfxCcu6_TrigSel outputTrigger; /**< \brief Output Trigger selection */
285 } IfxCcu6_TPwm_TriggerConfig;
286
287 /** \} */
288
289 /** \addtogroup IfxLld_Ccu6_TPwm_DataStructures
290 * \{ */
291 /** \brief Module handle
292 */
293 typedef struct
294 {
295 TPwm base; /**< \brief Base TPWM object */
296 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
297 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
298 IfxCcu6_ChannelOut channelOut; /**< \brief Capture compare output pin selection */
299 IfxCcu6_TPwm_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
300 } IfxCcu6_TPwm;
301
302 /** \brief Configuration structure of the module
303 */
304 typedef struct
305 {
306 TPwm_Config base; /**< \brief Base configuration */
307 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
308 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
309 IfxCcu6_TPwm_Clock clock; /**< \brief Structure for clock configuration */
310 IfxCcu6_TPwm_Timer12 timer12; /**< \brief Structure for Timer 12 */
311 IfxCcu6_TPwm_Timer13 timer13; /**< \brief Structure for Timer 13 */
312 IfxCcu6_ChannelOut channelOut; /**< \brief Capture compare output pin selection */
313 IfxCcu6_TPwm_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
314 IfxCcu6_TPwm_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
315 IfxCcu6_TPwm_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
316 IfxCcu6_TPwm_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
317 IfxCcu6_TPwm_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
318 IfxCcu6_TPwm_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
319 } IfxCcu6_TPwm_Config;
320
321 /** \} */
322
323 /** \addtogroup IfxLld_Ccu6_TPwm_Module_Initialize_Functions
324 * \{ */
325
326 /******************************************************************************/
327 /*-------------------------Global Function Prototypes-------------------------*/
328 /******************************************************************************/
329
330 /** \brief Fills the config structure with default values
331 * \param config Configuration structure of the module
332 * \param ccu6 Pointer to the base of CCU6 registers
333 * \return None
334 *
335 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
336 *
337 */
338 IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6);
339
340 /** \} */
341
342 /** \addtogroup IfxLld_Ccu6_TPwm_Modultion_Control_Functions
343 * \{ */
344
345 /******************************************************************************/
346 /*-------------------------Global Function Prototypes-------------------------*/
347 /******************************************************************************/
348
349 /** \brief Initialises the module with default configuration
350 * \param tPwm Module handle
351 * \param config Configuration structure of the module
352 * \return None
353 *
354 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
355 *
356 */
357 IFX_EXTERN void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config);
358
359 /** \brief Pauses the triggered PWM
360 * \param tPwm Module handle
361 * \return None
362 *
363 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
364 *
365 */
366 IFX_EXTERN void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm);
367
368 /** \brief Resumes the triggered PWM
369 * \param tPwm Module handle
370 * \return None
371 *
372 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
373 *
374 */
375 IFX_EXTERN void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm);
376
377 /** \brief Starts the triggered PWM
378 * \param tPwm Module handle
379 * \return None
380 *
381 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
382 *
383 */
384 IFX_EXTERN void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm);
385
386 /** \brief Stops the triggered PWM
387 * \param tPwm Module handle
388 * \return None
389 *
390 * A coding example can be found in \ref IfxLld_Ccu6_TPwm_Usage
391 *
392 */
393 IFX_EXTERN void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm);
394
395 /** \} */
396
397 #endif /* IFXCCU6_TPWM_H */
IfxCcu6_TPwm_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_TPwm.h:224
IfxCcu6_TPwm_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_TPwm.h:276
IfxCcu6_TPwm_TriggerConfig::outputTriggerEnabled
boolean outputTriggerEnabled
Output trigger connection to VADC enable / disable choice.
Definition: IfxCcu6_TPwm.h:282
IfxCcu6_TPwm
Module handle.
Definition: IfxCcu6_TPwm.h:293
IfxCcu6_TPwm_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:214
IfxCcu6_Cc62_Out
CC62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:127
IfxCcu6_TPwm_Config::pins
IfxCcu6_TPwm_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:313
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:162
IfxCcu6_TPwm_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_TPwm.h:215
IfxCcu6_TPwm::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_TPwm.h:296
IfxCcu6_TPwm_Config::timer12
IfxCcu6_TPwm_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:310
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:159
IfxCcu6_Cc60_Out
CC60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:111
IfxCcu6_ChannelOut
IfxCcu6_ChannelOut
Capture compare output pins.
Definition: IfxCcu6.h:93
IfxCcu6_TPwm_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_TPwm.h:280
IfxCcu6_TPwm_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_TPwm.h:228
IfxCcu6_TPwm_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_TPwm.h:226
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxCcu6_TPwm_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_TPwm.h:229
IfxCcu6_TPwm_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_TPwm.h:246
IfxCcu6_TPwm_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_TPwm.h:281
IfxCcu6_TPwm_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_TPwm.h:227
TPwm_Config
Configuration structure of the TPwm interface.
Definition: TPwm.h:58
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:291
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxCcu6_TPwm_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_TPwm.h:219
IfxCcu6_TPwm::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_TPwm.h:297
IfxCcu6_TPwm_Config::clock
IfxCcu6_TPwm_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:309
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCcu6_TPwm_pause
IFX_EXTERN void IfxCcu6_TPwm_pause(IfxCcu6_TPwm *tPwm)
Pauses the triggered PWM.
Definition: IfxCcu6_TPwm.c:418
IfxCcu6_Cout62_Out
COUT62 pin mapping structure.
Definition: IfxCcu6_PinMap.h:151
IfxCcu6_TPwm_Config::interrupt2
IfxCcu6_TPwm_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_TPwm.h:315
IfxCcu6_TPwm_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_TPwm.h:258
IfxCcu6_TPwm_Pins::outputMode
IfxPort_OutputMode outputMode
The pin output mode which should be configured.
Definition: IfxCcu6_TPwm.h:243
IfxCcu6_TPwm_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External trigger input signal selection to start the timer 12.
Definition: IfxCcu6_TPwm.h:278
IfxCcu6_TPwm_Clock
Structure for clock configuration.
Definition: IfxCcu6_TPwm.h:212
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu6_TPwm_resume
IFX_EXTERN void IfxCcu6_TPwm_resume(IfxCcu6_TPwm *tPwm)
Resumes the triggered PWM.
Definition: IfxCcu6_TPwm.c:424
IfxCcu6_TPwm_initModule
IFX_EXTERN void IfxCcu6_TPwm_initModule(IfxCcu6_TPwm *tPwm, const IfxCcu6_TPwm_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_TPwm.c:36
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:107
IfxCcu6_TPwm_Pins::cc62Out
IFX_CONST IfxCcu6_Cc62_Out * cc62Out
CC62 compare output CC2.
Definition: IfxCcu6_TPwm.h:238
IfxCcu6_TPwm_Config::interrupt3
IfxCcu6_TPwm_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_TPwm.h:316
IfxCcu6_TPwm_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_TPwm.h:216
IfxCcu6_TPwm_Timer12::channelId
IfxCcu6_T12Channel channelId
Capture compare channel of the Timer12.
Definition: IfxCcu6_TPwm.h:255
IfxCcu6_TPwm_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_TPwm.h:217
IfxCcu6_Cout60_Out
COUT60 pin mapping structure.
Definition: IfxCcu6_PinMap.h:135
IfxCcu6_T12Channel
IfxCcu6_T12Channel
Capture compare channel of Timer12.
Definition: IfxCcu6.h:241
IfxCcu6_T12ChannelMode
IfxCcu6_T12ChannelMode
The operating mode for the T12 channels are defined by the bit fields Ifx_CCU.T12MSEL.MSEL6x.
Definition: IfxCcu6.h:250
IfxCcu6_TPwm_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_TPwm.h:271
IfxCcu6.h
CCU6 basic functionality.
TPwm.h
TPWM interface.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:213
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:302
IfxCcu6_TPwm_Pins::cc61Out
IFX_CONST IfxCcu6_Cc61_Out * cc61Out
CC61 compare output CC1.
Definition: IfxCcu6_TPwm.h:237
IfxCcu6_TPwm_start
IFX_EXTERN void IfxCcu6_TPwm_start(IfxCcu6_TPwm *tPwm)
Starts the triggered PWM.
Definition: IfxCcu6_TPwm.c:430
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:317
IfxCcu6_TPwm::base
TPwm base
Base TPWM object.
Definition: IfxCcu6_TPwm.h:295
IfxCcu6_TPwm_Config
Configuration structure of the module.
Definition: IfxCcu6_TPwm.h:304
IfxCcu6_TPwm_Config::timer13
IfxCcu6_TPwm_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:311
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:280
IfxCcu6_TPwm_TriggerConfig::outputTrigger
IfxCcu6_TrigSel outputTrigger
Output Trigger selection.
Definition: IfxCcu6_TPwm.h:284
IfxCcu6_Cc61_Out
CC61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:119
IfxCcu6_TPwm_Pins::cc60Out
IFX_CONST IfxCcu6_Cc60_Out * cc60Out
CC60 compare output CC0.
Definition: IfxCcu6_TPwm.h:236
TPwm_s
Structure of the TPwm interface.
Definition: TPwm.h:48
IfxCcu6_TPwm_stop
IFX_EXTERN void IfxCcu6_TPwm_stop(IfxCcu6_TPwm *tPwm)
Stops the triggered PWM.
Definition: IfxCcu6_TPwm.c:485
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxCcu6_TPwm_Timer12::deadTimeValue
uint8 deadTimeValue
Value of the dead time to be induced.
Definition: IfxCcu6_TPwm.h:259
IfxCcu6_TPwm_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_TPwm.h:218
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:132
IfxCcu6_TPwm_initModuleConfig
IFX_EXTERN void IfxCcu6_TPwm_initModuleConfig(IfxCcu6_TPwm_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_TPwm.c:325
IfxCcu6_TPwm_Timer12::compareValue
uint16 compareValue
16-bit comapre value of Timer12
Definition: IfxCcu6_TPwm.h:260
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_TPwm_Pins::cout62
IFX_CONST IfxCcu6_Cout62_Out * cout62
CC62 compare output COUT2.
Definition: IfxCcu6_TPwm.h:241
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_TPwm_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_TPwm.h:270
IfxCcu6_TPwm_Timer12::channelMode
IfxCcu6_T12ChannelMode channelMode
The operating mode for the T12 channel.
Definition: IfxCcu6_TPwm.h:256
IfxCcu6_TPwm_Pins::cout60
IFX_CONST IfxCcu6_Cout60_Out * cout60
CC60 compare output COUT0.
Definition: IfxCcu6_TPwm.h:239
IfxCcu6_TPwm_Pins::cout61
IFX_CONST IfxCcu6_Cout61_Out * cout61
CC61 compare output COUT1.
Definition: IfxCcu6_TPwm.h:240
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxCcu6_TPwm_Pins::cout63
IFX_CONST IfxCcu6_Cout63_Out * cout63
CC63 compare output COUT3.
Definition: IfxCcu6_TPwm.h:242
IfxCcu6_TPwm_Config::base
TPwm_Config base
Base configuration.
Definition: IfxCcu6_TPwm.h:306
IfxCcu6_TPwm_Timer12::clockInput
IfxCcu6_TimerInputClock clockInput
Input clock selection (prescaler)
Definition: IfxCcu6_TPwm.h:254
IfxCcu6_TPwm_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxCcu6_TPwm.h:244
IfxCcu6_TPwm_Timer12
Structure for Timer 12.
Definition: IfxCcu6_TPwm.h:252
IfxCcu6_TPwm_Timer13
Structure for Timer 13.
Definition: IfxCcu6_TPwm.h:265
IfxCcu6_TPwm_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_TPwm.h:247
IfxCcu6_TPwm_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_TPwm.h:245
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:77
IfxCcu6_TPwm::channelOut
IfxCcu6_ChannelOut channelOut
Capture compare output pin selection.
Definition: IfxCcu6_TPwm.h:298
IfxCcu6_TPwm_Config::interrupt1
IfxCcu6_TPwm_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_TPwm.h:314
IfxCcu6_Cout61_Out
COUT61 pin mapping structure.
Definition: IfxCcu6_PinMap.h:143
IfxCcu6_TPwm_TriggerConfig::outputLine
IfxCcu6_TrigOut outputLine
Trigger out selection.
Definition: IfxCcu6_TPwm.h:283
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:70
IfxCcu6_TPwm::trigger
IfxCcu6_TPwm_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_TPwm.h:299
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCcu6_TPwm_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_TPwm.h:257
IfxCcu6_TPwm_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External trigger input signal selection to start the timer 13.
Definition: IfxCcu6_TPwm.h:279
IfxCcu6_TPwm_Config::interrupt4
IfxCcu6_TPwm_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_TPwm.h:317
IfxCcu6_TimerInputClock
IfxCcu6_TimerInputClock
Selects the input clock for timers (T12 or T13) that is derived from the peripheral clock according t...
Definition: IfxCcu6.h:326
IfxCcu6_TPwm_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_TPwm.h:234


iLLD_TC26B: IfxCcu6_Timer.c Source File

  • Ccu6
  • Timer
IfxCcu6_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Timer.c
3 * \brief CCU6 TIMER details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxCcu6_Timer.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
37 {
38 if (timer->timer == IfxCcu6_TimerId_t13)
39 {
40 // enable shadow transfer
41 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
42
43 // enable manual counting mode
44 IfxCcu6_setCountingInputMode(timer->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_CountingInputMode_manual);
45 IfxCcu6_enableCountEvent(timer->ccu6, FALSE, TRUE);
46 }
47 else if (timer->timer == IfxCcu6_TimerId_t12)
48 {
49 // enable shadow transfer
50 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
51
52 // enable manual counting mode
53 IfxCcu6_setCountingInputMode(timer->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_CountingInputMode_manual);
54 IfxCcu6_enableCountEvent(timer->ccu6, TRUE, FALSE);
55 }
56 }
57
58
59 void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
60 {
61 Ifx_CCU6 *ccu6SFR = config->ccu6; // pointer to CCU6 registers
62 timer->ccu6 = ccu6SFR; // adding register pointer to module handler
63
64 /* -- hardware module initialisation -- */
65
66 // enable module if it hasn't been enabled by any other interface //
67 if (IfxCcu6_isModuleEnabled(ccu6SFR) == FALSE)
68 {
69 IfxCcu6_enableModule(ccu6SFR);
70 }
71
72 /* -- timer initialisation -- */
73
74 // Timer 13 initialisation //
75
76 if ((config->timer == IfxCcu6_TimerId_t13) || (config->synchronousOperation))
77 {
78 // enable Timer13 if it hasn't been enabled by any other interface //
79 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t13) == FALSE)
80 {
81 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t13);
82 }
83
84 // clock initialisation //
85
86 if (config->clock.t13ExtClockEnabled) // if external source is selected as reference
87 {
88 // input signal selection
89 if (config->clock.t13ExtClockInput != NULL_PTR)
90 {
91 IfxCcu6_setT13InputSignal(config->ccu6, config->clock.t13ExtClockInput);
92 }
93
94 // counting input mode selection
95 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t13, config->clock.t13countingInputMode);
96
97 // period setting
98 IfxCcu6_setT13PeriodValue(ccu6SFR, (uint16)config->base.t13Period);
99 }
100 else // if internal clock is selected as reference
101 {
102 IfxCcu6_setT13Frequency(ccu6SFR, config->base.t13Frequency, config->base.t13Period);
103 }
104
105 // counter initialisation //
106
107 IfxCcu6_setT13CounterValue(ccu6SFR, config->timer13.counterValue);
108
109 // if Timer 13 start is in sync with Timer 12 //
110 if ((config->trigger.t13InSyncWithT12) && (!(config->synchronousOperation)))
111 {
112 IfxCcu6_setT13TriggerEventMode(ccu6SFR, config->timer13.t12SyncEvent);
113 IfxCcu6_setT13TriggerEventDirection(ccu6SFR, config->timer13.t12SyncDirection);
114 }
115 }
116 else
117 {}
118
119 // Timer 12 initialisation //
120
121 if ((config->timer == IfxCcu6_TimerId_t12) || (config->trigger.t13InSyncWithT12) || (config->synchronousOperation))
122 {
123 Ifx_TimerValue period = config->base.t12Period;
124
125 // enable Timer12 if it hasn't been enabled by any other interface //
126 if (IfxCcu6_getTimerAvailabilityStatus(ccu6SFR, IfxCcu6_TimerId_t12) == FALSE)
127 {
128 IfxCcu6_enableTimer(ccu6SFR, IfxCcu6_TimerId_t12);
129 }
130
131 // if Timer 13 start is in sync with Timer 12 //
132 if ((config->trigger.t13InSyncWithT12) && (!(config->synchronousOperation)) && (config->base.waitingTime != 0))
133 {
134 // if in sync with T12 period match (only period match is allowed in this interface because T12 is only in counter mode)
135 if (config->timer13.t12SyncEvent == IfxCcu6_T13TriggerEvent_onT12Period)
136 {
137 period = config->base.waitingTime; // waiting time as period
138 }
139 }
140 else
141 {
142 // configuration error
143 }
144
145 // clock initialisation //
146
147 if (config->clock.t12ExtClockEnabled) // if external source is selected as reference
148 {
149 // input signal selection
150 if (config->clock.t12ExtClockInput != NULL_PTR)
151 {
152 IfxCcu6_setT12InputSignal(config->ccu6, config->clock.t12ExtClockInput);
153 }
154
155 // counting input mode selection
156 IfxCcu6_setCountingInputMode(ccu6SFR, IfxCcu6_TimerId_t12, config->clock.t12countingInputMode);
157
158 // countining mode selection
159 IfxCcu6_setT12CountMode(ccu6SFR, config->timer12.countMode);
160
161 // period selection for center aligned mode
162 if (config->timer12.countMode == IfxCcu6_T12CountMode_centerAligned)
163 {
164 period = (period / 2) - 1;
165 }
166
167 // period setting
168 IfxCcu6_setT12PeriodValue(ccu6SFR, (uint16)period);
169 }
170 else // if internal clock is selected as reference
171 {
172 // in case of in sync with T13, T12 runs at same frequency as T13
173 IfxCcu6_setT12Frequency(ccu6SFR, config->base.t12Frequency, period, config->timer12.countMode);
174 }
175
176 // counter initialisation //
177
178 IfxCcu6_setT12CounterValue(ccu6SFR, config->timer12.counterValue);
179 }
180
181 /* -- Pin mapping -- */
182
183 const IfxCcu6_Timer_Pins *pins = config->pins;
184
185 if (pins != NULL_PTR)
186 {
187 IfxCcu6_T12hr_In *t12hr = pins->t12hr;
188
189 if (t12hr != NULL_PTR)
190 {
191 IfxCcu6_initT12hrPin(t12hr, pins->t1xhrInputMode);
192 }
193
194 IfxCcu6_T13hr_In *t13hr = pins->t13hr;
195
196 if (t13hr != NULL_PTR)
197 {
198 IfxCcu6_initT13hrPin(t13hr, pins->t1xhrInputMode);
199 }
200 }
201
202 /* -- interrupt initialisation -- */
203
204 if (config->interrupt1.priority > 0)
205 {
206 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt1.source);
207 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt1.source, config->interrupt1.serviceRequest);
208
209 volatile Ifx_SRC_SRCR *src;
210 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt1.serviceRequest);
211 IfxSrc_init(src, config->interrupt1.typeOfService, config->interrupt1.priority);
212 IfxSrc_enable(src);
213 }
214
215 if (config->interrupt2.priority > 0)
216 {
217 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt2.source);
218 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt2.source, config->interrupt2.serviceRequest);
219
220 volatile Ifx_SRC_SRCR *src;
221 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt2.serviceRequest);
222 IfxSrc_init(src, config->interrupt2.typeOfService, config->interrupt2.priority);
223 IfxSrc_enable(src);
224 }
225
226 if (config->interrupt3.priority > 0)
227 {
228 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt3.source);
229 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt3.source, config->interrupt3.serviceRequest);
230
231 volatile Ifx_SRC_SRCR *src;
232 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt3.serviceRequest);
233 IfxSrc_init(src, config->interrupt3.typeOfService, config->interrupt3.priority);
234 IfxSrc_enable(src);
235 }
236
237 if (config->interrupt4.priority > 0)
238 {
239 IfxCcu6_enableInterrupt(config->ccu6, config->interrupt4.source);
240 IfxCcu6_routeInterruptNode(config->ccu6, config->interrupt4.source, config->interrupt4.serviceRequest);
241
242 volatile Ifx_SRC_SRCR *src;
243 src = IfxCcu6_getSrcAddress(config->ccu6, config->interrupt4.serviceRequest);
244 IfxSrc_init(src, config->interrupt4.typeOfService, config->interrupt4.priority);
245 IfxSrc_enable(src);
246 }
247
248 timer->timer = config->timer;
249 timer->trigger = config->trigger;
250
251 #if IFX_CFG_USE_STANDARD_INTERFACE
252 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (uint32)timer == ((uint32)&timer->base));
253 timer->base.functions.start = (Timer_Start) & IfxCcu6_Timer_start;
254 timer->base.functions.stop = (Timer_Stop) & IfxCcu6_Timer_stop;
255 timer->base.functions.synchronousStart = (Timer_SynchronousStart) & IfxCcu6_Timer_synchronousStart;
256 timer->base.functions.synchronousStop = (Timer_SynchronousStop) & IfxCcu6_Timer_synchronousStop;
257 timer->base.functions.countOneStep = (Timer_CountOneStep) & IfxCcu6_Timer_countOneStep;
258 timer->base.functions.startSingleShotMode = (Timer_StartSingleShotMode) & IfxCcu6_Timer_startSingleShotMode;
259 #endif
260 }
261
262
263 void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
264 {
265 const IfxCcu6_Timer_Config defaultConfig = {
266 .base = {
267 .t12Frequency = 400000,
268 .t12Period = 100,
269 .t13Frequency = 400000,
270 .t13Period = 100,
271 .waitingTime = 20,
272 .activeCount = 0,
273 },
274
275 .ccu6 = NULL_PTR, // will be initialized below
276
277 .timer = IfxCcu6_TimerId_t13,
278 .synchronousOperation = FALSE,
279
280 .pins = NULL_PTR,
281
282 .clock = {
283 .t12ExtClockEnabled = FALSE,
284 .t12ExtClockInput = NULL_PTR,
285 .t12countingInputMode = IfxCcu6_CountingInputMode_internal,
286
287 .t13ExtClockEnabled = FALSE,
288 .t13ExtClockInput = NULL_PTR,
289 .t13countingInputMode = IfxCcu6_CountingInputMode_internal,
290 },
291
292 .timer12 = {
293 .countMode = IfxCcu6_T12CountMode_edgeAligned,
294 .counterValue = 0,
295 },
296
297 .timer13 = {
298 .counterValue = 0,
299 .t12SyncEvent = IfxCcu6_T13TriggerEvent_onCC60RCompare,
300 .t12SyncDirection = IfxCcu6_T13TriggerDirection_onT12CountingUp,
301 },
302
303 .interrupt1 = {
304 .source = IfxCcu6_InterruptSource_t12PeriodMatch,
305 .serviceRequest = IfxCcu6_ServiceRequest_0,
306 .priority = 0, // interrupt priority 0
307 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
308 },
309
310 .interrupt2 = {
311 .source = IfxCcu6_InterruptSource_t13PeriodMatch,
312 .serviceRequest = IfxCcu6_ServiceRequest_1,
313 .priority = 0, // interrupt priority 0
314 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
315 },
316
317 .interrupt3 = {
318 .source = IfxCcu6_InterruptSource_t12OneMatch,
319 .serviceRequest = IfxCcu6_ServiceRequest_2,
320 .priority = 0, // interrupt priority 0
321 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
322 },
323
324 .interrupt4 = {
325 .source = IfxCcu6_InterruptSource_trap,
326 .serviceRequest = IfxCcu6_ServiceRequest_3,
327 .priority = 0, // interrupt priority 0
328 .typeOfService = IfxSrc_Tos_cpu0, // type of service CPU0
329 },
330
331 .trigger = {
332 .t12ExtInputTrigger = NULL_PTR,
333 .t13ExtInputTrigger = NULL_PTR,
334 .extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge,
335 .t13InSyncWithT12 = TRUE,
336 },
337 };
338
339 /* Default Configuration */
340 *config = defaultConfig;
341
342 /* take over module pointer */
343 config->ccu6 = ccu6;
344 }
345
346
347 void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
348 {
349 // Timer 13 start //
350
351 if (timer->timer == IfxCcu6_TimerId_t13)
352 {
353 // enable shadow transfer
354 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
355
356 // start Timer 13 when not in sync with timer12
357 if (!(timer->trigger.t13InSyncWithT12))
358 {
359 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
360 {
361 // external start
362 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, timer->trigger.extInputTriggerMode);
363 IfxCcu6_setT13InputSignal(timer->ccu6, timer->trigger.t13ExtInputTrigger);
364 }
365 else
366 {
367 // internal start
368 IfxCcu6_startTimer(timer->ccu6, FALSE, TRUE);
369 }
370 }
371 else
372 {}
373 }
374 else
375 {}
376
377 // Timer 12 start alone or when in sync with Timer 13 //
378
379 if ((timer->timer == IfxCcu6_TimerId_t12) || (timer->trigger.t13InSyncWithT12))
380 {
381 // enable shadow transfer
382 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
383
384 //start Timer 12
385 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
386 {
387 // external start
388 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, timer->trigger.extInputTriggerMode);
389 IfxCcu6_setT12InputSignal(timer->ccu6, timer->trigger.t12ExtInputTrigger);
390 }
391 else
392 {
393 // internal start
394 IfxCcu6_startTimer(timer->ccu6, TRUE, FALSE);
395 }
396 }
397 else
398 {}
399 }
400
401
402 void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
403 {
404 // Timer 13 start //
405
406 if (timer->timer == IfxCcu6_TimerId_t13)
407 {
408 // enable shadow transfer
409 IfxCcu6_enableShadowTransfer(timer->ccu6, FALSE, TRUE);
410
411 //enable single shot mode
412 IfxCcu6_enableSingleShotMode(timer->ccu6, IfxCcu6_TimerId_t13);
413
414 // start Timer 13 when not in sync with timer12
415 if (!(timer->trigger.t13InSyncWithT12))
416 {
417 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
418 {
419 // external start
420 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, timer->trigger.extInputTriggerMode);
421 IfxCcu6_setT13InputSignal(timer->ccu6, timer->trigger.t13ExtInputTrigger);
422 }
423 else
424 {
425 // internal start
426 IfxCcu6_startTimer(timer->ccu6, FALSE, TRUE);
427 }
428 }
429 else
430 {}
431 }
432 else
433 {}
434
435 // Timer 12 start alone or when in sync with Timer 13 //
436
437 if ((timer->timer == IfxCcu6_TimerId_t12) || (timer->trigger.t13InSyncWithT12))
438 {
439 // enable shadow transfer
440 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, FALSE);
441
442 //enable single shot mode
443 IfxCcu6_enableSingleShotMode(timer->ccu6, IfxCcu6_TimerId_t12);
444
445 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
446 {
447 // external start
448 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, timer->trigger.extInputTriggerMode);
449 IfxCcu6_setT12InputSignal(timer->ccu6, timer->trigger.t12ExtInputTrigger);
450 }
451 else
452 {
453 // internal start
454 IfxCcu6_startTimer(timer->ccu6, TRUE, FALSE);
455 }
456 }
457 else
458 {}
459 }
460
461
462 void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
463 {
464 // Timer 13 stop //
465
466 if ((timer->timer == IfxCcu6_TimerId_t13) || (timer->trigger.t13InSyncWithT12))
467 {
468 // disable shadow transfer
469 IfxCcu6_disableShadowTransfer(timer->ccu6, FALSE, TRUE);
470
471 // remove external input trigger if any
472 if (timer->trigger.t13ExtInputTrigger != NULL_PTR)
473 {
474 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t13, IfxCcu6_ExternalTriggerMode_disable);
475 }
476
477 // remove the sync with Timer 12
478 if (timer->trigger.t13InSyncWithT12)
479 {
480 IfxCcu6_setT13TriggerEventMode(timer->ccu6, IfxCcu6_T13TriggerEvent_noAction);
481 IfxCcu6_setT13TriggerEventDirection(timer->ccu6, IfxCcu6_T13TriggerDirection_noAction);
482 }
483
484 // stop Timer 13
485 IfxCcu6_stopTimer(timer->ccu6, FALSE, TRUE);
486 }
487
488 // Timer 12 stop //
489
490 else
491 {
492 // disable shadow transfer
493 IfxCcu6_disableShadowTransfer(timer->ccu6, TRUE, FALSE);
494
495 // remove external input trigger if any
496 if (timer->trigger.t12ExtInputTrigger != NULL_PTR)
497 {
498 IfxCcu6_setExternalRunMode(timer->ccu6, IfxCcu6_TimerId_t12, IfxCcu6_ExternalTriggerMode_disable);
499 }
500
501 // stop Timer 12
502 IfxCcu6_stopTimer(timer->ccu6, TRUE, FALSE);
503 }
504 }
505
506
507 void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
508 {
509 // enable shadow transfer
510 IfxCcu6_enableShadowTransfer(timer->ccu6, TRUE, TRUE);
511
512 // only internal synchronous start is possible
513 IfxCcu6_startTimer(timer->ccu6, TRUE, TRUE);
514 }
515
516
517 void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
518 {
519 // disable shadow transfer
520 IfxCcu6_disableShadowTransfer(timer->ccu6, TRUE, TRUE);
521
522 // only internal synchronous stop is possible
523 IfxCcu6_stopTimer(timer->ccu6, TRUE, TRUE);
524 }
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2133
IfxCcu6_ServiceRequest_3
Service request output SR3.
Definition: IfxCcu6.h:218
IfxCcu6_Timer_synchronousStart
void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:507
IfxCcu6_Timer_Config::pins
IfxCcu6_Timer_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:300
Timer_StartSingleShotMode
void(* Timer_StartSingleShotMode)(Timer *handle)
Definition: Timer.h:39
IfxCcu6_ExternalTriggerMode_disable
The external setting of T1xR is disabled.
Definition: IfxCcu6.h:134
IfxCcu6_Timer_Config::interrupt1
IfxCcu6_Timer_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Timer.h:295
Timer_CountOneStep
void(* Timer_CountOneStep)(Timer *handle)
Definition: Timer.h:38
IfxCcu6_setExternalRunMode
IFX_INLINE void IfxCcu6_setExternalRunMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ExternalTriggerMode mode)
Sets the event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6.h:1967
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:220
IfxCcu6_Timer_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:219
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:282
IfxCcu6_InterruptSource_t13PeriodMatch
Interrupt enable for T13 period-match.
Definition: IfxCcu6.h:179
IfxCcu6_Timer_Config::interrupt4
IfxCcu6_Timer_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Timer.h:298
IfxCcu6_Timer.h
CCU6 TIMER details.
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2104
Timer_Start
void(* Timer_Start)(Timer *handle)
Definition: Timer.h:34
IfxCcu6_Timer_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:220
IfxCcu6_InterruptSource_trap
Interrupt enable for trap flag.
Definition: IfxCcu6.h:180
IfxCcu6_enableTimer
IFX_INLINE void IfxCcu6_enableTimer(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Sets Timer12 block available, A write access to T12PR is executed.
Definition: IfxCcu6.h:1609
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:255
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCcu6_ServiceRequest_2
Service request output SR2.
Definition: IfxCcu6.h:217
IfxCcu6_Timer_countOneStep
void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
Counts the timer one step.
Definition: IfxCcu6_Timer.c:36
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxCcu6_Timer_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Timer.h:238
IfxCcu6_Timer_Config::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:299
Timer_Config::t12Frequency
float32 t12Frequency
Specify expected T12 PWM frequency in Hertz.
Definition: Timer.h:66
IfxCcu6_T13TriggerEvent_onT12Period
set T13R upon a period-match of T12
Definition: IfxCcu6.h:309
IfxCcu6_Timer_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Timer.h:228
IfxCcu6_routeInterruptNode
void IfxCcu6_routeInterruptNode(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source, IfxCcu6_ServiceRequest serviceRequest)
Routes the interrupt node pointer to the selected service requests.
Definition: IfxCcu6.c:266
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:284
IfxCcu6_Timer_Config
Configuration structure of the module.
Definition: IfxCcu6_Timer.h:286
IfxCcu6_T13TriggerEvent_onCC60RCompare
set T13R on a T12 compare event on channel 0
Definition: IfxCcu6.h:305
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:320
IfxCcu6_getTimerAvailabilityStatus
IFX_INLINE boolean IfxCcu6_getTimerAvailabilityStatus(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
indicates the Timer blocks (T12 / T13) availability
Definition: IfxCcu6.h:1698
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:276
IfxCcu6_Timer_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Timer.h:269
IfxCcu6_setT12CounterValue
IFX_INLINE void IfxCcu6_setT12CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer12.
Definition: IfxCcu6.h:2068
IfxCcu6_setT12Frequency
float32 IfxCcu6_setT12Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period, IfxCcu6_T12CountMode countMode)
Sets the frequency and clock input of the Timer 12. Caution: If desired frequency cannot achieved (by...
Definition: IfxCcu6.c:360
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1586
IfxCcu6_Timer_Config::timer12
IfxCcu6_Timer_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:293
IfxCcu6_Timer_startSingleShotMode
void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
Starts the single shot mode of the timer.
Definition: IfxCcu6_Timer.c:402
Timer_Stop
void(* Timer_Stop)(Timer *handle)
Definition: Timer.h:35
Timer_SynchronousStop
void(* Timer_SynchronousStop)(Timer *handle)
Definition: Timer.h:37
IfxCcu6_Timer_stop
void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
Stops the timer.
Definition: IfxCcu6_Timer.c:462
IfxCcu6_Timer::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_Timer.h:280
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1596
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1543
IfxCcu6_Timer_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Timer.h:268
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:319
IfxCcu6_Timer_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_Timer.h:247
IfxCcu6_Timer_synchronousStop
void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:517
IfxCcu6_ExternalTriggerMode_risingEdge
Bit T1xR is set if a rising edge of signal T1xHR is detected.
Definition: IfxCcu6.h:135
IfxCcu6_setT13InputSignal
void IfxCcu6_setT13InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T13hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:493
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2062
IfxCcu6_T13TriggerDirection_noAction
no action
Definition: IfxCcu6.h:293
IfxCcu6_Timer_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Timer.h:229
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:176
Timer_Config::t12Period
Ifx_TimerValue t12Period
Specify expected T12 PWM period in ticks.
Definition: Timer.h:67
Timer_SynchronousStart
void(* Timer_SynchronousStart)(Timer *handle)
Definition: Timer.h:36
IfxCcu6_Timer_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:217
IfxCcu6_CountingInputMode_internal
The T1x prescaler generates the counting events, Bit TCTR4.T1xCNT is not taken into account...
Definition: IfxCcu6.h:109
IfxCcu6_Timer_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Timer.h:218
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1897
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:294
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxCcu6_enableCountEvent
IFX_INLINE void IfxCcu6_enableCountEvent(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Sets the single shot-mode of Timers (T12, T13).
Definition: IfxCcu6.h:1513
IfxCcu6_Timer_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Timer.h:267
IfxCcu6_initT12hrPin
IFX_INLINE void IfxCcu6_initT12hrPin(const IfxCcu6_T12hr_In *t12hrIn, IfxPort_InputMode inputMode)
Initialises a T12HR input pin.
Definition: IfxCcu6.h:1867
IfxCcu6_Timer::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Timer.h:279
IfxCcu6_Timer_Config::interrupt3
IfxCcu6_Timer_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Timer.h:297
Timer_Config::t13Frequency
float32 t13Frequency
Specify expected T13 PWM frequency in Hertz.
Definition: Timer.h:68
Timer_Config::t13Period
Ifx_TimerValue t13Period
Specify expected T13 PWM period in ticks.
Definition: Timer.h:69
IfxCcu6_setCountingInputMode
IFX_INLINE void IfxCcu6_setCountingInputMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_CountingInputMode mode)
Sets the input event leading to a counting action of Timers (T12 / T13).
Definition: IfxCcu6.h:1941
IfxCcu6_Timer_start
void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
Starts the timer.
Definition: IfxCcu6_Timer.c:347
IfxCcu6_CountingInputMode_manual
Bit TCTR4.T1xCNT written with 1 is a counting event. The T1x prescaler is not taken into account...
Definition: IfxCcu6.h:111
IfxCcu6_Timer_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:256
IfxCcu6_setT13CounterValue
IFX_INLINE void IfxCcu6_setT13CounterValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the 16-bit counter value of Timer13.
Definition: IfxCcu6.h:2086
IfxCcu6_Timer::base
Timer base
Base Timer object.
Definition: IfxCcu6_Timer.h:278
IfxCcu6_Timer_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:216
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_T13TriggerEvent_noAction
no action
Definition: IfxCcu6.h:304
IfxCcu6_initT13hrPin
IFX_INLINE void IfxCcu6_initT13hrPin(const IfxCcu6_T13hr_In *t13hrIn, IfxPort_InputMode inputMode)
Initialises a T13HR input pin.
Definition: IfxCcu6.h:1882
IfxCcu6_Timer_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_Timer.h:258
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_Timer_Config::interrupt2
IfxCcu6_Timer_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Timer.h:296
IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:265
IfxCcu6_Timer_Config::synchronousOperation
boolean synchronousOperation
Synchronous operation selection (starting / stopping both the timers at the same time) ...
Definition: IfxCcu6_Timer.h:291
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:177
IfxCcu6_Timer_Config::timer13
IfxCcu6_Timer_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:294
IfxCcu6_Timer_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_Timer.h:248
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:216
IfxCcu6_Timer_initModule
void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Timer.c:59
IfxCcu6_Timer_initModuleConfig
void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Timer.c:263
IfxCcu6_setT12InputSignal
void IfxCcu6_setT12InputSignal(Ifx_CCU6 *ccu6, IfxCcu6_T12hr_In *extInput)
selects the actual input signal for the timer inputs.
Definition: IfxCcu6.c:409
IfxCcu6_Timer_Config::base
Timer_Config base
Base configuration.
Definition: IfxCcu6_Timer.h:288
IfxCcu6_disableShadowTransfer
IFX_INLINE void IfxCcu6_disableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Disables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1461
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:257
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2098
IfxCcu6_Timer_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_Timer.h:221
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2074
IfxCcu6_Timer_Config::clock
IfxCcu6_Timer_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:292
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2123
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxCcu6_Timer_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Timer.h:231
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxCcu6_Timer_Timer13::counterValue
uint16 counterValue
16-bit counter value of Timer13
Definition: IfxCcu6_Timer.h:246
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2092
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:128
Timer_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: Timer.h:70
IfxCcu6_Timer_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Timer.h:230
IfxCcu6_setT13Frequency
float32 IfxCcu6_setT13Frequency(Ifx_CCU6 *ccu6, float32 frequency, Ifx_TimerValue period)
Sets the frequency and clock input of the Timer 13 Caution: If desired frequency cannot achieved (by ...
Definition: IfxCcu6.c:444
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:215


iLLD_TC26B: IfxCcu6_Timer.h Source File

  • Ccu6
  • Timer
IfxCcu6_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_Timer.h
3 * \brief CCU6 TIMER details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Ccu6_Timer_Usage How to use the CCU6 TIMER Interface driver?
26 * \ingroup IfxLld_Ccu6_Timer
27 *
28 * The TIMER interface driver provides a default CCU6 configuration for runnung the selected timer block.
29 *
30 * User can select the various configuration options that hardware allows
31 *
32 * In the following sections it will be described, how to integrate the driver into the application framework.
33 *
34 *
35 * \section IfxLld_Ccu6_Timer_Preparation Preparation
36 *
37 *
38 * \subsection IfxLld_Ccu6_Timer_Include Include Files
39 *
40 * Include following header file into your C code:
41 *
42 * \code
43 * #include <Ccu6/Timer/IfxCcu6_Timer.h>
44 * \endcode
45 *
46 * \subsection IfxLld_Ccu6_Timer_Variables Variables
47 *
48 * Declare the TIMER handle as global variable in your C code:
49 *
50 * \code
51 * // used globally
52 * static IfxCcu6_Timer timer;
53 * \endcode
54 *
55 * \subsection IfxLld_Ccu6_Timer_Interrupt Interrupt Handler Installation
56 *
57 * See also \ref IfxLld_Cpu_Irq_Usage
58 *
59 * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
60 *
61 * \code
62 * // priorities are normally defined in Ifx_IntPrioDef.h
63 * #define IFX_INTPRIO_CCU6 1
64 * \endcode
65 *
66 * Add the interrupt service routine to your C code.
67 *
68 * \code
69 * IFX_INTERRUPT(ccu60ISR_Timer, 0, IFX_INTPRIO_CCU6)
70 * {
71 * //user code
72 * }
73 * \endcode
74 *
75 * Finally install the interrupt handlers in your initialisation function:
76 *
77 * \code
78 * // install interrupt handlers
79 * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Timer, IFX_INTPRIO_CCU6);
80 * IfxCpu_enableInterrupts();
81 * \endcode
82 *
83 * \subsection IfxLld_Ccu6_Timer_Init Module Initialisation
84 *
85 * The module initialisation can be done in the same function. Here an example:
86 *
87 * \code
88 * // create configuration
89 * IfxCcu6_Timer_Config timerConfig;
90 * IfxCcu6_Timer_initModuleConfig(&timerConfig, &MODULE_CCU60);
91 *
92 * // configure the frequency of the timer in case of internal start
93 * // this frequency will be set for the timer block selected later
94 * timerConfig.base.frequency = 400000;
95 *
96 * // configure the period of the timer
97 * timerConfig.base.period = 100;
98 *
99 * // configure the waiting time in case of delayed T13 start in sync with T12
100 * timerConfig.base.waitingTime = 0;
101 *
102 * // select the timer that needs to be started
103 * timerConfig.timer = IfxCcu6_TimerId_t12;
104 *
105 * // select the synchronous operation if both timers need to be start at the same time
106 * // previous selection of timer block can be ignored in this mode
107 * timerConfig.synchronousOperation = TRUE;
108 *
109 * // configure the clock for internal mode
110 * timerConfig.clock.t12ExtClockEnabled = FALSE;
111 * timerConfig.clock.t12ExtClockInput = NULL_PTR;
112 * timerConfig.clock.t12countingInputMode = IfxCcu6_CountingInputMode_internal;
113 *
114 * // configure the selcted timer block
115 * timerConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
116 * timerConfig.timer12.counterValue = 0;
117 *
118 * // configure the interrupts
119 * timerConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t12PeriodMatch;
120 * timerConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
121 * timerConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
122 * timerConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
123 *
124 * // configure input and output triggers
125 * timerConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
126 * timerConfig.trigger.t13ExtInputTrigger = NULL_PTR;
127 * timerConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
128 * timerConfig.trigger.t13InSyncWithT12 = FALSE;
129 *
130 * // initialize the module
131 * IfxCcu6_Timer_initModule(&timer, &timerConfig);
132 * \endcode
133 *
134 *
135 * The Timer is ready for use now!
136 *
137 *
138 * \section IfxLld_Ccu6_Timer_Control Control
139 *
140 *
141 * The TIMER driver provides simple to use timer Control functions
142 *
143 * This means: In addition to start and stop a single timer, you can start and stop both the timer blocks at the same time
144 * you can also run the timer in single shot mode and finally you an manually make the timer count each step
145 *
146 * Start the timer
147 *
148 * \code
149 * IfxCcu6_Timer_start(&timer);
150 * \endcode
151 *
152 * Stop the timer
153 *
154 * \code
155 * IfxCcu6_Timer_stop(&timer);
156 * \endcode
157 *
158 * Start both the timers synchronously, when the synchronousOperation mode is selected in the configuration
159 *
160 * \code
161 * IfxCcu6_Timer_synchronousStart(&timer);
162 * \endcode
163 *
164 * Stop both the timers synchronously, when the synchronousOperation mode is selected in the configuration
165 *
166 * \code
167 * IfxCcu6_Timer_synchronousStop(&timer);
168 * \endcode
169 *
170 * Start the selected timer in single shot mode
171 *
172 * \code
173 * IfxCcu6_Timer_startSingleShotMode(&timer);
174 * \endcode
175 *
176 * Make the timer count each step manually
177 *
178 * \code
179 * uint8 i;
180 * for (i=0; i<50; i++)
181 * {
182 * IfxCcu6_Timer_countOneStep(&timer);
183 * }
184 * \endcode
185 *
186 * \defgroup IfxLld_Ccu6_Timer TIMER Interface driver
187 * \ingroup IfxLld_Ccu6
188 * \defgroup IfxLld_Ccu6_Timer_DataStructures Data Structures
189 * \ingroup IfxLld_Ccu6_Timer
190 * \defgroup IfxLld_Ccu6_Timer_Module_Initialize_Functions Module Initialize Functions
191 * \ingroup IfxLld_Ccu6_Timer
192 * \defgroup IfxLld_Ccu6_Timer_Timer_Control_Functions Timer Control Functions
193 * \ingroup IfxLld_Ccu6_Timer
194 */
195
196 #ifndef IFXCCU6_TIMER_H
197 #define IFXCCU6_TIMER_H 1
198
199 /******************************************************************************/
200 /*----------------------------------Includes----------------------------------*/
201 /******************************************************************************/
202
203 #include "Ccu6/Std/IfxCcu6.h"
204 #include "If/Ccu6If/Timer.h"
205
206 /******************************************************************************/
207 /*-----------------------------Data Structures--------------------------------*/
208 /******************************************************************************/
209
210 /** \addtogroup IfxLld_Ccu6_Timer_DataStructures
211 * \{ */
212 /** \brief Structure for clock configuration
213 */
214 typedef struct
215 {
216 boolean t12ExtClockEnabled; /**< \brief Timer 12 external clock enable / disable selection */
217 IfxCcu6_T12hr_In *t12ExtClockInput; /**< \brief External input signal selection for timer 12 */
218 IfxCcu6_CountingInputMode t12countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
219 boolean t13ExtClockEnabled; /**< \brief Timer 13 external clock enable / disable selection */
220 IfxCcu6_T13hr_In *t13ExtClockInput; /**< \brief External input signal selection for timer 13 */
221 IfxCcu6_CountingInputMode t13countingInputMode; /**< \brief Input event leading to a counting action of the timer T13 */
222 } IfxCcu6_Timer_Clock;
223
224 /** \brief Structure for interrupt configuration
225 */
226 typedef struct
227 {
228 IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
229 IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
230 uint16 priority; /**< \brief Interrupt priority */
231 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
232 } IfxCcu6_Timer_InterruptConfig;
233
234 /** \brief Structure for Timer 12
235 */
236 typedef struct
237 {
238 IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
239 uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
240 } IfxCcu6_Timer_Timer12;
241
242 /** \brief Structure for Timer 13
243 */
244 typedef struct
245 {
246 uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
247 IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
248 IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
249 } IfxCcu6_Timer_Timer13;
250
251 /** \brief Configuration structure for external triggers
252 */
253 typedef struct
254 {
255 IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External input signal selection for timer 12 */
256 IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External input signal selection for timer 13 */
257 IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T1xHR that can set the run bit T1xR by HW */
258 boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
259 } IfxCcu6_Timer_TriggerConfig;
260
261 /** \} */
262
263 /** \brief Structure for CCU6 output pin configuration
264 */
265 typedef struct
266 {
267 IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
268 IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
269 IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
270 } IfxCcu6_Timer_Pins;
271
272 /** \addtogroup IfxLld_Ccu6_Timer_DataStructures
273 * \{ */
274 /** \brief Module handle
275 */
276 typedef struct
277 {
278 Timer base; /**< \brief Base Timer object */
279 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
280 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
281 IfxCcu6_Timer_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
282 } IfxCcu6_Timer;
283
284 /** \brief Configuration structure of the module
285 */
286 typedef struct
287 {
288 Timer_Config base; /**< \brief Base configuration */
289 Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
290 IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
291 boolean synchronousOperation; /**< \brief Synchronous operation selection (starting / stopping both the timers at the same time) */
292 IfxCcu6_Timer_Clock clock; /**< \brief Structure for clock configuration */
293 IfxCcu6_Timer_Timer12 timer12; /**< \brief Structure for Timer 12 */
294 IfxCcu6_Timer_Timer13 timer13; /**< \brief Structure for Timer 13 */
295 IfxCcu6_Timer_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
296 IfxCcu6_Timer_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
297 IfxCcu6_Timer_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
298 IfxCcu6_Timer_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
299 IfxCcu6_Timer_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
300 IfxCcu6_Timer_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
301 } IfxCcu6_Timer_Config;
302
303 /** \} */
304
305 /** \addtogroup IfxLld_Ccu6_Timer_Module_Initialize_Functions
306 * \{ */
307
308 /******************************************************************************/
309 /*-------------------------Global Function Prototypes-------------------------*/
310 /******************************************************************************/
311
312 /** \brief Initialises the module with default configuration
313 * \param timer Module handle
314 * \param config Configuration structure of the module
315 * \return None
316 *
317 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
318 *
319 */
320 IFX_EXTERN void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config);
321
322 /** \brief Fills the config structure with default values
323 * \param config Configuration structure of the module
324 * \param ccu6 Pointer to the base of CCU6 registers
325 * \return None
326 *
327 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
328 *
329 */
330 IFX_EXTERN void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6);
331
332 /** \} */
333
334 /** \addtogroup IfxLld_Ccu6_Timer_Timer_Control_Functions
335 * \{ */
336
337 /******************************************************************************/
338 /*-------------------------Global Function Prototypes-------------------------*/
339 /******************************************************************************/
340
341 /** \brief Counts the timer one step
342 * \param timer Module handle
343 * \return None
344 *
345 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
346 *
347 */
348 IFX_EXTERN void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer);
349
350 /** \brief Starts the timer
351 * \param timer Module handle
352 * \return None
353 *
354 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
355 *
356 */
357 IFX_EXTERN void IfxCcu6_Timer_start(IfxCcu6_Timer *timer);
358
359 /** \brief Starts the single shot mode of the timer
360 * \param timer Module handle
361 * \return None
362 *
363 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
364 *
365 */
366 IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer);
367
368 /** \brief Stops the timer
369 * \param timer Module handle
370 * \return None
371 *
372 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
373 *
374 */
375 IFX_EXTERN void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer);
376
377 /** \brief Starts both the timers together
378 * \param timer Module handle
379 * \return None
380 *
381 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
382 *
383 */
384 IFX_EXTERN void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer);
385
386 /** \brief Starts both the timers together
387 * \param timer Module handle
388 * \return None
389 *
390 * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
391 *
392 */
393 IFX_EXTERN void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer);
394
395 /** \} */
396
397 #endif /* IFXCCU6_TIMER_H */
IfxCcu6_Timer_synchronousStart
IFX_EXTERN void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:507
IfxCcu6_Timer_Config::pins
IfxCcu6_Timer_Pins * pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:300
IfxCcu6_Timer_InterruptConfig
Structure for interrupt configuration.
Definition: IfxCcu6_Timer.h:226
IfxCcu6_Timer_Config::interrupt1
IfxCcu6_Timer_InterruptConfig interrupt1
Structure for first interrupt configuration.
Definition: IfxCcu6_Timer.h:295
IfxCcu6_Timer_Clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:214
IfxCcu6_Timer_Clock::t13ExtClockEnabled
boolean t13ExtClockEnabled
Timer 13 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:219
IfxCcu6_Timer_Config::interrupt4
IfxCcu6_Timer_InterruptConfig interrupt4
Structure for fourth interrupt configuration.
Definition: IfxCcu6_Timer.h:298
IfxCcu6_InterruptSource
IfxCcu6_InterruptSource
Interrupt source selection Description in Ifx_CCU.IEN.
Definition: IfxCcu6.h:162
IfxCcu6_Timer_Clock::t13ExtClockInput
IfxCcu6_T13hr_In * t13ExtClockInput
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:220
IfxCcu6_Timer_TriggerConfig::t12ExtInputTrigger
IfxCcu6_T12hr_In * t12ExtInputTrigger
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:255
IfxCcu6_Timer_countOneStep
IFX_EXTERN void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer)
Counts the timer one step.
Definition: IfxCcu6_Timer.c:36
IfxCcu6_Timer_Timer12::countMode
IfxCcu6_T12CountMode countMode
Operating mode of Timer 12.
Definition: IfxCcu6_Timer.h:238
IfxCcu6_Timer::trigger
IfxCcu6_Timer_TriggerConfig trigger
Structure for trigger configuration.
Definition: IfxCcu6_Timer.h:281
IfxCcu6_Timer_InterruptConfig::source
IfxCcu6_InterruptSource source
Interrupt source selection.
Definition: IfxCcu6_Timer.h:228
IfxCcu6_T13TriggerDirection
IfxCcu6_T13TriggerDirection
Delivers additional information to control the automatic set of bit T13R in the case that the trigger...
Definition: IfxCcu6.h:291
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxCcu6_Timer_Config
Configuration structure of the module.
Definition: IfxCcu6_Timer.h:286
IfxCcu6_Timer
Module handle.
Definition: IfxCcu6_Timer.h:276
IfxCcu6_Timer_Pins::t1xhrInputMode
IfxPort_InputMode t1xhrInputMode
The T1xHR pin input mode which should be configured.
Definition: IfxCcu6_Timer.h:269
Timer_Config
Configuration structure of the Timer interface.
Definition: Timer.h:64
IfxCcu6_Timer_Config::timer12
IfxCcu6_Timer_Timer12 timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:293
IfxCcu6_Timer_startSingleShotMode
IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer)
Starts the single shot mode of the timer.
Definition: IfxCcu6_Timer.c:402
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCcu6_Timer_stop
IFX_EXTERN void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer)
Stops the timer.
Definition: IfxCcu6_Timer.c:462
IfxCcu6_Timer::timer
IfxCcu6_TimerId timer
Timer number (T12 / T13)
Definition: IfxCcu6_Timer.h:280
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu6_Timer_Pins::t13hr
IFX_CONST IfxCcu6_T13hr_In * t13hr
T13HR input signal.
Definition: IfxCcu6_Timer.h:268
IfxCcu6_CountingInputMode
IfxCcu6_CountingInputMode
Defines the input event leading to a counting action of the timer (T12 / T13) Definition in Ifx_CCU...
Definition: IfxCcu6.h:107
IfxCcu6_Timer_Timer13::t12SyncEvent
IfxCcu6_T13TriggerEvent t12SyncEvent
T12 sync trigger event to start T13.
Definition: IfxCcu6_Timer.h:247
IfxCcu6_Timer_synchronousStop
IFX_EXTERN void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer)
Starts both the timers together.
Definition: IfxCcu6_Timer.c:517
Timer.h
Timer interface.
Timer_s
Structure of the Timer interface.
Definition: Timer.h:52
IfxCcu6_Timer_InterruptConfig::serviceRequest
IfxCcu6_ServiceRequest serviceRequest
Selection of service request outputs.
Definition: IfxCcu6_Timer.h:229
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:213
IfxCcu6_T13TriggerEvent
IfxCcu6_T13TriggerEvent
Selects the trigger event to start T13 (automatic set of T13R for synchronization to T12 compare sign...
Definition: IfxCcu6.h:302
IfxCcu6_Timer_Clock::t12ExtClockInput
IfxCcu6_T12hr_In * t12ExtClockInput
External input signal selection for timer 12.
Definition: IfxCcu6_Timer.h:217
IfxCcu6_Timer_Timer12
Structure for Timer 12.
Definition: IfxCcu6_Timer.h:236
IfxCcu6_Timer_Timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:244
IfxCcu6_TimerId
IfxCcu6_TimerId
Timer number ( T12 / T13 )
Definition: IfxCcu6.h:317
IfxCcu6_Timer_Clock::t12countingInputMode
IfxCcu6_CountingInputMode t12countingInputMode
Input event leading to a counting action of the timer T12.
Definition: IfxCcu6_Timer.h:218
IfxCcu6_Timer_Pins::t12hr
IFX_CONST IfxCcu6_T12hr_In * t12hr
T12HR input signal.
Definition: IfxCcu6_Timer.h:267
IfxCcu6_T12CountMode
IfxCcu6_T12CountMode
Operating mode of Timer 12 Definition in Ifx_CCU.TCTR0.B.CTM.
Definition: IfxCcu6.h:280
IfxCcu6_Timer::ccu6
Ifx_CCU6 * ccu6
Pointer to the base of CCU6 registers.
Definition: IfxCcu6_Timer.h:279
IfxCcu6_Timer_Config::interrupt3
IfxCcu6_Timer_InterruptConfig interrupt3
Structure for third interrupt configuration.
Definition: IfxCcu6_Timer.h:297
IfxCcu6_Timer_start
IFX_EXTERN void IfxCcu6_Timer_start(IfxCcu6_Timer *timer)
Starts the timer.
Definition: IfxCcu6_Timer.c:347
IfxCcu6_Timer_TriggerConfig::t13ExtInputTrigger
IfxCcu6_T13hr_In * t13ExtInputTrigger
External input signal selection for timer 13.
Definition: IfxCcu6_Timer.h:256
IfxCcu6_ExternalTriggerMode
IfxCcu6_ExternalTriggerMode
Defines the event of signal T1xHR that can set the run bit T1xR by HW Definition in Ifx_CCU...
Definition: IfxCcu6.h:132
IfxCcu6_Timer::base
Timer base
Base Timer object.
Definition: IfxCcu6_Timer.h:278
IfxCcu6_Timer_Clock::t12ExtClockEnabled
boolean t12ExtClockEnabled
Timer 12 external clock enable / disable selection.
Definition: IfxCcu6_Timer.h:216
IfxCcu6_T12hr_In
T12HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:95
IfxCcu6_T13hr_In
T13HR pin mapping structure.
Definition: IfxCcu6_PinMap.h:103
IfxCcu6_Timer_TriggerConfig::t13InSyncWithT12
boolean t13InSyncWithT12
Selection of Timer 13 start in sync with T12.
Definition: IfxCcu6_Timer.h:258
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCcu6_Timer_Config::interrupt2
IfxCcu6_Timer_InterruptConfig interrupt2
Structure for second interrupt configuration.
Definition: IfxCcu6_Timer.h:296
IfxCcu6_Timer_Pins
Structure for CCU6 output pin configuration.
Definition: IfxCcu6_Timer.h:265
IfxCcu6_Timer_Config::synchronousOperation
boolean synchronousOperation
Synchronous operation selection (starting / stopping both the timers at the same time) ...
Definition: IfxCcu6_Timer.h:291
IfxCcu6_Timer_Config::timer13
IfxCcu6_Timer_Timer13 timer13
Structure for Timer 13.
Definition: IfxCcu6_Timer.h:294
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxCcu6_Timer_Timer13::t12SyncDirection
IfxCcu6_T13TriggerDirection t12SyncDirection
Additional information to control trigger event selection.
Definition: IfxCcu6_Timer.h:248
IfxCcu6_Timer_initModule
IFX_EXTERN void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config)
Initialises the module with default configuration.
Definition: IfxCcu6_Timer.c:59
IfxCcu6_Timer_initModuleConfig
IFX_EXTERN void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6)
Fills the config structure with default values.
Definition: IfxCcu6_Timer.c:263
IfxCcu6_Timer_Config::base
Timer_Config base
Base configuration.
Definition: IfxCcu6_Timer.h:288
IfxCcu6_Timer_TriggerConfig::extInputTriggerMode
IfxCcu6_ExternalTriggerMode extInputTriggerMode
Event of signal T1xHR that can set the run bit T1xR by HW.
Definition: IfxCcu6_Timer.h:257
IfxCcu6_Timer_Clock::t13countingInputMode
IfxCcu6_CountingInputMode t13countingInputMode
Input event leading to a counting action of the timer T13.
Definition: IfxCcu6_Timer.h:221
IfxCcu6_Timer_Config::clock
IfxCcu6_Timer_Clock clock
Structure for clock configuration.
Definition: IfxCcu6_Timer.h:292
IfxCcu6_Timer_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxCcu6_Timer.h:231
IfxCcu6_Timer_Timer12::counterValue
uint16 counterValue
16-bit counter value of Timer12
Definition: IfxCcu6_Timer.h:239
IfxCcu6_Timer_TriggerConfig
Configuration structure for external triggers.
Definition: IfxCcu6_Timer.h:253
IfxCcu6_Timer_InterruptConfig::priority
uint16 priority
Interrupt priority.
Definition: IfxCcu6_Timer.h:230


iLLD_TC26B: IfxCcu6_TimerWithTrigger.c Source File

  • Ccu6
  • TimerWithTrigger
IfxCcu6_TimerWithTrigger.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TimerWithTrigger.c
3 * \brief CCU6 TIMERWITHTRIGGER details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxCcu6_TimerWithTrigger.h"
30 #include "_Utilities/Ifx_Assert.h"
31 #include "stddef.h"
32 #include "string.h"
33
34 /******************************************************************************/
35 /*-------------------------Function Implementations---------------------------*/
36 /******************************************************************************/
37
38 boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
39 {
40 boolean event;
41 event = IfxCcu6_isT12OneNotification(driver->ccu6);
42
43 if (event)
44 {
45 IfxCcu6_clearT12OneNotification(driver->ccu6);
46 }
47 else
48 {}
49
50 return event;
51 }
52
53
54 boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
55 {
56 boolean event;
57 event = IfxCcu6_isT13CompareNotification(driver->ccu6);
58
59 if (event)
60 {
61 IfxCcu6_clearT13CompareNotification(driver->ccu6);
62 }
63 else
64 {}
65
66 return event;
67 }
68
69
70 void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
71 {
72 IfxCcu6_enableShadowTransfer(driver->ccu6, TRUE, TRUE);
73 }
74
75
76 void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
77 {
78 IFX_UNUSED_PARAMETER(driver)
79 }
80
81
82 float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
83 {
84 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
85 }
86
87
88 float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
89 {
90 return driver->base.clockFreq;
91 }
92
93
94 Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
95 {
96 return driver->base.period;
97 }
98
99
100 volatile uint32 *IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
101 {
102 return IfxCcu6_getT12TimerPointer(driver->ccu6);
103 }
104
105
106 float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
107 {
108 return 1.0 / driver->base.clockFreq;
109 }
110
111
112 boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
113 {
114 boolean result = TRUE;
115 IfxCcu6_TimerWithTrigger_Base *base = &driver->base;
116 Ifx_CCU6 *module;
117
118 driver->ccu6 = config->ccu6;
119 module = driver->ccu6;
120
121 base->triggerEnabled = config->base.trigger.enabled;
122
123 /** - Enable/initialise the CCU6 if it has not been enabled. See IfxCcu6_isModuleEnabled() */
124 if (IfxCcu6_isModuleEnabled(module) == FALSE)
125 {
126 IfxCcu6_enableModule(module);
127 }
128
129 /* Initialize the timer part */
130 IfxCcu6_setT12CountMode(module, (config->base.countDir == IfxStdIf_Timer_CountDir_upAndDown) ? IfxCcu6_T12CountMode_centerAligned : IfxCcu6_T12CountMode_edgeAligned);
131
132 driver->base.countDir = config->base.countDir;
133
134 uint16 prescaler;
135 float32 freqT12 = 0, periodT12;
136 float32 freqCC6 = (float32)IfxScuCcu_getSpbFrequency();
137
138 for (prescaler = 0; prescaler < 16; prescaler++)
139 {
140 freqT12 = freqCC6 / (1U << prescaler);
141 periodT12 = freqT12 / config->base.frequency;
142
143 if ((periodT12 <= 16386.0) && (periodT12 > config->base.minResolution))
144 {
145 break;
146 }
147 }
148
149 if (prescaler < 16)
150 {
151 Ifx_CCU6_TCTR0 tctr0;
152 tctr0.U = module->TCTR0.U;
153 tctr0.B.T12CLK = (prescaler & 0x7U);
154 tctr0.B.T12PRE = ((prescaler & 0x8U) != 0);
155 module->TCTR0.U = tctr0.U;
156 }
157 else
158 {
159 /** \retval IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the
160 * required frequency */
161 result = FALSE;
162 }
163
164 IfxCcu6_TimerWithTrigger_updateInputFrequency(driver);
165
166 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
167 {
168 result = FALSE;
169 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
170 }
171 else
172 {}
173
174 IfxCcu6_TimerWithTrigger_setFrequency(driver, config->base.frequency);
175 /* Initialize the trigger part */
176
177 /** - The T13 is used to generate additional PWM for internal trigger purpose (e.g.
178 * ADC) or external trigger purpose (e.g. sensor synchronisation). */
179
180 if (base->triggerEnabled)
181 {
182 Ifx_CCU6_TCTR0 tctr0 = module->TCTR0;
183 module->TCTR0.B.T13CLK = tctr0.B.T12CLK;
184 module->TCTR0.B.T13PRE = tctr0.B.T12PRE;
185 IfxCcu6_setT13PeriodValue(module, (uint16)(base->period - 1));
186
187 module->MODCTR.B.T13MODEN = 0;
188 IfxCcu6_enableModulationOutput(module, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
189
190 IfxCcu6_setOutputPassiveLevel(module, IfxCcu6_ChannelOut_cout3, config->base.trigger.risingEdgeAtPeriod);
191
192 IfxCcu6_setSingleShotModeEnable(module, FALSE, TRUE);
193
194 IfxCcu6_setT13TriggerEventMode(module, IfxCcu6_T13TriggerEvent_onT12Zero);
195 IfxCcu6_setT13TriggerEventDirection(module, IfxCcu6_T13TriggerDirection_onT12CountingUp);
196
197 if (config->base.trigger.outputEnabled)
198 {
199 if (config->triggerOut != NULL_PTR)
200 {
201 /*Initialize the port */
202 IfxCcu6_initCout63Pin(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
203 }
204 else
205 {
206 result = FALSE;
207 }
208 }
209 else
210 {}
211
212 IfxCcu6_TimerWithTrigger_setTrigger(driver, config->base.trigger.triggerPoint);
213 }
214 else
215 {}
216
217 /* Interrupt configuration */
218 {
219 boolean timerHasIrq = config->base.isrPriority > 0;
220 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
221
222 if (timerHasIrq || triggerHasIrq)
223 {
224 volatile Ifx_SRC_SRCR *src;
225
226 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t12PeriodMatch);
227 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t12OneMatch);
228 IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t13CompareMatch);
229
230 if (timerHasIrq)
231 {
232 if (config->base.countDir == IfxStdIf_Timer_CountDir_upAndDown)
233 {
234 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t12OneMatch); /* full period */
235 }
236 else
237 {
238 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t12PeriodMatch); /* half-period*/
239 }
240
241 module->INP.B.INPT12 = config->serviceReqNrPeriod;
242 src = IfxCcu6_getSrcAddress(module, config->serviceReqNrPeriod);
243 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
244 IfxSrc_enable(src);
245 }
246
247 if (triggerHasIrq)
248 {
249 IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t13CompareMatch); /* trigger event */
250 module->INP.B.INPT13 = config->serviceReqNrTrigger;
251
252 src = IfxCcu6_getSrcAddress(module, config->serviceReqNrTrigger);
253 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
254 IfxSrc_enable(src);
255 }
256 }
257 }
258
259 /* Transfer the shadow registers */
260 IfxCcu6_TimerWithTrigger_applyUpdate(driver);
261 return result;
262 }
263
264
265 void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
266 {
267 IfxStdIf_Timer_initConfig(&config->base);
268 config->ccu6 = ccu6;
269 config->serviceReqNrPeriod = IfxCcu6_ServiceRequest_0;
270 config->serviceReqNrTrigger = IfxCcu6_ServiceRequest_1;
271 config->triggerOut = NULL_PTR;
272 }
273
274
275 void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
276 {
277 IfxCcu6_startTimer(driver->ccu6, TRUE, FALSE);
278 }
279
280
281 boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
282 {
283 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
284
285 return IfxCcu6_TimerWithTrigger_setPeriod(driver, period);
286 }
287
288
289 boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
290 {
291 driver->base.period = period;
292 IfxCcu6_setT12PeriodValue(driver->ccu6, (uint16)((driver->ccu6->TCTR0.B.CTM == 1) ?
293 ((period / 2) - 1) : (period - 1)));
294
295 return TRUE;
296 }
297
298
299 void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
300 {
301 if (enabled)
302 {
303 IfxCcu6_enableSingleShotMode(driver->ccu6, IfxCcu6_TimerId_t12);
304 }
305 else
306 {
307 IfxCcu6_disableSingleShotMode(driver->ccu6, IfxCcu6_TimerId_t12);
308 }
309 }
310
311
312 void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
313 {
314 driver->ccu6->CC63SR.U = triggerPoint;
315 }
316
317
318 boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
319 {
320 /* Ensure the stdif is reset to zeros */
321 memset(stdif, 0, sizeof(IfxStdIf_Timer));
322
323 /* *INDENT-OFF* Note: this file was indented manually by the author. */
324 /* Set the API link */
325 stdif->driver = driver;
326 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxCcu6_TimerWithTrigger_getFrequency;
327 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxCcu6_TimerWithTrigger_getPeriod;
328 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxCcu6_TimerWithTrigger_getResolution;
329 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxCcu6_TimerWithTrigger_setFrequency;
330 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxCcu6_TimerWithTrigger_updateInputFrequency;
331 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxCcu6_TimerWithTrigger_applyUpdate;
332 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxCcu6_TimerWithTrigger_disableUpdate;
333 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxCcu6_TimerWithTrigger_getInputFrequency;
334 stdif->run =(IfxStdIf_Timer_Run )&IfxCcu6_TimerWithTrigger_run;
335 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxCcu6_TimerWithTrigger_setPeriod;
336 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxCcu6_TimerWithTrigger_setSingleMode;
337 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxCcu6_TimerWithTrigger_setTrigger;
338 stdif->stop =(IfxStdIf_Timer_Stop )&IfxCcu6_TimerWithTrigger_stop;
339 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq;
340 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq;
341 /* *INDENT-ON* */
342
343 return TRUE;
344 }
345
346
347 void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
348 {
349 IfxCcu6_stopTimer(driver->ccu6, TRUE, TRUE);
350 }
351
352
353 void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
354 {
355 uint16 prescaler;
356 prescaler = driver->ccu6->TCTR0.B.T12CLK;
357
358 driver->base.clockFreq = IfxScuCcu_getSpbFrequency() / (1U << prescaler);
359 }
IfxCcu6_TimerWithTrigger_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxCcu6_TimerWithTrigger.h:80
IfxCcu6_stopTimer
IFX_INLINE void IfxCcu6_stopTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2133
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:72
IfxCcu6_TimerWithTrigger_setPeriod
boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxCcu6_TimerWithTrigger.c:289
IfxCcu6_TimerWithTrigger_disableUpdate
void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
Disables the upadte This function is has an empty body as the updated is disabled automatically after...
Definition: IfxCcu6_TimerWithTrigger.c:76
IfxCcu6_clearT13CompareNotification
IFX_INLINE void IfxCcu6_clearT13CompareNotification(Ifx_CCU6 *ccu6)
Clears the T13 compare notification.
Definition: IfxCcu6.h:1420
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:259
IfxCcu6_getSrcAddress
volatile Ifx_SRC_SRCR * IfxCcu6_getSrcAddress(Ifx_CCU6 *ccu6, IfxCcu6_ServiceRequest serviceRequest)
Returns the service request register.
Definition: IfxCcu6.c:220
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:82
IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq
boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event.
Definition: IfxCcu6_TimerWithTrigger.c:54
IfxCcu6_T12CountMode_edgeAligned
T12 always counts up and continues counting from zero after reaching the period value.
Definition: IfxCcu6.h:282
IfxCcu6_TimerWithTrigger_Config::serviceReqNrPeriod
IfxCcu6_ServiceRequest serviceReqNrPeriod
Service request used for the period.
Definition: IfxCcu6_TimerWithTrigger.h:83
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:216
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:114
IfxCcu6_setT13TriggerEventMode
IFX_INLINE void IfxCcu6_setT13TriggerEventMode(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerEvent mode)
Sets the trigger event to start Timer13 (automatic set of T13R for synchronization to Timer12 compare...
Definition: IfxCcu6.h:2104
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:236
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:234
IfxCcu6_InterruptSource_t13CompareMatch
Interrupt enable for T13 compare-match.
Definition: IfxCcu6.h:178
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:222
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:63
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:418
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:249
IfxCcu6_TimerWithTrigger_getPointer
volatile uint32 * IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel.
Definition: IfxCcu6_TimerWithTrigger.c:100
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:108
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:429
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxCcu6_TimerWithTrigger_getResolution
float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
Returns the resolution.
Definition: IfxCcu6_TimerWithTrigger.c:106
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
Ifx_Assert.h
Assert functions.
IfxCcu6_TimerWithTrigger_setSingleMode
void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:299
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:70
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:223
IfxCcu6_T12CountMode_centerAligned
T12 counts down after detecting a period-match and counts up after detecting a one-match.
Definition: IfxCcu6.h:284
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:94
IfxCcu6_TimerId_t13
Timer 13.
Definition: IfxCcu6.h:320
IfxCcu6_setSingleShotModeEnable
IFX_INLINE void IfxCcu6_setSingleShotModeEnable(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables / Disables the single shot mode of Timers (T12, T13 individually or together based on the sel...
Definition: IfxCcu6.h:2024
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCcu6_TimerWithTrigger_getFrequency
float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:82
IfxCcu6_disableSingleShotMode
IFX_INLINE void IfxCcu6_disableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Disables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1471
IfxCcu6_isT13CompareNotification
IFX_INLINE boolean IfxCcu6_isT13CompareNotification(Ifx_CCU6 *ccu6)
Returns the status of T13 compare notification.
Definition: IfxCcu6.h:1927
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCcu6_enableShadowTransfer
IFX_INLINE void IfxCcu6_enableShadowTransfer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
Enables shadow transfers of the timers (T12, T13 individually or together based on the selection) ...
Definition: IfxCcu6.h:1586
IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq
boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the timer event.
Definition: IfxCcu6_TimerWithTrigger.c:38
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:258
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:71
IfxCcu6_TimerWithTrigger.h
CCU6 TIMERWITHTRIGGER details.
IfxCcu6_enableSingleShotMode
IFX_INLINE void IfxCcu6_enableSingleShotMode(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer)
Enables the single shot-mode of Timers (T12 T13).
Definition: IfxCcu6.h:1596
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:62
IfxCcu6_enableInterrupt
IFX_INLINE void IfxCcu6_enableInterrupt(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Enables the selected interrupt.
Definition: IfxCcu6.h:1543
IfxCcu6_T13TriggerEvent_onT12Zero
set T13R upon a zero-match of T12 (while counting up)
Definition: IfxCcu6.h:310
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:230
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:60
IfxCcu6_TimerWithTrigger_setTrigger
void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxCcu6_TimerWithTrigger.c:312
IfxCcu6_TimerId_t12
Timer 12.
Definition: IfxCcu6.h:319
IfxCcu6_TimerWithTrigger_getInputFrequency
float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy.
Definition: IfxCcu6_TimerWithTrigger.c:88
IfxCcu6_ChannelOut_cout3
CC63 compare output COUT3.
Definition: IfxCcu6.h:101
IfxCcu6_setT12CountMode
IFX_INLINE void IfxCcu6_setT12CountMode(Ifx_CCU6 *ccu6, IfxCcu6_T12CountMode mode)
Definition: IfxCcu6.h:2062
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:158
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:198
IfxCcu6_InterruptSource_t12OneMatch
Interrupt enable for T12 one-match.
Definition: IfxCcu6.h:176
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:250
IfxCcu6_isModuleEnabled
IFX_INLINE boolean IfxCcu6_isModuleEnabled(Ifx_CCU6 *ccu6)
Returns the status of module enabled or disabled.
Definition: IfxCcu6.h:1897
IfxCcu6_T13TriggerDirection_onT12CountingUp
while T12 is counting up
Definition: IfxCcu6.h:294
IfxCcu6_clearInterruptStatusFlag
IFX_INLINE void IfxCcu6_clearInterruptStatusFlag(Ifx_CCU6 *ccu6, IfxCcu6_InterruptSource source)
Clears the selected interrupt flag.
Definition: IfxCcu6.h:1401
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:28
IfxCcu6_TimerWithTrigger_Base
Structure for the timer base.
Definition: IfxCcu6_TimerWithTrigger.h:58
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:231
IfxCcu6_TimerWithTrigger_run
void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
Runs the timer.
Definition: IfxCcu6_TimerWithTrigger.c:275
IfxCcu6_clearT12OneNotification
IFX_INLINE void IfxCcu6_clearT12OneNotification(Ifx_CCU6 *ccu6)
Clears the T12 One notification.
Definition: IfxCcu6.h:1408
IfxCcu6_TimerWithTrigger_stop
void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
Stops the timer.
Definition: IfxCcu6_TimerWithTrigger.c:347
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:235
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:227
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:232
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:228
IfxCcu6_InterruptSource_t12PeriodMatch
Interrupt enable for T12 period-match.
Definition: IfxCcu6.h:177
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:88
IfxCcu6_TimerWithTrigger_getPeriod
Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:94
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:152
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxCcu6_ServiceRequest_1
Service request output SR1.
Definition: IfxCcu6.h:216
IfxCcu6_TimerWithTrigger_initConfig
void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default.
Definition: IfxCcu6_TimerWithTrigger.c:265
IfxCcu6_isT12OneNotification
IFX_INLINE boolean IfxCcu6_isT12OneNotification(Ifx_CCU6 *ccu6)
Returns the status of T12 one notification.
Definition: IfxCcu6.h:1915
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:233
IfxCcu6_initCout63Pin
IFX_INLINE void IfxCcu6_initCout63Pin(const IfxCcu6_Cout63_Out *cout63, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initialises a COUT63 output pin.
Definition: IfxCcu6.h:1845
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:238
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:257
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:135
IfxCcu6_setOutputPassiveLevel
void IfxCcu6_setOutputPassiveLevel(Ifx_CCU6 *ccu6, IfxCcu6_ChannelOut channelOut, boolean state)
Sets the passive state level of the PWM outputs of the module.
Definition: IfxCcu6.c:303
IfxCcu6_getT12TimerPointer
IFX_INLINE volatile uint32 * IfxCcu6_getT12TimerPointer(Ifx_CCU6 *ccu6)
Returns the Timer pointer.
Definition: IfxCcu6.h:1686
IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer.
Definition: IfxCcu6_TimerWithTrigger.h:78
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:167
IfxCcu6_TimerWithTrigger_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxCcu6_TimerWithTrigger.h:61
IfxCcu6_TimerWithTrigger_Config::serviceReqNrTrigger
IfxCcu6_ServiceRequest serviceReqNrTrigger
Service request used for the Trigger.
Definition: IfxCcu6_TimerWithTrigger.h:84
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:225
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:261
IfxCcu6_setT13TriggerEventDirection
IFX_INLINE void IfxCcu6_setT13TriggerEventDirection(Ifx_CCU6 *ccu6, IfxCcu6_T13TriggerDirection direction)
Sets the Timer13 trigger event direction.
Definition: IfxCcu6.h:2098
IfxCcu6_TimerWithTrigger_setFrequency
boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:281
IfxCcu6_setT12PeriodValue
IFX_INLINE void IfxCcu6_setT12PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer12 counter value to a period-match.
Definition: IfxCcu6.h:2074
IfxCcu6_TimerWithTrigger_applyUpdate
void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:70
IfxCcu6_TimerWithTrigger_init
boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object T12 is configured as timer, T13 is optionally configured as trigger T12C...
Definition: IfxCcu6_TimerWithTrigger.c:112
IfxCcu6_startTimer
IFX_INLINE void IfxCcu6_startTimer(Ifx_CCU6 *ccu6, boolean t12, boolean t13)
starts the timers (T12, T13 individually or together based on the selection)
Definition: IfxCcu6.h:2123
IfxCcu6_TimerWithTrigger_Config::triggerOut
IfxCcu6_Cout63_Out * triggerOut
Definition: IfxCcu6_TimerWithTrigger.h:82
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:204
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:229
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:210
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:244
IfxCcu6_setT13PeriodValue
IFX_INLINE void IfxCcu6_setT13PeriodValue(Ifx_CCU6 *ccu6, uint16 value)
Sets the period value that leads Timer13 counter value to a period-match.
Definition: IfxCcu6.h:2092
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:177
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:260
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxCcu6_TimerWithTrigger_stdIfTimerInit
boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:318
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:248
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:186
IfxCcu6_enableModule
void IfxCcu6_enableModule(Ifx_CCU6 *ccu6)
Enables the selected CCU6 kernel.
Definition: IfxCcu6.c:128
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:224
IfxCcu6_enableModulationOutput
void IfxCcu6_enableModulationOutput(Ifx_CCU6 *ccu6, IfxCcu6_TimerId timer, IfxCcu6_ChannelOut channelOut)
Enables the modulation of the corresponding output signal by PWM pattern generated by the timers T12 ...
Definition: IfxCcu6.c:97
IfxCcu6_TimerWithTrigger_updateInputFrequency
void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency.
Definition: IfxCcu6_TimerWithTrigger.c:353
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:73
IfxCcu6_ServiceRequest_0
Service request output SR0.
Definition: IfxCcu6.h:215


iLLD_TC26B: IfxCcu6_TimerWithTrigger.h Source File

  • Ccu6
  • TimerWithTrigger
IfxCcu6_TimerWithTrigger.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_TimerWithTrigger.h
3 * \brief CCU6 TIMERWITHTRIGGER details
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Usage How to use the CCU6 TimerWithTrigger Interface driver?
25 * \ingroup IfxLld_Ccu6_TimerWithTrigger
26 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
27 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
28 *
29 * \defgroup IfxLld_Ccu6_TimerWithTrigger TimerWithTrigger Interface driver
30 * \ingroup IfxLld_Ccu6
31 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Data_Structures Data Structures
32 * \ingroup IfxLld_Ccu6_TimerWithTrigger
33 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Timer_StdIf_Functions Timer StdIf Functions
34 * \ingroup IfxLld_Ccu6_TimerWithTrigger
35 * \defgroup IfxLld_Ccu6_TimerWithTrigger_Timer_Functions Timer Functions
36 * \ingroup IfxLld_Ccu6_TimerWithTrigger
37 */
38
39 #ifndef IFXCCU6_TIMERWITHTRIGGER_H
40 #define IFXCCU6_TIMERWITHTRIGGER_H 1
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "_PinMap/IfxCcu6_PinMap.h"
47 #include "Ccu6/Std/IfxCcu6.h"
48 #include "StdIf/IfxStdIf_Timer.h"
49
50 /******************************************************************************/
51 /*-----------------------------Data Structures--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Data_Structures
55 * \{ */
56 /** \brief Structure for the timer base
57 */
58 typedef struct
59 {
60 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
61 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
62 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
63 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
64 } IfxCcu6_TimerWithTrigger_Base;
65
66 /** \} */
67
68 /** \brief CCU6 Timer interface
69 */
70 typedef struct
71 {
72 IfxCcu6_TimerWithTrigger_Base base; /**< \brief Timer base structure */
73 Ifx_CCU6 *ccu6; /**< \brief CCU6 module used for the timer functionality */
74 } IfxCcu6_TimerWithTrigger;
75
76 /** \brief Configuration structure for T12 and T13 Timer
77 */
78 typedef struct
79 {
80 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
81 Ifx_CCU6 *ccu6; /**< \brief CCU6 module used for the timer functionality */
82 IfxCcu6_Cout63_Out *triggerOut;
83 IfxCcu6_ServiceRequest serviceReqNrPeriod; /**< \brief Service request used for the period */
84 IfxCcu6_ServiceRequest serviceReqNrTrigger; /**< \brief Service request used for the Trigger */
85 } IfxCcu6_TimerWithTrigger_Config;
86
87 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Timer_StdIf_Functions
88 * \{ */
89
90 /******************************************************************************/
91 /*-------------------------Global Function Prototypes-------------------------*/
92 /******************************************************************************/
93
94 /** \brief Returns the timer event
95 * \param driver CCU6 Timer interface Handle
96 * \return Timer event
97 *
98 * \see IfxStdIf_Timer_AckTimerIrq
99 *
100 */
101 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver);
102
103 /** \brief Returns the trigger event
104 * \param driver CCU6 Timer interface Handle
105 * \return Timer event
106 *
107 * \see IfxStdIf_Timer_AckTriggerIrq
108 *
109 */
110 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver);
111
112 /** \brief Enable the transfer of the shadow registers
113 * \param driver CCU6 Timer interface Handle
114 * \return None
115 *
116 * \see IfxStdIf_Timer_ApplyUpdate
117 *
118 */
119 IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver);
120
121 /** \brief Disables the upadte\n
122 * This function is has an empty body as the updated is disabled automatically after the shadow transfer
123 * \param driver CCU6 Timer interface Handle
124 * \return None
125 *
126 * \see IfxStdIf_Timer_DisableUpdate
127 *
128 */
129 IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver);
130
131 /** \brief Returns the frequency
132 * \param driver CCU6 Timer interface Handle
133 * \return Frequency
134 *
135 * \see IfxStdIf_Timer_GetFrequency
136 *
137 */
138 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver);
139
140 /** \brief Returns the Input frequncy
141 * \param driver CCU6 Timer interface Handle
142 * \return Frequency
143 *
144 * \see IfxStdIf_Timer_GetInputFrequency
145 *
146 */
147 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver);
148
149 /** \brief Returns the period of the timer
150 * \param driver CCU6 Timer interface Handle
151 * \return Period
152 *
153 * \see IfxStdIf_Timer_GetPeriod
154 *
155 */
156 IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver);
157
158 /** \brief Returns the resolution
159 * \param driver CCU6 Timer interface Handle
160 * \return Resolution
161 *
162 * \see IfxStdIf_Timer_GetResolution
163 *
164 */
165 IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver);
166
167 /** \brief Runs the timer
168 * \param driver CCU6 Timer interface Handle
169 * \return None
170 *
171 * \see IfxStdIf_Timer_Run
172 *
173 */
174 IFX_EXTERN void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver);
175
176 /** \brief Sets the frequency
177 * \param driver CCU6 Timer interface Handle
178 * \param frequency Frequency
179 * \return TRUE on success else FALSE
180 *
181 * \see IfxStdIf_Timer_SetFrequency
182 *
183 */
184 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency);
185
186 /** \brief Sets the period for the timer
187 * \param driver CCU6 Timer interface Handle
188 * \param period Period value
189 * \return TRUE on success else FALSE
190 *
191 * \see IfxStdIf_Timer_SetPeriod
192 *
193 */
194 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period);
195
196 /** \brief Sets the single shot mode of the timer
197 * \param driver CCU6 Timer interface Handle
198 * \param enabled If TRUE, sets the single shot mode
199 * \return None
200 *
201 * \see IfxStdIf_Timer_SetSingleMode
202 *
203 */
204 IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled);
205
206 /** \brief Sets the trigger
207 * \param driver CCU6 Timer interface Handle
208 * \param triggerPoint Trigger point value
209 * \return None
210 *
211 * \see IfxStdIf_Timer_SetTrigger
212 *
213 */
214 IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint);
215
216 /** \brief Initializes the standard interface timer
217 * \param stdif Standard interface object, will be initialized by the function
218 * \param driver CCU6 Timer interface Handle
219 * \return TRUE on success else FALSE
220 */
221 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver);
222
223 /** \brief Stops the timer
224 * \param driver CCU6 Timer interface Handle
225 * \return None
226 *
227 * \see IfxStdIf_Timer_Stop
228 *
229 */
230 IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver);
231
232 /** \brief Updates the input frequency
233 * \param driver CCU6 Timer interface Handle
234 * \return None
235 *
236 * \see IfxStdIf_Timer_UpdateInputFrequency
237 *
238 */
239 IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver);
240
241 /** \} */
242
243 /** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Timer_Functions
244 * \{ */
245
246 /******************************************************************************/
247 /*-------------------------Global Function Prototypes-------------------------*/
248 /******************************************************************************/
249
250 /** \brief Returns the pointer to timer channel
251 * \param driver CCU6 Timer interface Handle
252 * \return Pointer
253 *
254 * \see IfxStdIf_Timer_DisableUpdate
255 *
256 */
257 IFX_EXTERN volatile uint32 *IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver);
258
259 /** \brief Initialises the timer object\n
260 * T12 is configured as timer, T13 is optionally configured as trigger\n
261 * T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution\n
262 * Note: To achieve maximum PWM resolution, the requested T12 frequency should be the\n
263 * lowest PWM frequency.\n
264 * \param driver CCU6 Timer interface Handle
265 * \param config Configuration structure for Timer
266 * \return TRUE on success else FALSE
267 */
268 IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config);
269
270 /** \brief Initializes the configuration structure to default
271 * \param config Configuration structure for Timer
272 * \param ccu6 Pointer to CCU6 module
273 * \return None
274 */
275 IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6);
276
277 /** \} */
278
279 #endif /* IFXCCU6_TIMERWITHTRIGGER_H */
IfxCcu6_TimerWithTrigger_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxCcu6_TimerWithTrigger.h:80
IfxCcu6_TimerWithTrigger::base
IfxCcu6_TimerWithTrigger_Base base
Timer base structure.
Definition: IfxCcu6_TimerWithTrigger.h:72
IfxCcu6_TimerWithTrigger_setPeriod
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxCcu6_TimerWithTrigger.c:289
IfxCcu6_TimerWithTrigger_disableUpdate
IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
Disables the upadte This function is has an empty body as the updated is disabled automatically after...
Definition: IfxCcu6_TimerWithTrigger.c:76
IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the trigger event.
Definition: IfxCcu6_TimerWithTrigger.c:54
IfxCcu6_TimerWithTrigger_Config::serviceReqNrPeriod
IfxCcu6_ServiceRequest serviceReqNrPeriod
Service request used for the period.
Definition: IfxCcu6_TimerWithTrigger.h:83
IfxCcu6_Cout63_Out
COUT63 pin mapping structure.
Definition: IfxCcu6_PinMap.h:159
IfxCcu6_TimerWithTrigger_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxCcu6_TimerWithTrigger.h:63
IfxCcu6_TimerWithTrigger_getPointer
IFX_EXTERN volatile uint32 * IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
Returns the pointer to timer channel.
Definition: IfxCcu6_TimerWithTrigger.c:100
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxCcu6_TimerWithTrigger_getResolution
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
Returns the resolution.
Definition: IfxCcu6_TimerWithTrigger.c:106
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxCcu6_TimerWithTrigger_setSingleMode
IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:299
IfxCcu6_TimerWithTrigger
CCU6 Timer interface.
Definition: IfxCcu6_TimerWithTrigger.h:70
IfxCcu6_TimerWithTrigger_getFrequency
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:82
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:255
IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
Returns the timer event.
Definition: IfxCcu6_TimerWithTrigger.c:38
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu6_TimerWithTrigger_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:62
IfxCcu6_TimerWithTrigger_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxCcu6_TimerWithTrigger.h:60
IfxCcu6_TimerWithTrigger_setTrigger
IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxCcu6_TimerWithTrigger.c:312
IfxCcu6_TimerWithTrigger_getInputFrequency
IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Returns the Input frequncy.
Definition: IfxCcu6_TimerWithTrigger.c:88
IfxCcu6_PinMap.h
CCU6 I/O map.
IfxCcu6.h
CCU6 basic functionality.
IfxCcu6_ServiceRequest
IfxCcu6_ServiceRequest
Selection of service request outputs.
Definition: IfxCcu6.h:213
IfxCcu6_TimerWithTrigger_Base
Structure for the timer base.
Definition: IfxCcu6_TimerWithTrigger.h:58
IfxStdIf_Timer.h
Standard interface: Timer.
IfxCcu6_TimerWithTrigger_run
IFX_EXTERN void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
Runs the timer.
Definition: IfxCcu6_TimerWithTrigger.c:275
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:68
IfxCcu6_TimerWithTrigger_stop
IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
Stops the timer.
Definition: IfxCcu6_TimerWithTrigger.c:347
IfxCcu6_TimerWithTrigger_getPeriod
IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
Returns the period of the timer.
Definition: IfxCcu6_TimerWithTrigger.c:94
IfxCcu6_TimerWithTrigger_initConfig
IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
Initializes the configuration structure to default.
Definition: IfxCcu6_TimerWithTrigger.c:265
IfxCcu6_TimerWithTrigger_Config
Configuration structure for T12 and T13 Timer.
Definition: IfxCcu6_TimerWithTrigger.h:78
IfxCcu6_TimerWithTrigger_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxCcu6_TimerWithTrigger.h:61
IfxCcu6_TimerWithTrigger_Config::serviceReqNrTrigger
IfxCcu6_ServiceRequest serviceReqNrTrigger
Service request used for the Trigger.
Definition: IfxCcu6_TimerWithTrigger.h:84
IfxCcu6_TimerWithTrigger_setFrequency
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
Sets the frequency.
Definition: IfxCcu6_TimerWithTrigger.c:281
IfxCcu6_TimerWithTrigger_applyUpdate
IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
Enable the transfer of the shadow registers.
Definition: IfxCcu6_TimerWithTrigger.c:70
IfxCcu6_TimerWithTrigger_init
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
Initialises the timer object T12 is configured as timer, T13 is optionally configured as trigger T12C...
Definition: IfxCcu6_TimerWithTrigger.c:112
IfxCcu6_TimerWithTrigger_Config::triggerOut
IfxCcu6_Cout63_Out * triggerOut
Definition: IfxCcu6_TimerWithTrigger.h:82
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxCcu6_TimerWithTrigger_stdIfTimerInit
IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
Initializes the standard interface timer.
Definition: IfxCcu6_TimerWithTrigger.c:318
IfxCcu6_TimerWithTrigger_updateInputFrequency
IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
Updates the input frequency.
Definition: IfxCcu6_TimerWithTrigger.c:353
IfxCcu6_TimerWithTrigger::ccu6
Ifx_CCU6 * ccu6
CCU6 module used for the timer functionality.
Definition: IfxCcu6_TimerWithTrigger.h:73


iLLD_TC26B: IfxCcu6_cfg.c Source File

  • _Impl
IfxCcu6_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_cfg.c
3 * \brief CCU6 on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxCcu6_cfg.h"
30
31 /******************************************************************************/
32 /*----------------------------------Macros------------------------------------*/
33 /******************************************************************************/
34
35 #define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)
36
37 /******************************************************************************/
38 /*-----------------------Exported Variables/Constants-------------------------*/
39 /******************************************************************************/
40
41 IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES] = {
42 {&MODULE_CCU60, IfxCcu6_Index_0},
43 {&MODULE_CCU61, IfxCcu6_Index_1}
44 };
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:67
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCcu6_cfg.h
CCU6 on-chip implementation data.
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:49
IfxCcu6_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.c:41
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:66
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123


iLLD_TC26B: IfxCcu6_cfg.h Source File

  • _Impl
IfxCcu6_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCcu6_cfg.h
3 * \brief CCU6 on-chip implementation data
4 * \ingroup IfxLld_Ccu6
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Ccu6 CCU6
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Ccu6_Impl Implementation
27 * \ingroup IfxLld_Ccu6
28 * \defgroup IfxLld_Ccu6_Std Standard Driver
29 * \ingroup IfxLld_Ccu6
30 * \defgroup IfxLld_Ccu6_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Ccu6_Impl
32 */
33
34 #ifndef IFXCCU6_CFG_H
35 #define IFXCCU6_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "IfxCcu6_reg.h"
43 #include "IfxCcu6_bf.h"
44
45 /******************************************************************************/
46 /*-----------------------------------Macros-----------------------------------*/
47 /******************************************************************************/
48
49 #define IFXCCU6_NUM_MODULES (2)
50
51 #define IFXCCU6_NUM_SERVICE_REQUESTS (4)
52
53 #define IFXCCU6_NUM_T12_CHANNELS (3)
54
55 #define IFXCCU6_NUM_T13_CHANNELS (1)
56
57 /******************************************************************************/
58 /*-------------------------------Enumerations---------------------------------*/
59 /******************************************************************************/
60
61 /** \brief List of the available CCU6 resources
62 */
63 typedef enum
64 {
65 IfxCcu6_Index_none = -1, /**< \brief Not Selected */
66 IfxCcu6_Index_0 = 0, /**< \brief CCU6 index 0 */
67 IfxCcu6_Index_1 /**< \brief CCU6 index 1 */
68 } IfxCcu6_Index;
69
70 typedef enum
71 {
72 IfxCcu6_TrigOut_0 = IFX_CCU6_MOSEL_TRIG0SEL_OFF, /**< \brief Output Trigger Select for CCU6061 TRIG0 */
73 IfxCcu6_TrigOut_1 = IFX_CCU6_MOSEL_TRIG1SEL_OFF, /**< \brief Output Trigger Select for CCU6061 TRIG1 */
74 IfxCcu6_TrigOut_2 = IFX_CCU6_MOSEL_TRIG2SEL_OFF /**< \brief Output Trigger Select for CCU6061 TRIG2 */
75 } IfxCcu6_TrigOut;
76
77 typedef enum
78 {
79 IfxCcu6_TrigSel_cout63 = 0,
80 IfxCcu6_TrigSel_cc60 = 1,
81 IfxCcu6_TrigSel_cc61 = 1,
82 IfxCcu6_TrigSel_cc62 = 1,
83 IfxCcu6_TrigSel_sr1 = 2,
84 IfxCcu6_TrigSel_sr3 = 3
85 } IfxCcu6_TrigSel;
86
87 /******************************************************************************/
88 /*-------------------Global Exported Variables/Constants----------------------*/
89 /******************************************************************************/
90
91 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES];
92
93 #endif /* IFXCCU6_CFG_H */
IfxCcu6_Index_none
Not Selected.
Definition: IfxCcu6_cfg.h:65
IfxCcu6_Index
IfxCcu6_Index
List of the available CCU6 resources.
Definition: IfxCcu6_cfg.h:63
IfxCcu6_Index_1
CCU6 index 1.
Definition: IfxCcu6_cfg.h:67
IfxCcu6_TrigOut_2
Output Trigger Select for CCU6061 TRIG2.
Definition: IfxCcu6_cfg.h:74
IfxCcu6_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES]
Definition: IfxCcu6_cfg.h:91
IfxCcu6_TrigSel_sr1
Definition: IfxCcu6_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCcu6_TrigSel_cc62
Definition: IfxCcu6_cfg.h:82
IFXCCU6_NUM_MODULES
#define IFXCCU6_NUM_MODULES
Definition: IfxCcu6_cfg.h:49
IfxCcu6_TrigSel_sr3
Definition: IfxCcu6_cfg.h:84
IfxCcu6_TrigOut_0
Output Trigger Select for CCU6061 TRIG0.
Definition: IfxCcu6_cfg.h:72
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCcu6_TrigSel_cc60
Definition: IfxCcu6_cfg.h:80
IfxCcu6_TrigSel_cc61
Definition: IfxCcu6_cfg.h:81
IfxCcu6_Index_0
CCU6 index 0.
Definition: IfxCcu6_cfg.h:66
IfxCcu6_TrigSel_cout63
Definition: IfxCcu6_cfg.h:79
IfxCcu6_TrigSel
IfxCcu6_TrigSel
Definition: IfxCcu6_cfg.h:77
IfxCcu6_TrigOut_1
Output Trigger Select for CCU6061 TRIG1.
Definition: IfxCcu6_cfg.h:73
IfxCcu6_TrigOut
IfxCcu6_TrigOut
Definition: IfxCcu6_cfg.h:70
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123


iLLD_TC26B: IfxCif.c Source File

  • Cif
  • Std
IfxCif.c
Go to the documentation of this file.
1 /**
2 * \file IfxCif.c
3 * \brief CIF basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxCif.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxCif_clearEpError(IfxCif_EpErrorClearSources source)
36 {
37 if (source == IfxCif_EpErrorClearSources_ExtraPath5SizeError)
38 {
39 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_5_IC_SIZE_ERR_CLR = 1;
40 }
41 else if (source == IfxCif_EpErrorClearSources_ExtraPath4SizeError)
42 {
43 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_4_IC_SIZE_ERR_CLR = 1;
44 }
45 else if (source == IfxCif_EpErrorClearSources_ExtraPath3SizeError)
46 {
47 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_3_IC_SIZE_ERR_CLR = 1;
48 }
49 else if (source == IfxCif_EpErrorClearSources_ExtraPath2SizeError)
50 {
51 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_2_IC_SIZE_ERR_CLR = 1;
52 }
53 else if (source == IfxCif_EpErrorClearSources_ExtraPath1SizeError)
54 {
55 MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_1_IC_SIZE_ERR_CLR = 1;
56 }
57 else
58 {
59 IFXCIF_DEBUG;
60 }
61 }
62
63
64 void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
65 {
66 if (5 > z)
67 {
68 MODULE_CIF.MIEP.ICR.U = (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
69 }
70 else
71 {
72 IFXCIF_DEBUG;
73 }
74 }
75
76
77 void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource)
78 {
79 if (errorSource == IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule)
80 {
81 MODULE_CIF.ISP.ERR_CLR.B.OUTFORM_SIZE_ERR_CLR = 1;
82 }
83 else if (errorSource == IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule)
84 {
85 MODULE_CIF.ISP.ERR_CLR.B.IS_SIZE_ERR_CLR = 1;
86 }
87 else if (errorSource == IfxCif_IspErrorSources_SizeErrorInInformSubmodule)
88 {
89 MODULE_CIF.ISP.ERR_CLR.B.INFORM_SIZE_ERR_CLR = 1;
90 }
91 else
92 {
93 IFXCIF_DEBUG;
94 }
95 }
96
97
98 void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource)
99 {
100 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
101 {
102 MODULE_CIF.ISP.ICR.B.ICR_WD_TRIG = 1;
103 }
104 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
105 {
106 MODULE_CIF.ISP.ICR.B.ICR_H_START = 1;
107 }
108 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
109 {
110 MODULE_CIF.ISP.ICR.B.ICR_V_START = 1;
111 }
112 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
113 {
114 MODULE_CIF.ISP.ICR.B.ICR_FRAME_IN = 1;
115 }
116 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
117 {
118 MODULE_CIF.ISP.ICR.B.ICR_PIC_SIZE_ERR = 1;
119 }
120 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
121 {
122 MODULE_CIF.ISP.ICR.B.ICR_DATA_LOSS = 1;
123 }
124 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
125 {
126 MODULE_CIF.ISP.ICR.B.ICR_FRAME = 1;
127 }
128 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
129 {
130 MODULE_CIF.ISP.ICR.B.ICR_ISP_OFF = 1;
131 }
132 }
133
134
135 void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource)
136 {
137 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
138 {
139 MODULE_CIF.JPE.ERROR_ISR.B.VLC_TABLE_ERR = 1;
140 }
141 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
142 {
143 MODULE_CIF.JPE.ERROR_ISR.B.R2B_IMG_SIZE_ERR = 1;
144 }
145 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
146 {
147 MODULE_CIF.JPE.ERROR_ISR.B.DCT_ERR = 1;
148 }
149 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
150 {
151 MODULE_CIF.JPE.ERROR_ISR.B.VLC_SYMBOL_ERR = 1;
152 }
153 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
154 {
155 MODULE_CIF.JPE.STATUS_ISR.B.GEN_HEADER_DONE = 1;
156 }
157 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
158 {
159 MODULE_CIF.JPE.STATUS_ISR.B.ENCODE_DONE = 1;
160 }
161 else
162 {
163 IFXCIF_DEBUG;
164 }
165 }
166
167
168 void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource)
169 {
170 if (interruptSource == IfxCif_MiInterruptSources_BusError)
171 {
172 MODULE_CIF.MI.ICR.B.BUS_ERROR = 1;
173 }
174 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
175 {
176 MODULE_CIF.MI.ICR.B.WRAP_MP_CR = 1;
177 }
178 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
179 {
180 MODULE_CIF.MI.ICR.B.WRAP_MP_CB = 1;
181 }
182 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
183 {
184 MODULE_CIF.MI.ICR.B.WRAP_MP_Y = 1;
185 }
186 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
187 {
188 MODULE_CIF.MI.ICR.B.FILL_MPY = 1;
189 }
190 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
191 {
192 MODULE_CIF.MI.ICR.B.MBLK_LINE = 1;
193 }
194 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
195 {
196 MODULE_CIF.MI.ICR.B.MP_FRAME_END = 1;
197 }
198 else
199 {
200 IFXCIF_DEBUG;
201 }
202 }
203
204
205 void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source)
206 {
207 if (source == IfxCif_MiStatusClearSources_ExtraPath5FifoFull)
208 {
209 MODULE_CIF.MI.STATUS_CLR.B.EP_5_FIFO_FULL = 1;
210 }
211 else if (source == IfxCif_MiStatusClearSources_ExtraPath4FifoFull)
212 {
213 MODULE_CIF.MI.STATUS_CLR.B.EP_4_FIFO_FULL = 1;
214 }
215 else if (source == IfxCif_MiStatusClearSources_ExtraPath3FifoFull)
216 {
217 MODULE_CIF.MI.STATUS_CLR.B.EP_3_FIFO_FULL = 1;
218 }
219 else if (source == IfxCif_MiStatusClearSources_ExtraPath2FifoFull)
220 {
221 MODULE_CIF.MI.STATUS_CLR.B.EP_2_FIFO_FULL = 1;
222 }
223 else if (source == IfxCif_MiStatusClearSources_ExtraPath1FifoFull)
224 {
225 MODULE_CIF.MI.STATUS_CLR.B.EP_1_FIFO_FULL = 1;
226 }
227 else if (source == IfxCif_MiStatusClearSources_BusWriteError)
228 {
229 MODULE_CIF.MI.STATUS_CLR.B.BUS_WRITE_ERROR = 1;
230 }
231 else if (source == IfxCif_MiStatusClearSources_MainPictureCrFifoFull)
232 {
233 MODULE_CIF.MI.STATUS_CLR.B.MP_CR_FIFO_FULL = 1;
234 }
235 else if (source == IfxCif_MiStatusClearSources_MainPictureCbFifoFull)
236 {
237 MODULE_CIF.MI.STATUS_CLR.B.MP_CB_FIFO_FULL = 1;
238 }
239 else if (source == IfxCif_MiStatusClearSources_MainPictureYFifoFull)
240 {
241 MODULE_CIF.MI.STATUS_CLR.B.MP_Y_FIFO_FULL = 1;
242 }
243 else
244 {
245 IFXCIF_DEBUG;
246 }
247 }
248
249
250 void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource)
251 {
252 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
253 {
254 MODULE_CIF.WD.ICR.B.ICR_WD_VES_TO = 1;
255 }
256 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
257 {
258 MODULE_CIF.WD.ICR.B.ICR_WD_VSE_TO = 1;
259 }
260 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
261 {
262 MODULE_CIF.WD.ICR.B.ICR_WD_HES_TO = 1;
263 }
264 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
265 {
266 MODULE_CIF.WD.ICR.B.ICR_WD_HSE_TO = 1;
267 }
268 else
269 {
270 IFXCIF_DEBUG;
271 }
272 }
273
274
275 void IfxCif_dpResetCounter(IfxCif_DpCounters counter)
276 {
277 if (counter == IfxCif_DpCounters_PredividerCounter)
278 {
279 MODULE_CIF.DP.CTRL.B.RST_PD = 1;
280 }
281 else if (counter == IfxCif_DpCounters_TimestampCounter)
282 {
283 MODULE_CIF.DP.CTRL.B.RST_TSC = 1;
284 }
285 else if (counter == IfxCif_DpCounters_LineNumberCounter)
286 {
287 MODULE_CIF.DP.CTRL.B.RST_LNC = 1;
288 }
289 else if (counter == IfxCif_DpCounters_FrameNumberCounter)
290 {
291 MODULE_CIF.DP.CTRL.B.RST_FNC = 1;
292 }
293 else
294 {
295 IFXCIF_DEBUG;
296 }
297 }
298
299
300 void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
301 {
302 if (5 > z)
303 {
304 Ifx_CIF_MIEP_CH_INIT init;
305 init.U = MODULE_CIF.MIEP.CH_1S[z].INIT.U;
306 init.B.MI_EP_CFG_UPD = 1;
307 MODULE_CIF.MIEP.CH_1S[z].INIT.U = init.U;
308 }
309 else
310 {
311 IFXCIF_DEBUG;
312 }
313 }
314
315
316 void IfxCif_epSkipPicture(IfxCif_ExtraPath z)
317 {
318 if (5 > z)
319 {
320 Ifx_CIF_MIEP_CH_INIT init;
321 init.U = MODULE_CIF.MIEP.CH_1S[z].INIT.U;
322 init.B.MI_EP_SKIP = 1;
323 MODULE_CIF.MIEP.CH_1S[z].INIT.U = init.U;
324 }
325 else
326 {
327 IFXCIF_DEBUG;
328 }
329 }
330
331
332 uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier)
333 {
334 uint16 retValue = 0xffff;
335
336 if (tier == IfxCif_ImageTiers_Horizontal)
337 {
338 retValue = MODULE_CIF.ISP.OUT_H_OFFS_SHD.B.ISP_OUT_H_OFFS_SHD;
339 }
340 else if (tier == IfxCif_ImageTiers_Vertical)
341 {
342 retValue = MODULE_CIF.ISP.OUT_V_OFFS_SHD.B.ISP_OUT_V_OFFS_SHD;
343 }
344 else
345 {
346 IFXCIF_DEBUG;
347 }
348
349 return retValue;
350 }
351
352
353 uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier)
354 {
355 uint16 retValue = 0xffff;
356
357 if (tier == IfxCif_ImageTiers_Horizontal)
358 {
359 retValue = MODULE_CIF.ISP.OUT_H_SIZE_SHD.B.ISP_OUT_H_SIZE_SHD;
360 }
361 else if (tier == IfxCif_ImageTiers_Vertical)
362 {
363 retValue = MODULE_CIF.ISP.OUT_V_SIZE_SHD.B.ISP_OUT_V_SIZE_SHD;
364 }
365 else
366 {
367 IFXCIF_DEBUG;
368 }
369
370 return retValue;
371 }
372
373
374 IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source)
375 {
376 IfxCif_State retValue = IfxCif_State_Disabled;
377
378 if (source == IfxCif_DpControlSources_UserDefinedSymbol8)
379 {
380 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS8;
381 }
382 else if (source == IfxCif_DpControlSources_UserDefinedSymbol7)
383 {
384 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS7;
385 }
386 else if (source == IfxCif_DpControlSources_UserDefinedSymbol6)
387 {
388 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS6;
389 }
390 else if (source == IfxCif_DpControlSources_UserDefinedSymbol5)
391 {
392 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS5;
393 }
394 else if (source == IfxCif_DpControlSources_UserDefinedSymbol4)
395 {
396 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS4;
397 }
398 else if (source == IfxCif_DpControlSources_UserDefinedSymbol3)
399 {
400 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS3;
401 }
402 else if (source == IfxCif_DpControlSources_UserDefinedSymbol2)
403 {
404 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS2;
405 }
406 else if (source == IfxCif_DpControlSources_UserDefinedSymbol1)
407 {
408 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS1;
409 }
410 else if (source == IfxCif_DpControlSources_TimestampCounter)
411 {
412 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.TSC_EN;
413 }
414 else if (source == IfxCif_DpControlSources_LineNumberCounter)
415 {
416 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.LNC_EN;
417 }
418 else if (source == IfxCif_DpControlSources_FrameNumberCounter)
419 {
420 retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.FNC_EN;
421 }
422 else
423 {
424 IFXCIF_DEBUG;
425 }
426
427 return retValue;
428 }
429
430
431 uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter)
432 {
433 uint32 retValue = 0xffffffff;
434
435 if (counter == IfxCif_DpCounters_PredividerCounter)
436 {
437 retValue = MODULE_CIF.DP.PDIV_STAT.B.PDIV_VAL;
438 }
439 else if (counter == IfxCif_DpCounters_TimestampCounter)
440 {
441 retValue = MODULE_CIF.DP.TSC_STAT.B.TSC_VAL;
442 }
443 else if (counter == IfxCif_DpCounters_LineNumberCounter)
444 {
445 retValue = MODULE_CIF.DP.FLC_STAT.B.LNC_VAL;
446 }
447 else if (counter == IfxCif_DpCounters_FrameNumberCounter)
448 {
449 retValue = MODULE_CIF.DP.FLC_STAT.B.FNC_VAL;
450 }
451 else
452 {
453 IFXCIF_DEBUG;
454 }
455
456 return retValue;
457 }
458
459
460 uint16 IfxCif_getDpUserDefinedSymbol(uint8 x)
461 {
462 uint16 retValue = 0xffff;
463
464 if (8 > x)
465 {
466 retValue = MODULE_CIF.DP.UDS_1S[x].B.UDS;
467 }
468 else
469 {
470 IFXCIF_DEBUG;
471 }
472
473 return retValue;
474 }
475
476
477 uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z)
478 {
479 uint32 retValue = 0xffffffff;
480
481 if (5 > z)
482 {
483 /* read base address from unsigned component of the register structure because lower bits are tied
484 * to 0 as base address needs to be a word aligned value */
485 retValue = MODULE_CIF.MIEP.CH_1S[z].BASE_AD_SHD.U;
486 }
487 else
488 {
489 IFXCIF_DEBUG;
490 }
491
492 return retValue;
493 }
494
495
496 uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z)
497 {
498 uint32 retValue = 0xffffffff;
499
500 if (5 > z)
501 {
502 /* read base address from unsigned component of the register structure because lower bits are tied to 0
503 * as base address needs to be a word aligned value */
504 retValue = MODULE_CIF.MIEP.CH_1S[z].BASE_AD_INIT.U;
505 }
506 else
507 {
508 IFXCIF_DEBUG;
509 }
510
511 return retValue;
512 }
513
514
515 uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
516 {
517 uint16 retValue = 0xffff;
518
519 if (5 > z)
520 {
521 if (tier == IfxCif_ImageTiers_Horizontal)
522 {
523 retValue = MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DX;
524 }
525 else if (tier == IfxCif_ImageTiers_Vertical)
526 {
527 retValue = MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DY;
528 }
529 else
530 {
531 IFXCIF_DEBUG;
532 }
533 }
534 else
535 {
536 IFXCIF_DEBUG;
537 }
538
539 return retValue;
540 }
541
542
543 uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
544 {
545 uint16 retValue = 0xffff;
546
547 if (5 > z)
548 {
549 if (tier == IfxCif_ImageTiers_Horizontal)
550 {
551 retValue = MODULE_CIF.EP_IC_1S[z].H_OFFS_SHD.B.H_OFFS_SHD;
552 }
553 else if (tier == IfxCif_ImageTiers_Vertical)
554 {
555 retValue = MODULE_CIF.EP_IC_1S[z].V_OFFS_SHD.B.V_OFFS_SHD;
556 }
557 else
558 {
559 IFXCIF_DEBUG;
560 }
561 }
562 else
563 {
564 IFXCIF_DEBUG;
565 }
566
567 return retValue;
568 }
569
570
571 uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
572 {
573 uint16 retValue = 0xffff;
574
575 if (5 > z)
576 {
577 if (tier == IfxCif_ImageTiers_Horizontal)
578 {
579 retValue = MODULE_CIF.EP_IC_1S[z].H_SIZE_SHD.B.H_SIZE_SHD;
580 }
581 else if (tier == IfxCif_ImageTiers_Vertical)
582 {
583 retValue = MODULE_CIF.EP_IC_1S[z].V_SIZE_SHD.B.V_SIZE_SHD;
584 }
585 else
586 {
587 IFXCIF_DEBUG;
588 }
589 }
590 else
591 {
592 IFXCIF_DEBUG;
593 }
594
595 return retValue;
596 }
597
598
599 IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z)
600 {
601 IfxCif_State retValue = IfxCif_State_Disabled;
602
603 if (5 > z)
604 {
605 retValue = (IfxCif_State)MODULE_CIF.EP_IC_1S[z].CTRL.B.IC_EN;
606 }
607 else
608 {
609 IFXCIF_DEBUG;
610 }
611
612 return retValue;
613 }
614
615
616 uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
617 {
618 uint16 retValue = 0xffff;
619
620 if (5 > z)
621 {
622 if (tier == IfxCif_ImageTiers_Horizontal)
623 {
624 retValue = MODULE_CIF.EP_IC_1S[z].MAX_DX.B.MAX_DX;
625 }
626 else if (tier == IfxCif_ImageTiers_Vertical)
627 {
628 retValue = MODULE_CIF.EP_IC_1S[z].MAX_DY.B.MAX_DY;
629 }
630 else
631 {
632 IFXCIF_DEBUG;
633 }
634 }
635 else
636 {
637 IFXCIF_DEBUG;
638 }
639
640 return retValue;
641 }
642
643
644 uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
645 {
646 uint16 retValue = 0xffff;
647
648 if (5 > z)
649 {
650 if (tier == IfxCif_ImageTiers_Horizontal)
651 {
652 retValue = MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS;
653 }
654 else if (tier == IfxCif_ImageTiers_Vertical)
655 {
656 retValue = MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS;
657 }
658 else
659 {
660 IFXCIF_DEBUG;
661 }
662 }
663 else
664 {
665 IFXCIF_DEBUG;
666 }
667
668 return retValue;
669 }
670
671
672 uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
673 {
674 uint16 retValue = 0xffff;
675
676 if (5 > z)
677 {
678 if (tier == IfxCif_ImageTiers_Horizontal)
679 {
680 retValue = MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE;
681 }
682 else if (tier == IfxCif_ImageTiers_Vertical)
683 {
684 retValue = MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE;
685 }
686 else
687 {
688 IFXCIF_DEBUG;
689 }
690 }
691 else
692 {
693 IFXCIF_DEBUG;
694 }
695
696 return retValue;
697 }
698
699
700 IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z)
701 {
702 IfxCif_State retValue = IfxCif_State_Disabled;
703
704 if (5 > z)
705 {
706 if (0 != MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER)
707 {
708 retValue = IfxCif_State_Enabled;
709 }
710 }
711 else
712 {
713 IFXCIF_DEBUG;
714 }
715
716 return retValue;
717 }
718
719
720 IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source)
721 {
722 IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
723
724 if (source == IfxCif_EpErrorSources_ExtraPath5FifoFull)
725 {
726 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_5_FIFO_FULL;
727 }
728 else if (source == IfxCif_EpErrorSources_ExtraPath4FifoFull)
729 {
730 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_4_FIFO_FULL;
731 }
732 else if (source == IfxCif_EpErrorSources_ExtraPath3FifoFull)
733 {
734 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_3_FIFO_FULL;
735 }
736 else if (source == IfxCif_EpErrorSources_ExtraPath2FifoFull)
737 {
738 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_2_FIFO_FULL;
739 }
740 else if (source == IfxCif_EpErrorSources_ExtraPath1FifoFull)
741 {
742 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_1_FIFO_FULL;
743 }
744 else if (source == IfxCif_EpErrorSources_ExtraPath5SizeError)
745 {
746 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_5_IC_SIZE_ERR;
747 }
748 else if (source == IfxCif_EpErrorSources_ExtraPath4SizeError)
749 {
750 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_4_IC_SIZE_ERR;
751 }
752 else if (source == IfxCif_EpErrorSources_ExtraPath3SizeError)
753 {
754 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_3_IC_SIZE_ERR;
755 }
756 else if (source == IfxCif_EpErrorSources_ExtraPath2SizeError)
757 {
758 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_2_IC_SIZE_ERR;
759 }
760 else if (source == IfxCif_EpErrorSources_ExtraPath1SizeError)
761 {
762 retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_1_IC_SIZE_ERR;
763 }
764 else
765 {
766 IFXCIF_DEBUG;
767 }
768
769 return retValue;
770 }
771
772
773 IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
774 {
775 IfxCif_State retValue = IfxCif_State_Disabled;
776
777 if (5 > z)
778 {
779 if (feature == IfxCif_EpFeatures_InitOffsetCounter)
780 {
781 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_OFFSET_EN;
782 }
783 else if (feature == IfxCif_EpFeatures_InitBaseAddress)
784 {
785 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_BASE_EN;
786 }
787 else if (feature == IfxCif_EpFeatures_ByteSwap)
788 {
789 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.BYTE_SWAP;
790 }
791 else if (feature == IfxCif_EpFeatures_PictureDataPath)
792 {
793 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_ENABLE;
794 }
795 else
796 {
797 IFXCIF_DEBUG;
798 }
799 }
800
801 else
802 {
803 IFXCIF_DEBUG;
804 }
805
806 return retValue;
807 }
808
809
810 uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z)
811 {
812 uint32 retValue = 0xffffffff;
813
814 if (5 > z)
815 {
816 /* read size from unsigned component of the register structure because lower bits are tied to 0
817 * as size needs to be a word aligned value */
818 retValue = MODULE_CIF.MIEP.CH_1S[z].SIZE_INIT.U;
819 }
820 else
821 {
822 IFXCIF_DEBUG;
823 }
824
825 return retValue;
826 }
827
828
829 uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z)
830 {
831 uint32 retValue = 0xffffffff;
832
833 if (5 > z)
834 {
835 /* read interrupt offset from unsigned component of the register structure because lower bits are tied
836 * to 0 as interrupt offset needs to be a word aligned value */
837 retValue = MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_INIT.U;
838 }
839 else
840 {
841 IFXCIF_DEBUG;
842 }
843
844 return retValue;
845 }
846
847
848 uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z)
849 {
850 uint32 retValue = 0xffffffff;
851
852 if (5 > z)
853 {
854 /* read offset counter from unsigned component of the register structure because lower bits are tied
855 * to 0 as offset counter needs to be a word aligned value */
856 retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_INIT.U;
857 }
858 else
859 {
860 IFXCIF_DEBUG;
861 }
862
863 return retValue;
864 }
865
866
867 IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z)
868 {
869 IfxCif_State retValue = IfxCif_State_Disabled;
870
871 if (5 > z)
872 {
873 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL_SHD.B.EP_ENABLE_IN;
874 }
875 else
876 {
877 IFXCIF_DEBUG;
878 }
879
880 return retValue;
881 }
882
883
884 IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
885 {
886 IfxCif_State retValue = IfxCif_State_Disabled;
887
888 if (5 > z)
889 {
890 if (0 !=
891 (MODULE_CIF.MIEP.IMSC.
892 U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
893 {
894 retValue = IfxCif_State_Enabled;
895 }
896 }
897 else
898 {
899 IFXCIF_DEBUG;
900 }
901
902 return retValue;
903 }
904
905
906 uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z)
907 {
908 uint32 retValue = 0xffffffff;
909
910 if (5 > z)
911 {
912 /* read interrupt offset from unsigned component of the register structure because lower bits are tied
913 * to 0 as interrupt offset needs to be a word aligned value */
914 retValue = MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_SHD.U;
915 }
916 else
917 {
918 IFXCIF_DEBUG;
919 }
920
921 return retValue;
922 }
923
924
925 uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z)
926 {
927 uint32 retValue = 0xffffffff;
928
929 if (5 > z)
930 {
931 /* read offset counter from unsigned component of the register structure because lower bits are tied
932 * to 0 as offset counter needs to be a word aligned value */
933 retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_SHD.U;
934 }
935 else
936 {
937 IFXCIF_DEBUG;
938 }
939
940 return retValue;
941 }
942
943
944 uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z)
945 {
946 uint32 retValue = 0xffffffff;
947
948 if (5 > z)
949 {
950 /* read offset counter from unsigned component of the register structure because lower bits are tied
951 * to 0 as offset counter needs to be a word aligned value */
952 retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U;
953 }
954 else
955 {
956 IFXCIF_DEBUG;
957 }
958
959 return retValue;
960 }
961
962
963 IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z)
964 {
965 IfxCif_State retValue = IfxCif_State_Disabled;
966
967 if (5 > z)
968 {
969 retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL_SHD.B.EP_ENABLE_OUT;
970 }
971 else
972 {
973 IFXCIF_DEBUG;
974 }
975
976 return retValue;
977 }
978
979
980 uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z)
981 {
982 uint8 retValue = 0xff;
983
984 if (5 > z)
985 {
986 retValue = MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER;
987 }
988 else
989 {
990 IFXCIF_DEBUG;
991 }
992
993 return retValue;
994 }
995
996
997 uint32 IfxCif_getEpSize(IfxCif_ExtraPath z)
998 {
999 uint32 retValue = 0xffffffff;
1000
1001 if (5 > z)
1002 {
1003 /* read size from unsigned component of the register structure because lower bits are tied
1004 * to 0 as size needs to be a word aligned value */
1005 retValue = MODULE_CIF.MIEP.CH_1S[z].SIZE_SHD.U;
1006 }
1007 else
1008 {
1009 IFXCIF_DEBUG;
1010 }
1011
1012 return retValue;
1013 }
1014
1015
1016 IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z)
1017 {
1018 IfxCif_EpWriteFormat retValue = IfxCif_EpWriteFormat_Raw8Bit;
1019
1020 if (5 > z)
1021 {
1022 retValue = (IfxCif_EpWriteFormat)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_WRITE_FORMAT;
1023 }
1024 else
1025 {
1026 IFXCIF_DEBUG;
1027 }
1028
1029 return retValue;
1030 }
1031
1032
1033 uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table)
1034 {
1035 uint8 retValue = 0xff;
1036
1037 if (table == IfxCif_HuffmanTables_Table0)
1038 {
1039 retValue = MODULE_CIF.JPE.TAC0_LEN.B.TAC0_LEN;
1040 }
1041 else if (table == IfxCif_HuffmanTables_Table1)
1042 {
1043 retValue = MODULE_CIF.JPE.TAC1_LEN.B.TAC1_LEN;
1044 }
1045 else
1046 {
1047 IFXCIF_DEBUG;
1048 }
1049
1050 return retValue;
1051 }
1052
1053
1054 IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
1055 {
1056 IfxCif_State retValue = IfxCif_State_Disabled;
1057
1058 if (table == IfxCif_HuffmanTables_Table0)
1059 {
1060 if (1 != (MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT & ~(1 << component)))
1061 {
1062 retValue = IfxCif_State_Enabled;
1063 }
1064 }
1065 else if (table == IfxCif_HuffmanTables_Table1)
1066 {
1067 if (0 != (MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT & ~(1 << component)))
1068 {
1069 retValue = IfxCif_State_Enabled;
1070 }
1071 }
1072 else
1073 {
1074 IFXCIF_DEBUG;
1075 }
1076
1077 return retValue;
1078 }
1079
1080
1081 uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table)
1082 {
1083 uint8 retValue = 0xff;
1084
1085 if (table == IfxCif_HuffmanTables_Table0)
1086 {
1087 retValue = MODULE_CIF.JPE.TDC0_LEN.B.TDC0_LEN;
1088 }
1089 else if (table == IfxCif_HuffmanTables_Table1)
1090 {
1091 retValue = MODULE_CIF.JPE.TDC1_LEN.B.TDC1_LEN;
1092 }
1093 else
1094 {
1095 IFXCIF_DEBUG;
1096 }
1097
1098 return retValue;
1099 }
1100
1101
1102 IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
1103 {
1104 IfxCif_State retValue = IfxCif_State_Disabled;
1105
1106 if (table == IfxCif_HuffmanTables_Table0)
1107 {
1108 if (1 != (MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT & ~(1 << component)))
1109 {
1110 retValue = IfxCif_State_Enabled;
1111 }
1112 }
1113 else if (table == IfxCif_HuffmanTables_Table1)
1114 {
1115 if (0 != (MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT & ~(1 << component)))
1116 {
1117 retValue = IfxCif_State_Enabled;
1118 }
1119 }
1120 else
1121 {
1122 IFXCIF_DEBUG;
1123 }
1124
1125 return retValue;
1126 }
1127
1128
1129 IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule)
1130 {
1131 IfxCif_State retValue = IfxCif_State_Disabled;
1132
1133 if (submodule == IfxCif_Submodules_Debug)
1134 {
1135 if (0 != MODULE_CIF.ICCL.B.CIF_DEBUG_PATH_CLK_EN)
1136 {
1137 retValue = IfxCif_State_Enabled;
1138 }
1139 }
1140 else if (submodule == IfxCif_Submodules_ExtraPaths)
1141 {
1142 if (0 != MODULE_CIF.ICCL.B.CIF_EXTRA_PATHS_CLK_ENABLE)
1143 {
1144 retValue = IfxCif_State_Enabled;
1145 }
1146 }
1147 else if (submodule == IfxCif_Submodules_LinearDownscaler)
1148 {
1149 if (0 != MODULE_CIF.ICCL.B.CIF_LIN_DSCALER_CLK_ENABLE)
1150 {
1151 retValue = IfxCif_State_Enabled;
1152 }
1153 }
1154 else if (submodule == IfxCif_Submodules_SecurityWatchdog)
1155 {
1156 if (0 != MODULE_CIF.ICCL.B.CIF_WATCHDOG_CLK_ENABLE)
1157 {
1158 retValue = IfxCif_State_Enabled;
1159 }
1160 }
1161
1162 else if (submodule == IfxCif_Submodules_MemoryInterface)
1163 {
1164 if (0 != MODULE_CIF.ICCL.B.CIF_MI_CLK_ENABLE)
1165 {
1166 retValue = IfxCif_State_Enabled;
1167 }
1168 }
1169 else if (submodule == IfxCif_Submodules_JpegEncoder)
1170 {
1171 if (0 != MODULE_CIF.ICCL.B.CIF_JPEG_CLK_ENABLE)
1172 {
1173 retValue = IfxCif_State_Enabled;
1174 }
1175 }
1176 else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
1177 {
1178 if (0 != MODULE_CIF.ICCL.B.CIF_ISP_CLK_ENABLE)
1179 {
1180 retValue = IfxCif_State_Enabled;
1181 }
1182 }
1183 else
1184 {
1185 IFXCIF_DEBUG;
1186 }
1187
1188 return retValue;
1189 }
1190
1191
1192 uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier)
1193 {
1194 uint16 retValue = 0xffff;
1195
1196 if (tier == IfxCif_ImageTiers_Horizontal)
1197 {
1198 retValue = MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS;
1199 }
1200 else if (tier == IfxCif_ImageTiers_Vertical)
1201 {
1202 retValue = MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS;
1203 }
1204 else
1205 {
1206 IFXCIF_DEBUG;
1207 }
1208
1209 return retValue;
1210 }
1211
1212
1213 uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier)
1214 {
1215 uint16 retValue = 0xffff;
1216
1217 if (tier == IfxCif_ImageTiers_Horizontal)
1218 {
1219 retValue = MODULE_CIF.ISP.ACQ_H_SIZE.B.ACQ_H_SIZE;
1220 }
1221 else if (tier == IfxCif_ImageTiers_Vertical)
1222 {
1223 retValue = MODULE_CIF.ISP.ACQ_V_SIZE.B.ACQ_V_SIZE;
1224 }
1225 else
1226 {
1227 IFXCIF_DEBUG;
1228 }
1229
1230 return retValue;
1231 }
1232
1233
1234 IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource)
1235 {
1236 IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
1237
1238 if (errorSource == IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule)
1239 {
1240 if (0 != MODULE_CIF.ISP.ERR.B.OUTFORM_SIZE_ERR)
1241 {
1242 retValue = IfxCif_ErrorState_Error;
1243 }
1244 }
1245 else if (errorSource == IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule)
1246 {
1247 if (0 != MODULE_CIF.ISP.ERR.B.IS_SIZE_ERR)
1248 {
1249 retValue = IfxCif_ErrorState_Error;
1250 }
1251 }
1252 else if (errorSource == IfxCif_IspErrorSources_SizeErrorInInformSubmodule)
1253 {
1254 if (0 != MODULE_CIF.ISP.ERR.B.INFORM_SIZE_ERR)
1255 {
1256 retValue = IfxCif_ErrorState_Error;
1257 }
1258 }
1259 else
1260 {
1261 IFXCIF_DEBUG;
1262 }
1263
1264 return retValue;
1265 }
1266
1267
1268 IfxCif_State IfxCif_getIspInputSelectionAppendState(void)
1269 {
1270 IfxCif_State retValue = IfxCif_State_Disabled;
1271
1272 if (1 != MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP)
1273 {
1274 retValue = IfxCif_State_Enabled;
1275 }
1276 else
1277 {
1278 IFXCIF_DEBUG;
1279 }
1280
1281 return retValue;
1282 }
1283
1284
1285 IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource)
1286 {
1287 IfxCif_State retValue = IfxCif_State_Disabled;
1288
1289 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
1290 {
1291 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_WD_TRIG)
1292 {
1293 retValue = IfxCif_State_Enabled;
1294 }
1295 }
1296 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
1297 {
1298 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_H_START)
1299 {
1300 retValue = IfxCif_State_Enabled;
1301 }
1302 }
1303 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
1304 {
1305 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_V_START)
1306 {
1307 retValue = IfxCif_State_Enabled;
1308 }
1309 }
1310 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
1311 {
1312 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_FRAME_IN)
1313 {
1314 retValue = IfxCif_State_Enabled;
1315 }
1316 }
1317 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
1318 {
1319 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_PIC_SIZE_ERR)
1320 {
1321 retValue = IfxCif_State_Enabled;
1322 }
1323 }
1324 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
1325 {
1326 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_DATA_LOSS)
1327 {
1328 retValue = IfxCif_State_Enabled;
1329 }
1330 }
1331 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
1332 {
1333 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_FRAME)
1334 {
1335 retValue = IfxCif_State_Enabled;
1336 }
1337 }
1338 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
1339 {
1340 if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_ISP_OFF)
1341 {
1342 retValue = IfxCif_State_Enabled;
1343 }
1344 }
1345
1346 return retValue;
1347 }
1348
1349
1350 uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier)
1351 {
1352 uint16 retValue = 0xffff;
1353
1354 if (tier == IfxCif_ImageTiers_Horizontal)
1355 {
1356 retValue = MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS;
1357 }
1358 else if (tier == IfxCif_ImageTiers_Vertical)
1359 {
1360 retValue = MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS;
1361 }
1362 else
1363 {
1364 IFXCIF_DEBUG;
1365 }
1366
1367 return retValue;
1368 }
1369
1370
1371 uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier)
1372 {
1373 uint16 retValue = 0xffff;
1374
1375 if (tier == IfxCif_ImageTiers_Horizontal)
1376 {
1377 retValue = MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE;
1378 }
1379 else if (tier == IfxCif_ImageTiers_Vertical)
1380 {
1381 retValue = MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE;
1382 }
1383 else
1384 {
1385 IFXCIF_DEBUG;
1386 }
1387
1388 return retValue;
1389 }
1390
1391
1392 uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier)
1393 {
1394 uint16 retValue = 0xffff;
1395
1396 if (tier == IfxCif_ImageTiers_Horizontal)
1397 {
1398 retValue = MODULE_CIF.ISPIS.DISPLACE.B.DX;
1399 }
1400 else if (tier == IfxCif_ImageTiers_Vertical)
1401 {
1402 retValue = MODULE_CIF.ISPIS.DISPLACE.B.DY;
1403 }
1404 else
1405 {
1406 IFXCIF_DEBUG;
1407 }
1408
1409 return retValue;
1410 }
1411
1412
1413 uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier)
1414 {
1415 uint16 retValue = 0xffff;
1416
1417 if (tier == IfxCif_ImageTiers_Horizontal)
1418 {
1419 retValue = MODULE_CIF.ISPIS.H_OFFS_SHD.B.IS_H_OFFS_SHD;
1420 }
1421 else if (tier == IfxCif_ImageTiers_Vertical)
1422 {
1423 retValue = MODULE_CIF.ISPIS.V_OFFS_SHD.B.IS_V_OFFS_SHD;
1424 }
1425 else
1426 {
1427 IFXCIF_DEBUG;
1428 }
1429
1430 return retValue;
1431 }
1432
1433
1434 uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier)
1435 {
1436 uint16 retValue = 0xffff;
1437
1438 if (tier == IfxCif_ImageTiers_Horizontal)
1439 {
1440 retValue = MODULE_CIF.ISPIS.H_SIZE_SHD.B.ISP_H_SIZE_SHD;
1441 }
1442 else if (tier == IfxCif_ImageTiers_Vertical)
1443 {
1444 retValue = MODULE_CIF.ISPIS.V_SIZE_SHD.B.ISP_V_SIZE_SHD;
1445 }
1446 else
1447 {
1448 IFXCIF_DEBUG;
1449 }
1450
1451 return retValue;
1452 }
1453
1454
1455 uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier)
1456 {
1457 uint16 retValue = 0xffff;
1458
1459 if (tier == IfxCif_ImageTiers_Horizontal)
1460 {
1461 retValue = MODULE_CIF.ISPIS.MAX_DX.B.IS_MAX_DX;
1462 }
1463 else if (tier == IfxCif_ImageTiers_Vertical)
1464 {
1465 retValue = MODULE_CIF.ISPIS.MAX_DY.B.IS_MAX_DY;
1466 }
1467 else
1468 {
1469 IFXCIF_DEBUG;
1470 }
1471
1472 return retValue;
1473 }
1474
1475
1476 uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier)
1477 {
1478 uint16 retValue = 0xffff;
1479
1480 if (tier == IfxCif_ImageTiers_Horizontal)
1481 {
1482 retValue = MODULE_CIF.ISPIS.H_OFFS.B.IS_H_OFFS;
1483 }
1484 else if (tier == IfxCif_ImageTiers_Vertical)
1485 {
1486 retValue = MODULE_CIF.ISPIS.V_OFFS.B.IS_V_OFFS;
1487 }
1488 else
1489 {
1490 IFXCIF_DEBUG;
1491 }
1492
1493 return retValue;
1494 }
1495
1496
1497 uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier)
1498 {
1499 uint16 retValue = 0xffff;
1500
1501 if (tier == IfxCif_ImageTiers_Horizontal)
1502 {
1503 retValue = MODULE_CIF.ISPIS.H_SIZE.B.IS_H_SIZE;
1504 }
1505 else if (tier == IfxCif_ImageTiers_Vertical)
1506 {
1507 retValue = MODULE_CIF.ISPIS.V_SIZE.B.IS_V_SIZE;
1508 }
1509 else
1510 {
1511 IFXCIF_DEBUG;
1512 }
1513
1514 return retValue;
1515 }
1516
1517
1518 IfxCif_State IfxCif_getIspisRecenterEnableState(void)
1519 {
1520 IfxCif_State retValue = IfxCif_State_Disabled;
1521
1522 if (0 != MODULE_CIF.ISPIS.RECENTER.B.RECENTER)
1523 {
1524 retValue = IfxCif_State_Enabled;
1525 }
1526
1527 return retValue;
1528 }
1529
1530
1531 IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source)
1532 {
1533 IfxCif_JpeDebugSignalState retValue = IfxCif_JpeDebugSignalState_Inactive;
1534
1535 if (source == IfxCif_JpeDebugSignalSources_BadTableAccess)
1536 {
1537 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_BAD_TABLE_ACCESS;
1538 }
1539 else if (source == IfxCif_JpeDebugSignalSources_VlcTableBusy)
1540 {
1541 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_VLC_TABLE_BUSY;
1542 }
1543 else if (source == IfxCif_JpeDebugSignalSources_R2BMemoryFull)
1544 {
1545 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_R2B_MEMORY_FULL;
1546 }
1547 else if (source == IfxCif_JpeDebugSignalSources_VlcEncodeBusy)
1548 {
1549 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_VLC_ENCODE_BUSY;
1550 }
1551 else if (source == IfxCif_JpeDebugSignalSources_QiqTableAccess)
1552 {
1553 retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_QIQ_TABLE_ACC;
1554 }
1555 else
1556 {
1557 IFXCIF_DEBUG;
1558 }
1559
1560 return retValue;
1561 }
1562
1563
1564 IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource)
1565 {
1566 IfxCif_State retValue = IfxCif_State_Disabled;
1567
1568 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
1569 {
1570 retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.VLC_TABLE_ERR;
1571 }
1572 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
1573 {
1574 retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.R2B_IMG_SIZE_ERR;
1575 }
1576 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
1577 {
1578 retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.DCT_ERR;
1579 }
1580 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
1581 {
1582 retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.VLC_SYMBOL_ERR;
1583 }
1584 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
1585 {
1586 retValue = (IfxCif_State)MODULE_CIF.JPE.STATUS_IMR.B.GEN_HEADER_DONE;
1587 }
1588 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
1589 {
1590 retValue = (IfxCif_State)MODULE_CIF.JPE.STATUS_IMR.B.ENCODE_DONE;
1591 }
1592 else
1593 {
1594 IFXCIF_DEBUG;
1595 }
1596
1597 return retValue;
1598 }
1599
1600
1601 IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component)
1602 {
1603 IfxCif_JpeQTableSelector retValue = IfxCif_JpeQTableSelector_Table0;
1604
1605 if (component == IfxCif_JpeQTableSelectorComponents_Y)
1606 {
1607 retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_Y_SELECT.B.TQ0_SELECT;
1608 }
1609 else if (component == IfxCif_JpeQTableSelectorComponents_U)
1610 {
1611 retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_U_SELECT.B.TQ1_SELECT;
1612 }
1613 else if (component == IfxCif_JpeQTableSelectorComponents_V)
1614 {
1615 retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_V_SELECT.B.TQ2_SELECT;
1616 }
1617 else
1618 {
1619 IFXCIF_DEBUG;
1620 }
1621
1622 return retValue;
1623 }
1624
1625
1626 IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source)
1627 {
1628 IfxCif_State retValue = IfxCif_State_Disabled;
1629
1630 if (source == IfxCif_JpeScalingValueSources_Y)
1631 {
1632 retValue = (IfxCif_State)MODULE_CIF.JPE.Y_SCALE_EN.B.Y_SCALE_EN;
1633 }
1634 else if (source == IfxCif_JpeScalingValueSources_CbCr)
1635 {
1636 retValue = (IfxCif_State)MODULE_CIF.JPE.CBCR_SCALE_EN.B.CBCR_SCALE_EN;
1637 }
1638 else
1639 {
1640 IFXCIF_DEBUG;
1641 }
1642
1643 return retValue;
1644 }
1645
1646
1647 uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier)
1648 {
1649 uint16 retValue = 0xffff;
1650
1651 if (tier == IfxCif_ImageTiers_Horizontal)
1652 {
1653 retValue = MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE;
1654 }
1655 else if (tier == IfxCif_ImageTiers_Vertical)
1656 {
1657 retValue = MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE;
1658 }
1659 else
1660 {
1661 IFXCIF_DEBUG;
1662 }
1663
1664 return retValue;
1665 }
1666
1667
1668 IfxCif_State IfxCif_getKernelResetRequestState(void)
1669 {
1670 IfxCif_State retValue = IfxCif_State_Disabled;
1671
1672 if ((0 != MODULE_CIF.BBB.KRST0.B.RST) && (0 != MODULE_CIF.BBB.KRST1.B.RST))
1673 {
1674 retValue = IfxCif_State_Enabled;
1675 }
1676
1677 return retValue;
1678 }
1679
1680
1681 IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier)
1682 {
1683 IfxCif_State retValue = IfxCif_State_Disabled;
1684
1685 if (tier == IfxCif_ImageTiers_Horizontal)
1686 {
1687 retValue = (IfxCif_State)MODULE_CIF.LDS.CTRL.B.LDS_H_EN;
1688 }
1689 else if (tier == IfxCif_ImageTiers_Vertical)
1690 {
1691 retValue = (IfxCif_State)MODULE_CIF.LDS.CTRL.B.LDS_V_EN;
1692 }
1693 else
1694 {
1695 IFXCIF_DEBUG;
1696 }
1697
1698 return retValue;
1699 }
1700
1701
1702 uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier)
1703 {
1704 uint8 retValue = 0xff;
1705
1706 if (tier == IfxCif_ImageTiers_Horizontal)
1707 {
1708 retValue = MODULE_CIF.LDS.FAC.B.LDS_H_FAC;
1709 }
1710 else if (tier == IfxCif_ImageTiers_Vertical)
1711 {
1712 retValue = MODULE_CIF.LDS.FAC.B.LDS_V_FAC;
1713 }
1714 else
1715 {
1716 IFXCIF_DEBUG;
1717 }
1718
1719 return retValue;
1720 }
1721
1722
1723 IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier)
1724 {
1725 IfxCif_LinearDownscalerScalingMode retValue = IfxCif_LinearDownscalerScalingMode_SingleSkip;
1726
1727 if (tier == IfxCif_ImageTiers_Horizontal)
1728 {
1729 retValue = (IfxCif_LinearDownscalerScalingMode)MODULE_CIF.LDS.CTRL.B.LDS_H_MODE;
1730 }
1731 else if (tier == IfxCif_ImageTiers_Vertical)
1732 {
1733 retValue = (IfxCif_LinearDownscalerScalingMode)MODULE_CIF.LDS.CTRL.B.LDS_V_MODE;
1734 }
1735 else
1736 {
1737 IFXCIF_DEBUG;
1738 }
1739
1740 return retValue;
1741 }
1742
1743
1744 uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component)
1745 {
1746 uint32 retValue = 0xffffffff;
1747
1748 /* read base address from unsigned component of the register structure because lower bits are tied to 0
1749 * as base address needs to be a word aligned value */
1750 if (component == IfxCif_MiMainPicturePathComponents_Y)
1751 {
1752 retValue = MODULE_CIF.MI.MP_Y_BASE_AD_INIT.U;
1753 }
1754 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
1755 {
1756 retValue = MODULE_CIF.MI.MP_CB_BASE_AD_INIT.U;
1757 }
1758 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
1759 {
1760 retValue = MODULE_CIF.MI.MP_CR_BASE_AD_INIT.U;
1761 }
1762 else
1763 {
1764 IFXCIF_DEBUG;
1765 }
1766
1767 return retValue;
1768 }
1769
1770
1771 IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
1772 {
1773 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1774
1775 if (5 > z)
1776 {
1777 if (0 !=
1778 (MODULE_CIF.MIEP.MIS.
1779 U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
1780 {
1781 retValue = IfxCif_InterruptTriggeredState_Triggered;
1782 }
1783 else
1784 {}
1785 }
1786 else
1787 {
1788 IFXCIF_DEBUG;
1789 }
1790
1791 return retValue;
1792 }
1793
1794
1795 IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
1796 {
1797 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1798
1799 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
1800 {
1801 if (0 != MODULE_CIF.ISP.MIS.B.MIS_WD_TRIG)
1802 {
1803 retValue = IfxCif_InterruptTriggeredState_Triggered;
1804 }
1805 }
1806 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
1807 {
1808 if (0 != MODULE_CIF.ISP.MIS.B.MIS_H_START)
1809 {
1810 retValue = IfxCif_InterruptTriggeredState_Triggered;
1811 }
1812 }
1813 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
1814 {
1815 if (0 != MODULE_CIF.ISP.MIS.B.MIS_V_START)
1816 {
1817 retValue = IfxCif_InterruptTriggeredState_Triggered;
1818 }
1819 }
1820 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
1821 {
1822 if (0 != MODULE_CIF.ISP.MIS.B.MIS_FRAME_IN)
1823 {
1824 retValue = IfxCif_InterruptTriggeredState_Triggered;
1825 }
1826 }
1827 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
1828 {
1829 if (0 != MODULE_CIF.ISP.MIS.B.MIS_PIC_SIZE_ERR)
1830 {
1831 retValue = IfxCif_InterruptTriggeredState_Triggered;
1832 }
1833 }
1834 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
1835 {
1836 if (0 != MODULE_CIF.ISP.MIS.B.MIS_DATA_LOSS)
1837 {
1838 retValue = IfxCif_InterruptTriggeredState_Triggered;
1839 }
1840 }
1841 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
1842 {
1843 if (0 != MODULE_CIF.ISP.MIS.B.MIS_FRAME)
1844 {
1845 retValue = IfxCif_InterruptTriggeredState_Triggered;
1846 }
1847 }
1848 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
1849 {
1850 if (0 != MODULE_CIF.ISP.MIS.B.MIS_ISP_OFF)
1851 {
1852 retValue = IfxCif_InterruptTriggeredState_Triggered;
1853 }
1854 }
1855 else
1856 {
1857 IFXCIF_DEBUG;
1858 }
1859
1860 return retValue;
1861 }
1862
1863
1864 IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
1865 {
1866 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1867
1868 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
1869 {
1870 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.VLC_TABLE_ERR;
1871 }
1872 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
1873 {
1874 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.R2B_IMG_SIZE_ERR;
1875 }
1876 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
1877 {
1878 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.DCT_ERR;
1879 }
1880 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
1881 {
1882 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.VLC_SYMBOL_ERR;
1883 }
1884 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
1885 {
1886 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_MIS.B.GEN_HEADER_DONE;
1887 }
1888 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
1889 {
1890 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_MIS.B.ENCODE_DONE;
1891 }
1892 else
1893 {
1894 IFXCIF_DEBUG;
1895 }
1896
1897 return retValue;
1898 }
1899
1900
1901 IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
1902 {
1903 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1904
1905 if (interruptSource == IfxCif_MiInterruptSources_BusError)
1906 {
1907 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.BUS_ERROR;
1908 }
1909 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
1910 {
1911 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_CR;
1912 }
1913 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
1914 {
1915 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_CB;
1916 }
1917 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
1918 {
1919 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_Y;
1920 }
1921 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
1922 {
1923 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.FILL_MP_Y;
1924 }
1925 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
1926 {
1927 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.MBLK_LINE;
1928 }
1929 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
1930 {
1931 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.MP_FRAME_END;
1932 }
1933 else
1934 {
1935 IFXCIF_DEBUG;
1936 }
1937
1938 return retValue;
1939 }
1940
1941
1942 IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
1943 {
1944 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
1945
1946 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
1947 {
1948 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_VES_TO;
1949 }
1950 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
1951 {
1952 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_VSE_TO;
1953 }
1954 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
1955 {
1956 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_HES_TO;
1957 }
1958 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
1959 {
1960 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_HSE_TO;
1961 }
1962 else
1963 {
1964 IFXCIF_DEBUG;
1965 }
1966
1967 return retValue;
1968 }
1969
1970
1971 IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath)
1972 {
1973 IfxCif_State retValue = IfxCif_State_Disabled;
1974
1975 if (dataPath == IfxCif_MiDataPaths_RawData)
1976 {
1977 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.RAW_ENABLE_IN;
1978 }
1979 else if (dataPath == IfxCif_MiDataPaths_JpegData)
1980 {
1981 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.JPEG_ENABLE_IN;
1982 }
1983 else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
1984 {
1985 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.MP_ENABLE_IN;
1986 }
1987 else
1988 {
1989 IFXCIF_DEBUG;
1990 }
1991
1992 return retValue;
1993 }
1994
1995
1996 IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath)
1997 {
1998 IfxCif_State retValue = IfxCif_State_Disabled;
1999
2000 if (dataPath == IfxCif_MiDataPaths_RawData)
2001 {
2002 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.RAW_ENABLE_OUT;
2003 }
2004 else if (dataPath == IfxCif_MiDataPaths_JpegData)
2005 {
2006 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.JPEG_ENABLE_OUT;
2007 }
2008 else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
2009 {
2010 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.MP_ENABLE_OUT;
2011 }
2012 else
2013 {
2014 IFXCIF_DEBUG;
2015 }
2016
2017 return retValue;
2018 }
2019
2020
2021 IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath)
2022 {
2023 IfxCif_State retValue = IfxCif_State_Disabled;
2024
2025 if (dataPath == IfxCif_MiDataPaths_RawData)
2026 {
2027 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.RAW_ENABLE;
2028 }
2029 else if (dataPath == IfxCif_MiDataPaths_JpegData)
2030 {
2031 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.JPEG_ENABLE;
2032 }
2033 else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
2034 {
2035 retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.MP_ENABLE;
2036 }
2037 else
2038 {
2039 IFXCIF_DEBUG;
2040 }
2041
2042 return retValue;
2043 }
2044
2045
2046 IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource)
2047 {
2048 IfxCif_State retValue = IfxCif_State_Disabled;
2049
2050 if (interruptSource == IfxCif_MiInterruptSources_BusError)
2051 {
2052 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.BUS_ERROR;
2053 }
2054 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
2055 {
2056 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_CR;
2057 }
2058 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
2059 {
2060 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_CB;
2061 }
2062 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
2063 {
2064 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_Y;
2065 }
2066 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
2067 {
2068 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.FILL_MP_Y;
2069 }
2070 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
2071 {
2072 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.MBLK_LINE;
2073 }
2074 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
2075 {
2076 retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.MP_FRAME_END;
2077 }
2078 else
2079 {
2080 IFXCIF_DEBUG;
2081 }
2082
2083 return retValue;
2084 }
2085
2086
2087 uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component)
2088 {
2089 uint32 retValue = 0xffffffff;
2090
2091 if (component == IfxCif_MiMainPicturePathComponents_Y)
2092 {
2093 retValue = MODULE_CIF.MI.MP_Y_BASE_AD_SHD.B.MP_Y_BASE_AD;
2094 }
2095 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2096 {
2097 retValue = MODULE_CIF.MI.MP_CB_BASE_AD_SHD.B.MP_CB_BASE_AD;
2098 }
2099 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2100 {
2101 retValue = MODULE_CIF.MI.MP_CR_BASE_AD_SHD.B.MP_CR_BASE_AD;
2102 }
2103 else
2104 {
2105 IFXCIF_DEBUG;
2106 }
2107
2108 return retValue;
2109 }
2110
2111
2112 uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component)
2113 {
2114 uint32 retValue = 0xffffffff;
2115
2116 /* read size from unsigned component of the register structure because lower bits are tied to 0
2117 * as size needs to be a word aligned value */
2118 if (component == IfxCif_MiMainPicturePathComponents_Y)
2119 {
2120 retValue = MODULE_CIF.MI.MP_Y_SIZE_INIT.U;
2121 }
2122 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2123 {
2124 retValue = MODULE_CIF.MI.MP_CB_SIZE_INIT.U;
2125 }
2126 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2127 {
2128 retValue = MODULE_CIF.MI.MP_CR_SIZE_INIT.U;
2129 }
2130 else
2131 {
2132 IFXCIF_DEBUG;
2133 }
2134
2135 return retValue;
2136 }
2137
2138
2139 uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component)
2140 {
2141 uint32 retValue = 0xffffffff;
2142
2143 /* read offset counter from unsigned component of the register structure because lower bits are tied to 0
2144 * as offset counter needs to be a word aligned value */
2145 if (component == IfxCif_MiMainPicturePathComponents_Y)
2146 {
2147 retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_INIT.U;
2148 }
2149 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2150 {
2151 retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_INIT.U;
2152 }
2153 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2154 {
2155 retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_INIT.U;
2156 }
2157 else
2158 {
2159 IFXCIF_DEBUG;
2160 }
2161
2162 return retValue;
2163 }
2164
2165
2166 uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component)
2167 {
2168 uint32 retValue = 0xffffffff;
2169
2170 if (component == IfxCif_MiMainPicturePathComponents_Y)
2171 {
2172 retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.B.MP_Y_OFFS_CNT;
2173 }
2174 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2175 {
2176 retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_SHD.B.MP_CB_OFFS_CNT;
2177 }
2178 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2179 {
2180 retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_SHD.B.MP_CR_OFFS_CNT;
2181 }
2182 else
2183 {
2184 IFXCIF_DEBUG;
2185 }
2186
2187 return retValue;
2188 }
2189
2190
2191 uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component)
2192 {
2193 uint32 retValue = 0xffffffff;
2194
2195 /* read offset counter from unsigned component of the register structure because lower bits are tied to 0
2196 * as offset counter needs to be a word aligned value */
2197 if (component == IfxCif_MiMainPicturePathComponents_Y)
2198 {
2199 retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U;
2200 }
2201 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2202 {
2203 retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_START.U;
2204 }
2205 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2206 {
2207 retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_START.U;
2208 }
2209 else
2210 {
2211 IFXCIF_DEBUG;
2212 }
2213
2214 return retValue;
2215 }
2216
2217
2218 uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component)
2219 {
2220 uint32 retValue = 0xffffffff;
2221
2222 if (component == IfxCif_MiMainPicturePathComponents_Y)
2223 {
2224 retValue = MODULE_CIF.MI.MP_Y_SIZE_SHD.B.MP_Y_SIZE;
2225 }
2226 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
2227 {
2228 retValue = MODULE_CIF.MI.MP_CB_SIZE_SHD.B.MP_CB_SIZE;
2229 }
2230 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
2231 {
2232 retValue = MODULE_CIF.MI.MP_CR_SIZE_SHD.B.MP_CR_SIZE;
2233 }
2234 else
2235 {
2236 IFXCIF_DEBUG;
2237 }
2238
2239 return retValue;
2240 }
2241
2242
2243 IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source)
2244 {
2245 IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
2246
2247 if (source == IfxCif_MiStatusInformationSources_BusWriteError)
2248 {
2249 retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.BUS_WRITE_ERROR;
2250 }
2251 else if (source == IfxCif_MiStatusInformationSources_MainPictureCrFifoFull)
2252 {
2253 retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_CR_FIFO_FULL;
2254 }
2255 else if (source == IfxCif_MiStatusInformationSources_MainPictureCbFifoFull)
2256 {
2257 retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_CB_FIFO_FULL;
2258 }
2259 else if (source == IfxCif_MiStatusInformationSources_MainPictureYFifoFull)
2260 {
2261 retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_Y_FIFO_FULL;
2262 }
2263 else
2264 {
2265 IFXCIF_DEBUG;
2266 }
2267
2268 return retValue;
2269 }
2270
2271
2272 IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
2273 {
2274 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2275
2276 if (5 > z)
2277 {
2278 if (0 !=
2279 (MODULE_CIF.MIEP.RIS.
2280 U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
2281 {
2282 retValue = IfxCif_InterruptTriggeredState_Triggered;
2283 }
2284 }
2285 else
2286 {
2287 IFXCIF_DEBUG;
2288 }
2289
2290 return retValue;
2291 }
2292
2293
2294 IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
2295 {
2296 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2297
2298 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
2299 {
2300 if (0 != MODULE_CIF.ISP.RIS.B.RIS_WD_TRIG)
2301 {
2302 retValue = IfxCif_InterruptTriggeredState_Triggered;
2303 }
2304 }
2305 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
2306 {
2307 if (0 != MODULE_CIF.ISP.RIS.B.RIS_H_START)
2308 {
2309 retValue = IfxCif_InterruptTriggeredState_Triggered;
2310 }
2311 }
2312 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
2313 {
2314 if (0 != MODULE_CIF.ISP.RIS.B.RIS_V_START)
2315 {
2316 retValue = IfxCif_InterruptTriggeredState_Triggered;
2317 }
2318 }
2319 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
2320 {
2321 if (0 != MODULE_CIF.ISP.RIS.B.RIS_FRAME_IN)
2322 {
2323 retValue = IfxCif_InterruptTriggeredState_Triggered;
2324 }
2325 }
2326 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
2327 {
2328 if (0 != MODULE_CIF.ISP.RIS.B.RIS_PIC_SIZE_ERR)
2329 {
2330 retValue = IfxCif_InterruptTriggeredState_Triggered;
2331 }
2332 }
2333 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
2334 {
2335 if (0 != MODULE_CIF.ISP.RIS.B.RIS_DATA_LOSS)
2336 {
2337 retValue = IfxCif_InterruptTriggeredState_Triggered;
2338 }
2339 }
2340 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
2341 {
2342 if (0 != MODULE_CIF.ISP.RIS.B.RIS_FRAME)
2343 {
2344 retValue = IfxCif_InterruptTriggeredState_Triggered;
2345 }
2346 }
2347 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
2348 {
2349 if (0 != MODULE_CIF.ISP.RIS.B.RIS_ISP_OFF)
2350 {
2351 retValue = IfxCif_InterruptTriggeredState_Triggered;
2352 }
2353 }
2354
2355 return retValue;
2356 }
2357
2358
2359 IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
2360 {
2361 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2362
2363 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
2364 {
2365 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.VLC_TABLE_ERR;
2366 }
2367 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
2368 {
2369 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.R2B_IMG_SIZE_ERR;
2370 }
2371 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
2372 {
2373 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.DCT_ERR;
2374 }
2375 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
2376 {
2377 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.VLC_SYMBOL_ERR;
2378 }
2379 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
2380 {
2381 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_RIS.B.GEN_HEADER_DONE;
2382 }
2383 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
2384 {
2385 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_RIS.B.ENCODE_DONE;
2386 }
2387 else
2388 {
2389 IFXCIF_DEBUG;
2390 }
2391
2392 return retValue;
2393 }
2394
2395
2396 IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
2397 {
2398 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2399
2400 if (interruptSource == IfxCif_MiInterruptSources_BusError)
2401 {
2402 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.BUS_ERROR;
2403 }
2404 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
2405 {
2406 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_CR;
2407 }
2408 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
2409 {
2410 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_CB;
2411 }
2412 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
2413 {
2414 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_Y;
2415 }
2416 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
2417 {
2418 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.FILL_MP_Y;
2419 }
2420 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
2421 {
2422 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.MBLK_LINE;
2423 }
2424 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
2425 {
2426 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.MP_FRAME_END;
2427 }
2428 else
2429 {
2430 IFXCIF_DEBUG;
2431 }
2432
2433 return retValue;
2434 }
2435
2436
2437 IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
2438 {
2439 IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
2440
2441 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
2442 {
2443 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_VES_TO;
2444 }
2445 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
2446 {
2447 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_VSE_TO;
2448 }
2449 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
2450 {
2451 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_HES_TO;
2452 }
2453 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
2454 {
2455 retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_HSE_TO;
2456 }
2457 else
2458 {
2459 IFXCIF_DEBUG;
2460 }
2461
2462 return retValue;
2463 }
2464
2465
2466 IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
2467 {
2468 IfxCif_State retValue = IfxCif_State_Disabled;
2469
2470 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
2471 {
2472 retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_VES_TO;
2473 }
2474 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
2475 {
2476 retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_VSE_TO;
2477 }
2478 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
2479 {
2480 retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_HES_TO;
2481 }
2482 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
2483 {
2484 retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_HSE_TO;
2485 }
2486 else
2487 {
2488 IFXCIF_DEBUG;
2489 }
2490
2491 return retValue;
2492 }
2493
2494
2495 uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
2496 {
2497 uint16 retValue = 0xffff;
2498
2499 if (tier == IfxCif_ImageTiers_Horizontal)
2500 {
2501 if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
2502 {
2503 retValue = MODULE_CIF.WD.H_TIMEOUT.B.WD_HES_TO;
2504 }
2505 else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
2506 {
2507 retValue = MODULE_CIF.WD.H_TIMEOUT.B.WD_HSE_TO;
2508 }
2509 else
2510 {
2511 IFXCIF_DEBUG;
2512 }
2513 }
2514 else if (tier == IfxCif_ImageTiers_Vertical)
2515 {
2516 if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
2517 {
2518 retValue = MODULE_CIF.WD.V_TIMEOUT.B.WD_VES_TO;
2519 }
2520 else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
2521 {
2522 retValue = MODULE_CIF.WD.V_TIMEOUT.B.WD_VSE_TO;
2523 }
2524 else
2525 {
2526 IFXCIF_DEBUG;
2527 }
2528 }
2529 else
2530 {
2531 IFXCIF_DEBUG;
2532 }
2533
2534 return retValue;
2535 }
2536
2537
2538 IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule)
2539 {
2540 IfxCif_State retValue = IfxCif_State_Disabled;
2541
2542 if (submodule == IfxCif_Submodules_AllModules)
2543 {
2544 if (0 != MODULE_CIF.IRCL.B.CIF_GLOBAL_RST)
2545 {
2546 retValue = IfxCif_State_Enabled;
2547 }
2548 }
2549 else if (submodule == IfxCif_Submodules_Debug)
2550 {
2551 if (0 != MODULE_CIF.IRCL.B.CIF_DEBUG_PATH_RST)
2552 {
2553 retValue = IfxCif_State_Enabled;
2554 }
2555 }
2556 else if (submodule == IfxCif_Submodules_ExtraPaths)
2557 {
2558 if (0 != MODULE_CIF.IRCL.B.CIF_EXTRA_PATHS_RST)
2559 {
2560 retValue = IfxCif_State_Enabled;
2561 }
2562 }
2563 else if (submodule == IfxCif_Submodules_LinearDownscaler)
2564 {
2565 if (0 != MODULE_CIF.IRCL.B.CIF_LIN_DSCALER_RST)
2566 {
2567 retValue = IfxCif_State_Enabled;
2568 }
2569 }
2570 else if (submodule == IfxCif_Submodules_SecurityWatchdog)
2571 {
2572 if (0 != MODULE_CIF.IRCL.B.CIF_WATCHDOG_RST)
2573 {
2574 retValue = IfxCif_State_Enabled;
2575 }
2576 }
2577 else if (submodule == IfxCif_Submodules_MemoryInterface)
2578 {
2579 if (0 != MODULE_CIF.IRCL.B.CIF_MI_SOFT_RST)
2580 {
2581 retValue = IfxCif_State_Enabled;
2582 }
2583 }
2584 else if (submodule == IfxCif_Submodules_JpegEncoder)
2585 {
2586 if (0 != MODULE_CIF.IRCL.B.CIF_JPEG_SOFT_RST)
2587 {
2588 retValue = IfxCif_State_Enabled;
2589 }
2590 }
2591 else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
2592 {
2593 if (0 != MODULE_CIF.IRCL.B.CIF_ISP_SOFT_RST)
2594 {
2595 retValue = IfxCif_State_Enabled;
2596 }
2597 }
2598 else if (submodule == IfxCif_Submodules_YCSplitter)
2599 {
2600 if (0 != MODULE_CIF.IRCL.B.CIF_YCS_SOFT_RST)
2601 {
2602 retValue = IfxCif_State_Enabled;
2603 }
2604 }
2605 else
2606 {
2607 IFXCIF_DEBUG;
2608 }
2609
2610 return retValue;
2611 }
2612
2613
2614 void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
2615 {
2616 uint16 i;
2617 boolean programTable = TRUE;
2618
2619 if ((tableId == IfxCif_JpeTableId_QTable0) || (tableId == IfxCif_JpeTableId_QTable1))
2620 {
2621 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2622 }
2623 else if (tableId == IfxCif_JpeTableId_VlcDcTable0)
2624 {
2625 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2626 IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables_Table0, length);
2627 }
2628 else if (tableId == IfxCif_JpeTableId_VlcDcTable1)
2629 {
2630 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2631 IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables_Table1, length);
2632 }
2633 else if (tableId == IfxCif_JpeTableId_VlcAcTable0)
2634 {
2635 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2636 IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables_Table0, length);
2637 }
2638 else if (tableId == IfxCif_JpeTableId_VlcAcTable1)
2639 {
2640 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2641 IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables_Table1, length);
2642 }
2643 else
2644 {
2645 IFXCIF_DEBUG;
2646 programTable = FALSE;
2647 }
2648
2649 if (programTable != FALSE)
2650 {
2651 for (i = 0; i < (length / 2); i++)
2652 {
2653 Ifx_CIF_JPE_TABLE_DATA data;
2654 data.B.TABLE_WDATA_H = tableEntry[i * 2 + 1];
2655 data.B.TABLE_WDATA_L = tableEntry[i * 2];
2656 MODULE_CIF.JPE.TABLE_DATA.U = data.U;
2657 }
2658 }
2659 }
2660
2661
2662 void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb)
2663 {
2664 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2665
2666 IfxScuWdt_clearCpuEndinit(passwd);
2667 cifBbb->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
2668 cifBbb->KRST1.B.RST = 1;
2669 IfxScuWdt_setCpuEndinit(passwd);
2670
2671 while (0 == cifBbb->KRST0.B.RSTSTAT) /* Wait until reset is executed */
2672
2673 {}
2674
2675 IfxScuWdt_clearCpuEndinit(passwd);
2676 cifBbb->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
2677 IfxScuWdt_setCpuEndinit(passwd);
2678 }
2679
2680
2681 void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter)
2682 {
2683 if (counter == IfxCif_SecurityWatchdogCounters_Predivider)
2684 {
2685 MODULE_CIF.WD.CTRL.B.RST_PD_CNT = 1;
2686 }
2687 else if (counter == IfxCif_SecurityWatchdogCounters_Vertical)
2688 {
2689 MODULE_CIF.WD.CTRL.B.RST_V_CNT = 1;
2690 }
2691 else if (counter == IfxCif_SecurityWatchdogCounters_Horizontal)
2692 {
2693 MODULE_CIF.WD.CTRL.B.RST_H_CNT = 1;
2694 }
2695 else
2696 {
2697 IFXCIF_DEBUG;
2698 }
2699 }
2700
2701
2702 void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState)
2703 {
2704 if (source == IfxCif_DpControlSources_UserDefinedSymbol8)
2705 {
2706 MODULE_CIF.DP.CTRL.B.UDS8 = enableState;
2707 }
2708 else if (source == IfxCif_DpControlSources_UserDefinedSymbol7)
2709 {
2710 MODULE_CIF.DP.CTRL.B.UDS7 = enableState;
2711 }
2712 else if (source == IfxCif_DpControlSources_UserDefinedSymbol6)
2713 {
2714 MODULE_CIF.DP.CTRL.B.UDS6 = enableState;
2715 }
2716 else if (source == IfxCif_DpControlSources_UserDefinedSymbol5)
2717 {
2718 MODULE_CIF.DP.CTRL.B.UDS5 = enableState;
2719 }
2720 else if (source == IfxCif_DpControlSources_UserDefinedSymbol4)
2721 {
2722 MODULE_CIF.DP.CTRL.B.UDS4 = enableState;
2723 }
2724 else if (source == IfxCif_DpControlSources_UserDefinedSymbol3)
2725 {
2726 MODULE_CIF.DP.CTRL.B.UDS3 = enableState;
2727 }
2728 else if (source == IfxCif_DpControlSources_UserDefinedSymbol2)
2729 {
2730 MODULE_CIF.DP.CTRL.B.UDS2 = enableState;
2731 }
2732 else if (source == IfxCif_DpControlSources_UserDefinedSymbol1)
2733 {
2734 MODULE_CIF.DP.CTRL.B.UDS1 = enableState;
2735 }
2736 else if (source == IfxCif_DpControlSources_TimestampCounter)
2737 {
2738 MODULE_CIF.DP.CTRL.B.TSC_EN = enableState;
2739 }
2740 else if (source == IfxCif_DpControlSources_LineNumberCounter)
2741 {
2742 MODULE_CIF.DP.CTRL.B.LNC_EN = enableState;
2743 }
2744 else if (source == IfxCif_DpControlSources_FrameNumberCounter)
2745 {
2746 MODULE_CIF.DP.CTRL.B.FNC_EN = enableState;
2747 }
2748 else
2749 {
2750 IFXCIF_DEBUG;
2751 }
2752 }
2753
2754
2755 void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue)
2756 {
2757 // only the predivider counter can be set
2758 if (counter == IfxCif_DpCounters_PredividerCounter)
2759 {
2760 MODULE_CIF.DP.PDIV_CTRL.B.PDIV_VAL = counterValue;
2761 }
2762 else
2763 {
2764 IFXCIF_DEBUG;
2765 }
2766 }
2767
2768
2769 void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value)
2770 {
2771 if (8 > x)
2772 {
2773 MODULE_CIF.DP.UDS_1S[x].B.UDS = value;
2774 }
2775 else
2776 {
2777 IFXCIF_DEBUG;
2778 }
2779 }
2780
2781
2782 void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
2783 {
2784 if (5 > z)
2785 {
2786 /* write base address to unsigned component of the register structure because lower bits are tied to 0
2787 * as base address needs to be a word aligned value */
2788 MODULE_CIF.MIEP.CH_1S[z].BASE_AD_INIT.U = (uint32)baseAddress;
2789 }
2790 else
2791 {
2792 IFXCIF_DEBUG;
2793 }
2794 }
2795
2796
2797 void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
2798 {
2799 if (5 > z)
2800 {
2801 if (tier == IfxCif_ImageTiers_Horizontal)
2802 {
2803 MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DX = displacement;
2804 }
2805 else if (tier == IfxCif_ImageTiers_Vertical)
2806 {
2807 MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DY = displacement;
2808 }
2809 else
2810 {
2811 IFXCIF_DEBUG;
2812 }
2813 }
2814 else
2815 {
2816 IFXCIF_DEBUG;
2817 }
2818 }
2819
2820
2821 void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
2822 {
2823 if (5 > z)
2824 {
2825 MODULE_CIF.EP_IC_1S[z].CTRL.B.IC_EN = enableState;
2826 }
2827 else
2828 {
2829 IFXCIF_DEBUG;
2830 }
2831 }
2832
2833
2834 void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
2835 {
2836 if (5 > z)
2837 {
2838 if (tier == IfxCif_ImageTiers_Horizontal)
2839 {
2840 MODULE_CIF.EP_IC_1S[z].MAX_DX.B.MAX_DX = displacement;
2841 }
2842 else if (tier == IfxCif_ImageTiers_Vertical)
2843 {
2844 MODULE_CIF.EP_IC_1S[z].MAX_DY.B.MAX_DY = displacement;
2845 }
2846 else
2847 {
2848 IFXCIF_DEBUG;
2849 }
2850 }
2851 else
2852 {
2853 IFXCIF_DEBUG;
2854 }
2855 }
2856
2857
2858 void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
2859 {
2860 if (5 > z)
2861 {
2862 if (tier == IfxCif_ImageTiers_Horizontal)
2863 {
2864 MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS = offset;
2865 }
2866 else if (tier == IfxCif_ImageTiers_Vertical)
2867 {
2868 MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS = offset;
2869 }
2870 else
2871 {
2872 IFXCIF_DEBUG;
2873 }
2874 }
2875 else
2876 {
2877 IFXCIF_DEBUG;
2878 }
2879 }
2880
2881
2882 void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
2883 {
2884 if (5 > z)
2885 {
2886 MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS = hOffset;
2887 MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS = vOffset;
2888 }
2889 else
2890 {
2891 IFXCIF_DEBUG;
2892 }
2893 }
2894
2895
2896 void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
2897 {
2898 if (5 > z)
2899 {
2900 if (tier == IfxCif_ImageTiers_Horizontal)
2901 {
2902 MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE = size;
2903 }
2904 else if (tier == IfxCif_ImageTiers_Vertical)
2905 {
2906 MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE = size;
2907 }
2908 else
2909 {
2910 IFXCIF_DEBUG;
2911 }
2912 }
2913 else
2914 {
2915 IFXCIF_DEBUG;
2916 }
2917 }
2918
2919
2920 void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
2921 {
2922 if (5 > z)
2923 {
2924 MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE = hSize;
2925 MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE = vSize;
2926 }
2927 else
2928 {
2929 IFXCIF_DEBUG;
2930 }
2931 }
2932
2933
2934 void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
2935 {
2936 if (5 > z)
2937 {
2938 if (feature == IfxCif_EpFeatures_InitOffsetCounter)
2939 {
2940 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_OFFSET_EN = enableState;
2941 }
2942 else if (feature == IfxCif_EpFeatures_InitBaseAddress)
2943 {
2944 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_BASE_EN = enableState;
2945 }
2946 else if (feature == IfxCif_EpFeatures_ByteSwap)
2947 {
2948 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.BYTE_SWAP = enableState;
2949 }
2950 else if (feature == IfxCif_EpFeatures_PictureDataPath)
2951 {
2952 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_ENABLE = enableState;
2953 }
2954 else
2955 {
2956 IFXCIF_DEBUG;
2957 }
2958 }
2959 else
2960 {
2961 IFXCIF_DEBUG;
2962 }
2963 }
2964
2965
2966 void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
2967 {
2968 if (5 > z)
2969 {
2970 /* write size to unsigned component of the register structure because lower bits are tied to 0
2971 * as size needs to be a word aligned value */
2972 MODULE_CIF.MIEP.CH_1S[z].SIZE_INIT.U = size;
2973 }
2974 else
2975 {
2976 IFXCIF_DEBUG;
2977 }
2978 }
2979
2980
2981 void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset)
2982 {
2983 if (5 > z)
2984 {
2985 /* write interrupt offset to unsigned component of the register structure because lower bits are tied
2986 * to 0 as interrupt offset needs to be a word aligned value */
2987 MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_INIT.U = interruptOffset;
2988 }
2989 else
2990 {
2991 IFXCIF_DEBUG;
2992 }
2993 }
2994
2995
2996 void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter)
2997 {
2998 if (5 > z)
2999 {
3000 /* write offset counter to unsigned component of the register structure because lower bits are tied
3001 * to 0 as offset counter needs to be a word aligned value */
3002 MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_INIT.U = offsetCounter;
3003 }
3004 else
3005 {
3006 IFXCIF_DEBUG;
3007 }
3008 }
3009
3010
3011 void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
3012 {
3013 if (5 > z)
3014 {
3015 if (IfxCif_State_Enabled == interruptEnableState)
3016 {
3017 MODULE_CIF.MIEP.IMSC.U |=
3018 (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
3019 }
3020 else
3021 {
3022 MODULE_CIF.MIEP.IMSC.U &=
3023 ~(((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
3024 }
3025 }
3026 else
3027 {
3028 IFXCIF_DEBUG;
3029 }
3030 }
3031
3032
3033 void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
3034 {
3035 if (5 > z)
3036 {
3037 MODULE_CIF.MIEP.ISR.U = (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
3038 }
3039 else
3040 {
3041 IFXCIF_DEBUG;
3042 }
3043 }
3044
3045
3046 void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter)
3047 {
3048 if (5 > z)
3049 {
3050 /* write offset counter to unsigned component of the register structure because lower bits are tied
3051 * to 0 as offset counter needs to be a word aligned value */
3052 MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U = offsetCounter;
3053 }
3054 else
3055 {
3056 IFXCIF_DEBUG;
3057 }
3058 }
3059
3060
3061 void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value)
3062 {
3063 if (5 > z)
3064 {
3065 MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER = value;
3066 }
3067 else
3068 {
3069 IFXCIF_DEBUG;
3070 }
3071 }
3072
3073
3074 void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
3075 {
3076 if (5 > z)
3077 {
3078 MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_WRITE_FORMAT = writeFormat;
3079 }
3080 else
3081 {
3082 IFXCIF_DEBUG;
3083 }
3084 }
3085
3086
3087 void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length)
3088 {
3089 if (table == IfxCif_HuffmanTables_Table0)
3090 {
3091 MODULE_CIF.JPE.TAC0_LEN.U = length; // 32-bit access is needed
3092 }
3093 else if (table == IfxCif_HuffmanTables_Table1)
3094 {
3095 MODULE_CIF.JPE.TAC1_LEN.U = length; // 32-bit access is needed
3096 }
3097 else
3098 {
3099 IFXCIF_DEBUG;
3100 }
3101 }
3102
3103
3104 void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
3105 {
3106 if (table == IfxCif_HuffmanTables_Table0)
3107 {
3108 MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT &= ~(1 << component);
3109 }
3110 else if (table == IfxCif_HuffmanTables_Table1)
3111 {
3112 MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT |= (1 << component);
3113 }
3114 else
3115 {
3116 IFXCIF_DEBUG;
3117 }
3118 }
3119
3120
3121 void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length)
3122 {
3123 if (table == IfxCif_HuffmanTables_Table0)
3124 {
3125 MODULE_CIF.JPE.TDC0_LEN.U = length; // 32-bit access is needed
3126 }
3127 else if (table == IfxCif_HuffmanTables_Table1)
3128 {
3129 MODULE_CIF.JPE.TDC1_LEN.U = length; // 32-bit access is needed
3130 }
3131 else
3132 {
3133 IFXCIF_DEBUG;
3134 }
3135 }
3136
3137
3138 void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
3139 {
3140 if (table == IfxCif_HuffmanTables_Table0)
3141 {
3142 MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT &= ~(1 << component);
3143 }
3144 else if (table == IfxCif_HuffmanTables_Table1)
3145 {
3146 MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT |= (1 << component);
3147 }
3148 else
3149 {
3150 IFXCIF_DEBUG;
3151 }
3152 }
3153
3154
3155 void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
3156 {
3157 Ifx_CIF_ICCL iccl = MODULE_CIF.ICCL;
3158
3159 if (submodule == IfxCif_Submodules_Debug)
3160 {
3161 iccl.B.CIF_DEBUG_PATH_CLK_EN = clockState;
3162 }
3163 else if (submodule == IfxCif_Submodules_ExtraPaths)
3164 {
3165 iccl.B.CIF_EXTRA_PATHS_CLK_ENABLE = clockState;
3166 }
3167 else if (submodule == IfxCif_Submodules_LinearDownscaler)
3168 {
3169 iccl.B.CIF_LIN_DSCALER_CLK_ENABLE = clockState;
3170 }
3171 else if (submodule == IfxCif_Submodules_SecurityWatchdog)
3172 {
3173 iccl.B.CIF_WATCHDOG_CLK_ENABLE = clockState;
3174 }
3175 else if (submodule == IfxCif_Submodules_MemoryInterface)
3176 {
3177 iccl.B.CIF_MI_CLK_ENABLE = clockState;
3178 }
3179 else if (submodule == IfxCif_Submodules_JpegEncoder)
3180 {
3181 iccl.B.CIF_JPEG_CLK_ENABLE = clockState;
3182 }
3183 else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
3184 {
3185 iccl.B.CIF_ISP_CLK_ENABLE = clockState;
3186 }
3187 else
3188 {
3189 IFXCIF_DEBUG;
3190 }
3191
3192 MODULE_CIF.ICCL.U = iccl.U;
3193 }
3194
3195
3196 void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset)
3197 {
3198 if (tier == IfxCif_ImageTiers_Horizontal)
3199 {
3200 MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS = offset;
3201 }
3202 else if (tier == IfxCif_ImageTiers_Vertical)
3203 {
3204 MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS = offset;
3205 }
3206 else
3207 {
3208 IFXCIF_DEBUG;
3209 }
3210 }
3211
3212
3213 void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size)
3214 {
3215 if (tier == IfxCif_ImageTiers_Horizontal)
3216 {
3217 MODULE_CIF.ISP.ACQ_H_SIZE.B.ACQ_H_SIZE = size;
3218 }
3219 else if (tier == IfxCif_ImageTiers_Vertical)
3220 {
3221 MODULE_CIF.ISP.ACQ_V_SIZE.B.ACQ_V_SIZE = size;
3222 }
3223 else
3224 {
3225 IFXCIF_DEBUG;
3226 }
3227 }
3228
3229
3230 void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
3231 {
3232 /* CIF module has a NO append enable bit -> invert appendState */
3233 if (appendState == IfxCif_State_Enabled)
3234 {
3235 MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP = 0;
3236 }
3237 else
3238 {
3239 MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP = 1;
3240 }
3241 }
3242
3243
3244 void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
3245 {
3246 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
3247 {
3248 MODULE_CIF.ISP.IMSC.B.IMSC_WD_TRIG = interruptEnableState;
3249 }
3250 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
3251 {
3252 MODULE_CIF.ISP.IMSC.B.IMSC_H_START = interruptEnableState;
3253 }
3254 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
3255 {
3256 MODULE_CIF.ISP.IMSC.B.IMSC_V_START = interruptEnableState;
3257 }
3258 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
3259 {
3260 MODULE_CIF.ISP.IMSC.B.IMSC_FRAME_IN = interruptEnableState;
3261 }
3262 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
3263 {
3264 MODULE_CIF.ISP.IMSC.B.IMSC_PIC_SIZE_ERR = interruptEnableState;
3265 }
3266 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
3267 {
3268 MODULE_CIF.ISP.IMSC.B.IMSC_DATA_LOSS = interruptEnableState;
3269 }
3270 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
3271 {
3272 MODULE_CIF.ISP.IMSC.B.IMSC_FRAME = interruptEnableState;
3273 }
3274 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
3275 {
3276 MODULE_CIF.ISP.IMSC.B.IMSC_ISP_OFF = interruptEnableState;
3277 }
3278 }
3279
3280
3281 void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource)
3282 {
3283 if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
3284 {
3285 MODULE_CIF.ISP.ISR.B.ISR_WD_TRIG = 1;
3286 }
3287 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
3288 {
3289 MODULE_CIF.ISP.ISR.B.ISR_H_START = 1;
3290 }
3291 else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
3292 {
3293 MODULE_CIF.ISP.ISR.B.ISR_V_START = 1;
3294 }
3295 else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
3296 {
3297 MODULE_CIF.ISP.ISR.B.ISR_FRAME_IN = 1;
3298 }
3299 else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
3300 {
3301 MODULE_CIF.ISP.ISR.B.ISR_PIC_SIZE_ERR = 1;
3302 }
3303 else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
3304 {
3305 MODULE_CIF.ISP.ISR.B.ISR_DATA_LOSS = 1;
3306 }
3307 else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
3308 {
3309 MODULE_CIF.ISP.ISR.B.ISR_FRAME = 1;
3310 }
3311 else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
3312 {
3313 MODULE_CIF.ISP.ISR.B.ISR_ISP_OFF = 1;
3314 }
3315 }
3316
3317
3318 void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
3319 {
3320 if (tier == IfxCif_ImageTiers_Horizontal)
3321 {
3322 MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS = offset;
3323 }
3324 else if (tier == IfxCif_ImageTiers_Vertical)
3325 {
3326 MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS = offset;
3327 }
3328 else
3329 {
3330 IFXCIF_DEBUG;
3331 }
3332 }
3333
3334
3335 void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize)
3336 {
3337 if (tier == IfxCif_ImageTiers_Horizontal)
3338 {
3339 MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE = pictureSize;
3340 }
3341 else if (tier == IfxCif_ImageTiers_Vertical)
3342 {
3343 MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE = pictureSize;
3344 }
3345 else
3346 {
3347 IFXCIF_DEBUG;
3348 }
3349 }
3350
3351
3352 void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement)
3353 {
3354 if (tier == IfxCif_ImageTiers_Horizontal)
3355 {
3356 MODULE_CIF.ISPIS.DISPLACE.B.DX = displacement;
3357 }
3358 else if (tier == IfxCif_ImageTiers_Vertical)
3359 {
3360 MODULE_CIF.ISPIS.DISPLACE.B.DY = displacement;
3361 }
3362 else
3363 {
3364 IFXCIF_DEBUG;
3365 }
3366 }
3367
3368
3369 void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement)
3370 {
3371 if (tier == IfxCif_ImageTiers_Horizontal)
3372 {
3373 MODULE_CIF.ISPIS.MAX_DX.B.IS_MAX_DX = displacement;
3374 }
3375 else if (tier == IfxCif_ImageTiers_Vertical)
3376 {
3377 MODULE_CIF.ISPIS.MAX_DY.B.IS_MAX_DY = displacement;
3378 }
3379 else
3380 {
3381 IFXCIF_DEBUG;
3382 }
3383 }
3384
3385
3386 void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
3387 {
3388 if (tier == IfxCif_ImageTiers_Horizontal)
3389 {
3390 MODULE_CIF.ISPIS.H_OFFS.B.IS_H_OFFS = offset;
3391 }
3392 else if (tier == IfxCif_ImageTiers_Vertical)
3393 {
3394 MODULE_CIF.ISPIS.V_OFFS.B.IS_V_OFFS = offset;
3395 }
3396 else
3397 {
3398 IFXCIF_DEBUG;
3399 }
3400 }
3401
3402
3403 void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size)
3404 {
3405 if (tier == IfxCif_ImageTiers_Horizontal)
3406 {
3407 MODULE_CIF.ISPIS.H_SIZE.B.IS_H_SIZE = size;
3408 }
3409 else if (tier == IfxCif_ImageTiers_Vertical)
3410 {
3411 MODULE_CIF.ISPIS.V_SIZE.B.IS_V_SIZE = size;
3412 }
3413 else
3414 {
3415 IFXCIF_DEBUG;
3416 }
3417 }
3418
3419
3420 void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
3421 {
3422 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
3423 {
3424 MODULE_CIF.JPE.ERROR_IMR.B.VLC_TABLE_ERR = interruptEnableState;
3425 }
3426 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
3427 {
3428 MODULE_CIF.JPE.ERROR_IMR.B.R2B_IMG_SIZE_ERR = interruptEnableState;
3429 }
3430 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
3431 {
3432 MODULE_CIF.JPE.ERROR_IMR.B.DCT_ERR = interruptEnableState;
3433 }
3434 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
3435 {
3436 MODULE_CIF.JPE.ERROR_IMR.B.VLC_SYMBOL_ERR = interruptEnableState;
3437 }
3438 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
3439 {
3440 MODULE_CIF.JPE.STATUS_IMR.B.GEN_HEADER_DONE = interruptEnableState;
3441 }
3442 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
3443 {
3444 MODULE_CIF.JPE.STATUS_IMR.B.ENCODE_DONE = interruptEnableState;
3445 }
3446 else
3447 {
3448 IFXCIF_DEBUG;
3449 }
3450 }
3451
3452
3453 void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource)
3454 {
3455 if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
3456 {
3457 MODULE_CIF.JPE.ERROR_ICR.B.VLC_TABLE_ERR = 1;
3458 }
3459 else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
3460 {
3461 MODULE_CIF.JPE.ERROR_ICR.B.R2B_IMG_SIZE_ERR = 1;
3462 }
3463 else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
3464 {
3465 MODULE_CIF.JPE.ERROR_ICR.B.DCT_ERR = 1;
3466 }
3467 else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
3468 {
3469 MODULE_CIF.JPE.ERROR_ICR.B.VLC_SYMBOL_ERR = 1;
3470 }
3471 else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
3472 {
3473 MODULE_CIF.JPE.STATUS_ICR.B.GEN_HEADER_DONE = 1;
3474 }
3475 else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
3476 {
3477 MODULE_CIF.JPE.STATUS_ICR.B.ENCODE_DONE = 1;
3478 }
3479 else
3480 {
3481 IFXCIF_DEBUG;
3482 }
3483 }
3484
3485
3486 void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
3487 {
3488 if (component == IfxCif_JpeQTableSelectorComponents_Y)
3489 {
3490 MODULE_CIF.JPE.TQ_Y_SELECT.B.TQ0_SELECT = selector;
3491 }
3492 else if (component == IfxCif_JpeQTableSelectorComponents_U)
3493 {
3494 MODULE_CIF.JPE.TQ_U_SELECT.B.TQ1_SELECT = selector;
3495 }
3496 else if (component == IfxCif_JpeQTableSelectorComponents_V)
3497 {
3498 MODULE_CIF.JPE.TQ_V_SELECT.B.TQ2_SELECT = selector;
3499 }
3500 else
3501 {
3502 IFXCIF_DEBUG;
3503 }
3504 }
3505
3506
3507 void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
3508 {
3509 if (source == IfxCif_JpeScalingValueSources_Y)
3510 {
3511 MODULE_CIF.JPE.Y_SCALE_EN.B.Y_SCALE_EN = scalingEnable;
3512 }
3513 else if (source == IfxCif_JpeScalingValueSources_CbCr)
3514 {
3515 MODULE_CIF.JPE.CBCR_SCALE_EN.B.CBCR_SCALE_EN = scalingEnable;
3516 }
3517 else
3518 {
3519 IFXCIF_DEBUG;
3520 }
3521 }
3522
3523
3524 void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size)
3525 {
3526 if (tier == IfxCif_ImageTiers_Horizontal)
3527 {
3528 MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE = size;
3529 }
3530 else if (tier == IfxCif_ImageTiers_Vertical)
3531 {
3532 MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE = size;
3533 }
3534 else
3535 {
3536 IFXCIF_DEBUG;
3537 }
3538 }
3539
3540
3541 void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState)
3542 {
3543 Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
3544
3545 if (tier == IfxCif_ImageTiers_Horizontal)
3546 {
3547 ldsCtrl.B.LDS_H_EN = enableState;
3548 }
3549 else if (tier == IfxCif_ImageTiers_Vertical)
3550 {
3551 ldsCtrl.B.LDS_V_EN = enableState;
3552 }
3553 else
3554 {
3555 IFXCIF_DEBUG;
3556 }
3557
3558 MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
3559 }
3560
3561
3562 void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor)
3563 {
3564 Ifx_CIF_LDS_FAC ldsFac = MODULE_CIF.LDS.FAC;
3565
3566 if (tier == IfxCif_ImageTiers_Horizontal)
3567 {
3568 ldsFac.B.LDS_H_FAC = factor;
3569 }
3570 else if (tier == IfxCif_ImageTiers_Vertical)
3571 {
3572 ldsFac.B.LDS_V_FAC = factor;
3573 }
3574 else
3575 {
3576 IFXCIF_DEBUG;
3577 }
3578
3579 MODULE_CIF.LDS.FAC.U = ldsFac.U;
3580 }
3581
3582
3583 void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
3584 {
3585 Ifx_CIF_LDS_FAC ldsFac = MODULE_CIF.LDS.FAC;
3586
3587 ldsFac.B.LDS_H_FAC = horizFactor;
3588 ldsFac.B.LDS_V_FAC = vertFactor;
3589 MODULE_CIF.LDS.FAC.U = ldsFac.U;
3590 }
3591
3592
3593 void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
3594 {
3595 Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
3596
3597 if (tier == IfxCif_ImageTiers_Horizontal)
3598 {
3599 ldsCtrl.B.LDS_H_MODE = mode;
3600 }
3601 else if (tier == IfxCif_ImageTiers_Vertical)
3602 {
3603 ldsCtrl.B.LDS_V_MODE = mode;
3604 }
3605 else
3606 {
3607 IFXCIF_DEBUG;
3608 }
3609
3610 MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
3611 }
3612
3613
3614 void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
3615 {
3616 Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
3617
3618 ldsCtrl.B.LDS_H_EN = (horizMode != IfxCif_LinearDownscalerScalingMode_Disabled);
3619 ldsCtrl.B.LDS_V_EN = (vertMode != IfxCif_LinearDownscalerScalingMode_Disabled);
3620 ldsCtrl.B.LDS_H_MODE = horizMode;
3621 ldsCtrl.B.LDS_V_MODE = vertMode;
3622 MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
3623 }
3624
3625
3626 void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
3627 {
3628 if (dataPath == IfxCif_MiDataPaths_RawData)
3629 {
3630 MODULE_CIF.MI.CTRL.B.RAW_ENABLE = enableState;
3631 }
3632 else if (dataPath == IfxCif_MiDataPaths_JpegData)
3633 {
3634 MODULE_CIF.MI.CTRL.B.JPEG_ENABLE = enableState;
3635 }
3636 else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
3637 {
3638 MODULE_CIF.MI.CTRL.B.MP_ENABLE = enableState;
3639 }
3640 else
3641 {
3642 IFXCIF_DEBUG;
3643 }
3644 }
3645
3646
3647 void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
3648 {
3649 if (interruptSource == IfxCif_MiInterruptSources_BusError)
3650 {
3651 MODULE_CIF.MI.IMSC.B.BUS_ERROR = interruptEnableState;
3652 }
3653 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
3654 {
3655 MODULE_CIF.MI.IMSC.B.WRAP_MP_CR = interruptEnableState;
3656 }
3657 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
3658 {
3659 MODULE_CIF.MI.IMSC.B.WRAP_MP_CB = interruptEnableState;
3660 }
3661 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
3662 {
3663 MODULE_CIF.MI.IMSC.B.WRAP_MP_Y = interruptEnableState;
3664 }
3665 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
3666 {
3667 MODULE_CIF.MI.IMSC.B.FILL_MP_Y = interruptEnableState;
3668 }
3669 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
3670 {
3671 MODULE_CIF.MI.IMSC.B.MBLK_LINE = interruptEnableState;
3672 }
3673 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
3674 {
3675 MODULE_CIF.MI.IMSC.B.MP_FRAME_END = interruptEnableState;
3676 }
3677 else
3678 {
3679 IFXCIF_DEBUG;
3680 }
3681 }
3682
3683
3684 void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource)
3685 {
3686 if (interruptSource == IfxCif_MiInterruptSources_BusError)
3687 {
3688 MODULE_CIF.MI.ISR.B.Bus_ERROR = 1;
3689 }
3690 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
3691 {
3692 MODULE_CIF.MI.ISR.B.WRAP_MP_CR = 1;
3693 }
3694 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
3695 {
3696 MODULE_CIF.MI.ISR.B.WRAP_MP_CB = 1;
3697 }
3698 else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
3699 {
3700 MODULE_CIF.MI.ISR.B.WRAP_MP_Y = 1;
3701 }
3702 else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
3703 {
3704 MODULE_CIF.MI.ISR.B.FILL_MP_Y = 1;
3705 }
3706 else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
3707 {
3708 MODULE_CIF.MI.ISR.B.MBLK_LINE = 1;
3709 }
3710 else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
3711 {
3712 MODULE_CIF.MI.ISR.B.MP_FRAME_END = 1;
3713 }
3714 else
3715 {
3716 IFXCIF_DEBUG;
3717 }
3718 }
3719
3720
3721 void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
3722 {
3723 MODULE_CIF.MI.CTRL.B.BURST_LEN_LUM = burstLength;
3724 }
3725
3726
3727 void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
3728 {
3729 uint32 baseAddress = (uint32)address;
3730
3731 /* write base address to unsigned component of the register structure because lower bits are tied to 0
3732 * as base address needs to be a word aligned value */
3733 if (component == IfxCif_MiMainPicturePathComponents_Y)
3734 {
3735 MODULE_CIF.MI.MP_Y_BASE_AD_INIT.U = baseAddress;
3736 }
3737 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
3738 {
3739 MODULE_CIF.MI.MP_CB_BASE_AD_INIT.U = baseAddress;
3740 }
3741 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
3742 {
3743 MODULE_CIF.MI.MP_CR_BASE_AD_INIT.U = baseAddress;
3744 }
3745 else
3746 {
3747 IFXCIF_DEBUG;
3748 }
3749 }
3750
3751
3752 void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
3753 {
3754 /* write size to unsigned component of the register structure because lower bits are tied to 0
3755 * as size needs to be a word aligned value */
3756 if (component == IfxCif_MiMainPicturePathComponents_Y)
3757 {
3758 MODULE_CIF.MI.MP_Y_SIZE_INIT.U = size;
3759 }
3760 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
3761 {
3762 MODULE_CIF.MI.MP_CB_SIZE_INIT.U = size;
3763 }
3764 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
3765 {
3766 MODULE_CIF.MI.MP_CR_SIZE_INIT.U = size;
3767 }
3768 else
3769 {
3770 IFXCIF_DEBUG;
3771 }
3772 }
3773
3774
3775 void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
3776 {
3777 /* write offset counter to unsigned component of the register structure because lower bits are tied to 0
3778 * as offset counter needs to be a word aligned value */
3779 if (component == IfxCif_MiMainPicturePathComponents_Y)
3780 {
3781 MODULE_CIF.MI.MP_Y_OFFS_CNT_INIT.U = offsetCounter;
3782 }
3783 else if (component == IfxCif_MiMainPicturePathComponents_Cb)
3784 {
3785 MODULE_CIF.MI.MP_CB_OFFS_CNT_INIT.U = offsetCounter;
3786 }
3787 else if (component == IfxCif_MiMainPicturePathComponents_Cr)
3788 {
3789 MODULE_CIF.MI.MP_CR_OFFS_CNT_INIT.U = offsetCounter;
3790 }
3791 else
3792 {
3793 IFXCIF_DEBUG;
3794 }
3795 }
3796
3797
3798 void IfxCif_setModuleStateRequest(IfxCif_State state)
3799 {
3800 uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
3801 IfxScuWdt_clearCpuEndinit(l_TempVar);
3802
3803 /* bit is inverted */
3804 MODULE_CIF.BBB.CLC.B.DISR = (IfxCif_State_Enabled == state) ? 0 : 1;
3805
3806 while (MODULE_CIF.BBB.CLC.B.DISS == (IfxCif_State_Enabled == state) ? 1 : 0)
3807 {}
3808
3809 IfxScuWdt_setCpuEndinit(l_TempVar);
3810 }
3811
3812
3813 void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
3814 {
3815 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
3816 {
3817 MODULE_CIF.WD.IMSC.B.IMSC_WD_VES_TO = interruptEnableState;
3818 }
3819 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
3820 {
3821 MODULE_CIF.WD.IMSC.B.IMSC_WD_VSE_TO = interruptEnableState;
3822 }
3823 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
3824 {
3825 MODULE_CIF.WD.IMSC.B.IMSC_WD_HES_TO = interruptEnableState;
3826 }
3827 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
3828 {
3829 MODULE_CIF.WD.IMSC.B.IMSC_WD_HSE_TO = interruptEnableState;
3830 }
3831 else
3832 {
3833 IFXCIF_DEBUG;
3834 }
3835 }
3836
3837
3838 void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource)
3839 {
3840 if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
3841 {
3842 MODULE_CIF.WD.ISR.B.ISR_WD_VES_TO = 1;
3843 }
3844 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
3845 {
3846 MODULE_CIF.WD.ISR.B.ISR_WD_VSE_TO = 1;
3847 }
3848 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
3849 {
3850 MODULE_CIF.WD.ISR.B.ISR_WD_HES_TO = 1;
3851 }
3852 else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
3853 {
3854 MODULE_CIF.WD.ISR.B.ISR_WD_HSE_TO = 1;
3855 }
3856 else
3857 {
3858 IFXCIF_DEBUG;
3859 }
3860 }
3861
3862
3863 void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
3864 {
3865 if (tier == IfxCif_ImageTiers_Horizontal)
3866 {
3867 if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
3868 {
3869 MODULE_CIF.WD.H_TIMEOUT.B.WD_HES_TO = timeout;
3870 }
3871 else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
3872 {
3873 MODULE_CIF.WD.H_TIMEOUT.B.WD_HSE_TO = timeout;
3874 }
3875 else
3876 {
3877 IFXCIF_DEBUG;
3878 }
3879 }
3880 else if (tier == IfxCif_ImageTiers_Vertical)
3881 {
3882 if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
3883 {
3884 MODULE_CIF.WD.V_TIMEOUT.B.WD_VES_TO = timeout;
3885 }
3886 else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
3887 {
3888 MODULE_CIF.WD.V_TIMEOUT.B.WD_VSE_TO = timeout;
3889 }
3890 else
3891 {
3892 IFXCIF_DEBUG;
3893 }
3894 }
3895 else
3896 {
3897 IFXCIF_DEBUG;
3898 }
3899 }
3900
3901
3902 void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
3903 {
3904 if (submodule == IfxCif_Submodules_AllModules)
3905 {
3906 MODULE_CIF.IRCL.B.CIF_GLOBAL_RST = resetMode;
3907 }
3908 else if (submodule == IfxCif_Submodules_Debug)
3909 {
3910 MODULE_CIF.IRCL.B.CIF_DEBUG_PATH_RST = resetMode;
3911 }
3912 else if (submodule == IfxCif_Submodules_ExtraPaths)
3913 {
3914 MODULE_CIF.IRCL.B.CIF_EXTRA_PATHS_RST = resetMode;
3915 }
3916 else if (submodule == IfxCif_Submodules_LinearDownscaler)
3917 {
3918 MODULE_CIF.IRCL.B.CIF_LIN_DSCALER_RST = resetMode;
3919 }
3920 else if (submodule == IfxCif_Submodules_SecurityWatchdog)
3921 {
3922 MODULE_CIF.IRCL.B.CIF_WATCHDOG_RST = resetMode;
3923 }
3924 else if (submodule == IfxCif_Submodules_MemoryInterface)
3925 {
3926 MODULE_CIF.IRCL.B.CIF_MI_SOFT_RST = resetMode;
3927 }
3928 else if (submodule == IfxCif_Submodules_JpegEncoder)
3929 {
3930 MODULE_CIF.IRCL.B.CIF_JPEG_SOFT_RST = resetMode;
3931 }
3932 else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
3933 {
3934 MODULE_CIF.IRCL.B.CIF_ISP_SOFT_RST = resetMode;
3935 }
3936 else if (submodule == IfxCif_Submodules_YCSplitter)
3937 {
3938 MODULE_CIF.IRCL.B.CIF_YCS_SOFT_RST = resetMode;
3939 }
3940 else
3941 {
3942 IFXCIF_DEBUG;
3943 }
3944 }
IFXCIF_DEBUG
#define IFXCIF_DEBUG
Definition: IfxCif_cfg.h:46
IfxCif_getMiDataPathInputEnableState
IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input...
Definition: IfxCif.c:1971
IfxCif_getRawEpInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2272
IfxCif_InterruptTriggeredState
IfxCif_InterruptTriggeredState
Enumerator for the state of an interrupt.
Definition: IfxCif.h:126
IfxCif_JpeTableId_VlcDcTable0
VLC DC Table 0.
Definition: IfxCif.h:485
IfxCif_setEpBaseInitAddress
void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:2782
IfxCif_getEpCroppingOffsetOutputWindow
uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path...
Definition: IfxCif.c:644
IfxCif_getEpFeatureEnableState
IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path.
Definition: IfxCif.c:773
IfxCif_getHuffmanAcTableLength
uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values.
Definition: IfxCif.c:1033
IfxCif.h
CIF basic functionality.
IfxCif_EpWriteFormat
IfxCif_EpWriteFormat
Enumerator for write formats of extra paths.
Definition: IfxCif.h:593
IfxCif_DpCounters_FrameNumberCounter
Frame number counter.
Definition: IfxCif.h:629
IfxCif_MiInterruptSources_WrapMainPictureCb
Main picture Cb address wrap interrupt.
Definition: IfxCif.h:324
IfxCif_HuffmanTables_Table0
Huffman Table 0.
Definition: IfxCif.h:391
IfxCif_MiStatusClearSources_MainPictureCrFifoFull
Cr FIFO full flag in main path.
Definition: IfxCif.h:359
IfxCif_setEpCroppingPictureSizes
void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path.
Definition: IfxCif.c:2920
IfxCif_MiMainPicturePathComponents
IfxCif_MiMainPicturePathComponents
Enumerator for main picture path components of the memory interface.
Definition: IfxCif.h:333
IfxCif_getJpeDebugSignalState
IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source.
Definition: IfxCif.c:1531
IfxCif_getEpInterruptEnableState
IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:884
IfxCif_DpControlSources_UserDefinedSymbol4
ser defined symbol 4
Definition: IfxCif.h:613
IfxCif_getIspPictureSize
uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier.
Definition: IfxCif.c:1371
IfxCif_getMiMainPictureComponentInitialOffsetCounter
uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent...
Definition: IfxCif.c:2139
IfxCif_JpeInterruptSources_R2BImageSizeError
R2B image size error.
Definition: IfxCif.h:435
IfxCif_JpeInterruptSources_VlcSymbolError
VLC symbol error.
Definition: IfxCif.h:437
IfxCif_setDpControlEnableState
void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source.
Definition: IfxCif.c:2702
IfxCif_EpErrorClearSources
IfxCif_EpErrorClearSources
Enumerator for error sources that can be cleared in the extra paths registers.
Definition: IfxCif.h:545
IfxCif_MiInterruptSources_BusError
Bus write or read error interrupt (from handshake target interfaces)
Definition: IfxCif.h:322
IfxCif_getInternalClockMode
IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule)
Function to query the clock state of a submodule.
Definition: IfxCif.c:1129
IfxCif_epSkipPicture
void IfxCif_epSkipPicture(IfxCif_ExtraPath z)
Function to skip one picture of one extra path.
Definition: IfxCif.c:316
IfxCif_ImageTiers_Horizontal
Horizontal tier.
Definition: IfxCif.h:113
IfxCif_DpCounters_LineNumberCounter
Line number counter.
Definition: IfxCif.h:628
IfxCif_SecurityWatchdogCounters_Predivider
Predivider counter.
Definition: IfxCif.h:516
IfxCif_getMiMainPictureComponentSize
uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component.
Definition: IfxCif.c:2218
IfxCif_Submodules_JpegEncoder
JPEG Encoder submodule.
Definition: IfxCif.h:158
IfxCif_setHuffmanAcTableLength
void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values.
Definition: IfxCif.c:3087
IfxCif_HuffmanTableComponents
IfxCif_HuffmanTableComponents
Enumerator for the Huffman Table components.
Definition: IfxCif.h:380
IfxCif_MiInterruptSources_WrapMainPictureY
Main picture Y address wrap interrupt.
Definition: IfxCif.h:325
IfxCif_setMiMainPictureComponentBaseInitAddress
void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component...
Definition: IfxCif.c:3727
IfxCif_getIspisPictureSize
uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier)
Function to query the current picture size for one tier.
Definition: IfxCif.c:1497
IfxCif_setDpUserDefinedSymbol
void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value)
Function to set one user defined debug symbol.
Definition: IfxCif.c:2769
IfxCif_SecurityWatchdogCounters_Horizontal
Horizontal counter.
Definition: IfxCif.h:518
IfxCif_getHuffmanDcTableLength
uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values.
Definition: IfxCif.c:1081
IfxCif_clearEpInterrupt
void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:64
IfxCif_getEpInputEnableState
IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path.
Definition: IfxCif.c:867
IfxCif_getIspisCurrentPictureSize
uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier.
Definition: IfxCif.c:1434
IfxCif_MiStatusClearSources_ExtraPath1FifoFull
FIFO full flag in extra path 1.
Definition: IfxCif.h:357
IfxCif_Submodules_SecurityWatchdog
Security Watchdog submodule.
Definition: IfxCif.h:156
IfxCif_getIspInputSelectionAppendState
IfxCif_State IfxCif_getIspInputSelectionAppendState(void)
Function to query the append state.
Definition: IfxCif.c:1268
IfxCif_getKernelResetRequestState
IfxCif_State IfxCif_getKernelResetRequestState(void)
Function to query the state of the kernel reset request bit.
Definition: IfxCif.c:1668
IfxCif_JpeQTableSelector_Table0
Q-Table 0.
Definition: IfxCif.h:446
IfxCif_Submodules_Debug
Debug submodule.
Definition: IfxCif.h:153
IfxCif_MiStatusClearSources_BusWriteError
Bus write error flag.
Definition: IfxCif.h:358
IfxCif_getMiMainPictureComponentOffsetCounterStart
uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed pi...
Definition: IfxCif.c:2191
IfxCif_setMiInterruptRequestBit
void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3684
IfxCif_setSecurityWatchdogInterruptRequestBit
void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3838
IfxCif_getIspOutputWindowOffset
uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier.
Definition: IfxCif.c:1350
IfxCif_EpInterrupts_Count
Total number of interrupt sources for one extra path.
Definition: IfxCif.h:588
IfxCif_setJpeInterruptRequestBit
void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3453
IfxCif_ImageTiers_Vertical
Vertical tier.
Definition: IfxCif.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCif_setEpInterruptEnableState
void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3011
IfxCif_JpeDebugSignalSources_VlcEncodeBusy
VLC Encode Busy (vlc encode processing active)
Definition: IfxCif.h:402
IfxCif_IspInterruptSources_LossOfData
Loss of Data.
Definition: IfxCif.h:250
IfxCif_JpeDebugSignalState_Inactive
Debug signal is inactive.
Definition: IfxCif.h:410
IfxCif_getMiMainPictureComponentInitSize
uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component.
Definition: IfxCif.c:2112
IfxCif_getEpCroppingEnableState
IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path.
Definition: IfxCif.c:599
IfxCif_JpeDebugSignalSources_R2BMemoryFull
R2B Memory Full (line memory status of r2b)
Definition: IfxCif.h:401
IfxCif_getIspisRecenterEnableState
IfxCif_State IfxCif_getIspisRecenterEnableState(void)
Function to query the enabled state of image stabilization recenter feature.
Definition: IfxCif.c:1518
IfxCif_setLinearDownscalerScalingFactors
void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler.
Definition: IfxCif.c:3583
IfxCif_IspInterruptSources_PictureSizeViolationOccurred
Picture Size Violation Occurred.
Definition: IfxCif.h:249
IfxCif_MiMainPicturePathComponents_Cr
Cr-component.
Definition: IfxCif.h:337
IfxCif_EpInterrupts
IfxCif_EpInterrupts
Enumerator for interrupt sources of the extra paths module.
Definition: IfxCif.h:582
IfxCif_JpeScalingValueSources_Y
scaling Y input from [16..235] to [0..255]
Definition: IfxCif.h:465
IfxCif_getLinearDownscalerEnableState
IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier.
Definition: IfxCif.c:1681
IfxCif_setEpCroppingEnableState
void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path.
Definition: IfxCif.c:2821
IfxCif_LinearDownscalerScalingMode_SingleSkip
Scaling mode single skip.
Definition: IfxCif.h:290
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxCif_JpeScalingValueSources
IfxCif_JpeScalingValueSources
Enumerator for the input scaling values of the JPEG encoder.
Definition: IfxCif.h:463
IfxCif_getEpInitialOffsetCounter
uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path.
Definition: IfxCif.c:848
IfxCif_MiInterruptSources
IfxCif_MiInterruptSources
Enumerator for interrupt sources of the memory interface submodule.
Definition: IfxCif.h:320
IfxCif_resetModule
void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb)
resets CIF kernel
Definition: IfxCif.c:2662
IfxCif_MiStatusClearSources_MainPictureYFifoFull
Y FIFO full flag in main path.
Definition: IfxCif.h:361
IfxCif_getEpSize
uint32 IfxCif_getEpSize(IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path.
Definition: IfxCif.c:997
IfxCif_ImageTiers
IfxCif_ImageTiers
Enumerator for tiers.
Definition: IfxCif.h:111
IfxCif_getMaskedEpInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt.
Definition: IfxCif.c:1771
IfxCif_getEpInterruptOffset
uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path.
Definition: IfxCif.c:906
IfxCif_getEpWriteFormat
IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z)
Function to query the write format of one extra path.
Definition: IfxCif.c:1016
IfxCif_clearSecurityWatchdogInterrupt
void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:250
IfxCif_SecurityWatchdogInterruptSources
IfxCif_SecurityWatchdogInterruptSources
Enumerator for interrupt sources of the security watchdog submodule.
Definition: IfxCif.h:523
IfxCif_ErrorState
IfxCif_ErrorState
Enumerator for the state of an error.
Definition: IfxCif.h:92
IfxCif_setMiMainPictureComponentInitialOffsetCounter
void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component...
Definition: IfxCif.c:3775
IfxCif_getJpegCodecImageSize
uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier.
Definition: IfxCif.c:1647
IfxCif_setLinearDownscalerScalingFactor
void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier.
Definition: IfxCif.c:3562
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout
Horizontal Start End Interrupt.
Definition: IfxCif.h:528
IfxCif_EpErrorSources_ExtraPath3SizeError
Size error in image cropping unit of extra path 3.
Definition: IfxCif.h:565
IfxCif_MiInterruptSources_FillMainPictureY
Main picture Y address wrap interrupt.
Definition: IfxCif.h:326
IfxCif_MiStatusInformationSources_BusWriteError
An Bus error occurred while writing to the Bus (main/self path) since last clear. ...
Definition: IfxCif.h:368
IfxCif_DpControlSources_UserDefinedSymbol8
User defined symbol 8.
Definition: IfxCif.h:609
IfxCif_setHuffmanDcTableLength
void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values.
Definition: IfxCif.c:3121
IfxCif_EpFeatures_ByteSwap
Byte swap feature.
Definition: IfxCif.h:576
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCif_MiStatusClearSources
IfxCif_MiStatusClearSources
Enumerator for status clear sources of the memory interface module.
Definition: IfxCif.h:351
IfxCif_EpErrorSources_ExtraPath5SizeError
Size error in image cropping unit of extra path 5.
Definition: IfxCif.h:563
IfxCif_setMiLuminanceBurstLength
void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data.
Definition: IfxCif.c:3721
IfxCif_IspInterruptSources_SecurityWatchdogTimeout
A watchdog timeout was triggered at the ISP input.
Definition: IfxCif.h:245
IfxCif_EpErrorClearSources_ExtraPath5SizeError
Size error in image cropping unit of extra path 5.
Definition: IfxCif.h:547
IfxCif_MiStatusInformationSources_MainPictureYFifoFull
FIFO full flag of Y FIFO in main path asserted since last clear.
Definition: IfxCif.h:371
IfxCif_MiMainPicturePathComponents_Cb
Cb-component.
Definition: IfxCif.h:336
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd
Timeout counter for Start End phase.
Definition: IfxCif.h:536
IfxCif_JpeQTableSelectorComponents_Y
Y-component.
Definition: IfxCif.h:456
IfxCif_setJpeQTableSelector
void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component.
Definition: IfxCif.c:3486
IfxCif_setSecurityWatchdogTimeout
void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the tim...
Definition: IfxCif.c:3863
IfxCif_getJpeScalingEnableState
IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source.
Definition: IfxCif.c:1626
IfxCif_Submodules_AllModules
All submodules.
Definition: IfxCif.h:152
IfxCif_DpControlSources_UserDefinedSymbol2
User defined symbol 2.
Definition: IfxCif.h:615
IfxCif_getMiFeatureEnableState
IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path.
Definition: IfxCif.c:2021
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxCif_State
IfxCif_State
Enumerator for states.
Definition: IfxCif.h:142
IfxCif_getIspisCurrentPictureOffset
uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier.
Definition: IfxCif.c:1413
IfxCif_EpErrorSources_ExtraPath2SizeError
Size error in image cropping unit of extra path 2.
Definition: IfxCif.h:566
IfxCif_getLinearDownscalerScalingFactor
uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier...
Definition: IfxCif.c:1702
IfxCif_IspErrorSources_SizeErrorInInformSubmodule
ize error is generated in inform submodule
Definition: IfxCif.h:206
IfxCif_setIspisPictureSize
void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier.
Definition: IfxCif.c:3403
IfxCif_MiStatusClearSources_MainPictureCbFifoFull
Cb FIFO full flag in main path.
Definition: IfxCif.h:360
IfxCif_SecurityWatchdogTimeoutCounters_EndStart
Timeout counter for End Start phase.
Definition: IfxCif.h:535
IfxCif_getMiMainPictureComponentBaseAddress
uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component...
Definition: IfxCif.c:2087
IfxCif_getMainPictureComponentBaseInitAddress
uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component...
Definition: IfxCif.c:1744
IfxCif_getEpOffsetCounter
uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path.
Definition: IfxCif.c:925
IfxCif_getMaskedIspInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1795
IfxCif_EpFeatures_InitBaseAddress
Init buffer base address.
Definition: IfxCif.h:575
IfxCif_getEpCroppingCurrentPictureSize
uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path...
Definition: IfxCif.c:571
IfxCif_setLinearDownscalerScalingModes
void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3614
IfxCif_setHuffmanDcTableSelector
void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values.
Definition: IfxCif.c:3138
IfxCif_getCurrentIspPictureOffset
uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier.
Definition: IfxCif.c:332
IfxCif_DpControlSources
IfxCif_DpControlSources
Enumerator for debug path control sources.
Definition: IfxCif.h:607
IfxCif_getJpeQTableSelector
IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component.
Definition: IfxCif.c:1601
IfxCif_DpControlSources_LineNumberCounter
Line number counter.
Definition: IfxCif.h:618
IfxCif_State_Enabled
Enabled state.
Definition: IfxCif.h:145
IfxCif_Submodules_LinearDownscaler
Linear Downscaler submodule.
Definition: IfxCif.h:155
IfxCif_JpeScalingValueSources_CbCr
scaling Cb/Cr input from [16..240] to [0..255]
Definition: IfxCif.h:466
IfxCif_InterruptTriggeredState_NotTriggered
Interrupt was not triggered.
Definition: IfxCif.h:128
IfxCif_programJpeTable
void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
Definition: IfxCif.c:2614
IfxCif_getMiStatusInformation
IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface mod...
Definition: IfxCif.c:2243
IfxCif_setIspPictureSize
void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier.
Definition: IfxCif.c:3335
IfxCif_getLinearDownscalerScalingMode
IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier.
Definition: IfxCif.c:1723
IfxCif_LinearDownscalerScalingMode
IfxCif_LinearDownscalerScalingMode
Enumerator for scaling mode of linear downscaler.
Definition: IfxCif.h:288
IfxCif_MiDataPaths_RawData
RAW data path.
Definition: IfxCif.h:313
IfxCif_setIspInputSelectionAppendState
void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal.
Definition: IfxCif.c:3230
IfxCif_setMiFeatureEnableState
void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path.
Definition: IfxCif.c:3626
IfxCif_DpControlSources_UserDefinedSymbol5
User defined symbol 5.
Definition: IfxCif.h:612
IfxCif_setMiMainPictureComponentInitSize
void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component.
Definition: IfxCif.c:3752
IfxCif_EpErrorSources_ExtraPath3FifoFull
FIFO of extra path 3 is full.
Definition: IfxCif.h:560
IfxCif_getRawJpeInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2359
IfxCif_setEpCroppingCameraDisplacement
void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path.
Definition: IfxCif.c:2797
IfxCif_MiBurstLength
IfxCif_MiBurstLength
Enumerator for burst length affecting the write port of the memory interface.
Definition: IfxCif.h:303
IfxCif_SecurityWatchdogCounters_Vertical
Vertical counter.
Definition: IfxCif.h:517
IfxCif_setEpInitialOffsetCounter
void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path.
Definition: IfxCif.c:2996
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout
Vertical End Start Interrupt.
Definition: IfxCif.h:525
IfxCif_JpeInterruptSources_DcTableError
DC Table error.
Definition: IfxCif.h:436
IfxCif_setJpeInterruptEnableState
void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3420
IfxCif_setEpFeatureEnableState
void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path.
Definition: IfxCif.c:2934
IfxCif_JpeDebugSignalSources_QiqTableAccess
QiqTableAccess.
Definition: IfxCif.h:403
IfxCif_setIspOutputWindowOffset
void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier.
Definition: IfxCif.c:3318
IfxCif_setHuffmanAcTableSelector
void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values.
Definition: IfxCif.c:3104
IfxCif_setLinearDownscalerEnableState
void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier.
Definition: IfxCif.c:3541
IfxCif_setMiInterruptEnableState
void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3647
IfxCif_EpWriteFormat_Raw8Bit
Raw 8 bit mode.
Definition: IfxCif.h:596
IfxCif_MiDataPaths_MainPictureData
main picture data path
Definition: IfxCif.h:315
IfxCif_setEpCroppingOffsetsOutputWindow
void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path.
Definition: IfxCif.c:2882
IfxCif_setLinearDownscalerScalingMode
void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3593
IfxCif_EpFeatures_PictureDataPath
enables the extra path picture data path
Definition: IfxCif.h:577
IfxCif_MiStatusClearSources_ExtraPath3FifoFull
FIFO full flag in extra path 3.
Definition: IfxCif.h:355
IfxCif_IspErrorSources
IfxCif_IspErrorSources
Enumerator for error sources of the ISP module.
Definition: IfxCif.h:202
IfxCif_setIspisMaximumDisplacement
void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier.
Definition: IfxCif.c:3369
IfxCif_getIspisCameraDisplacement
uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier.
Definition: IfxCif.c:1392
IfxCif_ExtraPath
IfxCif_ExtraPath
Enumerator for the extra paths.
Definition: IfxCif.h:100
IfxCif_EpErrorClearSources_ExtraPath3SizeError
Size error in image cropping unit of extra path 3.
Definition: IfxCif.h:549
IfxCif_setEpRecenterValue
void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off...
Definition: IfxCif.c:3061
IfxCif_setJpeScalingEnableState
void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source.
Definition: IfxCif.c:3507
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull
FIFO full flag of Cr FIFO in main path asserted since last clear.
Definition: IfxCif.h:369
IfxCif_clearIspInterrupt
void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:98
IfxCif_ErrorState_Error
Error occurred.
Definition: IfxCif.h:95
IfxCif_getEpCroppingMaximumDisplacement
uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path.
Definition: IfxCif.c:616
IfxCif_setEpInitialFillLevelInterruptOffset
void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path.
Definition: IfxCif.c:2981
IfxCif_getEpInitialFillLevelInterruptOffset
uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path.
Definition: IfxCif.c:829
IfxCif_JpeInterruptSources_HeaderGenerationComplete
Header generation complete.
Definition: IfxCif.h:438
IfxCif_HuffmanTables
IfxCif_HuffmanTables
Enumerator for the Huffman Tables.
Definition: IfxCif.h:389
IfxCif_setIspAcquisitionOffset
void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier.
Definition: IfxCif.c:3196
IfxCif_JpeTableId_VlcAcTable1
VLC AC Table 1.
Definition: IfxCif.h:488
IfxCif_EpErrorClearSources_ExtraPath2SizeError
Size error in image cropping unit of extra path 2.
Definition: IfxCif.h:550
IfxCif_JpeTableId_VlcAcTable0
VLC AC Table 0.
Definition: IfxCif.h:486
IfxCif_JpeInterruptSources
IfxCif_JpeInterruptSources
Enumerator for interrupt sources of the JPEG encoder module.
Definition: IfxCif.h:432
IfxCif_clearEpError
void IfxCif_clearEpError(IfxCif_EpErrorClearSources source)
Function to clear one extra path error.
Definition: IfxCif.c:35
IfxCif_setIspisCameraDisplacement
void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier.
Definition: IfxCif.c:3352
IfxCif_clearIspError
void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source.
Definition: IfxCif.c:77
IfxCif_getIspisMaximumDisplacement
uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier.
Definition: IfxCif.c:1455
IfxCif_epForceConfigurationUpdate
void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path.
Definition: IfxCif.c:300
IfxCif_DpControlSources_UserDefinedSymbol7
User defined symbol 7.
Definition: IfxCif.h:610
IfxCif_getRawSecurityWatchdogInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt.
Definition: IfxCif.c:2437
IfxCif_clearJpeInterrupt
void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:135
IfxCif_MiStatusInformationSources
IfxCif_MiStatusInformationSources
Enumerator for status information sources of the memory interface submodule.
Definition: IfxCif.h:366
IfxCif_Submodules_ImageSignalProcessing
Image Signal Processing submodule.
Definition: IfxCif.h:159
IfxCif_setEpCroppingOffsetOutputWindow
void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path...
Definition: IfxCif.c:2858
IfxCif_EpErrorSources_ExtraPath4SizeError
Size error in image cropping unit of extra path 4.
Definition: IfxCif.h:564
IfxCif_Submodules
IfxCif_Submodules
Enumerator for submodules of the CIF interface.
Definition: IfxCif.h:150
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:87
IfxCif_getMiDataPathOutputEnableState
IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output...
Definition: IfxCif.c:1996
IfxCif_SecurityWatchdogCounters
IfxCif_SecurityWatchdogCounters
Enumerator for watchdog counters.
Definition: IfxCif.h:514
IfxCif_LinearDownscalerScalingMode_Disabled
Disabled.
Definition: IfxCif.h:294
IfxCif_getDpControlEnableState
IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source.
Definition: IfxCif.c:374
IfxCif_getRawMiInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2396
IfxCif_JpeTableId_QTable1
Q-Table 1.
Definition: IfxCif.h:482
IfxCif_JpeDebugSignalSources_VlcTableBusy
Debug VLC Table Busy (vlc access to hufftables)
Definition: IfxCif.h:400
IfxCif_MiDataPaths
IfxCif_MiDataPaths
Enumerator for data paths of the memory interface.
Definition: IfxCif.h:311
IfxCif_JpeQTableSelector
IfxCif_JpeQTableSelector
Enumerator for the Q-Table selector.
Definition: IfxCif.h:444
IfxCif_JpeDebugSignalState
IfxCif_JpeDebugSignalState
Enumerator for the debug signal state.
Definition: IfxCif.h:408
IfxCif_getMaskedJpeInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1864
IfxCif_getHuffmanDcTableSelectorState
IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values...
Definition: IfxCif.c:1102
IfxCif_clearMiInterrupt
void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:168
IfxCif_getEpOffsetCounterStart
uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path.
Definition: IfxCif.c:944
IfxCif_DpCounters_PredividerCounter
Predivider counter.
Definition: IfxCif.h:626
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout
Horizontal End Start Interrupt.
Definition: IfxCif.h:527
IfxCif_DpControlSources_UserDefinedSymbol3
User defined symbol 3.
Definition: IfxCif.h:614
IfxCif_EpFeatures_InitOffsetCounter
Init offest counter.
Definition: IfxCif.h:574
IfxCif_EpErrorClearSources_ExtraPath1SizeError
Size error in image cropping unit of extra path 1.
Definition: IfxCif.h:551
IfxCif_State_Disabled
Disabled state.
Definition: IfxCif.h:144
IfxCif_EpErrorSources_ExtraPath5FifoFull
FIFO of extra path 5 is full.
Definition: IfxCif.h:558
IfxCif_EpErrorSources_ExtraPath1FifoFull
FIFO of extra path 1 is full.
Definition: IfxCif.h:562
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule
Size error is generated in outmux submodule.
Definition: IfxCif.h:204
IfxCif_getMiMainPictureComponentOffsetCounter
uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path componen...
Definition: IfxCif.c:2166
IfxCif_JpeTableId
IfxCif_JpeTableId
Enumerator for the JPE Tables.
Definition: IfxCif.h:479
IfxCif_setIspInterruptEnableState
void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3244
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule
Size error is generated in image stabilization submodule.
Definition: IfxCif.h:205
IfxCif_IspInterruptSources_StartEdgeOfVSync
Start Edge of v_sync.
Definition: IfxCif.h:247
IfxCif_setIspInterruptRequestBit
void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3281
IfxCif_getEpInitSize
uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:810
IfxCif_MiInterruptSources_WrapMainPictureCr
Main picture Cr address wrap interrupt.
Definition: IfxCif.h:323
IfxCif_getIspErrorState
IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source.
Definition: IfxCif.c:1234
IfxCif_setEpCroppingMaximumDisplacement
void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path.
Definition: IfxCif.c:2834
IfxCif_setEpCroppingPictureSize
void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path.
Definition: IfxCif.c:2896
IfxCif_getEpErrorState
IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source)
Function to query the state of an extra path error source.
Definition: IfxCif.c:720
IfxCif_JpeQTableSelectorComponents
IfxCif_JpeQTableSelectorComponents
Enumerator for the components to select Q-Tables.
Definition: IfxCif.h:454
IfxCif_setEpInitSize
void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:2966
IfxCif_getDpCounter
uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter.
Definition: IfxCif.c:431
IfxCif_DpControlSources_UserDefinedSymbol6
User defined symbol 6.
Definition: IfxCif.h:611
IfxCif_getHuffmanAcTableSelectorState
IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values...
Definition: IfxCif.c:1054
IfxCif_setJpegCodecImageSize
void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier.
Definition: IfxCif.c:3524
IfxCif_getEpCroppingCameraDisplacement
uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path...
Definition: IfxCif.c:515
IfxCif_getRawIspInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2294
IfxCif_IspInterruptSources_IspTurnedOff
Isp was Turned Off (vsynced)
Definition: IfxCif.h:252
IfxCif_MiDataPaths_JpegData
JPEG data path.
Definition: IfxCif.h:314
IfxCif_getIspInterruptEnableState
IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:1285
IfxCif_DpCounters_TimestampCounter
Timestamp counter.
Definition: IfxCif.h:627
IfxCif_JpeInterruptSources_EncodingComplete
Encoding complete.
Definition: IfxCif.h:439
IfxCif_getSecurityWatchdogTimeout
uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier.
Definition: IfxCif.c:2495
IfxCif_DpControlSources_FrameNumberCounter
Frame number counter.
Definition: IfxCif.h:619
IfxCif_getEpCroppingRecenterState
IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path.
Definition: IfxCif.c:700
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout
Vertical Start End Interrupt.
Definition: IfxCif.h:526
IfxCif_getMiInterruptEnableState
IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:2046
IfxCif_MiInterruptSources_MacroBlockLine
Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written...
Definition: IfxCif.h:327
IfxCif_MiStatusClearSources_ExtraPath4FifoFull
FIFO full flag in extra path 4.
Definition: IfxCif.h:354
IfxCif_DpControlSources_UserDefinedSymbol1
User defined symbol 1.
Definition: IfxCif.h:616
IfxCif_getIspAcquisitionSize
uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier.
Definition: IfxCif.c:1213
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxCif_getEpBaseInitAddress
uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:496
IfxCif_getSoftwareResetMode
IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule)
Function to query the reset mode of a submodule.
Definition: IfxCif.c:2538
IfxCif_IspInterruptSources_FrameCompletelyPutOut
Frame was Completely Put Out.
Definition: IfxCif.h:251
IfxCif_getJpeInterruptEnableState
IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:1564
IfxCif_JpeTableId_QTable0
Q-Table 0.
Definition: IfxCif.h:481
IfxCif_setIspisOutputWindowOffset
void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier.
Definition: IfxCif.c:3386
IfxCif_getSecurityWatchdogInterruptEnableState
IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:2466
IfxCif_MiMainPicturePathComponents_Y
Y-component.
Definition: IfxCif.h:335
IfxCif_getCurrentIspPictureSize
uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier.
Definition: IfxCif.c:353
IfxCif_JpeDebugSignalSources_BadTableAccess
Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed...
Definition: IfxCif.h:399
IfxCif_Submodules_MemoryInterface
Memory Interface submodule.
Definition: IfxCif.h:157
IfxCif_MiStatusClearSources_ExtraPath2FifoFull
FIFO full flag in extra path 2.
Definition: IfxCif.h:356
IfxCif_EpErrorSources_ExtraPath2FifoFull
FIFO of extra path 2 is full.
Definition: IfxCif.h:561
IfxCif_MiInterruptSources_MainPictureFrameEnd
Picture end of frame interrupt.
Definition: IfxCif.h:328
IfxCif_getIspAcquisitionOffset
uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier.
Definition: IfxCif.c:1192
IfxCif_Submodules_ExtraPaths
Extra Paths submodule.
Definition: IfxCif.h:154
IfxCif_setSoftwareResetMode
void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule.
Definition: IfxCif.c:3902
IfxCif_setEpOffsetCounterStart
void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path.
Definition: IfxCif.c:3046
IfxCif_setIspAcquisitionSize
void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier.
Definition: IfxCif.c:3213
IfxCif_EpErrorSources_ExtraPath1SizeError
Size error in image cropping unit of extra path 1.
Definition: IfxCif.h:567
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxCif_JpeQTableSelectorComponents_U
U-component.
Definition: IfxCif.h:457
IfxCif_setInternalClockMode
void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule.
Definition: IfxCif.c:3155
IfxCif_clearMiStatus
void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule...
Definition: IfxCif.c:205
IfxCif_setModuleStateRequest
void IfxCif_setModuleStateRequest(IfxCif_State state)
Function to request enabling or disabling of the CIF module.
Definition: IfxCif.c:3798
IfxCif_getEpBaseAddress
uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path.
Definition: IfxCif.c:477
IfxCif_ErrorState_NoError
No error occurred.
Definition: IfxCif.h:94
IfxCif_dpResetCounter
void IfxCif_dpResetCounter(IfxCif_DpCounters counter)
Function to reset one debug path counter.
Definition: IfxCif.c:275
IfxCif_setSecurityWatchdogInterruptEnableState
void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3813
IfxCif_setEpInterruptRequestBit
void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3033
IfxCif_EpErrorClearSources_ExtraPath4SizeError
Size error in image cropping unit of extra path 4.
Definition: IfxCif.h:548
IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt.
Definition: IfxCif.c:1942
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCif_JpeQTableSelectorComponents_V
V-component.
Definition: IfxCif.h:458
IfxCif_IspInterruptSources_SampledInputFrameComplete
Sampled Input Frame is Complete.
Definition: IfxCif.h:248
IfxCif_JpeInterruptSources_VlcTableError
VLC table error.
Definition: IfxCif.h:434
IfxCif_getIspisOffsetOutputWindow
uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier...
Definition: IfxCif.c:1476
IfxCif_JpeDebugSignalSources
IfxCif_JpeDebugSignalSources
Enumerator for the debug signal sources.
Definition: IfxCif.h:397
IfxCif_SecurityWatchdogTimeoutCounters
IfxCif_SecurityWatchdogTimeoutCounters
Enumerator for watchdog timeout counters.
Definition: IfxCif.h:533
IfxCif_getEpOutputEnableState
IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path.
Definition: IfxCif.c:963
IfxCif_EpErrorSources
IfxCif_EpErrorSources
Enumerator for error sources of extra paths.
Definition: IfxCif.h:556
IfxCif_getEpRecenterValue
uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path.
Definition: IfxCif.c:980
IfxCif_JpeTableId_VlcDcTable1
VLC DC Table 1.
Definition: IfxCif.h:487
IfxCif_DpCounters
IfxCif_DpCounters
Enumerator for debug path counters.
Definition: IfxCif.h:624
IfxCif_DpControlSources_TimestampCounter
Timestamp counter.
Definition: IfxCif.h:617
IfxCif_MiStatusClearSources_ExtraPath5FifoFull
FIFO full flag in extra path 5.
Definition: IfxCif.h:353
IfxCif_EpErrorSources_ExtraPath4FifoFull
FIFO of extra path 4 is full.
Definition: IfxCif.h:559
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull
FIFO full flag of Cb FIFO in main path asserted since last clear.
Definition: IfxCif.h:370
IfxCif_IspInterruptSources
IfxCif_IspInterruptSources
Enumerator for interrupt sources of the ISP submodule.
Definition: IfxCif.h:243
IfxCif_HuffmanTables_Table1
Huffman Table 1.
Definition: IfxCif.h:392
IfxCif_EpFeatures
IfxCif_EpFeatures
Enumerator for extra path features.
Definition: IfxCif.h:572
IfxCif_InterruptTriggeredState_Triggered
Interrupt was triggered.
Definition: IfxCif.h:129
IfxCif_resetSecurityWatchdogCounter
void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter.
Definition: IfxCif.c:2681
IfxCif_IspInterruptSources_StartEdgeOfHSync
Start Edge of h_sync.
Definition: IfxCif.h:246
IfxCif_setEpWriteFormat
void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path.
Definition: IfxCif.c:3074
IfxCif_getMaskedMiInterruptTriggeredState
IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1901
IfxCif_getDpUserDefinedSymbol
uint16 IfxCif_getDpUserDefinedSymbol(uint8 x)
Function to query the value of one user defined debug symbol.
Definition: IfxCif.c:460
IfxCif_getEpCroppingCurrentPictureOffset
uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path...
Definition: IfxCif.c:543
IfxCif_Submodules_YCSplitter
Y/C-Splitter submodule.
Definition: IfxCif.h:160
IfxCif_setDpCounter
void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value.
Definition: IfxCif.c:2755
IfxCif_getEpCroppingPictureSize
uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path.
Definition: IfxCif.c:672


iLLD_TC26B: IfxCif.h Source File

  • Cif
  • Std
IfxCif.h
Go to the documentation of this file.
1 /**
2 * \file IfxCif.h
3 * \brief CIF basic functionality
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Cif_Std_stdEnumerations Standard Enumerations
25 * \ingroup IfxLld_Cif_Std
26 * \defgroup IfxLld_Cif_Std_ispEnum ISP Enumerations
27 * \ingroup IfxLld_Cif_Std
28 * \defgroup IfxLld_Cif_Std_stdFunctions Standard Functions
29 * \ingroup IfxLld_Cif_Std
30 * \defgroup IfxLld_Cif_Std_ispFunctions ISP Functions
31 * \ingroup IfxLld_Cif_Std
32 * \defgroup IfxLld_Cif_Std_ldsFunctions Linear Downscaler Functions
33 * \ingroup IfxLld_Cif_Std
34 * \defgroup IfxLld_Cif_Std_ldsEnumerations Linear Downscaler Enumerations
35 * \ingroup IfxLld_Cif_Std
36 * \defgroup IfxLld_Cif_Std_miFunctions Memory Interface Functions
37 * \ingroup IfxLld_Cif_Std
38 * \defgroup IfxLld_Cif_Std_miEnumerations Memory Interface Enumerations
39 * \ingroup IfxLld_Cif_Std
40 * \defgroup IfxLld_Cif_Std_jpeFunctions JPEG Encoder Functions
41 * \ingroup IfxLld_Cif_Std
42 * \defgroup IfxLld_Cif_Std_jpeEnumerations JPEG Encoder Enumerations
43 * \ingroup IfxLld_Cif_Std
44 * \defgroup IfxLld_Cif_Std_swFunctions Security Watchdog Functions
45 * \ingroup IfxLld_Cif_Std
46 * \defgroup IfxLld_Cif_Std_swEnumerations Security Watchdog Enumerations
47 * \ingroup IfxLld_Cif_Std
48 * \defgroup IfxLld_Cif_Std_ispisFunctions ISP Image Stabilization Functions
49 * \ingroup IfxLld_Cif_Std
50 * \defgroup IfxLld_Cif_Std_ispisEnumerations ISP Image Stabilization Enumerations
51 * \ingroup IfxLld_Cif_Std
52 * \defgroup IfxLld_Cif_Std_epFunctions Extra Path Functions
53 * \ingroup IfxLld_Cif_Std
54 * \defgroup IfxLld_Cif_Std_epEnumerations Extra Path Enumerations
55 * \ingroup IfxLld_Cif_Std
56 * \defgroup IfxLld_Cif_Std_dpFunctions Debug Path Functions
57 * \ingroup IfxLld_Cif_Std
58 * \defgroup IfxLld_Cif_Std_dpEnumerations Debug Path Enumerations
59 * \ingroup IfxLld_Cif_Std
60 */
61
62 #ifndef IFXCIF_H
63 #define IFXCIF_H 1
64
65 /******************************************************************************/
66 /*----------------------------------Includes----------------------------------*/
67 /******************************************************************************/
68
69 #include "_Impl/IfxCif_cfg.h"
70 #include "Scu/Std/IfxScuWdt.h"
71 #include "IfxCif_bf.h"
72 #include "IfxCif_reg.h"
73 #include "Cpu/Std/IfxCpu_Intrinsics.h"
74
75 /******************************************************************************/
76 /*--------------------------------Enumerations--------------------------------*/
77 /******************************************************************************/
78
79 /** \addtogroup IfxLld_Cif_Std_stdEnumerations
80 * \{ */
81 /** \brief Enumerator for data path of main path
82 */
83 typedef enum
84 {
85 IfxCif_DataPathSelectorForMainPath_Disabled = 0, /**< \brief Main path is disabled */
86 IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed = 1, /**< \brief Main path is routed to the Memory Interface */
87 IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder = 2 /**< \brief Main path is routed to the JPEG encoder */
88 } IfxCif_DataPathSelectorForMainPath;
89
90 /** \brief Enumerator for the state of an error
91 */
92 typedef enum
93 {
94 IfxCif_ErrorState_NoError = 0, /**< \brief No error occurred */
95 IfxCif_ErrorState_Error = 1 /**< \brief Error occurred */
96 } IfxCif_ErrorState;
97
98 /** \brief Enumerator for the extra paths
99 */
100 typedef enum
101 {
102 IfxCif_ExtraPath_1 = 0,
103 IfxCif_ExtraPath_2 = 1,
104 IfxCif_ExtraPath_3 = 2,
105 IfxCif_ExtraPath_4 = 3,
106 IfxCif_ExtraPath_5 = 4
107 } IfxCif_ExtraPath;
108
109 /** \brief Enumerator for tiers
110 */
111 typedef enum
112 {
113 IfxCif_ImageTiers_Horizontal = 0, /**< \brief Horizontal tier */
114 IfxCif_ImageTiers_Vertical = 1 /**< \brief Vertical tier */
115 } IfxCif_ImageTiers;
116
117 /** \brief Enumerator for input interfaces supported by the CIF interface
118 */
119 typedef enum
120 {
121 IfxCif_InputInterface_ParallelInterface = 0 /**< \brief Parallel interface (currently the only supported input interface) */
122 } IfxCif_InputInterface;
123
124 /** \brief Enumerator for the state of an interrupt
125 */
126 typedef enum
127 {
128 IfxCif_InterruptTriggeredState_NotTriggered = 0, /**< \brief Interrupt was not triggered */
129 IfxCif_InterruptTriggeredState_Triggered = 1 /**< \brief Interrupt was triggered */
130 } IfxCif_InterruptTriggeredState;
131
132 /** \brief Enumerator for port input selections
133 */
134 typedef enum
135 {
136 IfxCif_PortInputSelection_PinMapping0 = 0, /**< \brief pin mapping 0 */
137 IfxCif_PortInputSelection_PinMapping1 = 1 /**< \brief pin mapping 1 */
138 } IfxCif_PortInputSelection;
139
140 /** \brief Enumerator for states
141 */
142 typedef enum
143 {
144 IfxCif_State_Disabled = 0, /**< \brief Disabled state */
145 IfxCif_State_Enabled = 1 /**< \brief Enabled state */
146 } IfxCif_State;
147
148 /** \brief Enumerator for submodules of the CIF interface
149 */
150 typedef enum
151 {
152 IfxCif_Submodules_AllModules = 0, /**< \brief All submodules */
153 IfxCif_Submodules_Debug = 1, /**< \brief Debug submodule */
154 IfxCif_Submodules_ExtraPaths = 2, /**< \brief Extra Paths submodule */
155 IfxCif_Submodules_LinearDownscaler = 3, /**< \brief Linear Downscaler submodule */
156 IfxCif_Submodules_SecurityWatchdog = 4, /**< \brief Security Watchdog submodule */
157 IfxCif_Submodules_MemoryInterface = 5, /**< \brief Memory Interface submodule */
158 IfxCif_Submodules_JpegEncoder = 6, /**< \brief JPEG Encoder submodule */
159 IfxCif_Submodules_ImageSignalProcessing = 7, /**< \brief Image Signal Processing submodule */
160 IfxCif_Submodules_YCSplitter = 8 /**< \brief Y/C-Splitter submodule */
161 } IfxCif_Submodules;
162
163 /** \brief Enumerator for channel mode of Y/C splitter
164 */
165 typedef enum
166 {
167 IfxCif_YCSplitterChannelMode_Disabled = 0, /**< \brief Y/C splitter is disabled */
168 IfxCif_YCSplitterChannelMode_MainPathAndRawMode = 1 /**< \brief Y/C splitter is enabled for main path and RAW mode */
169 } IfxCif_YCSplitterChannelMode;
170
171 /** \} */
172
173 /** \addtogroup IfxLld_Cif_Std_ispEnum
174 * \{ */
175 /** \brief Enumerator for the ISP CCIR sequence
176 */
177 typedef enum
178 {
179 IfxCif_IspCcirSequence_YCbYCr = 0, /**< \brief YCbYCr */
180 IfxCif_IspCcirSequence_YCrYCb = 1, /**< \brief YCrYCb */
181 IfxCif_IspCcirSequence_CbYCrY = 2 /**< \brief CbYCrY */
182 } IfxCif_IspCcirSequence;
183
184 /** \brief Enumerator for the clipping range of the crominance for the ISP output
185 */
186 typedef enum
187 {
188 IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 = 0, /**< \brief CbCr range 16..240 according to ITU-R BT.601 standard */
189 IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 = 1 /**< \brief full UV range 0..255 */
190 } IfxCif_IspColorSpaceMatrixCrominanceClippingRange;
191
192 /** \brief Enumerator for the clipping range of the luminance for the ISP output
193 */
194 typedef enum
195 {
196 IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 = 0, /**< \brief Y range 16..235 according to ITU-R BT.601 standard */
197 IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 = 1 /**< \brief full Y range 0..255 */
198 } IfxCif_IspColorSpaceMatrixLuminanceClippingRange;
199
200 /** \brief Enumerator for error sources of the ISP module
201 */
202 typedef enum
203 {
204 IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule = 0, /**< \brief Size error is generated in outmux submodule */
205 IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule = 1, /**< \brief Size error is generated in image stabilization submodule */
206 IfxCif_IspErrorSources_SizeErrorInInformSubmodule = 2 /**< \brief ize error is generated in inform submodule */
207 } IfxCif_IspErrorSources;
208
209 /** \brief Enumerator for the sampled input fields
210 */
211 typedef enum
212 {
213 IfxCif_IspFieldSelection_AllFields = 0, /**< \brief sample all fields (don't care about fields) */
214 IfxCif_IspFieldSelection_OnlyEvenFields = 1, /**< \brief sample only even fields */
215 IfxCif_IspFieldSelection_OnlyOddFields = 2 /**< \brief sample only odd fields */
216 } IfxCif_IspFieldSelection;
217
218 /** \brief Enumerator for current field information
219 */
220 typedef enum
221 {
222 IfxCif_IspInformFieldInformation_Odd = 0, /**< \brief Odd field */
223 IfxCif_IspInformFieldInformation_Even = 1 /**< \brief Even field */
224 } IfxCif_IspInformFieldInformation;
225
226 /** \brief Enumerator for the supported input interfaces of the ISP
227 */
228 typedef enum
229 {
230 IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb = 0, /**< \brief 8-bit external Interface if enabled append 8 MSBs as LSBs */
231 IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros = 1, /**< \brief 8-bit external Interface if enabled append 8 zeroes as LSBs */
232 IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb = 2, /**< \brief 10-bit external Interface if enabled append 6 MSBs as LSBs */
233 IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros = 3, /**< \brief 10-bit external Interface if enabled append 6 zeroes as LSBs */
234 IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb = 4, /**< \brief 12-bit external Interface if enabled append 4 MSBs as LSBs */
235 IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros = 5, /**< \brief 12-bit external Interface if enabled append 4 zeroes as LSBs */
236 IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb = 6, /**< \brief 14-bit external Interface if enabled append 2 MSBs as LSBs */
237 IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros = 7, /**< \brief 14-bit external Interface if enabled append 2 zeroes as LSBs */
238 IfxCif_IspInputInterface_16BitExternalInterface = 8 /**< \brief 16-bit external Interface */
239 } IfxCif_IspInputInterface;
240
241 /** \brief Enumerator for interrupt sources of the ISP submodule
242 */
243 typedef enum
244 {
245 IfxCif_IspInterruptSources_SecurityWatchdogTimeout = 0, /**< \brief A watchdog timeout was triggered at the ISP input */
246 IfxCif_IspInterruptSources_StartEdgeOfHSync = 1, /**< \brief Start Edge of h_sync */
247 IfxCif_IspInterruptSources_StartEdgeOfVSync = 2, /**< \brief Start Edge of v_sync */
248 IfxCif_IspInterruptSources_SampledInputFrameComplete = 3, /**< \brief Sampled Input Frame is Complete */
249 IfxCif_IspInterruptSources_PictureSizeViolationOccurred = 4, /**< \brief Picture Size Violation Occurred */
250 IfxCif_IspInterruptSources_LossOfData = 5, /**< \brief Loss of Data */
251 IfxCif_IspInterruptSources_FrameCompletelyPutOut = 6, /**< \brief Frame was Completely Put Out */
252 IfxCif_IspInterruptSources_IspTurnedOff = 7 /**< \brief Isp was Turned Off (vsynced) */
253 } IfxCif_IspInterruptSources;
254
255 /** \brief Enumerator for the ISP mode
256 */
257 typedef enum
258 {
259 IfxCif_IspMode_RawPicture = 0, /**< \brief RAW picture */
260 IfxCif_IspMode_ItuRBT656 = 1, /**< \brief ITU-R BT.656 (YUV with embedded sync) */
261 IfxCif_IspMode_ItuRBT601 = 2, /**< \brief ITU-R BT.601 (YUV input with H and Vsync signals) */
262 IfxCif_IspMode_DataMode = 4, /**< \brief datamode (ISP bypass, sync signals interpreted as data enable) */
263 IfxCif_IspMode_RawPictureWithItuRBT656Sync = 6 /**< \brief RAW picture mode with ITU-R BT.656 synchronization */
264 } IfxCif_IspMode;
265
266 /** \brief Enumerator for ISP sampling edge
267 */
268 typedef enum
269 {
270 IfxCif_IspSamplingEdge_NegativeEdge = 0, /**< \brief negative edge sampling */
271 IfxCif_IspSamplingEdge_PositiveEdge = 1 /**< \brief positive edge sampling */
272 } IfxCif_IspSamplingEdge;
273
274 /** \brief
275 */
276 typedef enum
277 {
278 IfxCif_IspSyncPolarity_HighActive = 0, /**< \brief high active sync polarity */
279 IfxCif_IspSyncPolarity_LowActive = 1 /**< \brief low active sync polarity */
280 } IfxCif_IspSyncPolarity;
281
282 /** \} */
283
284 /** \addtogroup IfxLld_Cif_Std_ldsEnumerations
285 * \{ */
286 /** \brief Enumerator for scaling mode of linear downscaler
287 */
288 typedef enum
289 {
290 IfxCif_LinearDownscalerScalingMode_SingleSkip = 0, /**< \brief Scaling mode single skip */
291 IfxCif_LinearDownscalerScalingMode_DoubleSkip = 1, /**< \brief Scaling mode double skip */
292 IfxCif_LinearDownscalerScalingMode_SinglePass = 2, /**< \brief Scaling mode single pass */
293 IfxCif_LinearDownscalerScalingMode_DoublePass = 3, /**< \brief Scaling mode double pass */
294 IfxCif_LinearDownscalerScalingMode_Disabled = -1 /**< \brief Disabled */
295 } IfxCif_LinearDownscalerScalingMode;
296
297 /** \} */
298
299 /** \addtogroup IfxLld_Cif_Std_miEnumerations
300 * \{ */
301 /** \brief Enumerator for burst length affecting the write port of the memory interface
302 */
303 typedef enum
304 {
305 IfxCif_MiBurstLength_4BeatBursts = 0, /**< \brief 4-beat bursts */
306 IfxCif_MiBurstLength_8BeatBursts = 1 /**< \brief 8-beat bursts */
307 } IfxCif_MiBurstLength;
308
309 /** \brief Enumerator for data paths of the memory interface
310 */
311 typedef enum
312 {
313 IfxCif_MiDataPaths_RawData = 0, /**< \brief RAW data path */
314 IfxCif_MiDataPaths_JpegData = 1, /**< \brief JPEG data path */
315 IfxCif_MiDataPaths_MainPictureData = 2 /**< \brief main picture data path */
316 } IfxCif_MiDataPaths;
317
318 /** \brief Enumerator for interrupt sources of the memory interface submodule
319 */
320 typedef enum
321 {
322 IfxCif_MiInterruptSources_BusError = 0, /**< \brief Bus write or read error interrupt (from handshake target interfaces) */
323 IfxCif_MiInterruptSources_WrapMainPictureCr = 1, /**< \brief Main picture Cr address wrap interrupt */
324 IfxCif_MiInterruptSources_WrapMainPictureCb = 2, /**< \brief Main picture Cb address wrap interrupt */
325 IfxCif_MiInterruptSources_WrapMainPictureY = 3, /**< \brief Main picture Y address wrap interrupt */
326 IfxCif_MiInterruptSources_FillMainPictureY = 4, /**< \brief Main picture Y address wrap interrupt */
327 IfxCif_MiInterruptSources_MacroBlockLine = 5, /**< \brief Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written into RAM) */
328 IfxCif_MiInterruptSources_MainPictureFrameEnd = 6 /**< \brief Picture end of frame interrupt */
329 } IfxCif_MiInterruptSources;
330
331 /** \brief Enumerator for main picture path components of the memory interface
332 */
333 typedef enum
334 {
335 IfxCif_MiMainPicturePathComponents_Y = 0, /**< \brief Y-component */
336 IfxCif_MiMainPicturePathComponents_Cb = 1, /**< \brief Cb-component */
337 IfxCif_MiMainPicturePathComponents_Cr = 2 /**< \brief Cr-component */
338 } IfxCif_MiMainPicturePathComponents;
339
340 /** \brief Enumerator for write formats of data written into memory
341 */
342 typedef enum
343 {
344 IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit = 0, /**< \brief planar (YCbCr mode) / RAW & data mode (8 bit) */
345 IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit = 1, /**< \brief semi-planar for YCbCr 4:2:x / RAW 8 bit */
346 IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit = 2 /**< \brief interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit) */
347 } IfxCif_MiMainPictureWriteFormat;
348
349 /** \brief Enumerator for status clear sources of the memory interface module
350 */
351 typedef enum
352 {
353 IfxCif_MiStatusClearSources_ExtraPath5FifoFull = 0, /**< \brief FIFO full flag in extra path 5 */
354 IfxCif_MiStatusClearSources_ExtraPath4FifoFull = 1, /**< \brief FIFO full flag in extra path 4 */
355 IfxCif_MiStatusClearSources_ExtraPath3FifoFull = 2, /**< \brief FIFO full flag in extra path 3 */
356 IfxCif_MiStatusClearSources_ExtraPath2FifoFull = 3, /**< \brief FIFO full flag in extra path 2 */
357 IfxCif_MiStatusClearSources_ExtraPath1FifoFull = 4, /**< \brief FIFO full flag in extra path 1 */
358 IfxCif_MiStatusClearSources_BusWriteError = 5, /**< \brief Bus write error flag */
359 IfxCif_MiStatusClearSources_MainPictureCrFifoFull = 6, /**< \brief Cr FIFO full flag in main path */
360 IfxCif_MiStatusClearSources_MainPictureCbFifoFull = 7, /**< \brief Cb FIFO full flag in main path */
361 IfxCif_MiStatusClearSources_MainPictureYFifoFull = 8 /**< \brief Y FIFO full flag in main path */
362 } IfxCif_MiStatusClearSources;
363
364 /** \brief Enumerator for status information sources of the memory interface submodule
365 */
366 typedef enum
367 {
368 IfxCif_MiStatusInformationSources_BusWriteError = 0, /**< \brief An Bus error occurred while writing to the Bus (main/self path) since last clear */
369 IfxCif_MiStatusInformationSources_MainPictureCrFifoFull = 1, /**< \brief FIFO full flag of Cr FIFO in main path asserted since last clear */
370 IfxCif_MiStatusInformationSources_MainPictureCbFifoFull = 2, /**< \brief FIFO full flag of Cb FIFO in main path asserted since last clear */
371 IfxCif_MiStatusInformationSources_MainPictureYFifoFull = 3 /**< \brief FIFO full flag of Y FIFO in main path asserted since last clear */
372 } IfxCif_MiStatusInformationSources;
373
374 /** \} */
375
376 /** \addtogroup IfxLld_Cif_Std_jpeEnumerations
377 * \{ */
378 /** \brief Enumerator for the Huffman Table components
379 */
380 typedef enum
381 {
382 IfxCif_HuffmanTableComponents_Component0 = 0, /**< \brief Component 0 */
383 IfxCif_HuffmanTableComponents_Component1 = 1, /**< \brief Component 1 */
384 IfxCif_HuffmanTableComponents_Component2 = 2 /**< \brief Component 2 */
385 } IfxCif_HuffmanTableComponents;
386
387 /** \brief Enumerator for the Huffman Tables
388 */
389 typedef enum
390 {
391 IfxCif_HuffmanTables_Table0 = 0, /**< \brief Huffman Table 0 */
392 IfxCif_HuffmanTables_Table1 = 1 /**< \brief Huffman Table 1 */
393 } IfxCif_HuffmanTables;
394
395 /** \brief Enumerator for the debug signal sources
396 */
397 typedef enum
398 {
399 IfxCif_JpeDebugSignalSources_BadTableAccess = 0, /**< \brief Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed, when the JPEG_ENCODER is busy) */
400 IfxCif_JpeDebugSignalSources_VlcTableBusy = 1, /**< \brief Debug VLC Table Busy (vlc access to hufftables) */
401 IfxCif_JpeDebugSignalSources_R2BMemoryFull = 2, /**< \brief R2B Memory Full (line memory status of r2b) */
402 IfxCif_JpeDebugSignalSources_VlcEncodeBusy = 3, /**< \brief VLC Encode Busy (vlc encode processing active) */
403 IfxCif_JpeDebugSignalSources_QiqTableAccess = 4 /**< \brief QiqTableAccess */
404 } IfxCif_JpeDebugSignalSources;
405
406 /** \brief Enumerator for the debug signal state
407 */
408 typedef enum
409 {
410 IfxCif_JpeDebugSignalState_Inactive = 0, /**< \brief Debug signal is inactive */
411 IfxCif_JpeDebugSignalState_Active = 1 /**< \brief Debug signal is active */
412 } IfxCif_JpeDebugSignalState;
413
414 /** \brief Enumerator for the header generation debug control
415 */
416 typedef enum
417 {
418 IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage = 0, /**< \brief wait for encoded image data to fill output buffer */
419 IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes = 1 /**< \brief immediately transmit last header bytes */
420 } IfxCif_JpeHeaderGenerationMode;
421
422 /** \brief Enumerator for the JPE header mode
423 */
424 typedef enum
425 {
426 IfxCif_JpeHeaderMode_NoAppnHeader = 0, /**< \brief no APPn header */
427 IfxCif_JpeHeaderMode_JfifHeader = 2 /**< \brief JFIF header */
428 } IfxCif_JpeHeaderMode;
429
430 /** \brief Enumerator for interrupt sources of the JPEG encoder module
431 */
432 typedef enum
433 {
434 IfxCif_JpeInterruptSources_VlcTableError = 0, /**< \brief VLC table error */
435 IfxCif_JpeInterruptSources_R2BImageSizeError = 1, /**< \brief R2B image size error */
436 IfxCif_JpeInterruptSources_DcTableError = 2, /**< \brief DC Table error */
437 IfxCif_JpeInterruptSources_VlcSymbolError = 3, /**< \brief VLC symbol error */
438 IfxCif_JpeInterruptSources_HeaderGenerationComplete = 4, /**< \brief Header generation complete */
439 IfxCif_JpeInterruptSources_EncodingComplete = 5 /**< \brief Encoding complete */
440 } IfxCif_JpeInterruptSources;
441
442 /** \brief Enumerator for the Q-Table selector
443 */
444 typedef enum
445 {
446 IfxCif_JpeQTableSelector_Table0 = 0, /**< \brief Q-Table 0 */
447 IfxCif_JpeQTableSelector_Table1 = 1, /**< \brief Q-Table 1 */
448 IfxCif_JpeQTableSelector_Table2 = 2, /**< \brief Q-Table 2 */
449 IfxCif_JpeQTableSelector_Table3 = 3 /**< \brief Q-Table 3 */
450 } IfxCif_JpeQTableSelector;
451
452 /** \brief Enumerator for the components to select Q-Tables
453 */
454 typedef enum
455 {
456 IfxCif_JpeQTableSelectorComponents_Y = 0, /**< \brief Y-component */
457 IfxCif_JpeQTableSelectorComponents_U = 1, /**< \brief U-component */
458 IfxCif_JpeQTableSelectorComponents_V = 2 /**< \brief V-component */
459 } IfxCif_JpeQTableSelectorComponents;
460
461 /** \brief Enumerator for the input scaling values of the JPEG encoder
462 */
463 typedef enum
464 {
465 IfxCif_JpeScalingValueSources_Y = 0, /**< \brief scaling Y input from [16..235] to [0..255] */
466 IfxCif_JpeScalingValueSources_CbCr = 1 /**< \brief scaling Cb/Cr input from [16..240] to [0..255] */
467 } IfxCif_JpeScalingValueSources;
468
469 /** \brief Enumerator for the codec state
470 */
471 typedef enum
472 {
473 IfxCif_JpeState_Free = 0, /**< \brief Codec is free (not busy) */
474 IfxCif_JpeState_Busy = 1 /**< \brief JPEG codec in process */
475 } IfxCif_JpeState;
476
477 /** \brief Enumerator for the JPE Tables
478 */
479 typedef enum
480 {
481 IfxCif_JpeTableId_QTable0 = 0, /**< \brief Q-Table 0 */
482 IfxCif_JpeTableId_QTable1 = 1, /**< \brief Q-Table 1 */
483 IfxCif_JpeTableId_QTable2 = 2, /**< \brief Q-Table 2 */
484 IfxCif_JpeTableId_QTable3 = 3, /**< \brief Q-Table 3 */
485 IfxCif_JpeTableId_VlcDcTable0 = 4, /**< \brief VLC DC Table 0 */
486 IfxCif_JpeTableId_VlcAcTable0 = 5, /**< \brief VLC AC Table 0 */
487 IfxCif_JpeTableId_VlcDcTable1 = 6, /**< \brief VLC DC Table 1 */
488 IfxCif_JpeTableId_VlcAcTable1 = 7 /**< \brief VLC AC Table 1 */
489 } IfxCif_JpeTableId;
490
491 /** \brief Enumerator for the JFIF stream encoder continuous mode
492 */
493 typedef enum
494 {
495 IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd = 0, /**< \brief encoder stops at frame end */
496 IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically = 1, /**< \brief encoder starts automatically to encode the next frame */
497 IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically = 3 /**< \brief encoder first generates next header and then encodes automatically the next frame */
498 } IfxCif_JpegJfifStreamEncoderContinuousMode;
499
500 /** \brief Enumerator for the picture encoding format
501 */
502 typedef enum
503 {
504 IfxCif_JpegPictureEncodingFormat_422 = 0, /**< \brief 4:2:2 format */
505 IfxCif_JpegPictureEncodingFormat_400 = 1 /**< \brief 4:0:0 format */
506 } IfxCif_JpegPictureEncodingFormat;
507
508 /** \} */
509
510 /** \addtogroup IfxLld_Cif_Std_swEnumerations
511 * \{ */
512 /** \brief Enumerator for watchdog counters
513 */
514 typedef enum
515 {
516 IfxCif_SecurityWatchdogCounters_Predivider = 0, /**< \brief Predivider counter */
517 IfxCif_SecurityWatchdogCounters_Vertical = 1, /**< \brief Vertical counter */
518 IfxCif_SecurityWatchdogCounters_Horizontal = 2 /**< \brief Horizontal counter */
519 } IfxCif_SecurityWatchdogCounters;
520
521 /** \brief Enumerator for interrupt sources of the security watchdog submodule
522 */
523 typedef enum
524 {
525 IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout = 0, /**< \brief Vertical End Start Interrupt */
526 IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout = 1, /**< \brief Vertical Start End Interrupt */
527 IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout = 2, /**< \brief Horizontal End Start Interrupt */
528 IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout = 3 /**< \brief Horizontal Start End Interrupt */
529 } IfxCif_SecurityWatchdogInterruptSources;
530
531 /** \brief Enumerator for watchdog timeout counters
532 */
533 typedef enum
534 {
535 IfxCif_SecurityWatchdogTimeoutCounters_EndStart = 0, /**< \brief Timeout counter for End Start phase */
536 IfxCif_SecurityWatchdogTimeoutCounters_StartEnd = 1 /**< \brief Timeout counter for Start End phase */
537 } IfxCif_SecurityWatchdogTimeoutCounters;
538
539 /** \} */
540
541 /** \addtogroup IfxLld_Cif_Std_epEnumerations
542 * \{ */
543 /** \brief Enumerator for error sources that can be cleared in the extra paths registers
544 */
545 typedef enum
546 {
547 IfxCif_EpErrorClearSources_ExtraPath5SizeError = 0, /**< \brief Size error in image cropping unit of extra path 5 */
548 IfxCif_EpErrorClearSources_ExtraPath4SizeError = 1, /**< \brief Size error in image cropping unit of extra path 4 */
549 IfxCif_EpErrorClearSources_ExtraPath3SizeError = 2, /**< \brief Size error in image cropping unit of extra path 3 */
550 IfxCif_EpErrorClearSources_ExtraPath2SizeError = 3, /**< \brief Size error in image cropping unit of extra path 2 */
551 IfxCif_EpErrorClearSources_ExtraPath1SizeError = 4 /**< \brief Size error in image cropping unit of extra path 1 */
552 } IfxCif_EpErrorClearSources;
553
554 /** \brief Enumerator for error sources of extra paths
555 */
556 typedef enum
557 {
558 IfxCif_EpErrorSources_ExtraPath5FifoFull = 0, /**< \brief FIFO of extra path 5 is full */
559 IfxCif_EpErrorSources_ExtraPath4FifoFull = 1, /**< \brief FIFO of extra path 4 is full */
560 IfxCif_EpErrorSources_ExtraPath3FifoFull = 2, /**< \brief FIFO of extra path 3 is full */
561 IfxCif_EpErrorSources_ExtraPath2FifoFull = 3, /**< \brief FIFO of extra path 2 is full */
562 IfxCif_EpErrorSources_ExtraPath1FifoFull = 4, /**< \brief FIFO of extra path 1 is full */
563 IfxCif_EpErrorSources_ExtraPath5SizeError = 5, /**< \brief Size error in image cropping unit of extra path 5 */
564 IfxCif_EpErrorSources_ExtraPath4SizeError = 6, /**< \brief Size error in image cropping unit of extra path 4 */
565 IfxCif_EpErrorSources_ExtraPath3SizeError = 7, /**< \brief Size error in image cropping unit of extra path 3 */
566 IfxCif_EpErrorSources_ExtraPath2SizeError = 8, /**< \brief Size error in image cropping unit of extra path 2 */
567 IfxCif_EpErrorSources_ExtraPath1SizeError = 9 /**< \brief Size error in image cropping unit of extra path 1 */
568 } IfxCif_EpErrorSources;
569
570 /** \brief Enumerator for extra path features
571 */
572 typedef enum
573 {
574 IfxCif_EpFeatures_InitOffsetCounter = 0, /**< \brief Init offest counter */
575 IfxCif_EpFeatures_InitBaseAddress = 1, /**< \brief Init buffer base address */
576 IfxCif_EpFeatures_ByteSwap = 2, /**< \brief Byte swap feature */
577 IfxCif_EpFeatures_PictureDataPath = 3 /**< \brief enables the extra path picture data path */
578 } IfxCif_EpFeatures;
579
580 /** \brief Enumerator for interrupt sources of the extra paths module
581 */
582 typedef enum
583 {
584 IfxCif_EpInterrupts_FrameEnd = IFX_CIF_MIEP_MIS_FRAME_END_EP_1_OFF, /**< \brief Picture end of frame interrupt */
585 IfxCif_EpInterrupts_FillLevel = IFX_CIF_MIEP_MIS_FILL_EP_1_OFF, /**< \brief Fill level interrupt */
586 IfxCif_EpInterrupts_WrapAround = IFX_CIF_MIEP_MIS_WRAP_EP_1_OFF, /**< \brief Address wrap interrupt */
587 IfxCif_EpInterrupts_MacroBlockLine = IFX_CIF_MIEP_MIS_MBLK_LINE_EP_1_OFF, /**< \brief Macroblock line interrupt */
588 IfxCif_EpInterrupts_Count = 4 /**< \brief Total number of interrupt sources for one extra path */
589 } IfxCif_EpInterrupts;
590
591 /** \brief Enumerator for write formats of extra paths
592 */
593 typedef enum
594 {
595 IfxCif_EpWriteFormat_RawAndData = 0, /**< \brief Raw and data mode (8 bit) */
596 IfxCif_EpWriteFormat_Raw8Bit = 1, /**< \brief Raw 8 bit mode */
597 IfxCif_EpWriteFormat_RawGreater = 2, /**< \brief RAW & data mode (greater 8 up to 16 bit) */
598 IfxCif_EpWriteFormat_YCbCr = 3 /**< \brief YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths */
599 } IfxCif_EpWriteFormat;
600
601 /** \} */
602
603 /** \addtogroup IfxLld_Cif_Std_dpEnumerations
604 * \{ */
605 /** \brief Enumerator for debug path control sources
606 */
607 typedef enum
608 {
609 IfxCif_DpControlSources_UserDefinedSymbol8 = 0, /**< \brief User defined symbol 8 */
610 IfxCif_DpControlSources_UserDefinedSymbol7 = 1, /**< \brief User defined symbol 7 */
611 IfxCif_DpControlSources_UserDefinedSymbol6 = 2, /**< \brief User defined symbol 6 */
612 IfxCif_DpControlSources_UserDefinedSymbol5 = 3, /**< \brief User defined symbol 5 */
613 IfxCif_DpControlSources_UserDefinedSymbol4 = 4, /**< \brief ser defined symbol 4 */
614 IfxCif_DpControlSources_UserDefinedSymbol3 = 5, /**< \brief User defined symbol 3 */
615 IfxCif_DpControlSources_UserDefinedSymbol2 = 6, /**< \brief User defined symbol 2 */
616 IfxCif_DpControlSources_UserDefinedSymbol1 = 7, /**< \brief User defined symbol 1 */
617 IfxCif_DpControlSources_TimestampCounter = 8, /**< \brief Timestamp counter */
618 IfxCif_DpControlSources_LineNumberCounter = 9, /**< \brief Line number counter */
619 IfxCif_DpControlSources_FrameNumberCounter = 10 /**< \brief Frame number counter */
620 } IfxCif_DpControlSources;
621
622 /** \brief Enumerator for debug path counters
623 */
624 typedef enum
625 {
626 IfxCif_DpCounters_PredividerCounter = 0, /**< \brief Predivider counter */
627 IfxCif_DpCounters_TimestampCounter = 1, /**< \brief Timestamp counter */
628 IfxCif_DpCounters_LineNumberCounter = 2, /**< \brief Line number counter */
629 IfxCif_DpCounters_FrameNumberCounter = 3 /**< \brief Frame number counter */
630 } IfxCif_DpCounters;
631
632 /** \brief Enumerator for debug path source paths
633 */
634 typedef enum
635 {
636 IfxCif_DpSourcePath_MainPath = 0, /**< \brief Main data path */
637 IfxCif_DpSourcePath_ExtraPath1 = 1, /**< \brief Extra path 1 */
638 IfxCif_DpSourcePath_ExtraPath2 = 2, /**< \brief Extra path 2 */
639 IfxCif_DpSourcePath_ExtraPath4 = 4, /**< \brief Extra path 4 */
640 IfxCif_DpSourcePath_ExtraPath5 = 5 /**< \brief Extra path 5 */
641 } IfxCif_DpSourcePath;
642
643 /** \} */
644
645 /** \addtogroup IfxLld_Cif_Std_stdFunctions
646 * \{ */
647
648 /******************************************************************************/
649 /*-------------------------Inline Function Prototypes-------------------------*/
650 /******************************************************************************/
651
652 /** \brief Function to clear the kernel reset state
653 * \return None
654 */
655 IFX_INLINE void IfxCif_clearKernelResetState(void);
656
657 /** \brief Function to query the CIF module ID
658 * \return CIF module ID
659 */
660 IFX_INLINE uint16 IfxCif_getCifModuleId(void);
661
662 /** \brief Function to query the port input selection
663 * \return Always @ref IfxCif_PortInputSelection_PinMapping0
664 */
665 IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection(void);
666
667 /** \brief Function to query the CIF module revision
668 * \return CIF module revision
669 */
670 IFX_INLINE uint8 IfxCif_getCifModuleRevision(void);
671
672 /** \brief Function to query the CIF module ID
673 * \return CIF module type
674 */
675 IFX_INLINE uint8 IfxCif_getCifModuleType(void);
676
677 /** \brief Function to query the clock distribution enabled state
678 * \return @ref IfxCif_State_Enabled if clock distribution is enabled, @ref IfxCif_State_Disabled otherwise
679 */
680 IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState(void);
681
682 /** \brief Function to query the data path for main path
683 * \return Selector for the main data path (one member of @ref IfxCif_DataPathSelectorForMainPath)
684 */
685 IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath(void);
686
687 /** \brief Function to query the input interface of the CIF interface
688 * \return @ref IfxCif_InputInterface Type of the configured interface
689 */
690 IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface(void);
691
692 /** \brief Function to query the current level of the ISP input port s_hsync (for testing purposes only)
693 * \return @ref IfxCif_State_Enabled if s_hsync is high, @ref IfxCif_State_Disabled if s_hsync is low
694 */
695 IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState(void);
696
697 /** \brief Function to query the kernel reset status
698 * \return @ref IfxCif_State_Enabled if kernel reset was executed, @ref IfxCif_State_Disabled otherwise
699 */
700 IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus(void);
701
702 /** \brief Function to query the module number
703 * \return Module number of the CIF interface
704 */
705 IFX_INLINE uint16 IfxCif_getModuleNumber(void);
706
707 /** \brief Function to query the revision number of the CIF interface
708 * \return Revision number of the CIF interface
709 */
710 IFX_INLINE uint8 IfxCif_getModuleRevisionNumber(void);
711
712 /** \brief Function to query the state of the CIF module
713 * \return @ref IfxCif_State_Enabled if the module is currently enabled, @ref IfxCif_State_Disabled otherwise
714 */
715 IFX_INLINE IfxCif_State IfxCif_getModuleState(void);
716
717 /** \brief Function to query the module type
718 * \return Module type of the CIF interface
719 */
720 IFX_INLINE uint8 IfxCif_getModuleType(void);
721
722 /** \brief Function to query the Y/C splitter channel mode
723 * \return Configured mode of the Y/C splitter (one member of @ref IfxCif_YCSplitterChannelMode)
724 */
725 IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode(void);
726
727 /** \brief Function to enable or disable the clock distribution to all CIF submodules
728 * \param clockControlLogicState @ref IfxCif_State_Enabled to enable clock distribution, @ref IfxCif_State_Disabled to disable clock distribution
729 * \return None
730 */
731 IFX_INLINE void IfxCif_setClockControlLogicState(IfxCif_State clockControlLogicState);
732
733 /** \brief Function to set the data path for main path
734 * \param pathSelector Selector for the main data path
735 * \return None
736 */
737 IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector);
738
739 /** \brief Function to set the input interface of the CIF interface
740 * \param interface Type of interface
741 * \return None
742 */
743 IFX_INLINE void IfxCif_setInputInterface(IfxCif_InputInterface interface);
744
745 /** \brief Function to request a kernel reset or reset the request bit
746 * \param state @ref IfxCif_State_Enabled to request a reset, @ref IfxCif_State_Disabled to reset the request bit before a reset was performed
747 * \return None
748 */
749 IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state);
750
751 /** \brief Function to set the Y/C splitter channel mode
752 * \param mode Mode of the Y/C splitter to set
753 * \return None
754 */
755 IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode);
756
757 /******************************************************************************/
758 /*-------------------------Global Function Prototypes-------------------------*/
759 /******************************************************************************/
760
761 /** \brief Function to query the clock state of a submodule
762 * \param submodule Identifier of the submodule
763 * \return @ref IfxCif_State_Enabled if the clock of the submodule is enabled, @ref IfxCif_State_Disabled otherwise
764 */
765 IFX_EXTERN IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule);
766
767 /** \brief Function to query the state of the kernel reset request bit
768 * \return @ref IfxCif_State_Enabled if the kernel reset requets bit is set, @ref IfxCif_State_Disabled otherwise
769 */
770 IFX_EXTERN IfxCif_State IfxCif_getKernelResetRequestState(void);
771
772 /** \brief Function to query the reset mode of a submodule
773 * \param submodule Identifier of the submodule
774 * \return @ref IfxCif_State_Enabled if the reset mode of the submodule is enabled, @ref IfxCif_State_Disabled otherwise
775 */
776 IFX_EXTERN IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule);
777
778 /** \brief resets CIF kernel
779 * \param cifBbb pointer to CIF_BBB registers
780 * \return None
781 */
782 IFX_EXTERN void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb);
783
784 /** \brief Function to enable or disable the clock of a submodule
785 * \param submodule Identifier of the submodule to enable or disable
786 * \param clockState @ref IfxCif_State_Enabled to enable the clock, @ref IfxCif_State_Disabled to disable the clock
787 * \return None
788 */
789 IFX_EXTERN void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState);
790
791 /** \brief Function to request enabling or disabling of the CIF module
792 * \param state @ref IfxCif_State_Enabled to request the enabling of the module, @ref IfxCif_State_Disabled otherwise
793 * \return None
794 */
795 IFX_EXTERN void IfxCif_setModuleStateRequest(IfxCif_State state);
796
797 /** \brief Function to enable or disable the reset mode of a submodule
798 * \param submodule Identifier of the submodule
799 * \param resetMode @ref IfxCif_State_Enabled to enable the reset of the submodule, @ref IfxCif_State_Disabled to disable the reset
800 * \return None
801 */
802 IFX_EXTERN void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode);
803
804 /** \} */
805
806 /** \addtogroup IfxLld_Cif_Std_ispFunctions
807 * \{ */
808
809 /******************************************************************************/
810 /*-------------------------Inline Function Prototypes-------------------------*/
811 /******************************************************************************/
812
813 /** \brief Function to generate a frame synchronous ISP configuration update signal
814 * \return None
815 */
816 IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void);
817
818 /** \brief Function to generate an immediate ISP configuration update signal
819 * \return None
820 */
821 IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void);
822
823 /** \brief Function to query the current ISP frame count
824 * \return Current ISP frame count
825 */
826 IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount(void);
827
828 /** \brief Function to query the current field information
829 * \return @ref IfxCif_IspInformFieldInformation_Odd for odd fields, @ref IfxCif_IspInformFieldInformation_Even for even fields
830 */
831 IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation(void);
832
833 /** \brief Function to query the current state of the ISP formatter
834 * \return @ref IfxCif_State_Enabled if the ISP input formatter is currently enabled, @ref IfxCif_State_Disabled if the ISP input formatter is currently disabled
835 */
836 IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState(void);
837
838 /** \brief Function to query the currently set CCIR sequence
839 * \return Currently set CCIR sequence (one member of @ref IfxCif_IspCcirSequence)
840 */
841 IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence(void);
842
843 /** \brief Function to query the clipping range of the crominance of the ISP output
844 * \return Currently set clipping range (one member of @ref IfxCif_IspColorSpaceMatrixCrominanceClippingRange)
845 */
846 IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange(void);
847
848 /** \brief Function to query the clipping range of the luminance of the ISP output
849 * \return Currently set clipping range (one member of @ref IfxCif_IspColorSpaceMatrixLuminanceClippingRange)
850 */
851 IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange(void);
852
853 /** \brief Function to query the state of field ID inversion
854 * \return @ref IfxCif_State_Enabled if field ID inversion is enabled, @ref IfxCif_State_Disabled otherwise
855 */
856 IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState(void);
857
858 /** \brief Function to query the currently set field sample mode
859 * \return Currently set fields sample mode (one member of @ref IfxCif_IspFieldSelection)
860 */
861 IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection(void);
862
863 /** \brief Function to query the currently set polarity of the HSYNC signal
864 * \return @ref IfxCif_IspSyncPolarity_HighActive if HSYNC is configured as high active, @ref IfxCif_IspSyncPolarity_LowActive if HSYNC is configured as low active
865 */
866 IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity(void);
867
868 /** \brief Function to query the current state of the ISP input formatter
869 * \return @ref IfxCif_State_Enabled if the ISP input formatter is enabled, @ref IfxCif_State_Disabled otherwise
870 */
871 IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState(void);
872
873 /** \brief Function to query the ISP input interface bit width
874 * \return Configured ISP input interface bit width (one member of @ref IfxCif_IspInputInterface)
875 */
876 IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface(void);
877
878 /** \brief Function to query the current value of the ISP input port s_data (for test purposes only)
879 * \return Current value of s_data
880 */
881 IFX_INLINE uint16 IfxCif_getIspInputPortSDataState(void);
882
883 /** \brief Function to query the current level of the ISP input port s_vsync (for test purposes only)
884 * \return @ref IfxCif_State_Enabled if s_vsync is high, @ref IfxCif_State_Disabled if s_vsync is low
885 */
886 IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState(void);
887
888 /** \brief Function to query the currently set ISP mode
889 * \return Current ISP mode (one member of @ref IfxCif_IspMode)
890 */
891 IFX_INLINE IfxCif_State IfxCif_getIspMode(void);
892
893 /** \brief Function to query the ISP output state
894 * \return @ref IfxCif_State_Enabled if the ISP output is enabled, @ref IfxCif_State_Disabled otherwise
895 */
896 IFX_INLINE IfxCif_State IfxCif_getIspOutputState(void);
897
898 /** \brief Function to query the currently set ISP sampling edge
899 * \return @ref IfxCif_IspSamplingEdge_NegativeEdge if negative clock edge is configured as sampling edge, @ref IfxCif_IspSamplingEdge_PositiveEdge if positive clock edge is configured as sampling edge
900 */
901 IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge(void);
902
903 /** \brief Function to query the current state of the ISP
904 * \return @ref IfxCif_State_Enabled if the ISP is currently enabled, @ref IfxCif_State_Disabled if the ISP is currently disabled
905 */
906 IFX_INLINE IfxCif_State IfxCif_getIspState(void);
907
908 /** \brief Function to query the currently set polarity of the VSYNC signal
909 * \return @ref IfxCif_IspSyncPolarity_HighActive if VSYNC is configured as high active, @ref IfxCif_IspSyncPolarity_LowActive if VSYNC is configured as low active
910 */
911 IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity(void);
912
913 /** \brief Function to query the number of acquisition frames
914 * \return Currently set number of acquisition frames
915 */
916 IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames(void);
917
918 /** \brief Function to set the ISP acquisition offsets
919 * \param hOffset Acquisition horizontal offset to set
920 * \param vOffset Acquisition vertical offset to set
921 * \return None
922 */
923 IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset);
924
925 /** \brief Function to set the ISP acquisition sizes
926 * \param hSize Acquisition horizontal size to set
927 * \param vSize Acquisition vertical size to set
928 * \return None
929 */
930 IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize);
931
932 /** \brief Function to set the CCIR sequence
933 * \param sequence CCIR sequence to set
934 * \return None
935 */
936 IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence);
937
938 /** \brief Function to set the clipping range of the crominance of the ISP output
939 * \param clippingRange Clipping range to set
940 * \return None
941 */
942 IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange);
943
944 /** \brief Function to set the clipping range of the luminance of the ISP output
945 * \param clippingRange Clipping range to set
946 * \return None
947 */
948 IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange);
949
950 /** \brief Function to enable or disable inversion of the field ID
951 * \param fieldInvertState @ref IfxCif_State_Enabled to enable field ID inversion, @ref IfxCif_State_Disabled to disable field ID inversion
952 * \return None
953 */
954 IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState);
955
956 /** \brief Function to select fields to sample
957 * \param selection Sampled fields selector
958 * \return None
959 */
960 IFX_INLINE void IfxCif_setIspFieldSelection(IfxCif_IspFieldSelection selection);
961
962 /** \brief Function to set the polarity of the HSYNC signal
963 * \param polarity @ref IfxCif_IspSyncPolarity_HighActive for high active HSYNC signal, @ref IfxCif_IspSyncPolarity_LowActive for low active HSYNC signal
964 * \return None
965 */
966 IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity);
967
968 /** \brief Function to enable or disable the ISP input formatter
969 * \param inputFormatterState @ref IfxCif_State_Enabled to enable the ISP input formatter, @ref IfxCif_State_Disabled to disable it
970 * \return None
971 */
972 IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState);
973
974 /** \brief Function to set the ISP input interface bit width
975 * \param input ISP input interface bit width to set
976 * \return None
977 */
978 IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input);
979
980 /** \brief Function to set the ISP mode
981 * \param mode Mode to set
982 * \return None
983 */
984 IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode);
985
986 /** \brief Function to enable or disable the ISP output
987 * \param ispOutputState ispOutputState @ref IfxCif_State_Enabled to enable the ISP output, @ref IfxCif_State_Disabled to disable it
988 * \return None
989 */
990 IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState);
991
992 /** \brief Function to set the ISP output window offsets
993 * \param hOffset Offset horizontal to set
994 * \param vOffset Offset vertical to set
995 * \return None
996 */
997 IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset);
998
999 /** \brief Function to set the ISP picture sizes
1000 * \param hSize Picture horizontal size to set
1001 * \param vSize Picture vertical size to set
1002 * \return None
1003 */
1004 IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize);
1005
1006 /** \brief Function to set the ISP sampling edge
1007 * \param edge @ref IfxCif_IspSamplingEdge_NegativeEdge to sample at negative clock edges, @ref IfxCif_IspSamplingEdge_PositiveEdge to sample at positive clock edges
1008 * \return None
1009 */
1010 IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge);
1011
1012 /** \brief Function to set the polarity of the VSYNC signal
1013 * \param polarity @ref IfxCif_IspSyncPolarity_HighActive for high active VSYNC signal, @ref IfxCif_IspSyncPolarity_LowActive for low active VSYNC signal
1014 * \return None
1015 */
1016 IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity);
1017
1018 /** \brief Function to set the number of acquisition frames
1019 * \param numberOfFrames Number of acquisition frames to set
1020 * \return None
1021 */
1022 IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames);
1023
1024 /******************************************************************************/
1025 /*-------------------------Global Function Prototypes-------------------------*/
1026 /******************************************************************************/
1027
1028 /** \brief Function to clear the error status bit for an error source
1029 * \param errorSource Error source
1030 * \return None
1031 */
1032 IFX_EXTERN void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource);
1033
1034 /** \brief Function to clear an interrupt
1035 * \param interruptSource Source of the interrupt
1036 * \return None
1037 */
1038 IFX_EXTERN void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource);
1039
1040 /** \brief Function to query the current ISP picture offset for one tier
1041 * \param tier Tier for which to query the current ISP picture offset
1042 * \return Current ISP picture offset
1043 */
1044 IFX_EXTERN uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier);
1045
1046 /** \brief Function to query the current ISP picture size for one tier
1047 * \param tier Tier for which to query the current ISP picture size
1048 * \return Current ISP picture size
1049 */
1050 IFX_EXTERN uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier);
1051
1052 /** \brief Function to query the currently set ISP acquisition offset of one tier
1053 * \param tier Tier for which to query the ISP acquisition offset
1054 * \return Currently set ISP acquisition offset
1055 */
1056 IFX_EXTERN uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier);
1057
1058 /** \brief Function to query the currently set ISP acquisition size of one tier
1059 * \param tier Tier for which to query the ISP acquisition size
1060 * \return Currently set acquisition size
1061 */
1062 IFX_EXTERN uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier);
1063
1064 /** \brief Function to query the error state of an error source
1065 * \param errorSource errorSource Error source to query
1066 * \return @ref IfxCif_ErrorState_Error if the error occured, @ref IfxCif_ErrorState_NoError if the error did not occur
1067 */
1068 IFX_EXTERN IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource);
1069
1070 /** \brief Function to query the append state
1071 * \return @ref IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise
1072 */
1073 IFX_EXTERN IfxCif_State IfxCif_getIspInputSelectionAppendState(void);
1074
1075 /** \brief Function to query the enabled state of an interrupt
1076 * \param interruptSource interruptSource Source of the interrupt
1077 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
1078 */
1079 IFX_EXTERN IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource);
1080
1081 /** \brief Function to query the currently set ISP output window offset for one tier
1082 * \param tier Tier for which to query the ISP output window offset
1083 * \return Currently set ISP output window offset
1084 */
1085 IFX_EXTERN uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier);
1086
1087 /** \brief Function to query the currently set ISP picture size of one tier
1088 * \param tier Tier for which to query the ISP picture size
1089 * \return Currently set ISP picture size
1090 */
1091 IFX_EXTERN uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier);
1092
1093 /** \brief Function to query the masked state of an interrupt
1094 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
1095 */
1096 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource);
1097
1098 /** \brief Function to query the raw state of an interrupt
1099 * \param interruptSource Source of the interrupt
1100 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
1101 */
1102 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource);
1103
1104 /** \brief Function to set the ISP acquisition offset of one tier
1105 * \param tier Tier for which to set the ISP acquisition offset
1106 * \param offset Acquisition offset to set
1107 * \return None
1108 */
1109 IFX_EXTERN void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset);
1110
1111 /** \brief Function to set the ISP acquisition size of one tier
1112 * \param tier Tier for which to set the ISP acquisition size
1113 * \param size Acquisition size to set
1114 * \return None
1115 */
1116 IFX_EXTERN void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size);
1117
1118 /** \brief Function to enable or disable appending of bits to the input signal
1119 * \param appendState @ref IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise
1120 * \return None
1121 */
1122 IFX_EXTERN void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState);
1123
1124 /** \brief Function to enable or disable an interrupt
1125 * \param interruptSource interruptSource Source of the interrupt to enable or disable
1126 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
1127 * \return None
1128 */
1129 IFX_EXTERN void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState);
1130
1131 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
1132 * \param interruptSource Source of the interrupt
1133 * \return None
1134 */
1135 IFX_EXTERN void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource);
1136
1137 /** \brief Function to set the ISP output window offset for one tier
1138 * \param tier Tier for which to query the ISP output window offset
1139 * \param offset Offset to set
1140 * \return None
1141 */
1142 IFX_EXTERN void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset);
1143
1144 /** \brief Function to set the ISP picture size of one tier
1145 * \param tier Tier for which to set the ISP picture size
1146 * \param pictureSize Picture size to set
1147 * \return None
1148 */
1149 IFX_EXTERN void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize);
1150
1151 /** \} */
1152
1153 /** \addtogroup IfxLld_Cif_Std_ldsFunctions
1154 * \{ */
1155
1156 /******************************************************************************/
1157 /*-------------------------Global Function Prototypes-------------------------*/
1158 /******************************************************************************/
1159
1160 /** \brief Function to query the current state of the linear downscaler for one tier
1161 * \param tier Tier for which to query the state of the linear downscaler
1162 * \return @ref IfxCif_State_Enabled if the linear downscaler is enabled, @ref IfxCif_State_Disabled if the linear downscaler is disabled
1163 */
1164 IFX_EXTERN IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier);
1165
1166 /** \brief Function to query the currently set scaling factor of the linear downscaler of one tier
1167 * \param tier Tier for which to query the scaling factor
1168 * \return Current set scaling factor
1169 */
1170 IFX_EXTERN uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier);
1171
1172 /** \brief Function to query the currently set scaling mode of one tier
1173 * \param tier Tier for which to query the scaling mode
1174 * \return Currently set scaling mode (one member of @ref IfxCif_LinearDownscalerScalingMode)
1175 */
1176 IFX_EXTERN IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier);
1177
1178 /** \brief Function to enable or disable the linear downscaler for one tier
1179 * \param tier Tier for which to enable or disable the linear downscaler
1180 * \param enableState @ref IfxCif_State_Enabled to enable the linear downscaler, @ref IfxCif_State_Disabled to disable the linear downscaler
1181 * \return None
1182 */
1183 IFX_EXTERN void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState);
1184
1185 /** \brief Function to set the scaling factor of the linear downscaler of one tier
1186 * \param tier Tier for which to set the scaling factor
1187 * \param factor Factor to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
1188 * \return None
1189 */
1190 IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor);
1191
1192 /** \brief Function to set the scaling factors of the linear downscaler
1193 * \param horizFactor Factor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
1194 * \param vertFactor actor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
1195 * \return None
1196 */
1197 IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor);
1198
1199 /** \brief Function to set the scaling mode of one tier
1200 * \param tier Tier for which to set the scaling mode
1201 * \param mode Scaling mode to set
1202 * \return None
1203 */
1204 IFX_EXTERN void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode);
1205
1206 /** \brief Function to set the scaling mode of one tier
1207 * \param horizMode Scaling mode to set for horizontal
1208 * If the horizMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the horizontal scaling will be enabled.
1209 * \param vertMode Scaling mode to set for vertical
1210 * If the vertMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the vertical scaling will be enabled.
1211 * \return None
1212 */
1213 IFX_EXTERN void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode);
1214
1215 /** \} */
1216
1217 /** \addtogroup IfxLld_Cif_Std_miFunctions
1218 * \{ */
1219
1220 /******************************************************************************/
1221 /*-------------------------Inline Function Prototypes-------------------------*/
1222 /******************************************************************************/
1223
1224 /** \brief Function to generate an immediate configuration update signal for the memory interface submodule
1225 * \return None
1226 */
1227 IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void);
1228
1229 /** \brief Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values
1230 * \return @ref IfxCif_State_Enabled if update of the base address and buffer size shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), @ref IfxCif_State_Disabled if update of the base address and buffer size shadow registers is disabled
1231 */
1232 IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState(void);
1233
1234 /** \brief Function to query the number of JPEG or RAW data bytes of the last transmitted frame
1235 * \return Number of JPEG or RAW data bytes of the last transmitted frame (updated at frame end)
1236 */
1237 IFX_INLINE uint32 IfxCif_getMiByteCount(void);
1238
1239 /** \brief Function to query the current state of the change of byte order of the 32 bit output word
1240 * \return @ref IfxCif_State_Enabled if byte swapping is enabled, @ref IfxCif_State_Disabled if byte swapping is disabled
1241 */
1242 IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState(void);
1243
1244 /** \brief Function to query the currently set burst length for Cb and Cr data
1245 * \return @ref IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, @ref IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred
1246 */
1247 IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength(void);
1248
1249 /** \brief Function to query the currently set burst length for Y, JPEG, or RAW data
1250 * \return @ref IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, @ref IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred
1251 */
1252 IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength(void);
1253
1254 /** \brief Function to query the currently set write format of the main picture path of the memory interface
1255 * \return Currently set write format (one member of @ref IfxCif_MiMainPictureWriteFormat)
1256 */
1257 IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat(void);
1258
1259 /** \brief Function to query the filling level that triggers an interrupt of main picture path Y component
1260 * \return Filling level that triggers an interrupt
1261 */
1262 IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset(void);
1263
1264 /** \brief Function to query the filling level of the main picture Y component that triggers an interrupt
1265 * \return Filling level of the main picture Y component that triggers an interrupt
1266 */
1267 IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset(void);
1268
1269 /** \brief Function to query the enabled state of the update signal of the offset counter shadow registers
1270 * \return @ref IfxCif_State_Enabled if update of the offset counter shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), @ref IfxCif_State_Disabled if update of the offset counter shadow registers is disabled
1271 */
1272 IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState(void);
1273
1274 /** \brief Function to skip the current or next starting main data path picture
1275 * \return None
1276 */
1277 IFX_INLINE void IfxCif_miSkipPicture(void);
1278
1279 /** \brief Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)
1280 * \param state @ref IfxCif_State_Enabled to enable the generation of the update signal, @ref IfxCif_State_Disabled to disable the generation of the update signal
1281 * \return None
1282 */
1283 IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state);
1284
1285 /** \brief Function to enable or disable the change of byte order of the 32 bit output word
1286 * \param enableState @ref IfxCif_State_Enabled to enable byte swapping, @ref IfxCif_State_Disabled to disable byte swapping
1287 * \return None
1288 */
1289 IFX_INLINE void IfxCif_setMiByteSwapEnableState(IfxCif_State enableState);
1290
1291 /** \brief Function to set the burst length for Cb and Cr data
1292 * \param burstLength Burst length to set
1293 * \return None
1294 */
1295 IFX_INLINE void IfxCif_setMiChrominanceBurstLength(IfxCif_MiBurstLength burstLength);
1296
1297 /** \brief Function to set the write format of the main picture path of the memory interface
1298 * \param format Format to set
1299 * \return None
1300 */
1301 IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format);
1302
1303 /** \brief Function to set the filling level to trigger an interrupt for main picture path Y component
1304 * \param interruptOffset Filling level to set
1305 * \return None
1306 */
1307 IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset(uint32 interruptOffset);
1308
1309 /** \brief Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)
1310 * \param state @ref IfxCif_State_Enabled to enable the generation of the update signal, @ref IfxCif_State_Disabled to disable the generation of the update signal
1311 * \return None
1312 */
1313 IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state);
1314
1315 /******************************************************************************/
1316 /*-------------------------Global Function Prototypes-------------------------*/
1317 /******************************************************************************/
1318
1319 /** \brief Function to clear an interrupt
1320 * \param interruptSource Source of the interrupt
1321 * \return None
1322 */
1323 IFX_EXTERN void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource);
1324
1325 /** \brief Function to clear the status information of one status clear source of the memory interface submodule
1326 * \param source Status information source for which to clear the status
1327 * \return None
1328 */
1329 IFX_EXTERN void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source);
1330
1331 /** \brief Function to query the initial base address of the ring buffer of one main picture path component
1332 * \param component Main picture path component for which to query the initial base address
1333 * \return Initial base address of the main picture path component
1334 */
1335 IFX_EXTERN uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component);
1336
1337 /** \brief Function to query the masked state of an interrupt
1338 * \param interruptSource Source of the interrupt
1339 * \return ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
1340 */
1341 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource);
1342
1343 /** \brief Function to query the enabled state of one main data path component at the memory interface input
1344 * \param dataPath Main data path component for which to query the enabled state
1345 * \return @ref IfxCif_State_Enabled if the main data path component is enabled, @ref IfxCif_State_Disabled if the main data path component is disabled
1346 */
1347 IFX_EXTERN IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath);
1348
1349 /** \brief Function to query the enabled state of one main data path component at the memory interface output
1350 * \param dataPath Main data path component for which to query the enabled state
1351 * \return @ref IfxCif_State_Enabled if the main data path component is enabled, @ref IfxCif_State_Disabled if the main data path component is disabled
1352 */
1353 IFX_EXTERN IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath);
1354
1355 /** \brief Function to query the enabled state of a memory interface data path
1356 * \param dataPath Data path to query
1357 * \return @ref IfxCif_State_Enabled if the memory interface data path is enabled, @ref IfxCif_State_Disabled if the data path is disabled
1358 */
1359 IFX_EXTERN IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath);
1360
1361 /** \brief Function to query the enabled state of an interrupt
1362 * \param interruptSource Source of the interrupt
1363 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
1364 */
1365 IFX_EXTERN IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource);
1366
1367 /** \brief Function to query the current base address of the ring buffer of one main picture path component
1368 * \param component Main Picture path component for which to query the base address
1369 * \return Current base address of the ring buffer of the main picture path component
1370 */
1371 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component);
1372
1373 /** \brief Function to query the initial size of the ring buffer of one main picture path component
1374 * \param component Main picture path component for which to query the intial size
1375 * \return Initial size of the main picture path component
1376 */
1377 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component);
1378
1379 /** \brief Function to query the initial offset counter inside the ring buffer of one main picture path compoent
1380 * \param component Main picture path component for which to query the initial offset counter
1381 * \return Initial offset counter value of the main picture path component
1382 */
1383 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component);
1384
1385 /** \brief Function to query the current offset counter within the ring buffer of one main picture path component
1386 * \param component Main picture path component for which to query the offest counter value
1387 * \return Current offset counter within the ring buffer of the main picture path component
1388 */
1389 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component);
1390
1391 /** \brief Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component
1392 * \param component Main picture path component for which to query the offset counter value
1393 * \return Offset counter value pointing to the start address of the previously processed picture
1394 */
1395 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component);
1396
1397 /** \brief Function to query the current size of the ring buffer of one main picture path component
1398 * \param component Main Picture path component for which to query the size
1399 * \return Current size of the ring buffer of the main picture path component
1400 */
1401 IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component);
1402
1403 /** \brief Function to query the status information of one status information source of the memory interface module
1404 * \param source Status information source for which to query the status information
1405 * \return @ref IfxCif_ErrorState_NoError if the error has occured since the last clear, @ref IfxCif_ErrorState_Error if the error has occured since the last clear
1406 */
1407 IFX_EXTERN IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source);
1408
1409 /** \brief Function to query the raw state of an interrupt
1410 * \param interruptSource Source of the interrupt
1411 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
1412 */
1413 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource);
1414
1415 /** \brief Function to enable or disable one memory interface data path
1416 * \param dataPath Data path to enable or disable
1417 * \param enableState @ref IfxCif_State_Enabled to enable the data path, @ref IfxCif_State_Disabled to disable the data path
1418 * \return None
1419 */
1420 IFX_EXTERN void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState);
1421
1422 /** \brief Function to enable or disable an interrupt
1423 * \param interruptSource Source of the interrupt to enable or disable
1424 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
1425 * \return None
1426 */
1427 IFX_EXTERN void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState);
1428
1429 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
1430 * \param interruptSource Source of the interrupt
1431 * \return None
1432 */
1433 IFX_EXTERN void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource);
1434
1435 /** \brief Function to set the burst length for Y, JPEG, or RAW data
1436 * \param burstLength Burst length to set
1437 * \return None
1438 */
1439 IFX_EXTERN void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength);
1440
1441 /** \brief Function to set the initial base address of the ring buffer for one main picture path component
1442 * \param component Main picture path component for which to set the initial base address
1443 * \param address Base address to set (must be word aligned)
1444 * \return None
1445 */
1446 IFX_EXTERN void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address);
1447
1448 /** \brief Function to set the initial size of the ring buffer for one main picture path component
1449 * \param component Main picture path component for which to set the initial size
1450 * \param size Size to set (must be word aligned)
1451 * \return None
1452 */
1453 IFX_EXTERN void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size);
1454
1455 /** \brief Function to set the initial offset counter inside the ring buffer for one main picture path component
1456 * \param component Main picture path component for which to set the initial offest counter
1457 * \param offsetCounter Offset counter value to set (must be word aligned)
1458 * \return None
1459 */
1460 IFX_EXTERN void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter);
1461
1462 /** \} */
1463
1464 /** \addtogroup IfxLld_Cif_Std_jpeFunctions
1465 * \{ */
1466
1467 /******************************************************************************/
1468 /*-------------------------Inline Function Prototypes-------------------------*/
1469 /******************************************************************************/
1470
1471 /** \brief Function to query the current header generation debug control mode
1472 * \return Currently set header generation debug control mode (one member of @ref IfxCif_JpeHeaderGenerationMode)
1473 */
1474 IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode(void);
1475
1476 /** \brief Function to query the currently set JPE header mode
1477 * \return Currently set JPE header mode (one member of @ref IfxCif_JpeHeaderMode)
1478 */
1479 IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode(void);
1480
1481 /** \brief Function to query the JPE encode mode
1482 * \return Always 1, because this is the encoder only edition
1483 */
1484 IFX_INLINE IfxCif_State IfxCif_getJpeMode(void);
1485
1486 /** \brief Function to query the current restart interval
1487 * \return Current restart interval
1488 */
1489 IFX_INLINE uint16 IfxCif_getJpeRestartInterval(void);
1490
1491 /** \brief Function to get the current JPEG codec state
1492 * \return @ref IfxCif_JpeState_Busy if the JPEG codec is currently processing, @ref IfxCif_JpeState_Free if the JPEG codec is currently free
1493 */
1494 IFX_INLINE IfxCif_JpeState IfxCif_getJpeState(void);
1495
1496 /** \brief Function to query the current JPE Table ID
1497 * \return Current JPE Table ID
1498 */
1499 IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId(void);
1500
1501 /** \brief Function to query the current encoder continuous mode
1502 * \return Current encoder continuous mode (one member of @ref IfxCif_JpegJfifStreamEncoderContinuousMode)
1503 */
1504 IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode(void);
1505
1506 /** \brief Function to query the current picture encoding format
1507 * \return Current picture encoding format
1508 */
1509 IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat(void);
1510
1511 /** \brief Function to immediately start the JPEG encoder.
1512 * This function has to be called after @ref IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder
1513 * \return None
1514 */
1515 IFX_INLINE void IfxCif_initJpegEncoder(void);
1516
1517 /** \brief Function to start to generate JPEG stream header. Auto reset after one clock cycle
1518 * \return None
1519 */
1520 IFX_INLINE void IfxCif_jpeGenerateHeader(void);
1521
1522 /** \brief Function to set the header generation debug control mode
1523 * \param headerGenerationMode Header generation debug control mode to set
1524 * \return None
1525 */
1526 IFX_INLINE void IfxCif_setJpeHeaderGenerationMode(IfxCif_JpeHeaderGenerationMode headerGenerationMode);
1527
1528 /** \brief Function to set the JPE header mode
1529 * \param headerMode Header mode to set
1530 * \return None
1531 */
1532 IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode);
1533
1534 /** \brief Function to set the restart interval
1535 * \param interval Restart interval to set
1536 * \return None
1537 */
1538 IFX_INLINE void IfxCif_setJpeRestartInterval(uint16 interval);
1539
1540 /** \brief Function to set the JPE Table LSB
1541 * \param data Value to set for the JPE Table LSB
1542 * \return None
1543 */
1544 IFX_INLINE void IfxCif_setJpeTableDataLsb(uint8 data);
1545
1546 /** \brief Function to set the JPE Table MSB
1547 * \param data Value to set for the JPE Table MSB
1548 * \return None
1549 */
1550 IFX_INLINE void IfxCif_setJpeTableDataMsb(uint8 data);
1551
1552 /** \brief Function to set the JPE Table ID
1553 * \param tableId tableId Table ID to set
1554 * \return None
1555 */
1556 IFX_INLINE void IfxCif_setJpeTableId(IfxCif_JpeTableId tableId);
1557
1558 /** \brief Function to set the JPEG codec image sizes
1559 * \param hSize Image horizontal size
1560 * \param vSize Image vertical size
1561 * \return None
1562 */
1563 IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize);
1564
1565 /** \brief Function to set the stream encoder continuous mode
1566 * \param mode Encoder continuous mode to set
1567 * \return None
1568 */
1569 IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode);
1570
1571 /** \brief Function to set the picture encoding format
1572 * \param format Encoding format to set
1573 * \return None
1574 */
1575 IFX_INLINE void IfxCif_setJpegPictureEncodingFormat(IfxCif_JpegPictureEncodingFormat format);
1576
1577 /** \brief Function to start JFIF stream encoding. Auto reset after one clock cycle
1578 * \return None
1579 */
1580 IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void);
1581
1582 /******************************************************************************/
1583 /*-------------------------Global Function Prototypes-------------------------*/
1584 /******************************************************************************/
1585
1586 /** \brief Function to clear an interrupt
1587 * \param interruptSource Source of the interrupt
1588 * \return None
1589 */
1590 IFX_EXTERN void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource);
1591
1592 /** \brief Function to query the currently set Huffman Table length for AC values
1593 * \param table Huffman Table for which to query the current length
1594 * \return Current length of Huffman Table
1595 */
1596 IFX_EXTERN uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table);
1597
1598 /** \brief Function to check if a Huffman Table and a Huffman Table component is enabled for AC values
1599 * \param table Huffman Table to check
1600 * \param component Huffman Table component to check
1601 * \return @ref IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, @ref IfxCif_State_Disabled otherwise
1602 */
1603 IFX_EXTERN IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
1604
1605 /** \brief Function to query the current Huffman Table length for DC values
1606 * \param table Huffman Table for which to query the current length
1607 * \return Current length of Huffman Table
1608 */
1609 IFX_EXTERN uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table);
1610
1611 /** \brief Function to check if a Huffman Table and a Huffman Table component is enabled for DC values
1612 * \param table Huffman Table to check
1613 * \param component Huffman Table component to check
1614 * \return @ref IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, @ref IfxCif_State_Disabled otherwise
1615 */
1616 IFX_EXTERN IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
1617
1618 /** \brief Function to query the state of one JPE debug signal source
1619 * \param source Signal source for which to query the debug signal state
1620 * \return @ref IfxCif_JpeDebugSignalState_Inactive if the debug signal is currently inactive, @ref IfxCif_JpeDebugSignalState_Active if the debug signal is currently active
1621 */
1622 IFX_EXTERN IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source);
1623
1624 /** \brief Function to query the enabled state of an interrupt
1625 * \param interruptSource Source of the interrupt
1626 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
1627 */
1628 IFX_EXTERN IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource);
1629
1630 /** \brief Function to query the currently selected Q-Table for one component
1631 * \param component Component for which to query the currently selected Q-Table
1632 * \return Currently selected Q-Table
1633 */
1634 IFX_EXTERN IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component);
1635
1636 /** \brief Function to query the current enabled state of the scaling of an input value source
1637 * \param source Input value source for which to query the enabled state
1638 * \return @ref IfxCif_State_Enabled if scaling is enabled, @ref IfxCif_State_Disabled if scaling is disabled
1639 */
1640 IFX_EXTERN IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source);
1641
1642 /** \brief Function to query the currently set JPEG codec image size of one tier
1643 * \param tier Tier for which to query the JPEG codec image size
1644 * \return Currently set image size for R2B and SGEN blocks
1645 */
1646 IFX_EXTERN uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier);
1647
1648 /** \brief Function to query the masked state of an interrupt
1649 * \param interruptSource Source of the interrupt
1650 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
1651 */
1652 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource);
1653
1654 /** \brief Function to query the raw state of an interrupt
1655 * \param interruptSource Source of the interrupt
1656 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
1657 */
1658 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource);
1659
1660 /**
1661 * \return None
1662 */
1663 IFX_EXTERN void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length);
1664
1665 /** \brief Function to set the Huffman Table length for AC values
1666 * \param table Huffman Table for which to set the length
1667 * \param length Length to set
1668 * \return None
1669 */
1670 IFX_EXTERN void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length);
1671
1672 /** \brief Function to set the Huffman Table selector for AC Values
1673 * \param table Huffman Table to select
1674 * \param component Huffman Table component to select
1675 * \return None
1676 */
1677 IFX_EXTERN void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
1678
1679 /** \brief Function to set the Huffman Table length for DC values
1680 * \param table Huffman Table for which to set the length
1681 * \param length Length to set
1682 * \return None
1683 */
1684 IFX_EXTERN void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length);
1685
1686 /** \brief Function to set the Huffman Table selector for DC values
1687 * \param table Huffman Table to select
1688 * \param component Huffman Table component to select
1689 * \return None
1690 */
1691 IFX_EXTERN void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
1692
1693 /** \brief Function to enable or disable an interrupt
1694 * \param interruptSource Source of the interrupt to enable or disable
1695 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
1696 * \return None
1697 */
1698 IFX_EXTERN void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState);
1699
1700 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
1701 * \param interruptSource Source of the interrupt
1702 * \return None
1703 */
1704 IFX_EXTERN void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource);
1705
1706 /** \brief Function to set the Q-Table selector for one component
1707 * \param component Component for which to select the Q-Table
1708 * \param selector Q-Table to select
1709 * \return None
1710 */
1711 IFX_EXTERN void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector);
1712
1713 /** \brief Function to enable or disable scaling of one input value source
1714 * \param source Input value source for which to query the enabled state
1715 * \param scalingEnable @ref IfxCif_State_Enabled to enable scaling, @ref IfxCif_State_Disabled to disable scaling
1716 * \return None
1717 */
1718 IFX_EXTERN void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable);
1719
1720 /** \brief Function to set the JPEG codec image size of one tier
1721 * \param tier Tier for which to set the JPEG codec image size
1722 * \param size Image size for R2B and SGEN blocks
1723 * \return None
1724 */
1725 IFX_EXTERN void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size);
1726
1727 /** \} */
1728
1729 /** \addtogroup IfxLld_Cif_Std_swFunctions
1730 * \{ */
1731
1732 /******************************************************************************/
1733 /*-------------------------Inline Function Prototypes-------------------------*/
1734 /******************************************************************************/
1735
1736 /** \brief Function to query the currently set watchdog predivider
1737 * \return Currently set predivider
1738 */
1739 IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider(void);
1740
1741 /** \brief Function to query the enabled state of the watchdog unit
1742 * \return @ref IfxCif_State_Enabled if the watchdog unit is enabled, @ref IfxCif_State_Disabled if the watchdog unit is disabled
1743 */
1744 IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState(void);
1745
1746 /** \brief Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle)
1747 * \param predivider Predivider to set
1748 * \return None
1749 */
1750 IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider(uint16 predivider);
1751
1752 /** \brief Function to enable or disable the watchdog unit
1753 * \param enableState @ref IfxCif_State_Enabled to enable the watchdog unit, @ref IfxCif_State_Disabled to disable the watchdog unit
1754 * \return None
1755 */
1756 IFX_INLINE void IfxCif_setSecurityWatchdogEnableState(IfxCif_State enableState);
1757
1758 /******************************************************************************/
1759 /*-------------------------Global Function Prototypes-------------------------*/
1760 /******************************************************************************/
1761
1762 /** \brief Function to clear an interrupt
1763 * \param interruptSource Source of the interrupt
1764 * \return None
1765 */
1766 IFX_EXTERN void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1767
1768 /** \brief Function to get the masked state of an interrupt
1769 * \param interruptSource Source of the interrupt
1770 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
1771 */
1772 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1773
1774 /** \brief Function to get the raw state of an interrupt
1775 * \param interruptSource Source of the interrupt
1776 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
1777 */
1778 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1779
1780 /** \brief Function to query the enabled state of an interrupt
1781 * \param interruptSource Source of the interrupt
1782 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
1783 */
1784 IFX_EXTERN IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1785
1786 /** \brief Function to query the current value of a timeout counter of one tier
1787 * \param tier Tier for which to query the timeout counter
1788 * \param timeoutCounter Timeout counter to query
1789 * \return Current timeout
1790 */
1791 IFX_EXTERN uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter);
1792
1793 /** \brief Function to reset one watchdog counter
1794 * \param counter Counter to reset
1795 * \return None
1796 */
1797 IFX_EXTERN void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter);
1798
1799 /** \brief Function to enable or disable an interrupt
1800 * \param interruptSource Source of the interrupt to enable or disable
1801 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
1802 * \return None
1803 */
1804 IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState);
1805
1806 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
1807 * \param interruptSource Source of the interrupt
1808 * \return None
1809 */
1810 IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource);
1811
1812 /** \brief Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout
1813 * \param tier Tier for which to set the timeout
1814 * \param timeoutCounter Timeout counter for which to set the timeout
1815 * \param timeout Timeout to set
1816 * \return None
1817 */
1818 IFX_EXTERN void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout);
1819
1820 /** \} */
1821
1822 /** \addtogroup IfxLld_Cif_Std_ispisFunctions
1823 * \{ */
1824
1825 /******************************************************************************/
1826 /*-------------------------Inline Function Prototypes-------------------------*/
1827 /******************************************************************************/
1828
1829 /** \brief Function to query the enabled state of image stabilization
1830 * \return @ref IfxCif_State_Enabled if image stabilization is enabled, @ref IfxCif_State_Disabled if image stabilization is disabled
1831 */
1832 IFX_INLINE IfxCif_State IfxCif_getIspisEnableState(void);
1833
1834 /** \brief Function to query the current image stabilization recenter value
1835 * \return Current image stabilization recenter value
1836 */
1837 IFX_INLINE uint8 IfxCif_getIspisRecenterValue(void);
1838
1839 /** \brief Function to enable or disable image stabilization
1840 * \param enableState @ref IfxCif_State_Enabled to enable image stabilization, @ref IfxCif_State_Disabled to disable image stabilization
1841 * \return None
1842 */
1843 IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState);
1844
1845 /** \brief Function to set the image stabilization offsets of the output window
1846 * \param hOffset Horizontal Offset
1847 * \param vOffset Vertical Offset
1848 * \return None
1849 */
1850 IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset);
1851
1852 /** \brief Function to set the picture size
1853 * \param hSize Horizontal Picture Size
1854 * \param vSize Vertical Picture Size
1855 * \return None
1856 */
1857 IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize);
1858
1859 /** \brief Function to set the image stabilization recenter value
1860 * \param value Recenter value to set (0 to disabled recenter value, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2 power(recenter))
1861 * \return None
1862 */
1863 IFX_INLINE void IfxCif_setIspisRecenterValue(uint8 value);
1864
1865 /******************************************************************************/
1866 /*-------------------------Global Function Prototypes-------------------------*/
1867 /******************************************************************************/
1868
1869 /** \brief Function to query the current camera displacement for one tier
1870 * \param tier Tier for which to query the camera displacement
1871 * \return Current camera displacement
1872 */
1873 IFX_EXTERN uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier);
1874
1875 /** \brief Function to query the offset of the current picture for one tier
1876 * \param tier Tier for which to query the offset
1877 * \return Offset of the current picture
1878 */
1879 IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier);
1880
1881 /** \brief Function to query the picture size of the current picture for one tier
1882 * \param tier Tier for which to query the picture size
1883 * \return Picture size of the current picture
1884 */
1885 IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier);
1886
1887 /** \brief Function to query the current maximum displacement for one tier
1888 * \param tier Tier for which to query the maximum displacement
1889 * \return Current maximum displacement
1890 */
1891 IFX_EXTERN uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier);
1892
1893 /** \brief Function to query the current image stabilization offset of the output window of one tier
1894 * \param tier Tier for which to query the offset
1895 * \return Current offset
1896 */
1897 IFX_EXTERN uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier);
1898
1899 /** \brief Function to query the current picture size for one tier
1900 * \param tier Tier for which to query the picture size
1901 * \return Current picture size
1902 */
1903 IFX_EXTERN uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier);
1904
1905 /** \brief Function to query the enabled state of image stabilization recenter feature
1906 * \return @ref IfxCif_State_Enabled if the image stabilization recenter feature is enabled, @ref IfxCif_State_Disabled if the image stabilization recenter feature is disabled
1907 */
1908 IFX_EXTERN IfxCif_State IfxCif_getIspisRecenterEnableState(void);
1909
1910 /** \brief Function to set the camera displacement for one tier
1911 * \param tier Tier for which to set the camera displacement
1912 * \param displacement Camera displacement to set
1913 * \return None
1914 */
1915 IFX_EXTERN void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement);
1916
1917 /** \brief Function to set the maximum displacement for one tier
1918 * \param tier Tier for which to set the maximum displacement
1919 * \param displacement Displacement to set
1920 * \return None
1921 */
1922 IFX_EXTERN void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement);
1923
1924 /** \brief Function to set the image stabilization offset of the output window of one tier
1925 * \param tier Tier for which to set the offset
1926 * \param offset Offset to set
1927 * \return None
1928 */
1929 IFX_EXTERN void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset);
1930
1931 /** \brief Function to set the picture size for one tier
1932 * \param tier Tier for which to set the picture size
1933 * \param size Size to set
1934 * \return None
1935 */
1936 IFX_EXTERN void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size);
1937
1938 /** \} */
1939
1940 /** \addtogroup IfxLld_Cif_Std_epFunctions
1941 * \{ */
1942
1943 /******************************************************************************/
1944 /*-------------------------Global Function Prototypes-------------------------*/
1945 /******************************************************************************/
1946
1947 /** \brief Function to clear one extra path error
1948 * \param source Extra path error to clear
1949 * \return None
1950 */
1951 IFX_EXTERN void IfxCif_clearEpError(IfxCif_EpErrorClearSources source);
1952
1953 /** \brief Function to clear an interrupt
1954 * \param z Extra path for which to clear the interrupt
1955 * \param interruptSource Source of the interrupt
1956 * \return None
1957 */
1958 IFX_EXTERN void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
1959
1960 /** \brief Function to trigger an immediate configuration update for one extra path
1961 * \param z Function to trigger an immediate configuration update for one extra path
1962 * \return None
1963 */
1964 IFX_EXTERN void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z);
1965
1966 /** \brief Function to skip one picture of one extra path
1967 * \param z Extra path for which to skip one picture
1968 * \return None
1969 */
1970 IFX_EXTERN void IfxCif_epSkipPicture(IfxCif_ExtraPath z);
1971
1972 /** \brief Function to query the current base address of the ring buffer of one extra path
1973 * \param z Extra path for which to query the current base address of the ring buffer
1974 * \return Current base address of the ring buffer
1975 */
1976 IFX_EXTERN uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z);
1977
1978 /** \brief Function to query the initial base address of the ring buffer of one extra path
1979 * \param z Extra path for which to query the initial base address
1980 * \return Initial base address of the ring buffer of the extra path
1981 */
1982 IFX_EXTERN uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z);
1983
1984 /** \brief Function to query the image cropping camera displacement of one tier of one extra path
1985 * \param z Extra path for which to query the image cropping camera displacement
1986 * \param tier Tier for which to query the image cropping camera displacement
1987 * \return Current image cropping camera displacement
1988 */
1989 IFX_EXTERN uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
1990
1991 /** \brief Function to query the current image cropping picture offset of one tier of one extra path
1992 * \param z Extra path for which to query the current image cropping picture offset
1993 * \param tier Tier for which to query the current image cropping picture offset
1994 * \return Current image cropping picture offset
1995 */
1996 IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
1997
1998 /** \brief Function to query the current image cropping picture size of one tier of one extra path
1999 * \param z Extra path for which to query the current image cropping picture size
2000 * \param tier Tier for which to query the current image cropping picture size
2001 * \return Current image cropping picture size
2002 */
2003 IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2004
2005 /** \brief Function to query the image cropping enabled state of one extra path
2006 * \param z Extra path for which to query the image cropping enabled state
2007 * \return @ref IfxCif_State_Enabled if image cropping is enabled, @ref IfxCif_State_Disabled otherwise
2008 */
2009 IFX_EXTERN IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z);
2010
2011 /** \brief Function to query the maximum displacement of one tier of one extra path
2012 * \param z Extra path for which to query the maximum displacement
2013 * \param tier Tier for which to query the maximum displacement
2014 * \return Current maximum displacement
2015 */
2016 IFX_EXTERN uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2017
2018 /** \brief Function to query the image cropping offset of the output window of one tier of one extra path
2019 * \param z Extra path for which to query the image cropping offset of the output window
2020 * \param tier Tier for which to query the image cropping offset of the output window
2021 * \return Current image cropping offset of the output window
2022 */
2023 IFX_EXTERN uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2024
2025 /** \brief Function to query the image cropping picture size of one tier of one extra path
2026 * \param z Extra path for which to query the image cropping picture size
2027 * \param tier Tier for which to query the image cropping picture size of one tier of one extra path
2028 */
2029 IFX_EXTERN uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
2030
2031 /** \brief Function to query the enabled state of the recenter feature of one extra path
2032 * \param z Extra path for which to query the enabled state of the recenter feature
2033 * \return @ref IfxCif_State_Enabled if the recenter feature is enabled, @ref IfxCif_State_Disabled otherwise
2034 */
2035 IFX_EXTERN IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z);
2036
2037 /** \brief Function to query the state of an extra path error source
2038 * \param source Error source for which to query the state
2039 * \return @ref IfxCif_ErrorState_NoError if the error did not occur, @ref IfxCif_ErrorState_Error if the error occured
2040 */
2041 IFX_EXTERN IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source);
2042
2043 /** \brief Function to query the enabled state of one feature of one extra path
2044 * \param z Extra path for which to query the enabled state of the feature
2045 * \param feature Feature which to query
2046 * \return @ref IfxCif_State_Enabled if the feature of the extra path is enabled, @ref IfxCif_State_Disabled if the feature of the extra path is disabled
2047 */
2048 IFX_EXTERN IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature);
2049
2050 /** \brief Function to query the initial size of the ring buffer of one extra path
2051 * \param z Extra path for which to query the initial size
2052 * \return Initial size of the ring buffer of the extra path
2053 */
2054 IFX_EXTERN uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z);
2055
2056 /** \brief Function to query the initial filling level interrupt offset of one extra path
2057 * \param z Extra path for which to query the initial filling level interrupt offset
2058 * \return Initial filling level interrupt offset of the extra path
2059 */
2060 IFX_EXTERN uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z);
2061
2062 /** \brief Function to query the initial offset counter of one extra path
2063 * \param z Extra path for which to query the initial offset counter
2064 * \return Initial offset counter of the extra path
2065 */
2066 IFX_EXTERN uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z);
2067
2068 /** \brief Function to query the current input enable state of one extra path
2069 * \param z Extra path for which to query the current input enable state
2070 * \return @ref IfxCif_State_Enabled if the extra path is used in module MI_IN, @ref IfxCif_State_Disabled if the extra path is not used in module MI_IN
2071 */
2072 IFX_EXTERN IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z);
2073
2074 /** \brief Function to query the enabled state of an interrupt
2075 * \param z Extra path for which to query the enabled state of the interrupt
2076 * \param interruptSource Source of the interrupt
2077 * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
2078 */
2079 IFX_EXTERN IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
2080
2081 /** \brief Function to query the current interrupt offset of one extra path
2082 * \param z Extra path for which to query the current interrupt offset
2083 * \return Current interrupt offset
2084 */
2085 IFX_EXTERN uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z);
2086
2087 /** \brief Function to query the current offset counter of one extra path
2088 * \param z Extra path for which to query the current offset counter
2089 * \return Current offset counter
2090 */
2091 IFX_EXTERN uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z);
2092
2093 /** \brief Function to query the initial offset counter start value of one extra path
2094 * \param z Extra path for which to query the initial offset counter start value
2095 * \return Initial offset counter start value of the extra path
2096 */
2097 IFX_EXTERN uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z);
2098
2099 /** \brief Function to query the current output enable state of one extra path
2100 * \param z Extra path for which to query the current output enable state
2101 * \return @ref IfxCif_State_Enabled if the extra path is used in module MI_OUT, @ref IfxCif_State_Disabled if the extra path is not used in module MI_OUT
2102 */
2103 IFX_EXTERN IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z);
2104
2105 /** \brief Function to query the current recenter value of one extra path
2106 * \param z Extra path for which to query the current recenter value
2107 * \return Current recenter value
2108 */
2109 IFX_EXTERN uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z);
2110
2111 /** \brief Function to query the current ring buffer size of one extra path
2112 * \param z Extra path for which to query the ring buffer size
2113 * \return Current ring buffer size
2114 */
2115 IFX_EXTERN uint32 IfxCif_getEpSize(IfxCif_ExtraPath z);
2116
2117 /** \brief Function to query the write format of one extra path
2118 * \param z Extra path for which to query the write format
2119 * \return Set write format of the extra path (one member of @ref IfxCif_EpWriteFormat)
2120 */
2121 IFX_EXTERN IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z);
2122
2123 /** \brief Function to get the masked state of an interrupt
2124 * \param z Extra path for which to query the interrupt state
2125 * \param interruptSource Source of the interrupt
2126 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
2127 */
2128 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
2129
2130 /** \brief Function to query the raw state of an interrupt
2131 * \param z Extra path for which to query the interrupt state
2132 * \param interruptSource Source of the interrupt
2133 * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
2134 */
2135 IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
2136
2137 /** \brief Function to set the initial base address of the ring buffer of one extra path
2138 * \param z Extra path for which to set the initial base address
2139 * \param baseAddress Initial base address of the ring buffer to set
2140 * \return None
2141 */
2142 IFX_EXTERN void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress);
2143
2144 /** \brief Function to set the image cropping camera displacement of one tier of one extra path
2145 * \param z Extra path for which to set the image cropping camera displacement
2146 * \param tier Tier for which to set the image cropping camera displacement
2147 * \param displacement Image cropping camera displacement to set
2148 * \return None
2149 */
2150 IFX_EXTERN void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement);
2151
2152 /** \brief Function to enable or disable image cropping of one extra path
2153 * \param z Extra path for which to enable or disable image cropping
2154 * \param enableState @ref IfxCif_State_Enabled to enable image cropping, @ref IfxCif_State_Disabled to disable image cropping
2155 * \return None
2156 */
2157 IFX_EXTERN void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState);
2158
2159 /** \brief Function to set the maximum displacement of one tier of one extra path
2160 * \param z Extra path for which to set the maximum displacement
2161 * \param tier Tier for which to set the maximum displacement
2162 * \param displacement Maximum displacement to set
2163 * \return None
2164 */
2165 IFX_EXTERN void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement);
2166
2167 /** \brief Function to set the image cropping offset of the output window of one tier of one extra path
2168 * \param z Extra path for which to set the image cropping offset of the output window
2169 * \param tier Tier for which to set the image cropping offset of the output window
2170 * \param offset Offset to set
2171 * \return None
2172 */
2173 IFX_EXTERN void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset);
2174
2175 /** \brief Function to set the image cropping offsets of the output window of one extra path
2176 * \param z Extra path for which to set the image cropping offset of the output window
2177 * \param hOffset Offset horizontal to set
2178 * \param vOffset Offset vertical to set
2179 * \return None
2180 */
2181 IFX_EXTERN void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset);
2182
2183 /** \brief Function to set the image cropping picture size of one tier of one extra path
2184 * \param z Extra path for which to set the image cropping picture size
2185 * \param tier Tier for which to set the image cropping picture size
2186 * \param size Image cropping picture size to set
2187 * \return None
2188 */
2189 IFX_EXTERN void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size);
2190
2191 /** \brief Function to set the image cropping picture sizes one extra path
2192 * \param z Extra path for which to set the image cropping picture size
2193 * \param hSize Image cropping picture horizontal size to set
2194 * \param vSize Image cropping picture vertical size to set
2195 * \return None
2196 */
2197 IFX_EXTERN void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize);
2198
2199 /** \brief Function to enable or disable one feature of one extra path
2200 * \param z Extra path for which to enable or disable one feature
2201 * \param feature Feature to enable or disable
2202 * \param enableState @ref IfxCif_State_Enabled to enable the feature, @ref IfxCif_State_Disabled to disable the feature
2203 * \return None
2204 */
2205 IFX_EXTERN void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState);
2206
2207 /** \brief Function to set the initial size of the ring buffer of one extra path
2208 * \param z Extra path for which to set the initial size of the ring buffer
2209 * \param size Initial size of the ring buffer to se
2210 * \return None
2211 */
2212 IFX_EXTERN void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size);
2213
2214 /** \brief Function to set the initial filling level interrupt offset of one extra path
2215 * \param z Extra path for which to set the initial filling level interrupt offset
2216 * \param interruptOffset Initial filling level interrupt offset to set
2217 * \return None
2218 */
2219 IFX_EXTERN void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset);
2220
2221 /** \brief Function to set the initial offset counter of one extra path
2222 * \param z Extra path for which to set the initial offset counter
2223 * \param offsetCounter Initial offset counter to set
2224 * \return None
2225 */
2226 IFX_EXTERN void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter);
2227
2228 /** \brief Function to enable or disable an interrupt
2229 * \param z Extra path for which to enable or disable the interrupt
2230 * \param interruptSource Source of the interrupt to enable or disable
2231 * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
2232 * \return None
2233 */
2234 IFX_EXTERN void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState);
2235
2236 /** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
2237 * \param z Function to set an interrupt request bit (does not necessarily trigger an interrupt)
2238 * \param interruptSource Extra path for which to set the interrupt request bit
2239 * \return None
2240 */
2241 IFX_EXTERN void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
2242
2243 /** \brief Function to set the initial offset counter start value of one extra path
2244 * \param z Extra path for which to set the initial offset counter start value
2245 * \param offsetCounter Initial offset counter start value to set
2246 * \return None
2247 */
2248 IFX_EXTERN void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter);
2249
2250 /** \brief Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter))
2251 * \param z Extra path for which to set the recenter value
2252 * \param value Recenter value to set
2253 * \return None
2254 */
2255 IFX_EXTERN void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value);
2256
2257 /** \brief Function to set the write format for one extra path
2258 * \param z Extra path for which to set the write format
2259 * \param writeFormat Write format to set
2260 * \return None
2261 */
2262 IFX_EXTERN void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat);
2263
2264 /** \} */
2265
2266 /** \addtogroup IfxLld_Cif_Std_dpFunctions
2267 * \{ */
2268
2269 /******************************************************************************/
2270 /*-------------------------Inline Function Prototypes-------------------------*/
2271 /******************************************************************************/
2272
2273 /** \brief Function to query the debug path enabled state
2274 * \return @ref IfxCif_State_Enabled if the debug path is enabled, @ref IfxCif_State_Disabled if the debug path is disabled
2275 */
2276 IFX_INLINE IfxCif_State IfxCif_getDpEnableState(void);
2277
2278 /** \brief Function to query the selected debug path source path
2279 * \return Currently selected debug path source path (one member of @ref IfxCif_DpSourcePath)
2280 */
2281 IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath(void);
2282
2283 /** \brief Function to enable or disable the debug path
2284 * \param enableState @ref IfxCif_State_Enabled to enable the debug path, @ref IfxCif_State_Disabled to disable the debug path
2285 * \return None
2286 */
2287 IFX_INLINE void IfxCif_setDpEnableState(IfxCif_State enableState);
2288
2289 /** \brief Function to select one debug path source path
2290 * \param sourcePath Source path to select
2291 * \return None
2292 */
2293 IFX_INLINE void IfxCif_setDpSourcePath(IfxCif_DpSourcePath sourcePath);
2294
2295 /******************************************************************************/
2296 /*-------------------------Global Function Prototypes-------------------------*/
2297 /******************************************************************************/
2298
2299 /** \brief Function to reset one debug path counter
2300 * \param counter Debug path counter to reset
2301 * \return None
2302 */
2303 IFX_EXTERN void IfxCif_dpResetCounter(IfxCif_DpCounters counter);
2304
2305 /** \brief Function to query the transmission enabled state of one debug path control source
2306 * \param source Source for which to query the transmission enabled state
2307 * \return @ref IfxCif_State_Enabled if transmission is enabled, @ref IfxCif_State_Disabled if transmission is disabled
2308 */
2309 IFX_EXTERN IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source);
2310
2311 /** \brief Function to query the current counter value of one debug path counter
2312 * \param counter Counter for which to query the value
2313 * \return Current counter value
2314 */
2315 IFX_EXTERN uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter);
2316
2317 /** \brief Function to query the value of one user defined debug symbol
2318 * \param x User defined symbol to query
2319 * \return Value of the user defined debug symbol
2320 */
2321 IFX_EXTERN uint16 IfxCif_getDpUserDefinedSymbol(uint8 x);
2322
2323 /** \brief Function to enable or disable transmission of one debug path control source
2324 * \param source Source for which to enable or disable transmission
2325 * \param enableState @ref IfxCif_State_Enabled to enable transmission, @ref IfxCif_State_Disabled to disable transmission
2326 * \return None
2327 */
2328 IFX_EXTERN void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState);
2329
2330 /** \brief Function to set one debug path counter to a counter value
2331 * \param counter Counter to set
2332 * \param counterValue Counter value to set
2333 * \return None
2334 */
2335 IFX_EXTERN void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue);
2336
2337 /** \brief Function to set one user defined debug symbol
2338 * \param x User defined symbol to set
2339 * \param value Value to set
2340 * \return None
2341 */
2342 IFX_EXTERN void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value);
2343
2344 /** \} */
2345
2346 /******************************************************************************/
2347 /*---------------------Inline Function Implementations------------------------*/
2348 /******************************************************************************/
2349
2350 IFX_INLINE void IfxCif_clearKernelResetState(void)
2351 {
2352 MODULE_CIF.BBB.KRSTCLR.B.CLR = 1;
2353 }
2354
2355
2356 IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void)
2357 {
2358 MODULE_CIF.ISP.CTRL.B.ISP_GEN_CFG_UPD = 1;
2359 }
2360
2361
2362 IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void)
2363 {
2364 MODULE_CIF.ISP.CTRL.B.ISP_CFG_UPD = 1;
2365 }
2366
2367
2368 IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void)
2369 {
2370 MODULE_CIF.MI.INIT.B.MI_CFG_UPD = 1;
2371 }
2372
2373
2374 IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState(void)
2375 {
2376 return (IfxCif_State)MODULE_CIF.MI.CTRL.B.INIT_BASE_EN;
2377 }
2378
2379
2380 IFX_INLINE uint16 IfxCif_getCifModuleId(void)
2381 {
2382 return MODULE_CIF.BBB.MODID.B.MODNUMBER;
2383 }
2384
2385
2386 IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection(void)
2387 {
2388 return IfxCif_PortInputSelection_PinMapping0;
2389 }
2390
2391
2392 IFX_INLINE uint8 IfxCif_getCifModuleRevision(void)
2393 {
2394 return MODULE_CIF.BBB.MODID.B.MODREV;
2395 }
2396
2397
2398 IFX_INLINE uint8 IfxCif_getCifModuleType(void)
2399 {
2400 return MODULE_CIF.BBB.MODID.B.MODTYPE;
2401 }
2402
2403
2404 IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState(void)
2405 {
2406 /* bit is inverted */
2407 return (1 != MODULE_CIF.CCL.B.CIF_CCLDISS) ? IfxCif_State_Enabled : IfxCif_State_Disabled;
2408 }
2409
2410
2411 IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount(void)
2412 {
2413 return MODULE_CIF.ISP.FRAME_COUNT.B.FRAME_COUNTER;
2414 }
2415
2416
2417 IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation(void)
2418 {
2419 return (IfxCif_IspInformFieldInformation)MODULE_CIF.ISP.FLAGS_SHD.B.INFORM_FIELD;
2420 }
2421
2422
2423 IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState(void)
2424 {
2425 return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.ISP_INFORM_ENABLE_SHD;
2426 }
2427
2428
2429 IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath(void)
2430 {
2431 return (IfxCif_DataPathSelectorForMainPath)MODULE_CIF.DPCL.B.CIF_MP_MUX;
2432 }
2433
2434
2435 IFX_INLINE IfxCif_State IfxCif_getDpEnableState(void)
2436 {
2437 return (IfxCif_State)MODULE_CIF.DP.CTRL.B.DP_EN;
2438 }
2439
2440
2441 IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath(void)
2442 {
2443 return (IfxCif_DpSourcePath)MODULE_CIF.DP.CTRL.B.DP_SEL;
2444 }
2445
2446
2447 IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface(void)
2448 {
2449 return (IfxCif_InputInterface)MODULE_CIF.DPCL.B.IF_SELECT;
2450 }
2451
2452
2453 IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence(void)
2454 {
2455 return (IfxCif_IspCcirSequence)MODULE_CIF.ISP.ACQ_PROP.B.CCIR_SEQ;
2456 }
2457
2458
2459 IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange(void)
2460 {
2461 return (IfxCif_IspColorSpaceMatrixCrominanceClippingRange)MODULE_CIF.ISP.CTRL.B.ISP_CSM_C_RANGE;
2462 }
2463
2464
2465 IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange(void)
2466 {
2467 return (IfxCif_IspColorSpaceMatrixLuminanceClippingRange)MODULE_CIF.ISP.CTRL.B.ISP_CSM_Y_RANGE;
2468 }
2469
2470
2471 IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState(void)
2472 {
2473 return (IfxCif_State)MODULE_CIF.ISP.ACQ_PROP.B.FIELD_INVERT;
2474 }
2475
2476
2477 IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection(void)
2478 {
2479 return (IfxCif_IspFieldSelection)MODULE_CIF.ISP.ACQ_PROP.B.FIELD_SELECTION;
2480 }
2481
2482
2483 IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity(void)
2484 {
2485 return (IfxCif_IspSyncPolarity)MODULE_CIF.ISP.ACQ_PROP.B.HSYNC_POL;
2486 }
2487
2488
2489 IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState(void)
2490 {
2491 return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_INFORM_ENABLE;
2492 }
2493
2494
2495 IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface(void)
2496 {
2497 return (IfxCif_IspInputInterface)MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION;
2498 }
2499
2500
2501 IFX_INLINE uint16 IfxCif_getIspInputPortSDataState(void)
2502 {
2503 return MODULE_CIF.ISP.FLAGS_SHD.B.S_DATA;
2504 }
2505
2506
2507 IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState(void)
2508 {
2509 return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.S_HSYNC;
2510 }
2511
2512
2513 IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState(void)
2514 {
2515 return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.S_VSYNC;
2516 }
2517
2518
2519 IFX_INLINE IfxCif_State IfxCif_getIspMode(void)
2520 {
2521 return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_MODE;
2522 }
2523
2524
2525 IFX_INLINE IfxCif_State IfxCif_getIspOutputState(void)
2526 {
2527 return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_ENABLE;
2528 }
2529
2530
2531 IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge(void)
2532 {
2533 return (IfxCif_IspSamplingEdge)MODULE_CIF.ISP.ACQ_PROP.B.SAMPLE_EDGE;
2534 }
2535
2536
2537 IFX_INLINE IfxCif_State IfxCif_getIspState(void)
2538 {
2539 return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.ISP_ENABLE_SHD;
2540 }
2541
2542
2543 IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity(void)
2544 {
2545 return (IfxCif_IspSyncPolarity)MODULE_CIF.ISP.ACQ_PROP.B.VSYNC_POL;
2546 }
2547
2548
2549 IFX_INLINE IfxCif_State IfxCif_getIspisEnableState(void)
2550 {
2551 return (IfxCif_State)MODULE_CIF.ISPIS.CTRL.B.IS_EN;
2552 }
2553
2554
2555 IFX_INLINE uint8 IfxCif_getIspisRecenterValue(void)
2556 {
2557 return MODULE_CIF.ISPIS.RECENTER.B.RECENTER;
2558 }
2559
2560
2561 IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode(void)
2562 {
2563 return (IfxCif_JpeHeaderGenerationMode)MODULE_CIF.JPE.TABLE_FLUSH.B.TABLE_FLUSH;
2564 }
2565
2566
2567 IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode(void)
2568 {
2569 return (IfxCif_JpeHeaderMode)MODULE_CIF.JPE.HEADER_MODE.B.HEADER_MODE;
2570 }
2571
2572
2573 IFX_INLINE IfxCif_State IfxCif_getJpeMode(void)
2574 {
2575 return (IfxCif_State)MODULE_CIF.JPE.ENCODE_MODE.B.ENCODE_MODE;
2576 }
2577
2578
2579 IFX_INLINE uint16 IfxCif_getJpeRestartInterval(void)
2580 {
2581 return MODULE_CIF.JPE.RESTART_INTERVAL.B.RESTART_INTERVAL;
2582 }
2583
2584
2585 IFX_INLINE IfxCif_JpeState IfxCif_getJpeState(void)
2586 {
2587 return (IfxCif_JpeState)MODULE_CIF.JPE.ENCODER_BUSY.B.CODEC_BUSY;
2588 }
2589
2590
2591 IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId(void)
2592 {
2593 return (IfxCif_JpeTableId)MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID;
2594 }
2595
2596
2597 IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode(void)
2598 {
2599 return (IfxCif_JpegJfifStreamEncoderContinuousMode)MODULE_CIF.JPE.ENCODE.B.CONT_MODE;
2600 }
2601
2602
2603 IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat(void)
2604 {
2605 return (IfxCif_JpegPictureEncodingFormat)MODULE_CIF.JPE.PIC_FORMAT.B.ENC_PIC_FORMAT;
2606 }
2607
2608
2609 IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus(void)
2610 {
2611 return (IfxCif_State)MODULE_CIF.BBB.KRST0.B.RSTSTAT;
2612 }
2613
2614
2615 IFX_INLINE uint32 IfxCif_getMiByteCount(void)
2616 {
2617 return MODULE_CIF.MI.BYTE_CNT.B.BYTE_CNT;
2618 }
2619
2620
2621 IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState(void)
2622 {
2623 return (IfxCif_State)MODULE_CIF.MI.CTRL.B.BYTE_SWAP;
2624 }
2625
2626
2627 IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength(void)
2628 {
2629 return (IfxCif_MiBurstLength)MODULE_CIF.MI.CTRL.B.BURST_LEN_CHROM;
2630 }
2631
2632
2633 IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength(void)
2634 {
2635 return (IfxCif_MiBurstLength)MODULE_CIF.MI.CTRL.B.BURST_LEN_LUM;
2636 }
2637
2638
2639 IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat(void)
2640 {
2641 return (IfxCif_MiMainPictureWriteFormat)MODULE_CIF.MI.CTRL.B.MP_WRITE_FORMAT;
2642 }
2643
2644
2645 IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset(void)
2646 {
2647 /* read value from unsigned component of the register structure because lower bits are tied to 0
2648 * as interrupt offset needs to be a word aligned value */
2649 return MODULE_CIF.MI.MP_Y_IRQ_OFFS_INIT.U;
2650 }
2651
2652
2653 IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset(void)
2654 {
2655 return MODULE_CIF.MI.MP_Y_IRQ_OFFS_SHD.B.MP_Y_IRQ_OFFS;
2656 }
2657
2658
2659 IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState(void)
2660 {
2661 return (IfxCif_State)MODULE_CIF.MI.CTRL.B.INIT_OFFSET_EN;
2662 }
2663
2664
2665 IFX_INLINE uint16 IfxCif_getModuleNumber(void)
2666 {
2667 return MODULE_CIF.ID.B.MODNUMBER;
2668 }
2669
2670
2671 IFX_INLINE uint8 IfxCif_getModuleRevisionNumber(void)
2672 {
2673 return MODULE_CIF.ID.B.MODREV;
2674 }
2675
2676
2677 IFX_INLINE IfxCif_State IfxCif_getModuleState(void)
2678 {
2679 /* bit is inverted */
2680 return (IfxCif_State)(1 != MODULE_CIF.BBB.CLC.B.DISS) ? IfxCif_State_Enabled : IfxCif_State_Disabled;
2681 }
2682
2683
2684 IFX_INLINE uint8 IfxCif_getModuleType(void)
2685 {
2686 return MODULE_CIF.ID.B.MODTYPE;
2687 }
2688
2689
2690 IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames(void)
2691 {
2692 return MODULE_CIF.ISP.ACQ_NR_FRAMES.B.ACQ_NR_FRAMES;
2693 }
2694
2695
2696 IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider(void)
2697 {
2698 return MODULE_CIF.WD.CTRL.B.WD_PREDIV;
2699 }
2700
2701
2702 IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState(void)
2703 {
2704 return (IfxCif_State)MODULE_CIF.WD.CTRL.B.WD_EN;
2705 }
2706
2707
2708 IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode(void)
2709 {
2710 return (IfxCif_YCSplitterChannelMode)MODULE_CIF.DPCL.B.CIF_CHAN_MODE;
2711 }
2712
2713
2714 IFX_INLINE void IfxCif_initJpegEncoder(void)
2715 {
2716 MODULE_CIF.JPE.INIT.B.JP_INIT = 1;
2717 }
2718
2719
2720 IFX_INLINE void IfxCif_jpeGenerateHeader(void)
2721 {
2722 MODULE_CIF.JPE.GEN_HEADER.B.GEN_HEADER = 1;
2723 }
2724
2725
2726 IFX_INLINE void IfxCif_miSkipPicture(void)
2727 {
2728 MODULE_CIF.MI.INIT.B.MI_SKIP = 1;
2729 }
2730
2731
2732 IFX_INLINE void IfxCif_setClockControlLogicState(IfxCif_State clockControlLogicState)
2733 {
2734 /* bit is inverted */
2735 MODULE_CIF.CCL.B.CIF_CCLFDIS = (clockControlLogicState == IfxCif_State_Disabled) ? 1 : 0;
2736 }
2737
2738
2739 IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector)
2740 {
2741 MODULE_CIF.DPCL.B.CIF_MP_MUX = pathSelector;
2742 }
2743
2744
2745 IFX_INLINE void IfxCif_setDpEnableState(IfxCif_State enableState)
2746 {
2747 MODULE_CIF.DP.CTRL.B.DP_EN = enableState;
2748 }
2749
2750
2751 IFX_INLINE void IfxCif_setDpSourcePath(IfxCif_DpSourcePath sourcePath)
2752 {
2753 MODULE_CIF.DP.CTRL.B.DP_SEL = sourcePath;
2754 }
2755
2756
2757 IFX_INLINE void IfxCif_setInputInterface(IfxCif_InputInterface interface)
2758 {
2759 IFX_UNUSED_PARAMETER(interface);
2760 MODULE_CIF.DPCL.B.IF_SELECT = IfxCif_InputInterface_ParallelInterface;
2761 }
2762
2763
2764 IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset)
2765 {
2766 MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS = hOffset;
2767 MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS = vOffset;
2768 }
2769
2770
2771 IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize)
2772 {
2773 MODULE_CIF.ISP.ACQ_H_SIZE.U = hSize;
2774 MODULE_CIF.ISP.ACQ_V_SIZE.U = vSize;
2775 }
2776
2777
2778 IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence)
2779 {
2780 MODULE_CIF.ISP.ACQ_PROP.B.CCIR_SEQ = sequence;
2781 }
2782
2783
2784 IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
2785 {
2786 MODULE_CIF.ISP.CTRL.B.ISP_CSM_C_RANGE = clippingRange;
2787 }
2788
2789
2790 IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
2791 {
2792 MODULE_CIF.ISP.CTRL.B.ISP_CSM_Y_RANGE = clippingRange;
2793 }
2794
2795
2796 IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState)
2797 {
2798 MODULE_CIF.ISP.ACQ_PROP.B.FIELD_INVERT = fieldInvertState;
2799 }
2800
2801
2802 IFX_INLINE void IfxCif_setIspFieldSelection(IfxCif_IspFieldSelection selection)
2803 {
2804 MODULE_CIF.ISP.ACQ_PROP.B.FIELD_SELECTION = selection;
2805 }
2806
2807
2808 IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity)
2809 {
2810 MODULE_CIF.ISP.ACQ_PROP.B.HSYNC_POL = polarity;
2811 }
2812
2813
2814 IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState)
2815 {
2816 MODULE_CIF.ISP.CTRL.B.ISP_INFORM_ENABLE = inputFormatterState;
2817 }
2818
2819
2820 IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input)
2821 {
2822 MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION = input;
2823 }
2824
2825
2826 IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode)
2827 {
2828 MODULE_CIF.ISP.CTRL.B.ISP_MODE = mode;
2829 }
2830
2831
2832 IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState)
2833 {
2834 MODULE_CIF.ISP.CTRL.B.ISP_ENABLE = ispOutputState;
2835 }
2836
2837
2838 IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset)
2839 {
2840 MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS = hOffset;
2841 MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS = vOffset;
2842 }
2843
2844
2845 IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize)
2846 {
2847 MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE = hSize;
2848 MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE = vSize;
2849 }
2850
2851
2852 IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge)
2853 {
2854 MODULE_CIF.ISP.ACQ_PROP.B.SAMPLE_EDGE = edge;
2855 }
2856
2857
2858 IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity)
2859 {
2860 MODULE_CIF.ISP.ACQ_PROP.B.VSYNC_POL = polarity;
2861 }
2862
2863
2864 IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState)
2865 {
2866 MODULE_CIF.ISPIS.CTRL.B.IS_EN = enableState;
2867 }
2868
2869
2870 IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset)
2871 {
2872 MODULE_CIF.ISPIS.H_OFFS.U = hOffset;
2873 MODULE_CIF.ISPIS.V_OFFS.U = vOffset;
2874 }
2875
2876
2877 IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize)
2878 {
2879 MODULE_CIF.ISPIS.H_SIZE.U = hSize;
2880 MODULE_CIF.ISPIS.V_SIZE.U = vSize;
2881 }
2882
2883
2884 IFX_INLINE void IfxCif_setIspisRecenterValue(uint8 value)
2885 {
2886 MODULE_CIF.ISPIS.RECENTER.B.RECENTER = value;
2887 }
2888
2889
2890 IFX_INLINE void IfxCif_setJpeHeaderGenerationMode(IfxCif_JpeHeaderGenerationMode headerGenerationMode)
2891 {
2892 MODULE_CIF.JPE.TABLE_FLUSH.B.TABLE_FLUSH = headerGenerationMode;
2893 }
2894
2895
2896 IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode)
2897 {
2898 MODULE_CIF.JPE.HEADER_MODE.B.HEADER_MODE = headerMode;
2899 }
2900
2901
2902 IFX_INLINE void IfxCif_setJpeRestartInterval(uint16 interval)
2903 {
2904 MODULE_CIF.JPE.RESTART_INTERVAL.B.RESTART_INTERVAL = interval;
2905 }
2906
2907
2908 IFX_INLINE void IfxCif_setJpeTableDataLsb(uint8 data)
2909 {
2910 MODULE_CIF.JPE.TABLE_DATA.B.TABLE_WDATA_L = data;
2911 }
2912
2913
2914 IFX_INLINE void IfxCif_setJpeTableDataMsb(uint8 data)
2915 {
2916 MODULE_CIF.JPE.TABLE_DATA.B.TABLE_WDATA_H = data;
2917 }
2918
2919
2920 IFX_INLINE void IfxCif_setJpeTableId(IfxCif_JpeTableId tableId)
2921 {
2922 MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
2923 }
2924
2925
2926 IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize)
2927 {
2928 MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE = hSize;
2929 MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE = vSize;
2930 }
2931
2932
2933 IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode)
2934 {
2935 MODULE_CIF.JPE.ENCODE.B.CONT_MODE = mode;
2936 }
2937
2938
2939 IFX_INLINE void IfxCif_setJpegPictureEncodingFormat(IfxCif_JpegPictureEncodingFormat format)
2940 {
2941 MODULE_CIF.JPE.PIC_FORMAT.B.ENC_PIC_FORMAT = format;
2942 }
2943
2944
2945 IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state)
2946 {
2947 MODULE_CIF.BBB.KRST0.B.RST = state;
2948 MODULE_CIF.BBB.KRST1.B.RST = state;
2949 }
2950
2951
2952 IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state)
2953 {
2954 MODULE_CIF.MI.CTRL.B.INIT_BASE_EN = state;
2955 }
2956
2957
2958 IFX_INLINE void IfxCif_setMiByteSwapEnableState(IfxCif_State enableState)
2959 {
2960 MODULE_CIF.MI.CTRL.B.BYTE_SWAP = enableState;
2961 }
2962
2963
2964 IFX_INLINE void IfxCif_setMiChrominanceBurstLength(IfxCif_MiBurstLength burstLength)
2965 {
2966 MODULE_CIF.MI.CTRL.B.BURST_LEN_CHROM = burstLength;
2967 }
2968
2969
2970 IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format)
2971 {
2972 MODULE_CIF.MI.CTRL.B.MP_WRITE_FORMAT = format;
2973 }
2974
2975
2976 IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset(uint32 interruptOffset)
2977 {
2978 /* write value to unsigned component of the register structure because lower bits are tied to 0
2979 * as interrupt offset needs to be a word aligned value */
2980 MODULE_CIF.MI.MP_Y_IRQ_OFFS_INIT.U = interruptOffset;
2981 }
2982
2983
2984 IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
2985 {
2986 MODULE_CIF.MI.CTRL.B.INIT_OFFSET_EN = state;
2987 }
2988
2989
2990 IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames)
2991 {
2992 MODULE_CIF.ISP.ACQ_NR_FRAMES.B.ACQ_NR_FRAMES = numberOfFrames;
2993 }
2994
2995
2996 IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider(uint16 predivider)
2997 {
2998 MODULE_CIF.WD.CTRL.B.WD_PREDIV = predivider;
2999 }
3000
3001
3002 IFX_INLINE void IfxCif_setSecurityWatchdogEnableState(IfxCif_State enableState)
3003 {
3004 MODULE_CIF.WD.CTRL.B.WD_EN = enableState;
3005 }
3006
3007
3008 IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode)
3009 {
3010 MODULE_CIF.DPCL.B.CIF_CHAN_MODE = mode;
3011 }
3012
3013
3014 IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void)
3015 {
3016 MODULE_CIF.JPE.ENCODE.B.ENCODE = 1;
3017 }
3018
3019
3020 #endif /* IFXCIF_H */
IfxCif_getMiDataPathInputEnableState
IFX_EXTERN IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface input...
Definition: IfxCif.c:1971
IfxCif_getRawEpInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2272
IfxCif_InterruptTriggeredState
IfxCif_InterruptTriggeredState
Enumerator for the state of an interrupt.
Definition: IfxCif.h:126
IfxCif_HuffmanTableComponents_Component0
Component 0.
Definition: IfxCif.h:382
IfxCif_JpeTableId_VlcDcTable0
VLC DC Table 0.
Definition: IfxCif.h:485
IfxCif_setEpBaseInitAddress
IFX_EXTERN void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:2782
IfxCif_getJpeHeaderGenerationMode
IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode(void)
Function to query the current header generation debug control mode.
Definition: IfxCif.h:2561
IfxCif_getEpCroppingOffsetOutputWindow
IFX_EXTERN uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping offset of the output window of one tier of one extra path...
Definition: IfxCif.c:644
IfxCif_clearKernelResetState
IFX_INLINE void IfxCif_clearKernelResetState(void)
Function to clear the kernel reset state.
Definition: IfxCif.h:2350
IfxCif_getEpFeatureEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
Function to query the enabled state of one feature of one extra path.
Definition: IfxCif.c:773
IfxCif_getHuffmanAcTableLength
IFX_EXTERN uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table)
Function to query the currently set Huffman Table length for AC values.
Definition: IfxCif.c:1033
IfxCif_getIspState
IFX_INLINE IfxCif_State IfxCif_getIspState(void)
Function to query the current state of the ISP.
Definition: IfxCif.h:2537
IfxCif_EpWriteFormat
IfxCif_EpWriteFormat
Enumerator for write formats of extra paths.
Definition: IfxCif.h:593
IfxCif_DpCounters_FrameNumberCounter
Frame number counter.
Definition: IfxCif.h:629
IfxCif_setMiByteSwapEnableState
IFX_INLINE void IfxCif_setMiByteSwapEnableState(IfxCif_State enableState)
Function to enable or disable the change of byte order of the 32 bit output word. ...
Definition: IfxCif.h:2958
IfxCif_DpSourcePath_MainPath
Main data path.
Definition: IfxCif.h:636
IfxCif_MiInterruptSources_WrapMainPictureCb
Main picture Cb address wrap interrupt.
Definition: IfxCif.h:324
IfxCif_getNumberOfAcquisitionFrames
IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames(void)
Function to query the number of acquisition frames.
Definition: IfxCif.h:2690
IfxCif_HuffmanTables_Table0
Huffman Table 0.
Definition: IfxCif.h:391
IfxCif_MiStatusClearSources_MainPictureCrFifoFull
Cr FIFO full flag in main path.
Definition: IfxCif.h:359
IfxCif_getBaseAddressInitializationEnableState
IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState(void)
Function to query the enabled state of the update signal of the base address and buffer size shadow r...
Definition: IfxCif.h:2374
IfxCif_IspInformFieldInformation
IfxCif_IspInformFieldInformation
Enumerator for current field information.
Definition: IfxCif.h:220
IfxCif_getJpeState
IFX_INLINE IfxCif_JpeState IfxCif_getJpeState(void)
Function to get the current JPEG codec state.
Definition: IfxCif.h:2585
IfxCif_setEpCroppingPictureSizes
IFX_EXTERN void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path.
Definition: IfxCif.c:2920
IfxCif_MiMainPicturePathComponents
IfxCif_MiMainPicturePathComponents
Enumerator for main picture path components of the memory interface.
Definition: IfxCif.h:333
IfxCif_getJpeDebugSignalState
IFX_EXTERN IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source)
Function to query the state of one JPE debug signal source.
Definition: IfxCif.c:1531
IfxCif_IspCcirSequence_YCrYCb
YCrYCb.
Definition: IfxCif.h:180
IfxCif_IspInformFieldInformation_Even
Even field.
Definition: IfxCif.h:223
IfxCif_setNumberOfAcquisitionFrames
IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames)
Function to set the number of acquisition frames.
Definition: IfxCif.h:2990
IfxCif_DataPathSelectorForMainPath
IfxCif_DataPathSelectorForMainPath
Enumerator for data path of main path.
Definition: IfxCif.h:83
IfxCif_getEpInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:884
IfxCif_DpControlSources_UserDefinedSymbol4
ser defined symbol 4
Definition: IfxCif.h:613
IfxCif_getIspVSyncPolarity
IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity(void)
Function to query the currently set polarity of the VSYNC signal.
Definition: IfxCif.h:2543
IfxCif_getIspPictureSize
IFX_EXTERN uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier)
Function to query the currently set ISP picture size of one tier.
Definition: IfxCif.c:1371
IfxCif_getMiMainPictureComponentInitialOffsetCounter
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component)
Function to query the initial offset counter inside the ring buffer of one main picture path compoent...
Definition: IfxCif.c:2139
IfxCif_JpeInterruptSources_R2BImageSizeError
R2B image size error.
Definition: IfxCif.h:435
IfxCif_HuffmanTableComponents_Component2
Component 2.
Definition: IfxCif.h:384
IfxCif_JpeState_Free
Codec is free (not busy)
Definition: IfxCif.h:473
IfxCif_setIspAcquisitionSizes
IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize)
Function to set the ISP acquisition sizes.
Definition: IfxCif.h:2771
IfxCif_JpeInterruptSources_VlcSymbolError
VLC symbol error.
Definition: IfxCif.h:437
IfxCif_setDpControlEnableState
IFX_EXTERN void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState)
Function to enable or disable transmission of one debug path control source.
Definition: IfxCif.c:2702
IfxCif_EpErrorClearSources
IfxCif_EpErrorClearSources
Enumerator for error sources that can be cleared in the extra paths registers.
Definition: IfxCif.h:545
IfxCif_MiInterruptSources_BusError
Bus write or read error interrupt (from handshake target interfaces)
Definition: IfxCif.h:322
IfxCif_setSecurityWatchdogEnableState
IFX_INLINE void IfxCif_setSecurityWatchdogEnableState(IfxCif_State enableState)
Function to enable or disable the watchdog unit.
Definition: IfxCif.h:3002
IfxCif_getIspisEnableState
IFX_INLINE IfxCif_State IfxCif_getIspisEnableState(void)
Function to query the enabled state of image stabilization.
Definition: IfxCif.h:2549
IfxCif_getInternalClockMode
IFX_EXTERN IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule)
Function to query the clock state of a submodule.
Definition: IfxCif.c:1129
IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros
10-bit external Interface if enabled append 6 zeroes as LSBs
Definition: IfxCif.h:233
IfxCif_epSkipPicture
IFX_EXTERN void IfxCif_epSkipPicture(IfxCif_ExtraPath z)
Function to skip one picture of one extra path.
Definition: IfxCif.c:316
IfxCif_miSkipPicture
IFX_INLINE void IfxCif_miSkipPicture(void)
Function to skip the current or next starting main data path picture.
Definition: IfxCif.h:2726
IfxCif_ImageTiers_Horizontal
Horizontal tier.
Definition: IfxCif.h:113
IfxCif_DpCounters_LineNumberCounter
Line number counter.
Definition: IfxCif.h:628
IfxCif_SecurityWatchdogCounters_Predivider
Predivider counter.
Definition: IfxCif.h:516
IfxCif_getMiMainPictureComponentSize
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component)
Function to query the current size of the ring buffer of one main picture path component.
Definition: IfxCif.c:2218
IfxCif_Submodules_JpegEncoder
JPEG Encoder submodule.
Definition: IfxCif.h:158
IfxCif_getModuleType
IFX_INLINE uint8 IfxCif_getModuleType(void)
Function to query the module type.
Definition: IfxCif.h:2684
IfxCif_setYCSplitterChannelMode
IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode)
Function to set the Y/C splitter channel mode.
Definition: IfxCif.h:3008
IfxCif_setHuffmanAcTableLength
IFX_EXTERN void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for AC values.
Definition: IfxCif.c:3087
IfxCif_HuffmanTableComponents
IfxCif_HuffmanTableComponents
Enumerator for the Huffman Table components.
Definition: IfxCif.h:380
IfxCif_MiInterruptSources_WrapMainPictureY
Main picture Y address wrap interrupt.
Definition: IfxCif.h:325
IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros
12-bit external Interface if enabled append 4 zeroes as LSBs
Definition: IfxCif.h:235
IfxCif_setMiMainPictureComponentBaseInitAddress
IFX_EXTERN void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component...
Definition: IfxCif.c:3727
IfxCif_JpeTableId_QTable3
Q-Table 3.
Definition: IfxCif.h:484
IfxCif_getIspisPictureSize
IFX_EXTERN uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier)
Function to query the current picture size for one tier.
Definition: IfxCif.c:1497
IfxCif_getCurrentIspFrameCount
IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount(void)
Function to query the current ISP frame count.
Definition: IfxCif.h:2411
IfxCif_setDpUserDefinedSymbol
IFX_EXTERN void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value)
Function to set one user defined debug symbol.
Definition: IfxCif.c:2769
IfxCif_SecurityWatchdogCounters_Horizontal
Horizontal counter.
Definition: IfxCif.h:518
IfxCif_JpegPictureEncodingFormat_422
4:2:2 format
Definition: IfxCif.h:504
IfxCif_getHuffmanDcTableLength
IFX_EXTERN uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table)
Function to query the current Huffman Table length for DC values.
Definition: IfxCif.c:1081
IfxCif_IspSamplingEdge
IfxCif_IspSamplingEdge
Enumerator for ISP sampling edge.
Definition: IfxCif.h:268
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240
CbCr range 16..240 according to ITU-R BT.601 standard.
Definition: IfxCif.h:188
IfxCif_getCifModuleId
IFX_INLINE uint16 IfxCif_getCifModuleId(void)
Function to query the CIF module ID.
Definition: IfxCif.h:2380
IfxCif_clearEpInterrupt
IFX_EXTERN void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:64
IfxCif_getEpInputEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z)
Function to query the current input enable state of one extra path.
Definition: IfxCif.c:867
IfxCif_getIspisCurrentPictureSize
IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier)
Function to query the picture size of the current picture for one tier.
Definition: IfxCif.c:1434
IfxCif_MiStatusClearSources_ExtraPath1FifoFull
FIFO full flag in extra path 1.
Definition: IfxCif.h:357
IfxCif_Submodules_SecurityWatchdog
Security Watchdog submodule.
Definition: IfxCif.h:156
IfxCif_getIspInputSelectionAppendState
IFX_EXTERN IfxCif_State IfxCif_getIspInputSelectionAppendState(void)
Function to query the append state.
Definition: IfxCif.c:1268
IfxCif_EpWriteFormat_RawAndData
Raw and data mode (8 bit)
Definition: IfxCif.h:595
IfxCif_IspSamplingEdge_NegativeEdge
negative edge sampling
Definition: IfxCif.h:270
IfxCif_getIspInputInterface
IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface(void)
Function to query the ISP input interface bit width.
Definition: IfxCif.h:2495
IfxCif_getKernelResetRequestState
IFX_EXTERN IfxCif_State IfxCif_getKernelResetRequestState(void)
Function to query the state of the kernel reset request bit.
Definition: IfxCif.c:1668
IfxCif_JpeQTableSelector_Table0
Q-Table 0.
Definition: IfxCif.h:446
IfxCif_IspCcirSequence_YCbYCr
YCbYCr.
Definition: IfxCif.h:179
IfxCif_Submodules_Debug
Debug submodule.
Definition: IfxCif.h:153
IfxCif_MiMainPictureWriteFormat
IfxCif_MiMainPictureWriteFormat
Enumerator for write formats of data written into memory.
Definition: IfxCif.h:342
IfxCif_MiStatusClearSources_BusWriteError
Bus write error flag.
Definition: IfxCif.h:358
IfxCif_getMiMainPictureComponentOffsetCounterStart
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component)
Function to query the offset counter which points to the start address of the previously processed pi...
Definition: IfxCif.c:2191
IfxCif_setIspFieldSelection
IFX_INLINE void IfxCif_setIspFieldSelection(IfxCif_IspFieldSelection selection)
Function to select fields to sample.
Definition: IfxCif.h:2802
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb
14-bit external Interface if enabled append 2 MSBs as LSBs
Definition: IfxCif.h:236
IfxCif_setMiInterruptRequestBit
IFX_EXTERN void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3684
IfxCif_setSecurityWatchdogInterruptRequestBit
IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3838
IfxCif_YCSplitterChannelMode_MainPathAndRawMode
Y/C splitter is enabled for main path and RAW mode.
Definition: IfxCif.h:168
IfxCif_getIspOutputWindowOffset
IFX_EXTERN uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier)
Function to query the currently set ISP output window offset for one tier.
Definition: IfxCif.c:1350
IfxCif_EpInterrupts_Count
Total number of interrupt sources for one extra path.
Definition: IfxCif.h:588
IfxCif_setJpeInterruptRequestBit
IFX_EXTERN void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3453
IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage
wait for encoded image data to fill output buffer
Definition: IfxCif.h:418
IfxCif_ImageTiers_Vertical
Vertical tier.
Definition: IfxCif.h:114
IfxCif_getJpeMode
IFX_INLINE IfxCif_State IfxCif_getJpeMode(void)
Function to query the JPE encode mode.
Definition: IfxCif.h:2573
IfxCif_MiBurstLength_8BeatBursts
8-beat bursts
Definition: IfxCif.h:306
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCif_setIspFieldInvertState
IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState)
Function to enable or disable inversion of the field ID.
Definition: IfxCif.h:2796
IfxCif_setEpInterruptEnableState
IFX_EXTERN void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3011
IfxCif_JpeDebugSignalSources_VlcEncodeBusy
VLC Encode Busy (vlc encode processing active)
Definition: IfxCif.h:402
IfxCif_IspInterruptSources_LossOfData
Loss of Data.
Definition: IfxCif.h:250
IfxCif_MiBurstLength_4BeatBursts
4-beat bursts
Definition: IfxCif.h:305
IfxCif_JpeDebugSignalState_Inactive
Debug signal is inactive.
Definition: IfxCif.h:410
IfxCif_setJpeRestartInterval
IFX_INLINE void IfxCif_setJpeRestartInterval(uint16 interval)
Function to set the restart interval.
Definition: IfxCif.h:2902
IfxCif_getMiMainPictureComponentInitSize
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component)
Function to query the initial size of the ring buffer of one main picture path component.
Definition: IfxCif.c:2112
IfxCif_getEpCroppingEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z)
Function to query the image cropping enabled state of one extra path.
Definition: IfxCif.c:599
IfxCif_JpeDebugSignalSources_R2BMemoryFull
R2B Memory Full (line memory status of r2b)
Definition: IfxCif.h:401
IfxCif_getIspisRecenterEnableState
IFX_EXTERN IfxCif_State IfxCif_getIspisRecenterEnableState(void)
Function to query the enabled state of image stabilization recenter feature.
Definition: IfxCif.c:1518
IfxCif_setLinearDownscalerScalingFactors
IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler.
Definition: IfxCif.c:3583
IfxCif_IspInterruptSources_PictureSizeViolationOccurred
Picture Size Violation Occurred.
Definition: IfxCif.h:249
IfxCif_getMiOffsetCounterInitializationEnableState
IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState(void)
Function to query the enabled state of the update signal of the offset counter shadow registers...
Definition: IfxCif.h:2659
IfxCif_MiMainPicturePathComponents_Cr
Cr-component.
Definition: IfxCif.h:337
IfxCif_ExtraPath_3
Definition: IfxCif.h:104
IfxCif_EpInterrupts
IfxCif_EpInterrupts
Enumerator for interrupt sources of the extra paths module.
Definition: IfxCif.h:582
IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes
immediately transmit last header bytes
Definition: IfxCif.h:419
IfxCif_JpeScalingValueSources_Y
scaling Y input from [16..235] to [0..255]
Definition: IfxCif.h:465
IfxCif_JpeHeaderMode
IfxCif_JpeHeaderMode
Enumerator for the JPE header mode.
Definition: IfxCif.h:424
IfxCif_getIspisRecenterValue
IFX_INLINE uint8 IfxCif_getIspisRecenterValue(void)
Function to query the current image stabilization recenter value.
Definition: IfxCif.h:2555
IfxCif_getLinearDownscalerEnableState
IFX_EXTERN IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier)
Function to query the current state of the linear downscaler for one tier.
Definition: IfxCif.c:1681
IfxCif_setEpCroppingEnableState
IFX_EXTERN void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path.
Definition: IfxCif.c:2821
IfxCif_LinearDownscalerScalingMode_SingleSkip
Scaling mode single skip.
Definition: IfxCif.h:290
IfxCif_setDpEnableState
IFX_INLINE void IfxCif_setDpEnableState(IfxCif_State enableState)
Function to enable or disable the debug path.
Definition: IfxCif.h:2745
IfxCif_JpeScalingValueSources
IfxCif_JpeScalingValueSources
Enumerator for the input scaling values of the JPEG encoder.
Definition: IfxCif.h:463
IfxCif_getEpInitialOffsetCounter
IFX_EXTERN uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z)
Function to query the initial offset counter of one extra path.
Definition: IfxCif.c:848
IfxCif_MiInterruptSources
IfxCif_MiInterruptSources
Enumerator for interrupt sources of the memory interface submodule.
Definition: IfxCif.h:320
IfxCif_resetModule
IFX_EXTERN void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb)
resets CIF kernel
Definition: IfxCif.c:2662
IfxCif_MiStatusClearSources_MainPictureYFifoFull
Y FIFO full flag in main path.
Definition: IfxCif.h:361
IfxCif_getMiLuminanceBurstLength
IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength(void)
Function to query the currently set burst length for Y, JPEG, or RAW data.
Definition: IfxCif.h:2633
IfxCif_InputInterface
IfxCif_InputInterface
Enumerator for input interfaces supported by the CIF interface.
Definition: IfxCif.h:119
IfxCif_getEpSize
IFX_EXTERN uint32 IfxCif_getEpSize(IfxCif_ExtraPath z)
Function to query the current ring buffer size of one extra path.
Definition: IfxCif.c:997
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255
full Y range 0..255
Definition: IfxCif.h:197
IfxCif_setIspHSyncPolarity
IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the HSYNC signal.
Definition: IfxCif.h:2808
IfxCif_IspInformFieldInformation_Odd
Odd field.
Definition: IfxCif.h:222
IfxCif_ImageTiers
IfxCif_ImageTiers
Enumerator for tiers.
Definition: IfxCif.h:111
IfxCif_getMaskedEpInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to get the masked state of an interrupt.
Definition: IfxCif.c:1771
IfxCif_getEpInterruptOffset
IFX_EXTERN uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z)
Function to query the current interrupt offset of one extra path.
Definition: IfxCif.c:906
IfxCif_getEpWriteFormat
IFX_EXTERN IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z)
Function to query the write format of one extra path.
Definition: IfxCif.c:1016
IfxCif_clearSecurityWatchdogInterrupt
IFX_EXTERN void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:250
IfxCpu_Intrinsics.h
IfxCif_JpeHeaderMode_NoAppnHeader
no APPn header
Definition: IfxCif.h:426
IfxCif_getMiByteSwapEnableState
IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState(void)
Function to query the current state of the change of byte order of the 32 bit output word...
Definition: IfxCif.h:2621
IfxCif_SecurityWatchdogInterruptSources
IfxCif_SecurityWatchdogInterruptSources
Enumerator for interrupt sources of the security watchdog submodule.
Definition: IfxCif.h:523
IfxCif_ErrorState
IfxCif_ErrorState
Enumerator for the state of an error.
Definition: IfxCif.h:92
IfxCif_setMiMainPictureComponentInitialOffsetCounter
IFX_EXTERN void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
Function to set the initial offset counter inside the ring buffer for one main picture path component...
Definition: IfxCif.c:3775
IfxCif_setIspMode
IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode)
Function to set the ISP mode.
Definition: IfxCif.h:2826
IfxCif_JpeQTableSelector_Table3
Q-Table 3.
Definition: IfxCif.h:449
IfxCif_getJpegCodecImageSize
IFX_EXTERN uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier)
Function to query the currently set JPEG codec image size of one tier.
Definition: IfxCif.c:1647
IfxCif_getIspColorSpaceMatrixLuminanceClippingRange
IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange(void)
Function to query the clipping range of the luminance of the ISP output.
Definition: IfxCif.h:2465
IfxCif_getJpegPictureEncodingFormat
IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat(void)
Function to query the current picture encoding format.
Definition: IfxCif.h:2603
IfxCif_setLinearDownscalerScalingFactor
IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor)
Function to set the scaling factor of the linear downscaler of one tier.
Definition: IfxCif.c:3562
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit
planar (YCbCr mode) / RAW & data mode (8 bit)
Definition: IfxCif.h:344
IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout
Horizontal Start End Interrupt.
Definition: IfxCif.h:528
IfxCif_DpSourcePath_ExtraPath5
Extra path 5.
Definition: IfxCif.h:640
IfxCif_JpeHeaderGenerationMode
IfxCif_JpeHeaderGenerationMode
Enumerator for the header generation debug control.
Definition: IfxCif.h:416
IfxCif_EpErrorSources_ExtraPath3SizeError
Size error in image cropping unit of extra path 3.
Definition: IfxCif.h:565
IfxCif_MiInterruptSources_FillMainPictureY
Main picture Y address wrap interrupt.
Definition: IfxCif.h:326
IfxCif_getJpeTableId
IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId(void)
Function to query the current JPE Table ID.
Definition: IfxCif.h:2591
IfxCif_setIspInputFormatterState
IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState)
Function to enable or disable the ISP input formatter.
Definition: IfxCif.h:2814
IfxCif_PortInputSelection_PinMapping0
pin mapping 0
Definition: IfxCif.h:136
IfxCif_MiStatusInformationSources_BusWriteError
An Bus error occurred while writing to the Bus (main/self path) since last clear. ...
Definition: IfxCif.h:368
IfxCif_EpWriteFormat_RawGreater
RAW & data mode (greater 8 up to 16 bit)
Definition: IfxCif.h:597
IfxCif_DpControlSources_UserDefinedSymbol8
User defined symbol 8.
Definition: IfxCif.h:609
IfxCif_setHuffmanDcTableLength
IFX_EXTERN void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length)
Function to set the Huffman Table length for DC values.
Definition: IfxCif.c:3121
IfxCif_EpFeatures_ByteSwap
Byte swap feature.
Definition: IfxCif.h:576
IfxCif_ExtraPath_5
Definition: IfxCif.h:106
IfxCif_setIspInputInterface
IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input)
Function to set the ISP input interface bit width.
Definition: IfxCif.h:2820
IfxCif_getIspFieldSelection
IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection(void)
Function to query the currently set field sample mode.
Definition: IfxCif.h:2477
IfxCif_MiStatusClearSources
IfxCif_MiStatusClearSources
Enumerator for status clear sources of the memory interface module.
Definition: IfxCif.h:351
IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset
IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset(void)
Function to query the filling level that triggers an interrupt of main picture path Y component...
Definition: IfxCif.h:2645
IfxCif_EpErrorSources_ExtraPath5SizeError
Size error in image cropping unit of extra path 5.
Definition: IfxCif.h:563
IfxCif_setMiLuminanceBurstLength
IFX_EXTERN void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data.
Definition: IfxCif.c:3721
IfxCif_IspInterruptSources_SecurityWatchdogTimeout
A watchdog timeout was triggered at the ISP input.
Definition: IfxCif.h:245
IfxCif_EpErrorClearSources_ExtraPath5SizeError
Size error in image cropping unit of extra path 5.
Definition: IfxCif.h:547
IfxCif_getKernelResetStatus
IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus(void)
Function to query the kernel reset status.
Definition: IfxCif.h:2609
IfxCif_MiStatusInformationSources_MainPictureYFifoFull
FIFO full flag of Y FIFO in main path asserted since last clear.
Definition: IfxCif.h:371
IfxCif_setMiMainPictureWriteFormat
IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format)
Function to set the write format of the main picture path of the memory interface.
Definition: IfxCif.h:2970
IfxCif_MiMainPicturePathComponents_Cb
Cb-component.
Definition: IfxCif.h:336
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit
interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit) ...
Definition: IfxCif.h:346
IfxCif_getCifModulePortInputSelection
IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection(void)
Function to query the port input selection.
Definition: IfxCif.h:2386
IfxScuWdt.h
SCU basic functionality.
IfxCif_getIspFieldInvertState
IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState(void)
Function to query the state of field ID inversion.
Definition: IfxCif.h:2471
IfxCif_SecurityWatchdogTimeoutCounters_StartEnd
Timeout counter for Start End phase.
Definition: IfxCif.h:536
IfxCif_JpeQTableSelectorComponents_Y
Y-component.
Definition: IfxCif.h:456
IfxCif_setJpeQTableSelector
IFX_EXTERN void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component.
Definition: IfxCif.c:3486
IfxCif_getDpEnableState
IFX_INLINE IfxCif_State IfxCif_getDpEnableState(void)
Function to query the debug path enabled state.
Definition: IfxCif.h:2435
IfxCif_EpInterrupts_FillLevel
Fill level interrupt.
Definition: IfxCif.h:585
IfxCif_JpegPictureEncodingFormat
IfxCif_JpegPictureEncodingFormat
Enumerator for the picture encoding format.
Definition: IfxCif.h:502
IfxCif_setIspPictureSizes
IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize)
Function to set the ISP picture sizes.
Definition: IfxCif.h:2845
IfxCif_setSecurityWatchdogTimeout
IFX_EXTERN void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the tim...
Definition: IfxCif.c:3863
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb
12-bit external Interface if enabled append 4 MSBs as LSBs
Definition: IfxCif.h:234
IfxCif_getJpeScalingEnableState
IFX_EXTERN IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source)
Function to query the current enabled state of the scaling of an input value source.
Definition: IfxCif.c:1626
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb
8-bit external Interface if enabled append 8 MSBs as LSBs
Definition: IfxCif.h:230
IfxCif_setSecurityWatchdogCounterPredivider
IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider(uint16 predivider)
Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are in...
Definition: IfxCif.h:2996
IfxCif_setJpegPictureEncodingFormat
IFX_INLINE void IfxCif_setJpegPictureEncodingFormat(IfxCif_JpegPictureEncodingFormat format)
Function to set the picture encoding format.
Definition: IfxCif.h:2939
IfxCif_Submodules_AllModules
All submodules.
Definition: IfxCif.h:152
IfxCif_DpControlSources_UserDefinedSymbol2
User defined symbol 2.
Definition: IfxCif.h:615
IfxCif_getMiFeatureEnableState
IFX_EXTERN IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of a memory interface data path.
Definition: IfxCif.c:2021
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235
Y range 16..235 according to ITU-R BT.601 standard.
Definition: IfxCif.h:196
IfxCif_State
IfxCif_State
Enumerator for states.
Definition: IfxCif.h:142
IfxCif_getIspisCurrentPictureOffset
IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier)
Function to query the offset of the current picture for one tier.
Definition: IfxCif.c:1413
IfxCif_EpErrorSources_ExtraPath2SizeError
Size error in image cropping unit of extra path 2.
Definition: IfxCif.h:566
IfxCif_IspSyncPolarity_LowActive
low active sync polarity
Definition: IfxCif.h:279
IfxCif_getLinearDownscalerScalingFactor
IFX_EXTERN uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier)
Function to query the currently set scaling factor of the linear downscaler of one tier...
Definition: IfxCif.c:1702
IfxCif_IspErrorSources_SizeErrorInInformSubmodule
ize error is generated in inform submodule
Definition: IfxCif.h:206
IfxCif_setIspisPictureSize
IFX_EXTERN void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the picture size for one tier.
Definition: IfxCif.c:3403
IfxCif_setIspisEnableState
IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState)
Function to enable or disable image stabilization.
Definition: IfxCif.h:2864
IfxCif_MiStatusClearSources_MainPictureCbFifoFull
Cb FIFO full flag in main path.
Definition: IfxCif.h:360
IfxCif_setJpegJfifStreamEncoderContinuousMode
IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode)
Function to set the stream encoder continuous mode.
Definition: IfxCif.h:2933
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder
Main path is routed to the JPEG encoder.
Definition: IfxCif.h:87
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCif_SecurityWatchdogTimeoutCounters_EndStart
Timeout counter for End Start phase.
Definition: IfxCif.h:535
IfxCif_IspCcirSequence_CbYCrY
CbYCrY.
Definition: IfxCif.h:181
IfxCif_getMiMainPictureWriteFormat
IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat(void)
Function to query the currently set write format of the main picture path of the memory interface...
Definition: IfxCif.h:2639
IfxCif_getMiMainPictureComponentBaseAddress
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component)
Function to query the current base address of the ring buffer of one main picture path component...
Definition: IfxCif.c:2087
IfxCif_getMainPictureComponentBaseInitAddress
IFX_EXTERN uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component)
Function to query the initial base address of the ring buffer of one main picture path component...
Definition: IfxCif.c:1744
IfxCif_getIspColorSpaceMatrixCrominanceClippingRange
IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange(void)
Function to query the clipping range of the crominance of the ISP output.
Definition: IfxCif.h:2459
IfxCif_getEpOffsetCounter
IFX_EXTERN uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z)
Function to query the current offset counter of one extra path.
Definition: IfxCif.c:925
IfxCif_getMaskedIspInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1795
IfxCif_JpeQTableSelector_Table2
Q-Table 2.
Definition: IfxCif.h:448
IfxCif_DpSourcePath_ExtraPath2
Extra path 2.
Definition: IfxCif.h:638
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCif_EpFeatures_InitBaseAddress
Init buffer base address.
Definition: IfxCif.h:575
IfxCif_getEpCroppingCurrentPictureSize
IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture size of one tier of one extra path...
Definition: IfxCif.c:571
IfxCif_setLinearDownscalerScalingModes
IFX_EXTERN void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3614
IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros
14-bit external Interface if enabled append 2 zeroes as LSBs
Definition: IfxCif.h:237
IfxCif_setHuffmanDcTableSelector
IFX_EXTERN void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for DC values.
Definition: IfxCif.c:3138
IfxCif_getIspInputFormatterState
IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState(void)
Function to query the current state of the ISP input formatter.
Definition: IfxCif.h:2489
IfxCif_getCurrentIspPictureOffset
IFX_EXTERN uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier)
Function to query the current ISP picture offset for one tier.
Definition: IfxCif.c:332
IfxCif_DpControlSources
IfxCif_DpControlSources
Enumerator for debug path control sources.
Definition: IfxCif.h:607
IfxCif_IspFieldSelection_OnlyOddFields
sample only odd fields
Definition: IfxCif.h:215
IfxCif_getJpeQTableSelector
IFX_EXTERN IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component)
Function to query the currently selected Q-Table for one component.
Definition: IfxCif.c:1601
IfxCif_DpControlSources_LineNumberCounter
Line number counter.
Definition: IfxCif.h:618
IfxCif_State_Enabled
Enabled state.
Definition: IfxCif.h:145
IfxCif_Submodules_LinearDownscaler
Linear Downscaler submodule.
Definition: IfxCif.h:155
IfxCif_JpeScalingValueSources_CbCr
scaling Cb/Cr input from [16..240] to [0..255]
Definition: IfxCif.h:466
IfxCif_InterruptTriggeredState_NotTriggered
Interrupt was not triggered.
Definition: IfxCif.h:128
IfxCif_programJpeTable
IFX_EXTERN void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
Definition: IfxCif.c:2614
IfxCif_getMiStatusInformation
IFX_EXTERN IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source)
Function to query the status information of one status information source of the memory interface mod...
Definition: IfxCif.c:2243
IfxCif_getDpSourcePath
IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath(void)
Function to query the selected debug path source path.
Definition: IfxCif.h:2441
IfxCif_getIspSamplingEdge
IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge(void)
Function to query the currently set ISP sampling edge.
Definition: IfxCif.h:2531
IfxCif_setIspPictureSize
IFX_EXTERN void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize)
Function to set the ISP picture size of one tier.
Definition: IfxCif.c:3335
IfxCif_getLinearDownscalerScalingMode
IFX_EXTERN IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier)
Function to query the currently set scaling mode of one tier.
Definition: IfxCif.c:1723
IfxCif_LinearDownscalerScalingMode
IfxCif_LinearDownscalerScalingMode
Enumerator for scaling mode of linear downscaler.
Definition: IfxCif.h:288
IfxCif_getSecurityWatchdogCounterPredivider
IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider(void)
Function to query the currently set watchdog predivider.
Definition: IfxCif.h:2696
IfxCif_EpInterrupts_WrapAround
Address wrap interrupt.
Definition: IfxCif.h:586
IfxCif_MiDataPaths_RawData
RAW data path.
Definition: IfxCif.h:313
IfxCif_setIspInputSelectionAppendState
IFX_EXTERN void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal.
Definition: IfxCif.c:3230
IfxCif_setMiFeatureEnableState
IFX_EXTERN void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path.
Definition: IfxCif.c:3626
IfxCif_DpControlSources_UserDefinedSymbol5
User defined symbol 5.
Definition: IfxCif.h:612
IfxCif_setMiMainPictureComponentInitSize
IFX_EXTERN void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component.
Definition: IfxCif.c:3752
IfxCif_EpErrorSources_ExtraPath3FifoFull
FIFO of extra path 3 is full.
Definition: IfxCif.h:560
IfxCif_getRawJpeInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2359
IfxCif_getCurrentIspInputFormatterState
IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState(void)
Function to query the current state of the ISP formatter.
Definition: IfxCif.h:2423
IfxCif_setEpCroppingCameraDisplacement
IFX_EXTERN void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the image cropping camera displacement of one tier of one extra path.
Definition: IfxCif.c:2797
IfxCif_MiBurstLength
IfxCif_MiBurstLength
Enumerator for burst length affecting the write port of the memory interface.
Definition: IfxCif.h:303
IfxCif_SecurityWatchdogCounters_Vertical
Vertical counter.
Definition: IfxCif.h:517
IfxCif_IspInputInterface
IfxCif_IspInputInterface
Enumerator for the supported input interfaces of the ISP.
Definition: IfxCif.h:228
IfxCif_setEpInitialOffsetCounter
IFX_EXTERN void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter)
Function to set the initial offset counter of one extra path.
Definition: IfxCif.c:2996
IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout
Vertical End Start Interrupt.
Definition: IfxCif.h:525
IfxCif_JpeInterruptSources_DcTableError
DC Table error.
Definition: IfxCif.h:436
IfxCif_initJpegEncoder
IFX_INLINE void IfxCif_initJpegEncoder(void)
Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpeg...
Definition: IfxCif.h:2714
IfxCif_getIspOutputState
IFX_INLINE IfxCif_State IfxCif_getIspOutputState(void)
Function to query the ISP output state.
Definition: IfxCif.h:2525
IfxCif_JpeTableId_QTable2
Q-Table 2.
Definition: IfxCif.h:483
IfxCif_setJpeInterruptEnableState
IFX_EXTERN void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3420
IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically
encoder starts automatically to encode the next frame
Definition: IfxCif.h:496
IfxCif_setEpFeatureEnableState
IFX_EXTERN void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path.
Definition: IfxCif.c:2934
IfxCif_setDpSourcePath
IFX_INLINE void IfxCif_setDpSourcePath(IfxCif_DpSourcePath sourcePath)
Function to select one debug path source path.
Definition: IfxCif.h:2751
IfxCif_JpeDebugSignalSources_QiqTableAccess
QiqTableAccess.
Definition: IfxCif.h:403
IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit
semi-planar for YCbCr 4:2:x / RAW 8 bit
Definition: IfxCif.h:345
IfxCif_setIspOutputWindowOffset
IFX_EXTERN void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP output window offset for one tier.
Definition: IfxCif.c:3318
IfxCif_DpSourcePath
IfxCif_DpSourcePath
Enumerator for debug path source paths.
Definition: IfxCif.h:634
IfxCif_setHuffmanAcTableSelector
IFX_EXTERN void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to set the Huffman Table selector for AC Values.
Definition: IfxCif.c:3104
IfxCif_setLinearDownscalerEnableState
IFX_EXTERN void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState)
Function to enable or disable the linear downscaler for one tier.
Definition: IfxCif.c:3541
IfxCif_generateIspImmediateConfigUpdateSignal
IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void)
Function to generate an immediate ISP configuration update signal.
Definition: IfxCif.h:2362
IfxCif_setMiInterruptEnableState
IFX_EXTERN void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3647
IfxCif_EpWriteFormat_Raw8Bit
Raw 8 bit mode.
Definition: IfxCif.h:596
IfxCif_MiDataPaths_MainPictureData
main picture data path
Definition: IfxCif.h:315
IfxCif_setEpCroppingOffsetsOutputWindow
IFX_EXTERN void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path.
Definition: IfxCif.c:2882
IfxCif_setLinearDownscalerScalingMode
IFX_EXTERN void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3593
IfxCif_EpFeatures_PictureDataPath
enables the extra path picture data path
Definition: IfxCif.h:577
IfxCif_MiStatusClearSources_ExtraPath3FifoFull
FIFO full flag in extra path 3.
Definition: IfxCif.h:355
IfxCif_setJpeTableDataMsb
IFX_INLINE void IfxCif_setJpeTableDataMsb(uint8 data)
Function to set the JPE Table MSB.
Definition: IfxCif.h:2914
IfxCif_setKernelResetRequestState
IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state)
Function to request a kernel reset or reset the request bit.
Definition: IfxCif.h:2945
IfxCif_IspErrorSources
IfxCif_IspErrorSources
Enumerator for error sources of the ISP module.
Definition: IfxCif.h:202
IfxCif_setIspisMaximumDisplacement
IFX_EXTERN void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement for one tier.
Definition: IfxCif.c:3369
IfxCif_setDataPathSelectorForMainPath
IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector)
Function to set the data path for main path.
Definition: IfxCif.h:2739
IfxCif_getClockControlLogicState
IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState(void)
Function to query the clock distribution enabled state.
Definition: IfxCif.h:2404
IfxCif_getIspisCameraDisplacement
IFX_EXTERN uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier)
Function to query the current camera displacement for one tier.
Definition: IfxCif.c:1392
IfxCif_ExtraPath
IfxCif_ExtraPath
Enumerator for the extra paths.
Definition: IfxCif.h:100
IfxCif_EpErrorClearSources_ExtraPath3SizeError
Size error in image cropping unit of extra path 3.
Definition: IfxCif.h:549
IfxCif_getModuleState
IFX_INLINE IfxCif_State IfxCif_getModuleState(void)
Function to query the state of the CIF module.
Definition: IfxCif.h:2677
IfxCif_PortInputSelection_PinMapping1
pin mapping 1
Definition: IfxCif.h:137
IfxCif_setEpRecenterValue
IFX_EXTERN void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value)
Function to set the recenter value of one extra path (0 to switch the recenter feature off...
Definition: IfxCif.c:3061
IfxCif_setJpeScalingEnableState
IFX_EXTERN void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
Function to enable or disable scaling of one input value source.
Definition: IfxCif.c:3507
IfxCif_setIspisRecenterValue
IFX_INLINE void IfxCif_setIspisRecenterValue(uint8 value)
Function to set the image stabilization recenter value.
Definition: IfxCif.h:2884
IfxCif_MiStatusInformationSources_MainPictureCrFifoFull
FIFO full flag of Cr FIFO in main path asserted since last clear.
Definition: IfxCif.h:369
IfxCif_clearIspInterrupt
IFX_EXTERN void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:98
IfxCif_JpegPictureEncodingFormat_400
4:0:0 format
Definition: IfxCif.h:505
IfxCif_ErrorState_Error
Error occurred.
Definition: IfxCif.h:95
IfxCif_IspMode_ItuRBT601
ITU-R BT.601 (YUV input with H and Vsync signals)
Definition: IfxCif.h:261
IfxCif_getEpCroppingMaximumDisplacement
IFX_EXTERN uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the maximum displacement of one tier of one extra path.
Definition: IfxCif.c:616
IfxCif_setEpInitialFillLevelInterruptOffset
IFX_EXTERN void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset)
Function to set the initial filling level interrupt offset of one extra path.
Definition: IfxCif.c:2981
IfxCif_IspFieldSelection_AllFields
sample all fields (don&#39;t care about fields)
Definition: IfxCif.h:213
IfxCif_getEpInitialFillLevelInterruptOffset
IFX_EXTERN uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z)
Function to query the initial filling level interrupt offset of one extra path.
Definition: IfxCif.c:829
IfxCif_JpeInterruptSources_HeaderGenerationComplete
Header generation complete.
Definition: IfxCif.h:438
IfxCif_HuffmanTables
IfxCif_HuffmanTables
Enumerator for the Huffman Tables.
Definition: IfxCif.h:389
IfxCif_setIspAcquisitionOffset
IFX_EXTERN void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the ISP acquisition offset of one tier.
Definition: IfxCif.c:3196
IfxCif_setIspCcirSequence
IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence)
Function to set the CCIR sequence.
Definition: IfxCif.h:2778
IfxCif_JpeTableId_VlcAcTable1
VLC AC Table 1.
Definition: IfxCif.h:488
IfxCif_getCifModuleType
IFX_INLINE uint8 IfxCif_getCifModuleType(void)
Function to query the CIF module ID.
Definition: IfxCif.h:2398
IfxCif_EpErrorClearSources_ExtraPath2SizeError
Size error in image cropping unit of extra path 2.
Definition: IfxCif.h:550
IfxCif_JpeTableId_VlcAcTable0
VLC AC Table 0.
Definition: IfxCif.h:486
IfxCif_JpeInterruptSources
IfxCif_JpeInterruptSources
Enumerator for interrupt sources of the JPEG encoder module.
Definition: IfxCif.h:432
IfxCif_clearEpError
IFX_EXTERN void IfxCif_clearEpError(IfxCif_EpErrorClearSources source)
Function to clear one extra path error.
Definition: IfxCif.c:35
IfxCif_setIspisCameraDisplacement
IFX_EXTERN void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement)
Function to set the camera displacement for one tier.
Definition: IfxCif.c:3352
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb
10-bit external Interface if enabled append 6 MSBs as LSBs
Definition: IfxCif.h:232
IfxCif_setMiBaseAddressInitializationEnableState
IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the base address and buffer size shadow registers to the ...
Definition: IfxCif.h:2952
IfxCif_setJpeHeaderMode
IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode)
Function to set the JPE header mode.
Definition: IfxCif.h:2896
IfxCif_clearIspError
IFX_EXTERN void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource)
Function to clear the error status bit for an error source.
Definition: IfxCif.c:77
IfxCif_getYCSplitterChannelMode
IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode(void)
Function to query the Y/C splitter channel mode.
Definition: IfxCif.h:2708
IfxCif_getIspisMaximumDisplacement
IFX_EXTERN uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier)
Function to query the current maximum displacement for one tier.
Definition: IfxCif.c:1455
IfxCif_epForceConfigurationUpdate
IFX_EXTERN void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path.
Definition: IfxCif.c:300
IfxCif_IspColorSpaceMatrixLuminanceClippingRange
IfxCif_IspColorSpaceMatrixLuminanceClippingRange
Enumerator for the clipping range of the luminance for the ISP output.
Definition: IfxCif.h:194
IfxCif_getJpegJfifStreamEncoderContinuousMode
IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode(void)
Function to query the current encoder continuous mode.
Definition: IfxCif.h:2597
IfxCif_DpControlSources_UserDefinedSymbol7
User defined symbol 7.
Definition: IfxCif.h:610
IfxCif_getRawSecurityWatchdogInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the raw state of an interrupt.
Definition: IfxCif.c:2437
IfxCif_clearJpeInterrupt
IFX_EXTERN void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:135
IfxCif_getIspInputPortSVSyncState
IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState(void)
Function to query the current level of the ISP input port s_vsync (for test purposes only) ...
Definition: IfxCif.h:2513
IfxCif_MiStatusInformationSources
IfxCif_MiStatusInformationSources
Enumerator for status information sources of the memory interface submodule.
Definition: IfxCif.h:366
IfxCif_Submodules_ImageSignalProcessing
Image Signal Processing submodule.
Definition: IfxCif.h:159
IfxCif_setEpCroppingOffsetOutputWindow
IFX_EXTERN void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
Function to set the image cropping offset of the output window of one tier of one extra path...
Definition: IfxCif.c:2858
IfxCif_setClockControlLogicState
IFX_INLINE void IfxCif_setClockControlLogicState(IfxCif_State clockControlLogicState)
Function to enable or disable the clock distribution to all CIF submodules.
Definition: IfxCif.h:2732
IfxCif_getDataPathSelectorForMainPath
IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath(void)
Function to query the data path for main path.
Definition: IfxCif.h:2429
IfxCif_EpErrorSources_ExtraPath4SizeError
Size error in image cropping unit of extra path 4.
Definition: IfxCif.h:564
IfxCif_Submodules
IfxCif_Submodules
Enumerator for submodules of the CIF interface.
Definition: IfxCif.h:150
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:87
IfxCif_getMiDataPathOutputEnableState
IFX_EXTERN IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath)
Function to query the enabled state of one main data path component at the memory interface output...
Definition: IfxCif.c:1996
IfxCif_SecurityWatchdogCounters
IfxCif_SecurityWatchdogCounters
Enumerator for watchdog counters.
Definition: IfxCif.h:514
IfxCif_LinearDownscalerScalingMode_Disabled
Disabled.
Definition: IfxCif.h:294
IfxCif_getDpControlEnableState
IFX_EXTERN IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source)
Function to query the transmission enabled state of one debug path control source.
Definition: IfxCif.c:374
IfxCif_IspSamplingEdge_PositiveEdge
positive edge sampling
Definition: IfxCif.h:271
IfxCif_getRawMiInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2396
IfxCif_JpeDebugSignalState_Active
Debug signal is active.
Definition: IfxCif.h:411
IfxCif_JpeTableId_QTable1
Q-Table 1.
Definition: IfxCif.h:482
IfxCif_InputInterface_ParallelInterface
Parallel interface (currently the only supported input interface)
Definition: IfxCif.h:121
IfxCif_JpeDebugSignalSources_VlcTableBusy
Debug VLC Table Busy (vlc access to hufftables)
Definition: IfxCif.h:400
IfxCif_MiDataPaths
IfxCif_MiDataPaths
Enumerator for data paths of the memory interface.
Definition: IfxCif.h:311
IfxCif_getJpeRestartInterval
IFX_INLINE uint16 IfxCif_getJpeRestartInterval(void)
Function to query the current restart interval.
Definition: IfxCif.h:2579
IfxCif_JpeQTableSelector
IfxCif_JpeQTableSelector
Enumerator for the Q-Table selector.
Definition: IfxCif.h:444
IfxCif_setMiChrominanceBurstLength
IFX_INLINE void IfxCif_setMiChrominanceBurstLength(IfxCif_MiBurstLength burstLength)
Function to set the burst length for Cb and Cr data.
Definition: IfxCif.h:2964
IfxCif_JpeDebugSignalState
IfxCif_JpeDebugSignalState
Enumerator for the debug signal state.
Definition: IfxCif.h:408
IfxCif_getMaskedJpeInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1864
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed
Main path is routed to the Memory Interface.
Definition: IfxCif.h:86
IfxCif_getHuffmanDcTableSelectorState
IFX_EXTERN IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for DC values...
Definition: IfxCif.c:1102
IfxCif_clearMiInterrupt
IFX_EXTERN void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource)
Function to clear an interrupt.
Definition: IfxCif.c:168
IfxCif_DpSourcePath_ExtraPath4
Extra path 4.
Definition: IfxCif.h:639
IfxCif_getEpOffsetCounterStart
IFX_EXTERN uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z)
Function to query the initial offset counter start value of one extra path.
Definition: IfxCif.c:944
IfxCif_DpCounters_PredividerCounter
Predivider counter.
Definition: IfxCif.h:626
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCif_getIspInputPortSDataState
IFX_INLINE uint16 IfxCif_getIspInputPortSDataState(void)
Function to query the current value of the ISP input port s_data (for test purposes only) ...
Definition: IfxCif.h:2501
IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout
Horizontal End Start Interrupt.
Definition: IfxCif.h:527
IfxCif_DpControlSources_UserDefinedSymbol3
User defined symbol 3.
Definition: IfxCif.h:614
IfxCif_DpSourcePath_ExtraPath1
Extra path 1.
Definition: IfxCif.h:637
IfxCif_EpFeatures_InitOffsetCounter
Init offest counter.
Definition: IfxCif.h:574
IfxCif_JpegJfifStreamEncoderContinuousMode
IfxCif_JpegJfifStreamEncoderContinuousMode
Enumerator for the JFIF stream encoder continuous mode.
Definition: IfxCif.h:493
IfxCif_EpErrorClearSources_ExtraPath1SizeError
Size error in image cropping unit of extra path 1.
Definition: IfxCif.h:551
IfxCif_getCurrentIspInformFieldInformation
IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation(void)
Function to query the current field information.
Definition: IfxCif.h:2417
IfxCif_generateMiImmediateConfigUpdateSignal
IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void)
Function to generate an immediate configuration update signal for the memory interface submodule...
Definition: IfxCif.h:2368
IfxCif_State_Disabled
Disabled state.
Definition: IfxCif.h:144
IfxCif_EpErrorSources_ExtraPath5FifoFull
FIFO of extra path 5 is full.
Definition: IfxCif.h:558
IfxCif_EpErrorSources_ExtraPath1FifoFull
FIFO of extra path 1 is full.
Definition: IfxCif.h:562
IfxCif_setMiOffsetCounterInitializationEnableState
IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be execu...
Definition: IfxCif.h:2984
IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule
Size error is generated in outmux submodule.
Definition: IfxCif.h:204
IfxCif_JpeHeaderMode_JfifHeader
JFIF header.
Definition: IfxCif.h:427
IfxCif_getMiMainPictureComponentOffsetCounter
IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component)
Function to query the current offset counter within the ring buffer of one main picture path componen...
Definition: IfxCif.c:2166
IfxCif_setIspColorSpaceMatrixCrominanceClippingRange
IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
Function to set the clipping range of the crominance of the ISP output.
Definition: IfxCif.h:2784
IfxCif_ExtraPath_2
Definition: IfxCif.h:103
IfxCif_JpeTableId
IfxCif_JpeTableId
Enumerator for the JPE Tables.
Definition: IfxCif.h:479
IfxCif_JpeQTableSelector_Table1
Q-Table 1.
Definition: IfxCif.h:447
IfxCif_IspFieldSelection_OnlyEvenFields
sample only even fields
Definition: IfxCif.h:214
IfxCif_IspMode_RawPictureWithItuRBT656Sync
RAW picture mode with ITU-R BT.656 synchronization.
Definition: IfxCif.h:263
IfxCif_setIspInterruptEnableState
IFX_EXTERN void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3244
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255
full UV range 0..255
Definition: IfxCif.h:189
IfxCif_JpeState
IfxCif_JpeState
Enumerator for the codec state.
Definition: IfxCif.h:471
IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule
Size error is generated in image stabilization submodule.
Definition: IfxCif.h:205
IfxCif_IspInterruptSources_StartEdgeOfVSync
Start Edge of v_sync.
Definition: IfxCif.h:247
IfxCif_setIspisPictureSizes
IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize)
Function to set the picture size.
Definition: IfxCif.h:2877
IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset
IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset(uint32 interruptOffset)
Function to set the filling level to trigger an interrupt for main picture path Y component...
Definition: IfxCif.h:2976
IfxCif_setIspInterruptRequestBit
IFX_EXTERN void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3281
IfxCif_getEpInitSize
IFX_EXTERN uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z)
Function to query the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:810
IfxCif_getSecurityWatchdogEnableState
IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState(void)
Function to query the enabled state of the watchdog unit.
Definition: IfxCif.h:2702
IfxCif_MiInterruptSources_WrapMainPictureCr
Main picture Cr address wrap interrupt.
Definition: IfxCif.h:323
IfxCif_getIspErrorState
IFX_EXTERN IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource)
Function to query the error state of an error source.
Definition: IfxCif.c:1234
IfxCif_setEpCroppingMaximumDisplacement
IFX_EXTERN void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
Function to set the maximum displacement of one tier of one extra path.
Definition: IfxCif.c:2834
IfxCif_setEpCroppingPictureSize
IFX_EXTERN void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
Function to set the image cropping picture size of one tier of one extra path.
Definition: IfxCif.c:2896
IfxCif_IspCcirSequence
IfxCif_IspCcirSequence
Enumerator for the ISP CCIR sequence.
Definition: IfxCif.h:177
IfxCif_EpWriteFormat_YCbCr
YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths.
Definition: IfxCif.h:598
IfxCif_getEpErrorState
IFX_EXTERN IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source)
Function to query the state of an extra path error source.
Definition: IfxCif.c:720
IfxCif_JpeQTableSelectorComponents
IfxCif_JpeQTableSelectorComponents
Enumerator for the components to select Q-Tables.
Definition: IfxCif.h:454
IfxCif_LinearDownscalerScalingMode_DoublePass
Scaling mode double pass.
Definition: IfxCif.h:293
IfxCif_setEpInitSize
IFX_EXTERN void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:2966
IfxCif_IspMode_RawPicture
RAW picture.
Definition: IfxCif.h:259
IfxCif_getDpCounter
IFX_EXTERN uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter)
Function to query the current counter value of one debug path counter.
Definition: IfxCif.c:431
IfxCif_DpControlSources_UserDefinedSymbol6
User defined symbol 6.
Definition: IfxCif.h:611
IfxCif_getHuffmanAcTableSelectorState
IFX_EXTERN IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
Function to check if a Huffman Table and a Huffman Table component is enabled for AC values...
Definition: IfxCif.c:1054
IfxCif_YCSplitterChannelMode_Disabled
Y/C splitter is disabled.
Definition: IfxCif.h:167
IfxCif_YCSplitterChannelMode
IfxCif_YCSplitterChannelMode
Enumerator for channel mode of Y/C splitter.
Definition: IfxCif.h:165
IfxCif_setInputInterface
IFX_INLINE void IfxCif_setInputInterface(IfxCif_InputInterface interface)
Function to set the input interface of the CIF interface.
Definition: IfxCif.h:2757
IfxCif_setJpegCodecImageSize
IFX_EXTERN void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the JPEG codec image size of one tier.
Definition: IfxCif.c:3524
IfxCif_getEpCroppingCameraDisplacement
IFX_EXTERN uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping camera displacement of one tier of one extra path...
Definition: IfxCif.c:515
IfxCif_getRawIspInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
Function to query the raw state of an interrupt.
Definition: IfxCif.c:2294
IfxCif_IspInterruptSources_IspTurnedOff
Isp was Turned Off (vsynced)
Definition: IfxCif.h:252
IfxCif_setIspSamplingEdge
IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge)
Function to set the ISP sampling edge.
Definition: IfxCif.h:2852
IfxCif_MiDataPaths_JpegData
JPEG data path.
Definition: IfxCif.h:314
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically
encoder first generates next header and then encodes automatically the next frame ...
Definition: IfxCif.h:497
IfxCif_getIspInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:1285
IfxCif_DpCounters_TimestampCounter
Timestamp counter.
Definition: IfxCif.h:627
IfxCif_JpeInterruptSources_EncodingComplete
Encoding complete.
Definition: IfxCif.h:439
IfxCif_setIspAcquisitionOffsets
IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset)
Function to set the ISP acquisition offsets.
Definition: IfxCif.h:2764
IfxCif_ExtraPath_1
Definition: IfxCif.h:102
IfxCif_startJpegJfifStreamEncoder
IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void)
Function to start JFIF stream encoding. Auto reset after one clock cycle.
Definition: IfxCif.h:3014
IfxCif_IspFieldSelection
IfxCif_IspFieldSelection
Enumerator for the sampled input fields.
Definition: IfxCif.h:211
IfxCif_LinearDownscalerScalingMode_DoubleSkip
Scaling mode double skip.
Definition: IfxCif.h:291
IfxCif_getSecurityWatchdogTimeout
IFX_EXTERN uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
Function to query the current value of a timeout counter of one tier.
Definition: IfxCif.c:2495
IfxCif_DpControlSources_FrameNumberCounter
Frame number counter.
Definition: IfxCif.h:619
IfxCif_ExtraPath_4
Definition: IfxCif.h:105
IfxCif_setIspColorSpaceMatrixLuminanceClippingRange
IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
Function to set the clipping range of the luminance of the ISP output.
Definition: IfxCif.h:2790
IfxCif_getEpCroppingRecenterState
IFX_EXTERN IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z)
Function to query the enabled state of the recenter feature of one extra path.
Definition: IfxCif.c:700
IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout
Vertical Start End Interrupt.
Definition: IfxCif.h:526
IfxCif_getMiChrominanceBurstLength
IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength(void)
Function to query the currently set burst length for Cb and Cr data.
Definition: IfxCif.h:2627
IfxCif_getMiMainPictureYInterruptOffset
IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset(void)
Function to query the filling level of the main picture Y component that triggers an interrupt...
Definition: IfxCif.h:2653
IfxCif_getIspInputPortSHSyncState
IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState(void)
Function to query the current level of the ISP input port s_hsync (for testing purposes only) ...
Definition: IfxCif.h:2507
IfxCif_getMiInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:2046
IfxCif_MiInterruptSources_MacroBlockLine
Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written...
Definition: IfxCif.h:327
IfxCif_MiStatusClearSources_ExtraPath4FifoFull
FIFO full flag in extra path 4.
Definition: IfxCif.h:354
IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd
encoder stops at frame end
Definition: IfxCif.h:495
IfxCif_getIspCcirSequence
IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence(void)
Function to query the currently set CCIR sequence.
Definition: IfxCif.h:2453
IfxCif_generateIspFrameSynchronousConfigUpdateSignal
IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void)
Function to generate a frame synchronous ISP configuration update signal.
Definition: IfxCif.h:2356
IfxCif_DpControlSources_UserDefinedSymbol1
User defined symbol 1.
Definition: IfxCif.h:616
IfxCif_setIspOutputState
IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState)
Function to enable or disable the ISP output.
Definition: IfxCif.h:2832
IfxCif_setJpeTableDataLsb
IFX_INLINE void IfxCif_setJpeTableDataLsb(uint8 data)
Function to set the JPE Table LSB.
Definition: IfxCif.h:2908
IfxCif_getIspAcquisitionSize
IFX_EXTERN uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition size of one tier.
Definition: IfxCif.c:1213
IfxCif_getEpBaseInitAddress
IFX_EXTERN uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z)
Function to query the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:496
IfxCif_getSoftwareResetMode
IFX_EXTERN IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule)
Function to query the reset mode of a submodule.
Definition: IfxCif.c:2538
IfxCif_IspInterruptSources_FrameCompletelyPutOut
Frame was Completely Put Out.
Definition: IfxCif.h:251
IfxCif_getJpeInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:1564
IfxCif_JpeTableId_QTable0
Q-Table 0.
Definition: IfxCif.h:481
IfxCif_getIspMode
IFX_INLINE IfxCif_State IfxCif_getIspMode(void)
Function to query the currently set ISP mode.
Definition: IfxCif.h:2519
IfxCif_JpeState_Busy
JPEG codec in process.
Definition: IfxCif.h:474
IfxCif_EpInterrupts_MacroBlockLine
Macroblock line interrupt.
Definition: IfxCif.h:587
IfxCif_setIspisOutputWindowOffset
IFX_EXTERN void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
Function to set the image stabilization offset of the output window of one tier.
Definition: IfxCif.c:3386
IfxCif_getJpeHeaderMode
IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode(void)
Function to query the currently set JPE header mode.
Definition: IfxCif.h:2567
IfxCif_getSecurityWatchdogInterruptEnableState
IFX_EXTERN IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to query the enabled state of an interrupt.
Definition: IfxCif.c:2466
IfxCif_MiMainPicturePathComponents_Y
Y-component.
Definition: IfxCif.h:335
IfxCif_getCurrentIspPictureSize
IFX_EXTERN uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier)
Function to query the current ISP picture size for one tier.
Definition: IfxCif.c:353
IfxCif_IspMode
IfxCif_IspMode
Enumerator for the ISP mode.
Definition: IfxCif.h:257
IfxCif_JpeDebugSignalSources_BadTableAccess
Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed...
Definition: IfxCif.h:399
IfxCif_DataPathSelectorForMainPath_Disabled
Main path is disabled.
Definition: IfxCif.h:85
IfxCif_getIspHSyncPolarity
IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity(void)
Function to query the currently set polarity of the HSYNC signal.
Definition: IfxCif.h:2483
IfxCif_IspMode_ItuRBT656
ITU-R BT.656 (YUV with embedded sync)
Definition: IfxCif.h:260
IfxCif_Submodules_MemoryInterface
Memory Interface submodule.
Definition: IfxCif.h:157
IfxCif_MiStatusClearSources_ExtraPath2FifoFull
FIFO full flag in extra path 2.
Definition: IfxCif.h:356
IfxCif_EpErrorSources_ExtraPath2FifoFull
FIFO of extra path 2 is full.
Definition: IfxCif.h:561
IfxCif_MiInterruptSources_MainPictureFrameEnd
Picture end of frame interrupt.
Definition: IfxCif.h:328
IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros
8-bit external Interface if enabled append 8 zeroes as LSBs
Definition: IfxCif.h:231
IfxCif_PortInputSelection
IfxCif_PortInputSelection
Enumerator for port input selections.
Definition: IfxCif.h:134
IfxCif_IspSyncPolarity_HighActive
high active sync polarity
Definition: IfxCif.h:278
IfxCif_getIspAcquisitionOffset
IFX_EXTERN uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier)
Function to query the currently set ISP acquisition offset of one tier.
Definition: IfxCif.c:1192
IfxCif_LinearDownscalerScalingMode_SinglePass
Scaling mode single pass.
Definition: IfxCif.h:292
IfxCif_setJpeHeaderGenerationMode
IFX_INLINE void IfxCif_setJpeHeaderGenerationMode(IfxCif_JpeHeaderGenerationMode headerGenerationMode)
Function to set the header generation debug control mode.
Definition: IfxCif.h:2890
IfxCif_cfg.h
CIF on-chip implementation data.
IfxCif_Submodules_ExtraPaths
Extra Paths submodule.
Definition: IfxCif.h:154
IfxCif_setSoftwareResetMode
IFX_EXTERN void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule.
Definition: IfxCif.c:3902
IfxCif_IspMode_DataMode
datamode (ISP bypass, sync signals interpreted as data enable)
Definition: IfxCif.h:262
IfxCif_setEpOffsetCounterStart
IFX_EXTERN void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter)
Function to set the initial offset counter start value of one extra path.
Definition: IfxCif.c:3046
IfxCif_setIspAcquisitionSize
IFX_EXTERN void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size)
Function to set the ISP acquisition size of one tier.
Definition: IfxCif.c:3213
IfxCif_EpErrorSources_ExtraPath1SizeError
Size error in image cropping unit of extra path 1.
Definition: IfxCif.h:567
IfxCif_setIspOutputWindowOffsets
IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset)
Function to set the ISP output window offsets.
Definition: IfxCif.h:2838
IfxCif_JpeQTableSelectorComponents_U
U-component.
Definition: IfxCif.h:457
IfxCif_getInputInterface
IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface(void)
Function to query the input interface of the CIF interface.
Definition: IfxCif.h:2447
IfxCif_setInternalClockMode
IFX_EXTERN void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule.
Definition: IfxCif.c:3155
IfxCif_clearMiStatus
IFX_EXTERN void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source)
Function to clear the status information of one status clear source of the memory interface submodule...
Definition: IfxCif.c:205
IfxCif_getModuleNumber
IFX_INLINE uint16 IfxCif_getModuleNumber(void)
Function to query the module number.
Definition: IfxCif.h:2665
IfxCif_setModuleStateRequest
IFX_EXTERN void IfxCif_setModuleStateRequest(IfxCif_State state)
Function to request enabling or disabling of the CIF module.
Definition: IfxCif.c:3798
IfxCif_setIspVSyncPolarity
IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the VSYNC signal.
Definition: IfxCif.h:2858
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxCif_getCifModuleRevision
IFX_INLINE uint8 IfxCif_getCifModuleRevision(void)
Function to query the CIF module revision.
Definition: IfxCif.h:2392
IfxCif_getEpBaseAddress
IFX_EXTERN uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z)
Function to query the current base address of the ring buffer of one extra path.
Definition: IfxCif.c:477
IfxCif_ErrorState_NoError
No error occurred.
Definition: IfxCif.h:94
IfxCif_dpResetCounter
IFX_EXTERN void IfxCif_dpResetCounter(IfxCif_DpCounters counter)
Function to reset one debug path counter.
Definition: IfxCif.c:275
IfxCif_setJpegCodecImageSizes
IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize)
Function to set the JPEG codec image sizes.
Definition: IfxCif.h:2926
IfxCif_setSecurityWatchdogInterruptEnableState
IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3813
IfxCif_setEpInterruptRequestBit
IFX_EXTERN void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
Function to set an interrupt request bit (does not necessarily trigger an interrupt) ...
Definition: IfxCif.c:3033
IfxCif_EpErrorClearSources_ExtraPath4SizeError
Size error in image cropping unit of extra path 4.
Definition: IfxCif.h:548
IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
Function to get the masked state of an interrupt.
Definition: IfxCif.c:1942
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCif_JpeQTableSelectorComponents_V
V-component.
Definition: IfxCif.h:458
IfxCif_IspInterruptSources_SampledInputFrameComplete
Sampled Input Frame is Complete.
Definition: IfxCif.h:248
IfxCif_JpeInterruptSources_VlcTableError
VLC table error.
Definition: IfxCif.h:434
IfxCif_getMiByteCount
IFX_INLINE uint32 IfxCif_getMiByteCount(void)
Function to query the number of JPEG or RAW data bytes of the last transmitted frame.
Definition: IfxCif.h:2615
IfxCif_jpeGenerateHeader
IFX_INLINE void IfxCif_jpeGenerateHeader(void)
Function to start to generate JPEG stream header. Auto reset after one clock cycle.
Definition: IfxCif.h:2720
IfxCif_getIspisOffsetOutputWindow
IFX_EXTERN uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier)
Function to query the current image stabilization offset of the output window of one tier...
Definition: IfxCif.c:1476
IfxCif_getModuleRevisionNumber
IFX_INLINE uint8 IfxCif_getModuleRevisionNumber(void)
Function to query the revision number of the CIF interface.
Definition: IfxCif.h:2671
IfxCif_setJpeTableId
IFX_INLINE void IfxCif_setJpeTableId(IfxCif_JpeTableId tableId)
Function to set the JPE Table ID.
Definition: IfxCif.h:2920
IfxCif_setIspisOutputWindowOffsets
IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset)
Function to set the image stabilization offsets of the output window.
Definition: IfxCif.h:2870
IfxCif_JpeDebugSignalSources
IfxCif_JpeDebugSignalSources
Enumerator for the debug signal sources.
Definition: IfxCif.h:397
IfxCif_SecurityWatchdogTimeoutCounters
IfxCif_SecurityWatchdogTimeoutCounters
Enumerator for watchdog timeout counters.
Definition: IfxCif.h:533
IfxCif_getEpOutputEnableState
IFX_EXTERN IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z)
Function to query the current output enable state of one extra path.
Definition: IfxCif.c:963
IfxCif_EpErrorSources
IfxCif_EpErrorSources
Enumerator for error sources of extra paths.
Definition: IfxCif.h:556
IfxCif_getEpRecenterValue
IFX_EXTERN uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z)
Function to query the current recenter value of one extra path.
Definition: IfxCif.c:980
IfxCif_IspSyncPolarity
IfxCif_IspSyncPolarity
Definition: IfxCif.h:276
IfxCif_EpInterrupts_FrameEnd
Picture end of frame interrupt.
Definition: IfxCif.h:584
IfxCif_JpeTableId_VlcDcTable1
VLC DC Table 1.
Definition: IfxCif.h:487
IfxCif_DpCounters
IfxCif_DpCounters
Enumerator for debug path counters.
Definition: IfxCif.h:624
IfxCif_DpControlSources_TimestampCounter
Timestamp counter.
Definition: IfxCif.h:617
IfxCif_MiStatusClearSources_ExtraPath5FifoFull
FIFO full flag in extra path 5.
Definition: IfxCif.h:353
IfxCif_EpErrorSources_ExtraPath4FifoFull
FIFO of extra path 4 is full.
Definition: IfxCif.h:559
IfxCif_MiStatusInformationSources_MainPictureCbFifoFull
FIFO full flag of Cb FIFO in main path asserted since last clear.
Definition: IfxCif.h:370
IfxCif_IspInterruptSources
IfxCif_IspInterruptSources
Enumerator for interrupt sources of the ISP submodule.
Definition: IfxCif.h:243
IfxCif_HuffmanTables_Table1
Huffman Table 1.
Definition: IfxCif.h:392
IfxCif_EpFeatures
IfxCif_EpFeatures
Enumerator for extra path features.
Definition: IfxCif.h:572
IfxCif_InterruptTriggeredState_Triggered
Interrupt was triggered.
Definition: IfxCif.h:129
IfxCif_resetSecurityWatchdogCounter
IFX_EXTERN void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter)
Function to reset one watchdog counter.
Definition: IfxCif.c:2681
IfxCif_IspInterruptSources_StartEdgeOfHSync
Start Edge of h_sync.
Definition: IfxCif.h:246
IfxCif_IspInputInterface_16BitExternalInterface
16-bit external Interface
Definition: IfxCif.h:238
IfxCif_setEpWriteFormat
IFX_EXTERN void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path.
Definition: IfxCif.c:3074
IfxCif_getMaskedMiInterruptTriggeredState
IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
Function to query the masked state of an interrupt.
Definition: IfxCif.c:1901
IfxCif_HuffmanTableComponents_Component1
Component 1.
Definition: IfxCif.h:383
IfxCif_IspColorSpaceMatrixCrominanceClippingRange
IfxCif_IspColorSpaceMatrixCrominanceClippingRange
Enumerator for the clipping range of the crominance for the ISP output.
Definition: IfxCif.h:186
IfxCif_getDpUserDefinedSymbol
IFX_EXTERN uint16 IfxCif_getDpUserDefinedSymbol(uint8 x)
Function to query the value of one user defined debug symbol.
Definition: IfxCif.c:460
IfxCif_getEpCroppingCurrentPictureOffset
IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the current image cropping picture offset of one tier of one extra path...
Definition: IfxCif.c:543
IfxCif_Submodules_YCSplitter
Y/C-Splitter submodule.
Definition: IfxCif.h:160
IfxCif_setDpCounter
IFX_EXTERN void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue)
Function to set one debug path counter to a counter value.
Definition: IfxCif.c:2755
IfxCif_getEpCroppingPictureSize
IFX_EXTERN uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
Function to query the image cropping picture size of one tier of one extra path.
Definition: IfxCif.c:672


iLLD_TC26B: IfxCif_Cam.c Source File

  • Cif
  • Cam
IfxCif_Cam.c
Go to the documentation of this file.
1 /**
2 * \file IfxCif_Cam.c
3 * \brief CIF CAM details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxCif_Cam.h"
30 #include "Src/Std/IfxSrc.h"
31
32 /******************************************************************************/
33 /*----------------------------------Macros------------------------------------*/
34 /******************************************************************************/
35
36 #define IFXCIF_CAM_ALIGN(size, align) ((((size) / (align)) * (align)) + ((((size) % (align)) != 0) ? (align) : 0))
37
38 #define IFXCIF_CAM_MEM_ALIGN(size) IFXCIF_CAM_ALIGN(size, IFXCIF_CAM_MEM_ALIGN_SIZE)
39
40 /** \addtogroup IfxLld_Cif_Cam_camEnumerations
41 * \{ */
42
43 /******************************************************************************/
44 /*-----------------------Private Function Prototypes--------------------------*/
45 /******************************************************************************/
46
47 /**
48 * \param cam cam handle
49 */
50 IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize(IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
51
52 /** \} */
53
54 /** \addtogroup IfxLld_Cif_Cam_camFunctions
55 * \{ */
56 /******************************************************************************/
57 /*------------------------Inline Function Prototypes--------------------------*/
58 /******************************************************************************/
59
60 /**
61 */
62 IFX_INLINE uint32 IfxCif_Cam_calcMem(uint32 bytes, float32 frames);
63
64 /**
65 * \return None
66 */
67 IFX_INLINE void IfxCif_Cam_initPictInfo(IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg);
68
69 /** \brief initializes GPIO Ports for image capturing
70 * \return None
71 */
72 IFX_INLINE void IfxCif_Cam_initPortPins(IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
73
74 /**
75 */
76 IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable(void);
77
78 /**
79 * \param cam cam handle
80 */
81 IFX_INLINE uint32 IfxCif_Cam_yuvMemSize(const IfxCif_Cam *cam);
82
83 /******************************************************************************/
84 /*-----------------------Private Function Prototypes--------------------------*/
85 /******************************************************************************/
86
87 /** \brief OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash
88 */
89 IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera(const IfxCif_Cam_Config *config);
90
91 /** \brief Initialises the CIF for image capturing
92 * \param cam cam handel
93 * \return None
94 */
95 IFX_STATIC void IfxCif_Cam_initCif(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
96
97 /**
98 * \return None
99 */
100 IFX_STATIC void IfxCif_Cam_initCifDownscaler(const IfxCif_Cam_Downscaling *ds);
101
102 /**
103 * \param cam cam handle
104 * \return None
105 */
106 IFX_STATIC void IfxCif_Cam_initCifExtraPath(const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config);
107
108 /**
109 * \return None
110 */
111 IFX_STATIC void IfxCif_Cam_initCifIspUnit(const IfxCif_Cam_Config *config);
112
113 /**
114 * \return None
115 */
116 IFX_STATIC void IfxCif_Cam_initCifJpegEncoder(const IfxCif_Cam_Config *config);
117
118 /**
119 * \param cam cam handle
120 * \return None
121 */
122 IFX_STATIC void IfxCif_Cam_initCifMemInterface(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
123
124 /** \brief Enables CIF and EMEM and initialises all memory to 0
125 * \return None
126 */
127 IFX_STATIC void IfxCif_Cam_initEmem(void);
128
129 /** \} */
130
131 /******************************************************************************/
132 /*---------------------Inline Function Implementations------------------------*/
133 /******************************************************************************/
134
135 IFX_INLINE uint32 IfxCif_Cam_calcMem(uint32 bytes, float32 frames)
136 {
137 float32 fbytes = (float32)bytes * frames;
138 uint32 ubytes = (uint32)__roundf(fbytes);
139
140 return Ifx_AlignOn32(ubytes);
141 }
142
143
144 IFX_INLINE void IfxCif_Cam_initPictInfo(IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
145 {
146 m->hSize = mcfg->hSize;
147 m->vSize = mcfg->vSize;
148 m->hOffset = mcfg->hOffset;
149 m->vOffset = mcfg->vOffset;
150 }
151
152
153 IFX_INLINE void IfxCif_Cam_initPortPins(IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
154 {
155 /* Setup the P00.0..9, P02.0..8 pad drivers */
156 IfxPort_setGroupPadDriver(&MODULE_P02, 0, 0x01FFU, padDriver);
157 IfxPort_setGroupPadDriver(&MODULE_P00, 0, 0x03FFU, padDriver);
158
159 /* CIF Data Lines */
160 /* P02.0 .. 8 as input for CIFD0..D8 */
161 /* P00.0 .. 6 as input for CIFD9..D15 */
162 IfxPort_setGroupModeInput(&MODULE_P02, 0, 0x01FFU, inputMode);
163 IfxPort_setGroupModeInput(&MODULE_P00, 0, 0x007FU, inputMode);
164
165 /* CIF synchronisation lines */
166 IfxPort_setPinModeInput(&MODULE_P00, 8, inputMode); /* CIFVSNC */
167 IfxPort_setPinModeInput(&MODULE_P00, 9, inputMode); /* CIFHSNC */
168 IfxPort_setPinModeInput(&MODULE_P00, 7, inputMode); /* CIFCLK */
169 }
170
171
172 IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable(void)
173 {
174 return (MODULE_SCU.CHIPID.B.EEA != 0) ? TRUE : FALSE;
175 }
176
177
178 IFX_INLINE uint32 IfxCif_Cam_yuvMemSize(const IfxCif_Cam *cam)
179 {
180 return cam->memAreas.y.size + cam->memAreas.cb.size + cam->memAreas.cr.size;
181 }
182
183
184 /******************************************************************************/
185 /*-------------------------Function Implementations---------------------------*/
186 /******************************************************************************/
187
188 void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam)
189 {
190 (void)cam;
191 MODULE_CIF.JPE.STATUS_ICR.U = 0xFFFFFFFFUL;
192 MODULE_CIF.MI.ICR.U = 0xFFFFFFFFUL;
193 MODULE_CIF.ISP.ICR.U = 0xFFFFFFFFUL;
194 }
195
196
197 void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam)
198 {
199 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_JpegData, IfxCif_State_Disabled);
200 IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed);
201
202 if (cam->ispMode == IfxCif_Cam_IspMode_raw)
203 {
204 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Enabled);
205 }
206 else
207 {
208 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Enabled);
209 }
210 }
211
212
213 void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam)
214 {
215 IFX_UNUSED_PARAMETER(cam);
216 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Disabled);
217 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Disabled);
218 IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder);
219 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_JpegData, IfxCif_State_Enabled);
220 }
221
222
223 IFX_CONST IfxCif_Cam_PictureInfo *IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
224 {
225 const IfxCif_Cam_PictureInfo *m = NULL_PTR;
226
227 if (z <= IfxCif_ExtraPath_5)
228 {
229 m = &(cam->memAreas.ep[z].image);
230 }
231
232 return m;
233 }
234
235
236 boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
237 {
238 boolean result = FALSE;
239
240 if (IfxCif_Cam_isJpegEncodingComplete(cam))
241 {
242 /* event for sending JPEG encoded image */
243 IfxCif_Cam_clearJpegEncodingCompleteFlag(cam);
244 Ifx_AddressValue nextAddress = IfxCif_Cam_getNextJpegFrameAddress(cam);
245
246 if (((IfxCif_Cam_JfifHeader *)nextAddress)->app0 == 0xE0FF)
247 {
248 /* correct JPEG header was detected. */
249 *address = IfxCif_Cam_getLastFrameAddress(cam);
250 *size = IfxCif_Cam_getJpegEncodedSize(cam);
251 result = TRUE;
252 }
253 else
254 {}
255 }
256
257 return result;
258 }
259
260
261 IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
262 {
263 /* Try allocating image areas for EMEM */
264 IfxCif_Cam_Status result = IfxCif_Cam_initMemSize(cam, config);
265
266 /* Check if EMEM is available */
267 if (IfxCif_Cam_isEmulationExtensionAvailable() == FALSE)
268 {
269 result = IfxCif_Cam_Status_notAvailable;
270 }
271 else
272 {
273 IfxCif_Cam_initEmem();
274 }
275
276 /* Initialse camera if needed */
277 if ((result == IfxCif_Cam_Status_ok) && (initCam != FALSE))
278 {
279 result = IfxCif_Cam_initCamera(config);
280 }
281
282 /* Finally, initialise the CIF */
283 if (result == IfxCif_Cam_Status_ok)
284 {
285 if (IfxCif_getModuleState() == IfxCif_State_Enabled)
286 {
287 IfxCif_setKernelResetRequestState(IfxCif_State_Enabled);
288 }
289
290 IfxCif_Cam_initPortPins(IfxPort_InputMode_noPullDevice, IfxPort_PadDriver_ttlSpeed1);
291 IfxCif_Cam_initCif(cam, config);
292 }
293
294 cam->configResult = result;
295
296 return result;
297 }
298
299
300 IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera(const IfxCif_Cam_Config *config)
301 {
302 IfxCif_Cam_Status result = IfxCif_Cam_Status_ok;
303 IfxI2c_I2c i2c;
304 IfxI2c_I2c_Device i2cDev;
305
306 { /* Initialise I2C module as master */
307 IfxI2c_I2c_Config i2cConfig;
308 IfxI2c_I2c_initConfig(&i2cConfig, &MODULE_I2C0);
309
310 const IfxI2c_Pins pins = {
311 &IfxI2c0_SCL_P15_4_INOUT,
312 &IfxI2c0_SDA_P15_5_INOUT,
313 IfxPort_PadDriver_ttlSpeed1
314 };
315
316 i2cConfig.pins = &pins;
317 i2cConfig.baudrate = 400000; /* 400 kHz */
318 IfxI2c_I2c_initModule(&i2c, &i2cConfig);
319
320 IfxI2c_I2c_deviceConfig i2cDeviceConfig;
321 IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c); /* Device config for Bus of i2c handle */
322
323 /* device address is obtained from the setup data table */
324 i2cDeviceConfig.deviceAddress = (0xFFU & config->setupDataTable[0]);
325 IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);
326 }
327
328 /* Send camera configuration array */
329 {
330 uint32 count;
331
332 for (count = 0; count < config->setupDataCount && result == IfxCif_Cam_Status_ok; count++)
333 {
334 uint32 nakCnt = 0; /* counts the NAKs */
335
336 while (IfxI2c_I2c_write(&i2cDev, ((uint8 *)&(config->setupDataTable[count])) + 1, 3) == IfxI2c_I2c_Status_nak)
337 {
338 nakCnt++;
339
340 if (nakCnt >= IFXCIF_MAX_I2CNAK) /* ~400 - 500 us */
341 {
342 result = IfxCif_Cam_Status_cameraCommError;
343 break;
344 }
345 }
346 }
347 }
348
349 return result;
350 }
351
352
353 IFX_STATIC void IfxCif_Cam_initCif(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
354 {
355 const IfxCif_Cam_Common *common = config->common;
356
357 IfxCif_setModuleStateRequest(IfxCif_State_Enabled);
358 IfxCif_setSoftwareResetMode(IfxCif_Submodules_AllModules, IfxCif_State_Enabled);
359
360 //IfxCif_setInternalClockMode(IfxCif_Submodules_Debug, IfxCif_State_Enabled);
361 //IfxCif_setInternalClockMode(IfxCif_Submodules_SecurityWatchdog, IfxCif_State_Enabled);
362
363 IfxCif_Cam_initCifDownscaler(config->downscaling);
364 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_1, config);
365 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_2, config);
366 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_3, config);
367 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_4, config);
368 IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_5, config);
369
370 IfxCif_Cam_initCifMemInterface(cam, config);
371 IfxCif_Cam_initCifIspUnit(config);
372
373 if (common->jpegEnabled)
374 {
375 IfxCif_Cam_enableJpegEncoder(cam);
376 }
377 else
378 {
379 IfxCif_Cam_disableJpegEncoder(cam);
380 }
381
382 if (common->jpegTables != NULL_PTR)
383 {
384 IfxCif_Cam_initCifJpegEncoder(config);
385 }
386 }
387
388
389 IFX_STATIC void IfxCif_Cam_initCifDownscaler(const IfxCif_Cam_Downscaling *ds)
390 {
391 if (ds != NULL_PTR)
392 {
393 IfxCif_setInternalClockMode(IfxCif_Submodules_LinearDownscaler,
394 ds->enabled ? IfxCif_State_Enabled : IfxCif_State_Disabled);
395 IfxCif_setLinearDownscalerScalingFactors(ds->hFactor, ds->vFactor);
396 IfxCif_setLinearDownscalerScalingModes(ds->hMode, ds->vMode);
397 }
398 }
399
400
401 IFX_STATIC void IfxCif_Cam_initCifExtraPath(const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
402 {
403 const IfxCif_Cam_Common *common = config->common;
404 const IfxCif_Cam_MemConfig *mcfg = &(common->extraPaths[ep]);
405
406 /* configuration of extra path is requested when each {hSize, vSize, memFactor} is positive. */
407
408 if ((mcfg->hSize > 0) && (mcfg->vSize > 0) && (mcfg->memFactor > 0))
409 {
410 if ((mcfg->vSize + mcfg->vOffset) > common->ispIn.vSize)
411 {
412 /* invalid setting, the vSize and vOffset is outside the ISP acquisition */
413 IFXCIF_DEBUG;
414 }
415
416 IfxCif_setInternalClockMode(IfxCif_Submodules_ExtraPaths, IfxCif_State_Enabled);
417 IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_PictureDataPath, IfxCif_State_Enabled);
418 IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_InitBaseAddress, IfxCif_State_Enabled);
419 IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_InitOffsetCounter, IfxCif_State_Enabled);
420
421 if (config->ispMode == IfxCif_Cam_IspMode_raw)
422 {
423 IfxCif_setEpWriteFormat(ep, (config->ispRawBpp <= 8) ? IfxCif_EpWriteFormat_Raw8Bit : IfxCif_EpWriteFormat_RawGreater);
424 IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_ByteSwap, mcfg->byteSwap ? IfxCif_State_Enabled : IfxCif_State_Disabled);
425 }
426 else
427 {
428 IfxCif_setEpWriteFormat(ep, IfxCif_EpWriteFormat_YCbCr);
429 }
430
431 if ((mcfg->hSize + mcfg->hOffset) > common->ispIn.hSize)
432 {
433 /* invalid setting, the hSize and hOffset is outside the ISP acquisition */
434 IFXCIF_DEBUG;
435 }
436
437 IfxCif_setEpCroppingEnableState(ep, IfxCif_State_Enabled);
438 IfxCif_setEpCroppingPictureSizes(ep, mcfg->hSize, mcfg->vSize);
439 IfxCif_setEpCroppingOffsetsOutputWindow(ep, mcfg->hOffset, mcfg->vOffset);
440 IfxCif_setEpBaseInitAddress(ep, IfxCif_Cam_getBbbAddress(cam, cam->memAreas.ep[ep].start));
441 IfxCif_setEpInitSize(ep, cam->memAreas.ep[ep].size);
442 IfxCif_epForceConfigurationUpdate(ep);
443 }
444 }
445
446
447 IFX_STATIC void IfxCif_Cam_initCifIspUnit(const IfxCif_Cam_Config *config)
448 {
449 const IfxCif_Cam_Common *common = config->common;
450
451 IfxCif_setInternalClockMode(IfxCif_Submodules_ImageSignalProcessing, IfxCif_State_Enabled);
452
453 IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode_MainPathAndRawMode);
454 IfxCif_setNumberOfAcquisitionFrames(1);
455
456 if (config->ispRawBpp == 8)
457 {
458 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
459 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb);
460 }
461 else if (config->ispRawBpp == 10)
462 {
463 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
464 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb);
465 }
466 else if (config->ispRawBpp == 12)
467 {
468 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
469 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb);
470 }
471 else if (config->ispRawBpp == 14)
472 {
473 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
474 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb);
475 }
476 else if (config->ispRawBpp == 16)
477 {
478 IfxCif_setIspInputSelectionAppendState(IfxCif_State_Disabled);
479 IfxCif_setIspInputInterface(IfxCif_IspInputInterface_16BitExternalInterface);
480 }
481 else
482 {
483 IFXCIF_DEBUG;
484 }
485
486 IfxCif_setIspHSyncPolarity(config->hSyncPolarity);
487 IfxCif_setIspVSyncPolarity(config->vSyncPolarity);
488 IfxCif_setIspSamplingEdge(config->samplingEdge);
489
490 if (config->ispMode == IfxCif_Cam_IspMode_raw)
491 {
492 IfxCif_setIspMode(IfxCif_IspMode_RawPicture);
493 IfxCif_setIspFieldInvertState(IfxCif_State_Disabled);
494 IfxCif_setIspAcquisitionSizes(common->ispIn.hSize, common->ispIn.vSize);
495
496 /* the followings are ignored, but set to default */
497 IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence_YCbYCr);
498 IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255);
499 IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255);
500 }
501 else if ((config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
502 || (config->ispMode == IfxCif_Cam_IspMode_yuvPlanar))
503 {
504 IfxCif_setIspMode(IfxCif_IspMode_ItuRBT601);
505 IfxCif_setIspFieldInvertState(IfxCif_State_Enabled);
506 IfxCif_setIspAcquisitionSizes(common->ispIn.hSize * 2, common->ispIn.vSize);
507
508 IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence_YCbYCr);
509 IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255);
510 IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255);
511 }
512 else
513 {
514 /* undefined */
515 IFXCIF_DEBUG;
516 }
517
518 IfxCif_setIspAcquisitionOffsets(common->ispIn.hOffset, common->ispIn.vOffset);
519 IfxCif_setIspPictureSizes(common->ispIn.hSize, common->ispIn.vSize);
520 IfxCif_setIspOutputWindowOffsets(common->ispIn.hOffset, common->ispIn.vOffset);
521
522 IfxCif_setIspisEnableState(IfxCif_State_Enabled);
523 IfxCif_setIspisPictureSizes(common->mainPath.hSize, common->mainPath.vSize);
524 IfxCif_setIspisOutputWindowOffsets((IfxCif_ImageTiers)common->mainPath.hOffset, common->mainPath.vOffset);
525
526 IfxCif_generateIspImmediateConfigUpdateSignal();
527
528 IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources_FrameCompletelyPutOut, IfxCif_State_Enabled);
529 //IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources_IspTurnedOff, IfxCif_State_Enabled);
530
531 if (common->ispInterrupt.priority > 0)
532 {
533 volatile Ifx_SRC_SRCR *srcr = &SRC_CIFISP;
534 IfxSrc_init(srcr, (IfxSrc_Tos)common->ispInterrupt.provider, (Ifx_Priority)common->ispInterrupt.priority);
535 IfxSrc_enable(srcr);
536 }
537 }
538
539
540 IFX_STATIC void IfxCif_Cam_initCifJpegEncoder(const IfxCif_Cam_Config *config)
541 {
542 const IfxCif_Cam_JpegTables *jpeTables = config->common->jpegTables;
543
544 IfxCif_setInternalClockMode(IfxCif_Submodules_JpegEncoder, IfxCif_State_Enabled);
545
546 /* Select encoding table */
547 IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_Y, IfxCif_JpeQTableSelector_Table0);
548 IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_U, IfxCif_JpeQTableSelector_Table1);
549 IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_V, IfxCif_JpeQTableSelector_Table1);
550
551 /* Programming encoding table */
552 IfxCif_programJpeTable(IfxCif_JpeTableId_QTable0, jpeTables->y.q.entry, jpeTables->y.q.length);
553 IfxCif_programJpeTable(IfxCif_JpeTableId_QTable1, jpeTables->uv.q.entry, jpeTables->uv.q.length);
554 IfxCif_programJpeTable(IfxCif_JpeTableId_VlcDcTable0, jpeTables->y.dc.entry, jpeTables->y.dc.length);
555 IfxCif_programJpeTable(IfxCif_JpeTableId_VlcDcTable1, jpeTables->uv.dc.entry, jpeTables->uv.dc.length);
556 IfxCif_programJpeTable(IfxCif_JpeTableId_VlcAcTable0, jpeTables->y.ac.entry, jpeTables->y.ac.length);
557 IfxCif_programJpeTable(IfxCif_JpeTableId_VlcAcTable1, jpeTables->uv.ac.entry, jpeTables->uv.ac.length);
558
559 /* JPEG Codec Image Size */
560 const IfxCif_Cam_MemConfig *mcfg = &(config->common->mainPath);
561
562 if (config->ispMode == IfxCif_Cam_IspMode_raw)
563 {
564 IfxCif_setJpegCodecImageSizes(mcfg->hSize, mcfg->vSize);
565 }
566 else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
567 {
568 IfxCif_setJpegCodecImageSizes(mcfg->hSize, mcfg->vSize);
569 }
570 else
571 {
572 IFXCIF_DEBUG;
573 }
574
575 /* JPE Header Mode Definition Register */
576 IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode_JfifHeader);
577
578 /* JPE Status Interrupt Mask Register */
579 IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources_EncodingComplete, IfxCif_State_Enabled);
580 //IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources_HeaderGenerationComplete, IfxCif_State_Enabled);
581
582 /* JPE Command To Start Stream Header Generation Register */
583 IfxCif_jpeGenerateHeader();
584
585 /* JPE Start Command To Start JFIF Stream Encoding Register */
586 IfxCif_startJpegJfifStreamEncoder();
587 IfxCif_setJpegJfifStreamEncoderContinuousMode
588 (IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically);
589
590 /* JPE Automatic Configuration Update Register */
591 IfxCif_initJpegEncoder();
592 }
593
594
595 IFX_STATIC void IfxCif_Cam_initCifMemInterface(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
596 {
597 IfxCif_setInternalClockMode(IfxCif_Submodules_MemoryInterface, IfxCif_State_Enabled);
598
599 if (config->ispMode == IfxCif_Cam_IspMode_raw)
600 {
601 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Enabled);
602 IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength_8BeatBursts);
603
604 if (config->ispRawBpp > 8)
605 {
606 IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit);
607 }
608 else
609 {
610 IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit);
611 }
612 }
613 else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
614 {
615 IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Enabled);
616 IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength_8BeatBursts);
617 IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit); /* interleaved mode */
618 }
619 else
620 {
621 IFXCIF_DEBUG;
622 }
623
624 IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State_Enabled);
625 IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents_Y, IfxCif_Cam_getBbbAddress(cam, cam->memAreas.y.start));
626 IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents_Y, cam->memAreas.y.size);
627 IfxCif_generateMiImmediateConfigUpdateSignal();
628
629 IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources_MainPictureFrameEnd, IfxCif_State_Enabled);
630 //IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources_FillMainPictureY, IfxCif_State_Enabled);
631 }
632
633
634 IFX_STATIC void IfxCif_Cam_initEmem(void)
635 {
636 IfxEmem_setClockEnableState(IfxEmem_State_enabled);
637 __nop();
638
639 if (IfxEmem_LockedState_locked == IfxEmem_getLockedState())
640 {
641 /* apply unlock sequence */
642 IfxEmem_setUnlockStandbyLockFlag(0x1);
643 IfxEmem_setUnlockStandbyLockFlag(0x3);
644 IfxEmem_setUnlockStandbyLockFlag(0x7);
645 /* wait one cycle for unlock */
646 __nop();
647 }
648
649 IfxEmem_setTileConfigMode(IfxEmem_TileConfigMode_calibMode, IfxEmem_TileNumber_0);
650
651 #if IFXCIF_CAM_INITIALIZE_EMEM
652 {
653 uint64 *pmem;
654 uint32 i;
655
656 /* initialize the whole EMEM with 0 */
657 pmem = (uint64 *)IFXEMEM_START_ADDR_CPU;
658
659 for (i = 0; (uint64)i < (IFXEMEM_SIZE / 8); i += 1)
660 {
661 *(pmem++) = 0;
662 }
663 }
664 #endif
665 }
666
667
668 IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize(IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
669 {
670 IfxCif_Cam_Status result = IfxCif_Cam_Status_ok;
671 IfxCif_Cam_MemAreas *m = &cam->memAreas;
672 const IfxCif_Cam_Common *common = config->common;
673 const IfxCif_Cam_MemConfig *mcfg = &(common->mainPath);
674
675 cam->nextFreeAddress = 0x00000000;
676 cam->availMemSize = 0x00100000;
677 cam->cif = &MODULE_CIF;
678 cam->emem = &MODULE_EMEM;
679 cam->configResult = IfxCif_Cam_Status_ok;
680 cam->totalMemSize = 0;
681 cam->ispMode = config->ispMode;
682 cam->jfif = NULL_PTR;
683
684 memset(m, 0, sizeof(IfxCif_Cam_MemAreas));
685
686 uint32 numPixels = mcfg->hSize * mcfg->vSize;
687
688 /* Calculate MainPath memory usage information ------------------------------------ */
689 if (config->ispMode == IfxCif_Cam_IspMode_raw)
690 {
691 cam->ispBpp = (config->ispRawBpp > 8) ? 2 : 1;
692 m->y.size = IfxCif_Cam_calcMem(numPixels * cam->ispBpp, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
693 IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
694 m->cb.size = 0 + IFXCIF_CAM_MEM_GAPSIZE;
695 m->cr.size = 0 + IFXCIF_CAM_MEM_GAPSIZE;
696 }
697 else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
698 {
699 cam->ispBpp = 2;
700 m->y.size = IfxCif_Cam_calcMem(numPixels * cam->ispBpp, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
701 IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
702 m->cb.size = 0;
703 m->cr.size = m->cb.size;
704 }
705 else if (config->ispMode == IfxCif_Cam_IspMode_yuvPlanar)
706 {
707 IFXCIF_DEBUG; /* not tested! */
708 cam->ispBpp = 2;
709 m->y.size = IfxCif_Cam_calcMem(numPixels, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
710 IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
711 m->cb.size = m->y.size / 2;
712 m->cr.size = m->cb.size;
713 }
714
715 m->y.start = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
716
717 if (common->jpegEnabled != 0)
718 {
719 cam->memAreas.y.size = Ifx_AlignOn32(cam->memAreas.y.size / 8);
720 }
721
722 m->cb.start = (Ifx_AddressValue)((uint32)m->y.start + m->y.size);
723 m->cr.start = (Ifx_AddressValue)((uint32)m->cb.start + m->cb.size);
724
725 cam->totalMemSize = IFXCIF_CAM_MEM_ALIGN(IfxCif_Cam_yuvMemSize(cam));
726
727 IfxCif_ExtraPath z = IfxCif_ExtraPath_1;
728 Ifx_AddressValue nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
729
730 /* Calculate ExtraPath 1 memory usage information --------------------------------- */
731 IfxCif_Cam_MemInfo *mep = &(m->ep[z]);
732 mcfg = &common->extraPaths[z];
733 mep->start = nextStart;
734 mep->size = IfxCif_Cam_calcMem(cam->ispBpp * (mcfg->vSize * mcfg->hSize), mcfg->memFactor);
735 IfxCif_Cam_initPictInfo(&mep->image, mcfg);
736
737 if (config->downscaling != NULL_PTR)
738 {
739 const IfxCif_Cam_Downscaling *downscaling = config->downscaling;
740
741 if (downscaling->enabled)
742 {
743 /* NOTE: preliminary version (using 2x or 4x downscaling only) */
744 /* It should be possible to compute the size from the given parameters */
745 if ((downscaling->sizeFactor != 4) && (downscaling->sizeFactor != 2))
746 {
747 IFXCIF_DEBUG;
748 }
749
750 mep->size /= (downscaling->sizeFactor * downscaling->sizeFactor);
751
752 if (downscaling->hMode != IfxCif_LinearDownscalerScalingMode_Disabled)
753 {
754 mep->image.hSize /= downscaling->sizeFactor;
755 }
756
757 if (downscaling->vMode != IfxCif_LinearDownscalerScalingMode_Disabled)
758 {
759 mep->image.vSize /= downscaling->sizeFactor;
760 }
761 }
762 }
763
764 cam->totalMemSize = cam->totalMemSize + IFXCIF_CAM_MEM_ALIGN(mep->size);
765 nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
766
767 /* Calculate ExtraPath 2..5 memory usage information ------------------------------ */
768 for (z = IfxCif_ExtraPath_2; z <= IfxCif_ExtraPath_5; z++)
769 {
770 mep = &(m->ep[z]);
771 mcfg = &common->extraPaths[z];
772 mep->start = nextStart;
773 mep->size = IfxCif_Cam_calcMem(cam->ispBpp * (mcfg->vSize * mcfg->hSize), mcfg->memFactor);
774 IfxCif_Cam_initPictInfo(&mep->image, mcfg);
775 cam->totalMemSize = cam->totalMemSize + IFXCIF_CAM_MEM_ALIGN(mep->size);
776 nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
777 }
778
779 /* Total memory usage ------------------------------------------------------------- */
780 if (cam->totalMemSize <= cam->availMemSize)
781 {
782 /* if enough memory available..... */
783 cam->availMemSize -= cam->totalMemSize;
784
785 if (cam->nextFreeAddress == 0)
786 {
787 cam->nextFreeAddress = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
788 }
789
790 cam->nextFreeAddress = (Ifx_AddressValue)((uint32)cam->nextFreeAddress + cam->totalMemSize);
791 }
792 else
793 {
794 IFXCIF_DEBUG;
795 result = IfxCif_Cam_Status_notEnoughMemory;
796 }
797
798 return result;
799 }
800
801
802 void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames)
803 {
804 (void)cam;
805 IfxCif_setNumberOfAcquisitionFrames(frames);
806 IfxCif_setIspOutputState(IfxCif_State_Enabled);
807 IfxCif_generateIspFrameSynchronousConfigUpdateSignal();
808 }
809
810
811 void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames)
812 {
813 (void)cam;
814 IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State_Enabled);
815 IfxCif_generateMiImmediateConfigUpdateSignal();
816 IfxCif_setNumberOfAcquisitionFrames(frames);
817 IfxCif_setIspInputFormatterState(IfxCif_State_Enabled);
818 IfxCif_setIspOutputState(IfxCif_State_Enabled);
819 IfxCif_generateIspImmediateConfigUpdateSignal();
820 }
821
822
823 void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam)
824 {
825 (void)cam;
826 IfxCif_setIspOutputState(IfxCif_State_Disabled);
827 IfxCif_generateIspImmediateConfigUpdateSignal();
828 }
IfxCif_Cam_Status_cameraCommError
camera comm Error
Definition: IfxCif_Cam.h:85
IFXCIF_DEBUG
#define IFXCIF_DEBUG
Definition: IfxCif_cfg.h:46
IfxCif_Cam_Config
Camera specific configuration.
Definition: IfxCif_Cam.h:240
IFXEMEM_SIZE
#define IFXEMEM_SIZE
Definition: IfxEmem_cfg.h:52
IfxCif_JpeTableId_VlcDcTable0
VLC DC Table 0.
Definition: IfxCif.h:485
IfxCif_setEpBaseInitAddress
void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
Function to set the initial base address of the ring buffer of one extra path.
Definition: IfxCif.c:2782
IfxCif_Cam_Config::setupDataTable
IFX_CONST uint32 * setupDataTable
pointer to the first entry of camera-specific configuration data
Definition: IfxCif_Cam.h:249
IfxCif_Cam_PictureInfo::hOffset
uint16 hOffset
horizontal offset
Definition: IfxCif_Cam.h:122
IfxCif_setEpCroppingPictureSizes
void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
Function to set the image cropping picture sizes one extra path.
Definition: IfxCif.c:2920
IfxCif_Cam_IspMode_yuvInterleaved
yuv interleaved
Definition: IfxCif_Cam.h:67
IfxCif_setNumberOfAcquisitionFrames
IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames)
Function to set the number of acquisition frames.
Definition: IfxCif.h:2990
IfxCif_Cam_enableJpegEncoder
void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly.
Definition: IfxCif_Cam.c:213
IfxCif_Cam::memAreas
IfxCif_Cam_MemAreas memAreas
memory area definition
Definition: IfxCif_Cam.h:226
IfxCif_Cam_Config::hSyncPolarity
IfxCif_IspSyncPolarity hSyncPolarity
polarity of HSYNC signal
Definition: IfxCif_Cam.h:245
IfxCif_Cam::configResult
IfxCif_Cam_Status configResult
status of last configuration (or initialisation)
Definition: IfxCif_Cam.h:233
IfxEmem_TileConfigMode_calibMode
EMEM tile mode to calibration memory.
Definition: IfxEmem.h:66
IfxCif_Cam_MemAreas::ep
IfxCif_Cam_MemInfo ep[IFXCIF_EXTRA_PATHS]
ep
Definition: IfxCif_Cam.h:214
IfxCif_Cam_MemInfo::size
uint32 size
size in bytes
Definition: IfxCif_Cam.h:155
IfxCif_Cam::nextFreeAddress
Ifx_AddressValue nextFreeAddress
next free storage address
Definition: IfxCif_Cam.h:228
IfxCif_setIspAcquisitionSizes
IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize)
Function to set the ISP acquisition sizes.
Definition: IfxCif.h:2771
IfxCif_Cam_JpegTable::q
IfxCif_Cam_TableInfo q
q
Definition: IfxCif_Cam.h:111
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxCif_Cam_PictureInfo::vOffset
uint16 vOffset
vertical offset
Definition: IfxCif_Cam.h:123
IFXCIF_CAM_MEM_ALIGN
#define IFXCIF_CAM_MEM_ALIGN(size)
Definition: IfxCif_Cam.c:38
IfxCif_Cam_MemAreas::cb
IfxCif_Cam_MemInfo cb
cb
Definition: IfxCif_Cam.h:212
IfxCif_Cam_clearJpegEncodingCompleteFlag
IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam)
Clear the JPEG encoder completed flag.
Definition: IfxCif_Cam.h:444
IfxCif_Cam_Downscaling::hMode
IfxCif_LinearDownscalerScalingMode hMode
hMode
Definition: IfxCif_Cam.h:183
IfxCif_Submodules_JpegEncoder
JPEG Encoder submodule.
Definition: IfxCif.h:158
IfxCif_setYCSplitterChannelMode
IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode)
Function to set the Y/C splitter channel mode.
Definition: IfxCif.h:3008
IfxPort_PadDriver_ttlSpeed1
Speed grade 1.
Definition: IfxPort.h:134
IFXCIF_MAX_I2CNAK
#define IFXCIF_MAX_I2CNAK
Definition: IfxCif_cfg.h:54
IfxCif_setMiMainPictureComponentBaseInitAddress
void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
Function to set the initial base address of the ring buffer for one main picture path component...
Definition: IfxCif.c:3727
IfxCif_Cam_PictureInfo
Picture info.
Definition: IfxCif_Cam.h:118
IfxCif_Cam_Config::setupDataCount
uint16 setupDataCount
number of camera-specific configuration data (in DWORDS)
Definition: IfxCif_Cam.h:248
IfxCif_Cam_Downscaling::vMode
IfxCif_LinearDownscalerScalingMode vMode
vMode
Definition: IfxCif_Cam.h:184
IfxCif_Cam_TableInfo::length
uint8 length
length
Definition: IfxCif_Cam.h:99
IfxCif_Cam_MemAreas::cr
IfxCif_Cam_MemInfo cr
cr
Definition: IfxCif_Cam.h:213
IfxCif_JpeQTableSelector_Table0
Q-Table 0.
Definition: IfxCif.h:446
IfxCif_Cam_init
IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself.
Definition: IfxCif_Cam.c:261
IfxCif_IspCcirSequence_YCbYCr
YCbYCr.
Definition: IfxCif.h:179
IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb
14-bit external Interface if enabled append 2 MSBs as LSBs
Definition: IfxCif.h:236
IfxCif_Cam_initCamera
IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera(const IfxCif_Cam_Config *config)
OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash.
Definition: IfxCif_Cam.c:300
IfxCif_Cam_Config::samplingEdge
IfxCif_IspSamplingEdge samplingEdge
sampling edge
Definition: IfxCif_Cam.h:247
IfxCif_YCSplitterChannelMode_MainPathAndRawMode
Y/C splitter is enabled for main path and RAW mode.
Definition: IfxCif.h:168
IfxCif_Cam_calcMem
IFX_INLINE uint32 IfxCif_Cam_calcMem(uint32 bytes, float32 frames)
Definition: IfxCif_Cam.c:135
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
IfxCif_MiBurstLength_8BeatBursts
8-beat bursts
Definition: IfxCif.h:306
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCif_setIspFieldInvertState
IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState)
Function to enable or disable inversion of the field ID.
Definition: IfxCif.h:2796
IfxCif_Cam_Downscaling::vFactor
uint8 vFactor
vertical factor to program into IfxCif_setLinearDownscalerScalingFactors()
Definition: IfxCif_Cam.h:186
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxCif_setLinearDownscalerScalingFactors
void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
Function to set the scaling factors of the linear downscaler.
Definition: IfxCif.c:3583
IfxCif_Cam::ispMode
IfxCif_Cam_IspMode ispMode
actual ISP mode
Definition: IfxCif_Cam.h:234
IfxCif_ExtraPath_3
Definition: IfxCif.h:104
IfxCif_Cam_startCapture
void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter.
Definition: IfxCif_Cam.c:811
IfxCif_Cam_Config::vSyncPolarity
IfxCif_IspSyncPolarity vSyncPolarity
polarity of VSYNC signal
Definition: IfxCif_Cam.h:246
IfxCif_Cam_Downscaling::sizeFactor
uint8 sizeFactor
memory size factor, e.g. half in both H and V usually gives factor of 4
Definition: IfxCif_Cam.h:187
IfxCif_setEpCroppingEnableState
void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
Function to enable or disable image cropping of one extra path.
Definition: IfxCif.c:2821
IfxCif_Cam_JpegTables::y
IfxCif_Cam_JpegTable y
y
Definition: IfxCif_Cam.h:134
IfxPort_setGroupModeInput
void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:138
IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255
full Y range 0..255
Definition: IfxCif.h:197
IfxCif_Cam::totalMemSize
uint32 totalMemSize
total occupied memory area (in bytes)
Definition: IfxCif_Cam.h:227
IfxCif_setIspHSyncPolarity
IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the HSYNC signal.
Definition: IfxCif.h:2808
IfxSrc.h
SRC basic functionality.
IfxCif_Cam_disableJpegEncoder
void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the &#39;original&#39; configuration...
Definition: IfxCif_Cam.c:197
IfxCif_ImageTiers
IfxCif_ImageTiers
Enumerator for tiers.
Definition: IfxCif.h:111
IfxI2c_I2c_Config::baudrate
float32 baudrate
Baudrate.
Definition: IfxI2c_I2c.h:330
IfxCif_Cam_clearAllFlags
void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam)
Clear all CIF module notification flags.
Definition: IfxCif_Cam.c:188
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxEmem_TileNumber_0
Tile Number0.
Definition: IfxEmem.h:73
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxI2c_I2c_Config
Structure to configure the Module.
Definition: IfxI2c_I2c.h:327
IfxI2c_I2c_deviceConfig::deviceAddress
uint8 deviceAddress
the slave device&#39;s address
Definition: IfxI2c_I2c.h:347
IfxCif_setIspMode
IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode)
Function to set the ISP mode.
Definition: IfxCif.h:2826
IfxCif_Cam::jfif
IfxCif_Cam_JfifHeader * jfif
pointer to the last acquired JPEG header
Definition: IfxCif_Cam.h:232
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCif_Cam_PictureInfo::vSize
uint16 vSize
vertical (number of lines)
Definition: IfxCif_Cam.h:121
IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit
planar (YCbCr mode) / RAW & data mode (8 bit)
Definition: IfxCif.h:344
IfxCif_Cam_isJpegEncodingComplete
IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam)
Definition: IfxCif_Cam.h:588
IfxCif_setIspInputFormatterState
IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState)
Function to enable or disable the ISP input formatter.
Definition: IfxCif.h:2814
IfxCif_EpWriteFormat_RawGreater
RAW & data mode (greater 8 up to 16 bit)
Definition: IfxCif.h:597
IfxCif_Cam_getLastFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam)
Returns the address location of last acquired main-path image frame data.
Definition: IfxCif_Cam.h:533
IfxCif_Cam_MemConfig::byteSwap
boolean byteSwap
byte swapping
Definition: IfxCif_Cam.h:147
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxCif_EpFeatures_ByteSwap
Byte swap feature.
Definition: IfxCif.h:576
IfxI2c0_SDA_P15_5_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Definition: IfxI2c_PinMap.c:33
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCif_ExtraPath_5
Definition: IfxCif.h:106
IfxCif_setIspInputInterface
IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input)
Function to set the ISP input interface bit width.
Definition: IfxCif.h:2820
IfxCif_Cam
Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for ...
Definition: IfxCif_Cam.h:224
IfxCif_setMiLuminanceBurstLength
void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
Function to set the burst length for Y, JPEG, or RAW data.
Definition: IfxCif.c:3721
IfxCif_Cam_initCifDownscaler
IFX_STATIC void IfxCif_Cam_initCifDownscaler(const IfxCif_Cam_Downscaling *ds)
Definition: IfxCif_Cam.c:389
IfxCif_setMiMainPictureWriteFormat
IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format)
Function to set the write format of the main picture path of the memory interface.
Definition: IfxCif.h:2970
IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit
interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit) ...
Definition: IfxCif.h:346
IfxCif_Cam_Config::common
IFX_CONST IfxCif_Cam_Common * common
pointer to common configuration
Definition: IfxCif_Cam.h:242
IfxCif_Cam_MemInfo::image
IfxCif_Cam_PictureInfo image
image
Definition: IfxCif_Cam.h:156
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCif_JpeQTableSelectorComponents_Y
Y-component.
Definition: IfxCif.h:456
IfxCif_setJpeQTableSelector
void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
Function to set the Q-Table selector for one component.
Definition: IfxCif.c:3486
IfxCif_setIspPictureSizes
IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize)
Function to set the ISP picture sizes.
Definition: IfxCif.h:2845
IfxCif_Cam_Downscaling::hFactor
uint8 hFactor
horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors()
Definition: IfxCif_Cam.h:185
IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb
12-bit external Interface if enabled append 4 MSBs as LSBs
Definition: IfxCif.h:234
IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb
8-bit external Interface if enabled append 8 MSBs as LSBs
Definition: IfxCif.h:230
IfxCif_Submodules_AllModules
All submodules.
Definition: IfxCif.h:152
IfxCif_setIspisEnableState
IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState)
Function to enable or disable image stabilization.
Definition: IfxCif.h:2864
IfxCif_setJpegJfifStreamEncoderContinuousMode
IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode)
Function to set the stream encoder continuous mode.
Definition: IfxCif.h:2933
IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder
Main path is routed to the JPEG encoder.
Definition: IfxCif.h:87
IfxCif_Cam_Common::jpegEnabled
boolean jpegEnabled
jpeg enabled
Definition: IfxCif_Cam.h:175
IfxCif_Cam_isEmulationExtensionAvailable
IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable(void)
Definition: IfxCif_Cam.c:172
IfxI2c_I2c_deviceConfig
Structure to configure the device&#39;s data structure.
Definition: IfxI2c_I2c.h:344
IfxEmem_setClockEnableState
void IfxEmem_setClockEnableState(const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM withou...
Definition: IfxEmem.c:42
IfxCif_Cam::emem
Ifx_EMEM * emem
pointer to base address of EMEM module SFRs
Definition: IfxCif_Cam.h:231
Ifx_IsrSetting::priority
uint16 priority
Definition: Ifx_Types.h:91
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCif_Cam_IspMode_yuvPlanar
yuv planar
Definition: IfxCif_Cam.h:68
IfxCif_EpFeatures_InitBaseAddress
Init buffer base address.
Definition: IfxCif.h:575
IfxCif_Cam_Status
IfxCif_Cam_Status
Driver status.
Definition: IfxCif_Cam.h:81
IfxCif_setLinearDownscalerScalingModes
void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
Function to set the scaling mode of one tier.
Definition: IfxCif.c:3614
IfxI2c_I2c_initModule
void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module.
Definition: IfxI2c_I2c.c:57
Ifx_AlignOn32
#define Ifx_AlignOn32(Size)
Definition: IfxCpu_Intrinsics.h:58
IfxCif_Cam_MemConfig::memFactor
float32 memFactor
multiples of frame count for memory allocation
Definition: IfxCif_Cam.h:142
IfxCif_State_Enabled
Enabled state.
Definition: IfxCif.h:145
IfxI2c_I2c_Status_nak
NAK.
Definition: IfxI2c_I2c.h:301
IfxCif_Submodules_LinearDownscaler
Linear Downscaler submodule.
Definition: IfxCif.h:155
IfxCif_Cam_JpegTables
JPEG tables for all components.
Definition: IfxCif_Cam.h:132
IfxCif_programJpeTable
void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
Definition: IfxCif.c:2614
IfxCif_Cam_restartCapture
void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output.
Definition: IfxCif_Cam.c:802
IfxCif_Cam_initCifJpegEncoder
IFX_STATIC void IfxCif_Cam_initCifJpegEncoder(const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:540
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxCif_Cam_getLastJpegEncodingInfo
boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process.
Definition: IfxCif_Cam.c:236
IfxCif_MiDataPaths_RawData
RAW data path.
Definition: IfxCif.h:313
IfxCif_setIspInputSelectionAppendState
void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
Function to enable or disable appending of bits to the input signal.
Definition: IfxCif.c:3230
IfxCif_setMiFeatureEnableState
void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
Function to enable or disable one memory interface data path.
Definition: IfxCif.c:3626
IfxCif_setMiMainPictureComponentInitSize
void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
Function to set the initial size of the ring buffer for one main picture path component.
Definition: IfxCif.c:3752
IfxCif_Cam_JpegTable::ac
IfxCif_Cam_TableInfo ac
ac
Definition: IfxCif_Cam.h:113
IfxCif_Cam_Common::extraPaths
IfxCif_Cam_MemConfig extraPaths[IFXCIF_EXTRA_PATHS]
extra paths
Definition: IfxCif_Cam.h:169
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:66
IfxCif_initJpegEncoder
IFX_INLINE void IfxCif_initJpegEncoder(void)
Function to immediately start the JPEG encoder. This function has to be called after IfxCif_startJpeg...
Definition: IfxCif.h:2714
IfxCif_Cam_Common
Common configuration.
Definition: IfxCif_Cam.h:165
IfxCif_Cam_JpegTable::dc
IfxCif_Cam_TableInfo dc
dc
Definition: IfxCif_Cam.h:112
IfxCif_Cam_Downscaling::enabled
boolean enabled
enable
Definition: IfxCif_Cam.h:182
IfxCif_setJpeInterruptEnableState
void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3420
IfxCif_Cam_Common::ispIn
IfxCif_Cam_PictureInfo ispIn
ispIn
Definition: IfxCif_Cam.h:167
IfxCif_Cam_Status_notAvailable
not available
Definition: IfxCif_Cam.h:86
IfxCif_setEpFeatureEnableState
void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
Function to enable or disable one feature of one extra path.
Definition: IfxCif.c:2934
IfxI2c_I2c_write
IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device
Definition: IfxI2c_I2c.c:288
IfxCif_generateIspImmediateConfigUpdateSignal
IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void)
Function to generate an immediate ISP configuration update signal.
Definition: IfxCif.h:2362
IFXCIF_CAM_MEM_GAPSIZE
#define IFXCIF_CAM_MEM_GAPSIZE
Definition: IfxCif_Cam.h:53
IfxCif_setMiInterruptEnableState
void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3647
IfxCif_EpWriteFormat_Raw8Bit
Raw 8 bit mode.
Definition: IfxCif.h:596
IfxCif_MiDataPaths_MainPictureData
main picture data path
Definition: IfxCif.h:315
IfxCif_Cam_MemAreas::y
IfxCif_Cam_MemInfo y
y
Definition: IfxCif_Cam.h:211
IfxCif_setEpCroppingOffsetsOutputWindow
void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
Function to set the image cropping offsets of the output window of one extra path.
Definition: IfxCif.c:2882
IfxCif_EpFeatures_PictureDataPath
enables the extra path picture data path
Definition: IfxCif.h:577
IfxCif_Cam_Config::downscaling
IFX_CONST IfxCif_Cam_Downscaling * downscaling
downscaling settings for ExtraPath 1
Definition: IfxCif_Cam.h:250
IfxCif_Cam_MemConfig
Single path memory interface configuration (used in initialisation/configuration) ...
Definition: IfxCif_Cam.h:140
IfxCif_Cam::ispBpp
boolean ispBpp
byte per pixel
Definition: IfxCif_Cam.h:235
IfxCif_setKernelResetRequestState
IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state)
Function to request a kernel reset or reset the request bit.
Definition: IfxCif.h:2945
IfxCif_setDataPathSelectorForMainPath
IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector)
Function to set the data path for main path.
Definition: IfxCif.h:2739
IfxCif_ExtraPath
IfxCif_ExtraPath
Enumerator for the extra paths.
Definition: IfxCif.h:100
IfxCif_getModuleState
IFX_INLINE IfxCif_State IfxCif_getModuleState(void)
Function to query the state of the CIF module.
Definition: IfxCif.h:2677
IfxCif_IspMode_ItuRBT601
ITU-R BT.601 (YUV input with H and Vsync signals)
Definition: IfxCif.h:261
IfxCif_setIspCcirSequence
IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence)
Function to set the CCIR sequence.
Definition: IfxCif.h:2778
IfxCif_Cam_getExtraPathPictureInfo
IFX_CONST IfxCif_Cam_PictureInfo * IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path.
Definition: IfxCif_Cam.c:223
IfxCif_Cam_JfifHeader
JPEG JFIF header structure.
Definition: IfxCif_Cam.h:192
IfxCif_JpeTableId_VlcAcTable1
VLC AC Table 1.
Definition: IfxCif.h:488
IfxI2c_I2c_Config::pins
IFX_CONST IfxI2c_Pins * pins
Pins.
Definition: IfxI2c_I2c.h:331
IfxCif_JpeTableId_VlcAcTable0
VLC AC Table 0.
Definition: IfxCif.h:486
IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb
10-bit external Interface if enabled append 6 MSBs as LSBs
Definition: IfxCif.h:232
IfxCif_Cam_Status_notEnoughMemory
not enough Memory
Definition: IfxCif_Cam.h:84
IfxCif_setMiBaseAddressInitializationEnableState
IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the base address and buffer size shadow registers to the ...
Definition: IfxCif.h:2952
IfxCif_setJpeHeaderMode
IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode)
Function to set the JPE header mode.
Definition: IfxCif.h:2896
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxCif_Cam_initEmem
IFX_STATIC void IfxCif_Cam_initEmem(void)
Enables CIF and EMEM and initialises all memory to 0.
Definition: IfxCif_Cam.c:634
IFXEMEM_START_ADDR_CPU
#define IFXEMEM_START_ADDR_CPU
Definition: IfxEmem_cfg.h:48
IfxCif_epForceConfigurationUpdate
void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
Function to trigger an immediate configuration update for one extra path.
Definition: IfxCif.c:300
IfxCif_Cam_TableInfo::entry
IFX_CONST uint8 * entry
entry
Definition: IfxCif_Cam.h:100
IfxCif_Submodules_ImageSignalProcessing
Image Signal Processing submodule.
Definition: IfxCif.h:159
IfxCif_Cam_initCifIspUnit
IFX_STATIC void IfxCif_Cam_initCifIspUnit(const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:447
IfxCif_Cam_Common::mainPath
IfxCif_Cam_MemConfig mainPath
main path
Definition: IfxCif_Cam.h:168
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:87
IfxCif_LinearDownscalerScalingMode_Disabled
Disabled.
Definition: IfxCif.h:294
IfxCif_Cam_MemInfo
Single path memory interface information (used in Runtime)
Definition: IfxCif_Cam.h:152
IfxCif_JpeTableId_QTable1
Q-Table 1.
Definition: IfxCif.h:482
IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed
Main path is routed to the Memory Interface.
Definition: IfxCif.h:86
IfxCif_Cam_getBbbAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
Convert the CPU address into BBB address.
Definition: IfxCif_Cam.h:451
IfxEmem_State_enabled
EMEM module clock enabled state.
Definition: IfxEmem.h:59
IfxCif_EpFeatures_InitOffsetCounter
Init offest counter.
Definition: IfxCif.h:574
__roundf
#define __roundf
Definition: IfxCpu_IntrinsicsDcc.h:1608
IfxCif_generateMiImmediateConfigUpdateSignal
IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void)
Function to generate an immediate configuration update signal for the memory interface submodule...
Definition: IfxCif.h:2368
IfxCif_State_Disabled
Disabled state.
Definition: IfxCif.h:144
IfxCif_setMiOffsetCounterInitializationEnableState
IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be execu...
Definition: IfxCif.h:2984
IfxCif_JpeHeaderMode_JfifHeader
JFIF header.
Definition: IfxCif.h:427
IfxCif_Cam_Status_ok
ok
Definition: IfxCif_Cam.h:83
IfxCif_setIspColorSpaceMatrixCrominanceClippingRange
IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
Function to set the clipping range of the crominance of the ISP output.
Definition: IfxCif.h:2784
IfxCif_ExtraPath_2
Definition: IfxCif.h:103
IfxCif_JpeQTableSelector_Table1
Q-Table 1.
Definition: IfxCif.h:447
IfxCif_Cam_PictureInfo::hSize
uint16 hSize
horizontal (number of pixel)
Definition: IfxCif_Cam.h:120
IfxCif_setIspInterruptEnableState
void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
Function to enable or disable an interrupt.
Definition: IfxCif.c:3244
IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255
full UV range 0..255
Definition: IfxCif.h:189
IfxCif_Cam_getJpegEncodedSize
IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam)
Returns the size (in bytes) of last encoded main-path image data.
Definition: IfxCif_Cam.h:501
IfxCif_setIspisPictureSizes
IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize)
Function to set the picture size.
Definition: IfxCif.h:2877
IfxCif_Cam_initPortPins
IFX_INLINE void IfxCif_Cam_initPortPins(IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
initializes GPIO Ports for image capturing
Definition: IfxCif_Cam.c:153
IfxCif_Cam_Downscaling
Downscaler configuration.
Definition: IfxCif_Cam.h:180
IfxI2c_I2c_Device
Structure with slave device data.
Definition: IfxI2c_I2c.h:336
IfxCif_Cam_Common::ispInterrupt
Ifx_IsrSetting ispInterrupt
isp interrupt
Definition: IfxCif_Cam.h:171
IfxEmem_setTileConfigMode
IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
Sets all EMEM tiles to calibration memory mode.
Definition: IfxEmem.h:149
IfxI2c_Pins
Pin Structure.
Definition: IfxI2c.h:116
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
sint32
long sint32
Definition: Platform_Types.h:131
IfxCif_EpWriteFormat_YCbCr
YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths.
Definition: IfxCif.h:598
IfxCif_setEpInitSize
void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
Function to set the initial size of the ring buffer of one extra path.
Definition: IfxCif.c:2966
IfxCif_IspMode_RawPicture
RAW picture.
Definition: IfxCif.h:259
IfxCif_Cam_JpegTables::uv
IfxCif_Cam_JpegTable uv
uv
Definition: IfxCif_Cam.h:135
IfxI2c_I2c_initConfig
void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values.
Definition: IfxI2c_I2c.c:35
Ifx_IsrSetting::provider
uint16 provider
Definition: Ifx_Types.h:92
IfxEmem_setUnlockStandbyLockFlag
IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag)
Sets Unlock standby lock flag.
Definition: IfxEmem.h:158
IfxI2c_I2c_initDeviceConfig
void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values.
Definition: IfxI2c_I2c.c:50
IfxI2c_I2c
Handler.
Definition: IfxI2c_I2c.h:317
IfxCif_setIspSamplingEdge
IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge)
Function to set the ISP sampling edge.
Definition: IfxCif.h:2852
IfxCif_MiDataPaths_JpegData
JPEG data path.
Definition: IfxCif.h:314
IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically
encoder first generates next header and then encodes automatically the next frame ...
Definition: IfxCif.h:497
IfxEmem_getLockedState
IfxEmem_LockedState IfxEmem_getLockedState(void)
Gets the EMEM stand RAM lock state.
Definition: IfxEmem.c:36
IfxCif_JpeInterruptSources_EncodingComplete
Encoding complete.
Definition: IfxCif.h:439
IfxI2c0_SCL_P15_4_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Definition: IfxI2c_PinMap.c:30
IfxCif_setIspAcquisitionOffsets
IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset)
Function to set the ISP acquisition offsets.
Definition: IfxCif.h:2764
IfxCif_ExtraPath_1
Definition: IfxCif.h:102
IfxCif_startJpegJfifStreamEncoder
IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void)
Function to start JFIF stream encoding. Auto reset after one clock cycle.
Definition: IfxCif.h:3014
IfxCif_ExtraPath_4
Definition: IfxCif.h:105
IfxCif_setIspColorSpaceMatrixLuminanceClippingRange
IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
Function to set the clipping range of the luminance of the ISP output.
Definition: IfxCif.h:2790
IfxCif_Cam_initCif
IFX_STATIC void IfxCif_Cam_initCif(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Initialises the CIF for image capturing.
Definition: IfxCif_Cam.c:353
IfxPort_setGroupPadDriver
void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:216
IfxCif_generateIspFrameSynchronousConfigUpdateSignal
IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void)
Function to generate a frame synchronous ISP configuration update signal.
Definition: IfxCif.h:2356
IfxEmem_LockedState_locked
EMEM locked state.
Definition: IfxEmem.h:50
IfxI2c_I2c_initDevice
void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler.
Definition: IfxI2c_I2c.c:43
IfxCif_setIspOutputState
IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState)
Function to enable or disable the ISP output.
Definition: IfxCif.h:2832
IfxCif_IspInterruptSources_FrameCompletelyPutOut
Frame was Completely Put Out.
Definition: IfxCif.h:251
IfxCif_JpeTableId_QTable0
Q-Table 0.
Definition: IfxCif.h:481
IfxCif_Cam.h
CIF CAM details.
IfxCif_MiMainPicturePathComponents_Y
Y-component.
Definition: IfxCif.h:335
IfxCif_Cam_yuvMemSize
IFX_INLINE uint32 IfxCif_Cam_yuvMemSize(const IfxCif_Cam *cam)
Definition: IfxCif_Cam.c:178
IfxCif_Submodules_MemoryInterface
Memory Interface submodule.
Definition: IfxCif.h:157
IfxCif_MiInterruptSources_MainPictureFrameEnd
Picture end of frame interrupt.
Definition: IfxCif.h:328
IfxCif_Submodules_ExtraPaths
Extra Paths submodule.
Definition: IfxCif.h:154
IfxCif_setSoftwareResetMode
void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
Function to enable or disable the reset mode of a submodule.
Definition: IfxCif.c:3902
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxCif_setIspOutputWindowOffsets
IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset)
Function to set the ISP output window offsets.
Definition: IfxCif.h:2838
IfxCif_JpeQTableSelectorComponents_U
U-component.
Definition: IfxCif.h:457
IfxCif_setInternalClockMode
void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
Function to enable or disable the clock of a submodule.
Definition: IfxCif.c:3155
IfxCif_Cam_Common::jpegTables
IFX_CONST IfxCif_Cam_JpegTables * jpegTables
jpeg tables
Definition: IfxCif_Cam.h:174
IfxCif_Cam_stopCapture
void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam)
Stop capture by disabling the ISP output.
Definition: IfxCif_Cam.c:823
IfxCif_setModuleStateRequest
void IfxCif_setModuleStateRequest(IfxCif_State state)
Function to request enabling or disabling of the CIF module.
Definition: IfxCif.c:3798
IfxCif_setIspVSyncPolarity
IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity)
Function to set the polarity of the VSYNC signal.
Definition: IfxCif.h:2858
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxCif_Cam_initCifMemInterface
IFX_STATIC void IfxCif_Cam_initCifMemInterface(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:595
IfxCif_Cam_Config::ispRawBpp
uint16 ispRawBpp
bytes per pixel of the input stream
Definition: IfxCif_Cam.h:244
IfxCif_Cam_initPictInfo
IFX_INLINE void IfxCif_Cam_initPictInfo(IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
Definition: IfxCif_Cam.c:144
IfxCif_setJpegCodecImageSizes
IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize)
Function to set the JPEG codec image sizes.
Definition: IfxCif.h:2926
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCif_JpeQTableSelectorComponents_V
V-component.
Definition: IfxCif.h:458
IfxCif_Cam_initMemSize
IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize(IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:668
IfxCif_jpeGenerateHeader
IFX_INLINE void IfxCif_jpeGenerateHeader(void)
Function to start to generate JPEG stream header. Auto reset after one clock cycle.
Definition: IfxCif.h:2720
IFXEMEM_START_ADDR_CPU_CACHED
#define IFXEMEM_START_ADDR_CPU_CACHED
Definition: IfxEmem_cfg.h:46
IfxCif_Cam_initCifExtraPath
IFX_STATIC void IfxCif_Cam_initCifExtraPath(const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
Definition: IfxCif_Cam.c:401
IfxCif_setIspisOutputWindowOffsets
IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset)
Function to set the image stabilization offsets of the output window.
Definition: IfxCif.h:2870
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxCif_Cam_IspMode_raw
raw
Definition: IfxCif_Cam.h:66
IfxCif_Cam_MemInfo::start
Ifx_AddressValue start
start address
Definition: IfxCif_Cam.h:154
IfxCif_Cam::availMemSize
uint32 availMemSize
total available RAM space left (in bytes)
Definition: IfxCif_Cam.h:229
IfxCif_JpeTableId_VlcDcTable1
VLC DC Table 1.
Definition: IfxCif.h:487
IfxCif_Cam::cif
Ifx_CIF * cif
pointer to base address of CIF module SFRs
Definition: IfxCif_Cam.h:230
IfxCif_IspInputInterface_16BitExternalInterface
16-bit external Interface
Definition: IfxCif.h:238
IfxCif_setEpWriteFormat
void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
Function to set the write format for one extra path.
Definition: IfxCif.c:3074
IfxCif_Cam_getNextJpegFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam)
Returns the address location of next acquired JPEG image frame data.
Definition: IfxCif_Cam.h:559
IfxCif_Cam_MemAreas
All paths memory partitioning.
Definition: IfxCif_Cam.h:209


iLLD_TC26B: IfxCif_Cam.h Source File

  • Cif
  • Cam
IfxCif_Cam.h
Go to the documentation of this file.
1 /**
2 * \file IfxCif_Cam.h
3 * \brief CIF CAM details
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Cif_Cam CAM
25 * \ingroup IfxLld_Cif
26 * \defgroup IfxLld_Cif_Cam_camEnumerations Camera Enumerations
27 * \ingroup IfxLld_Cif_Cam
28 * \defgroup IfxLld_Cif_Cam_camFunctions Camera Functions
29 * \ingroup IfxLld_Cif_Cam
30 * \defgroup IfxLld_Cif_Cam_camStructures Camera Structures
31 * \ingroup IfxLld_Cif_Cam
32 */
33
34 #ifndef IFXCIF_CAM_H
35 #define IFXCIF_CAM_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cif/Std/IfxCif.h"
42 #include "_PinMap/IfxCif_PinMap.h"
43 #include "Emem/Std/IfxEmem.h"
44 #include "I2c/I2c/IfxI2c_I2c.h"
45 #include "string.h"
46
47 /******************************************************************************/
48 /*-----------------------------------Macros-----------------------------------*/
49 /******************************************************************************/
50
51 #define IFXCIF_CAM_MEM_ALIGN_SIZE (64)
52
53 #define IFXCIF_CAM_MEM_GAPSIZE 0x0
54
55 /******************************************************************************/
56 /*--------------------------------Enumerations--------------------------------*/
57 /******************************************************************************/
58
59 /** \addtogroup IfxLld_Cif_Cam_camEnumerations
60 * \{ */
61 /** \brief CIF ISP mode
62 */
63 typedef enum
64 {
65 IfxCif_Cam_IspMode_undefined = -1, /**< \brief undefined */
66 IfxCif_Cam_IspMode_raw = 0, /**< \brief raw */
67 IfxCif_Cam_IspMode_yuvInterleaved = 1, /**< \brief yuv interleaved */
68 IfxCif_Cam_IspMode_yuvPlanar = 2 /**< \brief yuv planar */
69 } IfxCif_Cam_IspMode;
70
71 /** \brief Driver acquisition state
72 */
73 typedef enum
74 {
75 IfxCif_Cam_State_stopped = 0, /**< \brief stopped */
76 IfxCif_Cam_State_running = 1 /**< \brief running */
77 } IfxCif_Cam_State;
78
79 /** \brief Driver status
80 */
81 typedef enum
82 {
83 IfxCif_Cam_Status_ok = 0, /**< \brief ok */
84 IfxCif_Cam_Status_notEnoughMemory = 1, /**< \brief not enough Memory */
85 IfxCif_Cam_Status_cameraCommError = 2, /**< \brief camera comm Error */
86 IfxCif_Cam_Status_notAvailable = 3 /**< \brief not available */
87 } IfxCif_Cam_Status;
88
89 /** \} */
90
91 /******************************************************************************/
92 /*-----------------------------Data Structures--------------------------------*/
93 /******************************************************************************/
94
95 /** \addtogroup IfxLld_Cif_Cam_camStructures
96 * \{ */
97 typedef struct
98 {
99 uint8 length; /**< \brief length */
100 IFX_CONST uint8 *entry; /**< \brief entry */
101 } IfxCif_Cam_TableInfo;
102
103 /** \} */
104
105 /** \addtogroup IfxLld_Cif_Cam_camStructures
106 * \{ */
107 /** \brief Single component JPEG tables
108 */
109 typedef struct
110 {
111 IfxCif_Cam_TableInfo q; /**< \brief q */
112 IfxCif_Cam_TableInfo dc; /**< \brief dc */
113 IfxCif_Cam_TableInfo ac; /**< \brief ac */
114 } IfxCif_Cam_JpegTable;
115
116 /** \brief Picture info
117 */
118 typedef struct
119 {
120 uint16 hSize; /**< \brief horizontal (number of pixel) */
121 uint16 vSize; /**< \brief vertical (number of lines) */
122 uint16 hOffset; /**< \brief horizontal offset */
123 uint16 vOffset; /**< \brief vertical offset */
124 } IfxCif_Cam_PictureInfo;
125
126 /** \} */
127
128 /** \addtogroup IfxLld_Cif_Cam_camStructures
129 * \{ */
130 /** \brief JPEG tables for all components
131 */
132 typedef struct
133 {
134 IfxCif_Cam_JpegTable y; /**< \brief y */
135 IfxCif_Cam_JpegTable uv; /**< \brief uv */
136 } IfxCif_Cam_JpegTables;
137
138 /** \brief Single path memory interface configuration (used in initialisation/configuration)
139 */
140 typedef struct
141 {
142 float32 memFactor; /**< \brief multiples of frame count for memory allocation */
143 uint16 hSize; /**< \brief horizontal (number of pixel) */
144 uint16 vSize; /**< \brief vertical (number of lines) */
145 uint16 hOffset; /**< \brief horizontal offset */
146 uint16 vOffset; /**< \brief vertical offset */
147 boolean byteSwap; /**< \brief byte swapping */
148 } IfxCif_Cam_MemConfig;
149
150 /** \brief Single path memory interface information (used in Runtime)
151 */
152 typedef struct
153 {
154 Ifx_AddressValue start; /**< \brief start address */
155 uint32 size; /**< \brief size in bytes */
156 IfxCif_Cam_PictureInfo image; /**< \brief image */
157 } IfxCif_Cam_MemInfo;
158
159 /** \} */
160
161 /** \addtogroup IfxLld_Cif_Cam_camStructures
162 * \{ */
163 /** \brief Common configuration
164 */
165 typedef struct
166 {
167 IfxCif_Cam_PictureInfo ispIn; /**< \brief ispIn */
168 IfxCif_Cam_MemConfig mainPath; /**< \brief main path */
169 IfxCif_Cam_MemConfig extraPaths[IFXCIF_EXTRA_PATHS]; /**< \brief extra paths */
170 IfxCif_InputInterface inputInterface; /**< \brief input interface */
171 Ifx_IsrSetting ispInterrupt; /**< \brief isp interrupt */
172 boolean debugPathEnabled; /**< \brief debug path enabled */
173 boolean watchdogEnabled; /**< \brief watchdog enabled */
174 IFX_CONST IfxCif_Cam_JpegTables *jpegTables; /**< \brief jpeg tables */
175 boolean jpegEnabled; /**< \brief jpeg enabled */
176 } IfxCif_Cam_Common;
177
178 /** \brief Downscaler configuration
179 */
180 typedef struct
181 {
182 boolean enabled; /**< \brief enable */
183 IfxCif_LinearDownscalerScalingMode hMode; /**< \brief hMode */
184 IfxCif_LinearDownscalerScalingMode vMode; /**< \brief vMode */
185 uint8 hFactor; /**< \brief horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors() */
186 uint8 vFactor; /**< \brief vertical factor to program into IfxCif_setLinearDownscalerScalingFactors() */
187 uint8 sizeFactor; /**< \brief memory size factor, e.g. half in both H and V usually gives factor of 4 */
188 } IfxCif_Cam_Downscaling;
189
190 /** \brief JPEG JFIF header structure
191 */
192 typedef struct
193 {
194 uint16 unknown; /**< \brief unknown */
195 uint16 app0; /**< \brief app0 */
196 uint16 length; /**< \brief length */
197 uint8 ident[5]; /**< \brief ident */
198 uint16 version; /**< \brief version */
199 uint8 density; /**< \brief density */
200 uint16 densityX; /**< \brief densityX */
201 uint16 densityY; /**< \brief densityY */
202 uint8 thumbX; /**< \brief thumbX */
203 uint8 thumbY; /**< \brief thumbY */
204 uint8 thumbData[20]; /**< \brief thumbData */
205 } IfxCif_Cam_JfifHeader;
206
207 /** \brief All paths memory partitioning
208 */
209 typedef struct
210 {
211 IfxCif_Cam_MemInfo y; /**< \brief y */
212 IfxCif_Cam_MemInfo cb; /**< \brief cb */
213 IfxCif_Cam_MemInfo cr; /**< \brief cr */
214 IfxCif_Cam_MemInfo ep[IFXCIF_EXTRA_PATHS]; /**< \brief ep */
215 } IfxCif_Cam_MemAreas;
216
217 /** \} */
218
219 /** \addtogroup IfxLld_Cif_Cam_camStructures
220 * \{ */
221 /** \brief Structure which is used as handle for the CIF-CAM functions.
222 * This stores cached variables useful for run-time operations.
223 */
224 typedef struct
225 {
226 IfxCif_Cam_MemAreas memAreas; /**< \brief memory area definition */
227 uint32 totalMemSize; /**< \brief total occupied memory area (in bytes) */
228 Ifx_AddressValue nextFreeAddress; /**< \brief next free storage address */
229 uint32 availMemSize; /**< \brief total available RAM space left (in bytes) */
230 Ifx_CIF *cif; /**< \brief pointer to base address of CIF module SFRs */
231 Ifx_EMEM *emem; /**< \brief pointer to base address of EMEM module SFRs */
232 IfxCif_Cam_JfifHeader *jfif; /**< \brief pointer to the last acquired JPEG header */
233 IfxCif_Cam_Status configResult; /**< \brief status of last configuration (or initialisation) */
234 IfxCif_Cam_IspMode ispMode; /**< \brief actual ISP mode */
235 boolean ispBpp; /**< \brief byte per pixel */
236 } IfxCif_Cam;
237
238 /** \brief Camera specific configuration
239 */
240 typedef struct
241 {
242 IFX_CONST IfxCif_Cam_Common *common; /**< \brief pointer to common configuration */
243 IfxCif_Cam_IspMode ispMode; /**< \brief ISP mode */
244 uint16 ispRawBpp; /**< \brief bytes per pixel of the input stream */
245 IfxCif_IspSyncPolarity hSyncPolarity; /**< \brief polarity of HSYNC signal */
246 IfxCif_IspSyncPolarity vSyncPolarity; /**< \brief polarity of VSYNC signal */
247 IfxCif_IspSamplingEdge samplingEdge; /**< \brief sampling edge */
248 uint16 setupDataCount; /**< \brief number of camera-specific configuration data (in DWORDS) */
249 IFX_CONST uint32 *setupDataTable; /**< \brief pointer to the first entry of camera-specific configuration data */
250 IFX_CONST IfxCif_Cam_Downscaling *downscaling; /**< \brief downscaling settings for ExtraPath 1 */
251 } IfxCif_Cam_Config;
252
253 /** \} */
254
255 /** \addtogroup IfxLld_Cif_Cam_camFunctions
256 * \{ */
257
258 /******************************************************************************/
259 /*-------------------------Inline Function Prototypes-------------------------*/
260 /******************************************************************************/
261
262 /** \brief Clear the frame reception flag
263 * \param cam cam handle
264 * \return None
265 */
266 IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag(const IfxCif_Cam *cam);
267
268 /** \brief Clear the JPEG encoder completed flag
269 * \param cam cam handle
270 * \return None
271 */
272 IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam);
273
274 /** \brief Convert the CPU address into BBB address
275 * \param cam cam handle
276 * \param cpuAddress Address value
277 */
278 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress);
279
280 /** \brief Returns the size (in bytes) of one last acquired extra-path image data
281 * \param cam cam handle
282 * \param z Extra path
283 */
284 IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
285
286 /**
287 * \param cam cam handle
288 * \param z Extra path
289 */
290 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getExtraPathMemInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
291
292 /** \brief Returns the size (in bytes) of last acquired main-path image data
293 * \param cam cam handle
294 */
295 IFX_INLINE uint32 IfxCif_Cam_getFrameSize(const IfxCif_Cam *cam);
296
297 /** \brief Returns the size (in bytes) of last encoded main-path image data
298 * \param cam cam handle
299 */
300 IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam);
301
302 /** \brief Returns the address location of last acquired extra-path image frame data
303 * \param cam cam handle
304 * \param z Extra path
305 */
306 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
307
308 /**
309 * \param cam cam handle
310 * \param z Extra path
311 * \param address Address Value
312 * \param size const IfxCif_Cam_MemInfo *m;
313 * *size = IfxCif_Cam_getExtraFrameSize(cam, z);
314 * *address = IfxCif_Cam_getLastExtraAddress(cam, z);
315 * m = IfxCif_Cam_getExtraPathMemInfo(cam, z);
316 * return m;
317 */
318 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastExtraCaptureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size);
319
320 /** \brief Returns the address location of last acquired main-path image frame data
321 * \param cam cam handle
322 * \return address location of last acquired main-path image frame data
323 */
324 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam);
325
326 /**
327 * \param cam cam handle
328 * \param address Address value
329 * \param size Size
330 */
331 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastFrameCaptureInfo(const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size);
332
333 /** \brief Returns the address location of next acquired main-path image frame data
334 * \param cam cam handle
335 */
336 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress(const IfxCif_Cam *cam);
337
338 /** \brief Returns the address location of next acquired JPEG image frame data
339 * \param cam cam handle
340 */
341 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam);
342
343 /** \brief Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size
344 * \param cam cam handle
345 * \param address Address value
346 */
347 IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress(const IfxCif_Cam *cam, Ifx_AddressValue address);
348
349 /** \brief Returns TRUE if JPEG encoding is completed
350 * \param cam cam handle
351 * \return TRUE if one frame reception is completed
352 */
353 IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete(const IfxCif_Cam *cam);
354
355 /** \brief
356 * \param cam cam handle
357 * \return TRUE if JPEG encoding is completed
358 */
359 IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam);
360
361 /**
362 * \param cam cam handle
363 * \return None
364 */
365 IFX_INLINE void IfxCif_Cam_skipPicture(const IfxCif_Cam *cam);
366
367 /******************************************************************************/
368 /*-------------------------Global Function Prototypes-------------------------*/
369 /******************************************************************************/
370
371 /** \brief Clear all CIF module notification flags
372 * \param cam cam handle
373 * \return None
374 */
375 IFX_EXTERN void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam);
376
377 /** \brief Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path.
378 * \param cam cam handle
379 * \return None
380 */
381 IFX_EXTERN void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam);
382
383 /** \brief Enable the JPEG encoder and route the acquisition path accordingly
384 * \param cam cam handle
385 * \return None
386 */
387 IFX_EXTERN void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam);
388
389 /** \brief Returns pointer to the variable storing picture info of an extra-path
390 * \param cam cam handle
391 * \param z Extra Path
392 * \return pointer to the variable storing picture info of an extra-path
393 */
394 IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo *IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
395
396 /** \brief Returns pointer to the memory structure storing last JPEG encoding process
397 * \param cam cam handle
398 * \param address EMEM address which stores the JPEG frame
399 * \param size size of JPEG frame
400 * \return TRUE if there was new frame encoded, else FALSE
401 */
402 IFX_EXTERN boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size);
403
404 /** \brief Initialise the CIF, EMEM, PORT, I2C and the camera itself
405 * \param cam cam handel
406 * \param config configurations structure
407 * \param initCam if TRUE camera will be reconfigured, else camera will not be reconfigured.
408 */
409 IFX_EXTERN IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam);
410
411 /** \brief Restart capture by enabling the ISP output
412 * \param cam cam handle
413 * \param frames Number of acquisitions. Set to zero for continuous acquisition
414 * \return None
415 */
416 IFX_EXTERN void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames);
417
418 /** \brief Start capture by enabling the ISP output and initialising the MI counter
419 * \param cam cam handle
420 * \param frames Number of acquisitions. Set to zero for continuous acquisition
421 * \return None
422 */
423 IFX_EXTERN void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames);
424
425 /** \brief Stop capture by disabling the ISP output
426 * \param cam cam handle
427 * \return None
428 */
429 IFX_EXTERN void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam);
430
431 /** \} */
432
433 /******************************************************************************/
434 /*---------------------Inline Function Implementations------------------------*/
435 /******************************************************************************/
436
437 IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag(const IfxCif_Cam *cam)
438 {
439 (void)cam;
440 MODULE_CIF.ISP.ICR.U = (IFX_CIF_ISP_ICR_ICR_FRAME_MSK << IFX_CIF_ISP_ICR_ICR_FRAME_OFF);
441 }
442
443
444 IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam)
445 {
446 (void)cam;
447 MODULE_CIF.JPE.STATUS_ICR.U = (IFX_CIF_JPE_STATUS_ICR_ENCODE_DONE_MSK << IFX_CIF_JPE_STATUS_ICR_ENCODE_DONE_OFF);
448 }
449
450
451 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
452 {
453 (void)cam;
454
455 return (Ifx_AddressValue)(((uint32)cpuAddress & 0x00FFFFFFU) + IFXEMEM_START_ADDR_BBB);
456 }
457
458
459 IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
460 {
461 sint32 size = 0;
462
463 if (z <= IfxCif_ExtraPath_5)
464 {
465 size = cam->memAreas.ep[z].image.hSize * cam->memAreas.ep[z].image.vSize;
466
467 if ((cam->ispMode != IfxCif_Cam_IspMode_raw) || (cam->ispBpp > 1))
468 {
469 size = size * 2;
470 }
471 }
472 else
473 {
474 IFXCIF_DEBUG;
475 }
476
477 return (uint32)size;
478 }
479
480
481 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getExtraPathMemInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
482 {
483 return &(cam->memAreas.ep[z]);
484 }
485
486
487 IFX_INLINE uint32 IfxCif_Cam_getFrameSize(const IfxCif_Cam *cam)
488 {
489 (void)cam;
490 sint32 size = MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.U - MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U;
491
492 if (size <= 0)
493 {
494 size += MODULE_CIF.MI.MP_Y_SIZE_INIT.U;
495 }
496
497 return (uint32)size;
498 }
499
500
501 IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam)
502 {
503 (void)cam;
504
505 /* 0x240 is size of JFIF header. */
506 return 0x240 + IfxCif_Cam_getFrameSize(cam);
507 }
508
509
510 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
511 {
512 Ifx_AddressValue address = 0;
513
514 if (z <= IfxCif_ExtraPath_5)
515 {
516 address = (Ifx_AddressValue)((uint32)cam->memAreas.ep[z].start + MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U);
517 }
518
519 return address;
520 }
521
522
523 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastExtraCaptureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
524 {
525 const IfxCif_Cam_MemInfo *m;
526 *size = IfxCif_Cam_getExtraFrameSize(cam, z);
527 *address = IfxCif_Cam_getLastExtraAddress(cam, z);
528 m = IfxCif_Cam_getExtraPathMemInfo(cam, z);
529 return m;
530 }
531
532
533 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam)
534 {
535 (void)cam;
536
537 return (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U);
538 }
539
540
541 IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastFrameCaptureInfo(const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
542 {
543 const IfxCif_Cam_MemInfo *m;
544 *size = IfxCif_Cam_getFrameSize(cam);
545 *address = IfxCif_Cam_getLastFrameAddress(cam);
546 m = &(cam->memAreas.y);
547 return m;
548 }
549
550
551 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress(const IfxCif_Cam *cam)
552 {
553 (void)cam;
554
555 return (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.U);
556 }
557
558
559 IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam)
560 {
561 Ifx_AddressValue address = IfxCif_Cam_getNextFrameAddress(cam);
562 cam->jfif = (IfxCif_Cam_JfifHeader *)address; /* note: no cast to (void *) to satisfy C++ compilers */
563 return address;
564 }
565
566
567 IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress(const IfxCif_Cam *cam, Ifx_AddressValue address)
568 {
569 address = (Ifx_AddressValue)((uint32)address + 4U);
570
571 if ((uint32)address >= (IFXEMEM_START_ADDR_CPU_CACHED + cam->memAreas.y.size))
572 { /* back to base */
573 address = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
574 }
575
576 return address;
577 }
578
579
580 IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete(const IfxCif_Cam *cam)
581 {
582 (void)cam;
583
584 return MODULE_CIF.ISP.RIS.B.RIS_FRAME != 0;
585 }
586
587
588 IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam)
589 {
590 (void)cam;
591
592 return MODULE_CIF.JPE.STATUS_RIS.B.ENCODE_DONE != 0;
593 }
594
595
596 IFX_INLINE void IfxCif_Cam_skipPicture(const IfxCif_Cam *cam)
597 {
598 (void)cam;
599 IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State_Disabled);
600 IfxCif_miSkipPicture();
601 }
602
603
604 #endif /* IFXCIF_CAM_H */
IfxCif_Cam_Status_cameraCommError
camera comm Error
Definition: IfxCif_Cam.h:85
IFXCIF_DEBUG
#define IFXCIF_DEBUG
Definition: IfxCif_cfg.h:46
IfxCif_Cam_Config
Camera specific configuration.
Definition: IfxCif_Cam.h:240
IfxCif_Cam_Config::setupDataTable
IFX_CONST uint32 * setupDataTable
pointer to the first entry of camera-specific configuration data
Definition: IfxCif_Cam.h:249
IfxCif_Cam_State
IfxCif_Cam_State
Driver acquisition state.
Definition: IfxCif_Cam.h:73
IfxCif.h
CIF basic functionality.
IfxCif_Cam_PictureInfo::hOffset
uint16 hOffset
horizontal offset
Definition: IfxCif_Cam.h:122
IfxCif_Cam_skipPicture
IFX_INLINE void IfxCif_Cam_skipPicture(const IfxCif_Cam *cam)
Definition: IfxCif_Cam.h:596
IfxCif_Cam_IspMode_yuvInterleaved
yuv interleaved
Definition: IfxCif_Cam.h:67
IfxCif_Cam_getExtraFrameSize
IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the size (in bytes) of one last acquired extra-path image data.
Definition: IfxCif_Cam.h:459
IfxCif_Cam_enableJpegEncoder
IFX_EXTERN void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam)
Enable the JPEG encoder and route the acquisition path accordingly.
Definition: IfxCif_Cam.c:213
IfxCif_Cam::memAreas
IfxCif_Cam_MemAreas memAreas
memory area definition
Definition: IfxCif_Cam.h:226
IfxCif_Cam_Config::hSyncPolarity
IfxCif_IspSyncPolarity hSyncPolarity
polarity of HSYNC signal
Definition: IfxCif_Cam.h:245
IfxCif_Cam::configResult
IfxCif_Cam_Status configResult
status of last configuration (or initialisation)
Definition: IfxCif_Cam.h:233
IfxCif_Cam_MemAreas::ep
IfxCif_Cam_MemInfo ep[IFXCIF_EXTRA_PATHS]
ep
Definition: IfxCif_Cam.h:214
IfxCif_Cam_MemInfo::size
uint32 size
size in bytes
Definition: IfxCif_Cam.h:155
IfxCif_Cam::nextFreeAddress
Ifx_AddressValue nextFreeAddress
next free storage address
Definition: IfxCif_Cam.h:228
IfxCif_Cam_getExtraPathMemInfo
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getExtraPathMemInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Definition: IfxCif_Cam.h:481
IfxCif_Cam_JpegTable::q
IfxCif_Cam_TableInfo q
q
Definition: IfxCif_Cam.h:111
IfxCif_Cam_PictureInfo::vOffset
uint16 vOffset
vertical offset
Definition: IfxCif_Cam.h:123
IfxCif_Cam_MemAreas::cb
IfxCif_Cam_MemInfo cb
cb
Definition: IfxCif_Cam.h:212
IfxCif_miSkipPicture
IFX_INLINE void IfxCif_miSkipPicture(void)
Function to skip the current or next starting main data path picture.
Definition: IfxCif.h:2726
IfxCif_Cam_clearJpegEncodingCompleteFlag
IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam)
Clear the JPEG encoder completed flag.
Definition: IfxCif_Cam.h:444
IfxCif_Cam_Downscaling::hMode
IfxCif_LinearDownscalerScalingMode hMode
hMode
Definition: IfxCif_Cam.h:183
IfxCif_Cam_PictureInfo
Picture info.
Definition: IfxCif_Cam.h:118
IfxCif_Cam_Config::setupDataCount
uint16 setupDataCount
number of camera-specific configuration data (in DWORDS)
Definition: IfxCif_Cam.h:248
IfxCif_Cam_Downscaling::vMode
IfxCif_LinearDownscalerScalingMode vMode
vMode
Definition: IfxCif_Cam.h:184
IfxCif_Cam_TableInfo::length
uint8 length
length
Definition: IfxCif_Cam.h:99
IfxCif_IspSamplingEdge
IfxCif_IspSamplingEdge
Enumerator for ISP sampling edge.
Definition: IfxCif.h:268
IfxCif_Cam_getLastExtraAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns the address location of last acquired extra-path image frame data.
Definition: IfxCif_Cam.h:510
IfxCif_Cam_MemAreas::cr
IfxCif_Cam_MemInfo cr
cr
Definition: IfxCif_Cam.h:213
IfxCif_Cam_init
IFX_EXTERN IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
Initialise the CIF, EMEM, PORT, I2C and the camera itself.
Definition: IfxCif_Cam.c:261
IfxCif_Cam_Config::samplingEdge
IfxCif_IspSamplingEdge samplingEdge
sampling edge
Definition: IfxCif_Cam.h:247
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCif_Cam_Downscaling::vFactor
uint8 vFactor
vertical factor to program into IfxCif_setLinearDownscalerScalingFactors()
Definition: IfxCif_Cam.h:186
IfxCif_Cam_JpegTable
Single component JPEG tables.
Definition: IfxCif_Cam.h:109
float32
float float32
Definition: Platform_Types.h:167
IfxCif_Cam::ispMode
IfxCif_Cam_IspMode ispMode
actual ISP mode
Definition: IfxCif_Cam.h:234
IfxCif_Cam_JfifHeader::length
uint16 length
length
Definition: IfxCif_Cam.h:196
IfxCif_Cam_startCapture
IFX_EXTERN void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames)
Start capture by enabling the ISP output and initialising the MI counter.
Definition: IfxCif_Cam.c:811
IfxCif_Cam_Config::vSyncPolarity
IfxCif_IspSyncPolarity vSyncPolarity
polarity of VSYNC signal
Definition: IfxCif_Cam.h:246
IfxCif_Cam_Downscaling::sizeFactor
uint8 sizeFactor
memory size factor, e.g. half in both H and V usually gives factor of 4
Definition: IfxCif_Cam.h:187
IfxCif_Cam_JfifHeader::app0
uint16 app0
app0
Definition: IfxCif_Cam.h:195
IfxCif_Cam_JpegTables::y
IfxCif_Cam_JpegTable y
y
Definition: IfxCif_Cam.h:134
IfxCif_PinMap.h
CIF I/O map.
IfxCif_Cam_getNextFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress(const IfxCif_Cam *cam)
Returns the address location of next acquired main-path image frame data.
Definition: IfxCif_Cam.h:551
IfxCif_InputInterface
IfxCif_InputInterface
Enumerator for input interfaces supported by the CIF interface.
Definition: IfxCif.h:119
IfxCif_Cam::totalMemSize
uint32 totalMemSize
total occupied memory area (in bytes)
Definition: IfxCif_Cam.h:227
IfxCif_Cam_disableJpegEncoder
IFX_EXTERN void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam)
Disable the JPEG encoder and route the acquisition path accordingly to the &#39;original&#39; configuration...
Definition: IfxCif_Cam.c:197
IfxCif_Cam_clearAllFlags
IFX_EXTERN void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam)
Clear all CIF module notification flags.
Definition: IfxCif_Cam.c:188
IFXCIF_EXTRA_PATHS
#define IFXCIF_EXTRA_PATHS
Number of extra phats.
Definition: IfxCif_cfg.h:51
IfxCif_Cam::jfif
IfxCif_Cam_JfifHeader * jfif
pointer to the last acquired JPEG header
Definition: IfxCif_Cam.h:232
IfxCif_Cam_PictureInfo::vSize
uint16 vSize
vertical (number of lines)
Definition: IfxCif_Cam.h:121
IfxCif_Cam_isJpegEncodingComplete
IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam)
Definition: IfxCif_Cam.h:588
IfxCif_Cam_getLastFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam)
Returns the address location of last acquired main-path image frame data.
Definition: IfxCif_Cam.h:533
IfxCif_Cam_MemConfig::byteSwap
boolean byteSwap
byte swapping
Definition: IfxCif_Cam.h:147
IfxCif_ExtraPath_5
Definition: IfxCif.h:106
IfxCif_Cam_JfifHeader::unknown
uint16 unknown
unknown
Definition: IfxCif_Cam.h:194
IfxCif_Cam
Structure which is used as handle for the CIF-CAM functions. This stores cached variables useful for ...
Definition: IfxCif_Cam.h:224
IfxCif_Cam_Common::watchdogEnabled
boolean watchdogEnabled
watchdog enabled
Definition: IfxCif_Cam.h:173
IfxCif_Cam_Config::common
IFX_CONST IfxCif_Cam_Common * common
pointer to common configuration
Definition: IfxCif_Cam.h:242
IfxCif_Cam_MemInfo::image
IfxCif_Cam_PictureInfo image
image
Definition: IfxCif_Cam.h:156
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCif_Cam_Downscaling::hFactor
uint8 hFactor
horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors()
Definition: IfxCif_Cam.h:185
IfxCif_Cam_JfifHeader::densityY
uint16 densityY
densityY
Definition: IfxCif_Cam.h:201
Ifx_IsrSetting
Definition: Ifx_Types.h:89
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCif_Cam_Common::jpegEnabled
boolean jpegEnabled
jpeg enabled
Definition: IfxCif_Cam.h:175
IfxCif_Cam::emem
Ifx_EMEM * emem
pointer to base address of EMEM module SFRs
Definition: IfxCif_Cam.h:231
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCif_Cam_IspMode_yuvPlanar
yuv planar
Definition: IfxCif_Cam.h:68
IfxCif_Cam_Status
IfxCif_Cam_Status
Driver status.
Definition: IfxCif_Cam.h:81
IfxCif_Cam_MemConfig::memFactor
float32 memFactor
multiples of frame count for memory allocation
Definition: IfxCif_Cam.h:142
IfxCif_Cam_JpegTables
JPEG tables for all components.
Definition: IfxCif_Cam.h:132
IfxCif_Cam_restartCapture
IFX_EXTERN void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames)
Restart capture by enabling the ISP output.
Definition: IfxCif_Cam.c:802
IfxCif_Cam_State_stopped
stopped
Definition: IfxCif_Cam.h:75
IFXEMEM_START_ADDR_BBB
#define IFXEMEM_START_ADDR_BBB
Definition: IfxEmem_cfg.h:50
IfxCif_LinearDownscalerScalingMode
IfxCif_LinearDownscalerScalingMode
Enumerator for scaling mode of linear downscaler.
Definition: IfxCif.h:288
IfxCif_Cam_getLastJpegEncodingInfo
IFX_EXTERN boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
Returns pointer to the memory structure storing last JPEG encoding process.
Definition: IfxCif_Cam.c:236
IfxCif_Cam_IspMode
IfxCif_Cam_IspMode
CIF ISP mode.
Definition: IfxCif_Cam.h:63
IfxCif_Cam_JpegTable::ac
IfxCif_Cam_TableInfo ac
ac
Definition: IfxCif_Cam.h:113
IfxCif_Cam_TableInfo
Definition: IfxCif_Cam.h:97
IfxCif_Cam_Common
Common configuration.
Definition: IfxCif_Cam.h:165
IfxCif_Cam_JpegTable::dc
IfxCif_Cam_TableInfo dc
dc
Definition: IfxCif_Cam.h:112
IfxCif_Cam_Downscaling::enabled
boolean enabled
enable
Definition: IfxCif_Cam.h:182
IfxCif_Cam_IspMode_undefined
undefined
Definition: IfxCif_Cam.h:65
IfxCif_Cam_Common::ispIn
IfxCif_Cam_PictureInfo ispIn
ispIn
Definition: IfxCif_Cam.h:167
IfxCif_Cam_Status_notAvailable
not available
Definition: IfxCif_Cam.h:86
IfxCif_Cam_MemAreas::y
IfxCif_Cam_MemInfo y
y
Definition: IfxCif_Cam.h:211
IfxCif_Cam_getLastFrameCaptureInfo
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getLastFrameCaptureInfo(const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
Definition: IfxCif_Cam.h:541
IfxCif_Cam_Config::downscaling
IFX_CONST IfxCif_Cam_Downscaling * downscaling
downscaling settings for ExtraPath 1
Definition: IfxCif_Cam.h:250
IfxCif_Cam_MemConfig
Single path memory interface configuration (used in initialisation/configuration) ...
Definition: IfxCif_Cam.h:140
IfxCif_Cam::ispBpp
boolean ispBpp
byte per pixel
Definition: IfxCif_Cam.h:235
IfxCif_ExtraPath
IfxCif_ExtraPath
Enumerator for the extra paths.
Definition: IfxCif.h:100
IfxCif_Cam_getExtraPathPictureInfo
IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo * IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
Returns pointer to the variable storing picture info of an extra-path.
Definition: IfxCif_Cam.c:223
IfxCif_Cam_JfifHeader
JPEG JFIF header structure.
Definition: IfxCif_Cam.h:192
IfxCif_Cam_incrementAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress(const IfxCif_Cam *cam, Ifx_AddressValue address)
Increment the address related to memory interface of for main-path. The address is wrapped around at ...
Definition: IfxCif_Cam.h:567
IfxCif_Cam_getLastExtraCaptureInfo
IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo * IfxCif_Cam_getLastExtraCaptureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
Definition: IfxCif_Cam.h:523
IfxCif_Cam_Status_notEnoughMemory
not enough Memory
Definition: IfxCif_Cam.h:84
IfxCif_Cam_TableInfo::entry
IFX_CONST uint8 * entry
entry
Definition: IfxCif_Cam.h:100
IfxCif_Cam_Common::mainPath
IfxCif_Cam_MemConfig mainPath
main path
Definition: IfxCif_Cam.h:168
Ifx_AddressValue
pvoid Ifx_AddressValue
Used in address values.
Definition: Ifx_Types.h:87
IfxCif_Cam_MemInfo
Single path memory interface information (used in Runtime)
Definition: IfxCif_Cam.h:152
IfxCif_Cam_getBbbAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
Convert the CPU address into BBB address.
Definition: IfxCif_Cam.h:451
IfxCif_Cam_JfifHeader::density
uint8 density
density
Definition: IfxCif_Cam.h:199
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCif_State_Disabled
Disabled state.
Definition: IfxCif.h:144
IfxCif_setMiOffsetCounterInitializationEnableState
IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
Function to enable or disable the update of the offset counter shadow registers (update will be execu...
Definition: IfxCif.h:2984
IfxCif_Cam_Status_ok
ok
Definition: IfxCif_Cam.h:83
IfxCif_Cam_PictureInfo::hSize
uint16 hSize
horizontal (number of pixel)
Definition: IfxCif_Cam.h:120
IfxCif_Cam_clearFrameReceptionFlag
IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag(const IfxCif_Cam *cam)
Clear the frame reception flag.
Definition: IfxCif_Cam.h:437
IfxCif_Cam_JfifHeader::thumbX
uint8 thumbX
thumbX
Definition: IfxCif_Cam.h:202
IfxCif_Cam_getJpegEncodedSize
IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam)
Returns the size (in bytes) of last encoded main-path image data.
Definition: IfxCif_Cam.h:501
IfxCif_Cam_Downscaling
Downscaler configuration.
Definition: IfxCif_Cam.h:180
IfxCif_Cam_Common::ispInterrupt
Ifx_IsrSetting ispInterrupt
isp interrupt
Definition: IfxCif_Cam.h:171
IfxCif_Cam_isFrameReceptionComplete
IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete(const IfxCif_Cam *cam)
Returns TRUE if JPEG encoding is completed.
Definition: IfxCif_Cam.h:580
sint32
long sint32
Definition: Platform_Types.h:131
IfxI2c_I2c.h
I2C I2C details.
IfxCif_Cam_JpegTables::uv
IfxCif_Cam_JpegTable uv
uv
Definition: IfxCif_Cam.h:135
IfxCif_Cam_Common::inputInterface
IfxCif_InputInterface inputInterface
input interface
Definition: IfxCif_Cam.h:170
IfxCif_Cam_JfifHeader::version
uint16 version
version
Definition: IfxCif_Cam.h:198
IfxEmem.h
EMEM basic functionality.
IfxCif_Cam_Common::debugPathEnabled
boolean debugPathEnabled
debug path enabled
Definition: IfxCif_Cam.h:172
IfxCif_Cam_JfifHeader::densityX
uint16 densityX
densityX
Definition: IfxCif_Cam.h:200
IfxCif_Cam_Common::jpegTables
IFX_CONST IfxCif_Cam_JpegTables * jpegTables
jpeg tables
Definition: IfxCif_Cam.h:174
IfxCif_Cam_stopCapture
IFX_EXTERN void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam)
Stop capture by disabling the ISP output.
Definition: IfxCif_Cam.c:823
IfxCif_Cam_Config::ispRawBpp
uint16 ispRawBpp
bytes per pixel of the input stream
Definition: IfxCif_Cam.h:244
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IFXEMEM_START_ADDR_CPU_CACHED
#define IFXEMEM_START_ADDR_CPU_CACHED
Definition: IfxEmem_cfg.h:46
IfxCif_Cam_State_running
running
Definition: IfxCif_Cam.h:76
IfxCif_Cam_IspMode_raw
raw
Definition: IfxCif_Cam.h:66
IfxCif_Cam_MemInfo::start
Ifx_AddressValue start
start address
Definition: IfxCif_Cam.h:154
IfxCif_Cam::availMemSize
uint32 availMemSize
total available RAM space left (in bytes)
Definition: IfxCif_Cam.h:229
IfxCif_IspSyncPolarity
IfxCif_IspSyncPolarity
Definition: IfxCif.h:276
IfxCif_Cam::cif
Ifx_CIF * cif
pointer to base address of CIF module SFRs
Definition: IfxCif_Cam.h:230
IfxCif_Cam_JfifHeader::thumbY
uint8 thumbY
thumbY
Definition: IfxCif_Cam.h:203
IfxCif_Cam_getFrameSize
IFX_INLINE uint32 IfxCif_Cam_getFrameSize(const IfxCif_Cam *cam)
Returns the size (in bytes) of last acquired main-path image data.
Definition: IfxCif_Cam.h:487
IfxCif_Cam_getNextJpegFrameAddress
IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam)
Returns the address location of next acquired JPEG image frame data.
Definition: IfxCif_Cam.h:559
IfxCif_Cam_MemAreas
All paths memory partitioning.
Definition: IfxCif_Cam.h:209


iLLD_TC26B: IfxCif_PinMap.c Source File

  • _PinMap
IfxCif_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCif_PinMap.c
3 * \brief CIF I/O map
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxCif_PinMap.h"
27
28 IfxCif_Clk_In IfxCif_CLK_P00_7_IN = {&MODULE_CIF, {&MODULE_P00, 7}};
29 IfxCif_D_In IfxCif_D0_P02_0_IN = {&MODULE_CIF, {&MODULE_P02, 0}};
30 IfxCif_D_In IfxCif_D10_P00_1_IN = {&MODULE_CIF, {&MODULE_P00, 1}};
31 IfxCif_D_In IfxCif_D11_P00_2_IN = {&MODULE_CIF, {&MODULE_P00, 2}};
32 IfxCif_D_In IfxCif_D12_P00_3_IN = {&MODULE_CIF, {&MODULE_P00, 3}};
33 IfxCif_D_In IfxCif_D13_P00_4_IN = {&MODULE_CIF, {&MODULE_P00, 4}};
34 IfxCif_D_In IfxCif_D14_P00_5_IN = {&MODULE_CIF, {&MODULE_P00, 5}};
35 IfxCif_D_In IfxCif_D15_P00_6_IN = {&MODULE_CIF, {&MODULE_P00, 6}};
36 IfxCif_D_In IfxCif_D1_P02_1_IN = {&MODULE_CIF, {&MODULE_P02, 1}};
37 IfxCif_D_In IfxCif_D2_P02_2_IN = {&MODULE_CIF, {&MODULE_P02, 2}};
38 IfxCif_D_In IfxCif_D3_P02_3_IN = {&MODULE_CIF, {&MODULE_P02, 3}};
39 IfxCif_D_In IfxCif_D4_P02_4_IN = {&MODULE_CIF, {&MODULE_P02, 4}};
40 IfxCif_D_In IfxCif_D5_P02_5_IN = {&MODULE_CIF, {&MODULE_P02, 5}};
41 IfxCif_D_In IfxCif_D6_P02_6_IN = {&MODULE_CIF, {&MODULE_P02, 6}};
42 IfxCif_D_In IfxCif_D7_P02_7_IN = {&MODULE_CIF, {&MODULE_P02, 7}};
43 IfxCif_D_In IfxCif_D8_P02_8_IN = {&MODULE_CIF, {&MODULE_P02, 8}};
44 IfxCif_D_In IfxCif_D9_P00_0_IN = {&MODULE_CIF, {&MODULE_P00, 0}};
45 IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN = {&MODULE_CIF, {&MODULE_P00, 9}};
46 IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN = {&MODULE_CIF, {&MODULE_P00, 8}};
IfxCif_Hsnc_In
HSNC pin mapping structure.
Definition: IfxCif_PinMap.h:53
IfxCif_D11_P00_2_IN
IfxCif_D_In IfxCif_D11_P00_2_IN
Definition: IfxCif_PinMap.c:31
IfxCif_D9_P00_0_IN
IfxCif_D_In IfxCif_D9_P00_0_IN
Definition: IfxCif_PinMap.c:44
IfxCif_PinMap.h
CIF I/O map.
IfxCif_D7_P02_7_IN
IfxCif_D_In IfxCif_D7_P02_7_IN
Definition: IfxCif_PinMap.c:42
IfxCif_D8_P02_8_IN
IfxCif_D_In IfxCif_D8_P02_8_IN
Definition: IfxCif_PinMap.c:43
IfxCif_D_In
D pin mapping structure.
Definition: IfxCif_PinMap.h:46
IfxCif_D1_P02_1_IN
IfxCif_D_In IfxCif_D1_P02_1_IN
Definition: IfxCif_PinMap.c:36
IfxCif_CLK_P00_7_IN
IfxCif_Clk_In IfxCif_CLK_P00_7_IN
Definition: IfxCif_PinMap.c:28
IfxCif_D10_P00_1_IN
IfxCif_D_In IfxCif_D10_P00_1_IN
Definition: IfxCif_PinMap.c:30
IfxCif_D13_P00_4_IN
IfxCif_D_In IfxCif_D13_P00_4_IN
Definition: IfxCif_PinMap.c:33
IfxCif_Vsnc_In
VSNC pin mapping structure.
Definition: IfxCif_PinMap.h:60
IfxCif_D3_P02_3_IN
IfxCif_D_In IfxCif_D3_P02_3_IN
Definition: IfxCif_PinMap.c:38
IfxCif_D14_P00_5_IN
IfxCif_D_In IfxCif_D14_P00_5_IN
Definition: IfxCif_PinMap.c:34
IfxCif_VSNC_P00_8_IN
IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN
Definition: IfxCif_PinMap.c:46
IfxCif_D2_P02_2_IN
IfxCif_D_In IfxCif_D2_P02_2_IN
Definition: IfxCif_PinMap.c:37
IfxCif_Clk_In
CLK pin mapping structure.
Definition: IfxCif_PinMap.h:39
IfxCif_D15_P00_6_IN
IfxCif_D_In IfxCif_D15_P00_6_IN
Definition: IfxCif_PinMap.c:35
IfxCif_D4_P02_4_IN
IfxCif_D_In IfxCif_D4_P02_4_IN
Definition: IfxCif_PinMap.c:39
IfxCif_HSNC_P00_9_IN
IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN
Definition: IfxCif_PinMap.c:45
IfxCif_D12_P00_3_IN
IfxCif_D_In IfxCif_D12_P00_3_IN
Definition: IfxCif_PinMap.c:32
IfxCif_D5_P02_5_IN
IfxCif_D_In IfxCif_D5_P02_5_IN
Definition: IfxCif_PinMap.c:40
IfxCif_D0_P02_0_IN
IfxCif_D_In IfxCif_D0_P02_0_IN
Definition: IfxCif_PinMap.c:29
IfxCif_D6_P02_6_IN
IfxCif_D_In IfxCif_D6_P02_6_IN
Definition: IfxCif_PinMap.c:41


iLLD_TC26B: IfxCif_PinMap.h Source File

  • _PinMap
IfxCif_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCif_PinMap.h
3 * \brief CIF I/O map
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Cif_pinmap CIF Pin Mapping
25 * \ingroup IfxLld_Cif
26 */
27
28 #ifndef IFXCIF_PINMAP_H
29 #define IFXCIF_PINMAP_H
30
31 #include <IfxCif_reg.h>
32 #include <_Impl/IfxCif_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Cif_pinmap
36 * \{ */
37
38 /** \brief CLK pin mapping structure */
39 typedef const struct
40 {
41 Ifx_CIF* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 } IfxCif_Clk_In;
44
45 /** \brief D pin mapping structure */
46 typedef const struct
47 {
48 Ifx_CIF* module; /**< \brief Base address */
49 IfxPort_Pin pin; /**< \brief Port pin */
50 } IfxCif_D_In;
51
52 /** \brief HSNC pin mapping structure */
53 typedef const struct
54 {
55 Ifx_CIF* module; /**< \brief Base address */
56 IfxPort_Pin pin; /**< \brief Port pin */
57 } IfxCif_Hsnc_In;
58
59 /** \brief VSNC pin mapping structure */
60 typedef const struct
61 {
62 Ifx_CIF* module; /**< \brief Base address */
63 IfxPort_Pin pin; /**< \brief Port pin */
64 } IfxCif_Vsnc_In;
65
66 IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN; /**< \brief CIF_CLK: CIF input */
67 IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN; /**< \brief CIF_D0: CIF input */
68 IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN; /**< \brief CIF_D10: CIF input */
69 IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN; /**< \brief CIF_D11: CIF input */
70 IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN; /**< \brief CIF_D12: CIF input */
71 IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN; /**< \brief CIF_D13: CIF input */
72 IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN; /**< \brief CIF_D14: CIF input */
73 IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN; /**< \brief CIF_D15: CIF input */
74 IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN; /**< \brief CIF_D1: CIF input */
75 IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN; /**< \brief CIF_D2: CIF input */
76 IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN; /**< \brief CIF_D3: CIF input */
77 IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN; /**< \brief CIF_D4: CIF input */
78 IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN; /**< \brief CIF_D5: CIF input */
79 IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN; /**< \brief CIF_D6: CIF input */
80 IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN; /**< \brief CIF_D7: CIF input */
81 IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN; /**< \brief CIF_D8: CIF input */
82 IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN; /**< \brief CIF_D9: CIF input */
83 IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN; /**< \brief CIF_HSNC: CIF input */
84 IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN; /**< \brief CIF_VSNC: CIF input */
85
86 /** \} */
87
88 #endif /* IFXCIF_PINMAP_H */
IfxCif_D2_P02_2_IN
IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN
CIF_D2: CIF input.
Definition: IfxCif_PinMap.h:75
IfxCif_D3_P02_3_IN
IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN
CIF_D3: CIF input.
Definition: IfxCif_PinMap.h:76
IfxCif_Hsnc_In
HSNC pin mapping structure.
Definition: IfxCif_PinMap.h:53
IfxCif_VSNC_P00_8_IN
IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN
CIF_VSNC: CIF input.
Definition: IfxCif_PinMap.h:84
IfxCif_D9_P00_0_IN
IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN
CIF_D9: CIF input.
Definition: IfxCif_PinMap.h:82
IfxCif_D15_P00_6_IN
IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN
CIF_D15: CIF input.
Definition: IfxCif_PinMap.h:73
IfxCif_D_In
D pin mapping structure.
Definition: IfxCif_PinMap.h:46
IfxCif_D13_P00_4_IN
IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN
CIF_D13: CIF input.
Definition: IfxCif_PinMap.h:71
IfxCif_D10_P00_1_IN
IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN
CIF_D10: CIF input.
Definition: IfxCif_PinMap.h:68
IfxCif_D11_P00_2_IN
IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN
CIF_D11: CIF input.
Definition: IfxCif_PinMap.h:69
IfxCif_D8_P02_8_IN
IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN
CIF_D8: CIF input.
Definition: IfxCif_PinMap.h:81
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCif_Vsnc_In
VSNC pin mapping structure.
Definition: IfxCif_PinMap.h:60
IfxCif_Clk_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxCif_PinMap.h:42
IfxCif_D4_P02_4_IN
IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN
CIF_D4: CIF input.
Definition: IfxCif_PinMap.h:77
IfxCif_HSNC_P00_9_IN
IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN
CIF_HSNC: CIF input.
Definition: IfxCif_PinMap.h:83
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxCif_Clk_In
CLK pin mapping structure.
Definition: IfxCif_PinMap.h:39
IfxCif_D0_P02_0_IN
IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN
CIF_D0: CIF input.
Definition: IfxCif_PinMap.h:67
IfxCif_CLK_P00_7_IN
IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN
CIF_CLK: CIF input.
Definition: IfxCif_PinMap.h:66
IfxCif_D7_P02_7_IN
IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN
CIF_D7: CIF input.
Definition: IfxCif_PinMap.h:80
IfxCif_D5_P02_5_IN
IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN
CIF_D5: CIF input.
Definition: IfxCif_PinMap.h:78
IfxCif_D1_P02_1_IN
IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN
CIF_D1: CIF input.
Definition: IfxCif_PinMap.h:74
IfxCif_D12_P00_3_IN
IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN
CIF_D12: CIF input.
Definition: IfxCif_PinMap.h:70
IfxCif_D14_P00_5_IN
IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN
CIF_D14: CIF input.
Definition: IfxCif_PinMap.h:72
IfxCif_Clk_In::module
Ifx_CIF * module
Base address.
Definition: IfxCif_PinMap.h:41
IfxCif_cfg.h
CIF on-chip implementation data.
IfxCif_D6_P02_6_IN
IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN
CIF_D6: CIF input.
Definition: IfxCif_PinMap.h:79
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxCif_cfg.c Source File

  • _Impl
IfxCif_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCif_cfg.c
3 * \brief CIF on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxCif_cfg.h"
IfxCif_cfg.h
CIF on-chip implementation data.


iLLD_TC26B: IfxCif_cfg.h Source File

  • _Impl
IfxCif_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCif_cfg.h
3 * \brief CIF on-chip implementation data
4 * \ingroup IfxLld_Cif
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Cif CIF
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Cif_Impl Implementation
27 * \ingroup IfxLld_Cif
28 * \defgroup IfxLld_Cif_Std Standard Driver
29 * \ingroup IfxLld_Cif
30 */
31
32 #ifndef IFXCIF_CFG_H
33 #define IFXCIF_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "Cpu/Std/Ifx_Types.h"
40
41 /******************************************************************************/
42 /*-----------------------------------Macros-----------------------------------*/
43 /******************************************************************************/
44
45 #ifndef IFXCIF_DEBUG
46 #define IFXCIF_DEBUG __debug()
47 #endif
48
49 /** \brief Number of extra phats
50 */
51 #define IFXCIF_EXTRA_PATHS (5)
52
53 #ifndef IFXCIF_MAX_I2CNAK
54 #define IFXCIF_MAX_I2CNAK (16)
55 #endif
56
57 #define IFXCIF_NUM_MODULES (1)
58
59 #endif /* IFXCIF_CFG_H */
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC26B: IfxCpu.c Source File

  • Cpu
  • Std
IfxCpu.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu.c
3 * \brief CPU basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxCpu.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
37 {
38 boolean retVal;
39 volatile uint32 spinLockVal;
40
41 retVal = FALSE;
42
43 spinLockVal = 1UL;
44 spinLockVal =
45 (uint32)__cmpAndSwap(((unsigned int *)lock), spinLockVal, 0);
46
47 /* Check if the SpinLock WAS set before the attempt to acquire spinlock */
48 if (spinLockVal == 0)
49 {
50 retVal = TRUE;
51 }
52
53 return retVal;
54 }
55
56
57 IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
58 {
59 IfxCpu_CoreMode cpuMode;
60 Ifx_CPU_DBGSR dbgsr;
61 IfxCpu_ResourceCpu index = IfxCpu_getIndex(cpu);
62
63 cpuMode = IfxCpu_CoreMode_unknown;
64
65 /*get the DBGSR.HALT status */
66 /*Check if the request is done for same cpu as the host for this call */
67 if (IfxCpu_getCoreIndex() != index)
68 { /*status request is for other cpu than the host */
69 dbgsr = cpu->DBGSR;
70 }
71 else
72 { /*status request is for same cpu as the host */
73 dbgsr.U = __mfcr(CPU_DBGSR);
74 }
75
76 /*Check if the requested CPU is in DBG HALT mode */
77 if (dbgsr.B.HALT == (uint32)IfxCpu_DBGST_HALT_halt)
78 { /*CPU is in DBG HALT mode */
79 cpuMode = IfxCpu_CoreMode_halt;
80 }
81 else
82 {
83 if (dbgsr.B.HALT == (uint32)IfxCpu_DBGST_HALT_run)
84 { /*CPU is in DBG RUNNING mode now check PMCSR status */
85 volatile Ifx_SCU_PMCSR *pmcsr_val;
86
87 pmcsr_val = &MODULE_SCU.PMCSR[index];
88
89 if (pmcsr_val->B.PMST == (uint32)IfxCpu_PMCSR_PMST_normalMode)
90 { /*Cpu is in normal run mode */
91 cpuMode = IfxCpu_CoreMode_run;
92 }
93 else
94 { /*Cpu is not in run mode */
95 if (pmcsr_val->B.PMST == (uint32)IfxCpu_PMCSR_PMST_idleMode)
96 { /*Cpu is in idle mode */
97 cpuMode = IfxCpu_CoreMode_idle;
98 }
99 }
100 }
101 else
102 {
103 cpuMode = IfxCpu_CoreMode_unknown;
104 }
105 }
106
107 return cpuMode;
108 }
109
110
111 IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
112 {
113 IfxCpu_ResourceCpu result;
114 uint32 index;
115 result = IfxCpu_ResourceCpu_none;
116
117 for (index = 0; index < IFXCPU_NUM_MODULES; index++)
118 {
119 if (IfxCpu_cfg_indexMap[index].module == cpu)
120 {
121 result = (IfxCpu_ResourceCpu)IfxCpu_cfg_indexMap[index].index;
122 break;
123 }
124 }
125
126 return result;
127 }
128
129
130 uint32 IfxCpu_getRandomValue(uint32 *seed)
131 {
132 /*************************************************************************
133 * the choice of a and m is important for a long period of the LCG
134 * with a = 279470273 and
135 * m = 4294967291
136 * a maximum period of 2^32-5 is given
137 * values for a:
138 * 0x5EB0A82F = 1588635695
139 * 0x48E7211F = 1223106847
140 * 0x10a860c1 = 279470273
141 ***************************************************************************/
142 uint32 x = *seed;
143
144 /* a seed of 0 is not allowed, and therefore will be changed to a valid value */
145 if (x == 0)
146 {
147 x = 42;
148 }
149
150 uint32 a = 0x10a860c1; // 279470273
151 uint32 m = 0xfffffffb; // 4294967291
152 uint32 result;
153
154 //__asm(a,m,x,tmp1,tmp2 );
155 //EhEl = a * x;
156 //result = e14 % m;
157 // %0 result
158 // %1 a
159 // %2 x
160 // %3 m
161 result = IfxCpu_getRandomVal(a, x, m);
162
163 *seed = result; // to simplify seed passing
164
165 return result;
166 }
167
168
169 uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
170 {
171 uint32 new_value = IfxCpu_getRandomValue(seed);
172
173 /* swap min/max if required */
174 if (min > max)
175 {
176 unsigned swap = max;
177 max = min;
178 min = swap;
179 }
180
181 /* special case */
182 if ((min == 0) && (max == 0xffffffff))
183 {
184 return new_value;
185 }
186
187 /* return value within range */
188 return (new_value % (max - min + 1)) + min;
189 }
190
191
192 void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
193 {
194 /*Reset the SpinLock*/
195 *lock = 0;
196 }
197
198
199 void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
200 {
201 /*Reset the SpinLock*/
202 *lock = 0;
203 }
204
205
206 boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
207 {
208 uint8 reqslp;
209 boolean retValue;
210 IfxCpu_ResourceCpu index = IfxCpu_getIndex(cpu);
211
212 /*Modes such as HALT, SLEEP and STBY are not handled at CPU level */
213 retValue = ((mode == IfxCpu_CoreMode_halt) || (mode == IfxCpu_CoreMode_sleep)
214 || (mode == IfxCpu_CoreMode_stby)) ? FALSE : TRUE;
215
216 reqslp = (mode == IfxCpu_CoreMode_idle) ? IfxScu_PMCSR_REQSLP_Idle : IfxScu_PMCSR_REQSLP_Run;
217
218 if (retValue == TRUE)
219 {
220 /*Check if the same core is requesting to change the core run mode */
221 if (IfxCpu_getCoreIndex() != index)
222 { /*Request is for the other core */
223 /*To access PMCSR of other CPUs handle the safety EndInit protection */
224 uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
225 IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
226 MODULE_SCU.PMCSR[(uint32)IfxCpu_getIndex(cpu)].B.REQSLP = reqslp;
227 IfxScuWdt_setSafetyEndinit(safetyWdtPw);
228
229 cpu->DBGSR.B.HALT = 2; /*reset the HALT bit, if it is already done it is no harm in writing again */
230 }
231 else
232 { /*Request is for self, this request normally only for halt, otherwise the core is already running anyway! */
233 /*To access PMCSR of self handle the cpu EndInit protection */
234 uint16 cpuWdtPw = IfxScuWdt_getCpuWatchdogPassword();
235 IfxScuWdt_clearCpuEndinit(cpuWdtPw);
236 MODULE_SCU.PMCSR[(uint32)index].B.REQSLP = reqslp;
237 IfxScuWdt_setCpuEndinit(cpuWdtPw);
238 }
239 }
240
241 return retValue;
242 }
243
244
245 boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
246 {
247 boolean retVal = TRUE;
248
249 if (cpu == IfxCpu_getAddress(IfxCpu_getCoreIndex()))
250 {
251 retVal = FALSE;
252 }
253 else
254 {
255 cpu->PC.B.PC = programCounter >> 1;
256 }
257
258 return retVal;
259 }
260
261
262 boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
263 {
264 boolean retVal;
265 volatile uint32 spinLockVal;
266
267 retVal = FALSE;
268
269 do
270 {
271 spinLockVal = 1UL;
272 spinLockVal =
273 (uint32)__cmpAndSwap(((unsigned int *)lock), spinLockVal, 0);
274
275 /* Check if the SpinLock WAS set before the attempt to acquire spinlock */
276 if (spinLockVal == 0)
277 {
278 retVal = TRUE;
279 }
280 else
281 {
282 timeoutCount--;
283 }
284 } while ((retVal == FALSE) && (timeoutCount > 0));
285
286 return retVal;
287 }
288
289
290 boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
291 {
292 boolean retVal = TRUE;
293
294 /* Set the PC for Core 1 */
295 retVal &= IfxCpu_setProgramCounter(cpu, programCounter);
296 /* Get the mode for Core 1 and set it to RUNNING */
297
298 /* Core not running already */
299 if (IfxCpu_getCoreMode(cpu) == IfxCpu_CoreMode_halt)
300 {
301 retVal &= IfxCpu_setCoreMode(cpu, IfxCpu_CoreMode_run);
302 }
303
304 return retVal;
305 }
306
307
308 boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
309 {
310 volatile uint32 *sync = (volatile uint32 *)IFXCPU_GLB_ADDR_DSPR(__mfcr(CPU_CORE_ID), event);
311
312 boolean errorcnt = 0U;
313 /* Divide with 1000, gives the count value equivalent to milliseconds */
314 uint32 stmCount = (uint32)((IfxScuCcu_getStmFrequency() / 1000) * timeoutMilliSec);
315 uint32 stmCountBegin = STM0_TIM0.U;
316
317 while ((*sync & IFXCPU_CFG_ALLCORE_DONE) != IFXCPU_CFG_ALLCORE_DONE)
318 {
319 __nop();
320
321 if ((uint32)(STM0_TIM0.U - stmCountBegin) >= stmCount)
322 {
323 errorcnt = 1;
324 break;
325 }
326
327 /* There is no need to check overflow of the STM timer.
328 * When counter after overflow subtracted with counter before overflow,
329 * the subtraction result will be as expected, as long as both are unsigned 32 bits
330 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
331 * stmCountNow = 0x00000002 (before overflow)
332 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
333 }
334
335 return errorcnt;
336 }
337
338
339 void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
340 {
341 Ifx__imaskldmst(event, 1, __mfcr(CPU_CORE_ID), 1);
342 }
IfxCpu_getAddress
IFX_INLINE Ifx_CPU * IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map.
Definition: IfxCpu.h:724
IfxCpu_setCoreMode
boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU.
Definition: IfxCpu.c:206
IfxScu_PMCSR_REQSLP_Idle
Definition: IfxScu_cfg.h:1392
IfxCpu_DBGST_HALT_halt
Definition: IfxCpu_cfg.h:102
IfxCpu_getRandomValueWithinRange
uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range.
Definition: IfxCpu.c:169
IfxCpu_acquireMutex
boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore).
Definition: IfxCpu.c:36
Ifx__imaskldmst
asm volatile void Ifx__imaskldmst(void *a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsDcc.h:419
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:116
IfxCpu_emitEvent
void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event.
Definition: IfxCpu.c:339
IFXCPU_CFG_ALLCORE_DONE
#define IFXCPU_CFG_ALLCORE_DONE
All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being...
Definition: IfxCpu_cfg.h:78
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:140
IfxCpu_syncEvent
unsigned int IfxCpu_syncEvent
Event used for synchronisation.
Definition: IfxCpu.h:102
IfxCpu_getRandomVal
asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Generate the Random value.
Definition: IfxCpu_IntrinsicsDcc.h:1517
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCpu_CoreMode
IfxCpu_CoreMode
Enumeration for the Cpu mode.
Definition: IfxCpu.h:112
IfxCpu_waitEvent
boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
Definition: IfxCpu.c:308
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxCpu_getRandomValue
uint32 IfxCpu_getRandomValue(uint32 *seed)
API to get random value.
Definition: IfxCpu.c:130
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1102
IfxCpu_PMCSR_PMST_normalMode
Definition: IfxCpu_cfg.h:127
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxCpu_CoreMode_sleep
Definition: IfxCpu.h:117
IfxCpu_releaseMutex
void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
API to unlock the mutex .
Definition: IfxCpu.c:192
IfxCpu_PMCSR_PMST_idleMode
Definition: IfxCpu_cfg.h:129
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxCpu_DBGST_HALT_run
Definition: IfxCpu_cfg.h:101
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:136
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxCpu_CoreMode_stby
Definition: IfxCpu.h:118
max
sint32 max
Definition: IfxCpu_IntrinsicsDcc.h:132
IfxScu_PMCSR_REQSLP_Run
Definition: IfxScu_cfg.h:1391
IfxCpu_getIndex
IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:111
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:73
IfxCpu_mutexLock
unsigned int IfxCpu_mutexLock
Lock type Mutex lock.
Definition: IfxCpu.h:98
IfxCpu_spinLock
unsigned int IfxCpu_spinLock
Lock type Spin lock.
Definition: IfxCpu.h:94
IfxCpu_getCoreMode
IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:57
IfxCpu_startCore
boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU.
Definition: IfxCpu.c:290
IfxCpu.h
CPU basic functionality.
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxCpu_setSpinLock
boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout.
Definition: IfxCpu.c:262
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxCpu_CoreMode_unknown
Definition: IfxCpu.h:119
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:35
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:761
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:114
__cmpAndSwap
#define __cmpAndSwap
Definition: IfxCpu_IntrinsicsDcc.h:2072
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxCpu_CoreMode_run
Definition: IfxCpu.h:115
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxCpu_setProgramCounter
boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified.
Definition: IfxCpu.c:245
IfxCpu_CoreMode_halt
Definition: IfxCpu.h:114
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:48
IfxCpu_resetSpinLock
void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
API to unlock the resource .
Definition: IfxCpu.c:199


iLLD_TC26B: IfxCpu.h Source File

  • Cpu
  • Std
IfxCpu.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu.h
3 * \brief CPU basic functionality
4 * \ingroup IfxLld_Cpu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Cpu_Std_Core Cpu Core Functions
26 * \ingroup IfxLld_Cpu_Std
27 * \defgroup IfxLld_Cpu_Std_Interrupt Interrupt Utility Functions
28 * \ingroup IfxLld_Cpu_Std
29 * \defgroup IfxLld_Cpu_Std_Cache Cache Management Functions
30 * \ingroup IfxLld_Cpu_Std
31 * \defgroup IfxLld_Cpu_Std_PerformanceCounter Performance Counter Functions
32 * \ingroup IfxLld_Cpu_Std
33 * \defgroup IfxLld_Cpu_Std_Synchronization Synchronization Functions
34 * \ingroup IfxLld_Cpu_Std
35 * \defgroup IfxLld_Cpu_Std_Utility Cpu Utility Functions
36 * \ingroup IfxLld_Cpu_Std
37 * \defgroup IfxLld_Cpu_Std_Enum Enumerations
38 * \ingroup IfxLld_Cpu_Std
39 * \defgroup IfxLld_Cpu_Std_DataStructures Data Structures
40 * \ingroup IfxLld_Cpu_Std
41 */
42
43 #ifndef IFXCPU_H
44 #define IFXCPU_H 1
45
46 /******************************************************************************/
47 /*----------------------------------Includes----------------------------------*/
48 /******************************************************************************/
49
50 #include "_Impl/IfxCpu_cfg.h"
51 #include "IfxSrc_reg.h"
52 #include "IfxScu_reg.h"
53 #include "IfxStm_reg.h"
54 #include "_Impl/IfxScu_cfg.h"
55 #include "_Utilities/Ifx_Assert.h"
56 #include "Scu/Std/IfxScuWdt.h"
57 #include "Scu/Std/IfxScuCcu.h"
58
59 /******************************************************************************/
60 /*-----------------------------------Macros-----------------------------------*/
61 /******************************************************************************/
62
63 /** \brief Convert local DSPR address to global DSPR address which can be accessed from the SRI bus.
64 * Use this macro to convert a local DSPR address (in segment 0xd00.....) to
65 * a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on
66 * the CPU number.
67 * Example usage:
68 * \code
69 * dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i][0]);
70 * dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &destinationBuffer[i][0]);
71 * \endcode
72 */
73 #define IFXCPU_GLB_ADDR_DSPR(cpu, address) ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))
74
75 /** \brief Convert local PSPR address to global PSPR address which can be accessed from the SRI bus.
76 * Use this macro to convert a local PSPR address (in segment 0xc......) to
77 * a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on
78 * the CPU number.
79 *
80 * Example usage:
81 * \code
82 * dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &sourceBufferInPsprMemory);
83 * dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &destinationBufferInPsprMemory);
84 * \endcode
85 */
86 #define IFXCPU_GLB_ADDR_PSPR(cpu, address) ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))
87
88 /******************************************************************************/
89 /*------------------------------Type Definitions------------------------------*/
90 /******************************************************************************/
91
92 /** \brief Lock type Spin lock
93 */
94 typedef unsigned int IfxCpu_spinLock;
95
96 /** \brief Lock type Mutex lock
97 */
98 typedef unsigned int IfxCpu_mutexLock;
99
100 /** \brief Event used for synchronisation.
101 */
102 typedef unsigned int IfxCpu_syncEvent;
103
104 /******************************************************************************/
105 /*--------------------------------Enumerations--------------------------------*/
106 /******************************************************************************/
107
108 /** \addtogroup IfxLld_Cpu_Std_Enum
109 * \{ */
110 /** \brief Enumeration for the Cpu mode
111 */
112 typedef enum
113 {
114 IfxCpu_CoreMode_halt,
115 IfxCpu_CoreMode_run,
116 IfxCpu_CoreMode_idle,
117 IfxCpu_CoreMode_sleep,
118 IfxCpu_CoreMode_stby,
119 IfxCpu_CoreMode_unknown
120 } IfxCpu_CoreMode;
121
122 /** \brief Performance conunter modes
123 */
124 typedef enum
125 {
126 IfxCpu_CounterMode_normal = 0, /**< \brief Normal counter mode:the counter increments on their respective triggers */
127 IfxCpu_CounterMode_task = 1 /**< \brief Normal counter mode:additional gating control from the debug unit which allows the data gathered in the performance counters to be filtered by some specific criteria */
128 } IfxCpu_CounterMode;
129
130 /** \} */
131
132 /******************************************************************************/
133 /*-----------------------------Data Structures--------------------------------*/
134 /******************************************************************************/
135
136 /** \addtogroup IfxLld_Cpu_Std_DataStructures
137 * \{ */
138 /** \brief counter
139 */
140 typedef struct
141 {
142 uint32 counter; /**< \brief Counter value */
143 boolean overlfow; /**< \brief sticky overlfow */
144 } IfxCpu_Counter;
145
146 /** \} */
147
148 /** \addtogroup IfxLld_Cpu_Std_DataStructures
149 * \{ */
150 /** \brief Performance counter result
151 */
152 typedef struct
153 {
154 IfxCpu_Counter instruction; /**< \brief Instruction counter */
155 IfxCpu_Counter clock; /**< \brief CPU clock counter */
156 IfxCpu_Counter counter1; /**< \brief Multi counter 1 */
157 IfxCpu_Counter counter2; /**< \brief Multi counter 2 */
158 IfxCpu_Counter counter3; /**< \brief Multi counter 3 */
159 } IfxCpu_Perf;
160
161 /** \} */
162
163 /** \addtogroup IfxLld_Cpu_Std_Core
164 * \{ */
165
166 /******************************************************************************/
167 /*-------------------------Inline Function Prototypes-------------------------*/
168 /******************************************************************************/
169
170 /** \brief API to get the address for CPU HW module register memory map
171 * \param cpu Resource index of the CPU
172 * \return CPU module register address
173 */
174 IFX_INLINE Ifx_CPU *IfxCpu_getAddress(IfxCpu_ResourceCpu cpu);
175
176 /** \brief API to get core id of the CPU of the caller.
177 * Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu.
178 * Use IfxCpu_getCoreIndex() to get cpu no.
179 * \return Resource index of the CPU.
180 */
181 IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void);
182
183 /** \brief API to get cpu index of the caller CPU.
184 * Note: This api can be used whereever cpu no/index is needed.
185 * \return Resource index of the CPU.
186 */
187 IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void);
188
189 /** \brief API to initialize the context save area of the CPU where this is called.
190 *
191 * This API can initialize the CSA of the host CPU where this API is called. This API
192 * shall not be used to initialize the CSA of another CPU
193 * \param csaBegin Pointer to start of context save area
194 * \param csaEnd Pointer to end of context save area
195 * \return None
196 */
197 IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd);
198
199 /** \brief Set/Clear safety task identifier (PSW.S) on current CPU
200 * \return None
201 */
202 IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId);
203
204 /** \brief Triggers Software Reset
205 * \return None
206 */
207 IFX_INLINE void IfxCpu_triggerSwReset(void);
208
209 /******************************************************************************/
210 /*-------------------------Global Function Prototypes-------------------------*/
211 /******************************************************************************/
212
213 /** \brief API to get current mode of CPU
214 * \param cpu Pointer to the CPU HW module (register memory map)
215 * \return Current mode of the CPU
216 */
217 IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu);
218
219 /** \brief API to get current mode of CPU
220 * \param cpu Pointer to the CPU HW module (register memory map)
221 * \return Resource index of the CPU
222 */
223 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu);
224
225 /** \brief API to set mode of the CPU
226 * \param cpu Pointer to the CPU HW module (register memory map)
227 * \param mode CPU mode to be set by this API
228 * \return Success status of the activity (setting the core mode).
229 * \retval TRUE: If the activity successfully be performed.
230 * \retval FALSE: If the activity can't be performed.
231 */
232 IFX_EXTERN boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode);
233
234 /** \brief API to set the program counter for the CPU specified.
235 * \param cpu Pointer to the CPU HW module (register memory map)
236 * \param programCounter Program counter value to be set
237 * \return success status of the activity (setting program counter value).
238 * \retval TRUE: If the activity successfully be performed.
239 * \retval FALSE: If the activity can't be performed
240 */
241 IFX_EXTERN boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter);
242
243 /** \brief API to set the program counter for the CPU specified and start the CPU
244 * \param cpu Pointer to the CPU HW module (register memory map)
245 * \param programCounter Program counter value to start the CPU
246 * \return success status of the activity (setting program counter value).
247 * \retval TRUE: If the activity successfully be performed.
248 * \retval FALSE: If the activity can't be performed
249 */
250 IFX_EXTERN boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter);
251
252 /** \} */
253
254 /** \addtogroup IfxLld_Cpu_Std_Interrupt
255 * \{ */
256
257 /******************************************************************************/
258 /*-------------------------Inline Function Prototypes-------------------------*/
259 /******************************************************************************/
260
261 /** \brief API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API
262 * This API provides the status of CPU where this API is called
263 * \return Status of global interrupt enable bit.
264 * \retval TRUE: Global interrupts enabled.
265 * \retval FALSE: Global interrupts disabled
266 */
267 IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void);
268
269 /** \brief API to disable global interrupt and return the previous status.
270 *
271 * This API can be used only to disable the global interrupts of caller CPU. It cannot be
272 * used for this activity towards other CPUs
273 * \return Previous status of global interrupt enable bit.
274 * \retval TRUE: Previously, global interrupts enabled.
275 * \retval FALSE: Previously, global interrupts disabled
276 */
277 IFX_INLINE boolean IfxCpu_disableInterrupts(void);
278
279 /** \brief API to enable global interrupt.
280 * This API simply enables the global interrupt.
281 * \return None
282 */
283 IFX_INLINE void IfxCpu_enableInterrupts(void);
284
285 /** \brief Disable the Global Interrupt
286 * \return None
287 */
288 IFX_INLINE void IfxCpu_forceDisableInterrupts(void);
289
290 /** \brief API to restore global interrupt with that of the passed parameter.
291 *
292 * This API can be used only to disable the global interrupts of caller CPU. It cannot be
293 * used for this activity towards other CPUs
294 * \param enabled Previous status of the global interrupt enable bit
295 * \return None
296 */
297 IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled);
298
299 /** \} */
300
301 /** \addtogroup IfxLld_Cpu_Std_Cache
302 * \{ */
303
304 /******************************************************************************/
305 /*-------------------------Inline Function Prototypes-------------------------*/
306 /******************************************************************************/
307
308 /** \brief API to enable/ disable the data cacheability for selected segments
309 * With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called.
310 * \Note This API is to be called only if the PCACHE or DCACHE are not enabled before
311 * \param segmentNumberMask Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
312 * \param enable TRUE: to enable the cacheability for selected segment, FALSE: to disable.
313 * \return None
314 */
315 IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable);
316
317 /** \brief API to enable/ disable the instruction cacheability for selected segments
318 * With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called.
319 * \Note This API is to be called only if the PCACHE or DCACHE are not enabled before
320 * \param segmentNumberMask Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
321 * \param enable TRUE: to enable the cacheability for selected segment, FALSE: to disable.
322 * \return None
323 */
324 IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable);
325
326 /** \brief API to invalidate the program cache
327 * \return None
328 */
329 IFX_INLINE void IfxCpu_invalidateProgramCache(void);
330
331 /** \brief API to determine if an address is in a cachable or non-cachable Flash/LMU section
332 * \param address Address
333 * \return Status TRUE/FALSE
334 */
335 IFX_INLINE boolean IfxCpu_isAddressCachable(void *address);
336
337 /** \brief API to enable or bypass the data cache for the CPU which calls this API.
338 *
339 * This API can be used only to enable or bypass the data cache of caller CPU. It cannot be
340 * used for this activity towards other CPUs
341 * \param enable Command to enable or bypass the data cache
342 * TRUE: Enable the data cache.
343 * FALSE: Bypass the data cache.
344 * \return None
345 */
346 IFX_INLINE void IfxCpu_setDataCache(boolean enable);
347
348 /** \brief API to enable or bypass the program cache for the CPU which calls this API.
349 *
350 * This API can be used only to enable or bypass the program cache of caller CPU. It cannot be
351 * used for this activity towards other CPUs
352 * \param enable Command to enable or bypass the program cache.
353 * TRUE: Enable the program cache.
354 * FALSE: Bypass the program cache
355 * \return None
356 */
357 IFX_INLINE void IfxCpu_setProgramCache(boolean enable);
358
359 /** \} */
360
361 /** \addtogroup IfxLld_Cpu_Std_PerformanceCounter
362 * \{ */
363
364 /******************************************************************************/
365 /*-------------------------Inline Function Prototypes-------------------------*/
366 /******************************************************************************/
367
368 /** \brief API to read the clock counter for the CPU which calls this API.
369 *
370 * This API can be used to read clock counter of only the caller CPU. It cannot be
371 * used for this activity towards other CPUs.
372 * \return Counter value. 0 to 0x7FFFFFFF.
373 */
374 IFX_INLINE uint32 IfxCpu_getClockCounter(void);
375
376 /** \brief API to get sticky overflow bit of clock counter for the CPU, which calls this API.
377 *
378 * This API can be used to get sticky overflow bit of clock counter of only the caller CPU.
379 * It cannot be used for this activity towards other CPUs.
380 * This API also clears the sticky overflow after the read. While reading the sticky bit this API disables
381 * the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after
382 * reading the counter
383 * \return Status of sticky overflow bit.
384 * \retval TRUE: Sticky overflow bit is set.
385 * \retval FALSE: Sticky overflow bit is reset
386 */
387 IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void);
388
389 /** \brief API to read the instruction counter for the CPU which calls this API.
390 *
391 * This API can be used to read instruction counter of only the caller CPU. It cannot be
392 * used for this activity towards other CPUs
393 * \return Counter value. 0 to 0x7FFFFFFF.
394 */
395 IFX_INLINE uint32 IfxCpu_getInstructionCounter(void);
396
397 /** \brief API to get sticky overflow bit of Instruction counter for the CPU, which calls this API.
398 *
399 * This API can be used to get sticky overflow bit of Instruction counter of only the caller CPU.
400 * It cannot be used for this activity towards other CPUs.
401 * This API also clears the sticky overflow after the read. While reading the sticky bit this API disables
402 * the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after
403 * reading the counter
404 * \return Status of sticky overflow bit.
405 * \retval TRUE: Sticky overflow bit is set.
406 * \retval FALSE: Sticky overflow bit is reset
407 */
408 IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void);
409
410 /** \brief API to read the performance counter for the CPU which calls this API.
411 * \param address Address
412 * \return counter value
413 */
414 IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address);
415
416 /** \brief API to get sticky overflow bit of performance counter for the CPU, which calls this API.
417 * This is generic function to get sticky overflow bit of any performance counters
418 * \param address Address
419 * \return Status
420 */
421 IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address);
422
423 /** \brief Reset and start instruction, clock and multi counters
424 *
425 * Reset and start CCNT, ICNT, M1CNT, M2CNT, M3CNT. the overflow bits are cleared.
426 * \param mode Counter mode
427 * \return None
428 */
429 IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode);
430
431 /** \brief API to enable or disable performance counter for the CPU which calls this API.
432 *
433 * This API can be used to enable or disable performance counter of only the caller CPU. It cannot be
434 * used for this activity towards other CPUs.
435 * \param enable enable Command to enable or disable the performance counter.
436 * TRUE: Enable the performance counter.
437 * FALSE: Disable the performance counter
438 * \return None
439 */
440 IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable);
441
442 #if !((defined(__cplusplus)) && (defined(__TASKING__)))
443 /** \brief Stop instruction and clock counters, return their values
444 *
445 * Stop CCNT, ICNT, M1CNT, M2CNT, M3CNT and return their values;
446 * \Note The CCTRL is reset to 0, for more accurate measurements and has to be initialized again before strating the next performance measurement.
447 * \return Performance counter result
448 */
449 IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void);
450 #endif
451
452 /** \brief API to update clock counter for the CPU which calls this API.
453 *
454 * This API can be used to update clock counter of only the caller CPU. It cannot be
455 * used for this activity towards other CPUs.
456 * \param count Counter value to be updated. 0 to 0x7FFFFFFF
457 * \return None
458 */
459 IFX_INLINE void IfxCpu_updateClockCounter(uint32 count);
460
461 /** \brief API to update Instruction counter for the CPU which calls this API.
462 *
463 * This API can be used to update Instruction counter of only the caller CPU. It cannot be
464 * used for this activity towards other CPUs.
465 * \param count Counter value to be updated. 0 to 0x7FFFFFFF
466 * \return None
467 */
468 IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count);
469
470 /** \brief API to update performance counter for the CPU which calls this API.
471 * This is generic function to update any of the performance counters
472 * \param address Address
473 * \param count Count
474 * \return None
475 */
476 IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count);
477
478 /** \} */
479
480 /** \addtogroup IfxLld_Cpu_Std_Synchronization
481 * \{ */
482
483 /******************************************************************************/
484 /*-------------------------Global Function Prototypes-------------------------*/
485 /******************************************************************************/
486
487 /** \brief API to acquire the mutex (binary semaphore).
488 *
489 * This API can be used to acquire/get the mutex.
490 * \param lock lock pointer
491 * \return TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
492 *
493 * \code
494 * IfxCpu_mutexLock resourceLock;
495 * boolean flag = IfxCpu_acquireMutex(&resourceLock);
496 * if (flag){
497 * // critical section
498 * IfxCpu_releaseMutex(&resourceLock);
499 * }
500 * \endcode
501 *
502 */
503 IFX_EXTERN boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock);
504
505 /** \brief API to unlock the mutex .
506 *
507 * This API can be used to unlock the previously acquired mutex
508 * \param lock lock pointer
509 * \return None
510 *
511 * \code
512 * IfxCpu_mutexLock resourceLock;
513 * boolean flag = IfxCpu_acquireMutex(&resourceLock);
514 * if (flag){
515 * // critical section
516 * IfxCpu_releaseMutex(&resourceLock);
517 * }
518 * \endcode
519 *
520 */
521 IFX_EXTERN void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock);
522
523 /** \brief API to unlock the resource .
524 *
525 * This API can be used to unlock the previously acquired lock
526 * \param lock lock pointer
527 * \return None
528 */
529 IFX_EXTERN void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock);
530
531 /** \brief API to lock the resource in spin mode with the given timeout.
532 *
533 * This API can be used to spin lock for the lock for the given timeout period.
534 * \param lock lock pointer
535 * \param timeoutCount loop counter value used for timeout to acquire lock
536 * \return TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
537 *
538 * \code
539 * IfxCpu_spinLock resourceLock;
540 * boolean flag = IfxCpu_setSpinLock(&resourceLock, 0xFFFF);
541 * if (flag){
542 * // critical section
543 * IfxCpu_resetSpinLock(&resourceLock);
544 * }
545 * \endcode
546 *
547 */
548 IFX_EXTERN boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount);
549
550 /** \} */
551
552 /** \addtogroup IfxLld_Cpu_Std_Utility
553 * \{ */
554
555 /******************************************************************************/
556 /*-------------------------Global Function Prototypes-------------------------*/
557 /******************************************************************************/
558
559 /** \brief API to get random value
560 * \param seed Pointer to seed value
561 * \return random value
562 */
563 IFX_EXTERN uint32 IfxCpu_getRandomValue(uint32 *seed);
564
565 /** \brief API to get random value with in the range
566 * \param seed Pointer to seed value
567 * \param min minimum range value
568 * \param max maximum range value
569 * \return random value
570 */
571 IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max);
572
573 /** \brief This function waits till all the cores have set their corresponding bits in the event. This function along with
574 * IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default
575 * "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for
576 * synchronisation among the required cores, the macro can be redefined with the value accroing to the
577 * CORE_ID register.
578 * The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
579 *
580 * e.g:
581 * 1. Check for synchronisation between core 0 and core 5
582 * # define 0x41U
583 * 2. Check for synchronisation between core 0 to core 5
584 * # define 0x5FU
585 *
586 * Note:
587 * Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro.
588 * Core 0: 0
589 * Core 1: 1
590 * Core 2: 2
591 * Core 3: 3
592 * Core 4: 4
593 * Core 5: 6
594 * \param event Synchronous Event
595 * \param timeoutMilliSec timeout in millisec
596 * \return Error condition
597 *
598 * The functions IfxCpu_waitEvent and IfxCpu_emitEvent are used to achieve synchronisation between all cores (i.e individual cores wait till all cores have reached the synchronisation point). The IfxCpu_waitEvent returns 1 incase a timeout occurs.
599 *
600 * \code
601 * // Global variable. preferably located in shared memory.
602 * IfxCpu_syncEvent event;
603 * boolean errorVal;
604 *
605 * // Below code should be repeated in Each core
606 *
607 * // Upon reaching Synchonisation point
608 * IfxCpu_emitEvent(&event);
609 * errorVal = IfxCpu_waitEvent(&event, timeoutMilliSec); // timeoutMilliSec is timeout value to wait
610 *
611 * \endcode
612 *
613 */
614 IFX_EXTERN boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec);
615
616 /** \brief This function sets a bit corresponding to the core in the event.
617 * \param event Synchronous Event
618 * \return None
619 *
620 * A coding example can be found in \ref IfxCpu_waitEvent
621 *
622 */
623 IFX_EXTERN void IfxCpu_emitEvent(IfxCpu_syncEvent *event);
624
625 /** \} */
626
627 /******************************************************************************/
628 /*---------------------Inline Function Implementations------------------------*/
629 /******************************************************************************/
630
631 IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
632 {
633 Ifx_CPU_ICR reg;
634 reg.U = __mfcr(CPU_ICR);
635 return reg.B.IE != 0;
636 }
637
638
639 IFX_INLINE boolean IfxCpu_disableInterrupts(void)
640 {
641 boolean enabled;
642 enabled = IfxCpu_areInterruptsEnabled();
643 __disable();
644 __nop();
645 return enabled;
646 }
647
648
649 IFX_INLINE void IfxCpu_enableInterrupts(void)
650 {
651 __enable();
652 }
653
654
655 IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable)
656 {
657 uint32 cpu_pmaVal;
658 uint16 checkRestrictionMask;
659 uint32 coreIndex = IfxCpu_getCoreIndex();
660 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
661
662 /*resolve the restrictions*/
663 /*In PMA0 Segment-C and Segment[7-CoreID] must have the same value */
664 checkRestrictionMask = ((uint16)1 << (7 - coreIndex)) | ((uint16)1 << 0xC);
665
666 if ((segmentNumberMask & checkRestrictionMask) != 0)
667 {
668 segmentNumberMask |= checkRestrictionMask;
669 }
670
671 cpu_pmaVal = __mfcr(CPU_PMA0); /* Read the CPU_PMA0 */
672
673 cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask); /* enable or disable the corresponding bitfield */
674
675 /*The CPU_PMA registers are ENDINIT protected*/
676 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
677 /*When changing the value of the CPU_PMAx registers both the instruction and data caches should be invalidated*/
678 /*Write to PMA0 register for selecting the cacheability for data cache*/
679 __dsync(); /* DSYNC instruction should be executed immediately prior to the MTCR*/
680 __mtcr(CPU_PMA0, cpu_pmaVal);
681 __isync(); /* ISYNC instruction executed immediately following MTCR */
682 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
683 }
684
685
686 IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable)
687 {
688 uint32 cpu_pmaVal;
689 uint16 checkRestrictionMask;
690 uint32 coreIndex = IfxCpu_getCoreIndex();
691 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
692
693 /*resolve the restrictions*/
694 /*In PMA1 Segment-D and Segment[7-CoreID] must have the same value */
695 checkRestrictionMask = ((uint16)1 << (7 - coreIndex)) | ((uint16)1 << 0xD);
696
697 if ((segmentNumberMask & checkRestrictionMask) != 0)
698 {
699 segmentNumberMask |= checkRestrictionMask;
700 }
701
702 cpu_pmaVal = __mfcr(CPU_PMA1); /* Read the CPU_PMA1 */
703
704 cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask); /* enable or disable the corresponding bitfield */
705
706 /*The CPU_PMA registers are ENDINIT protected*/
707 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
708 /*When changing the value of the CPU_PMAx registers both the instruction and data caches should be invalidated*/
709 /*Write to PMA1 register for selecting the cacheability for data cache*/
710 __dsync(); /* DSYNC instruction should be executed immediately prior to the MTCR */
711 __mtcr(CPU_PMA1, cpu_pmaVal);
712 __isync(); /* ISYNC instruction executed immediately following MTCR */
713 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
714 }
715
716
717 IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
718 {
719 __disable();
720 __nop();
721 }
722
723
724 IFX_INLINE Ifx_CPU *IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
725 {
726 Ifx_CPU *module;
727
728 if (cpu < IfxCpu_ResourceCpu_none)
729 {
730 module = (Ifx_CPU *)IfxCpu_cfg_indexMap[cpu].module;
731 }
732 else
733 {
734 module = NULL_PTR;
735 }
736
737 return module;
738 }
739
740
741 IFX_INLINE uint32 IfxCpu_getClockCounter(void)
742 {
743 return IfxCpu_getPerformanceCounter(CPU_CCNT);
744 }
745
746
747 IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void)
748 {
749 return IfxCpu_getPerformanceCounterStickyOverflow(CPU_CCNT);
750 }
751
752
753 IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
754 {
755 Ifx_CPU_CORE_ID reg;
756 reg.U = __mfcr(CPU_CORE_ID);
757 return (IfxCpu_Id)reg.B.CORE_ID;
758 }
759
760
761 IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
762 {
763 Ifx_CPU_CORE_ID reg;
764 reg.U = __mfcr(CPU_CORE_ID);
765 return (IfxCpu_ResourceCpu)reg.B.CORE_ID;
766 }
767
768
769 IFX_INLINE uint32 IfxCpu_getInstructionCounter(void)
770 {
771 return IfxCpu_getPerformanceCounter(CPU_ICNT);
772 }
773
774
775 IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void)
776 {
777 return IfxCpu_getPerformanceCounterStickyOverflow(CPU_ICNT);
778 }
779
780
781 IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address)
782 {
783 Ifx_CPU_CCNT ccnt;
784
785 if (address == CPU_CCNT)
786 {
787 ccnt.U = __mfcr(CPU_CCNT);
788 }
789 else if (address == CPU_ICNT)
790 {
791 ccnt.U = __mfcr(CPU_ICNT);
792 }
793 else if (address == CPU_M1CNT)
794 {
795 ccnt.U = __mfcr(CPU_M1CNT);
796 }
797 else if (address == CPU_M2CNT)
798 {
799 ccnt.U = __mfcr(CPU_M2CNT);
800 }
801 else if (address == CPU_M3CNT)
802 {
803 ccnt.U = __mfcr(CPU_M3CNT);
804 }
805
806 return ccnt.B.CountValue;
807 }
808
809
810 IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address)
811 {
812 Ifx_CPU_CCNT ccnt;
813
814 if (address == CPU_CCNT)
815 {
816 ccnt.U = __mfcr(CPU_CCNT);
817 }
818 else if (address == CPU_ICNT)
819 {
820 ccnt.U = __mfcr(CPU_ICNT);
821 }
822 else if (address == CPU_M1CNT)
823 {
824 ccnt.U = __mfcr(CPU_M1CNT);
825 }
826 else if (address == CPU_M2CNT)
827 {
828 ccnt.U = __mfcr(CPU_M2CNT);
829 }
830 else if (address == CPU_M3CNT)
831 {
832 ccnt.U = __mfcr(CPU_M3CNT);
833 }
834
835 return ccnt.B.SOvf;
836 }
837
838
839 IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
840 {
841 uint32 k;
842 uint32 nxt_cxi_val = 0;
843 uint32 *prvCsa = 0U;
844 uint32 *nxtCsa = csaBegin;
845 uint32 numOfCsa = (((uint32)csaEnd - (uint32)csaBegin) / 64U);
846
847 for (k = 0; k < numOfCsa; k++)
848 {
849 nxt_cxi_val = ((uint32)nxtCsa & (0XFU << 28)) >> 12 | ((uint32)nxtCsa & (0XFFFFU << 6)) >> 6;
850
851 if (k == 0)
852 {
853 __mtcr(CPU_FCX, nxt_cxi_val); /* store the new pcxi value to LCX */
854 }
855 else
856 {
857 *prvCsa = nxt_cxi_val; /* Store null pointer in last CSA (= very first time!) */
858 }
859
860 if (k == (numOfCsa - 3U))
861 {
862 __mtcr(CPU_LCX, nxt_cxi_val); /* Last but 2 context save area is pointed in LCX to know if there is CSA depletion */
863 }
864
865 prvCsa = (uint32 *)nxtCsa;
866 nxtCsa += 16; /* next CSA */
867 }
868
869 *prvCsa = 0;
870 }
871
872
873 IFX_INLINE void IfxCpu_invalidateProgramCache(void)
874 {
875 uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPassword();
876 {
877 IfxScuWdt_clearCpuEndinit(cpuWdtPassword);
878 Ifx_CPU_PCON1 pcon1;
879 pcon1.U = __mfcr(CPU_PCON1);
880 pcon1.B.PCINV = 1;
881 __mtcr(CPU_PCON1, pcon1.U);
882 IfxScuWdt_setCpuEndinit(cpuWdtPassword);
883 }
884 }
885
886
887 IFX_INLINE boolean IfxCpu_isAddressCachable(void *address)
888 {
889 uint8 segment = (uint32)address >> 24;
890 return ((segment == IFXCPU_CACHABLE_FLASH_SEGMENT) || (segment == IFXCPU_CACHABLE_LMU_SEGMENT)) ? TRUE : FALSE;
891 }
892
893
894 IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
895 {
896 Ifx_CPU_CCTRL cctrl;
897 cctrl.U = __mfcr(CPU_CCTRL);
898 /*Disable the counters */
899 cctrl.B.CE = 0;
900 __mtcr(CPU_CCTRL, cctrl.U);
901
902 /* reset the counters */
903 __mtcr(CPU_CCNT, 0);
904 __mtcr(CPU_ICNT, 0);
905 __mtcr(CPU_M1CNT, 0);
906 __mtcr(CPU_M2CNT, 0);
907 __mtcr(CPU_M3CNT, 0);
908
909 /*Enable the counters, set the counter mode */
910 cctrl.B.CE = 1;
911 cctrl.B.CM = mode;
912 __mtcr(CPU_CCTRL, cctrl.U);
913 }
914
915
916 IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
917 {
918 if (enabled != FALSE)
919 {
920 __enable();
921 }
922 }
923
924
925 IFX_INLINE void IfxCpu_setDataCache(boolean enable)
926 {
927 uint32 coreIndex = IfxCpu_getCoreIndex();
928 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
929 /*PCACHE enable steps */
930 { /* Step 1: Set PCBYP to 0 if cache is enabled */
931 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
932 Ifx_CPU_DCON0 dcon0;
933 dcon0.U = 0;
934 dcon0.B.DCBYP = enable ? 0 : 1; /*depending on the enable bypas bit is reset/set */
935 __mtcr(CPU_DCON0, dcon0.U);
936 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
937 }
938 /* Step 2: Call Isync */
939 __isync();
940 }
941
942
943 IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable)
944 {
945 Ifx_CPU_CCTRL cctrl;
946 cctrl.U = __mfcr(CPU_CCTRL);
947 cctrl.B.CE = enable;
948 __mtcr(CPU_CCTRL, cctrl.U);
949 }
950
951
952 IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
953 {
954 if (enable)
955 { /* Step 3: Initiate invalidation of current cache contents if any */
956 Ifx_CPU_PCON1 pcon1;
957 pcon1.U = 0;
958 pcon1.B.PCINV = 1;
959 __mtcr(CPU_PCON1, pcon1.U);
960 }
961
962 uint32 coreIndex = IfxCpu_getCoreIndex();
963 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
964 /*PCACHE enable steps */
965 { /* Step 1: Set PCBYP to 0 if cache is enabled */
966 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
967 Ifx_CPU_PCON0 pcon0;
968 pcon0.U = 0;
969 pcon0.B.PCBYP = enable ? 0 : 1; /*depending on the enable bypass bit is reset/set */
970 __mtcr(CPU_PCON0, pcon0.U);
971 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
972 }
973 /* Step 2: Call Isync */
974 __isync();
975 }
976
977
978 IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId)
979 {
980 Ifx_CPU_PSW psw;
981 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (safetyId == 0 || safetyId == 1));
982 psw.U = __mfcr(CPU_PSW);
983 psw.B.S = safetyId;
984 __mtcr(CPU_PSW, (uint32)psw.U);
985 }
986
987
988 #if !((defined(__cplusplus)) && (defined(__TASKING__)))
989 IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
990 {
991 IfxCpu_Perf result;
992 /*Disable the counters, reset the control reg */
993 /* Use inline assembly to ensure constant implementation, and execution of the measurement routines */
994 __stopPerfCounters();
995
996 Ifx_CPU_CCNT ccnt;
997 ccnt.U = __mfcr(CPU_CCNT);
998 result.clock.counter = ccnt.B.CountValue;
999 result.clock.overlfow = ccnt.B.SOvf;
1000
1001 Ifx_CPU_ICNT icnt;
1002 icnt.U = __mfcr(CPU_ICNT);
1003 result.instruction.counter = icnt.B.CountValue;
1004 result.instruction.overlfow = icnt.B.SOvf;
1005
1006 Ifx_CPU_M1CNT m1cnt;
1007 m1cnt.U = __mfcr(CPU_M1CNT);
1008 result.counter1.counter = m1cnt.B.CountValue;
1009 result.counter1.overlfow = m1cnt.B.SOvf;
1010
1011 Ifx_CPU_M2CNT m2cnt;
1012 m2cnt.U = __mfcr(CPU_M2CNT);
1013 result.counter2.counter = m2cnt.B.CountValue;
1014 result.counter2.overlfow = m2cnt.B.SOvf;
1015
1016 Ifx_CPU_M3CNT m3cnt;
1017 m3cnt.U = __mfcr(CPU_M3CNT);
1018 result.counter3.counter = m3cnt.B.CountValue;
1019 result.counter3.overlfow = m3cnt.B.SOvf;
1020
1021 return result;
1022 }
1023 #endif
1024
1025
1026 IFX_INLINE void IfxCpu_triggerSwReset(void)
1027 {
1028 MODULE_SCU.SWRSTCON.B.SWRSTREQ = 1;
1029
1030 /* Wait till reset */
1031 while (1)
1032 {}
1033 }
1034
1035
1036 IFX_INLINE void IfxCpu_updateClockCounter(uint32 count)
1037 {
1038 IfxCpu_updatePerformanceCounter(CPU_CCNT, count);
1039 }
1040
1041
1042 IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count)
1043 {
1044 IfxCpu_updatePerformanceCounter(CPU_ICNT, count);
1045 }
1046
1047
1048 IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count)
1049 {
1050 IFX_UNUSED_PARAMETER(address);
1051 Ifx_CPU_CCTRL cctrl;
1052 boolean enableBit;
1053 /*Disable the counters */
1054 cctrl.U = __mfcr(CPU_CCTRL);
1055 enableBit = cctrl.B.CE;
1056 cctrl.B.CE = 0;
1057 __mtcr(CPU_CCTRL, cctrl.U);
1058
1059 /*Update the counter value */
1060 count &= ~(1U << 31); /*clear sticky overflow bit if set */
1061 __mtcr(address, count);
1062
1063 /*restore the enable bit */
1064 cctrl.B.CE = enableBit;
1065 __mtcr(CPU_CCTRL, cctrl.U);
1066 }
1067
1068
1069 #endif /* IFXCPU_H */
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
__disable
void __disable(void) __attribute__((intrinsic_function(0x103
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxCpu_getAddress
IFX_INLINE Ifx_CPU * IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
API to get the address for CPU HW module register memory map.
Definition: IfxCpu.h:724
IfxCpu_setCoreMode
IFX_EXTERN boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU.
Definition: IfxCpu.c:206
IfxCpu_initCSA
IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called.
Definition: IfxCpu.h:839
IfxCpu_getRandomValueWithinRange
IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
API to get random value with in the range.
Definition: IfxCpu.c:169
IfxCpu_acquireMutex
IFX_EXTERN boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
API to acquire the mutex (binary semaphore).
Definition: IfxCpu.c:36
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:116
IfxCpu_emitEvent
IFX_EXTERN void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
This function sets a bit corresponding to the core in the event.
Definition: IfxCpu.c:339
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:140
IfxCpu_stopCounters
IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
Stop instruction and clock counters, return their values.
Definition: IfxCpu.h:989
IfxCpu_getClockCounter
IFX_INLINE uint32 IfxCpu_getClockCounter(void)
API to read the clock counter for the CPU which calls this API.
Definition: IfxCpu.h:741
IfxCpu_syncEvent
unsigned int IfxCpu_syncEvent
Event used for synchronisation.
Definition: IfxCpu.h:102
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:417
IfxCpu_Perf
Performance counter result.
Definition: IfxCpu.h:152
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:463
IfxCpu_getInstructionCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void)
API to get sticky overflow bit of Instruction counter for the CPU, which calls this API...
Definition: IfxCpu.h:775
IfxCpu_getPerformanceCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address)
API to get sticky overflow bit of performance counter for the CPU, which calls this API...
Definition: IfxCpu.h:810
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCpu_enableInterrupts
IFX_INLINE void IfxCpu_enableInterrupts(void)
API to enable global interrupt. This API simply enables the global interrupt.
Definition: IfxCpu.h:649
IfxCpu_setProgramCache
IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
API to enable or bypass the program cache for the CPU which calls this API.
Definition: IfxCpu.h:952
IfxCpu_setDataCache
IFX_INLINE void IfxCpu_setDataCache(boolean enable)
API to enable or bypass the data cache for the CPU which calls this API.
Definition: IfxCpu.h:925
Ifx_Assert.h
Assert functions.
IfxCpu_CoreMode
IfxCpu_CoreMode
Enumeration for the Cpu mode.
Definition: IfxCpu.h:112
IfxCpu_updateClockCounter
IFX_INLINE void IfxCpu_updateClockCounter(uint32 count)
API to update clock counter for the CPU which calls this API.
Definition: IfxCpu.h:1036
IfxCpu_waitEvent
IFX_EXTERN boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
This function waits till all the cores have set their corresponding bits in the event. This function along with IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for synchronisation among the required cores, the macro can be redefined with the value accroing to the CORE_ID register. The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
Definition: IfxCpu.c:308
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
IfxCpu_getRandomValue
IFX_EXTERN uint32 IfxCpu_getRandomValue(uint32 *seed)
API to get random value.
Definition: IfxCpu.c:130
IfxCpu_Perf::instruction
IfxCpu_Counter instruction
Instruction counter.
Definition: IfxCpu.h:154
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxCpu_Perf::counter2
IfxCpu_Counter counter2
Multi counter 2.
Definition: IfxCpu.h:157
FALSE
#define FALSE
Definition: Platform_Types.h:90
__stopPerfCounters
#define __stopPerfCounters
Definition: IfxCpu_IntrinsicsDcc.h:2080
IfxCpu_Perf::clock
IfxCpu_Counter clock
CPU clock counter.
Definition: IfxCpu.h:155
IfxCpu_CoreMode_sleep
Definition: IfxCpu.h:117
IfxCpu_enableSegmentSpecificDataAccessCacheability
IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable)
API to enable/ disable the data cacheability for selected segments With this API cacheability for one...
Definition: IfxCpu.h:655
IfxCpu_releaseMutex
IFX_EXTERN void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
API to unlock the mutex .
Definition: IfxCpu.c:192
IfxScuWdt.h
SCU basic functionality.
IfxCpu_invalidateProgramCache
IFX_INLINE void IfxCpu_invalidateProgramCache(void)
API to invalidate the program cache.
Definition: IfxCpu.h:873
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:136
IfxCpu_Id
IfxCpu_Id
List of the available CPU ids.
Definition: IfxCpu_cfg.h:107
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCpu_CoreMode_stby
Definition: IfxCpu.h:118
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
IfxCpu_setSafetyTaskIdentifier
IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId)
Set/Clear safety task identifier (PSW.S) on current CPU.
Definition: IfxCpu.h:978
max
sint32 max
Definition: IfxCpu_IntrinsicsDcc.h:132
IfxScu_cfg.h
SCU on-chip implementation data.
IfxCpu_enableSegmentSpecificInstructionAccessCacheability
IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable)
API to enable/ disable the instruction cacheability for selected segments With this API cacheability ...
Definition: IfxCpu.h:686
IfxCpu_getClockCounterStickyOverflow
IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void)
API to get sticky overflow bit of clock counter for the CPU, which calls this API.
Definition: IfxCpu.h:747
IfxCpu_getIndex
IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:111
IfxCpu_mutexLock
unsigned int IfxCpu_mutexLock
Lock type Mutex lock.
Definition: IfxCpu.h:98
IFXCPU_CACHABLE_LMU_SEGMENT
#define IFXCPU_CACHABLE_LMU_SEGMENT
Segment number of cachable LMU region.
Definition: IfxCpu_cfg.h:56
IfxCpu_triggerSwReset
IFX_INLINE void IfxCpu_triggerSwReset(void)
Triggers Software Reset.
Definition: IfxCpu.h:1026
IfxCpu_setPerformanceCountersEnableBit
IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable)
API to enable or disable performance counter for the CPU which calls this API.
Definition: IfxCpu.h:943
IfxCpu_spinLock
unsigned int IfxCpu_spinLock
Lock type Spin lock.
Definition: IfxCpu.h:94
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxCpu_isAddressCachable
IFX_INLINE boolean IfxCpu_isAddressCachable(void *address)
API to determine if an address is in a cachable or non-cachable Flash/LMU section.
Definition: IfxCpu.h:887
IfxCpu_CounterMode_task
Normal counter mode:additional gating control from the debug unit which allows the data gathered in t...
Definition: IfxCpu.h:127
IfxCpu_getCoreMode
IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
API to get current mode of CPU.
Definition: IfxCpu.c:57
IfxCpu_startCore
IFX_EXTERN boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU.
Definition: IfxCpu.c:290
IfxCpu_resetAndStartCounters
IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
Reset and start instruction, clock and multi counters.
Definition: IfxCpu.h:894
IfxCpu_Perf::counter1
IfxCpu_Counter counter1
Multi counter 1.
Definition: IfxCpu.h:156
IfxCpu_Counter
counter
Definition: IfxCpu.h:140
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:504
IfxCpu_getInstructionCounter
IFX_INLINE uint32 IfxCpu_getInstructionCounter(void)
API to read the instruction counter for the CPU which calls this API.
Definition: IfxCpu.h:769
uint16
unsigned short uint16
Definition: Platform_Types.h:109
__enable
void __enable(void) __attribute__((intrinsic_function(0x103
IfxCpu_setSpinLock
IFX_EXTERN boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
API to lock the resource in spin mode with the given timeout.
Definition: IfxCpu.c:262
IfxCpu_Perf::counter3
IfxCpu_Counter counter3
Multi counter 3.
Definition: IfxCpu.h:158
IfxCpu_Counter::counter
uint32 counter
Counter value.
Definition: IfxCpu.h:142
IfxCpu_CoreMode_unknown
Definition: IfxCpu.h:119
IfxScuCcu.h
SCU basic functionality.
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:35
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:460
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:761
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:631
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:114
IfxCpu_updateInstructionCounter
IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count)
API to update Instruction counter for the CPU which calls this API.
Definition: IfxCpu.h:1042
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:753
IFXCPU_CACHABLE_FLASH_SEGMENT
#define IFXCPU_CACHABLE_FLASH_SEGMENT
Segment number of cachable flash region.
Definition: IfxCpu_cfg.h:52
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxCpu_CounterMode_normal
Normal counter mode:the counter increments on their respective triggers.
Definition: IfxCpu.h:126
IfxCpu_CoreMode_run
Definition: IfxCpu.h:115
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxCpu_setProgramCounter
IFX_EXTERN boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified.
Definition: IfxCpu.c:245
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxCpu_cfg.h
CPU on-chip implementation data.
IfxCpu_CoreMode_halt
Definition: IfxCpu.h:114
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxCpu_Counter::overlfow
boolean overlfow
sticky overlfow
Definition: IfxCpu.h:143
IfxCpu_CounterMode
IfxCpu_CounterMode
Performance conunter modes.
Definition: IfxCpu.h:124
IfxCpu_updatePerformanceCounter
IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count)
API to update performance counter for the CPU which calls this API. This is generic function to updat...
Definition: IfxCpu.h:1048
IfxCpu_resetSpinLock
IFX_EXTERN void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
API to unlock the resource .
Definition: IfxCpu.c:199
IfxCpu_forceDisableInterrupts
IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
Disable the Global Interrupt.
Definition: IfxCpu.h:717
IfxCpu_getPerformanceCounter
IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address)
API to read the performance counter for the CPU which calls this API.
Definition: IfxCpu.h:781


iLLD_TC26B: IfxCpu_CStart0.c Source File

  • Cpu
  • CStart
IfxCpu_CStart0.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Cstart0.c
3 * \brief This file contains the Core startup sequence for Cpu0.
4 * \version iLLD_1_0_1_11_0
5 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24 /*******************************************************************************
25 ** Includes **
26 *******************************************************************************/
27 #include "Ifx_Cfg.h"
28 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
29 #include "Scu/Std/IfxScuWdt.h"
30 #include "Scu/Std/IfxScuCcu.h"
31 #include "Cpu/Std/IfxCpu.h"
32 #include "Cpu/CStart/IfxCpu_CStart.h"
33 #include "IfxScu_reg.h"
34 #include "IfxCpu_reg.h"
35
36 /******************************************************************************/
37 /* Macros */
38 /******************************************************************************/
39 /** \brief Configuration for CpuX enable.
40 *
41 */
42 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0
43 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1) /**< Cpu0 enabled by default*/
44 #endif
45 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1
46 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1) /**< Cpu1 enabled by default*/
47 #endif
48
49 /** \brief Configuration for cache enable.
50 *
51 */
52 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
53 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1) /**< Program Cache enabled by default*/
54 #endif
55 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
56 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1) /**< Data Cache enabled by default*/
57 #endif
58
59 #ifndef IFXCPU_CSTART_CCU_INIT_HOOK
60 #define IFXCPU_CSTART_CCU_INIT_HOOK() (void)IfxScuCcu_init(&IfxScuCcu_defaultClockConfig); /*The status returned by Ccu init is ignored */
61 #endif
62
63 /*******************************************************************************
64 ** Imported Function Declarations **
65 *******************************************************************************/
66 IFXCOMPILER_COMMON_LINKER_SYMBOLS()
67 IFXCOMPILER_CORE_LINKER_SYMBOLS(0)
68
69 IFX_EXTERN void core0_main(void);
70 #if defined(__TASKING__)
71 __asm("\t .extern core0_main");
72 #endif
73
74 /*******************************************************************************
75 ** Private Constant Definitions **
76 *******************************************************************************/
77 #define IFXCSTART0_PSW_DEFAULT (0x00000980u)
78 #define IFXCSTART0_PCX_O_S_DEFAULT (0xfff00000u)
79
80 /*********************************************************************************
81 * _start() - startup code
82 *********************************************************************************/
83 #if defined(__HIGHTEC__)
84 #pragma GCC optimize ("-O2")
85 #endif
86
87 void _Core0_start(void)
88 {
89 uint32 pcxi;
90 uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[0]);
91
92 IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(0); /*Test Stack, CSA and Cache */
93
94 /* Load user stack pointer */
95 __setareg(sp, __USTACK(0));
96 __dsync();
97
98 /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
99 __mtcr(CPU_PSW, IFXCSTART0_PSW_DEFAULT);
100
101 /* Set the PCXS and PCXO to its reset value in case of a warm start */
102 pcxi = __mfcr(CPU_PCXI);
103 pcxi &= IFXCSTART0_PCX_O_S_DEFAULT; /*0xfff00000; */
104 __mtcr(CPU_PCXI, pcxi);
105
106 /*enable/disable program cache depending on the configuration */
107 IfxCpu_setProgramCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE);
108
109 /*enable/disable data cache depending on the configuration */
110 IfxCpu_setDataCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE);
111
112 /* Clear the ENDINIT bit in the WDT_CON0 register, inline funtion */
113 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
114
115 /* Load Base Address of Trap Vector Table. */
116 __mtcr(CPU_BTV, (uint32)__TRAPTAB(0));
117
118 /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
119 __mtcr(CPU_BIV, (uint32)__INTTAB(0));
120
121 /* Load interupt stack pointer. */
122 __mtcr(CPU_ISP, (uint32)__ISTACK(0));
123
124 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
125
126 /* initialize SDA base pointers */
127 __setareg(a0, __SDATA1(0));
128 __setareg(a1, __SDATA2(0));
129
130 /* These to be un commented if A8 and A9 are required to be initialized */
131 __setareg(a8, __SDATA3(0));
132 __setareg(a9, __SDATA4(0));
133 /* Setup the context save area linked list. */
134
135 IfxCpu_initCSA((uint32 *)__CSA(0), (uint32 *)__CSA_END(0)); /*Initialize the context save area for CPU0 */
136
137 {
138 /*CPU and safety watchdogs are enabled by default, C initialization functions are not servicing the watchdogs */
139 uint16 safetyWdtPassword = IfxScuWdt_getSafetyWatchdogPassword();
140 IfxScuWdt_disableCpuWatchdog(cpuWdtPassword);
141 IfxScuWdt_disableSafetyWatchdog(safetyWdtPassword);
142
143 Ifx_C_Init(); /*Initialization of C runtime variables */
144
145 IfxScuWdt_enableCpuWatchdog(cpuWdtPassword);
146 IfxScuWdt_enableSafetyWatchdog(safetyWdtPassword);
147 }
148
149 /*Initialize the clock system */
150 IFXCPU_CSTART_CCU_INIT_HOOK();
151
152 /*Start remaining cores */
153 #if (IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 != 0)
154 (void)IfxCpu_startCore(&MODULE_CPU1, (uint32)&_Core1_start); /*The status returned by function call is ignored */
155 #endif
156
157 #if (IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 == 0)
158 IfxScuWdt_disableCpuWatchdog(cpuWdtPassword);
159 /*halt the CPU 0 if it is not needed to be enabled */
160 IfxCpu_setCoreMode(&MODULE_CPU0, IfxCpu_CoreMode_idle);
161 #endif
162
163 /*Call main function of Cpu0 */
164 __non_return_call(core0_main);
165 }
166
167 #if defined(__HIGHTEC__)
168 #pragma GCC reset_options
169 #endif
170 /******************************************************************************
171 * reset vector address, user section to inform linker to locate the code at 0x8000 0020
172 *****************************************************************************/
173 #if defined(__HIGHTEC__)
174 #pragma section
175 #pragma section ".start" x
176 #endif
177 #if defined(__TASKING__)
178 #pragma protect on
179 #pragma section code "start"
180 #endif
181 #if defined(__DCC__)
182 #pragma section CODE ".start" X
183 #endif
184
185 void _START(void)
186 {
187 __non_return_call(_Core0_start);
188 }
189
190
191 /* reset the sections defined above, to normal region */
192 #if defined(__HIGHTEC__)
193 #pragma section
194 #endif
195 #if defined(__TASKING__)
196 #pragma protect restore
197 #pragma section code restore
198 #endif
199 #if defined(__DCC__)
200 #pragma section CODE
201 #endif
202
203 /*******************************************************************************
204 ** Boot Mode Headers **
205 *******************************************************************************/
206 /*Boot Mode Header 0 sections to inform linker to locate them at 0x8000 0000 */
207 #ifndef IFX_CFG_CPUCSTART_BMHD_NOT_NEEDED
208
209 #if defined(__HIGHTEC__)
210 #pragma section
211 #pragma section ".bmhd_0" a
212 #endif
213 #if defined(__TASKING__)
214 #pragma protect on
215 #pragma section farrom "bmhd_0"
216 #endif
217 #if defined(__DCC__)
218 #pragma section CONST ".bmhd_0" R
219 #endif
220 /** \brief Boot Mode Header 0
221 * Boot mode header at memory location 0c8000 0000.
222 */
223 const uint32 BootModeHeader_0[] = {
224 0x00000000u, /* STADBM first user code at 0x8000 0020h */
225 0xb3590070u, /* BMI = 0070h BMHDID = B359h */
226 0x00000000u, /* ChkStart */
227 0x00000000u, /* ChkEnd */
228 0x00000000u, /* CRCrange */
229 0x00000000u, /* !CRCrange */
230 0x791eb864u, /* CRChead */
231 0x86e1479bu /* !CRChead */
232 };
233
234 /*reset the sections defined above */
235 #if defined(__HIGHTEC__)
236 #pragma section
237 #endif
238 #if defined(__TASKING__)
239 #pragma protect restore
240 #pragma section farrom restore
241 #endif
242 #if defined(__DCC__)
243 #pragma section CONST
244 #endif
245
246 #ifndef IFX_CFG_CPUCSTART_BMI01_NOT_NEEDED
247 /*Boot Mode Header 1 sections to inform linker to locate them at 0x8002 0000 */
248 #if defined(__HIGHTEC__)
249 #pragma section
250 #pragma section ".bmhd_1" a
251 #endif
252 #if defined(__TASKING__)
253 #pragma protect on
254 #pragma section farrom "bmhd_1"
255 #endif
256 #if defined(__DCC__)
257 #pragma section CONST ".bmhd_1" R
258 #endif
259
260 /** \brief Boot Mode Header 1
261 * Boot mode header at memory location 0c8002 0000.
262 */
263 const uint32 BootModeHeader_1[] = {
264 0x00000000u, /* STADBM first user code at 0x8000 0020h */
265 0xB3590070u, /* BMI = 0070h BMHDID = B359h */
266 0x00000000u, /* ChkStart */
267 0x00000000u, /* ChkEnd */
268 0x00000000u, /* CRCrange */
269 0x00000000u, /* !CRCrange */
270 0x791eb864u, /* CRChead */
271 0x86e1479bu /* !CRChead */
272 };
273
274 /*reset the sections defined above */
275 #if defined(__HIGHTEC__)
276 #pragma section
277 #endif
278 #if defined(__TASKING__)
279 #pragma protect restore
280 #pragma section farrom restore
281 #endif
282 #if defined(__DCC__)
283 #pragma section CONST
284 #endif
285 #endif /*IFX_CFG_CPUCSTART_BMI01_NOT_NEEDED*/
286
287 #endif /*IFX_CFG_CPUCSTART_BMHD_NOT_NEEDED*/
288
289 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:54
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
IfxCpu_CStart.h
This file contains the Core startup sequence.
IfxCpu_setCoreMode
boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
API to set mode of the CPU.
Definition: IfxCpu.c:206
IfxCpu_initCSA
IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called.
Definition: IfxCpu.h:839
IfxCpu_CoreMode_idle
Definition: IfxCpu.h:116
__SDATA3
#define __SDATA3(cpu)
Definition: CompilerDcc.h:75
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:417
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:463
__SDATA2
#define __SDATA2(cpu)
Definition: CompilerDcc.h:74
uint32
unsigned long uint32
Definition: Platform_Types.h:113
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:57
_Core0_start
void _Core0_start(void)
Definition: IfxCpu_CStart0.c:87
IfxCpu_setProgramCache
IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
API to enable or bypass the program cache for the CPU which calls this API.
Definition: IfxCpu.h:952
BootModeHeader_0
const uint32 BootModeHeader_0[]
Boot Mode Header 0 Boot mode header at memory location 0c8000 0000.
Definition: IfxCpu_CStart0.c:223
IfxCpu_setDataCache
IFX_INLINE void IfxCpu_setDataCache(boolean enable)
API to enable or bypass the data cache for the CPU which calls this API.
Definition: IfxCpu.h:925
__CSA_END
#define __CSA_END(cpu)
Definition: CompilerDcc.h:58
IfxScuWdt_disableSafetyWatchdog
void IfxScuWdt_disableSafetyWatchdog(uint16 password)
SCUWDT API to disable Safety Watchdog functionality.
Definition: IfxScuWdt.c:196
IfxScuWdt_enableSafetyWatchdog
void IfxScuWdt_enableSafetyWatchdog(uint16 password)
SCUWDT API to enable Safety Watchdog functionality.
Definition: IfxScuWdt.c:216
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:53
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_enableCpuWatchdog
void IfxScuWdt_enableCpuWatchdog(uint16 password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: IfxScuWdt.c:204
BootModeHeader_1
const uint32 BootModeHeader_1[]
Boot Mode Header 1 Boot mode header at memory location 0c8002 0000.
Definition: IfxCpu_CStart0.c:263
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
Configuration for cache enable.
Definition: IfxCpu_CStart0.c:53
IFXCOMPILER_COMMON_LINKER_SYMBOLS
#define IFXCOMPILER_COMMON_LINKER_SYMBOLS()
Definition: CompilerDcc.h:60
IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK
#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu)
Configuration for pre initialization hook function.
Definition: IfxCpu_CStart.h:56
__INTTAB
#define __INTTAB(cpu)
Definition: CompilerDcc.h:68
_START
void _START(void)
Definition: IfxCpu_CStart0.c:185
__SDATA1
#define __SDATA1(cpu)
Definition: CompilerDcc.h:73
IFXCOMPILER_CORE_LINKER_SYMBOLS
#define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
Definition: CompilerDcc.h:39
_Core1_start
void _Core1_start(void)
Definition: IfxCpu_CStart1.c:72
__TRAPTAB
#define __TRAPTAB(cpu)
Definition: CompilerDcc.h:71
IfxScuWdt_disableCpuWatchdog
void IfxScuWdt_disableCpuWatchdog(uint16 password)
SCUWDT API to disable CPU Watchdog functionality.
Definition: IfxScuWdt.c:184
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxCpu_startCore
boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
API to set the program counter for the CPU specified and start the CPU.
Definition: IfxCpu.c:290
__non_return_call
#define __non_return_call
Definition: IfxCpu_IntrinsicsDcc.h:1540
IFXCSTART0_PSW_DEFAULT
#define IFXCSTART0_PSW_DEFAULT
Definition: IfxCpu_CStart0.c:77
IFXCSTART0_PCX_O_S_DEFAULT
#define IFXCSTART0_PCX_O_S_DEFAULT
Definition: IfxCpu_CStart0.c:78
IfxCpu.h
CPU basic functionality.
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:504
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:126
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxScuCcu.h
SCU basic functionality.
__setareg
#define __setareg
Definition: IfxCpu_IntrinsicsDcc.h:2076
core0_main
IFX_EXTERN void core0_main(void)
IFXCPU_CSTART_CCU_INIT_HOOK
#define IFXCPU_CSTART_CCU_INIT_HOOK()
Definition: IfxCpu_CStart0.c:60
IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
Definition: IfxCpu_CStart0.c:56
__SDATA4
#define __SDATA4(cpu)
Definition: CompilerDcc.h:76
Ifx_C_Init
void Ifx_C_Init(void)


iLLD_TC26B: IfxCpu_CStart1.c Source File

  • Cpu
  • CStart
IfxCpu_CStart1.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Cstart1.c
3 * \brief This file contains the Core startup sequence for Cpu1.
4 * \version iLLD_1_0_1_11_0
5 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25 /*******************************************************************************
26 ** Includes **
27 *******************************************************************************/
28 #include "Ifx_Cfg.h"
29 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
30 #include "Scu/Std/IfxScuWdt.h"
31 #include "Cpu/Std/IfxCpu.h"
32 #include "Cpu/CStart/IfxCpu_CStart.h"
33 #include "IfxScu_reg.h"
34 #include "IfxCpu_reg.h"
35
36 /******************************************************************************/
37 /* Macros */
38 /******************************************************************************/
39 /** \brief Configuration for cache enable.
40 *
41 */
42 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
43 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1) /**< Program Cache enabled by default*/
44 #endif
45 #ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
46 # define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1) /**< Data Cache enabled by default*/
47 #endif
48 /*******************************************************************************
49 ** Imported Function Declarations **
50 *******************************************************************************/
51 IFXCOMPILER_COMMON_LINKER_SYMBOLS()
52 IFXCOMPILER_CORE_LINKER_SYMBOLS(1)
53
54 IFX_EXTERN void core1_main(void);
55 #if defined(__TASKING__)
56 __asm("\t .extern core1_main");
57 #endif
58
59 /*******************************************************************************
60 ** Private Constant Definitions **
61 *******************************************************************************/
62 #define IFXCSTART1_PSW_DEFAULT (0x00000980u)
63 #define IFXCSTART1_PCX_O_S_DEFAULT (0xfff00000u)
64
65 /*********************************************************************************
66 * - startup code
67 *********************************************************************************/
68 #if defined(__HIGHTEC__)
69 #pragma GCC optimize ("-O2")
70 #endif
71
72 void _Core1_start(void)
73 {
74 uint32 pcxi;
75 uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[1]);
76
77 IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(1); /*Test Stack, CSA and Cache */
78
79 /* Load user stack pointer */
80 __setareg(sp, __USTACK(1));
81 __dsync();
82
83 /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
84 __mtcr(CPU_PSW, IFXCSTART1_PSW_DEFAULT); /* 0x00000980 */
85
86 /* Set the PCXS and PCXO to its reset value in case of a warm start */
87 pcxi = __mfcr(CPU_PCXI);
88 pcxi &= IFXCSTART1_PCX_O_S_DEFAULT; /*0xfff00000; */
89 __mtcr(CPU_PCXI, pcxi);
90
91 /*enable program cache */
92 IfxCpu_setProgramCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE);
93
94 /*enable data cache */
95 IfxCpu_setDataCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE);
96
97 /* Clear the ENDINIT bit in the WDT_CON0 register, inline funtion */
98 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[1], wdtPassword);
99
100 /* Load Base Address of Trap Vector Table. */
101 __mtcr(CPU_BTV, (uint32)__TRAPTAB(1));
102
103 /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
104 __mtcr(CPU_BIV, (uint32)__INTTAB(1));
105
106 /* Load interupt stack pointer. */
107 __mtcr(CPU_ISP, (uint32)__ISTACK(1));
108
109 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[1], wdtPassword);
110
111 /* initialize SDA base pointers */
112 __setareg(a0, __SDATA1(1));
113 __setareg(a1, __SDATA2(1));
114
115 /* These to be un commented if A8 and A9 are required to be initialised */
116 __setareg(a8, __SDATA3(1));
117 __setareg(a9, __SDATA4(1));
118
119 IfxCpu_initCSA((uint32 *)__CSA(1), (uint32 *)__CSA_END(1));
120
121 /*Call main function of Cpu0 */
122 __non_return_call(core1_main);
123 }
124
125 #if defined(__HIGHTEC__)
126 #pragma GCC reset_options
127 #endif
128 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
__ISTACK
#define __ISTACK(cpu)
Definition: CompilerDcc.h:54
core1_main
IFX_EXTERN void core1_main(void)
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
IfxCpu_CStart.h
This file contains the Core startup sequence.
IfxCpu_initCSA
IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
API to initialize the context save area of the CPU where this is called.
Definition: IfxCpu.h:839
__SDATA3
#define __SDATA3(cpu)
Definition: CompilerDcc.h:75
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:417
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:463
__SDATA2
#define __SDATA2(cpu)
Definition: CompilerDcc.h:74
uint32
unsigned long uint32
Definition: Platform_Types.h:113
__CSA
#define __CSA(cpu)
Definition: CompilerDcc.h:57
IfxCpu_setProgramCache
IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
API to enable or bypass the program cache for the CPU which calls this API.
Definition: IfxCpu.h:952
IfxCpu_setDataCache
IFX_INLINE void IfxCpu_setDataCache(boolean enable)
API to enable or bypass the data cache for the CPU which calls this API.
Definition: IfxCpu.h:925
__CSA_END
#define __CSA_END(cpu)
Definition: CompilerDcc.h:58
__USTACK
#define __USTACK(cpu)
Definition: CompilerDcc.h:53
IfxScuWdt.h
SCU basic functionality.
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
Configuration for cache enable.
Definition: IfxCpu_CStart1.c:43
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFXCOMPILER_COMMON_LINKER_SYMBOLS
#define IFXCOMPILER_COMMON_LINKER_SYMBOLS()
Definition: CompilerDcc.h:60
IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK
#define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu)
Configuration for pre initialization hook function.
Definition: IfxCpu_CStart.h:56
__INTTAB
#define __INTTAB(cpu)
Definition: CompilerDcc.h:68
__SDATA1
#define __SDATA1(cpu)
Definition: CompilerDcc.h:73
IFXCOMPILER_CORE_LINKER_SYMBOLS
#define IFXCOMPILER_CORE_LINKER_SYMBOLS(cpu)
Definition: CompilerDcc.h:39
_Core1_start
void _Core1_start(void)
Definition: IfxCpu_CStart1.c:72
__TRAPTAB
#define __TRAPTAB(cpu)
Definition: CompilerDcc.h:71
IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
#define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
Definition: IfxCpu_CStart1.c:46
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
__non_return_call
#define __non_return_call
Definition: IfxCpu_IntrinsicsDcc.h:1540
IfxCpu.h
CPU basic functionality.
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:504
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IFXCSTART1_PSW_DEFAULT
#define IFXCSTART1_PSW_DEFAULT
Definition: IfxCpu_CStart1.c:62
__setareg
#define __setareg
Definition: IfxCpu_IntrinsicsDcc.h:2076
IFXCSTART1_PCX_O_S_DEFAULT
#define IFXCSTART1_PCX_O_S_DEFAULT
Definition: IfxCpu_CStart1.c:63
__SDATA4
#define __SDATA4(cpu)
Definition: CompilerDcc.h:76


iLLD_TC26B: IfxCpu_CStart.h Source File

  • Cpu
  • CStart
IfxCpu_CStart.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Cstart.h
3 * \brief This file contains the Core startup sequence.
4 *
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Cpu_CStart Core Startup Functions
25 * \ingroup IfxLld_Cpu
26 *
27 * \defgroup IfxLld_Cpu_CStart_StartupSequence Startup Sequence
28 * \ingroup IfxLld_Cpu_CStart
29 *
30 * \defgroup IfxLld_Cpu_CStart_ConfigEnableCache How to enable cache during startup?
31 * \ingroup IfxLld_Cpu_CStart
32 *
33 * \defgroup IfxLld_Cpu_CStart_ConfigEnableCores How to enable CPUs during startup?
34 * \ingroup IfxLld_Cpu_CStart
35 */
36 #ifndef IFXCPU_CSTART_H_
37 #define IFXCPU_CSTART_H_
38
39 /******************************************************************************/
40 /* Includes */
41 /******************************************************************************/
42 #include "Ifx_Cfg.h"
43 #ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
44 #include "Cpu/Std/Ifx_Types.h"
45 #include "Tricore/Compilers/Compilers.h"
46 #include "Cpu/Std/IfxCpu_Intrinsics.h"
47
48 /******************************************************************************/
49 /* Macros */
50 /******************************************************************************/
51
52 /** \brief Configuration for pre initialization hook function.
53 *
54 */
55 #ifndef IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK
56 # define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu) /**< Hook function is empty if not configured*/
57 #endif
58 /******************************************************************************/
59 /* Exported prototypes */
60 /******************************************************************************/
61 void _Core1_start(void);
62 void _Core2_start(void);
63
64 /*Documentation */
65
66 /** \addtogroup IfxLld_Cpu_CStart_StartupSequence
67 * \{
68 *
69 * The startup driver is responsible for initializing the basic features of microcontroller
70 * to bring it up to the user functions. In framework these functions are called as "CoreX_main".
71 *
72 * In TC27X controllers, CPU0 is master controller which is booted from reset.
73 * IfxCpu_CStart driver provides following functionalities and they are listed in the order of
74 * their execution.
75 *
76 * \section IfxLld_Cpu_CStart_StartupSequence Core Startup Sequence
77 * 1) Execute pre-initialization hook, which is user configurable. \ref IfxLld_Cpu_CStart_ConfigStartupPreInitHook\n
78 * 2) Setup user stack pointer for the CPU core\n
79 * 3) Set program/data cache bypass to configuration defined settings. Refer \ref IfxLld_Cpu_CStart_ConfigEnableCache.\n
80 * 4) Set base address for trap vector and interrupt vector for the CPU core\n
81 * 5) Set interrupt stack pointer\n
82 * 6) Initialize the base pointers for the small data area registers for CPU core\n
83 * 7) Initialize the CSA for CPU core\n
84 * 8) Do the C initialization to initialize the global variables etc.\n
85 * 9) Initialize the clock system to configuration defined settings. \ref Ifx_Scu_Ccu_ConfigClock\n
86 * 10) Start remaining cores if they configuration setting request them to be enabled. \ref IfxLld_Cpu_CStart_ConfigEnableCores\n
87 * 11) Call user function "CoreX_main"\n
88 *
89 * \note All the above functionalities are executed by "master core" in this case CPU0. Remaining cores will execute
90 * only subset of the above functions, i.e. steps 8) 9) and 10) are not executed by remaining CPU core startups.
91 *
92 * \section IfxLld_Cpu_CStart_ConfigStartupPreInitHook Using Startup pre-initialization hook
93 *
94 * If the application/ demo example need some activity other than above defined functionalities, user can configure
95 * the function which is called before any other initialization is executed. Example of such activity is testing the CSA and STACK.
96 *
97 * Following are the steps to be done to configure user defined activity which is needed before startup sequence.
98 *
99 * \subsection IfxLld_Cpu_CStart_ConfigStartupPreInitHookStep1 Step1: Define a hook function
100 *
101 * This definition shall be as user defined code (Generally in DemoApps folder).\n
102 * Considerations:\n
103 * 1. Format: IFX_INLINE void <pre init function name>(cpu)
104 * \note Define such a routine with the consideration, that there shall be no function call within this.
105 *
106 * 2. Use the information available as parameter cpu
107 *
108 * Example code in a user defined file eg. Ifx_preInitHook.h, placed under folder/subfolder: 0_AppSw/Tricore/DemoApp:
109 * \code
110 * // file: Ifx_preInitHook.h
111 * //Example function for pre initialization Hook for startup functions.
112 *
113 * IFX_INLINE mySysPreInitHook(uint32 cpu)
114 * {
115 * switch (cpu)
116 * {
117 * case 0:
118 * {
119 * //user code for cpu0: Function calls NOT allowed.
120 * break;
121 * }
122 * case 1:
123 * {
124 * //user code for cpu1: Function calls NOT allowed.
125 * break;
126 * }
127 * case 2:
128 * {
129 * //user code for cpu2: Function calls NOT allowed.
130 * break;
131 * }
132 * case default:
133 * {
134 * break;
135 * }
136 * }
137 * }
138 * \endcode
139 *
140 * \subsection IfxLld_Cpu_CStart_ConfigStartupPreInitHookStep2 Step2: Configure the pre initialization function for startup sequence call
141 * Create a file for configuring the hook. For example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder)
142 * \note This configuration, overload the macro IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu), which is already defined in IfxCpu_CStart.h.
143 * !!IMPORTANT!! Don't modify this at IfxCpu_CStart.h, because this is library file.
144 *
145 * \code
146 * //file: Ifx_Cfg_CStart.h
147 *
148 * #include "Ifx_preInitHook.h" //Assuming this is the file name as in above example
149 *
150 * #define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu) mySysPreInitHook(cpu) //This is INLINE function.
151 *
152 * \endcode
153 */
154
155 /** \} */
156
157 /** \addtogroup IfxLld_Cpu_CStart_ConfigEnableCache
158 * \{
159 *
160 * In Tricore Cpu the cache enable/ disable are handled by the feature called cache bypass.
161 * Cache is enabled if the Bypass is disabled.
162 *
163 * Startup sequence of each CPU execute the function to do the cache settings. \ref Ifx_Cpu_StartupSequence
164 * The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_PCACHE and
165 * IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_DCACHE control this function.
166 *
167 * To modify the default configuration, these macros are to be defined in Ifx_Cfg.h (usually located under ../0_Src/0_AppSw/Config/Common/Ifx_Cfg.h)
168 * \note This kind of definitions overload the macros, which are already defined in IfxCpu_CStart*.c.
169 * !!IMPORTANT!! Don't modify these in IfxCpu_CStart*.c, because theseare library files.
170 *
171 * Details of configuration parameters:\n
172 *
173 * \paragraph IfxLld_Cpu_CStart_ConfigEnableCachePgmParamters program cache configuration parameters
174 *
175 * Enable/Disable program cache of Tricore CPU0 with parameter:\n
176 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE\n
177 *
178 * Enable/Disable program cache of Tricore CPU1 with parameter:\n
179 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE\n
180 *
181 * Enable/Disable program cache of Tricore CPU2 with parameter:\n
182 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE\n
183 *
184 * Enable/Disable data cache of Tricore CPU0 with parameter:\n
185 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE\n
186 *
187 * Enable/Disable data cache of Tricore CPU1 with parameter:\n
188 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE\n
189 *
190 * Enable/Disable data cache of Tricore CPU2 with parameter:\n
191 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE\n
192 *
193 * Following example shows, how to enable program cache of all available cores and disable data cache of all
194 * the available cores.
195 * \code
196 * //file: Ifx_Cfg.h
197 *
198 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1) //Program cache for Cpu0 is enabled
199 *
200 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1) //Data cache for Cpu0 is enabled
201 *
202 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1) //Program cache for Cpu1 is enabled
203 *
204 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1) //Data cache for Cpu1 is enabled
205 *
206 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE (1) //Program cache for Cpu2 is enabled
207 *
208 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE (1) //Data cache for Cpu2 is enabled
209 *
210 * \endcode
211 *
212 * To control the the caches during runtime, refer for the details of APIs: \ref Ifx_Cpu_Cache
213 *
214 */
215
216 /** \} */
217
218 /** \addtogroup IfxLld_Cpu_CStart_ConfigEnableCores
219 * \{
220 *
221 * Startup sequence of CPU0 execute the function to initialize the remaining available CPUs.
222 * \ref IfxLld_Cpu_CStart_StartupSequence.
223 * Startup sequence enables all the available CPUs.
224 *
225 * The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx control this function.
226 * To modify the default configuration, these macros are to be defined. Create a file to define these macros,
227 * for example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder).
228 * \note This kind of definitions, overload the macros, which are already defined in IfxCpu_CStart.h.
229 * !!IMPORTANT!! Don't modify these at IfxCpu_CStart.h, because this is library file.
230 *
231 * Details of configuration parameters:\n
232 *
233 * \paragraph IfxLld_Cpu_CStart_ConfigEnableCoresParamters CPU enable/disable configuration parameters
234 *
235 * Enable/Disable of Tricore CPU0 with parameter:\n
236 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0\n
237 *
238 * Enable/Disable of Tricore CPU1 with parameter:\n
239 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1\n
240 *
241 * Enable/Disable of Tricore CPU2 with parameter:\n
242 * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2\n
243 *
244 * Following example shows, how to enable all available cores.
245 * \code
246 * //file: Ifx_Cfg_CStart.h
247 *
248 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1) //Cpu0 is enabled
249 *
250 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1) //Cpu1 is enabled
251 *
252 * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2 (1) //Cpu2 is enabled
253 *
254 * \endcode
255 *
256 */
257
258 /** \} */
259
260 #endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
261 #endif /* IFXCPU_CSTART_H_ */
IfxCpu_Intrinsics.h
_Core1_start
void _Core1_start(void)
Definition: IfxCpu_CStart1.c:72
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Compilers.h
_Core2_start
void _Core2_start(void)


iLLD_TC26B: IfxCpu_Intrinsics.h Source File

  • Cpu
  • Std
IfxCpu_Intrinsics.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Intrinsics.h
3 * \ingroup IfxLld_Cpu_Intrinsics Intrinsics
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup IfxLld_Cpu_Intrinsics Intrinsics
24 * \ingroup IfxLld_Cpu_Std
25 *
26 */
27 #ifndef IFXCPU_INTRINSICS_H
28 #define IFXCPU_INTRINSICS_H
29 /******************************************************************************/
30 #include "Ifx_Types.h"
31
32 #if defined(__DCC__)
33 #include "IfxCpu_IntrinsicsDcc.h"
34
35 #elif defined(__HIGHTEC__)
36 #include "IfxCpu_IntrinsicsGnuc.h"
37
38 #elif defined(__TASKING__)
39 #include "IfxCpu_IntrinsicsTasking.h"
40
41 #elif defined(__ghs__)
42 #include "IfxCpu_IntrinsicsGhs.h"
43
44 #else
45 #error Compiler unsupported
46 #endif
47
48 #define IFX_ALIGN_8 (1) // Align on 8 bit Boundary
49 #define IFX_ALIGN_16 (2) // Align on 16 bit Boundary
50 #define IFX_ALIGN_32 (4) // Align on 32 bit Boundary
51 #define IFX_ALIGN_64 (8) // Align on 64 bit Boundary
52 #define IFX_ALIGN_128 (16) // Align on 128 bit Boundary
53 #define IFX_ALIGN_256 (32) // Align on 256 bit Boundary
54
55 #define Ifx_AlignOn256(Size) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))
56 #define Ifx_AlignOn128(Size) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))
57 #define Ifx_AlignOn64(Size) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))
58 #define Ifx_AlignOn32(Size) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))
59 #define Ifx_AlignOn16(Size) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))
60 #define Ifx_AlignOn8(Size) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))
61
62 #define Ifx_COUNTOF(x) (sizeof(x) / sizeof(x[0]))
63
64 //______________________________________________________________________________
65
66 /** Convert context pointer to address pointer
67 * \param[in] cx context pointer
68 * \return address pointer
69 */
70 IFX_INLINE void *__cx_to_addr(uint32 cx)
71 {
72 uint32 seg_nr = __extru(cx, 16, 4);
73 return (void *)__insert(seg_nr << 28, cx, 6, 16);
74 }
75
76
77 /** Convert address pointer to context pointer
78 * \param[in] addr address pointer
79 * \return context pointer
80 */
81 IFX_INLINE uint32 __addr_to_cx(void *addr)
82 {
83 uint32 seg_nr, seg_idx;
84 seg_nr = __extru((int)addr, 28, 4) << 16;
85 seg_idx = __extru((int)addr, 6, 16);
86 return seg_nr | seg_idx;
87 }
88
89
90 /******************************************************************************/
91 IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
92 {
93 *(volatile uint32 *)address = (*(volatile uint32 *)address & ~(mask)) | (mask & value);
94 }
95
96
97 /** 32bit load operation
98 */
99 IFX_INLINE uint32 __ld32(void *addr)
100 {
101 return *(volatile uint32 *)addr;
102 }
103
104
105 /** 32bit store operation
106 */
107 IFX_INLINE void __st32(void *addr, uint32 value)
108 {
109 *(volatile uint32 *)addr = value;
110 }
111
112
113 /** 64bit load operation
114 */
115 IFX_INLINE uint64 __ld64(void *addr)
116 {
117 return *(volatile uint64 *)addr;
118 }
119
120
121 /** 64bit store operation
122 */
123 IFX_INLINE void __st64(void *addr, uint64 value)
124 {
125 *(volatile uint64 *)addr = value;
126 }
127
128
129 /** 64bit load operation which returns the lower and upper 32bit word
130 */
131 IFX_INLINE void __ld64_lu(void *addr, uint32 *valueLower, uint32 *valueUpper)
132 {
133 register uint64 value;
134 value = __ld64(addr);
135 *valueLower = (uint32)value;
136 *valueUpper = (uint32)(value >> 32);
137 }
138
139
140 /** 64bit store operation which stores a lower and upper 32bit word
141 */
142 IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
143 {
144 register uint64 value = ((uint64)valueUpper << 32) | valueLower;
145 __st64(addr, value);
146 }
147
148
149 /******************************************************************************/
150 #endif /* IFXCPU_INTRINSICS_H */
IfxCpu_IntrinsicsDcc.h
__st64
IFX_INLINE void __st64(void *addr, uint64 value)
Definition: IfxCpu_Intrinsics.h:123
__addr_to_cx
IFX_INLINE uint32 __addr_to_cx(void *addr)
Definition: IfxCpu_Intrinsics.h:81
__st32
IFX_INLINE void __st32(void *addr, uint32 value)
Definition: IfxCpu_Intrinsics.h:107
__ld64_lu
IFX_INLINE void __ld64_lu(void *addr, uint32 *valueLower, uint32 *valueUpper)
Definition: IfxCpu_Intrinsics.h:131
uint32
unsigned long uint32
Definition: Platform_Types.h:113
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:91
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCpu_IntrinsicsGhs.h
IfxCpu_IntrinsicsGnuc.h
__st64_lu
IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
Definition: IfxCpu_Intrinsics.h:142
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
__insert
uint32 __insert(uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
__extru
uint32 __extru(uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
IfxCpu_IntrinsicsTasking.h
__ld64
IFX_INLINE uint64 __ld64(void *addr)
Definition: IfxCpu_Intrinsics.h:115
__ld32
IFX_INLINE uint32 __ld32(void *addr)
Definition: IfxCpu_Intrinsics.h:99
__cx_to_addr
IFX_INLINE void * __cx_to_addr(uint32 cx)
Definition: IfxCpu_Intrinsics.h:70


iLLD_TC26B: IfxCpu_IntrinsicsDcc.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsDcc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsDcc.h
3 * \version iLLD_1_0_1_11_0
4 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
5 *
6 *
7 *
8 * IMPORTANT NOTICE
9 *
10 *
11 * Infineon Technologies AG (Infineon) is supplying this file for use
12 * exclusively with Infineon's microcontroller products. This file can be freely
13 * distributed within development tools that are supporting such microcontroller
14 * products.
15 *
16 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
17 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
18 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
19 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
20 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
21 *
22 * \defgroup IfxLld_Cpu_Intrinsics_Dcc intrinsics for DCC compiler
23 * \ingroup IfxLld_Cpu_Intrinsics
24 *
25 */
26 #ifndef IFXCPU_INTRINSICSDCC_H
27 #define IFXCPU_INTRINSICSDCC_H
28 /******************************************************************************/
29 #include "Ifx_Types.h"
30
31 /******************************************************************************/
32 /* *INDENT-OFF* */
33 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_min_smax Minimum and Maximum of (Short) Integers
34 These intrinsic functions return the minimum or maximum of a signed integer, unsigned integer or short integer.
35 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
36 * \{
37 */
38
39 /** Function call without return
40 */
41 asm volatile void Ifx__non_return_call(void (*fun)(void))
42 {
43 % reg fun
44 ji fun
45 }
46
47 /** Jump and link
48 */
49 asm volatile void Ifx__jump_and_link(void (*fun)(void))
50 {
51 % reg fun
52 jli fun
53 }
54
55 /** \} */
56
57 asm volatile void Ifx__moveToDataParam0(unsigned int var)
58 {
59 % reg var
60 ! "%d4"
61 mov %d4, var
62 }
63
64 asm volatile void Ifx__moveToDataParamRet(unsigned int var)
65 {
66 % reg var
67 ! "%d2"
68 mov %d2, var
69 }
70
71 asm volatile unsigned int Ifx__getDataParamRet(void)
72 {
73 ! "%d2"
74 mov %d2, %d2
75 }
76
77 asm volatile void Ifx__moveToAddrParam0(const void *var)
78 {
79 % reg var
80 ! "%a4"
81 mov.aa %a4, var
82 }
83
84 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
85 {
86 Ifx__non_return_call((void (*)(void))fun);
87 }
88
89 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
90 {
91 Ifx__jump_and_link((void (*)(void))fun);
92 }
93
94 asm volatile void Ifx__jumpBackToLink(void)
95 {
96 ! "%a11"
97 ji %a11
98 }
99
100 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_any_type Cross type arithmetic operation
101 *
102 * Macro compatible with float, fix point, signed integer and unsigned integer
103 *
104 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
105 * \{
106 */
107 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
108 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
109 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
110 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
111
112 /** Return minimum of two integers
113 */
114 extern sint32 __min( sint32, sint32) __attribute__((intrinsic_pseudo(3, "min") ));
115
116 #define Ifx__min __min
117
118 /** Return minimum of two short integers
119 */
120 extern sint32 __mins( sint32, sint32) __attribute__((intrinsic_function(0x10b, 0, "min.h") ));
121
122 #define Ifx__mins __mins
123
124 /** Return minimum of two unsigned integers
125 */
126 extern uint32 __minu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "min.u") ));
127
128 #define Ifx__minu __minu
129
130 /** Return maximum of two integers
131 */
132 extern sint32 __max( sint32, sint32) __attribute__((intrinsic_pseudo(3, "max") ));
133
134 #define Ifx__max __max
135
136 /** Return maximum of two short integers
137 */
138 extern uint32 __maxs( uint32, uint32) __attribute__((intrinsic_function(0x10b, 0, "max.h") ));
139
140 #define Ifx__maxs __maxs
141
142 /** Return maximum of two unsigned integers
143 */
144 extern uint32 __maxu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "max.u") ));
145
146 #define Ifx__maxu __maxu
147
148 /** \} */
149
150 /** \defgroup intrinsicstasking_float Floating point operation
151 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
152 * \{
153 */
154 #define Ifx__saturate(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
155
156 #define Ifx__sqrf(X) ((X) * (X))
157 #define Ifx__sqrtf(X) sqrtf(X)
158 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
159
160 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
161 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
162 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
163 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
164 #define Ifx__saturatef(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
165 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
166
167 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
168 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
169 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
170 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
171
172 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
173 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
174 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
175 /** \} */
176
177 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_fractional Fractional Arithmetic Support
178 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
179 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
180 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
181 compiler does support these functions.
182 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
183 * \{
184 */
185
186 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
187 */
188 asm short Ifx__clssf(sfract a)
189 {
190 % reg a
191 ! "%d2"
192 sh a,a,16
193 cls %d2, a
194 }
195
196 /** Convert float to fract
197 */
198 asm fract Ifx__float_to_fract(float a)
199 {
200 % reg a
201 ! "%d2", "%d3"
202 mov %d3, 0
203 ftoq31 %d2, a, %d3
204 }
205
206 /** \brief Convert fract to float
207 */
208 asm float Ifx__fract_to_float(fract a)
209 {
210 % reg a
211 ! "%d2", "%d3"
212 mov %d3, 0
213 q31tof %d2, a, %d3
214 }
215
216 /** Convert __laccum to fract
217 */
218 asm fract Ifx__getfract(laccum a)
219 {
220 % reg a
221 ! "%d2"
222 dextr %d2, a!H, a!L, 17
223 }
224
225 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
226 */
227 #ifdef INTRINSIC_WORKAROUND
228 extern sfract __mac_r_sf(sfract a, sfract b, sfract c);
229 #else
230 asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
231 {
232 % reg a, b, c
233 ! "%d2"
234 maddrs.q %d2, a, bU, cU, 1
235 }
236 #endif
237
238 /** Multiply-add sfract. Returns ( a + b * c )
239 */
240 #ifdef INTRINSIC_WORKAROUND
241 extern sfract __mac_sf(sfract a, sfract b, sfract c);
242 #else
243 asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
244 {
245 % reg a, b, c
246 ! "%d2"
247 madds.q %d2, a, bU, cU, 1
248 }
249 #endif
250
251 /** Integer part of the multiplication of a fract and a fract
252 */
253 asm long Ifx__mulfractfract(fract a, fract b)
254 {
255 % reg a, b
256 ! "%d2"
257 mul.q %d2, a, b, 1
258 }
259
260 /** Integer part of the multiplication of a fract and a long
261 */
262 asm long Ifx__mulfractlong(fract a, long b)
263 {
264 % reg a, b
265 ! "%d2"
266 mul.q %d2, a, b, 1
267 }
268
269 /** Convert fract to sfract
270 */
271 asm sfract Ifx__round16(fract a)
272 {
273 % reg a
274 ! "%d2"
275 mov.u %d2, 0x8000
276 adds %d2, a
277 extr %d2,%d2,0x10,0x10
278 }
279
280 #define Ifx__fract_to_sfract Ifx__round16
281
282 /** Convert float to sfract
283 */
284 IFX_INLINE sfract __float_to_sfract(float a)
285 {
286 fract tmp = Ifx__float_to_fract(a);
287 return Ifx__fract_to_sfract(tmp);
288 }
289
290 /** Convert signed short to sfract
291 */
292 asm sfract Ifx__s16_to_sfract(short a)
293 {
294 % reg a
295 ! "%d2"
296 sh %d2, a, 16
297 sh %d2, %d2, -16
298 }
299
300 /** Convert sfract to signed short
301 */
302 asm short Ifx__sfract_to_s16(sfract a)
303 {
304 % reg a
305 sh a, a, 16
306 sh %d2, a, -16
307 }
308
309 /** Convert sfract to uint16
310 */
311 asm volatile uint16 Ifx__sfract_to_u16(sfract a)
312 {
313 % reg a
314 ! "%d2"
315 sh a, a, 16
316 sh %d2, a, -16
317 }
318
319 /** Left/right shift of an __laccum
320 */
321 asm laccum Ifx__shaaccum(laccum a, sint32 b)
322 {
323 % lab L0, L1; reg a, b
324 ! "%d2", "%d3"
325 jge b, 0, L0
326 sha %d3, a!L, b
327 rsub b, b, 0
328 dextr %d2, a!H, a!L, b
329 j L1
330 L0:
331 dextr %d2, a!H, a!L, b
332 sha %d2, a!L, b
333 L1:
334 }
335
336 /** Left/right shift of an fract
337 */
338 #ifdef INTRINSIC_WORKAROUND
339 extern fract __shafracts(fract a, sint32 b);
340 #else
341 asm fract Ifx__shafracts(fract a, sint32 b)
342 {
343 % reg a, b
344 ! "%d2"
345 shas %d2, a, b
346 }
347 #endif
348
349 /** Left/right shift of an sfract
350 */
351 #ifdef INTRINSIC_WORKAROUND
352 extern sfract __shasfracts(sfract a, sint32 b);
353 #else
354 asm sfract Ifx__shasfracts(sfract a, sint32 b)
355 {
356 % reg a, b
357 ! "%d2"
358 shas %d2, a, b
359 }
360 #endif
361
362 /** Convert uint16 to sfract
363 */
364 asm sfract Ifx__u16_to_sfract(uint16 a)
365 {
366 % reg a
367 ! "%d2"
368 sh %d2, a, 16
369 sh %d2, %d2, -16
370 }
371
372 /** \} */
373
374 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_insert Insert / Extract Bit-fields and Bits
375 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
376 * \{
377 */
378
379 /** Extract a bit-field (bit pos to bit pos+width) from value
380 */
381 extern sint32 __extr( sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr") ));
382
383 #define Ifx__extr __extr
384
385 /** Same as __extr() but return bit-field as unsigned integer
386 */
387 extern uint32 __extru( uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr.u") ));
388
389 #define Ifx__extru __extru
390
391 /** Load a single bit.
392 */
393 #define Ifx__getbit( address, bitoffset ) __extru( *(address), bitoffset, 1 )
394
395 /** Return trg but replace trgbit by srcbit in src.
396 */
397 extern uint32 __ins( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "ins.t") ));
398
399 #define Ifx__ins __ins
400
401 /** Extract bit-field (width w bits starting at bit 0) from a and insert it in
402 * b at position p.
403 */
404 extern uint32 __insert( uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109, 0, "insert") ));
405
406 #define Ifx__insert __insert
407
408 /** Return trg but replace trgbit by inverse of srcbit in src.
409 */
410 extern uint32 __insn( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "insn.t") ));
411
412 #define Ifx__insn __insn
413
414 /** Atomic load-modify-store.
415 */
416 #ifdef INTRINSIC_WORKAROUND
417 extern void __imaskldmst(void* a, sint32 b, sint32 p, const sint32 w);
418 #else
419 asm volatile void Ifx__imaskldmst(void* a, sint32 b, sint32 p, const sint32 w)
420 {
421 % reg a, b, p; con w
422 ! "%d2", "%d3"
423 imask %e2, b, p, w
424 ldmst [a]0, %e2
425 }
426 #endif
427
428 /** Store a single bit.
429 */
430 #define Ifx__putbit(value,address,bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
431
432 /** \} */
433
434 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_interrupt_handling Interrupt Handling
435 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
436 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
437 * \{
438 */
439
440 /** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
441 */
442 extern void __bisr( const uint32) __attribute__((intrinsic_function(0x100, 0, "bisr") ));
443
444 #define Ifx__bisr __bisr
445
446 /** Disable interrupts. Only supported for TriCore1
447 */
448 extern void __disable( void) __attribute__((intrinsic_function(0x103, 0, "disable") ));
449
450 #define Ifx__disable __disable
451
452 /** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
453 */
454 #if defined INTRINSIC_WORKAROUND
455 extern sint32 __disable_and_save(void);
456 #endif
457
458 /** Enable interrupts immediately at function entry
459 */
460 extern void __enable( void) __attribute__((intrinsic_function(0x103, 0, "enable") ));
461
462 #define Ifx__enable __enable
463
464 /** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
465 */
466 extern void __restore( sint32) __attribute__((intrinsic_function(0x104, 0, "restore") ));
467
468 #define Ifx__restore __restore
469
470 /** Call a system call function number
471 */
472 extern void __syscall( const uint32) __attribute__((intrinsic_function(0x100, 0, "syscall") ));
473
474 #define Ifx__syscall __syscall
475
476 /** \} */
477
478 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_miscellaneous Miscellaneous Intrinsic Functions
479 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
480 * \{
481 */
482
483 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
484 */
485 extern void __cacheawi( void*) __attribute__((intrinsic_function(0x110, 0, "cachea.wi") ));
486
487 #define Ifx__cacheawi __cacheawi
488
489 /** Write back and invalidate cache address \"p\" and return post incremented
490 * value of \"p\". Generates CACHEA.WI [Ab+].
491 */
492 asm volatile uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
493 {
494 % reg p
495 !
496 cachea.wi [p + ]0
497 mov.aa %a2, p
498 }
499
500 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
501 */
502 asm volatile void Ifx__cacheiwi(uint8* p)
503 {
504 % reg p
505 !
506 cachei.wi [p]
507 }
508
509 /** Initialize a circular pointer with a dynamically allocated buffer at run-time.
510 */
511 asm circ_t __initcirc(void* buf, uint16 bufsize, uint16 byteindex)
512 {
513 % reg buf, bufsize, byteindex
514 ! "%a2", "%a3"
515 lea %a2, [buf]0
516 extr.u bufsize, bufsize, 0, 16
517 insert bufsize, byteindex, bufsize, 16, 16
518 mov.a %a3, bufsize
519 }
520
521 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
522 * back the result to 32 bits. To scale back the result, 32 bits are extracted
523 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
524 */
525 asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
526 {
527 % reg a, b, offset
528 ! "%d2", "%d3"
529 mul %e2, a, b
530 dextr %d2, %d3, %d2, offset
531 }
532
533 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
534 */
535 asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
536 {
537 % reg operand, count
538 ! "%d2"
539 dextr %d2, operand, operand, count
540 }
541
542 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
543 */
544 asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
545 {
546 % reg operand, count
547 ! "%d2"
548 rsub count, count, 0
549 dextr %d2, operand, operand, count
550 }
551
552 /** \} */
553
554 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_packed Packed Data Type Support
555 The next table provides an overview of the intrinsic functions for initialization of packed data type.
556 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
557 * \{
558 */
559
560 /** Absolute value of __packb
561 */
562 asm __packb Ifx__absb(__packb a)
563 {
564 % reg a
565 ! "%d2"
566 abs.b %d2, a
567 }
568
569 /** Absolute value of __packhw
570 */
571 asm __packhw Ifx__absh(__packhw a)
572 {
573 % reg a
574 ! "%d2"
575 abs.h %d2, a
576 }
577
578 /** Absolute value of __packhw using saturation
579 */
580 asm __packhw Ifx__abssh(__packhw a)
581 {
582 % reg a
583 ! "%d2"
584 abss.h %d2, a
585 }
586
587 /** \brief Extract first byte from a __packb
588 */
589 asm sint8 Ifx__extractbyte1(__packb a)
590 {
591 % reg a
592 ! "%d2"
593 extr %d2, a, 0, 8
594 }
595
596 /** \brief Extract second byte from a __packb
597 */
598 asm sint8 Ifx__extractbyte2(__packb a)
599 {
600 % reg a
601 ! "%d2"
602 extr %d2, a, 8, 8
603 }
604
605 /** \brief Extract third byte from a __packb
606 */
607 asm sint8 Ifx__extractbyte3(__packb a)
608 {
609 % reg a
610 ! "%d2"
611 extr %d2, a, 16, 8
612 }
613
614 /** \brief Extract fourth byte from a __packb
615 */
616 asm sint8 Ifx__extractbyte4(__packb a)
617 {
618 % reg a
619 ! "%d2"
620 extr %d2, a, 24, 8
621 }
622
623 /** \brief Extract first short from a __packhw
624 */
625 asm short Ifx__extracthw1(__packhw a)
626 {
627 % reg a
628 ! "%d2"
629 extr %d2, a, 0, 16
630 }
631
632 /** \brief Extract second short from a __packhw
633 */
634 asm short Ifx__extracthw2(__packhw a)
635 {
636 % reg a
637 ! "%d2"
638 extr %d2, a, 16, 16
639 }
640
641 /** Extract first unsigned byte from a __packb
642 */
643 asm volatile uint8 Ifx__extractubyte1(__upackb a)
644 {
645 % reg a
646 ! "%d2"
647 extr %d2, a, 0, 8
648 }
649
650 /** Extract second unsigned byte from a __packb
651 */
652 asm volatile uint8 Ifx__extractubyte2(__upackb a)
653 {
654 % reg a
655 ! "%d2"
656 extr %d2, a, 8, 8
657 }
658
659 /** Extract third unsigned byte from a __packb
660 */
661 asm volatile uint8 Ifx__extractubyte3(__upackb a)
662 {
663 % reg a
664 ! "%d2"
665 extr %d2, a, 16, 8
666 }
667
668 /** Extract fourth unsigned byte from a __packb
669 */
670 asm volatile uint8 Ifx__extractubyte4(__upackb a)
671 {
672 % reg a
673 ! "%d2"
674 extr %d2, a, 24, 8
675 }
676
677 /** Extract first uint16 from a __packhw
678 */
679 asm volatile uint16 Ifx__extractuhw1(__upackhw a)
680 {
681 % reg a
682 ! "%d2"
683 extr %d2, a, 0, 16
684 }
685
686 /** Extract second uint16 from a __packhw
687 */
688 asm volatile uint16 Ifx__extractuhw2(__upackhw a)
689 {
690 % reg a
691 ! "%d2"
692 extr %d2, a, 16, 16
693 }
694
695 /** Extract first byte from a __packb
696 */
697 asm sint8 Ifx__getbyte1(__packb* a)
698 {
699 % reg a
700 ! "%d2"
701 ld.w %d2, [a]
702 extr %d2, %d2, 0, 8
703 }
704
705 /** Extract second byte from a __packb
706 */
707 asm sint8 Ifx__getbyte2(__packb* a)
708 {
709 % reg a
710 ! "%d2"
711 ld.w %d2, [a]
712 extr %d2, %d2, 8, 8
713 }
714
715 /** Extract third byte from a __packb
716 */
717 asm sint8 Ifx__getbyte3(__packb* a)
718 {
719 % reg a
720 ! "%d2"
721 ld.w %d2, [a]
722 extr %d2, %d2, 16, 8
723 }
724
725 /** Extract fourth byte from a __packb
726 */
727 asm sint8 Ifx__getbyte4(__packb* a)
728 {
729 % reg a
730 ! "%d2"
731 ld.w %d2, [a]
732 extr %d2, %d2, 24, 8
733 }
734
735 /** Extract first short from a __packhw
736 */
737 asm short Ifx__gethw1(__packhw* a)
738 {
739 % reg a
740 ! "%d2"
741 ld.w %d2, [a]
742 extr %d2, %d2, 0, 16
743 }
744
745 /** Extract second short from a __packhw
746 */
747 asm short Ifx__gethw2(__packhw* a)
748 {
749 % reg a
750 ! "%d2"
751 ld.w %d2, [a]
752 extr %d2, %d2, 16, 16
753 }
754
755 /** Extract first unsigned byte from a __packb
756 */
757 asm volatile uint8 Ifx__getubyte1(__upackb* a)
758 {
759 % reg a
760 ! "%d2"
761 ld.w %d2, [a]
762 extr %d2, %d2, 0, 8
763 }
764
765 /** Extract second unsigned byte from a __packb
766 */
767 asm volatile uint8 Ifx__getubyte2(__upackb* a)
768 {
769 % reg a
770 ! "%d2"
771 ld.w %d2, [a]
772 extr %d2, %d2, 8, 8
773 }
774
775 /** Extract third unsigned byte from a __packb
776 */
777 asm volatile uint8 Ifx__getubyte3(__upackb* a)
778 {
779 % reg a
780 ! "%d2"
781 ld.w %d2, [a]
782 extr %d2, %d2, 16, 8
783 }
784
785 /** Extract fourth unsigned byte from a __packb
786 */
787 asm volatile uint8 Ifx__getubyte4(__upackb* a)
788 {
789 % reg a
790 ! "%d2"
791 ld.w %d2, [a]
792 extr %d2, %d2, 24, 8
793 }
794
795 /** Extract first uint16 from a __packhw
796 */
797 asm volatile uint16 Ifx__getuhw1(__upackhw* a)
798 {
799 % reg a
800 ! "%d2"
801 ld.w %d2, [a]
802 extr %d2, %d2, 0, 16
803 }
804
805 /** Extract second uint16 from a __packhw
806 */
807 asm volatile uint16 Ifx__getuhw2(__upackhw* a)
808 {
809 % reg a
810 ! "%d2"
811 ld.w %d2, [a]
812 extr %d2, %d2, 16, 16
813 }
814
815 /** Initialize __packb with four integers
816 */
817 asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
818 {
819 % reg a, b, c, d
820 ! "%d2"
821 insert c, c, d, 8, 8
822 insert d, a, b, 8, 8
823 insert %d2, d, c, 16, 16
824 }
825
826 /** Initialize __packb with a long integer
827 */
828 asm __packb Ifx__initpackbl(long a)
829 {
830 % reg a
831 ! "%d2"
832 mov %d2, a
833 }
834
835 /** \brief Initialize __packhw with two integers
836 */
837 asm __packhw Ifx__initpackhw(short a, short b)
838 {
839 % reg a, b
840 ! "%d2"
841 insert %d2, a, b, 16, 16
842 }
843
844 /** Initialize __packhw with a long integer
845 */
846 asm __packhw Ifx__initpackhwl(long a)
847 {
848 % reg a
849 ! "%d2"
850 mov %d2, a
851 }
852
853 /** Initialize __packb with four unsigned integers
854 */
855 asm __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
856 {
857 % reg a, b, c, d
858 ! "%d2"
859 insert c, c, d, 8, 8
860 insert a, a, b, 8, 8
861 insert %d2, a, c, 16, 16
862 }
863
864 /** Initialize __packhw with two unsigned integers
865 */
866 asm __upackhw Ifx__initupackhw( uint16 a, uint16 b)
867 {
868 % reg a, b
869 ! "%d2"
870 insert %d2, a, b, 16, 16
871 }
872
873 /** \brief Insert sint8 into first byte of a __packb
874 */
875 asm __packb Ifx__insertbyte1(__packb a, sint8 b)
876 {
877 % reg a, b
878 ! "%d2"
879 insert %d2, a, b, 0, 8
880 }
881
882 /** \brief Insert sint8 into second byte of a __packb
883 */
884 asm __packb Ifx__insertbyte2(__packb a, sint8 b)
885 {
886 % reg a, b
887 ! "%d2"
888 insert %d2, a, b, 8, 8
889 }
890
891 /** \brief Insert sint8 into third byte of a __packb
892 */
893 asm __packb Ifx__insertbyte3(__packb a, sint8 b)
894 {
895 % reg a, b
896 ! "%d2"
897 insert %d2, a, b, 16, 8
898 }
899
900 /** \brief Insert sint8 into fourth byte of a __packb
901 */
902 asm __packb Ifx__insertbyte4(__packb a, sint8 b)
903 {
904 % reg a, b
905 ! "%d2"
906 insert %d2, a, b, 24, 8
907 }
908
909 /** Insert short into first halfword of a __packhw
910 */
911 asm __packhw Ifx__inserthw1(__packhw a, short b)
912 {
913 % reg a, b
914 ! "%d2"
915 insert %d2, a, b, 0, 16
916 }
917
918 /** Insert short into second halfword of a __packhw
919 */
920 asm __packhw Ifx__inserthw2(__packhw a, short b)
921 {
922 % reg a, b
923 ! "%d2"
924 insert %d2, a, b, 16, 16
925 }
926
927 /** \brief Insert uint8 into first unsigned byte of a __packb
928 */
929 asm __upackb Ifx__insertubyte1( __upackb a, uint8 b)
930 {
931 % reg a, b
932 ! "%d2"
933 insert %d2, a, b, 0, 8
934 }
935
936 /** \brief Insert uint8 into second unsigned byte of a __packb
937 */
938 asm __upackb Ifx__insertubyte2( __upackb a, uint8 b)
939 {
940 % reg a, b
941 ! "%d2"
942 insert %d2, a, b, 8, 8
943 }
944
945 /** \brief Insert uint8 into third unsigned byte of a __packb
946 */
947 asm __upackb Ifx__insertubyte3( __upackb a, uint8 b)
948 {
949 % reg a, b
950 ! "%d2"
951 insert %d2, a, b, 16, 8
952 }
953
954 /** \brief Insert uint8 into fourth unsigned byte of a __packb
955 */
956 asm __upackb Ifx__insertubyte4( __upackb a, uint8 b)
957 {
958 % reg a, b
959 ! "%d2"
960 insert %d2, a, b, 24, 8
961 }
962
963 /** Insert uint16 into first halfword of a __upackhw
964 */
965 asm __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
966 {
967 % reg a, b
968 ! "%d2"
969 insert %d2, a, b, 0, 16
970 }
971
972 /** Insert uint16 into second halfword of a __upackhw
973 */
974 asm __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
975 {
976 % reg a, b
977 ! "%d2"
978 insert %d2, a, b, 16, 16
979 }
980
981 /** Minimum of two __packb values
982 */
983 #ifdef INTRINSIC_WORKAROUND
984 extern __packb __minb(__packb a, __packb b);
985 #else
986 asm __packb Ifx__minb(__packb a, __packb b)
987 {
988 % reg a, b
989 ! "%d2"
990 min.b %d2, a, b
991 }
992 #endif
993
994 /** Minimum of two __upackb values
995 */
996 asm __upackb Ifx__minbu( __upackb a, __upackb b)
997 {
998 % reg a, b
999 ! "%d2"
1000 min.bu %d2, a, b
1001 }
1002
1003 /** Minimum of two __packhw values
1004 */
1005 asm __packhw Ifx__minh(__packhw a, __packhw b)
1006 {
1007 % reg a, b
1008 ! "%d2"
1009 min.h %d2, a, b
1010 }
1011
1012 /** Minimum of two __upackhw values
1013 */
1014 asm __upackhw Ifx__minhu( __upackhw a, __upackhw b)
1015 {
1016 % reg a, b
1017 ! "%d2"
1018 min.hu %d2, a, b
1019 }
1020
1021 /** Insert sint8 into first byte of a __packb
1022 */
1023 asm volatile void Ifx__setbyte1(__packb* a, sint8 b)
1024 {
1025 % reg a, b
1026 ! "%d2"
1027 ld.w %d2, [a]
1028 insert %d2, %d2, b, 0, 8
1029 st.w [a], %d2
1030 }
1031
1032 /** Insert sint8 into second byte of a __packb
1033 */
1034 asm volatile void Ifx__setbyte2(__packb* a, sint8 b)
1035 {
1036 % reg a, b
1037 ! "%d2"
1038 ld.w %d2, [a]
1039 insert %d2, %d2, b, 8, 8
1040 st.w [a], %d2
1041 }
1042
1043 /** Insert sint8 into third byte of a __packb
1044 */
1045 asm volatile void Ifx__setbyte3(__packb* a, sint8 b)
1046 {
1047 % reg a, b
1048 ! "%d2"
1049 ld.w %d2, [a]
1050 insert %d2, %d2, b, 16, 8
1051 st.w [a], %d2
1052 }
1053
1054 /** Insert sint8 into fourth byte of a __packb
1055 */
1056 asm volatile void Ifx__setbyte4(__packb* a, sint8 b)
1057 {
1058 % reg a, b
1059 ! "%d2"
1060 ld.w %d2, [a]
1061 insert %d2, %d2, b, 24, 8
1062 st.w [a], %d2
1063 }
1064
1065 /** Insert short into first halfword of a __packhw
1066 */
1067 asm volatile void Ifx__sethw1(__packhw* a, short b)
1068 {
1069 % reg a, b
1070 ! "%d2"
1071 ld.w %d2, [a]
1072 insert %d2, %d2, b, 0, 16
1073 st.w [a], %d2
1074 }
1075
1076 /** Insert short into second halfword of a __packhw
1077 */
1078 asm volatile void Ifx__sethw2(__packhw* a, short b)
1079 {
1080 % reg a, b
1081 ! "%d2"
1082 ld.w %d2, [a]
1083 insert %d2, %d2, b, 16, 16
1084 st.w [a], %d2
1085 }
1086
1087 /** Insert uint8 into first byte of a __upackb
1088 */
1089 asm volatile void Ifx__setubyte1(__upackb* a, uint8 b)
1090 {
1091 % reg a, b
1092 ! "%d2"
1093 ld.w %d2, [a]
1094 insert %d2, %d2, b, 0, 8
1095 st.w [a], %d2
1096 }
1097
1098 /** Insert uint8 into second byte of a __upackb
1099 */
1100 asm volatile void Ifx__setubyte2(__upackb* a, uint8 b)
1101 {
1102 % reg a, b
1103 ! "%d2"
1104 ld.w %d2, [a]
1105 insert %d2, %d2, b, 8, 8
1106 st.w [a], %d2
1107 }
1108
1109 /** Insert uint8 into third byte of a __upackb
1110 */
1111 asm volatile void Ifx__setubyte3(__upackb* a, uint8 b)
1112 {
1113 % reg a, b
1114 ! "%d2"
1115 ld.w %d2, [a]
1116 insert %d2, %d2, b, 16, 8
1117 st.w [a], %d2
1118 }
1119
1120 /** Insert uint8 into fourth byte of a __upackb
1121 */
1122 asm volatile void Ifx__setubyte4(__upackb* a, uint8 b)
1123 {
1124 % reg a, b
1125 ! "%d2"
1126 ld.w %d2, [a]
1127 insert %d2, %d2, b, 24, 8
1128 st.w [a], %d2
1129 }
1130
1131 /** Insert uint16 into first halfword of a __upackhw
1132 */
1133 asm volatile void Ifx__setuhw1(__upackhw* a, uint16 b)
1134 {
1135 % reg a, b
1136 ! "%d2"
1137 ld.w %d2, [a]
1138 insert %d2, %d2, b, 0, 16
1139 st.w [a], %d2
1140 }
1141
1142 /** Insert uint16 into second halfword of a __upackhw
1143 */
1144 asm volatile void Ifx__setuhw2(__upackhw* a, uint16 b)
1145 {
1146 % reg a, b
1147 ! "%d2"
1148 ld.w %d2, [a]
1149 insert %d2, %d2, b, 16, 16
1150 st.w [a], %d2
1151 }
1152
1153 /** \} */
1154
1155 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_register Register Handling
1156 The next table provides an overview of the intrinsic functions that you can use to access control registers.
1157 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1158 * \{
1159 */
1160
1161 /** Return absolute value
1162 */
1163 extern sint32 __abs( sint32) __attribute__((intrinsic_pseudo(1, "abs") ));
1164
1165 #define Ifx__abs __abs
1166
1167 /** Return absolue difference of two integers
1168 */
1169 extern sint32 __absdif( sint32, sint32) __attribute__((intrinsic_pseudo(1, "absdif") ));
1170
1171 #define Ifx__absdif __absdif
1172
1173 /** Return absolute value with saturation
1174 */
1175 extern sint32 __abss( sint32) __attribute__((intrinsic_pseudo(1, "abss") ));
1176
1177 #define Ifx__abss __abss
1178
1179 /** Count leading ones in int
1180 */
1181 extern sint32 __clo( sint32) __attribute__((intrinsic_pseudo(1, "clo") ));
1182
1183 #define Ifx__clo __clo
1184
1185 /** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
1186 */
1187 extern sint32 __cls( sint32) __attribute__((intrinsic_pseudo(1, "cls") ));
1188
1189 #define Ifx__cls __cls
1190
1191 /** Count leading zeros in int
1192 */
1193 extern sint32 __clz( sint32) __attribute__((intrinsic_pseudo(1, "clz") ));
1194
1195 #define Ifx__clz __clz
1196
1197 /** Return absolute double precision floating-point value
1198 */
1199 asm double Ifx__fabs(double d)
1200 {
1201 % reg d
1202 ! "%d2"
1203 insert %d2, d, 0, 31, 1
1204 }
1205
1206 /** Return absolute floating-point value
1207 */
1208 asm float Ifx__fabsf(float f)
1209 {
1210 % reg f
1211 ! "%d2"
1212 insert %d2, f, 0, 31, 1
1213 }
1214
1215 /** Move contents of the addressed core SFR into a data register
1216 */
1217 extern sint32 __mfcr( const uint32) __attribute__((intrinsic_function(0x101, 0, "mfcr") ));
1218
1219 #define Ifx__mfcr __mfcr
1220
1221 /** Move contents of a data register (second sint32) to the addressed core SFR (first sint32)
1222 */
1223 extern void __mtcr( const uint32, sint32) __attribute__((intrinsic_function(0x102, 0, "mtcr") ));
1224
1225 #define Ifx__mtcr __mtcr
1226
1227 /** Return parity
1228 */
1229 asm volatile sint32 Ifx__parity(sint32 a)
1230 {
1231 % reg a
1232 ! "%d2"
1233 parity %d2, a
1234 }
1235
1236 /** Return saturated byte
1237 */
1238 asm sint8 Ifx__satb(sint32 a)
1239 {
1240 % reg a
1241 ! "%d2"
1242 sat.b %d2, a
1243 }
1244
1245 /** Return saturated unsigned byte
1246 */
1247 asm volatile uint8 Ifx__satbu(sint32 a)
1248 {
1249 % reg a
1250 ! "%d2"
1251 sat.bu %d2, a
1252 }
1253
1254 /** Return saturated halfword
1255 */
1256 asm short Ifx__sath(sint32 a)
1257 {
1258 % reg a
1259 ! "%d2"
1260 sat.h %d2, a
1261 }
1262
1263 /** Return saturated unsignedhalfword
1264 */
1265 asm volatile uint16 Ifx__sathu(sint32 a)
1266 {
1267 % reg a
1268 ! "%d2"
1269 sat.hu %d2, a
1270 }
1271
1272 /** \} */
1273
1274 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_saturation Saturation Arithmetic Support
1275 These intrinsics support saturation arithmetic
1276 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1277 * \{
1278 */
1279 /** add signed with saturation
1280 */
1281 extern sint32 __adds( sint32, sint32) __attribute__((intrinsic_pseudo(1, "adds") ));
1282
1283 #define Ifx__adds __adds
1284
1285 /** add unsigned with saturation
1286 */
1287 asm volatile uint32 Ifx__addsu(uint32 a, uint32 b)
1288 {
1289 % reg a, b
1290 ! "%d2"
1291 adds.u %d2, a, b
1292 }
1293
1294 /** substract signed with saturation
1295 */
1296 asm volatile sint32 Ifx__subs(sint32 a, sint32 b)
1297 {
1298 % reg a, b
1299 ! "%d2"
1300 subs %d2, a, b
1301 }
1302
1303 /** substract unsigned with saturation
1304 */
1305 asm volatile uint32 Ifx__subsu(uint32 a, uint32 b)
1306 {
1307 % reg a, b
1308 ! "%d2"
1309 subs.u %d2, a, b
1310 }
1311
1312 /** \} */
1313
1314 /** \defgroup IfxLld_Cpu_Intrinsics_Dcc_single_assembly Insert Single Assembly Instruction
1315 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1316 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1317 assembly instructions.
1318 * \ingroup IfxLld_Cpu_Intrinsics_Dcc
1319 * \{
1320 */
1321
1322 /** Insert DEBUG instruction
1323 */
1324 extern void __debug( void) __attribute__((intrinsic_function(0x103, 0, "debug") ));
1325
1326 #define Ifx__debug __debug
1327
1328 /** Insert DSYNC instruction
1329 */
1330 extern void __dsync( void) __attribute__((intrinsic_function(0x103, 0, "dsync") ));
1331
1332 #define Ifx__dsync __dsync
1333
1334 /** Insert ISYNC instruction
1335 */
1336 extern void __isync( void) __attribute__((intrinsic_function(0x103, 0, "isync") ));
1337
1338 #define Ifx__isync __isync
1339
1340 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1341 */
1342 #ifdef INTRINSIC_WORKAROUND
1343 #define __ldmst __ldmst_c
1344 #else
1345 asm volatile void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
1346 {
1347 %reg address, mask, value;
1348 !"%d2", "%d3"
1349 mov %d3, mask
1350 mov %d2, value
1351 ldmst [address],%e2
1352 }
1353
1354 #endif
1355
1356 extern void __scheduling_barrier( void) __attribute__((intrinsic_function(9, 4, "$$sb") ));
1357 #define Ifx__mem_barrier __scheduling_barrier
1358
1359 /** Insert NOP instruction
1360 */
1361 extern void __nop( void) __attribute__((intrinsic_function(0x103, 0, "nop") ));
1362
1363 #define Ifx__nop __nop
1364
1365 #define Ifx__NOP __nops
1366
1367 /** Insert a loop over n NOP instruction
1368 */
1369 asm volatile void Ifx__nops(uint32 cnt)
1370 {
1371 % reg cnt;lab L0;
1372 ! "%a2"
1373 mov %a2,cnt
1374 add.a %a2, -1
1375 L0:
1376 nop
1377 loop %a2, L0
1378 }
1379
1380 /** Insert a loop over n times 1000 NOP instruction
1381 */
1382 asm volatile void Ifx__nops1000(uint32 x)
1383 {
1384 % reg x;
1385 lab L0, L1
1386 ! "%a2", "%a3"
1387 mov.a %a2, x
1388 L1:
1389 lea %a3, 999
1390 L0:
1391 nop
1392 nop
1393 loop %a3, L0
1394 loop %a2, L1
1395 }
1396
1397 /** Insert RSLCX instruction
1398 */
1399 extern void __rslcx( void) __attribute__((intrinsic_function(0x103, 0, "rslcx") ));
1400
1401 #define Ifx__rslcx
1402
1403 /** Insert SVLCX instruction
1404 */
1405 extern void __svlcx( void) __attribute__((intrinsic_function(0x103, 0, "svlcx") ));
1406
1407 #define Ifx__svlcx
1408
1409 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1410 */
1411 #ifdef INTRINSIC_WORKAROUND
1412 extern uint32 __swap(void* place, uint32 value);
1413 #else
1414 asm volatile uint32 Ifx__swap(void* place, uint32 value)
1415 {
1416 % reg place, value
1417 ! "%d2"
1418 mov %d2, value
1419 swap.w [place], %d2
1420 }
1421 #endif
1422
1423 // FIXME
1424 asm volatile unsigned int Ifx__cmpAndSwap(unsigned int *address, unsigned long value, unsigned long CmpVal)
1425 {
1426 %reg value, address, CmpVal
1427 ! "%d2", "%d3"
1428 mov %d2,value
1429 mov %d3,CmpVal
1430 cmpswap.w [address], %e2
1431 }
1432 /** \} */
1433
1434 /** Insert n NOP instruction
1435 */
1436 //#info "NOP: Feature not yet implemented."
1437
1438 #define Ifx__setareg(areg,val) ___setareg(areg,val)
1439 /* we need to use a15 for the address register and not direct that the compiler this will not remove */
1440 #define ___setareg(areg,val) \
1441 { __asm ("#$$bp"); \
1442 __asm (" movh.a\t %a15,"#val"@ha\n"); \
1443 __asm (" lea\t %a15,[%a15]"#val"@l\n"); \
1444 __asm (" mov.aa %"#areg", %a15\n"); \
1445 __asm ("#$$ep"); }
1446
1447 /* FIXME check that the compiler take in account that d0 is used by the inline function */
1448 asm volatile void Ifx__stopPerfCounters(void)
1449 {
1450 ! "%d0"
1451 mov %d0,0
1452 mtcr 0xFC00,%d0
1453 isync
1454 }
1455
1456 /** \brief Convert a fixpoint value to float32
1457 *
1458 * This function converts a value from a fixpoint format to a float32 format.
1459 *
1460 *
1461 * \param value value to be converted.
1462 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1463 *
1464 * \return Returns the converted value in the float32 format.
1465 *
1466 */
1467 asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
1468 {
1469 % reg value, shift
1470 ! "%d2"
1471 q31tof %d2, value, shift
1472 }
1473
1474 asm volatile void* Ifx__getA11(void)
1475 {
1476 ! "%a11", "%a4"
1477 mov.aa %a4, %a11
1478 }
1479
1480 asm void Ifx__setStackPointer(void *stackAddr)
1481 {
1482 % reg stackAddr
1483 ! "%a10"
1484 mov.aa %a10, stackAddr
1485 }
1486
1487 asm volatile unsigned int Ifx__crc32(uint32 b,uint32 a)
1488 {
1489 % reg b, a
1490 ! "%d2"
1491 CRC32 %d2, b, a
1492 }
1493
1494 IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1495 {
1496 uint32 returnvalue = 0; /* set seed value to 0 */
1497 for (;length > 0; length--)
1498 {
1499 /* calculate the CRC over all data */
1500 returnvalue = Ifx__crc32(returnvalue,*startaddress);
1501 startaddress++;
1502 }
1503 return returnvalue;
1504 }
1505
1506 /** \brief Generate the Random value
1507 *
1508 * This function generates the random value by taking a valid seed and limits.
1509 *
1510 * \param a lower limit.
1511 * \param x valid seed value.
1512 * \param m upper limit.
1513 *
1514 * \return Returns the random value.
1515 *
1516 */
1517 asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1518 {
1519 % reg a,x,m; lab cmp_m, sub_m, done;
1520 ! "%d4","%d5","%d6","%d0","%d1","%d2"
1521 mul.u %e4,a,x /* d5 = Eh; d4 = El */
1522 mov %d0,%d4 /* e0 = El */
1523 mov %d1, 0
1524 madd.u %e4,%e0,%d5,5 /* e4 = El + 5 * d5 */
1525 cmp_m:
1526 jge.u %d4,m,sub_m
1527 jz %d5,done
1528 sub_m:
1529 subx %d4,%d4,m /* e4=e4-m */
1530 subc %d5,%d5,%d1 /* d5=d5-0 */
1531 loopu cmp_m
1532 done:
1533 mov %d2,%d4
1534 }
1535
1536 /* Macros for backward compatibility of the intrinsics*/
1537 /******************************************************************************/
1538 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1539 #ifndef __non_return_call
1540 #define __non_return_call Ifx__non_return_call
1541 #endif
1542
1543 #ifndef __jump_and_link
1544 #define __jump_and_link Ifx__jump_and_link
1545 #endif
1546
1547 #ifndef __moveToDataParam0
1548 #define __moveToDataParam0 Ifx__moveToDataParam0
1549 #endif
1550
1551 #ifndef __moveToDataParamRet
1552 #define __moveToDataParamRet Ifx__moveToDataParamRet
1553 #endif
1554
1555 #ifndef __getDataParamRet
1556 #define __getDataParamRet Ifx__getDataParamRet
1557 #endif
1558
1559 #ifndef __moveToAddrParam0
1560 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1561 #endif
1562
1563 #ifndef __jumpToFunction
1564 #define __jumpToFunction Ifx__jumpToFunction
1565 #endif
1566
1567 #ifndef __jumpToFunctionWithLink
1568 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1569 #endif
1570
1571 #ifndef __jumpBackToLink
1572 #define __jumpBackToLink Ifx__jumpBackToLink
1573 #endif
1574
1575 #ifndef __minX
1576 #define __minX Ifx__minX
1577 #endif
1578
1579 #ifndef __maxX
1580 #define __maxX Ifx__maxX
1581 #endif
1582
1583 #ifndef __saturateX
1584 #define __saturateX Ifx__saturateX
1585 #endif
1586
1587 #ifndef __checkrangeX
1588 #define __checkrangeX Ifx__checkrangeX
1589 #endif
1590
1591 #ifndef __saturate
1592 #define __saturate Ifx__saturate
1593 #endif
1594
1595 #ifndef __sqrf
1596 #define __sqrf Ifx__sqrf
1597 #endif
1598
1599 #ifndef __sqrtf
1600 #define __sqrtf Ifx__sqrtf
1601 #endif
1602
1603 #ifndef __checkrange
1604 #define __checkrange Ifx__checkrange
1605 #endif
1606
1607 #ifndef __roundf
1608 #define __roundf Ifx__roundf
1609 #endif
1610
1611 #ifndef __absf
1612 #define __absf Ifx__absf
1613 #endif
1614
1615 #ifndef __minf
1616 #define __minf Ifx__minf
1617 #endif
1618
1619 #ifndef __maxf
1620 #define __maxf Ifx__maxf
1621 #endif
1622
1623 #ifndef __saturatef
1624 #define __saturatef Ifx__saturatef
1625 #endif
1626
1627 #ifndef __checkrangef
1628 #define __checkrangef Ifx__checkrangef
1629 #endif
1630
1631 #ifndef __abs_stdreal
1632 #define __abs_stdreal Ifx__abs_stdreal
1633 #endif
1634
1635 #ifndef __min_stdreal
1636 #define __min_stdreal Ifx__min_stdreal
1637 #endif
1638
1639 #ifndef __max_stdreal
1640 #define __max_stdreal Ifx__max_stdreal
1641 #endif
1642
1643 #ifndef __saturate_stdreal
1644 #define __saturate_stdreal Ifx__saturate_stdreal
1645 #endif
1646
1647 #ifndef __neqf
1648 #define __neqf Ifx__neqf
1649 #endif
1650
1651 #ifndef __leqf
1652 #define __leqf Ifx__leqf
1653 #endif
1654
1655 #ifndef __geqf
1656 #define __geqf Ifx__geqf
1657 #endif
1658
1659 #ifndef __clssf
1660 #define __clssf Ifx__clssf
1661 #endif
1662
1663 #ifndef __float_to_fract
1664 #define __float_to_fract Ifx__float_to_fract
1665 #endif
1666
1667 #ifndef __fract_to_float
1668 #define __fract_to_float Ifx__fract_to_float
1669 #endif
1670
1671 #ifndef __getfract
1672 #define __getfract Ifx__getfract
1673 #endif
1674
1675 #ifndef __mac_r_sf
1676 #define __mac_r_sf Ifx__mac_r_sf
1677 #endif
1678
1679 #ifndef __mac_sf
1680 #define __mac_sf Ifx__mac_sf
1681 #endif
1682
1683 #ifndef __mulfractfract
1684 #define __mulfractfract Ifx__mulfractfract
1685 #endif
1686
1687 #ifndef __mulfractlong
1688 #define __mulfractlong Ifx__mulfractlong
1689 #endif
1690
1691 #ifndef __round16
1692 #define __round16 Ifx__round16
1693 #endif
1694
1695 #ifndef __fract_to_sfract
1696 #define __fract_to_sfract Ifx__fract_to_sfract
1697 #endif
1698
1699 #ifndef __round16
1700 #define __round16 Ifx__round16
1701 #endif
1702
1703 #ifndef __s16_to_sfract
1704 #define __s16_to_sfract Ifx__s16_to_sfract
1705 #endif
1706
1707 #ifndef __sfract_to_s16
1708 #define __sfract_to_s16 Ifx__sfract_to_s16
1709 #endif
1710
1711 #ifndef __sfract_to_u16
1712 #define __sfract_to_u16 Ifx__sfract_to_u16
1713 #endif
1714
1715 #ifndef __shaaccum
1716 #define __shaaccum Ifx__shaaccum
1717 #endif
1718
1719 #ifndef __shafracts
1720 #define __shafracts Ifx__shafracts
1721 #endif
1722
1723 #ifndef __shasfracts
1724 #define __shasfracts Ifx__shasfracts
1725 #endif
1726
1727 #ifndef __u16_to_sfract
1728 #define __u16_to_sfract Ifx__u16_to_sfract
1729 #endif
1730
1731 #ifndef __getbit
1732 #define __getbit Ifx__getbit
1733 #endif
1734
1735 #ifndef __imaskldmst
1736 #define __imaskldmst Ifx__imaskldmst
1737 #endif
1738
1739 #ifndef __putbit
1740 #define __putbit Ifx__putbit
1741 #endif
1742
1743 #ifndef __cacheawi_bo_post_inc
1744 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1745 #endif
1746
1747 #ifndef __cacheiwi
1748 #define __cacheiwi Ifx__cacheiwi
1749 #endif
1750
1751 #ifndef __mulsc
1752 #define __mulsc Ifx__mulsc
1753 #endif
1754
1755 #ifndef __rol
1756 #define __rol Ifx__rol
1757 #endif
1758
1759 #ifndef __ror
1760 #define __ror Ifx__ror
1761 #endif
1762
1763 #ifndef __absb
1764 #define __absb Ifx__absb
1765 #endif
1766
1767 #ifndef __absh
1768 #define __absh Ifx__absh
1769 #endif
1770
1771 #ifndef __abssh
1772 #define __abssh Ifx__abssh
1773 #endif
1774
1775 #ifndef __extractbyte1
1776 #define __extractbyte1 Ifx__extractbyte1
1777 #endif
1778
1779 #ifndef __extractbyte2
1780 #define __extractbyte2 Ifx__extractbyte2
1781 #endif
1782
1783 #ifndef __extractbyte3
1784 #define __extractbyte3 Ifx__extractbyte3
1785 #endif
1786
1787 #ifndef __extractbyte4
1788 #define __extractbyte4 Ifx__extractbyte4
1789 #endif
1790
1791 #ifndef __extracthw1
1792 #define __extracthw1 Ifx__extracthw1
1793 #endif
1794
1795 #ifndef __extracthw2
1796 #define __extracthw2 Ifx__extracthw2
1797 #endif
1798
1799 #ifndef __extractubyte1
1800 #define __extractubyte1 Ifx__extractubyte1
1801 #endif
1802
1803 #ifndef __extractubyte2
1804 #define __extractubyte2 Ifx__extractubyte2
1805 #endif
1806
1807 #ifndef __extractubyte3
1808 #define __extractubyte3 Ifx__extractubyte3
1809 #endif
1810
1811 #ifndef __extractubyte4
1812 #define __extractubyte4 Ifx__extractubyte4
1813 #endif
1814
1815 #ifndef __extractuhw1
1816 #define __extractuhw1 Ifx__extractuhw1
1817 #endif
1818
1819 #ifndef __extractuhw2
1820 #define __extractuhw2 Ifx__extractuhw2
1821 #endif
1822
1823 #ifndef __getbyte1
1824 #define __getbyte1 Ifx__getbyte1
1825 #endif
1826
1827 #ifndef __getbyte2
1828 #define __getbyte2 Ifx__getbyte2
1829 #endif
1830
1831 #ifndef __getbyte3
1832 #define __getbyte3 Ifx__getbyte3
1833 #endif
1834
1835 #ifndef __getbyte4
1836 #define __getbyte4 Ifx__getbyte4
1837 #endif
1838
1839 #ifndef __gethw1
1840 #define __gethw1 Ifx__gethw1
1841 #endif
1842
1843 #ifndef __gethw2
1844 #define __gethw2 Ifx__gethw2
1845 #endif
1846
1847 #ifndef __getubyte1
1848 #define __getubyte1 Ifx__getubyte1
1849 #endif
1850
1851 #ifndef __getubyte2
1852 #define __getubyte2 Ifx__getubyte2
1853 #endif
1854
1855 #ifndef __getubyte3
1856 #define __getubyte3 Ifx__getubyte3
1857 #endif
1858
1859 #ifndef __getubyte4
1860 #define __getubyte4 Ifx__getubyte4
1861 #endif
1862
1863 #ifndef __getuhw1
1864 #define __getuhw1 Ifx__getuhw1
1865 #endif
1866
1867 #ifndef __getuhw2
1868 #define __getuhw2 Ifx__getuhw2
1869 #endif
1870
1871 #ifndef __initpackb
1872 #define __initpackb Ifx__initpackb
1873 #endif
1874
1875 #ifndef __initpackbl
1876 #define __initpackbl Ifx__initpackbl
1877 #endif
1878
1879 #ifndef __initpackhw
1880 #define __initpackhw Ifx__initpackhw
1881 #endif
1882
1883 #ifndef __initpackhwl
1884 #define __initpackhwl Ifx__initpackhwl
1885 #endif
1886
1887 #ifndef __initupackb
1888 #define __initupackb Ifx__initupackb
1889 #endif
1890
1891 #ifndef __initupackhw
1892 #define __initupackhw Ifx__initupackhw
1893 #endif
1894
1895 #ifndef __insertbyte1
1896 #define __insertbyte1 Ifx__insertbyte1
1897 #endif
1898
1899 #ifndef __insertbyte2
1900 #define __insertbyte2 Ifx__insertbyte2
1901 #endif
1902
1903 #ifndef __insertbyte3
1904 #define __insertbyte3 Ifx__insertbyte3
1905 #endif
1906
1907 #ifndef __insertbyte4
1908 #define __insertbyte4 Ifx__insertbyte4
1909 #endif
1910
1911 #ifndef __inserthw1
1912 #define __inserthw1 Ifx__inserthw1
1913 #endif
1914
1915 #ifndef __inserthw2
1916 #define __inserthw2 Ifx__inserthw2
1917 #endif
1918
1919 #ifndef __insertubyte1
1920 #define __insertubyte1 Ifx__insertubyte1
1921 #endif
1922
1923 #ifndef __insertubyte2
1924 #define __insertubyte2 Ifx__insertubyte2
1925 #endif
1926
1927 #ifndef __insertubyte3
1928 #define __insertubyte3 Ifx__insertubyte3
1929 #endif
1930
1931 #ifndef __insertubyte4
1932 #define __insertubyte4 Ifx__insertubyte4
1933 #endif
1934
1935 #ifndef __insertuhw1
1936 #define __insertuhw1 Ifx__insertuhw1
1937 #endif
1938
1939 #ifndef __insertuhw2
1940 #define __insertuhw2 Ifx__insertuhw2
1941 #endif
1942
1943 #ifndef __minb
1944 #define __minb Ifx__minb
1945 #endif
1946
1947 #ifndef __minbu
1948 #define __minbu Ifx__minbu
1949 #endif
1950
1951 #ifndef __minh
1952 #define __minh Ifx__minh
1953 #endif
1954
1955 #ifndef __minhu
1956 #define __minhu Ifx__minhu
1957 #endif
1958
1959 #ifndef __setbyte1
1960 #define __setbyte1 Ifx__setbyte1
1961 #endif
1962
1963 #ifndef __setbyte2
1964 #define __setbyte2 Ifx__setbyte2
1965 #endif
1966
1967 #ifndef __setbyte3
1968 #define __setbyte3 Ifx__setbyte3
1969 #endif
1970
1971 #ifndef __setbyte4
1972 #define __setbyte4 Ifx__setbyte4
1973 #endif
1974
1975 #ifndef __sethw1
1976 #define __sethw1 Ifx__sethw1
1977 #endif
1978
1979 #ifndef __sethw2
1980 #define __sethw2 Ifx__sethw2
1981 #endif
1982
1983 #ifndef __setubyte1
1984 #define __setubyte1 Ifx__setubyte1
1985 #endif
1986
1987 #ifndef __setubyte2
1988 #define __setubyte2 Ifx__setubyte2
1989 #endif
1990
1991 #ifndef __setubyte3
1992 #define __setubyte3 Ifx__setubyte3
1993 #endif
1994
1995 #ifndef __setubyte4
1996 #define __setubyte4 Ifx__setubyte4
1997 #endif
1998
1999 #ifndef __setuhw1
2000 #define __setuhw1 Ifx__setuhw1
2001 #endif
2002
2003 #ifndef __setuhw2
2004 #define __setuhw2 Ifx__setuhw2
2005 #endif
2006
2007 #ifndef __fabs
2008 #define __fabs Ifx__fabs
2009 #endif
2010
2011 #ifndef __fabsf
2012 #define __fabsf Ifx__fabsf
2013 #endif
2014
2015 #ifndef __parity
2016 #define __parity Ifx__parity
2017 #endif
2018
2019 #ifndef __satb
2020 #define __satb Ifx__satb
2021 #endif
2022
2023 #ifndef __satbu
2024 #define __satbu Ifx__satbu
2025 #endif
2026
2027 #ifndef __sath
2028 #define __sath Ifx__sath
2029 #endif
2030
2031 #ifndef __sathu
2032 #define __sathu Ifx__sathu
2033 #endif
2034
2035 #ifndef __addsu
2036 #define __addsu Ifx__addsu
2037 #endif
2038
2039 #ifndef __subs
2040 #define __subs Ifx__subs
2041 #endif
2042
2043 #ifndef __subsu
2044 #define __subsu Ifx__subsu
2045 #endif
2046
2047 #ifndef __ldmst
2048 #define __ldmst Ifx__ldmst
2049 #endif
2050
2051 #ifndef __mem_barrier
2052 #define __mem_barrier Ifx__mem_barrier
2053 #endif
2054
2055 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2056 #define NOP Ifx__NOP
2057 #endif
2058
2059 #ifndef __nops
2060 #define __nops Ifx__nops
2061 #endif
2062
2063 #ifndef __nops1000
2064 #define __nops1000 Ifx__nops1000
2065 #endif
2066
2067 #ifndef __swap
2068 #define __swap Ifx__swap
2069 #endif
2070
2071 #ifndef __cmpAndSwap
2072 #define __cmpAndSwap Ifx__cmpAndSwap
2073 #endif
2074
2075 #ifndef __setareg
2076 #define __setareg Ifx__setareg
2077 #endif
2078
2079 #ifndef __stopPerfCounters
2080 #define __stopPerfCounters Ifx__stopPerfCounters
2081 #endif
2082
2083 #ifndef __fixpoint_to_float32
2084 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
2085 #endif
2086
2087 #ifndef __getA11
2088 #define __getA11 Ifx__getA11
2089 #endif
2090
2091 #ifndef __setStackPointer
2092 #define __setStackPointer Ifx__setStackPointer
2093 #endif
2094
2095 #if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2096 #define __crc32 Ifx__crc32
2097 #endif
2098
2099 #endif
2100 /******************************************************************************/
2101 /* *INDENT-ON* */
2102 /******************************************************************************/
2103 #endif /* IFXCPU_INTRINSICSDCC_H */
Ifx__absb
asm __packb Ifx__absb(__packb a)
Definition: IfxCpu_IntrinsicsDcc.h:562
__shasfracts
#define __shasfracts
Definition: IfxCpu_IntrinsicsDcc.h:1724
Ifx__minh
asm __packhw Ifx__minh(__packhw a, __packhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1005
Ifx__mulfractlong
asm long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsDcc.h:262
Ifx__moveToDataParam0
asm volatile void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsDcc.h:57
IfxCpu_calculateCrc32
IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsDcc.h:1494
__mtcr
void __mtcr(const uint32, sint32) __attribute__((intrinsic_function(0x102
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
Ifx__extracthw2
asm short Ifx__extracthw2(__packhw a)
Extract second short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:634
__disable
void __disable(void) __attribute__((intrinsic_function(0x103
Ifx__nops
asm volatile void Ifx__nops(uint32 cnt)
Definition: IfxCpu_IntrinsicsDcc.h:1369
cls
sint32 cls
Definition: IfxCpu_IntrinsicsDcc.h:1187
Ifx__insertbyte1
asm __packb Ifx__insertbyte1(__packb a, sint8 b)
Insert sint8 into first byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:875
Ifx__shaaccum
asm laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:321
abs
sint32 abs
Definition: IfxCpu_IntrinsicsDcc.h:1163
Ifx__non_return_call
asm volatile void Ifx__non_return_call(void(*fun)(void))
Definition: IfxCpu_IntrinsicsDcc.h:41
Ifx__u16_to_sfract
asm sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsDcc.h:364
Ifx__cacheawi_bo_post_inc
asm volatile uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:492
Ifx__sfract_to_u16
asm volatile uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:311
Ifx__imaskldmst
asm volatile void Ifx__imaskldmst(void *a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsDcc.h:419
__adds
sint32 __adds(sint32, sint32) __attribute__((intrinsic_pseudo(1
Ifx__abssh
asm __packhw Ifx__abssh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:580
__mins
sint32 __mins(sint32, sint32) __attribute__((intrinsic_function(0x10b
__packb
long __packb
Definition: Ifx_TypesDcc.h:30
__float_to_sfract
IFX_INLINE sfract __float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:284
Ifx__extractbyte2
asm sint8 Ifx__extractbyte2(__packb a)
Extract second byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:598
sfract
short sfract
Definition: Ifx_TypesDcc.h:28
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
Ifx__minhu
asm __upackhw Ifx__minhu(__upackhw a, __upackhw b)
Definition: IfxCpu_IntrinsicsDcc.h:1014
Ifx__cacheiwi
asm volatile void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsDcc.h:502
Ifx__getubyte3
asm volatile uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:777
Ifx__getbyte2
asm sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:707
__mac_r_sf
#define __mac_r_sf
Definition: IfxCpu_IntrinsicsDcc.h:1676
Ifx__insertbyte2
asm __packb Ifx__insertbyte2(__packb a, sint8 b)
Insert sint8 into second byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:884
Ifx__setubyte4
asm volatile void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1122
IfxCpu_getRandomVal
asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Generate the Random value.
Definition: IfxCpu_IntrinsicsDcc.h:1517
Ifx__mulfractfract
asm long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsDcc.h:253
__clo
sint32 __clo(sint32) __attribute__((intrinsic_pseudo(1
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsDcc.h:280
Ifx__setubyte3
asm volatile void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1111
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx__initpackb
asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:817
Ifx__setubyte1
asm volatile void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1089
Ifx__setbyte3
asm volatile void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1045
Ifx__clssf
asm short Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:188
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:33
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
Ifx__setubyte2
asm volatile void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1100
Ifx__getA11
asm volatile void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsDcc.h:1474
__ins
uint32 __ins(uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
__isync
void __isync(void) __attribute__((intrinsic_function(0x103
Ifx__extractuhw2
asm volatile uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:688
Ifx__extractbyte4
asm sint8 Ifx__extractbyte4(__packb a)
Extract fourth byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:616
mtcr
void mtcr
Definition: IfxCpu_IntrinsicsDcc.h:1223
Ifx__s16_to_sfract
asm sfract Ifx__s16_to_sfract(short a)
Definition: IfxCpu_IntrinsicsDcc.h:292
Ifx__shafracts
asm fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:341
Ifx__fract_to_float
asm float Ifx__fract_to_float(fract a)
Convert fract to float.
Definition: IfxCpu_IntrinsicsDcc.h:208
Ifx__initpackhwl
asm __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:846
Ifx__extractbyte3
asm sint8 Ifx__extractbyte3(__packb a)
Extract third byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:607
Ifx__extractubyte3
asm volatile uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:661
Ifx__getfract
asm fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsDcc.h:218
Ifx__sethw1
asm volatile void Ifx__sethw1(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1067
Ifx__initupackb
asm __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsDcc.h:855
circ_t
unsigned long long circ_t
Definition: Ifx_TypesDcc.h:35
Ifx__sethw2
asm volatile void Ifx__sethw2(__packhw *a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:1078
Ifx__insertubyte2
asm __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Insert uint8 into second unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:938
Ifx__swap
asm volatile uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1414
Ifx__setStackPointer
asm void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsDcc.h:1480
Ifx__getuhw2
asm volatile uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:807
Ifx__satb
asm sint8 Ifx__satb(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1238
__maxs
uint32 __maxs(uint32, uint32) __attribute__((intrinsic_function(0x10b
Ifx__mulsc
asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsDcc.h:525
abss
sint32 abss
Definition: IfxCpu_IntrinsicsDcc.h:1175
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:32
Ifx__gethw1
asm short Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:737
Ifx__round16
asm sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsDcc.h:271
fract
long fract
Definition: Ifx_TypesDcc.h:27
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
Ifx__insertubyte4
asm __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Insert uint8 into fourth unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:956
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
laccum
long long laccum
Definition: Ifx_TypesDcc.h:29
Ifx__getubyte4
asm volatile uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:787
__cls
sint32 __cls(sint32) __attribute__((intrinsic_pseudo(1
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2068
Ifx__rol
asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:535
Ifx__insertbyte3
asm __packb Ifx__insertbyte3(__packb a, sint8 b)
Insert sint8 into third byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:893
Ifx__extractubyte4
asm volatile uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:670
Ifx__setbyte2
asm volatile void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1034
adds
sint32 adds
Definition: IfxCpu_IntrinsicsDcc.h:1281
Ifx__setuhw2
asm volatile void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1144
__shafracts
#define __shafracts
Definition: IfxCpu_IntrinsicsDcc.h:1720
__minb
#define __minb
Definition: IfxCpu_IntrinsicsDcc.h:1944
__imaskldmst
#define __imaskldmst
Definition: IfxCpu_IntrinsicsDcc.h:1736
Ifx__minbu
asm __upackb Ifx__minbu(__upackb a, __upackb b)
Definition: IfxCpu_IntrinsicsDcc.h:996
Ifx__fixpoint_to_float32
asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsDcc.h:1467
Ifx__shasfracts
asm sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:354
Ifx__subs
asm volatile sint32 Ifx__subs(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1296
Ifx__stopPerfCounters
asm volatile void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsDcc.h:1448
__syscall
void __syscall(const uint32) __attribute__((intrinsic_function(0x100
Ifx__inserthw1
asm __packhw Ifx__inserthw1(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:911
Ifx__minb
asm __packb Ifx__minb(__packb a, __packb b)
Definition: IfxCpu_IntrinsicsDcc.h:986
Ifx__satbu
asm volatile uint8 Ifx__satbu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1247
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:31
Ifx__moveToDataParamRet
asm volatile void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsDcc.h:64
Ifx__absh
asm __packhw Ifx__absh(__packhw a)
Definition: IfxCpu_IntrinsicsDcc.h:571
__abss
sint32 __abss(sint32) __attribute__((intrinsic_pseudo(1
Ifx__fabsf
asm float Ifx__fabsf(float f)
Definition: IfxCpu_IntrinsicsDcc.h:1208
Ifx__gethw2
asm short Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:747
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
Ifx__getubyte1
asm volatile uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:757
__insert
uint32 __insert(uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109
Ifx__ldmst
asm volatile void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsDcc.h:1345
Ifx__extractuhw1
asm volatile uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsDcc.h:679
__extru
uint32 __extru(uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
__insn
uint32 __insn(uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121
__extr
sint32 __extr(sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108
__disable_and_save
#define __disable_and_save
Definition: IfxCpu_IntrinsicsGnuc.h:1863
Ifx__parity
asm volatile sint32 Ifx__parity(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1229
Ifx__getbyte3
asm sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:717
Ifx__inserthw2
asm __packhw Ifx__inserthw2(__packhw a, short b)
Definition: IfxCpu_IntrinsicsDcc.h:920
Ifx__getbyte4
asm sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:727
__scheduling_barrier
void __scheduling_barrier(void) __attribute__((intrinsic_function(9
Ifx__nops1000
asm volatile void Ifx__nops1000(uint32 x)
Definition: IfxCpu_IntrinsicsDcc.h:1382
Ifx__extractubyte1
asm volatile uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:643
uint16
unsigned short uint16
Definition: Platform_Types.h:109
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
__enable
void __enable(void) __attribute__((intrinsic_function(0x103
__bisr
void __bisr(const uint32) __attribute__((intrinsic_function(0x100
Ifx__mac_sf
asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:243
Ifx__getDataParamRet
asm volatile unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsDcc.h:71
Ifx__moveToAddrParam0
asm volatile void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsDcc.h:77
__restore
void __restore(sint32) __attribute__((intrinsic_function(0x104
Ifx__addsu
asm volatile uint32 Ifx__addsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1287
Ifx__subsu
asm volatile uint32 Ifx__subsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsDcc.h:1305
__abs
sint32 __abs(sint32) __attribute__((intrinsic_pseudo(1
Ifx__setbyte4
asm volatile void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1056
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
__svlcx
void __svlcx(void) __attribute__((intrinsic_function(0x103
sint32
long sint32
Definition: Platform_Types.h:131
Ifx__setbyte1
asm volatile void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsDcc.h:1023
Ifx__insertubyte1
asm __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Insert uint8 into first unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:929
Ifx__ror
asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsDcc.h:544
Ifx__cmpAndSwap
asm volatile unsigned int Ifx__cmpAndSwap(unsigned int *address, unsigned long value, unsigned long CmpVal)
Definition: IfxCpu_IntrinsicsDcc.h:1424
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsDcc.h:84
min
sint32 min
Definition: IfxCpu_IntrinsicsDcc.h:114
__rslcx
void __rslcx(void) __attribute__((intrinsic_function(0x103
Ifx__initpackhw
asm __packhw Ifx__initpackhw(short a, short b)
Initialize __packhw with two integers.
Definition: IfxCpu_IntrinsicsDcc.h:837
Ifx__insertuhw2
asm __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:974
Ifx__getubyte2
asm volatile uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsDcc.h:767
Ifx__extractubyte2
asm volatile uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsDcc.h:652
__absdif
sint32 __absdif(sint32, sint32) __attribute__((intrinsic_pseudo(1
Ifx__insertubyte3
asm __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Insert uint8 into third unsigned byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:947
Ifx__mac_r_sf
asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsDcc.h:230
Ifx__extracthw1
asm short Ifx__extracthw1(__packhw a)
Extract first short from a __packhw.
Definition: IfxCpu_IntrinsicsDcc.h:625
Ifx__initpackbl
asm __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsDcc.h:828
Ifx__fabs
asm double Ifx__fabs(double d)
Definition: IfxCpu_IntrinsicsDcc.h:1199
isync
void isync
Definition: IfxCpu_IntrinsicsDcc.h:1336
Ifx__sath
asm short Ifx__sath(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1256
Ifx__initupackhw
asm __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:866
Ifx__sathu
asm volatile uint16 Ifx__sathu(sint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1265
nop
void nop
Definition: IfxCpu_IntrinsicsDcc.h:1361
Ifx__jump_and_link
asm volatile void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsDcc.h:49
Ifx__jumpBackToLink
asm volatile void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsDcc.h:94
Ifx__extractbyte1
asm sint8 Ifx__extractbyte1(__packb a)
Extract first byte from a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:589
uint8
unsigned char uint8
Definition: Platform_Types.h:105
__initcirc
asm circ_t __initcirc(void *buf, uint16 bufsize, uint16 byteindex)
Definition: IfxCpu_IntrinsicsDcc.h:511
Ifx__insertuhw1
asm __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:965
sint8
signed char sint8
Definition: Platform_Types.h:122
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsDcc.h:89
Ifx__insertbyte4
asm __packb Ifx__insertbyte4(__packb a, sint8 b)
Insert sint8 into fourth byte of a __packb.
Definition: IfxCpu_IntrinsicsDcc.h:902
Ifx__getbyte1
asm sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsDcc.h:697
Ifx__getuhw1
asm volatile uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsDcc.h:797
__cacheawi
void __cacheawi(void *) __attribute__((intrinsic_function(0x110
__mac_sf
#define __mac_sf
Definition: IfxCpu_IntrinsicsDcc.h:1680
Ifx__float_to_fract
asm fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsDcc.h:198
insert
uint32 insert
Definition: IfxCpu_IntrinsicsDcc.h:404
Ifx__setuhw1
asm volatile void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsDcc.h:1133
extr
sint32 extr
Definition: IfxCpu_IntrinsicsDcc.h:381
Ifx__crc32
asm volatile unsigned int Ifx__crc32(uint32 b, uint32 a)
Definition: IfxCpu_IntrinsicsDcc.h:1487
Ifx__sfract_to_s16
asm short Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsDcc.h:302


iLLD_TC26B: IfxCpu_IntrinsicsGhs.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsGhs.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsGhs.h
3 *
4 * \version iLLD_1_0_1_11_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup IfxLld_Cpu_Intrinsics_Ghs Intrinsics for GNU compiler
24 * \ingroup IfxLld_Cpu_Intrinsics
25 *
26 */
27
28 #ifndef IFXCPU_INTRINSICSGHS_H
29 #define IFXCPU_INTRINSICSGHS_H
30
31 /******************************************************************************/
32 #include "Ifx_Types.h"
33 #include <intrinsics.h>
34
35 /******************************************************************************/
36 /* *INDENT-OFF* */
37 #define STRINGIFY(x) #x
38
39 typedef void (*voidfunc)();
40
41 /** Function call without return
42 */
43 #define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
44
45 /** Jump and link
46 */
47 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
48 {
49 __asm__ volatile ("jli %0"::"a"(fun));
50 }
51
52 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
53 {
54 __asm__ volatile ("mov\t d4, %0"::"d"(var));
55 }
56
57 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
58 {
59 __asm__ volatile ("mov\t d2, %0"::"d"(var));
60 }
61
62 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
63 {
64 unsigned int var;
65 __asm__ volatile (" mov\t %0, d2":"=d"(var));
66 return var;
67 }
68
69 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
70 {
71 __asm__ volatile ("mov.aa\t a4, %0"::"a"(var));
72 }
73
74 IFX_INLINE void Ifx__jumpToFunction(void (*fun)(void))
75 {
76 Ifx__non_return_call(fun);
77 }
78
79 IFX_INLINE void Ifx__jumpToFunctionWithLink(void (*fun)(void))
80 {
81 Ifx__jump_and_link(fun);
82 }
83
84 IFX_INLINE void Ifx__jumpBackToLink(void)
85 {
86 __asm__ volatile ("ji a11");
87 }
88
89 /** Insert a memory barrier
90 */
91 #define Ifx__mem_barrier __asm__ volatile("":::"memory");
92
93 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_any_type Cross type arithmetic operation
94 *
95 * Macro compatible with float, fix point, signed integer and unsigned integer
96 *
97 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
98 * \{
99 */
100 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
101 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
102 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
103 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
104 /** \} */
105
106 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_singed_integer Signed integer operation
107 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
108 * \{
109 */
110 #define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
111 /** \} */
112
113 /** \defgroup IfxLld_Cpu_Intrinsics_Ghs_unsinged_integer Unsigned integer operation
114 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
115 * \{
116 */
117 #define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
118 /** \} */
119
120 /** \defgroup intrinsicsghs_float Floating point operation
121 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
122 * \{
123 */
124
125 #define Ifx__sqrf(X) ((X) * (X))
126 #define Ifx__sqrtf(X) sqrtf(X)
127 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
128
129 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
130 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
131 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
132 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
133 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
134 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
135
136 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
137 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
138 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
139 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
140
141 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
142 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
143 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
144 /** \} */
145
146 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsfractional Fractional Arithmetic Support
147 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
148 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
149 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
150 compiler does support these functions.
151 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
152 * \{
153 */
154
155 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
156 */
157 IFX_INLINE sint16 Ifx__clssf(sfract a)
158 {
159 sint16 res;
160 __asm__ volatile ("sh %1,%1,16 \n\
161 cls %0,%1":"=d"(res):"d"(a):"memory");
162 return res;
163 }
164
165 /** Convert fract to float
166 */
167 IFX_INLINE float Ifx__fract_to_float(fract a)
168 {
169 float res;
170 __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
171 return res;
172 }
173
174 /** Convert float to fract
175 */
176 IFX_INLINE fract Ifx__float_to_fract(float a)
177 {
178 fract res;
179 __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
180 return res;
181 }
182
183 /** Convert laccum to fract
184 */
185 IFX_INLINE fract Ifx__getfract(laccum a)
186 {
187 fract res;
188 __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
189 return res;
190 }
191
192 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
193 */
194 IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
195 {
196 sfract res;
197 __asm__ volatile ("sh %1,%1,16 \n\
198 maddrs.q %0,%1,%2L,%3L,1 \n\
199 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
200 return res;
201 }
202
203 /** Multiply-add sfract. Returns ( a + b * c )
204 */
205 IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
206 {
207 sfract res;
208 __asm__ volatile ("sh %1,%1,16 \n\
209 madds.q %0,%1,%2L,%3L,1 \n\
210 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
211 return res;
212 }
213
214 /** Integer part of the multiplication of a fract and a fract
215 */
216 IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
217 {
218 long res;
219 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
220 return res;
221 }
222
223 /** Integer part of the multiplication of a fract and a long
224 */
225 IFX_INLINE long Ifx__mulfractlong(fract a, long b)
226 {
227 long res;
228 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
229 return res;
230 }
231
232 /** Convert fract to sfract
233 */
234 IFX_INLINE sfract Ifx__round16(fract a)
235 {
236 sfract res;
237 __asm__ volatile ("mov.u %0,0x8000 \n\
238 adds %0,%1 \n\
239 extr %0,%0,0x10,0x10 "
240 :"=&d"(res):"d"(a):"memory");
241 return res;
242 }
243
244 #define Ifx__fract_to_sfract Ifx__round16
245
246 /** Convert float to sfract
247 */
248 IFX_INLINE sfract Ifx__float_to_sfract(float a)
249 {
250 fract tmp = Ifx__float_to_fract(a);
251 return Ifx__fract_to_sfract(tmp);
252 }
253
254 /** Convert signed sint16 to sfract
255 */
256 IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
257 {
258 sfract res;
259 __asm__ volatile ("sh %0,%1,16 \n\
260 sh %0,%0,-16":"=d"(res):"d"(a):"memory");
261 return res;
262 }
263
264 /** Convert sfract to sint16
265 */
266 IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
267 {
268 sint16 res;
269 __asm__ volatile ("sh %1,%1,16 \n\
270 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
271 return res;
272 }
273
274 /** Convert sfract to uint16
275 */
276 IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
277 {
278 uint16 res;
279 __asm__ volatile ("sh %1,%1,16 \n\
280 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
281 return res;
282 }
283
284 /** Left/right shift of an __laccum
285 */
286 __asm__ laccum Ifx__shaaccum(laccum a, sint32 b)
287 {
288 % lab L0, L1; reg a, b
289 ! "%d2", "%d3"
290 jge b, 0, L0
291 sha %d3, a!L, b
292 rsub b, b, 0
293 dextr %d2, a!H, a!L, b
294 j L1
295 L0:
296 dextr %d2, a!H, a!L, b
297 sha %d2, a!L, b
298 L1:
299 }
300
301 /** Left/right shift of an fract
302 */
303 IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
304 {
305 fract res;
306 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
307 return res;
308 }
309
310 /** Left/right shift of an sfract
311 */
312 IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
313 {
314 sfract res;
315 __asm__ volatile ("sh %1,%1,16 \n\
316 shas %0,%1,%2 \n\
317 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b):"memory");
318 return res;
319 }
320
321 /** Convert uint16 to sfract
322 */
323 IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
324 {
325 sfract res;
326 __asm__ volatile ("sh %0,%1,16 \n\
327 sh %0,%0,-16":"=d"(res):"d"(a):"memory");
328 return res;
329 }
330
331 /** \} */
332
333 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsinsert Insert / Extract Bit-fields and Bits
334 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
335 * \{
336 */
337
338 /** Extract a bit-field (bit pos to bit pos+width) from value
339 */
340 IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
341 {
342 sint32 res;
343 __asm__ volatile ("mov d14,%2 \n\
344 mov d15,%3 \n\
345 extr %0,%1,e14"
346 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
347 return res;
348 }
349
350 /** Same as __extr() but return bit-field as unsigned integer
351 */
352 IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
353 {
354 uint32 res;
355 __asm__ volatile ("mov d14,%2 \n\
356 mov d15,%3 \n\
357 extr.u %0,%1,e14"\
358 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
359 return res;
360 }
361
362 /** Load a single bit.
363 */
364 //#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
365 #define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
366
367 /** Atomic load-modify-store.
368 */
369 #define Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
370
371 /** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
372 */
373 IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
374 {
375 sint32 res;
376 __asm__ volatile ("mov d14,%3 \n\
377 mov d15,%4 \n\
378 insert %0,%1,%2,e14"
379 :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
380 return res;
381 }
382
383 /** Store a single bit.
384 */
385 #define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
386
387 /** \} */
388
389 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsinterrupt_handling Interrupt Handling
390 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
391 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
392 * \{
393 */
394
395 /** \} */
396
397 /** \defgroup IfxLld_Cpu_Intrinsics_Ghsmiscellaneous Miscellaneous Intrinsic Functions
398 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
399 * \{
400 */
401
402 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
403 */
404 IFX_INLINE void Ifx__cacheawi(uint8* p)
405 {
406 __asm__ volatile("cachea.wi [%0]0"::"a"(p));
407 }
408 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
409 */
410 IFX_INLINE void Ifx__cacheiwi(uint8* p)
411 {
412 __asm__ volatile("cachei.wi [%0]0"::"a"(p));
413 }
414
415 /** Write back and invalidate cache address \"p\" and return post incremented
416 * value of \"p\". Generates CACHEA.WI [Ab+].
417 */
418 IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
419 {
420 __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
421 return p;
422 }
423
424 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
425 * back the result to 32 bits. To scale back the result, 32 bits are extracted
426 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
427 */
428 IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
429 {
430 sint32 res;
431 __asm__ volatile("mul e12,%1,%2 \n\
432 dextr %0,d13,d12,%3"
433 :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
434 return res;
435 }
436
437 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
438 */
439 IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
440 {
441 uint32 res;
442 __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
443 return res;
444 }
445
446 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
447 */
448 IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
449 {
450 uint32 res;
451 __asm__ volatile("rsub %2,%2,0 \n\
452 dextr %0,%1,%1,%2"
453 :"=d"(res):"d"(operand), "d"(count):"memory");
454 return res;
455 }
456 /** \} */
457
458 /** \defgroup IfxLld_Cpu_Intrinsics_Ghspacked Packed Data Type Support
459 The next table provides an overview of the intrinsic functions for initialization of packed data type.
460 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
461 * \{
462 */
463
464 /** Extract first byte from a __packb
465 */
466 IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
467 {
468 sint8 res;
469 __asm__ volatile ("extr %0,%1,0,8"
470 :"=d"(res):"d"(a):"memory");
471 return res;
472 }
473
474 /** Extract second byte from a __packb
475 */
476 IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
477 {
478 sint8 res;
479 __asm__ volatile ("extr %0,%1,8,8"
480 :"=d"(res):"d"(a):"memory");
481 return res;
482 }
483
484 /** Extract third byte from a __packb
485 */
486 IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
487 {
488 sint8 res;
489 __asm__ volatile ("extr %0,%1,16,8"
490 :"=d"(res):"d"(a):"memory");
491 return res;
492 }
493
494 /** Extract fourth byte from a __packb
495 */
496 IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
497 {
498 sint8 res;
499 __asm__ volatile ("extr %0,%1,24,8"
500 :"=d"(res):"d"(a):"memory");
501 return res;
502 }
503
504 /** Extract first sint16 from a __packhw
505 */
506 IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
507 {
508 sint16 res;
509 __asm__ volatile ("extr %0,%1,0,16"
510 :"=d"(res):"d"(a):"memory");
511 return res;
512 }
513
514 /** Extract second sint16 from a __packhw
515 */
516 IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
517 {
518 sint16 res;
519 __asm__ volatile ("extr %0,%1,16,16"
520 :"=d"(res):"d"(a):"memory");
521 return res;
522 }
523
524 /** Extract first uint8 from a __packb
525 */
526 IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
527 {
528 uint8 res;
529 __asm__ volatile ("extr %0,%1,0,8"
530 :"=d"(res):"d"(a):"memory");
531 return res;
532 }
533
534 /** Extract second uint8 from a __packb
535 */
536 IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
537 {
538 uint8 res;
539 __asm__ volatile ("extr %0,%1,8,8"
540 :"=d"(res):"d"(a):"memory");
541 return res;
542 }
543
544 /** Extract third uint8 from a __packb
545 */
546 IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
547 {
548 uint8 res;
549 __asm__ volatile ("extr %0,%1,16,8"
550 :"=d"(res):"d"(a):"memory");
551 return res;
552 }
553
554 /** Extract fourth uint8 from a __packb
555 */
556 IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
557 {
558 uint8 res;
559 __asm__ volatile ("extr %0,%1,24,8"
560 :"=d"(res):"d"(a):"memory");
561 return res;
562 }
563
564 /** Extract first uint16 from a __packhw
565 */
566 IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
567 {
568 uint16 res;
569 __asm__ volatile ("extr %0,%1,0,16"
570 :"=d"(res):"d"(a):"memory");
571 return res;
572 }
573
574 /** Extract second uint16 from a __packhw
575 */
576 IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
577 {
578 uint16 res;
579 __asm__ volatile ("extr %0,%1,16,16"
580 :"=d"(res):"d"(a):"memory");
581 return res;
582 }
583
584 /** Extract first byte from a __packb
585 */
586 IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
587 {
588 sint8 res;
589 __asm__ volatile ("ld.w %0,[%1]0 \n\
590 extr %0,%0,0,8"
591 :"=d"(res):"a"(a):"memory");
592 return res;
593
594 }
595
596 /** Extract second byte from a __packb
597 */
598 IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
599 {
600 sint8 res;
601 __asm__ volatile ("ld.w %0,[%1]0 \n\
602 extr %0,%0,8,8"
603 :"=d"(res):"a"(a):"memory");
604 return res;
605
606 }
607
608 /** Extract third byte from a __packb
609 */
610 IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
611 {
612 sint8 res;
613 __asm__ volatile ("ld.w %0,[%1]0 \n\
614 extr %0,%0,16,8"
615 :"=d"(res):"a"(a):"memory");
616 return res;
617
618 }
619
620 /** Extract fourth byte from a __packb
621 */
622 IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
623 {
624 sint8 res;
625 __asm__ volatile ("ld.w %0,[%1]0 \n\
626 extr %0,%0,24,8"
627 :"=d"(res):"a"(a):"memory");
628 return res;
629
630 }
631
632 /** Extract first sint16 from a __packhw
633 */
634 IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
635 {
636 sint16 res;
637 __asm__ volatile ("ld.w %0,[%1]0 \n\
638 extr %0,%0,0,16"
639 :"=d"(res):"a"(a):"memory");
640 return res;
641 }
642 /** Extract second sint16 from a __packhw
643 */
644 IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
645 {
646 sint16 res;
647 __asm__ volatile ("ld.w %0,[%1]0 \n\
648 extr %0,%0,16,16"
649 :"=d"(res):"a"(a):"memory");
650 return res;
651 }
652
653 /** Extract first uint8 from a __packb
654 */
655 IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
656 {
657 uint8 res;
658 __asm__ volatile ("ld.w %0,[%1]0 \n\
659 extr %0,%0,0,8"
660 :"=d"(res):"a"(a):"memory");
661 return res;
662 }
663
664 /** Extract second uint8 from a __packb
665 */
666 IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
667 {
668 uint8 res;
669 __asm__ volatile ("ld.w %0,[%1]0 \n\
670 extr %0,%0,8,8"
671 :"=d"(res):"a"(a):"memory");
672 return res;
673 }
674
675 /** Extract third uint8 from a __packb
676 */
677 IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
678 {
679 uint8 res;
680 __asm__ volatile ("ld.w %0,[%1]0 \n\
681 extr %0,%0,16,8"
682 :"=d"(res):"a"(a):"memory");
683 return res;
684 }
685
686 /** Extract fourth uint8 from a __packb
687 */
688 IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
689 {
690 uint8 res;
691 __asm__ volatile ("ld.w %0,[%1]0 \n\
692 extr %0,%0,24,8"
693 :"=d"(res):"a"(a):"memory");
694 return res;
695 }
696
697 /** Extract first uint16 from a __packhw
698 */
699 IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
700 {
701 uint16 res;
702 __asm__ volatile ("ld.w %0,[%1]0 \n\
703 extr %0,%0,0,16"
704 :"=d"(res):"a"(a):"memory");
705 return res;
706 }
707
708 /** Extract second uint16 from a __packhw
709 */
710 IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
711 {
712 uint16 res;
713 __asm__ volatile ("ld.w %0,[%1]0 \n\
714 extr %0,%0,16,16"
715 :"=d"(res):"a"(a):"memory");
716 return res;
717 }
718
719 /** Initialize __packb with four integers
720 */
721 IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
722 {
723 __packb res;
724 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
725 insert %4,%1,%2,8,8 \n\
726 insert %0,%4,%3,16,16 "
727 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
728 return res;
729 }
730
731 /** Initialize __packb with a long integer
732 */
733 IFX_INLINE __packb Ifx__initpackbl(long a)
734 {
735 return (__packb) a;
736 }
737
738 /** Initialize __packhw with two integers
739 */
740 IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
741 {
742 __packhw res;
743 __asm__ volatile ("insert %0,%1,%2,16,16"
744 :"=d"(res):"d"(a), "d"(b):"memory");
745 return res;
746 }
747
748 /** Initialize __packhw with a long integer
749 */
750 IFX_INLINE __packhw Ifx__initpackhwl(long a)
751 {
752 return a;
753 }
754
755 /** Initialize __packb with four unsigned integers
756 */
757 IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
758 {
759 __upackb res;
760 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
761 insert %1,%1,%2,8,8 \n\
762 insert %0,%1,%3,16,16"
763 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
764 return res;
765 }
766
767 /** Initialize __packhw with two unsigned integers
768 */
769 IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
770 {
771 __upackhw res;
772 __asm__ volatile ("insert %0,%1,%2,16,16"
773 :"=d"(res):"d"(a), "d"(b):"memory");
774 return res;
775 }
776
777 /** Insert sint8 into first byte of a __packb
778 */
779 IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
780 {
781 __packb res;
782 __asm__ volatile ("insert %0,%1,%2,0,8"
783 :"=d"(res):"d"(a), "d"(b):"memory");
784 return res;
785 }
786
787 /** Insert sint8 into second byte of a __packb
788 */
789 IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
790 {
791 __packb res;
792 __asm__ volatile ("insert %0,%1,%2,8,8"
793 :"=d"(res):"d"(a), "d"(b):"memory");
794 return res;
795 }
796
797 /** Insert sint8 into third byte of a __packb
798 */
799 IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
800 {
801 __packb res;
802 __asm__ volatile ("insert %0,%1,%2,16,8"
803 :"=d"(res):"d"(a), "d"(b):"memory");
804 return res;
805 }
806
807 /** Insert sint8 into fourth byte of a __packb
808 */
809 IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
810 {
811 __packb res;
812 __asm__ volatile ("insert %0,%1,%2,24,8"
813 :"=d"(res):"d"(a), "d"(b):"memory");
814 return res;
815 }
816
817 /** Insert sint8 into first uint8 of a __packb
818 */
819 IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
820 {
821 __upackb res;
822 __asm__ volatile ("insert %0,%1,%2,0,8"
823 :"=d"(res):"d"(a), "d"(b):"memory");
824 return res;
825 }
826
827 /** Insert sint8 into second uint8 of a __packb
828 */
829 IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
830 {
831 __upackb res;
832 __asm__ volatile ("insert %0,%1,%2,8,8"
833 :"=d"(res):"d"(a), "d"(b):"memory");
834 return res;
835 }
836
837 /** Insert sint8 into third uint8 of a __packb
838 */
839 IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
840 {
841 __upackb res;
842 __asm__ volatile ("insert %0,%1,%2,16,8"
843 :"=d"(res):"d"(a), "d"(b):"memory");
844 return res;
845 }
846
847 /** Insert sint8 into fourth uint8 of a __packb
848 */
849 IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
850 {
851 __upackb res;
852 __asm__ volatile ("insert %0,%1,%2,24,8"
853 :"=d"(res):"d"(a), "d"(b):"memory");
854 return res;
855 }
856
857 /** Insert sint16 into first halfword of a __packhw
858 */
859 IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
860 {
861 __packhw res;
862 __asm__ volatile ("insert %0,%1,%2,0,16"
863 :"=d"(res):"d"(a), "d"(b):"memory");
864 return res;
865 }
866
867 /** Insert sint16 into second halfword of a __packhw
868 */
869 IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
870 {
871 __packhw res;
872 __asm__ volatile ("insert %0,%1,%2,16,16"
873 :"=d"(res):"d"(a), "d"(b):"memory");
874 return res;
875 }
876
877 /** Insert uint16 into first halfword of a __upackhw
878 */
879 IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
880 {
881 __upackhw res;
882 __asm__ volatile ("insert %0,%1,%2,0,16"
883 :"=d"(res):"d"(a), "d"(b):"memory");
884 return res;
885 }
886
887 /** Insert uint16 into second halfword of a __upackhw
888 */
889 IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
890 {
891 __upackhw res;
892 __asm__ volatile ("insert %0,%1,%2,16,16"
893 :"=d"(res):"d"(a), "d"(b):"memory");
894 return res;
895 }
896
897 /** Insert sint8 into first byte of a __packb
898 */
899 IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
900 {
901 __asm__ volatile ("ld.w d15,[%0] \n\
902 insert d15,d15,%1,0,8 \n\
903 st.w [%0],d15"
904 ::"a"(a), "d"(b):"d15", "memory");
905 }
906
907 /** Insert sint8 into second byte of a __packb
908 */
909 IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
910 {
911 __asm__ volatile ("ld.w d15,[%0] \n\
912 insert d15,d15,%1,8,8 \n\
913 st.w [%0],d15"
914 ::"a"(a), "d"(b):"d15", "memory");
915 }
916
917 /** Insert sint8 into third byte of a __packb
918 */
919 IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
920 {
921 __asm__ volatile ("ld.w d15,[%0] \n\
922 insert d15,d15,%1,16,8 \n\
923 st.w [%0],d15"
924 ::"a"(a), "d"(b):"d15", "memory");
925 }
926
927 /** Insert sint8 into fourth byte of a __packb
928 */
929 IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
930 {
931 __asm__ volatile ("ld.w d15,[%0] \n\
932 insert d15,d15,%1,24,8 \n\
933 st.w [%0],d15"
934 ::"a"(a), "d"(b):"d15", "memory");
935 }
936
937 /** Insert sint16 into first halfword of a __packhw
938 */
939 IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
940 {
941 __asm__ volatile ("ld.w d15,[%0] \n\
942 insert d15,d15,%1,0,16 \n\
943 st.w [%0],d15"
944 ::"a"(a), "d"(b):"d15", "memory");
945 }
946
947 /** Insert sint16 into second halfword of a __packhw
948 */
949 IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
950 {
951 __asm__ volatile ("ld.w d15,[%0] \n\
952 insert d15,d15,%1,16,16 \n\
953 st.w [%0],d15"
954 ::"a"(a), "d"(b):"d15", "memory");
955 }
956
957 /** Insert uint8 into first byte of a __upackb
958 */
959 IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
960 {
961 __asm__ volatile ("ld.w d15,[%0] \n\
962 insert d15,d15,%1,0,8 \n\
963 st.w [%0],d15"
964 ::"a"(a), "d"(b):"d15", "memory");
965 }
966
967 /** Insert uint8 into second byte of a __upackb
968 */
969 IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
970 {
971 __asm__ volatile ("ld.w d15,[%0] \n\
972 insert d15,d15,%1,8,8 \n\
973 st.w [%0],d15"
974 ::"a"(a), "d"(b):"d15", "memory");
975 }
976
977 /** Insert uint8 into third byte of a __upackb
978 */
979 IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
980 {
981 __asm__ volatile ("ld.w d15,[%0] \n\
982 insert d15,d15,%1,16,8 \n\
983 st.w [%0],d15"
984 ::"a"(a), "d"(b):"d15", "memory");
985 }
986
987 /** Insert uint8 into fourth byte of a __upackb
988 */
989 IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
990 {
991 __asm__ volatile ("ld.w d15,[%0] \n\
992 insert d15,d15,%1,24,8 \n\
993 st.w [%0],d15"
994 ::"a"(a), "d"(b):"d15", "memory");
995 }
996
997 /** Insert uint16 into first halfword of a __upackhw
998 */
999 IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
1000 {
1001 __asm__ volatile ("ld.w d15,[%0] \n\
1002 insert d15,d15,%1,0,16 \n\
1003 st.w [%0],d15"
1004 ::"a"(a), "d"(b):"d15", "memory");
1005 }
1006
1007 /** Insert uint16 into second halfword of a __upackhw
1008 */
1009 IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
1010 {
1011 __asm__ volatile ("ld.w d15,[%0] \n\
1012 insert d15,d15,%1,16,16 \n\
1013 st.w [%0],d15"
1014 ::"a"(a), "d"(b):"d15", "memory");
1015 }
1016
1017 /** \} */
1018
1019 /** \defgroup IfxLld_Cpu_Intrinsics_Ghssingle_assembly Insert Single Assembly Instruction
1020 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1021 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1022 assembly instructions.
1023 * \ingroup IfxLld_Cpu_Intrinsics_Ghs
1024 * \{
1025 */
1026
1027 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1028 */
1029 IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
1030 {
1031 __asm__ volatile("ldmst [%0]0,%1"
1032 ::"a"(address), "e"((long long)mask<<32 | value));
1033 }
1034
1035 /** Insert a loop over cnt NOP instruction
1036 */
1037 IFX_INLINE void Ifx__nops(void* cnt)
1038 {
1039 __asm__ volatile ("0: nop \n\
1040 loop %0,0b"
1041 ::"a"(((sint8*)cnt)-1));
1042 }
1043
1044 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1045 */
1046 IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
1047 {
1048 uint32 res;
1049 __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
1050 return res;
1051 }
1052
1053 /** Insert n NOP instruction
1054 */
1055 #define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
1056
1057 /** \} */
1058
1059 /* FIXME use inline instead of #define */
1060 /*#define __extru(src,start,size) \
1061 ({ sint32 res; asm volatile (" extr.u\t %0,%1,%2,%3" : "=d" (res) : \
1062 "d" (src),"i" (start),"i" (size) : "memory"); res; })*/
1063
1064 /* FIXME use inline instead of #define */
1065 #define Ifx__setareg(areg,val) \
1066 { uint32 reg_val= (uint32)val; \
1067 asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
1068
1069 /**__mtcr (CPU_CCTRL, 0);
1070 */
1071 IFX_INLINE void Ifx__stopPerfCounters(void)
1072 {
1073 __asm__ volatile("mov d0,0\n\
1074 mtcr 0xFC00,d0\n\
1075 isync\n"
1076 : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
1077 }
1078
1079 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
1080 * \param address address of resource.
1081 * \param value This variable is updated with status of address
1082 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
1083 *
1084 */
1085 IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
1086 unsigned int value, unsigned int condition)
1087 {
1088 unsigned long long reg64
1089 = value | (unsigned long long) condition << 32;
1090
1091 __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
1092 : [reg] "+d" (reg64)
1093 : [addr] "a" (address)
1094 : "memory");
1095 return reg64;
1096 }
1097
1098 /** \brief Convert a fixpoint value to float32
1099 *
1100 * This function converts a value from a fixpoint format to a float32 format.
1101 *
1102 *
1103 * \param value value to be converted.
1104 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1105 *
1106 * \return Returns the converted value in the float32 format.
1107 *
1108 */
1109 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
1110 {
1111 float32 result;
1112
1113 __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
1114 return result;
1115 }
1116
1117 IFX_INLINE void* Ifx__getA11(void)
1118 {
1119 uint32 *res;
1120 __asm__ volatile ("mov.aa %0, a11": "=a" (res) : :"a11");
1121 return res;
1122 }
1123
1124 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
1125 {
1126 __asm__ volatile ("mov.aa a10, %0": : "a" (stackAddr));
1127 }
1128
1129 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1130 {
1131 uint32 returnvalue = 0; /* set seed value to 0 */
1132 for (;length > 0; length--)
1133 {
1134 /* calculate the CRC over all data */
1135 __asm__ ("CRC32 %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
1136 startaddress++;
1137 }
1138 return returnvalue;
1139 }
1140
1141 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1142 {
1143 uint32 result;
1144 __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
1145 " mov %%d12,%%d14 # e12 = El \n"
1146 " mov %%d13, 0 # \n"
1147 " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
1148 " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
1149 " jz %%d15,done_%= # \n"
1150 " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
1151 " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
1152 " loopu cmp_m_%= # \n"
1153 " done_%=: mov %0,%%d14 # \n"
1154 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
1155 return result;
1156 }
1157
1158 /* compiler don't know this instruction
1159 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
1160 {
1161 sint32 res;
1162 __asm__ volatile ("popcnt %0,%1":"=d"(res):"d"(a));
1163 return res;
1164 }*/
1165
1166 /** Invalidate cache address "p". Generates CACHEA.I [Ab].
1167 */
1168 IFX_INLINE void Ifx__cacheai(uint8* p)
1169 {
1170 __asm__ volatile("cachea.i [%0]0"::"a"(p));
1171 }
1172
1173 /* Macros for backward compatibility of the intrinsics*/
1174 /******************************************************************************/
1175 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1176 #ifndef __non_return_call
1177 #define __non_return_call Ifx__non_return_call
1178 #endif
1179
1180 #ifndef __jump_and_link
1181 #define __jump_and_link Ifx__jump_and_link
1182 #endif
1183
1184 #ifndef __moveToDataParam0
1185 #define __moveToDataParam0 Ifx__moveToDataParam0
1186 #endif
1187
1188 #ifndef __moveToDataParamRet
1189 #define __moveToDataParamRet Ifx__moveToDataParamRet
1190 #endif
1191
1192 #ifndef __getDataParamRet
1193 #define __getDataParamRet Ifx__getDataParamRet
1194 #endif
1195
1196 #ifndef __moveToAddrParam0
1197 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1198 #endif
1199
1200 #ifndef __jumpToFunction
1201 #define __jumpToFunction Ifx__jumpToFunction
1202 #endif
1203
1204 #ifndef __jumpToFunctionWithLink
1205 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1206 #endif
1207
1208 #ifndef __jumpBackToLink
1209 #define __jumpBackToLink Ifx__jumpBackToLink
1210 #endif
1211
1212 #ifndef __mem_barrier
1213 #define __mem_barrier Ifx__mem_barrier
1214 #endif
1215
1216 #ifndef __minX
1217 #define __minX Ifx__minX
1218 #endif
1219
1220 #ifndef __maxX
1221 #define __maxX Ifx__maxX
1222 #endif
1223
1224 #ifndef __saturateX
1225 #define __saturateX Ifx__saturateX
1226 #endif
1227
1228 #ifndef __checkrangeX
1229 #define __checkrangeX Ifx__checkrangeX
1230 #endif
1231
1232 #ifndef __saturate
1233 #define __saturate Ifx__saturate
1234 #endif
1235
1236 #ifndef __saturateu
1237 #define __saturateu Ifx__saturateu
1238 #endif
1239
1240 #ifndef __sqrf
1241 #define __sqrf Ifx__sqrf
1242 #endif
1243
1244 #ifndef __sqrtf
1245 #define __sqrtf Ifx__sqrtf
1246 #endif
1247
1248 #ifndef __checkrange
1249 #define __checkrange Ifx__checkrange
1250 #endif
1251
1252 #ifndef __roundf
1253 #define __roundf Ifx__roundf
1254 #endif
1255
1256 #ifndef __absf
1257 #define __absf Ifx__absf
1258 #endif
1259
1260 #ifndef __minf
1261 #define __minf Ifx__minf
1262 #endif
1263
1264 #ifndef __maxf
1265 #define __maxf Ifx__maxf
1266 #endif
1267
1268 #ifndef __saturatef
1269 #define __saturatef Ifx__saturatef
1270 #endif
1271
1272 #ifndef __checkrangef
1273 #define __checkrangef Ifx__checkrangef
1274 #endif
1275
1276 #ifndef __abs_stdreal
1277 #define __abs_stdreal Ifx__abs_stdreal
1278 #endif
1279
1280 #ifndef __min_stdreal
1281 #define __min_stdreal Ifx__min_stdreal
1282 #endif
1283
1284 #ifndef __max_stdreal
1285 #define __max_stdreal Ifx__max_stdreal
1286 #endif
1287
1288 #ifndef __saturate_stdreal
1289 #define __saturate_stdreal Ifx__saturate_stdreal
1290 #endif
1291
1292 #ifndef __neqf
1293 #define __neqf Ifx__neqf
1294 #endif
1295
1296 #ifndef __leqf
1297 #define __leqf Ifx__leqf
1298 #endif
1299
1300 #ifndef __geqf
1301 #define __geqf Ifx__geqf
1302 #endif
1303
1304 #ifndef __clssf
1305 #define __clssf Ifx__clssf
1306 #endif
1307
1308 #ifndef __fract_to_float
1309 #define __fract_to_float Ifx__fract_to_float
1310 #endif
1311
1312 #ifndef __float_to_fract
1313 #define __float_to_fract Ifx__float_to_fract
1314 #endif
1315
1316 #ifndef __getfract
1317 #define __getfract Ifx__getfract
1318 #endif
1319
1320 #ifndef __mac_r_sf
1321 #define __mac_r_sf Ifx__mac_r_sf
1322 #endif
1323
1324 #ifndef __mac_sf
1325 #define __mac_sf Ifx__mac_sf
1326 #endif
1327
1328 #ifndef __mulfractfract
1329 #define __mulfractfract Ifx__mulfractfract
1330 #endif
1331
1332 #ifndef __mulfractlong
1333 #define __mulfractlong Ifx__mulfractlong
1334 #endif
1335
1336 #ifndef __round16
1337 #define __round16 Ifx__round16
1338 #endif
1339
1340 #ifndef __fract_to_sfract
1341 #define __fract_to_sfract Ifx__fract_to_sfract
1342 #endif
1343
1344 #ifndef __float_to_sfract
1345 #define __float_to_sfract Ifx__float_to_sfract
1346 #endif
1347
1348 #ifndef __s16_to_sfract
1349 #define __s16_to_sfract Ifx__s16_to_sfract
1350 #endif
1351
1352 #ifndef __sfract_to_s16
1353 #define __sfract_to_s16 Ifx__sfract_to_s16
1354 #endif
1355
1356 #ifndef __sfract_to_u16
1357 #define __sfract_to_u16 Ifx__sfract_to_u16
1358 #endif
1359
1360 #ifndef __shaaccum
1361 #define __shaaccum Ifx__shaaccum
1362 #endif
1363
1364 #ifndef __shafracts
1365 #define __shafracts Ifx__shafracts
1366 #endif
1367
1368 #ifndef __shasfracts
1369 #define __shasfracts Ifx__shasfracts
1370 #endif
1371
1372 #ifndef __u16_to_sfract
1373 #define __u16_to_sfract Ifx__u16_to_sfract
1374 #endif
1375
1376 #ifndef __extr
1377 #define __extr Ifx__extr
1378 #endif
1379
1380 #ifndef __extru
1381 #define __extru Ifx__extru
1382 #endif
1383
1384 #ifndef __getbit
1385 #define __getbit Ifx__getbit
1386 #endif
1387
1388 #ifndef __insert
1389 #define __insert Ifx__insert
1390 #endif
1391
1392 #ifndef __putbit
1393 #define __putbit Ifx__putbit
1394 #endif
1395
1396 #ifndef __cacheawi
1397 #define __cacheawi Ifx__cacheawi
1398 #endif
1399
1400 #ifndef __cacheiwi
1401 #define __cacheiwi Ifx__cacheiwi
1402 #endif
1403
1404 #ifndef __cacheawi_bo_post_inc
1405 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1406 #endif
1407
1408 #ifndef __mulsc
1409 #define __mulsc Ifx__mulsc
1410 #endif
1411
1412 #ifndef __rol
1413 #define __rol Ifx__rol
1414 #endif
1415
1416 #ifndef __ror
1417 #define __ror Ifx__ror
1418 #endif
1419
1420 #ifndef __extractbyte1
1421 #define __extractbyte1 Ifx__extractbyte1
1422 #endif
1423
1424 #ifndef __extractbyte2
1425 #define __extractbyte2 Ifx__extractbyte2
1426 #endif
1427
1428 #ifndef __extractbyte3
1429 #define __extractbyte3 Ifx__extractbyte3
1430 #endif
1431
1432 #ifndef __extractbyte4
1433 #define __extractbyte4 Ifx__extractbyte4
1434 #endif
1435
1436 #ifndef __extracthw1
1437 #define __extracthw1 Ifx__extracthw1
1438 #endif
1439
1440 #ifndef __extracthw2
1441 #define __extracthw2 Ifx__extracthw2
1442 #endif
1443
1444 #ifndef __extractubyte1
1445 #define __extractubyte1 Ifx__extractubyte1
1446 #endif
1447
1448 #ifndef __extractubyte2
1449 #define __extractubyte2 Ifx__extractubyte2
1450 #endif
1451
1452 #ifndef __extractubyte3
1453 #define __extractubyte3 Ifx__extractubyte3
1454 #endif
1455
1456 #ifndef __extractubyte4
1457 #define __extractubyte4 Ifx__extractubyte4
1458 #endif
1459
1460 #ifndef __extractuhw1
1461 #define __extractuhw1 Ifx__extractuhw1
1462 #endif
1463
1464 #ifndef __extractuhw2
1465 #define __extractuhw2 Ifx__extractuhw2
1466 #endif
1467
1468 #ifndef __getbyte1
1469 #define __getbyte1 Ifx__getbyte1
1470 #endif
1471
1472 #ifndef __getbyte2
1473 #define __getbyte2 Ifx__getbyte2
1474 #endif
1475
1476 #ifndef __getbyte3
1477 #define __getbyte3 Ifx__getbyte3
1478 #endif
1479
1480 #ifndef __getbyte4
1481 #define __getbyte4 Ifx__getbyte4
1482 #endif
1483
1484 #ifndef __gethw1
1485 #define __gethw1 Ifx__gethw1
1486 #endif
1487
1488 #ifndef __gethw2
1489 #define __gethw2 Ifx__gethw2
1490 #endif
1491
1492 #ifndef __getubyte1
1493 #define __getubyte1 Ifx__getubyte1
1494 #endif
1495
1496 #ifndef __getubyte2
1497 #define __getubyte2 Ifx__getubyte2
1498 #endif
1499
1500 #ifndef __getubyte3
1501 #define __getubyte3 Ifx__getubyte3
1502 #endif
1503
1504 #ifndef __getubyte4
1505 #define __getubyte4 Ifx__getubyte4
1506 #endif
1507
1508 #ifndef __getuhw1
1509 #define __getuhw1 Ifx__getuhw1
1510 #endif
1511
1512 #ifndef __getuhw2
1513 #define __getuhw2 Ifx__getuhw2
1514 #endif
1515
1516 #ifndef __initpackb
1517 #define __initpackb Ifx__initpackb
1518 #endif
1519
1520 #ifndef __initpackbl
1521 #define __initpackbl Ifx__initpackbl
1522 #endif
1523
1524 #ifndef __initpackhw
1525 #define __initpackhw Ifx__initpackhw
1526 #endif
1527
1528 #ifndef __initpackhwl
1529 #define __initpackhwl Ifx__initpackhwl
1530 #endif
1531
1532 #ifndef __initupackb
1533 #define __initupackb Ifx__initupackb
1534 #endif
1535
1536 #ifndef __initupackhw
1537 #define __initupackhw Ifx__initupackhw
1538 #endif
1539
1540 #ifndef __insertbyte1
1541 #define __insertbyte1 Ifx__insertbyte1
1542 #endif
1543
1544 #ifndef __insertbyte2
1545 #define __insertbyte2 Ifx__insertbyte2
1546 #endif
1547
1548 #ifndef __insertbyte3
1549 #define __insertbyte3 Ifx__insertbyte3
1550 #endif
1551
1552 #ifndef __insertbyte4
1553 #define __insertbyte4 Ifx__insertbyte4
1554 #endif
1555
1556 #ifndef __insertubyte1
1557 #define __insertubyte1 Ifx__insertubyte1
1558 #endif
1559
1560 #ifndef __insertubyte2
1561 #define __insertubyte2 Ifx__insertubyte2
1562 #endif
1563
1564 #ifndef __insertubyte3
1565 #define __insertubyte3 Ifx__insertubyte3
1566 #endif
1567
1568 #ifndef __insertubyte4
1569 #define __insertubyte4 Ifx__insertubyte4
1570 #endif
1571
1572 #ifndef __inserthw1
1573 #define __inserthw1 Ifx__inserthw1
1574 #endif
1575
1576 #ifndef __inserthw2
1577 #define __inserthw2 Ifx__inserthw2
1578 #endif
1579
1580 #ifndef __insertuhw1
1581 #define __insertuhw1 Ifx__insertuhw1
1582 #endif
1583
1584 #ifndef __insertuhw2
1585 #define __insertuhw2 Ifx__insertuhw2
1586 #endif
1587
1588 #ifndef __setbyte1
1589 #define __setbyte1 Ifx__setbyte1
1590 #endif
1591
1592 #ifndef __setbyte2
1593 #define __setbyte2 Ifx__setbyte2
1594 #endif
1595
1596 #ifndef __setbyte3
1597 #define __setbyte3 Ifx__setbyte3
1598 #endif
1599
1600 #ifndef __setbyte4
1601 #define __setbyte4 Ifx__setbyte4
1602 #endif
1603
1604 #ifndef __sethw1
1605 #define __sethw1 Ifx__sethw1
1606 #endif
1607
1608 #ifndef __sethw2
1609 #define __sethw2 Ifx__sethw2
1610 #endif
1611
1612 #ifndef __setubyte1
1613 #define __setubyte1 Ifx__setubyte1
1614 #endif
1615
1616 #ifndef __setubyte2
1617 #define __setubyte2 Ifx__setubyte2
1618 #endif
1619
1620 #ifndef __setubyte3
1621 #define __setubyte3 Ifx__setubyte3
1622 #endif
1623
1624 #ifndef __setubyte4
1625 #define __setubyte4 Ifx__setubyte4
1626 #endif
1627
1628 #ifndef __setuhw1
1629 #define __setuhw1 Ifx__setuhw1
1630 #endif
1631
1632 #ifndef __setuhw2
1633 #define __setuhw2 Ifx__setuhw2
1634 #endif
1635
1636 #ifndef __ldmst
1637 #define __ldmst Ifx__ldmst
1638 #endif
1639
1640 #ifndef __nops
1641 #define __nops Ifx__nops
1642 #endif
1643
1644 #ifndef __swap
1645 #define __swap Ifx__swap
1646 #endif
1647
1648 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
1649 #define NOP Ifx__NOP
1650 #endif
1651
1652 #ifndef __setareg
1653 #define __setareg Ifx__setareg
1654 #endif
1655
1656 #ifndef __stopPerfCounters
1657 #define __stopPerfCounters Ifx__stopPerfCounters
1658 #endif
1659
1660 #ifndef __cmpAndSwap
1661 #define __cmpAndSwap Ifx__cmpAndSwap
1662 #endif
1663
1664 #ifndef __fixpoint_to_float32
1665 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
1666 #endif
1667
1668 #ifndef __getA11
1669 #define __getA11 Ifx__getA11
1670 #endif
1671
1672 #ifndef __setStackPointer
1673 #define __setStackPointer Ifx__setStackPointer
1674 #endif
1675
1676 #ifndef __popcnt
1677 #define __popcnt Ifx__popcnt
1678 #endif
1679
1680 #ifndef __cacheai
1681 #define __cacheai Ifx__cacheai
1682 #endif
1683
1684 #endif
1685 /******************************************************************************/
1686 /* *INDENT-ON* */
1687 /******************************************************************************/
1688 #endif /* IFXCPU_INTRINSICSGHS_H */
Ifx__ldmst
IFX_INLINE void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsGhs.h:1029
Ifx__sethw2
IFX_INLINE void Ifx__sethw2(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:949
Ifx__inserthw2
IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:869
Ifx__mulfractlong
IFX_INLINE long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsGhs.h:225
Ifx__inserthw1
IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:859
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsGhs.h:244
Ifx__getubyte2
IFX_INLINE uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:666
Ifx__shafracts
IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:303
Ifx__extractbyte1
IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:466
Ifx__mulsc
IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsGhs.h:428
__packb
long __packb
Definition: Ifx_TypesDcc.h:30
Ifx__insertbyte4
IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:809
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsGhs.h:1124
Ifx__extractbyte3
IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:486
Ifx__insertuhw2
IFX_INLINE __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:889
Ifx__initpackhwl
IFX_INLINE __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsGhs.h:750
Ifx__insertubyte4
IFX_INLINE __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:849
Ifx__insertbyte1
IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:779
Ifx__setubyte3
IFX_INLINE void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:979
Ifx__ror
IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGhs.h:448
sfract
short sfract
Definition: Ifx_TypesDcc.h:28
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:47
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:176
Ifx__insertubyte3
IFX_INLINE __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:839
Ifx__insert
IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:373
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:28
Ifx__gethw2
IFX_INLINE sint16 Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:644
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx__extractuhw2
IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsGhs.h:576
float32
float float32
Definition: Platform_Types.h:167
Ifx__getubyte1
IFX_INLINE uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:655
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:79
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsGhs.h:1129
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:33
Ifx__mac_r_sf
IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGhs.h:194
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsGhs.h:62
Ifx__insertubyte2
IFX_INLINE __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:829
Ifx__extractbyte2
IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:476
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsGhs.h:57
Ifx__getbyte2
IFX_INLINE sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:598
Ifx__insertbyte2
IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:789
Ifx__sethw1
IFX_INLINE void Ifx__sethw1(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:939
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsGhs.h:43
Ifx__u16_to_sfract
IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsGhs.h:323
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsGhs.h:1109
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGhs.h:248
Ifx__initpackhw
IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:740
Ifx__setbyte4
IFX_INLINE void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:929
Ifx__setbyte3
IFX_INLINE void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:919
sint16
short sint16
Definition: Platform_Types.h:126
Ifx__gethw1
IFX_INLINE sint16 Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:634
Ifx__round16
IFX_INLINE sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsGhs.h:234
Ifx__setubyte1
IFX_INLINE void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:959
Ifx__sfract_to_u16
IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:276
Ifx__initupackb
IFX_INLINE __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsGhs.h:757
Ifx__shasfracts
IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:312
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:32
Ifx__extractubyte4
IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:556
fract
long fract
Definition: Ifx_TypesDcc.h:27
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsGhs.h:69
Ifx__getubyte4
IFX_INLINE uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:688
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
laccum
long long laccum
Definition: Ifx_TypesDcc.h:29
Ifx__cacheawi_bo_post_inc
IFX_INLINE uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:418
Ifx__extractubyte3
IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:546
Ifx__getbyte3
IFX_INLINE sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:610
Ifx__setubyte4
IFX_INLINE void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:989
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsGhs.h:1141
Ifx__extractbyte4
IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
Definition: IfxCpu_IntrinsicsGhs.h:496
Ifx__extractubyte2
IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:536
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGhs.h:74
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:31
Ifx__extru
IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:352
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsGhs.h:1117
Ifx__setbyte1
IFX_INLINE void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:899
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__getbyte4
IFX_INLINE sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:622
Ifx__shaaccum
__asm__ laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsGhs.h:286
Ifx__cacheai
IFX_INLINE void Ifx__cacheai(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:1168
Ifx__insertubyte1
IFX_INLINE __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:819
Ifx__cacheawi
IFX_INLINE void Ifx__cacheawi(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:404
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsGhs.h:84
Ifx__swap
IFX_INLINE uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsGhs.h:1046
Ifx__s16_to_sfract
IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
Definition: IfxCpu_IntrinsicsGhs.h:256
Ifx__getuhw2
IFX_INLINE uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:710
Ifx__setuhw1
IFX_INLINE void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:999
Ifx__cmpAndSwap
IFX_INLINE unsigned int Ifx__cmpAndSwap(unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsGhs.h:1085
Ifx__fract_to_float
IFX_INLINE float Ifx__fract_to_float(fract a)
Definition: IfxCpu_IntrinsicsGhs.h:167
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx__insertuhw1
IFX_INLINE __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:879
Ifx__extractubyte1
IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsGhs.h:526
Ifx__setuhw2
IFX_INLINE void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:1009
Ifx__getbyte1
IFX_INLINE sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsGhs.h:586
Ifx__initpackbl
IFX_INLINE __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsGhs.h:733
Ifx__initpackb
IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsGhs.h:721
Ifx__clssf
IFX_INLINE sint16 Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:157
sint32
long sint32
Definition: Platform_Types.h:131
Ifx__extractuhw1
IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsGhs.h:566
Ifx__mulfractfract
IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsGhs.h:216
Ifx__setbyte2
IFX_INLINE void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:909
Ifx__extracthw2
IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
Definition: IfxCpu_IntrinsicsGhs.h:516
Ifx__mac_sf
IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGhs.h:205
Ifx__extracthw1
IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
Definition: IfxCpu_IntrinsicsGhs.h:506
Ifx__rol
IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGhs.h:439
Ifx__initupackhw
IFX_INLINE __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsGhs.h:769
Ifx__getfract
IFX_INLINE fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsGhs.h:185
Ifx__sfract_to_s16
IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsGhs.h:266
Ifx__insertbyte3
IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:799
Ifx__cacheiwi
IFX_INLINE void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsGhs.h:410
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx__setubyte2
IFX_INLINE void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGhs.h:969
sint8
signed char sint8
Definition: Platform_Types.h:122
Ifx__getubyte3
IFX_INLINE uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsGhs.h:677
voidfunc
void(* voidfunc)()
Definition: IfxCpu_IntrinsicsGhs.h:39
Ifx__extr
IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGhs.h:340
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsGhs.h:1037
Ifx__getuhw1
IFX_INLINE uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsGhs.h:699
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsGhs.h:1071
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsGhs.h:52


iLLD_TC26B: IfxCpu_IntrinsicsGnuc.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsGnuc.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsGnuc.h
3 *
4 * \version iLLD_1_0_1_11_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup IfxLld_Cpu_Intrinsics_Gnuc Intrinsics for GNU compiler
24 * \ingroup IfxLld_Cpu_Intrinsics
25 *
26 */
27
28 #ifndef IFXCPU_INTRINSICSGNUC_H
29 #define IFXCPU_INTRINSICSGNUC_H
30
31 /* old style intrinsics handling for AGENtiX environment */
32 #if defined(SCTB_EMBEDDED)
33 # define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 0
34 #else
35 # define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
36 #endif
37
38 /******************************************************************************/
39 #include "Ifx_Types.h"
40
41 #if IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
42 #include "machine/intrinsics.h"
43 #endif
44
45 /******************************************************************************/
46 /* *INDENT-OFF* */
47 #define STRINGIFY(x) #x
48
49 /** Function call without return
50 */
51 #define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
52
53 /** Jump and link
54 */
55 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
56 {
57 __asm__ volatile ("jli %0"::"a"(fun));
58 }
59
60 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
61 {
62 __asm__ volatile ("mov\t %%d4, %0"::"d"(var));
63 }
64
65 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
66 {
67 __asm__ volatile ("mov\t %%d2, %0"::"d"(var));
68 }
69
70 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
71 {
72 unsigned int var;
73 __asm__ volatile (" mov\t %0, %%d2":"=d"(var));
74 return var;
75 }
76
77 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
78 {
79 __asm__ volatile ("mov.aa\t %%a4, %0"::"a"(var));
80 }
81
82 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
83 {
84 Ifx__non_return_call(fun);
85 }
86
87 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
88 {
89 Ifx__jump_and_link((void (*)(void))fun);
90 }
91
92 IFX_INLINE void Ifx__jumpBackToLink(void)
93 {
94 __asm__ volatile ("ji %a11");
95 }
96 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_any_type Cross type arithmetic operation
97 *
98 * Macro compatible with float, fix point, signed integer and unsigned integer
99 *
100 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
101 * \{
102 */
103 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
104 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
105 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
106 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
107 /** \} */
108
109 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_singed_integer Signed integer operation
110 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
111 * \{
112 */
113 #define Ifx__saturate(X,Min,Max) ( Ifx__min(Ifx__max(X, Min), Max) )
114 /** \} */
115
116 /** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_unsinged_integer Unsigned integer operation
117 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
118 * \{
119 */
120 #define Ifx__saturateu(X,Min,Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
121 /** \} */
122
123 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucmin_max Minimum and Maximum of (sint16) Integers
124 These intrinsic functions return the minimum or maximum of a sint16, uint16 or sint16
125 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
126 * \{
127 */
128
129 /** Return maximum of two integers
130 */
131 IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
132 {
133 sint32 res;
134 __asm__ volatile ("max %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
135 return res;
136 }
137
138 /** Return maximum of two sint16
139 */
140 IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
141 {
142 sint32 res;
143 __asm__ volatile ("max.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
144 return res;
145 }
146 /** Return maximum of two unsigned integers
147 */
148 IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
149 {
150 uint32 res;
151 __asm__ volatile ("max.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
152 return res;
153 }
154
155 /** Return minimum of two integers
156 */
157 IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
158 {
159 sint32 res;
160 __asm__ volatile ("min %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
161 return res;
162 }
163
164 /** Return minimum of two sint16
165 */
166 IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
167 {
168 sint16 res;
169 __asm__ volatile ("min.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
170 return res;
171 }
172
173 /** Return minimum of two unsigned integers
174 */
175 IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
176 {
177 uint32 res;
178 __asm__ volatile ("min.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
179 return res;
180 }
181
182 /** \} */
183
184 /** \defgroup intrinsicsgnuc_float Floating point operation
185 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
186 * \{
187 */
188
189 #define Ifx__sqrf(X) ((X) * (X))
190 #define Ifx__sqrtf(X) sqrtf(X)
191 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
192
193 #define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
194 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
195 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
196 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
197 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
198 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
199
200 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
201 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
202 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
203 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
204
205 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
206 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
207 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
208 /** \} */
209
210 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucfractional Fractional Arithmetic Support
211 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
212 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
213 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
214 compiler does support these functions.
215 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
216 * \{
217 */
218
219 /** Count the consecutive number of bits that have the same value as bit 15 of an sfract
220 */
221 IFX_INLINE sint16 Ifx__clssf(sfract a)
222 {
223 sint16 res;
224 __asm__ volatile ("sh %1,%1,16 \n\
225 cls %0,%1":"=d"(res):"d"(a):"memory");
226 return res;
227 }
228
229 /** Convert fract to float
230 */
231 IFX_INLINE float Ifx__fract_to_float(fract a)
232 {
233 float res;
234 __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
235 return res;
236 }
237
238 /** Convert float to fract
239 */
240 IFX_INLINE fract Ifx__float_to_fract(float a)
241 {
242 fract res;
243 __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
244 return res;
245 }
246
247 /** Convert fract to sfract
248 */
249 IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
250 {
251 sfract res;
252 __asm__ volatile ("mov.u %0,0x8000 \n\
253 adds %0,%1 \n\
254 extr %0,%0,0x10,0x10 "
255 :"=&d"(res):"d"(a):"memory");
256 return res;
257 }
258
259 /** Convert float to sfract
260 */
261 IFX_INLINE sfract Ifx__float_to_sfract(float a)
262 {
263 fract tmp = Ifx__float_to_fract(a);
264 return Ifx__fract_to_sfract(tmp);
265 }
266
267 /** Convert laccum to fract
268 */
269 IFX_INLINE fract Ifx__getfract(laccum a)
270 {
271 fract res;
272 __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
273 return res;
274 }
275
276 /** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
277 */
278 IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
279 {
280 sfract res;
281 __asm__ volatile ("sh %1,%1,16 \n\
282 maddrs.q %0,%1,%2L,%3L,1 \n\
283 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
284 return res;
285 }
286
287 /** Multiply-add sfract. Returns ( a + b * c )
288 */
289 IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
290 {
291 sfract res;
292 __asm__ volatile ("sh %1,%1,16 \n\
293 madds.q %0,%1,%2L,%3L,1 \n\
294 sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
295 return res;
296 }
297
298 /** Integer part of the multiplication of a fract and a fract
299 */
300 IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
301 {
302 long res;
303 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
304 return res;
305 }
306
307 /** Integer part of the multiplication of a fract and a long
308 */
309 IFX_INLINE long Ifx__mulfractlong(fract a, long b)
310 {
311 long res;
312 __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
313 return res;
314 }
315
316 /** Convert fract to sfract
317 */
318 IFX_INLINE sfract Ifx__round16(fract a)
319 {
320 sfract res;
321 __asm__ volatile ("mov.u %0,0x8000 \n\
322 adds %0,%1 \n\
323 insert %0,%0,0,0,0x10 \n\
324 sh %0,%0,-16"
325 :"=&d"(res):"d"(a):"memory");
326 return res;
327 }
328
329 /** Convert signed sint16 to sfract
330 */
331 IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
332 {
333 sfract res;
334 __asm__ volatile ("sh %0,%1,16 \n\
335 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
336 return res;
337 }
338
339 /** Convert sfract to sint16
340 */
341 IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
342 {
343 sint16 res;
344 __asm__ volatile ("sh %1,%1,16 \n\
345 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
346 return res;
347 }
348
349 /** Convert sfract to uint16
350 */
351 IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
352 {
353 uint16 res;
354 __asm__ volatile ("sh %1,%1,16 \n\
355 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
356 return res;
357 }
358
359 /** Left/right shift of an laccum
360 */
361 IFX_INLINE laccum Ifx__shaaccum(laccum a, sint32 b)
362 {
363 laccum res;
364 __asm__ volatile ("jge %2,0,0f \n\
365 sha %H0,%H1,%2 \n\
366 rsub %2,%2,0 \n\
367 dextr %L0,%H1,%L1,%2 \n\
368 j 1f \n\
369 0:dextr %H0,%H1,%L1,%2 \n\
370 sha %L0,%L1,%2 \n\
371 1:"
372 :"=d"(res):"d"(a), "d"(b):"memory");
373 return res;
374 }
375
376 /** Left/right shift of an fract
377 */
378 IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
379 {
380 fract res;
381 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
382 return res;
383 }
384
385 /** Left/right shift of an sfract
386 */
387 IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
388 {
389 sfract res;
390 __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
391 return res;
392 }
393
394 /** Convert uint16 to sfract
395 */
396 IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
397 {
398 sfract res;
399 __asm__ volatile ("sh %0,%1,16 \n\
400 sh %0,%1,-16":"=d"(res):"d"(a):"memory");
401 return res;
402 }
403
404 /** \} */
405
406 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucinsert Insert / Extract Bit-fields and Bits
407 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
408 * \{
409 */
410
411 /** Extract a bit-field (bit pos to bit pos+width) from value
412 */
413 IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
414 {
415 sint32 res;
416 __asm__ volatile ("mov %%d14,%2 \n\
417 mov %%d15,%3 \n\
418 extr %0,%1,%%e14"
419 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
420 return res;
421 }
422
423 /** Same as __extr() but return bit-field as unsigned integer
424 */
425 IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
426 {
427 uint32 res;
428 __asm__ volatile ("mov %%d14,%2 \n\
429 mov %%d15,%3 \n\
430 extr.u %0,%1,%%e14"
431 : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
432 return res;
433 }
434
435 /** Load a single bit.
436 */
437 //#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
438 #define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
439
440 /** Atomic load-modify-store.
441 */
442 #define Ifx__imaskldmst(address, value, bitoffset, bits) \
443 {long long tmp;\
444 __asm__("imask %A0,%1,%2,%3"\
445 :"=d"((long long)tmp)\
446 :"d"(value),"d"(bitoffset),"i"(bits): "memory");\
447 __asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}
448
449 /** Return trg but replace trgbit by srcbit in src.
450 */
451 IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
452 {
453 sint32 res;
454 __asm__ volatile ("ins.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
455 return res;
456 }
457
458 /** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
459 */
460 IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
461 {
462 sint32 res;
463 __asm__ volatile ("mov %%d14,%3 \n\
464 mov %%d15,%4 \n\
465 insert %0,%1,%2,%%e14"
466 :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
467 return res;
468 }
469
470 /** Return trg but replace trgbit by inverse of srcbit in src.
471 */
472 IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
473 {
474 sint32 res;
475 __asm__ volatile ("insn.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
476 return res;
477 }
478
479 /** Store a single bit.
480 */
481 #define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
482
483 /** \} */
484
485 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucinterrupt_handling Interrupt Handling
486 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
487 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
488 * \{
489 */
490
491 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
492 /** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
493 */
494 #define Ifx__bisr(intlvl) __asm__ volatile ("bisr "#intlvl : : : "memory")
495 #endif
496
497 /** Disable interrupts. Only supported for TriCore1
498 */
499 #define Ifx__disable() __asm__ volatile ("disable" : : : "memory")
500
501 /** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
502 */
503 IFX_INLINE sint32 Ifx__disable_and_save(void)
504 {
505 sint32 res;
506 __asm__ volatile("disable %0":"=d"(res));
507 return res;
508 }
509
510 /** Enable interrupts immediately at function entry
511 */
512 #define Ifx__enable() __asm__ volatile ("enable" : : : "memory")
513
514 /** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
515 */
516 IFX_INLINE void Ifx__restore(sint32 ie)
517 {
518 __asm__ volatile ("restore %0"::"d"(ie));
519 }
520
521 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
522 /** Call a system call function number
523 */
524 #define Ifx__syscall(svcno) __tric_syscall(svcno)
525 #define Ifx__tric_syscall(svcno) __asm__ volatile ("syscall "STRINGIFY(svcno) : : : "memory")
526 #endif
527
528 /** \} */
529
530 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucmiscellaneous Miscellaneous Intrinsic Functions
531 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
532 * \{
533 */
534
535 /** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
536 */
537 IFX_INLINE void Ifx__cacheawi(uint8* p)
538 {
539 __asm__ volatile("cachea.wi [%0]0"::"a"(p));
540 }
541 /** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
542 */
543 IFX_INLINE void Ifx__cacheiwi(uint8* p)
544 {
545 __asm__ volatile("cachei.wi [%0]0"::"a"(p));
546 }
547
548 /** Write back and invalidate cache address \"p\" and return post incremented
549 * value of \"p\". Generates CACHEA.WI [Ab+].
550 */
551 IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
552 {
553 __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
554 return p;
555 }
556
557 /** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
558 * back the result to 32 bits. To scale back the result, 32 bits are extracted
559 * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
560 */
561 IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
562 {
563 sint32 res;
564 __asm__ volatile("mul %%e12,%1,%2 \n\
565 dextr %0,%%d13,%%d12,%3"
566 :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
567 return res;
568 }
569
570 /** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
571 */
572 IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
573 {
574 uint32 res;
575 __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
576 return res;
577 }
578
579 /** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
580 */
581 IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
582 {
583 uint32 res;
584 __asm__ volatile("rsub %2,%2,0 \n\
585 dextr %0,%1,%1,%2"
586 :"=d"(res):"d"(operand), "d"(count):"memory");
587 return res;
588 }
589 /** \} */
590
591 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucpacked Packed Data Type Support
592 The next table provides an overview of the intrinsic functions for initialization of packed data type.
593 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
594 * \{
595 */
596
597 /** Absolute value of __packb
598 */
599 IFX_INLINE __packb Ifx__absb(__packb a)
600 {
601 __packb res;
602 __asm__ volatile ("abs.b %0,%1"
603 :"=d"(res):"d"(a):"memory");
604 return res;
605 }
606
607 /** Absolute value of __packhw
608 */
609 IFX_INLINE __packhw Ifx__absh(__packhw a)
610 {
611 __packhw res;
612 __asm__ volatile ("abs.h %0,%1"
613 :"=d"(res):"d"(a):"memory");
614 return res;
615 }
616
617 /** Absolute value of __packhw using saturation
618 */
619 IFX_INLINE __packhw Ifx__abssh(__packhw a)
620 {
621 __packb res;
622 __asm__ volatile ("abss.h %0,%1"
623 :"=d"(res):"d"(a):"memory");
624 return res;
625 }
626
627 /** Extract first byte from a __packb
628 */
629 IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
630 {
631 sint8 res;
632 __asm__ volatile ("extr %0,%1,0,8"
633 :"=d"(res):"d"(a):"memory");
634 return res;
635 }
636
637 /** Extract second byte from a __packb
638 */
639 IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
640 {
641 sint8 res;
642 __asm__ volatile ("extr %0,%1,8,8"
643 :"=d"(res):"d"(a):"memory");
644 return res;
645 }
646
647 /** Extract third byte from a __packb
648 */
649 IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
650 {
651 sint8 res;
652 __asm__ volatile ("extr %0,%1,16,8"
653 :"=d"(res):"d"(a):"memory");
654 return res;
655 }
656
657 /** Extract fourth byte from a __packb
658 */
659 IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
660 {
661 sint8 res;
662 __asm__ volatile ("extr %0,%1,24,8"
663 :"=d"(res):"d"(a):"memory");
664 return res;
665 }
666
667 /** Extract first sint16 from a __packhw
668 */
669 IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
670 {
671 sint16 res;
672 __asm__ volatile ("extr %0,%1,0,16"
673 :"=d"(res):"d"(a):"memory");
674 return res;
675 }
676
677 /** Extract second sint16 from a __packhw
678 */
679 IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
680 {
681 sint16 res;
682 __asm__ volatile ("extr %0,%1,16,16"
683 :"=d"(res):"d"(a):"memory");
684 return res;
685 }
686
687 /** Extract first uint8 from a __packb
688 */
689 IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
690 {
691 uint8 res;
692 __asm__ volatile ("extr %0,%1,0,8"
693 :"=d"(res):"d"(a):"memory");
694 return res;
695 }
696
697 /** Extract second uint8 from a __packb
698 */
699 IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
700 {
701 uint8 res;
702 __asm__ volatile ("extr %0,%1,8,8"
703 :"=d"(res):"d"(a):"memory");
704 return res;
705 }
706
707 /** Extract third uint8 from a __packb
708 */
709 IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
710 {
711 uint8 res;
712 __asm__ volatile ("extr %0,%1,16,8"
713 :"=d"(res):"d"(a):"memory");
714 return res;
715 }
716
717 /** Extract fourth uint8 from a __packb
718 */
719 IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
720 {
721 uint8 res;
722 __asm__ volatile ("extr %0,%1,24,8"
723 :"=d"(res):"d"(a):"memory");
724 return res;
725 }
726
727 /** Extract first uint16 from a __packhw
728 */
729 IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
730 {
731 uint16 res;
732 __asm__ volatile ("extr %0,%1,0,16"
733 :"=d"(res):"d"(a):"memory");
734 return res;
735 }
736
737 /** Extract second uint16 from a __packhw
738 */
739 IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
740 {
741 uint16 res;
742 __asm__ volatile ("extr %0,%1,16,16"
743 :"=d"(res):"d"(a):"memory");
744 return res;
745 }
746
747 /** Extract first byte from a __packb
748 */
749 IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
750 {
751 sint8 res;
752 __asm__ volatile ("ld.w %0,[%1]0 \n\
753 extr %0,%0,0,8"
754 :"=d"(res):"a"(a):"memory");
755 return res;
756
757 }
758
759 /** Extract second byte from a __packb
760 */
761 IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
762 {
763 sint8 res;
764 __asm__ volatile ("ld.w %0,[%1]0 \n\
765 extr %0,%0,8,8"
766 :"=d"(res):"a"(a):"memory");
767 return res;
768
769 }
770
771 /** Extract third byte from a __packb
772 */
773 IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
774 {
775 sint8 res;
776 __asm__ volatile ("ld.w %0,[%1]0 \n\
777 extr %0,%0,16,8"
778 :"=d"(res):"a"(a):"memory");
779 return res;
780
781 }
782
783 /** Extract fourth byte from a __packb
784 */
785 IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
786 {
787 sint8 res;
788 __asm__ volatile ("ld.w %0,[%1]0 \n\
789 extr %0,%0,24,8"
790 :"=d"(res):"a"(a):"memory");
791 return res;
792
793 }
794
795 /** Extract first sint16 from a __packhw
796 */
797 IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
798 {
799 sint16 res;
800 __asm__ volatile ("ld.w %0,[%1]0 \n\
801 extr %0,%0,0,16"
802 :"=d"(res):"a"(a):"memory");
803 return res;
804 }
805 /** Extract second sint16 from a __packhw
806 */
807 IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
808 {
809 sint16 res;
810 __asm__ volatile ("ld.w %0,[%1]0 \n\
811 extr %0,%0,16,16"
812 :"=d"(res):"a"(a):"memory");
813 return res;
814 }
815
816 /** Extract first uint8 from a __packb
817 */
818 IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
819 {
820 uint8 res;
821 __asm__ volatile ("ld.w %0,[%1]0 \n\
822 extr %0,%0,0,8"
823 :"=d"(res):"a"(a):"memory");
824 return res;
825 }
826
827 /** Extract second uint8 from a __packb
828 */
829 IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
830 {
831 uint8 res;
832 __asm__ volatile ("ld.w %0,[%1]0 \n\
833 extr %0,%0,8,8"
834 :"=d"(res):"a"(a):"memory");
835 return res;
836 }
837
838 /** Extract third uint8 from a __packb
839 */
840 IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
841 {
842 uint8 res;
843 __asm__ volatile ("ld.w %0,[%1]0 \n\
844 extr %0,%0,16,8"
845 :"=d"(res):"a"(a):"memory");
846 return res;
847 }
848
849 /** Extract fourth uint8 from a __packb
850 */
851 IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
852 {
853 uint8 res;
854 __asm__ volatile ("ld.w %0,[%1]0 \n\
855 extr %0,%0,24,8"
856 :"=d"(res):"a"(a):"memory");
857 return res;
858 }
859
860 /** Extract first uint16 from a __packhw
861 */
862 IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
863 {
864 uint16 res;
865 __asm__ volatile ("ld.w %0,[%1]0 \n\
866 extr %0,%0,0,16"
867 :"=d"(res):"a"(a):"memory");
868 return res;
869 }
870
871 /** Extract second uint16 from a __packhw
872 */
873 IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
874 {
875 uint16 res;
876 __asm__ volatile ("ld.w %0,[%1]0 \n\
877 extr %0,%0,16,16"
878 :"=d"(res):"a"(a):"memory");
879 return res;
880 }
881
882 /** Initialize __packb with four integers
883 */
884 IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
885 {
886 __packb res;
887 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
888 insert %4,%1,%2,8,8 \n\
889 insert %0,%4,%3,16,16 "
890 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
891 return res;
892 }
893
894 /** Initialize __packb with a long integer
895 */
896 IFX_INLINE __packb Ifx__initpackbl(long a)
897 {
898 return (__packb) a;
899 }
900
901 /** Initialize __packhw with two integers
902 */
903 IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
904 {
905 __packhw res;
906 __asm__ volatile ("insert %0,%1,%2,16,16"
907 :"=d"(res):"d"(a), "d"(b):"memory");
908 return res;
909 }
910
911 /** Initialize __packhw with a long integer
912 */
913 IFX_INLINE __packhw Ifx__initpackhwl(long a)
914 {
915 return a;
916 }
917
918 /** Initialize __packb with four unsigned integers
919 */
920 IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
921 {
922 __upackb res;
923 __asm__ volatile ("insert %3,%3,%4,8,8 \n\
924 insert %1,%1,%2,8,8 \n\
925 insert %0,%1,%3,16,16"
926 :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
927 return res;
928 }
929
930 /** Initialize __packhw with two unsigned integers
931 */
932 IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
933 {
934 __upackhw res;
935 __asm__ volatile ("insert %0,%1,%2,16,16"
936 :"=d"(res):"d"(a), "d"(b):"memory");
937 return res;
938 }
939
940 /** Insert sint8 into first byte of a __packb
941 */
942 IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
943 {
944 __packb res;
945 __asm__ volatile ("insert %0,%1,%2,0,8"
946 :"=d"(res):"d"(a), "d"(b):"memory");
947 return res;
948 }
949
950 /** Insert sint8 into second byte of a __packb
951 */
952 IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
953 {
954 __packb res;
955 __asm__ volatile ("insert %0,%1,%2,8,8"
956 :"=d"(res):"d"(a), "d"(b):"memory");
957 return res;
958 }
959
960 /** Insert sint8 into third byte of a __packb
961 */
962 IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
963 {
964 __packb res;
965 __asm__ volatile ("insert %0,%1,%2,16,8"
966 :"=d"(res):"d"(a), "d"(b):"memory");
967 return res;
968 }
969
970 /** Insert sint8 into fourth byte of a __packb
971 */
972 IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
973 {
974 __packb res;
975 __asm__ volatile ("insert %0,%1,%2,24,8"
976 :"=d"(res):"d"(a), "d"(b):"memory");
977 return res;
978 }
979
980 /** Insert sint8 into first uint8 of a __packb
981 */
982 IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
983 {
984 __upackb res;
985 __asm__ volatile ("insert %0,%1,%2,0,8"
986 :"=d"(res):"d"(a), "d"(b):"memory");
987 return res;
988 }
989
990 /** Insert sint8 into second uint8 of a __packb
991 */
992 IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
993 {
994 __upackb res;
995 __asm__ volatile ("insert %0,%1,%2,8,8"
996 :"=d"(res):"d"(a), "d"(b):"memory");
997 return res;
998 }
999
1000 /** Insert sint8 into third uint8 of a __packb
1001 */
1002 IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
1003 {
1004 __upackb res;
1005 __asm__ volatile ("insert %0,%1,%2,16,8"
1006 :"=d"(res):"d"(a), "d"(b):"memory");
1007 return res;
1008 }
1009
1010 /** Insert sint8 into fourth uint8 of a __packb
1011 */
1012 IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
1013 {
1014 __upackb res;
1015 __asm__ volatile ("insert %0,%1,%2,24,8"
1016 :"=d"(res):"d"(a), "d"(b):"memory");
1017 return res;
1018 }
1019
1020 /** Insert sint16 into first halfword of a __packhw
1021 */
1022 IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
1023 {
1024 __packhw res;
1025 __asm__ volatile ("insert %0,%1,%2,0,16"
1026 :"=d"(res):"d"(a), "d"(b):"memory");
1027 return res;
1028 }
1029
1030 /** Insert sint16 into second halfword of a __packhw
1031 */
1032 IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
1033 {
1034 __packhw res;
1035 __asm__ volatile ("insert %0,%1,%2,16,16"
1036 :"=d"(res):"d"(a), "d"(b):"memory");
1037 return res;
1038 }
1039
1040 /** Insert uint16 into first halfword of a __upackhw
1041 */
1042 IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
1043 {
1044 __upackhw res;
1045 __asm__ volatile ("insert %0,%1,%2,0,16"
1046 :"=d"(res):"d"(a), "d"(b):"memory");
1047 return res;
1048 }
1049
1050 /** Insert uint16 into second halfword of a __upackhw
1051 */
1052 IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
1053 {
1054 __upackhw res;
1055 __asm__ volatile ("insert %0,%1,%2,16,16"
1056 :"=d"(res):"d"(a), "d"(b):"memory");
1057 return res;
1058 }
1059
1060 /** Minimum of two __packb values
1061 */
1062 IFX_INLINE __packb Ifx__minb(__packb a, __packb b)
1063 {
1064 __packb res;
1065 __asm__ volatile ("min.b %0,%1,%2"
1066 :"=d"(res):"d"(a), "d"(b):"memory");
1067 return res;
1068 }
1069
1070 /** Minimum of two __upackb values
1071 */
1072 IFX_INLINE __upackb Ifx__minbu( __upackb a, __upackb b)
1073 {
1074 __upackb res;
1075 __asm__ volatile ("min.bu %0,%1,%2"
1076 :"=d"(res):"d"(a), "d"(b):"memory");
1077 return res;
1078 }
1079
1080 /** Minimum of two __packhw values
1081 */
1082 IFX_INLINE __packhw Ifx__minh(__packhw a, __packhw b)
1083 {
1084 __packhw res;
1085 __asm__ volatile ("min.h %0,%1,%2"
1086 :"=d"(res):"d"(a), "d"(b):"memory");
1087 return res;
1088 }
1089
1090 /** Minimum of two __upackhw values
1091 */
1092 IFX_INLINE __upackhw Ifx__minhu( __upackhw a, __upackhw b)
1093 {
1094 __upackhw res;
1095 __asm__ volatile ("min.hu %0,%1,%2"
1096 :"=d"(res):"d"(a), "d"(b):"memory");
1097 return res;
1098 }
1099
1100 /** Insert sint8 into first byte of a __packb
1101 */
1102 IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
1103 {
1104 __asm__ volatile ("ld.w %%d15,[%0] \n\
1105 insert %%d15,%%d15,%1,0,8 \n\
1106 st.w [%0],%%d15"
1107 ::"a"(a), "d"(b):"d15", "memory");
1108 }
1109
1110 /** Insert sint8 into second byte of a __packb
1111 */
1112 IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
1113 {
1114 __asm__ volatile ("ld.w %%d15,[%0] \n\
1115 insert %%d15,%%d15,%1,8,8 \n\
1116 st.w [%0],%%d15"
1117 ::"a"(a), "d"(b):"d15", "memory");
1118 }
1119
1120 /** Insert sint8 into third byte of a __packb
1121 */
1122 IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
1123 {
1124 __asm__ volatile ("ld.w %%d15,[%0] \n\
1125 insert %%d15,%%d15,%1,16,8 \n\
1126 st.w [%0],%%d15"
1127 ::"a"(a), "d"(b):"d15", "memory");
1128 }
1129
1130 /** Insert sint8 into fourth byte of a __packb
1131 */
1132 IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
1133 {
1134 __asm__ volatile ("ld.w %%d15,[%0] \n\
1135 insert %%d15,%%d15,%1,24,8 \n\
1136 st.w [%0],%%d15"
1137 ::"a"(a), "d"(b):"d15", "memory");
1138 }
1139
1140 /** Insert sint16 into first halfword of a __packhw
1141 */
1142 IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
1143 {
1144 __asm__ volatile ("ld.w %%d15,[%0] \n\
1145 insert %%d15,%%d15,%1,0,16 \n\
1146 st.w [%0],%%d15"
1147 ::"a"(a), "d"(b):"d15", "memory");
1148 }
1149
1150 /** Insert sint16 into second halfword of a __packhw
1151 */
1152 IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
1153 {
1154 __asm__ volatile ("ld.w %%d15,[%0] \n\
1155 insert %%d15,%%d15,%1,16,16 \n\
1156 st.w [%0],%%d15"
1157 ::"a"(a), "d"(b):"d15", "memory");
1158 }
1159
1160 /** Insert uint8 into first byte of a __upackb
1161 */
1162 IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
1163 {
1164 __asm__ volatile ("ld.w %%d15,[%0] \n\
1165 insert %%d15,%%d15,%1,0,8 \n\
1166 st.w [%0],%%d15"
1167 ::"a"(a), "d"(b):"d15", "memory");
1168 }
1169
1170 /** Insert uint8 into second byte of a __upackb
1171 */
1172 IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
1173 {
1174 __asm__ volatile ("ld.w %%d15,[%0] \n\
1175 insert %%d15,%%d15,%1,8,8 \n\
1176 st.w [%0],%%d15"
1177 ::"a"(a), "d"(b):"d15", "memory");
1178 }
1179
1180 /** Insert uint8 into third byte of a __upackb
1181 */
1182 IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
1183 {
1184 __asm__ volatile ("ld.w %%d15,[%0] \n\
1185 insert %%d15,%%d15,%1,16,8 \n\
1186 st.w [%0],%%d15"
1187 ::"a"(a), "d"(b):"d15", "memory");
1188 }
1189
1190 /** Insert uint8 into fourth byte of a __upackb
1191 */
1192 IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
1193 {
1194 __asm__ volatile ("ld.w %%d15,[%0] \n\
1195 insert %%d15,%%d15,%1,24,8 \n\
1196 st.w [%0],%%d15"
1197 ::"a"(a), "d"(b):"d15", "memory");
1198 }
1199
1200 /** Insert uint16 into first halfword of a __upackhw
1201 */
1202 IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
1203 {
1204 __asm__ volatile ("ld.w %%d15,[%0] \n\
1205 insert %%d15,%%d15,%1,0,16 \n\
1206 st.w [%0],%%d15"
1207 ::"a"(a), "d"(b):"d15", "memory");
1208 }
1209
1210 /** Insert uint16 into second halfword of a __upackhw
1211 */
1212 IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
1213 {
1214 __asm__ volatile ("ld.w %%d15,[%0] \n\
1215 insert %%d15,%%d15,%1,16,16 \n\
1216 st.w [%0],%%d15"
1217 ::"a"(a), "d"(b):"d15", "memory");
1218 }
1219
1220 /** \} */
1221
1222 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucregister Register Handling
1223 The next table provides an overview of the intrinsic functions that you can use to access control registers.
1224 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1225 * \{
1226 */
1227
1228 /** Return absolute value
1229 */
1230 #define Ifx__abs(a) __builtin_abs(a)
1231
1232 /** Return absolue difference of two integers
1233 */
1234 IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
1235 {
1236 sint32 res;
1237 __asm__ volatile ("absdif %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1238 return res;
1239 }
1240
1241 /** Return absolute value with saturation
1242 */
1243 IFX_INLINE sint32 Ifx__abss(sint32 a)
1244 {
1245 sint32 res;
1246 __asm__ volatile ("abss %0, %1": "=d" (res) : "d" (a));
1247 return res;
1248 }
1249
1250 /** Count leading ones in int
1251 */
1252 IFX_INLINE sint32 Ifx__clo(sint32 a)
1253 {
1254 sint32 res;
1255 __asm__ volatile ("clo %0,%1":"=d"(res):"d"(a));
1256 return res;
1257 }
1258
1259 /** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
1260 */
1261 IFX_INLINE sint32 Ifx__cls(sint32 a)
1262 {
1263 sint32 res;
1264 __asm__ volatile ("cls %0,%1":"=d"(res):"d"(a));
1265 return res;
1266 }
1267
1268 /** Count leading zeros in int
1269 */
1270 #define Ifx__clz(a) __builtin_clz(a)
1271
1272 /** Return absolute double precision floating-point value
1273 */
1274 IFX_INLINE double Ifx__fabs(double d)
1275 {
1276 double res;
1277 __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (d):"memory");
1278 return res;
1279 }
1280
1281 /** Return absolute floating-point value
1282 */
1283 IFX_INLINE float Ifx__fabsf(float f)
1284 {
1285 float res;
1286 __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (f):"memory");
1287 return res;
1288 }
1289
1290 #if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
1291 /** Move contents of the addressed core SFR into a data register
1292 */
1293 #define Ifx__mfcr(regaddr) \
1294 ({ sint32 res; __asm__ volatile ("mfcr %0,%1": "=d" (res) :"i"(regaddr): "memory"); res; })
1295
1296 //({ sint32 res; __asm__ volatile ("mfcr %0,"#regaddr : "=d" (res) : : "memory"); res; })
1297
1298 /** Move contents of a data register (second int) to the addressed core SFR (first int)
1299 */
1300 #define Ifx__mtcr(regaddr,val) __asm__ volatile ("mtcr %0,%1\n\tisync"::"i"(regaddr),"d"(val):"memory")
1301 #endif
1302
1303 /** Return parity
1304 */
1305 IFX_INLINE sint32 Ifx__parity(sint32 a)
1306 {
1307 sint32 res;
1308 __asm__ volatile ("parity %0,%1": "=d" (res) : "d" (a):"memory");
1309 return res;
1310 }
1311
1312 /** Return saturated byte
1313 */
1314 IFX_INLINE sint8 Ifx__satb(sint32 a)
1315 {
1316 sint8 res;
1317 __asm__ volatile ("sat.b %0,%1":"=d"(res):"d"(a));
1318 return res;
1319 }
1320
1321 /** Return saturated uint8
1322 */
1323 IFX_INLINE uint8 Ifx__satbu(sint32 a)
1324 {
1325 uint8 res;
1326 __asm__ volatile ("sat.bu %0,%1":"=d"(res):"d"(a));
1327 return res;
1328 }
1329
1330 /** Return saturated halfword
1331 */
1332 IFX_INLINE sint16 Ifx__sath(sint32 a)
1333 {
1334 sint8 res;
1335 __asm__ volatile ("sat.h %0,%1":"=d"(res):"d"(a));
1336 return res;
1337 }
1338
1339 /** Return saturated unsigned halfword
1340 */
1341 IFX_INLINE uint16 Ifx__sathu(sint32 a)
1342 {
1343 sint8 res;
1344 __asm__ volatile ("sat.hu %0,%1":"=d"(res):"d"(a));
1345 return res;
1346 }
1347
1348 /** \} */
1349
1350 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsaturation Saturation Arithmetic Support
1351 These intrinsics support saturation arithmetic
1352 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1353 * \{
1354 */
1355
1356 /** add signed with saturation
1357 */
1358 IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
1359 {
1360 sint32 res;
1361 __asm__ volatile ("adds %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1362 return res;
1363 }
1364
1365 /** add unsigned with saturation
1366 */
1367 IFX_INLINE uint32 Ifx__addsu(uint32 a, uint32 b)
1368 {
1369 uint32 res;
1370 __asm__ volatile ("adds.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1371 return res;
1372 }
1373
1374 /** substract signed with saturation
1375 */
1376 IFX_INLINE sint32 Ifx__subs(sint32 a, sint32 b)
1377 {
1378 sint32 res;
1379 __asm__ volatile ("subs %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1380 return res;
1381 }
1382
1383 /** substract unsigned with saturation
1384 */
1385 IFX_INLINE uint32 Ifx__subsu(uint32 a, uint32 b)
1386 {
1387 uint32 res;
1388 __asm__ volatile ("subs.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
1389 return res;
1390 }
1391
1392 /** \} */
1393
1394 /** \defgroup IfxLld_Cpu_Intrinsics_Gnucsingle_assembly Insert Single Assembly Instruction
1395 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
1396 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
1397 assembly instructions.
1398 * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
1399 * \{
1400 */
1401
1402 /** Insert DEBUG instruction
1403 */
1404 IFX_INLINE void Ifx__debug(void)
1405 {
1406 __asm__ volatile ("debug" : : : "memory");
1407 }
1408
1409 /** Insert a memory barrier
1410 */
1411 #define Ifx__mem_barrier __asm__ volatile("":::"memory");
1412
1413 /** Insert DSYNC instruction
1414 */
1415 IFX_INLINE void Ifx__dsync(void)
1416 {
1417 __asm__ volatile ("dsync" : : : "memory");
1418 }
1419
1420 /** Insert ISYNC instruction
1421 */
1422 IFX_INLINE void Ifx__isync(void)
1423 {
1424 __asm__ volatile ("isync" : : : "memory");
1425 }
1426
1427 /** Insert LDMST instruction. Note that all operands must be word-aligned.
1428 */
1429 IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
1430 {
1431 __asm__ volatile("mov %H2,%1 \n\
1432 ldmst [%0]0,%A2"
1433 ::"a"(address), "d"(mask), "d"((long long)value));
1434 }
1435
1436 /** Insert NOP instruction
1437 */
1438 IFX_INLINE void Ifx__nop(void)
1439 {
1440 __asm__ volatile ("nop" : : : "memory");
1441 }
1442
1443 /** Insert a loop over cnt NOP instruction
1444 */
1445 IFX_INLINE void Ifx__nops(void* cnt)
1446 {
1447 __asm__ volatile ("0: nop \n\
1448 loop %0,0b"
1449 ::"a"(((sint8*)cnt)-1));
1450 }
1451
1452 /** Insert RSLCX instruction
1453 */
1454 IFX_INLINE void Ifx__rslcx(void)
1455 {
1456 __asm__ volatile ("rslcx" : : : "memory");
1457 }
1458
1459 /** Insert SVLCX instruction
1460 */
1461 IFX_INLINE void Ifx__svlcx(void)
1462 {
1463 __asm__ volatile ("svlcx" : : : "memory");
1464 }
1465
1466 /** Insert SWAP instruction. Note that all operands must be word-aligned.
1467 */
1468 IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
1469 {
1470 uint32 res;
1471 __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
1472 return res;
1473 }
1474
1475 /** Insert n NOP instruction
1476 */
1477 #define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
1478
1479 /** \} */
1480
1481 /* FIXME use inline instead of #define */
1482 #define Ifx__setareg(areg,val) \
1483 { uint32 reg_val= (uint32)val; \
1484 __asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
1485
1486 /**__mtcr (CPU_CCTRL, 0);
1487 */
1488 IFX_INLINE void Ifx__stopPerfCounters(void)
1489 {
1490 __asm__ volatile("mov %%d0,0\n\
1491 mtcr 0xFC00,%%d0\n\
1492 isync\n"
1493 : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
1494 }
1495
1496 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
1497 * \param address address of resource.
1498 * \param value This variable is updated with status of address
1499 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
1500 *
1501 */
1502 IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
1503 unsigned int value, unsigned int condition)
1504 {
1505 /* Gnu C compiler with Tricore 1.6 support is required to use cmpswap instruction */
1506 __extension__ unsigned long long reg64
1507 = value | (unsigned long long) condition << 32;
1508
1509 __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
1510 : [reg] "+d" (reg64)
1511 : [addr] "a" (address)
1512 : "memory");
1513 return reg64;
1514 }
1515
1516 /** \brief Convert a fixpoint value to float32
1517 *
1518 * This function converts a value from a fixpoint format to a float32 format.
1519 *
1520 *
1521 * \param value value to be converted.
1522 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
1523 *
1524 * \return Returns the converted value in the float32 format.
1525 *
1526 */
1527 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
1528 {
1529 float32 result;
1530
1531 __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
1532 return result;
1533 }
1534
1535 IFX_INLINE void* Ifx__getA11(void)
1536 {
1537 uint32 *res;
1538 __asm__ volatile ("mov.aa %0, %%a11": "=a" (res) : :"a11");
1539 return res;
1540 }
1541
1542 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
1543 {
1544 __asm__ volatile ("mov.aa %%a10, %0": : "a" (stackAddr) :"a10");
1545 }
1546
1547 IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
1548 {
1549 uint32 returnvalue = 0; /* set value to 0 */
1550
1551 __asm__ volatile ("CRC32 %0,%1,%2" : "=d" (returnvalue) : "d"(b), "d"(a));
1552
1553 return returnvalue;
1554 }
1555
1556 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
1557 {
1558 uint32 returnvalue = 0; /* set seed value to 0 */
1559 for (;length > 0; length--)
1560 {
1561 /* calculate the CRC over all data */
1562 __asm__ ("CRC32 %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
1563 startaddress++;
1564 }
1565 return returnvalue;
1566 }
1567
1568 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
1569 {
1570 uint32 result;
1571 __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
1572 " mov %%d12,%%d14 # e12 = El \n"
1573 " mov %%d13, 0 # \n"
1574 " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
1575 " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
1576 " jz %%d15,done_%= # \n"
1577 " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
1578 " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
1579 " loopu cmp_m_%= # \n"
1580 " done_%=: mov %0,%%d14 # \n"
1581 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
1582 return result;
1583 }
1584
1585 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
1586 {
1587 sint32 res;
1588 __asm__ volatile ("popcnt %0,%1":"=d"(res):"d"(a));
1589 return res;
1590 }
1591
1592 /** Invalidate cache address "p". Generates CACHEA.I [Ab].
1593 */
1594 IFX_INLINE void Ifx__cacheai(uint8* p)
1595 {
1596 __asm__ volatile("cachea.i [%0]0"::"a"(p));
1597 }
1598
1599 /* Macros for backward compatibility of the intrinsics*/
1600 /******************************************************************************/
1601 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
1602 #ifndef __non_return_call
1603 #define __non_return_call Ifx__non_return_call
1604 #endif
1605
1606 #ifndef __jump_and_link
1607 #define __jump_and_link Ifx__jump_and_link
1608 #endif
1609
1610 #ifndef __moveToDataParam0
1611 #define __moveToDataParam0 Ifx__moveToDataParam0
1612 #endif
1613
1614 #ifndef __moveToDataParamRet
1615 #define __moveToDataParamRet Ifx__moveToDataParamRet
1616 #endif
1617
1618 #ifndef __getDataParamRet
1619 #define __getDataParamRet Ifx__getDataParamRet
1620 #endif
1621
1622 #ifndef __moveToAddrParam0
1623 #define __moveToAddrParam0 Ifx__moveToAddrParam0
1624 #endif
1625
1626 #ifndef __jumpToFunction
1627 #define __jumpToFunction Ifx__jumpToFunction
1628 #endif
1629
1630 #ifndef __jumpToFunctionWithLink
1631 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
1632 #endif
1633
1634 #ifndef __jumpBackToLink
1635 #define __jumpBackToLink Ifx__jumpBackToLink
1636 #endif
1637
1638 #ifndef __minX
1639 #define __minX Ifx__minX
1640 #endif
1641
1642 #ifndef __maxX
1643 #define __maxX Ifx__maxX
1644 #endif
1645
1646 #ifndef __saturateX
1647 #define __saturateX Ifx__saturateX
1648 #endif
1649
1650 #ifndef __checkrangeX
1651 #define __checkrangeX Ifx__checkrangeX
1652 #endif
1653
1654 #ifndef __saturate
1655 #define __saturate Ifx__saturate
1656 #endif
1657
1658 #ifndef __saturateu
1659 #define __saturateu Ifx__saturateu
1660 #endif
1661
1662 #ifndef __max
1663 #define __max Ifx__max
1664 #endif
1665
1666 #ifndef __maxs
1667 #define __maxs Ifx__maxs
1668 #endif
1669
1670 #ifndef __maxu
1671 #define __maxu Ifx__maxu
1672 #endif
1673
1674 #ifndef __min
1675 #define __min Ifx__min
1676 #endif
1677
1678 #ifndef __mins
1679 #define __mins Ifx__mins
1680 #endif
1681
1682 #ifndef __minu
1683 #define __minu Ifx__minu
1684 #endif
1685
1686 #ifndef __sqrtf
1687 #define __sqrtf Ifx__sqrtf
1688 #endif
1689
1690 #ifndef __sqrf
1691 #define __sqrf Ifx__sqrf
1692 #endif
1693
1694 #ifndef __checkrange
1695 #define __checkrange Ifx__checkrange
1696 #endif
1697
1698 #ifndef __roundf
1699 #define __roundf Ifx__roundf
1700 #endif
1701
1702 #ifndef __absf
1703 #define __absf Ifx__absf
1704 #endif
1705
1706 #ifndef __saturatef
1707 #define __saturatef Ifx__saturatef
1708 #endif
1709
1710 #ifndef __minf
1711 #define __minf Ifx__minf
1712 #endif
1713
1714 #ifndef __maxf
1715 #define __maxf Ifx__maxf
1716 #endif
1717
1718 #ifndef __checkrangef
1719 #define __checkrangef Ifx__checkrangef
1720 #endif
1721
1722 #ifndef __abs_stdreal
1723 #define __abs_stdreal Ifx__abs_stdreal
1724 #endif
1725
1726 #ifndef __saturate_stdreal
1727 #define __saturate_stdreal Ifx__saturate_stdreal
1728 #endif
1729
1730 #ifndef __min_stdreal
1731 #define __min_stdreal Ifx__min_stdreal
1732 #endif
1733
1734 #ifndef __max_stdreal
1735 #define __max_stdreal Ifx__max_stdreal
1736 #endif
1737
1738 #ifndef __neqf
1739 #define __neqf Ifx__neqf
1740 #endif
1741
1742 #ifndef __leqf
1743 #define __leqf Ifx__leqf
1744 #endif
1745
1746 #ifndef __geqf
1747 #define __geqf Ifx__geqf
1748 #endif
1749
1750 #ifndef __clssf
1751 #define __clssf Ifx__clssf
1752 #endif
1753
1754 #ifndef __fract_to_float
1755 #define __fract_to_float Ifx__fract_to_float
1756 #endif
1757
1758 #ifndef __fract_to_sfract
1759 #define __fract_to_sfract Ifx__fract_to_sfract
1760 #endif
1761
1762 #ifndef __float_to_sfract
1763 #define __float_to_sfract Ifx__float_to_sfract
1764 #endif
1765
1766 #ifndef __float_to_fract
1767 #define __float_to_fract Ifx__float_to_fract
1768 #endif
1769
1770 #ifndef __getfract
1771 #define __getfract Ifx__getfract
1772 #endif
1773
1774 #ifndef __mac_r_sf
1775 #define __mac_r_sf Ifx__mac_r_sf
1776 #endif
1777
1778 #ifndef __mac_sf
1779 #define __mac_sf Ifx__mac_sf
1780 #endif
1781
1782 #ifndef __mulfractfract
1783 #define __mulfractfract Ifx__mulfractfract
1784 #endif
1785
1786 #ifndef __mulfractlong
1787 #define __mulfractlong Ifx__mulfractlong
1788 #endif
1789
1790 #ifndef __round16
1791 #define __round16 Ifx__round16
1792 #endif
1793
1794 #ifndef __s16_to_sfract
1795 #define __s16_to_sfract Ifx__s16_to_sfract
1796 #endif
1797
1798 #ifndef __sfract_to_s16
1799 #define __sfract_to_s16 Ifx__sfract_to_s16
1800 #endif
1801
1802 #ifndef __sfract_to_u16
1803 #define __sfract_to_u16 Ifx__sfract_to_u16
1804 #endif
1805
1806 #ifndef __shaaccum
1807 #define __shaaccum Ifx__shaaccum
1808 #endif
1809
1810 #ifndef __shafracts
1811 #define __shafracts Ifx__shafracts
1812 #endif
1813
1814 #ifndef __shasfracts
1815 #define __shasfracts Ifx__shasfracts
1816 #endif
1817
1818 #ifndef __u16_to_sfract
1819 #define __u16_to_sfract Ifx__u16_to_sfract
1820 #endif
1821
1822 #ifndef __extr
1823 #define __extr Ifx__extr
1824 #endif
1825
1826 #ifndef __extru
1827 #define __extru Ifx__extru
1828 #endif
1829
1830 #ifndef __getbit
1831 #define __getbit Ifx__getbit
1832 #endif
1833
1834 #ifndef __ins
1835 #define __ins Ifx__ins
1836 #endif
1837
1838 #ifndef __insert
1839 #define __insert Ifx__insert
1840 #endif
1841
1842 #ifndef __insn
1843 #define __insn Ifx__insn
1844 #endif
1845
1846 #ifndef __putbit
1847 #define __putbit Ifx__putbit
1848 #endif
1849
1850 #ifndef __imaskldmst
1851 #define __imaskldmst Ifx__imaskldmst
1852 #endif
1853
1854 #ifndef __bisr
1855 #define __bisr Ifx__bisr
1856 #endif
1857
1858 #ifndef __disable
1859 #define __disable Ifx__disable
1860 #endif
1861
1862 #ifndef __disable_and_save
1863 #define __disable_and_save Ifx__disable_and_save
1864 #endif
1865
1866 #ifndef __enable
1867 #define __enable Ifx__enable
1868 #endif
1869
1870 #ifndef __restore
1871 #define __restore Ifx__restore
1872 #endif
1873
1874 #ifndef __syscall
1875 #define __syscall Ifx__syscall
1876 #endif
1877
1878 #ifndef __tric_syscall
1879 #define __tric_syscall Ifx__tric_syscall
1880 #endif
1881
1882 #ifndef __cacheawi
1883 #define __cacheawi Ifx__cacheawi
1884 #endif
1885
1886 #ifndef __cacheiwi
1887 #define __cacheiwi Ifx__cacheiwi
1888 #endif
1889
1890 #ifndef __cacheawi_bo_post_inc
1891 #define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
1892 #endif
1893
1894 #ifndef __mulsc
1895 #define __mulsc Ifx__mulsc
1896 #endif
1897
1898 #ifndef __rol
1899 #define __rol Ifx__rol
1900 #endif
1901
1902 #ifndef __ror
1903 #define __ror Ifx__ror
1904 #endif
1905
1906 #ifndef __extractbyte1
1907 #define __extractbyte1 Ifx__extractbyte1
1908 #endif
1909
1910 #ifndef __extractbyte2
1911 #define __extractbyte2 Ifx__extractbyte2
1912 #endif
1913
1914 #ifndef __extractbyte3
1915 #define __extractbyte3 Ifx__extractbyte3
1916 #endif
1917
1918 #ifndef __extractbyte4
1919 #define __extractbyte4 Ifx__extractbyte4
1920 #endif
1921
1922 #ifndef __extracthw1
1923 #define __extracthw1 Ifx__extracthw1
1924 #endif
1925
1926 #ifndef __extracthw2
1927 #define __extracthw2 Ifx__extracthw2
1928 #endif
1929
1930 #ifndef __extractubyte1
1931 #define __extractubyte1 Ifx__extractubyte1
1932 #endif
1933
1934 #ifndef __extractubyte2
1935 #define __extractubyte2 Ifx__extractubyte2
1936 #endif
1937
1938 #ifndef __extractubyte3
1939 #define __extractubyte3 Ifx__extractubyte3
1940 #endif
1941
1942 #ifndef __extractubyte4
1943 #define __extractubyte4 Ifx__extractubyte4
1944 #endif
1945
1946 #ifndef __extractuhw1
1947 #define __extractuhw1 Ifx__extractuhw1
1948 #endif
1949
1950 #ifndef __extractuhw2
1951 #define __extractuhw2 Ifx__extractuhw2
1952 #endif
1953
1954 #ifndef __getbyte1
1955 #define __getbyte1 Ifx__getbyte1
1956 #endif
1957
1958 #ifndef __getbyte2
1959 #define __getbyte2 Ifx__getbyte2
1960 #endif
1961
1962 #ifndef __getbyte3
1963 #define __getbyte3 Ifx__getbyte3
1964 #endif
1965
1966 #ifndef __getbyte4
1967 #define __getbyte4 Ifx__getbyte4
1968 #endif
1969
1970 #ifndef __gethw1
1971 #define __gethw1 Ifx__gethw1
1972 #endif
1973
1974 #ifndef __gethw2
1975 #define __gethw2 Ifx__gethw2
1976 #endif
1977
1978 #ifndef __getubyte1
1979 #define __getubyte1 Ifx__getubyte1
1980 #endif
1981
1982 #ifndef __getubyte2
1983 #define __getubyte2 Ifx__getubyte2
1984 #endif
1985
1986 #ifndef __getubyte3
1987 #define __getubyte3 Ifx__getubyte3
1988 #endif
1989
1990 #ifndef __getubyte4
1991 #define __getubyte4 Ifx__getubyte4
1992 #endif
1993
1994 #ifndef __getuhw1
1995 #define __getuhw1 Ifx__getuhw1
1996 #endif
1997
1998 #ifndef __getuhw2
1999 #define __getuhw2 Ifx__getuhw2
2000 #endif
2001
2002 #ifndef __setbyte1
2003 #define __setbyte1 Ifx__setbyte1
2004 #endif
2005
2006 #ifndef __setbyte2
2007 #define __setbyte2 Ifx__setbyte2
2008 #endif
2009
2010 #ifndef __setbyte3
2011 #define __setbyte3 Ifx__setbyte3
2012 #endif
2013
2014 #ifndef __setbyte4
2015 #define __setbyte4 Ifx__setbyte4
2016 #endif
2017
2018 #ifndef __sethw1
2019 #define __sethw1 Ifx__sethw1
2020 #endif
2021
2022 #ifndef __sethw2
2023 #define __sethw2 Ifx__sethw2
2024 #endif
2025
2026 #ifndef __setubyte1
2027 #define __setubyte1 Ifx__setubyte1
2028 #endif
2029
2030 #ifndef __setubyte2
2031 #define __setubyte2 Ifx__setubyte2
2032 #endif
2033
2034 #ifndef __setubyte3
2035 #define __setubyte3 Ifx__setubyte3
2036 #endif
2037
2038 #ifndef __setubyte4
2039 #define __setubyte4 Ifx__setubyte4
2040 #endif
2041
2042 #ifndef __setuhw1
2043 #define __setuhw1 Ifx__setuhw1
2044 #endif
2045
2046 #ifndef __setuhw2
2047 #define __setuhw2 Ifx__setuhw2
2048 #endif
2049
2050 #ifndef __minhu
2051 #define __minhu Ifx__minhu
2052 #endif
2053
2054 #ifndef __minh
2055 #define __minh Ifx__minh
2056 #endif
2057
2058 #ifndef __minbu
2059 #define __minbu Ifx__minbu
2060 #endif
2061
2062 #ifndef __minb
2063 #define __minb Ifx__minb
2064 #endif
2065
2066 #ifndef __insertuhw2
2067 #define __insertuhw2 Ifx__insertuhw2
2068 #endif
2069
2070 #ifndef __insertuhw1
2071 #define __insertuhw1 Ifx__insertuhw1
2072 #endif
2073
2074 #ifndef __inserthw2
2075 #define __inserthw2 Ifx__inserthw2
2076 #endif
2077
2078 #ifndef __inserthw1
2079 #define __inserthw1 Ifx__inserthw1
2080 #endif
2081
2082 #ifndef __insertubyte4
2083 #define __insertubyte4 Ifx__insertubyte4
2084 #endif
2085
2086 #ifndef __insertubyte3
2087 #define __insertubyte3 Ifx__insertubyte3
2088 #endif
2089
2090 #ifndef __insertubyte2
2091 #define __insertubyte2 Ifx__insertubyte2
2092 #endif
2093
2094 #ifndef __insertubyte1
2095 #define __insertubyte1 Ifx__insertubyte1
2096 #endif
2097
2098 #ifndef __insertbyte4
2099 #define __insertbyte4 Ifx__insertbyte4
2100 #endif
2101
2102 #ifndef __insertbyte3
2103 #define __insertbyte3 Ifx__insertbyte3
2104 #endif
2105
2106 #ifndef __insertbyte2
2107 #define __insertbyte2 Ifx__insertbyte2
2108 #endif
2109
2110 #ifndef __insertbyte1
2111 #define __insertbyte1 Ifx__insertbyte1
2112 #endif
2113
2114 #ifndef __initupackhw
2115 #define __initupackhw Ifx__initupackhw
2116 #endif
2117
2118 #ifndef __initupackb
2119 #define __initupackb Ifx__initupackb
2120 #endif
2121
2122 #ifndef __initpackhwl
2123 #define __initpackhwl Ifx__initpackhwl
2124 #endif
2125
2126 #ifndef __initpackhw
2127 #define __initpackhw Ifx__initpackhw
2128 #endif
2129
2130 #ifndef __initpackbl
2131 #define __initpackbl Ifx__initpackbl
2132 #endif
2133
2134 #ifndef __initpackb
2135 #define __initpackb Ifx__initpackb
2136 #endif
2137
2138 #ifndef __absb
2139 #define __absb Ifx__absb
2140 #endif
2141
2142 #ifndef __absh
2143 #define __absh Ifx__absh
2144 #endif
2145
2146 #ifndef __abssh
2147 #define __abssh Ifx__abssh
2148 #endif
2149
2150
2151 #ifndef __abs
2152 #define __abs Ifx__abs
2153 #endif
2154
2155 #ifndef __absdif
2156 #define __absdif Ifx__absdif
2157 #endif
2158
2159 #ifndef __abss
2160 #define __abss Ifx__abss
2161 #endif
2162
2163 #ifndef __clo
2164 #define __clo Ifx__clo
2165 #endif
2166
2167 #ifndef __cls
2168 #define __cls Ifx__cls
2169 #endif
2170
2171 #ifndef __clz
2172 #define __clz Ifx__clz
2173 #endif
2174
2175 #ifndef __fabs
2176 #define __fabs Ifx__fabs
2177 #endif
2178
2179 #ifndef __fabsf
2180 #define __fabsf Ifx__fabsf
2181 #endif
2182
2183 #ifndef __mfcr
2184 #define __mfcr Ifx__mfcr
2185 #endif
2186
2187 #ifndef __mtcr
2188 #define __mtcr Ifx__mtcr
2189 #endif
2190
2191 #ifndef __parity
2192 #define __parity Ifx__parity
2193 #endif
2194
2195 #ifndef __satb
2196 #define __satb Ifx__satb
2197 #endif
2198
2199 #ifndef __satbu
2200 #define __satbu Ifx__satbu
2201 #endif
2202
2203 #ifndef __sath
2204 #define __sath Ifx__sath
2205 #endif
2206
2207 #ifndef __sathu
2208 #define __sathu Ifx__sathu
2209 #endif
2210
2211 #ifndef __adds
2212 #define __adds Ifx__adds
2213 #endif
2214
2215 #ifndef __addsu
2216 #define __addsu Ifx__addsu
2217 #endif
2218
2219 #ifndef __subs
2220 #define __subs Ifx__subs
2221 #endif
2222
2223 #ifndef __subsu
2224 #define __subsu Ifx__subsu
2225 #endif
2226
2227 #ifndef __debug
2228 #define __debug Ifx__debug
2229 #endif
2230
2231 #ifndef __mem_barrier
2232 #define __mem_barrier Ifx__mem_barrier
2233 #endif
2234
2235 #ifndef __dsync
2236 #define __dsync Ifx__dsync
2237 #endif
2238
2239 #ifndef __isync
2240 #define __isync Ifx__isync
2241 #endif
2242
2243 #ifndef __ldmst
2244 #define __ldmst Ifx__ldmst
2245 #endif
2246
2247 #ifndef __nop
2248 #define __nop Ifx__nop
2249 #endif
2250
2251 #ifndef __nops
2252 #define __nops Ifx__nops
2253 #endif
2254
2255 #ifndef __rslcx
2256 #define __rslcx Ifx__rslcx
2257 #endif
2258
2259 #ifndef __svlcx
2260 #define __svlcx Ifx__svlcx
2261 #endif
2262
2263 #ifndef __swap
2264 #define __swap Ifx__swap
2265 #endif
2266
2267 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2268 #define NOP Ifx__NOP
2269 #endif
2270
2271 #ifndef __setareg
2272 #define __setareg Ifx__setareg
2273 #endif
2274
2275 #ifndef __stopPerfCounters
2276 #define __stopPerfCounters Ifx__stopPerfCounters
2277 #endif
2278
2279 #ifndef __cmpAndSwap
2280 #define __cmpAndSwap Ifx__cmpAndSwap
2281 #endif
2282
2283 #ifndef __fixpoint_to_float32
2284 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
2285 #endif
2286
2287 #ifndef __getA11
2288 #define __getA11 Ifx__getA11
2289 #endif
2290
2291 #ifndef __setStackPointer
2292 #define __setStackPointer Ifx__setStackPointer
2293 #endif
2294
2295 #if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
2296 #define __crc32 Ifx__crc32
2297 #endif
2298
2299 #ifndef __popcnt
2300 #define __popcnt Ifx__popcnt
2301 #endif
2302
2303 #ifndef __cacheai
2304 #define __cacheai Ifx__cacheai
2305 #endif
2306
2307 #endif
2308 /******************************************************************************/
2309 /* *INDENT-ON* */
2310 /******************************************************************************/
2311 #endif /* IFXCPU_INTRINSICSGNUC_H */
Ifx__sathu
IFX_INLINE uint16 Ifx__sathu(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1341
Ifx__setbyte3
IFX_INLINE void Ifx__setbyte3(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1122
Ifx__initupackb
IFX_INLINE __upackb Ifx__initupackb(uint32 a, uint32 b, uint32 c, uint32 d)
Definition: IfxCpu_IntrinsicsGnuc.h:920
Ifx__restore
IFX_INLINE void Ifx__restore(sint32 ie)
Definition: IfxCpu_IntrinsicsGnuc.h:516
Ifx__parity
IFX_INLINE sint32 Ifx__parity(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1305
Ifx__extru
IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:425
Ifx__insertubyte1
IFX_INLINE __upackb Ifx__insertubyte1(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:982
Ifx__getbyte2
IFX_INLINE sint8 Ifx__getbyte2(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:761
Ifx__setuhw2
IFX_INLINE void Ifx__setuhw2(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1212
Ifx__extractubyte4
IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:719
Ifx__subsu
IFX_INLINE uint32 Ifx__subsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1385
Ifx__shaaccum
IFX_INLINE laccum Ifx__shaaccum(laccum a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:361
Ifx__satb
IFX_INLINE sint8 Ifx__satb(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1314
__packb
long __packb
Definition: Ifx_TypesDcc.h:30
Ifx__u16_to_sfract
IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
Definition: IfxCpu_IntrinsicsGnuc.h:396
Ifx__insertuhw1
IFX_INLINE __upackhw Ifx__insertuhw1(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1042
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsGnuc.h:261
Ifx__swap
IFX_INLINE uint32 Ifx__swap(void *place, uint32 value)
Definition: IfxCpu_IntrinsicsGnuc.h:1468
Ifx__minu
IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:175
Ifx__min
IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:157
sfract
short sfract
Definition: Ifx_TypesDcc.h:28
Ifx__getubyte3
IFX_INLINE uint8 Ifx__getubyte3(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:840
Ifx__initpackhwl
IFX_INLINE __packhw Ifx__initpackhwl(long a)
Definition: IfxCpu_IntrinsicsGnuc.h:913
Ifx__setbyte4
IFX_INLINE void Ifx__setbyte4(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1132
Ifx__insertbyte3
IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:962
Ifx__subs
IFX_INLINE sint32 Ifx__subs(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1376
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsGnuc.h:1568
Ifx__crc32
IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1547
Ifx__svlcx
IFX_INLINE void Ifx__svlcx(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1461
Ifx__round16
IFX_INLINE sfract Ifx__round16(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:318
Ifx__shasfracts
IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:387
Ifx__sath
IFX_INLINE sint16 Ifx__sath(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1332
__asm__
#define __asm__
Definition: Ifx_TypesTasking.h:28
Ifx__absdif
IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1234
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsGnuc.h:55
Ifx__extracthw2
IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:679
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx__getuhw1
IFX_INLINE uint16 Ifx__getuhw1(__upackhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:862
Ifx__extractubyte3
IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:709
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsGnuc.h:1445
Ifx__setbyte1
IFX_INLINE void Ifx__setbyte1(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1102
Ifx__inserthw2
IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1032
float32
float float32
Definition: Platform_Types.h:167
Ifx__cacheawi_bo_post_inc
IFX_INLINE uint8 * Ifx__cacheawi_bo_post_inc(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:551
Ifx__extractubyte1
IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:689
Ifx__adds
IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1358
Ifx__sfract_to_u16
IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:351
__upackhw
unsigned long __upackhw
Definition: Ifx_TypesDcc.h:33
Ifx__debug
IFX_INLINE void Ifx__debug(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1404
Ifx__getubyte1
IFX_INLINE uint8 Ifx__getubyte1(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:818
Ifx__extr
IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:413
Ifx__getubyte4
IFX_INLINE uint8 Ifx__getubyte4(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:851
Ifx__insertubyte3
IFX_INLINE __upackb Ifx__insertubyte3(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1002
Ifx__absh
IFX_INLINE __packhw Ifx__absh(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:609
Ifx__ldmst
IFX_INLINE void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
Definition: IfxCpu_IntrinsicsGnuc.h:1429
Ifx__getfract
IFX_INLINE fract Ifx__getfract(laccum a)
Definition: IfxCpu_IntrinsicsGnuc.h:269
Ifx__insertuhw2
IFX_INLINE __upackhw Ifx__insertuhw2(__upackhw a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1052
Ifx__rslcx
IFX_INLINE void Ifx__rslcx(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1454
Ifx__minbu
IFX_INLINE __upackb Ifx__minbu(__upackb a, __upackb b)
Definition: IfxCpu_IntrinsicsGnuc.h:1072
Ifx__satbu
IFX_INLINE uint8 Ifx__satbu(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1323
Ifx__minb
IFX_INLINE __packb Ifx__minb(__packb a, __packb b)
Definition: IfxCpu_IntrinsicsGnuc.h:1062
Ifx__mac_r_sf
IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGnuc.h:278
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsGnuc.h:87
Ifx__insertubyte4
IFX_INLINE __upackb Ifx__insertubyte4(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1012
Ifx__initpackbl
IFX_INLINE __packb Ifx__initpackbl(long a)
Definition: IfxCpu_IntrinsicsGnuc.h:896
sint16
short sint16
Definition: Platform_Types.h:126
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsGnuc.h:1556
Ifx__setbyte2
IFX_INLINE void Ifx__setbyte2(__packb *a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1112
__packhw
long __packhw
Definition: Ifx_TypesDcc.h:32
Ifx__cacheai
IFX_INLINE void Ifx__cacheai(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:1594
Ifx__maxu
IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:148
fract
long fract
Definition: Ifx_TypesDcc.h:27
Ifx__gethw1
IFX_INLINE sint16 Ifx__gethw1(__packhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:797
Ifx__shafracts
IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:378
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
laccum
long long laccum
Definition: Ifx_TypesDcc.h:29
Ifx__insertbyte2
IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:952
Ifx__extractbyte2
IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:639
Ifx__abss
IFX_INLINE sint32 Ifx__abss(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1243
Ifx__extractbyte4
IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:659
Ifx__extractubyte2
IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
Definition: IfxCpu_IntrinsicsGnuc.h:699
Ifx__setubyte4
IFX_INLINE void Ifx__setubyte4(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1192
Ifx__abssh
IFX_INLINE __packhw Ifx__abssh(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:619
Ifx__initpackb
IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
Definition: IfxCpu_IntrinsicsGnuc.h:884
Ifx__max
IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:131
Ifx__maxs
IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:140
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsGnuc.h:51
Ifx__getuhw2
IFX_INLINE uint16 Ifx__getuhw2(__upackhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:873
Ifx__clssf
IFX_INLINE sint16 Ifx__clssf(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:221
__upackb
unsigned long __upackb
Definition: Ifx_TypesDcc.h:31
Ifx__insertubyte2
IFX_INLINE __upackb Ifx__insertubyte2(__upackb a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:992
Ifx__extractuhw2
IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:739
Ifx__addsu
IFX_INLINE uint32 Ifx__addsu(uint32 a, uint32 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1367
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__dsync
IFX_INLINE void Ifx__dsync(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1415
Ifx__sethw1
IFX_INLINE void Ifx__sethw1(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1142
Ifx__initupackhw
IFX_INLINE __upackhw Ifx__initupackhw(uint16 a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:932
Ifx__disable_and_save
IFX_INLINE sint32 Ifx__disable_and_save(void)
Definition: IfxCpu_IntrinsicsGnuc.h:503
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsGnuc.h:60
Ifx__getbyte3
IFX_INLINE sint8 Ifx__getbyte3(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:773
Ifx__getbyte1
IFX_INLINE sint8 Ifx__getbyte1(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:749
Ifx__isync
IFX_INLINE void Ifx__isync(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1422
Ifx__setuhw1
IFX_INLINE void Ifx__setuhw1(__upackhw *a, uint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1202
Ifx__insert
IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
Definition: IfxCpu_IntrinsicsGnuc.h:460
Ifx__minhu
IFX_INLINE __upackhw Ifx__minhu(__upackhw a, __upackhw b)
Definition: IfxCpu_IntrinsicsGnuc.h:1092
Ifx__fabsf
IFX_INLINE float Ifx__fabsf(float f)
Definition: IfxCpu_IntrinsicsGnuc.h:1283
Ifx__inserthw1
IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1022
Ifx__mins
IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:166
Ifx__sfract_to_s16
IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
Definition: IfxCpu_IntrinsicsGnuc.h:341
Ifx__mulfractlong
IFX_INLINE long Ifx__mulfractlong(fract a, long b)
Definition: IfxCpu_IntrinsicsGnuc.h:309
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsGnuc.h:1527
Ifx__cacheiwi
IFX_INLINE void Ifx__cacheiwi(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:543
Ifx__setubyte3
IFX_INLINE void Ifx__setubyte3(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1182
Ifx__cacheawi
IFX_INLINE void Ifx__cacheawi(uint8 *p)
Definition: IfxCpu_IntrinsicsGnuc.h:537
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx__fract_to_sfract
IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:249
Ifx__cmpAndSwap
IFX_INLINE unsigned int Ifx__cmpAndSwap(unsigned int volatile *address, unsigned int value, unsigned int condition)
This function is a implementation of a binary semaphore using compare and swap instruction.
Definition: IfxCpu_IntrinsicsGnuc.h:1502
Ifx__insertbyte1
IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:942
Ifx__initpackhw
IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:903
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsGnuc.h:240
Ifx__cls
IFX_INLINE sint32 Ifx__cls(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1261
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1488
Ifx__mulfractfract
IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
Definition: IfxCpu_IntrinsicsGnuc.h:300
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsGnuc.h:82
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsGnuc.h:77
Ifx__mulsc
IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
Definition: IfxCpu_IntrinsicsGnuc.h:561
Ifx__getubyte2
IFX_INLINE uint8 Ifx__getubyte2(__upackb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:829
sint32
long sint32
Definition: Platform_Types.h:131
Ifx__clo
IFX_INLINE sint32 Ifx__clo(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1252
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsGnuc.h:70
Ifx__popcnt
IFX_INLINE sint32 Ifx__popcnt(sint32 a)
Definition: IfxCpu_IntrinsicsGnuc.h:1585
Ifx__getbyte4
IFX_INLINE sint8 Ifx__getbyte4(__packb *a)
Definition: IfxCpu_IntrinsicsGnuc.h:785
Ifx__setubyte1
IFX_INLINE void Ifx__setubyte1(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1162
Ifx__nop
IFX_INLINE void Ifx__nop(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1438
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsGnuc.h:92
Ifx__ins
IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
Definition: IfxCpu_IntrinsicsGnuc.h:451
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsGnuc.h:65
Ifx__insn
IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
Definition: IfxCpu_IntrinsicsGnuc.h:472
Ifx__extractuhw1
IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:729
Ifx__rol
IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGnuc.h:572
Ifx__ror
IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
Definition: IfxCpu_IntrinsicsGnuc.h:581
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsGnuc.h:1535
Ifx__mac_sf
IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
Definition: IfxCpu_IntrinsicsGnuc.h:289
Ifx__s16_to_sfract
IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
Definition: IfxCpu_IntrinsicsGnuc.h:331
Ifx__insertbyte4
IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:972
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx__extractbyte1
IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:629
Ifx__gethw2
IFX_INLINE sint16 Ifx__gethw2(__packhw *a)
Definition: IfxCpu_IntrinsicsGnuc.h:807
sint8
signed char sint8
Definition: Platform_Types.h:122
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsGnuc.h:1542
Ifx__absb
IFX_INLINE __packb Ifx__absb(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:599
Ifx__extractbyte3
IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
Definition: IfxCpu_IntrinsicsGnuc.h:649
Ifx__sethw2
IFX_INLINE void Ifx__sethw2(__packhw *a, sint16 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1152
Ifx__fract_to_float
IFX_INLINE float Ifx__fract_to_float(fract a)
Definition: IfxCpu_IntrinsicsGnuc.h:231
Ifx__setubyte2
IFX_INLINE void Ifx__setubyte2(__upackb *a, uint8 b)
Definition: IfxCpu_IntrinsicsGnuc.h:1172
Ifx__minh
IFX_INLINE __packhw Ifx__minh(__packhw a, __packhw b)
Definition: IfxCpu_IntrinsicsGnuc.h:1082
Ifx__extracthw1
IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
Definition: IfxCpu_IntrinsicsGnuc.h:669
Ifx__fabs
IFX_INLINE double Ifx__fabs(double d)
Definition: IfxCpu_IntrinsicsGnuc.h:1274


iLLD_TC26B: IfxCpu_IntrinsicsTasking.h Source File

  • Cpu
  • Std
IfxCpu_IntrinsicsTasking.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_IntrinsicsTasking.h
3 *
4 * \version iLLD_1_0_1_11_0
5 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
6 *
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup IfxLld_Cpu_Intrinsics_Tasking Intrinsics for TASKING compiler
24 * \ingroup IfxLld_Cpu_Intrinsics
25 *
26 */
27 #ifndef IFXCPU_INTRINSICSTASKING_H
28 #define IFXCPU_INTRINSICSTASKING_H
29 /******************************************************************************/
30 #include "Ifx_Types.h"
31 /******************************************************************************/
32 /* *INDENT-OFF* */
33
34 #ifndef __cplusplus
35 /** Function call without return
36 */
37 #define Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
38
39 /** Jump and link
40 */
41 IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
42 {
43 __asm("jli %0"::"a"(fun));
44 }
45
46 IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
47 {
48 __asm("mov d4, %0"::"d"(var));
49 }
50
51 IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
52 {
53 __asm("mov.aa a4, %0"::"a"(var));
54 }
55
56 IFX_INLINE unsigned int Ifx__getDataParamRet(void)
57 {
58 unsigned int var;
59 __asm(" mov\t %0, d2":"=d"(var));
60 return var;
61 }
62
63 IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
64 {
65 __asm("mov d2, %0"::"d"(var));
66 }
67
68 IFX_INLINE void Ifx__jumpToFunction(const void *fun)
69 {
70 Ifx__non_return_call(fun);
71 }
72
73 IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
74 {
75 Ifx__jump_and_link((void (*)(void))fun);
76 }
77
78 IFX_INLINE void Ifx__jumpBackToLink(void)
79 {
80 __asm("ji a11");
81 }
82 #endif
83 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_any_type Cross type arithmetic operation
84 *
85 * Macro compatible with float, fix point, signed integer and unsigned integer
86 *
87 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
88 * \{
89 */
90 #define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
91 #define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
92 #define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
93 #define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
94 /** \} */
95
96 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_singed_integer Signed integer operation
97 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
98 * \{
99 */
100 #define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
101 /** \} */
102
103 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_unsinged_integer Unsigned integer operation
104 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
105 * \{
106 */
107 #define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
108 /** \} */
109
110 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_float Floating point operation
111 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
112 * \{
113 */
114 #define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
115
116 #define Ifx__sqrf(X) ((X) * (X))
117 #define Ifx__sqrtf(X) sqrtf(X)
118
119 #define Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
120 #define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
121 #define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
122 #define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
123 #define Ifx__saturatef(X,Min,Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
124 #define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
125
126 #define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
127 #define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
128 #define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
129 #define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
130
131 #define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
132 #define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
133 #define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
134 /** \} */
135 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_fractional Fractional Arithmetic Support
136 The next table provides an overview of intrinsic functions to convert fractional values. Note that the
137 TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
138 need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
139 compiler does support these functions.
140 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
141 * \{
142 */
143 #define Ifx__fract_to_float(value) ((float)(value))
144
145 #define Ifx__mulfractlong __mulfractlong
146
147 #define Ifx__mulfractfract(fractvalue1,fractvalue2) ((fractvalue1)*(fractvalue2))
148
149 /** \} */
150
151 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_insert Insert / Extract Bit-fields and Bits
152 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
153 * \{
154 */
155
156 #define Ifx__extru(a, p, w) __extru(a,p,w)
157
158 #define Ifx__extr(a, p, w) __extr(a,p,w)
159
160 #define Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
161
162 #define Ifx__insert(a,b,p,w) __insert(a,b,p,w)
163
164 /** \} */
165
166 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_interrupt_handling Interrupt Handling
167 The next table provides an overview of the intrinsic functions to read or set interrupt handling.
168 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
169 * \{
170 */
171 #define Ifx__disable_and_save __disable_and_save
172
173 #define Ifx__restore __restore
174
175 /** \} */
176
177 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_miscellaneous Miscellaneous Intrinsic Functions
178 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
179 * \{
180 */
181
182 /** \} */
183
184 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_packed Packed Data Type Support
185 The next table provides an overview of the intrinsic functions for initialization of packed data type.
186 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
187 * \{
188 */
189
190 /** \} */
191
192 #ifndef __cplusplus
193 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_register Register Handling
194 The next table provides an overview of the intrinsic functions that you can use to access control registers.
195 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
196 * \{
197 */
198 #define Ifx__mtcr_no_isync(reg, val) \
199 __asm("mtcr %0,%1"::"i"(reg),"d"(val));
200
201 /** \} */
202
203 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_saturation Saturation Arithmetic Support
204 These intrinsics support saturation arithmetic
205 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
206 * \{
207 */
208
209 #define Ifx__adds(a,b) ((__sat int)(a)+(__sat int)(b))
210
211 #define Ifx__addsu(a,b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
212
213 #define Ifx__subs(a,b) ((__sat int)(a)-(__sat int)(b))
214
215 #define Ifx__subsu(a,b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
216
217 /** \} */
218
219 /** \defgroup IfxLld_Cpu_Intrinsics_Tasking_single_assembly Insert Single Assembly Instruction
220 The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
221 instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
222 assembly instructions.
223 * \ingroup IfxLld_Cpu_Intrinsics_Tasking
224 * \{
225 */
226
227 IFX_INLINE void Ifx__nops(void* cnt)
228 {
229 __asm("nop16 \n\t"
230 "loop %0,*-2"
231 ::"a"(((char*)cnt) - 1));
232 }
233
234 #define Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
235
236 /** Insert a memory barrier
237 */
238 #define Ifx__mem_barrier __asm("":::"memory");
239
240 #if CPU_NO_LDMST
241 IFX_INLINE void Ifx__ldmstC(volatile void *addr, uint32 mask, uint32 data)
242 {
243 *(volatile uint32 *)addr = (*(volatile uint32 *)addr & ~mask) | (mask & data);
244 }
245
246 #define Ifx__ldmst(a,b,c) Ifx__ldmstC(a,b,c)
247 #else
248
249 IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
250 {
251 __asm("\tmov d3, %1 \n"
252 "\tmov d2, %2 \n"
253 "\tldmst [%0],e2"
254 ::"a"(addr), "d"(mask), "d"(data):"d2", "d3");
255
256 }
257
258 /** Convert float to fract
259 */
260 IFX_INLINE fract Ifx__float_to_fract(float a)
261 {
262 fract res;
263 __asm("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
264 return res;
265 }
266
267 #define Ifx__fract_to_sfract __round16
268
269 /** Convert float to sfract
270 */
271 IFX_INLINE sfract Ifx__float_to_sfract(float a)
272 {
273 fract tmp = Ifx__float_to_fract(a);
274 return Ifx__fract_to_sfract(tmp);
275 }
276
277 #define Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
278 #endif
279
280 IFX_INLINE void Ifx__stopPerfCounters(void)
281 { //__mtcr (CPU_CCTRL, 0);
282 __asm(
283 " mov d0,#0\n"
284 " mtcr #0xFC00,d0\n"
285 " isync\n"
286 :::"d0");
287 }
288
289 /** \} */
290
291 /* FIXME use inline instead of #define */
292 /* FIXME is it really required to have #define __setareg(areg,val) ___setareg(areg,val) or can __setareg() implemented directly */
293 #define Ifx___setareg(areg,val) \
294 { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
295 #define Ifx__setareg(areg,val) Ifx___setareg(areg,val)
296
297 /** \brief This function is a implementation of a binary semaphore using compare and swap instruction
298 * \param address address of resource.
299 * \param value This variable is updated with status of address
300 * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
301 *
302 */
303 #define Ifx__cmpAndSwap(address,value,condition) \
304 __cmpswapw((address), ((unsigned long)value), (condition) )
305
306 /** \brief Convert a fixpoint value to float32
307 *
308 * This function converts a value from a fixpoint format to a float32 format.
309 *
310 *
311 * \param value value to be converted.
312 * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
313 *
314 * \return Returns the converted value in the float32 format.
315 *
316 */
317 IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
318 {
319 float32 result;
320
321 __asm(
322 " q31tof\t%0, %1, %2 \n"
323 : "=d" (result)
324 : "d" (value), "d" (shift));
325 return result;
326 }
327
328 IFX_INLINE void* Ifx__getA11(void)
329 {
330 unsigned int *res;
331 __asm("mov.aa %0, a11": "=a" (res) : :"a11");
332 return res;
333 }
334
335 IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
336 {
337 __asm("mov.aa a10, %0": : "a" (stackAddr) :"a10");
338 }
339
340 IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
341 {
342 uint32 returnvalue;
343 __asm("MOV d0, #0x0"); /* set seed value to 0 */
344 for (;length > 0; length--)
345 {
346 /*calculate the CRC over all data */
347 __asm("MOV d1,%0" : : "d" (*startaddress));
348 __asm("CRC32 d0,d0,d1");
349 startaddress++;
350 }
351 __asm("MOV %0,d0" : "=d" (returnvalue)); /* return result of CRC*/
352 return returnvalue;
353 }
354
355 IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
356 {
357 uint32 result;
358 __asm(" mul.u e14,%1,%2 ; d15 = Eh; d14 = El \n"
359 " mov d12,d14 ; e12 = El \n"
360 " mov d13,#0 ; \n"
361 " madd.u e14,e12,d15,#5 ; e14 = El + 5 * d15 \n"
362 " 1: jge.u d14,%3,2n ; \n"
363 " jz d15,3n ; \n"
364 " 2: subx d14,d14,%3 ; e12=e12-m \n"
365 " subc d15,d15,d13 ; d13=d13-0 \n"
366 " loopu 1p ; \n"
367 " 3: mov %0,d14 ; \n"
368 : "=d"(result) : "d"(a), "d"(x), "d"(m) : "e14","e12");
369 return result;
370 }
371
372 IFX_INLINE sint32 Ifx__popcnt(sint32 a)
373 {
374 sint32 res;
375 __asm("popcnt %0,%1":"=d"(res):"d"(a));
376 return res;
377 }
378 #endif
379
380 /* Macros for backward compatibility of the intrinsics*/
381 /******************************************************************************/
382 #ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
383 #ifndef __non_return_call
384 #define __non_return_call Ifx__non_return_call
385 #endif
386
387 #ifndef __jump_and_link
388 #define __jump_and_link Ifx__jump_and_link
389 #endif
390
391 #ifndef __moveToDataParam0
392 #define __moveToDataParam0 Ifx__moveToDataParam0
393 #endif
394
395 #ifndef __moveToAddrParam0
396 #define __moveToAddrParam0 Ifx__moveToAddrParam0
397 #endif
398
399 #ifndef __getDataParamRet
400 #define __getDataParamRet Ifx__getDataParamRet
401 #endif
402
403 #ifndef __moveToDataParamRet
404 #define __moveToDataParamRet Ifx__moveToDataParamRet
405 #endif
406
407 #ifndef __jumpToFunction
408 #define __jumpToFunction Ifx__jumpToFunction
409 #endif
410
411 #ifndef __jumpToFunctionWithLink
412 #define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
413 #endif
414
415 #ifndef __jumpBackToLink
416 #define __jumpBackToLink Ifx__jumpBackToLink
417 #endif
418
419 #ifndef __minX
420 #define __minX Ifx__minX
421 #endif
422
423 #ifndef __maxX
424 #define __maxX Ifx__maxX
425 #endif
426
427 #ifndef __saturateX
428 #define __saturateX Ifx__saturateX
429 #endif
430
431 #ifndef __checkrangeX
432 #define __checkrangeX Ifx__checkrangeX
433 #endif
434
435 #ifndef __saturate
436 #define __saturate Ifx__saturate
437 #endif
438
439 #ifndef __saturateu
440 #define __saturateu Ifx__saturateu
441 #endif
442
443 #ifndef __checkrange
444 #define __checkrange Ifx__checkrange
445 #endif
446
447 #ifndef __sqrtf
448 #define __sqrtf Ifx__sqrtf
449 #endif
450
451 #ifndef __sqrf
452 #define __sqrf Ifx__sqrf
453 #endif
454
455 #ifndef __roundf
456 #define __roundf Ifx__roundf
457 #endif
458
459 #ifndef __absf
460 #define __absf Ifx__absf
461 #endif
462
463 #ifndef __maxf
464 #define __maxf Ifx__maxf
465 #endif
466
467 #ifndef __saturatef
468 #define __saturatef Ifx__saturatef
469 #endif
470
471 #ifndef __minf
472 #define __minf Ifx__minf
473 #endif
474
475 #ifndef __checkrangef
476 #define __checkrangef Ifx__checkrangef
477 #endif
478
479 #ifndef __abs_stdreal
480 #define __abs_stdreal Ifx__abs_stdreal
481 #endif
482
483 #ifndef __saturate_stdreal
484 #define __saturate_stdreal Ifx__saturate_stdreal
485 #endif
486
487 #ifndef __min_stdreal
488 #define __min_stdreal Ifx__min_stdreal
489 #endif
490
491 #ifndef __max_stdreal
492 #define __max_stdreal Ifx__max_stdreal
493 #endif
494
495 #ifndef __neqf
496 #define __neqf Ifx__neqf
497 #endif
498
499 #ifndef __leqf
500 #define __leqf Ifx__leqf
501 #endif
502
503 #ifndef __geqf
504 #define __geqf Ifx__geqf
505 #endif
506
507 #ifndef __fract_to_float
508 #define __fract_to_float Ifx__fract_to_float
509 #endif
510
511 #ifndef __mulfractlong
512 #define __mulfractlong Ifx__mulfractlong
513 #endif
514
515 #ifndef __mulfractfract
516 #define __mulfractfract Ifx__mulfractfract
517 #endif
518
519 #ifndef __disable_and_save
520 #define __disable_and_save Ifx__disable_and_save
521 #endif
522
523 #ifndef __restore
524 #define __restore Ifx__restore
525 #endif
526
527 #ifndef __mtcr_no_isync
528 #define __mtcr_no_isync Ifx__mtcr_no_isync
529 #endif
530
531 #ifndef __adds
532 #define __adds Ifx__adds
533 #endif
534
535 #ifndef __addsu
536 #define __addsu Ifx__addsu
537 #endif
538
539 #ifndef __subs
540 #define __subs Ifx__subs
541 #endif
542
543 #ifndef __subsu
544 #define __subsu Ifx__subsu
545 #endif
546
547 #ifndef __nops
548 #define __nops Ifx__nops
549 #endif
550
551 #if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
552 #define NOP Ifx__NOP
553 #endif
554
555 #ifndef __mem_barrier
556 #define __mem_barrier Ifx__mem_barrier
557 #endif
558
559 #ifndef __ldmst
560 #define __ldmst Ifx__ldmst
561 #endif
562
563 #ifndef __ldmstC
564 #define __ldmstC Ifx__ldmstC
565 #endif
566
567 #ifndef __float_to_sfract
568 #define __float_to_sfract Ifx__float_to_sfract
569 #endif
570
571 #ifndef __float_to_fract
572 #define __float_to_fract Ifx__float_to_fract
573 #endif
574
575 #ifndef __fract_to_sfract
576 #define __fract_to_sfract Ifx__fract_to_sfract
577 #endif
578
579 #ifndef __ldmstAsm
580 #define __ldmstAsm Ifx__ldmstAsm
581 #endif
582
583 #ifndef __stopPerfCounters
584 #define __stopPerfCounters Ifx__stopPerfCounters
585 #endif
586
587 #ifndef __setareg
588 #define __setareg Ifx__setareg
589 #endif
590
591 #ifndef ___setareg
592 #define ___setareg Ifx___setareg
593 #endif
594
595 #ifndef __cmpAndSwap
596 #define __cmpAndSwap Ifx__cmpAndSwap
597 #endif
598
599 #ifndef __fixpoint_to_float32
600 #define __fixpoint_to_float32 Ifx__fixpoint_to_float32
601 #endif
602
603 #ifndef __getA11
604 #define __getA11 Ifx__getA11
605 #endif
606
607 #ifndef __setStackPointer
608 #define __setStackPointer Ifx__setStackPointer
609 #endif
610
611 #ifndef __popcnt
612 #define __popcnt Ifx__popcnt
613 #endif
614
615 #endif
616 /******************************************************************************/
617 /* *INDENT-ON* */
618 /******************************************************************************/
619 #endif /* IFXCPU_INTRINSICSTASKING_H */
Ifx__moveToDataParam0
IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
Definition: IfxCpu_IntrinsicsTasking.h:46
Ifx__jumpToFunctionWithLink
IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
Definition: IfxCpu_IntrinsicsTasking.h:73
Ifx__stopPerfCounters
IFX_INLINE void Ifx__stopPerfCounters(void)
Definition: IfxCpu_IntrinsicsTasking.h:280
sfract
short sfract
Definition: Ifx_TypesDcc.h:28
IfxCpu_getRandomVal
IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
Definition: IfxCpu_IntrinsicsTasking.h:355
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
Ifx__jumpBackToLink
IFX_INLINE void Ifx__jumpBackToLink(void)
Definition: IfxCpu_IntrinsicsTasking.h:78
Ifx__getA11
IFX_INLINE void * Ifx__getA11(void)
Definition: IfxCpu_IntrinsicsTasking.h:328
fract
long fract
Definition: Ifx_TypesDcc.h:27
Ifx__jumpToFunction
IFX_INLINE void Ifx__jumpToFunction(const void *fun)
Definition: IfxCpu_IntrinsicsTasking.h:68
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx__moveToDataParamRet
IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
Definition: IfxCpu_IntrinsicsTasking.h:63
IfxCpu_calculateCrc32
IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
Definition: IfxCpu_IntrinsicsTasking.h:340
Ifx__fract_to_sfract
#define Ifx__fract_to_sfract
Definition: IfxCpu_IntrinsicsTasking.h:267
Ifx__non_return_call
#define Ifx__non_return_call(fun)
Definition: IfxCpu_IntrinsicsTasking.h:37
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Ifx__nops
IFX_INLINE void Ifx__nops(void *cnt)
Definition: IfxCpu_IntrinsicsTasking.h:227
Ifx__fixpoint_to_float32
IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
Convert a fixpoint value to float32.
Definition: IfxCpu_IntrinsicsTasking.h:317
Ifx__float_to_fract
IFX_INLINE fract Ifx__float_to_fract(float a)
Definition: IfxCpu_IntrinsicsTasking.h:260
Ifx__ldmstAsm
IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
Definition: IfxCpu_IntrinsicsTasking.h:249
sint32
long sint32
Definition: Platform_Types.h:131
Ifx__getDataParamRet
IFX_INLINE unsigned int Ifx__getDataParamRet(void)
Definition: IfxCpu_IntrinsicsTasking.h:56
Ifx__moveToAddrParam0
IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
Definition: IfxCpu_IntrinsicsTasking.h:51
Ifx__popcnt
IFX_INLINE sint32 Ifx__popcnt(sint32 a)
Definition: IfxCpu_IntrinsicsTasking.h:372
Ifx__float_to_sfract
IFX_INLINE sfract Ifx__float_to_sfract(float a)
Definition: IfxCpu_IntrinsicsTasking.h:271
Ifx__jump_and_link
IFX_INLINE void Ifx__jump_and_link(void(*fun)(void))
Definition: IfxCpu_IntrinsicsTasking.h:41
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx__setStackPointer
IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
Definition: IfxCpu_IntrinsicsTasking.h:335


iLLD_TC26B: IfxCpu_Irq.c Source File

  • Cpu
  • Irq
IfxCpu_Irq.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Irq.c
3 * \brief This file contains the APIs for Interrupt related functions.
4 *
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 *
26 */
27
28 /*******************************************************************************
29 ** Includes **
30 *******************************************************************************/
31 #include "Cpu/Irq/IfxCpu_Irq.h"
32 #include "Tricore/Compilers/Compilers.h"
33 #include "Cpu/Std/IfxCpu_Intrinsics.h"
34 #include "IfxCpu_reg.h"
35
36 /*******************************************************************************
37 ** Private macros **
38 *******************************************************************************/
39
40 /*******************************************************************************
41 ** Global variables/constants **
42 *******************************************************************************/
43 #if defined(IFX_USE_SW_MANAGED_INT)
44
45 typedef void (*Ifx_Isr)(void);
46
47 static Ifx_Isr IfxCpu_Irq_swIntVector[256];
48
49 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
50
51 /*******************************************************************************
52 ** Global Function definitions **
53 *******************************************************************************/
54 #if defined(IFX_USE_SW_MANAGED_INT)
55
56 /** \brief API to install the interrupt service routine for Software Managed Interrupts.
57 *
58 */
59 void IfxCpu_Irq_installInterruptHandler(void *isrFuncPointer, uint32 serviceReqPrioNumber)
60 {
61 IfxCpu_Irq_swIntVector[serviceReqPrioNumber] = (Ifx_Isr)isrFuncPointer;
62 }
63
64
65 /** SW managed Interrupt vector table
66 *
67 * This is vector table with single entry for Software Managed Interrupts.
68 * This function need to be located at boundary 0xXFE0 where (X=1,3,5 and so on). For the software managed
69 * interrupts to work correctly, the BIV must be set to address of this function.
70 *
71 */
72 IFX_INTERRUPT_INTERNAL(IfxCpu_Irq_intVecTable, 0, 255)
73 {
74 Ifx_CPU_ICR icr;
75
76 icr.U = __mfcr(CPU_ICR); /*Fetch the ICR value */
77
78 /*Call the ISR */
79 IfxCpu_Irq_swIntVector[icr.B.CCPN]();
80 }
81
82 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
__mfcr
sint32 __mfcr(const uint32) __attribute__((intrinsic_function(0x101
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCpu_Intrinsics.h
IFX_INTERRUPT_INTERNAL
#define IFX_INTERRUPT_INTERNAL(isr, vectabNum, prio)
Definition: CompilerDcc.h:107
Compilers.h
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.


iLLD_TC26B: IfxCpu_Irq.h Source File

  • Cpu
  • Irq
IfxCpu_Irq.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Irq.h
3 * \brief This file contains the APIs for Interrupt related functions.
4 *
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Cpu_Irq Interrupt Functions
25 * \ingroup IfxLld_Cpu
26 *
27 * \defgroup IfxLld_Cpu_Irq_Usage How to define Interrupts?
28 * \ingroup IfxLld_Cpu_Irq
29 *
30 * \defgroup IfxLld_Cpu_Irq_Functions Functions
31 * \ingroup IfxLld_Cpu_Irq
32 *
33 */
34 #ifndef IFXCPU_IRQ_H_
35 #define IFXCPU_IRQ_H_
36
37 /*******************************************************************************
38 ** Includes **
39 *******************************************************************************/
40 #include "Ifx_Cfg.h"
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Cpu/Std/IfxCpu.h"
43 #include "Src/Std/IfxSrc.h"
44 /*******************************************************************************
45 ** Type definitions **
46 *******************************************************************************/
47
48 /*******************************************************************************
49 ** Global Exported variables/constants **
50 *******************************************************************************/
51
52 /*******************************************************************************
53 ** Global Exported macros/inlines/function ptototypes **
54 *******************************************************************************/
55
56 #if defined(IFX_USE_SW_MANAGED_INT)
57 /** \addtogroup IfxLld_Cpu_Irq_Functions
58 * \{ */
59 /** \brief API for Interrupt handler install for SW Managed interrupts.
60 * This API installs the isr to SW interrupt vector.
61 * This must be used only when IFX_USE_SW_MANAGED_INT is defined in Ifx_Cfg.h
62 *
63 * \param isrFuncPointer pointer to ISR function.
64 * \param serviceReqPrioNumber ISR priority.
65 */
66
67 IFX_EXTERN void IfxCpu_Irq_installInterruptHandler(void *isrFuncPointer, uint32 serviceReqPrioNumber);
68
69 IFX_INLINE void interruptHandlerInstall(uint32 srpn, uint32 addr)
70 {
71 IfxCpu_Irq_installInterruptHandler((void *)addr, srpn);
72 }
73
74
75 /** \} */
76 #endif /*defined(IFX_USE_SW_MANAGED_INT) */
77
78 /** \addtogroup IfxLld_Cpu_Irq_Functions
79 * \{ */
80 /** \brief API to get type of service of the caller CPU.
81 * \param coreId core id of the core
82 * \return type of service for the corresponding CPU.
83 */
84 IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId)
85 {
86 return (IfxSrc_Tos)coreId;
87 }
88
89
90 /** \} */
91
92 /*Documentation */
93 /** \addtogroup IfxLld_Cpu_Irq_Usage
94 * \{
95 *
96 * This page describes how to use interrupts with application framework.\n
97 *
98 * \section IfxLld_Cpu_Irq_Terminology Interrupts Terminology:
99 * \subsection IfxLld_Cpu_Irq_HWManaged Hardware Managed Interrupt Mechanism.
100 * Hardware managed interrupts have static interrupt vector which are defined for each priority separately.
101 * These vectors have jump instruction to the interrupt handler.
102 *
103 * Advantages:\n
104 * This mechanism has less interrupt latency time.
105 *
106 * \subsection IfxLld_Cpu_Irq_SWManaged Software Managed Interrupt Mechanism.
107 * Software managed interrupts have single interrupt vector statically defined at vector position 255.
108 * This address is assigned to BIV during startup.\n
109 * For Tricore, this vector position is important, because whenever an interrupt occurs, with whichever priority,
110 * the execution control jumps to this vector position. The code at this vector position will:\n
111 * 1) fetch the priority of the targetted interrupt.\n
112 * 2) fetch the interrupt handler defined for this priority (this is done by Interrupt handler installation. Refer
113 * \ref IfxLld_Cpu_Irq_Step4\n
114 * 3) Then call the handler as notmal function call.
115 *
116 * Advantages:\n
117 * This kind of mechanism is useful when project wants to change the handler for an interrupt during runtime.
118 *
119 * Disadvantages:\n
120 * This mechanism has more interrupt latency time.
121 *
122 * of the interrupt and in tand jumps to the function
123 *
124 * \section IfxLld_Cpu_Irq_Steps Steps to use Interrupt Mechanism.
125 * Dependency: Ifx_Compilers, Ifx_Cpu, Ifx_Src, IfxCpu_Irq\n
126 * Following are the steps to use interrupt mechanism.
127 *
128 * \section IfxLld_Cpu_Irq_Step1 Step1: Define Interrupt priorities.
129 * Define priorities of all interrupts with names corresponding to their functionality. It is recommended to define
130 * such priority definitions in single header file, because it is easy to detect if ISR priorities are conflicting.
131 * In Tricore architecture, two Isrs can't have same priority at same point of time.
132 * \note These defines shall be defined without brackets surrounding priority number. (eg. #define PRIO (10) is not allowed)
133 *
134 * In a user defined file eg. Ifx_IntPrioDef.h, placed in folder: 0_AppSw/Tricore/DemoApp:
135 * \code
136 * //file: Ifx_IntPrioDef.h.
137 * #define IFX_INTPRIO_FUNCT1 1
138 * #define IFX_INTPRIO_FUNCT2 2
139 * #define IFX_INTPRIO_FUNCT3 5
140 * #define IFX_INTPRIO_STM0 8
141 * #define IFX_INTPRIO_ADC_FUNC1 10
142 * //etc.
143 * \endcode
144 *
145 * \note !! IMPORTANT !!\n As explained above, the definition with closing bracket around priority number as,
146 * #define IFX_INTPRIO_FUNCT1 (1) will cause compilation error. Because linker sections which are constructed
147 * using such information will also get these brackets included. Which look like ".intvec_tc0_(1)" instead of the
148 * expected ".intvec_tc0_1"\n
149 * Linker sections' definitions are predefined statically in .lsl file,
150 * for all 255 interrupts, with the format ".intvec_tc<vector number>_<interrupt priority>".
151 *
152 * \section IfxLld_Cpu_Irq_Step2 Step2: Define Type of interrupt mechanism.
153 * \subsection IfxLld_Cpu_Irq_HWManaged_Usage To use Hardware Managed Interrupt Mechanism.
154 * Refer \ref IfxLld_Cpu_Irq_HWManaged
155 * If project is designed for hardware managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path:
156 * 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be undefined (i.e. the
157 * statement "#define IFX_USE_SW_MANAGED_INT" shall be commented as below).
158 *
159 * \code
160 * //file: Ifx_Cfg.h
161 *
162 * //#define IFX_USE_SW_MANAGED_INT
163 *
164 * \endcode
165 *
166 * \subsection IfxLld_Cpu_Irq_SWManaged_Usage To use Software Managed Interrupt Mechanism.
167 * Refer \ref IfxLld_Cpu_Irq_SWManaged
168 * If project is designed for software managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path:
169 * 0_Src/0_AppSw/Config/Common/, as shown below.
170 * IFX_USE_SW_MANAGED_INT definition must be defined.
171 *
172 * \code
173 * //file: Ifx_Cfg.h
174 *
175 * #define IFX_USE_SW_MANAGED_INT
176 *
177 * \endcode
178 *
179 * Software managed interrupts must also install the "Interrupt Handlers" Refer \ref IfxLld_Cpu_Irq_Step4
180 *
181 * \section IfxLld_Cpu_Irq_Step3 Step3: How to define an Interrupt Service routine?
182 * Interrupt service routines or interrupt handlers are defined in driver specific files or application specific
183 * files.
184 *
185 * \code
186 * //file usercode1.c
187 * #include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
188 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
189 *
190 * //define an ISR with name Isr_Stm0 with priority defined by IFX_INTPRIO_STM0
191 * IFX_INTERRUPT (Isr_Stm0, 0, IFX_INTPRIO_STM0)
192 * {
193 * //Isr code here
194 * }
195 * \endcode
196 *
197 * \code
198 * //file usercode2.c
199 * #include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
200 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
201 *
202 * //define an ISR with name Isr_Adc_fun1 with priority defined by IFX_INTPRIO_ADC_FUNC1
203 * IFX_INTERRUPT (Isr_Adc_fun1, 0, IFX_INTPRIO_ADC_FUNC1)
204 * {
205 * //Isr code here
206 * }
207 * \endcode
208 *
209 * \section IfxLld_Cpu_Irq_Step4 Step4: How to install Interrupt Service routine/handler?
210 * This step is not required for HW managed interrupts.\n
211 * Interrupt service routines or interrupt handlers are installed in driver specific files or application specific
212 * files
213 *
214 * \code
215 * //file usermain.c
216 * #include "IfxCpu_Irq.h"
217 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
218 *
219 * void userfunction_init(void)
220 * {
221 * //code for user function init
222 * // :
223 * // :
224 * IfxCpu_Irq_installInterruptHandler (Isr_Stm0, IFX_INTPRIO_STM0);
225 * IfxCpu_Irq_installInterruptHandler (Isr_Adc_fun1, IFX_INTPRIO_ADC_FUNC1);
226 *
227 * // :
228 * }
229 *
230 * \endcode
231 *
232 * \section IfxLld_Cpu_Irq_Step5 Step5: Managing the Service Request Node.
233 * For the interrupt to get activated, interrupt triggers are needed. These triggers are activated by peripheral modules
234 * and corresponding service request node must be\n
235 * 1) Configured with correct priority number\n
236 * 2) The request node must be enabled\n
237 * Refer to \ref IfxLld_Src_Usage
238 */
239
240 /** \} */
241 #endif /* IFXCPU_IRQ_H_ */
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCpu_Irq_getTos
IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId)
API to get type of service of the caller CPU.
Definition: IfxCpu_Irq.h:84
IfxSrc.h
SRC basic functionality.
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:136
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCpu.h
CPU basic functionality.


iLLD_TC26B: IfxCpu_Trap.c Source File

  • Cpu
  • Trap
IfxCpu_Trap.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Trap.c
3 * \brief This file contains the APIs for Trap related functions.
4 *
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 */
26
27 /*******************************************************************************
28 ** Includes **
29 *******************************************************************************/
30 #include "IfxCpu_Trap.h"
31 #include "Cpu/Std/IfxCpu.h"
32 #include "Cpu/Std/IfxCpu_Intrinsics.h"
33 #include "IfxCpu_reg.h"
34 #include "Ifx_Cfg.h"
35 #ifdef IFX_CFG_EXTEND_TRAP_HOOKS
36 #include "Ifx_Cfg_Trap.h"
37 #endif
38
39 /******************************************************************************/
40 /* Macros */
41 /******************************************************************************/
42 /** \brief Configuration for CpuX enable.
43 *
44 */
45 #ifndef IFX_CFG_CPU_TRAP_TSR_HOOK
46 # define IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch) /**< By default macro is empty*/
47 #endif
48 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK
49 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
50 #endif
51 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK
52 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
53 #endif
54 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK
55 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
56 #endif
57 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK
58 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
59 #endif
60 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK
61 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
62 #endif
63 #ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK
64 # define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
65 #endif
66 #ifndef IFX_CFG_CPU_TRAP_NMI_HOOK
67 # define IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch) ((void)trapWatch) /**< By default NMI macro is empty*/
68 #endif
69 #ifndef IFX_CFG_CPU_TRAP_MME_HOOK
70 # define IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch) ((void)trapWatch) /**< By default memory Management Error macro is empty*/
71 #endif
72 #ifndef IFX_CFG_CPU_TRAP_IPE_HOOK
73 # define IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch) ((void)trapWatch) /**< By default internal Protection Error macro is empty*/
74 #endif
75 #ifndef IFX_CFG_CPU_TRAP_IE_HOOK
76 # define IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch) ((void)trapWatch) /**< By default instruction Error macro is empty*/
77 #endif
78 #ifndef IFX_CFG_CPU_TRAP_CME_HOOK
79 # define IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch) ((void)trapWatch) /**< By default context Management Error macro is empty*/
80 #endif
81 #ifndef IFX_CFG_CPU_TRAP_BE_HOOK
82 # define IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch) ((void)trapWatch) /**< By default bus Error macro is empty*/
83 #endif
84 #ifndef IFX_CFG_CPU_TRAP_ASSERT_HOOK
85 # define IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch) ((void)trapWatch) /**< By default assertion is empty*/
86 #endif
87
88 #ifndef IFX_CFG_CPU_TRAP_DEBUG
89 #define IFX_CFG_CPU_TRAP_DEBUG __debug()
90 #endif
91 /*******************************************************************************
92 ** variables **
93 *******************************************************************************/
94
95 /*******************************************************************************
96 ** Function definitions **
97 *******************************************************************************/
98 IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo(uint8 trapClass, uint32 tin)
99 {
100 IfxCpu_Trap trapInfo;
101 trapInfo.tAddr = (unsigned int)__getA11();
102 trapInfo.tClass = trapClass;
103 trapInfo.tId = tin;
104 trapInfo.tCpu = IfxCpu_getCoreId();
105 return trapInfo;
106 }
107
108
109 void IfxCpu_Trap_memoryManagementError(uint32 tin)
110 {
111 volatile IfxCpu_Trap trapWatch;
112 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_memoryManagement, tin);
113 IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch);
114 IFX_CFG_CPU_TRAP_DEBUG;
115 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
116 __asm("rfe");
117 }
118
119
120 void IfxCpu_Trap_internalProtectionError(uint32 tin)
121 {
122 volatile IfxCpu_Trap trapWatch;
123 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_internalProtection, tin);
124 IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch);
125 IFX_CFG_CPU_TRAP_DEBUG;
126 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
127 __asm("rfe");
128 }
129
130
131 void IfxCpu_Trap_instructionError(uint32 tin)
132 {
133 volatile IfxCpu_Trap trapWatch;
134 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_instructionErrors, tin);
135 IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch);
136 IFX_CFG_CPU_TRAP_DEBUG;
137 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
138 __asm("rfe");
139 }
140
141
142 void IfxCpu_Trap_contextManagementError(uint32 tin)
143 {
144 volatile IfxCpu_Trap trapWatch;
145 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_contextManagement, tin);
146 IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch);
147 IFX_CFG_CPU_TRAP_DEBUG;
148 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
149 __asm("rfe");
150 }
151
152
153 void IfxCpu_Trap_busError(uint32 tin)
154 {
155 volatile IfxCpu_Trap trapWatch;
156 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_bus, tin);
157 IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch);
158 IFX_CFG_CPU_TRAP_DEBUG;
159 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
160 __asm("rfe");
161 }
162
163
164 void IfxCpu_Trap_assertion(uint32 tin)
165 {
166 volatile IfxCpu_Trap trapWatch;
167 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_assertion, tin);
168 IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch);
169 IFX_CFG_CPU_TRAP_DEBUG;
170 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
171 __asm("rfe");
172 }
173
174
175 void IfxCpu_Trap_systemCall_Cpu0(uint32 tin)
176 {
177 volatile IfxCpu_Trap trapWatch;
178 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
179 IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch);
180 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
181 __asm("rfe");
182 }
183
184 #if IFXCPU_NUM_MODULES >= 2
185 void IfxCpu_Trap_systemCall_Cpu1(uint32 tin)
186 {
187 volatile IfxCpu_Trap trapWatch;
188 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
189 IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch);
190 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
191 __asm("rfe");
192 }
193 #endif
194
195 #if IFXCPU_NUM_MODULES >= 3
196 void IfxCpu_Trap_systemCall_Cpu2(uint32 tin)
197 {
198 volatile IfxCpu_Trap trapWatch;
199 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
200 IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch);
201 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
202 __asm("rfe");
203 }
204 #endif
205
206 #if IFXCPU_NUM_MODULES >= 4
207 void IfxCpu_Trap_systemCall_Cpu3(uint32 tin)
208 {
209 volatile IfxCpu_Trap trapWatch;
210 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
211 IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch);
212 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
213 __asm("rfe");
214 }
215 #endif
216
217 #if IFXCPU_NUM_MODULES >= 5
218 void IfxCpu_Trap_systemCall_Cpu4(uint32 tin)
219 {
220 volatile IfxCpu_Trap trapWatch;
221 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
222 IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch);
223 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
224 __asm("rfe");
225 }
226 #endif
227
228 #if IFXCPU_NUM_MODULES >= 6
229 void IfxCpu_Trap_systemCall_Cpu5(uint32 tin)
230 {
231 volatile IfxCpu_Trap trapWatch;
232 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
233 IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch);
234 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
235 __asm("rfe");
236 }
237 #endif
238
239 void IfxCpu_Trap_nonMaskableInterrupt(uint32 tin)
240 {
241 volatile IfxCpu_Trap trapWatch;
242 trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_nonMaskableInterrupt, tin);
243 IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch);
244 __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
245 __asm("rfe");
246 }
247
248
249 #if defined(__HIGHTEC__)
250 #pragma section
251 #pragma section ".traptab_cpu0" awx
252 #pragma GCC optimize ("O2")
253 #endif
254 #if defined(__DCC__)
255 #pragma section
256 #pragma section CODE ".traptab_cpu0" X
257 #endif
258 #if defined(__TASKING__)
259 #pragma protect on
260 #pragma section code "traptab_cpu0"
261 #endif
262 #if defined(__ghs__)
263 #pragma ghs section
264 #pragma ghs section text=".traptab_cpu0"
265 #endif
266 void IfxCpu_Trap_vectorTable0(void)
267 {
268 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
269 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
270 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
271 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
272 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
273 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
274 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu0);
275 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
276 }
277
278
279 #if IFXCPU_NUM_MODULES >= 2
280 #if defined(__HIGHTEC__)
281 #pragma section
282 #pragma section ".traptab_cpu1" awx
283 #endif
284 #if defined(__DCC__)
285 #pragma section
286 #pragma section CODE ".traptab_cpu1" X
287 #endif
288 #if defined(__TASKING__)
289 #pragma section code "traptab_cpu1"
290 #endif
291 #if defined(__ghs__)
292 #pragma ghs section
293 #pragma ghs section text=".traptab_cpu1"
294 #endif
295 void IfxCpu_Trap_vectorTable1(void)
296 {
297 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
298 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
299 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
300 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
301 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
302 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
303 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu1);
304 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
305 }
306
307
308 #endif
309
310 #if IFXCPU_NUM_MODULES >= 3
311 #if defined(__HIGHTEC__)
312 #pragma section
313 #pragma section ".traptab_cpu2" awx
314 #endif
315 #if defined(__DCC__)
316 #pragma section
317 #pragma section CODE ".traptab_cpu2" X
318 #endif
319 #if defined(__TASKING__)
320 #pragma section code "traptab_cpu2"
321 #endif
322 #if defined(__ghs__)
323 #pragma ghs section
324 #pragma ghs section text=".traptab_cpu2"
325 #endif
326
327 void IfxCpu_Trap_vectorTable2(void)
328 {
329 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
330 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
331 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
332 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
333 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
334 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
335 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu2);
336 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
337 }
338
339
340 #endif
341
342 #if IFXCPU_NUM_MODULES >= 4
343 #if defined(__HIGHTEC__)
344 #pragma section
345 #pragma section ".traptab_cpu3" awx
346 #endif
347 #if defined(__DCC__)
348 #pragma section
349 #pragma section CODE ".traptab_cpu3" X
350 #endif
351 #if defined(__TASKING__)
352 #pragma section code "traptab_cpu3"
353 #endif
354 #if defined(__ghs__)
355 #pragma ghs section
356 #pragma ghs section text=".traptab_cpu3"
357 #endif
358
359
360 void IfxCpu_Trap_vectorTable3(void)
361 {
362 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
363 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
364 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
365 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
366 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
367 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
368 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu3);
369 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
370 }
371
372
373 #endif
374
375 #if IFXCPU_NUM_MODULES >= 5
376 #if defined(__HIGHTEC__)
377 #pragma section
378 #pragma section ".traptab_cpu4" awx
379 #endif
380 #if defined(__DCC__)
381 #pragma section
382 #pragma section CODE ".traptab_cpu4" X
383 #endif
384 #if defined(__TASKING__)
385 #pragma section code "traptab_cpu4"
386 #endif
387 #if defined(__ghs__)
388 #pragma ghs section
389 #pragma ghs section text=".traptab_cpu4"
390 #endif
391
392 void IfxCpu_Trap_vectorTable4(void)
393 {
394 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
395 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
396 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
397 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
398 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
399 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
400 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu4);
401 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
402 }
403
404
405 #endif
406
407 #if IFXCPU_NUM_MODULES >= 6
408 #if defined(__HIGHTEC__)
409 #pragma section
410 #pragma section ".traptab_cpu5" awx
411 #endif
412 #if defined(__DCC__)
413 #pragma section
414 #pragma section CODE ".traptab_cpu5" X
415 #endif
416 #if defined(__TASKING__)
417 #pragma section code "traptab_cpu5"
418 #endif
419 #if defined(__ghs__)
420 #pragma ghs section
421 #pragma ghs section text=".traptab_cpu5"
422 #endif
423
424 void IfxCpu_Trap_vectorTable5(void)
425 {
426 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
427 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
428 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
429 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
430 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
431 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
432 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu5);
433 IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
434 }
435
436
437 #endif
438
439 #if defined(__HIGHTEC__)
440 #pragma section
441 #endif
442 #if defined(__DCC__)
443 #pragma section
444 #endif
445 #if defined(__DCC__)
446 #pragma interrupt IfxInterruptEx
447 #endif
448 #if defined(__TASKING__)
449 #pragma endprotect
450 #endif
451 #if defined(__ghs__)
452 #pragma ghs section
453 #endif
IfxCpu_Trap::tAddr
unsigned int tAddr
Definition: IfxCpu_Trap.h:168
IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:61
IfxCpu_Trap_Class_contextManagement
Definition: IfxCpu_Trap.h:59
IfxCpu_Trap_systemCall_Cpu0
void IfxCpu_Trap_systemCall_Cpu0(uint32 tin)
Definition: IfxCpu_Trap.c:175
IfxCpu_Trap_assertion
void IfxCpu_Trap_assertion(uint32 tin)
Definition: IfxCpu_Trap.c:164
IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:52
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxCpu_Trap_busError
void IfxCpu_Trap_busError(uint32 tin)
Definition: IfxCpu_Trap.c:153
IfxCpu_Trap_instructionError
void IfxCpu_Trap_instructionError(uint32 tin)
Definition: IfxCpu_Trap.c:131
IFX_CFG_CPU_TRAP_NMI_HOOK
#define IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:67
IFX_CFG_CPU_TRAP_CME_HOOK
#define IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:79
IfxCpu_Trap_contextManagementError
void IfxCpu_Trap_contextManagementError(uint32 tin)
Definition: IfxCpu_Trap.c:142
IfxCpu_Trap_Class_instructionErrors
Definition: IfxCpu_Trap.h:58
IfxCpu_Intrinsics.h
IfxCpu_Trap.h
IFX_CFG_CPU_TRAP_IE_HOOK
#define IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:76
IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:49
IfxCpu_Trap_Class_memoryManagement
Definition: IfxCpu_Trap.h:56
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCpu_Trap_Class_systemCall
Definition: IfxCpu_Trap.h:62
IFX_CFG_CPU_TRAP_MME_HOOK
#define IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:70
IFX_CFG_CPU_TRAP_DEBUG
#define IFX_CFG_CPU_TRAP_DEBUG
Definition: IfxCpu_Trap.c:89
IfxCpu_Trap::tId
unsigned int tId
Definition: IfxCpu_Trap.h:169
IfxCpu_Trap_Class_nonMaskableInterrupt
Definition: IfxCpu_Trap.h:63
IfxCpu_Trap_nonMaskableInterrupt
void IfxCpu_Trap_nonMaskableInterrupt(uint32 tin)
Definition: IfxCpu_Trap.c:239
IfxCpu_Trap_internalProtectionError
void IfxCpu_Trap_internalProtectionError(uint32 tin)
Definition: IfxCpu_Trap.c:120
__getA11
#define __getA11
Definition: IfxCpu_IntrinsicsDcc.h:2088
IfxCpu_Trap_vectorTable0
void IfxCpu_Trap_vectorTable0(void)
Definition: IfxCpu_Trap.c:266
IfxCpu.h
CPU basic functionality.
IfxCpu_Trap_Class_bus
Definition: IfxCpu_Trap.h:60
IfxCpu_Trap_extractTrapInfo
IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo(uint8 trapClass, uint32 tin)
Definition: IfxCpu_Trap.c:98
IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:64
IFX_CFG_CPU_TRAP_BE_HOOK
#define IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:82
IfxCpu_Trap::tCpu
unsigned int tCpu
Definition: IfxCpu_Trap.h:171
IFX_CFG_CPU_TRAP_ASSERT_HOOK
#define IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:85
IfxCpu_Trap::tClass
unsigned int tClass
Definition: IfxCpu_Trap.h:170
IfxCpu_Trap_Class_internalProtection
Definition: IfxCpu_Trap.h:57
IfxCpu_Trap
Structure to contain the trap information.
Definition: IfxCpu_Trap.h:166
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:753
IfxCpu_Trap_memoryManagementError
void IfxCpu_Trap_memoryManagementError(uint32 tin)
Definition: IfxCpu_Trap.c:109
IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:58
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IFX_CFG_CPU_TRAP_IPE_HOOK
#define IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:73
IfxCpu_Trap_Class_assertion
Definition: IfxCpu_Trap.h:61
IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK
#define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch)
Definition: IfxCpu_Trap.c:55


iLLD_TC26B: IfxCpu_Trap.h Source File

  • Cpu
  • Trap
IfxCpu_Trap.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_Trap.c
3 * \brief This file contains the APIs for Trap related functions.
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 * \defgroup IfxLld_Cpu_Trap Trap Functions
25 * \ingroup IfxLld_Cpu
26 *
27 * \defgroup IfxLld_Cpu_Trap_Hooks Trap Function Hooks
28 * \ingroup IfxLld_Cpu_Trap
29 *
30 * \defgroup IfxLld_Cpu_Trap_Usage How to use the Trap Function Hooks?
31 * \ingroup IfxLld_Cpu_Trap
32 *
33 */
34
35 #ifndef IFXCPU_TRAPS_H_
36 #define IFXCPU_TRAPS_H_
37
38 /*******************************************************************************
39 ** Includes **
40 *******************************************************************************/
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "Cpu/Std/IfxCpu_Intrinsics.h"
43 #include "Ifx_Cfg.h"
44
45 /*******************************************************************************
46 ** Type definitions **
47 *******************************************************************************/
48 /** \addtogroup IfxLld_Cpu_Trap_Hooks
49 * \{ */
50
51 /** \brief Enum for available Trap classes.
52 *
53 */
54 typedef enum
55 {
56 IfxCpu_Trap_Class_memoryManagement = 0U,
57 IfxCpu_Trap_Class_internalProtection = 1U,
58 IfxCpu_Trap_Class_instructionErrors = 2U,
59 IfxCpu_Trap_Class_contextManagement = 3U,
60 IfxCpu_Trap_Class_bus = 4U,
61 IfxCpu_Trap_Class_assertion = 5U,
62 IfxCpu_Trap_Class_systemCall = 6U,
63 IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
64 } IfxCpu_Trap_Class;
65
66 /** \brief Enum for available Identification numbers under Memory Management Trap.
67 *
68 */
69 typedef enum
70 {
71 IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
72 IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U,
73 } IfxCpu_Trap_MemoryManagement_Id;
74
75 /** \brief Enum for available Identification numbers under Internal Protection Trap.
76 *
77 */
78 typedef enum
79 {
80 IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
81 IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
82 IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
83 IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
84 IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
85 IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
86 IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U,
87 } IfxCpu_Trap_InternalProtection_Id;
88
89 /** \brief Enum for available Identification numbers under Instruction Errors Trap.
90 *
91 */
92 typedef enum
93 {
94 IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
95 IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
96 IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
97 IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
98 IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U,
99 } IfxCpu_Trap_InstructionErrors_Id;
100
101 /** \brief Enum for available Identification numbers under Context Management Trap.
102 *
103 */
104 typedef enum
105 {
106 IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
107 IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
108 IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
109 IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
110 IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
111 IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
112 IfxCpu_Trap_ContextManagement_Id_nestingError = 7U,
113 } IfxCpu_Trap_ContextManagement_Id;
114
115 /** \brief Enum for available Identification numbers under Bus Trap.
116 *
117 */
118 typedef enum
119 {
120 IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
121 IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
122 IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
123 IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
124 IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
125 IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
126 IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U,
127 } IfxCpu_Trap_Bus_Id;
128
129 /** \brief Enum for available Identification numbers under Assertion Trap.
130 *
131 */
132 typedef enum
133 {
134 IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
135 IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U,
136 } IfxCpu_Trap_Assertion_Id;
137
138 /** \brief Type for Identification numbers under SystemCall Trap.
139 *
140 */
141 typedef sint32 IfxCpu_Trap_SystemCall_Id;
142
143 /** \brief Type for Identification number for Non Maskable Interrupt Trap.
144 *
145 */
146 typedef sint32 IfxCpu_Trap_NonMaskableInterrupt_Id;
147
148 /** \brief Union to abstract Identification numbers under Traps.
149 *
150 */
151 typedef union
152 {
153 IfxCpu_Trap_MemoryManagement_Id memoryManagement;
154 IfxCpu_Trap_InternalProtection_Id internalProtection;
155 IfxCpu_Trap_InstructionErrors_Id instructionErrors;
156 IfxCpu_Trap_ContextManagement_Id contextManagement;
157 IfxCpu_Trap_Bus_Id bus;
158 IfxCpu_Trap_Assertion_Id assertion;
159 IfxCpu_Trap_SystemCall_Id systemCall;
160 IfxCpu_Trap_NonMaskableInterrupt_Id nonMaskableInterrupt;
161 } IfxCpu_Trap_Id;
162
163 /** \brief Structure to contain the trap information.
164 *
165 */
166 typedef struct
167 {
168 unsigned int tAddr;
169 unsigned int tId : 8;
170 unsigned int tClass : 8;
171 unsigned int tCpu : 3;
172 } IfxCpu_Trap;
173
174 /*******************************************************************************
175 ** Global Exported variables/constants **
176 *******************************************************************************/
177
178 /*******************************************************************************
179 ** Global Exported macros/inlines/function ptototypes **
180 *******************************************************************************/
181 /** \brief Macro to define the trap vector table.
182 * This macro is provided to define the trap vector table in the frameowrk. User shall not use
183 * this macro.
184 * Refer to the documentation to extend the trap with hook functions. \ref IfxLld_Cpu_Trap_Usage
185 */
186 #if defined(__HIGHTEC__)
187 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
188 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
189 { \
190 __ALIGN_TRAP_TAB__; \
191 __asm("svlcx\n"); \
192 __asm("mov\t %d4, %d15"); \
193 __asm("ji\t %0" : : "a" (serviceRoutine)); \
194 __asm("rfe"); \
195 }
196 #elif defined(__ghs__)
197 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
198 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
199 { \
200 __ALIGN_TRAP_TAB__; \
201 __asm("svlcx\n"); \
202 __asm("mov\t d4, d15"); \
203 __asm("ji\t %0" : : "a" (serviceRoutine)); \
204 __asm("rfe"); \
205 }
206 #elif defined(__DCC__)
207 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
208 { \
209 __ALIGN_TRAP_TAB__; \
210 __asm("\n#$$bp\n"); \
211 __asm("svlcx\n"); \
212 __asm(" movh.a\t %a15,"#serviceRoutine "@ha\n"); \
213 __asm(" lea\t %a15,[%a15]"#serviceRoutine "@l\n"); \
214 __asm(" mov\t %d4,%d15\n"); \
215 __asm(" ji\t %a15\n"); \
216 __asm(" rfe"); \
217 __asm("#$$ep"); \
218 }
219 #define __ALIGN_TRAP_TAB__ __asm(" .align 5");
220 #elif defined(__TASKING__)
221 #define IfxCpu_Tsr_CallTSR(serviceRoutine) \
222 { \
223 __ALIGN_TRAP_TAB__; \
224 __asm("svlcx\n\tmov\td4,d15\n\tji\t%0\n" : : "a" (serviceRoutine) : "d4", "d15"); \
225 }
226 #define __ALIGN_TRAP_TAB__ __asm(" .align 32");
227 #endif
228
229 /** \} */
230
231 /*Documentation */
232 /** \addtogroup IfxLld_Cpu_Trap_Usage
233 * \{
234 *
235 * This page describes how to use the trap function hooks with application framework.\n
236 * Framework has built in Trap Service Routines, which has minimal set of debug information.
237 * The execution of trap service is as below,\n
238 * 1) When a trap occurs, a variable "trapInfo" is updated with the information:\n
239 * a. Which CPU caused this trap,\n
240 * b. What is the trap address, trap class and\n
241 * c. What is the trap identification number\n
242 * 2) Call to a configurable hook function, passing structure trapInfo as parameter.\n
243 * 3) Then debug instruction executed.\n
244 * 4) Returning from the trap. (This instruction is not reached if debugger is connected because of
245 * "debug" instruction before)\n
246 * For normal cases during development, where user works with debugger, user can watch the structure variable
247 * "trapInfo" in the debugger.
248 *
249 * In case, user wants to make use of the information of trap for further processing,\n
250 * extend the traps, using the hook functions provided.
251 *
252 * \section IfxLld_Cpu_Trap_Hooks Extending the traps with hook functions.
253 *
254 * If the trap extensions are to be extended, it is very important to enable this feature. By default this
255 * feature is disabled.
256 *
257 * \subsection IfxLld_Cpu_Trap_Hooks_EnableExtn How to enable the trap extension feature?
258 * To extend the trap hook functions user must enable this feature by defining the macro
259 * "IFX_CFG_EXTEND_TRAP_HOOKS" in Ifx_Cfg.h, as shown below.
260 * \code
261 * //file: Ifx_Cfg.h
262 *
263 * #define IFX_CFG_EXTEND_TRAP_HOOKS
264 *
265 * \endcode
266 * Now the compiler will accept the further configurations to extend the hooks.\n
267 * Ifx_Cfg_Trap.h file shall be used to extend the traps. This provides two kind of hook functions.
268 * ie. Hook for error traps and hooks (per CPU available) for system calls.
269 *
270 * \subsection IfxLld_Cpu_Trap_ErrorHooks Extending the "Error traps" with hook function.
271 * Error trap occurs as a result of an error event such as an instruction error, memory-management error
272 * or an illegal access.\n
273 * To extend the error traps, following steps are to be followed:\n
274 * \subsubsection IfxLld_Cpu_Trap_ErrorHooksStep1 Step1: Define a routine to substitute the hook for error traps.
275 * This definition shall be as user defined code (Generally in DemoApps folder).\n
276 * Considerations:\n
277 * 1. Format: IFX_INLINE void <trap extension name>(IfxCpu_Trap trapInfo)
278 * \note Define such a routine with the consideration that the trap extension hook is not a function. In case
279 * of context management error, this extension itself will not call any other function.
280 *
281 * 2. Use the information trapInfo, which is available as parameter passed to this hook and process further.
282 * Example code in a user defined file eg. Ifx_TrapExtension.h,
283 * \code
284 * //Example "inlined" function for trap Extension Hook.
285 * IFX_INLINE myTrapExtensionHook(IfxCpu_Trap trapInfo)
286 * {
287 * switch (trapInfo.tClass)
288 * {
289 * case IfxCpu_Trap_Class_memoryManagement:
290 * {
291 * //user code: Function calls allowed.
292 * break;
293 * }
294 * case IfxCpu_Trap_Class_internalProtection:
295 * {
296 * //user code: Function calls allowed.
297 * break;
298 * }
299 * case IfxCpu_Trap_Class_instructionErrors:
300 * {
301 * //user code: Function calls allowed.
302 * break;
303 * }
304 * case IfxCpu_Trap_Class_contextManagement:
305 * {
306 * //user code: Function calls NOT allowed.
307 * break;
308 * }
309 * case IfxCpu_Trap_Class_bus:
310 * {
311 * //user code: Function calls allowed.
312 * break;
313 * }
314 * case IfxCpu_Trap_Class_assertion:
315 * {
316 * //user code: Function calls allowed.
317 * break;
318 * }
319 * case IfxCpu_Trap_Class_nonMaskableInterrupt:
320 * {
321 * //user code: Function calls allowed.
322 * break;
323 * }
324 * case default:
325 * {
326 * break;
327 * }
328 * }
329 * }
330 * \endcode
331 * \note The error trap functions execute the debug instruction immediately after returning from extension hooks.
332 *
333 * \subsubsection IfxLld_Cpu_Trap_ErrorHooksStep2 Step2: Configure error trap hook extension function.
334 * Configure error trap hook extension function as defined above to the macro as below:
335 * \note Configuration of hook extension is available in Ifx_Cfg_Trap.h
336 *
337 * \code
338 * //file: Ifx_Cfg_Trap.h
339 *
340 * #include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
341 *
342 * #define IFX_CFG_CPU_TRAP_TSR_HOOK(trapInfo) myTrapExtensionHook(trapInfo) //This is INLINE function.
343 *
344 * \endcode
345 * \note The exten hooks are effective only if the feature is enabled.
346 *
347 * \subsection IfxLld_Cpu_Trap_SysCallHooks Extending the cpu specific "system call" hook functions.
348 * Tricore architecture provides the system call trap which is executed by software trigger. The instruction "syscall"
349 * triggers this trap. Please refer Tricore architecture manual for more details.\n
350 * IfxCpu_trap driver provide hook function for each CPU separately. To extend System Call trap following steps
351 * are to be followed:\n
352 * \subsubsection IfxLld_Cpu_Trap_SysCallHooksStep1 Step1: Define routine/s to substitute the hook/s for System Call trap.
353 * This definition shall be as user defined code (Generally in DemoApps folder).\n
354 * Considerations:\n
355 * 1. Format: void <syscall function name>(IfxCpu_Trap trapInfo)
356 * It is allowed to define this trap extension as function definition, because this trap is not triggered due to any error.
357 * Depending on the application requirement, define single or per CPU instance of the extension.
358 *
359 * 2. Use the information trapInfo which is available as parameter passed to this hook and process further. The parameter
360 * passed, with syscall instruction, will be trap identification number (refer to Tricore architecture manual for more details).
361 * \note To hook extension, information about trap identification number is available through parameter "trapInfo".
362 *
363 * Example code in a user defined file eg. Ifx_TrapExtension.h,
364 * \code
365 * //Example function for System Call Extension Hook.
366 * IFX_INLINE mySysCallExtensionHook(IfxCpu_Trap trapInfo)
367 * {
368 * switch (trapInfo.tId)
369 * {
370 * case 0:
371 * {
372 * //user code: Function calls allowed.
373 * break;
374 * }
375 * case 1:
376 * {
377 * //user code: Function calls allowed.
378 * break;
379 * }
380 * // and so on..
381 * case default:
382 * {
383 * break;
384 * }
385 * }
386 * }
387 * \endcode
388 *
389 * \subsubsection IfxLld_Cpu_Trap_SysCallHooksStep2 Step2: Configure the extension function.\n
390 * Configure the hook extension function defined above, to the macro as below:
391 * \note Configuration of hook extension is available in Ifx_Cfg_Trap.h
392 * \code
393 * //file: Ifx_Cfg_Trap.h
394 *
395 * #include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
396 *
397 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU0_HOOK(trapInfo) mySysCallExtensionHook(trapInfo)
398 *
399 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU1_HOOK(trapInfo) // Not used in this example
400 *
401 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU2_HOOK(trapInfo) // Not used in this example
402 *
403 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU3_HOOK(trapInfo) // Not used in this example
404 *
405 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU4_HOOK(trapInfo) // Not used in this example
406 *
407 * #define IFXCPU_TRAP_CFG_SYSCALL_CPU5_HOOK(trapInfo) // Not used in this example
408 *
409 * \endcode
410 *
411 * \note The exten hooks are effective only if this feature is enabled.
412 *
413 */
414 /** \} */
415
416 #endif /* IFXCPU_TRAPS_H_ */
IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError
Definition: IfxCpu_Trap.h:122
IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment
Definition: IfxCpu_Trap.h:97
IfxCpu_Trap::tAddr
unsigned int tAddr
Definition: IfxCpu_Trap.h:168
IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill
Definition: IfxCpu_Trap.h:71
IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError
Definition: IfxCpu_Trap.h:123
IfxCpu_Trap_Class_contextManagement
Definition: IfxCpu_Trap.h:59
IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead
Definition: IfxCpu_Trap.h:81
IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow
Definition: IfxCpu_Trap.h:109
IfxCpu_Trap_MemoryManagement_Id
IfxCpu_Trap_MemoryManagement_Id
Enum for available Identification numbers under Memory Management Trap.
Definition: IfxCpu_Trap.h:69
IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow
Definition: IfxCpu_Trap.h:135
IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess
Definition: IfxCpu_Trap.h:84
IfxCpu_Trap_ContextManagement_Id_contextType
Definition: IfxCpu_Trap.h:111
IfxCpu_Trap_Bus_Id_programFetchSynchronousError
Definition: IfxCpu_Trap.h:120
IfxCpu_Trap_Class_instructionErrors
Definition: IfxCpu_Trap.h:58
IfxCpu_Intrinsics.h
IfxCpu_Trap_Id::internalProtection
IfxCpu_Trap_InternalProtection_Id internalProtection
Definition: IfxCpu_Trap.h:154
IfxCpu_Trap_Class
IfxCpu_Trap_Class
Enum for available Trap classes.
Definition: IfxCpu_Trap.h:54
IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow
Definition: IfxCpu_Trap.h:108
IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion
Definition: IfxCpu_Trap.h:106
IfxCpu_Trap_ContextManagement_Id
IfxCpu_Trap_ContextManagement_Id
Enum for available Identification numbers under Context Management Trap.
Definition: IfxCpu_Trap.h:104
IfxCpu_Trap_InstructionErrors_Id_illegalOpcode
Definition: IfxCpu_Trap.h:94
IfxCpu_Trap_Id::memoryManagement
IfxCpu_Trap_MemoryManagement_Id memoryManagement
Definition: IfxCpu_Trap.h:153
IfxCpu_Trap_InstructionErrors_Id
IfxCpu_Trap_InstructionErrors_Id
Enum for available Identification numbers under Instruction Errors Trap.
Definition: IfxCpu_Trap.h:92
IfxCpu_Trap_Bus_Id
IfxCpu_Trap_Bus_Id
Enum for available Identification numbers under Bus Trap.
Definition: IfxCpu_Trap.h:118
IfxCpu_Trap_Class_memoryManagement
Definition: IfxCpu_Trap.h:56
IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress
Definition: IfxCpu_Trap.h:85
IfxCpu_Trap_Class_systemCall
Definition: IfxCpu_Trap.h:62
IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError
Definition: IfxCpu_Trap.h:125
IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute
Definition: IfxCpu_Trap.h:83
IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode
Definition: IfxCpu_Trap.h:95
IfxCpu_Trap_Bus_Id_dataAccessSynchronousError
Definition: IfxCpu_Trap.h:121
IfxCpu_Trap_InternalProtection_Id
IfxCpu_Trap_InternalProtection_Id
Enum for available Identification numbers under Internal Protection Trap.
Definition: IfxCpu_Trap.h:78
IfxCpu_Trap_Bus_Id_temporalAsynchronousError
Definition: IfxCpu_Trap.h:126
IfxCpu_Trap::tId
unsigned int tId
Definition: IfxCpu_Trap.h:169
IfxCpu_Trap_Class_nonMaskableInterrupt
Definition: IfxCpu_Trap.h:63
IfxCpu_Trap_Id::contextManagement
IfxCpu_Trap_ContextManagement_Id contextManagement
Definition: IfxCpu_Trap.h:156
IfxCpu_Trap_InstructionErrors_Id_invalidOperand
Definition: IfxCpu_Trap.h:96
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxCpu_Trap_NonMaskableInterrupt_Id
sint32 IfxCpu_Trap_NonMaskableInterrupt_Id
Type for Identification number for Non Maskable Interrupt Trap.
Definition: IfxCpu_Trap.h:146
IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection
Definition: IfxCpu_Trap.h:86
IfxCpu_Trap_Assertion_Id_arithmeticOverflow
Definition: IfxCpu_Trap.h:134
IfxCpu_Trap_ContextManagement_Id_callDepthOverflow
Definition: IfxCpu_Trap.h:107
IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite
Definition: IfxCpu_Trap.h:82
IfxCpu_Trap_Class_bus
Definition: IfxCpu_Trap.h:60
IfxCpu_Trap_ContextManagement_Id_callStackUnderflow
Definition: IfxCpu_Trap.h:110
IfxCpu_Trap::tCpu
unsigned int tCpu
Definition: IfxCpu_Trap.h:171
IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress
Definition: IfxCpu_Trap.h:98
IfxCpu_Trap_Id::instructionErrors
IfxCpu_Trap_InstructionErrors_Id instructionErrors
Definition: IfxCpu_Trap.h:155
sint32
long sint32
Definition: Platform_Types.h:131
IfxCpu_Trap::tClass
unsigned int tClass
Definition: IfxCpu_Trap.h:170
IfxCpu_Trap_Class_internalProtection
Definition: IfxCpu_Trap.h:57
IfxCpu_Trap_SystemCall_Id
sint32 IfxCpu_Trap_SystemCall_Id
Type for Identification numbers under SystemCall Trap.
Definition: IfxCpu_Trap.h:141
IfxCpu_Trap
Structure to contain the trap information.
Definition: IfxCpu_Trap.h:166
IfxCpu_Trap_ContextManagement_Id_nestingError
Definition: IfxCpu_Trap.h:112
IfxCpu_Trap_Id::nonMaskableInterrupt
IfxCpu_Trap_NonMaskableInterrupt_Id nonMaskableInterrupt
Definition: IfxCpu_Trap.h:160
IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection
Definition: IfxCpu_Trap.h:72
IfxCpu_Trap_Assertion_Id
IfxCpu_Trap_Assertion_Id
Enum for available Identification numbers under Assertion Trap.
Definition: IfxCpu_Trap.h:132
IfxCpu_Trap_Id::bus
IfxCpu_Trap_Bus_Id bus
Definition: IfxCpu_Trap.h:157
IfxCpu_Trap_InternalProtection_Id_privilegeViolation
Definition: IfxCpu_Trap.h:80
IfxCpu_Trap_Id::systemCall
IfxCpu_Trap_SystemCall_Id systemCall
Definition: IfxCpu_Trap.h:159
IfxCpu_Trap_Id
Union to abstract Identification numbers under Traps.
Definition: IfxCpu_Trap.h:151
IfxCpu_Trap_Class_assertion
Definition: IfxCpu_Trap.h:61
IfxCpu_Trap_Id::assertion
IfxCpu_Trap_Assertion_Id assertion
Definition: IfxCpu_Trap.h:158
IfxCpu_Trap_Bus_Id_programMemoryIntegrityError
Definition: IfxCpu_Trap.h:124


iLLD_TC26B: IfxCpu_cfg.c Source File

  • _Impl
IfxCpu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_cfg.c
3 * \brief CPU on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxCpu_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES] = {
36 {&MODULE_CPU0, (uint32)IfxCpu_ResourceCpu_0},
37 {&MODULE_CPU1, (uint32)IfxCpu_ResourceCpu_1}
38 };
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:138
IfxCpu_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.c:35
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxCpu_cfg.h
CPU on-chip implementation data.
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:48
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:139


iLLD_TC26B: IfxCpu_cfg.h Source File

  • _Impl
IfxCpu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxCpu_cfg.h
3 * \brief CPU on-chip implementation data
4 * \ingroup IfxLld_Cpu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Cpu CPU
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Cpu_Impl Implementation
27 * \ingroup IfxLld_Cpu
28 * \defgroup IfxLld_Cpu_Std Standard Driver
29 * \ingroup IfxLld_Cpu
30 */
31
32 #ifndef IFXCPU_CFG_H
33 #define IFXCPU_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "Cpu/Std/IfxCpu_Intrinsics.h"
40 #include "IfxCpu_reg.h"
41
42 /******************************************************************************/
43 /*-----------------------------------Macros-----------------------------------*/
44 /******************************************************************************/
45
46 /** \brief CPU count
47 */
48 #define IFXCPU_NUM_MODULES (2)
49
50 /** \brief Segment number of cachable flash region
51 */
52 #define IFXCPU_CACHABLE_FLASH_SEGMENT (8)
53
54 /** \brief Segment number of cachable LMU region
55 */
56 #define IFXCPU_CACHABLE_LMU_SEGMENT (9)
57
58 /** \brief All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled.
59 * So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this
60 * mask will be generated for all the available cores of the device.
61 * e.g:
62 * 1. Check for synchronisation between core 0 and core 5
63 * # define 0x41U
64 * 2. Check for synchronisation between core 0 to core 5
65 * # define 0x5FU
66 *
67 * Note:
68 * Core id values read from CORE_ID register will be as shown below. The value
69 * indicates the position of the bit needs to be set while building the macro.
70 * Core 0: 0
71 * Core 1: 1
72 * Core 2: 2
73 * Core 3: 3
74 * Core 4: 4
75 * Core 5: 6
76 */
77 #ifndef IFXCPU_CFG_ALLCORE_DONE
78 #define IFXCPU_CFG_ALLCORE_DONE (0x3)
79 #endif
80
81 /** \brief
82 */
83 #ifndef IFXCPU_ALLCORE_DONE
84 #define IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE
85 #else
86 #ifdef __TASKING__
87 # pragma message("IFXCPU_ALLCORE_DONE macro is going to be deprecated. Use IFXCPU_CFG_ALLCORE_DONE instead.")
88 #else
89 # warning IFXCPU_ALLCORE_DONE macro is going to be deprecated. Use IFXCPU_CFG_ALLCORE_DONE instead.
90 #endif
91 #endif
92
93 /******************************************************************************/
94 /*-------------------------------Enumerations---------------------------------*/
95 /******************************************************************************/
96
97 /** \brief Halt status
98 */
99 typedef enum
100 {
101 IfxCpu_DBGST_HALT_run = 0,
102 IfxCpu_DBGST_HALT_halt = 1
103 } IfxCpu_DBGST_HALT;
104
105 /** \brief List of the available CPU ids
106 */
107 typedef enum
108 {
109 IfxCpu_Id_0 = 0, /**< \brief CPU 0 */
110 IfxCpu_Id_1 = 1, /**< \brief CPU 1 */
111 IfxCpu_Id_none /**< \brief None of the CPU */
112 } IfxCpu_Id;
113
114 /** \brief List of the available CPU resources
115 */
116 typedef enum
117 {
118 IfxCpu_Index_0 = 0, /**< \brief CPU 0 */
119 IfxCpu_Index_1 = 1, /**< \brief CPU 1 */
120 IfxCpu_Index_none /**< \brief None of the CPU */
121 } IfxCpu_Index;
122
123 /** \brief Power management status
124 */
125 typedef enum
126 {
127 IfxCpu_PMCSR_PMST_normalMode = 1,
128 IfxCpu_PMCSR_PMST_idleModeRequest = 2,
129 IfxCpu_PMCSR_PMST_idleMode = 3,
130 IfxCpu_PMCSR_PMST_sleepModeRequest = 4,
131 IfxCpu_PMCSR_PMST_standbyModeRequest = 6
132 } IfxCpu_PMCSR_PMST;
133
134 /** \brief List of the available CPU resources
135 */
136 typedef enum
137 {
138 IfxCpu_ResourceCpu_0 = IfxCpu_Index_0, /**< \brief CPU 0 */
139 IfxCpu_ResourceCpu_1 = IfxCpu_Index_1, /**< \brief CPU 1 */
140 IfxCpu_ResourceCpu_none = IfxCpu_Index_none /**< \brief None of the CPU */
141 } IfxCpu_ResourceCpu;
142
143 /******************************************************************************/
144 /*-------------------Global Exported Variables/Constants----------------------*/
145 /******************************************************************************/
146
147 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES];
148
149 #endif /* IFXCPU_CFG_H */
IfxCpu_Id_none
None of the CPU.
Definition: IfxCpu_cfg.h:111
IfxCpu_DBGST_HALT_halt
Definition: IfxCpu_cfg.h:102
IfxCpu_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES]
Definition: IfxCpu_cfg.h:147
IfxCpu_Index_0
CPU 0.
Definition: IfxCpu_cfg.h:118
IfxCpu_ResourceCpu_none
None of the CPU.
Definition: IfxCpu_cfg.h:140
IfxCpu_Index_1
CPU 1.
Definition: IfxCpu_cfg.h:119
IfxCpu_PMCSR_PMST
IfxCpu_PMCSR_PMST
Power management status.
Definition: IfxCpu_cfg.h:125
IfxCpu_PMCSR_PMST_sleepModeRequest
Definition: IfxCpu_cfg.h:130
IfxCpu_Intrinsics.h
IfxCpu_DBGST_HALT
IfxCpu_DBGST_HALT
Halt status.
Definition: IfxCpu_cfg.h:99
IfxCpu_PMCSR_PMST_normalMode
Definition: IfxCpu_cfg.h:127
IfxCpu_Id_0
CPU 0.
Definition: IfxCpu_cfg.h:109
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxCpu_PMCSR_PMST_idleMode
Definition: IfxCpu_cfg.h:129
IfxCpu_DBGST_HALT_run
Definition: IfxCpu_cfg.h:101
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:136
IfxCpu_Id
IfxCpu_Id
List of the available CPU ids.
Definition: IfxCpu_cfg.h:107
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxCpu_Id_1
CPU 1.
Definition: IfxCpu_cfg.h:110
IfxCpu_PMCSR_PMST_standbyModeRequest
Definition: IfxCpu_cfg.h:131
IfxCpu_PMCSR_PMST_idleModeRequest
Definition: IfxCpu_cfg.h:128
IfxCpu_Index_none
None of the CPU.
Definition: IfxCpu_cfg.h:120
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:138
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IFXCPU_NUM_MODULES
#define IFXCPU_NUM_MODULES
CPU count.
Definition: IfxCpu_cfg.h:48
IfxCpu_Index
IfxCpu_Index
List of the available CPU resources.
Definition: IfxCpu_cfg.h:116
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:139


iLLD_TC26B: IfxDma.c Source File

  • Dma
  • Std
IfxDma.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma.c
3 * \brief DMA basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxDma.h"
IfxDma.h
DMA basic functionality.


iLLD_TC26B: IfxDma.h Source File

  • Dma
  • Std
IfxDma.h
Go to the documentation of this file.
1 /**
2 * \file IfxDma.h
3 * \brief DMA basic functionality
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dma_Std_Enum Enumerations
25 * \ingroup IfxLld_Dma_Std
26 * \defgroup IfxLld_Dma_Std_Reset Reset Functions
27 * \ingroup IfxLld_Dma_Std
28 * \defgroup IfxLld_Dma_Std_Channel_Transaction Channel Transaction Functions
29 * \ingroup IfxLld_Dma_Std
30 * \defgroup IfxLld_Dma_Std_Move_Engine Move Engine functions
31 * \ingroup IfxLld_Dma_Std
32 * \defgroup IfxLld_Dma_Std_Channel_Configure Channel configuration Functions
33 * \ingroup IfxLld_Dma_Std
34 * \defgroup IfxLld_Dma_Std_Channel_Halt Channel Halt Functions
35 * \ingroup IfxLld_Dma_Std
36 * \defgroup IfxLld_Dma_Std_Double_Buffer Double Buffer functions
37 * \ingroup IfxLld_Dma_Std
38 * \defgroup IfxLld_Dma_Std_Interrupts Interrupt functions
39 * \ingroup IfxLld_Dma_Std
40 */
41
42 #ifndef IFXDMA_H
43 #define IFXDMA_H 1
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "_Impl/IfxDma_cfg.h"
50 #include "IfxDma_bf.h"
51 #include "Cpu/Std/IfxCpu_Intrinsics.h"
52 #include "IfxDma_reg.h"
53 #include "Src/Std/IfxSrc.h"
54 #include "Scu/Std/IfxScuWdt.h"
55 #include "Scu/Std/IfxScuCcu.h"
56
57 /******************************************************************************/
58 /*--------------------------------Enumerations--------------------------------*/
59 /******************************************************************************/
60
61 /** \addtogroup IfxLld_Dma_Std_Enum
62 * \{ */
63 /** \brief Bus Master Mode definition
64 * Definition in Ifx_DMA.MODE[4].B.MODE
65 */
66 typedef enum
67 {
68 IfxDma_BusMasterMode_user = 0, /**< \brief Selected hardware resource performs Bus access in user mode */
69 IfxDma_BusMasterMode_supervisor = 1 /**< \brief Selected hardware resource performs Bus access in supervisor mode */
70 } IfxDma_BusMasterMode;
71
72 /** \brief Channel Bus Priority definition
73 */
74 typedef enum
75 {
76 IfxDma_ChannelBusPriority_low = 0, /**< \brief low priority */
77 IfxDma_ChannelBusPriority_medium = 1, /**< \brief medium priority */
78 IfxDma_ChannelBusPriority_high = 2 /**< \brief high priority */
79 } IfxDma_ChannelBusPriority;
80
81 /** \brief DMA circular buffer (wrap around) definition
82 * Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD
83 */
84 typedef enum
85 {
86 IfxDma_ChannelIncrementCircular_none = 0, /**< \brief no circular buffer operation */
87 IfxDma_ChannelIncrementCircular_2 = 1, /**< \brief circular buffer size is 2 byte */
88 IfxDma_ChannelIncrementCircular_4 = 2, /**< \brief circular buffer size is 4 byte */
89 IfxDma_ChannelIncrementCircular_8 = 3, /**< \brief circular buffer size is 8 byte */
90 IfxDma_ChannelIncrementCircular_16 = 4, /**< \brief circular buffer size is 16 byte */
91 IfxDma_ChannelIncrementCircular_32 = 5, /**< \brief circular buffer size is 32 byte */
92 IfxDma_ChannelIncrementCircular_64 = 6, /**< \brief circular buffer size is 64 byte */
93 IfxDma_ChannelIncrementCircular_128 = 7, /**< \brief circular buffer size is 128 byte */
94 IfxDma_ChannelIncrementCircular_256 = 8, /**< \brief circular buffer size is 256 byte */
95 IfxDma_ChannelIncrementCircular_512 = 9, /**< \brief circular buffer size is 512 byte */
96 IfxDma_ChannelIncrementCircular_1024 = 10, /**< \brief circular buffer size is 1024 byte */
97 IfxDma_ChannelIncrementCircular_2048 = 11, /**< \brief circular buffer size is 2048 byte */
98 IfxDma_ChannelIncrementCircular_4096 = 12, /**< \brief circular buffer size is 4096 byte */
99 IfxDma_ChannelIncrementCircular_8192 = 13, /**< \brief circular buffer size is 8192 byte */
100 IfxDma_ChannelIncrementCircular_16384 = 14, /**< \brief circular buffer size is 16384 byte */
101 IfxDma_ChannelIncrementCircular_32768 = 15 /**< \brief circular buffer size is 32768 byte */
102 } IfxDma_ChannelIncrementCircular;
103
104 /** \brief DMA incrementation direction definition
105 * Definition in Ifx_DMA.CH[64].ADICR.B.INCS
106 */
107 typedef enum
108 {
109 IfxDma_ChannelIncrementDirection_negative = 0, /**< \brief pointer is decremented */
110 IfxDma_ChannelIncrementDirection_positive = 1 /**< \brief pointer is incremented */
111 } IfxDma_ChannelIncrementDirection;
112
113 /** \brief DMA incrementation definition
114 * Definition in Ifx_DMA.CH[64].ADICR.B.SMF
115 */
116 typedef enum
117 {
118 IfxDma_ChannelIncrementStep_1 = 0, /**< \brief increment by 1 width */
119 IfxDma_ChannelIncrementStep_2 = 1, /**< \brief increment by 2 width */
120 IfxDma_ChannelIncrementStep_4 = 2, /**< \brief increment by 4 width */
121 IfxDma_ChannelIncrementStep_8 = 3, /**< \brief increment by 8 width */
122 IfxDma_ChannelIncrementStep_16 = 4, /**< \brief increment by 16 width */
123 IfxDma_ChannelIncrementStep_32 = 5, /**< \brief increment by 32 width */
124 IfxDma_ChannelIncrementStep_64 = 6, /**< \brief increment by 64 width */
125 IfxDma_ChannelIncrementStep_128 = 7 /**< \brief increment by 128 width */
126 } IfxDma_ChannelIncrementStep;
127
128 /** \brief Channel Transfer Interrupt generation mechanism.
129 * Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
130 */
131 typedef enum
132 {
133 IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0, /**< \brief interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV) */
134 IfxDma_ChannelInterruptControl_transferCountDecremented = 1 /**< \brief interrupt when transfer count (TCOUNT) is decremented */
135 } IfxDma_ChannelInterruptControl;
136
137 /** \brief DMA transfer definition
138 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM
139 */
140 typedef enum
141 {
142 IfxDma_ChannelMove_1 = 0, /**< \brief 1 DMA move per DMA transfer */
143 IfxDma_ChannelMove_2 = 1, /**< \brief 2 DMA move per DMA transfer */
144 IfxDma_ChannelMove_4 = 2, /**< \brief 4 DMA move per DMA transfer */
145 IfxDma_ChannelMove_8 = 3, /**< \brief 8 DMA move per DMA transfer */
146 IfxDma_ChannelMove_16 = 4, /**< \brief 16 DMA move per DMA transfer */
147 IfxDma_ChannelMove_3 = 5, /**< \brief 3 DMA move per DMA transfer */
148 IfxDma_ChannelMove_5 = 6, /**< \brief 5 DMA move per DMA transfer */
149 IfxDma_ChannelMove_9 = 7 /**< \brief 9 DMA move per DMA transfer */
150 } IfxDma_ChannelMove;
151
152 /** \brief DMA move size definition
153 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW
154 */
155 typedef enum
156 {
157 IfxDma_ChannelMoveSize_8bit = 0, /**< \brief 1 DMA move is 8 bit wide */
158 IfxDma_ChannelMoveSize_16bit = 1, /**< \brief 1 DMA move is 16 bit wide */
159 IfxDma_ChannelMoveSize_32bit = 2, /**< \brief 1 DMA move is 32 bit wide */
160 IfxDma_ChannelMoveSize_64bit = 3, /**< \brief 1 DMA move is 64 bit wide */
161 IfxDma_ChannelMoveSize_128bit = 4, /**< \brief 1 DMA move is 128 bit wide */
162 IfxDma_ChannelMoveSize_256bit = 5 /**< \brief 1 DMA move is 256 bit wide */
163 } IfxDma_ChannelMoveSize;
164
165 /** \brief DMA operation mode
166 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE
167 */
168 typedef enum
169 {
170 IfxDma_ChannelOperationMode_single = 0, /**< \brief channel disabled after transaction */
171 IfxDma_ChannelOperationMode_continuous = 1 /**< \brief channel stays enabled after transaction */
172 } IfxDma_ChannelOperationMode;
173
174 /** \brief Pattern detection selection
175 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL
176 */
177 typedef enum
178 {
179 IfxDma_ChannelPattern_0_disable = 0, /**< \brief Pattern detect 0 disabled */
180 IfxDma_ChannelPattern_0_mode1 = 1, /**< \brief Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] */
181 IfxDma_ChannelPattern_0_mode2 = 2, /**< \brief Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] */
182 IfxDma_ChannelPattern_0_mode3 = 3, /**< \brief Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] of previous DMA read move */
183 IfxDma_ChannelPattern_1_disable = 4, /**< \brief Pattern detect 1 disabled */
184 IfxDma_ChannelPattern_1_mode1 = 5, /**< \brief Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] */
185 IfxDma_ChannelPattern_1_mode2 = 6, /**< \brief Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] */
186 IfxDma_ChannelPattern_1_mode3 = 7 /**< \brief Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] of previous DMA read move */
187 } IfxDma_ChannelPattern;
188
189 /** \brief Channel Priority definition
190 */
191 typedef enum
192 {
193 IfxDma_ChannelPriority_low = 0, /**< \brief low priority */
194 IfxDma_ChannelPriority_medium = 1, /**< \brief medium priority */
195 IfxDma_ChannelPriority_high = 2 /**< \brief high priority */
196 } IfxDma_ChannelPriority;
197
198 /** \brief DMA request mode
199 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT
200 */
201 typedef enum
202 {
203 IfxDma_ChannelRequestMode_oneTransferPerRequest = 0, /**< \brief a request initiates a single transfer */
204 IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1 /**< \brief a request initiates a complete transaction */
205 } IfxDma_ChannelRequestMode;
206
207 /** \brief DMA request selection
208 * Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL
209 */
210 typedef enum
211 {
212 IfxDma_ChannelRequestSource_peripheral = 0, /**< \brief Transfer Request via Hardware Trigger */
213 IfxDma_ChannelRequestSource_daisyChain = 1 /**< \brief Transfer Request via next (higher priority) channel */
214 } IfxDma_ChannelRequestSource;
215
216 /** \brief shadow definition definition
217 * Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
218 */
219 typedef enum
220 {
221 IfxDma_ChannelShadow_none = 0, /**< \brief shadow address register not used. Source and destination address register are written directly */
222 IfxDma_ChannelShadow_src = 1, /**< \brief Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction */
223 IfxDma_ChannelShadow_dst = 2, /**< \brief Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction */
224 IfxDma_ChannelShadow_srcDirectWrite = 5, /**< \brief Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz and transferred to SADRz with the start of the next DMA transaction */
225 IfxDma_ChannelShadow_dstDirectWrite = 6, /**< \brief Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHADRz and transferred to DADRz with the start of the next DMA transaction */
226 IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8, /**< \brief Software switch only. Shadow address used for double buffering */
227 IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9, /**< \brief Automatic Hardware and Software switch. Shadow address used for double buffering */
228 IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10, /**< \brief Software switch only. Shadow address used for double buffering */
229 IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11, /**< \brief Automatic Hardware and Software switch. Shadow address used for double buffering */
230 IfxDma_ChannelShadow_linkedList = 12, /**< \brief The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corresponding DMARAM channel z */
231 IfxDma_ChannelShadow_accumulatedLinkedList = 13, /**< \brief The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corresponding DMARAM channel z */
232 IfxDma_ChannelShadow_safeLinkedList = 14, /**< \brief The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with the next DMA transaction if the existing SDCRC checksum matches the expected SDCRC checksum in the loaded from the new DMA transaction control set */
233 IfxDma_ChannelShadow_conditionalLinkedList = 15 /**< \brief Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are used as address pointers to a Linked List. The selection of the address pointer is determined by DMA channel pattern detection conditions */
234 } IfxDma_ChannelShadow;
235
236 typedef enum
237 {
238 IfxDma_HardwareResourcePartition_0 = 0, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
239 IfxDma_HardwareResourcePartition_1, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
240 IfxDma_HardwareResourcePartition_2, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
241 IfxDma_HardwareResourcePartition_3 /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
242 } IfxDma_HardwareResourcePartition;
243
244 /** \brief DMA move engine definition
245 */
246 typedef enum
247 {
248 IfxDma_MoveEngine_0 = 0, /**< \brief first move engine */
249 IfxDma_MoveEngine_1 = 1 /**< \brief second move engine */
250 } IfxDma_MoveEngine;
251
252 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
253 * Definition in Ifx_DMA.CLC.B.EDIS
254 */
255 typedef enum
256 {
257 IfxDma_SleepMode_enable = 0, /**< \brief enables sleep mode */
258 IfxDma_SleepMode_disable = 1 /**< \brief disables sleep mode */
259 } IfxDma_SleepMode;
260
261 /** \} */
262
263 /** \addtogroup IfxLld_Dma_Std_Reset
264 * \{ */
265
266 /******************************************************************************/
267 /*-------------------------Inline Function Prototypes-------------------------*/
268 /******************************************************************************/
269
270 /** \brief Return the status of a DMA channel (reset / not reset)
271 * This API needs to be used after the IfxDma_resetChannel()
272 * \param dma pointer to DMA module
273 * \param channelId DMA channel number
274 * \return TRUE if the channel is reset
275 * FALSE if the channel is not reset
276 *
277 * \code
278 * // check whether the channel is reset or not and also the hardware trigger disabled
279 *
280 * if (IfxDma_isChannelReset(chn[0].dma, chn[0].channelId) &&
281 * (!IfxDma_isChannelTransactionEnabled(chn[0].dma, chn[0].channelId))) {
282 * // Dma is out of RESET and there is no hardware request enabled
283 * IfxDma_Dma_startChannelTransaction(&chn[0]);
284 * }
285 * \endcode
286 *
287 */
288 IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId);
289
290 /** \brief Reset the channel
291 * \param dma pointer to DMA module
292 * \param channelId DMA channel number
293 * \return None
294 *
295 * \code
296 * // Apply reset to the channel
297 * IfxDma_resetChannel(chn[0].dma, chn[0].channelId);
298 * \endcode
299 *
300 */
301 IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId);
302
303 /** \} */
304
305 /** \addtogroup IfxLld_Dma_Std_Channel_Transaction
306 * \{ */
307
308 /******************************************************************************/
309 /*-------------------------Inline Function Prototypes-------------------------*/
310 /******************************************************************************/
311
312 /** \brief Clear the channel transaction request lost flag status
313 * \param dma pointer to DMA module
314 * \param channelId DMA channel number
315 * \return None
316 *
317 * \code
318 * // Clear the channel transaction request lost flag status
319 * IfxDma_clearChannelTransactionRequestLost(chn[0].dma, chn[0].channelId);
320 * \endcode
321 *
322 */
323 IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId);
324
325 /** \brief Disable a DMA channel hardware transaction request
326 * \param dma pointer to DMA module
327 * \param channelId DMA channel number
328 * \return None
329 *
330 * A coding example can be found in \ref IfxDma_enableChannelTransaction
331 *
332 */
333 IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
334
335 /** \brief Disable the generation of a channel transaction lost error interrupt
336 * \param dma pointer to DMA module
337 * \param channelId DMA channel number
338 * \return None
339 *
340 * \code
341 * // Disable the transaction request lost interrupt for given channel
342 * IfxDma_disableChannelTransactionLostError(chn[0].dma, chn[0].channelId);
343 * \endcode
344 *
345 */
346 IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId);
347
348 /** \brief Enable a DMA channel hardware transaction request
349 * \param dma pointer to DMA module
350 * \param channelId DMA channel number
351 * \return None
352 *
353 * \code
354 * unsigned *src = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
355 * for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
356 * IfxSrc_setRequest(src);
357 * }
358 *
359 * // Do not restrict the hardware triggering to only one transaction
360 *
361 * IfxDma_setChannelContinuousMode(chn[0].dma, chn[0].channelId);
362 * IfxDma_setChannelContinuousMode(chn[1].dma, chn[1].channelId);
363 * IfxDma_setChannelContinuousMode(chn[2].dma, chn[2].channelId);
364 *
365 * // Check for end of transaction
366 *
367 * while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
368 *
369 * // Enable the hardware trigger for channel 3
370 * IfxDma_enableChannelTransaction(chn[3].dma, chn[3].channelId);
371 *
372 * // Disable the hardware trigger for channel 2
373 * IfxDma_disableChannelTransaction(chn[2].dma, chn[2].channelId);
374 * // Hardware triggers for second time
375 *
376 * unsigned *SRc = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
377 * for(int chn=0; chn<NUM_CHANNELS; ++chn, ++src) {
378 * IfxSrc_setRequest(src);
379 * }
380 *
381 * // Restrict the hardware triggering to only one transaction
382 * IfxDma_setChannelSingleMode(chn[0].dma, chn[0].channelId);
383 * IfxDma_setChannelSingleMode(chn[1].dma, chn[1].channelId);
384 * \endcode
385 *
386 */
387 IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
388
389 /** \brief Enable the generation of a channel transaction lost error interrupt
390 * \param dma pointer to DMA module
391 * \param channelId DMA channel number
392 * \return None
393 *
394 * \code
395 * // Enable the transaction request lost interrupt for given channel
396 * IfxDma_enableChannelTransactionLostError(chn[0].dma, chn[0].channelId);
397 * \endcode
398 *
399 */
400 IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId);
401
402 /** \brief Check the channel transaction request lost flag status
403 * \param dma pointer to DMA module
404 * \param channelId DMA channel number
405 * \return TRUE if the TRL is set
406 * FALSE if the TRL is not set
407 *
408 * \code
409 * boolean trlFlag;
410 *
411 * // Check whether the channel transaction request lost flag is set or not
412 * trlFlag = IfxDma_getChannelTransactionRequestLost(chn[0].dma, chn[0].channelId));
413 * \endcode
414 *
415 */
416 IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId);
417
418 /** \brief Converts DMA circular range to circular code
419 * \param range DMA circular range
420 * \return DMA circular code
421 */
422 IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range);
423
424 /** \brief Return the hardware transaction request status of a DMA channel
425 * \param dma pointer to DMA module
426 * \param channelId DMA channel number
427 * \return TRUE if the hardware transaction request is enabled
428 * FALSE if the hardware transaction request is disabled
429 *
430 * A coding example can be found in \ref IfxDma_isChannelReset
431 *
432 */
433 IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId);
434
435 /** \brief Return the status of a DMA channel (transaction pending)
436 * \param dma pointer to DMA module
437 * \param channelId DMA channel number
438 * \return TRUE if a transaction request for the given channel is pending
439 *
440 * \code
441 * // check for the channel request pending with the channel
442 * if (IfxDma_isChannelTransactionPending(chn[0].dma, chn[0].channelId) == TRUE) {
443 * // There is channel request pending for channel 0
444 * result |= 0;
445 * }
446 * \endcode
447 *
448 */
449 IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId);
450
451 /** \brief Sets the sensitivity of the module to sleep signal
452 * \param dma pointer to DMA registers
453 * \param mode mode selection (enable/disable)
454 * \return None
455 */
456 IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode);
457
458 /** \brief Request a DMA channel transaction
459 * \param dma pointer to DMA module
460 * \param channelId DMA channel number
461 * \return None
462 *
463 * A coding example can be found in \ref IfxDma_Dma_startChannelTransaction
464 *
465 */
466 IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
467
468 /** \} */
469
470 /** \addtogroup IfxLld_Dma_Std_Move_Engine
471 * \{ */
472
473 /******************************************************************************/
474 /*-------------------------Inline Function Prototypes-------------------------*/
475 /******************************************************************************/
476
477 /** \brief Clear the DMA error status flags
478 * \param dma pointer to DMA module
479 * \param moveEngine pointer to the DMA move engine
480 * \param mask value holds the bits to clear or mask
481 * \return None
482 *
483 * \code
484 * // Clear the status of the error flags (as defined in _Impl/IfxDma_cfg.h)
485 * IfxDma_clearErrorFlags(chn[0].dma,IfxDma_MoveEngine_1,
486 * IFXDMA_ERROR_S | // move engine source error
487 * IFXDMA_ERROR_D | // move engine destination error
488 * IFXDMA_ERROR_SPB | // bus error on SPB
489 * IFXDMA_ERROR_SRI | // bus error on SRI
490 * IFXDMA_ERROR_RAM | // RAM error
491 * IFXDMA_ERROR_SLL | // safe linked list CRC checksum error
492 * IFXDMA_ERROR_DLL); // failed linked list load error
493 * \endcode
494 *
495 */
496 IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask);
497
498 /** \brief Disable the generation of a Move engine destination error interrupt
499 * \param dma pointer to DMA module
500 * \param moveEngine pointer to the DMA move engine
501 * \return None
502 *
503 * A coding example can be found in \ref IfxDma_disableMoveEngineSourceError
504 *
505 */
506 IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
507
508 /** \brief Disable the generation of a Move engine source error interrupt
509 * \param dma pointer to DMA module
510 * \param moveEngine pointer to the DMA move engine
511 * \return None
512 *
513 * \code
514 * // Disable the move engine source and destination move errors
515 * IfxDma_disableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
516 * IfxDma_disableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);
517 * \endcode
518 *
519 */
520 IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
521
522 /** \brief Enable the generation of a Move engine destination error interrupt
523 * \param dma pointer to DMA module
524 * \param moveEngine pointer to the DMA move engine
525 * \return None
526 *
527 * A coding example can be found in \ref IfxDma_enableMoveEngineSourceError
528 *
529 */
530 IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
531
532 /** \brief Enable the generation of a Move engine source error interrupt
533 * \param dma pointer to DMA module
534 * \param moveEngine pointer to the DMA move engine
535 * \return None
536 *
537 * \code
538 * // Enable the move engine source and destination move errors
539 * IfxDma_enableMoveEngineSourceError(chn[0].dma,IfxDma_MoveEngine_1);
540 * IfxDma_enableMoveEngineDestinationError(chn[0].dma,IfxDma_MoveEngine_1);
541 * \endcode
542 *
543 */
544 IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
545
546 /** \brief Return the DMA error status flags
547 * \param dma pointer to DMA module
548 * \param moveEngine pointer to the DMA move engine
549 * \return the content of the DMA.ERRSR register
550 *
551 * \code
552 * uint32 errorFlags = 0;
553 *
554 * // Get the status of the error flags of move engine
555 * errorFlags = IfxDma_getErrorFlags(chn[0].dma,IfxDma_MoveEngine_1);
556 *
557 * if( errorFlags & IFXDMA_ERROR_S ) { // move engine source error
558 * }
559 *
560 * if( errorFlags & IFXDMA_ERROR_D ) { // move engine destination error
561 * // ...
562 * }
563 *
564 * if( errorFlags & IFXDMA_ERROR_SPB ) { // bus error on SPB
565 * // ...
566 * }
567 *
568 * if( errorFlags & IFXDMA_ERROR_SRI ) { // bus error on SRI
569 * // ...
570 * }
571 *
572 * if( errorFlags & IFXDMA_ERROR_RAM ) { // RAM error
573 * // ...
574 * }
575 *
576 * if( errorFlags & IFXDMA_ERROR_SLL ) { // safe linked list CRC checksum error
577 * // ...
578 * }
579 *
580 * if( errorFlags & IFXDMA_ERROR_DLL ) { // failed linked list load error
581 * // ...
582 * }
583 * \endcode
584 *
585 */
586 IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine);
587
588 /** \} */
589
590 /** \addtogroup IfxLld_Dma_Std_Channel_Configure
591 * \{ */
592
593 /******************************************************************************/
594 /*-------------------------Inline Function Prototypes-------------------------*/
595 /******************************************************************************/
596
597 /** \brief Get a channel source address
598 * \param dma pointer to DMA module
599 * \param channelId DMA channel number
600 * \return Actual channel destination address
601 *
602 * \code
603 * uint32 destAddr = IfxDma_getChannelDestinationAddress(chn[2].dma, chn[2].channelId);
604 *
605 * \endcode
606 *
607 */
608 IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId);
609
610 /** \brief Get a channel source address
611 * \param dma pointer to DMA module
612 * \param channelId DMA channel number
613 * \return Actual channel source address
614 *
615 * \code
616 * uint32 sourceAddr = IfxDma_getChannelSourceAddress(chn[2].dma, chn[2].channelId);
617 * \endcode
618 *
619 */
620 IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId);
621
622 /** \brief Return the DMA channel suspend Mode status
623 * \param dma pointer to DMA module
624 * \param channelId DMA channel number
625 * \return Channel Suspend Mode or Frozen State Active status (1- DMA channel is in channel suspend mode or frozen state)
626 */
627 IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId);
628
629 /** \brief Return remaining DMA transfer count
630 * \param dma pointer to DMA module
631 * \param channelId DMA channel number
632 * \return Remaining DMA transfer count
633 *
634 * \code
635 * // Wait till transfer count (TCOUNT) becomes 0
636 *
637 * bool notFinished;
638 * do {
639 * notFinished = false;
640 * if( IfxDma_getChannelTransferCount(chn[0].dma, chn[0].channelId) ) {
641 * notFinished = true;
642 * break;
643 * }
644 * } while( notFinished );
645 * \endcode
646 *
647 */
648 IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId);
649
650 /** \brief get the time stamp
651 * \param dma pointer to DMA module
652 * \return the current time stamp
653 *
654 * \code
655 * uint32 timestamp = IfxDma_getTimestamp(chn[0].dma);
656 * \endcode
657 *
658 */
659 IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma);
660
661 /** \brief Configure the move count for each DMA channel transfer
662 * \param dma pointer to DMA module
663 * \param channelId DMA channel number
664 * \param blockMode value holds the number of moves with in a DMA transfer
665 * \return None
666 *
667 * A coding example can be found in \ref IfxDma_setChannelTransferCount
668 *
669 */
670 IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode);
671
672 /** \brief Configure a DMA channel to "continous transaction mode"
673 * After a transaction, the hardware request transaction remain enabled
674 * \param dma pointer to DMA module
675 * \param channelId DMA channel number
676 * \return None
677 *
678 * A coding example can be found in \ref IfxDma_enableChannelTransaction
679 *
680 */
681 IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId);
682
683 /** \brief Configure the destination address
684 * \param dma pointer to DMA module
685 * \param channelId DMA channel number
686 * \param address is the Initial address of the destination pointer
687 * \return None
688 *
689 * A coding example can be found in \ref IfxDma_setChannelSourceAddress
690 *
691 */
692 IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address);
693
694 /** \brief Configure a DMA channel destination pointer
695 * \param dma pointer to DMA module
696 * \param channelId DMA channel number
697 * \param incStep Specifies the pointer incrementation step
698 * \param direction Specifies the incrementation direction
699 * \param size Specifies the size of the circular buffer
700 * \return None
701 *
702 * A coding example can be found in \ref IfxDma_setChannelSourceIncrementStep
703 *
704 */
705 IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size);
706
707 /** \brief Configure a DMA channel move
708 * \param dma pointer to DMA module
709 * \param channelId DMA channel number
710 * \param moveSize value holds the opcode or size of data of individual moves with in a DMA transfer
711 * \return None
712 *
713 * A coding example can be found in \ref IfxDma_setChannelTransferCount
714 *
715 */
716 IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize);
717
718 /** \brief Configure a DMA channel shadow pointer
719 * \param dma pointer to DMA module
720 * \param channelId DMA channel number
721 * \param shadow Specifies the shadow pointer
722 * \return None
723 *
724 * \code
725 * // Push the shadow mode into double buffer
726 * IfxDma_setChannelShadow(chn[0].dma, chn[0].channelId,
727 * IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch);
728 * \endcode
729 *
730 */
731 IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow);
732
733 /** \brief Configure a DMA channel to "single transaction mode"
734 * After a transaction, the hardware request transaction is disabled, and must be set by software again
735 * \param dma pointer to DMA module
736 * \param channelId DMA channel number
737 * \return None
738 *
739 * A coding example can be found in \ref IfxDma_enableChannelTransaction
740 *
741 */
742 IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId);
743
744 /** \brief Configure a DMA channel to "single transaction mode"
745 * One transfer request starts a complete DMA transaction
746 * \param dma pointer to DMA module
747 * \param channelId DMA channel number
748 * \return None
749 *
750 * A coding example can be found in \ref IfxDma_setChannelTransferCount
751 *
752 */
753 IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
754
755 /** \brief Configure a DMA channel to "single transfer mode"
756 * A transfer request is required for each transfer
757 * \param dma pointer to DMA module
758 * \param channelId DMA channel number
759 * \return None
760 *
761 * A coding example can be found in \ref IfxDma_setChannelTransferCount
762 *
763 */
764 IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
765
766 /** \brief Configure the source address
767 * \param dma pointer to DMA module
768 * \param channelId DMA channel number
769 * \param address is the Initial address of the source pointer
770 * \return None
771 *
772 * \code
773 * // Check for the end of current transaction and before trigger the channel request for
774 * // for another channel, re configure the source and destination addresses
775 *
776 * while(!(IfxDma_getAndClearChannelInterrupt(chn[1].dma, chn[1].channelId)));
777 *
778 * // Re-Program the source address for the channel 2
779 * IfxDma_setChannelSourceAddress(chn[2].dma, chn[2].channelId,Sadr);
780 *
781 * // Re-Program the destination address for channel 2
782 * IfxDma_setChannelDestinationAddress(chn[2].dma, chn[2].channelId,Dadr);
783 *
784 * // Start DMA transaction for channel 2
785 * IfxDma_Dma_startChannelTransaction(&chn[2]);
786 * \endcode
787 *
788 */
789 IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address);
790
791 /** \brief Configure a DMA channel source pointer
792 * \param dma pointer to DMA module
793 * \param channelId DMA channel number
794 * \param incStep Specifies the pointer incrementation step
795 * \param direction Specifies the incrementation direction
796 * \param size Specifies the size of the circular buffer
797 * \return None
798 *
799 * \code
800 * // Re-program the source and destination circular buffer control fields
801 * IfxDma_setChannelSourceIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
802 *
803 * IfxDma_setChannelDestinationIncrementStep(chn[0].dma, chn[0].channelId, IfxDma_ChannelIncrementStep_2, IfxDma_ChannelIncrementDirection_negative, IfxDma_ChannelIncrementCircular_16);
804 * \endcode
805 *
806 */
807 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size);
808
809 /** \brief Configure a DMA channel suspend enable
810 * \param dma pointer to DMA module
811 * \param channelId DMA channel number
812 * \param enable enable (1) / disable (0)
813 * \return None
814 */
815 IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable);
816
817 /** \brief Configure the move count of a DMA channel transaction
818 * \param dma pointer to DMA module
819 * \param channelId DMA channel number
820 * \param transferCount value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
821 * \return None
822 *
823 * \code
824 * // Start DMA transaction
825 * IfxDma_Dma_startChannelTransaction(&chn[0]);
826 *
827 * // Wait till end of transaction
828 * while(!(IfxDma_getAndClearChannelInterrupt(chn[0].dma, chn[0].channelId)));
829 *
830 * // Change the TREL configuration for channel 1
831 * IfxDma_setChannelTransferCount(chn[1].dma, chn[1].channelId,0x6);
832 *
833 * // Change the BLKM configuration for channel 1
834 * IfxDma_setChannelBlockMode(chn[1].dma, chn[1].channelId,IfxDma_ChannelMove_3);
835 *
836 * // Change the Move size configuration for channel 1
837 * IfxDma_setChannelMoveSize(chn[1].dma, chn[1].channelId,IfxDma_ChannelMoveSize_64bit);
838 *
839 * // Pull down the channel pending request after the first transfer is initiated
840 * IfxDma_setChannelSingleTransfer(chn[1].dma, chn[1].channelId);
841 *
842 * // Pull down the channel pending request after the transaction gets over
843 * IfxDma_setChannelSingleTransaction(chn[2].dma, chn[2].channelId);
844 *
845 * // Start DMA transaction
846 * IfxDma_Dma_startChannelTransaction(&chn[1]);
847 *
848 * // Start DMA transaction
849 * IfxDma_Dma_startChannelTransaction(&chn[2]);
850 * \endcode
851 *
852 */
853 IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount);
854
855 /** \brief Configure the shadow pointer register to read only
856 * \param dma pointer to DMA module
857 * \param channelId DMA channel number
858 * \return None
859 *
860 * \code
861 * // Disable the shadow mode to come out of double buffer mode
862 * IfxDma_writeChannelShadowDisable(chn[0].dma, chn[0].channelId);
863 * \endcode
864 *
865 */
866 IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId);
867
868 /** \brief Configure the shadow pointer register to write-able
869 * \param dma pointer to DMA module
870 * \param channelId DMA channel number
871 * \return None
872 *
873 * \code
874 * // Enable the shadow mode to come out of double buffer mode
875 * IfxDma_writeChannelShadowEnable(chn[0].dma, chn[0].channelId);
876 * \endcode
877 *
878 */
879 IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId);
880
881 /** \} */
882
883 /** \addtogroup IfxLld_Dma_Std_Channel_Halt
884 * \{ */
885
886 /******************************************************************************/
887 /*-------------------------Inline Function Prototypes-------------------------*/
888 /******************************************************************************/
889
890 /** \brief Clear channel halt request and aknowledgement
891 * \param dma pointer to DMA module
892 * \param channelId DMA channel number
893 * \return None
894 *
895 * \code
896 * // Quit the halt mode of operation
897 * IfxDma_clearChannelHalt(chn[0].dma, chn[0].channelId);
898 * \endcode
899 *
900 */
901 IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
902
903 /** \brief Get channel halt aknowledgement
904 * \param dma pointer to DMA module
905 * \param channelId DMA channel number
906 * \return halt aknowledgement
907 *
908 * \code
909 * // Check for the channel halt aknowledgement
910 * while(!(IfxDma_getChannelHalt(chn[0].dma, chn[0].channelId)));
911 * \endcode
912 *
913 */
914 IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
915
916 /** \brief setting channel halt request
917 * \param dma pointer to DMA module
918 * \param channelId DMA channel number
919 * \return None
920 *
921 * \code
922 * // Halt the channel processing
923 * IfxDma_setChannelHalt(chn[0].dma,chn[0].channelId);
924 * \endcode
925 *
926 */
927 IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
928
929 /** \} */
930
931 /** \addtogroup IfxLld_Dma_Std_Double_Buffer
932 * \{ */
933
934 /******************************************************************************/
935 /*-------------------------Inline Function Prototypes-------------------------*/
936 /******************************************************************************/
937
938 /** \brief get information on buffer being read by software and clear the notification flag
939 * \param dma pointer to DMA module
940 * \param channelId DMA channel number
941 * \return TRUE if one of the buffers is being read by software
942 * FALSE if one of the buffers is already read by software
943 *
944 * \code
945 * // Check the buffer being read (Double buffer operation mode)
946 * while(!(IfxDma_getDoubleBufferRead(chn[0].dma, chn[0].channelId)));
947 * \endcode
948 *
949 */
950 IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId);
951
952 /** \brief get Double buffer selection
953 * \param dma pointer to DMA module
954 * \param channelId channelId DMA channel number
955 * \return TRUE if buffer 1 is being filled
956 * FALSE if buffer 0 is being filled
957 *
958 * \code
959 * boolean buffer_being_filled;
960 *
961 * // Check the buffer being filled (Double buffer operation mode)
962 * buffer_being_filled = IfxDma_getDoubleBufferSelection(chn[0].dma, chn[0].channelId));
963 * \endcode
964 *
965 */
966 IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId);
967
968 /** \brief keeps the double buffer active
969 * \param dma pointer to DMA module
970 * \param channelId DMA channel number
971 * \return None
972 *
973 * \code
974 * IfxDma_keepDoubleBufferActive(chn[0].dma, chn[0].channelId);
975 * \endcode
976 *
977 */
978 IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId);
979
980 /** \brief Double buffer switch application
981 * \param dma pointer to DMA module
982 * \param channelId DMA channel number
983 * \return None
984 *
985 * \code
986 * // Apply software buffer switch
987 * IfxDma_switchDoubleBuffer(chn[0].dma, chn[0].channelId);
988 * \endcode
989 *
990 */
991 IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
992
993 /** \} */
994
995 /** \addtogroup IfxLld_Dma_Std_Interrupts
996 * \{ */
997
998 /******************************************************************************/
999 /*-------------------------Inline Function Prototypes-------------------------*/
1000 /******************************************************************************/
1001
1002 /** \brief Clear a channel transfer interrupt flag
1003 * \param dma pointer to DMA module
1004 * \param channelId channel for which the interrupt flag should be cleared
1005 * \return None
1006 *
1007 * see Dma.INTSR
1008 *
1009 */
1010 IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1011
1012 /** \brief Disable channel interrupt trigger
1013 * \param dma pointer to DMA module
1014 * \param channelId DMA channel number
1015 * \return None
1016 *
1017 * \code
1018 * IfxDma_disableChannelInterrupt(chn[0].dma, chn[0].channelId);
1019 * \endcode
1020 *
1021 */
1022 IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1023
1024 /** \brief Enable channel interrupt trigger
1025 * \param dma pointer to DMA module
1026 * \param channelId DMA channel number
1027 * \return None
1028 *
1029 * \code
1030 * IfxDma_enableChannelInterrupt(chn[0].dma, chn[0].channelId);
1031 * \endcode
1032 *
1033 */
1034 IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1035
1036 /** \brief Return and clear a channel transfer interrupt flag
1037 * The flag is automatically cleared with the call to this function
1038 * \param dma pointer to DMA module
1039 * \param channelId DMA channel number
1040 * \return TRUE if the interrupt flag is set
1041 * FALSE if the interrupt flag is not set
1042 *
1043 * \code
1044 * // wait for the end of transaction for intended channel by checking the channel interrupt flag
1045 * // and clear it once it is set and checked
1046 *
1047 * // Wait till end of the transaction
1048 * while(!(IfxDma_getAndClearChannelInterrupt(chn[2].dma, chn[2].channelId)));
1049 * \endcode
1050 *
1051 */
1052 IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1053
1054 /** \brief Returns and clears the pattern detection interrupt flag
1055 * \param dma pointer to DMA module
1056 * \param channelId DMA channel number
1057 * \return TRUE if pattern detection for a given channel is found
1058 * FALSE if pattern detection for a given channel is not found
1059 *
1060 * \code
1061 * // wait till pattern match is found for given channel
1062 * // and clear it once it is set and checked
1063 *
1064 * // Wait for the pattern detection
1065 * while(!(IfxDma_getAndClearChannelPatternDetectionInterrupt(chn[0].dma, chn[0].channelId)));
1066 * \endcode
1067 *
1068 */
1069 IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1070
1071 /** \brief Returns and clears the status of channel wrap destination buffer interrupt trigger flag
1072 * \param dma pointer to DMA module
1073 * \param channelId DMA channel number
1074 * \return TRUE if wrap destination buffer interrupt trigger flag is set
1075 * FALSE if wrap destination buffer interrupt trigger flag is not set or get cleared already
1076 *
1077 * \code
1078 * // wait for the destination buffer wrap interrupt flag
1079 * // and clear it once it is set and checked
1080 * boolean destinationWrapFlag;
1081 *
1082 * destinationWrapFlag = IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(chn[0].dma, chn[0].channelId);
1083 * \endcode
1084 *
1085 */
1086 IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1087
1088 /** \brief Returns and clears the status of channel wrap source buffer interrupt trigger flag
1089 * \param dma pointer to DMA module
1090 * \param channelId DMA channel number
1091 * \return TRUE if wrap source buffer interrupt trigger flag is set
1092 * FALSE if wrap source buffer interrupt trigger flag is not set or get cleared already
1093 *
1094 * \code
1095 * // wait for the source buffer wrap interrupt flag
1096 * // and clear it once it is set and checked
1097 * boolean sourceWrapFlag;
1098 *
1099 * sourceWrapFlag = IfxDma_getAndClearChannelWrapSourceBufferInterrupt(chn[0].dma, chn[0].channelId);
1100 * \endcode
1101 *
1102 */
1103 IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1104
1105 /** \brief Return a channel transfer interrupt flag
1106 * \param dma pointer to DMA module
1107 * \param channelId channel for which the interrupt flag should be returned
1108 * \return TRUE if the interrupt flag is set
1109 * FALSE if the interrupt flag is not set
1110 *
1111 * see Dma.INTSR
1112 *
1113 */
1114 IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1115
1116 /** \brief Returns whether the old value of pattern detection corresponding pattern comparison operation found a pattern match in previous DMA * read move or not
1117 * \param dma pointer to DMA module
1118 * \param channelId DMA channel number
1119 * \return TRUE if corresponding pattern comparison operation found a pattern match in previous DMA read move or not
1120 * FALSE if corresponding pattern comparison operation did not find a pattern match in previous DMA read move
1121 *
1122 * \code
1123 * boolean patternDetectOldVal;
1124 *
1125 * // Check the old value of the pattern detection
1126 * patternDetectOldVal = IfxDma_getChannelPatternDetectionOldValue(chn[0].dma, chn[0].channelId);
1127 * \endcode
1128 *
1129 */
1130 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1131
1132 /** \brief Returns the SRC pointer for given DMA channel
1133 * \param dma pointer to DMA module
1134 * \param channelId DMA channel number
1135 * \return SRC pointer for given DMA channel
1136 *
1137 * \code
1138 *
1139 * \endcode
1140 *
1141 */
1142 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1143
1144 /** \brief Setting of channel interrupt service request by software
1145 * \param dma pointer to DMA module
1146 * \param channelId DMA channel number
1147 * \return None
1148 *
1149 * \code
1150 * // Set the channel interrupt service request through software
1151 * IfxDma_setChannelInterruptServiceRequest(chn[0].dma, chn[0].channelId);
1152 * \endcode
1153 *
1154 */
1155 IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1156
1157 /** \} */
1158
1159 /******************************************************************************/
1160 /*-------------------------Inline Function Prototypes-------------------------*/
1161 /******************************************************************************/
1162
1163 /** \brief Configure the hardware resource partition
1164 * \param dma pointer to DMA module
1165 * \param channelId DMA channel number
1166 * \param resourcePartition Hardware resource partition
1167 * \return None
1168 *
1169 * \code
1170 * // Set the required hardware resource partition
1171 * IfxDma_setChannelHardwareResourcePartition(chn[0].dma, chn[0].channelId,setChannelHardwareResourcePartition);
1172 * \endcode
1173 *
1174 */
1175 IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition);
1176
1177 /** \brief Sets the Interrupt control value
1178 * \param dma pointer to DMA module
1179 * \param channelId DMA channel number
1180 * \param value Interrupt control value
1181 * \return None
1182 */
1183 IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value);
1184
1185 /** \brief Sets the Circular Buffer Destination Length
1186 * \param dma pointer to DMA module
1187 * \param channelId DMA channel number
1188 * \param length Circular Buffer Destination Length
1189 * \return None
1190 */
1191 IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length);
1192
1193 /** \brief Sets the Circular Buffer Source Length
1194 * \param dma pointer to DMA module
1195 * \param channelId DMA channel number
1196 * \param length Circular Buffer Source Length
1197 * \return None
1198 */
1199 IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length);
1200
1201 /** \brief Enable the Source Circular Buffer
1202 * \param dma pointer to DMA module
1203 * \param channelId DMA channel number
1204 * \return None
1205 */
1206 IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1207
1208 /** \brief Enable the Destination Circular Buffer
1209 * \param dma pointer to DMA module
1210 * \param channelId DMA channel number
1211 * \return None
1212 */
1213 IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1214
1215 /** \brief Returns the Data CRC
1216 * \param dma pointer to DMA module
1217 * \param channelId DMA channel number
1218 * \return The Data CRC value
1219 */
1220 IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1221
1222 /** \brief Returns the Source and Destination CRC
1223 * \param dma pointer to DMA module
1224 * \param channelId DMA channel number
1225 * \return The source and destination CRC values
1226 */
1227 IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId);
1228
1229 /** \brief Returns the ERR pointer
1230 * \param dma pointer to DMA module
1231 * \return ERR pointer for given DMA
1232 */
1233 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getErrPointer(Ifx_DMA *dma);
1234
1235 /******************************************************************************/
1236 /*---------------------Inline Function Implementations------------------------*/
1237 /******************************************************************************/
1238
1239 IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1240 {
1241 dma->TSR[channelId].B.HLTCLR = 1;
1242 }
1243
1244
1245 IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1246 {
1247 dma->CH[channelId].CHCSR.B.CICH = 1;
1248 }
1249
1250
1251 IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1252 {
1253 dma->TSR[channelId].B.CTL = 1;
1254 }
1255
1256
1257 IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
1258 {
1259 if (moveEngine == IfxDma_MoveEngine_1)
1260 {
1261 dma->BLK1.CLRE.U = mask;
1262 }
1263 else
1264 {
1265 dma->BLK0.CLRE.U = mask;
1266 }
1267 }
1268
1269
1270 IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1271 {
1272 dma->CH[channelId].ADICR.B.INTCT &= ~(1 << 1); // TODO: should we define a special bitmask for this bit manipulation?
1273 }
1274
1275
1276 IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1277 {
1278 dma->TSR[channelId].B.DCH = 1;
1279 }
1280
1281
1282 IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1283 {
1284 dma->CH[channelId].ADICR.B.ETRL = 0;
1285 }
1286
1287
1288 IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1289 {
1290 if (moveEngine == IfxDma_MoveEngine_1)
1291 {
1292 dma->BLK1.EER.B.EDER = 0;
1293 }
1294 else
1295 {
1296 dma->BLK0.EER.B.EDER = 0;
1297 }
1298 }
1299
1300
1301 IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1302 {
1303 if (moveEngine == IfxDma_MoveEngine_1)
1304 {
1305 dma->BLK1.EER.B.ESER = 0;
1306 }
1307 else
1308 {
1309 dma->BLK0.EER.B.ESER = 0;
1310 }
1311 }
1312
1313
1314 IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1315 {
1316 dma->CH[channelId].ADICR.B.INTCT |= (1 << 1); // TODO: should we define a special bitmask for this bit manipulation?
1317 }
1318
1319
1320 IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1321 {
1322 dma->TSR[channelId].B.ECH = 1;
1323 }
1324
1325
1326 IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1327 {
1328 dma->CH[channelId].ADICR.B.ETRL = 1;
1329 }
1330
1331
1332 IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1333 {
1334 if (moveEngine == IfxDma_MoveEngine_1)
1335 {
1336 dma->BLK1.EER.B.EDER = 1;
1337 }
1338 else
1339 {
1340 dma->BLK0.EER.B.EDER = 1;
1341 }
1342 }
1343
1344
1345 IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1346 {
1347 if (moveEngine == IfxDma_MoveEngine_1)
1348 {
1349 dma->BLK1.EER.B.ESER = 1;
1350 }
1351 else
1352 {
1353 dma->BLK0.EER.B.ESER = 1;
1354 }
1355 }
1356
1357
1358 IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1359 {
1360 boolean result;
1361
1362 result = dma->CH[channelId].CHCSR.B.ICH != 0;
1363
1364 if (result == 1)
1365 {
1366 dma->CH[channelId].CHCSR.B.CICH = TRUE;
1367 }
1368
1369 return result;
1370 }
1371
1372
1373 IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1374 {
1375 boolean result;
1376
1377 result = dma->CH[channelId].CHCSR.B.IPM != 0;
1378
1379 if (result == 1)
1380 {
1381 dma->CH[channelId].CHCSR.B.CICH = TRUE;
1382 }
1383
1384 return result;
1385 }
1386
1387
1388 IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1389 {
1390 boolean result;
1391
1392 result = dma->CH[channelId].CHCSR.B.WRPD != 0;
1393
1394 if (result == 1)
1395 {
1396 dma->CH[channelId].CHCSR.B.CWRP = TRUE;
1397 }
1398
1399 return result;
1400 }
1401
1402
1403 IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1404 {
1405 boolean result;
1406
1407 result = dma->CH[channelId].CHCSR.B.WRPS != 0;
1408
1409 if (result == 1)
1410 {
1411 dma->CH[channelId].CHCSR.B.CWRP = TRUE;
1412 }
1413
1414 return result;
1415 }
1416
1417
1418 IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1419 {
1420 return dma->CH[channelId].DADR.U;
1421 }
1422
1423
1424 IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1425 {
1426 return dma->TSR[channelId].B.HLTACK != 0;
1427 }
1428
1429
1430 IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1431 {
1432 boolean result;
1433
1434 result = dma->CH[channelId].CHCSR.B.ICH;
1435
1436 return result;
1437 }
1438
1439
1440 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1441 {
1442 return dma->CH[channelId].CHCSR.B.LXO != 0;
1443 }
1444
1445
1446 IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1447 {
1448 return dma->CH[channelId].SADR.U;
1449 }
1450
1451
1452 IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1453 {
1454 return dma->SUSACR[channelId].B.SUSAC;
1455 }
1456
1457
1458 IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1459 {
1460 return dma->TSR[channelId].B.TRL != 0;
1461 }
1462
1463
1464 IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1465 {
1466 return dma->CH[channelId].CHCSR.B.TCOUNT;
1467 }
1468
1469
1470 IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range)
1471 {
1472 return (IfxDma_ChannelIncrementCircular)(31 - __clz((uint32)range));
1473 }
1474
1475
1476 IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1477 {
1478 boolean result;
1479
1480 result = dma->CH[channelId].CHCSR.B.FROZEN != 0;
1481
1482 if (result == 1)
1483 {
1484 dma->CH[channelId].CHCSR.B.FROZEN = FALSE;
1485 }
1486
1487 return result;
1488 }
1489
1490
1491 IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1492 {
1493 return dma->CH[channelId].CHCSR.B.BUFFER != 0;
1494 }
1495
1496
1497 IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
1498 {
1499 if (moveEngine == IfxDma_MoveEngine_1)
1500 {
1501 return dma->BLK1.ERRSR.U;
1502 }
1503 else
1504 {
1505 return dma->BLK0.ERRSR.U;
1506 }
1507 }
1508
1509
1510 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1511 {
1512 IFX_UNUSED_PARAMETER(dma);
1513 // only a single DMA available, therefore no check for the dma pointer required
1514 return &MODULE_SRC.DMA.DMA[0].CH[channelId];
1515 }
1516
1517
1518 IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma)
1519 {
1520 return dma->TIME.U;
1521 }
1522
1523
1524 IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1525 {
1526 return dma->TSR[channelId].B.RST == 0;
1527 }
1528
1529
1530 IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1531 {
1532 return dma->TSR[channelId].B.HTRE != 0;
1533 }
1534
1535
1536 IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1537 {
1538 return dma->TSR[channelId].B.CH != 0;
1539 }
1540
1541
1542 IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1543 {
1544 dma->CH[channelId].CHCSR.U = 0U << IFX_DMA_CH_CHCSR_FROZEN_OFF;
1545 }
1546
1547
1548 IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1549 {
1550 dma->TSR[channelId].B.RST = 1;
1551 }
1552
1553
1554 IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
1555 {
1556 dma->CH[channelId].CHCFGR.B.BLKM = blockMode;
1557 }
1558
1559
1560 IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1561 {
1562 dma->CH[channelId].CHCFGR.B.CHMODE = 1;
1563 }
1564
1565
1566 IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
1567 {
1568 dma->CH[channelId].DADR.U = (uint32)address;
1569 }
1570
1571
1572 IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
1573 {
1574 Ifx_DMA_CH_ADICR adicr;
1575 adicr.U = dma->CH[channelId].ADICR.U;
1576 adicr.B.DMF = incStep;
1577 adicr.B.INCD = direction;
1578 adicr.B.CBLD = size;
1579 dma->CH[channelId].ADICR.U = adicr.U;
1580 }
1581
1582
1583 IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1584 {
1585 dma->TSR[channelId].B.HLTREQ = 1;
1586 }
1587
1588
1589 IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1590 {
1591 dma->CH[channelId].CHCSR.B.SIT = 1;
1592 }
1593
1594
1595 IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
1596 {
1597 dma->CH[channelId].CHCFGR.B.CHDW = moveSize;
1598 }
1599
1600
1601 IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
1602 {
1603 dma->CH[channelId].ADICR.B.SHCT = shadow;
1604 }
1605
1606
1607 IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1608 {
1609 dma->CH[channelId].CHCFGR.B.CHMODE = 0;
1610 }
1611
1612
1613 IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1614 {
1615 dma->CH[channelId].CHCFGR.B.RROAT = 1;
1616 }
1617
1618
1619 IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1620 {
1621 dma->CH[channelId].CHCFGR.B.RROAT = 0;
1622 }
1623
1624
1625 IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
1626 {
1627 dma->CH[channelId].SADR.U = (uint32)address;
1628 }
1629
1630
1631 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
1632 {
1633 Ifx_DMA_CH_ADICR adicr;
1634 adicr.U = dma->CH[channelId].ADICR.U;
1635 adicr.B.SMF = incStep;
1636 adicr.B.INCS = direction;
1637 adicr.B.CBLS = size;
1638 dma->CH[channelId].ADICR.U = adicr.U;
1639 }
1640
1641
1642 IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
1643 {
1644 dma->SUSENR[channelId].B.SUSEN = enable;
1645 }
1646
1647
1648 IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
1649 {
1650 dma->CH[channelId].CHCFGR.B.TREL = transferCount;
1651 }
1652
1653
1654 IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode)
1655 {
1656 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1657 IfxScuWdt_clearCpuEndinit(passwd);
1658 dma->CLC.B.EDIS = mode;
1659 IfxScuWdt_setCpuEndinit(passwd);
1660 }
1661
1662
1663 IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1664 {
1665 dma->CH[channelId].CHCSR.B.SCH = 1;
1666 }
1667
1668
1669 IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1670 {
1671 dma->CH[channelId].CHCSR.B.SWB = 1;
1672 }
1673
1674
1675 IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1676 {
1677 dma->CH[channelId].ADICR.B.SHCT &= ~(3 << 2);
1678 }
1679
1680
1681 IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1682 {
1683 dma->CH[channelId].ADICR.B.SHCT |= (1 << 2);
1684 dma->CH[channelId].ADICR.B.SHCT &= ~(1 << 3);
1685 }
1686
1687
1688 IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
1689 {
1690 uint16 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
1691 IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
1692 dma->HRR[channelId].B.HRP = resourcePartition;
1693 IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
1694 }
1695
1696
1697 IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
1698 {
1699 dma->CH[channelId].ADICR.B.INTCT = value;
1700 }
1701
1702
1703 IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
1704 {
1705 dma->CH[channelId].ADICR.B.CBLD = length;
1706 }
1707
1708
1709 IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
1710 {
1711 dma->CH[channelId].ADICR.B.CBLS = length;
1712 }
1713
1714
1715 IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1716 {
1717 dma->CH[channelId].ADICR.B.SCBE = 0x1U;
1718 }
1719
1720
1721 IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1722 {
1723 dma->CH[channelId].ADICR.B.DCBE = 0x1U;
1724 }
1725
1726
1727 IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1728 {
1729 return dma->CH[channelId].RDCRCR.U;
1730 }
1731
1732
1733 IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
1734 {
1735 return dma->CH[channelId].SDCRCR.U;
1736 }
1737
1738
1739 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getErrPointer(Ifx_DMA *dma)
1740 {
1741 IFX_UNUSED_PARAMETER(dma);
1742 return &MODULE_SRC.DMA.DMA[0].ERR;
1743 }
1744
1745
1746 #endif /* IFXDMA_H */
IfxDma_ChannelBusPriority_high
high priority
Definition: IfxDma.h:78
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:527
IfxDma_SleepMode_disable
disables sleep mode
Definition: IfxDma.h:258
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:489
IfxDma_ChannelPattern_1_mode3
Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual ...
Definition: IfxDma.h:186
IfxDma_MoveEngine
IfxDma_MoveEngine
DMA move engine definition.
Definition: IfxDma.h:246
IfxDma_ChannelShadow_accumulatedLinkedList
The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corres...
Definition: IfxDma.h:231
IfxDma_BusMasterMode_user
Selected hardware resource performs Bus access in user mode.
Definition: IfxDma.h:68
IfxDma_clearChannelTransactionRequestLost
IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear the channel transaction request lost flag status.
Definition: IfxDma.h:1251
IfxDma_ChannelMove_9
9 DMA move per DMA transfer
Definition: IfxDma.h:149
IfxDma_ChannelIncrementDirection
IfxDma_ChannelIncrementDirection
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.
Definition: IfxDma.h:107
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxDma_ChannelOperationMode_continuous
channel stays enabled after transaction
Definition: IfxDma.h:171
IfxDma_setSleepMode
IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxDma.h:1654
IfxDma_setChannelHardwareResourcePartition
IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
Configure the hardware resource partition.
Definition: IfxDma.h:1688
IfxDma_getTimestamp
IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma)
get the time stamp
Definition: IfxDma.h:1518
IfxDma_SleepMode
IfxDma_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_DMA.CLC.B.EDIS.
Definition: IfxDma.h:255
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:440
IfxDma_ChannelIncrementStep_2
increment by 2 width
Definition: IfxDma.h:119
IfxDma_ChannelMove
IfxDma_ChannelMove
DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM.
Definition: IfxDma.h:140
IfxDma_setChannelSuspendEnable
IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
Configure a DMA channel suspend enable.
Definition: IfxDma.h:1642
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1625
IfxDma_setChannelBlockMode
IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
Configure the move count for each DMA channel transfer.
Definition: IfxDma.h:1554
IfxDma_enableMoveEngineSourceError
IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine source error interrupt.
Definition: IfxDma.h:1345
IfxDma_ChannelIncrementCircular_16
circular buffer size is 16 byte
Definition: IfxDma.h:90
IfxDma_ChannelIncrementCircular_32
circular buffer size is 32 byte
Definition: IfxDma.h:91
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:158
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:157
IfxDma_getChannelDestinationAddress
IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address.
Definition: IfxDma.h:1418
IfxDma_disableChannelTransactionLostError
IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable the generation of a channel transaction lost error interrupt.
Definition: IfxDma.h:1282
IfxDma_ChannelIncrementCircular_8
circular buffer size is 8 byte
Definition: IfxDma.h:89
IfxDma_ChannelIncrementCircular_256
circular buffer size is 256 byte
Definition: IfxDma.h:94
IfxDma_ChannelIncrementStep_128
increment by 128 width
Definition: IfxDma.h:125
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch
Automatic Hardware and Software switch. Shadow address used for double buffering. ...
Definition: IfxDma.h:229
IfxDma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending)
Definition: IfxDma.h:1536
IfxDma_getChannelInterrupt
IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag.
Definition: IfxDma.h:1430
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1572
IfxDma_ChannelIncrementCircular_512
circular buffer size is 512 byte
Definition: IfxDma.h:95
IfxDma_ChannelMove_8
8 DMA move per DMA transfer
Definition: IfxDma.h:145
IfxDma_ChannelInterruptControl_thresholdLimitMatch
interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
Definition: IfxDma.h:133
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1320
IfxDma_clearErrorFlags
IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
Clear the DMA error status flags.
Definition: IfxDma.h:1257
IfxSrc.h
SRC basic functionality.
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1663
IfxDma_switchDoubleBuffer
IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Double buffer switch application.
Definition: IfxDma.h:1669
IfxDma_ChannelIncrementStep_16
increment by 16 width
Definition: IfxDma.h:122
IfxDma_ChannelIncrementCircular_128
circular buffer size is 128 byte
Definition: IfxDma.h:93
IfxDma_ChannelBusPriority_low
low priority
Definition: IfxDma.h:76
IfxCpu_Intrinsics.h
IfxDma_ChannelShadow
IfxDma_ChannelShadow
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
Definition: IfxDma.h:219
IfxDma_writeChannelShadowDisable
IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to read only.
Definition: IfxDma.h:1675
IfxDma_enableChannelTransactionLostError
IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the generation of a channel transaction lost error interrupt.
Definition: IfxDma.h:1326
IfxDma_ChannelPriority
IfxDma_ChannelPriority
Channel Priority definition.
Definition: IfxDma.h:191
IfxDma_ChannelMoveSize_128bit
1 DMA move is 128 bit wide
Definition: IfxDma.h:161
IfxDma_enableMoveEngineDestinationError
IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Enable the generation of a Move engine destination error interrupt.
Definition: IfxDma.h:1332
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1631
IfxDma_setChannelSingleMode
IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" After a transaction, the hardware request transa...
Definition: IfxDma.h:1607
IfxDma_BusMasterMode_supervisor
Selected hardware resource performs Bus access in supervisor mode.
Definition: IfxDma.h:69
IfxDma_getDoubleBufferSelection
IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId)
get Double buffer selection
Definition: IfxDma.h:1491
IfxDma_ChannelMove_3
3 DMA move per DMA transfer
Definition: IfxDma.h:147
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1358
IfxDma_enableDestinationCircularBuffer
IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Destination Circular Buffer.
Definition: IfxDma.h:1721
IfxScuWdt.h
SCU basic functionality.
IfxDma_getAndClearChannelWrapDestinationBufferInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap destination buffer interrupt trigger flag...
Definition: IfxDma.h:1388
IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch
Automatic Hardware and Software switch. Shadow address used for double buffering. ...
Definition: IfxDma.h:227
IfxDma_ChannelRequestSource
IfxDma_ChannelRequestSource
DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL.
Definition: IfxDma.h:210
IfxDma_setChannelSingleTransaction
IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transaction mode" One transfer request starts a complete DMA trans...
Definition: IfxDma.h:1613
IfxDma_ChannelShadow_none
shadow address register not used. Source and destination address register are written directly ...
Definition: IfxDma.h:221
IfxDma_isChannelReset
IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_res...
Definition: IfxDma.h:1524
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1510
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxDma_disableMoveEngineSourceError
IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine source error interrupt.
Definition: IfxDma.h:1301
IfxDma_setCircularBufferDestinationLength
IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Destination Length.
Definition: IfxDma.h:1703
IfxDma_BusMasterMode
IfxDma_BusMasterMode
Bus Master Mode definition Definition in Ifx_DMA.MODE[4].B.MODE.
Definition: IfxDma.h:66
IfxDma_setChannelShadow
IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
Configure a DMA channel shadow pointer.
Definition: IfxDma.h:1601
IfxDma_setChannelSingleTransfer
IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "single transfer mode" A transfer request is required for each transfer...
Definition: IfxDma.h:1619
IfxDma_cfg.h
DMA on-chip implementation data.
IfxDma_ChannelRequestMode
IfxDma_ChannelRequestMode
DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT.
Definition: IfxDma.h:201
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxDma_getChannelPatternDetectionOldValue
IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns whether the old value of pattern detection corresponding pattern comparison operation found a...
Definition: IfxDma.h:1440
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:142
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:159
IfxDma_ChannelShadow_srcDirectWrite
Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz an...
Definition: IfxDma.h:224
IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch
Software switch only. Shadow address used for double buffering.
Definition: IfxDma.h:226
IfxDma_HardwareResourcePartition_2
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:240
IfxDma_ChannelRequestSource_peripheral
Transfer Request via Hardware Trigger.
Definition: IfxDma.h:212
IfxDma_ChannelShadow_safeLinkedList
The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with th...
Definition: IfxDma.h:232
IfxDma_MoveEngine_1
second move engine
Definition: IfxDma.h:249
IfxDma_ChannelShadow_conditionalLinkedList
Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are use...
Definition: IfxDma.h:233
IfxDma_setChannelContinuousMode
IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure a DMA channel to "continous transaction mode" After a transaction, the hardware request tra...
Definition: IfxDma.h:1560
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:118
IfxDma_ChannelIncrementCircular_64
circular buffer size is 64 byte
Definition: IfxDma.h:92
IfxDma_ChannelShadow_dst
Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:223
IfxDma_ChannelIncrementCircular_2048
circular buffer size is 2048 byte
Definition: IfxDma.h:97
IfxDma_ChannelPattern_0_mode1
Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2]...
Definition: IfxDma.h:180
IfxDma_ChannelInterruptControl
IfxDma_ChannelInterruptControl
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
Definition: IfxDma.h:131
IfxDma_HardwareResourcePartition_0
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:238
IfxDma_setCircularBufferSourceLength
IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
Sets the Circular Buffer Source Length.
Definition: IfxDma.h:1709
IfxDma_setChannelHalt
IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
setting channel halt request
Definition: IfxDma.h:1583
IfxDma_writeChannelShadowEnable
IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Configure the shadow pointer register to write-able.
Definition: IfxDma.h:1681
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:203
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:88
IfxDma_getErrPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getErrPointer(Ifx_DMA *dma)
Returns the ERR pointer.
Definition: IfxDma.h:1739
IfxDma_ChannelPattern
IfxDma_ChannelPattern
Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL.
Definition: IfxDma.h:177
IfxDma_ChannelIncrementStep_4
increment by 4 width
Definition: IfxDma.h:120
IfxDma_ChannelInterruptControl_transferCountDecremented
interrupt when transfer count (TCOUNT) is decremented
Definition: IfxDma.h:134
IfxDma_ChannelBusPriority_medium
medium priority
Definition: IfxDma.h:77
IfxDma_ChannelBusPriority
IfxDma_ChannelBusPriority
Channel Bus Priority definition.
Definition: IfxDma.h:74
IfxDma_getSourceAndDestinationCRC
IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Source and Destination CRC.
Definition: IfxDma.h:1733
IfxDma_enableSourceCircularBuffer
IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable the Source Circular Buffer.
Definition: IfxDma.h:1715
IfxDma_getChannelTransactionRequestLost
IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Check the channel transaction request lost flag status.
Definition: IfxDma.h:1458
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1276
IfxDma_getAndClearChannelWrapSourceBufferInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the status of channel wrap source buffer interrupt trigger flag.
Definition: IfxDma.h:1403
IfxDma_ChannelIncrementCircular_4096
circular buffer size is 4096 byte
Definition: IfxDma.h:98
IfxDma_ChannelIncrementCircular_1024
circular buffer size is 1024 byte
Definition: IfxDma.h:96
IfxDma_getDoubleBufferRead
IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId)
get information on buffer being read by software and clear the notification flag
Definition: IfxDma.h:1476
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:170
IfxDma_ChannelPattern_0_mode2
Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3]...
Definition: IfxDma.h:181
IfxDma_ChannelIncrementCircular_8192
circular buffer size is 8192 byte
Definition: IfxDma.h:99
IfxDma_MoveEngine_0
first move engine
Definition: IfxDma.h:248
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1373
IfxDma_enableChannelInterrupt
IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable channel interrupt trigger.
Definition: IfxDma.h:1314
IfxDma_ChannelMove_2
2 DMA move per DMA transfer
Definition: IfxDma.h:143
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1648
IfxDma_keepDoubleBufferActive
IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId)
keeps the double buffer active
Definition: IfxDma.h:1542
IfxDma_resetChannel
IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel.
Definition: IfxDma.h:1548
IfxDma_ChannelMoveSize_256bit
1 DMA move is 256 bit wide
Definition: IfxDma.h:162
IfxDma_getErrorFlags
IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Return the DMA error status flags.
Definition: IfxDma.h:1497
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:110
IfxDma_HardwareResourcePartition
IfxDma_HardwareResourcePartition
Definition: IfxDma.h:236
IfxDma_ChannelMove_4
4 DMA move per DMA transfer
Definition: IfxDma.h:144
IfxDma_setInterruptControlValue
IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
Sets the Interrupt control value.
Definition: IfxDma.h:1697
IfxDma_SleepMode_enable
enables sleep mode
Definition: IfxDma.h:257
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxDma_disableChannelInterrupt
IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable channel interrupt trigger.
Definition: IfxDma.h:1270
IfxDma_ChannelMove_16
16 DMA move per DMA transfer
Definition: IfxDma.h:146
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1245
IfxDma_getCircularRangeCode
IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range)
Converts DMA circular range to circular code.
Definition: IfxDma.h:1470
IfxDma_ChannelIncrementCircular
IfxDma_ChannelIncrementCircular
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.
Definition: IfxDma.h:84
IfxDma_ChannelIncrementCircular_32768
circular buffer size is 32768 byte
Definition: IfxDma.h:101
IfxDma_ChannelPriority_medium
medium priority
Definition: IfxDma.h:194
IfxScuCcu.h
SCU basic functionality.
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1566
IfxDma_clearChannelHalt
IFX_INLINE void IfxDma_clearChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear channel halt request and aknowledgement.
Definition: IfxDma.h:1239
IfxDma_isChannelTransactionEnabled
IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel.
Definition: IfxDma.h:1530
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:460
IfxDma_ChannelPattern_0_disable
Pattern detect 0 disabled.
Definition: IfxDma.h:179
IfxDma_getChannelHalt
IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get channel halt aknowledgement.
Definition: IfxDma.h:1424
IfxDma_ChannelIncrementCircular_16384
circular buffer size is 16384 byte
Definition: IfxDma.h:100
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1595
IfxDma_getChannelSourceAddress
IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Get a channel source address.
Definition: IfxDma.h:1446
IfxDma_ChannelPriority_high
high priority
Definition: IfxDma.h:195
IfxDma_ChannelIncrementStep_8
increment by 8 width
Definition: IfxDma.h:121
IfxDma_ChannelShadow_src
Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:222
IfxDma_ChannelIncrementDirection_negative
pointer is decremented
Definition: IfxDma.h:109
IfxDma_ChannelPattern_0_mode3
Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual ...
Definition: IfxDma.h:182
IfxDma_ChannelIncrementStep_32
increment by 32 width
Definition: IfxDma.h:123
IfxDma_ChannelRequestSource_daisyChain
Transfer Request via next (higher priority) channel.
Definition: IfxDma.h:213
IfxDma_HardwareResourcePartition_1
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:239
IfxDma_ChannelIncrementStep_64
increment by 64 width
Definition: IfxDma.h:124
IfxDma_ChannelMoveSize
IfxDma_ChannelMoveSize
DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW.
Definition: IfxDma.h:155
IfxDma_getChannelTransferCount
IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return remaining DMA transfer count.
Definition: IfxDma.h:1464
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxDma_ChannelPattern_1_mode2
Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3]...
Definition: IfxDma.h:185
IfxDma_setChannelInterruptServiceRequest
IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software.
Definition: IfxDma.h:1589
IfxDma_ChannelOperationMode
IfxDma_ChannelOperationMode
DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE.
Definition: IfxDma.h:168
IfxDma_HardwareResourcePartition_3
"Set of DMA channels are associated with hardware resource partition " + str(x)
Definition: IfxDma.h:241
IfxDma_ChannelMove_5
5 DMA move per DMA transfer
Definition: IfxDma.h:148
IfxDma_ChannelPattern_1_disable
Pattern detect 1 disabled.
Definition: IfxDma.h:183
IfxDma_ChannelPattern_1_mode1
Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2]...
Definition: IfxDma.h:184
IfxDma_ChannelShadow_linkedList
The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corres...
Definition: IfxDma.h:230
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxDma_getDataCRC
IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the Data CRC.
Definition: IfxDma.h:1727
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxDma_getChannelSuspendModeStatus
IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the DMA channel suspend Mode status.
Definition: IfxDma.h:1452
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxDma_ChannelPriority_low
low priority
Definition: IfxDma.h:193
IfxDma_disableMoveEngineDestinationError
IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
Disable the generation of a Move engine destination error interrupt.
Definition: IfxDma.h:1288
IfxDma_ChannelIncrementCircular_2
circular buffer size is 2 byte
Definition: IfxDma.h:87
IfxDma_ChannelShadow_dstDirectWrite
Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHAD...
Definition: IfxDma.h:225
IfxDma_ChannelRequestMode_completeTransactionPerRequest
a request initiates a complete transaction
Definition: IfxDma.h:204
IfxDma_ChannelMoveSize_64bit
1 DMA move is 64 bit wide
Definition: IfxDma.h:160
IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch
Software switch only. Shadow address used for double buffering.
Definition: IfxDma.h:228
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:86
IfxDma_ChannelIncrementStep
IfxDma_ChannelIncrementStep
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.
Definition: IfxDma.h:116


iLLD_TC26B: IfxDma_Dma.c Source File

  • Dma
  • Dma
IfxDma_Dma.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma_Dma.c
3 * \brief DMA DMA details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxDma_Dma.h"
30
31 /******************************************************************************/
32 /*-----------------------Private Function Prototypes--------------------------*/
33 /******************************************************************************/
34
35 /** \brief local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists)
36 * \param channel Specifies the pointer to DMA channel registers
37 * \param config pointer to the DMA default channel configuration structure
38 * \return None
39 */
40 IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config);
41
42 /******************************************************************************/
43 /*-------------------------Function Implementations---------------------------*/
44 /******************************************************************************/
45
46 IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
47 {
48 /* shadow address shall be 32-Byte Aligned */
49 {
50 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, ((config->shadowAddress & 0x1F) == 0U));
51 }
52
53 {
54 Ifx_DMA_CH_CHCFGR chcfgr;
55 chcfgr.U = 0;
56 chcfgr.B.TREL = config->transferCount;
57 chcfgr.B.BLKM = config->blockMode;
58 chcfgr.B.RROAT = config->requestMode;
59 chcfgr.B.CHMODE = config->operationMode;
60 chcfgr.B.CHDW = config->moveSize;
61 chcfgr.B.PRSEL = config->requestSource;
62 chcfgr.B.PATSEL = config->pattern;
63
64 channel->CHCFGR.U = chcfgr.U;
65 }
66
67 {
68 Ifx_DMA_CH_ADICR adicr;
69 adicr.U = 0;
70 adicr.B.SMF = config->sourceAddressIncrementStep;
71 adicr.B.INCS = config->sourceAddressIncrementDirection;
72 adicr.B.CBLS = config->sourceAddressCircularRange;
73 adicr.B.SCBE = config->sourceCircularBufferEnabled;
74 adicr.B.DMF = config->destinationAddressIncrementStep;
75 adicr.B.INCD = config->destinationAddressIncrementDirection;
76 adicr.B.CBLD = config->destinationAddressCircularRange;
77 adicr.B.DCBE = config->destinationCircularBufferEnabled;
78 adicr.B.SHCT = config->shadowControl;
79 adicr.B.STAMP = config->timestampEnabled;
80 adicr.B.WRPSE = config->wrapSourceInterruptEnabled;
81 adicr.B.WRPDE = config->wrapDestinationInterruptEnabled;
82 adicr.B.INTCT = (config->channelInterruptEnabled ? 2 : 0) | (config->channelInterruptControl ? 1 : 0);
83 adicr.B.IRDV = config->interruptRaiseThreshold;
84 adicr.B.ETRL = config->transactionRequestLostInterruptEnabled;
85 //enter also the circular buffer enable bits
86
87 channel->ADICR.U = adicr.U;
88 }
89 channel->SADR.U = config->sourceAddress;
90 channel->DADR.U = config->destinationAddress;
91 channel->SDCRCR.U = config->sourceDestinationAddressCrc;
92 channel->RDCRCR.U = config->readDataCrc;
93
94 // write not allowed if SHCT=1 or SHCT=2
95 if ((config->shadowControl != IfxDma_ChannelShadow_none) &&
96 (config->shadowControl != IfxDma_ChannelShadow_src) &&
97 (config->shadowControl != IfxDma_ChannelShadow_dst))
98 {
99 channel->SHADR.U = config->shadowAddress;
100 }
101 }
102
103
104 void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
105 {
106 dmaHandle->dma = dma;
107 }
108
109
110 void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
111 {
112 if (IfxDma_isChannelTransactionEnabled(dma->dma, channel))
113 {
114 IfxDma_disableChannelTransaction(dma->dma, channel);
115 }
116
117 IfxDma_resetChannel(dma->dma, channel);
118
119 while (!(IfxDma_isChannelReset(dma->dma, channel)))
120 {}
121 }
122
123
124 void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
125 {
126 Ifx_DMA *dma = config->module->dma;
127
128 channel->dma = dma;
129 channel->channelId = config->channelId;
130 channel->channel = &dma->CH[config->channelId];
131
132 IfxDma_Dma_configureTransactionSet(channel->channel, config);
133
134 {
135 Ifx_DMA_TSR tsr;
136 tsr.U = 0;
137
138 if (config->hardwareRequestEnabled)
139 {
140 tsr.B.ECH = 1;
141 }
142 else
143 {
144 tsr.B.DCH = 1;
145 }
146
147 dma->TSR[channel->channelId].U = tsr.U;
148 }
149
150 if (config->channelInterruptPriority > 0)
151 {
152 volatile Ifx_SRC_SRCR *src = IfxDma_getSrcPointer(channel->dma, channel->channelId);
153 IfxSrc_init(src, config->channelInterruptTypeOfService, config->channelInterruptPriority);
154 IfxSrc_enable(src);
155 }
156 }
157
158
159 void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
160 {
161 const IfxDma_Dma_ChannelConfig defaultConfig = {
162 .module = NULL_PTR,
163 .channelId = IfxDma_ChannelId_0,
164 .sourceAddress = 0,
165 .destinationAddress = 0,
166 .shadowAddress = 0,
167 .readDataCrc = 0,
168 .sourceDestinationAddressCrc = 0,
169 .transferCount = 0,
170 .blockMode = IfxDma_ChannelMove_1,
171 .requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest,
172 .operationMode = IfxDma_ChannelOperationMode_single,
173 .moveSize = IfxDma_ChannelMoveSize_8bit,
174 .pattern = IfxDma_ChannelPattern_0_disable,
175 .requestSource = IfxDma_ChannelRequestSource_peripheral,
176 .busPriority = IfxDma_ChannelBusPriority_medium,
177 .hardwareRequestEnabled = FALSE,
178 .sourceAddressIncrementStep = IfxDma_ChannelIncrementStep_1,
179 .sourceAddressIncrementDirection = IfxDma_ChannelIncrementDirection_positive,
180 .sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_32768,
181 .destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1,
182 .destinationAddressIncrementDirection = IfxDma_ChannelIncrementDirection_positive,
183 .destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_32768,
184 .shadowControl = IfxDma_ChannelShadow_none,
185 .sourceCircularBufferEnabled = FALSE,
186 .destinationCircularBufferEnabled = FALSE,
187 .timestampEnabled = FALSE,
188 .wrapSourceInterruptEnabled = FALSE,
189 .wrapDestinationInterruptEnabled = FALSE,
190 .channelInterruptEnabled = FALSE,
191 .channelInterruptControl = IfxDma_ChannelInterruptControl_thresholdLimitMatch,
192 .interruptRaiseThreshold = 0,
193 .transactionRequestLostInterruptEnabled = FALSE,
194 .channelInterruptPriority = 0,
195 .channelInterruptTypeOfService = IfxSrc_Tos_cpu0
196 };
197
198 /* Default Configuration */
199 *config = defaultConfig;
200
201 /* take over module pointer */
202 config->module = dma;
203 }
204
205
206 void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
207 {
208 IfxDma_Dma_configureTransactionSet((Ifx_DMA_CH *)ptrToAddress, config);
209 }
210
211
212 void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
213 {
214 dma->dma = config->dma;
215 }
216
217
218 void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
219 {
220 config->dma = dma;
221 }
IfxDma_Dma_Config
Configuration data structure of the Module.
Definition: IfxDma_Dma.h:503
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:476
IfxDma_Dma_initModuleConfig
void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration
Definition: IfxDma_Dma.c:218
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:483
IfxDma_Dma_Channel::channelId
IfxDma_ChannelId channelId
Specifies the DMA channel.
Definition: IfxDma_Dma.h:457
IfxDma_Dma_ChannelConfig::readDataCrc
uint32 readDataCrc
Checksum for read data of the channel.
Definition: IfxDma_Dma.h:470
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxDma_Dma_ChannelConfig::sourceAddressIncrementStep
IfxDma_ChannelIncrementStep sourceAddressIncrementStep
Describes the address offset with which the source address should be modified after each move...
Definition: IfxDma_Dma.h:481
IfxDma_Dma_ChannelConfig::destinationAddressIncrementStep
IfxDma_ChannelIncrementStep destinationAddressIncrementStep
Describes the address offset with which the destination address should be modified after each move...
Definition: IfxDma_Dma.h:484
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:159
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:157
IfxDma_Dma.h
DMA DMA details.
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:467
IfxDma_Dma_initModule
void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module.
Definition: IfxDma_Dma.c:212
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:473
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:488
IfxDma_Dma_ChannelConfig::timestampEnabled
boolean timestampEnabled
Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction...
Definition: IfxDma_Dma.h:490
IfxDma_ChannelInterruptControl_thresholdLimitMatch
interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV)
Definition: IfxDma.h:133
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:489
IfxDma_Dma_ChannelConfig::interruptRaiseThreshold
uint8 interruptRaiseThreshold
The value of the transferCount at which the interrupt should be raised.
Definition: IfxDma_Dma.h:495
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:480
IfxDma_Dma_ChannelConfig::wrapSourceInterruptEnabled
boolean wrapSourceInterruptEnabled
An interrupt should be triggered whenever source address is wrapped.
Definition: IfxDma_Dma.h:491
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxDma_Dma_deInitChannel
void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel
Definition: IfxDma_Dma.c:110
IfxDma_Dma_Channel::channel
Ifx_DMA_CH * channel
Specifies the pointer to DMA channel registers.
Definition: IfxDma_Dma.h:458
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:497
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxDma_Dma_initLinkedListEntry
void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module
Definition: IfxDma_Dma.c:206
IfxDma_ChannelShadow_none
shadow address register not used. Source and destination address register are written directly ...
Definition: IfxDma.h:221
IfxDma_isChannelReset
IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (reset / not reset) This API needs to be used after the IfxDma_res...
Definition: IfxDma.h:1524
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1510
IfxDma_Dma_ChannelConfig::sourceAddressIncrementDirection
IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection
Decides whether the source address offset after each move should be added or decremented from the exi...
Definition: IfxDma_Dma.h:482
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:142
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:472
IfxDma_ChannelRequestSource_peripheral
Transfer Request via Hardware Trigger.
Definition: IfxDma.h:212
IfxDma_Dma_ChannelConfig::pattern
IfxDma_ChannelPattern pattern
Pattern selection operation modes.
Definition: IfxDma_Dma.h:477
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxDma_Dma::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:445
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:118
IfxDma_ChannelShadow_dst
Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:223
IfxDma_Dma_configureTransactionSet
IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists) ...
Definition: IfxDma_Dma.c:46
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:203
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:104
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxDma_ChannelId_0
Ifx_DMA Channel 0.
Definition: IfxDma_cfg.h:88
IfxDma_ChannelBusPriority_medium
medium priority
Definition: IfxDma.h:77
IfxDma_Dma_ChannelConfig::sourceDestinationAddressCrc
uint32 sourceDestinationAddressCrc
Checksum for source and destination address of channel.
Definition: IfxDma_Dma.h:471
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:443
IfxDma_Dma_ChannelConfig::transactionRequestLostInterruptEnabled
boolean transactionRequestLostInterruptEnabled
Enables/Disables the channel transaction request lost interrupt.
Definition: IfxDma_Dma.h:496
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1276
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:170
IfxDma_Dma_ChannelConfig::wrapDestinationInterruptEnabled
boolean wrapDestinationInterruptEnabled
An interrupt should be triggered whenever destination address is wrapped.
Definition: IfxDma_Dma.h:492
IfxDma_resetChannel
IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Reset the channel.
Definition: IfxDma.h:1548
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:475
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:110
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:463
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:124
IfxDma_Dma_ChannelConfig::shadowAddress
uint32 shadowAddress
Initial content of shadow address for the DMA channel.
Definition: IfxDma_Dma.h:469
IfxDma_ChannelIncrementCircular_32768
circular buffer size is 32768 byte
Definition: IfxDma.h:101
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxDma_isChannelTransactionEnabled
IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the hardware transaction request status of a DMA channel.
Definition: IfxDma.h:1530
IfxDma_ChannelPattern_0_disable
Pattern detect 0 disabled.
Definition: IfxDma.h:179
IfxDma_Dma_ChannelConfig::shadowControl
IfxDma_ChannelShadow shadowControl
selects the shadow transfer mode
Definition: IfxDma_Dma.h:487
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:468
IfxDma_ChannelShadow_src
Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction.
Definition: IfxDma.h:222
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:474
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:486
IfxDma_Dma_ChannelConfig::destinationAddressIncrementDirection
IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection
Decides whether the destination address offset after each move should be added or decremented from th...
Definition: IfxDma_Dma.h:485
IfxDma_Dma_ChannelConfig::requestSource
IfxDma_ChannelRequestSource requestSource
Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of p...
Definition: IfxDma_Dma.h:478
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:493
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:454
IfxDma_Dma_ChannelConfig::module
IfxDma_Dma * module
Specifies pointer to the IfxDma_Dma module handle.
Definition: IfxDma_Dma.h:465
IfxDma_Dma_ChannelConfig::channelInterruptControl
IfxDma_ChannelInterruptControl channelInterruptControl
The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
Definition: IfxDma_Dma.h:494
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:498
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254


iLLD_TC26B: IfxDma_Dma.h Source File

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IfxDma_Dma.h
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1 /**
2 * \file IfxDma_Dma.h
3 * \brief DMA DMA details
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dma_Dma_Usage How to use the DMA Interface driver?
25 * \ingroup IfxLld_Dma
26 *
27 * The DMA interface driver provides a default configuration for data moves without intervention of the CPU or other on chip devices.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework for different use cases.
30 *
31 * \section IfxLld_Dma_Dma_Preparation Preparation
32 * \subsection IfxLld_Dma_Dma_Include Include Files
33 *
34 * Include following header file into your C code:
35 *
36 * \code
37 * #include <Dma/Dma/IfxDma_Dma.h>
38 * #include <Vadc/Adc/IfxVadc_Adc.h>
39 *
40 * \endcode
41 *
42 *
43 * \subsection IfxLld_Dma_Dma_Module Module initialisation
44 *
45 * Declare the dma handle as a global variable:
46 *
47 * \code
48 * // DMA handle
49 * IfxDma_Dma dma;
50 * \endcode
51 *
52 * Initialize the DMA with following code:
53 * \code
54 * // create module config
55 * IfxDma_Dma_Config dmaConfig;
56 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
57 *
58 * // initialize module
59 * // IfxDma_Dma dma; // declared globally
60 * IfxDma_Dma_initModule(&dma, &dmaConfig);
61 * \endcode
62 *
63 * This only has to be done once in the application.
64 *
65 * The "IfxDma_Dma dma" handle should either be declared as a global variable (as shown in this example),
66 * or it can be created locally if desired:
67 *
68 * \code
69 * IfxDma_Dma dma;
70 * IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);
71 * \endcode
72 *
73 * \subsection IfxLld_Dma_Dma_Simple Memory-to-Memory Transfers
74 *
75 * A large amount of data should be copied between SRI based memories, e.g. from Flash into the DSPR
76 * of the current CPU. It's recommended to use 256 bit moves for this purpose for best performance.
77 *
78 * This requires, that source and target locations are 256 bit (32 byte) aligned. With the GCC compiler
79 * this can be achieved by adding __attribute__ ((aligned(64))) to the arrays:
80 *
81 * \code
82 * #define MEMORY_TRANSFER_NUM_WORDS 1024
83 * uint32 __attribute__ ((aligned(64))) memoryDestination[MEMORY_TRANSFER_NUM_WORDS];
84 * \endcode
85 *
86 * Channel configuration and handling for the data move:
87 * \code
88 * // construct the channel configuration
89 * IfxDma_Dma_ChannelConfig chnCfg;
90 * IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
91 *
92 * // select DMA channel which should be used
93 * chnCfg.channelId = IfxDma_ChannelId_0;
94 *
95 * // source and destination address
96 * chnCfg.sourceAddress = (uint32)0x80000000; // somewhere in flash section, here: start of PFlash (only for demo)
97 * chnCfg.destinationAddress = (uint32)memoryDestination;
98 *
99 * // move size, transfer count and request/operation mode
100 * chnCfg.moveSize = IfxDma_ChannelMoveSize_256bit;
101 * chnCfg.transferCount = (4 * MEMORY_TRANSFER_NUM_WORDS) / 32; // e.g. 1024 words require 128 * 256 bit moves
102 * chnCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
103 * chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
104 *
105 * // transfer configuration into DMA channel registers
106 * IfxDma_Dma_Channel chn;
107 * IfxDma_Dma_initChannel(&chn, &chnCfg);
108 *
109 * // start transfer and wait until it's finished
110 * IfxDma_Dma_startChannelTransaction(&chn);
111 * while( IfxDma_Dma_isChannelTransactionPending(&chn) == TRUE );
112 * \endcode
113 *
114 *
115 * \subsection IfxLld_Dma_Dma_Peripheral Peripheral-to-Memory Transfers
116 *
117 * The content of 8 ADC result registers should be transfered to a memory location in DSPR whenever
118 * an VADC autoscan has been finished. After the DMA transaction, an interrupt should be triggered
119 * so that the CPU can process the conversion results.
120 *
121 * We use following global variables:
122 * \code
123 * // buffer for autoscanned conversion result values
124 * #define NUM_SCANNED_CHANNELS 8
125 * static uint16 vadcResultBuffer[NUM_SCANNED_CHANNELS];
126 *
127 * // VADC handle
128 * IfxVadc_Adc vadc;
129 *
130 * // VADC group handle
131 * static IfxVadc_Adc_Group adcGroup;
132 *
133 * // DMA channel handle
134 * static IfxDma_Dma_Channel dmaChn;
135 * \endcode
136 *
137 *
138 * Create an interrupt handler for the DMA channel request:
139 * \code
140 * // priorities are normally defined in Ifx_IntPrioDef.h
141 * #define IFX_INTPRIO_DMA_CH0 1
142 *
143 * IFX_INTERRUPT(dmaCh0ISR, 0, IFX_INTPRIO_DMA_CH0)
144 * {
145 * // ...
146 * // do something with the conversion results in vadcResultBuffer[]
147 * // ...
148 *
149 * // re-init DMA channel destination address
150 * IfxDma_Dma_setChannelDestinationAddress(&dmaChn, ADDR_CPU_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]));
151 *
152 * // start new transaction
153 * IfxDma_Dma_setChannelTransferCount(&dmaChn, NUM_SCANNED_CHANNELS);
154 *
155 * {
156 * uint32 channels = 0xff; // all 8 channels
157 * uint32 mask = 0xff; // modify the selection of all channels
158 *
159 * // configure autoscan (single shot, not continuous scan)
160 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
161 * }
162 * }
163 * \endcode
164 *
165 * ADC configuration:
166 * \code
167 * // create configuration
168 * IfxVadc_Adc_Config adcConfig;
169 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
170 *
171 * adcConfig.startupCalibration = TRUE;
172 *
173 * // initialize module
174 * // IfxVadc_Adc vadc; // declared globally
175 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
176 *
177 * // create group config
178 * IfxVadc_Adc_GroupConfig adcGroupConfig;
179 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
180 *
181 * // initialize the group
182 * //IfxVadc_Adc_Group adcGroup; // defined globally
183 * adcGroupConfig.groupId = IfxVadc_GroupId_0;
184 * adcGroupConfig.master = adcGroupConfig.groupId;
185 *
186 * // enable all arbiter request sources
187 * adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
188 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
189 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
190 *
191 * // enable all gates in "always" mode (no edge detection)
192 * adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
193 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
194 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
195 *
196 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
197 *
198 * {
199 * // create channel config
200 * IfxVadc_Adc_ChannelConfig adcChannelConfig;
201 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
202 *
203 * // initialize the channels
204 * for(int i=0; i<NUM_SCANNED_CHANNELS; ++i) {
205 * adcChannelConfig.channelId = (IfxVadc_ChannelId)i;
206 * adcChannelConfig.resultRegister = IfxVadc_ChannelResult_0;
207 *
208 * // initialize the channel
209 * IfxVadc_Adc_Channel adcChannel;
210 * IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
211 *
212 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
213 * }
214 * }
215 * adcGroup.group->RCR[0].B.SRGEN = 1; // interrupt when new result is available
216 *
217 * // send service request to DMA Channel 0
218 * IfxSrc_init((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0], IfxSrc_Tos_dma, 0);
219 * IfxSrc_enable((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0]);
220 * \endcode
221 *
222 * And finally the DMA channel configuration
223 * \code
224 * // create module config
225 * IfxDma_Dma_Config dmaConfig;
226 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
227 *
228 * // initialize module
229 * IfxDma_Dma dma;
230 * IfxDma_Dma_initModule(&dma, &dmaConfig);
231 *
232 * {
233 * // construct the channel configuration
234 * IfxDma_Dma_ChannelConfig chnCfg;
235 * IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
236 *
237 * // select DMA channel which should be used
238 * chnCfg.channelId = IfxDma_ChannelId_0;
239 * chnCfg.hardwareRequestEnabled = TRUE; // will be triggered from VADC service request
240 *
241 * // interrupt configuration
242 * chnCfg.channelInterruptEnabled = TRUE; // service request from DMA after all words have been transfered
243 * chnCfg.channelInterruptPriority = IFX_INTPRIO_DMA_CH0;
244 * chnCfg.channelInterruptTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
245 *
246 * // source and destination address
247 * chnCfg.sourceAddress = (uint32)&adcGroup.group->RES[0]; // first result register
248 * chnCfg.sourceCircularBufferEnabled = TRUE;
249 * chnCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_1; // keep this address
250 *
251 * chnCfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]); // move into result buffer
252 * chnCfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1; // increment once (=2 bytes) with each write
253 *
254 * // move size, transfer count and request/operation mode
255 * chnCfg.moveSize = IfxDma_ChannelMoveSize_16bit;
256 * chnCfg.transferCount = NUM_SCANNED_CHANNELS; // for the scanned channels
257 * chnCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
258 * chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous; // hw request enable remains set after transaction
259 *
260 *
261 * // transfer configuration into DMA channel registers
262 * // IfxDma_Dma_Channel dmaChn; // declared globally
263 * IfxDma_Dma_initChannel(&dmaChn, &chnCfg);
264 *
265 * // configure IRQ handler which will be called after all result registers have been transfered
266 * IfxCpu_Irq_installInterruptHandler(&dmaCh0ISR, IFX_INTPRIO_DMA_CH0);
267 *
268 * // enable CPU interrupts
269 * IfxCpu_enableInterrupts();
270 * }
271 * \endcode
272 *
273 * In order to start the initial channel conversions, use:
274 * \code
275 * {
276 * uint32 channels = 0xff; // all 8 channels
277 * uint32 mask = 0xff; // modify the selection of all channels
278 *
279 * // configure and start autoscan (single shot, not continuous mode)
280 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
281 * }
282 * \endcode
283 *
284 * DMA will transfer the results to DSPR during the autoscan (whenever a new result is availale), and
285 * invoke the dmaCh0ISR function once all channels have been converted.
286 *
287 * The ISR will re-configure the DMA channel and re-start the autoscan.
288 *
289 *
290 * \subsection IfxLld_Dma_Dma_LinkedList Linked Lists
291 *
292 * Linked lists allow to initiate multiple DMA transactions from independent transaction sets which are
293 * typically stored in a DSPR memory location, and fetched and executed from the DMA channel without
294 * further CPU interaction.
295 *
296 * Following example demonstrates, how 5 different transactions can be initiated from a single request.
297 * We copy the data of 5 CAN message objects to a DSPR location.
298 *
299 * Includes and global variables:
300 * \code
301 * #include <Dma/Dma/IfxDma_Dma.h>
302 * #include <Scu/Std/IfxScuWdt.h>
303 * #include <IfxCan_reg.h>
304 *
305 * // DMA channel handle
306 * IfxDma_Dma_Channel chn;
307 *
308 * // Linked List storage
309 * // IMPORTANT: it has to be aligned to an 256bit address, otherwise DMA can't read it
310 * #define NUM_LINKED_LIST_ITEMS 5
311 * IFX_ALIGN(256) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
312 *
313 * // transfer these values to various CAN_MODATA[LH] registers via linked lists
314 * #define NUM_TRANSFERED_WORDS 2
315 * uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS];
316 *
317 * const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
318 * (uint32)&CAN_MODATAL0,
319 * (uint32)&CAN_MODATAL1,
320 * (uint32)&CAN_MODATAL2,
321 * (uint32)&CAN_MODATAL3,
322 * (uint32)&CAN_MODATAL4,
323 * };
324 * \endcode
325 *
326 * Following code to prepare CAN for this demo:
327 * \code
328 * // enable CAN (no Ifx LLD available yet)
329 * {
330 * uint32 passwd = IfxScuWdt_getCpuWatchdogPassword();
331 * IfxScuWdt_clearCpuEndinit(passwd);
332 *
333 * CAN_CLC.U = 0x0100;
334 * if( CAN_CLC.U ); // synch access
335 *
336 * // select f_clc as kernel clock
337 * CAN_MCR.B.CLKSEL = 1;
338 *
339 * // configure fractional divider
340 * CAN_FDR.U = 0x43ff;
341 *
342 * // wait until RAM has been initialized
343 * while( CAN_PANCTR.B.BUSY );
344 *
345 * IfxScuWdt_setCpuEndinit(passwd);
346 * }
347 * \endcode
348 *
349 *
350 * Build a linked list
351 * \code
352 * // create module config
353 * IfxDma_Dma_Config dmaConfig;
354 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
355 *
356 * // initialize module
357 * IfxDma_Dma dma;
358 * IfxDma_Dma_initModule(&dma, &dmaConfig);
359 *
360 * // initial channel configuration
361 * IfxDma_Dma_ChannelConfig cfg;
362 * IfxDma_Dma_initChannelConfig(&cfg, &dma);
363 *
364 * // following settings are used by all transactions
365 * cfg.transferCount = NUM_TRANSFERED_WORDS;
366 * cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
367 * cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
368 * cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
369 *
370 * // generate linked list items
371 * for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
372 * cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
373 * cfg.destinationAddress = destinationAddresses[i];
374 *
375 * // address to next transaction set
376 * cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
377 *
378 * // transfer first transaction set into DMA channel
379 * if( i == 0 ) {
380 * IfxDma_Dma_initChannel(&chn, &cfg);
381 * }
382 *
383 * // transfer into linked list storage
384 * IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
385 *
386 * if( i == 0 ) {
387 * // - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
388 * linkedList[i].CHCSR.B.SIT = 1;
389 * } else {
390 * // - activate SCH (transaction request) for each entry, except for the first one (linked list terminated here)
391 * linkedList[i].CHCSR.B.SCH = 1;
392 * }
393 * }
394 * \endcode
395 *
396 * The transfer can be started via software with:
397 * \code
398 * // clear service request flag
399 * (IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
400 *
401 * // start linked list transaction
402 * IfxDma_Dma_startChannelTransaction(&chn);
403 *
404 * // wait for service request which is triggered at the end of linked list transfers
405 * while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );
406 * \endcode
407 *
408 * In order to synchronize with the end of linked list operations, it's recommended to poll the service request flag (triggered via linkedList[NUM_LINKED_LIST_ITEMS-1].CHCSR.B.SIT after the last word has been transfered), and not the transaction count as shown before, because a linked list will initiate multiple transactions.
409 *
410 * \defgroup IfxLld_Dma_Dma DMA
411 * \ingroup IfxLld_Dma
412 * \defgroup IfxLld_Dma_Dma_Data_Structures Data Structures
413 * \ingroup IfxLld_Dma_Dma
414 * \defgroup IfxLld_Dma_Dma_Module_Initialize Module Initialization
415 * \ingroup IfxLld_Dma_Dma
416 * \defgroup IfxLld_Dma_Dma_Channel_Initialize Channel Initialization
417 * \ingroup IfxLld_Dma_Dma
418 * \defgroup IfxLld_Dma_Dma_Linked_List Linked Lists
419 * \ingroup IfxLld_Dma_Dma
420 * \defgroup IfxLld_Dma_Dma_Channel_Transaction_Initiate Channel Transactions
421 * \ingroup IfxLld_Dma_Dma
422 */
423
424 #ifndef IFXDMA_DMA_H
425 #define IFXDMA_DMA_H 1
426
427 /******************************************************************************/
428 /*----------------------------------Includes----------------------------------*/
429 /******************************************************************************/
430
431 #include "_Impl/IfxDma_cfg.h"
432 #include "Dma/Std/IfxDma.h"
433 #include "Cpu/Std/IfxCpu.h"
434
435 /******************************************************************************/
436 /*-----------------------------Data Structures--------------------------------*/
437 /******************************************************************************/
438
439 /** \addtogroup IfxLld_Dma_Dma_Data_Structures
440 * \{ */
441 /** \brief DMA base address data structure (Module handle)
442 */
443 typedef struct
444 {
445 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
446 } IfxDma_Dma;
447
448 /** \} */
449
450 /** \addtogroup IfxLld_Dma_Dma_Data_Structures
451 * \{ */
452 /** \brief Channel handle
453 */
454 typedef struct
455 {
456 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
457 IfxDma_ChannelId channelId; /**< \brief Specifies the DMA channel */
458 Ifx_DMA_CH *channel; /**< \brief Specifies the pointer to DMA channel registers */
459 } IfxDma_Dma_Channel;
460
461 /** \brief Configuration data structure of the channel
462 */
463 typedef struct
464 {
465 IfxDma_Dma *module; /**< \brief Specifies pointer to the IfxDma_Dma module handle */
466 IfxDma_ChannelId channelId; /**< \brief Specifies the channel being used */
467 uint32 sourceAddress; /**< \brief Source address for the DMA channel */
468 uint32 destinationAddress; /**< \brief Destination address for the DMA channel */
469 uint32 shadowAddress; /**< \brief Initial content of shadow address for the DMA channel */
470 uint32 readDataCrc; /**< \brief Checksum for read data of the channel */
471 uint32 sourceDestinationAddressCrc; /**< \brief Checksum for source and destination address of channel */
472 uint16 transferCount; /**< \brief Number of transfers in a transaction */
473 IfxDma_ChannelMove blockMode; /**< \brief Number of moves in a transfer */
474 IfxDma_ChannelRequestMode requestMode; /**< \brief A service request initiates a single transfer, or the complete transaction */
475 IfxDma_ChannelOperationMode operationMode; /**< \brief keep enable/disable the hardware channel request after a transaction */
476 IfxDma_ChannelMoveSize moveSize; /**< \brief Read/write data size */
477 IfxDma_ChannelPattern pattern; /**< \brief Pattern selection operation modes */
478 IfxDma_ChannelRequestSource requestSource; /**< \brief Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of previous channel will trigger the next channel request */
479 IfxDma_ChannelBusPriority busPriority; /**< \brief Bus priority selection */
480 boolean hardwareRequestEnabled; /**< \brief Enabling channel transaction via hardware request */
481 IfxDma_ChannelIncrementStep sourceAddressIncrementStep; /**< \brief Describes the address offset with which the source address should be modified after each move */
482 IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection; /**< \brief Decides whether the source address offset after each move should be added or decremented from the exisiting address */
483 IfxDma_ChannelIncrementCircular sourceAddressCircularRange; /**< \brief Determines which part of the source address remains unchanged and therby not updated after each move */
484 IfxDma_ChannelIncrementStep destinationAddressIncrementStep; /**< \brief Describes the address offset with which the destination address should be modified after each move */
485 IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection; /**< \brief Decides whether the destination address offset after each move should be added or decremented from the exisiting address */
486 IfxDma_ChannelIncrementCircular destinationAddressCircularRange; /**< \brief Determines which part of the destination address remains unchanged and therby not updated after each move */
487 IfxDma_ChannelShadow shadowControl; /**< \brief selects the shadow transfer mode */
488 boolean sourceCircularBufferEnabled; /**< \brief Enables/Disables the source circular buffering */
489 boolean destinationCircularBufferEnabled; /**< \brief Enables/Disables the destination circular buffering */
490 boolean timestampEnabled; /**< \brief Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction */
491 boolean wrapSourceInterruptEnabled; /**< \brief An interrupt should be triggered whenever source address is wrapped */
492 boolean wrapDestinationInterruptEnabled; /**< \brief An interrupt should be triggered whenever destination address is wrapped */
493 boolean channelInterruptEnabled; /**< \brief The channel transfer interrupt should be triggered. See also channelInterruptControl */
494 IfxDma_ChannelInterruptControl channelInterruptControl; /**< \brief The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented */
495 uint8 interruptRaiseThreshold; /**< \brief The value of the transferCount at which the interrupt should be raised */
496 boolean transactionRequestLostInterruptEnabled; /**< \brief Enables/Disables the channel transaction request lost interrupt */
497 Ifx_Priority channelInterruptPriority; /**< \brief Priority of the channel interrupt trigger */
498 IfxSrc_Tos channelInterruptTypeOfService; /**< \brief Interrupt service provider */
499 } IfxDma_Dma_ChannelConfig;
500
501 /** \brief Configuration data structure of the Module
502 */
503 typedef struct
504 {
505 Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
506 } IfxDma_Dma_Config;
507
508 /** \} */
509
510 /** \addtogroup IfxLld_Dma_Dma_Module_Initialize
511 * \{ */
512
513 /******************************************************************************/
514 /*-------------------------Global Function Prototypes-------------------------*/
515 /******************************************************************************/
516
517 /** \brief initializes a DMA module handle based on the current configuration.
518 * Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available.
519 * \param dmaHandle pointer to the DMA module handle
520 * \param dma pointer to the DMA registers
521 * \return None
522 *
523 * \code
524 * IfxDma_Dma dma;
525 * IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);
526 * \endcode
527 *
528 */
529 IFX_EXTERN void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma);
530
531 /** \brief de-initialize the DMA channel
532 * \param dma pointer to the DMA module handle
533 * \param channel the DMA channel ID
534 * \return None
535 */
536 IFX_EXTERN void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel);
537
538 /** \brief Initialize the DMA module
539 * \param dma pointer to the DMA module handle
540 * \param config Pointer to configuration structure of the DMA module
541 * \return None
542 *
543 * See \ref IfxLld_Dma_Dma_Simple
544 *
545 */
546 IFX_EXTERN void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config);
547
548 /** \brief initialize the DMA module configuration
549 * \param config Pointer to configuration structure of the DMA module
550 * \param dma pointer to the DMA registers
551 * \return None
552 *
553 * See \ref IfxLld_Dma_Dma_Simple
554 *
555 */
556 IFX_EXTERN void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma);
557
558 /** \} */
559
560 /** \addtogroup IfxLld_Dma_Dma_Channel_Initialize
561 * \{ */
562
563 /******************************************************************************/
564 /*-------------------------Global Function Prototypes-------------------------*/
565 /******************************************************************************/
566
567 /** \brief initialize the DMA channel
568 * \param channel pointer to the DMA base address and channel ID
569 * \param config pointer to the DMA default channel configuration structure
570 * \return None
571 *
572 * See \ref IfxLld_Dma_Dma_Simple
573 *
574 */
575 IFX_EXTERN void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config);
576
577 /** \brief initialize the DMA module channel configuration
578 * \param config pointer to the DMA default channel configuration structure
579 * \param dma pointer to the DMA module handle
580 * \return None
581 *
582 * See \ref IfxLld_Dma_Dma_Simple
583 *
584 */
585 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma);
586
587 /** \} */
588
589 /** \addtogroup IfxLld_Dma_Dma_Linked_List
590 * \{ */
591
592 /******************************************************************************/
593 /*-------------------------Inline Function Prototypes-------------------------*/
594 /******************************************************************************/
595
596 /** \brief Returns the SRC pointer for given DMA channel
597 * \param channel pointer to the DMA base address and channel ID
598 * \return SRC pointer for given DMA channel
599 */
600 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel);
601
602 /******************************************************************************/
603 /*-------------------------Global Function Prototypes-------------------------*/
604 /******************************************************************************/
605
606 /** \brief linked list functionality within the DMA module
607 * \param ptrToAddress pointer to the memory location where the linked list entry should be stored
608 * \param config pointer to the DMA default channel configuration structure
609 * \return None
610 *
611 * See \ref IfxLld_Dma_Dma_LinkedList
612 *
613 */
614 IFX_EXTERN void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config);
615
616 /** \} */
617
618 /** \addtogroup IfxLld_Dma_Dma_Channel_Transaction_Initiate
619 * \{ */
620
621 /******************************************************************************/
622 /*-------------------------Inline Function Prototypes-------------------------*/
623 /******************************************************************************/
624
625 /** \brief Clear a channel transfer interrupt flag
626 * \param channel pointer to the DMA base address and channel ID
627 * \return None
628 */
629 IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel);
630
631 /** \brief Return and clear a channel transfer interrupt flag
632 * The flag is automatically cleared with the call to this function
633 * \param channel pointer to the DMA base address and channel ID
634 * \return TRUE if the interrupt flag is set
635 * FALSE if the interrupt flag is not set
636 */
637 IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel);
638
639 /** \brief Return a channel transfer interrupt flag
640 * \param channel pointer to the DMA base address and channel ID
641 * \return TRUE if the interrupt flag is set
642 * FALSE if the interrupt flag is not set
643 */
644 IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel);
645
646 /** \brief Poll for an ongoing transaction
647 * \param channel pointer to the DMA base address and channel ID
648 * \return TRUE if a transaction request for the given channel is pending
649 *
650 * See \ref IfxLld_Dma_Dma_Simple
651 *
652 */
653 IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel);
654
655 /** \brief Re-initialize the destination address after a transaction
656 * \param channel pointer to the DMA base address and channel ID
657 * \param address is the Initial address of the destination pointer
658 * \return None
659 *
660 * See \ref IfxLld_Dma_Dma_Simple
661 *
662 */
663 IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address);
664
665 /** \brief Re-initialize the source address after a transaction
666 * \param channel pointer to the DMA base address and channel ID
667 * \param address is the Initial address of the source pointer
668 * \return None
669 *
670 * See \ref IfxLld_Dma_Dma_Simple
671 *
672 */
673 IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address);
674
675 /** \brief Re-initialize the transfer count after a transaction
676 * \param channel pointer to the DMA base address and channel ID
677 * \param transferCount value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
678 * \return None
679 *
680 * See \ref IfxLld_Dma_Dma_Simple
681 *
682 */
683 IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount);
684
685 /** \brief initiate the DMA move transaction
686 * \param channel pointer to the DMA base address and channel ID
687 * \return None
688 *
689 * See \ref IfxLld_Dma_Dma_Simple
690 *
691 */
692 IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel);
693
694 /** \} */
695
696 /******************************************************************************/
697 /*---------------------Inline Function Implementations------------------------*/
698 /******************************************************************************/
699
700 IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel)
701 {
702 IfxDma_clearChannelInterrupt(channel->dma, channel->channelId);
703 }
704
705
706 IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel)
707 {
708 return IfxDma_getAndClearChannelInterrupt(channel->dma, channel->channelId);
709 }
710
711
712 IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel)
713 {
714 return IfxDma_getChannelInterrupt(channel->dma, channel->channelId);
715 }
716
717
718 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel)
719 {
720 return IfxDma_getSrcPointer(channel->dma, channel->channelId);
721 }
722
723
724 IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel)
725 {
726 return IfxDma_isChannelTransactionPending(channel->dma, channel->channelId);
727 }
728
729
730 IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address)
731 {
732 IfxDma_setChannelDestinationAddress(channel->dma, channel->channelId, (void *)address);
733 }
734
735
736 IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address)
737 {
738 IfxDma_setChannelSourceAddress(channel->dma, channel->channelId, (void *)address);
739 }
740
741
742 IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount)
743 {
744 IfxDma_setChannelTransferCount(channel->dma, channel->channelId, transferCount);
745 }
746
747
748 IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel)
749 {
750 IfxDma_startChannelTransaction(channel->dma, channel->channelId);
751 }
752
753
754 #endif /* IFXDMA_DMA_H */
IfxDma_Dma_Config
Configuration data structure of the Module.
Definition: IfxDma_Dma.h:503
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:476
IfxDma_ChannelIncrementDirection
IfxDma_ChannelIncrementDirection
DMA incrementation direction definition Definition in Ifx_DMA.CH[64].ADICR.B.INCS.
Definition: IfxDma.h:107
IfxDma_Dma_setChannelSourceAddress
IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the source address after a transaction.
Definition: IfxDma_Dma.h:736
IfxDma_Dma_initModuleConfig
IFX_EXTERN void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
initialize the DMA module configuration
Definition: IfxDma_Dma.c:218
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:483
IfxDma_Dma_Channel::channelId
IfxDma_ChannelId channelId
Specifies the DMA channel.
Definition: IfxDma_Dma.h:457
IfxDma_Dma_ChannelConfig::readDataCrc
uint32 readDataCrc
Checksum for read data of the channel.
Definition: IfxDma_Dma.h:470
IfxDma_Dma_clearChannelInterrupt
IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel)
Clear a channel transfer interrupt flag.
Definition: IfxDma_Dma.h:700
IfxDma_ChannelMove
IfxDma_ChannelMove
DMA transfer definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM.
Definition: IfxDma.h:140
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1625
IfxDma_Dma_ChannelConfig::sourceAddressIncrementStep
IfxDma_ChannelIncrementStep sourceAddressIncrementStep
Describes the address offset with which the source address should be modified after each move...
Definition: IfxDma_Dma.h:481
IfxDma_Dma_ChannelConfig::destinationAddressIncrementStep
IfxDma_ChannelIncrementStep destinationAddressIncrementStep
Describes the address offset with which the destination address should be modified after each move...
Definition: IfxDma_Dma.h:484
IfxDma_Dma_initChannelConfig
IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:159
IfxDma_Dma_setChannelTransferCount
IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount)
Re-initialize the transfer count after a transaction.
Definition: IfxDma_Dma.h:742
IfxDma.h
DMA basic functionality.
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:467
IfxDma_Dma_initModule
IFX_EXTERN void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
Initialize the DMA module.
Definition: IfxDma_Dma.c:212
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:473
IfxDma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return the status of a DMA channel (transaction pending)
Definition: IfxDma.h:1536
IfxDma_getChannelInterrupt
IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return a channel transfer interrupt flag.
Definition: IfxDma.h:1430
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:488
IfxDma_Dma_ChannelConfig::timestampEnabled
boolean timestampEnabled
Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction...
Definition: IfxDma_Dma.h:490
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1663
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:489
IfxDma_Dma_isChannelTransactionPending
IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel)
Poll for an ongoing transaction.
Definition: IfxDma_Dma.h:724
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxDma_ChannelShadow
IfxDma_ChannelShadow
shadow definition definition Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
Definition: IfxDma.h:219
IfxDma_Dma_ChannelConfig::interruptRaiseThreshold
uint8 interruptRaiseThreshold
The value of the transferCount at which the interrupt should be raised.
Definition: IfxDma_Dma.h:495
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:480
IfxDma_Dma_ChannelConfig::wrapSourceInterruptEnabled
boolean wrapSourceInterruptEnabled
An interrupt should be triggered whenever source address is wrapped.
Definition: IfxDma_Dma.h:491
IfxDma_Dma_deInitChannel
IFX_EXTERN void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
de-initialize the DMA channel
Definition: IfxDma_Dma.c:110
IfxDma_Dma_Channel::channel
Ifx_DMA_CH * channel
Specifies the pointer to DMA channel registers.
Definition: IfxDma_Dma.h:458
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:497
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1358
IfxDma_Dma_getChannelInterrupt
IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel)
Return a channel transfer interrupt flag.
Definition: IfxDma_Dma.h:712
IfxDma_ChannelRequestSource
IfxDma_ChannelRequestSource
DMA request selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL.
Definition: IfxDma.h:210
IfxDma_Dma_initLinkedListEntry
IFX_EXTERN void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
linked list functionality within the DMA module
Definition: IfxDma_Dma.c:206
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1510
IfxDma_cfg.h
DMA on-chip implementation data.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxDma_Dma_ChannelConfig::sourceAddressIncrementDirection
IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection
Decides whether the source address offset after each move should be added or decremented from the exi...
Definition: IfxDma_Dma.h:482
IfxDma_ChannelRequestMode
IfxDma_ChannelRequestMode
DMA request mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT.
Definition: IfxDma.h:201
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:472
IfxDma_Dma_ChannelConfig::pattern
IfxDma_ChannelPattern pattern
Pattern selection operation modes.
Definition: IfxDma_Dma.h:477
IfxDma_Dma::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:445
IfxDma_ChannelInterruptControl
IfxDma_ChannelInterruptControl
Channel Transfer Interrupt generation mechanism. Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
Definition: IfxDma.h:131
IfxDma_Dma_createModuleHandle
IFX_EXTERN void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:104
IfxDma_ChannelPattern
IfxDma_ChannelPattern
Pattern detection selection Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL.
Definition: IfxDma.h:177
IfxDma_Dma_ChannelConfig::sourceDestinationAddressCrc
uint32 sourceDestinationAddressCrc
Checksum for source and destination address of channel.
Definition: IfxDma_Dma.h:471
IfxDma_ChannelBusPriority
IfxDma_ChannelBusPriority
Channel Bus Priority definition.
Definition: IfxDma.h:74
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:443
IfxDma_Dma_setChannelDestinationAddress
IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address)
Re-initialize the destination address after a transaction.
Definition: IfxDma_Dma.h:730
IfxDma_Dma_ChannelConfig::transactionRequestLostInterruptEnabled
boolean transactionRequestLostInterruptEnabled
Enables/Disables the channel transaction request lost interrupt.
Definition: IfxDma_Dma.h:496
IfxDma_Dma_ChannelConfig::wrapDestinationInterruptEnabled
boolean wrapDestinationInterruptEnabled
An interrupt should be triggered whenever destination address is wrapped.
Definition: IfxDma_Dma.h:492
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1648
IfxCpu.h
CPU basic functionality.
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:475
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:463
IfxDma_Dma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma_Dma.h:706
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1245
IfxDma_Dma_initChannel
IFX_EXTERN void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:124
IfxDma_ChannelIncrementCircular
IfxDma_ChannelIncrementCircular
DMA circular buffer (wrap around) definition Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD.
Definition: IfxDma.h:84
IfxDma_Dma_ChannelConfig::shadowAddress
uint32 shadowAddress
Initial content of shadow address for the DMA channel.
Definition: IfxDma_Dma.h:469
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1566
IfxDma_Dma_ChannelConfig::shadowControl
IfxDma_ChannelShadow shadowControl
selects the shadow transfer mode
Definition: IfxDma_Dma.h:487
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:468
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:474
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:486
IfxDma_ChannelMoveSize
IfxDma_ChannelMoveSize
DMA move size definition Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW.
Definition: IfxDma.h:155
IfxDma_Dma_ChannelConfig::destinationAddressIncrementDirection
IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection
Decides whether the destination address offset after each move should be added or decremented from th...
Definition: IfxDma_Dma.h:485
IfxDma_Dma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma_Dma.h:718
IfxDma_Dma_startChannelTransaction
IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel)
initiate the DMA move transaction
Definition: IfxDma_Dma.h:748
IfxDma_ChannelOperationMode
IfxDma_ChannelOperationMode
DMA operation mode Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE.
Definition: IfxDma.h:168
IfxDma_Dma_ChannelConfig::requestSource
IfxDma_ChannelRequestSource requestSource
Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of p...
Definition: IfxDma_Dma.h:478
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:493
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:454
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxDma_Dma_ChannelConfig::module
IfxDma_Dma * module
Specifies pointer to the IfxDma_Dma module handle.
Definition: IfxDma_Dma.h:465
IfxDma_Dma_ChannelConfig::channelInterruptControl
IfxDma_ChannelInterruptControl channelInterruptControl
The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented.
Definition: IfxDma_Dma.h:494
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:498
IfxDma_Dma_ChannelConfig::busPriority
IfxDma_ChannelBusPriority busPriority
Bus priority selection.
Definition: IfxDma_Dma.h:479
IfxDma_ChannelIncrementStep
IfxDma_ChannelIncrementStep
DMA incrementation definition Definition in Ifx_DMA.CH[64].ADICR.B.SMF.
Definition: IfxDma.h:116


iLLD_TC26B: IfxDma_cfg.c Source File

  • _Impl
IfxDma_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxDma_cfg.c
3 * \brief DMA on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxDma_cfg.h"
IfxDma_cfg.h
DMA on-chip implementation data.


iLLD_TC26B: IfxDma_cfg.h Source File

  • _Impl
IfxDma_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxDma_cfg.h
3 * \brief DMA on-chip implementation data
4 * \ingroup IfxLld_Dma
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dma DMA
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Dma_Impl Implementation
27 * \ingroup IfxLld_Dma
28 * \defgroup IfxLld_Dma_Std Standard Driver
29 * \ingroup IfxLld_Dma
30 */
31
32 #ifndef IFXDMA_CFG_H
33 #define IFXDMA_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "Cpu/Std/Ifx_Types.h"
40
41 /******************************************************************************/
42 /*-----------------------------------Macros-----------------------------------*/
43 /******************************************************************************/
44
45 /** \brief Number of channels
46 */
47 #define IFXDMA_NUM_CHANNELS 48
48
49 /** \brief Error mask for move engine source error
50 */
51 #define IFXDMA_ERROR_S (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)
52
53 /** \brief Error mask for move engine destination error
54 */
55 #define IFXDMA_ERROR_D (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)
56
57 /** \brief Error mask for bus error on SPB
58 */
59 #define IFXDMA_ERROR_SPB (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)
60
61 /** \brief Error mask for bus error on SRI
62 */
63 #define IFXDMA_ERROR_SRI (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)
64
65 /** \brief Error mask for RAM error
66 */
67 #define IFXDMA_ERROR_RAM (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)
68
69 /** \brief Error mask for SLL (safe linked list CRC checksum) error
70 */
71 #define IFXDMA_ERROR_SLL (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)
72
73 /** \brief Error mask for DLL (failed linked list load) error
74 */
75 #define IFXDMA_ERROR_DLL (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)
76
77 #define IFXDMA_NUM_MODULES (1)
78
79 /******************************************************************************/
80 /*-------------------------------Enumerations---------------------------------*/
81 /******************************************************************************/
82
83 /** \brief DMA channel resources definition
84 */
85 typedef enum
86 {
87 IfxDma_ChannelId_none = -1, /**< \brief None of the Ifx_DMA Channels */
88 IfxDma_ChannelId_0 = 0, /**< \brief Ifx_DMA Channel 0 */
89 IfxDma_ChannelId_1, /**< \brief Ifx_DMA Channel 1 */
90 IfxDma_ChannelId_2, /**< \brief Ifx_DMA Channel 2 */
91 IfxDma_ChannelId_3, /**< \brief Ifx_DMA Channel 3 */
92 IfxDma_ChannelId_4, /**< \brief Ifx_DMA Channel 4 */
93 IfxDma_ChannelId_5, /**< \brief Ifx_DMA Channel 5 */
94 IfxDma_ChannelId_6, /**< \brief Ifx_DMA Channel 6 */
95 IfxDma_ChannelId_7, /**< \brief Ifx_DMA Channel 7 */
96 IfxDma_ChannelId_8, /**< \brief Ifx_DMA Channel 8 */
97 IfxDma_ChannelId_9, /**< \brief Ifx_DMA Channel 9 */
98 IfxDma_ChannelId_10, /**< \brief Ifx_DMA Channel 10 */
99 IfxDma_ChannelId_11, /**< \brief Ifx_DMA Channel 11 */
100 IfxDma_ChannelId_12, /**< \brief Ifx_DMA Channel 12 */
101 IfxDma_ChannelId_13, /**< \brief Ifx_DMA Channel 13 */
102 IfxDma_ChannelId_14, /**< \brief Ifx_DMA Channel 14 */
103 IfxDma_ChannelId_15, /**< \brief Ifx_DMA Channel 15 */
104 IfxDma_ChannelId_16, /**< \brief Ifx_DMA Channel 16 */
105 IfxDma_ChannelId_17, /**< \brief Ifx_DMA Channel 17 */
106 IfxDma_ChannelId_18, /**< \brief Ifx_DMA Channel 18 */
107 IfxDma_ChannelId_19, /**< \brief Ifx_DMA Channel 19 */
108 IfxDma_ChannelId_20, /**< \brief Ifx_DMA Channel 20 */
109 IfxDma_ChannelId_21, /**< \brief Ifx_DMA Channel 21 */
110 IfxDma_ChannelId_22, /**< \brief Ifx_DMA Channel 22 */
111 IfxDma_ChannelId_23, /**< \brief Ifx_DMA Channel 23 */
112 IfxDma_ChannelId_24, /**< \brief Ifx_DMA Channel 24 */
113 IfxDma_ChannelId_25, /**< \brief Ifx_DMA Channel 25 */
114 IfxDma_ChannelId_26, /**< \brief Ifx_DMA Channel 26 */
115 IfxDma_ChannelId_27, /**< \brief Ifx_DMA Channel 27 */
116 IfxDma_ChannelId_28, /**< \brief Ifx_DMA Channel 28 */
117 IfxDma_ChannelId_29, /**< \brief Ifx_DMA Channel 29 */
118 IfxDma_ChannelId_30, /**< \brief Ifx_DMA Channel 30 */
119 IfxDma_ChannelId_31, /**< \brief Ifx_DMA Channel 31 */
120 IfxDma_ChannelId_32, /**< \brief Ifx_DMA Channel 32 */
121 IfxDma_ChannelId_33, /**< \brief Ifx_DMA Channel 33 */
122 IfxDma_ChannelId_34, /**< \brief Ifx_DMA Channel 34 */
123 IfxDma_ChannelId_35, /**< \brief Ifx_DMA Channel 35 */
124 IfxDma_ChannelId_36, /**< \brief Ifx_DMA Channel 36 */
125 IfxDma_ChannelId_37, /**< \brief Ifx_DMA Channel 37 */
126 IfxDma_ChannelId_38, /**< \brief Ifx_DMA Channel 38 */
127 IfxDma_ChannelId_39, /**< \brief Ifx_DMA Channel 39 */
128 IfxDma_ChannelId_40, /**< \brief Ifx_DMA Channel 40 */
129 IfxDma_ChannelId_41, /**< \brief Ifx_DMA Channel 41 */
130 IfxDma_ChannelId_42, /**< \brief Ifx_DMA Channel 42 */
131 IfxDma_ChannelId_43, /**< \brief Ifx_DMA Channel 43 */
132 IfxDma_ChannelId_44, /**< \brief Ifx_DMA Channel 44 */
133 IfxDma_ChannelId_45, /**< \brief Ifx_DMA Channel 45 */
134 IfxDma_ChannelId_46, /**< \brief Ifx_DMA Channel 46 */
135 IfxDma_ChannelId_47 /**< \brief Ifx_DMA Channel 47 */
136 } IfxDma_ChannelId;
137
138 #endif /* IFXDMA_CFG_H */
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxDma_ChannelId_5
Ifx_DMA Channel 5.
Definition: IfxDma_cfg.h:93
IfxDma_ChannelId_47
Ifx_DMA Channel 47.
Definition: IfxDma_cfg.h:135
IfxDma_ChannelId_1
Ifx_DMA Channel 1.
Definition: IfxDma_cfg.h:89
IfxDma_ChannelId_29
Ifx_DMA Channel 29.
Definition: IfxDma_cfg.h:117
IfxDma_ChannelId_10
Ifx_DMA Channel 10.
Definition: IfxDma_cfg.h:98
IfxDma_ChannelId_3
Ifx_DMA Channel 3.
Definition: IfxDma_cfg.h:91
IfxDma_ChannelId_43
Ifx_DMA Channel 43.
Definition: IfxDma_cfg.h:131
IfxDma_ChannelId_45
Ifx_DMA Channel 45.
Definition: IfxDma_cfg.h:133
IfxDma_ChannelId_13
Ifx_DMA Channel 13.
Definition: IfxDma_cfg.h:101
IfxDma_ChannelId_24
Ifx_DMA Channel 24.
Definition: IfxDma_cfg.h:112
IfxDma_ChannelId_26
Ifx_DMA Channel 26.
Definition: IfxDma_cfg.h:114
IfxDma_ChannelId_42
Ifx_DMA Channel 42.
Definition: IfxDma_cfg.h:130
IfxDma_ChannelId_21
Ifx_DMA Channel 21.
Definition: IfxDma_cfg.h:109
IfxDma_ChannelId_41
Ifx_DMA Channel 41.
Definition: IfxDma_cfg.h:129
IfxDma_ChannelId_40
Ifx_DMA Channel 40.
Definition: IfxDma_cfg.h:128
IfxDma_ChannelId_30
Ifx_DMA Channel 30.
Definition: IfxDma_cfg.h:118
IfxDma_ChannelId_6
Ifx_DMA Channel 6.
Definition: IfxDma_cfg.h:94
IfxDma_ChannelId_44
Ifx_DMA Channel 44.
Definition: IfxDma_cfg.h:132
IfxDma_ChannelId_7
Ifx_DMA Channel 7.
Definition: IfxDma_cfg.h:95
IfxDma_ChannelId_16
Ifx_DMA Channel 16.
Definition: IfxDma_cfg.h:104
IfxDma_ChannelId_22
Ifx_DMA Channel 22.
Definition: IfxDma_cfg.h:110
IfxDma_ChannelId_28
Ifx_DMA Channel 28.
Definition: IfxDma_cfg.h:116
IfxDma_ChannelId_33
Ifx_DMA Channel 33.
Definition: IfxDma_cfg.h:121
IfxDma_ChannelId_31
Ifx_DMA Channel 31.
Definition: IfxDma_cfg.h:119
IfxDma_ChannelId_37
Ifx_DMA Channel 37.
Definition: IfxDma_cfg.h:125
IfxDma_ChannelId_32
Ifx_DMA Channel 32.
Definition: IfxDma_cfg.h:120
IfxDma_ChannelId_46
Ifx_DMA Channel 46.
Definition: IfxDma_cfg.h:134
IfxDma_ChannelId_2
Ifx_DMA Channel 2.
Definition: IfxDma_cfg.h:90
IfxDma_ChannelId_15
Ifx_DMA Channel 15.
Definition: IfxDma_cfg.h:103
IfxDma_ChannelId_0
Ifx_DMA Channel 0.
Definition: IfxDma_cfg.h:88
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxDma_ChannelId_27
Ifx_DMA Channel 27.
Definition: IfxDma_cfg.h:115
IfxDma_ChannelId_34
Ifx_DMA Channel 34.
Definition: IfxDma_cfg.h:122
IfxDma_ChannelId_18
Ifx_DMA Channel 18.
Definition: IfxDma_cfg.h:106
IfxDma_ChannelId_4
Ifx_DMA Channel 4.
Definition: IfxDma_cfg.h:92
IfxDma_ChannelId_39
Ifx_DMA Channel 39.
Definition: IfxDma_cfg.h:127
IfxDma_ChannelId_12
Ifx_DMA Channel 12.
Definition: IfxDma_cfg.h:100
IfxDma_ChannelId_11
Ifx_DMA Channel 11.
Definition: IfxDma_cfg.h:99
IfxDma_ChannelId_14
Ifx_DMA Channel 14.
Definition: IfxDma_cfg.h:102
IfxDma_ChannelId_36
Ifx_DMA Channel 36.
Definition: IfxDma_cfg.h:124
IfxDma_ChannelId_17
Ifx_DMA Channel 17.
Definition: IfxDma_cfg.h:105
IfxDma_ChannelId_8
Ifx_DMA Channel 8.
Definition: IfxDma_cfg.h:96
IfxDma_ChannelId_23
Ifx_DMA Channel 23.
Definition: IfxDma_cfg.h:111
IfxDma_ChannelId_20
Ifx_DMA Channel 20.
Definition: IfxDma_cfg.h:108
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:87
IfxDma_ChannelId_9
Ifx_DMA Channel 9.
Definition: IfxDma_cfg.h:97
IfxDma_ChannelId_19
Ifx_DMA Channel 19.
Definition: IfxDma_cfg.h:107
IfxDma_ChannelId_35
Ifx_DMA Channel 35.
Definition: IfxDma_cfg.h:123
IfxDma_ChannelId_25
Ifx_DMA Channel 25.
Definition: IfxDma_cfg.h:113
IfxDma_ChannelId_38
Ifx_DMA Channel 38.
Definition: IfxDma_cfg.h:126


iLLD_TC26B: IfxDsadc.c Source File

  • Dsadc
  • Std
IfxDsadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc.c
3 * \brief DSADC basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxDsadc.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 volatile Ifx_SRC_SRCR *IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
36 {
37 return (volatile Ifx_SRC_SRCR *)((uint32)&(MODULE_SRC.DSADC.DSADC0.SRA) + 8 * channel);
38 }
39
40
41 float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
42 {
43 float32 frequency = IfxDsadc_getMainCombOutFreq(dsadc, channel);
44
45 frequency = frequency / ((float32)1.0 + dsadc->CH[channel].IWCTR.B.NVALINT);
46 Ifx_DSADC_CH_FCFGM fcfgm = dsadc->CH[channel].FCFGM;
47
48 if (fcfgm.B.FIR0EN != 0)
49 {
50 frequency = frequency / 2;
51 }
52
53 if (fcfgm.B.FIR1EN != 0)
54 {
55 frequency = frequency / 2;
56 }
57
58 return frequency;
59 }
60
61
62 float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
63 {
64 float32 frequency = IfxDsadc_getModulatorClockFreq(dsadc, channel);
65
66 return frequency / ((float32)1.0 + dsadc->CH[channel].FCFGC.B.CFMDF);
67 }
68
69
70 float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
71 {
72 Ifx_DSADC_CH_FCFGC fcfgc = dsadc->CH[channel].FCFGC;
73 Ifx_DSADC_CH_FCFGM fcfgm = dsadc->CH[channel].FCFGM;
74 Ifx_DSADC_CH_DICFG dicfg = dsadc->CH[channel].DICFG;
75 Ifx_DSADC_CH_IWCTR iwctr = dsadc->CH[channel].IWCTR;
76 float32 tsMod = 1.0 / IfxDsadc_getModulatorClockFreq(dsadc, channel);
77 float32 tsCic = tsMod * (1 + fcfgc.B.CFMDF);
78 float32 tsFir0 = tsCic * (1 + fcfgm.B.FIR0EN);
79 float32 tsFir1 = tsFir0 * (1 + fcfgm.B.FIR1EN);
80
81 float32 gdDsA = (7 + 1) * tsMod;
82 float32 cicN = (1 + fcfgc.B.CFMDF);
83 float32 cick = (1 + fcfgc.B.CFMC);
84 float32 gdCic = tsMod * ((cick < 4) ? (0.5 * cick * (cicN - 1.0)) : ((2.0 * cicN) - 1.0));
85 float32 gdFir0 = (fcfgm.B.FIR0EN != 0) ? ((3.5 + (3.0 / cicN)) * tsCic) : 0.0;
86 float32 gdFir1;
87
88 if (fcfgm.B.FIR0EN)
89 {
90 gdFir1 = (fcfgm.B.FIR1EN != 0) ? (0.5 * (28.0 + (5.0 / cicN)) * tsFir0) : 0.0;
91 }
92 else
93 {
94 gdFir1 = (fcfgm.B.FIR1EN != 0) ? ((28.0 + (5.0 / cicN)) * tsFir0) : 0.0;
95 }
96
97 float32 gdInt = (dicfg.B.ITRMODE == IfxDsadc_IntegratorTrigger_bypassed) ? 0 : ((iwctr.B.NVALINT) * tsFir1);
98
99 return gdDsA + gdCic + gdFir0 + gdFir1 + gdInt;
100 }
101
102
103 volatile Ifx_SRC_SRCR *IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
104 {
105 return (volatile Ifx_SRC_SRCR *)((uint32)&(MODULE_SRC.DSADC.DSADC0.SRM) + 8 * channel);
106 }
107
108
109 float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
110 {
111 float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(dsadc);
112
113 return sourceFreq / ((dsadc->CH[channel].MODCFG.B.DIVM + 1) * 2);
114 }
115
116
117 float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
118 {
119 float32 result;
120
121 switch (dsadc->GLOBCFG.B.MCSEL)
122 {
123 case IfxDsadc_ModulatorClock_fOSC0:
124 result = IfxScuCcu_getOsc0Frequency();
125 break;
126 case IfxDsadc_ModulatorClock_fERAY:
127 result = IfxScuCcu_getPllErayFrequency();
128 break;
129 case IfxDsadc_ModulatorClock_fDSD:
130 result = IfxScuCcu_getSpbFrequency();
131 break;
132 default:
133 result = 0;
134 break;
135 }
136
137 return result;
138 }
139
140
141 void IfxDsadc_resetModule(Ifx_DSADC *dsadc)
142 {
143 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
144
145 IfxScuWdt_clearCpuEndinit(passwd);
146 dsadc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
147 dsadc->KRST1.B.RST = 1;
148 IfxScuWdt_setCpuEndinit(passwd);
149
150 while (0 == dsadc->KRST0.B.RSTSTAT) /* Wait until reset is executed */
151
152 {}
153
154 IfxScuWdt_clearCpuEndinit(passwd);
155 dsadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
156 IfxScuWdt_setCpuEndinit(passwd);
157 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:120
IfxDsadc_getMainSrc
volatile Ifx_SRC_SRCR * IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxDsadc.c:103
IfxScuCcu_getPllErayFrequency
float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:440
IfxDsadc_getMainGroupDelay
float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds.
Definition: IfxDsadc.c:70
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxDsadc_getIntegratorOutFreq
float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz.
Definition: IfxDsadc.c:41
IfxDsadc_ModulatorClock_fOSC0
f_osc0 clock selected
Definition: IfxDsadc.h:277
IfxDsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxDsadc.h:221
IfxDsadc_ModulatorClock_fERAY
f_eray clock selected
Definition: IfxDsadc.h:276
IfxDsadc_getMainCombOutFreq
float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz.
Definition: IfxDsadc.c:62
IfxScuCcu_getOsc0Frequency
float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:412
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxDsadc_getModulatorInputClockFreq
float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz.
Definition: IfxDsadc.c:117
IfxDsadc_getAuxSrc
volatile Ifx_SRC_SRCR * IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxDsadc.c:35
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxDsadc_ModulatorClock_fDSD
f_dsd clock selected
Definition: IfxDsadc.h:275
IfxDsadc_getModulatorClockFreq
float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz.
Definition: IfxDsadc.c:109
IfxDsadc_resetModule
void IfxDsadc_resetModule(Ifx_DSADC *dsadc)
resets the DSADC kernel
Definition: IfxDsadc.c:141
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxDsadc.h
DSADC basic functionality.


iLLD_TC26B: IfxDsadc.h Source File

  • Dsadc
  • Std
IfxDsadc.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc.h
3 * \brief DSADC basic functionality
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dsadc_Std_Enum Enumerations
25 * \ingroup IfxLld_Dsadc_Std
26 * \defgroup IfxLld_Dsadc_Std_Operative Operative Functions
27 * \ingroup IfxLld_Dsadc_Std
28 * \defgroup IfxLld_Dsadc_Std_Support Support Functions
29 * \ingroup IfxLld_Dsadc_Std
30 * \defgroup IfxLld_Dsadc_Std_Interrupt Interrupt Functions
31 * \ingroup IfxLld_Dsadc_Std
32 * \defgroup IfxLld_Dsadc_Std_IO IO Pin Configuration Functions
33 * \ingroup IfxLld_Dsadc_Std
34 */
35
36 #ifndef IFXDSADC_H
37 #define IFXDSADC_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "_Impl/IfxDsadc_cfg.h"
44 #include "Src/Std/IfxSrc.h"
45 #include "Scu/Std/IfxScuCcu.h"
46 #include "_PinMap/IfxDsadc_PinMap.h"
47 #include "IfxDsadc_reg.h"
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49
50 /******************************************************************************/
51 /*--------------------------------Enumerations--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_Dsadc_Std_Enum
55 * \{ */
56 /** \brief Comb Filter (auxiliary) shift control\n
57 * Definition in Ifx_DSADC.FCFGA.B.AFSC
58 */
59 typedef enum
60 {
61 IfxDsadc_AuxCombFilterShift_noShift = 0, /**< \brief no shift, use full range */
62 IfxDsadc_AuxCombFilterShift_shiftBy1 = 1, /**< \brief Shift by 1 */
63 IfxDsadc_AuxCombFilterShift_shiftBy2 = 2, /**< \brief Shift by 2 */
64 IfxDsadc_AuxCombFilterShift_shiftBy3 = 3 /**< \brief Shift by 3 */
65 } IfxDsadc_AuxCombFilterShift;
66
67 /** \brief Comb Filter (auxiliary) configuration/type\n
68 * Definition in Ifx_DSADC.FCFGA.B.CFAC
69 */
70 typedef enum
71 {
72 IfxDsadc_AuxCombFilterType_comb1 = 0, /**< \brief CIC1 */
73 IfxDsadc_AuxCombFilterType_comb2 = 1, /**< \brief CIC2 */
74 IfxDsadc_AuxCombFilterType_comb3 = 2, /**< \brief CIC3 */
75 IfxDsadc_AuxCombFilterType_combF = 3 /**< \brief CICF */
76 } IfxDsadc_AuxCombFilterType;
77
78 /** \brief Service request generation (auxiliary)\n
79 * Definition in Ifx_DSADC.FCFGA.B.ESEL
80 */
81 typedef enum
82 {
83 IfxDsadc_AuxEvent_everyNewResult = 0, /**< \brief Always, for each new result value */
84 IfxDsadc_AuxEvent_insideBoundary = 1, /**< \brief If result is inside the boundary band */
85 IfxDsadc_AuxEvent_outsideBoundary = 2 /**< \brief If result is outside the boundary band */
86 } IfxDsadc_AuxEvent;
87
88 /** \brief Service request generation (auxiliary)\n
89 * Definition in Ifx_DSADC.FCFGA.B.EGT
90 */
91 typedef enum
92 {
93 IfxDsadc_AuxGate_definedByESEL = 0, /**< \brief Separate: generate events according to ESEL */
94 IfxDsadc_AuxGate_coupledToIntegrator = 1 /**< \brief Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDIS */
95 } IfxDsadc_AuxGate;
96
97 /** \brief Service request generation (auxiliary)\n
98 * Definition in Ifx_DSADC.FCFGA.B.SRGA
99 */
100 typedef enum
101 {
102 IfxDsadc_AuxServiceRequest_never = 0, /**< \brief Never, service requests disabled */
103 IfxDsadc_AuxServiceRequest_auxFilter = 1, /**< \brief Auxiliary filter: As selected by bitfield ESEL (\ref IfxDsadc_AuxEvent) */
104 IfxDsadc_AuxServiceRequest_altSource = 2 /**< \brief Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5) */
105 } IfxDsadc_AuxServiceRequest;
106
107 /** \brief Carrier generation mode\n
108 * Definition in Ifx_DSADC.CGCFG.B.CGMOD
109 */
110 typedef enum
111 {
112 IfxDsadc_CarrierWaveformMode_stopped = 0, /**< \brief Carrier Generator stopped */
113 IfxDsadc_CarrierWaveformMode_square = 1, /**< \brief Carrier Generator generates square wave */
114 IfxDsadc_CarrierWaveformMode_triangle = 2, /**< \brief Carrier Generator generates triangle wave */
115 IfxDsadc_CarrierWaveformMode_sine = 3 /**< \brief Carrier Generator generates sine wave */
116 } IfxDsadc_CarrierWaveformMode;
117
118 /** \brief Specifies the channel Index
119 */
120 typedef enum
121 {
122 IfxDsadc_ChannelId_0 = 0, /**< \brief Specifies the channel Index 0 */
123 IfxDsadc_ChannelId_2 = 2, /**< \brief Specifies the channel Index 2 */
124 IfxDsadc_ChannelId_3 = 3 /**< \brief Specifies the channel Index 3 */
125 } IfxDsadc_ChannelId;
126
127 /** \brief Modulator common mode voltage selection\n
128 * Definition in Ifx_DSADC.MODCFGx.B.CMVS
129 */
130 typedef enum
131 {
132 IfxDsadc_CommonModeVoltage_a = 0, /**< \brief VCM = VAREF / 3.03 (1.65 V for VAREF = 5.0 V), recommended for VDDM = 3.3 V1.65V */
133 IfxDsadc_CommonModeVoltage_b = 1, /**< \brief VCM = VAREF / 2.27 (2.2 V for VAREF = 5.0 V), recommended for low distortion of AC-coupled signals */
134 IfxDsadc_CommonModeVoltage_c = 2 /**< \brief VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals */
135 } IfxDsadc_CommonModeVoltage;
136
137 /** \brief FIR data shift control\n
138 * Selects the displacement caused by the data shifter at the FIR filter output\n
139 * Definition in Ifx_DSADC.FCFGM.B.DSH
140 */
141 typedef enum
142 {
143 IfxDsadc_FirDataShift_noShift = 0, /**< \brief no shift, use full range */
144 IfxDsadc_FirDataShift_shiftBy1 = 1, /**< \brief Shift by 1 */
145 IfxDsadc_FirDataShift_shiftBy2 = 2, /**< \brief Shift by 2 */
146 IfxDsadc_FirDataShift_shiftBy3 = 3 /**< \brief Shift by 3 */
147 } IfxDsadc_FirDataShift;
148
149 /** \brief FIR shift control\n
150 * Selects the displacement caused by the data shifter inbetween the FIR filter blocks.\n
151 * Definition in Ifx_DSADC.FCFGM.B.FSH
152 */
153 typedef enum
154 {
155 IfxDsadc_FirInternalShift_noShift = 0, /**< \brief no shift, use full range */
156 IfxDsadc_FirInternalShift_shiftBy1 = 1 /**< \brief Shift by 1 */
157 } IfxDsadc_FirInternalShift;
158
159 /** \brief Modulator configuration of positive/negative input line\n
160 * Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN
161 */
162 typedef enum
163 {
164 IfxDsadc_InputConfig_inputPin = 0, /**< \brief Modulator input connected to external pin */
165 IfxDsadc_InputConfig_supplyVoltage = 1, /**< \brief Modulator input connected to supply voltage V_ddm */
166 IfxDsadc_InputConfig_commonModeVoltage = 2, /**< \brief Modulator input connected to common mode voltage V_cm */
167 IfxDsadc_InputConfig_referenceGround = 3 /**< \brief Modulator input connected to reference ground V_ref */
168 } IfxDsadc_InputConfig;
169
170 /** \brief Demodulator input data source selection\n
171 * Definition in Ifx_DSADC.DICFG.B.DSRC
172 */
173 typedef enum
174 {
175 IfxDsadc_InputDataSource_onChipStandAlone = 0, /**< \brief On-chip modulator, standalone (3rd order) */
176 IfxDsadc_InputDataSource_onChipCombined = 1, /**< \brief On-chip modulator, yield (2nd order) */
177 IfxDsadc_InputDataSource_directInputA = 2, /**< \brief External, from input A, direct */
178 IfxDsadc_InputDataSource_invertedInputA = 3, /**< \brief External, from input A, inverted */
179 IfxDsadc_InputDataSource_directInputB = 4, /**< \brief External, from input B, direct */
180 IfxDsadc_InputDataSource_invertedInputB = 5 /**< \brief External, from input B, inverted */
181 } IfxDsadc_InputDataSource;
182
183 /** \brief Modulator gain select of analog input path\n
184 * Definition in Ifx_DSADC.MODCFGx.B.GAINSEL
185 */
186 typedef enum
187 {
188 IfxDsadc_InputGain_factor1 = 0, /**< \brief Input gain factor: 1 */
189 IfxDsadc_InputGain_factor2 = 1, /**< \brief Input gain factor: 2 */
190 IfxDsadc_InputGain_factor4 = 2, /**< \brief Input gain factor: 4 */
191 IfxDsadc_InputGain_factor8 = 3, /**< \brief Input gain factor: 8 */
192 IfxDsadc_InputGain_factor16 = 4 /**< \brief Input gain factor: 16 */
193 } IfxDsadc_InputGain;
194
195 /** \brief Modulator input pin selection\n
196 * Definition in Ifx_DSADC.MODCFGx.B.INMUX
197 */
198 typedef enum
199 {
200 IfxDsadc_InputPin_a = 0, /**< \brief Pin A connected to modulator input */
201 IfxDsadc_InputPin_b = 1, /**< \brief Pin B connected to modulator input */
202 IfxDsadc_InputPin_c = 2, /**< \brief Pin C connected to modulator input */
203 IfxDsadc_InputPin_d = 3 /**< \brief Pin D connected to modulator input */
204 } IfxDsadc_InputPin;
205
206 /** \brief Integrator window size\n
207 * Definition in Ifx_DSADC.IWCTR.B.IWS
208 */
209 typedef enum
210 {
211 IfxDsadc_IntegrationWindowSize_internalControl = 0, /**< \brief Internal control: stop integrator after REPVAL+1 integration cycles */
212 IfxDsadc_IntegrationWindowSize_externalControl = 1 /**< \brief External control: stop integrator when bit INTEN becomes 0 */
213 } IfxDsadc_IntegrationWindowSize;
214
215 /** \brief Integrator trigger mode\n
216 * NOTE: switch-first to bypassed before using other mode\n
217 * Definition in Ifx_DSADC.DICFG.B.ITRMODE
218 */
219 typedef enum
220 {
221 IfxDsadc_IntegratorTrigger_bypassed = 0, /**< \brief No integration trigger, integrator bypassed */
222 IfxDsadc_IntegratorTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
223 IfxDsadc_IntegratorTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
224 IfxDsadc_IntegratorTrigger_alwaysActive = 3 /**< \brief No trigger, integrator active all the time */
225 } IfxDsadc_IntegratorTrigger;
226
227 /** \brief Low power supply voltage select\n
228 * Definition in Ifx_DSADC.GLOBCFG.B.LOSUP
229 */
230 typedef enum
231 {
232 IfxDsadc_LowPowerSupply_5V = 0, /**< \brief Supply Voltage for Analog Circuitry set to 5V */
233 IfxDsadc_LowPowerSupply_3_3V = 1 /**< \brief Supply Voltage for Analog Circuitry set to 3.3V */
234 } IfxDsadc_LowPowerSupply;
235
236 /** \brief Comb Filter (Main Chain) shift control\n
237 * Definition in Ifx_DSADC.FCFGC.B.MFSC
238 */
239 typedef enum
240 {
241 IfxDsadc_MainCombFilterShift_noShift = 0, /**< \brief no shift, use full range */
242 IfxDsadc_MainCombFilterShift_shiftBy1 = 1, /**< \brief Shift by 1 */
243 IfxDsadc_MainCombFilterShift_shiftBy2 = 2, /**< \brief Shift by 2 */
244 IfxDsadc_MainCombFilterShift_shiftBy3 = 3 /**< \brief Shift by 3 */
245 } IfxDsadc_MainCombFilterShift;
246
247 /** \brief Comb Filter (Main Chain) configuration/type\n
248 * Definition in Ifx_DSADC.FCFGC.B.CFMC
249 */
250 typedef enum
251 {
252 IfxDsadc_MainCombFilterType_comb1 = 0, /**< \brief CIC1 */
253 IfxDsadc_MainCombFilterType_comb2 = 1, /**< \brief CIC2 */
254 IfxDsadc_MainCombFilterType_comb3 = 2, /**< \brief CIC3 */
255 IfxDsadc_MainCombFilterType_combF = 3 /**< \brief CICF */
256 } IfxDsadc_MainCombFilterType;
257
258 /** \brief Service request generation (main chain)\n
259 * Definition in Ifx_DSADC.FCFGC.B.SRGM
260 */
261 typedef enum
262 {
263 IfxDsadc_MainServiceRequest_never = 0, /**< \brief Never, service requests disabled */
264 IfxDsadc_MainServiceRequest_highGateSignal = 1, /**< \brief While gate (selected trigger signal) is high */
265 IfxDsadc_MainServiceRequest_lowGateSignal = 2, /**< \brief While gate (selected trigger signal) is low */
266 IfxDsadc_MainServiceRequest_everyNewResult = 3 /**< \brief Always, for each new result value */
267 } IfxDsadc_MainServiceRequest;
268
269 /** \brief Modulator clock select\n
270 * Definition in Ifx_DSADC.GLOBCFG.B.MCSEL
271 */
272 typedef enum
273 {
274 IfxDsadc_ModulatorClock_off = 0, /**< \brief Internal clock off, no source selected */
275 IfxDsadc_ModulatorClock_fDSD = 1, /**< \brief f_dsd clock selected */
276 IfxDsadc_ModulatorClock_fERAY = 2, /**< \brief f_eray clock selected */
277 IfxDsadc_ModulatorClock_fOSC0 = 3 /**< \brief f_osc0 clock selected */
278 } IfxDsadc_ModulatorClock;
279
280 /** \brief Modulator divider factor for modulator clock\n
281 * Definition in Ifx_DSADC.MODCFGx.B.DIVM
282 */
283 typedef enum
284 {
285 IfxDsadc_ModulatorClockDivider_div2 = 0, /**< \brief f_mod = f_clk / 2 */
286 IfxDsadc_ModulatorClockDivider_div4, /**< \brief f_mod = f_clk / 4 */
287 IfxDsadc_ModulatorClockDivider_div6, /**< \brief f_mod = f_clk / 6 */
288 IfxDsadc_ModulatorClockDivider_div8, /**< \brief f_mod = f_clk / 8 */
289 IfxDsadc_ModulatorClockDivider_div10, /**< \brief f_mod = f_clk / 10 */
290 IfxDsadc_ModulatorClockDivider_div12, /**< \brief f_mod = f_clk / 12 */
291 IfxDsadc_ModulatorClockDivider_div14, /**< \brief f_mod = f_clk / 14 */
292 IfxDsadc_ModulatorClockDivider_div16, /**< \brief f_mod = f_clk / 16 */
293 IfxDsadc_ModulatorClockDivider_div18, /**< \brief f_mod = f_clk / 18 */
294 IfxDsadc_ModulatorClockDivider_div20, /**< \brief f_mod = f_clk / 20 */
295 IfxDsadc_ModulatorClockDivider_div22, /**< \brief f_mod = f_clk / 22 */
296 IfxDsadc_ModulatorClockDivider_div24, /**< \brief f_mod = f_clk / 24 */
297 IfxDsadc_ModulatorClockDivider_div26, /**< \brief f_mod = f_clk / 26 */
298 IfxDsadc_ModulatorClockDivider_div28, /**< \brief f_mod = f_clk / 28 */
299 IfxDsadc_ModulatorClockDivider_div30, /**< \brief f_mod = f_clk / 30 */
300 IfxDsadc_ModulatorClockDivider_div32 /**< \brief f_mod = f_clk / 32 */
301 } IfxDsadc_ModulatorClockDivider;
302
303 /** \brief Rectifier sign source\n
304 * Selects the sign signal that is to be delayed.\n
305 * Definition in Ifx_DSADC.RECT.B.SSRC
306 */
307 typedef enum
308 {
309 IfxDsadc_RectifierSignSource_onChipGenerator = 0, /**< \brief On-chip carrier generator */
310 IfxDsadc_RectifierSignSource_nextChannel = 1, /**< \brief Sign of result of next channel */
311 IfxDsadc_RectifierSignSource_externalA = 2, /**< \brief External sign signal A */
312 IfxDsadc_RectifierSignSource_externalB = 3 /**< \brief External sign signal B */
313 } IfxDsadc_RectifierSignSource;
314
315 /** \brief Demodulator sample clock source select\n
316 * Definition in Ifx_DSADC.DICFG.B.CSRC
317 */
318 typedef enum
319 {
320 IfxDsadc_SampleClockSource_internal = 0, /**< \brief Internal clock */
321 IfxDsadc_SampleClockSource_inputA = 1, /**< \brief External clock, from Input A */
322 IfxDsadc_SampleClockSource_inputB = 2, /**< \brief External clock, from Input B */
323 IfxDsadc_SampleClockSource_inputC = 3 /**< \brief External clock, from Input C */
324 } IfxDsadc_SampleClockSource;
325
326 /** \brief Demodulator data strobe generation mode\n
327 * Definition in Ifx_DSADC.DICFG.B.STROBE
328 */
329 typedef enum
330 {
331 IfxDsadc_SampleStrobe_noDataStrobe = 0, /**< \brief No data strobe */
332 IfxDsadc_SampleStrobe_sampleOnRisingEdge = 1, /**< \brief Direct clock, a sample trigger is generated at each rising clock edge */
333 IfxDsadc_SampleStrobe_sampleOnFallingEdge = 2, /**< \brief Direct clock, a sample trigger is generated at each falling clock edge */
334 IfxDsadc_SampleStrobe_sampleOnBothEdges = 3, /**< \brief Double data, a sample trigger is generated at each rising and falling clock edge */
335 IfxDsadc_SampleStrobe_reserved = 4, /**< \brief don't use */
336 IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges = 5, /**< \brief Double clock, a sample trigger is generated at every 2nd rising clock edge */
337 IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges = 6 /**< \brief Double clock, a sample trigger is generated at every 2nd falling clock edge */
338 } IfxDsadc_SampleStrobe;
339
340 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
341 * Definition in Ifx_DSADC.CLC.B.EDIS
342 */
343 typedef enum
344 {
345 IfxDsadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
346 IfxDsadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
347 } IfxDsadc_SleepMode;
348
349 /** \brief Timestamp trigger mode\n
350 * Definition in Ifx_DSADC.DICFG.B.TSTRMODE
351 */
352 typedef enum
353 {
354 IfxDsadc_TimestampTrigger_noTrigger = 0, /**< \brief No timestamp trigger */
355 IfxDsadc_TimestampTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
356 IfxDsadc_TimestampTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
357 IfxDsadc_TimestampTrigger_eachEdge = 3 /**< \brief Trigger event upon each edge */
358 } IfxDsadc_TimestampTrigger;
359
360 /** \brief Trigger select\n
361 * Definition in Ifx_DSADC.DICFG.B.TRSEL
362 */
363 typedef enum
364 {
365 IfxDsadc_TriggerInput_a = 0, /**< \brief dsadc trig 0 */
366 IfxDsadc_TriggerInput_b = 1, /**< \brief dsadc trig 1 */
367 IfxDsadc_TriggerInput_c = 2, /**< \brief vadc trig 0 */
368 IfxDsadc_TriggerInput_d = 3, /**< \brief vadc trig 1 */
369 IfxDsadc_TriggerInput_e = 4, /**< \brief external pin e */
370 IfxDsadc_TriggerInput_f = 5, /**< \brief external pin f */
371 IfxDsadc_TriggerInput_g = 6,
372 IfxDsadc_TriggerInput_h = 7
373 } IfxDsadc_TriggerInput;
374
375 /** \} */
376
377 /** \addtogroup IfxLld_Dsadc_Std_Operative
378 * \{ */
379
380 /******************************************************************************/
381 /*-------------------------Inline Function Prototypes-------------------------*/
382 /******************************************************************************/
383
384 /** \brief Sets the sensitivity of the module to sleep signal
385 * \param dsadc pointer to DSADC registers
386 * \param mode mode selection (enable/disable)
387 * \return None
388 */
389 IFX_INLINE void IfxDsadc_setSleepMode(Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode);
390
391 /** \brief Enables the conversion of multiple channels
392 * \param dsadc Pointer to the DSADC register space
393 * \param modulatorMask the modulator which should be running (bitwise selection)
394 * \param channelMask the channels which should be scanned (bitwise selection)
395 * \return None
396 *
397 * \code
398 * // enable the conversion of all 6 DSADC channels
399 * IfxDsadc_startScan(&MODULE_DSADC, 0x3FU, 0x3FU);
400 * // results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)
401 * \endcode
402 *
403 */
404 IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask);
405
406 /** \brief Disables the conversion of multiple channels
407 * \param dsadc Pointer to the DSADC register space
408 * \param modulatorMask the modulator which should be disabled (bitwise selection)
409 * \return None
410 *
411 * \code
412 * // disable the modulators of all 6 DSADC channels
413 * IfxDsadc_stopScan(&MODULE_DSADC, 0x3FU);
414 * \endcode
415 *
416 */
417 IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask);
418
419 /******************************************************************************/
420 /*-------------------------Global Function Prototypes-------------------------*/
421 /******************************************************************************/
422
423 /** \brief resets the DSADC kernel
424 * \param dsadc pointer to DSADC registers
425 * \return None
426 */
427 IFX_EXTERN void IfxDsadc_resetModule(Ifx_DSADC *dsadc);
428
429 /** \} */
430
431 /** \addtogroup IfxLld_Dsadc_Std_Support
432 * \{ */
433
434 /******************************************************************************/
435 /*-------------------------Inline Function Prototypes-------------------------*/
436 /******************************************************************************/
437
438 /** \brief Get result from the auxiliary chain
439 * \param dsadc Pointer to the DSADC register space
440 * \param channel Channel Id
441 * \return result from the auxiliary chain
442 */
443 IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
444
445 /** \brief Get the main comb decimation factor
446 * \param dsadc Pointer to the DSADC register space
447 * \param channel Channel Id
448 * \return the main comb decimation factor
449 */
450 IFX_INLINE uint16 IfxDsadc_getMainCombDecimation(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
451
452 /** \brief Get result from the main chain
453 * \param dsadc Pointer to the DSADC register space
454 * \param channel Channel Id
455 * \return result from the main chain
456 */
457 IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
458
459 /** \brief Return TRUE if DSADC module is enabled
460 * \param dsadc Pointer to the DSADC register space
461 * \return TRUE if DSADC module is enabled
462 */
463 IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc);
464
465 /** \brief Set the carrier waveform mode
466 * \param dsadc Pointer to the DSADC register space
467 * \param waveformMode the waveform mode
468 * \return None
469 */
470 IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode);
471
472 /******************************************************************************/
473 /*-------------------------Global Function Prototypes-------------------------*/
474 /******************************************************************************/
475
476 /** \brief Get the sample frequency of the integrator output in Hz
477 * \param dsadc Pointer to the DSADC register space
478 * \param channel Channel Id
479 * \return frequency in Hz
480 */
481 IFX_EXTERN float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
482
483 /** \brief Get the sample frequency of the main COMB filter output in Hz
484 * \param dsadc Pointer to the DSADC register space
485 * \param channel Channel Id
486 * \return frequency in Hz
487 */
488 IFX_EXTERN float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
489
490 /** \brief Estimate the group delay of main-chain filters in seconds
491 * \param dsadc Pointer to the DSADC register space
492 * \param channel Channel Id
493 * \return delay in seconds
494 */
495 IFX_EXTERN float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
496
497 /** \brief Get the modulator clock frequency in Hz
498 * \param dsadc Pointer to the DSADC register space
499 * \param channel Channel Id
500 * \return frequency in Hz
501 */
502 IFX_EXTERN float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
503
504 /** \brief Get the input frequency of DSADC in Hz
505 * \param dsadc Pointer to the DSADC register space
506 * \return frequency in Hz
507 */
508 IFX_EXTERN float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc);
509
510 /** \} */
511
512 /** \addtogroup IfxLld_Dsadc_Std_Interrupt
513 * \{ */
514
515 /******************************************************************************/
516 /*-------------------------Global Function Prototypes-------------------------*/
517 /******************************************************************************/
518
519 /** \brief Address/pointer to the interrupt source register
520 * \param dsadc Pointer to the DSADC register space
521 * \param channel Channel Id
522 * \return Address/pointer to the interrupt source register
523 */
524 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
525
526 /** \brief Get the interrupt source register for a Main event
527 * \param dsadc Pointer to the DSADC register space
528 * \param channel Channel Id
529 * \return Address/pointer to the interrupt source register
530 */
531 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
532
533 /** \} */
534
535 /** \addtogroup IfxLld_Dsadc_Std_IO
536 * \{ */
537
538 /******************************************************************************/
539 /*-------------------------Inline Function Prototypes-------------------------*/
540 /******************************************************************************/
541
542 /** \brief Initializes a CGPWM output
543 * \param cgPwm the CGPWM Pin which should be configured
544 * \param pinMode the pin output mode which should be configured
545 * \param padDriver the pad driver mode which should be configured
546 * \return None
547 */
548 IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
549
550 /** \brief Initializes a CIN input
551 * \param cIn the CIN Pin which should be configured
552 * \param cInMode the pin input mode which should be configured
553 * \param padDriver Pad Driver Configuration
554 * \return None
555 */
556 IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver);
557
558 /** \brief Initializes a COUT output
559 * \param cout the COUT Pin which should be configured
560 * \param pinMode the pin output mode which should be configured
561 * \param padDriver the pad driver mode which should be configured
562 * \return None
563 */
564 IFX_INLINE void IfxDsadc_initCoutPin(const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
565
566 /** \brief Initializes a DIN input
567 * \param dIn the DIN Pin which should be configured
568 * \param dInMode the pin input mode which should be configured
569 * \param padDriver Pad Driver Configuration
570 * \return None
571 */
572 IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver);
573
574 /** \brief Initializes a DS input
575 * \param dsn the DSN Pin which should be configured
576 * \param pinMode the pin input mode which should be configured
577 * \param padDriver Pad Driver Configuration
578 * \return None
579 */
580 IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
581
582 /** \brief Initializes a DS input
583 * \param dsp the DSP Pin which should be configured
584 * \param pinMode the pin input mode which should be configured
585 * \param padDriver Pad Driver Configuration
586 * \return None
587 */
588 IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
589
590 /** \brief Initializes a ITR input
591 * \param itr the ITR Pin which should be configured
592 * \param itrMode the pin input mode which should be configured
593 * \param padDriver Pad Driver Configuration
594 * \return None
595 */
596 IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver);
597
598 /** \brief Initializes a SG input
599 * \param sg the SG Pin which should be configured
600 * \param pinMode the pin input mode which should be configured
601 * \param padDriver Pad Driver Configuration
602 * \return None
603 */
604 IFX_INLINE void IfxDsadc_initSgPin(const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
605
606 /** \} */
607
608 /******************************************************************************/
609 /*---------------------Inline Function Implementations------------------------*/
610 /******************************************************************************/
611
612 IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
613 {
614 return (sint16)(dsadc->CH[channel].RESA.B.RESULT);
615 }
616
617
618 IFX_INLINE uint16 IfxDsadc_getMainCombDecimation(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
619 {
620 return (uint16)(1U + dsadc->CH[channel].FCFGC.B.CFMDF);
621 }
622
623
624 IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
625 {
626 return (sint16)(dsadc->CH[channel].RESM.B.RESULT);
627 }
628
629
630 IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
631 {
632 IfxPort_setPinModeOutput(cgPwm->pin.port, cgPwm->pin.pinIndex, pinMode, cgPwm->select);
633 IfxPort_setPinPadDriver(cgPwm->pin.port, cgPwm->pin.pinIndex, padDriver);
634 }
635
636
637 IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
638 {
639 if (cIn->pin.port != NULL_PTR)
640 {
641 IfxPort_setPinModeInput(cIn->pin.port, cIn->pin.pinIndex, cInMode);
642 IfxPort_setPinPadDriver(cIn->pin.port, cIn->pin.pinIndex, padDriver);
643 }
644 }
645
646
647 IFX_INLINE void IfxDsadc_initCoutPin(const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
648 {
649 if (cout->pin.port != NULL_PTR)
650 {
651 IfxPort_setPinModeOutput(cout->pin.port, cout->pin.pinIndex, pinMode, cout->select);
652 IfxPort_setPinPadDriver(cout->pin.port, cout->pin.pinIndex, padDriver);
653 }
654 }
655
656
657 IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
658 {
659 if (dIn->pin.port != NULL_PTR)
660 {
661 IfxPort_setPinModeInput(dIn->pin.port, dIn->pin.pinIndex, dInMode);
662 IfxPort_setPinPadDriver(dIn->pin.port, dIn->pin.pinIndex, padDriver);
663 }
664 }
665
666
667 IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
668 {
669 if (dsn->pin.port != NULL_PTR)
670 {
671 IfxPort_setPinModeInput(dsn->pin.port, dsn->pin.pinIndex, pinMode);
672 IfxPort_setPinPadDriver(dsn->pin.port, dsn->pin.pinIndex, padDriver);
673 }
674 }
675
676
677 IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
678 {
679 if (dsp->pin.port != NULL_PTR)
680 {
681 IfxPort_setPinModeInput(dsp->pin.port, dsp->pin.pinIndex, pinMode);
682 IfxPort_setPinPadDriver(dsp->pin.port, dsp->pin.pinIndex, padDriver);
683 }
684 }
685
686
687 IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
688 {
689 if (itr->pin.port != NULL_PTR)
690 {
691 IfxPort_setPinModeInput(itr->pin.port, itr->pin.pinIndex, itrMode);
692 IfxPort_setPinPadDriver(itr->pin.port, itr->pin.pinIndex, padDriver);
693 }
694 }
695
696
697 IFX_INLINE void IfxDsadc_initSgPin(const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
698 {
699 if (sg->pin.port != NULL_PTR)
700 {
701 IfxPort_setPinModeInput(sg->pin.port, sg->pin.pinIndex, pinMode);
702 IfxPort_setPinPadDriver(sg->pin.port, sg->pin.pinIndex, padDriver);
703 }
704 }
705
706
707 IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc)
708 {
709 return dsadc->CLC.B.DISS == 0;
710 }
711
712
713 IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
714 {
715 dsadc->CGCFG.B.CGMOD = waveformMode;
716 }
717
718
719 IFX_INLINE void IfxDsadc_setSleepMode(Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
720 {
721 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
722 IfxScuWdt_clearCpuEndinit(passwd);
723 dsadc->CLC.B.EDIS = mode;
724 IfxScuWdt_setCpuEndinit(passwd);
725 }
726
727
728 IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
729 {
730 dsadc->GLOBRC.U = dsadc->GLOBRC.U | ((modulatorMask << 16) | (channelMask));
731 }
732
733
734 IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask)
735 {
736 dsadc->GLOBRC.U &= ~(modulatorMask << 16);
737 }
738
739
740 #endif /* IFXDSADC_H */
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:84
IfxDsadc_TimestampTrigger_fallingEdge
Trigger event upon a falling edge.
Definition: IfxDsadc.h:355
IfxDsadc_InputConfig_inputPin
Modulator input connected to external pin.
Definition: IfxDsadc.h:164
IfxDsadc_TriggerInput_h
Definition: IfxDsadc.h:372
IfxDsadc_CommonModeVoltage_a
VCM = VAREF / 3.03 (1.65 V for VAREF = 5.0 V), recommended for VDDM = 3.3 V1.65V. ...
Definition: IfxDsadc.h:132
IfxDsadc_TimestampTrigger
IfxDsadc_TimestampTrigger
Timestamp trigger mode Definition in Ifx_DSADC.DICFG.B.TSTRMODE.
Definition: IfxDsadc.h:352
IfxDsadc_AuxGate_coupledToIntegrator
Coupled: generate events only when the integrator is enabled and after the discard phase defined by b...
Definition: IfxDsadc.h:94
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:120
IfxDsadc_TriggerInput_c
vadc trig 0
Definition: IfxDsadc.h:367
IfxDsadc_FirDataShift_shiftBy1
Shift by 1.
Definition: IfxDsadc.h:144
IfxDsadc_AuxCombFilterType
IfxDsadc_AuxCombFilterType
Comb Filter (auxiliary) configuration/type Definition in Ifx_DSADC.FCFGA.B.CFAC.
Definition: IfxDsadc.h:70
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:48
IfxDsadc_IntegratorTrigger_fallingEdge
Trigger event upon a falling edge.
Definition: IfxDsadc.h:222
IfxDsadc_ModulatorClockDivider_div20
f_mod = f_clk / 20
Definition: IfxDsadc.h:294
IfxDsadc_MainServiceRequest_highGateSignal
While gate (selected trigger signal) is high.
Definition: IfxDsadc.h:264
IfxDsadc_isModuleEnabled
IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc)
Return TRUE if DSADC module is enabled.
Definition: IfxDsadc.h:707
IfxDsadc_MainServiceRequest_never
Never, service requests disabled.
Definition: IfxDsadc.h:263
IfxDsadc_InputDataSource_invertedInputA
External, from input A, inverted.
Definition: IfxDsadc.h:178
IfxDsadc_getMainSrc
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxDsadc.c:103
IfxDsadc_MainCombFilterType_comb3
CIC3.
Definition: IfxDsadc.h:254
IfxDsadc_SleepMode
IfxDsadc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_DSADC.CLC.B.EDIS.
Definition: IfxDsadc.h:343
IfxDsadc_TriggerInput_f
external pin f
Definition: IfxDsadc.h:370
IfxDsadc_SampleStrobe_sampleOnFallingEdge
Direct clock, a sample trigger is generated at each falling clock edge.
Definition: IfxDsadc.h:333
IfxDsadc_getMainGroupDelay
IFX_EXTERN float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds.
Definition: IfxDsadc.c:70
IfxDsadc_InputConfig_supplyVoltage
Modulator input connected to supply voltage V_ddm.
Definition: IfxDsadc.h:165
IfxDsadc_InputPin
IfxDsadc_InputPin
Modulator input pin selection Definition in Ifx_DSADC.MODCFGx.B.INMUX.
Definition: IfxDsadc.h:198
IfxDsadc_CarrierWaveformMode_stopped
Carrier Generator stopped.
Definition: IfxDsadc.h:112
IfxDsadc_LowPowerSupply_5V
Supply Voltage for Analog Circuitry set to 5V.
Definition: IfxDsadc.h:232
IfxDsadc_InputDataSource_onChipCombined
On-chip modulator, yield (2nd order)
Definition: IfxDsadc.h:176
IfxDsadc_IntegratorTrigger_risingEdge
Trigger event upon a rising edge.
Definition: IfxDsadc.h:223
IfxDsadc_InputPin_a
Pin A connected to modulator input.
Definition: IfxDsadc.h:200
IfxDsadc_getAuxResult
IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the auxiliary chain.
Definition: IfxDsadc.h:612
IfxDsadc_ModulatorClockDivider_div26
f_mod = f_clk / 26
Definition: IfxDsadc.h:297
IfxDsadc_MainCombFilterShift_shiftBy2
Shift by 2.
Definition: IfxDsadc.h:243
IfxDsadc_RectifierSignSource_nextChannel
Sign of result of next channel.
Definition: IfxDsadc.h:310
IfxDsadc_AuxServiceRequest_auxFilter
Auxiliary filter: As selected by bitfield ESEL (IfxDsadc_AuxEvent)
Definition: IfxDsadc.h:103
IfxDsadc_AuxGate_definedByESEL
Separate: generate events according to ESEL.
Definition: IfxDsadc.h:93
IfxDsadc_setCarrierMode
IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
Set the carrier waveform mode.
Definition: IfxDsadc.h:713
IfxDsadc_AuxCombFilterShift_shiftBy2
Shift by 2.
Definition: IfxDsadc.h:63
IfxDsadc_FirDataShift_shiftBy3
Shift by 3.
Definition: IfxDsadc.h:146
IfxDsadc_initCoutPin
IFX_INLINE void IfxDsadc_initCoutPin(const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a COUT output.
Definition: IfxDsadc.h:647
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxDsadc_SampleStrobe_sampleOnBothEdges
Double data, a sample trigger is generated at each rising and falling clock edge. ...
Definition: IfxDsadc.h:334
IfxDsadc_ModulatorClockDivider_div6
f_mod = f_clk / 6
Definition: IfxDsadc.h:287
IfxDsadc_MainCombFilterShift
IfxDsadc_MainCombFilterShift
Comb Filter (Main Chain) shift control Definition in Ifx_DSADC.FCFGC.B.MFSC.
Definition: IfxDsadc.h:239
float32
float float32
Definition: Platform_Types.h:167
IfxDsadc_InputDataSource_onChipStandAlone
On-chip modulator, standalone (3rd order)
Definition: IfxDsadc.h:175
IfxDsadc_FirInternalShift_shiftBy1
Shift by 1.
Definition: IfxDsadc.h:156
IfxDsadc_AuxCombFilterShift
IfxDsadc_AuxCombFilterShift
Comb Filter (auxiliary) shift control Definition in Ifx_DSADC.FCFGA.B.AFSC.
Definition: IfxDsadc.h:59
IfxDsadc_MainCombFilterShift_noShift
no shift, use full range
Definition: IfxDsadc.h:241
IfxDsadc_SleepMode_disable
disables sleep mode
Definition: IfxDsadc.h:346
IfxDsadc_ModulatorClock_off
Internal clock off, no source selected.
Definition: IfxDsadc.h:274
IfxDsadc_getMainCombDecimation
IFX_INLINE uint16 IfxDsadc_getMainCombDecimation(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the main comb decimation factor.
Definition: IfxDsadc.h:618
IfxDsadc_InputGain_factor8
Input gain factor: 8.
Definition: IfxDsadc.h:191
IfxDsadc_CarrierWaveformMode_square
Carrier Generator generates square wave.
Definition: IfxDsadc.h:113
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxDsadc_InputConfig_referenceGround
Modulator input connected to reference ground V_ref.
Definition: IfxDsadc.h:167
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxDsadc_RectifierSignSource_externalB
External sign signal B.
Definition: IfxDsadc.h:312
IfxDsadc_FirInternalShift
IfxDsadc_FirInternalShift
FIR shift control Selects the displacement caused by the data shifter inbetween the FIR filter blocks...
Definition: IfxDsadc.h:153
IfxSrc.h
SRC basic functionality.
IfxDsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxDsadc_PinMap.h:100
IfxDsadc_InputDataSource_invertedInputB
External, from input B, inverted.
Definition: IfxDsadc.h:180
IfxDsadc_getIntegratorOutFreq
IFX_EXTERN float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz.
Definition: IfxDsadc.c:41
IfxDsadc_ModulatorClockDivider_div12
f_mod = f_clk / 12
Definition: IfxDsadc.h:290
IfxCpu_Intrinsics.h
IfxDsadc_IntegratorTrigger_alwaysActive
No trigger, integrator active all the time.
Definition: IfxDsadc.h:224
IfxDsadc_IntegratorTrigger
IfxDsadc_IntegratorTrigger
Integrator trigger mode NOTE: switch-first to bypassed before using other mode Definition in Ifx_DSAD...
Definition: IfxDsadc.h:219
IfxDsadc_Sg_In
SG pin mapping structure.
Definition: IfxDsadc_PinMap.h:92
IfxDsadc_IntegrationWindowSize_internalControl
Internal control: stop integrator after REPVAL+1 integration cycles.
Definition: IfxDsadc.h:211
IfxDsadc_Cgpwm_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxDsadc_PinMap.h:87
IfxDsadc_ModulatorClock_fOSC0
f_osc0 clock selected
Definition: IfxDsadc.h:277
IfxDsadc_SleepMode_enable
enables sleep mode
Definition: IfxDsadc.h:345
IfxDsadc_initSgPin
IFX_INLINE void IfxDsadc_initSgPin(const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SG input.
Definition: IfxDsadc.h:697
IfxDsadc_AuxCombFilterShift_shiftBy3
Shift by 3.
Definition: IfxDsadc.h:64
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxDsadc_IntegrationWindowSize_externalControl
External control: stop integrator when bit INTEN becomes 0.
Definition: IfxDsadc.h:212
IfxDsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxDsadc.h:221
IfxDsadc_ModulatorClock_fERAY
f_eray clock selected
Definition: IfxDsadc.h:276
IfxDsadc_CarrierWaveformMode_triangle
Carrier Generator generates triangle wave.
Definition: IfxDsadc.h:114
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:75
IfxDsadc_startScan
IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxDsadc.h:728
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges
Double clock, a sample trigger is generated at every 2nd falling clock edge.
Definition: IfxDsadc.h:337
IfxDsadc_getMainCombOutFreq
IFX_EXTERN float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the main COMB filter output in Hz.
Definition: IfxDsadc.c:62
IfxDsadc_MainCombFilterType
IfxDsadc_MainCombFilterType
Comb Filter (Main Chain) configuration/type Definition in Ifx_DSADC.FCFGC.B.CFMC. ...
Definition: IfxDsadc.h:250
IfxDsadc_InputPin_b
Pin B connected to modulator input.
Definition: IfxDsadc.h:201
IfxDsadc_SampleStrobe
IfxDsadc_SampleStrobe
Demodulator data strobe generation mode Definition in Ifx_DSADC.DICFG.B.STROBE.
Definition: IfxDsadc.h:329
sint16
short sint16
Definition: Platform_Types.h:126
IfxDsadc_FirDataShift
IfxDsadc_FirDataShift
FIR data shift control Selects the displacement caused by the data shifter at the FIR filter output D...
Definition: IfxDsadc.h:141
IfxDsadc_ModulatorClockDivider_div8
f_mod = f_clk / 8
Definition: IfxDsadc.h:288
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxDsadc_AuxEvent_insideBoundary
If result is inside the boundary band.
Definition: IfxDsadc.h:84
IfxDsadc_SampleClockSource_internal
Internal clock.
Definition: IfxDsadc.h:320
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxDsadc_MainServiceRequest_everyNewResult
Always, for each new result value.
Definition: IfxDsadc.h:266
IfxDsadc_LowPowerSupply_3_3V
Supply Voltage for Analog Circuitry set to 3.3V.
Definition: IfxDsadc.h:233
IfxDsadc_SampleClockSource_inputA
External clock, from Input A.
Definition: IfxDsadc.h:321
IfxDsadc_AuxServiceRequest_altSource
Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5) ...
Definition: IfxDsadc.h:104
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxDsadc_InputConfig_commonModeVoltage
Modulator input connected to common mode voltage V_cm.
Definition: IfxDsadc.h:166
IfxDsadc_InputDataSource
IfxDsadc_InputDataSource
Demodulator input data source selection Definition in Ifx_DSADC.DICFG.B.DSRC.
Definition: IfxDsadc.h:173
IfxDsadc_CommonModeVoltage_b
VCM = VAREF / 2.27 (2.2 V for VAREF = 5.0 V), recommended for low distortion of AC-coupled signals...
Definition: IfxDsadc.h:133
IfxDsadc_MainCombFilterType_combF
CICF.
Definition: IfxDsadc.h:255
IfxDsadc_CommonModeVoltage
IfxDsadc_CommonModeVoltage
Modulator common mode voltage selection Definition in Ifx_DSADC.MODCFGx.B.CMVS.
Definition: IfxDsadc.h:130
IfxDsadc_SampleClockSource
IfxDsadc_SampleClockSource
Demodulator sample clock source select Definition in Ifx_DSADC.DICFG.B.CSRC.
Definition: IfxDsadc.h:318
IfxDsadc_ModulatorClockDivider_div28
f_mod = f_clk / 28
Definition: IfxDsadc.h:298
IfxDsadc_ModulatorClockDivider_div18
f_mod = f_clk / 18
Definition: IfxDsadc.h:293
IfxDsadc_InputConfig
IfxDsadc_InputConfig
Modulator configuration of positive/negative input line Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.
Definition: IfxDsadc.h:162
IfxDsadc_SampleStrobe_reserved
don&#39;t use
Definition: IfxDsadc.h:335
IfxDsadc_CarrierWaveformMode_sine
Carrier Generator generates sine wave.
Definition: IfxDsadc.h:115
IfxDsadc_TriggerInput_b
dsadc trig 1
Definition: IfxDsadc.h:366
IfxDsadc_AuxCombFilterType_comb2
CIC2.
Definition: IfxDsadc.h:73
IfxDsadc_InputGain
IfxDsadc_InputGain
Modulator gain select of analog input path Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.
Definition: IfxDsadc.h:186
IfxDsadc_getModulatorInputClockFreq
IFX_EXTERN float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz.
Definition: IfxDsadc.c:117
IfxDsadc_ModulatorClockDivider_div4
f_mod = f_clk / 4
Definition: IfxDsadc.h:286
IfxDsadc_InputGain_factor4
Input gain factor: 4.
Definition: IfxDsadc.h:190
IfxDsadc_AuxCombFilterType_combF
CICF.
Definition: IfxDsadc.h:75
IfxDsadc_MainCombFilterType_comb2
CIC2.
Definition: IfxDsadc.h:253
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxDsadc_ModulatorClockDivider
IfxDsadc_ModulatorClockDivider
Modulator divider factor for modulator clock Definition in Ifx_DSADC.MODCFGx.B.DIVM.
Definition: IfxDsadc.h:283
IfxDsadc_AuxCombFilterType_comb3
CIC3.
Definition: IfxDsadc.h:74
IfxDsadc_InputDataSource_directInputB
External, from input B, direct.
Definition: IfxDsadc.h:179
IfxDsadc_initCinPin
IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input.
Definition: IfxDsadc.h:637
IfxDsadc_Cgpwm_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxDsadc_PinMap.h:88
IfxDsadc_getAuxSrc
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxDsadc.c:35
IfxDsadc_IntegrationWindowSize
IfxDsadc_IntegrationWindowSize
Integrator window size Definition in Ifx_DSADC.IWCTR.B.IWS.
Definition: IfxDsadc.h:209
IfxDsadc_CarrierWaveformMode
IfxDsadc_CarrierWaveformMode
Carrier generation mode Definition in Ifx_DSADC.CGCFG.B.CGMOD.
Definition: IfxDsadc.h:110
IfxDsadc_ModulatorClockDivider_div24
f_mod = f_clk / 24
Definition: IfxDsadc.h:296
IfxDsadc_RectifierSignSource
IfxDsadc_RectifierSignSource
Rectifier sign source Selects the sign signal that is to be delayed. Definition in Ifx_DSADC...
Definition: IfxDsadc.h:307
IfxDsadc_setSleepMode
IFX_INLINE void IfxDsadc_setSleepMode(Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxDsadc.h:719
IfxDsadc_AuxServiceRequest_never
Never, service requests disabled.
Definition: IfxDsadc.h:102
IfxDsadc_SampleStrobe_noDataStrobe
No data strobe.
Definition: IfxDsadc.h:331
IfxDsadc_TriggerInput
IfxDsadc_TriggerInput
Trigger select Definition in Ifx_DSADC.DICFG.B.TRSEL.
Definition: IfxDsadc.h:363
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxDsadc_InputPin_c
Pin C connected to modulator input.
Definition: IfxDsadc.h:202
IfxDsadc_AuxServiceRequest
IfxDsadc_AuxServiceRequest
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.SRGA.
Definition: IfxDsadc.h:100
IfxDsadc_LowPowerSupply
IfxDsadc_LowPowerSupply
Low power supply voltage select Definition in Ifx_DSADC.GLOBCFG.B.LOSUP.
Definition: IfxDsadc.h:230
IfxDsadc_AuxEvent_everyNewResult
Always, for each new result value.
Definition: IfxDsadc.h:83
IfxDsadc_getMainResult
IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain.
Definition: IfxDsadc.h:624
IfxDsadc_TimestampTrigger_noTrigger
No timestamp trigger.
Definition: IfxDsadc.h:354
IfxDsadc_RectifierSignSource_onChipGenerator
On-chip carrier generator.
Definition: IfxDsadc.h:309
IfxDsadc_initDspPin
IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxDsadc.h:677
IfxDsadc_AuxEvent_outsideBoundary
If result is outside the boundary band.
Definition: IfxDsadc.h:85
IfxDsadc_ModulatorClockDivider_div10
f_mod = f_clk / 10
Definition: IfxDsadc.h:289
IfxDsadc_ModulatorClockDivider_div14
f_mod = f_clk / 14
Definition: IfxDsadc.h:291
IfxDsadc_InputGain_factor16
Input gain factor: 16.
Definition: IfxDsadc.h:192
IfxDsadc_ModulatorClockDivider_div30
f_mod = f_clk / 30
Definition: IfxDsadc.h:299
IfxDsadc_RectifierSignSource_externalA
External sign signal A.
Definition: IfxDsadc.h:311
IfxDsadc_ModulatorClockDivider_div2
f_mod = f_clk / 2
Definition: IfxDsadc.h:285
IfxDsadc_stopScan
IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxDsadc.h:734
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxDsadc_ChannelId_3
Specifies the channel Index 3.
Definition: IfxDsadc.h:124
IfxDsadc_SampleClockSource_inputB
External clock, from Input B.
Definition: IfxDsadc.h:322
IfxDsadc_TriggerInput_a
dsadc trig 0
Definition: IfxDsadc.h:365
IfxDsadc_MainCombFilterShift_shiftBy1
Shift by 1.
Definition: IfxDsadc.h:242
IfxDsadc_AuxGate
IfxDsadc_AuxGate
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.EGT.
Definition: IfxDsadc.h:91
IfxDsadc_AuxCombFilterType_comb1
CIC1.
Definition: IfxDsadc.h:72
IfxDsadc_initDinPin
IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input.
Definition: IfxDsadc.h:657
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxDsadc_initItrPin
IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input.
Definition: IfxDsadc.h:687
IfxDsadc_ChannelId_2
Specifies the channel Index 2.
Definition: IfxDsadc.h:123
IfxDsadc_ModulatorClock_fDSD
f_dsd clock selected
Definition: IfxDsadc.h:275
IfxDsadc_initDsnPin
IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxDsadc.h:667
IfxDsadc_MainCombFilterType_comb1
CIC1.
Definition: IfxDsadc.h:252
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxDsadc_ModulatorClockDivider_div22
f_mod = f_clk / 22
Definition: IfxDsadc.h:295
IfxDsadc_SampleStrobe_sampleOnRisingEdge
Direct clock, a sample trigger is generated at each rising clock edge.
Definition: IfxDsadc.h:332
IfxDsadc_AuxCombFilterShift_shiftBy1
Shift by 1.
Definition: IfxDsadc.h:62
IfxDsadc_getModulatorClockFreq
IFX_EXTERN float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the modulator clock frequency in Hz.
Definition: IfxDsadc.c:109
IfxDsadc_TriggerInput_d
vadc trig 1
Definition: IfxDsadc.h:368
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:39
IfxDsadc_InputGain_factor2
Input gain factor: 2.
Definition: IfxDsadc.h:189
IfxDsadc_TimestampTrigger_eachEdge
Trigger event upon each edge.
Definition: IfxDsadc.h:357
IfxDsadc_MainCombFilterShift_shiftBy3
Shift by 3.
Definition: IfxDsadc.h:244
IfxDsadc_PinMap.h
DSADC I/O map.
IfxDsadc_resetModule
IFX_EXTERN void IfxDsadc_resetModule(Ifx_DSADC *dsadc)
resets the DSADC kernel
Definition: IfxDsadc.c:141
IfxDsadc_MainServiceRequest_lowGateSignal
While gate (selected trigger signal) is low.
Definition: IfxDsadc.h:265
IfxDsadc_FirInternalShift_noShift
no shift, use full range
Definition: IfxDsadc.h:155
IfxDsadc_ModulatorClock
IfxDsadc_ModulatorClock
Modulator clock select Definition in Ifx_DSADC.GLOBCFG.B.MCSEL.
Definition: IfxDsadc.h:272
IfxDsadc_FirDataShift_shiftBy2
Shift by 2.
Definition: IfxDsadc.h:145
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxDsadc_MainServiceRequest
IfxDsadc_MainServiceRequest
Service request generation (main chain) Definition in Ifx_DSADC.FCFGC.B.SRGM.
Definition: IfxDsadc.h:261
IfxDsadc_AuxEvent
IfxDsadc_AuxEvent
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.ESEL.
Definition: IfxDsadc.h:81
IfxDsadc_InputGain_factor1
Input gain factor: 1.
Definition: IfxDsadc.h:188
IfxDsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxDsadc.h:122
IfxDsadc_FirDataShift_noShift
no shift, use full range
Definition: IfxDsadc.h:143
IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges
Double clock, a sample trigger is generated at every 2nd rising clock edge.
Definition: IfxDsadc.h:336
IfxDsadc_TriggerInput_g
Definition: IfxDsadc.h:371
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:57
IfxDsadc_SampleClockSource_inputC
External clock, from Input C.
Definition: IfxDsadc.h:323
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:66
IfxDsadc_InputPin_d
Pin D connected to modulator input.
Definition: IfxDsadc.h:203
IfxDsadc_initCgPwmPin
IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output.
Definition: IfxDsadc.h:630
IfxDsadc_TriggerInput_e
external pin e
Definition: IfxDsadc.h:369
IfxDsadc_CommonModeVoltage_c
VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals.
Definition: IfxDsadc.h:134
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxDsadc_TimestampTrigger_risingEdge
Trigger event upon a rising edge.
Definition: IfxDsadc.h:356
IfxDsadc_cfg.h
DSADC on-chip implementation data.
IfxDsadc_ModulatorClockDivider_div32
f_mod = f_clk / 32
Definition: IfxDsadc.h:300
IfxDsadc_ModulatorClockDivider_div16
f_mod = f_clk / 16
Definition: IfxDsadc.h:292
IfxDsadc_InputDataSource_directInputA
External, from input A, direct.
Definition: IfxDsadc.h:177
IfxDsadc_AuxCombFilterShift_noShift
no shift, use full range
Definition: IfxDsadc.h:61


iLLD_TC26B: IfxDsadc_Dsadc.c Source File

  • Dsadc
  • Dsadc
IfxDsadc_Dsadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_Dsadc.c
3 * \brief DSADC DSADC details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxDsadc_Dsadc.h"
30
31 /******************************************************************************/
32 /*-----------------------Private Function Prototypes--------------------------*/
33 /******************************************************************************/
34
35 /** \brief calculate division factor
36 * \param sourceFreq Source frequency
37 * \param targetFreq Target frequency
38 * \return division factor
39 */
40 IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx(float32 sourceFreq, float32 *targetFreq);
41
42 /** \brief Initialises the auxilary filter
43 * \param channel Pointer to the DSADC channel handle
44 * \param config pointer to the DSADC fir auxilary filter configuration
45 * \return None
46 */
47 IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config);
48
49 /** \brief Initialises the comb filter
50 * \param channel Pointer to the DSADC channel handle
51 * \param config pointer to the DSADC comb filter configuration
52 * \return None
53 */
54 IFX_STATIC void IfxDsadc_Dsadc_initCombFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config);
55
56 /** \brief Initialises the demodulator
57 * \param channel Pointer to the DSADC channel handle
58 * \param config pointer to the DSADC demodulator configuration
59 * \return None
60 */
61 IFX_STATIC void IfxDsadc_Dsadc_initDemodulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config);
62
63 /** \brief Initialises the fir filter
64 * \param channel Pointer to the DSADC channel handle
65 * \param config pointer to the DSADC fir filter configuration
66 * \return None
67 */
68 IFX_STATIC void IfxDsadc_Dsadc_initFirFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config);
69
70 /** \brief Initialises the integrator
71 * \param channel Pointer to the DSADC channel handle
72 * \param config pointer to the DSADC fir integrator configuration
73 * \return None
74 */
75 IFX_STATIC void IfxDsadc_Dsadc_initIntegrator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config);
76
77 /** \brief Initialises the modulator
78 * \param channel Pointer to the DSADC channel handle
79 * \param config pointer to the DSADC modulator configuration
80 * \return None
81 */
82 IFX_STATIC void IfxDsadc_Dsadc_initModulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config);
83
84 /** \brief Initialises the rectifier
85 * \param channel Pointer to the DSADC channel handle
86 * \param config pointer to the DSADC fir rectifier configuration
87 * \return None
88 */
89 IFX_STATIC void IfxDsadc_Dsadc_initRectifier(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config);
90
91 /******************************************************************************/
92 /*-------------------------Function Implementations---------------------------*/
93 /******************************************************************************/
94
95 IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx(float32 sourceFreq, float32 *targetFreq)
96 {
97 float32 bestError = 10e6;
98 sint32 bestDiv = 2, i;
99
100 for (i = 2; i <= 32; i += 2)
101 {
102 float32 freq = sourceFreq / i;
103 float32 error = __absf(freq - *targetFreq);
104
105 if (__leqf(error, bestError))
106 {
107 bestError = error;
108 bestDiv = i;
109
110 if (!__neqf(error, 0))
111 {
112 break;
113 }
114 }
115 }
116
117 *targetFreq = sourceFreq / bestDiv;
118
119 return (bestDiv / 2) - 1;
120 }
121
122
123 sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel)
124 {
125 return IfxDsadc_getAuxResult(channel->module, channel->channelId);
126 }
127
128
129 IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config)
130 {
131 Ifx_DSADC_CH_FCFGA fcfga;
132
133 fcfga.U = 0;
134
135 fcfga.B.CFADF = config->decimationFactor - 1;
136 fcfga.B.CFAC = config->combFilterType;
137
138 fcfga.B.SRGA = config->serviceRequest;
139 fcfga.B.ESEL = config->eventSelect;
140 fcfga.B.EGT = config->eventGate;
141
142 fcfga.B.AFSC = config->combFilterShift;
143
144 (channel->channel)->FCFGA = fcfga;
145 }
146
147
148 void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
149 {
150 Ifx_DSADC_CGCFG cgcfg;
151
152 cgcfg.U = 0;
153
154 float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(dsadc->dsadc);
155 float32 targetFreq = config->frequency;
156 cgcfg.B.DIVCG = IfxDsadc_Dsadc_calcDIVx(sourceFreq / (32 * 32), &targetFreq);
157 cgcfg.B.SIGPOL = (config->inverted == FALSE) ? 0 : 1;
158 cgcfg.B.BREV = (config->bitReversed == FALSE) ? 0 : 1;
159 cgcfg.B.CGMOD = config->carrierWaveformMode;
160
161 dsadc->dsadc->CGCFG = cgcfg;
162
163 const IfxDsadc_Cgpwm_Out *pinPos = config->pinPos;
164
165 if (pinPos != NULL_PTR)
166 { /* Initialise positive carrier pin */
167 IfxDsadc_initCgPwmPin(pinPos, config->pinMode, config->pinDriver);
168 }
169
170 const IfxDsadc_Cgpwm_Out *pinNeg = config->pinNeg;
171
172 if (pinNeg != NULL_PTR)
173 { /* Initialise negative carrier pin */
174 IfxDsadc_initCgPwmPin(pinNeg, config->pinMode, config->pinDriver);
175 }
176 }
177
178
179 void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
180 {
181 Ifx_DSADC *dsadc = config->module;
182
183 channel->channelId = config->channelId;
184 channel->module = dsadc;
185 channel->channel = (Ifx_DSADC_CH *)&dsadc->CH[config->channelId];
186
187 IfxDsadc_Dsadc_initModulator(channel, &config->modulator);
188 IfxDsadc_Dsadc_initDemodulator(channel, &config->demodulator);
189 IfxDsadc_Dsadc_initCombFilter(channel, &config->combFilter);
190 IfxDsadc_Dsadc_initFirFilter(channel, &config->firFilter);
191 IfxDsadc_Dsadc_initIntegrator(channel, &config->integrator);
192 IfxDsadc_Dsadc_initAuxFilter(channel, &config->auxFilter);
193 IfxDsadc_Dsadc_initRectifier(channel, &config->rectifier);
194
195 const IfxDsadc_Dsadc_ChannelPins *pins = config->channelPins;
196
197 if (pins != NULL_PTR)
198 {
199 const IfxDsadc_Dsn_In *dsn = pins->dsn;
200
201 if (dsn != NULL_PTR)
202 {
203 IfxDsadc_initDsnPin(dsn, pins->dsnMode, pins->pinDriver);
204 }
205
206 const IfxDsadc_Dsp_In *dsp = pins->dsp;
207
208 if (dsp != NULL_PTR)
209 {
210 IfxDsadc_initDspPin(dsp, pins->dspMode, pins->pinDriver);
211 }
212
213 const IfxDsadc_Cin_In *cin = pins->cin;
214
215 if (cin != NULL_PTR)
216 {
217 IfxDsadc_initCinPin(cin, pins->cinMode, pins->pinDriver);
218 }
219
220 const IfxDsadc_Din_In *din = pins->din;
221
222 if (din != NULL_PTR)
223 {
224 IfxDsadc_initDinPin(din, pins->dinMode, pins->pinDriver);
225 }
226
227 const IfxDsadc_Itr_In *itr = pins->itr;
228
229 if (itr != NULL_PTR)
230 {
231 IfxDsadc_initItrPin(itr, pins->itrMode, pins->pinDriver);
232 }
233 }
234 }
235
236
237 void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
238 {
239 const IfxDsadc_Dsadc_ChannelConfig IfxDsadc_Dsadc_defaultChannelConfig = {
240 .modulator = {
241 .positiveInput = IfxDsadc_InputConfig_inputPin,
242 .negativeInput = IfxDsadc_InputConfig_referenceGround,
243 .inputGain = IfxDsadc_InputGain_factor1,
244 .inputPin = IfxDsadc_InputPin_a,
245 .modulatorClockFreq = 10.0e6,
246 .commonModeVoltage = IfxDsadc_CommonModeVoltage_c,
247 },
248 .demodulator = {
249 .inputDataSource = IfxDsadc_InputDataSource_onChipStandAlone,
250 .triggerInput = IfxDsadc_TriggerInput_a,
251 .integrationTrigger = IfxDsadc_IntegratorTrigger_bypassed,
252 .timestampTrigger = IfxDsadc_TimestampTrigger_noTrigger,
253 .sampleClockSource = IfxDsadc_SampleClockSource_internal,
254 .sampleStrobe = IfxDsadc_SampleStrobe_sampleOnRisingEdge,
255 },
256 .combFilter = {
257 .bypassed = FALSE,
258 .combFilterType = IfxDsadc_MainCombFilterType_comb3,
259 .combFilterShift = IfxDsadc_MainCombFilterShift_noShift,
260 .serviceRequest = IfxDsadc_MainServiceRequest_everyNewResult,
261 .decimationFactor = 50,
262 .startValue = 0,
263 },
264 .firFilter = {
265 .fir0Enabled = FALSE,
266 .fir1Enabled = FALSE,
267 .offsetCompensation = FALSE,
268 .dataShift = IfxDsadc_FirDataShift_noShift,
269 .internalShift = IfxDsadc_FirInternalShift_noShift,
270 },
271 .integrator = {
272 .windowSize = IfxDsadc_IntegrationWindowSize_internalControl,
273 .discardCount = 0,
274 .integrationCount = 20,
275 .integrationCycles = 1,
276 },
277 .auxFilter = {
278 .bypassed = TRUE,
279 .combFilterType = IfxDsadc_AuxCombFilterType_comb1,
280 .combFilterShift = IfxDsadc_AuxCombFilterShift_noShift,
281 .serviceRequest = IfxDsadc_AuxServiceRequest_never,
282 .eventSelect = IfxDsadc_AuxEvent_everyNewResult,
283 .eventGate = IfxDsadc_AuxGate_definedByESEL,
284 .decimationFactor = 4,
285 },
286 .rectifier = {
287 .enabled = FALSE,
288 .signSource = IfxDsadc_RectifierSignSource_onChipGenerator,
289 .signDelay = 0,
290 .signPeriod = 0,
291 },
292
293 .channelPins = NULL_PTR
294 };
295
296 *config = IfxDsadc_Dsadc_defaultChannelConfig;
297 config->channelId = IfxDsadc_ChannelId_0;
298
299 if (dsadc != NULL_PTR)
300 {
301 config->module = dsadc->dsadc;
302 }
303 else
304 {
305 config->module = NULL_PTR;
306 }
307 }
308
309
310 IFX_STATIC void IfxDsadc_Dsadc_initCombFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config)
311 {
312 Ifx_DSADC_CH_FCFGC fcfgc;
313
314 fcfgc.U = 0;
315
316 fcfgc.B.CFMDF = config->decimationFactor - 1;
317 fcfgc.B.CFMC = config->combFilterType;
318 fcfgc.B.CFEN = (config->bypassed == FALSE) ? 1 : 0;
319
320 fcfgc.B.MFSC = config->combFilterShift;
321
322 fcfgc.B.SRGM = config->serviceRequest;
323 fcfgc.B.CFMSV = config->startValue - 1;
324
325 (channel->channel)->FCFGC = fcfgc;
326 }
327
328
329 IFX_STATIC void IfxDsadc_Dsadc_initDemodulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config)
330 {
331 Ifx_DSADC_CH_DICFG dicfg;
332
333 dicfg.U = 0;
334
335 dicfg.B.DSRC = config->inputDataSource;
336 dicfg.B.DSWC = 1; // enable write access for this bitfield
337
338 dicfg.B.ITRMODE = config->integrationTrigger;
339 dicfg.B.TSTRMODE = config->timestampTrigger;
340 dicfg.B.TRSEL = config->triggerInput;
341 dicfg.B.TRWC = 1; // enable write access for these bitfields
342
343 dicfg.B.CSRC = config->sampleClockSource;
344 dicfg.B.STROBE = config->sampleStrobe;
345 dicfg.B.SCWC = 1; // enable write access for these bitfields
346
347 (channel->channel)->DICFG = dicfg;
348 }
349
350
351 IFX_STATIC void IfxDsadc_Dsadc_initFirFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config)
352 {
353 Ifx_DSADC_CH_FCFGM fcfgm;
354
355 fcfgm.U = 0;
356
357 fcfgm.B.FIR0EN = (config->fir0Enabled != FALSE) ? 1 : 0;
358 fcfgm.B.FIR1EN = (config->fir1Enabled != FALSE) ? 1 : 0;
359 fcfgm.B.OCEN = (config->offsetCompensation != FALSE) ? 1 : 0;
360 fcfgm.B.DSH = config->dataShift;
361 fcfgm.B.FSH = config->internalShift;
362
363 (channel->channel)->FCFGM = fcfgm;
364 }
365
366
367 IFX_STATIC void IfxDsadc_Dsadc_initIntegrator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config)
368 {
369 Ifx_DSADC_CH_IWCTR iwctr;
370
371 iwctr.U = 0;
372
373 iwctr.B.REPVAL = config->integrationCycles - 1;
374 iwctr.B.NVALDIS = config->discardCount;
375 iwctr.B.IWS = config->windowSize;
376 iwctr.B.NVALINT = config->integrationCount - 1;
377
378 (channel->channel)->IWCTR = iwctr;
379 }
380
381
382 IFX_STATIC void IfxDsadc_Dsadc_initModulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config)
383 {
384 Ifx_DSADC_CH_MODCFG modcfg;
385
386 modcfg.U = 0;
387
388 modcfg.B.INCFGP = config->positiveInput;
389 modcfg.B.INCFGN = config->negativeInput;
390 modcfg.B.GAINSEL = config->inputGain;
391 modcfg.B.INSEL = config->inputPin;
392 modcfg.B.INCWC = 1; // enable write access for these bitfields
393
394 float32 targetFreq = config->modulatorClockFreq;
395 float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(channel->module);
396 modcfg.B.DIVM = IfxDsadc_Dsadc_calcDIVx(sourceFreq, &targetFreq);
397 modcfg.B.DWC = 1; // enable write access for this bitfield
398
399 modcfg.B.CMVS = config->commonModeVoltage;
400 modcfg.B.GCEN = 0; // normal operation (calibration mode disabled)
401 modcfg.B.MWC = 1; // enable write access for these bitfields
402
403 (channel->channel)->MODCFG = modcfg;
404 }
405
406
407 void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
408 {
409 Ifx_DSADC *dsadcSFR = config->dsadc;
410
411 dsadc->dsadc = dsadcSFR;
412
413 {
414 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
415 IfxScuWdt_clearCpuEndinit(passwd);
416 dsadcSFR->CLC.U = 0x00000000;
417
418 if (dsadcSFR->CLC.U)
419 {} // sync access
420
421 IfxScuWdt_setCpuEndinit(passwd);
422
423 {
424 Ifx_DSADC_GLOBCFG globcfg;
425 globcfg.U = dsadcSFR->GLOBCFG.U;
426
427 globcfg.B.MCSEL = config->modulatorClockSelect;
428 globcfg.B.LOSUP = config->lowPowerSupply;
429 globcfg.B.PSWC = 1;
430
431 dsadcSFR->GLOBCFG.U = globcfg.U;
432 }
433 }
434 }
435
436
437 void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
438 {
439 const IfxDsadc_Dsadc_Config IfxDsadc_Dsadc_defaultConfig = {
440 .modulatorClockSelect = IfxDsadc_ModulatorClock_fDSD,
441 .lowPowerSupply = IfxDsadc_LowPowerSupply_5V
442 };
443
444 *config = IfxDsadc_Dsadc_defaultConfig;
445 config->dsadc = dsadc;
446 }
447
448
449 IFX_STATIC void IfxDsadc_Dsadc_initRectifier(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config)
450 {
451 Ifx_DSADC_CH_RECTCFG rect;
452
453 rect.U = 0;
454 rect.B.RFEN = config->enabled;
455 rect.B.SSRC = config->signSource;
456 (channel->channel)->RECTCFG = rect;
457 (channel->channel)->CGSYNC.B.SDPOS = config->signDelay;
458 (channel->channel)->CGSYNC.B.SDNEG = config->signDelay + (config->signPeriod / 2);
459 (channel->channel)->IWCTR.B.NVALDIS = config->signDelay + 1;
460 }
461
462
463 void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
464 {
465 config->bitReversed = FALSE;
466 config->carrierWaveformMode = IfxDsadc_CarrierWaveformMode_sine;
467 config->frequency = 10000;
468 config->inverted = FALSE;
469 config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
470 config->pinMode = IfxPort_OutputMode_pushPull;
471 config->pinNeg = NULL_PTR;
472 config->pinPos = NULL_PTR;
473 }
IfxDsadc_Dsadc_AuxFilterConfig::combFilterShift
IfxDsadc_AuxCombFilterShift combFilterShift
Comb Filter (auxiliary) shift control.
Definition: IfxDsadc_Dsadc.h:179
IfxDsadc_Dsadc_FirFilterConfig::fir0Enabled
boolean fir0Enabled
FIR filter 0 enable/disable selection.
Definition: IfxDsadc_Dsadc.h:231
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:84
IfxDsadc_Dsadc::dsadc
Ifx_DSADC * dsadc
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:278
IfxDsadc_Dsadc_initDemodulator
IFX_STATIC void IfxDsadc_Dsadc_initDemodulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config)
Initialises the demodulator.
Definition: IfxDsadc_Dsadc.c:329
IfxDsadc_InputConfig_inputPin
Modulator input connected to external pin.
Definition: IfxDsadc.h:164
IfxDsadc_Dsadc_AuxFilterConfig::decimationFactor
uint8 decimationFactor
CIC Filter (Auxiliary) decimation factor (4 .. 32)
Definition: IfxDsadc_Dsadc.h:183
IfxDsadc_Dsadc_ChannelPins::din
IFX_CONST IfxDsadc_Din_In * din
the DIN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:192
IfxDsadc_Dsadc_DemodulatorConfig
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:217
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:48
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1648
IfxDsadc_Dsadc_Channel::module
Ifx_DSADC * module
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:299
IfxDsadc_Dsadc_ChannelPins::dsnMode
IfxPort_InputMode dsnMode
the DSN pin output mode which should be configured
Definition: IfxDsadc_Dsadc.h:197
IfxDsadc_Dsadc_IntegratorConfig::discardCount
uint16 discardCount
Number of discarded values to after active trigger: 1 .. 64.
Definition: IfxDsadc_Dsadc.h:243
IfxDsadc_Dsadc_ChannelConfig::channelPins
IFX_CONST IfxDsadc_Dsadc_ChannelPins * channelPins
Channel Pins Configuration structure.
Definition: IfxDsadc_Dsadc.h:317
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxDsadc_MainCombFilterType_comb3
CIC3.
Definition: IfxDsadc.h:254
IfxDsadc_Dsadc_DemodulatorConfig::sampleClockSource
IfxDsadc_SampleClockSource sampleClockSource
Demodulator sample clock source selection.
Definition: IfxDsadc_Dsadc.h:223
IfxDsadc_Dsadc_CombFilterConfig
Comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:205
IfxDsadc_Dsadc_initChannel
void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:179
IfxDsadc_Dsadc_IntegratorConfig
Integrator configuration structure.
Definition: IfxDsadc_Dsadc.h:240
IfxDsadc_Dsadc_initCombFilter
IFX_STATIC void IfxDsadc_Dsadc_initCombFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config)
Initialises the comb filter.
Definition: IfxDsadc_Dsadc.c:310
IfxDsadc_LowPowerSupply_5V
Supply Voltage for Analog Circuitry set to 5V.
Definition: IfxDsadc.h:232
IfxDsadc_Dsadc.h
DSADC DSADC details.
IfxDsadc_Dsadc_ModulatorConfig::negativeInput
IfxDsadc_InputConfig negativeInput
Modulator configuration of negative input line.
Definition: IfxDsadc_Dsadc.h:253
IfxDsadc_InputPin_a
Pin A connected to modulator input.
Definition: IfxDsadc.h:200
IfxDsadc_Dsadc_initIntegrator
IFX_STATIC void IfxDsadc_Dsadc_initIntegrator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config)
Initialises the integrator.
Definition: IfxDsadc_Dsadc.c:367
IfxDsadc_Dsadc_ChannelPins::dinMode
IfxPort_InputMode dinMode
the DIN pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:193
IfxDsadc_getAuxResult
IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the auxiliary chain.
Definition: IfxDsadc.h:612
IfxDsadc_Dsadc_Config::modulatorClockSelect
IfxDsadc_ModulatorClock modulatorClockSelect
Modulator clock selection.
Definition: IfxDsadc_Dsadc.h:325
IfxDsadc_Dsadc_CarrierGenConfig::pinDriver
IfxPort_PadDriver pinDriver
Carrier pins pad driver.
Definition: IfxDsadc_Dsadc.h:292
IfxDsadc_AuxGate_definedByESEL
Separate: generate events according to ESEL.
Definition: IfxDsadc.h:93
float32
float float32
Definition: Platform_Types.h:167
IfxDsadc_Dsadc_ChannelConfig::rectifier
IfxDsadc_Dsadc_RectifierConfig rectifier
Rectifier configuration structure.
Definition: IfxDsadc_Dsadc.h:316
IfxDsadc_InputDataSource_onChipStandAlone
On-chip modulator, standalone (3rd order)
Definition: IfxDsadc.h:175
IfxDsadc_MainCombFilterShift_noShift
no shift, use full range
Definition: IfxDsadc.h:241
IfxDsadc_Dsadc_Channel::channelId
IfxDsadc_ChannelId channelId
Channel Id.
Definition: IfxDsadc_Dsadc.h:301
IfxDsadc_Dsadc_DemodulatorConfig::inputDataSource
IfxDsadc_InputDataSource inputDataSource
Demodulator input data source selection.
Definition: IfxDsadc_Dsadc.h:219
IfxDsadc_InputConfig_referenceGround
Modulator input connected to reference ground V_ref.
Definition: IfxDsadc.h:167
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxDsadc_Dsadc_initModuleConfig
void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration.
Definition: IfxDsadc_Dsadc.c:437
IfxDsadc_Dsadc_CarrierGenConfig::bitReversed
boolean bitReversed
Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
Definition: IfxDsadc_Dsadc.h:287
IfxDsadc_Dsadc_initRectifier
IFX_STATIC void IfxDsadc_Dsadc_initRectifier(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config)
Initialises the rectifier.
Definition: IfxDsadc_Dsadc.c:449
IfxDsadc_Dsadc
DSADC handle data structure.
Definition: IfxDsadc_Dsadc.h:276
IfxDsadc_Dsadc_AuxFilterConfig
Auxiliary comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:175
IfxDsadc_IntegrationWindowSize_internalControl
Internal control: stop integrator after REPVAL+1 integration cycles.
Definition: IfxDsadc.h:211
IfxDsadc_Dsadc_FirFilterConfig::internalShift
IfxDsadc_FirInternalShift internalShift
FIR shift control selction.
Definition: IfxDsadc_Dsadc.h:235
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxDsadc_IntegratorTrigger_bypassed
No integration trigger, integrator bypassed.
Definition: IfxDsadc.h:221
IfxDsadc_Dsadc_ChannelConfig::firFilter
IfxDsadc_Dsadc_FirFilterConfig firFilter
FIR filters configuration structure.
Definition: IfxDsadc_Dsadc.h:313
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:75
FALSE
#define FALSE
Definition: Platform_Types.h:90
__leqf
#define __leqf
Definition: IfxCpu_IntrinsicsDcc.h:1652
IfxDsadc_Dsadc_FirFilterConfig::dataShift
IfxDsadc_FirDataShift dataShift
FIR data shift control selection.
Definition: IfxDsadc_Dsadc.h:234
IfxDsadc_Dsadc_CarrierGenConfig::pinPos
IFX_CONST IfxDsadc_Cgpwm_Out * pinPos
Positive-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:289
sint16
short sint16
Definition: Platform_Types.h:126
IfxDsadc_Dsadc_AuxFilterConfig::serviceRequest
IfxDsadc_AuxServiceRequest serviceRequest
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:180
IfxDsadc_Dsadc_CarrierGenConfig::frequency
float32 frequency
Expected excitation frequency in Hz.
Definition: IfxDsadc_Dsadc.h:288
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxDsadc_Dsadc_IntegratorConfig::integrationCount
uint16 integrationCount
Number of integrated values after discard step: 1 .. 64.
Definition: IfxDsadc_Dsadc.h:244
IfxDsadc_SampleClockSource_internal
Internal clock.
Definition: IfxDsadc.h:320
IfxDsadc_Dsadc_CombFilterConfig::decimationFactor
uint16 decimationFactor
4 .. 256
Definition: IfxDsadc_Dsadc.h:211
IfxDsadc_Dsadc_Channel
Channel handle structure.
Definition: IfxDsadc_Dsadc.h:297
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1612
IfxDsadc_MainServiceRequest_everyNewResult
Always, for each new result value.
Definition: IfxDsadc.h:266
IfxDsadc_Dsadc_ChannelPins::dsn
IFX_CONST IfxDsadc_Dsn_In * dsn
the DSN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:196
IfxDsadc_Dsadc_IntegratorConfig::windowSize
IfxDsadc_IntegrationWindowSize windowSize
Integrator window size.
Definition: IfxDsadc_Dsadc.h:242
IfxDsadc_Dsadc_FirFilterConfig::fir1Enabled
boolean fir1Enabled
FIR filter 0 enable/disable selection.
Definition: IfxDsadc_Dsadc.h:232
IfxDsadc_Dsadc_initAuxFilter
IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config)
Initialises the auxilary filter.
Definition: IfxDsadc_Dsadc.c:129
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxDsadc_Dsadc_ModulatorConfig::positiveInput
IfxDsadc_InputConfig positiveInput
Modulator configuration of positive input line.
Definition: IfxDsadc_Dsadc.h:252
IfxDsadc_Dsadc_Config
Clock configuration data structure.
Definition: IfxDsadc_Dsadc.h:322
IfxDsadc_Dsadc_CarrierGenConfig::pinMode
IfxPort_OutputMode pinMode
Carrier pins output mode.
Definition: IfxDsadc_Dsadc.h:291
IfxDsadc_Dsadc_CarrierGenConfig::pinNeg
IFX_CONST IfxDsadc_Cgpwm_Out * pinNeg
Negative-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:290
IfxDsadc_Dsadc_CombFilterConfig::startValue
uint16 startValue
4 .. decimationFactor
Definition: IfxDsadc_Dsadc.h:212
IfxDsadc_Dsadc_ChannelConfig::modulator
IfxDsadc_Dsadc_ModulatorConfig modulator
Modulator configuration structure.
Definition: IfxDsadc_Dsadc.h:310
IfxDsadc_Dsadc_getAuxResult
sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain.
Definition: IfxDsadc_Dsadc.c:123
IfxDsadc_CarrierWaveformMode_sine
Carrier Generator generates sine wave.
Definition: IfxDsadc.h:115
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxDsadc_getModulatorInputClockFreq
float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
Get the input frequency of DSADC in Hz.
Definition: IfxDsadc.c:117
IfxDsadc_Dsadc_initFirFilter
IFX_STATIC void IfxDsadc_Dsadc_initFirFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config)
Initialises the fir filter.
Definition: IfxDsadc_Dsadc.c:351
IfxDsadc_Dsadc_ChannelPins::itr
IFX_CONST IfxDsadc_Itr_In * itr
the ITR Pin which should be configured
Definition: IfxDsadc_Dsadc.h:194
IfxDsadc_Dsadc_ChannelConfig::integrator
IfxDsadc_Dsadc_IntegratorConfig integrator
Integrator configuration structure.
Definition: IfxDsadc_Dsadc.h:314
IfxDsadc_Dsadc_Channel::channel
Ifx_DSADC_CH * channel
Specifies the pointer to the DSADC channel registers.
Definition: IfxDsadc_Dsadc.h:300
IfxDsadc_Dsadc_ChannelConfig::combFilter
IfxDsadc_Dsadc_CombFilterConfig combFilter
Comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:312
IfxDsadc_Dsadc_Config::lowPowerSupply
IfxDsadc_LowPowerSupply lowPowerSupply
Low power supply voltage selection.
Definition: IfxDsadc_Dsadc.h:326
IfxDsadc_Dsadc_RectifierConfig::signDelay
uint8 signDelay
Sign delay value.
Definition: IfxDsadc_Dsadc.h:266
IfxDsadc_Dsadc_ModulatorConfig::modulatorClockFreq
float32 modulatorClockFreq
Modulator clock frequency.
Definition: IfxDsadc_Dsadc.h:256
IfxDsadc_Dsadc_CombFilterConfig::combFilterShift
IfxDsadc_MainCombFilterShift combFilterShift
Comb Filter (Main Chain) shift control.
Definition: IfxDsadc_Dsadc.h:209
IfxDsadc_initCinPin
IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
Initializes a CIN input.
Definition: IfxDsadc.h:637
IfxDsadc_Dsadc_AuxFilterConfig::eventSelect
IfxDsadc_AuxEvent eventSelect
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:181
IfxDsadc_Dsadc_FirFilterConfig
FIR filters configuration structure.
Definition: IfxDsadc_Dsadc.h:229
IfxDsadc_Dsadc_DemodulatorConfig::triggerInput
IfxDsadc_TriggerInput triggerInput
Trigger selection.
Definition: IfxDsadc_Dsadc.h:220
IfxDsadc_Dsadc_ModulatorConfig::inputPin
IfxDsadc_InputPin inputPin
Modulator input pin selection.
Definition: IfxDsadc_Dsadc.h:255
IfxDsadc_Dsadc_CarrierGenConfig::carrierWaveformMode
IfxDsadc_CarrierWaveformMode carrierWaveformMode
Carrier generation mode.
Definition: IfxDsadc_Dsadc.h:285
IfxDsadc_Dsadc_ModulatorConfig
Modulator configuration structure.
Definition: IfxDsadc_Dsadc.h:250
IfxDsadc_Dsadc_ModulatorConfig::commonModeVoltage
IfxDsadc_CommonModeVoltage commonModeVoltage
Modulator common mode voltage selection.
Definition: IfxDsadc_Dsadc.h:257
IfxDsadc_AuxServiceRequest_never
Never, service requests disabled.
Definition: IfxDsadc.h:102
IfxDsadc_Dsadc_RectifierConfig
Rectifier configuration structure.
Definition: IfxDsadc_Dsadc.h:262
IfxDsadc_Dsadc_initCarrierGenConfig
void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
Definition: IfxDsadc_Dsadc.c:463
IfxDsadc_Dsadc_calcDIVx
IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx(float32 sourceFreq, float32 *targetFreq)
calculate division factor
Definition: IfxDsadc_Dsadc.c:95
IfxDsadc_Dsadc_initModule
void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:407
IfxDsadc_Dsadc_AuxFilterConfig::eventGate
IfxDsadc_AuxGate eventGate
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:182
IfxDsadc_AuxEvent_everyNewResult
Always, for each new result value.
Definition: IfxDsadc.h:83
IfxDsadc_TimestampTrigger_noTrigger
No timestamp trigger.
Definition: IfxDsadc.h:354
IfxDsadc_RectifierSignSource_onChipGenerator
On-chip carrier generator.
Definition: IfxDsadc.h:309
IfxDsadc_Dsadc_DemodulatorConfig::timestampTrigger
IfxDsadc_TimestampTrigger timestampTrigger
Timestamp trigger mode selection.
Definition: IfxDsadc_Dsadc.h:222
IfxDsadc_initDspPin
IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxDsadc.h:677
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxDsadc_Dsadc_AuxFilterConfig::combFilterType
IfxDsadc_AuxCombFilterType combFilterType
Comb Filter (auxiliary) configuration/type.
Definition: IfxDsadc_Dsadc.h:178
IfxDsadc_TriggerInput_a
dsadc trig 0
Definition: IfxDsadc.h:365
IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxDsadc_Dsadc.h:306
IfxDsadc_Dsadc_ChannelPins::cinMode
IfxPort_InputMode cinMode
the CIN pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:191
IfxDsadc_AuxCombFilterType_comb1
CIC1.
Definition: IfxDsadc.h:72
IfxDsadc_Dsadc_CombFilterConfig::serviceRequest
IfxDsadc_MainServiceRequest serviceRequest
Service request generation (main chain)
Definition: IfxDsadc_Dsadc.h:210
IfxDsadc_initDinPin
IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
Initializes a DIN input.
Definition: IfxDsadc.h:657
IfxDsadc_Dsadc_ModulatorConfig::inputGain
IfxDsadc_InputGain inputGain
Modulator gain select of analog input path.
Definition: IfxDsadc_Dsadc.h:254
IfxDsadc_initItrPin
IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
Initializes a ITR input.
Definition: IfxDsadc.h:687
sint32
long sint32
Definition: Platform_Types.h:131
IfxDsadc_Dsadc_ChannelPins::itrMode
IfxPort_InputMode itrMode
the ITR pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:195
IfxDsadc_Dsadc_RectifierConfig::signPeriod
uint8 signPeriod
Sign period.
Definition: IfxDsadc_Dsadc.h:267
IfxDsadc_ModulatorClock_fDSD
f_dsd clock selected
Definition: IfxDsadc.h:275
IfxDsadc_initDsnPin
IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a DS input.
Definition: IfxDsadc.h:667
IfxDsadc_SampleStrobe_sampleOnRisingEdge
Direct clock, a sample trigger is generated at each rising clock edge.
Definition: IfxDsadc.h:332
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:39
IfxDsadc_Dsadc_RectifierConfig::enabled
boolean enabled
Rectification enable/disable selection.
Definition: IfxDsadc_Dsadc.h:264
IfxDsadc_Dsadc_FirFilterConfig::offsetCompensation
boolean offsetCompensation
Offset Compensation Filter enable/disable selection.
Definition: IfxDsadc_Dsadc.h:233
IfxDsadc_Dsadc_ChannelPins::dsp
IFX_CONST IfxDsadc_Dsp_In * dsp
the DSP Pin which should be configured
Definition: IfxDsadc_Dsadc.h:198
IfxDsadc_Dsadc_RectifierConfig::signSource
IfxDsadc_RectifierSignSource signSource
Rectifier sign source.
Definition: IfxDsadc_Dsadc.h:265
IfxDsadc_FirInternalShift_noShift
no shift, use full range
Definition: IfxDsadc.h:155
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxDsadc_Dsadc_DemodulatorConfig::sampleStrobe
IfxDsadc_SampleStrobe sampleStrobe
Demodulator data strobe generation mode selection.
Definition: IfxDsadc_Dsadc.h:224
IfxDsadc_Dsadc_CombFilterConfig::combFilterType
IfxDsadc_MainCombFilterType combFilterType
Comb Filter (Main Chain) configuration/type.
Definition: IfxDsadc_Dsadc.h:208
IfxDsadc_Dsadc_initModulator
IFX_STATIC void IfxDsadc_Dsadc_initModulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config)
Initialises the modulator.
Definition: IfxDsadc_Dsadc.c:382
IfxDsadc_InputGain_factor1
Input gain factor: 1.
Definition: IfxDsadc.h:188
IfxDsadc_Dsadc_ChannelConfig::auxFilter
IfxDsadc_Dsadc_AuxFilterConfig auxFilter
Auxiliary comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:315
IfxDsadc_Dsadc_CombFilterConfig::bypassed
boolean bypassed
CIC Filter enable/bypass selection.
Definition: IfxDsadc_Dsadc.h:207
IfxDsadc_Dsadc_ChannelPins
Channel Pins Configuration structure.
Definition: IfxDsadc_Dsadc.h:188
IfxDsadc_Dsadc_IntegratorConfig::integrationCycles
uint16 integrationCycles
Number of integration cycles: 1 .. 16. Used only when IfxDsadc_IntegrationWindowSize_internalControl...
Definition: IfxDsadc_Dsadc.h:245
IfxDsadc_Dsadc_ChannelConfig::demodulator
IfxDsadc_Dsadc_DemodulatorConfig demodulator
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:311
IfxDsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxDsadc.h:122
IfxDsadc_FirDataShift_noShift
no shift, use full range
Definition: IfxDsadc.h:143
IfxDsadc_Dsadc_ChannelPins::dspMode
IfxPort_InputMode dspMode
the DSP pin output mode which should be configured
Definition: IfxDsadc_Dsadc.h:199
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:57
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxDsadc_Dsadc_initCarrierGen
void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator.
Definition: IfxDsadc_Dsadc.c:148
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:66
IfxDsadc_initCgPwmPin
IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a CGPWM output.
Definition: IfxDsadc.h:630
IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure.
Definition: IfxDsadc_Dsadc.h:283
IfxDsadc_CommonModeVoltage_c
VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals.
Definition: IfxDsadc.h:134
IfxDsadc_Dsadc_initChannelConfig
void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration.
Definition: IfxDsadc_Dsadc.c:237
IfxDsadc_Dsadc_DemodulatorConfig::integrationTrigger
IfxDsadc_IntegratorTrigger integrationTrigger
Integrator trigger mode selection.
Definition: IfxDsadc_Dsadc.h:221
IfxDsadc_Dsadc_ChannelPins::cin
IFX_CONST IfxDsadc_Cin_In * cin
the CIN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:190
IfxDsadc_Dsadc_CarrierGenConfig::inverted
boolean inverted
Signal polarity (Normal / Inverted) selection.
Definition: IfxDsadc_Dsadc.h:286
IfxDsadc_AuxCombFilterShift_noShift
no shift, use full range
Definition: IfxDsadc.h:61


iLLD_TC26B: IfxDsadc_Dsadc.h Source File

  • Dsadc
  • Dsadc
IfxDsadc_Dsadc.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_Dsadc.h
3 * \brief DSADC DSADC details
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dsadc_Dsadc_Usage How to use the DSADC Interface driver?
25 * \ingroup IfxLld_Dsadc
26 *
27 * The DSADC interface driver provides a default DSADC configuration for converting analog data streams inputs from external modulators via digital input channels, into digital values by using the on-chip demodulator channels.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework.
30 *
31 * \section IfxLld_Dsadc_Dsadc_Preparation Preparation
32 * \subsection IfxLld_Dsadc_Dsadc_Include Include Files
33 *
34 * Include following header file into your C code:
35 * \code
36 * #include <Dsadc/Dsadc/IfxDsadc_Dsadc.h>
37 *
38 * \endcode
39 *
40 * \subsection IfxLld_Dsadc_Dsadc_Variables Variables
41 *
42 * Declare the DSADC channel handle and available channels as global variables in your C code:
43 *
44 * \code
45 * static IfxDsadc_Dsadc dsadc;
46 * IfxDsadc_Dsadc_Channel dsadcChannel[IFXDSADC_NUM_CHANNELS];
47 *
48 * #if defined(DERIVATIVE_TC22x) || defined(DERIVATIVE_TC23x) || defined(DERIVATIVE_TC24x)
49 * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 0, 1 };
50 *
51 * #elif defined(DERIVATIVE_TC27x) || defined(DERIVATIVE_TC27xB) || defined(DERIVATIVE_TC27xC) || defined(DERIVATIVE_TC27xD)
52 * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1 };
53 *
54 * #elif defined(DERIVATIVE_TC26x) || defined(DERIVATIVE_TC26xB)
55 * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 1, 1 };
56 *
57 * #elif defined(DERIVATIVE_TC29x) || defined(DERIVATIVE_TC29xB)
58 * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
59 *
60 * #else
61 * # error "Testcase not prepared for this derivative!"
62 * #endif
63 * \endcode
64 *
65 *
66 * \subsection IfxLld_Dsadc_Dsadc_Init Module Initialisation
67 *
68 * The module initialisation can be done in the same function. Here an example:
69 * \code
70 *
71 * // create module config
72 * IfxDsadc_Dsadc_Config dsadcConfig;
73 * IfxDsadc_Dsadc_initModuleConfig(&dsadcConfig, &MODULE_DSADC);
74 *
75 * // initialize module
76 *
77 * IfxDsadc_Dsadc_initModule(&dsadc, &dsadcConfig);
78 *
79 * // create channel config
80 * IfxDsadc_Dsadc_ChannelConfig dsadcChannelConfig;
81 * IfxDsadc_Dsadc_initChannelConfig(&dsadcChannelConfig, &dsadc);
82 *
83 * // modify default configuration
84 * dsadcChannelConfig.modulator.positiveInput = IfxDsadc_InputConfig_inputPin;
85 * dsadcChannelConfig.modulator.negativeInput = IfxDsadc_InputConfig_inputPin;
86 * dsadcChannelConfig.modulator.inputGain = IfxDsadc_InputGain_factor1;
87 * dsadcChannelConfig.modulator.inputPin = IfxDsadc_InputPin_a;
88 * dsadcChannelConfig.modulator.modulatorClockFreq = 10.0e6;
89 * dsadcChannelConfig.modulator.commonModeVoltage = IfxDsadc_CommonModeVoltage_c;
90 *
91 * dsadcChannelConfig.combFilter.bypassed = FALSE;
92 * dsadcChannelConfig.combFilter.combFilterType = IfxDsadc_MainCombFilterType_comb3;
93 * dsadcChannelConfig.combFilter.combFilterShift = IfxDsadc_MainCombFilterShift_noShift;
94 * dsadcChannelConfig.combFilter.serviceRequest = IfxDsadc_MainServiceRequest_everyNewResult;
95 * dsadcChannelConfig.combFilter.decimationFactor = 32;
96 * dsadcChannelConfig.combFilter.startValue = 32;
97 *
98 * dsadcChannelConfig.firFilter.fir0Enabled = TRUE;
99 * dsadcChannelConfig.firFilter.fir1Enabled = TRUE;
100 * dsadcChannelConfig.firFilter.offsetCompensation = FALSE;
101 * dsadcChannelConfig.firFilter.dataShift = IfxDsadc_FirDataShift_shiftBy2;
102 * dsadcChannelConfig.firFilter.internalShift = IfxDsadc_FirInternalShift_shiftBy1;
103 *
104 *
105 * // initialize channels
106 * for(int chn=0; chn<IFXDSADC_NUM_CHANNELS; ++chn) {
107 * if( dsadcChannelAvailable[chn] ) {
108 * dsadcChannelConfig.channelId = (IfxDsadc_ChannelId)chn;
109 *
110 * IfxDsadc_Dsadc_initChannel(&dsadcChannel[chn], &dsadcChannelConfig);
111 * }
112 * }
113 * \endcode
114 *
115 * The DSADC is ready for use now!
116 *
117 *
118 * \section IfxLld_Dsadc_Dsadc_Conversions Conversions
119 *
120 * The DSADC driver provides simple to use Conversion function,
121 *
122 * \code
123 * // start conversions
124 * IfxDsadc_Dsadc_startScan(&dsadc, 0x3f, 0x3f);
125 *
126 * // results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)
127 * \endcode
128 *
129 * The converted data can be collected using the following function
130 *
131 * \code
132 * // declared globally
133 * // sint16 result[];
134 * for(int chn=0; chn<IFXDSADC_NUM_CHANNELS; ++chn) {
135 * if( dsadcChannelAvailable[chn] ) {
136 * result = IfxDsadc_Dsadc_getMainResult(&dsadcChannel[chn]));
137 * }
138 * }
139 * \endcode
140 *
141 * \defgroup IfxLld_Dsadc_Dsadc DSADC
142 * \ingroup IfxLld_Dsadc
143 * \defgroup IfxLld_Dsadc_Dsadc_DataStructures Data Structures
144 * \ingroup IfxLld_Dsadc_Dsadc
145 * \defgroup IfxLld_Dsadc_Dsadc_Module Module Functions
146 * \ingroup IfxLld_Dsadc_Dsadc
147 * \defgroup IfxLld_Dsadc_Dsadc_Channel Channel Functions
148 * \ingroup IfxLld_Dsadc_Dsadc
149 * \defgroup IfxLld_Dsadc_Dsadc_Operative Operative Functions
150 * \ingroup IfxLld_Dsadc_Dsadc
151 * \defgroup IfxLld_Dsadc_Dsadc_Results Result Functions
152 * \ingroup IfxLld_Dsadc_Dsadc
153 * \defgroup IfxLld_Dsadc_Dsadc_Interrupt Interrupt Functions
154 * \ingroup IfxLld_Dsadc_Dsadc
155 */
156
157 #ifndef IFXDSADC_DSADC_H
158 #define IFXDSADC_DSADC_H 1
159
160 /******************************************************************************/
161 /*----------------------------------Includes----------------------------------*/
162 /******************************************************************************/
163
164 #include "Dsadc/Std/IfxDsadc.h"
165 #include "Scu/Std/IfxScuWdt.h"
166
167 /******************************************************************************/
168 /*-----------------------------Data Structures--------------------------------*/
169 /******************************************************************************/
170
171 /** \addtogroup IfxLld_Dsadc_Dsadc_DataStructures
172 * \{ */
173 /** \brief Auxiliary comb filter configuration structure
174 */
175 typedef struct
176 {
177 boolean bypassed;
178 IfxDsadc_AuxCombFilterType combFilterType; /**< \brief Comb Filter (auxiliary) configuration/type */
179 IfxDsadc_AuxCombFilterShift combFilterShift; /**< \brief Comb Filter (auxiliary) shift control */
180 IfxDsadc_AuxServiceRequest serviceRequest; /**< \brief Service request generation (auxiliary) */
181 IfxDsadc_AuxEvent eventSelect; /**< \brief Service request generation (auxiliary) */
182 IfxDsadc_AuxGate eventGate; /**< \brief Service request generation (auxiliary) */
183 uint8 decimationFactor; /**< \brief CIC Filter (Auxiliary) decimation factor (4 .. 32) */
184 } IfxDsadc_Dsadc_AuxFilterConfig;
185
186 /** \brief Channel Pins Configuration structure
187 */
188 typedef struct
189 {
190 IFX_CONST IfxDsadc_Cin_In *cin; /**< \brief the CIN Pin which should be configured */
191 IfxPort_InputMode cinMode; /**< \brief the CIN pin input mode which should be configured */
192 IFX_CONST IfxDsadc_Din_In *din; /**< \brief the DIN Pin which should be configured */
193 IfxPort_InputMode dinMode; /**< \brief the DIN pin input mode which should be configured */
194 IFX_CONST IfxDsadc_Itr_In *itr; /**< \brief the ITR Pin which should be configured */
195 IfxPort_InputMode itrMode; /**< \brief the ITR pin input mode which should be configured */
196 IFX_CONST IfxDsadc_Dsn_In *dsn; /**< \brief the DSN Pin which should be configured */
197 IfxPort_InputMode dsnMode; /**< \brief the DSN pin output mode which should be configured */
198 IFX_CONST IfxDsadc_Dsp_In *dsp; /**< \brief the DSP Pin which should be configured */
199 IfxPort_InputMode dspMode; /**< \brief the DSP pin output mode which should be configured */
200 IfxPort_PadDriver pinDriver; /**< \brief Pin Driver Configuration */
201 } IfxDsadc_Dsadc_ChannelPins;
202
203 /** \brief Comb filter configuration structure
204 */
205 typedef struct
206 {
207 boolean bypassed; /**< \brief CIC Filter enable/bypass selection */
208 IfxDsadc_MainCombFilterType combFilterType; /**< \brief Comb Filter (Main Chain) configuration/type */
209 IfxDsadc_MainCombFilterShift combFilterShift; /**< \brief Comb Filter (Main Chain) shift control */
210 IfxDsadc_MainServiceRequest serviceRequest; /**< \brief Service request generation (main chain) */
211 uint16 decimationFactor; /**< \brief 4 .. 256 */
212 uint16 startValue; /**< \brief 4 .. decimationFactor */
213 } IfxDsadc_Dsadc_CombFilterConfig;
214
215 /** \brief Demodulator configuration structure
216 */
217 typedef struct
218 {
219 IfxDsadc_InputDataSource inputDataSource; /**< \brief Demodulator input data source selection */
220 IfxDsadc_TriggerInput triggerInput; /**< \brief Trigger selection */
221 IfxDsadc_IntegratorTrigger integrationTrigger; /**< \brief Integrator trigger mode selection */
222 IfxDsadc_TimestampTrigger timestampTrigger; /**< \brief Timestamp trigger mode selection */
223 IfxDsadc_SampleClockSource sampleClockSource; /**< \brief Demodulator sample clock source selection */
224 IfxDsadc_SampleStrobe sampleStrobe; /**< \brief Demodulator data strobe generation mode selection */
225 } IfxDsadc_Dsadc_DemodulatorConfig;
226
227 /** \brief FIR filters configuration structure
228 */
229 typedef struct
230 {
231 boolean fir0Enabled; /**< \brief FIR filter 0 enable/disable selection */
232 boolean fir1Enabled; /**< \brief FIR filter 0 enable/disable selection */
233 boolean offsetCompensation; /**< \brief Offset Compensation Filter enable/disable selection */
234 IfxDsadc_FirDataShift dataShift; /**< \brief FIR data shift control selection */
235 IfxDsadc_FirInternalShift internalShift; /**< \brief FIR shift control selction */
236 } IfxDsadc_Dsadc_FirFilterConfig;
237
238 /** \brief Integrator configuration structure
239 */
240 typedef struct
241 {
242 IfxDsadc_IntegrationWindowSize windowSize; /**< \brief Integrator window size */
243 uint16 discardCount; /**< \brief Number of discarded values to after active trigger: 1 .. 64 */
244 uint16 integrationCount; /**< \brief Number of integrated values after discard step: 1 .. 64 */
245 uint16 integrationCycles; /**< \brief Number of integration cycles: 1 .. 16. Used only when \ref IfxDsadc_IntegrationWindowSize_internalControl */
246 } IfxDsadc_Dsadc_IntegratorConfig;
247
248 /** \brief Modulator configuration structure
249 */
250 typedef struct
251 {
252 IfxDsadc_InputConfig positiveInput; /**< \brief Modulator configuration of positive input line */
253 IfxDsadc_InputConfig negativeInput; /**< \brief Modulator configuration of negative input line */
254 IfxDsadc_InputGain inputGain; /**< \brief Modulator gain select of analog input path */
255 IfxDsadc_InputPin inputPin; /**< \brief Modulator input pin selection */
256 float32 modulatorClockFreq; /**< \brief Modulator clock frequency */
257 IfxDsadc_CommonModeVoltage commonModeVoltage; /**< \brief Modulator common mode voltage selection */
258 } IfxDsadc_Dsadc_ModulatorConfig;
259
260 /** \brief Rectifier configuration structure
261 */
262 typedef struct
263 {
264 boolean enabled; /**< \brief Rectification enable/disable selection */
265 IfxDsadc_RectifierSignSource signSource; /**< \brief Rectifier sign source */
266 uint8 signDelay; /**< \brief Sign delay value */
267 uint8 signPeriod; /**< \brief Sign period */
268 } IfxDsadc_Dsadc_RectifierConfig;
269
270 /** \} */
271
272 /** \addtogroup IfxLld_Dsadc_Dsadc_DataStructures
273 * \{ */
274 /** \brief DSADC handle data structure
275 */
276 typedef struct
277 {
278 Ifx_DSADC *dsadc; /**< \brief Specifies the pointer to the DSADC module registers */
279 } IfxDsadc_Dsadc;
280
281 /** \brief Carrier generation configuration structure
282 */
283 typedef struct
284 {
285 IfxDsadc_CarrierWaveformMode carrierWaveformMode; /**< \brief Carrier generation mode */
286 boolean inverted; /**< \brief Signal polarity (Normal / Inverted) selection */
287 boolean bitReversed; /**< \brief Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection */
288 float32 frequency; /**< \brief Expected excitation frequency in Hz. */
289 IFX_CONST IfxDsadc_Cgpwm_Out *pinPos; /**< \brief Positive-carrier pin configuration */
290 IFX_CONST IfxDsadc_Cgpwm_Out *pinNeg; /**< \brief Negative-carrier pin configuration */
291 IfxPort_OutputMode pinMode; /**< \brief Carrier pins output mode */
292 IfxPort_PadDriver pinDriver; /**< \brief Carrier pins pad driver */
293 } IfxDsadc_Dsadc_CarrierGenConfig;
294
295 /** \brief Channel handle structure
296 */
297 typedef struct
298 {
299 Ifx_DSADC *module; /**< \brief Specifies the pointer to the DSADC module registers */
300 Ifx_DSADC_CH *channel; /**< \brief Specifies the pointer to the DSADC channel registers */
301 IfxDsadc_ChannelId channelId; /**< \brief Channel Id */
302 } IfxDsadc_Dsadc_Channel;
303
304 /** \brief Single channel configuration structure
305 */
306 typedef struct
307 {
308 Ifx_DSADC *module; /**< \brief Specifies the pointer to the DSADC module registers */
309 IfxDsadc_ChannelId channelId; /**< \brief Channel Id */
310 IfxDsadc_Dsadc_ModulatorConfig modulator; /**< \brief Modulator configuration structure */
311 IfxDsadc_Dsadc_DemodulatorConfig demodulator; /**< \brief Demodulator configuration structure */
312 IfxDsadc_Dsadc_CombFilterConfig combFilter; /**< \brief Comb filter configuration structure */
313 IfxDsadc_Dsadc_FirFilterConfig firFilter; /**< \brief FIR filters configuration structure */
314 IfxDsadc_Dsadc_IntegratorConfig integrator; /**< \brief Integrator configuration structure */
315 IfxDsadc_Dsadc_AuxFilterConfig auxFilter; /**< \brief Auxiliary comb filter configuration structure */
316 IfxDsadc_Dsadc_RectifierConfig rectifier; /**< \brief Rectifier configuration structure */
317 IFX_CONST IfxDsadc_Dsadc_ChannelPins *channelPins; /**< \brief Channel Pins Configuration structure */
318 } IfxDsadc_Dsadc_ChannelConfig;
319
320 /** \brief Clock configuration data structure
321 */
322 typedef struct
323 {
324 Ifx_DSADC *dsadc; /**< \brief Specifies the pointer to the DSADC module registers */
325 IfxDsadc_ModulatorClock modulatorClockSelect; /**< \brief Modulator clock selection */
326 IfxDsadc_LowPowerSupply lowPowerSupply; /**< \brief Low power supply voltage selection */
327 } IfxDsadc_Dsadc_Config;
328
329 /** \} */
330
331 /** \addtogroup IfxLld_Dsadc_Dsadc_Module
332 * \{ */
333
334 /******************************************************************************/
335 /*-------------------------Global Function Prototypes-------------------------*/
336 /******************************************************************************/
337
338 /** \brief Initialise the DSADC carrier generator
339 * \param dsadc pointer to the DSADC handle (it will be initialized by this function)
340 * \param config pointer to the DSADC carrier configuration
341 * \return None
342 */
343 IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config);
344
345 /** \brief Initialise the DSADC with the supplied configuration
346 * \param dsadc pointer to the DSADC handle (it will be initialized by this function)
347 * \param config pointer to the DSADC module configuration
348 * \return None
349 *
350 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
351 *
352 */
353 IFX_EXTERN void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config);
354
355 /** \brief Initialise the config struct with default DSADC configuration
356 * \param config pointer to the DSADC module configuration
357 * \param dsadc base address of the DSADC register space
358 * \return None
359 *
360 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
361 *
362 */
363 IFX_EXTERN void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc);
364
365 /** \} */
366
367 /** \addtogroup IfxLld_Dsadc_Dsadc_Channel
368 * \{ */
369
370 /******************************************************************************/
371 /*-------------------------Global Function Prototypes-------------------------*/
372 /******************************************************************************/
373
374 /** \brief Initialise a DSADC channel with the supplied configuration
375 * \param channel pointer to the DSADC channel handle (it will be initialized by this function)
376 * \param config pointer to the DSADC Channel configuration
377 * \return None
378 *
379 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
380 *
381 */
382 IFX_EXTERN void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config);
383
384 /** \brief Initialise the config struct with default DSADC channel configuration
385 * \param config pointer to the DSADC Channel configuration (it will be initialized by this function)
386 * \param dsadc pointer to the DSADC handle
387 * \return None
388 *
389 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
390 *
391 */
392 IFX_EXTERN void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc);
393
394 /** \} */
395
396 /** \addtogroup IfxLld_Dsadc_Dsadc_Operative
397 * \{ */
398
399 /******************************************************************************/
400 /*-------------------------Inline Function Prototypes-------------------------*/
401 /******************************************************************************/
402
403 /** \brief Enables the conversion of multiple channels
404 * \param dsadc Pointer to the DSADC handle
405 * \param modulatorMask the modulator which should be running (bitwise selection)
406 * \param channelMask the channels which should be scanned (bitwise selection)
407 * \return None
408 *
409 * A coding example can be found in \ref IfxLld_Dsadc_Dsadc_Usage
410 *
411 */
412 IFX_INLINE void IfxDsadc_Dsadc_startScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask);
413
414 /** \brief Disables the conversion of multiple channels
415 * \param dsadc Pointer to the DSADC handle
416 * \param modulatorMask the modulator which should be running (bitwise selection)
417 * \return None
418 *
419 * \code
420 * // disable the modulators of all 6 DSADC channels
421 * IfxDsadc_Dsadc_stopScan(&dsadc, 0x3f);
422 * \endcode
423 *
424 */
425 IFX_INLINE void IfxDsadc_Dsadc_stopScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask);
426
427 /** \} */
428
429 /** \addtogroup IfxLld_Dsadc_Dsadc_Results
430 * \{ */
431
432 /******************************************************************************/
433 /*-------------------------Inline Function Prototypes-------------------------*/
434 /******************************************************************************/
435
436 /** \brief Get result from the main chain
437 * \param channel Pointer to the DSADC channel handle
438 * \return result from the main chain
439 */
440 IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult(IfxDsadc_Dsadc_Channel *channel);
441
442 /******************************************************************************/
443 /*-------------------------Global Function Prototypes-------------------------*/
444 /******************************************************************************/
445
446 /** \brief Get result from the auxilary chain
447 * \param channel Pointer to the DSADC channel handle
448 * \return result from the auxiliary chain
449 */
450 IFX_EXTERN sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel);
451
452 /** \} */
453
454 /** \addtogroup IfxLld_Dsadc_Dsadc_Interrupt
455 * \{ */
456
457 /******************************************************************************/
458 /*-------------------------Inline Function Prototypes-------------------------*/
459 /******************************************************************************/
460
461 /** \brief Get the interrupt source register for a Aux event
462 * \param channel Pointer to the DSADC channel handle
463 * \return Address/pointer to the interrupt source register
464 */
465 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getAuxSrc(IfxDsadc_Dsadc_Channel *channel);
466
467 /** \brief Get the interrupt source register for a Main event
468 * \param channel Pointer to the DSADC channel handle
469 * \return Address/pointer to the interrupt source register
470 */
471 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getMainSrc(IfxDsadc_Dsadc_Channel *channel);
472
473 /** \} */
474
475 /******************************************************************************/
476 /*-------------------------Global Function Prototypes-------------------------*/
477 /******************************************************************************/
478
479 /**
480 * \param config Pointer to DSADC Carrier Configuration
481 * \return None
482 */
483 IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config);
484
485 /******************************************************************************/
486 /*---------------------Inline Function Implementations------------------------*/
487 /******************************************************************************/
488
489 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getAuxSrc(IfxDsadc_Dsadc_Channel *channel)
490 {
491 return IfxDsadc_getAuxSrc(channel->module, channel->channelId);
492 }
493
494
495 IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult(IfxDsadc_Dsadc_Channel *channel)
496 {
497 return IfxDsadc_getMainResult(channel->module, channel->channelId);
498 }
499
500
501 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getMainSrc(IfxDsadc_Dsadc_Channel *channel)
502 {
503 return IfxDsadc_getMainSrc(channel->module, channel->channelId);
504 }
505
506
507 IFX_INLINE void IfxDsadc_Dsadc_startScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
508 {
509 IfxDsadc_startScan(dsadc->dsadc, modulatorMask, channelMask);
510 }
511
512
513 IFX_INLINE void IfxDsadc_Dsadc_stopScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
514 {
515 IfxDsadc_stopScan(dsadc->dsadc, modulatorMask);
516 }
517
518
519 #endif /* IFXDSADC_DSADC_H */
IfxDsadc_Dsadc_AuxFilterConfig::combFilterShift
IfxDsadc_AuxCombFilterShift combFilterShift
Comb Filter (auxiliary) shift control.
Definition: IfxDsadc_Dsadc.h:179
IfxDsadc_Dsadc_FirFilterConfig::fir0Enabled
boolean fir0Enabled
FIR filter 0 enable/disable selection.
Definition: IfxDsadc_Dsadc.h:231
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:84
IfxDsadc_Dsadc::dsadc
Ifx_DSADC * dsadc
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:278
IfxDsadc_Dsadc_AuxFilterConfig::decimationFactor
uint8 decimationFactor
CIC Filter (Auxiliary) decimation factor (4 .. 32)
Definition: IfxDsadc_Dsadc.h:183
IfxDsadc_Dsadc_ChannelPins::din
IFX_CONST IfxDsadc_Din_In * din
the DIN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:192
IfxDsadc_TimestampTrigger
IfxDsadc_TimestampTrigger
Timestamp trigger mode Definition in Ifx_DSADC.DICFG.B.TSTRMODE.
Definition: IfxDsadc.h:352
IfxDsadc_Dsadc_DemodulatorConfig
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:217
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:120
IfxDsadc_AuxCombFilterType
IfxDsadc_AuxCombFilterType
Comb Filter (auxiliary) configuration/type Definition in Ifx_DSADC.FCFGA.B.CFAC.
Definition: IfxDsadc.h:70
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:48
IfxDsadc_Dsadc_Channel::module
Ifx_DSADC * module
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:299
IfxDsadc_Dsadc_ChannelPins::dsnMode
IfxPort_InputMode dsnMode
the DSN pin output mode which should be configured
Definition: IfxDsadc_Dsadc.h:197
IfxDsadc_Dsadc_IntegratorConfig::discardCount
uint16 discardCount
Number of discarded values to after active trigger: 1 .. 64.
Definition: IfxDsadc_Dsadc.h:243
IfxDsadc_Dsadc_ChannelConfig::channelPins
IFX_CONST IfxDsadc_Dsadc_ChannelPins * channelPins
Channel Pins Configuration structure.
Definition: IfxDsadc_Dsadc.h:317
IfxDsadc_getMainSrc
volatile Ifx_SRC_SRCR * IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the interrupt source register for a Main event.
Definition: IfxDsadc.c:103
IfxDsadc_Dsadc_DemodulatorConfig::sampleClockSource
IfxDsadc_SampleClockSource sampleClockSource
Demodulator sample clock source selection.
Definition: IfxDsadc_Dsadc.h:223
IfxDsadc_Dsadc_CombFilterConfig
Comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:205
IfxDsadc_Dsadc_initChannel
IFX_EXTERN void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:179
IfxDsadc_Dsadc_IntegratorConfig
Integrator configuration structure.
Definition: IfxDsadc_Dsadc.h:240
IfxDsadc_InputPin
IfxDsadc_InputPin
Modulator input pin selection Definition in Ifx_DSADC.MODCFGx.B.INMUX.
Definition: IfxDsadc.h:198
IfxDsadc_Dsadc_ModulatorConfig::negativeInput
IfxDsadc_InputConfig negativeInput
Modulator configuration of negative input line.
Definition: IfxDsadc_Dsadc.h:253
IfxDsadc_Dsadc_ChannelPins::dinMode
IfxPort_InputMode dinMode
the DIN pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:193
IfxDsadc_Dsadc_Config::modulatorClockSelect
IfxDsadc_ModulatorClock modulatorClockSelect
Modulator clock selection.
Definition: IfxDsadc_Dsadc.h:325
IfxDsadc_Dsadc_ChannelPins::pinDriver
IfxPort_PadDriver pinDriver
Pin Driver Configuration.
Definition: IfxDsadc_Dsadc.h:200
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxDsadc_MainCombFilterShift
IfxDsadc_MainCombFilterShift
Comb Filter (Main Chain) shift control Definition in Ifx_DSADC.FCFGC.B.MFSC.
Definition: IfxDsadc.h:239
float32
float float32
Definition: Platform_Types.h:167
IfxDsadc_Dsadc_ChannelConfig::rectifier
IfxDsadc_Dsadc_RectifierConfig rectifier
Rectifier configuration structure.
Definition: IfxDsadc_Dsadc.h:316
IfxDsadc_AuxCombFilterShift
IfxDsadc_AuxCombFilterShift
Comb Filter (auxiliary) shift control Definition in Ifx_DSADC.FCFGA.B.AFSC.
Definition: IfxDsadc.h:59
IfxDsadc_Dsadc_Channel::channelId
IfxDsadc_ChannelId channelId
Channel Id.
Definition: IfxDsadc_Dsadc.h:301
IfxDsadc_Dsadc_DemodulatorConfig::inputDataSource
IfxDsadc_InputDataSource inputDataSource
Demodulator input data source selection.
Definition: IfxDsadc_Dsadc.h:219
IfxDsadc_Dsadc_startScan
IFX_INLINE void IfxDsadc_Dsadc_startScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxDsadc_Dsadc.h:507
IfxDsadc_Dsadc_initModuleConfig
IFX_EXTERN void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
Initialise the config struct with default DSADC configuration.
Definition: IfxDsadc_Dsadc.c:437
IfxDsadc_Dsadc_CarrierGenConfig::bitReversed
boolean bitReversed
Bit-Reverse PWM Generation (Normal / Bit reverse mode) selection.
Definition: IfxDsadc_Dsadc.h:287
IfxDsadc_FirInternalShift
IfxDsadc_FirInternalShift
FIR shift control Selects the displacement caused by the data shifter inbetween the FIR filter blocks...
Definition: IfxDsadc.h:153
IfxDsadc_Dsadc
DSADC handle data structure.
Definition: IfxDsadc_Dsadc.h:276
IfxDsadc_Dsadc_AuxFilterConfig
Auxiliary comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:175
IfxDsadc_IntegratorTrigger
IfxDsadc_IntegratorTrigger
Integrator trigger mode NOTE: switch-first to bypassed before using other mode Definition in Ifx_DSAD...
Definition: IfxDsadc.h:219
IfxDsadc_Dsadc_FirFilterConfig::internalShift
IfxDsadc_FirInternalShift internalShift
FIR shift control selction.
Definition: IfxDsadc_Dsadc.h:235
IfxDsadc_Dsadc_ChannelConfig::firFilter
IfxDsadc_Dsadc_FirFilterConfig firFilter
FIR filters configuration structure.
Definition: IfxDsadc_Dsadc.h:313
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:75
IfxDsadc_startScan
IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxDsadc.h:728
IfxDsadc_MainCombFilterType
IfxDsadc_MainCombFilterType
Comb Filter (Main Chain) configuration/type Definition in Ifx_DSADC.FCFGC.B.CFMC. ...
Definition: IfxDsadc.h:250
IfxDsadc_SampleStrobe
IfxDsadc_SampleStrobe
Demodulator data strobe generation mode Definition in Ifx_DSADC.DICFG.B.STROBE.
Definition: IfxDsadc.h:329
IfxDsadc_Dsadc_FirFilterConfig::dataShift
IfxDsadc_FirDataShift dataShift
FIR data shift control selection.
Definition: IfxDsadc_Dsadc.h:234
IfxScuWdt.h
SCU basic functionality.
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxDsadc_Dsadc_CarrierGenConfig::pinPos
IFX_CONST IfxDsadc_Cgpwm_Out * pinPos
Positive-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:289
sint16
short sint16
Definition: Platform_Types.h:126
IfxDsadc_Dsadc_initCarrierGenConfig
IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
Definition: IfxDsadc_Dsadc.c:463
IfxDsadc_Dsadc_AuxFilterConfig::serviceRequest
IfxDsadc_AuxServiceRequest serviceRequest
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:180
IfxDsadc_FirDataShift
IfxDsadc_FirDataShift
FIR data shift control Selects the displacement caused by the data shifter at the FIR filter output D...
Definition: IfxDsadc.h:141
IfxDsadc_Dsadc_CarrierGenConfig::frequency
float32 frequency
Expected excitation frequency in Hz.
Definition: IfxDsadc_Dsadc.h:288
IfxDsadc_Dsadc_IntegratorConfig::integrationCount
uint16 integrationCount
Number of integrated values after discard step: 1 .. 64.
Definition: IfxDsadc_Dsadc.h:244
IfxDsadc_Dsadc_CombFilterConfig::decimationFactor
uint16 decimationFactor
4 .. 256
Definition: IfxDsadc_Dsadc.h:211
IfxDsadc_Dsadc_Channel
Channel handle structure.
Definition: IfxDsadc_Dsadc.h:297
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxDsadc_Dsadc_ChannelPins::dsn
IFX_CONST IfxDsadc_Dsn_In * dsn
the DSN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:196
IfxDsadc_Dsadc_IntegratorConfig::windowSize
IfxDsadc_IntegrationWindowSize windowSize
Integrator window size.
Definition: IfxDsadc_Dsadc.h:242
IfxDsadc_Dsadc_FirFilterConfig::fir1Enabled
boolean fir1Enabled
FIR filter 0 enable/disable selection.
Definition: IfxDsadc_Dsadc.h:232
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxDsadc_InputDataSource
IfxDsadc_InputDataSource
Demodulator input data source selection Definition in Ifx_DSADC.DICFG.B.DSRC.
Definition: IfxDsadc.h:173
IfxDsadc_Dsadc_ModulatorConfig::positiveInput
IfxDsadc_InputConfig positiveInput
Modulator configuration of positive input line.
Definition: IfxDsadc_Dsadc.h:252
IfxDsadc_Dsadc_Config
Clock configuration data structure.
Definition: IfxDsadc_Dsadc.h:322
IfxDsadc_Dsadc_CarrierGenConfig::pinMode
IfxPort_OutputMode pinMode
Carrier pins output mode.
Definition: IfxDsadc_Dsadc.h:291
IfxDsadc_Dsadc_CarrierGenConfig::pinNeg
IFX_CONST IfxDsadc_Cgpwm_Out * pinNeg
Negative-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:290
IfxDsadc_Dsadc_CombFilterConfig::startValue
uint16 startValue
4 .. decimationFactor
Definition: IfxDsadc_Dsadc.h:212
IfxDsadc_CommonModeVoltage
IfxDsadc_CommonModeVoltage
Modulator common mode voltage selection Definition in Ifx_DSADC.MODCFGx.B.CMVS.
Definition: IfxDsadc.h:130
IfxDsadc_SampleClockSource
IfxDsadc_SampleClockSource
Demodulator sample clock source select Definition in Ifx_DSADC.DICFG.B.CSRC.
Definition: IfxDsadc.h:318
IfxDsadc_Dsadc_ChannelConfig::modulator
IfxDsadc_Dsadc_ModulatorConfig modulator
Modulator configuration structure.
Definition: IfxDsadc_Dsadc.h:310
IfxDsadc_Dsadc_getAuxResult
IFX_EXTERN sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel)
Get result from the auxilary chain.
Definition: IfxDsadc_Dsadc.c:123
IfxDsadc_InputConfig
IfxDsadc_InputConfig
Modulator configuration of positive/negative input line Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN.
Definition: IfxDsadc.h:162
IfxDsadc_InputGain
IfxDsadc_InputGain
Modulator gain select of analog input path Definition in Ifx_DSADC.MODCFGx.B.GAINSEL.
Definition: IfxDsadc.h:186
IfxDsadc_Dsadc_stopScan
IFX_INLINE void IfxDsadc_Dsadc_stopScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxDsadc_Dsadc.h:513
IfxDsadc_Dsadc_ChannelPins::itr
IFX_CONST IfxDsadc_Itr_In * itr
the ITR Pin which should be configured
Definition: IfxDsadc_Dsadc.h:194
IfxDsadc_Dsadc_ChannelConfig::integrator
IfxDsadc_Dsadc_IntegratorConfig integrator
Integrator configuration structure.
Definition: IfxDsadc_Dsadc.h:314
IfxDsadc_Dsadc_Channel::channel
Ifx_DSADC_CH * channel
Specifies the pointer to the DSADC channel registers.
Definition: IfxDsadc_Dsadc.h:300
IfxDsadc_Dsadc_ChannelConfig::combFilter
IfxDsadc_Dsadc_CombFilterConfig combFilter
Comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:312
IfxDsadc_Dsadc_Config::lowPowerSupply
IfxDsadc_LowPowerSupply lowPowerSupply
Low power supply voltage selection.
Definition: IfxDsadc_Dsadc.h:326
IfxDsadc_Dsadc_RectifierConfig::signDelay
uint8 signDelay
Sign delay value.
Definition: IfxDsadc_Dsadc.h:266
IfxDsadc_Dsadc_ModulatorConfig::modulatorClockFreq
float32 modulatorClockFreq
Modulator clock frequency.
Definition: IfxDsadc_Dsadc.h:256
IfxDsadc_Dsadc_CombFilterConfig::combFilterShift
IfxDsadc_MainCombFilterShift combFilterShift
Comb Filter (Main Chain) shift control.
Definition: IfxDsadc_Dsadc.h:209
IfxDsadc_Dsadc_getAuxSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDsadc_Dsadc_getAuxSrc(IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Aux event.
Definition: IfxDsadc_Dsadc.h:489
IfxDsadc_getAuxSrc
volatile Ifx_SRC_SRCR * IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Address/pointer to the interrupt source register.
Definition: IfxDsadc.c:35
IfxDsadc_Dsadc_AuxFilterConfig::eventSelect
IfxDsadc_AuxEvent eventSelect
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:181
IfxDsadc_IntegrationWindowSize
IfxDsadc_IntegrationWindowSize
Integrator window size Definition in Ifx_DSADC.IWCTR.B.IWS.
Definition: IfxDsadc.h:209
IfxDsadc_Dsadc_FirFilterConfig
FIR filters configuration structure.
Definition: IfxDsadc_Dsadc.h:229
IfxDsadc_Dsadc_DemodulatorConfig::triggerInput
IfxDsadc_TriggerInput triggerInput
Trigger selection.
Definition: IfxDsadc_Dsadc.h:220
IfxDsadc_Dsadc_ModulatorConfig::inputPin
IfxDsadc_InputPin inputPin
Modulator input pin selection.
Definition: IfxDsadc_Dsadc.h:255
IfxDsadc_CarrierWaveformMode
IfxDsadc_CarrierWaveformMode
Carrier generation mode Definition in Ifx_DSADC.CGCFG.B.CGMOD.
Definition: IfxDsadc.h:110
IfxDsadc_Dsadc_CarrierGenConfig::carrierWaveformMode
IfxDsadc_CarrierWaveformMode carrierWaveformMode
Carrier generation mode.
Definition: IfxDsadc_Dsadc.h:285
IfxDsadc_RectifierSignSource
IfxDsadc_RectifierSignSource
Rectifier sign source Selects the sign signal that is to be delayed. Definition in Ifx_DSADC...
Definition: IfxDsadc.h:307
IfxDsadc_Dsadc_ModulatorConfig
Modulator configuration structure.
Definition: IfxDsadc_Dsadc.h:250
IfxDsadc_Dsadc_ModulatorConfig::commonModeVoltage
IfxDsadc_CommonModeVoltage commonModeVoltage
Modulator common mode voltage selection.
Definition: IfxDsadc_Dsadc.h:257
IfxDsadc_Dsadc_RectifierConfig
Rectifier configuration structure.
Definition: IfxDsadc_Dsadc.h:262
IfxDsadc_TriggerInput
IfxDsadc_TriggerInput
Trigger select Definition in Ifx_DSADC.DICFG.B.TRSEL.
Definition: IfxDsadc.h:363
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxDsadc_Dsadc_initModule
IFX_EXTERN void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
Initialise the DSADC with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:407
IfxDsadc_Dsadc_AuxFilterConfig::eventGate
IfxDsadc_AuxGate eventGate
Service request generation (auxiliary)
Definition: IfxDsadc_Dsadc.h:182
IfxDsadc_AuxServiceRequest
IfxDsadc_AuxServiceRequest
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.SRGA.
Definition: IfxDsadc.h:100
IfxDsadc_LowPowerSupply
IfxDsadc_LowPowerSupply
Low power supply voltage select Definition in Ifx_DSADC.GLOBCFG.B.LOSUP.
Definition: IfxDsadc.h:230
IfxDsadc_getMainResult
IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain.
Definition: IfxDsadc.h:624
IfxDsadc_Dsadc_DemodulatorConfig::timestampTrigger
IfxDsadc_TimestampTrigger timestampTrigger
Timestamp trigger mode selection.
Definition: IfxDsadc_Dsadc.h:222
IfxDsadc_Dsadc_getMainSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDsadc_Dsadc_getMainSrc(IfxDsadc_Dsadc_Channel *channel)
Get the interrupt source register for a Main event.
Definition: IfxDsadc_Dsadc.h:501
IfxDsadc_stopScan
IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask)
Disables the conversion of multiple channels.
Definition: IfxDsadc.h:734
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxDsadc_Dsadc_AuxFilterConfig::combFilterType
IfxDsadc_AuxCombFilterType combFilterType
Comb Filter (auxiliary) configuration/type.
Definition: IfxDsadc_Dsadc.h:178
IfxDsadc_AuxGate
IfxDsadc_AuxGate
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.EGT.
Definition: IfxDsadc.h:91
IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxDsadc_Dsadc.h:306
IfxDsadc_Dsadc_ChannelPins::cinMode
IfxPort_InputMode cinMode
the CIN pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:191
IfxDsadc_Dsadc_CombFilterConfig::serviceRequest
IfxDsadc_MainServiceRequest serviceRequest
Service request generation (main chain)
Definition: IfxDsadc_Dsadc.h:210
IfxDsadc_Dsadc_ModulatorConfig::inputGain
IfxDsadc_InputGain inputGain
Modulator gain select of analog input path.
Definition: IfxDsadc_Dsadc.h:254
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxDsadc_Dsadc_ChannelPins::itrMode
IfxPort_InputMode itrMode
the ITR pin input mode which should be configured
Definition: IfxDsadc_Dsadc.h:195
IfxDsadc_Dsadc_RectifierConfig::signPeriod
uint8 signPeriod
Sign period.
Definition: IfxDsadc_Dsadc.h:267
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:39
IfxDsadc_Dsadc_RectifierConfig::enabled
boolean enabled
Rectification enable/disable selection.
Definition: IfxDsadc_Dsadc.h:264
IfxDsadc_Dsadc_FirFilterConfig::offsetCompensation
boolean offsetCompensation
Offset Compensation Filter enable/disable selection.
Definition: IfxDsadc_Dsadc.h:233
IfxDsadc_Dsadc_ChannelPins::dsp
IFX_CONST IfxDsadc_Dsp_In * dsp
the DSP Pin which should be configured
Definition: IfxDsadc_Dsadc.h:198
IfxDsadc_Dsadc_RectifierConfig::signSource
IfxDsadc_RectifierSignSource signSource
Rectifier sign source.
Definition: IfxDsadc_Dsadc.h:265
IfxDsadc_ModulatorClock
IfxDsadc_ModulatorClock
Modulator clock select Definition in Ifx_DSADC.GLOBCFG.B.MCSEL.
Definition: IfxDsadc.h:272
IfxDsadc_Dsadc_DemodulatorConfig::sampleStrobe
IfxDsadc_SampleStrobe sampleStrobe
Demodulator data strobe generation mode selection.
Definition: IfxDsadc_Dsadc.h:224
IfxDsadc_MainServiceRequest
IfxDsadc_MainServiceRequest
Service request generation (main chain) Definition in Ifx_DSADC.FCFGC.B.SRGM.
Definition: IfxDsadc.h:261
IfxDsadc_AuxEvent
IfxDsadc_AuxEvent
Service request generation (auxiliary) Definition in Ifx_DSADC.FCFGA.B.ESEL.
Definition: IfxDsadc.h:81
IfxDsadc_Dsadc_CombFilterConfig::combFilterType
IfxDsadc_MainCombFilterType combFilterType
Comb Filter (Main Chain) configuration/type.
Definition: IfxDsadc_Dsadc.h:208
IfxDsadc_Dsadc_ChannelConfig::auxFilter
IfxDsadc_Dsadc_AuxFilterConfig auxFilter
Auxiliary comb filter configuration structure.
Definition: IfxDsadc_Dsadc.h:315
IfxDsadc_Dsadc_AuxFilterConfig::bypassed
boolean bypassed
Definition: IfxDsadc_Dsadc.h:177
IfxDsadc_Dsadc_ChannelPins
Channel Pins Configuration structure.
Definition: IfxDsadc_Dsadc.h:188
IfxDsadc_Dsadc_IntegratorConfig::integrationCycles
uint16 integrationCycles
Number of integration cycles: 1 .. 16. Used only when IfxDsadc_IntegrationWindowSize_internalControl...
Definition: IfxDsadc_Dsadc.h:245
IfxDsadc_Dsadc_ChannelConfig::demodulator
IfxDsadc_Dsadc_DemodulatorConfig demodulator
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:311
IfxDsadc_Dsadc_ChannelPins::dspMode
IfxPort_InputMode dspMode
the DSP pin output mode which should be configured
Definition: IfxDsadc_Dsadc.h:199
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:57
IfxDsadc_Dsadc_initCarrierGen
IFX_EXTERN void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator.
Definition: IfxDsadc_Dsadc.c:148
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:66
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxDsadc_Dsadc_getMainResult
IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult(IfxDsadc_Dsadc_Channel *channel)
Get result from the main chain.
Definition: IfxDsadc_Dsadc.h:495
IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure.
Definition: IfxDsadc_Dsadc.h:283
IfxDsadc_Dsadc_initChannelConfig
IFX_EXTERN void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration.
Definition: IfxDsadc_Dsadc.c:237
IfxDsadc_Dsadc_DemodulatorConfig::integrationTrigger
IfxDsadc_IntegratorTrigger integrationTrigger
Integrator trigger mode selection.
Definition: IfxDsadc_Dsadc.h:221
IfxDsadc_Dsadc_ChannelPins::cin
IFX_CONST IfxDsadc_Cin_In * cin
the CIN Pin which should be configured
Definition: IfxDsadc_Dsadc.h:190
IfxDsadc_Dsadc_CarrierGenConfig::inverted
boolean inverted
Signal polarity (Normal / Inverted) selection.
Definition: IfxDsadc_Dsadc.h:286
IfxDsadc.h
DSADC basic functionality.


iLLD_TC26B: IfxDsadc_PinMap.c Source File

  • _PinMap
IfxDsadc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_PinMap.c
3 * \brief DSADC I/O map
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxDsadc_PinMap.h"
27
28 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT = {&MODULE_DSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2};
29 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT = {&MODULE_DSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4};
30 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT = {&MODULE_DSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6};
31 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT = {&MODULE_DSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2};
32 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT = {&MODULE_DSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4};
33 IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT = {&MODULE_DSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6};
34 IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, Ifx_RxSel_a};
35 IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, Ifx_RxSel_b};
36 IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, Ifx_RxSel_a};
37 IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, Ifx_RxSel_b};
38 IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, Ifx_RxSel_a};
39 IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, Ifx_RxSel_b};
40 IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT = {&MODULE_DSADC, 0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4};
41 IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4};
42 IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4};
43 IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4};
44 IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4};
45 IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4};
46 IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4};
47 IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 2}, Ifx_RxSel_a};
48 IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 6}, Ifx_RxSel_b};
49 IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 6}, Ifx_RxSel_a};
50 IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_b};
51 IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 4}, Ifx_RxSel_a};
52 IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_b};
53 IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN = {&MODULE_DSADC, 0, {NULL_PTR, 3}, Ifx_RxSel_a};
54 IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN = {&MODULE_DSADC, 0, {NULL_PTR, 1}, Ifx_RxSel_b};
55 IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN = {&MODULE_DSADC, 2, {NULL_PTR,21}, Ifx_RxSel_a};
56 IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN = {&MODULE_DSADC, 3, {NULL_PTR,37}, Ifx_RxSel_a};
57 IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 7}, Ifx_RxSel_a};
58 IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN = {&MODULE_DSADC, 3, {NULL_PTR,39}, Ifx_RxSel_b};
59 IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 9}, Ifx_RxSel_b};
60 IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN = {&MODULE_DSADC, 3, {NULL_PTR,45}, Ifx_RxSel_c};
61 IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN = {&MODULE_DSADC, 3, {NULL_PTR,47}, Ifx_RxSel_d};
62 IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN = {&MODULE_DSADC, 0, {NULL_PTR, 2}, Ifx_RxSel_a};
63 IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN = {&MODULE_DSADC, 0, {NULL_PTR, 0}, Ifx_RxSel_b};
64 IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN = {&MODULE_DSADC, 2, {NULL_PTR,20}, Ifx_RxSel_a};
65 IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN = {&MODULE_DSADC, 3, {NULL_PTR,36}, Ifx_RxSel_a};
66 IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 6}, Ifx_RxSel_a};
67 IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN = {&MODULE_DSADC, 3, {NULL_PTR,38}, Ifx_RxSel_b};
68 IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 8}, Ifx_RxSel_b};
69 IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN = {&MODULE_DSADC, 3, {NULL_PTR,44}, Ifx_RxSel_c};
70 IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN = {&MODULE_DSADC, 3, {NULL_PTR,46}, Ifx_RxSel_d};
71 IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 0}, Ifx_RxSel_e};
72 IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 4}, Ifx_RxSel_f};
73 IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_e};
74 IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 6}, Ifx_RxSel_f};
75 IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_e};
76 IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 9}, Ifx_RxSel_f};
77 IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN = {&MODULE_DSADC, {&MODULE_P00, 4}, Ifx_RxSel_a};
78 IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN = {&MODULE_DSADC, {&MODULE_P33,13}, Ifx_RxSel_b};
79
80
81 const IfxDsadc_Cgpwm_Out *IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS] = {
82 {
83 &IfxDsadc_CGPWMN_P00_5_OUT,
84 &IfxDsadc_CGPWMP_P00_6_OUT,
85 &IfxDsadc_CGPWMN_P02_0_OUT,
86 &IfxDsadc_CGPWMP_P02_1_OUT,
87 &IfxDsadc_CGPWMN_P33_11_OUT,
88 &IfxDsadc_CGPWMP_P33_12_OUT
89 }
90 };
91
92 const IfxDsadc_Cin_In *IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS] = {
93 {
94 {
95 &IfxDsadc_CIN0A_P00_1_IN,
96 &IfxDsadc_CIN0B_P33_5_IN
97 },
98 {
99 NULL_PTR,
100 NULL_PTR
101 },
102 {
103 &IfxDsadc_CIN2A_P00_5_IN,
104 &IfxDsadc_CIN2B_P33_1_IN
105 },
106 {
107 &IfxDsadc_CIN3A_P00_3_IN,
108 &IfxDsadc_CIN3B_P02_7_IN
109 }
110 }
111 };
112
113 const IfxDsadc_Cout_Out *IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS] = {
114 {
115 {
116 &IfxDsadc_COUT0_P00_1_OUT,
117 &IfxDsadc_COUT0_P00_11_OUT,
118 &IfxDsadc_COUT0_P33_5_OUT
119 },
120 {
121 NULL_PTR,
122 NULL_PTR,
123 NULL_PTR
124 },
125 {
126 &IfxDsadc_COUT2_P00_5_OUT,
127 &IfxDsadc_COUT2_P33_1_OUT,
128 NULL_PTR
129 },
130 {
131 &IfxDsadc_COUT3_P00_3_OUT,
132 &IfxDsadc_COUT3_P02_7_OUT,
133 NULL_PTR
134 }
135 }
136 };
137
138 const IfxDsadc_Din_In *IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS] = {
139 {
140 {
141 &IfxDsadc_DIN0A_P00_2_IN,
142 &IfxDsadc_DIN0B_P33_6_IN
143 },
144 {
145 NULL_PTR,
146 NULL_PTR
147 },
148 {
149 &IfxDsadc_DIN2A_P00_6_IN,
150 &IfxDsadc_DIN2B_P33_2_IN
151 },
152 {
153 &IfxDsadc_DIN3A_P00_4_IN,
154 &IfxDsadc_DIN3B_P02_8_IN
155 }
156 }
157 };
158
159 const IfxDsadc_Dsn_In *IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS] = {
160 {
161 {
162 &IfxDsadc_DS0NA_AN3_IN,
163 &IfxDsadc_DS0NB_AN1_IN,
164 NULL_PTR,
165 NULL_PTR
166 },
167 {
168 NULL_PTR,
169 NULL_PTR,
170 NULL_PTR,
171 NULL_PTR
172 },
173 {
174 &IfxDsadc_DS2NA_AN21_IN,
175 NULL_PTR,
176 NULL_PTR,
177 NULL_PTR
178 },
179 {
180 &IfxDsadc_DS3NA_P40_7_IN,
181 &IfxDsadc_DS3NB_P40_9_IN,
182 &IfxDsadc_DS3NC_AN45_IN,
183 &IfxDsadc_DS3ND_AN47_IN
184 }
185 }
186 };
187
188 const IfxDsadc_Dsp_In *IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS] = {
189 {
190 {
191 &IfxDsadc_DS0PA_AN2_IN,
192 &IfxDsadc_DS0PB_AN0_IN,
193 NULL_PTR,
194 NULL_PTR
195 },
196 {
197 NULL_PTR,
198 NULL_PTR,
199 NULL_PTR,
200 NULL_PTR
201 },
202 {
203 &IfxDsadc_DS2PA_AN20_IN,
204 NULL_PTR,
205 NULL_PTR,
206 NULL_PTR
207 },
208 {
209 &IfxDsadc_DS3PA_P40_6_IN,
210 &IfxDsadc_DS3PB_P40_8_IN,
211 &IfxDsadc_DS3PC_AN44_IN,
212 &IfxDsadc_DS3PD_AN46_IN
213 }
214 }
215 };
216
217 const IfxDsadc_Itr_In *IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS] = {
218 {
219 {
220 NULL_PTR,
221 NULL_PTR,
222 NULL_PTR,
223 NULL_PTR,
224 &IfxDsadc_ITR0E_P33_0_IN,
225 &IfxDsadc_ITR0F_P33_4_IN
226 },
227 {
228 NULL_PTR,
229 NULL_PTR,
230 NULL_PTR,
231 NULL_PTR,
232 NULL_PTR,
233 NULL_PTR
234 },
235 {
236 NULL_PTR,
237 NULL_PTR,
238 NULL_PTR,
239 NULL_PTR,
240 &IfxDsadc_ITR2E_P33_2_IN,
241 &IfxDsadc_ITR2F_P33_6_IN
242 },
243 {
244 NULL_PTR,
245 NULL_PTR,
246 NULL_PTR,
247 NULL_PTR,
248 &IfxDsadc_ITR3E_P02_8_IN,
249 &IfxDsadc_ITR3F_P00_9_IN
250 }
251 }
252 };
253
254 const IfxDsadc_Sg_In *IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS] = {
255 {
256 &IfxDsadc_SGNA_P00_4_IN,
257 &IfxDsadc_SGNB_P33_13_IN
258 }
259 };
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:84
IfxDsadc_DS0PA_AN2_IN
IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
Definition: IfxDsadc_PinMap.c:62
IfxDsadc_DS3NB_P40_9_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
Definition: IfxDsadc_PinMap.c:59
Ifx_RxSel_e
Definition: Ifx_Types.h:116
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:48
IfxDsadc_DIN0B_P33_6_IN
IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
Definition: IfxDsadc_PinMap.c:48
IfxDsadc_ITR2E_P33_2_IN
IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN
Definition: IfxDsadc_PinMap.c:73
IfxDsadc_CGPWMN_P02_0_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
Definition: IfxDsadc_PinMap.c:29
IfxDsadc_DS2NA_AN21_IN
IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
Definition: IfxDsadc_PinMap.c:55
IfxDsadc_SGNA_P00_4_IN
IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
Definition: IfxDsadc_PinMap.c:77
IfxDsadc_DS3NC_AN45_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
Definition: IfxDsadc_PinMap.c:60
IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:169
IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:168
IfxDsadc_DIN2B_P33_2_IN
IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
Definition: IfxDsadc_PinMap.c:50
IfxDsadc_DS0NA_AN3_IN
IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
Definition: IfxDsadc_PinMap.c:53
IfxDsadc_SGNB_P33_13_IN
IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
Definition: IfxDsadc_PinMap.c:78
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxDsadc_Dsn_In_pinTable
const IfxDsadc_Dsn_In * IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:159
IfxDsadc_DS3PB_P40_8_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
Definition: IfxDsadc_PinMap.c:68
IfxDsadc_DS3PB_AN38_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN
Definition: IfxDsadc_PinMap.c:67
IfxDsadc_CIN2A_P00_5_IN
IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
Definition: IfxDsadc_PinMap.c:36
IfxDsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxDsadc_PinMap.h:100
IfxDsadc_DS0NB_AN1_IN
IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
Definition: IfxDsadc_PinMap.c:54
IfxDsadc_Sg_In
SG pin mapping structure.
Definition: IfxDsadc_PinMap.h:92
IfxDsadc_DS0PB_AN0_IN
IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
Definition: IfxDsadc_PinMap.c:63
IfxDsadc_DS3NB_AN39_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN
Definition: IfxDsadc_PinMap.c:58
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxDsadc_COUT3_P02_7_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
Definition: IfxDsadc_PinMap.c:46
IfxDsadc_COUT2_P33_1_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
Definition: IfxDsadc_PinMap.c:44
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:75
IfxDsadc_ITR0F_P33_4_IN
IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN
Definition: IfxDsadc_PinMap.c:72
IfxDsadc_CGPWMN_P33_11_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
Definition: IfxDsadc_PinMap.c:30
IfxDsadc_CIN0A_P00_1_IN
IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
Definition: IfxDsadc_PinMap.c:34
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxDsadc_COUT2_P00_5_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
Definition: IfxDsadc_PinMap.c:43
IfxDsadc_Cin_In_pinTable
const IfxDsadc_Cin_In * IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:92
IfxDsadc_ITR2F_P33_6_IN
IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN
Definition: IfxDsadc_PinMap.c:74
IfxDsadc_DS3NA_AN37_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN
Definition: IfxDsadc_PinMap.c:56
IfxDsadc_COUT0_P00_11_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
Definition: IfxDsadc_PinMap.c:40
IfxDsadc_ITR3F_P00_9_IN
IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN
Definition: IfxDsadc_PinMap.c:76
IfxDsadc_DS3PC_AN44_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
Definition: IfxDsadc_PinMap.c:69
IfxDsadc_DS3PA_P40_6_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
Definition: IfxDsadc_PinMap.c:66
IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:166
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:167
IfxDsadc_Cgpwm_Out_pinTable
const IfxDsadc_Cgpwm_Out * IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:81
IfxDsadc_DIN0A_P00_2_IN
IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
Definition: IfxDsadc_PinMap.c:47
IfxDsadc_DS3ND_AN47_IN
IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
Definition: IfxDsadc_PinMap.c:61
IFXDSADC_PINMAP_NUM_MODULES
#define IFXDSADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxDsadc_PinMap.h:161
IfxDsadc_Itr_In_pinTable
const IfxDsadc_Itr_In * IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:217
IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS
#define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:165
IfxDsadc_CIN3A_P00_3_IN
IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
Definition: IfxDsadc_PinMap.c:38
IfxDsadc_DIN3B_P02_8_IN
IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
Definition: IfxDsadc_PinMap.c:52
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IfxDsadc_CIN0B_P33_5_IN
IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
Definition: IfxDsadc_PinMap.c:35
IfxDsadc_Din_In_pinTable
const IfxDsadc_Din_In * IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:138
IfxDsadc_DS3PA_AN36_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN
Definition: IfxDsadc_PinMap.c:65
IfxDsadc_CIN2B_P33_1_IN
IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
Definition: IfxDsadc_PinMap.c:37
IfxDsadc_DS2PA_AN20_IN
IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
Definition: IfxDsadc_PinMap.c:64
Ifx_RxSel_f
Definition: Ifx_Types.h:117
IfxDsadc_DIN3A_P00_4_IN
IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
Definition: IfxDsadc_PinMap.c:51
IfxDsadc_CGPWMP_P00_6_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
Definition: IfxDsadc_PinMap.c:31
IfxDsadc_CIN3B_P02_7_IN
IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
Definition: IfxDsadc_PinMap.c:39
IFXDSADC_PINMAP_SG_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:170
IfxDsadc_Sg_In_pinTable
const IfxDsadc_Sg_In * IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:254
IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:164
IfxDsadc_DS3NA_P40_7_IN
IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
Definition: IfxDsadc_PinMap.c:57
IfxDsadc_COUT0_P33_5_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
Definition: IfxDsadc_PinMap.c:42
IfxDsadc_ITR0E_P33_0_IN
IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN
Definition: IfxDsadc_PinMap.c:71
IFXDSADC_PINMAP_NUM_CHANNELS
#define IFXDSADC_PINMAP_NUM_CHANNELS
Definition: IfxDsadc_PinMap.h:162
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:39
IfxDsadc_DIN2A_P00_6_IN
IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
Definition: IfxDsadc_PinMap.c:49
IfxDsadc_CGPWMP_P33_12_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
Definition: IfxDsadc_PinMap.c:33
IfxDsadc_PinMap.h
DSADC I/O map.
IfxDsadc_CGPWMP_P02_1_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
Definition: IfxDsadc_PinMap.c:32
IfxDsadc_COUT3_P00_3_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
Definition: IfxDsadc_PinMap.c:45
IfxDsadc_Cout_Out_pinTable
const IfxDsadc_Cout_Out * IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:113
IfxDsadc_DS3PD_AN46_IN
IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
Definition: IfxDsadc_PinMap.c:70
IfxDsadc_COUT0_P00_1_OUT
IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
Definition: IfxDsadc_PinMap.c:41
IfxDsadc_ITR3E_P02_8_IN
IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN
Definition: IfxDsadc_PinMap.c:75
IfxDsadc_CGPWMN_P00_5_OUT
IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
Definition: IfxDsadc_PinMap.c:28
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:57
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:66
IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
#define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:163
IfxDsadc_Dsp_In_pinTable
const IfxDsadc_Dsp_In * IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
Definition: IfxDsadc_PinMap.c:188


iLLD_TC26B: IfxDsadc_PinMap.h Source File

  • _PinMap
IfxDsadc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_PinMap.h
3 * \brief DSADC I/O map
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dsadc_pinmap DSADC Pin Mapping
25 * \ingroup IfxLld_Dsadc
26 */
27
28 #ifndef IFXDSADC_PINMAP_H
29 #define IFXDSADC_PINMAP_H
30
31 #include <IfxDsadc_reg.h>
32 #include <_Impl/IfxDsadc_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Dsadc_pinmap
36 * \{ */
37
38 /** \brief DS negative pin mapping structure */
39 typedef const struct
40 {
41 Ifx_DSADC* module; /**< \brief Base address */
42 uint8 channel; /**< \brief Channel number */
43 IfxPort_Pin pin; /**< \brief Port pin */
44 Ifx_RxSel select; /**< \brief Input multiplexer value */
45 } IfxDsadc_Dsn_In;
46
47 /** \brief DS positive pin mapping structure */
48 typedef const struct
49 {
50 Ifx_DSADC* module; /**< \brief Base address */
51 uint8 channel; /**< \brief Channel number */
52 IfxPort_Pin pin; /**< \brief Port pin */
53 Ifx_RxSel select; /**< \brief Input multiplexer value */
54 } IfxDsadc_Dsp_In;
55
56 /** \brief CIN pin mapping structure */
57 typedef const struct
58 {
59 Ifx_DSADC* module; /**< \brief Base address */
60 uint8 channel; /**< \brief Channel number */
61 IfxPort_Pin pin; /**< \brief Port pin */
62 Ifx_RxSel select; /**< \brief Input multiplexer value */
63 } IfxDsadc_Cin_In;
64
65 /** \brief DIN pin mapping structure */
66 typedef const struct
67 {
68 Ifx_DSADC* module; /**< \brief Base address */
69 uint8 channel; /**< \brief Channel number */
70 IfxPort_Pin pin; /**< \brief Port pin */
71 Ifx_RxSel select; /**< \brief Input multiplexer value */
72 } IfxDsadc_Din_In;
73
74 /** \brief ITR pin mapping structure */
75 typedef const struct
76 {
77 Ifx_DSADC* module; /**< \brief Base address */
78 uint8 channel; /**< \brief Channel number */
79 IfxPort_Pin pin; /**< \brief Port pin */
80 Ifx_RxSel select; /**< \brief Input multiplexer value */
81 } IfxDsadc_Itr_In;
82
83 /** \brief CGPWM pin mapping structure */
84 typedef const struct
85 {
86 Ifx_DSADC* module; /**< \brief Base address */
87 IfxPort_Pin pin; /**< \brief Port pin */
88 IfxPort_OutputIdx select; /**< \brief Port control code */
89 } IfxDsadc_Cgpwm_Out;
90
91 /** \brief SG pin mapping structure */
92 typedef const struct
93 {
94 Ifx_DSADC* module; /**< \brief Base address */
95 IfxPort_Pin pin; /**< \brief Port pin */
96 Ifx_RxSel select; /**< \brief Input multiplexer value */
97 } IfxDsadc_Sg_In;
98
99 /** \brief COUT pin mapping structure */
100 typedef const struct
101 {
102 Ifx_DSADC* module; /**< \brief Base address */
103 uint8 channel; /**< \brief Channel number */
104 IfxPort_Pin pin; /**< \brief Port pin */
105 IfxPort_OutputIdx select; /**< \brief Port control code */
106 } IfxDsadc_Cout_Out;
107
108 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
109 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
110 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
111 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
112 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
113 IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
114 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN; /**< \brief DSADC_CIN0A: DSADC input */
115 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN; /**< \brief DSADC_CIN0B: DSADC input */
116 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN; /**< \brief DSADC_CIN2A: DSADC input */
117 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN; /**< \brief DSADC_CIN2B: DSADC input */
118 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN; /**< \brief DSADC_CIN3A: DSADC input */
119 IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN; /**< \brief DSADC_CIN3B: DSADC input */
120 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT; /**< \brief DSADC_COUT0: DSADC output */
121 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT; /**< \brief DSADC_COUT0: DSADC output */
122 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT; /**< \brief DSADC_COUT0: DSADC output */
123 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT; /**< \brief DSADC_COUT2: DSADC output */
124 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT; /**< \brief DSADC_COUT2: DSADC output */
125 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT; /**< \brief DSADC_COUT3: DSADC output */
126 IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT; /**< \brief DSADC_COUT3: DSADC output */
127 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN; /**< \brief DSADC_DIN0A: DSADC input */
128 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN; /**< \brief DSADC_DIN0B: DSADC input */
129 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN; /**< \brief DSADC_DIN2A: DSADC input */
130 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN; /**< \brief DSADC_DIN2B: DSADC input */
131 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN; /**< \brief DSADC_DIN3A: DSADC input */
132 IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN; /**< \brief DSADC_DIN3B: DSADC input */
133 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN; /**< \brief DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A */
134 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN; /**< \brief DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B */
135 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN; /**< \brief DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A */
136 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN; /**< \brief DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A */
137 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN; /**< \brief DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A */
138 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN; /**< \brief DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B */
139 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN; /**< \brief DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B */
140 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN; /**< \brief DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C */
141 IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN; /**< \brief DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D */
142 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN; /**< \brief DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A */
143 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN; /**< \brief DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B */
144 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN; /**< \brief DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A */
145 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN; /**< \brief DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A */
146 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN; /**< \brief DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A */
147 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN; /**< \brief DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B */
148 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN; /**< \brief DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B */
149 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN; /**< \brief DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C */
150 IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN; /**< \brief DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D */
151 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN; /**< \brief DSADC_ITR0E: DSADC input */
152 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN; /**< \brief DSADC_ITR0F: DSADC input */
153 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN; /**< \brief DSADC_ITR2E: DSADC input */
154 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN; /**< \brief DSADC_ITR2F: DSADC input */
155 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN; /**< \brief DSADC_ITR3E: DSADC input */
156 IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN; /**< \brief DSADC_ITR3F: DSADC input */
157 IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN; /**< \brief DSADC_SGNA: DSADC input */
158 IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN; /**< \brief DSADC_SGNB: DSADC input */
159
160 /** \brief Table dimensions */
161 #define IFXDSADC_PINMAP_NUM_MODULES 1
162 #define IFXDSADC_PINMAP_NUM_CHANNELS 4
163 #define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
164 #define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2
165 #define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3
166 #define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2
167 #define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
168 #define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
169 #define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
170 #define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2
171
172
173 /** \brief IfxDsadc_Cgpwm_Out table */
174 IFX_EXTERN const IfxDsadc_Cgpwm_Out *IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS];
175
176 /** \brief IfxDsadc_Cin_In table */
177 IFX_EXTERN const IfxDsadc_Cin_In *IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS];
178
179 /** \brief IfxDsadc_Cout_Out table */
180 IFX_EXTERN const IfxDsadc_Cout_Out *IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS];
181
182 /** \brief IfxDsadc_Din_In table */
183 IFX_EXTERN const IfxDsadc_Din_In *IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS];
184
185 /** \brief IfxDsadc_Dsn_In table */
186 IFX_EXTERN const IfxDsadc_Dsn_In *IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS];
187
188 /** \brief IfxDsadc_Dsp_In table */
189 IFX_EXTERN const IfxDsadc_Dsp_In *IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS];
190
191 /** \brief IfxDsadc_Itr_In table */
192 IFX_EXTERN const IfxDsadc_Itr_In *IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS];
193
194 /** \brief IfxDsadc_Sg_In table */
195 IFX_EXTERN const IfxDsadc_Sg_In *IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS];
196
197 /** \} */
198
199 #endif /* IFXDSADC_PINMAP_H */
IfxDsadc_Dsn_In_pinTable
IFX_EXTERN const IfxDsadc_Dsn_In * IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS]
IfxDsadc_Dsn_In table.
Definition: IfxDsadc_PinMap.h:186
IfxDsadc_Cgpwm_Out
CGPWM pin mapping structure.
Definition: IfxDsadc_PinMap.h:84
IfxDsadc_Cin_In_pinTable
IFX_EXTERN const IfxDsadc_Cin_In * IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS]
IfxDsadc_Cin_In table.
Definition: IfxDsadc_PinMap.h:177
IfxDsadc_DS0NA_AN3_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN
DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A.
Definition: IfxDsadc_PinMap.h:133
IfxDsadc_CIN2B_P33_1_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN
DSADC_CIN2B: DSADC input.
Definition: IfxDsadc_PinMap.h:117
IfxDsadc_Dsp_In
DS positive pin mapping structure.
Definition: IfxDsadc_PinMap.h:48
IfxDsadc_ITR3F_P00_9_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN
DSADC_ITR3F: DSADC input.
Definition: IfxDsadc_PinMap.h:156
IfxDsadc_Dsn_In::channel
uint8 channel
Channel number.
Definition: IfxDsadc_PinMap.h:42
IfxDsadc_Din_In_pinTable
IFX_EXTERN const IfxDsadc_Din_In * IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS]
IfxDsadc_Din_In table.
Definition: IfxDsadc_PinMap.h:183
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxDsadc_CIN0B_P33_5_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN
DSADC_CIN0B: DSADC input.
Definition: IfxDsadc_PinMap.h:115
IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:169
IfxDsadc_DS3PB_AN38_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B.
Definition: IfxDsadc_PinMap.h:147
IfxDsadc_CGPWMN_P02_0_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT
DSADC_CGPWMN: DSADC output.
Definition: IfxDsadc_PinMap.h:109
IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:168
IfxDsadc_SGNA_P00_4_IN
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN
DSADC_SGNA: DSADC input.
Definition: IfxDsadc_PinMap.h:157
IfxDsadc_DS3NA_AN37_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A.
Definition: IfxDsadc_PinMap.h:136
IfxDsadc_DS3PD_AN46_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN
DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D.
Definition: IfxDsadc_PinMap.h:150
IfxDsadc_CIN2A_P00_5_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN
DSADC_CIN2A: DSADC input.
Definition: IfxDsadc_PinMap.h:116
IfxDsadc_DS3PC_AN44_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN
DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C.
Definition: IfxDsadc_PinMap.h:149
IfxDsadc_DIN0A_P00_2_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN
DSADC_DIN0A: DSADC input.
Definition: IfxDsadc_PinMap.h:127
IfxDsadc_DS3NB_AN39_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B.
Definition: IfxDsadc_PinMap.h:138
IfxDsadc_Dsn_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxDsadc_PinMap.h:44
IfxDsadc_DS2NA_AN21_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN
DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A.
Definition: IfxDsadc_PinMap.h:135
IfxDsadc_DS3PB_P40_8_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN
DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B.
Definition: IfxDsadc_PinMap.h:148
IfxDsadc_DIN0B_P33_6_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN
DSADC_DIN0B: DSADC input.
Definition: IfxDsadc_PinMap.h:128
IfxDsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxDsadc_PinMap.h:100
IfxDsadc_DS2PA_AN20_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN
DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A.
Definition: IfxDsadc_PinMap.h:144
IfxDsadc_Sg_In
SG pin mapping structure.
Definition: IfxDsadc_PinMap.h:92
IfxDsadc_Dsn_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxDsadc_PinMap.h:43
IfxDsadc_Itr_In
ITR pin mapping structure.
Definition: IfxDsadc_PinMap.h:75
IfxDsadc_ITR0E_P33_0_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN
DSADC_ITR0E: DSADC input.
Definition: IfxDsadc_PinMap.h:151
IfxDsadc_Sg_In_pinTable
IFX_EXTERN const IfxDsadc_Sg_In * IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS]
IfxDsadc_Sg_In table.
Definition: IfxDsadc_PinMap.h:195
IfxDsadc_DIN2B_P33_2_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN
DSADC_DIN2B: DSADC input.
Definition: IfxDsadc_PinMap.h:130
IfxDsadc_SGNB_P33_13_IN
IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN
DSADC_SGNB: DSADC input.
Definition: IfxDsadc_PinMap.h:158
IfxDsadc_Itr_In_pinTable
IFX_EXTERN const IfxDsadc_Itr_In * IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS]
IfxDsadc_Itr_In table.
Definition: IfxDsadc_PinMap.h:192
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxDsadc_DS3NB_P40_9_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN
DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B.
Definition: IfxDsadc_PinMap.h:139
IfxDsadc_DS3ND_AN47_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN
DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D.
Definition: IfxDsadc_PinMap.h:141
IfxDsadc_CIN3A_P00_3_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN
DSADC_CIN3A: DSADC input.
Definition: IfxDsadc_PinMap.h:118
IfxDsadc_DS3NC_AN45_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN
DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C.
Definition: IfxDsadc_PinMap.h:140
IfxDsadc_DIN3B_P02_8_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN
DSADC_DIN3B: DSADC input.
Definition: IfxDsadc_PinMap.h:132
IfxDsadc_COUT0_P00_11_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT
DSADC_COUT0: DSADC output.
Definition: IfxDsadc_PinMap.h:120
IfxDsadc_CGPWMP_P02_1_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT
DSADC_CGPWMP: DSADC output.
Definition: IfxDsadc_PinMap.h:112
IfxDsadc_DS0PA_AN2_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN
DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A.
Definition: IfxDsadc_PinMap.h:142
IfxDsadc_COUT2_P00_5_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT
DSADC_COUT2: DSADC output.
Definition: IfxDsadc_PinMap.h:123
IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:166
IfxDsadc_CGPWMN_P33_11_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT
DSADC_CGPWMN: DSADC output.
Definition: IfxDsadc_PinMap.h:110
IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:167
IFXDSADC_PINMAP_NUM_MODULES
#define IFXDSADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxDsadc_PinMap.h:161
IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS
#define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:165
IfxDsadc_Cgpwm_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxDsadc_PinMap.h:88
IfxDsadc_COUT3_P02_7_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT
DSADC_COUT3: DSADC output.
Definition: IfxDsadc_PinMap.h:126
IfxDsadc_DS3PA_P40_6_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A.
Definition: IfxDsadc_PinMap.h:146
IfxDsadc_Dsn_In::module
Ifx_DSADC * module
Base address.
Definition: IfxDsadc_PinMap.h:41
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxDsadc_Cgpwm_Out_pinTable
IFX_EXTERN const IfxDsadc_Cgpwm_Out * IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS]
IfxDsadc_Cgpwm_Out table.
Definition: IfxDsadc_PinMap.h:174
IfxDsadc_COUT0_P00_1_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT
DSADC_COUT0: DSADC output.
Definition: IfxDsadc_PinMap.h:121
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxDsadc_DS0PB_AN0_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN
DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B.
Definition: IfxDsadc_PinMap.h:143
IfxDsadc_Dsp_In_pinTable
IFX_EXTERN const IfxDsadc_Dsp_In * IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS]
IfxDsadc_Dsp_In table.
Definition: IfxDsadc_PinMap.h:189
IfxDsadc_COUT3_P00_3_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT
DSADC_COUT3: DSADC output.
Definition: IfxDsadc_PinMap.h:125
IfxDsadc_DS0NB_AN1_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN
DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B.
Definition: IfxDsadc_PinMap.h:134
IFXDSADC_PINMAP_SG_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:170
IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS
#define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:164
IfxDsadc_ITR2E_P33_2_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN
DSADC_ITR2E: DSADC input.
Definition: IfxDsadc_PinMap.h:153
IFXDSADC_PINMAP_NUM_CHANNELS
#define IFXDSADC_PINMAP_NUM_CHANNELS
Definition: IfxDsadc_PinMap.h:162
IfxDsadc_COUT2_P33_1_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT
DSADC_COUT2: DSADC output.
Definition: IfxDsadc_PinMap.h:124
IfxDsadc_ITR0F_P33_4_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN
DSADC_ITR0F: DSADC input.
Definition: IfxDsadc_PinMap.h:152
IfxDsadc_CGPWMP_P00_6_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT
DSADC_CGPWMP: DSADC output.
Definition: IfxDsadc_PinMap.h:111
IfxDsadc_Dsn_In
DS negative pin mapping structure.
Definition: IfxDsadc_PinMap.h:39
IfxDsadc_CIN3B_P02_7_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN
DSADC_CIN3B: DSADC input.
Definition: IfxDsadc_PinMap.h:119
IfxDsadc_CGPWMP_P33_12_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT
DSADC_CGPWMP: DSADC output.
Definition: IfxDsadc_PinMap.h:113
IfxDsadc_DIN2A_P00_6_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN
DSADC_DIN2A: DSADC input.
Definition: IfxDsadc_PinMap.h:129
IfxDsadc_COUT0_P33_5_OUT
IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT
DSADC_COUT0: DSADC output.
Definition: IfxDsadc_PinMap.h:122
IfxDsadc_ITR2F_P33_6_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN
DSADC_ITR2F: DSADC input.
Definition: IfxDsadc_PinMap.h:154
IfxDsadc_Cin_In
CIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:57
IfxDsadc_Din_In
DIN pin mapping structure.
Definition: IfxDsadc_PinMap.h:66
IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
#define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS
Definition: IfxDsadc_PinMap.h:163
IfxDsadc_Cout_Out_pinTable
IFX_EXTERN const IfxDsadc_Cout_Out * IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS]
IfxDsadc_Cout_Out table.
Definition: IfxDsadc_PinMap.h:180
IfxDsadc_DS3PA_AN36_IN
IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN
DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A.
Definition: IfxDsadc_PinMap.h:145
IfxDsadc_CGPWMN_P00_5_OUT
IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT
DSADC_CGPWMN: DSADC output.
Definition: IfxDsadc_PinMap.h:108
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxDsadc_ITR3E_P02_8_IN
IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN
DSADC_ITR3E: DSADC input.
Definition: IfxDsadc_PinMap.h:155
IfxDsadc_DS3NA_P40_7_IN
IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN
DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A.
Definition: IfxDsadc_PinMap.h:137
IfxDsadc_cfg.h
DSADC on-chip implementation data.
IfxDsadc_DIN3A_P00_4_IN
IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN
DSADC_DIN3A: DSADC input.
Definition: IfxDsadc_PinMap.h:131
IfxDsadc_CIN0A_P00_1_IN
IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN
DSADC_CIN0A: DSADC input.
Definition: IfxDsadc_PinMap.h:114
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxDsadc_Rdc.c Source File

  • Dsadc
  • Rdc
IfxDsadc_Rdc.c
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_Rdc.c
3 * \brief DSADC RDC details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxDsadc_Rdc.h"
30 #include "string.h"
31 #include "Gtm/Trig/IfxGtm_Trig.h"
32
33 /** \addtogroup IfxLld_Dsadc_Rdc_func_config
34 * \{ */
35
36 /******************************************************************************/
37 /*-----------------------Private Function Prototypes--------------------------*/
38 /******************************************************************************/
39
40 /**
41 * \param gtm Pointer to GTM module registers
42 * \param tim TIM Number
43 * \param timCh TIM Channel Number
44 * \param risingEdge Signal level control
45 */
46 IFX_STATIC Ifx_GTM_TIM_CH *IfxDsadc_Rdc_initGtmTim(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge);
47
48 /** \brief Initialise the DSADC hardware channels
49 * \param driver Driver handle
50 * \param config DSADC RDC configuration structure
51 */
52 IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
53
54 /** \brief Initialise the GTM timestamp hardware resources
55 * \param driver Driver handle
56 * \param config DSADC RDC configuration structure
57 * \return None
58 */
59 IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
60
61 /** \} */
62
63 /** \addtogroup IfxLld_Dsadc_Rdc_func_utility
64 * \{ */
65 /******************************************************************************/
66 /*------------------------Inline Function Prototypes--------------------------*/
67 /******************************************************************************/
68
69 /** \brief Updating RDC timestamps
70 * \param driver Driver handle
71 * \return None
72 */
73 IFX_INLINE void IfxDsadc_Rdc_updateTimestamp(IfxDsadc_Rdc *driver);
74
75 /******************************************************************************/
76 /*-----------------------Private Function Prototypes--------------------------*/
77 /******************************************************************************/
78
79 /** \brief Group Dalay calculation
80 * \param driver Driver handle
81 */
82 IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay(IfxDsadc_Rdc *driver);
83
84 /**
85 * \param config DSADC RDC configuration structure
86 */
87 IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod(const IfxDsadc_Rdc_Config *config);
88
89 /** \brief Return the update period.
90 * \param driver Driver handle
91 * \return Return the update period in [seconds], i.e. the period of new result (and interrupt)
92 */
93 IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod(IfxDsadc_Rdc *driver);
94
95 /** \} */
96
97 /** \addtogroup IfxLld_Dsadc_Rdc_variable
98 * \{ */
99
100 /******************************************************************************/
101 /*------------------------Private Variables/Constants-------------------------*/
102 /******************************************************************************/
103
104 /** \brief GTM TIM Configuration settings
105 */
106 IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg = {
107 .TIM_EN = 1,
108 .TIM_MODE = IfxGtm_Tim_Mode_inputEvent,
109 .GPR0_SEL = IfxGtm_Tim_GprSel_tbuTs0,
110 .GPR1_SEL = IfxGtm_Tim_GprSel_tbuTs0,
111 .CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg,
112 /*.EGPR0_SEL= 0, //not available in A-step */
113 .DSL = 0, /* 0 = falling or low */
114 .ISL = 0, /* 1 = both edges, ignore DSL */
115 };
116
117 /** \} */
118
119 /******************************************************************************/
120 /*---------------------Inline Function Implementations------------------------*/
121 /******************************************************************************/
122
123 IFX_INLINE void IfxDsadc_Rdc_updateTimestamp(IfxDsadc_Rdc *driver)
124 {
125 IfxDsadc_Rdc_Ts *timestamp = &driver->timestamp;
126 IfxDsadc_Rdc_Hw *hwHandle = &driver->hardware;
127
128 uint32 tsPwm = hwHandle->pwmTimCh->GPR0.B.GPR0;
129 uint32 clockTicks = (tsPwm - timestamp->rdc) % timestamp->maxTicks;
130 # if IFXDSADC_RDC_CFG_DEBUG
131 timestamp->inTicks = clockTicks;
132 timestamp->pwm = tsPwm;
133 # endif
134 timestamp->inSeconds = timestamp->clockPeriod * (float32)clockTicks;
135 }
136
137
138 /******************************************************************************/
139 /*-------------------------Function Implementations---------------------------*/
140 /******************************************************************************/
141
142 IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay(IfxDsadc_Rdc *driver)
143 {
144 Ifx_DSADC *dsadc = driver->hardware.inputSin.module;
145 return IfxDsadc_getMainGroupDelay(dsadc, driver->hardware.inputSin.channelId);
146 }
147
148
149 IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod(const IfxDsadc_Rdc_Config *config)
150 {
151 Ifx_GTM *gtm = config->hardware.gtmTimestamp.gtm;
152 return 1.0F / IfxGtm_Tbu_getClockFrequency(gtm, IfxGtm_Tbu_Ts_0);
153 }
154
155
156 float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver)
157 {
158 return Ifx_AngleTrkF32_getAbsolutePosition(&driver->angleTrk);
159 }
160
161
162 IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver)
163 {
164 return Ifx_AngleTrkF32_getDirection(&driver->angleTrk);
165 }
166
167
168 sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver)
169 {
170 return Ifx_AngleTrkF32_getOffset(&driver->angleTrk);
171 }
172
173
174 float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver)
175 {
176 return Ifx_AngleTrkF32_getPosition(&driver->angleTrk);
177 }
178
179
180 float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver)
181 {
182 return Ifx_AngleTrkF32_getRefreshPeriod(&driver->angleTrk);
183 }
184
185
186 sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver)
187 {
188 return Ifx_AngleTrkF32_getResolution(&driver->angleTrk);
189 }
190
191
192 IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver)
193 {
194 return IfxStdIf_Pos_SensorType_resolver;
195 }
196
197
198 sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver)
199 {
200 return Ifx_AngleTrkF32_getTurn(&driver->angleTrk);
201 }
202
203
204 IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod(IfxDsadc_Rdc *driver)
205 {
206 IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
207 return 1.0F / IfxDsadc_getIntegratorOutFreq(hwHandle->inputSin.module, hwHandle->inputSin.channelId);
208 }
209
210
211 boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
212 {
213 boolean result = TRUE;
214 /* Initialise the DSADC hardware channels */
215 result &= IfxDsadc_Rdc_initHwChannels(driver, config);
216
217 /* Initialise the GTM timestamp hardware resources */
218 IfxDsadc_Rdc_initHwTimestamp(driver, config);
219
220 /* Initialise the software resources */
221 {
222 driver->updatePeriod = IfxDsadc_Rdc_getUpdatePeriod(driver);
223 driver->groupDelay = IfxDsadc_Rdc_calculateGroupDelay(driver);
224 driver->timestamp.enabled = TRUE;
225 driver->timestamp.clockPeriod = IfxDsadc_Rdc_calculateTimestampPeriod(config);
226 driver->timestamp.maxTicks = (uint32)(driver->updatePeriod / driver->timestamp.clockPeriod);
227 }
228
229 /* Initialise angle-tracking observer */
230 {
231 Ifx_AngleTrkF32_Config atoConfig;
232 Ifx_AngleTrkF32_initConfig(&atoConfig, &(driver->sinIn), &(driver->cosIn));
233
234 atoConfig.offset = config->offset;
235 atoConfig.speedLpfFc = config->speedLpfFc;
236 atoConfig.reversed = config->reversed;
237 atoConfig.errorThreshold = config->errorThreshold;
238 atoConfig.sqrAmplMax = config->sqrAmplMax;
239 atoConfig.sqrAmplMin = config->sqrAmplMin;
240 atoConfig.periodPerRotation = config->periodPerRotation;
241
242 atoConfig.kp = config->kp;
243 atoConfig.ki = config->ki;
244 atoConfig.kd = config->kd;
245 atoConfig.resolution = config->resolution;
246
247 #if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION
248 Ifx_AngleTrkF32_init(&(driver->angleTrk), &atoConfig, config->userTs);
249 #else
250 Ifx_AngleTrkF32_init(&(driver->angleTrk), &atoConfig, driver->updatePeriod);
251 #endif
252 }
253
254 /* Optional calibration init */
255 {}
256 return result;
257 }
258
259
260 void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config)
261 {
262 config->kp = 0; /* Force to used default from Ifx_AngleTrkF32 */
263 config->ki = 0;
264 config->kd = 0;
265 config->speedLpfFc = 100;
266 config->errorThreshold = 5.0f / 180 * IFX_PI;
267 config->userTs = 0;
268 config->sqrAmplMax = (sint32)((1.01f * 1.01f) * 2048);
269 config->sqrAmplMin = (sint32)((0.99f * 0.99f) * 2048);
270 config->periodPerRotation = 1;
271 config->reversed = FALSE;
272 config->resolution = (1UL << 12); /** \brief 12-bit default resolution */
273 config->offset = 0;
274 IfxDsadc_Dsadc_initCarrierGenConfig(&config->hardware.carrierGen);
275 config->hardware.gtmTimestamp.gtm = &MODULE_GTM;
276 config->hardware.gtmTimestamp.pwmTim = NULL_PTR;
277 config->hardware.gtmTimestamp.rdcTim = IfxGtm_Tim_0;
278 config->hardware.gtmTimestamp.rdcTimChannel = IfxGtm_Tim_Ch_0;
279 config->hardware.gtmTimestamp.rdcTimMuxValue = 0;
280 IfxDsadc_Dsadc_initChannelConfig(&config->hardware.inputConfig, NULL_PTR);
281 config->hardware.inputCos = IfxDsadc_ChannelId_0;
282
283 config->hardware.inputSin = IfxDsadc_ChannelId_2;
284
285 config->hardware.outputClock = NULL_PTR;
286 config->hardware.servReqPriority = 0;
287 config->hardware.servReqProvider = IfxSrc_Tos_cpu0;
288 config->hardware.startScan = FALSE;
289 }
290
291
292 IFX_STATIC Ifx_GTM_TIM_CH *IfxDsadc_Rdc_initGtmTim(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
293 {
294 Ifx_GTM_TIM_CH *pTimCh = IfxGtm_Tim_getChannel(&gtm->TIM[tim], timCh);
295 Ifx_GTM_TIM_CH_CTRL ctrl;
296 ctrl.B = IfxDsadc_Rdc_GtmTimCfg;
297 ctrl.B.DSL = (risingEdge != FALSE) ? 1 : 0;
298 pTimCh->CTRL.U = ctrl.U;
299 return pTimCh;
300 }
301
302
303 IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
304 {
305 // #if IFXDSADC_HW_INIT
306 IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
307 const IfxDsadc_Rdc_ConfigHw *configHw = &config->hardware;
308 Ifx_DSADC *module = configHw->inputConfig.module;
309 boolean result = (module != NULL_PTR) ? TRUE : FALSE;
310
311 if (result != FALSE)
312 {
313 /* Initialise input channels */
314 {
315 IfxDsadc_Dsadc_ChannelConfig channelConfig = configHw->inputConfig;
316 channelConfig.channelId = configHw->inputCos;
317 IfxDsadc_Dsadc_initChannel(&hwHandle->inputCos, &channelConfig);
318
319 channelConfig.channelId = configHw->inputSin;
320 IfxDsadc_Dsadc_initChannel(&hwHandle->inputSin, &channelConfig);
321
322 if (configHw->servReqPriority != 0)
323 {
324 IfxDsadc_ChannelId ch = channelConfig.channelId;
325
326 volatile Ifx_SRC_SRCR *srcr;
327
328 if (ch == 0)
329 {
330 srcr = &MODULE_SRC.DSADC.DSADC0.SRM;
331 }
332
333 else if (ch == 2)
334 {
335 srcr = &MODULE_SRC.DSADC.DSADC2.SRM;
336 }
337
338 else if (ch == 3)
339 {
340 srcr = &MODULE_SRC.DSADC.DSADC3.SRM;
341 }
342
343 IfxSrc_init(srcr, configHw->servReqProvider, configHw->servReqPriority);
344 IfxSrc_enable(srcr);
345 }
346 }
347
348 /* Initialise carrier generator, if necessary */
349 if ((configHw->carrierGen.pinNeg != NULL_PTR) || (configHw->carrierGen.pinPos != NULL_PTR))
350 {
351 IfxDsadc_Dsadc_initCarrierGen(config->dsadc, &configHw->carrierGen);
352 }
353
354 /* Start conversion, if necessary */
355 if (configHw->startScan != FALSE)
356 {
357 IfxDsadc_Rdc_startConversion(driver);
358 }
359
360 /* Initialise modulator clock output, if necessary */
361 if (configHw->outputClock != NULL_PTR)
362 {
363 const IfxPort_Pin *clkPin = &(configHw->outputClock->pin);
364 IfxPort_setPinModeOutput(clkPin->port, clkPin->pinIndex, configHw->carrierGen.pinMode, configHw->outputClock->select);
365 IfxPort_setPinPadDriver(clkPin->port, clkPin->pinIndex, IfxPort_PadDriver_cmosAutomotiveSpeed1);
366 }
367 }
368
369 return result;
370 }
371
372
373 IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
374 {
375 IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
376 const IfxDsadc_Rdc_ConfigHw *configHw = &config->hardware;
377 const IfxDsadc_Rdc_GtmTimestamp *tsConfig = &(configHw->gtmTimestamp);
378 Ifx_GTM *gtm = tsConfig->gtm;
379
380 /** - Initialize TIM channel which is triggered by application's PWM */
381 {
382 boolean risingEdge = (configHw->inputConfig.demodulator.timestampTrigger == IfxDsadc_TimestampTrigger_risingEdge);
383 hwHandle->pwmTimCh = IfxDsadc_Rdc_initGtmTim(gtm, tsConfig->pwmTim->tim, tsConfig->pwmTim->channel, risingEdge);
384
385 /* connect into TIM timer input: */
386 IfxGtm_PinMap_setTimTin(tsConfig->pwmTim, IfxPort_InputMode_undefined);
387 }
388 /** - Initialize TIM channel which is triggered by DSADC sample event */
389 {
390 hwHandle->rdcTimCh = IfxDsadc_Rdc_initGtmTim(gtm, tsConfig->rdcTim, tsConfig->rdcTimChannel, TRUE);
391
392 /** - Connect DSADC trigger to TIM mux */
393 IfxGtm_Trig_fromDsadc(gtm, configHw->inputSin, tsConfig->rdcTim, tsConfig->rdcTimChannel);
394
395 /** - Connect into TIM input */
396 uint32 shift = tsConfig->rdcTimChannel * 4;
397 __ldmst_c(&(gtm->INOUTSEL.TIM[tsConfig->rdcTim].INSEL.U), (0xFU << shift), (tsConfig->rdcTimMuxValue << shift));
398 }
399 IfxGtm_Tbu_enableChannel(gtm, IfxGtm_Tbu_Ts_0);
400 }
401
402
403 void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver)
404 {
405 driver->timestamp.rdc = driver->hardware.rdcTimCh->GPR0.B.GPR0;
406
407 Ifx_DSADC *dsadc = driver->hardware.inputSin.module;
408 driver->sinIn = IfxDsadc_getMainResult(dsadc, driver->hardware.inputSin.channelId);
409 driver->cosIn = IfxDsadc_getMainResult(dsadc, driver->hardware.inputCos.channelId);
410 /*
411 */
412
413 #if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION == 0
414 {
415 sint16 sinIn = driver->sinIn;
416 sint16 cosIn = driver->cosIn;
417
418 /* tracking observer (note: atan2 lookup function is available inside) */
419 Ifx_AngleTrkF32_step(&(driver->angleTrk), sinIn, cosIn, 0);
420 Ifx_AngleTrkF32_updateStatus(&(driver->angleTrk), sinIn, cosIn);
421 }
422 #endif
423 }
424
425
426 void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver)
427 {
428 Ifx_AngleTrkF32_reset(&driver->angleTrk);
429 }
430
431
432 void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver)
433 {
434 Ifx_AngleTrkF32_resetFaults(&driver->angleTrk);
435 }
436
437
438 void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset)
439 {
440 Ifx_AngleTrkF32_setOffset(&driver->angleTrk, offset);
441 }
442
443
444 void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod)
445 {
446 Ifx_AngleTrkF32_setRefreshPeriod(&driver->angleTrk, updatePeriod);
447 }
448
449
450 void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver)
451 {
452 Ifx_DSADC *module = driver->hardware.inputSin.module;
453 uint32 mask =
454 (1U << driver->hardware.inputCos.channelId) |
455 (1U << driver->hardware.inputSin.channelId);
456 IfxDsadc_startScan(module, mask, mask);
457 }
458
459
460 boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
461 {
462 /* Ensure the stdif is reset to zeros */
463 memset(stdif, 0, sizeof(IfxStdIf_Pos));
464
465 /* Set the driver */
466 stdif->driver = driver;
467
468 /* *INDENT-OFF* Note: this file was indented manually by the author. */
469 /* Set the API link */
470 stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )NULL_PTR;
471 stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&IfxDsadc_Rdc_getAbsolutePosition;
472 stdif->getDirection =(IfxStdIf_Pos_GetDirection )&IfxDsadc_Rdc_getDirection;
473 stdif->getFault =(IfxStdIf_Pos_GetFault )&IfxDsadc_Rdc_getFault;
474 stdif->getOffset =(IfxStdIf_Pos_GetOffset )&IfxDsadc_Rdc_getOffset;
475 stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&IfxDsadc_Rdc_getPeriodPerRotation;
476 stdif->getPosition =(IfxStdIf_Pos_GetPosition )&IfxDsadc_Rdc_getPosition;
477 stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&IfxDsadc_Rdc_getRawPosition;
478 stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&IfxDsadc_Rdc_getRefreshPeriod;
479 stdif->getResolution =(IfxStdIf_Pos_GetResolution )&IfxDsadc_Rdc_getResolution;
480 stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&IfxDsadc_Rdc_getSensorType;
481 stdif->reset =(IfxStdIf_Pos_Reset )&IfxDsadc_Rdc_reset;
482 stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&IfxDsadc_Rdc_resetFaults;
483 stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&IfxDsadc_Rdc_getSpeed;
484 stdif->update =(IfxStdIf_Pos_Update )&IfxDsadc_Rdc_update;
485 stdif->setPosition =(IfxStdIf_Pos_SetPosition )NULL_PTR;
486 stdif->setRawPosition =(IfxStdIf_Pos_SetRawPosition )NULL_PTR;
487 stdif->setSpeed =(IfxStdIf_Pos_SetSpeed )NULL_PTR;
488 stdif->setOffset =(IfxStdIf_Pos_SetOffset )&IfxDsadc_Rdc_setOffset;
489 stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&IfxDsadc_Rdc_setRefreshPeriod;
490 stdif->getTurn =(IfxStdIf_Pos_GetTurn )&IfxDsadc_Rdc_getTurn;
491 stdif->onEventA =(IfxStdIf_Pos_OnEventA )&IfxDsadc_Rdc_onEventA;
492 /* *INDENT-ON* */
493
494 return TRUE;
495 }
496
497
498 void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver)
499 {
500 float32 groupDelayAngle;
501 float32 timeStampAngle;
502 float32 angleOut;
503 float32 speedEst;
504 float32 angleCorrection;
505
506 /* previous estimated speed */
507 speedEst = Ifx_AngleTrkF32_getLoopSpeed(&(driver->angleTrk));
508
509 /* angular component due to group delay */
510 groupDelayAngle = driver->groupDelay * speedEst;
511
512 /* angular component due to time-stamp, if time-stamping is enabled */
513 if (driver->timestamp.enabled != FALSE)
514 {
515 IfxDsadc_Rdc_updateTimestamp(driver);
516 timeStampAngle = IfxDsadc_Rdc_getTimestamp(driver) * speedEst;
517 }
518 else
519 {
520 timeStampAngle = 0;
521 }
522
523 /* angle correction value */
524 angleCorrection = groupDelayAngle + timeStampAngle;
525
526 #if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION != 0
527 /*
528 * driver->sinIn = (sint16)driver->hardware.inputSin.channel->TSTMP.B.RESULT;
529 * driver->cosIn = (sint16)driver->hardware.inputCos.channel->TSTMP.B.RESULT;
530 */
531
532 {
533 sint16 sinIn = driver->sinIn;
534 sint16 cosIn = driver->cosIn;
535
536 /* tracking observer (note: atan2 lookup function is available inside) */
537 Ifx_AngleTrkF32_step(&(driver->angleTrk), sinIn, cosIn, angleCorrection);
538 Ifx_AngleTrkF32_updateStatus(&(driver->angleTrk), sinIn, cosIn);
539 }
540 angleOut = driver->angleTrk.angleEst;
541 #else
542 angleOut = driver->angleTrk.angleEst + angleCorrection;
543 #endif
544
545 /* final output estimation */
546 {
547 Ifx_AngleTrkF32_PosIf *base = &(driver->angleTrk).base;
548 IfxStdIf_Pos_RawAngle newPosition = (IfxStdIf_Pos_RawAngle)(angleOut * (base->resolution / 2) / IFX_PI);
549 newPosition = (newPosition + base->offset) & (base->resolution - 1);
550 base->rawPosition = newPosition;
551 }
552 }
Ifx_AngleTrkF32_resetFaults
void Ifx_AngleTrkF32_resetFaults(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:379
IfxDsadc_Rdc_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: IfxDsadc_Rdc.h:387
Ifx_AngleTrkF32_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: Ifx_AngleTrkF32.h:65
IfxDsadc_Rdc_initHwChannels
IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC hardware channels.
Definition: IfxDsadc_Rdc.c:303
IfxDsadc_Rdc_Hw::rdcTimCh
Ifx_GTM_TIM_CH * rdcTimCh
TIM channel for DSADC timestamp.
Definition: IfxDsadc_Rdc.h:341
Ifx_AngleTrkF32_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (Ifx_AngleTrkF32_Config::resolution - 1)].
Definition: Ifx_AngleTrkF32.h:68
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:237
IfxDsadc_Rdc_ConfigHw::servReqPriority
Ifx_Priority servReqPriority
Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig...
Definition: IfxDsadc_Rdc.h:325
IfxGtm_PinMap_setTimTin
void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:689
Ifx_AngleTrkF32_getAbsolutePosition
float32 Ifx_AngleTrkF32_getAbsolutePosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:318
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:170
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:120
IfxDsadc_Rdc_Config::userTs
float32 userTs
Sampling period of the application.
Definition: IfxDsadc_Rdc.h:384
IfxDsadc_Rdc_ConfigHw::inputSin
IfxDsadc_ChannelId inputSin
Channel ID of DSADC used for SIN input. This will override value given in the inputConfig.
Definition: IfxDsadc_Rdc.h:323
IfxDsadc_Rdc_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)].
Definition: IfxDsadc_Rdc.h:390
Ifx_AngleTrkF32_initConfig
void Ifx_AngleTrkF32_initConfig(Ifx_AngleTrkF32_Config *config, sint16 *sinIn, sint16 *cosIn)
Fill config with default values.
Definition: Ifx_AngleTrkF32.c:113
IfxDsadc_Rdc_ConfigHw::startScan
boolean startScan
Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called...
Definition: IfxDsadc_Rdc.h:327
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:290
IfxGtm_Tim_Mode_inputEvent
TIEM.
Definition: IfxGtm_Tim.h:93
IfxDsadc_Dsadc_Channel::module
Ifx_DSADC * module
Specifies the pointer to the DSADC module registers.
Definition: IfxDsadc_Dsadc.h:299
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:122
IfxDsadc_Rdc_ConfigHw
RDC hardware configuration.
Definition: IfxDsadc_Rdc.h:320
IfxDsadc_Rdc_GtmTimestamp::rdcTim
IfxGtm_Tim rdcTim
Definition: IfxDsadc_Rdc.h:308
IfxDsadc_Rdc_calculateGroupDelay
IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay(IfxDsadc_Rdc *driver)
Group Dalay calculation.
Definition: IfxDsadc_Rdc.c:142
IfxGtm_Tim_GprSel_tbuTs0
Definition: IfxGtm_Tim.h:77
IfxStdIf_Pos_SetRawPosition
void(* IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:248
IfxDsadc_Dsadc_initChannel
void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
Initialise a DSADC channel with the supplied configuration.
Definition: IfxDsadc_Dsadc.c:179
IfxDsadc_Rdc_resetFaults
void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:432
IfxDsadc_Rdc_GtmTimestamp::gtm
Ifx_GTM * gtm
Pointer to GTM SFRs.
Definition: IfxDsadc_Rdc.h:307
IfxGtm_Tbu_enableChannel
IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel.
Definition: IfxGtm_Tbu.h:98
IfxDsadc_Rdc_getRawPosition
IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:596
IfxDsadc_getMainGroupDelay
float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Estimate the group delay of main-chain filters in seconds.
Definition: IfxDsadc.c:70
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:286
IfxStdIf_Pos_::setPosition
IfxStdIf_Pos_SetPosition setPosition
Definition: IfxStdIf_Pos.h:287
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:246
IfxGtm_Tbu_Ts_0
Definition: IfxGtm_Tbu.h:51
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:188
Ifx_AngleTrkF32_Config::kd
float32 kd
Derivative gain.
Definition: Ifx_AngleTrkF32.h:60
Ifx_AngleTrkF32_getResolution
sint32 Ifx_AngleTrkF32_getResolution(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:360
Ifx_AngleTrkF32::angleEst
float32 angleEst
Definition: Ifx_AngleTrkF32.h:108
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:268
IfxDsadc_Rdc_Config::kp
float32 kp
Observer proportional gain.
Definition: IfxDsadc_Rdc.h:379
IfxDsadc_Rdc_ConfigHw::inputConfig
IfxDsadc_Dsadc_ChannelConfig inputConfig
Default channel configuration for both SIN and COS input.
Definition: IfxDsadc_Rdc.h:322
IfxDsadc_Rdc::cosIn
sint16 cosIn
Definition: IfxDsadc_Rdc.h:367
IfxDsadc_Rdc_getDirection
IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:162
Ifx_AngleTrkF32_Config::ki
float32 ki
Integrator gain.
Definition: Ifx_AngleTrkF32.h:59
Ifx_AngleTrkF32_PosIf::rawPosition
IfxStdIf_Pos_RawAngle rawPosition
raw position in ticks.
Definition: Ifx_AngleTrkF32.h:85
Ifx_AngleTrkF32_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:63
IfxDsadc_Rdc_ConfigHw::gtmTimestamp
IfxDsadc_Rdc_GtmTimestamp gtmTimestamp
Timestamp helper using GTM.
Definition: IfxDsadc_Rdc.h:331
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Trig_fromDsadc
boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
Definition: IfxGtm_Trig.c:157
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:91
IfxDsadc_Dsadc_Channel::channelId
IfxDsadc_ChannelId channelId
Channel Id.
Definition: IfxDsadc_Dsadc.h:301
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:275
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:276
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
Ifx_AngleTrkF32_Config::resolution
sint32 resolution
Sensor resolution.
Definition: Ifx_AngleTrkF32.h:67
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:96
IfxDsadc_Rdc_Hw::inputCos
IfxDsadc_Dsadc_Channel inputCos
Handle to COS input channel.
Definition: IfxDsadc_Rdc.h:339
IfxDsadc_Rdc_Config
DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use d...
Definition: IfxDsadc_Rdc.h:377
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:279
Ifx_AngleTrkF32_init
void Ifx_AngleTrkF32_init(Ifx_AngleTrkF32 *aObsv, const Ifx_AngleTrkF32_Config *config, float32 Ts)
Initialize the Angle Tracking object.
Definition: Ifx_AngleTrkF32.c:145
IfxDsadc_Rdc_GtmTimestamp::rdcTimMuxValue
uint32 rdcTimMuxValue
Mux value used.
Definition: IfxDsadc_Rdc.h:310
IfxDsadc_getIntegratorOutFreq
float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get the sample frequency of the integrator output in Hz.
Definition: IfxDsadc.c:41
IfxDsadc_Cout_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxDsadc_PinMap.h:104
IfxPort_InputMode_undefined
Definition: IfxPort.h:65
IfxDsadc_Rdc_getSensorType
IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:192
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:273
IfxDsadc_Rdc_Ts::inSeconds
float32 inSeconds
Definition: IfxDsadc_Rdc.h:349
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:115
Ifx_AngleTrkF32_step
float32 Ifx_AngleTrkF32_step(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn, float32 phase)
Step function of Ifx_AngleTrkF32 should be called at every sampling period provided during initialisa...
Definition: Ifx_AngleTrkF32.c:203
IfxDsadc_Rdc_getPosition
float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:174
IfxDsadc_startScan
IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
Enables the conversion of multiple channels.
Definition: IfxDsadc.h:728
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:78
IfxStdIf_Pos_::setRawPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
Definition: IfxStdIf_Pos.h:288
FALSE
#define FALSE
Definition: Platform_Types.h:90
Ifx_AngleTrkF32_Config::kp
float32 kp
Proportional gain.
Definition: Ifx_AngleTrkF32.h:58
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:277
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:55
Ifx_AngleTrkF32_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop.
Definition: Ifx_AngleTrkF32.h:62
Ifx_AngleTrkF32_getDirection
IfxStdIf_Pos_Dir Ifx_AngleTrkF32_getDirection(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:324
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:272
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxDsadc_Rdc_stdIfPosInit
boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos".
Definition: IfxDsadc_Rdc.c:460
IfxDsadc_Dsadc_CarrierGenConfig::pinPos
IFX_CONST IfxDsadc_Cgpwm_Out * pinPos
Positive-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:289
sint16
short sint16
Definition: Platform_Types.h:126
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:200
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:274
IfxDsadc_Rdc_Config::ki
float32 ki
Observer integral gain.
Definition: IfxDsadc_Rdc.h:380
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:182
IfxDsadc_Rdc_GtmTimCfg
IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg
GTM TIM Configuration settings.
Definition: IfxDsadc_Rdc.c:106
IFXDSADC_RDC_CFG_DEBUG
#define IFXDSADC_RDC_CFG_DEBUG
Definition: IfxDsadc_Rdc.h:294
IfxDsadc_Rdc_Ts::rdc
uint32 rdc
Absolute time of DSADC result.
Definition: IfxDsadc_Rdc.h:350
Ifx_AngleTrkF32_reset
void Ifx_AngleTrkF32_reset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:391
IfxStdIf_Pos_SetPosition
void(* IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:242
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:164
IfxDsadc_Rdc_Config::hardware
IfxDsadc_Rdc_ConfigHw hardware
Pointer to hardware config.
Definition: IfxDsadc_Rdc.h:391
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:141
IfxDsadc_Dsadc_CarrierGenConfig::pinMode
IfxPort_OutputMode pinMode
Carrier pins output mode.
Definition: IfxDsadc_Dsadc.h:291
IfxDsadc_Rdc_initConfig
void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config)
Definition: IfxDsadc_Rdc.c:260
Ifx_AngleTrkF32_getTurn
sint32 Ifx_AngleTrkF32_getTurn(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:373
IfxDsadc_Rdc_initGtmTim
IFX_STATIC Ifx_GTM_TIM_CH * IfxDsadc_Rdc_initGtmTim(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
Definition: IfxDsadc_Rdc.c:292
IfxDsadc_Dsadc_CarrierGenConfig::pinNeg
IFX_CONST IfxDsadc_Cgpwm_Out * pinNeg
Negative-carrier pin configuration.
Definition: IfxDsadc_Dsadc.h:290
IfxDsadc_Rdc_getTurn
sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:198
IfxDsadc_Rdc_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: IfxDsadc_Rdc.h:385
Ifx_AngleTrkF32_PosIf::resolution
IfxStdIf_Pos_RawAngle resolution
resolution of this position sensor interface
Definition: Ifx_AngleTrkF32.h:93
IfxDsadc_Rdc_setOffset
void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset)
Definition: IfxDsadc_Rdc.c:438
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:262
IfxDsadc_Rdc_getRefreshPeriod
float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:180
IfxDsadc_Rdc::angleTrk
Ifx_AngleTrkF32 angleTrk
Definition: IfxDsadc_Rdc.h:365
Ifx_AngleTrkF32_Config
Angle Tracking Observer configuration.
Definition: Ifx_AngleTrkF32.h:56
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
Ifx_AngleTrkF32_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter.
Definition: Ifx_AngleTrkF32.h:61
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:75
IfxStdIf_Pos_OnEventA
void(* IfxStdIf_Pos_OnEventA)(IfxStdIf_InterfaceDriver stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional.
Definition: IfxStdIf_Pos.h:201
IfxGtm_Tbu_getClockFrequency
float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency.
Definition: IfxGtm_Tbu.c:36
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:155
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:278
Ifx_AngleTrkF32_setRefreshPeriod
void Ifx_AngleTrkF32_setRefreshPeriod(Ifx_AngleTrkF32 *driver, float32 updatePeriod)
Definition: Ifx_AngleTrkF32.c:385
IfxDsadc_Rdc
DSADC RDC data structure.
Definition: IfxDsadc_Rdc.h:363
IfxDsadc_Rdc_update
void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:498
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:266
Ifx_AngleTrkF32_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: Ifx_AngleTrkF32.h:66
IfxDsadc_Rdc_updateTimestamp
IFX_INLINE void IfxDsadc_Rdc_updateTimestamp(IfxDsadc_Rdc *driver)
Updating RDC timestamps.
Definition: IfxDsadc_Rdc.c:123
IfxDsadc_Rdc_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:584
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:64
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxDsadc_Rdc_Config::resolution
sint32 resolution
Sensor resolution.
Definition: IfxDsadc_Rdc.h:389
Ifx_AngleTrkF32_getLoopSpeed
IFX_INLINE float32 Ifx_AngleTrkF32_getLoopSpeed(Ifx_AngleTrkF32 *aObsv)
get the speed.
Definition: Ifx_AngleTrkF32.h:158
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxDsadc_Cout_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxDsadc_PinMap.h:105
IfxDsadc_Rdc_ConfigHw::outputClock
IfxDsadc_Cout_Out * outputClock
if not NULL_PTR, modulator clock output pin from inputSin channel will be configured ...
Definition: IfxDsadc_Rdc.h:330
IfxDsadc_Rdc_initHwTimestamp
IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the GTM timestamp hardware resources.
Definition: IfxDsadc_Rdc.c:373
IfxDsadc_Rdc_Config::kd
float32 kd
Observer differential gain.
Definition: IfxDsadc_Rdc.h:381
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:148
IfxDsadc_Rdc_onEventA
void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:403
Ifx_AngleTrkF32_getRefreshPeriod
float32 Ifx_AngleTrkF32_getRefreshPeriod(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:354
IfxDsadc_Rdc::updatePeriod
float32 updatePeriod
Definition: IfxDsadc_Rdc.h:368
IfxDsadc_Dsadc_initCarrierGenConfig
void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
Definition: IfxDsadc_Dsadc.c:463
IfxDsadc_Rdc_setRefreshPeriod
void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod)
Definition: IfxDsadc_Rdc.c:444
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:79
IfxDsadc_Rdc_Ts
Definition: IfxDsadc_Rdc.h:346
IfxStdIf_Pos_SetSpeed
void(* IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:255
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:284
IfxDsadc_getMainResult
IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
Get result from the main chain.
Definition: IfxDsadc.h:624
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:235
IfxDsadc_Dsadc_DemodulatorConfig::timestampTrigger
IfxDsadc_TimestampTrigger timestampTrigger
Timestamp trigger mode selection.
Definition: IfxDsadc_Dsadc.h:222
IfxDsadc_Rdc_Hw
DSADC RDC hardware object structure.
Definition: IfxDsadc_Rdc.h:336
IfxDsadc_Rdc_calculateTimestampPeriod
IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod(const IfxDsadc_Rdc_Config *config)
Definition: IfxDsadc_Rdc.c:149
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:219
Ifx_AngleTrkF32_PosIf
Definition: Ifx_AngleTrkF32.h:83
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxDsadc_Rdc_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter (in Hertz).
Definition: IfxDsadc_Rdc.h:382
IfxDsadc_Rdc_ConfigHw::inputCos
IfxDsadc_ChannelId inputCos
Channel ID of DSADC used for COS input. This will override value given in the inputConfig.
Definition: IfxDsadc_Rdc.h:324
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:271
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:270
IfxDsadc_Rdc_getResolution
sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:186
IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxDsadc_Dsadc.h:306
IfxDsadc_Rdc_getOffset
sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:168
IfxDsadc_Rdc_getPeriodPerRotation
IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:590
IfxDsadc_Rdc_GtmTimestamp::rdcTimChannel
IfxGtm_Tim_Ch rdcTimChannel
TIM channel triggered by DSADC channel.
Definition: IfxDsadc_Rdc.h:309
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:285
IfxDsadc_Rdc_ConfigHw::servReqProvider
IfxSrc_Tos servReqProvider
Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig...
Definition: IfxDsadc_Rdc.h:326
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:194
sint32
long sint32
Definition: Platform_Types.h:131
IfxDsadc_ChannelId_2
Specifies the channel Index 2.
Definition: IfxDsadc.h:123
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:109
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxDsadc_Rdc_Hw::inputSin
IfxDsadc_Dsadc_Channel inputSin
Handle to SIN input channel.
Definition: IfxDsadc_Rdc.h:338
IfxDsadc_Rdc_GtmTimestamp::pwmTim
IfxGtm_Tim_TinMap * pwmTim
TIM channel triggered by PWM trigger.
Definition: IfxDsadc_Rdc.h:311
IfxDsadc_Rdc_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: IfxDsadc_Rdc.h:388
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:283
IfxDsadc_Rdc_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: IfxDsadc_Rdc.h:386
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:210
IfxDsadc_Rdc_Ts::inTicks
sint32 inTicks
Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set. ...
Definition: IfxDsadc_Rdc.h:352
IfxDsadc_Rdc_Ts::pwm
uint32 pwm
Absolute time of user&#39;s PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set.
Definition: IfxDsadc_Rdc.h:351
IfxDsadc_Rdc_getTimestamp
IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver)
Return timestamp in seconds.
Definition: IfxDsadc_Rdc.h:608
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:269
IfxDsadc_Rdc_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop (in radian)
Definition: IfxDsadc_Rdc.h:383
Ifx_AngleTrkF32_getOffset
sint32 Ifx_AngleTrkF32_getOffset(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:336
IfxDsadc_Rdc::sinIn
sint16 sinIn
Definition: IfxDsadc_Rdc.h:366
IfxDsadc_Rdc::groupDelay
float32 groupDelay
Definition: IfxDsadc_Rdc.h:369
IfxDsadc_Rdc_getUpdatePeriod
IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod(IfxDsadc_Rdc *driver)
Return the update period.
Definition: IfxDsadc_Rdc.c:204
IfxStdIf_Pos_::onEventA
IfxStdIf_Pos_OnEventA onEventA
Definition: IfxStdIf_Pos.h:281
IfxStdIf_Pos_SensorType_resolver
Definition: IfxStdIf_Pos.h:68
IfxDsadc_Rdc_reset
void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:426
IfxDsadc_Rdc_Hw::pwmTimCh
Ifx_GTM_TIM_CH * pwmTimCh
TIM channel for PWM timestamp.
Definition: IfxDsadc_Rdc.h:340
Ifx_AngleTrkF32_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: Ifx_AngleTrkF32.h:64
Ifx_AngleTrkF32_getPosition
float32 Ifx_AngleTrkF32_getPosition(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:348
IfxDsadc_Rdc_getSpeed
IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:602
IfxDsadc_Dsadc_ChannelConfig::demodulator
IfxDsadc_Dsadc_DemodulatorConfig demodulator
Demodulator configuration structure.
Definition: IfxDsadc_Dsadc.h:311
IfxDsadc_ChannelId_0
Specifies the channel Index 0.
Definition: IfxDsadc.h:122
IfxDsadc_Rdc_Config::dsadc
IfxDsadc_Dsadc * dsadc
Pointer to the DSADC driver.
Definition: IfxDsadc_Rdc.h:392
IfxDsadc_Rdc.h
DSADC RDC details.
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:353
IfxDsadc_Dsadc_initCarrierGen
void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
Initialise the DSADC carrier generator.
Definition: IfxDsadc_Dsadc.c:148
IfxGtm_Trig.h
GTM TRIG details.
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:280
IfxDsadc_Rdc::hardware
IfxDsadc_Rdc_Hw hardware
Definition: IfxDsadc_Rdc.h:370
IfxDsadc_Rdc_startConversion
void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels.
Definition: IfxDsadc_Rdc.c:450
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:282
IfxDsadc_Rdc_init
boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising:
Definition: IfxDsadc_Rdc.c:211
IfxDsadc_Rdc_Ts::clockPeriod
float32 clockPeriod
Period of absolute time clock (in second)
Definition: IfxDsadc_Rdc.h:354
IfxDsadc_Rdc_Ts::enabled
boolean enabled
Definition: IfxDsadc_Rdc.h:348
IfxDsadc_Rdc::timestamp
IfxDsadc_Rdc_Ts timestamp
Definition: IfxDsadc_Rdc.h:371
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxDsadc_TimestampTrigger_risingEdge
Trigger event upon a rising edge.
Definition: IfxDsadc.h:356
IfxDsadc_Dsadc_initChannelConfig
void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
Initialise the config struct with default DSADC channel configuration.
Definition: IfxDsadc_Dsadc.c:237
IfxDsadc_Rdc_GtmTimestamp
DSADC timestamp helper using GTM.
Definition: IfxDsadc_Rdc.h:305
IfxDsadc_Rdc_ConfigHw::carrierGen
IfxDsadc_Dsadc_CarrierGenConfig carrierGen
Pointer to the carrier signal generation configuration.
Definition: IfxDsadc_Rdc.h:328
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:132
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:176
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:228
IfxStdIf_Pos_::setSpeed
IfxStdIf_Pos_SetSpeed setSpeed
Definition: IfxStdIf_Pos.h:289
Ifx_AngleTrkF32_setOffset
void Ifx_AngleTrkF32_setOffset(Ifx_AngleTrkF32 *aObsv, IfxStdIf_Pos_RawAngle offset)
Set the position offset (in ticks)
Definition: Ifx_AngleTrkF32.c:254
Ifx_AngleTrkF32_updateStatus
void Ifx_AngleTrkF32_updateStatus(Ifx_AngleTrkF32 *aObsv, sint16 sinIn, sint16 cosIn)
Update the status flags.
Definition: Ifx_AngleTrkF32.c:267
IfxDsadc_Rdc_getAbsolutePosition
float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition
Definition: IfxDsadc_Rdc.c:156
IfxDsadc_Rdc_Ts::maxTicks
uint32 maxTicks
Maximum time-stamp value (in ticks of absolute time clock)
Definition: IfxDsadc_Rdc.h:353


iLLD_TC26B: IfxDsadc_Rdc.h Source File

  • Dsadc
  • Rdc
IfxDsadc_Rdc.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_Rdc.h
3 * \brief DSADC RDC details
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * Please refer to page \ref page_dsadc_rdc for more details.
25 * This module uses the following modules:
26 * - \ref IfxLld_Dsadc
27 * - \ref library_srvsw_sysse_math_f32_angletrk
28 *
29 *
30 *
31 * Example usage:
32 * Initialisation shall be done by using IfxDsadc_Rdc_init().
33 * \code
34 * IfxDsadc_Rdc rdcHandle;
35 * IfxDsadc_Rdc_Config rdcConfig;
36 *
37 * IfxDsadc_Rdc_initConfig(&rdcConfig);
38 * rdcConfig.hardware.inputConfig.module = &MODULE_DSADC;
39 * IfxDsadc_Rdc_init(&rdcHandle, &rdcConfig);
40 * IfxDsadc_Rdc_startConversion(&rdcHandle);
41 *
42 * \endcode
43 *
44 * After successful initialisation, one DSADC channel may generate interrupt request to CPU.
45 * Function IfxDsadc_Rdc_onEventA() shall be called in the interrupt service routine.
46 *
47 * The function IfxDsadc_Rdc_update() shall be called in the user application's task
48 * or interrupt context for updating the final outputs (position and speed),
49 * (e.g. running inside motor PWM interrupt context)
50 * \name Getting result functions
51 *
52 * \code
53 * { // within context of user's application interrupt or task
54 * extern IfxDsadc_Rdc rdcHandle;
55 *
56 * IfxDsadc_Rdc_update(&rdcHandle); // final update
57 *
58 * IfxStdIf_Pos_RawAngle position = IfxDsadc_Rdc_getRawPosition(&rdcHandle);
59 * StdReal speedRad_s = IfxDsadc_Rdc_getSpeed(&rdcHandle);
60 * }
61 * \endcode
62 *
63 * Alternatively, the application may use \ref library_srvsw_stdif_posif for accessing the actual results.
64 *
65 * \code
66 * { // within context of user's application interrupt or task
67 * extern IfxDsadc_Rdc rdcHandle;
68 * Ifx_AngleTrkF32_PosIf* posIf = (Ifx_AngleTrkF32_PosIf*)&rdcHandle; // cast is safe because it's located in the same address
69 *
70 * PosIf_update(posIf); // final update, alias of IfxDsadc_Rdc_update()
71 *
72 * elAngle = PosIf_getElAngle(posIf);
73 * elSpeed = PosIf_getElSpeed(posIf);
74 * faultOccurred = PosIf_isFault(posIf);
75 * }
76 * \endcode
77 *
78 * \note the IfxDsadc_Rdc_update() is implementing the PosIf_update(). Therefore,
79 * only one of them shall be used.
80 *
81 *
82 *
83 *
84 *
85 *
86 *
87 * \page page_dsadc_rdc Resolver-to-digital Converter with DSADC
88 *
89 * \tableofcontents
90 *
91 * One of the popular rotor positioning sensor used by electric motor drive is resolver.
92 * A resolver device modulates carrier signal R1-R2 by the SINE and COSINE function of actual
93 * angle and feeds it back into the controller unit (S1-S3, S2-S6).
94 *
95 * AURIX family provides support for resolver-to-digital converter (RDC) by providing the
96 * following functionalities:
97 * - Carrier generation (DSADC hardware)
98 * - Signal acquisition and carrier cancellation (DSADC hardware)
99 * - Timestamp acquisition (GTM TIM hardware)
100 *
101 * Additionally, the following functionalities are provided by software:
102 * - Angle tracking observer function
103 * - Fault detection
104 *
105 * This page contains concept documentation of the driver software (\ref IfxLld_Dsadc_rdc "DSADC RDC"),
106 * especially implemented in files: IfxDsadc_Rdc.h and IfxDsadc_Rdc.c
107 *
108 * \section sec_dsadc_rdc_cgen Carrier generation
109 *
110 * DSADC hardware supports the generation of resolver excitation carrier by providing PWM
111 * pin outputs which can be simply filtered by low-pass filter circuit to obtain a pair of
112 * differential signal.
113 *
114 * Common configuration of the positive and negative signals are:
115 * - carrier signal frequency
116 * - bit-reversed PWM (optional, but recommended)
117 * - waveform mode: square, triangle, or sinusoidal
118 *
119 * Those configuration are set by IfxDsadc_initCarrierGen() function which is called in the
120 * context of IfxDsadc_Rdc_init() function. Therefore, user only needs to call
121 * IfxDsadc_Rdc_init().
122 *
123 * For each pin output (positive and negative), a low-pass filter and amplifier circuitry
124 * is required to drive a resolver device. Example of such circuitry can be seen in the
125 * figure below.
126 *
127 * TODO: add picture
128 *
129 * \section sec_dsadc_rdc_acq Signal acquisition and carrier cancellation
130 *
131 * Two differential signals are generated from a resolver device (Sin+, Sin-, Cos+, Cos- or
132 * some write also as S1-S3, S2-S6). These signals basically can be connected directly into
133 * the two channels of DSADC, where each DSADC channel has P and N inputs.
134 *
135 * Single DSADC channel and carrier cancelation configuration is done by function
136 * IfxDsadc_initChannel() which is called in the context of IfxDsadc_Rdc_init() function.
137 * Therefore, user only needs to call IfxDsadc_Rdc_init().
138 *
139 * Common configuration items for each DSADC channel are:
140 * - modulator frequency (default: 10MHz)
141 * - CIC filter type (default: COMB3)
142 * - CIC decimation factor (default: 32)
143 * - FIR0 and FIR1 blocks (default: disabled)
144 *
145 * Common configuration items of the carrier cancelation in each DSADC channel are:
146 * - offset compensation block (default: enabled)
147 * - integration count (default: 32)
148 *
149 * With above default values (modulator frequency 10MHz, CIC decimation factor = 32, both FIRs
150 * disabled and integration count = 32), the output sample rate is:
151 * 10MHz / (32 * 32) = ~9.7kHz
152 *
153 * In each acquired sample, interrupt service is requested by the first DSADC channel
154 * initialised by IfxDsadc_Rdc_init(). User's application shall provide an interrupt service
155 * routine (ISR) to handle this request. In the ISR, or an OS task which is synchronised to
156 * the event, user shall call IfxDsadc_Rdc_onEventA() function in order to update all
157 * necessary driver data related to this event.
158 *
159 * \section sec_dsadc_rdc_tstmp Timestamp acquisition
160 *
161 * Typically, user's application run at different sampling rate than DSADC output sampling
162 * rate. For example, motor control PWM interrupt occurs with 10 kHz sampling whereas the
163 * DSADC interrupt runs with ~9.7 kHz. This condition creates situation where the sampled
164 * resolver position is already aged with a few timer ticks, but can be significant to the
165 * motor control algorithm.
166 *
167 * Therefore, timestamp which indicates the elapsed time since last DSADC channel sampling
168 * is required for compensating or computing the missing rotor position. In addition, this
169 * timestamp is also used for compensating the group delay which is inherent property of
170 * DSADC.
171 *
172 * The implementation of timestamp acquisition uses following hardware resources:
173 * - one timebase unit or global timer (free-running), i.e. GTM TBU
174 * - first timer capture unit, to capture the time at the DSADC sample output event, i.e.
175 * using GTM TIM channel
176 * - second timer capture unit, to capture the time at the application sample point (e.g.
177 * PWM event), i.e. using GTM TIM channel.
178 *
179 * Those resources are initialised by IfxDsadc_Rdc_initHwTimestamp() function which is called
180 * in the context of IfxDsadc_Rdc_init() function. Therefore, user **doesn't need** to call
181 * IfxDsadc_Rdc_initHwTimestamp() separately.
182 *
183 * The user shall call IfxDsadc_Rdc_update() function in order to execute:
184 * - timestamp and group delay compensation
185 * - angle tracking observer
186 * - fault-detection
187 *
188 * \section sec_dsadc_rdc_ato Angle tracking observer
189 *
190 * Output samples acquired by DSADC channel and carrier cancelation are the envelope of SINE
191 * and COSINE resolver signals. In principle, ATAN2 function can be used to calculate the
192 * rotor position (angle), but in this driver a \ref library_srvsw_sysse_math_f32_angletrk "Ifx_AngleTrkF32" module is used.
193 *
194 * When user's application calls function IfxDsadc_Rdc_update(), function Ifx_AngleTrkF32_step()
195 * is also called which contains implementation of:
196 * - ATAN2,
197 * - 3rd order angle tracking observer
198 *
199 * The following figure shows the idea:
200 *
201 * TODO: add picture
202 *
203 * ATAN2 function computes the initial angle for the observer. Additional phase is computed
204 * from the timestamp and group delay to compensate 'missing' rotor position (angle).
205 * The combined initial angle and phase are used as reference for the first integrator for
206 * estimating acceleration. The second integrator estimates speed. The final integrator
207 * estimates the output angle.
208 *
209 * The output angle is normally more 'smooth' in steady-state than the angle from ATAN2
210 * function, albeit some settling time and overshoot which occur during transient. The dynamic
211 * performance depends on the gain constants set in the integrators. By default, the constants
212 * are calculated using formula from proceeding's paper
213 * [Design of advanced resolver-to-digital converters](http://www.univ-nantes.fr/servlet/com.univ.collaboratif.utils.LectureFichiergw?CODE_FICHIER=1307605985775&ID_FICHE=1329),
214 * by Auger, et.al, in Electrimacs 2011, CergyPontoise (France), 6-8 june 2011.
215 *
216 * \subsection sec_dsadc_rdc_groupDelay Group delay estimation
217 *
218 * It is shown in previous figure that group delay is required to estimate the actual position
219 * based on the angular speed and measured position.
220 *
221 * The group delay of itself is estimated to be the sum of group delay of components of the
222 * DSADC channel used for acquisition such as CIC filter, FIR0, FIR1, and Integrator blocks.
223 *
224 * The following formulas are used to estimate the group delays:
225 *
226 * <table>
227 * <tr><td>CIC group delay: \f$ \tau_{CIC} = \frac{N.k}{2.F_{mod}} \f$</td></tr>
228 * <tr><td>FIR0 group delay: \f$ \tau_{FIR0} = \frac{7}{2.F_{FIR0_{in}}} \f$</td></tr>
229 * <tr><td>FIR1 group delay: \f$ \tau_{FIR1} = \frac{27}{2.F_{FIR1_{in}}} \f$</td></tr>
230 * <tr><td>Integrator group delay: \f$ \tau_{INT} = \frac{N_{INT}-1}{2.F_{INT_{in}}} \f$</td></tr>
231 * </table>
232 *
233 * The function IfxDsadc_getMainGroupDelay() implements those formulas, invoked by
234 * IfxDsadc_Rdc_update().
235 *
236 * \section sec_dsadc_rdc_fault Fault detection
237 *
238 * When application calls function IfxDsadc_Rdc_update(), fault detection
239 * implemented in \ref library_srvsw_sysse_math_f32_angletrk "Ifx_AngleTrkF32" module is also executed.
240 * The fault-detection is based on simple trigonometry equation:
241 *
242 * \f$ \sin^2(\phi) + \cos^2(\phi) = 1 \f$
243 *
244 * With some tolerance, whenever the amplitude of one of SINE or COSINE signal is outside
245 * the allowed band, then fault flag is set. "SignalLoss" flag is set when the amplitude is
246 * below lower boundary. "SignalDegradation" flag is set when the amplitude is higher than
247 * upper boundary.
248 *
249 * In addition, the flag "TrackingLoss" is set when the internal error value of the angle
250 * tracking observer is above a threshold.
251 *
252 * Functions IfxDsadc_Rdc_getFault() can be used to
253 * check the error flags.
254 *
255 * Configuration of the fault-detection (tolerance) boundary values and threshold are done
256 * by user's call to IfxDsadc_Rdc_init().
257 *
258 * \defgroup IfxLld_Dsadc_Rdc RDC
259 * \ingroup IfxLld_Dsadc
260 * \defgroup IfxLld_Dsadc_Rdc_variable Variables
261 * \ingroup IfxLld_Dsadc_Rdc
262 * \defgroup IfxLld_Dsadc_Rdc_func_config Configuration Functions
263 * \ingroup IfxLld_Dsadc_Rdc
264 * \defgroup IfxLld_Dsadc_Rdc_library_srvsw_sysse_virtualDevice_positionSensor_StdIf_Functions StdIf Functions
265 * \ingroup IfxLld_Dsadc_Rdc
266 * \defgroup IfxLld_Dsadc_Rdc_structures Structures
267 * \ingroup IfxLld_Dsadc_Rdc
268 * \defgroup IfxLld_Dsadc_Rdc_func_utility Utility Functions
269 * \ingroup IfxLld_Dsadc_Rdc
270 */
271
272 #ifndef IFXDSADC_RDC_H
273 #define IFXDSADC_RDC_H 1
274
275 /******************************************************************************/
276 /*----------------------------------Includes----------------------------------*/
277 /******************************************************************************/
278
279 #include "SysSe/Math/Ifx_AngleTrkF32.h"
280 #include "Dsadc/Dsadc/IfxDsadc_Dsadc.h"
281 #include "Gtm/Std/IfxGtm_Tim.h"
282 #include "_PinMap/IfxGtm_PinMap.h"
283 #include "Ifx_Cfg.h"
284
285 /******************************************************************************/
286 /*-----------------------------------Macros-----------------------------------*/
287 /******************************************************************************/
288
289 #ifndef IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION
290 #define IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION (1)
291 #endif
292
293 #ifndef IFXDSADC_RDC_CFG_DEBUG
294 #define IFXDSADC_RDC_CFG_DEBUG (0)
295 #endif
296
297 /******************************************************************************/
298 /*-----------------------------Data Structures--------------------------------*/
299 /******************************************************************************/
300
301 /** \addtogroup IfxLld_Dsadc_Rdc_structures
302 * \{ */
303 /** \brief DSADC timestamp helper using GTM
304 */
305 typedef struct
306 {
307 Ifx_GTM *gtm; /**< \brief Pointer to GTM SFRs */
308 IfxGtm_Tim rdcTim;
309 IfxGtm_Tim_Ch rdcTimChannel; /**< \brief TIM channel triggered by DSADC channel */
310 uint32 rdcTimMuxValue; /**< \brief Mux value used */
311 IfxGtm_Tim_TinMap *pwmTim; /**< \brief TIM channel triggered by PWM trigger */
312 } IfxDsadc_Rdc_GtmTimestamp;
313
314 /** \} */
315
316 /** \addtogroup IfxLld_Dsadc_Rdc_structures
317 * \{ */
318 /** \brief RDC hardware configuration
319 */
320 typedef struct
321 {
322 IfxDsadc_Dsadc_ChannelConfig inputConfig; /**< \brief Default channel configuration for both SIN and COS input. */
323 IfxDsadc_ChannelId inputSin; /**< \brief Channel ID of DSADC used for SIN input. This will override value given in the inputConfig */
324 IfxDsadc_ChannelId inputCos; /**< \brief Channel ID of DSADC used for COS input. This will override value given in the inputConfig */
325 Ifx_Priority servReqPriority; /**< \brief Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig */
326 IfxSrc_Tos servReqProvider; /**< \brief Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig */
327 boolean startScan; /**< \brief Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called */
328 IfxDsadc_Dsadc_CarrierGenConfig carrierGen; /**< \brief Pointer to the carrier signal generation configuration.
329 * \note If NULL_PTR, it is assumed that the carrier generation has been pre-configured */
330 IfxDsadc_Cout_Out *outputClock; /**< \brief if not NULL_PTR, modulator clock output pin from inputSin channel will be configured */
331 IfxDsadc_Rdc_GtmTimestamp gtmTimestamp; /**< \brief Timestamp helper using GTM */
332 } IfxDsadc_Rdc_ConfigHw;
333
334 /** \brief DSADC RDC hardware object structure
335 */
336 typedef struct
337 {
338 IfxDsadc_Dsadc_Channel inputSin; /**< \brief Handle to SIN input channel */
339 IfxDsadc_Dsadc_Channel inputCos; /**< \brief Handle to COS input channel */
340 Ifx_GTM_TIM_CH *pwmTimCh; /**< \brief TIM channel for PWM timestamp */
341 Ifx_GTM_TIM_CH *rdcTimCh; /**< \brief TIM channel for DSADC timestamp */
342 } IfxDsadc_Rdc_Hw;
343
344 /** \brief
345 */
346 typedef struct
347 {
348 boolean enabled;
349 float32 inSeconds;
350 uint32 rdc; /**< \brief Absolute time of DSADC result */
351 uint32 pwm; /**< \brief Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set */
352 sint32 inTicks; /**< \brief Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set */
353 uint32 maxTicks; /**< \brief Maximum time-stamp value (in ticks of absolute time clock) */
354 float32 clockPeriod; /**< \brief Period of absolute time clock (in second) */
355 } IfxDsadc_Rdc_Ts;
356
357 /** \} */
358
359 /** \addtogroup IfxLld_Dsadc_Rdc_structures
360 * \{ */
361 /** \brief DSADC RDC data structure
362 */
363 typedef struct
364 {
365 Ifx_AngleTrkF32 angleTrk;
366 sint16 sinIn;
367 sint16 cosIn;
368 float32 updatePeriod;
369 float32 groupDelay;
370 IfxDsadc_Rdc_Hw hardware;
371 IfxDsadc_Rdc_Ts timestamp;
372 } IfxDsadc_Rdc;
373
374 /** \brief DSADC RDC configuration structure
375 * Note: if ALL kp, ki, kd are zero, then the init function will use default value.
376 */
377 typedef struct
378 {
379 float32 kp; /**< \brief Observer proportional gain */
380 float32 ki; /**< \brief Observer integral gain */
381 float32 kd; /**< \brief Observer differential gain */
382 float32 speedLpfFc; /**< \brief Cut-off frequency of speed low-pass filter (in Hertz). */
383 float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop (in radian) */
384 float32 userTs; /**< \brief Sampling period of the application */
385 sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
386 sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
387 uint16 periodPerRotation; /**< \brief Number of electrical periods per mechanical rotation */
388 boolean reversed; /**< \brief TRUE: reversed direction, FALSE: straight direction */
389 sint32 resolution; /**< \brief Sensor resolution */
390 IfxStdIf_Pos_RawAngle offset; /**< \brief Offset in ticks. [0 .. (\ref IfxDsadc_Rdc_Config.resolution - 1)] */
391 IfxDsadc_Rdc_ConfigHw hardware; /**< \brief Pointer to hardware config. */
392 IfxDsadc_Dsadc *dsadc; /**< \brief Pointer to the DSADC driver */
393 } IfxDsadc_Rdc_Config;
394
395 /** \} */
396
397 /** \addtogroup IfxLld_Dsadc_Rdc_func_config
398 * \{ */
399
400 /******************************************************************************/
401 /*-------------------------Global Function Prototypes-------------------------*/
402 /******************************************************************************/
403
404 /** \brief Initialise the DSADC RDC driver by initialising:
405 * - Two DSADC hardware channel resources
406 * - Carrier generation hardware resources
407 * - Time-stamp hardware resources
408 * - Driver's run-time data (RAM): tracking observer, fault-detection, interface layer etc.
409 * \param driver Driver's handle, i.e. pointer to \ref IfxDsadc_Rdc RAM location
410 * \param config Config Pointer to the driver's configuration
411 * \return TRUE in case of success else FALSE
412 */
413 IFX_EXTERN boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
414
415 /** \brief
416 * \param config DSADC RDC configuration structure
417 * \return None
418 */
419 IFX_EXTERN void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config);
420
421 /** \} */
422
423 /** \addtogroup IfxLld_Dsadc_Rdc_library_srvsw_sysse_virtualDevice_positionSensor_StdIf_Functions
424 * \{ */
425
426 /******************************************************************************/
427 /*-------------------------Inline Function Prototypes-------------------------*/
428 /******************************************************************************/
429
430 /** \brief \see IfxStdIf_Pos_GetFault
431 * \param driver Driver handle
432 * \return Fault
433 */
434 IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver);
435
436 /** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
437 * \param driver Driver handle
438 * \return Period per rotation
439 */
440 IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver);
441
442 /** \brief \see IfxStdIf_Pos_GetRawPosition
443 * \param driver Driver handle
444 * \return Position in ticks
445 */
446 IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver);
447
448 /** \brief \see IfxStdIf_Pos_GetSpeed
449 * \param driver Driver handle
450 * \return speed
451 */
452 IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver);
453
454 /******************************************************************************/
455 /*-------------------------Global Function Prototypes-------------------------*/
456 /******************************************************************************/
457
458 /** \brief see IfxStdIf_Pos_GetAbsolutePosition
459 * \param driver Driver handle
460 * \return Absolute position
461 */
462 IFX_EXTERN float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver);
463
464 /** \brief \see IfxStdIf_Pos_GetDirection
465 * \param driver Driver handle
466 * \return Direction
467 */
468 IFX_EXTERN IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver);
469
470 /** \brief \see IfxStdIf_Pos_GetOffset
471 * \param driver Driver handle
472 * \return Offset address
473 */
474 IFX_EXTERN sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver);
475
476 /** \brief \see IfxStdIf_Pos_GetPosition
477 * \param driver Driver handle
478 * \return Position
479 */
480 IFX_EXTERN float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver);
481
482 /** \brief \see IfxStdIf_Pos_GetRefreshPeriod
483 * \param driver driver handle
484 * \return Update period
485 */
486 IFX_EXTERN float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver);
487
488 /** \brief \see IfxStdIf_Pos_GetResolution
489 * \param driver Driver handle
490 * \return Resolution
491 */
492 IFX_EXTERN sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver);
493
494 /** \brief \see IfxStdIf_Pos_GetSensorType
495 * \param driver driver handle
496 * \return Sensor type
497 */
498 IFX_EXTERN IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver);
499
500 /** \brief \see IfxStdIf_Pos_GetTurn
501 * \param driver Driver handle
502 * \return Returns the number of turns
503 */
504 IFX_EXTERN sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver);
505
506 /** \brief \see IfxStdIf_Pos_OnEventA
507 * The API handles the event A which corresponds to the DSADC interrupt event.
508 * \param driver Driver's handle
509 * \return None
510 */
511 IFX_EXTERN void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver);
512
513 /** \brief \see IfxStdIf_Pos_Reset
514 * \param driver Driver handle
515 * \return None
516 */
517 IFX_EXTERN void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver);
518
519 /** \brief \see IfxStdIf_Pos_ResetFaults
520 * \param driver Driver handle
521 * \return None
522 */
523 IFX_EXTERN void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver);
524
525 /** \brief \see IfxStdIf_Pos_SetOffset
526 * \param driver Driver handle
527 * \param offset Offset
528 * \return None
529 */
530 IFX_EXTERN void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset);
531
532 /** \brief \see IfxStdIf_Pos_SetRefreshPeriod
533 * \param driver Driver handle
534 * \param updatePeriod Update period
535 * \return None
536 */
537 IFX_EXTERN void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod);
538
539 /** \brief Initializes the standard interface "Pos"
540 * \param stdif Standard interface position object
541 * \param driver Virtual position sensor
542 * \return TRUE on success else FALSE
543 */
544 IFX_EXTERN boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver);
545
546 /** \brief \see IfxStdIf_Pos_Update
547 * This function is to be executed at user's application interrupt or task, e.g. motor control
548 * \param driver Driver's handle
549 * \return None
550 */
551 IFX_EXTERN void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver);
552
553 /** \} */
554
555 /** \addtogroup IfxLld_Dsadc_Rdc_func_utility
556 * \{ */
557
558 /******************************************************************************/
559 /*-------------------------Inline Function Prototypes-------------------------*/
560 /******************************************************************************/
561
562 /** \brief Return timestamp in seconds
563 * \param driver Driver handle
564 * \return timestamp in seconds.
565 */
566 IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver);
567
568 /******************************************************************************/
569 /*-------------------------Global Function Prototypes-------------------------*/
570 /******************************************************************************/
571
572 /** \brief Synchronously start of both DSADC H/W channels
573 * \param driver Driver's handle, i.e. pointer to \ref IfxDsadc_Rdc RAM location
574 * \return None
575 */
576 IFX_EXTERN void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver);
577
578 /** \} */
579
580 /******************************************************************************/
581 /*---------------------Inline Function Implementations------------------------*/
582 /******************************************************************************/
583
584 IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver)
585 {
586 return Ifx_AngleTrkF32_getFault(&driver->angleTrk);
587 }
588
589
590 IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver)
591 {
592 return Ifx_AngleTrkF32_getPeriodPerRotation(&driver->angleTrk);
593 }
594
595
596 IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver)
597 {
598 return Ifx_AngleTrkF32_getRawPosition(&driver->angleTrk);
599 }
600
601
602 IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver)
603 {
604 return Ifx_AngleTrkF32_getSpeed(&driver->angleTrk);
605 }
606
607
608 IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver)
609 {
610 return driver->timestamp.inSeconds;
611 }
612
613
614 #endif /* IFXDSADC_RDC_H */
IfxDsadc_Rdc_Config::periodPerRotation
uint16 periodPerRotation
Number of electrical periods per mechanical rotation.
Definition: IfxDsadc_Rdc.h:387
IfxDsadc_Rdc_Hw::rdcTimCh
Ifx_GTM_TIM_CH * rdcTimCh
TIM channel for DSADC timestamp.
Definition: IfxDsadc_Rdc.h:341
Ifx_AngleTrkF32_getRawPosition
IfxStdIf_Pos_RawAngle Ifx_AngleTrkF32_getRawPosition(Ifx_AngleTrkF32 *aObsv)
Returns the actual position.
Definition: Ifx_AngleTrkF32.c:297
IfxDsadc_Rdc_ConfigHw::servReqPriority
Ifx_Priority servReqPriority
Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig...
Definition: IfxDsadc_Rdc.h:325
IfxDsadc_ChannelId
IfxDsadc_ChannelId
Specifies the channel Index.
Definition: IfxDsadc.h:120
IfxDsadc_Rdc_Config::userTs
float32 userTs
Sampling period of the application.
Definition: IfxDsadc_Rdc.h:384
IfxDsadc_Rdc_ConfigHw::inputSin
IfxDsadc_ChannelId inputSin
Channel ID of DSADC used for SIN input. This will override value given in the inputConfig.
Definition: IfxDsadc_Rdc.h:323
IfxDsadc_Rdc_Config::offset
IfxStdIf_Pos_RawAngle offset
Offset in ticks. [0 .. (IfxDsadc_Rdc_Config::resolution - 1)].
Definition: IfxDsadc_Rdc.h:390
IfxDsadc_Rdc_ConfigHw::startScan
boolean startScan
Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called...
Definition: IfxDsadc_Rdc.h:327
IfxDsadc_Rdc_ConfigHw
RDC hardware configuration.
Definition: IfxDsadc_Rdc.h:320
IfxDsadc_Rdc_GtmTimestamp::rdcTim
IfxGtm_Tim rdcTim
Definition: IfxDsadc_Rdc.h:308
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxDsadc_Rdc_resetFaults
IFX_EXTERN void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:432
IfxDsadc_Rdc_GtmTimestamp::gtm
Ifx_GTM * gtm
Pointer to GTM SFRs.
Definition: IfxDsadc_Rdc.h:307
IfxDsadc_Rdc_getRawPosition
IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:596
IfxDsadc_Dsadc.h
DSADC DSADC details.
IfxDsadc_Rdc_Config::kp
float32 kp
Observer proportional gain.
Definition: IfxDsadc_Rdc.h:379
IfxDsadc_Rdc_ConfigHw::inputConfig
IfxDsadc_Dsadc_ChannelConfig inputConfig
Default channel configuration for both SIN and COS input.
Definition: IfxDsadc_Rdc.h:322
IfxDsadc_Rdc::cosIn
sint16 cosIn
Definition: IfxDsadc_Rdc.h:367
IfxDsadc_Rdc_getDirection
IFX_EXTERN IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:162
IfxDsadc_Rdc_ConfigHw::gtmTimestamp
IfxDsadc_Rdc_GtmTimestamp gtmTimestamp
Timestamp helper using GTM.
Definition: IfxDsadc_Rdc.h:331
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxDsadc_Dsadc
DSADC handle data structure.
Definition: IfxDsadc_Dsadc.h:276
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:96
IfxDsadc_Cout_Out
COUT pin mapping structure.
Definition: IfxDsadc_PinMap.h:100
IfxDsadc_Rdc_Hw::inputCos
IfxDsadc_Dsadc_Channel inputCos
Handle to COS input channel.
Definition: IfxDsadc_Rdc.h:339
IfxDsadc_Rdc_Config
DSADC RDC configuration structure Note: if ALL kp, ki, kd are zero, then the init function will use d...
Definition: IfxDsadc_Rdc.h:377
IfxDsadc_Rdc_GtmTimestamp::rdcTimMuxValue
uint32 rdcTimMuxValue
Mux value used.
Definition: IfxDsadc_Rdc.h:310
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxDsadc_Rdc_getSensorType
IFX_EXTERN IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:192
IfxDsadc_Rdc_Ts::inSeconds
float32 inSeconds
Definition: IfxDsadc_Rdc.h:349
Ifx_AngleTrkF32_getFault
IfxStdIf_Pos_Status Ifx_AngleTrkF32_getFault(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:330
IfxDsadc_Rdc_getPosition
IFX_EXTERN float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:174
Ifx_AngleTrkF32.h
Angle-tracking observer for sin/cos analog position sensor.
IfxDsadc_Rdc_stdIfPosInit
IFX_EXTERN boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
Initializes the standard interface "Pos".
Definition: IfxDsadc_Rdc.c:460
sint16
short sint16
Definition: Platform_Types.h:126
IfxDsadc_Rdc_Config::ki
float32 ki
Observer integral gain.
Definition: IfxDsadc_Rdc.h:380
IfxDsadc_Dsadc_Channel
Channel handle structure.
Definition: IfxDsadc_Dsadc.h:297
IfxGtm_Tim.h
GTM basic functionality.
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxDsadc_Rdc_Ts::rdc
uint32 rdc
Absolute time of DSADC result.
Definition: IfxDsadc_Rdc.h:350
IfxDsadc_Rdc_Config::hardware
IfxDsadc_Rdc_ConfigHw hardware
Pointer to hardware config.
Definition: IfxDsadc_Rdc.h:391
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:76
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxDsadc_Rdc_initConfig
IFX_EXTERN void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config)
Definition: IfxDsadc_Rdc.c:260
IfxDsadc_Rdc_getTurn
IFX_EXTERN sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:198
IfxDsadc_Rdc_Config::sqrAmplMax
sint32 sqrAmplMax
Maximum value for square of signal amplitudes.
Definition: IfxDsadc_Rdc.h:385
IfxDsadc_Rdc_setOffset
IFX_EXTERN void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset)
Definition: IfxDsadc_Rdc.c:438
IfxDsadc_Rdc_getRefreshPeriod
IFX_EXTERN float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:180
IfxDsadc_Rdc::angleTrk
Ifx_AngleTrkF32 angleTrk
Definition: IfxDsadc_Rdc.h:365
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:75
IfxDsadc_Rdc
DSADC RDC data structure.
Definition: IfxDsadc_Rdc.h:363
IfxDsadc_Rdc_update
IFX_EXTERN void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:498
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:266
IfxDsadc_Rdc_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:584
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:64
IfxDsadc_Rdc_Config::resolution
sint32 resolution
Sensor resolution.
Definition: IfxDsadc_Rdc.h:389
IfxDsadc_Rdc_ConfigHw::outputClock
IfxDsadc_Cout_Out * outputClock
if not NULL_PTR, modulator clock output pin from inputSin channel will be configured ...
Definition: IfxDsadc_Rdc.h:330
IfxDsadc_Rdc_Config::kd
float32 kd
Observer differential gain.
Definition: IfxDsadc_Rdc.h:381
IfxDsadc_Rdc_onEventA
IFX_EXTERN void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:403
IfxDsadc_Rdc::updatePeriod
float32 updatePeriod
Definition: IfxDsadc_Rdc.h:368
IfxDsadc_Rdc_setRefreshPeriod
IFX_EXTERN void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod)
Definition: IfxDsadc_Rdc.c:444
Ifx_AngleTrkF32_getSpeed
float32 Ifx_AngleTrkF32_getSpeed(Ifx_AngleTrkF32 *aObsv)
Returns the Speed.
Definition: Ifx_AngleTrkF32.c:307
IfxDsadc_Rdc_Ts
Definition: IfxDsadc_Rdc.h:346
Ifx_AngleTrkF32
Angle Tracking Observer object.
Definition: Ifx_AngleTrkF32.h:99
IfxDsadc_Rdc_Hw
DSADC RDC hardware object structure.
Definition: IfxDsadc_Rdc.h:336
IfxDsadc_Rdc_Config::speedLpfFc
float32 speedLpfFc
Cut-off frequency of speed low-pass filter (in Hertz).
Definition: IfxDsadc_Rdc.h:382
IfxDsadc_Rdc_ConfigHw::inputCos
IfxDsadc_ChannelId inputCos
Channel ID of DSADC used for COS input. This will override value given in the inputConfig.
Definition: IfxDsadc_Rdc.h:324
uint16
unsigned short uint16
Definition: Platform_Types.h:109
Ifx_AngleTrkF32_getPeriodPerRotation
uint16 Ifx_AngleTrkF32_getPeriodPerRotation(Ifx_AngleTrkF32 *driver)
Definition: Ifx_AngleTrkF32.c:342
IfxDsadc_Rdc_getResolution
IFX_EXTERN sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:186
IfxDsadc_Dsadc_ChannelConfig
Single channel configuration structure.
Definition: IfxDsadc_Dsadc.h:306
IfxDsadc_Rdc_getOffset
IFX_EXTERN sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:168
IfxDsadc_Rdc_getPeriodPerRotation
IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:590
IfxDsadc_Rdc_GtmTimestamp::rdcTimChannel
IfxGtm_Tim_Ch rdcTimChannel
TIM channel triggered by DSADC channel.
Definition: IfxDsadc_Rdc.h:309
IfxDsadc_Rdc_ConfigHw::servReqProvider
IfxSrc_Tos servReqProvider
Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig...
Definition: IfxDsadc_Rdc.h:326
sint32
long sint32
Definition: Platform_Types.h:131
IfxDsadc_Rdc_Hw::inputSin
IfxDsadc_Dsadc_Channel inputSin
Handle to SIN input channel.
Definition: IfxDsadc_Rdc.h:338
IfxDsadc_Rdc_GtmTimestamp::pwmTim
IfxGtm_Tim_TinMap * pwmTim
TIM channel triggered by PWM trigger.
Definition: IfxDsadc_Rdc.h:311
IfxDsadc_Rdc_Config::reversed
boolean reversed
TRUE: reversed direction, FALSE: straight direction.
Definition: IfxDsadc_Rdc.h:388
IfxDsadc_Rdc_Config::sqrAmplMin
sint32 sqrAmplMin
Minimum value for square of signal amplitudes.
Definition: IfxDsadc_Rdc.h:386
IfxDsadc_Rdc_Ts::inTicks
sint32 inTicks
Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set. ...
Definition: IfxDsadc_Rdc.h:352
IfxDsadc_Rdc_Ts::pwm
uint32 pwm
Absolute time of user&#39;s PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set.
Definition: IfxDsadc_Rdc.h:351
IfxDsadc_Rdc_getTimestamp
IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver)
Return timestamp in seconds.
Definition: IfxDsadc_Rdc.h:608
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxDsadc_Rdc_Config::errorThreshold
float32 errorThreshold
Threshold of error value in the tracking loop (in radian)
Definition: IfxDsadc_Rdc.h:383
IfxDsadc_Rdc::sinIn
sint16 sinIn
Definition: IfxDsadc_Rdc.h:366
IfxDsadc_Rdc::groupDelay
float32 groupDelay
Definition: IfxDsadc_Rdc.h:369
IfxDsadc_Rdc_reset
IFX_EXTERN void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.c:426
IfxDsadc_Rdc_Hw::pwmTimCh
Ifx_GTM_TIM_CH * pwmTimCh
TIM channel for PWM timestamp.
Definition: IfxDsadc_Rdc.h:340
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:83
IfxDsadc_Rdc_getSpeed
IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver)
Definition: IfxDsadc_Rdc.h:602
IfxDsadc_Rdc_Config::dsadc
IfxDsadc_Dsadc * dsadc
Pointer to the DSADC driver.
Definition: IfxDsadc_Rdc.h:392
IfxDsadc_Rdc::hardware
IfxDsadc_Rdc_Hw hardware
Definition: IfxDsadc_Rdc.h:370
IfxDsadc_Rdc_startConversion
IFX_EXTERN void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver)
Synchronously start of both DSADC H/W channels.
Definition: IfxDsadc_Rdc.c:450
IfxDsadc_Rdc_init
IFX_EXTERN boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
Initialise the DSADC RDC driver by initialising:
Definition: IfxDsadc_Rdc.c:211
IfxDsadc_Rdc_Ts::clockPeriod
float32 clockPeriod
Period of absolute time clock (in second)
Definition: IfxDsadc_Rdc.h:354
IfxDsadc_Rdc_Ts::enabled
boolean enabled
Definition: IfxDsadc_Rdc.h:348
IfxDsadc_Rdc::timestamp
IfxDsadc_Rdc_Ts timestamp
Definition: IfxDsadc_Rdc.h:371
IfxDsadc_Dsadc_CarrierGenConfig
Carrier generation configuration structure.
Definition: IfxDsadc_Dsadc.h:283
IfxDsadc_Rdc_GtmTimestamp
DSADC timestamp helper using GTM.
Definition: IfxDsadc_Rdc.h:305
IfxDsadc_Rdc_ConfigHw::carrierGen
IfxDsadc_Dsadc_CarrierGenConfig carrierGen
Pointer to the carrier signal generation configuration.
Definition: IfxDsadc_Rdc.h:328
IfxDsadc_Rdc_getAbsolutePosition
IFX_EXTERN float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver)
see IfxStdIf_Pos_GetAbsolutePosition
Definition: IfxDsadc_Rdc.c:156
IfxDsadc_Rdc_Ts::maxTicks
uint32 maxTicks
Maximum time-stamp value (in ticks of absolute time clock)
Definition: IfxDsadc_Rdc.h:353


iLLD_TC26B: IfxDsadc_cfg.h Source File

  • _Impl
IfxDsadc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxDsadc_cfg.h
3 * \brief DSADC on-chip implementation data
4 * \ingroup IfxLld_Dsadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dsadc DSADC
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Dsadc_Impl Implementation
27 * \ingroup IfxLld_Dsadc
28 * \defgroup IfxLld_Dsadc_Std Standard Driver
29 * \ingroup IfxLld_Dsadc
30 */
31
32 #ifndef IFXDSADC_CFG_H
33 #define IFXDSADC_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39
40 /******************************************************************************/
41 /*-----------------------------------Macros-----------------------------------*/
42 /******************************************************************************/
43
44 /** \brief Number of channels
45 */
46 #define IFXDSADC_NUM_CHANNELS 4
47
48 #define IFXDSADC_NUM_MODULES (1)
49
50
51 #endif /* IFXDSADC_CFG_H */


iLLD_TC26B: IfxDts.c Source File

  • Dts
  • Std
IfxDts.c
Go to the documentation of this file.
1 /**
2 * \file IfxDts.c
3 * \brief DTS basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxDts.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 boolean IfxDts_isReady(void)
36 {
37 return MODULE_SCU.DTSSTAT.B.RDY == 1 ? TRUE : FALSE;
38 }
IfxDts_isReady
boolean IfxDts_isReady(void)
Returns the current READY status of the Sensor.
Definition: IfxDts.c:35
FALSE
#define FALSE
Definition: Platform_Types.h:90
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxDts.h
DTS basic functionality.


iLLD_TC26B: IfxDts.h Source File

  • Dts
  • Std
IfxDts.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts.h
3 * \brief DTS basic functionality
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dts_Std_Control Control functions
25 * \ingroup IfxLld_Dts_Std
26 * \defgroup IfxLld_Dts_Std_Status Status functions
27 * \ingroup IfxLld_Dts_Std
28 */
29
30 #ifndef IFXDTS_H
31 #define IFXDTS_H 1
32
33 /******************************************************************************/
34 /*----------------------------------Includes----------------------------------*/
35 /******************************************************************************/
36
37 #include "_Impl/IfxDts_cfg.h"
38 #include "IfxScu_reg.h"
39 #include "IfxScu_bf.h"
40 #include "Cpu/Std/IfxCpu_Intrinsics.h"
41 #include "Src/Std/IfxSrc.h"
42 /** \addtogroup IfxLld_Dts_Std_Control
43 * \{ */
44
45 /******************************************************************************/
46 /*-------------------------Inline Function Prototypes-------------------------*/
47 /******************************************************************************/
48
49 /** \brief Disable the writing of register bits except START bit.
50 * \return None
51 */
52 IFX_INLINE void IfxDts_disableSensorControl(void);
53
54 /** \brief Enables the DTS sensor
55 * \return None
56 */
57 IFX_INLINE void IfxDts_enableSensor(void);
58
59 /** \brief Starts the next temperature measurement.
60 * \return None
61 */
62 IFX_INLINE void IfxDts_startSensor(void);
63
64 /** \} */
65
66 /** \addtogroup IfxLld_Dts_Std_Status
67 * \{ */
68
69 /******************************************************************************/
70 /*-------------------------Inline Function Prototypes-------------------------*/
71 /******************************************************************************/
72
73 /** \brief Gets the Interrupt request source.
74 * \return Address of interrupt request source
75 */
76 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDts_getSrcPointer(void);
77
78 /** \brief Read the temperature measurement result
79 * \return Temperature measurement result
80 */
81 IFX_INLINE uint16 IfxDts_getTemperatureValue(void);
82
83 /** \brief Returns the current BUSY status of the Sensor
84 * \return TRUE if Sensor is busy in measuring temperature otherwise FALSE
85 */
86 IFX_INLINE boolean IfxDts_isBusy(void);
87
88 /** \} */
89
90 /******************************************************************************/
91 /*-------------------------Global Function Prototypes-------------------------*/
92 /******************************************************************************/
93
94 /** \brief Returns the current READY status of the Sensor.
95 * \return TRUE if Sensor is ready for measuring temperature otherwise FALSE
96 */
97 IFX_EXTERN boolean IfxDts_isReady(void);
98
99 /******************************************************************************/
100 /*---------------------Inline Function Implementations------------------------*/
101 /******************************************************************************/
102
103 IFX_INLINE void IfxDts_disableSensorControl(void)
104 {
105 MODULE_SCU.DTSCON.B.SLCK = 1;
106 MODULE_SCU.DTSLIM.B.SLCK = 1;
107 }
108
109
110 IFX_INLINE void IfxDts_enableSensor(void)
111 {
112 MODULE_SCU.DTSCON.B.PWD = 0;
113 }
114
115
116 IFX_INLINE volatile Ifx_SRC_SRCR *IfxDts_getSrcPointer(void)
117 {
118 return &SRC_SCUDTS;
119 }
120
121
122 IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
123 {
124 return (uint16)MODULE_SCU.DTSSTAT.B.RESULT;
125 }
126
127
128 IFX_INLINE boolean IfxDts_isBusy(void)
129 {
130 return MODULE_SCU.DTSSTAT.B.BUSY == 1 ? TRUE : FALSE;
131 }
132
133
134 IFX_INLINE void IfxDts_startSensor(void)
135 {
136 MODULE_SCU.DTSCON.B.START = 1;
137 }
138
139
140 #endif /* IFXDTS_H */
IfxDts_isBusy
IFX_INLINE boolean IfxDts_isBusy(void)
Returns the current BUSY status of the Sensor.
Definition: IfxDts.h:128
IfxDts_getTemperatureValue
IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
Read the temperature measurement result.
Definition: IfxDts.h:122
IfxDts_startSensor
IFX_INLINE void IfxDts_startSensor(void)
Starts the next temperature measurement.
Definition: IfxDts.h:134
IfxDts_disableSensorControl
IFX_INLINE void IfxDts_disableSensorControl(void)
Disable the writing of register bits except START bit.
Definition: IfxDts.h:103
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxDts_enableSensor
IFX_INLINE void IfxDts_enableSensor(void)
Enables the DTS sensor.
Definition: IfxDts.h:110
FALSE
#define FALSE
Definition: Platform_Types.h:90
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxDts_cfg.h
DTS on-chip implementation data.
IfxDts_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer(void)
Gets the Interrupt request source.
Definition: IfxDts.h:116
IfxDts_isReady
IFX_EXTERN boolean IfxDts_isReady(void)
Returns the current READY status of the Sensor.
Definition: IfxDts.c:35
uint16
unsigned short uint16
Definition: Platform_Types.h:109
TRUE
#define TRUE
Definition: Platform_Types.h:87


iLLD_TC26B: IfxDts_Dts.c Source File

  • Dts
  • Dts
IfxDts_Dts.c
Go to the documentation of this file.
1 /**
2 * \file IfxDts_Dts.c
3 * \brief DTS DTS details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxDts_Dts.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
36 {
37 sint32 dtsValue = (sint32)(temperatureValue + 285.5) / 0.467;
38
39 if (dtsValue < 0)
40 {
41 dtsValue = 0;
42 }
43 else if (dtsValue > 1023)
44 {
45 dtsValue = 1023;
46 }
47
48 return (uint16)dtsValue;
49 }
50
51
52 float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
53 {
54 return ((float32)dtsValue * 0.467) - 285.5;
55 }
56
57
58 void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
59 {
60 IfxDts_enableSensor();
61
62 /* wait for two measurements before enabling the limits */
63 {
64 int i;
65
66 /* disable limits */
67 MODULE_SCU.DTSLIM.B.LOWER = 0;
68 MODULE_SCU.DTSLIM.B.UPPER = 1023;
69
70 /* wait until DTS is ready */
71 while (!IfxDts_isReady())
72 {}
73
74 /* two dummy measurements */
75 for (i = 0; i < 2; ++i)
76 {
77 IfxDts_Dts_startSensor();
78
79 while (IfxDts_Dts_isBusy())
80 {}
81 }
82 }
83
84 /* change to the requested limits */
85 MODULE_SCU.DTSLIM.B.LOWER = IfxDts_Dts_convertFromCelsius(config->lowerTemperatureLimit);
86 MODULE_SCU.DTSLIM.B.UPPER = IfxDts_Dts_convertFromCelsius(config->upperTemperatureLimit);
87
88 /* lock configuration? */
89 if (config->enableSecureLock == TRUE)
90 {
91 IfxDts_disableSensorControl();
92 }
93 else
94 {
95 /* do Nothing */
96 }
97
98 /* enable DTS IRQ */
99 if (config->isrPriority > 0)
100 {
101 volatile Ifx_SRC_SRCR *src = IfxDts_getSrcPointer();
102 IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
103 IfxSrc_enable(src);
104 }
105 }
106
107
108 void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
109 {
110 config->sensorControlDisabled = FALSE;
111 config->lowerTemperatureLimit = -40.0; // Celsius
112 config->upperTemperatureLimit = 170.0; // Celsius
113
114 config->isrTypeOfService = IfxSrc_Tos_cpu0;
115 config->isrPriority = 0;
116
117 config->enableSecureLock = FALSE;
118 }
IfxDts_isReady
boolean IfxDts_isReady(void)
Returns the current READY status of the Sensor.
Definition: IfxDts.c:35
IfxDts_Dts_Config::upperTemperatureLimit
float32 upperTemperatureLimit
Specifies the upper temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:170
IfxDts_disableSensorControl
IFX_INLINE void IfxDts_disableSensorControl(void)
Disable the writing of register bits except START bit.
Definition: IfxDts.h:103
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxDts_enableSensor
IFX_INLINE void IfxDts_enableSensor(void)
Enables the DTS sensor.
Definition: IfxDts.h:110
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxDts_Dts_convertToCelsius
float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius.
Definition: IfxDts_Dts.c:52
IfxDts_Dts_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxDts_Dts.h:173
IfxDts_Dts_Config::lowerTemperatureLimit
float32 lowerTemperatureLimit
Specifies the lower temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:167
IfxDts_Dts_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxDts_Dts.h:174
IfxDts_Dts_isBusy
IFX_INLINE boolean IfxDts_Dts_isBusy(void)
Returns the current BUSY status of the Sensor.
Definition: IfxDts_Dts.h:285
IfxDts_Dts_Config::sensorControlDisabled
boolean sensorControlDisabled
MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
Definition: IfxDts_Dts.h:166
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxDts_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDts_getSrcPointer(void)
Gets the Interrupt request source.
Definition: IfxDts.h:116
uint16
unsigned short uint16
Definition: Platform_Types.h:109
sint32
long sint32
Definition: Platform_Types.h:131
IfxDts_Dts.h
DTS DTS details.
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxDts_Dts_startSensor
IFX_INLINE void IfxDts_Dts_startSensor(void)
Starts the next temperature measurement.
Definition: IfxDts_Dts.h:291
IfxDts_Dts_convertFromCelsius
uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
Converts a temperature value in Celsius to DTS value.
Definition: IfxDts_Dts.c:35
IfxDts_Dts_Config
DTS module configuration structure.
Definition: IfxDts_Dts.h:164
IfxDts_Dts_Config::enableSecureLock
boolean enableSecureLock
MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limi...
Definition: IfxDts_Dts.h:175
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxDts_Dts_initModuleConfig
void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration.
Definition: IfxDts_Dts.c:108
IfxDts_Dts_initModule
void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration.
Definition: IfxDts_Dts.c:58


iLLD_TC26B: IfxDts_Dts.h Source File

  • Dts
  • Dts
IfxDts_Dts.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts_Dts.h
3 * \brief DTS DTS details
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dts_Dts_Usage How to use the DTS Interface driver?
25 * \ingroup IfxLld_Dts
26 *
27 * DTS gives the die-temperature result which will decoded to standard temperature value. Minimum first two temperature results are to be ignored to get reliable temperature.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework.
30 *
31 * \section IfxLld_Dts_Dts_Preparation Preparation
32 * \subsection IfxLld_Dts_Dts_Include Include Files
33 *
34 * Include following header file into your C code:
35 *
36 * \code
37 * #include <Dts/Dts/IfxDts_Dts.h>
38 * \endcode
39 *
40 * \subsection IfxLld_Dts_Dts_Interrupt Interrupt Handler Installation
41 *
42 * See also \ref IfxLld_Cpu_Irq_Usage
43 *
44 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
45 * \code
46 * // priorities are normally defined in Ifx_IntPrioDef.h
47 * #define IFX_INTPRIO_DTS 1
48 * \endcode
49 *
50 * Add the interrupt service routine to your C code which should do the error flag handling:
51 * \code
52 * IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
53 * {
54 * // DTS finished temperature measurement
55 *
56 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
57 * // here we could do something with the value...
58 * // and the DTS can be restarted
59 * IfxDts_Dts_startSensor();
60 * }
61 * \endcode
62 *
63 * Finally install the interrupt handler in your initialisation function:
64 * \code
65 * // install interrupt handler
66 * IfxCpu_Irq_installInterruptHandler(&dtsISR, IFX_INTPRIO_DTS);
67 * IfxCpu_enableInterrupts();
68 * \endcode
69 *
70 * \subsection IfxLld_Dts_Dts_Module DTS Module Initialisation
71 *
72 * The module initialisation can be done in the same function:
73 * \code
74 * // Get the default configuration
75 * IfxDts_Dts_Config dtsConfig;
76 * IfxDts_Dts_initModuleConfig(&dtsConfig);
77 *
78 * // Adapt the default configuration if required
79 * dtsConfig.isrPriority = IFX_INTPRIO_DTS;
80 * dtsConfig.isrTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
81 * dtsConfig.lowerTemperatureLimit = -35; // SMU alarm if temperature value is below this Celsius value
82 * dtsConfig.upperTemperatureLimit = 150; // SMU alarm if temperature value is above this Celsius value
83 *
84 * // Module initialisation
85 * IfxDts_Dts_initModule(&dtsConfig);
86 * \endcode
87 * Now, DTS is initialised for starting temperature measurements:
88 * \code
89 * IfxDts_Dts_startSensor();
90 * \endcode
91 *
92 * \subsection IfxLld_Dts_Dts_IrqBased IRQ based measurements
93 *
94 * Whenever the interrupt handler is called, a new measurment result is available and could be processed further (e.g. for statistical analysis).
95 *
96 * \code
97 * IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
98 * {
99 * // DTS finished temperature measurement
100 *
101 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
102 * // here we could do something with the value...
103 * // and the DTS can be restarted
104 * IfxDts_Dts_startSensor();
105 * }
106 * \endcode
107 *
108 *
109 * \subsection IfxLld_Dts_Dts_NonIrqBased Measurements without IRQs
110 *
111 * If no interrupt routine should be used, a new measurement result can be requested the following way:
112 *
113 * \code
114 * // start Sensor
115 * IfxDts_Dts_startSensor();
116 *
117 * // wait until a new result is available
118 * while( IfxDts_Dts_isBusy() );
119 * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
120 * \endcode
121 *
122 *
123 * Alternatively (and this is the normal usage), the DTS could be periodically started from a timer routine, e.g. each mS. The conversion itself takes 100 uS maximum.
124 *
125 *
126 * \subsection IfxLld_Dts_Dts_Converted Temperature conversion
127 *
128 * Following function returns the actual temperature in Celsius:
129 *
130 * \code
131 * float32 temperature = IfxDts_Dts_getTemperatureCelsius();
132 * \endcode
133 *
134 * \defgroup IfxLld_Dts_Dts DTS
135 * \ingroup IfxLld_Dts
136 * \defgroup IfxLld_Dts_Dts_Structures Data Structures
137 * \ingroup IfxLld_Dts_Dts
138 * \defgroup IfxLld_Dts_Dts_Module Module Initialisation functions
139 * \ingroup IfxLld_Dts_Dts
140 * \defgroup IfxLld_Dts_Dts_Sensor Sensor Functions
141 * \ingroup IfxLld_Dts_Dts
142 * \defgroup IfxLld_Dts_Dts_Conversion Conversion Functions
143 * \ingroup IfxLld_Dts_Dts
144 */
145
146 #ifndef IFXDTS_DTS_H
147 #define IFXDTS_DTS_H 1
148
149 /******************************************************************************/
150 /*----------------------------------Includes----------------------------------*/
151 /******************************************************************************/
152
153 #include "Dts/Std/IfxDts.h"
154 #include "Cpu/Std/IfxCpu.h"
155
156 /******************************************************************************/
157 /*-----------------------------Data Structures--------------------------------*/
158 /******************************************************************************/
159
160 /** \addtogroup IfxLld_Dts_Dts_Structures
161 * \{ */
162 /** \brief DTS module configuration structure
163 */
164 typedef struct
165 {
166 boolean sensorControlDisabled; /**< \brief MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START. */
167 float32 lowerTemperatureLimit; /**< \brief Specifies the lower temperature limit compared against die temperature in Celsius
168 *
169 * A SMU will be triggered if the measurement result is below this limit */
170 float32 upperTemperatureLimit; /**< \brief Specifies the upper temperature limit compared against die temperature in Celsius.
171 *
172 * A SMU will be triggered if the measurement result is above this limit */
173 uint16 isrPriority; /**< \brief interrupt priority */
174 IfxSrc_Tos isrTypeOfService; /**< \brief type of interrupt service */
175 boolean enableSecureLock; /**< \brief MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limitation register. */
176 } IfxDts_Dts_Config;
177
178 /** \} */
179
180 /** \addtogroup IfxLld_Dts_Dts_Module
181 * \{ */
182
183 /******************************************************************************/
184 /*-------------------------Global Function Prototypes-------------------------*/
185 /******************************************************************************/
186
187 /** \brief Initialise the DTS with supplied configuration.
188 * \param config pointer to module configuration structure
189 * \return None
190 *
191 * Usage Example : \ref IfxLld_Dts_Dts_Usage
192 *
193 */
194 IFX_EXTERN void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config);
195
196 /** \brief Intialises the module configuration buffer with default configuration.
197 * \param config pointer to module configuration structure
198 * \return None
199 *
200 * Usage Example : \ref IfxLld_Dts_Dts_Usage
201 *
202 */
203 IFX_EXTERN void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config);
204
205 /** \} */
206
207 /** \addtogroup IfxLld_Dts_Dts_Sensor
208 * \{ */
209
210 /******************************************************************************/
211 /*-------------------------Inline Function Prototypes-------------------------*/
212 /******************************************************************************/
213
214 /** \brief Returns the converted temperature in Celsius
215 * \return The temperature based on the DTS temperature value
216 *
217 * Usage Example : \ref IfxLld_Dts_Dts_Usage
218 *
219 */
220 IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void);
221
222 /** \brief Returns the unconverted temperature measurement result
223 * \return current sensor measured result.
224 *
225 * Usage Example : \ref IfxLld_Dts_Dts_Usage
226 *
227 */
228 IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void);
229
230 /** \brief Returns the current BUSY status of the Sensor
231 * \return TRUE if Sensor is busy in measuring temperature otherwise FALSE
232 *
233 * Usage Example : \ref IfxLld_Dts_Dts_Usage
234 *
235 */
236 IFX_INLINE boolean IfxDts_Dts_isBusy(void);
237
238 /** \brief Starts the next temperature measurement.
239 * \return None
240 *
241 * Usage Example : \ref IfxLld_Dts_Dts_Usage
242 *
243 */
244 IFX_INLINE void IfxDts_Dts_startSensor(void);
245
246 /** \} */
247
248 /** \addtogroup IfxLld_Dts_Dts_Conversion
249 * \{ */
250
251 /******************************************************************************/
252 /*-------------------------Global Function Prototypes-------------------------*/
253 /******************************************************************************/
254
255 /** \brief Converts a temperature value in Celsius to DTS value
256 * \param temperatureValue the temperature in Celsius
257 * \return the appr. DTS value
258 */
259 IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue);
260
261 /** \brief Converts the measurement value returned from DTS to Celsius
262 * \param dtsValue measurement value returned from DTS
263 * \return temperature in Celsius
264 */
265 IFX_EXTERN float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue);
266
267 /** \} */
268
269 /******************************************************************************/
270 /*---------------------Inline Function Implementations------------------------*/
271 /******************************************************************************/
272
273 IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void)
274 {
275 return IfxDts_Dts_convertToCelsius(IfxDts_getTemperatureValue());
276 }
277
278
279 IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void)
280 {
281 return (uint16)IfxDts_getTemperatureValue();
282 }
283
284
285 IFX_INLINE boolean IfxDts_Dts_isBusy(void)
286 {
287 return IfxDts_isBusy();
288 }
289
290
291 IFX_INLINE void IfxDts_Dts_startSensor(void)
292 {
293 /* start sensor */
294 IfxDts_startSensor();
295
296 /* one dummy read to a SCU register which ensures that the BUSY flag is synchronized
297 * into the status register before IfxDts_Dts_isBusy() is called */
298 if (IfxDts_isBusy())
299 {}
300 }
301
302
303 #endif /* IFXDTS_DTS_H */
IfxDts_isBusy
IFX_INLINE boolean IfxDts_isBusy(void)
Returns the current BUSY status of the Sensor.
Definition: IfxDts.h:128
IfxDts_getTemperatureValue
IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
Read the temperature measurement result.
Definition: IfxDts.h:122
IfxDts_startSensor
IFX_INLINE void IfxDts_startSensor(void)
Starts the next temperature measurement.
Definition: IfxDts.h:134
IfxDts_Dts_Config::upperTemperatureLimit
float32 upperTemperatureLimit
Specifies the upper temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:170
float32
float float32
Definition: Platform_Types.h:167
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxDts_Dts_convertToCelsius
IFX_EXTERN float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
Converts the measurement value returned from DTS to Celsius.
Definition: IfxDts_Dts.c:52
IfxDts_Dts_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxDts_Dts.h:173
IfxDts_Dts_Config::lowerTemperatureLimit
float32 lowerTemperatureLimit
Specifies the lower temperature limit compared against die temperature in Celsius.
Definition: IfxDts_Dts.h:167
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxDts_Dts_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxDts_Dts.h:174
IfxDts_Dts_isBusy
IFX_INLINE boolean IfxDts_Dts_isBusy(void)
Returns the current BUSY status of the Sensor.
Definition: IfxDts_Dts.h:285
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxDts_Dts_Config::sensorControlDisabled
boolean sensorControlDisabled
MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START.
Definition: IfxDts_Dts.h:166
IfxDts_Dts_getTemperatureValue
IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void)
Returns the unconverted temperature measurement result.
Definition: IfxDts_Dts.h:279
IfxDts_Dts_getTemperatureCelsius
IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void)
Returns the converted temperature in Celsius.
Definition: IfxDts_Dts.h:273
IfxCpu.h
CPU basic functionality.
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxDts_Dts_startSensor
IFX_INLINE void IfxDts_Dts_startSensor(void)
Starts the next temperature measurement.
Definition: IfxDts_Dts.h:291
IfxDts_Dts_convertFromCelsius
IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
Converts a temperature value in Celsius to DTS value.
Definition: IfxDts_Dts.c:35
IfxDts_Dts_Config
DTS module configuration structure.
Definition: IfxDts_Dts.h:164
IfxDts_Dts_Config::enableSecureLock
boolean enableSecureLock
MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limi...
Definition: IfxDts_Dts.h:175
IfxDts.h
DTS basic functionality.
IfxDts_Dts_initModuleConfig
IFX_EXTERN void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
Intialises the module configuration buffer with default configuration.
Definition: IfxDts_Dts.c:108
IfxDts_Dts_initModule
IFX_EXTERN void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
Initialise the DTS with supplied configuration.
Definition: IfxDts_Dts.c:58


iLLD_TC26B: IfxDts_cfg.h Source File

  • _Impl
IfxDts_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxDts_cfg.h
3 * \brief DTS on-chip implementation data
4 * \ingroup IfxLld_Dts
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Dts DTS
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Dts_Impl Implementation
27 * \ingroup IfxLld_Dts
28 * \defgroup IfxLld_Dts_Std Standard Driver
29 * \ingroup IfxLld_Dts
30 */
31
32 #ifndef IFXDTS_CFG_H
33 #define IFXDTS_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 /******************************************************************************/
40 /*-----------------------------------Macros-----------------------------------*/
41 /******************************************************************************/
42
43 #define IFXDTS_NUM_MODULES (1)
44
45 #endif /* IFXDTS_CFG_H */


iLLD_TC26B: IfxEmem.c Source File

  • Emem
  • Std
IfxEmem.c
Go to the documentation of this file.
1 /**
2 * \file IfxEmem.c
3 * \brief EMEM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxEmem.h"
30 #include "Cpu/Std/IfxCpu_Intrinsics.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 IfxEmem_LockedState IfxEmem_getLockedState(void)
37 {
38 return (IfxEmem_LockedState)MODULE_EMEM.SBRCTR.B.STBLOCK;
39 }
40
41
42 void IfxEmem_setClockEnableState(const IfxEmem_State state)
43 {
44 /* bit is inverted */
45 if (IfxEmem_State_enabled == state)
46 {
47 MODULE_EMEM.CLC.B.DISR = 0;
48 }
49 else
50 {
51 MODULE_EMEM.CLC.B.DISR = 1;
52 }
53
54 /* wait one cycle for module to be enabled */
55 __nop();
56 }
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
IfxCpu_Intrinsics.h
IfxEmem_State
IfxEmem_State
EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.
Definition: IfxEmem.h:56
IfxEmem_setClockEnableState
void IfxEmem_setClockEnableState(const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM withou...
Definition: IfxEmem.c:42
IfxEmem_LockedState
IfxEmem_LockedState
EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.
Definition: IfxEmem.h:48
IfxEmem_State_enabled
EMEM module clock enabled state.
Definition: IfxEmem.h:59
IfxEmem.h
EMEM basic functionality.
IfxEmem_getLockedState
IfxEmem_LockedState IfxEmem_getLockedState(void)
Gets the EMEM stand RAM lock state.
Definition: IfxEmem.c:36


iLLD_TC26B: IfxEmem.h Source File

  • Emem
  • Std
IfxEmem.h
Go to the documentation of this file.
1 /**
2 * \file IfxEmem.h
3 * \brief EMEM basic functionality
4 * \ingroup IfxLld_Emem
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Emem_Std_Enumerations Enumerations
25 * \ingroup IfxLld_Emem_Std
26 * \defgroup IfxLld_Emem_Std_Module Module Functions
27 * \ingroup IfxLld_Emem_Std
28 */
29
30 #ifndef IFXEMEM_H
31 #define IFXEMEM_H 1
32
33 /******************************************************************************/
34 /*----------------------------------Includes----------------------------------*/
35 /******************************************************************************/
36
37 #include "_Impl/IfxEmem_cfg.h"
38 #include "Scu/Std/IfxScuWdt.h"
39
40 /******************************************************************************/
41 /*--------------------------------Enumerations--------------------------------*/
42 /******************************************************************************/
43
44 /** \addtogroup IfxLld_Emem_Std_Enumerations
45 * \{ */
46 /** \brief EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.
47 */
48 typedef enum
49 {
50 IfxEmem_LockedState_locked = 0, /**< \brief EMEM locked state. */
51 IfxEmem_LockedState_unlocked = 1 /**< \brief EMEM unlocked state. */
52 } IfxEmem_LockedState;
53
54 /** \brief EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.
55 */
56 typedef enum
57 {
58 IfxEmem_State_disabled = 0, /**< \brief EMEM module clock disabled state. */
59 IfxEmem_State_enabled = 1 /**< \brief EMEM module clock enabled state. */
60 } IfxEmem_State;
61
62 /** \brief EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..).
63 */
64 typedef enum
65 {
66 IfxEmem_TileConfigMode_calibMode = 0 /**< \brief EMEM tile mode to calibration memory. */
67 } IfxEmem_TileConfigMode;
68
69 /** \brief Tile Number
70 */
71 typedef enum
72 {
73 IfxEmem_TileNumber_0 = 0, /**< \brief Tile Number0 */
74 IfxEmem_TileNumber_1, /**< \brief Tile Number1 */
75 IfxEmem_TileNumber_2, /**< \brief Tile Number2 */
76 IfxEmem_TileNumber_3, /**< \brief Tile Number3 */
77 IfxEmem_TileNumber_4, /**< \brief Tile Number4 */
78 IfxEmem_TileNumber_5, /**< \brief Tile Number5 */
79 IfxEmem_TileNumber_6, /**< \brief Tile Number6 */
80 IfxEmem_TileNumber_7, /**< \brief Tile Number7 */
81 IfxEmem_TileNumber_8, /**< \brief Tile Number8 */
82 IfxEmem_TileNumber_9, /**< \brief Tile Number9 */
83 IfxEmem_TileNumber_10, /**< \brief Tile Number10 */
84 IfxEmem_TileNumber_11, /**< \brief Tile Number11 */
85 IfxEmem_TileNumber_12, /**< \brief Tile Number12 */
86 IfxEmem_TileNumber_13, /**< \brief Tile Number13 */
87 IfxEmem_TileNumber_14, /**< \brief Tile Number14 */
88 IfxEmem_TileNumber_15 /**< \brief Tile Number15 */
89 } IfxEmem_TileNumber;
90
91 /** \} */
92
93 /** \addtogroup IfxLld_Emem_Std_Module
94 * \{ */
95
96 /******************************************************************************/
97 /*-------------------------Inline Function Prototypes-------------------------*/
98 /******************************************************************************/
99
100 /** \brief Returns the status of module enabled or disabled
101 * \return Status (TRUE / FALSE)
102 */
103 IFX_INLINE boolean IfxEmem_isModuleEnabled(void);
104
105 /** \brief Sets all EMEM tiles to calibration memory mode.
106 * \param mode EMEM tile configuration mode.
107 * \param tile tile number
108 * \return None
109 */
110 IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile);
111
112 /** \brief Sets Unlock standby lock flag.
113 * \param flag Unlock standby lock flag value.
114 * \return None
115 */
116 IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag);
117
118 /******************************************************************************/
119 /*-------------------------Global Function Prototypes-------------------------*/
120 /******************************************************************************/
121
122 /** \brief Gets the EMEM stand RAM lock state.
123 * \return EMEM stand RAM lock state.
124 */
125 IFX_EXTERN IfxEmem_LockedState IfxEmem_getLockedState(void);
126
127 /** \brief Sets state of the EMEM module clock.
128 * Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application.
129 * for complete enable and disable of EMEM with endint protection handling, please use the following APIs
130 * /ref IfxEmem_enableModule
131 * /ref IfxEmem_disableModule
132 * \param state EMEM module clock enabled or disabled state.
133 * \return None
134 */
135 IFX_EXTERN void IfxEmem_setClockEnableState(const IfxEmem_State state);
136
137 /** \} */
138
139 /******************************************************************************/
140 /*---------------------Inline Function Implementations------------------------*/
141 /******************************************************************************/
142
143 IFX_INLINE boolean IfxEmem_isModuleEnabled(void)
144 {
145 return (MODULE_EMEM.CLC.B.DISS == 0) ? TRUE : FALSE;
146 }
147
148
149 IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
150 {
151 uint32 shift = tile * 2;
152 uint32 mask = ~(0x3 << shift);
153 uint32 value = (uint32)mode << shift;
154 MODULE_EMEM.TILECONFIG.U = (MODULE_EMEM.TILESTATE.U & mask) | value;
155 }
156
157
158 IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag)
159 {
160 if (8 > flag)
161 {
162 MODULE_EMEM.SBRCTR.B.STBULK = flag;
163 }
164 }
165
166
167 #endif /* IFXEMEM_H */
IfxEmem_TileConfigMode
IfxEmem_TileConfigMode
EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..). ...
Definition: IfxEmem.h:64
IfxEmem_TileNumber_12
Tile Number12.
Definition: IfxEmem.h:85
IfxEmem_TileConfigMode_calibMode
EMEM tile mode to calibration memory.
Definition: IfxEmem.h:66
IfxEmem_TileNumber_3
Tile Number3.
Definition: IfxEmem.h:76
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEmem_TileNumber
IfxEmem_TileNumber
Tile Number.
Definition: IfxEmem.h:71
IfxEmem_TileNumber_0
Tile Number0.
Definition: IfxEmem.h:73
IfxEmem_isModuleEnabled
IFX_INLINE boolean IfxEmem_isModuleEnabled(void)
Returns the status of module enabled or disabled.
Definition: IfxEmem.h:143
IfxEmem_State
IfxEmem_State
EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.
Definition: IfxEmem.h:56
IfxEmem_LockedState_unlocked
EMEM unlocked state.
Definition: IfxEmem.h:51
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxEmem_TileNumber_15
Tile Number15.
Definition: IfxEmem.h:88
IfxEmem_TileNumber_8
Tile Number8.
Definition: IfxEmem.h:81
IfxScuWdt.h
SCU basic functionality.
IfxEmem_State_disabled
EMEM module clock disabled state.
Definition: IfxEmem.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxEmem_TileNumber_2
Tile Number2.
Definition: IfxEmem.h:75
IfxEmem_setClockEnableState
IFX_EXTERN void IfxEmem_setClockEnableState(const IfxEmem_State state)
Sets state of the EMEM module clock. Note: Do not use this API for enabling and disabling EMEM withou...
Definition: IfxEmem.c:42
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxEmem_TileNumber_13
Tile Number13.
Definition: IfxEmem.h:86
IfxEmem_TileNumber_6
Tile Number6.
Definition: IfxEmem.h:79
IfxEmem_TileNumber_5
Tile Number5.
Definition: IfxEmem.h:78
IfxEmem_LockedState
IfxEmem_LockedState
EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.
Definition: IfxEmem.h:48
IfxEmem_TileNumber_14
Tile Number14.
Definition: IfxEmem.h:87
IfxEmem_State_enabled
EMEM module clock enabled state.
Definition: IfxEmem.h:59
IfxEmem_TileNumber_7
Tile Number7.
Definition: IfxEmem.h:80
IfxEmem_TileNumber_11
Tile Number11.
Definition: IfxEmem.h:84
IfxEmem_setTileConfigMode
IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
Sets all EMEM tiles to calibration memory mode.
Definition: IfxEmem.h:149
IfxEmem_TileNumber_1
Tile Number1.
Definition: IfxEmem.h:74
IfxEmem_setUnlockStandbyLockFlag
IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag)
Sets Unlock standby lock flag.
Definition: IfxEmem.h:158
IfxEmem_getLockedState
IFX_EXTERN IfxEmem_LockedState IfxEmem_getLockedState(void)
Gets the EMEM stand RAM lock state.
Definition: IfxEmem.c:36
IfxEmem_TileNumber_10
Tile Number10.
Definition: IfxEmem.h:83
IfxEmem_LockedState_locked
EMEM locked state.
Definition: IfxEmem.h:50
IfxEmem_TileNumber_4
Tile Number4.
Definition: IfxEmem.h:77
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxEmem_cfg.h
EMEM on-chip implementation data.
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxEmem_TileNumber_9
Tile Number9.
Definition: IfxEmem.h:82


iLLD_TC26B: IfxEmem_cfg.c Source File

  • _Impl
IfxEmem_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxEmem_cfg.c
3 * \brief EMEM on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxEmem_cfg.h"
IfxEmem_cfg.h
EMEM on-chip implementation data.


iLLD_TC26B: IfxEmem_cfg.h Source File

  • _Impl
IfxEmem_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEmem_cfg.h
3 * \brief EMEM on-chip implementation data
4 * \ingroup IfxLld_Emem
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Emem EMEM
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Emem_Impl Implementation
27 * \ingroup IfxLld_Emem
28 * \defgroup IfxLld_Emem_Std Standard Driver
29 * \ingroup IfxLld_Emem
30 */
31
32 #ifndef IFXEMEM_CFG_H
33 #define IFXEMEM_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "Cpu/Std/Ifx_Types.h"
40 #include "IfxEmem_reg.h"
41
42 /******************************************************************************/
43 /*-----------------------------------Macros-----------------------------------*/
44 /******************************************************************************/
45
46 #define IFXEMEM_START_ADDR_CPU_CACHED 0x9F000000UL
47
48 #define IFXEMEM_START_ADDR_CPU 0xBF000000UL
49
50 #define IFXEMEM_START_ADDR_BBB (0xAF000000UL)
51
52 #define IFXEMEM_SIZE (0x50000UL)
53
54 #define IFXEMEM_NUM_MODULES (1)
55
56 /******************************************************************************/
57 /*-------------------------------Enumerations---------------------------------*/
58 /******************************************************************************/
59
60 #endif /* IFXEMEM_CFG_H */
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC26B: IfxEray.c Source File

  • Eray
  • Std
IfxEray.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray.c
3 * \brief ERAY basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxEray.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
36 {
37 uint32 headerValue = ((syncFrameIndicator & 0x1) << 19) | ((startupFrameIndicator & 0x1) << 18) | ((frameId & 0x7FF) << 7) | (payloadLength &
38 0x7F);
39
40 uint32 crcInit = 0x1A;
41 uint32 length = 20;
42 uint32 crcNext;
43 uint32 crcPoly = 0x385;
44 uint32 crcRegX = crcInit;
45 uint32 headerTemp, regTemp;
46
47 headerValue <<= 11;
48 crcRegX <<= 21;
49 crcPoly <<= 21;
50
51 while (length)
52 {
53 headerValue <<= 1;
54 headerTemp = headerValue & 0x80000000;
55 regTemp = crcRegX & 0x80000000;
56
57 if (headerTemp ^ regTemp) // Step 1
58 {
59 crcNext = 1;
60 }
61 else
62 {
63 crcNext = 0;
64 }
65
66 crcRegX <<= 1; // Step 2
67
68 if (crcNext)
69 {
70 crcRegX ^= crcPoly; // Step 3
71 }
72
73 length--;
74 }
75
76 crcRegX >>= 21;
77
78 return (uint16)crcRegX;
79 }
80
81
82 boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
83 {
84 boolean result;
85
86 // wait if Communication controller is busy
87 while (eray->SUCC1.B.PBSY == 1)
88 {}
89
90 eray->SUCC1.B.CMD = pocCommand;
91
92 // if command not accepted, return FALSE
93 if (eray->SUCC1.B.CMD == 0)
94 {
95 result = FALSE;
96 }
97 else
98 {
99 result = TRUE;
100 }
101
102 return result;
103 }
104
105
106 void IfxEray_clearAllFlags(Ifx_ERAY *eray)
107 {
108 eray->EIR.U = 0xFFFFFFFFU; /* Clear Error Int. */
109 eray->SIR.U = 0xFFFFFFFFU; /* Clear Status Int. */
110 eray->EIER.U = 0xFFFFFFFFU; /* Disable all Error Int. */
111 eray->SIER.U = 0xFFFFFFFFU; /* Disable all Status Int. */
112 eray->MHDS.U = 0x7F7F7FFFU; /* Clear Error Int. */
113 }
114
115
116 void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
117 {
118 eray->ILE.U = 0x00000003U; //enable both the interrupt lines
119 eray->EILS.U = 0x00000000U; // all interrupt lines to INT0SRC
120 eray->SILS.U = 0x00000800U; // TOBC interrupt line to INT1SRC
121 eray->SIES.U = 0x0303FFFFU; // all status interrupts are enabled
122 eray->EIES.U = 0x07070FFFU; // all error interrupts are enabled
123 eray->NDIC1.U = 0x00000000U; // all interrupt lines to NADT0SRC
124 eray->NDIC2.U = 0x00000000U; // all interrupt lines to NADT0SRC
125 eray->NDIC3.U = 0x00000000U; // all interrupt lines to NADT0SRC
126 eray->NDIC4.U = 0x00000000U; // all interrupt lines to NADT0SRC
127 eray->MSIC1.U = 0x00000000U; // all interrupt lines to MBSC0SRC
128 eray->MSIC2.U = 0x00000000U; // all interrupt lines to MBSC0SRC
129 eray->MSIC3.U = 0x00000000U; // all interrupt lines to MBSC0SRC
130 eray->MSIC4.U = 0x00000000U; // all interrupt lines to MBSC0SRC
131 }
132
133
134 Ifx_ERAY *IfxEray_getAddress(IfxEray_Index eray)
135 {
136 Ifx_ERAY *module;
137
138 if (eray < IFXERAY_NUM_MODULES)
139 {
140 module = (Ifx_ERAY *)IfxEray_cfg_indexMap[eray].module;
141 }
142 else
143 {
144 module = NULL_PTR;
145 }
146
147 return module;
148 }
149
150
151 IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
152 {
153 uint32 index;
154 IfxEray_Index result;
155
156 result = IfxEray_Index_none;
157
158 for (index = 0; index < IFXERAY_NUM_MODULES; index++)
159 {
160 if (IfxEray_cfg_indexMap[index].module == eray)
161 {
162 result = (IfxEray_Index)IfxEray_cfg_indexMap[index].index;
163 break;
164 }
165 }
166
167 return result;
168 }
169
170
171 void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
172 {
173 if (data != NULL_PTR)
174 {
175 uint16 length = (payloadLength + 1) / 2;
176 uint8 index;
177
178 for (index = 0; index < length; index++)
179 {
180 *data++ = eray->RDDS_1S[index].U;
181 }
182 }
183 }
184
185
186 void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
187 {
188 {
189 Ifx_ERAY_RDHS1 rdhs1;
190 rdhs1.U = eray->RDHS1.U;
191 Ifx_ERAY_RDHS2 rdhs2;
192 rdhs2.U = eray->RDHS2.U;
193 Ifx_ERAY_RDHS3 rdhs3;
194 rdhs3.U = eray->RDHS3.U;
195
196 header->frameId = rdhs1.B.FID;
197 header->payloadLength = rdhs2.B.PLR;
198 header->headerCrc = rdhs2.B.CRC;
199 header->payloadPreambleIndicator = rdhs3.B.PPI;
200 header->nullFrameIndicator = rdhs3.B.NFI;
201 header->syncFrame = rdhs3.B.SYN;
202 header->startupFrame = rdhs3.B.SFI;
203 header->cycleNumber = rdhs3.B.RCC;
204 }
205
206 IfxEray_readData(eray, data, (header->payloadLength > maxPayloadLength) ? maxPayloadLength : header->payloadLength);
207 }
208
209
210 void IfxEray_resetModule(Ifx_ERAY *eray)
211 {
212 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
213 IfxScuWdt_clearCpuEndinit(passwd);
214 eray->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
215 eray->KRST0.B.RST = 1;
216
217 IfxScuWdt_setCpuEndinit(passwd);
218
219 while (eray->KRST0.B.RSTSTAT == 0)
220 {
221 /* Wait until reset is executed */
222 }
223
224 IfxScuWdt_clearCpuEndinit(passwd);
225 eray->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
226 IfxScuWdt_setCpuEndinit(passwd);
227 }
228
229
230 void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
231 {
232 uint8 ix = messageBuffer / 32;
233 uint32 mask = 1 << (messageBuffer % 32);
234 Ifx_ERAY_MSIC1 *msicSFR = (Ifx_ERAY_MSIC1 *)((uint32)&eray->MSIC1 + 4 * ix);
235
236 if (messageBufferDestination == FALSE)
237 {
238 msicSFR->U &= ~mask;
239 }
240 else
241 {
242 msicSFR->U |= mask;
243 }
244 }
245
246
247 void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
248 {
249 IFX_UNUSED_PARAMETER(ndat);
250 uint8 ix = ndatDestination / 32;
251 uint32 mask = 1 << (ndatDestination % 32);
252 Ifx_ERAY_NDIC1 *ndicSFR = (Ifx_ERAY_NDIC1 *)((uint32)&eray->NDIC1 + 4 * ix);
253
254 if (ndatDestination == FALSE)
255 {
256 ndicSFR->U &= ~mask;
257 }
258 else
259 {
260 ndicSFR->U |= mask;
261 }
262 }
263
264
265 void IfxEray_setPocReady(Ifx_ERAY *eray)
266 {
267 // wait CC is busy
268 while (eray->SUCC1.B.PBSY == 1)
269 {}
270
271 // Ready unlock sequence
272 eray->LCK.B.CLK = 0xCE;
273 eray->LCK.B.CLK = 0x31;
274 eray->SUCC1.B.CMD = IfxEray_PocCommand_ready;
275 }
276
277
278 void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
279 {
280 // wait if Host is busy with another transfer
281 while (IfxEray_getInputBufferBusyHostStatus(eray) == TRUE)
282 {}
283
284 if (header != NULL_PTR)
285 {
286 {
287 Ifx_ERAY_WRHS1 wrhs1;
288 wrhs1.U = 0;
289 wrhs1.B.FID = header->frameId;
290 wrhs1.B.CYC = header->cycleCode;
291 wrhs1.B.CHA = header->channelAFiltered;
292 wrhs1.B.CHB = header->channelBFiltered;
293 wrhs1.B.CFG = header->bufferDirection;
294 wrhs1.B.PPIT = header->transmitPayloadIndicatior;
295 wrhs1.B.TXM = header->transmissionMode;
296 wrhs1.B.MBI = header->bufferServiceEnabled;
297 eray->WRHS1.U = wrhs1.U;
298 }
299 {
300 Ifx_ERAY_WRHS2 wrhs2;
301 wrhs2.U = 0;
302
303 if (header->bufferDirection == IfxEray_BufferDirection_transmit)
304 {
305 wrhs2.B.CRC = IfxEray_calcHeaderCrc(header->payloadLength, header->frameId, header->startupFrameIndicator, header->syncFrameIndicator);
306 }
307
308 wrhs2.B.PLC = header->payloadLength;
309 eray->WRHS2.U = wrhs2.U;
310 }
311
312 eray->WRHS3.U = header->dataPointer;
313 }
314
315 IfxEray_writeData(eray, data, header->payloadLength);
316
317 eray->IBCM.B.LHSH = slotConfig->headerTransfered;
318 eray->IBCM.B.LDSH = slotConfig->dataTransfered;
319 eray->IBCM.B.STXRH = slotConfig->transferRequested;
320 eray->IBCR.B.IBRH = slotConfig->bufferIndex;
321
322 // wait if Shadow is busy with another transfer
323 while (IfxEray_getInputBufferBusyShadowStatus(eray) == TRUE)
324 {}
325
326 while (IfxEray_getInputBufferBusyHostStatus(eray) == TRUE)
327 {}
328 }
329
330
331 void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
332 {
333 if (data != NULL_PTR)
334 {
335 uint16 length = (payloadLength + 1) / 2;
336 uint8 index;
337
338 for (index = 0; index < length; index++)
339 {
340 eray->WRDS_1S[index].U = *data++;
341 }
342 }
343 }
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:396
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:278
IfxEray_Header::bufferDirection
IfxEray_BufferDirection bufferDirection
selects buffer as a transmit buffer or as a receive buffer.
Definition: IfxEray.h:370
IfxEray_calcHeaderCrc
uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame.
Definition: IfxEray.c:35
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:265
IfxEray_ReceivedHeader::syncFrame
uint8 syncFrame
0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.
Definition: IfxEray.h:388
IfxEray_BufferDirection_transmit
buffer is configured as transmit buffer
Definition: IfxEray.h:74
IfxEray_setNewDataInterruptDestination
void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:382
IfxEray_Header::transmissionMode
IfxEray_TransmissionMode transmissionMode
transmission mode of Header.
Definition: IfxEray.h:372
IfxEray_Header::transmitPayloadIndicatior
boolean transmitPayloadIndicatior
weather payload indicator is set or not.
Definition: IfxEray.h:371
IfxEray_getIndex
IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
API to get the resource index of the ERAY specified.
Definition: IfxEray.c:151
IfxEray_SlotConfig::dataTransfered
boolean dataTransfered
whether data is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:399
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEray_ReceivedHeader::payloadPreambleIndicator
uint8 payloadPreambleIndicator
1 : received payload segment has network management and message id or not; 0 : It hasn&#39;t...
Definition: IfxEray.h:391
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1249
IfxEray_Header::dataPointer
uint16 dataPointer
pointer to the data section of message buffer in RAM.
Definition: IfxEray.h:375
IfxEray_Header::startupFrameIndicator
boolean startupFrameIndicator
whether startup frame is indicated or not.
Definition: IfxEray.h:376
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEray_Header::bufferServiceEnabled
boolean bufferServiceEnabled
wether buffer service request is enabled or not.
Definition: IfxEray.h:373
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxEray_ReceivedHeader::headerCrc
uint16 headerCrc
received header crc.
Definition: IfxEray.h:386
IfxEray.h
ERAY basic functionality.
IfxEray_writeData
void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:331
IfxEray_SlotConfig::transferRequested
boolean transferRequested
transmit buffer released for transmission or not.
Definition: IfxEray.h:400
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxEray_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.c:35
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1255
IfxEray_setMessageBufferInterruptDestination
void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:230
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:364
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:48
IfxEray_SlotConfig::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray.h:401
IfxEray_ReceivedHeader::payloadLength
uint8 payloadLength
received payload length.
Definition: IfxEray.h:385
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxEray_ReceivedHeader::nullFrameIndicator
uint8 nullFrameIndicator
0 : no data frame received; 1: atleast one data frame received.
Definition: IfxEray.h:387
IfxEray_Header::channelAFiltered
boolean channelAFiltered
channel A serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:368
IfxEray_ReceivedHeader::startupFrame
uint8 startupFrame
0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. ...
Definition: IfxEray.h:389
IfxEray_Header::syncFrameIndicator
boolean syncFrameIndicator
whether sync frame is indicated or not.
Definition: IfxEray.h:377
IfxEray_resetModule
void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:210
IfxEray_getAddress
Ifx_ERAY * IfxEray_getAddress(IfxEray_Index eray)
Definition: IfxEray.c:134
IfxEray_Header::channelBFiltered
boolean channelBFiltered
channel B serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:369
IfxEray_Index_none
Not Selected.
Definition: IfxEray_cfg.h:64
IfxEray_SlotConfig::headerTransfered
boolean headerTransfered
whether header is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:398
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:247
IfxEray_ReceivedHeader::cycleNumber
uint8 cycleNumber
cycle number in which frame is received.
Definition: IfxEray.h:390
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxEray_PocCommand_ready
command to controller to enter READY.
Definition: IfxEray.h:251
IfxEray_readFrame
void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:186
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxEray_clearAllFlags
void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:106
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxEray_enableInterruptLines
void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:116
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:62
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:82
IfxEray_Header::cycleCode
uint8 cycleCode
the cycle set used for cycle counter filtering.
Definition: IfxEray.h:367
IfxEray_readData
void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:171
IfxEray_ReceivedHeader::frameId
uint16 frameId
received frame id.
Definition: IfxEray.h:384


iLLD_TC26B: IfxEray.h Source File

  • Eray
  • Std
IfxEray.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray.h
3 * \brief ERAY basic functionality
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Eray_Std_Enumerations Enumerations
25 * \ingroup IfxLld_Eray_Std
26 * \defgroup IfxLld_Eray_Std_Interrupt Interrupt Functions
27 * \ingroup IfxLld_Eray_Std
28 * \defgroup IfxLld_Eray_Std_IO IO Pin Configuration Functions
29 * \ingroup IfxLld_Eray_Std
30 * \defgroup IfxLld_Eray_Std_Module Module Functions
31 * \ingroup IfxLld_Eray_Std
32 * \defgroup IfxLld_Eray_Std_Status Status Functions
33 * \ingroup IfxLld_Eray_Std
34 * \defgroup IfxLld_Eray_Std_Configuration Configuration Functions
35 * \ingroup IfxLld_Eray_Std
36 * \defgroup IfxLld_Eray_Std_Structures Data Structures
37 * \ingroup IfxLld_Eray_Std
38 * \defgroup IfxLld_Eray_Std_Operative Operative Functions
39 * \ingroup IfxLld_Eray_Std
40 */
41
42 #ifndef IFXERAY_H
43 #define IFXERAY_H 1
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "_Impl/IfxEray_cfg.h"
50 #include "_PinMap/IfxEray_PinMap.h"
51 #include "Src/Std/IfxSrc.h"
52 #include "IfxEray_reg.h"
53
54 /******************************************************************************/
55 /*--------------------------------Enumerations--------------------------------*/
56 /******************************************************************************/
57
58 /** \addtogroup IfxLld_Eray_Std_Enumerations
59 * \{ */
60 /** \brief Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
61 */
62 typedef enum
63 {
64 IfxEray_Baudrate_10 = 0, /**< \brief baudrate is 10MBits/Sec */
65 IfxEray_Baudrate_5 = 1, /**< \brief baudrate is 5MBits/Sec */
66 IfxEray_Baudrate_2_5 = 2 /**< \brief baudrate is 2.5MBits/Sec */
67 } IfxEray_Baudrate;
68
69 /** \brief wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.
70 */
71 typedef enum
72 {
73 IfxEray_BufferDirection_receive = 0, /**< \brief buffer is configured as receive buffer */
74 IfxEray_BufferDirection_transmit = 1 /**< \brief buffer is configured as transmit buffer */
75 } IfxEray_BufferDirection;
76
77 /** \brief Channel Id
78 */
79 typedef enum
80 {
81 IfxEray_Channel_a = 0, /**< \brief channel A */
82 IfxEray_Channel_b = 1 /**< \brief channel B */
83 } IfxEray_Channel;
84
85 /** \brief Selection of error flag to clear defined in MODULE_ERAY.EIR.U
86 */
87 typedef enum
88 {
89 IfxEray_ClearErrorFlag_pemc = 1, /**< \brief POC error mode change bit. */
90 IfxEray_ClearErrorFlag_cna = 2, /**< \brief command not accepted event bit. */
91 IfxEray_ClearErrorFlag_sfbm = 4, /**< \brief sync frame below minimum bit. */
92 IfxEray_ClearErrorFlag_sfo = 8, /**< \brief sync frame overflow event bit */
93 IfxEray_ClearErrorFlag_ccf = 16, /**< \brief clock correction failure event. */
94 IfxEray_ClearErrorFlag_ccl = 32, /**< \brief CHI command locked event. */
95 IfxEray_ClearErrorFlag_eerr = 64, /**< \brief ECC error event bit. */
96 IfxEray_ClearErrorFlag_rfo = 128, /**< \brief RxFIFO overrun event bit. */
97 IfxEray_ClearErrorFlag_efa = 256, /**< \brief empty FIFO access event bit. */
98 IfxEray_ClearErrorFlag_iiba = 512, /**< \brief illegal input buffer access event. */
99 IfxEray_ClearErrorFlag_ioba = 1024, /**< \brief illegal output buffer access event. */
100 IfxEray_ClearErrorFlag_mhf = 2048, /**< \brief message handler constraint flag. */
101 IfxEray_ClearErrorFlag_eda = 65536, /**< \brief error event on channel A. */
102 IfxEray_ClearErrorFlag_ltva = 131072, /**< \brief latest transmit violation flag on channel A . */
103 IfxEray_ClearErrorFlag_taba = 262144, /**< \brief transmission across channel A boundary flag. */
104 IfxEray_ClearErrorFlag_edb = 16777216, /**< \brief error event on channel B. */
105 IfxEray_ClearErrorFlag_ltvb = 33554432, /**< \brief latest transmit violation flag on channel B . */
106 IfxEray_ClearErrorFlag_tabb = 67108864 /**< \brief transmission across channel B boundary flag. */
107 } IfxEray_ClearErrorFlag;
108
109 /** \brief Selection of status flag to clear defined in MODULE_ERAY.SIR.U
110 */
111 typedef enum
112 {
113 IfxEray_ClearStatusFlag_wst = 1, /**< \brief wakeup status bit. */
114 IfxEray_ClearStatusFlag_cas = 2, /**< \brief collision avoidance bit. */
115 IfxEray_ClearStatusFlag_cycs = 4, /**< \brief cycle start service bit. */
116 IfxEray_ClearStatusFlag_txi = 8, /**< \brief transmit service request bit. */
117 IfxEray_ClearStatusFlag_rxi = 16, /**< \brief receive service request bit. */
118 IfxEray_ClearStatusFlag_rfne = 32, /**< \brief receive fifo not empty bit. */
119 IfxEray_ClearStatusFlag_rfcl = 64, /**< \brief RxFIFO critical level reached bit. */
120 IfxEray_ClearStatusFlag_nmvc = 128, /**< \brief network management vector bit. */
121 IfxEray_ClearStatusFlag_ti0 = 256, /**< \brief timer0 service request bit. */
122 IfxEray_ClearStatusFlag_ti1 = 512, /**< \brief timer1 service request bit. */
123 IfxEray_ClearStatusFlag_tibc = 1024, /**< \brief transfer input buffer completion request bit. */
124 IfxEray_ClearStatusFlag_tobc = 2048, /**< \brief transfer output buffer completion request bit. */
125 IfxEray_ClearStatusFlag_swe = 4096, /**< \brief stop watch event bit. */
126 IfxEray_ClearStatusFlag_sucs = 8192, /**< \brief startup success event bit. */
127 IfxEray_ClearStatusFlag_mbsi = 16384, /**< \brief message buffer service status bit. */
128 IfxEray_ClearStatusFlag_sds = 32768, /**< \brief dynamic segment start bit. */
129 IfxEray_ClearStatusFlag_wupa = 65536, /**< \brief wakeup pattern channel A bit. */
130 IfxEray_ClearStatusFlag_mtsa = 131072, /**< \brief MTS receive channel A bit. */
131 IfxEray_ClearStatusFlag_wupb = 16777216, /**< \brief wakeup pattern channel B bit. */
132 IfxEray_ClearStatusFlag_mtsb = 33554432 /**< \brief MTS receive channel B bit. */
133 } IfxEray_ClearStatusFlag;
134
135 /** \brief Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.
136 */
137 typedef enum
138 {
139 IfxEray_ClockDivider_none = 0, /**< \brief no clock signal */
140 IfxEray_ClockDivider_1 = 1, /**< \brief run mode clock divider 1 */
141 IfxEray_ClockDivider_2, /**< \brief run mode clock divider 2 */
142 IfxEray_ClockDivider_3, /**< \brief run mode clock divider 3 */
143 IfxEray_ClockDivider_4, /**< \brief run mode clock divider 4 */
144 IfxEray_ClockDivider_5, /**< \brief run mode clock divider 5 */
145 IfxEray_ClockDivider_6, /**< \brief run mode clock divider 6 */
146 IfxEray_ClockDivider_7 /**< \brief run mode clock divider 7 */
147 } IfxEray_ClockDivider;
148
149 /** \brief External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
150 */
151 typedef enum
152 {
153 IfxEray_ExternalOffset_noCorrection = 1, /**< \brief No external correction control. */
154 IfxEray_ExternalOffset_correctionSubtracted = 2, /**< \brief External offset correction subtracted from calculated correction. */
155 IfxEray_ExternalOffset_correctionAdded = 3 /**< \brief External offset correction added to calculated correction. */
156 } IfxEray_ExternalOffset;
157
158 /** \brief External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
159 */
160 typedef enum
161 {
162 IfxEray_ExternalOffsetCorrection_0 = 0, /**< \brief external clock offset correction value 0 */
163 IfxEray_ExternalOffsetCorrection_1, /**< \brief external clock offset correction value 1 */
164 IfxEray_ExternalOffsetCorrection_2, /**< \brief external clock offset correction value 2 */
165 IfxEray_ExternalOffsetCorrection_3, /**< \brief external clock offset correction value 3 */
166 IfxEray_ExternalOffsetCorrection_4, /**< \brief external clock offset correction value 4 */
167 IfxEray_ExternalOffsetCorrection_5, /**< \brief external clock offset correction value 5 */
168 IfxEray_ExternalOffsetCorrection_6, /**< \brief external clock offset correction value 6 */
169 IfxEray_ExternalOffsetCorrection_7 /**< \brief external clock offset correction value 7 */
170 } IfxEray_ExternalOffsetCorrection;
171
172 /** \brief External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
173 */
174 typedef enum
175 {
176 IfxEray_ExternalRate_noCorrection = 1, /**< \brief No external correction control. */
177 IfxEray_ExternalRate_correctionSubtracted = 2, /**< \brief External rate correction subtracted from calculated correction. */
178 IfxEray_ExternalRate_correctionAdded = 3 /**< \brief External rate correction added to calculated correction. */
179 } IfxEray_ExternalRate;
180
181 /** \brief External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
182 */
183 typedef enum
184 {
185 IfxEray_ExternalRateCorrection_0 = 0, /**< \brief external clock rate correction value 0 */
186 IfxEray_ExternalRateCorrection_1, /**< \brief external clock rate correction value 1 */
187 IfxEray_ExternalRateCorrection_2, /**< \brief external clock rate correction value 2 */
188 IfxEray_ExternalRateCorrection_3, /**< \brief external clock rate correction value 3 */
189 IfxEray_ExternalRateCorrection_4, /**< \brief external clock rate correction value 4 */
190 IfxEray_ExternalRateCorrection_5, /**< \brief external clock rate correction value 5 */
191 IfxEray_ExternalRateCorrection_6, /**< \brief external clock rate correction value 6 */
192 IfxEray_ExternalRateCorrection_7 /**< \brief external clock rate correction value 7 */
193 } IfxEray_ExternalRateCorrection;
194
195 /** \brief Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
196 */
197 typedef enum
198 {
199 IfxEray_IdleDynamicSlots_0 = 0, /**< \brief duration of dynamic slot idle phase is 0 */
200 IfxEray_IdleDynamicSlots_1, /**< \brief duration of dynamic slot idle phase is 1 */
201 IfxEray_IdleDynamicSlots_2 /**< \brief duration of dynamic slot idle phase is 2 */
202 } IfxEray_IdleDynamicSlots;
203
204 /** \brief Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
205 */
206 typedef enum
207 {
208 IfxEray_ListenTimeOutNoise_2 = 1, /**< \brief listen Time-out noise 2 */
209 IfxEray_ListenTimeOutNoise_3, /**< \brief listen Time-out noise 3 */
210 IfxEray_ListenTimeOutNoise_4, /**< \brief listen Time-out noise 4 */
211 IfxEray_ListenTimeOutNoise_5, /**< \brief listen Time-out noise 5 */
212 IfxEray_ListenTimeOutNoise_6, /**< \brief listen Time-out noise 6 */
213 IfxEray_ListenTimeOutNoise_7, /**< \brief listen Time-out noise 7 */
214 IfxEray_ListenTimeOutNoise_8, /**< \brief listen Time-out noise 8 */
215 IfxEray_ListenTimeOutNoise_9, /**< \brief listen Time-out noise 9 */
216 IfxEray_ListenTimeOutNoise_10, /**< \brief listen Time-out noise 10 */
217 IfxEray_ListenTimeOutNoise_11, /**< \brief listen Time-out noise 11 */
218 IfxEray_ListenTimeOutNoise_12, /**< \brief listen Time-out noise 12 */
219 IfxEray_ListenTimeOutNoise_13, /**< \brief listen Time-out noise 13 */
220 IfxEray_ListenTimeOutNoise_14, /**< \brief listen Time-out noise 14 */
221 IfxEray_ListenTimeOutNoise_15, /**< \brief listen Time-out noise 15 */
222 IfxEray_ListenTimeOutNoise_16 /**< \brief listen Time-out noise 16 */
223 } IfxEray_ListenTimeOutNoise;
224
225 /** \brief Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
226 */
227 typedef enum
228 {
229 IfxEray_MaxSynchFrames_2 = 2, /**< \brief Maximum number of sync frames in a cluster are 2 */
230 IfxEray_MaxSynchFrames_3, /**< \brief Maximum number of sync frames in a cluster are 3 */
231 IfxEray_MaxSynchFrames_4, /**< \brief Maximum number of sync frames in a cluster are 4 */
232 IfxEray_MaxSynchFrames_5, /**< \brief Maximum number of sync frames in a cluster are 5 */
233 IfxEray_MaxSynchFrames_6, /**< \brief Maximum number of sync frames in a cluster are 6 */
234 IfxEray_MaxSynchFrames_7, /**< \brief Maximum number of sync frames in a cluster are 7 */
235 IfxEray_MaxSynchFrames_8, /**< \brief Maximum number of sync frames in a cluster are 8 */
236 IfxEray_MaxSynchFrames_9, /**< \brief Maximum number of sync frames in a cluster are 9 */
237 IfxEray_MaxSynchFrames_10, /**< \brief Maximum number of sync frames in a cluster are 10 */
238 IfxEray_MaxSynchFrames_11, /**< \brief Maximum number of sync frames in a cluster are 11 */
239 IfxEray_MaxSynchFrames_12, /**< \brief Maximum number of sync frames in a cluster are 12 */
240 IfxEray_MaxSynchFrames_13, /**< \brief Maximum number of sync frames in a cluster are 13 */
241 IfxEray_MaxSynchFrames_14, /**< \brief Maximum number of sync frames in a cluster are 14 */
242 IfxEray_MaxSynchFrames_15 /**< \brief Maximum number of sync frames in a cluster are 15 */
243 } IfxEray_MaxSynchFrames;
244
245 /** \brief Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
246 */
247 typedef enum
248 {
249 IfxEray_PocCommand_notAccepted = 0, /**< \brief command not accepted. */
250 IfxEray_PocCommand_config = 1, /**< \brief command to controller to enter CONFIG */
251 IfxEray_PocCommand_ready = 2, /**< \brief command to controller to enter READY. */
252 IfxEray_PocCommand_wakeup = 3, /**< \brief command to controller to enter WAKEUP */
253 IfxEray_PocCommand_run = 4, /**< \brief command to controller to enter RUN */
254 IfxEray_PocCommand_allSlots = 5, /**< \brief command to controller to enter ALL_SLOTS */
255 IfxEray_PocCommand_halt = 6, /**< \brief command to controller to enter HALT */
256 IfxEray_PocCommand_freeze = 7, /**< \brief command to controller to enter FREEZE */
257 IfxEray_PocCommand_sendMts = 8, /**< \brief command to controller to enter SEND_MTS */
258 IfxEray_PocCommand_coldStart = 9, /**< \brief command to controller to enter COLD_START */
259 IfxEray_PocCommand_reset = 10, /**< \brief command to controller to enter RESET */
260 IfxEray_PocCommand_monitor = 11, /**< \brief command to controller to enter MONITOR */
261 IfxEray_PocCommand_clearRam = 12 /**< \brief command to controller to enter CLEAR_RAM */
262 } IfxEray_PocCommand;
263
264 /** \brief State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
265 */
266 typedef enum
267 {
268 IfxEray_PocState_defaultConfig = 0, /**< \brief controller entered default config state */
269 IfxEray_PocState_ready = 1, /**< \brief controller entered ready state */
270 IfxEray_PocState_normalActive = 2, /**< \brief controller entered normal-active state */
271 IfxEray_PocState_normalPassive = 3, /**< \brief controller entered normal-passive state */
272 IfxEray_PocState_halt = 4, /**< \brief controller entered halt state */
273 IfxEray_PocState_monitor = 5, /**< \brief controller entered monitor state */
274 IfxEray_PocState_config = 15, /**< \brief controller entered config state */
275 IfxEray_PocState_wakeupStandby = 16, /**< \brief controller entered wakeup standby state */
276 IfxEray_PocState_wakeupListen = 17, /**< \brief controller entered wakeup-listen state */
277 IfxEray_PocState_wakeupSend = 18, /**< \brief controller entered wakeup-send state */
278 IfxEray_PocState_wakeupDetect = 19, /**< \brief controller entered wakeup-detection state */
279 IfxEray_PocState_startup = 32, /**< \brief controller entered startup state */
280 IfxEray_PocState_coldStartListen = 33, /**< \brief controller entered clod-start listen state */
281 IfxEray_PocState_collisionResolution = 34, /**< \brief controller entered collission-resolution state. */
282 IfxEray_PocState_consistencyCheck = 35, /**< \brief controller entered consistency-check. */
283 IfxEray_PocState_gap = 36, /**< \brief controller entered gap state. */
284 IfxEray_PocState_join = 37, /**< \brief controller entered join state. */
285 IfxEray_PocState_integrationCheck = 38, /**< \brief controller entered integration-check. */
286 IfxEray_PocState_integrationListen = 39, /**< \brief controller entered integration-listen state. */
287 IfxEray_PocState_integrationConsistencyCheck = 40, /**< \brief controller entered integration consistency check state */
288 IfxEray_PocState_initializeSchedule = 41, /**< \brief controller entered initialise schedule state */
289 IfxEray_PocState_staruAborted = 42, /**< \brief controller entered startup-abort state */
290 IfxEray_PocState_startupSucced = 43 /**< \brief controller entered startup succeed state. */
291 } IfxEray_PocState;
292
293 /** \brief Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
294 */
295 typedef enum
296 {
297 IfxEray_ReceiveChannel_both = 0, /**< \brief both channels for reception */
298 IfxEray_ReceiveChannel_b = 1, /**< \brief channel A for reception */
299 IfxEray_ReceiveChannel_a = 2, /**< \brief channel B for reception */
300 IfxEray_ReceiveChannel_none = 3 /**< \brief none channels for reception */
301 } IfxEray_ReceiveChannel;
302
303 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
304 * Definition in Ifx_ERAY.CLC.B.EDIS
305 */
306 typedef enum
307 {
308 IfxEray_SleepMode_enable = 0, /**< \brief enables sleep mode */
309 IfxEray_SleepMode_disable = 1 /**< \brief disables sleep mode */
310 } IfxEray_SleepMode;
311
312 /** \brief Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
313 */
314 typedef enum
315 {
316 IfxEray_StrobePosition_5 = 0, /**< \brief Sample count 5 for strobing */
317 IfxEray_StrobePosition_4 = 1, /**< \brief Sample count 4 for strobing */
318 IfxEray_StrobePosition_6 = 2 /**< \brief Sample count 6 for strobing */
319 } IfxEray_StrobePosition;
320
321 /** \brief OCDS Suspend Control (OCDS.SUS)
322 */
323 typedef enum
324 {
325 IfxEray_SuspendMode_none = 0, /**< \brief No suspend */
326 IfxEray_SuspendMode_hard = 1, /**< \brief Hard Suspend */
327 IfxEray_SuspendMode_soft = 2 /**< \brief Soft Suspend */
328 } IfxEray_SuspendMode;
329
330 /** \brief Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.
331 */
332 typedef enum
333 {
334 IfxEray_TransmissionMode_continuous = 0, /**< \brief continuos transmission mode */
335 IfxEray_TransmissionMode_singleShot = 1 /**< \brief single transmission mode */
336 } IfxEray_TransmissionMode;
337
338 /** \brief Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
339 */
340 typedef enum
341 {
342 IfxEray_TransmissionSlotMode_all = 0, /**< \brief transmission in all slots. */
343 IfxEray_TransmissionSlotMode_single = 1 /**< \brief transmission in key slot. */
344 } IfxEray_TransmissionSlotMode;
345
346 /** \brief Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
347 */
348 typedef enum
349 {
350 IfxEray_WakeupChannel_a = 0, /**< \brief send wakeup channel pattern on channel A */
351 IfxEray_WakeupChannel_b = 1 /**< \brief send wakeup channel pattern on channel B */
352 } IfxEray_WakeupChannel;
353
354 /** \} */
355
356 /******************************************************************************/
357 /*-----------------------------Data Structures--------------------------------*/
358 /******************************************************************************/
359
360 /** \addtogroup IfxLld_Eray_Std_Structures
361 * \{ */
362 /** \brief Header section in a frame.
363 */
364 typedef struct
365 {
366 uint16 frameId; /**< \brief slot ID of the selected Message Buffer. */
367 uint8 cycleCode; /**< \brief the cycle set used for cycle counter filtering. */
368 boolean channelAFiltered; /**< \brief channel A serves as a control for transmit and filter for receive buffers. */
369 boolean channelBFiltered; /**< \brief channel B serves as a control for transmit and filter for receive buffers. */
370 IfxEray_BufferDirection bufferDirection; /**< \brief selects buffer as a transmit buffer or as a receive buffer. */
371 boolean transmitPayloadIndicatior; /**< \brief weather payload indicator is set or not. */
372 IfxEray_TransmissionMode transmissionMode; /**< \brief transmission mode of Header. */
373 boolean bufferServiceEnabled; /**< \brief wether buffer service request is enabled or not. */
374 uint8 payloadLength; /**< \brief length of data section. */
375 uint16 dataPointer; /**< \brief pointer to the data section of message buffer in RAM. */
376 boolean startupFrameIndicator; /**< \brief whether startup frame is indicated or not. */
377 boolean syncFrameIndicator; /**< \brief whether sync frame is indicated or not. */
378 } IfxEray_Header;
379
380 /** \brief Received header in a frame.
381 */
382 typedef struct
383 {
384 uint16 frameId : 11; /**< \brief received frame id. */
385 uint8 payloadLength : 7; /**< \brief received payload length. */
386 uint16 headerCrc : 11; /**< \brief received header crc. */
387 uint8 nullFrameIndicator : 1; /**< \brief 0 : no data frame received; 1: atleast one data frame received. */
388 uint8 syncFrame : 1; /**< \brief 0 : received frame is not a synch frame ; 1 : receive frame is a synch frame. */
389 uint8 startupFrame : 1; /**< \brief 0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. */
390 uint8 cycleNumber : 7; /**< \brief cycle number in which frame is received. */
391 uint8 payloadPreambleIndicator : 1; /**< \brief 1 : received payload segment has network management and message id or not; 0 : It hasn't. */
392 } IfxEray_ReceivedHeader;
393
394 /** \brief Transmit control structure.
395 */
396 typedef struct
397 {
398 boolean headerTransfered; /**< \brief whether header is transfered from input buffers to Message RAM or not. */
399 boolean dataTransfered; /**< \brief whether data is transfered from input buffers to Message RAM or not. */
400 boolean transferRequested; /**< \brief transmit buffer released for transmission or not. */
401 uint8 bufferIndex; /**< \brief buffer index in the Message RAM. */
402 } IfxEray_SlotConfig;
403
404 /** \} */
405
406 /** \addtogroup IfxLld_Eray_Std_Interrupt
407 * \{ */
408
409 /******************************************************************************/
410 /*-------------------------Inline Function Prototypes-------------------------*/
411 /******************************************************************************/
412
413 /** \brief Clears the error flag requested.
414 * \param eray pointer to ERAY module registers.
415 * \param errorFlag error flag to be cleared.
416 * \return None
417 */
418 IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag);
419
420 /** \brief Clears the status flag requested.
421 * \param eray pointer to ERAY module registers.
422 * \param statusFlag status flag to be cleared.
423 * \return None
424 */
425 IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag);
426
427 /** \brief Gets the error interrupt flags.
428 * \param eray pointer to ERAY module registers.
429 * \return error interrupt flags.
430 */
431 IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray);
432
433 /** \brief Gets the IBUSY service request.
434 * \param eray pointer to ERAY module registers.
435 * \return address of IBUSY service request value.
436 */
437 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray);
438
439 /** \brief Gets the INT0 service request.
440 * \param eray pointer to ERAY module registers.
441 * \return address of INT0 service request value.
442 */
443 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray);
444
445 /** \brief Gets the INT1 service request.
446 * \param eray pointer to ERAY module registers.
447 * \return address of INT1 service request value.
448 */
449 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray);
450
451 /** \brief Gets the message buffers interrupt status.
452 * \param eray pointer to ERAY module registers.
453 * \param messageBuffer message buffer to which interrupt status be checked.
454 * \return message buffer interrupt status.
455 */
456 IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer);
457
458 /** \brief Gets the MBSC0 service request.
459 * \param eray pointer to ERAY module registers.
460 * \return address of MBSC0 service request value.
461 */
462 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray);
463
464 /** \brief Gets the MBSC1 service request.
465 * \param eray pointer to ERAY module registers.
466 * \return address of MBSC1 service request value.
467 */
468 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray);
469
470 /** \brief Gets the NDAT0 service request.
471 * \param eray pointer to ERAY module registers.
472 * \return address of NDAT0 service request value.
473 */
474 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray);
475
476 /** \brief Gets the NDAT1 service request.
477 * \param eray pointer to ERAY module registers.
478 * \return address of NDAT1 service request value.
479 */
480 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray);
481
482 /** \brief Gets the new data interrupt buffers status.
483 * \param eray pointer to ERAY module registers.
484 * \param ndat message buffer number configured to which ndat occurs.
485 * \return ndat interrupt buffer.
486 */
487 IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat);
488
489 /** \brief Gets the OBUSY service request.
490 * \param eray pointer to ERAY module registers.
491 * \return address of OBUSY service request value.
492 */
493 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray);
494
495 /** \brief Gets the status interrupt flags.
496 * \param eray pointer to ERAY module registers.
497 * \return status interrupt flags.
498 */
499 IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray);
500
501 /** \brief Gets the TINT0 service request.
502 * \param eray pointer to ERAY module registers.
503 * \return address of TINT0 service request value.
504 */
505 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray);
506
507 /** \brief Gets the TINT1 service request.
508 * \param eray pointer to ERAY module registers.
509 * \return address of TINT1 service request value.
510 */
511 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray);
512
513 /******************************************************************************/
514 /*-------------------------Global Function Prototypes-------------------------*/
515 /******************************************************************************/
516
517 /** \brief Clears all the error flags.
518 * \param eray pointer to ERAY module registers.
519 * \return None
520 */
521 IFX_EXTERN void IfxEray_clearAllFlags(Ifx_ERAY *eray);
522
523 /** \brief Enables all the Interrupt lines.
524 * \param eray pointer to ERAY module registers.
525 * \return None
526 */
527 IFX_EXTERN void IfxEray_enableInterruptLines(Ifx_ERAY *eray);
528
529 /** \brief Selects between MBSC0 and MBSC1 interrupt destination
530 * \param eray pointer to ERAY module registers.
531 * \param messageBuffer message buffer interrupt which should be configured
532 * \param messageBufferDestination selects MBSC0 or MBSC1 interrupt output
533 * \return None
534 */
535 IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination);
536
537 /** \brief Selects between NDAT0 and NDAT1 interrupt destination
538 * \param eray pointer to ERAY module registers.
539 * \param ndat NDAT interrupt which should be configured
540 * \param ndatDestination selects NDAT0 or NDAT1 interrupt output
541 * \return None
542 */
543 IFX_EXTERN void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination);
544
545 /** \} */
546
547 /** \addtogroup IfxLld_Eray_Std_IO
548 * \{ */
549
550 /******************************************************************************/
551 /*-------------------------Inline Function Prototypes-------------------------*/
552 /******************************************************************************/
553
554 /** \brief Initialises a RX pin.
555 * \param rx the RX Pin which should be configured.
556 * \param rxMode the pin input mode which should be configured.
557 * \return None
558 */
559 IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode);
560
561 /** \brief Initializes a TX Enable output.
562 * \param txEn the TX Enable Pin which should be configured.
563 * \param txEnMode the pin output mode which should be configured.
564 * \param padDriver the pad driver mode which should be configured.
565 * \return None
566 */
567 IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver);
568
569 /** \brief Initializes a TX output.
570 * \param tx the TX Pin which should be configured.
571 * \param txMode the pin output mode which should be configured.
572 * \param padDriver the pad driver mode which should be configured.
573 * \return None
574 */
575 IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver);
576
577 /** \} */
578
579 /** \addtogroup IfxLld_Eray_Std_Module
580 * \{ */
581
582 /******************************************************************************/
583 /*-------------------------Inline Function Prototypes-------------------------*/
584 /******************************************************************************/
585
586 /** \brief Disables the ERAY module.
587 * \param eray pointer to ERAY module registers.
588 * \return None
589 */
590 IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray);
591
592 /** \brief Enables the ERAY module.
593 * \param eray pointer to ERAY module registers.
594 * \return None
595 */
596 IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray);
597
598 /** \brief Returns the module's suspend state.
599 * TRUE :if module is suspended.
600 * FALSE:if module is not yet suspended.
601 * \param eray Pointer to ERAY module registers
602 * \return Suspend status (TRUE / FALSE)
603 */
604 IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray);
605
606 /** \brief Sets the sensitivity of the module to sleep signal
607 * \param eray pointer to ERAY registers
608 * \param mode mode selection (enable/disable)
609 * \return None
610 */
611 IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode);
612
613 /******************************************************************************/
614 /*-------------------------Global Function Prototypes-------------------------*/
615 /******************************************************************************/
616
617 /**
618 * \param eray Resource index of the ERAY
619 * \return ERAY module register address
620 */
621 IFX_EXTERN Ifx_ERAY *IfxEray_getAddress(IfxEray_Index eray);
622
623 /** \brief API to get the resource index of the ERAY specified.
624 * \param eray Pointer to the ERAY HW module (register memory map)
625 * \return Resource index of the ERAY
626 */
627 IFX_EXTERN IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray);
628
629 /** \brief Resets the ERAY kernel.
630 * \param eray pointer to ERAY module registers.
631 * \return None
632 */
633 IFX_EXTERN void IfxEray_resetModule(Ifx_ERAY *eray);
634
635 /** \} */
636
637 /** \addtogroup IfxLld_Eray_Std_Status
638 * \{ */
639
640 /******************************************************************************/
641 /*-------------------------Inline Function Prototypes-------------------------*/
642 /******************************************************************************/
643
644 /** \brief Gets the FIFO status.
645 * \param eray pointer to ERAY module registers.
646 * \return FIFO status.
647 */
648 IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray);
649
650 /** \brief Gets the Input Buffer Host Busy status.
651 * \param eray pointer to ERAY module registers.
652 * \return TRUE if Host is Busy otherwise FALSE.
653 */
654 IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray);
655
656 /** \brief Gets the Input Buffer Shadow status.
657 * \param eray pointer to ERAY module registers.
658 * \return TRUE if busy otherwise FALSE
659 */
660 IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray);
661
662 /** \brief Gets the output buffer index.
663 * \param eray pointer to ERAY module registers.
664 * \return output buffer index.
665 */
666 IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray);
667
668 /** \brief Gets the Output Buffer Shadow status.
669 * \param eray pointer to ERAY module registers.
670 * \return TRUE if busy otherwise FALSE
671 */
672 IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray);
673
674 /** \brief Gets the current POC state.
675 * \param eray pointer to ERAY module registers.
676 * \return current POC state.
677 */
678 IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray);
679
680 /** \brief Gets the received wakeup pattern channel.
681 * \param eray pointer to ERAY module registers.
682 * \return received wakeup pattern channel.
683 */
684 IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray);
685
686 /** \brief Waits until the controller enters required POC state.
687 * \param eray pointer to ERAY module registers.
688 * \param pocState POC state upto which controller waits.
689 * \return None
690 */
691 IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState);
692
693 /******************************************************************************/
694 /*-------------------------Global Function Prototypes-------------------------*/
695 /******************************************************************************/
696
697 /** \brief Changes the Commmunication Controller state.
698 * \param eray pointer to ERAY module registers.
699 * \param pocCommand POC command which triggers the Controller state.
700 * \return TRUE if command accepted otherwise FALSE.
701 */
702 IFX_EXTERN boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand);
703
704 /** \brief Sets the POC state to Ready state.
705 * \param eray pointer to ERAY module registers.
706 * \return None
707 */
708 IFX_EXTERN void IfxEray_setPocReady(Ifx_ERAY *eray);
709
710 /** \} */
711
712 /** \addtogroup IfxLld_Eray_Std_Configuration
713 * \{ */
714
715 /******************************************************************************/
716 /*-------------------------Inline Function Prototypes-------------------------*/
717 /******************************************************************************/
718
719 /** \brief request to receive header section from message buffer.
720 * \param eray pointer to ERAY module registers.
721 * \param headerReceived whether header is received or not.
722 * \return None
723 */
724 IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived);
725
726 /** \brief sets the bit to send header in frame.
727 * \param eray pointer to ERAY module registers.
728 * \param headerTransfered whether header transfered or not.
729 * \return None
730 */
731 IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered);
732
733 /** \brief Sets number of cycle pairs for Active state.
734 * \param eray pointer to ERAY module registers.
735 * \param numberOfCyclePairsForActive number of cycle pairs for Active state.
736 * \return None
737 */
738 IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive);
739
740 /** \brief Sets auto delays between input, output buffers and message RAM
741 * \param eray pointer to ERAY module registers.
742 * \return None
743 */
744 IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray);
745
746 /** \brief Sets baudrate on Flexray bus.
747 * \param eray pointer to ERAY module registers.
748 * \param baudrate baudrate on flexray bus.
749 * \return None
750 */
751 IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate);
752
753 /** \brief Sets secured buffers in message RAM.
754 * \param eray pointer to ERAY module registers.
755 * \param secureValue secure value.
756 * \return None
757 */
758 IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue);
759
760 /** \brief Sets channel A initial offstes.
761 * \param eray pointer to ERAY module registers.
762 * \param channelAMicrotickInitialOffset difference between reference points on channel A in microticks.
763 * \param channelAMacrotickInitialOffset difference between reference points on channel A in macroticks.
764 * \return None
765 */
766 IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset);
767
768 /** \brief Sets channel B initial offstes.
769 * \param eray pointer to ERAY module registers.
770 * \param channelBMicrotickInitialOffset difference between reference points on channel B in microticks.
771 * \param channelBMacrotickInitialOffset difference between reference points on channel B in macroticks.
772 * \return None
773 */
774 IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset);
775
776 /** \brief Sets receive delays on channels.
777 * \param eray pointer to ERAY module registers.
778 * \param channelAReceptionDelay reception delay on channel A.
779 * \param channelBReceptionDelay reception delay on channel B.
780 * \return None
781 */
782 IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay);
783
784 /** \brief Sets clock correction cycles for Passive and Halt.
785 * \param eray pointer to ERAY module registers.
786 * \param clockCorrectionCyclesPassive maximum number of cycles missing clock correction leading for passive state.
787 * \param clockCorrectionCyclesHalt maximum number of cycles missing clock correction leading for halt state.
788 * \return None
789 */
790 IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt);
791
792 /** \brief lead to halt state in clock synch error.
793 * \param eray pointer to ERAY module registers.
794 * \param clockSyncErrorHalt whether to enter halt in clock synch error or not.
795 * \return None
796 */
797 IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt);
798
799 /** \brief Sets cluster drift values.
800 * \param eray pointer to ERAY module registers.
801 * \param clusterDrift cluster drift damping value used in clock synchronization.
802 * \param maxDriftOffset maximum drift offset between two nodes.
803 * \return None
804 */
805 IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset);
806
807 /** \brief Sets cluster startup deviation.
808 * \param eray pointer to ERAY module registers.
809 * \param acceptedStartupDeviation deviation for startup Frames during integration.
810 * \return None
811 */
812 IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation);
813
814 /** \brief Sets CAS symbol window duration.
815 * \param eray pointer to ERAY module registers.
816 * \param collisionAvoidanceDuration accepted duration of CAS symbol.
817 * \return None
818 */
819 IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration);
820
821 /** \brief sets duration of the communication cycle in Macroticks.
822 * \param eray pointer to ERAY module registers.
823 * \param macroticks duration of the communication cycle in Macroticks.
824 * \return None
825 */
826 IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks);
827
828 /** \brief sets duration of the communication cycle in Microticks.
829 * \param eray pointer to ERAY module registers.
830 * \param microticks duration of the communication cycle in Microticks.
831 * \return None
832 */
833 IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks);
834
835 /** \brief Sets decoding correction value.
836 * \param eray pointer to ERAY module registers.
837 * \param decodingCorrection decoding correction value.
838 * \return None
839 */
840 IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection);
841
842 /** \brief Sets dynamic slots count and length.
843 * \param eray pointer to ERAY module registers.
844 * \param dynamicSlotLength duration of dynamic slot in macroticks.
845 * \param dynamicSlotCount number of dynamic slots in a communication cycle.
846 * \param idleDynamicSlots duration of dynamic slot idle phase.
847 * \return None
848 */
849 IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots);
850
851 /** \brief Sets external correction controls.
852 * \param eray pointer to ERAY module registers.
853 * \param externalOffset External offset correction control.
854 * \param externalRate External rate correction control.
855 * \return None
856 */
857 IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate);
858
859 /** \brief Sets external correction values.
860 * \param eray pointer to ERAY module registers.
861 * \param externalOffsetCorrection external clock offset correction value.
862 * \param externalRateCorrection external clock rate correction value.
863 * \return None
864 */
865 IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection);
866
867 /** \brief Sets FIFO buffer start idex.
868 * \param eray pointer to ERAY module registers.
869 * \param fifoBufferStartIndex FIFO buffer start idex.
870 * \return None
871 */
872 IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex);
873
874 /** \brief Sets FIFO filter configurations.
875 * \param eray pointer to ERAY module registers.
876 * \param rejectedFrameId rejected frameId by FIFO.
877 * \param filteredCycleNumber filtered cycle number.
878 * \param fifoNullFramesRejected null frames rejection selection.
879 * \param frameIdFilter filtered frameid by FIFO.
880 * \return None
881 */
882 IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter);
883
884 /** \brief Sets FIFO configurations.
885 * \param eray pointer to ERAY module registers.
886 * \param receiveChannel FIFO receive channel.
887 * \param staticFifoDisabled static FIFO selection.
888 * \param fifoDepth FIFO depth.
889 * \return None
890 */
891 IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth);
892
893 /** \brief Sets first dynamic buffer.
894 * \param eray pointer to ERAY module registers.
895 * \param firstDynamicBuffer first dynamic buffer.
896 * \return None
897 */
898 IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer);
899
900 /** \brief Sets startup or wakeup listen timeouts.
901 * \param eray pointer to ERAY module registers.
902 * \param listenTimeOut wakeup or startup listen timeout in microticks.
903 * \param listenTimeOutNoise upper limit for startup or wakeup listen timeout in presence of noise.
904 * \return None
905 */
906 IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise);
907
908 /** \brief Sets the maximum cold start attempts for active state.
909 * \param eray pointer to ERAY module registers.
910 * \param maxColdStartAttempts maximum number of attempts that a cold start node allows.
911 * \return None
912 */
913 IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts);
914
915 /** \brief Sets max limit correction values.
916 * \param eray pointer to ERAY module registers.
917 * \param maxOffsetCorrection maximum offset correction.
918 * \param maxRateCorrection maximum rate correction.
919 * \return None
920 */
921 IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection);
922
923 /** \brief Sets maximum synch frames in a cluster.
924 * \param eray pointer to ERAY module registers.
925 * \param maxSyncFrames maximum synch frames in a cluster.
926 * \return None
927 */
928 IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames);
929
930 /** \brief Sets number of message buffers.
931 * \param eray pointer to ERAY module registers.
932 * \param numberOfMessageBuffers number of message buffers.
933 * \return None
934 */
935 IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers);
936
937 /** \brief Sets Message Handler configurations.
938 * \param eray pointer to ERAY module registers.
939 * \param staticFramepayload payload length of static frames in double bytes.
940 * \param latestTransmissionStart dynamic slots befor transmission of inhibit frame in dynamic segment.
941 * \return None
942 */
943 IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart);
944
945 /** \brief Sets network start Idle time.
946 * \param eray pointer to ERAY module registers.
947 * \param networkStartIdleTime starting point of Network Idle Time Phase.
948 * \return None
949 */
950 IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime);
951
952 /** \brief Sets network management vector length.
953 * \param eray pointer to ERAY module registers.
954 * \param networkVectorLength length of network management vector.
955 * \return None
956 */
957 IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength);
958
959 /** \brief Sets channels connected to node.
960 * \param eray pointer to ERAY module registers.
961 * \param channelAConnectedNode whether node connected to channel A or not.
962 * \param channelBConnectedNode whether node connected to channel B or not.
963 * \return None
964 */
965 IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode);
966
967 /** \brief Sets offset correction starting point.
968 * \param eray pointer to ERAY module registers.
969 * \param correctionOffset offset correction start point.
970 * \return None
971 */
972 IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset);
973
974 /** \brief requests to receive the frame.
975 * \param eray pointer to ERAY module registers.
976 * \param receiveRequested whether frame to be received or not.
977 * \return None
978 */
979 IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested);
980
981 /** \brief Sets receive wakeup times.
982 * \param eray pointer to ERAY module registers.
983 * \param receiveWakeupTestDuration duration of receive wakeup pattern.
984 * \param receiveWakeupIdleTime duration of receive wakeup idle time.
985 * \param receiveWakeupLowTime duration of receive wakeup low time.
986 * \return None
987 */
988 IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime);
989
990 /** \brief sets buffer number in which frame is received.
991 * \param eray pointer to ERAY module registers.
992 * \param bufferIndex buffer number in which frame is received.
993 * \return None
994 */
995 IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex);
996
997 /** \brief Sets slots action points.
998 * \param eray pointer to ERAY module registers.
999 * \param staticActionPoint static slots and symbol window action point.
1000 * \param dynamicActionPoint dynamic slots action point.
1001 * \return None
1002 */
1003 IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint);
1004
1005 /** \brief Sets static slots count and length.
1006 * \param eray pointer to ERAY module registers.
1007 * \param staticSlotLength duration of static slot in macroticks.
1008 * \param staticSlotsCount number of static slots in a communication cycle.
1009 * \return None
1010 */
1011 IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount);
1012
1013 /** \brief Sets sample point for strobing.
1014 * \param eray pointer to ERAY module registers.
1015 * \param strobePosition strobing sample count.
1016 * \return None
1017 */
1018 IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition);
1019
1020 /** \brief Sets channels which transmits symbols.
1021 * \param eray pointer to ERAY module registers.
1022 * \param channelASymbolTransmitted whether symbol is transmitted in Channel A or not.
1023 * \param channelBSymbolTransmitted whether symbol is transmitted in Channel B or not.
1024 * \return None
1025 */
1026 IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted);
1027
1028 /** \brief Sets the transmit slot mode.
1029 * \param eray pointer to ERAY module registers.
1030 * \param transmissionSlotMode transmission slot mode.
1031 * \return None
1032 */
1033 IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode);
1034
1035 /** \brief Sets transmission start time duration.
1036 * \param eray pointer to ERAY module registers.
1037 * \param transmissionStartTime transmission start time.
1038 * \return None
1039 */
1040 IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime);
1041
1042 /** \brief Sets transfer request to send frame.
1043 * \param eray pointer to ERAY module registers.
1044 * \param transferRequested whether transfer requested or not.
1045 * \return None
1046 */
1047 IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested);
1048
1049 /** \brief Sets transmit wakeup times.
1050 * \param eray pointer to ERAY module registers.
1051 * \param transmitWakeupRepetitions transmission wakeup repetitions.
1052 * \param transmitWakeupIdleTime duration of transmit wakeup idle time.
1053 * \param transmitWakeupLowTime duration of transmit wakeup low time.
1054 * \return None
1055 */
1056 IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime);
1057
1058 /** \brief Configures transmitted frames for startup and synchronization.
1059 * \param eray pointer to ERAY module registers.
1060 * \param startupFrameTransmitted whether startup Frame transmitted or not.
1061 * \param synchFrameTransmitted whether synch Frame transmitted or not.
1062 * \return None
1063 */
1064 IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted);
1065
1066 /** \brief Sets the transmit buffer number.
1067 * \param eray pointer to ERAY module registers.
1068 * \param bufferIndex buffer number in which frame is sent.
1069 * \return None
1070 */
1071 IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex);
1072
1073 /** \brief Swaps the shadow and Host output registers.
1074 * \param eray pointer to ERAY module registers.
1075 * \param swapRequested whether swap is requested or not.
1076 * \return None
1077 */
1078 IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested);
1079
1080 /** \brief Sets the cluster wakeup channel.
1081 * \param eray pointer to ERAY module registers.
1082 * \param wakeupPatternChannel cluster wakeup pattern channel.
1083 * \return None
1084 */
1085 IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel);
1086
1087 /** \} */
1088
1089 /** \addtogroup IfxLld_Eray_Std_Operative
1090 * \{ */
1091
1092 /******************************************************************************/
1093 /*-------------------------Inline Function Prototypes-------------------------*/
1094 /******************************************************************************/
1095
1096 /** \brief requests to receive data from message buffer.
1097 * \param eray pointer to ERAY module registers.
1098 * \param dataReceived whether data to be received or not.
1099 * \return None
1100 */
1101 IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived);
1102
1103 /** \brief sets the bit to send data in frame.
1104 * \param eray pointer to ERAY module registers.
1105 * \param dataTransfered whether data transfered or not.
1106 * \return None
1107 */
1108 IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered);
1109
1110 /******************************************************************************/
1111 /*-------------------------Global Function Prototypes-------------------------*/
1112 /******************************************************************************/
1113
1114 /** \brief Calculate and returns the CRC for frame.
1115 * \param payloadLength payload length configured for frame.
1116 * \param frameId slot id
1117 * \param startupFrameIndicator whether startup frame is indicated or not.
1118 * \param syncFrameIndicator whether sync frame is indicated or not.
1119 * \return calculated CRC value.
1120 */
1121 IFX_EXTERN uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator);
1122
1123 /** \brief Reads the received data from output registers.
1124 * \param eray pointer to ERAY module registers.
1125 * \param data pointer to received data buffer.
1126 * \param payloadLength payload length received in a frame.
1127 * \return None
1128 */
1129 IFX_EXTERN void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength);
1130
1131 /** \brief Reads header and data from output buffers.
1132 * \param eray pointer to ERAY module registers.
1133 * \param header header received in a frame.
1134 * \param data data received in a frame.
1135 * \param maxPayloadLength maximum payload length received in a frame.
1136 * \return None
1137 */
1138 IFX_EXTERN void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength);
1139
1140 /** \brief Writes header and data to Input buffers and set the slots.
1141 * \param eray pointer to ERAY module registers.
1142 * \param header Header section of message buffer.
1143 * \param data data section of message buffer.
1144 * \param slotConfig pointer slot allocation configuration structure.
1145 * \return None
1146 */
1147 IFX_EXTERN void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig);
1148
1149 /** \brief Writes data section of a frame to input data registers.
1150 * \param eray pointer to ERAY module registers.
1151 * \param data data segment in a frame.
1152 * \param payloadLength payload length configured for slot buffer.
1153 * \return None
1154 */
1155 IFX_EXTERN void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength);
1156
1157 /** \} */
1158
1159 /******************************************************************************/
1160 /*-------------------------Inline Function Prototypes-------------------------*/
1161 /******************************************************************************/
1162
1163 /** \brief Gets the FIFO index.
1164 * \param eray pointer to ERAY module registers.
1165 * \return FIFO buffer index.
1166 */
1167 IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray);
1168
1169 /** \brief Configure the Module to Hard/Soft suspend mode.
1170 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1171 * \param eray Pointer to ERAY module registers
1172 * \param mode Module suspend mode
1173 * \return None
1174 */
1175 IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode);
1176
1177 /** \brief Provides functionality for both setting of pin direction as input and configuring pad driver.
1178 * \param rx the RX Pin which should be configured.
1179 * \param rxMode the pin input mode which should be configured.
1180 * \param padDriver Pad Driver Configuration
1181 * \return None
1182 */
1183 IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver);
1184
1185 /******************************************************************************/
1186 /*---------------------Inline Function Implementations------------------------*/
1187 /******************************************************************************/
1188
1189 IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
1190 {
1191 eray->EIR.U = errorFlag;
1192 }
1193
1194
1195 IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
1196 {
1197 eray->SIR.U = statusFlag;
1198 }
1199
1200
1201 IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray)
1202 {
1203 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1204 IfxScuWdt_clearCpuEndinit(passwd);
1205 //disable the module
1206 eray->CLC.B.DISR = 1;
1207 IfxScuWdt_setCpuEndinit(passwd);
1208 }
1209
1210
1211 IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
1212 {
1213 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1214 IfxScuWdt_clearCpuEndinit(passwd);
1215 // Run Mode Clock divider to 1
1216 //enable the module
1217 eray->CLC.U = 0x00000100;
1218
1219 // ensure that write access finished before leaving this function
1220 if (eray->CLC.U)
1221 {}
1222
1223 IfxScuWdt_setCpuEndinit(passwd);
1224 }
1225
1226
1227 IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
1228 {
1229 Ifx_ERAY_EIR interruptFlags;
1230 interruptFlags.U = eray->EIR.U;
1231 return interruptFlags;
1232 }
1233
1234
1235 IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
1236 {
1237 return eray->MRC.B.FFB;
1238 }
1239
1240
1241 IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
1242 {
1243 Ifx_ERAY_FSR fifoStatus;
1244 fifoStatus.U = eray->FSR.U;
1245 return fifoStatus;
1246 }
1247
1248
1249 IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
1250 {
1251 return (eray->IBCR.B.IBSYH == 1) ? TRUE : FALSE;
1252 }
1253
1254
1255 IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
1256 {
1257 return (eray->IBCR.B.IBSYS == 1) ? TRUE : FALSE;
1258 }
1259
1260
1261 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
1262 {
1263 IFX_UNUSED_PARAMETER(eray);
1264 return &MODULE_SRC.ERAY.ERAY[0].IBUSY;
1265 }
1266
1267
1268 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
1269 {
1270 IFX_UNUSED_PARAMETER(eray);
1271 return &MODULE_SRC.ERAY.ERAY[0].INT[0];
1272 }
1273
1274
1275 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
1276 {
1277 IFX_UNUSED_PARAMETER(eray);
1278 return &MODULE_SRC.ERAY.ERAY[0].INT[1];
1279 }
1280
1281
1282 IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
1283 {
1284 uint8 ix = messageBuffer / 32;
1285 uint32 mask = 1 << (messageBuffer % 32);
1286 Ifx_ERAY_MBSC1 *mbscSFR = (Ifx_ERAY_MBSC1 *)((uint32)&eray->MBSC1 + 4 * ix);
1287 boolean messageBufferInterrupt = (mbscSFR->U & mask) ? TRUE : FALSE;
1288
1289 return messageBufferInterrupt;
1290 }
1291
1292
1293 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
1294 {
1295 IFX_UNUSED_PARAMETER(eray);
1296 return &MODULE_SRC.ERAY.ERAY[0].MBSC[0];
1297 }
1298
1299
1300 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
1301 {
1302 IFX_UNUSED_PARAMETER(eray);
1303 return &MODULE_SRC.ERAY.ERAY[0].MBSC[1];
1304 }
1305
1306
1307 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
1308 {
1309 IFX_UNUSED_PARAMETER(eray);
1310 return &MODULE_SRC.ERAY.ERAY[0].NDAT[0];
1311 }
1312
1313
1314 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
1315 {
1316 IFX_UNUSED_PARAMETER(eray);
1317 return &MODULE_SRC.ERAY.ERAY[0].NDAT[1];
1318 }
1319
1320
1321 IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
1322 {
1323 uint8 ix = ndat / 32;
1324 uint32 mask = 1 << (ndat % 32);
1325 Ifx_ERAY_NDAT1 *ndatSFR = (Ifx_ERAY_NDAT1 *)((uint32)&eray->NDAT1 + 4 * ix);
1326 boolean ndatInterrupt = (ndatSFR->U & mask) ? TRUE : FALSE;
1327
1328 return ndatInterrupt;
1329 }
1330
1331
1332 IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
1333 {
1334 return eray->OBCR.B.OBRH;
1335 }
1336
1337
1338 IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
1339 {
1340 return (eray->OBCR.B.OBSYS == 1) ? TRUE : FALSE;
1341 }
1342
1343
1344 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
1345 {
1346 IFX_UNUSED_PARAMETER(eray);
1347 return &MODULE_SRC.ERAY.ERAY[0].OBUSY;
1348 }
1349
1350
1351 IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
1352 {
1353 return (IfxEray_PocState)eray->CCSV.B.POCS;
1354 }
1355
1356
1357 IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
1358 {
1359 Ifx_ERAY_SIR interruptFlags;
1360 interruptFlags.U = eray->SIR.U;
1361 return interruptFlags;
1362 }
1363
1364
1365 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
1366 {
1367 IFX_UNUSED_PARAMETER(eray);
1368 return &MODULE_SRC.ERAY.ERAY[0].TINT[0];
1369 }
1370
1371
1372 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
1373 {
1374 IFX_UNUSED_PARAMETER(eray);
1375 return &MODULE_SRC.ERAY.ERAY[0].TINT[1];
1376 }
1377
1378
1379 IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
1380 {
1381 IfxEray_WakeupChannel wakeupChannel = IfxEray_WakeupChannel_a;
1382
1383 if (eray->SIR.B.WUPA == 1)
1384 {
1385 wakeupChannel = IfxEray_WakeupChannel_a;
1386 }
1387 else if (eray->SIR.B.WUPB == 1)
1388 {
1389 wakeupChannel = IfxEray_WakeupChannel_b;
1390 }
1391
1392 return wakeupChannel;
1393 }
1394
1395
1396 IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
1397 {
1398 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, rxMode);
1399
1400 if (rx->nodeId == IfxEray_NodeId_a)
1401 {
1402 rx->module->CUST1.B.RISA = rx->select;
1403 }
1404 else
1405 {
1406 rx->module->CUST1.B.RISB = rx->select;
1407 }
1408 }
1409
1410
1411 IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
1412 {
1413 IfxPort_setPinModeOutput(txEn->pin.port, txEn->pin.pinIndex, txEnMode, txEn->select);
1414 IfxPort_setPinPadDriver(txEn->pin.port, txEn->pin.pinIndex, padDriver);
1415 }
1416
1417
1418 IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
1419 {
1420 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, txMode, tx->select);
1421 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
1422 }
1423
1424
1425 IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray)
1426 {
1427 Ifx_ERAY_OCS ocs;
1428
1429 // read the status
1430 ocs.U = eray->OCS.U;
1431
1432 // return the status
1433 return ocs.B.SUSSTA;
1434 }
1435
1436
1437 IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
1438 {
1439 eray->OBCM.B.RDSS = dataReceived;
1440 }
1441
1442
1443 IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
1444 {
1445 eray->OBCM.B.RHSS = headerReceived;
1446 }
1447
1448
1449 IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
1450 {
1451 eray->IBCM.B.LDSH = dataTransfered;
1452 }
1453
1454
1455 IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
1456 {
1457 eray->IBCM.B.LHSH = headerTransfered;
1458 }
1459
1460
1461 IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
1462 {
1463 eray->SUCC1.B.PTA = numberOfCyclePairsForActive;
1464 }
1465
1466
1467 IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
1468 {
1469 eray->CUST1.B.IEN = 1;
1470 eray->CUST1.B.OEN = 1;
1471 eray->CUST3.U = 0xFFFFFFFF;
1472 }
1473
1474
1475 IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
1476 {
1477 eray->PRTC1.B.BRP = baudrate;
1478 }
1479
1480
1481 IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
1482 {
1483 eray->MRC.B.SEC = secureValue;
1484 }
1485
1486
1487 IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
1488 {
1489 eray->GTUC03.B.UIOA = channelAMicrotickInitialOffset;
1490 eray->GTUC03.B.MIOA = channelAMacrotickInitialOffset;
1491 }
1492
1493
1494 IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
1495 {
1496 eray->GTUC03.B.UIOB = channelBMicrotickInitialOffset;
1497 eray->GTUC03.B.MIOB = channelBMacrotickInitialOffset;
1498 }
1499
1500
1501 IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
1502 {
1503 eray->GTUC05.B.DCA = channelAReceptionDelay;
1504 eray->GTUC05.B.DCB = channelBReceptionDelay;
1505 }
1506
1507
1508 IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
1509 {
1510 Ifx_ERAY_SUCC3 succ3;
1511 succ3.U = 0;
1512 succ3.B.WCP = clockCorrectionCyclesPassive;
1513 succ3.B.WCF = clockCorrectionCyclesHalt;
1514 eray->SUCC3.U = succ3.U;
1515 }
1516
1517
1518 IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
1519 {
1520 eray->SUCC1.B.HCSE = clockSyncErrorHalt;
1521 }
1522
1523
1524 IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
1525 {
1526 eray->GTUC05.B.CDD = clusterDrift;
1527 eray->GTUC06.B.MOD = maxDriftOffset;
1528 }
1529
1530
1531 IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
1532 {
1533 eray->GTUC06.B.ASR = acceptedStartupDeviation;
1534 }
1535
1536
1537 IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
1538 {
1539 eray->PRTC1.B.CASM = collisionAvoidanceDuration;
1540 }
1541
1542
1543 IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
1544 {
1545 eray->GTUC02.B.MPC = macroticks;
1546 }
1547
1548
1549 IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
1550 {
1551 eray->GTUC01.U = microticks;
1552 }
1553
1554
1555 IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
1556 {
1557 eray->GTUC05.B.DEC = decodingCorrection;
1558 }
1559
1560
1561 IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
1562 {
1563 eray->GTUC08.B.MSL = dynamicSlotLength;
1564 eray->GTUC08.B.NMS = dynamicSlotCount;
1565 eray->GTUC09.B.DSI = idleDynamicSlots;
1566 }
1567
1568
1569 IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
1570 {
1571 eray->GTUC11.B.EOCC = externalOffset;
1572 eray->GTUC11.B.ERCC = externalRate;
1573 }
1574
1575
1576 IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
1577 {
1578 eray->GTUC11.B.EOC = externalOffsetCorrection;
1579 eray->GTUC11.B.ERC = externalRateCorrection;
1580 }
1581
1582
1583 IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
1584 {
1585 // Buffers from MRC.B.FFB to MRC.B.LCB are assigned FIFO
1586 eray->MRC.B.FFB = fifoBufferStartIndex;
1587 }
1588
1589
1590 IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
1591 {
1592 eray->FRF.B.FID = rejectedFrameId;
1593 eray->FRF.B.CYF = filteredCycleNumber;
1594 eray->FRF.B.RNF = fifoNullFramesRejected;
1595 eray->FRFM.B.MFID = frameIdFilter;
1596 }
1597
1598
1599 IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
1600 {
1601 eray->FRF.B.CH = receiveChannel;
1602 eray->FRF.B.RSS = staticFifoDisabled;
1603 eray->FCL.U = fifoDepth;
1604 }
1605
1606
1607 IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
1608 {
1609 // 0: No static bufers, 0x01...0x7F: 0 to (MRC.B.FDB - 1) are static buffers, 0x80...0xFF:No dynamic buffers
1610 eray->MRC.B.FDB = firstDynamicBuffer;
1611 }
1612
1613
1614 IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
1615 {
1616 Ifx_ERAY_SUCC2 succ2;
1617 succ2.U = 0;
1618 succ2.B.LT = listenTimeOut;
1619 succ2.B.LTN = listenTimeOutNoise;
1620 eray->SUCC2.U = succ2.U;
1621 }
1622
1623
1624 IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
1625 {
1626 eray->SUCC1.B.CSA = maxColdStartAttempts;
1627 }
1628
1629
1630 IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
1631 {
1632 eray->GTUC10.B.MOC = maxOffsetCorrection;
1633 eray->GTUC10.B.MRC = maxRateCorrection;
1634 }
1635
1636
1637 IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
1638 {
1639 eray->GTUC02.B.SNM = maxSyncFrames;
1640 }
1641
1642
1643 IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
1644 {
1645 eray->MRC.B.LCB = numberOfMessageBuffers - 1;
1646 }
1647
1648
1649 IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
1650 {
1651 Ifx_ERAY_MHDC mhdc;
1652 mhdc.U = 0;
1653 mhdc.B.SFDL = staticFramepayload;
1654 mhdc.B.SLT = latestTransmissionStart;
1655 eray->MHDC.U = mhdc.U;
1656 }
1657
1658
1659 IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
1660 {
1661 eray->GTUC04.B.NIT = networkStartIdleTime;
1662 }
1663
1664
1665 IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
1666 {
1667 eray->NEMC.U = networkVectorLength;
1668 }
1669
1670
1671 IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
1672 {
1673 eray->SUCC1.B.CCHA = channelAConnectedNode;
1674 eray->SUCC1.B.CCHB = channelBConnectedNode;
1675 }
1676
1677
1678 IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
1679 {
1680 eray->GTUC04.B.OCS = correctionOffset;
1681 }
1682
1683
1684 IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
1685 {
1686 eray->OBCR.B.REQ = receiveRequested;
1687 }
1688
1689
1690 IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
1691 {
1692 eray->PRTC1.B.RXW = receiveWakeupTestDuration;
1693 eray->PRTC2.B.RXI = receiveWakeupIdleTime;
1694 eray->PRTC2.B.RXL = receiveWakeupLowTime;
1695 }
1696
1697
1698 IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
1699 {
1700 eray->OBCR.B.OBRS = bufferIndex;
1701 }
1702
1703
1704 IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode)
1705 {
1706 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1707 IfxScuWdt_clearCpuEndinit(passwd);
1708 eray->CLC.B.EDIS = mode;
1709 IfxScuWdt_setCpuEndinit(passwd);
1710 }
1711
1712
1713 IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
1714 {
1715 eray->GTUC09.B.MAPO = dynamicActionPoint;
1716 eray->GTUC09.B.APO = staticActionPoint;
1717 }
1718
1719
1720 IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
1721 {
1722 eray->GTUC07.B.SSL = staticSlotLength;
1723 eray->GTUC07.B.NSS = staticSlotsCount;
1724 }
1725
1726
1727 IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
1728 {
1729 eray->PRTC1.B.SPP = strobePosition;
1730 }
1731
1732
1733 IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode)
1734 {
1735 Ifx_ERAY_OCS ocs;
1736
1737 // remove protection and configure the suspend mode.
1738 ocs.B.SUS_P = 1;
1739 ocs.B.SUS = mode;
1740 eray->OCS.U = ocs.U;
1741 }
1742
1743
1744 IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
1745 {
1746 eray->SUCC1.B.MTSA = channelASymbolTransmitted;
1747 eray->SUCC1.B.MTSB = channelBSymbolTransmitted;
1748 }
1749
1750
1751 IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
1752 {
1753 eray->SUCC1.B.TSM = transmissionSlotMode;
1754 }
1755
1756
1757 IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
1758 {
1759 eray->PRTC1.B.TSST = transmissionStartTime;
1760 }
1761
1762
1763 IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
1764 {
1765 eray->IBCM.B.STXRH = transferRequested;
1766 }
1767
1768
1769 IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
1770 {
1771 eray->PRTC1.B.RWP = transmitWakeupRepetitions;
1772 eray->PRTC2.B.TXI = transmitWakeupIdleTime;
1773 eray->PRTC2.B.TXL = transmitWakeupLowTime;
1774 }
1775
1776
1777 IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
1778 {
1779 eray->SUCC1.B.TXST = startupFrameTransmitted;
1780 eray->SUCC1.B.TXSY = synchFrameTransmitted;
1781 }
1782
1783
1784 IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
1785 {
1786 eray->IBCR.B.IBRH = bufferIndex;
1787 }
1788
1789
1790 IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
1791 {
1792 eray->OBCR.B.VIEW = swapRequested;
1793 }
1794
1795
1796 IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
1797 {
1798 eray->SUCC1.B.WUCS = wakeupPatternChannel;
1799 }
1800
1801
1802 IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
1803 {
1804 while (eray->CCSV.B.POCS != (uint8)pocState)
1805 {}
1806 }
1807
1808
1809 IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
1810 {
1811 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, rxMode);
1812 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
1813
1814 if (rx->nodeId == IfxEray_NodeId_a)
1815 {
1816 rx->module->CUST1.B.RISA = rx->select;
1817 }
1818 else
1819 {
1820 rx->module->CUST1.B.RISB = rx->select;
1821 }
1822 }
1823
1824
1825 #endif /* IFXERAY_H */
IfxEray_ExternalOffsetCorrection_2
external clock offset correction value 2
Definition: IfxEray.h:164
IfxEray_isModuleSuspended
IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxEray.h:1425
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:396
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:48
IfxEray_WakeupChannel
IfxEray_WakeupChannel
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
Definition: IfxEray.h:348
IfxEray_setCollisionAvoidanceDuration
IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration.
Definition: IfxEray.h:1537
IfxEray_setSlot
IFX_EXTERN void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:278
IfxEray_ReceiveChannel_a
channel B for reception
Definition: IfxEray.h:299
IfxEray_getOutputBuffer
IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
Gets the output buffer index.
Definition: IfxEray.h:1332
IfxEray_MaxSynchFrames_7
Maximum number of sync frames in a cluster are 7.
Definition: IfxEray.h:234
IfxEray_PocCommand_run
command to controller to enter RUN
Definition: IfxEray.h:253
IfxEray_Header::bufferDirection
IfxEray_BufferDirection bufferDirection
selects buffer as a transmit buffer or as a receive buffer.
Definition: IfxEray.h:370
IfxEray_ListenTimeOutNoise_12
listen Time-out noise 12
Definition: IfxEray.h:218
IfxEray_BufferDirection_receive
buffer is configured as receive buffer
Definition: IfxEray.h:73
IfxEray_Baudrate_10
baudrate is 10MBits/Sec
Definition: IfxEray.h:64
IfxEray_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEray_PinMap.h:43
IfxEray_calcHeaderCrc
IFX_EXTERN uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
Calculate and returns the CRC for frame.
Definition: IfxEray.c:35
IfxEray_setPocReady
IFX_EXTERN void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:265
IfxEray_ReceivedHeader::syncFrame
uint8 syncFrame
0 : received frame is not a synch frame ; 1 : receive frame is a synch frame.
Definition: IfxEray.h:388
IfxEray_initRxPinWithPadLevel
IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver...
Definition: IfxEray.h:1809
IfxEray_PocCommand_notAccepted
command not accepted.
Definition: IfxEray.h:249
IfxEray_TransmissionSlotMode_single
transmission in key slot.
Definition: IfxEray.h:343
IfxEray_BufferDirection_transmit
buffer is configured as transmit buffer
Definition: IfxEray.h:74
IfxEray_PocState_join
controller entered join state.
Definition: IfxEray.h:284
IfxEray_setStaticSlots
IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length.
Definition: IfxEray.h:1720
IfxEray_SuspendMode_none
No suspend.
Definition: IfxEray.h:325
IfxEray_PocCommand_halt
command to controller to enter HALT
Definition: IfxEray.h:255
IfxEray_setNewDataInterruptDestination
IFX_EXTERN void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_initTxEnPin
IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output.
Definition: IfxEray.h:1411
IfxEray_ClearStatusFlag_txi
transmit service request bit.
Definition: IfxEray.h:116
IfxEray_ListenTimeOutNoise_11
listen Time-out noise 11
Definition: IfxEray.h:217
IfxEray_receiveData
IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer.
Definition: IfxEray.h:1437
IfxEray_setBufferReconfigSecure
IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM.
Definition: IfxEray.h:1481
IfxEray_ClockDivider_none
no clock signal
Definition: IfxEray.h:139
IfxEray_ReceiveChannel
IfxEray_ReceiveChannel
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
Definition: IfxEray.h:295
IfxEray_waitForPocState
IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state.
Definition: IfxEray.h:1802
IfxEray_PocState
IfxEray_PocState
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
Definition: IfxEray.h:266
IfxEray_setOffsetCorrection
IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point.
Definition: IfxEray.h:1678
IfxEray_ReceiveChannel_b
channel A for reception
Definition: IfxEray.h:298
IfxEray_ClearStatusFlag
IfxEray_ClearStatusFlag
Selection of status flag to clear defined in MODULE_ERAY.SIR.U.
Definition: IfxEray.h:111
IfxEray_ClearErrorFlag_pemc
POC error mode change bit.
Definition: IfxEray.h:89
IfxEray_ListenTimeOutNoise_8
listen Time-out noise 8
Definition: IfxEray.h:214
IfxEray_PocState_startupSucced
controller entered startup succeed state.
Definition: IfxEray.h:290
IfxEray_setBaudrate
IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus.
Definition: IfxEray.h:1475
IfxEray_TransmissionMode_singleShot
single transmission mode
Definition: IfxEray.h:335
IfxEray_ExternalOffset_noCorrection
No external correction control.
Definition: IfxEray.h:153
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:382
IfxEray_setClusterStartupDeviation
IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation.
Definition: IfxEray.h:1531
IfxEray_setWakeupPatternChannel
IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel.
Definition: IfxEray.h:1796
IfxEray_SleepMode
IfxEray_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_ERAY.CLC.B.EDIS.
Definition: IfxEray.h:306
IfxEray_Header::transmissionMode
IfxEray_TransmissionMode transmissionMode
transmission mode of Header.
Definition: IfxEray.h:372
IfxEray_setTxBufferNumber
IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number.
Definition: IfxEray.h:1784
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:57
IfxEray_ExternalRateCorrection_1
external clock rate correction value 1
Definition: IfxEray.h:186
IfxEray_ExternalRateCorrection_2
external clock rate correction value 2
Definition: IfxEray.h:187
IfxEray_ClearErrorFlag_ccf
clock correction failure event.
Definition: IfxEray.h:93
IfxEray_Header::transmitPayloadIndicatior
boolean transmitPayloadIndicatior
weather payload indicator is set or not.
Definition: IfxEray.h:371
IfxEray_getNewDataInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the NDAT0 service request.
Definition: IfxEray.h:1307
IfxEray_getIndex
IFX_EXTERN IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
API to get the resource index of the ERAY specified.
Definition: IfxEray.c:151
IfxEray_SlotConfig::dataTransfered
boolean dataTransfered
whether data is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:399
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxEray_getMessageBufferInterruptStatus
IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status.
Definition: IfxEray.h:1282
IfxEray_ClearStatusFlag_ti0
timer0 service request bit.
Definition: IfxEray.h:121
IfxEray_setActiveCyclePairs
IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state.
Definition: IfxEray.h:1461
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEray_ListenTimeOutNoise_9
listen Time-out noise 9
Definition: IfxEray.h:215
IfxEray_ReceivedHeader::payloadPreambleIndicator
uint8 payloadPreambleIndicator
1 : received payload segment has network management and message id or not; 0 : It hasn&#39;t...
Definition: IfxEray.h:391
IfxEray_WakeupChannel_a
send wakeup channel pattern on channel A
Definition: IfxEray.h:350
IfxEray_ClearStatusFlag_cycs
cycle start service bit.
Definition: IfxEray.h:115
IfxEray_ExternalOffsetCorrection
IfxEray_ExternalOffsetCorrection
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
Definition: IfxEray.h:160
IfxEray_ClearStatusFlag_tobc
transfer output buffer completion request bit.
Definition: IfxEray.h:124
IfxEray_ReceiveChannel_none
none channels for reception
Definition: IfxEray.h:300
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxEray_PocCommand_clearRam
command to controller to enter CLEAR_RAM
Definition: IfxEray.h:261
IfxEray_ExternalRate_correctionSubtracted
External rate correction subtracted from calculated correction.
Definition: IfxEray.h:177
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxEray_Baudrate_5
baudrate is 5MBits/Sec
Definition: IfxEray.h:65
IfxEray_PocState_collisionResolution
controller entered collission-resolution state.
Definition: IfxEray.h:281
IfxEray_ExternalOffset_correctionAdded
External offset correction added to calculated correction.
Definition: IfxEray.h:155
IfxEray_ExternalRate
IfxEray_ExternalRate
External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
Definition: IfxEray.h:174
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxEray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
Gets the status interrupt flags.
Definition: IfxEray.h:1357
IfxEray_receiveHeader
IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer.
Definition: IfxEray.h:1443
IfxEray_TransmissionMode
IfxEray_TransmissionMode
Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.
Definition: IfxEray.h:332
IfxEray_ListenTimeOutNoise
IfxEray_ListenTimeOutNoise
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
Definition: IfxEray.h:206
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1249
IfxEray_MaxSynchFrames_2
Maximum number of sync frames in a cluster are 2.
Definition: IfxEray.h:229
IfxEray_Txen_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEray_PinMap.h:62
IfxEray_setTransmissionStartTime
IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration.
Definition: IfxEray.h:1757
IfxSrc.h
SRC basic functionality.
IfxEray_ClearErrorFlag_mhf
message handler constraint flag.
Definition: IfxEray.h:100
IfxEray_setExternalCorrectionControl
IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls.
Definition: IfxEray.h:1569
IfxEray_MaxSynchFrames_8
Maximum number of sync frames in a cluster are 8.
Definition: IfxEray.h:235
IfxEray_MaxSynchFrames_11
Maximum number of sync frames in a cluster are 11.
Definition: IfxEray.h:238
IfxEray_setTransmitRequest
IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame.
Definition: IfxEray.h:1763
IfxEray_getTimerInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the TINT0 service request.
Definition: IfxEray.h:1365
IfxEray_ClearErrorFlag_taba
transmission across channel A boundary flag.
Definition: IfxEray.h:103
IfxEray_ListenTimeOutNoise_15
listen Time-out noise 15
Definition: IfxEray.h:221
IfxEray_ClearErrorFlag_sfo
sync frame overflow event bit
Definition: IfxEray.h:92
IfxEray_setMessageHandlerConfigurations
IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations.
Definition: IfxEray.h:1649
IfxEray_Header::dataPointer
uint16 dataPointer
pointer to the data section of message buffer in RAM.
Definition: IfxEray.h:375
IfxEray_Header::startupFrameIndicator
boolean startupFrameIndicator
whether startup frame is indicated or not.
Definition: IfxEray.h:376
IfxEray_ExternalOffsetCorrection_4
external clock offset correction value 4
Definition: IfxEray.h:166
IfxEray_ExternalOffsetCorrection_7
external clock offset correction value 7
Definition: IfxEray.h:169
IfxEray_ClearErrorFlag_ioba
illegal output buffer access event.
Definition: IfxEray.h:99
IfxEray_ClearErrorFlag_cna
command not accepted event bit.
Definition: IfxEray.h:90
IfxEray_Channel
IfxEray_Channel
Channel Id.
Definition: IfxEray.h:79
IfxEray_Header::bufferServiceEnabled
boolean bufferServiceEnabled
wether buffer service request is enabled or not.
Definition: IfxEray.h:373
IfxEray_PocState_gap
controller entered gap state.
Definition: IfxEray.h:283
IfxEray_PocState_halt
controller entered halt state
Definition: IfxEray.h:272
IfxEray_ClockDivider
IfxEray_ClockDivider
Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.
Definition: IfxEray.h:137
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxEray_setMaxSynchFrames
IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster.
Definition: IfxEray.h:1637
IfxEray_TransmissionMode_continuous
continuos transmission mode
Definition: IfxEray.h:334
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxEray_setListenTimeOuts
IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts.
Definition: IfxEray.h:1614
IfxEray_sendData
IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame.
Definition: IfxEray.h:1449
IfxEray_ExternalOffsetCorrection_0
external clock offset correction value 0
Definition: IfxEray.h:162
IfxEray_PocState_config
controller entered config state
Definition: IfxEray.h:274
IfxEray_ReceivedHeader::headerCrc
uint16 headerCrc
received header crc.
Definition: IfxEray.h:386
IfxEray_setStrobePosition
IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing.
Definition: IfxEray.h:1727
IfxEray_setSleepMode
IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxEray.h:1704
IfxEray_PocState_consistencyCheck
controller entered consistency-check.
Definition: IfxEray.h:282
IfxEray_PocCommand_sendMts
command to controller to enter SEND_MTS
Definition: IfxEray.h:257
IfxEray_ClearErrorFlag_sfbm
sync frame below minimum bit.
Definition: IfxEray.h:91
IfxEray_SleepMode_disable
disables sleep mode
Definition: IfxEray.h:309
IfxEray_ClearStatusFlag_wst
wakeup status bit.
Definition: IfxEray.h:113
IfxEray_ClearStatusFlag_mtsa
MTS receive channel A bit.
Definition: IfxEray.h:130
IfxEray_writeData
IFX_EXTERN void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:331
IfxEray_PocState_monitor
controller entered monitor state
Definition: IfxEray.h:273
IfxEray_SlotConfig::transferRequested
boolean transferRequested
transmit buffer released for transmission or not.
Definition: IfxEray.h:400
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxEray_getInputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the IBUSY service request.
Definition: IfxEray.h:1261
IfxEray_MaxSynchFrames_15
Maximum number of sync frames in a cluster are 15.
Definition: IfxEray.h:242
IfxEray_ClearErrorFlag_ltvb
latest transmit violation flag on channel B .
Definition: IfxEray.h:105
IfxEray_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEray_PinMap.h:44
IfxEray_ClearStatusFlag_swe
stop watch event bit.
Definition: IfxEray.h:125
IfxEray_Baudrate_2_5
baudrate is 2.5MBits/Sec
Definition: IfxEray.h:66
IfxEray_MaxSynchFrames_13
Maximum number of sync frames in a cluster are 13.
Definition: IfxEray.h:240
IfxEray_ClockDivider_5
run mode clock divider 5
Definition: IfxEray.h:144
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxEray_ClearErrorFlag_eda
error event on channel A.
Definition: IfxEray.h:101
IfxEray_getFifoIndex
IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
Gets the FIFO index.
Definition: IfxEray.h:1235
IfxEray_ClearStatusFlag_sucs
startup success event bit.
Definition: IfxEray.h:126
IfxEray_ExternalOffset
IfxEray_ExternalOffset
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
Definition: IfxEray.h:151
IfxEray_ClockDivider_2
run mode clock divider 2
Definition: IfxEray.h:141
IfxEray_setAutoDelayBuffers
IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM.
Definition: IfxEray.h:1467
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxEray_setViewData
IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers.
Definition: IfxEray.h:1790
IfxEray_PocState_normalActive
controller entered normal-active state
Definition: IfxEray.h:270
IfxEray_setFifoBufferStartIndex
IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex.
Definition: IfxEray.h:1583
IfxEray_setRxBufferNumber
IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received.
Definition: IfxEray.h:1698
IfxEray_ExternalOffsetCorrection_3
external clock offset correction value 3
Definition: IfxEray.h:165
IfxEray_setFifoMessageBufferConfigurations
IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations.
Definition: IfxEray.h:1599
IfxEray_setTransmissionSlotMode
IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode.
Definition: IfxEray.h:1751
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1255
IfxEray_getNewDataInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the NDAT1 service request.
Definition: IfxEray.h:1314
IfxEray_setMaxCorrectionValues
IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values.
Definition: IfxEray.h:1630
IfxEray_setCycleDurationMicroticks
IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks.
Definition: IfxEray.h:1549
IfxEray_setReceiveRequest
IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame.
Definition: IfxEray.h:1684
IfxEray_PocCommand_monitor
command to controller to enter MONITOR
Definition: IfxEray.h:260
IfxEray_MaxSynchFrames_12
Maximum number of sync frames in a cluster are 12.
Definition: IfxEray.h:239
IfxEray_ClearErrorFlag_rfo
RxFIFO overrun event bit.
Definition: IfxEray.h:96
IfxEray_setCycleDurationMacroticks
IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks.
Definition: IfxEray.h:1543
IfxEray_getInterruptLine0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
Gets the INT0 service request.
Definition: IfxEray.h:1268
IfxEray_setNodeChannels
IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node.
Definition: IfxEray.h:1671
IfxEray_TransmissionSlotMode_all
transmission in all slots.
Definition: IfxEray.h:342
IfxEray_PocState_startup
controller entered startup state
Definition: IfxEray.h:279
IfxEray_ListenTimeOutNoise_2
listen Time-out noise 2
Definition: IfxEray.h:208
IfxEray_PinMap.h
ERAY I/O map.
IfxEray_Rxd_In::nodeId
IfxEray_NodeId nodeId
Node ID.
Definition: IfxEray_PinMap.h:42
IfxEray_setChannelAInitialOffsets
IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes.
Definition: IfxEray.h:1487
IfxEray_SuspendMode_hard
Hard Suspend.
Definition: IfxEray.h:326
IfxEray_PocCommand_freeze
command to controller to enter FREEZE
Definition: IfxEray.h:256
IfxEray_getInterruptLine1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
Gets the INT1 service request.
Definition: IfxEray.h:1275
IfxEray_setMessageBufferInterruptDestination
IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:230
IfxEray_ExternalRateCorrection
IfxEray_ExternalRateCorrection
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
Definition: IfxEray.h:183
IfxEray_setExternalCorrectionValues
IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values.
Definition: IfxEray.h:1576
IfxEray_PocCommand_allSlots
command to controller to enter ALL_SLOTS
Definition: IfxEray.h:254
IfxEray_ClearStatusFlag_cas
collision avoidance bit.
Definition: IfxEray.h:114
IfxEray_getTimerInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the TINT1 service request.
Definition: IfxEray.h:1372
IfxEray_WakeupChannel_b
send wakeup channel pattern on channel B
Definition: IfxEray.h:351
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:364
IfxEray_ClearStatusFlag_mbsi
message buffer service status bit.
Definition: IfxEray.h:127
IfxEray_MaxSynchFrames_6
Maximum number of sync frames in a cluster are 6.
Definition: IfxEray.h:233
IfxEray_Channel_a
channel A
Definition: IfxEray.h:81
IfxEray_MaxSynchFrames_3
Maximum number of sync frames in a cluster are 3.
Definition: IfxEray.h:230
IfxEray_ListenTimeOutNoise_6
listen Time-out noise 6
Definition: IfxEray.h:212
IfxEray_initRxPin
IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
Initialises a RX pin.
Definition: IfxEray.h:1396
IfxEray_ClearStatusFlag_rfne
receive fifo not empty bit.
Definition: IfxEray.h:118
IfxEray_ClearStatusFlag_rfcl
RxFIFO critical level reached bit.
Definition: IfxEray.h:119
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxEray_getMessageBufferStatus0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
Gets the MBSC0 service request.
Definition: IfxEray.h:1293
IfxEray_setSymbolChannels
IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols.
Definition: IfxEray.h:1744
IfxEray_IdleDynamicSlots
IfxEray_IdleDynamicSlots
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
Definition: IfxEray.h:197
IfxEray_ClearErrorFlag_efa
empty FIFO access event bit.
Definition: IfxEray.h:97
IfxEray_ClearErrorFlag_ccl
CHI command locked event.
Definition: IfxEray.h:94
IfxEray_StrobePosition_6
Sample count 6 for strobing.
Definition: IfxEray.h:318
IfxEray_setNetworkStartIdleTime
IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time.
Definition: IfxEray.h:1659
IfxEray_PocCommand_reset
command to controller to enter RESET
Definition: IfxEray.h:259
IfxEray_disableModule
IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray)
Disables the ERAY module.
Definition: IfxEray.h:1201
IfxEray_setClusterDriftValues
IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values.
Definition: IfxEray.h:1524
IfxEray_PocState_integrationConsistencyCheck
controller entered integration consistency check state
Definition: IfxEray.h:287
IfxEray_ClockDivider_6
run mode clock divider 6
Definition: IfxEray.h:145
IfxEray_setChannelsReceiveDelay
IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels.
Definition: IfxEray.h:1501
IfxEray_setTransmitWakeupTimes
IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times.
Definition: IfxEray.h:1769
IfxEray_ClearStatusFlag_mtsb
MTS receive channel B bit.
Definition: IfxEray.h:132
IfxEray_setFifoFilterConfigurations
IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations.
Definition: IfxEray.h:1590
IfxEray_StrobePosition
IfxEray_StrobePosition
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
Definition: IfxEray.h:314
IfxEray_getOutputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the OBUSY service request.
Definition: IfxEray.h:1344
IfxEray_initTxPin
IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxEray.h:1418
IfxEray_ExternalOffsetCorrection_6
external clock offset correction value 6
Definition: IfxEray.h:168
IfxEray_PocState_integrationListen
controller entered integration-listen state.
Definition: IfxEray.h:286
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxEray_ExternalRateCorrection_0
external clock rate correction value 0
Definition: IfxEray.h:185
IfxEray_Baudrate
IfxEray_Baudrate
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
Definition: IfxEray.h:62
IfxEray_clearErrorFlag
IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested.
Definition: IfxEray.h:1189
IfxEray_setFirstDynamicBuffer
IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer.
Definition: IfxEray.h:1607
IfxEray_SuspendMode
IfxEray_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxEray.h:323
IfxEray_ExternalRateCorrection_6
external clock rate correction value 6
Definition: IfxEray.h:191
IfxEray_ExternalOffsetCorrection_1
external clock offset correction value 1
Definition: IfxEray.h:163
IfxEray_MaxSynchFrames_5
Maximum number of sync frames in a cluster are 5.
Definition: IfxEray.h:232
IfxEray_sendHeader
IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame.
Definition: IfxEray.h:1455
IfxEray_getOutputBufferBusyShadowStatus
IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Output Buffer Shadow status.
Definition: IfxEray.h:1338
IfxEray_ExternalOffsetCorrection_5
external clock offset correction value 5
Definition: IfxEray.h:167
IfxEray_Channel_b
channel B
Definition: IfxEray.h:82
IfxEray_SlotConfig::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray.h:401
IfxEray_Rxd_In::module
Ifx_ERAY * module
Base address.
Definition: IfxEray_PinMap.h:41
IfxEray_Header::payloadLength
uint8 payloadLength
length of data section.
Definition: IfxEray.h:374
IfxEray_PocState_initializeSchedule
controller entered initialise schedule state
Definition: IfxEray.h:288
IfxEray_PocState_ready
controller entered ready state
Definition: IfxEray.h:269
IfxEray_ListenTimeOutNoise_14
listen Time-out noise 14
Definition: IfxEray.h:220
IfxEray_PocState_staruAborted
controller entered startup-abort state
Definition: IfxEray.h:289
IfxEray_setDecodingCorrectionValue
IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value.
Definition: IfxEray.h:1555
IfxEray_ClearStatusFlag_nmvc
network management vector bit.
Definition: IfxEray.h:120
IfxEray_setReceiveWakeupTimes
IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times.
Definition: IfxEray.h:1690
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:39
IfxEray_setDynamicSlots
IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length.
Definition: IfxEray.h:1561
IfxEray_ReceivedHeader::nullFrameIndicator
uint8 nullFrameIndicator
0 : no data frame received; 1: atleast one data frame received.
Definition: IfxEray.h:387
IfxEray_Header::channelAFiltered
boolean channelAFiltered
channel A serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:368
IfxEray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
Gets the error interrupt flags.
Definition: IfxEray.h:1227
IfxEray_MaxSynchFrames
IfxEray_MaxSynchFrames
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
Definition: IfxEray.h:227
IfxEray_setMaxColdStartAttempts
IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state.
Definition: IfxEray.h:1624
IfxEray_TransmissionSlotMode
IfxEray_TransmissionSlotMode
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
Definition: IfxEray.h:340
IfxEray_ListenTimeOutNoise_5
listen Time-out noise 5
Definition: IfxEray.h:211
IfxEray_PocState_integrationCheck
controller entered integration-check.
Definition: IfxEray.h:285
IfxEray_ExternalRate_noCorrection
No external correction control.
Definition: IfxEray.h:176
IfxEray_ClearErrorFlag_edb
error event on channel B.
Definition: IfxEray.h:104
IfxEray_ReceivedHeader::startupFrame
uint8 startupFrame
0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. ...
Definition: IfxEray.h:389
IfxEray_ClearErrorFlag_iiba
illegal input buffer access event.
Definition: IfxEray.h:98
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:72
IfxEray_Header::syncFrameIndicator
boolean syncFrameIndicator
whether sync frame is indicated or not.
Definition: IfxEray.h:377
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:250
IfxEray_setChannelBInitialOffsets
IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes.
Definition: IfxEray.h:1494
IfxEray_PocState_normalPassive
controller entered normal-passive state
Definition: IfxEray.h:271
IfxEray_setSlotActionPoints
IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points.
Definition: IfxEray.h:1713
IfxEray_PocState_wakeupStandby
controller entered wakeup standby state
Definition: IfxEray.h:275
IfxEray_ExternalRateCorrection_7
external clock rate correction value 7
Definition: IfxEray.h:192
IfxEray_setNetworkVectorLength
IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length.
Definition: IfxEray.h:1665
IfxEray_ClearStatusFlag_wupb
wakeup pattern channel B bit.
Definition: IfxEray.h:131
IfxEray_setMessageBufferCount
IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers.
Definition: IfxEray.h:1643
IfxEray_ExternalRateCorrection_5
external clock rate correction value 5
Definition: IfxEray.h:190
IfxEray_ClearErrorFlag
IfxEray_ClearErrorFlag
Selection of error flag to clear defined in MODULE_ERAY.EIR.U.
Definition: IfxEray.h:87
IfxEray_resetModule
IFX_EXTERN void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:210
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxEray_ListenTimeOutNoise_16
listen Time-out noise 16
Definition: IfxEray.h:222
IfxEray_ExternalRateCorrection_3
external clock rate correction value 3
Definition: IfxEray.h:188
IfxEray_PocState_defaultConfig
controller entered default config state
Definition: IfxEray.h:268
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxEray_ClearErrorFlag_eerr
ECC error event bit.
Definition: IfxEray.h:95
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1351
IfxEray_getAddress
IFX_EXTERN Ifx_ERAY * IfxEray_getAddress(IfxEray_Index eray)
Definition: IfxEray.c:134
IfxEray_ClearStatusFlag_ti1
timer1 service request bit.
Definition: IfxEray.h:122
IfxEray_ClockDivider_1
run mode clock divider 1
Definition: IfxEray.h:140
IfxEray_Header::channelBFiltered
boolean channelBFiltered
channel B serves as a control for transmit and filter for receive buffers.
Definition: IfxEray.h:369
IfxEray_MaxSynchFrames_4
Maximum number of sync frames in a cluster are 4.
Definition: IfxEray.h:231
IfxEray_IdleDynamicSlots_1
duration of dynamic slot idle phase is 1
Definition: IfxEray.h:200
IfxEray_getFifoStatus
IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
Gets the FIFO status.
Definition: IfxEray.h:1241
IfxEray_SlotConfig::headerTransfered
boolean headerTransfered
whether header is transfered from input buffers to Message RAM or not.
Definition: IfxEray.h:398
IfxEray_MaxSynchFrames_14
Maximum number of sync frames in a cluster are 14.
Definition: IfxEray.h:241
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:247
IfxEray_ClearErrorFlag_tabb
transmission across channel B boundary flag.
Definition: IfxEray.h:106
IfxEray_MaxSynchFrames_9
Maximum number of sync frames in a cluster are 9.
Definition: IfxEray.h:236
IfxEray_PocState_wakeupDetect
controller entered wakeup-detection state
Definition: IfxEray.h:278
IfxEray_PocState_wakeupListen
controller entered wakeup-listen state
Definition: IfxEray.h:276
IfxEray_ReceivedHeader::cycleNumber
uint8 cycleNumber
cycle number in which frame is received.
Definition: IfxEray.h:390
IfxEray_ExternalRate_correctionAdded
External rate correction added to calculated correction.
Definition: IfxEray.h:178
IfxEray_ClearStatusFlag_rxi
receive service request bit.
Definition: IfxEray.h:117
IfxEray_ClockDivider_7
run mode clock divider 7
Definition: IfxEray.h:146
IfxEray_StrobePosition_5
Sample count 5 for strobing.
Definition: IfxEray.h:316
IfxEray_enableModule
IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
Enables the ERAY module.
Definition: IfxEray.h:1211
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxEray_PocCommand_coldStart
command to controller to enter COLD_START
Definition: IfxEray.h:258
IfxEray_getNewDataInterruptStatus
IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray.h:1321
IfxEray_ListenTimeOutNoise_10
listen Time-out noise 10
Definition: IfxEray.h:216
IfxEray_IdleDynamicSlots_0
duration of dynamic slot idle phase is 0
Definition: IfxEray.h:199
IfxEray_ClockDivider_3
run mode clock divider 3
Definition: IfxEray.h:142
IfxEray_MaxSynchFrames_10
Maximum number of sync frames in a cluster are 10.
Definition: IfxEray.h:237
IfxEray_PocCommand_ready
command to controller to enter READY.
Definition: IfxEray.h:251
IfxEray_ListenTimeOutNoise_3
listen Time-out noise 3
Definition: IfxEray.h:209
IfxEray_PocState_coldStartListen
controller entered clod-start listen state
Definition: IfxEray.h:280
IfxEray_SuspendMode_soft
Soft Suspend.
Definition: IfxEray.h:327
IfxEray_readFrame
IFX_EXTERN void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:186
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxEray_PocState_wakeupSend
controller entered wakeup-send state
Definition: IfxEray.h:277
IfxEray_ListenTimeOutNoise_13
listen Time-out noise 13
Definition: IfxEray.h:219
IfxEray_clearAllFlags
IFX_EXTERN void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:106
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxEray_enableInterruptLines
IFX_EXTERN void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:116
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:62
IfxEray_getMessageBufferStatus1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
Gets the MBSC1 service request.
Definition: IfxEray.h:1300
IfxEray_ReceiveChannel_both
both channels for reception
Definition: IfxEray.h:297
IfxEray_cfg.h
ERAY on-chip implementation data.
IfxEray_ExternalOffset_correctionSubtracted
External offset correction subtracted from calculated correction.
Definition: IfxEray.h:154
IfxEray_ClearStatusFlag_tibc
transfer input buffer completion request bit.
Definition: IfxEray.h:123
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxEray_clearStatusFlag
IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested.
Definition: IfxEray.h:1195
IfxEray_ListenTimeOutNoise_4
listen Time-out noise 4
Definition: IfxEray.h:210
IfxEray_BufferDirection
IfxEray_BufferDirection
wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.
Definition: IfxEray.h:71
IfxEray_ClearErrorFlag_ltva
latest transmit violation flag on channel A .
Definition: IfxEray.h:102
IfxEray_setSuspendMode
IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxEray.h:1733
IfxEray_setTransmittedFrames
IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization.
Definition: IfxEray.h:1777
IfxEray_changePocState
IFX_EXTERN boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:82
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxEray_Header::cycleCode
uint8 cycleCode
the cycle set used for cycle counter filtering.
Definition: IfxEray.h:367
IfxEray_ExternalRateCorrection_4
external clock rate correction value 4
Definition: IfxEray.h:189
IfxEray_readData
IFX_EXTERN void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:171
IfxEray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray.h:1379
IfxEray_StrobePosition_4
Sample count 4 for strobing.
Definition: IfxEray.h:317
IfxEray_ListenTimeOutNoise_7
listen Time-out noise 7
Definition: IfxEray.h:213
IfxEray_ClearStatusFlag_wupa
wakeup pattern channel A bit.
Definition: IfxEray.h:129
IfxEray_setClockSynchErrorHalt
IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error.
Definition: IfxEray.h:1518
IfxEray_PocCommand_wakeup
command to controller to enter WAKEUP
Definition: IfxEray.h:252
IfxEray_SleepMode_enable
enables sleep mode
Definition: IfxEray.h:308
IfxEray_ClockDivider_4
run mode clock divider 4
Definition: IfxEray.h:143
IfxEray_setClockCorrectionCycles
IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt.
Definition: IfxEray.h:1508
IfxEray_IdleDynamicSlots_2
duration of dynamic slot idle phase is 2
Definition: IfxEray.h:201
IfxEray_Header::frameId
uint16 frameId
slot ID of the selected Message Buffer.
Definition: IfxEray.h:366
IfxEray_ClearStatusFlag_sds
dynamic segment start bit.
Definition: IfxEray.h:128


iLLD_TC26B: IfxEray_Eray.c Source File

  • Eray
  • Eray
IfxEray_Eray.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_Eray.c
3 * \brief ERAY ERAY details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxEray_Eray.h"
30 #include "Mtu/Std/IfxMtu.h"
31
32 /** \addtogroup IfxLld_Eray_Eray_Node
33 * \{ */
34
35 /******************************************************************************/
36 /*-----------------------Private Function Prototypes--------------------------*/
37 /******************************************************************************/
38
39 /** \brief Inialises the communication controller.
40 * \param eray pointer to ERAY Module handle.
41 * \param config pointer to communication controller config structure.
42 * \return None
43 */
44 IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config);
45
46 /** \brief Initialises the Global Timing Unit.
47 * \param eray pointer to ERAY Module handle.
48 * \param config global timing unit Configuration structure.
49 * \return None
50 */
51 IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config);
52
53 /** \brief Inialises the message RAM.
54 * \param eray pointer to ERAY Module handle.
55 * \param config pointer to message RAM config structure.
56 * \return None
57 */
58 IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config);
59
60 /** \} */
61
62 /******************************************************************************/
63 /*-------------------------Function Implementations---------------------------*/
64 /******************************************************************************/
65
66 void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
67 {
68 Ifx_ERAY *eraySFR = eray->eray;
69 // clear all the flags
70 IfxEray_clearAllFlags(eraySFR);
71
72 // set Communication Controller to config state
73 if (IfxEray_getPocState(eraySFR) != IfxEray_PocState_config)
74 {
75 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_freeze);
76 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_halt);
77 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
78 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_defaultConfig);
79 IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
80 IfxEray_waitForPocState(eraySFR, IfxEray_PocState_config);
81 }
82
83 // enable interrupt lines
84 IfxEray_enableInterruptLines(eraySFR);
85 IfxEray_setAutoDelayBuffers(eraySFR);
86 //configure message RAM ( slots and slot buffers )
87 IfxEray_Eray_Node_initMessageRAM(eray, &config->messageRAMConfig);
88 //configure communication controller for clock corrections
89 IfxEray_Eray_Node_initCommunicationController(eray, &config->controllerConfig);
90 // initialise the Node pins.
91 const IfxEray_Eray_Pins *pins = config->pins;
92
93 if (pins != NULL_PTR)
94 {
95 const IfxEray_Eray_NodeA *nodeAPins = pins->nodeAPins;
96
97 if (nodeAPins != NULL_PTR)
98 {
99 const IfxEray_Rxd_In *rx = nodeAPins->rxIn;
100
101 if (rx != NULL_PTR)
102 {
103 IfxEray_initRxPinWithPadLevel(rx, nodeAPins->rxInMode, nodeAPins->pinDriver);
104 }
105
106 const IfxEray_Txd_Out *tx = nodeAPins->txOut;
107
108 if (tx != NULL_PTR)
109 {
110 IfxEray_initTxPin(tx, nodeAPins->txOutMode, nodeAPins->pinDriver);
111 }
112
113 const IfxEray_Txen_Out *txEn = nodeAPins->txEnOut;
114
115 if (txEn != NULL_PTR)
116 {
117 IfxEray_initTxEnPin(txEn, nodeAPins->txEnOutMode, nodeAPins->pinDriver);
118 }
119 }
120
121 const IfxEray_Eray_NodeB *nodeBPins = pins->nodeBPins;
122
123 if (nodeBPins != NULL_PTR)
124 {
125 const IfxEray_Rxd_In *rx = nodeBPins->rxIn;
126
127 if (rx != NULL_PTR)
128 {
129 IfxEray_initRxPinWithPadLevel(rx, nodeBPins->rxInMode, nodeBPins->pinDriver);
130 }
131
132 const IfxEray_Txd_Out *tx = nodeBPins->txOut;
133
134 if (tx != NULL_PTR)
135 {
136 IfxEray_initTxPin(tx, nodeBPins->txOutMode, nodeBPins->pinDriver);
137 }
138
139 const IfxEray_Txen_Out *txEn = nodeBPins->txEnOut;
140
141 if (txEn != NULL_PTR)
142 {
143 IfxEray_initTxEnPin(txEn, nodeBPins->txEnOutMode, nodeBPins->pinDriver);
144 }
145 }
146 }
147
148 // set the Communication Controller to ready state
149 IfxEray_setPocReady(eraySFR);
150 }
151
152
153 IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
154 {
155 Ifx_ERAY *eraySFR = eray->eray;
156 //SUCC1
157 IfxEray_setTransmittedFrames(eraySFR, config->succ1Config.startupFrameTransmitted, config->succ1Config.syncFrameTransmitted);
158 IfxEray_setMaxColdStartAttempts(eraySFR, config->succ1Config.maxColdStartAttempts);
159 IfxEray_setActiveCyclePairs(eraySFR, config->succ1Config.numberOfCyclePairsForActive);
160 IfxEray_setWakeupPatternChannel(eraySFR, config->succ1Config.wakeupPatternChannel);
161 IfxEray_setTransmissionSlotMode(eraySFR, config->succ1Config.transmissionSlotMode);
162 IfxEray_setClockSynchErrorHalt(eraySFR, config->succ1Config.clockSyncErrorHalt);
163 IfxEray_setSymbolChannels(eraySFR, config->succ1Config.channelASymbolTransmitted, config->succ1Config.channelBSymbolTransmitted);
164 IfxEray_setNodeChannels(eraySFR, config->succ1Config.channelAConnectedNode, config->succ1Config.channelBConnectedNode);
165 //SUCC2
166 IfxEray_setListenTimeOuts(eraySFR, config->succ2Config.listenTimeOut, config->succ2Config.listenTimeOutNoise);
167 //SUCC3
168 IfxEray_setClockCorrectionCycles(eraySFR, config->succ3Config.clockCorrectionCyclesPassive, config->succ3Config.clockCorrectionCyclesHalt);
169 //NEMC
170 IfxEray_setNetworkVectorLength(eraySFR, config->networkVectorLength);
171 //PRTC1, PRTC2
172 IfxEray_setTransmissionStartTime(eraySFR, (uint8)config->prtc1Control.transmissionStartTime);
173 IfxEray_setCollisionAvoidanceDuration(eraySFR, config->prtc1Control.collisionAvoidanceDuration);
174 IfxEray_setStrobePosition(eraySFR, config->prtc1Control.strobePosition);
175 IfxEray_setBaudrate(eraySFR, config->prtc1Control.baudrate);
176 IfxEray_setReceiveWakeupTimes(eraySFR, config->prtc1Control.receiveWakeupTestDuration, config->prtc2Control.receiveWakeupIdleTime, config->prtc2Control.receiveWakeupLowTime
177 );
178 IfxEray_setTransmitWakeupTimes(eraySFR, config->prtc1Control.transmitWakeupRepetitions, config->prtc2Control.transmitWakeupIdleTime, config->prtc2Control.transmitWakeupLowTime);
179 //MHDC
180 IfxEray_setMessageHandlerConfigurations(eraySFR, config->staticFramepayload, config->latestTransmissionStart);
181 // GTU
182 IfxEray_Eray_Node_initGTU(eray, &config->gtuConfig);
183 }
184
185
186 void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
187 {
188 // Default node configurations buffer
189 const IfxEray_Eray_NodeConfig nodeConfig = {
190 .messageRAMConfig = {
191 .firstDynamicBuffer = 0,
192 .numberOfMessageBuffers = 0,
193 .fifoBufferStartIndex = 0x80,
194 .fifoDepth = 30,
195 .frameIdFilter = 0x7FD,
196 .receiveChannel = IfxEray_ReceiveChannel_a,
197 .rejectedFrameId = 2,
198 .filteredCycleNumber = 0,
199 .staticFifoDisabled = FALSE,
200 .fifoNullFramesRejected = FALSE,
201 .bufferReconfigEnabled = TRUE,
202 .fifoConfigured = FALSE
203 },
204
205 .controllerConfig = {
206 .networkVectorLength = 0x2,
207 .staticFramepayload = 0x4,
208 .latestTransmissionStart = 0x3F,
209
210 .prtc1Control = {
211 .transmissionStartTime = 0xA,
212 .collisionAvoidanceDuration = 0x61,
213 .strobePosition = IfxEray_StrobePosition_5,
214 .baudrate = IfxEray_Baudrate_10,
215 .receiveWakeupTestDuration = 0x8C,
216 .transmitWakeupRepetitions = 0x2
217 },
218
219 .prtc2Control = {
220 .receiveWakeupIdleTime = 0x2D,
221 .receiveWakeupLowTime = 0x12,
222 .transmitWakeupIdleTime = 0x2D,
223 .transmitWakeupLowTime = 0x12
224 },
225
226 .succ1Config = {
227 .channelAConnectedNode = TRUE,
228 .channelBConnectedNode = TRUE,
229 .channelASymbolTransmitted = FALSE,
230 .channelBSymbolTransmitted = FALSE,
231 .clockSyncErrorHalt = TRUE,
232 .transmissionSlotMode = IfxEray_TransmissionSlotMode_single,
233 .wakeupPatternChannel = IfxEray_WakeupChannel_a,
234 .numberOfCyclePairsForActive = 0x7,
235 .maxColdStartAttempts = 0x1F,
236 .syncFrameTransmitted = TRUE,
237 .startupFrameTransmitted = TRUE
238 },
239
240 .succ2Config = {
241 .listenTimeOut = 0x13972,
242 .listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16
243 },
244
245 .succ3Config = {
246 .clockCorrectionCyclesPassive = 0x1,
247 .clockCorrectionCyclesHalt = 0x1
248 },
249
250 .gtuConfig = {
251 .gtu01Config.microticksPerCycle = 0x9C40,
252
253 .gtu02Config = {
254 .macroticksPerCycle = 0x3E8,
255 .maxSyncFrames = 0x4
256 },
257
258 .gtu03Config = {
259 .channelAMicrotickInitialOffset = 0x19,
260 .channelBMicrotickInitialOffset = 0x19,
261 .channelAMacrotickInitialOffset = 0xA,
262 .channelBMacrotickInitialOffset = 0x2
263 },
264
265 .gtu04Config = {
266 .networkStartIdleTime = 0x38E,
267 .correctionOffset = 0x394
268 },
269
270 .gtu05Config = {
271 .channelAReceptionDelay = 0x4,
272 .channelBReceptionDelay = 0x4,
273 .clusterDrift = 1,
274 .decodingCorrection = 0x34
275 },
276
277 .gtu06Config = {
278 .acceptedStartupDeviation = 0x81,
279 .maxDriftOffset = 0xD2
280 },
281
282 .gtu07Config = {
283 .staticSlotLength = 0x32,
284 .staticSlotsCount = 0xC
285 },
286
287 .gtu08Config = {
288 .dynamicSlotLength = 4,
289 .dynamicSlotCount = 0x4B,
290 },
291
292 .gtu09Config = {
293 .idleDynamicSlots = IfxEray_IdleDynamicSlots_1,
294 .staticActionPoint = 8,
295 .dynamicActionPoint = 3
296 },
297
298 .gtu10Config = {
299 .maxOffsetCorrection = 0x32,
300 .maxRateCorrection = 0xD2
301 },
302
303 .gtu11Config = {
304 .externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0,
305 .externalRateCorrection = IfxEray_ExternalRateCorrection_0,
306 .externalOffset = IfxEray_ExternalOffset_noCorrection,
307 .externalRate = IfxEray_ExternalRate_noCorrection
308 },
309 },
310 },
311 .pins = NULL_PTR
312 };
313
314 *config = nodeConfig;
315 }
316
317
318 IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
319 {
320 Ifx_ERAY *eraySFR = eray->eray;
321
322 IfxEray_setCycleDurationMicroticks(eraySFR, config->gtu01Config.microticksPerCycle);
323 IfxEray_setCycleDurationMacroticks(eraySFR, config->gtu02Config.macroticksPerCycle);
324 IfxEray_setMaxSynchFrames(eraySFR, (IfxEray_MaxSynchFrames)config->gtu02Config.maxSyncFrames);
325 IfxEray_setChannelAInitialOffsets(eraySFR, config->gtu03Config.channelAMicrotickInitialOffset, config->gtu03Config.channelAMacrotickInitialOffset);
326 IfxEray_setChannelBInitialOffsets(eraySFR, config->gtu03Config.channelBMicrotickInitialOffset, config->gtu03Config.channelBMacrotickInitialOffset);
327 IfxEray_setNetworkStartIdleTime(eraySFR, config->gtu04Config.networkStartIdleTime);
328 IfxEray_setOffsetCorrection(eraySFR, config->gtu04Config.correctionOffset);
329 IfxEray_setChannelsReceiveDelay(eraySFR, config->gtu05Config.channelAReceptionDelay, config->gtu05Config.channelBReceptionDelay);
330 IfxEray_setDecodingCorrectionValue(eraySFR, config->gtu05Config.decodingCorrection);
331 IfxEray_setClusterDriftValues(eraySFR, config->gtu05Config.clusterDrift, config->gtu06Config.maxDriftOffset);
332 IfxEray_setClusterStartupDeviation(eraySFR, config->gtu06Config.acceptedStartupDeviation);
333 IfxEray_setStaticSlots(eraySFR, config->gtu07Config.staticSlotLength, config->gtu07Config.staticSlotsCount);
334 IfxEray_setDynamicSlots(eraySFR, config->gtu08Config.dynamicSlotLength, config->gtu08Config.dynamicSlotCount, config->gtu09Config.idleDynamicSlots);
335 IfxEray_setSlotActionPoints(eraySFR, config->gtu09Config.staticActionPoint, config->gtu09Config.dynamicActionPoint);
336 IfxEray_setMaxCorrectionValues(eraySFR, config->gtu10Config.maxOffsetCorrection, config->gtu10Config.maxRateCorrection);
337 IfxEray_setExternalCorrectionControl(eraySFR, config->gtu11Config.externalOffset, config->gtu11Config.externalRate);
338 IfxEray_setExternalCorrectionValues(eraySFR, config->gtu11Config.externalOffsetCorrection, config->gtu11Config.externalRateCorrection);
339 }
340
341
342 IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
343 {
344 Ifx_ERAY *eraySFR = eray->eray;
345 uint32 bufferCount;
346 //group of Message Buffers exclusively for the static segment configured
347 IfxEray_setFirstDynamicBuffer(eraySFR, config->firstDynamicBuffer);
348 /* Last Configured Buffer
349 * 01H..7FH: Number of Message Buffers is LCB + 1
350 * 80H..FFH: No Message Buffer configured
351 */
352 IfxEray_setMessageBufferCount(eraySFR, config->numberOfMessageBuffers);
353
354 // receive FIFO buffers configuration
355 if (config->fifoConfigured == TRUE)
356 {
357 IfxEray_setFifoBufferStartIndex(eraySFR, (uint8)config->fifoBufferStartIndex);
358 IfxEray_setFifoMessageBufferConfigurations(eraySFR, config->receiveChannel, config->staticFifoDisabled, config->fifoDepth);
359 IfxEray_setFifoFilterConfigurations(eraySFR, config->rejectedFrameId, config->filteredCycleNumber, config->fifoNullFramesRejected, config->frameIdFilter);
360 }
361 else
362 {
363 // FIFO is not supported. No message buffers assigned to the FIFO, if FFB >= 128
364 IfxEray_setFifoBufferStartIndex(eraySFR, (uint8)config->fifoBufferStartIndex);
365 }
366
367 if (config->bufferReconfigEnabled == TRUE)
368 {
369 //buffers reconfigured
370 IfxEray_setBufferReconfigSecure(eraySFR, 0);
371 }
372 else
373 {
374 //buffer reconfiguration locked
375 IfxEray_setBufferReconfigSecure(eraySFR, 2);
376 }
377
378 for (bufferCount = 0; bufferCount < config->numberOfMessageBuffers; bufferCount++)
379 {
380 IfxEray_setSlot(eraySFR, config->header[bufferCount], config->data[bufferCount], config->slotControl[bufferCount]);
381 }
382 }
383
384
385 void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
386 {
387 eray->eray = config->module;
388 Ifx_ERAY *eraySFR = config->module;
389 // Enable MTU clock
390 {
391 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
392 IfxScuWdt_clearCpuEndinit(password);
393 IfxMtu_enableModule();
394 IfxScuWdt_setCpuEndinit(password);
395 }
396 // clear RAMS
397 {
398 uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
399 IfxScuWdt_clearSafetyEndinit(password);
400 IfxMtu_clearSram(IfxMtu_MbistSel_erayObf);
401 IfxMtu_clearSram(IfxMtu_MbistSel_erayIbfTbf);
402 IfxMtu_clearSram(IfxMtu_MbistSel_erayMbf);
403
404 IfxScuWdt_setSafetyEndinit(password);
405 }
406
407 {
408 IfxEray_enableModule(eraySFR);
409 }
410
411 /** NOTE: If not DMA, the interrupt service provider is assigned to the CPU ID where
412 * this function is called from */
413 {
414 if ((config->interrupt.int0Priority != 0) || (config->interrupt.int0IsrProvider == IfxSrc_Tos_dma))
415 {
416 volatile Ifx_SRC_SRCR *src = IfxEray_getInterruptLine0SrcPtr(eraySFR);
417 IfxSrc_init(src, config->interrupt.int0IsrProvider, config->interrupt.int0Priority);
418 IfxSrc_enable(src);
419 }
420
421 if ((config->interrupt.int1Priority != 0) || (config->interrupt.int1IsrProvider == IfxSrc_Tos_dma))
422 {
423 volatile Ifx_SRC_SRCR *src = IfxEray_getInterruptLine1SrcPtr(eraySFR);
424 IfxSrc_init(src, config->interrupt.int1IsrProvider, config->interrupt.int1Priority);
425 IfxSrc_enable(src);
426 }
427
428 if ((config->interrupt.tint0Priority != 0) || (config->interrupt.tint0IsrProvider == IfxSrc_Tos_dma))
429 {
430 volatile Ifx_SRC_SRCR *src = IfxEray_getTimerInterrupt0SrcPtr(eraySFR);
431 IfxSrc_init(src, config->interrupt.tint0IsrProvider, config->interrupt.tint0Priority);
432 IfxSrc_enable(src);
433 }
434
435 if ((config->interrupt.tint1Priority != 0) || (config->interrupt.tint1IsrProvider == IfxSrc_Tos_dma))
436 {
437 volatile Ifx_SRC_SRCR *src = IfxEray_getTimerInterrupt1SrcPtr(eraySFR);
438 IfxSrc_init(src, config->interrupt.tint1IsrProvider, config->interrupt.tint1Priority);
439 IfxSrc_enable(src);
440 }
441
442 if ((config->interrupt.mbsc0Priority != 0) || (config->interrupt.mbsc0IsrProvider == IfxSrc_Tos_dma))
443 {
444 volatile Ifx_SRC_SRCR *src = IfxEray_getMessageBufferStatus0SrcPtr(eraySFR);
445 IfxSrc_init(src, config->interrupt.mbsc0IsrProvider, config->interrupt.mbsc0Priority);
446 IfxSrc_enable(src);
447 }
448
449 if ((config->interrupt.mbsc1Priority != 0) || (config->interrupt.mbsc1IsrProvider == IfxSrc_Tos_dma))
450 {
451 volatile Ifx_SRC_SRCR *src = IfxEray_getMessageBufferStatus1SrcPtr(eraySFR);
452 IfxSrc_init(src, config->interrupt.mbsc1IsrProvider, config->interrupt.mbsc1Priority);
453 IfxSrc_enable(src);
454 }
455
456 if ((config->interrupt.ibusyPriority != 0) || (config->interrupt.ibusyIsrProvider == IfxSrc_Tos_dma))
457 {
458 volatile Ifx_SRC_SRCR *src = IfxEray_getInputBufferBusySrcPtr(eraySFR);
459 IfxSrc_init(src, config->interrupt.ibusyIsrProvider, config->interrupt.ibusyPriority);
460 IfxSrc_enable(src);
461 }
462
463 if ((config->interrupt.obusyPriority != 0) || (config->interrupt.obusyIsrProvider == IfxSrc_Tos_dma))
464 {
465 volatile Ifx_SRC_SRCR *src = IfxEray_getOutputBufferBusySrcPtr(eraySFR);
466 IfxSrc_init(src, config->interrupt.obusyIsrProvider, config->interrupt.obusyPriority);
467 IfxSrc_enable(src);
468 }
469
470 if ((config->interrupt.ndat0Priority != 0) || (config->interrupt.ndat0IsrProvider == IfxSrc_Tos_dma))
471 {
472 volatile Ifx_SRC_SRCR *src = IfxEray_getNewDataInterrupt0SrcPtr(eraySFR);
473 IfxSrc_init(src, config->interrupt.ndat0IsrProvider, config->interrupt.ndat0Priority);
474 IfxSrc_enable(src);
475 }
476
477 if ((config->interrupt.ndat1Priority != 0) || (config->interrupt.ndat1IsrProvider == IfxSrc_Tos_dma))
478 {
479 volatile Ifx_SRC_SRCR *src = IfxEray_getNewDataInterrupt1SrcPtr(eraySFR);
480 IfxSrc_init(src, config->interrupt.ndat1IsrProvider, config->interrupt.ndat1Priority);
481 IfxSrc_enable(src);
482 }
483 }
484 }
485
486
487 void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
488 {
489 config->module = eray;
490 config->interrupt.int0IsrProvider = IfxSrc_Tos_cpu0;
491 config->interrupt.int1IsrProvider = IfxSrc_Tos_cpu0;
492 config->interrupt.tint0IsrProvider = IfxSrc_Tos_cpu0;
493 config->interrupt.tint1IsrProvider = IfxSrc_Tos_cpu0;
494 config->interrupt.ndat0IsrProvider = IfxSrc_Tos_cpu0;
495 config->interrupt.ndat1IsrProvider = IfxSrc_Tos_cpu0;
496 config->interrupt.mbsc0IsrProvider = IfxSrc_Tos_cpu0;
497 config->interrupt.mbsc1IsrProvider = IfxSrc_Tos_cpu0;
498 config->interrupt.ibusyIsrProvider = IfxSrc_Tos_cpu0;
499 config->interrupt.obusyIsrProvider = IfxSrc_Tos_cpu0;
500
501 config->interrupt.int0Priority = 0;
502 config->interrupt.int1Priority = 0;
503 config->interrupt.tint0Priority = 0;
504 config->interrupt.tint1Priority = 0;
505 config->interrupt.ndat0Priority = 0;
506 config->interrupt.ndat1Priority = 0;
507 config->interrupt.mbsc0Priority = 0;
508 config->interrupt.mbsc1Priority = 0;
509 config->interrupt.ibusyPriority = 0;
510 config->interrupt.obusyPriority = 0;
511 }
512
513
514 void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
515 {
516 Ifx_ERAY *eraySFR = eray->eray;
517
518 Ifx_ERAY_FSR fifoStatus = IfxEray_getFifoStatus(eraySFR);
519
520 // Check if FIFO is not empty
521 if (fifoStatus.B.RFNE == 1)
522 {
523 if (fifoStatus.B.RFO == 1)
524 {
525 //FIX ME: FIFO overrun error
526 }
527 else
528 {
529 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
530 {}
531
532 IfxEray_receiveHeader(eraySFR, config->headerReceived);
533 IfxEray_receiveData(eraySFR, config->dataReceived);
534 //Transfer the first message buffer ID of FIFO
535 IfxEray_setRxBufferNumber(eraySFR, IfxEray_getFifoIndex(eraySFR));
536 IfxEray_setReceiveRequest(eraySFR, config->receiveRequested);
537
538 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR))
539 {}
540
541 if (config->swapRequested && (IfxEray_getOutputBuffer(eraySFR) != config->bufferIndex))
542 {
543 IfxEray_setViewData(eraySFR, config->swapRequested);
544 }
545 }
546 }
547 }
548
549
550 void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
551 {
552 Ifx_ERAY *eraySFR = eray->eray;
553
554 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
555 {}
556
557 IfxEray_receiveHeader(eraySFR, config->headerReceived);
558 IfxEray_receiveData(eraySFR, config->dataReceived);
559 IfxEray_setRxBufferNumber(eraySFR, config->bufferIndex);
560 IfxEray_setReceiveRequest(eraySFR, config->receiveRequested);
561
562 while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
563 {}
564
565 if (config->swapRequested && (IfxEray_getOutputBuffer(eraySFR) != config->bufferIndex))
566 {
567 IfxEray_setViewData(eraySFR, config->swapRequested);
568 }
569 }
570
571
572 void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
573 {
574 Ifx_ERAY *eraySFR = eray->eray;
575
576 while (IfxEray_getInputBufferBusyHostStatus(eraySFR) == TRUE)
577 {}
578
579 IfxEray_sendHeader(eraySFR, transmitControl->headerTransfered);
580 IfxEray_sendData(eraySFR, transmitControl->dataTransfered);
581 IfxEray_setTransmitRequest(eraySFR, transmitControl->transferRequested);
582 IfxEray_setTxBufferNumber(eraySFR, transmitControl->bufferIndex);
583
584 while (IfxEray_getInputBufferBusyShadowStatus(eraySFR) == TRUE)
585 {}
586
587 while (IfxEray_getInputBufferBusyHostStatus(eraySFR) == TRUE)
588 {}
589 }
IfxEray_Eray_Gtu04Config::networkStartIdleTime
uint16 networkStartIdleTime
starting point of Network Idle Time Phase.
Definition: IfxEray_Eray.h:543
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:48
IfxEray_setCollisionAvoidanceDuration
IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
Sets CAS symbol window duration.
Definition: IfxEray.h:1537
IfxEray_Eray_initModuleConfig
void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer.
Definition: IfxEray_Eray.c:487
IfxEray_Eray_GTUConfig::gtu07Config
IfxEray_Eray_Gtu07Config gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:622
IfxEray_Eray_Succ3Config::clockCorrectionCyclesHalt
uint8 clockCorrectionCyclesHalt
maximum number of cycles missing clock correctionlead to active or passive to halt.
Definition: IfxEray_Eray.h:707
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:278
IfxMtu.h
MTU basic functionality.
IfxEray_ReceiveChannel_a
channel B for reception
Definition: IfxEray.h:299
IfxEray_Eray_NodeA::txEnOutMode
IfxPort_OutputMode txEnOutMode
the TXEN pin output mode which should be configured.
Definition: IfxEray_Eray.h:636
IfxEray_getOutputBuffer
IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
Gets the output buffer index.
Definition: IfxEray.h:1332
IfxEray_Eray_Interrupt::ndat0Priority
uint16 ndat0Priority
the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:737
IfxEray_Eray_Gtu05Config::decodingCorrection
uint8 decodingCorrection
decoding correction to determine the primary time reference point.
Definition: IfxEray_Eray.h:554
IfxEray_Eray_Interrupt::mbsc1Priority
uint16 mbsc1Priority
the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:740
IfxEray_Baudrate_10
baudrate is 10MBits/Sec
Definition: IfxEray.h:64
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:265
IfxEray_Eray_Config::module
Ifx_ERAY * module
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:812
IfxEray_initRxPinWithPadLevel
IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of pin direction as input and configuring pad driver...
Definition: IfxEray.h:1809
IfxEray_TransmissionSlotMode_single
transmission in key slot.
Definition: IfxEray.h:343
IfxEray_Eray_NodeA::rxIn
IFX_CONST IfxEray_Rxd_In * rxIn
the RX Pin which should be configured.
Definition: IfxEray_Eray.h:637
IfxMtu_MbistSel_erayObf
Definition: IfxMtu_cfg.h:86
IfxEray_Eray_Succ1Config::channelAConnectedNode
boolean channelAConnectedNode
whether the node is connected to channel A.
Definition: IfxEray_Eray.h:690
IfxEray_Eray_Succ1Config::transmissionSlotMode
IfxEray_TransmissionSlotMode transmissionSlotMode
Initial transmission mode.
Definition: IfxEray_Eray.h:686
IfxEray_setStaticSlots
IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
Sets static slots count and length.
Definition: IfxEray.h:1720
IfxEray_Eray_initModule
void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration.
Definition: IfxEray_Eray.c:385
IfxEray_initTxEnPin
IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
Initializes a TX Enable output.
Definition: IfxEray.h:1411
IfxEray_Eray_Gtu11Config::externalRate
IfxEray_ExternalRate externalRate
External rate correction control.
Definition: IfxEray_Eray.h:605
IfxEray_Eray_Interrupt::obusyPriority
uint16 obusyPriority
the output buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:742
IfxEray_Eray_TransmitControl::headerTransfered
boolean headerTransfered
whether header section of frame is transfered or not.
Definition: IfxEray_Eray.h:848
IfxEray_receiveData
IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
requests to receive data from message buffer.
Definition: IfxEray.h:1437
IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:757
IfxEray_setBufferReconfigSecure
IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
Sets secured buffers in message RAM.
Definition: IfxEray.h:1481
IfxEray_Eray_GTUConfig::gtu01Config
IfxEray_Eray_Gtu01Config gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:616
IfxEray_Eray_Gtu03Config::channelBMacrotickInitialOffset
uint8 channelBMacrotickInitialOffset
difference between two adjacent static slots on channel B in macroticks.
Definition: IfxEray_Eray.h:536
IfxEray_Eray_NodeA::txEnOut
IFX_CONST IfxEray_Txen_Out * txEnOut
the TXEN Pin which should be configured.
Definition: IfxEray_Eray.h:639
IfxEray_waitForPocState
IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
Waits until the controller enters required POC state.
Definition: IfxEray.h:1802
IfxEray_Eray_NodeConfig
Node configuration structure.
Definition: IfxEray_Eray.h:818
IfxEray_Eray_Interrupt::ibusyPriority
uint16 ibusyPriority
the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:741
IfxEray_setOffsetCorrection
IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
Sets offset correction starting point.
Definition: IfxEray.h:1678
IfxEray_Eray_ControllerConfig::succ1Config
IfxEray_Eray_Succ1Config succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:722
IfxEray_Eray_Node_initConfig
void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer.
Definition: IfxEray_Eray.c:186
IfxEray_setBaudrate
IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
Sets baudrate on Flexray bus.
Definition: IfxEray.h:1475
IfxEray_Eray_Prtc2Control::receiveWakeupIdleTime
uint8 receiveWakeupIdleTime
duration of received wakeup symbol idle phase.
Definition: IfxEray_Eray.h:671
IfxEray_Eray_ControllerConfig::networkVectorLength
uint32 networkVectorLength
length of network management vector.
Definition: IfxEray_Eray.h:718
IfxEray_ExternalOffset_noCorrection
No external correction control.
Definition: IfxEray.h:153
IfxEray_Eray_Gtu10Config::maxOffsetCorrection
uint16 maxOffsetCorrection
maximum offset correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:594
IfxEray_setClusterStartupDeviation
IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
Sets cluster startup deviation.
Definition: IfxEray.h:1531
IfxEray_setWakeupPatternChannel
IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
Sets the cluster wakeup channel.
Definition: IfxEray.h:1796
IfxEray_Eray_Node_initMessageRAM
IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
Inialises the message RAM.
Definition: IfxEray_Eray.c:342
IfxMtu_clearSram
void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:60
IfxEray_setTxBufferNumber
IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
Sets the transmit buffer number.
Definition: IfxEray.h:1784
IfxMtu_MbistSel_erayMbf
Definition: IfxMtu_cfg.h:88
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:57
IfxEray_Eray_Gtu09Config::staticActionPoint
uint8 staticActionPoint
static slots and symbol window action point.
Definition: IfxEray_Eray.h:585
IfxEray_getNewDataInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the NDAT0 service request.
Definition: IfxEray.h:1307
IfxEray_Eray_TransmitControl::dataTransfered
boolean dataTransfered
whether data section of message buffer is transfered or not.
Definition: IfxEray_Eray.h:849
IfxEray_Eray_NodeConfig::controllerConfig
IfxEray_Eray_ControllerConfig controllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:821
IfxEray_Eray_Succ1Config::numberOfCyclePairsForActive
uint8 numberOfCyclePairsForActive
number of even / odd cycle pairs that must have valid clock correction terms.
Definition: IfxEray_Eray.h:684
IfxEray_Eray_Gtu03Config::channelAMicrotickInitialOffset
uint8 channelAMicrotickInitialOffset
difference between adjacent time reference points on channel A in microticks.
Definition: IfxEray_Eray.h:533
IfxEray_setActiveCyclePairs
IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
Sets number of cycle pairs for Active state.
Definition: IfxEray.h:1461
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEray_Eray_Succ1Config::channelASymbolTransmitted
boolean channelASymbolTransmitted
selects channel A for MTS symbol transmission.
Definition: IfxEray_Eray.h:688
IfxEray_Eray_receiveFrame
void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer.
Definition: IfxEray_Eray.c:550
IfxEray_Eray_Interrupt::int1Priority
uint16 int1Priority
the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:734
IfxEray_WakeupChannel_a
send wakeup channel pattern on channel A
Definition: IfxEray.h:350
IfxEray_Eray_Gtu09Config::dynamicActionPoint
uint8 dynamicActionPoint
dynamic slots action point.
Definition: IfxEray_Eray.h:586
IfxEray_Eray_transmitFrame
void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot.
Definition: IfxEray_Eray.c:572
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxEray_Eray_Interrupt::tint1IsrProvider
IfxSrc_Tos tint1IsrProvider
the timer interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:746
IfxEray_Eray_Gtu11Config::externalOffsetCorrection
IfxEray_ExternalOffsetCorrection externalOffsetCorrection
External clock offset correction value.
Definition: IfxEray_Eray.h:602
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxEray_receiveHeader
IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
request to receive header section from message buffer.
Definition: IfxEray.h:1443
IfxEray_Eray_GTUConfig::gtu05Config
IfxEray_Eray_Gtu05Config gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:620
IfxEray_getInputBufferBusyHostStatus
IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
Gets the Input Buffer Host Busy status.
Definition: IfxEray.h:1249
IfxEray_Eray_Prtc1Control::transmissionStartTime
uint16 transmissionStartTime
duration of transmission start time.
Definition: IfxEray_Eray.h:664
IfxEray_Eray_Interrupt::tint0Priority
uint16 tint0Priority
the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:735
IfxEray_setTransmissionStartTime
IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
Sets transmission start time duration.
Definition: IfxEray.h:1757
IfxEray_setExternalCorrectionControl
IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
Sets external correction controls.
Definition: IfxEray.h:1569
IfxEray_Eray_MessageRAMConfig::fifoDepth
uint8 fifoDepth
fifo critical level.
Definition: IfxEray_Eray.h:762
IfxEray_setTransmitRequest
IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
Sets transfer request to send frame.
Definition: IfxEray.h:1763
IfxEray_getTimerInterrupt0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
Gets the TINT0 service request.
Definition: IfxEray.h:1365
IfxEray_Eray_Gtu11Config::externalOffset
IfxEray_ExternalOffset externalOffset
External offset correction control.
Definition: IfxEray_Eray.h:604
IfxEray_setMessageHandlerConfigurations
IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
Sets Message Handler configurations.
Definition: IfxEray.h:1649
IfxEray_Eray_MessageRAMConfig::fifoConfigured
boolean fifoConfigured
Whether receive FIFO configured or not.
Definition: IfxEray_Eray.h:770
IfxEray_Eray_GTUConfig::gtu11Config
IfxEray_Eray_Gtu11Config gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:626
IfxEray_Eray_ControllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:716
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure.
Definition: IfxEray_Eray.h:614
IfxEray_Eray_Prtc2Control::receiveWakeupLowTime
uint8 receiveWakeupLowTime
duration of received wakeup symbol low phase.
Definition: IfxEray_Eray.h:672
IfxEray_PocState_halt
controller entered halt state
Definition: IfxEray.h:272
IfxEray_Eray_ControllerConfig::staticFramepayload
uint8 staticFramepayload
payload length of static frame in double bytes.
Definition: IfxEray_Eray.h:719
IfxEray_Eray_GTUConfig::gtu03Config
IfxEray_Eray_Gtu03Config gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:618
IfxEray_setMaxSynchFrames
IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
Sets maximum synch frames in a cluster.
Definition: IfxEray.h:1637
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxEray_setListenTimeOuts
IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
Sets startup or wakeup listen timeouts.
Definition: IfxEray.h:1614
IfxEray_Eray_MessageRAMConfig::slotControl
IfxEray_SlotConfig * slotControl[128]
Transmit control properties.
Definition: IfxEray_Eray.h:772
IfxEray_sendData
IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
sets the bit to send data in frame.
Definition: IfxEray.h:1449
IfxEray_ExternalOffsetCorrection_0
external clock offset correction value 0
Definition: IfxEray.h:162
IfxEray_PocState_config
controller entered config state
Definition: IfxEray.h:274
IfxEray_Eray_GTUConfig::gtu06Config
IfxEray_Eray_Gtu06Config gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:621
IfxEray_setStrobePosition
IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
Sets sample point for strobing.
Definition: IfxEray.h:1727
IfxEray_Eray_Succ2Config::listenTimeOut
uint32 listenTimeOut
wakeup or startup listen timeout in microticks.
Definition: IfxEray_Eray.h:698
IfxEray_Eray_GTUConfig::gtu09Config
IfxEray_Eray_Gtu09Config gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:624
IfxEray_Eray_Prtc1Control::strobePosition
IfxEray_StrobePosition strobePosition
sample count value for strobing.
Definition: IfxEray_Eray.h:660
IfxMtu_enableModule
IFX_INLINE void IfxMtu_enableModule(void)
Enables the MTU module.
Definition: IfxMtu.h:487
IfxEray_Eray_Gtu07Config::staticSlotsCount
uint16 staticSlotsCount
number of static slots in a communication cycle.
Definition: IfxEray_Eray.h:570
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxEray_Eray_ControllerConfig::prtc1Control
IfxEray_Eray_Prtc1Control prtc1Control
protocol operation control properties.
Definition: IfxEray_Eray.h:725
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxEray_getInputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the IBUSY service request.
Definition: IfxEray.h:1261
IfxEray_Eray_Prtc2Control::transmitWakeupLowTime
uint8 transmitWakeupLowTime
duration of transmit wakeup symbol low phase.
Definition: IfxEray_Eray.h:674
IfxEray_Eray_NodeA::rxInMode
IfxPort_InputMode rxInMode
the RX pin input mode which should be configured
Definition: IfxEray_Eray.h:633
IfxEray_Eray_Gtu05Config::channelAReceptionDelay
uint8 channelAReceptionDelay
reception delay on channel A.
Definition: IfxEray_Eray.h:551
IfxEray_Eray_Succ1Config::startupFrameTransmitted
boolean startupFrameTransmitted
whether the key slot is used to transmit startup Frames.
Definition: IfxEray_Eray.h:681
IfxEray_getFifoIndex
IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
Gets the FIFO index.
Definition: IfxEray.h:1235
IfxEray_Eray_Interrupt::mbsc0IsrProvider
IfxSrc_Tos mbsc0IsrProvider
the message buffer status changed interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:749
IfxEray_setAutoDelayBuffers
IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
Sets auto delays between input, output buffers and message RAM.
Definition: IfxEray.h:1467
IfxEray_Eray_Succ2Config::listenTimeOutNoise
IfxEray_ListenTimeOutNoise listenTimeOutNoise
upper limit for startup and wakeup listen timeout in the presence of noise.
Definition: IfxEray_Eray.h:699
IfxEray_setViewData
IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
Swaps the shadow and Host output registers.
Definition: IfxEray.h:1790
IfxEray_Eray_Config
Module configuration structure.
Definition: IfxEray_Eray.h:810
IfxEray_Eray_Interrupt::ndat1Priority
uint16 ndat1Priority
the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:738
IfxEray_setFifoBufferStartIndex
IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
Sets FIFO buffer start idex.
Definition: IfxEray.h:1583
IfxEray_Eray_Interrupt::ndat1IsrProvider
IfxSrc_Tos ndat1IsrProvider
the new data interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:748
IfxEray_setRxBufferNumber
IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
sets buffer number in which frame is received.
Definition: IfxEray.h:1698
IfxEray_setFifoMessageBufferConfigurations
IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
Sets FIFO configurations.
Definition: IfxEray.h:1599
IfxEray_Eray_Interrupt::int0IsrProvider
IfxSrc_Tos int0IsrProvider
the interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:743
IfxEray_setTransmissionSlotMode
IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
Sets the transmit slot mode.
Definition: IfxEray.h:1751
IfxEray_getInputBufferBusyShadowStatus
IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Input Buffer Shadow status.
Definition: IfxEray.h:1255
IfxEray_getNewDataInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the NDAT1 service request.
Definition: IfxEray.h:1314
IfxEray_setMaxCorrectionValues
IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
Sets max limit correction values.
Definition: IfxEray.h:1630
IfxEray_setCycleDurationMicroticks
IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
sets duration of the communication cycle in Microticks.
Definition: IfxEray.h:1549
IfxEray_Eray_NodeA::txOutMode
IfxPort_OutputMode txOutMode
the TX pin output mode which should be configured.
Definition: IfxEray_Eray.h:634
IfxEray_setReceiveRequest
IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
requests to receive the frame.
Definition: IfxEray.h:1684
IfxEray_Eray_Succ3Config::clockCorrectionCyclesPassive
uint8 clockCorrectionCyclesPassive
maximum number of cycles missing clock correction lead active to passive state.
Definition: IfxEray_Eray.h:706
IfxEray_Eray_Interrupt::ndat0IsrProvider
IfxSrc_Tos ndat0IsrProvider
the new data interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:747
IfxEray_Eray_Succ1Config::maxColdStartAttempts
uint8 maxColdStartAttempts
maximum number of attempts that a cold starting node is permitted.
Definition: IfxEray_Eray.h:683
IfxEray_setCycleDurationMacroticks
IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
sets duration of the communication cycle in Macroticks.
Definition: IfxEray.h:1543
IfxEray_Eray_Gtu02Config::maxSyncFrames
uint8 maxSyncFrames
Maximum number of sync frames in a cluster.
Definition: IfxEray_Eray.h:526
IfxEray_getInterruptLine0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
Gets the INT0 service request.
Definition: IfxEray.h:1268
IfxEray_setNodeChannels
IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
Sets channels connected to node.
Definition: IfxEray.h:1671
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
IfxEray_setChannelAInitialOffsets
IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
Sets channel A initial offstes.
Definition: IfxEray.h:1487
IfxEray_Eray_Gtu01Config::microticksPerCycle
uint32 microticksPerCycle
Duration of the communication cycle in Microticks.
Definition: IfxEray_Eray.h:518
IfxEray_PocCommand_freeze
command to controller to enter FREEZE
Definition: IfxEray.h:256
IfxEray_getInterruptLine1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
Gets the INT1 service request.
Definition: IfxEray.h:1275
IfxEray_Eray_ReceiveControl::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray_Eray.h:833
IfxEray_setExternalCorrectionValues
IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
Sets external correction values.
Definition: IfxEray.h:1576
IfxEray_Eray_GTUConfig::gtu08Config
IfxEray_Eray_Gtu08Config gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:623
IfxEray_getTimerInterrupt1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
Gets the TINT1 service request.
Definition: IfxEray.h:1372
IfxEray_Eray_Interrupt::int0Priority
uint16 int0Priority
the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:733
IfxEray_Eray_Pins::nodeBPins
IFX_CONST IfxEray_Eray_NodeB * nodeBPins
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:785
IfxEray_Eray_ControllerConfig::latestTransmissionStart
uint8 latestTransmissionStart
number of dynamic slots before inhibit frame transmission in dynamic segment.
Definition: IfxEray_Eray.h:720
IfxEray_Eray_MessageRAMConfig::bufferReconfigEnabled
boolean bufferReconfigEnabled
whether reconfiguration of message buffers is enabled or not.
Definition: IfxEray_Eray.h:769
IfxEray_Eray_Succ1Config::wakeupPatternChannel
IfxEray_WakeupChannel wakeupPatternChannel
Wakeup pattern carry channel.
Definition: IfxEray_Eray.h:685
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxEray_getMessageBufferStatus0SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
Gets the MBSC0 service request.
Definition: IfxEray.h:1293
IfxEray_Eray_receiveFifoFrame
void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer.
Definition: IfxEray_Eray.c:514
IfxEray_setSymbolChannels
IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
Sets channels which transmits symbols.
Definition: IfxEray.h:1744
IfxEray_Eray_ControllerConfig::succ3Config
IfxEray_Eray_Succ3Config succ3Config
clock correction fail properties.
Definition: IfxEray_Eray.h:724
IfxEray_Eray_Interrupt::tint0IsrProvider
IfxSrc_Tos tint0IsrProvider
the timer interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:745
IfxEray_setNetworkStartIdleTime
IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
Sets network start Idle time.
Definition: IfxEray.h:1659
IfxEray_Eray_MessageRAMConfig::fifoNullFramesRejected
boolean fifoNullFramesRejected
whether null frames stored in fifo or not.
Definition: IfxEray_Eray.h:768
IfxEray_setClusterDriftValues
IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
Sets cluster drift values.
Definition: IfxEray.h:1524
IfxEray_setChannelsReceiveDelay
IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
Sets receive delays on channels.
Definition: IfxEray.h:1501
IfxEray_setTransmitWakeupTimes
IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
Sets transmit wakeup times.
Definition: IfxEray.h:1769
IfxEray_Eray_GTUConfig::gtu04Config
IfxEray_Eray_Gtu04Config gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:619
IfxEray_setFifoFilterConfigurations
IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
Sets FIFO filter configurations.
Definition: IfxEray.h:1590
IfxEray_getOutputBufferBusySrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
Gets the OBUSY service request.
Definition: IfxEray.h:1344
IfxEray_initTxPin
IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxEray.h:1418
IfxEray_Eray_ReceiveControl::dataReceived
boolean dataReceived
whether data selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:830
IfxEray_ExternalRateCorrection_0
external clock rate correction value 0
Definition: IfxEray.h:185
IfxEray_Eray_Gtu07Config::staticSlotLength
uint16 staticSlotLength
duration of static slot in macroticks.
Definition: IfxEray_Eray.h:569
IfxEray_Eray_Node_init
void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration.
Definition: IfxEray_Eray.c:66
IfxEray_Eray_Gtu08Config::dynamicSlotCount
uint16 dynamicSlotCount
number of dynamic slots in a communication cycle.
Definition: IfxEray_Eray.h:578
IfxEray_Eray_Prtc1Control::baudrate
IfxEray_Baudrate baudrate
baud rate on the flexray bus.
Definition: IfxEray_Eray.h:661
IfxEray_setFirstDynamicBuffer
IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
Sets first dynamic buffer.
Definition: IfxEray.h:1607
IfxEray_Eray_NodeConfig::pins
IFX_CONST IfxEray_Eray_Pins * pins
Pins configuration structure.
Definition: IfxEray_Eray.h:822
IfxEray_Eray_Interrupt::mbsc1IsrProvider
IfxSrc_Tos mbsc1IsrProvider
the message buffer status changed interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:750
IfxEray_Eray_Interrupt::int1IsrProvider
IfxSrc_Tos int1IsrProvider
the interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:744
IfxEray_Eray::eray
Ifx_ERAY * eray
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:796
IfxEray_sendHeader
IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
sets the bit to send header in frame.
Definition: IfxEray.h:1455
IfxEray_getOutputBufferBusyShadowStatus
IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
Gets the Output Buffer Shadow status.
Definition: IfxEray.h:1338
IfxEray_Eray_Prtc1Control::transmitWakeupRepetitions
uint8 transmitWakeupRepetitions
duration of transmitted wakeup pattern in bit times.
Definition: IfxEray_Eray.h:663
IfxEray_Eray_Succ1Config::channelBConnectedNode
boolean channelBConnectedNode
whether the node is connected to channel B.
Definition: IfxEray_Eray.h:691
IfxEray_Eray_MessageRAMConfig::firstDynamicBuffer
uint8 firstDynamicBuffer
first dynamic buffer index.
Definition: IfxEray_Eray.h:759
IfxEray_Eray_Prtc1Control::collisionAvoidanceDuration
uint8 collisionAvoidanceDuration
accepted duration of collision avoidance symbol.
Definition: IfxEray_Eray.h:659
IfxEray_Eray_Succ1Config::channelBSymbolTransmitted
boolean channelBSymbolTransmitted
selects channel B for MTS symbol transmission
Definition: IfxEray_Eray.h:689
IfxEray_Eray_ReceiveControl::swapRequested
boolean swapRequested
whether output buffer shadow and output buffer host are swapped or not.
Definition: IfxEray_Eray.h:831
IfxEray_setDecodingCorrectionValue
IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
Sets decoding correction value.
Definition: IfxEray.h:1555
IfxEray_Eray_Gtu05Config::channelBReceptionDelay
uint8 channelBReceptionDelay
reception delay on channel B.
Definition: IfxEray_Eray.h:552
IfxEray_Eray_NodeConfig::messageRAMConfig
IfxEray_Eray_MessageRAMConfig messageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:820
IfxEray_setReceiveWakeupTimes
IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
Sets receive wakeup times.
Definition: IfxEray.h:1690
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxEray_Eray_GTUConfig::gtu02Config
IfxEray_Eray_Gtu02Config gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:617
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:39
IfxEray_setDynamicSlots
IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
Sets dynamic slots count and length.
Definition: IfxEray.h:1561
IfxEray_Eray_MessageRAMConfig::header
IfxEray_Header * header[128]
Header section of message buffer.
Definition: IfxEray_Eray.h:771
IfxEray_MaxSynchFrames
IfxEray_MaxSynchFrames
Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
Definition: IfxEray.h:227
IfxEray_setMaxColdStartAttempts
IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
Sets the maximum cold start attempts for active state.
Definition: IfxEray.h:1624
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxEray_Eray_ReceiveControl::headerReceived
boolean headerReceived
whether header selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:829
IfxEray_ExternalRate_noCorrection
No external correction control.
Definition: IfxEray.h:176
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxEray_Eray_Gtu08Config::dynamicSlotLength
uint8 dynamicSlotLength
duration of dynamic slot in macroticks.
Definition: IfxEray_Eray.h:577
IfxEray_Eray_MessageRAMConfig::staticFifoDisabled
boolean staticFifoDisabled
fifo is not used in static segment.
Definition: IfxEray_Eray.h:767
IfxEray_Eray_Node_initGTU
IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
Initialises the Global Timing Unit.
Definition: IfxEray_Eray.c:318
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:250
IfxEray_setChannelBInitialOffsets
IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
Sets channel B initial offstes.
Definition: IfxEray.h:1494
IfxEray_Eray_Interrupt::ibusyIsrProvider
IfxSrc_Tos ibusyIsrProvider
the input buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:751
IfxEray_setSlotActionPoints
IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
Sets slots action points.
Definition: IfxEray.h:1713
IfxMtu_MbistSel_erayIbfTbf
Definition: IfxMtu_cfg.h:87
IfxEray_setNetworkVectorLength
IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
Sets network management vector length.
Definition: IfxEray.h:1665
IfxEray_Eray_Pins::nodeAPins
IFX_CONST IfxEray_Eray_NodeA * nodeAPins
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:784
IfxEray_setMessageBufferCount
IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
Sets number of message buffers.
Definition: IfxEray.h:1643
IfxEray_Eray_Pins
Pins configuration structure.
Definition: IfxEray_Eray.h:782
IfxEray_ListenTimeOutNoise_16
listen Time-out noise 16
Definition: IfxEray.h:222
IfxEray_Eray_ReceiveControl
Receive control properties structure.
Definition: IfxEray_Eray.h:827
IfxEray_PocState_defaultConfig
controller entered default config state
Definition: IfxEray.h:268
IfxEray_Eray_MessageRAMConfig::fifoBufferStartIndex
uint32 fifoBufferStartIndex
message buffers assigned FIFO.
Definition: IfxEray_Eray.h:761
IfxEray_Eray_ControllerConfig::prtc2Control
IfxEray_Eray_Prtc2Control prtc2Control
wakeup symbol control properties.
Definition: IfxEray_Eray.h:726
IfxEray_Eray_MessageRAMConfig::data
uint32 * data[128]
data section of message buffer.
Definition: IfxEray_Eray.h:773
IfxEray_Eray_Gtu02Config::macroticksPerCycle
uint16 macroticksPerCycle
Duration of the communication cycle in Macroticks.
Definition: IfxEray_Eray.h:525
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1351
IfxEray_Eray_MessageRAMConfig::frameIdFilter
uint16 frameIdFilter
Frame ID used for rejection filtering.
Definition: IfxEray_Eray.h:763
IfxEray_Eray.h
ERAY ERAY details.
IfxEray_Eray_MessageRAMConfig::numberOfMessageBuffers
uint8 numberOfMessageBuffers
last configured buffer.
Definition: IfxEray_Eray.h:760
IfxEray_Eray_ReceiveControl::receiveRequested
boolean receiveRequested
Definition: IfxEray_Eray.h:832
IfxEray_Eray_Gtu10Config::maxRateCorrection
uint16 maxRateCorrection
maximum rate correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:595
IfxEray_Eray_Succ1Config::clockSyncErrorHalt
boolean clockSyncErrorHalt
transition to HALT state due to a clock synchronization error.
Definition: IfxEray_Eray.h:687
IfxEray_IdleDynamicSlots_1
duration of dynamic slot idle phase is 1
Definition: IfxEray.h:200
IfxEray_Eray_MessageRAMConfig::receiveChannel
IfxEray_ReceiveChannel receiveChannel
FIFO receive channel.
Definition: IfxEray_Eray.h:764
IfxEray_getFifoStatus
IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
Gets the FIFO status.
Definition: IfxEray.h:1241
IfxEray_Eray_Succ1Config::syncFrameTransmitted
boolean syncFrameTransmitted
whether the key slot is used to transmit SYNC Frames.
Definition: IfxEray_Eray.h:682
IfxEray_Eray_NodeA::txOut
IFX_CONST IfxEray_Txd_Out * txOut
the TX Pin which should be configured.
Definition: IfxEray_Eray.h:638
IfxEray_Eray_NodeA
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:631
IfxEray_Eray_NodeB
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:644
IfxEray_Eray_TransmitControl::transferRequested
boolean transferRequested
whether frame in a slot is transfered or not.
Definition: IfxEray_Eray.h:850
IfxEray_StrobePosition_5
Sample count 5 for strobing.
Definition: IfxEray.h:316
IfxEray_enableModule
IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
Enables the ERAY module.
Definition: IfxEray.h:1211
IfxEray_Eray_TransmitControl
Transfer control in a slot.
Definition: IfxEray_Eray.h:846
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxEray_Eray
ERAY Module handle.
Definition: IfxEray_Eray.h:794
IfxEray_Eray_NodeA::pinDriver
IfxPort_PadDriver pinDriver
the pad driver mode which should be configured.
Definition: IfxEray_Eray.h:635
IfxEray_Eray_Gtu05Config::clusterDrift
uint8 clusterDrift
cluster drift damping value used in clock synchronization.
Definition: IfxEray_Eray.h:553
IfxEray_Eray_Gtu11Config::externalRateCorrection
IfxEray_ExternalRateCorrection externalRateCorrection
External clock rate correction value.
Definition: IfxEray_Eray.h:603
IfxEray_Eray_Gtu09Config::idleDynamicSlots
IfxEray_IdleDynamicSlots idleDynamicSlots
duration of dynamic slot idle phase.
Definition: IfxEray_Eray.h:587
IfxEray_Eray_ControllerConfig::gtuConfig
IfxEray_Eray_GTUConfig gtuConfig
gloabl timing unit configuration structure.
Definition: IfxEray_Eray.h:721
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxEray_clearAllFlags
void IfxEray_clearAllFlags(Ifx_ERAY *eray)
Clears all the error flags.
Definition: IfxEray.c:106
IfxEray_enableInterruptLines
void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
Enables all the Interrupt lines.
Definition: IfxEray.c:116
IfxEray_Eray_Interrupt::obusyIsrProvider
IfxSrc_Tos obusyIsrProvider
the output buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:752
IfxEray_getMessageBufferStatus1SrcPtr
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
Gets the MBSC1 service request.
Definition: IfxEray.h:1300
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxEray_Eray_ControllerConfig::succ2Config
IfxEray_Eray_Succ2Config succ2Config
communication listen timeout properties.
Definition: IfxEray_Eray.h:723
IfxEray_Eray_Interrupt::mbsc0Priority
uint16 mbsc0Priority
the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:739
IfxEray_setTransmittedFrames
IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
Configures transmitted frames for startup and synchronization.
Definition: IfxEray.h:1777
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:82
IfxEray_Eray_GTUConfig::gtu10Config
IfxEray_Eray_Gtu10Config gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:625
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxEray_Eray_Gtu03Config::channelAMacrotickInitialOffset
uint8 channelAMacrotickInitialOffset
difference between two adjacent static slots on channel A in macroticks.
Definition: IfxEray_Eray.h:535
IfxEray_Eray_Gtu04Config::correctionOffset
uint16 correctionOffset
offset correction start point.
Definition: IfxEray_Eray.h:544
IfxEray_Eray_Prtc1Control::receiveWakeupTestDuration
uint8 receiveWakeupTestDuration
duration of received wakeup pattern in bit times.
Definition: IfxEray_Eray.h:662
IfxEray_Eray_Gtu06Config::maxDriftOffset
uint16 maxDriftOffset
maximum drift offset between two nodes.
Definition: IfxEray_Eray.h:562
IfxEray_setClockSynchErrorHalt
IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
lead to halt state in clock synch error.
Definition: IfxEray.h:1518
IfxEray_Eray_Prtc2Control::transmitWakeupIdleTime
uint8 transmitWakeupIdleTime
duration of transmit wakeup symbol idle phase.
Definition: IfxEray_Eray.h:673
IfxEray_Eray_MessageRAMConfig::filteredCycleNumber
uint8 filteredCycleNumber
the cycle set to which Frame ID and channel rejection filter are applied.
Definition: IfxEray_Eray.h:766
IfxEray_Eray_Gtu03Config::channelBMicrotickInitialOffset
uint8 channelBMicrotickInitialOffset
difference between adjacent time reference points on channel B in microticks.
Definition: IfxEray_Eray.h:534
IfxEray_Eray_MessageRAMConfig::rejectedFrameId
uint16 rejectedFrameId
frame ID to be rejected by the FIFO.
Definition: IfxEray_Eray.h:765
IfxEray_Eray_Interrupt::tint1Priority
uint16 tint1Priority
the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:736
IfxEray_setClockCorrectionCycles
IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
Sets clock correction cycles for Passive and Halt.
Definition: IfxEray.h:1508
IfxEray_Eray_Gtu06Config::acceptedStartupDeviation
uint16 acceptedStartupDeviation
expanded range of measured deviation for startup Frames during integration.
Definition: IfxEray_Eray.h:561
IfxEray_Eray_Node_initCommunicationController
IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
Inialises the communication controller.
Definition: IfxEray_Eray.c:153
IfxEray_Eray_Config::interrupt
IfxEray_Eray_Interrupt interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:813


iLLD_TC26B: IfxEray_Eray.h Source File

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IfxEray_Eray.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_Eray.h
3 * \brief ERAY ERAY details
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Eray_Eray_Usage How to use the ERAY Interface driver?
25 * \ingroup IfxLld_Eray
26 *
27 * \section IfxLld_Eray_Eray_Preparation Preparation
28 * \subsection IfxLld_Eray_Eray_Include Include Files
29 *
30 * Include following header file into your C code:
31 *
32 * \code
33 * #include <Eray/Eray/IfxEray_Eray.h>
34 * #include <Scu/Std/IfxScuWdt.h>
35 * #include <eray_commands.h>
36 * \endcode
37 *
38 *
39 *
40 * \subsection IfxLld_Eray_Eray_Defines Defines
41 * \code
42 *
43 * // Number of tested communication cycles
44 * #define NUMBER_ERAY_COMM_CYCLES 8
45 * #define NO_OF_SLOTS 2
46 * \endcode
47 *
48 * \subsection IfxLld_Eray_Eray_Variables Variables
49 *
50 * \code
51 * // global variables
52 * static IfxEray_Eray eray;
53 * volatile unsigned receivedDataCounter;
54 * uint32 receivedData[NUMBER_ERAY_COMM_CYCLES][NO_OF_SLOTS];
55 * \endcode
56 *
57 * \subsection IfxLld_Eray_Eray_Interrupt Interrupt Handler Installation
58 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
59 * \code
60 * #define IFX_ERAY_INT0_PRIO 1
61 * #define IFX_ERAY_INT1_PRIO 2
62 * #define IFX_ERAY_NDAT0_PRIO 3
63 * #define IFX_ERAY_NDAT1_PRIO 4
64 * #define IFX_ERAY_MBSC0_PRIO 5
65 * #define IFX_ERAY_MBSC1_PRIO 6
66 * \endcode
67 *
68 * Add the interrupt service routine to your C code. It has to call the ERAY interrupt handler:
69 * \code
70 * // ISR routines for interrupt handling
71 * void ERAY_irqInt0Handler();
72 * void ERAY_irqInt1Handler();
73 * void ERAY_irqNdat0Handler();
74 * void ERAY_irqNdat1Handler();
75 * void ERAY_irqMbsc0Handler();
76 * void ERAY_irqMbsc1Handler();
77 *
78 * IFX_INTERRUPT(eray0Int0ISR, 0, IFX_ERAY_INT0_PRIO)
79 * {
80 * ERAY_irqInt0Handler();
81 * }
82 * IFX_INTERRUPT(eray0Int1ISR, 0, IFX_ERAY_INT1_PRIO)
83 * {
84 * ERAY_irqInt1Handler();
85 * }
86 * IFX_INTERRUPT(eray0Ndat0ISR, 0, IFX_ERAY_NDAT0_PRIO)
87 * {
88 * ERAY_irqNdat0Handler();
89 * }
90 * IFX_INTERRUPT(eray0Ndat1ISR, 0, IFX_ERAY_NDAT1_PRIO)
91 * {
92 * ERAY_irqNdat1Handler();
93 * }
94 * IFX_INTERRUPT(eray0Mbsc0ISR, 0, IFX_ERAY_MBSC0_PRIO)
95 * {
96 * ERAY_irqMbsc0Handler();
97 * }
98 * IFX_INTERRUPT(eray0Mbsc1ISR, 0, IFX_ERAY_MBSC1_PRIO)
99 * {
100 * ERAY_irqMbsc1Handler();
101 * }
102 * \endcode
103 *
104 * Finally install the interrupt handlers in your initialisation function:
105 * \code
106 * // install interrupt handler
107 * IfxCpu_Irq_installInterruptHandler(&eray0Int0ISR, IFX_ERAY_INT0_PRIO);
108 * IfxCpu_Irq_installInterruptHandler(&eray0Int1ISR, IFX_ERAY_INT1_PRIO);
109 * IfxCpu_Irq_installInterruptHandler(&eray0Ndat0ISR, IFX_ERAY_NDAT0_PRIO);
110 * IfxCpu_Irq_installInterruptHandler(&eray0Ndat1ISR, IFX_ERAY_NDAT1_PRIO);
111 * IfxCpu_Irq_installInterruptHandler(&eray0Mbsc0ISR, IFX_ERAY_MBSC0_PRIO);
112 * IfxCpu_Irq_installInterruptHandler(&eray0Mbsc1ISR, IFX_ERAY_MBSC1_PRIO);
113 *
114 * // enable all cpu0 interrupts
115 * IfxCpu_enableInterrupts();
116 * \endcode
117 *
118 *
119 * \subsection IfxLld_Eray_Eray_Init Module Initialisation
120 *
121 * First ensure that the ERAY PLL is configured to output a 80 MHz clock for the ERAY module:
122 * \code
123 * // initialize Eray PLL
124 * //clib_ver_printf("Initialize ERAY PLL\n");
125 * {
126 * IfxScuCcu_ErayPllConfig ErayPllConfig;
127 * IfxScuCcu_initErayPllConfig(&ErayPllConfig);
128 * result |= IfxScuCcu_initErayPll(&ErayPllConfig);
129 * }
130 * \endcode
131 *
132 * Thereafter initialize the module:
133 * \code
134 * // create module config
135 * IfxEray_Eray_Config erayModuleConfig;
136 * #if TEST_ERAY1
137 * //clib_ver_printf("Initialize ERAY1\n");
138 * IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY1);
139 * #else
140 * //clib_ver_printf("Initialize ERAY0\n");
141 * IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY0);
142 * #endif
143 *
144 * // ISR priorities
145 * erayModuleConfig.interrupt.int0Priority = IFX_ERAY_INT0_PRIO;
146 * erayModuleConfig.interrupt.int1Priority = IFX_ERAY_INT1_PRIO;
147 * erayModuleConfig.interrupt.ndat0Priority = IFX_ERAY_NDAT0_PRIO;
148 * erayModuleConfig.interrupt.ndat1Priority = IFX_ERAY_NDAT1_PRIO;
149 * erayModuleConfig.interrupt.mbsc0Priority = IFX_ERAY_MBSC0_PRIO;
150 * erayModuleConfig.interrupt.mbsc1Priority = IFX_ERAY_MBSC1_PRIO;
151 *
152 * // init module
153 * IfxEray_Eray_initModule( &eray, &erayModuleConfig );
154 * \endcode
155 *
156 * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
157 *
158 * \subsection IfxLld_Eray_Eray_Node_Init Node Initialisation
159 *
160 * The node initialisation can be done in the same function.
161 * \code
162 * // get ERAY node default configuration
163 * IfxEray_Eray_NodeConfig nodeConfig;
164 * IfxEray_Eray_Node_initConfig(&nodeConfig);
165 *
166 * // configuration changes for interaction with external testbench element
167 * {
168 * // only for simulation: start external ERAY node
169 * {
170 * TbeMessage reply;
171 *
172 * // start ERay Testbench Element
173 * sendMessage(MSG_ID_TESTBENCH_ERAY, CMD_ERAY_TBE_START, 0 );
174 * receiveMessageBlockingFrom(MSG_ID_TESTBENCH_ERAY, reply);
175 * }
176 *
177 * {
178 * // SUCC1
179 * IfxEray_Eray_Succ1Config *succ1 = &nodeConfig.controllerConfig.succ1Config;
180 *
181 * succ1->clockSyncErrorHalt = FALSE;
182 * }
183 *
184 * {
185 * // PRTC1
186 * IfxEray_Eray_Prtc1Control *prtc1 = &nodeConfig.controllerConfig.prtc1Control;
187 *
188 * prtc1->transmissionStartTime = 10;
189 * prtc1->collisionAvoidanceDuration = 0;
190 * prtc1->strobePosition = IfxEray_StrobePosition_5;
191 * prtc1->baudrate = IfxEray_Baudrate_10;
192 * prtc1->receiveWakeupTestDuration = 76;
193 * prtc1->transmitWakeupRepetitions = 2;
194 * }
195 *
196 * {
197 * // PRTC2
198 * IfxEray_Eray_Prtc2Control *prtc2 = &nodeConfig.controllerConfig.prtc2Control;
199 *
200 * prtc2->receiveWakeupIdleTime = 18;
201 * prtc2->receiveWakeupLowTime = 18;
202 * prtc2->transmitWakeupIdleTime = 180;
203 * prtc2->transmitWakeupLowTime = 60;
204 * }
205 *
206 * {
207 * // SUCC2
208 * IfxEray_Eray_Succ2Config *succ2 = &nodeConfig.controllerConfig.succ2Config;
209 * succ2->listenTimeOut = 2500;
210 * succ2->listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16;
211 * }
212 *
213 * {
214 * // GTU
215 * IfxEray_Eray_GTUConfig *gtu = &nodeConfig.controllerConfig.gtuConfig;
216 *
217 * gtu->gtu01Config.microticksPerCycle = 3000;
218 * gtu->gtu02Config.macroticksPerCycle = 50;
219 * gtu->gtu02Config.maxSyncFrames = 15;
220 * gtu->gtu03Config.channelAMicrotickInitialOffset = 0;
221 * gtu->gtu03Config.channelBMicrotickInitialOffset = 0;
222 * gtu->gtu03Config.channelAMacrotickInitialOffset = 2;
223 * gtu->gtu03Config.channelBMacrotickInitialOffset = 2;
224 * gtu->gtu04Config.networkStartIdleTime = 0x2f;
225 * gtu->gtu04Config.correctionOffset = 0x30;
226 * gtu->gtu05Config.channelAReceptionDelay = 0x4;
227 * gtu->gtu05Config.channelBReceptionDelay = 0x4;
228 * gtu->gtu05Config.clusterDrift = 1;
229 * gtu->gtu05Config.decodingCorrection = 0x34;
230 * gtu->gtu06Config.acceptedStartupDeviation = 0x81;
231 * gtu->gtu06Config.maxDriftOffset = 0x31;
232 * gtu->gtu07Config.staticSlotLength = 0x10;
233 * gtu->gtu07Config.staticSlotsCount = 0x2;
234 * gtu->gtu08Config.dynamicSlotLength = 2;
235 * gtu->gtu08Config.dynamicSlotCount = 2;
236 * gtu->gtu09Config.idleDynamicSlots = IfxEray_IdleDynamicSlots_1; // bug: not set by IfxEray_setDynamicSlots
237 * gtu->gtu09Config.staticActionPoint = 1;
238 * gtu->gtu09Config.dynamicActionPoint = 1;
239 * gtu->gtu10Config.maxOffsetCorrection = 0xcd;
240 * gtu->gtu10Config.maxRateCorrection = 0x31;
241 * gtu->gtu11Config.externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0;
242 * gtu->gtu11Config.externalRateCorrection = IfxEray_ExternalRateCorrection_0;
243 * gtu->gtu11Config.externalOffset = IfxEray_ExternalOffset_noCorrection;
244 * gtu->gtu11Config.externalRate = IfxEray_ExternalRate_noCorrection;
245 * }
246 * }
247 *
248 * // Messages
249 * nodeConfig.messageRAMConfig.numberOfMessageBuffers = 2;
250 * nodeConfig.messageRAMConfig.firstDynamicBuffer = 0x40;
251 * nodeConfig.messageRAMConfig.fifoBufferStartIndex = 0x40;
252 *
253 * // Frame header
254 * IfxEray_Header header[2] = {
255 * // fid cyc cha chb buffer direction ppit transmission mode mbi pl dp startupfr syncfr
256 * { 1, 1, TRUE, TRUE, IfxEray_BufferDirection_transmit, TRUE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x30, TRUE, TRUE },
257 * { 2, 1, TRUE, TRUE, IfxEray_BufferDirection_receive, FALSE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x40, FALSE, FALSE },
258 * };
259 *
260 * // slot buffer
261 * IfxEray_SlotConfig slot[2] = {
262 * // header data stxrh buffNum
263 * { TRUE, TRUE, TRUE, 0 },
264 * { TRUE, FALSE, FALSE, 1 },
265 * };
266 *
267 * for(int i=0; i < 2; ++i) {
268 * nodeConfig.messageRAMConfig.header[i] = &header[i];
269 * nodeConfig.messageRAMConfig.slotControl[i] = &slot[i];
270 * nodeConfig.messageRAMConfig.data[i] = NULL_PTR;
271 * }
272 *
273 * #if TEST_ERAY1
274 * // channel A pins
275 * const IfxEray_Eray_NodeA nodeAPins = {
276 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
277 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
278 * &IfxEray1_RXDA0_P14_8_IN, &IfxEray1_TXDA_P14_10_OUT,
279 * &IfxEray1_TXENA_P14_9_OUT
280 * };
281 *
282 * // channel B pins
283 * const IfxEray_Eray_NodeB nodeBPins = {
284 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
285 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
286 * &IfxEray1_RXDB0_P14_7_IN, &IfxEray1_TXDB_P14_5_OUT,
287 * &IfxEray1_TXENB_P14_6_OUT
288 * };
289 * #else
290 * // channel A pins
291 * const IfxEray_Eray_NodeA nodeAPins = {
292 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
293 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
294 * &IfxEray0_RXDA0_P14_8_IN, &IfxEray0_TXDA_P14_10_OUT,
295 * &IfxEray0_TXENA_P14_9_OUT
296 * };
297 *
298 * // channel B pins
299 * const IfxEray_Eray_NodeB nodeBPins = {
300 * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
301 * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
302 * &IfxEray0_RXDB0_P14_7_IN, &IfxEray0_TXDB_P14_5_OUT,
303 * &IfxEray0_TXENB_P14_6_OUT
304 * };
305 * #endif
306 *
307 * const IfxEray_Eray_Pins pins = { (IfxEray_Eray_NodeA *)&nodeAPins, (IfxEray_Eray_NodeB *)&nodeBPins };
308 * nodeConfig.pins = (IfxEray_Eray_Pins *)&pins;
309 *
310 * // ERAY node initialisation with supplied configuration
311 * IfxEray_Eray_Node_init(&eray, &nodeConfig);
312 *
313 * // set interrupt outputs for data and message buffers
314 * IfxEray_Eray_setNewDataInterruptDestination(&eray, 0, 0); // New Data #0 -> NDAT0
315 * IfxEray_Eray_setNewDataInterruptDestination(&eray, 1, 1); // New Data #1 -> NDAT1
316 * IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 0, 0); // Message Buffer #0 -> MBSC0
317 * IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 1, 1); // Message Buffer #1 -> MBSC1
318 *
319 * //clib_ver_printf("Send wakeup pattern\n");
320 *
321 * // send wakeup pattern on default configured channel ( IfxEray_Channel_a )
322 * IfxEray_PocState pocState;
323 * do {
324 * pocState = IfxEray_Eray_getPocState( &eray );
325 * if ( pocState != IfxEray_PocState_wakeupListen ) {
326 * while ( !IfxEray_Eray_changePocState( &eray, IfxEray_PocCommand_wakeup ));
327 * }
328 * } while ( pocState != IfxEray_PocState_wakeupListen );
329 *
330 * // allow node to cold-start and wait until cold-start is successful
331 * while( !IfxEray_Eray_allowColdStart(&eray) );
332 *
333 * // start the communication in cluster and wait until communication is successfull
334 * while( !IfxEray_Eray_startCommunication(&eray) );
335 *
336 * // wait until communication Controller enters NORMAL_ACTIVE or NORMAL_PASSIVE state, exit if communication Controller enters HALT state.
337 * do {
338 * pocState = IfxEray_Eray_getPocState( &eray );
339 * // if communication Controller enters HALT state, break the loop.
340 * if( pocState == IfxEray_PocState_halt) {
341 * break;
342 * }
343 * } while( !((pocState == IfxEray_PocState_normalActive) || (pocState == IfxEray_PocState_normalPassive)) );
344 *
345 * // enter ALL_SLOTS mode when Communication Controller is in NORMAL_ACTIVE or NORMAL_PASSIVE state only.
346 * if ( pocState == IfxEray_PocState_normalActive || pocState == IfxEray_PocState_normalPassive ) {
347 * while ( !IfxEray_Eray_setPocAllSlots(&eray) );
348 * }
349 * \endcode
350 *
351 * \subsection IfxLld_Eray_Eray_TxRx Transactions
352 *
353 * \code
354 * unsigned prevReceivedDataCounter = 0;
355 * while( 1 ) {
356 * if( receivedDataCounter != prevReceivedDataCounter ) {
357 * prevReceivedDataCounter = receivedDataCounter;
358 * //clib_ver_printf("Received %d packets", receivedDataCounter);
359 *
360 * if( receivedDataCounter >= NUMBER_ERAY_COMM_CYCLES )
361 * break;
362 * }
363 * };
364 * \endcode
365 *
366 *
367 * \subsection IfxLld_Eray_Eray_ISR Interrupt Service Handlers
368 *
369 * The ISR has to be implemented in the application. Following templates can be used to react on the events:
370 *
371 * \code
372 * void ERAY_irqInt0Handler()
373 * {
374 * //clib_ver_note(1); // for debugging in simulation: notify Int0
375 *
376 * Ifx_ERAY_EIR ErrIntStat = IfxEray_Eray_getErrorInterrupts( &eray );
377 * Ifx_ERAY_SIR StatusIntStat = IfxEray_Eray_getStatusInterrupts( &eray );
378 *
379 * if(StatusIntStat.B.SDS)
380 * {
381 * // SDS must be cleared for getting the next interrupt
382 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sds );
383 * }
384 * if(StatusIntStat.B.CYCS)
385 * {
386 * // CYCS must be cleared for getting the next interrupt
387 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_cycs );
388 * }
389 * if(StatusIntStat.B.SUCS)
390 * {
391 * // SUCS must be cleared for getting the next interrupt
392 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sucs );
393 * }
394 * if(StatusIntStat.B.TIBC)
395 * {
396 * // TIBC must be cleared for getting the next interrupt
397 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tibc );
398 * }
399 * if(ErrIntStat.B.MHF)
400 * {
401 * // clear flag MHF
402 * IfxEray_Eray_clearErrorFlag( &eray, IfxEray_ClearErrorFlag_mhf );
403 * }
404 * }
405 *
406 * void ERAY_irqInt1Handler()
407 * {
408 * //clib_ver_note(2); // for debugging in simulation: notify Int1
409 *
410 * // TOBC must be cleared for getting the next interrupt
411 * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tobc );
412 * }
413 *
414 * void ERAY_irqNdat0Handler()
415 * {
416 * //clib_ver_note(3); // for debugging in simulation: notify Ndat0
417 * }
418 *
419 * void ERAY_irqNdat1Handler()
420 * {
421 * //clib_ver_note(4); // for debugging in simulation: notify Ndat1
422 *
423 * // message received in slot1 buffer?
424 * if( IfxEray_Eray_getNewDataInterruptStatus(&eray, 1) == 1 )
425 * {
426 * // read data
427 * uint32 data[2];
428 *
429 * {
430 * IfxEray_Eray_ReceiveControl config;
431 * config.headerReceived = TRUE;
432 * config.dataReceived = TRUE;
433 * config.receiveRequested = TRUE;
434 * config.swapRequested = TRUE;
435 * config.bufferIndex = 1;
436 *
437 * IfxEray_Eray_receiveFrame(&eray, &config);
438 * IfxEray_Eray_readData(&eray, data, 2*2);
439 * }
440 *
441 * // display received data (Here received data has to be displayed)
442 * //clib_ver_data(data[0]);
443 * //clib_ver_data(data[1]);
444 *
445 * // store received data
446 * if( receivedDataCounter < NUMBER_ERAY_COMM_CYCLES ) {
447 * receivedData[receivedDataCounter][0] = data[0];
448 * receivedData[receivedDataCounter][1] = data[1];
449 * }
450 * ++receivedDataCounter;
451 *
452 * // put some new data into slot0
453 * ++data[0];
454 * ++data[1];
455 *
456 * {
457 * IfxEray_Eray_TransmitControl config;
458 * config.headerTransfered = FALSE;
459 * config.dataTransfered = TRUE;
460 * config.transferRequested = TRUE;
461 * config.bufferIndex = 0;
462 *
463 * IfxEray_Eray_writeData(&eray, data, 2*2);
464 * IfxEray_Eray_transmitFrame(&eray, &config);
465 * }
466 * }
467 * }
468 *
469 * void ERAY_irqMbsc0Handler()
470 * {
471 * //clib_ver_note(5); // for debugging in simulation: notify Mbsc0
472 * }
473 *
474 * void ERAY_irqMbsc1Handler()
475 * {
476 * //clib_ver_note(6); // for debugging in simulation: notify Mbsc1
477 * }
478 * \endcode
479 *
480 * \defgroup IfxLld_Eray_Eray ERAY
481 * \ingroup IfxLld_Eray
482 * \defgroup IfxLld_Eray_Eray_Structures Data Structures
483 * \ingroup IfxLld_Eray_Eray
484 * \defgroup IfxLld_Eray_Eray_Module Module Initialisation Functions
485 * \ingroup IfxLld_Eray_Eray
486 * \defgroup IfxLld_Eray_Eray_Node Node Initialisation Functions
487 * \ingroup IfxLld_Eray_Eray
488 * \defgroup IfxLld_Eray_Eray_Operative Operative Functions
489 * \ingroup IfxLld_Eray_Eray
490 * \defgroup IfxLld_Eray_Eray_Status Status Functions
491 * \ingroup IfxLld_Eray_Eray
492 * \defgroup IfxLld_Eray_Eray_Interrupt Interrupt Functions
493 * \ingroup IfxLld_Eray_Eray
494 */
495
496 #ifndef IFXERAY_ERAY_H
497 #define IFXERAY_ERAY_H 1
498
499 /******************************************************************************/
500 /*----------------------------------Includes----------------------------------*/
501 /******************************************************************************/
502
503 #include "Eray/Std/IfxEray.h"
504 #include "Cpu/Std/IfxCpu.h"
505 #include "Scu/Std/IfxScuWdt.h"
506 #include "Scu/Std/IfxScuCcu.h"
507
508 /******************************************************************************/
509 /*-----------------------------Data Structures--------------------------------*/
510 /******************************************************************************/
511
512 /** \addtogroup IfxLld_Eray_Eray_Structures
513 * \{ */
514 /** \brief GTU01 configuration.
515 */
516 typedef struct
517 {
518 uint32 microticksPerCycle; /**< \brief Duration of the communication cycle in Microticks. */
519 } IfxEray_Eray_Gtu01Config;
520
521 /** \brief GTU02 configuration.
522 */
523 typedef struct
524 {
525 uint16 macroticksPerCycle; /**< \brief Duration of the communication cycle in Macroticks. */
526 uint8 maxSyncFrames; /**< \brief Maximum number of sync frames in a cluster. */
527 } IfxEray_Eray_Gtu02Config;
528
529 /** \brief GTU03 configuration.
530 */
531 typedef struct
532 {
533 uint8 channelAMicrotickInitialOffset; /**< \brief difference between adjacent time reference points on channel A in microticks. */
534 uint8 channelBMicrotickInitialOffset; /**< \brief difference between adjacent time reference points on channel B in microticks. */
535 uint8 channelAMacrotickInitialOffset; /**< \brief difference between two adjacent static slots on channel A in macroticks. */
536 uint8 channelBMacrotickInitialOffset; /**< \brief difference between two adjacent static slots on channel B in macroticks. */
537 } IfxEray_Eray_Gtu03Config;
538
539 /** \brief GTU04 configuration.
540 */
541 typedef struct
542 {
543 uint16 networkStartIdleTime; /**< \brief starting point of Network Idle Time Phase. */
544 uint16 correctionOffset; /**< \brief offset correction start point. */
545 } IfxEray_Eray_Gtu04Config;
546
547 /** \brief GTU05 configuration.
548 */
549 typedef struct
550 {
551 uint8 channelAReceptionDelay; /**< \brief reception delay on channel A. */
552 uint8 channelBReceptionDelay; /**< \brief reception delay on channel B. */
553 uint8 clusterDrift; /**< \brief cluster drift damping value used in clock synchronization. */
554 uint8 decodingCorrection; /**< \brief decoding correction to determine the primary time reference point. */
555 } IfxEray_Eray_Gtu05Config;
556
557 /** \brief GTU06 configuration.
558 */
559 typedef struct
560 {
561 uint16 acceptedStartupDeviation; /**< \brief expanded range of measured deviation for startup Frames during integration. */
562 uint16 maxDriftOffset; /**< \brief maximum drift offset between two nodes. */
563 } IfxEray_Eray_Gtu06Config;
564
565 /** \brief GTU07 configuration.
566 */
567 typedef struct
568 {
569 uint16 staticSlotLength; /**< \brief duration of static slot in macroticks. */
570 uint16 staticSlotsCount; /**< \brief number of static slots in a communication cycle. */
571 } IfxEray_Eray_Gtu07Config;
572
573 /** \brief GTU08 configuration.
574 */
575 typedef struct
576 {
577 uint8 dynamicSlotLength; /**< \brief duration of dynamic slot in macroticks. */
578 uint16 dynamicSlotCount; /**< \brief number of dynamic slots in a communication cycle. */
579 } IfxEray_Eray_Gtu08Config;
580
581 /** \brief GTU09 configuration.
582 */
583 typedef struct
584 {
585 uint8 staticActionPoint; /**< \brief static slots and symbol window action point. */
586 uint8 dynamicActionPoint; /**< \brief dynamic slots action point. */
587 IfxEray_IdleDynamicSlots idleDynamicSlots; /**< \brief duration of dynamic slot idle phase. */
588 } IfxEray_Eray_Gtu09Config;
589
590 /** \brief GTU10 configuration.
591 */
592 typedef struct
593 {
594 uint16 maxOffsetCorrection; /**< \brief maximum offset correction to be applied by the internal clock synchronization algorithm. */
595 uint16 maxRateCorrection; /**< \brief maximum rate correction to be applied by the internal clock synchronization algorithm. */
596 } IfxEray_Eray_Gtu10Config;
597
598 /** \brief GTU11 configuration.
599 */
600 typedef struct
601 {
602 IfxEray_ExternalOffsetCorrection externalOffsetCorrection; /**< \brief External clock offset correction value. */
603 IfxEray_ExternalRateCorrection externalRateCorrection; /**< \brief External clock rate correction value. */
604 IfxEray_ExternalOffset externalOffset; /**< \brief External offset correction control. */
605 IfxEray_ExternalRate externalRate; /**< \brief External rate correction control. */
606 } IfxEray_Eray_Gtu11Config;
607
608 /** \} */
609
610 /** \addtogroup IfxLld_Eray_Eray_Structures
611 * \{ */
612 /** \brief Gloabl Timing Unit configuration structure.
613 */
614 typedef struct
615 {
616 IfxEray_Eray_Gtu01Config gtu01Config; /**< \brief GTU01 configuration. */
617 IfxEray_Eray_Gtu02Config gtu02Config; /**< \brief GTU02 configuration. */
618 IfxEray_Eray_Gtu03Config gtu03Config; /**< \brief GTU03 configuration. */
619 IfxEray_Eray_Gtu04Config gtu04Config; /**< \brief GTU04 configuration. */
620 IfxEray_Eray_Gtu05Config gtu05Config; /**< \brief GTU05 configuration. */
621 IfxEray_Eray_Gtu06Config gtu06Config; /**< \brief GTU06 configuration. */
622 IfxEray_Eray_Gtu07Config gtu07Config; /**< \brief GTU07 configuration. */
623 IfxEray_Eray_Gtu08Config gtu08Config; /**< \brief GTU08 configuration. */
624 IfxEray_Eray_Gtu09Config gtu09Config; /**< \brief GTU09 configuration. */
625 IfxEray_Eray_Gtu10Config gtu10Config; /**< \brief GTU10 configuration. */
626 IfxEray_Eray_Gtu11Config gtu11Config; /**< \brief GTU11 configuration. */
627 } IfxEray_Eray_GTUConfig;
628
629 /** \brief Pins configuration structure for Node A.
630 */
631 typedef struct
632 {
633 IfxPort_InputMode rxInMode; /**< \brief the RX pin input mode which should be configured */
634 IfxPort_OutputMode txOutMode; /**< \brief the TX pin output mode which should be configured. */
635 IfxPort_PadDriver pinDriver; /**< \brief the pad driver mode which should be configured. */
636 IfxPort_OutputMode txEnOutMode; /**< \brief the TXEN pin output mode which should be configured. */
637 IFX_CONST IfxEray_Rxd_In *rxIn; /**< \brief the RX Pin which should be configured. */
638 IFX_CONST IfxEray_Txd_Out *txOut; /**< \brief the TX Pin which should be configured. */
639 IFX_CONST IfxEray_Txen_Out *txEnOut; /**< \brief the TXEN Pin which should be configured. */
640 } IfxEray_Eray_NodeA;
641
642 /** \brief Pins configuration structure for Node B.
643 */
644 typedef struct
645 {
646 IfxPort_InputMode rxInMode; /**< \brief the RX pin input mode which should be configured */
647 IfxPort_OutputMode txOutMode; /**< \brief the TX pin output mode which should be configured. */
648 IfxPort_PadDriver pinDriver; /**< \brief the pad driver mode which should be configured. */
649 IfxPort_OutputMode txEnOutMode; /**< \brief the TXEN pin output mode which should be configured. */
650 IFX_CONST IfxEray_Rxd_In *rxIn; /**< \brief the RX Pin which should be configured. */
651 IFX_CONST IfxEray_Txd_Out *txOut; /**< \brief the TX Pin which should be configured. */
652 IFX_CONST IfxEray_Txen_Out *txEnOut; /**< \brief the TXEN Pin which should be configured. */
653 } IfxEray_Eray_NodeB;
654
655 /** \brief Protocol operation control properties.
656 */
657 typedef struct
658 {
659 uint8 collisionAvoidanceDuration; /**< \brief accepted duration of collision avoidance symbol. */
660 IfxEray_StrobePosition strobePosition; /**< \brief sample count value for strobing. */
661 IfxEray_Baudrate baudrate; /**< \brief baud rate on the flexray bus. */
662 uint8 receiveWakeupTestDuration; /**< \brief duration of received wakeup pattern in bit times. */
663 uint8 transmitWakeupRepetitions; /**< \brief duration of transmitted wakeup pattern in bit times. */
664 uint16 transmissionStartTime; /**< \brief duration of transmission start time. */
665 } IfxEray_Eray_Prtc1Control;
666
667 /** \brief Wakeup symbol control properties.
668 */
669 typedef struct
670 {
671 uint8 receiveWakeupIdleTime; /**< \brief duration of received wakeup symbol idle phase. */
672 uint8 receiveWakeupLowTime; /**< \brief duration of received wakeup symbol low phase. */
673 uint8 transmitWakeupIdleTime; /**< \brief duration of transmit wakeup symbol idle phase. */
674 uint8 transmitWakeupLowTime; /**< \brief duration of transmit wakeup symbol low phase. */
675 } IfxEray_Eray_Prtc2Control;
676
677 /** \brief communication controller control properties.
678 */
679 typedef struct
680 {
681 boolean startupFrameTransmitted; /**< \brief whether the key slot is used to transmit startup Frames. */
682 boolean syncFrameTransmitted; /**< \brief whether the key slot is used to transmit SYNC Frames. */
683 uint8 maxColdStartAttempts; /**< \brief maximum number of attempts that a cold starting node is permitted. */
684 uint8 numberOfCyclePairsForActive; /**< \brief number of even / odd cycle pairs that must have valid clock correction terms. */
685 IfxEray_WakeupChannel wakeupPatternChannel; /**< \brief Wakeup pattern carry channel */
686 IfxEray_TransmissionSlotMode transmissionSlotMode; /**< \brief Initial transmission mode. */
687 boolean clockSyncErrorHalt; /**< \brief transition to HALT state due to a clock synchronization error. */
688 boolean channelASymbolTransmitted; /**< \brief selects channel A for MTS symbol transmission. */
689 boolean channelBSymbolTransmitted; /**< \brief selects channel B for MTS symbol transmission */
690 boolean channelAConnectedNode; /**< \brief whether the node is connected to channel A. */
691 boolean channelBConnectedNode; /**< \brief whether the node is connected to channel B. */
692 } IfxEray_Eray_Succ1Config;
693
694 /** \brief Communication listen timeout properties.
695 */
696 typedef struct
697 {
698 uint32 listenTimeOut; /**< \brief wakeup or startup listen timeout in microticks. */
699 IfxEray_ListenTimeOutNoise listenTimeOutNoise; /**< \brief upper limit for startup and wakeup listen timeout in the presence of noise. */
700 } IfxEray_Eray_Succ2Config;
701
702 /** \brief Clock correction fail properties.
703 */
704 typedef struct
705 {
706 uint8 clockCorrectionCyclesPassive; /**< \brief maximum number of cycles missing clock correction lead active to passive state. */
707 uint8 clockCorrectionCyclesHalt; /**< \brief maximum number of cycles missing clock correctionlead to active or passive to halt. */
708 } IfxEray_Eray_Succ3Config;
709
710 /** \} */
711
712 /** \addtogroup IfxLld_Eray_Eray_Structures
713 * \{ */
714 /** \brief Communication Controller configuration structure.
715 */
716 typedef struct
717 {
718 uint32 networkVectorLength; /**< \brief length of network management vector. */
719 uint8 staticFramepayload; /**< \brief payload length of static frame in double bytes. */
720 uint8 latestTransmissionStart; /**< \brief number of dynamic slots before inhibit frame transmission in dynamic segment. */
721 IfxEray_Eray_GTUConfig gtuConfig; /**< \brief gloabl timing unit configuration structure. */
722 IfxEray_Eray_Succ1Config succ1Config; /**< \brief communication controller control properties. */
723 IfxEray_Eray_Succ2Config succ2Config; /**< \brief communication listen timeout properties. */
724 IfxEray_Eray_Succ3Config succ3Config; /**< \brief clock correction fail properties. */
725 IfxEray_Eray_Prtc1Control prtc1Control; /**< \brief protocol operation control properties. */
726 IfxEray_Eray_Prtc2Control prtc2Control; /**< \brief wakeup symbol control properties. */
727 } IfxEray_Eray_ControllerConfig;
728
729 /** \brief Interrupt control properties.
730 */
731 typedef struct
732 {
733 uint16 int0Priority; /**< \brief the interrupt line 0 priority. Always 1 since all interrupts are handled at a time. */
734 uint16 int1Priority; /**< \brief the interrupt line 1 priority. Always 1 since all interrupts are handled at a time. */
735 uint16 tint0Priority; /**< \brief the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
736 uint16 tint1Priority; /**< \brief the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
737 uint16 ndat0Priority; /**< \brief the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
738 uint16 ndat1Priority; /**< \brief the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
739 uint16 mbsc0Priority; /**< \brief the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
740 uint16 mbsc1Priority; /**< \brief the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
741 uint16 ibusyPriority; /**< \brief the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time. */
742 uint16 obusyPriority; /**< \brief the output buffer interrupt priority. Always 1 since all interrupts are handled at a time. */
743 IfxSrc_Tos int0IsrProvider; /**< \brief the interrupt line 0 service provider. CPU or DMA. */
744 IfxSrc_Tos int1IsrProvider; /**< \brief the interrupt line 1 service provider. CPU or DMA. */
745 IfxSrc_Tos tint0IsrProvider; /**< \brief the timer interrupt line 0 service provider. CPU or DMA. */
746 IfxSrc_Tos tint1IsrProvider; /**< \brief the timer interrupt line 1 service provider. CPU or DMA. */
747 IfxSrc_Tos ndat0IsrProvider; /**< \brief the new data interrupt 0 service provider. CPU or DMA. */
748 IfxSrc_Tos ndat1IsrProvider; /**< \brief the new data interrupt 1 service provider. CPU or DMA. */
749 IfxSrc_Tos mbsc0IsrProvider; /**< \brief the message buffer status changed interrupt 0 service provider. CPU or DMA. */
750 IfxSrc_Tos mbsc1IsrProvider; /**< \brief the message buffer status changed interrupt 1 service provider. CPU or DMA. */
751 IfxSrc_Tos ibusyIsrProvider; /**< \brief the input buffer interrupt service provider. CPU or DMA. */
752 IfxSrc_Tos obusyIsrProvider; /**< \brief the output buffer interrupt service provider. CPU or DMA. */
753 } IfxEray_Eray_Interrupt;
754
755 /** \brief Message RAM configuration structure.
756 */
757 typedef struct
758 {
759 uint8 firstDynamicBuffer; /**< \brief first dynamic buffer index. */
760 uint8 numberOfMessageBuffers; /**< \brief last configured buffer. */
761 uint32 fifoBufferStartIndex; /**< \brief message buffers assigned FIFO. */
762 uint8 fifoDepth; /**< \brief fifo critical level. */
763 uint16 frameIdFilter; /**< \brief Frame ID used for rejection filtering. */
764 IfxEray_ReceiveChannel receiveChannel; /**< \brief FIFO receive channel. */
765 uint16 rejectedFrameId; /**< \brief frame ID to be rejected by the FIFO. */
766 uint8 filteredCycleNumber; /**< \brief the cycle set to which Frame ID and channel rejection filter are applied. */
767 boolean staticFifoDisabled; /**< \brief fifo is not used in static segment. */
768 boolean fifoNullFramesRejected; /**< \brief whether null frames stored in fifo or not. */
769 boolean bufferReconfigEnabled; /**< \brief whether reconfiguration of message buffers is enabled or not. */
770 boolean fifoConfigured; /**< \brief Whether receive FIFO configured or not. */
771 IfxEray_Header *header[128]; /**< \brief Header section of message buffer. */
772 IfxEray_SlotConfig *slotControl[128]; /**< \brief Transmit control properties. */
773 uint32 *data[128]; /**< \brief data section of message buffer. */
774 } IfxEray_Eray_MessageRAMConfig;
775
776 /** \} */
777
778 /** \addtogroup IfxLld_Eray_Eray_Node
779 * \{ */
780 /** \brief Pins configuration structure.
781 */
782 typedef struct
783 {
784 IFX_CONST IfxEray_Eray_NodeA *nodeAPins; /**< \brief Pins configuration structure for Node A. */
785 IFX_CONST IfxEray_Eray_NodeB *nodeBPins; /**< \brief Pins configuration structure for Node B. */
786 } IfxEray_Eray_Pins;
787
788 /** \} */
789
790 /** \addtogroup IfxLld_Eray_Eray_Structures
791 * \{ */
792 /** \brief ERAY Module handle.
793 */
794 typedef struct
795 {
796 Ifx_ERAY *eray; /**< \brief pointer to ERAY module registers. */
797 } IfxEray_Eray;
798
799 /** \brief Reconfigurable buffer structure.
800 */
801 typedef struct
802 {
803 IfxEray_Header *header; /**< \brief header of a reconfigurable buffer. */
804 uint32 data[64]; /**< \brief data section of a reconfigurable buffer. */
805 IfxEray_SlotConfig *slotControl; /**< \brief message buffer configuration in message RAM. */
806 } IfxEray_Eray_BufferReconfig;
807
808 /** \brief Module configuration structure
809 */
810 typedef struct
811 {
812 Ifx_ERAY *module; /**< \brief pointer to ERAY module registers. */
813 IfxEray_Eray_Interrupt interrupt; /**< \brief Interrupt control properties. */
814 } IfxEray_Eray_Config;
815
816 /** \brief Node configuration structure.
817 */
818 typedef struct
819 {
820 IfxEray_Eray_MessageRAMConfig messageRAMConfig; /**< \brief Message RAM configuration structure. */
821 IfxEray_Eray_ControllerConfig controllerConfig; /**< \brief Communication Controller configuration structure. */
822 IFX_CONST IfxEray_Eray_Pins *pins; /**< \brief Pins configuration structure. */
823 } IfxEray_Eray_NodeConfig;
824
825 /** \brief Receive control properties structure.
826 */
827 typedef struct
828 {
829 boolean headerReceived; /**< \brief whether header selected for transfer from Message RAM to Output Buffer or not. */
830 boolean dataReceived; /**< \brief whether data selected for transfer from Message RAM to Output Buffer or not. */
831 boolean swapRequested; /**< \brief whether output buffer shadow and output buffer host are swapped or not. */
832 boolean receiveRequested; /**< \brief */
833 uint8 bufferIndex; /**< \brief buffer index in the Message RAM. */
834 } IfxEray_Eray_ReceiveControl;
835
836 /** \brief Received Frame.
837 */
838 typedef struct
839 {
840 IfxEray_ReceivedHeader header; /**< \brief received header in a frame. */
841 uint32 data[64]; /**< \brief received data in a frame. */
842 } IfxEray_Eray_ReceivedFrame;
843
844 /** \brief Transfer control in a slot.
845 */
846 typedef struct
847 {
848 boolean headerTransfered; /**< \brief whether header section of frame is transfered or not. */
849 boolean dataTransfered; /**< \brief whether data section of message buffer is transfered or not. */
850 boolean transferRequested; /**< \brief whether frame in a slot is transfered or not. */
851 uint8 bufferIndex; /**< \brief buffer index which gives slot for transfers. */
852 } IfxEray_Eray_TransmitControl;
853
854 /** \} */
855
856 /** \addtogroup IfxLld_Eray_Eray_Module
857 * \{ */
858
859 /******************************************************************************/
860 /*-------------------------Inline Function Prototypes-------------------------*/
861 /******************************************************************************/
862
863 /** \brief De-initialises the ERAY module.
864 * \param eray pointer to module handle.
865 * \return None
866 *
867 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
868 *
869 */
870 IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray);
871
872 /******************************************************************************/
873 /*-------------------------Global Function Prototypes-------------------------*/
874 /******************************************************************************/
875
876 /** \brief Initialises the ERAY module with supplied configuration.
877 * \param eray pointer to ERAY Module handle.
878 * \param config pointer to module configuration structure.
879 * \return None
880 *
881 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
882 *
883 */
884 IFX_EXTERN void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config);
885
886 /** \brief Inialises the default module configuration buffer.
887 * \param config pointer to module configuration structure.
888 * \param eray pointer ERAY module registers.
889 * \return None
890 *
891 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
892 *
893 */
894 IFX_EXTERN void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray);
895
896 /** \} */
897
898 /** \addtogroup IfxLld_Eray_Eray_Node
899 * \{ */
900
901 /******************************************************************************/
902 /*-------------------------Global Function Prototypes-------------------------*/
903 /******************************************************************************/
904
905 /** \brief Initialises the Node with supplied configuration.
906 * \param eray pointer to ERAY Module handle.
907 * \param config pointer to node configuration structure.
908 * \return None
909 *
910 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
911 *
912 */
913 IFX_EXTERN void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config);
914
915 /** \brief Initialises the default node configuration buffer.
916 * \param config pointer to node configuration structure.
917 * \return None
918 *
919 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
920 *
921 */
922 IFX_EXTERN void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config);
923
924 /** \} */
925
926 /** \addtogroup IfxLld_Eray_Eray_Operative
927 * \{ */
928
929 /******************************************************************************/
930 /*-------------------------Inline Function Prototypes-------------------------*/
931 /******************************************************************************/
932
933 /** \brief Allows node to enter the cold startup state.
934 * \param eray pointer to ERAY Module handle.
935 * \return TRUE if cold start successful otherwise FALSE.
936 *
937 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
938 *
939 */
940 IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray);
941
942 /** \brief Reconfiguring the buffer or changing the slot.
943 * \param eray pointer to module handle.
944 * \param reconfigBuffer pointer reconfigurable buffer structure.
945 * \return None
946 *
947 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
948 *
949 */
950 IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer);
951
952 /** \brief Changes the POC state and return status.
953 * \param eray pointer to module handle.
954 * \param PocCommand POC command to change state.
955 * \return TRUE if command accepted.
956 */
957 IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand);
958
959 /** \brief Reads the received data from output registers.
960 * \param eray pointer to module handle.
961 * \param data pointer to received data buffer.
962 * \param payloadLength payload length received in a frame.
963 * \return None
964 */
965 IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength);
966
967 /** \brief reads the frame received in a buffer.
968 * \param eray pointer to module handle.
969 * \param frame received frame in a buffer.
970 * \param maxPayloadLength maximum payload length received in a frame.
971 * \return None
972 *
973 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
974 *
975 */
976 IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength);
977
978 /** \brief Sets the Controller state to ALL Slots mode.
979 * \param eray pointer to module handle.
980 * \return TRUE if All slots mode is successful otherwise FALSE.
981 *
982 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
983 *
984 */
985 IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray);
986
987 /** \brief Runs the communication controller.
988 * \param eray pointer to ERAY Module handle.
989 * \return TRUE if communication started otherwise FALSE.
990 *
991 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
992 *
993 */
994 IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray);
995
996 /** \brief Wakeups the channel in a cluster.
997 * \param eray pointer to ERAY Module handle.
998 * \param channel wakeup channel Id.
999 * \return None
1000 *
1001 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1002 *
1003 */
1004 IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel);
1005
1006 /** \brief Wakeups the node in a cluster.
1007 * \param eray pointer to ERAY Module handle.
1008 * \return TRUE if cluster is wakeup otherwise FALSE.
1009 *
1010 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1011 *
1012 */
1013 IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray);
1014
1015 /** \brief Writes data section of a frame to input data registers.
1016 * \param eray pointer to module handle.
1017 * \param data data section in frame.
1018 * \param payloadLength payload length configured for slot buffer.
1019 * \return None
1020 *
1021 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1022 *
1023 */
1024 IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength);
1025
1026 /******************************************************************************/
1027 /*-------------------------Global Function Prototypes-------------------------*/
1028 /******************************************************************************/
1029
1030 /** \brief Transfers frame from fifo in message RAM to Output buffer.
1031 * \param eray pointer to ERAY Module handle.
1032 * \param config pointer to receive control structure.
1033 * \return None
1034 *
1035 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1036 *
1037 */
1038 IFX_EXTERN void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config);
1039
1040 /** \brief Transfers header and data from message buffer to output buffer.
1041 * \param eray pointer to ERAY Module handle.
1042 * \param config pointer to receive control structure.
1043 * \return None
1044 *
1045 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1046 *
1047 */
1048 IFX_EXTERN void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config);
1049
1050 /** \brief Transfers the frame in given slot.
1051 * \param eray pointer to module handle.
1052 * \param transmitControl transmits frame in a given slot.
1053 * \return None
1054 *
1055 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1056 *
1057 */
1058 IFX_EXTERN void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl);
1059
1060 /** \} */
1061
1062 /** \addtogroup IfxLld_Eray_Eray_Status
1063 * \{ */
1064
1065 /******************************************************************************/
1066 /*-------------------------Inline Function Prototypes-------------------------*/
1067 /******************************************************************************/
1068
1069 /** \brief Gets the current node controller POC state.
1070 * \param eray pointer to module handle.
1071 * \return current POC state.
1072 */
1073 IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray);
1074
1075 /** \brief Gets the received wakeup pattern channel.
1076 * \param eray pointer to module handle.
1077 * \return received wakeup pattern channel.
1078 *
1079 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1080 *
1081 */
1082 IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray);
1083
1084 /** \} */
1085
1086 /** \addtogroup IfxLld_Eray_Eray_Interrupt
1087 * \{ */
1088
1089 /******************************************************************************/
1090 /*-------------------------Inline Function Prototypes-------------------------*/
1091 /******************************************************************************/
1092
1093 /** \brief clears the error interrupt flag requested.
1094 * \param eray pointer to module handle.
1095 * \param errorFlag error flag to be cleared.
1096 * \return None
1097 */
1098 IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag);
1099
1100 /** \brief Clears the status interrupt flag requested.
1101 * \param eray pointer to module handle.
1102 * \param statusFlag status flag to be cleared.
1103 * \return None
1104 */
1105 IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag);
1106
1107 /** \brief Gets the error interrupt status.
1108 * \param eray pointer to module handle.
1109 * \return error interrupt status.
1110 */
1111 IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray);
1112
1113 /** \brief Gets the message buffer interrupt status.
1114 * \param eray pointer to module handle.
1115 * \param messageBuffer message buffer to which interrupt status be checked.
1116 * \return message buffer interrupt status.
1117 */
1118 IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer);
1119
1120 /** \brief Gets the new data interrupt buffers status.
1121 * \param eray pointer to module handle.
1122 * \param ndat ndat buffer to which interrupt status be checked.
1123 * \return ndat buffer interrupt status.
1124 */
1125 IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat);
1126
1127 /** \brief Gets the node status interrupts.
1128 * \param eray pointer to module handle.
1129 * \return node status interrupts.
1130 */
1131 IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray);
1132
1133 /** \brief Enables the message buffer interrupt line.
1134 * \param eray pointer to module handle.
1135 * \param messageBuffer message buffer interrupt which should be configured
1136 * \param messageBufferDestination selects MBSC0 or MBSC1 interrupt output
1137 * \return None
1138 *
1139 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1140 *
1141 */
1142 IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination);
1143
1144 /** \brief Enables the NDAT buffer interrupt line.
1145 * \param eray pointer to module handle.
1146 * \param ndat message buffer number configured to which ndat interrupt line to be set.
1147 * \param ndatDestination selects NDAT0 or NDAT1 interrupt output
1148 * \return None
1149 *
1150 * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
1151 *
1152 */
1153 IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination);
1154
1155 /** \} */
1156
1157 /******************************************************************************/
1158 /*---------------------Inline Function Implementations------------------------*/
1159 /******************************************************************************/
1160
1161 IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray)
1162 {
1163 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_coldStart);
1164 }
1165
1166
1167 IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
1168 {
1169 IfxEray_setSlot(eray->eray, reconfigBuffer->header, reconfigBuffer->data, reconfigBuffer->slotControl);
1170 }
1171
1172
1173 IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
1174 {
1175 boolean status = IfxEray_changePocState(eray->eray, PocCommand);
1176 return status;
1177 }
1178
1179
1180 IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
1181 {
1182 IfxEray_clearErrorFlag(eray->eray, errorFlag);
1183 }
1184
1185
1186 IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
1187 {
1188 IfxEray_clearStatusFlag(eray->eray, statusFlag);
1189 }
1190
1191
1192 IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray)
1193 {
1194 //resets the kernel
1195 IfxEray_resetModule(eray->eray);
1196 }
1197
1198
1199 IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray)
1200 {
1201 Ifx_ERAY_EIR interruptFlags;
1202 interruptFlags = IfxEray_getErrorInterrupts(eray->eray);
1203 return interruptFlags;
1204 }
1205
1206
1207 IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer)
1208 {
1209 uint8 messageBufferInterrupt = IfxEray_getMessageBufferInterruptStatus(eray->eray, messageBuffer);
1210 return messageBufferInterrupt;
1211 }
1212
1213
1214 IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat)
1215 {
1216 uint8 ndatInterrupt = IfxEray_getNewDataInterruptStatus(eray->eray, ndat);
1217 return ndatInterrupt;
1218 }
1219
1220
1221 IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray)
1222 {
1223 return IfxEray_getPocState(eray->eray);
1224 }
1225
1226
1227 IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray)
1228 {
1229 Ifx_ERAY_SIR statusInterrupts = IfxEray_getStatusInterrupts(eray->eray);
1230 return statusInterrupts;
1231 }
1232
1233
1234 IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray)
1235 {
1236 IfxEray_WakeupChannel rxWakeupChannel;
1237 rxWakeupChannel = IfxEray_getWakeupPatternReceivedChannel(eray->eray);
1238
1239 return rxWakeupChannel;
1240 }
1241
1242
1243 IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
1244 {
1245 IfxEray_readData(eray->eray, data, payloadLength);
1246 }
1247
1248
1249 IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
1250 {
1251 IfxEray_readFrame(eray->eray, &(frame->header), frame->data, maxPayloadLength);
1252 }
1253
1254
1255 IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
1256 {
1257 IfxEray_setMessageBufferInterruptDestination(eray->eray, messageBuffer, messageBufferDestination);
1258 }
1259
1260
1261 IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
1262 {
1263 IfxEray_setNewDataInterruptDestination(eray->eray, ndat, ndatDestination);
1264 }
1265
1266
1267 IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray)
1268 {
1269 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_allSlots);
1270 }
1271
1272
1273 IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray)
1274 {
1275 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_run);
1276 }
1277
1278
1279 IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel)
1280 {
1281 Ifx_ERAY *eraySFR = eray->eray;
1282 boolean result = IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
1283
1284 if (result == TRUE)
1285 {
1286 eraySFR->SUCC1.B.WUCS = channel;
1287 IfxEray_setPocReady(eray->eray);
1288 }
1289 }
1290
1291
1292 IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray)
1293 {
1294 return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_wakeup);
1295 }
1296
1297
1298 IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
1299 {
1300 IfxEray_writeData(eray->eray, data, payloadLength);
1301 }
1302
1303
1304 #endif /* IFXERAY_ERAY_H */
IfxEray_SlotConfig
Transmit control structure.
Definition: IfxEray.h:396
IfxEray_Eray_Gtu04Config::networkStartIdleTime
uint16 networkStartIdleTime
starting point of Network Idle Time Phase.
Definition: IfxEray_Eray.h:543
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:48
IfxEray_WakeupChannel
IfxEray_WakeupChannel
Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
Definition: IfxEray.h:348
IfxEray_Eray_initModuleConfig
IFX_EXTERN void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
Inialises the default module configuration buffer.
Definition: IfxEray_Eray.c:487
IfxEray_Eray_GTUConfig::gtu07Config
IfxEray_Eray_Gtu07Config gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:622
IfxEray_Eray_Succ3Config::clockCorrectionCyclesHalt
uint8 clockCorrectionCyclesHalt
maximum number of cycles missing clock correctionlead to active or passive to halt.
Definition: IfxEray_Eray.h:707
IfxEray_setSlot
void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
Writes header and data to Input buffers and set the slots.
Definition: IfxEray.c:278
IfxEray_Eray_getNewDataInterruptStatus
IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray_Eray.h:1214
IfxEray_Eray_NodeA::txEnOutMode
IfxPort_OutputMode txEnOutMode
the TXEN pin output mode which should be configured.
Definition: IfxEray_Eray.h:636
IfxEray_Eray_Interrupt::ndat0Priority
uint16 ndat0Priority
the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:737
IfxEray_Eray_Gtu05Config::decodingCorrection
uint8 decodingCorrection
decoding correction to determine the primary time reference point.
Definition: IfxEray_Eray.h:554
IfxEray_Eray_Prtc1Control
Protocol operation control properties.
Definition: IfxEray_Eray.h:657
IfxEray_PocCommand_run
command to controller to enter RUN
Definition: IfxEray.h:253
IfxEray_Eray_Interrupt::mbsc1Priority
uint16 mbsc1Priority
the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:740
IfxEray_Eray_deInitModule
IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray)
De-initialises the ERAY module.
Definition: IfxEray_Eray.h:1192
IfxEray_Eray_Prtc2Control
Wakeup symbol control properties.
Definition: IfxEray_Eray.h:669
IfxEray_setPocReady
void IfxEray_setPocReady(Ifx_ERAY *eray)
Sets the POC state to Ready state.
Definition: IfxEray.c:265
IfxEray_Eray_Config::module
Ifx_ERAY * module
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:812
IfxEray_Eray_NodeA::rxIn
IFX_CONST IfxEray_Rxd_In * rxIn
the RX Pin which should be configured.
Definition: IfxEray_Eray.h:637
IfxEray_Eray_readData
IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray_Eray.h:1243
IfxEray_Eray_Succ1Config::channelAConnectedNode
boolean channelAConnectedNode
whether the node is connected to channel A.
Definition: IfxEray_Eray.h:690
IfxEray_Eray_Succ1Config::transmissionSlotMode
IfxEray_TransmissionSlotMode transmissionSlotMode
Initial transmission mode.
Definition: IfxEray_Eray.h:686
IfxEray_Eray_setMessageBufferInterruptDestination
IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Enables the message buffer interrupt line.
Definition: IfxEray_Eray.h:1255
IfxEray_Eray_initModule
IFX_EXTERN void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
Initialises the ERAY module with supplied configuration.
Definition: IfxEray_Eray.c:385
IfxEray_setNewDataInterruptDestination
void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
Selects between NDAT0 and NDAT1 interrupt destination.
Definition: IfxEray.c:247
IfxEray_Eray_Gtu11Config::externalRate
IfxEray_ExternalRate externalRate
External rate correction control.
Definition: IfxEray_Eray.h:605
IfxEray_Eray_Interrupt::obusyPriority
uint16 obusyPriority
the output buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:742
IfxEray_Eray_TransmitControl::headerTransfered
boolean headerTransfered
whether header section of frame is transfered or not.
Definition: IfxEray_Eray.h:848
IfxEray_Eray_MessageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:757
IfxEray_Eray_GTUConfig::gtu01Config
IfxEray_Eray_Gtu01Config gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:616
IfxEray_Eray_Gtu03Config::channelBMacrotickInitialOffset
uint8 channelBMacrotickInitialOffset
difference between two adjacent static slots on channel B in macroticks.
Definition: IfxEray_Eray.h:536
IfxEray_Eray_setPocAllSlots
IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray)
Sets the Controller state to ALL Slots mode.
Definition: IfxEray_Eray.h:1267
IfxEray_ReceiveChannel
IfxEray_ReceiveChannel
Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
Definition: IfxEray.h:295
IfxEray_Eray_NodeA::txEnOut
IFX_CONST IfxEray_Txen_Out * txEnOut
the TXEN Pin which should be configured.
Definition: IfxEray_Eray.h:639
IfxEray_Eray_NodeConfig
Node configuration structure.
Definition: IfxEray_Eray.h:818
IfxEray_Eray_ReceivedFrame
Received Frame.
Definition: IfxEray_Eray.h:838
IfxEray_PocState
IfxEray_PocState
State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
Definition: IfxEray.h:266
IfxEray_Eray_Interrupt::ibusyPriority
uint16 ibusyPriority
the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:741
IfxEray_Eray_ControllerConfig::succ1Config
IfxEray_Eray_Succ1Config succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:722
IfxEray_ClearStatusFlag
IfxEray_ClearStatusFlag
Selection of status flag to clear defined in MODULE_ERAY.SIR.U.
Definition: IfxEray.h:111
IfxEray_Eray_Node_initConfig
IFX_EXTERN void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
Initialises the default node configuration buffer.
Definition: IfxEray_Eray.c:186
IfxEray_Eray_Prtc2Control::receiveWakeupIdleTime
uint8 receiveWakeupIdleTime
duration of received wakeup symbol idle phase.
Definition: IfxEray_Eray.h:671
IfxEray_Eray_ControllerConfig::networkVectorLength
uint32 networkVectorLength
length of network management vector.
Definition: IfxEray_Eray.h:718
IfxEray_Eray_Gtu10Config::maxOffsetCorrection
uint16 maxOffsetCorrection
maximum offset correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:594
IfxEray_ReceivedHeader
Received header in a frame.
Definition: IfxEray.h:382
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:57
IfxEray_Eray_Gtu09Config::staticActionPoint
uint8 staticActionPoint
static slots and symbol window action point.
Definition: IfxEray_Eray.h:585
IfxEray_Eray_TransmitControl::dataTransfered
boolean dataTransfered
whether data section of message buffer is transfered or not.
Definition: IfxEray_Eray.h:849
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxEray_Eray_NodeConfig::controllerConfig
IfxEray_Eray_ControllerConfig controllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:821
IfxEray_getMessageBufferInterruptStatus
IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
Gets the message buffers interrupt status.
Definition: IfxEray.h:1282
IfxEray_Eray_Succ1Config::numberOfCyclePairsForActive
uint8 numberOfCyclePairsForActive
number of even / odd cycle pairs that must have valid clock correction terms.
Definition: IfxEray_Eray.h:684
IfxEray_Eray_Gtu03Config::channelAMicrotickInitialOffset
uint8 channelAMicrotickInitialOffset
difference between adjacent time reference points on channel A in microticks.
Definition: IfxEray_Eray.h:533
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEray_Eray_Succ1Config::channelASymbolTransmitted
boolean channelASymbolTransmitted
selects channel A for MTS symbol transmission.
Definition: IfxEray_Eray.h:688
IfxEray_Eray_BufferReconfig::header
IfxEray_Header * header
header of a reconfigurable buffer.
Definition: IfxEray_Eray.h:803
IfxEray_Eray_receiveFrame
IFX_EXTERN void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers header and data from message buffer to output buffer.
Definition: IfxEray_Eray.c:550
IfxEray_Eray_Interrupt::int1Priority
uint16 int1Priority
the interrupt line 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:734
IfxEray_Eray_Gtu09Config::dynamicActionPoint
uint8 dynamicActionPoint
dynamic slots action point.
Definition: IfxEray_Eray.h:586
IfxEray_Eray_transmitFrame
IFX_EXTERN void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
Transfers the frame in given slot.
Definition: IfxEray_Eray.c:572
IfxEray_Eray_Interrupt::tint1IsrProvider
IfxSrc_Tos tint1IsrProvider
the timer interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:746
IfxEray_ExternalOffsetCorrection
IfxEray_ExternalOffsetCorrection
External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
Definition: IfxEray.h:160
IfxEray_Eray_clearErrorFlag
IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
clears the error interrupt flag requested.
Definition: IfxEray_Eray.h:1180
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxEray_Eray_Gtu11Config::externalOffsetCorrection
IfxEray_ExternalOffsetCorrection externalOffsetCorrection
External clock offset correction value.
Definition: IfxEray_Eray.h:602
IfxEray_Eray_ReceivedFrame::header
IfxEray_ReceivedHeader header
received header in a frame.
Definition: IfxEray_Eray.h:840
IfxEray_Eray_Succ2Config
Communication listen timeout properties.
Definition: IfxEray_Eray.h:696
IfxEray_Eray_Succ1Config
communication controller control properties.
Definition: IfxEray_Eray.h:679
IfxEray_ExternalRate
IfxEray_ExternalRate
External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
Definition: IfxEray.h:174
IfxEray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
Gets the status interrupt flags.
Definition: IfxEray.h:1357
IfxEray_ListenTimeOutNoise
IfxEray_ListenTimeOutNoise
Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
Definition: IfxEray.h:206
IfxEray_Eray_GTUConfig::gtu05Config
IfxEray_Eray_Gtu05Config gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:620
IfxEray_Eray_BufferReconfig::slotControl
IfxEray_SlotConfig * slotControl
message buffer configuration in message RAM.
Definition: IfxEray_Eray.h:805
IfxEray_Eray_Prtc1Control::transmissionStartTime
uint16 transmissionStartTime
duration of transmission start time.
Definition: IfxEray_Eray.h:664
IfxEray_Eray_Interrupt::tint0Priority
uint16 tint0Priority
the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:735
IfxEray_Eray_Succ3Config
Clock correction fail properties.
Definition: IfxEray_Eray.h:704
IfxEray_Eray_MessageRAMConfig::fifoDepth
uint8 fifoDepth
fifo critical level.
Definition: IfxEray_Eray.h:762
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxEray_Eray_Gtu11Config::externalOffset
IfxEray_ExternalOffset externalOffset
External offset correction control.
Definition: IfxEray_Eray.h:604
IfxEray_Eray_MessageRAMConfig::fifoConfigured
boolean fifoConfigured
Whether receive FIFO configured or not.
Definition: IfxEray_Eray.h:770
IfxEray_Eray_startCommunication
IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray)
Runs the communication controller.
Definition: IfxEray_Eray.h:1273
IfxEray_Eray_GTUConfig::gtu11Config
IfxEray_Eray_Gtu11Config gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:626
IfxEray_Eray_ControllerConfig
Communication Controller configuration structure.
Definition: IfxEray_Eray.h:716
IfxEray_Eray_GTUConfig
Gloabl Timing Unit configuration structure.
Definition: IfxEray_Eray.h:614
IfxEray_Eray_setNewDataInterruptDestination
IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
Enables the NDAT buffer interrupt line.
Definition: IfxEray_Eray.h:1261
IfxEray_Channel
IfxEray_Channel
Channel Id.
Definition: IfxEray.h:79
IfxEray_Eray_Prtc2Control::receiveWakeupLowTime
uint8 receiveWakeupLowTime
duration of received wakeup symbol low phase.
Definition: IfxEray_Eray.h:672
IfxEray_Eray_getMessageBufferInterruptStatus
IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer)
Gets the message buffer interrupt status.
Definition: IfxEray_Eray.h:1207
IfxEray_Eray_ControllerConfig::staticFramepayload
uint8 staticFramepayload
payload length of static frame in double bytes.
Definition: IfxEray_Eray.h:719
IfxEray_Eray_GTUConfig::gtu03Config
IfxEray_Eray_Gtu03Config gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:618
IfxEray_Eray_GTUConfig::gtu06Config
IfxEray_Eray_Gtu06Config gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:621
IfxEray_Eray_Succ2Config::listenTimeOut
uint32 listenTimeOut
wakeup or startup listen timeout in microticks.
Definition: IfxEray_Eray.h:698
IfxEray_Eray_GTUConfig::gtu09Config
IfxEray_Eray_Gtu09Config gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:624
IfxEray_Eray_Prtc1Control::strobePosition
IfxEray_StrobePosition strobePosition
sample count value for strobing.
Definition: IfxEray_Eray.h:660
IfxScuWdt.h
SCU basic functionality.
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxEray_Eray_Gtu07Config::staticSlotsCount
uint16 staticSlotsCount
number of static slots in a communication cycle.
Definition: IfxEray_Eray.h:570
IfxEray.h
ERAY basic functionality.
IfxEray_Eray_ControllerConfig::prtc1Control
IfxEray_Eray_Prtc1Control prtc1Control
protocol operation control properties.
Definition: IfxEray_Eray.h:725
IfxEray_writeData
void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray.c:331
IfxEray_Eray_BufferReconfig::data
uint32 data[64]
data section of a reconfigurable buffer.
Definition: IfxEray_Eray.h:804
IfxEray_Eray_Prtc2Control::transmitWakeupLowTime
uint8 transmitWakeupLowTime
duration of transmit wakeup symbol low phase.
Definition: IfxEray_Eray.h:674
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxEray_Eray_NodeA::rxInMode
IfxPort_InputMode rxInMode
the RX pin input mode which should be configured
Definition: IfxEray_Eray.h:633
IfxEray_Eray_Gtu05Config::channelAReceptionDelay
uint8 channelAReceptionDelay
reception delay on channel A.
Definition: IfxEray_Eray.h:551
IfxEray_Eray_Succ1Config::startupFrameTransmitted
boolean startupFrameTransmitted
whether the key slot is used to transmit startup Frames.
Definition: IfxEray_Eray.h:681
IfxEray_Eray_Interrupt::mbsc0IsrProvider
IfxSrc_Tos mbsc0IsrProvider
the message buffer status changed interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:749
IfxEray_ExternalOffset
IfxEray_ExternalOffset
External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
Definition: IfxEray.h:151
IfxEray_Eray_Succ2Config::listenTimeOutNoise
IfxEray_ListenTimeOutNoise listenTimeOutNoise
upper limit for startup and wakeup listen timeout in the presence of noise.
Definition: IfxEray_Eray.h:699
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxEray_Eray_Config
Module configuration structure.
Definition: IfxEray_Eray.h:810
IfxEray_Eray_Interrupt::ndat1Priority
uint16 ndat1Priority
the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time...
Definition: IfxEray_Eray.h:738
IfxEray_Eray_Interrupt::ndat1IsrProvider
IfxSrc_Tos ndat1IsrProvider
the new data interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:748
IfxEray_Eray_Interrupt::int0IsrProvider
IfxSrc_Tos int0IsrProvider
the interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:743
IfxEray_Eray_changePocState
IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
Changes the POC state and return status.
Definition: IfxEray_Eray.h:1173
IfxEray_Eray_NodeA::txOutMode
IfxPort_OutputMode txOutMode
the TX pin output mode which should be configured.
Definition: IfxEray_Eray.h:634
IfxEray_Eray_Succ3Config::clockCorrectionCyclesPassive
uint8 clockCorrectionCyclesPassive
maximum number of cycles missing clock correction lead active to passive state.
Definition: IfxEray_Eray.h:706
IfxEray_Eray_Interrupt::ndat0IsrProvider
IfxSrc_Tos ndat0IsrProvider
the new data interrupt 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:747
IfxEray_Eray_Succ1Config::maxColdStartAttempts
uint8 maxColdStartAttempts
maximum number of attempts that a cold starting node is permitted.
Definition: IfxEray_Eray.h:683
IfxEray_Eray_Gtu02Config::maxSyncFrames
uint8 maxSyncFrames
Maximum number of sync frames in a cluster.
Definition: IfxEray_Eray.h:526
IfxEray_Eray_Gtu01Config::microticksPerCycle
uint32 microticksPerCycle
Duration of the communication cycle in Microticks.
Definition: IfxEray_Eray.h:518
IfxEray_Eray_ReceiveControl::bufferIndex
uint8 bufferIndex
buffer index in the Message RAM.
Definition: IfxEray_Eray.h:833
IfxEray_setMessageBufferInterruptDestination
void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
Selects between MBSC0 and MBSC1 interrupt destination.
Definition: IfxEray.c:230
IfxEray_Eray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray)
Gets the error interrupt status.
Definition: IfxEray_Eray.h:1199
IfxEray_ExternalRateCorrection
IfxEray_ExternalRateCorrection
External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
Definition: IfxEray.h:183
IfxEray_PocCommand_allSlots
command to controller to enter ALL_SLOTS
Definition: IfxEray.h:254
IfxEray_Eray_GTUConfig::gtu08Config
IfxEray_Eray_Gtu08Config gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:623
IfxEray_Header
Header section in a frame.
Definition: IfxEray.h:364
IfxEray_Eray_Interrupt::int0Priority
uint16 int0Priority
the interrupt line 0 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:733
IfxEray_Eray_Pins::nodeBPins
IFX_CONST IfxEray_Eray_NodeB * nodeBPins
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:785
IfxEray_Eray_ControllerConfig::latestTransmissionStart
uint8 latestTransmissionStart
number of dynamic slots before inhibit frame transmission in dynamic segment.
Definition: IfxEray_Eray.h:720
IfxEray_Eray_MessageRAMConfig::bufferReconfigEnabled
boolean bufferReconfigEnabled
whether reconfiguration of message buffers is enabled or not.
Definition: IfxEray_Eray.h:769
IfxEray_Eray_Succ1Config::wakeupPatternChannel
IfxEray_WakeupChannel wakeupPatternChannel
Wakeup pattern carry channel.
Definition: IfxEray_Eray.h:685
IfxEray_Eray_receiveFifoFrame
IFX_EXTERN void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
Transfers frame from fifo in message RAM to Output buffer.
Definition: IfxEray_Eray.c:514
IfxEray_IdleDynamicSlots
IfxEray_IdleDynamicSlots
Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
Definition: IfxEray.h:197
IfxEray_Eray_ControllerConfig::succ3Config
IfxEray_Eray_Succ3Config succ3Config
clock correction fail properties.
Definition: IfxEray_Eray.h:724
IfxEray_Eray_Interrupt::tint0IsrProvider
IfxSrc_Tos tint0IsrProvider
the timer interrupt line 0 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:745
IfxEray_Eray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray_Eray.h:1234
IfxEray_Eray_wakeUpChannel
IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel)
Wakeups the channel in a cluster.
Definition: IfxEray_Eray.h:1279
IfxEray_Eray_MessageRAMConfig::fifoNullFramesRejected
boolean fifoNullFramesRejected
whether null frames stored in fifo or not.
Definition: IfxEray_Eray.h:768
IfxEray_Eray_GTUConfig::gtu04Config
IfxEray_Eray_Gtu04Config gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:619
IfxEray_StrobePosition
IfxEray_StrobePosition
Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
Definition: IfxEray.h:314
IfxEray_Eray_ReceiveControl::dataReceived
boolean dataReceived
whether data selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:830
IfxEray_Eray_clearStatusFlag
IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status interrupt flag requested.
Definition: IfxEray_Eray.h:1186
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxEray_Eray_Gtu07Config::staticSlotLength
uint16 staticSlotLength
duration of static slot in macroticks.
Definition: IfxEray_Eray.h:569
IfxEray_Eray_Node_init
IFX_EXTERN void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
Initialises the Node with supplied configuration.
Definition: IfxEray_Eray.c:66
IfxEray_Baudrate
IfxEray_Baudrate
Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
Definition: IfxEray.h:62
IfxEray_Eray_Gtu08Config::dynamicSlotCount
uint16 dynamicSlotCount
number of dynamic slots in a communication cycle.
Definition: IfxEray_Eray.h:578
IfxEray_clearErrorFlag
IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
Clears the error flag requested.
Definition: IfxEray.h:1189
IfxEray_Eray_Prtc1Control::baudrate
IfxEray_Baudrate baudrate
baud rate on the flexray bus.
Definition: IfxEray_Eray.h:661
IfxEray_Eray_NodeConfig::pins
IFX_CONST IfxEray_Eray_Pins * pins
Pins configuration structure.
Definition: IfxEray_Eray.h:822
IfxEray_Eray_Interrupt::mbsc1IsrProvider
IfxSrc_Tos mbsc1IsrProvider
the message buffer status changed interrupt 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:750
IfxEray_Eray_Interrupt::int1IsrProvider
IfxSrc_Tos int1IsrProvider
the interrupt line 1 service provider. CPU or DMA.
Definition: IfxEray_Eray.h:744
IfxEray_Eray::eray
Ifx_ERAY * eray
pointer to ERAY module registers.
Definition: IfxEray_Eray.h:796
IfxEray_Eray_Prtc1Control::transmitWakeupRepetitions
uint8 transmitWakeupRepetitions
duration of transmitted wakeup pattern in bit times.
Definition: IfxEray_Eray.h:663
IfxCpu.h
CPU basic functionality.
IfxEray_Eray_Succ1Config::channelBConnectedNode
boolean channelBConnectedNode
whether the node is connected to channel B.
Definition: IfxEray_Eray.h:691
IfxEray_Eray_MessageRAMConfig::firstDynamicBuffer
uint8 firstDynamicBuffer
first dynamic buffer index.
Definition: IfxEray_Eray.h:759
IfxEray_Eray_Prtc1Control::collisionAvoidanceDuration
uint8 collisionAvoidanceDuration
accepted duration of collision avoidance symbol.
Definition: IfxEray_Eray.h:659
IfxEray_Eray_Succ1Config::channelBSymbolTransmitted
boolean channelBSymbolTransmitted
selects channel B for MTS symbol transmission
Definition: IfxEray_Eray.h:689
IfxEray_Eray_Gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:592
IfxEray_Eray_getStatusInterrupts
IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray)
Gets the node status interrupts.
Definition: IfxEray_Eray.h:1227
IfxEray_Eray_ReceiveControl::swapRequested
boolean swapRequested
whether output buffer shadow and output buffer host are swapped or not.
Definition: IfxEray_Eray.h:831
IfxEray_Eray_Gtu11Config
GTU11 configuration.
Definition: IfxEray_Eray.h:600
IfxEray_Eray_Gtu03Config
GTU03 configuration.
Definition: IfxEray_Eray.h:531
IfxEray_Eray_Gtu06Config
GTU06 configuration.
Definition: IfxEray_Eray.h:559
IfxEray_Eray_Gtu05Config
GTU05 configuration.
Definition: IfxEray_Eray.h:549
IfxEray_Eray_Gtu08Config
GTU08 configuration.
Definition: IfxEray_Eray.h:575
IfxEray_Eray_Gtu05Config::channelBReceptionDelay
uint8 channelBReceptionDelay
reception delay on channel B.
Definition: IfxEray_Eray.h:552
IfxEray_Eray_Gtu07Config
GTU07 configuration.
Definition: IfxEray_Eray.h:567
IfxEray_Eray_Gtu09Config
GTU09 configuration.
Definition: IfxEray_Eray.h:583
IfxEray_Eray_NodeConfig::messageRAMConfig
IfxEray_Eray_MessageRAMConfig messageRAMConfig
Message RAM configuration structure.
Definition: IfxEray_Eray.h:820
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxEray_Eray_GTUConfig::gtu02Config
IfxEray_Eray_Gtu02Config gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:617
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:39
IfxEray_Eray_Gtu02Config
GTU02 configuration.
Definition: IfxEray_Eray.h:523
IfxEray_Eray_Gtu01Config
GTU01 configuration.
Definition: IfxEray_Eray.h:516
IfxEray_getErrorInterrupts
IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
Gets the error interrupt flags.
Definition: IfxEray.h:1227
IfxEray_TransmissionSlotMode
IfxEray_TransmissionSlotMode
Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
Definition: IfxEray.h:340
IfxEray_Eray_ReceiveControl::headerReceived
boolean headerReceived
whether header selected for transfer from Message RAM to Output Buffer or not.
Definition: IfxEray_Eray.h:829
IfxEray_Eray_Gtu08Config::dynamicSlotLength
uint8 dynamicSlotLength
duration of dynamic slot in macroticks.
Definition: IfxEray_Eray.h:577
IfxEray_Eray_MessageRAMConfig::staticFifoDisabled
boolean staticFifoDisabled
fifo is not used in static segment.
Definition: IfxEray_Eray.h:767
IfxEray_Eray_Gtu04Config
GTU04 configuration.
Definition: IfxEray_Eray.h:541
IfxEray_Eray_bufferReconfig
IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
Reconfiguring the buffer or changing the slot.
Definition: IfxEray_Eray.h:1167
IfxEray_PocCommand_config
command to controller to enter CONFIG
Definition: IfxEray.h:250
IfxEray_Eray_Interrupt::ibusyIsrProvider
IfxSrc_Tos ibusyIsrProvider
the input buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:751
IfxEray_Eray_Pins::nodeAPins
IFX_CONST IfxEray_Eray_NodeA * nodeAPins
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:784
IfxEray_ClearErrorFlag
IfxEray_ClearErrorFlag
Selection of error flag to clear defined in MODULE_ERAY.EIR.U.
Definition: IfxEray.h:87
IfxEray_resetModule
void IfxEray_resetModule(Ifx_ERAY *eray)
Resets the ERAY kernel.
Definition: IfxEray.c:210
IfxScuCcu.h
SCU basic functionality.
IfxEray_Eray_Pins
Pins configuration structure.
Definition: IfxEray_Eray.h:782
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxEray_Eray_ReceiveControl
Receive control properties structure.
Definition: IfxEray_Eray.h:827
IfxEray_Eray_MessageRAMConfig::fifoBufferStartIndex
uint32 fifoBufferStartIndex
message buffers assigned FIFO.
Definition: IfxEray_Eray.h:761
IfxEray_Eray_ControllerConfig::prtc2Control
IfxEray_Eray_Prtc2Control prtc2Control
wakeup symbol control properties.
Definition: IfxEray_Eray.h:726
IfxEray_Eray_Gtu02Config::macroticksPerCycle
uint16 macroticksPerCycle
Duration of the communication cycle in Macroticks.
Definition: IfxEray_Eray.h:525
IfxEray_Eray_Interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:731
IfxEray_Eray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray)
Gets the current node controller POC state.
Definition: IfxEray_Eray.h:1221
IfxEray_getPocState
IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
Gets the current POC state.
Definition: IfxEray.h:1351
IfxEray_Eray_MessageRAMConfig::frameIdFilter
uint16 frameIdFilter
Frame ID used for rejection filtering.
Definition: IfxEray_Eray.h:763
IfxEray_Eray_MessageRAMConfig::numberOfMessageBuffers
uint8 numberOfMessageBuffers
last configured buffer.
Definition: IfxEray_Eray.h:760
IfxEray_Eray_ReceiveControl::receiveRequested
boolean receiveRequested
Definition: IfxEray_Eray.h:832
IfxEray_Eray_Gtu10Config::maxRateCorrection
uint16 maxRateCorrection
maximum rate correction to be applied by the internal clock synchronization algorithm.
Definition: IfxEray_Eray.h:595
IfxEray_Eray_Succ1Config::clockSyncErrorHalt
boolean clockSyncErrorHalt
transition to HALT state due to a clock synchronization error.
Definition: IfxEray_Eray.h:687
IfxEray_Eray_MessageRAMConfig::receiveChannel
IfxEray_ReceiveChannel receiveChannel
FIFO receive channel.
Definition: IfxEray_Eray.h:764
IfxEray_PocCommand
IfxEray_PocCommand
Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
Definition: IfxEray.h:247
IfxEray_Eray_Succ1Config::syncFrameTransmitted
boolean syncFrameTransmitted
whether the key slot is used to transmit SYNC Frames.
Definition: IfxEray_Eray.h:682
IfxEray_Eray_NodeA::txOut
IFX_CONST IfxEray_Txd_Out * txOut
the TX Pin which should be configured.
Definition: IfxEray_Eray.h:638
IfxEray_Eray_allowColdStart
IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray)
Allows node to enter the cold startup state.
Definition: IfxEray_Eray.h:1161
IfxEray_Eray_NodeA
Pins configuration structure for Node A.
Definition: IfxEray_Eray.h:631
IfxEray_Eray_NodeB
Pins configuration structure for Node B.
Definition: IfxEray_Eray.h:644
IfxEray_Eray_TransmitControl::transferRequested
boolean transferRequested
whether frame in a slot is transfered or not.
Definition: IfxEray_Eray.h:850
IfxEray_Eray_wakeUpCluster
IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray)
Wakeups the node in a cluster.
Definition: IfxEray_Eray.h:1292
IfxEray_Eray_TransmitControl
Transfer control in a slot.
Definition: IfxEray_Eray.h:846
IfxEray_PocCommand_coldStart
command to controller to enter COLD_START
Definition: IfxEray.h:258
IfxEray_Eray
ERAY Module handle.
Definition: IfxEray_Eray.h:794
IfxEray_Eray_NodeA::pinDriver
IfxPort_PadDriver pinDriver
the pad driver mode which should be configured.
Definition: IfxEray_Eray.h:635
IfxEray_Eray_Gtu05Config::clusterDrift
uint8 clusterDrift
cluster drift damping value used in clock synchronization.
Definition: IfxEray_Eray.h:553
IfxEray_getNewDataInterruptStatus
IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
Gets the new data interrupt buffers status.
Definition: IfxEray.h:1321
IfxEray_Eray_Gtu11Config::externalRateCorrection
IfxEray_ExternalRateCorrection externalRateCorrection
External clock rate correction value.
Definition: IfxEray_Eray.h:603
IfxEray_Eray_Gtu09Config::idleDynamicSlots
IfxEray_IdleDynamicSlots idleDynamicSlots
duration of dynamic slot idle phase.
Definition: IfxEray_Eray.h:587
IfxEray_Eray_ControllerConfig::gtuConfig
IfxEray_Eray_GTUConfig gtuConfig
gloabl timing unit configuration structure.
Definition: IfxEray_Eray.h:721
IfxEray_readFrame
void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
Reads header and data from output buffers.
Definition: IfxEray.c:186
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxEray_Eray_BufferReconfig
Reconfigurable buffer structure.
Definition: IfxEray_Eray.h:801
IfxEray_Eray_Interrupt::obusyIsrProvider
IfxSrc_Tos obusyIsrProvider
the output buffer interrupt service provider. CPU or DMA.
Definition: IfxEray_Eray.h:752
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxEray_clearStatusFlag
IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
Clears the status flag requested.
Definition: IfxEray.h:1195
IfxEray_Eray_ControllerConfig::succ2Config
IfxEray_Eray_Succ2Config succ2Config
communication listen timeout properties.
Definition: IfxEray_Eray.h:723
IfxEray_Eray_Interrupt::mbsc0Priority
uint16 mbsc0Priority
the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at ...
Definition: IfxEray_Eray.h:739
IfxEray_changePocState
boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
Changes the Commmunication Controller state.
Definition: IfxEray.c:82
IfxEray_Eray_GTUConfig::gtu10Config
IfxEray_Eray_Gtu10Config gtu10Config
GTU10 configuration.
Definition: IfxEray_Eray.h:625
IfxEray_readData
void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
Reads the received data from output registers.
Definition: IfxEray.c:171
IfxEray_getWakeupPatternReceivedChannel
IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
Gets the received wakeup pattern channel.
Definition: IfxEray.h:1379
IfxEray_Eray_Gtu03Config::channelAMacrotickInitialOffset
uint8 channelAMacrotickInitialOffset
difference between two adjacent static slots on channel A in macroticks.
Definition: IfxEray_Eray.h:535
IfxEray_Eray_Gtu04Config::correctionOffset
uint16 correctionOffset
offset correction start point.
Definition: IfxEray_Eray.h:544
IfxEray_Eray_Prtc1Control::receiveWakeupTestDuration
uint8 receiveWakeupTestDuration
duration of received wakeup pattern in bit times.
Definition: IfxEray_Eray.h:662
IfxEray_Eray_Gtu06Config::maxDriftOffset
uint16 maxDriftOffset
maximum drift offset between two nodes.
Definition: IfxEray_Eray.h:562
IfxEray_PocCommand_wakeup
command to controller to enter WAKEUP
Definition: IfxEray.h:252
IfxEray_Eray_Prtc2Control::transmitWakeupIdleTime
uint8 transmitWakeupIdleTime
duration of transmit wakeup symbol idle phase.
Definition: IfxEray_Eray.h:673
IfxEray_Eray_readFrame
IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
reads the frame received in a buffer.
Definition: IfxEray_Eray.h:1249
IfxEray_Eray_MessageRAMConfig::filteredCycleNumber
uint8 filteredCycleNumber
the cycle set to which Frame ID and channel rejection filter are applied.
Definition: IfxEray_Eray.h:766
IfxEray_Eray_Gtu03Config::channelBMicrotickInitialOffset
uint8 channelBMicrotickInitialOffset
difference between adjacent time reference points on channel B in microticks.
Definition: IfxEray_Eray.h:534
IfxEray_Eray_MessageRAMConfig::rejectedFrameId
uint16 rejectedFrameId
frame ID to be rejected by the FIFO.
Definition: IfxEray_Eray.h:765
IfxEray_Eray_Interrupt::tint1Priority
uint16 tint1Priority
the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time.
Definition: IfxEray_Eray.h:736
IfxEray_Eray_writeData
IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
Writes data section of a frame to input data registers.
Definition: IfxEray_Eray.h:1298
IfxEray_Eray_Gtu06Config::acceptedStartupDeviation
uint16 acceptedStartupDeviation
expanded range of measured deviation for startup Frames during integration.
Definition: IfxEray_Eray.h:561
IfxEray_Eray_Config::interrupt
IfxEray_Eray_Interrupt interrupt
Interrupt control properties.
Definition: IfxEray_Eray.h:813


iLLD_TC26B: IfxEray_PinMap.c Source File

  • _PinMap
IfxEray_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_PinMap.c
3 * \brief ERAY I/O map
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxEray_PinMap.h"
27
28 IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a};
29 IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b};
30 IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c};
31 IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d};
32 IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a};
33 IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b};
34 IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c};
35 IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d};
36 IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6};
37 IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4};
38 IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3};
39 IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6};
40 IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6};
41 IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4};
42 IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4};
43 IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6};
44 IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6};
45 IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4};
46 IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6};
47 IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6};
48 IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6};
49 IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2};
50 IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6};
51 IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5};
52
53
54 const IfxEray_Rxd_In *IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS] = {
55 {
56 {
57 &IfxEray0_RXDA0_P14_8_IN,
58 &IfxEray0_RXDA1_P11_9_IN,
59 &IfxEray0_RXDA2_P02_1_IN,
60 &IfxEray0_RXDA3_P14_1_IN
61 },
62 {
63 &IfxEray0_RXDB0_P14_7_IN,
64 &IfxEray0_RXDB1_P11_10_IN,
65 &IfxEray0_RXDB2_P02_3_IN,
66 &IfxEray0_RXDB3_P14_1_IN
67 }
68 }
69 };
70
71 const IfxEray_Txd_Out *IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS] = {
72 {
73 {
74 &IfxEray0_TXDA_P02_0_OUT,
75 &IfxEray0_TXDA_P11_3_OUT,
76 &IfxEray0_TXDA_P14_0_OUT,
77 &IfxEray0_TXDA_P14_10_OUT
78 },
79 {
80 &IfxEray0_TXDB_P02_2_OUT,
81 &IfxEray0_TXDB_P11_12_OUT,
82 &IfxEray0_TXDB_P14_0_OUT,
83 &IfxEray0_TXDB_P14_5_OUT
84 }
85 }
86 };
87
88 const IfxEray_Txen_Out *IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS] = {
89 {
90 {
91 &IfxEray0_TXENA_P02_4_OUT,
92 &IfxEray0_TXENA_P11_6_OUT,
93 &IfxEray0_TXENA_P14_9_OUT,
94 NULL_PTR,
95 NULL_PTR
96 },
97 {
98 &IfxEray0_TXENB_P02_5_OUT,
99 &IfxEray0_TXENB_P11_6_OUT,
100 &IfxEray0_TXENB_P11_11_OUT,
101 &IfxEray0_TXENB_P14_6_OUT,
102 &IfxEray0_TXENB_P14_9_OUT
103 }
104 }
105 };
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:48
IfxEray0_TXENB_P02_5_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
Definition: IfxEray_PinMap.c:47
IfxEray0_TXENB_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
Definition: IfxEray_PinMap.c:49
IfxEray0_TXENA_P11_6_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
Definition: IfxEray_PinMap.c:45
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxEray0_TXDA_P11_3_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
Definition: IfxEray_PinMap.c:37
IfxEray_Txen_Out_pinTable
const IfxEray_Txen_Out * IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
Definition: IfxEray_PinMap.c:88
IfxEray0_RXDB2_P02_3_IN
IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
Definition: IfxEray_PinMap.c:34
IfxEray0_TXDA_P02_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
Definition: IfxEray_PinMap.c:36
IfxEray_NodeId_b
Ifx_ERAY Node B.
Definition: IfxEray_cfg.h:73
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:57
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxEray0_RXDB3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
Definition: IfxEray_PinMap.c:35
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEray0_TXENB_P14_6_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
Definition: IfxEray_PinMap.c:50
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEray_PinMap.h:93
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxEray_Rxd_In_pinTable
const IfxEray_Rxd_In * IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxEray_PinMap.c:54
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:105
IfxEray0_RXDB1_P11_10_IN
IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
Definition: IfxEray_PinMap.c:33
IfxEray0_TXENA_P02_4_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
Definition: IfxEray_PinMap.c:44
IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:95
IfxEray_PinMap.h
ERAY I/O map.
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxEray0_TXDB_P02_2_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
Definition: IfxEray_PinMap.c:40
IfxEray0_RXDA0_P14_8_IN
IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
Definition: IfxEray_PinMap.c:28
IfxEray0_TXENB_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
Definition: IfxEray_PinMap.c:51
IfxEray0_TXDA_P14_10_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
Definition: IfxEray_PinMap.c:39
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IFXERAY_PINMAP_NUM_MODULES
#define IFXERAY_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEray_PinMap.h:91
IfxEray0_TXENB_P11_11_OUT
IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
Definition: IfxEray_PinMap.c:48
IfxEray_Txd_Out_pinTable
const IfxEray_Txd_Out * IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxEray_PinMap.c:71
IfxEray0_TXDB_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
Definition: IfxEray_PinMap.c:42
IfxEray0_RXDA1_P11_9_IN
IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
Definition: IfxEray_PinMap.c:29
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:39
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:72
IfxEray0_TXDB_P11_12_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
Definition: IfxEray_PinMap.c:41
IfxEray0_RXDA2_P02_1_IN
IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
Definition: IfxEray_PinMap.c:30
IfxEray0_RXDA3_P14_1_IN
IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
Definition: IfxEray_PinMap.c:31
IfxEray0_RXDB0_P14_7_IN
IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
Definition: IfxEray_PinMap.c:32
IFXERAY_PINMAP_NUM_NODES
#define IFXERAY_PINMAP_NUM_NODES
Definition: IfxEray_PinMap.h:92
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxEray0_TXDA_P14_0_OUT
IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
Definition: IfxEray_PinMap.c:38
IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:94
IfxEray0_TXDB_P14_5_OUT
IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
Definition: IfxEray_PinMap.c:43
IfxEray0_TXENA_P14_9_OUT
IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
Definition: IfxEray_PinMap.c:46


iLLD_TC26B: IfxEray_PinMap.h Source File

  • _PinMap
IfxEray_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_PinMap.h
3 * \brief ERAY I/O map
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Eray_pinmap ERAY Pin Mapping
25 * \ingroup IfxLld_Eray
26 */
27
28 #ifndef IFXERAY_PINMAP_H
29 #define IFXERAY_PINMAP_H
30
31 #include <IfxEray_reg.h>
32 #include <_Impl/IfxEray_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Eray_pinmap
36 * \{ */
37
38 /** \brief RXD pin mapping structure */
39 typedef const struct
40 {
41 Ifx_ERAY* module; /**< \brief Base address */
42 IfxEray_NodeId nodeId; /**< \brief Node ID */
43 IfxPort_Pin pin; /**< \brief Port pin */
44 Ifx_RxSel select; /**< \brief Input multiplexer value */
45 } IfxEray_Rxd_In;
46
47 /** \brief TXD pin mapping structure */
48 typedef const struct
49 {
50 Ifx_ERAY* module; /**< \brief Base address */
51 IfxEray_NodeId nodeId; /**< \brief Node ID */
52 IfxPort_Pin pin; /**< \brief Port pin */
53 IfxPort_OutputIdx select; /**< \brief Port control code */
54 } IfxEray_Txd_Out;
55
56 /** \brief TXEN pin mapping structure */
57 typedef const struct
58 {
59 Ifx_ERAY* module; /**< \brief Base address */
60 IfxEray_NodeId nodeId; /**< \brief Node ID */
61 IfxPort_Pin pin; /**< \brief Port pin */
62 IfxPort_OutputIdx select; /**< \brief Port control code */
63 } IfxEray_Txen_Out;
64
65 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN; /**< \brief ERAY_RXDA0: ERAY input */
66 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN; /**< \brief ERAY_RXDA1: ERAY input */
67 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN; /**< \brief ERAY_RXDA2: ERAY input */
68 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN; /**< \brief ERAY_RXDA3: ERAY input */
69 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN; /**< \brief ERAY_RXDB0: ERAY input */
70 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN; /**< \brief ERAY_RXDB1: ERAY input */
71 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN; /**< \brief ERAY_RXDB2: ERAY input */
72 IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN; /**< \brief ERAY_RXDB3: ERAY input */
73 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT; /**< \brief ERAY_TXDA: ERAY output */
74 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT; /**< \brief ERAY_TXDA: ERAY output */
75 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT; /**< \brief ERAY_TXDA: ERAY output */
76 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT; /**< \brief ERAY_TXDA: ERAY output */
77 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT; /**< \brief ERAY_TXDB: ERAY output */
78 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT; /**< \brief ERAY_TXDB: ERAY output */
79 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT; /**< \brief ERAY_TXDB: ERAY output */
80 IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT; /**< \brief ERAY_TXDB: ERAY output */
81 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT; /**< \brief ERAY_TXENA: ERAY output */
82 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT; /**< \brief ERAY_TXENA: ERAY output */
83 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT; /**< \brief ERAY_TXENA: ERAY output */
84 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT; /**< \brief ERAY_TXENB: ERAY output */
85 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT; /**< \brief ERAY_TXENB: ERAY output */
86 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT; /**< \brief ERAY_TXENB: ERAY output */
87 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT; /**< \brief ERAY_TXENB: ERAY output */
88 IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT; /**< \brief ERAY_TXENB: ERAY output */
89
90 /** \brief Table dimensions */
91 #define IFXERAY_PINMAP_NUM_MODULES 1
92 #define IFXERAY_PINMAP_NUM_NODES 2
93 #define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
94 #define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
95 #define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5
96
97
98 /** \brief IfxEray_Rxd_In table */
99 IFX_EXTERN const IfxEray_Rxd_In *IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS];
100
101 /** \brief IfxEray_Txd_Out table */
102 IFX_EXTERN const IfxEray_Txd_Out *IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS];
103
104 /** \brief IfxEray_Txen_Out table */
105 IFX_EXTERN const IfxEray_Txen_Out *IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS];
106
107 /** \} */
108
109 #endif /* IFXERAY_PINMAP_H */
IfxEray_Txd_Out
TXD pin mapping structure.
Definition: IfxEray_PinMap.h:48
IfxEray0_TXENB_P11_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:86
IfxEray_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEray_PinMap.h:43
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxEray_Rxd_In_pinTable
IFX_EXTERN const IfxEray_Rxd_In * IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS]
IfxEray_Rxd_In table.
Definition: IfxEray_PinMap.h:99
IfxEray_Txen_Out
TXEN pin mapping structure.
Definition: IfxEray_PinMap.h:57
IfxEray0_RXDA2_P02_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN
ERAY_RXDA2: ERAY input.
Definition: IfxEray_PinMap.h:67
IfxEray0_TXENB_P14_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:87
IfxEray_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEray_PinMap.h:53
IfxEray0_TXENA_P14_9_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT
ERAY_TXENA: ERAY output.
Definition: IfxEray_PinMap.h:83
IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEray_PinMap.h:93
IfxEray0_TXDB_P14_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT
ERAY_TXDB: ERAY output.
Definition: IfxEray_PinMap.h:79
IfxEray0_RXDB2_P02_3_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN
ERAY_RXDB2: ERAY input.
Definition: IfxEray_PinMap.h:71
IfxEray_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEray_PinMap.h:44
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxEray0_TXENA_P02_4_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT
ERAY_TXENA: ERAY output.
Definition: IfxEray_PinMap.h:81
IfxEray0_RXDB0_P14_7_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN
ERAY_RXDB0: ERAY input.
Definition: IfxEray_PinMap.h:69
IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:95
IfxEray0_TXENB_P11_11_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:85
IfxEray_Txen_Out_pinTable
IFX_EXTERN const IfxEray_Txen_Out * IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEray_Txen_Out table.
Definition: IfxEray_PinMap.h:105
IfxEray_Rxd_In::nodeId
IfxEray_NodeId nodeId
Node ID.
Definition: IfxEray_PinMap.h:42
IfxEray0_TXENB_P02_5_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:84
IfxEray0_RXDB3_P14_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN
ERAY_RXDB3: ERAY input.
Definition: IfxEray_PinMap.h:72
IfxEray0_TXENB_P14_9_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT
ERAY_TXENB: ERAY output.
Definition: IfxEray_PinMap.h:88
IfxEray0_TXDA_P11_3_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT
ERAY_TXDA: ERAY output.
Definition: IfxEray_PinMap.h:74
IfxEray0_TXDB_P02_2_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT
ERAY_TXDB: ERAY output.
Definition: IfxEray_PinMap.h:77
IFXERAY_PINMAP_NUM_MODULES
#define IFXERAY_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEray_PinMap.h:91
IfxEray_Rxd_In::module
Ifx_ERAY * module
Base address.
Definition: IfxEray_PinMap.h:41
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxEray0_TXENA_P11_6_OUT
IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT
ERAY_TXENA: ERAY output.
Definition: IfxEray_PinMap.h:82
IfxEray0_RXDB1_P11_10_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN
ERAY_RXDB1: ERAY input.
Definition: IfxEray_PinMap.h:70
IfxEray_Rxd_In
RXD pin mapping structure.
Definition: IfxEray_PinMap.h:39
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxEray0_TXDA_P14_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT
ERAY_TXDA: ERAY output.
Definition: IfxEray_PinMap.h:75
IfxEray0_RXDA1_P11_9_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN
ERAY_RXDA1: ERAY input.
Definition: IfxEray_PinMap.h:66
IfxEray0_TXDB_P11_12_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT
ERAY_TXDB: ERAY output.
Definition: IfxEray_PinMap.h:78
IfxEray0_RXDA3_P14_1_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN
ERAY_RXDA3: ERAY input.
Definition: IfxEray_PinMap.h:68
IFXERAY_PINMAP_NUM_NODES
#define IFXERAY_PINMAP_NUM_NODES
Definition: IfxEray_PinMap.h:92
IfxEray0_TXDA_P02_0_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT
ERAY_TXDA: ERAY output.
Definition: IfxEray_PinMap.h:73
IfxEray0_RXDA0_P14_8_IN
IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN
ERAY_RXDA0: ERAY input.
Definition: IfxEray_PinMap.h:65
IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEray_PinMap.h:94
IfxEray_cfg.h
ERAY on-chip implementation data.
IfxEray_NodeId
IfxEray_NodeId
Node Id in communication cycle.
Definition: IfxEray_cfg.h:70
IfxEray0_TXDB_P14_5_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT
ERAY_TXDB: ERAY output.
Definition: IfxEray_PinMap.h:80
IfxEray_Txd_Out_pinTable
IFX_EXTERN const IfxEray_Txd_Out * IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEray_Txd_Out table.
Definition: IfxEray_PinMap.h:102
IfxEray0_TXDA_P14_10_OUT
IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT
ERAY_TXDA: ERAY output.
Definition: IfxEray_PinMap.h:76
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxEray_cfg.c Source File

  • _Impl
IfxEray_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxEray_cfg.c
3 * \brief ERAY on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxEray_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES] = {
36 {&MODULE_ERAY0, (uint32)IfxEray_Index_0},
37 };
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxEray_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.c:35
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:65
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:48
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxEray_cfg.h
ERAY on-chip implementation data.


iLLD_TC26B: IfxEray_cfg.h Source File

  • _Impl
IfxEray_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEray_cfg.h
3 * \brief ERAY on-chip implementation data
4 * \ingroup IfxLld_Eray
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Eray ERAY
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Eray_Impl Implementation
27 * \ingroup IfxLld_Eray
28 * \defgroup IfxLld_Eray_Std Standard Driver
29 * \ingroup IfxLld_Eray
30 * \defgroup IfxLld_Eray_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Eray_Impl
32 */
33
34 #ifndef IFXERAY_CFG_H
35 #define IFXERAY_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "IfxEray_reg.h"
43
44 /******************************************************************************/
45 /*-----------------------------------Macros-----------------------------------*/
46 /******************************************************************************/
47
48 #define IFXERAY_NUM_MODULES (1)
49
50 #define IFXERAY_NUM_SLOTS (128)
51
52 #define IFXERAY_NUM_CHANNELS (2)
53
54 /******************************************************************************/
55 /*--------------------------------Enumerations--------------------------------*/
56 /******************************************************************************/
57
58 /** \addtogroup IfxLld_Eray_Impl_Enumerations
59 * \{ */
60 /** \brief List of the available Eray resources
61 */
62 typedef enum
63 {
64 IfxEray_Index_none = -1, /**< \brief Not Selected */
65 IfxEray_Index_0 = 0, /**< \brief ERAY index 0 */
66 } IfxEray_Index;
67
68 /** \brief Node Id in communication cycle.
69 */
70 typedef enum
71 {
72 IfxEray_NodeId_a = 0, /**< \brief Ifx_ERAY Node A */
73 IfxEray_NodeId_b = 1, /**< \brief Ifx_ERAY Node B */
74 IfxEray_NodeId_none = -1 /**< \brief None of the Ifx_ERAY Nodes */
75 } IfxEray_NodeId;
76
77 /** \} */
78
79 /** \addtogroup IfxLld_Eray_Impl_Enumerations
80 * \{ */
81
82 /******************************************************************************/
83 /*-------------------Global Exported Variables/Constants----------------------*/
84 /******************************************************************************/
85
86 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES];
87
88 /** \} */
89
90 #endif /* IFXERAY_CFG_H */
IfxEray_NodeId_none
None of the Ifx_ERAY Nodes.
Definition: IfxEray_cfg.h:74
IfxEray_NodeId_b
Ifx_ERAY Node B.
Definition: IfxEray_cfg.h:73
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxEray_Index_0
ERAY index 0.
Definition: IfxEray_cfg.h:65
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IFXERAY_NUM_MODULES
#define IFXERAY_NUM_MODULES
Definition: IfxEray_cfg.h:48
IfxEray_NodeId_a
Ifx_ERAY Node A.
Definition: IfxEray_cfg.h:72
IfxEray_Index_none
Not Selected.
Definition: IfxEray_cfg.h:64
IfxEray_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES]
Definition: IfxEray_cfg.h:86
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxEray_Index
IfxEray_Index
List of the available Eray resources.
Definition: IfxEray_cfg.h:62
IfxEray_NodeId
IfxEray_NodeId
Node Id in communication cycle.
Definition: IfxEray_cfg.h:70


iLLD_TC26B: IfxEth.c Source File

  • Eth
  • Std
IfxEth.c
Go to the documentation of this file.
1 /**
2 * \file IfxEth.c
3 * \brief ETH basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxEth.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
36
37 IfxEth_RxDescrList IfxEth_rxDescr;
38
39 uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
40
41 IfxEth_TxDescrList IfxEth_txDescr;
42
43 /******************************************************************************/
44 /*-------------------------Function Implementations---------------------------*/
45 /******************************************************************************/
46
47 void IfxEth_disableModule(void)
48 {
49 uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
50 IfxScuWdt_clearCpuEndinit(l_TempVar);
51 ETH_CLC.B.DISR = 1;
52 IfxScuWdt_setCpuEndinit(l_TempVar);
53 }
54
55
56 void IfxEth_enableModule(void)
57 {
58 {
59 uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
60 IfxScuWdt_clearCpuEndinit(l_TempVar);
61 ETH_CLC.U = 0;
62 IfxScuWdt_setCpuEndinit(l_TempVar);
63 }
64 }
65
66
67 void IfxEth_freeReceiveBuffer(IfxEth *eth)
68 {
69 IfxEth_RxDescr *descr = IfxEth_getActualRxDescriptor(eth);
70 IfxEth_RxDescr_release(descr);
71 IfxEth_shuffleRxDescriptor(eth);
72 }
73
74
75 void *IfxEth_getReceiveBuffer(IfxEth *eth)
76 {
77 void *result = 0;
78 IfxEth_RxDescr *descr;
79
80 if (IfxEth_isRxDataAvailable(eth))
81 {
82 eth->rxCount++;
83 descr = IfxEth_getActualRxDescriptor(eth);
84 result = (void *)(descr->RDES2.U);
85 }
86
87 IfxEth_wakeupReceiver(eth);
88
89 return result;
90 }
91
92
93 void *IfxEth_getTransmitBuffer(IfxEth *eth)
94 {
95 void *buffer = NULL_PTR;
96 IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
97
98 // check descriptor / buffer is free.
99 if (descr->TDES0.A.OWN == 0)
100 {
101 buffer = ((void *)descr->TDES2.U);
102 }
103
104 return buffer;
105 }
106
107
108 void IfxEth_init(IfxEth *eth, const IfxEth_Config *config)
109 {
110 eth->ethSfr = config->ethSfr;
111
112 #ifndef _WIN32
113 IfxEth_enableModule();
114
115 if (config->phyInterfaceMode == IfxEth_PhyInterfaceMode_rmii)
116 {
117 if (config->rmiiPins != NULL_PTR)
118 {
119 IfxEth_setupRmiiOutputPins(eth, config->rmiiPins);
120 IfxEth_setupRmiiInputPins(eth, config->rmiiPins);
121 }
122 }
123 else
124 {
125 if (config->miiPins != NULL_PTR)
126 {
127 IfxEth_setupMiiOutputPins(eth, config->miiPins);
128 IfxEth_setupMiiInputPins(eth, config->miiPins);
129 }
130 }
131
132 #endif
133
134 IfxEth_resetModule();
135
136 /* select the Phy Interface Mode */
137 IfxEth_setPhyInterfaceMode(eth, config->phyInterfaceMode);
138 IfxEth_applySoftwareReset(eth);
139
140 /* wait until reset is finished or timeout. */
141 {
142 uint32 timeout = 0;
143
144 while ((IfxEth_isSoftwareResetDone(eth) == 0) && (timeout < IFXETH_MAX_TIMEOUT_VALUE))
145 {
146 timeout++;
147 }
148 }
149
150 /* configure bus mode */
151 {
152 Ifx_ETH_BUS_MODE busMode;
153 busMode.U = ETH_BUS_MODE.U;
154 busMode.B.DSL = 0; /* descriptor skip length in ring mode */
155 busMode.B.ATDS = 0; /* alternate descriptor size: 0 => 4 DWORDS, 1 => 8 DWORDS */
156 busMode.B.DA = 0; /* 0 = weighted round-robin, 1 = fixed priority */
157
158 ETH_BUS_MODE.U = busMode.U;
159 }
160
161 /* configure ETH MAC */
162 {
163 Ifx_ETH_MAC_CONFIGURATION ethMacCfg;
164 ethMacCfg.U = ETH_MAC_CONFIGURATION.U;
165
166 ethMacCfg.B.PRELEN = 0; /* 7 bytes preamble */
167 // ethMacCfg.B.RE = 0; /* disable receiver */
168 // ethMacCfg.B.TE = 0; /* disable transmitter */
169 ethMacCfg.B.DC = 0; /* Deferral Check */
170 // ethMacCfg.B.BL = 0; /* Backoff Limit */
171 ethMacCfg.B.ACS = 1; /* Automatic Pad/CRC stripping--less than 1536 bytes */
172 // ethMacCfg.B.DR = 0; /* Disable Retry */
173 ethMacCfg.B.IPC = 0; /* checksum offload */
174 ethMacCfg.B.DM = 1; /* Duplex Mode: 0=Half Duplex, 1=Full duplex */
175 ethMacCfg.B.LM = 0; /* Loopback Mode */
176 // ethMacCfg.B.DO = 0; /* Disable Receive Own */
177 ethMacCfg.B.FES = 1; /* Speed 0->10mbps 1->100mbps */
178 ethMacCfg.B.PS = 1; /* port select 10/100mbps */
179 ethMacCfg.B.IFG = 0; /* Inter Frame Gap - gap between frames = 96 bit times */
180 ethMacCfg.B.JE = 0; /* Jumbo Frame Enable - no jumbo frames */
181 ethMacCfg.B.JD = 0; /* Jabber Disable - cut of transmission after 2,048 data bytes. */
182 ethMacCfg.B.WD = 0; /* Watchdog Disable - cut off frame after 2,048 bytes. */
183 ethMacCfg.B.CST = 1; /* CRC stripping - last four bytes are stripped and dropped to application. */
184 ethMacCfg.B.TWOKPE = 0; /* 2K Packets Enable - with JE=0 - all received frames of size > 1,518bytes are Giant frames.*/
185
186 ETH_MAC_CONFIGURATION.U = ethMacCfg.U;
187 }
188
189 IfxEth_setMacAddress(eth, config->macAddress);
190
191 /* setup MMC */
192 ETH_MMC_CONTROL.B.CNTFREEZ = 1; /* disable MMC counters - counters reset */
193
194 /* setup GMAC */
195 ETH_STATUS.U = 0x0001e7ff; /* reset all interrupt flag(s) */
196 ETH_MAC_FRAME_FILTER.U = 0x00000010; /* Hash Unicast */
197
198 ETH_INTERRUPT_ENABLE.U = 0x00010041; /* enable tx & rx interrupts */
199
200 #ifndef _WIN32
201
202 if (config->isrPriority)
203 {
204 IfxSrc_init(&SRC_ETH, config->isrProvider, config->isrPriority);
205 IfxSrc_enable(&SRC_ETH);
206 }
207
208 if (config->phyInit != NULL_PTR)
209 {
210 config->phyInit(); /* init PHY (100Mbit, full duplex with RMII) */
211 }
212
213 #endif
214
215 eth->config = *config;
216 eth->error = 0;
217 eth->status.U = 0;
218 eth->rxCount = 0;
219 eth->txCount = 0;
220
221 IfxEth_stopTransmitter(eth);
222
223 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, sizeof(IfxEth_TxDescr) == (IFXETH_DESCR_SIZE * sizeof(uint32)));
224 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, sizeof(IfxEth_RxDescr) == (IFXETH_DESCR_SIZE * sizeof(uint32)));
225
226 eth->rxDescr = config->rxDescr;
227 eth->txDescr = config->txDescr;
228
229 eth->descriptorMode = config->descriptorMode;
230
231 if (config->descriptorMode == IfxEth_DescriptorMode_chain)
232 {
233 IfxEth_initReceiveDescriptors(eth);
234 IfxEth_initTransmitDescriptors(eth);
235 }
236 else if (config->descriptorMode == IfxEth_DescriptorMode_ring)
237 {
238 IfxEth_initReceiveDescriptorsRingMode(eth, &config->ringModeBuffersConfig.rxConfig);
239 IfxEth_initTransmitDescriptorsRingMode(eth, &config->ringModeBuffersConfig.txConfig);
240 }
241 else
242 {}
243 }
244
245
246 void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr)
247 {
248 const IfxEth_Config defaultConfig = {
249 {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}, /* MAC address */
250 NULL_PTR,
251 NULL_PTR,
252 IfxEth_PhyInterfaceMode_rmii, /* PHY Interfac mode RMII */
253 NULL_PTR, /* Pointer to the RMII pin config */
254 NULL_PTR, /* Pointer to the MII pin config */
255 (Ifx_Priority)0, /* Interrupt serivce priority */
256 IfxSrc_Tos_cpu0, /* Interrupt serivce provider */
257 NULL_PTR, /* Pointer to register base */
258 &IfxEth_rxDescr, /* pointer to RX descriptor RAM */
259 &IfxEth_txDescr, /* pointer to TX descriptor RAM */
260 IfxEth_DescriptorMode_chain, /* chain mode descreptors */
261 {
262 {
263 IfxEth_RingModeBufferUsed_buffer1,
264 0x0,
265 0x0,
266 IFXETH_RTX_BUFFER_SIZE,
267 0,
268 },
269 {
270 IfxEth_RingModeBufferUsed_buffer1,
271 0x0,
272 0x0,
273 IFXETH_RTX_BUFFER_SIZE,
274 0,
275 },
276 },
277 };
278
279 *config = defaultConfig;
280 config->ethSfr = ethSfr;
281 }
282
283
284 void IfxEth_initReceiveDescriptors(IfxEth *eth)
285 {
286 /* Use enhanced descriptors, because ETH is generally configured to precision time protocol. */
287 int i;
288 IfxEth_RxDescr *descr = IfxEth_getBaseRxDescriptor(eth);
289
290 eth->pRxDescr = descr;
291
292 /* init descriptor chained mode */
293 for (i = 0; i < IFXETH_MAX_RX_BUFFERS; i++)
294 {
295 descr->RDES0.U = 0;
296 descr->RDES0.A.OWN = 1U;
297
298 descr->RDES1.U = 0;
299 descr->RDES1.A.RCH = 1U;
300 descr->RDES1.A.RBS1 = (IFXETH_RTX_BUFFER_SIZE);
301
302 #ifndef IFXETH_RX_BUFFER_BY_USER
303 IfxEth_RxDescr_setBuffer(descr, &(IfxEth_rxBuffer[i][0]));
304 #endif
305
306 /* with RCH set, link to next descriptor address */
307 descr->RDES3.U = (uint32)&(descr[1]);
308 descr = &descr[1];
309 }
310
311 /* correction for last descriptor */
312 {
313 descr = &descr[-1];
314
315 /* indicate end of ring */
316 descr->RDES1.A.RER = 1U;
317
318 /* with RCH set, link to first descriptor address */
319 eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
320 descr->RDES3.U = (uint32)eth->pRxDescr;
321 }
322
323 eth->rxCount = 0;
324
325 /* write descriptor list base address */
326 IfxEth_setReceiveDescriptorAddress(&MODULE_ETH, IfxEth_getBaseRxDescriptor(eth));
327 }
328
329
330 void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
331 {
332 /* Use enhanced descriptors, because ETH is generally configured to precision time protocol. */
333 int i;
334 uint32 buffer1StartAddress = 0;
335 uint32 buffer2StartAddress = 0;
336
337 IfxEth_RxDescr *descr = IfxEth_getBaseRxDescriptor(eth);
338
339 eth->pRxDescr = descr;
340
341 /* init descriptors in ring mode */
342
343 for (i = 0; i < IFXETH_MAX_RX_BUFFERS; i++)
344 {
345 descr->RDES0.U = 0;
346 descr->RDES0.A.OWN = 1U;
347
348 descr->RDES1.U = 0;
349
350 if ((config->rxBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (config->rxBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
351 {
352 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->rxBuffer1Size) % 4 == 0);
353 buffer1StartAddress = (uint32)(config->rxBuffer1StartAddress + (config->rxBuffer1Size * i));
354 IfxEth_setReceiveBuffer1RingMode(eth, descr, buffer1StartAddress, config->rxBuffer1Size);
355 }
356 else
357 {
358 IfxEth_setReceiveBuffer1RingMode(eth, descr, 0x0, 0);
359 }
360
361 if ((config->rxBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (config->rxBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
362 {
363 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->rxBuffer2Size) % 4 == 0);
364 buffer2StartAddress = (uint32)(config->rxBuffer2StartAddress + (config->rxBuffer2Size * i));
365 IfxEth_setReceiveBuffer2RingMode(eth, descr, buffer2StartAddress, config->rxBuffer2Size);
366 }
367 else
368 {
369 IfxEth_setReceiveBuffer2RingMode(eth, descr, 0x0, 0);
370 }
371
372 descr = &descr[1];
373 }
374
375 /* correction for last descriptor */
376 {
377 descr = &descr[-1];
378
379 /* indicate end of ring */
380 descr->RDES1.A.RER = 1U;
381
382 eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
383 }
384
385 eth->rxCount = 0;
386
387 /* write descriptor list base address */
388 IfxEth_setReceiveDescriptorAddress(&MODULE_ETH, IfxEth_getBaseRxDescriptor(eth));
389
390 eth->rxBufferUsed = config->rxBufferUsed;
391 }
392
393
394 void IfxEth_initTransmitDescriptors(IfxEth *eth)
395 {
396 int i;
397 IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
398
399 eth->pTxDescr = descr;
400
401 /* Initialize chained descriptor mode */
402 for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
403 {
404 descr->TDES0.U = 0;
405 descr->TDES0.A.IC = 1U;
406 descr->TDES0.A.FS = 1U;
407 descr->TDES0.A.LS = 1U;
408 descr->TDES0.A.TCH = 1U;
409
410 #ifndef IFXETH_TX_BUFFER_BY_USER
411 IfxEth_TxDescr_setBuffer(descr, &(IfxEth_txBuffer[i][0]));
412 #endif
413
414 /* with TCH set, TDES3 points to next descriptor */
415 descr->TDES3.U = (uint32)&descr[1];
416 descr = &descr[1];
417 }
418
419 /* correction for last descriptor */
420 {
421 descr = &descr[-1];
422
423 /* indicate end of ring */
424 descr->TDES0.A.TER = 1U;
425
426 /* with TCH set, TDES3 points to the first descriptor */
427 eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
428 descr->TDES3.U = (uint32)eth->pTxDescr;
429 }
430
431 eth->txCount = 0;
432
433 /* write descriptor list base address */
434 IfxEth_setTransmitDescriptorAddress(&MODULE_ETH, IfxEth_getBaseTxDescriptor(eth));
435 }
436
437
438 void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
439 {
440 int i;
441 uint32 buffer1StartAddress = 0;
442 uint32 buffer2StartAddress = 0;
443
444 IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
445
446 eth->pTxDescr = descr;
447
448 /* Initialize descriptors in ring mode */
449 for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
450 {
451 descr->TDES0.U = 0;
452 descr->TDES0.A.IC = 1U;
453 descr->TDES0.A.FS = 1U;
454 descr->TDES0.A.LS = 1U;
455
456 if ((config->txBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (config->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
457 {
458 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->txBuffer1Size) % 4 == 0);
459
460 buffer1StartAddress = (uint32)(config->txBuffer1StartAddress + (config->txBuffer1Size * i));
461 IfxEth_setTransmitBuffer1RingMode(eth, descr, buffer1StartAddress, config->txBuffer1Size);
462 }
463 else
464 {
465 IfxEth_setTransmitBuffer1RingMode(eth, descr, 0x0, 0);
466 }
467
468 if ((config->txBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (config->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
469 {
470 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->txBuffer2Size) % 4 == 0);
471
472 buffer2StartAddress = (uint32)(config->txBuffer2StartAddress + (config->txBuffer2Size * i));
473 IfxEth_setTransmitBuffer2RingMode(eth, descr, buffer2StartAddress, config->txBuffer2Size);
474 }
475 else
476 {
477 IfxEth_setTransmitBuffer2RingMode(eth, descr, 0x0, 0);
478 }
479
480 descr = &descr[1];
481 }
482
483 /* correction for last descriptor */
484 {
485 descr = &descr[-1];
486
487 /* indicate end of ring */
488 descr->TDES0.A.TER = 1U;
489
490 eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
491 }
492
493 eth->txCount = 0;
494
495 /* write descriptor list base address */
496 IfxEth_setTransmitDescriptorAddress(&MODULE_ETH, IfxEth_getBaseTxDescriptor(eth));
497
498 eth->txBufferUsed = config->txBufferUsed;
499 }
500
501
502 void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress)
503 {
504 (void)eth;
505 *((uint32 *)macAddress) = ETH_MAC_ADDRESS_G00_LOW.U;
506 *((uint16 *)(&macAddress[4])) = (uint16)(ETH_MAC_ADDRESS_G00_HIGH.U & 0xFFFFU);
507 }
508
509
510 void IfxEth_resetModule(void)
511 {
512 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
513 IfxScuWdt_clearCpuEndinit(passwd);
514
515 ETH_KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
516 ETH_KRST1.B.RST = 1;
517 IfxScuWdt_setCpuEndinit(passwd);
518
519 while (0 == ETH_KRST0.B.RSTSTAT) /* Wait until reset is executed */
520 {}
521
522 IfxScuWdt_clearCpuEndinit(passwd);
523 ETH_KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
524
525 IfxScuWdt_setCpuEndinit(passwd);
526 }
527
528
529 void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len)
530 {
531 IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
532
533 descr->TDES1.U = len; /* with TCH set, TBS1 is used for buffer size */
534 descr->TDES0.A.OWN = 1U; /* release to DMA */
535
536 IfxEth_wakeupTransmitter(eth);
537 IfxEth_shuffleTxDescriptor(eth);
538
539 eth->txCount++;
540 }
541
542
543 void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
544 {
545 IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
546
547 if ((eth->txBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (eth->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
548 {
549 descr->TDES1.A.TBS1 = buffer1Length;
550 }
551
552 if ((eth->txBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (eth->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
553 {
554 descr->TDES1.A.TBS2 = buffer2Length;
555 }
556
557 descr->TDES0.A.OWN = 1U; /* release to DMA */
558
559 IfxEth_wakeupTransmitter(eth);
560 IfxEth_shuffleTxDescriptor(eth);
561
562 eth->txCount++;
563 }
564
565
566 void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len)
567 {
568 IfxEth_TxDescr_setBuffer(IfxEth_getActualTxDescriptor(eth), buffer);
569 IfxEth_sendTransmitBuffer(eth, len);
570 }
571
572
573 void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress)
574 {
575 (void)eth;
576 ETH_MAC_ADDRESS_G00_HIGH.U = 0
577 | ((uint32)macAddress[4] << 0U)
578 | ((uint32)macAddress[5] << 8U)
579 | 0x80000000U;
580
581 ETH_MAC_ADDRESS_G00_LOW.U = 0
582 | ((uint32)macAddress[0] << 0U)
583 | ((uint32)macAddress[1] << 8U)
584 | ((uint32)macAddress[2] << 16U)
585 | ((uint32)macAddress[3] << 24U)
586 ;
587 }
588
589
590 void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode)
591 {
592 int i;
593
594 if (mode != IfxEth_ChecksumMode_bypass)
595 {
596 ETH_OPERATION_MODE.B.TSF = 1U;
597 ETH_OPERATION_MODE.B.DT = 0U; /* 0 = drop TCP/IP frame with checksum error */
598 ETH_MAC_CONFIGURATION.B.IPC = 1U; /* 1 = enable received IP frame checksum engine */
599
600 IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
601
602 for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
603 {
604 descr->TDES0.A.CIC = mode;
605 descr = IfxEth_TxDescr_getNext(descr);
606 }
607 }
608 }
609
610
611 void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
612 {
613 (void)eth;
614
615 IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
616 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
617
618 if (miiPins->crs != NULL_PTR)
619 {
620 IfxEth_Crs_In *crs = miiPins->crs;
621 ETH_GPCTL.B.ALTI2 = crs->select;
622 IfxPort_setPinModeInput(crs->pin.port, crs->pin.pinIndex, mode);
623 IfxPort_setPinPadDriver(crs->pin.port, crs->pin.pinIndex, speedGrade);
624 }
625 else
626 {
627 /* MII lite mode */
628 ETH_GPCTL.B.ALTI2 = Ifx_RxSel_d;
629 }
630
631 if (miiPins->col != NULL_PTR)
632 {
633 IfxEth_Col_In *col = miiPins->col;
634 ETH_GPCTL.B.ALTI3 = col->select;
635 IfxPort_setPinModeInput(col->pin.port, col->pin.pinIndex, mode);
636 IfxPort_setPinPadDriver(col->pin.port, col->pin.pinIndex, speedGrade);
637 }
638 else
639 {
640 /* MII lite mode */
641 ETH_GPCTL.B.ALTI3 = Ifx_RxSel_d;
642 }
643
644 IfxEth_Txclk_In *txClk = miiPins->txClk;
645 ETH_GPCTL.B.ALTI10 = txClk->select;
646 IfxPort_setPinModeInput(txClk->pin.port, txClk->pin.pinIndex, mode);
647 IfxPort_setPinPadDriver(txClk->pin.port, txClk->pin.pinIndex, speedGrade);
648
649 IfxEth_Rxclk_In *rxClk = miiPins->rxClk;
650 ETH_GPCTL.B.ALTI1 = rxClk->select;
651 IfxPort_setPinModeInput(rxClk->pin.port, rxClk->pin.pinIndex, mode);
652 IfxPort_setPinPadDriver(rxClk->pin.port, rxClk->pin.pinIndex, speedGrade);
653
654 IfxEth_Rxdv_In *rxDv = miiPins->rxDv;
655 ETH_GPCTL.B.ALTI4 = rxDv->select;
656 IfxPort_setPinModeInput(rxDv->pin.port, rxDv->pin.pinIndex, mode);
657 IfxPort_setPinPadDriver(rxDv->pin.port, rxDv->pin.pinIndex, speedGrade);
658
659 if (miiPins->rxEr != NULL_PTR)
660 {
661 IfxEth_Rxer_In *rxEr = miiPins->rxEr;
662 ETH_GPCTL.B.ALTI5 = rxEr->select;
663 IfxPort_setPinModeInput(rxEr->pin.port, rxEr->pin.pinIndex, mode);
664 IfxPort_setPinPadDriver(rxEr->pin.port, rxEr->pin.pinIndex, speedGrade);
665 }
666 else
667 {
668 /* MII lite mode */
669 ETH_GPCTL.B.ALTI5 = Ifx_RxSel_d;
670 }
671
672 IfxEth_Rxd_In *rxd0 = miiPins->rxd0;
673 ETH_GPCTL.B.ALTI6 = rxd0->select;
674 IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
675 IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
676
677 IfxEth_Rxd_In *rxd1 = miiPins->rxd1;
678 ETH_GPCTL.B.ALTI7 = rxd1->select;
679 IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
680 IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
681
682 IfxEth_Rxd_In *rxd2 = miiPins->rxd2;
683 ETH_GPCTL.B.ALTI8 = rxd2->select;
684 IfxPort_setPinModeInput(rxd2->pin.port, rxd2->pin.pinIndex, mode);
685 IfxPort_setPinPadDriver(rxd2->pin.port, rxd2->pin.pinIndex, speedGrade);
686
687 IfxEth_Rxd_In *rxd3 = miiPins->rxd3;
688 ETH_GPCTL.B.ALTI9 = rxd3->select;
689 IfxPort_setPinModeInput(rxd3->pin.port, rxd3->pin.pinIndex, mode);
690 IfxPort_setPinPadDriver(rxd3->pin.port, rxd3->pin.pinIndex, speedGrade);
691
692 IfxEth_Mdio_InOut *mdio = miiPins->mdio;
693 ETH_GPCTL.B.ALTI0 = mdio->inSelect;
694 }
695
696
697 void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
698 {
699 (void)eth;
700 IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
701 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
702
703 IfxEth_Txen_Out *txEn = miiPins->txEn;
704 IfxPort_setPinPadDriver(txEn->pin.port, txEn->pin.pinIndex, speedGrade);
705 IfxPort_setPinModeOutput(txEn->pin.port, txEn->pin.pinIndex, mode, txEn->select);
706
707 if (miiPins->txEr != NULL_PTR)
708 {
709 IfxEth_Txer_Out *txEr = miiPins->txEr;
710 IfxPort_setPinPadDriver(txEr->pin.port, txEr->pin.pinIndex, speedGrade);
711 IfxPort_setPinModeOutput(txEr->pin.port, txEr->pin.pinIndex, mode, txEr->select);
712 }
713
714 IfxEth_Txd_Out *txd0 = miiPins->txd0;
715 IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
716 IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
717
718 IfxEth_Txd_Out *txd1 = miiPins->txd1;
719 IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
720 IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
721
722 IfxEth_Txd_Out *txd2 = miiPins->txd2;
723 IfxPort_setPinPadDriver(txd2->pin.port, txd2->pin.pinIndex, speedGrade);
724 IfxPort_setPinModeOutput(txd2->pin.port, txd2->pin.pinIndex, mode, txd2->select);
725
726 IfxEth_Txd_Out *txd3 = miiPins->txd3;
727 IfxPort_setPinPadDriver(txd3->pin.port, txd3->pin.pinIndex, speedGrade);
728 IfxPort_setPinModeOutput(txd3->pin.port, txd3->pin.pinIndex, mode, txd3->select);
729
730 IfxEth_Mdc_Out *mdc = miiPins->mdc;
731 IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
732 IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
733 }
734
735
736 void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
737 {
738 (void)eth;
739
740 ETH_GPCTL.B.ALTI0 = rmiiPins->mdio->inSelect;
741 ETH_GPCTL.B.ALTI1 = rmiiPins->refClk->select;
742 ETH_GPCTL.B.ALTI4 = rmiiPins->crsDiv->select;
743 ETH_GPCTL.B.ALTI6 = rmiiPins->rxd0->select;
744 ETH_GPCTL.B.ALTI7 = rmiiPins->rxd1->select;
745
746 {
747 IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
748 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
749
750 IfxEth_Crsdv_In *crsDiv = rmiiPins->crsDiv;
751 IfxEth_Refclk_In *refClk = rmiiPins->refClk;
752 IfxEth_Rxd_In *rxd0 = rmiiPins->rxd0;
753 IfxEth_Rxd_In *rxd1 = rmiiPins->rxd1;
754
755 IfxPort_setPinModeInput(crsDiv->pin.port, crsDiv->pin.pinIndex, mode);
756 IfxPort_setPinModeInput(refClk->pin.port, refClk->pin.pinIndex, mode);
757 IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
758 IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
759
760 IfxPort_setPinPadDriver(crsDiv->pin.port, crsDiv->pin.pinIndex, speedGrade);
761 IfxPort_setPinPadDriver(refClk->pin.port, refClk->pin.pinIndex, speedGrade);
762 IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
763 IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
764 }
765 }
766
767
768 void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
769 {
770 IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
771 IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
772
773 IfxEth_Mdc_Out *mdc = rmiiPins->mdc;
774 IfxEth_Mdio_InOut *mdio = rmiiPins->mdio;
775 IfxEth_Txen_Out *txen = rmiiPins->txEn;
776 IfxEth_Txd_Out *txd0 = rmiiPins->txd0;
777 IfxEth_Txd_Out *txd1 = rmiiPins->txd1;
778
779 (void)eth;
780
781 #if 0
782 IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
783 IfxPort_setPinPadDriver(mdio->pin.port, mdio->pin.pinIndex, speedGrade);
784 #endif
785 IfxPort_setPinPadDriver(txen->pin.port, txen->pin.pinIndex, speedGrade);
786 IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
787 IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
788
789 IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
790 IfxPort_setPinModeOutput(txen->pin.port, txen->pin.pinIndex, mode, txen->select);
791 IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
792 IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
793
794 // For MDIO, when P21.1 is used it should be configured as output
795 if ((mdio->pin.port == (&MODULE_P21)) && (mdio->pin.pinIndex == 1))
796 {
797 IfxPort_setPinModeOutput(mdio->pin.port, mdio->pin.pinIndex, mode, mdio->outSelect);
798 }
799 }
800
801
802 void IfxEth_shuffleRxDescriptor(IfxEth *eth)
803 {
804 if (eth->descriptorMode == IfxEth_DescriptorMode_chain)
805 {
806 eth->pRxDescr = IfxEth_RxDescr_getNext(eth->pRxDescr);
807 }
808 else if ((eth->descriptorMode == IfxEth_DescriptorMode_ring) && (eth->pRxDescr->RDES1.A.RER != 1))
809 {
810 eth->pRxDescr = &eth->pRxDescr[1];
811 }
812 else
813 {
814 eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
815 }
816 }
817
818
819 void IfxEth_shuffleTxDescriptor(IfxEth *eth)
820 {
821 if (eth->descriptorMode == IfxEth_DescriptorMode_chain)
822 {
823 eth->pTxDescr = IfxEth_TxDescr_getNext(eth->pTxDescr);
824 }
825 else if ((eth->descriptorMode == IfxEth_DescriptorMode_ring) && (eth->pTxDescr->TDES0.A.TER != 1))
826 {
827 eth->pTxDescr = &eth->pTxDescr[1];
828 }
829 else
830 {
831 eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
832 }
833 }
834
835
836 void IfxEth_startReceiver(IfxEth *eth)
837 {
838 (void)eth;
839
840 // enable receiver and RX DMA
841 ETH_OPERATION_MODE.B.SR = 1;
842 ETH_MAC_CONFIGURATION.B.RE = 1;
843 ETH_RECEIVE_POLL_DEMAND.U = 1;
844 }
845
846
847 void IfxEth_startTransmitter(IfxEth *eth)
848 {
849 (void)eth;
850
851 ETH_MAC_CONFIGURATION.B.TE = 1;
852 ETH_OPERATION_MODE.B.ST = 1;
853 ETH_TRANSMIT_POLL_DEMAND.U = 1;
854 }
855
856
857 void IfxEth_stopReceiver(IfxEth *eth)
858 {
859 (void)eth;
860
861 ETH_OPERATION_MODE.B.SR = 0;
862 ETH_MAC_CONFIGURATION.B.RE = 0;
863 ETH_RECEIVE_POLL_DEMAND.U = 0;
864 }
865
866
867 void IfxEth_stopTransmitter(IfxEth *eth)
868 {
869 (void)eth;
870
871 ETH_TRANSMIT_POLL_DEMAND.U = 0;
872 ETH_OPERATION_MODE.B.ST = 0;
873 ETH_MAC_CONFIGURATION.B.TE = 0;
874 }
875
876
877 void IfxEth_wakeupReceiver(IfxEth *eth)
878 {
879 eth->status.U = ETH_STATUS.U;
880
881 // check if receiver suspended
882 if (eth->status.U & (4U << IFX_ETH_STATUS_RS_OFF))
883 {
884 if (eth->status.B.RU)
885 {
886 ETH_STATUS.U = (IFX_ETH_STATUS_RU_MSK << IFX_ETH_STATUS_RU_OFF);
887 }
888
889 IfxEth_startReceiver(eth);
890 }
891 }
892
893
894 void IfxEth_wakeupTransmitter(IfxEth *eth)
895 {
896 eth->status.U = ETH_STATUS.U;
897
898 // check if suspended
899 if (eth->status.U & 0x00600000)
900 {
901 if (eth->status.B.TU)
902 {
903 // clear transmit unavailable and underflow flags
904 ETH_STATUS.U = (IFX_ETH_STATUS_TU_MSK << IFX_ETH_STATUS_TU_OFF) |
905 (IFX_ETH_STATUS_UNF_MSK << IFX_ETH_STATUS_UNF_OFF);
906 }
907
908 IfxEth_startTransmitter(eth);
909 }
910 }
911
912
913 void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
914 {
915 (void)eth;
916 uint32 i;
917
918 /* Destination Address */
919 for (i = 0; i < 6; i++)
920 {
921 *txBuffer++ = *destinationAddress++;
922 }
923
924 /* Source Address */
925 for (i = 0; i < 6; i++)
926 {
927 *txBuffer++ = *sourceAddress++;
928 }
929
930 /* packet size */
931 *txBuffer++ = (uint8)(packetSize / 256);
932 *txBuffer = (uint8)(packetSize % 256);
933 }
IfxEth_Txd_Out
TXD pin mapping structure.
Definition: IfxEth_PinMap.h:120
IfxEth_RingModeTxBuffersConfig::txBufferUsed
IfxEth_RingModeBufferUsed txBufferUsed
Transmit Buffer(s) used in ringmode.
Definition: IfxEth.h:318
IfxEth_init
void IfxEth_init(IfxEth *eth, const IfxEth_Config *config)
Initialises the driver.
Definition: IfxEth.c:108
IfxEth_RxDescr1::A
IfxEth_AltRxDescr1_Bits A
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:251
IfxEth_RxDescr_release
IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr)
release RX descriptor
Definition: IfxEth.h:1213
IfxEth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:71
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxEth_RingModeBufferUsed_bothBuffers
BOth Buffers used.
Definition: IfxEth.h:129
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxEth_MiiPins::txd3
IfxEth_Txd_Out * txd3
Pointer to TXD3 output pin config.
Definition: IfxEth.h:368
IfxEth_RingModeTxBuffersConfig::txBuffer1Size
uint16 txBuffer1Size
Size of Tx Buffer 1.
Definition: IfxEth.h:321
IfxEth_TxDescr::TDES2
IfxEth_TxDescr2 TDES2
TX descriptor DWORD 2.
Definition: IfxEth.h:341
IfxEth_RingModeTxBuffersConfig::txBuffer1StartAddress
uint32 txBuffer1StartAddress
Start address of Tx Buffer 1.
Definition: IfxEth.h:319
IfxEth_MiiPins::rxClk
IfxEth_Rxclk_In * rxClk
Pointer to RXCLK input pin config.
Definition: IfxEth.h:356
IfxEth_Txer_Out
TXER pin mapping structure.
Definition: IfxEth_PinMap.h:136
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxEth_Config
ETH configuration structure.
Definition: IfxEth.h:418
IFXETH_RTX_BUFFER_SIZE
#define IFXETH_RTX_BUFFER_SIZE
Size of one ethernet frame buffer.
Definition: IfxEth.h:62
IfxEth_RingModeTxBuffersConfig
Configuration structure for Ring Mode Transmit buffers.
Definition: IfxEth.h:316
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxEth_DescriptorMode_ring
ring mode descriptors
Definition: IfxEth.h:98
IfxEth::txDescr
IfxEth_TxDescrList * txDescr
pointer to TX descriptor RAM
Definition: IfxEth.h:454
IfxEth_RingModeRxBuffersConfig::rxBufferUsed
IfxEth_RingModeBufferUsed rxBufferUsed
Receive Buffer(s) used in ringmode.
Definition: IfxEth.h:307
IfxEth_TxDescr1::A
IfxEth_AltTxDescr1_Bits A
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:281
IfxEth_MiiPins::rxd2
IfxEth_Rxd_In * rxd2
Pointer to RXD2 input pin config.
Definition: IfxEth.h:361
IfxEth_getReceiveBuffer
void * IfxEth_getReceiveBuffer(IfxEth *eth)
Gets receive buffer note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffe...
Definition: IfxEth.c:75
IfxEth_Mdio_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxEth_PinMap.h:116
IfxEth_MiiPins::col
IfxEth_Col_In * col
pointer to COL input pin config
Definition: IfxEth.h:354
IfxEth_DescriptorMode_chain
chain mode descriptors
Definition: IfxEth.h:97
IfxEth::pRxDescr
IfxEth_RxDescr * pRxDescr
Definition: IfxEth.h:455
IfxEth_getActualRxDescriptor
IFX_INLINE IfxEth_RxDescr * IfxEth_getActualRxDescriptor(IfxEth *eth)
Get pointer to actual RX descriptor.
Definition: IfxEth.h:1365
IfxEth_RxDescr::RDES1
IfxEth_RxDescr1 RDES1
RX descriptor DWORD 1.
Definition: IfxEth.h:330
IfxEth_isSoftwareResetDone
IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth)
Returns the status of Software Reset.
Definition: IfxEth.h:1515
IfxEth_Txen_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEth_PinMap.h:132
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEth_RingModeRxBuffersConfig
Configuration structure for Ring Mode Receive Buffers.
Definition: IfxEth.h:305
IfxEth_MiiPins::mdc
IfxEth_Mdc_Out * mdc
Pointer to MDC pin config.
Definition: IfxEth.h:369
IfxEth_resetModule
void IfxEth_resetModule(void)
resets Ethernet kernel
Definition: IfxEth.c:510
IfxEth_Rxer_In
RXER pin mapping structure.
Definition: IfxEth_PinMap.h:144
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxEth::ethSfr
Ifx_ETH * ethSfr
Pointer to register base.
Definition: IfxEth.h:457
IfxEth_AltTxDescr0_Bits::TCH
uint32 TCH
Second Address Chained.
Definition: IfxEth.h:212
IfxEth_Mdio_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxEth_PinMap.h:115
IfxEth_PhyInterfaceMode_rmii
RMII mode.
Definition: IfxEth.h:106
IfxEth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxEth_PinMap.h:111
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxEth_MiiPins::txd2
IfxEth_Txd_Out * txd2
Pointer to TXD2 output pin config.
Definition: IfxEth.h:367
IfxEth_TxDescr::TDES0
IfxEth_TxDescr0 TDES0
TX descriptor DWORD 0.
Definition: IfxEth.h:339
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxEth_rxDescr
IfxEth_RxDescrList IfxEth_rxDescr
Definition: IfxEth.c:37
IfxEth_RxDescr::RDES3
IfxEth_RxDescr3 RDES3
RX descriptor DWORD 3.
Definition: IfxEth.h:332
IfxEth::txCount
uint32 txCount
Number of frames transmitted.
Definition: IfxEth.h:445
IfxEth_writeHeader
void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer
Definition: IfxEth.c:913
IfxEth_MiiPins::rxd0
IfxEth_Rxd_In * rxd0
Pointer to RXD0 input pin config.
Definition: IfxEth.h:359
IfxEth_setupRmiiInputPins
void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins.
Definition: IfxEth.c:736
IfxEth_Config::isrPriority
Ifx_Priority isrPriority
Interrupt service priority.
Definition: IfxEth.h:426
IfxEth_initReceiveDescriptorsRingMode
void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors.
Definition: IfxEth.c:330
IfxEth_Txen_Out
TXEN pin mapping structure.
Definition: IfxEth_PinMap.h:128
IfxEth_applySoftwareReset
IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth)
Applies the Software Reset.
Definition: IfxEth.h:1261
IfxEth_txBuffer
uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
Definition: IfxEth.c:39
IfxEth_txDescr
IfxEth_TxDescrList IfxEth_txDescr
Definition: IfxEth.c:41
IfxEth_setupMiiOutputPins
void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins
Definition: IfxEth.c:697
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEth_TxDescr_setBuffer
IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer)
Set buffer of a TX descriptor.
Definition: IfxEth.h:1243
IfxEth_RingModeBuffersConfig::rxConfig
IfxEth_RingModeRxBuffersConfig rxConfig
Receive buffers ring mode config.
Definition: IfxEth.h:378
IfxEth_shuffleTxDescriptor
void IfxEth_shuffleTxDescriptor(IfxEth *eth)
Shuffle to next TX descriptor.
Definition: IfxEth.c:819
IfxEth_startReceiver
void IfxEth_startReceiver(IfxEth *eth)
Start the receiver functions.
Definition: IfxEth.c:836
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxEth_MiiPins::txEr
IfxEth_Txer_Out * txEr
Pointer to TXER output pin config.
Definition: IfxEth.h:364
IfxEth_RingModeRxBuffersConfig::rxBuffer2StartAddress
uint32 rxBuffer2StartAddress
Start address of Rx Buffer 2.
Definition: IfxEth.h:309
IfxEth_MiiPins::txd1
IfxEth_Txd_Out * txd1
Pointer to TXD1 output pin config.
Definition: IfxEth.h:366
IfxEth_MiiPins::txEn
IfxEth_Txen_Out * txEn
Pointer to TXEN output pin config.
Definition: IfxEth.h:363
IfxEth
ETH driver structure.
Definition: IfxEth.h:441
IfxEth_MiiPins::crs
IfxEth_Crs_In * crs
pointer to CRS input pin config
Definition: IfxEth.h:353
IfxEth_setPhyInterfaceMode
IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode)
Sets the Phy Interface mode.
Definition: IfxEth.h:1572
IfxEth_setTransmitDescriptorAddress
IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address)
Sets transmit descriptor address.
Definition: IfxEth.h:1634
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxEth_getActualTxDescriptor
IFX_INLINE IfxEth_TxDescr * IfxEth_getActualTxDescriptor(IfxEth *eth)
Get pointer to actual TX descriptor.
Definition: IfxEth.h:1378
IfxEth_initTransmitDescriptors
void IfxEth_initTransmitDescriptors(IfxEth *eth)
Initialises transmit descriptors.
Definition: IfxEth.c:394
IfxEth_readMacAddress
void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register.
Definition: IfxEth.c:502
IfxEth_setReceiveBuffer2RingMode
IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer2 of the receive descriptor along with its size.
Definition: IfxEth.h:1586
IfxEth_Col_In
COL pin mapping structure.
Definition: IfxEth_PinMap.h:95
IfxEth_RxDescr
Normal RX descriptor.
Definition: IfxEth.h:327
IfxEth_TxDescr
Normal TX descriptor.
Definition: IfxEth.h:337
IfxEth::rxDescr
IfxEth_RxDescrList * rxDescr
pointer to RX descriptor RAM
Definition: IfxEth.h:453
IfxEth_setupRmiiOutputPins
void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port
Definition: IfxEth.c:768
IfxEth_ChecksumMode_bypass
Definition: IfxEth.h:89
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxEth_RingModeRxBuffersConfig::rxBuffer1Size
uint16 rxBuffer1Size
Size of Rx Buffer 1.
Definition: IfxEth.h:310
IFXETH_MAX_TX_BUFFERS
#define IFXETH_MAX_TX_BUFFERS
Tx buffers (ring mode)
Definition: IfxEth.h:74
IfxEth_AltTxDescr0_Bits::CIC
uint32 CIC
Checksum Insertion Control.
Definition: IfxEth.h:214
IFXETH_MAX_TIMEOUT_VALUE
#define IFXETH_MAX_TIMEOUT_VALUE
Definition: IfxEth_cfg.h:43
IfxEth_TxDescr_getNext
IFX_INLINE IfxEth_TxDescr * IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr)
Get pointer to next TX descriptor.
Definition: IfxEth.h:1225
IfxEth_getTransmitBuffer
void * IfxEth_getTransmitBuffer(IfxEth *eth)
Get a free transmit buffer.
Definition: IfxEth.c:93
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:66
IfxEth_setTransmitBuffer2RingMode
IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer2 of the receive descriptor along with its size.
Definition: IfxEth.h:1627
IfxEth_ChecksumMode
IfxEth_ChecksumMode
Definition: IfxEth.h:87
IfxEth_MiiPins
Port pins for MII mode configuration.
Definition: IfxEth.h:351
IfxEth_AltTxDescr0_Bits::IC
uint32 IC
Interrupt on Completion.
Definition: IfxEth.h:221
IfxEth::descriptorMode
IfxEth_DescriptorMode descriptorMode
Descriptor mode (chain or ring)
Definition: IfxEth.h:458
IfxEth_AltTxDescr0_Bits::LS
uint32 LS
Last Segment.
Definition: IfxEth.h:220
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxEth.h
ETH basic functionality.
IfxEth_RxDescr::RDES0
IfxEth_RxDescr0 RDES0
RX descriptor DWORD 0.
Definition: IfxEth.h:329
IfxEth_rxBuffer
uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
Definition: IfxEth.c:35
IfxEth_MiiPins::txClk
IfxEth_Txclk_In * txClk
Pointer to TXCLK input pin config.
Definition: IfxEth.h:355
IfxEth_RingModeTxBuffersConfig::txBuffer2Size
uint16 txBuffer2Size
Size of Tx Buffer 2.
Definition: IfxEth.h:322
IfxEth_MiiPins::rxEr
IfxEth_Rxer_In * rxEr
Pointer to RXER input pin config.
Definition: IfxEth.h:358
IfxEth::error
uint32 error
Indicate an error has occurred during execution.
Definition: IfxEth.h:446
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxEth_RxDescr_setBuffer
IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer)
Set buffer of an RX descriptor.
Definition: IfxEth.h:1219
IfxEth_Crs_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEth_PinMap.h:42
IfxEth_Crs_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEth_PinMap.h:43
IfxEth_sendTransmitBuffersRingMode
void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer.
Definition: IfxEth.c:543
IfxEth_Rxd_In
RXD pin mapping structure.
Definition: IfxEth_PinMap.h:87
IfxEth_AltTxDescr0_Bits::TER
uint32 TER
Transmit End of Ring.
Definition: IfxEth.h:213
IfxEth_RxDescr_getNext
IFX_INLINE IfxEth_RxDescr * IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr)
Get pointer to next RX descriptor.
Definition: IfxEth.h:1207
IFXETH_MAX_RX_BUFFERS
#define IFXETH_MAX_RX_BUFFERS
Rx buffers (ring mode)
Definition: IfxEth.h:68
IFXETH_DESCR_SIZE
#define IFXETH_DESCR_SIZE
4 DWORDS (16 bytes)
Definition: IfxEth.h:79
IfxEth_getBaseTxDescriptor
IFX_INLINE IfxEth_TxDescr * IfxEth_getBaseTxDescriptor(IfxEth *eth)
Get pointer to base TX descriptor.
Definition: IfxEth.h:1390
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxEth_TxDescr::TDES1
IfxEth_TxDescr1 TDES1
TX descriptor DWORD 1.
Definition: IfxEth.h:340
IfxEth_RingModeBuffersConfig::txConfig
IfxEth_RingModeTxBuffersConfig txConfig
Transmit buffers ring mode config.
Definition: IfxEth.h:377
IfxEth_setupChecksumEngine
void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine.
Definition: IfxEth.c:590
IfxEth_RxDescr2::U
uint32 U
unsigned long access
Definition: IfxEth.h:259
IfxEth_AltRxDescr1_Bits::RCH
uint32 RCH
Second Address Chained.
Definition: IfxEth.h:185
IfxEth_setupMiiInputPins
void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins.
Definition: IfxEth.c:611
IfxEth_MiiPins::txd0
IfxEth_Txd_Out * txd0
Pointer to TXD0 output pin config.
Definition: IfxEth.h:365
IfxEth_Config::miiPins
IFX_CONST IfxEth_MiiPins * miiPins
Pointer to port pins configuration of MII mode.
Definition: IfxEth.h:425
IfxEth::pTxDescr
IfxEth_TxDescr * pTxDescr
Definition: IfxEth.h:456
IfxEth_RxDescrList
Definition: IfxEth.h:400
IfxEth_RingModeRxBuffersConfig::rxBuffer1StartAddress
uint32 rxBuffer1StartAddress
Start address of Rx Buffer 1.
Definition: IfxEth.h:308
IfxEth_Config::macAddress
uint8 macAddress[6]
MAC address for the ethernet, should be unique in the network.
Definition: IfxEth.h:420
IfxEth_TxDescr::TDES3
IfxEth_TxDescr3 TDES3
TX descriptor DWORD 3.
Definition: IfxEth.h:342
IfxEth_AltRxDescr1_Bits::RBS1
uint32 RBS1
Receive Buffer 1 Size.
Definition: IfxEth.h:183
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxEth_RxDescr0::A
IfxEth_AltRxDescr0_Bits A
Structure for RX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:243
IfxEth_setReceiveDescriptorAddress
IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address)
Sets receive descriptor address.
Definition: IfxEth.h:1593
IfxEth_setAndSendTransmitBuffer
void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len)
Definition: IfxEth.c:566
IfxEth_setMacAddress
void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress)
Sets the MAC address.
Definition: IfxEth.c:573
IfxEth_disableModule
void IfxEth_disableModule(void)
Disable ETH Module.
Definition: IfxEth.c:47
IfxEth_startTransmitter
void IfxEth_startTransmitter(IfxEth *eth)
Start the transmitter functions.
Definition: IfxEth.c:847
IfxEth::status
Ifx_ETH_STATUS status
Intermediate variable to use register content in control structure.
Definition: IfxEth.h:443
IfxEth_AltTxDescr0_Bits::OWN
uint32 OWN
Own Bit, 1 = own by DMA.
Definition: IfxEth.h:222
IfxEth_Mdc_Out
MDC pin mapping structure.
Definition: IfxEth_PinMap.h:103
IfxEth_wakeupReceiver
void IfxEth_wakeupReceiver(IfxEth *eth)
Wakeup the receiver functions.
Definition: IfxEth.c:877
IfxEth_MiiPins::mdio
IfxEth_Mdio_InOut * mdio
Pointer to MDIO pin config.
Definition: IfxEth.h:370
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxEth_AltRxDescr1_Bits::RER
uint32 RER
Receive End of Ring.
Definition: IfxEth.h:186
IfxEth_initConfig
void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure.
Definition: IfxEth.c:246
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxEth_AltTxDescr1_Bits::TBS1
uint32 TBS1
Transmit Buffer 1 Size.
Definition: IfxEth.h:229
IfxEth_RmiiPins::refClk
IfxEth_Refclk_In * refClk
Pointer to REFCLK input pin config.
Definition: IfxEth.h:386
IfxEth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxEth_PinMap.h:47
IfxEth_sendTransmitBuffer
void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len)
Request to send the transmit buffer.
Definition: IfxEth.c:529
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxEth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxEth_PinMap.h:63
IfxEth_AltTxDescr1_Bits::TBS2
uint32 TBS2
Transmit Buffer 2 Size.
Definition: IfxEth.h:231
IfxEth_MiiPins::rxd1
IfxEth_Rxd_In * rxd1
Pointer to RXD1 input pin config.
Definition: IfxEth.h:360
IfxEth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxEth_PinMap.h:55
IfxEth_enableModule
void IfxEth_enableModule(void)
Enable ETH Module.
Definition: IfxEth.c:56
IfxEth_Config::ringModeBuffersConfig
IfxEth_RingModeBuffersConfig ringModeBuffersConfig
Ring mode buffers condiguration.
Definition: IfxEth.h:432
IfxEth_RingModeBufferUsed_buffer1
Buffer 1 used.
Definition: IfxEth.h:127
IfxEth_MiiPins::rxDv
IfxEth_Rxdv_In * rxDv
Pointer to RXDV input pin config.
Definition: IfxEth.h:357
IfxEth_MiiPins::rxd3
IfxEth_Rxd_In * rxd3
Pointer to RXD3 input pin config.
Definition: IfxEth.h:362
IfxEth_Config::phyInit
uint32(* phyInit)(void)
Pointer to the transceiver init function.
Definition: IfxEth.h:421
IfxEth_stopReceiver
void IfxEth_stopReceiver(IfxEth *eth)
Stops the receiver functions.
Definition: IfxEth.c:857
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxEth_getBaseRxDescriptor
IFX_INLINE IfxEth_RxDescr * IfxEth_getBaseRxDescriptor(IfxEth *eth)
Get pointer to base RX descriptor.
Definition: IfxEth.h:1384
IfxEth_TxDescr0::A
IfxEth_AltTxDescr0_Bits A
Structure for TX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:273
IfxEth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:79
IfxEth_setTransmitBuffer1RingMode
IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer1 of the receive descriptor along with its size.
Definition: IfxEth.h:1620
IfxEth_Config::rmiiPins
IFX_CONST IfxEth_RmiiPins * rmiiPins
Pointer to port pins configuration of RMII mode.
Definition: IfxEth.h:424
IfxEth_setReceiveBuffer1RingMode
IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer1 of the receive descriptor along with its size.
Definition: IfxEth.h:1579
IfxEth::rxCount
uint32 rxCount
Number of frames received.
Definition: IfxEth.h:444
IfxEth_freeReceiveBuffer
void IfxEth_freeReceiveBuffer(IfxEth *eth)
Free the receive buffer, enabling it for the further reception.
Definition: IfxEth.c:67
IfxEth_wakeupTransmitter
void IfxEth_wakeupTransmitter(IfxEth *eth)
Wakeup the transmitter functions.
Definition: IfxEth.c:894
IfxEth_RmiiPins
Port pins for RMII mode configuration.
Definition: IfxEth.h:383
IfxEth_RingModeRxBuffersConfig::rxBuffer2Size
uint16 rxBuffer2Size
Size of Rx Buffer 2.
Definition: IfxEth.h:311
IfxEth_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider.
Definition: IfxEth.h:427
IfxEth_AltTxDescr0_Bits::FS
uint32 FS
First Segment.
Definition: IfxEth.h:219
IfxEth::config
IfxEth_Config config
Copy of the configuration passed through IfxEth_init()
Definition: IfxEth.h:452
IfxEth_initTransmitDescriptorsRingMode
void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors.
Definition: IfxEth.c:438
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxEth_isRxDataAvailable
IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth)
Checks whether one or more RX data is available.
Definition: IfxEth.h:1500
IfxEth_RingModeTxBuffersConfig::txBuffer2StartAddress
uint32 txBuffer2StartAddress
Start address of Tx Buffer 2.
Definition: IfxEth.h:320
IfxEth_Crs_In
CRS pin mapping structure.
Definition: IfxEth_PinMap.h:39
IfxEth_initReceiveDescriptors
void IfxEth_initReceiveDescriptors(IfxEth *eth)
Initialises the receive descriptors.
Definition: IfxEth.c:284
IfxEth_RingModeBufferUsed_buffer2
Buffer 2 used.
Definition: IfxEth.h:128
IfxEth_stopTransmitter
void IfxEth_stopTransmitter(IfxEth *eth)
Stop the transmitter functions.
Definition: IfxEth.c:867
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxEth_TxDescrList
Definition: IfxEth.h:406
IfxEth_Config::phyInterfaceMode
IfxEth_PhyInterfaceMode phyInterfaceMode
Phy Interface mode.
Definition: IfxEth.h:423
IfxEth_RmiiPins::crsDiv
IfxEth_Crsdv_In * crsDiv
pointer to CRSDIV input pin config
Definition: IfxEth.h:385
IfxEth_RxDescr::RDES2
IfxEth_RxDescr2 RDES2
RX descriptor DWORD 2.
Definition: IfxEth.h:331
IfxEth_shuffleRxDescriptor
void IfxEth_shuffleRxDescriptor(IfxEth *eth)
Shuffle to next RX descriptor.
Definition: IfxEth.c:802


iLLD_TC26B: IfxEth.h Source File

  • Eth
  • Std
IfxEth.h
Go to the documentation of this file.
1 /**
2 * \file IfxEth.h
3 * \brief ETH basic functionality
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Eth_Std_DataStructures Data Structures
25 * \ingroup IfxLld_Eth_Std
26 * \defgroup IfxLld_Eth_Std_Unions Unions
27 * \ingroup IfxLld_Eth_Std
28 * \defgroup IfxLld_Eth_Std_Configuration Configuration Functions
29 * \ingroup IfxLld_Eth_Std
30 * \defgroup IfxLld_Eth_Std_Utility Utility Functions
31 * \ingroup IfxLld_Eth_Std
32 * \defgroup IfxLld_Eth_Std_Initialisation Initialisation Functions
33 * \ingroup IfxLld_Eth_Std
34 * \defgroup IfxLld_Eth_Std_Enum Enumerations
35 * \ingroup IfxLld_Eth_Std
36 */
37
38 #ifndef IFXET_H
39 #define IFXET_H 1
40
41 /******************************************************************************/
42 /*----------------------------------Includes----------------------------------*/
43 /******************************************************************************/
44
45 #include "_Impl/IfxEth_cfg.h"
46 #include "Cpu/Std/Ifx_Types.h"
47 #include "IfxEth_reg.h"
48 #include "IfxEth_bf.h"
49 #include "_PinMap/IfxEth_PinMap.h"
50 #include "Src/Std/IfxSrc.h"
51 #include "Scu/Std/IfxScuWdt.h"
52 #include "_Utilities/Ifx_Assert.h"
53 #include "Cpu/Std/IfxCpu.h"
54
55 /******************************************************************************/
56 /*-----------------------------------Macros-----------------------------------*/
57 /******************************************************************************/
58
59 /** \brief Size of one ethernet frame buffer
60 */
61 #ifndef IFXETH_RTX_BUFFER_SIZE
62 #define IFXETH_RTX_BUFFER_SIZE 1536
63 #endif
64
65 /** \brief Rx buffers (ring mode)
66 */
67 #ifndef IFXETH_MAX_RX_BUFFERS
68 #define IFXETH_MAX_RX_BUFFERS 8
69 #endif
70
71 /** \brief Tx buffers (ring mode)
72 */
73 #ifndef IFXETH_MAX_TX_BUFFERS
74 #define IFXETH_MAX_TX_BUFFERS 16
75 #endif
76
77 /** \brief 4 DWORDS (16 bytes)
78 */
79 #define IFXETH_DESCR_SIZE 4
80
81 /******************************************************************************/
82 /*--------------------------------Enumerations--------------------------------*/
83 /******************************************************************************/
84
85 /** \addtogroup IfxLld_Eth_Std_Enum
86 * \{ */
87 typedef enum
88 {
89 IfxEth_ChecksumMode_bypass = 0,
90 IfxEth_ChecksumMode_ipv4 = 1,
91 IfxEth_ChecksumMode_tcpUdpIcmpSegment = 2,
92 IfxEth_ChecksumMode_tcpUdpIcmpFull = 3
93 } IfxEth_ChecksumMode;
94
95 typedef enum
96 {
97 IfxEth_DescriptorMode_chain, /**< \brief chain mode descriptors */
98 IfxEth_DescriptorMode_ring /**< \brief ring mode descriptors */
99 } IfxEth_DescriptorMode;
100
101 /** \brief External Phy Interface RMII Mode
102 */
103 typedef enum
104 {
105 IfxEth_PhyInterfaceMode_mii, /**< \brief MII mode */
106 IfxEth_PhyInterfaceMode_rmii /**< \brief RMII mode */
107 } IfxEth_PhyInterfaceMode;
108
109 /** \brief indicates the Receive DMA FSM state
110 */
111 typedef enum
112 {
113 IfxEth_ReceiveProcessState_reset, /**< \brief Stopped: Reset or Stop Receive Command issued */
114 IfxEth_ReceiveProcessState_fetching, /**< \brief Running: Fetching Receive Transfer Descriptor */
115 IfxEth_ReceiveProcessState_none, /**< \brief Reserved for future use */
116 IfxEth_ReceiveProcessState_waiting, /**< \brief Running: Waiting for receive packet */
117 IfxEth_ReceiveProcessState_suspended, /**< \brief Suspended: Receive Descriptor Unavailable */
118 IfxEth_ReceiveProcessState_closing, /**< \brief Running: Closing Receive Descriptor */
119 IfxEth_ReceiveProcessState_timestampWrite, /**< \brief TIME_STAMP write state */
120 IfxEth_ReceiveProcessState_transfering /**< \brief Running: Transferring the receive packet data from receive buffer to host memory */
121 } IfxEth_ReceiveProcessState;
122
123 /** \brief Buffer(s) used in ring mode
124 */
125 typedef enum
126 {
127 IfxEth_RingModeBufferUsed_buffer1, /**< \brief Buffer 1 used */
128 IfxEth_RingModeBufferUsed_buffer2, /**< \brief Buffer 2 used */
129 IfxEth_RingModeBufferUsed_bothBuffers /**< \brief BOth Buffers used */
130 } IfxEth_RingModeBufferUsed;
131
132 /** \brief indicates the Transmit DMA FSM state
133 */
134 typedef enum
135 {
136 IfxEth_TransmitProcessState_reset, /**< \brief Stopped; Reset or Stop Transmit Command issued */
137 IfxEth_TransmitProcessState_fetching, /**< \brief Running; Fetching Transmit Transfer Descriptor */
138 IfxEth_TransmitProcessState_waiting, /**< \brief Running; Waiting for status */
139 IfxEth_TransmitProcessState_reading, /**< \brief Running; Reading Data from host memory buffer and queuing it to transmit buffer (Tx FIFO) */
140 IfxEth_TransmitProcessState_timestampWrite, /**< \brief TIME_STAMP write state */
141 IfxEth_TransmitProcessState_none, /**< \brief Reserved for future use */
142 IfxEth_TransmitProcessState_suspended, /**< \brief Suspended; Transmit Descriptor Unavailable or Transmit Buffer Underflow */
143 IfxEth_TransmitProcessState_closing /**< \brief Running; Closing Transmit Descriptor */
144 } IfxEth_TransmitProcessState;
145
146 /** \} */
147
148 /******************************************************************************/
149 /*-----------------------------Data Structures--------------------------------*/
150 /******************************************************************************/
151
152 /** \addtogroup IfxLld_Eth_Std_DataStructures
153 * \{ */
154 /** \brief Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access
155 */
156 typedef struct
157 {
158 uint32 ext : 1; /**< \brief Extended Status Available/Rx MAC Address */
159 uint32 CE : 1; /**< \brief CRC Error */
160 uint32 DBE : 1; /**< \brief Dribble Bit Error */
161 uint32 RE : 1; /**< \brief Receive Error */
162 uint32 RWT : 1; /**< \brief Receive Watchdog Timeout */
163 uint32 FT : 1; /**< \brief Frame Type */
164 uint32 LC : 1; /**< \brief Late Collision */
165 uint32 IPC : 1; /**< \brief IPC Checksum Error/Giant Frame */
166 uint32 LS : 1; /**< \brief Last Descriptor */
167 uint32 FS : 1; /**< \brief First Descriptor */
168 uint32 VLAN : 1; /**< \brief VLAN Tag */
169 uint32 OE : 1; /**< \brief Overflow Error */
170 uint32 LE : 1; /**< \brief Length Error */
171 uint32 SAF : 1; /**< \brief Source Address Filter Fail */
172 uint32 DE : 1; /**< \brief Descriptor Error */
173 uint32 ES : 1; /**< \brief Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE */
174 uint32 FL : 14; /**< \brief Frame Length */
175 uint32 AFM : 1; /**< \brief Destination Address Filter Fail */
176 uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
177 } IfxEth_AltRxDescr0_Bits;
178
179 /** \brief Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access
180 */
181 typedef struct
182 {
183 uint32 RBS1 : 13; /**< \brief Receive Buffer 1 Size */
184 uint32 resv1 : 1; /**< \brief reserved */
185 uint32 RCH : 1; /**< \brief Second Address Chained */
186 uint32 RER : 1; /**< \brief Receive End of Ring */
187 uint32 RBS2 : 13; /**< \brief Receive Buffer 2 Size */
188 uint32 resv : 2; /**< \brief reserved) */
189 uint32 DIC : 1; /**< \brief Disable Interrupt on Completion */
190 } IfxEth_AltRxDescr1_Bits;
191
192 /** \brief Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access
193 */
194 typedef struct
195 {
196 uint32 DB : 1; /**< \brief Deferred bit */
197 uint32 UF : 1; /**< \brief Underflow error */
198 uint32 ED : 1; /**< \brief Excessive deferral */
199 uint32 CC : 4; /**< \brief Collision count */
200 uint32 VLAN : 1; /**< \brief VLAN TAG */
201 uint32 EC : 1; /**< \brief Excessive Collision */
202 uint32 LC : 1; /**< \brief Late Collision */
203 uint32 NC : 1; /**< \brief No Carrier */
204 uint32 LOC : 1; /**< \brief Loss of Carrier */
205 uint32 PCE : 1; /**< \brief Payload Checksum Error */
206 uint32 FF : 1; /**< \brief Frame Flushed */
207 uint32 JT : 1; /**< \brief Jabber Timeout */
208 uint32 ES : 1; /**< \brief Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF */
209 uint32 IHE : 1; /**< \brief IP Header Error */
210 uint32 TTSS : 1; /**< \brief Transmit Time Stamp Status */
211 uint32 resv : 2; /**< \brief (reserved) */
212 uint32 TCH : 1; /**< \brief Second Address Chained */
213 uint32 TER : 1; /**< \brief Transmit End of Ring */
214 uint32 CIC : 2; /**< \brief Checksum Insertion Control */
215 uint32 resv1 : 1; /**< \brief (Reserved) */
216 uint32 TTSE : 1; /**< \brief Transmit Time Stamp Enable */
217 uint32 DP : 1; /**< \brief Disable Padding */
218 uint32 DC : 1; /**< \brief Disable CRC */
219 uint32 FS : 1; /**< \brief First Segment */
220 uint32 LS : 1; /**< \brief Last Segment */
221 uint32 IC : 1; /**< \brief Interrupt on Completion */
222 uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
223 } IfxEth_AltTxDescr0_Bits;
224
225 /** \brief Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access
226 */
227 typedef struct
228 {
229 uint32 TBS1 : 13; /**< \brief Transmit Buffer 1 Size */
230 uint32 resv1 : 3; /**< \brief (reserved) */
231 uint32 TBS2 : 13; /**< \brief Transmit Buffer 2 Size */
232 uint32 resv2 : 3; /**< \brief (reserved) */
233 } IfxEth_AltTxDescr1_Bits;
234
235 /** \} */
236
237 /** \addtogroup IfxLld_Eth_Std_Unions
238 * \{ */
239 /** \brief Union for RX descriptor DWORD 0
240 */
241 typedef union
242 {
243 IfxEth_AltRxDescr0_Bits A; /**< \brief Structure for RX descriptor DWORD 0 Bit field access */
244 uint32 U; /**< \brief Unsigned long access */
245 } IfxEth_RxDescr0;
246
247 /** \brief Union for RX descriptor DWORD 1
248 */
249 typedef union
250 {
251 IfxEth_AltRxDescr1_Bits A; /**< \brief Structure for RX descriptor DWORD 1 Bit field access */
252 uint32 U; /**< \brief unsigned long access */
253 } IfxEth_RxDescr1;
254
255 /** \brief Union for RX descriptor DWORD 2
256 */
257 typedef union
258 {
259 uint32 U; /**< \brief unsigned long access */
260 } IfxEth_RxDescr2;
261
262 /** \brief Union for RX descriptor DWORD 3
263 */
264 typedef union
265 {
266 uint32 U; /**< \brief unsigned long access */
267 } IfxEth_RxDescr3;
268
269 /** \brief Union for TX descriptor DWORD 0
270 */
271 typedef union
272 {
273 IfxEth_AltTxDescr0_Bits A; /**< \brief Structure for TX descriptor DWORD 0 Bit field access */
274 uint32 U; /**< \brief Unsigned long access */
275 } IfxEth_TxDescr0;
276
277 /** \brief Union for TX descriptor DWORD 1
278 */
279 typedef union
280 {
281 IfxEth_AltTxDescr1_Bits A; /**< \brief Structure for RX descriptor DWORD 1 Bit field access */
282 uint32 U; /**< \brief unsigned long access */
283 } IfxEth_TxDescr1;
284
285 /** \brief Union for TX descriptor DWORD 2
286 */
287 typedef union
288 {
289 uint32 U; /**< \brief unsigned long access */
290 } IfxEth_TxDescr2;
291
292 /** \brief Union for TX descriptor DWORD 3
293 */
294 typedef union
295 {
296 uint32 U; /**< \brief unsigned long access */
297 } IfxEth_TxDescr3;
298
299 /** \} */
300
301 /** \addtogroup IfxLld_Eth_Std_DataStructures
302 * \{ */
303 /** \brief Configuration structure for Ring Mode Receive Buffers
304 */
305 typedef struct
306 {
307 IfxEth_RingModeBufferUsed rxBufferUsed; /**< \brief Receive Buffer(s) used in ringmode */
308 uint32 rxBuffer1StartAddress; /**< \brief Start address of Rx Buffer 1 */
309 uint32 rxBuffer2StartAddress; /**< \brief Start address of Rx Buffer 2 */
310 uint16 rxBuffer1Size; /**< \brief Size of Rx Buffer 1 */
311 uint16 rxBuffer2Size; /**< \brief Size of Rx Buffer 2 */
312 } IfxEth_RingModeRxBuffersConfig;
313
314 /** \brief Configuration structure for Ring Mode Transmit buffers
315 */
316 typedef struct
317 {
318 IfxEth_RingModeBufferUsed txBufferUsed; /**< \brief Transmit Buffer(s) used in ringmode */
319 uint32 txBuffer1StartAddress; /**< \brief Start address of Tx Buffer 1 */
320 uint32 txBuffer2StartAddress; /**< \brief Start address of Tx Buffer 2 */
321 uint16 txBuffer1Size; /**< \brief Size of Tx Buffer 1 */
322 uint16 txBuffer2Size; /**< \brief Size of Tx Buffer 2 */
323 } IfxEth_RingModeTxBuffersConfig;
324
325 /** \brief Normal RX descriptor
326 */
327 typedef struct
328 {
329 IfxEth_RxDescr0 RDES0; /**< \brief RX descriptor DWORD 0 */
330 IfxEth_RxDescr1 RDES1; /**< \brief RX descriptor DWORD 1 */
331 IfxEth_RxDescr2 RDES2; /**< \brief RX descriptor DWORD 2 */
332 IfxEth_RxDescr3 RDES3; /**< \brief RX descriptor DWORD 3 */
333 } IfxEth_RxDescr;
334
335 /** \brief Normal TX descriptor
336 */
337 typedef struct
338 {
339 IfxEth_TxDescr0 TDES0; /**< \brief TX descriptor DWORD 0 */
340 IfxEth_TxDescr1 TDES1; /**< \brief TX descriptor DWORD 1 */
341 IfxEth_TxDescr2 TDES2; /**< \brief TX descriptor DWORD 2 */
342 IfxEth_TxDescr3 TDES3; /**< \brief TX descriptor DWORD 3 */
343 } IfxEth_TxDescr;
344
345 /** \} */
346
347 /** \addtogroup IfxLld_Eth_Std_DataStructures
348 * \{ */
349 /** \brief Port pins for MII mode configuration
350 */
351 typedef struct
352 {
353 IfxEth_Crs_In *crs; /**< \brief pointer to CRS input pin config */
354 IfxEth_Col_In *col; /**< \brief pointer to COL input pin config */
355 IfxEth_Txclk_In *txClk; /**< \brief Pointer to TXCLK input pin config */
356 IfxEth_Rxclk_In *rxClk; /**< \brief Pointer to RXCLK input pin config */
357 IfxEth_Rxdv_In *rxDv; /**< \brief Pointer to RXDV input pin config */
358 IfxEth_Rxer_In *rxEr; /**< \brief Pointer to RXER input pin config */
359 IfxEth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
360 IfxEth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
361 IfxEth_Rxd_In *rxd2; /**< \brief Pointer to RXD2 input pin config */
362 IfxEth_Rxd_In *rxd3; /**< \brief Pointer to RXD3 input pin config */
363 IfxEth_Txen_Out *txEn; /**< \brief Pointer to TXEN output pin config */
364 IfxEth_Txer_Out *txEr; /**< \brief Pointer to TXER output pin config */
365 IfxEth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
366 IfxEth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
367 IfxEth_Txd_Out *txd2; /**< \brief Pointer to TXD2 output pin config */
368 IfxEth_Txd_Out *txd3; /**< \brief Pointer to TXD3 output pin config */
369 IfxEth_Mdc_Out *mdc; /**< \brief Pointer to MDC pin config */
370 IfxEth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
371 } IfxEth_MiiPins;
372
373 /** \brief Configuration structure for Ring Mode descriptors
374 */
375 typedef struct
376 {
377 IfxEth_RingModeTxBuffersConfig txConfig; /**< \brief Transmit buffers ring mode config */
378 IfxEth_RingModeRxBuffersConfig rxConfig; /**< \brief Receive buffers ring mode config */
379 } IfxEth_RingModeBuffersConfig;
380
381 /** \brief Port pins for RMII mode configuration
382 */
383 typedef struct
384 {
385 IfxEth_Crsdv_In *crsDiv; /**< \brief pointer to CRSDIV input pin config */
386 IfxEth_Refclk_In *refClk; /**< \brief Pointer to REFCLK input pin config */
387 IfxEth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
388 IfxEth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
389 IfxEth_Mdc_Out *mdc; /**< \brief Pointer to MDC output pin config */
390 IfxEth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
391 IfxEth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
392 IfxEth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
393 IfxEth_Txen_Out *txEn; /**< \brief Pointer to TXEN output pin config */
394 } IfxEth_RmiiPins;
395
396 /** \} */
397
398 /** \addtogroup IfxLld_Eth_Std_Unions
399 * \{ */
400 typedef union
401 {
402 IfxEth_RxDescr items[IFXETH_MAX_RX_BUFFERS];
403 uint32 U[IFXETH_MAX_RX_BUFFERS][IFXETH_DESCR_SIZE];
404 } IfxEth_RxDescrList;
405
406 typedef union
407 {
408 IfxEth_TxDescr items[IFXETH_MAX_TX_BUFFERS];
409 uint32 U[IFXETH_MAX_TX_BUFFERS][IFXETH_DESCR_SIZE];
410 } IfxEth_TxDescrList;
411
412 /** \} */
413
414 /** \addtogroup IfxLld_Eth_Std_DataStructures
415 * \{ */
416 /** \brief ETH configuration structure
417 */
418 typedef struct
419 {
420 uint8 macAddress[6]; /**< \brief MAC address for the ethernet, should be unique in the network */
421 uint32 (*phyInit)(void); /**< \brief Pointer to the transceiver init function */
422 boolean (*phyLink)(void); /**< \brief Pointer to the transceiver link function */
423 IfxEth_PhyInterfaceMode phyInterfaceMode; /**< \brief Phy Interface mode */
424 IFX_CONST IfxEth_RmiiPins *rmiiPins; /**< \brief Pointer to port pins configuration of RMII mode */
425 IFX_CONST IfxEth_MiiPins *miiPins; /**< \brief Pointer to port pins configuration of MII mode */
426 Ifx_Priority isrPriority; /**< \brief Interrupt service priority */
427 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider */
428 Ifx_ETH *ethSfr; /**< \brief Pointer to register base */
429 IfxEth_RxDescrList *rxDescr; /**< \brief pointer to RX descriptor RAM */
430 IfxEth_TxDescrList *txDescr; /**< \brief pointer to TX descriptor RAM */
431 IfxEth_DescriptorMode descriptorMode; /**< \brief Descriptor mode (chain or ring) */
432 IfxEth_RingModeBuffersConfig ringModeBuffersConfig; /**< \brief Ring mode buffers condiguration */
433 } IfxEth_Config;
434
435 /** \} */
436
437 /** \addtogroup IfxLld_Eth_Std_DataStructures
438 * \{ */
439 /** \brief ETH driver structure
440 */
441 typedef struct
442 {
443 Ifx_ETH_STATUS status; /**< \brief Intermediate variable to use register content in control structure */
444 uint32 rxCount; /**< \brief Number of frames received */
445 uint32 txCount; /**< \brief Number of frames transmitted */
446 uint32 error; /**< \brief Indicate an error has occurred during execution */
447 sint32 isrRxCount; /**< \brief Count of RX ISR */
448 sint32 isrTxCount; /**< \brief Count of TX ISR */
449 sint32 txDiff; /**< \brief Difference between isrTxCount and txCount */
450 sint32 rxDiff; /**< \brief Difference between isrRxCount and rxCount */
451 sint32 isrCount; /**< \brief count of all ISR */
452 IfxEth_Config config; /**< \brief Copy of the configuration passed through IfxEth_init() */
453 IfxEth_RxDescrList *rxDescr; /**< \brief pointer to RX descriptor RAM */
454 IfxEth_TxDescrList *txDescr; /**< \brief pointer to TX descriptor RAM */
455 IfxEth_RxDescr *pRxDescr;
456 IfxEth_TxDescr *pTxDescr;
457 Ifx_ETH *ethSfr; /**< \brief Pointer to register base */
458 IfxEth_DescriptorMode descriptorMode; /**< \brief Descriptor mode (chain or ring) */
459 IfxEth_RingModeBufferUsed txBufferUsed; /**< \brief Transmit Buffer(s) used in ringmode */
460 IfxEth_RingModeBufferUsed rxBufferUsed; /**< \brief Receive Buffer(s) used in ringmode */
461 } IfxEth;
462
463 /** \brief Structure for RX descriptor DWORD 0 Bit field access
464 */
465 typedef struct
466 {
467 uint32 PCE : 1; /**< \brief Rx MAC Address/Payload Checksum Error */
468 uint32 CE : 1; /**< \brief CRC Error */
469 uint32 DBE : 1; /**< \brief Dribble Bit Error */
470 uint32 RE : 1; /**< \brief Receive Error */
471 uint32 RWT : 1; /**< \brief Receive Watchdog Timeout */
472 uint32 FT : 1; /**< \brief Frame Type */
473 uint32 LC : 1; /**< \brief Late Collision */
474 uint32 IPC : 1; /**< \brief IPC Checksum Error/Giant Frame */
475 uint32 LS : 1; /**< \brief Last Descriptor */
476 uint32 FS : 1; /**< \brief First Descriptor */
477 uint32 VLAN : 1; /**< \brief VLAN Tag */
478 uint32 OE : 1; /**< \brief Overflow Error */
479 uint32 LE : 1; /**< \brief Length Error */
480 uint32 SAF : 1; /**< \brief Source Address Filter Fail */
481 uint32 DE : 1; /**< \brief Descriptor Error */
482 uint32 ES : 1; /**< \brief Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE */
483 uint32 FL : 14; /**< \brief Frame Length */
484 uint32 AFM : 1; /**< \brief Destination Address Filter Fail */
485 uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
486 } IfxEth_RxDescr0_Bits;
487
488 /** \brief Structure for RX descriptor DWORD 1 Bit field access
489 */
490 typedef struct
491 {
492 uint32 RBS1 : 11; /**< \brief Receive Buffer 1 Size */
493 uint32 RBS2 : 11; /**< \brief Receive Buffer 2 Size */
494 uint32 resv : 2; /**< \brief (reserved) */
495 uint32 RCH : 1; /**< \brief Second Address Chained */
496 uint32 RER : 1; /**< \brief Receive End of Ring */
497 uint32 resv2 : 5; /**< \brief (reserved) */
498 uint32 DIC : 1; /**< \brief Disable Interrupt on Completion */
499 } IfxEth_RxDescr1_Bits;
500
501 /** \brief Structure for TX descriptor DWORD 0 Bit field access
502 */
503 typedef struct
504 {
505 uint32 DB : 1; /**< \brief Deferred Bit */
506 uint32 UF : 1; /**< \brief Underflow Error */
507 uint32 ED : 1; /**< \brief Excessive Deferral */
508 uint32 CC : 4; /**< \brief Collision Count */
509 uint32 VLAN : 1; /**< \brief VLAN Tag */
510 uint32 EC : 1; /**< \brief Excessive Collision */
511 uint32 LC : 1; /**< \brief Late Collision */
512 uint32 NC : 1; /**< \brief No Carrier */
513 uint32 LOC : 1; /**< \brief Loss of Carrier */
514 uint32 PCE : 1; /**< \brief Payload Checksum Error */
515 uint32 FF : 1; /**< \brief Frame Flushed */
516 uint32 JT : 1; /**< \brief Jabber Timeout */
517 uint32 ES : 1; /**< \brief Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF */
518 uint32 IHE : 1; /**< \brief IP Header Error */
519 uint32 TTSS : 1; /**< \brief Tx Time Stamp Status */
520 uint32 resv : 13; /**< \brief (reserved) */
521 uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
522 } IfxEth_TxDescr0_Bits;
523
524 /** \brief Structure for TX descriptor DWORD 1 Bit field access
525 */
526 typedef struct
527 {
528 uint32 TBS1 : 11; /**< \brief Transmit Buffer 1 Size */
529 uint32 TBS2 : 11; /**< \brief Transmit Buffer 2 Size */
530 uint32 TTSE : 1; /**< \brief Transmit Time Stamp Enable */
531 uint32 DP : 1; /**< \brief Disable Padding */
532 uint32 TCH : 1; /**< \brief Second Address Chained */
533 uint32 TER : 1; /**< \brief Transmit End of Ring */
534 uint32 DC : 1; /**< \brief Disable CRC */
535 uint32 CIC : 2; /**< \brief Checksum Insertion Control */
536 uint32 FS : 1; /**< \brief First Segment */
537 uint32 LS : 1; /**< \brief Last Segment */
538 uint32 IC : 1; /**< \brief Interrupt on Completion */
539 } IfxEth_TxDescr1_Bits;
540
541 /** \} */
542
543 /** \addtogroup IfxLld_Eth_Std_Configuration
544 * \{ */
545
546 /******************************************************************************/
547 /*-------------------------Inline Function Prototypes-------------------------*/
548 /******************************************************************************/
549
550 /** \brief Set buffer of an RX descriptor
551 * \param descr descr Pointer to an RX descriptor
552 * \param buffer pointer to buffer
553 * \return None
554 */
555 IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer);
556
557 /** \brief Get pointer to next TX descriptor
558 * \param descr descr Pointer to a TX descriptor
559 * \return next Tx descriptor
560 */
561 IFX_INLINE IfxEth_TxDescr *IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr);
562
563 /** \brief Return TRUE if a TX descriptor is available for setup
564 * \param descr pointer to descriptor
565 */
566 IFX_INLINE boolean IfxEth_TxDescr_isAvailable(IfxEth_TxDescr *descr);
567
568 /** \brief Set buffer of a TX descriptor
569 * \param descr Entdescr Pointer to a TX descriptorer_String_here
570 * \param buffer pointer to Buffer
571 * \return None
572 */
573 IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer);
574
575 /** \brief Applies the Software Reset
576 * \param eth ETH driver structure
577 * \return None
578 */
579 IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth);
580
581 /** \brief Clear Early Receive Interrupt request
582 * \param eth ETH driver structure
583 * \return None
584 */
585 IFX_INLINE void IfxEth_clearEriInterrupt(IfxEth *eth);
586
587 /** \brief Clear receive interrupt request
588 * \param eth ETH driver structure
589 * \return None
590 */
591 IFX_INLINE void IfxEth_clearRxInterrupt(IfxEth *eth);
592
593 /** \brief Clear Transmit Buffer Unavailable request
594 * \param eth ETH driver structure
595 * \return None
596 */
597 IFX_INLINE void IfxEth_clearTuInterrupt(IfxEth *eth);
598
599 /** \brief Clear transmit interrupt request
600 * \param eth ETH driver structure
601 * \return None
602 */
603 IFX_INLINE void IfxEth_clearTxInterrupt(IfxEth *eth);
604
605 /** \brief Disables Timestamp Fine or Coarse Update
606 * \param eth ETH driver structure
607 * \return None
608 */
609 IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate(IfxEth *eth);
610
611 /** \brief Disables Processing of PTP frames sent over IPV4 UDP
612 * \param eth ETH driver structure
613 * \return None
614 */
615 IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames(IfxEth *eth);
616
617 /** \brief Enables theMMC counter
618 * \param eth ETH driver structure
619 * \return None
620 */
621 IFX_INLINE void IfxEth_enableMmcCounter(IfxEth *eth);
622
623 /** \brief Enables the TimeStamp
624 * \param eth ETH driver structure
625 * \return None
626 */
627 IFX_INLINE void IfxEth_enableTimeStamp(IfxEth *eth);
628
629 /** \brief Enables Timestamp Fine or Coarse Update
630 * \param eth ETH driver structure
631 * \return None
632 */
633 IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate(IfxEth *eth);
634
635 /** \brief Enables the TimeStamp for All frames
636 * \param eth ETH driver structure
637 * \return None
638 */
639 IFX_INLINE void IfxEth_enableTimeStampForAllFrames(IfxEth *eth);
640
641 /** \brief Enables Processing of PTP over Ethernet Frames
642 * \param eth ETH driver structure
643 * \return None
644 */
645 IFX_INLINE void IfxEth_enableTimeStampForEthFrames(IfxEth *eth);
646
647 /** \brief Enables Processing of PTP frames sent over IPV4 UDP
648 * \param eth ETH driver structure
649 * \return None
650 */
651 IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames(IfxEth *eth);
652
653 /** \brief Enables PTP packet Processing for Version 2 Format
654 * \param eth ETH driver structure
655 * \return None
656 */
657 IFX_INLINE void IfxEth_enableTimeStampForVer2Format(IfxEth *eth);
658
659 /** \brief returns the status of the TimeStamp Initialisation
660 * \param eth ETH driver structure
661 * \return Status, TRUE: initialising, FLASE: initialised
662 */
663 IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus(IfxEth *eth);
664
665 /** \brief returns the status of the System Time updation
666 * \param eth ETH driver structure
667 * \return Status, TRUE: initialising, FLASE: initialised
668 */
669 IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus(IfxEth *eth);
670
671 /** \brief Initialises the TimeStamp
672 * \param eth ETH driver structure
673 * \return None
674 */
675 IFX_INLINE void IfxEth_initialiseTimeStamp(IfxEth *eth);
676
677 /** \brief Returns the status of Software Reset
678 * \param eth ETH driver structure
679 * \return Status
680 */
681 IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth);
682
683 /** \brief Sets addition, the time value is added with the contents of the update register
684 * \param eth ETH driver structure
685 * \return None
686 */
687 IFX_INLINE void IfxEth_setAddToTimeUpdate(IfxEth *eth);
688
689 /** \brief Enable/Disables Timestamp Digital or Binary Rollover Control
690 * \param eth ETH driver structure
691 * \param enabled Enable = 1 / Disable = 0
692 * \return None
693 */
694 IFX_INLINE void IfxEth_setBinaryRolloverControl(IfxEth *eth, boolean enabled);
695
696 /** \brief Sets the loopback mode
697 * \param eth ETH driver structure
698 * \param loopbackMode loopback mode enable/disbale
699 * \return None
700 */
701 IFX_INLINE void IfxEth_setLoopbackMode(IfxEth *eth, boolean loopbackMode);
702
703 /** \brief Sets the time in sub seconds representation, to be initialized or added to the system time
704 * \param eth ETH driver structure
705 * \param value Sub Second Increment Value
706 * \return None
707 */
708 IFX_INLINE void IfxEth_setNanoSecondsUpdateValue(IfxEth *eth, uint8 value);
709
710 /** \brief Sets the Phy Interface mode
711 * \param eth ETH driver structure
712 * \param mode Phy interface mode
713 * \return None
714 */
715 IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode);
716
717 /** \brief Sets receive descriptor address
718 * \param eth pointer to the ethernet module
719 * \param address Address
720 * \return None
721 */
722 IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address);
723
724 /** \brief Sets the time in seconds to be initialized or added to the system time
725 * \param eth ETH driver structure
726 * \param value Sub Second Increment Value
727 * \return None
728 */
729 IFX_INLINE void IfxEth_setSecondsUpdateValue(IfxEth *eth, uint8 value);
730
731 /** \brief Sets the Sub Second Increment Value
732 * \param eth ETH driver structure
733 * \param value Sub Second Increment Value
734 * \return None
735 */
736 IFX_INLINE void IfxEth_setSubSecondIncrementValue(IfxEth *eth, uint8 value);
737
738 /** \brief Sets subtraction, the time value is subtracted with the contents of the update register
739 * \param eth ETH driver structure
740 * \return None
741 */
742 IFX_INLINE void IfxEth_setSubtractToTimeUpdate(IfxEth *eth);
743
744 /** \brief Sets transmit descriptor address
745 * \param eth pointer to the ethernet module
746 * \param address Address
747 * \return None
748 */
749 IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address);
750
751 /** \brief Updates the System time with specified values in SECONDS and NANOSECONDS registers
752 * \param eth ETH driver structure
753 * \return None
754 */
755 IFX_INLINE void IfxEth_updateTimeStamp(IfxEth *eth);
756
757 /** \brief Waits for one TX buffer becomes available
758 * \param eth ETH driver structure
759 * retval non NULL_PTR TX buffer is available at the address pointed by the returned value
760 * retval NULL_PTR TX buffer is busy.
761 */
762 IFX_INLINE void *IfxEth_waitTransmitBuffer(IfxEth *eth);
763
764 /******************************************************************************/
765 /*-------------------------Global Function Prototypes-------------------------*/
766 /******************************************************************************/
767
768 /** \brief Free the receive buffer, enabling it for the further reception
769 * \param eth ETH driver structure
770 * \return None
771 */
772 IFX_EXTERN void IfxEth_freeReceiveBuffer(IfxEth *eth);
773
774 /** \brief Request to send the transmit buffer
775 *
776 * The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()
777 * \param eth ETH driver structure
778 * \param len Length of the data put in the transmit buffer (in bytes)
779 * \return None
780 */
781 IFX_EXTERN void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len);
782
783 /** \brief Request to send the transmit buffer
784 *
785 * The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()
786 * \param eth ETH driver structure
787 * \param buffer1Length Length of the data put in the transmit buffer 1 (in bytes)
788 * \param buffer2Length Length of the data put in the transmit buffer 2 (in bytes)
789 * \return None
790 */
791 IFX_EXTERN void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length);
792
793 /** \brief Sets the MAC address
794 * \param eth ETH driver structure
795 * \param macAddress MAC address
796 * \return None
797 */
798 IFX_EXTERN void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress);
799
800 /** \brief Start the receiver functions
801 * \param eth ETH driver structure
802 * \return None
803 */
804 IFX_EXTERN void IfxEth_startReceiver(IfxEth *eth);
805
806 /** \brief Stops the receiver functions
807 * \param eth ETH driver structure
808 * \return None
809 */
810 IFX_EXTERN void IfxEth_stopReceiver(IfxEth *eth);
811
812 /** \brief writes the header format into buffrer
813 * \param eth ETH driver structure
814 * \param txBuffer pointer to tx buffer
815 * \param destinationAddress pointer to destination address
816 * \param sourceAddress pointer to source address
817 * \param packetSize size of the packet
818 * \return None
819 */
820 IFX_EXTERN void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize);
821
822 /** \} */
823
824 /** \addtogroup IfxLld_Eth_Std_Utility
825 * \{ */
826
827 /******************************************************************************/
828 /*-------------------------Inline Function Prototypes-------------------------*/
829 /******************************************************************************/
830
831 /** \brief Get pointer to next RX descriptor
832 * \param descr descr Pointer to an RX descriptor
833 * \return next RX descriptor
834 */
835 IFX_INLINE IfxEth_RxDescr *IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr);
836
837 /** \brief release RX descriptor
838 * \param descr pointer to Rx descriptor
839 * \return None
840 */
841 IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr);
842
843 /** \brief Release a TX descriptor for transmit queue
844 * \param descr Enter_String_herdescr Pointer to a TX descriptore
845 * \return None
846 */
847 IFX_INLINE void IfxEth_TxDescr_release(IfxEth_TxDescr *descr);
848
849 /** \brief resets Ethernet Configuration register
850 * \return None
851 */
852 IFX_INLINE void IfxEth_clearMacConfiguration(void);
853
854 /** \brief Get pointer to actual RX descriptor
855 * \param eth eth ETH driver structure
856 */
857 IFX_INLINE IfxEth_RxDescr *IfxEth_getActualRxDescriptor(IfxEth *eth);
858
859 /**
860 */
861 IFX_INLINE uint32 IfxEth_getActualRxIndex(IfxEth *eth);
862
863 /** \brief Get pointer to actual TX descriptor
864 * \param eth eth ETH driver structure
865 */
866 IFX_INLINE IfxEth_TxDescr *IfxEth_getActualTxDescriptor(IfxEth *eth);
867
868 /** \brief Get pointer to base RX descriptor
869 * \param eth eth ETH driver structure
870 */
871 IFX_INLINE IfxEth_RxDescr *IfxEth_getBaseRxDescriptor(IfxEth *eth);
872
873 /** \brief Get pointer to base TX descriptor
874 * \param eth eth ETH driver structure
875 */
876 IFX_INLINE IfxEth_TxDescr *IfxEth_getBaseTxDescriptor(IfxEth *eth);
877
878 /** \brief returns the status of th eloopback mode
879 * \param eth ETH driver structure
880 * \return Loop back mode status (TRUE / FALSE)
881 */
882 IFX_INLINE boolean IfxEth_getLoopbackMode(IfxEth *eth);
883
884 /** \brief Returns pointer to the MAC address configured for this ETH
885 * \param eth ETH driver structure
886 */
887 IFX_INLINE void *IfxEth_getMacAddressPointer(IfxEth *eth);
888
889 /** \brief returns the Receive Process State
890 * \param eth ETH driver structure
891 * \return Receive Process State
892 */
893 IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState(IfxEth *eth);
894
895 /** \brief Returns length of the oldest available RX data
896 * \param eth ETH driver structure
897 * \return Data length
898 */
899 IFX_INLINE uint16 IfxEth_getRxDataLength(IfxEth *eth);
900
901 /** \brief Returns the SRC pointer of Eth
902 * \param eth ETH driver structure
903 * \return pointer to ETH SRCR register
904 */
905 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEth_getSrcPointer(IfxEth *eth);
906
907 /** \brief returns the Transmit Process State
908 * \param eth ETH driver structure
909 * \return Transmit Process State
910 */
911 IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState(IfxEth *eth);
912
913 /** \brief Checks whether Early Receive interrupt is requested
914 * \param eth ETH driver structure
915 * \return TRUE/FALSE
916 */
917 IFX_INLINE boolean IfxEth_isEriInterrupt(IfxEth *eth);
918
919 /** \brief Checks whether physical connection is active
920 * \param eth ETH driver structure
921 * \return retval zero Connection is inactive
922 * retval non zero Connection is active
923 */
924 IFX_INLINE boolean IfxEth_isLinkActive(IfxEth *eth);
925
926 /** \brief Checks whether NIS interrupt is requested
927 * \param eth ETH driver structure
928 * \return TRUE/FALSE
929 */
930 IFX_INLINE boolean IfxEth_isNisInterrupt(IfxEth *eth);
931
932 /**
933 * \param eth pointer to ETH driver structure
934 */
935 IFX_INLINE boolean IfxEth_isRxChecksumError(IfxEth *eth);
936
937 /** \brief Checks whether one or more RX data is available
938 * \param eth ETH driver structure
939 * \return retval TRUE one or more RX data is available
940 * retval FALSE no RX data is available
941 */
942 IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth);
943
944 /** \brief Checks whether receive interrupt is requested
945 * \param eth ETH driver structure
946 * \return TRUE/FALSE
947 */
948 IFX_INLINE boolean IfxEth_isRxInterrupt(IfxEth *eth);
949
950 /** \brief Checks whether Transmit Buffer Unavailable interrupt is requested
951 * \param eth ETH driver structure
952 * \return TRUE/FALSE
953 */
954 IFX_INLINE boolean IfxEth_isTuInterrupt(IfxEth *eth);
955
956 /** \brief Checks whether transmit interrupt is requested
957 * \param eth ETH driver structure
958 * \return TRUE/FALSE
959 */
960 IFX_INLINE boolean IfxEth_isTxInterrupt(IfxEth *eth);
961
962 /** \brief reads the status of all flags
963 * \param eth ETH driver structure
964 * \return None
965 */
966 IFX_INLINE void IfxEth_readAllFlags(IfxEth *eth);
967
968 /******************************************************************************/
969 /*-------------------------Global Function Prototypes-------------------------*/
970 /******************************************************************************/
971
972 /** \brief Disable ETH Module
973 * \return None
974 */
975 IFX_EXTERN void IfxEth_disableModule(void);
976
977 /** \brief Enable ETH Module
978 * \return None
979 */
980 IFX_EXTERN void IfxEth_enableModule(void);
981
982 /** \brief Gets receive buffer\n
983 * note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed
984 * \param eth ETH driver structure
985 * \return retval NULL_PTR no received frame
986 * retval !NULL_PTR a frame has been received
987 */
988 IFX_EXTERN void *IfxEth_getReceiveBuffer(IfxEth *eth);
989
990 /** \brief Get a free transmit buffer
991 * \param eth ETH driver structure
992 * \return retval NULL_PTR no free transmit buffer is available
993 * retval !NULL_PTR a free transmit buffer is available
994 */
995 IFX_EXTERN void *IfxEth_getTransmitBuffer(IfxEth *eth);
996
997 /** \brief Reads the MAC address from module register
998 * \param eth ETH driver structure
999 * \param macAddress MAC address
1000 * \return None
1001 */
1002 IFX_EXTERN void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress);
1003
1004 /** \brief resets Ethernet kernel
1005 * \return None
1006 */
1007 IFX_EXTERN void IfxEth_resetModule(void);
1008
1009 /**
1010 * \param eth pointer to ETH driver structure
1011 * \param len length of buffer
1012 * \return None
1013 */
1014 IFX_EXTERN void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len);
1015
1016 /** \brief Set up checksum Engine
1017 * \param eth eth ETH driver structure
1018 * \param mode specifies checksum mode
1019 * \return None
1020 */
1021 IFX_EXTERN void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode);
1022
1023 /** \brief Shuffle to next RX descriptor
1024 * \param eth eth ETH driver structure
1025 * \return None
1026 */
1027 IFX_EXTERN void IfxEth_shuffleRxDescriptor(IfxEth *eth);
1028
1029 /** \brief Shuffle to next TX descriptor
1030 * \param eth eth ETH driver structure
1031 * \return None
1032 */
1033 IFX_EXTERN void IfxEth_shuffleTxDescriptor(IfxEth *eth);
1034
1035 /** \brief Start the transmitter functions
1036 * \param eth eth ETH driver structure
1037 * \return None
1038 */
1039 IFX_EXTERN void IfxEth_startTransmitter(IfxEth *eth);
1040
1041 /** \brief Stop the transmitter functions
1042 * \param eth eth ETH driver structure
1043 * \return None
1044 */
1045 IFX_EXTERN void IfxEth_stopTransmitter(IfxEth *eth);
1046
1047 /** \brief Wakeup the receiver functions
1048 * \param eth eth ETH driver structure
1049 * \return None
1050 */
1051 IFX_EXTERN void IfxEth_wakeupReceiver(IfxEth *eth);
1052
1053 /** \brief Wakeup the transmitter functions
1054 * \param eth eth ETH driver structure
1055 * \return None
1056 */
1057 IFX_EXTERN void IfxEth_wakeupTransmitter(IfxEth *eth);
1058
1059 /** \} */
1060
1061 /** \addtogroup IfxLld_Eth_Std_Initialisation
1062 * \{ */
1063
1064 /******************************************************************************/
1065 /*-------------------------Inline Function Prototypes-------------------------*/
1066 /******************************************************************************/
1067
1068 /** \brief Setup some properties of a TX descriptor
1069 * \param descr Enter_Sdescr Pointer to a TX descriptortring_here
1070 * \param length specifies length of transmit descriptor
1071 * \param firstSegment specifies first segment of frame
1072 * \param lastSegment specifies last segment of frame
1073 * \return None
1074 */
1075 IFX_INLINE void IfxEth_TxDescr_setup(IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment);
1076
1077 /** \brief Sets the receive buffer1 of the receive descriptor along with its size
1078 * \param eth ETH driver structure
1079 * \param descr Pointer to Rx descreptor
1080 * \param address Buffer 1 start address
1081 * \param size Buffer 1 size
1082 * \return None
1083 */
1084 IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size);
1085
1086 /** \brief Sets the receive buffer2 of the receive descriptor along with its size
1087 * \param eth ETH driver structure
1088 * \param descr Pointer to Rx descreptor
1089 * \param address Buffer 1 start address
1090 * \param size Buffer 1 size
1091 * \return None
1092 */
1093 IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size);
1094
1095 /** \brief Sets the transmit buffer1 of the receive descriptor along with its size
1096 * \param eth ETH driver structure
1097 * \param descr Pointer to Tx descreptor
1098 * \param address Buffer 1 start address
1099 * \param size Buffer 1 size
1100 * \return None
1101 */
1102 IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size);
1103
1104 /** \brief Sets the transmit buffer2 of the receive descriptor along with its size
1105 * \param eth ETH driver structure
1106 * \param descr Pointer to Tx descreptor
1107 * \param address Buffer 1 start address
1108 * \param size Buffer 1 size
1109 * \return None
1110 */
1111 IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size);
1112
1113 /******************************************************************************/
1114 /*-------------------------Global Function Prototypes-------------------------*/
1115 /******************************************************************************/
1116
1117 /** \brief Initialises the driver
1118 * \param eth ETH driver structure
1119 * \param config ETH configuration structure
1120 * \return None
1121 */
1122 IFX_EXTERN void IfxEth_init(IfxEth *eth, const IfxEth_Config *config);
1123
1124 /** \brief Initialises the configuration Structure
1125 * \param config ETH configuration structure
1126 * \param ethSfr Pointer to register base
1127 * \return None
1128 */
1129 IFX_EXTERN void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr);
1130
1131 /** \brief Initialises the receive descriptors
1132 * \param eth ETH driver structure
1133 * \return None
1134 */
1135 IFX_EXTERN void IfxEth_initReceiveDescriptors(IfxEth *eth);
1136
1137 /** \brief Initialises the receive descriptors
1138 * \param eth ETH driver structure
1139 * \param config Ring mode Rx buffers configuration
1140 * \return None
1141 */
1142 IFX_EXTERN void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config);
1143
1144 /** \brief Initialises transmit descriptors
1145 * \param eth pointer to ETH driver structure
1146 * \return None
1147 */
1148 IFX_EXTERN void IfxEth_initTransmitDescriptors(IfxEth *eth);
1149
1150 /** \brief Initialises transmit descriptors
1151 * \param eth pointer to ETH driver structure
1152 * \param config Ring mode Tx buffers configuration
1153 * \return None
1154 */
1155 IFX_EXTERN void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config);
1156
1157 /** \brief Set up MII mode input pins
1158 * \param eth eth pointer to ETH driver structure
1159 * \param miiPins pin of port to be set
1160 * \return None
1161 */
1162 IFX_EXTERN void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins);
1163
1164 /** \brief setup MII mode output pins
1165 * \param eth eth pointer to ETH driver structure
1166 * \param miiPins pin of port to be set
1167 * \return None
1168 */
1169 IFX_EXTERN void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins);
1170
1171 /** \brief Set up input pins
1172 * \param eth eth pointer to ETH driver structure
1173 * \param rmiiPins pin of port to be set
1174 * \return None
1175 */
1176 IFX_EXTERN void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins);
1177
1178 /** \brief set output pin of port
1179 * \param eth eth pointer to ETH driver structure
1180 * \param rmiiPins pin of port to be set
1181 * \return None
1182 */
1183 IFX_EXTERN void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins);
1184
1185 /** \} */
1186
1187 /******************************************************************************/
1188 /*-------------------Global Exported Variables/Constants----------------------*/
1189 /******************************************************************************/
1190
1191 /** \brief receive buffers
1192 */
1193 IFX_EXTERN uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
1194
1195 IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr;
1196
1197 /** \brief Transmit buffers
1198 */
1199 IFX_EXTERN uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
1200
1201 IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr;
1202
1203 /******************************************************************************/
1204 /*---------------------Inline Function Implementations------------------------*/
1205 /******************************************************************************/
1206
1207 IFX_INLINE IfxEth_RxDescr *IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr)
1208 {
1209 return (IfxEth_RxDescr *)(descr->RDES3.U);
1210 }
1211
1212
1213 IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr)
1214 {
1215 descr->RDES0.A.OWN = 1U;
1216 }
1217
1218
1219 IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer)
1220 {
1221 descr->RDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), buffer);
1222 }
1223
1224
1225 IFX_INLINE IfxEth_TxDescr *IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr)
1226 {
1227 return (IfxEth_TxDescr *)(descr->TDES3.U);
1228 }
1229
1230
1231 IFX_INLINE boolean IfxEth_TxDescr_isAvailable(IfxEth_TxDescr *descr)
1232 {
1233 return (descr->TDES0.A.OWN == 0) ? TRUE : FALSE;
1234 }
1235
1236
1237 IFX_INLINE void IfxEth_TxDescr_release(IfxEth_TxDescr *descr)
1238 {
1239 descr->TDES0.A.OWN = 1U;
1240 }
1241
1242
1243 IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer)
1244 {
1245 descr->TDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), buffer);
1246 }
1247
1248
1249 IFX_INLINE void IfxEth_TxDescr_setup(IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
1250 {
1251 IfxEth_TxDescr0 tdes0;
1252
1253 tdes0.U = descr->TDES0.U;
1254 tdes0.A.FS = firstSegment;
1255 tdes0.A.LS = lastSegment;
1256 descr->TDES0.U = tdes0.U;
1257 descr->TDES1.U = length;
1258 }
1259
1260
1261 IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth)
1262 {
1263 (void)eth;
1264 ETH_BUS_MODE.B.SWR = 1; /* reset module */
1265 }
1266
1267
1268 IFX_INLINE void IfxEth_clearEriInterrupt(IfxEth *eth)
1269 {
1270 (void)eth;
1271 MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_ERI_OFF));
1272 }
1273
1274
1275 IFX_INLINE void IfxEth_clearMacConfiguration(void)
1276 {
1277 MODULE_ETH.MAC_CONFIGURATION.U = 0;
1278 }
1279
1280
1281 IFX_INLINE void IfxEth_clearRxInterrupt(IfxEth *eth)
1282 {
1283 (void)eth;
1284 MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_RI_OFF));
1285 }
1286
1287
1288 IFX_INLINE void IfxEth_clearTuInterrupt(IfxEth *eth)
1289 {
1290 (void)eth;
1291 MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_TU_OFF));
1292 }
1293
1294
1295 IFX_INLINE void IfxEth_clearTxInterrupt(IfxEth *eth)
1296 {
1297 (void)eth;
1298 MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_TI_OFF));
1299 }
1300
1301
1302 IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate(IfxEth *eth)
1303 {
1304 (void)eth;
1305 MODULE_ETH.TIMESTAMP_CONTROL.B.TSCFUPDT = 0;
1306 }
1307
1308
1309 IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames(IfxEth *eth)
1310 {
1311 (void)eth;
1312 MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPV4ENA = 0;
1313 }
1314
1315
1316 IFX_INLINE void IfxEth_enableMmcCounter(IfxEth *eth)
1317 {
1318 (void)eth;
1319 MODULE_ETH.MMC_CONTROL.B.CNTFREEZ = 0;
1320 }
1321
1322
1323 IFX_INLINE void IfxEth_enableTimeStamp(IfxEth *eth)
1324 {
1325 (void)eth;
1326 MODULE_ETH.TIMESTAMP_CONTROL.B.TSENA = 1;
1327 }
1328
1329
1330 IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate(IfxEth *eth)
1331 {
1332 (void)eth;
1333 MODULE_ETH.TIMESTAMP_CONTROL.B.TSCFUPDT = 1;
1334 }
1335
1336
1337 IFX_INLINE void IfxEth_enableTimeStampForAllFrames(IfxEth *eth)
1338 {
1339 (void)eth;
1340 MODULE_ETH.TIMESTAMP_CONTROL.B.TSENALL = 1;
1341 }
1342
1343
1344 IFX_INLINE void IfxEth_enableTimeStampForEthFrames(IfxEth *eth)
1345 {
1346 (void)eth;
1347 MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPENA = 1;
1348 }
1349
1350
1351 IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames(IfxEth *eth)
1352 {
1353 (void)eth;
1354 MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPV4ENA = 1;
1355 }
1356
1357
1358 IFX_INLINE void IfxEth_enableTimeStampForVer2Format(IfxEth *eth)
1359 {
1360 (void)eth;
1361 MODULE_ETH.TIMESTAMP_CONTROL.B.TSVER2ENA = 1;
1362 }
1363
1364
1365 IFX_INLINE IfxEth_RxDescr *IfxEth_getActualRxDescriptor(IfxEth *eth)
1366 {
1367 return eth->pRxDescr;
1368 }
1369
1370
1371 IFX_INLINE uint32 IfxEth_getActualRxIndex(IfxEth *eth)
1372 {
1373 uint32 offset = (uint32)eth->pRxDescr - (uint32)IfxEth_getBaseRxDescriptor(eth);
1374 return offset / sizeof(IfxEth_RxDescr);
1375 }
1376
1377
1378 IFX_INLINE IfxEth_TxDescr *IfxEth_getActualTxDescriptor(IfxEth *eth)
1379 {
1380 return eth->pTxDescr;
1381 }
1382
1383
1384 IFX_INLINE IfxEth_RxDescr *IfxEth_getBaseRxDescriptor(IfxEth *eth)
1385 {
1386 return eth->rxDescr->items;
1387 }
1388
1389
1390 IFX_INLINE IfxEth_TxDescr *IfxEth_getBaseTxDescriptor(IfxEth *eth)
1391 {
1392 return eth->txDescr->items;
1393 }
1394
1395
1396 IFX_INLINE boolean IfxEth_getLoopbackMode(IfxEth *eth)
1397 {
1398 (void)eth;
1399 return (ETH_MAC_CONFIGURATION.B.LM != 0) ? TRUE : FALSE;
1400 }
1401
1402
1403 IFX_INLINE void *IfxEth_getMacAddressPointer(IfxEth *eth)
1404 {
1405 return (void *)eth->config.macAddress;
1406 }
1407
1408
1409 IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState(IfxEth *eth)
1410 {
1411 (void)eth;
1412 return (IfxEth_ReceiveProcessState)MODULE_ETH.STATUS.B.RS;
1413 }
1414
1415
1416 IFX_INLINE uint16 IfxEth_getRxDataLength(IfxEth *eth)
1417 {
1418 uint16 length = 0;
1419
1420 if (IfxEth_isRxDataAvailable(eth) != FALSE)
1421 {
1422 length = (uint16)IfxEth_getActualRxDescriptor(eth)->RDES0.A.FL;
1423 }
1424
1425 return length;
1426 }
1427
1428
1429 IFX_INLINE volatile Ifx_SRC_SRCR *IfxEth_getSrcPointer(IfxEth *eth)
1430 {
1431 (void)eth;
1432 return &MODULE_SRC.ETH.ETH[0].SR;
1433 }
1434
1435
1436 IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus(IfxEth *eth)
1437 {
1438 (void)eth;
1439 return MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT;
1440 }
1441
1442
1443 IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus(IfxEth *eth)
1444 {
1445 (void)eth;
1446 return MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT;
1447 }
1448
1449
1450 IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState(IfxEth *eth)
1451 {
1452 (void)eth;
1453 return (IfxEth_TransmitProcessState)MODULE_ETH.STATUS.B.TS;
1454 }
1455
1456
1457 IFX_INLINE void IfxEth_initialiseTimeStamp(IfxEth *eth)
1458 {
1459 (void)eth;
1460
1461 if (MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT == 0)
1462 {
1463 MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT = 1;
1464 }
1465 }
1466
1467
1468 IFX_INLINE boolean IfxEth_isEriInterrupt(IfxEth *eth)
1469 {
1470 (void)eth;
1471
1472 return MODULE_ETH.STATUS.B.ERI != 0;
1473 }
1474
1475
1476 IFX_INLINE boolean IfxEth_isLinkActive(IfxEth *eth)
1477 {
1478 return eth->config.phyLink() != 0;
1479 }
1480
1481
1482 IFX_INLINE boolean IfxEth_isNisInterrupt(IfxEth *eth)
1483 {
1484 (void)eth;
1485
1486 return MODULE_ETH.STATUS.B.NIS != 0;
1487 }
1488
1489
1490 IFX_INLINE boolean IfxEth_isRxChecksumError(IfxEth *eth)
1491 {
1492 IfxEth_RxDescr *descr = IfxEth_getActualRxDescriptor(eth);
1493 boolean error = (descr->RDES0.A.IPC != 0);
1494 descr->RDES0.A.IPC = 0;
1495
1496 return error;
1497 }
1498
1499
1500 IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth)
1501 {
1502 //return (IfxEth_rxDescr[eth->rxIndex][0] & (1U << 31)) == 0);
1503 return IfxEth_getActualRxDescriptor(eth)->RDES0.A.OWN == 0;
1504 }
1505
1506
1507 IFX_INLINE boolean IfxEth_isRxInterrupt(IfxEth *eth)
1508 {
1509 (void)eth;
1510
1511 return MODULE_ETH.STATUS.B.RI != 0;
1512 }
1513
1514
1515 IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth)
1516 {
1517 (void)eth;
1518 return ETH_BUS_MODE.B.SWR == 0 ? 1 : 0;
1519 }
1520
1521
1522 IFX_INLINE boolean IfxEth_isTuInterrupt(IfxEth *eth)
1523 {
1524 (void)eth;
1525
1526 return MODULE_ETH.STATUS.B.TU != 0;
1527 }
1528
1529
1530 IFX_INLINE boolean IfxEth_isTxInterrupt(IfxEth *eth)
1531 {
1532 (void)eth;
1533
1534 return MODULE_ETH.STATUS.B.TI != 0;
1535 }
1536
1537
1538 IFX_INLINE void IfxEth_readAllFlags(IfxEth *eth)
1539 {
1540 eth->status.U = ETH_STATUS.U;
1541 }
1542
1543
1544 IFX_INLINE void IfxEth_setAddToTimeUpdate(IfxEth *eth)
1545 {
1546 (void)eth;
1547 MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.ADDSUB = 0;
1548 }
1549
1550
1551 IFX_INLINE void IfxEth_setBinaryRolloverControl(IfxEth *eth, boolean enabled)
1552 {
1553 (void)eth;
1554 MODULE_ETH.TIMESTAMP_CONTROL.B.TSCTRLSSR = 1;
1555 }
1556
1557
1558 IFX_INLINE void IfxEth_setLoopbackMode(IfxEth *eth, boolean loopbackMode)
1559 {
1560 (void)eth;
1561 ETH_MAC_CONFIGURATION.B.LM = loopbackMode ? 1 : 0;
1562 }
1563
1564
1565 IFX_INLINE void IfxEth_setNanoSecondsUpdateValue(IfxEth *eth, uint8 value)
1566 {
1567 (void)eth;
1568 MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.TSSS = value;
1569 }
1570
1571
1572 IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode)
1573 {
1574 (void)eth;
1575 ETH_GPCTL.B.EPR = mode;
1576 }
1577
1578
1579 IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
1580 {
1581 descr->RDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
1582 descr->RDES1.A.RBS1 = size;
1583 }
1584
1585
1586 IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
1587 {
1588 descr->RDES3.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
1589 descr->RDES1.A.RBS2 = size;
1590 }
1591
1592
1593 IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address)
1594 {
1595 eth->RECEIVE_DESCRIPTOR_LIST_ADDRESS.U = (uint32)address;
1596 }
1597
1598
1599 IFX_INLINE void IfxEth_setSecondsUpdateValue(IfxEth *eth, uint8 value)
1600 {
1601 (void)eth;
1602 MODULE_ETH.SYSTEM_TIME_SECONDS_UPDATE.B.TSS = value;
1603 }
1604
1605
1606 IFX_INLINE void IfxEth_setSubSecondIncrementValue(IfxEth *eth, uint8 value)
1607 {
1608 (void)eth;
1609 MODULE_ETH.SUB_SECOND_INCREMENT.B.SSINC = value;
1610 }
1611
1612
1613 IFX_INLINE void IfxEth_setSubtractToTimeUpdate(IfxEth *eth)
1614 {
1615 (void)eth;
1616 MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.ADDSUB = 1;
1617 }
1618
1619
1620 IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
1621 {
1622 descr->TDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
1623 descr->TDES1.A.TBS1 = size;
1624 }
1625
1626
1627 IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
1628 {
1629 descr->TDES3.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
1630 descr->TDES1.A.TBS2 = size;
1631 }
1632
1633
1634 IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address)
1635 {
1636 eth->TRANSMIT_DESCRIPTOR_LIST_ADDRESS.U = (uint32)address;
1637 }
1638
1639
1640 IFX_INLINE void IfxEth_updateTimeStamp(IfxEth *eth)
1641 {
1642 (void)eth;
1643
1644 if (MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT == 0)
1645 {
1646 MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT = 1;
1647 }
1648 }
1649
1650
1651 IFX_INLINE void *IfxEth_waitTransmitBuffer(IfxEth *eth)
1652 {
1653 void *tx;
1654
1655 do
1656 {
1657 tx = IfxEth_getTransmitBuffer(eth);
1658 } while (tx == NULL_PTR);
1659
1660 return tx;
1661 }
1662
1663
1664 #endif /* IFXET_H */
IfxEth_Txd_Out
TXD pin mapping structure.
Definition: IfxEth_PinMap.h:120
IfxEth_AltRxDescr0_Bits::RE
uint32 RE
Receive Error.
Definition: IfxEth.h:161
IfxEth_AltRxDescr0_Bits::CE
uint32 CE
CRC Error.
Definition: IfxEth.h:159
IfxEth_AltTxDescr0_Bits::ED
uint32 ED
Excessive deferral.
Definition: IfxEth.h:198
IfxEth_isRxChecksumError
IFX_INLINE boolean IfxEth_isRxChecksumError(IfxEth *eth)
Definition: IfxEth.h:1490
IfxEth_RingModeTxBuffersConfig::txBufferUsed
IfxEth_RingModeBufferUsed txBufferUsed
Transmit Buffer(s) used in ringmode.
Definition: IfxEth.h:318
IfxEth::isrTxCount
sint32 isrTxCount
Count of TX ISR.
Definition: IfxEth.h:448
IfxEth_AltRxDescr0_Bits::DE
uint32 DE
Descriptor Error.
Definition: IfxEth.h:172
IfxEth_init
IFX_EXTERN void IfxEth_init(IfxEth *eth, const IfxEth_Config *config)
Initialises the driver.
Definition: IfxEth.c:108
IfxEth_RxDescr1::A
IfxEth_AltRxDescr1_Bits A
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:251
IfxEth_RxDescr_release
IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr)
release RX descriptor
Definition: IfxEth.h:1213
IfxEth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:71
IfxEth_RingModeBufferUsed_bothBuffers
BOth Buffers used.
Definition: IfxEth.h:129
IfxEth_updateTimeStamp
IFX_INLINE void IfxEth_updateTimeStamp(IfxEth *eth)
Updates the System time with specified values in SECONDS and NANOSECONDS registers.
Definition: IfxEth.h:1640
IfxEth_MiiPins::txd3
IfxEth_Txd_Out * txd3
Pointer to TXD3 output pin config.
Definition: IfxEth.h:368
IfxEth_waitTransmitBuffer
IFX_INLINE void * IfxEth_waitTransmitBuffer(IfxEth *eth)
Waits for one TX buffer becomes available.
Definition: IfxEth.h:1651
IfxEth_RingModeTxBuffersConfig::txBuffer1Size
uint16 txBuffer1Size
Size of Tx Buffer 1.
Definition: IfxEth.h:321
IfxEth_TxDescr::TDES2
IfxEth_TxDescr2 TDES2
TX descriptor DWORD 2.
Definition: IfxEth.h:341
IfxEth_RingModeTxBuffersConfig::txBuffer1StartAddress
uint32 txBuffer1StartAddress
Start address of Tx Buffer 1.
Definition: IfxEth.h:319
IfxEth_MiiPins::rxClk
IfxEth_Rxclk_In * rxClk
Pointer to RXCLK input pin config.
Definition: IfxEth.h:356
IfxEth_getLoopbackMode
IFX_INLINE boolean IfxEth_getLoopbackMode(IfxEth *eth)
returns the status of th eloopback mode
Definition: IfxEth.h:1396
IfxEth_clearRxInterrupt
IFX_INLINE void IfxEth_clearRxInterrupt(IfxEth *eth)
Clear receive interrupt request.
Definition: IfxEth.h:1281
IfxEth_Txer_Out
TXER pin mapping structure.
Definition: IfxEth_PinMap.h:136
IfxEth_isLinkActive
IFX_INLINE boolean IfxEth_isLinkActive(IfxEth *eth)
Checks whether physical connection is active.
Definition: IfxEth.h:1476
IfxEth_AltRxDescr0_Bits::RWT
uint32 RWT
Receive Watchdog Timeout.
Definition: IfxEth.h:162
IfxEth_Config
ETH configuration structure.
Definition: IfxEth.h:418
IfxEth_isTuInterrupt
IFX_INLINE boolean IfxEth_isTuInterrupt(IfxEth *eth)
Checks whether Transmit Buffer Unavailable interrupt is requested.
Definition: IfxEth.h:1522
IfxEth_TransmitProcessState_reset
Stopped; Reset or Stop Transmit Command issued.
Definition: IfxEth.h:136
IfxEth_ReceiveProcessState_suspended
Suspended: Receive Descriptor Unavailable.
Definition: IfxEth.h:117
IFXETH_RTX_BUFFER_SIZE
#define IFXETH_RTX_BUFFER_SIZE
Size of one ethernet frame buffer.
Definition: IfxEth.h:62
IfxEth_RingModeTxBuffersConfig
Configuration structure for Ring Mode Transmit buffers.
Definition: IfxEth.h:316
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxEth_TxDescr1_Bits
Structure for TX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:526
IfxEth_TxDescr0_Bits
Structure for TX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:503
IfxEth_DescriptorMode_ring
ring mode descriptors
Definition: IfxEth.h:98
IfxEth_Config::txDescr
IfxEth_TxDescrList * txDescr
pointer to TX descriptor RAM
Definition: IfxEth.h:430
IfxEth_AltRxDescr0_Bits::VLAN
uint32 VLAN
VLAN Tag.
Definition: IfxEth.h:168
IfxEth_isEriInterrupt
IFX_INLINE boolean IfxEth_isEriInterrupt(IfxEth *eth)
Checks whether Early Receive interrupt is requested.
Definition: IfxEth.h:1468
IfxEth_RingModeBufferUsed
IfxEth_RingModeBufferUsed
Buffer(s) used in ring mode.
Definition: IfxEth.h:125
IfxEth_RingModeRxBuffersConfig::rxBufferUsed
IfxEth_RingModeBufferUsed rxBufferUsed
Receive Buffer(s) used in ringmode.
Definition: IfxEth.h:307
IfxEth_AltTxDescr0_Bits::DB
uint32 DB
Deferred bit.
Definition: IfxEth.h:196
IfxEth_enableTimeStampForIpv4Frames
IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames(IfxEth *eth)
Enables Processing of PTP frames sent over IPV4 UDP.
Definition: IfxEth.h:1351
IfxEth_TxDescr1::A
IfxEth_AltTxDescr1_Bits A
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:281
IfxEth_MiiPins::rxd2
IfxEth_Rxd_In * rxd2
Pointer to RXD2 input pin config.
Definition: IfxEth.h:361
IfxEth_AltTxDescr0_Bits::JT
uint32 JT
Jabber Timeout.
Definition: IfxEth.h:207
IfxEth_getReceiveBuffer
IFX_EXTERN void * IfxEth_getReceiveBuffer(IfxEth *eth)
Gets receive buffer note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffe...
Definition: IfxEth.c:75
IfxEth_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxEth_getSrcPointer(IfxEth *eth)
Returns the SRC pointer of Eth.
Definition: IfxEth.h:1429
IfxEth_MiiPins::col
IfxEth_Col_In * col
pointer to COL input pin config
Definition: IfxEth.h:354
IfxEth_DescriptorMode_chain
chain mode descriptors
Definition: IfxEth.h:97
IfxEth::pRxDescr
IfxEth_RxDescr * pRxDescr
Definition: IfxEth.h:455
IfxEth_enableTimeStamp
IFX_INLINE void IfxEth_enableTimeStamp(IfxEth *eth)
Enables the TimeStamp.
Definition: IfxEth.h:1323
IfxEth_setBinaryRolloverControl
IFX_INLINE void IfxEth_setBinaryRolloverControl(IfxEth *eth, boolean enabled)
Enable/Disables Timestamp Digital or Binary Rollover Control.
Definition: IfxEth.h:1551
IfxEth_getActualRxDescriptor
IFX_INLINE IfxEth_RxDescr * IfxEth_getActualRxDescriptor(IfxEth *eth)
Get pointer to actual RX descriptor.
Definition: IfxEth.h:1365
IfxEth_rxBuffer
IFX_EXTERN uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
receive buffers
Definition: IfxEth.h:1193
IfxEth_RxDescr::RDES1
IfxEth_RxDescr1 RDES1
RX descriptor DWORD 1.
Definition: IfxEth.h:330
IfxEth_AltTxDescr0_Bits::UF
uint32 UF
Underflow error.
Definition: IfxEth.h:197
IfxEth_isSoftwareResetDone
IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth)
Returns the status of Software Reset.
Definition: IfxEth.h:1515
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEth_isNisInterrupt
IFX_INLINE boolean IfxEth_isNisInterrupt(IfxEth *eth)
Checks whether NIS interrupt is requested.
Definition: IfxEth.h:1482
IfxEth_RingModeRxBuffersConfig
Configuration structure for Ring Mode Receive Buffers.
Definition: IfxEth.h:305
IfxEth_setAddToTimeUpdate
IFX_INLINE void IfxEth_setAddToTimeUpdate(IfxEth *eth)
Sets addition, the time value is added with the contents of the update register.
Definition: IfxEth.h:1544
IfxEth_MiiPins::mdc
IfxEth_Mdc_Out * mdc
Pointer to MDC pin config.
Definition: IfxEth.h:369
IfxEth_resetModule
IFX_EXTERN void IfxEth_resetModule(void)
resets Ethernet kernel
Definition: IfxEth.c:510
IfxEth_Rxer_In
RXER pin mapping structure.
Definition: IfxEth_PinMap.h:144
IfxEth_Config::ethSfr
Ifx_ETH * ethSfr
Pointer to register base.
Definition: IfxEth.h:428
IfxEth_AltTxDescr0_Bits::TCH
uint32 TCH
Second Address Chained.
Definition: IfxEth.h:212
Ifx_Assert.h
Assert functions.
IfxEth_txDescr
IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr
Definition: IfxEth.h:1201
IfxEth_PhyInterfaceMode_mii
MII mode.
Definition: IfxEth.h:105
IfxEth_PhyInterfaceMode_rmii
RMII mode.
Definition: IfxEth.h:106
IfxEth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxEth_PinMap.h:111
IfxEth_ReceiveProcessState_none
Reserved for future use.
Definition: IfxEth.h:115
IfxEth_TransmitProcessState_none
Reserved for future use.
Definition: IfxEth.h:141
IfxEth_MiiPins::txd2
IfxEth_Txd_Out * txd2
Pointer to TXD2 output pin config.
Definition: IfxEth.h:367
IfxEth_TxDescr::TDES0
IfxEth_TxDescr0 TDES0
TX descriptor DWORD 0.
Definition: IfxEth.h:339
IfxEth_initialiseTimeStamp
IFX_INLINE void IfxEth_initialiseTimeStamp(IfxEth *eth)
Initialises the TimeStamp.
Definition: IfxEth.h:1457
IfxEth_isTxInterrupt
IFX_INLINE boolean IfxEth_isTxInterrupt(IfxEth *eth)
Checks whether transmit interrupt is requested.
Definition: IfxEth.h:1530
IfxEth_AltTxDescr0_Bits::CC
uint32 CC
Collision count.
Definition: IfxEth.h:199
IfxEth_RxDescr::RDES3
IfxEth_RxDescr3 RDES3
RX descriptor DWORD 3.
Definition: IfxEth.h:332
IfxEth::txCount
uint32 txCount
Number of frames transmitted.
Definition: IfxEth.h:445
IfxEth_writeHeader
IFX_EXTERN void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
writes the header format into buffrer
Definition: IfxEth.c:913
IfxSrc.h
SRC basic functionality.
IfxEth_MiiPins::rxd0
IfxEth_Rxd_In * rxd0
Pointer to RXD0 input pin config.
Definition: IfxEth.h:359
IfxEth_setupRmiiInputPins
IFX_EXTERN void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
Set up input pins.
Definition: IfxEth.c:736
IfxEth_Config::isrPriority
Ifx_Priority isrPriority
Interrupt service priority.
Definition: IfxEth.h:426
IfxEth_TransmitProcessState_waiting
Running; Waiting for status.
Definition: IfxEth.h:138
IfxEth_initReceiveDescriptorsRingMode
IFX_EXTERN void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
Initialises the receive descriptors.
Definition: IfxEth.c:330
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxEth_setLoopbackMode
IFX_INLINE void IfxEth_setLoopbackMode(IfxEth *eth, boolean loopbackMode)
Sets the loopback mode.
Definition: IfxEth.h:1558
IfxEth_Txen_Out
TXEN pin mapping structure.
Definition: IfxEth_PinMap.h:128
IfxEth_applySoftwareReset
IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth)
Applies the Software Reset.
Definition: IfxEth.h:1261
IfxEth_DescriptorMode
IfxEth_DescriptorMode
Definition: IfxEth.h:95
IfxEth_setupMiiOutputPins
IFX_EXTERN void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
setup MII mode output pins
Definition: IfxEth.c:697
IfxEth::isrCount
sint32 isrCount
count of all ISR
Definition: IfxEth.h:451
IfxEth_RxDescr1_Bits
Structure for RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:490
IfxEth_RxDescr0_Bits
Structure for RX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:465
IfxEth_TransmitProcessState_timestampWrite
TIME_STAMP write state.
Definition: IfxEth.h:140
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxEth_TxDescr_setBuffer
IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer)
Set buffer of a TX descriptor.
Definition: IfxEth.h:1243
IfxEth_RingModeBuffersConfig::rxConfig
IfxEth_RingModeRxBuffersConfig rxConfig
Receive buffers ring mode config.
Definition: IfxEth.h:378
IfxEth_shuffleTxDescriptor
IFX_EXTERN void IfxEth_shuffleTxDescriptor(IfxEth *eth)
Shuffle to next TX descriptor.
Definition: IfxEth.c:819
IfxEth_AltRxDescr0_Bits::LE
uint32 LE
Length Error.
Definition: IfxEth.h:170
IfxEth_startReceiver
IFX_EXTERN void IfxEth_startReceiver(IfxEth *eth)
Start the receiver functions.
Definition: IfxEth.c:836
IfxEth_disableTimeStampCoarseUpdate
IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate(IfxEth *eth)
Disables Timestamp Fine or Coarse Update.
Definition: IfxEth.h:1302
IfxEth_ReceiveProcessState_transfering
Running: Transferring the receive packet data from receive buffer to host memory. ...
Definition: IfxEth.h:120
IfxEth_MiiPins::txEr
IfxEth_Txer_Out * txEr
Pointer to TXER output pin config.
Definition: IfxEth.h:364
IfxEth_enableTimeStampCoarseUpdate
IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate(IfxEth *eth)
Enables Timestamp Fine or Coarse Update.
Definition: IfxEth.h:1330
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxEth_RingModeRxBuffersConfig::rxBuffer2StartAddress
uint32 rxBuffer2StartAddress
Start address of Rx Buffer 2.
Definition: IfxEth.h:309
IfxEth_MiiPins::txd1
IfxEth_Txd_Out * txd1
Pointer to TXD1 output pin config.
Definition: IfxEth.h:366
IfxEth_MiiPins::txEn
IfxEth_Txen_Out * txEn
Pointer to TXEN output pin config.
Definition: IfxEth.h:363
IfxEth_PinMap.h
ETH I/O map.
IfxEth_AltTxDescr0_Bits::EC
uint32 EC
Excessive Collision.
Definition: IfxEth.h:201
IfxScuWdt.h
SCU basic functionality.
IfxEth
ETH driver structure.
Definition: IfxEth.h:441
IfxEth_MiiPins::crs
IfxEth_Crs_In * crs
pointer to CRS input pin config
Definition: IfxEth.h:353
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxEth_setPhyInterfaceMode
IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode)
Sets the Phy Interface mode.
Definition: IfxEth.h:1572
IfxEth_enableTimeStampForVer2Format
IFX_INLINE void IfxEth_enableTimeStampForVer2Format(IfxEth *eth)
Enables PTP packet Processing for Version 2 Format.
Definition: IfxEth.h:1358
IfxEth_AltTxDescr0_Bits::NC
uint32 NC
No Carrier.
Definition: IfxEth.h:203
IfxEth_AltTxDescr1_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:227
IfxEth_AltRxDescr1_Bits::resv
uint32 resv
reserved)
Definition: IfxEth.h:188
IfxEth_AltTxDescr0_Bits
Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:194
IfxEth_setTransmitDescriptorAddress
IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address)
Sets transmit descriptor address.
Definition: IfxEth.h:1634
IfxEth_ReceiveProcessState
IfxEth_ReceiveProcessState
indicates the Receive DMA FSM state
Definition: IfxEth.h:111
IfxEth_getActualTxDescriptor
IFX_INLINE IfxEth_TxDescr * IfxEth_getActualTxDescriptor(IfxEth *eth)
Get pointer to actual TX descriptor.
Definition: IfxEth.h:1378
IfxEth_initTransmitDescriptors
IFX_EXTERN void IfxEth_initTransmitDescriptors(IfxEth *eth)
Initialises transmit descriptors.
Definition: IfxEth.c:394
IfxEth_readMacAddress
IFX_EXTERN void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress)
Reads the MAC address from module register.
Definition: IfxEth.c:502
IfxEth_setReceiveBuffer2RingMode
IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer2 of the receive descriptor along with its size.
Definition: IfxEth.h:1586
IfxEth_Col_In
COL pin mapping structure.
Definition: IfxEth_PinMap.h:95
IfxEth_AltRxDescr0_Bits::AFM
uint32 AFM
Destination Address Filter Fail.
Definition: IfxEth.h:175
IfxEth_RxDescr
Normal RX descriptor.
Definition: IfxEth.h:327
IfxEth_TxDescr
Normal TX descriptor.
Definition: IfxEth.h:337
IfxEth_setNanoSecondsUpdateValue
IFX_INLINE void IfxEth_setNanoSecondsUpdateValue(IfxEth *eth, uint8 value)
Sets the time in sub seconds representation, to be initialized or added to the system time...
Definition: IfxEth.h:1565
IfxEth_Config::rxDescr
IfxEth_RxDescrList * rxDescr
pointer to RX descriptor RAM
Definition: IfxEth.h:429
IfxEth_AltTxDescr0_Bits::LOC
uint32 LOC
Loss of Carrier.
Definition: IfxEth.h:204
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxEth_setupRmiiOutputPins
IFX_EXTERN void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
set output pin of port
Definition: IfxEth.c:768
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxEth_AltRxDescr1_Bits::RBS2
uint32 RBS2
Receive Buffer 2 Size.
Definition: IfxEth.h:187
IfxEth_ChecksumMode_bypass
Definition: IfxEth.h:89
IfxEth_setSubtractToTimeUpdate
IFX_INLINE void IfxEth_setSubtractToTimeUpdate(IfxEth *eth)
Sets subtraction, the time value is subtracted with the contents of the update register.
Definition: IfxEth.h:1613
IfxEth_getTransmitProcessState
IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState(IfxEth *eth)
returns the Transmit Process State
Definition: IfxEth.h:1450
IfxEth_RingModeBuffersConfig
Configuration structure for Ring Mode descriptors.
Definition: IfxEth.h:375
IfxEth_enableTimeStampForEthFrames
IFX_INLINE void IfxEth_enableTimeStampForEthFrames(IfxEth *eth)
Enables Processing of PTP over Ethernet Frames.
Definition: IfxEth.h:1344
IfxEth_AltRxDescr0_Bits::LC
uint32 LC
Late Collision.
Definition: IfxEth.h:164
IfxEth_AltRxDescr0_Bits::OE
uint32 OE
Overflow Error.
Definition: IfxEth.h:169
IfxEth_AltRxDescr0_Bits::ES
uint32 ES
Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE.
Definition: IfxEth.h:173
IfxEth_RingModeRxBuffersConfig::rxBuffer1Size
uint16 rxBuffer1Size
Size of Rx Buffer 1.
Definition: IfxEth.h:310
IfxEth_ChecksumMode_tcpUdpIcmpSegment
Definition: IfxEth.h:91
IfxEth_AltRxDescr0_Bits::FT
uint32 FT
Frame Type.
Definition: IfxEth.h:163
IfxEth_TransmitProcessState_fetching
Running; Fetching Transmit Transfer Descriptor.
Definition: IfxEth.h:137
IFXETH_MAX_TX_BUFFERS
#define IFXETH_MAX_TX_BUFFERS
Tx buffers (ring mode)
Definition: IfxEth.h:74
IfxEth_clearTuInterrupt
IFX_INLINE void IfxEth_clearTuInterrupt(IfxEth *eth)
Clear Transmit Buffer Unavailable request.
Definition: IfxEth.h:1288
IfxEth_TransmitProcessState_suspended
Suspended; Transmit Descriptor Unavailable or Transmit Buffer Underflow.
Definition: IfxEth.h:142
IfxEth_AltRxDescr0_Bits::SAF
uint32 SAF
Source Address Filter Fail.
Definition: IfxEth.h:171
IfxEth_AltTxDescr0_Bits::CIC
uint32 CIC
Checksum Insertion Control.
Definition: IfxEth.h:214
IfxEth_AltRxDescr0_Bits::DBE
uint32 DBE
Dribble Bit Error.
Definition: IfxEth.h:160
IfxEth_TxDescr_getNext
IFX_INLINE IfxEth_TxDescr * IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr)
Get pointer to next TX descriptor.
Definition: IfxEth.h:1225
IfxEth_getTransmitBuffer
IFX_EXTERN void * IfxEth_getTransmitBuffer(IfxEth *eth)
Get a free transmit buffer.
Definition: IfxEth.c:93
IfxEth_setSecondsUpdateValue
IFX_INLINE void IfxEth_setSecondsUpdateValue(IfxEth *eth, uint8 value)
Sets the time in seconds to be initialized or added to the system time.
Definition: IfxEth.h:1599
IfxEth_TransmitProcessState_closing
Running; Closing Transmit Descriptor.
Definition: IfxEth.h:143
IfxEth_rxDescr
IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr
Definition: IfxEth.h:1195
IfxEth_AltTxDescr0_Bits::IHE
uint32 IHE
IP Header Error.
Definition: IfxEth.h:209
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:73
IfxEth_ReceiveProcessState_timestampWrite
TIME_STAMP write state.
Definition: IfxEth.h:119
IfxEth_setTransmitBuffer2RingMode
IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer2 of the receive descriptor along with its size.
Definition: IfxEth.h:1627
IfxEth_ChecksumMode
IfxEth_ChecksumMode
Definition: IfxEth.h:87
IfxEth_MiiPins
Port pins for MII mode configuration.
Definition: IfxEth.h:351
IfxEth_AltTxDescr0_Bits::IC
uint32 IC
Interrupt on Completion.
Definition: IfxEth.h:221
IfxEth_Config::descriptorMode
IfxEth_DescriptorMode descriptorMode
Descriptor mode (chain or ring)
Definition: IfxEth.h:431
IfxEth_AltRxDescr0_Bits::LS
uint32 LS
Last Descriptor.
Definition: IfxEth.h:166
IfxEth_AltRxDescr1_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access.
Definition: IfxEth.h:181
IfxEth_AltRxDescr0_Bits
Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:156
IfxEth_RxDescr::RDES0
IfxEth_RxDescr0 RDES0
RX descriptor DWORD 0.
Definition: IfxEth.h:329
IfxEth_MiiPins::txClk
IfxEth_Txclk_In * txClk
Pointer to TXCLK input pin config.
Definition: IfxEth.h:355
IfxEth_RingModeTxBuffersConfig::txBuffer2Size
uint16 txBuffer2Size
Size of Tx Buffer 2.
Definition: IfxEth.h:322
IfxEth_MiiPins::rxEr
IfxEth_Rxer_In * rxEr
Pointer to RXER input pin config.
Definition: IfxEth.h:358
IfxEth_TransmitProcessState_reading
Running; Reading Data from host memory buffer and queuing it to transmit buffer (Tx FIFO) ...
Definition: IfxEth.h:139
IfxEth::error
uint32 error
Indicate an error has occurred during execution.
Definition: IfxEth.h:446
IfxEth_RxDescr_setBuffer
IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer)
Set buffer of an RX descriptor.
Definition: IfxEth.h:1219
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxEth_sendTransmitBuffersRingMode
IFX_EXTERN void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
Request to send the transmit buffer.
Definition: IfxEth.c:543
IfxEth_AltRxDescr1_Bits::resv1
uint32 resv1
reserved
Definition: IfxEth.h:184
IfxEth_Rxd_In
RXD pin mapping structure.
Definition: IfxEth_PinMap.h:87
IfxEth_AltTxDescr0_Bits::TER
uint32 TER
Transmit End of Ring.
Definition: IfxEth.h:213
IfxEth_RxDescr_getNext
IFX_INLINE IfxEth_RxDescr * IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr)
Get pointer to next RX descriptor.
Definition: IfxEth.h:1207
IFXETH_MAX_RX_BUFFERS
#define IFXETH_MAX_RX_BUFFERS
Rx buffers (ring mode)
Definition: IfxEth.h:68
IfxEth_TxDescr_isAvailable
IFX_INLINE boolean IfxEth_TxDescr_isAvailable(IfxEth_TxDescr *descr)
Return TRUE if a TX descriptor is available for setup.
Definition: IfxEth.h:1231
IfxEth::txDiff
sint32 txDiff
Difference between isrTxCount and txCount.
Definition: IfxEth.h:449
IfxEth_getTimeStampUpdateStatus
IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus(IfxEth *eth)
returns the status of the System Time updation
Definition: IfxEth.h:1443
IFXETH_DESCR_SIZE
#define IFXETH_DESCR_SIZE
4 DWORDS (16 bytes)
Definition: IfxEth.h:79
IfxEth_getReceiveProcessState
IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState(IfxEth *eth)
returns the Receive Process State
Definition: IfxEth.h:1409
IfxEth_RxDescrList::items
IfxEth_RxDescr items[IFXETH_MAX_RX_BUFFERS]
Definition: IfxEth.h:402
IfxEth_getBaseTxDescriptor
IFX_INLINE IfxEth_TxDescr * IfxEth_getBaseTxDescriptor(IfxEth *eth)
Get pointer to base TX descriptor.
Definition: IfxEth.h:1390
IfxEth_TxDescr_release
IFX_INLINE void IfxEth_TxDescr_release(IfxEth_TxDescr *descr)
Release a TX descriptor for transmit queue.
Definition: IfxEth.h:1237
IfxEth_clearEriInterrupt
IFX_INLINE void IfxEth_clearEriInterrupt(IfxEth *eth)
Clear Early Receive Interrupt request.
Definition: IfxEth.h:1268
IfxEth_TxDescr::TDES1
IfxEth_TxDescr1 TDES1
TX descriptor DWORD 1.
Definition: IfxEth.h:340
IfxEth_RingModeBuffersConfig::txConfig
IfxEth_RingModeTxBuffersConfig txConfig
Transmit buffers ring mode config.
Definition: IfxEth.h:377
IfxEth_getMacAddressPointer
IFX_INLINE void * IfxEth_getMacAddressPointer(IfxEth *eth)
Returns pointer to the MAC address configured for this ETH.
Definition: IfxEth.h:1403
IfxEth_setupChecksumEngine
IFX_EXTERN void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode)
Set up checksum Engine.
Definition: IfxEth.c:590
IfxEth_RxDescr0::U
uint32 U
Unsigned long access.
Definition: IfxEth.h:244
IfxEth_AltRxDescr1_Bits::RCH
uint32 RCH
Second Address Chained.
Definition: IfxEth.h:185
boolean
unsigned char boolean
Definition: Platform_Types.h:101
IfxEth_ReceiveProcessState_fetching
Running: Fetching Receive Transfer Descriptor.
Definition: IfxEth.h:114
IfxEth_setupMiiInputPins
IFX_EXTERN void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
Set up MII mode input pins.
Definition: IfxEth.c:611
IfxEth_Config::miiPins
IFX_CONST IfxEth_MiiPins * miiPins
Pointer to port pins configuration of MII mode.
Definition: IfxEth.h:425
IfxEth_MiiPins::txd0
IfxEth_Txd_Out * txd0
Pointer to TXD0 output pin config.
Definition: IfxEth.h:365
IfxEth::pTxDescr
IfxEth_TxDescr * pTxDescr
Definition: IfxEth.h:456
IfxEth_RxDescrList
Definition: IfxEth.h:400
IfxEth_RingModeRxBuffersConfig::rxBuffer1StartAddress
uint32 rxBuffer1StartAddress
Start address of Rx Buffer 1.
Definition: IfxEth.h:308
IfxCpu.h
CPU basic functionality.
IfxEth_Config::macAddress
uint8 macAddress[6]
MAC address for the ethernet, should be unique in the network.
Definition: IfxEth.h:420
IfxEth_TxDescrList::items
IfxEth_TxDescr items[IFXETH_MAX_TX_BUFFERS]
Definition: IfxEth.h:408
IfxEth_TxDescr::TDES3
IfxEth_TxDescr3 TDES3
TX descriptor DWORD 3.
Definition: IfxEth.h:342
IfxEth_isRxInterrupt
IFX_INLINE boolean IfxEth_isRxInterrupt(IfxEth *eth)
Checks whether receive interrupt is requested.
Definition: IfxEth.h:1507
IfxEth_enableMmcCounter
IFX_INLINE void IfxEth_enableMmcCounter(IfxEth *eth)
Enables theMMC counter.
Definition: IfxEth.h:1316
IfxEth_AltRxDescr1_Bits::RBS1
uint32 RBS1
Receive Buffer 1 Size.
Definition: IfxEth.h:183
IfxEth_cfg.h
ETH on-chip implementation data.
IfxEth_ReceiveProcessState_reset
Stopped: Reset or Stop Receive Command issued.
Definition: IfxEth.h:113
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxEth_AltRxDescr1_Bits::DIC
uint32 DIC
Disable Interrupt on Completion.
Definition: IfxEth.h:189
IfxEth_RxDescr0::A
IfxEth_AltRxDescr0_Bits A
Structure for RX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:243
IfxEth_setReceiveDescriptorAddress
IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address)
Sets receive descriptor address.
Definition: IfxEth.h:1593
IfxEth_setAndSendTransmitBuffer
IFX_EXTERN void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len)
Definition: IfxEth.c:566
IfxEth_readAllFlags
IFX_INLINE void IfxEth_readAllFlags(IfxEth *eth)
reads the status of all flags
Definition: IfxEth.h:1538
IfxEth_AltTxDescr0_Bits::PCE
uint32 PCE
Payload Checksum Error.
Definition: IfxEth.h:205
IfxEth_setMacAddress
IFX_EXTERN void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress)
Sets the MAC address.
Definition: IfxEth.c:573
IfxEth_AltRxDescr0_Bits::ext
uint32 ext
Extended Status Available/Rx MAC Address.
Definition: IfxEth.h:158
IfxEth_disableModule
IFX_EXTERN void IfxEth_disableModule(void)
Disable ETH Module.
Definition: IfxEth.c:47
IfxEth_startTransmitter
IFX_EXTERN void IfxEth_startTransmitter(IfxEth *eth)
Start the transmitter functions.
Definition: IfxEth.c:847
IfxEth::status
Ifx_ETH_STATUS status
Intermediate variable to use register content in control structure.
Definition: IfxEth.h:443
IfxEth_AltRxDescr0_Bits::IPC
uint32 IPC
IPC Checksum Error/Giant Frame.
Definition: IfxEth.h:165
IfxEth_AltRxDescr0_Bits::OWN
uint32 OWN
Own Bit, 1 = own by DMA.
Definition: IfxEth.h:176
IfxEth_Mdc_Out
MDC pin mapping structure.
Definition: IfxEth_PinMap.h:103
IfxEth_RxDescr0
Union for RX descriptor DWORD 0.
Definition: IfxEth.h:241
IfxEth_RxDescr1
Union for RX descriptor DWORD 1.
Definition: IfxEth.h:249
IfxEth_RxDescr2
Union for RX descriptor DWORD 2.
Definition: IfxEth.h:257
IfxEth_RxDescr3
Union for RX descriptor DWORD 3.
Definition: IfxEth.h:264
IfxEth_enableTimeStampForAllFrames
IFX_INLINE void IfxEth_enableTimeStampForAllFrames(IfxEth *eth)
Enables the TimeStamp for All frames.
Definition: IfxEth.h:1337
IfxEth_AltTxDescr0_Bits::DC
uint32 DC
Disable CRC.
Definition: IfxEth.h:218
IfxEth_wakeupReceiver
IFX_EXTERN void IfxEth_wakeupReceiver(IfxEth *eth)
Wakeup the receiver functions.
Definition: IfxEth.c:877
IfxEth_MiiPins::mdio
IfxEth_Mdio_InOut * mdio
Pointer to MDIO pin config.
Definition: IfxEth.h:370
sint32
long sint32
Definition: Platform_Types.h:131
IfxEth_AltRxDescr1_Bits::RER
uint32 RER
Receive End of Ring.
Definition: IfxEth.h:186
IfxEth_initConfig
IFX_EXTERN void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr)
Initialises the configuration Structure.
Definition: IfxEth.c:246
IfxEth_txBuffer
IFX_EXTERN uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE]
Transmit buffers.
Definition: IfxEth.h:1199
IfxEth_AltTxDescr1_Bits::TBS1
uint32 TBS1
Transmit Buffer 1 Size.
Definition: IfxEth.h:229
IfxEth_RmiiPins::refClk
IfxEth_Refclk_In * refClk
Pointer to REFCLK input pin config.
Definition: IfxEth.h:386
IfxEth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxEth_PinMap.h:47
IfxEth_sendTransmitBuffer
IFX_EXTERN void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len)
Request to send the transmit buffer.
Definition: IfxEth.c:529
IfxEth_AltTxDescr0_Bits::TTSE
uint32 TTSE
Transmit Time Stamp Enable.
Definition: IfxEth.h:216
IfxEth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxEth_PinMap.h:63
IfxEth_AltTxDescr0_Bits::DP
uint32 DP
Disable Padding.
Definition: IfxEth.h:217
IfxEth_AltTxDescr1_Bits::TBS2
uint32 TBS2
Transmit Buffer 2 Size.
Definition: IfxEth.h:231
IfxEth_MiiPins::rxd1
IfxEth_Rxd_In * rxd1
Pointer to RXD1 input pin config.
Definition: IfxEth.h:360
IfxEth::rxDiff
sint32 rxDiff
Difference between isrRxCount and rxCount.
Definition: IfxEth.h:450
IfxEth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxEth_PinMap.h:55
IfxEth_enableModule
IFX_EXTERN void IfxEth_enableModule(void)
Enable ETH Module.
Definition: IfxEth.c:56
IfxEth_Config::ringModeBuffersConfig
IfxEth_RingModeBuffersConfig ringModeBuffersConfig
Ring mode buffers condiguration.
Definition: IfxEth.h:432
IfxEth_RingModeBufferUsed_buffer1
Buffer 1 used.
Definition: IfxEth.h:127
IfxEth_disableTimeStampForIpv4Frames
IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames(IfxEth *eth)
Disables Processing of PTP frames sent over IPV4 UDP.
Definition: IfxEth.h:1309
IfxEth_PhyInterfaceMode
IfxEth_PhyInterfaceMode
External Phy Interface RMII Mode.
Definition: IfxEth.h:103
IfxEth_ReceiveProcessState_closing
Running: Closing Receive Descriptor.
Definition: IfxEth.h:118
IfxEth_clearTxInterrupt
IFX_INLINE void IfxEth_clearTxInterrupt(IfxEth *eth)
Clear transmit interrupt request.
Definition: IfxEth.h:1295
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:753
IfxEth_MiiPins::rxDv
IfxEth_Rxdv_In * rxDv
Pointer to RXDV input pin config.
Definition: IfxEth.h:357
IfxEth_MiiPins::rxd3
IfxEth_Rxd_In * rxd3
Pointer to RXD3 input pin config.
Definition: IfxEth.h:362
IfxEth_stopReceiver
IFX_EXTERN void IfxEth_stopReceiver(IfxEth *eth)
Stops the receiver functions.
Definition: IfxEth.c:857
IfxEth_getBaseRxDescriptor
IFX_INLINE IfxEth_RxDescr * IfxEth_getBaseRxDescriptor(IfxEth *eth)
Get pointer to base RX descriptor.
Definition: IfxEth.h:1384
IfxEth_TxDescr0::A
IfxEth_AltTxDescr0_Bits A
Structure for TX descriptor DWORD 0 Bit field access.
Definition: IfxEth.h:273
IfxEth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:79
IfxEth_AltTxDescr0_Bits::TTSS
uint32 TTSS
Transmit Time Stamp Status.
Definition: IfxEth.h:210
IfxEth_setTransmitBuffer1RingMode
IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
Sets the transmit buffer1 of the receive descriptor along with its size.
Definition: IfxEth.h:1620
IfxEth_Config::rmiiPins
IFX_CONST IfxEth_RmiiPins * rmiiPins
Pointer to port pins configuration of RMII mode.
Definition: IfxEth.h:424
IfxEth_setReceiveBuffer1RingMode
IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
Sets the receive buffer1 of the receive descriptor along with its size.
Definition: IfxEth.h:1579
IfxEth_getRxDataLength
IFX_INLINE uint16 IfxEth_getRxDataLength(IfxEth *eth)
Returns length of the oldest available RX data.
Definition: IfxEth.h:1416
IfxEth::rxCount
uint32 rxCount
Number of frames received.
Definition: IfxEth.h:444
IfxEth_freeReceiveBuffer
IFX_EXTERN void IfxEth_freeReceiveBuffer(IfxEth *eth)
Free the receive buffer, enabling it for the further reception.
Definition: IfxEth.c:67
IfxEth_AltTxDescr0_Bits::FF
uint32 FF
Frame Flushed.
Definition: IfxEth.h:206
IfxEth_ReceiveProcessState_waiting
Running: Waiting for receive packet.
Definition: IfxEth.h:116
IfxEth_getActualRxIndex
IFX_INLINE uint32 IfxEth_getActualRxIndex(IfxEth *eth)
Definition: IfxEth.h:1371
IfxEth_Config::phyLink
boolean(* phyLink)(void)
Pointer to the transceiver link function.
Definition: IfxEth.h:422
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxEth_wakeupTransmitter
IFX_EXTERN void IfxEth_wakeupTransmitter(IfxEth *eth)
Wakeup the transmitter functions.
Definition: IfxEth.c:894
IfxEth_TxDescr0
Union for TX descriptor DWORD 0.
Definition: IfxEth.h:271
IfxEth_TxDescr1
Union for TX descriptor DWORD 1.
Definition: IfxEth.h:279
IfxEth_TxDescr2
Union for TX descriptor DWORD 2.
Definition: IfxEth.h:287
IfxEth_TxDescr3
Union for TX descriptor DWORD 3.
Definition: IfxEth.h:294
IfxEth_RmiiPins
Port pins for RMII mode configuration.
Definition: IfxEth.h:383
IfxEth_RingModeRxBuffersConfig::rxBuffer2Size
uint16 rxBuffer2Size
Size of Rx Buffer 2.
Definition: IfxEth.h:311
IfxEth_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider.
Definition: IfxEth.h:427
IfxEth_AltRxDescr0_Bits::FS
uint32 FS
First Descriptor.
Definition: IfxEth.h:167
IfxEth::config
IfxEth_Config config
Copy of the configuration passed through IfxEth_init()
Definition: IfxEth.h:452
IfxEth_TxDescr_setup
IFX_INLINE void IfxEth_TxDescr_setup(IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
Setup some properties of a TX descriptor.
Definition: IfxEth.h:1249
IfxEth_initTransmitDescriptorsRingMode
IFX_EXTERN void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
Initialises transmit descriptors.
Definition: IfxEth.c:438
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxEth_isRxDataAvailable
IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth)
Checks whether one or more RX data is available.
Definition: IfxEth.h:1500
IfxEth_RingModeTxBuffersConfig::txBuffer2StartAddress
uint32 txBuffer2StartAddress
Start address of Tx Buffer 2.
Definition: IfxEth.h:320
IfxEth::isrRxCount
sint32 isrRxCount
Count of RX ISR.
Definition: IfxEth.h:447
IfxEth_Crs_In
CRS pin mapping structure.
Definition: IfxEth_PinMap.h:39
IfxEth_initReceiveDescriptors
IFX_EXTERN void IfxEth_initReceiveDescriptors(IfxEth *eth)
Initialises the receive descriptors.
Definition: IfxEth.c:284
IfxEth_RingModeBufferUsed_buffer2
Buffer 2 used.
Definition: IfxEth.h:128
IfxEth_AltRxDescr0_Bits::FL
uint32 FL
Frame Length.
Definition: IfxEth.h:174
IfxEth_stopTransmitter
IFX_EXTERN void IfxEth_stopTransmitter(IfxEth *eth)
Stop the transmitter functions.
Definition: IfxEth.c:867
IfxEth_TransmitProcessState
IfxEth_TransmitProcessState
indicates the Transmit DMA FSM state
Definition: IfxEth.h:134
IfxEth_TxDescrList
Definition: IfxEth.h:406
IfxEth_Config::phyInterfaceMode
IfxEth_PhyInterfaceMode phyInterfaceMode
Phy Interface mode.
Definition: IfxEth.h:423
IfxEth_setSubSecondIncrementValue
IFX_INLINE void IfxEth_setSubSecondIncrementValue(IfxEth *eth, uint8 value)
Sets the Sub Second Increment Value.
Definition: IfxEth.h:1606
IfxEth_getTimeStampInitialiseStatus
IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus(IfxEth *eth)
returns the status of the TimeStamp Initialisation
Definition: IfxEth.h:1436
IfxEth_RmiiPins::crsDiv
IfxEth_Crsdv_In * crsDiv
pointer to CRSDIV input pin config
Definition: IfxEth.h:385
IfxEth_ChecksumMode_ipv4
Definition: IfxEth.h:90
IfxEth_RxDescr::RDES2
IfxEth_RxDescr2 RDES2
RX descriptor DWORD 2.
Definition: IfxEth.h:331
IfxEth_clearMacConfiguration
IFX_INLINE void IfxEth_clearMacConfiguration(void)
resets Ethernet Configuration register
Definition: IfxEth.h:1275
IfxEth_ChecksumMode_tcpUdpIcmpFull
Definition: IfxEth.h:92
IfxEth_shuffleRxDescriptor
IFX_EXTERN void IfxEth_shuffleRxDescriptor(IfxEth *eth)
Shuffle to next RX descriptor.
Definition: IfxEth.c:802
IfxEth_AltTxDescr1_Bits::resv2
uint32 resv2
(reserved)
Definition: IfxEth.h:232


iLLD_TC26B: IfxEth_Phy_Pef7071.c Source File

  • Eth
  • Phy_Pef7071
IfxEth_Phy_Pef7071.c
Go to the documentation of this file.
1 /**
2 * \file IfxEth_Phy_Pef7071.c
3 * \brief ETH PHY_PEF7071 details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxEth_Phy_Pef7071.h"
30
31 /******************************************************************************/
32 /*----------------------------------Macros------------------------------------*/
33 /******************************************************************************/
34
35 #define IFXETH_PHY_PEF7071_MDIO_CTRL 0x00
36
37 #define IFXETH_PHY_PEF7071_MDIO_STAT 0x01
38
39 #define IFXETH_PHY_PEF7071_MDIO_PHYID1 0x02
40
41 #define IFXETH_PHY_PEF7071_MDIO_PHYID2 0x03
42
43 #define IFXETH_PHY_PEF7071_MDIO_AN_ADV 0x04
44
45 #define IFXETH_PHY_PEF7071_MDIO_AN_LPA 0x05
46
47 #define IFXETH_PHY_PEF7071_MDIO_AN_EXP 0x06
48
49 #define IFXETH_PHY_PEF7071_MDIO_AN_NPTX 0x07
50
51 #define IFXETH_PHY_PEF7071_MDIO_AN_NPRX 0x08
52
53 #define IFXETH_PHY_PEF7071_MDIO_GCTRL 0x09
54
55 #define IFXETH_PHY_PEF7071_MDIO_GSTAT 0x0A
56
57 #define IFXETH_PHY_PEF7071_MDIO_RES11 0x0B
58
59 #define IFXETH_PHY_PEF7071_MDIO_RES12 0x0C
60
61 #define IFXETH_PHY_PEF7071_MDIO_MMDCTRL 0x0D
62
63 #define IFXETH_PHY_PEF7071_MDIO_MMDDATA 0x0E
64
65 #define IFXETH_PHY_PEF7071_MDIO_XSTAT 0x0F
66
67 #define IFXETH_PHY_PEF7071_MDIO_PHYPERF 0x10
68
69 #define IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 0x11
70
71 #define IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 0x12
72
73 #define IFXETH_PHY_PEF7071_MDIO_PHYCTL1 0x13
74
75 #define IFXETH_PHY_PEF7071_MDIO_PHYCTL2 0x14
76
77 #define IFXETH_PHY_PEF7071_MDIO_ERRCNT 0x15
78
79 #define IFXETH_PHY_PEF7071_MDIO_EECTRL 0x16
80
81 #define IFXETH_PHY_PEF7071_MDIO_MIICTRL 0x17
82
83 #define IFXETH_PHY_PEF7071_MDIO_MIISTAT 0x18
84
85 #define IFXETH_PHY_PEF7071_MDIO_IMASK 0x19
86
87 #define IFXETH_PHY_PEF7071_MDIO_ISTAT 0x1A
88
89 #define IFXETH_PHY_PEF7071_MDIO_LED 0x1B
90
91 #define IFXETH_PHY_PEF7071_MDIO_TPGCTRL 0x1C
92
93 #define IFXETH_PHY_PEF7071_MDIO_TPGDATA 0x1D
94
95 #define IFXETH_PHY_PEF7071_MDIO_FWV 0x1E
96
97 #define IFXETH_PHY_PEF7071_MDIO_RES1F 0x1F
98
99 #define IFXETH_PHY_PEF7071_WAIT_GMII_READY() while (ETH_GMII_ADDRESS.B.GB) {}
100
101 /** \brief Access type for indirectly accessing Address Type of MMD register in PHY
102 */
103 #define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR 0x00
104
105 /** \brief Access type for indirectly accessing Data Type of MMD register in PHY
106 */
107 #define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA 0x4000
108
109 /** \brief Access type for indirectly accessing Data Type with post increment of MMD register in PHY
110 */
111 #define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI 0x8000
112
113 /******************************************************************************/
114 /*-----------------------Exported Variables/Constants-------------------------*/
115 /******************************************************************************/
116
117 uint32 IfxEth_Phy_Pef7071_iPhyInitDone = 0;
118
119 /******************************************************************************/
120 /*-------------------------Function Implementations---------------------------*/
121 /******************************************************************************/
122
123 uint32 IfxEth_Phy_Pef7071_init(void)
124 {
125 IFXETH_PHY_PEF7071_WAIT_GMII_READY();
126
127 /* // read once all PHY registers
128 * int i;
129 * for(i = 0; i < 31; i++)
130 * {
131 * uint32 value;
132 * read_mdio_reg(0, i, &value);
133 * } */
134
135 // reset PHY
136 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, 0x8000); // reset
137 uint32 value;
138
139 do
140 {
141 IfxEth_Phy_Pef7071_read_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, &value);
142 } while (value & 0x8000); // wait for reset to finish
143
144 // setup PHY
145 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_MIICTRL, 0xF702); // skew adaptation is needed, RMII mode (10/100MBit)
146 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_GCTRL, 0x0000); // advertise no 1000BASE-T (full/half duplex)
147 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_AN_ADV, 0x0101); // advertise 100BASE-TX full duplex only
148 IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, 0x1200); // enable auto-negotiation, restart auto-negotiation
149
150 // we set our loop mode (RJ45) in side the PHY (PHYCTL1 register) if we will have a loop
151 // if (CONFIG_ETH._loop)
152 // write_mdio_reg (0, 0x13, (0x4 << 13) | 0x1);
153
154 // done
155 IfxEth_Phy_Pef7071_iPhyInitDone = 1;
156
157 return 1;
158 }
159
160
161 boolean IfxEth_Phy_Pef7071_link(void)
162 {
163 boolean linkEstablished = FALSE;
164
165 if (IfxEth_Phy_Pef7071_iPhyInitDone)
166 {
167 uint32 value;
168 IfxEth_Phy_Pef7071_read_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_STAT, &value);
169 linkEstablished = ((value & (1 << 2)) != 0) ? TRUE : FALSE;
170 }
171
172 return linkEstablished;
173 }
174
175
176 void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata)
177 {
178 // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Read, Busy
179 ETH_GMII_ADDRESS.U = (layeraddr << 11) | (regaddr << 6) | (0 << 2) | (0 << 1) | (1 << 0);
180
181 IFXETH_PHY_PEF7071_WAIT_GMII_READY();
182
183 // get data
184 *pdata = ETH_GMII_DATA.U;
185 }
186
187
188 void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data)
189 {
190 // put data
191 ETH_GMII_DATA.U = data;
192
193 // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Write, Busy
194 ETH_GMII_ADDRESS.U = (layeraddr << 11) | (regaddr << 6) | (0 << 2) | (1 << 1) | (1 << 0);
195
196 IFXETH_PHY_PEF7071_WAIT_GMII_READY();
197 }
198
199
200 void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
201 {
202 /* Select access type as ADDR for MMD access and select the Device address */
203 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR | devaddr);
204 /* Select PHY register for write operation */
205 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, regaddr);
206 /* select the DATA operation and device address */
207 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA | devaddr);
208 /* Write the data */
209 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, data);
210 }
211
212
213 void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
214 {
215 /* Select access type as ADDR for MMD access and select the Device address */
216 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR | devaddr);
217 /* Select PHY register for read operation */
218 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, regaddr);
219 /* select the DATA operation and device address */
220 IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA | devaddr);
221 /* Read the data */
222 IfxEth_Phy_Pef7071_read_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, &data);
223 }
IFXETH_PHY_PEF7071_MDIO_GCTRL
#define IFXETH_PHY_PEF7071_MDIO_GCTRL
Definition: IfxEth_Phy_Pef7071.c:53
IfxEth_Phy_Pef7071_link
boolean IfxEth_Phy_Pef7071_link(void)
Definition: IfxEth_Phy_Pef7071.c:161
IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA
#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA
Access type for indirectly accessing Data Type of MMD register in PHY.
Definition: IfxEth_Phy_Pef7071.c:107
IfxEth_Phy_Pef7071.h
ETH PHY_PEF7071 details.
IfxEth_Phy_Pef7071_iPhyInitDone
uint32 IfxEth_Phy_Pef7071_iPhyInitDone
Definition: IfxEth_Phy_Pef7071.c:117
IFXETH_PHY_PEF7071_MDIO_MMDDATA
#define IFXETH_PHY_PEF7071_MDIO_MMDDATA
Definition: IfxEth_Phy_Pef7071.c:63
uint32
unsigned long uint32
Definition: Platform_Types.h:113
FALSE
#define FALSE
Definition: Platform_Types.h:90
IFXETH_PHY_PEF7071_MDIO_MIICTRL
#define IFXETH_PHY_PEF7071_MDIO_MIICTRL
Definition: IfxEth_Phy_Pef7071.c:81
IfxEth_Phy_Pef7071_write_mdio_reg
void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data)
Definition: IfxEth_Phy_Pef7071.c:188
IFXETH_PHY_PEF7071_MDIO_MMDCTRL
#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL
Definition: IfxEth_Phy_Pef7071.c:61
IfxEth_Phy_Pef7071_read_mmd_indirect
void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY.
Definition: IfxEth_Phy_Pef7071.c:213
IfxEth_Phy_Pef7071_write_mmd_indirect
void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY.
Definition: IfxEth_Phy_Pef7071.c:200
IFXETH_PHY_PEF7071_MDIO_STAT
#define IFXETH_PHY_PEF7071_MDIO_STAT
Definition: IfxEth_Phy_Pef7071.c:37
IFXETH_PHY_PEF7071_MDIO_CTRL
#define IFXETH_PHY_PEF7071_MDIO_CTRL
Definition: IfxEth_Phy_Pef7071.c:35
IfxEth_Phy_Pef7071_read_mdio_reg
void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata)
Definition: IfxEth_Phy_Pef7071.c:176
IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR
#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR
Access type for indirectly accessing Address Type of MMD register in PHY.
Definition: IfxEth_Phy_Pef7071.c:103
IfxEth_Phy_Pef7071_init
uint32 IfxEth_Phy_Pef7071_init(void)
Definition: IfxEth_Phy_Pef7071.c:123
TRUE
#define TRUE
Definition: Platform_Types.h:87
IFXETH_PHY_PEF7071_WAIT_GMII_READY
#define IFXETH_PHY_PEF7071_WAIT_GMII_READY()
Definition: IfxEth_Phy_Pef7071.c:99
IFXETH_PHY_PEF7071_MDIO_AN_ADV
#define IFXETH_PHY_PEF7071_MDIO_AN_ADV
Definition: IfxEth_Phy_Pef7071.c:43


iLLD_TC26B: IfxEth_Phy_Pef7071.h Source File

  • Eth
  • Phy_Pef7071
IfxEth_Phy_Pef7071.h
Go to the documentation of this file.
1 /**
2 * \file IfxEth_Phy_Pef7071.h
3 * \brief ETH PHY_PEF7071 details
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Eth_Phy_Pef7071 PHY_PEF7071
25 * \ingroup IfxLld_Eth
26 * \defgroup IfxLld_Eth_Phy_Pef7071_Functions Functions
27 * \ingroup IfxLld_Eth_Phy_Pef7071
28 */
29
30 #ifndef IFXETH_PHY_PEF7071_H
31 #define IFXETH_PHY_PEF7071_H 1
32
33 /******************************************************************************/
34 /*----------------------------------Includes----------------------------------*/
35 /******************************************************************************/
36
37 #include "Eth/Std/IfxEth.h"
38 /** \addtogroup IfxLld_Eth_Phy_Pef7071_Functions
39 * \{ */
40
41 /******************************************************************************/
42 /*-------------------------Global Function Prototypes-------------------------*/
43 /******************************************************************************/
44
45 /**
46 * \return Status
47 */
48 IFX_EXTERN uint32 IfxEth_Phy_Pef7071_init(void);
49
50 /**
51 * \return Link status
52 */
53 IFX_EXTERN boolean IfxEth_Phy_Pef7071_link(void);
54
55 /**
56 * \return None
57 */
58 IFX_EXTERN void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata);
59
60 /**
61 * \return None
62 */
63 IFX_EXTERN void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data);
64
65 /** \brief Write the data into the MMD register of PHY
66 * \param layeraddr physical layer address
67 * \param devaddr Device address in PHY
68 * \param regaddr Register address in PHY
69 * \param data Data to be written
70 * \return None
71 */
72 IFX_EXTERN void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data);
73
74 /** \brief Read data from MMD register of PHY
75 * \param layeraddr physical layer address
76 * \param devaddr Device address in PHY
77 * \param regaddr Register address in PHY
78 * \param data Data from PHY register
79 * \return None
80 */
81 IFX_EXTERN void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data);
82
83 /** \} */
84
85 /******************************************************************************/
86 /*-------------------Global Exported Variables/Constants----------------------*/
87 /******************************************************************************/
88
89 IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone;
90
91 #endif /* IFXETH_PHY_PEF7071_H */
IfxEth_Phy_Pef7071_link
IFX_EXTERN boolean IfxEth_Phy_Pef7071_link(void)
Definition: IfxEth_Phy_Pef7071.c:161
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxEth_Phy_Pef7071_iPhyInitDone
IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone
Definition: IfxEth_Phy_Pef7071.h:89
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxEth_Phy_Pef7071_write_mdio_reg
IFX_EXTERN void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data)
Definition: IfxEth_Phy_Pef7071.c:188
IfxEth_Phy_Pef7071_read_mmd_indirect
IFX_EXTERN void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Read data from MMD register of PHY.
Definition: IfxEth_Phy_Pef7071.c:213
IfxEth_Phy_Pef7071_write_mmd_indirect
IFX_EXTERN void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
Write the data into the MMD register of PHY.
Definition: IfxEth_Phy_Pef7071.c:200
IfxEth.h
ETH basic functionality.
IfxEth_Phy_Pef7071_read_mdio_reg
IFX_EXTERN void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata)
Definition: IfxEth_Phy_Pef7071.c:176
IfxEth_Phy_Pef7071_init
IFX_EXTERN uint32 IfxEth_Phy_Pef7071_init(void)
Definition: IfxEth_Phy_Pef7071.c:123


iLLD_TC26B: IfxEth_PinMap.c Source File

  • _PinMap
IfxEth_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxEth_PinMap.c
3 * \brief ETH I/O map
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxEth_PinMap.h"
27
28 IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN = {&MODULE_ETH, {&MODULE_P11,11}, Ifx_RxSel_a};
29 IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT = {&MODULE_ETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6};
30 IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT = {&MODULE_ETH, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt6};
31 IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT = {&MODULE_ETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5};
32 IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT = {&MODULE_ETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_alt1};
33 IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT = {&MODULE_ETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_alt1};
34 IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT = {&MODULE_ETH, {&MODULE_P21, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
35 IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a};
36 IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a};
37 IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN = {&MODULE_ETH, {&MODULE_P11,10}, Ifx_RxSel_a};
38 IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN = {&MODULE_ETH, {&MODULE_P11, 9}, Ifx_RxSel_a};
39 IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN = {&MODULE_ETH, {&MODULE_P21, 7}, Ifx_RxSel_b};
40 IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_b};
41 IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT = {&MODULE_ETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6};
42 IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT = {&MODULE_ETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6};
43 IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT = {&MODULE_ETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6};
44
45
46 const IfxEth_Crsdv_In *IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS] = {
47 {
48 &IfxEth_CRSDVA_P11_11_IN
49 }
50 };
51
52 const IfxEth_Mdc_Out *IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS] = {
53 {
54 &IfxEth_MDC_P02_8_OUT,
55 &IfxEth_MDC_P21_0_OUT,
56 &IfxEth_MDC_P21_2_OUT
57 }
58 };
59
60 const IfxEth_Mdio_InOut *IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS] = {
61 {
62 NULL_PTR,
63 &IfxEth_MDIOA_P00_0_INOUT,
64 NULL_PTR,
65 NULL_PTR,
66 NULL_PTR,
67 NULL_PTR,
68 &IfxEth_MDIO_P21_1_INOUT
69 }
70 };
71
72 const IfxEth_Refclk_In *IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS] = {
73 {
74 &IfxEth_REFCLK_P11_12_IN
75 }
76 };
77
78 const IfxEth_Rxclk_In *IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS] = {
79 {
80 &IfxEth_RXCLKA_P11_12_IN
81 }
82 };
83
84 const IfxEth_Rxd_In *IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS] = {
85 {
86 &IfxEth_RXD1_P11_9_IN
87 }
88 };
89
90 const IfxEth_Rxer_In *IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS] = {
91 {
92 NULL_PTR,
93 &IfxEth_RXERB_P21_7_IN
94 }
95 };
96
97 const IfxEth_Txclk_In *IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS] = {
98 {
99 NULL_PTR,
100 &IfxEth_TXCLKB_P11_12_IN
101 }
102 };
103
104 const IfxEth_Txd_Out *IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS] = {
105 {
106 &IfxEth_TXD1_P11_2_OUT,
107 &IfxEth_TXD0_P11_3_OUT
108 }
109 };
110
111 const IfxEth_Txen_Out *IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS] = {
112 {
113 &IfxEth_TXEN_P11_6_OUT
114 }
115 };
IfxEth_Txd_Out
TXD pin mapping structure.
Definition: IfxEth_PinMap.h:120
IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:174
IfxEth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:71
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxEth_Rxd_In_pinTable
const IfxEth_Rxd_In * IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:84
IfxEth_MDC_P21_0_OUT
IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
Definition: IfxEth_PinMap.c:30
IfxEth_Mdio_InOut_pinTable
const IfxEth_Mdio_InOut * IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
Definition: IfxEth_PinMap.c:60
IfxEth_CRSDVA_P11_11_IN
IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
Definition: IfxEth_PinMap.c:28
IfxEth_RXD1_P11_9_IN
IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
Definition: IfxEth_PinMap.c:38
IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS
#define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:170
IfxEth_MDIOD_P21_3_INOUT
IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT
Definition: IfxEth_PinMap.c:33
IfxEth_RXCLKA_P11_12_IN
IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
Definition: IfxEth_PinMap.c:36
IfxEth_Rxer_In
RXER pin mapping structure.
Definition: IfxEth_PinMap.h:144
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IFXETH_PINMAP_RXD_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:175
IfxEth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxEth_PinMap.h:111
IfxEth_Txd_Out_pinTable
const IfxEth_Txd_Out * IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxEth_PinMap.c:104
IfxEth_Refclk_In_pinTable
const IfxEth_Refclk_In * IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:72
IfxEth_Txen_Out
TXEN pin mapping structure.
Definition: IfxEth_PinMap.h:128
IfxEth_MDC_P02_8_OUT
IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
Definition: IfxEth_PinMap.c:29
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:179
IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:177
IfxEth_TXD0_P11_3_OUT
IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
Definition: IfxEth_PinMap.c:41
IfxEth_PinMap.h
ETH I/O map.
IfxEth_RXERB_P21_7_IN
IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
Definition: IfxEth_PinMap.c:39
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IFXETH_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:178
IfxEth_Mdc_Out_pinTable
const IfxEth_Mdc_Out * IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
Definition: IfxEth_PinMap.c:52
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:103
IfxEth_Rxd_In
RXD pin mapping structure.
Definition: IfxEth_PinMap.h:87
IfxEth_RXD0_P11_10_IN
IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN
Definition: IfxEth_PinMap.c:37
IfxEth_Rxclk_In_pinTable
const IfxEth_Rxclk_In * IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:78
IfxEth_TXCLKB_P11_12_IN
IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
Definition: IfxEth_PinMap.c:40
IfxEth_Crsdv_In_pinTable
const IfxEth_Crsdv_In * IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:46
IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:173
IfxEth_Txclk_In_pinTable
const IfxEth_Txclk_In * IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:97
IFXETH_PINMAP_NUM_MODULES
#define IFXETH_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEth_PinMap.h:169
IfxEth_Mdc_Out
MDC pin mapping structure.
Definition: IfxEth_PinMap.h:103
IfxEth_MDIOA_P00_0_INOUT
IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
Definition: IfxEth_PinMap.c:32
IfxEth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxEth_PinMap.h:47
IfxEth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxEth_PinMap.h:63
IfxEth_Rxer_In_pinTable
const IfxEth_Rxer_In * IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
Definition: IfxEth_PinMap.c:90
IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS
#define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:172
IfxEth_MDIO_P21_1_INOUT
IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
Definition: IfxEth_PinMap.c:34
IfxEth_Txen_Out_pinTable
const IfxEth_Txen_Out * IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
Definition: IfxEth_PinMap.c:111
IfxEth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:79
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxEth_TXD1_P11_2_OUT
IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
Definition: IfxEth_PinMap.c:42
IFXETH_PINMAP_RXER_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXER_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:176
IFXETH_PINMAP_MDC_OUT_NUM_ITEMS
#define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:171
IfxEth_MDC_P21_2_OUT
IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
Definition: IfxEth_PinMap.c:31
IfxEth_REFCLK_P11_12_IN
IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
Definition: IfxEth_PinMap.c:35
IfxEth_TXEN_P11_6_OUT
IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
Definition: IfxEth_PinMap.c:43


iLLD_TC26B: IfxEth_PinMap.h Source File

  • _PinMap
IfxEth_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxEth_PinMap.h
3 * \brief ETH I/O map
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Eth_pinmap ETH Pin Mapping
25 * \ingroup IfxLld_Eth
26 */
27
28 #ifndef IFXETH_PINMAP_H
29 #define IFXETH_PINMAP_H
30
31 #include <IfxEth_reg.h>
32 #include <_Impl/IfxEth_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Eth_pinmap
36 * \{ */
37
38 /** \brief CRS pin mapping structure */
39 typedef const struct
40 {
41 Ifx_ETH* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel select; /**< \brief Input multiplexer value */
44 } IfxEth_Crs_In;
45
46 /** \brief CRSDV pin mapping structure */
47 typedef const struct
48 {
49 Ifx_ETH* module; /**< \brief Base address */
50 IfxPort_Pin pin; /**< \brief Port pin */
51 Ifx_RxSel select; /**< \brief Input multiplexer value */
52 } IfxEth_Crsdv_In;
53
54 /** \brief RXDV pin mapping structure */
55 typedef const struct
56 {
57 Ifx_ETH* module; /**< \brief Base address */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 Ifx_RxSel select; /**< \brief Input multiplexer value */
60 } IfxEth_Rxdv_In;
61
62 /** \brief REFCLK pin mapping structure */
63 typedef const struct
64 {
65 Ifx_ETH* module; /**< \brief Base address */
66 IfxPort_Pin pin; /**< \brief Port pin */
67 Ifx_RxSel select; /**< \brief Input multiplexer value */
68 } IfxEth_Refclk_In;
69
70 /** \brief RXCLK pin mapping structure */
71 typedef const struct
72 {
73 Ifx_ETH* module; /**< \brief Base address */
74 IfxPort_Pin pin; /**< \brief Port pin */
75 Ifx_RxSel select; /**< \brief Input multiplexer value */
76 } IfxEth_Rxclk_In;
77
78 /** \brief TXCLK pin mapping structure */
79 typedef const struct
80 {
81 Ifx_ETH* module; /**< \brief Base address */
82 IfxPort_Pin pin; /**< \brief Port pin */
83 Ifx_RxSel select; /**< \brief Input multiplexer value */
84 } IfxEth_Txclk_In;
85
86 /** \brief RXD pin mapping structure */
87 typedef const struct
88 {
89 Ifx_ETH* module; /**< \brief Base address */
90 IfxPort_Pin pin; /**< \brief Port pin */
91 Ifx_RxSel select; /**< \brief Input multiplexer value */
92 } IfxEth_Rxd_In;
93
94 /** \brief COL pin mapping structure */
95 typedef const struct
96 {
97 Ifx_ETH* module; /**< \brief Base address */
98 IfxPort_Pin pin; /**< \brief Port pin */
99 Ifx_RxSel select; /**< \brief Input multiplexer value */
100 } IfxEth_Col_In;
101
102 /** \brief MDC pin mapping structure */
103 typedef const struct
104 {
105 Ifx_ETH* module; /**< \brief Base address */
106 IfxPort_Pin pin; /**< \brief Port pin */
107 IfxPort_OutputIdx select; /**< \brief Port control code */
108 } IfxEth_Mdc_Out;
109
110 /** \brief MDIO pin mapping structure */
111 typedef const struct
112 {
113 Ifx_ETH* module; /**< \brief Base address */
114 IfxPort_Pin pin; /**< \brief Port pin */
115 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
116 IfxPort_OutputIdx outSelect;/**< \brief Port control code */
117 } IfxEth_Mdio_InOut;
118
119 /** \brief TXD pin mapping structure */
120 typedef const struct
121 {
122 Ifx_ETH* module; /**< \brief Base address */
123 IfxPort_Pin pin; /**< \brief Port pin */
124 IfxPort_OutputIdx select; /**< \brief Port control code */
125 } IfxEth_Txd_Out;
126
127 /** \brief TXEN pin mapping structure */
128 typedef const struct
129 {
130 Ifx_ETH* module; /**< \brief Base address */
131 IfxPort_Pin pin; /**< \brief Port pin */
132 IfxPort_OutputIdx select; /**< \brief Port control code */
133 } IfxEth_Txen_Out;
134
135 /** \brief TXER pin mapping structure */
136 typedef const struct
137 {
138 Ifx_ETH* module; /**< \brief Base address */
139 IfxPort_Pin pin; /**< \brief Port pin */
140 IfxPort_OutputIdx select; /**< \brief Port control code */
141 } IfxEth_Txer_Out;
142
143 /** \brief RXER pin mapping structure */
144 typedef const struct
145 {
146 Ifx_ETH* module; /**< \brief Base address */
147 IfxPort_Pin pin; /**< \brief Port pin */
148 Ifx_RxSel select; /**< \brief Input multiplexer value */
149 } IfxEth_Rxer_In;
150
151 IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN; /**< \brief ETH_CRSDVA: ETH input */
152 IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT; /**< \brief ETH_MDC: ETH output */
153 IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT; /**< \brief ETH_MDC: ETH output */
154 IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT; /**< \brief ETH_MDC: ETH output */
155 IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT; /**< \brief ETH_MDIOA: ETH input/output */
156 IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT; /**< \brief ETH_MDIOD: ETH input/output */
157 IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT; /**< \brief ETH_MDIO: ETH output (Not for production purposes) */
158 IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN; /**< \brief ETH_REFCLK: ETH input */
159 IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN; /**< \brief ETH_RXCLKA: ETH input (Not for productive purposes) */
160 IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN; /**< \brief ETH_RXD0: ETH input */
161 IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN; /**< \brief ETH_RXD1: ETH input */
162 IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN; /**< \brief ETH_RXERB: ETH input */
163 IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN; /**< \brief ETH_TXCLKB: ETH input (Not for productive purposes) */
164 IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT; /**< \brief ETH_TXD0: ETH output */
165 IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT; /**< \brief ETH_TXD1: ETH output */
166 IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT; /**< \brief ETH_TXEN: ETH output */
167
168 /** \brief Table dimensions */
169 #define IFXETH_PINMAP_NUM_MODULES 1
170 #define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1
171 #define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3
172 #define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7
173 #define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
174 #define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1
175 #define IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1
176 #define IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2
177 #define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
178 #define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2
179 #define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1
180
181
182 /** \brief IfxEth_Crsdv_In table */
183 IFX_EXTERN const IfxEth_Crsdv_In *IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS];
184
185 /** \brief IfxEth_Mdc_Out table */
186 IFX_EXTERN const IfxEth_Mdc_Out *IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS];
187
188 /** \brief IfxEth_Mdio_InOut table */
189 IFX_EXTERN const IfxEth_Mdio_InOut *IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS];
190
191 /** \brief IfxEth_Refclk_In table */
192 IFX_EXTERN const IfxEth_Refclk_In *IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS];
193
194 /** \brief IfxEth_Rxclk_In table */
195 IFX_EXTERN const IfxEth_Rxclk_In *IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS];
196
197 /** \brief IfxEth_Rxd_In table */
198 IFX_EXTERN const IfxEth_Rxd_In *IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS];
199
200 /** \brief IfxEth_Rxer_In table */
201 IFX_EXTERN const IfxEth_Rxer_In *IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS];
202
203 /** \brief IfxEth_Txclk_In table */
204 IFX_EXTERN const IfxEth_Txclk_In *IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS];
205
206 /** \brief IfxEth_Txd_Out table */
207 IFX_EXTERN const IfxEth_Txd_Out *IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS];
208
209 /** \brief IfxEth_Txen_Out table */
210 IFX_EXTERN const IfxEth_Txen_Out *IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS];
211
212 /** \} */
213
214 #endif /* IFXETH_PINMAP_H */
IfxEth_Txd_Out
TXD pin mapping structure.
Definition: IfxEth_PinMap.h:120
IfxEth_RXD1_P11_9_IN
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN
ETH_RXD1: ETH input.
Definition: IfxEth_PinMap.h:161
IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:174
IfxEth_Rxclk_In
RXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:71
IfxEth_Crsdv_In_pinTable
IFX_EXTERN const IfxEth_Crsdv_In * IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS]
IfxEth_Crsdv_In table.
Definition: IfxEth_PinMap.h:183
IfxEth_Txer_Out
TXER pin mapping structure.
Definition: IfxEth_PinMap.h:136
IfxEth_RXCLKA_P11_12_IN
IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN
ETH_RXCLKA: ETH input (Not for productive purposes)
Definition: IfxEth_PinMap.h:159
IfxEth_RXERB_P21_7_IN
IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN
ETH_RXERB: ETH input.
Definition: IfxEth_PinMap.h:162
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxEth_MDIO_P21_1_INOUT
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT
ETH_MDIO: ETH output (Not for production purposes)
Definition: IfxEth_PinMap.h:157
IfxEth_Txd_Out_pinTable
IFX_EXTERN const IfxEth_Txd_Out * IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS]
IfxEth_Txd_Out table.
Definition: IfxEth_PinMap.h:207
IfxEth_Mdio_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxEth_PinMap.h:116
IfxEth_MDC_P21_2_OUT
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT
ETH_MDC: ETH output.
Definition: IfxEth_PinMap.h:154
IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS
#define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:170
IfxEth_Mdc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxEth_PinMap.h:107
IfxEth_Rxer_In
RXER pin mapping structure.
Definition: IfxEth_PinMap.h:144
IFXETH_PINMAP_RXD_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:175
IfxEth_Mdio_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxEth_PinMap.h:115
IfxEth_TXD0_P11_3_OUT
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT
ETH_TXD0: ETH output.
Definition: IfxEth_PinMap.h:164
IfxEth_Mdio_InOut
MDIO pin mapping structure.
Definition: IfxEth_PinMap.h:111
IfxEth_TXCLKB_P11_12_IN
IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN
ETH_TXCLKB: ETH input (Not for productive purposes)
Definition: IfxEth_PinMap.h:163
IfxEth_Rxer_In_pinTable
IFX_EXTERN const IfxEth_Rxer_In * IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS]
IfxEth_Rxer_In table.
Definition: IfxEth_PinMap.h:201
IfxEth_Txen_Out
TXEN pin mapping structure.
Definition: IfxEth_PinMap.h:128
IfxEth_MDC_P02_8_OUT
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT
ETH_MDC: ETH output.
Definition: IfxEth_PinMap.h:152
IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS
#define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:179
IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:177
IfxEth_Col_In
COL pin mapping structure.
Definition: IfxEth_PinMap.h:95
IFXETH_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:178
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxEth_Mdc_Out_pinTable
IFX_EXTERN const IfxEth_Mdc_Out * IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS]
IfxEth_Mdc_Out table.
Definition: IfxEth_PinMap.h:186
IfxEth_TXD1_P11_2_OUT
IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT
ETH_TXD1: ETH output.
Definition: IfxEth_PinMap.h:165
IfxEth_Crs_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxEth_PinMap.h:42
IfxEth_CRSDVA_P11_11_IN
IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN
ETH_CRSDVA: ETH input.
Definition: IfxEth_PinMap.h:151
IfxEth_Crs_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxEth_PinMap.h:43
IfxEth_Rxclk_In_pinTable
IFX_EXTERN const IfxEth_Rxclk_In * IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS]
IfxEth_Rxclk_In table.
Definition: IfxEth_PinMap.h:195
IfxEth_Rxd_In
RXD pin mapping structure.
Definition: IfxEth_PinMap.h:87
IfxEth_RXD0_P11_10_IN
IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN
ETH_RXD0: ETH input.
Definition: IfxEth_PinMap.h:160
IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS
#define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:173
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxEth_cfg.h
ETH on-chip implementation data.
IfxEth_MDIOA_P00_0_INOUT
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT
ETH_MDIOA: ETH input/output.
Definition: IfxEth_PinMap.h:155
IfxEth_REFCLK_P11_12_IN
IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN
ETH_REFCLK: ETH input.
Definition: IfxEth_PinMap.h:158
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxEth_MDC_P21_0_OUT
IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT
ETH_MDC: ETH output.
Definition: IfxEth_PinMap.h:153
IFXETH_PINMAP_NUM_MODULES
#define IFXETH_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxEth_PinMap.h:169
IfxEth_Mdc_Out
MDC pin mapping structure.
Definition: IfxEth_PinMap.h:103
IfxEth_Refclk_In_pinTable
IFX_EXTERN const IfxEth_Refclk_In * IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS]
IfxEth_Refclk_In table.
Definition: IfxEth_PinMap.h:192
IfxEth_TXEN_P11_6_OUT
IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT
ETH_TXEN: ETH output.
Definition: IfxEth_PinMap.h:166
IfxEth_Crsdv_In
CRSDV pin mapping structure.
Definition: IfxEth_PinMap.h:47
IfxEth_Mdio_InOut_pinTable
IFX_EXTERN const IfxEth_Mdio_InOut * IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS]
IfxEth_Mdio_InOut table.
Definition: IfxEth_PinMap.h:189
IfxEth_Refclk_In
REFCLK pin mapping structure.
Definition: IfxEth_PinMap.h:63
IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS
#define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:172
IfxEth_MDIOD_P21_3_INOUT
IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT
ETH_MDIOD: ETH input/output.
Definition: IfxEth_PinMap.h:156
IfxEth_Rxdv_In
RXDV pin mapping structure.
Definition: IfxEth_PinMap.h:55
IfxEth_Txclk_In_pinTable
IFX_EXTERN const IfxEth_Txclk_In * IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS]
IfxEth_Txclk_In table.
Definition: IfxEth_PinMap.h:204
IfxEth_Txclk_In
TXCLK pin mapping structure.
Definition: IfxEth_PinMap.h:79
IfxEth_Rxd_In_pinTable
IFX_EXTERN const IfxEth_Rxd_In * IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS]
IfxEth_Rxd_In table.
Definition: IfxEth_PinMap.h:198
IFXETH_PINMAP_RXER_IN_NUM_ITEMS
#define IFXETH_PINMAP_RXER_IN_NUM_ITEMS
Definition: IfxEth_PinMap.h:176
IfxEth_Crs_In
CRS pin mapping structure.
Definition: IfxEth_PinMap.h:39
IFXETH_PINMAP_MDC_OUT_NUM_ITEMS
#define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS
Definition: IfxEth_PinMap.h:171
IfxEth_Crs_In::module
Ifx_ETH * module
Base address.
Definition: IfxEth_PinMap.h:41
IfxEth_Txen_Out_pinTable
IFX_EXTERN const IfxEth_Txen_Out * IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS]
IfxEth_Txen_Out table.
Definition: IfxEth_PinMap.h:210
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxEth_cfg.h Source File

  • _Impl
IfxEth_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxEth_cfg.h
3 * \brief ETH on-chip implementation data
4 * \ingroup IfxLld_Eth
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Eth ETH
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Eth_Impl Implementation
27 * \ingroup IfxLld_Eth
28 * \defgroup IfxLld_Eth_Std Standard Driver
29 * \ingroup IfxLld_Eth
30 */
31
32 #ifndef IFXETH_CFG_H
33 #define IFXETH_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 /******************************************************************************/
40 /*-----------------------------------Macros-----------------------------------*/
41 /******************************************************************************/
42
43 #define IFXETH_MAX_TIMEOUT_VALUE 1000
44
45 #define IFXETH_NUM_MODULES (1)
46
47 #endif /* IFXETH_CFG_H */


iLLD_TC26B: IfxFce.c Source File

  • Fce
  • Std
IfxFce.c
Go to the documentation of this file.
1 /**
2 * \file IfxFce.c
3 * \brief FCE basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxFce.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
37 {
38 Ifx_FCE_STS interruptStatus;
39 interruptStatus.U = fce->IN2.STS.U;
40 return interruptStatus;
41 }
42
43
44 Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
45 {
46 Ifx_FCE_STS interruptStatus;
47
48 if (crc32Kernel == IfxFce_Crc32Kernel_0)
49 {
50 interruptStatus.U = fce->IN0.STS.U;
51 }
52 else
53 {
54 interruptStatus.U = fce->IN1.STS.U;
55 }
56
57 return interruptStatus;
58 }
59
60
61 Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
62 {
63 Ifx_FCE_STS interruptStatus;
64 interruptStatus.U = fce->IN3.STS.U;
65 return interruptStatus;
66 }
67
68
69 uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
70 {
71 uint32 ReversedData = 0x0U;
72 uint8 inputDataCounter;
73
74 for (inputDataCounter = 0; inputDataCounter < crcLength; ++inputDataCounter)
75 {
76 if (crcStartValue & 0x01)
77 {
78 ReversedData |= (uint32)((uint32)1 << ((crcLength - 1) - inputDataCounter));
79 }
80
81 crcStartValue = (uint32)((uint32)crcStartValue >> (uint32)1);
82 }
83
84 return ReversedData;
85 }
86
87
88 void IfxFce_resetModule(Ifx_FCE *fce)
89 {
90 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
91
92 IfxScuWdt_clearCpuEndinit(password);
93 fce->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
94 fce->KRST0.B.RST = 1;
95 IfxScuWdt_setCpuEndinit(password);
96
97 while (0 == fce->KRST0.B.RSTSTAT) /* Wait until reset is executed */
98
99 {}
100
101 IfxScuWdt_clearCpuEndinit(password);
102 fce->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
103 IfxScuWdt_setCpuEndinit(password);
104 }
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxFce_getCrc32InterruptStatus
Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status.
Definition: IfxFce.c:44
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxFce_reflectCrc32
uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it.
Definition: IfxFce.c:69
IfxFce_Crc32Kernel_0
Specifies the kernel0 used for CRC-32.
Definition: IfxFce.h:58
IfxFce_Crc32Kernel
IfxFce_Crc32Kernel
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32.
Definition: IfxFce.h:56
IfxFce_resetModule
void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:88
IfxFce_getCrc8InterruptStatus
Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
Gets the CRC-8 interrupt status.
Definition: IfxFce.c:61
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxFce_getCrc16InterruptStatus
Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
Gets the CRC-16 interrupt status.
Definition: IfxFce.c:36
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxFce.h
FCE basic functionality.
uint8
unsigned char uint8
Definition: Platform_Types.h:105


iLLD_TC26B: IfxFce.h Source File

  • Fce
  • Std
IfxFce.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce.h
3 * \brief FCE basic functionality
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Fce_Std_Enum Enumerations
26 * \ingroup IfxLld_Fce_Std
27 * \defgroup IfxLld_Fce_Std_Module Module Functions
28 * \ingroup IfxLld_Fce_Std
29 * \defgroup IfxLld_Fce_Std_Support Support Function
30 * \ingroup IfxLld_Fce_Std
31 * \defgroup IfxLld_Fce_Std_InterruptStatus Interrupt Status Functions
32 * \ingroup IfxLld_Fce_Std
33 */
34
35 #ifndef IFXFCE_H
36 #define IFXFCE_H 1
37
38 /******************************************************************************/
39 /*----------------------------------Includes----------------------------------*/
40 /******************************************************************************/
41
42 #include "_Impl/IfxFce_cfg.h"
43 #include "Cpu/Std/IfxCpu_Intrinsics.h"
44 #include "Scu/Std/IfxScuWdt.h"
45 #include "IfxFce_reg.h"
46 #include "Src/Std/IfxSrc.h"
47
48 /******************************************************************************/
49 /*--------------------------------Enumerations--------------------------------*/
50 /******************************************************************************/
51
52 /** \addtogroup IfxLld_Fce_Std_Enum
53 * \{ */
54 /** \brief Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32
55 */
56 typedef enum
57 {
58 IfxFce_Crc32Kernel_0 = 0, /**< \brief Specifies the kernel0 used for CRC-32 */
59 IfxFce_Crc32Kernel_1 /**< \brief Specifies the kernel1 used for CRC-32 */
60 } IfxFce_Crc32Kernel;
61
62 /** \brief Specifies the CRC mode
63 */
64 typedef enum
65 {
66 IfxFce_CrcMode_8 = 0, /**< \brief Specifies the 8-bit CRC mode */
67 IfxFce_CrcMode_16 = 1, /**< \brief Specifies the 16-bit CRC mode */
68 IfxFce_CrcMode_32 = 2 /**< \brief Specifies the 32-bit CRC mode */
69 } IfxFce_CrcMode;
70
71 /** \} */
72
73 /** \addtogroup IfxLld_Fce_Std_Module
74 * \{ */
75
76 /******************************************************************************/
77 /*-------------------------Inline Function Prototypes-------------------------*/
78 /******************************************************************************/
79
80 /** \brief Disable the control of FCE module
81 * \param fce Specifies pointer to FCE module registers
82 * \return None
83 */
84 IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce);
85
86 /** \brief Enable the control of FCE module
87 * \param fce Specifies pointer to FCE module registers
88 * \return None
89 */
90 IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce);
91
92 /******************************************************************************/
93 /*-------------------------Global Function Prototypes-------------------------*/
94 /******************************************************************************/
95
96 /** \brief Reset the module by clearing the kernel
97 * \param fce Specifies pointer to FCE module registers
98 * \return None
99 */
100 IFX_EXTERN void IfxFce_resetModule(Ifx_FCE *fce);
101
102 /** \} */
103
104 /** \addtogroup IfxLld_Fce_Std_Support
105 * \{ */
106
107 /******************************************************************************/
108 /*-------------------------Global Function Prototypes-------------------------*/
109 /******************************************************************************/
110
111 /** \brief Reflects the CRC data and returns it
112 * \param crcStartValue start value for reflection
113 * \param crcLength length of reflected value
114 * \return Reflected CRC data
115 */
116 IFX_EXTERN uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength);
117
118 /** \} */
119
120 /** \addtogroup IfxLld_Fce_Std_InterruptStatus
121 * \{ */
122
123 /******************************************************************************/
124 /*-------------------------Inline Function Prototypes-------------------------*/
125 /******************************************************************************/
126
127 /** \brief Clears the CRC-16 error flags
128 * \param fce Specifies pointer to FCE module registers
129 * \return None
130 */
131 IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce);
132
133 /** \brief Clears the CRC-32 error flags
134 * \param fce Specifies pointer to FCE module registers
135 * \param crc32Kernel Specifies the kernel used for CRC-32
136 * \return None
137 */
138 IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel);
139
140 /** \brief Clears the CRC-8 error flags
141 * \param fce Specifies pointer to FCE module registers
142 * \return None
143 */
144 IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce);
145
146 /** \brief Returns the SRC pointer for FCE
147 * \param fce Specifies pointer to FCE module registers
148 */
149 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFce_getSrcPointer(Ifx_FCE *fce);
150
151 /******************************************************************************/
152 /*-------------------------Global Function Prototypes-------------------------*/
153 /******************************************************************************/
154
155 /** \brief Gets the CRC-16 interrupt status
156 * \param fce Specifies pointer to FCE module registers
157 * \return Current CRC-16 interrupt status
158 */
159 IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce);
160
161 /** \brief Gets the CRC-32 interrupt status
162 * \param fce Specifies pointer to FCE module registers
163 * \param crc32Kernel Specifies the kernel used for CRC-32
164 * \return Current CRC-32 interrupt status
165 */
166 IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel);
167
168 /** \brief Gets the CRC-8 interrupt status
169 * \param fce Specifies pointer to FCE module registers
170 * \return Current CRC-8 interrupt status
171 */
172 IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce);
173
174 /** \} */
175
176 /******************************************************************************/
177 /*---------------------Inline Function Implementations------------------------*/
178 /******************************************************************************/
179
180 IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce)
181 {
182 fce->IN2.STS.U = 0x0000000fU;
183 }
184
185
186 IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
187 {
188 if (crc32Kernel == IfxFce_Crc32Kernel_0)
189 {
190 fce->IN0.STS.U = 0x0000000fU;
191 }
192 else
193 {
194 fce->IN1.STS.U = 0x0000000fU;
195 }
196 }
197
198
199 IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce)
200 {
201 fce->IN3.STS.U = 0x0000000fU;
202 }
203
204
205 IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce)
206 {
207 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
208 IfxScuWdt_clearCpuEndinit(password);
209 fce->CLC.B.DISR = 1;
210 IfxScuWdt_setCpuEndinit(password);
211 }
212
213
214 IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
215 {
216 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
217 IfxScuWdt_clearCpuEndinit(password);
218 fce->CLC.B.DISR = 0;
219 IfxScuWdt_setCpuEndinit(password);
220 }
221
222
223 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFce_getSrcPointer(Ifx_FCE *fce)
224 {
225 IFX_UNUSED_PARAMETER(fce);
226 return &SRC_FCE;
227 }
228
229
230 #endif /* IFXFCE_H */
IfxFce_enableModule
IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
Enable the control of FCE module.
Definition: IfxFce.h:214
IfxFce_disableModule
IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce)
Disable the control of FCE module.
Definition: IfxFce.h:205
IfxFce_Crc32Kernel_1
Specifies the kernel1 used for CRC-32.
Definition: IfxFce.h:59
IfxFce_CrcMode
IfxFce_CrcMode
Specifies the CRC mode.
Definition: IfxFce.h:64
IfxFce_CrcMode_32
Specifies the 32-bit CRC mode.
Definition: IfxFce.h:68
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxFce_CrcMode_8
Specifies the 8-bit CRC mode.
Definition: IfxFce.h:66
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxFce_clearCrc8ErrorFlags
IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce)
Clears the CRC-8 error flags.
Definition: IfxFce.h:199
IfxFce_getCrc32InterruptStatus
IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status.
Definition: IfxFce.c:44
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxFce_reflectCrc32
IFX_EXTERN uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
Reflects the CRC data and returns it.
Definition: IfxFce.c:69
IfxFce_Crc32Kernel_0
Specifies the kernel0 used for CRC-32.
Definition: IfxFce.h:58
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxFce_clearCrc32ErrorFlags
IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Clears the CRC-32 error flags.
Definition: IfxFce.h:186
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxFce_CrcMode_16
Specifies the 16-bit CRC mode.
Definition: IfxFce.h:67
IfxFce_Crc32Kernel
IfxFce_Crc32Kernel
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32.
Definition: IfxFce.h:56
IfxFce_cfg.h
FCE on-chip implementation data.
IfxFce_resetModule
IFX_EXTERN void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:88
IfxFce_getCrc8InterruptStatus
IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
Gets the CRC-8 interrupt status.
Definition: IfxFce.c:61
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxFce_clearCrc16ErrorFlags
IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce)
Clears the CRC-16 error flags.
Definition: IfxFce.h:180
IfxFce_getCrc16InterruptStatus
IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
Gets the CRC-16 interrupt status.
Definition: IfxFce.c:36
IfxFce_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer(Ifx_FCE *fce)
Returns the SRC pointer for FCE.
Definition: IfxFce.h:223
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
uint8
unsigned char uint8
Definition: Platform_Types.h:105


iLLD_TC26B: IfxFce_Crc.c Source File

  • Fce
  • Crc
IfxFce_Crc.c
Go to the documentation of this file.
1 /**
2 * \file IfxFce_Crc.c
3 * \brief FCE CRC details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxFce_Crc.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
37 {
38 Ifx_FCE *fceSFR = fce->fce;
39 uint32 inputDataCounter;
40 uint16 crcResultValue;
41 uint16 *dataPtr = (uint16 *)crcData;
42
43 fceSFR->IN2.CHECK.U = 0xFACECAFE;
44 fceSFR->IN2.LENGTH.U = 0xFACECAFE;
45 fceSFR->IN2.CHECK.U = (uint16)fce->expectedCrc;
46 fceSFR->IN2.LENGTH.U = crcDataLength;
47
48 /*Configure CRC register*/
49 fceSFR->IN2.CRC.U = crcStartValue;
50 {
51 /*Code for CRC-16 calculaion with 0x1021 polynomial*/
52 for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
53 {
54 fceSFR->IN2.IR.U = *(dataPtr++);
55 }
56 }
57
58 crcResultValue = (uint16)fceSFR->IN2.RES.U;
59
60 return crcResultValue;
61 }
62
63
64 uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
65 {
66 Ifx_FCE *fceSFR = fce->fce;
67 uint32 inputDataCounter;
68 uint32 crcResultValue;
69 uint32 *dataPtr = (uint32 *)crcData;
70 volatile uint32 *inPtr;
71
72 /*Crc-32 calculaion with 0x04C11DB7 polynomial*/
73 if (fce->crc32Kernel == IfxFce_Crc32Kernel_0)
74 {
75 fceSFR->IN0.CHECK.U = 0xFACECAFE;
76 fceSFR->IN0.LENGTH.U = 0xFACECAFE;
77 fceSFR->IN0.CHECK.U = fce->expectedCrc;
78 fceSFR->IN0.LENGTH.U = crcDataLength;
79 fceSFR->IN0.CRC.U = crcStartValue;
80
81 inPtr = (volatile uint32 *)&fceSFR->IN0.IR.U;
82 }
83 else
84 {
85 fceSFR->IN1.CHECK.U = 0xFACECAFE;
86 fceSFR->IN1.LENGTH.U = 0xFACECAFE;
87 fceSFR->IN1.CHECK.U = fce->expectedCrc;
88 fceSFR->IN1.LENGTH.U = crcDataLength;
89 fceSFR->IN1.CRC.U = crcStartValue;
90
91 inPtr = (volatile uint32 *)&fceSFR->IN1.IR.U;
92 }
93
94 {
95 for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
96 {
97 *inPtr = *(dataPtr++);
98 }
99 }
100
101 if (fce->crc32Kernel == IfxFce_Crc32Kernel_0)
102 {
103 crcResultValue = fceSFR->IN0.RES.U;
104 }
105 else
106 {
107 crcResultValue = fceSFR->IN1.RES.U;
108 }
109
110 return crcResultValue;
111 }
112
113
114 uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
115 {
116 Ifx_FCE *fceSFR = fce->fce;
117 uint32 inputDataCounter;
118 uint8 crcResultValue;
119 uint8 *dataPtr = (uint8 *)crcData;
120
121 fceSFR->IN3.CHECK.U = 0xFACECAFE;
122 fceSFR->IN3.LENGTH.U = 0xFACECAFE;
123 fceSFR->IN3.CHECK.U = (uint8)fce->expectedCrc;
124 fceSFR->IN3.LENGTH.U = crcDataLength;
125
126 /*Configure CRC register*/
127 fceSFR->IN3.CRC.U = crcStartValue;
128
129 /*Code for CRC-8 calculaion for 0x1D polynomials*/
130 {
131 /* input in INIT register */
132 for (inputDataCounter = 0; inputDataCounter < crcDataLength; ++inputDataCounter)
133 {
134 fceSFR->IN3.IR.U = *(dataPtr++);
135 }
136 }
137 crcResultValue = (uint8)fceSFR->IN3.RES.U;
138
139 return crcResultValue;
140 }
141
142
143 void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
144 {
145 if (fce->crcMode == IfxFce_CrcMode_8)
146 {
147 IfxFce_clearCrc8ErrorFlags(fce->fce);
148 }
149 else if (fce->crcMode == IfxFce_CrcMode_16)
150 {
151 IfxFce_clearCrc16ErrorFlags(fce->fce);
152 }
153 else
154 {
155 IfxFce_clearCrc32ErrorFlags(fce->fce, fce->crc32Kernel);
156 }
157 }
158
159
160 void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
161 {
162 IfxFce_resetModule(fce->fce);
163 }
164
165
166 Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
167 {
168 if (fce->crcMode == IfxFce_CrcMode_8)
169 {
170 return IfxFce_getCrc8InterruptStatus(fce->fce);
171 }
172 else if (fce->crcMode == IfxFce_CrcMode_16)
173 {
174 return IfxFce_getCrc16InterruptStatus(fce->fce);
175 }
176 else
177 {
178 return IfxFce_getCrc32InterruptStatus(fce->fce, fce->crc32Kernel);
179 }
180 }
181
182
183 void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
184 {
185 fceCrc->fce = crcConfig->fce;
186 Ifx_FCE *fceSFR = crcConfig->fce;
187
188 fceCrc->crcMode = crcConfig->crcMode;
189 fceCrc->expectedCrc = crcConfig->expectedCrc;
190
191 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
192 IfxScuWdt_clearCpuEndinit(password);
193
194 Ifx_FCE_CFG tempCFG;
195 tempCFG.U = 0;
196 tempCFG.B.CMI = crcConfig->enabledInterrupts.crcMismatch;
197 tempCFG.B.CEI = crcConfig->enabledInterrupts.configError;
198 tempCFG.B.LEI = crcConfig->enabledInterrupts.lengthError;
199 tempCFG.B.BEI = crcConfig->enabledInterrupts.busError;
200 tempCFG.B.CCE = crcConfig->crcCheckCompared;
201 tempCFG.B.ALR = crcConfig->automaticLengthReload;
202 tempCFG.B.REFIN = crcConfig->dataByteReflectionEnabled;
203 tempCFG.B.REFOUT = crcConfig->crc32BitReflectionEnabled;
204 tempCFG.B.XSEL = crcConfig->crcResultInverted;
205
206 if (crcConfig->crcMode == IfxFce_CrcMode_8)
207 {
208 fceSFR->IN3.CFG.U = tempCFG.U;
209 }
210 else if (crcConfig->crcMode == IfxFce_CrcMode_16)
211 {
212 fceSFR->IN2.CFG.U = tempCFG.U;
213 }
214 else
215 {
216 fceCrc->crc32Kernel = crcConfig->crc32Kernel;
217
218 if (crcConfig->crc32Kernel == IfxFce_Crc32Kernel_0)
219 {
220 fceSFR->IN0.CFG.U = tempCFG.U;
221 }
222 else
223 {
224 fceSFR->IN1.CFG.U = tempCFG.U;
225 }
226 }
227
228 IfxScuWdt_setCpuEndinit(password);
229 }
230
231
232 void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
233 {
234 crcConfig->fce = fce->fce;
235 crcConfig->crcMode = IfxFce_CrcMode_32;
236 crcConfig->crcCheckCompared = TRUE;
237 crcConfig->automaticLengthReload = FALSE;
238 crcConfig->dataByteReflectionEnabled = TRUE;
239 crcConfig->crc32BitReflectionEnabled = TRUE;
240 crcConfig->crcResultInverted = TRUE;
241 crcConfig->enabledInterrupts.crcMismatch = FALSE; // enable if CRC is already known
242 crcConfig->enabledInterrupts.configError = TRUE;
243 crcConfig->enabledInterrupts.lengthError = TRUE;
244 crcConfig->enabledInterrupts.busError = TRUE;
245 }
246
247
248 void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
249 {
250 fce->fce = config->fce;
251 Ifx_FCE *fceSFR = config->fce;
252
253 IfxFce_enableModule(fceSFR);
254
255 volatile Ifx_SRC_SRCR *src = IfxFce_getSrcPointer(fceSFR);
256 IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
257 IfxSrc_enable(src);
258 }
259
260
261 void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
262 {
263 config->fce = fce;
264 config->isrPriority = 0;
265 config->isrTypeOfService = IfxSrc_Tos_cpu0;
266 }
IfxFce_Crc_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxFce_Crc.h:381
IfxFce_enableModule
IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
Enable the control of FCE module.
Definition: IfxFce.h:214
IfxFce_Crc_Crc::fce
Ifx_FCE * fce
Specifies pointer to FCE module registers.
Definition: IfxFce_Crc.h:388
IfxFce_Crc_Crc
Specifies the pointer to FCE module handler.
Definition: IfxFce_Crc.h:386
IfxFce_Crc.h
FCE CRC details.
IfxFce_Crc_calculateCrc32
uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:64
IfxFce_Crc_getInterruptStatus
Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status.
Definition: IfxFce_Crc.c:166
IfxFce_CrcMode_32
Specifies the 32-bit CRC mode.
Definition: IfxFce.h:68
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxFce_CrcMode_8
Specifies the 8-bit CRC mode.
Definition: IfxFce.h:66
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxFce_Crc_Crc::expectedCrc
uint32 expectedCrc
Specifies the expected CRC to be compared with resulted.
Definition: IfxFce_Crc.h:390
IfxFce_Crc_initCrcConfig
void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer.
Definition: IfxFce_Crc.c:232
IfxFce_Crc_EnabledInterrupts::lengthError
boolean lengthError
Specifies enabel/disable of length error interrupt.
Definition: IfxFce_Crc.h:360
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxFce_Crc_initCrc
void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode.
Definition: IfxFce_Crc.c:183
IfxFce_Crc_CrcConfig::automaticLengthReload
boolean automaticLengthReload
Specifies the enable/disable of automatic length reload.
Definition: IfxFce_Crc.h:400
IfxFce_Crc_clearErrorFlags
void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
Clears the error flags.
Definition: IfxFce_Crc.c:143
IfxFce_Crc_calculateCrc8
uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:114
IfxFce_Crc_CrcConfig::dataByteReflectionEnabled
boolean dataByteReflectionEnabled
Specifies enable/disable of input data byte wise reflection.
Definition: IfxFce_Crc.h:401
IfxFce_clearCrc8ErrorFlags
IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce)
Clears the CRC-8 error flags.
Definition: IfxFce.h:199
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxFce_getCrc32InterruptStatus
Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Gets the CRC-32 interrupt status.
Definition: IfxFce.c:44
IfxFce_Crc_CrcConfig::crcResultInverted
boolean crcResultInverted
Specifies the XOR valueto get the final CRC.
Definition: IfxFce_Crc.h:405
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxFce_Crc32Kernel_0
Specifies the kernel0 used for CRC-32.
Definition: IfxFce.h:58
IfxFce_clearCrc32ErrorFlags
IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
Clears the CRC-32 error flags.
Definition: IfxFce.h:186
IfxFce_CrcMode_16
Specifies the 16-bit CRC mode.
Definition: IfxFce.h:67
IfxFce_Crc_CrcConfig::enabledInterrupts
IfxFce_Crc_EnabledInterrupts enabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:407
IfxFce_Crc_Config
Configuration structure of the module.
Definition: IfxFce_Crc.h:377
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxFce_Crc_initModule
void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?.
Definition: IfxFce_Crc.c:248
IfxFce_resetModule
void IfxFce_resetModule(Ifx_FCE *fce)
Reset the module by clearing the kernel.
Definition: IfxFce.c:88
IfxFce_Crc
FCE Module Handle;.
Definition: IfxFce_Crc.h:370
IfxFce_Crc_EnabledInterrupts::configError
boolean configError
Specifies enabel/disable of configuration error interrupt.
Definition: IfxFce_Crc.h:359
IfxFce_getCrc8InterruptStatus
Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
Gets the CRC-8 interrupt status.
Definition: IfxFce.c:61
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxFce_Crc_EnabledInterrupts::busError
boolean busError
Specifies enabel/disable of bus error interrupt.
Definition: IfxFce_Crc.h:361
IfxFce_Crc_deInitModule
void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
Deinitialises the FCE module.
Definition: IfxFce_Crc.c:160
IfxFce_clearCrc16ErrorFlags
IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce)
Clears the CRC-16 error flags.
Definition: IfxFce.h:180
IfxFce_getCrc16InterruptStatus
Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
Gets the CRC-16 interrupt status.
Definition: IfxFce.c:36
IfxFce_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFce_getSrcPointer(Ifx_FCE *fce)
Returns the SRC pointer for FCE.
Definition: IfxFce.h:223
IfxFce_Crc_initModuleConfig
void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values.
Definition: IfxFce_Crc.c:261
IfxFce_Crc_CrcConfig::crcCheckCompared
boolean crcCheckCompared
Specifies whether CRC check comparision is enabled or not.
Definition: IfxFce_Crc.h:399
IfxFce_Crc_CrcConfig::crc32BitReflectionEnabled
boolean crc32BitReflectionEnabled
Specifies enable/disable of CRC 32-bit wise reflection.
Definition: IfxFce_Crc.h:402
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxFce_Crc_Crc::crcMode
IfxFce_CrcMode crcMode
Specifies the CRC mode.
Definition: IfxFce_Crc.h:389
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxFce_Crc_Crc::crc32Kernel
IfxFce_Crc32Kernel crc32Kernel
Specifies the kernel used for CRC-32.
Definition: IfxFce_Crc.h:391
IfxFce_Crc_EnabledInterrupts::crcMismatch
boolean crcMismatch
Specifies enabel/disable of CRC mismatch interrupt.
Definition: IfxFce_Crc.h:358
IfxFce_Crc_calculateCrc16
uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:36
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxFce_Crc_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxFce_Crc.h:380
IfxFce_Crc_CrcConfig
Specifies the module configuration structure.
Definition: IfxFce_Crc.h:396


iLLD_TC26B: IfxFce_Crc.h Source File

  • Fce
  • Crc
IfxFce_Crc.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce_Crc.h
3 * \brief FCE CRC details
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Fce_Crc_Usage How to use the FCE CRC Interface driver?
26 * \ingroup IfxLld_Fce
27 *
28 *
29 *
30 * FCE gives CRC-x(x= 8,16,32) message signatures. Kernel 3 is used for CRC-8,Kernel 2 is used for CRC-16,Kernel 0 1nd Kernel 1 is used for CRC-32.
31 *
32 * In the following sections it will be described, how to integrate the driver into the application framework.
33 *
34 * \section IfxLld_Fce_Fce_Preparation Preparation
35 * \subsection IfxLld_Fce_Fce_Include Include Files
36 *
37 * Include following header file into your C code:
38 *
39 * \code
40 * #include <Fce/Crc/IfxFce_Crc.h>
41 *
42 * \endcode
43 *
44 * \subsection IfxLld_Fce_Crc_Variables Variables
45 *
46 * Declare the FCE and CRC handles as global variable in your C code:
47 * \code
48 * // used globally
49 * static IfxFce_Crc fce;
50 * static IfxFce_Crc_Crc fceCrc32_0;
51 * static IfxFce_Crc_Crc fceCrc32_1;
52 * static IfxFce_Crc_Crc fceCrc16;
53 * static IfxFce_Crc_Crc fceCrc8;
54 * \endcode
55 *
56 * \subsection IfxLld_Fce_Crc_Interrupt Interrupt Handler Installation
57 *
58 * See also \ref IfxLld_Cpu_Irq_Usage
59 *
60 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
61 * \code
62 * // priorities are normally defined in Ifx_IntPrioDef.h
63 * #define IFX_INTPRIO_FCE 1
64 * \endcode
65 *
66 * Add the interrupt service routine to your C code which should do the error flag handling:
67 * \code
68 * IFX_INTERRUPT(fceISR, 0, IFX_INTPRIO_FCE)
69 * {
70 * {
71 * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_0);
72 * if (interruptStatus.U )
73 * {
74 * if ( interruptStatus.B.CMF == 1)
75 * {
76 * // CRC Mismatch Error...!
77 * }
78 * if( interruptStatus.B.CEF == 1)
79 * {
80 * // Configuration Error...!
81 * }
82 * if ( interruptStatus.B.LEF == 1)
83 * {
84 * // Length Error...!
85 * }
86 * if ( interruptStatus.B.BEF == 1)
87 * {
88 * // Bus Error...!
89 * }
90 * }
91 * IfxFce_Crc_clearErrorFlags(&fceCrc32_0);
92 * }
93 *
94 * {
95 * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_1);
96 * if (interruptStatus.U )
97 * {
98 * if ( interruptStatus.B.CMF == 1)
99 * {
100 * // CRC Mismatch Error...!
101 * }
102 * if( interruptStatus.B.CEF == 1)
103 * {
104 * // Configuration Error...!
105 * }
106 * if ( interruptStatus.B.LEF == 1)
107 * {
108 * // Length Error...!
109 * }
110 * if ( interruptStatus.B.BEF == 1)
111 * {
112 * // Bus Error...!
113 * }
114 * }
115 * IfxFce_Crc_clearErrorFlags(&fceCrc32_1);
116 * }
117 *
118 * {
119 * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc16);
120 * if (interruptStatus.U )
121 * {
122 * if ( interruptStatus.B.CMF == 1)
123 * {
124 * // CRC Mismatch Error...!
125 * }
126 * if( interruptStatus.B.CEF == 1)
127 * {
128 * // Configuration Error...!
129 * }
130 * if ( interruptStatus.B.LEF == 1)
131 * {
132 * // Length Error...!
133 * }
134 * if ( interruptStatus.B.BEF == 1)
135 * {
136 * // Bus Error...!
137 * }
138 * }
139 * IfxFce_Crc_clearErrorFlags(&fceCrc16);
140 * }
141 *
142 * {
143 * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc8);
144 * if (interruptStatus.U )
145 * {
146 * if ( interruptStatus.B.CMF == 1)
147 * {
148 * // CRC Mismatch Error...!
149 * }
150 * if( interruptStatus.B.CEF == 1)
151 * {
152 * // Configuration Error...!
153 * }
154 * if ( interruptStatus.B.LEF == 1)
155 * {
156 * // Length Error...!
157 * }
158 * if ( interruptStatus.B.BEF == 1)
159 * {
160 * // Bus Error...!
161 * }
162 * }
163 * IfxFce_Crc_clearErrorFlags(&fceCrc8);
164 * }
165 * }
166 * \endcode
167 *
168 * Finally install the interrupt handler in your initialisation function:
169 * \code
170 * // install interrupt handler
171 * IfxCpu_Irq_installInterruptHandler(fceISR, IFX_INTPRIO_FCE);
172 * IfxCpu_enableInterrupts();
173 * \endcode
174 *
175 * \subsection IfxLld_Fce_Fce_InitCrc Module Initialisation
176 *
177 * The module initialisation can be done in the same function. Here an example for all CRC kernels:
178 * \code
179 * // create module config
180 * IfxFce_Crc_Config fceConfig;
181 * IfxFce_Crc_initModuleConfig(&fceConfig, &MODULE_FCE0);
182 *
183 * // ISR priorities and interrupt target
184 * fceConfig.isrPriority = IFX_INTPRIO_FCE;
185 * fceConfig.isrTypeOfService = IfxCpu_Irq_getTos( IfxCpu_getCoreIndex());
186 *
187 * // initialize module
188 * //IfxFce_Crc fce; // defined globally
189 * IfxFce_Crc_initModule(&fce, &fceConfig);
190 *
191 * // initialize CRC kernels
192 * IfxFce_Crc_CrcConfig crcConfig;
193 * IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
194 *
195 * //IfxFce_Crc_Crc fceCrc32_0; // defined globally
196 * IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
197 * //IfxFce_Crc_Crc fceCrc32_1; // defined globally
198 * crcConfig.crc32Kernel = IfxFce_Crc32Kernel_1;
199 *
200 *
201 * IfxFce_Crc_initCrc(&fceCrc32_1, &crcConfig);
202 * crcConfig.crc32Kernel = IfxFce_Crc32Kernel_0;
203 *
204 * //IfxFce_Crc_Crc fceCrc16; // defined globally
205 * crcConfig.crcMode = IfxFce_CrcMode_16;
206 * IfxFce_Crc_initCrc(&fceCrc16, &crcConfig);
207 *
208 * //IfxFce_Crc_Crc fceCrc8; // defined globally
209 * crcConfig.crcMode = IfxFce_CrcMode_8;
210 * crcConfig.useDma = TRUE; // Enable Dma transfer
211 * crcConfig.fceChannelId = IfxDma_ChannelId_0;
212 * IfxFce_Crc_initCrc(&fceCrc8, &crcConfig);
213 * \endcode
214 *
215 *
216 * \subsection IfxLld_Fce_Fce_ErrorIRQ Error Interrupt on CRC mismatch
217 *
218 * By default, all error interrupts aside from the CRC mismatch interrupt (CMF) are enabled.
219 *
220 * In order to use the CMF interrupt as well, the appr. error flag has to be enabled during configuration:
221 * \code
222 * // initialize CRC kernel with CRC check enabled
223 * IfxFce_Crc_CrcConfig crcConfig;
224 * IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
225 * crcConfig.enabledInterrupts.crcMismatch = TRUE;
226 * IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
227 * \endcode
228 *
229 * And the expected CRC value has to be written into the expectedCrc field of the handle before the CRC calculation is started.
230 *
231 * \code
232 * {
233 * // Expected CRC:
234 * fceCrc32_0.expectedCrc = 0xd95def75;
235 *
236 * // do calculation
237 * uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
238 *
239 * // we can expect, that an error interrupt has been triggered if the CRC over checkData didn't match.
240 * }
241 * \endcode
242 *
243 * \subsection IfxLld_Fce_Fce_calculateCrc CRC Calculation
244 *
245 * Now, all 4 FCE kernels are configured and can be used to calculate CRC values.
246 *
247 * In following examples, CRC is calculated over following array:
248 * \code
249 * #define CHECK_DATA_SIZE 25 // declare this portion globally
250 * // if Dma is enabled, align memory to 32 byte
251 * uint32 checkData[CHECK_DATA_SIZE] = {
252 * 0xbe9957bb,
253 * 0x1c706c1e,
254 * 0x14c3db3f,
255 * 0x7fb17a93,
256 * 0xb0d9d5a7,
257 * 0x768093e0,
258 * 0x88b206a0,
259 * 0xc51299e4,
260 * 0xe8a97d48,
261 * 0x89367f27,
262 * 0x70095984,
263 * 0xec030f75,
264 * 0xdc22f8d4,
265 * 0xd951407b,
266 * 0x34ae18c6,
267 * 0x4d47ba7d,
268 * 0x0e2e4622,
269 * 0x4a2e90d3,
270 * 0xdaec3752,
271 * 0xcd3ed11c,
272 * 0x36b416b7,
273 * 0x8ea28658,
274 * 0xdd37eee3,
275 * 0x23928b62,
276 * 0x84eb4b22,
277 * };
278 * \endcode
279 *
280 * Function calls:
281 * \code
282 * // Common usage:
283 * {
284 * uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
285 *
286 * // -> CRC32 will be 0xd95def75
287 * }
288 *
289 * // Piecewise CRC calculation over two (more more) memory blocks.
290 * // Please note that the initial value requires a bytewise reflection, and an inversion whenever it's passed for the next calculation:
291 * {
292 * uint32 fceCrc;
293 *
294 * fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[0], CHECK_DATA_SIZE-10, 0x00000000);
295 * fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[CHECK_DATA_SIZE-10], 10, ~IfxFce_reflectCrc32(fceCrc, 32));
296 *
297 * // -> CRC32 will be 0xd95def75 (as well)
298 * }
299 *
300 * // using the CRC16 kernel
301 * {
302 * uint32 fceCrc;
303 *
304 * fceCrc = IfxFce_Crc_calculateCrc16(&fceCrc16, (uint16 *)checkData, CHECK_DATA_SIZE*2, 0x00000000);
305 *
306 * // -> CRC16 will be 0xda6f
307 * }
308 *
309 * // using the CRC8 kernel
310 * {
311 * uint32 fceCrc;
312 *
313 * fceCrc = IfxFce_Crc_calculateCrc8(&fceCrc8, (uint8 *)checkData, CHECK_DATA_SIZE*4, 0x00000000);
314 *
315 * // -> CRC8 will be 0x61
316 * }
317 * \endcode
318 *
319 * /
320 *
321 *
322 *
323 *
324 *
325 *
326 * \defgroup IfxLld_Fce_Crc CRC
327 * \ingroup IfxLld_Fce
328 * \defgroup IfxLld_Fce_Crc_DataStructures Data Structures
329 * \ingroup IfxLld_Fce_Crc
330 * \defgroup IfxLld_Fce_Crc_Module Module Initialise Functions
331 * \ingroup IfxLld_Fce_Crc
332 * \defgroup IfxLld_Fce_Crc_Operative CRC Operation Functions
333 * \ingroup IfxLld_Fce_Crc
334 * \defgroup IfxLld_Fce_Crc_Interrupt Interrupt Status Function
335 * \ingroup IfxLld_Fce_Crc
336 */
337
338 #ifndef IFXFCE_CRC_H
339 #define IFXFCE_CRC_H 1
340
341 /******************************************************************************/
342 /*----------------------------------Includes----------------------------------*/
343 /******************************************************************************/
344
345 #include "Fce/Std/IfxFce.h"
346 #include "Cpu/Irq/IfxCpu_Irq.h"
347
348 /******************************************************************************/
349 /*-----------------------------Data Structures--------------------------------*/
350 /******************************************************************************/
351
352 /** \addtogroup IfxLld_Fce_Crc_DataStructures
353 * \{ */
354 /** \brief Specifies the interrupt enable structure
355 */
356 typedef struct
357 {
358 boolean crcMismatch; /**< \brief Specifies enabel/disable of CRC mismatch interrupt */
359 boolean configError; /**< \brief Specifies enabel/disable of configuration error interrupt */
360 boolean lengthError; /**< \brief Specifies enabel/disable of length error interrupt */
361 boolean busError; /**< \brief Specifies enabel/disable of bus error interrupt */
362 } IfxFce_Crc_EnabledInterrupts;
363
364 /** \} */
365
366 /** \addtogroup IfxLld_Fce_Crc_DataStructures
367 * \{ */
368 /** \brief FCE Module Handle;
369 */
370 typedef struct
371 {
372 Ifx_FCE *fce; /**< \brief Pointer to FCE registers */
373 } IfxFce_Crc;
374
375 /** \brief Configuration structure of the module
376 */
377 typedef struct
378 {
379 Ifx_FCE *fce; /**< \brief Pointer to FCE registers */
380 uint16 isrPriority; /**< \brief interrupt priority */
381 IfxSrc_Tos isrTypeOfService; /**< \brief type of interrupt service */
382 } IfxFce_Crc_Config;
383
384 /** \brief Specifies the pointer to FCE module handler
385 */
386 typedef struct
387 {
388 Ifx_FCE *fce; /**< \brief Specifies pointer to FCE module registers */
389 IfxFce_CrcMode crcMode; /**< \brief Specifies the CRC mode */
390 uint32 expectedCrc; /**< \brief Specifies the expected CRC to be compared with resulted. */
391 IfxFce_Crc32Kernel crc32Kernel; /**< \brief Specifies the kernel used for CRC-32 */
392 } IfxFce_Crc_Crc;
393
394 /** \brief Specifies the module configuration structure
395 */
396 typedef struct
397 {
398 Ifx_FCE *fce; /**< \brief Specifies pointer to FCE module registers */
399 boolean crcCheckCompared; /**< \brief Specifies whether CRC check comparision is enabled or not */
400 boolean automaticLengthReload; /**< \brief Specifies the enable/disable of automatic length reload */
401 boolean dataByteReflectionEnabled; /**< \brief Specifies enable/disable of input data byte wise reflection */
402 boolean crc32BitReflectionEnabled; /**< \brief Specifies enable/disable of CRC 32-bit wise reflection */
403 uint32 expectedCrc; /**< \brief Specifies the expected CRC to be compared with resulted. */
404 IfxFce_CrcMode crcMode; /**< \brief Specifies the CRC mode */
405 boolean crcResultInverted; /**< \brief Specifies the XOR valueto get the final CRC */
406 IfxFce_Crc32Kernel crc32Kernel; /**< \brief Specifies the kernel used for CRC-32 */
407 IfxFce_Crc_EnabledInterrupts enabledInterrupts; /**< \brief Specifies the interrupt enable structure */
408 } IfxFce_Crc_CrcConfig;
409
410 /** \} */
411
412 /** \addtogroup IfxLld_Fce_Crc_Module
413 * \{ */
414
415 /******************************************************************************/
416 /*-------------------------Global Function Prototypes-------------------------*/
417 /******************************************************************************/
418
419 /** \brief Deinitialises the FCE module
420 * \param fce Specifies the pointer to FCE module handler
421 * \return None
422 *
423 * Reset the module
424 *
425 * \code
426 * IfxFce_Crc fce;
427 * //Deinitialise the module
428 * IfxFce_Crc_deInitModule(&fce);
429 * \endcode
430 *
431 */
432 IFX_EXTERN void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce);
433
434 /** \brief Initialise the FCE module for CRC computation according to CRC mode
435 * \param fceCrc Specifies the pointer to CRC handle
436 * \param crcConfig Specifies the FCE CRC configuration structure
437 * \return None
438 *
439 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
440 *
441 */
442 IFX_EXTERN void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig);
443
444 /** \brief Initialises the default CRC configuration buffer
445 * \param crcConfig Specifies the FCE CRC configuration structure
446 * \param fce Pointer to the FCE module handle
447 * \return None
448 *
449 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
450 *
451 */
452 IFX_EXTERN void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce);
453
454 /** \brief Usage Example: see \ref IfxLld_Fce_Crc_Usage
455 * \param fce module handle
456 * \param config predefined configuration structure of the module
457 * \return None
458 */
459 IFX_EXTERN void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config);
460
461 /** \brief Fills the config structure with default values
462 * \param config configuration structure of the module
463 * \param fce pointer to FCE registers
464 * \return None
465 *
466 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
467 *
468 */
469 IFX_EXTERN void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce);
470
471 /** \} */
472
473 /** \addtogroup IfxLld_Fce_Crc_Operative
474 * \{ */
475
476 /******************************************************************************/
477 /*-------------------------Global Function Prototypes-------------------------*/
478 /******************************************************************************/
479
480 /** \brief Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed.
481 * \param fce Specifies the pointer to FCE module handler
482 * \param crcData Length of the input data block
483 * \param crcDataLength Length of the input data block
484 * \param crcStartValue start value for CRC calculation
485 * \return Final CRC after XORed with XOR value.
486 *
487 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
488 *
489 */
490 IFX_EXTERN uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue);
491
492 /** \brief Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed.
493 * \param fce Specifies the pointer to FCE module handler
494 * \param crcData pointer to the input data block
495 * \param crcDataLength Length of the input data block
496 * \param crcStartValue start value for CRC calculation
497 * \return Final CRC after XORed with XOR value.
498 *
499 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
500 *
501 */
502 IFX_EXTERN uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue);
503
504 /** \brief Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed.
505 * \param fce Specifies the pointer to FCE module handler
506 * \param crcData Length of the input data block
507 * \param crcDataLength Length of the input data block
508 * \param crcStartValue start value for CRC calculation
509 * \return Final CRC after XORed with XOR value.
510 *
511 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
512 *
513 */
514 IFX_EXTERN uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue);
515
516 /** \} */
517
518 /** \addtogroup IfxLld_Fce_Crc_Interrupt
519 * \{ */
520
521 /******************************************************************************/
522 /*-------------------------Global Function Prototypes-------------------------*/
523 /******************************************************************************/
524
525 /** \brief Clears the error flags
526 * \param fce Specifies the pointer to FCE module handler
527 * \return None
528 *
529 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
530 *
531 */
532 IFX_EXTERN void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce);
533
534 /** \brief Gets the current CRC interrupt status.
535 * \param fce Specifies the pointer to FCE module handler
536 * \return Current interrupt status
537 *
538 * Usage Example: see \ref IfxLld_Fce_Crc_Usage
539 *
540 */
541 IFX_EXTERN Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce);
542
543 /** \} */
544
545 #endif /* IFXFCE_CRC_H */
IfxFce_Crc_Config::isrTypeOfService
IfxSrc_Tos isrTypeOfService
type of interrupt service
Definition: IfxFce_Crc.h:381
IfxFce_Crc_EnabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:356
IfxFce_Crc::fce
Ifx_FCE * fce
Pointer to FCE registers.
Definition: IfxFce_Crc.h:372
IfxFce_Crc_Crc
Specifies the pointer to FCE module handler.
Definition: IfxFce_Crc.h:386
IfxFce_Crc_calculateCrc32
IFX_EXTERN uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:64
IfxFce_CrcMode
IfxFce_CrcMode
Specifies the CRC mode.
Definition: IfxFce.h:64
IfxFce_Crc_getInterruptStatus
IFX_EXTERN Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
Gets the current CRC interrupt status.
Definition: IfxFce_Crc.c:166
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxFce_Crc_Crc::expectedCrc
uint32 expectedCrc
Specifies the expected CRC to be compared with resulted.
Definition: IfxFce_Crc.h:390
IfxFce_Crc_initCrcConfig
IFX_EXTERN void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
Initialises the default CRC configuration buffer.
Definition: IfxFce_Crc.c:232
IfxFce_Crc_EnabledInterrupts::lengthError
boolean lengthError
Specifies enabel/disable of length error interrupt.
Definition: IfxFce_Crc.h:360
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxFce_Crc_initCrc
IFX_EXTERN void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
Initialise the FCE module for CRC computation according to CRC mode.
Definition: IfxFce_Crc.c:183
IfxFce_Crc_CrcConfig::automaticLengthReload
boolean automaticLengthReload
Specifies the enable/disable of automatic length reload.
Definition: IfxFce_Crc.h:400
IfxFce_Crc_clearErrorFlags
IFX_EXTERN void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
Clears the error flags.
Definition: IfxFce_Crc.c:143
IfxFce_Crc_calculateCrc8
IFX_EXTERN uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:114
IfxFce_Crc_CrcConfig::dataByteReflectionEnabled
boolean dataByteReflectionEnabled
Specifies enable/disable of input data byte wise reflection.
Definition: IfxFce_Crc.h:401
IfxFce_Crc_CrcConfig::crcResultInverted
boolean crcResultInverted
Specifies the XOR valueto get the final CRC.
Definition: IfxFce_Crc.h:405
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxFce_Crc_CrcConfig::enabledInterrupts
IfxFce_Crc_EnabledInterrupts enabledInterrupts
Specifies the interrupt enable structure.
Definition: IfxFce_Crc.h:407
IfxFce_Crc_Config
Configuration structure of the module.
Definition: IfxFce_Crc.h:377
IfxFce_Crc32Kernel
IfxFce_Crc32Kernel
Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32.
Definition: IfxFce.h:56
IfxFce_Crc_initModule
IFX_EXTERN void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
Usage Example: see How to use the FCE CRC Interface driver?.
Definition: IfxFce_Crc.c:248
IfxFce_Crc
FCE Module Handle;.
Definition: IfxFce_Crc.h:370
IfxFce_Crc_EnabledInterrupts::configError
boolean configError
Specifies enabel/disable of configuration error interrupt.
Definition: IfxFce_Crc.h:359
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxFce_Crc_EnabledInterrupts::busError
boolean busError
Specifies enabel/disable of bus error interrupt.
Definition: IfxFce_Crc.h:361
IfxFce_Crc_deInitModule
IFX_EXTERN void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
Deinitialises the FCE module.
Definition: IfxFce_Crc.c:160
IfxFce_Crc_initModuleConfig
IFX_EXTERN void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
Fills the config structure with default values.
Definition: IfxFce_Crc.c:261
IfxFce_Crc_CrcConfig::crcCheckCompared
boolean crcCheckCompared
Specifies whether CRC check comparision is enabled or not.
Definition: IfxFce_Crc.h:399
IfxFce_Crc_CrcConfig::crc32BitReflectionEnabled
boolean crc32BitReflectionEnabled
Specifies enable/disable of CRC 32-bit wise reflection.
Definition: IfxFce_Crc.h:402
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxFce.h
FCE basic functionality.
IfxFce_Crc_Crc::crcMode
IfxFce_CrcMode crcMode
Specifies the CRC mode.
Definition: IfxFce_Crc.h:389
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxFce_Crc_Crc::crc32Kernel
IfxFce_Crc32Kernel crc32Kernel
Specifies the kernel used for CRC-32.
Definition: IfxFce_Crc.h:391
IfxFce_Crc_EnabledInterrupts::crcMismatch
boolean crcMismatch
Specifies enabel/disable of CRC mismatch interrupt.
Definition: IfxFce_Crc.h:358
IfxFce_Crc_calculateCrc16
IFX_EXTERN uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed...
Definition: IfxFce_Crc.c:36
IfxFce_Crc_Config::isrPriority
uint16 isrPriority
interrupt priority
Definition: IfxFce_Crc.h:380
IfxFce_Crc_CrcConfig
Specifies the module configuration structure.
Definition: IfxFce_Crc.h:396


iLLD_TC26B: IfxFce_cfg.h Source File

  • _Impl
IfxFce_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxFce_cfg.h
3 * \brief FCE on-chip implementation data
4 * \ingroup IfxLld_Fce
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Fce FCE
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Fce_Impl Implementation
27 * \ingroup IfxLld_Fce
28 * \defgroup IfxLld_Fce_Std Standard Driver
29 * \ingroup IfxLld_Fce
30 */
31
32 #ifndef IFXFCE_CFG_H
33 #define IFXFCE_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 /******************************************************************************/
40 /*-----------------------------------Macros-----------------------------------*/
41 /******************************************************************************/
42
43 #define IFXFCE_NUM_KERNEL (4)
44
45 #define IFXFCE_NUM_MODULES (1)
46
47 #endif /* IFXFCE_CFG_H */


iLLD_TC26B: IfxFft.c Source File

  • Fft
  • Std
IfxFft.c
Go to the documentation of this file.
1 /**
2 * \file IfxFft.c
3 * \brief FFT basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxFft.h"
IfxFft.h
FFT basic functionality.


iLLD_TC26B: IfxFft.h Source File

  • Fft
  • Std
IfxFft.h
Go to the documentation of this file.
1 /**
2 * \file IfxFft.h
3 * \brief FFT basic functionality
4 * \ingroup IfxLld_Fft
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Fft_Std_Enumerations Enumerations
25 * \ingroup IfxLld_Fft_Std
26 * \defgroup IfxLld_Fft_Std_UtilityFunctions Utility Functions
27 * \ingroup IfxLld_Fft_Std
28 */
29
30 #ifndef IFXFFT_H
31 #define IFXFFT_H 1
32
33 /******************************************************************************/
34 /*----------------------------------Includes----------------------------------*/
35 /******************************************************************************/
36
37 #include "_Impl/IfxFft_cfg.h"
38 #include "Cpu/Std/IfxCpu_Intrinsics.h"
39 #include "Src/Std/IfxSrc.h"
40 #include "IfxFft_reg.h"
41 #include "IfxLmu_reg.h"
42 #include "Scu/Std/IfxScuWdt.h"
43
44 /******************************************************************************/
45 /*--------------------------------Enumerations--------------------------------*/
46 /******************************************************************************/
47
48 /** \addtogroup IfxLld_Fft_Std_Enumerations
49 * \{ */
50 /** \brief Input format
51 * Definition in Ifx_FFT.CSR.B.IN.FMT
52 */
53 typedef enum
54 {
55 IfxFft_Input_complexSInt32 = 0, /**< \brief 1 complex 32-bit data per 64-bit word */
56 IfxFft_Input_realSInt32 = 1, /**< \brief 2 real 32-bit data per 64-bit word */
57 IfxFft_Input_complexSInt16 = 2, /**< \brief 2 complex 16-bit data per 64-bit word */
58 IfxFft_Input_realSInt16 = 3 /**< \brief 4 real 16-bit data per 64-bit word */
59 } IfxFft_Input;
60
61 /** \brief Length of transform. Log base 2 of the required transform size.
62 * Length must be between 3 (transform of 8) and 11 (transform of 2048).
63 * Definition in Ifx_FFT.CSR.B.LENGTH
64 */
65 typedef enum
66 {
67 IfxFft_Length_8 = 3, /**< \brief transform of 8 */
68 IfxFft_Length_16 = 4, /**< \brief transform of 16 */
69 IfxFft_Length_32 = 5, /**< \brief transform of 32 */
70 IfxFft_Length_64 = 6, /**< \brief transform of 64 */
71 IfxFft_Length_128 = 7, /**< \brief transform of 128 */
72 IfxFft_Length_256 = 8, /**< \brief transform of 256 */
73 IfxFft_Length_512 = 9, /**< \brief transform of 512 */
74 IfxFft_Length_1024 = 10 /**< \brief transform of 1024 */
75 } IfxFft_Length;
76
77 /** \brief Operation (FFT / IFFT)
78 * Definition in Ifx_FFT.CSR.B.IFFT
79 */
80 typedef enum
81 {
82 IfxFft_Operation_fft = 0, /**< \brief perform FFT */
83 IfxFft_Operation_ifft = 1 /**< \brief perform IFFT */
84 } IfxFft_Operation;
85
86 /** \brief Output format
87 * Definition in Ifx_FFT.CSR.B.OUT.FMT
88 */
89 typedef enum
90 {
91 IfxFft_Output_complexSInt32 = 0, /**< \brief 1 complex 32-bit data per 64-bit word */
92 IfxFft_Output_complexSInt16 = 1 /**< \brief 2 complex 16-bit data per 64-bit word */
93 } IfxFft_Output;
94
95 /** \brief OCDS Suspend Control (OCDS.SUS)
96 */
97 typedef enum
98 {
99 IfxFft_SuspendMode_none = 0, /**< \brief No suspend */
100 IfxFft_SuspendMode_hard = 1, /**< \brief Hard Suspend */
101 IfxFft_SuspendMode_soft = 2 /**< \brief Soft Suspend */
102 } IfxFft_SuspendMode;
103
104 /** \} */
105
106 /** \addtogroup IfxLld_Fft_Std_UtilityFunctions
107 * \{ */
108
109 /******************************************************************************/
110 /*-------------------------Inline Function Prototypes-------------------------*/
111 /******************************************************************************/
112
113 /** \brief Disables the FFT module and also the LMU interface
114 * \param fft pointer to FFT registers
115 * \param lmu pointer to LMU registers
116 * \return None
117 */
118 IFX_INLINE void IfxFft_disableModule(Ifx_FFT *fft, Ifx_LMU *lmu);
119
120 /** \brief Enables the FFT module and also the LMU interface
121 * \param fft pointer to FFT registers
122 * \param lmu pointer to LMU registers
123 * \return None
124 */
125 IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu);
126
127 /** \brief Returns the input format
128 * \param fft pointer to FFT registers
129 * \return Input format
130 */
131 IFX_INLINE IfxFft_Input IfxFft_getInputFormat(Ifx_FFT *fft);
132
133 /** \brief Returns the length of the transform (length code, 3 to 10)
134 * \param fft pointer to FFT registers
135 * \return Length of the transform (length code)
136 */
137 IFX_INLINE IfxFft_Length IfxFft_getLength(Ifx_FFT *fft);
138
139 /** \brief Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH
140 * \param length Input length of the transform
141 * \return Length of the transform (code, 3 to 10)
142 */
143 IFX_INLINE IfxFft_Length IfxFft_getLengthCode(uint16 length);
144
145 /** \brief Retruns the actual length of the transform from the length code
146 * \param length Length of transform
147 * \return Actual length of the transform
148 */
149 IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length);
150
151 /** \brief Returns the output format
152 * \param fft pointer to FFT registers
153 * \return Output format
154 */
155 IFX_INLINE IfxFft_Output IfxFft_getOutputFormat(Ifx_FFT *fft);
156
157 /** \brief Returns the status of FFT DONE request
158 * \param fft pointer to FFT registers
159 * \return Status of FFT DONE request
160 */
161 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerDone(Ifx_FFT *fft);
162
163 /** \brief Returns the status of FFT RFS request
164 * \param fft pointer to FFT registers
165 * \return Status of FFT RFS request
166 */
167 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerRfs(Ifx_FFT *fft);
168
169 /** \brief Returns the actual length of the transform
170 * \param fft pointer to FFT registers
171 * \return Actual length of the transform ()
172 */
173 IFX_INLINE uint16 IfxFft_getTransformLength(Ifx_FFT *fft);
174
175 /** \brief Returns the status of whether the FFT Engine is Idle or has at least one transform in operation.
176 * \param fft pointer to FFT registers
177 * \return (true / false)
178 */
179 IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft);
180
181 /** \brief Returns the status of whether the module is enabled or not
182 * \param fft pointer to FFT registers
183 * \return (true / false)
184 */
185 IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft);
186
187 /** \brief Returns the module's suspend state.
188 * TRUE :if module is suspended.
189 * FALSE:if module is not yet suspended.
190 * \param fft Pointer to FFT module registers
191 * \return Suspend status (TRUE / FALSE)
192 */
193 IFX_INLINE boolean IfxFft_isModuleSuspended(Ifx_FFT *fft);
194
195 /** \brief Returns the status of whether the module can accept a START operation or not
196 * \param fft Pointer to FFT registers
197 * \return (true / false)
198 */
199 IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft);
200
201 /** \brief Configure the Module to Hard/Soft suspend mode.
202 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
203 * \param fft Pointer to FFT module registers
204 * \param mode Module suspend mode
205 * \return None
206 */
207 IFX_INLINE void IfxFft_setSuspendMode(Ifx_FFT *fft, IfxFft_SuspendMode mode);
208
209 /** \} */
210
211 /******************************************************************************/
212 /*---------------------Inline Function Implementations------------------------*/
213 /******************************************************************************/
214
215 IFX_INLINE void IfxFft_disableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
216 {
217 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
218 IfxScuWdt_clearCpuEndinit(password);
219 // FFT clock disable
220 fft->CLC.B.DISR = 1;
221 IfxScuWdt_setCpuEndinit(password);
222 }
223
224
225 IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
226 {
227 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
228 IfxScuWdt_clearCpuEndinit(password);
229 // FFT clock enable
230 fft->CLC.U = 0x0;
231 IfxScuWdt_setCpuEndinit(password);
232 }
233
234
235 IFX_INLINE IfxFft_Input IfxFft_getInputFormat(Ifx_FFT *fft)
236 {
237 return (IfxFft_Input)fft->CSR.B.IN_FMT;
238 }
239
240
241 IFX_INLINE IfxFft_Length IfxFft_getLength(Ifx_FFT *fft)
242 {
243 return (IfxFft_Length)fft->CSR.B.LENGTH;
244 }
245
246
247 IFX_INLINE IfxFft_Length IfxFft_getLengthCode(uint16 length)
248 {
249 return (IfxFft_Length)(31 - __clz((uint32)length));
250 }
251
252
253 IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length)
254 {
255 return 1 << (uint32)length;
256 }
257
258
259 IFX_INLINE IfxFft_Output IfxFft_getOutputFormat(Ifx_FFT *fft)
260 {
261 return (IfxFft_Output)fft->CSR.B.OUT_FMT;
262 }
263
264
265 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerDone(Ifx_FFT *fft)
266 {
267 // only a single FFT available, therefore no check for the fft pointer required
268 return &MODULE_SRC.FFT.FFT[0].DONE;
269 }
270
271
272 IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerRfs(Ifx_FFT *fft)
273 {
274 // only a single FFT available, therefore no check for the fft pointer required
275 return &MODULE_SRC.FFT.FFT[0].RFS;
276 }
277
278
279 IFX_INLINE uint16 IfxFft_getTransformLength(Ifx_FFT *fft)
280 {
281 return 1U << fft->CSR.B.LENGTH;
282 }
283
284
285 IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft)
286 {
287 return fft->CSR.B.BUSY != 0;
288 }
289
290
291 IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft)
292 {
293 return fft->CLC.B.DISS == 0;
294 }
295
296
297 IFX_INLINE boolean IfxFft_isModuleSuspended(Ifx_FFT *fft)
298 {
299 Ifx_FFT_OCS ocs;
300
301 // read the status
302 ocs.U = fft->OCS.U;
303
304 // return the status
305 return ocs.B.SUSSTA;
306 }
307
308
309 IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft)
310 {
311 return fft->CSR.B.RFS != 0;
312 }
313
314
315 IFX_INLINE void IfxFft_setSuspendMode(Ifx_FFT *fft, IfxFft_SuspendMode mode)
316 {
317 Ifx_FFT_OCS ocs;
318
319 // remove protection and configure the suspend mode.
320 ocs.B.SUS_P = 1;
321 ocs.B.SUS = mode;
322 fft->OCS.U = ocs.U;
323 }
324
325
326 #endif /* IFXFFT_H */
IfxFft_isModuleEnabled
IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft)
Returns the status of whether the module is enabled or not.
Definition: IfxFft.h:291
IfxFft_Output_complexSInt16
2 complex 16-bit data per 64-bit word
Definition: IfxFft.h:92
IfxFft_disableModule
IFX_INLINE void IfxFft_disableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
Disables the FFT module and also the LMU interface.
Definition: IfxFft.h:215
IfxFft_getTransformLength
IFX_INLINE uint16 IfxFft_getTransformLength(Ifx_FFT *fft)
Returns the actual length of the transform.
Definition: IfxFft.h:279
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxFft_Input_realSInt16
4 real 16-bit data per 64-bit word
Definition: IfxFft.h:58
IfxFft_getInputFormat
IFX_INLINE IfxFft_Input IfxFft_getInputFormat(Ifx_FFT *fft)
Returns the input format.
Definition: IfxFft.h:235
IfxFft_getSrcPointerDone
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerDone(Ifx_FFT *fft)
Returns the status of FFT DONE request.
Definition: IfxFft.h:265
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxFft_getSrcPointerRfs
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerRfs(Ifx_FFT *fft)
Returns the status of FFT RFS request.
Definition: IfxFft.h:272
IfxFft_SuspendMode_none
No suspend.
Definition: IfxFft.h:99
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxFft_getLengthFromCode
IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length)
Retruns the actual length of the transform from the length code.
Definition: IfxFft.h:253
IfxSrc.h
SRC basic functionality.
IfxFft_enableModule
IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
Enables the FFT module and also the LMU interface.
Definition: IfxFft.h:225
IfxCpu_Intrinsics.h
IfxFft_SuspendMode
IfxFft_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxFft.h:97
IfxFft_Length_16
transform of 16
Definition: IfxFft.h:68
IfxFft_Operation
IfxFft_Operation
Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT.
Definition: IfxFft.h:80
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxFft_Input_complexSInt32
1 complex 32-bit data per 64-bit word
Definition: IfxFft.h:55
IfxFft_Length_512
transform of 512
Definition: IfxFft.h:73
IfxFft_Length_256
transform of 256
Definition: IfxFft.h:72
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxFft_Output
IfxFft_Output
Output format Definition in Ifx_FFT.CSR.B.OUT.FMT.
Definition: IfxFft.h:89
IfxFft_getOutputFormat
IFX_INLINE IfxFft_Output IfxFft_getOutputFormat(Ifx_FFT *fft)
Returns the output format.
Definition: IfxFft.h:259
IfxFft_Output_complexSInt32
1 complex 32-bit data per 64-bit word
Definition: IfxFft.h:91
IfxFft_isEngineBusy
IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft)
Returns the status of whether the FFT Engine is Idle or has at least one transform in operation...
Definition: IfxFft.h:285
IfxFft_Operation_fft
perform FFT
Definition: IfxFft.h:82
IfxFft_getLength
IFX_INLINE IfxFft_Length IfxFft_getLength(Ifx_FFT *fft)
Returns the length of the transform (length code, 3 to 10)
Definition: IfxFft.h:241
IfxFft_Input_realSInt32
2 real 32-bit data per 64-bit word
Definition: IfxFft.h:56
IfxFft_getLengthCode
IFX_INLINE IfxFft_Length IfxFft_getLengthCode(uint16 length)
Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH.
Definition: IfxFft.h:247
IfxFft_isModuleSuspended
IFX_INLINE boolean IfxFft_isModuleSuspended(Ifx_FFT *fft)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxFft.h:297
IfxFft_Length
IfxFft_Length
Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform o...
Definition: IfxFft.h:65
IfxFft_Length_32
transform of 32
Definition: IfxFft.h:69
IfxFft_isReadyForStart
IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft)
Returns the status of whether the module can accept a START operation or not.
Definition: IfxFft.h:309
IfxFft_Length_1024
transform of 1024
Definition: IfxFft.h:74
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxFft_SuspendMode_hard
Hard Suspend.
Definition: IfxFft.h:100
IfxFft_Operation_ifft
perform IFFT
Definition: IfxFft.h:83
IfxFft_cfg.h
FFT on-chip implementation data.
IfxFft_Length_128
transform of 128
Definition: IfxFft.h:71
IfxFft_Length_64
transform of 64
Definition: IfxFft.h:70
IfxFft_Input
IfxFft_Input
Input format Definition in Ifx_FFT.CSR.B.IN.FMT.
Definition: IfxFft.h:53
IfxFft_SuspendMode_soft
Soft Suspend.
Definition: IfxFft.h:101
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxFft_Input_complexSInt16
2 complex 16-bit data per 64-bit word
Definition: IfxFft.h:57
IfxFft_setSuspendMode
IFX_INLINE void IfxFft_setSuspendMode(Ifx_FFT *fft, IfxFft_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxFft.h:315
IfxFft_Length_8
transform of 8
Definition: IfxFft.h:67


iLLD_TC26B: IfxFft_Fft.c Source File

  • Fft
  • Fft
IfxFft_Fft.c
Go to the documentation of this file.
1 /**
2 * \file IfxFft_Fft.c
3 * \brief FFT FFT details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxFft_Fft.h"
30
31 /******************************************************************************/
32 /*----------------------------------Macros------------------------------------*/
33 /******************************************************************************/
34
35 #define IFXFFT_FFT_DATA_TRANSFER (*((volatile uint64 *)IFXFFT_DATA_SPACE))
36
37 #define IFXFFT_FFT_WINDOW_TRANSFER (*((volatile uint64 *)IFXFFT_WINDOW_SPACE))
38
39 #define IFXFFT_FFT_DMADISCARDCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 2)
40
41 #define IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 1)
42
43 #define IFXFFT_FFT_DMAINPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE)
44
45 #define IFXFFT_FFT_DMADISCARDCHANNELID (dmaDiscard->channelId)
46
47 #define IFXFFT_FFT_DMAOUTPUTCHANNELID (dmaOutput->channelId)
48
49 #define IFXFFT_FFT_DMAINPUTCHANNELID (dmaInput->channelId)
50
51 #define IFXFFT_FFT_MOVE_BTR4 1
52
53 #define IFXFFT_FFT_MOVE_SIZE IfxDma_ChannelMoveSize_256bit
54
55 #define IFXFFT_FFT_MOVE_DIV 4
56
57 #define IFXFFT_FFT_ISALIGNED(address) ((Ifx_AlignOn256((uint32)address) == (uint32)address))
58
59 /** \addtogroup IfxLld_Fft_Fft_ModuleFunctions
60 * \{ */
61
62 /******************************************************************************/
63 /*-----------------------Private Function Prototypes--------------------------*/
64 /******************************************************************************/
65
66 /** \brief Configures the CSR register
67 * \param config Configuration structure for the FFT job
68 * \return Desired value to write into the Ifx_FFT.CSR register
69 */
70 IFX_STATIC uint32 IfxFft_Fft_calcCSR(const IfxFft_Fft_JobConfig *config);
71
72 /** \} */
73
74 /** \addtogroup IfxLld_Fft_Fft_TransformFuntions
75 * \{ */
76
77 /******************************************************************************/
78 /*-----------------------Private Function Prototypes--------------------------*/
79 /******************************************************************************/
80
81 /** \brief Unloads output data from the FFT engine
82 * \param job FFT job handle
83 * \return None
84 */
85 IFX_STATIC void IfxFft_Fft_unloadOutput(IfxFft_Fft_Job *job);
86
87 /** \brief Loads input data into the FFT engine
88 * \param job FFT job handle
89 * \return None
90 */
91 IFX_STATIC void IfxFft_Fft_loadInput(IfxFft_Fft_Job *job);
92
93 /** \} */
94
95 /******************************************************************************/
96 /*-----------------------Private Function Prototypes--------------------------*/
97 /******************************************************************************/
98
99 /** \brief Calculates the input counters and output counters
100 * \param job job FFT job
101 * \param jobConfig jobConfig Pointer to the job configuration
102 * \return None
103 */
104 IFX_STATIC void IfxFft_Fft_calcCounters(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig);
105
106 /******************************************************************************/
107 /*------------------------Private Variables/Constants-------------------------*/
108 /******************************************************************************/
109
110 IFX_STATIC uint64 IfxFft_Fft_dummy256[IFXFFT_FFT_MOVE_DIV];
111
112 /******************************************************************************/
113 /*-------------------------Function Implementations---------------------------*/
114 /******************************************************************************/
115
116 IFX_STATIC uint32 IfxFft_Fft_calcCSR(const IfxFft_Fft_JobConfig *config)
117 {
118 uint32 csr =
119 (config->fftLength << IFX_FFT_CSR_LENGTH_OFF) |
120 (config->inputFormat << IFX_FFT_CSR_IN_FMT_OFF) |
121 (config->outputFormat << IFX_FFT_CSR_OUT_FMT_OFF) |
122 (config->operation << IFX_FFT_CSR_IFFT_OFF) |
123 ((config->useWindowFunction ? 0U : 1U) << IFX_FFT_CSR_WIN_BYP_OFF);
124 return csr;
125 }
126
127
128 void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
129 {
130 *newJob = *originalJob;
131 originalJob->nextJob = newJob;
132 }
133
134
135 IFX_STATIC void IfxFft_Fft_unloadOutput(IfxFft_Fft_Job *job)
136 {
137 #if IFXFFT_FFT_DMA_SUPPORT
138 #if IFXFFT_FFT_HW_EXEC
139 volatile Ifx_SRC_SRCR *srcr;
140 sint16 discardCount;
141
142 #if !IFXFFT_FFT_OPTIMIZED
143 IfxDma_Dma_Channel *dmaOutput = &(job->fft->outputDmaChannel);
144 IfxDma_Dma_Channel *dmaDiscard = &(job->fft->discardDmaChannel);
145 Ifx_DMA *dmaSFR = dmaOutput->dma;
146 #else
147 Ifx_DMA *dmaSFR = (&MODULE_DMA);
148 #endif
149 #if IFXFFT_FFT_OPTIMIZED
150 IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT, job->outputPtr);
151 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT, job->count64.output);
152 #else
153 IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID, job->outputPtr);
154 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID, job->count64.output);
155 #endif
156 discardCount = (job->count64.result - job->count64.output);
157
158 if (discardCount > 0)
159 {
160 #if IFXFFT_FFT_OPTIMIZED
161 IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID_OPT, IfxFft_Fft_dummy256);
162 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID_OPT, discardCount);
163 #else
164 IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID, IfxFft_Fft_dummy256);
165 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID, discardCount);
166 #endif
167
168 #if IFXFFT_FFT_OPTIMIZED
169 srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
170 #else
171 srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
172 #endif
173 srcr->B = job->fft->srcrOutDis;
174 }
175 else
176 {
177 #if IFXFFT_FFT_OPTIMIZED
178 srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
179 #else
180 srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
181 #endif
182 srcr->B = job->fft->srcrOutEnd;
183 }
184
185 #if IFXFFT_FFT_OPTIMIZED
186 IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
187 #else
188 IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
189 #endif
190 #endif
191
192 #else
193 sint16 i;
194 uint64 *output64;
195
196 output64 = job->outputPtr;
197
198 for (i = 0; i < job->count64.output; i++)
199 {
200 *(output64++) = IFXFFT_FFT_DATA_TRANSFER;
201 }
202
203 for ( ; i < job->count64.result; i++)
204 {
205 volatile uint64 dummy64 = IFXFFT_FFT_DATA_TRANSFER;
206
207 if (dummy64) // avoid warning message (unused variable)
208 {}
209 }
210
211 #endif
212 }
213
214
215 void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
216 {
217 // take over FFT handle
218 job->fft = jobConfig->fft;
219 job->nextJob = NULL_PTR;
220
221 // engine control
222 job->csr.U = IfxFft_Fft_calcCSR(jobConfig);
223 job->inputPtr = jobConfig->inputPtr;
224 job->outputPtr = jobConfig->outputPtr;
225
226 // move counters
227 IfxFft_Fft_calcCounters(job, jobConfig);
228
229 // config check
230 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) <= IFXFFT_MAX_LENGTH);
231 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, jobConfig->inputLength > 0);
232 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, jobConfig->outputLength > 0);
233 #if IFXFFT_FFT_DMA_SUPPORT
234 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) == jobConfig->inputLength);
235 #else
236 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) >= jobConfig->inputLength);
237 #endif
238 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) >= jobConfig->outputLength);
239 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(jobConfig->outputLength));
240 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(job->inputPtr));
241 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(job->outputPtr));
242 }
243
244
245 void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
246 {
247 config->fft = fft;
248 config->inputLength = 256;
249 config->outputLength = 256;
250 config->fftLength = IfxFft_Length_256;
251 config->inputFormat = IfxFft_Input_realSInt32;
252 config->outputFormat = IfxFft_Output_complexSInt32;
253 config->operation = IfxFft_Operation_fft;
254 config->useWindowFunction = FALSE;
255 config->inputPtr = NULL_PTR;
256 config->outputPtr = NULL_PTR;
257 }
258
259
260 void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
261 {
262 #if !IFXFFT_FFT_OPTIMIZED
263 Ifx_FFT *fftSFR = config->fft;
264 Ifx_LMU *lmuSFR = config->lmu;
265
266 fft->fft = fftSFR;
267 fft->lmu = lmuSFR;
268 #else
269 Ifx_FFT *fftSFR = (&MODULE_FFT);
270 Ifx_LMU *lmuSFR = (&MODULE_LMU);
271 #endif
272 #if IFXFFT_FFT_DMA_SUPPORT
273
274 fft->inputIdx = 0;
275 fft->job[0] = 0;
276 fft->job[1] = 0;
277 #endif
278
279 if (IfxFft_isModuleEnabled(fftSFR) == FALSE)
280 {
281 IfxFft_enableModule(fftSFR, lmuSFR);
282 }
283
284 #if IFXFFT_FFT_DMA_SUPPORT
285 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->outputPriority > 0);
286 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputPriority > 0);
287 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->intraPriority > 0);
288
289 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputDmaChannelId != IfxDma_ChannelId_none);
290 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->outputDmaChannelId != IfxDma_ChannelId_none);
291 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->discardDmaChannelId != IfxDma_ChannelId_none);
292
293 IfxFft_Fft_initDma(fft, config);
294 #else
295 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->typeOfService != IfxSrc_Tos_dma);
296
297 if (config->outputPriority > 0)
298 {
299 volatile Ifx_SRC_SRCR *srcr;
300 // FFT DONE as ISR output
301 srcr = IfxFft_getSrcPointerDone(fftSFR);
302 IfxSrc_init(srcr, config->typeOfService, config->outputPriority);
303 IfxSrc_enable(srcr);
304 }
305
306 #endif
307 }
308
309
310 void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
311 {
312 #if !IFXFFT_FFT_OPTIMIZED
313 config->fft = fft;
314 config->lmu = lmu;
315 #endif
316
317 #if IFXFFT_FFT_DMA_SUPPORT
318 #if IFXFFT_FFT_OPTIMIZED
319 config->inputDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE;
320 config->outputDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE + 1;
321 config->discardDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE + 2;
322 #else
323 config->fft = fft;
324 config->lmu = lmu;
325 config->inputDmaChannelId = IfxDma_ChannelId_none;
326 config->outputDmaChannelId = IfxDma_ChannelId_none;
327 config->discardDmaChannelId = IfxDma_ChannelId_none;
328 #endif
329 #endif
330 config->inputPriority = 0;
331 config->outputPriority = 0;
332 config->typeOfService = IfxSrc_Tos_cpu0;
333 }
334
335
336 void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData)
337 {
338 int i;
339 const uint64 *ptr = windowData;
340
341 #if !IFXFFT_FFT_OPTIMIZED
342 /*IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, MODULE_LMU.MEMCON.B.FFTPFT == 0);*/
343 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, !IfxFft_isEngineBusy(fft->fft));
344 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IfxFft_isReadyForStart(fft->fft));
345 #else
346 /*IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, MODULE_LMU.MEMCON.B.FFTPFT == 0);*/
347 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, !IfxFft_isEngineBusy(&MODULE_FFT));
348 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IfxFft_isReadyForStart(&MODULE_FFT));
349 #endif
350
351 uint64 *wmem = (uint64 *)IFXFFT_WINDOW_SPACE;
352
353 for (i = 0; i < (IFXFFT_MAX_WINDOW_LENGTH / (sizeof(uint64) / sizeof(uint16))); i++)
354 {
355 *(wmem++) = *(ptr++);
356 }
357 }
358
359
360 void IfxFft_Fft_isrInput(IfxFft_Fft *fft)
361 {
362 #if IFXFFT_FFT_DMA_SUPPORT
363
364 #if IFXFFT_FFT_PIPELINED
365 IfxFft_Fft_Job *inputJob = fft->job[0];
366
367 if (fft->inputIdx == 0)
368 {
369 if (inputJob != NULL_PTR)
370 {
371 IfxFft_Fft_startJob(inputJob);
372 }
373 }
374 else
375 {
376 if (fft->flags & IFXFFT_FFT_FLAG_DONE)
377 {
378 fft->flags = 0;
379 IfxFft_Fft_unloadOutput(fft->job[1]);
380 fft->job[1] = fft->job[1]->nextJob;
381 }
382 else
383 {
384 if (fft->inputIdx > fft->intraIdx)
385 {
386 fft->flags = IFXFFT_FFT_FLAG_INPUT;
387 }
388 }
389 }
390
391 if (fft->inputIdx == IFXFFT_FFT_NUM_JOBS)
392 {
393 __debug();
394 }
395
396 fft->inputIdx++;
397
398 #endif
399 #endif
400 }
401
402
403 void IfxFft_Fft_isrOutput(IfxFft_Fft *fft)
404 {
405 #if IFXFFT_FFT_PIPELINED
406 IfxFft_Fft_Job *outputJob = fft->job[1];
407
408 if (outputJob != NULL_PTR)
409 {
410 if (outputJob->nextJob != NULL_PTR)
411 {
412 IfxFft_Fft_Job *inputJob = fft->job[0];
413
414 if (inputJob != NULL_PTR)
415 {
416 IfxFft_Fft_startJob(inputJob);
417 }
418 else
419 {
420 if (fft->flags & IFXFFT_FFT_FLAG_DONE)
421 {
422 fft->flags = 0;
423 IfxFft_Fft_unloadOutput(outputJob);
424 fft->job[1] = outputJob->nextJob;
425 }
426 else
427 {
428 fft->flags = IFXFFT_FFT_FLAG_INPUT;
429 }
430 }
431 }
432 else
433 {
434 if (fft->flags & IFXFFT_FFT_FLAG_DONE)
435 {
436 fft->flags = 0;
437 IfxFft_Fft_unloadOutput(outputJob);
438 fft->job[1] = outputJob->nextJob;
439 }
440 else
441 {
442 fft->flags = IFXFFT_FFT_FLAG_INPUT;
443 }
444 }
445 }
446
447 #else
448 IfxFft_Fft_Job *outputJob = fft->job[0];
449
450 #if !IFXFFT_FFT_DMA_SUPPORT
451 IfxFft_Fft_unloadOutput(outputJob);
452 #endif
453
454 if (outputJob->nextJob != NULL_PTR)
455 {
456 boolean result = IfxFft_Fft_startJob(outputJob->nextJob);
457 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
458 }
459 else
460 {
461 fft->job[0] = NULL_PTR;
462 }
463
464 #endif
465 }
466
467
468 IFX_STATIC void IfxFft_Fft_loadInput(IfxFft_Fft_Job *job)
469 {
470 #if IFXFFT_FFT_DMA_SUPPORT
471
472 #if !IFXFFT_FFT_OPTIMIZED
473 IfxDma_Dma_Channel *dmaInput = &job->fft->inputDmaChannel;
474 Ifx_DMA *dmaSFR = dmaInput->dma;
475 #else
476 Ifx_DMA *dmaSFR = (&MODULE_DMA);
477 #endif
478 #if IFXFFT_FFT_HW_EXEC
479 #if IFXFFT_FFT_OPTIMIZED
480 IfxDma_setChannelSourceAddress(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT, job->inputPtr);
481 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT, job->count64.input);
482 IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT);
483 #else
484 IfxDma_setChannelSourceAddress(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID, job->inputPtr);
485 IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID, job->count64.input);
486 IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID);
487 #endif
488 #endif
489 #else
490 sint16 i;
491 const uint64 *input64 = job->inputPtr;
492
493 for (i = 0; i < job->count64.input; i++)
494 {
495 IFXFFT_FFT_DATA_TRANSFER = *(input64++);
496 }
497
498 for ( ; i < job->count64.expect; i++)
499 {
500 IFXFFT_FFT_DATA_TRANSFER = (uint64)0ULL;
501 }
502
503 #endif
504 }
505
506
507 void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
508 {
509 job->inputPtr = inputPtr;
510 job->outputPtr = outputPtr;
511 }
512
513
514 boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job)
515 {
516 IfxFft_Fft *fft = job->fft;
517 #if !IFXFFT_FFT_OPTIMIZED
518 Ifx_FFT *fftSFR = fft->fft;
519 #else
520 Ifx_FFT *fftSFR = (&MODULE_FFT);
521 #endif
522 boolean result = IfxFft_isReadyForStart(fftSFR);
523
524 if (result != FALSE)
525 {
526 IfxFft_Fft_triggerEngine(fftSFR, job->csr.U);
527 #if IFXFFT_FFT_PIPELINED
528
529 if (fft->job[1] == NULL_PTR)
530 {
531 fft->inputIdx = 0;
532 fft->intraIdx = 0;
533 fft->job[1] = job;
534 fft->flags = 0;
535 }
536
537 #endif
538 IfxFft_Fft_loadInput(job);
539
540 #if IFXFFT_FFT_PIPELINED
541 fft->job[0] = job->nextJob;
542 #else
543 fft->job[0] = job;
544 #endif
545 }
546
547 return result;
548 }
549
550
551 IFX_STATIC void IfxFft_Fft_calcCounters(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
552 {
553 uint16 shift;
554
555 /* input counters */
556 if (jobConfig->inputFormat == IfxFft_Input_complexSInt32)
557 {
558 shift = 0;
559 }
560 else if (jobConfig->inputFormat == IfxFft_Input_realSInt16)
561 {
562 shift = 2;
563 }
564 else
565 {
566 shift = 1;
567 }
568
569 uint16 fftLength = IfxFft_getLengthFromCode(jobConfig->fftLength);
570 #if IFXFFT_FFT_DMA_SUPPORT
571 job->count64.input = (jobConfig->inputLength >> shift) / IFXFFT_FFT_MOVE_DIV;
572 job->count64.expect = (fftLength >> shift) / IFXFFT_FFT_MOVE_DIV;
573 #else
574 job->count64.input = jobConfig->inputLength >> shift;
575 job->count64.expect = fftLength >> shift;
576 #endif
577 /* output counters */
578 shift = (jobConfig->outputFormat == IfxFft_Output_complexSInt32) ? 0 : 1;
579 #if IFXFFT_FFT_DMA_SUPPORT
580 job->count64.result = (fftLength >> shift) / IFXFFT_FFT_MOVE_DIV;
581 job->count64.output = (jobConfig->outputLength >> shift) / IFXFFT_FFT_MOVE_DIV;
582 #else
583 job->count64.result = fftLength >> shift;
584 job->count64.output = jobConfig->outputLength >> shift;
585 #endif
586 }
587
588
589 void IfxFft_Fft_isrIntra(IfxFft_Fft *fft)
590 {
591 #if IFXFFT_FFT_DMA_SUPPORT
592
593 # if IFXFFT_FFT_PIPELINED
594
595 if (fft->intraIdx == 0)
596 {
597 fft->flags = 0;
598 IfxFft_Fft_unloadOutput(fft->job[1]);
599 fft->job[1] = fft->job[1]->nextJob;
600 }
601 else
602 {
603 if (fft->flags & IFXFFT_FFT_FLAG_INPUT)
604 {
605 fft->flags = 0;
606 IfxFft_Fft_unloadOutput(fft->job[1]);
607 fft->job[1] = fft->job[1]->nextJob;
608 }
609 else
610 {
611 fft->flags = IFXFFT_FFT_FLAG_DONE;
612 }
613 }
614
615 fft->intraIdx++;
616 # else
617 IfxFft_Fft_unloadOutput(fft->job[0]);
618 # endif
619 #endif
620 }
621
622
623 void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
624 {
625 #if IFXFFT_FFT_DMA_SUPPORT
626 #if !IFXFFT_FFT_OPTIMIZED
627 Ifx_DMA *dmaSFR = &MODULE_DMA;
628 Ifx_FFT *fftSFR = config->fft;
629 IfxDma_Dma_Channel *inputDmaChannel = &fft->inputDmaChannel;
630 IfxDma_Dma_Channel *discardDmaChannel = &fft->discardDmaChannel;
631 IfxDma_Dma_Channel *outputDmaChannel = &fft->outputDmaChannel;
632 #else
633 Ifx_FFT *fftSFR = (&MODULE_FFT);
634 Ifx_DMA *dmaSFR = (&MODULE_DMA);
635 IfxDma_Dma_Channel dmaChannel;
636 IfxDma_Dma_Channel *inputDmaChannel = &dmaChannel;
637 IfxDma_Dma_Channel *discardDmaChannel = &dmaChannel;
638 IfxDma_Dma_Channel *outputDmaChannel = &dmaChannel;
639 #endif
640
641 IfxDma_Dma dma;
642 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
643
644 IfxDma_Dma_ChannelConfig dmaCfg;
645 IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
646
647 dmaCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
648 dmaCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
649 dmaCfg.moveSize = IFXFFT_FFT_MOVE_SIZE;
650 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
651 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
652
653 {
654 /* output channel */
655 dmaCfg.channelId = config->outputDmaChannelId;
656 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered via software
657 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
658
659 // source address is fixed; use circular mode to stay at this address for each move
660 dmaCfg.sourceAddress = IFXFFT_DATA_SPACE;
661 dmaCfg.sourceCircularBufferEnabled = TRUE;
662
663 // destination address and transfer count will be configured during runtime
664 dmaCfg.destinationAddress = 0;
665 dmaCfg.destinationCircularBufferEnabled = FALSE;
666 dmaCfg.transferCount = 0;
667
668 IfxDma_Dma_initChannel(outputDmaChannel, &dmaCfg);
669 }
670 {
671 /* discard channel, reuse most configuration of output channel */
672 dmaCfg.channelId = config->discardDmaChannelId;
673 dmaCfg.hardwareRequestEnabled = TRUE; // will be triggered via output DMA channel
674 IfxDma_Dma_initChannel(discardDmaChannel, &dmaCfg);
675 }
676 {
677 /* input channel */
678 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputDmaChannelId != config->outputDmaChannelId);
679 dmaCfg.channelId = config->inputDmaChannelId;
680 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered via software
681 #if IFXFFT_FFT_PIPELINED
682 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
683 #else
684 dmaCfg.channelInterruptEnabled = FALSE; // no interrupt at end of transaction
685 #endif
686 // source address and transfer count will be configured during runtime
687 dmaCfg.sourceAddress = 0;
688 dmaCfg.sourceCircularBufferEnabled = FALSE;
689 dmaCfg.transferCount = 0;
690
691 // destination address is fixed; use circular mode to stay at this address for each move
692 dmaCfg.destinationAddress = IFXFFT_DATA_SPACE;
693 dmaCfg.destinationCircularBufferEnabled = TRUE;
694
695 IfxDma_Dma_initChannel(inputDmaChannel, &dmaCfg);
696 }
697
698 {
699 volatile Ifx_SRC_SRCR *srcr;
700 #if IFXFFT_FFT_PIPELINED
701 //Route DMA input SRC to CPU as ISR input
702 srcr = IfxDma_getSrcPointer(dmaSFR, config->inputDmaChannelId);
703 IfxSrc_init(srcr, config->typeOfService, config->inputPriority);
704 IfxSrc_enable(srcr);
705 #endif
706 //Route FFT DONE SRC to CPU as ISR midjob
707 srcr = IfxFft_getSrcPointerDone(fftSFR);
708 IfxSrc_init(srcr, config->typeOfService, config->intraPriority);
709 IfxSrc_enable(srcr);
710
711 //Route output DMA request to discard DMA
712 srcr = IfxDma_getSrcPointer(dmaSFR, config->outputDmaChannelId);
713 IfxSrc_init(srcr, IfxSrc_Tos_dma, (Ifx_Priority)config->discardDmaChannelId);
714 IfxSrc_enable(srcr);
715 fft->srcrOutDis = srcr->B;
716
717 //Route DMA discard interrupt to CPU as ISR output
718 srcr = IfxDma_getSrcPointer(dmaSFR, config->discardDmaChannelId);
719 IfxSrc_init(srcr, config->typeOfService, config->outputPriority);
720 IfxSrc_enable(srcr);
721 fft->srcrOutEnd = srcr->B;
722 }
723 #endif
724 }
IfxFft_isModuleEnabled
IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft)
Returns the status of whether the module is enabled or not.
Definition: IfxFft.h:291
IfxFft_Fft_isrInput
void IfxFft_Fft_isrInput(IfxFft_Fft *fft)
ISR input routine.
Definition: IfxFft_Fft.c:360
IfxFft_Fft_calcCounters
IFX_STATIC void IfxFft_Fft_calcCounters(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Calculates the input counters and output counters.
Definition: IfxFft_Fft.c:551
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:476
IfxFft_Fft::job
IfxFft_Fft_Job * job[2]
FFT job handle.
Definition: IfxFft_Fft.h:233
IfxFft_Fft_modifyDataPointers
void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle.
Definition: IfxFft_Fft.c:507
IfxDma_ChannelOperationMode_continuous
channel stays enabled after transaction
Definition: IfxDma.h:171
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:483
IFXFFT_FFT_DMADISCARDCHANNELID
#define IFXFFT_FFT_DMADISCARDCHANNELID
Definition: IfxFft_Fft.c:45
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:466
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxFft_Input_realSInt16
4 real 16-bit data per 64-bit word
Definition: IfxFft.h:58
IfxFft_Fft_initJob
void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job.
Definition: IfxFft_Fft.c:215
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1625
IFXFFT_FFT_DMAINPUTCHANNELID_OPT
#define IFXFFT_FFT_DMAINPUTCHANNELID_OPT
Definition: IfxFft_Fft.c:43
IfxFft_Fft_initJobConfig
void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values.
Definition: IfxFft_Fft.c:245
IfxFft_Fft::discardDmaChannel
IfxDma_Dma_Channel discardDmaChannel
Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:227
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:159
IfxFft_Fft_Job_s::inputPtr
IFX_CONST void * inputPtr
Input pointer.
Definition: IfxFft_Fft.h:287
IfxFft_Fft_initModule
void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module.
Definition: IfxFft_Fft.c:260
IfxFft_Fft::outputDmaChannel
IfxDma_Dma_Channel outputDmaChannel
Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:226
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:467
IfxFft_Fft_JobConfig::outputLength
uint16 outputLength
Length of the output.
Definition: IfxFft_Fft.h:271
IfxFft_getSrcPointerDone
IFX_INLINE volatile Ifx_SRC_SRCR * IfxFft_getSrcPointerDone(Ifx_FFT *fft)
Returns the status of FFT DONE request.
Definition: IfxFft.h:265
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxFft_Fft::inputDmaChannel
IfxDma_Dma_Channel inputDmaChannel
Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:225
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IFXFFT_FFT_NUM_JOBS
#define IFXFFT_FFT_NUM_JOBS
Definition: IfxFft_cfg.h:65
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:488
IfxFft_Fft_Job_s::fft
IfxFft_Fft * fft
Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:285
IfxFft_Fft_JobConfig::outputFormat
IfxFft_Output outputFormat
Output format.
Definition: IfxFft_Fft.h:274
IfxFft_getLengthFromCode
IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length)
Retruns the actual length of the transform from the length code.
Definition: IfxFft.h:253
IfxFft_Fft::srcrOutDis
Ifx_SRC_SRCR_Bits srcrOutDis
Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:231
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1663
IfxFft_Fft_Job_s
FFT job handle.
Definition: IfxFft_Fft.h:283
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:489
IfxFft_enableModule
IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
Enables the FFT module and also the LMU interface.
Definition: IfxFft.h:225
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxFft_Fft_Config::outputPriority
Ifx_Priority outputPriority
"output unloading finished" interrupt priority
Definition: IfxFft_Fft.h:258
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:480
IFXFFT_FFT_MOVE_SIZE
#define IFXFFT_FFT_MOVE_SIZE
Definition: IfxFft_Fft.c:53
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxFft_Fft_Config::lmu
Ifx_LMU * lmu
Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:255
IfxFft_Fft
Module handle.
Definition: IfxFft_Fft.h:221
IfxFft_Fft_Config
Configuration structure of the module.
Definition: IfxFft_Fft.h:252
IfxFft_Fft_Count64::input
uint16 input
Input count.
Definition: IfxFft_Fft.h:240
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxFft_Fft_isrOutput
void IfxFft_Fft_isrOutput(IfxFft_Fft *fft)
ISR output routine.
Definition: IfxFft_Fft.c:403
IfxFft_Fft::srcrOutEnd
Ifx_SRC_SRCR_Bits srcrOutEnd
Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:232
sint16
short sint16
Definition: Platform_Types.h:126
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1510
IfxFft_Input_complexSInt32
1 complex 32-bit data per 64-bit word
Definition: IfxFft.h:55
IFXFFT_FFT_FLAG_DONE
#define IFXFFT_FFT_FLAG_DONE
Definition: IfxFft_Fft.h:203
IfxFft_Length_256
transform of 256
Definition: IfxFft.h:72
IFXFFT_FFT_DATA_TRANSFER
#define IFXFFT_FFT_DATA_TRANSFER
Definition: IfxFft_Fft.c:35
IfxFft_Fft::inputIdx
uint32 inputIdx
Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:229
IFXFFT_MAX_WINDOW_LENGTH
#define IFXFFT_MAX_WINDOW_LENGTH
Definition: IfxFft_cfg.h:55
IfxFft_Output_complexSInt32
1 complex 32-bit data per 64-bit word
Definition: IfxFft.h:91
IfxFft_Fft_startJob
boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job)
Starts the FFT job.
Definition: IfxFft_Fft.c:514
IfxFft_Fft_cloneAndLinkJobs
void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs.
Definition: IfxFft_Fft.c:128
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:472
IfxFft_Fft_Job_s::csr
Ifx_FFT_CSR csr
FFT.CSR register duplicate.
Definition: IfxFft_Fft.h:286
IfxFft_isEngineBusy
IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft)
Returns the status of whether the FFT Engine is Idle or has at least one transform in operation...
Definition: IfxFft.h:285
IfxFft_Fft_Config::typeOfService
IfxSrc_Tos typeOfService
Type of interrupt service.
Definition: IfxFft_Fft.h:259
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
IFXFFT_FFT_DMADISCARDCHANNELID_OPT
#define IFXFFT_FFT_DMADISCARDCHANNELID_OPT
Definition: IfxFft_Fft.c:39
IfxDma_Dma_Channel::dma
Ifx_DMA * dma
Specifies the pointer to the DMA registers.
Definition: IfxDma_Dma.h:456
IfxFft_Operation_fft
perform FFT
Definition: IfxFft.h:82
IFXFFT_FFT_DMAINPUTCHANNELID
#define IFXFFT_FFT_DMAINPUTCHANNELID
Definition: IfxFft_Fft.c:49
IfxFft_Fft_isrIntra
void IfxFft_Fft_isrIntra(IfxFft_Fft *fft)
Definition: IfxFft_Fft.c:589
IFXFFT_MAX_LENGTH
#define IFXFFT_MAX_LENGTH
Maximim possible length of the transform.
Definition: IfxFft_cfg.h:53
IfxFft_Fft_JobConfig::inputFormat
IfxFft_Input inputFormat
Input format.
Definition: IfxFft_Fft.h:273
IfxFft_Fft_Job_s::count64
IfxFft_Fft_Count64 count64
Counters.
Definition: IfxFft_Fft.h:289
IfxFft_Fft_initWindow
void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer.
Definition: IfxFft_Fft.c:336
IfxFft_Fft_Count64::expect
uint16 expect
Padding.
Definition: IfxFft_Fft.h:241
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:104
IfxFft_Input_realSInt32
2 real 32-bit data per 64-bit word
Definition: IfxFft.h:56
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxFft_Fft_triggerEngine
IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr)
Definition: IfxFft_Fft.h:435
__debug
void __debug(void) __attribute__((intrinsic_function(0x103
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:443
IfxFft_Fft::intraIdx
uint32 intraIdx
Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:230
IfxFft_Fft_Config::intraPriority
Ifx_Priority intraPriority
"intra transfer" interrupt priority
Definition: IfxFft_Fft.h:257
IfxFft_Fft_Job_s::outputPtr
void * outputPtr
Output pointer.
Definition: IfxFft_Fft.h:288
IfxFft_Fft.h
FFT FFT details.
IfxFft_Fft_JobConfig
Configuration structure for the FFT job.
Definition: IfxFft_Fft.h:267
IfxFft_Fft_unloadOutput
IFX_STATIC void IfxFft_Fft_unloadOutput(IfxFft_Fft_Job *job)
Unloads output data from the FFT engine.
Definition: IfxFft_Fft.c:135
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1648
IfxFft_Fft_JobConfig::inputLength
uint16 inputLength
Length of the input.
Definition: IfxFft_Fft.h:270
IfxFft_Fft_Job_s::nextJob
IfxFft_Fft_Job * nextJob
Pointer to the next job.
Definition: IfxFft_Fft.h:290
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:475
IfxFft_isReadyForStart
IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft)
Returns the status of whether the module can accept a START operation or not.
Definition: IfxFft.h:309
IFXFFT_WINDOW_SPACE
#define IFXFFT_WINDOW_SPACE
Window coefficient space starting address.
Definition: IfxFft_cfg.h:49
IFXFFT_FFT_MOVE_DIV
#define IFXFFT_FFT_MOVE_DIV
Definition: IfxFft_Fft.c:55
IfxFft_Fft_initDma
void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialization of DMA.
Definition: IfxFft_Fft.c:623
IfxFft_Fft_Count64::result
uint16 result
Discard.
Definition: IfxFft_Fft.h:243
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:463
IfxFft_Fft_JobConfig::useWindowFunction
boolean useWindowFunction
Selection to use window function.
Definition: IfxFft_Fft.h:276
IfxFft_Fft_dummy256
IFX_STATIC uint64 IfxFft_Fft_dummy256[IFXFFT_FFT_MOVE_DIV]
Definition: IfxFft_Fft.c:110
IfxFft_Fft_JobConfig::fftLength
IfxFft_Length fftLength
Length of the transform.
Definition: IfxFft_Fft.h:272
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:124
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1566
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IFXFFT_FFT_DMA_CHANNEL_BASE
#define IFXFFT_FFT_DMA_CHANNEL_BASE
Definition: IfxFft_cfg.h:61
IfxFft_Fft_calcCSR
IFX_STATIC uint32 IfxFft_Fft_calcCSR(const IfxFft_Fft_JobConfig *config)
Configures the CSR register.
Definition: IfxFft_Fft.c:116
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:87
IfxFft_Fft_initModuleConfig
void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values.
Definition: IfxFft_Fft.c:310
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:468
IfxFft_Fft_Config::inputDmaChannelId
IfxDma_ChannelId inputDmaChannelId
Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:260
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:474
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:486
IFXFFT_FFT_ISALIGNED
#define IFXFFT_FFT_ISALIGNED(address)
Definition: IfxFft_Fft.c:57
IfxFft_Fft_Count64::output
uint16 output
Output count.
Definition: IfxFft_Fft.h:242
IfxFft_Fft_Config::outputDmaChannelId
IfxDma_ChannelId outputDmaChannelId
Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:261
IfxFft_Fft_Config::inputPriority
Ifx_Priority inputPriority
"input loading finished" interrupt priority
Definition: IfxFft_Fft.h:256
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:493
IfxFft_Fft::flags
uint32 flags
Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:228
TRUE
#define TRUE
Definition: Platform_Types.h:87
IFXFFT_DATA_SPACE
#define IFXFFT_DATA_SPACE
Data space starting address.
Definition: IfxFft_cfg.h:45
IFXFFT_FFT_DMAOUTPUTCHANNELID
#define IFXFFT_FFT_DMAOUTPUTCHANNELID
Definition: IfxFft_Fft.c:47
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:454
IfxFft_Fft_JobConfig::operation
IfxFft_Operation operation
Operation (FFT / IFFT)
Definition: IfxFft_Fft.h:275
IFXFFT_FFT_FLAG_INPUT
#define IFXFFT_FFT_FLAG_INPUT
Definition: IfxFft_Fft.h:201
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxFft_Fft_Config::fft
Ifx_FFT * fft
Pointer to FFT registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:254
IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT
#define IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT
Definition: IfxFft_Fft.c:41
IfxFft_Fft_Config::discardDmaChannelId
IfxDma_ChannelId discardDmaChannelId
DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) ...
Definition: IfxFft_Fft.h:262
IfxFft_Fft_loadInput
IFX_STATIC void IfxFft_Fft_loadInput(IfxFft_Fft_Job *job)
Loads input data into the FFT engine.
Definition: IfxFft_Fft.c:468
IfxDma_ChannelRequestMode_completeTransactionPerRequest
a request initiates a complete transaction
Definition: IfxDma.h:204
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:86


iLLD_TC26B: IfxFft_Fft.h Source File

  • Fft
  • Fft
IfxFft_Fft.h
Go to the documentation of this file.
1 /**
2 * \file IfxFft_Fft.h
3 * \brief FFT FFT details
4 * \ingroup IfxLld_Fft
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Fft_Fft_Usage How to use the FFT driver?
25 * \ingroup IfxLld_Fft
26 *
27 * The FFT interface driver provides a default FFT configuration for calculating forward and inverse FFTs of lengths 8 to 1024 (powers of 2 only) of real or complex input operands.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework.
30 *
31 * \section IfxLld_Fft_Fft_Preparation Preparation
32 * \subsection IfxLld_Fft_Fft_Include Include Files
33 *
34 * Include following header file into your C code:
35 *
36 * \code
37 * #include <Fft/Fft/IfxFft_Fft.h>
38 * \endcode
39 *
40 * \subsection IfxLld_Fft_Fft_Variables Variables
41 *
42 * Declare the FFT handle, FFT job handle and the input output locations as global variables in your C code:
43 *
44 * \code
45 * // FFT window length
46 * #define FFT_LENGTH 512
47 *
48 * // source waveform (must be 256bit aligned!)
49 * __attribute__ ((aligned(256))) sint32 fftIn[FFT_LENGTH] = {
50 * #include "sinewave.inc"
51 * };
52 *
53 * // FFT result (must be 256bit aligned!)
54 * __attribute__ ((aligned(256))) sint32 fftOut[FFT_LENGTH*2];
55 *
56 * // used globally
57 * IfxFft_Fft fft;
58 * IfxFft_Fft_Job fftJob;
59 *
60 * volatile uint32 fftInterruptCounter;
61 * \endcode
62 *
63 * \subsection IfxLld_Fft_Fft_Interrupt Interrupt Handler Installation
64 *
65 * See also \ref IfxLld_Cpu_Irq_Usage
66 *
67 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
68 * \code
69 * // priorities are normally defined in Ifx_IntPrioDef.h
70 * #define ISR_PRIORITY_FFT_OUTPUT 1
71 * #define ISR_PRIORITY_FFT_INPUT 2
72 * #define ISR_PRIORITY_FFT_INTRA 3
73 * \endcode
74 *
75 * Add the interrupt service routines to your C code. They have to call the FFT interrupt handlers by passing the fftJob handle:
76 * \code
77 * IFX_INTERRUPT(ISR_Fft_intra, 0, ISR_PRIORITY_FFT_INTRA)
78 * {
79 * IfxFft_Fft_isrIntra(&fft);
80 * }
81 *
82 * IFX_INTERRUPT(ISR_Fft_input, 0, ISR_PRIORITY_FFT_INPUT)
83 * {
84 * IfxFft_Fft_isrInput(&fft);
85 * }
86 *
87 * IFX_INTERRUPT(ISR_Fft_output, 0, ISR_PRIORITY_FFT_output)
88 * {
89 * ++fftInterruptCounter;
90 *
91 * IfxFft_Fft_isrOutput(&fft);
92 *
93 * // do the next transform:
94 * while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
95 * }
96 * \endcode
97 *
98 * Finally install the interrupt handlers in your initialisation function:
99 * \code
100 * // install interrupt handlers
101 * IfxCpu_Irq_installInterruptHandler(&ISR_Fft_input, ISR_PRIORITY_FFT_INPUT);
102 * IfxCpu_Irq_installInterruptHandler(&ISR_Fft_output, ISR_PRIORITY_FFT_OUTPUT);
103 * IfxCpu_enableInterrupts();
104 * \endcode
105 *
106 * \subsection IfxLld_Fft_Fft_InitModule Module Initialisation
107 *
108 * The module initialisation can be done in the same function. Here an example:
109 * \code
110 * // create module config
111 * IfxFft_Fft_Config fftConfig;
112 * IfxFft_Fft_initModuleConfig(&fftConfig, &MODULE_FFT, &MODULE_LMU);
113 *
114 * // configure interrupts
115 * fftConfig.inputPriority = ISR_PRIORITY_FFT_INPUT;
116 * fftConfig.intraPriority = ISR_PRIORITY_FFT_INTRA;
117 * fftConfig.outputPriority = ISR_PRIORITY_FFT_OUTPUT;
118 * fftConfig.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
119 *
120 * // use DMA channels for input/output transfers
121 * fftConfig.inputDmaChannelId = IfxDma_ChannelId_4;
122 * fftConfig.outputDmaChannelId = IfxDma_ChannelId_5;
123 * fftConfig.discardDmaChannelId = IfxDma_ChannelId_6;
124 *
125 * // initialize module
126 * // IfxFft_Fft fft; // defined globally
127 * IfxFft_Fft_initModule(&fft, &fftConfig);
128 * \endcode
129 *
130 * \subsection IfxLld_Fft_Fft_InitJob Job Initialisation
131 *
132 * The FFT job initialisation can also be done in the same function. Here an example:
133 * \code
134 * // create FFT job config
135 * IfxFft_Fft_JobConfig fftJobConfig;
136 * IfxFft_Fft_initJobConfig(&fftJobConfig, &fft);
137 *
138 * // customize job
139 * fftJobConfig.fftLength = IfxFft_Length_512;
140 *
141 * fftJobConfig.inputFormat = IfxFft_Input_realSInt32;
142 * fftJobConfig.inputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftIn);
143 * fftJobConfig.inputLength = FFT_LENGTH;
144 *
145 * fftJobConfig.outputFormat = IfxFft_Output_complexSInt32;
146 * fftJobConfig.outputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftOut);
147 * fftJobConfig.outputLength = FFT_LENGTH;
148 *
149 * // initialize FFT job
150 * // IfxFft_Fft_Job fftJob; // defined globally
151 * IfxFft_Fft_initJob(&fftJob, &fftJobConfig);
152 * \endcode
153 *
154 * The FFT is ready for use now!
155 *
156 *
157 * \section IfxLld_Fft_Fft_TransformFunctions Transform Functions
158 *
159 * The FFT driver provides simple function to perform the transforms.
160 *
161 * This means: you only have to start the FFT job with pre configured job handle and the transform will be done automatically by the FFT engine and an interrupt will be raised, indicating the end of treansform(DONE).
162 *
163 * \code
164 * // start job until return TRUE.
165 * while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
166 *
167 * // wait for 3 interrupts
168 * while( fftInterruptCounter < 3 );
169 * \endcode
170 *
171 * \defgroup IfxLld_Fft_Fft FFT
172 * \ingroup IfxLld_Fft
173 * \defgroup IfxLld_Fft_Fft_DataStructures Data Structures
174 * \ingroup IfxLld_Fft_Fft
175 * \defgroup IfxLld_Fft_Fft_ModuleFunctions Module Functions
176 * \ingroup IfxLld_Fft_Fft
177 * \defgroup IfxLld_Fft_Fft_InterruptFunctions Interrupt Functions
178 * \ingroup IfxLld_Fft_Fft
179 * \defgroup IfxLld_Fft_Fft_TransformFuntions Transform Funtions
180 * \ingroup IfxLld_Fft_Fft
181 */
182
183 #ifndef IFXFFT_FFT_H
184 #define IFXFFT_FFT_H 1
185
186 /******************************************************************************/
187 /*----------------------------------Includes----------------------------------*/
188 /******************************************************************************/
189
190 #include "_Utilities/Ifx_Assert.h"
191 #include "IfxFft_bf.h"
192 #include "Fft/Std/IfxFft.h"
193 #include "Dma/Dma/IfxDma_Dma.h"
194 #include "Scu/Std/IfxScuWdt.h"
195 #include "Cpu/Std/IfxCpu.h"
196
197 /******************************************************************************/
198 /*-----------------------------------Macros-----------------------------------*/
199 /******************************************************************************/
200
201 #define IFXFFT_FFT_FLAG_INPUT (1)
202
203 #define IFXFFT_FFT_FLAG_DONE (2)
204
205 #define IFXFFT_FFT_HW_EXEC (1)
206
207 /******************************************************************************/
208 /*------------------------------Type Definitions------------------------------*/
209 /******************************************************************************/
210
211 typedef struct IfxFft_Fft_Job_s IfxFft_Fft_Job;
212
213 /******************************************************************************/
214 /*-----------------------------Data Structures--------------------------------*/
215 /******************************************************************************/
216
217 /** \addtogroup IfxLld_Fft_Fft_DataStructures
218 * \{ */
219 /** \brief Module handle
220 */
221 typedef struct
222 {
223 Ifx_FFT *fft; /**< \brief Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0) */
224 Ifx_LMU *lmu; /**< \brief Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
225 IfxDma_Dma_Channel inputDmaChannel; /**< \brief Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
226 IfxDma_Dma_Channel outputDmaChannel; /**< \brief Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
227 IfxDma_Dma_Channel discardDmaChannel; /**< \brief Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
228 uint32 flags; /**< \brief Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
229 uint32 inputIdx; /**< \brief Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
230 uint32 intraIdx; /**< \brief Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
231 Ifx_SRC_SRCR_Bits srcrOutDis; /**< \brief Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
232 Ifx_SRC_SRCR_Bits srcrOutEnd; /**< \brief Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
233 IfxFft_Fft_Job *job[2]; /**< \brief FFT job handle */
234 } IfxFft_Fft;
235
236 /** \brief Structure for counters
237 */
238 typedef struct
239 {
240 uint16 input; /**< \brief Input count */
241 uint16 expect; /**< \brief Padding */
242 uint16 output; /**< \brief Output count */
243 uint16 result; /**< \brief Discard */
244 } IfxFft_Fft_Count64;
245
246 /** \} */
247
248 /** \addtogroup IfxLld_Fft_Fft_DataStructures
249 * \{ */
250 /** \brief Configuration structure of the module
251 */
252 typedef struct
253 {
254 Ifx_FFT *fft; /**< \brief Pointer to FFT registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
255 Ifx_LMU *lmu; /**< \brief Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
256 Ifx_Priority inputPriority; /**< \brief "input loading finished" interrupt priority */
257 Ifx_Priority intraPriority; /**< \brief "intra transfer" interrupt priority */
258 Ifx_Priority outputPriority; /**< \brief "output unloading finished" interrupt priority */
259 IfxSrc_Tos typeOfService; /**< \brief Type of interrupt service */
260 IfxDma_ChannelId inputDmaChannelId; /**< \brief Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
261 IfxDma_ChannelId outputDmaChannelId; /**< \brief Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
262 IfxDma_ChannelId discardDmaChannelId; /**< \brief DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
263 } IfxFft_Fft_Config;
264
265 /** \brief Configuration structure for the FFT job
266 */
267 typedef struct
268 {
269 IfxFft_Fft *fft; /**< \brief Pointer To FFT.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
270 uint16 inputLength; /**< \brief Length of the input */
271 uint16 outputLength; /**< \brief Length of the output */
272 IfxFft_Length fftLength; /**< \brief Length of the transform */
273 IfxFft_Input inputFormat; /**< \brief Input format */
274 IfxFft_Output outputFormat; /**< \brief Output format */
275 IfxFft_Operation operation; /**< \brief Operation (FFT / IFFT) */
276 boolean useWindowFunction; /**< \brief Selection to use window function */
277 IFX_CONST void *inputPtr; /**< \brief Pointer to input data */
278 void *outputPtr; /**< \brief Pointer to output data */
279 } IfxFft_Fft_JobConfig;
280
281 /** \brief FFT job handle
282 */
283 struct IfxFft_Fft_Job_s
284 {
285 IfxFft_Fft *fft; /**< \brief Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0) */
286 Ifx_FFT_CSR csr; /**< \brief FFT.CSR register duplicate */
287 IFX_CONST void *inputPtr; /**< \brief Input pointer */
288 void *outputPtr; /**< \brief Output pointer */
289 IfxFft_Fft_Count64 count64; /**< \brief Counters */
290 IfxFft_Fft_Job *nextJob; /**< \brief Pointer to the next job */
291 };
292
293 /** \} */
294
295 /** \addtogroup IfxLld_Fft_Fft_ModuleFunctions
296 * \{ */
297
298 /******************************************************************************/
299 /*-------------------------Global Function Prototypes-------------------------*/
300 /******************************************************************************/
301
302 /** \brief Initialises the module
303 * \param fft Module handle
304 * \param config Configuration structure of the module
305 * \return None
306 *
307 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
308 *
309 */
310 IFX_EXTERN void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config);
311
312 /** \brief Fills the config structure with default values
313 * \param config Configuration structure of the module
314 * \param fft Pointer to FFT registers
315 * \param lmu Pointer to LMU registers
316 * \return None
317 *
318 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
319 *
320 */
321 IFX_EXTERN void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu);
322
323 /** \} */
324
325 /** \addtogroup IfxLld_Fft_Fft_InterruptFunctions
326 * \{ */
327
328 /******************************************************************************/
329 /*-------------------------Global Function Prototypes-------------------------*/
330 /******************************************************************************/
331
332 /** \brief ISR input routine
333 * \param fft Module handle
334 * \return None
335 */
336 IFX_EXTERN void IfxFft_Fft_isrInput(IfxFft_Fft *fft);
337
338 /** \brief ISR output routine
339 * \param fft Module handle
340 * \return None
341 */
342 IFX_EXTERN void IfxFft_Fft_isrOutput(IfxFft_Fft *fft);
343
344 /** \} */
345
346 /** \addtogroup IfxLld_Fft_Fft_TransformFuntions
347 * \{ */
348
349 /******************************************************************************/
350 /*-------------------------Global Function Prototypes-------------------------*/
351 /******************************************************************************/
352
353 /** \brief Clones and links the jobs
354 * \param originalJob Current (original)FFT job handle
355 * \param newJob Modified (new) FFT job handle
356 * \return None
357 */
358 IFX_EXTERN void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob);
359
360 /** \brief Initialises the FFT job
361 * \param job FFT job handle
362 * \param jobConfig Configuration structure for the FFT job
363 * \return None
364 *
365 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
366 *
367 */
368 IFX_EXTERN void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig);
369
370 /** \brief Fills the job configuration structure with default values
371 * \param config Configuration structure for the FFT job
372 * \param fft Module handle
373 * \return None
374 *
375 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
376 *
377 */
378 IFX_EXTERN void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft);
379
380 /** \brief Initialises the window transfer
381 * \param fft Module handle
382 * \param windowData Window data
383 * \return None
384 */
385 IFX_EXTERN void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData);
386
387 /** \brief Updates the input and output pointers in the FFT job handle
388 * \param job FFT job handle
389 * \param inputPtr Input pointer
390 * \param outputPtr Output pointer
391 * \return None
392 */
393 IFX_EXTERN void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr);
394
395 /** \brief Starts the FFT job
396 * \param job FFT job handle
397 * \return Module's ready for start (RFS) status (true / false)
398 *
399 * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
400 *
401 */
402 IFX_EXTERN boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job);
403
404 /** \} */
405
406 /******************************************************************************/
407 /*-------------------------Inline Function Prototypes-------------------------*/
408 /******************************************************************************/
409
410 /**
411 * \return None
412 */
413 IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr);
414
415 /******************************************************************************/
416 /*-------------------------Global Function Prototypes-------------------------*/
417 /******************************************************************************/
418
419 /**
420 * \return None
421 */
422 IFX_EXTERN void IfxFft_Fft_isrIntra(IfxFft_Fft *fft);
423
424 /** \brief Initialization of DMA
425 * \param fft fft Module handle
426 * \param config pointing to config strucuture of fft
427 * \return None
428 */
429 IFX_EXTERN void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config);
430
431 /******************************************************************************/
432 /*---------------------Inline Function Implementations------------------------*/
433 /******************************************************************************/
434
435 IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr)
436 {
437 #if IFXFFT_FFT_HW_EXEC
438 fft->CSR.U = csr | (IFX_FFT_CSR_START_MSK << IFX_FFT_CSR_START_OFF);
439 #endif
440 }
441
442
443 #endif /* IFXFFT_FFT_H */
IfxFft_Fft_isrInput
IFX_EXTERN void IfxFft_Fft_isrInput(IfxFft_Fft *fft)
ISR input routine.
Definition: IfxFft_Fft.c:360
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxFft_Fft_modifyDataPointers
IFX_EXTERN void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
Updates the input and output pointers in the FFT job handle.
Definition: IfxFft_Fft.c:507
IfxFft_Fft_initJob
IFX_EXTERN void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
Initialises the FFT job.
Definition: IfxFft_Fft.c:215
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxFft_Fft_initJobConfig
IFX_EXTERN void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
Fills the job configuration structure with default values.
Definition: IfxFft_Fft.c:245
IfxFft_Fft::discardDmaChannel
IfxDma_Dma_Channel discardDmaChannel
Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:227
IfxFft_Fft_JobConfig::inputPtr
IFX_CONST void * inputPtr
Pointer to input data.
Definition: IfxFft_Fft.h:277
IfxFft_Fft_initModule
IFX_EXTERN void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialises the module.
Definition: IfxFft_Fft.c:260
IfxFft_Fft::outputDmaChannel
IfxDma_Dma_Channel outputDmaChannel
Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:226
IfxDma_Dma.h
DMA DMA details.
IfxFft_Fft_JobConfig::outputLength
uint16 outputLength
Length of the output.
Definition: IfxFft_Fft.h:271
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxFft_Fft::inputDmaChannel
IfxDma_Dma_Channel inputDmaChannel
Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) ...
Definition: IfxFft_Fft.h:225
Ifx_Assert.h
Assert functions.
IfxFft_Fft_JobConfig::fft
IfxFft_Fft * fft
Pointer To FFT.Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:269
IfxFft_Fft_JobConfig::outputFormat
IfxFft_Output outputFormat
Output format.
Definition: IfxFft_Fft.h:274
IfxFft_Fft::srcrOutDis
Ifx_SRC_SRCR_Bits srcrOutDis
Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:231
IfxFft_Fft_Job_s
FFT job handle.
Definition: IfxFft_Fft.h:283
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxFft_Fft_Config::outputPriority
Ifx_Priority outputPriority
"output unloading finished" interrupt priority
Definition: IfxFft_Fft.h:258
IfxFft_Fft::lmu
Ifx_LMU * lmu
Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:224
IfxFft_Fft
Module handle.
Definition: IfxFft_Fft.h:221
IfxFft_Fft_Config
Configuration structure of the module.
Definition: IfxFft_Fft.h:252
IfxFft_Fft_isrIntra
IFX_EXTERN void IfxFft_Fft_isrIntra(IfxFft_Fft *fft)
Definition: IfxFft_Fft.c:589
IfxFft_Fft_Count64::input
uint16 input
Input count.
Definition: IfxFft_Fft.h:240
IfxFft_Fft_isrOutput
IFX_EXTERN void IfxFft_Fft_isrOutput(IfxFft_Fft *fft)
ISR output routine.
Definition: IfxFft_Fft.c:403
IfxFft_Operation
IfxFft_Operation
Operation (FFT / IFFT) Definition in Ifx_FFT.CSR.B.IFFT.
Definition: IfxFft.h:80
IfxScuWdt.h
SCU basic functionality.
IfxFft_Fft::srcrOutEnd
Ifx_SRC_SRCR_Bits srcrOutEnd
Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:232
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxFft_Fft::inputIdx
uint32 inputIdx
Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:229
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxFft_Output
IfxFft_Output
Output format Definition in Ifx_FFT.CSR.B.OUT.FMT.
Definition: IfxFft.h:89
IfxFft_Fft_startJob
IFX_EXTERN boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job)
Starts the FFT job.
Definition: IfxFft_Fft.c:514
IfxFft_Fft_cloneAndLinkJobs
IFX_EXTERN void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
Clones and links the jobs.
Definition: IfxFft_Fft.c:128
IfxFft_Fft_Job_s::csr
Ifx_FFT_CSR csr
FFT.CSR register duplicate.
Definition: IfxFft_Fft.h:286
IfxFft_Fft_Config::typeOfService
IfxSrc_Tos typeOfService
Type of interrupt service.
Definition: IfxFft_Fft.h:259
IfxFft.h
FFT basic functionality.
IfxFft_Fft_JobConfig::inputFormat
IfxFft_Input inputFormat
Input format.
Definition: IfxFft_Fft.h:273
IfxFft_Fft_Job_s::count64
IfxFft_Fft_Count64 count64
Counters.
Definition: IfxFft_Fft.h:289
IfxFft_Fft_initWindow
IFX_EXTERN void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData)
Initialises the window transfer.
Definition: IfxFft_Fft.c:336
IfxFft_Fft_Count64::expect
uint16 expect
Padding.
Definition: IfxFft_Fft.h:241
IfxFft_Fft_triggerEngine
IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr)
Definition: IfxFft_Fft.h:435
IfxFft_Fft::intraIdx
uint32 intraIdx
Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:230
IfxFft_Fft_Config::intraPriority
Ifx_Priority intraPriority
"intra transfer" interrupt priority
Definition: IfxFft_Fft.h:257
IfxFft_Fft_JobConfig::outputPtr
void * outputPtr
Pointer to output data.
Definition: IfxFft_Fft.h:278
IfxFft_Length
IfxFft_Length
Length of transform. Log base 2 of the required transform size. Length must be between 3 (transform o...
Definition: IfxFft.h:65
IfxFft_Fft_JobConfig
Configuration structure for the FFT job.
Definition: IfxFft_Fft.h:267
IfxFft_Fft_JobConfig::inputLength
uint16 inputLength
Length of the input.
Definition: IfxFft_Fft.h:270
IfxCpu.h
CPU basic functionality.
IfxFft_Fft_Job_s::nextJob
IfxFft_Fft_Job * nextJob
Pointer to the next job.
Definition: IfxFft_Fft.h:290
IfxFft_Fft_Count64::result
uint16 result
Discard.
Definition: IfxFft_Fft.h:243
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxFft_Fft_initDma
IFX_EXTERN void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
Initialization of DMA.
Definition: IfxFft_Fft.c:623
IfxFft_Fft_JobConfig::useWindowFunction
boolean useWindowFunction
Selection to use window function.
Definition: IfxFft_Fft.h:276
IfxFft_Fft_JobConfig::fftLength
IfxFft_Length fftLength
Length of the transform.
Definition: IfxFft_Fft.h:272
IfxFft_Fft_Count64
Structure for counters.
Definition: IfxFft_Fft.h:238
IfxFft_Input
IfxFft_Input
Input format Definition in Ifx_FFT.CSR.B.IN.FMT.
Definition: IfxFft.h:53
IfxFft_Fft_initModuleConfig
IFX_EXTERN void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
Fills the config structure with default values.
Definition: IfxFft_Fft.c:310
IfxFft_Fft_Config::inputDmaChannelId
IfxDma_ChannelId inputDmaChannelId
Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:260
IfxFft_Fft_Count64::output
uint16 output
Output count.
Definition: IfxFft_Fft.h:242
IfxFft_Fft_Config::outputDmaChannelId
IfxDma_ChannelId outputDmaChannelId
Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:261
IfxFft_Fft_Config::inputPriority
Ifx_Priority inputPriority
"input loading finished" interrupt priority
Definition: IfxFft_Fft.h:256
IfxFft_Fft::flags
uint32 flags
Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0)
Definition: IfxFft_Fft.h:228
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:454
IfxFft_Fft_JobConfig::operation
IfxFft_Operation operation
Operation (FFT / IFFT)
Definition: IfxFft_Fft.h:275
IfxFft_Fft::fft
Ifx_FFT * fft
Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0)
Definition: IfxFft_Fft.h:223
IfxFft_Fft_Config::discardDmaChannelId
IfxDma_ChannelId discardDmaChannelId
DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) ...
Definition: IfxFft_Fft.h:262


iLLD_TC26B: IfxFft_cfg.h Source File

  • _Impl
IfxFft_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxFft_cfg.h
3 * \brief FFT on-chip implementation data
4 * \ingroup IfxLld_Fft
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Fft FFT
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Fft_Impl Implementation
27 * \ingroup IfxLld_Fft
28 * \defgroup IfxLld_Fft_Std Standard Driver
29 * \ingroup IfxLld_Fft
30 */
31
32 #ifndef IFXFFT_CFG_H
33 #define IFXFFT_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 /******************************************************************************/
40 /*-----------------------------------Macros-----------------------------------*/
41 /******************************************************************************/
42
43 /** \brief Data space starting address
44 */
45 #define IFXFFT_DATA_SPACE 0xBE000000U
46
47 /** \brief Window coefficient space starting address
48 */
49 #define IFXFFT_WINDOW_SPACE 0xBE100000U
50
51 /** \brief Maximim possible length of the transform
52 */
53 #define IFXFFT_MAX_LENGTH 2048
54
55 #define IFXFFT_MAX_WINDOW_LENGTH (IFXFFT_MAX_LENGTH / 2)
56
57 #define IFXFFT_FFT_DMA_SUPPORT (1)
58
59 #define IFXFFT_FFT_OPTIMIZED (0)
60
61 #define IFXFFT_FFT_DMA_CHANNEL_BASE 4
62
63 #define IFXFFT_FFT_PIPELINED (1)
64
65 #define IFXFFT_FFT_NUM_JOBS (8)
66
67 #define IFXFFT_NUM_MODULES (1)
68
69 #endif /* IFXFFT_CFG_H */


iLLD_TC26B: IfxFlash.c Source File

  • Flash
  • Std
IfxFlash.c
Go to the documentation of this file.
1 /**
2 * \file IfxFlash.c
3 * \brief FLASH basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxFlash.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId)
37 {
38 MODULE_FLASH0.CBAB[portId].CFG.B.CLR = 1;
39 }
40
41
42 void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId)
43 {
44 MODULE_FLASH0.UBAB[portId].CFG.B.CLR = 1;
45 }
46
47
48 void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
49 {
50 MODULE_FLASH0.CBAB[portId].CFG.B.DIS = disable;
51 }
52
53
54 void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
55 {
56 MODULE_FLASH0.UBAB[portId].CFG.B.DIS = disable;
57 }
58
59
60 void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
61 {
62 IFX_UNUSED_PARAMETER(flash);
63 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x553c);
64 uint32 i;
65
66 *addr1 = ucb;
67
68 for (i = 0; i < 8; i++)
69 {
70 *addr1 = password[i];
71 }
72
73 __dsync();
74 }
75
76
77 uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
78 {
79 uint32 numErrors = 0;
80 uint32 fillingLevel = MODULE_FLASH0.CBAB[portId].STAT.U;
81
82 int i;
83
84 for (i = 0;
85 i < IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS &&
86 (fillingLevel & (1 << i)) != 0;
87 ++i)
88 {
89 Ifx_FLASH_CBAB_TOP top;
90 top.U = MODULE_FLASH0.CBAB[portId].TOP.U;
91
92 if (top.B.VLD)
93 {
94 trackedFlashAdresses[numErrors].address = 0xa0000000 | (top.B.ADDR << 5);
95 trackedFlashAdresses[numErrors].errorType = (IfxFlash_ErrorTracking)top.B.ERR;
96 ++numErrors;
97 }
98
99 // clear entry
100 MODULE_FLASH0.CBAB[portId].TOP.U = (((uint32)1) << 31);
101 }
102
103 return numErrors;
104 }
105
106
107 uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
108 {
109 uint32 numErrors = 0;
110 uint32 fillingLevel = MODULE_FLASH0.UBAB[portId].STAT.U;
111
112 int i;
113
114 for (i = 0;
115 i < IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS &&
116 (fillingLevel & (1 << i)) != 0;
117 ++i)
118 {
119 Ifx_FLASH_UBAB_TOP top;
120 top.U = MODULE_FLASH0.UBAB[portId].TOP.U;
121
122 if (top.B.VLD)
123 {
124 trackedFlashAdresses[numErrors].address = 0xa0000000 | (top.B.ADDR << 5);
125 trackedFlashAdresses[numErrors].errorType = (IfxFlash_ErrorTracking)top.B.ERR;
126 ++numErrors;
127 }
128
129 // clear entry
130 MODULE_FLASH0.UBAB[portId].TOP.U = (((uint32)1) << 31);
131 }
132
133 return numErrors;
134 }
135
136
137 void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
138 {
139 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR,
140 errorTracking == IfxFlash_ErrorTracking_none ||
141 errorTracking == IfxFlash_ErrorTracking_correctedSingleBitError ||
142 errorTracking == IfxFlash_ErrorTracking_correctedDoubleBitError ||
143 errorTracking == IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
144
145 MODULE_FLASH0.CBAB[portId].CFG.B.SEL = errorTracking;
146 }
147
148
149 void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
150 {
151 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR,
152 errorTracking == IfxFlash_ErrorTracking_none ||
153 errorTracking == IfxFlash_ErrorTracking_uncorrectableMultiBitError);
154
155 MODULE_FLASH0.UBAB[portId].CFG.B.SEL = errorTracking;
156 }
IfxFlash_clearUncorrectableErrorTracking
void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) ...
Definition: IfxFlash.c:42
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxFlash_disableWriteProtection
void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled...
Definition: IfxFlash.c:60
IfxFlash_ErrorTracking_Address::address
uint32 address
Flash address for error tracking.
Definition: IfxFlash.h:81
IfxFlash_disableCorrectableErrorTracking
void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) regis...
Definition: IfxFlash.c:48
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxFlash_ErrorTracking_none
Error tracking disabled.
Definition: IfxFlash.h:54
IfxFlash_ErrorTracking
IfxFlash_ErrorTracking
enumeration for Flash Error tracking
Definition: IfxFlash.h:52
IfxFlash_getTrackedUncorrectableErrors
uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored ...
Definition: IfxFlash.c:107
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:143
IfxFlash_ErrorTracking_Address
Error tracking address structure.
Definition: IfxFlash.h:79
IfxFlash.h
FLASH basic functionality.
IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS
#define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS
Definition: IfxFlash_cfg.h:84
IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS
#define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS
Definition: IfxFlash_cfg.h:88
IfxFlash_disableUncorrectableErrorTracking
void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) r...
Definition: IfxFlash.c:54
IfxFlash_clearCorrectableErrorTracking
void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) registe...
Definition: IfxFlash.c:36
IfxFlash_selectUncorrectableErrorTracking
void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors.
Definition: IfxFlash.c:149
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IFXFLASH_CMD_BASE_ADDRESS
#define IFXFLASH_CMD_BASE_ADDRESS
base address for general command sequences
Definition: IfxFlash_cfg.h:52
IfxFlash_ErrorTracking_uncorrectableMultiBitError
Detected uncorrectable errors.
Definition: IfxFlash.h:58
IfxFlash_selectCorrectableErrorTracking
void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors.
Definition: IfxFlash.c:137
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError
Corrected single-bit and double-bit errors.
Definition: IfxFlash.h:57
IfxFlash_ErrorTracking_Address::errorType
IfxFlash_ErrorTracking errorType
Error type.
Definition: IfxFlash.h:82
IfxFlash_getTrackedCorrectableErrors
uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in...
Definition: IfxFlash.c:77
IfxFlash_ErrorTracking_correctedDoubleBitError
Corrected double-bit errors.
Definition: IfxFlash.h:56
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:448
IfxFlash_PortId
IfxFlash_PortId
Corrected/UnCorrected Bits Address Buffer Port Id.
Definition: IfxFlash.h:63
IfxFlash_ErrorTracking_correctedSingleBitError
corrected single bit errors
Definition: IfxFlash.h:55


iLLD_TC26B: IfxFlash.h Source File

  • Flash
  • Std
IfxFlash.h
Go to the documentation of this file.
1 /**
2 * \file IfxFlash.h
3 * \brief FLASH basic functionality
4 * \ingroup IfxLld_Flash
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Flash_Std_Enumerations Enumerations
26 * \ingroup IfxLld_Flash_Std
27 * \defgroup IfxLld_Flash_Std_CommandSequence CommandSequence Functions
28 * \ingroup IfxLld_Flash_Std
29 * \defgroup IfxLld_Flash_Std_ErrorTracking Error Tracking Functions
30 * \ingroup IfxLld_Flash_Std
31 */
32
33 #ifndef IFXFLAS_H
34 #define IFXFLAS_H 1
35
36 /******************************************************************************/
37 /*----------------------------------Includes----------------------------------*/
38 /******************************************************************************/
39
40 #include "_Impl/IfxFlash_cfg.h"
41 #include "_Utilities/Ifx_Assert.h"
42 #include "IfxFlash_reg.h"
43
44 /******************************************************************************/
45 /*--------------------------------Enumerations--------------------------------*/
46 /******************************************************************************/
47
48 /** \addtogroup IfxLld_Flash_Std_Enumerations
49 * \{ */
50 /** \brief enumeration for Flash Error tracking
51 */
52 typedef enum
53 {
54 IfxFlash_ErrorTracking_none = 0, /**< \brief Error tracking disabled */
55 IfxFlash_ErrorTracking_correctedSingleBitError = 1, /**< \brief corrected single bit errors */
56 IfxFlash_ErrorTracking_correctedDoubleBitError = 2, /**< \brief Corrected double-bit errors */
57 IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError = 3, /**< \brief Corrected single-bit and double-bit errors */
58 IfxFlash_ErrorTracking_uncorrectableMultiBitError = 4 /**< \brief Detected uncorrectable errors */
59 } IfxFlash_ErrorTracking;
60
61 /** \brief Corrected/UnCorrected Bits Address Buffer Port Id
62 */
63 typedef enum
64 {
65 IfxFlash_PortId_PortId_0 = 0, /**< \brief Port Id 0 */
66 IfxFlash_PortId_PortId_1 = 1 /**< \brief Port Id 1 */
67 } IfxFlash_PortId;
68
69 /** \} */
70
71 /******************************************************************************/
72 /*-----------------------------Data Structures--------------------------------*/
73 /******************************************************************************/
74
75 /** \addtogroup IfxLld_Flash_Std_Enumerations
76 * \{ */
77 /** \brief Error tracking address structure
78 */
79 typedef struct
80 {
81 uint32 address; /**< \brief Flash address for error tracking */
82 IfxFlash_ErrorTracking errorType; /**< \brief Error type */
83 } IfxFlash_ErrorTracking_Address;
84
85 /** \} */
86
87 /** \addtogroup IfxLld_Flash_Std_CommandSequence
88 * \{ */
89
90 /******************************************************************************/
91 /*-------------------------Inline Function Prototypes-------------------------*/
92 /******************************************************************************/
93
94 /** \brief Performs the "Clear Status" sequence. Operation and error flags are cleared.
95 * \param flash selects the flash (PMU) module
96 * \return None
97 */
98 IFX_INLINE void IfxFlash_clearStatus(uint32 flash);
99
100 /** \brief Performs the sequence for entering program page mode
101 * \param pageAddr pageAddr specifies the page being written - the command sequence will be varied accordingly
102 * \return 0 on success, != 0 if invalid or not available page is selected
103 *
104 * Usage Example:
105 * \code
106 *
107 * unsigned int pageAddr = IFXFLASH_DFLASH_START + page*IFXFLASH_DFLASH_PAGE_LENGTH;
108 *
109 * // enter page mode
110 * IfxFlash_enterPageMode(pageAddr);
111 *
112 * \endcode
113 *
114 */
115 IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr);
116
117 /** \brief Performs the erase sequence for n sectors in program or data flash
118 * \param sectorAddr sector address
119 * \param numSector the no.of sectors to be erased
120 * \return None
121 *
122 * Usage Example:
123 * \code
124 *
125 * // erase the first and second data flash
126 * IfxFlash_eraseMultiplePhysicalSectors(IFXFLASH_DFLASH_START,2);
127 *
128 * \endcode
129 *
130 */
131 IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors(uint32 sectorAddr, uint32 numSector);
132
133 /** \brief Performs the erase sequence for n sectors in program or data flash
134 * \param sectorAddr sector address
135 * \param numSector the no.of sectors to be erased
136 * \return None
137 *
138 * Usage Example:
139 * \code
140 *
141 * // erase logical sectors of program flash
142 * IfxFlash_eraseMultipleSectors(pFlashTableLog[sector].start,2);
143 *
144 * \endcode
145 *
146 */
147 IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector);
148
149 /** \brief Performs the erase sequence for a physical sector in program or data flash
150 * \param sectorAddr sector address
151 * \return None
152 *
153 * Usage Example:
154 * \code
155 *
156 * // erase the first data flash
157 * IfxFlash_erasePhysicalSector(IFXFLASH_DFLASH_START);
158 *
159 *
160 * \endcode
161 *
162 */
163 IFX_INLINE void IfxFlash_erasePhysicalSector(uint32 sectorAddr);
164
165 /** \brief Performs the erase sequence for a sector in program or data flash.
166 * \param sectorAddr sector address
167 * \return None
168 *
169 * Usage Example:
170 * \code
171 *
172 *
173 * // erase all sectors of program flash
174 * for(sector=0; sector<IFXFLASH_PFLASH_NO_OF_LOG_SECTORS; ++sector) {
175 * // get address from predefined table
176 * unsigned int sector_addr = pFlashTableLog[sector].start;
177 * // erase sector
178 * IfxFlash_eraseSector(sector_addr);
179 * }
180 *
181 *
182 * \endcode
183 *
184 */
185 IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr);
186
187 /** \brief Performs the "Erase Verify" sequence for multiple sectors
188 * \param sectorAddr sector address which should be verified
189 * \param numSector no.of sectors to be operated on
190 * \return None
191 */
192 IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector);
193
194 /** \brief Performs the "Erase Verify" sequence
195 * \param sectorAddr sector address which should be verified
196 * \return None
197 */
198 IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr);
199
200 /** \brief performs a load page sequence with a single 64bit access
201 * \param pageAddr pageAddr start address of page which should be programmed
202 * \param wordL Lower Address word
203 * \param wordU Upper address word
204 * \return None
205 *
206 * Usage Example:
207 * \code
208 *
209 * // load 64bit into assembly buffer of program flash
210 * IfxFlash_loadPage(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
211 *
212 * // load 64bit into assembly buffer of data flash
213 * IfxFlash_loadPage(0XAF000000, 0x55555555, 0xaaaaaaaa);
214 * \endcode
215 *
216 */
217 IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU);
218
219 /** \brief performs a load page sequence with two 32bit accesses
220 * \param pageAddr pageAddr start address of page which should be programmed
221 * \param wordL Lower Address word
222 * \param wordU Upper Address word
223 * \return None
224 *
225 * Usage Example:
226 * \code
227 *
228 * // load 2*32bit into assembly buffer of program flash
229 * IfxFlash_loadPage2X32(IFXFLASH_PFLASH_START, 0x55555555, 0xaaaaaaaa);
230 *
231 * // load 2*32bit into assembly buffer of data flash
232 * IfxFlash_loadPage2X32(0XAF000000, 0x55555555, 0xaaaaaaaa);
233 * \endcode
234 *
235 */
236 IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU);
237
238 /** \brief reset to read mode
239 * \param flash flash selects the flash (PMU) module
240 * \return None
241 *
242 * Usage Example:
243 * \code
244 *
245 * // reset to read mode
246 * IfxFlash_resetToRead(0);
247 *
248 * \endcode
249 *
250 */
251 IFX_INLINE void IfxFlash_resetToRead(uint32 flash);
252
253 /** \brief Performs the "Resume Protection" sequence
254 * \param flash selects the flash (PMU) module
255 * \return None
256 */
257 IFX_INLINE void IfxFlash_resumeProtection(uint32 flash);
258
259 /** \brief Performs the "Suspend Resume" sequence for multiple sectors
260 * \param sectorAddr sector address
261 * \param numSector the no.of sectors to be operated on
262 * \return None
263 */
264 IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector);
265
266 /** \brief Performs the "Suspend Resume" sequence
267 * \param sectorAddr sector address which should be resumed
268 * \return None
269 */
270 IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr);
271
272 /** \brief Polls the selected status flag in flash status register until it turns to 0
273 * \param flash selects the flash (PMU) module
274 * \param flashType selects the flash type
275 * \return 0 on success, != 0 if invalid or not available page is selected
276 *
277 * Usage Example:
278 * \code
279 *
280 * // wait until data flash 0 is unbusy
281 * IfxFlash_waitUnbusy(0, IfxFlash_FlashType_D0);
282 *
283 * \endcode
284 *
285 */
286 IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType);
287
288 /** \brief Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of page.Make sure the appropriate amount of data is loaded using load page command
289 * \param pageAddr start address of page which should be programmed
290 * \return None
291 *
292 * Usage Example:
293 * \code
294 *
295 * // program the second page of the first sector of the Program Flash
296 * IfxFlash_writeBurst(0xa0000100);
297 *
298 * \endcode
299 *
300 */
301 IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr);
302
303 /** \brief Performs the "Write Page" sequence
304 * \param pageAddr start address of page which should be programmed
305 * \return None
306 *
307 * Usage Example:
308 * \code
309 *
310 * // program the second page of the first sector of the Program Flash
311 * IfxFlash_writePage(0xa0000100);
312 *
313 * \endcode
314 *
315 */
316 IFX_INLINE void IfxFlash_writePage(uint32 pageAddr);
317
318 /** \brief Performs the "Write Page Once" sequence, similar to write page but performs a program verify after writing.
319 * \param pageAddr start address of page which should be programmed
320 * \return None
321 *
322 * Usage Example:
323 * \code
324 *
325 * // program the second page of the first sector of the Program Flash
326 * IfxFlash_writePageOnce(0xa0000100);
327 *
328 * \endcode
329 *
330 */
331 IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr);
332
333 /******************************************************************************/
334 /*-------------------------Global Function Prototypes-------------------------*/
335 /******************************************************************************/
336
337 /** \brief The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled. The command fails by setting PROER when any of the supplied PWs does not match. In this case until the next application reset all further calls of "Disable Protection" fail with PROER independent of the supplied password.
338 * \param flash selects the flash (PMU) module
339 * \param ucb selects the user configuration block (0 for UCB0, 1 for UCB1, 5 for UCB_HSMC)
340 * \param password password pointer to an array of 8 words
341 * \return None
342 */
343 IFX_EXTERN void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password);
344
345 /** \} */
346
347 /** \addtogroup IfxLld_Flash_Std_ErrorTracking
348 * \{ */
349
350 /******************************************************************************/
351 /*-------------------------Global Function Prototypes-------------------------*/
352 /******************************************************************************/
353
354 /** \brief Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register
355 * \param portId Corrected Bits Address Buffer Port Id
356 * \return None
357 */
358 IFX_EXTERN void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId);
359
360 /** \brief Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register
361 * \param portId UnCorrected Bits Address Buffer Port Id
362 * \return None
363 */
364 IFX_EXTERN void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId);
365
366 /** \brief Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) register
367 * \param portId Corrected Bits Address Buffer Port Id
368 * \param disable Disable/enable the error tracking
369 * \return None
370 */
371 IFX_EXTERN void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable);
372
373 /** \brief Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) register
374 * \param portId UnCorrected Bits Address Buffer Port Id
375 * \param disable Disable/enable the error tracking
376 * \return None
377 */
378 IFX_EXTERN void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable);
379
380 /** \brief Returns the tracked correctable error addresses, error types and number of errors which are stored in the CBAB registers.
381 * \param portId Corrected Bits Address Buffer Port Id
382 * \param trackedFlashAdresses tracked flash addresses for correctable errors
383 * \return numErrors
384 *
385 * Example usage to print out tracked errors :
386 *
387 * \code
388 * {
389 * IfxFlash_ErrorTracking_Address trackedAddresses[IFX_FLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS];
390 * IfxFlash_portId portId = 0;
391 * uint8 numTrackedAddresses = IfxFlash_getTrackedCorrectableErrors(portId, trackedAddresses);
392 *
393 * for(int i=0; i<numTrackedAddresses; ++i) {
394 * printf("%d: A:0x%04x Error Type:%d \n",
395 * i,
396 * trackedAddresses[i].address,
397 * trackedAddresses[i].errorType);
398 * }
399 * }
400 * \endcode
401 *
402 */
403 IFX_EXTERN uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses);
404
405 /** \brief Returns the tracked uncorrectable error addresses, error types and number of errors which are stored in the UBAB registers.
406 * \param portId UnCorrected Bits Address Buffer Port Id
407 * \param trackedFlashAdresses tracked flash addresses for uncorrectable errors
408 * \return numErrors
409 *
410 * Example usage to print out tracked errors :
411 *
412 * \code
413 * {
414 * IfxFlash_ErrorTracking_Address trackedAddresses[IFX_FLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS];
415 * IfxFlash_portId portId = 0;
416 * uint8 numTrackedAddresses = IfxFlash_getTrackedUnCorrectableErrors(portId, trackedAddresses);
417 *
418 * for(int i=0; i<numTrackedAddresses; ++i) {
419 * printf("%d: A:0x%04x Error Type:%d \n",
420 * i,
421 * trackedAddresses[i].address,
422 * trackedAddresses[i].errorType);
423 * }
424 * }
425 * \endcode
426 *
427 */
428 IFX_EXTERN uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses);
429
430 /** \brief Enables error tracking for correctable flash errors
431 * \param portId Corrected Bits Address Buffer Port Id
432 * \param errorTracking Error Tracking to be selected
433 * \return None
434 *
435 * Usage example: how to enable error tracking for two flash ports:
436 * \code
437 * // enable error tracking
438 * {
439 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
440 * IfxScuWdt_clearCpuEndinit(password);
441 *
442 * // PFlash0
443 * IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId_PortId_0, IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
444 * IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId_PortId_0, IfxFlash_ErrorTracking_uncorrectableMultiBitError);
445 *
446 * // PFlash1
447 * IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId_PortId_1, IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
448 * IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId_PortId_1, IfxFlash_ErrorTracking_uncorrectableMultiBitError);
449 *
450 * IfxScuWdt_setCpuEndinit(password);
451 * }
452 * \endcode
453 *
454 */
455 IFX_EXTERN void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking);
456
457 /** \brief Enables error tracking for uncorrectable flash errors
458 * \param portId UnCorrected Bits Address Buffer Port Id
459 * \param errorTracking Error Tracking to be selected
460 * \return None
461 *
462 * Usage example: see \ref IfxFlash_selectCorrectableErrorTracking
463 *
464 */
465 IFX_EXTERN void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking);
466
467 /** \} */
468
469 /******************************************************************************/
470 /*-------------------------Inline Function Prototypes-------------------------*/
471 /******************************************************************************/
472
473 /** \brief This function will wait till all the flash banks are out of busy state
474 * \return Return 0 on success.Success means none of the flash banks are in busy state.
475 */
476 IFX_INLINE boolean IfxFlash_waitUnbusyAll(void);
477
478 /******************************************************************************/
479 /*---------------------Inline Function Implementations------------------------*/
480 /******************************************************************************/
481
482 IFX_INLINE void IfxFlash_clearStatus(uint32 flash)
483 {
484 IFX_UNUSED_PARAMETER(flash);
485 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
486
487 *addr1 = 0xFA;
488
489 __dsync();
490 }
491
492
493 IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr)
494 {
495 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
496
497 if ((pageAddr & 0xff000000) == 0xa0000000) // program flash
498 {
499 *addr1 = 0x50;
500 return 0;
501 }
502 else if ((pageAddr & 0xff000000) == 0xaf000000) // data flash
503 {
504 *addr1 = 0x5D;
505 return 0;
506 }
507
508 __dsync();
509 return 1; // invalid flash address
510 }
511
512
513 IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors(uint32 sectorAddr, uint32 numSector)
514 {
515 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
516 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
517 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
518 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
519
520 *addr1 = sectorAddr;
521 *addr2 = numSector;
522 *addr3 = 0x80;
523 *addr4 = 0x5a;
524
525 __dsync();
526 }
527
528
529 IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector)
530 {
531 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
532 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
533 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
534 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
535
536 *addr1 = sectorAddr;
537 *addr2 = numSector;
538 *addr3 = 0x80;
539 *addr4 = 0x50;
540
541 __dsync();
542 }
543
544
545 IFX_INLINE void IfxFlash_erasePhysicalSector(uint32 sectorAddr)
546 {
547 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
548 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
549 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
550 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
551
552 *addr1 = sectorAddr;
553 *addr2 = 1;
554 *addr3 = 0x80;
555 *addr4 = 0x5a;
556
557 __dsync();
558 }
559
560
561 IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr)
562 {
563 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
564 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
565 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
566 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
567
568 *addr1 = sectorAddr;
569 *addr2 = 1;
570 *addr3 = 0x80;
571 *addr4 = 0x50;
572
573 __dsync();
574 }
575
576
577 IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector)
578 {
579 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
580 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
581 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
582 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
583
584 *addr1 = sectorAddr;
585 *addr2 = numSector;
586 *addr3 = 0x80;
587 *addr4 = 0x5F;
588
589 __dsync();
590 }
591
592
593 IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr)
594 {
595 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
596 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
597 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
598 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
599
600 *addr1 = sectorAddr;
601 *addr2 = 1;
602 *addr3 = 0x80;
603 *addr4 = 0x5F;
604
605 __dsync();
606 }
607
608
609 IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU)
610 {
611 IFX_UNUSED_PARAMETER(pageAddr);
612 uint64 *addr1 = (uint64 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x55f0);
613
614 __st64_lu(addr1, wordL, wordU);
615
616 __dsync();
617 }
618
619
620 IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU)
621 {
622 IFX_UNUSED_PARAMETER(pageAddr);
623
624 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x55f0);
625
626 *addr1 = wordL;
627 addr1++;
628 *addr1 = wordU;
629
630 __dsync();
631 }
632
633
634 IFX_INLINE void IfxFlash_resetToRead(uint32 flash)
635 {
636 IFX_UNUSED_PARAMETER(flash);
637 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
638 *addr1 = 0xf0;
639
640 __dsync();
641 }
642
643
644 IFX_INLINE void IfxFlash_resumeProtection(uint32 flash)
645 {
646 IFX_UNUSED_PARAMETER(flash);
647
648 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x5554);
649
650 *addr1 = 0xF5;
651
652 __dsync();
653 }
654
655
656 IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector)
657 {
658 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
659 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
660 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
661 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
662
663 *addr1 = sectorAddr;
664 *addr2 = numSector;
665 *addr3 = 0x70;
666 *addr4 = 0xCC;
667
668 __dsync();
669 }
670
671
672 IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr)
673 {
674 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
675 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
676 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
677 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
678
679 *addr1 = sectorAddr;
680 *addr2 = 1;
681 *addr3 = 0x70;
682 *addr4 = 0xCC;
683
684 __dsync();
685 }
686
687
688 IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType)
689 {
690 if (flash == 0)
691 {
692 while (FLASH0_FSR.U & (1 << flashType))
693 {}
694 }
695
696 #if IFXFLASH_NUM_FLASH_MODULES > 1
697 else if (flash == 1)
698 {
699 while (FLASH1_FSR.U & (1 << flashType))
700 {}
701 }
702 #endif
703 else
704 {
705 return 1; // invalid flash selected
706 }
707 __dsync();
708 return 0; // finished
709 }
710
711
712 IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr)
713 {
714 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
715 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
716 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
717 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
718
719 *addr1 = pageAddr;
720 *addr2 = 0x00;
721 *addr3 = 0xa0;
722 *addr4 = 0x7a;
723
724 __dsync();
725 }
726
727
728 IFX_INLINE void IfxFlash_writePage(uint32 pageAddr)
729 {
730 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
731 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
732 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
733 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
734
735 *addr1 = pageAddr;
736 *addr2 = 0x00;
737 *addr3 = 0xa0;
738 *addr4 = 0xaa;
739
740 __dsync();
741 }
742
743
744 IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr)
745 {
746 volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
747 volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
748 volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
749 volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
750
751 *addr1 = pageAddr;
752 *addr2 = 0x00;
753 *addr3 = 0xa0;
754 *addr4 = 0x9a;
755
756 __dsync();
757 }
758
759
760 IFX_INLINE boolean IfxFlash_waitUnbusyAll(void)
761 {
762 while (FLASH0_FSR.U & 0x1EU)
763 {}
764
765 __dsync();
766 return 0;
767 }
768
769
770 #endif /* IFXFLAS_H */
IfxFlash_clearUncorrectableErrorTracking
IFX_EXTERN void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId)
Select the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) ...
Definition: IfxFlash.c:42
IfxFlash_writePage
IFX_INLINE void IfxFlash_writePage(uint32 pageAddr)
Performs the "Write Page" sequence.
Definition: IfxFlash.h:728
IfxFlash_disableWriteProtection
IFX_EXTERN void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
The password protection of the selected UCB (if this UCB offers this feature) is temporarily disabled...
Definition: IfxFlash.c:60
IfxFlash_ErrorTracking_Address::address
uint32 address
Flash address for error tracking.
Definition: IfxFlash.h:81
IfxFlash_PortId_PortId_0
Port Id 0.
Definition: IfxFlash.h:65
IfxFlash_resumeProtection
IFX_INLINE void IfxFlash_resumeProtection(uint32 flash)
Performs the "Resume Protection" sequence.
Definition: IfxFlash.h:644
IfxFlash_eraseSector
IFX_INLINE void IfxFlash_eraseSector(uint32 sectorAddr)
Performs the erase sequence for a sector in program or data flash.
Definition: IfxFlash.h:561
IfxFlash_disableCorrectableErrorTracking
IFX_EXTERN void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
Disable the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) regis...
Definition: IfxFlash.c:48
IfxFlash_eraseMultipleSectors
IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash.
Definition: IfxFlash.h:529
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_Assert.h
Assert functions.
IfxFlash_ErrorTracking_none
Error tracking disabled.
Definition: IfxFlash.h:54
IfxFlash_ErrorTracking
IfxFlash_ErrorTracking
enumeration for Flash Error tracking
Definition: IfxFlash.h:52
IfxFlash_getTrackedUncorrectableErrors
IFX_EXTERN uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked uncorrectable error addresses, error types and number of errors which are stored ...
Definition: IfxFlash.c:107
IfxFlash_eraseVerifyMultipleSectors
IFX_INLINE void IfxFlash_eraseVerifyMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the "Erase Verify" sequence for multiple sectors.
Definition: IfxFlash.h:577
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxFlash_loadPage
IFX_INLINE void IfxFlash_loadPage(uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with a single 64bit access
Definition: IfxFlash.h:609
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:143
IfxFlash_ErrorTracking_Address
Error tracking address structure.
Definition: IfxFlash.h:79
IfxFlash_waitUnbusy
IFX_INLINE uint8 IfxFlash_waitUnbusy(uint32 flash, IfxFlash_FlashType flashType)
Polls the selected status flag in flash status register until it turns to 0.
Definition: IfxFlash.h:688
IfxFlash_waitUnbusyAll
IFX_INLINE boolean IfxFlash_waitUnbusyAll(void)
This function will wait till all the flash banks are out of busy state.
Definition: IfxFlash.h:760
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxFlash_erasePhysicalSector
IFX_INLINE void IfxFlash_erasePhysicalSector(uint32 sectorAddr)
Performs the erase sequence for a physical sector in program or data flash.
Definition: IfxFlash.h:545
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxFlash_disableUncorrectableErrorTracking
IFX_EXTERN void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
Clear the uncorrectable errors in UnCorrectable Bits Address Buffer Configuration Port x (UBABCFGx) r...
Definition: IfxFlash.c:54
IfxFlash_enterPageMode
IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr)
Performs the sequence for entering program page mode.
Definition: IfxFlash.h:493
IfxFlash_suspendResumeMultipleSectors
IFX_INLINE void IfxFlash_suspendResumeMultipleSectors(uint32 sectorAddr, uint32 numSector)
Performs the "Suspend Resume" sequence for multiple sectors.
Definition: IfxFlash.h:656
IfxFlash_cfg.h
FLASH on-chip implementation data.
IfxFlash_resetToRead
IFX_INLINE void IfxFlash_resetToRead(uint32 flash)
reset to read mode
Definition: IfxFlash.h:634
IfxFlash_clearCorrectableErrorTracking
IFX_EXTERN void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId)
Clear the Correctable errors in Corrected Bits Address Buffer Configuration Port x (CBABCFGx) registe...
Definition: IfxFlash.c:36
__st64_lu
IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
Definition: IfxCpu_Intrinsics.h:142
IfxFlash_selectUncorrectableErrorTracking
IFX_EXTERN void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for uncorrectable flash errors.
Definition: IfxFlash.c:149
IfxFlash_loadPage2X32
IFX_INLINE void IfxFlash_loadPage2X32(uint32 pageAddr, uint32 wordL, uint32 wordU)
performs a load page sequence with two 32bit accesses
Definition: IfxFlash.h:620
__dsync
void __dsync(void) __attribute__((intrinsic_function(0x103
IfxFlash_writePageOnce
IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr)
Performs the "Write Page Once" sequence, similar to write page but performs a program verify after wr...
Definition: IfxFlash.h:744
IfxFlash_FlashType
IfxFlash_FlashType
Definition: IfxFlash_cfg.h:130
IfxFlash_suspendResumeSector
IFX_INLINE void IfxFlash_suspendResumeSector(uint32 sectorAddr)
Performs the "Suspend Resume" sequence.
Definition: IfxFlash.h:672
IFXFLASH_CMD_BASE_ADDRESS
#define IFXFLASH_CMD_BASE_ADDRESS
base address for general command sequences
Definition: IfxFlash_cfg.h:52
IfxFlash_ErrorTracking_uncorrectableMultiBitError
Detected uncorrectable errors.
Definition: IfxFlash.h:58
IfxFlash_writeBurst
IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr)
Performs the "Write Burst" sequence, similar to write page but performs a burst transfer instead of p...
Definition: IfxFlash.h:712
IfxFlash_selectCorrectableErrorTracking
IFX_EXTERN void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
Enables error tracking for correctable flash errors.
Definition: IfxFlash.c:137
IfxFlash_PortId_PortId_1
Port Id 1.
Definition: IfxFlash.h:66
IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError
Corrected single-bit and double-bit errors.
Definition: IfxFlash.h:57
IfxFlash_ErrorTracking_Address::errorType
IfxFlash_ErrorTracking errorType
Error type.
Definition: IfxFlash.h:82
IfxFlash_getTrackedCorrectableErrors
IFX_EXTERN uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
Returns the tracked correctable error addresses, error types and number of errors which are stored in...
Definition: IfxFlash.c:77
IfxFlash_ErrorTracking_correctedDoubleBitError
Corrected double-bit errors.
Definition: IfxFlash.h:56
IfxFlash_clearStatus
IFX_INLINE void IfxFlash_clearStatus(uint32 flash)
Performs the "Clear Status" sequence. Operation and error flags are cleared.
Definition: IfxFlash.h:482
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:448
IfxFlash_eraseMultiplePhysicalSectors
IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors(uint32 sectorAddr, uint32 numSector)
Performs the erase sequence for n sectors in program or data flash.
Definition: IfxFlash.h:513
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxFlash_PortId
IfxFlash_PortId
Corrected/UnCorrected Bits Address Buffer Port Id.
Definition: IfxFlash.h:63
IfxFlash_eraseVerifySector
IFX_INLINE void IfxFlash_eraseVerifySector(uint32 sectorAddr)
Performs the "Erase Verify" sequence.
Definition: IfxFlash.h:593
IfxFlash_ErrorTracking_correctedSingleBitError
corrected single bit errors
Definition: IfxFlash.h:55


iLLD_TC26B: IfxFlash_cfg.c Source File

  • _Impl
IfxFlash_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxFlash_cfg.c
3 * \brief FLASH on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxFlash_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS] = {
36 {0xAF000000 + 0 * 0x2000, 0xAF000000 + 1 * 0x2000 - 1 },
37 {0xAF000000 + 1 * 0x2000, 0xAF000000 + 2 * 0x2000 - 1 },
38 {0xAF000000 + 2 * 0x2000, 0xAF000000 + 3 * 0x2000 - 1 },
39 {0xAF000000 + 3 * 0x2000, 0xAF000000 + 4 * 0x2000 - 1 },
40 {0xAF000000 + 4 * 0x2000, 0xAF000000 + 5 * 0x2000 - 1 },
41 {0xAF000000 + 5 * 0x2000, 0xAF000000 + 6 * 0x2000 - 1 },
42 {0xAF000000 + 6 * 0x2000, 0xAF000000 + 7 * 0x2000 - 1 },
43 {0xAF000000 + 7 * 0x2000, 0xAF000000 + 8 * 0x2000 - 1 },
44 {0xAF000000 + 8 * 0x2000, 0xAF000000 + 9 * 0x2000 - 1 },
45 {0xAF000000 + 9 * 0x2000, 0xAF000000 + 10 * 0x2000 - 1},
46 {0xAF000000 + 10 * 0x2000, 0xAF000000 + 11 * 0x2000 - 1},
47 {0xAF000000 + 11 * 0x2000, 0xAF000000 + 12 * 0x2000 - 1},
48 };
49
50 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS] = {
51 {IFXFLASH_DFLASH_START, IFXFLASH_DFLASH_END},
52 };
53
54 IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS] = {
55 {0xaf100000, 0xaf1003ff}, // UCB0
56 {0xaf100400, 0xaf1007ff}, // UCB1
57 {0xaf100800, 0xaf100bff}, // UCB2
58 {0xaf100c00, 0xaf100fff}, // UCB3
59 {0xaf101000, 0xaf1013ff}, // UCB4
60 {0xaf101400, 0xaf1017ff}, // UCB5
61 {0xaf101800, 0xaf101bff}, // UCB6
62 {0xaf101c00, 0xaf101fff}, // UCB7
63 {0xaf102000, 0xaf1023ff}, // UCB8
64 {0xaf102400, 0xaf1027ff}, // UCB9
65 {0xaf102800, 0xaf102bff}, // UCB10
66 {0xaf102c00, 0xaf102fff}, // UCB11
67 {0xaf103000, 0xaf1033ff}, // UCB12
68 {0xaf103400, 0xaf1037ff}, // UCB13
69 {0xaf103800, 0xaf103bff}, // UCB14
70 {0xaf103c00, 0xaf103fff}, // UCB15
71 };
72
73 IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS] = {
74 {0xa0000000, 0xa0003fff}, // PF0 S0
75 {0xa0004000, 0xa0007fff}, // PF0 S1
76 {0xa0008000, 0xa000bfff}, // PF0 S2
77 {0xa000c000, 0xa000ffff}, // PF0 S3
78 {0xa0010000, 0xa0013fff}, // PF0 S4
79 {0xa0014000, 0xa0017fff}, // PF0 S5
80 {0xa0018000, 0xa001bfff}, // PF0 S6
81 {0xa001c000, 0xa001ffff}, // PF0 S7
82 {0xa0020000, 0xa0027fff}, // PF0 S8
83 {0xa0028000, 0xa002ffff}, // PF0 S9
84 {0xa0030000, 0xa0037fff}, // PF0 S10
85 {0xa0038000, 0xa003ffff}, // PF0 S11
86 {0xa0040000, 0xa0047fff}, // PF0 S12
87 {0xa0048000, 0xa004ffff}, // PF0 S13
88 {0xa0050000, 0xa0057fff}, // PF0 S14
89 {0xa0058000, 0xa005ffff}, // PF0 S15
90 {0xa0060000, 0xa006ffff}, // PF0 S16
91 {0xa0070000, 0xa007ffff}, // PF0 S17
92 {0xa0080000, 0xa008ffff}, // PF0 S18
93 {0xa0090000, 0xa009ffff}, // PF0 S19
94 {0xa00a0000, 0xa00bffff}, // PF0 S20
95 {0xa00c0000, 0xa00dffff}, // PF0 S21
96 {0xa00e0000, 0xa00fffff}, // PF0 S22
97 // TC26x has only 1MB PF0 and 1.5MB PF1
98 {0xa0100000, 0xa0103fff}, // PF1 S0
99 {0xa0104000, 0xa0107fff}, // PF1 S1
100 {0xa0108000, 0xa010bfff}, // PF1 S2
101 {0xa010c000, 0xa010ffff}, // PF1 S3
102 {0xa0110000, 0xa0113fff}, // PF1 S4
103 {0xa0114000, 0xa0117fff}, // PF1 S5
104 {0xa0118000, 0xa011bfff}, // PF1 S6
105 {0xa011c000, 0xa011ffff}, // PF1 S7
106 {0xa0120000, 0xa0127fff}, // PF1 S8
107 {0xa0128000, 0xa012ffff}, // PF1 S9
108 {0xa0130000, 0xa0137fff}, // PF1 S10
109 {0xa0138000, 0xa013ffff}, // PF1 S11
110 {0xa0140000, 0xa0147fff}, // PF1 S12
111 {0xa0148000, 0xa014ffff}, // PF1 S13
112 {0xa0150000, 0xa0157fff}, // PF1 S14
113 {0xa0158000, 0xa015ffff}, // PF1 S15
114 {0xa0160000, 0xa016ffff}, // PF1 S16
115 {0xa0170000, 0xa017ffff}, // PF1 S17
116 {0xa0180000, 0xa018ffff}, // PF1 S18
117 {0xa0190000, 0xa019ffff}, // PF1 S19
118 {0xa01a0000, 0xa01bffff}, // PF1 S20
119 {0xa01c0000, 0xa01dffff}, // PF1 S21
120 {0xa01e0000, 0xa01fffff}, // PF1 S22
121 {0xa0200000, 0xa023ffff}, // PF1 S23
122 {0xa0240000, 0xa027ffff}, // PF1 S24
123 };
124
125 IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS] = {
126 {0xa0000000, 0xa007ffff}, // PF0 PS0
127 {0xa0080000, 0xa00fffff}, // PF0 PS1
128 {0xa0100000, 0xa017ffff}, // PF1 PS0
129 {0xa0180000, 0xa01fffff}, // PF1 PS1
130 {0xa0200000, 0xa027ffff}, // PF1 PS2
131 };
IfxFlash_dFlashTableEepLog
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.c:35
IfxFlash_flashSector
contains start and end address of sectors
Definition: IfxFlash_cfg.h:156
IFXFLASH_PFLASH_NUM_LOG_SECTORS
#define IFXFLASH_PFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:106
IfxFlash_dFlashTableUcbLog
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
Definition: IfxFlash_cfg.c:54
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxFlash_pFlashTablePhys
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.c:125
IfxFlash_dFlashTablePhys
IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.c:50
IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
Phy sector for DF.
Definition: IfxFlash_cfg.h:70
IfxFlash_cfg.h
FLASH on-chip implementation data.
IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
Definition: IfxFlash_cfg.h:72
IFXFLASH_DFLASH_START
#define IFXFLASH_DFLASH_START
Definition: IfxFlash_cfg.h:80
IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
Definition: IfxFlash_cfg.h:108
IFXFLASH_DFLASH_END
#define IFXFLASH_DFLASH_END
Definition: IfxFlash_cfg.h:64
IFXFLASH_DFLASH_NUM_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:66
IfxFlash_pFlashTableLog
IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.c:73


iLLD_TC26B: IfxFlash_cfg.h Source File

  • _Impl
IfxFlash_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxFlash_cfg.h
3 * \brief FLASH on-chip implementation data
4 * \ingroup IfxLld_Flash
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Flash FLASH
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Flash_Impl Implementation
27 * \ingroup IfxLld_Flash
28 * \defgroup IfxLld_Flash_Std Standard Driver
29 * \ingroup IfxLld_Flash
30 */
31
32 #ifndef IFXFLASH_CFG_H
33 #define IFXFLASH_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "Cpu/Std/IfxCpu_Intrinsics.h"
40
41 /******************************************************************************/
42 /*-----------------------------------Macros-----------------------------------*/
43 /******************************************************************************/
44
45 /** \brief number of flash modules.
46 * This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead.
47 */
48 #define IFXFLASH_NUM_FLASH_MODULES (1)
49
50 /** \brief base address for general command sequences
51 */
52 #define IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)
53
54 /** \brief offset between command areas (in DFlash range)
55 */
56 #define IFXFLASH_CMD_BASE_OFFSET (0x00100000)
57
58 #define IFXFLASH_DFLASH_BANKS (1)
59
60 /** \brief Dflash burst length
61 */
62 #define IFXFLASH_DFLASH_BURST_LENGTH (0x20)
63
64 #define IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)
65
66 #define IFXFLASH_DFLASH_NUM_LOG_SECTORS (12)
67
68 /** \brief Phy sector for DF
69 */
70 #define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)
71
72 #define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (16)
73
74 /** \brief 8 bytes
75 */
76 #define IFXFLASH_DFLASH_PAGE_LENGTH (8)
77
78 #define IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x2000)
79
80 #define IFXFLASH_DFLASH_START (0xaf000000)
81
82 /** \brief
83 */
84 #define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)
85
86 /** \brief
87 */
88 #define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)
89
90 /** \brief number of flash modules
91 */
92 #define IFXFLASH_NUM_MODULES (1)
93
94 #define IFXFLASH_PFLASH_BANKS (2)
95
96 /** \brief P flash burst length
97 */
98 #define IFXFLASH_PFLASH_BURST_LENGTH (0x100)
99
100 /** \brief p flash end
101 */
102 #define IFXFLASH_PFLASH_END ()
103
104 /** \brief
105 */
106 #define IFXFLASH_PFLASH_NUM_LOG_SECTORS (23 + 25)
107
108 #define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (2 + 3)
109
110 /** \brief offset between PMU PFlash ranges
111 */
112 #define IFXFLASH_PFLASH_OFFSET (0x00800000)
113
114 #define IFXFLASH_PFLASH_PAGE_LENGTH (32)
115
116 /** \brief p flash size
117 */
118 #define IFXFLASH_PFLASH_SIZE (0x00280000)
119
120 /** \brief p flash start
121 */
122 #define IFXFLASH_PFLASH_START (0xa0000000)
123
124 /******************************************************************************/
125 /*-------------------------------Enumerations---------------------------------*/
126 /******************************************************************************/
127
128 /** \brief
129 */
130 typedef enum
131 {
132 IfxFlash_FlashType_Fa = 0, /**< \brief Flash Array */
133 IfxFlash_FlashType_D0 = 1, /**< \brief data flash #0 */
134 IfxFlash_FlashType_D1 = 2, /**< \brief data flash #1 */
135 IfxFlash_FlashType_P0 = 3, /**< \brief program flash #0 */
136 IfxFlash_FlashType_P1 = 4, /**< \brief program flash #1 */
137 IfxFlash_FlashType_P2 = 5, /**< \brief program flash #2 */
138 IfxFlash_FlashType_P3 = 6 /**< \brief program flash #3 */
139 } IfxFlash_FlashType;
140
141 /** \brief user configuration block type
142 */
143 typedef enum
144 {
145 IfxFlash_UcbType_ucb0 = 0, /**< \brief UCB 0 */
146 IfxFlash_UcbType_ucb1 = 1, /**< \brief UCB 1 */
147 IfxFlash_UcbType_ucbHsmc = 5 /**< \brief HSM UCB */
148 } IfxFlash_UcbType;
149
150 /******************************************************************************/
151 /*-----------------------------Data Structures--------------------------------*/
152 /******************************************************************************/
153
154 /** \brief contains start and end address of sectors
155 */
156 typedef struct
157 {
158 uint32 start; /**< \brief start address of sector */
159 uint32 end; /**< \brief end address of sector */
160 } IfxFlash_flashSector;
161
162 /******************************************************************************/
163 /*-------------------Global Exported Variables/Constants----------------------*/
164 /******************************************************************************/
165
166 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS];
167
168 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS];
169
170 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS];
171
172 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS];
173
174 IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS];
175
176 #endif /* IFXFLASH_CFG_H */
IfxFlash_FlashType_D1
data flash #1
Definition: IfxFlash_cfg.h:134
IfxFlash_dFlashTableEepLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.h:166
IfxFlash_flashSector
contains start and end address of sectors
Definition: IfxFlash_cfg.h:156
IfxFlash_dFlashTablePhys
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.h:168
IFXFLASH_PFLASH_NUM_LOG_SECTORS
#define IFXFLASH_PFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:106
IfxFlash_UcbType_ucb1
UCB 1.
Definition: IfxFlash_cfg.h:146
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxFlash_FlashType_Fa
Flash Array.
Definition: IfxFlash_cfg.h:132
IfxFlash_flashSector::end
uint32 end
end address of sector
Definition: IfxFlash_cfg.h:159
IfxCpu_Intrinsics.h
IfxFlash_UcbType
IfxFlash_UcbType
user configuration block type
Definition: IfxFlash_cfg.h:143
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxFlash_UcbType_ucbHsmc
HSM UCB.
Definition: IfxFlash_cfg.h:147
IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS
Phy sector for DF.
Definition: IfxFlash_cfg.h:70
IfxFlash_flashSector::start
uint32 start
start address of sector
Definition: IfxFlash_cfg.h:158
IfxFlash_UcbType_ucb0
UCB 0.
Definition: IfxFlash_cfg.h:145
IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS
Definition: IfxFlash_cfg.h:72
IfxFlash_FlashType
IfxFlash_FlashType
Definition: IfxFlash_cfg.h:130
IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS
Definition: IfxFlash_cfg.h:108
IfxFlash_FlashType_P3
program flash #3
Definition: IfxFlash_cfg.h:138
IfxFlash_pFlashTablePhys
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS]
Definition: IfxFlash_cfg.h:174
IFXFLASH_DFLASH_NUM_LOG_SECTORS
#define IFXFLASH_DFLASH_NUM_LOG_SECTORS
Definition: IfxFlash_cfg.h:66
IfxFlash_FlashType_P2
program flash #2
Definition: IfxFlash_cfg.h:137
IfxFlash_FlashType_P1
program flash #1
Definition: IfxFlash_cfg.h:136
IfxFlash_FlashType_P0
program flash #0
Definition: IfxFlash_cfg.h:135
IfxFlash_FlashType_D0
data flash #0
Definition: IfxFlash_cfg.h:133
IfxFlash_pFlashTableLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS]
Definition: IfxFlash_cfg.h:172
IfxFlash_dFlashTableUcbLog
IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS]
Definition: IfxFlash_cfg.h:170


iLLD_TC26B: IfxGlobal_cfg.h Source File

  • _Impl
IfxGlobal_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGlobal_cfg.h
3 * \brief Global definitions
4 * \ingroup IfxLld_Global
5 *
6 *
7 * \version iLLD_1_0_1_11_0
8 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
9 *
10 *
11 * IMPORTANT NOTICE
12 *
13 *
14 * Infineon Technologies AG (Infineon) is supplying this file for use
15 * exclusively with Infineon's microcontroller products. This file can be freely
16 * distributed within development tools that are supporting such microcontroller
17 * products.
18 *
19 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
20 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
22 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
23 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
24 *
25 * \defgroup IfxLld_Global Global Definitions
26 * \ingroup IfxLld
27 *
28 */
29
30 #ifndef IFXGLOBAL_H
31 #define IFXGLOBAL_H 1
32
33 /******************************************************************************/
34 /*-----------------------------------Macros-----------------------------------*/
35 /******************************************************************************/
36 /** \brief Microcontroller derivative corresponding to the iLLD implementation
37 */
38 #define IFXGLOBAL_DERIVATIVE_TC26xB (1)
39
40 /** \brief Microcontroller derivative name
41 */
42 #define IFXGLOBAL_DERIVATIVE_NAME "TC26xB"
43
44 #endif /* IFXGLOBAL_H */


iLLD_TC26B: IfxGpt12.c Source File

  • Gpt12
  • Std
IfxGpt12.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12.c
3 * \brief GPT12 basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGpt12.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
36 {
37 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
38
39 IfxGpt12_Mode mode;
40 IfxGpt12_TimerInputPrescaler prescaler;
41
42 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
43
44 switch (bps1)
45 {
46 case IfxGpt12_Gpt1BlockPrescaler_4:
47 freq = freq / 4;
48 break;
49 case IfxGpt12_Gpt1BlockPrescaler_8:
50 freq = freq / 8;
51 break;
52 case IfxGpt12_Gpt1BlockPrescaler_16:
53 freq = freq / 16;
54 break;
55 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
56 freq = freq / 32;
57 break;
58 }
59
60 mode = IfxGpt12_T2_getMode(gpt12);
61 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T2CON.B.T2I;
62
63 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
64 {
65 freq = freq / (1 << prescaler);
66 }
67 else
68 {
69 freq = freq / 2;
70 }
71
72 return freq;
73 }
74
75
76 float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
77 {
78 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
79
80 IfxGpt12_Mode mode;
81 IfxGpt12_TimerInputPrescaler prescaler;
82
83 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
84
85 switch (bps1)
86 {
87 case IfxGpt12_Gpt1BlockPrescaler_4:
88 freq = freq / 4;
89 break;
90 case IfxGpt12_Gpt1BlockPrescaler_8:
91 freq = freq / 8;
92 break;
93 case IfxGpt12_Gpt1BlockPrescaler_16:
94 freq = freq / 16;
95 break;
96 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
97 freq = freq / 32;
98 break;
99 }
100
101 mode = (IfxGpt12_Mode)gpt12->T3CON.B.T3M;
102 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T3CON.B.T3I;
103
104 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
105 {
106 freq = freq / (1 << prescaler);
107 }
108 else
109 {
110 freq = freq / 2;
111 }
112
113 return freq;
114 }
115
116
117 float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
118 {
119 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
120
121 IfxGpt12_Mode mode;
122 IfxGpt12_TimerInputPrescaler prescaler;
123
124 IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
125
126 switch (bps1)
127 {
128 case IfxGpt12_Gpt1BlockPrescaler_4:
129 freq = freq / 4;
130 break;
131 case IfxGpt12_Gpt1BlockPrescaler_8:
132 freq = freq / 8;
133 break;
134 case IfxGpt12_Gpt1BlockPrescaler_16:
135 freq = freq / 16;
136 break;
137 default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
138 freq = freq / 32;
139 break;
140 }
141
142 mode = (IfxGpt12_Mode)gpt12->T4CON.B.T4M;
143 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T4CON.B.T4I;
144
145 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
146 {
147 freq = freq / (1 << prescaler);
148 }
149 else
150 {
151 freq = freq / 2;
152 }
153
154 return freq;
155 }
156
157
158 float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
159 {
160 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
161
162 IfxGpt12_Mode mode;
163 IfxGpt12_TimerInputPrescaler prescaler;
164
165 IfxGpt12_Gpt2BlockPrescaler bps2 = (IfxGpt12_Gpt2BlockPrescaler)gpt12->T6CON.B.BPS2;
166
167 switch (bps2)
168 {
169 case IfxGpt12_Gpt2BlockPrescaler_2:
170 freq = freq / 2;
171 break;
172 case IfxGpt12_Gpt2BlockPrescaler_4:
173 freq = freq / 4;
174 break;
175 case IfxGpt12_Gpt2BlockPrescaler_8:
176 freq = freq / 8;
177 break;
178 default: /* case IfxGpt12_Gpt2BlockPrescaler_16: */
179 freq = freq / 16;
180 break;
181 }
182
183 mode = (IfxGpt12_Mode)gpt12->T5CON.B.T5M;
184 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T5CON.B.T5I;
185
186 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
187 {
188 freq = freq / (1 << prescaler);
189 }
190 else
191 {
192 freq = freq / 2;
193 }
194
195 return freq;
196 }
197
198
199 float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
200 {
201 float32 freq = IfxGpt12_getModuleFrequency(gpt12);
202
203 IfxGpt12_Mode mode;
204 IfxGpt12_TimerInputPrescaler prescaler;
205
206 IfxGpt12_Gpt2BlockPrescaler bps2 = (IfxGpt12_Gpt2BlockPrescaler)gpt12->T6CON.B.BPS2;
207
208 switch (bps2)
209 {
210 case IfxGpt12_Gpt2BlockPrescaler_2:
211 freq = freq / 2;
212 break;
213 case IfxGpt12_Gpt2BlockPrescaler_4:
214 freq = freq / 4;
215 break;
216 case IfxGpt12_Gpt2BlockPrescaler_8:
217 freq = freq / 8;
218 break;
219 default: /* case IfxGpt12_Gpt2BlockPrescaler_16: */
220 freq = freq / 16;
221 break;
222 }
223
224 mode = (IfxGpt12_Mode)gpt12->T6CON.B.T6M;
225 prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T6CON.B.T6I;
226
227 if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
228 {
229 freq = freq / (1 << prescaler);
230 }
231 else
232 {
233 freq = freq / 2;
234 }
235
236 return freq;
237 }
238
239
240 void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
241 {
242 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
243 IfxScuWdt_clearCpuEndinit(psw);
244 gpt12->CLC.B.DISR = 1;
245 IfxScuWdt_setCpuEndinit(psw);
246 }
247
248
249 void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
250 {
251 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
252 IfxScuWdt_clearCpuEndinit(psw);
253 gpt12->CLC.B.DISR = 0;
254 IfxScuWdt_setCpuEndinit(psw);
255 }
256
257
258 void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
259 {
260 IfxPort_setPinModeInput(txEudIn->pin.port, txEudIn->pin.pinIndex, inputMode);
261
262 switch (txEudIn->timer)
263 {
264 case 2:
265 IfxGpt12_T2_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
266 break;
267 case 3:
268 IfxGpt12_T3_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
269 break;
270 case 4:
271 IfxGpt12_T4_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
272 break;
273 case 5:
274 IfxGpt12_T5_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
275 break;
276 case 6:
277 IfxGpt12_T6_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
278 break;
279 default:
280 break;
281 }
282 }
283
284
285 void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
286 {
287 IfxPort_setPinModeInput(txEudIn->pin.port, txEudIn->pin.pinIndex, inputMode);
288 IfxPort_setPinPadDriver(txEudIn->pin.port, txEudIn->pin.pinIndex, padDriver);
289
290 switch (txEudIn->timer)
291 {
292 case 2:
293 IfxGpt12_T2_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
294 break;
295 case 3:
296 IfxGpt12_T3_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
297 break;
298 case 4:
299 IfxGpt12_T4_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
300 break;
301 case 5:
302 IfxGpt12_T5_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
303 break;
304 case 6:
305 IfxGpt12_T6_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
306 break;
307 default:
308 break;
309 }
310 }
311
312
313 void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
314 {
315 IfxPort_setPinModeInput(txIn->pin.port, txIn->pin.pinIndex, inputMode);
316
317 switch (txIn->timer)
318 {
319 case 2:
320 IfxGpt12_T2_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
321 break;
322 case 3:
323 IfxGpt12_T3_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
324 break;
325 case 4:
326 IfxGpt12_T4_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
327 break;
328 case 5:
329 IfxGpt12_T5_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
330 break;
331 case 6:
332 IfxGpt12_T6_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
333 break;
334 default:
335 break;
336 }
337 }
338
339
340 void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
341 {
342 IfxPort_setPinModeInput(txIn->pin.port, txIn->pin.pinIndex, inputMode);
343 IfxPort_setPinPadDriver(txIn->pin.port, txIn->pin.pinIndex, padDriver);
344
345 switch (txIn->timer)
346 {
347 case 2:
348 IfxGpt12_T2_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
349 break;
350 case 3:
351 IfxGpt12_T3_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
352 break;
353 case 4:
354 IfxGpt12_T4_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
355 break;
356 case 5:
357 IfxGpt12_T5_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
358 break;
359 case 6:
360 IfxGpt12_T6_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
361 break;
362 default:
363 break;
364 }
365 }
366
367
368 void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
369 {
370 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
371
372 IfxScuWdt_clearCpuEndinit(passwd);
373 gpt12->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
374 gpt12->KRST1.B.RST = 1;
375 IfxScuWdt_setCpuEndinit(passwd);
376
377 while (0 == gpt12->KRST0.B.RSTSTAT) /* Wait until reset is executed */
378
379 {}
380
381 IfxScuWdt_clearCpuEndinit(passwd);
382 gpt12->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
383 IfxScuWdt_setCpuEndinit(passwd);
384 }
IfxGpt12_Mode_highGatedTimer
High Gated Timer Mode selected.
Definition: IfxGpt12.h:174
IfxGpt12_T4_setInput
IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer.
Definition: IfxGpt12.h:1310
IfxGpt12_Gpt2BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:138
IfxGpt12_T2_setInput
IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer.
Definition: IfxGpt12.h:1107
IfxGpt12_TxEud_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:52
IfxGpt12_initTxEudInPin
void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input.
Definition: IfxGpt12.c:258
IfxGpt12_Gpt1BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:128
IfxGpt12_T4_setEudInput
IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer.
Definition: IfxGpt12.h:1298
IfxGpt12_Input
IfxGpt12_Input
Input Select for TxIN Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
Definition: IfxGpt12.h:158
IfxGpt12_EudInput
IfxGpt12_EudInput
Input Select for TxEUD Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
Definition: IfxGpt12.h:114
IfxGpt12_TimerInputPrescaler
IfxGpt12_TimerInputPrescaler
Input prescaler Selection for the timer Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) ...
Definition: IfxGpt12.h:234
IfxGpt12_Mode_lowGatedTimer
Low Gated Timer Mode selected.
Definition: IfxGpt12.h:173
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:47
IfxGpt12_T6_getFrequency
float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer.
Definition: IfxGpt12.c:199
IfxGpt12_resetModule
void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
resets GPT12 kernel
Definition: IfxGpt12.c:368
IfxGpt12_T2_getFrequency
float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer.
Definition: IfxGpt12.c:35
float32
float float32
Definition: Platform_Types.h:167
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxGpt12_Gpt2BlockPrescaler
IfxGpt12_Gpt2BlockPrescaler
Gpt2 block prescaler Selection Definition in IfxGPT12.T6CON.B.BPS2.
Definition: IfxGpt12.h:136
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxGpt12_disableModule
void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
Disables the module.
Definition: IfxGpt12.c:240
IfxGpt12_getModuleFrequency
IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency.
Definition: IfxGpt12.h:1560
IfxGpt12_Gpt1BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:127
IfxGpt12_TxEud_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:50
IfxGpt12.h
GPT12 basic functionality.
IfxGpt12_Gpt2BlockPrescaler_2
fGPT/2
Definition: IfxGpt12.h:139
IfxGpt12_Gpt2BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:141
IfxGpt12_Mode
IfxGpt12_Mode
Timer operating mode Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
Definition: IfxGpt12.h:169
IfxGpt12_T6_setInput
IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer.
Definition: IfxGpt12.h:1515
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxGpt12_Gpt1BlockPrescaler
IfxGpt12_Gpt1BlockPrescaler
GPT1 block prescaler Selection Definition in IfxGPT12.T3CON.B.BPS1.
Definition: IfxGpt12.h:125
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56
IfxGpt12_T2_setEudInput
IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer.
Definition: IfxGpt12.h:1094
IfxGpt12_T3_setEudInput
IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer.
Definition: IfxGpt12.h:1200
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxGpt12_initTxInPin
void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input.
Definition: IfxGpt12.c:313
IfxGpt12_Gpt1BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:130
IfxGpt12_initTxInPinWithPadLevel
void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:340
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGpt12_enableModule
void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
Enables the module.
Definition: IfxGpt12.c:249
IfxGpt12_T4_getFrequency
float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer.
Definition: IfxGpt12.c:117
IfxGpt12_T6_setEudInput
IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer.
Definition: IfxGpt12.h:1508
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxGpt12_initTxEudInPinWithPadLevel
void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:285
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxGpt12_TxEud_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:49
IfxGpt12_T3_setInput
IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer.
Definition: IfxGpt12.h:1212
IfxGpt12_T5_setEudInput
IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer.
Definition: IfxGpt12.h:1419
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:171
IfxGpt12_T2_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer.
Definition: IfxGpt12.h:1051
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxGpt12_TxEud_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:51
IfxGpt12_T5_setInput
IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer.
Definition: IfxGpt12.h:1426
IfxGpt12_T3_getFrequency
float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer.
Definition: IfxGpt12.c:76
IfxGpt12_T5_getFrequency
float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:158


iLLD_TC26B: IfxGpt12.h Source File

  • Gpt12
  • Std
IfxGpt12.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12.h
3 * \brief GPT12 basic functionality
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gpt12_Std_Enumerations Enumerations
25 * \ingroup IfxLld_Gpt12_Std
26 * \defgroup IfxLld_Gpt12_Std_InterruptFunctions Interrupt Functions
27 * \ingroup IfxLld_Gpt12_Std
28 * \defgroup IfxLld_Gpt12_Std_ConfigurationFunctions Configuration Functions
29 * \ingroup IfxLld_Gpt12_Std
30 * \defgroup IfxLld_Gpt12_Std_UtilityFunctions Utility Functions
31 * \ingroup IfxLld_Gpt12_Std
32 * \defgroup IfxLld_Gpt12_Std_OperativeFunctions Operative Functions
33 * \ingroup IfxLld_Gpt12_Std
34 */
35
36 #ifndef IFXGPT12_H
37 #define IFXGPT12_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "_Impl/IfxGpt12_cfg.h"
44 #include "Src/Std/IfxSrc.h"
45 #include "_Utilities/Ifx_Assert.h"
46 #include "Scu/Std/IfxScuCcu.h"
47 #include "IfxGpt12_reg.h"
48 #include "_PinMap/IfxGpt12_PinMap.h"
49
50 /******************************************************************************/
51 /*--------------------------------Enumerations--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_Gpt12_Std_Enumerations
55 * \{ */
56 /** \brief Input Select for CAPIN \n
57 * Definition in IfxGPT12.PISEL.B.ISCAPIN
58 */
59 typedef enum
60 {
61 IfxGpt12_CaptureInput_A = 0, /**< \brief signal CAPINA selected */
62 IfxGpt12_CaptureInput_B = 1, /**< \brief signal CAPINB selected */
63 IfxGpt12_CaptureInput_C = 2, /**< \brief signal CAPINC selected */
64 IfxGpt12_CaptureInput_D = 3 /**< \brief signal CAPIND selected */
65 } IfxGpt12_CaptureInput;
66
67 /** \brief Tx Input Edge Selection (Capture Mode, x=2,4)
68 */
69 typedef enum
70 {
71 IfxGpt12_CaptureInputMode_none = 0, /**< \brief None, Counter is disabled */
72 IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
73 IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
74 IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3 /**< \brief (rising or falling edge) on TxIN */
75 } IfxGpt12_CaptureInputMode;
76
77 /** \brief Capture Trigger Enable \n
78 * Definition in IfxGPT12.T5CON.B.CT3
79 */
80 typedef enum
81 {
82 IfxGpt12_CaptureTrigger_capin = 0, /**< \brief Capture Trigger Enable from CAPIN */
83 IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1 /**< \brief Capture Trigger Enable from T3IN/T3EUD */
84 } IfxGpt12_CaptureTrigger;
85
86 /** \brief Capture Trigger Selection \n
87 * Definition in IfxGPT12.T5CON.B.CI
88 */
89 typedef enum
90 {
91 IfxGpt12_CaptureTriggerMode_disabled = 0, /**< \brief capture disabled */
92 IfxGpt12_CaptureTriggerMode_risingEdge = 1, /**< \brief positive Transition on CAPIN or any Transition on T3IN */
93 IfxGpt12_CaptureTriggerMode_fallingEdge = 2, /**< \brief negative Transition on CAPIN or any Transition on T3EUD */
94 IfxGpt12_CaptureTriggerMode_randomEdge = 3 /**< \brief Any Transition on CAPIN or any Transition on T3IN/T3EUD */
95 } IfxGpt12_CaptureTriggerMode;
96
97 /** \brief Input Edge Selection for counter mode\n
98 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6)
99 */
100 typedef enum
101 {
102 IfxGpt12_CounterInputMode_counterDisabled = 0, /**< \brief Counter Tx is disabled */
103 IfxGpt12_CounterInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
104 IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
105 IfxGpt12_CounterInputMode_bothEdgesTxIN = 3, /**< \brief rising or falling edge on TxIN */
106 IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5, /**< \brief rising edge of TxOTL (x=3,6) */
107 IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6, /**< \brief falling edge of TxOTL */
108 IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7 /**< \brief rising or falling edge of TxOTL */
109 } IfxGpt12_CounterInputMode;
110
111 /** \brief Input Select for TxEUD \n
112 * Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
113 */
114 typedef enum
115 {
116 IfxGpt12_EudInput_A = 0, /**< \brief signal TXEUDA selected */
117 IfxGpt12_EudInput_B = 1, /**< \brief signal TXEUDB selected */
118 IfxGpt12_EudInput_C = 2, /**< \brief signal TXEUDC selected */
119 IfxGpt12_EudInput_D = 3 /**< \brief signal TXEUDD selected */
120 } IfxGpt12_EudInput;
121
122 /** \brief GPT1 block prescaler Selection\n
123 * Definition in IfxGPT12.T3CON.B.BPS1
124 */
125 typedef enum
126 {
127 IfxGpt12_Gpt1BlockPrescaler_8 = 0, /**< \brief fGPT/8 */
128 IfxGpt12_Gpt1BlockPrescaler_4 = 1, /**< \brief fGPT/4 */
129 IfxGpt12_Gpt1BlockPrescaler_32 = 2, /**< \brief fGPT/32 */
130 IfxGpt12_Gpt1BlockPrescaler_16 = 3 /**< \brief fGPT/16 */
131 } IfxGpt12_Gpt1BlockPrescaler;
132
133 /** \brief Gpt2 block prescaler Selection\n
134 * Definition in IfxGPT12.T6CON.B.BPS2
135 */
136 typedef enum
137 {
138 IfxGpt12_Gpt2BlockPrescaler_4 = 0, /**< \brief fGPT/4 */
139 IfxGpt12_Gpt2BlockPrescaler_2 = 1, /**< \brief fGPT/2 */
140 IfxGpt12_Gpt2BlockPrescaler_16 = 2, /**< \brief fGPT/16 */
141 IfxGpt12_Gpt2BlockPrescaler_8 = 3 /**< \brief fGPT/8 */
142 } IfxGpt12_Gpt2BlockPrescaler;
143
144 /** \brief Input Edge Selection for Incremental Interface mode\n
145 * Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)
146 */
147 typedef enum
148 {
149 IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0, /**< \brief Counter Tx Stop */
150 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1, /**< \brief (rising or falling edge) on TxIN */
151 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2, /**< \brief (rising or falling edge) on TxEUD */
152 IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3 /**< \brief (rising or falling edge) on any Tx input (TxIN or TxEUD) */
153 } IfxGpt12_IncrementalInterfaceInputMode;
154
155 /** \brief Input Select for TxIN \n
156 * Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
157 */
158 typedef enum
159 {
160 IfxGpt12_Input_A = 0, /**< \brief signal TXINA selected */
161 IfxGpt12_Input_B = 1, /**< \brief signal TXINB selected */
162 IfxGpt12_Input_C = 2, /**< \brief signal TXINC selected */
163 IfxGpt12_Input_D = 3 /**< \brief signal TXIND selected */
164 } IfxGpt12_Input;
165
166 /** \brief Timer operating mode \n
167 * Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
168 */
169 typedef enum
170 {
171 IfxGpt12_Mode_timer = 0, /**< \brief Timer Mode selected */
172 IfxGpt12_Mode_counter = 1, /**< \brief Counter Mode selected */
173 IfxGpt12_Mode_lowGatedTimer = 2, /**< \brief Low Gated Timer Mode selected */
174 IfxGpt12_Mode_highGatedTimer = 3, /**< \brief High Gated Timer Mode selected */
175 IfxGpt12_Mode_reload = 4, /**< \brief Reload Mode selected */
176 IfxGpt12_Mode_capture = 5, /**< \brief Capture Mode selected */
177 IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6, /**< \brief Incremental Interface Mode selected */
178 IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7 /**< \brief Incremental Interface Mode selected */
179 } IfxGpt12_Mode;
180
181 /** \brief Input Edge Selection for reload mode\n
182 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4)
183 */
184 typedef enum
185 {
186 IfxGpt12_ReloadInputMode_counterDisabled = 0, /**< \brief Counter Tx is disabled */
187 IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
188 IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
189 IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3, /**< \brief rising or falling edge on TxIN */
190 IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5, /**< \brief rising edge of Tx toggle latch TxOTL */
191 IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6, /**< \brief falling edge of Tx toggle latch TxOTL */
192 IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7 /**< \brief rising or falling edge of Tx toggle latch TxOTL */
193 } IfxGpt12_ReloadInputMode;
194
195 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
196 * Definition in Ifx_GPT12.CLC.B.EDIS
197 */
198 typedef enum
199 {
200 IfxGpt12_SleepMode_enable = 0, /**< \brief enables sleep mode */
201 IfxGpt12_SleepMode_disable = 1 /**< \brief disables sleep mode */
202 } IfxGpt12_SleepMode;
203
204 /** \brief OCDS Suspend Control (OCDS.SUS)
205 */
206 typedef enum
207 {
208 IfxGpt12_SuspendMode_none = 0, /**< \brief No suspend */
209 IfxGpt12_SuspendMode_hard = 1, /**< \brief Hard Suspend */
210 IfxGpt12_SuspendMode_soft = 2 /**< \brief Soft Suspend */
211 } IfxGpt12_SuspendMode;
212
213 /** \brief Timer Count Direction\n
214 * Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)
215 */
216 typedef enum
217 {
218 IfxGpt12_TimerDirection_up = 0, /**< \brief Timer Up Direction selected */
219 IfxGpt12_TimerDirection_down = 1 /**< \brief Timer Down Direction selected */
220 } IfxGpt12_TimerDirection;
221
222 /** \brief Timer count direction control source\n
223 * Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6)
224 */
225 typedef enum
226 {
227 IfxGpt12_TimerDirectionSource_internal = 0, /**< \brief Timer Dir Control = TxUD (x=2,3,4) */
228 IfxGpt12_TimerDirectionSource_external = 1 /**< \brief Timer Dir Control = TxUD (x=2,3,4) */
229 } IfxGpt12_TimerDirectionSource;
230
231 /** \brief Input prescaler Selection for the timer\n
232 * Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4)
233 */
234 typedef enum
235 {
236 IfxGpt12_TimerInputPrescaler_1 = 0,
237 IfxGpt12_TimerInputPrescaler_2 = 1,
238 IfxGpt12_TimerInputPrescaler_4 = 2,
239 IfxGpt12_TimerInputPrescaler_8 = 3,
240 IfxGpt12_TimerInputPrescaler_16 = 4,
241 IfxGpt12_TimerInputPrescaler_32 = 5,
242 IfxGpt12_TimerInputPrescaler_64 = 6,
243 IfxGpt12_TimerInputPrescaler_128 = 7
244 } IfxGpt12_TimerInputPrescaler;
245
246 /** \brief Timer Reload Mode\n
247 * Definition in IfxGPT12.T6CON.B.T6SR
248 */
249 typedef enum
250 {
251 IfxGpt12_TimerReloadMode_disable, /**< \brief Reload mode disabled */
252 IfxGpt12_TimerReloadMode_enable /**< \brief Reload mode enabled */
253 } IfxGpt12_TimerReloadMode;
254
255 /** \brief Timer Remote Control enable choice \n
256 * Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4)
257 */
258 typedef enum
259 {
260 IfxGpt12_TimerRemoteControl_off = 0, /**< \brief T2 RemoteControl Off */
261 IfxGpt12_TimerRemoteControl_on = 1 /**< \brief T2 RemoteControl On */
262 } IfxGpt12_TimerRemoteControl;
263
264 /** \brief Timer Run / stop control choice (only if TxCON.B.TxRC = 0)\n
265 * Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)
266 */
267 typedef enum
268 {
269 IfxGpt12_TimerRun_stop = 0, /**< \brief Timer x Stops */
270 IfxGpt12_TimerRun_start = 1 /**< \brief Timer X Run */
271 } IfxGpt12_TimerRun;
272
273 /** \} */
274
275 /** \addtogroup IfxLld_Gpt12_Std_InterruptFunctions
276 * \{ */
277
278 /******************************************************************************/
279 /*-------------------------Inline Function Prototypes-------------------------*/
280 /******************************************************************************/
281
282 /** \brief Returns the address of Timer 2 service request
283 * \param gpt12 Pointer to module base address
284 * \return address of timer 2 Interrupt
285 */
286 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12);
287
288 /** \brief Returns the address of Timer 3 service request
289 * \param gpt12 Pointer to module base address
290 * \return address of Timer 3 Interrupt
291 */
292 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12);
293
294 /** \brief Returns the address of Timer 4 service request
295 * \param gpt12 Pointer to module base address
296 * \return address of timer 4 interrupt
297 */
298 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12);
299
300 /** \brief Returns the address of Timer 5 service request
301 * \param gpt12 Pointer to module base address
302 * \return address of Timer 5 Interrupt
303 */
304 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12);
305
306 /** \brief Returns the address of Timer 6 service request
307 * \param gpt12 Pointer to module base address
308 * \return address of Timer 6 interrupt
309 */
310 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12);
311
312 /** \brief Returns the address of capture service request
313 * \param gpt12 Pointer to module base address
314 * \return address of capture Interrupt
315 */
316 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12);
317
318 /** \} */
319
320 /** \addtogroup IfxLld_Gpt12_Std_ConfigurationFunctions
321 * \{ */
322
323 /******************************************************************************/
324 /*-------------------------Inline Function Prototypes-------------------------*/
325 /******************************************************************************/
326
327 /** \brief Sets the input edge selection for the capture mode of the T2 timer
328 * \param gpt12 Pointer to module base address
329 * \param inputMode input prescaler value in capture mode
330 * \return None
331 */
332 IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode);
333
334 /** \brief Sets the input edge selection for the counter mode of the T2 timer
335 * \param gpt12 Pointer to module base address
336 * \param inputMode input edge selection in counter mode
337 * \return None
338 */
339 IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
340
341 /** \brief Sets the T2 timer count direction source internal / external
342 * \param gpt12 Pointer to module base address
343 * \param source direction source
344 * \return None
345 */
346 IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
347
348 /** \brief Sets the EUD input for the T2 timer
349 * \param gpt12 Pointer to module base address
350 * \param input Select the EUD input signal
351 * \return None
352 */
353 IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
354
355 /** \brief Sets the input edge selection for the incremental interface mode of the T2 timer
356 * \param gpt12 Pointer to module base address
357 * \param inputMode input edge selection in IIM mode
358 * \return None
359 */
360 IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
361
362 /** \brief Sets the input for the T2 timer
363 * \param gpt12 Pointer to module base address
364 * \param input Select the Input signal
365 * \return None
366 */
367 IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
368
369 /** \brief Enables / Disables the interrupt generation of the T2 timer
370 * \param gpt12 pointer to module base address
371 * \param enabled Enable/Disable choice
372 * \return None
373 */
374 IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled);
375
376 /** \brief Sets the mode of operation od T2 timer
377 * \param gpt12 Pointer to module base address
378 * \param mode Select the mode of operation
379 * \return None
380 */
381 IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
382
383 /** \brief Sets the input edge selection for the reload mode of the T2 timer
384 * \param gpt12 Pointer to module base address
385 * \param inputMode input prescaler value in reload mode
386 * \return None
387 */
388 IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode);
389
390 /** \brief Sets the remote control of the T2 timer
391 * \param gpt12 pointer to module base address
392 * \param control enable the remote control
393 * \return None
394 */
395 IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
396
397 /** \brief Sets the T2 timer count direction
398 * \param gpt12 Pointer to module base address
399 * \param direction select the Timer direction
400 * \return None
401 */
402 IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
403
404 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer
405 * \param gpt12 Pointer to module base address
406 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
407 * \return None
408 */
409 IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
410
411 /** \brief Enable / Disable the T3 Output on pin T3OUT
412 * \param gpt12 Pointer to module base address
413 * \param enable enable / disable choice for T3OE
414 * \return None
415 */
416 IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable);
417
418 /** \brief Sets the input edge selection for the counter mode of the T3 timer
419 * \param gpt12 Pointer to module base address
420 * \param inputMode input edge selection in counter mode
421 * \return None
422 */
423 IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
424
425 /** \brief Sets the T3 timer count direction source internal / external
426 * \param gpt12 Pointer to module base address
427 * \param source direction source
428 * \return None
429 */
430 IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
431
432 /** \brief Sets the EUD input for the T3 timer
433 * \param gpt12 Pointer to module base address
434 * \param input Select the EUD input signal
435 * \return None
436 */
437 IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
438
439 /** \brief Sets the input edge selection for the incremental interface mode of the T3 timer
440 * \param gpt12 Pointer to module base address
441 * \param inputMode input edge selection in IIM mode
442 * \return None
443 */
444 IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
445
446 /** \brief Sets the input for the T3 timer
447 * \param gpt12 Pointer to module base address
448 * \param input Select the Input signal
449 * \return None
450 */
451 IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
452
453 /** \brief Sets the mode of operation od T3 timer
454 * \param gpt12 Pointer to module base address
455 * \param mode Select the mode of operation
456 * \return None
457 */
458 IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
459
460 /** \brief Sets the T3 timer count direction
461 * \param gpt12 Pointer to module base address
462 * \param direction select the Timer direction
463 * \return None
464 */
465 IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
466
467 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer
468 * \param gpt12 Pointer to module base address
469 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
470 * \return None
471 */
472 IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
473
474 /** \brief Enables / Disables the clear timer T2 bit of the T4 timer
475 * \param gpt12 pointer to module base address
476 * \param enabled Enable/Disable choice
477 * \return None
478 */
479 IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled);
480
481 /** \brief Enables / Disables the clear timer T3 bit of the T4 timer
482 * \param gpt12 pointer to module base address
483 * \param enabled Enable/Disable choice
484 * \return None
485 */
486 IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled);
487
488 /** \brief Sets the input edge selection for the capture mode of the T4 timer
489 * \param gpt12 Pointer to module base address
490 * \param inputMode input prescaler value in capture mode
491 * \return None
492 */
493 IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode);
494
495 /** \brief Sets the input edge selection for the counter mode of the T4 timer
496 * \param gpt12 Pointer to module base address
497 * \param inputMode input edge selection in counter mode
498 * \return None
499 */
500 IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
501
502 /** \brief Sets the T4 timer count direction source internal / external
503 * \param gpt12 Pointer to module base address
504 * \param source direction source
505 * \return None
506 */
507 IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
508
509 /** \brief Sets the EUD input for the T4 timer
510 * \param gpt12 Pointer to module base address
511 * \param input Select the EUD input signal
512 * \return None
513 */
514 IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
515
516 /** \brief Sets the input edge selection for the incremental interface mode of the T4 timer
517 * \param gpt12 Pointer to module base address
518 * \param inputMode input edge selection in IIM mode
519 * \return None
520 */
521 IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
522
523 /** \brief Sets the input for the T4 timer
524 * \param gpt12 Pointer to module base address
525 * \param input Select the Input signal
526 * \return None
527 */
528 IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
529
530 /** \brief Enables / Disables the interrupt generation of the T4 timer
531 * \param gpt12 pointer to module base address
532 * \param enabled Enable/Disable choice
533 * \return None
534 */
535 IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled);
536
537 /** \brief Sets the mode of operation od T4 timer
538 * \param gpt12 Pointer to module base address
539 * \param mode Select the mode of operation
540 * \return None
541 */
542 IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
543
544 /** \brief Sets the input edge selection for the reload mode of the T4 timer
545 * \param gpt12 Pointer to module base address
546 * \param inputMode input prescaler value in reload mode
547 * \return None
548 */
549 IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode);
550
551 /** \brief Sets the remote control of the T4 timer
552 * \param gpt12 pointer to module base address
553 * \param control enable the remote control
554 * \return None
555 */
556 IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
557
558 /** \brief Sets the T4 timer count direction
559 * \param gpt12 Pointer to module base address
560 * \param direction select the Timer direction
561 * \return None
562 */
563 IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
564
565 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer
566 * \param gpt12 Pointer to module base address
567 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
568 * \return None
569 */
570 IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
571
572 /** \brief Enables / Disables the clear timer bit of the T5 timer
573 * \param gpt12 pointer to module base address
574 * \param enabled Enable/Disable choice
575 * \return None
576 */
577 IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled);
578
579 /** \brief Sets the capture trigger of teh T5 timer
580 * \param gpt12 Pointer to Module base address
581 * \param trigger Capture trigger
582 * \return None
583 */
584 IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger);
585
586 /** \brief Enables / Disables the capture trigger of the T5 timer
587 * \param gpt12 pointer to module base address
588 * \param enabled Enable/Disable choice
589 * \return None
590 */
591 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled);
592
593 /** \brief Sets the capture trigger mode of the T5 timer
594 * \param gpt12 Pointer to module base address
595 * \param mode Select the capture trigger mode
596 * \return None
597 */
598 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode);
599
600 /** \brief Sets the input edge selection for the counter mode of the T5 timer
601 * \param gpt12 Pointer to module base address
602 * \param inputMode input edge selection in counter mode
603 * \return None
604 */
605 IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
606
607 /** \brief Sets the T5 timer count direction source internal / external
608 * \param gpt12 Pointer to module base address
609 * \param source direction source
610 * \return None
611 */
612 IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
613
614 /** \brief Sets the EUD input for the T5 timer
615 * \param gpt12 Pointer to module base address
616 * \param input Select the EUD input signal
617 * \return None
618 */
619 IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
620
621 /** \brief Sets the input for the T5 timer
622 * \param gpt12 Pointer to module base address
623 * \param input Select the Input signal
624 * \return None
625 */
626 IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
627
628 /** \brief Sets the mode of operation od T5 timer
629 * \param gpt12 Pointer to module base address
630 * \param mode Select the mode of operation
631 * \return None
632 */
633 IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
634
635 /** \brief Sets the remote control of the T5 timer
636 * \param gpt12 pointer to module base address
637 * \param control enable the remote control
638 * \return None
639 */
640 IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
641
642 /** \brief Sets the T5 timer count direction
643 * \param gpt12 Pointer to module base address
644 * \param direction select the Timer direction
645 * \return None
646 */
647 IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
648
649 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer
650 * \param gpt12 Pointer to module base address
651 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
652 * \return None
653 */
654 IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
655
656 /** \brief Enables / Disables the clear timer bit of the T6 timer
657 * \param gpt12 pointer to module base address
658 * \param enabled Enable/Disable choice
659 * \return None
660 */
661 IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled);
662
663 /** \brief Sets the input edge selection for the counter mode of the T6 timer
664 * \param gpt12 Pointer to module base address
665 * \param inputMode input edge selection in counter mode
666 * \return None
667 */
668 IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
669
670 /** \brief sets the T6 timer count direction source internal / external
671 * \param gpt12 Pointer to module base address
672 * \param source direction source
673 * \return None
674 */
675 IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
676
677 /** \brief Sets the EUD input for the T6 timer
678 * \param gpt12 Pointer to module base address
679 * \param input Select the EUD input signal
680 * \return None
681 */
682 IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
683
684 /** \brief Sets the input for the T6 timer
685 * \param gpt12 Pointer to module base address
686 * \param input Select the Input signal
687 * \return None
688 */
689 IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
690
691 /** \brief Sets the mode of operation od T6 timer
692 * \param gpt12 Pointer to module base address
693 * \param mode Select the mode of operation
694 * \return None
695 */
696 IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
697
698 /** \brief sets the T6 timer count direction
699 * \param gpt12 Pointer to module base address
700 * \param mode Timer Reload Mode
701 * \return None
702 */
703 IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode);
704
705 /** \brief sets the T6 timer count direction
706 * \param gpt12 Pointer to module base address
707 * \param direction select the Timer direction
708 * \return None
709 */
710 IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
711
712 /** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer
713 * \param gpt12 Pointer to module base address
714 * \param inputPrescaler input prescaler value in timer mode and gated timer mode
715 * \return None
716 */
717 IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
718
719 /** \brief Initializes a Capin_In input
720 * \param capIn the TxIn Pin which should be configured
721 * \param inputMode the pin input mode which should be configured
722 * \return None
723 */
724 IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode);
725
726 /** \brief Initializes a SLSO output
727 * \param txOut the TxOUT Pin which should be configured
728 * \param outputMode the pin output mode which should be configured
729 * \param padDriver the pad driver mode which should be configured
730 * \return None
731 */
732 IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
733
734 /** \brief Sets the capture input
735 * \param gpt12 Pointer to Module base address
736 * \param input Select the capture input signal
737 * \return None
738 */
739 IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input);
740
741 /** \brief Sets the GPT1 block prescaler
742 * \param gpt12 Pointer to module base address
743 * \param bps1 Select the GPT1 block Prescaler
744 * \return None
745 */
746 IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1);
747
748 /** \brief Sets the GPT2 block prescaler
749 * \param gpt12 Pointer to module base address
750 * \param bps2 Select the GPT2 block Prescaler
751 * \return None
752 */
753 IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2);
754
755 /******************************************************************************/
756 /*-------------------------Global Function Prototypes-------------------------*/
757 /******************************************************************************/
758
759 /** \brief Disables the module
760 * \param gpt12 Pointer to module base address
761 * \return None
762 */
763 IFX_EXTERN void IfxGpt12_disableModule(Ifx_GPT12 *gpt12);
764
765 /** \brief Enables the module
766 * \param gpt12 Pointer to module base address
767 * \return None
768 */
769 IFX_EXTERN void IfxGpt12_enableModule(Ifx_GPT12 *gpt12);
770
771 /** \brief Initializes a TxEUDIn_IN input
772 * \param txEudIn the TxEUD_IN Pin which should be configured
773 * \param inputMode the pin input mode which should be configured
774 * \return None
775 */
776 IFX_EXTERN void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode);
777
778 /** \brief Initializes a TxIn input
779 * \param txIn the TxIn Pin which should be configured
780 * \param inputMode the pin input mode which should be configured
781 * \return None
782 */
783 IFX_EXTERN void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode);
784
785 /** \} */
786
787 /** \addtogroup IfxLld_Gpt12_Std_UtilityFunctions
788 * \{ */
789
790 /******************************************************************************/
791 /*-------------------------Inline Function Prototypes-------------------------*/
792 /******************************************************************************/
793
794 /** \brief Returns the operating mode of the T2 timer
795 * \param gpt12 Pointer to module base address
796 * \return mode of operation
797 */
798 IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12);
799
800 /** \brief Returns the timer value of the T2 timer
801 * \param gpt12 Pointer to module base address
802 * \return timer current value
803 */
804 IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12);
805
806 /** \brief Returns the operating mode of the T3 timer
807 * \param gpt12 Pointer to module base address
808 * \return mode of operation
809 */
810 IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12);
811
812 /** \brief Returns the timer value of the T3 timer
813 * \param gpt12 Pointer to module base address
814 * \return timer current value
815 */
816 IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12);
817
818 /** \brief Returns the operating mode of the T4 timer
819 * \param gpt12 Pointer to module base address
820 * \return mode of operation
821 */
822 IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12);
823
824 /** \brief Returns the timer value of the T4 timer
825 * \param gpt12 Pointer to module base address
826 * \return timer current value
827 */
828 IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12);
829
830 /** \brief Returns the operating mode of the T5 timer
831 * \param gpt12 Pointer to module base address
832 * \return mode of operation
833 */
834 IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12);
835
836 /** \brief Returns the timer value of the T5 timer
837 * \param gpt12 Pointer to module base address
838 * \return timer current value
839 */
840 IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12);
841
842 /** \brief Returns the operating mode of the T6 timer
843 * \param gpt12 Pointer to module base address
844 * \return mode of operation
845 */
846 IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12);
847
848 /** \brief Returns the timer value of the T6 timer
849 * \param gpt12 Pointer to module base address
850 * \return timer current value
851 */
852 IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12);
853
854 /** \brief Returns the gpt12 module frequency
855 * \param gpt12 Pointer to module base address
856 * \return gpt12 module frequency
857 */
858 IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12);
859
860 /******************************************************************************/
861 /*-------------------------Global Function Prototypes-------------------------*/
862 /******************************************************************************/
863
864 /** \brief Returns the frequency of the T2 timer
865 * \param gpt12 Pointer to Module base address
866 * \return frequency
867 */
868 IFX_EXTERN float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12);
869
870 /** \brief Returns the frequency of the T3 timer
871 * \param gpt12 Pointer to Module base address
872 * \return frequency
873 */
874 IFX_EXTERN float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12);
875
876 /** \brief Returns the frequency of the T4 timer
877 * \param gpt12 Pointer to Module base address
878 * \return frequency
879 */
880 IFX_EXTERN float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12);
881
882 /** \brief Returns the frequency of the T5 timer
883 * \param gpt12 Pointer to Module base address
884 * \return frequency
885 */
886 IFX_EXTERN float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12);
887
888 /** \brief Returns the frequency of the T6 timer
889 * \param gpt12 Pointer to Module base address
890 * \return frequency
891 */
892 IFX_EXTERN float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12);
893
894 /** \} */
895
896 /** \addtogroup IfxLld_Gpt12_Std_OperativeFunctions
897 * \{ */
898
899 /******************************************************************************/
900 /*-------------------------Inline Function Prototypes-------------------------*/
901 /******************************************************************************/
902
903 /** \brief Starts / stops the T2 Timer
904 * \param gpt12 Pointer to Module base address
905 * \param runTimer Start/stop Timer 2
906 * \return None
907 */
908 IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
909
910 /** \brief Sets value for the T2 timer
911 * \param gpt12 pointer to module base address
912 * \param value Timer Value
913 * \return None
914 */
915 IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
916
917 /** \brief Starts / stops the T3 Timer
918 * \param gpt12 Pointer to module base address
919 * \param runTimer start/stop Timer 3
920 * \return None
921 */
922 IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
923
924 /** \brief Sets value for the T3 Timer
925 * \param gpt12 pointer to module base address
926 * \param value Timer Value
927 * \return None
928 */
929 IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
930
931 /** \brief Starts / stops the T4 Timer
932 * \param gpt12 Pointer to module base address
933 * \param runTimer Start/stop Timer 4
934 * \return None
935 */
936 IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
937
938 /** \brief Sets value for the T4 timer
939 * \param gpt12 pointer to module base address
940 * \param value Timer Value
941 * \return None
942 */
943 IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
944
945 /** \brief Starts / stops the T5 Timer
946 * \param gpt12 Pointer to module base address
947 * \param runTimer Start/stop Timer 5
948 * \return None
949 */
950 IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
951
952 /** \brief Sets value for the T5 timer
953 * \param gpt12 pointer to module base address
954 * \param value Timer Value
955 * \return None
956 */
957 IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
958
959 /** \brief Starts / stops the T6 Timer
960 * \param gpt12 Pointer to module base address
961 * \param runTimer Start/stop Timer 6
962 * \return None
963 */
964 IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
965
966 /** \brief Sets value for the T6 timer
967 * \param gpt12 pointer to module base address
968 * \param value Timer Value
969 * \return None
970 */
971 IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
972
973 /** \brief Sets the sensitivity of the module to sleep signal
974 * \param gpt12 pointer to GPT12 registers
975 * \param value Reload value
976 * \return None
977 */
978 IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value);
979
980 /** \brief Sets the sensitivity of the module to sleep signal
981 * \param gpt12 pointer to GPT12 registers
982 * \param mode mode selection (enable/disable)
983 * \return None
984 */
985 IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode);
986
987 /** \brief Configure the Module to Hard/Soft suspend mode.
988 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
989 * \param gpt12 Pointer to GPT12 module registers
990 * \param mode Module suspend mode
991 * \return None
992 */
993 IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode);
994
995 /******************************************************************************/
996 /*-------------------------Global Function Prototypes-------------------------*/
997 /******************************************************************************/
998
999 /** \brief resets GPT12 kernel
1000 * \param gpt12 pointer to GPT12 registers
1001 * \return None
1002 */
1003 IFX_EXTERN void IfxGpt12_resetModule(Ifx_GPT12 *gpt12);
1004
1005 /** \} */
1006
1007 /******************************************************************************/
1008 /*-------------------------Inline Function Prototypes-------------------------*/
1009 /******************************************************************************/
1010
1011 /** \brief Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver
1012 * \param capIn the TxIn Pin which should be configured
1013 * \param inputMode the pin input mode which should be configured
1014 * \param padDriver the pad driver mode which should be configured
1015 * \return None
1016 */
1017 IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1018
1019 /** \brief Returns the module's suspend state.
1020 * TRUE :if module is suspended.
1021 * FALSE:if module is not yet suspended.
1022 * \param gpt12 Pointer to GPT12 module registers
1023 * \return Suspend status (TRUE / FALSE)
1024 */
1025 IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12);
1026
1027 /******************************************************************************/
1028 /*-------------------------Global Function Prototypes-------------------------*/
1029 /******************************************************************************/
1030
1031 /** \brief Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver
1032 * \param txEudIn the TxEUD_IN Pin which should be configured
1033 * \param inputMode the pin input mode which should be configured
1034 * \param padDriver the pad driver mode which should be configured
1035 * \return None
1036 */
1037 IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1038
1039 /** \brief Provides functionality for both setting of TXIN pin direction as input and configuring pad driver
1040 * \param txIn the TxIn Pin which should be configured
1041 * \param inputMode the pin input mode which should be configured
1042 * \param padDriver the pad driver mode which should be configured
1043 * \return None
1044 */
1045 IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
1046
1047 /******************************************************************************/
1048 /*---------------------Inline Function Implementations------------------------*/
1049 /******************************************************************************/
1050
1051 IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
1052 {
1053 return (IfxGpt12_Mode)gpt12->T2CON.B.T2M;
1054 }
1055
1056
1057 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12)
1058 {
1059 IFX_UNUSED_PARAMETER(gpt12)
1060 return &MODULE_SRC.GPT12.GPT12[0].T2;
1061 }
1062
1063
1064 IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12)
1065 {
1066 return (uint16)gpt12->T2.U;
1067 }
1068
1069
1070 IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1071 {
1072 gpt12->T2CON.B.T2R = runTimer;
1073 }
1074
1075
1076 IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
1077 {
1078 gpt12->T2CON.B.T2I = inputMode;
1079 }
1080
1081
1082 IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1083 {
1084 gpt12->T2CON.B.T2I = inputMode;
1085 }
1086
1087
1088 IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1089 {
1090 gpt12->T2CON.B.T2UDE = source;
1091 }
1092
1093
1094 IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1095 {
1096 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1097 gpt12->PISEL.B.IST2EUD = input;
1098 }
1099
1100
1101 IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1102 {
1103 gpt12->T2CON.B.T2I = inputMode;
1104 }
1105
1106
1107 IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1108 {
1109 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1110 gpt12->PISEL.B.IST2IN = input;
1111 }
1112
1113
1114 IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
1115 {
1116 gpt12->T2CON.B.T2IRDIS = enabled ? 0 : 1;
1117 }
1118
1119
1120 IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1121 {
1122 gpt12->T2CON.B.T2M = mode;
1123 }
1124
1125
1126 IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
1127 {
1128 gpt12->T2CON.B.T2I = inputMode;
1129 }
1130
1131
1132 IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1133 {
1134 gpt12->T2CON.B.T2RC = control;
1135 }
1136
1137
1138 IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1139 {
1140 gpt12->T2CON.B.T2UD = direction;
1141 }
1142
1143
1144 IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1145 {
1146 gpt12->T2CON.B.T2I = inputPrescaler;
1147 }
1148
1149
1150 IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1151 {
1152 gpt12->T2.U = value;
1153 }
1154
1155
1156 IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
1157 {
1158 gpt12->T3CON.B.T3OE = enable ? 1 : 0;
1159 }
1160
1161
1162 IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12)
1163 {
1164 return (IfxGpt12_Mode)gpt12->T3CON.B.T3M;
1165 }
1166
1167
1168 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12)
1169 {
1170 IFX_UNUSED_PARAMETER(gpt12)
1171 return &MODULE_SRC.GPT12.GPT12[0].T3;
1172 }
1173
1174
1175 IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12)
1176 {
1177 return (uint16)gpt12->T3.U;
1178 }
1179
1180
1181 IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1182 {
1183 gpt12->T3CON.B.T3R = runTimer;
1184 }
1185
1186
1187 IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1188 {
1189 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, inputMode <= IfxGpt12_CounterInputMode_bothEdgesTxIN); /* wrong selection */
1190 gpt12->T3CON.B.T3I = inputMode;
1191 }
1192
1193
1194 IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1195 {
1196 gpt12->T3CON.B.T3UDE = source;
1197 }
1198
1199
1200 IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1201 {
1202 gpt12->PISEL.B.IST3EUD = input;
1203 }
1204
1205
1206 IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1207 {
1208 gpt12->T3CON.B.T3I = inputMode;
1209 }
1210
1211
1212 IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1213 {
1214 gpt12->PISEL.B.IST3IN = input;
1215 }
1216
1217
1218 IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1219 {
1220 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, ((mode != IfxGpt12_Mode_reload) && (mode != IfxGpt12_Mode_capture))); /* wrong selection */
1221 gpt12->T3CON.B.T3M = mode;
1222 }
1223
1224
1225 IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1226 {
1227 gpt12->T3CON.B.T3UD = direction;
1228 }
1229
1230
1231 IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1232 {
1233 gpt12->T3CON.B.T3I = inputPrescaler;
1234 }
1235
1236
1237 IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1238 {
1239 gpt12->T3.U = value;
1240 }
1241
1242
1243 IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
1244 {
1245 gpt12->T4CON.B.CLRT2EN = enabled ? 1 : 0;
1246 }
1247
1248
1249 IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
1250 {
1251 gpt12->T4CON.B.CLRT3EN = enabled ? 1 : 0;
1252 }
1253
1254
1255 IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12)
1256 {
1257 return (IfxGpt12_Mode)gpt12->T4CON.B.T4M;
1258 }
1259
1260
1261 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
1262 {
1263 IFX_UNUSED_PARAMETER(gpt12)
1264 return &MODULE_SRC.GPT12.GPT12[0].T4;
1265 }
1266
1267
1268 IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12)
1269 {
1270 return (uint16)gpt12->T4.U;
1271 }
1272
1273
1274 IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1275 {
1276 gpt12->T4CON.B.T4R = runTimer;
1277 }
1278
1279
1280 IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
1281 {
1282 gpt12->T4CON.B.T4I = inputMode;
1283 }
1284
1285
1286 IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1287 {
1288 gpt12->T4CON.B.T4I = inputMode;
1289 }
1290
1291
1292 IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1293 {
1294 gpt12->T4CON.B.T4UDE = source;
1295 }
1296
1297
1298 IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1299 {
1300 gpt12->PISEL.B.IST4EUD = input;
1301 }
1302
1303
1304 IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
1305 {
1306 gpt12->T4CON.B.T4I = inputMode;
1307 }
1308
1309
1310 IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1311 {
1312 gpt12->PISEL.B.IST4IN = input;
1313 }
1314
1315
1316 IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
1317 {
1318 gpt12->T4CON.B.T4IRDIS = enabled ? 0 : 1;
1319 }
1320
1321
1322 IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1323 {
1324 gpt12->T4CON.B.T4M = mode;
1325 }
1326
1327
1328 IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
1329 {
1330 gpt12->T4CON.B.T4I = inputMode;
1331 }
1332
1333
1334 IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1335 {
1336 gpt12->T4CON.B.T4RC = control;
1337 }
1338
1339
1340 IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1341 {
1342 gpt12->T4CON.B.T4UD = direction;
1343 }
1344
1345
1346 IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1347 {
1348 gpt12->T4CON.B.T4I = inputPrescaler;
1349 }
1350
1351
1352 IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1353 {
1354 gpt12->T4.U = value;
1355 }
1356
1357
1358 IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
1359 {
1360 gpt12->T5CON.B.T5CLR = enabled ? 1 : 0;
1361 }
1362
1363
1364 IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12)
1365 {
1366 return (IfxGpt12_Mode)gpt12->T5CON.B.T5M;
1367 }
1368
1369
1370 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
1371 {
1372 IFX_UNUSED_PARAMETER(gpt12)
1373 return &MODULE_SRC.GPT12.GPT12[0].T5;
1374 }
1375
1376
1377 IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12)
1378 {
1379 return (uint16)gpt12->T5.U;
1380 }
1381
1382
1383 IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1384 {
1385 gpt12->T5CON.B.T5R = runTimer;
1386 }
1387
1388
1389 IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
1390 {
1391 gpt12->T5CON.B.CT3 = trigger;
1392 }
1393
1394
1395 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
1396 {
1397 gpt12->T5CON.B.T5SC = enabled;
1398 }
1399
1400
1401 IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
1402 {
1403 gpt12->T5CON.B.CI = mode;
1404 }
1405
1406
1407 IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1408 {
1409 gpt12->T5CON.B.T5I = inputMode;
1410 }
1411
1412
1413 IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1414 {
1415 gpt12->T5CON.B.T5UDE = source;
1416 }
1417
1418
1419 IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1420 {
1421 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1422 gpt12->PISEL.B.IST5EUD = input;
1423 }
1424
1425
1426 IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1427 {
1428 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1429 gpt12->PISEL.B.IST5IN = input;
1430 }
1431
1432
1433 IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1434 {
1435 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode <= IfxGpt12_Mode_highGatedTimer); /* wrong selection */
1436 gpt12->T5CON.B.T5M = mode;
1437 }
1438
1439
1440 IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
1441 {
1442 gpt12->T5CON.B.T5RC = control;
1443 }
1444
1445
1446 IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1447 {
1448 gpt12->T5CON.B.T5UD = direction;
1449 }
1450
1451
1452 IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1453 {
1454 gpt12->T5CON.B.T5I = inputPrescaler;
1455 }
1456
1457
1458 IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1459 {
1460 gpt12->T5.U = value;
1461 }
1462
1463
1464 IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
1465 {
1466 gpt12->T6CON.B.T6CLR = enabled ? 1 : 0;
1467 }
1468
1469
1470 IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12)
1471 {
1472 return (IfxGpt12_Mode)gpt12->T6CON.B.T6M;
1473 }
1474
1475
1476 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12)
1477 {
1478 IFX_UNUSED_PARAMETER(gpt12)
1479 return &MODULE_SRC.GPT12.GPT12[0].T6;
1480 }
1481
1482
1483 IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12)
1484 {
1485 return (uint16)gpt12->T6.U;
1486 }
1487
1488
1489 IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
1490 {
1491 gpt12->T6CON.B.T6R = runTimer;
1492 }
1493
1494
1495 IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
1496 {
1497 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, inputMode <= IfxGpt12_CounterInputMode_bothEdgesTxIN); /* wrong selection */
1498 gpt12->T6CON.B.T6I = inputMode;
1499 }
1500
1501
1502 IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
1503 {
1504 gpt12->T6CON.B.T6UDE = source;
1505 }
1506
1507
1508 IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
1509 {
1510 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1511 gpt12->PISEL.B.IST6EUD = input;
1512 }
1513
1514
1515 IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
1516 {
1517 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
1518 gpt12->PISEL.B.IST6IN = input;
1519 }
1520
1521
1522 IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
1523 {
1524 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode <= IfxGpt12_Mode_highGatedTimer); /* wrong selection */
1525 gpt12->T6CON.B.T6M = mode;
1526 }
1527
1528
1529 IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
1530 {
1531 gpt12->T6CON.B.T6SR = mode;
1532 }
1533
1534
1535 IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
1536 {
1537 gpt12->T6CON.B.T6UD = direction;
1538 }
1539
1540
1541 IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
1542 {
1543 gpt12->T6CON.B.T6I = inputPrescaler;
1544 }
1545
1546
1547 IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
1548 {
1549 gpt12->T6.U = value;
1550 }
1551
1552
1553 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
1554 {
1555 IFX_UNUSED_PARAMETER(gpt12)
1556 return &MODULE_SRC.GPT12.GPT12[0].CIRQ;
1557 }
1558
1559
1560 IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
1561 {
1562 IFX_UNUSED_PARAMETER(gpt12)
1563 return IfxScuCcu_getSpbFrequency();
1564 }
1565
1566
1567 IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
1568 {
1569 IfxPort_setPinModeInput(capIn->pin.port, capIn->pin.pinIndex, inputMode);
1570 IfxGpt12_setCaptureInput(capIn->module, (IfxGpt12_CaptureInput)capIn->select);
1571 }
1572
1573
1574 IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
1575 {
1576 IfxPort_setPinModeInput(capIn->pin.port, capIn->pin.pinIndex, inputMode);
1577 IfxPort_setPinPadDriver(capIn->pin.port, capIn->pin.pinIndex, padDriver);
1578 IfxGpt12_setCaptureInput(capIn->module, (IfxGpt12_CaptureInput)capIn->select);
1579 }
1580
1581
1582 IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
1583 {
1584 IfxPort_setPinModeOutput(txOut->pin.port, txOut->pin.pinIndex, outputMode, txOut->select);
1585 IfxPort_setPinPadDriver(txOut->pin.port, txOut->pin.pinIndex, padDriver);
1586 }
1587
1588
1589 IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12)
1590 {
1591 Ifx_GPT12_OCS ocs;
1592
1593 // read the status
1594 ocs.U = gpt12->OCS.U;
1595
1596 // return the status
1597 return ocs.B.SUSSTA;
1598 }
1599
1600
1601 IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
1602 {
1603 gpt12->PISEL.B.ISCAPIN = input;
1604 }
1605
1606
1607 IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
1608 {
1609 gpt12->CAPREL.B.CAPREL = value;
1610 }
1611
1612
1613 IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
1614 {
1615 gpt12->T3CON.B.BPS1 = bps1;
1616 }
1617
1618
1619 IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
1620 {
1621 gpt12->T6CON.B.BPS2 = bps2;
1622 }
1623
1624
1625 IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
1626 {
1627 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1628 IfxScuWdt_clearCpuEndinit(passwd);
1629 gpt12->CLC.B.EDIS = mode;
1630 IfxScuWdt_setCpuEndinit(passwd);
1631 }
1632
1633
1634 IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
1635 {
1636 Ifx_GPT12_OCS ocs;
1637
1638 // remove protection and configure the suspend mode.
1639 ocs.B.SUS_P = 1;
1640 ocs.B.SUS = mode;
1641 gpt12->OCS.U = ocs.U;
1642 }
1643
1644
1645 #endif /* IFXGPT12_H */
IfxGpt12_T5_setTimerValue
IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T5 timer.
Definition: IfxGpt12.h:1458
IfxGpt12_Mode_highGatedTimer
High Gated Timer Mode selected.
Definition: IfxGpt12.h:174
IfxGpt12_T4_setInput
IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T4 timer.
Definition: IfxGpt12.h:1310
IfxGpt12_T3_enableOutput
IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT.
Definition: IfxGpt12.h:1156
IfxGpt12_initCapInPinWithPadLevel
IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.h:1574
IfxGpt12_TimerRemoteControl_off
T2 RemoteControl Off.
Definition: IfxGpt12.h:260
IfxGpt12_T4_setReloadInputMode
IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T4 timer.
Definition: IfxGpt12.h:1328
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxGpt12_T3_setMode
IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer.
Definition: IfxGpt12.h:1218
IfxGpt12_setSuspendMode
IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxGpt12.h:1634
IfxGpt12_Gpt2BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:138
IfxGpt12_ReloadInputMode_bothEdgesTxOTL
rising or falling edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:192
IfxGpt12_CounterInputMode_counterDisabled
Counter Tx is disabled.
Definition: IfxGpt12.h:102
IfxGpt12_T2_setInput
IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T2 timer.
Definition: IfxGpt12.h:1107
IfxGpt12_TxIn_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:61
IfxGpt12_initTxEudInPin
IFX_EXTERN void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
Initializes a TxEUDIn_IN input.
Definition: IfxGpt12.c:258
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxGpt12_initTxOutPin
IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a SLSO output.
Definition: IfxGpt12.h:1582
IfxGpt12_Gpt1BlockPrescaler_4
fGPT/4
Definition: IfxGpt12.h:128
IfxGpt12_T4_setEudInput
IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T4 timer.
Definition: IfxGpt12.h:1298
IfxGpt12_Input
IfxGpt12_Input
Input Select for TxIN Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
Definition: IfxGpt12.h:158
IfxGpt12_T3_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 3 service request.
Definition: IfxGpt12.h:1168
IfxGpt12_setCaptureReload
IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
Sets the sensitivity of the module to sleep signal.
Definition: IfxGpt12.h:1607
IfxGpt12_CaptureInputMode_none
None, Counter is disabled.
Definition: IfxGpt12.h:71
IfxGpt12_initCapInPin
IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
Initializes a Capin_In input.
Definition: IfxGpt12.h:1567
IfxGpt12_EudInput
IfxGpt12_EudInput
Input Select for TxEUD Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
Definition: IfxGpt12.h:114
IfxGpt12_T2_setTimerDirection
IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction.
Definition: IfxGpt12.h:1138
IfxGpt12_TimerInputPrescaler
IfxGpt12_TimerInputPrescaler
Input prescaler Selection for the timer Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4) ...
Definition: IfxGpt12.h:234
IfxGpt12_T6_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 6 service request.
Definition: IfxGpt12.h:1476
IfxGpt12_T5_enableClearTimer
IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer.
Definition: IfxGpt12.h:1358
IfxGpt12_Mode_lowGatedTimer
Low Gated Timer Mode selected.
Definition: IfxGpt12.h:173
IfxGpt12_T2_setCaptureInputMode
IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T2 timer.
Definition: IfxGpt12.h:1076
IfxGpt12_ReloadInputMode_fallingEdgeTxOTL
falling edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:191
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:47
IfxGpt12_T4_setRemoteControl
IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer.
Definition: IfxGpt12.h:1334
IfxGpt12_T6_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T6 timer.
Definition: IfxGpt12.h:1470
IfxGpt12_ReloadInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:187
IfxGpt12_T6_getTimerValue
IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T6 timer.
Definition: IfxGpt12.h:1483
IfxGpt12_T3_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T3 timer.
Definition: IfxGpt12.h:1162
IfxGpt12_Mode_counter
Counter Mode selected.
Definition: IfxGpt12.h:172
IfxGpt12_T6_getFrequency
IFX_EXTERN float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T6 timer.
Definition: IfxGpt12.c:199
IfxGpt12_resetModule
IFX_EXTERN void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
resets GPT12 kernel
Definition: IfxGpt12.c:368
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxGpt12_T2_getFrequency
IFX_EXTERN float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T2 timer.
Definition: IfxGpt12.c:35
IfxGpt12_TimerRemoteControl_on
T2 RemoteControl On.
Definition: IfxGpt12.h:261
IfxGpt12_SuspendMode_none
No suspend.
Definition: IfxGpt12.h:208
IfxGpt12_CaptureInput_C
signal CAPINC selected
Definition: IfxGpt12.h:63
float32
float float32
Definition: Platform_Types.h:167
IfxGpt12_T3_getTimerValue
IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T3 timer.
Definition: IfxGpt12.h:1175
IfxGpt12_T5_setCaptureTriggerMode
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer.
Definition: IfxGpt12.h:1401
Ifx_Assert.h
Assert functions.
IfxGpt12_initTxInPinWithPadLevel
IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:340
IfxGpt12_TimerDirectionSource_external
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:228
IfxGpt12_SleepMode_enable
enables sleep mode
Definition: IfxGpt12.h:200
IfxGpt12_T4_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request.
Definition: IfxGpt12.h:1261
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxGpt12_T5_setTimerPrescaler
IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.
Definition: IfxGpt12.h:1452
IfxGpt12_CaptureTriggerMode_disabled
capture disabled
Definition: IfxGpt12.h:91
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxGpt12_T2_setReloadInputMode
IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
Sets the input edge selection for the reload mode of the T2 timer.
Definition: IfxGpt12.h:1126
IfxSrc.h
SRC basic functionality.
IfxGpt12_T3_setTimerDirection
IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction.
Definition: IfxGpt12.h:1225
IfxGpt12_T3_setTimerValue
IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T3 Timer.
Definition: IfxGpt12.h:1237
IfxGpt12_T5_setCounterInputMode
IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T5 timer.
Definition: IfxGpt12.h:1407
IfxGpt12_setGpt2BlockPrescaler
IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
Sets the GPT2 block prescaler.
Definition: IfxGpt12.h:1619
IfxGpt12_setCaptureInput
IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
Sets the capture input.
Definition: IfxGpt12.h:1601
IfxGpt12_T4_setTimerValue
IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T4 timer.
Definition: IfxGpt12.h:1352
IfxGpt12_T6_setDirectionSource
IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
sets the T6 timer count direction source internal / external
Definition: IfxGpt12.h:1502
IfxGpt12_T4_setTimerDirection
IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T4 timer count direction.
Definition: IfxGpt12.h:1340
IfxGpt12_CaptureInputMode
IfxGpt12_CaptureInputMode
Tx Input Edge Selection (Capture Mode, x=2,4)
Definition: IfxGpt12.h:69
IfxGpt12_T6_setReloadMode
IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
sets the T6 timer count direction
Definition: IfxGpt12.h:1529
IfxGpt12_CaptureInput
IfxGpt12_CaptureInput
Input Select for CAPIN Definition in IfxGPT12.PISEL.B.ISCAPIN.
Definition: IfxGpt12.h:59
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxGpt12_T2_setTimerPrescaler
IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer.
Definition: IfxGpt12.h:1144
IfxGpt12_T4_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T4 timer.
Definition: IfxGpt12.h:1255
IfxGpt12_TimerInputPrescaler_4
Definition: IfxGpt12.h:238
IfxGpt12_Gpt2BlockPrescaler
IfxGpt12_Gpt2BlockPrescaler
Gpt2 block prescaler Selection Definition in IfxGPT12.T6CON.B.BPS2.
Definition: IfxGpt12.h:136
IfxGpt12_TimerDirection_down
Timer Down Direction selected.
Definition: IfxGpt12.h:219
IfxGpt12_Mode_capture
Capture Mode selected.
Definition: IfxGpt12.h:176
IfxGpt12_PinMap.h
GPT12 I/O map.
IfxGpt12_T4_setDirectionSource
IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T4 timer count direction source internal / external.
Definition: IfxGpt12.h:1292
IfxGpt12_EudInput_B
signal TXEUDB selected
Definition: IfxGpt12.h:117
IfxGpt12_TxOut_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGpt12_PinMap.h:70
IfxGpt12_T2_run
IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer.
Definition: IfxGpt12.h:1070
IfxGpt12_ReloadInputMode
IfxGpt12_ReloadInputMode
Input Edge Selection for reload mode Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4) ...
Definition: IfxGpt12.h:184
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD
(rising or falling edge) on any Tx input (TxIN or TxEUD)
Definition: IfxGpt12.h:152
IfxGpt12_CounterInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:103
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxGpt12_disableModule
IFX_EXTERN void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
Disables the module.
Definition: IfxGpt12.c:240
IfxGpt12_T3_run
IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer.
Definition: IfxGpt12.h:1181
IfxGpt12_Input_B
signal TXINB selected
Definition: IfxGpt12.h:161
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGpt12_getModuleFrequency
IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
Returns the gpt12 module frequency.
Definition: IfxGpt12.h:1560
IfxGpt12_Gpt1BlockPrescaler_32
fGPT/32
Definition: IfxGpt12.h:129
IfxGpt12_Gpt1BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:127
IfxGpt12_T6_setMode
IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T6 timer.
Definition: IfxGpt12.h:1522
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxGpt12_Gpt2BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:140
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:65
IfxGpt12_setSleepMode
IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxGpt12.h:1625
IfxGpt12_T5_setRemoteControl
IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer.
Definition: IfxGpt12.h:1440
IfxGpt12_getCaptureSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
Returns the address of capture service request.
Definition: IfxGpt12.h:1553
IfxGpt12_Gpt2BlockPrescaler_2
fGPT/2
Definition: IfxGpt12.h:139
IfxGpt12_Mode_incrementalInterfaceEdgeDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:178
IfxGpt12_CaptureTriggerMode_fallingEdge
negative Transition on CAPIN or any Transition on T3EUD
Definition: IfxGpt12.h:93
IfxGpt12_EudInput_C
signal TXEUDC selected
Definition: IfxGpt12.h:118
IfxGpt12_SuspendMode
IfxGpt12_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxGpt12.h:206
IfxGpt12_ReloadInputMode_counterDisabled
Counter Tx is disabled.
Definition: IfxGpt12.h:186
IfxGpt12_T5_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T5 timer.
Definition: IfxGpt12.h:1364
IfxGpt12_T2_setTimerValue
IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T2 timer.
Definition: IfxGpt12.h:1150
IfxGpt12_T4_enableClearTimerT3
IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer.
Definition: IfxGpt12.h:1249
IfxGpt12_Gpt2BlockPrescaler_8
fGPT/8
Definition: IfxGpt12.h:141
IfxGpt12_Mode
IfxGpt12_Mode
Timer operating mode Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
Definition: IfxGpt12.h:169
IfxGpt12_TimerReloadMode
IfxGpt12_TimerReloadMode
Timer Reload Mode Definition in IfxGPT12.T6CON.B.T6SR.
Definition: IfxGpt12.h:249
IfxGpt12_CaptureTrigger_t3inOrT3EUD
Capture Trigger Enable from T3IN/T3EUD.
Definition: IfxGpt12.h:83
IfxGpt12_T6_setInput
IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T6 timer.
Definition: IfxGpt12.h:1515
IfxGpt12_TimerInputPrescaler_8
Definition: IfxGpt12.h:239
IfxGpt12_T5_getTimerValue
IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T5 timer.
Definition: IfxGpt12.h:1377
IfxGpt12_T4_setMode
IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer.
Definition: IfxGpt12.h:1322
IfxGpt12_Input_C
signal TXINC selected
Definition: IfxGpt12.h:162
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxGpt12_CaptureInput_A
signal CAPINA selected
Definition: IfxGpt12.h:61
IfxGpt12_T2_setInterruptEnable
IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T2 timer.
Definition: IfxGpt12.h:1114
IfxGpt12_Gpt1BlockPrescaler
IfxGpt12_Gpt1BlockPrescaler
GPT1 block prescaler Selection Definition in IfxGPT12.T3CON.B.BPS1.
Definition: IfxGpt12.h:125
IfxGpt12_T5_setTimerDirection
IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction.
Definition: IfxGpt12.h:1446
IfxGpt12_CaptureInput_D
signal CAPIND selected
Definition: IfxGpt12.h:64
IfxGpt12_ReloadInputMode_bothEdgesTxIN
rising or falling edge on TxIN
Definition: IfxGpt12.h:189
IfxGpt12_TimerReloadMode_disable
Reload mode disabled.
Definition: IfxGpt12.h:251
IfxGpt12_T4_getTimerValue
IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T4 timer.
Definition: IfxGpt12.h:1268
IfxGpt12_TimerInputPrescaler_16
Definition: IfxGpt12.h:240
IfxGpt12_T3_setCounterInputMode
IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T3 timer.
Definition: IfxGpt12.h:1187
IfxGpt12_T6_setCounterInputMode
IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T6 timer.
Definition: IfxGpt12.h:1495
IfxGpt12_CaptureTriggerMode
IfxGpt12_CaptureTriggerMode
Capture Trigger Selection Definition in IfxGPT12.T5CON.B.CI.
Definition: IfxGpt12.h:89
IfxGpt12_CounterInputMode_bothEdgesTxIN
rising or falling edge on TxIN
Definition: IfxGpt12.h:105
IfxGpt12_CaptureInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:73
IfxGpt12_T2_setCounterInputMode
IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T2 timer.
Definition: IfxGpt12.h:1082
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56
IfxGpt12_T2_setEudInput
IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T2 timer.
Definition: IfxGpt12.h:1094
IfxGpt12_T3_setEudInput
IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T3 timer.
Definition: IfxGpt12.h:1200
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxGpt12_T4_setCaptureInputMode
IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer.
Definition: IfxGpt12.h:1280
IfxGpt12_T4_setTimerPrescaler
IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer.
Definition: IfxGpt12.h:1346
IfxGpt12_T4_enableClearTimerT2
IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer.
Definition: IfxGpt12.h:1243
IfxGpt12_TimerRun_start
Timer X Run.
Definition: IfxGpt12.h:270
IfxGpt12_IncrementalInterfaceInputMode
IfxGpt12_IncrementalInterfaceInputMode
Input Edge Selection for Incremental Interface mode Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)
Definition: IfxGpt12.h:147
IfxGpt12_T4_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T4 timer. ...
Definition: IfxGpt12.h:1304
IfxGpt12_T5_setCaptureTriggerEnable
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer.
Definition: IfxGpt12.h:1395
IfxGpt12_TimerInputPrescaler_128
Definition: IfxGpt12.h:243
IfxGpt12_CaptureTrigger
IfxGpt12_CaptureTrigger
Capture Trigger Enable Definition in IfxGPT12.T5CON.B.CT3.
Definition: IfxGpt12.h:80
IfxGpt12_Mode_incrementalInterfaceRotationDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:177
IfxGpt12_CaptureTrigger_capin
Capture Trigger Enable from CAPIN.
Definition: IfxGpt12.h:82
IfxGpt12_Input_A
signal TXINA selected
Definition: IfxGpt12.h:160
IfxGpt12_CaptureInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:72
IfxGpt12_CounterInputMode_risingEdgeTxOTL
rising edge of TxOTL (x=3,6)
Definition: IfxGpt12.h:106
IfxGpt12_T3_setTimerPrescaler
IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer.
Definition: IfxGpt12.h:1231
IfxGpt12_EudInput_D
signal TXEUDD selected
Definition: IfxGpt12.h:119
IfxGpt12_initTxInPin
IFX_EXTERN void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
Initializes a TxIn input.
Definition: IfxGpt12.c:313
IfxGpt12_T5_setDirectionSource
IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external.
Definition: IfxGpt12.h:1413
IfxGpt12_Gpt1BlockPrescaler_16
fGPT/16
Definition: IfxGpt12.h:130
IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx
Counter Tx Stop.
Definition: IfxGpt12.h:149
IfxGpt12_T2_setRemoteControl
IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T2 timer.
Definition: IfxGpt12.h:1132
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGpt12_enableModule
IFX_EXTERN void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
Enables the module.
Definition: IfxGpt12.c:249
IfxGpt12_setGpt1BlockPrescaler
IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
Sets the GPT1 block prescaler.
Definition: IfxGpt12.h:1613
IfxGpt12_T6_enableClearTimer
IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T6 timer.
Definition: IfxGpt12.h:1464
IfxGpt12_T6_setTimerPrescaler
IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer.
Definition: IfxGpt12.h:1541
IfxGpt12_T6_setTimerDirection
IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
sets the T6 timer count direction
Definition: IfxGpt12.h:1535
IfxGpt12_TimerReloadMode_enable
Reload mode enabled.
Definition: IfxGpt12.h:252
IfxGpt12_TimerRun_stop
Timer x Stops.
Definition: IfxGpt12.h:269
IfxGpt12_ReloadInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:188
IfxGpt12_T4_getFrequency
IFX_EXTERN float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T4 timer.
Definition: IfxGpt12.c:117
IfxGpt12_T6_setTimerValue
IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
Sets value for the T6 timer.
Definition: IfxGpt12.h:1547
IfxGpt12_T6_setEudInput
IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T6 timer.
Definition: IfxGpt12.h:1508
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxGpt12_CaptureInput_B
signal CAPINB selected
Definition: IfxGpt12.h:62
IfxGpt12_isModuleSuspended
IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxGpt12.h:1589
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxGpt12_CaptureTriggerMode_randomEdge
Any Transition on CAPIN or any Transition on T3IN/T3EUD.
Definition: IfxGpt12.h:94
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:460
IfxGpt12_Mode_reload
Reload Mode selected.
Definition: IfxGpt12.h:175
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxGpt12_T4_setCounterInputMode
IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
Sets the input edge selection for the counter mode of the T4 timer.
Definition: IfxGpt12.h:1286
IfxGpt12_T5_setCaptureTrigger
IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer.
Definition: IfxGpt12.h:1389
IfxGpt12_T5_run
IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer.
Definition: IfxGpt12.h:1383
IfxGpt12_SleepMode_disable
disables sleep mode
Definition: IfxGpt12.h:201
IfxGpt12_TxIn_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:58
IfxGpt12_T3_setInput
IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T3 timer.
Definition: IfxGpt12.h:1212
IfxGpt12_T2_setMode
IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer.
Definition: IfxGpt12.h:1120
IfxGpt12_T2_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. ...
Definition: IfxGpt12.h:1101
IfxGpt12_T4_setInterruptEnable
IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer.
Definition: IfxGpt12.h:1316
IfxGpt12_T2_getTimerValue
IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12)
Returns the timer value of the T2 timer.
Definition: IfxGpt12.h:1064
IfxGpt12_TimerDirection
IfxGpt12_TimerDirection
Timer Count Direction Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)
Definition: IfxGpt12.h:216
IfxGpt12_SleepMode
IfxGpt12_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_GPT12.CLC.B.EDIS.
Definition: IfxGpt12.h:198
IfxGpt12_CounterInputMode_fallingEdgeTxOTL
falling edge of TxOTL
Definition: IfxGpt12.h:107
IfxGpt12_ReloadInputMode_risingEdgeTxOTL
rising edge of Tx toggle latch TxOTL
Definition: IfxGpt12.h:190
IfxGpt12_T5_setEudInput
IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
Sets the EUD input for the T5 timer.
Definition: IfxGpt12.h:1419
IfxGpt12_CounterInputMode_fallingEdgeTxIN
falling edge on TxIN
Definition: IfxGpt12.h:104
IfxGpt12_TimerInputPrescaler_32
Definition: IfxGpt12.h:241
IfxGpt12_TimerInputPrescaler_1
Definition: IfxGpt12.h:236
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:171
IfxGpt12_initTxEudInPinWithPadLevel
IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:285
IfxGpt12_EudInput_A
signal TXEUDA selected
Definition: IfxGpt12.h:116
IfxGpt12_T2_getMode
IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
Returns the operating mode of the T2 timer.
Definition: IfxGpt12.h:1051
IfxGpt12_TimerDirectionSource
IfxGpt12_TimerDirectionSource
Timer count direction control source Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6) ...
Definition: IfxGpt12.h:225
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxGpt12_T5_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request.
Definition: IfxGpt12.h:1370
IfxGpt12_CounterInputMode
IfxGpt12_CounterInputMode
Input Edge Selection for counter mode Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6) ...
Definition: IfxGpt12.h:100
IfxGpt12_CaptureTriggerMode_risingEdge
positive Transition on CAPIN or any Transition on T3IN
Definition: IfxGpt12.h:92
IfxGpt12_T5_setMode
IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer.
Definition: IfxGpt12.h:1433
IfxGpt12_T3_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. ...
Definition: IfxGpt12.h:1206
IfxGpt12_cfg.h
GPT12 on-chip implementation data.
IfxGpt12_SuspendMode_hard
Hard Suspend.
Definition: IfxGpt12.h:209
IfxGpt12_T2_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 2 service request.
Definition: IfxGpt12.h:1057
IfxGpt12_T4_run
IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer.
Definition: IfxGpt12.h:1274
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:150
IfxGpt12_TxIn_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:60
IfxGpt12_SuspendMode_soft
Soft Suspend.
Definition: IfxGpt12.h:210
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxGpt12_T3_setDirectionSource
IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external.
Definition: IfxGpt12.h:1194
IfxGpt12_T5_setInput
IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
Sets the input for the T5 timer.
Definition: IfxGpt12.h:1426
IfxGpt12_CaptureInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:74
IfxGpt12_TimerDirection_up
Timer Up Direction selected.
Definition: IfxGpt12.h:218
IfxGpt12_TimerRun
IfxGpt12_TimerRun
Timer Run / stop control choice (only if TxCON.B.TxRC = 0) Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)
Definition: IfxGpt12.h:267
IfxGpt12_T3_getFrequency
IFX_EXTERN float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T3 timer.
Definition: IfxGpt12.c:76
IfxGpt12_Input_D
signal TXIND selected
Definition: IfxGpt12.h:163
IfxGpt12_TimerRemoteControl
IfxGpt12_TimerRemoteControl
Timer Remote Control enable choice Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4) ...
Definition: IfxGpt12.h:258
IfxGpt12_TimerDirectionSource_internal
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:227
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD
(rising or falling edge) on TxEUD
Definition: IfxGpt12.h:151
IfxGpt12_T5_getFrequency
IFX_EXTERN float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:158
IfxGpt12_TimerInputPrescaler_2
Definition: IfxGpt12.h:237
IfxGpt12_T2_setDirectionSource
IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external.
Definition: IfxGpt12.h:1088
IfxGpt12_TimerInputPrescaler_64
Definition: IfxGpt12.h:242
IfxGpt12_T6_run
IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T6 Timer.
Definition: IfxGpt12.h:1489
IfxGpt12_CounterInputMode_bothEdgesTxOTL
rising or falling edge of TxOTL
Definition: IfxGpt12.h:108


iLLD_TC26B: IfxGpt12_IncrEnc.c Source File

  • Gpt12
  • IncrEnc
IfxGpt12_IncrEnc.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_IncrEnc.c
3 * \brief GPT12 INCRENC details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGpt12_IncrEnc.h"
30
31 /******************************************************************************/
32 /*-----------------------Private Function Prototypes--------------------------*/
33 /******************************************************************************/
34
35 /** \brief Update internal data when incremental mode is using T2.\n
36 * This function shall be periodically called
37 * \param driver driver handle
38 * \return None
39 */
40 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver);
41
42 /** \brief Update internal data when incremental mode is using T3.\n
43 * This function shall be periodically called
44 * \param driver driver handle
45 * \return None
46 */
47 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver);
48
49 /** \brief Updates the speed
50 * \param driver driver handle
51 * \param newPosition new position
52 * \return None
53 */
54 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition);
55
56 /** \brief Updates the speed
57 * \param driver driver handle
58 * \param newPosition new position
59 * \return None
60 */
61 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition);
62
63 /******************************************************************************/
64 /*-------------------------Function Implementations---------------------------*/
65 /******************************************************************************/
66
67 float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
68 {
69 return ((float32)driver->turn + (float32)driver->rawPosition / (float32)driver->resolution) * 2.0 * IFX_PI;
70 }
71
72
73 IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
74 {
75 return driver->direction;
76 }
77
78
79 IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
80 {
81 return driver->status;
82 }
83
84
85 sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
86 {
87 return driver->offset;
88 }
89
90
91 uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
92 {
93 IFX_UNUSED_PARAMETER(driver)
94 return 1; /* Period per rotation is 1*/
95 }
96
97
98 float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
99 {
100 return (float32)driver->rawPosition * driver->positionConst;
101 }
102
103
104 sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
105 {
106 return driver->rawPosition;
107 }
108
109
110 float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
111 {
112 return driver->updatePeriod;
113 }
114
115
116 sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
117 {
118 return driver->resolution;
119 }
120
121
122 IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
123 {
124 IFX_UNUSED_PARAMETER(driver)
125 return IfxStdIf_Pos_SensorType_encoder;
126 }
127
128
129 float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
130 {
131 return driver->speed;
132 }
133
134
135 sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
136 {
137 return driver->turn;
138 }
139
140
141 boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
142 {
143 boolean status = TRUE;
144 Ifx_GPT12 *gpt12 = config->module;
145
146 driver->module = gpt12;
147
148 driver->offset = config->base.offset;
149 driver->resolution = config->base.resolution * config->base.resolutionFactor;
150 driver->positionConst = 1.0 / (float32)driver->resolution * 2.0 * IFX_PI;
151 driver->speedModeThreshold = config->base.speedModeThreshold;
152 IfxGpt12_IncrEnc_setRefreshPeriod(driver, config->base.updatePeriod);
153
154 driver->status.status = 0;
155 driver->status.B.notSynchronised = 1;
156 driver->minSpeed = config->base.minSpeed;
157 driver->maxSpeed = config->base.maxSpeed;
158
159 driver->rawPosition = 0;
160 driver->speed = 0;
161 driver->direction = IfxStdIf_Pos_Dir_unknown;
162 driver->turn = 0;
163
164 if (config->pinA->timer == 3)
165 {
166 /* T3 Configuration */
167 IfxGpt12_T3_setMode(gpt12, IfxGpt12_Mode_incrementalInterfaceEdgeDetection);
168
169 switch (config->base.resolutionFactor)
170 {
171 case IfxStdIf_Pos_ResolutionFactor_twoFold:
172 IfxGpt12_T3_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN);
173 break;
174 case IfxStdIf_Pos_ResolutionFactor_fourFold:
175 IfxGpt12_T3_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD);
176 break;
177 default:
178 status = FALSE;
179 break;
180 }
181
182 IfxGpt12_T3_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_external);
183 IfxGpt12_T3_setTimerDirection(gpt12, config->base.reversed ? IfxGpt12_TimerDirection_up : IfxGpt12_TimerDirection_down);
184 IfxGpt12_T3_enableOutput(gpt12, FALSE);
185 IfxGpt12_T3_run(gpt12, IfxGpt12_TimerRun_start);
186
187 if (config->pinZ != NULL_PTR)
188 { /* Only configure T4 if zero signal is available. Zero has to be on T4IN */
189 /* T4 Configuration */
190 IfxGpt12_T4_setMode(gpt12, IfxGpt12_Mode_capture);
191 IfxGpt12_T4_setCaptureInputMode(gpt12, IfxGpt12_CaptureInputMode_risingEdgeTxIN);
192 IfxGpt12_T4_enableClearTimerT2(gpt12, FALSE);
193 IfxGpt12_T4_enableClearTimerT3(gpt12, TRUE);
194 IfxGpt12_T4_setInterruptEnable(gpt12, config->zeroIsrPriority != 0);
195 IfxGpt12_T4_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
196 IfxGpt12_T4_run(gpt12, IfxGpt12_TimerRun_stop);
197
198 if (config->zeroIsrPriority)
199 {
200 /* setup interrupt */
201 volatile Ifx_SRC_SRCR *src = IfxGpt12_T4_getSrc(gpt12);
202 IfxSrc_init(src, config->zeroIsrProvider, config->zeroIsrPriority);
203 IfxSrc_enable(src);
204 }
205 }
206
207 /* T5 Configuration */
208 IfxGpt12_T5_setMode(gpt12, IfxGpt12_Mode_timer);
209 IfxGpt12_T5_setTimerPrescaler(gpt12, IfxGpt12_TimerInputPrescaler_4);
210 IfxGpt12_T5_setCaptureTrigger(gpt12, IfxGpt12_CaptureTrigger_t3inOrT3EUD);
211 IfxGpt12_T5_setCaptureTriggerMode(gpt12, IfxGpt12_CaptureTriggerMode_risingEdge);
212 IfxGpt12_T5_enableClearTimer(gpt12, TRUE);
213 IfxGpt12_T5_setCaptureTriggerEnable(gpt12, TRUE);
214 IfxGpt12_T5_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
215 IfxGpt12_T5_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_internal);
216 IfxGpt12_T5_setTimerDirection(gpt12, IfxGpt12_TimerDirection_up);
217 IfxGpt12_T5_run(gpt12, IfxGpt12_TimerRun_start);
218
219 driver->update = (IfxGpt12_IncrEnc_Update) & IfxGpt12_IncrEnc_updateFromT3;
220 }
221 else if (config->pinA->timer == 2)
222 {
223 /* T2 Configuration */
224 IfxGpt12_T2_setMode(gpt12, IfxGpt12_Mode_incrementalInterfaceEdgeDetection);
225
226 switch (config->base.resolutionFactor)
227 {
228 case IfxStdIf_Pos_ResolutionFactor_twoFold:
229 IfxGpt12_T2_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN);
230 break;
231 case IfxStdIf_Pos_ResolutionFactor_fourFold:
232 IfxGpt12_T2_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD);
233 break;
234 default:
235 status = FALSE;
236 break;
237 }
238
239 IfxGpt12_T2_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_external);
240 IfxGpt12_T2_setTimerDirection(gpt12, config->base.reversed ? IfxGpt12_TimerDirection_up : IfxGpt12_TimerDirection_down);
241 IfxGpt12_T2_run(gpt12, IfxGpt12_TimerRun_start);
242
243 if (config->pinZ != NULL_PTR)
244 { /* Only configure T4 if zero signal is available. Zero has to be on T4EUD */
245 /* T4 Configuration */
246 IfxGpt12_T4_setMode(gpt12, IfxGpt12_Mode_capture);
247 IfxGpt12_T4_setCaptureInputMode(gpt12, IfxGpt12_CaptureInputMode_none);
248 IfxGpt12_T4_enableClearTimerT2(gpt12, TRUE);
249 IfxGpt12_T4_enableClearTimerT3(gpt12, FALSE);
250 IfxGpt12_T4_setInterruptEnable(gpt12, FALSE);
251 IfxGpt12_T4_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
252 IfxGpt12_T4_run(gpt12, IfxGpt12_TimerRun_stop);
253 }
254
255 driver->update = (IfxGpt12_IncrEnc_Update) & IfxGpt12_IncrEnc_updateFromT2;
256 }
257
258 if (config->initPins == TRUE)
259 {
260 IfxGpt12_initTxInPinWithPadLevel(config->pinA, config->pinMode, config->pinDriver);
261 IfxGpt12_initTxEudInPinWithPadLevel(config->pinB, config->pinMode, config->pinDriver);
262
263 if (config->pinZ != NULL_PTR)
264 {
265 IfxGpt12_initTxInPinWithPadLevel(config->pinZ, config->pinMode, config->pinDriver);
266 }
267 }
268
269 driver->speedConstTimeDiff =
270 (2.0 * IFX_PI) / (config->base.resolution * 2) * IfxGpt12_T5_getFrequency(gpt12);
271
272 driver->speedFilterEnabled = config->base.speedFilterEnabled;
273
274 if (config->base.speedFilterEnabled)
275 {
276 Ifx_LowPassPt1F32_Config lpfConfig;
277 lpfConfig.gain = 1.0;
278 lpfConfig.cutOffFrequency = config->base.speedFilerCutOffFrequency;
279 lpfConfig.samplingTime = config->base.updatePeriod;
280 Ifx_LowPassPt1F32_init(&driver->speedLpf, &lpfConfig);
281 }
282
283 return status;
284 }
285
286
287 void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
288 {
289 IfxStdIf_Pos_initConfig(&config->base);
290 config->base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_twoFold;
291 config->base.minSpeed = 1.0 / 60.0 * (2 * IFX_PI); // 1 rpm
292 config->base.maxSpeed = 20000.0 / 60.0 * (2 * IFX_PI); // 20000 rpm
293 config->base.speedFilterEnabled = TRUE;
294 config->base.speedFilerCutOffFrequency = config->base.maxSpeed / 2 * IFX_PI * 10;
295
296 config->pinA = NULL_PTR;
297 config->pinB = NULL_PTR;
298 config->pinZ = NULL_PTR;
299 config->pinMode = IfxPort_InputMode_noPullDevice;
300 config->module = gpt12;
301 config->zeroIsrPriority = 0;
302 config->zeroIsrProvider = IfxSrc_Tos_cpu0;
303 config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
304
305 config->initPins = TRUE;
306 }
307
308
309 void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
310 {
311 if (driver->status.B.notSynchronised)
312 {
313 driver->status.B.notSynchronised = 0;
314 }
315
316 if (driver->direction == IfxStdIf_Pos_Dir_forward)
317 {
318 driver->turn++;
319 }
320 else
321 {
322 driver->turn--;
323 }
324 }
325
326
327 void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
328 {
329 driver->rawPosition = 0;
330 driver->turn = 0;
331 driver->speed = 0;
332 driver->status.status = 0;
333 driver->status.B.notSynchronised = 1;
334 }
335
336
337 void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
338 {
339 IfxStdIf_Pos_Status status;
340 status.status = 0;
341 status.B.notSynchronised = driver->status.B.notSynchronised;
342 driver->status.status = status.status;
343 }
344
345
346 void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
347 {
348 driver->offset = offset;
349 driver->status.B.notSynchronised = 0;
350 }
351
352
353 void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
354 {
355 driver->updatePeriod = updatePeriod;
356 driver->speedConstPulseCount = (2.0 * IFX_PI) / driver->resolution / updatePeriod;
357 driver->speedModeThresholdTick = driver->speedModeThreshold * driver->resolution * updatePeriod / (2.0 * IFX_PI);
358 }
359
360
361 boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
362 {
363 /* Ensure the stdif is reset to zeros */
364 memset(stdif, 0, sizeof(IfxStdIf_Pos));
365
366 /* Set the driver */
367 stdif->driver = driver;
368
369 /* *INDENT-OFF* Note: this file was indented manually by the author. */
370 /* Set the API link */
371 stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )&IfxGpt12_IncrEnc_onZeroIrq;
372 stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&IfxGpt12_IncrEnc_getAbsolutePosition;
373 stdif->getDirection =(IfxStdIf_Pos_GetDirection )&IfxGpt12_IncrEnc_getDirection;
374 stdif->getFault =(IfxStdIf_Pos_GetFault )&IfxGpt12_IncrEnc_getFault;
375 stdif->getOffset =(IfxStdIf_Pos_GetOffset )&IfxGpt12_IncrEnc_getOffset;
376 stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&IfxGpt12_IncrEnc_getPeriodPerRotation;
377 stdif->getPosition =(IfxStdIf_Pos_GetPosition )&IfxGpt12_IncrEnc_getPosition;
378 stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&IfxGpt12_IncrEnc_getRawPosition;
379 stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&IfxGpt12_IncrEnc_getRefreshPeriod;
380 stdif->getResolution =(IfxStdIf_Pos_GetResolution )&IfxGpt12_IncrEnc_getResolution;
381 stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&IfxGpt12_IncrEnc_getSensorType;
382 stdif->reset =(IfxStdIf_Pos_Reset )&IfxGpt12_IncrEnc_reset;
383 stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&IfxGpt12_IncrEnc_resetFaults;
384 stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&IfxGpt12_IncrEnc_getSpeed;
385 stdif->update =(IfxStdIf_Pos_Update )&IfxGpt12_IncrEnc_update;
386 stdif->setOffset =(IfxStdIf_Pos_SetOffset )&IfxGpt12_IncrEnc_setOffset;
387 stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&IfxGpt12_IncrEnc_setRefreshPeriod;
388 stdif->getTurn =(IfxStdIf_Pos_GetTurn )&IfxGpt12_IncrEnc_getTurn;
389 /* *INDENT-ON* */
390
391 return TRUE;
392 }
393
394
395 void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
396 {
397 driver->update(driver);
398 }
399
400
401 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver)
402 {
403 Ifx_GPT12 *gpt12 = driver->module;
404 sint32 newPosition;
405 driver->direction = gpt12->T2CON.B.T2RDIR ? IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos_Dir_forward;
406
407 newPosition = gpt12->T2.U;
408
409 newPosition = (newPosition + driver->offset);
410
411 if (newPosition >= driver->resolution)
412 {
413 newPosition %= driver->resolution;
414 }
415 else if (newPosition < 0)
416 {
417 newPosition = (newPosition + driver->resolution);
418 }
419
420 IfxGpt12_IncrEnc_updateSpeedFromT2(driver, newPosition);
421 driver->rawPosition = newPosition;
422 }
423
424
425 IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver)
426 {
427 Ifx_GPT12 *gpt12 = driver->module;
428 sint32 newPosition;
429 driver->direction = gpt12->T3CON.B.T3RDIR ? IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos_Dir_forward;
430
431 newPosition = gpt12->T3.U;
432
433 newPosition = (newPosition + driver->offset);
434
435 if (newPosition >= driver->resolution)
436 {
437 newPosition %= driver->resolution;
438 }
439 else if (newPosition < 0)
440 {
441 newPosition = (newPosition + driver->resolution);
442 }
443
444 IfxGpt12_IncrEnc_updateSpeedFromT3(driver, newPosition);
445 driver->rawPosition = newPosition;
446 }
447
448
449 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition)
450 {
451 float32 speed;
452 sint32 diff;
453
454 if (driver->direction == IfxStdIf_Pos_Dir_forward)
455 {
456 diff = newPosition - driver->rawPosition;
457 }
458 else
459 {
460 diff = driver->rawPosition - newPosition;
461 }
462
463 if (diff < 0)
464 {
465 diff += driver->resolution;
466 }
467
468 speed = diff * driver->speedConstPulseCount;
469
470 speed = driver->direction == IfxStdIf_Pos_Dir_forward ? speed : -speed;
471
472 if (driver->speedFilterEnabled)
473 {
474 driver->speed = Ifx_LowPassPt1F32_do(&driver->speedLpf, speed);
475 }
476 else
477 {
478 driver->speed = speed;
479 }
480 }
481
482
483 IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition)
484 {
485 float32 speed;
486 sint32 diff;
487
488 if (driver->direction == IfxStdIf_Pos_Dir_forward)
489 {
490 diff = newPosition - driver->rawPosition;
491 }
492 else
493 {
494 diff = driver->rawPosition - newPosition;
495 }
496
497 if (diff < 0)
498 {
499 diff += driver->resolution;
500 }
501
502 if (diff > driver->speedModeThresholdTick)
503 { /* Use pulse count mode ( Fast speed ) */
504 speed = diff * driver->speedConstPulseCount;
505 }
506 else
507 { /* Use time diff mode (slow speed), only if T3 is used as core */
508 Ifx_GPT12 *gpt12 = driver->module;
509 volatile Ifx_SRC_SRCR *srcT5 = IfxGpt12_T5_getSrc(gpt12);
510
511 if (srcT5->B.SRR != 1)
512 { // NO overflow of T5
513 volatile Ifx_SRC_SRCR *srcCap = IfxGpt12_getCaptureSrc(gpt12);
514
515 // Check if a new value is captured
516 if (srcCap->B.SRR != 0)
517 {
518 // Delete Capture Request Bit
519 srcCap->B.CLRR = 1;
520 speed = driver->speedConstTimeDiff / gpt12->CAPREL.B.CAPREL;
521 }
522 else
523 {
524 speed = driver->speed;
525 }
526 }
527 else
528 { // T5 overflow detected
529 // Delete Overflow Request bit
530 srcT5->B.CLRR = 1;
531 speed = 0.0;
532 }
533 }
534
535 speed = driver->direction == IfxStdIf_Pos_Dir_forward ? speed : -speed;
536
537 if (driver->speedFilterEnabled)
538 {
539 driver->speed = Ifx_LowPassPt1F32_do(&driver->speedLpf, speed);
540 }
541 else
542 {
543 driver->speed = speed;
544 }
545 }
IfxGpt12_IncrEnc_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins. User handles separately.
Definition: IfxGpt12_IncrEnc.h:229
IfxGpt12_IncrEnc::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: IfxGpt12_IncrEnc.h:205
IfxGpt12_T3_enableOutput
IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
Enable / Disable the T3 Output on pin T3OUT.
Definition: IfxGpt12.h:1156
IfxGpt12_IncrEnc_getPosition
float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:98
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:302
IfxGpt12_TimerRemoteControl_off
T2 RemoteControl Off.
Definition: IfxGpt12.h:260
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:298
IfxGpt12_IncrEnc_Config::zeroIsrPriority
Ifx_Priority zeroIsrPriority
Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
Definition: IfxGpt12_IncrEnc.h:226
IfxGpt12_T3_setMode
IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T3 timer.
Definition: IfxGpt12.h:1218
IfxGpt12_IncrEnc.h
GPT12 INCRENC details.
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:170
IfxGpt12_IncrEnc_Config::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxGpt12_IncrEnc.h:228
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:290
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:122
Ifx_LowPassPt1F32_do
float32 Ifx_LowPassPt1F32_do(Ifx_LowPassPt1F32 *filter, float32 input)
Execute the low pass filter.
Definition: Ifx_LowPassPt1F32.c:56
IfxGpt12_CaptureInputMode_none
None, Counter is disabled.
Definition: IfxGpt12.h:71
IfxGpt12_IncrEnc::speedModeThreshold
float32 speedModeThreshold
treshold used for speed calculation using pulse count mode or time diff mode in rad/s ...
Definition: IfxGpt12_IncrEnc.h:206
IfxGpt12_IncrEnc_Config::pinB
IfxGpt12_TxEud_In * pinB
Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data. ...
Definition: IfxGpt12_IncrEnc.h:223
IfxGpt12_IncrEnc_Config::zeroIsrProvider
IfxSrc_Tos zeroIsrProvider
Interrupt service provider for the zero interrupt.
Definition: IfxGpt12_IncrEnc.h:227
IfxGpt12_IncrEnc_Config
Configuration structure for GPT12.
Definition: IfxGpt12_IncrEnc.h:218
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:286
IfxStdIf_Pos_initConfig
void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:28
IfxGpt12_IncrEnc_setOffset
void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
Definition: IfxGpt12_IncrEnc.c:346
IfxGpt12_T2_setTimerDirection
IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T2 timer count direction.
Definition: IfxGpt12.h:1138
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:188
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:268
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:79
IfxGpt12_T5_enableClearTimer
IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer bit of the T5 timer.
Definition: IfxGpt12.h:1358
IfxGpt12_T4_setRemoteControl
IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T4 timer.
Definition: IfxGpt12.h:1334
IfxGpt12_IncrEnc_getRawPosition
sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:104
IfxGpt12_IncrEnc_updateFromT3
IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T3. This function shall be periodically called...
Definition: IfxGpt12_IncrEnc.c:425
IfxGpt12_IncrEnc::rawPosition
sint32 rawPosition
raw position in ticks.
Definition: IfxGpt12_IncrEnc.h:195
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:303
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxGpt12_T5_setCaptureTriggerMode
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
Sets the capture trigger mode of the T5 timer.
Definition: IfxGpt12.h:1401
IfxGpt12_TimerDirectionSource_external
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:228
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:275
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:300
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:276
IfxGpt12_IncrEnc_Config::base
IfxStdIf_Pos_Config base
Configuration data of Standard interface: Position interface.
Definition: IfxGpt12_IncrEnc.h:220
IfxGpt12_T4_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 4 service request.
Definition: IfxGpt12.h:1261
IfxGpt12_T5_setTimerPrescaler
IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer.
Definition: IfxGpt12.h:1452
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:85
IfxGpt12_IncrEnc_setRefreshPeriod
void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
Definition: IfxGpt12_IncrEnc.c:353
IfxGpt12_IncrEnc::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: IfxGpt12_IncrEnc.h:199
IfxGpt12_T3_setTimerDirection
IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T3 timer count direction.
Definition: IfxGpt12.h:1225
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:279
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:273
IfxGpt12_IncrEnc_updateFromT2
IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver)
Update internal data when incremental mode is using T2. This function shall be periodically called...
Definition: IfxGpt12_IncrEnc.c:401
IfxGpt12_IncrEnc
Incremental encoder object.
Definition: IfxGpt12_IncrEnc.h:193
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:115
IfxGpt12_IncrEnc_resetFaults
void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:337
IfxStdIf_Pos_ResolutionFactor_twoFold
2-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:59
IfxGpt12_IncrEnc::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxGpt12_IncrEnc.h:210
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:304
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:277
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
IfxGpt12_TimerInputPrescaler_4
Definition: IfxGpt12.h:238
IfxGpt12_TimerDirection_down
Timer Down Direction selected.
Definition: IfxGpt12.h:219
IfxGpt12_Mode_capture
Capture Mode selected.
Definition: IfxGpt12.h:176
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:272
IfxGpt12_IncrEnc_update
void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:395
IfxGpt12_T2_run
IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T2 Timer.
Definition: IfxGpt12.h:1070
IfxGpt12_IncrEnc::turn
sint32 turn
number of mechanical turns
Definition: IfxGpt12_IncrEnc.h:197
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD
(rising or falling edge) on any Tx input (TxIN or TxEUD)
Definition: IfxGpt12.h:152
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:200
IfxGpt12_IncrEnc_getTurn
sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:135
IfxGpt12_IncrEnc_Update
IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update
Definition: IfxGpt12_IncrEnc.h:183
IfxGpt12_IncrEnc::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: IfxGpt12_IncrEnc.h:198
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:274
IfxGpt12_IncrEnc_init
boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface.
Definition: IfxGpt12_IncrEnc.c:141
IfxGpt12_T3_run
IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T3 Timer.
Definition: IfxGpt12.h:1181
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:297
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:182
IfxGpt12_IncrEnc_stdIfPosInit
boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos".
Definition: IfxGpt12_IncrEnc.c:361
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:164
Ifx_LowPassPt1F32_init
void Ifx_LowPassPt1F32_init(Ifx_LowPassPt1F32 *filter, const Ifx_LowPassPt1F32_Config *config)
Set the low pass filter configuration.
Definition: Ifx_LowPassPt1F32.c:38
IfxGpt12_TxIn_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:59
IfxGpt12_IncrEnc::speedConstTimeDiff
float32 speedConstTimeDiff
constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode ...
Definition: IfxGpt12_IncrEnc.h:204
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:141
IfxGpt12_T5_setRemoteControl
IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
Sets the remote control of the T5 timer.
Definition: IfxGpt12.h:1440
IfxGpt12_getCaptureSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
Returns the address of capture service request.
Definition: IfxGpt12.h:1553
IfxGpt12_Mode_incrementalInterfaceEdgeDetection
Incremental Interface Mode selected.
Definition: IfxGpt12.h:178
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_SensorType_encoder
Definition: IfxStdIf_Pos.h:66
IfxGpt12_IncrEnc::speedModeThresholdTick
sint32 speedModeThresholdTick
treshold used for speed calculation using pulse count mode or time diff mode in ticks ...
Definition: IfxGpt12_IncrEnc.h:207
IfxGpt12_IncrEnc_getResolution
sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:116
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:262
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:75
IfxGpt12_T4_enableClearTimerT3
IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T3 bit of the T4 timer.
Definition: IfxGpt12.h:1249
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:155
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:78
IfxGpt12_CaptureTrigger_t3inOrT3EUD
Capture Trigger Enable from T3IN/T3EUD.
Definition: IfxGpt12.h:83
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:66
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:278
IfxGpt12_IncrEnc_getSensorType
IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:122
IfxGpt12_T4_setMode
IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T4 timer.
Definition: IfxGpt12.h:1322
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:266
IfxGpt12_IncrEnc::update
IfxGpt12_IncrEnc_Update update
Update call back API.
Definition: IfxGpt12_IncrEnc.h:212
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:77
IfxGpt12_IncrEnc::speed
float32 speed
mechanical speed in rad/s
Definition: IfxGpt12_IncrEnc.h:196
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:64
IfxGpt12_IncrEnc::updatePeriod
float32 updatePeriod
update period in seconds
Definition: IfxGpt12_IncrEnc.h:202
IfxGpt12_IncrEnc_getSpeed
float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:129
IfxGpt12_T5_setTimerDirection
IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
Sets the T5 timer count direction.
Definition: IfxGpt12.h:1446
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxGpt12_IncrEnc_getOffset
sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:85
IfxGpt12_IncrEnc::resolution
sint32 resolution
resolution of this position sensor interface
Definition: IfxGpt12_IncrEnc.h:201
IfxGpt12_IncrEnc::speedLpf
Ifx_LowPassPt1F32 speedLpf
Low pass filter object.
Definition: IfxGpt12_IncrEnc.h:211
IfxGpt12_IncrEnc_updateSpeedFromT3
IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed.
Definition: IfxGpt12_IncrEnc.c:483
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:148
Ifx_LowPassPt1F32_Config::samplingTime
float32 samplingTime
Sampling time.
Definition: Ifx_LowPassPt1F32.h:56
IfxGpt12_IncrEnc_Config::pinA
IfxGpt12_TxIn_In * pinA
Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
Definition: IfxGpt12_IncrEnc.h:222
IfxGpt12_IncrEnc_getDirection
IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:73
IfxGpt12_T4_setCaptureInputMode
IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
Sets the input edge selection for the capture mode of the T4 timer.
Definition: IfxGpt12.h:1280
IfxGpt12_T4_enableClearTimerT2
IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the clear timer T2 bit of the T4 timer.
Definition: IfxGpt12.h:1243
IfxGpt12_TimerRun_start
Timer X Run.
Definition: IfxGpt12.h:270
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:284
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:235
IfxGpt12_T5_setCaptureTriggerEnable
IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the capture trigger of the T5 timer.
Definition: IfxGpt12.h:1395
IfxGpt12_IncrEnc_updateSpeedFromT2
IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition)
Updates the speed.
Definition: IfxGpt12_IncrEnc.c:449
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:219
IfxGpt12_CaptureInputMode_risingEdgeTxIN
rising edge on TxIN
Definition: IfxGpt12.h:72
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:296
IfxGpt12_T5_setDirectionSource
IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T5 timer count direction source internal / external.
Definition: IfxGpt12.h:1413
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:271
IfxGpt12_initTxInPinWithPadLevel
void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXIN pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:340
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGpt12_IncrEnc_getPeriodPerRotation
uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:91
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:270
IfxGpt12_IncrEnc_onZeroIrq
void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:309
IfxGpt12_IncrEnc::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxGpt12_IncrEnc.h:213
IfxGpt12_IncrEnc_Config::module
Ifx_GPT12 * module
Pointer to module base address.
Definition: IfxGpt12_IncrEnc.h:221
IfxGpt12_TimerRun_stop
Timer x Stops.
Definition: IfxGpt12.h:269
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:194
sint32
long sint32
Definition: Platform_Types.h:131
IfxGpt12_initTxEudInPinWithPadLevel
void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver...
Definition: IfxGpt12.c:285
Ifx_LowPassPt1F32_Config::cutOffFrequency
float32 cutOffFrequency
Cut off frequency.
Definition: Ifx_LowPassPt1F32.h:54
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:109
IfxGpt12_T5_setCaptureTrigger
IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
Sets the capture trigger of teh T5 timer.
Definition: IfxGpt12.h:1389
IfxGpt12_T5_run
IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T5 Timer.
Definition: IfxGpt12.h:1383
IfxGpt12_IncrEnc_getFault
IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:79
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:283
IfxGpt12_T2_setMode
IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T2 timer.
Definition: IfxGpt12.h:1120
IfxGpt12_T2_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T2 timer. ...
Definition: IfxGpt12.h:1101
IfxGpt12_T4_setInterruptEnable
IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
Enables / Disables the interrupt generation of the T4 timer.
Definition: IfxGpt12.h:1316
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:210
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:306
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:269
IfxGpt12_IncrEnc_getAbsolutePosition
float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:67
IfxGpt12_Mode_timer
Timer Mode selected.
Definition: IfxGpt12.h:171
IfxStdIf_Pos_ResolutionFactor_fourFold
4-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:60
IfxGpt12_T5_getSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
Returns the address of Timer 5 service request.
Definition: IfxGpt12.h:1370
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:83
IfxGpt12_IncrEnc_getRefreshPeriod
float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:110
IfxGpt12_CaptureTriggerMode_risingEdge
positive Transition on CAPIN or any Transition on T3IN
Definition: IfxGpt12.h:92
IfxGpt12_IncrEnc_Config::pinMode
IfxPort_InputMode pinMode
Pin mode for A, B and Z inputs.
Definition: IfxGpt12_IncrEnc.h:225
IfxGpt12_T5_setMode
IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
Sets the mode of operation od T5 timer.
Definition: IfxGpt12.h:1433
IfxGpt12_T3_setIncrementalInterfaceInputMode
IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
Sets the input edge selection for the incremental interface mode of the T3 timer. ...
Definition: IfxGpt12.h:1206
Ifx_LowPassPt1F32_Config::gain
float32 gain
Gain.
Definition: Ifx_LowPassPt1F32.h:55
Ifx_LowPassPt1F32_Config
PT1 configuration.
Definition: Ifx_LowPassPt1F32.h:52
IfxGpt12_T4_run
IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
Starts / stops the T4 Timer.
Definition: IfxGpt12.h:1274
IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN
(rising or falling edge) on TxIN
Definition: IfxGpt12.h:150
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:280
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxGpt12_IncrEnc::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxGpt12_IncrEnc.h:209
IfxGpt12_T3_setDirectionSource
IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T3 timer count direction source internal / external.
Definition: IfxGpt12.h:1194
IfxGpt12_IncrEnc_reset
void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:327
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:282
IfxGpt12_TimerDirection_up
Timer Up Direction selected.
Definition: IfxGpt12.h:218
IfxGpt12_TimerDirectionSource_internal
Timer Dir Control = TxUD (x=2,3,4)
Definition: IfxGpt12.h:227
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxGpt12_IncrEnc_initConfig
void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default.
Definition: IfxGpt12_IncrEnc.c:287
IfxGpt12_IncrEnc_Config::pinZ
IfxGpt12_TxIn_In * pinZ
Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type con...
Definition: IfxGpt12_IncrEnc.h:224
IfxGpt12_IncrEnc::offset
sint32 offset
raw position offset
Definition: IfxGpt12_IncrEnc.h:200
IfxGpt12_IncrEnc::speedConstPulseCount
float32 speedConstPulseCount
constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode ...
Definition: IfxGpt12_IncrEnc.h:203
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:132
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:176
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:228
IfxStdIf_Pos_Config::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxStdIf_Pos.h:305
IfxGpt12_T5_getFrequency
float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
Returns the frequency of the T5 timer.
Definition: IfxGpt12.c:158
IfxGpt12_T2_setDirectionSource
IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
Sets the T2 timer count direction source internal / external.
Definition: IfxGpt12.h:1088


iLLD_TC26B: IfxGpt12_IncrEnc.h Source File

  • Gpt12
  • IncrEnc
IfxGpt12_IncrEnc.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_IncrEnc.h
3 * \brief GPT12 INCRENC details
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gpt12_IncrEnc INCRENC
25 * \ingroup IfxLld_Gpt12
26 *
27 * \defgroup IfxLld_Gpt12_IncrEnc_Usage How to use the GPT12 Incremental Encoder Driver
28 * \ingroup IfxLld_Gpt12_IncrEnc
29 *
30 * The IncrEnc interface can be used in one of the following configurations T3 as core or T2 as core
31 *
32 * Setup with T3 as core
33 * - T3 as incremental mode
34 * - Multiplication factor:
35 * - twoFold: use both edges of TxIn
36 * - fourFold: use both edges of TxIn and TxEUD
37 * - Reverse of direction supported by GPT12
38 * - T3 value diff is used for speed calculation at high speed (speed > speedModeThreshold)
39 * - T4 used for zero signal detection if pinZ is not NULL
40 * - interrupt is generated to support turn calculation if zeroIsrPriority != 0
41 * - T4 clears T3 on zero signal event on TxIn input
42 * - T5 used for low speed calculation (speed < speedModeThreshold)
43 * - Rising edge of TxIn or TxEUD captures the T5 timer in CAPREL
44 *
45 * Setup with T2 as core
46 * - T2 as incremental mode
47 * - Multiplication factor:
48 * - twoFold: sample on both edges of TxIn
49 * - fourFold: sample on both edges of TxIn and TxEUD
50 * - Reverse of direction supported by GPT12
51 * - T2 value diff is used for speed calculation at high speed
52 * - T4 used for zero signal detection if pinZeroTxEUD is not NULL
53 * - T4 clears T2 on zero signal event on TxEUD input
54 *
55 * \section IfxLld_Gpt12_IncrEnc_Preparation Preparation
56 * \subsection IfxLld_Gpt12_IncrEnc_Include Include Files
57 *
58 * Include following header file into your C code:
59 * \code
60 * #include <Gpt12/Gpt/IfxGpt12_IncrEnc.h>
61 * \endcode
62 *
63 * \subsection IfxLld_Gpt12_IncrEnc_Variables Variables
64 *
65 * \code
66 * // used globally
67 * static IfxGpt12_IncrEnc gpt12;
68 * \endcode
69 *
70 * \subsection IfxLld_Gpt12_Gpt_Interrupt Interrupt Handler Installation
71 *
72 * See also \ref IfxLld_Cpu_Irq_Usage
73 *
74 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
75 * \code
76 * // priorities are normally defined in Ifx_IntPrioDef.h
77 * #define ISR_PRIORITY_INCRENC_ZERO 6
78 * \endcode
79 *
80 * Add the interrupt service routines to your C code. They have to call the GPT12 interrupt handlers by passing the gpt12 handle:
81 * \code
82 * IFX_INTERRUPT(ISR_IncrIncZero, 0, ISR_PRIORITY_INCRENC_ZERO)
83 * {
84 * IfxGpt12_IncrEnc_onZeroIrq(&gpt12);
85 * }
86 * \endcode
87 *
88 * Finally install the interrupt handlers in your initialisation function:
89 * \code
90 * // install interrupt handlers
91 * IfxCpu_Irq_installInterruptHandler(&ISR_IncrIncZero, ISR_PRIORITY_INCRENC_ZERO);
92 * IfxCpu_enableInterrupts();
93 * \endcode
94 *
95 * \subsection IfxLld_Gpt12_Gpt_Init Module Initialisation
96 *
97 * The module initialisation can be done in the same function. Here an example:
98 * \code
99 * // Initialize global clocks
100 * IfxGpt12_enableModule(&MODULE_GPT120);
101 * IfxGpt12_setGpt1BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt1BlockPrescaler_8);
102 * IfxGpt12_setGpt2BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt2BlockPrescaler_4);
103 *
104 * // create module config
105 * IfxGpt12_IncrEnc_Config gpt12Config;
106 * IfxGpt12_IncrEnc_initConfig(&gpt12Config , &MODULE_GPT120);
107 *
108 * // implementation with T3 as core
109 * gpt12Config.base.offset = 0;
110 * gpt12Config.base.reversed = FALSE;
111 * gpt12Config.base.resolution = 2048;
112 * gpt12Config.base.periodPerRotation = 1;
113 * gpt12Config.base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_fourFold;
114 * gpt12Config.base.updatePeriod = 100e-6;
115 * gpt12Config.base.speedModeThreshold = 200;
116 * gpt12Config.base.minSpeed = 10;
117 * gpt12Config.base.maxSpeed = 500;
118 * gpt12Config.zeroIsrPriority = ISR_PRIORITY(INTERRUPT_INCRINC_ZERO);
119 * gpt12Config.zeroIsrProvider = ISR_PROVIDER(INTERRUPT_INCRINC_ZERO);
120 * gpt12Config.pinA = &IfxGpt120_T3INA_P02_6_IN;
121 * gpt12Config.pinB = &IfxGpt120_T3EUDA_P02_7_IN;
122 * gpt12Config.pinZ = &IfxGpt120_T4INA_P02_8_IN;
123 * gpt12Config.pinMode = IfxPort_InputMode_noPullDevice;
124 *
125 * gpt12Config.base.speedFilterEnabled = TRUE;
126 * gpt12Config.base.speedFilerCutOffFrequency = config.base.maxSpeed / 2 * IFX_PI * 2;
127 *
128 *
129 * // initialize module
130 * //IfxGpt12_IncrEnc gpt12; // defined globally
131 * IfxGpt12_IncrEnc_init(&gpt12, &gpt12Config);
132 * \endcode
133 *
134 * \section IfxLld_Gpt12_IncrEnc_Update Update
135 *
136 * speed, position and direction of the incremental encoder can be collected by the following
137 *
138 * \code
139 * float32 speed, rawPosition;
140 * IfxStdIf_Pos_Dir direction;
141 *
142 * Ifx_TickTime tickRefresh = gpt12.updatePeriod * TimeConst_1s;
143 *
144 * Ifx_TickTime refreshDeadLine = now();
145 *
146 * if (isDeadLine(refreshDeadLine))
147 * {
148 * refreshDeadLine = addTTime(refreshDeadLine, tickRefresh);
149 * IfxGpt12_IncrEnc_update(&gpt12);
150 *
151 * speed = IfxGpt12_IncrEnc_getSpeed(&gpt12);
152 * rawPosition = IfxGpt12_IncrEnc_getRawPosition(&gpt12);
153 * direction = IfxGpt12_IncrEnc_getDirection(&gpt12);
154 * }
155 * \endcode
156 *
157 * \defgroup IfxLld_Gpt12_IncrEnc INCRENC
158 * \ingroup IfxLld_Gpt12
159 * \defgroup IfxLld_Gpt12_IncrEnc_Datastructures Data structures
160 * \ingroup IfxLld_Gpt12_IncrEnc
161 * \defgroup IfxLld_Gpt12_IncrEnc_Functions Functions
162 * \ingroup IfxLld_Gpt12_IncrEnc
163 * \defgroup IfxLld_Gpt12_IncrEnc_StdIf_Functions StdIf Functions
164 * \ingroup IfxLld_Gpt12_IncrEnc
165 */
166
167 #ifndef IFXGPT12_INCRENC_H
168 #define IFXGPT12_INCRENC_H 1
169
170 /******************************************************************************/
171 /*----------------------------------Includes----------------------------------*/
172 /******************************************************************************/
173
174 #include "StdIf/IfxStdIf_Pos.h"
175 #include "SysSe/Math/Ifx_LowPassPt1F32.h"
176 #include "Gpt12/Std/IfxGpt12.h"
177 #include "string.h"
178
179 /******************************************************************************/
180 /*------------------------------Type Definitions------------------------------*/
181 /******************************************************************************/
182
183 typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update;
184
185 /******************************************************************************/
186 /*-----------------------------Data Structures--------------------------------*/
187 /******************************************************************************/
188
189 /** \addtogroup IfxLld_Gpt12_IncrEnc_Datastructures
190 * \{ */
191 /** \brief Incremental encoder object
192 */
193 typedef struct
194 {
195 sint32 rawPosition; /**< \brief raw position in ticks. \note: the value already contains the offset */
196 float32 speed; /**< \brief mechanical speed in rad/s */
197 sint32 turn; /**< \brief number of mechanical turns */
198 IfxStdIf_Pos_Dir direction; /**< \brief rotation direction */
199 IfxStdIf_Pos_Status status; /**< \brief error code (0 = no error) */
200 sint32 offset; /**< \brief raw position offset */
201 sint32 resolution; /**< \brief resolution of this position sensor interface */
202 float32 updatePeriod; /**< \brief update period in seconds */
203 float32 speedConstPulseCount; /**< \brief constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode */
204 float32 speedConstTimeDiff; /**< \brief constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode */
205 float32 positionConst; /**< \brief constant for calculating mechanical position (in rad) from raw position */
206 float32 speedModeThreshold; /**< \brief treshold used for speed calculation using pulse count mode or time diff mode in rad/s */
207 sint32 speedModeThresholdTick; /**< \brief treshold used for speed calculation using pulse count mode or time diff mode in ticks */
208 Ifx_GPT12 *module; /**< \brief Pointer to the GPT12 module */
209 float32 minSpeed; /**< \brief Absolute minimal allowed speed. below speed is recognized as 0rad/s */
210 float32 maxSpeed; /**< \brief Absolute maximal allowed speed. Above speed is recognized as error */
211 Ifx_LowPassPt1F32 speedLpf; /**< \brief Low pass filter object */
212 IfxGpt12_IncrEnc_Update update; /**< \brief Update call back API */
213 boolean speedFilterEnabled; /**< \brief Enable / disable the speed low pass filter */
214 } IfxGpt12_IncrEnc;
215
216 /** \brief Configuration structure for GPT12
217 */
218 typedef struct
219 {
220 IfxStdIf_Pos_Config base; /**< \brief Configuration data of \ref library_srvsw_stdif_posif */
221 Ifx_GPT12 *module; /**< \brief Pointer to module base address */
222 IfxGpt12_TxIn_In *pinA; /**< \brief Encoder A signal. Should be connecting to T2 or T3 TxIN. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
223 IfxGpt12_TxEud_In *pinB; /**< \brief Encoder B signal. Should be connecting to T2 or T3 TxEUD. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
224 IfxGpt12_TxIn_In *pinZ; /**< \brief Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type conflict warning) for use with T4. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
225 IfxPort_InputMode pinMode; /**< \brief Pin mode for A, B and Z inputs */
226 Ifx_Priority zeroIsrPriority; /**< \brief Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable */
227 IfxSrc_Tos zeroIsrProvider; /**< \brief Interrupt service provider for the zero interrupt */
228 IfxPort_PadDriver pinDriver; /**< \brief Pad Driver */
229 boolean initPins; /**< \brief TRUE: Initialize pins in driver
230 * FALSE: Don't initialize pins. User handles separately. */
231 } IfxGpt12_IncrEnc_Config;
232
233 /** \} */
234
235 /** \addtogroup IfxLld_Gpt12_IncrEnc_Functions
236 * \{ */
237
238 /******************************************************************************/
239 /*-------------------------Global Function Prototypes-------------------------*/
240 /******************************************************************************/
241
242 /** \brief Initialises the Incremental interface
243 * \param driver incremental encoder interface Handle
244 * \param config Configuration structure for incremental encoder
245 * \return TRUE on success else FALSE
246 *
247 * \code
248 * // create module config
249 * IfxGpt12_IncrEnc_Config gptConfig;
250 * IfxGpt12_IncrEnc_initConfig(&gptConfig , &MODULE_GPT120);
251 *
252 * // initialize module
253 * //IfxGpt12_IncrEnc gpt12; // defined globally
254 *
255 * IfxGpt12_IncrEnc_init(&gpt12, &gptConfig);
256 * \endcode
257 *
258 */
259 IFX_EXTERN boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config);
260
261 /** \brief Initializes the configuration structure to default
262 * \param config Configuration structure for incremental encoder
263 * \param gpt12 pointer to module base address
264 * \return None
265 *
266 * see \ref IfxGpt12_IncrEnc_init
267 *
268 */
269 IFX_EXTERN void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12);
270
271 /** \} */
272
273 /** \addtogroup IfxLld_Gpt12_IncrEnc_StdIf_Functions
274 * \{ */
275
276 /******************************************************************************/
277 /*-------------------------Global Function Prototypes-------------------------*/
278 /******************************************************************************/
279
280 /** \brief \see IfxStdIf_Pos_GetAbsolutePosition
281 * \param driver driver handle
282 * \return absolute position
283 */
284 IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver);
285
286 /** \brief \see IfxStdIf_Pos_GetDirection
287 * \param driver driver handle
288 * \return direction
289 */
290 IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver);
291
292 /** \brief \see IfxStdIf_Pos_GetFault
293 * \param driver driver handle
294 * \return Fault
295 */
296 IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver);
297
298 /** \brief \see IfxStdIf_Pos_GetOffset
299 * \param driver driver handle
300 * \return offset address
301 */
302 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver);
303
304 /** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
305 * \param driver driver handle
306 * \return Period per rotation
307 */
308 IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver);
309
310 /** \brief \see IfxStdIf_Pos_GetPosition
311 * \param driver driver handle
312 * \return position
313 */
314 IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver);
315
316 /** \brief \see IfxStdIf_Pos_GetRawPosition
317 * \param driver driver handle
318 * \return position in ticks
319 */
320 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver);
321
322 /** \brief \see IfxStdIf_Pos_GetRefreshPeriod
323 * \param driver driver handle
324 * \return update period
325 */
326 IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver);
327
328 /** \brief \see IfxStdIf_Pos_GetResolution
329 * \param driver driver handle
330 * \return resolution
331 */
332 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver);
333
334 /** \brief \see IfxStdIf_Pos_GetSensorType
335 * \param driver driver handle
336 * \return sensor type
337 */
338 IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver);
339
340 /** \brief \see IfxStdIf_Pos_GetSpeed
341 * \param driver driver handle
342 * \return speed
343 */
344 IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver);
345
346 /** \brief \see IfxStdIf_Pos_GetTurn
347 * \param driver driver handle
348 * \return the number of turns
349 */
350 IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver);
351
352 /** \brief \see IfxStdIf_Pos_OnZeroIrq
353 * \param driver driver handle
354 * \return None
355 */
356 IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver);
357
358 /** \brief \see IfxStdIf_Pos_Reset
359 * \param driver driver handle
360 * \return None
361 */
362 IFX_EXTERN void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver);
363
364 /** \brief \see IfxStdIf_Pos_ResetFaults
365 * \param driver driver handle
366 * \return None
367 */
368 IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver);
369
370 /** \brief \see IfxStdIf_Pos_SetOffset
371 * \param driver driver handle
372 * \param offset offset address
373 * \return None
374 */
375 IFX_EXTERN void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset);
376
377 /** \brief \see IfxStdIf_Pos_SetRefreshPeriod
378 * \param driver driver handle
379 * \param updatePeriod update period
380 * \return None
381 */
382 IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod);
383
384 /** \brief \see IfxStdIf_Pos_Update
385 * \param driver driver handle
386 * \return None
387 */
388 IFX_EXTERN void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver);
389
390 /** \} */
391
392 /******************************************************************************/
393 /*-------------------------Global Function Prototypes-------------------------*/
394 /******************************************************************************/
395
396 /** \brief Initializes the standard interface "Pos"
397 * \param stdif Standard interface position object
398 * \param driver incremental encoder interface Handle
399 * \return TRUE on success else FALSE
400 */
401 IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver);
402
403 #endif /* IFXGPT12_INCRENC_H */
IfxGpt12_IncrEnc_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins. User handles separately.
Definition: IfxGpt12_IncrEnc.h:229
IfxGpt12_IncrEnc::positionConst
float32 positionConst
constant for calculating mechanical position (in rad) from raw position
Definition: IfxGpt12_IncrEnc.h:205
IfxGpt12_IncrEnc_getPosition
IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:98
IfxGpt12_IncrEnc_Config::zeroIsrPriority
Ifx_Priority zeroIsrPriority
Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable.
Definition: IfxGpt12_IncrEnc.h:226
IfxGpt12_IncrEnc_Config::pinDriver
IfxPort_PadDriver pinDriver
Pad Driver.
Definition: IfxGpt12_IncrEnc.h:228
IfxGpt12_IncrEnc::speedModeThreshold
float32 speedModeThreshold
treshold used for speed calculation using pulse count mode or time diff mode in rad/s ...
Definition: IfxGpt12_IncrEnc.h:206
IfxGpt12_IncrEnc_Config::pinB
IfxGpt12_TxEud_In * pinB
Encoder B signal. Should be connecting to T2 or T3 TxEUD. See GPT12 pin map data. ...
Definition: IfxGpt12_IncrEnc.h:223
IfxGpt12_IncrEnc_Config::zeroIsrProvider
IfxSrc_Tos zeroIsrProvider
Interrupt service provider for the zero interrupt.
Definition: IfxGpt12_IncrEnc.h:227
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxGpt12_IncrEnc_Config
Configuration structure for GPT12.
Definition: IfxGpt12_IncrEnc.h:218
IfxGpt12_IncrEnc_setOffset
IFX_EXTERN void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
Definition: IfxGpt12_IncrEnc.c:346
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:47
IfxGpt12_IncrEnc_getRawPosition
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:104
IfxGpt12_IncrEnc::rawPosition
sint32 rawPosition
raw position in ticks.
Definition: IfxGpt12_IncrEnc.h:195
float32
float float32
Definition: Platform_Types.h:167
IfxGpt12_IncrEnc_Config::base
IfxStdIf_Pos_Config base
Configuration data of Standard interface: Position interface.
Definition: IfxGpt12_IncrEnc.h:220
IfxGpt12_IncrEnc_setRefreshPeriod
IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
Definition: IfxGpt12_IncrEnc.c:353
IfxGpt12_IncrEnc::status
IfxStdIf_Pos_Status status
error code (0 = no error)
Definition: IfxGpt12_IncrEnc.h:199
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxGpt12_IncrEnc
Incremental encoder object.
Definition: IfxGpt12_IncrEnc.h:193
IfxGpt12_IncrEnc_resetFaults
IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:337
IfxGpt12_IncrEnc::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxGpt12_IncrEnc.h:210
IfxGpt12_IncrEnc_update
IFX_EXTERN void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:395
IfxGpt12_IncrEnc::turn
sint32 turn
number of mechanical turns
Definition: IfxGpt12_IncrEnc.h:197
IfxGpt12_IncrEnc_getTurn
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:135
IfxGpt12_IncrEnc_Update
IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update
Definition: IfxGpt12_IncrEnc.h:183
IfxGpt12_IncrEnc::direction
IfxStdIf_Pos_Dir direction
rotation direction
Definition: IfxGpt12_IncrEnc.h:198
IfxGpt12_IncrEnc_init
IFX_EXTERN boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
Initialises the Incremental interface.
Definition: IfxGpt12_IncrEnc.c:141
Ifx_LowPassPt1F32
PT1 object definition.
Definition: Ifx_LowPassPt1F32.h:44
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStdIf_Pos.h
Standard interface: Position interface.
IfxGpt12_IncrEnc::speedConstTimeDiff
float32 speedConstTimeDiff
constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode ...
Definition: IfxGpt12_IncrEnc.h:204
IfxGpt12.h
GPT12 basic functionality.
IfxGpt12_IncrEnc::speedModeThresholdTick
sint32 speedModeThresholdTick
treshold used for speed calculation using pulse count mode or time diff mode in ticks ...
Definition: IfxGpt12_IncrEnc.h:207
IfxGpt12_IncrEnc_getResolution
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:116
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:75
IfxGpt12_IncrEnc_getSensorType
IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:122
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:266
IfxGpt12_IncrEnc::update
IfxGpt12_IncrEnc_Update update
Update call back API.
Definition: IfxGpt12_IncrEnc.h:212
Ifx_LowPassPt1F32.h
Low pass filter PT1.
IfxGpt12_IncrEnc::speed
float32 speed
mechanical speed in rad/s
Definition: IfxGpt12_IncrEnc.h:196
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:64
IfxGpt12_IncrEnc::updatePeriod
float32 updatePeriod
update period in seconds
Definition: IfxGpt12_IncrEnc.h:202
IfxGpt12_IncrEnc_getSpeed
IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:129
IfxGpt12_IncrEnc_getOffset
IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:85
IfxGpt12_IncrEnc::resolution
sint32 resolution
resolution of this position sensor interface
Definition: IfxGpt12_IncrEnc.h:201
IfxGpt12_IncrEnc::speedLpf
Ifx_LowPassPt1F32 speedLpf
Low pass filter object.
Definition: IfxGpt12_IncrEnc.h:211
IfxGpt12_IncrEnc_Config::pinA
IfxGpt12_TxIn_In * pinA
Encoder A signal. Should be connecting to T2 or T3 TxIN. See GPT12 pin map data.
Definition: IfxGpt12_IncrEnc.h:222
IfxGpt12_IncrEnc_getDirection
IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:73
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGpt12_IncrEnc_getPeriodPerRotation
IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:91
IfxGpt12_IncrEnc_onZeroIrq
IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:309
IfxGpt12_IncrEnc::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxGpt12_IncrEnc.h:213
IfxGpt12_IncrEnc::module
Ifx_GPT12 * module
Pointer to the GPT12 module.
Definition: IfxGpt12_IncrEnc.h:208
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
sint32
long sint32
Definition: Platform_Types.h:131
IfxGpt12_IncrEnc_getFault
IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:79
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:210
IfxGpt12_IncrEnc_stdIfPosInit
IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
Initializes the standard interface "Pos".
Definition: IfxGpt12_IncrEnc.c:361
IfxGpt12_IncrEnc_getAbsolutePosition
IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:67
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:83
IfxGpt12_IncrEnc_getRefreshPeriod
IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:110
IfxGpt12_IncrEnc_Config::pinMode
IfxPort_InputMode pinMode
Pin mode for A, B and Z inputs.
Definition: IfxGpt12_IncrEnc.h:225
IfxGpt12_IncrEnc::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxGpt12_IncrEnc.h:209
IfxGpt12_IncrEnc_reset
IFX_EXTERN void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
Definition: IfxGpt12_IncrEnc.c:327
IfxGpt12_IncrEnc_initConfig
IFX_EXTERN void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
Initializes the configuration structure to default.
Definition: IfxGpt12_IncrEnc.c:287
IfxGpt12_IncrEnc_Config::pinZ
IfxGpt12_TxIn_In * pinZ
Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type con...
Definition: IfxGpt12_IncrEnc.h:224
IfxGpt12_IncrEnc::offset
sint32 offset
raw position offset
Definition: IfxGpt12_IncrEnc.h:200
IfxGpt12_IncrEnc::speedConstPulseCount
float32 speedConstPulseCount
constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode ...
Definition: IfxGpt12_IncrEnc.h:203


iLLD_TC26B: IfxGpt12_PinMap.c Source File

  • _PinMap
IfxGpt12_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_PinMap.c
3 * \brief GPT12 I/O map
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxGpt12_PinMap.h"
27
28 IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a};
29 IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a};
30 IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b};
31 IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a};
32 IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b};
33 IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a};
34 IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b};
35 IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a};
36 IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b};
37 IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a};
38 IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b};
39 IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a};
40 IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b};
41 IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a};
42 IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b};
43 IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a};
44 IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b};
45 IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a};
46 IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b};
47 IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a};
48 IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b};
49 IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4};
50 IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7};
51 IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5};
52 IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7};
53
54
55 const IfxGpt12_Capin_In *IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS] = {
56 {
57 &IfxGpt120_CAPINA_P13_2_IN
58 }
59 };
60
61 const IfxGpt12_TxEud_In *IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS] = {
62 {
63 {
64 NULL_PTR,
65 NULL_PTR
66 },
67 {
68 NULL_PTR,
69 NULL_PTR
70 },
71 {
72 &IfxGpt120_T2EUDA_P00_8_IN,
73 &IfxGpt120_T2EUDB_P33_6_IN
74 },
75 {
76 &IfxGpt120_T3EUDA_P02_7_IN,
77 &IfxGpt120_T3EUDB_P10_7_IN
78 },
79 {
80 &IfxGpt120_T4EUDA_P00_9_IN,
81 &IfxGpt120_T4EUDB_P33_5_IN
82 },
83 {
84 &IfxGpt120_T5EUDA_P21_6_IN,
85 &IfxGpt120_T5EUDB_P10_1_IN
86 },
87 {
88 &IfxGpt120_T6EUDA_P20_0_IN,
89 &IfxGpt120_T6EUDB_P10_0_IN
90 }
91 }
92 };
93
94 const IfxGpt12_TxIn_In *IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS] = {
95 {
96 {
97 NULL_PTR,
98 NULL_PTR
99 },
100 {
101 NULL_PTR,
102 NULL_PTR
103 },
104 {
105 &IfxGpt120_T2INA_P00_7_IN,
106 &IfxGpt120_T2INB_P33_7_IN
107 },
108 {
109 &IfxGpt120_T3INA_P02_6_IN,
110 &IfxGpt120_T3INB_P10_4_IN
111 },
112 {
113 &IfxGpt120_T4INA_P02_8_IN,
114 &IfxGpt120_T4INB_P10_8_IN
115 },
116 {
117 &IfxGpt120_T5INA_P21_7_IN,
118 &IfxGpt120_T5INB_P10_3_IN
119 },
120 {
121 &IfxGpt120_T6INA_P20_3_IN,
122 &IfxGpt120_T6INB_P10_2_IN
123 }
124 }
125 };
126
127 const IfxGpt12_TxOut_Out *IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS] = {
128 {
129 {
130 NULL_PTR,
131 NULL_PTR
132 },
133 {
134 NULL_PTR,
135 NULL_PTR
136 },
137 {
138 NULL_PTR,
139 NULL_PTR
140 },
141 {
142 &IfxGpt120_T3OUT_P10_6_OUT,
143 &IfxGpt120_T3OUT_P21_6_OUT
144 },
145 {
146 NULL_PTR,
147 NULL_PTR
148 },
149 {
150 NULL_PTR,
151 NULL_PTR
152 },
153 {
154 &IfxGpt120_T6OUT_P10_5_OUT,
155 &IfxGpt120_T6OUT_P21_7_OUT
156 }
157 }
158 };
IfxGpt12_Capin_In_pinTable
const IfxGpt12_Capin_In * IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:55
IfxGpt120_T6OUT_P21_7_OUT
IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
Definition: IfxGpt12_PinMap.c:52
IfxGpt120_T6EUDA_P20_0_IN
IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
Definition: IfxGpt12_PinMap.c:37
IfxGpt120_T3EUDB_P10_7_IN
IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
Definition: IfxGpt12_PinMap.c:32
IFXGPT12_PINMAP_NUM_TIMERS
#define IFXGPT12_PINMAP_NUM_TIMERS
Definition: IfxGpt12_PinMap.h:101
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:47
IfxGpt120_T5EUDA_P21_6_IN
IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
Definition: IfxGpt12_PinMap.c:35
IfxGpt120_T3EUDA_P02_7_IN
IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
Definition: IfxGpt12_PinMap.c:31
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxGpt120_T3OUT_P21_6_OUT
IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
Definition: IfxGpt12_PinMap.c:50
IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:103
IfxGpt120_T5EUDB_P10_1_IN
IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
Definition: IfxGpt12_PinMap.c:36
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxGpt120_T4EUDB_P33_5_IN
IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
Definition: IfxGpt12_PinMap.c:34
IfxGpt12_PinMap.h
GPT12 I/O map.
IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:105
IfxGpt120_T6EUDB_P10_0_IN
IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
Definition: IfxGpt12_PinMap.c:38
IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:102
IfxGpt120_T2EUDA_P00_8_IN
IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
Definition: IfxGpt12_PinMap.c:29
IfxGpt120_T4INB_P10_8_IN
IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
Definition: IfxGpt12_PinMap.c:44
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:65
IfxGpt120_T2INB_P33_7_IN
IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
Definition: IfxGpt12_PinMap.c:40
IfxGpt120_T3INA_P02_6_IN
IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
Definition: IfxGpt12_PinMap.c:41
IfxGpt120_T6INA_P20_3_IN
IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
Definition: IfxGpt12_PinMap.c:47
IfxGpt120_CAPINA_P13_2_IN
IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
Definition: IfxGpt12_PinMap.c:28
IfxGpt12_TxIn_In_pinTable
const IfxGpt12_TxIn_In * IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:94
IfxGpt120_T5INA_P21_7_IN
IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
Definition: IfxGpt12_PinMap.c:45
IFXGPT12_PINMAP_NUM_MODULES
#define IFXGPT12_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxGpt12_PinMap.h:100
IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:104
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:109
IfxGpt120_T4EUDA_P00_9_IN
IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
Definition: IfxGpt12_PinMap.c:33
IfxGpt120_T2EUDB_P33_6_IN
IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
Definition: IfxGpt12_PinMap.c:30
IfxGpt120_T6OUT_P10_5_OUT
IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
Definition: IfxGpt12_PinMap.c:51
IfxGpt120_T3INB_P10_4_IN
IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
Definition: IfxGpt12_PinMap.c:42
IfxGpt120_T2INA_P00_7_IN
IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
Definition: IfxGpt12_PinMap.c:39
IfxGpt12_TxEud_In_pinTable
const IfxGpt12_TxEud_In * IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:61
IfxGpt120_T3OUT_P10_6_OUT
IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
Definition: IfxGpt12_PinMap.c:49
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxGpt120_T5INB_P10_3_IN
IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
Definition: IfxGpt12_PinMap.c:46
IfxGpt12_TxOut_Out_pinTable
const IfxGpt12_TxOut_Out * IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
Definition: IfxGpt12_PinMap.c:127
IfxGpt120_T6INB_P10_2_IN
IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
Definition: IfxGpt12_PinMap.c:48
IfxGpt120_T4INA_P02_8_IN
IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
Definition: IfxGpt12_PinMap.c:43
IfxGpt12_Capin_In
CAPIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:39


iLLD_TC26B: IfxGpt12_PinMap.h Source File

  • _PinMap
IfxGpt12_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_PinMap.h
3 * \brief GPT12 I/O map
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gpt12_pinmap GPT12 Pin Mapping
25 * \ingroup IfxLld_Gpt12
26 */
27
28 #ifndef IFXGPT12_PINMAP_H
29 #define IFXGPT12_PINMAP_H
30
31 #include <IfxGpt12_reg.h>
32 #include <_Impl/IfxGpt12_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Gpt12_pinmap
36 * \{ */
37
38 /** \brief CAPIN pin mapping structure */
39 typedef const struct
40 {
41 Ifx_GPT12* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel select; /**< \brief Input multiplexer value */
44 } IfxGpt12_Capin_In;
45
46 /** \brief TxEUD pin mapping structure */
47 typedef const struct
48 {
49 Ifx_GPT12* module; /**< \brief Base address */
50 uint8 timer; /**< \brief Timer number */
51 IfxPort_Pin pin; /**< \brief Port pin */
52 Ifx_RxSel select; /**< \brief Input multiplexer value */
53 } IfxGpt12_TxEud_In;
54
55 /** \brief TxIN pin mapping structure */
56 typedef const struct
57 {
58 Ifx_GPT12* module; /**< \brief Base address */
59 uint8 timer; /**< \brief Timer number */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 Ifx_RxSel select; /**< \brief Input multiplexer value */
62 } IfxGpt12_TxIn_In;
63
64 /** \brief TxOUT pin mapping structure */
65 typedef const struct
66 {
67 Ifx_GPT12* module; /**< \brief Base address */
68 uint8 timer; /**< \brief Timer number */
69 IfxPort_Pin pin; /**< \brief Port pin */
70 IfxPort_OutputIdx select; /**< \brief Port control code */
71 } IfxGpt12_TxOut_Out;
72
73 IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN; /**< \brief GPT120_CAPINA: GPT120 input */
74 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN; /**< \brief GPT120_T2EUDA: GPT120 input */
75 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN; /**< \brief GPT120_T2EUDB: GPT120 input */
76 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN; /**< \brief GPT120_T3EUDA: GPT120 input */
77 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN; /**< \brief GPT120_T3EUDB: GPT120 input */
78 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN; /**< \brief GPT120_T4EUDA: GPT120 input */
79 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN; /**< \brief GPT120_T4EUDB: GPT120 input */
80 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN; /**< \brief GPT120_T5EUDA: GPT120 input */
81 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN; /**< \brief GPT120_T5EUDB: GPT120 input */
82 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN; /**< \brief GPT120_T6EUDA: GPT120 input */
83 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN; /**< \brief GPT120_T6EUDB: GPT120 input */
84 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN; /**< \brief GPT120_T2INA: GPT120 input */
85 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN; /**< \brief GPT120_T2INB: GPT120 input */
86 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN; /**< \brief GPT120_T3INA: GPT120 input */
87 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN; /**< \brief GPT120_T3INB: GPT120 input */
88 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN; /**< \brief GPT120_T4INA: GPT120 input */
89 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN; /**< \brief GPT120_T4INB: GPT120 input */
90 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN; /**< \brief GPT120_T5INA: GPT120 input */
91 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN; /**< \brief GPT120_T5INB: GPT120 input */
92 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN; /**< \brief GPT120_T6INA: GPT120 input */
93 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN; /**< \brief GPT120_T6INB: GPT120 input */
94 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT; /**< \brief GPT120_T3OUT: GPT120 output */
95 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT; /**< \brief GPT120_T3OUT: GPT120 output */
96 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT; /**< \brief GPT120_T6OUT: GPT120 output */
97 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT; /**< \brief GPT120_T6OUT: GPT120 output */
98
99 /** \brief Table dimensions */
100 #define IFXGPT12_PINMAP_NUM_MODULES 1
101 #define IFXGPT12_PINMAP_NUM_TIMERS 7
102 #define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
103 #define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
104 #define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
105 #define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2
106
107
108 /** \brief IfxGpt12_Capin_In table */
109 IFX_EXTERN const IfxGpt12_Capin_In *IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS];
110
111 /** \brief IfxGpt12_TxEud_In table */
112 IFX_EXTERN const IfxGpt12_TxEud_In *IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS];
113
114 /** \brief IfxGpt12_TxIn_In table */
115 IFX_EXTERN const IfxGpt12_TxIn_In *IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS];
116
117 /** \brief IfxGpt12_TxOut_Out table */
118 IFX_EXTERN const IfxGpt12_TxOut_Out *IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS];
119
120 /** \} */
121
122 #endif /* IFXGPT12_PINMAP_H */
IfxGpt120_T3OUT_P21_6_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT
GPT120_T3OUT: GPT120 output.
Definition: IfxGpt12_PinMap.h:95
IfxGpt12_Capin_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxGpt12_PinMap.h:43
IfxGpt120_T6EUDB_P10_0_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN
GPT120_T6EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:83
IfxGpt120_T6EUDA_P20_0_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN
GPT120_T6EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:82
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IFXGPT12_PINMAP_NUM_TIMERS
#define IFXGPT12_PINMAP_NUM_TIMERS
Definition: IfxGpt12_PinMap.h:101
IfxGpt12_TxEud_In
TxEUD pin mapping structure.
Definition: IfxGpt12_PinMap.h:47
IfxGpt120_T4INB_P10_8_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN
GPT120_T4INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:89
IfxGpt120_T5EUDA_P21_6_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN
GPT120_T5EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:80
IfxGpt120_T3EUDB_P10_7_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN
GPT120_T3EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:77
IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:103
IfxGpt120_T5INB_P10_3_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN
GPT120_T5INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:91
IfxGpt120_T3OUT_P10_6_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT
GPT120_T3OUT: GPT120 output.
Definition: IfxGpt12_PinMap.h:94
IfxGpt120_T5EUDB_P10_1_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN
GPT120_T5EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:81
IfxGpt12_Capin_In_pinTable
IFX_EXTERN const IfxGpt12_Capin_In * IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS]
IfxGpt12_Capin_In table.
Definition: IfxGpt12_PinMap.h:109
IfxGpt12_TxOut_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGpt12_PinMap.h:70
IfxGpt120_T2EUDB_P33_6_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN
GPT120_T2EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:75
IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:105
IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:102
IfxGpt120_T3INA_P02_6_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN
GPT120_T3INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:86
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGpt120_T3EUDA_P02_7_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN
GPT120_T3EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:76
IfxGpt120_T4EUDB_P33_5_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN
GPT120_T4EUDB: GPT120 input.
Definition: IfxGpt12_PinMap.h:79
IfxGpt12_TxEud_In::timer
uint8 timer
Timer number.
Definition: IfxGpt12_PinMap.h:50
IfxGpt12_TxOut_Out
TxOUT pin mapping structure.
Definition: IfxGpt12_PinMap.h:65
IfxGpt12_TxEud_In_pinTable
IFX_EXTERN const IfxGpt12_TxEud_In * IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS]
IfxGpt12_TxEud_In table.
Definition: IfxGpt12_PinMap.h:112
IfxGpt120_CAPINA_P13_2_IN
IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN
GPT120_CAPINA: GPT120 input.
Definition: IfxGpt12_PinMap.h:73
IfxGpt120_T4INA_P02_8_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN
GPT120_T4INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:88
IfxGpt120_T2INA_P00_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN
GPT120_T2INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:84
IfxGpt12_TxOut_Out_pinTable
IFX_EXTERN const IfxGpt12_TxOut_Out * IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS]
IfxGpt12_TxOut_Out table.
Definition: IfxGpt12_PinMap.h:118
IFXGPT12_PINMAP_NUM_MODULES
#define IFXGPT12_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxGpt12_PinMap.h:100
IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS
Definition: IfxGpt12_PinMap.h:104
IfxGpt120_T6OUT_P10_5_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT
GPT120_T6OUT: GPT120 output.
Definition: IfxGpt12_PinMap.h:96
IfxGpt120_T3INB_P10_4_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN
GPT120_T3INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:87
IfxGpt12_TxIn_In
TxIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:56
IfxGpt120_T6OUT_P21_7_OUT
IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT
GPT120_T6OUT: GPT120 output.
Definition: IfxGpt12_PinMap.h:97
IfxGpt120_T6INA_P20_3_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN
GPT120_T6INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:92
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxGpt12_TxIn_In_pinTable
IFX_EXTERN const IfxGpt12_TxIn_In * IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS]
IfxGpt12_TxIn_In table.
Definition: IfxGpt12_PinMap.h:115
IfxGpt120_T5INA_P21_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN
GPT120_T5INA: GPT120 input.
Definition: IfxGpt12_PinMap.h:90
IfxGpt12_Capin_In::module
Ifx_GPT12 * module
Base address.
Definition: IfxGpt12_PinMap.h:41
IfxGpt120_T6INB_P10_2_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN
GPT120_T6INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:93
IfxGpt12_cfg.h
GPT12 on-chip implementation data.
IfxGpt12_Capin_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGpt12_PinMap.h:42
IfxGpt120_T4EUDA_P00_9_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN
GPT120_T4EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:78
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGpt120_T2INB_P33_7_IN
IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN
GPT120_T2INB: GPT120 input.
Definition: IfxGpt12_PinMap.h:85
IfxGpt120_T2EUDA_P00_8_IN
IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN
GPT120_T2EUDA: GPT120 input.
Definition: IfxGpt12_PinMap.h:74
IfxGpt12_Capin_In
CAPIN pin mapping structure.
Definition: IfxGpt12_PinMap.h:39
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxGpt12_cfg.h Source File

  • _Impl
IfxGpt12_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGpt12_cfg.h
3 * \brief GPT12 on-chip implementation data
4 * \ingroup IfxLld_Gpt12
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gpt12 GPT12
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Gpt12_Impl Implementation
27 * \ingroup IfxLld_Gpt12
28 * \defgroup IfxLld_Gpt12_Std Standard Driver
29 * \ingroup IfxLld_Gpt12
30 */
31
32 #ifndef IFXGPT12_CFG_H
33 #define IFXGPT12_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 /******************************************************************************/
40 /*-----------------------------------Macros-----------------------------------*/
41 /******************************************************************************/
42
43 #define IFXGPT12_NUM_MODULES (1)
44
45 #endif /* IFXGPT12_CFG_H */


iLLD_TC26B: IfxGtm.c Source File

  • Gtm
  • Std
IfxGtm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm.h"
30 #include "Scu/Std/IfxScuWdt.h"
31 #include "Scu/Std/IfxScuCcu.h"
32
33 /******************************************************************************/
34 /*-------------------------Function Implementations---------------------------*/
35 /******************************************************************************/
36
37 void IfxGtm_disable(Ifx_GTM *gtm)
38 {
39 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
40
41 IfxScuWdt_clearCpuEndinit(psw);
42 gtm->CLC.B.DISR = 1;
43 IfxScuWdt_setCpuEndinit(psw);
44 }
45
46
47 void IfxGtm_enable(Ifx_GTM *gtm)
48 {
49 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
50
51 IfxScuWdt_clearCpuEndinit(psw);
52 gtm->CLC.B.DISR = 0;
53 IfxScuWdt_setCpuEndinit(psw);
54 }
55
56
57 float32 IfxGtm_getSysClkFrequency(void)
58 {
59 return IfxScuCcu_getGtmFrequency();
60 }
float32
float float32
Definition: Platform_Types.h:167
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxScuWdt.h
SCU basic functionality.
IfxGtm_disable
void IfxGtm_disable(Ifx_GTM *gtm)
Disables the module.
Definition: IfxGtm.c:37
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxGtm_getSysClkFrequency
float32 IfxGtm_getSysClkFrequency(void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK...
Definition: IfxGtm.c:57
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxScuCcu.h
SCU basic functionality.
IfxGtm_enable
void IfxGtm_enable(Ifx_GTM *gtm)
Enables the module.
Definition: IfxGtm.c:47
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1071
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxGtm.h
GTM basic functionality.


iLLD_TC26B: IfxGtm.h Source File

  • Gtm
  • Std
IfxGtm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Std_Basic_Functions Basic Functions
25 * \ingroup IfxLld_Gtm_Std
26 * \defgroup IfxLld_Gtm_Std_Enumerations Enumerations
27 * \ingroup IfxLld_Gtm_Std
28 */
29
30 #ifndef IFXGTM_H
31 #define IFXGTM_H 1
32
33 /******************************************************************************/
34 /*----------------------------------Includes----------------------------------*/
35 /******************************************************************************/
36
37 #include "_Impl/IfxGtm_cfg.h"
38
39 /******************************************************************************/
40 /*--------------------------------Enumerations--------------------------------*/
41 /******************************************************************************/
42
43 /** \addtogroup IfxLld_Gtm_Std_Enumerations
44 * \{ */
45 /** \brief Enum for GTM interrupt modes
46 */
47 typedef enum
48 {
49 IfxGtm_IrqMode_level = 0,
50 IfxGtm_IrqMode_pulse = 1,
51 IfxGtm_IrqMode_pulseNotify = 2,
52 IfxGtm_IrqMode_singlePulse = 3
53 } IfxGtm_IrqMode;
54
55 /** \brief OCDS Suspend Control (OCDS.SUS)
56 */
57 typedef enum
58 {
59 IfxGtm_SuspendMode_none = 0, /**< \brief No suspend */
60 IfxGtm_SuspendMode_hard = 1, /**< \brief Hard Suspend */
61 IfxGtm_SuspendMode_soft = 2 /**< \brief Soft Suspend */
62 } IfxGtm_SuspendMode;
63
64 /** \} */
65
66 /** \addtogroup IfxLld_Gtm_Std_Basic_Functions
67 * \{ */
68
69 /******************************************************************************/
70 /*-------------------------Inline Function Prototypes-------------------------*/
71 /******************************************************************************/
72
73 /** \brief Returs the status of module enabled or disabled
74 * \param gtm Pointer to GTM module
75 * \return status: TRUE/FALSE
76 */
77 IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm);
78
79 /** \brief Returns the module's suspend state.
80 * TRUE :if module is suspended.
81 * FALSE:if module is not yet suspended.
82 * \param gtm Pointer to GTM module registers
83 * \return Suspend status (TRUE / FALSE)
84 */
85 IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm);
86
87 /** \brief Configure the Module to Hard/Soft suspend mode.
88 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
89 * \param gtm Pointer to GTM module registers
90 * \param mode Module suspend mode
91 * \return None
92 */
93 IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode);
94
95 /******************************************************************************/
96 /*-------------------------Global Function Prototypes-------------------------*/
97 /******************************************************************************/
98
99 /** \brief Disables the module
100 * \param gtm Pointer to GTM module
101 * \return None
102 */
103 IFX_EXTERN void IfxGtm_disable(Ifx_GTM *gtm);
104
105 /** \brief Enables the module
106 * \param gtm Pointer to GTM module
107 * \return None
108 */
109 IFX_EXTERN void IfxGtm_enable(Ifx_GTM *gtm);
110
111 /** \} */
112
113 /******************************************************************************/
114 /*-------------------------Global Function Prototypes-------------------------*/
115 /******************************************************************************/
116
117 /** \brief returns the GTM SYSCLK frequency.
118 * Refer to the Clock distribution for details on GTM SYS CLK.
119 * \return sysFreq
120 */
121 IFX_EXTERN float32 IfxGtm_getSysClkFrequency(void);
122
123 /******************************************************************************/
124 /*---------------------Inline Function Implementations------------------------*/
125 /******************************************************************************/
126
127 IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm)
128 {
129 return gtm->CLC.B.DISS == 0;
130 }
131
132
133 IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm)
134 {
135 Ifx_GTM_OCS ocs;
136
137 // read the status
138 ocs.U = gtm->OCS.U;
139
140 // return the status
141 return ocs.B.SUSSTA;
142 }
143
144
145 IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
146 {
147 Ifx_GTM_OCS ocs;
148
149 // remove protection and configure the suspend mode.
150 ocs.B.SUS_P = 1;
151 ocs.B.SUS = mode;
152
153 gtm->OCS.U = ocs.U;
154 }
155
156
157 #endif /* IFXGTM_H */
IfxGtm_IrqMode_level
Definition: IfxGtm.h:49
IfxGtm_IrqMode_pulse
Definition: IfxGtm.h:50
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_isModuleSuspended
IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxGtm.h:133
IfxGtm_isEnabled
IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm)
Returs the status of module enabled or disabled.
Definition: IfxGtm.h:127
IfxGtm_disable
IFX_EXTERN void IfxGtm_disable(Ifx_GTM *gtm)
Disables the module.
Definition: IfxGtm.c:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxGtm_SuspendMode_soft
Soft Suspend.
Definition: IfxGtm.h:61
IfxGtm_setSuspendMode
IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxGtm.h:145
IfxGtm_SuspendMode_none
No suspend.
Definition: IfxGtm.h:59
IfxGtm_getSysClkFrequency
IFX_EXTERN float32 IfxGtm_getSysClkFrequency(void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK...
Definition: IfxGtm.c:57
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:51
IfxGtm_SuspendMode
IfxGtm_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxGtm.h:57
IfxGtm_SuspendMode_hard
Hard Suspend.
Definition: IfxGtm.h:60
IfxGtm_enable
IFX_EXTERN void IfxGtm_enable(Ifx_GTM *gtm)
Enables the module.
Definition: IfxGtm.c:47
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_IrqMode_singlePulse
Definition: IfxGtm.h:52
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC26B: IfxGtm_Atom.c Source File

  • Gtm
  • Std
IfxGtm_Atom.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Atom.h"
30 #include "IfxGtm_bf.h"
31
32 /******************************************************************************/
33 /*----------------------------------Macros------------------------------------*/
34 /******************************************************************************/
35
36 /** \brief Number of channels per ATOM AGC
37 */
38 #define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)
39
40 /******************************************************************************/
41 /*-------------------------Function Implementations---------------------------*/
42 /******************************************************************************/
43
44 uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
45 {
46 uint8 i;
47 uint32 reg = 0;
48 uint32 mask = enableMask | (disableMask << 16);
49
50 for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
51 {
52 /* Bitfield length is 2 bits */
53 uint8 shift = (i * 2) + bitfieldOffset;
54
55 if (mask & 0x1)
56 {
57 reg |= IfxGtm_FeatureControl_enable << shift;
58 }
59
60 if (mask & 0x10000)
61 {
62 reg |= IfxGtm_FeatureControl_disable << shift;
63 }
64
65 mask = mask >> 1;
66 }
67
68 return reg;
69 }
70
71
72 uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
73 {
74 uint32 reg = 0;
75
76 /* Bitfield length is 2 bits */
77 uint8 shift = (((uint8)channel % 8) * 2) + bitfieldOffset;
78
79 if (enabled == 1)
80 {
81 reg = IfxGtm_FeatureControl_enable << shift;
82 }
83 else
84 {
85 reg = IfxGtm_FeatureControl_disable << shift;
86 }
87
88 return reg;
89 }
90
91
92 void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
93 {
94 uint32 value;
95
96 value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
97
98 if (immediate)
99 {
100 agc->ENDIS_CTRL.U = value;
101 agc->ENDIS_STAT.U = value;
102 }
103 else
104 {
105 agc->ENDIS_CTRL.U = value;
106 }
107 }
108
109
110 void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
111 {
112 uint32 value;
113
114 value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
115
116 if (immediate)
117 {
118 agc->OUTEN_CTRL.U = value;
119 agc->OUTEN_STAT.U = value;
120 }
121 else
122 {
123 agc->OUTEN_CTRL.U = value;
124 }
125 }
126
127
128 void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
129 {
130 agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
131 }
132
133
134 void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
135 {
136 uint32 value;
137
138 value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
139
140 if (immediate)
141 {
142 agc->ENDIS_CTRL.U = value;
143 agc->ENDIS_STAT.U = value;
144 }
145 else
146 {
147 agc->ENDIS_CTRL.U = value;
148 }
149 }
150
151
152 void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
153 {
154 uint32 value;
155
156 value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
157
158 if (immediate)
159 {
160 agc->OUTEN_CTRL.U = value;
161 agc->OUTEN_STAT.U = value;
162 }
163 else
164 {
165 agc->OUTEN_CTRL.U = value;
166 }
167 }
168
169
170 void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
171 {
172 agc->INT_TRIG.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_INT_TRIG_INT_TRIG0_OFF);
173 }
174
175
176 void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
177 {
178 agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
179 }
180
181
182 void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
183 {
184 agc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
185 }
186
187
188 void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
189 {
190 uint8 i;
191 uint32 reg = 0;
192
193 for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
194 {
195 if (resetMask & 0x1)
196 {
197 reg |= 1 << i;
198 }
199
200 resetMask = resetMask >> 1;
201 }
202
203 agc->GLB_CTRL.U = reg << IFX_GTM_ATOM_AGC_GLB_CTRL_RST_CH0_OFF;
204 }
205
206
207 void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
208 {
209 uint32 regEnable, regReset;
210
211 regEnable = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
212 regReset = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
213
214 agc->FUPD_CTRL.U = regEnable | (regReset << 16);
215 }
216
217
218 void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
219 {
220 uint32 regEnable, regReset;
221
222 regEnable = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
223 regReset = IfxGtm_Atom_Agc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
224 agc->FUPD_CTRL.U = regEnable | regReset;
225 }
226
227
228 void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
229 {
230 Ifx_GTM_ATOM_AGC_ACT_TB act_tb;
231
232 act_tb.U = agc->ACT_TB.U;
233 act_tb.B.TBU_SEL = base;
234 act_tb.B.ACT_TB = value;
235 agc->ACT_TB.U = act_tb.U;
236 }
237
238
239 void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
240 {
241 agc->GLB_CTRL.U = 1 << IFX_GTM_ATOM_AGC_GLB_CTRL_HOST_TRIG_OFF;
242 }
243
244
245 void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
246 {
247 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
248
249 atomCh->IRQ_NOTIFY.B.CCU1TC = 1;
250 }
251
252
253 void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
254 {
255 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
256
257 atomCh->IRQ_NOTIFY.B.CCU0TC = 1;
258 }
259
260
261 void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
262 {
263 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
264 Ifx_GTM_ATOM_CH_CTRL ctrl;
265
266 ctrl.U = 0;
267 ctrl.B.MODE = IfxGtm_Atom_Mode_outputPwm;
268
269 ctrl.B.CLK_SRC = clock;
270
271 ctrl.B.RST_CCU0 = resetEvent;
272 ctrl.B.SL = (activeState == Ifx_ActiveState_high ? 1 : 0);
273 ctrl.B.TRIGOUT = trigger;
274
275 atomCh->CTRL.U = ctrl.U;
276 }
277
278
279 float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
280 {
281 IfxGtm_Cmu_Clk clock;
282
283 clock = IfxGtm_Atom_Ch_getClockSource(atom, channel);
284
285 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
286 }
287
288
289 IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
290 {
291 IfxGtm_Cmu_Clk clock;
292 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
293 clock = (IfxGtm_Cmu_Clk)atomCh->CTRL.B.CLK_SRC;
294
295 return clock;
296 }
297
298
299 uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
300 {
301 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
302
303 return atomCh->CM1.U;
304 }
305
306
307 volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
308 {
309 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
310
311 return (volatile uint32 *)&atomCh->CM1;
312 }
313
314
315 uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
316 {
317 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
318
319 return atomCh->CM0.U;
320 }
321
322
323 volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
324 {
325 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
326
327 return (volatile uint32 *)&atomCh->CM0;
328 }
329
330
331 boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
332 {
333 boolean result;
334 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
335
336 result = atomCh->STAT.B.OL == 1;
337
338 return result;
339 }
340
341
342 volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
343 {
344 IFX_UNUSED_PARAMETER(gtm)
345 return &MODULE_SRC.GTM.GTM[0].ATOM[atom][channel / 2];
346 }
347
348
349 volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
350 {
351 return (volatile uint32 *)((uint32)&(atom->CH0.CN0.U) + channel * (offsetof(Ifx_GTM_ATOM, CH1) - offsetof(Ifx_GTM_ATOM, CH0)));
352 }
353
354
355 boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
356 {
357 boolean result;
358 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
359 result = atomCh->IRQ_NOTIFY.B.CCU1TC != 0;
360 return result;
361 }
362
363
364 boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
365 {
366 boolean result;
367 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
368 result = atomCh->IRQ_NOTIFY.B.CCU0TC != 0;
369 return result;
370 }
371
372
373 void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
374 {
375 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
376
377 atomCh->IRQ_FORCINT.B.TRG_CCU1TC = 1;
378 }
379
380
381 void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
382 {
383 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
384
385 atomCh->IRQ_FORCINT.B.TRG_CCU0TC = 1;
386 }
387
388
389 void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
390 {
391 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
392
393 atomCh->CTRL.B.CLK_SRC = clock;
394 }
395
396
397 void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
398 {
399 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
400
401 atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
402 atomCh->CM1.U = compareOne;
403 }
404
405
406 void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
407 {
408 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
409
410 atomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
411 }
412
413
414 void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
415 {
416 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
417
418 atomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
419 }
420
421
422 void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
423 {
424 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
425
426 atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
427 }
428
429
430 void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
431 {
432 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
433
434 atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
435 }
436
437
438 void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
439 {
440 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
441
442 atomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
443 }
444
445
446 void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
447 {
448 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
449
450 atomCh->CTRL.B.MODE = mode;
451 }
452
453
454 void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
455 {
456 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
457
458 Ifx_GTM_ATOM_CH_IRQ_EN en;
459 en.U = atomCh->IRQ_EN.U;
460
461 /* Disable all interrupts of the interrupt set to change mode */
462 atomCh->IRQ_EN.U = IFX_ZEROS;
463 atomCh->IRQ_MODE.B.IRQ_MODE = mode;
464 atomCh->IRQ_EN.U = en.U; /* Set the values back */
465
466 en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
467 en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
468 atomCh->IRQ_EN.U = en.U;
469 }
470
471
472 void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
473 {
474 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
475
476 atomCh->CTRL.B.OSM = enabled ? 1 : 0;
477 }
478
479
480 void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
481 {
482 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
483
484 atomCh->CTRL.B.RST_CCU0 = event;
485 }
486
487
488 void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
489 {
490 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
491
492 atomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
493 }
494
495
496 void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
497 {
498 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
499
500 atomCh->CTRL.B.TRIGOUT = trigger;
501 }
502
503
504 void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
505 {
506 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
507
508 atomCh->CTRL.B.ARU_EN = enabled;
509 }
510
511
512 uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
513 {
514 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
515
516 return atomCh->CN0.U;
517 }
518
519
520 void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
521 {
522 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
523
524 atomCh->SOMC.B.ACB42 = control;
525 }
526
527
528 void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
529 {
530 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
531
532 atomCh->SOMC.B.ACB10 = ctrl;
533 }
534
535
536 void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
537 {
538 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
539 atomCh->RDADDR.B.RDADDR0 = address;
540 }
541
542
543 void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
544 {
545 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
546 atomCh->RDADDR.B.RDADDR1 = address;
547 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:152
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxGtm_Atom_Ch_setResetSource
void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Atom.c:480
IfxGtm_Atom_Ch_ResetEvent
IfxGtm_Atom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Atom.h:66
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:218
IfxGtm_Atom_Ch_clearOneNotification
void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:245
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:454
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:49
IfxGtm_Atom_Ch_clearZeroNotification
void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:253
IfxGtm_Atom_Ch_getClockSource
IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:289
IfxGtm_Atom_Agc_buildFeature
uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:44
IfxGtm_Atom_Ch_setAruInput
void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified.
Definition: IfxGtm_Atom.c:504
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Atom_SomcSignalLevelControl
IfxGtm_Atom_SomcSignalLevelControl
SOMC signal level Control.
Definition: IfxGtm_Atom.h:108
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:261
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:192
IfxGtm_Atom_Agc_setTimeTrigger
void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Atom.c:228
IFXGTM_ATOM_NUM_AGC_CHANNELS
#define IFXGTM_ATOM_NUM_AGC_CHANNELS
Number of channels per ATOM AGC.
Definition: IfxGtm_Atom.c:38
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Atom_Agc_enableChannelsUpdate
void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Atom.c:176
IfxGtm_Atom_Ch_setCompareOne
void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:406
IfxGtm_Atom_Ch_getClockFrequency
float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:279
IfxGtm_Atom_Ch_raiseInterruptOne
void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Atom.c:373
IfxGtm_Atom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel.
Definition: IfxGtm_Atom.h:568
IfxGtm_Atom_Ch_setCounterValue
void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:438
IfxGtm_Atom_Agc_enableChannelUpdate
void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:128
IfxGtm_Atom_Ch_getCounterValue
uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value.
Definition: IfxGtm_Atom.c:512
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:228
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:342
IfxGtm_Atom_Ch_raiseInterruptZero
void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Atom.c:381
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:134
IfxGtm_Atom_Agc_buildFeatureForChannel
uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Atom.c:72
IfxGtm_Atom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:349
IfxGtm_Atom_Ch_getOutputLevel
boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level.
Definition: IfxGtm_Atom.c:331
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:74
IFX_ZEROS
#define IFX_ZEROS
Definition: Ifx_Types.h:64
IfxGtm_Atom_SomcControl
IfxGtm_Atom_SomcControl
Match Compare control modes.
Definition: IfxGtm_Atom.h:94
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:78
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:229
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Atom_Ch_setTriggerOutput
void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Atom.c:496
IfxGtm_Atom_Ch_setAruReadAddress1
void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1
Definition: IfxGtm_Atom.c:543
IfxGtm_Atom_Ch_setOneShotMode
void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:472
IfxGtm_Atom_Ch_isZeroNotification
boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:364
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:414
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:488
IfxGtm_Atom_Ch_getCompareZero
uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Atom.c:315
IfxGtm_Atom_Ch_setClockSource
void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source.
Definition: IfxGtm_Atom.c:389
IfxGtm_Atom_Ch_isOneNotification
boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:355
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Atom_Agc_setChannelForceUpdate
void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:207
IfxGtm_Atom_Ch_OutputTrigger
IfxGtm_Atom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Atom.h:58
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:430
IfxGtm_Atom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:307
IfxGtm_Atom_Ch_getCompareOne
uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:299
IfxGtm_Atom_Ch_setCompare
void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Atom.c:397
IfxGtm_Atom_Ch_setAruReadAddress0
void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0
Definition: IfxGtm_Atom.c:536
IfxGtm_Atom_Agc_enableChannelsTrigger
void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Atom.c:170
IfxGtm_Atom_Ch_setMode
void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:446
IfxGtm_Atom_Agc_resetChannels
void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Atom.c:188
IfxGtm_Atom_Ch_setCompareZero
void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:422
IfxGtm_Atom_Ch_getCompareZeroPointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Atom.c:323
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:239
IfxGtm_Atom.h
GTM basic functionality.
IfxGtm_Atom_Agc_enableTimeTrigger
void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Atom.c:182
TRUE
#define TRUE
Definition: Platform_Types.h:87
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxGtm_Atom_Agc_enableChannelOutput
void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:110
IfxGtm_Atom_Ch_setSomcSignalLevelControl
void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode.
Definition: IfxGtm_Atom.c:528
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:47
IfxGtm_Atom_Agc_enableChannel
void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:92
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202
IfxGtm_Atom_Ch_setSomcControl
void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel
Definition: IfxGtm_Atom.c:520


iLLD_TC26B: IfxGtm_Atom.h Source File

  • Gtm
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IfxGtm_Atom.h
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1 /**
2 * \file IfxGtm_Atom.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 *
26 * \defgroup IfxLld_Gtm_Std_Atom Atom Basic Functionality
27 * \ingroup IfxLld_Gtm_Std
28 * \defgroup IfxLld_Gtm_Std_Atom_Enumerations ATOM Enumerations
29 * \ingroup IfxLld_Gtm_Std_Atom
30 * \defgroup IfxLld_Gtm_Std_Atom_Channel_Functions ATOM Channel Functions
31 * \ingroup IfxLld_Gtm_Std_Atom
32 * \defgroup IfxLld_Gtm_Std_Atom_AGC_Functions ATOM AGC Functions
33 * \ingroup IfxLld_Gtm_Std_Atom
34 */
35
36 #ifndef IFXGTM_ATOM_H
37 #define IFXGTM_ATOM_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "_Impl/IfxGtm_cfg.h"
44 #include "IfxGtm.h"
45 #include "IfxGtm_Tbu.h"
46 #include "Src/Std/IfxSrc.h"
47 #include "IfxGtm_Cmu.h"
48 #include "stddef.h"
49
50 /******************************************************************************/
51 /*--------------------------------Enumerations--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_Gtm_Std_Atom_Enumerations
55 * \{ */
56 /** \brief Reset source for channel counter CN0
57 */
58 typedef enum
59 {
60 IfxGtm_Atom_Ch_OutputTrigger_forward = 0, /**< \brief Forward the trigger from the previous channel */
61 IfxGtm_Atom_Ch_OutputTrigger_generate = 1 /**< \brief Generate the trigger from the current channel */
62 } IfxGtm_Atom_Ch_OutputTrigger;
63
64 /** \brief Reset event for channel counter CN0
65 */
66 typedef enum
67 {
68 IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
69 IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
70 } IfxGtm_Atom_Ch_ResetEvent;
71
72 /** \brief Enum for ATOM mode
73 */
74 typedef enum
75 {
76 IfxGtm_Atom_Mode_outputImmediate,
77 IfxGtm_Atom_Mode_outputCompare,
78 IfxGtm_Atom_Mode_outputPwm,
79 IfxGtm_Atom_Mode_outputSerial
80 } IfxGtm_Atom_Mode;
81
82 /** \} */
83
84 /** \brief Enable/disable of Aru Input to ATOM channel
85 */
86 typedef enum
87 {
88 IfxGtm_Atom_AruInput_disabled = 0, /**< \brief ARU input disabled */
89 IfxGtm_Atom_AruInput_enabled = 1 /**< \brief ARU input enabled */
90 } IfxGtm_Atom_AruInput;
91
92 /** \brief Match Compare control modes
93 */
94 typedef enum
95 {
96 IfxGtm_Atom_SomcControl_compareBoth = 0, /**< \brief compare CCU0 and CCU1 in parallel */
97 IfxGtm_Atom_SomcControl_compareBoth1 = 1, /**< \brief compare CCU0 and CCU1 in parallel */
98 IfxGtm_Atom_SomcControl_ccu0Ts0 = 2, /**< \brief compare CCU0 against TS0 */
99 IfxGtm_Atom_SomcControl_ccu1Ts12 = 3, /**< \brief compare only CCU1 against TS1 or TS2 */
100 IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 = 4, /**< \brief compare CCU0 then CCU1, use TS0 */
101 IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 = 5, /**< \brief compare CCU0 then CCU1. Use TS1 or TS2 */
102 IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 = 6, /**< \brief compare CCU0 with TS0 then CCU1 with TS1 or TS2 */
103 IfxGtm_Atom_SomcControl_cancelCompare = 7 /**< \brief Cancel pending compare events */
104 } IfxGtm_Atom_SomcControl;
105
106 /** \brief SOMC signal level Control
107 */
108 typedef enum
109 {
110 IfxGtm_Atom_SomcSignalLevelControl_noChange = 0, /**< \brief no signal level change at output */
111 IfxGtm_Atom_SomcSignalLevelControl_sl0out1 = 1, /**< \brief SL= 0 -> Out=1; SL=1->Out=0 */
112 IfxGtm_Atom_SomcSignalLevelControl_sl0out0 = 2, /**< \brief SL=0->Out=0; SL=1->Out=1 */
113 IfxGtm_Atom_SomcSignalLevelControl_toggle = 3 /**< \brief toggle the output signal level */
114 } IfxGtm_Atom_SomcSignalLevelControl;
115
116 /** \addtogroup IfxLld_Gtm_Std_Atom_Channel_Functions
117 * \{ */
118
119 /******************************************************************************/
120 /*-------------------------Inline Function Prototypes-------------------------*/
121 /******************************************************************************/
122
123 /** \brief Returns the base addredd of selected Atom channel
124 * \param atom Pointer to the ATOM object
125 * \param channel Channel index
126 * \return Pointer to channel base address
127 */
128 IFX_INLINE Ifx_GTM_ATOM_CH *IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
129
130 /** \brief Sets the compare 0 and 1 shadow values
131 * \param atom Pointer to the ATOM object
132 * \param channel Channel index
133 * \param shadowZero Compare zero shadow value
134 * \param shadowOne Compare one shadow value
135 * \return None
136 */
137 IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne);
138
139 /******************************************************************************/
140 /*-------------------------Global Function Prototypes-------------------------*/
141 /******************************************************************************/
142
143 /** \brief Clears the channel One notification
144 * \param atom Pointer to the ATOM object
145 * \param channel Channel index
146 * \return None
147 */
148 IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
149
150 /** \brief Clears the channel Zero notification
151 * \param atom Pointer to the ATOM object
152 * \param channel Channel index
153 * \return None
154 */
155 IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
156
157 /** \brief
158 * \param atom Pointer to the ATOM object
159 * \param channel Channel index
160 * \param clock Clock source
161 * \param activeState Active State
162 * \param resetEvent Channel reset event
163 * \param trigger Channel trigger output mode
164 * \return None
165 */
166 IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger);
167
168 /** \brief Returns the ATOM channel input clock frequency in Hz
169 * \param gtm Pointer to GTM module
170 * \param atom Pointer to the ATOM object
171 * \param channel Channel index
172 * \return ATOM channel input clock frequency in Hz
173 */
174 IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
175
176 /** \brief Returns the channel clock source
177 * \param atom Pointer to the ATOM object
178 * \param channel Channel index
179 * \return The clock source
180 */
181 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
182
183 /** \brief Returns the compare one value
184 * \param atom Pointer to the ATOM object
185 * \param channel Channel index
186 * \return compare one value
187 */
188 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
189
190 /** \brief Returns the compare one pointer
191 * \param atom Pointer to the ATOM object
192 * \param channel Channel index
193 * \return compare one pointer
194 */
195 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
196
197 /** \brief Returns the compare zero value
198 * \param atom Pointer to the ATOM object
199 * \param channel Channel index
200 * \return compare zero value
201 */
202 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
203
204 /** \brief Returns the compare zero pointer
205 * \param atom Pointer to the ATOM object
206 * \param channel Channel index
207 * \return compare zero pointer
208 */
209 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
210
211 /** \brief Gets the ATOM output level
212 * \param atom Pointer to the ATOM object
213 * \param channel Channel index
214 * \return TRUE the output is high, FALSE the output is low
215 */
216 IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
217
218 /** \brief Returns a pointer to the ATOM channel SRC
219 * \param gtm Pointer to GTM module
220 * \param atom Specifies the atom object
221 * \param channel Channel index
222 * \return Pointer to the TOM channel SRC
223 */
224 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel);
225
226 /** \brief Returns the Timer pointer
227 * \param atom Pointer to the ATOM object
228 * \param channel Channel index
229 * \return Timer pointer
230 */
231 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
232
233 /** \brief Returns the status of channel One notification
234 * \param atom Pointer to the ATOM object
235 * \param channel Channel index
236 * \return Status of channel One notification
237 */
238 IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
239
240 /** \brief Returns the status of channel Zero notification
241 * \param atom Pointer to the ATOM object
242 * \param channel Channel index
243 * \return Status of channel Zero notification
244 */
245 IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
246
247 /** \brief Raises the interrupt for Compare 1
248 * \param atom Pointer to the ATOM object
249 * \param channel Channel index
250 * \return None
251 */
252 IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
253
254 /** \brief Raises the interrupt for Compare 0
255 * \param atom Pointer to the ATOM object
256 * \param channel Channel index
257 * \return None
258 */
259 IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
260
261 /** \brief Sets the channel clock source
262 * \param atom Pointer to the ATOM object
263 * \param channel Channel index
264 * \param clock Channel clock source
265 * \return None
266 */
267 IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock);
268
269 /** \brief Sets the compare 0 and 1 values
270 * \param atom Pointer to the ATOM object
271 * \param channel Channel index
272 * \param compareZero Compare zero value
273 * \param compareOne Compare one value
274 * \return None
275 */
276 IFX_EXTERN void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne);
277
278 /** \brief Sets the compare 1 value
279 * \param atom Pointer to the ATOM object
280 * \param channel Channel index
281 * \param compareOne Compare one value
282 * \return None
283 */
284 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne);
285
286 /** \brief Sets the compare 1 shadow value
287 * \param atom Pointer to the ATOM object
288 * \param channel Channel index
289 * \param shadowOne Compare one shadow value
290 * \return None
291 */
292 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne);
293
294 /** \brief Sets the compare 0 value
295 * \param atom Pointer to the ATOM object
296 * \param channel Channel index
297 * \param compareZero Compare zero value
298 * \return None
299 */
300 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero);
301
302 /** \brief Sets the compare 0 shadow value
303 * \param atom Pointer to the ATOM object
304 * \param channel Channel index
305 * \param shadowZero Compare zero shadow value
306 * \return None
307 */
308 IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero);
309
310 /** \brief Sets the counter value
311 * \param atom Pointer to the ATOM object
312 * \param channel Channel index
313 * \param value Counter value
314 * \return None
315 */
316 IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value);
317
318 /** \brief set the Atom operating mode
319 * \param atom Pointer to the ATOM object
320 * \param channel Channel index
321 * \param mode Atom operating mode
322 * \return None
323 */
324 IFX_EXTERN void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode);
325
326 /** \brief Sets the channel notification
327 * \param atom Pointer to the ATOM object
328 * \param channel Channel index
329 * \param mode Interrupt mode
330 * \param interruptOnCompareZero If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
331 * \param interruptOnCompareOne If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
332 * \return None
333 */
334 IFX_EXTERN void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne);
335
336 /** \brief Enable/disable the one shot mode
337 * \param atom Pointer to the ATOM object
338 * \param channel Channel index
339 * \param enabled If TRUE, the feature is enabled, else disabled
340 * \return None
341 */
342 IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled);
343
344 /** \brief Sets the channel clock source either from local or from previous channel
345 * \param atom Pointer to the ATOM object
346 * \param channel Channel index
347 * \param event Channel reset event
348 * \return None
349 */
350 IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event);
351
352 /** \brief Sets the signal level
353 * \param atom Pointer to the ATOM object
354 * \param channel Channel index
355 * \param activeState Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
356 * \return None
357 */
358 IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState);
359
360 /** \brief Sets the channel trigger output
361 * \param atom Pointer to the ATOM object
362 * \param channel Channel index
363 * \param trigger Channel trigger output mode
364 * \return None
365 */
366 IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger);
367
368 /** \brief Get the counter value
369 * \param atom pointer to the ATOM instance
370 * \param channel channel index of the ATOM
371 * \return counter value
372 */
373 IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
374
375 /** \} */
376
377 /** \addtogroup IfxLld_Gtm_Std_Atom_AGC_Functions
378 * \{ */
379
380 /******************************************************************************/
381 /*-------------------------Inline Function Prototypes-------------------------*/
382 /******************************************************************************/
383
384 /** \brief Sets the channels for update (UPEN)
385 * \param agc Pointer to the AGC object
386 * \param value value for the channel enable (bit 0: Channel 0, bit 1: channel 1, ...)
387 * \return None
388 */
389 IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value);
390
391 /******************************************************************************/
392 /*-------------------------Global Function Prototypes-------------------------*/
393 /******************************************************************************/
394
395 /** \brief Builds the register value for the feature enable/disable
396 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
397 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
398 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
399 * \return The register value
400 */
401 IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
402
403 /** \brief Builds the register value for the feature enable/disable for a single channel
404 * \param channel Channel index
405 * \param enabled Enable/ Disable choise of the feature
406 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
407 * \return The register value
408 */
409 IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset);
410
411 /** \brief Enable/disable one channel (ENDIS)
412 * \param agc Pointer to the AGC object
413 * \param channel Channel index
414 * \param enabled Enable/ Disable choise of the feature
415 * \param immediate If TRUE, the action is done immediately else, the action is done on AGC trigger (CTRL_TRIG)
416 * \return None
417 */
418 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate);
419
420 /** \brief Enable/disable one channel output (OUTEN)
421 * \param agc Pointer to the AGC object
422 * \param channel Channel index
423 * \param enabled Enable/ Disable choise of the feature
424 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
425 * \return None
426 */
427 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate);
428
429 /** \brief Enable/disable one channel for update (UPEN)
430 * \param agc Pointer to the AGC object
431 * \param channel Channel index
432 * \param enabled Enable/ Disable choise of the feature
433 * \return None
434 */
435 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled);
436
437 /** \brief Enable/disable one or more channels (ENDIS)
438 * \param agc Pointer to the AGC object
439 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
440 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
441 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
442 * \return None
443 */
444 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate);
445
446 /** \brief Enable/disable one or more channels output (OUTEN)
447 * \param agc Pointer to the TGC object
448 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
449 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
450 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
451 * \return None
452 */
453 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate);
454
455 /** \brief Enable/disable the TGC channels trigger
456 * \param agc Pointer to the AGC object
457 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
458 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
459 * \return None
460 */
461 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask);
462
463 /** \brief Enable/disable one or more channels for update (UPEN)
464 * \param agc Pointer to the AGC object
465 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
466 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
467 * \return None
468 */
469 IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask);
470
471 /** \brief Enable/disable the time base trigger
472 * \param agc Pointer to the AGC object
473 * \param enabled If TRUE, the trigger is enabled else disabled
474 * \return None
475 */
476 IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled);
477
478 /** \brief Reset one or more channels
479 * \param agc Pointer to the AGC object
480 * \param resetMask Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
481 * \return None
482 */
483 IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask);
484
485 /** \brief Enable/disable one channel for update (FUPD)
486 * \param agc Pointer to the AGC object
487 * \param channel Channel index
488 * \param enabled Enable/ Disable choise of the feature
489 * \param resetEnabled Enable/ Disable reset choise of the feature
490 * \return None
491 */
492 IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled);
493
494 /** \brief Enable/disable one or more channels for the force update feature (FUPD)
495 * \param agc Pointer to the AGC object
496 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
497 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
498 * \param resetEnableMask Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
499 * \param resetDisableMask Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
500 * \return None
501 */
502 IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask);
503
504 /** \brief Sets the trigger time base and time base value
505 * \param agc Pointer to the AGC object
506 * \param base Time base used for comparison
507 * \param value Compare value that raise the trigger
508 * \return None
509 */
510 IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value);
511
512 /** \brief Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
513 * \param agc Pointer to the AGC object
514 * \return None
515 */
516 IFX_EXTERN void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc);
517
518 /** \} */
519
520 /******************************************************************************/
521 /*-------------------------Global Function Prototypes-------------------------*/
522 /******************************************************************************/
523
524 /** \brief enable/disable ARU input for the ATOM channel specified.
525 * \param atom pointer to the ATOM instance
526 * \param channel index of ATOM channel
527 * \param enabled ARU enable status
528 * \return None
529 */
530 IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled);
531
532 /** \brief sets the SOMC control bits for the specified ATOM channel
533 * \param atom pointer to ATOM instance
534 * \param channel ATOM channel index
535 * \param control SOMC control mode enum
536 * \return None
537 */
538 IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control);
539
540 /** \brief sets the SL control for SOMC mode.
541 * \param atom pointer to the ATOM instance
542 * \param channel index of ATOM channel
543 * \param ctrl SIgnal level control
544 * \return None
545 */
546 IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl);
547
548 /** \brief set the ARU read address 0
549 * \param atom pointer to ATOM instance
550 * \param channel ATOM channel index
551 * \param address ARU read address 0
552 * \return None
553 */
554 IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address);
555
556 /** \brief set the ARU read address 1
557 * \param atom pointer to ATOM instance
558 * \param channel ATOM channel index
559 * \param address ARU read address 1
560 * \return None
561 */
562 IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address);
563
564 /******************************************************************************/
565 /*---------------------Inline Function Implementations------------------------*/
566 /******************************************************************************/
567
568 IFX_INLINE Ifx_GTM_ATOM_CH *IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
569 {
570 return (Ifx_GTM_ATOM_CH *)((uint32)&atom->CH0.RDADDR.U + 0x80 * channel);
571 }
572
573
574 IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
575 {
576 Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
577
578 atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
579 atomCh->SR1.U = shadowOne;
580 }
581
582
583 IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
584 {
585 agc->GLB_CTRL.U = value;
586 }
587
588
589 #endif /* IFXGTM_ATOM_H */
IfxGtm_Atom_Agc_enableChannelsOutput
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:152
IfxGtm_Atom_Ch_setResetSource
IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Atom.c:480
IfxGtm_Atom_Ch_ResetEvent
IfxGtm_Atom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Atom.h:66
IfxGtm_Atom_SomcControl_ccu0ccu1Ts0
compare CCU0 then CCU1, use TS0
Definition: IfxGtm_Atom.h:100
IfxGtm_Atom_Agc_setChannelsForceUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:218
IfxGtm_Atom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Atom.h:68
IfxGtm_Atom_Ch_clearOneNotification
IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:245
IfxGtm_Atom_AruInput_disabled
ARU input disabled.
Definition: IfxGtm_Atom.h:88
IfxGtm_Atom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Atom.h:61
IfxGtm_Atom_Ch_setNotification
IFX_EXTERN void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:454
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:49
IfxGtm_Atom_Ch_clearZeroNotification
IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:253
IfxGtm_Atom_Ch_getClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:289
IfxGtm_Atom_Agc_buildFeature
IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:44
IfxGtm_Atom_Ch_setAruReadAddress0
IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 0
Definition: IfxGtm_Atom.c:536
IfxGtm_Atom_SomcControl_ccu1Ts12
compare only CCU1 against TS1 or TS2
Definition: IfxGtm_Atom.h:99
IfxGtm_Atom_SomcControl_ccu0ccu1Ts12
compare CCU0 then CCU1. Use TS1 or TS2
Definition: IfxGtm_Atom.h:101
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Atom_SomcSignalLevelControl
IfxGtm_Atom_SomcSignalLevelControl
SOMC signal level Control.
Definition: IfxGtm_Atom.h:108
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Atom_Ch_configurePwmMode
IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:261
IfxGtm_Atom_Agc_setChannelsUpdate
IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN)
Definition: IfxGtm_Atom.h:583
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:192
IfxGtm_Atom_Agc_setTimeTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Atom.c:228
IfxSrc.h
SRC basic functionality.
IfxGtm_Atom_Mode_outputSerial
Definition: IfxGtm_Atom.h:79
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Atom_Agc_enableChannelsUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Atom.c:176
IfxGtm_Atom_Ch_setCompareOne
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:406
IfxGtm_Atom_Ch_getClockFrequency
IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:279
IfxGtm_Atom_Ch_raiseInterruptOne
IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Atom.c:373
IfxGtm_Atom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_ATOM_CH * IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the base addredd of selected Atom channel.
Definition: IfxGtm_Atom.h:568
IfxGtm_Atom_Ch_setCompareShadow
IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Atom.h:574
IfxGtm_Atom_Ch_setCounterValue
IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:438
IfxGtm_Atom_Ch_setSomcSignalLevelControl
IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
sets the SL control for SOMC mode.
Definition: IfxGtm_Atom.c:528
IfxGtm_Atom_Agc_enableChannelUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:128
IfxGtm_Atom_SomcSignalLevelControl_noChange
no signal level change at output
Definition: IfxGtm_Atom.h:110
IfxGtm_Atom_SomcSignalLevelControl_sl0out0
SL=0->Out=0; SL=1->Out=1.
Definition: IfxGtm_Atom.h:112
IfxGtm_Atom_Ch_getCounterValue
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Get the counter value.
Definition: IfxGtm_Atom.c:512
IfxGtm_Atom_Mode_outputCompare
Definition: IfxGtm_Atom.h:77
IfxGtm_Atom_Ch_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:342
IfxGtm_Atom_Ch_raiseInterruptZero
IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Atom.c:381
IfxGtm_Atom_Agc_enableChannels
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:134
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Atom_Agc_buildFeatureForChannel
IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Atom.c:72
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxGtm_Atom_SomcSignalLevelControl_toggle
toggle the output signal level
Definition: IfxGtm_Atom.h:113
IfxGtm_Atom_Ch_getTimerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:349
IfxGtm_Atom_Ch_getOutputLevel
IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Gets the ATOM output level.
Definition: IfxGtm_Atom.c:331
IfxGtm_Atom_SomcControl_ccu0Ts0
compare CCU0 against TS0
Definition: IfxGtm_Atom.h:98
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:60
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:69
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:74
IfxGtm_Atom_SomcControl
IfxGtm_Atom_SomcControl
Match Compare control modes.
Definition: IfxGtm_Atom.h:94
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:78
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Atom_Ch_setTriggerOutput
IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Atom.c:496
IfxGtm_Atom_Ch_setOneShotMode
IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:472
IfxGtm_Atom_Ch_setAruInput
IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
enable/disable ARU input for the ATOM channel specified.
Definition: IfxGtm_Atom.c:504
IfxGtm_Atom_AruInput
IfxGtm_Atom_AruInput
Enable/disable of Aru Input to ATOM channel.
Definition: IfxGtm_Atom.h:86
IfxGtm_Atom_Ch_isZeroNotification
IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:364
IfxGtm_Atom_SomcControl_compareBoth1
compare CCU0 and CCU1 in parallel
Definition: IfxGtm_Atom.h:97
IfxGtm_Atom_Ch_setCompareOneShadow
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:414
IfxGtm_Atom_Ch_setSignalLevel
IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:488
IfxGtm_Atom_Ch_setAruReadAddress1
IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
set the ARU read address 1
Definition: IfxGtm_Atom.c:543
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Atom_Ch_getCompareZero
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Atom.c:315
IfxGtm_Atom_Ch_setClockSource
IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
Sets the channel clock source.
Definition: IfxGtm_Atom.c:389
IfxGtm_Atom_Ch_isOneNotification
IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:355
IfxGtm_Atom_SomcSignalLevelControl_sl0out1
SL= 0 -> Out=1; SL=1->Out=0.
Definition: IfxGtm_Atom.h:111
IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12
compare CCU0 with TS0 then CCU1 with TS1 or TS2
Definition: IfxGtm_Atom.h:102
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Atom_Agc_setChannelForceUpdate
IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:207
IfxGtm_Atom_Ch_OutputTrigger
IfxGtm_Atom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Atom.h:58
IfxGtm_Atom_Ch_setCompareZeroShadow
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:430
IfxGtm_Atom_Ch_getCompareOnePointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:307
IfxGtm_Atom_Ch_getCompareOne
IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:299
IfxGtm_Atom_Ch_setCompare
IFX_EXTERN void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Atom.c:397
IfxGtm_Atom_Ch_setSomcControl
IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
sets the SOMC control bits for the specified ATOM channel
Definition: IfxGtm_Atom.c:520
IfxGtm_Atom_AruInput_enabled
ARU input enabled.
Definition: IfxGtm_Atom.h:89
IfxGtm_Atom_Agc_enableChannelsTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Atom.c:170
IfxGtm_Atom_SomcControl_cancelCompare
Cancel pending compare events.
Definition: IfxGtm_Atom.h:103
IfxGtm_Atom_Ch_setMode
IFX_EXTERN void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:446
IfxGtm_Atom_Agc_resetChannels
IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Atom.c:188
IfxGtm_Atom_Ch_setCompareZero
IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:422
IfxGtm_Atom_Ch_getCompareZeroPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Atom.c:323
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Agc_trigger
IFX_EXTERN void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:239
IfxGtm_Atom_Agc_enableTimeTrigger
IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Atom.c:182
IfxGtm_Atom_Agc_enableChannelOutput
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:110
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm.h
GTM basic functionality.
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Atom_SomcControl_compareBoth
compare CCU0 and CCU1 in parallel
Definition: IfxGtm_Atom.h:96
IfxGtm_Atom_Agc_enableChannel
IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:92
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202
IfxGtm_Atom_Mode_outputImmediate
Definition: IfxGtm_Atom.h:76


iLLD_TC26B: IfxGtm_Atom_Pwm.c Source File

  • Gtm
  • Atom
  • Pwm
IfxGtm_Atom_Pwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Pwm.c
3 * \brief GTM PWM details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Atom_Pwm.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
36 {
37 boolean result = TRUE;
38
39 driver->gtm = config->gtm;
40 driver->atomIndex = config->atom;
41
42 Ifx_GTM_ATOM *atomSFR = &config->gtm->ATOM[config->atom];
43 driver->atom = atomSFR;
44 driver->atomChannel = config->atomChannel;
45 Ifx_GTM_ATOM_AGC *agc = &atomSFR->AGC;
46 driver->agc = agc;
47
48 /* Initialize the timer part */
49 if (config->synchronousUpdateEnabled == 1)
50 {
51 IfxGtm_Atom_Agc_enableChannelUpdate(agc, config->atomChannel, TRUE);
52 }
53
54 IfxGtm_Atom_Agc_setChannelForceUpdate(agc, config->atomChannel, TRUE, TRUE);
55
56 IfxGtm_Atom_Ch_setSignalLevel(atomSFR, config->atomChannel, config->signalLevel);
57
58 IfxGtm_Atom_Ch_setMode(atomSFR, config->atomChannel, config->mode);
59
60 if (config->pin.outputPin != NULL_PTR)
61 {
62 IfxGtm_PinMap_setAtomTout(config->pin.outputPin, config->pin.outputMode, config->pin.padDriver);
63 }
64
65 // enable and initialise interrupts if chosen
66 if ((config->interrupt.ccu0Enabled == 1) || (config->interrupt.ccu1Enabled == 1))
67 {
68 IfxGtm_Atom_Ch_setNotification(atomSFR, config->atomChannel, config->interrupt.mode, config->interrupt.ccu0Enabled, config->interrupt.ccu1Enabled);
69
70 volatile Ifx_SRC_SRCR *src;
71 src = IfxGtm_Atom_Ch_getSrcPointer(config->gtm, config->atom, config->atomChannel);
72 IfxSrc_init(src, config->interrupt.isrProvider, config->interrupt.isrPriority);
73 IfxSrc_enable(src);
74 }
75
76 if (config->synchronousUpdateEnabled == 1)
77 {
78 IfxGtm_Atom_Ch_setCompareZeroShadow(atomSFR, config->atomChannel, config->period);
79 IfxGtm_Atom_Ch_setCompareOneShadow(atomSFR, config->atomChannel, config->dutyCycle);
80 }
81 else
82 {
83 IfxGtm_Atom_Ch_setCompareZero(atomSFR, config->atomChannel, config->period);
84 IfxGtm_Atom_Ch_setCompareOne(atomSFR, config->atomChannel, config->dutyCycle);
85 }
86
87 IfxGtm_Atom_Agc_enableChannel(agc, config->atomChannel, TRUE, FALSE);
88 IfxGtm_Atom_Agc_enableChannelOutput(agc, config->atomChannel, TRUE, FALSE);
89
90 if (config->immediateStartEnabled == TRUE)
91 {
92 IfxGtm_Atom_Agc_trigger(driver->agc);
93 }
94
95 return result;
96 }
97
98
99 void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
100 {
101 config->gtm = gtm;
102 config->atom = IfxGtm_Atom_0;
103 config->atomChannel = IfxGtm_Atom_Ch_0;
104 config->period = 20;
105 config->dutyCycle = 10;
106 config->signalLevel = Ifx_ActiveState_high;
107 config->mode = IfxGtm_Atom_Mode_outputPwm;
108 config->oneShotModeEnabled = FALSE;
109 config->synchronousUpdateEnabled = FALSE;
110 config->immediateStartEnabled = TRUE;
111 config->interrupt.ccu0Enabled = FALSE;
112 config->interrupt.ccu1Enabled = FALSE;
113 config->interrupt.mode = IfxGtm_IrqMode_pulseNotify;
114 config->interrupt.isrProvider = IfxSrc_Tos_cpu0;
115 config->interrupt.isrPriority = 0;
116 config->pin.outputPin = NULL_PTR;
117 config->pin.outputMode = IfxPort_OutputMode_pushPull;
118 config->pin.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
119 }
120
121
122 void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
123 {
124 /* Enable channel if not enabled already */
125 IfxGtm_Atom_Agc_enableChannel(driver->agc, driver->atomChannel, TRUE, immediate);
126 IfxGtm_Atom_Agc_enableChannelOutput(driver->agc, driver->atomChannel, TRUE, immediate);
127
128 /* Trigger the start now */
129 IfxGtm_Atom_Agc_trigger(driver->agc);
130 }
131
132
133 void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
134 {
135 /* Disable channels */
136 IfxGtm_Atom_Agc_enableChannel(driver->agc, driver->atomChannel, FALSE, immediate);
137 IfxGtm_Atom_Agc_enableChannelOutput(driver->agc, driver->atomChannel, FALSE, immediate);
138
139 /* Trigger the stop now */
140 IfxGtm_Atom_Agc_trigger(driver->agc);
141 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxGtm_Atom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable immediate start after init
Definition: IfxGtm_Atom_Pwm.h:154
IfxGtm_Atom_Pwm.h
GTM PWM details.
IfxGtm_Atom_Pwm_Config::mode
IfxGtm_Atom_Mode mode
Atom mode of operation.
Definition: IfxGtm_Atom_Pwm.h:148
IfxGtm_Atom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Atom_Pwm.h:152
IfxGtm_Atom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:121
IfxGtm_Atom_Pwm_pin::outputPin
IfxGtm_Atom_ToutMap * outputPin
output pin
Definition: IfxGtm_Atom_Pwm.h:132
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:454
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:205
IfxGtm_Atom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Atom_Pwm.h:149
IfxGtm_Atom_Pwm_Driver::atomIndex
IfxGtm_Atom atomIndex
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:164
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxGtm_Atom_Pwm_Config::interrupt
IfxGtm_Atom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Atom_Pwm.h:155
IfxGtm_Atom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Atom_Pwm.h:151
IfxGtm_Atom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Atom_Pwm.h:150
IfxGtm_Atom_Pwm_Driver::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Atom_Pwm.h:163
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxGtm_Atom_Ch_setCompareOne
void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Atom.c:406
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Atom_Agc_enableChannelUpdate
void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Atom.c:128
IfxGtm_Atom_Pwm_stop
void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:133
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:342
IfxGtm_Atom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Atom_Pwm.h:123
IfxGtm_Atom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:122
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxGtm_Atom_Pwm_start
void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:122
IfxGtm_Atom_Pwm_Config::pin
IfxGtm_Atom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:156
IfxGtm_Atom_Mode_outputPwm
Definition: IfxGtm_Atom.h:78
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxGtm_Atom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Atom_Pwm.h:153
IfxGtm_Atom_Pwm_Driver::atomChannel
IfxGtm_Atom_Ch atomChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Pwm.h:165
IfxGtm_Atom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Atom_Pwm.h:143
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:414
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:51
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:488
IfxGtm_Atom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Atom_Pwm.h:134
IfxGtm_Atom_Pwm_Driver::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Pwm.h:167
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:194
IfxGtm_Atom_Pwm_Config::atom
IfxGtm_Atom atom
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:146
IfxGtm_Atom_Agc_setChannelForceUpdate
void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Atom.c:207
IfxGtm_Atom_Pwm_Driver::atom
Ifx_GTM_ATOM * atom
Pointer to the ATOM object.
Definition: IfxGtm_Atom_Pwm.h:166
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:430
IfxGtm_Atom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Atom_Pwm.h:161
IfxGtm_Atom_Ch_setMode
void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
set the Atom operating mode
Definition: IfxGtm_Atom.c:446
IfxGtm_Atom_Ch_setCompareZero
void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Atom.c:422
IfxGtm_Atom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:124
IfxGtm_Atom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Atom_Pwm.h:133
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:239
IfxGtm_Atom_Pwm_initConfig
void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Pwm.c:99
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Atom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:125
IfxGtm_Atom_Agc_enableChannelOutput
void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Atom.c:110
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxGtm_Atom_Agc_enableChannel
void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Atom.c:92
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:701
IfxGtm_Atom_Pwm_init
boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Atom_Pwm.c:35


iLLD_TC26B: IfxGtm_Atom_Pwm.h Source File

  • Gtm
  • Atom
  • Pwm
IfxGtm_Atom_Pwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Pwm.h
3 * \brief GTM PWM details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Atom_Pwm_Usage How to use the GTM ATOM PWM Driver
25 * \ingroup IfxLld_Gtm_Atom_Pwm
26 *
27 * This interface allows to generate simple PWM signal on a ATOM out put and can generate interrupts if enabled.
28 * this output can also be routed to port pin if required.
29 *
30 * \section Preparation Preparation
31 * \subsection Include Include Files
32 *
33 * Include following header file into your C code:
34 * \code
35 * #include <Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h>
36 * \endcode
37 *
38 * \subsection Variables Variables
39 * define global variables if necessary
40 *
41 * \code
42 * Ifx_GTM *gtm = &MODULE_GTM;
43 * #define ATOM0_CH0_PRIO 20
44 * \endcode
45 *
46 * \subsection Interrupts Interrupts
47 * define Interrupts if needed
48 *
49 * \code
50 * IFX_INTERRUPT(ATOM0Ch0_ISR, 0, ATOM0_CH0_PRIO)
51 * {}
52 * \endcode
53 *
54 * \subsection Initialization Initialization
55 *
56 * \code
57 * // install interrupt handlers
58 * IfxCpu_Irq_installInterruptHandler (ATOM0Ch0_ISR, ATOM0_CH0_PRIO);
59 *
60 * // enable GTM clock
61 * {
62 * float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
63 * // Enables the GTM
64 * IfxGtm_enable(gtm);
65 * // Set the global clock frequency to the max
66 * IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
67 * // Set the CMU CLK0
68 * IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
69 * // FXCLK: used by TOM and CLK0: used by ATOM
70 * IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
71 * }
72 *
73 * // initialise ATOM
74 * IfxGtm_Atom_Pwm_Config atomConfig; \\configuration structure
75 * IfxGtm_Atom_Pwm_Driver atomHandle; \\ handle
76 *
77 * IfxGtm_Atom_Pwm_initConfig(&atomConfig, gtm);
78 *
79 * atomConfig.tomChannel = IfxGtm_Tom_Ch_0;
80 * atomConfig.period = 20;
81 * atomConfig.dutyCycle = 10;
82 * atomConfig.interrupt.ccu0Enabled = TRUE;
83 * atomConfig.interrupt.isrPriority = ATOM0_CH0_PRIO;
84 * atomConfig.pin.outputPin = &IfxGtm_ATOM0_0_TOUT0_P02_0_OUT;
85 *
86 * IfxGtm_Atom_Pwm_init(&atomHandle, &atomConfig);
87 * \endcode
88 *
89 * ATOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.
90 *
91 * \defgroup IfxLld_Gtm_Atom_Pwm ATOM PWM Interface Driver
92 * \ingroup IfxLld_Gtm_Atom
93 * \defgroup IfxLld_Gtm_Atom_Pwm_DataStructures ATOM PWM DataStructures
94 * \ingroup IfxLld_Gtm_Atom_Pwm
95 * \defgroup IfxLld_Gtm_Atom_Pwm_Pwm_Functions Pwm Functions
96 * \ingroup IfxLld_Gtm_Atom_Pwm
97 */
98
99 #ifndef IFXGTM_ATOM_PWM_H
100 #define IFXGTM_ATOM_PWM_H 1
101
102 /******************************************************************************/
103 /*----------------------------------Includes----------------------------------*/
104 /******************************************************************************/
105
106 #include "_PinMap/IfxGtm_PinMap.h"
107 #include "Gtm/Std/IfxGtm_Atom.h"
108 #include "Gtm/Std/IfxGtm_Cmu.h"
109 #include "Cpu/Std/IfxCpu.h"
110
111 /******************************************************************************/
112 /*-----------------------------Data Structures--------------------------------*/
113 /******************************************************************************/
114
115 /** \addtogroup IfxLld_Gtm_Atom_Pwm_DataStructures
116 * \{ */
117 /** \brief configuration structure for interrupts
118 */
119 typedef struct
120 {
121 boolean ccu0Enabled; /**< \brief Enable/Disable choice for CCU0 trigger interrupt */
122 boolean ccu1Enabled; /**< \brief Enable/Disable choice for CCU1 trigger interrupt */
123 IfxGtm_IrqMode mode; /**< \brief IRQ mode of interrupt */
124 IfxSrc_Tos isrProvider; /**< \brief Type of Service for Ccu0/1 interrupt */
125 Ifx_Priority isrPriority; /**< \brief Priority for Ccu0/1 interrupt */
126 } IfxGtm_Atom_Pwm_Interrupt;
127
128 /** \brief configuration structure for output pin
129 */
130 typedef struct
131 {
132 IfxGtm_Atom_ToutMap *outputPin; /**< \brief output pin */
133 IfxPort_OutputMode outputMode; /**< \brief Output mode */
134 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
135 } IfxGtm_Atom_Pwm_pin;
136
137 /** \} */
138
139 /** \addtogroup IfxLld_Gtm_Atom_Pwm_DataStructures
140 * \{ */
141 /** \brief Configuration structure
142 */
143 typedef struct
144 {
145 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
146 IfxGtm_Atom atom; /**< \brief Index of the ATOM object used */
147 IfxGtm_Atom_Ch atomChannel; /**< \brief ATOM channel used for the timer */
148 IfxGtm_Atom_Mode mode; /**< \brief Atom mode of operation */
149 uint32 period; /**< \brief Period */
150 uint32 dutyCycle; /**< \brief Duty Cycle */
151 Ifx_ActiveState signalLevel; /**< \brief Signal Level */
152 boolean oneShotModeEnabled; /**< \brief Enable/Disable the one shot mode */
153 boolean synchronousUpdateEnabled; /**< \brief Synchronous or Asynchronous update */
154 boolean immediateStartEnabled; /**< \brief enable immediate start after init */
155 IfxGtm_Atom_Pwm_Interrupt interrupt; /**< \brief configuration structure for interrupt */
156 IfxGtm_Atom_Pwm_pin pin; /**< \brief configuration structure for output pin */
157 } IfxGtm_Atom_Pwm_Config;
158
159 /** \brief Driver Handle
160 */
161 typedef struct
162 {
163 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
164 IfxGtm_Atom atomIndex; /**< \brief Index of the ATOM object used */
165 IfxGtm_Atom_Ch atomChannel; /**< \brief ATOM channel used for the timer */
166 Ifx_GTM_ATOM *atom; /**< \brief Pointer to the ATOM object */
167 Ifx_GTM_ATOM_AGC *agc; /**< \brief Pointer to the AGC object */
168 IfxGtm_Atom_Mode mode; /**< \brief Atom mode of operation */
169 } IfxGtm_Atom_Pwm_Driver;
170
171 /** \} */
172
173 /** \addtogroup IfxLld_Gtm_Atom_Pwm_Pwm_Functions
174 * \{ */
175
176 /******************************************************************************/
177 /*-------------------------Global Function Prototypes-------------------------*/
178 /******************************************************************************/
179
180 /** \brief Initialises the Timer object
181 * \param driver ATOM Handle
182 * \param config Configuration structure for ATOM
183 * \return TRUE on success else FALSE
184 */
185 IFX_EXTERN boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config);
186
187 /** \brief Initializes the configuration structure to default
188 * \param config This parameter is Initialised by the function
189 * \param gtm Pointer to GTM module
190 * \return None
191 */
192 IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm);
193
194 /** \brief Starts the PWM generation from the configured channel.
195 * \param driver handle for the PWM device.
196 * \param immediate immediate start or not.
197 * \return None
198 */
199 IFX_EXTERN void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate);
200
201 /** \brief Stops the PWM generation from the configured channel
202 * \param driver handle for the PWM device
203 * \param immediate immediate start or not.
204 * \return None
205 */
206 IFX_EXTERN void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate);
207
208 /** \} */
209
210 #endif /* IFXGTM_ATOM_PWM_H */
IfxGtm_Atom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable immediate start after init
Definition: IfxGtm_Atom_Pwm.h:154
IfxGtm_Atom_Pwm_Config::mode
IfxGtm_Atom_Mode mode
Atom mode of operation.
Definition: IfxGtm_Atom_Pwm.h:148
IfxGtm_Atom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Atom_Pwm.h:152
IfxGtm_Atom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:121
IfxGtm_Atom_Pwm_pin::outputPin
IfxGtm_Atom_ToutMap * outputPin
output pin
Definition: IfxGtm_Atom_Pwm.h:132
IfxGtm_Atom_Pwm_Interrupt
configuration structure for interrupts
Definition: IfxGtm_Atom_Pwm.h:119
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxGtm_Atom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Atom_Pwm.h:149
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxGtm_Atom_Pwm_Driver::atomIndex
IfxGtm_Atom atomIndex
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:164
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Atom_Pwm_pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:130
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:192
IfxGtm_Atom_Pwm_Config::interrupt
IfxGtm_Atom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Atom_Pwm.h:155
IfxGtm_Atom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Atom_Pwm.h:151
IfxGtm_Atom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Atom_Pwm.h:150
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Atom_Pwm_Config::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Atom_Pwm.h:145
IfxGtm_Atom_Pwm_stop
IFX_EXTERN void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:133
IfxGtm_Atom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Atom_Pwm.h:123
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Atom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Atom_Pwm.h:122
IfxGtm_Atom_Pwm_start
IFX_EXTERN void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
Starts the PWM generation from the configured channel.
Definition: IfxGtm_Atom_Pwm.c:122
IfxGtm_Atom_Pwm_Config::pin
IfxGtm_Atom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Atom_Pwm.h:156
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:85
IfxGtm_Atom_Mode
IfxGtm_Atom_Mode
Enum for ATOM mode.
Definition: IfxGtm_Atom.h:74
IfxGtm_Atom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Atom_Pwm.h:153
IfxGtm_Atom_Pwm_Config::atomChannel
IfxGtm_Atom_Ch atomChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Pwm.h:147
IfxGtm_Atom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Atom_Pwm.h:143
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxCpu.h
CPU basic functionality.
IfxGtm_Atom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Atom_Pwm.h:134
IfxGtm_Atom_Pwm_Driver::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Pwm.h:167
IfxGtm_Atom_Pwm_Config::atom
IfxGtm_Atom atom
Index of the ATOM object used.
Definition: IfxGtm_Atom_Pwm.h:146
IfxGtm_Atom_Pwm_Driver::atom
Ifx_GTM_ATOM * atom
Pointer to the ATOM object.
Definition: IfxGtm_Atom_Pwm.h:166
IfxGtm_Atom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Atom_Pwm.h:161
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Atom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:124
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Atom_Pwm.h:133
IfxGtm_Atom_Pwm_initConfig
IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Pwm.c:99
IfxGtm_Atom.h
GTM basic functionality.
IfxGtm_Atom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Atom_Pwm.h:125
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202
IfxGtm_Atom_Pwm_init
IFX_EXTERN boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Atom_Pwm.c:35


iLLD_TC26B: IfxGtm_Atom_PwmHl.c Source File

  • Gtm
  • Atom
  • PwmHl
IfxGtm_Atom_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_PwmHl.c
3 * \brief GTM PWMHL details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Atom_PwmHl.h"
30 #include "_Utilities/Ifx_Assert.h"
31 #include "stddef.h"
32 #include "string.h"
33
34 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions
35 * \{ */
36 /******************************************************************************/
37 /*------------------------Inline Function Prototypes--------------------------*/
38 /******************************************************************************/
39
40 /** \brief Inverts the active state
41 * \param activeState Active state
42 * \return State
43 */
44 IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState);
45
46 /******************************************************************************/
47 /*-----------------------Private Function Prototypes--------------------------*/
48 /******************************************************************************/
49
50 /** \brief Sets switched to OFF
51 * \param driver GTM ATOM PWM driver
52 * \param tOn ON time
53 * \param shift Shift value in ticks
54 * \return None
55 */
56 IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
57
58 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
59 * \param driver GTM ATOM PWM driver
60 * \param tOn T on
61 * \return None
62 */
63 IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
64
65 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
66 * \param driver GTM ATOM PWM driver
67 * \param tOn T on
68 * \return None
69 */
70 IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
71
72 /** \brief Set the outputs to inactive
73 * \param driver GTM ATOM PWM driver
74 * \param tOn T on
75 * \return None
76 */
77 IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
78
79 /** \brief Update Pulse
80 * \param driver GTM ATOM PWM driver
81 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
82 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
83 * \return None
84 */
85 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
86
87 /** \brief Set Pulse to OFF
88 * \param driver GTM ATOM PWM driver
89 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
90 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
91 * \return None
92 */
93 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
94
95 /** \brief Update Shift Center Aligned
96 * \param driver GTM ATOM PWM driver
97 * \param tOn ON time
98 * \param shift Shift value in ticks
99 * \return None
100 */
101 IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
102
103 /** \} */
104
105 /******************************************************************************/
106 /*------------------------Private Variables/Constants-------------------------*/
107 /******************************************************************************/
108
109 IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
110 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
111 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
112 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
113 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
114 {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_PwmHl_updateOff, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulseOff},
115 };
116
117 /******************************************************************************/
118 /*---------------------Inline Function Implementations------------------------*/
119 /******************************************************************************/
120
121 IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
122 {
123 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
124 }
125
126
127 /******************************************************************************/
128 /*-------------------------Function Implementations---------------------------*/
129 /******************************************************************************/
130
131 float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
132 {
133 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
134 }
135
136
137 float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
138 {
139 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
140 }
141
142
143 Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
144 {
145 return driver->base.mode;
146 }
147
148
149 boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
150 {
151 boolean result = TRUE;
152 uint16 channelMask;
153 uint16 channelsMask = 0;
154 uint32 channelIndex;
155
156 IfxGtm_Atom_Timer *timer = config->timer;
157
158 driver->base.mode = Ifx_Pwm_Mode_init;
159 driver->timer = timer;
160 driver->base.setMode = 0;
161 driver->base.inverted = FALSE;
162 driver->base.ccxActiveState = config->base.ccxActiveState;
163 driver->base.coutxActiveState = config->base.coutxActiveState;
164 driver->base.channelCount = config->base.channelCount;
165
166 IfxGtm_Atom_PwmHl_setDeadtime(driver, config->base.deadtime);
167 IfxGtm_Atom_PwmHl_setMinPulse(driver, config->base.minPulse);
168
169 driver->atom = &(timer->gtm->ATOM[config->atom]);
170 /* Only one AGC */
171 driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
172
173 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS);
174
175 IfxGtm_Cmu_Clk clock = IfxGtm_Atom_Ch_getClockSource(timer->atom, timer->timerChannel);
176
177 for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
178 {
179 IfxGtm_Atom_Ch channel;
180 /* CCX */
181 channel = config->ccx[channelIndex]->channel;
182 driver->ccx[channelIndex] = channel;
183 channelMask = 1 << channel;
184 channelsMask |= channelMask;
185
186 /* Initialize the timer part */
187 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
188 driver->base.inverted ? config->base.ccxActiveState :
189 IfxGtm_Atom_PwmHl_invertActiveState(config->base.ccxActiveState),
190 IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
191
192 /* Initialize the port */
193 if (config->initPins == TRUE)
194 {
195 IfxGtm_PinMap_setAtomTout(config->ccx[channelIndex],
196 config->base.outputMode, config->base.outputDriver);
197 }
198
199 /* COUTX */
200 channel = config->coutx[channelIndex]->channel;
201 driver->coutx[channelIndex] = channel;
202 channelMask = 1 << channel;
203 channelsMask |= channelMask;
204
205 /* Initialize the timer part */
206 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
207 driver->base.inverted ?
208 IfxGtm_Atom_PwmHl_invertActiveState(config->base.coutxActiveState)
209 : config->base.coutxActiveState,
210 IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
211
212 /* Initialize the port */
213 if (config->initPins == TRUE)
214 {
215 IfxGtm_PinMap_setAtomTout(config->coutx[channelIndex],
216 config->base.outputMode, config->base.outputDriver);
217 }
218 }
219
220 IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, channelsMask, 0, TRUE);
221 IfxGtm_Atom_Agc_enableChannels(driver->agc, channelsMask, 0, TRUE);
222
223 IfxGtm_Atom_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
224
225 Ifx_TimerValue tOn[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] = {0};
226 IfxGtm_Atom_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
227
228 /* Transfer the shadow registers */
229 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, channelsMask, 0, 0, 0);
230 IfxGtm_Atom_Agc_trigger(driver->agc);
231 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, channelsMask, 0, 0);
232
233 /* Enable timer to update the channels */
234
235 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
236 {
237 IfxGtm_Atom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
238 IfxGtm_Atom_Timer_addToChannelMask(timer, driver->coutx[channelIndex]);
239 }
240
241 return result;
242 }
243
244
245 void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
246 {
247 IfxStdIf_PwmHl_initConfig(&config->base);
248 config->timer = NULL_PTR;
249 config->atom = IfxGtm_Atom_0;
250 config->ccx = NULL_PTR;
251 config->coutx = NULL_PTR;
252 config->initPins = TRUE;
253 }
254
255
256 boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
257 {
258 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
259 driver->base.deadtime = value;
260
261 return TRUE;
262 }
263
264
265 boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
266 {
267 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
268
269 driver->base.minPulse = value + driver->base.deadtime;
270 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
271
272 return TRUE;
273 }
274
275
276 boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
277 {
278 boolean result = TRUE;
279 IfxGtm_Atom_PwmHl_Base *base = &driver->base;
280
281 if (base->mode != mode)
282 {
283 if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Atom_PwmHl_modes[mode].update == NULL_PTR))
284 {
285 mode = Ifx_Pwm_Mode_off;
286 result = FALSE;
287 }
288
289 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_Atom_PwmHl_modes[mode].mode);
290
291 base->mode = mode;
292 driver->update = IfxGtm_Atom_PwmHl_modes[mode].update;
293 driver->updateAndShift = IfxGtm_Atom_PwmHl_modes[mode].updateAndShift;
294 driver->updatePulse = IfxGtm_Atom_PwmHl_modes[mode].updatePulse;
295
296 if (base->mode != Ifx_Pwm_Mode_off)
297 {
298 base->inverted = IfxGtm_Atom_PwmHl_modes[mode].inverted;
299 }
300 else
301 { /* Keep previous inverted for off mode */
302 }
303
304 if (base->inverted)
305 {
306 driver->ccxTemp = driver->coutx;
307 driver->coutxTemp = driver->ccx;
308 }
309 else
310 {
311 driver->ccxTemp = driver->ccx;
312 driver->coutxTemp = driver->coutx;
313 }
314
315 { /* Workaround to enable the signal inversion required for center aligned inverted
316 * and right aligned modes */
317 /** \note Changing signal level may produce short circuit at the power stage,
318 * in which case the inverter must be disable during this action.*/
319
320 /* Ifx_Pwm_Mode_centerAligned and Ifx_Pwm_Mode_LeftAligned use inverted=FALSE */
321 /* Ifx_Pwm_Mode_centerAlignedInverted and Ifx_Pwm_Mode_RightAligned use inverted=TRUE */
322 uint32 channelIndex;
323
324 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
325 {
326 IfxGtm_Atom_Ch channel;
327
328 channel = driver->ccx[channelIndex];
329 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, channel, base->inverted
330 ? base->ccxActiveState
331 : IfxGtm_Atom_PwmHl_invertActiveState(driver->base.ccxActiveState));
332
333 channel = driver->coutx[channelIndex];
334 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, channel, base->inverted
335 ? IfxGtm_Atom_PwmHl_invertActiveState(driver->base.coutxActiveState)
336 : base->coutxActiveState);
337 }
338 }
339 }
340
341 return result;
342 }
343
344
345 void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
346 {
347 driver->update(driver, tOn);
348 }
349
350
351 void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
352 {
353 driver->updateAndShift(driver, tOn, shift);
354 }
355
356
357 void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
358 {
359 driver->updatePulse(driver, tOn, offset);
360 }
361
362
363 void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
364 {
365 /* Dummy Function for StdIf Compile*/
366 IFX_UNUSED_PARAMETER(driver)
367 IFX_UNUSED_PARAMETER(activeCh)
368 IFX_UNUSED_PARAMETER(stuckSt)
369 }
370
371
372 boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
373 {
374 /* Ensure the stdif is reset to zeros */
375 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
376
377 /* *INDENT-OFF* Note: this file was indented manually by the author. */
378 /* Set the API link */
379 stdif->driver = driver;
380 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Atom_PwmHl_setDeadtime;
381 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Atom_PwmHl_getDeadtime;
382 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Atom_PwmHl_setMinPulse;
383 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Atom_PwmHl_getMinPulse;
384 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Atom_PwmHl_getMode;
385 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Atom_PwmHl_setMode;
386 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Atom_PwmHl_setOnTime;
387 stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Atom_PwmHl_setOnTimeAndShift;
388 stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Atom_PwmHl_setPulse;
389 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Atom_PwmHl_setupChannels;
390 IfxGtm_Atom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
391 /* *INDENT-ON* */
392
393 return TRUE;
394 }
395
396
397 IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
398 {
399 IfxGtm_Atom_PwmHl_updateOff(driver, NULL_PTR);
400 IFX_UNUSED_PARAMETER(tOn)
401 IFX_UNUSED_PARAMETER(shift)
402 }
403
404
405 IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
406 {
407 uint8 channelIndex;
408 Ifx_TimerValue period;
409 Ifx_TimerValue deadtime = driver->base.deadtime;
410
411 period = driver->timer->base.period;
412
413 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
414 {
415 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
416 Ifx_TimerValue cm0, cm1;
417 x = tOn[channelIndex];
418
419 if (driver->base.inverted != FALSE)
420 {
421 x = period - x;
422 }
423 else
424 {}
425
426 if ((x < driver->base.minPulse) || (x <= deadtime))
427 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
428 x = 0;
429 }
430 else if (x > driver->base.maxPulse)
431 {
432 x = period;
433 }
434 else
435 {}
436
437 /* Special handling due to GTM issue */
438 if (x == period)
439 { /* 100% duty cycle */
440 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
441 period + 1 /* No compare event */,
442 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
443 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
444 period + 2 /* No compare event, issues has been seen with +1 */,
445 2 /* 1st compare event (issue: expected to be 1)*/);
446 }
447 else if (x == 0)
448 {
449 cm0 = 1;
450 cm1 = period + 2;
451 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
452 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
453 }
454 else
455 { /* x% duty cycle */
456 cm1 = (period - x) / 2; // CM1
457 cm0 = (period + x) / 2; // CM0
458 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
459 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
460 }
461 }
462 }
463
464
465 IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
466 {
467 uint8 channelIndex;
468 Ifx_TimerValue period;
469 Ifx_TimerValue deadtime = driver->base.deadtime;
470
471 period = driver->timer->base.period;
472
473 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
474 {
475 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
476 Ifx_TimerValue cm0, cm1;
477 x = tOn[channelIndex];
478
479 if (driver->base.inverted != FALSE)
480 {
481 x = period - x;
482 }
483 else
484 {}
485
486 if ((x < driver->base.minPulse) || (x <= deadtime))
487 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
488 x = 0;
489 }
490 else if (x > driver->base.maxPulse)
491 {
492 x = period;
493 }
494 else
495 {}
496
497 /* Special handling due to GTM issue */
498 if (x == period)
499 { /* 100% duty cycle */
500 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
501 period + 1 /* No compare event */,
502 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
503 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
504 period + 2 /* No compare event, issues has been seen with +1 */,
505 2 /* 1st compare event (issue: expected to be 1)*/);
506 }
507 else if (x == 0)
508 {
509 cm0 = 1;
510 cm1 = period + 2;
511 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
512 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
513 }
514 else
515 { /* x% duty cycle */
516 cm1 = 2; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
517 cm0 = x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
518 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
519 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
520 }
521 }
522 }
523
524
525 IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
526 {
527 IFX_UNUSED_PARAMETER(tOn)
528 uint8 channelIndex;
529 Ifx_TimerValue period;
530 period = driver->timer->base.period;
531
532 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
533 {
534 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
535 2 /* 1 will keep the previous level*/, period + 2);
536 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], period + 1, 2);
537 }
538 }
539
540
541 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
542 {
543 uint8 channelIndex;
544 Ifx_TimerValue period;
545
546 period = driver->timer->base.period;
547
548 /* Top channels */
549 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
550 {
551 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
552 Ifx_TimerValue o;
553 Ifx_TimerValue cm0, cm1;
554
555 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
556 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
557
558 if (driver->base.inverted != FALSE)
559 {
560 x = period - x;
561 }
562 else
563 {}
564
565 if ((x < driver->base.minPulse) || (o > period))
566 {
567 x = 0;
568 }
569 else if ((x > driver->base.maxPulse) || (o + x > period))
570 {
571 x = period;
572 }
573 else
574 {}
575
576 /* Special handling due to GTM issue */
577 if (x == period)
578 { /* 100% duty cycle */
579 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
580 period + 1 /* No compare event */,
581 2 /* 1st compare event (issue: expected to be 1)*/);
582 }
583 else if (x == 0)
584 {
585 cm0 = 1;
586 cm1 = period + 2;
587 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
588 }
589 else
590 { /* x% duty cycle */
591 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
592 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
593 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
594 }
595 }
596
597 /* Bottom channels */
598 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
599 {
600 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
601 Ifx_TimerValue o;
602 Ifx_TimerValue cm0, cm1;
603
604 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex + driver->base.channelCount]);
605 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex + driver->base.channelCount]);
606
607 if (driver->base.inverted != FALSE)
608 {
609 x = period - x;
610 }
611 else
612 {}
613
614 if (x < driver->base.minPulse)
615 {
616 x = 0;
617 }
618 else if (x > driver->base.maxPulse)
619 {
620 x = period;
621 }
622 else
623 {}
624
625 /* Special handling due to GTM issue */
626 if (x == period)
627 { /* 100% duty cycle */
628 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
629 period + 2 /* No compare event, issues has been seen with +1 */,
630 2 /* 1st compare event (issue: expected to be 1)*/);
631 }
632 else if (x == 0)
633 {
634 cm0 = 1;
635 cm1 = period + 2;
636 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0, cm1);
637 }
638 else
639 { /* x% duty cycle */
640 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
641 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
642 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0, cm1);
643 }
644 }
645 }
646
647
648 IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
649 {
650 IFX_UNUSED_PARAMETER(tOn)
651 IFX_UNUSED_PARAMETER(offset)
652
653 IfxGtm_Atom_PwmHl_updateOff(driver, NULL_PTR);
654 }
655
656
657 IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
658 {
659 uint8 channelIndex;
660 Ifx_TimerValue period;
661 Ifx_TimerValue deadtime = driver->base.deadtime;
662
663 period = driver->timer->base.period;
664
665 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
666 {
667 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
668 Ifx_TimerValue s; /* Shift value */
669 Ifx_TimerValue cm0, cm1;
670 x = tOn[channelIndex];
671
672 if (driver->base.inverted != FALSE)
673 {
674 x = period - x;
675 }
676 else
677 {}
678
679 if ((x < driver->base.minPulse) || (x <= deadtime))
680 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
681 x = 0;
682 }
683 else if (x > driver->base.maxPulse)
684 {
685 x = period;
686 }
687 else
688 {}
689
690 /* Special handling due to GTM issue */
691 if (x == period)
692 { /* 100% duty cycle */
693 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
694 period + 1 /* No compare event */,
695 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
696 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
697 period + 2 /* No compare event, issues has been seen with +1 */,
698 2 /* 1st compare event (issue: expected to be 1)*/);
699 }
700 else if (x == 0)
701 {
702 cm0 = 1;
703 cm1 = period + 2;
704 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
705 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
706 }
707 else
708 { /* x% duty cycle */
709 s = shift[channelIndex];
710
711 if (s > 0)
712 {
713 s = __minX(s, (period - x) / 2 - 1);
714 }
715 else
716 {
717 s = __maxX(s, (x - period) / 2 + 1);
718 }
719
720 cm1 = s + (period - x) / 2; // CM1
721 cm0 = s + (period + x) / 2; // CM0
722 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
723 IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
724 }
725 }
726 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:152
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
IfxGtm_Atom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Atom_PwmHl.c:397
IfxGtm_Atom_Timer_stdIfTimerInit
boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:334
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:98
IfxGtm_Atom_PwmHl_Config::atom
IfxGtm_Atom atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:134
IfxGtm_Atom_PwmHl_init
boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Atom_PwmHl.c:149
IfxGtm_Atom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Atom_PwmHl.c:657
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:88
IfxGtm_Atom_PwmHl_s::updateAndShift
IfxGtm_Atom_PwmHl_UpdateShift updateAndShift
Update shift function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:159
IfxGtm_Atom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Atom_PwmHl.h:117
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:104
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:163
IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration.
Definition: IfxGtm_Atom_PwmHl.h:130
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:103
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:218
IfxGtm_Atom_PwmHl.h
GTM PWMHL details.
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:169
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:160
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:418
IfxGtm_Atom_Ch_getClockSource
IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Atom.c:289
IfxGtm_Atom_PwmHl_initConfig
void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Atom_PwmHl.c:245
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:151
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:101
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_PwmHl.h:89
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:107
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:100
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:182
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:429
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:160
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:261
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:168
Ifx_Assert.h
Assert functions.
IfxGtm_Atom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Atom_PwmHl.c:465
IfxGtm_Atom_PwmHl_s::timer
IfxGtm_Atom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Atom_PwmHl.h:157
IfxGtm_Atom_PwmHl_setMode
boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Atom_PwmHl.c:276
__maxX
#define __maxX
Definition: IfxCpu_IntrinsicsDcc.h:1580
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:157
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Atom_PwmHl_s::ccxTemp
IfxGtm_Atom_Ch * ccxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:165
IfxGtm_Atom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Atom_PwmHl.h:115
IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:111
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxGtm_Atom_Ch_setCompareShadow
IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Atom.h:574
IfxGtm_Atom_PwmHl_s::agc
Ifx_GTM_ATOM_AGC * agc
AGC unit used.
Definition: IfxGtm_Atom_PwmHl.h:162
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Atom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:119
IfxGtm_Atom_Timer_addToChannelMask
void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:71
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxGtm_Atom_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxGtm_Atom_PwmHl.c:121
IfxGtm_Atom_PwmHl_setupChannels
void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Atom_PwmHl.c:363
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:132
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:164
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:134
IfxGtm_Atom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Atom_PwmHl.h:132
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:185
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:162
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:93
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:183
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxGtm_Atom_PwmHl_s::coutx
IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the OUTX outputs.
Definition: IfxGtm_Atom_PwmHl.h:164
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:165
IfxGtm_Atom_PwmHl_stdIfPwmHlInit
boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Atom_PwmHl.c:372
IfxGtm_Atom_PwmHl_s::base
IfxGtm_Atom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:156
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:60
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:155
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:164
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:69
__minX
#define __minX
Definition: IfxCpu_IntrinsicsDcc.h:1576
IfxGtm_Atom_PwmHl_getMode
Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Atom_PwmHl.c:143
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:85
IfxGtm_Atom_PwmHl_getMinPulse
float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:137
IfxGtm_Atom_PwmHl_getDeadtime
float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Atom_PwmHl.c:131
IfxGtm_Atom_PwmHl_s::updatePulse
IfxGtm_Atom_PwmHl_UpdatePulse updatePulse
Update pulse function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:160
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:161
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:177
IfxGtm_Atom_PwmHl_setPulse
void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Atom_PwmHl.c:357
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:90
IfxGtm_Atom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Atom_PwmHl.c:405
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:163
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:28
IfxGtm_Atom_PwmHl_s::ccx
IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the CCCX outputs.
Definition: IfxGtm_Atom_PwmHl.h:163
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:186
IfxGtm_Atom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:118
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:179
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:166
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:69
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:488
IfxGtm_Atom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Atom_PwmHl.c:541
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:178
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:102
IfxGtm_Atom_PwmHl_setOnTime
void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Atom_PwmHl.c:345
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:171
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:194
IfxGtm_Atom_PwmHl_setDeadtime
boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Atom_PwmHl.c:256
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:162
IfxGtm_Atom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Atom_PwmHl.c:648
IfxGtm_Atom_PwmHl_setMinPulse
boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:265
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxGtm_Atom_PwmHl_s::update
IfxGtm_Atom_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxGtm_Atom_PwmHl.h:158
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:116
IfxGtm_Atom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Atom_PwmHl.h:137
IfxGtm_Atom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Atom_PwmHl.h:116
IfxGtm_Atom_PwmHl_modes
IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxGtm_Atom_PwmHl.c:109
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:161
IfxGtm_Atom_PwmHl_s::coutxTemp
IfxGtm_Atom_Ch * coutxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:166
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:88
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:165
IfxGtm_Atom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Atom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:135
IfxGtm_Atom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Atom_PwmHl.h:114
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:124
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:77
IfxGtm_Atom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Atom_PwmHl.h:121
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:239
IfxGtm_Atom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Atom_PwmHl.h:113
IfxGtm_Atom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Atom_PwmHl.h:120
IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Atom_PwmHl.h:143
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Atom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Atom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:136
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver.
Definition: IfxGtm_Atom_PwmHl.h:154
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm_Atom_PwmHl_s::atom
Ifx_GTM_ATOM * atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:161
IfxGtm_Atom_PwmHl_setOnTimeAndShift
void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Atom_PwmHl.c:351
IfxGtm_Atom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Atom_PwmHl.c:525
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:109
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:167
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:701


iLLD_TC26B: IfxGtm_Atom_PwmHl.h Source File

  • Gtm
  • Atom
  • PwmHl
IfxGtm_Atom_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_PwmHl.h
3 * \brief GTM PWMHL details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Atom_PwmHl_Usage How to use the GTM ATOM PWM Driver
25 * \ingroup IfxLld_Gtm_Atom_PwmHl
26 *
27 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
28 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
29 *
30 * \section Specific Specific implementation
31 * Implementation is similar to \ref IfxLld_Gtm_Tom_PwmHl
32 *
33 * \todo add documentation
34 *
35 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Atom_PwmHl_init().
36 *
37 * \section Example Usage example
38 * Initialisation is done by, e.g:
39 * \code
40 * IfxGtm_Atom_PwmHl_Config driverConfig;
41 * IfxGtm_Atom_PwmHl driverData;
42 * IfxStdIf_PwmHl pwmhl;
43 * IfxGtm_Atom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
44 * IfxGtm_Atom_PwmHl_init(&driverData, &driverConfig);
45 * IfxGtm_Atom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
46 * \endcode
47 *
48 * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
49 * \code
50 * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
51 * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
52 *
53 * onTime[0] = 10;
54 * onTime[1] = 20;
55 * onTime[2] = 30;
56 *
57 * IfxStdIf_Timer_disableUpdate(timer);
58 * IfxStdIf_Timer_setPeriod(timer, period);
59 * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
60 * IfxStdIf_Timer_applyUpdate(timer);
61 * \endcode
62 *
63 * \defgroup IfxLld_Gtm_Atom_PwmHl ATOM PWM HL Interface Driver
64 * \ingroup IfxLld_Gtm_Atom
65 * \defgroup IfxLld_Gtm_Atom_PwmHl_Data_Structures Data Structures
66 * \ingroup IfxLld_Gtm_Atom_PwmHl
67 * \defgroup IfxLld_Gtm_Atom_PwmHl_Functions PwmHl Functions
68 * \ingroup IfxLld_Gtm_Atom_PwmHl
69 * \defgroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions PwmHl StdIf Functions
70 * \ingroup IfxLld_Gtm_Atom_PwmHl
71 */
72
73 #ifndef IFXGTM_ATOM_PWMHL_H
74 #define IFXGTM_ATOM_PWMHL_H 1
75
76 /******************************************************************************/
77 /*----------------------------------Includes----------------------------------*/
78 /******************************************************************************/
79
80 #include "StdIf/IfxStdIf_PwmHl.h"
81 #include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
82
83 /******************************************************************************/
84 /*-----------------------------------Macros-----------------------------------*/
85 /******************************************************************************/
86
87 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
88 */
89 #define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)
90
91 /******************************************************************************/
92 /*------------------------------Type Definitions------------------------------*/
93 /******************************************************************************/
94
95 typedef struct IfxGtm_Atom_PwmHl_s IfxGtm_Atom_PwmHl;
96
97 typedef void (*IfxGtm_Atom_PwmHl_Update)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
98
99 typedef void (*IfxGtm_Atom_PwmHl_UpdateShift)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
100
101 typedef void (*IfxGtm_Atom_PwmHl_UpdatePulse)(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
102
103 /******************************************************************************/
104 /*-----------------------------Data Structures--------------------------------*/
105 /******************************************************************************/
106
107 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Data_Structures
108 * \{ */
109 /** \brief Multi-channels PWM object definition (channels only)
110 */
111 typedef struct
112 {
113 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
114 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
115 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
116 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
117 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
118 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
119 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
120 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
121 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
122 } IfxGtm_Atom_PwmHl_Base;
123
124 /** \} */
125
126 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Data_Structures
127 * \{ */
128 /** \brief GTM ATOM: PWM HL configuration
129 */
130 typedef struct
131 {
132 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
133 IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
134 IfxGtm_Atom atom; /**< \brief ATOM unit used */
135 IFX_CONST IfxGtm_Atom_ToutMapP *ccx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
136 IFX_CONST IfxGtm_Atom_ToutMapP *coutx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
137 boolean initPins; /**< \brief TRUE: Initialize pins in driver
138 * FALSE: Don't initialize pins in driver. User handles separately. */
139 } IfxGtm_Atom_PwmHl_Config;
140
141 /** \brief Structure for PWM configuration
142 */
143 typedef struct
144 {
145 Ifx_Pwm_Mode mode; /**< \brief Pwm Mode */
146 boolean inverted; /**< \brief Inverted configuration for the selected mode */
147 IfxGtm_Atom_PwmHl_Update update; /**< \brief update call back function for the selected mode */
148 IfxGtm_Atom_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
149 IfxGtm_Atom_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
150 } IfxGtm_Atom_PwmHl_Mode;
151
152 /** \brief GTM ATOM PWM driver
153 */
154 struct IfxGtm_Atom_PwmHl_s
155 {
156 IfxGtm_Atom_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
157 IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
158 IfxGtm_Atom_PwmHl_Update update; /**< \brief Update function for actual selected mode */
159 IfxGtm_Atom_PwmHl_UpdateShift updateAndShift; /**< \brief Update shift function for actual selected mode */
160 IfxGtm_Atom_PwmHl_UpdatePulse updatePulse; /**< \brief Update pulse function for actual selected mode */
161 Ifx_GTM_ATOM *atom; /**< \brief ATOM unit used */
162 Ifx_GTM_ATOM_AGC *agc; /**< \brief AGC unit used */
163 IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the CCCX outputs */
164 IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the OUTX outputs */
165 IfxGtm_Atom_Ch *ccxTemp; /**< \brief cached value */
166 IfxGtm_Atom_Ch *coutxTemp; /**< \brief cached value */
167 };
168
169 /** \} */
170
171 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_Functions
172 * \{ */
173
174 /******************************************************************************/
175 /*-------------------------Global Function Prototypes-------------------------*/
176 /******************************************************************************/
177
178 /** \brief Initializes the timer object
179 * note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
180 * \param driver GTM ATOM PWM driver
181 * \param config GTM ATOM: PWM HL configuration
182 * \return TRUE on success else FALSE
183 */
184 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config);
185
186 /** \brief Initialize the configuration structure to default
187 * \param config Channel configuration. This parameter is Initialised by the function
188 * \return None
189 */
190 IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config);
191
192 /** \} */
193
194 /** \addtogroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions
195 * \{ */
196
197 /******************************************************************************/
198 /*-------------------------Global Function Prototypes-------------------------*/
199 /******************************************************************************/
200
201 /** \brief Returns the dead time
202 * \see IfxStdIf_PwmHl_GetDeadtime
203 * \param driver GTM ATOM PWM driver
204 * \return Dead Time
205 */
206 IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver);
207
208 /** \brief Returns the minimum pulse
209 * \see IfxStdIf_PwmHl_GetMinPulse
210 * \param driver GTM ATOM PWM driver
211 * \return Min Pulse
212 */
213 IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver);
214
215 /** \brief Returns Pwm mode
216 * \see IfxStdIf_PwmHl_GetMode
217 * \param driver GTM ATOM PWM driver
218 * \return Pwm mode
219 */
220 IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver);
221
222 /** \brief Sets the dead time
223 * \see IfxStdIf_PwmHl_SetDeadtime
224 * \param driver GTM ATOM PWM driver
225 * \param deadtime Dead time value
226 * \return TRUE on success else FALSE
227 */
228 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime);
229
230 /** \brief Sets the minimum pulse
231 * \see IfxStdIf_PwmHl_SetMinPulse
232 * \param driver GTM ATOM PWM driver
233 * \param minPulse Minimum pulse
234 * \return TRUE on success else FALSE
235 */
236 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse);
237
238 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
239 * \see IfxStdIf_PwmHl_SetMode
240 * \param driver GTM ATOM PWM driver
241 * \param mode Pwm mode
242 * \return TRUE on success else FALSE
243 */
244 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode);
245
246 /** \brief Sets the ON time
247 * \see IfxStdIf_PwmHl_SetOnTime
248 * \param driver GTM ATOM PWM driver
249 * \param tOn ON time
250 * \return None
251 */
252 IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
253
254 /** \brief Sets the ON time and Shift
255 * \param driver GTM ATOM PWM driver
256 * \param tOn ON time
257 * \param shift Shift value in ticks
258 * \return None
259 */
260 IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
261
262 /** \brief Sets the ON time and offset, all switched are independent
263 * \param driver GTM ATOM PWM driver
264 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
265 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
266 * \return None
267 */
268 IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
269
270 /** \brief Set up channels
271 * \see IfxStdIf_PwmHl_SetupChannels
272 * \param driver GTM ATOM PWM driver
273 * \param activeCh Active channel
274 * \param stuckSt Stuck state
275 * \return None
276 */
277 IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
278
279 /** \brief Initialises the statndard interface Pwm
280 * \param stdif Standard interface object, will be initialized by the function
281 * \param driver Interface driver to be used by the standard interface. must be initialised separately
282 * \return TRUE on success else FALSE
283 */
284 IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver);
285
286 /** \} */
287
288 #endif /* IFXGTM_ATOM_PWMHL_H */
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
IfxGtm_Atom_PwmHl_Config::atom
IfxGtm_Atom atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:134
IfxGtm_Atom_PwmHl_init
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Atom_PwmHl.c:149
IfxGtm_Atom_PwmHl_Mode::updateAndShift
IfxGtm_Atom_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:148
IfxGtm_Atom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Atom_PwmHl.h:117
IfxGtm_Atom_PwmHl_Config
GTM ATOM: PWM HL configuration.
Definition: IfxGtm_Atom_PwmHl.h:130
IfxGtm_Atom_PwmHl_UpdatePulse
void(* IfxGtm_Atom_PwmHl_UpdatePulse)(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Definition: IfxGtm_Atom_PwmHl.h:101
IfxGtm_Atom_Timer.h
GTM TIMER details.
IfxGtm_Atom_PwmHl_initConfig
IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Atom_PwmHl.c:245
IfxGtm_Atom_PwmHl_Update
void(* IfxGtm_Atom_PwmHl_Update)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxGtm_Atom_PwmHl.h:97
IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output...
Definition: IfxGtm_Atom_PwmHl.h:89
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:100
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:192
IfxGtm_Atom_PwmHl_Config::timer
IfxGtm_Atom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Atom_PwmHl.h:133
IfxGtm_Atom_PwmHl_setMode
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Atom_PwmHl.c:276
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Atom_PwmHl_s::ccxTemp
IfxGtm_Atom_Ch * ccxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:165
IfxGtm_Atom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Atom_PwmHl.h:115
IfxGtm_Atom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:111
IfxGtm_Atom_PwmHl_s::agc
Ifx_GTM_ATOM_AGC * agc
AGC unit used.
Definition: IfxGtm_Atom_PwmHl.h:162
IfxGtm_Atom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:119
IfxGtm_Atom_PwmHl_UpdateShift
void(* IfxGtm_Atom_PwmHl_UpdateShift)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Definition: IfxGtm_Atom_PwmHl.h:99
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxGtm_Atom_PwmHl_setupChannels
IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Atom_PwmHl.c:363
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Atom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Atom_PwmHl.h:132
IfxGtm_Atom_PwmHl_s::coutx
IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the OUTX outputs.
Definition: IfxGtm_Atom_PwmHl.h:164
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:85
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:175
IfxGtm_Atom_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Atom_PwmHl.c:372
IfxGtm_Atom_PwmHl_s::base
IfxGtm_Atom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Atom_PwmHl.h:156
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:155
IfxGtm_Atom_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Atom_PwmHl.c:143
IfxGtm_Atom_PwmHl_getMinPulse
IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:137
IfxGtm_Atom_PwmHl_getDeadtime
IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Atom_PwmHl.c:131
IfxGtm_Atom_PwmHl_Mode::updatePulse
IfxGtm_Atom_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:149
IfxGtm_Atom_PwmHl_setPulse
IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Atom_PwmHl.c:357
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxGtm_Atom_PwmHl_s::ccx
IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]
ATOM channels used for the CCCX outputs.
Definition: IfxGtm_Atom_PwmHl.h:163
IfxGtm_Atom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Atom_PwmHl.h:118
IfxGtm_Atom_PwmHl_setOnTime
IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Atom_PwmHl.c:345
IfxGtm_Atom_PwmHl_setDeadtime
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Atom_PwmHl.c:256
IfxGtm_Atom_PwmHl_setMinPulse
IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Atom_PwmHl.c:265
IfxGtm_Atom_PwmHl_Mode::update
IfxGtm_Atom_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Atom_PwmHl.h:147
IfxGtm_Atom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver. User handles separately...
Definition: IfxGtm_Atom_PwmHl.h:137
IfxGtm_Atom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Atom_PwmHl.h:116
IfxGtm_Atom_PwmHl_s::coutxTemp
IfxGtm_Atom_Ch * coutxTemp
cached value
Definition: IfxGtm_Atom_PwmHl.h:166
IfxGtm_Atom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Atom_ToutMapP * ccx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:135
IfxGtm_Atom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Atom_PwmHl.h:114
IfxGtm_Atom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Atom_PwmHl.h:121
IfxGtm_Atom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Atom_PwmHl.h:113
IfxGtm_Atom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Atom_PwmHl.h:120
IfxGtm_Atom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Atom_PwmHl.h:143
IfxGtm_Atom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Atom_ToutMapP * coutx
Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels.
Definition: IfxGtm_Atom_PwmHl.h:136
IfxGtm_Atom_PwmHl_s
GTM ATOM PWM driver.
Definition: IfxGtm_Atom_PwmHl.h:154
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm_Atom_PwmHl_s::atom
Ifx_GTM_ATOM * atom
ATOM unit used.
Definition: IfxGtm_Atom_PwmHl.h:161
IfxGtm_Atom_PwmHl_setOnTimeAndShift
IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Atom_PwmHl.c:351
sint8
signed char sint8
Definition: Platform_Types.h:122
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202


iLLD_TC26B: IfxGtm_Atom_Timer.c Source File

  • Gtm
  • Atom
  • Timer
IfxGtm_Atom_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Timer.c
3 * \brief GTM TIMER details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Atom_Timer.h"
30 #include "_Utilities/Ifx_Assert.h"
31 #include "IfxGtm_bf.h"
32 #include "stddef.h"
33 #include "string.h"
34
35 /******************************************************************************/
36 /*-------------------------Function Implementations---------------------------*/
37 /******************************************************************************/
38
39 boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
40 {
41 boolean event;
42 event = IfxGtm_Atom_Ch_isZeroNotification(driver->atom, driver->timerChannel);
43
44 if (event)
45 {
46 IfxGtm_Atom_Ch_clearZeroNotification(driver->atom, driver->timerChannel);
47 }
48 else
49 {}
50
51 return event;
52 }
53
54
55 boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
56 {
57 boolean event;
58 event = IfxGtm_Atom_Ch_isOneNotification(driver->atom, driver->triggerChannel);
59
60 if (event)
61 {
62 IfxGtm_Atom_Ch_clearOneNotification(driver->atom, driver->triggerChannel);
63 }
64 else
65 {}
66
67 return event;
68 }
69
70
71 void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
72 {
73 driver->channelsMask |= 1 << channel;
74 driver->agcDisableUpdate = IfxGtm_Atom_Agc_buildFeature(0, driver->channelsMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
75 driver->agcApplyUpdate = IfxGtm_Atom_Agc_buildFeature(driver->channelsMask, 0, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
76 }
77
78
79 void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
80 {
81 IfxGtm_Atom_Agc_setChannelsUpdate(driver->agc, driver->agcApplyUpdate);
82 }
83
84
85 void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
86 {
87 IfxGtm_Atom_Agc_setChannelsUpdate(driver->agc, driver->agcDisableUpdate);
88 }
89
90
91 float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
92 {
93 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
94 }
95
96
97 float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
98 {
99 return driver->base.clockFreq;
100 }
101
102
103 Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
104 {
105 return driver->offset;
106 }
107
108
109 Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
110 {
111 return driver->base.period;
112 }
113
114
115 volatile uint32 *IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
116 {
117 return IfxGtm_Atom_Ch_getTimerPointer(driver->atom, driver->timerChannel);
118 }
119
120
121 float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
122 {
123 return 1.0 / driver->base.clockFreq;
124 }
125
126
127 Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
128 {
129 return IfxGtm_Atom_Ch_getCompareOne(driver->atom, driver->triggerChannel) - 1;
130 }
131
132
133 volatile uint32 *IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
134 {
135 return IfxGtm_Atom_Ch_getCompareOnePointer(driver->atom, driver->triggerChannel);
136 }
137
138
139 boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
140 {
141 boolean result = TRUE;
142 IfxGtm_Atom_Timer_Base *base = &driver->base;
143
144 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
145
146 driver->gtm = config->gtm;
147 driver->atomIndex = config->atom;
148 driver->atom = &config->gtm->ATOM[config->atom];
149 driver->timerChannel = config->timerChannel;
150
151 base->triggerEnabled = config->base.trigger.enabled;
152
153 if (base->triggerEnabled)
154 {
155 if (config->triggerOut != NULL_PTR)
156 {
157 driver->triggerChannel = config->triggerOut->channel;
158 }
159 else
160 {
161 result = FALSE;
162 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result); /* triggerOut is required */
163 }
164 }
165 else
166 {
167 driver->triggerChannel = driver->timerChannel; // Set to timer channel to disable its use
168 }
169
170 driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
171
172 driver->channelsMask = 0;
173 driver->agcApplyUpdate = 0;
174 driver->agcDisableUpdate = 0;
175
176 /* Initialize the timer part */
177 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, driver->timerChannel, config->clock,
178 (Ifx_ActiveState)config->base.trigger.risingEdgeAtPeriod, IfxGtm_Atom_Ch_ResetEvent_onCm0,
179 IfxGtm_Atom_Ch_OutputTrigger_generate);
180
181 IfxGtm_Atom_Timer_updateInputFrequency(driver);
182
183 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
184 {
185 result = FALSE;
186 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
187 }
188 else
189 {}
190
191 IfxGtm_Atom_Timer_setFrequency(driver, config->base.frequency);
192 driver->offset = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / config->base.frequency * config->base.startOffset);
193
194 IfxGtm_Atom_Ch_setCounterValue(driver->atom, driver->timerChannel, driver->offset);
195
196 /* Initialize the trigger part */
197 IfxGtm_Atom_Timer_addToChannelMask(driver, driver->timerChannel);
198
199 if (base->triggerEnabled)
200 {
201 IfxGtm_Atom_Ch triggerChannel = driver->triggerChannel;
202 uint16 triggerChannelMask = 1 << triggerChannel;
203
204 IfxGtm_Atom_Ch_setSignalLevel(driver->atom, triggerChannel, config->base.trigger.risingEdgeAtPeriod ? Ifx_ActiveState_high : Ifx_ActiveState_low);
205
206 IfxGtm_Atom_Ch_setCounterValue(driver->atom, triggerChannel, driver->offset);
207
208 if (triggerChannel != driver->timerChannel)
209 {
210 IfxGtm_Atom_Ch_configurePwmMode(driver->atom, triggerChannel, config->clock,
211 (Ifx_ActiveState)config->base.trigger.risingEdgeAtPeriod, IfxGtm_Atom_Ch_ResetEvent_onTrigger,
212 IfxGtm_Atom_Ch_OutputTrigger_forward);
213 IfxGtm_Atom_Agc_enableChannels(driver->agc, triggerChannelMask, 0, FALSE);
214 IfxGtm_Atom_Timer_addToChannelMask(driver, driver->triggerChannel);
215 }
216 else
217 {}
218
219 /* Signal must go out of the GTM even if the port outpout is not enabled */
220 IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, triggerChannelMask, 0, FALSE);
221
222 if ((config->base.trigger.outputEnabled) && (config->initPins == TRUE))
223 {
224 /* Initialize the port */
225 IfxGtm_PinMap_setAtomTout(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
226 }
227 else
228 {}
229
230 IfxGtm_Atom_Timer_setTrigger(driver, config->base.trigger.triggerPoint);
231 }
232 else
233 {}
234
235 /* Interrupt configuration */
236 {
237 volatile Ifx_SRC_SRCR *src;
238 boolean timerHasIrq = config->base.isrPriority > 0;
239 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
240
241 if (driver->triggerChannel == driver->timerChannel)
242 {
243 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->timerChannel, timerHasIrq ? config->irqModeTimer : config->irqModeTrigger, timerHasIrq, triggerHasIrq);
244 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->timerChannel);
245 IfxSrc_init(src, timerHasIrq ? config->base.isrProvider : config->base.trigger.isrProvider, timerHasIrq ? config->base.isrPriority : config->base.trigger.isrPriority);
246 IfxSrc_enable(src);
247 }
248 else
249 {
250 IfxGtm_IrqMode irqMode = IfxGtm_IrqMode_pulseNotify;
251
252 if (timerHasIrq)
253 {
254 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->timerChannel, irqMode, TRUE, FALSE);
255 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->timerChannel);
256 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
257 IfxSrc_enable(src);
258 }
259
260 if (triggerHasIrq)
261 {
262 IfxGtm_Atom_Ch_setNotification(driver->atom, driver->triggerChannel, irqMode, FALSE, TRUE);
263 src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->triggerChannel);
264 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
265 IfxSrc_enable(src);
266 }
267 }
268 }
269
270 /* Transfer the shadow registers */
271 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, driver->channelsMask, 0, 0, 0);
272 IfxGtm_Atom_Agc_trigger(driver->agc);
273 IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, driver->channelsMask, 0, 0);
274
275 return result;
276 }
277
278
279 void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
280 {
281 IfxStdIf_Timer_initConfig(&config->base);
282 config->gtm = gtm;
283 config->atom = IfxGtm_Atom_0;
284 config->timerChannel = IfxGtm_Atom_Ch_0;
285 config->triggerOut = NULL_PTR;
286 config->clock = IfxGtm_Cmu_Clk_0;
287 config->base.countDir = IfxStdIf_Timer_CountDir_up;
288 config->irqModeTimer = IfxGtm_IrqMode_level;
289 config->irqModeTrigger = IfxGtm_IrqMode_level;
290 config->initPins = TRUE;
291 }
292
293
294 void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
295 {
296 IfxGtm_Atom_Agc_enableChannels(driver->agc, driver->channelsMask, 0, TRUE);
297 }
298
299
300 boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
301 {
302 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
303
304 return IfxGtm_Atom_Timer_setPeriod(driver, period);
305 }
306
307
308 boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
309 {
310 driver->base.period = period;
311 IfxGtm_Atom_Ch_setCompareZeroShadow(driver->atom, driver->timerChannel, period);
312
313 if (driver->triggerChannel != driver->timerChannel)
314 {
315 IfxGtm_Atom_Ch_setCompareZeroShadow(driver->atom, driver->triggerChannel, period);
316 }
317
318 return TRUE;
319 }
320
321
322 void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
323 {
324 IfxGtm_Atom_Ch_setOneShotMode(driver->atom, driver->timerChannel, enabled);
325 }
326
327
328 void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
329 {
330 IfxGtm_Atom_Ch_setCompareOneShadow(driver->atom, driver->triggerChannel, triggerPoint + 1);
331 }
332
333
334 boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
335 {
336 /* Ensure the stdif is reset to zeros */
337 memset(stdif, 0, sizeof(IfxStdIf_Timer));
338
339 /* *INDENT-OFF* Note: this file was indented manually by the author. */
340 /* Set the API link */
341 stdif->driver = driver;
342 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxGtm_Atom_Timer_getFrequency;
343 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxGtm_Atom_Timer_getPeriod;
344 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxGtm_Atom_Timer_getResolution;
345 stdif->getTrigger =(IfxStdIf_Timer_GetTrigger )&IfxGtm_Atom_Timer_getTrigger;
346 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxGtm_Atom_Timer_setFrequency;
347 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxGtm_Atom_Timer_updateInputFrequency;
348 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxGtm_Atom_Timer_applyUpdate;
349 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxGtm_Atom_Timer_disableUpdate;
350 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxGtm_Atom_Timer_getInputFrequency;
351 stdif->run =(IfxStdIf_Timer_Run )&IfxGtm_Atom_Timer_run;
352 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxGtm_Atom_Timer_setPeriod;
353 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxGtm_Atom_Timer_setSingleMode;
354 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxGtm_Atom_Timer_setTrigger;
355 stdif->stop =(IfxStdIf_Timer_Stop )&IfxGtm_Atom_Timer_stop;
356 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxGtm_Atom_Timer_acknowledgeTimerIrq;
357 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxGtm_Atom_Timer_acknowledgeTriggerIrq;
358 /* *INDENT-ON* */
359
360 return TRUE;
361 }
362
363
364 void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
365 {
366 IfxGtm_Atom_Agc_enableChannels(driver->agc, 0, driver->channelsMask, TRUE);
367 }
368
369
370 void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
371 {
372 driver->base.clockFreq = IfxGtm_Atom_Ch_getClockFrequency(driver->gtm, driver->atom, driver->timerChannel);
373 }
IfxGtm_Atom_Agc_enableChannelsOutput
void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Atom.c:152
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:226
IfxGtm_Atom_Timer_Config::triggerOut
IfxGtm_Atom_ToutMap * triggerOut
ATOM channel used for the trigger output, can be identical to the timer channe.
Definition: IfxGtm_Atom_Timer.h:123
IfxGtm_Atom_Timer_stdIfTimerInit
boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:334
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:98
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:100
IfxGtm_Atom_Timer_setSingleMode
void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Atom_Timer.c:322
IfxGtm_Atom_Timer_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver : user handles separately...
Definition: IfxGtm_Atom_Timer.h:127
IfxGtm_Atom_Timer_getFrequency
float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Atom_Timer.c:91
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:259
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:88
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:104
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxGtm_IrqMode_level
Definition: IfxGtm.h:49
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:82
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:103
IfxGtm_Atom_Agc_setChannelsForceUpdate
void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Atom.c:218
IfxGtm_Atom_Timer_setPeriod
boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Atom_Timer.c:308
IfxGtm_Atom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Atom.h:68
IfxGtm_Atom_Ch_clearOneNotification
void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Atom.c:245
IfxGtm_Atom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Atom_Timer.h:126
IfxGtm_Atom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Atom.h:61
IfxGtm_Atom_Ch_setNotification
void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Atom.c:454
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:205
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:216
IfxGtm_Atom_Timer.h
GTM TIMER details.
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:114
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:236
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:234
IfxGtm_Atom_Timer_setFrequency
boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Atom_Timer.c:300
IfxGtm_Atom_Ch_clearZeroNotification
void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Atom.c:253
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:222
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:418
IfxGtm_Atom_Agc_buildFeature
uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Atom.c:44
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:249
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:107
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:108
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:100
IfxGtm_Atom_Timer::triggerChannel
IfxGtm_Atom_Ch triggerChannel
ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having ...
Definition: IfxGtm_Atom_Timer.h:108
IfxGtm_Atom_Timer_getPointer
volatile uint32 * IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Atom_Timer.c:115
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:429
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Atom_Ch_configurePwmMode
void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
Definition: IfxGtm_Atom.c:261
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxGtm_Atom_Agc_setChannelsUpdate
IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
Sets the channels for update (UPEN)
Definition: IfxGtm_Atom.h:583
Ifx_Assert.h
Assert functions.
IfxGtm_Atom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Atom_Timer.h:86
IfxGtm_Atom_Timer_Config::atom
IfxGtm_Atom atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:223
IfxGtm_Atom_Timer_setTrigger
void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Atom_Timer.c:328
IfxGtm_Atom_Timer_getOffset
Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Atom_Timer.c:103
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:94
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Atom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Atom_Timer.h:89
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxGtm_Atom_Ch_getClockFrequency
float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the ATOM channel input clock frequency in Hz.
Definition: IfxGtm_Atom.c:279
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Atom_Ch_setCounterValue
void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Atom.c:438
IfxGtm_Atom_Timer_initConfig
void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Timer.c:279
IfxGtm_Atom_Timer_addToChannelMask
void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:71
IfxGtm_Atom_Timer::atomIndex
IfxGtm_Atom atomIndex
Enum for ATOM objects.
Definition: IfxGtm_Atom_Timer.h:106
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:49
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:258
IfxGtm_Atom_Timer_stop
void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Atom_Timer.c:364
IfxGtm_Atom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
Returns a pointer to the ATOM channel SRC.
Definition: IfxGtm_Atom.c:342
IfxGtm_Atom_Agc_enableChannels
void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Atom.c:134
IfxGtm_Atom_Timer_getResolution
float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Atom_Timer.c:121
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:230
IfxGtm_Atom_Timer::agcApplyUpdate
uint32 agcApplyUpdate
AGC value for apply update.
Definition: IfxGtm_Atom_Timer.h:112
IfxGtm_Atom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Atom.c:349
IfxGtm_Atom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Atom.h:60
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:158
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:198
IfxGtm_Atom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Atom_Timer.h:119
IfxGtm_Atom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Atom.h:69
IfxGtm_Atom_Timer::channelsMask
uint16 channelsMask
Mask for channels to be modified together.
Definition: IfxGtm_Atom_Timer.h:109
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:250
IfxGtm_Atom_Timer_disableUpdate
void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Atom_Timer.c:85
IfxGtm_Atom_Timer_updateInputFrequency
void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Atom_Timer.c:370
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:28
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:90
IfxGtm_Atom_Ch_setOneShotMode
void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Atom.c:472
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:70
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:231
IfxGtm_Atom_Ch_isZeroNotification
boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Atom.c:364
IfxGtm_Atom_Timer_acknowledgeTriggerIrq
boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Atom_Timer.c:55
IfxGtm_Atom_Timer::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Timer.h:105
IfxGtm_Atom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Atom_Timer.h:125
IfxGtm_Atom_Timer_acknowledgeTimerIrq
boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Atom_Timer.c:39
IfxGtm_Atom_Timer_getInputFrequency
float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Atom_Timer.c:97
IfxGtm_Atom_Timer::agcDisableUpdate
uint32 agcDisableUpdate
AGC value for disable update.
Definition: IfxGtm_Atom_Timer.h:111
IfxGtm_Atom_Ch_setCompareOneShadow
void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Atom.c:414
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:51
IfxGtm_Atom_Timer_getTrigger
Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Atom_Timer.c:127
IfxGtm_Atom_Ch_setSignalLevel
void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Atom.c:488
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:245
IfxGtm_Atom_Timer_Config::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Atom_Timer.h:124
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:102
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:235
IfxGtm_Atom_Ch_isOneNotification
boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Atom.c:355
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:194
IfxGtm_Atom_Timer_getPeriod
Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Atom_Timer.c:109
IfxGtm_Atom_Timer_run
void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Atom_Timer.c:294
IfxGtm_Atom_Ch_setCompareZeroShadow
void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Atom.c:430
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:227
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:232
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:228
IfxGtm_Atom_Timer_init
boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Atom_Timer.c:139
IfxGtm_Atom_Timer_applyUpdate
void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Atom_Timer.c:79
IfxGtm_Atom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Atom.c:307
IfxGtm_Atom_Ch_getCompareOne
uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Atom.c:299
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:88
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:152
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:238
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:257
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:135
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:88
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:167
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:225
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:261
IfxGtm_Atom_Agc_trigger
void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Atom.c:239
IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Atom_Timer.h:117
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:263
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:204
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:229
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:210
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:244
IfxGtm_Atom_Timer_getTriggerPointer
volatile uint32 * IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Atom_Timer.c:133
IfxGtm_Atom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Atom_Timer.h:110
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:177
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:260
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:248
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:186
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:224
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:701


iLLD_TC26B: IfxGtm_Atom_Timer.h Source File

  • Gtm
  • Atom
  • Timer
IfxGtm_Atom_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Atom_Timer.h
3 * \brief GTM TIMER details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Atom_Timer_Usage How to use the GTM ATOM Timer Driver
25 * \ingroup IfxLld_Gtm_Atom_Timer
26 *
27 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
28 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
29 *
30 * \section Specific Specific implementation
31 * Implementation is similar to \ref IfxLld_Gtm_Tom_Timer.
32 *
33 * \todo Add documentation
34 *
35 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Atom_Timer_init().
36 *
37 * \section Example Usage example
38 * Initialisation:
39 * \code
40 * IfxGtm_Atom_Timer_Config driverConfig;
41 * IfxGtm_Atom_Timer driverData;
42 * IfxStdIf_Timer timer;
43 * IfxGtm_Atom_Timer_initConfig(&driverConfig, &MODULE_GTM);
44 * IfxGtm_Atom_Timer_init (&driverData, &driverConfig);
45 * boolean IfxGtm_Atom_Timer_stdIfTimerInit(&timer, &driverData);
46 * \endcode
47 *
48 * During run-time, \ref library_srvsw_stdif_timer "the interface functions" should be used:
49 * \code
50 * IfxStdIf_Timer_run(timer);
51 * IfxStdIf_Timer_disableUpdate(timer);
52 * IfxStdIf_Timer_setPeriod(timer, period);
53 * IfxStdIf_Timer_applyUpdate(timer);
54 * \endcode
55 *
56 * \defgroup IfxLld_Gtm_Atom_Timer ATOM Timer Interface Driver
57 * \ingroup IfxLld_Gtm_Atom
58 * \defgroup IfxLld_Gtm_Atom_Timer_Timer_StdIf_Functions Timer StdIf Functions
59 * \ingroup IfxLld_Gtm_Atom_Timer
60 * \defgroup IfxLld_Gtm_Atom_Timer_Timer_Functions Timer Functions
61 * \ingroup IfxLld_Gtm_Atom_Timer
62 * \defgroup IfxLld_Gtm_Atom_Timer_Data_Structures Data Structures
63 * \ingroup IfxLld_Gtm_Atom_Timer
64 */
65
66 #ifndef IFXGTM_ATOM_TIMER_H
67 #define IFXGTM_ATOM_TIMER_H 1
68
69 /******************************************************************************/
70 /*----------------------------------Includes----------------------------------*/
71 /******************************************************************************/
72
73 #include "_PinMap/IfxGtm_PinMap.h"
74 #include "Gtm/Std/IfxGtm_Atom.h"
75 #include "Gtm/Std/IfxGtm_Cmu.h"
76 #include "StdIf/IfxStdIf_Timer.h"
77
78 /******************************************************************************/
79 /*-----------------------------Data Structures--------------------------------*/
80 /******************************************************************************/
81
82 /** \addtogroup IfxLld_Gtm_Atom_Timer_Data_Structures
83 * \{ */
84 /** \brief Structure for the timer base
85 */
86 typedef struct
87 {
88 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
89 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
90 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
91 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
92 } IfxGtm_Atom_Timer_Base;
93
94 /** \} */
95
96 /** \addtogroup IfxLld_Gtm_Atom_Timer_Data_Structures
97 * \{ */
98 /** \brief TOM Timer interface
99 */
100 typedef struct
101 {
102 IfxGtm_Atom_Timer_Base base; /**< \brief Timer base structure */
103 Ifx_GTM *gtm; /**< \brief GTM module used for the timer functionality */
104 Ifx_GTM_ATOM *atom; /**< \brief ATOM used for the timer functionality */
105 Ifx_GTM_ATOM_AGC *agc; /**< \brief Pointer to the AGC object */
106 IfxGtm_Atom atomIndex; /**< \brief Enum for ATOM objects */
107 IfxGtm_Atom_Ch timerChannel; /**< \brief ATOM channel used for the timer */
108 IfxGtm_Atom_Ch triggerChannel; /**< \brief ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having the same interrupt level as the timer interrupt */
109 uint16 channelsMask; /**< \brief Mask for channels to be modified together */
110 Ifx_TimerValue offset; /**< \brief Timer initial offset in ticks */
111 uint32 agcDisableUpdate; /**< \brief AGC value for disable update */
112 uint32 agcApplyUpdate; /**< \brief AGC value for apply update */
113 } IfxGtm_Atom_Timer;
114
115 /** \brief Configuration structure for TOM Timer
116 */
117 typedef struct
118 {
119 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
120 Ifx_GTM *gtm; /**< \brief GTM used for the timer functionality */
121 IfxGtm_Atom atom; /**< \brief ATOM used for the timer functionality */
122 IfxGtm_Atom_Ch timerChannel; /**< \brief ATOM channel used for the timer */
123 IfxGtm_Atom_ToutMap *triggerOut; /**< \brief ATOM channel used for the trigger output, can be identical to the timer channe */
124 IfxGtm_Cmu_Clk clock; /**< \brief Timer input clock */
125 IfxGtm_IrqMode irqModeTimer; /**< \brief Interrupt mode for the timer */
126 IfxGtm_IrqMode irqModeTrigger; /**< \brief Interrupt mode for the trigger */
127 boolean initPins; /**< \brief TRUE: Initialize pins in driver
128 * FALSE: Don't initialize pins in driver : user handles separately */
129 } IfxGtm_Atom_Timer_Config;
130
131 /** \} */
132
133 /** \addtogroup IfxLld_Gtm_Atom_Timer_Timer_StdIf_Functions
134 * \{ */
135
136 /******************************************************************************/
137 /*-------------------------Global Function Prototypes-------------------------*/
138 /******************************************************************************/
139
140 /** \brief Returns the timer event
141 * \see IfxStdIf_Timer_AckTimerIrq
142 * \param driver ATOM Timer interface Handle
143 * \return Timer event
144 */
145 IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver);
146
147 /** \brief Returns the trigger event
148 * \see IfxStdIf_Timer_AckTriggerIrq
149 * \param driver ATOM Timer interface Handle
150 * \return Trigger event
151 */
152 IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver);
153
154 /** \brief Add a channel to the channel mask
155 * Channels present in the mask are started, stopped, updated at the same time as the timer:
156 * IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run
157 * \param driver ATOM Timer interface Handle
158 * \param channel Channel to ba added to the mask
159 * \return None
160 */
161 IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel);
162
163 /** \brief Enables the transfer of the shadow registers
164 * \see IfxStdIf_Timer_ApplyUpdate
165 * \param driver ATOM Timer interface Handle
166 * \return None
167 */
168 IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver);
169
170 /** \brief Disables the upadte
171 * \see IfxStdIf_Timer_DisableUpdate
172 * \param driver ATOM Timer interface Handle
173 * \return None
174 */
175 IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver);
176
177 /** \brief Returns the frequency
178 * \see IfxStdIf_Timer_GetFrequency
179 * \param driver ATOM Timer interface Handle
180 * \return Frequency
181 */
182 IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver);
183
184 /** \brief Returns the Input frequncy
185 * \see IfxStdIf_Timer_GetInputFrequency
186 * \param driver ATOM Timer interface Handle
187 * \return Frequency
188 */
189 IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver);
190
191 /** \brief Returns the period of the timer
192 * \see IfxStdIf_Timer_GetPeriod
193 * \param driver ATOM Timer interface Handle
194 * \return Period
195 */
196 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver);
197
198 /** \brief Returns the resolution
199 * \see IfxStdIf_Timer_GetResolution
200 * \param driver ATOM Timer interface Handle
201 * \return Resolution
202 */
203 IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver);
204
205 /** \brief Returns the trigger point
206 * \param driver ATOM Timer interface Handle
207 * \return Trigger point
208 */
209 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver);
210
211 /** \brief Runs the timer
212 * \see IfxStdIf_Timer_Run
213 * \param driver ATOM Timer interface Handle
214 * \return None
215 */
216 IFX_EXTERN void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver);
217
218 /** \brief Sets the frequency
219 * \see IfxStdIf_Timer_SetFrequency
220 * \param driver ATOM Timer interface Handle
221 * \param frequency Frequency
222 * \return TRUE on success else FALSE
223 */
224 IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency);
225
226 /** \brief Sets the period for the timer
227 * \see IfxStdIf_Timer_SetPeriod
228 * \param driver ATOM Timer interface Handle
229 * \param period Period value
230 * \return TRUE on success else FALSE
231 */
232 IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period);
233
234 /** \brief Sets the single shot mode of the timer
235 * \see IfxStdIf_Timer_SetSingleMode
236 * \param driver ATOM Timer interface Handle
237 * \param enabled If TRUE, sets the single shot mode
238 * \return None
239 */
240 IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled);
241
242 /** \brief Sets the trigger
243 * \see IfxStdIf_Timer_SetTrigger
244 * \param driver ATOM Timer interface Handle
245 * \param triggerPoint Trigger point value
246 * \return None
247 */
248 IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint);
249
250 /** \brief Initializes the standard interface timer
251 * \param stdif Standard interface object, will be initialized by the function
252 * \param driver Interface driver to be used by the standard interface. must be initialised separately
253 * \return TRUE on success else FALSE
254 */
255 IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver);
256
257 /** \brief Stops the timer
258 * \see IfxStdIf_Timer_Stop
259 * \param driver ATOM Timer interface Handle
260 * \return None
261 */
262 IFX_EXTERN void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver);
263
264 /** \brief Updates the input frequency
265 * \see IfxStdIf_Timer_UpdateInputFrequency
266 * \param driver ATOM Timer interface Handle
267 * \return None
268 */
269 IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver);
270
271 /** \} */
272
273 /** \addtogroup IfxLld_Gtm_Atom_Timer_Timer_Functions
274 * \{ */
275
276 /******************************************************************************/
277 /*-------------------------Global Function Prototypes-------------------------*/
278 /******************************************************************************/
279
280 /** \brief Returns the initial timer offset in ticks
281 * \see IfxStdIf_Timer_GetOffset
282 * \param driver ATOM Timer interface Handle
283 * \return Returns the initial timer offset in ticks
284 */
285 IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver);
286
287 /** \brief Returns the pointer to timer channel
288 * \param driver ATOM Timer interface Handle
289 * \return Pointer
290 */
291 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver);
292
293 /** \brief Returns the pointer to trigger channel
294 * \param driver ATOM Timer interface Handle
295 * \return Pointer
296 */
297 IFX_EXTERN volatile uint32 *IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver);
298
299 /** \brief Initialises the timer object
300 * \param driver ATOM Timer interface Handle
301 * \param config Configuration structure for ATOM Timer
302 * \return TRUE on success else FALSE
303 */
304 IFX_EXTERN boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config);
305
306 /** \brief Initializes the configuration structure to default
307 * \param config Configuration structure for ATOM Timer
308 * \param gtm Pointer to GTM module
309 * \return None
310 */
311 IFX_EXTERN void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm);
312
313 /** \} */
314
315 #endif /* IFXGTM_ATOM_TIMER_H */
IfxGtm_Atom_Timer_Config::triggerOut
IfxGtm_Atom_ToutMap * triggerOut
ATOM channel used for the trigger output, can be identical to the timer channe.
Definition: IfxGtm_Atom_Timer.h:123
IfxGtm_Atom_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Atom_Timer.c:334
IfxGtm_Atom_Timer_setSingleMode
IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Atom_Timer.c:322
IfxGtm_Atom_Timer_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver : user handles separately...
Definition: IfxGtm_Atom_Timer.h:127
IfxGtm_Atom_Timer_getFrequency
IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Atom_Timer.c:91
IfxGtm_Atom_Timer::atom
Ifx_GTM_ATOM * atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:104
IfxGtm_Atom_Timer::gtm
Ifx_GTM * gtm
GTM module used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:103
IfxGtm_Atom_Timer_setPeriod
IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Atom_Timer.c:308
IfxGtm_Atom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Atom_Timer.h:126
IfxGtm_Atom_Timer_setFrequency
IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Atom_Timer.c:300
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Atom_Timer::timerChannel
IfxGtm_Atom_Ch timerChannel
ATOM channel used for the timer.
Definition: IfxGtm_Atom_Timer.h:107
IfxGtm_Atom_Timer
TOM Timer interface.
Definition: IfxGtm_Atom_Timer.h:100
IfxGtm_Atom_Timer::triggerChannel
IfxGtm_Atom_Ch triggerChannel
ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having ...
Definition: IfxGtm_Atom_Timer.h:108
IfxGtm_Atom_Timer_getPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Atom_Timer.c:115
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:192
IfxGtm_Atom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Atom_Timer.h:86
IfxGtm_Atom_Timer_Config::atom
IfxGtm_Atom atom
ATOM used for the timer functionality.
Definition: IfxGtm_Atom_Timer.h:121
IfxGtm_Atom_Timer_setTrigger
IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Atom_Timer.c:328
IfxGtm_Atom_Timer_getOffset
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Atom_Timer.c:103
IfxGtm_Atom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Atom_Timer.h:89
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:255
IfxGtm_Atom_Timer_initConfig
IFX_EXTERN void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Atom_Timer.c:279
IfxGtm_Atom_Timer_addToChannelMask
IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run.
Definition: IfxGtm_Atom_Timer.c:71
IfxGtm_Atom_Timer::atomIndex
IfxGtm_Atom atomIndex
Enum for ATOM objects.
Definition: IfxGtm_Atom_Timer.h:106
IfxGtm_Atom_Timer_stop
IFX_EXTERN void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Atom_Timer.c:364
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Atom_Timer_getResolution
IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Atom_Timer.c:121
IfxGtm_Atom_Timer::agcApplyUpdate
uint32 agcApplyUpdate
AGC value for apply update.
Definition: IfxGtm_Atom_Timer.h:112
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:85
IfxGtm_Atom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Atom_Timer.h:119
IfxGtm_Atom_Timer::channelsMask
uint16 channelsMask
Mask for channels to be modified together.
Definition: IfxGtm_Atom_Timer.h:109
IfxGtm_Atom_Timer_disableUpdate
IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Atom_Timer.c:85
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Atom_Timer_updateInputFrequency
IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Atom_Timer.c:370
IfxGtm_Atom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Atom_Timer.h:90
IfxStdIf_Timer.h
Standard interface: Timer.
IfxGtm_Atom_Timer_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Atom_Timer.c:55
IfxGtm_Atom_Timer::agc
Ifx_GTM_ATOM_AGC * agc
Pointer to the AGC object.
Definition: IfxGtm_Atom_Timer.h:105
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:68
IfxGtm_Atom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Atom_Timer.h:125
IfxGtm_Atom_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Atom_Timer.c:39
IfxGtm_Atom_Timer_getInputFrequency
IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Atom_Timer.c:97
IfxGtm_Atom_Timer::agcDisableUpdate
uint32 agcDisableUpdate
AGC value for disable update.
Definition: IfxGtm_Atom_Timer.h:111
IfxGtm_Atom_Timer_getTrigger
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Atom_Timer.c:127
IfxGtm_Atom_Timer_Config::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Atom_Timer.h:124
IfxGtm_Atom_Timer::base
IfxGtm_Atom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Atom_Timer.h:102
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Atom_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Atom_Timer.c:109
IfxGtm_Atom_Timer_run
IFX_EXTERN void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Atom_Timer.c:294
IfxGtm_Atom_Timer_init
IFX_EXTERN boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Atom_Timer.c:139
IfxGtm_Atom_Timer_applyUpdate
IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Atom_Timer.c:79
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Atom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Atom_Timer.h:88
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Atom_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxGtm_Atom_Timer.h:91
IfxGtm_Atom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Atom_Timer.h:117
IfxGtm_Atom.h
GTM basic functionality.
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxGtm_Atom_Timer_getTriggerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Atom_Timer.c:133
IfxGtm_Atom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Atom_Timer.h:110
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202


iLLD_TC26B: IfxGtm_Cmu.c Source File

  • Gtm
  • Std
IfxGtm_Cmu.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Cmu.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Cmu.h"
30 #include "IfxGtm_Dpll.h"
31 #include "Scu/Std/IfxScuCcu.h"
32 #include "Scu/Std/IfxScuWdt.h"
33 #include "math.h"
34 #include "IfxGtm_bf.h"
35 #include "IfxGtm.h"
36
37 /******************************************************************************/
38 /*-------------------------Function Implementations---------------------------*/
39 /******************************************************************************/
40
41 void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
42 {
43 gtm->CMU.CLK_EN.U = clkMask;
44 }
45
46
47 float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
48 {
49 float32 frequency;
50
51 if ((IfxGtm_Cmu_isClkClockEnabled(gtm, clkIndex) != FALSE) || (assumeEnabled != FALSE))
52 {
53 switch (clkIndex)
54 {
55 case IfxGtm_Cmu_Clk_0:
56 case IfxGtm_Cmu_Clk_1:
57 case IfxGtm_Cmu_Clk_2:
58 case IfxGtm_Cmu_Clk_3:
59 case IfxGtm_Cmu_Clk_4:
60 case IfxGtm_Cmu_Clk_5:
61 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK0_5[clkIndex].CTRL.B.CLK_CNT + 1);
62 break;
63 case IfxGtm_Cmu_Clk_6:
64
65 if (gtm->CMU.CLK_6.CTRL.B.CLK6_SEL == 0)
66 {
67 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK_6.CTRL.B.CLK_CNT + 1);
68 }
69 else
70 {
71 frequency = IfxGtm_Dpll_getSubIncFrequency(gtm, IfxGtm_Dpll_SubInc_2);
72 }
73
74 break;
75 case IfxGtm_Cmu_Clk_7:
76
77 if (gtm->CMU.CLK_7.CTRL.B.CLK7_SEL == 0)
78 {
79 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK_7.CTRL.B.CLK_CNT + 1);
80 }
81 else
82 {
83 frequency = IfxGtm_Dpll_getSubIncFrequency(gtm, IfxGtm_Dpll_SubInc_1);
84 }
85
86 break;
87 default:
88 frequency = 0.0;
89 break;
90 }
91 }
92 else
93 {
94 frequency = 0.0;
95 }
96
97 return frequency;
98 }
99
100
101 float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
102 {
103 float32 frequency;
104
105 if (IfxGtm_Cmu_isEclkClockEnabled(gtm, clkIndex) || (assumeEnabled != FALSE))
106 {
107 float32 Z = gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM;
108 float32 N = gtm->CMU.ECLK[clkIndex].DEN.B.ECLK_DEN;
109 float32 multiplier = N / Z / 2;
110 frequency = IfxGtm_Cmu_getGclkFrequency(gtm) * multiplier;
111 }
112 else
113 {
114 frequency = 0.0;
115 }
116
117 return frequency;
118 }
119
120
121 float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
122 {
123 float32 frequency;
124 uint8 fxSelect;
125
126 if (IfxGtm_Cmu_isFxClockEnabled(gtm) || (assumeEnabled != FALSE))
127 {
128 fxSelect = gtm->CMU.FXCLK.CTRL.B.FXCLK_SEL;
129
130 if (fxSelect == 0)
131 {
132 frequency = IfxGtm_Cmu_getGclkFrequency(gtm);
133 }
134 else if (fxSelect <= 6)
135 {
136 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_5, assumeEnabled);
137 }
138 else if (fxSelect == 7)
139 {
140 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_6, assumeEnabled);
141 }
142 else if (fxSelect == 8)
143 {
144 frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_7, assumeEnabled);
145 }
146 else
147 {
148 frequency = IfxGtm_Cmu_getGclkFrequency(gtm);
149 }
150
151 switch (clkIndex)
152 {
153 case IfxGtm_Cmu_Fxclk_0:
154 frequency = frequency / 1;
155 break;
156 case IfxGtm_Cmu_Fxclk_1:
157 frequency = frequency / 16;
158 break;
159 case IfxGtm_Cmu_Fxclk_2:
160 frequency = frequency / 256;
161 break;
162 case IfxGtm_Cmu_Fxclk_3:
163 frequency = frequency / 4096;
164 break;
165 case IfxGtm_Cmu_Fxclk_4:
166 frequency = frequency / 65536;
167 break;
168 default:
169 frequency = 0.0;
170 break;
171 }
172 }
173 else
174 {
175 frequency = 0.0;
176 }
177
178 return frequency;
179 }
180
181
182 float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
183 {
184 float32 N = gtm->CMU.GCLK_DEN.B.GCLK_DEN;
185 float32 Z = gtm->CMU.GCLK_NUM.B.GCLK_NUM;
186 float32 multiplier = N / Z;
187
188 return IfxGtm_Cmu_getModuleFrequency(gtm) * multiplier;
189 }
190
191
192 float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
193 {
194 return IfxGtm_getSysClkFrequency();
195 }
196
197
198 boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
199 {
200 return ((gtm->CMU.CLK_EN.U >> (2 * clkIndex)) & IFX_GTM_CMU_CLK_EN_EN_CLK0_MSK) == 0x3;
201 }
202
203
204 boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
205 {
206 return ((gtm->CMU.CLK_EN.U >> (2 * clkIndex + 16)) & IFX_GTM_CMU_CLK_EN_EN_CLK0_MSK) == 0x3;
207 }
208
209
210 boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
211 {
212 return gtm->CMU.CLK_EN.B.EN_FXCLK == 0x3;
213 }
214
215
216 void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
217 {
218 switch (clkIndex)
219 {
220 case IfxGtm_Cmu_Clk_6:
221 gtm->CMU.CLK_6.CTRL.B.CLK6_SEL = useGlobal ? 0 : 1;
222 break;
223 case IfxGtm_Cmu_Clk_7:
224 gtm->CMU.CLK_7.CTRL.B.CLK7_SEL = useGlobal ? 0 : 1;
225 break;
226 default:
227 break;
228 }
229 }
230
231
232 void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
233 {
234 float32 t = (IfxGtm_Cmu_getGclkFrequency(gtm) / frequency) - 1;
235 uint32 cnt = (uint32)t;
236
237 if ((t - (float32)cnt) > 0.5)
238 { /* Round to nearest */
239 cnt++;
240 }
241
242 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
243 IfxScuWdt_clearCpuEndinit(psw);
244
245 switch (clkIndex)
246 {
247 case IfxGtm_Cmu_Clk_0:
248 case IfxGtm_Cmu_Clk_1:
249 case IfxGtm_Cmu_Clk_2:
250 case IfxGtm_Cmu_Clk_3:
251 case IfxGtm_Cmu_Clk_4:
252 case IfxGtm_Cmu_Clk_5:
253 gtm->CMU.CLK0_5[clkIndex].CTRL.B.CLK_CNT = cnt;
254 break;
255 case IfxGtm_Cmu_Clk_6:
256 gtm->CMU.CLK_6.CTRL.B.CLK_CNT = cnt;
257 break;
258 case IfxGtm_Cmu_Clk_7:
259 gtm->CMU.CLK_7.CTRL.B.CLK_CNT = cnt;
260 break;
261 default:
262 break;
263 }
264
265 IfxScuWdt_setCpuEndinit(psw);
266 }
267
268
269 void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
270 {
271 float32 f;
272 float32 bestDistance = frequency;
273 float32 fIn = IfxGtm_Cmu_getGclkFrequency(gtm) * 2;
274 uint32 z, n, nBest = 1, zBest = 1;
275 float32 t;
276
277 for (z = 1; z < 0xFFFFFF; z++)
278 {
279 boolean endLoop = FALSE;
280 t = fIn / z;
281
282 for (n = z; n > 0; n--)
283 {
284 float32 distance;
285 f = t * n;
286 distance = fabsf(frequency - f);
287
288 if (distance < bestDistance)
289 {
290 bestDistance = distance;
291 nBest = n;
292 zBest = z;
293 }
294
295 if (bestDistance < 0.1)
296 {
297 endLoop = TRUE;
298 break;
299 }
300 }
301
302 if (endLoop)
303 {
304 break;
305 }
306 }
307
308 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
309 IfxScuWdt_clearCpuEndinit(psw);
310 gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM = zBest;
311 gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM = zBest; /* write twice to be sure */
312 gtm->CMU.ECLK[clkIndex].DEN.B.ECLK_DEN = nBest;
313 IfxScuWdt_setCpuEndinit(psw);
314 }
315
316
317 void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
318 {
319 float32 f;
320 float32 bestDistance = frequency;
321
322 float32 fIn = IfxGtm_Cmu_getModuleFrequency(gtm);
323 uint32 z, n, nBest = 1, zBest = 1;
324 float32 t;
325
326 #if 1
327
328 for (z = 1; z < 0xFFFFFF; z++)
329 {
330 boolean endLoop = FALSE;
331 t = fIn / z;
332
333 for (n = z; n > 0; n--)
334 {
335 float32 distance;
336 f = t * n;
337 distance = fabsf(frequency - f);
338
339 if (distance < bestDistance)
340 {
341 bestDistance = distance;
342 nBest = n;
343 zBest = z;
344 }
345
346 if (bestDistance < 0.1)
347 {
348 endLoop = TRUE;
349 break;
350 }
351 }
352
353 if (endLoop)
354 {
355 break;
356 }
357 }
358
359 #else
360
361 for (n = 1; n < 0xFFFFFF; n++)
362 {
363 float32 distance;
364 /* get best z */
365 z = floorf(frequency * n / fIn);
366 t = fIn / n;
367
368 /* lower value */
369 f = t * z;
370 distance = fabsf(frequency - f);
371
372 if (distance < bestDistance)
373 {
374 bestDistance = distance;
375 nBest = n;
376 zBest = z;
377 }
378
379 /* upper value */
380 f = t * (z + 1);
381 distance = fabsf(frequency - f);
382
383 if (distance < bestDistance)
384 {
385 bestDistance = distance;
386 nBest = n;
387 zBest = z;
388 }
389
390 if (bestDistance == 0.0)
391 {
392 break;
393 }
394 }
395
396 #endif
397
398 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
399 IfxScuWdt_clearCpuEndinit(psw);
400 gtm->CMU.GCLK_NUM.B.GCLK_NUM = zBest;
401 gtm->CMU.GCLK_NUM.B.GCLK_NUM = zBest; /* write twice to be sure */
402 gtm->CMU.GCLK_DEN.B.GCLK_DEN = nBest;
403 IfxScuWdt_setCpuEndinit(psw);
404 }
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:72
IfxGtm_Cmu_enableClocks
void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks.
Definition: IfxGtm_Cmu.c:41
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:71
IfxGtm_Dpll_SubInc_1
subincrement1
Definition: IfxGtm_cfg.h:219
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:68
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Cmu_getEclkFrequency
float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:101
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxGtm_Cmu_getGclkFrequency
float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:182
IfxGtm_Cmu_setClkFrequency
void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:232
IfxGtm_Dpll.h
GTM basic functionality.
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Cmu_setEclkFrequency
void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:269
IfxGtm_Cmu_Clk_5
Definition: IfxGtm_Cmu.h:54
IfxGtm_Cmu_isClkClockEnabled
boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status.
Definition: IfxGtm_Cmu.c:198
IfxGtm_Cmu_setGclkFrequency
void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:317
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:69
IfxScuWdt.h
SCU basic functionality.
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:49
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxGtm_getSysClkFrequency
float32 IfxGtm_getSysClkFrequency(void)
returns the GTM SYSCLK frequency. Refer to the Clock distribution for details on GTM SYS CLK...
Definition: IfxGtm.c:57
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:55
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:66
IfxGtm_Cmu_Clk_4
Definition: IfxGtm_Cmu.h:53
IfxGtm_Cmu_Eclk
IfxGtm_Cmu_Eclk
Definition: IfxGtm_Cmu.h:59
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:70
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Cmu_Clk_2
Definition: IfxGtm_Cmu.h:51
t
uint32 ins t
Definition: IfxCpu_IntrinsicsDcc.h:397
IfxGtm_Cmu_Clk_3
Definition: IfxGtm_Cmu.h:52
IfxGtm_Cmu_getFxClkFrequency
float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:121
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Dpll_SubInc_2
subincrement2
Definition: IfxGtm_cfg.h:220
IfxScuCcu.h
SCU basic functionality.
IfxGtm_Cmu_getModuleFrequency
float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency:...
Definition: IfxGtm_Cmu.c:192
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Cmu_selectClkInput
void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the correspondi...
Definition: IfxGtm_Cmu.c:216
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxGtm_Cmu_isFxClockEnabled
boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
Returns the fixed clock enable status.
Definition: IfxGtm_Cmu.c:210
IfxGtm_Cmu_isEclkClockEnabled
boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status.
Definition: IfxGtm_Cmu.c:204
TRUE
#define TRUE
Definition: Platform_Types.h:87
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm.h
GTM basic functionality.
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:50
IfxGtm_Dpll_getSubIncFrequency
float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:35
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:47
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:56


iLLD_TC26B: IfxGtm_Cmu.h Source File

  • Gtm
  • Std
IfxGtm_Cmu.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Cmu.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Std_Cmu Cmu Basic Functionality
25 * \ingroup IfxLld_Gtm_Std
26 * \defgroup IfxLld_Gtm_Std_Cmu_CMUEnumerations CMU Enumerations
27 * \ingroup IfxLld_Gtm_Std_Cmu
28 * \defgroup IfxLld_Gtm_Std_Cmu_CMU_Basic_Functions CMU Basic Functions
29 * \ingroup IfxLld_Gtm_Std_Cmu
30 */
31
32 #ifndef IFXGTM_CMU_H
33 #define IFXGTM_CMU_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "_Impl/IfxGtm_cfg.h"
40
41 /******************************************************************************/
42 /*--------------------------------Enumerations--------------------------------*/
43 /******************************************************************************/
44
45 /** \addtogroup IfxLld_Gtm_Std_Cmu_CMUEnumerations
46 * \{ */
47 typedef enum
48 {
49 IfxGtm_Cmu_Clk_0 = 0,
50 IfxGtm_Cmu_Clk_1,
51 IfxGtm_Cmu_Clk_2,
52 IfxGtm_Cmu_Clk_3,
53 IfxGtm_Cmu_Clk_4,
54 IfxGtm_Cmu_Clk_5,
55 IfxGtm_Cmu_Clk_6,
56 IfxGtm_Cmu_Clk_7
57 } IfxGtm_Cmu_Clk;
58
59 typedef enum
60 {
61 IfxGtm_Cmu_Eclk_0 = 0,
62 IfxGtm_Cmu_Eclk_1,
63 IfxGtm_Cmu_Eclk_2
64 } IfxGtm_Cmu_Eclk;
65
66 typedef enum
67 {
68 IfxGtm_Cmu_Fxclk_0 = 0,
69 IfxGtm_Cmu_Fxclk_1,
70 IfxGtm_Cmu_Fxclk_2,
71 IfxGtm_Cmu_Fxclk_3,
72 IfxGtm_Cmu_Fxclk_4
73 } IfxGtm_Cmu_Fxclk;
74
75 /** \brief Tim Filter counter frequency select
76 */
77 typedef enum
78 {
79 IfxGtm_Cmu_Tim_Filter_Clk_0, /**< \brief FLT_CNT counts with CMU_CLK0 */
80 IfxGtm_Cmu_Tim_Filter_Clk_1, /**< \brief FLT_CNT counts with CMU_CLK1 */
81 IfxGtm_Cmu_Tim_Filter_Clk_6, /**< \brief FLT_CNT counts with CMU_CLK6 */
82 IfxGtm_Cmu_Tim_Filter_Clk_7 /**< \brief FLT_CNT counts with CMU_CLK7 */
83 } IfxGtm_Cmu_Tim_Filter_Clk;
84
85 /** \} */
86
87 /** \addtogroup IfxLld_Gtm_Std_Cmu_CMU_Basic_Functions
88 * \{ */
89
90 /******************************************************************************/
91 /*-------------------------Global Function Prototypes-------------------------*/
92 /******************************************************************************/
93
94 /** \brief Enable / Disable the configurable, fixed, and external clocks
95 * \param gtm Pointer to GTM module
96 * \param clkMask Enable / Disable mask.
97 * \return None
98 */
99 IFX_EXTERN void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask);
100
101 /** \brief Returns the GTM configurable clock frequency in Hz
102 * \param gtm Pointer to GTM module
103 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
104 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
105 * \return GTM configurable clock frequency in Hz
106 */
107 IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled);
108
109 /** \brief Returns the GTM external clock frequency in Hz
110 * \param gtm Pointer to GTM module
111 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
112 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
113 * \return GTM external clock frequency in Hz
114 */
115 IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled);
116
117 /** \brief Returns the GTM fixed clock frequency in Hz
118 * \param gtm Pointer to GTM module
119 * \param clkIndex Index of the fixed clock 0=CMU_FXCLK0, 1=CMU_FXCLK1, ...
120 * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
121 * \return GTM fixed clock frequency in Hz
122 */
123 IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled);
124
125 /** \brief Returns the GTM global clock frequency in Hz
126 * \param gtm Pointer to GTM module
127 * \return GTM global clock frequency in Hz
128 */
129 IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm);
130
131 /** \brief returns the CMU module frequency in Hz. This is only for CMU module frequency.
132 * For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used.
133 * \param gtm Pointer to GTM module
134 * \return GTM module frequency in Hz
135 */
136 IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm);
137
138 /** \brief Returns the configurable clock enable status
139 * \param gtm Pointer to GTM module
140 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
141 * \return TRUE The clock is enabled, FALSE The clock is disabled
142 */
143 IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex);
144
145 /** \brief Returns the external clock enable status
146 * \param gtm Pointer to GTM module
147 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
148 * \return TRUE The clock is enabled, FALSE The clock is disabled
149 */
150 IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex);
151
152 /** \brief Returns the fixed clock enable status
153 * \param gtm Pointer to GTM module
154 * \return TRUE The clock is enabled, FALSE The clock is disabled
155 */
156 IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm);
157
158 /** \brief Select the clock input for CLK6 and CLK7
159 * note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks()
160 * \param gtm Pointer to GTM module
161 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
162 * \param useGlobal if TRUE, uses the global clock as an input, else use the SUB_INC input
163 * \return None
164 */
165 IFX_EXTERN void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal);
166
167 /** \brief Set the GTM configurable clock frequency in Hz
168 * \param gtm Pointer to GTM module
169 * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
170 * \param frequency Frequency in Hz
171 * \return None
172 */
173 IFX_EXTERN void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency);
174
175 /** \brief Set the GTM external clock frequency in Hz
176 * \param gtm Pointer to GTM module
177 * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
178 * \param frequency Frequency in Hz
179 * \return None
180 */
181 IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency);
182
183 /** \brief Set the GTM global clock frequency in Hz
184 * \param gtm Pointer to GTM module
185 * \param frequency Frequency in Hz
186 * \return None
187 */
188 IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency);
189
190 /** \} */
191
192 #endif /* IFXGTM_CMU_H */
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:72
IfxGtm_Cmu_enableClocks
IFX_EXTERN void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
Enable / Disable the configurable, fixed, and external clocks.
Definition: IfxGtm_Cmu.c:41
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:71
IfxGtm_Cmu_Tim_Filter_Clk_6
FLT_CNT counts with CMU_CLK6.
Definition: IfxGtm_Cmu.h:81
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:68
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Cmu_getEclkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
Returns the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:101
IfxGtm_Cmu_getGclkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
Returns the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:182
IfxGtm_Cmu_setClkFrequency
IFX_EXTERN void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
Set the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:232
IfxGtm_Cmu_setEclkFrequency
IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
Set the GTM external clock frequency in Hz.
Definition: IfxGtm_Cmu.c:269
IfxGtm_Cmu_Tim_Filter_Clk_1
FLT_CNT counts with CMU_CLK1.
Definition: IfxGtm_Cmu.h:80
IfxGtm_Cmu_Clk_5
Definition: IfxGtm_Cmu.h:54
IfxGtm_Cmu_isClkClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
Returns the configurable clock enable status.
Definition: IfxGtm_Cmu.c:198
IfxGtm_Cmu_setGclkFrequency
IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
Set the GTM global clock frequency in Hz.
Definition: IfxGtm_Cmu.c:317
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:69
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:49
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:77
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:55
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:66
IfxGtm_Cmu_Clk_4
Definition: IfxGtm_Cmu.h:53
IfxGtm_Cmu_Tim_Filter_Clk_7
FLT_CNT counts with CMU_CLK7.
Definition: IfxGtm_Cmu.h:82
IfxGtm_Cmu_Eclk
IfxGtm_Cmu_Eclk
Definition: IfxGtm_Cmu.h:59
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:70
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Cmu_Clk_2
Definition: IfxGtm_Cmu.h:51
IfxGtm_Cmu_Clk_3
Definition: IfxGtm_Cmu.h:52
IfxGtm_Cmu_Eclk_1
Definition: IfxGtm_Cmu.h:62
IfxGtm_Cmu_getFxClkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:121
IfxGtm_Cmu_getModuleFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
returns the CMU module frequency in Hz. This is only for CMU module frequency. For GTM SYS frequency:...
Definition: IfxGtm_Cmu.c:192
IfxGtm_Cmu_selectClkInput
IFX_EXTERN void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
Select the clock input for CLK6 and CLK7 note The frequency can only be modified when the correspondi...
Definition: IfxGtm_Cmu.c:216
IfxGtm_Cmu_isFxClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
Returns the fixed clock enable status.
Definition: IfxGtm_Cmu.c:210
IfxGtm_Cmu_isEclkClockEnabled
IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
Returns the external clock enable status.
Definition: IfxGtm_Cmu.c:204
IfxGtm_Cmu_Eclk_2
Definition: IfxGtm_Cmu.h:63
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:50
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Cmu_Eclk_0
Definition: IfxGtm_Cmu.h:61
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:79
IfxGtm_Cmu_getClkFrequency
IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:47
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:56


iLLD_TC26B: IfxGtm_Dpll.c Source File

  • Gtm
  • Std
IfxGtm_Dpll.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Dpll.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Dpll.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
36 {
37 IFX_UNUSED_PARAMETER(gtm)
38 IFX_UNUSED_PARAMETER(index)
39 return 0.0F;
40 }
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Dpll.h
GTM basic functionality.
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:217
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxGtm_Dpll_getSubIncFrequency
float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:35


iLLD_TC26B: IfxGtm_Dpll.h Source File

  • Gtm
  • Std
IfxGtm_Dpll.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Dpll.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Std_Dpll Dpll Basic Functionality
25 * \ingroup IfxLld_Gtm_Std
26 * \defgroup IfxLld_Gtm_Std_Dpll_Basic_Functions DPLL Basic Functions
27 * \ingroup IfxLld_Gtm_Std_Dpll
28 */
29
30 #ifndef IFXGTM_DPLL_H
31 #define IFXGTM_DPLL_H 1
32
33 /******************************************************************************/
34 /*----------------------------------Includes----------------------------------*/
35 /******************************************************************************/
36
37 #include "_Impl/IfxGtm_cfg.h"
38 /** \addtogroup IfxLld_Gtm_Std_Dpll_Basic_Functions
39 * \{ */
40
41 /******************************************************************************/
42 /*-------------------------Global Function Prototypes-------------------------*/
43 /******************************************************************************/
44
45 /** \brief Dummy Function, returns 0.0F
46 * \param gtm Pointer to GTM module
47 * \param index Dpll subincrement index
48 * \return frequency
49 */
50 IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index);
51
52 /** \} */
53
54 #endif /* IFXGTM_DPLL_H */
float32
float float32
Definition: Platform_Types.h:167
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:217
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Dpll_getSubIncFrequency
IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
Dummy Function, returns 0.0F.
Definition: IfxGtm_Dpll.c:35


iLLD_TC26B: IfxGtm_PinMap.c Source File

  • _PinMap
IfxGtm_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_PinMap.c
3 * \brief GTM I/O map
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxGtm_PinMap.h"
27
28 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
29 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
30 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
31 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
32 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
33 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
34 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
35 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
36 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
37 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
38 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
39 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
40 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
41 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
42 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
43 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
44 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
45 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
46 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
47 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
48 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
49 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
50 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
51 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
52 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
53 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
54 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
55 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
56 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
57 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
58 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
59 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
60 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
61 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
62 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
63 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
64 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
65 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
66 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
67 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
68 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
69 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
70 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
71 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
72 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
73 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
74 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
75 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
76 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
77 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
78 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
79 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
80 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
81 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
82 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
83 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
84 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
85 IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
86 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
87 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
88 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
89 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
90 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
91 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
92 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
93 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
94 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
95 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
96 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
97 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
98 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
99 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
100 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
101 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
102 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
103 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
104 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
105 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
106 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
107 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
108 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
109 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
110 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
111 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
112 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
113 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
114 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
115 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
116 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
117 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
118 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
119 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
120 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
121 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
122 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
123 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
124 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
125 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
126 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
127 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
128 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
129 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
130 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
131 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
132 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
133 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
134 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
135 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
136 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
137 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
138 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
139 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
140 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
141 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
142 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
143 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
144 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
145 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
146 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
147 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
148 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
149 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
150 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
151 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
152 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
153 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
154 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
155 IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
156 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
157 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
158 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
159 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
160 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
161 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
162 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
163 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
164 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
165 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
166 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
167 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
168 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
169 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
170 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
171 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
172 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
173 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
174 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
175 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
176 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
177 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
178 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
179 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
180 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
181 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
182 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
183 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
184 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
185 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
186 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
187 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
188 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
189 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
190 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
191 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
192 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
193 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
194 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
195 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
196 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
197 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
198 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
199 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
200 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
201 IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
202 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
203 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
204 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
205 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
206 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
207 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
208 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
209 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
210 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
211 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
212 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
213 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
214 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
215 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
216 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
217 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
218 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
219 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
220 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
221 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
222 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
223 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
224 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
225 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
226 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
227 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
228 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
229 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
230 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
231 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
232 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
233 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
234 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
235 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
236 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
237 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
238 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
239 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
240 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
241 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
242 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
243 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
244 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
245 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
246 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
247 IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
248 IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4};
249 IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4};
250 IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3};
251 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2};
252 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3};
253 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1};
254 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};
255 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9};
256 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)12};
257 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8};
258 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7};
259 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6};
260 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4};
261 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5};
262 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)11};
263 IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)13};
264 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3};
265 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)10};
266 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11};
267 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1};
268 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2};
269 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8};
270 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9};
271 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)12};
272 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7};
273 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6};
274 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5};
275 IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4};
276 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3};
277 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4};
278 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1};
279 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9};
280 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2};
281 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8};
282 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)11};
283 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7};
284 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6};
285 IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5};
286 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3};
287 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4};
288 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1};
289 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9};
290 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8};
291 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2};
292 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7};
293 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11};
294 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6};
295 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)10};
296 IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5};
297 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2};
298 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6};
299 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7};
300 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5};
301 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1};
302 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4};
303 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 1}, (IfxGtm_ChXSel)10};
304 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8};
305 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)9};
306 IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3};
307 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2};
308 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6};
309 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5};
310 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4};
311 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7};
312 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1};
313 IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3};
314 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)1};
315 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6};
316 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4};
317 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5};
318 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7};
319 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)2};
320 IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3};
321 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6};
322 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4};
323 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5};
324 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)7};
325 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3};
326 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1};
327 IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2};
328 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2};
329 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)14};
330 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1};
331 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};
332 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9};
333 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8};
334 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7};
335 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)15};
336 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)5};
337 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6};
338 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4};
339 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)13};
340 IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3};
341 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3};
342 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)14};
343 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2};
344 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8};
345 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9};
346 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7};
347 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6};
348 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)10};
349 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5};
350 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4};
351 IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)1};
352 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3};
353 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4};
354 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1};
355 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)14};
356 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9};
357 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2};
358 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8};
359 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)15};
360 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6};
361 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)10};
362 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5};
363 IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)7};
364 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3};
365 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4};
366 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};
367 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11};
368 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9};
369 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8};
370 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2};
371 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7};
372 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6};
373 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)10};
374 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5};
375 IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)12};
376 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2};
377 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)9};
378 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6};
379 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7};
380 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5};
381 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1};
382 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4};
383 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8};
384 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)12};
385 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3};
386 IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)11};
387 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2};
388 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)11};
389 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5};
390 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4};
391 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7};
392 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1};
393 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)9};
394 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)8};
395 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3};
396 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)6};
397 IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)12};
398 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)12};
399 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2};
400 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11};
401 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6};
402 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4};
403 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5};
404 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7};
405 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)9};
406 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1};
407 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)8};
408 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3};
409 IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)13};
410 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)12};
411 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11};
412 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6};
413 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4};
414 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5};
415 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3};
416 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)8};
417 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)7};
418 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1};
419 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2};
420 IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)9};
421 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6};
422 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5};
423 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4};
424 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2};
425 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3};
426 IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1};
427 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1};
428 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2};
429 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5};
430 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4};
431 IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3};
432 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1};
433 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5};
434 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4};
435 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3};
436 IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2};
437 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};
438 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5};
439 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4};
440 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3};
441 IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2};
442 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1};
443 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6};
444 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5};
445 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4};
446 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3};
447 IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2};
448 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1};
449 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6};
450 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5};
451 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4};
452 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3};
453 IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2};
454 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2};
455 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1};
456 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5};
457 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6};
458 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4};
459 IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3};
460 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2};
461 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1};
462 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5};
463 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6};
464 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4};
465 IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3};
466 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
467 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
468 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
469 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
470 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
471 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
472 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
473 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
474 IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
475 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
476 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
477 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
478 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
479 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
480 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
481 IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
482 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
483 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
484 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
485 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
486 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
487 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
488 IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
489 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
490 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
491 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
492 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
493 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
494 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
495 IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
496 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
497 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
498 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
499 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
500 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
501 IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
502 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
503 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
504 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
505 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
506 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
507 IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
508 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
509 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
510 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
511 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
512 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
513 IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
514 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
515 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
516 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
517 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
518 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
519 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
520 IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
521 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
522 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
523 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
524 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
525 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
526 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
527 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
528 IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
529 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
530 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
531 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
532 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
533 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
534 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
535 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
536 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
537 IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
538 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
539 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
540 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
541 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
542 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
543 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
544 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
545 IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
546 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
547 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
548 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
549 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
550 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
551 IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
552 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
553 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
554 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
555 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
556 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
557 IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
558 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
559 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
560 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
561 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
562 IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
563 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
564 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
565 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
566 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
567 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
568 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
569 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
570 IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
571 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
572 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
573 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
574 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
575 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
576 IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
577 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
578 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
579 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
580 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
581 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
582 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
583 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
584 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
585 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
586 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
587 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
588 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
589 IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
590 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
591 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
592 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
593 IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
594 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
595 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
596 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
597 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
598 IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
599 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
600 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
601 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
602 IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
603 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
604 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
605 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
606 IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
607 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
608 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
609 IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
610 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
611 IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
612 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
613 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
614 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
615 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
616 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
617 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
618 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
619 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
620 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
621 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
622 IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
623 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
624 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
625 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
626 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
627 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
628 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
629 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
630 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
631 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
632 IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
633 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
634 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
635 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
636 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
637 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
638 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
639 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
640 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
641 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
642 IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
643 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
644 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
645 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
646 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
647 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
648 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
649 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
650 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
651 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
652 IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
653 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
654 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
655 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
656 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
657 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
658 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
659 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
660 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
661 IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
662 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
663 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
664 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
665 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
666 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
667 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
668 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
669 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
670 IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
671 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
672 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
673 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
674 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
675 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
676 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
677 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
678 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
679 IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
680 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
681 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
682 IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
683 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
684 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
685 IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
686
687 #include "IfxGtm_bf.h"
688
689 void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
690 {
691 uint32 shift = config->channel * 4;
692
693 __ldmst_c(&(MODULE_GTM.INOUTSEL.TIM[config->tim].INSEL.U), (0xFU << shift), ((uint32)config->select) << shift);
694
695 if (inputMode != IfxPort_InputMode_undefined)
696 {
697 IfxPort_setPinModeInput(config->pin.port, config->pin.pinIndex, inputMode);
698 }
699 }
700
701 void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
702 {
703 uint32 outselReg = (config->toutn >> 4);
704 uint32 shift = (config->toutn & 0xFU) * 2;
705 uint32 outsel = (uint32)config->toutSel << shift;
706 uint32 mask = 0x3U << shift;
707
708 __ldmst_c(&(MODULE_GTM.INOUTSEL.T.OUTSEL[outselReg].U), mask, outsel);
709 IfxPort_setPinModeOutput(config->pin.port, config->pin.pinIndex, outputMode, config->select);
710 IfxPort_setPinPadDriver(config->pin.port, config->pin.pinIndex, padDriver);
711 }
712
713 void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
714 {
715 uint32 outselReg = (config->toutn >> 4);
716 uint32 shift = (config->toutn & 0xFU) * 2;
717 uint32 outsel = (uint32)config->toutSel << shift;
718 uint32 mask = 0x3U << shift;
719
720 __ldmst_c(&(MODULE_GTM.INOUTSEL.T.OUTSEL[outselReg].U), mask, outsel);
721 IfxPort_setPinModeOutput(config->pin.port, config->pin.pinIndex, outputMode, config->select);
722 IfxPort_setPinPadDriver(config->pin.port, config->pin.pinIndex, padDriver);
723 }
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
Definition: IfxGtm_PinMap.c:61
IfxGtm_TIM0_1_TIN19_P00_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN
Definition: IfxGtm_PinMap.c:267
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
Definition: IfxGtm_PinMap.c:58
IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
Definition: IfxGtm_PinMap.c:607
IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT
Definition: IfxGtm_PinMap.c:638
IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
Definition: IfxGtm_PinMap.c:602
IfxGtm_TIM0_5_TIN41_P23_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN
Definition: IfxGtm_PinMap.c:310
IfxGtm_TIM1_0_TIN76_P15_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN
Definition: IfxGtm_PinMap.c:336
IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
Definition: IfxGtm_PinMap.c:544
IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
Definition: IfxGtm_PinMap.c:568
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
Definition: IfxGtm_PinMap.c:136
IfxGtm_TIM1_0_TIN18_P00_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN
Definition: IfxGtm_PinMap.c:330
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
Definition: IfxGtm_PinMap.c:90
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
Definition: IfxGtm_PinMap.c:201
IfxGtm_TIM2_0_TIN34_P33_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN
Definition: IfxGtm_PinMap.c:421
IfxGtm_Atom_2
ATOM object 2.
Definition: IfxGtm_cfg.h:196
IfxGtm_TIM1_1_TIN78_P15_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN
Definition: IfxGtm_PinMap.c:349
IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT
Definition: IfxGtm_PinMap.c:586
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
Definition: IfxGtm_PinMap.c:187
IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
Definition: IfxGtm_PinMap.c:668
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
Definition: IfxGtm_PinMap.c:40
IfxGtm_TIM1_7_TIN17_P00_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN
Definition: IfxGtm_PinMap.c:411
IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
Definition: IfxGtm_PinMap.c:501
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
Definition: IfxGtm_PinMap.c:38
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
Definition: IfxGtm_PinMap.c:62
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
Definition: IfxGtm_PinMap.c:149
IfxGtm_TIM0_3_TIN105_P10_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN
Definition: IfxGtm_PinMap.c:286
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:237
IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
Definition: IfxGtm_PinMap.c:526
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
Definition: IfxGtm_PinMap.c:59
IfxGtm_TIM1_6_TIN42_P23_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN
Definition: IfxGtm_PinMap.c:402
IfxGtm_PinMap_setTimTin
void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:689
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
Definition: IfxGtm_PinMap.c:233
IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
Definition: IfxGtm_PinMap.c:570
IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
Definition: IfxGtm_PinMap.c:540
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
Definition: IfxGtm_PinMap.c:152
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
Definition: IfxGtm_PinMap.c:214
IfxGtm_Tom_1
TOM object 1.
Definition: IfxGtm_cfg.h:261
IfxGtm_TIM2_3_TIN60_P20_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN
Definition: IfxGtm_PinMap.c:438
IfxGtm_TIM0_2_TIN104_P10_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN
Definition: IfxGtm_PinMap.c:276
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
Definition: IfxGtm_PinMap.c:206
IfxGtm_TIM0_4_TIN57_P21_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN
Definition: IfxGtm_PinMap.c:304
IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT
Definition: IfxGtm_PinMap.c:591
IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT
Definition: IfxGtm_PinMap.c:490
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
Definition: IfxGtm_PinMap.c:197
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
Definition: IfxGtm_PinMap.c:207
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
Definition: IfxGtm_PinMap.c:128
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
Definition: IfxGtm_PinMap.c:224
IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT
Definition: IfxGtm_PinMap.c:560
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
Definition: IfxGtm_PinMap.c:153
IfxGtm_TIM1_5_TIN99_P11_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN
Definition: IfxGtm_PinMap.c:397
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
Definition: IfxGtm_PinMap.c:81
IfxGtm_TIM0_4_TIN4_P02_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN
Definition: IfxGtm_PinMap.c:301
IfxGtm_Clk_Out
GTM Clock Output.
Definition: IfxGtm_PinMap.h:110
IfxGtm_TIM2_4_TIN72_P15_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN
Definition: IfxGtm_PinMap.c:445
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
Definition: IfxGtm_PinMap.c:215
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
Definition: IfxGtm_PinMap.c:130
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
Definition: IfxGtm_PinMap.c:120
IfxGtm_Atom_ToutMap::toutn
uint32 toutn
TOUT number.
Definition: IfxGtm_PinMap.h:90
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
Definition: IfxGtm_PinMap.c:174
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
Definition: IfxGtm_PinMap.c:35
IfxGtm_TIM0_1_TIN10_P00_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN
Definition: IfxGtm_PinMap.c:265
IfxGtm_TIM0_0_TIN87_P14_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN
Definition: IfxGtm_PinMap.c:261
IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT
Definition: IfxGtm_PinMap.c:660
IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
Definition: IfxGtm_PinMap.c:547
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
Definition: IfxGtm_PinMap.c:202
IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
Definition: IfxGtm_PinMap.c:562
IfxGtm_TIM2_7_TIN63_P20_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN
Definition: IfxGtm_PinMap.c:462
IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
Definition: IfxGtm_PinMap.c:673
IfxGtm_TIM1_5_TIN82_P14_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN
Definition: IfxGtm_PinMap.c:395
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
Definition: IfxGtm_PinMap.c:208
IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
Definition: IfxGtm_PinMap.c:495
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
Definition: IfxGtm_PinMap.c:162
IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
Definition: IfxGtm_PinMap.c:614
IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT
Definition: IfxGtm_PinMap.c:507
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
Definition: IfxGtm_PinMap.c:94
IfxGtm_TIM0_5_TIN23_P33_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN
Definition: IfxGtm_PinMap.c:308
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
Definition: IfxGtm_PinMap.c:37
IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
Definition: IfxGtm_PinMap.c:645
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
Definition: IfxGtm_PinMap.c:79
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
Definition: IfxGtm_PinMap.c:181
IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT
Definition: IfxGtm_PinMap.c:504
IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
Definition: IfxGtm_PinMap.c:523
IfxGtm_TIM0_3_TIN60_P20_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN
Definition: IfxGtm_PinMap.c:295
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
Definition: IfxGtm_PinMap.c:157
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
Definition: IfxGtm_PinMap.c:169
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
Definition: IfxGtm_PinMap.c:173
IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
Definition: IfxGtm_PinMap.c:531
IfxGtm_TIM1_1_TIN47_P22_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN
Definition: IfxGtm_PinMap.c:346
IfxGtm_TIM0_0_TIN77_P15_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN
Definition: IfxGtm_PinMap.c:259
IfxGtm_TIM0_1_TIN47_P22_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN
Definition: IfxGtm_PinMap.c:272
IfxGtm_TIM1_3_TIN13_P00_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN
Definition: IfxGtm_PinMap.c:366
IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
Definition: IfxGtm_PinMap.c:611
IfxGtm_TIM1_6_TIN106_P10_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN
Definition: IfxGtm_PinMap.c:399
IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
Definition: IfxGtm_PinMap.c:483
IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
Definition: IfxGtm_PinMap.c:643
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
Definition: IfxGtm_PinMap.c:119
IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
Definition: IfxGtm_PinMap.c:587
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
Definition: IfxGtm_PinMap.c:199
IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
Definition: IfxGtm_PinMap.c:509
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
Definition: IfxGtm_PinMap.c:165
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:246
IfxGtm_TIM1_3_TIN21_P00_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN
Definition: IfxGtm_PinMap.c:367
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:205
IfxGtm_TIM1_7_TIN25_P33_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN
Definition: IfxGtm_PinMap.c:412
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
Definition: IfxGtm_PinMap.c:112
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
Definition: IfxGtm_PinMap.c:192
IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT
Definition: IfxGtm_PinMap.c:580
IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
Definition: IfxGtm_PinMap.c:666
IfxGtm_TIM1_4_TIN30_P33_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN
Definition: IfxGtm_PinMap.c:379
IfxGtm_TIM0_1_TIN11_P00_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN
Definition: IfxGtm_PinMap.c:266
IfxGtm_TIM1_0_TIN77_P15_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN
Definition: IfxGtm_PinMap.c:337
IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
Definition: IfxGtm_PinMap.c:636
IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT
Definition: IfxGtm_PinMap.c:622
IfxGtm_TIM2_1_TIN95_P11_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN
Definition: IfxGtm_PinMap.c:431
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:713
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
Definition: IfxGtm_PinMap.c:48
IfxGtm_TIM0_1_TIN54_P21_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN
Definition: IfxGtm_PinMap.c:273
IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
Definition: IfxGtm_PinMap.c:574
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
Definition: IfxGtm_PinMap.c:247
IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT
Definition: IfxGtm_PinMap.c:662
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
Definition: IfxGtm_PinMap.c:154
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
Definition: IfxGtm_PinMap.c:204
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
Definition: IfxGtm_PinMap.c:123
IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
Definition: IfxGtm_PinMap.c:551
IfxGtm_TIM2_6_TIN66_P20_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN
Definition: IfxGtm_PinMap.c:457
IfxGtm_TIM0_6_TIN24_P33_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN
Definition: IfxGtm_PinMap.c:315
IfxGtm_TIM1_7_TIN67_P20_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN
Definition: IfxGtm_PinMap.c:416
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
Definition: IfxGtm_PinMap.c:575
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
Definition: IfxGtm_PinMap.c:69
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_TIM0_3_TIN29_P33_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN
Definition: IfxGtm_PinMap.c:289
IfxGtm_TIM2_1_TIN11_P00_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN
Definition: IfxGtm_PinMap.c:428
IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
Definition: IfxGtm_PinMap.c:469
IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
Definition: IfxGtm_PinMap.c:677
IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT
Definition: IfxGtm_PinMap.c:594
IfxGtm_TIM0_1_TIN78_P15_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN
Definition: IfxGtm_PinMap.c:274
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
Definition: IfxGtm_PinMap.c:125
IfxGtm_Tim_2
TIM object 2.
Definition: IfxGtm_cfg.h:239
IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
Definition: IfxGtm_PinMap.c:654
IfxGtm_Atom_ToutMap::toutSel
IfxGtm_ToutSel toutSel
TOUTSEL register control code.
Definition: IfxGtm_PinMap.h:89
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
Definition: IfxGtm_PinMap.c:223
IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT
Definition: IfxGtm_PinMap.c:566
IfxGtm_TIM1_3_TIN29_P33_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN
Definition: IfxGtm_PinMap.c:368
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
Definition: IfxGtm_PinMap.c:219
IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
Definition: IfxGtm_PinMap.c:485
IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT
Definition: IfxGtm_PinMap.c:631
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
Definition: IfxGtm_PinMap.c:220
IfxGtm_TIM1_7_TIN75_P15_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN
Definition: IfxGtm_PinMap.c:417
IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT
Definition: IfxGtm_PinMap.c:617
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:91
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_TIM2_0_TIN94_P13_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN
Definition: IfxGtm_PinMap.c:425
IfxGtm_ToutSel_c
Definition: IfxGtm_PinMap.h:70
IfxGtm_TIM0_0_TIN26_P33_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN
Definition: IfxGtm_PinMap.c:254
IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT
Definition: IfxGtm_PinMap.c:497
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
Definition: IfxGtm_PinMap.c:246
IfxGtm_TIM2_2_TIN12_P00_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN
Definition: IfxGtm_PinMap.c:432
IfxGtm_TIM1_5_TIN15_P00_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN
Definition: IfxGtm_PinMap.c:388
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
Definition: IfxGtm_PinMap.c:56
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
Definition: IfxGtm_PinMap.c:589
IfxGtm_TIM2_7_TIN93_P13_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN
Definition: IfxGtm_PinMap.c:465
IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT
Definition: IfxGtm_PinMap.c:682
IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
Definition: IfxGtm_PinMap.c:515
IfxGtm_Atom_Ch_4
ATOM channel 4.
Definition: IfxGtm_cfg.h:209
IfxGtm_TIM0_0_TIN109_P10_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN
Definition: IfxGtm_PinMap.c:252
IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
Definition: IfxGtm_PinMap.c:621
IfxGtm_Tom_Ch_10
TOM channel 10.
Definition: IfxGtm_cfg.h:279
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
Definition: IfxGtm_PinMap.c:82
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
Definition: IfxGtm_PinMap.c:118
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
Definition: IfxGtm_PinMap.c:167
IfxGtm_TIM0_3_TIN38_P32_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN
Definition: IfxGtm_PinMap.c:290
IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
Definition: IfxGtm_PinMap.c:476
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
Definition: IfxGtm_PinMap.c:32
IfxGtm_TIM1_0_TIN68_P20_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN
Definition: IfxGtm_PinMap.c:335
IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
Definition: IfxGtm_PinMap.c:620
IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
Definition: IfxGtm_PinMap.c:680
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
Definition: IfxGtm_PinMap.c:229
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
Definition: IfxGtm_PinMap.c:147
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
Definition: IfxGtm_PinMap.c:143
IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
Definition: IfxGtm_PinMap.c:502
IfxGtm_TIM0_3_TIN51_P21_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN
Definition: IfxGtm_PinMap.c:293
IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
Definition: IfxGtm_PinMap.c:514
IfxGtm_TIM1_3_TIN80_P14_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN
Definition: IfxGtm_PinMap.c:374
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
Definition: IfxGtm_PinMap.c:64
IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
Definition: IfxGtm_PinMap.c:612
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
Definition: IfxGtm_PinMap.c:110
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
Definition: IfxGtm_PinMap.c:159
IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
Definition: IfxGtm_PinMap.c:624
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
Definition: IfxGtm_PinMap.c:107
IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT
Definition: IfxGtm_PinMap.c:670
IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
Definition: IfxGtm_PinMap.c:472
IfxGtm_TIM0_6_TIN62_P20_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN
Definition: IfxGtm_PinMap.c:319
IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT
Definition: IfxGtm_PinMap.c:494
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
Definition: IfxGtm_PinMap.c:76
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
Definition: IfxGtm_PinMap.c:212
IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT
Definition: IfxGtm_PinMap.c:505
IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
Definition: IfxGtm_PinMap.c:470
IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
Definition: IfxGtm_PinMap.c:477
IfxPort_InputMode_undefined
Definition: IfxPort.h:65
IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
Definition: IfxGtm_PinMap.c:506
IfxGtm_TIM0_7_TIN45_P23_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN
Definition: IfxGtm_PinMap.c:323
IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
Definition: IfxGtm_PinMap.c:563
IfxGtm_TIM1_0_TIN32_P33_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN
Definition: IfxGtm_PinMap.c:332
IfxGtm_TIM1_7_TIN44_P23_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN
Definition: IfxGtm_PinMap.c:413
IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
Definition: IfxGtm_PinMap.c:545
IfxGtm_ChXSel
IfxGtm_ChXSel
CHxSEL register control code.
Definition: IfxGtm_PinMap.h:42
IfxGtm_TIM2_7_TIN101_P11_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN
Definition: IfxGtm_PinMap.c:460
IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
Definition: IfxGtm_PinMap.c:674
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
Definition: IfxGtm_PinMap.c:135
IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT
Definition: IfxGtm_PinMap.c:642
IfxGtm_TIM0_0_TIN8_P02_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN
Definition: IfxGtm_PinMap.c:262
IfxGtm_TIM1_0_TIN0_P02_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN
Definition: IfxGtm_PinMap.c:328
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
Definition: IfxGtm_PinMap.c:184
IfxGtm_Tom_Ch_9
TOM channel 9.
Definition: IfxGtm_cfg.h:278
IfxGtm_TIM0_7_TIN44_P23_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN
Definition: IfxGtm_PinMap.c:322
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
Definition: IfxGtm_PinMap.c:33
IfxGtm_TIM1_2_TIN96_P11_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN
Definition: IfxGtm_PinMap.c:363
IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
Definition: IfxGtm_PinMap.c:579
IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
Definition: IfxGtm_PinMap.c:498
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
Definition: IfxGtm_PinMap.c:140
IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
Definition: IfxGtm_PinMap.c:521
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
Definition: IfxGtm_PinMap.c:103
IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
Definition: IfxGtm_PinMap.c:546
IfxGtm_TIM1_7_TIN64_P20_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN
Definition: IfxGtm_PinMap.c:415
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
Definition: IfxGtm_PinMap.c:625
IfxGtm_TIM1_7_TIN101_P11_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN
Definition: IfxGtm_PinMap.c:410
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:78
IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
Definition: IfxGtm_PinMap.c:537
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
Definition: IfxGtm_PinMap.c:216
IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
Definition: IfxGtm_PinMap.c:584
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
Definition: IfxGtm_PinMap.c:34
IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT
Definition: IfxGtm_PinMap.c:663
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
Definition: IfxGtm_PinMap.c:177
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
Definition: IfxGtm_PinMap.c:210
IfxGtm_TIM0_2_TIN55_P21_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN
Definition: IfxGtm_PinMap.c:284
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
Definition: IfxGtm_PinMap.c:198
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
Definition: IfxGtm_PinMap.c:175
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
Definition: IfxGtm_PinMap.c:97
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
Definition: IfxGtm_PinMap.c:132
IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
Definition: IfxGtm_PinMap.c:619
IfxGtm_TIM1_7_TIN93_P13_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN
Definition: IfxGtm_PinMap.c:420
IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT
Definition: IfxGtm_PinMap.c:599
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
Definition: IfxGtm_PinMap.c:221
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
Definition: IfxGtm_PinMap.c:138
IfxGtm_TIM0_7_TIN84_P14_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN
Definition: IfxGtm_PinMap.c:327
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
Definition: IfxGtm_PinMap.c:52
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
Definition: IfxGtm_PinMap.c:45
IfxGtm_TIM2_5_TIN65_P20_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN
Definition: IfxGtm_PinMap.c:450
IfxGtm_TIM0_5_TIN58_P21_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN
Definition: IfxGtm_PinMap.c:311
IfxGtm_TIM0_1_TIN35_P33_13_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN
Definition: IfxGtm_PinMap.c:271
IfxGtm_Tim_Ch_5
TIM channel 5.
Definition: IfxGtm_cfg.h:251
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
Definition: IfxGtm_PinMap.c:100
IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
Definition: IfxGtm_PinMap.c:527
IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT
Definition: IfxGtm_PinMap.c:627
IfxGtm_TIM0_3_TIN3_P02_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN
Definition: IfxGtm_PinMap.c:291
IfxGtm_Tom_Ch_3
TOM channel 3.
Definition: IfxGtm_cfg.h:272
IfxGtm_TIM1_6_TIN6_P02_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN
Definition: IfxGtm_PinMap.c:406
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
Definition: IfxGtm_PinMap.c:115
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
Definition: IfxGtm_PinMap.c:133
IfxGtm_Tom_Ch_13
TOM channel 13.
Definition: IfxGtm_cfg.h:282
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
Definition: IfxGtm_PinMap.c:225
IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
Definition: IfxGtm_PinMap.c:623
IfxGtm_TIM0_0_TIN9_P00_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN
Definition: IfxGtm_PinMap.c:263
IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
Definition: IfxGtm_PinMap.c:553
IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
Definition: IfxGtm_PinMap.c:542
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
Definition: IfxGtm_PinMap.c:188
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
Definition: IfxGtm_PinMap.c:245
IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT
Definition: IfxGtm_PinMap.c:652
IfxGtm_TIM1_5_TIN41_P23_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN
Definition: IfxGtm_PinMap.c:390
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
Definition: IfxGtm_PinMap.c:43
IfxGtm_TIM0_1_TIN31_P33_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN
Definition: IfxGtm_PinMap.c:270
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
Definition: IfxGtm_PinMap.c:182
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
Definition: IfxGtm_PinMap.c:101
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
Definition: IfxGtm_PinMap.c:51
IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
Definition: IfxGtm_PinMap.c:592
IfxGtm_TIM1_2_TIN104_P10_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN
Definition: IfxGtm_PinMap.c:352
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
Definition: IfxGtm_PinMap.c:179
IfxGtm_Tom_Ch_1
TOM channel 1.
Definition: IfxGtm_cfg.h:270
IfxGtm_TIM1_4_TIN14_P00_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN
Definition: IfxGtm_PinMap.c:377
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
Definition: IfxGtm_PinMap.c:209
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
Definition: IfxGtm_PinMap.c:171
IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
Definition: IfxGtm_PinMap.c:556
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
Definition: IfxGtm_PinMap.c:77
IfxGtm_TIM0_5_TIN5_P02_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN
Definition: IfxGtm_PinMap.c:312
IfxGtm_Atom_ToutMap::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGtm_PinMap.h:92
IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
Definition: IfxGtm_PinMap.c:583
IfxGtm_Atom_Ch_6
ATOM channel 6.
Definition: IfxGtm_cfg.h:211
IfxGtm_TIM2_4_TIN98_P11_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN
Definition: IfxGtm_PinMap.c:447
IfxGtm_TIM2_0_TIN8_P02_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN
Definition: IfxGtm_PinMap.c:424
IfxGtm_TIM1_4_TIN50_P22_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN
Definition: IfxGtm_PinMap.c:382
IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT
Definition: IfxGtm_PinMap.c:487
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
Definition: IfxGtm_PinMap.c:42
IfxGtm_TIM2_4_TIN61_P20_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN
Definition: IfxGtm_PinMap.c:444
IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
Definition: IfxGtm_PinMap.c:653
IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT
Definition: IfxGtm_PinMap.c:628
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
Definition: IfxGtm_PinMap.c:218
IfxGtm_TIM1_1_TIN103_P10_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN
Definition: IfxGtm_PinMap.c:341
IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
Definition: IfxGtm_PinMap.c:525
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
Definition: IfxGtm_PinMap.c:67
IfxGtm_Tim_TinMap::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGtm_PinMap.h:80
IfxGtm_TIM1_1_TIN86_P14_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN
Definition: IfxGtm_PinMap.c:350
IfxGtm_TIM2_6_TIN74_P15_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN
Definition: IfxGtm_PinMap.c:458
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
Definition: IfxGtm_PinMap.c:234
IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT
Definition: IfxGtm_PinMap.c:618
IfxGtm_Atom_Ch_2
ATOM channel 2.
Definition: IfxGtm_cfg.h:207
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:76
IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
Definition: IfxGtm_PinMap.c:533
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
Definition: IfxGtm_PinMap.c:80
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:105
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
Definition: IfxGtm_PinMap.c:124
IfxGtm_TIM2_1_TIN10_P00_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN
Definition: IfxGtm_PinMap.c:427
IfxGtm_TIM1_1_TIN54_P21_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN
Definition: IfxGtm_PinMap.c:347
IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT
Definition: IfxGtm_PinMap.c:576
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
Definition: IfxGtm_PinMap.c:55
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
Definition: IfxGtm_PinMap.c:139
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
Definition: IfxGtm_PinMap.c:31
IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT
Definition: IfxGtm_PinMap.c:480
IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
Definition: IfxGtm_PinMap.c:471
IfxGtm_Tim_1
TIM object 1.
Definition: IfxGtm_cfg.h:238
IfxGtm_TIM0_4_TIN52_P21_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN
Definition: IfxGtm_PinMap.c:303
IfxGtm_TIM0_4_TIN102_P10_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN
Definition: IfxGtm_PinMap.c:297
IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
Definition: IfxGtm_PinMap.c:555
IfxGtm_TIM0_1_TIN1_P02_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN
Definition: IfxGtm_PinMap.c:268
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:85
IfxGtm_TIM1_5_TIN5_P02_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN
Definition: IfxGtm_PinMap.c:392
IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT
Definition: IfxGtm_PinMap.c:661
IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
Definition: IfxGtm_PinMap.c:548
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
Definition: IfxGtm_PinMap.c:54
IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
Definition: IfxGtm_PinMap.c:585
IfxGtm_TIM2_5_TIN52_P21_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN
Definition: IfxGtm_PinMap.c:449
IfxGtm_TIM0_2_TIN46_P23_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN
Definition: IfxGtm_PinMap.c:283
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
Definition: IfxGtm_PinMap.c:183
IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT
Definition: IfxGtm_PinMap.c:500
IfxGtm_Tom_Ch_6
TOM channel 6.
Definition: IfxGtm_cfg.h:275
IfxGtm_TIM0_4_TIN39_P32_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN
Definition: IfxGtm_PinMap.c:300
IfxGtm_TIM1_5_TIN40_P32_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN
Definition: IfxGtm_PinMap.c:389
IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
Definition: IfxGtm_PinMap.c:517
IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
Definition: IfxGtm_PinMap.c:610
IfxGtm_TIM1_6_TIN92_P13_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN
Definition: IfxGtm_PinMap.c:409
IfxGtm_TIM2_3_TIN97_P11_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN
Definition: IfxGtm_PinMap.c:441
IfxGtm_TIM2_3_TIN89_P14_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN
Definition: IfxGtm_PinMap.c:440
IfxGtm_TIM1_2_TIN2_P02_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN
Definition: IfxGtm_PinMap.c:357
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
Definition: IfxGtm_PinMap.c:163
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
Definition: IfxGtm_PinMap.c:72
IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
Definition: IfxGtm_PinMap.c:569
IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
Definition: IfxGtm_PinMap.c:492
IfxGtm_TIM2_2_TIN88_P14_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN
Definition: IfxGtm_PinMap.c:435
IfxGtm_TIM2_2_TIN96_P11_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN
Definition: IfxGtm_PinMap.c:436
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
Definition: IfxGtm_PinMap.c:222
IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
Definition: IfxGtm_PinMap.c:577
IfxGtm_TIM1_6_TIN74_P15_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN
Definition: IfxGtm_PinMap.c:407
IfxGtm_TIM0_0_TIN0_P02_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN
Definition: IfxGtm_PinMap.c:251
IfxGtm_Tom_Ch_4
TOM channel 4.
Definition: IfxGtm_cfg.h:273
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
Definition: IfxGtm_PinMap.c:155
IfxGtm_TIM1_1_TIN95_P11_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN
Definition: IfxGtm_PinMap.c:351
IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
Definition: IfxGtm_PinMap.c:558
IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
Definition: IfxGtm_PinMap.c:539
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
Definition: IfxGtm_PinMap.c:226
IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
Definition: IfxGtm_PinMap.c:467
IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT
Definition: IfxGtm_PinMap.c:667
IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
Definition: IfxGtm_PinMap.c:582
IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
Definition: IfxGtm_PinMap.c:496
IfxGtm_TIM0_3_TIN80_P14_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN
Definition: IfxGtm_PinMap.c:296
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
Definition: IfxGtm_PinMap.c:39
IfxGtm_TIM2_6_TIN62_P20_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN
Definition: IfxGtm_PinMap.c:456
IfxGtm_Tim_Ch_7
TIM channel 7.
Definition: IfxGtm_cfg.h:253
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
Definition: IfxGtm_PinMap.c:113
IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
Definition: IfxGtm_PinMap.c:613
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
Definition: IfxGtm_PinMap.c:29
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
Definition: IfxGtm_PinMap.c:235
IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT
Definition: IfxGtm_PinMap.c:648
IfxGtm_TIM1_3_TIN3_P02_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN
Definition: IfxGtm_PinMap.c:370
IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT
Definition: IfxGtm_PinMap.c:685
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
Definition: IfxGtm_PinMap.c:89
IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
Definition: IfxGtm_PinMap.c:510
IfxGtm_TIM0_2_TIN33_P33_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN
Definition: IfxGtm_PinMap.c:281
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
Definition: IfxGtm_PinMap.c:241
IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
Definition: IfxGtm_PinMap.c:605
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
Definition: IfxGtm_PinMap.c:172
IfxGtm_TIM1_2_TIN55_P21_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN
Definition: IfxGtm_PinMap.c:360
IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
Definition: IfxGtm_PinMap.c:573
IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
Definition: IfxGtm_PinMap.c:665
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:99
IfxGtm_TIM2_3_TIN13_P00_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN
Definition: IfxGtm_PinMap.c:437
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
Definition: IfxGtm_PinMap.c:194
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:103
IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
Definition: IfxGtm_PinMap.c:650
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
Definition: IfxGtm_PinMap.c:170
IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
Definition: IfxGtm_PinMap.c:524
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
Definition: IfxGtm_PinMap.c:164
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxGtm_TIM0_5_TIN40_P32_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN
Definition: IfxGtm_PinMap.c:309
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
Definition: IfxGtm_PinMap.c:142
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
Definition: IfxGtm_PinMap.c:49
IfxGtm_TIM1_1_TIN27_P33_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN
Definition: IfxGtm_PinMap.c:344
IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT
Definition: IfxGtm_PinMap.c:588
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
Definition: IfxGtm_PinMap.c:168
IfxGtm_TIM2_5_TIN73_P15_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN
Definition: IfxGtm_PinMap.c:451
IfxGtm_Atom_1
ATOM object 1.
Definition: IfxGtm_cfg.h:195
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
Definition: IfxGtm_PinMap.c:213
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
Definition: IfxGtm_PinMap.c:57
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
Definition: IfxGtm_PinMap.c:232
IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
Definition: IfxGtm_PinMap.c:508
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
Definition: IfxGtm_PinMap.c:91
IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
Definition: IfxGtm_PinMap.c:571
IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
Definition: IfxGtm_PinMap.c:675
IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
Definition: IfxGtm_PinMap.c:550
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
Definition: IfxGtm_PinMap.c:70
IfxGtm_Tim_Ch_6
TIM channel 6.
Definition: IfxGtm_cfg.h:252
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
Definition: IfxGtm_PinMap.c:178
IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
Definition: IfxGtm_PinMap.c:549
IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
Definition: IfxGtm_PinMap.c:493
IfxGtm_Tom_Ch_12
TOM channel 12.
Definition: IfxGtm_cfg.h:281
IfxGtm_TIM0_1_TIN27_P33_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN
Definition: IfxGtm_PinMap.c:269
IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
Definition: IfxGtm_PinMap.c:633
IfxGtm_ToutSel_d
Definition: IfxGtm_PinMap.h:71
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
Definition: IfxGtm_PinMap.c:148
IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
Definition: IfxGtm_PinMap.c:522
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
Definition: IfxGtm_PinMap.c:99
IfxGtm_TIM1_0_TIN26_P33_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN
Definition: IfxGtm_PinMap.c:331
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
Definition: IfxGtm_PinMap.c:46
IfxGtm_TIM0_3_TIN49_P22_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN
Definition: IfxGtm_PinMap.c:292
IfxGtm_TIM0_4_TIN81_P14_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN
Definition: IfxGtm_PinMap.c:306
IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
Definition: IfxGtm_PinMap.c:559
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
Definition: IfxGtm_PinMap.c:78
IfxGtm_TIM1_3_TIN71_P15_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN
Definition: IfxGtm_PinMap.c:373
IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
Definition: IfxGtm_PinMap.c:532
IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT
Definition: IfxGtm_PinMap.c:486
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
Definition: IfxGtm_PinMap.c:228
IfxGtm_TIM0_1_TIN103_P10_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN
Definition: IfxGtm_PinMap.c:264
IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
Definition: IfxGtm_PinMap.c:528
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
Definition: IfxGtm_PinMap.c:236
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
Definition: IfxGtm_PinMap.c:151
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
Definition: IfxGtm_PinMap.c:65
IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
Definition: IfxGtm_PinMap.c:608
IfxGtm_TIM2_3_TIN71_P15_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN
Definition: IfxGtm_PinMap.c:439
IfxGtm_TIM2_0_TIN76_P15_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN
Definition: IfxGtm_PinMap.c:423
IfxGtm_Tim_Ch_3
TIM channel 3.
Definition: IfxGtm_cfg.h:249
IfxGtm_Tom_Ch_5
TOM channel 5.
Definition: IfxGtm_cfg.h:274
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
Definition: IfxGtm_PinMap.c:121
IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT
Definition: IfxGtm_PinMap.c:641
IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
Definition: IfxGtm_PinMap.c:538
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
Definition: IfxGtm_PinMap.c:237
IfxGtm_TIM1_5_TIN65_P20_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN
Definition: IfxGtm_PinMap.c:393
IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT
Definition: IfxGtm_PinMap.c:512
IfxGtm_TIM0_2_TIN107_P10_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN
Definition: IfxGtm_PinMap.c:277
IfxGtm_Atom_Ch_3
ATOM channel 3.
Definition: IfxGtm_cfg.h:208
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
Definition: IfxGtm_PinMap.c:160
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
Definition: IfxGtm_PinMap.c:671
IfxGtm_Atom_Ch_1
ATOM channel 1.
Definition: IfxGtm_cfg.h:206
IfxGtm_TIM0_0_TIN32_P33_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN
Definition: IfxGtm_PinMap.c:255
IfxGtm_Atom_3
ATOM object 3.
Definition: IfxGtm_cfg.h:197
IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
Definition: IfxGtm_PinMap.c:484
IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
Definition: IfxGtm_PinMap.c:659
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
Definition: IfxGtm_PinMap.c:28
IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
Definition: IfxGtm_PinMap.c:644
IfxGtm_TIM0_4_TIN61_P20_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN
Definition: IfxGtm_PinMap.c:305
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
Definition: IfxGtm_PinMap.c:126
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:79
IfxGtm_TIM0_5_TIN110_P10_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN
Definition: IfxGtm_PinMap.c:307
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
Definition: IfxGtm_PinMap.c:41
IfxGtm_TIM1_2_TIN12_P00_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN
Definition: IfxGtm_PinMap.c:354
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
Definition: IfxGtm_PinMap.c:73
IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT
Definition: IfxGtm_PinMap.c:499
IfxGtm_TIM2_5_TIN99_P11_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN
Definition: IfxGtm_PinMap.c:453
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
Definition: IfxGtm_PinMap.c:195
IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
Definition: IfxGtm_PinMap.c:482
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
Definition: IfxGtm_PinMap.c:85
IfxGtm_TIM1_0_TIN85_P14_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN
Definition: IfxGtm_PinMap.c:338
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
Definition: IfxGtm_PinMap.c:131
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
Definition: IfxGtm_PinMap.c:86
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
Definition: IfxGtm_PinMap.c:243
IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT
Definition: IfxGtm_PinMap.c:581
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
Definition: IfxGtm_PinMap.c:36
IfxGtm_TIM1_0_TIN87_P14_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN
Definition: IfxGtm_PinMap.c:339
IfxGtm_TIM2_0_TIN68_P20_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN
Definition: IfxGtm_PinMap.c:422
IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
Definition: IfxGtm_PinMap.c:557
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
Definition: IfxGtm_PinMap.c:75
IfxGtm_TIM1_5_TIN73_P15_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN
Definition: IfxGtm_PinMap.c:394
IfxGtm_TIM1_4_TIN22_P33_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN
Definition: IfxGtm_PinMap.c:378
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
Definition: IfxGtm_PinMap.c:102
IfxGtm_TIM2_4_TIN90_P14_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN
Definition: IfxGtm_PinMap.c:446
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
Definition: IfxGtm_PinMap.c:129
IfxGtm_TIM1_6_TIN59_P20_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN
Definition: IfxGtm_PinMap.c:404
IfxGtm_TIM0_5_TIN82_P14_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN
Definition: IfxGtm_PinMap.c:313
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
Definition: IfxGtm_PinMap.c:176
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
Definition: IfxGtm_PinMap.c:108
IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
Definition: IfxGtm_PinMap.c:564
IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
Definition: IfxGtm_PinMap.c:565
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
Definition: IfxGtm_PinMap.c:145
IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
Definition: IfxGtm_PinMap.c:597
IfxGtm_TIM0_6_TIN42_P23_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN
Definition: IfxGtm_PinMap.c:316
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
Definition: IfxGtm_PinMap.c:193
IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
Definition: IfxGtm_PinMap.c:629
IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
Definition: IfxGtm_PinMap.c:518
IfxGtm_TIM1_4_TIN4_P02_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN
Definition: IfxGtm_PinMap.c:381
IfxGtm_TIM2_6_TIN16_P00_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN
Definition: IfxGtm_PinMap.c:455
IfxGtm_TIM0_2_TIN28_P33_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN
Definition: IfxGtm_PinMap.c:279
IfxGtm_ToutSel_b
Definition: IfxGtm_PinMap.h:69
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
Definition: IfxGtm_PinMap.c:122
IfxGtm_TIM1_2_TIN79_P15_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN
Definition: IfxGtm_PinMap.c:362
IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT
Definition: IfxGtm_PinMap.c:637
IfxGtm_TIM1_6_TIN100_P11_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN
Definition: IfxGtm_PinMap.c:398
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:269
IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
Definition: IfxGtm_PinMap.c:639
IfxGtm_TIM1_4_TIN81_P14_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN
Definition: IfxGtm_PinMap.c:385
IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
Definition: IfxGtm_PinMap.c:600
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
Definition: IfxGtm_PinMap.c:217
IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
Definition: IfxGtm_PinMap.c:684
IfxGtm_TIM2_6_TIN92_P13_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN
Definition: IfxGtm_PinMap.c:459
IfxGtm_TIM2_6_TIN100_P11_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN
Definition: IfxGtm_PinMap.c:454
IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
Definition: IfxGtm_PinMap.c:616
IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
Definition: IfxGtm_PinMap.c:646
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:194
IfxGtm_TIM1_2_TIN70_P20_14_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN
Definition: IfxGtm_PinMap.c:361
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
Definition: IfxGtm_PinMap.c:84
IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
Definition: IfxGtm_PinMap.c:552
IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
Definition: IfxGtm_PinMap.c:655
IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
Definition: IfxGtm_PinMap.c:664
IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
Definition: IfxGtm_PinMap.c:491
IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
Definition: IfxGtm_PinMap.c:635
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
Definition: IfxGtm_PinMap.c:134
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
Definition: IfxGtm_PinMap.c:111
IfxGtm_TIM0_4_TIN22_P33_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN
Definition: IfxGtm_PinMap.c:298
IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT
Definition: IfxGtm_PinMap.c:603
IfxGtm_TIM1_0_TIN48_P22_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN
Definition: IfxGtm_PinMap.c:333
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
Definition: IfxGtm_PinMap.c:189
IfxGtm_TIM1_2_TIN28_P33_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN
Definition: IfxGtm_PinMap.c:356
IfxGtm_TIM0_6_TIN106_P10_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN
Definition: IfxGtm_PinMap.c:314
IfxGtm_TIM1_3_TIN49_P22_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN
Definition: IfxGtm_PinMap.c:371
IfxGtm_TIM1_1_TIN31_P33_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN
Definition: IfxGtm_PinMap.c:345
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
Definition: IfxGtm_PinMap.c:185
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
Definition: IfxGtm_PinMap.c:227
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
Definition: IfxGtm_PinMap.c:96
IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
Definition: IfxGtm_PinMap.c:513
IfxGtm_Tom_Ch_11
TOM channel 11.
Definition: IfxGtm_cfg.h:280
IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
Definition: IfxGtm_PinMap.c:672
IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
Definition: IfxGtm_PinMap.c:609
IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT
Definition: IfxGtm_PinMap.c:479
IfxGtm_TIM0_2_TIN36_P32_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN
Definition: IfxGtm_PinMap.c:282
IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT
Definition: IfxGtm_PinMap.c:657
IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
Definition: IfxGtm_PinMap.c:516
IfxGtm_TIM0_6_TIN59_P20_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN
Definition: IfxGtm_PinMap.c:318
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
Definition: IfxGtm_PinMap.c:95
IfxGtm_TIM0_0_TIN48_P22_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN
Definition: IfxGtm_PinMap.c:257
IfxGtm_TIM1_5_TIN58_P21_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN
Definition: IfxGtm_PinMap.c:391
IfxGtm_TIM1_5_TIN110_P10_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN
Definition: IfxGtm_PinMap.c:387
IfxGtm_TIM0_2_TIN2_P02_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN
Definition: IfxGtm_PinMap.c:280
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
Definition: IfxGtm_PinMap.c:66
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
Definition: IfxGtm_PinMap.c:93
IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT
Definition: IfxGtm_PinMap.c:651
IfxGtm_TIM0_0_TIN53_P21_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN
Definition: IfxGtm_PinMap.c:258
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
Definition: IfxGtm_PinMap.c:144
IfxGtm_TIM0_3_TIN56_P21_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN
Definition: IfxGtm_PinMap.c:294
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
Definition: IfxGtm_PinMap.c:117
IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT
Definition: IfxGtm_PinMap.c:683
IfxGtm_TIM1_3_TIN108_P10_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN
Definition: IfxGtm_PinMap.c:365
IfxGtm_TIM0_1_TIN86_P14_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN
Definition: IfxGtm_PinMap.c:275
IfxGtm_TIM0_0_TIN18_P00_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN
Definition: IfxGtm_PinMap.c:253
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
Definition: IfxGtm_PinMap.c:53
IfxGtm_TIM1_6_TIN16_P00_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN
Definition: IfxGtm_PinMap.c:400
IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
Definition: IfxGtm_PinMap.c:534
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
Definition: IfxGtm_PinMap.c:474
IfxGtm_TIM2_7_TIN75_P15_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN
Definition: IfxGtm_PinMap.c:464
IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
Definition: IfxGtm_PinMap.c:630
IfxGtm_TIM1_4_TIN98_P11_9_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN
Definition: IfxGtm_PinMap.c:386
IfxGtm_TIM1_3_TIN56_P21_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN
Definition: IfxGtm_PinMap.c:372
IfxGtm_TIM2_7_TIN67_P20_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN
Definition: IfxGtm_PinMap.c:463
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
Definition: IfxGtm_PinMap.c:141
IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
Definition: IfxGtm_PinMap.c:554
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:260
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
Definition: IfxGtm_PinMap.c:156
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
Definition: IfxGtm_PinMap.c:242
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxGtm_TIM0_7_TIN63_P20_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN
Definition: IfxGtm_PinMap.c:324
IfxGtm_TIM1_3_TIN97_P11_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN
Definition: IfxGtm_PinMap.c:375
IfxGtm_TIM2_2_TIN36_P32_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN
Definition: IfxGtm_PinMap.c:433
IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
Definition: IfxGtm_PinMap.c:529
IfxGtm_TIM0_0_TIN34_P33_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN
Definition: IfxGtm_PinMap.c:256
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
Definition: IfxGtm_PinMap.c:68
IfxGtm_Atom_Ch_7
ATOM channel 7.
Definition: IfxGtm_cfg.h:212
IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
Definition: IfxGtm_PinMap.c:481
IfxGtm_TIM1_2_TIN46_P23_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN
Definition: IfxGtm_PinMap.c:359
IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
Definition: IfxGtm_PinMap.c:468
IfxGtm_TIM1_4_TIN57_P21_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN
Definition: IfxGtm_PinMap.c:383
IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT
Definition: IfxGtm_PinMap.c:679
IfxGtm_TIM1_1_TIN1_P02_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN
Definition: IfxGtm_PinMap.c:343
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
Definition: IfxGtm_PinMap.c:191
IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT
Definition: IfxGtm_PinMap.c:632
IfxGtm_TIM1_0_TIN109_P10_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN
Definition: IfxGtm_PinMap.c:329
IfxGtm_CLK1_P32_4_OUT
IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
Definition: IfxGtm_PinMap.c:249
IfxGtm_CLK2_P11_12_OUT
IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
Definition: IfxGtm_PinMap.c:250
IfxGtm_TIM1_1_TIN69_P20_13_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN
Definition: IfxGtm_PinMap.c:348
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
Definition: IfxGtm_PinMap.c:238
IfxGtm_TIM1_2_TIN107_P10_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN
Definition: IfxGtm_PinMap.c:353
IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
Definition: IfxGtm_PinMap.c:536
IfxGtm_Tim_TinMap::select
IfxGtm_ChXSel select
Input multiplexer value.
Definition: IfxGtm_PinMap.h:81
IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
Definition: IfxGtm_PinMap.c:601
IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
Definition: IfxGtm_PinMap.c:567
IfxGtm_TIM2_4_TIN14_P00_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN
Definition: IfxGtm_PinMap.c:442
IfxGtm_TIM0_0_TIN85_P14_5_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN
Definition: IfxGtm_PinMap.c:260
IfxGtm_Tim_Ch_1
TIM channel 1.
Definition: IfxGtm_cfg.h:247
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:276
IfxGtm_TIM1_3_TIN38_P32_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN
Definition: IfxGtm_PinMap.c:369
IfxGtm_TIM1_3_TIN105_P10_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN
Definition: IfxGtm_PinMap.c:364
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
Definition: IfxGtm_PinMap.c:137
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
Definition: IfxGtm_PinMap.c:47
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
Definition: IfxGtm_PinMap.c:63
IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT
Definition: IfxGtm_PinMap.c:595
IfxGtm_Tom_Ch_8
TOM channel 8.
Definition: IfxGtm_cfg.h:277
IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
Definition: IfxGtm_PinMap.c:598
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
Definition: IfxGtm_PinMap.c:88
IfxGtm_TIM1_6_TIN43_P23_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN
Definition: IfxGtm_PinMap.c:403
IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
Definition: IfxGtm_PinMap.c:593
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
Definition: IfxGtm_PinMap.c:190
IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
Definition: IfxGtm_PinMap.c:475
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
Definition: IfxGtm_PinMap.c:166
IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
Definition: IfxGtm_PinMap.c:604
IfxGtm_TIM2_7_TIN17_P00_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN
Definition: IfxGtm_PinMap.c:461
IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
Definition: IfxGtm_PinMap.c:478
IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
Definition: IfxGtm_PinMap.c:488
IfxGtm_TIM1_1_TIN19_P00_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN
Definition: IfxGtm_PinMap.c:342
IfxGtm_TIM1_6_TIN24_P33_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN
Definition: IfxGtm_PinMap.c:401
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
Definition: IfxGtm_PinMap.c:87
IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
Definition: IfxGtm_PinMap.c:669
IfxGtm_TIM0_3_TIN21_P00_12_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN
Definition: IfxGtm_PinMap.c:288
IfxGtm_TIM0_7_TIN64_P20_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN
Definition: IfxGtm_PinMap.c:325
IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT
Definition: IfxGtm_PinMap.c:543
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
Definition: IfxGtm_PinMap.c:50
IfxGtm_TIM1_7_TIN7_P02_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN
Definition: IfxGtm_PinMap.c:418
IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
Definition: IfxGtm_PinMap.c:473
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
Definition: IfxGtm_PinMap.c:244
IfxGtm_TIM2_4_TIN51_P21_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN
Definition: IfxGtm_PinMap.c:443
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
Definition: IfxGtm_PinMap.c:146
IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
Definition: IfxGtm_PinMap.c:489
IfxGtm_TIM1_5_TIN91_P13_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN
Definition: IfxGtm_PinMap.c:396
IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT
Definition: IfxGtm_PinMap.c:647
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
Definition: IfxGtm_PinMap.c:98
IfxGtm_TIM0_4_TIN50_P22_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN
Definition: IfxGtm_PinMap.c:302
IfxGtm_TIM2_1_TIN69_P20_13_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN
Definition: IfxGtm_PinMap.c:430
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
Definition: IfxGtm_PinMap.c:114
IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
Definition: IfxGtm_PinMap.c:519
IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
Definition: IfxGtm_PinMap.c:606
IfxGtm_Tom_Ch_2
TOM channel 2.
Definition: IfxGtm_cfg.h:271
IfxGtm_TIM1_4_TIN102_P10_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN
Definition: IfxGtm_PinMap.c:376
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
Definition: IfxGtm_PinMap.c:203
IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
Definition: IfxGtm_PinMap.c:658
IfxGtm_TIM0_7_TIN7_P02_7_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN
Definition: IfxGtm_PinMap.c:326
IfxGtm_TIM1_4_TIN39_P32_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN
Definition: IfxGtm_PinMap.c:380
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
Definition: IfxGtm_PinMap.c:186
IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
Definition: IfxGtm_PinMap.c:615
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
Definition: IfxGtm_PinMap.c:196
IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
Definition: IfxGtm_PinMap.c:530
IfxGtm_TIM0_6_TIN83_P14_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN
Definition: IfxGtm_PinMap.c:320
IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
Definition: IfxGtm_PinMap.c:520
IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
Definition: IfxGtm_PinMap.c:649
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
Definition: IfxGtm_PinMap.c:158
IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
Definition: IfxGtm_PinMap.c:676
IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
Definition: IfxGtm_PinMap.c:466
IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
Definition: IfxGtm_PinMap.c:596
IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
Definition: IfxGtm_PinMap.c:572
IfxGtm_Tim_Ch_4
TIM channel 4.
Definition: IfxGtm_cfg.h:250
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
Definition: IfxGtm_PinMap.c:239
IfxGtm_TIM1_0_TIN53_P21_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN
Definition: IfxGtm_PinMap.c:334
IfxGtm_TIM1_7_TIN45_P23_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN
Definition: IfxGtm_PinMap.c:414
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
Definition: IfxGtm_PinMap.c:240
IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
Definition: IfxGtm_PinMap.c:541
IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT
Definition: IfxGtm_PinMap.c:681
IfxGtm_Tim_Ch_2
TIM channel 2.
Definition: IfxGtm_cfg.h:248
IfxGtm_TIM1_7_TIN84_P14_4_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN
Definition: IfxGtm_PinMap.c:419
IfxGtm_TIM2_2_TIN70_P20_14_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN
Definition: IfxGtm_PinMap.c:434
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
Definition: IfxGtm_PinMap.c:211
IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
Definition: IfxGtm_PinMap.c:678
IfxGtm_TIM0_2_TIN79_P15_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN
Definition: IfxGtm_PinMap.c:285
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
Definition: IfxGtm_PinMap.c:106
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
Definition: IfxGtm_PinMap.c:205
IfxGtm_TIM0_3_TIN108_P10_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN
Definition: IfxGtm_PinMap.c:287
IfxGtm_TIM0_7_TIN25_P33_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN
Definition: IfxGtm_PinMap.c:321
IfxGtm_TIM1_4_TIN72_P15_1_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN
Definition: IfxGtm_PinMap.c:384
IfxGtm_TIM0_2_TIN20_P00_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN
Definition: IfxGtm_PinMap.c:278
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
Definition: IfxGtm_PinMap.c:104
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
Definition: IfxGtm_PinMap.c:231
IfxGtm_TIM1_6_TIN83_P14_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN
Definition: IfxGtm_PinMap.c:408
IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
Definition: IfxGtm_PinMap.c:561
IfxGtm_TIM0_6_TIN43_P23_2_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN
Definition: IfxGtm_PinMap.c:317
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
Definition: IfxGtm_PinMap.c:92
IfxGtm_CLK0_P23_1_OUT
IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
Definition: IfxGtm_PinMap.c:248
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
Definition: IfxGtm_PinMap.c:71
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
Definition: IfxGtm_PinMap.c:230
IfxGtm_TIM1_2_TIN20_P00_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN
Definition: IfxGtm_PinMap.c:355
IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
Definition: IfxGtm_PinMap.c:626
IfxGtm_TIM2_1_TIN35_P33_13_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN
Definition: IfxGtm_PinMap.c:429
IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
Definition: IfxGtm_PinMap.c:640
IfxGtm_Atom_Ch_5
ATOM channel 5.
Definition: IfxGtm_cfg.h:210
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
Definition: IfxGtm_PinMap.c:127
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
Definition: IfxGtm_PinMap.c:161
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
Definition: IfxGtm_PinMap.c:74
IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
Definition: IfxGtm_PinMap.c:503
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
Definition: IfxGtm_PinMap.c:83
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
Definition: IfxGtm_PinMap.c:60
IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT
Definition: IfxGtm_PinMap.c:511
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
Definition: IfxGtm_PinMap.c:30
IfxGtm_TIM2_5_TIN91_P13_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN
Definition: IfxGtm_PinMap.c:452
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
Definition: IfxGtm_PinMap.c:116
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
Definition: IfxGtm_PinMap.c:109
IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT
Definition: IfxGtm_PinMap.c:590
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
Definition: IfxGtm_PinMap.c:180
IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
Definition: IfxGtm_PinMap.c:578
IfxGtm_Tom_Ch_15
TOM channel 15.
Definition: IfxGtm_cfg.h:284
IfxGtm_Tom_Ch_14
TOM channel 14.
Definition: IfxGtm_cfg.h:283
IfxGtm_TIM2_0_TIN9_P00_0_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN
Definition: IfxGtm_PinMap.c:426
IfxGtm_TIM1_0_TIN94_P13_3_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN
Definition: IfxGtm_PinMap.c:340
IfxGtm_TIM0_4_TIN30_P33_8_IN
IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN
Definition: IfxGtm_PinMap.c:299
IfxGtm_TIM2_5_TIN15_P00_6_IN
IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN
Definition: IfxGtm_PinMap.c:448
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
Definition: IfxGtm_PinMap.c:44
IfxGtm_PinMap_setAtomTout
void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:701
IfxGtm_TIM1_2_TIN33_P33_11_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN
Definition: IfxGtm_PinMap.c:358
IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
Definition: IfxGtm_PinMap.c:634
IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
Definition: IfxGtm_PinMap.c:656
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
Definition: IfxGtm_PinMap.c:150
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
Definition: IfxGtm_PinMap.c:200
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
Definition: IfxGtm_PinMap.c:105
IfxGtm_TIM1_6_TIN66_P20_10_IN
IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN
Definition: IfxGtm_PinMap.c:405
IfxGtm_ToutSel_a
Definition: IfxGtm_PinMap.h:68
IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT
Definition: IfxGtm_PinMap.c:535


iLLD_TC26B: IfxGtm_PinMap.h Source File

  • _PinMap
IfxGtm_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_PinMap.h
3 * \brief GTM I/O map
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_pinmap GTM Pin Mapping
25 * \ingroup IfxLld_Gtm
26 */
27
28 #ifndef IFXGTM_PINMAP_H
29 #define IFXGTM_PINMAP_H
30
31 #include <IfxGtm_reg.h>
32 #include <_Impl/IfxGtm_cfg.h>
33 #include <Port/Std/IfxPort.h>
34 #include <Gtm/Std/IfxGtm_Atom.h>
35 #include <Gtm/Std/IfxGtm_Tom.h>
36 #include <Gtm/Std/IfxGtm_Tim.h>
37
38 /** \addtogroup IfxLld_Gtm_pinmap
39 * \{ */
40
41 /** \brief CHxSEL register control code */
42 typedef enum
43 {
44 IfxGtm_ChXSel_a,
45 IfxGtm_ChXSel_b,
46 IfxGtm_ChXSel_c,
47 IfxGtm_ChXSel_d,
48
49 IfxGtm_ChXSel_e,
50 IfxGtm_ChXSel_f,
51 IfxGtm_ChXSel_g,
52 IfxGtm_ChXSel_h,
53
54 IfxGtm_ChXSel_i,
55 IfxGtm_ChXSel_j,
56 IfxGtm_ChXSel_k,
57 IfxGtm_ChXSel_l,
58
59 IfxGtm_ChXSel_m,
60 IfxGtm_ChXSel_n,
61 IfxGtm_ChXSel_o,
62 IfxGtm_ChXSel_p
63 } IfxGtm_ChXSel;
64
65 /** \brief TOUTSEL register control code */
66 typedef enum
67 {
68 IfxGtm_ToutSel_a,
69 IfxGtm_ToutSel_b,
70 IfxGtm_ToutSel_c,
71 IfxGtm_ToutSel_d,
72 IfxGtm_ToutSel_e
73 } IfxGtm_ToutSel;
74
75 /** \brief TIN pin mapping structure */
76 typedef const struct
77 {
78 IfxGtm_Tim tim; /**< \brief TIM unit index */
79 IfxGtm_Tim_Ch channel; /**< \brief TIM channel index */
80 IfxPort_Pin pin; /**< \brief Port pin */
81 IfxGtm_ChXSel select; /**< \brief Input multiplexer value */
82 } IfxGtm_Tim_TinMap;
83
84 /** \brief ATOM TOUT pin mapping structure */
85 typedef const struct
86 {
87 IfxGtm_Atom atom; /**< \brief ATOM unit index */
88 IfxGtm_Atom_Ch channel; /**< \brief ATOM channel index */
89 IfxGtm_ToutSel toutSel; /**< \brief TOUTSEL register control code */
90 uint32 toutn; /**< \brief TOUT number */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 IfxPort_OutputIdx select; /**< \brief Port control code */
93 } IfxGtm_Atom_ToutMap;
94
95 /** \brief Pointer to \ref IfxGtm_Atom_ToutMap */
96 typedef IfxGtm_Atom_ToutMap *IfxGtm_Atom_ToutMapP;
97
98 /** \brief TOM TOUT pin mapping structure */
99 typedef const struct
100 {
101 IfxGtm_Tom tom; /**< \brief TOM unit index */
102 IfxGtm_Tom_Ch channel; /**< \brief TOM channel index */
103 IfxGtm_ToutSel toutSel; /**< \brief TOUTSEL register control code */
104 uint32 toutn; /**< \brief TOUT number */
105 IfxPort_Pin pin; /**< \brief Port pin */
106 IfxPort_OutputIdx select; /**< \brief Port control code */
107 } IfxGtm_Tom_ToutMap;
108
109 /** \brief GTM Clock Output */
110 typedef const struct
111 {
112 Ifx_GTM* module; /**< \brief Base address */
113 IfxPort_Pin pin; /**< \brief Port pin */
114 IfxPort_OutputIdx select; /**< \brief Port control code */
115 } IfxGtm_Clk_Out;
116
117 /** \brief Pointer to \ref IfxGtm_Tom_ToutMap */
118 typedef IfxGtm_Tom_ToutMap *IfxGtm_Tom_ToutMapP;
119
120 IFX_EXTERN void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode);
121 IFX_EXTERN void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
122 IFX_EXTERN void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
123
124 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT0_P02_0_OUT */
125 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT109_P10_7_OUT */
126 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT48_P22_1_OUT */
127 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT53_P21_2_OUT */
128 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT85_P14_5_OUT */
129 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT8_P02_8_OUT */
130 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT9_P00_0_OUT */
131 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT103_P10_1_OUT */
132 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT10_P00_1_OUT */
133 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT11_P00_2_OUT */
134 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT1_P02_1_OUT */
135 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT31_P33_9_OUT */
136 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT47_P22_0_OUT */
137 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT54_P21_3_OUT */
138 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT84_P14_4_OUT */
139 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT104_P10_2_OUT */
140 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT107_P10_5_OUT */
141 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT12_P00_3_OUT */
142 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT2_P02_2_OUT */
143 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT33_P33_11_OUT */
144 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT46_P23_5_OUT */
145 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT55_P21_4_OUT */
146 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT83_P14_3_OUT */
147 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT105_P10_3_OUT */
148 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT108_P10_6_OUT */
149 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT13_P00_4_OUT */
150 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT38_P32_2_OUT */
151 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT3_P02_3_OUT */
152 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT49_P22_2_OUT */
153 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT56_P21_5_OUT */
154 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT60_P20_1_OUT */
155 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT82_P14_2_OUT */
156 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT102_P10_0_OUT */
157 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT14_P00_5_OUT */
158 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT39_P32_3_OUT */
159 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT4_P02_4_OUT */
160 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT50_P22_3_OUT */
161 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT57_P21_6_OUT */
162 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT61_P20_3_OUT */
163 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT81_P14_1_OUT */
164 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT110_P10_8_OUT */
165 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT15_P00_6_OUT */
166 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT23_P33_1_OUT */
167 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT40_P32_4_OUT */
168 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT41_P23_0_OUT */
169 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT58_P21_7_OUT */
170 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT5_P02_5_OUT */
171 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT106_P10_4_OUT */
172 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT16_P00_7_OUT */
173 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT24_P33_2_OUT */
174 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT42_P23_1_OUT */
175 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT59_P20_0_OUT */
176 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT6_P02_6_OUT */
177 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT17_P00_8_OUT */
178 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT25_P33_3_OUT */
179 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT45_P23_4_OUT */
180 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT64_P20_8_OUT */
181 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT7_P02_7_OUT */
182 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT0_P02_0_OUT */
183 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT109_P10_7_OUT */
184 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT48_P22_1_OUT */
185 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT53_P21_2_OUT */
186 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT68_P20_12_OUT */
187 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT76_P15_5_OUT */
188 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT77_P15_6_OUT */
189 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT87_P14_7_OUT */
190 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT8_P02_8_OUT */
191 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT9_P00_0_OUT */
192 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT103_P10_1_OUT */
193 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT10_P00_1_OUT */
194 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT11_P00_2_OUT */
195 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT1_P02_1_OUT */
196 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT31_P33_9_OUT */
197 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT47_P22_0_OUT */
198 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT54_P21_3_OUT */
199 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT69_P20_13_OUT */
200 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT78_P15_7_OUT */
201 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT79_P15_8_OUT */
202 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT86_P14_6_OUT */
203 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT104_P10_2_OUT */
204 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT107_P10_5_OUT */
205 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT12_P00_3_OUT */
206 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT2_P02_2_OUT */
207 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT33_P33_11_OUT */
208 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT46_P23_5_OUT */
209 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT55_P21_4_OUT */
210 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT70_P20_14_OUT */
211 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT80_P14_0_OUT */
212 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT105_P10_3_OUT */
213 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT108_P10_6_OUT */
214 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT13_P00_4_OUT */
215 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT38_P32_2_OUT */
216 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT3_P02_3_OUT */
217 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT49_P22_2_OUT */
218 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT56_P21_5_OUT */
219 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT60_P20_1_OUT */
220 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT71_P15_0_OUT */
221 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT102_P10_0_OUT */
222 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT14_P00_5_OUT */
223 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT39_P32_3_OUT */
224 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT4_P02_4_OUT */
225 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT50_P22_3_OUT */
226 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT57_P21_6_OUT */
227 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT61_P20_3_OUT */
228 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT72_P15_1_OUT */
229 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT110_P10_8_OUT */
230 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT15_P00_6_OUT */
231 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT23_P33_1_OUT */
232 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT40_P32_4_OUT */
233 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT41_P23_0_OUT */
234 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT58_P21_7_OUT */
235 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT5_P02_5_OUT */
236 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT65_P20_9_OUT */
237 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT73_P15_2_OUT */
238 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT106_P10_4_OUT */
239 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT16_P00_7_OUT */
240 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT24_P33_2_OUT */
241 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT42_P23_1_OUT */
242 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT59_P20_0_OUT */
243 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT66_P20_10_OUT */
244 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT6_P02_6_OUT */
245 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT74_P15_3_OUT */
246 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT17_P00_8_OUT */
247 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT25_P33_3_OUT */
248 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT45_P23_4_OUT */
249 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT67_P20_11_OUT */
250 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT75_P15_4_OUT */
251 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT7_P02_7_OUT */
252 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT18_P00_9_OUT */
253 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT26_P33_4_OUT */
254 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT32_P33_10_OUT */
255 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT68_P20_12_OUT */
256 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT94_P13_3_OUT */
257 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT19_P00_10_OUT */
258 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT27_P33_5_OUT */
259 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT43_P23_2_OUT */
260 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT69_P20_13_OUT */
261 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT95_P11_2_OUT */
262 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT20_P00_11_OUT */
263 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT28_P33_6_OUT */
264 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT44_P23_3_OUT */
265 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT70_P20_14_OUT */
266 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT88_P14_8_OUT */
267 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT96_P11_3_OUT */
268 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT21_P00_12_OUT */
269 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT29_P33_7_OUT */
270 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT71_P15_0_OUT */
271 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT89_P14_9_OUT */
272 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT97_P11_6_OUT */
273 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT22_P33_0_OUT */
274 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT30_P33_8_OUT */
275 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT34_P33_12_OUT */
276 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT51_P21_0_OUT */
277 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT72_P15_1_OUT */
278 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT90_P14_10_OUT */
279 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT98_P11_9_OUT */
280 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT35_P33_13_OUT */
281 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT52_P21_1_OUT */
282 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT65_P20_9_OUT */
283 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT73_P15_2_OUT */
284 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT91_P13_0_OUT */
285 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT99_P11_10_OUT */
286 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT100_P11_11_OUT */
287 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT36_P32_0_OUT */
288 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT62_P20_6_OUT */
289 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT66_P20_10_OUT */
290 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT74_P15_3_OUT */
291 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT92_P13_1_OUT */
292 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT101_P11_12_OUT */
293 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT63_P20_7_OUT */
294 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT64_P20_8_OUT */
295 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT67_P20_11_OUT */
296 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT75_P15_4_OUT */
297 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT93_P13_2_OUT */
298 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT18_P00_9_OUT */
299 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT26_P33_4_OUT */
300 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT32_P33_10_OUT */
301 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT76_P15_5_OUT */
302 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT77_P15_6_OUT */
303 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT85_P14_5_OUT */
304 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT87_P14_7_OUT */
305 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT94_P13_3_OUT */
306 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT19_P00_10_OUT */
307 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT27_P33_5_OUT */
308 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT43_P23_2_OUT */
309 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT78_P15_7_OUT */
310 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT79_P15_8_OUT */
311 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT84_P14_4_OUT */
312 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT86_P14_6_OUT */
313 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT95_P11_2_OUT */
314 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT20_P00_11_OUT */
315 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT28_P33_6_OUT */
316 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT44_P23_3_OUT */
317 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT80_P14_0_OUT */
318 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT83_P14_3_OUT */
319 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT88_P14_8_OUT */
320 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT96_P11_3_OUT */
321 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT21_P00_12_OUT */
322 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT29_P33_7_OUT */
323 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT82_P14_2_OUT */
324 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT89_P14_9_OUT */
325 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT97_P11_6_OUT */
326 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT22_P33_0_OUT */
327 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT30_P33_8_OUT */
328 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT34_P33_12_OUT */
329 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT51_P21_0_OUT */
330 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT81_P14_1_OUT */
331 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT90_P14_10_OUT */
332 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT98_P11_9_OUT */
333 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT35_P33_13_OUT */
334 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT52_P21_1_OUT */
335 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT91_P13_0_OUT */
336 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT99_P11_10_OUT */
337 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT100_P11_11_OUT */
338 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT36_P32_0_OUT */
339 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT62_P20_6_OUT */
340 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT92_P13_1_OUT */
341 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT101_P11_12_OUT */
342 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT63_P20_7_OUT */
343 IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT93_P13_2_OUT */
344 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT; /**< \brief GTM_CLK0: GTM output */
345 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT; /**< \brief GTM_CLK1: GTM output */
346 IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT; /**< \brief GTM_CLK2: GTM output */
347 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN; /**< \brief IfxGtm_TIM0_0_TIN0_P02_0_IN */
348 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN; /**< \brief IfxGtm_TIM0_0_TIN109_P10_7_IN */
349 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN; /**< \brief IfxGtm_TIM0_0_TIN18_P00_9_IN */
350 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN; /**< \brief IfxGtm_TIM0_0_TIN26_P33_4_IN */
351 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN; /**< \brief IfxGtm_TIM0_0_TIN32_P33_10_IN */
352 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN; /**< \brief IfxGtm_TIM0_0_TIN34_P33_12_IN */
353 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN; /**< \brief IfxGtm_TIM0_0_TIN48_P22_1_IN */
354 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN; /**< \brief IfxGtm_TIM0_0_TIN53_P21_2_IN */
355 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN; /**< \brief IfxGtm_TIM0_0_TIN77_P15_6_IN */
356 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN; /**< \brief IfxGtm_TIM0_0_TIN85_P14_5_IN */
357 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN; /**< \brief IfxGtm_TIM0_0_TIN87_P14_7_IN */
358 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN; /**< \brief IfxGtm_TIM0_0_TIN8_P02_8_IN */
359 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN; /**< \brief IfxGtm_TIM0_0_TIN9_P00_0_IN */
360 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN; /**< \brief IfxGtm_TIM0_1_TIN103_P10_1_IN */
361 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN; /**< \brief IfxGtm_TIM0_1_TIN10_P00_1_IN */
362 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN; /**< \brief IfxGtm_TIM0_1_TIN11_P00_2_IN */
363 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN; /**< \brief IfxGtm_TIM0_1_TIN19_P00_10_IN */
364 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN; /**< \brief IfxGtm_TIM0_1_TIN1_P02_1_IN */
365 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN; /**< \brief IfxGtm_TIM0_1_TIN27_P33_5_IN */
366 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN; /**< \brief IfxGtm_TIM0_1_TIN31_P33_9_IN */
367 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN; /**< \brief IfxGtm_TIM0_1_TIN35_P33_13_IN */
368 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN; /**< \brief IfxGtm_TIM0_1_TIN47_P22_0_IN */
369 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN; /**< \brief IfxGtm_TIM0_1_TIN54_P21_3_IN */
370 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN; /**< \brief IfxGtm_TIM0_1_TIN78_P15_7_IN */
371 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN; /**< \brief IfxGtm_TIM0_1_TIN86_P14_6_IN */
372 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN; /**< \brief IfxGtm_TIM0_2_TIN104_P10_2_IN */
373 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN; /**< \brief IfxGtm_TIM0_2_TIN107_P10_5_IN */
374 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN; /**< \brief IfxGtm_TIM0_2_TIN20_P00_11_IN */
375 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN; /**< \brief IfxGtm_TIM0_2_TIN28_P33_6_IN */
376 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN; /**< \brief IfxGtm_TIM0_2_TIN2_P02_2_IN */
377 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN; /**< \brief IfxGtm_TIM0_2_TIN33_P33_11_IN */
378 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN; /**< \brief IfxGtm_TIM0_2_TIN36_P32_0_IN */
379 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN; /**< \brief IfxGtm_TIM0_2_TIN46_P23_5_IN */
380 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN; /**< \brief IfxGtm_TIM0_2_TIN55_P21_4_IN */
381 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN; /**< \brief IfxGtm_TIM0_2_TIN79_P15_8_IN */
382 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN; /**< \brief IfxGtm_TIM0_3_TIN105_P10_3_IN */
383 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN; /**< \brief IfxGtm_TIM0_3_TIN108_P10_6_IN */
384 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN; /**< \brief IfxGtm_TIM0_3_TIN21_P00_12_IN */
385 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN; /**< \brief IfxGtm_TIM0_3_TIN29_P33_7_IN */
386 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN; /**< \brief IfxGtm_TIM0_3_TIN38_P32_2_IN */
387 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN; /**< \brief IfxGtm_TIM0_3_TIN3_P02_3_IN */
388 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN; /**< \brief IfxGtm_TIM0_3_TIN49_P22_2_IN */
389 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN; /**< \brief IfxGtm_TIM0_3_TIN51_P21_0_IN */
390 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN; /**< \brief IfxGtm_TIM0_3_TIN56_P21_5_IN */
391 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN; /**< \brief IfxGtm_TIM0_3_TIN60_P20_1_IN */
392 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN; /**< \brief IfxGtm_TIM0_3_TIN80_P14_0_IN */
393 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN; /**< \brief IfxGtm_TIM0_4_TIN102_P10_0_IN */
394 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN; /**< \brief IfxGtm_TIM0_4_TIN22_P33_0_IN */
395 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN; /**< \brief IfxGtm_TIM0_4_TIN30_P33_8_IN */
396 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN; /**< \brief IfxGtm_TIM0_4_TIN39_P32_3_IN */
397 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN; /**< \brief IfxGtm_TIM0_4_TIN4_P02_4_IN */
398 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN; /**< \brief IfxGtm_TIM0_4_TIN50_P22_3_IN */
399 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN; /**< \brief IfxGtm_TIM0_4_TIN52_P21_1_IN */
400 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN; /**< \brief IfxGtm_TIM0_4_TIN57_P21_6_IN */
401 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN; /**< \brief IfxGtm_TIM0_4_TIN61_P20_3_IN */
402 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN; /**< \brief IfxGtm_TIM0_4_TIN81_P14_1_IN */
403 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN; /**< \brief IfxGtm_TIM0_5_TIN110_P10_8_IN */
404 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN; /**< \brief IfxGtm_TIM0_5_TIN23_P33_1_IN */
405 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN; /**< \brief IfxGtm_TIM0_5_TIN40_P32_4_IN */
406 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN; /**< \brief IfxGtm_TIM0_5_TIN41_P23_0_IN */
407 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN; /**< \brief IfxGtm_TIM0_5_TIN58_P21_7_IN */
408 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN; /**< \brief IfxGtm_TIM0_5_TIN5_P02_5_IN */
409 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN; /**< \brief IfxGtm_TIM0_5_TIN82_P14_2_IN */
410 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN; /**< \brief IfxGtm_TIM0_6_TIN106_P10_4_IN */
411 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN; /**< \brief IfxGtm_TIM0_6_TIN24_P33_2_IN */
412 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN; /**< \brief IfxGtm_TIM0_6_TIN42_P23_1_IN */
413 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN; /**< \brief IfxGtm_TIM0_6_TIN43_P23_2_IN */
414 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN; /**< \brief IfxGtm_TIM0_6_TIN59_P20_0_IN */
415 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN; /**< \brief IfxGtm_TIM0_6_TIN62_P20_6_IN */
416 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN; /**< \brief IfxGtm_TIM0_6_TIN83_P14_3_IN */
417 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN; /**< \brief IfxGtm_TIM0_7_TIN25_P33_3_IN */
418 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN; /**< \brief IfxGtm_TIM0_7_TIN44_P23_3_IN */
419 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN; /**< \brief IfxGtm_TIM0_7_TIN45_P23_4_IN */
420 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN; /**< \brief IfxGtm_TIM0_7_TIN63_P20_7_IN */
421 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN; /**< \brief IfxGtm_TIM0_7_TIN64_P20_8_IN */
422 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN; /**< \brief IfxGtm_TIM0_7_TIN7_P02_7_IN */
423 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN; /**< \brief IfxGtm_TIM0_7_TIN84_P14_4_IN */
424 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN; /**< \brief IfxGtm_TIM1_0_TIN0_P02_0_IN */
425 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN; /**< \brief IfxGtm_TIM1_0_TIN109_P10_7_IN */
426 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN; /**< \brief IfxGtm_TIM1_0_TIN18_P00_9_IN */
427 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN; /**< \brief IfxGtm_TIM1_0_TIN26_P33_4_IN */
428 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN; /**< \brief IfxGtm_TIM1_0_TIN32_P33_10_IN */
429 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN; /**< \brief IfxGtm_TIM1_0_TIN48_P22_1_IN */
430 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN; /**< \brief IfxGtm_TIM1_0_TIN53_P21_2_IN */
431 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN; /**< \brief IfxGtm_TIM1_0_TIN68_P20_12_IN */
432 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN; /**< \brief IfxGtm_TIM1_0_TIN76_P15_5_IN */
433 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN; /**< \brief IfxGtm_TIM1_0_TIN77_P15_6_IN */
434 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN; /**< \brief IfxGtm_TIM1_0_TIN85_P14_5_IN */
435 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN; /**< \brief IfxGtm_TIM1_0_TIN87_P14_7_IN */
436 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN; /**< \brief IfxGtm_TIM1_0_TIN94_P13_3_IN */
437 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN; /**< \brief IfxGtm_TIM1_1_TIN103_P10_1_IN */
438 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN; /**< \brief IfxGtm_TIM1_1_TIN19_P00_10_IN */
439 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN; /**< \brief IfxGtm_TIM1_1_TIN1_P02_1_IN */
440 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN; /**< \brief IfxGtm_TIM1_1_TIN27_P33_5_IN */
441 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN; /**< \brief IfxGtm_TIM1_1_TIN31_P33_9_IN */
442 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN; /**< \brief IfxGtm_TIM1_1_TIN47_P22_0_IN */
443 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN; /**< \brief IfxGtm_TIM1_1_TIN54_P21_3_IN */
444 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN; /**< \brief IfxGtm_TIM1_1_TIN69_P20_13_IN */
445 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN; /**< \brief IfxGtm_TIM1_1_TIN78_P15_7_IN */
446 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN; /**< \brief IfxGtm_TIM1_1_TIN86_P14_6_IN */
447 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN; /**< \brief IfxGtm_TIM1_1_TIN95_P11_2_IN */
448 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN; /**< \brief IfxGtm_TIM1_2_TIN104_P10_2_IN */
449 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN; /**< \brief IfxGtm_TIM1_2_TIN107_P10_5_IN */
450 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN; /**< \brief IfxGtm_TIM1_2_TIN12_P00_3_IN */
451 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN; /**< \brief IfxGtm_TIM1_2_TIN20_P00_11_IN */
452 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN; /**< \brief IfxGtm_TIM1_2_TIN28_P33_6_IN */
453 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN; /**< \brief IfxGtm_TIM1_2_TIN2_P02_2_IN */
454 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN; /**< \brief IfxGtm_TIM1_2_TIN33_P33_11_IN */
455 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN; /**< \brief IfxGtm_TIM1_2_TIN46_P23_5_IN */
456 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN; /**< \brief IfxGtm_TIM1_2_TIN55_P21_4_IN */
457 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN; /**< \brief IfxGtm_TIM1_2_TIN70_P20_14_IN */
458 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN; /**< \brief IfxGtm_TIM1_2_TIN79_P15_8_IN */
459 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN; /**< \brief IfxGtm_TIM1_2_TIN96_P11_3_IN */
460 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN; /**< \brief IfxGtm_TIM1_3_TIN105_P10_3_IN */
461 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN; /**< \brief IfxGtm_TIM1_3_TIN108_P10_6_IN */
462 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN; /**< \brief IfxGtm_TIM1_3_TIN13_P00_4_IN */
463 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN; /**< \brief IfxGtm_TIM1_3_TIN21_P00_12_IN */
464 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN; /**< \brief IfxGtm_TIM1_3_TIN29_P33_7_IN */
465 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN; /**< \brief IfxGtm_TIM1_3_TIN38_P32_2_IN */
466 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN; /**< \brief IfxGtm_TIM1_3_TIN3_P02_3_IN */
467 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN; /**< \brief IfxGtm_TIM1_3_TIN49_P22_2_IN */
468 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN; /**< \brief IfxGtm_TIM1_3_TIN56_P21_5_IN */
469 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN; /**< \brief IfxGtm_TIM1_3_TIN71_P15_0_IN */
470 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN; /**< \brief IfxGtm_TIM1_3_TIN80_P14_0_IN */
471 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN; /**< \brief IfxGtm_TIM1_3_TIN97_P11_6_IN */
472 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN; /**< \brief IfxGtm_TIM1_4_TIN102_P10_0_IN */
473 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN; /**< \brief IfxGtm_TIM1_4_TIN14_P00_5_IN */
474 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN; /**< \brief IfxGtm_TIM1_4_TIN22_P33_0_IN */
475 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN; /**< \brief IfxGtm_TIM1_4_TIN30_P33_8_IN */
476 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN; /**< \brief IfxGtm_TIM1_4_TIN39_P32_3_IN */
477 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN; /**< \brief IfxGtm_TIM1_4_TIN4_P02_4_IN */
478 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN; /**< \brief IfxGtm_TIM1_4_TIN50_P22_3_IN */
479 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN; /**< \brief IfxGtm_TIM1_4_TIN57_P21_6_IN */
480 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN; /**< \brief IfxGtm_TIM1_4_TIN72_P15_1_IN */
481 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN; /**< \brief IfxGtm_TIM1_4_TIN81_P14_1_IN */
482 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN; /**< \brief IfxGtm_TIM1_4_TIN98_P11_9_IN */
483 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN; /**< \brief IfxGtm_TIM1_5_TIN110_P10_8_IN */
484 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN; /**< \brief IfxGtm_TIM1_5_TIN15_P00_6_IN */
485 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN; /**< \brief IfxGtm_TIM1_5_TIN40_P32_4_IN */
486 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN; /**< \brief IfxGtm_TIM1_5_TIN41_P23_0_IN */
487 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN; /**< \brief IfxGtm_TIM1_5_TIN58_P21_7_IN */
488 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN; /**< \brief IfxGtm_TIM1_5_TIN5_P02_5_IN */
489 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN; /**< \brief IfxGtm_TIM1_5_TIN65_P20_9_IN */
490 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN; /**< \brief IfxGtm_TIM1_5_TIN73_P15_2_IN */
491 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN; /**< \brief IfxGtm_TIM1_5_TIN82_P14_2_IN */
492 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN; /**< \brief IfxGtm_TIM1_5_TIN91_P13_0_IN */
493 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN; /**< \brief IfxGtm_TIM1_5_TIN99_P11_10_IN */
494 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN; /**< \brief IfxGtm_TIM1_6_TIN100_P11_11_IN */
495 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN; /**< \brief IfxGtm_TIM1_6_TIN106_P10_4_IN */
496 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN; /**< \brief IfxGtm_TIM1_6_TIN16_P00_7_IN */
497 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN; /**< \brief IfxGtm_TIM1_6_TIN24_P33_2_IN */
498 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN; /**< \brief IfxGtm_TIM1_6_TIN42_P23_1_IN */
499 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN; /**< \brief IfxGtm_TIM1_6_TIN43_P23_2_IN */
500 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN; /**< \brief IfxGtm_TIM1_6_TIN59_P20_0_IN */
501 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN; /**< \brief IfxGtm_TIM1_6_TIN66_P20_10_IN */
502 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN; /**< \brief IfxGtm_TIM1_6_TIN6_P02_6_IN */
503 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN; /**< \brief IfxGtm_TIM1_6_TIN74_P15_3_IN */
504 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN; /**< \brief IfxGtm_TIM1_6_TIN83_P14_3_IN */
505 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN; /**< \brief IfxGtm_TIM1_6_TIN92_P13_1_IN */
506 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN; /**< \brief IfxGtm_TIM1_7_TIN101_P11_12_IN */
507 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN; /**< \brief IfxGtm_TIM1_7_TIN17_P00_8_IN */
508 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN; /**< \brief IfxGtm_TIM1_7_TIN25_P33_3_IN */
509 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN; /**< \brief IfxGtm_TIM1_7_TIN44_P23_3_IN */
510 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN; /**< \brief IfxGtm_TIM1_7_TIN45_P23_4_IN */
511 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN; /**< \brief IfxGtm_TIM1_7_TIN64_P20_8_IN */
512 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN; /**< \brief IfxGtm_TIM1_7_TIN67_P20_11_IN */
513 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN; /**< \brief IfxGtm_TIM1_7_TIN75_P15_4_IN */
514 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN; /**< \brief IfxGtm_TIM1_7_TIN7_P02_7_IN */
515 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN; /**< \brief IfxGtm_TIM1_7_TIN84_P14_4_IN */
516 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN; /**< \brief IfxGtm_TIM1_7_TIN93_P13_2_IN */
517 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN; /**< \brief IfxGtm_TIM2_0_TIN34_P33_12_IN */
518 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN; /**< \brief IfxGtm_TIM2_0_TIN68_P20_12_IN */
519 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN; /**< \brief IfxGtm_TIM2_0_TIN76_P15_5_IN */
520 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN; /**< \brief IfxGtm_TIM2_0_TIN8_P02_8_IN */
521 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN; /**< \brief IfxGtm_TIM2_0_TIN94_P13_3_IN */
522 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN; /**< \brief IfxGtm_TIM2_0_TIN9_P00_0_IN */
523 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN; /**< \brief IfxGtm_TIM2_1_TIN10_P00_1_IN */
524 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN; /**< \brief IfxGtm_TIM2_1_TIN11_P00_2_IN */
525 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN; /**< \brief IfxGtm_TIM2_1_TIN35_P33_13_IN */
526 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN; /**< \brief IfxGtm_TIM2_1_TIN69_P20_13_IN */
527 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN; /**< \brief IfxGtm_TIM2_1_TIN95_P11_2_IN */
528 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN; /**< \brief IfxGtm_TIM2_2_TIN12_P00_3_IN */
529 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN; /**< \brief IfxGtm_TIM2_2_TIN36_P32_0_IN */
530 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN; /**< \brief IfxGtm_TIM2_2_TIN70_P20_14_IN */
531 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN; /**< \brief IfxGtm_TIM2_2_TIN88_P14_8_IN */
532 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN; /**< \brief IfxGtm_TIM2_2_TIN96_P11_3_IN */
533 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN; /**< \brief IfxGtm_TIM2_3_TIN13_P00_4_IN */
534 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN; /**< \brief IfxGtm_TIM2_3_TIN60_P20_1_IN */
535 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN; /**< \brief IfxGtm_TIM2_3_TIN71_P15_0_IN */
536 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN; /**< \brief IfxGtm_TIM2_3_TIN89_P14_9_IN */
537 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN; /**< \brief IfxGtm_TIM2_3_TIN97_P11_6_IN */
538 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN; /**< \brief IfxGtm_TIM2_4_TIN14_P00_5_IN */
539 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN; /**< \brief IfxGtm_TIM2_4_TIN51_P21_0_IN */
540 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN; /**< \brief IfxGtm_TIM2_4_TIN61_P20_3_IN */
541 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN; /**< \brief IfxGtm_TIM2_4_TIN72_P15_1_IN */
542 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN; /**< \brief IfxGtm_TIM2_4_TIN90_P14_10_IN */
543 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN; /**< \brief IfxGtm_TIM2_4_TIN98_P11_9_IN */
544 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN; /**< \brief IfxGtm_TIM2_5_TIN15_P00_6_IN */
545 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN; /**< \brief IfxGtm_TIM2_5_TIN52_P21_1_IN */
546 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN; /**< \brief IfxGtm_TIM2_5_TIN65_P20_9_IN */
547 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN; /**< \brief IfxGtm_TIM2_5_TIN73_P15_2_IN */
548 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN; /**< \brief IfxGtm_TIM2_5_TIN91_P13_0_IN */
549 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN; /**< \brief IfxGtm_TIM2_5_TIN99_P11_10_IN */
550 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN; /**< \brief IfxGtm_TIM2_6_TIN100_P11_11_IN */
551 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN; /**< \brief IfxGtm_TIM2_6_TIN16_P00_7_IN */
552 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN; /**< \brief IfxGtm_TIM2_6_TIN62_P20_6_IN */
553 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN; /**< \brief IfxGtm_TIM2_6_TIN66_P20_10_IN */
554 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN; /**< \brief IfxGtm_TIM2_6_TIN74_P15_3_IN */
555 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN; /**< \brief IfxGtm_TIM2_6_TIN92_P13_1_IN */
556 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN; /**< \brief IfxGtm_TIM2_7_TIN101_P11_12_IN */
557 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN; /**< \brief IfxGtm_TIM2_7_TIN17_P00_8_IN */
558 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN; /**< \brief IfxGtm_TIM2_7_TIN63_P20_7_IN */
559 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN; /**< \brief IfxGtm_TIM2_7_TIN67_P20_11_IN */
560 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN; /**< \brief IfxGtm_TIM2_7_TIN75_P15_4_IN */
561 IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN; /**< \brief IfxGtm_TIM2_7_TIN93_P13_2_IN */
562 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM0_0_TOUT109_P10_7_OUT */
563 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM0_0_TOUT18_P00_9_OUT */
564 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM0_0_TOUT26_P33_4_OUT */
565 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM0_0_TOUT32_P33_10_OUT */
566 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM0_0_TOUT53_P21_2_OUT */
567 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM0_0_TOUT76_P15_5_OUT */
568 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM0_0_TOUT77_P15_6_OUT */
569 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_TOM0_0_TOUT85_P14_5_OUT */
570 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM0_0_TOUT87_P14_7_OUT */
571 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM0_10_TOUT12_P00_3_OUT */
572 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM0_10_TOUT2_P02_2_OUT */
573 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM0_10_TOUT41_P23_0_OUT */
574 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM0_10_TOUT46_P23_5_OUT */
575 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM0_10_TOUT62_P20_6_OUT */
576 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM0_10_TOUT70_P20_14_OUT */
577 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM0_10_TOUT96_P11_3_OUT */
578 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM0_11_TOUT13_P00_4_OUT */
579 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM0_11_TOUT3_P02_3_OUT */
580 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM0_11_TOUT43_P23_2_OUT */
581 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM0_11_TOUT49_P22_2_OUT */
582 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM0_11_TOUT63_P20_7_OUT */
583 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM0_11_TOUT71_P15_0_OUT */
584 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM0_11_TOUT97_P11_6_OUT */
585 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM0_12_TOUT14_P00_5_OUT */
586 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM0_12_TOUT34_P33_12_OUT */
587 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM0_12_TOUT44_P23_3_OUT */
588 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM0_12_TOUT4_P02_4_OUT */
589 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM0_12_TOUT50_P22_3_OUT */
590 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM0_12_TOUT72_P15_1_OUT */
591 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM0_12_TOUT98_P11_9_OUT */
592 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM0_13_TOUT15_P00_6_OUT */
593 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM0_13_TOUT35_P33_13_OUT */
594 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM0_13_TOUT5_P02_5_OUT */
595 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM0_13_TOUT65_P20_9_OUT */
596 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM0_13_TOUT73_P15_2_OUT */
597 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM0_13_TOUT99_P11_10_OUT */
598 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM0_14_TOUT100_P11_11_OUT */
599 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM0_14_TOUT16_P00_7_OUT */
600 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM0_14_TOUT36_P32_0_OUT */
601 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM0_14_TOUT66_P20_10_OUT */
602 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM0_14_TOUT6_P02_6_OUT */
603 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM0_14_TOUT74_P15_3_OUT */
604 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM0_15_TOUT101_P11_12_OUT */
605 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM0_15_TOUT17_P00_8_OUT */
606 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_15_TOUT42_P23_1_OUT */
607 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM0_15_TOUT67_P20_11_OUT */
608 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM0_15_TOUT75_P15_4_OUT */
609 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM0_15_TOUT7_P02_7_OUT */
610 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM0_1_TOUT103_P10_1_OUT */
611 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM0_1_TOUT19_P00_10_OUT */
612 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM0_1_TOUT27_P33_5_OUT */
613 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM0_1_TOUT31_P33_9_OUT */
614 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM0_1_TOUT54_P21_3_OUT */
615 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM0_1_TOUT78_P15_7_OUT */
616 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM0_1_TOUT86_P14_6_OUT */
617 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM0_2_TOUT104_P10_2_OUT */
618 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM0_2_TOUT107_P10_5_OUT */
619 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM0_2_TOUT20_P00_11_OUT */
620 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM0_2_TOUT28_P33_6_OUT */
621 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM0_2_TOUT33_P33_11_OUT */
622 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM0_2_TOUT55_P21_4_OUT */
623 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM0_2_TOUT79_P15_8_OUT */
624 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM0_2_TOUT88_P14_8_OUT */
625 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM0_3_TOUT105_P10_3_OUT */
626 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM0_3_TOUT108_P10_6_OUT */
627 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM0_3_TOUT21_P00_12_OUT */
628 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM0_3_TOUT29_P33_7_OUT */
629 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM0_3_TOUT38_P32_2_OUT */
630 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM0_3_TOUT56_P21_5_OUT */
631 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM0_3_TOUT60_P20_1_OUT */
632 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM0_3_TOUT80_P14_0_OUT */
633 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM0_3_TOUT89_P14_9_OUT */
634 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT102_P10_0_OUT */
635 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT22_P33_0_OUT */
636 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM0_4_TOUT30_P33_8_OUT */
637 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM0_4_TOUT39_P32_3_OUT */
638 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM0_4_TOUT57_P21_6_OUT */
639 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM0_4_TOUT61_P20_3_OUT */
640 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM0_4_TOUT81_P14_1_OUT */
641 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM0_4_TOUT90_P14_10_OUT */
642 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM0_5_TOUT110_P10_8_OUT */
643 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM0_5_TOUT23_P33_1_OUT */
644 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM0_5_TOUT40_P32_4_OUT */
645 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM0_5_TOUT58_P21_7_OUT */
646 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM0_5_TOUT82_P14_2_OUT */
647 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM0_5_TOUT91_P13_0_OUT */
648 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM0_6_TOUT106_P10_4_OUT */
649 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM0_6_TOUT24_P33_2_OUT */
650 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT42_P23_1_OUT */
651 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM0_6_TOUT59_P20_0_OUT */
652 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT; /**< \brief IfxGtm_TOM0_6_TOUT83_P14_3_OUT */
653 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT92_P13_1_OUT */
654 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM0_7_TOUT25_P33_3_OUT */
655 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM0_7_TOUT45_P23_4_OUT */
656 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM0_7_TOUT64_P20_8_OUT */
657 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM0_7_TOUT84_P14_4_OUT */
658 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM0_7_TOUT93_P13_2_OUT */
659 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT0_P02_0_OUT */
660 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM0_8_TOUT48_P22_1_OUT */
661 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT51_P21_0_OUT */
662 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM0_8_TOUT68_P20_12_OUT */
663 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM0_8_TOUT8_P02_8_OUT */
664 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM0_8_TOUT94_P13_3_OUT */
665 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM0_8_TOUT95_P11_2_OUT */
666 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT9_P00_0_OUT */
667 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT10_P00_1_OUT */
668 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM0_9_TOUT11_P00_2_OUT */
669 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT1_P02_1_OUT */
670 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT; /**< \brief IfxGtm_TOM0_9_TOUT47_P22_0_OUT */
671 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT52_P21_1_OUT */
672 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM0_9_TOUT69_P20_13_OUT */
673 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM1_0_TOUT18_P00_9_OUT */
674 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM1_0_TOUT26_P33_4_OUT */
675 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM1_0_TOUT32_P33_10_OUT */
676 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM1_0_TOUT48_P22_1_OUT */
677 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM1_0_TOUT53_P21_2_OUT */
678 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM1_0_TOUT68_P20_12_OUT */
679 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM1_0_TOUT76_P15_5_OUT */
680 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM1_0_TOUT77_P15_6_OUT */
681 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_TOM1_0_TOUT85_P14_5_OUT */
682 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM1_0_TOUT87_P14_7_OUT */
683 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM1_0_TOUT8_P02_8_OUT */
684 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM1_0_TOUT94_P13_3_OUT */
685 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM1_0_TOUT9_P00_0_OUT */
686 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM1_10_TOUT104_P10_2_OUT */
687 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM1_10_TOUT107_P10_5_OUT */
688 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM1_10_TOUT2_P02_2_OUT */
689 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM1_10_TOUT62_P20_6_OUT */
690 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM1_11_TOUT105_P10_3_OUT */
691 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM1_11_TOUT108_P10_6_OUT */
692 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM1_11_TOUT3_P02_3_OUT */
693 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM1_11_TOUT60_P20_1_OUT */
694 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM1_11_TOUT63_P20_7_OUT */
695 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM1_12_TOUT102_P10_0_OUT */
696 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM1_12_TOUT34_P33_12_OUT */
697 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM1_12_TOUT4_P02_4_OUT */
698 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM1_12_TOUT61_P20_3_OUT */
699 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM1_13_TOUT110_P10_8_OUT */
700 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM1_13_TOUT35_P33_13_OUT */
701 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM1_13_TOUT5_P02_5_OUT */
702 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM1_13_TOUT65_P20_9_OUT */
703 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM1_14_TOUT36_P32_0_OUT */
704 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM1_14_TOUT66_P20_10_OUT */
705 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM1_14_TOUT6_P02_6_OUT */
706 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM1_15_TOUT67_P20_11_OUT */
707 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM1_15_TOUT7_P02_7_OUT */
708 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM1_1_TOUT10_P00_1_OUT */
709 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM1_1_TOUT11_P00_2_OUT */
710 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM1_1_TOUT19_P00_10_OUT */
711 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM1_1_TOUT27_P33_5_OUT */
712 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM1_1_TOUT31_P33_9_OUT */
713 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_TOM1_1_TOUT47_P22_0_OUT */
714 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM1_1_TOUT54_P21_3_OUT */
715 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM1_1_TOUT69_P20_13_OUT */
716 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM1_1_TOUT78_P15_7_OUT */
717 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM1_1_TOUT86_P14_6_OUT */
718 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM1_1_TOUT95_P11_2_OUT */
719 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM1_2_TOUT12_P00_3_OUT */
720 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT20_P00_11_OUT */
721 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM1_2_TOUT28_P33_6_OUT */
722 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT33_P33_11_OUT */
723 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM1_2_TOUT46_P23_5_OUT */
724 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM1_2_TOUT55_P21_4_OUT */
725 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM1_2_TOUT70_P20_14_OUT */
726 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM1_2_TOUT79_P15_8_OUT */
727 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM1_2_TOUT88_P14_8_OUT */
728 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM1_2_TOUT96_P11_3_OUT */
729 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM1_3_TOUT13_P00_4_OUT */
730 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM1_3_TOUT21_P00_12_OUT */
731 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM1_3_TOUT29_P33_7_OUT */
732 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM1_3_TOUT38_P32_2_OUT */
733 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM1_3_TOUT49_P22_2_OUT */
734 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM1_3_TOUT56_P21_5_OUT */
735 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM1_3_TOUT71_P15_0_OUT */
736 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM1_3_TOUT80_P14_0_OUT */
737 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM1_3_TOUT89_P14_9_OUT */
738 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM1_3_TOUT97_P11_6_OUT */
739 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM1_4_TOUT14_P00_5_OUT */
740 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM1_4_TOUT22_P33_0_OUT */
741 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM1_4_TOUT30_P33_8_OUT */
742 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM1_4_TOUT39_P32_3_OUT */
743 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM1_4_TOUT50_P22_3_OUT */
744 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM1_4_TOUT57_P21_6_OUT */
745 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT72_P15_1_OUT */
746 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT81_P14_1_OUT */
747 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM1_4_TOUT90_P14_10_OUT */
748 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM1_4_TOUT98_P11_9_OUT */
749 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM1_5_TOUT15_P00_6_OUT */
750 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM1_5_TOUT23_P33_1_OUT */
751 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM1_5_TOUT40_P32_4_OUT */
752 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM1_5_TOUT41_P23_0_OUT */
753 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM1_5_TOUT58_P21_7_OUT */
754 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT73_P15_2_OUT */
755 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT82_P14_2_OUT */
756 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM1_5_TOUT91_P13_0_OUT */
757 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM1_5_TOUT99_P11_10_OUT */
758 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM1_6_TOUT100_P11_11_OUT */
759 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM1_6_TOUT106_P10_4_OUT */
760 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM1_6_TOUT16_P00_7_OUT */
761 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM1_6_TOUT24_P33_2_OUT */
762 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM1_6_TOUT43_P23_2_OUT */
763 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM1_6_TOUT59_P20_0_OUT */
764 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM1_6_TOUT74_P15_3_OUT */
765 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT; /**< \brief IfxGtm_TOM1_6_TOUT83_P14_3_OUT */
766 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM1_6_TOUT92_P13_1_OUT */
767 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM1_7_TOUT101_P11_12_OUT */
768 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM1_7_TOUT17_P00_8_OUT */
769 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT25_P33_3_OUT */
770 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT44_P23_3_OUT */
771 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT45_P23_4_OUT */
772 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM1_7_TOUT64_P20_8_OUT */
773 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT75_P15_4_OUT */
774 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT84_P14_4_OUT */
775 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM1_7_TOUT93_P13_2_OUT */
776 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM1_8_TOUT0_P02_0_OUT */
777 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM1_8_TOUT109_P10_7_OUT */
778 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM1_8_TOUT51_P21_0_OUT */
779 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT103_P10_1_OUT */
780 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT1_P02_1_OUT */
781 IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT52_P21_1_OUT */
782
783 /** \} */
784
785 #endif /* IFXGTM_PINMAP_H */
IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT
IfxGtm_TOM0_1_TOUT19_P00_10_OUT.
Definition: IfxGtm_PinMap.h:611
IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT
IfxGtm_TOM1_6_TOUT83_P14_3_OUT.
Definition: IfxGtm_PinMap.h:765
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT
IfxGtm_ATOM1_1_TOUT78_P15_7_OUT.
Definition: IfxGtm_PinMap.h:200
IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT
IfxGtm_TOM1_4_TOUT14_P00_5_OUT.
Definition: IfxGtm_PinMap.h:739
IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT
IfxGtm_TOM1_2_TOUT46_P23_5_OUT.
Definition: IfxGtm_PinMap.h:723
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT
IfxGtm_ATOM2_4_TOUT22_P33_0_OUT.
Definition: IfxGtm_PinMap.h:273
IfxGtm_TIM1_3_TIN56_P21_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN
IfxGtm_TIM1_3_TIN56_P21_5_IN.
Definition: IfxGtm_PinMap.h:468
IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT
IfxGtm_TOM1_0_TOUT9_P00_0_OUT.
Definition: IfxGtm_PinMap.h:685
IfxGtm_TIM1_5_TIN5_P02_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN
IfxGtm_TIM1_5_TIN5_P02_5_IN.
Definition: IfxGtm_PinMap.h:488
IfxGtm_TIM1_3_TIN80_P14_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN
IfxGtm_TIM1_3_TIN80_P14_0_IN.
Definition: IfxGtm_PinMap.h:470
IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT
IfxGtm_TOM0_1_TOUT54_P21_3_OUT.
Definition: IfxGtm_PinMap.h:614
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT
IfxGtm_ATOM1_0_TOUT0_P02_0_OUT.
Definition: IfxGtm_PinMap.h:182
IfxGtm_TIM1_5_TIN91_P13_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN
IfxGtm_TIM1_5_TIN91_P13_0_IN.
Definition: IfxGtm_PinMap.h:492
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT
IfxGtm_ATOM2_4_TOUT34_P33_12_OUT.
Definition: IfxGtm_PinMap.h:275
IfxGtm_TIM1_0_TIN87_P14_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN
IfxGtm_TIM1_0_TIN87_P14_7_IN.
Definition: IfxGtm_PinMap.h:435
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT
IfxGtm_ATOM1_1_TOUT69_P20_13_OUT.
Definition: IfxGtm_PinMap.h:199
IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT
IfxGtm_TOM0_3_TOUT21_P00_12_OUT.
Definition: IfxGtm_PinMap.h:627
IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT
IfxGtm_TOM0_0_TOUT76_P15_5_OUT.
Definition: IfxGtm_PinMap.h:567
IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT
IfxGtm_TOM1_0_TOUT77_P15_6_OUT.
Definition: IfxGtm_PinMap.h:680
IfxGtm_TIM2_0_TIN94_P13_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN
IfxGtm_TIM2_0_TIN94_P13_3_IN.
Definition: IfxGtm_PinMap.h:521
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT
IfxGtm_ATOM2_6_TOUT62_P20_6_OUT.
Definition: IfxGtm_PinMap.h:288
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT
IfxGtm_ATOM0_6_TOUT6_P02_6_OUT.
Definition: IfxGtm_PinMap.h:176
IfxGtm_TIM1_0_TIN0_P02_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN
IfxGtm_TIM1_0_TIN0_P02_0_IN.
Definition: IfxGtm_PinMap.h:424
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT
IfxGtm_ATOM1_1_TOUT47_P22_0_OUT.
Definition: IfxGtm_PinMap.h:197
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT
IfxGtm_ATOM1_6_TOUT66_P20_10_OUT.
Definition: IfxGtm_PinMap.h:243
IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT
IfxGtm_TOM0_0_TOUT18_P00_9_OUT.
Definition: IfxGtm_PinMap.h:563
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT
IfxGtm_ATOM2_0_TOUT26_P33_4_OUT.
Definition: IfxGtm_PinMap.h:253
IfxGtm_PinMap_setTimTin
IFX_EXTERN void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:689
IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT
IfxGtm_TOM0_10_TOUT96_P11_3_OUT.
Definition: IfxGtm_PinMap.h:577
IfxGtm_TIM1_7_TIN44_P23_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN
IfxGtm_TIM1_7_TIN44_P23_3_IN.
Definition: IfxGtm_PinMap.h:509
IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT
IfxGtm_TOM0_1_TOUT78_P15_7_OUT.
Definition: IfxGtm_PinMap.h:615
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT
IfxGtm_ATOM1_6_TOUT42_P23_1_OUT.
Definition: IfxGtm_PinMap.h:241
IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT
IfxGtm_TOM0_11_TOUT13_P00_4_OUT.
Definition: IfxGtm_PinMap.h:578
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT
IfxGtm_ATOM1_0_TOUT9_P00_0_OUT.
Definition: IfxGtm_PinMap.h:191
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT
IfxGtm_ATOM2_5_TOUT99_P11_10_OUT.
Definition: IfxGtm_PinMap.h:285
IfxGtm_TIM2_2_TIN70_P20_14_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN
IfxGtm_TIM2_2_TIN70_P20_14_IN.
Definition: IfxGtm_PinMap.h:530
IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT
IfxGtm_TOM0_7_TOUT64_P20_8_OUT.
Definition: IfxGtm_PinMap.h:656
IfxGtm_Atom_ToutMap::channel
IfxGtm_Atom_Ch channel
ATOM channel index.
Definition: IfxGtm_PinMap.h:88
IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT
IfxGtm_TOM1_7_TOUT25_P33_3_OUT.
Definition: IfxGtm_PinMap.h:769
IfxGtm_TIM1_5_TIN40_P32_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN
IfxGtm_TIM1_5_TIN40_P32_4_IN.
Definition: IfxGtm_PinMap.h:485
IfxGtm_TIM0_1_TIN10_P00_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN
IfxGtm_TIM0_1_TIN10_P00_1_IN.
Definition: IfxGtm_PinMap.h:361
IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT
IfxGtm_TOM0_9_TOUT69_P20_13_OUT.
Definition: IfxGtm_PinMap.h:672
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT
IfxGtm_ATOM0_5_TOUT41_P23_0_OUT.
Definition: IfxGtm_PinMap.h:168
IfxGtm_TIM2_1_TIN35_P33_13_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN
IfxGtm_TIM2_1_TIN35_P33_13_IN.
Definition: IfxGtm_PinMap.h:525
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT
IfxGtm_ATOM1_1_TOUT11_P00_2_OUT.
Definition: IfxGtm_PinMap.h:194
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT
IfxGtm_ATOM1_4_TOUT72_P15_1_OUT.
Definition: IfxGtm_PinMap.h:228
IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT
IfxGtm_TOM1_9_TOUT1_P02_1_OUT.
Definition: IfxGtm_PinMap.h:780
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT
IfxGtm_ATOM3_1_TOUT79_P15_8_OUT.
Definition: IfxGtm_PinMap.h:310
IfxGtm_Clk_Out
GTM Clock Output.
Definition: IfxGtm_PinMap.h:110
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT
IfxGtm_ATOM3_1_TOUT43_P23_2_OUT.
Definition: IfxGtm_PinMap.h:308
IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT
IfxGtm_TOM1_5_TOUT91_P13_0_OUT.
Definition: IfxGtm_PinMap.h:756
IfxGtm_Atom_ToutMap::toutn
uint32 toutn
TOUT number.
Definition: IfxGtm_PinMap.h:90
IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT
IfxGtm_TOM1_0_TOUT94_P13_3_OUT.
Definition: IfxGtm_PinMap.h:684
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT
IfxGtm_ATOM2_1_TOUT27_P33_5_OUT.
Definition: IfxGtm_PinMap.h:258
IfxGtm_TIM2_3_TIN13_P00_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN
IfxGtm_TIM2_3_TIN13_P00_4_IN.
Definition: IfxGtm_PinMap.h:533
IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT
IfxGtm_TOM1_15_TOUT7_P02_7_OUT.
Definition: IfxGtm_PinMap.h:707
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT
IfxGtm_ATOM1_1_TOUT86_P14_6_OUT.
Definition: IfxGtm_PinMap.h:202
IfxGtm_TIM0_4_TIN57_P21_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN
IfxGtm_TIM0_4_TIN57_P21_6_IN.
Definition: IfxGtm_PinMap.h:400
IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT
IfxGtm_TOM0_11_TOUT49_P22_2_OUT.
Definition: IfxGtm_PinMap.h:581
IfxGtm_TIM1_3_TIN105_P10_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN
IfxGtm_TIM1_3_TIN105_P10_3_IN.
Definition: IfxGtm_PinMap.h:460
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT
IfxGtm_ATOM3_0_TOUT87_P14_7_OUT.
Definition: IfxGtm_PinMap.h:304
IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT
IfxGtm_TOM1_14_TOUT6_P02_6_OUT.
Definition: IfxGtm_PinMap.h:705
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT
IfxGtm_ATOM1_4_TOUT39_P32_3_OUT.
Definition: IfxGtm_PinMap.h:223
IfxGtm_TIM1_0_TIN94_P13_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN
IfxGtm_TIM1_0_TIN94_P13_3_IN.
Definition: IfxGtm_PinMap.h:436
IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT
IfxGtm_TOM1_0_TOUT85_P14_5_OUT.
Definition: IfxGtm_PinMap.h:681
IfxGtm_TIM0_4_TIN39_P32_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN
IfxGtm_TIM0_4_TIN39_P32_3_IN.
Definition: IfxGtm_PinMap.h:396
IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT
IfxGtm_TOM0_8_TOUT94_P13_3_OUT.
Definition: IfxGtm_PinMap.h:664
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT
IfxGtm_ATOM0_4_TOUT102_P10_0_OUT.
Definition: IfxGtm_PinMap.h:156
IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT
IfxGtm_TOM1_12_TOUT4_P02_4_OUT.
Definition: IfxGtm_PinMap.h:697
IfxGtm_TIM1_4_TIN57_P21_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN
IfxGtm_TIM1_4_TIN57_P21_6_IN.
Definition: IfxGtm_PinMap.h:479
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT
IfxGtm_ATOM2_7_TOUT67_P20_11_OUT.
Definition: IfxGtm_PinMap.h:295
IfxGtm_TIM2_0_TIN68_P20_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN
IfxGtm_TIM2_0_TIN68_P20_12_IN.
Definition: IfxGtm_PinMap.h:518
IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT
IfxGtm_TOM0_11_TOUT43_P23_2_OUT.
Definition: IfxGtm_PinMap.h:580
IfxGtm_TIM0_5_TIN41_P23_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN
IfxGtm_TIM0_5_TIN41_P23_0_IN.
Definition: IfxGtm_PinMap.h:406
IfxGtm_TIM1_3_TIN21_P00_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN
IfxGtm_TIM1_3_TIN21_P00_12_IN.
Definition: IfxGtm_PinMap.h:463
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT
IfxGtm_ATOM0_2_TOUT104_P10_2_OUT.
Definition: IfxGtm_PinMap.h:139
IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT
IfxGtm_TOM0_9_TOUT11_P00_2_OUT.
Definition: IfxGtm_PinMap.h:668
IfxGtm_TIM1_7_TIN64_P20_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN
IfxGtm_TIM1_7_TIN64_P20_8_IN.
Definition: IfxGtm_PinMap.h:511
IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT
IfxGtm_TOM0_9_TOUT10_P00_1_OUT.
Definition: IfxGtm_PinMap.h:667
IfxGtm_TIM1_7_TIN93_P13_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN
IfxGtm_TIM1_7_TIN93_P13_2_IN.
Definition: IfxGtm_PinMap.h:516
IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT
IfxGtm_TOM0_0_TOUT26_P33_4_OUT.
Definition: IfxGtm_PinMap.h:564
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT
IfxGtm_ATOM1_0_TOUT76_P15_5_OUT.
Definition: IfxGtm_PinMap.h:187
IfxGtm_TIM1_5_TIN110_P10_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN
IfxGtm_TIM1_5_TIN110_P10_8_IN.
Definition: IfxGtm_PinMap.h:483
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT
IfxGtm_ATOM0_2_TOUT46_P23_5_OUT.
Definition: IfxGtm_PinMap.h:144
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxGtm_TIM2_5_TIN91_P13_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN
IfxGtm_TIM2_5_TIN91_P13_0_IN.
Definition: IfxGtm_PinMap.h:548
IfxGtm_TIM0_7_TIN64_P20_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN
IfxGtm_TIM0_7_TIN64_P20_8_IN.
Definition: IfxGtm_PinMap.h:421
IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT
IfxGtm_TOM1_5_TOUT99_P11_10_OUT.
Definition: IfxGtm_PinMap.h:757
IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT
IfxGtm_TOM1_5_TOUT15_P00_6_OUT.
Definition: IfxGtm_PinMap.h:749
IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT
IfxGtm_TOM1_5_TOUT41_P23_0_OUT.
Definition: IfxGtm_PinMap.h:752
IfxGtm_Clk_Out::module
Ifx_GTM * module
Base address.
Definition: IfxGtm_PinMap.h:112
IfxGtm_TIM1_2_TIN2_P02_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN
IfxGtm_TIM1_2_TIN2_P02_2_IN.
Definition: IfxGtm_PinMap.h:453
IfxGtm_TIM0_5_TIN82_P14_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN
IfxGtm_TIM0_5_TIN82_P14_2_IN.
Definition: IfxGtm_PinMap.h:409
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT
IfxGtm_ATOM2_6_TOUT36_P32_0_OUT.
Definition: IfxGtm_PinMap.h:287
IfxGtm_CLK1_P32_4_OUT
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT
GTM_CLK1: GTM output.
Definition: IfxGtm_PinMap.h:345
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT
IfxGtm_ATOM3_0_TOUT32_P33_10_OUT.
Definition: IfxGtm_PinMap.h:300
IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT
IfxGtm_TOM1_3_TOUT29_P33_7_OUT.
Definition: IfxGtm_PinMap.h:731
IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT
IfxGtm_TOM0_2_TOUT20_P00_11_OUT.
Definition: IfxGtm_PinMap.h:619
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT
IfxGtm_ATOM1_3_TOUT71_P15_0_OUT.
Definition: IfxGtm_PinMap.h:220
IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT
IfxGtm_TOM1_10_TOUT104_P10_2_OUT.
Definition: IfxGtm_PinMap.h:686
IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT
IfxGtm_TOM1_11_TOUT105_P10_3_OUT.
Definition: IfxGtm_PinMap.h:690
IfxGtm_TIM1_1_TIN47_P22_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN
IfxGtm_TIM1_1_TIN47_P22_0_IN.
Definition: IfxGtm_PinMap.h:442
IfxGtm_TIM1_2_TIN96_P11_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN
IfxGtm_TIM1_2_TIN96_P11_3_IN.
Definition: IfxGtm_PinMap.h:459
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT
IfxGtm_ATOM0_1_TOUT11_P00_2_OUT.
Definition: IfxGtm_PinMap.h:133
IfxGtm_TIM0_1_TIN19_P00_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN
IfxGtm_TIM0_1_TIN19_P00_10_IN.
Definition: IfxGtm_PinMap.h:363
IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT
IfxGtm_TOM0_13_TOUT65_P20_9_OUT.
Definition: IfxGtm_PinMap.h:595
IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT
IfxGtm_TOM0_11_TOUT97_P11_6_OUT.
Definition: IfxGtm_PinMap.h:584
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT
IfxGtm_ATOM1_3_TOUT56_P21_5_OUT.
Definition: IfxGtm_PinMap.h:218
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT
IfxGtm_ATOM1_0_TOUT53_P21_2_OUT.
Definition: IfxGtm_PinMap.h:185
IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT
IfxGtm_TOM1_4_TOUT39_P32_3_OUT.
Definition: IfxGtm_PinMap.h:742
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT
IfxGtm_ATOM0_5_TOUT40_P32_4_OUT.
Definition: IfxGtm_PinMap.h:167
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT
IfxGtm_ATOM1_4_TOUT102_P10_0_OUT.
Definition: IfxGtm_PinMap.h:221
IfxGtm_PinMap_setTomTout
IFX_EXTERN void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:713
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT
IfxGtm_ATOM3_5_TOUT35_P33_13_OUT.
Definition: IfxGtm_PinMap.h:333
IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT
IfxGtm_TOM0_12_TOUT34_P33_12_OUT.
Definition: IfxGtm_PinMap.h:586
IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT
IfxGtm_TOM1_6_TOUT24_P33_2_OUT.
Definition: IfxGtm_PinMap.h:761
IfxGtm_TIM0_4_TIN81_P14_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN
IfxGtm_TIM0_4_TIN81_P14_1_IN.
Definition: IfxGtm_PinMap.h:402
IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT
IfxGtm_TOM0_14_TOUT6_P02_6_OUT.
Definition: IfxGtm_PinMap.h:602
IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT
IfxGtm_TOM1_5_TOUT73_P15_2_OUT.
Definition: IfxGtm_PinMap.h:754
IfxGtm_TIM0_4_TIN30_P33_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN
IfxGtm_TIM0_4_TIN30_P33_8_IN.
Definition: IfxGtm_PinMap.h:395
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT
IfxGtm_ATOM3_0_TOUT94_P13_3_OUT.
Definition: IfxGtm_PinMap.h:305
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT
IfxGtm_ATOM1_7_TOUT7_P02_7_OUT.
Definition: IfxGtm_PinMap.h:251
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT
IfxGtm_ATOM0_3_TOUT105_P10_3_OUT.
Definition: IfxGtm_PinMap.h:147
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT
IfxGtm_ATOM3_6_TOUT100_P11_11_OUT.
Definition: IfxGtm_PinMap.h:337
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT
IfxGtm_ATOM1_2_TOUT55_P21_4_OUT.
Definition: IfxGtm_PinMap.h:209
IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT
IfxGtm_TOM1_8_TOUT109_P10_7_OUT.
Definition: IfxGtm_PinMap.h:777
IfxGtm_TIM1_2_TIN46_P23_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN
IfxGtm_TIM1_2_TIN46_P23_5_IN.
Definition: IfxGtm_PinMap.h:455
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT
IfxGtm_ATOM0_5_TOUT58_P21_7_OUT.
Definition: IfxGtm_PinMap.h:169
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT
IfxGtm_ATOM1_3_TOUT105_P10_3_OUT.
Definition: IfxGtm_PinMap.h:212
IfxGtm_TIM0_2_TIN2_P02_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN
IfxGtm_TIM0_2_TIN2_P02_2_IN.
Definition: IfxGtm_PinMap.h:376
IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT
IfxGtm_TOM1_5_TOUT82_P14_2_OUT.
Definition: IfxGtm_PinMap.h:755
IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT
IfxGtm_TOM0_12_TOUT14_P00_5_OUT.
Definition: IfxGtm_PinMap.h:585
IfxGtm_TIM0_3_TIN51_P21_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN
IfxGtm_TIM0_3_TIN51_P21_0_IN.
Definition: IfxGtm_PinMap.h:389
IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT
IfxGtm_TOM1_2_TOUT79_P15_8_OUT.
Definition: IfxGtm_PinMap.h:726
IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT
IfxGtm_TOM1_11_TOUT3_P02_3_OUT.
Definition: IfxGtm_PinMap.h:692
IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT
IfxGtm_TOM1_6_TOUT92_P13_1_OUT.
Definition: IfxGtm_PinMap.h:766
IfxGtm_TIM0_3_TIN56_P21_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN
IfxGtm_TIM0_3_TIN56_P21_5_IN.
Definition: IfxGtm_PinMap.h:390
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT
IfxGtm_ATOM2_6_TOUT92_P13_1_OUT.
Definition: IfxGtm_PinMap.h:291
IfxGtm_TIM0_1_TIN86_P14_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN
IfxGtm_TIM0_1_TIN86_P14_6_IN.
Definition: IfxGtm_PinMap.h:371
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT
IfxGtm_ATOM2_4_TOUT98_P11_9_OUT.
Definition: IfxGtm_PinMap.h:279
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxGtm_TIM1_4_TIN14_P00_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN
IfxGtm_TIM1_4_TIN14_P00_5_IN.
Definition: IfxGtm_PinMap.h:473
IfxGtm_TIM1_6_TIN74_P15_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN
IfxGtm_TIM1_6_TIN74_P15_3_IN.
Definition: IfxGtm_PinMap.h:503
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_TIM0_2_TIN20_P00_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN
IfxGtm_TIM0_2_TIN20_P00_11_IN.
Definition: IfxGtm_PinMap.h:374
IfxGtm_TIM0_5_TIN23_P33_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN
IfxGtm_TIM0_5_TIN23_P33_1_IN.
Definition: IfxGtm_PinMap.h:404
IfxGtm_TIM0_1_TIN31_P33_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN
IfxGtm_TIM0_1_TIN31_P33_9_IN.
Definition: IfxGtm_PinMap.h:366
IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT
IfxGtm_TOM1_0_TOUT87_P14_7_OUT.
Definition: IfxGtm_PinMap.h:682
IfxGtm_TIM2_4_TIN61_P20_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN
IfxGtm_TIM2_4_TIN61_P20_3_IN.
Definition: IfxGtm_PinMap.h:540
IfxGtm_TIM1_2_TIN12_P00_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN
IfxGtm_TIM1_2_TIN12_P00_3_IN.
Definition: IfxGtm_PinMap.h:450
IfxGtm_ChXSel_a
Definition: IfxGtm_PinMap.h:44
IfxGtm_Atom_ToutMap::toutSel
IfxGtm_ToutSel toutSel
TOUTSEL register control code.
Definition: IfxGtm_PinMap.h:89
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT
IfxGtm_ATOM0_0_TOUT9_P00_0_OUT.
Definition: IfxGtm_PinMap.h:130
IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT
IfxGtm_TOM1_6_TOUT106_P10_4_OUT.
Definition: IfxGtm_PinMap.h:759
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT
IfxGtm_ATOM0_3_TOUT60_P20_1_OUT.
Definition: IfxGtm_PinMap.h:154
IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT
IfxGtm_TOM0_6_TOUT92_P13_1_OUT.
Definition: IfxGtm_PinMap.h:653
IfxGtm_TIM1_4_TIN4_P02_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN
IfxGtm_TIM1_4_TIN4_P02_4_IN.
Definition: IfxGtm_PinMap.h:477
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:192
IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT
IfxGtm_TOM0_2_TOUT28_P33_6_OUT.
Definition: IfxGtm_PinMap.h:620
IfxGtm_ToutSel_c
Definition: IfxGtm_PinMap.h:70
IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT
IfxGtm_TOM1_5_TOUT40_P32_4_OUT.
Definition: IfxGtm_PinMap.h:751
IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT
IfxGtm_TOM0_3_TOUT80_P14_0_OUT.
Definition: IfxGtm_PinMap.h:632
IfxGtm_TIM1_2_TIN28_P33_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN
IfxGtm_TIM1_2_TIN28_P33_6_IN.
Definition: IfxGtm_PinMap.h:452
IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT
IfxGtm_TOM0_3_TOUT38_P32_2_OUT.
Definition: IfxGtm_PinMap.h:629
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT
IfxGtm_ATOM0_0_TOUT109_P10_7_OUT.
Definition: IfxGtm_PinMap.h:125
IfxGtm_TIM1_7_TIN17_P00_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN
IfxGtm_TIM1_7_TIN17_P00_8_IN.
Definition: IfxGtm_PinMap.h:507
IfxGtm_TIM0_6_TIN42_P23_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN
IfxGtm_TIM0_6_TIN42_P23_1_IN.
Definition: IfxGtm_PinMap.h:412
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT
IfxGtm_ATOM3_5_TOUT52_P21_1_OUT.
Definition: IfxGtm_PinMap.h:334
IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT
IfxGtm_TOM1_0_TOUT53_P21_2_OUT.
Definition: IfxGtm_PinMap.h:677
IfxGtm_ChXSel_f
Definition: IfxGtm_PinMap.h:50
IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT
IfxGtm_TOM0_14_TOUT66_P20_10_OUT.
Definition: IfxGtm_PinMap.h:601
IfxGtm_Atom_ToutMap::atom
IfxGtm_Atom atom
ATOM unit index.
Definition: IfxGtm_PinMap.h:87
IfxGtm_TIM1_0_TIN109_P10_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN
IfxGtm_TIM1_0_TIN109_P10_7_IN.
Definition: IfxGtm_PinMap.h:425
IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT
IfxGtm_TOM0_2_TOUT55_P21_4_OUT.
Definition: IfxGtm_PinMap.h:622
IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT
IfxGtm_TOM1_4_TOUT90_P14_10_OUT.
Definition: IfxGtm_PinMap.h:747
IfxGtm_TIM2_3_TIN60_P20_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN
IfxGtm_TIM2_3_TIN60_P20_1_IN.
Definition: IfxGtm_PinMap.h:534
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT
IfxGtm_ATOM3_2_TOUT44_P23_3_OUT.
Definition: IfxGtm_PinMap.h:316
IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT
IfxGtm_TOM0_11_TOUT71_P15_0_OUT.
Definition: IfxGtm_PinMap.h:583
IfxGtm_TIM1_0_TIN26_P33_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN
IfxGtm_TIM1_0_TIN26_P33_4_IN.
Definition: IfxGtm_PinMap.h:427
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT
IfxGtm_ATOM3_3_TOUT29_P33_7_OUT.
Definition: IfxGtm_PinMap.h:322
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT
IfxGtm_ATOM2_0_TOUT18_P00_9_OUT.
Definition: IfxGtm_PinMap.h:252
IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT
IfxGtm_TOM0_9_TOUT47_P22_0_OUT.
Definition: IfxGtm_PinMap.h:670
IfxGtm_TIM1_6_TIN66_P20_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN
IfxGtm_TIM1_6_TIN66_P20_10_IN.
Definition: IfxGtm_PinMap.h:501
IfxGtm_TIM1_6_TIN59_P20_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN
IfxGtm_TIM1_6_TIN59_P20_0_IN.
Definition: IfxGtm_PinMap.h:500
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxGtm_TIM0_0_TIN109_P10_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN
IfxGtm_TIM0_0_TIN109_P10_7_IN.
Definition: IfxGtm_PinMap.h:348
IfxGtm_TIM0_5_TIN40_P32_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN
IfxGtm_TIM0_5_TIN40_P32_4_IN.
Definition: IfxGtm_PinMap.h:405
IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT
IfxGtm_TOM1_3_TOUT21_P00_12_OUT.
Definition: IfxGtm_PinMap.h:730
IfxGtm_TIM1_5_TIN99_P11_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN
IfxGtm_TIM1_5_TIN99_P11_10_IN.
Definition: IfxGtm_PinMap.h:493
IfxGtm_TIM0_2_TIN79_P15_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN
IfxGtm_TIM0_2_TIN79_P15_8_IN.
Definition: IfxGtm_PinMap.h:381
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT
IfxGtm_ATOM0_4_TOUT4_P02_4_OUT.
Definition: IfxGtm_PinMap.h:159
IfxGtm_Atom_ToutMapP
IfxGtm_Atom_ToutMap * IfxGtm_Atom_ToutMapP
Pointer to IfxGtm_Atom_ToutMap.
Definition: IfxGtm_PinMap.h:96
IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT
IfxGtm_TOM0_7_TOUT84_P14_4_OUT.
Definition: IfxGtm_PinMap.h:657
IfxGtm_TIM0_6_TIN83_P14_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN
IfxGtm_TIM0_6_TIN83_P14_3_IN.
Definition: IfxGtm_PinMap.h:416
IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT
IfxGtm_TOM0_8_TOUT0_P02_0_OUT.
Definition: IfxGtm_PinMap.h:659
IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT
IfxGtm_TOM0_3_TOUT29_P33_7_OUT.
Definition: IfxGtm_PinMap.h:628
IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT
IfxGtm_TOM1_7_TOUT45_P23_4_OUT.
Definition: IfxGtm_PinMap.h:771
IfxGtm_TIM1_1_TIN78_P15_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN
IfxGtm_TIM1_1_TIN78_P15_7_IN.
Definition: IfxGtm_PinMap.h:445
IfxGtm_TIM0_1_TIN54_P21_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN
IfxGtm_TIM0_1_TIN54_P21_3_IN.
Definition: IfxGtm_PinMap.h:369
IfxGtm_TIM2_5_TIN73_P15_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN
IfxGtm_TIM2_5_TIN73_P15_2_IN.
Definition: IfxGtm_PinMap.h:547
IfxGtm_TIM0_3_TIN49_P22_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN
IfxGtm_TIM0_3_TIN49_P22_2_IN.
Definition: IfxGtm_PinMap.h:388
IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT
IfxGtm_TOM0_15_TOUT7_P02_7_OUT.
Definition: IfxGtm_PinMap.h:609
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT
IfxGtm_ATOM0_3_TOUT56_P21_5_OUT.
Definition: IfxGtm_PinMap.h:153
IfxGtm_TIM0_2_TIN55_P21_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN
IfxGtm_TIM0_2_TIN55_P21_4_IN.
Definition: IfxGtm_PinMap.h:380
IfxGtm_TIM2_6_TIN66_P20_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN
IfxGtm_TIM2_6_TIN66_P20_10_IN.
Definition: IfxGtm_PinMap.h:553
IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT
IfxGtm_TOM0_4_TOUT22_P33_0_OUT.
Definition: IfxGtm_PinMap.h:635
IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT
IfxGtm_TOM1_11_TOUT60_P20_1_OUT.
Definition: IfxGtm_PinMap.h:693
IfxGtm_TIM1_7_TIN25_P33_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN
IfxGtm_TIM1_7_TIN25_P33_3_IN.
Definition: IfxGtm_PinMap.h:508
IfxGtm_ChXSel_h
Definition: IfxGtm_PinMap.h:52
IfxGtm_TIM2_5_TIN52_P21_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN
IfxGtm_TIM2_5_TIN52_P21_1_IN.
Definition: IfxGtm_PinMap.h:545
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT
IfxGtm_ATOM0_5_TOUT15_P00_6_OUT.
Definition: IfxGtm_PinMap.h:165
IfxGtm_ChXSel
IfxGtm_ChXSel
CHxSEL register control code.
Definition: IfxGtm_PinMap.h:42
IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT
IfxGtm_TOM1_10_TOUT107_P10_5_OUT.
Definition: IfxGtm_PinMap.h:687
IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT
IfxGtm_TOM0_4_TOUT57_P21_6_OUT.
Definition: IfxGtm_PinMap.h:638
IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT
IfxGtm_TOM1_1_TOUT31_P33_9_OUT.
Definition: IfxGtm_PinMap.h:712
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT
IfxGtm_ATOM3_1_TOUT27_P33_5_OUT.
Definition: IfxGtm_PinMap.h:307
IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT
IfxGtm_TOM1_13_TOUT110_P10_8_OUT.
Definition: IfxGtm_PinMap.h:699
IfxGtm_TIM0_3_TIN29_P33_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN
IfxGtm_TIM0_3_TIN29_P33_7_IN.
Definition: IfxGtm_PinMap.h:385
IfxGtm_TIM1_1_TIN1_P02_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN
IfxGtm_TIM1_1_TIN1_P02_1_IN.
Definition: IfxGtm_PinMap.h:439
IfxGtm_ToutSel_e
Definition: IfxGtm_PinMap.h:72
IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT
IfxGtm_TOM0_8_TOUT48_P22_1_OUT.
Definition: IfxGtm_PinMap.h:660
IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT
IfxGtm_TOM0_0_TOUT77_P15_6_OUT.
Definition: IfxGtm_PinMap.h:568
IfxGtm_TIM1_7_TIN67_P20_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN
IfxGtm_TIM1_7_TIN67_P20_11_IN.
Definition: IfxGtm_PinMap.h:512
IfxGtm_TIM1_4_TIN39_P32_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN
IfxGtm_TIM1_4_TIN39_P32_3_IN.
Definition: IfxGtm_PinMap.h:476
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT
IfxGtm_ATOM0_6_TOUT16_P00_7_OUT.
Definition: IfxGtm_PinMap.h:172
IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT
IfxGtm_TOM0_14_TOUT100_P11_11_OUT.
Definition: IfxGtm_PinMap.h:598
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT
IfxGtm_ATOM1_5_TOUT65_P20_9_OUT.
Definition: IfxGtm_PinMap.h:236
IfxGtm_TIM2_7_TIN75_P15_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN
IfxGtm_TIM2_7_TIN75_P15_4_IN.
Definition: IfxGtm_PinMap.h:560
IfxGtm_TIM0_4_TIN102_P10_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN
IfxGtm_TIM0_4_TIN102_P10_0_IN.
Definition: IfxGtm_PinMap.h:393
IfxGtm_TIM0_0_TIN0_P02_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN
IfxGtm_TIM0_0_TIN0_P02_0_IN.
Definition: IfxGtm_PinMap.h:347
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT
IfxGtm_ATOM0_0_TOUT48_P22_1_OUT.
Definition: IfxGtm_PinMap.h:126
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT
IfxGtm_ATOM1_1_TOUT10_P00_1_OUT.
Definition: IfxGtm_PinMap.h:193
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:78
IfxGtm_TIM0_3_TIN3_P02_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN
IfxGtm_TIM0_3_TIN3_P02_3_IN.
Definition: IfxGtm_PinMap.h:387
IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT
IfxGtm_TOM1_1_TOUT11_P00_2_OUT.
Definition: IfxGtm_PinMap.h:709
IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT
IfxGtm_TOM0_3_TOUT60_P20_1_OUT.
Definition: IfxGtm_PinMap.h:631
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT
IfxGtm_ATOM2_3_TOUT89_P14_9_OUT.
Definition: IfxGtm_PinMap.h:271
IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT
IfxGtm_TOM1_2_TOUT28_P33_6_OUT.
Definition: IfxGtm_PinMap.h:721
IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT
IfxGtm_TOM1_3_TOUT71_P15_0_OUT.
Definition: IfxGtm_PinMap.h:735
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT
IfxGtm_ATOM0_6_TOUT59_P20_0_OUT.
Definition: IfxGtm_PinMap.h:175
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT
IfxGtm_ATOM0_7_TOUT25_P33_3_OUT.
Definition: IfxGtm_PinMap.h:178
IfxGtm_TIM1_6_TIN43_P23_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN
IfxGtm_TIM1_6_TIN43_P23_2_IN.
Definition: IfxGtm_PinMap.h:499
IfxGtm_TIM2_2_TIN96_P11_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN
IfxGtm_TIM2_2_TIN96_P11_3_IN.
Definition: IfxGtm_PinMap.h:532
IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT
IfxGtm_TOM0_13_TOUT15_P00_6_OUT.
Definition: IfxGtm_PinMap.h:592
IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT
IfxGtm_TOM1_1_TOUT78_P15_7_OUT.
Definition: IfxGtm_PinMap.h:716
IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT
IfxGtm_TOM0_1_TOUT31_P33_9_OUT.
Definition: IfxGtm_PinMap.h:613
IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT
IfxGtm_TOM1_1_TOUT19_P00_10_OUT.
Definition: IfxGtm_PinMap.h:710
IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT
IfxGtm_TOM1_13_TOUT35_P33_13_OUT.
Definition: IfxGtm_PinMap.h:700
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IfxGtm_TIM2_1_TIN10_P00_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN
IfxGtm_TIM2_1_TIN10_P00_1_IN.
Definition: IfxGtm_PinMap.h:523
IfxGtm_ChXSel_o
Definition: IfxGtm_PinMap.h:61
IfxGtm_TIM0_7_TIN44_P23_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN
IfxGtm_TIM0_7_TIN44_P23_3_IN.
Definition: IfxGtm_PinMap.h:418
IfxGtm_TIM1_2_TIN79_P15_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN
IfxGtm_TIM1_2_TIN79_P15_8_IN.
Definition: IfxGtm_PinMap.h:458
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT
IfxGtm_ATOM1_6_TOUT6_P02_6_OUT.
Definition: IfxGtm_PinMap.h:244
IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT
IfxGtm_TOM1_4_TOUT22_P33_0_OUT.
Definition: IfxGtm_PinMap.h:740
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT
IfxGtm_ATOM3_4_TOUT22_P33_0_OUT.
Definition: IfxGtm_PinMap.h:326
IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT
IfxGtm_TOM0_4_TOUT81_P14_1_OUT.
Definition: IfxGtm_PinMap.h:640
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT
IfxGtm_ATOM2_6_TOUT74_P15_3_OUT.
Definition: IfxGtm_PinMap.h:290
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT
IfxGtm_ATOM1_4_TOUT50_P22_3_OUT.
Definition: IfxGtm_PinMap.h:225
IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT
IfxGtm_TOM0_4_TOUT30_P33_8_OUT.
Definition: IfxGtm_PinMap.h:636
IfxGtm_TIM1_4_TIN72_P15_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN
IfxGtm_TIM1_4_TIN72_P15_1_IN.
Definition: IfxGtm_PinMap.h:480
IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT
IfxGtm_TOM1_6_TOUT43_P23_2_OUT.
Definition: IfxGtm_PinMap.h:762
IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT
IfxGtm_TOM0_10_TOUT2_P02_2_OUT.
Definition: IfxGtm_PinMap.h:572
IfxGtm_ChXSel_e
Definition: IfxGtm_PinMap.h:49
IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT
IfxGtm_TOM0_3_TOUT56_P21_5_OUT.
Definition: IfxGtm_PinMap.h:630
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT
IfxGtm_ATOM2_3_TOUT21_P00_12_OUT.
Definition: IfxGtm_PinMap.h:268
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT
IfxGtm_ATOM2_6_TOUT66_P20_10_OUT.
Definition: IfxGtm_PinMap.h:289
IfxGtm_TIM0_2_TIN104_P10_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN
IfxGtm_TIM0_2_TIN104_P10_2_IN.
Definition: IfxGtm_PinMap.h:372
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT
IfxGtm_ATOM0_4_TOUT14_P00_5_OUT.
Definition: IfxGtm_PinMap.h:157
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT
IfxGtm_ATOM0_3_TOUT3_P02_3_OUT.
Definition: IfxGtm_PinMap.h:151
IfxGtm_TIM2_6_TIN100_P11_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN
IfxGtm_TIM2_6_TIN100_P11_11_IN.
Definition: IfxGtm_PinMap.h:550
IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT
IfxGtm_TOM1_1_TOUT54_P21_3_OUT.
Definition: IfxGtm_PinMap.h:714
IfxGtm_TIM0_6_TIN24_P33_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN
IfxGtm_TIM0_6_TIN24_P33_2_IN.
Definition: IfxGtm_PinMap.h:411
IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT
IfxGtm_TOM1_6_TOUT16_P00_7_OUT.
Definition: IfxGtm_PinMap.h:760
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT
IfxGtm_ATOM1_1_TOUT103_P10_1_OUT.
Definition: IfxGtm_PinMap.h:192
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT
IfxGtm_ATOM1_7_TOUT45_P23_4_OUT.
Definition: IfxGtm_PinMap.h:248
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT
IfxGtm_ATOM1_0_TOUT77_P15_6_OUT.
Definition: IfxGtm_PinMap.h:188
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT
IfxGtm_ATOM3_7_TOUT93_P13_2_OUT.
Definition: IfxGtm_PinMap.h:343
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT
IfxGtm_ATOM2_3_TOUT97_P11_6_OUT.
Definition: IfxGtm_PinMap.h:272
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT
IfxGtm_ATOM1_2_TOUT107_P10_5_OUT.
Definition: IfxGtm_PinMap.h:204
IfxGtm_TIM1_4_TIN81_P14_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN
IfxGtm_TIM1_4_TIN81_P14_1_IN.
Definition: IfxGtm_PinMap.h:481
IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT
IfxGtm_TOM1_10_TOUT2_P02_2_OUT.
Definition: IfxGtm_PinMap.h:688
IfxGtm_Atom_ToutMap::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxGtm_PinMap.h:92
IfxGtm_TIM0_1_TIN27_P33_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN
IfxGtm_TIM0_1_TIN27_P33_5_IN.
Definition: IfxGtm_PinMap.h:365
IfxGtm_TIM0_3_TIN80_P14_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN
IfxGtm_TIM0_3_TIN80_P14_0_IN.
Definition: IfxGtm_PinMap.h:392
IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT
IfxGtm_TOM0_14_TOUT36_P32_0_OUT.
Definition: IfxGtm_PinMap.h:600
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT
IfxGtm_ATOM1_1_TOUT79_P15_8_OUT.
Definition: IfxGtm_PinMap.h:201
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_TIM0_0_TIN32_P33_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN
IfxGtm_TIM0_0_TIN32_P33_10_IN.
Definition: IfxGtm_PinMap.h:351
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT
IfxGtm_ATOM0_1_TOUT10_P00_1_OUT.
Definition: IfxGtm_PinMap.h:132
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT
IfxGtm_ATOM3_6_TOUT92_P13_1_OUT.
Definition: IfxGtm_PinMap.h:340
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT
IfxGtm_ATOM2_7_TOUT75_P15_4_OUT.
Definition: IfxGtm_PinMap.h:296
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT
IfxGtm_ATOM1_5_TOUT110_P10_8_OUT.
Definition: IfxGtm_PinMap.h:229
IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT
IfxGtm_TOM0_10_TOUT41_P23_0_OUT.
Definition: IfxGtm_PinMap.h:573
IfxGtm_ChXSel_m
Definition: IfxGtm_PinMap.h:59
IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT
IfxGtm_TOM0_4_TOUT61_P20_3_OUT.
Definition: IfxGtm_PinMap.h:639
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_CLK0_P23_1_OUT
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT
GTM_CLK0: GTM output.
Definition: IfxGtm_PinMap.h:344
IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT
IfxGtm_TOM1_2_TOUT33_P33_11_OUT.
Definition: IfxGtm_PinMap.h:722
IfxGtm_TIM2_2_TIN36_P32_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN
IfxGtm_TIM2_2_TIN36_P32_0_IN.
Definition: IfxGtm_PinMap.h:529
IfxGtm_TIM1_1_TIN86_P14_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN
IfxGtm_TIM1_1_TIN86_P14_6_IN.
Definition: IfxGtm_PinMap.h:446
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT
IfxGtm_ATOM1_2_TOUT70_P20_14_OUT.
Definition: IfxGtm_PinMap.h:210
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT
IfxGtm_ATOM0_1_TOUT103_P10_1_OUT.
Definition: IfxGtm_PinMap.h:131
IfxGtm_TIM2_5_TIN99_P11_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN
IfxGtm_TIM2_5_TIN99_P11_10_IN.
Definition: IfxGtm_PinMap.h:549
IfxGtm_ChXSel_p
Definition: IfxGtm_PinMap.h:62
IfxGtm_TIM2_5_TIN65_P20_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN
IfxGtm_TIM2_5_TIN65_P20_9_IN.
Definition: IfxGtm_PinMap.h:546
IfxGtm_Tim_TinMap::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGtm_PinMap.h:80
IfxGtm_TIM2_6_TIN16_P00_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN
IfxGtm_TIM2_6_TIN16_P00_7_IN.
Definition: IfxGtm_PinMap.h:551
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT
IfxGtm_ATOM3_4_TOUT51_P21_0_OUT.
Definition: IfxGtm_PinMap.h:329
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT
IfxGtm_ATOM0_5_TOUT5_P02_5_OUT.
Definition: IfxGtm_PinMap.h:170
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:76
IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT
IfxGtm_TOM1_4_TOUT81_P14_1_OUT.
Definition: IfxGtm_PinMap.h:746
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT
IfxGtm_ATOM1_3_TOUT3_P02_3_OUT.
Definition: IfxGtm_PinMap.h:216
IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT
IfxGtm_TOM1_13_TOUT5_P02_5_OUT.
Definition: IfxGtm_PinMap.h:701
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT
IfxGtm_ATOM2_2_TOUT70_P20_14_OUT.
Definition: IfxGtm_PinMap.h:265
IfxGtm_TIM2_4_TIN98_P11_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN
IfxGtm_TIM2_4_TIN98_P11_9_IN.
Definition: IfxGtm_PinMap.h:543
IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT
IfxGtm_TOM1_7_TOUT75_P15_4_OUT.
Definition: IfxGtm_PinMap.h:773
IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT
IfxGtm_TOM0_12_TOUT44_P23_3_OUT.
Definition: IfxGtm_PinMap.h:587
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT
IfxGtm_ATOM0_2_TOUT55_P21_4_OUT.
Definition: IfxGtm_PinMap.h:145
IfxGtm_TIM0_4_TIN22_P33_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN
IfxGtm_TIM0_4_TIN22_P33_0_IN.
Definition: IfxGtm_PinMap.h:394
IfxGtm_TIM2_1_TIN95_P11_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN
IfxGtm_TIM2_1_TIN95_P11_2_IN.
Definition: IfxGtm_PinMap.h:527
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT
IfxGtm_ATOM3_7_TOUT63_P20_7_OUT.
Definition: IfxGtm_PinMap.h:342
IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT
IfxGtm_TOM0_7_TOUT93_P13_2_OUT.
Definition: IfxGtm_PinMap.h:658
IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT
IfxGtm_TOM0_13_TOUT35_P33_13_OUT.
Definition: IfxGtm_PinMap.h:593
IfxGtm_TIM1_6_TIN100_P11_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN
IfxGtm_TIM1_6_TIN100_P11_11_IN.
Definition: IfxGtm_PinMap.h:494
IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT
IfxGtm_TOM0_4_TOUT39_P32_3_OUT.
Definition: IfxGtm_PinMap.h:637
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT
IfxGtm_ATOM0_4_TOUT39_P32_3_OUT.
Definition: IfxGtm_PinMap.h:158
IfxGtm_TIM1_1_TIN54_P21_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN
IfxGtm_TIM1_1_TIN54_P21_3_IN.
Definition: IfxGtm_PinMap.h:443
IfxGtm_Atom_ToutMap
ATOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:85
IfxGtm_TIM1_2_TIN107_P10_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN
IfxGtm_TIM1_2_TIN107_P10_5_IN.
Definition: IfxGtm_PinMap.h:449
IfxGtm_TIM2_0_TIN34_P33_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN
IfxGtm_TIM2_0_TIN34_P33_12_IN.
Definition: IfxGtm_PinMap.h:517
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT
IfxGtm_ATOM1_0_TOUT68_P20_12_OUT.
Definition: IfxGtm_PinMap.h:186
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT
IfxGtm_ATOM3_2_TOUT83_P14_3_OUT.
Definition: IfxGtm_PinMap.h:318
IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT
IfxGtm_TOM0_12_TOUT98_P11_9_OUT.
Definition: IfxGtm_PinMap.h:591
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT
IfxGtm_ATOM3_0_TOUT26_P33_4_OUT.
Definition: IfxGtm_PinMap.h:299
IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT
IfxGtm_TOM1_7_TOUT101_P11_12_OUT.
Definition: IfxGtm_PinMap.h:767
IfxGtm_ChXSel_b
Definition: IfxGtm_PinMap.h:45
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT
IfxGtm_ATOM1_0_TOUT87_P14_7_OUT.
Definition: IfxGtm_PinMap.h:189
IfxGtm_TIM1_2_TIN20_P00_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN
IfxGtm_TIM1_2_TIN20_P00_11_IN.
Definition: IfxGtm_PinMap.h:451
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT
IfxGtm_ATOM0_1_TOUT1_P02_1_OUT.
Definition: IfxGtm_PinMap.h:134
IfxGtm_TIM1_0_TIN77_P15_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN
IfxGtm_TIM1_0_TIN77_P15_6_IN.
Definition: IfxGtm_PinMap.h:433
IfxGtm_TIM1_5_TIN65_P20_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN
IfxGtm_TIM1_5_TIN65_P20_9_IN.
Definition: IfxGtm_PinMap.h:489
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT
IfxGtm_ATOM2_0_TOUT32_P33_10_OUT.
Definition: IfxGtm_PinMap.h:254
IfxGtm_TIM1_5_TIN58_P21_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN
IfxGtm_TIM1_5_TIN58_P21_7_IN.
Definition: IfxGtm_PinMap.h:487
IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT
IfxGtm_TOM0_12_TOUT72_P15_1_OUT.
Definition: IfxGtm_PinMap.h:590
IfxGtm_Tom_ToutMap::tom
IfxGtm_Tom tom
TOM unit index.
Definition: IfxGtm_PinMap.h:101
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT
IfxGtm_ATOM0_4_TOUT61_P20_3_OUT.
Definition: IfxGtm_PinMap.h:162
IfxGtm_TIM2_6_TIN74_P15_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN
IfxGtm_TIM2_6_TIN74_P15_3_IN.
Definition: IfxGtm_PinMap.h:554
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT
IfxGtm_ATOM2_7_TOUT63_P20_7_OUT.
Definition: IfxGtm_PinMap.h:293
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT
IfxGtm_ATOM2_7_TOUT93_P13_2_OUT.
Definition: IfxGtm_PinMap.h:297
IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT
IfxGtm_TOM1_1_TOUT10_P00_1_OUT.
Definition: IfxGtm_PinMap.h:708
IfxGtm_TIM1_7_TIN7_P02_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN
IfxGtm_TIM1_7_TIN7_P02_7_IN.
Definition: IfxGtm_PinMap.h:514
IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT
IfxGtm_TOM1_0_TOUT76_P15_5_OUT.
Definition: IfxGtm_PinMap.h:679
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT
IfxGtm_ATOM1_6_TOUT16_P00_7_OUT.
Definition: IfxGtm_PinMap.h:239
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT
IfxGtm_ATOM3_0_TOUT77_P15_6_OUT.
Definition: IfxGtm_PinMap.h:302
IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT
IfxGtm_TOM0_7_TOUT25_P33_3_OUT.
Definition: IfxGtm_PinMap.h:654
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT
IfxGtm_ATOM3_1_TOUT84_P14_4_OUT.
Definition: IfxGtm_PinMap.h:311
IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT
IfxGtm_TOM0_15_TOUT42_P23_1_OUT.
Definition: IfxGtm_PinMap.h:606
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT
IfxGtm_ATOM3_3_TOUT21_P00_12_OUT.
Definition: IfxGtm_PinMap.h:321
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT
IfxGtm_ATOM0_6_TOUT24_P33_2_OUT.
Definition: IfxGtm_PinMap.h:173
IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT
IfxGtm_TOM1_5_TOUT58_P21_7_OUT.
Definition: IfxGtm_PinMap.h:753
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT
IfxGtm_ATOM3_1_TOUT95_P11_2_OUT.
Definition: IfxGtm_PinMap.h:313
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT
IfxGtm_ATOM2_4_TOUT30_P33_8_OUT.
Definition: IfxGtm_PinMap.h:274
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT
IfxGtm_ATOM3_3_TOUT97_P11_6_OUT.
Definition: IfxGtm_PinMap.h:325
IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT
IfxGtm_TOM1_4_TOUT30_P33_8_OUT.
Definition: IfxGtm_PinMap.h:741
IfxGtm_TIM1_0_TIN85_P14_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN
IfxGtm_TIM1_0_TIN85_P14_5_IN.
Definition: IfxGtm_PinMap.h:434
IfxGtm_TIM2_4_TIN51_P21_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN
IfxGtm_TIM2_4_TIN51_P21_0_IN.
Definition: IfxGtm_PinMap.h:539
IfxGtm_TIM0_0_TIN9_P00_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN
IfxGtm_TIM0_0_TIN9_P00_0_IN.
Definition: IfxGtm_PinMap.h:359
IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT
IfxGtm_TOM0_2_TOUT104_P10_2_OUT.
Definition: IfxGtm_PinMap.h:617
IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT
IfxGtm_TOM0_2_TOUT88_P14_8_OUT.
Definition: IfxGtm_PinMap.h:624
IfxGtm_TIM1_2_TIN104_P10_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN
IfxGtm_TIM1_2_TIN104_P10_2_IN.
Definition: IfxGtm_PinMap.h:448
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT
IfxGtm_ATOM0_2_TOUT12_P00_3_OUT.
Definition: IfxGtm_PinMap.h:141
IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT
IfxGtm_TOM1_11_TOUT108_P10_6_OUT.
Definition: IfxGtm_PinMap.h:691
IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT
IfxGtm_TOM1_0_TOUT32_P33_10_OUT.
Definition: IfxGtm_PinMap.h:675
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT
IfxGtm_ATOM0_3_TOUT49_P22_2_OUT.
Definition: IfxGtm_PinMap.h:152
IfxGtm_TIM2_7_TIN101_P11_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN
IfxGtm_TIM2_7_TIN101_P11_12_IN.
Definition: IfxGtm_PinMap.h:556
IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT
IfxGtm_TOM0_5_TOUT91_P13_0_OUT.
Definition: IfxGtm_PinMap.h:647
IfxGtm_TIM1_5_TIN15_P00_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN
IfxGtm_TIM1_5_TIN15_P00_6_IN.
Definition: IfxGtm_PinMap.h:484
IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT
IfxGtm_TOM0_3_TOUT108_P10_6_OUT.
Definition: IfxGtm_PinMap.h:626
IfxGtm_TIM1_1_TIN27_P33_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN
IfxGtm_TIM1_1_TIN27_P33_5_IN.
Definition: IfxGtm_PinMap.h:440
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT
IfxGtm_ATOM3_4_TOUT34_P33_12_OUT.
Definition: IfxGtm_PinMap.h:328
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT
IfxGtm_ATOM1_7_TOUT75_P15_4_OUT.
Definition: IfxGtm_PinMap.h:250
IfxGtm_TIM0_0_TIN8_P02_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN
IfxGtm_TIM0_0_TIN8_P02_8_IN.
Definition: IfxGtm_PinMap.h:358
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT
IfxGtm_ATOM3_5_TOUT91_P13_0_OUT.
Definition: IfxGtm_PinMap.h:335
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT
IfxGtm_ATOM1_5_TOUT73_P15_2_OUT.
Definition: IfxGtm_PinMap.h:237
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT
IfxGtm_ATOM1_1_TOUT54_P21_3_OUT.
Definition: IfxGtm_PinMap.h:198
IfxGtm_TIM0_7_TIN63_P20_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN
IfxGtm_TIM0_7_TIN63_P20_7_IN.
Definition: IfxGtm_PinMap.h:420
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT
IfxGtm_ATOM1_5_TOUT5_P02_5_OUT.
Definition: IfxGtm_PinMap.h:235
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT
IfxGtm_ATOM1_5_TOUT23_P33_1_OUT.
Definition: IfxGtm_PinMap.h:231
IfxGtm_TIM2_2_TIN12_P00_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN
IfxGtm_TIM2_2_TIN12_P00_3_IN.
Definition: IfxGtm_PinMap.h:528
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT
IfxGtm_ATOM3_3_TOUT82_P14_2_OUT.
Definition: IfxGtm_PinMap.h:323
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT
IfxGtm_ATOM1_7_TOUT17_P00_8_OUT.
Definition: IfxGtm_PinMap.h:246
IfxGtm_TIM0_0_TIN53_P21_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN
IfxGtm_TIM0_0_TIN53_P21_2_IN.
Definition: IfxGtm_PinMap.h:354
IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT
IfxGtm_TOM0_6_TOUT24_P33_2_OUT.
Definition: IfxGtm_PinMap.h:649
IfxGtm_TIM1_4_TIN30_P33_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN
IfxGtm_TIM1_4_TIN30_P33_8_IN.
Definition: IfxGtm_PinMap.h:475
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT
IfxGtm_ATOM2_4_TOUT51_P21_0_OUT.
Definition: IfxGtm_PinMap.h:276
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:99
IfxGtm_TIM1_4_TIN98_P11_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN
IfxGtm_TIM1_4_TIN98_P11_9_IN.
Definition: IfxGtm_PinMap.h:482
IfxGtm_TIM1_6_TIN42_P23_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN
IfxGtm_TIM1_6_TIN42_P23_1_IN.
Definition: IfxGtm_PinMap.h:498
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT
IfxGtm_ATOM3_2_TOUT88_P14_8_OUT.
Definition: IfxGtm_PinMap.h:319
IfxGtm_TIM0_4_TIN52_P21_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN
IfxGtm_TIM0_4_TIN52_P21_1_IN.
Definition: IfxGtm_PinMap.h:399
IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT
IfxGtm_TOM0_15_TOUT75_P15_4_OUT.
Definition: IfxGtm_PinMap.h:608
IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT
IfxGtm_TOM1_7_TOUT84_P14_4_OUT.
Definition: IfxGtm_PinMap.h:774
IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT
IfxGtm_TOM0_0_TOUT85_P14_5_OUT.
Definition: IfxGtm_PinMap.h:569
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT
IfxGtm_ATOM0_1_TOUT31_P33_9_OUT.
Definition: IfxGtm_PinMap.h:135
IfxGtm_TIM1_7_TIN84_P14_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN
IfxGtm_TIM1_7_TIN84_P14_4_IN.
Definition: IfxGtm_PinMap.h:515
IfxGtm_TIM0_3_TIN105_P10_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN
IfxGtm_TIM0_3_TIN105_P10_3_IN.
Definition: IfxGtm_PinMap.h:382
IfxGtm_TIM1_6_TIN6_P02_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN
IfxGtm_TIM1_6_TIN6_P02_6_IN.
Definition: IfxGtm_PinMap.h:502
IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT
IfxGtm_TOM1_1_TOUT27_P33_5_OUT.
Definition: IfxGtm_PinMap.h:711
IfxGtm_TIM1_2_TIN70_P20_14_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN
IfxGtm_TIM1_2_TIN70_P20_14_IN.
Definition: IfxGtm_PinMap.h:457
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT
IfxGtm_ATOM1_4_TOUT4_P02_4_OUT.
Definition: IfxGtm_PinMap.h:224
IfxGtm_TIM1_3_TIN97_P11_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN
IfxGtm_TIM1_3_TIN97_P11_6_IN.
Definition: IfxGtm_PinMap.h:471
IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT
IfxGtm_TOM1_13_TOUT65_P20_9_OUT.
Definition: IfxGtm_PinMap.h:702
IfxGtm_TIM1_1_TIN31_P33_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN
IfxGtm_TIM1_1_TIN31_P33_9_IN.
Definition: IfxGtm_PinMap.h:441
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT
IfxGtm_ATOM3_4_TOUT98_P11_9_OUT.
Definition: IfxGtm_PinMap.h:332
IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT
IfxGtm_TOM1_15_TOUT67_P20_11_OUT.
Definition: IfxGtm_PinMap.h:706
IfxGtm_ChXSel_d
Definition: IfxGtm_PinMap.h:47
IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT
IfxGtm_TOM0_3_TOUT89_P14_9_OUT.
Definition: IfxGtm_PinMap.h:633
IfxGtm_ChXSel_i
Definition: IfxGtm_PinMap.h:54
IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT
IfxGtm_TOM1_6_TOUT59_P20_0_OUT.
Definition: IfxGtm_PinMap.h:763
IfxGtm_ChXSel_c
Definition: IfxGtm_PinMap.h:46
IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT
IfxGtm_TOM0_6_TOUT106_P10_4_OUT.
Definition: IfxGtm_PinMap.h:648
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT
IfxGtm_ATOM1_7_TOUT25_P33_3_OUT.
Definition: IfxGtm_PinMap.h:247
IfxGtm_TIM1_0_TIN76_P15_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN
IfxGtm_TIM1_0_TIN76_P15_5_IN.
Definition: IfxGtm_PinMap.h:432
IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT
IfxGtm_TOM0_10_TOUT46_P23_5_OUT.
Definition: IfxGtm_PinMap.h:574
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:102
IfxGtm_ToutSel_d
Definition: IfxGtm_PinMap.h:71
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT
IfxGtm_ATOM2_7_TOUT64_P20_8_OUT.
Definition: IfxGtm_PinMap.h:294
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT
IfxGtm_ATOM3_1_TOUT86_P14_6_OUT.
Definition: IfxGtm_PinMap.h:312
IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT
IfxGtm_TOM1_2_TOUT12_P00_3_OUT.
Definition: IfxGtm_PinMap.h:719
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT
IfxGtm_ATOM2_5_TOUT91_P13_0_OUT.
Definition: IfxGtm_PinMap.h:284
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT
IfxGtm_ATOM2_6_TOUT100_P11_11_OUT.
Definition: IfxGtm_PinMap.h:286
IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT
IfxGtm_TOM1_12_TOUT34_P33_12_OUT.
Definition: IfxGtm_PinMap.h:696
IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT
IfxGtm_TOM0_3_TOUT105_P10_3_OUT.
Definition: IfxGtm_PinMap.h:625
IfxGtm_CLK2_P11_12_OUT
IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT
GTM_CLK2: GTM output.
Definition: IfxGtm_PinMap.h:346
IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT
IfxGtm_TOM1_7_TOUT17_P00_8_OUT.
Definition: IfxGtm_PinMap.h:768
IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT
IfxGtm_TOM0_2_TOUT79_P15_8_OUT.
Definition: IfxGtm_PinMap.h:623
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT
IfxGtm_ATOM0_4_TOUT81_P14_1_OUT.
Definition: IfxGtm_PinMap.h:163
IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT
IfxGtm_TOM1_1_TOUT95_P11_2_OUT.
Definition: IfxGtm_PinMap.h:718
IfxGtm_TIM1_2_TIN33_P33_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN
IfxGtm_TIM1_2_TIN33_P33_11_IN.
Definition: IfxGtm_PinMap.h:454
IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT
IfxGtm_TOM0_2_TOUT33_P33_11_OUT.
Definition: IfxGtm_PinMap.h:621
IfxGtm_TIM2_4_TIN90_P14_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN
IfxGtm_TIM2_4_TIN90_P14_10_IN.
Definition: IfxGtm_PinMap.h:542
IfxGtm_TIM0_1_TIN11_P00_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN
IfxGtm_TIM0_1_TIN11_P00_2_IN.
Definition: IfxGtm_PinMap.h:362
IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT
IfxGtm_TOM0_0_TOUT32_P33_10_OUT.
Definition: IfxGtm_PinMap.h:565
IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT
IfxGtm_TOM1_7_TOUT64_P20_8_OUT.
Definition: IfxGtm_PinMap.h:772
IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT
IfxGtm_TOM0_5_TOUT58_P21_7_OUT.
Definition: IfxGtm_PinMap.h:645
IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT
IfxGtm_TOM0_13_TOUT73_P15_2_OUT.
Definition: IfxGtm_PinMap.h:596
IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT
IfxGtm_TOM1_14_TOUT36_P32_0_OUT.
Definition: IfxGtm_PinMap.h:703
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT
IfxGtm_ATOM0_7_TOUT64_P20_8_OUT.
Definition: IfxGtm_PinMap.h:180
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT
IfxGtm_ATOM1_4_TOUT57_P21_6_OUT.
Definition: IfxGtm_PinMap.h:226
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT
IfxGtm_ATOM1_7_TOUT67_P20_11_OUT.
Definition: IfxGtm_PinMap.h:249
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT
IfxGtm_ATOM2_2_TOUT96_P11_3_OUT.
Definition: IfxGtm_PinMap.h:267
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT
IfxGtm_ATOM2_3_TOUT29_P33_7_OUT.
Definition: IfxGtm_PinMap.h:269
IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT
IfxGtm_TOM0_9_TOUT1_P02_1_OUT.
Definition: IfxGtm_PinMap.h:669
IfxGtm_TIM2_3_TIN89_P14_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN
IfxGtm_TIM2_3_TIN89_P14_9_IN.
Definition: IfxGtm_PinMap.h:536
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:79
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT
IfxGtm_ATOM1_0_TOUT8_P02_8_OUT.
Definition: IfxGtm_PinMap.h:190
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT
IfxGtm_ATOM1_4_TOUT14_P00_5_OUT.
Definition: IfxGtm_PinMap.h:222
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT
IfxGtm_ATOM0_5_TOUT110_P10_8_OUT.
Definition: IfxGtm_PinMap.h:164
IfxGtm_ToutSel
IfxGtm_ToutSel
TOUTSEL register control code.
Definition: IfxGtm_PinMap.h:66
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT
IfxGtm_ATOM3_1_TOUT78_P15_7_OUT.
Definition: IfxGtm_PinMap.h:309
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT
IfxGtm_ATOM3_2_TOUT28_P33_6_OUT.
Definition: IfxGtm_PinMap.h:315
IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT
IfxGtm_TOM1_11_TOUT63_P20_7_OUT.
Definition: IfxGtm_PinMap.h:694
IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT
IfxGtm_TOM0_10_TOUT12_P00_3_OUT.
Definition: IfxGtm_PinMap.h:571
IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT
IfxGtm_TOM1_2_TOUT70_P20_14_OUT.
Definition: IfxGtm_PinMap.h:725
IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT
IfxGtm_TOM0_6_TOUT59_P20_0_OUT.
Definition: IfxGtm_PinMap.h:651
IfxGtm_TIM1_3_TIN29_P33_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN
IfxGtm_TIM1_3_TIN29_P33_7_IN.
Definition: IfxGtm_PinMap.h:464
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT
IfxGtm_ATOM1_1_TOUT31_P33_9_OUT.
Definition: IfxGtm_PinMap.h:196
IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT
IfxGtm_TOM0_0_TOUT87_P14_7_OUT.
Definition: IfxGtm_PinMap.h:570
IfxGtm_TIM0_0_TIN18_P00_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN
IfxGtm_TIM0_0_TIN18_P00_9_IN.
Definition: IfxGtm_PinMap.h:349
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT
IfxGtm_ATOM2_2_TOUT20_P00_11_OUT.
Definition: IfxGtm_PinMap.h:262
IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT
IfxGtm_TOM0_8_TOUT51_P21_0_OUT.
Definition: IfxGtm_PinMap.h:661
IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT
IfxGtm_TOM0_15_TOUT67_P20_11_OUT.
Definition: IfxGtm_PinMap.h:607
IfxGtm_TIM2_7_TIN93_P13_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN
IfxGtm_TIM2_7_TIN93_P13_2_IN.
Definition: IfxGtm_PinMap.h:561
IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT
IfxGtm_TOM0_1_TOUT103_P10_1_OUT.
Definition: IfxGtm_PinMap.h:610
IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT
IfxGtm_TOM1_0_TOUT48_P22_1_OUT.
Definition: IfxGtm_PinMap.h:676
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT
IfxGtm_ATOM2_1_TOUT69_P20_13_OUT.
Definition: IfxGtm_PinMap.h:260
IfxGtm_TIM1_2_TIN55_P21_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN
IfxGtm_TIM1_2_TIN55_P21_4_IN.
Definition: IfxGtm_PinMap.h:456
IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT
IfxGtm_TOM0_5_TOUT23_P33_1_OUT.
Definition: IfxGtm_PinMap.h:643
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT
IfxGtm_ATOM1_2_TOUT80_P14_0_OUT.
Definition: IfxGtm_PinMap.h:211
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT
IfxGtm_ATOM0_1_TOUT84_P14_4_OUT.
Definition: IfxGtm_PinMap.h:138
IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT
IfxGtm_TOM1_3_TOUT49_P22_2_OUT.
Definition: IfxGtm_PinMap.h:733
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT
IfxGtm_ATOM0_5_TOUT23_P33_1_OUT.
Definition: IfxGtm_PinMap.h:166
IfxGtm_TIM0_2_TIN28_P33_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN
IfxGtm_TIM0_2_TIN28_P33_6_IN.
Definition: IfxGtm_PinMap.h:375
IfxGtm_TIM2_6_TIN62_P20_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN
IfxGtm_TIM2_6_TIN62_P20_6_IN.
Definition: IfxGtm_PinMap.h:552
IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT
IfxGtm_TOM0_9_TOUT52_P21_1_OUT.
Definition: IfxGtm_PinMap.h:671
IfxGtm_TIM0_0_TIN34_P33_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN
IfxGtm_TIM0_0_TIN34_P33_12_IN.
Definition: IfxGtm_PinMap.h:352
IfxGtm_TIM0_2_TIN33_P33_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN
IfxGtm_TIM0_2_TIN33_P33_11_IN.
Definition: IfxGtm_PinMap.h:377
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT
IfxGtm_ATOM0_3_TOUT82_P14_2_OUT.
Definition: IfxGtm_PinMap.h:155
IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT
IfxGtm_TOM0_14_TOUT16_P00_7_OUT.
Definition: IfxGtm_PinMap.h:599
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT
IfxGtm_ATOM3_2_TOUT96_P11_3_OUT.
Definition: IfxGtm_PinMap.h:320
IfxGtm_Tom_ToutMapP
IfxGtm_Tom_ToutMap * IfxGtm_Tom_ToutMapP
Pointer to IfxGtm_Tom_ToutMap.
Definition: IfxGtm_PinMap.h:118
IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT
IfxGtm_TOM1_7_TOUT44_P23_3_OUT.
Definition: IfxGtm_PinMap.h:770
IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT
IfxGtm_TOM1_3_TOUT80_P14_0_OUT.
Definition: IfxGtm_PinMap.h:736
IfxGtm_TIM0_6_TIN43_P23_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN
IfxGtm_TIM0_6_TIN43_P23_2_IN.
Definition: IfxGtm_PinMap.h:413
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT
IfxGtm_ATOM1_4_TOUT61_P20_3_OUT.
Definition: IfxGtm_PinMap.h:227
IfxGtm_ToutSel_b
Definition: IfxGtm_PinMap.h:69
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxGtm_TIM0_5_TIN110_P10_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN
IfxGtm_TIM0_5_TIN110_P10_8_IN.
Definition: IfxGtm_PinMap.h:403
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT
IfxGtm_ATOM1_6_TOUT24_P33_2_OUT.
Definition: IfxGtm_PinMap.h:240
IfxGtm_TIM2_6_TIN92_P13_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN
IfxGtm_TIM2_6_TIN92_P13_1_IN.
Definition: IfxGtm_PinMap.h:555
IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT
IfxGtm_TOM1_14_TOUT66_P20_10_OUT.
Definition: IfxGtm_PinMap.h:704
IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT
IfxGtm_TOM0_8_TOUT95_P11_2_OUT.
Definition: IfxGtm_PinMap.h:665
IfxGtm_TIM0_5_TIN5_P02_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN
IfxGtm_TIM0_5_TIN5_P02_5_IN.
Definition: IfxGtm_PinMap.h:408
IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT
IfxGtm_TOM0_10_TOUT62_P20_6_OUT.
Definition: IfxGtm_PinMap.h:575
IfxGtm_TIM2_1_TIN11_P00_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN
IfxGtm_TIM2_1_TIN11_P00_2_IN.
Definition: IfxGtm_PinMap.h:524
IfxGtm_TIM1_1_TIN103_P10_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN
IfxGtm_TIM1_1_TIN103_P10_1_IN.
Definition: IfxGtm_PinMap.h:437
IfxGtm_TIM0_7_TIN45_P23_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN
IfxGtm_TIM0_7_TIN45_P23_4_IN.
Definition: IfxGtm_PinMap.h:419
IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT
IfxGtm_TOM0_15_TOUT101_P11_12_OUT.
Definition: IfxGtm_PinMap.h:604
IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT
IfxGtm_TOM0_4_TOUT102_P10_0_OUT.
Definition: IfxGtm_PinMap.h:634
IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT
IfxGtm_TOM1_10_TOUT62_P20_6_OUT.
Definition: IfxGtm_PinMap.h:689
IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT
IfxGtm_TOM1_5_TOUT23_P33_1_OUT.
Definition: IfxGtm_PinMap.h:750
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT
IfxGtm_ATOM2_5_TOUT65_P20_9_OUT.
Definition: IfxGtm_PinMap.h:282
IfxGtm_TIM2_4_TIN14_P00_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN
IfxGtm_TIM2_4_TIN14_P00_5_IN.
Definition: IfxGtm_PinMap.h:538
IfxGtm_TIM1_1_TIN95_P11_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN
IfxGtm_TIM1_1_TIN95_P11_2_IN.
Definition: IfxGtm_PinMap.h:447
IfxGtm_TIM0_1_TIN103_P10_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN
IfxGtm_TIM0_1_TIN103_P10_1_IN.
Definition: IfxGtm_PinMap.h:360
IfxGtm_TIM0_3_TIN38_P32_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN
IfxGtm_TIM0_3_TIN38_P32_2_IN.
Definition: IfxGtm_PinMap.h:386
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT
IfxGtm_ATOM2_3_TOUT71_P15_0_OUT.
Definition: IfxGtm_PinMap.h:270
IfxGtm_TIM1_3_TIN13_P00_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN
IfxGtm_TIM1_3_TIN13_P00_4_IN.
Definition: IfxGtm_PinMap.h:462
IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT
IfxGtm_TOM0_11_TOUT3_P02_3_OUT.
Definition: IfxGtm_PinMap.h:579
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT
IfxGtm_ATOM0_3_TOUT13_P00_4_OUT.
Definition: IfxGtm_PinMap.h:149
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT
IfxGtm_ATOM1_6_TOUT74_P15_3_OUT.
Definition: IfxGtm_PinMap.h:245
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT
IfxGtm_ATOM0_1_TOUT54_P21_3_OUT.
Definition: IfxGtm_PinMap.h:137
IfxGtm_TIM0_2_TIN46_P23_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN
IfxGtm_TIM0_2_TIN46_P23_5_IN.
Definition: IfxGtm_PinMap.h:379
IfxGtm_TIM0_6_TIN106_P10_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN
IfxGtm_TIM0_6_TIN106_P10_4_IN.
Definition: IfxGtm_PinMap.h:410
IfxGtm_TIM2_4_TIN72_P15_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN
IfxGtm_TIM2_4_TIN72_P15_1_IN.
Definition: IfxGtm_PinMap.h:541
IfxGtm_TIM1_4_TIN50_P22_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN
IfxGtm_TIM1_4_TIN50_P22_3_IN.
Definition: IfxGtm_PinMap.h:478
IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT
IfxGtm_TOM1_1_TOUT69_P20_13_OUT.
Definition: IfxGtm_PinMap.h:715
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT
IfxGtm_ATOM1_2_TOUT104_P10_2_OUT.
Definition: IfxGtm_PinMap.h:203
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:258
IfxGtm_TIM1_3_TIN71_P15_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN
IfxGtm_TIM1_3_TIN71_P15_0_IN.
Definition: IfxGtm_PinMap.h:469
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT
IfxGtm_ATOM1_3_TOUT108_P10_6_OUT.
Definition: IfxGtm_PinMap.h:213
IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT
IfxGtm_TOM1_3_TOUT97_P11_6_OUT.
Definition: IfxGtm_PinMap.h:738
IfxGtm_TIM1_6_TIN92_P13_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN
IfxGtm_TIM1_6_TIN92_P13_1_IN.
Definition: IfxGtm_PinMap.h:505
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT
IfxGtm_ATOM0_2_TOUT83_P14_3_OUT.
Definition: IfxGtm_PinMap.h:146
IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT
IfxGtm_TOM0_15_TOUT17_P00_8_OUT.
Definition: IfxGtm_PinMap.h:605
IfxGtm_TIM1_0_TIN48_P22_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN
IfxGtm_TIM1_0_TIN48_P22_1_IN.
Definition: IfxGtm_PinMap.h:429
IfxGtm_TIM0_3_TIN108_P10_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN
IfxGtm_TIM0_3_TIN108_P10_6_IN.
Definition: IfxGtm_PinMap.h:383
IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT
IfxGtm_TOM0_6_TOUT83_P14_3_OUT.
Definition: IfxGtm_PinMap.h:652
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT
IfxGtm_ATOM3_3_TOUT89_P14_9_OUT.
Definition: IfxGtm_PinMap.h:324
IfxGtm_TIM0_4_TIN61_P20_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN
IfxGtm_TIM0_4_TIN61_P20_3_IN.
Definition: IfxGtm_PinMap.h:401
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT
IfxGtm_ATOM1_5_TOUT15_P00_6_OUT.
Definition: IfxGtm_PinMap.h:230
IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT
IfxGtm_TOM0_1_TOUT86_P14_6_OUT.
Definition: IfxGtm_PinMap.h:616
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT
IfxGtm_ATOM2_4_TOUT72_P15_1_OUT.
Definition: IfxGtm_PinMap.h:277
IfxGtm_TIM1_0_TIN18_P00_9_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN
IfxGtm_TIM1_0_TIN18_P00_9_IN.
Definition: IfxGtm_PinMap.h:426
IfxGtm_TIM1_5_TIN73_P15_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN
IfxGtm_TIM1_5_TIN73_P15_2_IN.
Definition: IfxGtm_PinMap.h:490
IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT
IfxGtm_TOM1_1_TOUT86_P14_6_OUT.
Definition: IfxGtm_PinMap.h:717
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT
IfxGtm_ATOM0_0_TOUT0_P02_0_OUT.
Definition: IfxGtm_PinMap.h:124
IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT
IfxGtm_TOM1_3_TOUT13_P00_4_OUT.
Definition: IfxGtm_PinMap.h:729
IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT
IfxGtm_TOM0_14_TOUT74_P15_3_OUT.
Definition: IfxGtm_PinMap.h:603
IfxGtm_TIM1_4_TIN22_P33_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN
IfxGtm_TIM1_4_TIN22_P33_0_IN.
Definition: IfxGtm_PinMap.h:474
IfxGtm_TIM1_6_TIN106_P10_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN
IfxGtm_TIM1_6_TIN106_P10_4_IN.
Definition: IfxGtm_PinMap.h:495
IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT
IfxGtm_TOM1_2_TOUT88_P14_8_OUT.
Definition: IfxGtm_PinMap.h:727
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT
IfxGtm_ATOM1_0_TOUT48_P22_1_OUT.
Definition: IfxGtm_PinMap.h:184
IfxGtm_TIM0_7_TIN7_P02_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN
IfxGtm_TIM0_7_TIN7_P02_7_IN.
Definition: IfxGtm_PinMap.h:422
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT
IfxGtm_ATOM2_0_TOUT68_P20_12_OUT.
Definition: IfxGtm_PinMap.h:255
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT
IfxGtm_ATOM1_5_TOUT58_P21_7_OUT.
Definition: IfxGtm_PinMap.h:234
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT
IfxGtm_ATOM1_6_TOUT106_P10_4_OUT.
Definition: IfxGtm_PinMap.h:238
IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT
IfxGtm_TOM1_6_TOUT100_P11_11_OUT.
Definition: IfxGtm_PinMap.h:758
IfxGtm_TIM1_6_TIN83_P14_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN
IfxGtm_TIM1_6_TIN83_P14_3_IN.
Definition: IfxGtm_PinMap.h:504
IfxGtm_TIM2_5_TIN15_P00_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN
IfxGtm_TIM2_5_TIN15_P00_6_IN.
Definition: IfxGtm_PinMap.h:544
IfxGtm_TIM0_0_TIN77_P15_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN
IfxGtm_TIM0_0_TIN77_P15_6_IN.
Definition: IfxGtm_PinMap.h:355
IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT
IfxGtm_TOM1_12_TOUT61_P20_3_OUT.
Definition: IfxGtm_PinMap.h:698
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT
IfxGtm_ATOM0_2_TOUT107_P10_5_OUT.
Definition: IfxGtm_PinMap.h:140
IfxGtm_TIM1_1_TIN19_P00_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN
IfxGtm_TIM1_1_TIN19_P00_10_IN.
Definition: IfxGtm_PinMap.h:438
IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT
IfxGtm_TOM0_8_TOUT8_P02_8_OUT.
Definition: IfxGtm_PinMap.h:663
IfxGtm_TIM0_0_TIN85_P14_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN
IfxGtm_TIM0_0_TIN85_P14_5_IN.
Definition: IfxGtm_PinMap.h:356
IfxGtm_TIM2_7_TIN67_P20_11_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN
IfxGtm_TIM2_7_TIN67_P20_11_IN.
Definition: IfxGtm_PinMap.h:559
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT
IfxGtm_ATOM1_5_TOUT41_P23_0_OUT.
Definition: IfxGtm_PinMap.h:233
IfxGtm_TIM2_0_TIN76_P15_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN
IfxGtm_TIM2_0_TIN76_P15_5_IN.
Definition: IfxGtm_PinMap.h:519
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxGtm_TIM0_7_TIN25_P33_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN
IfxGtm_TIM0_7_TIN25_P33_3_IN.
Definition: IfxGtm_PinMap.h:417
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT
IfxGtm_ATOM0_2_TOUT2_P02_2_OUT.
Definition: IfxGtm_PinMap.h:142
IfxGtm_ChXSel_j
Definition: IfxGtm_PinMap.h:55
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT
IfxGtm_ATOM2_1_TOUT95_P11_2_OUT.
Definition: IfxGtm_PinMap.h:261
IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT
IfxGtm_TOM0_6_TOUT42_P23_1_OUT.
Definition: IfxGtm_PinMap.h:650
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT
IfxGtm_ATOM2_4_TOUT90_P14_10_OUT.
Definition: IfxGtm_PinMap.h:278
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT
IfxGtm_ATOM0_1_TOUT47_P22_0_OUT.
Definition: IfxGtm_PinMap.h:136
IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT
IfxGtm_TOM0_5_TOUT82_P14_2_OUT.
Definition: IfxGtm_PinMap.h:646
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT
IfxGtm_ATOM2_5_TOUT52_P21_1_OUT.
Definition: IfxGtm_PinMap.h:281
IfxGtm_TIM1_1_TIN69_P20_13_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN
IfxGtm_TIM1_1_TIN69_P20_13_IN.
Definition: IfxGtm_PinMap.h:444
IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT
IfxGtm_TOM1_4_TOUT50_P22_3_OUT.
Definition: IfxGtm_PinMap.h:743
IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT
IfxGtm_TOM1_4_TOUT98_P11_9_OUT.
Definition: IfxGtm_PinMap.h:748
IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT
IfxGtm_TOM0_5_TOUT110_P10_8_OUT.
Definition: IfxGtm_PinMap.h:642
IfxGtm_TIM0_0_TIN87_P14_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN
IfxGtm_TIM0_0_TIN87_P14_7_IN.
Definition: IfxGtm_PinMap.h:357
IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT
IfxGtm_TOM1_7_TOUT93_P13_2_OUT.
Definition: IfxGtm_PinMap.h:775
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT
IfxGtm_ATOM1_3_TOUT38_P32_2_OUT.
Definition: IfxGtm_PinMap.h:215
IfxGtm_TIM0_1_TIN1_P02_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN
IfxGtm_TIM0_1_TIN1_P02_1_IN.
Definition: IfxGtm_PinMap.h:364
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT
IfxGtm_ATOM2_5_TOUT35_P33_13_OUT.
Definition: IfxGtm_PinMap.h:280
IfxGtm_TIM1_0_TIN68_P20_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN
IfxGtm_TIM1_0_TIN68_P20_12_IN.
Definition: IfxGtm_PinMap.h:431
IfxGtm_Tim_TinMap::select
IfxGtm_ChXSel select
Input multiplexer value.
Definition: IfxGtm_PinMap.h:81
IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT
IfxGtm_TOM0_10_TOUT70_P20_14_OUT.
Definition: IfxGtm_PinMap.h:576
IfxGtm_TIM1_4_TIN102_P10_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN
IfxGtm_TIM1_4_TIN102_P10_0_IN.
Definition: IfxGtm_PinMap.h:472
IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT
IfxGtm_TOM0_13_TOUT99_P11_10_OUT.
Definition: IfxGtm_PinMap.h:597
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT
IfxGtm_ATOM2_5_TOUT73_P15_2_OUT.
Definition: IfxGtm_PinMap.h:283
IfxGtm_TIM1_5_TIN41_P23_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN
IfxGtm_TIM1_5_TIN41_P23_0_IN.
Definition: IfxGtm_PinMap.h:486
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT
IfxGtm_ATOM1_1_TOUT1_P02_1_OUT.
Definition: IfxGtm_PinMap.h:195
IfxGtm_TIM2_0_TIN9_P00_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN
IfxGtm_TIM2_0_TIN9_P00_0_IN.
Definition: IfxGtm_PinMap.h:522
IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT
IfxGtm_TOM0_8_TOUT68_P20_12_OUT.
Definition: IfxGtm_PinMap.h:662
IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT
IfxGtm_TOM0_13_TOUT5_P02_5_OUT.
Definition: IfxGtm_PinMap.h:594
IfxGtm_ChXSel_k
Definition: IfxGtm_PinMap.h:56
IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT
IfxGtm_TOM1_0_TOUT26_P33_4_OUT.
Definition: IfxGtm_PinMap.h:674
IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT
IfxGtm_TOM1_4_TOUT72_P15_1_OUT.
Definition: IfxGtm_PinMap.h:745
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT
IfxGtm_ATOM3_4_TOUT30_P33_8_OUT.
Definition: IfxGtm_PinMap.h:327
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT
IfxGtm_ATOM3_0_TOUT85_P14_5_OUT.
Definition: IfxGtm_PinMap.h:303
IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT
IfxGtm_TOM1_9_TOUT103_P10_1_OUT.
Definition: IfxGtm_PinMap.h:779
IfxGtm_TIM0_3_TIN60_P20_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN
IfxGtm_TIM0_3_TIN60_P20_1_IN.
Definition: IfxGtm_PinMap.h:391
IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT
IfxGtm_TOM0_5_TOUT40_P32_4_OUT.
Definition: IfxGtm_PinMap.h:644
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT
IfxGtm_ATOM2_1_TOUT19_P00_10_OUT.
Definition: IfxGtm_PinMap.h:257
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT
IfxGtm_ATOM2_2_TOUT44_P23_3_OUT.
Definition: IfxGtm_PinMap.h:264
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT
IfxGtm_ATOM1_2_TOUT33_P33_11_OUT.
Definition: IfxGtm_PinMap.h:207
IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT
IfxGtm_TOM1_0_TOUT8_P02_8_OUT.
Definition: IfxGtm_PinMap.h:683
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT
IfxGtm_ATOM3_6_TOUT36_P32_0_OUT.
Definition: IfxGtm_PinMap.h:338
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT
IfxGtm_ATOM1_2_TOUT12_P00_3_OUT.
Definition: IfxGtm_PinMap.h:205
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT
IfxGtm_ATOM0_0_TOUT53_P21_2_OUT.
Definition: IfxGtm_PinMap.h:127
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT
IfxGtm_ATOM1_2_TOUT2_P02_2_OUT.
Definition: IfxGtm_PinMap.h:206
IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT
IfxGtm_TOM1_8_TOUT51_P21_0_OUT.
Definition: IfxGtm_PinMap.h:778
IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT
IfxGtm_TOM1_8_TOUT0_P02_0_OUT.
Definition: IfxGtm_PinMap.h:776
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT
IfxGtm_ATOM3_7_TOUT101_P11_12_OUT.
Definition: IfxGtm_PinMap.h:341
IfxGtm_TIM0_2_TIN36_P32_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN
IfxGtm_TIM0_2_TIN36_P32_0_IN.
Definition: IfxGtm_PinMap.h:378
IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT
IfxGtm_TOM0_0_TOUT109_P10_7_OUT.
Definition: IfxGtm_PinMap.h:562
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT
IfxGtm_ATOM2_1_TOUT43_P23_2_OUT.
Definition: IfxGtm_PinMap.h:259
IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT
IfxGtm_TOM1_0_TOUT68_P20_12_OUT.
Definition: IfxGtm_PinMap.h:678
IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT
IfxGtm_TOM1_3_TOUT89_P14_9_OUT.
Definition: IfxGtm_PinMap.h:737
IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT
IfxGtm_TOM1_2_TOUT20_P00_11_OUT.
Definition: IfxGtm_PinMap.h:720
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT
IfxGtm_ATOM2_2_TOUT88_P14_8_OUT.
Definition: IfxGtm_PinMap.h:266
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT
IfxGtm_ATOM1_2_TOUT46_P23_5_OUT.
Definition: IfxGtm_PinMap.h:208
IfxGtm_ChXSel_n
Definition: IfxGtm_PinMap.h:60
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT
IfxGtm_ATOM1_0_TOUT109_P10_7_OUT.
Definition: IfxGtm_PinMap.h:183
IfxGtm_TIM1_3_TIN3_P02_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN
IfxGtm_TIM1_3_TIN3_P02_3_IN.
Definition: IfxGtm_PinMap.h:466
IfxGtm_TIM1_3_TIN49_P22_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN
IfxGtm_TIM1_3_TIN49_P22_2_IN.
Definition: IfxGtm_PinMap.h:467
IfxGtm_TIM2_3_TIN97_P11_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN
IfxGtm_TIM2_3_TIN97_P11_6_IN.
Definition: IfxGtm_PinMap.h:537
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT
IfxGtm_ATOM0_4_TOUT50_P22_3_OUT.
Definition: IfxGtm_PinMap.h:160
IfxGtm_TIM1_3_TIN108_P10_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN
IfxGtm_TIM1_3_TIN108_P10_6_IN.
Definition: IfxGtm_PinMap.h:461
IfxGtm_TIM0_1_TIN35_P33_13_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN
IfxGtm_TIM0_1_TIN35_P33_13_IN.
Definition: IfxGtm_PinMap.h:367
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT
IfxGtm_ATOM1_3_TOUT49_P22_2_OUT.
Definition: IfxGtm_PinMap.h:217
IfxGtm_TIM1_7_TIN75_P15_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN
IfxGtm_TIM1_7_TIN75_P15_4_IN.
Definition: IfxGtm_PinMap.h:513
IfxGtm_TIM0_1_TIN47_P22_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN
IfxGtm_TIM0_1_TIN47_P22_0_IN.
Definition: IfxGtm_PinMap.h:368
IfxGtm_TIM2_3_TIN71_P15_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN
IfxGtm_TIM2_3_TIN71_P15_0_IN.
Definition: IfxGtm_PinMap.h:535
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT
IfxGtm_ATOM2_2_TOUT28_P33_6_OUT.
Definition: IfxGtm_PinMap.h:263
IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT
IfxGtm_TOM1_4_TOUT57_P21_6_OUT.
Definition: IfxGtm_PinMap.h:744
IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT
IfxGtm_TOM1_2_TOUT96_P11_3_OUT.
Definition: IfxGtm_PinMap.h:728
IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT
IfxGtm_TOM1_2_TOUT55_P21_4_OUT.
Definition: IfxGtm_PinMap.h:724
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT
IfxGtm_ATOM3_0_TOUT76_P15_5_OUT.
Definition: IfxGtm_PinMap.h:301
IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT
IfxGtm_TOM1_6_TOUT74_P15_3_OUT.
Definition: IfxGtm_PinMap.h:764
IfxGtm_ChXSel_g
Definition: IfxGtm_PinMap.h:51
IfxGtm_TIM1_7_TIN45_P23_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN
IfxGtm_TIM1_7_TIN45_P23_4_IN.
Definition: IfxGtm_PinMap.h:510
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT
IfxGtm_ATOM0_2_TOUT33_P33_11_OUT.
Definition: IfxGtm_PinMap.h:143
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT
IfxGtm_ATOM0_7_TOUT17_P00_8_OUT.
Definition: IfxGtm_PinMap.h:177
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT
IfxGtm_ATOM0_7_TOUT45_P23_4_OUT.
Definition: IfxGtm_PinMap.h:179
IfxGtm_TIM2_0_TIN8_P02_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN
IfxGtm_TIM2_0_TIN8_P02_8_IN.
Definition: IfxGtm_PinMap.h:520
IfxGtm_Atom.h
GTM basic functionality.
IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT
IfxGtm_TOM0_11_TOUT63_P20_7_OUT.
Definition: IfxGtm_PinMap.h:582
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT
IfxGtm_ATOM3_4_TOUT90_P14_10_OUT.
Definition: IfxGtm_PinMap.h:331
IfxGtm_TIM1_0_TIN32_P33_10_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN
IfxGtm_TIM1_0_TIN32_P33_10_IN.
Definition: IfxGtm_PinMap.h:428
IfxGtm_TIM2_1_TIN69_P20_13_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN
IfxGtm_TIM2_1_TIN69_P20_13_IN.
Definition: IfxGtm_PinMap.h:526
IfxGtm_TIM0_7_TIN84_P14_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN
IfxGtm_TIM0_7_TIN84_P14_4_IN.
Definition: IfxGtm_PinMap.h:423
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT
IfxGtm_ATOM0_7_TOUT7_P02_7_OUT.
Definition: IfxGtm_PinMap.h:181
IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT
IfxGtm_TOM0_12_TOUT50_P22_3_OUT.
Definition: IfxGtm_PinMap.h:589
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT
IfxGtm_ATOM3_1_TOUT19_P00_10_OUT.
Definition: IfxGtm_PinMap.h:306
IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT
IfxGtm_TOM1_3_TOUT56_P21_5_OUT.
Definition: IfxGtm_PinMap.h:734
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT
IfxGtm_ATOM0_6_TOUT106_P10_4_OUT.
Definition: IfxGtm_PinMap.h:171
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT
IfxGtm_ATOM0_3_TOUT38_P32_2_OUT.
Definition: IfxGtm_PinMap.h:150
IfxGtm_TIM2_7_TIN17_P00_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN
IfxGtm_TIM2_7_TIN17_P00_8_IN.
Definition: IfxGtm_PinMap.h:557
IfxGtm_TIM0_6_TIN62_P20_6_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN
IfxGtm_TIM0_6_TIN62_P20_6_IN.
Definition: IfxGtm_PinMap.h:415
IfxGtm_TIM0_5_TIN58_P21_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN
IfxGtm_TIM0_5_TIN58_P21_7_IN.
Definition: IfxGtm_PinMap.h:407
IfxGtm_TIM1_6_TIN24_P33_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN
IfxGtm_TIM1_6_TIN24_P33_2_IN.
Definition: IfxGtm_PinMap.h:497
IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT
IfxGtm_TOM0_0_TOUT53_P21_2_OUT.
Definition: IfxGtm_PinMap.h:566
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT
IfxGtm_ATOM3_4_TOUT81_P14_1_OUT.
Definition: IfxGtm_PinMap.h:330
IfxGtm_TIM1_6_TIN16_P00_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN
IfxGtm_TIM1_6_TIN16_P00_7_IN.
Definition: IfxGtm_PinMap.h:496
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT
IfxGtm_ATOM1_3_TOUT60_P20_1_OUT.
Definition: IfxGtm_PinMap.h:219
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT
IfxGtm_ATOM1_6_TOUT59_P20_0_OUT.
Definition: IfxGtm_PinMap.h:242
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT
IfxGtm_ATOM1_3_TOUT13_P00_4_OUT.
Definition: IfxGtm_PinMap.h:214
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT
IfxGtm_ATOM2_7_TOUT101_P11_12_OUT.
Definition: IfxGtm_PinMap.h:292
IfxGtm_TIM0_0_TIN48_P22_1_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN
IfxGtm_TIM0_0_TIN48_P22_1_IN.
Definition: IfxGtm_PinMap.h:353
IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT
IfxGtm_TOM0_12_TOUT4_P02_4_OUT.
Definition: IfxGtm_PinMap.h:588
IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT
IfxGtm_TOM0_2_TOUT107_P10_5_OUT.
Definition: IfxGtm_PinMap.h:618
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT
IfxGtm_ATOM1_5_TOUT40_P32_4_OUT.
Definition: IfxGtm_PinMap.h:232
IfxGtm_TIM1_7_TIN101_P11_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN
IfxGtm_TIM1_7_TIN101_P11_12_IN.
Definition: IfxGtm_PinMap.h:506
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_TIM1_5_TIN82_P14_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN
IfxGtm_TIM1_5_TIN82_P14_2_IN.
Definition: IfxGtm_PinMap.h:491
IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT
IfxGtm_TOM0_8_TOUT9_P00_0_OUT.
Definition: IfxGtm_PinMap.h:666
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT
IfxGtm_ATOM0_3_TOUT108_P10_6_OUT.
Definition: IfxGtm_PinMap.h:148
IfxGtm_TIM0_1_TIN78_P15_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN
IfxGtm_TIM0_1_TIN78_P15_7_IN.
Definition: IfxGtm_PinMap.h:370
IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT
IfxGtm_TOM1_3_TOUT38_P32_2_OUT.
Definition: IfxGtm_PinMap.h:732
IfxGtm_TIM0_6_TIN59_P20_0_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN
IfxGtm_TIM0_6_TIN59_P20_0_IN.
Definition: IfxGtm_PinMap.h:414
IfxGtm_TIM0_4_TIN50_P22_3_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN
IfxGtm_TIM0_4_TIN50_P22_3_IN.
Definition: IfxGtm_PinMap.h:398
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT
IfxGtm_ATOM3_6_TOUT62_P20_6_OUT.
Definition: IfxGtm_PinMap.h:339
IfxGtm_TIM1_0_TIN53_P21_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN
IfxGtm_TIM1_0_TIN53_P21_2_IN.
Definition: IfxGtm_PinMap.h:430
IfxGtm_TIM0_0_TIN26_P33_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN
IfxGtm_TIM0_0_TIN26_P33_4_IN.
Definition: IfxGtm_PinMap.h:350
IfxGtm_TIM1_3_TIN38_P32_2_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN
IfxGtm_TIM1_3_TIN38_P32_2_IN.
Definition: IfxGtm_PinMap.h:465
IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT
IfxGtm_TOM0_7_TOUT45_P23_4_OUT.
Definition: IfxGtm_PinMap.h:655
IfxGtm_TIM0_2_TIN107_P10_5_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN
IfxGtm_TIM0_2_TIN107_P10_5_IN.
Definition: IfxGtm_PinMap.h:373
IfxGtm_TIM0_4_TIN4_P02_4_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN
IfxGtm_TIM0_4_TIN4_P02_4_IN.
Definition: IfxGtm_PinMap.h:397
IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT
IfxGtm_TOM1_12_TOUT102_P10_0_OUT.
Definition: IfxGtm_PinMap.h:695
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT
IfxGtm_ATOM0_6_TOUT42_P23_1_OUT.
Definition: IfxGtm_PinMap.h:174
IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT
IfxGtm_TOM0_4_TOUT90_P14_10_OUT.
Definition: IfxGtm_PinMap.h:641
IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT
IfxGtm_TOM0_1_TOUT27_P33_5_OUT.
Definition: IfxGtm_PinMap.h:612
IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT
IfxGtm_TOM1_1_TOUT47_P22_0_OUT.
Definition: IfxGtm_PinMap.h:713
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT
IfxGtm_ATOM3_0_TOUT18_P00_9_OUT.
Definition: IfxGtm_PinMap.h:298
IfxGtm_TIM2_7_TIN63_P20_7_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN
IfxGtm_TIM2_7_TIN63_P20_7_IN.
Definition: IfxGtm_PinMap.h:558
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT
IfxGtm_ATOM0_0_TOUT85_P14_5_OUT.
Definition: IfxGtm_PinMap.h:128
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT
IfxGtm_ATOM3_2_TOUT20_P00_11_OUT.
Definition: IfxGtm_PinMap.h:314
IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT
IfxGtm_TOM1_0_TOUT18_P00_9_OUT.
Definition: IfxGtm_PinMap.h:673
IfxGtm_TIM0_3_TIN21_P00_12_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN
IfxGtm_TIM0_3_TIN21_P00_12_IN.
Definition: IfxGtm_PinMap.h:384
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT
IfxGtm_ATOM0_4_TOUT57_P21_6_OUT.
Definition: IfxGtm_PinMap.h:161
IfxGtm_PinMap_setAtomTout
IFX_EXTERN void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:701
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT
IfxGtm_ATOM0_0_TOUT8_P02_8_OUT.
Definition: IfxGtm_PinMap.h:129
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT
IfxGtm_ATOM3_5_TOUT99_P11_10_OUT.
Definition: IfxGtm_PinMap.h:336
IfxPort.h
PORT basic functionality.
IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT
IfxGtm_TOM1_9_TOUT52_P21_1_OUT.
Definition: IfxGtm_PinMap.h:781
IfxGtm_ChXSel_l
Definition: IfxGtm_PinMap.h:57
IfxGtm_ToutSel_a
Definition: IfxGtm_PinMap.h:68
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT
IfxGtm_ATOM3_2_TOUT80_P14_0_OUT.
Definition: IfxGtm_PinMap.h:317
IfxGtm_TIM2_2_TIN88_P14_8_IN
IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN
IfxGtm_TIM2_2_TIN88_P14_8_IN.
Definition: IfxGtm_PinMap.h:531
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT
IfxGtm_ATOM2_0_TOUT94_P13_3_OUT.
Definition: IfxGtm_PinMap.h:256


iLLD_TC26B: IfxGtm_Tbu.c Source File

  • Gtm
  • Std
IfxGtm_Tbu.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tbu.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Tbu.h"
30 #include "IfxGtm_Cmu.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
37 {
38 float32 result = 0.0F;
39
40 if (channel == IfxGtm_Tbu_Ts_0)
41 {
42 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH0_CTRL.B.CH_CLK_SRC, TRUE);
43 }
44 else if (channel == IfxGtm_Tbu_Ts_1)
45 {
46 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH1_CTRL.B.CH_CLK_SRC, TRUE);
47 }
48 else if (channel == IfxGtm_Tbu_Ts_2)
49 {
50 result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH2_CTRL.B.CH_CLK_SRC, TRUE);
51 }
52
53 return result;
54 }
IfxGtm_Tbu_Ts_0
Definition: IfxGtm_Tbu.h:51
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:49
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Tbu_getClockFrequency
float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency.
Definition: IfxGtm_Tbu.c:36
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Tbu_Ts_1
Definition: IfxGtm_Tbu.h:52
IfxGtm_Cmu.h
GTM basic functionality.
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Tbu_Ts_2
Definition: IfxGtm_Tbu.h:53
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:47


iLLD_TC26B: IfxGtm_Tbu.h Source File

  • Gtm
  • Std
IfxGtm_Tbu.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tbu.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Std_Tbu Tbu Basic Functionality
25 * \ingroup IfxLld_Gtm_Std
26 * \defgroup IfxLld_Gtm_Std_Tbu_Enumerations TBU Enumerations
27 * \ingroup IfxLld_Gtm_Std_Tbu
28 * \defgroup IfxLld_Gtm_Std_Tbu_Basic_Functions TBU Basic Functions
29 * \ingroup IfxLld_Gtm_Std_Tbu
30 */
31
32 #ifndef IFXGTM_TBU_H
33 #define IFXGTM_TBU_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "_Impl/IfxGtm_cfg.h"
40
41 /******************************************************************************/
42 /*--------------------------------Enumerations--------------------------------*/
43 /******************************************************************************/
44
45 /** \addtogroup IfxLld_Gtm_Std_Tbu_Enumerations
46 * \{ */
47 /** \brief GTM TOM TBU Time stamps
48 */
49 typedef enum
50 {
51 IfxGtm_Tbu_Ts_0,
52 IfxGtm_Tbu_Ts_1,
53 IfxGtm_Tbu_Ts_2
54 } IfxGtm_Tbu_Ts;
55
56 /** \} */
57
58 /** \addtogroup IfxLld_Gtm_Std_Tbu_Basic_Functions
59 * \{ */
60
61 /******************************************************************************/
62 /*-------------------------Inline Function Prototypes-------------------------*/
63 /******************************************************************************/
64
65 /** \brief Enables the channel
66 * \param gtm Pointer to GTM module
67 * \param channel TBU Time stamps
68 * \return None
69 */
70 IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
71
72 /** \brief Function to check if a TBU channel is enabled.
73 * Returns TRUE if the corresponding channel is enabled
74 * Returns FALSE if the corresponding channel is disabled.
75 * \param gtm Pointer to GTM SFR
76 * \param channel Channel of TBU
77 * \return TRUE: channel is enabled
78 */
79 IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
80
81 /******************************************************************************/
82 /*-------------------------Global Function Prototypes-------------------------*/
83 /******************************************************************************/
84
85 /** \brief Returns the clock frequency
86 * \param gtm Pointer to GTM module
87 * \param channel TBU Time stamps
88 * \return frequency
89 */
90 IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
91
92 /** \} */
93
94 /******************************************************************************/
95 /*---------------------Inline Function Implementations------------------------*/
96 /******************************************************************************/
97
98 IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
99 {
100 uint32 shift = channel * 2;
101
102 __ldmst_c(&gtm->TBU.CHEN.U, (3U << shift), (IfxGtm_FeatureControl_enable << shift));
103 }
104
105
106 IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
107 {
108 uint32 shift = channel * 2;
109 uint32 enable_status = (gtm->TBU.CHEN.U & ((uint32)3 << shift)) >> shift;
110
111 return enable_status == (uint32)IfxGtm_FeatureControl_enabled;
112 }
113
114
115 #endif /* IFXGTM_TBU_H */
IfxGtm_Tbu_enableChannel
IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Enables the channel.
Definition: IfxGtm_Tbu.h:98
IfxGtm_Tbu_Ts_0
Definition: IfxGtm_Tbu.h:51
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:49
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:91
IfxGtm_Tbu_isChannelEnabled
IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Function to check if a TBU channel is enabled. Returns TRUE if the corresponding channel is enabled R...
Definition: IfxGtm_Tbu.h:106
IfxGtm_FeatureControl_enabled
enabled
Definition: IfxGtm_cfg.h:230
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxGtm_Tbu_getClockFrequency
IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
Returns the clock frequency.
Definition: IfxGtm_Tbu.c:36
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:229
IfxGtm_Tbu_Ts_1
Definition: IfxGtm_Tbu.h:52
IfxGtm_Tbu_Ts_2
Definition: IfxGtm_Tbu.h:53
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC26B: IfxGtm_Tim.c Source File

  • Gtm
  • Std
IfxGtm_Tim.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Tim.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
36 {
37 IfxGtm_Cmu_Clk clock;
38
39 clock = IfxGtm_Tim_Ch_getCaptureClockSource(channel);
40
41 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
42 }
43
44
45 IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
46 {
47 return (IfxGtm_Cmu_Clk)channel->CTRL.B.CLK_SEL;
48 }
49
50
51 float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
52 {
53 IfxGtm_Cmu_Tim_Filter_Clk filterClock;
54 IfxGtm_Cmu_Clk clock;
55
56 filterClock = IfxGtm_Tim_Ch_getFilterClockSource(channel);
57
58 switch (filterClock)
59 {
60 case IfxGtm_Cmu_Tim_Filter_Clk_0:
61 clock = IfxGtm_Cmu_Clk_0;
62 break;
63 case IfxGtm_Cmu_Tim_Filter_Clk_1:
64 clock = IfxGtm_Cmu_Clk_1;
65 break;
66 case IfxGtm_Cmu_Tim_Filter_Clk_6:
67 clock = IfxGtm_Cmu_Clk_6;
68 break;
69 case IfxGtm_Cmu_Tim_Filter_Clk_7:
70 clock = IfxGtm_Cmu_Clk_7;
71 break;
72 default:
73 clock = IfxGtm_Cmu_Clk_0; // This case never occurs
74 break;
75 }
76
77 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
78 }
79
80
81 IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
82 {
83 return (IfxGtm_Cmu_Tim_Filter_Clk)channel->CTRL.B.FLT_CNT_FRQ;
84 }
85
86
87 float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
88 {
89 IfxGtm_Cmu_Clk clock;
90
91 clock = IfxGtm_Tim_Ch_getTimeoutClockSource(channel);
92
93 return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
94 }
95
96
97 IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
98 {
99 return (IfxGtm_Cmu_Clk)channel->TDUV.B.TCS;
100 }
101
102
103 void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
104 {
105 Ifx_GTM_TIM_CH_IRQ_EN en;
106 en.U = channel->IRQ_EN.U;
107
108 en.B.NEWVAL_IRQ_EN = irqOnNewVal ? 1 : 0;
109 en.B.CNTOFL_IRQ_EN = irqOnCntOverflow ? 1 : 0;
110 en.B.ECNTOFL_IRQ_EN = irqOnEcntOverflow ? 1 : 0;
111 en.B.GPROFL_IRQ_EN = irqOnDatalost ? 1 : 0;
112 channel->IRQ_EN.U = en.U;
113 }
114
115
116 void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
117 {
118 channel->CTRL.B.CLK_SEL = clock;
119 }
120
121
122 void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
123 {
124 Ifx_GTM_TIM_CH_IRQ_EN en;
125 en.U = channel->IRQ_EN.U;
126
127 en.B.GLITCHDET_IRQ_EN = irqOnGlitch ? 1 : 0;
128
129 channel->IRQ_EN.U = en.U;
130 }
131
132
133 void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
134 {
135 Ifx_GTM_TIM_CH_IRQ_EN en;
136 en.U = channel->IRQ_EN.U;
137
138 /* Disable all interrupts of the interrupt set to change mode */
139 channel->IRQ_EN.U = 0;
140 channel->IRQ_MODE.B.IRQ_MODE = mode;
141 channel->IRQ_EN.U = en.U; /* Set the values back */
142 }
143
144
145 void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
146 {
147 Ifx_GTM_TIM_CH_IRQ_EN en;
148 en.U = channel->IRQ_EN.U;
149
150 en.B.TODET_IRQ_EN = irqOnTimeout ? 1 : 0;
151
152 channel->IRQ_EN.U = en.U;
153 }
IfxGtm_Tim_Ch_setTimeoutNotification
void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:145
IfxGtm_Cmu_Tim_Filter_Clk_6
FLT_CNT counts with CMU_CLK6.
Definition: IfxGtm_Cmu.h:81
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Tim_Ch_getFilterClockFrequency
float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:51
IfxGtm_Tim_Ch_getCaptureClockFrequency
float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:35
IfxGtm_Cmu_Tim_Filter_Clk_1
FLT_CNT counts with CMU_CLK1.
Definition: IfxGtm_Cmu.h:80
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:49
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:77
IfxGtm_Cmu_Clk_6
Definition: IfxGtm_Cmu.h:55
IfxGtm_Tim_Ch_setFilterNotification
void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:122
IfxGtm_Tim_Ch_setChannelNotification
void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:103
IfxGtm_Cmu_Tim_Filter_Clk_7
FLT_CNT counts with CMU_CLK7.
Definition: IfxGtm_Cmu.h:82
IfxGtm_Tim_Ch_setNotificationMode
void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:133
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Tim_Ch_getTimeoutClockFrequency
float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:87
IfxGtm_Tim_Ch_getTimeoutClockSource
IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected.
Definition: IfxGtm_Tim.c:97
IfxGtm_Tim_Ch_setClockSource
void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:116
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Tim_Ch_getCaptureClockSource
IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected.
Definition: IfxGtm_Tim.c:45
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Cmu_Clk_1
Definition: IfxGtm_Cmu.h:50
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:79
IfxGtm_Cmu_getClkFrequency
float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
Returns the GTM configurable clock frequency in Hz.
Definition: IfxGtm_Cmu.c:47
IfxGtm_Tim_Ch_getFilterClockSource
IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected.
Definition: IfxGtm_Tim.c:81
IfxGtm_Cmu_Clk_7
Definition: IfxGtm_Cmu.h:56


iLLD_TC26B: IfxGtm_Tim.h Source File

  • Gtm
  • Std
IfxGtm_Tim.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 *
26 * \defgroup IfxLld_Gtm_Std_Tim Tim Basic Functionality
27 * \ingroup IfxLld_Gtm_Std
28 * \defgroup IfxLld_Gtm_Std_Tim_Enumerations TIM Enumerations
29 * \ingroup IfxLld_Gtm_Std_Tim
30 * \defgroup IfxLld_Gtm_Std_Tim_Channel_Functions TIM Channel Functions
31 * \ingroup IfxLld_Gtm_Std_Tim
32 */
33
34 #ifndef IFXGTM_TIM_H
35 #define IFXGTM_TIM_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "_Impl/IfxGtm_cfg.h"
42 #include "Src/Std/IfxSrc.h"
43 #include "IfxGtm.h"
44 #include "IfxGtm_Cmu.h"
45 #include "IfxGtm_bf.h"
46
47 /******************************************************************************/
48 /*--------------------------------Enumerations--------------------------------*/
49 /******************************************************************************/
50
51 /** \addtogroup IfxLld_Gtm_Std_Tim_Enumerations
52 * \{ */
53 typedef enum
54 {
55 IfxGtm_Tim_CntsSel_cntReg = 0,
56 IfxGtm_Tim_CntsSel_tbuTs0
57 } IfxGtm_Tim_CntsSel;
58
59 /** \brief Enum for Filter counter
60 */
61 typedef enum
62 {
63 IfxGtm_Tim_FilterCounter_upDown = 0,
64 IfxGtm_Tim_FilterCounter_hold
65 } IfxGtm_Tim_FilterCounter;
66
67 /** \brief Enum for Filter mode
68 */
69 typedef enum
70 {
71 IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0, /**< \brief Immediate edge Propagation mode */
72 IfxGtm_Tim_FilterMode_individualDeglitchTime /**< \brief Individual deglitch mode */
73 } IfxGtm_Tim_FilterMode;
74
75 typedef enum
76 {
77 IfxGtm_Tim_GprSel_tbuTs0 = 0,
78 IfxGtm_Tim_GprSel_tbuTs1,
79 IfxGtm_Tim_GprSel_tbuTs2,
80 IfxGtm_Tim_GprSel_cnts
81 } IfxGtm_Tim_GprSel;
82
83 typedef enum
84 {
85 IfxGtm_Tim_Input_currentChannel = 0,
86 IfxGtm_Tim_Input_adjacentChannel
87 } IfxGtm_Tim_Input;
88
89 typedef enum
90 {
91 IfxGtm_Tim_Mode_pwmMeasurement = 0, /**< \brief TPWM */
92 IfxGtm_Tim_Mode_pulseIntegration, /**< \brief TPIM */
93 IfxGtm_Tim_Mode_inputEvent, /**< \brief TIEM */
94 IfxGtm_Tim_Mode_inputPrescaler, /**< \brief TIPM */
95 IfxGtm_Tim_Mode_bitCompression /**< \brief TBCM */
96 } IfxGtm_Tim_Mode;
97
98 /** \brief Enum for Timeout control
99 */
100 typedef enum
101 {
102 IfxGtm_Tim_Timeout_disabled, /**< \brief Timeout feature disabled */
103 IfxGtm_Tim_Timeout_risingEdge, /**< \brief Timeout feature enabled for rising edge only */
104 IfxGtm_Tim_Timeout_fallingEdge, /**< \brief Timeout feature enabled for falling edge only */
105 IfxGtm_Tim_Timeout_bothEdge /**< \brief Timeout feature enabled for both edges */
106 } IfxGtm_Tim_Timeout;
107
108 /** \} */
109
110 /** \addtogroup IfxLld_Gtm_Std_Tim_Channel_Functions
111 * \{ */
112
113 /******************************************************************************/
114 /*-------------------------Inline Function Prototypes-------------------------*/
115 /******************************************************************************/
116
117 /** \brief Clears the counter overflow flag
118 * \param channel TIM channel pointer
119 * \return None
120 */
121 IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel);
122
123 /** \brief Clears the data lost flag
124 * \param channel TIM channel pointer
125 * \return None
126 */
127 IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel);
128
129 /** \brief Clears the event counter overflow flag
130 * \param channel TIM channel pointer
131 * \return None
132 */
133 IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel);
134
135 /** \brief Clears the glitch flag
136 * \param channel TIM channel pointer
137 * \return None
138 */
139 IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel);
140
141 /** \brief Clears the new value flag
142 * \param channel TIM channel pointer
143 * \return None
144 */
145 IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel);
146
147 /** \brief Returns a pointer to the TIM channel SRC
148 * \param gtm Pointer to GTM module
149 * \param tim Specifies the tim module no
150 * \param channel Channel index
151 * \return Pointer to the TIM channel SRC
152 */
153 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel);
154
155 /** \brief Test the counter overflow flag
156 * \param channel TIM channel pointer
157 * \return TRUE if the flag is set, else FALSE
158 */
159 IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel);
160
161 /** \brief Test the data lost flag
162 * \param channel TIM channel pointer
163 * \return TRUE if the flag is set, else FALSE
164 */
165 IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel);
166
167 /** \brief Test the event counter overflow flag
168 * \param channel TIM channel pointer
169 * \return TRUE if the flag is set, else FALSE
170 */
171 IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel);
172
173 /** \brief Test the glitch flag
174 * \param channel TIM channel pointer
175 * \return TRUE if the flag is set, else FALSE
176 */
177 IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel);
178
179 /** \brief Test the new value flag
180 * \param channel TIM channel pointer
181 * \return TRUE if the flag is set, else FALSE
182 */
183 IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel);
184
185 /** \brief Returns the pointer to the TIM channel
186 * \param tim Pointer to Tim base
187 * \param channel TIM channel
188 * \return Pointer to TIM channel base
189 */
190 IFX_INLINE Ifx_GTM_TIM_CH *IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel);
191
192 /** \brief Reset the specified TIM channel
193 * \param tim Pointer to GTM TIM instance
194 * \param channel Channel index
195 * \return None
196 */
197 IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel);
198
199 /******************************************************************************/
200 /*-------------------------Global Function Prototypes-------------------------*/
201 /******************************************************************************/
202
203 /** \brief Returns the Capture Clock Frequency
204 * \param gtm Pointer to GTM module
205 * \param channel Pointer to TIM channel base
206 * \return Capture clock frequency
207 */
208 IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
209
210 /** \brief Returns the capture clock source selected
211 * \param channel TIM channel pointer
212 * \return capture clock source
213 */
214 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel);
215
216 /** \brief Returns the Filter Clock Frequency
217 * \param gtm Pointer to GTM module
218 * \param channel Pointer to TIM channel base
219 * \return Filter clock frequency
220 */
221 IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
222
223 /** \brief Returns the Filter clock source selected
224 * \param channel TIM channel pointer
225 * \return Filter clock source
226 */
227 IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel);
228
229 /** \brief Returns the Timeout Clock Frequency
230 * \param gtm Pointer to GTM module
231 * \param channel Pointer to TIM channel base
232 * \return Timeout clock frequency
233 */
234 IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
235
236 /** \brief Returns the Timeout clock source selected
237 * \param channel TIM channel pointer
238 * \return Timeout clock source
239 */
240 IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel);
241
242 /** \brief Set the channel notification
243 * \param channel TIM channel pointer
244 * \param irqOnNewVal If TRUE, the interrupt on new value is enabled
245 * \param irqOnCntOverflow If TRUE, the interrupt on CNT overflow is enabled
246 * \param irqOnEcntOverflow If TRUE, the interrupt on ECNT overflow is enabled
247 * \param irqOnDatalost If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled
248 * \return None
249 */
250 IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost);
251
252 /** \brief Set the channel clock source
253 * \param channel TIM channel pointer
254 * \param clock Selected clock
255 * \return None
256 */
257 IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock);
258
259 /** \brief Set the filter notification
260 * \param channel TIM channel pointer
261 * \param irqOnGlitch If TRUE, the interrupt on glitch is enabled
262 * \return None
263 */
264 IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch);
265
266 /** \brief This function configures the TIM channel IRQ mode
267 * \param channel TIM channel pointer
268 * \param mode Notification Mode
269 * \return None
270 */
271 IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode);
272
273 /** \brief Set the timeout notification
274 * \param channel TIM channel pointer
275 * \param irqOnTimeout If TRUE, the interrupt on timeout is enabled
276 * \return None
277 */
278 IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout);
279
280 /** \} */
281
282 /******************************************************************************/
283 /*---------------------Inline Function Implementations------------------------*/
284 /******************************************************************************/
285
286 IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
287 {
288 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_CNTOFL_OFF;
289 }
290
291
292 IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
293 {
294 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_GPROFL_OFF;
295 }
296
297
298 IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
299 {
300 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_ECNTOFL_OFF;
301 }
302
303
304 IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
305 {
306 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_GLITCHDET_OFF;
307 }
308
309
310 IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
311 {
312 channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_NEWVAL_OFF;
313 }
314
315
316 IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
317 {
318 IFX_UNUSED_PARAMETER(gtm)
319 return &MODULE_SRC.GTM.GTM[0].TIM[tim][channel];
320 }
321
322
323 IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
324 {
325 return channel->IRQ_NOTIFY.B.CNTOFL == 1;
326 }
327
328
329 IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
330 {
331 return channel->IRQ_NOTIFY.B.GPROFL == 1;
332 }
333
334
335 IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
336 {
337 return channel->IRQ_NOTIFY.B.ECNTOFL == 1;
338 }
339
340
341 IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
342 {
343 return channel->IRQ_NOTIFY.B.GLITCHDET == 1;
344 }
345
346
347 IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
348 {
349 return channel->IRQ_NOTIFY.B.NEWVAL == 1;
350 }
351
352
353 IFX_INLINE Ifx_GTM_TIM_CH *IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
354 {
355 return (Ifx_GTM_TIM_CH *)((uint32)&tim->CH0.GPR0.U + ((uint32)&tim->CH1 - (uint32)&tim->CH0) * channel);
356 }
357
358
359 IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
360 {
361 tim->RST.U |= (uint32)1 << (uint32)channel;
362 }
363
364
365 #endif /* IFXGTM_TIM_H */
IfxGtm_Tim_GprSel_tbuTs2
Definition: IfxGtm_Tim.h:79
IfxGtm_Tim_Timeout_risingEdge
Timeout feature enabled for rising edge only.
Definition: IfxGtm_Tim.h:103
IfxGtm_Tim_Timeout_bothEdge
Timeout feature enabled for both edges.
Definition: IfxGtm_Tim.h:105
IfxGtm_Tim_Mode_inputEvent
TIEM.
Definition: IfxGtm_Tim.h:93
IfxGtm_Tim_Input_currentChannel
Definition: IfxGtm_Tim.h:85
IfxGtm_Tim_GprSel_tbuTs0
Definition: IfxGtm_Tim.h:77
IfxGtm_Tim_Ch_setTimeoutNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:145
IfxGtm_Tim_Timeout_disabled
Timeout feature disabled.
Definition: IfxGtm_Tim.h:102
IfxGtm_Tim_Timeout
IfxGtm_Tim_Timeout
Enum for Timeout control.
Definition: IfxGtm_Tim.h:100
IfxGtm_Tim_Ch_isNewValueEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
Test the new value flag.
Definition: IfxGtm_Tim.h:347
IfxGtm_Tim_Mode_inputPrescaler
TIPM.
Definition: IfxGtm_Tim.h:94
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Tim_Ch_getFilterClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:51
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxSrc.h
SRC basic functionality.
IfxGtm_Tim_GprSel
IfxGtm_Tim_GprSel
Definition: IfxGtm_Tim.h:75
IfxGtm_Tim_GprSel_tbuTs1
Definition: IfxGtm_Tim.h:78
IfxGtm_Tim_FilterCounter
IfxGtm_Tim_FilterCounter
Enum for Filter counter.
Definition: IfxGtm_Tim.h:61
IfxGtm_Tim_Ch_getCaptureClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:35
IfxGtm_Tim_Ch_isDataLostEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
Test the data lost flag.
Definition: IfxGtm_Tim.h:329
IfxGtm_Tim_GprSel_cnts
Definition: IfxGtm_Tim.h:80
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:55
IfxGtm_Tim_FilterMode_immediateEdgePropagation
Immediate edge Propagation mode.
Definition: IfxGtm_Tim.h:71
IfxGtm_Tim_Ch_isGlitchEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
Test the glitch flag.
Definition: IfxGtm_Tim.h:341
IfxGtm_Tim_FilterCounter_hold
Definition: IfxGtm_Tim.h:64
IfxGtm_Tim_CntsSel_tbuTs0
Definition: IfxGtm_Tim.h:56
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Tim_FilterMode
IfxGtm_Tim_FilterMode
Enum for Filter mode.
Definition: IfxGtm_Tim.h:69
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:77
IfxGtm_Tim_FilterMode_individualDeglitchTime
Individual deglitch mode.
Definition: IfxGtm_Tim.h:72
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxGtm_Tim_Ch_setFilterNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:122
IfxGtm_Tim_Ch_setChannelNotification
IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:103
IfxGtm_Tim_Ch_setNotificationMode
IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:133
IfxGtm_Tim_Ch_resetChannel
IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Reset the specified TIM channel.
Definition: IfxGtm_Tim.h:359
IfxGtm_Tim_Mode_pulseIntegration
TPIM.
Definition: IfxGtm_Tim.h:92
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Tim_Ch_isEcntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag.
Definition: IfxGtm_Tim.h:335
IfxGtm_Tim_Ch_clearEcntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag.
Definition: IfxGtm_Tim.h:298
IfxGtm_Tim_Mode
IfxGtm_Tim_Mode
Definition: IfxGtm_Tim.h:89
IfxGtm_Tim_Ch_getTimeoutClockFrequency
IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:87
IfxGtm_Tim_Ch_clearDataLostEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
Clears the data lost flag.
Definition: IfxGtm_Tim.h:292
IfxGtm_Tim_Ch_getTimeoutClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Timeout clock source selected.
Definition: IfxGtm_Tim.c:97
IfxGtm_Tim_Ch_setClockSource
IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:116
IfxGtm_Tim_Ch_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC.
Definition: IfxGtm_Tim.h:316
IfxGtm_Tim_Ch_isCntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag.
Definition: IfxGtm_Tim.h:323
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Tim_CntsSel
IfxGtm_Tim_CntsSel
Definition: IfxGtm_Tim.h:53
IfxGtm_Tim_Ch_clearGlitchEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
Clears the glitch flag.
Definition: IfxGtm_Tim.h:304
IfxGtm_Tim_Ch_clearCntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag.
Definition: IfxGtm_Tim.h:286
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxGtm_Tim_Input_adjacentChannel
Definition: IfxGtm_Tim.h:86
IfxGtm_Tim_Ch_getCaptureClockSource
IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
Returns the capture clock source selected.
Definition: IfxGtm_Tim.c:45
IfxGtm_Tim_Input
IfxGtm_Tim_Input
Definition: IfxGtm_Tim.h:83
IfxGtm_Tim_FilterCounter_upDown
Definition: IfxGtm_Tim.h:63
IfxGtm_Tim_Mode_pwmMeasurement
TPWM.
Definition: IfxGtm_Tim.h:91
IfxGtm_Tim_Ch_clearNewValueEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
Clears the new value flag.
Definition: IfxGtm_Tim.h:310
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:353
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxGtm.h
GTM basic functionality.
IfxGtm_Tim_Mode_bitCompression
TBCM.
Definition: IfxGtm_Tim.h:95
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Tim_Timeout_fallingEdge
Timeout feature enabled for falling edge only.
Definition: IfxGtm_Tim.h:104
IfxGtm_Tim_Ch_getFilterClockSource
IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
Returns the Filter clock source selected.
Definition: IfxGtm_Tim.c:81


iLLD_TC26B: IfxGtm_Tim_In.c Source File

  • Gtm
  • Tim
  • In
IfxGtm_Tim_In.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim_In.c
3 * \brief GTM IN details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Tim_In.h"
30 #include "IfxGtm_bf.h"
31 #include "string.h"
32
33 /******************************************************************************/
34 /*-------------------------Function Implementations---------------------------*/
35 /******************************************************************************/
36
37 boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
38 {
39 boolean result = TRUE;
40 Ifx_GTM_TIM_CH *channel;
41
42 IfxGtm_Tim_Ch channelIndex;
43 IfxGtm_Tim timIndex;
44 IfxGtm_Tim_In_Input input;
45
46 if (config->filter.inputPin != NULL_PTR)
47 {
48 channelIndex = config->filter.inputPin->channel;
49 timIndex = config->filter.inputPin->tim;
50
51 input = IfxGtm_Tim_In_Input_currentChannel;
52 }
53 else
54 {
55 channelIndex = config->channelIndex;
56 timIndex = config->timIndex;
57 input = config->filter.input;
58 }
59
60 channel = IfxGtm_Tim_getChannel(&config->gtm->TIM[timIndex], channelIndex);
61 driver->timIndex = config->timIndex;
62 driver->channelIndex = config->channelIndex;
63 driver->channel = channel;
64 driver->periodTick = 0;
65 driver->pulseLengthTick = 0;
66 driver->dataCoherent = FALSE;
67 driver->newData = FALSE;
68 driver->dataLost = FALSE;
69 driver->overflowCnt = FALSE;
70 driver->edgeCounterUpper = 0;
71
72 channel->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_pwmMeasurement;
73
74 IfxGtm_Tim_Ch_setClockSource(channel, config->capture.clock);
75
76 driver->captureClockFrequency = IfxGtm_Tim_Ch_getCaptureClockFrequency(config->gtm, channel);
77
78 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->capture.mode == Ifx_Pwm_Mode_leftAligned) || (config->capture.mode == Ifx_Pwm_Mode_rightAligned));
79
80 result &= (config->capture.mode == Ifx_Pwm_Mode_leftAligned) || (config->capture.mode == Ifx_Pwm_Mode_rightAligned);
81 channel->CTRL.B.DSL = config->capture.mode == Ifx_Pwm_Mode_leftAligned ? 1 : 0;
82
83 channel->CTRL.B.CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg;
84 channel->CTRL.B.GPR0_SEL = IfxGtm_Tim_GprSel_cnts; /* Use CNTS as input for GPR0 */
85 channel->CTRL.B.GPR1_SEL = IfxGtm_Tim_GprSel_cnts; /* Use CNT as input for GPR1 */
86
87 /* Interrupt configuration */
88 if (config->isrPriority)
89 {
90 volatile Ifx_SRC_SRCR *src;
91 IfxGtm_Tim_Ch_setNotificationMode(channel, config->irqMode);
92 IfxGtm_Tim_Ch_setChannelNotification(channel, config->capture.irqOnNewVal,
93 config->capture.irqOnCntOverflow, config->capture.irqOnEcntOverflow, config->capture.irqOnDatalost);
94
95 src = IfxGtm_Tim_Ch_getSrcPointer(config->gtm, timIndex, channelIndex);
96 IfxSrc_init(src, config->isrProvider, config->isrPriority);
97 IfxSrc_enable(src);
98 }
99
100 /* Timeout configuration */
101 if (config->timeout.timeout > 0)
102 {
103 float32 clockFrequency;
104 sint32 timeout;
105 channel->TDUV.B.TCS = config->timeout.clock;
106 clockFrequency = IfxGtm_Tim_Ch_getTimeoutClockFrequency(config->gtm, channel);
107
108 timeout = (uint32)(config->timeout.timeout * clockFrequency) - 1;
109
110 if (timeout < 0)
111 {
112 timeout = 0;
113 }
114 else if (timeout >= (1 << IFX_GTM_TIM_CH_TDUV_TCS_MSK))
115 {
116 timeout = IFX_GTM_TIM_CH_TDUV_TCS_MSK;
117 result = FALSE;
118 }
119
120 channel->CTRL.B.TOCTRL = config->capture.mode == Ifx_Pwm_Mode_leftAligned ? IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim_Timeout_fallingEdge;
121 channel->TDUV.B.TOV = timeout;
122
123 IfxGtm_Tim_Ch_setTimeoutNotification(channel, config->timeout.irqOnTimeout);
124 }
125
126 /* Input configuration */
127
128 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_MODE_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_MODE_1_OFF - IFX_GTM_TIM_IN_SRC_MODE_0_OFF)); // MODE 0
129
130 switch (input)
131 {
132 case IfxGtm_Tim_In_Input_currentChannel:
133 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 0
134 channel->CTRL.B.CICTRL = IfxGtm_Tim_Input_currentChannel;
135 break;
136 case IfxGtm_Tim_In_Input_adjacentChannel:
137 config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 0
138 channel->CTRL.B.CICTRL = IfxGtm_Tim_Input_adjacentChannel;
139 break;
140 case IfxGtm_Tim_In_Input_aux:
141 config->gtm->TIM[timIndex].IN_SRC.U = 2 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 1
142 break;
143 }
144
145 if (config->filter.inputPin != NULL_PTR)
146 {
147 IfxGtm_PinMap_setTimTin(config->filter.inputPin, config->filter.inputPinMode);
148 }
149
150 /*Filter configuration */
151 if ((config->filter.fallingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
152 || (config->filter.risingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none))
153 {
154 float32 clockFrequency;
155 sint32 fallingfilterTime;
156 sint32 risingfilterTime;
157
158 channel->CTRL.B.FLT_EN = 1;
159 channel->CTRL.B.FLT_CNT_FRQ = config->filter.clock;
160
161 clockFrequency = IfxGtm_Tim_Ch_getFilterClockFrequency(config->gtm, channel);
162
163 fallingfilterTime = (uint32)(config->filter.fallingEdgeFilterTime * clockFrequency) - 1;
164
165 if (fallingfilterTime < 0)
166 {
167 fallingfilterTime = 0;
168 }
169 else if (fallingfilterTime > (sint32)IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK)
170 {
171 fallingfilterTime = IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK;
172 result = FALSE;
173 }
174
175 channel->FLT_FE.B.FLT_FE = fallingfilterTime;
176
177 risingfilterTime = (uint32)(config->filter.risingEdgeFilterTime * clockFrequency) - 1;
178
179 if (risingfilterTime < 0)
180 {
181 risingfilterTime = 0;
182 }
183 else if (risingfilterTime > (sint32)IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK)
184 {
185 risingfilterTime = IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK;
186 result = FALSE;
187 }
188
189 channel->FLT_RE.B.FLT_RE = risingfilterTime;
190
191 if (config->filter.fallingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
192 {
193 if (config->filter.fallingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation)
194 {
195 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
196 }
197 else
198 {
199 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_individualDeglitchTime;
200 channel->CTRL.B.FLT_CTR_FE = config->filter.fallingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown ? IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim_FilterCounter_hold;
201 }
202 }
203 else
204 {
205 channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
206 channel->FLT_FE.B.FLT_FE = 0;
207 }
208
209 if (config->filter.risingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
210 {
211 if (config->filter.risingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation)
212 {
213 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
214 }
215 else
216 {
217 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_individualDeglitchTime;
218 channel->CTRL.B.FLT_CTR_RE = config->filter.risingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown ? IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim_FilterCounter_hold;
219 }
220 }
221 else
222 {
223 channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
224 channel->FLT_RE.B.FLT_RE = 0;
225 }
226
227 IfxGtm_Tim_Ch_setFilterNotification(channel, config->filter.irqOnGlitch);
228 }
229
230 /* Enable TIM channel */
231 channel->CTRL.B.TIM_EN = 1;
232
233 return result;
234 }
235
236
237 void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
238 {
239 memset(config, 0, sizeof(IfxGtm_Tim_In_Config));
240
241 config->gtm = gtm;
242 config->timIndex = IfxGtm_Tim_0;
243 config->channelIndex = IfxGtm_Tim_Ch_0;
244 config->irqMode = IfxGtm_IrqMode_pulseNotify;
245 config->isrProvider = IfxSrc_Tos_cpu0;
246 config->isrPriority = 0;
247 config->capture.irqOnNewVal = FALSE;
248 config->capture.irqOnCntOverflow = FALSE;
249 config->capture.irqOnEcntOverflow = FALSE;
250 config->capture.irqOnDatalost = FALSE;
251 config->capture.clock = IfxGtm_Cmu_Clk_0;
252 config->capture.mode = Ifx_Pwm_Mode_leftAligned;
253 config->timeout.irqOnTimeout = FALSE;
254 config->timeout.clock = IfxGtm_Cmu_Clk_0;
255 config->timeout.timeout = 0.0;
256 config->filter.input = IfxGtm_Tim_In_Input_currentChannel;
257 config->filter.inputPin = NULL_PTR;
258 config->filter.inputPinMode = IfxPort_InputMode_noPullDevice;
259 config->filter.risingEdgeMode = IfxGtm_Tim_In_ConfigFilterMode_none;
260 config->filter.fallingEdgeMode = IfxGtm_Tim_In_ConfigFilterMode_none;
261 config->filter.risingEdgeFilterTime = 0;
262 config->filter.fallingEdgeFilterTime = 0;
263 config->filter.clock = IfxGtm_Cmu_Tim_Filter_Clk_0;
264 }
265
266
267 void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
268 {
269 IfxGtm_Tim_In_update(driver);
270 }
271
272
273 void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
274 {
275 driver->dataLost = IfxGtm_Tim_Ch_isDataLostEvent(driver->channel);
276
277 if (driver->dataLost)
278 {
279 IfxGtm_Tim_Ch_clearDataLostEvent(driver->channel);
280 }
281
282 driver->glitch = IfxGtm_Tim_Ch_isGlitchEvent(driver->channel);
283
284 if (driver->glitch)
285 {
286 IfxGtm_Tim_Ch_clearGlitchEvent(driver->channel);
287 }
288
289 driver->newData = IfxGtm_Tim_Ch_isNewValueEvent(driver->channel);
290
291 if (driver->newData)
292 {
293 Ifx_GTM_TIM_CH_GPR0 gpr0;
294 Ifx_GTM_TIM_CH_GPR1 gpr1;
295
296 gpr0.U = driver->channel->GPR0.U;
297 gpr1.U = driver->channel->GPR1.U;
298 driver->periodTick = gpr1.B.GPR1;
299 driver->pulseLengthTick = gpr0.B.GPR0;
300 driver->dataCoherent = gpr0.B.ECNT == gpr1.B.ECNT;
301
302 // read the edge counter
303 driver->edgeCount = driver->channel->ECNT.B.ECNT;
304
305 if (IfxGtm_Tim_Ch_isEcntOverflowEvent(driver->channel))
306 {
307 driver->edgeCounterUpper++;
308 IfxGtm_Tim_Ch_clearEcntOverflowEvent(driver->channel);
309 }
310
311 driver->overflowCnt = IfxGtm_Tim_Ch_isCntOverflowEvent(driver->channel);
312
313 if (driver->overflowCnt)
314 {
315 driver->newData = FALSE;
316 IfxGtm_Tim_Ch_clearCntOverflowEvent(driver->channel);
317 }
318
319 IfxGtm_Tim_Ch_clearNewValueEvent(driver->channel);
320 }
321 }
IfxGtm_Tim_In::pulseLengthTick
uint32 pulseLengthTick
Duty value in clock ticks.
Definition: IfxGtm_Tim_In.h:126
IfxGtm_Tim_In_ConfigCapture::mode
Ifx_Pwm_Mode mode
PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.
Definition: IfxGtm_Tim_In.h:89
IfxGtm_Tim_In::dataCoherent
boolean dataCoherent
TRUE, if the duty and period values are measured from the same period.
Definition: IfxGtm_Tim_In.h:127
IfxGtm_Tim_Timeout_risingEdge
Timeout feature enabled for rising edge only.
Definition: IfxGtm_Tim.h:103
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:237
IfxGtm_PinMap_setTimTin
void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
Definition: IfxGtm_PinMap.c:689
IfxGtm_Tim_In::newData
boolean newData
TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
Definition: IfxGtm_Tim_In.h:129
IfxGtm_Tim_In_Config
Configuration structure for TIM input capture.
Definition: IfxGtm_Tim_In.h:141
IfxGtm_Tim_Input_currentChannel
Definition: IfxGtm_Tim.h:85
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxGtm_Tim_In_ConfigCapture::irqOnDatalost
boolean irqOnDatalost
If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
Definition: IfxGtm_Tim_In.h:87
IfxGtm_Tim_In_Input_adjacentChannel
Use the input from the adjacent channel.
Definition: IfxGtm_Tim_In.h:68
IfxGtm_Tim_In_ConfigFilter::clock
IfxGtm_Cmu_Tim_Filter_Clk clock
Timeout clock.
Definition: IfxGtm_Tim_In.h:96
IfxGtm_Tim_In::edgeCount
uint16 edgeCount
number of edges counted.
Definition: IfxGtm_Tim_In.h:136
IfxGtm_Tim_Ch_setTimeoutNotification
void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
Set the timeout notification.
Definition: IfxGtm_Tim.c:145
IfxGtm_Tim_In_ConfigFilter::fallingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode
Filter mode for falling edge.
Definition: IfxGtm_Tim_In.h:98
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:246
IfxGtm_Tim_Ch_isNewValueEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
Test the new value flag.
Definition: IfxGtm_Tim.h:347
IfxGtm_Tim_In_Config::gtm
Ifx_GTM * gtm
GTM used.
Definition: IfxGtm_Tim_In.h:143
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxGtm_Tim_In_ConfigTimeout::irqOnTimeout
boolean irqOnTimeout
If TRUE, the interrupt on timeout is enabled.
Definition: IfxGtm_Tim_In.h:113
IfxGtm_Tim_In_Config::capture
IfxGtm_Tim_In_ConfigCapture capture
Capture configuration.
Definition: IfxGtm_Tim_In.h:149
IfxGtm_Tim_In_ConfigFilter::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second.
Definition: IfxGtm_Tim_In.h:100
IfxGtm_Tim_Ch_getFilterClockFrequency
float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Filter Clock Frequency.
Definition: IfxGtm_Tim.c:51
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxGtm_Tim_In_Input_aux
Use the input from the aux.
Definition: IfxGtm_Tim_In.h:69
IfxGtm_Tim_In_Input_currentChannel
Use the input from the current channel.
Definition: IfxGtm_Tim_In.h:67
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxGtm_Tim_Ch_getCaptureClockFrequency
float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Capture Clock Frequency.
Definition: IfxGtm_Tim.c:35
IfxGtm_Tim_Ch_isDataLostEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
Test the data lost flag.
Definition: IfxGtm_Tim.h:329
IfxGtm_Tim_GprSel_cnts
Definition: IfxGtm_Tim.h:80
IfxGtm_Tim_TinMap::tim
IfxGtm_Tim tim
TIM unit index.
Definition: IfxGtm_PinMap.h:78
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Tim_CntsSel_cntReg
Definition: IfxGtm_Tim.h:55
IfxGtm_Tim_In_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxGtm_Tim_In.h:147
IfxGtm_Tim_In_Config::timIndex
IfxGtm_Tim timIndex
TIM index.
Definition: IfxGtm_Tim_In.h:144
IfxGtm_Tim_FilterMode_immediateEdgePropagation
Immediate edge Propagation mode.
Definition: IfxGtm_Tim.h:71
IfxGtm_Tim_Ch_isGlitchEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
Test the glitch flag.
Definition: IfxGtm_Tim.h:341
IfxGtm_Cmu_Clk_0
Definition: IfxGtm_Cmu.h:49
IfxGtm_Tim_In::glitch
boolean glitch
TRUE if glitch is detected.
Definition: IfxGtm_Tim_In.h:132
IfxGtm_Tim_FilterCounter_hold
Definition: IfxGtm_Tim.h:64
IfxGtm_Tim_In_ConfigFilter::input
IfxGtm_Tim_In_Input input
selected input
Definition: IfxGtm_Tim_In.h:102
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:162
IfxGtm_Tim_In_ConfigFilter::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second.
Definition: IfxGtm_Tim_In.h:99
IfxGtm_Tim_FilterMode_individualDeglitchTime
Individual deglitch mode.
Definition: IfxGtm_Tim.h:72
IfxGtm_Tim_Ch_setFilterNotification
void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
Set the filter notification.
Definition: IfxGtm_Tim.c:122
IfxGtm_Tim_Ch_setChannelNotification
void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
Set the channel notification.
Definition: IfxGtm_Tim.c:103
IfxGtm_Tim_In::overflowCnt
boolean overflowCnt
TRUE if the last measurement show an overflow in CNT.
Definition: IfxGtm_Tim_In.h:128
IfxGtm_Tim_In_ConfigFilter::inputPin
IfxGtm_Tim_TinMap * inputPin
If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
Definition: IfxGtm_Tim_In.h:103
IfxGtm_Tim_Ch_setNotificationMode
void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
This function configures the TIM channel IRQ mode.
Definition: IfxGtm_Tim.c:133
IfxGtm_Tim_In_ConfigCapture::irqOnCntOverflow
boolean irqOnCntOverflow
If TRUE, the interrupt on CNT overflow is enabled.
Definition: IfxGtm_Tim_In.h:85
IfxGtm_Tim_In_ConfigCapture::irqOnNewVal
boolean irqOnNewVal
If TRUE, the interrupt on new value is enabled.
Definition: IfxGtm_Tim_In.h:84
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:66
IfxGtm_Tim_In_ConfigTimeout::timeout
float32 timeout
Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (T...
Definition: IfxGtm_Tim_In.h:112
IfxGtm_Tim_Ch_isEcntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the event counter overflow flag.
Definition: IfxGtm_Tim.h:335
IfxGtm_Tim_In
Driver Handle.
Definition: IfxGtm_Tim_In.h:122
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxGtm_Tim_In_Config::filter
IfxGtm_Tim_In_ConfigFilter filter
Filter configuration.
Definition: IfxGtm_Tim_In.h:150
IfxGtm_Tim_In_update
void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
Updates the period and duty cycle.
Definition: IfxGtm_Tim_In.c:273
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:163
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation
Immediate edge propagation mode.
Definition: IfxGtm_Tim_In.h:57
IfxGtm_Tim_In::dataLost
boolean dataLost
TRUE if data are lost.
Definition: IfxGtm_Tim_In.h:130
IfxGtm_Tim_In_ConfigCapture::irqOnEcntOverflow
boolean irqOnEcntOverflow
If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
Definition: IfxGtm_Tim_In.h:86
IfxGtm_Tim_Ch_clearEcntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the event counter overflow flag.
Definition: IfxGtm_Tim.h:298
IfxGtm_Tim_Ch_getTimeoutClockFrequency
float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
Returns the Timeout Clock Frequency.
Definition: IfxGtm_Tim.c:87
IfxGtm_Tim_In::periodTick
uint32 periodTick
Period value in clock ticks.
Definition: IfxGtm_Tim_In.h:125
IfxGtm_Tim_In_ConfigFilter::risingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode
Filter mode for rising edge.
Definition: IfxGtm_Tim_In.h:97
IfxGtm_Tim_TinMap::channel
IfxGtm_Tim_Ch channel
TIM channel index.
Definition: IfxGtm_PinMap.h:79
IfxGtm_Tim_In_init
boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object.
Definition: IfxGtm_Tim_In.c:37
IfxGtm_Tim_In::captureClockFrequency
float32 captureClockFrequency
Capture clock frequency in Hz.
Definition: IfxGtm_Tim_In.h:133
IfxGtm_Tim_In_Input
IfxGtm_Tim_In_Input
Input Source.
Definition: IfxGtm_Tim_In.h:65
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:51
IfxGtm_Tim_In_initConfig
void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tim_In.c:237
IfxGtm_Tim_In_Config::irqMode
IfxGtm_IrqMode irqMode
Interrupt mode for the new value available.
Definition: IfxGtm_Tim_In.h:146
IfxGtm_Tim_Ch_clearDataLostEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
Clears the data lost flag.
Definition: IfxGtm_Tim.h:292
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown
Individual deglitch time mode (Up Down)
Definition: IfxGtm_Tim_In.h:58
IfxGtm_Tim_Ch_setClockSource
void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
Set the channel clock source.
Definition: IfxGtm_Tim.c:116
IfxGtm_Tim_In_Config::isrPriority
Ifx_Priority isrPriority
Set the interrupt priority for new value available. If 0, no interrupt will be generated.
Definition: IfxGtm_Tim_In.h:148
IfxGtm_Tim_In::edgeCounterUpper
uint32 edgeCounterUpper
upper part of the edge counter
Definition: IfxGtm_Tim_In.h:131
IfxGtm_Tim_In_Config::timeout
IfxGtm_Tim_In_ConfigTimeout timeout
Timeout configuration.
Definition: IfxGtm_Tim_In.h:151
sint32
long sint32
Definition: Platform_Types.h:131
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxGtm_Tim_In_ConfigFilter::inputPinMode
IfxPort_InputMode inputPinMode
Input pin mode.
Definition: IfxGtm_Tim_In.h:104
IfxGtm_Tim_Ch_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
Returns a pointer to the TIM channel SRC.
Definition: IfxGtm_Tim.h:316
IfxGtm_Tim_In_ConfigCapture::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Tim_In.h:88
IfxGtm_Tim_In_onIsr
void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
will update the driver state To be called in the interrupt generated by the IfxGtm_Tim_In driver ...
Definition: IfxGtm_Tim_In.c:267
IfxGtm_Tim_Ch_isCntOverflowEvent
IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Test the counter overflow flag.
Definition: IfxGtm_Tim.h:323
IfxGtm_Tim_In::channel
Ifx_GTM_TIM_CH * channel
TIM channel used.
Definition: IfxGtm_Tim_In.h:124
IfxGtm_Tim_Ch_clearGlitchEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
Clears the glitch flag.
Definition: IfxGtm_Tim.h:304
IfxGtm_Tim_Ch_clearCntOverflowEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
Clears the counter overflow flag.
Definition: IfxGtm_Tim.h:286
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxGtm_Tim_Input_adjacentChannel
Definition: IfxGtm_Tim.h:86
IfxGtm_Tim_In_ConfigFilter::irqOnGlitch
boolean irqOnGlitch
If TRUE, the interrupt on glitch is enabled.
Definition: IfxGtm_Tim_In.h:101
IfxGtm_Tim_FilterCounter_upDown
Definition: IfxGtm_Tim.h:63
IfxGtm_Tim_Mode_pwmMeasurement
TPWM.
Definition: IfxGtm_Tim.h:91
IfxGtm_Tim_Ch_clearNewValueEvent
IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
Clears the new value flag.
Definition: IfxGtm_Tim.h:310
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Tim_getChannel
IFX_INLINE Ifx_GTM_TIM_CH * IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
Returns the pointer to the TIM channel.
Definition: IfxGtm_Tim.h:353
IfxGtm_Tim_In.h
GTM IN details.
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxGtm_Tim_In_ConfigFilterMode_none
No filter.
Definition: IfxGtm_Tim_In.h:60
IfxGtm_Cmu_Tim_Filter_Clk_0
FLT_CNT counts with CMU_CLK0.
Definition: IfxGtm_Cmu.h:79
IfxGtm_Tim_Timeout_fallingEdge
Timeout feature enabled for falling edge only.
Definition: IfxGtm_Tim.h:104
IfxGtm_Tim_In_Config::channelIndex
IfxGtm_Tim_Ch channelIndex
Channel index.
Definition: IfxGtm_Tim_In.h:145


iLLD_TC26B: IfxGtm_Tim_In.h Source File

  • Gtm
  • Tim
  • In
IfxGtm_Tim_In.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tim_In.h
3 * \brief GTM IN details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Tim_In TIM Input Interface
25 * \ingroup IfxLld_Gtm_Tim
26 * \defgroup IfxLld_Gtm_Tim_In_DataStructures Data Structures
27 * \ingroup IfxLld_Gtm_Tim_In
28 * \defgroup IfxLld_Gtm_Tim_In_Enumerations Enumerations
29 * \ingroup IfxLld_Gtm_Tim_In
30 * \defgroup IfxLld_Gtm_Tim_In_Funtions Funtions
31 * \ingroup IfxLld_Gtm_Tim_In
32 */
33
34 #ifndef IFXGTM_TIM_IN_H
35 #define IFXGTM_TIM_IN_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "_PinMap/IfxGtm_PinMap.h"
42 #include "Gtm/Std/IfxGtm_Tim.h"
43 #include "Gtm/Std/IfxGtm_Cmu.h"
44 #include "Cpu/Std/IfxCpu.h"
45 #include "_Utilities/Ifx_Assert.h"
46
47 /******************************************************************************/
48 /*--------------------------------Enumerations--------------------------------*/
49 /******************************************************************************/
50
51 /** \addtogroup IfxLld_Gtm_Tim_In_Enumerations
52 * \{ */
53 /** \brief Config Filter Mode
54 */
55 typedef enum
56 {
57 IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation, /**< \brief Immediate edge propagation mode */
58 IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown, /**< \brief Individual deglitch time mode (Up Down) */
59 IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold, /**< \brief Individual deglitch time mode (Hold) */
60 IfxGtm_Tim_In_ConfigFilterMode_none /**< \brief No filter */
61 } IfxGtm_Tim_In_ConfigFilterMode;
62
63 /** \brief Input Source
64 */
65 typedef enum
66 {
67 IfxGtm_Tim_In_Input_currentChannel, /**< \brief Use the input from the current channel */
68 IfxGtm_Tim_In_Input_adjacentChannel, /**< \brief Use the input from the adjacent channel */
69 IfxGtm_Tim_In_Input_aux /**< \brief Use the input from the aux */
70 } IfxGtm_Tim_In_Input;
71
72 /** \} */
73
74 /******************************************************************************/
75 /*-----------------------------Data Structures--------------------------------*/
76 /******************************************************************************/
77
78 /** \addtogroup IfxLld_Gtm_Tim_In_DataStructures
79 * \{ */
80 /** \brief Configuration structure for TIM capture
81 */
82 typedef struct
83 {
84 boolean irqOnNewVal; /**< \brief If TRUE, the interrupt on new value is enabled */
85 boolean irqOnCntOverflow; /**< \brief If TRUE, the interrupt on CNT overflow is enabled */
86 boolean irqOnEcntOverflow; /**< \brief If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled */
87 boolean irqOnDatalost; /**< \brief If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled */
88 IfxGtm_Cmu_Clk clock; /**< \brief Timer input clock */
89 Ifx_Pwm_Mode mode; /**< \brief PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported */
90 } IfxGtm_Tim_In_ConfigCapture;
91
92 /** \brief Configuration structure for TIM filter
93 */
94 typedef struct
95 {
96 IfxGtm_Cmu_Tim_Filter_Clk clock; /**< \brief Timeout clock */
97 IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode; /**< \brief Filter mode for rising edge */
98 IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode; /**< \brief Filter mode for falling edge */
99 float32 risingEdgeFilterTime; /**< \brief Rising edge filter time in second */
100 float32 fallingEdgeFilterTime; /**< \brief Falling edge filter time in second */
101 boolean irqOnGlitch; /**< \brief If TRUE, the interrupt on glitch is enabled */
102 IfxGtm_Tim_In_Input input; /**< \brief selected input */
103 IfxGtm_Tim_TinMap *inputPin; /**< \brief If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex */
104 IfxPort_InputMode inputPinMode; /**< \brief Input pin mode */
105 } IfxGtm_Tim_In_ConfigFilter;
106
107 /** \brief Configuration structure for TIM timeout
108 */
109 typedef struct
110 {
111 IfxGtm_Cmu_Clk clock; /**< \brief Timeout clock */
112 float32 timeout; /**< \brief Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (TDU) */
113 boolean irqOnTimeout; /**< \brief If TRUE, the interrupt on timeout is enabled */
114 } IfxGtm_Tim_In_ConfigTimeout;
115
116 /** \} */
117
118 /** \addtogroup IfxLld_Gtm_Tim_In_DataStructures
119 * \{ */
120 /** \brief Driver Handle
121 */
122 typedef struct
123 {
124 Ifx_GTM_TIM_CH *channel; /**< \brief TIM channel used */
125 uint32 periodTick; /**< \brief Period value in clock ticks */
126 uint32 pulseLengthTick; /**< \brief Duty value in clock ticks */
127 boolean dataCoherent; /**< \brief TRUE, if the duty and period values are measured from the same period */
128 boolean overflowCnt; /**< \brief TRUE if the last measurement show an overflow in CNT */
129 boolean newData; /**< \brief TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed */
130 boolean dataLost; /**< \brief TRUE if data are lost */
131 uint32 edgeCounterUpper; /**< \brief upper part of the edge counter */
132 boolean glitch; /**< \brief TRUE if glitch is detected */
133 float32 captureClockFrequency; /**< \brief Capture clock frequency in Hz */
134 IfxGtm_Tim timIndex; /**< \brief Index of the TIM module being used. */
135 IfxGtm_Tim_Ch channelIndex; /**< \brief Index of the TIM channel being used. */
136 uint16 edgeCount; /**< \brief number of edges counted. */
137 } IfxGtm_Tim_In;
138
139 /** \brief Configuration structure for TIM input capture
140 */
141 typedef struct
142 {
143 Ifx_GTM *gtm; /**< \brief GTM used */
144 IfxGtm_Tim timIndex; /**< \brief TIM index */
145 IfxGtm_Tim_Ch channelIndex; /**< \brief Channel index */
146 IfxGtm_IrqMode irqMode; /**< \brief Interrupt mode for the new value available */
147 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the timer interrupt */
148 Ifx_Priority isrPriority; /**< \brief Set the interrupt priority for new value available. If 0, no interrupt will be generated */
149 IfxGtm_Tim_In_ConfigCapture capture; /**< \brief Capture configuration */
150 IfxGtm_Tim_In_ConfigFilter filter; /**< \brief Filter configuration */
151 IfxGtm_Tim_In_ConfigTimeout timeout; /**< \brief Timeout configuration */
152 } IfxGtm_Tim_In_Config;
153
154 /** \} */
155
156 /** \addtogroup IfxLld_Gtm_Tim_In_Funtions
157 * \{ */
158
159 /******************************************************************************/
160 /*-------------------------Inline Function Prototypes-------------------------*/
161 /******************************************************************************/
162
163 /** \brief Clear the new data flag
164 * \param driver TIM Input object
165 * \return None
166 */
167 IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver);
168
169 /** \brief return the dutycycle in percent
170 * \param driver TIM Input object
171 * \param dataCoherent If true, the duty cycle has been calculated with coherent values for the period and duty, else the period and duty value are from 2 adjacent periods
172 * \return duty
173 */
174 IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent);
175
176 /** \brief Return the period in second
177 * \param driver TIM Input object
178 * \return period value in seconds
179 */
180 IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver);
181
182 /** \brief Return the period value in tick
183 * \param driver TIM Input object
184 * \return period value in ticks
185 */
186 IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver);
187
188 /** \brief Return the pulse length value in tick
189 * \param driver TIM Input object
190 * \return pulse length
191 */
192 IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver);
193
194 /** \brief Indicates if data were lost
195 * \param driver TIM Input object
196 * \return TRUE if Data is lost FALSE otherwise
197 */
198 IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver);
199
200 /** \brief Indicates if new data are present (new data flag)
201 * \param driver TIM Input object
202 * \return TRUE if New Data FALSE otherwise
203 */
204 IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver);
205
206 /******************************************************************************/
207 /*-------------------------Global Function Prototypes-------------------------*/
208 /******************************************************************************/
209
210 /** \brief Initializes the input capture object
211 * \param driver TIM Input object
212 * \param config Configuration structure for the input capture Timer
213 * \return TRUE on success else FALSE
214 */
215 IFX_EXTERN boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config);
216
217 /** \brief Initializes the configuration structure to default
218 * \param config Configuration structure for the input capture Timer
219 * \param gtm Pointer to GTM module
220 * \return None
221 */
222 IFX_EXTERN void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm);
223
224 /** \brief will update the driver state\n
225 * To be called in the interrupt generated by the IfxGtm_Tim_In driver
226 * \param driver TIM Input object
227 * \return None
228 */
229 IFX_EXTERN void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver);
230
231 /** \brief Updates the period and duty cycle
232 * \param driver TIM Input object
233 * \return None
234 */
235 IFX_EXTERN void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver);
236
237 /** \} */
238
239 /******************************************************************************/
240 /*---------------------Inline Function Implementations------------------------*/
241 /******************************************************************************/
242
243 IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver)
244 {
245 driver->newData = FALSE;
246 }
247
248
249 IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent)
250 {
251 float32 duty;
252 boolean interruptState = IfxCpu_disableInterrupts();
253 duty = (float32)(driver->pulseLengthTick * 100) / driver->periodTick;
254 *dataCoherent = driver->dataCoherent;
255 IfxCpu_restoreInterrupts(interruptState);
256
257 return duty;
258 }
259
260
261 IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver)
262 {
263 return IfxGtm_Tim_In_getPeriodTicks(driver) / driver->captureClockFrequency;
264 }
265
266
267 IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver)
268 {
269 return driver->periodTick;
270 }
271
272
273 IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver)
274 {
275 return driver->pulseLengthTick;
276 }
277
278
279 IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver)
280 {
281 return driver->dataLost;
282 }
283
284
285 IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver)
286 {
287 return driver->newData;
288 }
289
290
291 #endif /* IFXGTM_TIM_IN_H */
IfxGtm_Tim_In::pulseLengthTick
uint32 pulseLengthTick
Duty value in clock ticks.
Definition: IfxGtm_Tim_In.h:126
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
IfxGtm_Tim_In_ConfigFilter
Configuration structure for TIM filter.
Definition: IfxGtm_Tim_In.h:94
IfxGtm_Tim_In_ConfigCapture::mode
Ifx_Pwm_Mode mode
PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported.
Definition: IfxGtm_Tim_In.h:89
IfxGtm_Tim_In::dataCoherent
boolean dataCoherent
TRUE, if the duty and period values are measured from the same period.
Definition: IfxGtm_Tim_In.h:127
IfxGtm_Tim_In::newData
boolean newData
TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed.
Definition: IfxGtm_Tim_In.h:129
IfxGtm_Tim_In_Config
Configuration structure for TIM input capture.
Definition: IfxGtm_Tim_In.h:141
IfxGtm_Tim_In_ConfigCapture::irqOnDatalost
boolean irqOnDatalost
If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled.
Definition: IfxGtm_Tim_In.h:87
IfxGtm_Tim_In_Input_adjacentChannel
Use the input from the adjacent channel.
Definition: IfxGtm_Tim_In.h:68
IfxGtm_Tim_In_ConfigFilter::clock
IfxGtm_Cmu_Tim_Filter_Clk clock
Timeout clock.
Definition: IfxGtm_Tim_In.h:96
IfxGtm_Tim_In::edgeCount
uint16 edgeCount
number of edges counted.
Definition: IfxGtm_Tim_In.h:136
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxGtm_Tim_In_ConfigFilter::fallingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode
Filter mode for falling edge.
Definition: IfxGtm_Tim_In.h:98
IfxGtm_Tim_In_isNewData
IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver)
Indicates if new data are present (new data flag)
Definition: IfxGtm_Tim_In.h:285
IfxGtm_Tim_In_Config::gtm
Ifx_GTM * gtm
GTM used.
Definition: IfxGtm_Tim_In.h:143
IfxGtm_Tim_In_getPeriodTicks
IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver)
Return the period value in tick.
Definition: IfxGtm_Tim_In.h:267
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tim_In_ConfigTimeout::irqOnTimeout
boolean irqOnTimeout
If TRUE, the interrupt on timeout is enabled.
Definition: IfxGtm_Tim_In.h:113
Ifx_Assert.h
Assert functions.
IfxGtm_Tim_In_ConfigCapture
Configuration structure for TIM capture.
Definition: IfxGtm_Tim_In.h:82
IfxGtm_Tim_In_Config::capture
IfxGtm_Tim_In_ConfigCapture capture
Capture configuration.
Definition: IfxGtm_Tim_In.h:149
IfxGtm_Tim_In_ConfigFilter::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second.
Definition: IfxGtm_Tim_In.h:100
IfxGtm_Tim_In_getPulseLengthTick
IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver)
Return the pulse length value in tick.
Definition: IfxGtm_Tim_In.h:273
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxGtm_Tim_In_Input_aux
Use the input from the aux.
Definition: IfxGtm_Tim_In.h:69
IfxGtm_Tim_In_Input_currentChannel
Use the input from the current channel.
Definition: IfxGtm_Tim_In.h:67
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Tim_In_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxGtm_Tim_In.h:147
IfxGtm_Tim_In::timIndex
IfxGtm_Tim timIndex
Index of the TIM module being used.
Definition: IfxGtm_Tim_In.h:134
IfxGtm_Tim_In::glitch
boolean glitch
TRUE if glitch is detected.
Definition: IfxGtm_Tim_In.h:132
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Tim_In_ConfigFilter::input
IfxGtm_Tim_In_Input input
selected input
Definition: IfxGtm_Tim_In.h:102
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Cmu_Tim_Filter_Clk
IfxGtm_Cmu_Tim_Filter_Clk
Tim Filter counter frequency select.
Definition: IfxGtm_Cmu.h:77
IfxGtm_Tim_In_ConfigFilter::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second.
Definition: IfxGtm_Tim_In.h:99
IfxGtm_Tim_TinMap
TIN pin mapping structure.
Definition: IfxGtm_PinMap.h:76
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
IfxGtm_Tim_In::overflowCnt
boolean overflowCnt
TRUE if the last measurement show an overflow in CNT.
Definition: IfxGtm_Tim_In.h:128
IfxGtm_Tim_In_ConfigTimeout
Configuration structure for TIM timeout.
Definition: IfxGtm_Tim_In.h:109
IfxGtm_Tim_In_ConfigFilter::inputPin
IfxGtm_Tim_TinMap * inputPin
If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex.
Definition: IfxGtm_Tim_In.h:103
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold
Individual deglitch time mode (Hold)
Definition: IfxGtm_Tim_In.h:59
IfxGtm_Tim_In_ConfigCapture::irqOnCntOverflow
boolean irqOnCntOverflow
If TRUE, the interrupt on CNT overflow is enabled.
Definition: IfxGtm_Tim_In.h:85
IfxGtm_Tim_In_ConfigCapture::irqOnNewVal
boolean irqOnNewVal
If TRUE, the interrupt on new value is enabled.
Definition: IfxGtm_Tim_In.h:84
IfxGtm_Tim_In_getPeriodSecond
IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver)
Return the period in second.
Definition: IfxGtm_Tim_In.h:261
IfxGtm_Tim_In_ConfigTimeout::timeout
float32 timeout
Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (T...
Definition: IfxGtm_Tim_In.h:112
IfxGtm_Cmu_Clk
IfxGtm_Cmu_Clk
Definition: IfxGtm_Cmu.h:47
IfxGtm_Tim_In
Driver Handle.
Definition: IfxGtm_Tim_In.h:122
IfxGtm_Tim_In_isDataLost
IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver)
Indicates if data were lost.
Definition: IfxGtm_Tim_In.h:279
IfxGtm_Tim_In_Config::filter
IfxGtm_Tim_In_ConfigFilter filter
Filter configuration.
Definition: IfxGtm_Tim_In.h:150
IfxGtm_Tim_In_update
IFX_EXTERN void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
Updates the period and duty cycle.
Definition: IfxGtm_Tim_In.c:273
IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation
Immediate edge propagation mode.
Definition: IfxGtm_Tim_In.h:57
IfxGtm_Tim_In::dataLost
boolean dataLost
TRUE if data are lost.
Definition: IfxGtm_Tim_In.h:130
IfxGtm_Tim_In_ConfigCapture::irqOnEcntOverflow
boolean irqOnEcntOverflow
If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled.
Definition: IfxGtm_Tim_In.h:86
IfxGtm_Tim_In::periodTick
uint32 periodTick
Period value in clock ticks.
Definition: IfxGtm_Tim_In.h:125
IfxGtm_Tim_In_ConfigFilter::risingEdgeMode
IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode
Filter mode for rising edge.
Definition: IfxGtm_Tim_In.h:97
IfxGtm_Tim_In_init
IFX_EXTERN boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
Initializes the input capture object.
Definition: IfxGtm_Tim_In.c:37
IfxGtm_Tim_In_clearNewData
IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver)
Clear the new data flag.
Definition: IfxGtm_Tim_In.h:243
IfxGtm_Tim_In::captureClockFrequency
float32 captureClockFrequency
Capture clock frequency in Hz.
Definition: IfxGtm_Tim_In.h:133
IfxGtm_Tim_In_Input
IfxGtm_Tim_In_Input
Input Source.
Definition: IfxGtm_Tim_In.h:65
IfxCpu.h
CPU basic functionality.
IfxGtm_Tim_In_initConfig
IFX_EXTERN void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tim_In.c:237
IfxGtm_Tim_In_Config::irqMode
IfxGtm_IrqMode irqMode
Interrupt mode for the new value available.
Definition: IfxGtm_Tim_In.h:146
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown
Individual deglitch time mode (Up Down)
Definition: IfxGtm_Tim_In.h:58
IfxGtm_Tim_In_Config::isrPriority
Ifx_Priority isrPriority
Set the interrupt priority for new value available. If 0, no interrupt will be generated.
Definition: IfxGtm_Tim_In.h:148
IfxGtm_Tim_In::edgeCounterUpper
uint32 edgeCounterUpper
upper part of the edge counter
Definition: IfxGtm_Tim_In.h:131
IfxGtm_Tim_In_Config::timeout
IfxGtm_Tim_In_ConfigTimeout timeout
Timeout configuration.
Definition: IfxGtm_Tim_In.h:151
IfxGtm_Tim_In_getDutyPercent
IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent)
return the dutycycle in percent
Definition: IfxGtm_Tim_In.h:249
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
sint32
long sint32
Definition: Platform_Types.h:131
IfxGtm_Tim_In_ConfigFilter::inputPinMode
IfxPort_InputMode inputPinMode
Input pin mode.
Definition: IfxGtm_Tim_In.h:104
IfxGtm_Tim_In_ConfigCapture::clock
IfxGtm_Cmu_Clk clock
Timer input clock.
Definition: IfxGtm_Tim_In.h:88
IfxGtm_Tim_In_onIsr
IFX_EXTERN void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
will update the driver state To be called in the interrupt generated by the IfxGtm_Tim_In driver ...
Definition: IfxGtm_Tim_In.c:267
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Tim_In::channel
Ifx_GTM_TIM_CH * channel
TIM channel used.
Definition: IfxGtm_Tim_In.h:124
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxGtm_Tim_In_ConfigFilter::irqOnGlitch
boolean irqOnGlitch
If TRUE, the interrupt on glitch is enabled.
Definition: IfxGtm_Tim_In.h:101
IfxGtm_Tim_In_ConfigFilterMode
IfxGtm_Tim_In_ConfigFilterMode
Config Filter Mode.
Definition: IfxGtm_Tim_In.h:55
IfxGtm_Tim_In_ConfigFilterMode_none
No filter.
Definition: IfxGtm_Tim_In.h:60
IfxGtm_Tim_In::channelIndex
IfxGtm_Tim_Ch channelIndex
Index of the TIM channel being used.
Definition: IfxGtm_Tim_In.h:135


iLLD_TC26B: IfxGtm_Tom.c Source File

  • Gtm
  • Std
IfxGtm_Tom.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom.c
3 * \brief GTM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Tom.h"
30 #include "IfxGtm_bf.h"
31 #include "IfxGtm_Cmu.h"
32
33 /******************************************************************************/
34 /*-------------------------Function Implementations---------------------------*/
35 /******************************************************************************/
36
37 void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
38 {
39 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
40 tomCh->IRQ_NOTIFY.B.CCU1TC = 1;
41 }
42
43
44 void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
45 {
46 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
47 tomCh->IRQ_NOTIFY.B.CCU0TC = 1;
48 }
49
50
51 float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
52 {
53 IfxGtm_Tom_Ch_ClkSrc clock;
54 IfxGtm_Cmu_Fxclk clkIndex[5] = {
55 IfxGtm_Cmu_Fxclk_0, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 */
56 IfxGtm_Cmu_Fxclk_1, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 */
57 IfxGtm_Cmu_Fxclk_2, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 */
58 IfxGtm_Cmu_Fxclk_3, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 */
59 IfxGtm_Cmu_Fxclk_4 /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 */
60 };
61
62 clock = IfxGtm_Tom_Ch_getClockSource(tom, channel);
63
64 if (clock == IfxGtm_Tom_Ch_ClkSrc_noClock)
65 {
66 return 0.0;
67 }
68 else
69 {
70 return IfxGtm_Cmu_getFxClkFrequency(gtm, clkIndex[clock], TRUE);
71 }
72 }
73
74
75 IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
76 {
77 IfxGtm_Tom_Ch_ClkSrc clock = IfxGtm_Tom_Ch_ClkSrc_noClock;
78
79 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
80
81 clock = (IfxGtm_Tom_Ch_ClkSrc)tomCh->CTRL.B.CLK_SRC_SR;
82
83 return clock;
84 }
85
86
87 uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
88 {
89 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
90
91 return tomCh->CM1.U;
92 }
93
94
95 volatile uint32 *IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
96 {
97 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
98
99 return (volatile uint32 *)&tomCh->CM1.U;
100 }
101
102
103 uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
104 {
105 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
106
107 return tomCh->CM0.U;
108 }
109
110
111 volatile uint32 *IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
112 {
113 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
114 return (volatile uint32 *)&tomCh->CM0.U;
115 }
116
117
118 boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
119 {
120 boolean result;
121 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
122
123 result = tomCh->STAT.B.OL == 1;
124
125 return result;
126 }
127
128
129 volatile Ifx_SRC_SRCR *IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
130 {
131 IFX_UNUSED_PARAMETER(gtm)
132 return &MODULE_SRC.GTM.GTM[0].TOM[tom][channel / 2];
133 }
134
135
136 Ifx_GTM_TOM_TGC *IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
137 {
138 Ifx_GTM_TOM_TGC *pointer;
139
140 if (tgcIndex == 0)
141 {
142 pointer = (Ifx_GTM_TOM_TGC *)&tom->TGC0_GLB_CTRL;
143 }
144 else
145 {
146 pointer = (Ifx_GTM_TOM_TGC *)&tom->TGC1_GLB_CTRL;
147 }
148
149 return pointer;
150 }
151
152
153 volatile uint32 *IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
154 {
155 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
156 return (volatile uint32 *)&tomCh->CN0.U;
157 }
158
159
160 boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
161 {
162 boolean result;
163 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
164 result = tomCh->IRQ_NOTIFY.B.CCU1TC != 0;
165 return result;
166 }
167
168
169 boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
170 {
171 boolean result;
172 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
173 result = tomCh->IRQ_NOTIFY.B.CCU0TC != 0;
174 return result;
175 }
176
177
178 void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
179 {
180 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
181 tomCh->IRQ_FORCINT.B.TRG_CCU1TC0 = 1;
182 }
183
184
185 void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
186 {
187 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
188 tomCh->IRQ_FORCINT.B.TRG_CCU0TC0 = 1;
189 }
190
191
192 void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
193 {
194 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
195
196 tomCh->CTRL.B.CLK_SRC_SR = clock;
197 }
198
199
200 void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
201 {
202 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
203
204 tomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
205 tomCh->CM1.U = compareOne;
206 }
207
208
209 void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
210 {
211 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
212
213 tomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
214 }
215
216
217 void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
218 {
219 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
220
221 tomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
222 }
223
224
225 void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
226 {
227 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
228
229 tomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
230 tomCh->SR1.U = shadowOne;
231 }
232
233
234 void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
235 {
236 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
237
238 tomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
239 }
240
241
242 void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
243 {
244 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
245
246 tomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
247 }
248
249
250 void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
251 {
252 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
253
254 tomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
255 }
256
257
258 void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
259 {
260 if (channel <= IfxGtm_Tom_Ch_7)
261 {
262 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
263
264 tomCh->CTRL.B.GCM = enabled ? 1 : 0;
265 }
266 }
267
268
269 void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
270 {
271 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
272
273 Ifx_GTM_TOM_CH_IRQ_EN en;
274 en.U = tomCh->IRQ_EN.U;
275
276 /* Disable all interrupts of the interrupt set to change mode */
277 tomCh->IRQ_EN.U = IFX_ZEROS;
278 tomCh->IRQ_MODE.B.IRQ_MODE = mode;
279 tomCh->IRQ_EN.U = en.U; /* Set the values back */
280
281 en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
282 en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
283 tomCh->IRQ_EN.U = en.U;
284 }
285
286
287 void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
288 {
289 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
290
291 tomCh->CTRL.B.OSM = enabled ? 1 : 0;
292 }
293
294
295 void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
296 {
297 if (channel == IfxGtm_Tom_Ch_15)
298 {
299 tom->CH15.CTRL.B.BITREV = enabled ? 1 : 0;
300 }
301 }
302
303
304 void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
305 {
306 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
307
308 tomCh->CTRL.B.RST_CCU0 = event;
309 }
310
311
312 void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
313 {
314 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
315
316 tomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
317 }
318
319
320 void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
321 {
322 if (channel <= IfxGtm_Tom_Ch_7)
323 {
324 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
325
326 tomCh->CTRL.B.SPEM = enabled ? 1 : 0;
327 }
328 }
329
330
331 void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
332 {
333 Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
334
335 tomCh->CTRL.B.TRIGOUT = trigger;
336 }
337
338
339 uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
340 {
341 uint8 i;
342 uint32 reg = 0;
343 uint32 mask = enableMask | (disableMask << 16);
344
345 for (i = 0; i < IFXGTM_TOM_NUM_TGC_CHANNELS; i++)
346 {
347 /* Bitfield length is 2 bits */
348 uint8 shift = (i * 2) + bitfieldOffset;
349
350 if (mask & 0x1)
351 {
352 reg |= IfxGtm_FeatureControl_enable << shift;
353 }
354
355 if (mask & 0x10000)
356 {
357 reg |= IfxGtm_FeatureControl_disable << shift;
358 }
359
360 mask = mask >> 1;
361 }
362
363 return reg;
364 }
365
366
367 uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
368 {
369 uint32 reg = 0;
370
371 /* Bitfield length is 2 bits */
372 uint8 shift = ((channel % 8) * 2) + bitfieldOffset;
373
374 if (enabled == 1)
375 {
376 reg = IfxGtm_FeatureControl_enable << shift;
377 }
378 else
379 {
380 reg = IfxGtm_FeatureControl_disable << shift;
381 }
382
383 return reg;
384 }
385
386
387 void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
388 {
389 uint32 value;
390
391 value = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_ENDIS_CTRL_ENDIS_CTRL0_OFF);
392
393 if (immediate)
394 {
395 tgc->ENDIS_CTRL.U = value;
396 tgc->ENDIS_STAT.U = value;
397 }
398 else
399 {
400 tgc->ENDIS_CTRL.U = value;
401 }
402 }
403
404
405 void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
406 {
407 uint32 value;
408
409 value = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_OUTEN_CTRL_OUTEN_CTRL0_OFF);
410
411 if (immediate)
412 {
413 tgc->OUTEN_CTRL.U = value;
414 tgc->OUTEN_STAT.U = value;
415 }
416 else
417 {
418 tgc->OUTEN_CTRL.U = value;
419 }
420 }
421
422
423 void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
424 {
425 tgc->GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
426 }
427
428
429 void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
430 {
431 uint32 value;
432
433 value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_ENDIS_CTRL_ENDIS_CTRL0_OFF);
434
435 if (immediate)
436 {
437 tgc->ENDIS_CTRL.U = value;
438 tgc->ENDIS_STAT.U = value;
439 }
440 else
441 {
442 tgc->ENDIS_CTRL.U = value;
443 }
444 }
445
446
447 void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
448 {
449 uint32 value;
450
451 value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_OUTEN_CTRL_OUTEN_CTRL0_OFF);
452
453 if (immediate)
454 {
455 tgc->OUTEN_CTRL.U = value;
456 tgc->OUTEN_STAT.U = value;
457 }
458 else
459 {
460 tgc->OUTEN_CTRL.U = value;
461 }
462 }
463
464
465 void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
466 {
467 tgc->INT_TRIG.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_INT_TRIG_INT_TRIG0_OFF);
468 }
469
470
471 void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
472 {
473 tgc->GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
474 }
475
476
477 void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
478 {
479 tgc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
480 }
481
482
483 void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
484 {
485 uint8 i;
486 uint32 reg = 0;
487
488 for (i = 0; i < IFXGTM_TOM_NUM_TGC_CHANNELS; i++)
489 {
490 if (resetMask & 0x1)
491 {
492 reg |= 1 << i;
493 }
494
495 resetMask = resetMask >> 1;
496 }
497
498 tgc->GLB_CTRL.U = reg << IFX_GTM_TOM_TGC0_GLB_CTRL_RST_CH0_OFF;
499 }
500
501
502 void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
503 {
504 uint32 regEnable, regReset;
505
506 regEnable = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_FUPD_CTRL_FUPD_CTRL0_OFF);
507 regReset = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_TOM_TGC0_FUPD_CTRL_RSTCN0_CH0_OFF);
508
509 tgc->FUPD_CTRL.U = regEnable | (regReset << 16);
510 }
511
512
513 void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
514 {
515 uint32 regEnable, regReset;
516
517 regEnable = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_FUPD_CTRL_FUPD_CTRL0_OFF);
518 regReset = IfxGtm_Tom_Tgc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_TOM_TGC0_FUPD_CTRL_RSTCN0_CH0_OFF);
519
520 tgc->FUPD_CTRL.U = regEnable | regReset;
521 }
522
523
524 void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
525 {
526 Ifx_GTM_TOM_TGC0_ACT_TB act_tb;
527
528 act_tb.U = tgc->ACT_TB.U;
529 act_tb.B.TBU_SEL = base;
530 act_tb.B.ACT_TB = value;
531 tgc->ACT_TB.U = act_tb.U;
532 }
533
534
535 void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
536 {
537 tgc->GLB_CTRL.U = 1 << IFX_GTM_TOM_TGC0_GLB_CTRL_HOST_TRIG_OFF;
538 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxGtm_Cmu_Fxclk_4
Definition: IfxGtm_Cmu.h:72
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:331
IfxGtm_Tom_Ch_raiseInterruptZero
void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Tom.c:185
IfxGtm_Tom_Tgc_setTimeTrigger
void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Tom.c:524
IfxGtm_Tom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:95
IfxGtm_Tom_Tgc_buildFeature
uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:339
IfxGtm_Tom_Tgc_resetChannels
void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Tom.c:483
IfxGtm_Cmu_Fxclk_3
Definition: IfxGtm_Cmu.h:71
IfxGtm_Tom_Ch_isZeroNotification
boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:169
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:304
IfxGtm_Cmu_Fxclk_0
Definition: IfxGtm_Cmu.h:68
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:49
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:312
IfxGtm_Tom_Ch_isOneNotification
boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:160
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:136
IfxGtm_Tom_Ch_setCompare
void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Tom.c:200
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:269
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Tom_Tgc_setChannelForceUpdate
void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:502
IfxGtm_Tom_Ch_setSpe
void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:320
IfxGtm_Tom_Ch_OutputTrigger
IfxGtm_Tom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Tom.h:76
IfxGtm_Cmu_Fxclk_1
Definition: IfxGtm_Cmu.h:69
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IfxGtm_Tom_Ch_getCompareZeroPointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Tom.c:111
IfxGtm_Tom_Ch_setOneShotMode
void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:287
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:228
IfxGtm_Tom_Ch_setCompareZero
void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Tom_Ch_getClockFrequency
float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:51
IFXGTM_TOM_NUM_TGC_CHANNELS
#define IFXGTM_TOM_NUM_TGC_CHANNELS
Number of channels per TOM TGC.
Definition: IfxGtm_Tom.h:54
IfxGtm_Tom_Ch_getCompareZero
uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Tom.c:103
IfxGtm_Cmu_Fxclk
IfxGtm_Cmu_Fxclk
Definition: IfxGtm_Cmu.h:66
IfxGtm_Tom_Ch_setCompareShadow
void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:225
IfxGtm_Tom_Ch_clearZeroNotification
void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:44
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:182
IFX_ZEROS
#define IFX_ZEROS
Definition: Ifx_Types.h:64
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:250
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:229
IfxGtm_Tom_Ch_ClkSrc_noClock
no clock
Definition: IfxGtm_Tom.h:71
IfxGtm_Cmu_Fxclk_2
Definition: IfxGtm_Cmu.h:70
IfxGtm_Tom_Ch_getCompareOne
uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:87
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:535
IfxGtm_Tom_Ch_clearOneNotification
void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:37
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:129
IfxGtm_Tom_Ch_setGatedCounter
void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:258
IfxGtm_Cmu_getFxClkFrequency
float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
Returns the GTM fixed clock frequency in Hz.
Definition: IfxGtm_Cmu.c:121
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:217
IfxGtm_Tom_Ch_ResetEvent
IfxGtm_Tom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Tom.h:84
IfxGtm_Tom_Tgc_enableChannelUpdate
void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:423
IfxGtm_Tom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Tgc_enableChannelsUpdate
void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Tom.c:471
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:258
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:192
IfxGtm_Tom_Ch_getClockSource
IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:75
IfxGtm_Tom_Ch_setCompareOne
void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:513
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:447
IfxGtm_Tom_Tgc_enableTimeTrigger
void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Tom.c:477
IfxGtm_Tom_Tgc_enableChannelOutput
void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:405
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:276
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Tgc_buildFeatureForChannel
uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Tom.c:367
IfxGtm_Tom_Ch_setPcm
void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only)
Definition: IfxGtm_Tom.c:295
IfxGtm_Tom_Tgc_enableChannelsTrigger
void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Tom.c:465
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:429
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Tom_Ch_getOutputLevel
boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level.
Definition: IfxGtm_Tom.c:118
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxGtm_Tom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel.
Definition: IfxGtm_Tom.h:505
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:242
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:64
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Ch_15
TOM channel 15.
Definition: IfxGtm_cfg.h:284
IfxGtm_Tom_Ch_raiseInterruptOne
void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Tom.c:178
IfxGtm_Tom_Tgc_enableChannel
void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:387


iLLD_TC26B: IfxGtm_Tom.h Source File

  • Gtm
  • Std
IfxGtm_Tom.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom.h
3 * \brief GTM basic functionality
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 *
26 * \defgroup IfxLld_Gtm_Std_Tom Tom Basic Functionality
27 * \ingroup IfxLld_Gtm_Std
28 * \defgroup IfxLld_Gtm_Std_Tom_Enumerations TOM Enumerations
29 * \ingroup IfxLld_Gtm_Std_Tom
30 * \defgroup IfxLld_Gtm_Std_Tom_Channel_Functions TOM Channel Functions
31 * \ingroup IfxLld_Gtm_Std_Tom
32 * \defgroup IfxLld_Gtm_Std_Tom_TGC_Functions TOM TGC Functions
33 * \ingroup IfxLld_Gtm_Std_Tom
34 */
35
36 #ifndef IFXGTM_TOM_H
37 #define IFXGTM_TOM_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "_Impl/IfxGtm_cfg.h"
44 #include "IfxGtm.h"
45 #include "IfxGtm_Tbu.h"
46 #include "Src/Std/IfxSrc.h"
47
48 /******************************************************************************/
49 /*-----------------------------------Macros-----------------------------------*/
50 /******************************************************************************/
51
52 /** \brief Number of channels per TOM TGC
53 */
54 #define IFXGTM_TOM_NUM_TGC_CHANNELS (8)
55
56 /******************************************************************************/
57 /*--------------------------------Enumerations--------------------------------*/
58 /******************************************************************************/
59
60 /** \addtogroup IfxLld_Gtm_Std_Tom_Enumerations
61 * \{ */
62 /** \brief Clock source for the TOM channels
63 */
64 typedef enum
65 {
66 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0, /**< \brief div 1 */
67 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1, /**< \brief div 16 */
68 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2, /**< \brief div 256 */
69 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3, /**< \brief div 4096 */
70 IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4, /**< \brief div 32768 */
71 IfxGtm_Tom_Ch_ClkSrc_noClock = 5 /**< \brief no clock */
72 } IfxGtm_Tom_Ch_ClkSrc;
73
74 /** \brief Reset source for channel counter CN0
75 */
76 typedef enum
77 {
78 IfxGtm_Tom_Ch_OutputTrigger_forward = 0, /**< \brief Forward the trigger from the previous channel */
79 IfxGtm_Tom_Ch_OutputTrigger_generate = 1 /**< \brief Generate the trigger from the current channel */
80 } IfxGtm_Tom_Ch_OutputTrigger;
81
82 /** \brief Reset event for channel counter CN0
83 */
84 typedef enum
85 {
86 IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
87 IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
88 } IfxGtm_Tom_Ch_ResetEvent;
89
90 /** \} */
91
92 /** \addtogroup IfxLld_Gtm_Std_Tom_Channel_Functions
93 * \{ */
94
95 /******************************************************************************/
96 /*-------------------------Inline Function Prototypes-------------------------*/
97 /******************************************************************************/
98
99 /** \brief Returns the base addredd of selected Tom channel
100 * \param tom Pointer to the TOM object
101 * \param channel Channel index
102 * \return Pointer to channel base address
103 */
104 IFX_INLINE Ifx_GTM_TOM_CH *IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
105
106 /******************************************************************************/
107 /*-------------------------Global Function Prototypes-------------------------*/
108 /******************************************************************************/
109
110 /** \brief Clears the channel One notification
111 * \param tom Pointer to the TOM object
112 * \param channel Channel index
113 * \return None
114 */
115 IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
116
117 /** \brief Clears the channel Zero notification
118 * \param tom Pointer to the TOM object
119 * \param channel Channel index
120 * \return None
121 */
122 IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
123
124 /** \brief Returns the TOM channel input clock frequency in Hz
125 * \param gtm Pointer to GTM module
126 * \param tom Pointer to the TOM object
127 * \param channel Channel index
128 * \return TOM channel input clock frequency in Hz
129 */
130 IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
131
132 /** \brief Returns the channel clock source
133 * \param tom Pointer to the TOM object
134 * \param channel Channel index
135 * \return The clock source
136 */
137 IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
138
139 /** \brief Returns the compare one value
140 * \param tom Pointer to the TOM object
141 * \param channel Channel index
142 * \return compare one value
143 */
144 IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
145
146 /** \brief Returns the compare one pointer
147 * \param tom Pointer to the TOM object
148 * \param channel Channel index
149 * \return compare one pointer
150 */
151 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
152
153 /** \brief Returns the compare zero value
154 * \param tom Pointer to the TOM object
155 * \param channel Channel index
156 * \return compare zero value
157 */
158 IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
159
160 /** \brief Returns the compare zero pointer
161 * \param tom Pointer to the TOM object
162 * \param channel Channel index
163 * \return compare zero pointer
164 */
165 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
166
167 /** \brief Gets the TOM output level
168 * \param tom Pointer to the TOM object
169 * \param channel Channel index
170 * \return TRUE the output is high, FALSE the output is low
171 */
172 IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
173
174 /** \brief Returns a pointer to the TOM channel SRC
175 * \param gtm Pointer to GTM module
176 * \param tom Specifies the tom object
177 * \param channel Channel index
178 * \return Pointer to the TOM channel SRC
179 */
180 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel);
181
182 /** \brief Returns the TGC pointer
183 * \param tom Pointer to the TOM object
184 * \param tgcIndex TGC index
185 * \return TOM TGC object pointer
186 */
187 IFX_EXTERN Ifx_GTM_TOM_TGC *IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex);
188
189 /** \brief Returns the Timer pointer
190 * \param tom Pointer to the TOM object
191 * \param channel Channel index
192 * \return Timer pointer
193 */
194 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
195
196 /** \brief Returns the status of channel One notification
197 * \param tom Pointer to the TOM object
198 * \param channel Channel index
199 * \return Status of channel One notification
200 */
201 IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
202
203 /** \brief Returns the status of channel Zero notification
204 * \param tom Pointer to the TOM object
205 * \param channel Channel index
206 * \return Status of channel Zero notification
207 */
208 IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
209
210 /** \brief Raises the interrupt for Compare 1
211 * \param tom Pointer to the TOM object
212 * \param channel Channel index
213 * \return None
214 */
215 IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
216
217 /** \brief Raises the interrupt for Compare 0
218 * \param tom Pointer to the TOM object
219 * \param channel Channel index
220 * \return None
221 */
222 IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
223
224 /** \brief Sets the channel clock source
225 * \param tom Pointer to the TOM object
226 * \param channel Channel index
227 * \param clock Channel clock source
228 * \return None
229 */
230 IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock);
231
232 /** \brief Sets the compare 0 and 1 values
233 * \param tom Pointer to the TOM object
234 * \param channel Channel index
235 * \param compareZero Compare zero value
236 * \param compareOne Compare one value
237 * \return None
238 */
239 IFX_EXTERN void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne);
240
241 /** \brief Sets the compare 1 value
242 * \param tom Pointer to the TOM object
243 * \param channel Channel index
244 * \param compareOne Compare one value
245 * \return None
246 */
247 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne);
248
249 /** \brief Sets the compare 1 shadow value
250 * \param tom Pointer to the TOM object
251 * \param channel Channel index
252 * \param shadowOne Compare one shadow value
253 * \return None
254 */
255 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne);
256
257 /** \brief Sets the compare 0 and 1 shadow values
258 * \param tom Pointer to the TOM object
259 * \param channel Channel index
260 * \param shadowZero Compare zero shadow value
261 * \param shadowOne Compare one shadow value
262 * \return None
263 */
264 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne);
265
266 /** \brief Sets the compare 0 value
267 * \param tom Pointer to the TOM object
268 * \param channel Channel index
269 * \param compareZero Compare zero value
270 * \return None
271 */
272 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero);
273
274 /** \brief Sets the compare 0 shadow value
275 * \param tom Pointer to the TOM object
276 * \param channel Channel index
277 * \param shadowZero Compare zero shadow value
278 * \return None
279 */
280 IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero);
281
282 /** \brief Sets the counter value
283 * \param tom Pointer to the TOM object
284 * \param channel Channel index
285 * \param value Counter value
286 * \return None
287 */
288 IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value);
289
290 /** \brief Enable/disable the gated counter mode (channel 0 to 7 only)
291 * \param tom Pointer to the TOM object
292 * \param channel Channel index
293 * \param enabled If TRUE, the feature is enabled, else disabled
294 * \return None
295 */
296 IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
297
298 /** \brief Sets the channel notification
299 * \param tom Pointer to the TOM object
300 * \param channel Channel index
301 * \param mode Interrupt mode
302 * \param interruptOnCompareZero If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
303 * \param interruptOnCompareOne If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
304 * \return None
305 */
306 IFX_EXTERN void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne);
307
308 /** \brief Enable/disable the one shot mode
309 * \param tom Pointer to the TOM object
310 * \param channel Channel index
311 * \param enabled If TRUE, the feature is enabled, else disabled
312 * \return None
313 */
314 IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
315
316 /** \brief Enable/disable the PCM mode (channel 15 only)
317 * \param tom Pointer to the TOM object
318 * \param channel Channel index
319 * \param enabled If TRUE, the feature is enabled, else disabled
320 * \return None
321 */
322 IFX_EXTERN void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
323
324 /** \brief Sets the channel clock source either from local or from previous channel
325 * \param tom Pointer to the TOM object
326 * \param channel Channel index
327 * \param event Channel reset event
328 * \return None
329 */
330 IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event);
331
332 /** \brief Sets the signal level
333 * \param tom Pointer to the TOM object
334 * \param channel Channel index
335 * \param activeState Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
336 * \return None
337 */
338 IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState);
339
340 /** \brief Enable/disable the SPE mode (channel 0 to 7 only)
341 * \param tom Pointer to the TOM object
342 * \param channel Channel index
343 * \param enabled If TRUE, the feature is enabled, else disabled
344 * \return None
345 */
346 IFX_EXTERN void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
347
348 /** \brief Sets the channel trigger output
349 * \param tom Pointer to the TOM object
350 * \param channel Channel index
351 * \param trigger Channel trigger output mode
352 * \return None
353 */
354 IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger);
355
356 /** \} */
357
358 /** \addtogroup IfxLld_Gtm_Std_Tom_TGC_Functions
359 * \{ */
360
361 /******************************************************************************/
362 /*-------------------------Inline Function Prototypes-------------------------*/
363 /******************************************************************************/
364
365 /** \brief Sets the tgc global control value
366 * \param tgc Pointer to the TGC object
367 * \param control global control value
368 * \return None
369 */
370 IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control);
371
372 /******************************************************************************/
373 /*-------------------------Global Function Prototypes-------------------------*/
374 /******************************************************************************/
375
376 /** \brief Builds the register value for the feature enable/disable
377 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
378 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
379 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
380 * \return The register value
381 */
382 IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
383
384 /** \brief Builds the register value for the feature enable/disable for a single channel
385 * \param channel Channel index
386 * \param enabled Enable/ Disable choise of the feature
387 * \param bitfieldOffset Offset of the channel 0 bitfield in the register
388 * \return The register value
389 */
390 IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset);
391
392 /** \brief Enable/disable one channel (ENDIS)
393 * \param tgc Pointer to the TGC object
394 * \param channel Channel index
395 * \param enabled Enable/ Disable choise of the feature
396 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
397 * \return None
398 */
399 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate);
400
401 /** \brief Enable/disable one channel output (OUTEN)
402 * \param tgc Pointer to the TGC object
403 * \param channel Channel index
404 * \param enabled Enable/ Disable choise of the feature
405 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
406 * \return None
407 */
408 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate);
409
410 /** \brief Enable/disable one channel for update (UPEN)
411 * \param tgc Pointer to the TGC object
412 * \param channel Channel index
413 * \param enabled Enable/ Disable choise of the feature
414 * \return None
415 */
416 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled);
417
418 /** \brief Enable/disable one or more channels (ENDIS)
419 * \param tgc Pointer to the TGC object
420 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
421 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
422 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
423 * \return None
424 */
425 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate);
426
427 /** \brief Enable/disable one or more channels output (OUTEN)
428 * \param tgc Pointer to the TGC object
429 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
430 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
431 * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
432 * \return None
433 */
434 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate);
435
436 /** \brief Enable/disable the TGC channels trigger
437 * \param tgc Pointer to the TGC object
438 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
439 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
440 * \return None
441 */
442 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask);
443
444 /** \brief Enable/disable one or more channels for update (UPEN)
445 * \param tgc Pointer to the TGC object
446 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
447 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
448 * \return None
449 */
450 IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask);
451
452 /** \brief Enable/disable the time base trigger
453 * \param tgc Pointer to the TGC object
454 * \param enabled If TRUE, the trigger is enabled else disabled
455 * \return None
456 */
457 IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled);
458
459 /** \brief Reset one or more channels
460 * \param tgc Pointer to the TGC object
461 * \param resetMask Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
462 * \return None
463 */
464 IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask);
465
466 /** \brief Enable/disable one channel for update (FUPD)
467 * \param tgc Pointer to the TGC object
468 * \param channel Channel index
469 * \param enabled Enable/ Disable choise of the feature
470 * \param resetEnabled Enable/ Disable reset choise of the feature
471 * \return None
472 */
473 IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled);
474
475 /** \brief Enable/disable one or more channels for the force update feature (FUPD)
476 * \param tgc Pointer to the TGC object
477 * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
478 * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
479 * \param resetEnableMask Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
480 * \param resetDisableMask Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
481 * \return None
482 */
483 IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask);
484
485 /** \brief Sets the trigger time base and time base value
486 * \param tgc Pointer to the TGC object
487 * \param base Time base used for comparison
488 * \param value Compare value that raise the trigger
489 * \return None
490 */
491 IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value);
492
493 /** \brief Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
494 * \param tgc Pointer to the TGC object
495 * \return None
496 */
497 IFX_EXTERN void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc);
498
499 /** \} */
500
501 /******************************************************************************/
502 /*---------------------Inline Function Implementations------------------------*/
503 /******************************************************************************/
504
505 IFX_INLINE Ifx_GTM_TOM_CH *IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
506 {
507 return (Ifx_GTM_TOM_CH *)((uint32)&tom->CH0.CTRL.U + 0x40 * channel);
508 }
509
510
511 IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
512 {
513 tgc->GLB_CTRL.U = control;
514 }
515
516
517 #endif /* IFXGTM_TOM_H */
IfxGtm_Tom_Ch_setTriggerOutput
IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:331
IfxGtm_Tom_Ch_raiseInterruptZero
IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 0.
Definition: IfxGtm_Tom.c:185
IfxGtm_Tom_Tgc_setTimeTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
Sets the trigger time base and time base value.
Definition: IfxGtm_Tom.c:524
IfxGtm_Tom_Ch_getCompareOnePointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:95
IfxGtm_Tom_Tgc_buildFeature
IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:339
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1
div 16
Definition: IfxGtm_Tom.h:67
IfxGtm_Tom_Tgc_resetChannels
IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
Reset one or more channels.
Definition: IfxGtm_Tom.c:483
IfxGtm_Tom_Ch_isZeroNotification
IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:169
IfxGtm_Tom_Ch_setResetSource
IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:304
IfxGtm_Tbu_Ts
IfxGtm_Tbu_Ts
GTM TOM TBU Time stamps.
Definition: IfxGtm_Tbu.h:49
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:66
IfxGtm_Tom_Ch_setSignalLevel
IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:312
IfxGtm_Tom_Ch_isOneNotification
IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:160
IfxGtm_Tom_Ch_getTgcPointer
IFX_EXTERN Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:136
IfxGtm_Tom_Ch_setCompare
IFX_EXTERN void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
Sets the compare 0 and 1 values.
Definition: IfxGtm_Tom.c:200
IfxGtm_Tom_Ch_setNotification
IFX_EXTERN void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:269
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxSrc.h
SRC basic functionality.
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Tom_Tgc_setChannelForceUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:502
IfxGtm_Tom_Ch_setSpe
IFX_EXTERN void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the SPE mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:320
IfxGtm_Tom_Ch_OutputTrigger
IfxGtm_Tom_Ch_OutputTrigger
Reset source for channel counter CN0.
Definition: IfxGtm_Tom.h:76
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IfxGtm_Tom_Ch_getCompareZeroPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero pointer.
Definition: IfxGtm_Tom.c:111
IfxGtm_Tom_Ch_setOneShotMode
IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:287
IfxGtm_Tom_Ch_setCompareZero
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Tom_Ch_getClockFrequency
IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:51
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:87
IfxGtm_Tom_Ch_getCompareZero
IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare zero value.
Definition: IfxGtm_Tom.c:103
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxGtm_Tom_Ch_setCompareShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:225
IfxGtm_Tom_Ch_clearZeroNotification
IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:44
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:182
IfxGtm_Tom_Ch_setCounterValue
IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:250
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3
div 4096
Definition: IfxGtm_Tom.h:69
IfxGtm_Tom_Ch_ClkSrc_noClock
no clock
Definition: IfxGtm_Tom.h:71
IfxGtm_Tom_Ch_getCompareOne
IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:87
IfxGtm_Tom_Tgc_trigger
IFX_EXTERN void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:535
IfxGtm_Tom_Ch_clearOneNotification
IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:37
IfxGtm_Tom_Ch_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:129
IfxGtm_Tom_Ch_setGatedCounter
IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the gated counter mode (channel 0 to 7 only)
Definition: IfxGtm_Tom.c:258
IfxGtm_Tom_Ch_setCompareOneShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:217
IfxGtm_Tom_Ch_ResetEvent
IfxGtm_Tom_Ch_ResetEvent
Reset event for channel counter CN0.
Definition: IfxGtm_Tom.h:84
IfxGtm_Tbu.h
GTM basic functionality.
IfxGtm_Tom_Tgc_enableChannelUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:423
IfxGtm_Tom_Ch_getTimerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4
div 32768
Definition: IfxGtm_Tom.h:70
IfxGtm_Tom_Tgc_enableChannelsUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable one or more channels for update (UPEN)
Definition: IfxGtm_Tom.c:471
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:78
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:258
IfxGtm_Tom_Ch_setClockSource
IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:192
IfxGtm_Tom_Ch_getClockSource
IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:75
IfxGtm_Tom_Ch_setCompareOne
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Tgc_setChannelsForceUpdate
IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:513
IfxGtm_Tom_Tgc_enableChannelsOutput
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:447
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2
div 256
Definition: IfxGtm_Tom.h:68
IfxGtm_Tom_Tgc_enableTimeTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
Enable/disable the time base trigger.
Definition: IfxGtm_Tom.c:477
IfxGtm_Tom_Tgc_writeGlobalControl
IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value.
Definition: IfxGtm_Tom.h:511
IfxGtm_Tom_Tgc_enableChannelOutput
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:405
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Tom_Tgc_buildFeatureForChannel
IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable for a single channel.
Definition: IfxGtm_Tom.c:367
IfxGtm_Tom_Ch_setPcm
IFX_EXTERN void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the PCM mode (channel 15 only)
Definition: IfxGtm_Tom.c:295
IfxGtm_Tom_Tgc_enableChannelsTrigger
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
Enable/disable the TGC channels trigger.
Definition: IfxGtm_Tom.c:465
IfxGtm_Tom_Tgc_enableChannels
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:429
IfxGtm_Tom_Ch_getOutputLevel
IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Gets the TOM output level.
Definition: IfxGtm_Tom.c:118
IfxGtm_Tom_Ch_getChannelPointer
IFX_INLINE Ifx_GTM_TOM_CH * IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the base addredd of selected Tom channel.
Definition: IfxGtm_Tom.h:505
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm.h
GTM basic functionality.
IfxGtm_Tom_Ch_setCompareZeroShadow
IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:242
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:64
IfxGtm_Tom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Tom.h:79
IfxGtm_Tom_Ch_raiseInterruptOne
IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Raises the interrupt for Compare 1.
Definition: IfxGtm_Tom.c:178
IfxGtm_Tom_Ch_ResetEvent_onCm0
Definition: IfxGtm_Tom.h:86
IfxGtm_Tom_Tgc_enableChannel
IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:387


iLLD_TC26B: IfxGtm_Tom_Pwm.c Source File

  • Gtm
  • Tom
  • Pwm
IfxGtm_Tom_Pwm.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Pwm.c
3 * \brief GTM PWM details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Tom_Pwm.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
36 {
37 boolean result = TRUE;
38
39 driver->gtm = config->gtm;
40 driver->tomIndex = config->tom;
41
42 Ifx_GTM_TOM *tomSFR = &config->gtm->TOM[config->tom];
43 driver->tom = tomSFR;
44 driver->tomChannel = config->tomChannel;
45
46 if (config->tomChannel <= 7)
47 {
48 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
49 driver->tgc[1] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
50 }
51 else
52 {
53 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
54 driver->tgc[1] = NULL_PTR; /* NOTE currently no concatenation between TOMs */
55 }
56
57 /* Initialize the timer part */
58 if (config->synchronousUpdateEnabled == 1)
59 {
60 IfxGtm_Tom_Tgc_enableChannelUpdate(driver->tgc[0], config->tomChannel, TRUE);
61 }
62
63 IfxGtm_Tom_Ch_setClockSource(tomSFR, config->tomChannel, config->clock);
64
65 IfxGtm_Tom_Tgc_setChannelForceUpdate(driver->tgc[0], config->tomChannel, TRUE, TRUE);
66
67 IfxGtm_Tom_Ch_setSignalLevel(tomSFR, config->tomChannel, config->signalLevel);
68
69 if (config->pin.outputPin != NULL_PTR)
70 {
71 IfxGtm_PinMap_setTomTout(config->pin.outputPin, config->pin.outputMode, config->pin.padDriver);
72 }
73
74 // enable and initialise interrupts if chosen
75 if ((config->interrupt.ccu0Enabled == 1) || (config->interrupt.ccu1Enabled == 1))
76 {
77 IfxGtm_Tom_Ch_setNotification(tomSFR, config->tomChannel, config->interrupt.mode, config->interrupt.ccu0Enabled, config->interrupt.ccu1Enabled);
78
79 volatile Ifx_SRC_SRCR *src;
80 src = IfxGtm_Tom_Ch_getSrcPointer(config->gtm, config->tom, config->tomChannel);
81 IfxSrc_init(src, config->interrupt.isrProvider, config->interrupt.isrPriority);
82 IfxSrc_enable(src);
83 }
84
85 if (config->synchronousUpdateEnabled == 1)
86 {
87 IfxGtm_Tom_Ch_setCompareZeroShadow(tomSFR, config->tomChannel, config->period);
88 IfxGtm_Tom_Ch_setCompareOneShadow(tomSFR, config->tomChannel, config->dutyCycle);
89 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
90 }
91 else
92 {
93 IfxGtm_Tom_Ch_setCompareZero(tomSFR, config->tomChannel, config->period);
94 IfxGtm_Tom_Ch_setCompareOne(tomSFR, config->tomChannel, config->dutyCycle);
95 }
96
97 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], config->tomChannel, TRUE, FALSE);
98 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], config->tomChannel, TRUE, FALSE);
99
100 if (config->immediateStartEnabled == TRUE)
101 {
102 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
103 }
104
105 return result;
106 }
107
108
109 void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
110 {
111 config->gtm = gtm;
112 config->tom = IfxGtm_Tom_0;
113 config->tomChannel = IfxGtm_Tom_Ch_0;
114 config->clock = IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0;
115 config->period = 20;
116 config->dutyCycle = 10;
117 config->signalLevel = Ifx_ActiveState_high;
118 config->oneShotModeEnabled = FALSE;
119 config->synchronousUpdateEnabled = FALSE;
120 config->immediateStartEnabled = TRUE;
121 config->interrupt.ccu0Enabled = FALSE;
122 config->interrupt.ccu1Enabled = FALSE;
123 config->interrupt.mode = IfxGtm_IrqMode_pulseNotify;
124 config->interrupt.isrProvider = IfxSrc_Tos_cpu0;
125 config->interrupt.isrPriority = 0;
126 config->pin.outputPin = NULL_PTR;
127 config->pin.outputMode = IfxPort_OutputMode_pushPull;
128 config->pin.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
129 }
130
131
132 void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
133 {
134 /* Enable channel if not enabled already */
135 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], driver->tomChannel, TRUE, immediate);
136 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], driver->tomChannel, TRUE, immediate);
137
138 /* Trigger the start now */
139 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
140 }
141
142
143 void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
144 {
145 /* Disable channels */
146 IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], driver->tomChannel, FALSE, immediate);
147 IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], driver->tomChannel, FALSE, immediate);
148
149 /* Trigger the stop now */
150 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
151 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxGtm_Tom_Pwm_initConfig
void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Pwm.c:109
IfxGtm_Tom_Pwm_Driver::tgc
Ifx_GTM_TOM_TGC * tgc[2]
Pointer to the TGC object.
Definition: IfxGtm_Tom_Pwm.h:167
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxGtm_Tom_Pwm_start
void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel
Definition: IfxGtm_Tom_Pwm.c:132
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:66
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:713
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:312
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:136
IfxGtm_Tom_Pwm_pin::outputPin
IfxGtm_Tom_ToutMap * outputPin
output pin
Definition: IfxGtm_Tom_Pwm.h:134
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:269
IfxGtm_Tom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:122
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxGtm_Tom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Tom_Pwm.h:151
IfxGtm_Tom_Pwm_Driver::tomIndex
IfxGtm_Tom tomIndex
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:164
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxGtm_Tom_Tgc_setChannelForceUpdate
void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
Enable/disable one channel for update (FUPD)
Definition: IfxGtm_Tom.c:502
IfxGtm_Tom_Pwm_Config::interrupt
IfxGtm_Tom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Tom_Pwm.h:154
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Tom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Tom_Pwm.h:161
IfxGtm_Tom_Pwm_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:146
IfxGtm_Tom_Pwm_stop
void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Tom_Pwm.c:143
IfxGtm_Tom_Ch_setCompareZero
void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
Sets the compare 0 value.
Definition: IfxGtm_Tom.c:234
IfxGtm_Tom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:121
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxGtm_Tom_Pwm.h
GTM PWM details.
IfxGtm_Tom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Tom_Pwm.h:152
IfxGtm_Tom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Tom_Pwm.h:123
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxGtm_Tom_Pwm_init
boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Tom_Pwm.c:35
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:535
IfxGtm_Tom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Tom_Pwm.h:136
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:129
IfxGtm_Tom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Tom_Pwm.h:150
IfxGtm_Tom_Pwm_Config::pin
IfxGtm_Tom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:155
IfxGtm_Tom_Pwm_Driver::tomChannel
IfxGtm_Tom_Ch tomChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Pwm.h:165
IfxGtm_Tom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable/disable immediate start of PWM
Definition: IfxGtm_Tom_Pwm.h:156
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:51
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:217
IfxGtm_Tom_Tgc_enableChannelUpdate
void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable one channel for update (UPEN)
Definition: IfxGtm_Tom.c:423
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:269
IfxGtm_Tom_Pwm_Driver::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Pwm.h:166
IfxGtm_Tom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Tom_Pwm.h:143
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:192
IfxGtm_Tom_Ch_setCompareOne
void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
Sets the compare 1 value.
Definition: IfxGtm_Tom.c:209
IfxGtm_Tom_Pwm_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Pwm.h:148
IfxGtm_Tom_Pwm_Driver::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Pwm.h:163
IfxGtm_Tom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:125
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:260
IfxGtm_Tom_Tgc_enableChannelOutput
void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel output (OUTEN)
Definition: IfxGtm_Tom.c:405
IfxGtm_Tom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:124
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxGtm_Tom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Tom_Pwm.h:149
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:242
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxGtm_Tom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Tom_Pwm.h:153
IfxGtm_Tom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Tom_Pwm.h:135
IfxGtm_Tom_Tgc_enableChannel
void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
Enable/disable one channel (ENDIS)
Definition: IfxGtm_Tom.c:387


iLLD_TC26B: IfxGtm_Tom_Pwm.h Source File

  • Gtm
  • Tom
  • Pwm
IfxGtm_Tom_Pwm.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Pwm.h
3 * \brief GTM PWM details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Tom_Pwm_Usage How to use the GTM TOM PWM Driver
25 * \ingroup IfxLld_Gtm_Tom_Pwm
26 *
27 * This interface allows to generate simple PWM signal on a TOM out put and can generate interrupts if enabled.
28 * this output can also be routed to port pin if required.
29 *
30 * \section Preparation Preparation
31 * \subsection Include Include Files
32 *
33 * Include following header file into your C code:
34 * \code
35 * #include <Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h>
36 * \endcode
37 *
38 * \subsection Variables Variables
39 * define global variables if necessary
40 *
41 * \code
42 * Ifx_GTM *gtm = &MODULE_GTM;
43 * #define TOM0_CH0_PRIO 10
44 * \endcode
45 *
46 * \subsection Interrupts Interrupts
47 * define Interrupts if needed
48 *
49 * \code
50 * IFX_INTERRUPT(TOM0Ch0_ISR, 0, TOM0_CH0_PRIO)
51 * {}
52 * \endcode
53 *
54 * \subsection Initialization Initialization
55 *
56 * \code
57 * // install interrupt handlers
58 * IfxCpu_Irq_installInterruptHandler (TOM0Ch0_ISR, TOM0_CH0_PRIO);
59 *
60 * // enable GTM clock
61 * {
62 * float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
63 * // Enables the GTM
64 * IfxGtm_enable(gtm);
65 * // Set the global clock frequency to the max
66 * IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
67 * // Set the CMU CLK0
68 * IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
69 * // FXCLK: used by TOM and CLK0: used by ATOM
70 * IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
71 * }
72 *
73 * // initialise TOM
74 * IfxGtm_Tom_Pwm_Config tomConfig; \\configuration structure
75 * IfxGtm_Tom_Pwm_Driver tomHandle; \\ handle
76 *
77 * IfxGtm_Tom_Pwm_initConfig(&tomConfig, gtm);
78 *
79 * tomConfig.tomChannel = IfxGtm_Tom_Ch_0;
80 * tomConfig.period = 20;
81 * tomConfig.dutyCycle = 10;
82 * tomConfig.interrupt.ccu0Enabled = TRUE;
83 * tomConfig.interrupt.isrPriority = TOM0_CH0_PRIO;
84 * tomConfig.pin.outputPin = &IfxGtm_TOM0_0_TOUT106_P10_4_OUT;
85 *
86 * IfxGtm_Tom_Pwm_init(&tomHandle, &tomConfig);
87 * \endcode
88 *
89 * TOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.
90 *
91 * \defgroup IfxLld_Gtm_Tom_Pwm TOM PWM Interface Driver
92 * \ingroup IfxLld_Gtm_Tom
93 * \defgroup IfxLld_Gtm_Tom_Pwm_DataStructures TOM PWM DataStructures
94 * \ingroup IfxLld_Gtm_Tom_Pwm
95 * \defgroup IfxLld_Gtm_Tom_Pwm_Pwm_Functions Pwm Functions
96 * \ingroup IfxLld_Gtm_Tom_Pwm
97 */
98
99 #ifndef IFXGTM_TOM_PWM_H
100 #define IFXGTM_TOM_PWM_H 1
101
102 /******************************************************************************/
103 /*----------------------------------Includes----------------------------------*/
104 /******************************************************************************/
105
106 #include "_PinMap/IfxGtm_PinMap.h"
107 #include "Gtm/Std/IfxGtm_Tom.h"
108 #include "Gtm/Std/IfxGtm_Cmu.h"
109 #include "Cpu/Std/IfxCpu.h"
110
111 /******************************************************************************/
112 /*-----------------------------Data Structures--------------------------------*/
113 /******************************************************************************/
114
115 /** \addtogroup IfxLld_Gtm_Tom_Pwm_DataStructures
116 * \{ */
117 /** \brief configuration structure for interrupts
118 */
119 typedef struct
120 {
121 boolean ccu0Enabled; /**< \brief Enable/Disable choice for CCU0 trigger interrupt */
122 boolean ccu1Enabled; /**< \brief Enable/Disable choice for CCU1 trigger interrupt */
123 IfxGtm_IrqMode mode; /**< \brief IRQ mode of interrupt */
124 IfxSrc_Tos isrProvider; /**< \brief Type of Service for Ccu0/1 interrupt */
125 Ifx_Priority isrPriority; /**< \brief Priority for Ccu0/1 interrupt */
126 } IfxGtm_Tom_Pwm_Interrupt;
127
128 /** \} */
129
130 /** \brief configuration structure for output pin
131 */
132 typedef struct
133 {
134 IfxGtm_Tom_ToutMap *outputPin; /**< \brief output pin */
135 IfxPort_OutputMode outputMode; /**< \brief Output mode */
136 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
137 } IfxGtm_Tom_Pwm_pin;
138
139 /** \addtogroup IfxLld_Gtm_Tom_Pwm_DataStructures
140 * \{ */
141 /** \brief Configuration structure
142 */
143 typedef struct
144 {
145 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
146 IfxGtm_Tom tom; /**< \brief Index of the TOM object used */
147 IfxGtm_Tom_Ch tomChannel; /**< \brief TOM channel used for the timer */
148 IfxGtm_Tom_Ch_ClkSrc clock; /**< \brief Timer input clock */
149 uint32 period; /**< \brief Period */
150 uint32 dutyCycle; /**< \brief Duty Cycle */
151 Ifx_ActiveState signalLevel; /**< \brief Signal Level */
152 boolean oneShotModeEnabled; /**< \brief Enable/Disable the one shot mode */
153 boolean synchronousUpdateEnabled; /**< \brief Synchronous or Asynchronous update */
154 IfxGtm_Tom_Pwm_Interrupt interrupt; /**< \brief configuration structure for interrupt */
155 IfxGtm_Tom_Pwm_pin pin; /**< \brief configuration structure for output pin */
156 boolean immediateStartEnabled; /**< \brief enable/disable immediate start of PWM */
157 } IfxGtm_Tom_Pwm_Config;
158
159 /** \brief Driver Handle
160 */
161 typedef struct
162 {
163 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
164 IfxGtm_Tom tomIndex; /**< \brief Index of the TOM object used */
165 IfxGtm_Tom_Ch tomChannel; /**< \brief TOM channel used for the timer */
166 Ifx_GTM_TOM *tom; /**< \brief Pointer to the TOM object */
167 Ifx_GTM_TOM_TGC *tgc[2]; /**< \brief Pointer to the TGC object */
168 } IfxGtm_Tom_Pwm_Driver;
169
170 /** \} */
171
172 /** \addtogroup IfxLld_Gtm_Tom_Pwm_Pwm_Functions
173 * \{ */
174
175 /******************************************************************************/
176 /*-------------------------Global Function Prototypes-------------------------*/
177 /******************************************************************************/
178
179 /** \brief Initialises the Timer object
180 * \param driver TOM Handle
181 * \param config Configuration structure for TOM Timer
182 * \return TRUE on success else FALSE
183 */
184 IFX_EXTERN boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config);
185
186 /** \brief Initializes the configuration structure to default
187 * \param config This parameter is Initialised by the function
188 * \param gtm Pointer to GTM module
189 * \return None
190 */
191 IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm);
192
193 /** \} */
194
195 /******************************************************************************/
196 /*-------------------------Global Function Prototypes-------------------------*/
197 /******************************************************************************/
198
199 /** \brief starts the PWM generation from the configured channel
200 * \param driver handle for the PWM device
201 * \param immediate immediate start or not
202 * \return None
203 */
204 IFX_EXTERN void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate);
205
206 /** \brief Stops the PWM generation from the configured channel
207 * \param driver handle for the PWM device
208 * \param immediate immediate start or not.
209 * \return None
210 */
211 IFX_EXTERN void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate);
212
213 #endif /* IFXGTM_TOM_PWM_H */
IfxGtm_Tom_Pwm_initConfig
IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Pwm.c:109
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxGtm_Tom_Pwm_stop
IFX_EXTERN void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
Stops the PWM generation from the configured channel.
Definition: IfxGtm_Tom_Pwm.c:143
IfxGtm_Tom_Pwm_Interrupt
configuration structure for interrupts
Definition: IfxGtm_Tom_Pwm.h:119
IfxGtm_Tom_Pwm_pin::outputPin
IfxGtm_Tom_ToutMap * outputPin
output pin
Definition: IfxGtm_Tom_Pwm.h:134
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Tom_Pwm_Interrupt::ccu1Enabled
boolean ccu1Enabled
Enable/Disable choice for CCU1 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:122
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tom_Pwm_Config::signalLevel
Ifx_ActiveState signalLevel
Signal Level.
Definition: IfxGtm_Tom_Pwm.h:151
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Tom_Pwm_Driver::tomIndex
IfxGtm_Tom tomIndex
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:164
IfxGtm_Tom_Pwm_pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:132
IfxGtm_Tom_Pwm_Config::interrupt
IfxGtm_Tom_Pwm_Interrupt interrupt
configuration structure for interrupt
Definition: IfxGtm_Tom_Pwm.h:154
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IfxGtm_Tom_Pwm_Driver
Driver Handle.
Definition: IfxGtm_Tom_Pwm.h:161
IfxGtm_Tom_Pwm_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Pwm.h:146
IfxGtm_Tom_Pwm_Interrupt::ccu0Enabled
boolean ccu0Enabled
Enable/Disable choice for CCU0 trigger interrupt.
Definition: IfxGtm_Tom_Pwm.h:121
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Tom_Pwm_Config::oneShotModeEnabled
boolean oneShotModeEnabled
Enable/Disable the one shot mode.
Definition: IfxGtm_Tom_Pwm.h:152
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:182
IfxGtm_Tom_Pwm_Interrupt::mode
IfxGtm_IrqMode mode
IRQ mode of interrupt.
Definition: IfxGtm_Tom_Pwm.h:123
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:99
IfxGtm_Tom_Pwm_init
IFX_EXTERN boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
Initialises the Timer object.
Definition: IfxGtm_Tom_Pwm.c:35
IfxGtm_Tom_Pwm_pin::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxGtm_Tom_Pwm.h:136
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxGtm_Tom_Pwm_Config::dutyCycle
uint32 dutyCycle
Duty Cycle.
Definition: IfxGtm_Tom_Pwm.h:150
IfxGtm_Tom_Pwm_Config::pin
IfxGtm_Tom_Pwm_pin pin
configuration structure for output pin
Definition: IfxGtm_Tom_Pwm.h:155
IfxGtm_Tom_Pwm_Config::tomChannel
IfxGtm_Tom_Ch tomChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Pwm.h:147
IfxGtm_Tom_Pwm_Config::immediateStartEnabled
boolean immediateStartEnabled
enable/disable immediate start of PWM
Definition: IfxGtm_Tom_Pwm.h:156
IfxCpu.h
CPU basic functionality.
IfxGtm_Tom_Pwm_Driver::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Pwm.h:166
IfxGtm_Tom_Pwm_Config
Configuration structure.
Definition: IfxGtm_Tom_Pwm.h:143
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:258
IfxGtm_Tom_Pwm_start
IFX_EXTERN void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
starts the PWM generation from the configured channel
Definition: IfxGtm_Tom_Pwm.c:132
IfxGtm_Tom_Pwm_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Pwm.h:148
IfxGtm_Tom_Pwm_Config::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Pwm.h:145
IfxGtm_Tom_Pwm_Interrupt::isrPriority
Ifx_Priority isrPriority
Priority for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:125
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Pwm_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Type of Service for Ccu0/1 interrupt.
Definition: IfxGtm_Tom_Pwm.h:124
IfxGtm_Tom_Pwm_Config::period
uint32 period
Period.
Definition: IfxGtm_Tom_Pwm.h:149
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:64
IfxGtm_Tom_Pwm_Config::synchronousUpdateEnabled
boolean synchronousUpdateEnabled
Synchronous or Asynchronous update.
Definition: IfxGtm_Tom_Pwm.h:153
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Pwm_pin::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxGtm_Tom_Pwm.h:135


iLLD_TC26B: IfxGtm_Tom_PwmHl.c Source File

  • Gtm
  • Tom
  • PwmHl
IfxGtm_Tom_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_PwmHl.c
3 * \brief GTM PWMHL details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Tom_PwmHl.h"
30 #include "_Utilities/Ifx_Assert.h"
31 #include "stddef.h"
32 #include "string.h"
33
34 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions
35 * \{ */
36 /******************************************************************************/
37 /*------------------------Inline Function Prototypes--------------------------*/
38 /******************************************************************************/
39
40 /** \brief Inverts the active state
41 * \param activeState Active state
42 * \return State
43 */
44 IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState);
45
46 /******************************************************************************/
47 /*-----------------------Private Function Prototypes--------------------------*/
48 /******************************************************************************/
49
50 /** \brief Sets switched to OFF
51 * \param driver GTM TOM PWM driver
52 * \param tOn ON time
53 * \param shift Shift value in ticks
54 * \return None
55 */
56 IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
57
58 /** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
59 * \param driver GTM TOM PWM driver
60 * \param tOn T on
61 * \return None
62 */
63 IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
64
65 /** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
66 * \param driver GTM TOM PWM driver
67 * \param tOn T on
68 * \return None
69 */
70 IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
71
72 /** \brief Set the outputs to inactive
73 * \param driver GTM TOM PWM driver
74 * \param tOn T on
75 * \return None
76 */
77 IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
78
79 /** \brief Update Pulse
80 * \param driver GTM TOM PWM driver
81 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
82 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
83 * \return None
84 */
85 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
86
87 /** \brief Set Pulse to OFF
88 * \param driver GTM TOM PWM driver
89 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
90 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
91 * \return None
92 */
93 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
94
95 /** \brief Update Shift Center Aligned
96 * \param driver GTM TOM PWM driver
97 * \param tOn ON time
98 * \param shift Shift value in ticks
99 * \return None
100 */
101 IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
102
103 /** \} */
104
105 /******************************************************************************/
106 /*------------------------Private Variables/Constants-------------------------*/
107 /******************************************************************************/
108
109 IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
110 {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
111 {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
112 {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
113 {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
114 {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_PwmHl_updateOff, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulseOff}
115 };
116
117 /******************************************************************************/
118 /*---------------------Inline Function Implementations------------------------*/
119 /******************************************************************************/
120
121 IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
122 {
123 return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
124 }
125
126
127 /******************************************************************************/
128 /*-------------------------Function Implementations---------------------------*/
129 /******************************************************************************/
130
131 float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
132 {
133 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
134 }
135
136
137 float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
138 {
139 return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
140 }
141
142
143 Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
144 {
145 return driver->base.mode;
146 }
147
148
149 boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
150 {
151 boolean result = TRUE;
152 uint16 channelMask;
153 uint16 channelsMask = 0;
154 uint32 channelIndex;
155 uint16 maskShift = 0;
156 IfxGtm_Tom_Timer *timer = config->timer;
157
158 driver->base.mode = Ifx_Pwm_Mode_init;
159 driver->timer = timer;
160 driver->base.setMode = 0;
161 driver->base.inverted = FALSE;
162 driver->base.ccxActiveState = config->base.ccxActiveState;
163 driver->base.coutxActiveState = config->base.coutxActiveState;
164 driver->base.channelCount = config->base.channelCount;
165
166 IfxGtm_Tom_PwmHl_setDeadtime(driver, config->base.deadtime);
167 IfxGtm_Tom_PwmHl_setMinPulse(driver, config->base.minPulse);
168
169 driver->tom = &(timer->gtm->TOM[config->tom]);
170
171 /* config->ccx[0] is used for the definition of the TGC */
172 if (config->ccx[0]->channel <= 7)
173 {
174 driver->tgc = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
175 }
176 else
177 {
178 driver->tgc = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
179 }
180
181 maskShift = (config->ccx[0]->channel <= 7) ? 0 : 8;
182
183 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS);
184
185 IfxGtm_Tom_Ch_ClkSrc clock = IfxGtm_Tom_Ch_getClockSource(timer->tom, timer->timerChannel);
186
187 for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
188 {
189 IfxGtm_Tom_Ch channel;
190 /* CCX */
191 channel = config->ccx[channelIndex]->channel;
192 driver->ccx[channelIndex] = channel;
193 channelMask = 1 << (channel - maskShift);
194 channelsMask |= channelMask;
195
196 /* Initialize the timer part */
197 IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
198
199 /* Initialize the SOUR reset value and enable the channel */
200 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, !driver->base.inverted
201 ? config->base.ccxActiveState
202 : IfxGtm_Tom_PwmHl_invertActiveState(config->base.ccxActiveState));
203 IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelMask, 0, TRUE); /* Write the SOUR outout with !SL */
204 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelMask, 0, TRUE);
205
206 /* Set the SL to the required level for run time */
207 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, driver->base.inverted
208 ? config->base.ccxActiveState
209 : IfxGtm_Tom_PwmHl_invertActiveState(config->base.ccxActiveState));
210 IfxGtm_Tom_Ch_setResetSource(driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
211 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
212 IfxGtm_Tom_Ch_setCounterValue(driver->tom, channel, IfxGtm_Tom_Timer_getOffset(driver->timer));
213
214 /*Initialize the port */
215 if (config->initPins == TRUE)
216 {
217 IfxGtm_PinMap_setTomTout(config->ccx[channelIndex],
218 config->base.outputMode, config->base.outputDriver);
219 IfxPort_setPinState(config->ccx[channelIndex]->pin.port, config->ccx[channelIndex]->pin.pinIndex, config->base.ccxActiveState ? IfxPort_State_low : IfxPort_State_high);
220 }
221
222 /* COUTX */
223 channel = config->coutx[channelIndex]->channel;
224 driver->coutx[channelIndex] = channel;
225 channelMask = 1 << (channel - maskShift);
226 channelsMask |= channelMask;
227
228 /* Initialize the timer part */
229 IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
230
231 /* Initialize the SOUR reset value, SL and enable the channel */
232 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, driver->base.inverted
233 ? IfxGtm_Tom_PwmHl_invertActiveState(config->base.coutxActiveState)
234 : config->base.coutxActiveState);
235 IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelMask, 0, TRUE);
236 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelMask, 0, TRUE);
237
238 IfxGtm_Tom_Ch_setResetSource(driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
239 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
240 IfxGtm_Tom_Ch_setCounterValue(driver->tom, channel, IfxGtm_Tom_Timer_getOffset(driver->timer));
241
242 /*Initialize the port */
243 if (config->initPins == TRUE)
244 {
245 IfxGtm_PinMap_setTomTout(config->coutx[channelIndex],
246 config->base.outputMode, config->base.outputDriver);
247 IfxPort_setPinState(config->coutx[channelIndex]->pin.port, config->coutx[channelIndex]->pin.pinIndex, config->base.coutxActiveState ? IfxPort_State_low : IfxPort_State_high);
248 }
249 }
250
251 IfxGtm_Tom_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
252
253 Ifx_TimerValue tOn[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] = {0};
254 IfxGtm_Tom_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
255
256 /* Transfer the shadow registers */
257 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, channelsMask, 0, 0, 0);
258 IfxGtm_Tom_Tgc_trigger(driver->tgc);
259 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, 0, channelsMask, 0, 0);
260
261 /* Enable timer to update the channels */
262 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
263 {
264 IfxGtm_Tom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
265 IfxGtm_Tom_Timer_addToChannelMask(timer, driver->coutx[channelIndex]);
266 }
267
268 return result;
269 }
270
271
272 void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
273 {
274 IfxStdIf_PwmHl_initConfig(&config->base);
275 config->timer = NULL_PTR;
276 config->tom = IfxGtm_Tom_0;
277 config->ccx = NULL_PTR;
278 config->coutx = NULL_PTR;
279 config->initPins = TRUE;
280 }
281
282
283 boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
284 {
285 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
286 driver->base.deadtime = value;
287
288 return TRUE;
289 }
290
291
292 boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
293 {
294 Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
295
296 driver->base.minPulse = value + driver->base.deadtime;
297 driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
298
299 return TRUE;
300 }
301
302
303 boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
304 {
305 boolean result = TRUE;
306 IfxGtm_Tom_PwmHl_Base *base = &driver->base;
307
308 if (base->mode != mode)
309 {
310 if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Tom_PwmHl_modes[mode].update == NULL_PTR))
311 {
312 mode = Ifx_Pwm_Mode_off;
313 result = FALSE;
314 }
315
316 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_Tom_PwmHl_modes[mode].mode);
317
318 base->mode = mode;
319 driver->update = IfxGtm_Tom_PwmHl_modes[mode].update;
320 driver->updateAndShift = IfxGtm_Tom_PwmHl_modes[mode].updateAndShift;
321 driver->updatePulse = IfxGtm_Tom_PwmHl_modes[mode].updatePulse;
322
323 if (base->mode != Ifx_Pwm_Mode_off)
324 {
325 base->inverted = IfxGtm_Tom_PwmHl_modes[mode].inverted;
326 }
327 else
328 { /* Keep previous inverted for off mode */
329 }
330
331 if (base->inverted)
332 {
333 driver->ccxTemp = driver->coutx;
334 driver->coutxTemp = driver->ccx;
335 }
336 else
337 {
338 driver->ccxTemp = driver->ccx;
339 driver->coutxTemp = driver->coutx;
340 }
341
342 { /* Workaround to enable the signal inversion required for center aligned inverted
343 * and right aligned modes */
344 /** \note that changing signal level may produce short circuit at the power stage,
345 * in which case the inverter must be disable during this action. */
346
347 /* Ifx_Pwm_Mode_centerAligned and Ifx_Pwm_Mode_LeftAligned use inverted=FALSE */
348 /* Ifx_Pwm_Mode_centerAlignedInverted and Ifx_Pwm_Mode_RightAligned use inverted=TRUE */
349 uint32 channelIndex;
350
351 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
352 {
353 IfxGtm_Tom_Ch channel;
354
355 channel = driver->ccx[channelIndex];
356 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, base->inverted
357 ? base->ccxActiveState
358 : IfxGtm_Tom_PwmHl_invertActiveState(driver->base.ccxActiveState));
359
360 channel = driver->coutx[channelIndex];
361 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, base->inverted
362 ? IfxGtm_Tom_PwmHl_invertActiveState(driver->base.coutxActiveState)
363 : base->coutxActiveState);
364 }
365 }
366 }
367
368 return result;
369 }
370
371
372 void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
373 {
374 driver->update(driver, tOn);
375 }
376
377
378 void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
379 {
380 driver->updateAndShift(driver, tOn, shift);
381 }
382
383
384 void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
385 {
386 driver->updatePulse(driver, tOn, offset);
387 }
388
389
390 void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
391 {
392 /* Dummy Function for StdIf compile */
393 IFX_UNUSED_PARAMETER(driver)
394 IFX_UNUSED_PARAMETER(activeCh)
395 IFX_UNUSED_PARAMETER(stuckSt)
396 }
397
398
399 boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
400 {
401 /* Ensure the stdif is reset to zeros */
402 memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
403
404 /* *INDENT-OFF* Note: this file was indented manually by the author. */
405 /* Set the API link */
406 stdif->driver = driver;
407 stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Tom_PwmHl_setDeadtime;
408 stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Tom_PwmHl_getDeadtime;
409 stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Tom_PwmHl_setMinPulse;
410 stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Tom_PwmHl_getMinPulse;
411 stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Tom_PwmHl_getMode;
412 stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Tom_PwmHl_setMode;
413 stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Tom_PwmHl_setOnTime;
414 stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Tom_PwmHl_setOnTimeAndShift;
415 stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Tom_PwmHl_setPulse;
416 stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Tom_PwmHl_setupChannels;
417 IfxGtm_Tom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
418 /* *INDENT-ON* */
419
420 return TRUE;
421 }
422
423
424 IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
425 {
426 IFX_UNUSED_PARAMETER(tOn)
427 IFX_UNUSED_PARAMETER(shift)
428
429 IfxGtm_Tom_PwmHl_updateOff(driver, NULL_PTR);
430 }
431
432
433 IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
434 {
435 uint8 channelIndex;
436 Ifx_TimerValue period;
437 Ifx_TimerValue deadtime = driver->base.deadtime;
438
439 period = driver->timer->base.period;
440
441 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
442 {
443 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
444 Ifx_TimerValue cm0, cm1;
445 x = tOn[channelIndex];
446
447 if (driver->base.inverted != FALSE)
448 {
449 x = period - x;
450 }
451 else
452 {}
453
454 if ((x < driver->base.minPulse) || (x <= deadtime))
455 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
456 x = 0;
457 }
458 else if (x > driver->base.maxPulse)
459 {
460 x = period;
461 }
462 else
463 {}
464
465 /* Special handling due to GTM issue */
466 if (x == period)
467 { /* 100% duty cycle */
468 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
469 period + 1 /* No compare event */,
470 2 /* 1st compare event (issue: expected to be 1) */ + deadtime);
471 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
472 period + 2 /* No compare event, issues has been seen with +1 */,
473 2 /* 1st compare event (issue: expected to be 1) */);
474 }
475 else if (x == 0)
476 {
477 cm0 = 1;
478 cm1 = period + 2;
479 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
480 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
481 }
482 else
483 { /* x% duty cycle */
484 cm1 = (period - x) / 2; // CM1
485 cm0 = (period + x) / 2; // CM0
486 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
487 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
488 }
489 }
490 }
491
492
493 IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
494 {
495 uint8 channelIndex;
496 Ifx_TimerValue period;
497 Ifx_TimerValue deadtime = driver->base.deadtime;
498
499 period = driver->timer->base.period;
500
501 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
502 {
503 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
504 Ifx_TimerValue cm0, cm1;
505 x = tOn[channelIndex];
506
507 if (driver->base.inverted != FALSE)
508 {
509 x = period - x;
510 }
511 else
512 {}
513
514 if ((x < driver->base.minPulse) || (x <= deadtime))
515 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
516 x = 0;
517 }
518 else if (x > driver->base.maxPulse)
519 {
520 x = period;
521 }
522 else
523 {}
524
525 /* Special handling due to GTM issue */
526 if (x == period)
527 { /* 100% duty cycle */
528 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
529 period + 1 /* No compare event */,
530 2 /* 1st compare event (issue: expected to be 1) */ + deadtime);
531 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
532 period + 2 /* No compare event, issues has been seen with +1 */,
533 2 /* 1st compare event (issue: expected to be 1) */);
534 }
535 else if (x == 0)
536 {
537 cm0 = 1;
538 cm1 = period + 2;
539 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
540 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
541 }
542 else
543 { /* x% duty cycle */
544 cm1 = 2; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
545 cm0 = x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
546 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
547 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
548 }
549 }
550 }
551
552
553 IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
554 {
555 IFX_UNUSED_PARAMETER(tOn)
556 uint8 channelIndex;
557 Ifx_TimerValue period;
558
559 period = driver->timer->base.period;
560
561 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
562 {
563 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
564 2 /* 1 will keep the previous level */, period + 2);
565 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], period + 1, 2);
566 }
567 }
568
569
570 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
571 {
572 uint8 channelIndex;
573 Ifx_TimerValue period;
574
575 period = driver->timer->base.period;
576
577 /* Top channels */
578 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
579 {
580 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
581 Ifx_TimerValue o;
582 Ifx_TimerValue cm0, cm1;
583
584 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
585 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
586
587 if (driver->base.inverted != FALSE)
588 {
589 x = period - x;
590 }
591 else
592 {}
593
594 if ((x < driver->base.minPulse) || (o > period))
595 {
596 x = 0;
597 }
598 else if ((x > driver->base.maxPulse) || (o + x > period))
599 {
600 x = period;
601 }
602 else
603 {}
604
605 /* Special handling due to GTM issue */
606 if (x == period)
607 { /* 100% duty cycle */
608 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
609 period + 1 /* No compare event */,
610 2 /* 1st compare event (issue: expected to be 1)*/);
611 }
612 else if (x == 0)
613 {
614 cm0 = 1;
615 cm1 = period + 2;
616 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
617 }
618 else
619 { /* x% duty cycle */
620 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
621 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
622 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
623 }
624 }
625
626 /* Bottom channels */
627 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
628 {
629 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
630 Ifx_TimerValue o;
631 Ifx_TimerValue cm0, cm1;
632
633 x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex + driver->base.channelCount]);
634 o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex + driver->base.channelCount]);
635
636 if (driver->base.inverted != FALSE)
637 {
638 x = period - x;
639 }
640 else
641 {}
642
643 if (x < driver->base.minPulse)
644 {
645 x = 0;
646 }
647 else if (x > driver->base.maxPulse)
648 {
649 x = period;
650 }
651 else
652 {}
653
654 /* Special handling due to GTM issue */
655 if (x == period)
656 { /* 100% duty cycle */
657 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
658 period + 2 /* No compare event, issues has been seen with +1 */,
659 2 /* 1st compare event (issue: expected to be 1)*/);
660 }
661 else if (x == 0)
662 {
663 cm0 = 1;
664 cm1 = period + 2;
665 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0, cm1);
666 }
667 else
668 { /* x% duty cycle */
669 cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
670 cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
671 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0, cm1);
672 }
673 }
674 }
675
676
677 IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
678 {
679 IFX_UNUSED_PARAMETER(tOn)
680 IFX_UNUSED_PARAMETER(offset)
681 IfxGtm_Tom_PwmHl_updateOff(driver, NULL_PTR);
682 }
683
684
685 IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
686 {
687 uint8 channelIndex;
688 Ifx_TimerValue period;
689 Ifx_TimerValue deadtime = driver->base.deadtime;
690
691 period = driver->timer->base.period;
692
693 for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
694 {
695 Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
696 Ifx_TimerValue s; /* Shift value */
697 Ifx_TimerValue cm0, cm1;
698 x = tOn[channelIndex];
699
700 if (driver->base.inverted != FALSE)
701 {
702 x = period - x;
703 }
704 else
705 {}
706
707 if ((x < driver->base.minPulse) || (x <= deadtime))
708 { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
709 x = 0;
710 }
711 else if (x > driver->base.maxPulse)
712 {
713 x = period;
714 }
715 else
716 {}
717
718 /* Special handling due to GTM issue */
719 if (x == period)
720 { /* 100% duty cycle */
721 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
722 period + 1 /* No compare event */,
723 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
724 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
725 period + 2 /* No compare event, issues has been seen with +1 */,
726 2 /* 1st compare event (issue: expected to be 1)*/);
727 }
728 else if (x == 0)
729 {
730 cm0 = 1;
731 cm1 = period + 2;
732 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
733 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
734 }
735 else
736 { /* x% duty cycle */
737 s = shift[channelIndex];
738
739 if (s > 0)
740 {
741 s = __minX(s, (period - x) / 2 - 1);
742 }
743 else
744 {
745 s = __maxX(s, (x - period) / 2 + 1);
746 }
747
748 cm1 = s + (period - x) / 2; // CM1
749 cm0 = s + (period + x) / 2; // CM0
750 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
751 IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
752 }
753 }
754 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
IfxGtm_Tom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Tom_ToutMapP * coutx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:176
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:98
IfxGtm_Tom_Timer_addToChannelMask
void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:73
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:133
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:331
IfxGtm_Tom_PwmHl_getMinPulse
float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:137
IfxGtm_Tom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Tom_PwmHl.h:155
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:146
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:163
IfxGtm_Tom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Tom_PwmHl.h:161
IfxGtm_Tom_PwmHl_setMinPulse
boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:292
IfxGtm_Tom_PwmHl_setPulse
void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Tom_PwmHl.c:384
IfxGtm_Tom_PwmHl_setDeadtime
boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Tom_PwmHl.c:283
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:169
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:304
IfxGtm_Tom_PwmHl_s::base
IfxGtm_Tom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:196
IfxGtm_Tom_PwmHl_updatePulse
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Update Pulse.
Definition: IfxGtm_Tom_PwmHl.c:570
IfxGtm_Tom_PwmHl_updateCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in center aligned and center aligned inverted modes.
Definition: IfxGtm_Tom_PwmHl.c:433
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:713
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:155
IfxGtm_Tom_PwmHl_updateAndShiftOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets switched to OFF.
Definition: IfxGtm_Tom_PwmHl.c:424
Ifx_Pwm_Mode_centerAligned
Center aligned mode.
Definition: Ifx_Types.h:160
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:418
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:312
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:151
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:136
IfxGtm_Tom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Tom_PwmHl.h:172
IfxGtm_Tom_PwmHl_stdIfPwmHlInit
boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Tom_PwmHl.c:399
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:101
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:182
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:429
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:160
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:168
Ifx_Assert.h
Assert functions.
__maxX
#define __maxX
Definition: IfxCpu_IntrinsicsDcc.h:1580
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:157
IfxGtm_Tom_PwmHl_setOnTimeAndShift
void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Tom_PwmHl.c:378
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:131
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Tom_PwmHl_getDeadtime
float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Tom_PwmHl.c:131
IfxGtm_Tom_PwmHl.h
GTM PWMHL details.
IfxGtm_Tom_PwmHl_setMode
boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Tom_PwmHl.c:303
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxGtm_Tom_PwmHl_getMode
Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Tom_PwmHl.c:143
IfxGtm_Tom_PwmHl_setupChannels
void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Tom_PwmHl.c:390
IfxGtm_Tom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:158
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:132
IfxGtm_Tom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Tom_PwmHl.h:157
IfxGtm_Tom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Tom_PwmHl.h:156
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:164
IfxGtm_Tom_PwmHl_invertActiveState
IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
Inverts the active state.
Definition: IfxGtm_Tom_PwmHl.c:121
IfxGtm_Tom_PwmHl_s::coutx
IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the OUTX outputs.
Definition: IfxGtm_Tom_PwmHl.h:204
IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration.
Definition: IfxGtm_Tom_PwmHl.h:170
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:185
Ifx_Pwm_Mode_leftAligned
Left aligned mode. The PWM period starts with a rising edge.
Definition: Ifx_Types.h:162
IfxGtm_Tom_ToutMap::pin
IfxPort_Pin pin
Port pin.
Definition: IfxGtm_PinMap.h:105
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:87
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:93
IfxGtm_Tom_PwmHl_initConfig
void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Tom_PwmHl.c:272
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:183
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxGtm_Tom_PwmHl_s::ccxTemp
IfxGtm_Tom_Ch * ccxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:205
Ifx_Pwm_Mode_init
Initialisation mode, do not use at run time.
Definition: Ifx_Types.h:165
IfxGtm_Tom_Ch_setCompareShadow
void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
Sets the compare 0 and 1 shadow values.
Definition: IfxGtm_Tom.c:225
IfxGtm_Tom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:159
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:155
IfxGtm_Tom_PwmHl_modes
IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off+1]
Definition: IfxGtm_Tom_PwmHl.c:109
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
Ifx_Pwm_Mode_off
All switch open.
Definition: Ifx_Types.h:164
__minX
#define __minX
Definition: IfxCpu_IntrinsicsDcc.h:1576
IfxGtm_Tom_Timer_stdIfTimerInit
boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:384
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:250
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:85
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:147
IfxGtm_Tom_PwmHl_updatePulseOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Set Pulse to OFF.
Definition: IfxGtm_Tom_PwmHl.c:677
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:572
IfxGtm_Tom_PwmHl_init
boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Tom_PwmHl.c:149
IfxGtm_Tom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Tom_PwmHl.h:154
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
Ifx_Pwm_Mode_centerAlignedInverted
Center aligned inverted aligned mode.
Definition: Ifx_Types.h:161
IfxGtm_Tom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Tom_PwmHl.h:153
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:177
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:102
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:535
Ifx_Pwm_Mode_rightAligned
Right aligned mode. The PWM period starts with a falling edge.
Definition: Ifx_Types.h:163
IfxGtm_Tom_PwmHl_s::update
IfxGtm_Tom_PwmHl_Update update
Update function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:198
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:28
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:143
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:186
IfxGtm_Tom_PwmHl_s::updatePulse
IfxGtm_Tom_PwmHl_UpdatePulse updatePulse
Update pulse function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:200
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:179
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:166
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:69
IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver.
Definition: IfxGtm_Tom_PwmHl.h:194
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:156
IfxGtm_Tom_PwmHl_s::timer
IfxGtm_Tom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Tom_PwmHl.h:197
IfxGtm_Tom_PwmHl_updateShiftCenterAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Update Shift Center Aligned.
Definition: IfxGtm_Tom_PwmHl.c:685
IfxGtm_Tom_PwmHl_s::tgc
Ifx_GTM_TOM_TGC * tgc
TGC unit used.
Definition: IfxGtm_Tom_PwmHl.h:202
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:178
IfxGtm_Tom_PwmHl_s::tom
Ifx_GTM_TOM * tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:201
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:171
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:78
IfxGtm_Tom_PwmHl_s::coutxTemp
IfxGtm_Tom_Ch * coutxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:206
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:192
IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Tom_PwmHl.h:183
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:162
IfxGtm_Tom_Ch_getClockSource
IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the channel clock source.
Definition: IfxGtm_Tom.c:75
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:513
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:447
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxGtm_Tom_PwmHl_s::ccx
IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the CCCX outputs.
Definition: IfxGtm_Tom_PwmHl.h:203
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:260
IfxGtm_Tom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Tom_PwmHl.h:160
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:116
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:145
IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited...
Definition: IfxGtm_Tom_PwmHl.h:129
IfxGtm_Tom_PwmHl_setOnTime
void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Tom_PwmHl.c:372
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:161
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:165
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:124
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:77
IfxGtm_Tom_PwmHl_s::updateAndShift
IfxGtm_Tom_PwmHl_UpdateShift updateAndShift
Update shift function for actual selected mode.
Definition: IfxGtm_Tom_PwmHl.h:199
IfxGtm_Tom_PwmHl_Config::tom
IfxGtm_Tom tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:174
IfxGtm_Tom_PwmHl_updateEdgeAligned
IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Updates the x output duty cycle in edge aligned modes (left and right aligned)
Definition: IfxGtm_Tom_PwmHl.c:493
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:429
TRUE
#define TRUE
Definition: Platform_Types.h:87
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:150
IfxGtm_Tom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver: user handles separately...
Definition: IfxGtm_Tom_PwmHl.h:177
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm_Tom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Tom_ToutMapP * ccx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:175
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:109
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:64
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:167
IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:151
IfxGtm_Tom_Timer_getOffset
Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:133
IfxGtm_Tom_PwmHl_updateOff
IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Set the outputs to inactive.
Definition: IfxGtm_Tom_PwmHl.c:553


iLLD_TC26B: IfxGtm_Tom_PwmHl.h Source File

  • Gtm
  • Tom
  • PwmHl
IfxGtm_Tom_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_PwmHl.h
3 * \brief GTM PWMHL details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Tom_PwmHl_Usage How to use the GTM TOM PWM Driver
25 * \ingroup IfxLld_Gtm_Tom_PwmHl
26 *
27 * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
28 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
29 *
30 * \section specific Specific implementation
31 * The PWM driver is a concatenation of a \ref IfxLld_Gtm_Tom_Timer "timer" with additional PWM generation cells.
32 *
33 * The timer is implemented as described in \ref IfxLld_Gtm_Tom_Timer, it generate an internal trigger
34 * that is used to synchronize all the TOM channel used (shown in red in the pictures below).
35 *
36 * The picture below presents two configuration examples:
37 * - On the left, the timer and trigger are generated using the same TOM channel CH0. The 3 dual-complementary
38 * PWMs, CCx and COUTx, are generated using 6 additional TOM channels (CH1 to Ch6).
39 * - On the right, the timer and the trigger uses separate TOM channels to allow the triggering of the ADC
40 * conversions. The order of the CCx and COUTx has been allocated freely between CH9 up to CH14.
41 *
42 * \image html "IfxGtm_Tom_PwmHl-0.png" "PWM implementations on GTM TOM"
43 *
44 *
45 * Each of the TOM channel used for the generation of the CCx and COUTx signals are configured as in the figure below:
46 *
47 * \image html "IfxGtm_Tom_PwmHl-1.png" "TOM channel configuration".
48 *
49 * The internal trigger (red line) is generated by the \ref IfxLld_Gtm_Tom_Timer "timer" on timer rest and used by the
50 * TOM PWM channels to reset the counters CN0 and transfer the shadow values saved in SR0 and SR1 to the
51 * CM0 and CM1 registers. When the counter CN0 reach the values of the CM0 or CM1 compare registers,
52 * a rising or falling edge is generated on the output PWM signal. The signal active state configuration
53 * define which of the CM0 or CM1 is generating the falling or rising edge.
54 *
55 * This trigger mechanism ensure that all the PWM channels, period and trigger are updated at the
56 * exact same time, avoiding any possibility for glitch or incoherent signals.
57 *
58 * The clock use is the same as the timer clock.
59 *
60 * In order to ensure a coherent update of all registers, the internal trigger must be disable before updating
61 * the timer, trigger and PWM duty cycles shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.
62 *
63 * \subsection features Features
64 * - This implementation allows from 1 up to 3 dual-complementary PWM channels.
65 * - Resources used:
66 * - Additionally to the linked timer resources used, the following resources are used:
67 * - 2 TOM channels per PWM channels
68 * - All TOM channels used must be own by the same TOM and TGC as for the linked timer
69 * - The TOM channel used for the timer must always have a lower index than the TOM channels
70 * used for the pwm.
71 * - All TOM channels used (including the timer and the trigger) must be contiguous but the order of the TOM channels is free.
72 *
73 *
74 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Tom_PwmHl_init().
75 *
76 * \section example Usage Example
77 * Initialisation is done by, e.g:
78 * \code
79 * IfxGtm_Tom_PwmHl_Config driverConfig;
80 * IfxGtm_Tom_PwmHl driverData;
81 * IfxStdIf_PwmHl pwmhl;
82 * IfxGtm_Tom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
83 * IfxGtm_Tom_PwmHl_init(&driverData, &driverConfig);
84 * IfxGtm_Tom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
85 * \endcode
86 *
87 * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
88 * \code
89 * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
90 * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
91 *
92 * onTime[0] = 10;
93 * onTime[1] = 20;
94 * onTime[2] = 30;
95 *
96 * IfxStdIf_Timer_disableUpdate(timer);
97 * IfxStdIf_Timer_setPeriod(timer, period);
98 * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
99 * IfxStdIf_Timer_applyUpdate(timer);
100 * \endcode
101 *
102 * \defgroup IfxLld_Gtm_Tom_PwmHl TOM PWM HL Interface Driver
103 * \ingroup IfxLld_Gtm_Tom
104 * \defgroup IfxLld_Gtm_Tom_PwmHl_Data_Structures Data Structures
105 * \ingroup IfxLld_Gtm_Tom_PwmHl
106 * \defgroup IfxLld_Gtm_Tom_PwmHl_PwmHl_Functions PwmHl Functions
107 * \ingroup IfxLld_Gtm_Tom_PwmHl
108 * \defgroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions PwmHl StdIf Functions
109 * \ingroup IfxLld_Gtm_Tom_PwmHl
110 */
111
112 #ifndef IFXGTM_TOM_PWMHL_H
113 #define IFXGTM_TOM_PWMHL_H 1
114
115 /******************************************************************************/
116 /*----------------------------------Includes----------------------------------*/
117 /******************************************************************************/
118
119 #include "StdIf/IfxStdIf_PwmHl.h"
120 #include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
121
122 /******************************************************************************/
123 /*-----------------------------------Macros-----------------------------------*/
124 /******************************************************************************/
125
126 /** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
127 * Limited to 3 because the PWM channels used must be owned by the same TGC
128 */
129 #define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)
130
131 /******************************************************************************/
132 /*------------------------------Type Definitions------------------------------*/
133 /******************************************************************************/
134
135 typedef struct IfxGtm_Tom_PwmHl_s IfxGtm_Tom_PwmHl;
136
137 typedef void (*IfxGtm_Tom_PwmHl_Update)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
138
139 typedef void (*IfxGtm_Tom_PwmHl_UpdateShift)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
140
141 typedef void (*IfxGtm_Tom_PwmHl_UpdatePulse)(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
142
143 /******************************************************************************/
144 /*-----------------------------Data Structures--------------------------------*/
145 /******************************************************************************/
146
147 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_Data_Structures
148 * \{ */
149 /** \brief Multi-channels PWM object definition (channels only)
150 */
151 typedef struct
152 {
153 Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
154 Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
155 Ifx_TimerValue maxPulse; /**< \brief internal parameter */
156 Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
157 sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
158 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
159 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
160 boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
161 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
162 } IfxGtm_Tom_PwmHl_Base;
163
164 /** \} */
165
166 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_Data_Structures
167 * \{ */
168 /** \brief GTM TOM: PWM HL configuration
169 */
170 typedef struct
171 {
172 IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
173 IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
174 IfxGtm_Tom tom; /**< \brief TOM unit used */
175 IFX_CONST IfxGtm_Tom_ToutMapP *ccx; /**< \brief Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important. */
176 IFX_CONST IfxGtm_Tom_ToutMapP *coutx; /**< \brief Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important */
177 boolean initPins; /**< \brief TRUE: Initialize pins in driver
178 * FALSE: Don't initialize pins in driver: user handles separately */
179 } IfxGtm_Tom_PwmHl_Config;
180
181 /** \brief Structure for PWM configuration
182 */
183 typedef struct
184 {
185 Ifx_Pwm_Mode mode; /**< \brief Pwm Mode */
186 boolean inverted; /**< \brief Inverted configuration for the selected mode */
187 IfxGtm_Tom_PwmHl_Update update; /**< \brief update call back function for the selected mode */
188 IfxGtm_Tom_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
189 IfxGtm_Tom_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
190 } IfxGtm_Tom_PwmHl_Mode;
191
192 /** \brief GTM TOM PWM driver
193 */
194 struct IfxGtm_Tom_PwmHl_s
195 {
196 IfxGtm_Tom_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
197 IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
198 IfxGtm_Tom_PwmHl_Update update; /**< \brief Update function for actual selected mode */
199 IfxGtm_Tom_PwmHl_UpdateShift updateAndShift; /**< \brief Update shift function for actual selected mode */
200 IfxGtm_Tom_PwmHl_UpdatePulse updatePulse; /**< \brief Update pulse function for actual selected mode */
201 Ifx_GTM_TOM *tom; /**< \brief TOM unit used */
202 Ifx_GTM_TOM_TGC *tgc; /**< \brief TGC unit used */
203 IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the CCCX outputs */
204 IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the OUTX outputs */
205 IfxGtm_Tom_Ch *ccxTemp; /**< \brief cached value */
206 IfxGtm_Tom_Ch *coutxTemp; /**< \brief cached value */
207 };
208
209 /** \} */
210
211 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_Functions
212 * \{ */
213
214 /******************************************************************************/
215 /*-------------------------Global Function Prototypes-------------------------*/
216 /******************************************************************************/
217
218 /** \brief Initializes the timer object
219 * note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
220 * Note: all PWM channels must use the same TGC
221 * Note: the current implementation must use the same TGC for the timer and PWM channels
222 * \param driver GTM TOM PWM driver
223 * \param config GTM TOM: PWM HL configuration
224 * \return TRUE on success else FALSE
225 */
226 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config);
227
228 /** \brief Initialize the configuration structure to default
229 * \param config Channel configuration. This parameter is Initialised by the function
230 * \return None
231 */
232 IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config);
233
234 /** \} */
235
236 /** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions
237 * \{ */
238
239 /******************************************************************************/
240 /*-------------------------Global Function Prototypes-------------------------*/
241 /******************************************************************************/
242
243 /** \brief Returns the dead time
244 * \see IfxStdIf_PwmHl_GetDeadtime
245 * \param driver GTM TOM PWM driver
246 * \return Dead Time
247 */
248 IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver);
249
250 /** \brief Returns the minimum pulse
251 * \see IfxStdIf_PwmHl_GetMinPulse
252 * \param driver GTM TOM PWM driver
253 * \return Min Pulse
254 */
255 IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver);
256
257 /** \brief Returns Pwm mode
258 * \see IfxStdIf_PwmHl_GetMode
259 * \param driver GTM TOM PWM driver
260 * \return Pwm mode
261 */
262 IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver);
263
264 /** \brief Sets the dead time
265 * \see IfxStdIf_PwmHl_setDeadtime
266 * \param driver GTM TOM PWM driver
267 * \param deadtime Dead time value
268 * \return TRUE on success else FALSE
269 */
270 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime);
271
272 /** \brief Sets the minimum pulse
273 * \see IfxStdIf_PwmHl_setMinPulse
274 * \param driver GTM TOM PWM driver
275 * \param minPulse Minimum pulse
276 * \return TRUE on success else FALSE
277 */
278 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse);
279
280 /** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
281 * \see IfxStdIf_PwmHl_SetMode
282 * \param driver GTM TOM PWM driver
283 * \param mode Pwm mode
284 * \return TRUE on success else FALSE
285 */
286 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode);
287
288 /** \brief Sets the ON time
289 * \see IfxStdIf_PwmHl_SetOnTime
290 * \param driver GTM TOM PWM driver
291 * \param tOn ON time
292 * \return None
293 */
294 IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
295
296 /** \brief Sets the ON time and Shift
297 * \param driver GTM TOM PWM driver
298 * \param tOn ON time
299 * \param shift Shift value in ticks
300 * \return None
301 */
302 IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
303
304 /** \brief Sets the ON time and offset, all switched are independent
305 * \param driver GTM TOM PWM driver
306 * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
307 * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
308 * \return None
309 */
310 IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
311
312 /** \brief Set up channels
313 * \see IfxStdIf_PwmHl_SetupChannels
314 * \param driver GTM TOM PWM driver
315 * \param activeCh Active channel
316 * \param stuckSt Stuck state
317 * \return None
318 */
319 IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
320
321 /** \brief Initialises the statndard interface Pwm
322 * \param stdif Standard interface object, will be initialized by the function
323 * \param driver Interface driver to be used by the standard interface. must be initialised separately
324 * \return TRUE on success else FALSE
325 */
326 IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver);
327
328 /** \} */
329
330 #endif /* IFXGTM_TOM_PWMHL_H */
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
IfxGtm_Tom_PwmHl_Config::coutx
IFX_CONST IfxGtm_Tom_ToutMapP * coutx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:176
IfxGtm_Tom_PwmHl_getMinPulse
IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
Returns the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:137
IfxGtm_Tom_PwmHl_Base::maxPulse
Ifx_TimerValue maxPulse
internal parameter
Definition: IfxGtm_Tom_PwmHl.h:155
IfxGtm_Tom_PwmHl_Base::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxGtm_Tom_PwmHl.h:161
IfxGtm_Tom_PwmHl_setMinPulse
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
Sets the minimum pulse.
Definition: IfxGtm_Tom_PwmHl.c:292
IfxGtm_Tom_PwmHl_setPulse
IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Sets the ON time and offset, all switched are independent.
Definition: IfxGtm_Tom_PwmHl.c:384
IfxGtm_Tom_PwmHl_setDeadtime
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
Sets the dead time.
Definition: IfxGtm_Tom_PwmHl.c:283
IfxGtm_Tom_PwmHl_s::base
IfxGtm_Tom_PwmHl_Base base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:196
IfxGtm_Tom_PwmHl_Config::base
IfxStdIf_PwmHl_Config base
PWM HL standard interface configuration.
Definition: IfxGtm_Tom_PwmHl.h:172
IfxGtm_Tom_PwmHl_stdIfPwmHlInit
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
Initialises the statndard interface Pwm.
Definition: IfxGtm_Tom_PwmHl.c:399
float32
float float32
Definition: Platform_Types.h:167
IfxGtm_Tom_PwmHl_Update
void(* IfxGtm_Tom_PwmHl_Update)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Definition: IfxGtm_Tom_PwmHl.h:137
IfxGtm_Tom_PwmHl_setOnTimeAndShift
IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Sets the ON time and Shift.
Definition: IfxGtm_Tom_PwmHl.c:378
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxGtm_Tom_PwmHl_getDeadtime
IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
Returns the dead time.
Definition: IfxGtm_Tom_PwmHl.c:131
IfxGtm_Tom_PwmHl_setMode
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
Definition: IfxGtm_Tom_PwmHl.c:303
IfxGtm_Tom_PwmHl_getMode
IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
Returns Pwm mode.
Definition: IfxGtm_Tom_PwmHl.c:143
IfxGtm_Tom_PwmHl_setupChannels
IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
Set up channels.
Definition: IfxGtm_Tom_PwmHl.c:390
IfxGtm_Tom_PwmHl_Base::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:158
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxGtm_Tom_PwmHl_Base::setMode
sint8 setMode
A non zero flag indicates that the PWM mode is being modified.
Definition: IfxGtm_Tom_PwmHl.h:157
IfxGtm_Tom_PwmHl_Base::mode
Ifx_Pwm_Mode mode
actual PWM mode
Definition: IfxGtm_Tom_PwmHl.h:156
IfxGtm_Tom_PwmHl_s::coutx
IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the OUTX outputs.
Definition: IfxGtm_Tom_PwmHl.h:204
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Tom_PwmHl_Config
GTM TOM: PWM HL configuration.
Definition: IfxGtm_Tom_PwmHl.h:170
IfxGtm_Tom_PwmHl_initConfig
IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
Initialize the configuration structure to default.
Definition: IfxGtm_Tom_PwmHl.c:272
IfxGtm_Tom_PwmHl_s::ccxTemp
IfxGtm_Tom_Ch * ccxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:205
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:175
IfxGtm_Tom_PwmHl_Base::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxGtm_Tom_PwmHl.h:159
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:182
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:155
IfxGtm_Tom_PwmHl_UpdatePulse
void(* IfxGtm_Tom_PwmHl_UpdatePulse)(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
Definition: IfxGtm_Tom_PwmHl.h:141
IfxGtm_Tom_PwmHl_init
IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
Initializes the timer object note To ensure that the channels counter are reset by the timer and do n...
Definition: IfxGtm_Tom_PwmHl.c:149
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:99
IfxGtm_Tom_PwmHl_Base::minPulse
Ifx_TimerValue minPulse
minimum pulse that is output, shorter pulse time will be output as 0% duty cycle
Definition: IfxGtm_Tom_PwmHl.h:154
IfxGtm_Tom_PwmHl_Base::deadtime
Ifx_TimerValue deadtime
Dead time between the top and bottom channel in ticks.
Definition: IfxGtm_Tom_PwmHl.h:153
IfxGtm_Tom_PwmHl_Mode::update
IfxGtm_Tom_PwmHl_Update update
update call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:187
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:143
IfxGtm_Tom_PwmHl_Mode::updatePulse
IfxGtm_Tom_PwmHl_UpdatePulse updatePulse
update pulse call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:189
IfxGtm_Tom_PwmHl_s
GTM TOM PWM driver.
Definition: IfxGtm_Tom_PwmHl.h:194
IfxGtm_Tom_PwmHl_Config::timer
IfxGtm_Tom_Timer * timer
Pointer to the linked timer object.
Definition: IfxGtm_Tom_PwmHl.h:173
IfxGtm_Tom_PwmHl_s::tgc
Ifx_GTM_TOM_TGC * tgc
TGC unit used.
Definition: IfxGtm_Tom_PwmHl.h:202
IfxGtm_Tom_PwmHl_s::tom
Ifx_GTM_TOM * tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:201
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:258
IfxGtm_Tom_PwmHl_s::coutxTemp
IfxGtm_Tom_Ch * coutxTemp
cached value
Definition: IfxGtm_Tom_PwmHl.h:206
IfxGtm_Tom_PwmHl_Mode
Structure for PWM configuration.
Definition: IfxGtm_Tom_PwmHl.h:183
IfxGtm_Tom_PwmHl_s::ccx
IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]
TOM channels used for the CCCX outputs.
Definition: IfxGtm_Tom_PwmHl.h:203
IfxGtm_Tom_PwmHl_Base::inverted
boolean inverted
Flag indicating the center aligned inverted mode (TRUE)
Definition: IfxGtm_Tom_PwmHl.h:160
IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS
Maximal number of channels handled by the driver. One channel has a top and bottom pwm output Limited...
Definition: IfxGtm_Tom_PwmHl.h:129
IfxGtm_Tom_PwmHl_setOnTime
IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
Sets the ON time.
Definition: IfxGtm_Tom_PwmHl.c:372
IfxGtm_Tom_PwmHl_Mode::updateAndShift
IfxGtm_Tom_PwmHl_UpdateShift updateAndShift
update shift call back function for the selected mode
Definition: IfxGtm_Tom_PwmHl.h:188
IfxGtm_Tom_PwmHl_Config::tom
IfxGtm_Tom tom
TOM unit used.
Definition: IfxGtm_Tom_PwmHl.h:174
IfxGtm_Tom_PwmHl_UpdateShift
void(* IfxGtm_Tom_PwmHl_UpdateShift)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Definition: IfxGtm_Tom_PwmHl.h:139
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxGtm_Tom_PwmHl_Config::initPins
boolean initPins
TRUE: Initialize pins in driver FALSE: Don&#39;t initialize pins in driver: user handles separately...
Definition: IfxGtm_Tom_PwmHl.h:177
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm_Tom_PwmHl_Config::ccx
IFX_CONST IfxGtm_Tom_ToutMapP * ccx
Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for c...
Definition: IfxGtm_Tom_PwmHl.h:175
sint8
signed char sint8
Definition: Platform_Types.h:122
IfxGtm_Tom_PwmHl_Base
Multi-channels PWM object definition (channels only)
Definition: IfxGtm_Tom_PwmHl.h:151
IfxGtm_Tom_Timer.h
GTM TIMER details.


iLLD_TC26B: IfxGtm_Tom_Timer.c Source File

  • Gtm
  • Tom
  • Timer
IfxGtm_Tom_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Timer.c
3 * \brief GTM TIMER details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Tom_Timer.h"
30 #include "_Utilities/Ifx_Assert.h"
31 #include "IfxGtm_bf.h"
32 #include "stddef.h"
33 #include "string.h"
34
35 /******************************************************************************/
36 /*-------------------------Function Implementations---------------------------*/
37 /******************************************************************************/
38
39 boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
40 {
41 boolean event;
42
43 event = IfxGtm_Tom_Ch_isZeroNotification(driver->tom, driver->timerChannel);
44
45 if (event)
46 {
47 IfxGtm_Tom_Ch_clearZeroNotification(driver->tom, driver->timerChannel);
48 }
49 else
50 {}
51
52 return event;
53 }
54
55
56 boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
57 {
58 boolean event;
59
60 event = IfxGtm_Tom_Ch_isOneNotification(driver->tom, driver->triggerChannel);
61
62 if (event)
63 {
64 IfxGtm_Tom_Ch_clearOneNotification(driver->tom, driver->triggerChannel);
65 }
66 else
67 {}
68
69 return event;
70 }
71
72
73 void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
74 {
75 if (driver->timerChannel <= IfxGtm_Tom_Ch_7)
76 {
77 if (channel <= IfxGtm_Tom_Ch_7)
78 {
79 driver->channelsMask[0] |= 1 << channel;
80 driver->tgcGlobalControlDisableUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[0], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
81 driver->tgcGlobalControlApplyUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[0], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
82 }
83 else
84 {
85 driver->channelsMask[1] |= 1 << (channel - IfxGtm_Tom_Ch_8);
86 driver->tgcGlobalControlDisableUpdate[1] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[1], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
87 driver->tgcGlobalControlApplyUpdate[1] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[1], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
88 }
89 }
90 else
91 {
92 driver->channelsMask[0] |= 1 << (channel - IfxGtm_Tom_Ch_8);
93 driver->tgcGlobalControlDisableUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[0], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
94 driver->tgcGlobalControlApplyUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[0], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
95 }
96 }
97
98
99 void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
100 {
101 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[0], driver->tgcGlobalControlApplyUpdate[0]);
102
103 if (driver->tgc[1])
104 {
105 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[1], driver->tgcGlobalControlApplyUpdate[1]); /* Note: Write of 0 value has no effect */
106 }
107 }
108
109
110 void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
111 {
112 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[0], driver->tgcGlobalControlDisableUpdate[0]);
113
114 if (driver->tgc[1])
115 {
116 IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[1], driver->tgcGlobalControlDisableUpdate[1]); /* Note: Write of 0 value has no effect */
117 }
118 }
119
120
121 float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
122 {
123 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
124 }
125
126
127 float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
128 {
129 return driver->base.clockFreq;
130 }
131
132
133 Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
134 {
135 return driver->offset;
136 }
137
138
139 Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
140 {
141 return driver->base.period;
142 }
143
144
145 volatile uint32 *IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
146 {
147 return IfxGtm_Tom_Ch_getTimerPointer(driver->tom, driver->timerChannel);
148 }
149
150
151 float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
152 {
153 return 1.0 / driver->base.clockFreq;
154 }
155
156
157 Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
158 {
159 return IfxGtm_Tom_Ch_getCompareOne(driver->tom, driver->triggerChannel) - 1;
160 }
161
162
163 volatile uint32 *IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
164 {
165 return IfxGtm_Tom_Ch_getCompareOnePointer(driver->tom, driver->triggerChannel);
166 }
167
168
169 boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
170 {
171 boolean result = TRUE;
172 IfxGtm_Tom_Timer_Base *base = &driver->base;
173 uint16 maskShift;
174
175 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
176
177 driver->gtm = config->gtm;
178 driver->tomIndex = config->tom;
179 driver->tom = &config->gtm->TOM[config->tom];
180 driver->timerChannel = config->timerChannel;
181
182 base->triggerEnabled = config->base.trigger.enabled;
183
184 if (base->triggerEnabled)
185 {
186 if (config->triggerOut != NULL_PTR)
187 {
188 driver->triggerChannel = config->triggerOut->channel;
189 }
190 else
191 {
192 result = FALSE;
193 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result); /* triggerOut is required */
194 }
195 }
196 else
197 {
198 driver->triggerChannel = driver->timerChannel; // Set to timer channel to disable its use
199 }
200
201 if (config->timerChannel <= 7)
202 {
203 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
204 driver->tgc[1] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
205 }
206 else
207 {
208 driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
209 driver->tgc[1] = NULL_PTR; /* NOTE currently no concatenation between TOMs */
210 }
211
212 driver->channelsMask[0] = 0;
213 driver->tgcGlobalControlApplyUpdate[0] = 0;
214 driver->tgcGlobalControlDisableUpdate[0] = 0;
215
216 driver->channelsMask[1] = 0;
217 driver->tgcGlobalControlApplyUpdate[1] = 0;
218 driver->tgcGlobalControlDisableUpdate[1] = 0;
219
220 /* Initialize the timer part */
221 IfxGtm_Tom_Ch_setClockSource(driver->tom, driver->timerChannel, config->clock);
222 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, driver->timerChannel, IfxGtm_Tom_Ch_OutputTrigger_generate);
223
224 IfxGtm_Tom_Timer_updateInputFrequency(driver);
225
226 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
227 {
228 result = FALSE;
229 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
230 }
231 else
232 {}
233
234 IfxGtm_Tom_Timer_setFrequency(driver, config->base.frequency);
235
236 driver->offset = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / config->base.frequency * config->base.startOffset);
237
238 IfxGtm_Tom_Ch_setCounterValue(driver->tom, driver->timerChannel, driver->offset);
239
240 /* Initialize the trigger part */
241 maskShift = (config->timerChannel <= 7) ? 0 : 8;
242 IfxGtm_Tom_Timer_addToChannelMask(driver, driver->timerChannel);
243
244 if (base->triggerEnabled)
245 {
246 IfxGtm_Tom_Ch triggerChannel = driver->triggerChannel;
247 uint16 triggerChannelMask = 1 << (triggerChannel - maskShift);
248 /* TO DO: enable the trigger to be not in the same TGC group as the timer */
249
250 IfxGtm_Tom_Ch_setSignalLevel(driver->tom, triggerChannel, config->base.trigger.risingEdgeAtPeriod ? Ifx_ActiveState_high : Ifx_ActiveState_low);
251 IfxGtm_Tom_Ch_setCounterValue(driver->tom, triggerChannel, driver->offset);
252
253 if (triggerChannel != driver->timerChannel)
254 {
255 IfxGtm_Tom_Ch_setResetSource(driver->tom, triggerChannel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
256 IfxGtm_Tom_Ch_setClockSource(driver->tom, triggerChannel, config->clock);
257 IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, triggerChannel, IfxGtm_Tom_Ch_OutputTrigger_forward);
258 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], triggerChannelMask, 0, FALSE);
259 IfxGtm_Tom_Timer_addToChannelMask(driver, driver->triggerChannel);
260 }
261 else
262 {}
263
264 /* Signal must go out of the GTM even if the port outpout is not enabled */
265 IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc[0], triggerChannelMask, 0, FALSE);
266
267 if ((config->base.trigger.outputEnabled) && (config->initPins == TRUE))
268 {
269 /* Initialize the port */
270 IfxGtm_PinMap_setTomTout(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
271 }
272 else
273 {}
274
275 IfxGtm_Tom_Timer_setTrigger(driver, config->base.trigger.triggerPoint);
276 }
277 else
278 {}
279
280 /* Interrupt configuration */
281 {
282 volatile Ifx_SRC_SRCR *src;
283 boolean timerHasIrq = config->base.isrPriority > 0;
284 boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
285
286 if (driver->triggerChannel == driver->timerChannel)
287 {
288 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->timerChannel, timerHasIrq ? config->irqModeTimer : config->irqModeTrigger, timerHasIrq, triggerHasIrq);
289 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->timerChannel);
290 IfxSrc_init(src, timerHasIrq ? config->base.isrProvider : config->base.trigger.isrProvider, timerHasIrq ? config->base.isrPriority : config->base.trigger.isrPriority);
291 IfxSrc_enable(src);
292 }
293 else
294 {
295 IfxGtm_IrqMode irqMode = IfxGtm_IrqMode_pulseNotify;
296
297 if (timerHasIrq)
298 {
299 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->timerChannel, irqMode, TRUE, FALSE);
300 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->timerChannel);
301 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
302 IfxSrc_enable(src);
303 }
304
305 if (triggerHasIrq)
306 {
307 IfxGtm_Tom_Ch_setNotification(driver->tom, driver->triggerChannel, irqMode, FALSE, TRUE);
308 src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->triggerChannel);
309 IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
310 IfxSrc_enable(src);
311 }
312 }
313 }
314
315 /* Transfer the shadow registers */
316 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc[0], driver->channelsMask[0], 0, 0, 0);
317 IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
318 IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc[0], 0, driver->channelsMask[0], 0, 0);
319
320 return result;
321 }
322
323
324 void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
325 {
326 IfxStdIf_Timer_initConfig(&config->base);
327 config->gtm = gtm;
328 config->tom = IfxGtm_Tom_0;
329 config->timerChannel = IfxGtm_Tom_Ch_0;
330 config->triggerOut = NULL_PTR;
331 config->clock = IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0;
332 config->base.countDir = IfxStdIf_Timer_CountDir_up;
333 config->irqModeTimer = IfxGtm_IrqMode_level;
334 config->irqModeTrigger = IfxGtm_IrqMode_level;
335 config->initPins = TRUE;
336 }
337
338
339 void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
340 {
341 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], driver->channelsMask[0], 0, TRUE);
342
343 if (driver->tgc[1])
344 {
345 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[1], driver->channelsMask[1], 0, TRUE); /* Note: Write of 0 value has no effect */
346 }
347 }
348
349
350 boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
351 {
352 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
353
354 return IfxGtm_Tom_Timer_setPeriod(driver, period);
355 }
356
357
358 boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
359 {
360 driver->base.period = period;
361 IfxGtm_Tom_Ch_setCompareZeroShadow(driver->tom, driver->timerChannel, period);
362
363 if (driver->triggerChannel != driver->timerChannel)
364 {
365 IfxGtm_Tom_Ch_setCompareZeroShadow(driver->tom, driver->triggerChannel, period);
366 }
367
368 return TRUE;
369 }
370
371
372 void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
373 {
374 IfxGtm_Tom_Ch_setOneShotMode(driver->tom, driver->timerChannel, enabled);
375 }
376
377
378 void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
379 {
380 IfxGtm_Tom_Ch_setCompareOneShadow(driver->tom, driver->triggerChannel, triggerPoint + 1);
381 }
382
383
384 boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
385 {
386 /* Ensure the stdif is reset to zeros */
387 memset(stdif, 0, sizeof(IfxStdIf_Timer));
388
389 /* *INDENT-OFF* Note: this file was indented manually by the author. */
390 /* Set the API link */
391 stdif->driver = driver;
392 stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxGtm_Tom_Timer_getFrequency;
393 stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxGtm_Tom_Timer_getPeriod;
394 stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxGtm_Tom_Timer_getResolution;
395 stdif->getTrigger =(IfxStdIf_Timer_GetTrigger )&IfxGtm_Tom_Timer_getTrigger;
396 stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxGtm_Tom_Timer_setFrequency;
397 stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxGtm_Tom_Timer_updateInputFrequency;
398 stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxGtm_Tom_Timer_applyUpdate;
399 stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxGtm_Tom_Timer_disableUpdate;
400 stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxGtm_Tom_Timer_getInputFrequency;
401 stdif->run =(IfxStdIf_Timer_Run )&IfxGtm_Tom_Timer_run;
402 stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxGtm_Tom_Timer_setPeriod;
403 stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxGtm_Tom_Timer_setSingleMode;
404 stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxGtm_Tom_Timer_setTrigger;
405 stdif->stop =(IfxStdIf_Timer_Stop )&IfxGtm_Tom_Timer_stop;
406 stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxGtm_Tom_Timer_acknowledgeTimerIrq;
407 stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxGtm_Tom_Timer_acknowledgeTriggerIrq;
408 /* *INDENT-ON* */
409
410 return TRUE;
411 }
412
413
414 void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
415 {
416 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], 0, driver->channelsMask[0], TRUE);
417
418 if (driver->tgc[1])
419 {
420 IfxGtm_Tom_Tgc_enableChannels(driver->tgc[1], 0, driver->channelsMask[1], TRUE); /* Note: Write of 0 value has no effect */
421 }
422 }
423
424
425 void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
426 {
427 driver->base.clockFreq = IfxGtm_Tom_Ch_getClockFrequency(driver->gtm, driver->tom, driver->timerChannel);
428 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:226
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:98
IfxGtm_Tom_Timer_addToChannelMask
void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:73
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:133
IfxGtm_Tom_Ch_setTriggerOutput
void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
Sets the channel trigger output.
Definition: IfxGtm_Tom.c:331
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:100
IfxGtm_Tom_Timer_setFrequency
boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Tom_Timer.c:350
IfxGtm_Tom_Timer_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Timer.h:164
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:259
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:146
IfxGtm_IrqMode_level
Definition: IfxGtm.h:49
IfxGtm_Tom_Ch_getCompareOnePointer
volatile uint32 * IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one pointer.
Definition: IfxGtm_Tom.c:95
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:82
IfxGtm_Tom_Timer_Config::initPins
boolean initPins
TRUE : Initialize pins in driver. FALSE: Don&#39;t initialize pins : handled separately by user...
Definition: IfxGtm_Tom_Timer.h:170
IfxGtm_Tom_Tgc_buildFeature
uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
Builds the register value for the feature enable/disable.
Definition: IfxGtm_Tom.c:339
IfxGtm_Tom_Ch_isZeroNotification
boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel Zero notification.
Definition: IfxGtm_Tom.c:169
IfxGtm_Tom_Timer_getPointer
volatile uint32 * IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Tom_Timer.c:145
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:216
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:114
IfxGtm_Tom_Ch_setResetSource
void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
Sets the channel clock source either from local or from previous channel.
Definition: IfxGtm_Tom.c:304
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:236
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:234
IfxGtm_Tom_Timer_getTriggerPointer
volatile uint32 * IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Tom_Timer.c:163
IfxGtm_Tom_Timer_disableUpdate
void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Tom_Timer.c:110
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:222
IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0
div 1
Definition: IfxGtm_Tom.h:66
IfxGtm_PinMap_setTomTout
void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Definition: IfxGtm_PinMap.c:713
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:418
IfxGtm_Tom_Ch_setSignalLevel
void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
Sets the signal level.
Definition: IfxGtm_Tom.c:312
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:249
IfxGtm_Tom_Ch_isOneNotification
boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the status of channel One notification.
Definition: IfxGtm_Tom.c:160
IfxGtm_Tom_Ch_getTgcPointer
Ifx_GTM_TOM_TGC * IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
Returns the TGC pointer.
Definition: IfxGtm_Tom.c:136
IfxGtm_Tom_Ch_setNotification
void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
Sets the channel notification.
Definition: IfxGtm_Tom.c:269
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Tom_Timer::tgcGlobalControlApplyUpdate
uint32 tgcGlobalControlApplyUpdate[2]
Cached value for TGC GLOB_CTR.
Definition: IfxGtm_Tom_Timer.h:155
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:108
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:429
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
Ifx_Assert.h
Assert functions.
IfxGtm_Tom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Tom_Timer.h:153
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:223
IfxGtm_Tom_Timer_getFrequency
float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Tom_Timer.c:121
IfxGtm_Tom_Timer_setTrigger
void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Tom_Timer.c:378
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:131
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:94
IfxGtm_Tom_Timer_getResolution
float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Tom_Timer.c:151
IfxGtm_Tom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Tom_Timer.h:162
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxGtm_Tom_Timer_acknowledgeTriggerIrq
boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Tom_Timer.c:56
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:258
IfxGtm_Tom_Ch_setOneShotMode
void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
Enable/disable the one shot mode.
Definition: IfxGtm_Tom.c:287
IfxGtm_Tom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Tom_Timer.h:168
IfxGtm_Tom_Timer_getInputFrequency
float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Tom_Timer.c:127
IfxGtm_Tom_Timer_acknowledgeTimerIrq
boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Tom_Timer.c:39
IfxGtm_Tom_Ch_getClockFrequency
float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the TOM channel input clock frequency in Hz.
Definition: IfxGtm_Tom.c:51
IfxGtm_Tom_Timer_run
void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Tom_Timer.c:339
IfxGtm_Tom_Ch_ResetEvent_onTrigger
Definition: IfxGtm_Tom.h:87
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:230
IfxGtm_Tom_Timer::tgc
Ifx_GTM_TOM_TGC * tgc[2]
Pointer to the TGC object.
Definition: IfxGtm_Tom_Timer.h:148
IfxGtm_Tom_Ch_clearZeroNotification
void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel Zero notification.
Definition: IfxGtm_Tom.c:44
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:158
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:198
IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Tom_Timer.h:160
IfxGtm_Tom_Timer_stdIfTimerInit
boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:384
IfxGtm_Tom_Ch_setCounterValue
void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
Sets the counter value.
Definition: IfxGtm_Tom.c:250
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:147
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:250
IfxGtm_Tom_Ch_getCompareOne
uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the compare one value.
Definition: IfxGtm_Tom.c:87
IfxGtm_Tom_Timer_getTrigger
Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Tom_Timer.c:157
IfxGtm_Tom_Timer_applyUpdate
void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Tom_Timer.c:99
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:28
IfxGtm_Tom_ToutMap::channel
IfxGtm_Tom_Ch channel
TOM channel index.
Definition: IfxGtm_PinMap.h:102
IfxGtm_Tom_Tgc_trigger
void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
Definition: IfxGtm_Tom.c:535
IfxGtm_Tom_Ch_clearOneNotification
void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Clears the channel One notification.
Definition: IfxGtm_Tom.c:37
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:70
IfxGtm_Tom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Tom_Timer.h:132
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:231
IfxGtm_Tom_Ch_getSrcPointer
volatile Ifx_SRC_SRCR * IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
Returns a pointer to the TOM channel SRC.
Definition: IfxGtm_Tom.c:129
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:143
IfxGtm_Tom_Timer_setSingleMode
void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Tom_Timer.c:372
IfxGtm_Tom_Timer_updateInputFrequency
void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Tom_Timer.c:425
IfxGtm_IrqMode_pulseNotify
Definition: IfxGtm.h:51
IfxGtm_Tom_Ch_setCompareOneShadow
void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
Sets the compare 1 shadow value.
Definition: IfxGtm_Tom.c:217
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:245
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:269
IfxGtm_Tom_Ch_getTimerPointer
volatile uint32 * IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
Returns the Timer pointer.
Definition: IfxGtm_Tom.c:153
IfxGtm_Tom_Timer_setPeriod
boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Tom_Timer.c:358
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:235
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Tom_Ch_OutputTrigger_forward
Forward the trigger from the previous channel.
Definition: IfxGtm_Tom.h:78
IfxGtm_Tom_Timer_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Timer.h:167
IfxGtm_Tom_Timer::channelsMask
uint16 channelsMask[2]
Mask for channels to be modified together, The 1st value corresponds to the Timer&#39;s TGC...
Definition: IfxGtm_Tom_Timer.h:152
IfxGtm_Tom_Ch_setClockSource
void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
Sets the channel clock source.
Definition: IfxGtm_Tom.c:192
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:227
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:232
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:228
IfxGtm_Tom_Tgc_setChannelsForceUpdate
void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
Enable/disable one or more channels for the force update feature (FUPD)
Definition: IfxGtm_Tom.c:513
IfxGtm_Tom_Tgc_enableChannelsOutput
void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels output (OUTEN)
Definition: IfxGtm_Tom.c:447
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:88
IfxGtm_Tom_Timer_initConfig
void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Timer.c:324
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:152
IfxGtm_Tom_Timer_stop
void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Tom_Timer.c:414
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:260
IfxGtm_Tom_Tgc_writeGlobalControl
IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
Sets the tgc global control value.
Definition: IfxGtm_Tom.h:511
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:233
IfxGtm_Tom_Timer_Config::triggerOut
IfxGtm_Tom_ToutMap * triggerOut
TOM channel used for the trigger output, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:166
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:238
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:145
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:257
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:135
IfxGtm_Tom_Timer::tomIndex
IfxGtm_Tom tomIndex
Enum for TOM objects.
Definition: IfxGtm_Tom_Timer.h:149
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:276
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:167
IfxGtm_Tom_Ch_8
TOM channel 8.
Definition: IfxGtm_cfg.h:277
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:225
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:261
IfxGtm_Tom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Tom_Timer.h:129
IfxGtm_Tom_Timer_getPeriod
Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Tom_Timer.c:139
IfxGtm_Tom_Tgc_enableChannels
void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
Enable/disable one or more channels (ENDIS)
Definition: IfxGtm_Tom.c:429
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:263
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:204
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:229
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:210
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:150
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:251
IfxGtm_Tom_Ch_setCompareZeroShadow
void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
Sets the compare 0 shadow value.
Definition: IfxGtm_Tom.c:242
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:177
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:260
IfxGtm_Tom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Tom_Timer.h:169
IfxGtm_Tom_Timer_init
boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Tom_Timer.c:169
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxGtm_Tom_Ch_OutputTrigger_generate
Generate the trigger from the current channel.
Definition: IfxGtm_Tom.h:79
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:248
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:186
IfxGtm_Tom_Timer_getOffset
Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:133
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:224
IfxGtm_Tom_Timer.h
GTM TIMER details.
IfxGtm_Tom_Timer::tgcGlobalControlDisableUpdate
uint32 tgcGlobalControlDisableUpdate[2]
Cached value for TGC GLOB_CTR.
Definition: IfxGtm_Tom_Timer.h:154
IfxGtm_Tom_Timer::triggerChannel
IfxGtm_Tom_Ch triggerChannel
TOM channel used for the trigger, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:151


iLLD_TC26B: IfxGtm_Tom_Timer.h Source File

  • Gtm
  • Tom
  • Timer
IfxGtm_Tom_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Tom_Timer.h
3 * \brief GTM TIMER details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Tom_Timer_Usage How to use the GTM TOM Timer Driver
25 * \ingroup IfxLld_Gtm_Tom_Timer
26 *
27 * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
28 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
29 *
30 * \section specific Specific Implementation
31 * The timer fucntinality is implemented using either a single or 2 TOM channels. The dicision to use 1 or 2 channels is done
32 * depending on the following requirements:
33 * - relative position of the timer channel to the other channels used if any
34 * - need to trigger an other module, for example ADC triggering.
35 *
36 * The figure below show how the TOM is \ref IfxGtm_Tom_Timer_Config "configured" when a single TOM channel is used for the timer and trigger functinalities.
37 * The internal trigger signal (red line) is generated when the counter CN0 reach the CM0 compare register. The value of CM0 act as the period value. This internal
38 * trigger is used to reset the CN0 counter and simultaneously transfer the shadow values for the period value (SR0->CM0)
39 * and trigger edge (SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel.
40 * The trigger signal (output trigger) is generated by the CM0 and CM1 compare values. Depending on the trigger signal active
41 * edge \ref IfxGtm_Tom_Timer_Config "configuiration", the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.
42 *
43 * \image html "IfxGtm_Tom_Timer-0.png" "Timer using one signle TOM channel"
44 *
45 * In case 2 TOM channels are used for the timer and trigger functionalities,
46 * the 1st channel (CHz in the figure below) is used for the generation of the period,
47 * and the 2nd channel (CHz+n the below figure, the figure shows n=1 as example) is used for the trigger generation.
48 *
49 * The CHz TOM channel generates the internal trigger signal (red line) when the counter CN0 reach the CM0 compare register.
50 * The value of CM0 of CHz act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously
51 * transfer the shadow period value (SR0->CM0). The internal trigger is used as an input for the next TOM channel.
52 *
53 * The CHz+n TOM channel, uses the internal trigger signal to simultaneously resets the
54 * counter CN0, and transfer the shadow values used for the generation of the trigger falling and rising edges (SR0->CM0 and SR1->CM1).
55 * The internal trigger is used as a trigger input to the next TOM channel.
56 * Depending on the trigger signal active edge \ref IfxGtm_Tom_Timer_Config "configuiration", the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.
57 * In orter to have a similar behaviour to the single channel implementation,
58 * the CM0 is set to the same value as CHz CM0, and CM1 is used for the trigger edge.
59 *
60 * \image html "IfxGtm_Tom_Timer-1.png" "Timer using two different TOM channels for the timer and the trigger"
61 *
62 *
63 * In order to ensure a coherent update of all registers, the internal trigger must be disable before updating
64 * the timer and trigger shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.
65 *
66 * - Resources used:
67 * - if the trigger channel is identical to the timer channel, only one TOM channels is used
68 * - if the trigger channel is different from the timer channel, 2 TOM channels are used
69 * - All channels used must be own by the same TOM and TOM TGC
70 * - The timer counting direction is limited to \ref IfxStdIf_Timer_CountDir_up
71 * - If the TOM trigger channel is not the same as the TOM timer channels
72 * - The TOM channel used for the trigger must have a lower index than the TOM channels
73 * used for the timer.
74 * - the TOM channels must be contiguous, unless specified by the driver using the timer driver.
75 *
76 * Note: the timer and trigger must bepart of the same TGC, but PWM channels can be of different TGC of the same TOM as the timer
77 *
78 * For a detailed configuration of the microcontroller, see \ref IfxGtm_Tom_Timer_init().
79 *
80 * \section example Usage example
81 * Initialisation:
82 * \code
83 * IfxGtm_Tom_Timer_Config driverConfig;
84 * IfxGtm_Tom_Timer driverData;
85 * IfxStdIf_Timer timer;
86 * IfxGtm_Tom_Timer_initConfig(&driverConfig, &MODULE_GTM);
87 * IfxGtm_Tom_Timer_init (&driverData, &driverConfig);
88 * boolean IfxGtm_Tom_Timer_stdIfTimerInit(&timer, &driverData);
89 * \endcode
90 *
91 * During run-time, \ref library_srvsw_stdif_timer "the interface functions" should be used:
92 * \code
93 * IfxStdIf_Timer_run(timer);
94 * IfxStdIf_Timer_disableUpdate(timer);
95 * IfxStdIf_Timer_setPeriod(timer, period);
96 * IfxStdIf_Timer_applyUpdate(timer);
97 * \endcode
98 *
99 * \defgroup IfxLld_Gtm_Tom_Timer TOM Timer Interface Driver
100 * \ingroup IfxLld_Gtm_Tom
101 * \defgroup IfxLld_Gtm_Tom_Timer_Data_Structures Data Structures
102 * \ingroup IfxLld_Gtm_Tom_Timer
103 * \defgroup IfxLld_Gtm_Tom_Timer_Timer_Functions Timer Functions
104 * \ingroup IfxLld_Gtm_Tom_Timer
105 * \defgroup IfxLld_Gtm_Tom_Timer_Timer_StdIf_Functions Timer StdIf Functions
106 * \ingroup IfxLld_Gtm_Tom_Timer
107 */
108
109 #ifndef IFXGTM_TOM_TIMER_H
110 #define IFXGTM_TOM_TIMER_H 1
111
112 /******************************************************************************/
113 /*----------------------------------Includes----------------------------------*/
114 /******************************************************************************/
115
116 #include "_PinMap/IfxGtm_PinMap.h"
117 #include "Gtm/Std/IfxGtm_Tom.h"
118 #include "Gtm/Std/IfxGtm_Cmu.h"
119 #include "StdIf/IfxStdIf_Timer.h"
120
121 /******************************************************************************/
122 /*-----------------------------Data Structures--------------------------------*/
123 /******************************************************************************/
124
125 /** \addtogroup IfxLld_Gtm_Tom_Timer_Data_Structures
126 * \{ */
127 /** \brief Structure for the timer base
128 */
129 typedef struct
130 {
131 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
132 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
133 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
134 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
135 } IfxGtm_Tom_Timer_Base;
136
137 /** \} */
138
139 /** \addtogroup IfxLld_Gtm_Tom_Timer_Data_Structures
140 * \{ */
141 /** \brief TOM Timer interface Handle
142 */
143 typedef struct
144 {
145 IfxGtm_Tom_Timer_Base base; /**< \brief Timer base structure */
146 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
147 Ifx_GTM_TOM *tom; /**< \brief Pointer to the TOM object */
148 Ifx_GTM_TOM_TGC *tgc[2]; /**< \brief Pointer to the TGC object */
149 IfxGtm_Tom tomIndex; /**< \brief Enum for TOM objects */
150 IfxGtm_Tom_Ch timerChannel; /**< \brief TOM channel used for the timer */
151 IfxGtm_Tom_Ch triggerChannel; /**< \brief TOM channel used for the trigger, can be identical to the timer channel */
152 uint16 channelsMask[2]; /**< \brief Mask for channels to be modified together, The 1st value corresponds to the Timer's TGC, the 2nd value corresponds to the timer's next TGC if any */
153 Ifx_TimerValue offset; /**< \brief Timer initial offset in ticks */
154 uint32 tgcGlobalControlDisableUpdate[2]; /**< \brief Cached value for TGC GLOB_CTR */
155 uint32 tgcGlobalControlApplyUpdate[2]; /**< \brief Cached value for TGC GLOB_CTR */
156 } IfxGtm_Tom_Timer;
157
158 /** \brief Configuration structure for TOM Timer
159 */
160 typedef struct
161 {
162 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
163 Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
164 IfxGtm_Tom tom; /**< \brief Index of the TOM object used */
165 IfxGtm_Tom_Ch timerChannel; /**< \brief TOM channel used for the timer */
166 IfxGtm_Tom_ToutMap *triggerOut; /**< \brief TOM channel used for the trigger output, can be identical to the timer channel */
167 IfxGtm_Tom_Ch_ClkSrc clock; /**< \brief Timer input clock */
168 IfxGtm_IrqMode irqModeTimer; /**< \brief Interrupt mode for the timer */
169 IfxGtm_IrqMode irqModeTrigger; /**< \brief Interrupt mode for the trigger */
170 boolean initPins; /**< \brief TRUE : Initialize pins in driver.
171 * FALSE: Don't initialize pins : handled separately by user */
172 } IfxGtm_Tom_Timer_Config;
173
174 /** \} */
175
176 /** \addtogroup IfxLld_Gtm_Tom_Timer_Timer_Functions
177 * \{ */
178
179 /******************************************************************************/
180 /*-------------------------Global Function Prototypes-------------------------*/
181 /******************************************************************************/
182
183 /** \brief Returns the initial timer offset in ticks
184 * \param driver TOM Timer interface Handle
185 * \return Returns the initial timer offset in ticks
186 */
187 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver);
188
189 /** \brief Returns the pointer to timer channel
190 * \param driver TOM Timer interface Handle
191 * \return Pointer
192 */
193 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver);
194
195 /** \brief Returns the pointer to trigger channel
196 * \param driver TOM Timer interface Handle
197 * \return Pointer
198 */
199 IFX_EXTERN volatile uint32 *IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver);
200
201 /** \brief Initialises the timer object
202 * \param driver TOM Timer interface Handle
203 * \param config Configuration structure for TOM Timer
204 * \return TRUE on success else FALSE
205 */
206 IFX_EXTERN boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config);
207
208 /** \brief Initializes the configuration structure to default
209 * \param config This parameter is Initialised by the function
210 * \param gtm Pointer to GTM module
211 * \return None
212 */
213 IFX_EXTERN void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm);
214
215 /** \} */
216
217 /** \addtogroup IfxLld_Gtm_Tom_Timer_Timer_StdIf_Functions
218 * \{ */
219
220 /******************************************************************************/
221 /*-------------------------Global Function Prototypes-------------------------*/
222 /******************************************************************************/
223
224 /** \brief Returns the timer event
225 * \see IfxStdIf_Timer_AckTimerIrq
226 * \param driver TOM Timer interface Handle
227 * \return Timer event
228 */
229 IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver);
230
231 /** \brief Returns the trigger event
232 * \see IfxStdIf_Timer_AckTriggerIrq
233 * \param driver TOM Timer interface Handle
234 * \return Trigger event
235 */
236 IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver);
237
238 /** \brief Add a channel to the channel mask
239 * Channels present in the mask are started, stopped, updated at the same time as the timer:
240 * IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run
241 * \param driver TOM Timer interface Handle
242 * \param channel Channel to ba added to the mask
243 * \return None
244 */
245 IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel);
246
247 /** \brief Enables the transfer of the shadow registers
248 * \see IfxStdIf_Timer_ApplyUpdate
249 * Specific implementation: Enable the transfer of the shadow registers
250 * \param driver TOM Timer interface Handle
251 * \return None
252 */
253 IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver);
254
255 /** \brief Disables the upadte
256 * \see IfxStdIf_Timer_DisableUpdate
257 * Specific implementation: Disable the transfer of the shadow registers
258 * \param driver TOM Timer interface Handle
259 * \return None
260 */
261 IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver);
262
263 /** \brief Returns the frequency
264 * \see IfxStdIf_Timer_GetFrequency
265 * \param driver TOM Timer interface Handle
266 * \return Frequency
267 */
268 IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver);
269
270 /** \brief Returns the Input frequncy
271 * \param driver TOM Timer interface Handle
272 * \return Frequency
273 */
274 IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver);
275
276 /** \brief Returns the period of the timer
277 * \see IfxStdIf_Timer_GetPeriod
278 * \param driver TOM Timer interface Handle
279 * \return Period
280 */
281 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver);
282
283 /** \brief Returns the resolution
284 * \see IfxStdIf_Timer_GetResolution
285 * \param driver TOM Timer interface Handle
286 * \return Resolution
287 */
288 IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver);
289
290 /** \brief Returns the trigger point
291 * \param driver TOM Timer interface Handle
292 * \return Trigger point
293 */
294 IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver);
295
296 /** \brief Runs the timer
297 * \see IfxStdIf_Timer_Run
298 * \param driver TOM Timer interface Handle
299 * \return None
300 */
301 IFX_EXTERN void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver);
302
303 /** \brief Sets the frequency
304 * \see IfxStdIf_Timer_SetFrequency
305 * \param driver TOM Timer interface Handle
306 * \param frequency Frequency
307 * \return TRUE on success else FALSE
308 */
309 IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency);
310
311 /** \brief Sets the period for the timer
312 * \see IfxStdIf_Timer_SetPeriod
313 * \param driver TOM Timer interface Handle
314 * \param period Period value
315 * \return TRUE on success else FALSE
316 */
317 IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period);
318
319 /** \brief Sets the single shot mode of the timer
320 * \see IfxStdIf_Timer_SetSingleMode
321 * \param driver TOM Timer interface Handle
322 * \param enabled If TRUE, sets the single shot mode
323 * \return None
324 */
325 IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled);
326
327 /** \brief Sets the trigger
328 * \see IfxStdIf_Timer_SetTrigger
329 * \param driver TOM Timer interface Handle
330 * \param triggerPoint Trigger point value
331 * \return None
332 */
333 IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint);
334
335 /** \brief Initializes the standard interface timer
336 * \param stdif Standard interface timer object, will be initialized by the function
337 * \param driver Interface driver to be used by the standard interface. must be initialised separately
338 * \return TRUE on success else FALSE
339 */
340 IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver);
341
342 /** \brief Stops the timer
343 * \see IfxStdIf_Timer_Stop
344 * \param driver TOM Timer interface Handle
345 * \return None
346 */
347 IFX_EXTERN void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver);
348
349 /** \brief Updates the input frequency
350 * \see IfxStdIf_Timer_UpdateInputFrequency
351 * \param driver TOM Timer interface Handle
352 * \return None
353 */
354 IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver);
355
356 /** \} */
357
358 #endif /* IFXGTM_TOM_TIMER_H */
IfxGtm_Tom_Timer_addToChannelMask
IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
Add a channel to the channel mask Channels present in the mask are started, stopped, updated at the same time as the timer: IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run.
Definition: IfxGtm_Tom_Timer.c:73
IfxGtm_Tom_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxGtm_Tom_Timer.h:133
IfxGtm_Tom_Timer_setFrequency
IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
Sets the frequency.
Definition: IfxGtm_Tom_Timer.c:350
IfxGtm_Tom_Timer_Config::tom
IfxGtm_Tom tom
Index of the TOM object used.
Definition: IfxGtm_Tom_Timer.h:164
IfxGtm_Tom_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxGtm_Tom_Timer.h:134
IfxGtm_Tom_Timer::gtm
Ifx_GTM * gtm
Pointer to GTM module.
Definition: IfxGtm_Tom_Timer.h:146
IfxGtm_Tom_Timer_Config::initPins
boolean initPins
TRUE : Initialize pins in driver. FALSE: Don&#39;t initialize pins : handled separately by user...
Definition: IfxGtm_Tom_Timer.h:170
IfxGtm_Tom_Timer_getPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to timer channel.
Definition: IfxGtm_Tom_Timer.c:145
IfxGtm_Tom_Timer_getTriggerPointer
IFX_EXTERN volatile uint32 * IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
Returns the pointer to trigger channel.
Definition: IfxGtm_Tom_Timer.c:163
IfxGtm_Tom_Timer_disableUpdate
IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
Disables the upadte.
Definition: IfxGtm_Tom_Timer.c:110
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxGtm_PinMap.h
GTM I/O map.
IfxGtm_Tom_Timer::offset
Ifx_TimerValue offset
Timer initial offset in ticks.
Definition: IfxGtm_Tom_Timer.h:153
IfxGtm_Tom_Timer_getFrequency
IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
Returns the frequency.
Definition: IfxGtm_Tom_Timer.c:121
IfxGtm_Tom_Timer_setTrigger
IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
Sets the trigger.
Definition: IfxGtm_Tom_Timer.c:378
IfxGtm_Tom_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxGtm_Tom_Timer.h:131
IfxGtm_Tom_Timer_getResolution
IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
Returns the resolution.
Definition: IfxGtm_Tom_Timer.c:151
IfxGtm_Tom_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxGtm_Tom_Timer.h:162
IfxGtm_Tom_Timer_acknowledgeTriggerIrq
IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
Returns the trigger event.
Definition: IfxGtm_Tom_Timer.c:56
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:255
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IfxGtm_Tom_Timer_Config::irqModeTimer
IfxGtm_IrqMode irqModeTimer
Interrupt mode for the timer.
Definition: IfxGtm_Tom_Timer.h:168
IfxGtm_Tom_Timer_getInputFrequency
IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
Returns the Input frequncy.
Definition: IfxGtm_Tom_Timer.c:127
IfxGtm_Tom_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
Returns the timer event.
Definition: IfxGtm_Tom_Timer.c:39
IfxGtm_Tom_Timer_run
IFX_EXTERN void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
Runs the timer.
Definition: IfxGtm_Tom_Timer.c:339
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:182
IfxGtm_Tom_Timer_Config
Configuration structure for TOM Timer.
Definition: IfxGtm_Tom_Timer.h:160
IfxGtm_Tom_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
Initializes the standard interface timer.
Definition: IfxGtm_Tom_Timer.c:384
IfxGtm_Tom_Timer::tom
Ifx_GTM_TOM * tom
Pointer to the TOM object.
Definition: IfxGtm_Tom_Timer.h:147
IfxGtm_Tom_ToutMap
TOM TOUT pin mapping structure.
Definition: IfxGtm_PinMap.h:99
IfxGtm_Tom_Timer_getTrigger
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
Returns the trigger point.
Definition: IfxGtm_Tom_Timer.c:157
IfxGtm_Tom_Timer_applyUpdate
IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
Enables the transfer of the shadow registers.
Definition: IfxGtm_Tom_Timer.c:99
IfxStdIf_Timer.h
Standard interface: Timer.
IfxGtm_Tom_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialised.
Definition: IfxGtm_Tom_Timer.h:132
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:68
IfxGtm_Tom_Timer
TOM Timer interface Handle.
Definition: IfxGtm_Tom_Timer.h:143
IfxGtm_Tom_Timer_setSingleMode
IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
Sets the single shot mode of the timer.
Definition: IfxGtm_Tom_Timer.c:372
IfxGtm_Tom_Timer_updateInputFrequency
IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
Updates the input frequency.
Definition: IfxGtm_Tom_Timer.c:425
IfxGtm_Tom_Timer_setPeriod
IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer.
Definition: IfxGtm_Tom_Timer.c:358
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxGtm_Tom_Timer_Config::clock
IfxGtm_Tom_Ch_ClkSrc clock
Timer input clock.
Definition: IfxGtm_Tom_Timer.h:167
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:258
IfxGtm_Tom_Timer_initConfig
IFX_EXTERN void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
Initializes the configuration structure to default.
Definition: IfxGtm_Tom_Timer.c:324
IfxGtm_Tom_Timer_stop
IFX_EXTERN void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
Stops the timer.
Definition: IfxGtm_Tom_Timer.c:414
IfxGtm_Tom_Timer_Config::triggerOut
IfxGtm_Tom_ToutMap * triggerOut
TOM channel used for the trigger output, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:166
IfxGtm_Tom_Timer::base
IfxGtm_Tom_Timer_Base base
Timer base structure.
Definition: IfxGtm_Tom_Timer.h:145
IfxGtm_Tom_Timer::tomIndex
IfxGtm_Tom tomIndex
Enum for TOM objects.
Definition: IfxGtm_Tom_Timer.h:149
IfxGtm_IrqMode
IfxGtm_IrqMode
Enum for GTM interrupt modes.
Definition: IfxGtm.h:47
IfxGtm_Cmu.h
GTM basic functionality.
IfxGtm_Tom_Timer_Base
Structure for the timer base.
Definition: IfxGtm_Tom_Timer.h:129
IfxGtm_Tom_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
Returns the period of the timer.
Definition: IfxGtm_Tom_Timer.c:139
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxGtm_Tom_Timer::timerChannel
IfxGtm_Tom_Ch timerChannel
TOM channel used for the timer.
Definition: IfxGtm_Tom_Timer.h:150
IfxGtm_Tom_Timer_Config::irqModeTrigger
IfxGtm_IrqMode irqModeTrigger
Interrupt mode for the trigger.
Definition: IfxGtm_Tom_Timer.h:169
IfxGtm_Tom_Timer_init
IFX_EXTERN boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
Initialises the timer object.
Definition: IfxGtm_Tom_Timer.c:169
IfxGtm_Tom_Ch_ClkSrc
IfxGtm_Tom_Ch_ClkSrc
Clock source for the TOM channels.
Definition: IfxGtm_Tom.h:64
IfxGtm_Tom.h
GTM basic functionality.
IfxGtm_Tom_Timer_getOffset
IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
Returns the initial timer offset in ticks.
Definition: IfxGtm_Tom_Timer.c:133
IfxGtm_Tom_Timer::triggerChannel
IfxGtm_Tom_Ch triggerChannel
TOM channel used for the trigger, can be identical to the timer channel.
Definition: IfxGtm_Tom_Timer.h:151


iLLD_TC26B: IfxGtm_Trig.c Source File

  • Gtm
  • Trig
IfxGtm_Trig.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Trig.c
3 * \brief GTM TRIG details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_Trig.h"
30 #include "_Utilities/Ifx_Assert.h"
31 #include "Cpu/Std/IfxCpu_Intrinsics.h"
32
33 /******************************************************************************/
34 /*-----------------------------Data Structures--------------------------------*/
35 /******************************************************************************/
36
37 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
38 * \{ */
39 typedef struct
40 {
41 sint8 config; /**< \brief Value for SEL0/1. config=0xFF means "not available" */
42 } IfxGtm_Trig_Channel;
43
44 /** \} */
45
46 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
47 * \{ */
48 typedef struct
49 {
50 IfxGtm_Trig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count];
51 } IfxGtm_Trig_Source;
52
53 /** \} */
54
55 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
56 * \{ */
57 typedef struct
58 {
59 IfxGtm_Trig_Source source[IfxGtm_Trig_AdcTrigSource_count];
60 } IfxGtm_Trig_Trigger;
61
62 /** \} */
63
64 /** \addtogroup IfxLld_Gtm_Trig_Data_Structures
65 * \{ */
66 typedef struct
67 {
68 IfxGtm_Trig_Trigger trigger[IfxGtm_Trig_AdcTrig_count];
69 } IfxGtm_Trig_AdcTrig_Table;
70
71 /** \} */
72
73 /******************************************************************************/
74 /*------------------------Private Variables/Constants-------------------------*/
75 /******************************************************************************/
76
77 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2 = {
78 .trigger = {
79 {.source = { //IfxGtm_AdcTrig_0
80 //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
81 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
82 {.channel = { {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
83 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
84 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
85
86 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
87 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
88 }},
89 {.source = { //IfxGtm_AdcTrig_1
90 //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
91 {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
92 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
93 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
94 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
95
96 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}}}, //IfxGtm_AdcTrigSource_tom0
97 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
98 }}
99 }
100 };
101
102 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4 = {
103 .trigger = {
104 {.source = { //IfxGtm_AdcTrig_0
105 // IfxGtm_AdcTrig
106 //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
107 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
108 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
109 {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
110 {.channel = { {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
111
112 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
113 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
114 }},
115 {.source = { //IfxGtm_AdcTrig_1
116 //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
117 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
118 {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
119 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
120 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
121
122 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
123 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
124 }}
125 }
126 };
127
128 /** \brief Trigger table for SENT triggers
129 */
130 IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table = {
131 .trigger = {
132 {.source = { //IfxGtm_AdcTrig_0
133 //{.channel = {{Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
134 {.channel = { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
135 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
136 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
137 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
138 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
139 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
140 }},
141 {.source = { //IfxGtm_AdcTrig_1
142 //{.channel = {{Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
143 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
144 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
145 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
146 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
147 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
148 {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
149 }}
150 }
151 };
152
153 /******************************************************************************/
154 /*-------------------------Function Implementations---------------------------*/
155 /******************************************************************************/
156
157 boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
158 {
159 boolean result = dsadcChannel <= 5;
160
161 if (result != FALSE)
162 {
163 uint32 mask = 0xFU << (timChannel * 4);
164 __ldmst_c(&(gtm->INOUTSEL.DSADC.INSEL[tim].U), mask, dsadcChannel << (timChannel * 4));
165 }
166
167 return result;
168 }
169
170
171 void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
172 {
173 uint32 shift = dsadcChannel * 4;
174 uint32 mask = 0xFU << shift;
175 uint32 value = sel << shift;
176
177 switch (dsadcTrig)
178 {
179 case IfxGtm_Trig_DsadcTrig_0:
180 __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL00.U), mask, value);
181 break;
182 case IfxGtm_Trig_DsadcTrig_1:
183 __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL10.U), mask, value);
184 break;
185 }
186 }
187
188
189 boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
190 {
191 IFX_CONST IfxGtm_Trig_AdcTrig_Table *table = NULL_PTR;
192 uint8 config;
193
194 boolean result = 0;
195
196 switch (adcGroup)
197 {
198 case IfxGtm_Trig_AdcGroup_0:
199 case IfxGtm_Trig_AdcGroup_1:
200 case IfxGtm_Trig_AdcGroup_2:
201 table = &IfxGtm_Trig_AdcTrig_tableAdc0_1_2;
202 break;
203 case IfxGtm_Trig_AdcGroup_3:
204 case IfxGtm_Trig_AdcGroup_4:
205 table = &IfxGtm_Trig_AdcTrig_tableAdc3_4;
206 break;
207 default:
208 break;
209 }
210
211 if (table != NULL_PTR)
212 {
213 config = table->trigger[adcTrig].source[source].channel[channel].config;
214 result = config != 0xFF;
215 uint32 shift = adcGroup * 4;
216 uint32 mask = 0xFU << shift;
217 uint32 value = config << shift;
218
219 switch (adcTrig)
220 {
221 case IfxGtm_Trig_AdcTrig_0:
222 __ldmst_c(&(gtm->ADCTRIG0OUT0.U), mask, value);
223 break;
224 case IfxGtm_Trig_AdcTrig_1:
225 __ldmst_c(&(gtm->ADCTRIG1OUT0.U), mask, value);
226 break;
227 default:
228 result = FALSE;
229 break;
230 }
231 }
232
233 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
234
235 return result;
236 }
237
238
239 boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
240 {
241 IFX_CONST IfxGtm_Trig_AdcTrig_Table *table = NULL_PTR;
242 uint8 config;
243 uint32 shift, mask, value;
244 boolean result = 0;
245
246 switch (sentGroup)
247 {
248 case IfxGtm_Trig_SentGroup_0:
249 case IfxGtm_Trig_SentGroup_1:
250 case IfxGtm_Trig_SentGroup_2:
251 table = &IfxGtm_Trig_AdcTrig_tableAdc0_1_2;
252 break;
253 case IfxGtm_Trig_SentGroup_3:
254 case IfxGtm_Trig_SentGroup_4:
255 table = &IfxGtm_Trig_AdcTrig_tableAdc3_4;
256 break;
257 case IfxGtm_Trig_SentGroup_5:
258 table = &IfxGtm_Trig_SentTrig_table;
259 break;
260 default:
261 break;
262 }
263
264 if (table != NULL_PTR)
265 {
266 config = table->trigger[sentTrig].source[source].channel[channel].config;
267 result = config != 0xFF;
268
269 if ((sentGroup / 6) == 0) // write to VADC registers
270 {
271 shift = (sentGroup % 5) * 4;
272 }
273 else // write to DSADC registers
274 {
275 shift = (sentGroup % 6) * 4;
276 }
277
278 mask = 0xFU << shift;
279 value = config << shift;
280
281 if ((sentGroup / 6) == 0) // write to VADC registers
282 {
283 __ldmst_c(&(gtm->ADCTRIG0OUT0.U), mask, value);
284 }
285 else // write to DSADC registers
286 {
287 __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL00.U), mask, value);
288 }
289 }
290
291 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
292
293 return result;
294 }
IfxGtm_Trig_SentTrig
IfxGtm_Trig_SentTrig
Enum for SENT trigger.
Definition: IfxGtm_Trig.h:134
IfxGtm_Trig_Source::channel
IfxGtm_Trig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count]
Definition: IfxGtm_Trig.c:50
IfxGtm_Trig_AdcTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:82
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxGtm_Trig_AdcTrig_count
count of the enum definition
Definition: IfxGtm_Trig.h:68
IfxGtm_Trig_AdcTrig_0
Definition: IfxGtm_Trig.h:66
IfxGtm_Trig_DsadcTrig_0
Definition: IfxGtm_Trig.h:102
IfxGtm_Trig_toDsadc
void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
Definition: IfxGtm_Trig.c:171
IfxGtm_Trig_AdcTrig_1
Definition: IfxGtm_Trig.h:67
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Trig_Source
Definition: IfxGtm_Trig.c:48
IfxGtm_Trig_toSent
boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
Definition: IfxGtm_Trig.c:239
IfxGtm_Trig_fromDsadc
boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
Definition: IfxGtm_Trig.c:157
__ldmst_c
IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
Definition: IfxCpu_Intrinsics.h:91
Ifx_Assert.h
Assert functions.
IfxGtm_Trig_SentTrigSource
IfxGtm_Trig_SentTrigSource
Enum for SENT trigger source.
Definition: IfxGtm_Trig.h:155
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxGtm_Trig_AdcTrig
IfxGtm_Trig_AdcTrig
Enum for ADC trigger.
Definition: IfxGtm_Trig.h:64
IfxCpu_Intrinsics.h
IfxGtm_Trig_AdcTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:95
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxGtm_Trig_SentTrigChannel
IfxGtm_Trig_SentTrigChannel
Enum for SENT trigger channel.
Definition: IfxGtm_Trig.h:141
FALSE
#define FALSE
Definition: Platform_Types.h:90
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxGtm_Trig_AdcGroup_1
For ADC group 1.
Definition: IfxGtm_Trig.h:56
IfxGtm_Trig_AdcTrigSource
IfxGtm_Trig_AdcTrigSource
Enum for ADC trigger source.
Definition: IfxGtm_Trig.h:87
IfxGtm_Trig_AdcTrig_Table
Definition: IfxGtm_Trig.c:66
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxGtm_Trig_AdcTrig_tableAdc3_4
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4
Definition: IfxGtm_Trig.c:102
IfxGtm_Trig_Trigger
Definition: IfxGtm_Trig.c:57
IfxGtm_Trig_SentTrig_table
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table
Trigger table for SENT triggers.
Definition: IfxGtm_Trig.c:130
IfxGtm_Trig_DsadcTrig_1
Definition: IfxGtm_Trig.h:103
IfxGtm_Trig_AdcGroup
IfxGtm_Trig_AdcGroup
Enum for ADC group.
Definition: IfxGtm_Trig.h:53
IfxGtm_Trig_SentGroup_2
For SENT group 2.
Definition: IfxGtm_Trig.h:126
IfxGtm_Trig_SentGroup_0
For SENT group 0.
Definition: IfxGtm_Trig.h:124
IfxGtm_Trig_SentGroup
IfxGtm_Trig_SentGroup
Enum for SENT group.
Definition: IfxGtm_Trig.h:122
IfxGtm_Trig_Channel
Definition: IfxGtm_Trig.c:39
IfxGtm_Trig_SentGroup_1
For SENT group 1.
Definition: IfxGtm_Trig.h:125
IfxGtm_Trig_AdcGroup_2
For ADC group 2.
Definition: IfxGtm_Trig.h:57
IfxGtm_Trig_AdcGroup_0
For ADC group 0.
Definition: IfxGtm_Trig.h:55
IfxGtm_Trig_AdcGroup_4
For ADC group 4.
Definition: IfxGtm_Trig.h:59
IfxGtm_Trig_SentGroup_3
For SENT group 3.
Definition: IfxGtm_Trig.h:127
IfxGtm_Trig_Channel::config
sint8 config
Value for SEL0/1. config=0xFF means "not available".
Definition: IfxGtm_Trig.c:41
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxGtm_Trig_DsadcTrig
IfxGtm_Trig_DsadcTrig
Enum for DSADC trigger.
Definition: IfxGtm_Trig.h:100
IfxGtm_Trig_AdcGroup_3
For ADC group 3.
Definition: IfxGtm_Trig.h:58
IfxGtm_Trig_SentGroup_5
For SENT group 5.
Definition: IfxGtm_Trig.h:129
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxGtm_Trig_toVadc
boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
Definition: IfxGtm_Trig.c:189
IfxGtm_Trig_AdcTrigChannel
IfxGtm_Trig_AdcTrigChannel
Enum for ADC trigger channel.
Definition: IfxGtm_Trig.h:73
IfxGtm_Trig.h
GTM TRIG details.
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxGtm_Trig_SentGroup_4
For SENT group 4.
Definition: IfxGtm_Trig.h:128
sint8
signed char sint8
Definition: Platform_Types.h:122
IfxGtm_Trig_AdcTrig_tableAdc0_1_2
IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2
Definition: IfxGtm_Trig.c:77
IfxGtm_Trig_Trigger::source
IfxGtm_Trig_Source source[IfxGtm_Trig_AdcTrigSource_count]
Definition: IfxGtm_Trig.c:59
IfxGtm_Trig_DsadcTrigSource
IfxGtm_Trig_DsadcTrigSource
Enum for DSADC trigger source.
Definition: IfxGtm_Trig.h:108
IfxGtm_Trig_AdcTrig_Table::trigger
IfxGtm_Trig_Trigger trigger[IfxGtm_Trig_AdcTrig_count]
Definition: IfxGtm_Trig.c:68


iLLD_TC26B: IfxGtm_Trig.h Source File

  • Gtm
  • Trig
IfxGtm_Trig.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_Trig.h
3 * \brief GTM TRIG details
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm_Trig GTM Trigger Configuration
25 * \ingroup IfxLld_Gtm
26 * \defgroup IfxLld_Gtm_Trig_Enumerations Enumerations
27 * \ingroup IfxLld_Gtm_Trig
28 * \defgroup IfxLld_Gtm_Trig_Data_Structures Data Structures
29 * \ingroup IfxLld_Gtm_Trig
30 * \defgroup IfxLld_Gtm_Trig_Trigger_Functions Trigger Functions
31 * \ingroup IfxLld_Gtm_Trig
32 */
33
34 #ifndef IFXGTM_TRIG_H
35 #define IFXGTM_TRIG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "_Impl/IfxGtm_cfg.h"
43 #include "Gtm/Std/IfxGtm_Tim.h"
44
45 /******************************************************************************/
46 /*--------------------------------Enumerations--------------------------------*/
47 /******************************************************************************/
48
49 /** \addtogroup IfxLld_Gtm_Trig_Enumerations
50 * \{ */
51 /** \brief Enum for ADC group
52 */
53 typedef enum
54 {
55 IfxGtm_Trig_AdcGroup_0, /**< \brief For ADC group 0 */
56 IfxGtm_Trig_AdcGroup_1, /**< \brief For ADC group 1 */
57 IfxGtm_Trig_AdcGroup_2, /**< \brief For ADC group 2 */
58 IfxGtm_Trig_AdcGroup_3, /**< \brief For ADC group 3 */
59 IfxGtm_Trig_AdcGroup_4 /**< \brief For ADC group 4 */
60 } IfxGtm_Trig_AdcGroup;
61
62 /** \brief Enum for ADC trigger
63 */
64 typedef enum
65 {
66 IfxGtm_Trig_AdcTrig_0,
67 IfxGtm_Trig_AdcTrig_1,
68 IfxGtm_Trig_AdcTrig_count /**< \brief count of the enum definition */
69 } IfxGtm_Trig_AdcTrig;
70
71 /** \brief Enum for ADC trigger channel
72 */
73 typedef enum
74 {
75 IfxGtm_Trig_AdcTrigChannel_4,
76 IfxGtm_Trig_AdcTrigChannel_5,
77 IfxGtm_Trig_AdcTrigChannel_6,
78 IfxGtm_Trig_AdcTrigChannel_7,
79 IfxGtm_Trig_AdcTrigChannel_13,
80 IfxGtm_Trig_AdcTrigChannel_14,
81 IfxGtm_Trig_AdcTrigChannel_15,
82 IfxGtm_Trig_AdcTrigChannel_count /**< \brief count of the enum definition */
83 } IfxGtm_Trig_AdcTrigChannel;
84
85 /** \brief Enum for ADC trigger source
86 */
87 typedef enum
88 {
89 IfxGtm_Trig_AdcTrigSource_atom0,
90 IfxGtm_Trig_AdcTrigSource_atom1,
91 IfxGtm_Trig_AdcTrigSource_atom2,
92 IfxGtm_Trig_AdcTrigSource_atom3,
93 IfxGtm_Trig_AdcTrigSource_tom0,
94 IfxGtm_Trig_AdcTrigSource_tom1,
95 IfxGtm_Trig_AdcTrigSource_count /**< \brief count of the enum definition */
96 } IfxGtm_Trig_AdcTrigSource;
97
98 /** \brief Enum for DSADC trigger
99 */
100 typedef enum
101 {
102 IfxGtm_Trig_DsadcTrig_0,
103 IfxGtm_Trig_DsadcTrig_1
104 } IfxGtm_Trig_DsadcTrig;
105
106 /** \brief Enum for DSADC trigger source
107 */
108 typedef enum
109 {
110 IfxGtm_Trig_DsadcTrigSource_tomX_6,
111 IfxGtm_Trig_DsadcTrigSource_tomX_7,
112 IfxGtm_Trig_DsadcTrigSource_tomX_13,
113 IfxGtm_Trig_DsadcTrigSource_tomX_14,
114 IfxGtm_Trig_DsadcTrigSource_atomX_4,
115 IfxGtm_Trig_DsadcTrigSource_atomX_5,
116 IfxGtm_Trig_DsadcTrigSource_atomX_6,
117 IfxGtm_Trig_DsadcTrigSource_atomX_7
118 } IfxGtm_Trig_DsadcTrigSource;
119
120 /** \brief Enum for SENT group
121 */
122 typedef enum
123 {
124 IfxGtm_Trig_SentGroup_0, /**< \brief For SENT group 0 */
125 IfxGtm_Trig_SentGroup_1, /**< \brief For SENT group 1 */
126 IfxGtm_Trig_SentGroup_2, /**< \brief For SENT group 2 */
127 IfxGtm_Trig_SentGroup_3, /**< \brief For SENT group 3 */
128 IfxGtm_Trig_SentGroup_4, /**< \brief For SENT group 4 */
129 IfxGtm_Trig_SentGroup_5 /**< \brief For SENT group 5 */
130 } IfxGtm_Trig_SentGroup;
131
132 /** \brief Enum for SENT trigger
133 */
134 typedef enum
135 {
136 IfxGtm_Trig_SentTrig_0 /**< \brief sent trigger 0 */
137 } IfxGtm_Trig_SentTrig;
138
139 /** \brief Enum for SENT trigger channel
140 */
141 typedef enum
142 {
143 IfxGtm_Trig_SentTrigChannel_4,
144 IfxGtm_Trig_SentTrigChannel_5,
145 IfxGtm_Trig_SentTrigChannel_6,
146 IfxGtm_Trig_SentTrigChannel_7,
147 IfxGtm_Trig_SentTrigChannel_13,
148 IfxGtm_Trig_SentTrigChannel_14,
149 IfxGtm_Trig_SentTrigChannel_15,
150 IfxGtm_Trig_SentTrigChannel_count /**< \brief count of the enum definition */
151 } IfxGtm_Trig_SentTrigChannel;
152
153 /** \brief Enum for SENT trigger source
154 */
155 typedef enum
156 {
157 IfxGtm_Trig_SentTrigSource_atom0,
158 IfxGtm_Trig_SentTrigSource_atom1,
159 IfxGtm_Trig_SentTrigSource_atom2,
160 IfxGtm_Trig_SentTrigSource_atom3,
161 IfxGtm_Trig_SentTrigSource_tom0,
162 IfxGtm_Trig_SentTrigSource_tom1,
163 IfxGtm_Trig_SentTrigSource_count /**< \brief count of the enum definition */
164 } IfxGtm_Trig_SentTrigSource;
165
166 /** \} */
167
168 /** \addtogroup IfxLld_Gtm_Trig_Trigger_Functions
169 * \{ */
170
171 /******************************************************************************/
172 /*-------------------------Global Function Prototypes-------------------------*/
173 /******************************************************************************/
174
175 /**
176 * \param gtm Pointer to GTM module
177 * \param dsadcChannel DSADC channel
178 * \param tim TIM object
179 * \param timChannel TIM channel
180 * \return TRUE on success else FALSE
181 */
182 IFX_EXTERN boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel);
183
184 /**
185 * \param gtm Pointer to GTM module
186 * \param dsadcChannel DSADC channel
187 * \param dsadcTrig DSADC trigger
188 * \param sel DSADC trigger source
189 * \return None
190 */
191 IFX_EXTERN void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel);
192
193 /**
194 * \param gtm Pointer to GTM module
195 * \param adcGroup ADC group
196 * \param adcTrig ADC trigger
197 * \param source ADC trigger source
198 * \param channel ADC trigger channel
199 * \return TRUE on success else FALSE
200 */
201 IFX_EXTERN boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel);
202
203 /**
204 * \param gtm Pointer to GTM module
205 * \param sentGroup SENT group
206 * \param sentTrig SENT trigger
207 * \param source SENT trigger source
208 * \param channel SENT trigger channel
209 * \return TRUE on success else FALSE
210 */
211 IFX_EXTERN boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel);
212
213 /** \} */
214
215 #endif /* IFXGTM_TRIG_H */
IfxGtm_Trig_AdcTrigSource_tom1
Definition: IfxGtm_Trig.h:94
IfxGtm_Trig_SentTrig
IfxGtm_Trig_SentTrig
Enum for SENT trigger.
Definition: IfxGtm_Trig.h:134
IfxGtm_Trig_SentTrigSource_atom3
Definition: IfxGtm_Trig.h:160
IfxGtm_Trig_AdcTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:82
IfxGtm_Trig_AdcTrigSource_atom2
Definition: IfxGtm_Trig.h:91
IfxGtm_Trig_SentTrigSource_tom1
Definition: IfxGtm_Trig.h:162
IfxGtm_Trig_AdcTrig_count
count of the enum definition
Definition: IfxGtm_Trig.h:68
IfxGtm_Trig_AdcTrig_0
Definition: IfxGtm_Trig.h:66
IfxGtm_Trig_DsadcTrigSource_atomX_5
Definition: IfxGtm_Trig.h:115
IfxGtm_Trig_SentTrigSource_tom0
Definition: IfxGtm_Trig.h:161
IfxGtm_Trig_AdcTrigChannel_15
Definition: IfxGtm_Trig.h:81
IfxGtm_Trig_SentTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:163
IfxGtm_Trig_DsadcTrig_0
Definition: IfxGtm_Trig.h:102
IfxGtm_Trig_SentTrigChannel_6
Definition: IfxGtm_Trig.h:145
IfxGtm_Trig_DsadcTrigSource_tomX_13
Definition: IfxGtm_Trig.h:112
IfxGtm_Trig_toDsadc
IFX_EXTERN void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
Definition: IfxGtm_Trig.c:171
IfxGtm_Trig_AdcTrig_1
Definition: IfxGtm_Trig.h:67
IfxGtm_Trig_SentTrigSource_atom1
Definition: IfxGtm_Trig.h:158
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxGtm_Trig_toSent
IFX_EXTERN boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
Definition: IfxGtm_Trig.c:239
IfxGtm_Trig_fromDsadc
IFX_EXTERN boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
Definition: IfxGtm_Trig.c:157
IfxGtm_Trig_SentTrigChannel_15
Definition: IfxGtm_Trig.h:149
IfxGtm_Trig_AdcTrigChannel_13
Definition: IfxGtm_Trig.h:79
IfxGtm_Trig_SentTrigSource
IfxGtm_Trig_SentTrigSource
Enum for SENT trigger source.
Definition: IfxGtm_Trig.h:155
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxGtm_Trig_AdcTrigChannel_4
Definition: IfxGtm_Trig.h:75
IfxGtm_Trig_AdcTrig
IfxGtm_Trig_AdcTrig
Enum for ADC trigger.
Definition: IfxGtm_Trig.h:64
IfxGtm_Trig_SentTrigChannel_7
Definition: IfxGtm_Trig.h:146
IfxGtm_Trig_AdcTrigSource_count
count of the enum definition
Definition: IfxGtm_Trig.h:95
IfxGtm_Trig_DsadcTrigSource_tomX_7
Definition: IfxGtm_Trig.h:111
IfxGtm_Trig_SentTrigChannel
IfxGtm_Trig_SentTrigChannel
Enum for SENT trigger channel.
Definition: IfxGtm_Trig.h:141
IfxGtm_Trig_AdcTrigSource_atom1
Definition: IfxGtm_Trig.h:90
IfxGtm_Trig_AdcGroup_1
For ADC group 1.
Definition: IfxGtm_Trig.h:56
IfxGtm_Tim.h
GTM basic functionality.
IfxGtm_Trig_AdcTrigSource
IfxGtm_Trig_AdcTrigSource
Enum for ADC trigger source.
Definition: IfxGtm_Trig.h:87
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxGtm_Trig_AdcTrigSource_atom0
Definition: IfxGtm_Trig.h:89
IfxGtm_Trig_DsadcTrigSource_tomX_14
Definition: IfxGtm_Trig.h:113
IfxGtm_Trig_DsadcTrigSource_atomX_6
Definition: IfxGtm_Trig.h:116
IfxGtm_Trig_SentTrigSource_atom2
Definition: IfxGtm_Trig.h:159
IfxGtm_Trig_DsadcTrig_1
Definition: IfxGtm_Trig.h:103
IfxGtm_Trig_AdcTrigChannel_6
Definition: IfxGtm_Trig.h:77
IfxGtm_Trig_AdcGroup
IfxGtm_Trig_AdcGroup
Enum for ADC group.
Definition: IfxGtm_Trig.h:53
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxGtm_Trig_AdcTrigSource_atom3
Definition: IfxGtm_Trig.h:92
IfxGtm_Trig_SentGroup_2
For SENT group 2.
Definition: IfxGtm_Trig.h:126
IfxGtm_Trig_SentGroup_0
For SENT group 0.
Definition: IfxGtm_Trig.h:124
IfxGtm_Trig_SentGroup
IfxGtm_Trig_SentGroup
Enum for SENT group.
Definition: IfxGtm_Trig.h:122
IfxGtm_Trig_DsadcTrigSource_atomX_4
Definition: IfxGtm_Trig.h:114
IfxGtm_Trig_SentTrigChannel_14
Definition: IfxGtm_Trig.h:148
IfxGtm_Trig_SentTrigSource_atom0
Definition: IfxGtm_Trig.h:157
IfxGtm_Trig_SentGroup_1
For SENT group 1.
Definition: IfxGtm_Trig.h:125
IfxGtm_Trig_SentTrigChannel_5
Definition: IfxGtm_Trig.h:144
IfxGtm_Trig_DsadcTrigSource_tomX_6
Definition: IfxGtm_Trig.h:110
IfxGtm_Trig_AdcGroup_2
For ADC group 2.
Definition: IfxGtm_Trig.h:57
IfxGtm_Trig_AdcGroup_0
For ADC group 0.
Definition: IfxGtm_Trig.h:55
IfxGtm_Trig_AdcGroup_4
For ADC group 4.
Definition: IfxGtm_Trig.h:59
IfxGtm_Trig_SentGroup_3
For SENT group 3.
Definition: IfxGtm_Trig.h:127
IfxGtm_Trig_AdcTrigSource_tom0
Definition: IfxGtm_Trig.h:93
IfxGtm_Trig_SentTrig_0
sent trigger 0
Definition: IfxGtm_Trig.h:136
IfxGtm_Trig_DsadcTrigSource_atomX_7
Definition: IfxGtm_Trig.h:117
IfxGtm_Trig_DsadcTrig
IfxGtm_Trig_DsadcTrig
Enum for DSADC trigger.
Definition: IfxGtm_Trig.h:100
IfxGtm_Trig_AdcGroup_3
For ADC group 3.
Definition: IfxGtm_Trig.h:58
IfxGtm_Trig_SentTrigChannel_13
Definition: IfxGtm_Trig.h:147
IfxGtm_Trig_AdcTrigChannel_5
Definition: IfxGtm_Trig.h:76
IfxGtm_Trig_SentGroup_5
For SENT group 5.
Definition: IfxGtm_Trig.h:129
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxGtm_Trig_AdcTrigChannel_7
Definition: IfxGtm_Trig.h:78
IfxGtm_Trig_AdcTrigChannel_14
Definition: IfxGtm_Trig.h:80
IfxGtm_Trig_toVadc
IFX_EXTERN boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
Definition: IfxGtm_Trig.c:189
IfxGtm_Trig_AdcTrigChannel
IfxGtm_Trig_AdcTrigChannel
Enum for ADC trigger channel.
Definition: IfxGtm_Trig.h:73
IfxGtm_Trig_SentGroup_4
For SENT group 4.
Definition: IfxGtm_Trig.h:128
IfxGtm_cfg.h
GTM on-chip implementation data.
IfxGtm_Trig_SentTrigChannel_count
count of the enum definition
Definition: IfxGtm_Trig.h:150
IfxGtm_Trig_SentTrigChannel_4
Definition: IfxGtm_Trig.h:143
IfxGtm_Trig_DsadcTrigSource
IfxGtm_Trig_DsadcTrigSource
Enum for DSADC trigger source.
Definition: IfxGtm_Trig.h:108


iLLD_TC26B: IfxGtm_cfg.c Source File

  • _Impl
IfxGtm_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_cfg.c
3 * \brief GTM on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxGtm_cfg.h"
IfxGtm_cfg.h
GTM on-chip implementation data.


iLLD_TC26B: IfxGtm_cfg.h Source File

  • _Impl
IfxGtm_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxGtm_cfg.h
3 * \brief GTM on-chip implementation data
4 * \ingroup IfxLld_Gtm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Gtm GTM
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Gtm_Impl Implementation
27 * \ingroup IfxLld_Gtm
28 * \defgroup IfxLld_Gtm_Std Standard Driver
29 * \ingroup IfxLld_Gtm
30 * \defgroup IfxLld_Gtm_Atom Atom Interface Drivers
31 * \ingroup IfxLld_Gtm
32 * \defgroup IfxLld_Gtm_Tom TOM Interface Drivers
33 * \ingroup IfxLld_Gtm
34 * \defgroup IfxLld_Gtm_Tim Tim Interface Drivers
35 * \ingroup IfxLld_Gtm
36 * \defgroup IfxLld_Gtm_Impl_Enumerations Enumerations
37 * \ingroup IfxLld_Gtm_Impl
38 * \defgroup IfxLld_Gtm_Impl_Data_Structures Data Structures
39 * \ingroup IfxLld_Gtm_Impl
40 */
41
42 #ifndef IFXGTM_CFG_H
43 #define IFXGTM_CFG_H 1
44
45 /******************************************************************************/
46 /*----------------------------------Includes----------------------------------*/
47 /******************************************************************************/
48
49 #include "Cpu/Std/IfxCpu_Intrinsics.h"
50 #include "Ifx_Cfg.h"
51 #include "IfxGtm_reg.h"
52 #include "Port/Std/IfxPort.h"
53
54 /******************************************************************************/
55 /*-----------------------------------Macros-----------------------------------*/
56 /******************************************************************************/
57
58 /** \brief Mask for CMU_CLK_EN register (Enable): CLK0
59 */
60 #define IFXGTM_CMU_CLKEN_CLK0 (0x00000002)
61
62 /** \brief Mask for CMU_CLK_EN register (Enable): CLK1
63 */
64 #define IFXGTM_CMU_CLKEN_CLK1 (0x00000008)
65
66 /** \brief Mask for CMU_CLK_EN register (Enable): CLK2
67 */
68 #define IFXGTM_CMU_CLKEN_CLK2 (0x00000020)
69
70 /** \brief Mask for CMU_CLK_EN register (Enable): CLK3
71 */
72 #define IFXGTM_CMU_CLKEN_CLK3 (0x00000080)
73
74 /** \brief Mask for CMU_CLK_EN register (Enable): CLK4
75 */
76 #define IFXGTM_CMU_CLKEN_CLK4 (0x00000200)
77
78 /** \brief Mask for CMU_CLK_EN register (Enable): CLK5
79 */
80 #define IFXGTM_CMU_CLKEN_CLK5 (0x00000800)
81
82 /** \brief Mask for CMU_CLK_EN register (Enable): CLK6
83 */
84 #define IFXGTM_CMU_CLKEN_CLK6 (0x00002000)
85
86 /** \brief Mask for CMU_CLK_EN register (Enable): CLK7
87 */
88 #define IFXGTM_CMU_CLKEN_CLK7 (0x00008000)
89
90 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK0
91 */
92 #define IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)
93
94 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK1
95 */
96 #define IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)
97
98 /** \brief Mask for CMU_CLK_EN register (Enable): ECLK2
99 */
100 #define IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)
101
102 /** \brief Mask for CMU_CLK_EN register (Enable): FXCLK
103 */
104 #define IFXGTM_CMU_CLKEN_FXCLK (0x00800000)
105
106 /** \brief Mask for CMU_CLK_EN register (Enable): ALL clocks
107 */
108 #define IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)
109
110 /** \brief Mask for CMU_CLK_EN register (Disable): CLK0
111 */
112 #define IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)
113
114 /** \brief Mask for CMU_CLK_EN register (Disable): CLK1
115 */
116 #define IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)
117
118 /** \brief Mask for CMU_CLK_EN register (Disable): CLK2
119 */
120 #define IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)
121
122 /** \brief Mask for CMU_CLK_EN register (Disable): CLK3
123 */
124 #define IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)
125
126 /** \brief Mask for CMU_CLK_EN register (Disable): CLK4
127 */
128 #define IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)
129
130 /** \brief Mask for CMU_CLK_EN register (Disable): CLK5
131 */
132 #define IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)
133
134 /** \brief Mask for CMU_CLK_EN register (Disable): CLK6
135 */
136 #define IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)
137
138 /** \brief Mask for CMU_CLK_EN register (Disable): CLK7
139 */
140 #define IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)
141
142 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK0
143 */
144 #define IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)
145
146 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK1
147 */
148 #define IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)
149
150 /** \brief Mask for CMU_CLK_EN register (Disable): ECLK2
151 */
152 #define IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)
153
154 /** \brief Mask for CMU_CLK_EN register (Disable): FXCLK
155 */
156 #define IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)
157
158 /** \brief Mask for CMU_CLK_EN register (Disable): ALL clocks
159 */
160 #define IFXGTM_CMU_CLKDIS_ALL (0x00555555)
161
162 /** \brief
163 */
164 #define IFXGTM_NUM_ATOM_OBJECTS (4)
165
166 #define IFXGTM_NUM_TOM_OBJECTS (2)
167
168 #define IFXGTM_NUM_ATOM_CHANNELS (8)
169
170 #define IFXGTM_NUM_TOM_CHANNELS (16)
171
172 #define IFXGTM_NUM_MODULES (1)
173
174 /** \brief number of TIM channels.
175 */
176 #define IFXGTM_NUM_TIM_CHANNELS (8)
177
178 /******************************************************************************/
179 /*------------------------------Type Definitions------------------------------*/
180 /******************************************************************************/
181
182 typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC;
183
184 /******************************************************************************/
185 /*--------------------------------Enumerations--------------------------------*/
186 /******************************************************************************/
187
188 /** \addtogroup IfxLld_Gtm_Impl_Enumerations
189 * \{ */
190 /** \brief Enum for ATOM objects
191 */
192 typedef enum
193 {
194 IfxGtm_Atom_0, /**< \brief ATOM object 0 */
195 IfxGtm_Atom_1, /**< \brief ATOM object 1 */
196 IfxGtm_Atom_2, /**< \brief ATOM object 2 */
197 IfxGtm_Atom_3 /**< \brief ATOM object 3 */
198 } IfxGtm_Atom;
199
200 /** \brief Enum for ATOM channels
201 */
202 typedef enum
203 {
204 IfxGtm_Atom_Ch_none = -1, /**< \brief Not Selected */
205 IfxGtm_Atom_Ch_0, /**< \brief ATOM channel 0 */
206 IfxGtm_Atom_Ch_1, /**< \brief ATOM channel 1 */
207 IfxGtm_Atom_Ch_2, /**< \brief ATOM channel 2 */
208 IfxGtm_Atom_Ch_3, /**< \brief ATOM channel 3 */
209 IfxGtm_Atom_Ch_4, /**< \brief ATOM channel 4 */
210 IfxGtm_Atom_Ch_5, /**< \brief ATOM channel 5 */
211 IfxGtm_Atom_Ch_6, /**< \brief ATOM channel 6 */
212 IfxGtm_Atom_Ch_7 /**< \brief ATOM channel 7 */
213 } IfxGtm_Atom_Ch;
214
215 /** \brief Enum for Dpll subincrements
216 */
217 typedef enum
218 {
219 IfxGtm_Dpll_SubInc_1 = 0, /**< \brief subincrement1 */
220 IfxGtm_Dpll_SubInc_2 /**< \brief subincrement2 */
221 } IfxGtm_Dpll_SubInc;
222
223 /** \brief Enum Enable disable feature control
224 */
225 typedef enum
226 {
227 IfxGtm_FeatureControl_disabled = 0, /**< \brief disabled */
228 IfxGtm_FeatureControl_disable = 1, /**< \brief disable */
229 IfxGtm_FeatureControl_enable = 2, /**< \brief enable */
230 IfxGtm_FeatureControl_enabled = 3 /**< \brief enabled */
231 } IfxGtm_FeatureControl;
232
233 /** \brief Enum for TIM objects
234 */
235 typedef enum
236 {
237 IfxGtm_Tim_0, /**< \brief TIM object 0 */
238 IfxGtm_Tim_1, /**< \brief TIM object 1 */
239 IfxGtm_Tim_2 /**< \brief TIM object 2 */
240 } IfxGtm_Tim;
241
242 /** \brief Enum for TIM channels
243 */
244 typedef enum
245 {
246 IfxGtm_Tim_Ch_0, /**< \brief TIM channel 0 */
247 IfxGtm_Tim_Ch_1, /**< \brief TIM channel 1 */
248 IfxGtm_Tim_Ch_2, /**< \brief TIM channel 2 */
249 IfxGtm_Tim_Ch_3, /**< \brief TIM channel 3 */
250 IfxGtm_Tim_Ch_4, /**< \brief TIM channel 4 */
251 IfxGtm_Tim_Ch_5, /**< \brief TIM channel 5 */
252 IfxGtm_Tim_Ch_6, /**< \brief TIM channel 6 */
253 IfxGtm_Tim_Ch_7 /**< \brief TIM channel 7 */
254 } IfxGtm_Tim_Ch;
255
256 /** \brief Enum for TOM objects
257 */
258 typedef enum
259 {
260 IfxGtm_Tom_0, /**< \brief TOM object 0 */
261 IfxGtm_Tom_1 /**< \brief TOM object 1 */
262 } IfxGtm_Tom;
263
264 /** \brief Enum for TOM channels
265 */
266 typedef enum
267 {
268 IfxGtm_Tom_Ch_none = -1, /**< \brief Not Selected */
269 IfxGtm_Tom_Ch_0, /**< \brief TOM channel 0 */
270 IfxGtm_Tom_Ch_1, /**< \brief TOM channel 1 */
271 IfxGtm_Tom_Ch_2, /**< \brief TOM channel 2 */
272 IfxGtm_Tom_Ch_3, /**< \brief TOM channel 3 */
273 IfxGtm_Tom_Ch_4, /**< \brief TOM channel 4 */
274 IfxGtm_Tom_Ch_5, /**< \brief TOM channel 5 */
275 IfxGtm_Tom_Ch_6, /**< \brief TOM channel 6 */
276 IfxGtm_Tom_Ch_7, /**< \brief TOM channel 7 */
277 IfxGtm_Tom_Ch_8, /**< \brief TOM channel 8 */
278 IfxGtm_Tom_Ch_9, /**< \brief TOM channel 9 */
279 IfxGtm_Tom_Ch_10, /**< \brief TOM channel 10 */
280 IfxGtm_Tom_Ch_11, /**< \brief TOM channel 11 */
281 IfxGtm_Tom_Ch_12, /**< \brief TOM channel 12 */
282 IfxGtm_Tom_Ch_13, /**< \brief TOM channel 13 */
283 IfxGtm_Tom_Ch_14, /**< \brief TOM channel 14 */
284 IfxGtm_Tom_Ch_15 /**< \brief TOM channel 15 */
285 } IfxGtm_Tom_Ch;
286
287 /** \brief Enum for TOM global channel control units
288 */
289 typedef enum
290 {
291 IfxGtm_Tom_Tgc_0, /**< \brief TOM global channel control unit0 */
292 IfxGtm_Tom_Tgc_1 /**< \brief TOM global channel control unit1 */
293 } IfxGtm_Tom_Tgc;
294
295 /** \} */
296
297 /******************************************************************************/
298 /*-----------------------------Data Structures--------------------------------*/
299 /******************************************************************************/
300
301 /** \addtogroup IfxLld_Gtm_Impl_Data_Structures
302 * \{ */
303 /** \brief TOM TGC objects
304 */
305 struct IfxGtm_Tom_TGC
306 {
307 Ifx_GTM_TOM_TGC0_GLB_CTRL GLB_CTRL; /**< \brief 30, TOM TGC0 Global Control Register */
308 Ifx_GTM_TOM_TGC0_ACT_TB ACT_TB; /**< \brief 34, TOM TGC0 Action Time Base Register */
309 Ifx_GTM_TOM_TGC0_FUPD_CTRL FUPD_CTRL; /**< \brief 38, TOM TGC0 Force Update Control Register */
310 Ifx_GTM_TOM_TGC0_INT_TRIG INT_TRIG; /**< \brief 3C, TOM TGC0 Internal Trigger Control Register */
311 Ifx_GTM_TOM_CH xxxCH1; /**< \brief 40, TOM channel objects */
312 Ifx_GTM_TOM_TGC0_ENDIS_CTRL ENDIS_CTRL; /**< \brief 70, TOM TGC0 Enable/Disable Control Register */
313 Ifx_GTM_TOM_TGC0_ENDIS_STAT ENDIS_STAT; /**< \brief 74, TOM TGC0 Enable/Disable Status Register */
314 Ifx_GTM_TOM_TGC0_OUTEN_CTRL OUTEN_CTRL; /**< \brief 78, TOM TGC0 Output Enable Control Register */
315 Ifx_GTM_TOM_TGC0_OUTEN_STAT OUTEN_STAT; /**< \brief 7C, TOM TGC0 Output Enable Status Register */
316 };
317
318 /** \} */
319
320 #endif /* IFXGTM_CFG_H */
IfxGtm_Tom_TGC::FUPD_CTRL
Ifx_GTM_TOM_TGC0_FUPD_CTRL FUPD_CTRL
38, TOM TGC0 Force Update Control Register
Definition: IfxGtm_cfg.h:309
IfxGtm_Atom_2
ATOM object 2.
Definition: IfxGtm_cfg.h:196
IfxGtm_Tom_TGC::ENDIS_CTRL
Ifx_GTM_TOM_TGC0_ENDIS_CTRL ENDIS_CTRL
70, TOM TGC0 Enable/Disable Control Register
Definition: IfxGtm_cfg.h:312
IfxGtm_Tim_0
TIM object 0.
Definition: IfxGtm_cfg.h:237
IfxGtm_FeatureControl_disabled
disabled
Definition: IfxGtm_cfg.h:227
IfxGtm_Tom_1
TOM object 1.
Definition: IfxGtm_cfg.h:261
IfxGtm_Tom_TGC::GLB_CTRL
Ifx_GTM_TOM_TGC0_GLB_CTRL GLB_CTRL
30, TOM TGC0 Global Control Register
Definition: IfxGtm_cfg.h:307
IfxGtm_Tim_Ch_0
TIM channel 0.
Definition: IfxGtm_cfg.h:246
IfxGtm_Atom_Ch_0
ATOM channel 0.
Definition: IfxGtm_cfg.h:205
IfxGtm_Dpll_SubInc_1
subincrement1
Definition: IfxGtm_cfg.h:219
IfxGtm_Tom_TGC::ENDIS_STAT
Ifx_GTM_TOM_TGC0_ENDIS_STAT ENDIS_STAT
74, TOM TGC0 Enable/Disable Status Register
Definition: IfxGtm_cfg.h:313
IfxGtm_Tim_2
TIM object 2.
Definition: IfxGtm_cfg.h:239
IfxGtm_Atom
IfxGtm_Atom
Enum for ATOM objects.
Definition: IfxGtm_cfg.h:192
IfxGtm_Atom_Ch_4
ATOM channel 4.
Definition: IfxGtm_cfg.h:209
IfxGtm_Tom_Ch_10
TOM channel 10.
Definition: IfxGtm_cfg.h:279
IfxGtm_Tim
IfxGtm_Tim
Enum for TIM objects.
Definition: IfxGtm_cfg.h:235
IfxCpu_Intrinsics.h
IfxGtm_Tom_Ch_9
TOM channel 9.
Definition: IfxGtm_cfg.h:278
IfxGtm_Tom_Tgc_0
TOM global channel control unit0.
Definition: IfxGtm_cfg.h:291
IfxGtm_Tom_Ch
IfxGtm_Tom_Ch
Enum for TOM channels.
Definition: IfxGtm_cfg.h:266
IfxGtm_Tim_Ch_5
TIM channel 5.
Definition: IfxGtm_cfg.h:251
IfxGtm_Tom_Ch_3
TOM channel 3.
Definition: IfxGtm_cfg.h:272
IfxGtm_Tom_Ch_13
TOM channel 13.
Definition: IfxGtm_cfg.h:282
IfxGtm_Tom_TGC
TOM TGC objects.
Definition: IfxGtm_cfg.h:305
IfxGtm_FeatureControl_disable
disable
Definition: IfxGtm_cfg.h:228
IfxGtm_Tom_Ch_1
TOM channel 1.
Definition: IfxGtm_cfg.h:270
IfxGtm_Atom_Ch_6
ATOM channel 6.
Definition: IfxGtm_cfg.h:211
IfxGtm_FeatureControl_enabled
enabled
Definition: IfxGtm_cfg.h:230
IfxGtm_Atom_Ch_2
ATOM channel 2.
Definition: IfxGtm_cfg.h:207
IfxGtm_Tim_1
TIM object 1.
Definition: IfxGtm_cfg.h:238
IfxGtm_Tom_Ch_6
TOM channel 6.
Definition: IfxGtm_cfg.h:275
IfxGtm_Tom_TGC::ACT_TB
Ifx_GTM_TOM_TGC0_ACT_TB ACT_TB
34, TOM TGC0 Action Time Base Register
Definition: IfxGtm_cfg.h:308
IfxGtm_Dpll_SubInc
IfxGtm_Dpll_SubInc
Enum for Dpll subincrements.
Definition: IfxGtm_cfg.h:217
Ifx_GTM_TOM_TGC
volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC
Definition: IfxGtm_cfg.h:182
IfxGtm_Tom_Ch_4
TOM channel 4.
Definition: IfxGtm_cfg.h:273
IfxGtm_Tom_Ch_none
Not Selected.
Definition: IfxGtm_cfg.h:268
IfxGtm_Tom_TGC::OUTEN_CTRL
Ifx_GTM_TOM_TGC0_OUTEN_CTRL OUTEN_CTRL
78, TOM TGC0 Output Enable Control Register
Definition: IfxGtm_cfg.h:314
IfxGtm_Tim_Ch_7
TIM channel 7.
Definition: IfxGtm_cfg.h:253
IfxGtm_FeatureControl_enable
enable
Definition: IfxGtm_cfg.h:229
IfxGtm_FeatureControl
IfxGtm_FeatureControl
Enum Enable disable feature control.
Definition: IfxGtm_cfg.h:225
IfxGtm_Atom_1
ATOM object 1.
Definition: IfxGtm_cfg.h:195
IfxGtm_Tim_Ch_6
TIM channel 6.
Definition: IfxGtm_cfg.h:252
IfxGtm_Tom_Ch_12
TOM channel 12.
Definition: IfxGtm_cfg.h:281
IfxGtm_Tom_TGC::INT_TRIG
Ifx_GTM_TOM_TGC0_INT_TRIG INT_TRIG
3C, TOM TGC0 Internal Trigger Control Register
Definition: IfxGtm_cfg.h:310
IfxGtm_Tim_Ch_3
TIM channel 3.
Definition: IfxGtm_cfg.h:249
IfxGtm_Tom_Ch_5
TOM channel 5.
Definition: IfxGtm_cfg.h:274
IfxGtm_Atom_Ch_3
ATOM channel 3.
Definition: IfxGtm_cfg.h:208
IfxGtm_Atom_Ch_1
ATOM channel 1.
Definition: IfxGtm_cfg.h:206
IfxGtm_Atom_3
ATOM object 3.
Definition: IfxGtm_cfg.h:197
IfxGtm_Tom_Ch_0
TOM channel 0.
Definition: IfxGtm_cfg.h:269
IfxGtm_Atom_0
ATOM object 0.
Definition: IfxGtm_cfg.h:194
IfxGtm_Tom
IfxGtm_Tom
Enum for TOM objects.
Definition: IfxGtm_cfg.h:258
IfxGtm_Tom_TGC::OUTEN_STAT
Ifx_GTM_TOM_TGC0_OUTEN_STAT OUTEN_STAT
7C, TOM TGC0 Output Enable Status Register
Definition: IfxGtm_cfg.h:315
IfxGtm_Atom_Ch_none
Not Selected.
Definition: IfxGtm_cfg.h:204
IfxGtm_Dpll_SubInc_2
subincrement2
Definition: IfxGtm_cfg.h:220
IfxGtm_Tom_Ch_11
TOM channel 11.
Definition: IfxGtm_cfg.h:280
IfxGtm_Tom_0
TOM object 0.
Definition: IfxGtm_cfg.h:260
IfxGtm_Atom_Ch_7
ATOM channel 7.
Definition: IfxGtm_cfg.h:212
IfxGtm_Tom_Tgc_1
TOM global channel control unit1.
Definition: IfxGtm_cfg.h:292
IfxGtm_Tim_Ch_1
TIM channel 1.
Definition: IfxGtm_cfg.h:247
IfxGtm_Tom_Ch_7
TOM channel 7.
Definition: IfxGtm_cfg.h:276
IfxGtm_Tom_Ch_8
TOM channel 8.
Definition: IfxGtm_cfg.h:277
IfxGtm_Tim_Ch
IfxGtm_Tim_Ch
Enum for TIM channels.
Definition: IfxGtm_cfg.h:244
IfxGtm_Tom_Tgc
IfxGtm_Tom_Tgc
Enum for TOM global channel control units.
Definition: IfxGtm_cfg.h:289
IfxGtm_Tom_Ch_2
TOM channel 2.
Definition: IfxGtm_cfg.h:271
IfxGtm_Tim_Ch_4
TIM channel 4.
Definition: IfxGtm_cfg.h:250
IfxGtm_Tim_Ch_2
TIM channel 2.
Definition: IfxGtm_cfg.h:248
IfxGtm_Atom_Ch_5
ATOM channel 5.
Definition: IfxGtm_cfg.h:210
IfxGtm_Tom_Ch_15
TOM channel 15.
Definition: IfxGtm_cfg.h:284
IfxGtm_Tom_Ch_14
TOM channel 14.
Definition: IfxGtm_cfg.h:283
IfxGtm_Atom_Ch
IfxGtm_Atom_Ch
Enum for ATOM channels.
Definition: IfxGtm_cfg.h:202
IfxGtm_Tom_TGC::xxxCH1
Ifx_GTM_TOM_CH xxxCH1
40, TOM channel objects
Definition: IfxGtm_cfg.h:311
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxHssl.c Source File

  • Hssl
  • Std
IfxHssl.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl.c
3 * \brief HSSL basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxHssl.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
37 {
38 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
39 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
40 hsct->CLC.B.DISR = 1; /* disables the module */
41 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
42 }
43
44
45 void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
46 {
47 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
48 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
49 hssl->CLC.B.DISR = 1; /* disables the module */
50 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
51 }
52
53
54 void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
55 {
56 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
57 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
58 hsct->CLC.B.DISR = 0; /* enables the module */
59 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
60 }
61
62
63 void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
64 {
65 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
66 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
67 hssl->CLC.B.DISR = 0; /* enables the module */
68 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
69 }
70
71
72 Ifx_HSCT *IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
73 {
74 Ifx_HSCT *module;
75
76 if (hsct < IFXHSSL_NUM_MODULES)
77 {
78 module = (Ifx_HSCT *)IfxHssl_cfg_hsctIndexMap[hsct].module;
79 }
80 else
81 {
82 module = NULL_PTR;
83 }
84
85 return module;
86 }
87
88
89 IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
90 {
91 uint32 index;
92 IfxHssl_hsctIndex result;
93
94 result = IfxHssl_hsctIndex_none;
95
96 for (index = 0; index < IFXHSSL_NUM_MODULES; index++)
97 {
98 if (IfxHssl_cfg_hsctIndexMap[index].module == hsct)
99 {
100 result = (IfxHssl_hsctIndex)IfxHssl_cfg_hsctIndexMap[index].index;
101 break;
102 }
103 }
104
105 return result;
106 }
107
108
109 volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
110 {
111 IFX_UNUSED_PARAMETER(hsct);
112 return &MODULE_SRC.HSCT.HSCT[0].SR;
113 }
114
115
116 Ifx_HSSL *IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
117 {
118 Ifx_HSSL *module;
119
120 if (hssl < IFXHSSL_NUM_MODULES)
121 {
122 module = (Ifx_HSSL *)IfxHssl_cfg_hsslIndexMap[hssl].module;
123 }
124 else
125 {
126 module = NULL_PTR;
127 }
128
129 return module;
130 }
131
132
133 volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
134 {
135 IFX_UNUSED_PARAMETER(hssl);
136 return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].COK;
137 }
138
139
140 volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
141 {
142 IFX_UNUSED_PARAMETER(hssl);
143 return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].ERR;
144 }
145
146
147 volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
148 {
149 IFX_UNUSED_PARAMETER(hssl);
150 return &MODULE_SRC.HSSL.EXI;
151 }
152
153
154 IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
155 {
156 uint32 index;
157 IfxHssl_hsslIndex result;
158
159 result = IfxHssl_hsslIndex_none;
160
161 for (index = 0; index < IFXHSSL_NUM_MODULES; index++)
162 {
163 if (IfxHssl_cfg_hsslIndexMap[index].module == hssl)
164 {
165 result = (IfxHssl_hsslIndex)IfxHssl_cfg_hsslIndexMap[index].index;
166 break;
167 }
168 }
169
170 return result;
171 }
172
173
174 volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
175 {
176 IFX_UNUSED_PARAMETER(hssl);
177 return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].RDI;
178 }
179
180
181 volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
182 {
183 IFX_UNUSED_PARAMETER(hssl);
184 return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].TRG;
185 }
186
187
188 void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
189 {
190 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
191
192 IfxScuWdt_clearCpuEndinit(passwd);
193 hsct->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
194 hsct->KRST1.B.RST = 1;
195 IfxScuWdt_setCpuEndinit(passwd);
196
197 while (0 == hsct->KRST0.B.RSTSTAT) /* Wait until reset is executed */
198
199 {}
200
201 IfxScuWdt_clearCpuEndinit(passwd);
202 hsct->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
203 IfxScuWdt_setCpuEndinit(passwd);
204 }
205
206
207 void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
208 {
209 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
210
211 IfxScuWdt_clearCpuEndinit(passwd);
212 hssl->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
213 hssl->KRST1.B.RST = 1;
214 IfxScuWdt_setCpuEndinit(passwd);
215
216 while (0 == hssl->KRST0.B.RSTSTAT) /* Wait until reset is executed */
217
218 {}
219
220 IfxScuWdt_clearCpuEndinit(passwd);
221 hssl->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
222 IfxScuWdt_setCpuEndinit(passwd);
223 }
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:57
IfxHssl_resetHsslKernel
void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
resets the HSSL kernel
Definition: IfxHssl.c:207
IfxHssl_hsslIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:73
IfxHssl_hsctIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:65
IfxHssl_resetHsctKernel
void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
resets HSCT kernel
Definition: IfxHssl.c:188
IfxHssl_enableHsslModule
void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:63
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:71
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxHssl_getHsslIndex
IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified.
Definition: IfxHssl.c:154
IfxHssl_getHsctSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT.
Definition: IfxHssl.c:109
IfxHssl_enableHsctModule
void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:54
IfxHssl_getHsslTRGSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel.
Definition: IfxHssl.c:181
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxHssl_getHsctAddress
Ifx_HSCT * IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
Definition: IfxHssl.c:72
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxHssl_getHsslAddress
Ifx_HSSL * IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
Definition: IfxHssl.c:116
IfxHssl_getHsslEXISrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt.
Definition: IfxHssl.c:147
IfxHssl_getHsslRDISrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:174
IfxHssl_disableHsctModule
void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
Disables hsct module.
Definition: IfxHssl.c:36
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:51
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxHssl_getHsctIndex
IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified.
Definition: IfxHssl.c:89
IfxHssl_cfg_hsctIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:35
IfxHssl_getHsslCOKSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:133
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxHssl_getHsslERRSrcPointer
volatile Ifx_SRC_SRCR * IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel.
Definition: IfxHssl.c:140
IfxHssl_disableHsslModule
void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
DIsables the hssl module.
Definition: IfxHssl.c:45
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxHssl.h
HSSL basic functionality.
IfxHssl_cfg_hsslIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:39
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:63


iLLD_TC26B: IfxHssl.h Source File

  • Hssl
  • Std
IfxHssl.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl.h
3 * \brief HSSL basic functionality
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Hssl_Std_Enumerations Enumerations
26 * \ingroup IfxLld_Hssl_Std
27 * \defgroup IfxLld_Hssl_Std_HsctFunctions Hsct Functions
28 * \ingroup IfxLld_Hssl_Std
29 * \defgroup IfxLld_Hssl_Std_Structures Data Structures
30 * \ingroup IfxLld_Hssl_Std
31 * \defgroup IfxLld_Hssl_Std_HsslFunctions Hssl Functions
32 * \ingroup IfxLld_Hssl_Std
33 */
34
35 #ifndef IFXHSSL_H
36 #define IFXHSSL_H 1
37
38 /******************************************************************************/
39 /*----------------------------------Includes----------------------------------*/
40 /******************************************************************************/
41
42 #include "_Impl/IfxHssl_cfg.h"
43 #include "Cpu/Std/IfxCpu_Intrinsics.h"
44 #include "Scu/Std/IfxScuWdt.h"
45 #include "IfxHssl_bf.h"
46 #include "IfxHsct_bf.h"
47 #include "Src/Std/IfxSrc.h"
48
49 /******************************************************************************/
50 /*--------------------------------Enumerations--------------------------------*/
51 /******************************************************************************/
52
53 /** \addtogroup IfxLld_Hssl_Std_Enumerations
54 * \{ */
55 /** \brief channel selection
56 */
57 typedef enum
58 {
59 IfxHssl_ChannelId_0, /**< \brief Channel 0 */
60 IfxHssl_ChannelId_1, /**< \brief Channel 1 */
61 IfxHssl_ChannelId_2, /**< \brief Channel 2 */
62 IfxHssl_ChannelId_3 /**< \brief Channel 3 */
63 } IfxHssl_ChannelId;
64
65 /** \brief SysClk / Reference Clock Frequency rate
66 * Definition in Ifx_HSCT.INIT.B.SRCF
67 */
68 typedef enum
69 {
70 IfxHssl_ClockFrequencyRate_20Mhz = 0, /**< \brief SysClk/ RefClk is 20 MHz (Divider 1/1) */
71 IfxHssl_ClockFrequencyRate_10Mhz = 1 /**< \brief SysClk/ RefClk is 10 MHz (Divider 1/2) */
72 } IfxHssl_ClockFrequencyRate;
73
74 /** \brief communication command selection
75 * Definition in Ifx_HSSL.I.ICON.B.RWT
76 */
77 typedef enum
78 {
79 IfxHssl_Command_noAction = 0, /**< \brief command no action */
80 IfxHssl_Command_readFrame = 1, /**< \brief command read frame */
81 IfxHssl_Command_writeFrame = 2, /**< \brief command write frame */
82 IfxHssl_Command_triggerFrame = 3 /**< \brief command trigger frame */
83 } IfxHssl_Command;
84
85 /** \brief predefined control command payload values
86 */
87 typedef enum
88 {
89 IfxHssl_ControlCommand_ping = 0, /**< \brief ping (send by master. Slave sends back a fixed 32-bit payload result.) */
90 IfxHssl_ControlCommand_highSpeedClockStart = 2, /**< \brief slave interface clock multiplier start (in preparation for high speed mode) */
91 IfxHssl_ControlCommand_highSpeedClockStop = 4, /**< \brief slave interface clock multiplier stop (after fallback from high speed mode) */
92 IfxHssl_ControlCommand_lowSpeedTransmission = 8, /**< \brief select low speed mode for transfers from the Master to the Slave */
93 IfxHssl_ControlCommand_highSpeedTransmission = 16, /**< \brief select high speed mode for transfers from the Master to the Slave */
94 IfxHssl_ControlCommand_lowSpeedReception = 32, /**< \brief select low speed mode for transfers from the Slave to the Master */
95 IfxHssl_ControlCommand_mediumSpeedReception = 64, /**< \brief select medium speed mode for transfers from the Slave to the master */
96 IfxHssl_ControlCommand_highSpeedReception = 128, /**< \brief select high speed mode for transfers from the Slave to the master */
97 IfxHssl_ControlCommand_enableReception = 49, /**< \brief enable Slave interface transmitter */
98 IfxHssl_ControlCommand_disableReception = 50, /**< \brief disable Slave interface transmitter */
99 IfxHssl_ControlCommand_turnOnClockTestMode = 52, /**< \brief turn on clock test mode */
100 IfxHssl_ControlCommand_turnOffClockTestMode = 56, /**< \brief turn off clock test mode */
101 IfxHssl_ControlCommand_turnOnPayloadLoopback = 255 /**< \brief turn on payload loopback */
102 } IfxHssl_ControlCommand;
103
104 /** \brief Defines the length of the data in bits of the write and read command.
105 * Definition in Ifx_HSSL.I.ICON.B.DATLEN
106 */
107 typedef enum
108 {
109 IfxHssl_DataLength_8bit = 0, /**< \brief 8 bit */
110 IfxHssl_DataLength_16bit = 1, /**< \brief 16 bit */
111 IfxHssl_DataLength_32bit = 2 /**< \brief 32 bit */
112 } IfxHssl_DataLength;
113
114 /** \brief HSCT interrupt source
115 * Definition in Ifx_HSCT.IRQ
116 */
117 typedef enum
118 {
119 IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF, /**< \brief Header error detected */
120 IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF, /**< \brief Payload error detected */
121 IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF, /**< \brief HSCT Command error */
122 IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF, /**< \brief Interface control frame send */
123 IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF, /**< \brief Speed mode switch error */
124 IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF, /**< \brief Unsolicited message frame send finished */
125 IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF, /**< \brief Pll lock lost error */
126 IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF, /**< \brief Unsolicited message received */
127 IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF, /**< \brief PING Answer Received */
128 IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF, /**< \brief TX transfer error occurred on a disabled
129 * TX channel */
130 IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF, /**< \brief Synchronization FIFO overflow (in RX
131 * direction) */
132 IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF /**< \brief Synchronization FIFO underflow (in TX
133 * direction) */
134 } IfxHssl_Hsct_InterruptSource;
135
136 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
137 * Definition in Ifx_HSCT.CLC.B.EDIS
138 */
139 typedef enum
140 {
141 IfxHssl_Hsct_SleepMode_enable = 0, /**< \brief enables sleep mode */
142 IfxHssl_Hsct_SleepMode_disable = 1 /**< \brief disables sleep mode */
143 } IfxHssl_Hsct_SleepMode;
144
145 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
146 * Definition in Ifx_HSSL.CLC.B.EDIS
147 */
148 typedef enum
149 {
150 IfxHssl_Hssl_SleepMode_enable = 0, /**< \brief enables sleep mode */
151 IfxHssl_Hssl_SleepMode_disable = 1 /**< \brief disables sleep mode */
152 } IfxHssl_Hssl_SleepMode;
153
154 /** \brief interface mode (master IF /slave IF)
155 * Definition in Ifx_HSCT.INIT.B.IFM
156 */
157 typedef enum
158 {
159 IfxHssl_InterfaceMode_master = 0, /**< \brief master IF mode */
160 IfxHssl_InterfaceMode_slave = 1 /**< \brief slave IF mode */
161 } IfxHssl_InterfaceMode;
162
163 /** \brief master mode receive speed
164 * Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED
165 */
166 typedef enum
167 {
168 IfxHssl_MasterModeRxSpeed_lowSpeed = 0, /**< \brief low speed */
169 IfxHssl_MasterModeRxSpeed_mediumSpeed = 1, /**< \brief medium speed */
170 IfxHssl_MasterModeRxSpeed_highSpeed = 2 /**< \brief high speed */
171 } IfxHssl_MasterModeRxSpeed;
172
173 /** \brief master mode transmit speed
174 * Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED
175 */
176 typedef enum
177 {
178 IfxHssl_MasterModeTxSpeed_lowSpeed = 0, /**< \brief low speed */
179 IfxHssl_MasterModeTxSpeed_highSpeed = 2 /**< \brief high speed */
180 } IfxHssl_MasterModeTxSpeed;
181
182 /** \brief PLL reference clock
183 * Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN
184 */
185 typedef enum
186 {
187 IfxHssl_PllReferenceClock_hsctSystemClockInput = 0, /**< \brief hsct system clock input (HSCT SysClk_i) */
188 IfxHssl_PllReferenceClock_oscillatorInput = 1 /**< \brief oscillator input */
189 } IfxHssl_PllReferenceClock;
190
191 /** \brief streaming mode ( single / continuous )
192 * Definition in Ifx_HSSL.CFG.B.SMT/SMR
193 */
194 typedef enum
195 {
196 IfxHssl_StreamingMode_continuous = 0, /**< \brief streaming mode continuous (with two memory blocks) */
197 IfxHssl_StreamingMode_single = 1 /**< \brief streaming mode single (with one memory block) */
198 } IfxHssl_StreamingMode;
199
200 /** \brief OCDS Suspend Control (OCDS.SUS)
201 */
202 typedef enum
203 {
204 IfxHssl_SuspendMode_none = 0, /**< \brief No suspend */
205 IfxHssl_SuspendMode_hard = 1, /**< \brief Hard Suspend */
206 IfxHssl_SuspendMode_soft = 2 /**< \brief Soft Suspend */
207 } IfxHssl_SuspendMode;
208
209 /** \} */
210
211 /** \brief HSSL channel error interrupt source, which triggers the ERR interrupt
212 * Definition in Ifx_HSSL.MFLAGS
213 */
214 typedef enum
215 {
216 IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError = IFX_HSSL_MFLAGS_NACK_OFF, /**< \brief NACK error (triggers ERR interrupt) */
217 IfxHssl_Hssl_ERRInterruptSource_transactionTagError = IFX_HSSL_MFLAGS_TTE_OFF, /**< \brief Transaction Tag Error (triggers ERR interrupt) */
218 IfxHssl_Hssl_ERRInterruptSource_timeoutError = IFX_HSSL_MFLAGS_TIMEOUT_OFF, /**< \brief Timeout error (triggers ERR interrupt) */
219 IfxHssl_Hssl_ERRInterruptSource_unexpectedError = IFX_HSSL_MFLAGS_UNEXPECTED_OFF /**< \brief Unexpected error (triggers ERR interrupt) */
220 } IfxHssl_Hssl_ERRInterruptSource;
221
222 /** \brief HSSL global error interrupt source, which triggers the EXI interrupt
223 * Definition in Ifx_HSSL.MFLAGS
224 */
225 typedef enum
226 {
227 IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation = IFX_HSSL_MFLAGS_MAV_OFF, /**< \brief Memory Access Violation error (triggers EXI interrupt) */
228 IfxHssl_Hssl_EXIInterruptSource_busAccessError = IFX_HSSL_MFLAGS_SRIE_OFF, /**< \brief SRI/SPB Bus Access Error (triggers EXI interrupt) */
229 IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError = IFX_HSSL_MFLAGS_PIE1_OFF, /**< \brief PHY Inconsistency Error 1 (Channel Number
230 * Code Error, triggers EXI interrupt) */
231 IfxHssl_Hssl_EXIInterruptSource_dataLengthError = IFX_HSSL_MFLAGS_PIE2_OFF, /**< \brief PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt) */
232 IfxHssl_Hssl_EXIInterruptSource_crcError = IFX_HSSL_MFLAGS_CRCE_OFF /**< \brief CRC error (triggers EXI interrupt) */
233 } IfxHssl_Hssl_EXIInterruptSource;
234
235 /******************************************************************************/
236 /*-----------------------------Data Structures--------------------------------*/
237 /******************************************************************************/
238
239 /** \addtogroup IfxLld_Hssl_Std_Structures
240 * \{ */
241 /** \brief HSCT module handle
242 */
243 typedef struct
244 {
245 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
246 boolean loopBack; /**< \brief loopc back selection */
247 } IfxHssl_Hsct;
248
249 /** \brief Configuration structure of the HSCT module
250 */
251 typedef struct
252 {
253 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
254 IfxHssl_InterfaceMode interfaceMode; /**< \brief interface mode (master IF /slave IF) */
255 boolean highSpeedMode; /**< \brief high speed mode selection */
256 boolean loopBack; /**< \brief loopc back selection */
257 } IfxHssl_Hsct_Config;
258
259 /** \} */
260
261 /** \addtogroup IfxLld_Hssl_Std_HsctFunctions
262 * \{ */
263
264 /******************************************************************************/
265 /*-------------------------Inline Function Prototypes-------------------------*/
266 /******************************************************************************/
267
268 /** \brief Clears the HSCT interrupt flag
269 * \param hsct pointer to HSCT registers
270 * \param source HSCT interrupt source
271 * \return None
272 */
273 IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
274
275 /** \brief Enables HSCT interrupt flag
276 * \param hsct pointer to HSCT registers
277 * \param source HSCT interrupt source
278 * \return None
279 */
280 IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
281
282 /** \brief Enables HSCT interrupt
283 * \param hsct pointer to HSCT registers
284 * \param typeOfService Type of Service (Cpu or DMA)
285 * \param priority Priority of the interrupt
286 * \return None
287 */
288 IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority);
289
290 /** \brief Enables HSCT interrupt flag
291 * \param hsct pointer to HSCT registers
292 * \param source HSCT interrupt source
293 * \return None
294 */
295 IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
296
297 /** \brief Returns the HSCT interrupt flag status
298 * \param hsct pointer to HSCT registers
299 * \param source HSCT interrupt source
300 * \return Status (TRUE / FALSE)
301 */
302 IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
303
304 /** \brief Sets the sensitivity of the module to sleep signal
305 * \param hsct pointer to HSCT registers
306 * \param mode mode selection (enable/disable)
307 * \return None
308 */
309 IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode);
310
311 /** \brief Get the last received unsolicited status message
312 * \param hsct pointer to HSCT registers
313 * \return Get the unsolicited status message.
314 */
315 IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct);
316
317 /** \brief Send the unsolicited status message
318 * \param hsct pointer to HSCT registers
319 * \param message Unsolicited status message to be sent
320 * \return None
321 */
322 IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message);
323
324 /** \brief Set the HSCT RX link speed
325 * \param hsct pointer to HSCT registers
326 * \param rxSpeed Speed for Rx link
327 * \return None
328 */
329 IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed);
330
331 /** \brief Set the HSCT TX link speed
332 * \param hsct pointer to HSCT registers
333 * \param txSpeed Speed for Tx link
334 * \return None
335 */
336 IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed);
337
338 /** \brief Enable hsct transmit path in master interface
339 * \param hsct pointer to HSCT registers
340 * \return None
341 */
342 IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct);
343
344 /** \brief Enable hsct receive path in master interface
345 * \param hsct pointer to HSCT registers
346 * \return None
347 */
348 IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct);
349
350 /** \brief Disable hsct transmit path in master interface
351 * \param hsct pointer to HSCT registers
352 * \return None
353 */
354 IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct);
355
356 /** \brief Disable hsct receive path in master interface
357 * \param hsct pointer to HSCT registers
358 * \return None
359 */
360 IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct);
361
362 /******************************************************************************/
363 /*-------------------------Global Function Prototypes-------------------------*/
364 /******************************************************************************/
365
366 /** \brief Disables hsct module
367 * \param hsct pointer to HSCT registers
368 * \return None
369 */
370 IFX_EXTERN void IfxHssl_disableHsctModule(Ifx_HSCT *hsct);
371
372 /** \brief Enables hsct module
373 * \param hsct pointer to HSCT registers
374 * \return None
375 */
376 IFX_EXTERN void IfxHssl_enableHsctModule(Ifx_HSCT *hsct);
377
378 /**
379 * \param hsct Resource index of the HSCT
380 * \return HSCT module register address
381 */
382 IFX_EXTERN Ifx_HSCT *IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct);
383
384 /** \brief API to get the resource index of the HSCT specified.
385 * \return Resource index of the HSCT
386 */
387 IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct);
388
389 /** \brief Returns the SRC pointer for HSCT
390 * \param hsct pointer to HSCT registers
391 * \return SRC pointer for HSCT
392 */
393 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct);
394
395 /** \brief resets HSCT kernel
396 * \param hsct pointer to HSCT registers
397 * \return None
398 */
399 IFX_EXTERN void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct);
400
401 /** \} */
402
403 /** \addtogroup IfxLld_Hssl_Std_HsslFunctions
404 * \{ */
405
406 /******************************************************************************/
407 /*-------------------------Inline Function Prototypes-------------------------*/
408 /******************************************************************************/
409
410 /** \brief Clears the HSSl channel error interrupt flag
411 * \param hssl pointer to HSSl registers
412 * \param source HSSL channel error interrupt source
413 * \param channelId HSSL channel number
414 * \return None
415 */
416 IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
417
418 /** \brief Clears the HSSl global error interrupt flag
419 * \param hssl pointer to HSSl registers
420 * \param source HSSL global error interrupt source
421 * \return None
422 */
423 IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
424
425 /** \brief Clears the Initialise Mode Flag status
426 * \param hssl pointer to HSSL registers
427 * \return None
428 */
429 IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl);
430
431 /** \brief Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt
432 * \param hssl pointer to HSSl registers
433 * \param source HSSL channel error interrupt source
434 * \param channelId HSSL channel number
435 * \return None
436 */
437 IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
438
439 /** \brief Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt
440 * \param hssl pointer to HSSl registers
441 * \param source HSSL global error interrupt source
442 * \return None
443 */
444 IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
445
446 /** \brief Enables all error flags
447 * \param hssl pointer to HSSL registers
448 * \return None
449 */
450 IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl);
451
452 /** \brief Enables HSSL COK interrupt of specified channel
453 * \param hssl pointer to HSSl registers
454 * \param channelId HSSL channel number
455 * \param typeOfService Type of Service (Cpu or DMA)
456 * \param priority Priority of the interrupt
457 * \return None
458 */
459 IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
460
461 /** \brief Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt
462 * \param hssl pointer to HSSl registers
463 * \param source HSSL channel error interrupt source
464 * \param channelId HSSL channel number
465 * \return None
466 */
467 IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
468
469 /** \brief Enables HSSL ERR interrupt of specified channel
470 * \param hssl pointer to HSSl registers
471 * \param channelId HSSL channel number
472 * \param typeOfService Type of Service (Cpu or DMA)
473 * \param priority Priority of the interrupt
474 * \return None
475 */
476 IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
477
478 /** \brief Enables HSSL EXI interrupt of specified channel
479 * \param hssl pointer to HSSl registers
480 * \param typeOfService Type of Service (Cpu or DMA)
481 * \param priority Priority of the interrupt
482 * \return None
483 */
484 IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority);
485
486 /** \brief Enables the HSSl global error interrupt flag, which trggers the EXI interrupt
487 * \param hssl pointer to HSSl registers
488 * \param source HSSL global error interrupt source
489 * \return None
490 */
491 IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
492
493 /** \brief Enables HSSL RDI interrupt of specified channel
494 * \param hssl pointer to HSSl registers
495 * \param channelId HSSL channel number
496 * \param typeOfService Type of Service (Cpu or DMA)
497 * \param priority Priority of the interrupt
498 * \return None
499 */
500 IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
501
502 /** \brief Enables HSSL TRG interrupt of specified channel
503 * \param hssl pointer to HSSl registers
504 * \param channelId HSSL channel number
505 * \param typeOfService Type of Service (Cpu or DMA)
506 * \param priority Priority of the interrupt
507 * \return None
508 */
509 IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
510
511 /** \brief Returns the status of all MFLAGS status
512 * \param hssl pointer to HSSL registers
513 * \return MFLAGS status
514 */
515 IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl);
516
517 /** \brief Returns the Current Count value
518 * \param hssl pointer to HSSL registers
519 * \return Current Count value
520 */
521 IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl);
522
523 /** \brief Clears the HSSl channel error interrupt flag
524 * \param hssl pointer to HSSl registers
525 * \param source HSSL channel error interrupt source
526 * \param channelId HSSL channel number
527 * \return Status (TRUE / FALSE)
528 */
529 IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
530
531 /** \brief Clears the HSSl global error interrupt flag
532 * \param hssl pointer to HSSl registers
533 * \param source HSSL global error interrupt source
534 * \return Status (TRUE / FALSE)
535 */
536 IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
537
538 /** \brief Returns the Initialise Mode Flag status
539 * \param hssl pointer to HSSL registers
540 * \return status : TRUE/FALSE
541 */
542 IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl);
543
544 /** \brief Returns the Reload Count value
545 * \param hssl pointer to HSSL registers
546 * \return Current Count value
547 */
548 IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl);
549
550 /** \brief Returns the module's suspend state.
551 * TRUE :if module is suspended.
552 * FALSE:if module is not yet suspended.
553 * \param hssl Pointer to HSSL module registers
554 * \return Suspend status (TRUE / FALSE)
555 */
556 IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl);
557
558 /** \brief Sets the sensitivity of the module to sleep signal
559 * \param hssl pointer to HSSL registers
560 * \param mode mode selection (enable/disable)
561 * \return None
562 */
563 IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode);
564
565 /** \brief Sets the Initialise Mode Flag
566 * \param hssl pointer to HSSL registers
567 * \return None
568 */
569 IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl);
570
571 /** \brief Sets the reload Count
572 * \param hssl pointer to HSSL registers
573 * \param reloadValue Reload Value
574 * \return None
575 */
576 IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue);
577
578 /** \brief Configure the Module to Hard/Soft suspend mode.
579 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
580 * \param hssl Pointer to HSSL module registers
581 * \param mode Module suspend mode
582 * \return None
583 */
584 IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode);
585
586 /** \brief Sets the Timeout Reload Value
587 * \param hssl pointer to HSSL registers
588 * \param channelId HSSL channel number
589 * \param timeoutValue Timeout Value
590 * \return None
591 */
592 IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue);
593
594 /******************************************************************************/
595 /*-------------------------Global Function Prototypes-------------------------*/
596 /******************************************************************************/
597
598 /** \brief DIsables the hssl module
599 * \param hssl pointer to HSSl registers
600 * \return None
601 */
602 IFX_EXTERN void IfxHssl_disableHsslModule(Ifx_HSSL *hssl);
603
604 /** \brief Enables the hssl module
605 * \param hssl pointer to HSSl registers
606 * \return None
607 */
608 IFX_EXTERN void IfxHssl_enableHsslModule(Ifx_HSSL *hssl);
609
610 /**
611 * \param hssl Resource index of the HSSL
612 * \return HSSL module register address
613 */
614 IFX_EXTERN Ifx_HSSL *IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl);
615
616 /** \brief Returns the SRC pointer for HSSL COK of specified channel
617 * \param hssl pointer to HSSl registers
618 * \param channelId HSSL channel number
619 * \return SRC pointer for HSSL COK interrupt of specific channel
620 */
621 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
622
623 /** \brief Returns the SRC pointer for HSSL ERR of specified channel
624 * \param hssl pointer to HSSl registers
625 * \param channelId HSSL channel number
626 * \return SRC pointer for HSSL ERR interrupt of specific channel
627 */
628 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
629
630 /** \brief Returns the SRC pointer for HSSL EXI interrupt
631 * \param hssl pointer to HSSl registers
632 * \return SRC pointer for HSSL EXI interrupt
633 */
634 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl);
635
636 /** \brief API to get the resource index of the HSSL specified.
637 * \return Resource index of the HSSL
638 */
639 IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl);
640
641 /** \brief Returns the SRC pointer for HSSL COK of specified channel
642 * \param hssl pointer to HSSl registers
643 * \param channelId HSSL channel number
644 * \return SRC pointer for HSSL RDI interrupt of specific channel
645 */
646 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
647
648 /** \brief Returns the SRC pointer for HSSL TRG of specified channel
649 * \param hssl pointer to HSSl registers
650 * \param channelId HSSL channel number
651 * \return SRC pointer for HSSL TRG interrupt of specific channel
652 */
653 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
654
655 /** \brief resets the HSSL kernel
656 * \param hssl pointer to HSSL registers
657 * \return None
658 */
659 IFX_EXTERN void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl);
660
661 /** \} */
662
663 /******************************************************************************/
664 /*---------------------Inline Function Implementations------------------------*/
665 /******************************************************************************/
666
667 IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
668 {
669 uint32 value = 1 << source;
670 hsct->IRQCLR.U = value;
671 }
672
673
674 IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
675 {
676 uint32 value = 1 << ((uint32)(channelId + source));
677 hssl->MFLAGSCL.U = value;
678 }
679
680
681 IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
682 {
683 uint32 value = 1 << source;
684 hssl->MFLAGSCL.U = value;
685 }
686
687
688 IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl)
689 {
690 hssl->MFLAGSCL.B.INIC = 0x1U;
691 }
692
693
694 IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
695 {
696 uint32 value = 1 << source;
697 hsct->IRQEN.U &= ~value;
698 }
699
700
701 IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
702 {
703 uint32 value = 1 << ((uint32)(channelId + source));
704 hssl->MFLAGSEN.U &= ~value;
705 }
706
707
708 IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
709 {
710 uint32 value = 1 << source;
711 hssl->MFLAGSEN.U &= ~value;
712 }
713
714
715 IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl)
716 {
717 hssl->MFLAGSEN.U = 0x23E0FFFFU;
718 }
719
720
721 IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
722 {
723 volatile Ifx_SRC_SRCR *src;
724 src = IfxHssl_getHsctSrcPointer(hsct);
725 IfxSrc_init(src, typeOfService, priority);
726 IfxSrc_enable(src);
727 }
728
729
730 IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
731 {
732 uint32 value = 1 << source;
733 hsct->IRQEN.U |= value;
734 }
735
736
737 IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
738 {
739 volatile Ifx_SRC_SRCR *src;
740 src = IfxHssl_getHsslCOKSrcPointer(hssl, channelId);
741 IfxSrc_init(src, typeOfService, priority);
742 IfxSrc_enable(src);
743 }
744
745
746 IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
747 {
748 uint32 value = 1 << ((uint32)(channelId + source));
749 hssl->MFLAGSEN.U |= value;
750 }
751
752
753 IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
754 {
755 volatile Ifx_SRC_SRCR *src;
756 src = IfxHssl_getHsslERRSrcPointer(hssl, channelId);
757 IfxSrc_init(src, typeOfService, priority);
758 IfxSrc_enable(src);
759 }
760
761
762 IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
763 {
764 volatile Ifx_SRC_SRCR *src;
765 src = IfxHssl_getHsslEXISrcPointer(hssl);
766 IfxSrc_init(src, typeOfService, priority);
767 IfxSrc_enable(src);
768 }
769
770
771 IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
772 {
773 uint32 value = 1 << source;
774 hssl->MFLAGSEN.U |= value;
775 }
776
777
778 IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
779 {
780 volatile Ifx_SRC_SRCR *src;
781 src = IfxHssl_getHsslRDISrcPointer(hssl, channelId);
782 IfxSrc_init(src, typeOfService, priority);
783 IfxSrc_enable(src);
784 }
785
786
787 IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
788 {
789 volatile Ifx_SRC_SRCR *src;
790 src = IfxHssl_getHsslTRGSrcPointer(hssl, channelId);
791 IfxSrc_init(src, typeOfService, priority);
792 IfxSrc_enable(src);
793 }
794
795
796 IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl)
797 {
798 return hssl->MFLAGS.U;
799 }
800
801
802 IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl)
803 {
804 return hssl->IS.FC.B.CURCOUNT;
805 }
806
807
808 IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
809 {
810 return (hsct->IRQ.U >> source) & 0x1;
811 }
812
813
814 IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
815 {
816 return (hssl->MFLAGS.U >> ((uint32)(channelId + source))) & 0x1;
817 }
818
819
820 IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
821 {
822 return (hssl->MFLAGS.U >> source) & 0x1;
823 }
824
825
826 IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl)
827 {
828 return hssl->MFLAGS.B.INI != 0;
829 }
830
831
832 IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl)
833 {
834 return hssl->IS.FC.B.RELCOUNT;
835 }
836
837
838 IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl)
839 {
840 Ifx_HSSL_OCS ocs;
841
842 /* read the status */
843 ocs.U = hssl->OCS.U;
844
845 /* return the status */
846 return ocs.B.SUSSTA;
847 }
848
849
850 IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
851 {
852 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
853 IfxScuWdt_clearCpuEndinit(passwd);
854 hsct->CLC.B.EDIS = mode;
855 IfxScuWdt_setCpuEndinit(passwd);
856 }
857
858
859 IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
860 {
861 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
862 IfxScuWdt_clearCpuEndinit(passwd);
863 hssl->CLC.B.EDIS = mode;
864 IfxScuWdt_setCpuEndinit(passwd);
865 }
866
867
868 IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl)
869 {
870 hssl->MFLAGSSET.B.INIS = 0x1U;
871 }
872
873
874 IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue)
875 {
876 hssl->IS.FC.B.RELCOUNT = reloadValue;
877 }
878
879
880 IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
881 {
882 Ifx_HSSL_OCS ocs;
883
884 /* remove protection and configure the suspend mode. */
885 ocs.B.SUS_P = 1;
886 ocs.B.SUS = mode;
887 hssl->OCS.U = ocs.U;
888 }
889
890
891 IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
892 {
893 hssl->I[channelId].ICON.B.TOREL = timeoutValue;
894 }
895
896
897 IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct)
898 {
899 return hsct->USMR.U;
900 }
901
902
903 IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message)
904 {
905 hsct->USMS.U = message;
906 }
907
908
909 IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
910 {
911 hsct->IFCTRL.B.MRXSPEED = rxSpeed;
912 }
913
914
915 IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
916 {
917 hsct->IFCTRL.B.MTXSPEED = txSpeed;
918 }
919
920
921 IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct)
922 {
923 hsct->DISABLE.B.TX_DIS = 0x0U;
924 }
925
926
927 IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct)
928 {
929 hsct->DISABLE.B.RX_DIS = 0x0U;
930 }
931
932
933 IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct)
934 {
935 hsct->DISABLE.B.TX_DIS = 0x1U;
936 }
937
938
939 IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct)
940 {
941 hsct->DISABLE.B.RX_DIS = 0x1U;
942 }
943
944
945 #endif /* IFXHSSL_H */
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:57
IfxHssl_StreamingMode_continuous
streaming mode continuous (with two memory blocks)
Definition: IfxHssl.h:196
IfxHssl_resetHsslKernel
IFX_EXTERN void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
resets the HSSL kernel
Definition: IfxHssl.c:207
IfxHssl_ChannelId_3
Channel 3.
Definition: IfxHssl.h:62
IfxHssl_ControlCommand_highSpeedTransmission
select high speed mode for transfers from the Master to the Slave
Definition: IfxHssl.h:93
IfxHssl_Hssl_EXIInterruptSource
IfxHssl_Hssl_EXIInterruptSource
HSSL global error interrupt source, which triggers the EXI interrupt Definition in Ifx_HSSL...
Definition: IfxHssl.h:225
IfxHssl_MasterModeTxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:178
IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished
Unsolicited message frame send finished.
Definition: IfxHssl.h:124
IfxHssl_setHsctRxLinkSpeed
IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
Set the HSCT RX link speed.
Definition: IfxHssl.h:909
IfxHssl_enableHsctTransmitPath
IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct)
Enable hsct transmit path in master interface.
Definition: IfxHssl.h:921
IfxHssl_clearInitialiseModeFlag
IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl)
Clears the Initialise Mode Flag status.
Definition: IfxHssl.h:688
IfxHssl_enableHsctInterruptFlag
IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag.
Definition: IfxHssl.h:730
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:194
IfxHssl_ControlCommand_mediumSpeedReception
select medium speed mode for transfers from the Slave to the master
Definition: IfxHssl.h:95
IfxHssl_Hsct_InterruptSource_pingAnswerReceived
PING Answer Received.
Definition: IfxHssl.h:127
IfxHssl_Hssl_EXIInterruptSource_crcError
CRC error (triggers EXI interrupt)
Definition: IfxHssl.h:232
IfxHssl_resetHsctKernel
IFX_EXTERN void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
resets HSCT kernel
Definition: IfxHssl.c:188
IfxHssl_ControlCommand_turnOffClockTestMode
turn off clock test mode
Definition: IfxHssl.h:100
IfxHssl_Hsct_InterruptSource
IfxHssl_Hsct_InterruptSource
HSCT interrupt source Definition in Ifx_HSCT.IRQ.
Definition: IfxHssl.h:117
IfxHssl_Hssl_SleepMode_disable
disables sleep mode
Definition: IfxHssl.h:151
IfxHssl_enableHsslERRInterrupt
IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL ERR interrupt of specified channel.
Definition: IfxHssl.h:753
IfxHssl_getHsctInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Returns the HSCT interrupt flag status.
Definition: IfxHssl.h:808
IfxHssl_ControlCommand_lowSpeedTransmission
select low speed mode for transfers from the Master to the Slave
Definition: IfxHssl.h:92
IfxHssl_clearHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag.
Definition: IfxHssl.h:674
IfxHssl_Hsct_InterruptSource_headerError
Header error detected.
Definition: IfxHssl.h:119
IfxHssl_PllReferenceClock_oscillatorInput
oscillator input
Definition: IfxHssl.h:188
IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError
PHY Inconsistency Error 1 (Channel Number Code Error, triggers EXI interrupt)
Definition: IfxHssl.h:229
IfxHssl_sendHsctUnsolicitedStatusMessage
IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message)
Send the unsolicited status message.
Definition: IfxHssl.h:903
IfxHssl_enableHsslModule
IFX_EXTERN void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:63
IfxHssl_Hsct_InterruptSource_txTransferError
TX transfer error occurred on a disabled TX channel.
Definition: IfxHssl.h:128
IfxHssl_Hsct_Config::interfaceMode
IfxHssl_InterfaceMode interfaceMode
interface mode (master IF /slave IF)
Definition: IfxHssl.h:254
IfxHssl_getHsctUnsolicitedStatusMessage
IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct)
Get the last received unsolicited status message.
Definition: IfxHssl.h:897
IfxHssl_getInitialiseModeFlagStatus
IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl)
Returns the Initialise Mode Flag status.
Definition: IfxHssl.h:826
IfxHssl_ControlCommand_highSpeedClockStop
slave interface clock multiplier stop (after fallback from high speed mode)
Definition: IfxHssl.h:91
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:71
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxHssl_SuspendMode_hard
Hard Suspend.
Definition: IfxHssl.h:205
IfxHssl_Hsct::loopBack
boolean loopBack
loopc back selection
Definition: IfxHssl.h:246
IfxHssl_MasterModeRxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:168
IfxHssl_enableAllErrorFlags
IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl)
Enables all error flags.
Definition: IfxHssl.h:715
IfxHssl_disableHsctInterruptFlag
IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Enables HSCT interrupt flag.
Definition: IfxHssl.h:694
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxHssl_getAllMflagsStatus
IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl)
Returns the status of all MFLAGS status.
Definition: IfxHssl.h:796
IfxHssl_enableHsslRDIInterrupt
IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL RDI interrupt of specified channel.
Definition: IfxHssl.h:778
IfxHssl_getHsslIndex
IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
API to get the resource index of the HSSL specified.
Definition: IfxHssl.c:154
IfxHssl_getHsctSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
Returns the SRC pointer for HSCT.
Definition: IfxHssl.c:109
IfxHssl_Hsct_InterruptSource_commandError
HSCT Command error.
Definition: IfxHssl.h:121
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:243
IfxHssl_enableHsctModule
IFX_EXTERN void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:54
IfxHssl_Hssl_ERRInterruptSource_timeoutError
Timeout error (triggers ERR interrupt)
Definition: IfxHssl.h:218
IfxHssl_getHsslTRGSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL TRG of specified channel.
Definition: IfxHssl.c:181
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxHssl_Command
IfxHssl_Command
communication command selection Definition in Ifx_HSSL.I.ICON.B.RWT
Definition: IfxHssl.h:77
IfxHssl_ChannelId_0
Channel 0.
Definition: IfxHssl.h:59
IfxSrc.h
SRC basic functionality.
IfxHssl_Hssl_EXIInterruptSource_busAccessError
SRI/SPB Bus Access Error (triggers EXI interrupt)
Definition: IfxHssl.h:228
IfxHssl_Hsct_InterruptSource_speedModeSwitchError
Speed mode switch error.
Definition: IfxHssl.h:123
IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow
Synchronization FIFO underflow (in TX direction)
Definition: IfxHssl.h:132
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxCpu_Intrinsics.h
IfxHssl_Hsct_SleepMode_disable
disables sleep mode
Definition: IfxHssl.h:142
IfxHssl_enableHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Enables the HSSl global error interrupt flag, which trggers the EXI interrupt.
Definition: IfxHssl.h:771
IfxHssl_getHsctAddress
IFX_EXTERN Ifx_HSCT * IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
Definition: IfxHssl.c:72
IfxHssl_Hssl_ERRInterruptSource
IfxHssl_Hssl_ERRInterruptSource
HSSL channel error interrupt source, which triggers the ERR interrupt Definition in Ifx_HSSL...
Definition: IfxHssl.h:214
IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow
Synchronization FIFO overflow (in RX direction)
Definition: IfxHssl.h:130
IfxHssl_ChannelId_1
Channel 1.
Definition: IfxHssl.h:60
IfxHssl_InterfaceMode_master
master IF mode
Definition: IfxHssl.h:159
IfxHssl_ControlCommand_highSpeedReception
select high speed mode for transfers from the Slave to the master
Definition: IfxHssl.h:96
IfxHssl_InterfaceMode
IfxHssl_InterfaceMode
interface mode (master IF /slave IF) Definition in Ifx_HSCT.INIT.B.IFM
Definition: IfxHssl.h:157
IfxScuWdt.h
SCU basic functionality.
IfxHssl_Hssl_SleepMode
IfxHssl_Hssl_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_HSSL.CLC.B.EDIS.
Definition: IfxHssl.h:148
IfxHssl_isModuleSuspended
IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxHssl.h:838
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxHssl_ControlCommand
IfxHssl_ControlCommand
predefined control command payload values
Definition: IfxHssl.h:87
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxHssl_getHsslAddress
IFX_EXTERN Ifx_HSSL * IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
Definition: IfxHssl.c:116
IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError
NACK error (triggers ERR interrupt)
Definition: IfxHssl.h:216
IfxHssl_clearHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag.
Definition: IfxHssl.h:681
IfxHssl_setInitialiseModeFlag
IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl)
Sets the Initialise Mode Flag.
Definition: IfxHssl.h:868
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxHssl_ControlCommand_lowSpeedReception
select low speed mode for transfers from the Slave to the Master
Definition: IfxHssl.h:94
IfxHssl_Command_writeFrame
command write frame
Definition: IfxHssl.h:81
IfxHssl_enableHsctReceivePath
IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct)
Enable hsct receive path in master interface.
Definition: IfxHssl.h:927
IfxHssl_Hsct_SleepMode
IfxHssl_Hsct_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_HSCT.CLC.B.EDIS.
Definition: IfxHssl.h:139
IfxHssl_setReloadCount
IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue)
Sets the reload Count.
Definition: IfxHssl.h:874
IfxHssl_PllReferenceClock_hsctSystemClockInput
hsct system clock input (HSCT SysClk_i)
Definition: IfxHssl.h:187
IfxHssl_MasterModeRxSpeed
IfxHssl_MasterModeRxSpeed
master mode receive speed Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED
Definition: IfxHssl.h:166
IfxHssl_getReloadCount
IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl)
Returns the Reload Count value.
Definition: IfxHssl.h:832
IfxHssl_InterfaceMode_slave
slave IF mode
Definition: IfxHssl.h:160
IfxHssl_Command_triggerFrame
command trigger frame
Definition: IfxHssl.h:82
IfxHssl_ControlCommand_ping
ping (send by master. Slave sends back a fixed 32-bit payload result.)
Definition: IfxHssl.h:89
IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend
Interface control frame send.
Definition: IfxHssl.h:122
IfxHssl_getHsslEXISrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
Returns the SRC pointer for HSSL EXI interrupt.
Definition: IfxHssl.c:147
IfxHssl_enableHsslEXIInterrupt
IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL EXI interrupt of specified channel.
Definition: IfxHssl.h:762
IfxHssl_getHsslRDISrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:174
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:107
IfxHssl_cfg.h
HSSL on-chip implementation data.
IfxHssl_Hssl_EXIInterruptSource_dataLengthError
PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt)
Definition: IfxHssl.h:231
IfxHssl_MasterModeTxSpeed_highSpeed
high speed
Definition: IfxHssl.h:179
IfxHssl_ControlCommand_turnOnClockTestMode
turn on clock test mode
Definition: IfxHssl.h:99
IfxHssl_DataLength_16bit
16 bit
Definition: IfxHssl.h:110
IfxHssl_SuspendMode
IfxHssl_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxHssl.h:202
IfxHssl_disableHsctModule
IFX_EXTERN void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
Disables hsct module.
Definition: IfxHssl.c:36
IfxHssl_Hssl_SleepMode_enable
enables sleep mode
Definition: IfxHssl.h:150
IfxHssl_Hsct_InterruptSource_pllLockLosterror
Pll lock lost error.
Definition: IfxHssl.h:125
IfxHssl_Hsct_Config::highSpeedMode
boolean highSpeedMode
high speed mode selection
Definition: IfxHssl.h:255
IfxHssl_DataLength_32bit
32 bit
Definition: IfxHssl.h:111
IfxHssl_SuspendMode_soft
Soft Suspend.
Definition: IfxHssl.h:206
IfxHssl_SuspendMode_none
No suspend.
Definition: IfxHssl.h:204
IfxHssl_DataLength_8bit
8 bit
Definition: IfxHssl.h:109
IfxHssl_enableHsctInterrupt
IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSCT interrupt.
Definition: IfxHssl.h:721
IfxHssl_disableHsctTransmitPath
IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct)
Disable hsct transmit path in master interface.
Definition: IfxHssl.h:933
IfxHssl_MasterModeRxSpeed_highSpeed
high speed
Definition: IfxHssl.h:170
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxHssl_getHsctIndex
IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
API to get the resource index of the HSCT specified.
Definition: IfxHssl.c:89
IfxHssl_clearHsctInterruptFlag
IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
Clears the HSCT interrupt flag.
Definition: IfxHssl.h:667
IfxHssl_setHsctSleepMode
IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxHssl.h:850
IfxHssl_setHsslSleepMode
IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxHssl.h:859
IfxHssl_MasterModeTxSpeed
IfxHssl_MasterModeTxSpeed
master mode transmit speed Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED
Definition: IfxHssl.h:176
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:251
IfxHssl_ClockFrequencyRate_10Mhz
SysClk/ RefClk is 10 MHz (Divider 1/2)
Definition: IfxHssl.h:71
IfxHssl_ControlCommand_disableReception
disable Slave interface transmitter
Definition: IfxHssl.h:98
IfxHssl_enableHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.
Definition: IfxHssl.h:746
IfxHssl_Command_readFrame
command read frame
Definition: IfxHssl.h:80
IfxHssl_ChannelId_2
Channel 2.
Definition: IfxHssl.h:61
IfxHssl_getHsslGloabalErrorInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Clears the HSSl global error interrupt flag.
Definition: IfxHssl.h:820
IfxHssl_PllReferenceClock
IfxHssl_PllReferenceClock
PLL reference clock Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN.
Definition: IfxHssl.h:185
IfxHssl_setTimeoutReloadValue
IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
Sets the Timeout Reload Value.
Definition: IfxHssl.h:891
IfxHssl_getHsslCOKSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL COK of specified channel.
Definition: IfxHssl.c:133
IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived
Unsolicited message received.
Definition: IfxHssl.h:126
IfxHssl_Hssl_ERRInterruptSource_unexpectedError
Unexpected error (triggers ERR interrupt)
Definition: IfxHssl.h:219
IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation
Memory Access Violation error (triggers EXI interrupt)
Definition: IfxHssl.h:227
IfxHssl_Hssl_ERRInterruptSource_transactionTagError
Transaction Tag Error (triggers ERR interrupt)
Definition: IfxHssl.h:217
IfxHssl_disableHsctReceivePath
IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct)
Disable hsct receive path in master interface.
Definition: IfxHssl.h:939
IfxHssl_Command_noAction
command no action
Definition: IfxHssl.h:79
IfxHssl_MasterModeRxSpeed_mediumSpeed
medium speed
Definition: IfxHssl.h:169
IfxHssl_StreamingMode_single
streaming mode single (with one memory block)
Definition: IfxHssl.h:197
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxHssl_getHsslERRSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
Returns the SRC pointer for HSSL ERR of specified channel.
Definition: IfxHssl.c:140
IfxHssl_Hsct_SleepMode_enable
enables sleep mode
Definition: IfxHssl.h:141
IfxHssl_setHsctTxLinkSpeed
IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
Set the HSCT TX link speed.
Definition: IfxHssl.h:915
IfxHssl_disableHsslModule
IFX_EXTERN void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
DIsables the hssl module.
Definition: IfxHssl.c:45
IfxHssl_ClockFrequencyRate_20Mhz
SysClk/ RefClk is 20 MHz (Divider 1/1)
Definition: IfxHssl.h:70
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxHssl_disableHsslChannelErrorInterruptFlag
IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt.
Definition: IfxHssl.h:701
IfxHssl_Hsct_InterruptSource_payloadError
Payload error detected.
Definition: IfxHssl.h:120
IfxHssl_disableHsslGlobalErrorInterruptFlag
IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt.
Definition: IfxHssl.h:708
IfxHssl_getCurrentCount
IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl)
Returns the Current Count value.
Definition: IfxHssl.h:802
IfxHssl_ControlCommand_enableReception
enable Slave interface transmitter
Definition: IfxHssl.h:97
IfxHssl_ControlCommand_highSpeedClockStart
slave interface clock multiplier start (in preparation for high speed mode)
Definition: IfxHssl.h:90
IfxHssl_ClockFrequencyRate
IfxHssl_ClockFrequencyRate
SysClk / Reference Clock Frequency rate Definition in Ifx_HSCT.INIT.B.SRCF.
Definition: IfxHssl.h:68
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxHssl_getHsslChannelErrorInterruptFlagStatus
IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
Clears the HSSl channel error interrupt flag.
Definition: IfxHssl.h:814
IfxHssl_enableHsslTRGInterrupt
IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL TRG interrupt of specified channel.
Definition: IfxHssl.h:787
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:63
IfxHssl_Hsct::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl.h:245
IfxHssl_setSuspendMode
IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxHssl.h:880
IfxHssl_enableHsslCOKInterrupt
IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
Enables HSSL COK interrupt of specified channel.
Definition: IfxHssl.h:737
IfxHssl_ControlCommand_turnOnPayloadLoopback
turn on payload loopback
Definition: IfxHssl.h:101


iLLD_TC26B: IfxHssl_Hssl.c Source File

  • Hssl
  • Hssl
IfxHssl_Hssl.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_Hssl.c
3 * \brief HSSL HSSL details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxHssl_Hssl.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
37 {
38 Ifx_HSSL *hsslSFR = hssl->hssl; /* pointer to HSSL registers */
39
40 /* store the errors in the structure */
41 if (hsslSFR->MFLAGS.B.NACK != 0)
42 {
43 hssl->errorFlags.notAcknowledgeError = 1;
44 }
45
46 if (hsslSFR->MFLAGS.B.TTE != 0)
47 {
48 hssl->errorFlags.transactionTagError = 1;
49 }
50
51 if (hsslSFR->MFLAGS.B.TIMEOUT != 0)
52 {
53 hssl->errorFlags.timeoutError = 1;
54 }
55
56 if (hsslSFR->MFLAGS.B.UNEXPECTED != 0)
57 {
58 hssl->errorFlags.unexpectedError = 1;
59 }
60
61 if (hsslSFR->MFLAGS.B.MAV != 0)
62 {
63 hssl->errorFlags.memoryAccessViolation = 1;
64 }
65
66 if (hsslSFR->MFLAGS.B.SRIE != 0)
67 {
68 hssl->errorFlags.busAccessError = 1;
69 }
70
71 if (hsslSFR->MFLAGS.B.PIE1 != 0)
72 {
73 hssl->errorFlags.channelNumberCodeError = 1;
74 }
75
76 if (hsslSFR->MFLAGS.B.PIE2 != 0)
77 {
78 hssl->errorFlags.dataLengthError = 1;
79 }
80
81 if (hsslSFR->MFLAGS.B.CRCE != 0)
82 {
83 hssl->errorFlags.crcError = 1;
84 }
85 }
86
87
88 void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
89 {
90 hssl->errorFlags.notAcknowledgeError = 0;
91 hssl->errorFlags.transactionTagError = 0;
92 hssl->errorFlags.timeoutError = 0;
93 hssl->errorFlags.unexpectedError = 0;
94 hssl->errorFlags.memoryAccessViolation = 0;
95 hssl->errorFlags.busAccessError = 0;
96 hssl->errorFlags.channelNumberCodeError = 0;
97 hssl->errorFlags.dataLengthError = 0;
98 hssl->errorFlags.crcError = 0;
99 }
100
101
102 void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
103 {
104 uint32 i;
105 IFX_UNUSED_PARAMETER(hsct);
106
107 for (i = 0; i < 8000; i++)
108 {
109 __nop();
110 }
111 }
112
113
114 void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
115 {
116 channel->hssl = channelConfig->hssl; /* adding HSSL register pointer to channel handle */
117 channel->hsct = channelConfig->hsct; /* adding HSCT register pointer to channel handle */
118
119 channel->channelId = channelConfig->channelId; /* adding channel id to channel handle */
120 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction; /* default request, no action */
121
122 channel->streamingModeOn = FALSE; /* command mode (used in waitAcknowledge function) */
123 channel->streamingMode = channelConfig->streamingMode; /* adding streaming mode to channel handle */
124 channel->loopBack = channelConfig->loopBack; /* adding loopback selection to channel handle */
125 }
126
127
128 void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
129 {
130 channelConfig->hssl = hssl->hssl;
131 channelConfig->hsct = hsct->hsct;
132
133 channelConfig->channelId = IfxHssl_ChannelId_0; /* default channel 0 */
134 channelConfig->streamingMode = IfxHssl_StreamingMode_single; /* default streaming mode continuous */
135 channelConfig->loopBack = hsct->loopBack;
136 hssl->loopBack = hsct->loopBack; /* copy to hssl handle, used in trasfer apis */
137 }
138
139
140 void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
141 {
142 Ifx_HSCT *hsctSFR = config->hsct; /* pointer to HSCT registers */
143
144 hsct->hsct = hsctSFR; /* adding HSCT register pointer to module handle */
145 hsct->loopBack = config->loopBack; /* adding loopback selection to module handle */
146
147 #ifndef IFXHSSL_HSCT_DISABLE_PINCONFIG
148 /* Pad initialisiation */
149 IfxPort_setPinModeInput(&MODULE_P21, 2, IfxPort_InputMode_noPullDevice); /* RXDN */
150 IfxPort_setPinModeInput(&MODULE_P21, 3, IfxPort_InputMode_noPullDevice); /* RXDP */
151 IfxPort_setPinModeOutput(&MODULE_P21, 4, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general); /* TXDN */
152 IfxPort_setPinModeOutput(&MODULE_P21, 5, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general); /* TXDP */
153
154 /* select the clock direction */
155 if (config->interfaceMode == IfxHssl_InterfaceMode_master)
156 {
157 IfxPort_setPinModeOutput(&MODULE_P20, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_alt5); /* CLKOUT */
158 IfxPort_setPinPadDriver(&MODULE_P20, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
159 }
160 else
161 {
162 IfxPort_setPinModeInput(&MODULE_P20, 0, IfxPort_InputMode_pullDown); /* CLKIN */
163 }
164
165 if (config->loopBack == FALSE)
166 /* LVDS configuration */
167 {
168 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
169 IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
170
171 P21_LPCR1.B_P21.RDIS_CTRL = 1;
172 P21_LPCR1.B_P21.RX_DIS = 0;
173
174 P21_LPCR2.B.TDIS_CTRL = 1;
175 P21_LPCR2.B.TX_DIS = 0;
176 P21_LPCR2.B.TX_PD = 0;
177
178 IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
179 }
180
181 #endif
182
183 /* HSCT initialisation */
184 IfxHssl_enableHsctModule(hsctSFR); /* enabling the HSCT module */
185
186 hsctSFR->IRQCLR.B.TXTECLR = 1; /* due to AI */
187
188 /* slave interface initialisation */
189 if (config->interfaceMode == IfxHssl_InterfaceMode_slave) /* slave mode initialisation */
190 {
191 hsctSFR->INIT.B.IFM = IfxHssl_InterfaceMode_slave; /* slave mode */
192 hsctSFR->INIT.B.SYS_CLK_EN = 0; /* disabling the system clock */
193 hsctSFR->INIT.B.SRCF = IfxHssl_ClockFrequencyRate_20Mhz; /* Reference Clock Frequency rate 20 MHz */
194 hsctSFR->CONFIGPHY.B.OSCCLKEN = IfxHssl_PllReferenceClock_hsctSystemClockInput; /* PLL reference clock is hsct system clock input */
195 hsctSFR->CONFIGPHY.B.PHYRST = 0; /* disable PHY reset */
196 hsctSFR->CONFIGPHY.B.PLLWMF = 16; /* PLL frequency control word multiplication factor */
197 }
198
199 /* master interface initialisation */
200 else /* master mode initialisation */
201 {
202 hsctSFR->INIT.B.IFM = IfxHssl_InterfaceMode_master; /* master mode */
203 hsctSFR->INIT.B.SYS_CLK_EN = 1; /* enabling the system clock */
204 hsctSFR->INIT.B.SRCF = IfxHssl_ClockFrequencyRate_20Mhz; /* Reference Clock Frequency rate 20 MHz */
205 hsctSFR->CONFIGPHY.B.OSCCLKEN = IfxHssl_PllReferenceClock_oscillatorInput; /* PLL reference clock is Oscillator input */
206 hsctSFR->CONFIGPHY.B.PHYRST = 0; /* disable PHY reset */
207 hsctSFR->CONFIGPHY.B.PLLPON = 1; /* PLL power on */
208 hsctSFR->CONFIGPHY.B.PLLWMF = 16; /* PLL frequency control word multiplication factor */
209 hsctSFR->IFCTRL.B.MTXSPEED = IfxHssl_MasterModeTxSpeed_lowSpeed; /* Tx low speed */
210 hsctSFR->IFCTRL.B.MRXSPEED = IfxHssl_MasterModeRxSpeed_lowSpeed; /* Rx low speed */
211
212 /* change from low speed to high speed */
213 if (config->highSpeedMode)
214 {
215 hsctSFR->IFCTRL.B.MTXSPEED = IfxHssl_MasterModeTxSpeed_highSpeed; /* Tx high speed */
216 hsctSFR->IFCTRL.B.MRXSPEED = IfxHssl_MasterModeRxSpeed_highSpeed; /* Rx high speed */
217 }
218
219 while (hsctSFR->STATPHY.B.PLOCK == 0) /* wait until pll is locked */
220 {}
221 }
222
223 hsctSFR->DISABLE.U = 0;
224 }
225
226
227 void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
228 {
229 config->hsct = hsct;
230
231 /* interface mode */
232 config->interfaceMode = IfxHssl_InterfaceMode_master;
233
234 /* high speed mode disabled */
235 config->highSpeedMode = FALSE;
236
237 config->loopBack = FALSE; /* default with out loopback */
238 }
239
240
241 void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
242 {
243 Ifx_HSSL *hsslSFR = config->hssl; /* pointer to HSSL registers */
244
245 hssl->hssl = hsslSFR; /* adding HSSL register pointer to module handle */
246
247 /* HSSL initialisation */
248 IfxHssl_enableHsslModule(hsslSFR); /* enabling the HSSL module */
249 hsslSFR->CFG.B.PREDIV = config->preDivider; /* predivivder */
250 hsslSFR->CFG.B.SCM = 0; /* command mode */
251
252 /* Access windows */
253 hsslSFR->AW[0].AWSTART.U = config->accessWindow0.start; /* start of access window */
254 hsslSFR->AW[0].AWEND.U = config->accessWindow0.end; /* end of access window */
255 hsslSFR->AW[1].AWSTART.U = config->accessWindow1.start; /* start of access window */
256 hsslSFR->AW[1].AWEND.U = config->accessWindow1.end; /* end of access window */
257 hsslSFR->AW[2].AWSTART.U = config->accessWindow2.start; /* start of access window */
258 hsslSFR->AW[2].AWEND.U = config->accessWindow2.end; /* end of access window */
259 hsslSFR->AW[3].AWSTART.U = config->accessWindow3.start; /* start of access window */
260 hsslSFR->AW[3].AWEND.U = config->accessWindow3.end; /* end of access window */
261
262 hsslSFR->AR.U = 0x000000ff; /* allow read/write access for all windows */
263
264 hsslSFR->MFLAGSCL.B.INIC = 1; /* chnage into run mode */
265 hsslSFR->TIDADD.U = (uint32)IFXHSSL_JTAG_ID_ADDRESS; /* Writing JTAG_ID of the device to TIDADD.This'll be used in the response when the other device queries for ID */
266
267 while (hsslSFR->MFLAGS.B.INI) /* wait until the mode changes */
268 {}
269 }
270
271
272 void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
273 {
274 config->hssl = hssl;
275
276 /* Access windows */
277 config->accessWindow0.start = 0x00000000; /* start of access window */
278 config->accessWindow0.end = 0xffffffff; /* end of access window */
279 config->accessWindow1.start = 0x00000000; /* start of access window */
280 config->accessWindow1.end = 0xffffffff; /* end of access window */
281 config->accessWindow2.start = 0x00000000; /* start of access window */
282 config->accessWindow2.end = 0xffffffff; /* end of access window */
283 config->accessWindow3.start = 0x00000000; /* start of access window */
284 config->accessWindow3.end = 0xffffffff; /* end of access window */
285
286 /* predivider */
287 config->preDivider = 256;
288 }
289
290
291 IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
292 {
293 IfxHssl_ChannelId channelId = channel->channelId;
294 Ifx_HSSL_TS_FC tsfcReg;
295
296 if (channelId == IfxHssl_ChannelId_2)
297 {
298 return IfxHssl_Hssl_Status_error;
299 }
300
301 /* target start address to memeroy block 0 on target device (writing into HSSL_TSSA0 of the target) */
302 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.SA[0], slaveTargetAddress, IfxHssl_DataLength_32bit);
303
304 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
305 {
306 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
307 {
308 return IfxHssl_Hssl_Status_error;
309 }
310 }
311
312 /* Precautionary measure on target for any last streaming interruption */
313 /* Read count register on the target */
314 IfxHssl_Hssl_read(channel, (uint32)&channel->hssl->TS.FC, IfxHssl_DataLength_32bit);
315
316 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
317 {
318 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
319 {
320 return IfxHssl_Hssl_Status_error;
321 }
322 }
323
324 tsfcReg.U = IfxHssl_Hssl_getReadData(channel);
325 tsfcReg.B.RELCOUNT = tsfcReg.B.CURCOUNT;
326 /* Set the RELCOUNT equal to CURCOUNT on the target */
327 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.FC, count, IfxHssl_DataLength_16bit);
328
329 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
330 {
331 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
332 {
333 return IfxHssl_Hssl_Status_error;
334 }
335 }
336
337 /* Disable the streaming on the target */
338 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->MFLAGSCL, (1 << IFX_HSSL_MFLAGSCL_TSEC_OFF), IfxHssl_DataLength_32bit);
339
340 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
341 {
342 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
343 {
344 return IfxHssl_Hssl_Status_error;
345 }
346 }
347
348 /* memory count into target reload count register on target device */
349 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.FC, count, IfxHssl_DataLength_16bit);
350
351 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
352 {
353 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
354 {
355 return IfxHssl_Hssl_Status_error;
356 }
357 }
358
359 /* incase of transfers between two different devices (loopback off) */
360 if (!channel->loopBack)
361 {
362 /* Get the target configuration */
363 IfxHssl_Hssl_read(channel, (uint32)&channel->hssl->CFG, IfxHssl_DataLength_32bit);
364
365 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
366 {
367 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
368 {
369 return IfxHssl_Hssl_Status_error;
370 }
371 }
372
373 /* Check if the target streaming is enabled */
374 if ((IfxHssl_Hssl_getReadData(channel) & (0x00070100)) != 0x00070100)
375 {
376 /* enable streaming mode (single) of channel 2 on target device */
377 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->CFG, 0x00070100, IfxHssl_DataLength_32bit);
378
379 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
380 {
381 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
382 {
383 return IfxHssl_Hssl_Status_error;
384 }
385 }
386 }
387
388 /* enable streaming on target device */
389 IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->MFLAGSSET, 0x10000000, IfxHssl_DataLength_32bit);
390
391 while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
392 {
393 if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
394 {
395 return IfxHssl_Hssl_Status_error;
396 }
397 }
398 }
399
400 channel->streamingModeOn = TRUE; /* for waitAcknowledge function */
401 /* preperation was successful */
402 return IfxHssl_Hssl_Status_ok;
403 }
404
405
406 IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
407 {
408 uint32 data = 0; /* not required, data will be read back */
409 return IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_readFrame, address, data, dataLength); /* initiate the read request */
410 }
411
412
413 void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
414 {
415 Ifx_HSCT *hsctSFR = hsct->hsct;
416
417 hsctSFR->IFCTRL.B.IFCVS = command; /* write the command into the register */
418 hsctSFR->IFCTRL.B.SIFCV = 1; /* activate the command */
419
420 IfxHssl_Hssl_delay(hsct); /* wait until the change happens */
421 }
422
423
424 IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
425 {
426 Ifx_HSSL_I *hsslI = (Ifx_HSSL_I *)&channel->hssl->I[channel->channelId];
427
428 if (channel->currentFrameRequest != IfxHssl_Hssl_FrameRequest_noAction)
429 {
430 return IfxHssl_Hssl_Status_busy;
431 }
432
433 hsslI->ICON.B.DATLEN = dataLength; /* 0x2 -> word size */
434 hsslI->ICON.B.TOREL = 0xff; /* max reload value */
435
436 switch (frameRequest)
437 {
438 case IfxHssl_Hssl_FrameRequest_readFrame:
439 hsslI->ICON.B.RWT = IfxHssl_Command_readFrame;
440 hsslI->IRWA.U = address;
441 break;
442 case IfxHssl_Hssl_FrameRequest_writeFrame:
443 hsslI->ICON.B.RWT = IfxHssl_Command_writeFrame;
444 hsslI->IWD.U = data;
445 hsslI->IRWA.U = address;
446 break;
447 case IfxHssl_Hssl_FrameRequest_triggerFrame:
448 hsslI->ICON.B.RWT = IfxHssl_Command_triggerFrame;
449 hsslI->IWD.U = data; /* dummy */
450 hsslI->IRWA.U = address; /* dummy */
451 break;
452 case IfxHssl_Hssl_FrameRequest_readId:
453 /* request an ID frame */
454 hsslI->ICON.B.IDQ = 1;
455 break;
456 default:
457 /* invalid request */
458 return IfxHssl_Hssl_Status_error;
459 }
460
461 channel->currentFrameRequest = frameRequest;
462
463 return IfxHssl_Hssl_Status_ok;
464 }
465
466
467 IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
468 {
469 uint32 requestType = channel->currentFrameRequest;
470 IfxHssl_ChannelId channelId = channel->channelId;
471
472 if ((channelId == IfxHssl_ChannelId_2) && (channel->hssl->CFG.B.SCM == 1))
473 {
474 while (channel->hssl->MFLAGS.B.ISB)
475 {
476 /* transfer in progress */
477 }
478 }
479 else
480 {
481 if (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_writeFrame)
482 {
483 requestType = 1;
484 }
485
486 /* expect a read frame when requestType == IfxHssl_Hssl_FrameRequest_readId */
487 if ((channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_readFrame) || (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_readId))
488 {
489 requestType = 2;
490 }
491
492 if (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_triggerFrame)
493 {
494 requestType = 3;
495 }
496
497 uint32 qFlags = channel->hssl->QFLAGS.U;
498 uint32 mFlags = channel->hssl->MFLAGS.U;
499 uint32 acknwoledgeFlagsMask = ((requestType << (16 + (channel->channelId * 2))) | (1 << channel->channelId));
500 uint32 errorFlagsMask = ((0x03E00000) | (4369 << channel->channelId)); /* all the possible errors */
501
502 if (channel->hssl->I[channelId].ICON.B.BSY == 1)
503 {
504 return IfxHssl_Hssl_Status_busy;
505 }
506
507 if (qFlags & acknwoledgeFlagsMask) /* transfer in progress? */
508 {
509 return IfxHssl_Hssl_Status_busy; /* return busy status in case of no error */
510 }
511
512 if (mFlags & errorFlagsMask) /* check for errors */
513 {
514 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction;
515 return IfxHssl_Hssl_Status_error; /* return error status in case of an error */
516 }
517
518 /* transfer is finished */
519 channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction;
520 }
521
522 return IfxHssl_Hssl_Status_ok;
523 }
524
525
526 IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
527 {
528 return IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, address, data, dataLength);
529 }
530
531
532 IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
533 {
534 Ifx_HSSL *hsslSFR = hssl->hssl;
535 Ifx_HSSL_IS *hsslIS = (Ifx_HSSL_IS *)&hsslSFR->IS;
536 IfxHssl_StreamingMode streamingMode = IfxHssl_StreamingMode_single;
537
538 /* single memory block streaming */
539 hsslIS->SA[0].U = (uint32)data; /* initiator start address to memeroy block 0 */
540
541 hsslIS->FC.B.RELCOUNT = count; /* memory count into initiator reload count register */
542
543 hsslSFR->CFG.B.SCM = 1; /* enable streaming mode of channel 2 on the initiator */
544 hsslSFR->CFG.B.SMT = streamingMode; /* set transmitter streaming mode ( single / continuous ) on the initiator */
545 hsslSFR->CFG.B.SMR = streamingMode; /* set receiver streaming mode ( single / continuous ) on the initiator */
546 /* streaming is supported only on IfxHssl_ChannelId_2 */
547 hsslSFR->I[IfxHssl_ChannelId_2].ICON.B.TOREL = 0xff; /* set the transmitter reload value to 0xff.*/
548
549 /* incase of transfers within the device(loopback on) */
550 if (hssl->loopBack)
551 {
552 hsslSFR->MFLAGSSET.B.TSES = 1; /* enable target */
553 }
554
555 /* initiate the transfer */
556 hsslSFR->MFLAGSSET.B.ISBS = 1;
557
558 /* streaming started */
559 return IfxHssl_Hssl_Status_ok;
560 }
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:57
IfxHssl_Hssl_Channel::channelId
IfxHssl_ChannelId channelId
channel number (id)
Definition: IfxHssl_Hssl.h:500
IfxHssl_Hssl_Config
configuration structure of the HSSL module
Definition: IfxHssl_Hssl.h:520
IfxHssl_Hssl_AccessWindow::start
uint32 start
start of the access
Definition: IfxHssl_Hssl.h:462
IfxHssl_MasterModeTxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:178
IfxHssl_Hssl_initChannel
void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxHssl_Hssl.c:114
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:194
IfxHssl_Hssl_initHsctModuleConfig
void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:227
IfxHssl_Hssl_errorFlags::transactionTagError
uint8 transactionTagError
transaction tag error
Definition: IfxHssl_Hssl.h:473
IfxHssl_Hssl_errorFlags::unexpectedError
uint8 unexpectedError
unexpected type of frame error
Definition: IfxHssl_Hssl.h:475
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxHssl_Hssl_Channel::currentFrameRequest
IfxHssl_Hssl_FrameRequest currentFrameRequest
current frame request
Definition: IfxHssl_Hssl.h:501
IfxHssl_Hssl_initHsctModule
void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module.
Definition: IfxHssl_Hssl.c:140
IfxHssl_PllReferenceClock_oscillatorInput
oscillator input
Definition: IfxHssl.h:188
IfxHssl_Hssl_delay
void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
a simple software delay
Definition: IfxHssl_Hssl.c:102
IfxHssl_enableHsslModule
void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
Enables the hssl module.
Definition: IfxHssl.c:63
IfxHssl_Hsct_Config::interfaceMode
IfxHssl_InterfaceMode interfaceMode
interface mode (master IF /slave IF)
Definition: IfxHssl.h:254
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxHssl_Hsct::loopBack
boolean loopBack
loopc back selection
Definition: IfxHssl.h:246
IfxHssl_MasterModeRxSpeed_lowSpeed
low speed
Definition: IfxHssl.h:168
IfxHssl_Hssl_Config::preDivider
uint16 preDivider
Defines the down-scaled module clock to be used by all channel timeout timers.
Definition: IfxHssl_Hssl.h:527
IfxHssl_Hssl_initChannelConfig
void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values.
Definition: IfxHssl_Hssl.c:128
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:243
IfxHssl_enableHsctModule
void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
Enables hsct module.
Definition: IfxHssl.c:54
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxHssl_ChannelId_0
Channel 0.
Definition: IfxHssl.h:59
IfxHssl_Hssl_FrameRequest_readFrame
read frame rquest
Definition: IfxHssl_Hssl.h:434
IfxHssl_Hssl_errorFlags::busAccessError
uint8 busAccessError
SRI/SPB bus access error.
Definition: IfxHssl_Hssl.h:477
IfxHssl_Hssl_FrameRequest_writeFrame
write frame rquest
Definition: IfxHssl_Hssl.h:435
IfxHssl_Hssl_write
IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address
Definition: IfxHssl_Hssl.c:526
IfxHssl_Hssl_initHsslModule
void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module.
Definition: IfxHssl_Hssl.c:241
IfxHssl_InterfaceMode_master
master IF mode
Definition: IfxHssl.h:159
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxHssl_Hssl_errorFlags::notAcknowledgeError
uint8 notAcknowledgeError
not acknowledge error / tag error
Definition: IfxHssl_Hssl.h:472
IfxHssl_Hssl_FrameRequest_readId
read id request
Definition: IfxHssl_Hssl.h:437
IfxHssl_Hssl_Channel
channel handle
Definition: IfxHssl_Hssl.h:496
IfxHssl_Hssl_errorFlags::channelNumberCodeError
uint8 channelNumberCodeError
PHY inconsistency error 1 (channel number code error)
Definition: IfxHssl_Hssl.h:478
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxHssl_Hssl_FrameRequest_noAction
no action
Definition: IfxHssl_Hssl.h:438
IfxHssl_Hssl_errorFlags::timeoutError
uint8 timeoutError
timeout error
Definition: IfxHssl_Hssl.h:474
IfxPort_OutputIdx_general
Definition: IfxPort.h:102
IfxHssl_Hssl_Config::accessWindow0
IfxHssl_Hssl_AccessWindow accessWindow0
access window of channel 0
Definition: IfxHssl_Hssl.h:523
IfxHssl_Hssl_prepareStream
IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming.
Definition: IfxHssl_Hssl.c:291
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxHssl_Hssl::hssl
Ifx_HSSL * hssl
pointer to HSSL register
Definition: IfxHssl_Hssl.h:489
IfxHssl_Hssl_sendControlCommand
void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave
Definition: IfxHssl_Hssl.c:413
IfxHssl_Command_writeFrame
command write frame
Definition: IfxHssl.h:81
IfxHssl_Hssl_errorFlags::dataLengthError
uint8 dataLengthError
PHY inconsistency error 2 (data length error)
Definition: IfxHssl_Hssl.h:479
IfxHssl_Hssl_Channel::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl_Hssl.h:499
IfxHssl_PllReferenceClock_hsctSystemClockInput
hsct system clock input (HSCT SysClk_i)
Definition: IfxHssl.h:187
IfxHssl_Hssl_Status_ok
status ok
Definition: IfxHssl_Hssl.h:445
IfxHssl_Hssl_ChannelConfig
configuration structure for channel
Definition: IfxHssl_Hssl.h:509
IFXHSSL_JTAG_ID_ADDRESS
#define IFXHSSL_JTAG_ID_ADDRESS
Definition: IfxHssl_cfg.h:53
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:66
IfxHssl_InterfaceMode_slave
slave IF mode
Definition: IfxHssl.h:160
IfxHssl_Hssl_checkErrors
void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure ...
Definition: IfxHssl_Hssl.c:36
IfxHssl_Hssl
HSSL Handle.
Definition: IfxHssl_Hssl.h:487
IfxHssl_Command_triggerFrame
command trigger frame
Definition: IfxHssl.h:82
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:107
IfxHssl_Hssl_writeStream
IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and ...
Definition: IfxHssl_Hssl.c:532
IfxHssl_MasterModeTxSpeed_highSpeed
high speed
Definition: IfxHssl.h:179
IfxHssl_DataLength_16bit
16 bit
Definition: IfxHssl.h:110
IfxHssl_Hssl.h
HSSL HSSL details.
IfxHssl_Hsct_Config::highSpeedMode
boolean highSpeedMode
high speed mode selection
Definition: IfxHssl.h:255
IfxHssl_DataLength_32bit
32 bit
Definition: IfxHssl.h:111
IfxHssl_Hssl_Status_error
status error
Definition: IfxHssl_Hssl.h:447
IfxHssl_Hssl_Config::accessWindow1
IfxHssl_Hssl_AccessWindow accessWindow1
access window of channel 1
Definition: IfxHssl_Hssl.h:524
IfxHssl_MasterModeRxSpeed_highSpeed
high speed
Definition: IfxHssl.h:170
IfxPort_InputMode_pullDown
Definition: IfxPort.h:67
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxHssl_Hssl_read
IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request.
Definition: IfxHssl_Hssl.c:406
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:251
IfxHssl_Hssl_Status_busy
status busy
Definition: IfxHssl_Hssl.h:446
IfxHssl_Hssl_FrameRequest_triggerFrame
trigger frame rquest
Definition: IfxHssl_Hssl.h:436
IfxHssl_Command_readFrame
command read frame
Definition: IfxHssl.h:80
IfxHssl_ChannelId_2
Channel 2.
Definition: IfxHssl.h:61
IfxHssl_Hssl_Channel::loopBack
boolean loopBack
loopback (enable / disable) for streaming transfers within the microcontroller
Definition: IfxHssl_Hssl.h:503
IfxHssl_Hssl_getReadData
IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
reads and returs the data
Definition: IfxHssl_Hssl.h:753
IfxHssl_StreamingMode_single
streaming mode single (with one memory block)
Definition: IfxHssl.h:197
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxHssl_Hssl_initHsslModuleConfig
void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:272
IfxHssl_Hssl_singleFrameRequest
IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id)
Definition: IfxHssl_Hssl.c:424
IfxHssl_Hssl_AccessWindow::end
uint32 end
end of the access
Definition: IfxHssl_Hssl.h:463
TRUE
#define TRUE
Definition: Platform_Types.h:87
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxHssl_ClockFrequencyRate_20Mhz
SysClk/ RefClk is 20 MHz (Divider 1/1)
Definition: IfxHssl.h:70
IfxHssl_Hssl_FrameRequest
IfxHssl_Hssl_FrameRequest
frame request selection
Definition: IfxHssl_Hssl.h:432
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxHssl_Hssl::errorFlags
IfxHssl_Hssl_errorFlags errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:490
IfxHssl_Hssl_waitAcknowledge
IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done
Definition: IfxHssl_Hssl.c:467
IfxHssl_Hssl_Channel::streamingModeOn
boolean streamingModeOn
streaming mode or command mode
Definition: IfxHssl_Hssl.h:504
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxHssl_Hssl_errorFlags::memoryAccessViolation
uint8 memoryAccessViolation
memory access violation
Definition: IfxHssl_Hssl.h:476
IfxHssl_Hssl_errorFlags::crcError
uint8 crcError
CRC error.
Definition: IfxHssl_Hssl.h:480
IfxHssl_Hssl_Status
IfxHssl_Hssl_Status
module status
Definition: IfxHssl_Hssl.h:443
IfxHssl_Hssl_Channel::streamingMode
IfxHssl_StreamingMode streamingMode
streaming mode selection ( single / continuous )
Definition: IfxHssl_Hssl.h:502
IfxHssl_Hssl_clearErrorFlags
void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure
Definition: IfxHssl_Hssl.c:88
IfxHssl_Hsct::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl.h:245
IfxHssl_Hssl_Config::accessWindow2
IfxHssl_Hssl_AccessWindow accessWindow2
access window of channel 2
Definition: IfxHssl_Hssl.h:525
IfxHssl_Hssl_Config::accessWindow3
IfxHssl_Hssl_AccessWindow accessWindow3
access window of channel 3
Definition: IfxHssl_Hssl.h:526


iLLD_TC26B: IfxHssl_Hssl.h Source File

  • Hssl
  • Hssl
IfxHssl_Hssl.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_Hssl.h
3 * \brief HSSL HSSL details
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Hssl_Hssl_Usage How to use the HSSL Interface driver?
26 * \ingroup IfxLld_Hssl
27 *
28 * The HSSL interface driver provides a default HSSL/HSCT configuration for point to point communication at two transfer speeds, 5MBaud (low speed) and 320MBaud (high speed).
29 * It also supports streaming transfers of data a memory block at both low and high speeds.
30 *
31 * In the following sections it will be described, how to integrate the driver into the application framework.
32 *
33 * \section IfxLld_Hssl_Hssl_Preparation Preparation
34 * \subsection IfxLld_Hssl_Hssl_Include Include Files
35 *
36 * Include following header file into your C code:
37 * \code
38 * #include <Hssl/Hssl/IfxHssl_Hssl.h>
39 * \endcode
40 *
41 * \subsection IfxLld_Hssl_Hssl_Variables Variables
42 *
43 * Declare the HSSL handle, HSCT handle and channel array as global variables in your C code:
44 *
45 * \code
46 * // used globally
47 * static IfxHssl_Hssl hssl;
48 * static IfxHssl_Hsct hsct;
49 * IfxHssl_Hssl_Channel hsslChannel[4];
50 * __attribute__ ((aligned(256))) uint32 txData[80]; // needs to be declared globally in case of streaming transfers
51 * \endcode
52 *
53 * \subsection IfxLld_Hssl_Hssl_InitModule Module Initialisation
54 *
55 * The module initialisation can be done as follows:
56 *
57 * \code
58 * // create module config
59 * IfxHssl_Hsct_Config hsctConfig;
60 * IfxHssl_Hssl_initHsctModuleConfig(&hsctConfig, &MODULE_HSCT);
61 *
62 * // select the interface mode (in case of slave)
63 * hsctConfig.interfaceMode = IfxHssl_InterfaceMode_slave;
64 *
65 * // select the high speed mode if required
66 * hsctConfig.highSpeedMode = TRUE;
67 *
68 * // initialize module
69 * // IfxHssl_Hsct hsct; defined globally
70 * IfxHssl_Hssl_initHsctModule(&hsct, &hsctConfig);
71 *
72 * // create module config
73 * IfxHssl_Hssl_Config hsslConfig;
74 * IfxHssl_Hssl_initHsslModuleConfig(&hsslConfig, &MODULE_HSSL);
75 *
76 * // IfxHssl_Hssl hssl; defined globally
77 * IfxHssl_Hssl_initHsslModule(&hssl, &hsslConfig);
78 * \endcode
79 *
80 * If application intends to explicitly configure the pins for HSCT module IFXHSSL_HSCT_DISABLE_PINCONFIG macro should be defined in the application.
81 * The explicit pin assignment should be done prior to IfxHssl_Hssl_initHsctModule().
82 *
83 * \subsection IfxLld_Hssl_Hssl_InitChannel Channel Initialisation
84 *
85 * The Channel initialisation can be done as follows:
86 *
87 * \code
88 * // create HSSL channel config
89 * IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
90 * IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
91 *
92 * // initialize the channels
93 * // IfxHssl_Hssl_Channel hsslChannel[4]; defined globally
94 * for(int i=0; i<4; ++i)
95 * {
96 * hsslChannelConfig.channelId = (IfxHssl_ChannelId)i;
97 * IfxHssl_Hssl_initChannel(&hsslChannel[i], &hsslChannelConfig);
98 * }
99 * \endcode
100 *
101 * \subsection IfxLld_Hssl_Hssl_LinkSpeed Changing HSCT link speed
102 *
103 * The link speed change can be done as follows
104 *
105 * As per the above settings the HSCT master is in High speed reception and transmission.
106 *
107 * The pseudo code for setting the target to High speed is as below
108 *
109 * \code
110 *
111 * // Set the Tx link speed of the master to Low speed
112 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
113 *
114 * // Enable reception at the Slave
115 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_enableReception);
116 *
117 * // Send interface commmand to change Rx to High speed at the target
118 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedReception);
119 *
120 * // Send interface commmand to change Tx to High speed at the target
121 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedTransmission);
122 *
123 * // Set the Tx link speed of the master to High speed
124 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_highSpeed);
125 *
126 * \endcode
127 *
128 * The pseudo code for setitng the target to Low speed from High speed (ie. if hsctConfig.highSpeedMode is set to TRUE).
129 *
130 * \code
131 *
132 * // Set the Tx link speed of master to Low speed
133 * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
134 *
135 * // Send interface command to change Rx to low speed at the target
136 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedReception);
137 *
138 * // Set the Rx link speed of master to Low speed
139 * IfxHssl_setHsctRxLinkSpeed(&hsct, IfxHssl_MasterModeRxSpeed_lowSpeed);
140 *
141 * // Send interface command to change Tx to low speed at the target
142 * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedTransmission);
143 *
144 * \endcode
145 *
146 * The HSSL is ready for use now!
147 *
148 *
149 * \section IfxLld_Hssl_Hssl_DataTransfers Data Transfers
150 * \subsection IfxLld_Hssl_Hssl_SimpleTransfers Simple Transfers
151 *
152 * The HSSL driver provides simple to use data transfer functions,
153 *
154 * It supports direct writing of 8/16/32 bit data from the initiator into a target's register, as well as reading a value from the target
155 *
156 * \code
157 * // write some data to remote location:
158 * IfxHssl_Hssl_write(&hsslChannel[0], 0x70000000, 0x12345678, IfxHssl_DataLength_32bit);
159 *
160 * // wait for the acknowledgement
161 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
162 * {
163 * if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
164 * {
165 * IfxHssl_Hssl_checkErrors(&hssl);
166 * break;
167 * }
168 * }
169 * \endcode
170 *
171 * A simple to use receive function is available as well.
172 *
173 * \code
174 * // read some data from remote location:
175 * IfxHssl_Hssl_read(&hsslChannel[0], 0x70000000, IfxHssl_DataLength_32bit);
176 *
177 * // wait for the acknowledgement
178 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
179 * {
180 * if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
181 * {
182 * IfxHssl_Hssl_checkErrors(&hssl);
183 * break;
184 * }
185 * }
186 *
187 * // read data from the register
188 * uint32 dataL = IfxHssl_Hssl_getReadData(&hsslChannel[0]);
189 * \endcode
190 *
191 * \subsection IfxLld_Hssl_Hssl_StreamingTransfers Streaming Transfers
192 *
193 * HSSL driver also supports streaming transfers of data as a memory block at both low and high speeds.
194 *
195 * Preparing the target for streaming with the desired memory location where the data needs to be transfered
196 *
197 * \code
198 * // choose a channel other than channel2 for register access
199 * // prepare streaming of single memory block
200 * IfxHssl_Hssl_prepareStream(&hsslChannel[0], 0x70000000, 10);
201 * \endcode
202 *
203 * Stream the memory block
204 *
205 * Usage Example:
206 * \code
207 * // __attribute__ ((aligned(256))) uint32 txData[80]; expected to be declared globally
208 *
209 * // for single block streaming transfer
210 * // change the txData address to global address before passing it to the API
211 *
212 * // IfxHssl_Hssl_writeStream(&hssl, (uint32 *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)txData), 10);
213 *
214 * IfxHssl_Hssl_writeStream(&hssl, txData, 10);
215 *
216 * // wait until the streaming is finished
217 * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[2]) != IfxHssl_Hssl_Status_ok )
218 * {}
219 * \endcode
220 *
221 * \subsection IfxLld_Hssl_Hssl_DMAOperatedCommandQueues DMA Operated Command Queues
222 *
223 * It makes sense to do this from outside the driver, by initialising the DMA after HSSL, and send command queues through linked lists
224 * here is an example of how to use DMA operated command queues.
225 *
226 *
227 * Include following header files into your C code:
228 * \code
229 * #include <Hssl/Hssl/IfxHssl_Hssl.h>
230 * #include <Dma/Dma/IfxDma_Dma.h>
231 * #include <Scu/Std/IfxScuWdt.h>
232 * \endcode
233 *
234 * Declare the HSSL handle, HSCT handle, HSSL channel handle and DMA channel handle as global variables in your C code:
235 *
236 * \code
237 * // used globally
238 * static IfxHssl_Hssl hssl;
239 * static IfxHssl_Hsct hsct;
240 * IfxHssl_Hssl_Channel hsslChannel;
241 * // DMA channel handle
242 * IfxDma_Dma_Channel chn;
243 *
244 * // Linked List storage
245 * // IMPORTANT: it has to be aligned to an 64bit address, otherwise DMA can't read it
246 * #define NUM_LINKED_LIST_ITEMS 3
247 * __attribute__ ((aligned(64))) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
248 * // transfer these values to channel 0 : HSSL_IWD0, HSSL_ICON0, HSSL_IRWA0 registers via linked lists
249 * #define NUM_TRANSFERED_WORDS 3
250 * // three write command queues with different data and to different addresses on slave
251 * uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS] = {
252 * {0xC0CAC01A, 0xFF0A0000, 0x70000000},
253 * {0xBA5EBA11, 0xFF0A0000, 0x70000010},
254 * {0xDEADBEEF, 0xFF0A0000, 0x70000020}
255 * };
256 *
257 * // three command queues to the same channel 0
258 * const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
259 * (uint32)&HSSL_I0_IWD,
260 * (uint32)&HSSL_I0_IWD,
261 * (uint32)&HSSL_I0_IWD
262 * };
263 * \endcode
264 *
265 * Initialise the hssl module, see \ref IfxLld_Hssl_Hssl_InitModule
266 *
267 * Initialise the hssl channel
268 *
269 * \code
270 * // create HSSL channel config
271 * IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
272 * IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
273 *
274 * // initialize the channel 0
275 * // IfxHssl_Hssl_Channel hsslChannel; defined globally
276 * hsslChannelConfig.channelId = 0;
277 * IfxHssl_Hssl_initChannel(&hsslChannel, &hsslChannelConfig);
278 * \endcode
279 *
280 * Build a linked list
281 *
282 * \code
283 * // create module config
284 * IfxDma_Dma_Config dmaConfig;
285 * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
286 * // initialize module
287 * IfxDma_Dma dma;
288 * IfxDma_Dma_initModule(&dma, &dmaConfig);
289 * // initial channel configuration
290 * IfxDma_Dma_ChannelConfig cfg;
291 * IfxDma_Dma_initChannelConfig(&cfg, &dma);
292 * // following settings are used by all transactions
293 * cfg.transferCount = NUM_TRANSFERED_WORDS;
294 * cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
295 * cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
296 * cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
297 * // generate linked list items
298 * for(int i=0; i<NUM_LINKED_LIST_ITEMS; ++i) {
299 * cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i]);
300 * cfg.destinationAddress = destinationAddresses[i];
301 * // address to next transaction set
302 * cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&linkedList[(i + 1) % NUM_LINKED_LIST_ITEMS]);
303 * // transfer first transaction set into DMA channel
304 * if( i == 0 ) {
305 * IfxDma_Dma_initChannel(&chn, &cfg);
306 * }
307 * // transfer into linked list storage
308 * IfxDma_Dma_initLinkedListEntry((void *)&linkedList[i], &cfg);
309 * if( i == 0 ) {
310 * // - trigger channel interrupt once the first transaction set has been loaded (again) into DMA channel
311 * linkedList[i].CHCSR.B.SIT = 1;
312 * } else {
313 * // - activate SCH (transaction request) for each entry, expect for the first one (linked list terminated here)
314 * linkedList[i].CHCSR.B.SCH = 1;
315 * }
316 * }
317 * \endcode
318 *
319 * The transfer can be started via software with:
320 *
321 * \code
322 * // clear service request flag
323 * (IfxDma_Dma_getSrcPointer(&chn))->B.CLRR = 1;
324 * // start linked list transaction
325 * IfxDma_Dma_startChannelTransaction(&chn);
326 * // wait for service request which is triggered at the end of linked list transfers
327 * while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );
328 * \endcode
329 *
330 * \subsection IfxLld_Hssl_Hssl_Interrupts Interrupts usage
331 *
332 * Interrupts can be enabled from the application by using the APIs provided in the driver,
333 * there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,\n
334 * APIs to enable the the enterrupts are also available.
335 *
336 * here is an example of how to use the interrupts in HSSL driver.
337 *
338 * Using HSCT interrupts
339 *
340 * After initialising HSCT module \ref IfxLld_Hssl_Hssl_InitModule
341 *
342 * choose what flags needs to be enabled for HSCT interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
343 * and after choosing all the flags needed, enable the HSCT interrupt with desired type of service and priority.
344 *
345 * \code
346 * Ifx_HSCT *hsct = &MODULE_HSCT;
347 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_headerError);
348 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_payloadError);
349 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_commandError);
350 * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_speedModeSwitchError);
351 *
352 * // enable the HSCT interrupt
353 * IfxHssl_enableHsctInterrupt(hsct, IfxSrc_Tos_cpu0, 4);
354 * \endcode
355 *
356 * Using HSSl interrupts
357 *
358 * HSSL global error interrupt (EXI)
359 *
360 * After initilaising HSSL module \ref IfxLld_Hssl_Hssl_InitModule
361 *
362 * choose what flags needs to be enabled for HSSL global error (EXI) interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
363 * and after choosing all the flags needed, enable the HSSL EXI interrupt with desired type of service and priority
364 *
365 * \code
366 * Ifx_HSSL *hssl = &MODULE_HSSL;
367 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_busAccessError);
368 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_dataLengthError);
369 * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_crcError);
370 *
371 *
372 * // enable the HSSL EXI interrupt
373 * IfxHssl_enableHsslEXIInterrupt(hssl, IfxSrc_Tos_cpu0, 6);
374 * \endcode
375 *
376 * HSSL channel specific error interrupt (ERR)
377 *
378 * After initilaising HSSL channel \ref IfxLld_Hssl_Hssl_InitChannel
379 *
380 * choose what flags needs to be enabled for HSSL channel specific error (ERR) interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
381 * and after choosing all the flags needed, enable the HSSL ERR interrupt with desired channel, type of service and priority
382 *
383 * \code
384 * Ifx_HSSL *hssl = &MODULE_HSSL;
385 * IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_transactionTagError);
386 * IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_timeoutError);
387 *
388 * // enable the HSSL ERR interrupt
389 * IfxHssl_enableHsslERRInterrupt(hssl, channelId_0, IfxSrc_Tos_cpu0, 8);
390 * \endcode
391 *
392 * you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts \ref IfxLld_Cpu_Irq_Usage
393 *
394 * some additional APIs to clear, disable interrupt flags and get flag status are also available.
395 *
396 * \defgroup IfxLld_Hssl_Hssl HSSL
397 * \ingroup IfxLld_Hssl
398 * \defgroup IfxLld_Hssl_Hssl_DataStructures Data Structures
399 * \ingroup IfxLld_Hssl_Hssl
400 * \defgroup IfxLld_Hssl_Hssl_Enumerations Enumerations
401 * \ingroup IfxLld_Hssl_Hssl
402 * \defgroup IfxLld_Hssl_Hssl_ModuleFunctions Module Functions
403 * \ingroup IfxLld_Hssl_Hssl
404 * \defgroup IfxLld_Hssl_Hssl_ChannelFunctions Channel Functions
405 * \ingroup IfxLld_Hssl_Hssl
406 * \defgroup IfxLld_Hssl_Hssl_SimpleCom Simple Communication
407 * \ingroup IfxLld_Hssl_Hssl
408 * \defgroup IfxLld_Hssl_Hssl_ErrorHandling Error Handling
409 * \ingroup IfxLld_Hssl_Hssl
410 * \defgroup IfxLld_Hssl_Hssl_StreamingCom Streaming Communication
411 * \ingroup IfxLld_Hssl_Hssl
412 */
413
414 #ifndef IFXHSSL_HSSL_H
415 #define IFXHSSL_HSSL_H 1
416
417 /******************************************************************************/
418 /*----------------------------------Includes----------------------------------*/
419 /******************************************************************************/
420
421 #include "Hssl/Std/IfxHssl.h"
422 #include "Port/Std/IfxPort.h"
423
424 /******************************************************************************/
425 /*--------------------------------Enumerations--------------------------------*/
426 /******************************************************************************/
427
428 /** \addtogroup IfxLld_Hssl_Hssl_Enumerations
429 * \{ */
430 /** \brief frame request selection
431 */
432 typedef enum
433 {
434 IfxHssl_Hssl_FrameRequest_readFrame = 1, /**< \brief read frame rquest */
435 IfxHssl_Hssl_FrameRequest_writeFrame = 2, /**< \brief write frame rquest */
436 IfxHssl_Hssl_FrameRequest_triggerFrame = 3, /**< \brief trigger frame rquest */
437 IfxHssl_Hssl_FrameRequest_readId = 4, /**< \brief read id request */
438 IfxHssl_Hssl_FrameRequest_noAction = 5 /**< \brief no action */
439 } IfxHssl_Hssl_FrameRequest;
440
441 /** \brief module status
442 */
443 typedef enum
444 {
445 IfxHssl_Hssl_Status_ok = 0, /**< \brief status ok */
446 IfxHssl_Hssl_Status_busy = 1, /**< \brief status busy */
447 IfxHssl_Hssl_Status_error = 2 /**< \brief status error */
448 } IfxHssl_Hssl_Status;
449
450 /** \} */
451
452 /******************************************************************************/
453 /*-----------------------------Data Structures--------------------------------*/
454 /******************************************************************************/
455
456 /** \addtogroup IfxLld_Hssl_Hssl_DataStructures
457 * \{ */
458 /** \brief structure for access windows
459 */
460 typedef struct
461 {
462 uint32 start; /**< \brief start of the access */
463 uint32 end; /**< \brief end of the access */
464 } IfxHssl_Hssl_AccessWindow;
465
466 /** \} */
467
468 /** \brief structure for error flags
469 */
470 typedef struct
471 {
472 uint8 notAcknowledgeError : 1; /**< \brief not acknowledge error / tag error */
473 uint8 transactionTagError : 1; /**< \brief transaction tag error */
474 uint8 timeoutError : 1; /**< \brief timeout error */
475 uint8 unexpectedError : 1; /**< \brief unexpected type of frame error */
476 uint8 memoryAccessViolation : 1; /**< \brief memory access violation */
477 uint8 busAccessError : 1; /**< \brief SRI/SPB bus access error */
478 uint8 channelNumberCodeError : 1; /**< \brief PHY inconsistency error 1 (channel number code error) */
479 uint8 dataLengthError : 1; /**< \brief PHY inconsistency error 2 (data length error) */
480 uint8 crcError : 1; /**< \brief CRC error */
481 } IfxHssl_Hssl_errorFlags;
482
483 /** \addtogroup IfxLld_Hssl_Hssl_DataStructures
484 * \{ */
485 /** \brief HSSL Handle
486 */
487 typedef struct
488 {
489 Ifx_HSSL *hssl; /**< \brief pointer to HSSL register */
490 IfxHssl_Hssl_errorFlags errorFlags; /**< \brief structure for error flags */
491 boolean loopBack; /**< \brief loop back (enable / disable) for streaming transfers within the microcontroller */
492 } IfxHssl_Hssl;
493
494 /** \brief channel handle
495 */
496 typedef struct
497 {
498 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
499 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
500 IfxHssl_ChannelId channelId; /**< \brief channel number (id) */
501 IfxHssl_Hssl_FrameRequest currentFrameRequest; /**< \brief current frame request */
502 IfxHssl_StreamingMode streamingMode; /**< \brief streaming mode selection ( single / continuous ) */
503 boolean loopBack; /**< \brief loopback (enable / disable) for streaming transfers within the microcontroller */
504 boolean streamingModeOn; /**< \brief streaming mode or command mode */
505 } IfxHssl_Hssl_Channel;
506
507 /** \brief configuration structure for channel
508 */
509 typedef struct
510 {
511 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
512 Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
513 IfxHssl_ChannelId channelId; /**< \brief channel number (id) */
514 IfxHssl_StreamingMode streamingMode; /**< \brief streaming mode selection ( single / continuous ) */
515 boolean loopBack; /**< \brief loop back (enable / disable) for streaming transfers within the microcontroller */
516 } IfxHssl_Hssl_ChannelConfig;
517
518 /** \brief configuration structure of the HSSL module
519 */
520 typedef struct
521 {
522 Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
523 IfxHssl_Hssl_AccessWindow accessWindow0; /**< \brief access window of channel 0 */
524 IfxHssl_Hssl_AccessWindow accessWindow1; /**< \brief access window of channel 1 */
525 IfxHssl_Hssl_AccessWindow accessWindow2; /**< \brief access window of channel 2 */
526 IfxHssl_Hssl_AccessWindow accessWindow3; /**< \brief access window of channel 3 */
527 uint16 preDivider; /**< \brief Defines the down-scaled module clock to be used by all channel timeout timers */
528 } IfxHssl_Hssl_Config;
529
530 /** \} */
531
532 /** \addtogroup IfxLld_Hssl_Hssl_ModuleFunctions
533 * \{ */
534
535 /******************************************************************************/
536 /*-------------------------Global Function Prototypes-------------------------*/
537 /******************************************************************************/
538
539 /** \brief Initialises the module
540 * \param hsct HSCT Handle
541 * \param config configuration structure of the HSCT module
542 * \return None
543 *
544 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
545 *
546 */
547 IFX_EXTERN void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config);
548
549 /** \brief Fills the config structure with default values
550 * \param config configuration structure of the HSCT module
551 * \param hsct pointer to HSCT register
552 * \return None
553 *
554 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
555 *
556 */
557 IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct);
558
559 /** \brief Initialises the Hssl module
560 * \param hssl HSSL handle
561 * \param config configuration structure of the module
562 * \return None
563 *
564 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
565 *
566 */
567 IFX_EXTERN void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config);
568
569 /** \brief Fills the config structure with default values
570 * \param config configuration structure of the module
571 * \param hssl pointer to HSSL registers
572 * \return None
573 *
574 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
575 *
576 */
577 IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl);
578
579 /** \} */
580
581 /** \addtogroup IfxLld_Hssl_Hssl_ChannelFunctions
582 * \{ */
583
584 /******************************************************************************/
585 /*-------------------------Global Function Prototypes-------------------------*/
586 /******************************************************************************/
587
588 /** \brief Initialises the channel
589 * \param channel channel handle
590 * \param channelConfig configuration structure for channel
591 * \return None
592 *
593 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
594 *
595 */
596 IFX_EXTERN void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig);
597
598 /** \brief Fills the channel config structure with default values
599 * \param channelConfig configuration structure for channel
600 * \param hssl HSSL Handle
601 * \param hsct HSCT Handle
602 * \return None
603 *
604 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
605 *
606 */
607 IFX_EXTERN void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct);
608
609 /** \} */
610
611 /** \addtogroup IfxLld_Hssl_Hssl_SimpleCom
612 * \{ */
613
614 /******************************************************************************/
615 /*-------------------------Inline Function Prototypes-------------------------*/
616 /******************************************************************************/
617
618 /** \brief reads and returs the data
619 * \param channel channel handle
620 * \return data
621 *
622 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
623 *
624 */
625 IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel);
626
627 /******************************************************************************/
628 /*-------------------------Global Function Prototypes-------------------------*/
629 /******************************************************************************/
630
631 /** \brief Initiates read request
632 * \param channel channel handle
633 * \param address address of the location from where the data is to be read
634 * \param dataLength length of the data
635 * \return module status (ok, busy, error)
636 *
637 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
638 *
639 */
640 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength);
641
642 /** \brief sends a predefined command from master to slave
643 * \param hsct HSCT Handle
644 * \param command command value
645 * \return None
646 *
647 * Usage Example:
648 * \code
649 * // enable slave Tx channel (Rx disable to Rx low peed)
650 * IfxHssl_Hssl_sendControlCommand(&channel, IfxHssl_ControlCommand_enableReception);
651 * \endcode
652 *
653 */
654 IFX_EXTERN void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command);
655
656 /** \brief serves the frame request (read, write, trigger frame and read id)
657 * \param channel channel handle
658 * \param frameRequest frame request
659 * \param address address of the location (to be written into / read from)
660 * \param data data to be written
661 * \param dataLength length of the data
662 * \return module status (ok, busy, error)
663 */
664 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength);
665
666 /** \brief waits until the current transaction is done
667 * \param channel channel handle
668 * \return module status (ok, busy, error)
669 *
670 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
671 *
672 */
673 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel);
674
675 /** \brief writes single frame of data into the specified address
676 * \param channel channel handle
677 * \param address address of the location where the data is to be written
678 * \param data data that needs to be written
679 * \param dataLength length of the data (8, 16, 32 bit)
680 * \return module status (ok, busy, error)
681 *
682 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
683 *
684 */
685 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength);
686
687 /** \} */
688
689 /** \addtogroup IfxLld_Hssl_Hssl_ErrorHandling
690 * \{ */
691
692 /******************************************************************************/
693 /*-------------------------Global Function Prototypes-------------------------*/
694 /******************************************************************************/
695
696 /** \brief stores the status of errors in the respective members of the error flags structure
697 * \param hssl HSSL Handle
698 * \return None
699 */
700 IFX_EXTERN void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl);
701
702 /** \brief clears the status of members in the error flags structure
703 * \param hssl HSSL Handle
704 * \return None
705 */
706 IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl);
707
708 /** \brief a simple software delay
709 * \param hsct HSCT Handle
710 * \return None
711 */
712 IFX_EXTERN void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct);
713
714 /** \} */
715
716 /** \addtogroup IfxLld_Hssl_Hssl_StreamingCom
717 * \{ */
718
719 /******************************************************************************/
720 /*-------------------------Global Function Prototypes-------------------------*/
721 /******************************************************************************/
722
723 /** \brief Prepares the target device for streaming
724 * \param channel channel handle
725 * \param slaveTargetAddress address of the location on target device where the data needs to be transfered
726 * \param count Frame count (length of the data in the memory as 256 bytes per frame)
727 * \return module status (ok, busy, error)
728 *
729 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
730 *
731 */
732 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count);
733
734 /** \brief transfers one memory block of data
735 * useful for transfering huge data from one location to another and between devices.
736 * NOTE: This function should be called only for IfxHssl_ChannelId_2
737 * \param hssl HSSL handle
738 * \param data starting address of the location to be read from (memory block 0 / HSSL_ISSA0)
739 * \param count Frame count (length of the data in the memory as 256 bytes per frame)
740 * \return module status (ok, busy, error)
741 *
742 * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
743 *
744 */
745 IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count);
746
747 /** \} */
748
749 /******************************************************************************/
750 /*---------------------Inline Function Implementations------------------------*/
751 /******************************************************************************/
752
753 IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
754 {
755 Ifx_HSSL_I *hsslI = (Ifx_HSSL_I *)&channel->hssl->I[channel->channelId];
756 return hsslI->IRD.U; /* retutn the data read from the data register */
757 }
758
759
760 #endif /* IFXHSSL_HSSL_H */
IfxHssl_ChannelId
IfxHssl_ChannelId
channel selection
Definition: IfxHssl.h:57
IfxHssl_Hssl_Channel::channelId
IfxHssl_ChannelId channelId
channel number (id)
Definition: IfxHssl_Hssl.h:500
IfxHssl_Hssl_Config
configuration structure of the HSSL module
Definition: IfxHssl_Hssl.h:520
IfxHssl_Hssl_AccessWindow::start
uint32 start
start of the access
Definition: IfxHssl_Hssl.h:462
IfxHssl_Hssl_initChannel
IFX_EXTERN void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
Initialises the channel.
Definition: IfxHssl_Hssl.c:114
IfxHssl_StreamingMode
IfxHssl_StreamingMode
streaming mode ( single / continuous ) Definition in Ifx_HSSL.CFG.B.SMT/SMR
Definition: IfxHssl.h:194
IfxHssl_Hssl_initHsctModuleConfig
IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:227
IfxHssl_Hssl_errorFlags::transactionTagError
uint8 transactionTagError
transaction tag error
Definition: IfxHssl_Hssl.h:473
IfxHssl_Hssl_errorFlags::unexpectedError
uint8 unexpectedError
unexpected type of frame error
Definition: IfxHssl_Hssl.h:475
IfxHssl_Hssl_Channel::currentFrameRequest
IfxHssl_Hssl_FrameRequest currentFrameRequest
current frame request
Definition: IfxHssl_Hssl.h:501
IfxHssl_Hssl_initHsctModule
IFX_EXTERN void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
Initialises the module.
Definition: IfxHssl_Hssl.c:140
IfxHssl_Hssl_delay
IFX_EXTERN void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
a simple software delay
Definition: IfxHssl_Hssl.c:102
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxHssl_Hssl_Config::preDivider
uint16 preDivider
Defines the down-scaled module clock to be used by all channel timeout timers.
Definition: IfxHssl_Hssl.h:527
IfxHssl_Hssl_initChannelConfig
IFX_EXTERN void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
Fills the channel config structure with default values.
Definition: IfxHssl_Hssl.c:128
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxHssl_Hsct
HSCT module handle.
Definition: IfxHssl.h:243
IfxHssl_Hssl_FrameRequest_readFrame
read frame rquest
Definition: IfxHssl_Hssl.h:434
IfxHssl_Hssl_errorFlags::busAccessError
uint8 busAccessError
SRI/SPB bus access error.
Definition: IfxHssl_Hssl.h:477
IfxHssl_Hssl_FrameRequest_writeFrame
write frame rquest
Definition: IfxHssl_Hssl.h:435
IfxHssl_Hssl_write
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
writes single frame of data into the specified address
Definition: IfxHssl_Hssl.c:526
IfxHssl_Hssl_initHsslModule
IFX_EXTERN void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
Initialises the Hssl module.
Definition: IfxHssl_Hssl.c:241
IfxHssl_Hssl_errorFlags::notAcknowledgeError
uint8 notAcknowledgeError
not acknowledge error / tag error
Definition: IfxHssl_Hssl.h:472
IfxHssl_Hssl_FrameRequest_readId
read id request
Definition: IfxHssl_Hssl.h:437
IfxHssl_Hssl_Channel
channel handle
Definition: IfxHssl_Hssl.h:496
IfxHssl_Hssl_errorFlags::channelNumberCodeError
uint8 channelNumberCodeError
PHY inconsistency error 1 (channel number code error)
Definition: IfxHssl_Hssl.h:478
IfxHssl_Hssl_FrameRequest_noAction
no action
Definition: IfxHssl_Hssl.h:438
IfxHssl_Hssl_errorFlags::timeoutError
uint8 timeoutError
timeout error
Definition: IfxHssl_Hssl.h:474
IfxHssl_Hssl_Config::accessWindow0
IfxHssl_Hssl_AccessWindow accessWindow0
access window of channel 0
Definition: IfxHssl_Hssl.h:523
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxHssl_Hssl_prepareStream
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
Prepares the target device for streaming.
Definition: IfxHssl_Hssl.c:291
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxHssl_Hssl::hssl
Ifx_HSSL * hssl
pointer to HSSL register
Definition: IfxHssl_Hssl.h:489
IfxHssl_Hssl_sendControlCommand
IFX_EXTERN void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
sends a predefined command from master to slave
Definition: IfxHssl_Hssl.c:413
IfxHssl_Hssl_errorFlags::dataLengthError
uint8 dataLengthError
PHY inconsistency error 2 (data length error)
Definition: IfxHssl_Hssl.h:479
IfxHssl_Hssl_Channel::hsct
Ifx_HSCT * hsct
pointer to HSCT registers
Definition: IfxHssl_Hssl.h:499
IfxHssl_Hssl_Status_ok
status ok
Definition: IfxHssl_Hssl.h:445
IfxHssl_Hssl_ChannelConfig
configuration structure for channel
Definition: IfxHssl_Hssl.h:509
IfxHssl_Hssl_checkErrors
IFX_EXTERN void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
stores the status of errors in the respective members of the error flags structure ...
Definition: IfxHssl_Hssl.c:36
IfxHssl_Hssl
HSSL Handle.
Definition: IfxHssl_Hssl.h:487
IfxHssl_Hssl_errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:470
IfxHssl_DataLength
IfxHssl_DataLength
Defines the length of the data in bits of the write and read command. Definition in Ifx_HSSL...
Definition: IfxHssl.h:107
IfxHssl_Hssl_writeStream
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
transfers one memory block of data useful for transfering huge data from one location to another and ...
Definition: IfxHssl_Hssl.c:532
IfxHssl_Hssl_Status_error
status error
Definition: IfxHssl_Hssl.h:447
IfxHssl_Hssl_Config::accessWindow1
IfxHssl_Hssl_AccessWindow accessWindow1
access window of channel 1
Definition: IfxHssl_Hssl.h:524
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxHssl_Hssl_read
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
Initiates read request.
Definition: IfxHssl_Hssl.c:406
IfxHssl_Hsct_Config
Configuration structure of the HSCT module.
Definition: IfxHssl.h:251
IfxHssl_Hssl_Status_busy
status busy
Definition: IfxHssl_Hssl.h:446
IfxHssl_Hssl_FrameRequest_triggerFrame
trigger frame rquest
Definition: IfxHssl_Hssl.h:436
IfxHssl_Hssl::loopBack
boolean loopBack
loop back (enable / disable) for streaming transfers within the microcontroller
Definition: IfxHssl_Hssl.h:491
IfxHssl_Hssl_getReadData
IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
reads and returs the data
Definition: IfxHssl_Hssl.h:753
IfxHssl_Hssl_initHsslModuleConfig
IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
Fills the config structure with default values.
Definition: IfxHssl_Hssl.c:272
IfxHssl_Hssl_singleFrameRequest
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
serves the frame request (read, write, trigger frame and read id)
Definition: IfxHssl_Hssl.c:424
IfxHssl_Hssl_AccessWindow::end
uint32 end
end of the access
Definition: IfxHssl_Hssl.h:463
IfxHssl_Hssl_FrameRequest
IfxHssl_Hssl_FrameRequest
frame request selection
Definition: IfxHssl_Hssl.h:432
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxHssl.h
HSSL basic functionality.
IfxHssl_Hssl::errorFlags
IfxHssl_Hssl_errorFlags errorFlags
structure for error flags
Definition: IfxHssl_Hssl.h:490
IfxHssl_Hssl_waitAcknowledge
IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
waits until the current transaction is done
Definition: IfxHssl_Hssl.c:467
IfxHssl_Hssl_Channel::streamingModeOn
boolean streamingModeOn
streaming mode or command mode
Definition: IfxHssl_Hssl.h:504
IfxHssl_Hssl_errorFlags::memoryAccessViolation
uint8 memoryAccessViolation
memory access violation
Definition: IfxHssl_Hssl.h:476
IfxHssl_Hssl_errorFlags::crcError
uint8 crcError
CRC error.
Definition: IfxHssl_Hssl.h:480
IfxHssl_Hssl_Status
IfxHssl_Hssl_Status
module status
Definition: IfxHssl_Hssl.h:443
IfxHssl_Hssl_Channel::streamingMode
IfxHssl_StreamingMode streamingMode
streaming mode selection ( single / continuous )
Definition: IfxHssl_Hssl.h:502
IfxHssl_Hssl_clearErrorFlags
IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
clears the status of members in the error flags structure
Definition: IfxHssl_Hssl.c:88
IfxPort.h
PORT basic functionality.
IfxHssl_Hssl_Config::accessWindow2
IfxHssl_Hssl_AccessWindow accessWindow2
access window of channel 2
Definition: IfxHssl_Hssl.h:525
IfxHssl_Hssl_AccessWindow
structure for access windows
Definition: IfxHssl_Hssl.h:460
IfxHssl_Hssl_Config::accessWindow3
IfxHssl_Hssl_AccessWindow accessWindow3
access window of channel 3
Definition: IfxHssl_Hssl.h:526


iLLD_TC26B: IfxHssl_cfg.c Source File

  • _Impl
IfxHssl_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_cfg.c
3 * \brief HSSL on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxHssl_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES] = {
36 {&MODULE_HSCT, (uint32)IfxHssl_hsctIndex_0}
37 };
38
39 IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES] = {
40 {&MODULE_HSSL, (uint32)IfxHssl_hsslIndex_0}
41 };
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:66
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxHssl_cfg.h
HSSL on-chip implementation data.
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:51
IfxHssl_cfg_hsctIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:35
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:74
IfxHssl_cfg_hsslIndexMap
IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.c:39


iLLD_TC26B: IfxHssl_cfg.h Source File

  • _Impl
IfxHssl_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxHssl_cfg.h
3 * \brief HSSL on-chip implementation data
4 * \ingroup IfxLld_Hssl
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Hssl HSSL
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Hssl_Impl Implementation
27 * \ingroup IfxLld_Hssl
28 * \defgroup IfxLld_Hssl_Std Standard Driver
29 * \ingroup IfxLld_Hssl
30 * \defgroup IfxLld_Hssl_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Hssl_Impl
32 */
33
34 #ifndef IFXHSSL_CFG_H
35 #define IFXHSSL_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "IfxHssl_reg.h"
43 #include "IfxHsct_reg.h"
44
45 /******************************************************************************/
46 /*-----------------------------------Macros-----------------------------------*/
47 /******************************************************************************/
48
49 #define IFXHSSL_NUM_CHANNELS 4
50
51 #define IFXHSSL_NUM_MODULES 1
52
53 #define IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)
54
55 /******************************************************************************/
56 /*--------------------------------Enumerations--------------------------------*/
57 /******************************************************************************/
58
59 /** \addtogroup IfxLld_Hssl_Impl_Enumerations
60 * \{ */
61 /** \brief List of the available Hsct resources
62 */
63 typedef enum
64 {
65 IfxHssl_hsctIndex_none = -1, /**< \brief Not Selected */
66 IfxHssl_hsctIndex_0 = 0, /**< \brief HSCT index 0 */
67 } IfxHssl_hsctIndex;
68
69 /** \brief List of the available Hssl resources
70 */
71 typedef enum
72 {
73 IfxHssl_hsslIndex_none = -1, /**< \brief Not Selected */
74 IfxHssl_hsslIndex_0 = 0, /**< \brief HSSL index 0 */
75 } IfxHssl_hsslIndex;
76
77 /** \} */
78
79 /** \addtogroup IfxLld_Hssl_Impl_Enumerations
80 * \{ */
81
82 /******************************************************************************/
83 /*-------------------Global Exported Variables/Constants----------------------*/
84 /******************************************************************************/
85
86 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES];
87
88 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES];
89
90 /** \} */
91
92 #endif /* IFXHSSL_CFG_H */
IfxHssl_hsslIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:73
IfxHssl_hsctIndex_none
Not Selected.
Definition: IfxHssl_cfg.h:65
IfxHssl_hsslIndex
IfxHssl_hsslIndex
List of the available Hssl resources.
Definition: IfxHssl_cfg.h:71
IfxHssl_cfg_hsctIndexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.h:86
IfxHssl_hsctIndex_0
HSCT index 0.
Definition: IfxHssl_cfg.h:66
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxHssl_cfg_hsslIndexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES]
Definition: IfxHssl_cfg.h:88
IFXHSSL_NUM_MODULES
#define IFXHSSL_NUM_MODULES
Definition: IfxHssl_cfg.h:51
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxHssl_hsslIndex_0
HSSL index 0.
Definition: IfxHssl_cfg.h:74
IfxHssl_hsctIndex
IfxHssl_hsctIndex
List of the available Hsct resources.
Definition: IfxHssl_cfg.h:63


iLLD_TC26B: IfxI2c.c Source File

  • I2c
  • Std
IfxI2c.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c.c
3 * \brief I2C basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxI2c.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
36 {
37 // enter config Mode
38 IfxI2c_stop(i2c);
39
40 i2c->ADDRCFG.U = 0;
41 i2c->ADDRCFG.B.MnS = 1; // master mode
42 i2c->ADDRCFG.B.SONA = 0; // don't release the bus on NACK
43 i2c->ADDRCFG.B.SOPE = 0; // after transfer go into master restart state
44 i2c->ADDRCFG.B.TBAM = 0; // 7 bit address mode
45 i2c->FIFOCFG.U = 0;
46 i2c->FIFOCFG.B.TXFC = 1; // FIFO as flow controller
47 i2c->FIFOCFG.B.RXFC = 1; // FIFO as flow controller
48 i2c->FIFOCFG.B.TXBS = 0; // Burst size 1 word
49 i2c->FIFOCFG.B.RXBS = 0; // Burst size 1 word
50 i2c->FIFOCFG.B.TXFA = 0; // fifo is byte aligned
51 i2c->FIFOCFG.B.RXFA = 0; // fifo is byte aligned
52 }
53
54
55 void IfxI2c_disableModule(Ifx_I2C *i2c)
56 {
57 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
58
59 IfxScuWdt_clearCpuEndinit(pwd);
60
61 i2c->CLC.B.DISR = 1;
62
63 while (i2c->CLC.B.DISS == 0)
64 {}
65
66 IfxScuWdt_setCpuEndinit(pwd);
67 }
68
69
70 void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
71 {
72 volatile Ifx_SRC_SRCR *src;
73 src = IfxI2c_getBurstDataTransferSrcPointer(i2c);
74 IfxSrc_init(src, typeOfService, priority);
75 IfxSrc_enable(src);
76 }
77
78
79 void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
80 {
81 volatile Ifx_SRC_SRCR *src;
82 src = IfxI2c_getErrorSrcPointer(i2c);
83 IfxSrc_init(src, typeOfService, priority);
84 IfxSrc_enable(src);
85 }
86
87
88 void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
89 {
90 volatile Ifx_SRC_SRCR *src;
91 src = IfxI2c_getLastBurstDataTransferSrcPointer(i2c);
92 IfxSrc_init(src, typeOfService, priority);
93 IfxSrc_enable(src);
94 }
95
96
97 void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
98 {
99 volatile Ifx_SRC_SRCR *src;
100 src = IfxI2c_getLastSingleDataTransferSrcPointer(i2c);
101 IfxSrc_init(src, typeOfService, priority);
102 IfxSrc_enable(src);
103 }
104
105
106 void IfxI2c_enableModule(Ifx_I2C *i2c)
107 {
108 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
109
110 IfxScuWdt_clearCpuEndinit(pwd);
111 i2c->CLC.B.DISR = 0U;
112
113 while (i2c->CLC.B.DISS == 1U)
114 {}
115
116 i2c->CLC1.B.RMC = 1U;
117
118 while (i2c->CLC1.B.RMC != 1U)
119 {}
120
121 i2c->CLC1.B.DISR = 0U;
122
123 while (i2c->CLC1.B.DISS == 1U)
124 {}
125
126 // disable all interrupts
127 i2c->ERRIRQSM.U = 0x00;
128 i2c->PIRQSM.U = 0x00;
129 i2c->IMSC.U = 0x00;
130
131 IfxScuWdt_setCpuEndinit(pwd);
132 }
133
134
135 void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
136 {
137 volatile Ifx_SRC_SRCR *src;
138 src = IfxI2c_getProtocolSrcPointer(i2c);
139 IfxSrc_init(src, typeOfService, priority);
140 IfxSrc_enable(src);
141 }
142
143
144 void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
145 {
146 volatile Ifx_SRC_SRCR *src;
147 src = IfxI2c_getSingleDataTransferSrcPointer(i2c);
148 IfxSrc_init(src, typeOfService, priority);
149 IfxSrc_enable(src);
150 }
151
152
153 Ifx_I2C *IfxI2c_getAddress(IfxI2c_Index i2c)
154 {
155 Ifx_I2C *module;
156
157 if (i2c < IFXI2C_NUM_MODULES)
158 {
159 module = (Ifx_I2C *)IfxI2c_cfg_indexMap[i2c].module;
160 }
161 else
162 {
163 module = NULL_PTR;
164 }
165
166 return module;
167 }
168
169
170 float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
171 {
172 uint8 inc = i2c->FDIVCFG.B.INC;
173 uint16 dec = i2c->FDIVCFG.B.DEC;
174 uint8 rmc = i2c->CLC1.B.RMC;
175 float32 fKernel = IfxScuCcu_getBaud1Frequency();
176
177 return (fKernel / rmc) / ((2 * dec / inc) + 3);
178 }
179
180
181 IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
182 {
183 uint32 index;
184 IfxI2c_Index result;
185
186 result = IfxI2c_Index_none;
187
188 for (index = 0; index < IFXI2C_NUM_MODULES; index++)
189 {
190 if (IfxI2c_cfg_indexMap[index].module == i2c)
191 {
192 result = (IfxI2c_Index)IfxI2c_cfg_indexMap[index].index;
193 break;
194 }
195 }
196
197 return result;
198 }
199
200
201 void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
202 {
203 IfxPort_OutputMode mode = (IfxPort_OutputMode)IfxPort_Mode_outputOpenDrainGeneral;
204 IfxPort_setPinModeOutput(scl->pin.port, scl->pin.pinIndex, mode, scl->outSelect);
205 IfxPort_setPinModeOutput(sda->pin.port, sda->pin.pinIndex, mode, sda->outSelect);
206 IfxPort_setPinPadDriver(scl->pin.port, scl->pin.pinIndex, padDriver);
207 IfxPort_setPinPadDriver(sda->pin.port, sda->pin.pinIndex, padDriver);
208 IfxI2c_setPinSelection(scl->module, (IfxI2c_PinSelect)scl->inSelect); // note: uses the same PISEL register like SDA
209 }
210
211
212 void IfxI2c_releaseBus(Ifx_I2C *i2c)
213 {
214 // only set the set end of transmisson bit if bus is not free
215 if (i2c->BUSSTAT.B.BS != IfxI2c_BusStatus_idle)
216 {
217 i2c->ENDDCTRL.B.SETEND = 1;
218
219 // wait until bus is free
220 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
221 {}
222
223 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
224 }
225 }
226
227
228 void IfxI2c_resetFifo(Ifx_I2C *i2c)
229 {
230 /* reset FIFO */
231 i2c->FIFOCFG.U = 0x0;
232 i2c->FIFOCFG.B.TXFC = 0U;
233 i2c->FIFOCFG.B.RXFC = 0U;
234 i2c->FIFOCFG.B.TXBS = 0U;
235 i2c->FIFOCFG.B.RXBS = 0U;
236 i2c->FIFOCFG.B.TXFA = 0U;
237 i2c->FIFOCFG.B.RXFA = 0U;
238 }
239
240
241 void IfxI2c_resetModule(Ifx_I2C *i2c)
242 {
243 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
244
245 IfxScuWdt_clearCpuEndinit(passwd);
246 i2c->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
247 i2c->KRST1.B.RST = 1;
248 IfxScuWdt_setCpuEndinit(passwd);
249
250 while (0 == i2c->KRST0.B.RSTSTAT) /* Wait until reset is executed */
251
252 {}
253
254 IfxScuWdt_clearCpuEndinit(passwd);
255 i2c->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
256 IfxScuWdt_setCpuEndinit(passwd);
257 }
258
259
260 void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
261 {
262 float32 fKernel = IfxScuCcu_getBaud1Frequency();
263 uint8 rmc = i2c->CLC1.B.RMC;
264 float32 dec;
265 dec = (((fKernel / rmc) / baudrate) - 3) / 2; // always: Inc = 1
266
267 // dec:inc must be at least 6
268 if (dec < 6)
269 {
270 dec = 6;
271 }
272 else if (dec > (1 << IFX_I2C_FDIVCFG_DEC_LEN) - 1)
273 {
274 dec = (1 << IFX_I2C_FDIVCFG_DEC_LEN) - 1;
275 }
276
277 uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
278
279 IfxScuWdt_clearCpuEndinit(pwd);
280 /* Baudrate configuration */
281 i2c->FDIVCFG.B.INC = 1;
282 i2c->FDIVCFG.B.DEC = (uint16)(dec + 0.5);
283 i2c->TIMCFG.B.SDA_DEL_HD_DAT = 0x3F;
284 i2c->TIMCFG.B.FS_SCL_LOW = 1;
285 i2c->TIMCFG.B.EN_SCL_LOW_LEN = 1;
286 i2c->TIMCFG.B.SCL_LOW_LEN = 0x20;
287
288 IfxScuWdt_setCpuEndinit(pwd);
289 }
IfxI2c_Index_none
Not Selected.
Definition: IfxI2c_cfg.h:60
IfxI2c_enableLastBurstDataTransferInterrupt
void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt
Definition: IfxI2c.c:88
IfxI2c_enableErrorInterrupt
void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt.
Definition: IfxI2c.c:79
IfxI2c_releaseBus
void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:212
IfxI2c_PinSelect
IfxI2c_PinSelect
Definition: IfxI2c.h:71
IfxI2c_Scl_InOut::pin
IfxPort_Pin pin
Port pin.
Definition: IfxI2c_PinMap.h:42
IfxI2c_setBaudrate
void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:260
IfxI2c_enableSingleDataTransferInterrupt
void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt
Definition: IfxI2c.c:144
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxI2c.h
I2C basic functionality.
IfxI2c_getLastBurstDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C last burst data transfer request interrupt.
Definition: IfxI2c.h:782
float32
float float32
Definition: Platform_Types.h:167
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxI2c_getBaudrate
float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:170
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxI2c_Scl_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxI2c_PinMap.h:43
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxI2c_getProtocolSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt.
Definition: IfxI2c.h:832
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:48
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxI2c_resetFifo
void IfxI2c_resetFifo(Ifx_I2C *i2c)
Definition: IfxI2c.c:228
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:58
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxI2c_getAddress
Ifx_I2C * IfxI2c_getAddress(IfxI2c_Index i2c)
Definition: IfxI2c.c:153
IfxI2c_enableBurstDataTransferInterrupt
void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt.
Definition: IfxI2c.c:70
IfxI2c_enableLastSingleDataTransferInterrupt
void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt
Definition: IfxI2c.c:97
IfxI2c_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.c:35
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxI2c_disableModule
void IfxI2c_disableModule(Ifx_I2C *i2c)
Disables the I2c Module.
Definition: IfxI2c.c:55
IfxScuCcu_getBaud1Frequency
float32 IfxScuCcu_getBaud1Frequency(void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.c:195
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:48
IfxI2c_Scl_InOut::module
Ifx_I2C * module
Base address.
Definition: IfxI2c_PinMap.h:41
IfxI2c_configureAsMaster
void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:35
IfxPort_Mode_outputOpenDrainGeneral
Open-drain, General-purpose output.
Definition: IfxPort.h:88
IfxI2c_getSingleDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C single data transfer request interrupt.
Definition: IfxI2c.h:845
IfxI2c_enableProtocolInterrupt
void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt.
Definition: IfxI2c.c:135
IfxI2c_enableModule
void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:106
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:624
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxI2c_initSclSdaPin
void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:201
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:39
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:826
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:906
IfxI2c_getBurstDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C burst data transfer request interrupt.
Definition: IfxI2c.h:732
IfxI2c_getIndex
IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
API to get the resource index of the I2C specified.
Definition: IfxI2c.c:181
IfxI2c_getErrorSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt.
Definition: IfxI2c.h:769
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxI2c_resetModule
void IfxI2c_resetModule(Ifx_I2C *i2c)
resets the I2c kernel
Definition: IfxI2c.c:241
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:93
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxI2c_BusStatus_idle
idle
Definition: IfxI2c.h:54
IfxI2c_setPinSelection
IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin
Definition: IfxI2c.h:876
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxI2c_Scl_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxI2c_PinMap.h:44
IfxI2c_getLastSingleDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C last single data transfer request interrupt.
Definition: IfxI2c.h:801


iLLD_TC26B: IfxI2c.h Source File

  • I2c
  • Std
IfxI2c.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c.h
3 * \brief I2C basic functionality
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_I2c_Std_enums Enumerations
25 * \ingroup IfxLld_I2c_Std
26 * \defgroup IfxLld_I2c_Std_functions Functions
27 * \ingroup IfxLld_I2c_Std
28 * \defgroup IfxLld_I2c_Std_structures Data Structures
29 * \ingroup IfxLld_I2c_Std
30 */
31
32 #ifndef IFXI2C_H
33 #define IFXI2C_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "_Impl/IfxI2c_cfg.h"
40 #include "Scu/Std/IfxScuWdt.h"
41 #include "Scu/Std/IfxScuCcu.h"
42 #include "IfxI2c_bf.h"
43 #include "_PinMap/IfxI2c_PinMap.h"
44 #include "Src/Std/IfxSrc.h"
45
46 /******************************************************************************/
47 /*--------------------------------Enumerations--------------------------------*/
48 /******************************************************************************/
49
50 /** \addtogroup IfxLld_I2c_Std_enums
51 * \{ */
52 typedef enum
53 {
54 IfxI2c_BusStatus_idle = 0, /**< \brief idle */
55 IfxI2c_BusStatus_started = 1, /**< \brief started */
56 IfxI2c_BusStatus_busyMaster = 2, /**< \brief busy Master */
57 IfxI2c_BusStatus_remoteSlave = 3 /**< \brief remote Slave */
58 } IfxI2c_BusStatus;
59
60 /** \brief enable error interrupt request source
61 * Definition in Ifx.I2C.ERRIRQSM.U
62 */
63 typedef enum
64 {
65 IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF, /**< \brief receive fifo underflow service request */
66 IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF, /**< \brief receive fifo overflow service request */
67 IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF, /**< \brief transmit fifo underflow service request */
68 IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF /**< \brief transmit fifo overflow service request */
69 } IfxI2c_ErrorInterruptSource;
70
71 typedef enum
72 {
73 IfxI2c_PinSelect_a = 0,
74 IfxI2c_PinSelect_b = 1,
75 IfxI2c_PinSelect_c = 2,
76 IfxI2c_PinSelect_d = 3,
77 IfxI2c_PinSelect_e = 4,
78 IfxI2c_PinSelect_f = 5,
79 IfxI2c_PinSelect_g = 6,
80 IfxI2c_PinSelect_h = 7
81 } IfxI2c_PinSelect;
82
83 /** \brief enable protocol interrupt source
84 * Definition in Ifx.I2C.PIRQSM.U
85 */
86 typedef enum
87 {
88 IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF, /**< \brief address match service request */
89 IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF, /**< \brief general call service request */
90 IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF, /**< \brief master code service request */
91 IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF, /**< \brief arbitration lost service request */
92 IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF, /**< \brief not acknowledge received service request */
93 IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF, /**< \brief transmission end service request */
94 IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF /**< \brief receive mode service request */
95 } IfxI2c_ProtocolInterruptSource;
96
97 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
98 * Definition in Ifx_I2C.CLC1.B.EDIS
99 */
100 typedef enum
101 {
102 IfxI2c_SleepMode_enable = 0, /**< \brief enables sleep mode */
103 IfxI2c_SleepMode_disable = 1 /**< \brief disables sleep mode */
104 } IfxI2c_SleepMode;
105
106 /** \} */
107
108 /******************************************************************************/
109 /*-----------------------------Data Structures--------------------------------*/
110 /******************************************************************************/
111
112 /** \addtogroup IfxLld_I2c_Std_structures
113 * \{ */
114 /** \brief Pin Structure
115 */
116 typedef struct
117 {
118 IfxI2c_Scl_InOut *scl;
119 IfxI2c_Sda_InOut *sda;
120 IfxPort_PadDriver padDriver;
121 } IfxI2c_Pins;
122
123 /** \} */
124
125 /** \addtogroup IfxLld_I2c_Std_functions
126 * \{ */
127
128 /******************************************************************************/
129 /*-------------------------Inline Function Prototypes-------------------------*/
130 /******************************************************************************/
131
132 /** \brief Returns if the bus is free
133 */
134 IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c);
135
136 /** \brief clears all DTR interrupt sources
137 * \param i2c pointer to i2c registers
138 * \return None
139 */
140 IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c);
141
142 /** \brief clears all Error Interrupt sources
143 * \param i2c pointer to i2c registers
144 * \return None
145 */
146 IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c);
147
148 /** \brief Clears all Protocol Interrupt sources
149 * \param i2c pointer to i2c registers
150 * \return None
151 */
152 IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c);
153
154 /** \brief clears burst request interrupt source
155 * \param i2c pointer to i2c registers
156 * \return None
157 */
158 IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c);
159
160 /** \brief clears the specified source of error interrupt
161 * \param i2c pointer to i2c registers
162 * \param source error interrupt source
163 * \return None
164 */
165 IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
166
167 /** \brief clears last burst request interrupt source
168 * \param i2c pointer to i2c registers
169 * \return None
170 */
171 IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c);
172
173 /** \brief clears last single request interrupt source
174 * \param i2c pointer to i2c registers
175 * \return None
176 */
177 IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c);
178
179 /** \brief clears the specified source of protocol interrupt
180 * \param i2c pointer to i2c registers
181 * \param source protocol interrupt source
182 * \return None
183 */
184 IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
185
186 /** \brief clears single request interrupt source
187 * \param i2c pointer to i2c registers
188 * \return None
189 */
190 IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c);
191
192 /** \brief disables burst request interrupt source
193 * \param i2c pointer to i2c registers
194 * \return None
195 */
196 IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource(Ifx_I2C *i2c);
197
198 /** \brief disables the error interrupt flag
199 * \param i2c pointer to i2c registers
200 * \return None
201 */
202 IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c);
203
204 /** \brief disables the specified source of error interrupt
205 * \param i2c pointer to i2c registers
206 * \param source error interrupt source
207 * \return None
208 */
209 IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
210
211 /** \brief disables last burst request interrupt source
212 * \param i2c pointer to i2c registers
213 * \return None
214 */
215 IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource(Ifx_I2C *i2c);
216
217 /** \brief disables last single request interrupt source
218 * \param i2c pointer to i2c registers
219 * \return None
220 */
221 IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource(Ifx_I2C *i2c);
222
223 /** \brief disables the Protocol interrupt flag
224 * \param i2c pointer to i2c registers
225 * \return None
226 */
227 IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c);
228
229 /** \brief disables the specified source of protocol interrupt
230 * \param i2c pointer to i2c registers
231 * \param source protocol interrupt source
232 * \return None
233 */
234 IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
235
236 /** \brief disables single request interrupt source
237 * \param i2c pointer to i2c registers
238 * \return None
239 */
240 IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource(Ifx_I2C *i2c);
241
242 /** \brief enables burst request interrupt source
243 * \param i2c pointer to i2c registers
244 * \return None
245 */
246 IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource(Ifx_I2C *i2c);
247
248 /** \brief enables the error interrupt flag
249 * \param i2c pointer to i2c registers
250 * \return None
251 */
252 IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
253
254 /** \brief enables the specified source of error interrupt
255 * \param i2c pointer to i2c registers
256 * \param source error interrupt source
257 * \return None
258 */
259 IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
260
261 /** \brief enables last burst request interrupt source
262 * \param i2c pointer to i2c registers
263 * \return None
264 */
265 IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource(Ifx_I2C *i2c);
266
267 /** \brief enables last single request interrupt source
268 * \param i2c pointer to i2c registers
269 * \return None
270 */
271 IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource(Ifx_I2C *i2c);
272
273 /** \brief enables the protocol interrupt flag
274 * \param i2c pointer to I2C registers
275 * \return None
276 */
277 IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
278
279 /** \brief enables the specified source of protocol interrupt
280 * \param i2c pointer to I2C registers
281 * \param source protocol interrupt source
282 * \return None
283 */
284 IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
285
286 /** \brief enables single request interrupt source
287 * \param i2c pointer to i2c registers
288 * \return None
289 */
290 IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource(Ifx_I2C *i2c);
291
292 /** \brief Returns the SRC pointer for I2C burst data transfer request interrupt
293 * \param i2c pointer to i2c registers
294 * \return SRC pointer for I2C burst data transfer Service interrupt
295 */
296 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c);
297
298 /** \brief returns the status of burst request interrupt source status
299 * \param i2c pointer to i2c registers
300 * \return status
301 */
302 IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus(Ifx_I2C *i2c);
303
304 /**
305 * \param i2c pointer to i2c registers
306 * \return BusStatus
307 */
308 IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c);
309
310 /** \brief returns the current status of error interrupt flag
311 * \param i2c pointer to i2c registers
312 * \return status
313 */
314 IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c);
315
316 /** \brief returns the status of the error interrupt source
317 * \param i2c pointer to i2c registers
318 * \param source error interrupt source
319 * \return status
320 */
321 IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
322
323 /** \brief Returns the SRC pointer for I2C Error interrupt
324 * \param i2c pointer to i2c registers
325 * \return SRC pointer for I2C Error Service interrupt
326 */
327 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c);
328
329 /** \brief Returns the SRC pointer for I2C last burst data transfer request interrupt
330 * \param i2c pointer to i2c registers
331 * \return SRC pointer for I2C last burst data transfer Service interrupt
332 */
333 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c);
334
335 /** \brief returns the status of last burst request interrupt source status
336 * \param i2c pointer to i2c registers
337 * \return status
338 */
339 IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus(Ifx_I2C *i2c);
340
341 /** \brief Returns the SRC pointer for I2C last single data transfer request interrupt
342 * \param i2c pointer to i2c registers
343 * \return SRC pointer for I2C last single data transfer Service interrupt
344 */
345 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c);
346
347 /** \brief returns the status of last single request interrupt source status
348 * \param i2c pointer to i2c registers
349 * \return status
350 */
351 IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus(Ifx_I2C *i2c);
352
353 /** \brief returns the current raw status of protocol interrupt
354 * \param i2c pointer to i2c registers
355 * \return status
356 */
357 IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c);
358
359 /** \brief returns the status of specified protocol interrupt source
360 * \param i2c pointer to i2c registers
361 * \param source protocol interrupt source
362 * \return status
363 */
364 IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
365
366 /** \brief Returns the SRC pointer for I2C Protocol interrupt
367 * \param i2c pointer to i2c registers
368 * \return SRC pointer for I2C Protocol Service interrupt
369 */
370 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c);
371
372 /** \brief Returns the SRC pointer for I2C single data transfer request interrupt
373 * \param i2c pointer to i2c registers
374 * \return SRC pointer for I2C single data transfer Service interrupt
375 */
376 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c);
377
378 /** \brief returns the status of single request interrupt source status
379 * \param i2c pointer to i2c registers
380 * \return status
381 */
382 IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus(Ifx_I2C *i2c);
383
384 /** \brief Returns if the Fifo is requesting new data
385 */
386 IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c);
387
388 /**
389 * \param i2c pointer to i2c registers
390 * \return None
391 */
392 IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c);
393
394 /** \brief selects the pin
395 * \param i2c pointer to i2c registers
396 * \param pisel pin to be select
397 * \return None
398 */
399 IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel);
400
401 /** \brief Sets the number of bytes to be received
402 * \param i2c pointer to i2c registers
403 * \param size number of packets
404 * \return None
405 */
406 IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size);
407
408 /**
409 * \param i2c pointer to i2c registers
410 * \param address device address
411 * \return None
412 */
413 IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address);
414
415 /** \brief Sets the sensitivity of the module to sleep signal
416 * \param i2c pointer to i2c registers
417 * \param mode mode selection (enable / disable)
418 * \return None
419 */
420 IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode);
421
422 /** \brief Sets the number of bytes to be tansmitted
423 * \param i2c pointer to i2c registers
424 * \param size number of packets
425 * \return None
426 */
427 IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size);
428
429 /**
430 * \param i2c pointer to i2c registers
431 * \return None
432 */
433 IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c);
434
435 /**
436 * \param i2c pointer to i2c registers
437 * \return None
438 */
439 IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c);
440
441 /** \brief Writes a packet (4 bytes) into the Fifo
442 * \param i2c pointer to i2c registers
443 * \param packet specifies the byte to be transfer
444 * \return None
445 */
446 IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet);
447
448 /******************************************************************************/
449 /*-------------------------Global Function Prototypes-------------------------*/
450 /******************************************************************************/
451
452 /** \brief Configures the Module as Master
453 * \param i2c pointer to i2c registers
454 * \return None
455 */
456 IFX_EXTERN void IfxI2c_configureAsMaster(Ifx_I2C *i2c);
457
458 /** \brief Disables the I2c Module
459 * \param i2c pointer to i2c registers
460 * \return None
461 */
462 IFX_EXTERN void IfxI2c_disableModule(Ifx_I2C *i2c);
463
464 /** \brief Enables the Burst data transfer interrupt
465 * \param i2c pointer to i2c registers
466 * \param typeOfService Type of Service (Cpu or DMA)
467 * \param priority priority of the interrupt
468 * \return None
469 */
470 IFX_EXTERN void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
471
472 /** \brief Enables the Error interrupt
473 * \param i2c pointer to i2c registers
474 * \param typeOfService Type of Service (Cpu or DMA)
475 * \param priority priority of the interrupt
476 * \return None
477 */
478 IFX_EXTERN void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
479
480 /** \brief enables the last burst data transfer interrupt
481 * \param i2c pointer to i2c registers
482 * \param typeOfService Type of Service (Cpu or DMA)
483 * \param priority priority of the interrupt
484 * \return None
485 */
486 IFX_EXTERN void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
487
488 /** \brief enables the last single data transfer interrupt
489 * \param i2c pointer to i2c registers
490 * \param typeOfService Type of Service (Cpu or DMA)
491 * \param priority priority of the interrupt
492 * \return None
493 */
494 IFX_EXTERN void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
495
496 /** \brief Enables the I2c Module
497 * \param i2c pointer to i2c registers
498 * \return None
499 */
500 IFX_EXTERN void IfxI2c_enableModule(Ifx_I2C *i2c);
501
502 /** \brief Enables the protocol interrupt
503 * \param i2c pointer to i2c registers
504 * \param typeOfService Type of Service (Cpu or DMA)
505 * \param priority Priority of the interrupt
506 * \return None
507 */
508 IFX_EXTERN void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority);
509
510 /** \brief enables the single data transfer interrupt
511 * \param i2c pointer to i2c registers
512 * \param typeOfService Type of Service (Cpu or DMA)
513 * \param priority priority of the interrupt
514 * \return None
515 */
516 IFX_EXTERN void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
517
518 /**
519 * \param i2c Resource index of the I2c
520 * \return I2C module register address
521 */
522 IFX_EXTERN Ifx_I2C *IfxI2c_getAddress(IfxI2c_Index i2c);
523
524 /** \brief Returns the real Baudrate
525 * \return Baudrate
526 */
527 IFX_EXTERN float32 IfxI2c_getBaudrate(Ifx_I2C *i2c);
528
529 /** \brief API to get the resource index of the I2C specified.
530 * \param i2c Pointer to the I2C HW module (register memory map)
531 * \return Resource index of the I2C
532 */
533 IFX_EXTERN IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c);
534
535 /**
536 * \return None
537 */
538 IFX_EXTERN void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver);
539
540 /** \brief Releases the bus, i.e puts a stop condition on the bus
541 * \return None
542 */
543 IFX_EXTERN void IfxI2c_releaseBus(Ifx_I2C *i2c);
544
545 /**
546 * \return None
547 */
548 IFX_EXTERN void IfxI2c_resetFifo(Ifx_I2C *i2c);
549
550 /** \brief resets the I2c kernel
551 * \param i2c pointer to i2c registers
552 * \return None
553 */
554 IFX_EXTERN void IfxI2c_resetModule(Ifx_I2C *i2c);
555
556 /** \brief Calculates the desired baudrate
557 * \param i2c pointer to i2c registers
558 * \param baudrate specifies the baud rate
559 * \return None
560 */
561 IFX_EXTERN void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate);
562
563 /** \} */
564
565 /******************************************************************************/
566 /*---------------------Inline Function Implementations------------------------*/
567 /******************************************************************************/
568
569 IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
570 {
571 boolean free = FALSE;
572
573 if (i2c->BUSSTAT.B.BS == IfxI2c_BusStatus_idle)
574 {
575 free = TRUE;
576 }
577
578 return free;
579 }
580
581
582 IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
583 {
584 i2c->ICR.U = (1 << IFX_I2C_ICR_LSREQ_INT_OFF) | (1 << IFX_I2C_ICR_SREQ_INT_OFF) | (1 << IFX_I2C_ICR_LBREQ_INT_OFF) | (1 << IFX_I2C_ICR_BREQ_INT_OFF);
585 }
586
587
588 IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
589 {
590 i2c->ERRIRQSC.U = (1 << IFX_I2C_ERRIRQSC_RXF_UFL_OFF) | (1 << IFX_I2C_ERRIRQSC_RXF_OFL_OFF) | (1 << IFX_I2C_ERRIRQSC_TXF_UFL_OFF) | (1 << IFX_I2C_ERRIRQSC_TXF_OFL_OFF);
591 }
592
593
594 IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
595 {
596 i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSC_AM_OFF) | (1 << IFX_I2C_PIRQSC_GC_OFF) | (1 << IFX_I2C_PIRQSC_MC_OFF) | (1 << IFX_I2C_PIRQSC_AL_OFF) | (1 << IFX_I2C_PIRQSC_NACK_OFF) | (1 << IFX_I2C_PIRQSC_TX_END_OFF) | (1 << IFX_I2C_PIRQSC_RX_OFF);
597 }
598
599
600 IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c)
601 {
602 i2c->ICR.B.BREQ_INT = 1;
603 }
604
605
606 IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
607 {
608 i2c->ERRIRQSC.U = (1 << source);
609 }
610
611
612 IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c)
613 {
614 i2c->ICR.B.LBREQ_INT = 1;
615 }
616
617
618 IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c)
619 {
620 i2c->ICR.B.LSREQ_INT = 1;
621 }
622
623
624 IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
625 {
626 i2c->PIRQSC.U = (1 << source);
627 }
628
629
630 IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c)
631 {
632 i2c->ICR.B.SREQ_INT = 1;
633 }
634
635
636 IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource(Ifx_I2C *i2c)
637 {
638 i2c->IMSC.B.BREQ_INT = 0;
639 }
640
641
642 IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c)
643 {
644 i2c->IMSC.B.I2C_ERR_INT = 0;
645 }
646
647
648 IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
649 {
650 i2c->ERRIRQSM.U &= ~(1 << source);
651 }
652
653
654 IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
655 {
656 i2c->IMSC.B.LBREQ_INT = 0;
657 }
658
659
660 IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
661 {
662 i2c->IMSC.B.LSREQ_INT = 0;
663 }
664
665
666 IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c)
667 {
668 i2c->IMSC.B.I2C_P_INT = 0;
669 }
670
671
672 IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
673 {
674 i2c->PIRQSM.U &= ~(1 << source);
675 }
676
677
678 IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource(Ifx_I2C *i2c)
679 {
680 i2c->IMSC.B.SREQ_INT = 0;
681 }
682
683
684 IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource(Ifx_I2C *i2c)
685 {
686 i2c->IMSC.B.BREQ_INT = 1;
687 }
688
689
690 IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c)
691 {
692 i2c->IMSC.B.I2C_ERR_INT = 1;
693 }
694
695
696 IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
697 {
698 i2c->ERRIRQSM.U |= (1 << source);
699 }
700
701
702 IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
703 {
704 i2c->IMSC.B.LBREQ_INT = 1;
705 }
706
707
708 IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
709 {
710 i2c->IMSC.B.LSREQ_INT = 1;
711 }
712
713
714 IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c)
715 {
716 i2c->IMSC.B.I2C_P_INT = 1;
717 }
718
719
720 IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
721 {
722 i2c->PIRQSM.U |= (1 << source);
723 }
724
725
726 IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource(Ifx_I2C *i2c)
727 {
728 i2c->IMSC.B.SREQ_INT = 1;
729 }
730
731
732 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c)
733 {
734 if (i2c == &MODULE_I2C0)
735 {
736 return &MODULE_SRC.I2C.I2C[0].BREQ;
737 }
738 else
739 {
740 return &MODULE_SRC.I2C.I2C[1].BREQ;
741 }
742 }
743
744
745 IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
746 {
747 return i2c->RIS.B.BREQ_INT;
748 }
749
750
751 IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
752 {
753 return (IfxI2c_BusStatus)i2c->BUSSTAT.B.BS;
754 }
755
756
757 IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c)
758 {
759 return i2c->RIS.B.I2C_ERR_INT;
760 }
761
762
763 IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
764 {
765 return (i2c->ERRIRQSS.U & (1 << source)) ? TRUE : FALSE;
766 }
767
768
769 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
770 {
771 if (i2c == &MODULE_I2C0)
772 {
773 return &MODULE_SRC.I2C.I2C[0].ERR;
774 }
775 else
776 {
777 return &MODULE_SRC.I2C.I2C[1].ERR;
778 }
779 }
780
781
782 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c)
783 {
784 if (i2c == &MODULE_I2C0)
785 {
786 return &MODULE_SRC.I2C.I2C[0].LBREQ;
787 }
788 else
789 {
790 return &MODULE_SRC.I2C.I2C[1].LBREQ;
791 }
792 }
793
794
795 IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
796 {
797 return i2c->RIS.B.LBREQ_INT;
798 }
799
800
801 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c)
802 {
803 if (i2c == &MODULE_I2C0)
804 {
805 return &MODULE_SRC.I2C.I2C[0].LSREQ;
806 }
807 else
808 {
809 return &MODULE_SRC.I2C.I2C[1].LSREQ;
810 }
811 }
812
813
814 IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
815 {
816 return i2c->RIS.B.LSREQ_INT;
817 }
818
819
820 IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c)
821 {
822 return i2c->RIS.B.I2C_P_INT;
823 }
824
825
826 IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
827 {
828 return (i2c->PIRQSS.U & (1 << source)) ? TRUE : FALSE;
829 }
830
831
832 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
833 {
834 if (i2c == &MODULE_I2C0)
835 {
836 return &MODULE_SRC.I2C.I2C[0].P;
837 }
838 else
839 {
840 return &MODULE_SRC.I2C.I2C[1].P;
841 }
842 }
843
844
845 IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c)
846 {
847 if (i2c == &MODULE_I2C0)
848 {
849 return &MODULE_SRC.I2C.I2C[0].SREQ;
850 }
851 else
852 {
853 return &MODULE_SRC.I2C.I2C[1].SREQ;
854 }
855 }
856
857
858 IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
859 {
860 return i2c->RIS.B.SREQ_INT;
861 }
862
863
864 IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c)
865 {
866 return i2c->RIS.U & 0x0F ? TRUE : FALSE;
867 }
868
869
870 IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
871 {
872 i2c->RUNCTRL.U = 1;
873 }
874
875
876 IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
877 {
878 i2c->GPCTL.B.PISEL = pisel;
879 }
880
881
882 IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
883 {
884 i2c->MRPSCTRL.B.MRPS = size;
885 }
886
887
888 IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address)
889 {
890 i2c->ADDRCFG.B.ADR = address;
891 }
892
893
894 IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode)
895 {
896 i2c->CLC1.B.EDIS = mode;
897 }
898
899
900 IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
901 {
902 i2c->TPSCTRL.B.TPS = size;
903 }
904
905
906 IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
907 {
908 i2c->RUNCTRL.U = 0;
909 }
910
911
912 IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c)
913 {
914 while (IfxI2c_getBusStatus(i2c) != IfxI2c_BusStatus_idle)
915 {}
916 }
917
918
919 IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
920 {
921 i2c->TXD.U = packet;
922 }
923
924
925 #endif /* IFXI2C_H */
IfxI2c_getProtocolInterruptFlagStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c)
returns the current raw status of protocol interrupt
Definition: IfxI2c.h:820
IfxI2c_enableLastBurstDataTransferInterrupt
IFX_EXTERN void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last burst data transfer interrupt
Definition: IfxI2c.c:88
IfxI2c_enableErrorInterrupt
IFX_EXTERN void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Error interrupt.
Definition: IfxI2c.c:79
IfxI2c_clearLastSingleRequestInterruptSource
IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c)
clears last single request interrupt source
Definition: IfxI2c.h:618
IfxI2c_Pins::padDriver
IfxPort_PadDriver padDriver
Definition: IfxI2c.h:120
IfxI2c_writeFifo
IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo.
Definition: IfxI2c.h:919
IfxI2c_releaseBus
IFX_EXTERN void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:212
IfxI2c_BusStatus_remoteSlave
remote Slave
Definition: IfxI2c.h:57
IfxI2c_BusStatus
IfxI2c_BusStatus
Definition: IfxI2c.h:52
IfxI2c_BusStatus_busyMaster
busy Master
Definition: IfxI2c.h:56
IfxI2c_setReceivePacketSize
IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received.
Definition: IfxI2c.h:882
IfxI2c_busIsFree
IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
Returns if the bus is free.
Definition: IfxI2c.h:569
IfxI2c_getBusStatus
IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
Definition: IfxI2c.h:751
IfxI2c_disableBurstRequestInterruptSource
IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource(Ifx_I2C *i2c)
disables burst request interrupt source
Definition: IfxI2c.h:636
IfxI2c_PinSelect_h
Definition: IfxI2c.h:80
IfxI2c_PinSelect
IfxI2c_PinSelect
Definition: IfxI2c.h:71
IfxI2c_ErrorInterruptSource_rxFifoUnderflow
receive fifo underflow service request
Definition: IfxI2c.h:65
IfxI2c_setBaudrate
IFX_EXTERN void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:260
IfxI2c_enableSingleDataTransferInterrupt
IFX_EXTERN void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the single data transfer interrupt
Definition: IfxI2c.c:144
IfxI2c_clearBurstRequestInterruptSource
IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c)
clears burst request interrupt source
Definition: IfxI2c.h:600
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxI2c_getLastBurstDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C last burst data transfer request interrupt.
Definition: IfxI2c.h:782
float32
float float32
Definition: Platform_Types.h:167
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxI2c_getBaudrate
IFX_EXTERN float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:170
IfxI2c_SleepMode_enable
enables sleep mode
Definition: IfxI2c.h:102
IfxI2c_setSlaveDeviceAddress
IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address)
Definition: IfxI2c.h:888
IfxI2c_setSleepMode
IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxI2c.h:894
IfxI2c_ProtocolInterruptSource_generalCall
general call service request
Definition: IfxI2c.h:89
IfxSrc.h
SRC basic functionality.
IfxI2c_getProtocolSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Protocol interrupt.
Definition: IfxI2c.h:832
IfxI2c_Pins::scl
IfxI2c_Scl_InOut * scl
Definition: IfxI2c.h:118
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:48
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxI2c_getBurstRequestInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
returns the status of burst request interrupt source status
Definition: IfxI2c.h:745
IfxI2c_resetFifo
IFX_EXTERN void IfxI2c_resetFifo(Ifx_I2C *i2c)
Definition: IfxI2c.c:228
IfxI2c_PinSelect_b
Definition: IfxI2c.h:74
IfxI2c_disableErrorInterruptSource
IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
disables the specified source of error interrupt
Definition: IfxI2c.h:648
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:58
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxI2c_ErrorInterruptSource_txFifoOverflow
transmit fifo overflow service request
Definition: IfxI2c.h:68
IfxI2c_getAddress
IFX_EXTERN Ifx_I2C * IfxI2c_getAddress(IfxI2c_Index i2c)
Definition: IfxI2c.c:153
IfxI2c_enableBurstDataTransferInterrupt
IFX_EXTERN void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the Burst data transfer interrupt.
Definition: IfxI2c.c:70
IfxI2c_enableLastSingleDataTransferInterrupt
IFX_EXTERN void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
enables the last single data transfer interrupt
Definition: IfxI2c.c:97
IfxI2c_enableProtocolInterruptFlag
IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c)
enables the protocol interrupt flag
Definition: IfxI2c.h:714
IfxScuWdt.h
SCU basic functionality.
IfxI2c_getLastSingleRequestInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
returns the status of last single request interrupt source status
Definition: IfxI2c.h:814
IfxI2c_enableBurstRequestInterruptSource
IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource(Ifx_I2C *i2c)
enables burst request interrupt source
Definition: IfxI2c.h:684
IfxI2c_PinSelect_g
Definition: IfxI2c.h:79
IfxI2c_disableErrorInterruptFlag
IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c)
disables the error interrupt flag
Definition: IfxI2c.h:642
IfxI2c_disableLastBurstRequestInterruptSource
IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
disables last burst request interrupt source
Definition: IfxI2c.h:654
IfxI2c_disableModule
IFX_EXTERN void IfxI2c_disableModule(Ifx_I2C *i2c)
Disables the I2c Module.
Definition: IfxI2c.c:55
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxI2c_PinMap.h
I2C I/O map.
IfxI2c_ErrorInterruptSource_txFifoUnderflow
transmit fifo underflow service request
Definition: IfxI2c.h:67
IfxI2c_SleepMode
IfxI2c_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_I2C.CLC1.B.EDIS.
Definition: IfxI2c.h:100
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxI2c_enableSingleRequestInterruptSource
IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource(Ifx_I2C *i2c)
enables single request interrupt source
Definition: IfxI2c.h:726
IfxI2c_configureAsMaster
IFX_EXTERN void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:35
IfxI2c_ProtocolInterruptSource_receiveMode
receive mode service request
Definition: IfxI2c.h:94
IfxI2c_clearErrorInterruptSource
IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
clears the specified source of error interrupt
Definition: IfxI2c.h:606
IfxI2c_isFifoRequest
IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c)
Returns if the Fifo is requesting new data.
Definition: IfxI2c.h:864
IfxI2c_enableErrorInterruptSource
IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
enables the specified source of error interrupt
Definition: IfxI2c.h:696
IfxI2c_ErrorInterruptSource_rxFifoOverflow
receive fifo overflow service request
Definition: IfxI2c.h:66
IfxI2c_getSingleDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C single data transfer request interrupt.
Definition: IfxI2c.h:845
IfxI2c_enableProtocolInterrupt
IFX_EXTERN void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
Enables the protocol interrupt.
Definition: IfxI2c.c:135
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxI2c_enableModule
IFX_EXTERN void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:106
IfxI2c_getErrorInterruptFlagStatus
IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c)
returns the current status of error interrupt flag
Definition: IfxI2c.h:757
IfxI2c_ProtocolInterruptSource_arbitrationLost
arbitration lost service request
Definition: IfxI2c.h:91
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:624
IfxI2c_clearAllProtocolInterruptSources
IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
Clears all Protocol Interrupt sources.
Definition: IfxI2c.h:594
IfxI2c_getLastBurstRequestInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
returns the status of last burst request interrupt source status
Definition: IfxI2c.h:795
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxI2c_ErrorInterruptSource
IfxI2c_ErrorInterruptSource
enable error interrupt request source Definition in Ifx.I2C.ERRIRQSM.U
Definition: IfxI2c.h:63
IfxI2c_initSclSdaPin
IFX_EXTERN void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:201
IfxI2c_enableLastSingleRequestInterruptSource
IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
enables last single request interrupt source
Definition: IfxI2c.h:708
IfxI2c_clearAllDtrInterruptSources
IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
clears all DTR interrupt sources
Definition: IfxI2c.h:582
IfxI2c_disableLastSingleRequestInterruptSource
IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
disables last single request interrupt source
Definition: IfxI2c.h:660
IfxI2c_disableSingleRequestInterruptSource
IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource(Ifx_I2C *i2c)
disables single request interrupt source
Definition: IfxI2c.h:678
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:39
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:826
IfxI2c_disableProtocolInterruptFlag
IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c)
disables the Protocol interrupt flag
Definition: IfxI2c.h:666
IfxI2c_waitBusFree
IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c)
Definition: IfxI2c.h:912
IfxI2c_getSingleRequestInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
returns the status of single request interrupt source status
Definition: IfxI2c.h:858
IfxI2c_SleepMode_disable
disables sleep mode
Definition: IfxI2c.h:103
IfxI2c_enableProtocolInterruptSource
IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
enables the specified source of protocol interrupt
Definition: IfxI2c.h:720
IfxI2c_BusStatus_started
started
Definition: IfxI2c.h:55
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxI2c_PinSelect_f
Definition: IfxI2c.h:78
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:906
IfxI2c_getErrorInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
returns the status of the error interrupt source
Definition: IfxI2c.h:763
IfxI2c_ProtocolInterruptSource
IfxI2c_ProtocolInterruptSource
enable protocol interrupt source Definition in Ifx.I2C.PIRQSM.U
Definition: IfxI2c.h:86
IfxI2c_getBurstDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C burst data transfer request interrupt.
Definition: IfxI2c.h:732
IfxI2c_getIndex
IFX_EXTERN IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
API to get the resource index of the I2C specified.
Definition: IfxI2c.c:181
IfxI2c_getErrorSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C Error interrupt.
Definition: IfxI2c.h:769
IfxScuCcu.h
SCU basic functionality.
IfxI2c_Pins
Pin Structure.
Definition: IfxI2c.h:116
IfxI2c_Pins::sda
IfxI2c_Sda_InOut * sda
Definition: IfxI2c.h:119
IfxI2c_resetModule
IFX_EXTERN void IfxI2c_resetModule(Ifx_I2C *i2c)
resets the I2c kernel
Definition: IfxI2c.c:241
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:93
IfxI2c_run
IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
Definition: IfxI2c.h:870
IfxI2c_ProtocolInterruptSource_addressMatch
address match service request
Definition: IfxI2c.h:88
IfxI2c_PinSelect_a
Definition: IfxI2c.h:73
IfxI2c_enableLastBurstRequestInterruptSource
IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
enables last burst request interrupt source
Definition: IfxI2c.h:702
IfxI2c_clearAllErrorInterruptSources
IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
clears all Error Interrupt sources
Definition: IfxI2c.h:588
IfxI2c_setTransmitPacketSize
IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted.
Definition: IfxI2c.h:900
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived
not acknowledge received service request
Definition: IfxI2c.h:92
IfxI2c_clearLastBurstRequestInterruptSource
IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c)
clears last burst request interrupt source
Definition: IfxI2c.h:612
IfxI2c_enableErrorInterruptFlag
IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c)
enables the error interrupt flag
Definition: IfxI2c.h:690
IfxI2c_clearSingleRequestInterruptSource
IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c)
clears single request interrupt source
Definition: IfxI2c.h:630
IfxI2c_PinSelect_d
Definition: IfxI2c.h:76
IfxI2c_PinSelect_e
Definition: IfxI2c.h:77
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxI2c_BusStatus_idle
idle
Definition: IfxI2c.h:54
IfxI2c_setPinSelection
IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
selects the pin
Definition: IfxI2c.h:876
IfxI2c_ProtocolInterruptSource_masterCode
master code service request
Definition: IfxI2c.h:90
IfxI2c_PinSelect_c
Definition: IfxI2c.h:75
IfxI2c_disableProtocolInterruptSource
IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
disables the specified source of protocol interrupt
Definition: IfxI2c.h:672
IfxI2c_getLastSingleDataTransferSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c)
Returns the SRC pointer for I2C last single data transfer request interrupt.
Definition: IfxI2c.h:801


iLLD_TC26B: IfxI2c_I2c.c Source File

  • I2c
  • I2c
IfxI2c_I2c.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_I2c.c
3 * \brief I2C I2C details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxI2c_I2c.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
36 {
37 config->i2c = i2c;
38 config->baudrate = 400000;
39 config->pins = NULL_PTR;
40 }
41
42
43 void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
44 {
45 i2cDevice->i2c = i2cDeviceConfig->i2c;
46 i2cDevice->deviceAddress = i2cDeviceConfig->deviceAddress;
47 }
48
49
50 void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
51 {
52 i2cDeviceConfig->i2c = i2c;
53 i2cDeviceConfig->deviceAddress = 0xff;
54 }
55
56
57 void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
58 {
59 Ifx_I2C *i2cSFR = config->i2c;
60 i2c->i2c = i2cSFR;
61
62 IfxI2c_enableModule(i2cSFR);
63 IfxI2c_stop(i2cSFR); // enter config Mode
64 IfxI2c_configureAsMaster(i2cSFR);
65 IfxI2c_setBaudrate(i2cSFR, config->baudrate);
66
67 if (config->pins != NULL_PTR)
68 {
69 IfxI2c_initSclSdaPin(config->pins->scl, config->pins->sda, config->pins->padDriver);
70 }
71
72 IfxI2c_run(i2cSFR);
73 i2c->baudrate = IfxI2c_getBaudrate(i2cSFR);
74 i2c->busStatus = IfxI2c_getBusStatus(i2cSFR);
75 i2c->status = IfxI2c_I2c_Status_ok;
76 }
77
78
79 IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
80 {
81 IfxI2c_I2c_Status status = IfxI2c_I2c_Status_ok;
82 Ifx_I2C *i2c = i2cDevice->i2c->i2c;
83 uint32 packet;
84 uint8 slAddr = i2cDevice->deviceAddress;
85
86 union data
87 {
88 uint32 packet;
89 uint8 packetbyte[4];
90 } rxdata;
91
92 rxdata.packet = 0;
93
94 sint32 bytesToReceive = size;
95 uint32 bytes;
96
97 // bus free?
98 if (IfxI2c_busIsFree(i2c) == FALSE)
99 {
100 status = IfxI2c_I2c_Status_busNotFree;
101 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
102 i2cDevice->i2c->status = status;
103 return status;
104 }
105
106 IfxI2c_clearAllProtocolInterruptSources(i2c);
107 IfxI2c_clearAllErrorInterruptSources(i2c);
108
109 // send device address with RnW bit set
110 packet = slAddr | 1; // set read bit
111 IfxI2c_setTransmitPacketSize(i2c, 1); // send slave address packet with RnW = 1
112 IfxI2c_setReceivePacketSize(i2c, size); // set number of bytes to reveive
113 IfxI2c_writeFifo(i2c, packet);
114 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
115 IfxI2c_clearSingleRequestInterruptSource(i2c);
116 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
117 IfxI2c_clearBurstRequestInterruptSource(i2c);
118
119 /* Poll until aribtration lost, nack, or rx mode flag is reset, or the error is gone*/
120 while ((i2c->PIRQSS.U & ((1 << IFX_I2C_PIRQSS_AL_OFF) | (1 << IFX_I2C_PIRQSS_NACK_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF))) || i2c->ERRIRQSS.U)
121 {}
122
123 /* check status*/
124 if (i2c->ERRIRQSS.U)
125 {
126 IfxI2c_clearAllErrorInterruptSources(i2c);
127 status = IfxI2c_I2c_Status_error;
128 }
129 else if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost) == TRUE)
130 {
131 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
132 status = IfxI2c_I2c_Status_al;
133 }
134 else if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived) == TRUE)
135 {
136 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived);
137 status = IfxI2c_I2c_Status_nak;
138 }
139 else if (size > 0) // required to poll for nak
140
141 {
142 if (size > 32) // if fifo is too small => disable global interrupts!
143 { // assumes TC is faster than i2c and therefor a fifo overflow is not possible
144 boolean intEnabled = IfxCpu_disableInterrupts(); // disable global interrupts to prevent fifo overflow
145 uint32 i;
146
147 for (i = 0; i < (uint32)size; i += 4)
148 {
149 if (bytesToReceive >= 4)
150 {
151 bytes = 4;
152 bytesToReceive -= 4;
153 }
154 else
155 {
156 bytes = bytesToReceive;
157 bytesToReceive = 0;
158 }
159
160 uint32 ris;
161
162 while (!(ris = i2c->RIS.U)) // wait for fifo request or error
163
164 {}
165
166 // check request flags
167 if (ris & ((1 << IFX_I2C_RIS_LSREQ_INT_OFF) | (1 << IFX_I2C_RIS_SREQ_INT_OFF) | (1 << IFX_I2C_RIS_LBREQ_INT_OFF) | (1 << IFX_I2C_RIS_BREQ_INT_OFF)))
168 {
169 rxdata.packet = i2c->RXD.U;
170 uint32 k;
171
172 for (k = 0; k < bytes; k++)
173 {
174 data[i + k] = rxdata.packetbyte[k];
175 }
176
177 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
178 IfxI2c_clearSingleRequestInterruptSource(i2c);
179 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
180 IfxI2c_clearBurstRequestInterruptSource(i2c);
181 }
182
183 // check errors
184 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
185 {
186 IfxI2c_clearAllProtocolInterruptSources(i2c);
187 status = IfxI2c_I2c_Status_error;
188 break;
189 }
190
191 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
192 {
193 IfxI2c_clearAllErrorInterruptSources(i2c);
194 status = IfxI2c_I2c_Status_error;
195 break;
196 }
197 }
198
199 IfxCpu_restoreInterrupts(intEnabled); // (re-) enable global interrupts
200
201 // TX_END: transmission finished
202 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
203 {}
204
205 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
206 }
207 else
208 {
209 // wait until all bytes are received
210 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
211 {}
212
213 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
214
215 // check errors
216 uint32 ris;
217 ris = i2c->RIS.U;
218
219 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
220 {
221 IfxI2c_clearAllProtocolInterruptSources(i2c);
222 status = IfxI2c_I2c_Status_error;
223 }
224
225 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
226 {
227 IfxI2c_clearAllErrorInterruptSources(i2c);
228 status = IfxI2c_I2c_Status_error;
229 }
230
231 if (status != IfxI2c_I2c_Status_error)
232 {
233 // read fifo
234 uint32 i;
235
236 for (i = 0; i < (uint32)size; i += 4)
237 {
238 if (bytesToReceive >= 4)
239 {
240 bytes = 4;
241 bytesToReceive -= 4;
242 }
243 else
244 {
245 bytes = bytesToReceive;
246 bytesToReceive = 0;
247 }
248
249 uint32 k;
250 rxdata.packet = i2c->RXD.U;
251 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
252 IfxI2c_clearSingleRequestInterruptSource(i2c);
253 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
254 IfxI2c_clearBurstRequestInterruptSource(i2c);
255
256 for (k = 0; k < bytes; k++)
257 {
258 data[i + k] = rxdata.packetbyte[k];
259 }
260 }
261 }
262 }
263
264 // finally check errors
265 uint32 ris;
266 ris = i2c->RIS.U;
267
268 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
269 {
270 IfxI2c_clearAllProtocolInterruptSources(i2c);
271 status = IfxI2c_I2c_Status_error;
272 }
273
274 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
275 {
276 IfxI2c_clearAllErrorInterruptSources(i2c);
277 status = IfxI2c_I2c_Status_error;
278 }
279 }
280
281 IfxI2c_releaseBus(i2c);
282 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
283 i2cDevice->i2c->status = status;
284 return status;
285 }
286
287
288 IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
289 {
290 IfxI2c_I2c_Status status = IfxI2c_I2c_Status_ok;
291 Ifx_I2C *i2c = i2cDevice->i2c->i2c;
292 uint8 slAddr = i2cDevice->deviceAddress;
293 union data
294 {
295 uint32 packet;
296 uint8 packetbyte[4];
297 } txdata;
298
299 sint32 bytesToSend = size + 1; // +1 slave device address
300 uint32 bytes;
301
302 if (IfxI2c_busIsFree(i2c) == FALSE)
303 {
304 status = IfxI2c_I2c_Status_busNotFree;
305 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
306 i2cDevice->i2c->status = status;
307 return status;
308 }
309
310 // build one packet containing the slave address
311
312 IfxI2c_clearAllProtocolInterruptSources(i2c);
313 IfxI2c_clearAllErrorInterruptSources(i2c);
314
315 // try to seize control, if not return
316 IfxI2c_setTransmitPacketSize(i2c, 1);
317 IfxI2c_writeFifo(i2c, slAddr);
318 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
319 IfxI2c_clearSingleRequestInterruptSource(i2c);
320 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
321 IfxI2c_clearBurstRequestInterruptSource(i2c);
322
323 // wait until packet is sent
324 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
325 {}
326
327 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
328
329 // check status
330 if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost) == TRUE)
331 {
332 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
333 status = IfxI2c_I2c_Status_al;
334 }
335 else if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived) == TRUE)
336 {
337 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived);
338 status = IfxI2c_I2c_Status_nak;
339 }
340 else if (size > 0) // write i2c device
341
342 {
343 uint32 i, j = 0;
344
345 // assumes TC is faster then i2c and therefor a fifo underflow is not possible
346 boolean intEnabled = IfxCpu_disableInterrupts(); // disable global interrupts to prevent FIFO underflow
347 IfxI2c_setTransmitPacketSize(i2c, size + 1);
348
349 for (i = 0; i < (uint32)(size + 1); i += 4)
350 {
351 if (bytesToSend >= 4)
352 {
353 bytes = 4;
354 bytesToSend -= 4;
355 }
356 else
357 {
358 bytes = bytesToSend;
359 bytesToSend = 0;
360 }
361
362 txdata.packet = 0;
363
364 for (j = 0; j < bytes; j++)
365 {
366 if ((i == 0) && (j == 0))
367 {
368 txdata.packetbyte[j] = (uint8)slAddr;
369 }
370
371 else
372 {
373 txdata.packetbyte[j] = (uint8)data[i + j - 1];
374 }
375 }
376
377 do
378 {
379 // check errors
380 uint32 ris;
381 ris = i2c->RIS.U;
382
383 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
384 {
385 IfxI2c_clearAllProtocolInterruptSources(i2c);
386 status = IfxI2c_I2c_Status_error;
387 }
388
389 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
390 {
391 IfxI2c_clearAllErrorInterruptSources(i2c);
392 status = IfxI2c_I2c_Status_error;
393 }
394 } while (i2c->FFSSTAT.B.FFS == 8 && status != IfxI2c_I2c_Status_error); // wait to prevent FIFO overflow
395
396 if (status == IfxI2c_I2c_Status_error)
397 {
398 break;
399 }
400
401 IfxI2c_writeFifo(i2c, txdata.packet);
402 IfxI2c_clearLastSingleRequestInterruptSource(i2c);
403 IfxI2c_clearSingleRequestInterruptSource(i2c);
404 IfxI2c_clearLastBurstRequestInterruptSource(i2c);
405 IfxI2c_clearBurstRequestInterruptSource(i2c);
406 }
407
408 IfxCpu_restoreInterrupts(intEnabled); // (re-) enable global interrupts
409
410 // wait until all bytes are sent
411 while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
412 {}
413
414 IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
415
416 // finally check errors
417 uint32 ris;
418 ris = i2c->RIS.U;
419
420 if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
421 {
422 IfxI2c_clearAllProtocolInterruptSources(i2c);
423 status = IfxI2c_I2c_Status_error;
424 }
425
426 if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
427 {
428 IfxI2c_clearAllErrorInterruptSources(i2c);
429 status = IfxI2c_I2c_Status_error;
430 }
431 }
432
433 IfxI2c_releaseBus(i2c);
434 i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
435 i2cDevice->i2c->status = status;
436 return status;
437 }
IfxI2c_clearLastSingleRequestInterruptSource
IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c)
clears last single request interrupt source
Definition: IfxI2c.h:618
IfxI2c_Pins::padDriver
IfxPort_PadDriver padDriver
Definition: IfxI2c.h:120
IfxI2c_writeFifo
IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
Writes a packet (4 bytes) into the Fifo.
Definition: IfxI2c.h:919
IfxI2c_releaseBus
void IfxI2c_releaseBus(Ifx_I2C *i2c)
Releases the bus, i.e puts a stop condition on the bus.
Definition: IfxI2c.c:212
IfxI2c_setReceivePacketSize
IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be received.
Definition: IfxI2c.h:882
IfxI2c_busIsFree
IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
Returns if the bus is free.
Definition: IfxI2c.h:569
IfxI2c_getBusStatus
IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
Definition: IfxI2c.h:751
IfxI2c_setBaudrate
void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
Calculates the desired baudrate.
Definition: IfxI2c.c:260
IfxI2c_clearBurstRequestInterruptSource
IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c)
clears burst request interrupt source
Definition: IfxI2c.h:600
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxI2c_getBaudrate
float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
Returns the real Baudrate.
Definition: IfxI2c.c:170
IfxI2c_Pins::scl
IfxI2c_Scl_InOut * scl
Definition: IfxI2c.h:118
IfxI2c_I2c_Config::baudrate
float32 baudrate
Baudrate.
Definition: IfxI2c_I2c.h:330
IfxI2c_I2c_Config
Structure to configure the Module.
Definition: IfxI2c_I2c.h:327
IfxI2c_I2c_Device::deviceAddress
uint8 deviceAddress
Definition: IfxI2c_I2c.h:339
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxI2c_I2c_read
IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device
Definition: IfxI2c_I2c.c:79
IfxI2c_I2c_Status
IfxI2c_I2c_Status
Definition: IfxI2c_I2c.h:298
IfxI2c_I2c_Status_busNotFree
bus is not free
Definition: IfxI2c_I2c.h:303
IfxI2c_I2c_deviceConfig
Structure to configure the device&#39;s data structure.
Definition: IfxI2c_I2c.h:344
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
IfxI2c_configureAsMaster
void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
Configures the Module as Master.
Definition: IfxI2c.c:35
IfxI2c_I2c_initModule
void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module.
Definition: IfxI2c_I2c.c:57
IfxI2c_I2c_Device::i2c
IfxI2c_I2c * i2c
Module Pionter.
Definition: IfxI2c_I2c.h:338
IfxI2c_I2c_Config::i2c
Ifx_I2C * i2c
Module Pointer.
Definition: IfxI2c_I2c.h:329
IfxI2c_I2c_Status_nak
NAK.
Definition: IfxI2c_I2c.h:301
IfxI2c_enableModule
void IfxI2c_enableModule(Ifx_I2C *i2c)
Enables the I2c Module.
Definition: IfxI2c.c:106
IfxI2c_ProtocolInterruptSource_arbitrationLost
arbitration lost service request
Definition: IfxI2c.h:91
IfxI2c_I2c_write
IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device
Definition: IfxI2c_I2c.c:288
IfxI2c_I2c::busStatus
IfxI2c_BusStatus busStatus
Status of the bus.
Definition: IfxI2c_I2c.h:320
IfxI2c_clearProtocolInterruptSource
IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
clears the specified source of protocol interrupt
Definition: IfxI2c.h:624
IfxI2c_clearAllProtocolInterruptSources
IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
Clears all Protocol Interrupt sources.
Definition: IfxI2c.h:594
IfxI2c_I2c_Config::pins
IFX_CONST IfxI2c_Pins * pins
Pins.
Definition: IfxI2c_I2c.h:331
IfxI2c_initSclSdaPin
void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
Definition: IfxI2c.c:201
IfxI2c_I2c_Status_error
error
Definition: IfxI2c_I2c.h:304
IfxI2c_getProtocolInterruptSourceStatus
IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
returns the status of specified protocol interrupt source
Definition: IfxI2c.h:826
IfxI2c_stop
IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
Definition: IfxI2c.h:906
IfxI2c_I2c_Device
Structure with slave device data.
Definition: IfxI2c_I2c.h:336
sint32
long sint32
Definition: Platform_Types.h:131
IfxI2c_Pins::sda
IfxI2c_Sda_InOut * sda
Definition: IfxI2c.h:119
IfxI2c_I2c.h
I2C I2C details.
IfxI2c_I2c_initConfig
void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values.
Definition: IfxI2c_I2c.c:35
IfxI2c_I2c_Status_al
Arbitration Lost.
Definition: IfxI2c_I2c.h:302
IfxI2c_I2c_initDeviceConfig
void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values.
Definition: IfxI2c_I2c.c:50
IfxI2c_I2c
Handler.
Definition: IfxI2c_I2c.h:317
IfxI2c_ProtocolInterruptSource_transmissionEnd
transmission end service request
Definition: IfxI2c.h:93
IfxI2c_run
IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
Definition: IfxI2c.h:870
IfxI2c_I2c_initDevice
void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler.
Definition: IfxI2c_I2c.c:43
IfxI2c_I2c::status
IfxI2c_I2c_Status status
Status of the last bus operation.
Definition: IfxI2c_I2c.h:321
IfxI2c_clearAllErrorInterruptSources
IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
clears all Error Interrupt sources
Definition: IfxI2c.h:588
IfxI2c_setTransmitPacketSize
IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
Sets the number of bytes to be tansmitted.
Definition: IfxI2c.h:900
IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived
not acknowledge received service request
Definition: IfxI2c.h:92
IfxI2c_clearLastBurstRequestInterruptSource
IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c)
clears last burst request interrupt source
Definition: IfxI2c.h:612
IfxI2c_clearSingleRequestInterruptSource
IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c)
clears single request interrupt source
Definition: IfxI2c.h:630
TRUE
#define TRUE
Definition: Platform_Types.h:87
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxI2c_I2c_Status_ok
ok
Definition: IfxI2c_I2c.h:300


iLLD_TC26B: IfxI2c_I2c.h Source File

  • I2c
  • I2c
IfxI2c_I2c.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_I2c.h
3 * \brief I2C I2C details
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_I2c_I2c_Usage How to use the I2c driver?
25 * \ingroup IfxLld_I2c
26 *
27 * The I2c driver provides a default configuration for 8bit wide data transfers in Master mode.
28 *
29 * NOTE: Interrupts are disabled during data transfers as long as the driver operates on the I2C hardware FIFO,
30 * except for reading 32 bytes or less. This is due to limitations of the I2c Module.
31 *
32 * NOTE : Send Slave address as 8-bit by left shifting it by 1.E.g incase of EEPROM,slave address is 7 bit represented
33 * as 0x50, after left shifting it by 1, it will be 0xa0
34 *
35 * In the following sections it will be described, how to integrate the driver into the application framework.
36 *
37 * \section IfxLld_I2c_I2c Preparation Preparation
38 * \subsection IfxLld_I2c_I2c_Include Include Files
39 *
40 * Include following header file into your C code:
41 * \code
42 * #include <I2c/I2c/IfxI2c_I2c.h>
43 * \endcode
44 *
45 * \subsection IfxLld_I2c_I2c_Variables Variables
46 *
47 * Declare the I2c handle, the I2c device handle and the data buffer in your C code:
48 *
49 * \code
50 * // used globally
51 * static IfxI2c_I2c i2c; // i2c handle
52 * static IfxI2c_I2c_Device i2cDev; // slave device handle
53 * uint8 data[128]; // data buffer
54 * \endcode
55 *
56 * \subsection IfxLld_I2c_I2c_Init Module Initialisation
57 *
58 * \code
59 * // create config structure
60 * IfxI2c_I2c_Config config;
61 *
62 * // fill structure with default values and Module address
63 * IfxI2c_I2c_initConfig(&config, &MODULE_I2C0);
64 *
65 * // configure pins
66 * const IfxI2c_Pins pins = {
67 * &IfxI2c0_SCL_P02_5_INOUT,
68 * &IfxI2c0_SDA_P02_4_INOUT,
69 * IfxPort_PadDriver_cmosAutomotiveSpeed1
70 * };
71 *
72 * config.pins = &pins;
73 *
74 * config.baudrate = 400000; // 400 kHz
75 *
76 * // initialize module
77 * IfxI2c_I2c_initModule(&i2c, &config);
78 * \endcode
79 *
80 * \subsection IfxLld_I2c_I2c_InitDevice Device Initialisation
81 * Here the i2c device handle is initialized.
82 * \code
83 * // create device config
84 * IfxI2c_I2c_deviceConfig i2cDeviceConfig;
85 *
86 * // fill structure with default values and i2c Handler
87 * IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c);
88 *
89 * // set device specifig values.
90 * i2cDeviceConfig.deviceAddress = 0xa0; // 8 bit device address
91 *
92 * // initialize the i2c device handle
93 * IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);
94 * \endcode
95 *
96 * \section IfxLld_I2c_I2c_DataTransfers Data Transfers
97 * Example for an i2c EEPROM.
98 *
99 * \subsection IfxLld_I2c_I2c_Write Write
100 *
101 * \code
102 * uint16 addr = 0x0000;
103 *
104 * // setup the device's internal address
105 * data[0] = addr >> 8; // High byte
106 * data[1] = (uint8)addr; // Low byte
107 * // setup data to be written
108 * data[2] = 0x01;
109 * data[3] = 0x02;
110 * data[4] = 0x03;
111 *
112 * uint8 size = 5; // 5 bytes to transmit to i2cDev (data and internal address)
113 *
114 * // write data to device as soon as it is ready
115 * while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
116 * \endcode
117 *
118 * \subsection IfxLld_I2c_I2c_Read Read
119 *
120 * \code
121 * Ifx_SizeT size;
122 * uint16 addr = 0x0000;
123 *
124 * // setup internal address to be read from
125 * data[0] = addr >> 8; // High byte
126 * data[1] = (uint8)addr; // Low byte
127 * size = 2;
128 * while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
129 *
130 * size = 8; // 8 bytes to read
131 *
132 * // read device data to data array
133 * while(IfxI2c_I2c_read(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
134 * \endcode
135 *
136 * \subsection IfxLld_I2c_I2c_ACK Acknowledge Polling
137 * It is also possible to poll explicitly for NAK.
138 *
139 * By using write operations:
140 * \code
141 * // size = 0;
142 * while(IfxI2c_I2c_write(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer
143 * \endcode
144 *
145 * By using read operations:
146 * \code
147 * // size = 0;
148 * while(IfxI2c_I2c_read(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer
149 * \endcode
150 *
151 * \subsection IfxLld_I2c_I2c_Interrupts Interrupts usage
152 *
153 * Interrupts can be enabled from the application by using the APIs provided in the driver,
154 * there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,\n
155 * APIs to enable the the interrupts are also available.
156 *
157 * here is an example of how to use the interrupts in I2C driver.
158 *
159 * Using I2C interrupts
160 *
161 *
162 * I2C burst data transfer interrupt
163 *
164 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
165 *
166 * choose the burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing burst data transfer \n
167 * interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority
168 *
169 * \code
170 * //enable burst data transfer interrupt source
171 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
172 * IfxI2c_enableBurstRequestInterruptSource(i2c);
173 *
174 * // enable the burst data transfer interrupt
175 * IfxI2c_enableBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
176 * \endcode
177 *
178 * I2C last burst data transfer interrupt
179 *
180 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
181 *
182 * choose the last burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last burst data transfer \n
183 * interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority
184 *
185 * \code
186 * //enable last burst data transfer interrupt source
187 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
188 * IfxI2c_enableLastBurstRequestInterruptSource(i2c);
189 *
190 * // enable the last burst data transfer interrupt
191 * IfxI2c_enableLastBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
192 * \endcode
193 *
194 * I2C single data transfer interrupt
195 *
196 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
197 *
198 * choose the single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing single data transfer \n
199 * interrupt source, enable single data transfer service request or interrupt with the desired type of service and priority
200 *
201 * \code
202 * //enable burst data transfer interrupt source
203 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
204 * IfxI2c_enableSingleRequestInterruptSource(i2c);
205 *
206 * // enable the burst data transfer interrupt
207 * IfxI2c_enableSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
208 * \endcode
209 *
210 * I2C last single data transfer interrupt
211 *
212 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
213 *
214 * choose the last single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last single data transfer \n
215 * interrupt source, enable last single data transfer service request or interrupt with the desired type of service and priority
216 *
217 * \code
218 * //enable burst data transfer interrupt source
219 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
220 * IfxI2c_enableLastSingleRequestInterruptSource(i2c);
221 *
222 * // enable the burst data transfer interrupt
223 * IfxI2c_enableLastSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
224 * \endcode
225 *
226 * I2C error interrupt (ERR)
227 *
228 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
229 *
230 * choose the error interrupt sources needed to be enabled for I2C module and call the following functions once for each error interrupt source by choosing the right \n
231 * error interrupt source as parameter,and after choosing all the error interrupt sources, enable the I2C error interrupt flag and then enable I2C error service request or interrupt with desired type of service and priority
232 *
233 * \code
234 * //enable error interrupt sources
235 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
236 * IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_rxFifoUnderflow);
237 * IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_txFifoOverflow);
238 *
239 * // enable the error interrupt flag
240 * IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
241 *
242 * // enable the error interrupt
243 * IfxI2c_enableErrorInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
244 * \endcode
245 *
246 *
247 * I2C protocol interrupt (PROTOCOL)
248 *
249 * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
250 *
251 * choose the protocol interrupt sources needed to be enabled for I2C module and call the following functions once for each protocol interrupt source by choosing the \n
252 * right protocol interrupt source as parameter,and after choosing all the protocol interrupt sources, enable the I2C protocol interrupt flag and then enable \n
253 * I2C protocol service request or interrupt with desired type of service and priority
254 *
255 * \code
256 * //enable protocol interrupt sources
257 * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
258 * IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_addressMatch);
259 * IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
260 *
261 * // enable the protocol interrupt flag
262 * IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
263 *
264 * // enable the protocol interrupt
265 * IfxI2c_enableProtocolInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
266 * \endcode
267 *
268 * you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts \ref IfxLld_Cpu_Irq_Usage
269 *
270 * some additional APIs to clear, disable interrupt flags and get flag status are also available.
271 *
272 * \defgroup IfxLld_I2c_I2c I2C
273 * \ingroup IfxLld_I2c
274 * \defgroup IfxLld_I2c_I2c_Functions Module Functions
275 * \ingroup IfxLld_I2c_I2c
276 * \defgroup IfxLld_I2c_I2c_Enum Enumerations
277 * \ingroup IfxLld_I2c_I2c
278 * \defgroup IfxLld_I2c_I2c_DataStructures Data Structures
279 * \ingroup IfxLld_I2c_I2c
280 */
281
282 #ifndef IFXI2C_I2C_H
283 #define IFXI2C_I2C_H 1
284
285 /******************************************************************************/
286 /*----------------------------------Includes----------------------------------*/
287 /******************************************************************************/
288
289 #include "I2c/Std/IfxI2c.h"
290 #include "Cpu/Std/IfxCpu.h"
291
292 /******************************************************************************/
293 /*--------------------------------Enumerations--------------------------------*/
294 /******************************************************************************/
295
296 /** \addtogroup IfxLld_I2c_I2c_Enum
297 * \{ */
298 typedef enum
299 {
300 IfxI2c_I2c_Status_ok = 0, /**< \brief ok */
301 IfxI2c_I2c_Status_nak = 1, /**< \brief NAK */
302 IfxI2c_I2c_Status_al = 2, /**< \brief Arbitration Lost */
303 IfxI2c_I2c_Status_busNotFree = 3, /**< \brief bus is not free */
304 IfxI2c_I2c_Status_error = 4 /**< \brief error */
305 } IfxI2c_I2c_Status;
306
307 /** \} */
308
309 /******************************************************************************/
310 /*-----------------------------Data Structures--------------------------------*/
311 /******************************************************************************/
312
313 /** \addtogroup IfxLld_I2c_I2c_DataStructures
314 * \{ */
315 /** \brief Handler
316 */
317 typedef struct
318 {
319 Ifx_I2C *i2c; /**< \brief Module Pointer */
320 IfxI2c_BusStatus busStatus; /**< \brief Status of the bus */
321 IfxI2c_I2c_Status status; /**< \brief Status of the last bus operation */
322 float32 baudrate; /**< \brief Baudrate */
323 } IfxI2c_I2c;
324
325 /** \brief Structure to configure the Module
326 */
327 typedef struct
328 {
329 Ifx_I2C *i2c; /**< \brief Module Pointer */
330 float32 baudrate; /**< \brief Baudrate */
331 IFX_CONST IfxI2c_Pins *pins; /**< \brief Pins */
332 } IfxI2c_I2c_Config;
333
334 /** \brief Structure with slave device data
335 */
336 typedef struct
337 {
338 IfxI2c_I2c *i2c; /**< \brief Module Pionter */
339 uint8 deviceAddress;
340 } IfxI2c_I2c_Device;
341
342 /** \brief Structure to configure the device's data structure
343 */
344 typedef struct
345 {
346 IfxI2c_I2c *i2c; /**< \brief Module Pointer */
347 uint8 deviceAddress; /**< \brief the slave device's address */
348 } IfxI2c_I2c_deviceConfig;
349
350 /** \} */
351
352 /** \addtogroup IfxLld_I2c_I2c_Functions
353 * \{ */
354
355 /******************************************************************************/
356 /*-------------------------Global Function Prototypes-------------------------*/
357 /******************************************************************************/
358
359 /** \brief Fills the config structure with default values
360 * \param config Structure to configure the Module
361 * \param i2c Module address
362 * \return None
363 */
364 IFX_EXTERN void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c);
365
366 /** \brief Initializes the device Handler
367 * \param i2cDevice I2c device Handler
368 * \param i2cDeviceConfig Structure to configure the device's data structure
369 * \return None
370 *
371 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
372 *
373 */
374 IFX_EXTERN void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig);
375
376 /** \brief Fills the config structure of the slave device with default values.
377 * \param i2cDeviceConfig Structure to configure the device's data structure
378 * \param i2c Handler
379 * \return None
380 */
381 IFX_EXTERN void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c);
382
383 /** \brief Initializes the Module
384 * \param i2c Handler
385 * \param config Configuration structure
386 * \return None
387 *
388 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
389 *
390 */
391 IFX_EXTERN void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config);
392
393 /** \brief reads the I2c device
394 *
395 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
396 *
397 */
398 IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size);
399
400 /** \brief writes to the I2c device
401 *
402 * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
403 *
404 */
405 IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size);
406
407 /** \} */
408
409 #endif /* IFXI2C_I2C_H */
IfxI2c_BusStatus
IfxI2c_BusStatus
Definition: IfxI2c.h:52
IfxI2c.h
I2C basic functionality.
float32
float float32
Definition: Platform_Types.h:167
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxI2c_I2c::baudrate
float32 baudrate
Baudrate.
Definition: IfxI2c_I2c.h:322
IfxI2c_I2c_Config
Structure to configure the Module.
Definition: IfxI2c_I2c.h:327
IfxI2c_I2c_Device::deviceAddress
uint8 deviceAddress
Definition: IfxI2c_I2c.h:339
IfxI2c_I2c_read
IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
reads the I2c device
Definition: IfxI2c_I2c.c:79
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxI2c_I2c_Status
IfxI2c_I2c_Status
Definition: IfxI2c_I2c.h:298
IfxI2c_I2c_Status_busNotFree
bus is not free
Definition: IfxI2c_I2c.h:303
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxI2c_I2c_deviceConfig
Structure to configure the device&#39;s data structure.
Definition: IfxI2c_I2c.h:344
IfxI2c_I2c_initModule
IFX_EXTERN void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
Initializes the Module.
Definition: IfxI2c_I2c.c:57
IfxI2c_I2c_Device::i2c
IfxI2c_I2c * i2c
Module Pionter.
Definition: IfxI2c_I2c.h:338
IfxI2c_I2c::i2c
Ifx_I2C * i2c
Module Pointer.
Definition: IfxI2c_I2c.h:319
IfxI2c_I2c_Status_nak
NAK.
Definition: IfxI2c_I2c.h:301
IfxI2c_I2c_write
IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
writes to the I2c device
Definition: IfxI2c_I2c.c:288
IfxI2c_I2c::busStatus
IfxI2c_BusStatus busStatus
Status of the bus.
Definition: IfxI2c_I2c.h:320
IfxI2c_I2c_Config::pins
IFX_CONST IfxI2c_Pins * pins
Pins.
Definition: IfxI2c_I2c.h:331
IfxI2c_I2c_Status_error
error
Definition: IfxI2c_I2c.h:304
IfxCpu.h
CPU basic functionality.
IfxI2c_I2c_Device
Structure with slave device data.
Definition: IfxI2c_I2c.h:336
IfxI2c_Pins
Pin Structure.
Definition: IfxI2c.h:116
IfxI2c_I2c_initConfig
IFX_EXTERN void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
Fills the config structure with default values.
Definition: IfxI2c_I2c.c:35
IfxI2c_I2c_Status_al
Arbitration Lost.
Definition: IfxI2c_I2c.h:302
IfxI2c_I2c_initDeviceConfig
IFX_EXTERN void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
Fills the config structure of the slave device with default values.
Definition: IfxI2c_I2c.c:50
IfxI2c_I2c
Handler.
Definition: IfxI2c_I2c.h:317
IfxI2c_I2c_initDevice
IFX_EXTERN void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
Initializes the device Handler.
Definition: IfxI2c_I2c.c:43
IfxI2c_I2c::status
IfxI2c_I2c_Status status
Status of the last bus operation.
Definition: IfxI2c_I2c.h:321
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxI2c_I2c_Status_ok
ok
Definition: IfxI2c_I2c.h:300


iLLD_TC26B: IfxI2c_PinMap.c Source File

  • _PinMap
IfxI2c_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_PinMap.c
3 * \brief I2C I/O map
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxI2c_PinMap.h"
27
28 IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5};
29 IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
30 IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6};
31 IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5};
32 IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
33 IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6};
34
35
36 const IfxI2c_Scl_InOut *IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS] = {
37 {
38 &IfxI2c0_SCL_P02_5_INOUT,
39 &IfxI2c0_SCL_P13_1_INOUT,
40 &IfxI2c0_SCL_P15_4_INOUT
41 }
42 };
43
44 const IfxI2c_Sda_InOut *IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS] = {
45 {
46 &IfxI2c0_SDA_P02_4_INOUT,
47 &IfxI2c0_SDA_P13_2_INOUT,
48 &IfxI2c0_SDA_P15_5_INOUT
49 }
50 };
IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:65
IfxI2c_Sda_InOut_pinTable
const IfxI2c_Sda_InOut * IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
Definition: IfxI2c_PinMap.c:44
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:48
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxI2c0_SCL_P13_1_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
Definition: IfxI2c_PinMap.c:29
IfxI2c_Scl_InOut_pinTable
const IfxI2c_Scl_InOut * IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
Definition: IfxI2c_PinMap.c:36
IfxI2c0_SDA_P15_5_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
Definition: IfxI2c_PinMap.c:33
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxI2c0_SDA_P13_2_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
Definition: IfxI2c_PinMap.c:32
IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:66
IfxI2c_PinMap.h
I2C I/O map.
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxI2c0_SDA_P02_4_INOUT
IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
Definition: IfxI2c_PinMap.c:31
IfxI2c0_SCL_P02_5_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
Definition: IfxI2c_PinMap.c:28
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:39
IFXI2C_PINMAP_NUM_MODULES
#define IFXI2C_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxI2c_PinMap.h:64
IfxI2c0_SCL_P15_4_INOUT
IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
Definition: IfxI2c_PinMap.c:30
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107


iLLD_TC26B: IfxI2c_PinMap.h Source File

  • _PinMap
IfxI2c_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_PinMap.h
3 * \brief I2C I/O map
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_I2c_pinmap I2C Pin Mapping
25 * \ingroup IfxLld_I2c
26 */
27
28 #ifndef IFXI2C_PINMAP_H
29 #define IFXI2C_PINMAP_H
30
31 #include <IfxI2c_reg.h>
32 #include <_Impl/IfxI2c_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_I2c_pinmap
36 * \{ */
37
38 /** \brief SCL input mapping structure */
39 typedef const struct
40 {
41 Ifx_I2C* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
44 IfxPort_OutputIdx outSelect; /**< \brief Port control code */
45 } IfxI2c_Scl_InOut;
46
47 /** \brief SDA input mapping structure */
48 typedef const struct
49 {
50 Ifx_I2C* module; /**< \brief Base address */
51 IfxPort_Pin pin; /**< \brief Port pin */
52 Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
53 IfxPort_OutputIdx outSelect; /**< \brief Port control code */
54 } IfxI2c_Sda_InOut;
55
56 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
57 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
58 IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
59 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
60 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
61 IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
62
63 /** \brief Table dimensions */
64 #define IFXI2C_PINMAP_NUM_MODULES 1
65 #define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
66 #define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3
67
68
69 /** \brief IfxI2c_Scl_InOut table */
70 IFX_EXTERN const IfxI2c_Scl_InOut *IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS];
71
72 /** \brief IfxI2c_Sda_InOut table */
73 IFX_EXTERN const IfxI2c_Sda_InOut *IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS];
74
75 /** \} */
76
77 #endif /* IFXI2C_PINMAP_H */
IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:65
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxI2c_Scl_InOut::pin
IfxPort_Pin pin
Port pin.
Definition: IfxI2c_PinMap.h:42
IfxI2c0_SCL_P15_4_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT
I2C0_SCL: I2C0 output and input.
Definition: IfxI2c_PinMap.h:58
IfxI2c_Scl_InOut::inSelect
Ifx_RxSel inSelect
Input multiplexer value.
Definition: IfxI2c_PinMap.h:43
IfxI2c_Sda_InOut
SDA input mapping structure.
Definition: IfxI2c_PinMap.h:48
IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS
Definition: IfxI2c_PinMap.h:66
IfxI2c0_SCL_P02_5_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT
I2C0_SCL: I2C0 output and input.
Definition: IfxI2c_PinMap.h:56
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxI2c_Sda_InOut_pinTable
IFX_EXTERN const IfxI2c_Sda_InOut * IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS]
IfxI2c_Sda_InOut table.
Definition: IfxI2c_PinMap.h:73
IfxI2c_Scl_InOut::module
Ifx_I2C * module
Base address.
Definition: IfxI2c_PinMap.h:41
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxI2c_Scl_InOut_pinTable
IFX_EXTERN const IfxI2c_Scl_InOut * IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS]
IfxI2c_Scl_InOut table.
Definition: IfxI2c_PinMap.h:70
IfxI2c_Scl_InOut
SCL input mapping structure.
Definition: IfxI2c_PinMap.h:39
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IFXI2C_PINMAP_NUM_MODULES
#define IFXI2C_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxI2c_PinMap.h:64
IfxI2c0_SDA_P02_4_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT
I2C0_SDA: I2C0 output and input.
Definition: IfxI2c_PinMap.h:59
IfxI2c0_SDA_P13_2_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT
I2C0_SDA: I2C0 output and input.
Definition: IfxI2c_PinMap.h:60
IfxI2c0_SDA_P15_5_INOUT
IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT
I2C0_SDA: I2C0 output and input.
Definition: IfxI2c_PinMap.h:61
IfxI2c0_SCL_P13_1_INOUT
IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT
I2C0_SCL: I2C0 output and input.
Definition: IfxI2c_PinMap.h:57
IfxI2c_Scl_InOut::outSelect
IfxPort_OutputIdx outSelect
Port control code.
Definition: IfxI2c_PinMap.h:44
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxI2c_cfg.c Source File

  • _Impl
IfxI2c_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_cfg.c
3 * \brief I2C on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxI2c_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES] = {
36 {&MODULE_I2C0, (uint32)IfxI2c_Index_0}
37 };
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxI2c_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.c:35
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:61
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:48
IfxI2c_cfg.h
I2C on-chip implementation data.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123


iLLD_TC26B: IfxI2c_cfg.h Source File

  • _Impl
IfxI2c_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxI2c_cfg.h
3 * \brief I2C on-chip implementation data
4 * \ingroup IfxLld_I2c
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_I2c I2C
25 * \ingroup IfxLld
26 * \defgroup IfxLld_I2c_Impl Implementation
27 * \ingroup IfxLld_I2c
28 * \defgroup IfxLld_I2c_Std Standard Driver
29 * \ingroup IfxLld_I2c
30 * \defgroup IfxLld_I2c_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_I2c_Impl
32 */
33
34 #ifndef IFXI2C_CFG_H
35 #define IFXI2C_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "IfxI2c_reg.h"
43
44 /******************************************************************************/
45 /*-----------------------------------Macros-----------------------------------*/
46 /******************************************************************************/
47
48 #define IFXI2C_NUM_MODULES (1)
49
50 /******************************************************************************/
51 /*--------------------------------Enumerations--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_I2c_Impl_Enumerations
55 * \{ */
56 /** \brief List of the available I2c interfaces
57 */
58 typedef enum
59 {
60 IfxI2c_Index_none = -1, /**< \brief Not Selected */
61 IfxI2c_Index_0 = 0, /**< \brief I2C Index 0 */
62 } IfxI2c_Index;
63
64 /** \} */
65
66 /** \addtogroup IfxLld_I2c_Impl_Enumerations
67 * \{ */
68
69 /******************************************************************************/
70 /*-------------------Global Exported Variables/Constants----------------------*/
71 /******************************************************************************/
72
73 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES];
74
75 /** \} */
76
77 #endif /* IFXI2C_CFG_H */
IfxI2c_Index_none
Not Selected.
Definition: IfxI2c_cfg.h:60
IfxI2c_Index
IfxI2c_Index
List of the available I2c interfaces.
Definition: IfxI2c_cfg.h:58
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxI2c_Index_0
I2C Index 0.
Definition: IfxI2c_cfg.h:61
IFXI2C_NUM_MODULES
#define IFXI2C_NUM_MODULES
Definition: IfxI2c_cfg.h:48
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxI2c_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES]
Definition: IfxI2c_cfg.h:73


iLLD_TC26B: IfxIom.c Source File

  • Iom
  • Std
IfxIom.c
Go to the documentation of this file.
1 /**
2 * \file IfxIom.c
3 * \brief IOM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxIom.h"
30 #include "Scu/Std/IfxScuCcu.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 float32 IfxIom_getFrequency(Ifx_IOM *iom)
37 {
38 IFX_UNUSED_PARAMETER(iom)
39 float32 fspb;
40 float32 fgtm;
41
42 fspb = IfxScuCcu_getSpbFrequency();
43 fgtm = IfxScuCcu_getGtmFrequency();
44
45 return fspb > fgtm ? fspb : fgtm;
46 }
47
48
49 void IfxIom_resetModule(Ifx_IOM *iom)
50 {
51 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
52
53 IfxScuWdt_clearCpuEndinit(passwd);
54 iom->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
55 iom->KRST0.B.RST = 1;
56 IfxScuWdt_setCpuEndinit(passwd);
57
58 while (iom->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
59
60 {}
61
62 IfxScuWdt_clearCpuEndinit(passwd);
63 iom->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
64 IfxScuWdt_setCpuEndinit(passwd);
65 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxIom.h
IOM basic functionality.
float32
float float32
Definition: Platform_Types.h:167
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxIom_getFrequency
float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:36
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxIom_resetModule
void IfxIom_resetModule(Ifx_IOM *iom)
Reset the IOM module.
Definition: IfxIom.c:49
IfxScuCcu.h
SCU basic functionality.
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1071
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205


iLLD_TC26B: IfxIom.h Source File

  • Iom
  • Std
IfxIom.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom.h
3 * \brief IOM basic functionality
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Iom_Std_Enumeration Enumeration
25 * \ingroup IfxLld_Iom_Std
26 * \defgroup IfxLld_Iom_Std_Utility Utility Functions
27 * \ingroup IfxLld_Iom_Std
28 * \defgroup IfxLld_Iom_Std_Enumeration_Obsolete Enumeration Obsolete (NOt recommended for use)
29 * \ingroup IfxLld_Iom_Std
30 * \defgroup IfxLld_Iom_Std_Module_Obsolete Module Functions Obsolete (NOt recommended for use)
31 * \ingroup IfxLld_Iom_Std
32 */
33
34 #ifndef IFXIOM_H
35 #define IFXIOM_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "_Impl/IfxIom_cfg.h"
42 #include "IfxIom_reg.h"
43 #include "Scu/Std/IfxScuWdt.h"
44 #include "Cpu/Std/IfxCpu_Intrinsics.h"
45
46 /******************************************************************************/
47 /*--------------------------------Enumerations--------------------------------*/
48 /******************************************************************************/
49
50 /** \addtogroup IfxLld_Iom_Std_Enumeration
51 * \{ */
52 /** \brief Event source configuration
53 * IOM_LAMCFGm.MOS
54 */
55 typedef enum
56 {
57 IfxIom_LamEventSource_mon = 0, /**< \brief Monitor signal is sourced directly from FPCmch */
58 IfxIom_LamEventSource_monXorRef = 1 /**< \brief Monitor signal is EXOR'd with FPCrch */
59 } IfxIom_LamEventSource;
60
61 /** \brief Event trigger configuration
62 * IOM_LAMCFGm.EDS upper two bits
63 */
64 typedef enum
65 {
66 IfxIom_LamEventTrigger_none = 0, /**< \brief Neither edge used to gate event generation */
67 IfxIom_LamEventTrigger_risingEdge = 1, /**< \brief Positive edge used to gate event generation */
68 IfxIom_LamEventTrigger_fallingEdge = 2, /**< \brief Negative edge used to gate event generation */
69 IfxIom_LamEventTrigger_anyEdge = 3 /**< \brief Either edge used to gate event generation */
70 } IfxIom_LamEventTrigger;
71
72 /** \brief Timer clear event configuration
73 * IOM_LAMCFGm.EDS upper lower bits
74 */
75 typedef enum
76 {
77 IfxIom_LamEventWindowClearEvent_none = 0, /**< \brief Neither edge used to clear event windowcounter */
78 IfxIom_LamEventWindowClearEvent_risingEdge = 1, /**< \brief Positive edge used to clear event windowcounter */
79 IfxIom_LamEventWindowClearEvent_fallingEdge = 2, /**< \brief Negative edge used to clear event windowcounter */
80 IfxIom_LamEventWindowClearEvent_anyEdge = 3 /**< \brief Either edge used to clear event windowcounter */
81 } IfxIom_LamEventWindowClearEvent;
82
83 /** \brief Timer control source configuration
84 * IOM_LAMCFGm.EWS
85 */
86 typedef enum
87 {
88 IfxIom_LamEventWindowControlSource_ref = 0, /**< \brief Event window generation is determined from the reference signal */
89 IfxIom_LamEventWindowControlSource_mon = 1 /**< \brief Event window generation is determined from the monitor signal */
90 } IfxIom_LamEventWindowControlSource;
91
92 /** \brief Timer run configuration
93 * IOM_LAMCFGm.RMS
94 */
95 typedef enum
96 {
97 IfxIom_LamEventWindowRunControl_freeRunning = 0, /**< \brief Event window generation is free-running. */
98 IfxIom_LamEventWindowRunControl_gated = 1 /**< \brief Event window generation is gated with the monitor or reference signal */
99 } IfxIom_LamEventWindowRunControl;
100
101 /** \brief FPC filer mode
102 * IOM_FPCCTRk.MOD, with additional definition for noFilter
103 */
104 typedef enum
105 {
106 IfxIom_LamFilterMode_delayDebounceBothEdge = 0, /**< \brief Delayed Debounce Filter Mode on both edges */
107 IfxIom_LamFilterMode_immediateDebounceBothEdge = 1, /**< \brief Immediate Debounce Filter Mode on both edges */
108 IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2, /**< \brief Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering */
109 IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3, /**< \brief Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode */
110 IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4, /**< \brief Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode */
111 IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5, /**< \brief Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode */
112 IfxIom_LamFilterMode_prescalerOnRisingEdge = 6, /**< \brief Prescaler Mode (triggered on rising edge) */
113 IfxIom_LamFilterMode_prescalerOnFallingEdge = 7, /**< \brief Prescaler Mode (triggered on falling edge) */
114 IfxIom_LamFilterMode_noFilter = 8 /**< \brief No filter (value used for software only ) */
115 } IfxIom_LamFilterMode;
116
117 /** \brief Specifies the Logic Module Analyser Module Number
118 */
119 typedef enum
120 {
121 IfxIom_LamId_0 = 0, /**< \brief Specifies the LAM Id0 */
122 IfxIom_LamId_1, /**< \brief Specifies the LAM Id1 */
123 IfxIom_LamId_2, /**< \brief Specifies the LAM Id2 */
124 IfxIom_LamId_3, /**< \brief Specifies the LAM Id3 */
125 IfxIom_LamId_4, /**< \brief Specifies the LAM Id4 */
126 IfxIom_LamId_5, /**< \brief Specifies the LAM Id5 */
127 IfxIom_LamId_6, /**< \brief Specifies the LAM Id6 */
128 IfxIom_LamId_7, /**< \brief Specifies the LAM Id7 */
129 IfxIom_LamId_8, /**< \brief Specifies the LAM Id8 */
130 IfxIom_LamId_9, /**< \brief Specifies the LAM Id9 */
131 IfxIom_LamId_10, /**< \brief Specifies the LAM Id10 */
132 IfxIom_LamId_11, /**< \brief Specifies the LAM Id11 */
133 IfxIom_LamId_12, /**< \brief Specifies the LAM Id12 */
134 IfxIom_LamId_13, /**< \brief Specifies the LAM Id13 */
135 IfxIom_LamId_14, /**< \brief Specifies the LAM Id14 */
136 IfxIom_LamId_15 /**< \brief Specifies the LAM Id15 */
137 } IfxIom_LamId;
138
139 /** \brief Enable/disable the sensitivity of the module to sleep signal
140 * Definition in Ifx_IOM.CLC.B.EDIS
141 */
142 typedef enum
143 {
144 IfxIom_SleepMode_enable = 0, /**< \brief Enables sleep mode */
145 IfxIom_SleepMode_disable = 1 /**< \brief Disables sleep mode */
146 } IfxIom_SleepMode;
147
148 /** \} */
149
150 /** \addtogroup IfxLld_Iom_Std_Enumeration_Obsolete
151 * \{ */
152 /** \} */
153
154 /** \addtogroup IfxLld_Iom_Std_Utility
155 * \{ */
156
157 /******************************************************************************/
158 /*-------------------------Inline Function Prototypes-------------------------*/
159 /******************************************************************************/
160
161 /** \brief Disables the IOM module .
162 * \param iom Pointer to IOM module registers
163 * \return None
164 */
165 IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom);
166
167 /** \brief Enable the IOM module control.
168 * \param iom Pointer to IOM module registers
169 * \param clockDivider IOM clock divider. Set to 1 for max clock.
170 * \return None
171 */
172 IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider);
173
174 /** \brief Enable/disable the sensitivity of the module to sleep signal
175 * \param iom Pointer to IOM registers
176 * \param mode Mode selection (enable/disable)
177 * \return None
178 */
179 IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode);
180
181 /******************************************************************************/
182 /*-------------------------Global Function Prototypes-------------------------*/
183 /******************************************************************************/
184
185 /** \brief Return the frequency used for the filter and timers clock
186 * \param iom Pointer to IOM module registers
187 */
188 IFX_EXTERN float32 IfxIom_getFrequency(Ifx_IOM *iom);
189
190 /** \brief Reset the IOM module
191 * \param iom Pointer to IOM module registers
192 * \return None
193 */
194 IFX_EXTERN void IfxIom_resetModule(Ifx_IOM *iom);
195
196 /** \} */
197
198 /******************************************************************************/
199 /*---------------------Inline Function Implementations------------------------*/
200 /******************************************************************************/
201
202 IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom)
203 {
204 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
205
206 IfxScuWdt_clearCpuEndinit(psw);
207 iom->CLC.B.DISR = 1;
208 IfxScuWdt_setCpuEndinit(psw);
209 }
210
211
212 IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider)
213 {
214 uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
215
216 IfxScuWdt_clearCpuEndinit(psw);
217 iom->CLC.B.RMC = clockDivider;
218 iom->CLC.B.DISR = 0;
219 IfxScuWdt_setCpuEndinit(psw);
220 }
221
222
223 IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode)
224 {
225 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
226 IfxScuWdt_clearCpuEndinit(passwd);
227 iom->CLC.B.EDIS = mode;
228 IfxScuWdt_setCpuEndinit(passwd);
229 }
230
231
232 #endif /* IFXIOM_H */
IfxIom_LamEventWindowClearEvent_none
Neither edge used to clear event windowcounter.
Definition: IfxIom.h:77
IfxIom_LamId_7
Specifies the LAM Id7.
Definition: IfxIom.h:128
IfxIom_LamFilterMode_immediateDebounceBothEdge
Immediate Debounce Filter Mode on both edges.
Definition: IfxIom.h:107
IfxIom_LamId_0
Specifies the LAM Id0.
Definition: IfxIom.h:121
IfxIom_LamFilterMode
IfxIom_LamFilterMode
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.
Definition: IfxIom.h:104
IfxIom_LamId_14
Specifies the LAM Id14.
Definition: IfxIom.h:135
IfxIom_setSleepMode
IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode)
Enable/disable the sensitivity of the module to sleep signal.
Definition: IfxIom.h:223
IfxIom_LamFilterMode_delayDebounceBothEdge
Delayed Debounce Filter Mode on both edges.
Definition: IfxIom.h:106
IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge
Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode...
Definition: IfxIom.h:110
IfxIom_LamEventWindowClearEvent_fallingEdge
Negative edge used to clear event windowcounter.
Definition: IfxIom.h:79
IfxIom_LamId_11
Specifies the LAM Id11.
Definition: IfxIom.h:132
float32
float float32
Definition: Platform_Types.h:167
IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge
Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode.
Definition: IfxIom.h:111
IfxIom_LamId_15
Specifies the LAM Id15.
Definition: IfxIom.h:136
IfxIom_LamEventWindowClearEvent_risingEdge
Positive edge used to clear event windowcounter.
Definition: IfxIom.h:78
IfxIom_LamEventWindowControlSource_ref
Event window generation is determined from the reference signal.
Definition: IfxIom.h:88
IfxIom_LamId_4
Specifies the LAM Id4.
Definition: IfxIom.h:125
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxIom_SleepMode_enable
Enables sleep mode.
Definition: IfxIom.h:144
IfxCpu_Intrinsics.h
IfxIom_enableModule
IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider)
Enable the IOM module control.
Definition: IfxIom.h:212
IfxIom_LamEventWindowRunControl_gated
Event window generation is gated with the monitor or reference signal.
Definition: IfxIom.h:98
IfxIom_LamEventWindowControlSource
IfxIom_LamEventWindowControlSource
Timer control source configuration IOM_LAMCFGm.EWS.
Definition: IfxIom.h:86
IfxIom_LamEventWindowRunControl
IfxIom_LamEventWindowRunControl
Timer run configuration IOM_LAMCFGm.RMS.
Definition: IfxIom.h:95
IfxIom_LamEventTrigger_fallingEdge
Negative edge used to gate event generation.
Definition: IfxIom.h:68
IfxIom_LamEventSource_monXorRef
Monitor signal is EXOR&#39;d with FPCrch.
Definition: IfxIom.h:58
IfxScuWdt.h
SCU basic functionality.
IfxIom_LamFilterMode_immediateDebounceRisingEdge
Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering.
Definition: IfxIom.h:108
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxIom_SleepMode_disable
Disables sleep mode.
Definition: IfxIom.h:145
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxIom_LamId_3
Specifies the LAM Id3.
Definition: IfxIom.h:124
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxIom_LamId_2
Specifies the LAM Id2.
Definition: IfxIom.h:123
IfxIom_LamEventWindowControlSource_mon
Event window generation is determined from the monitor signal.
Definition: IfxIom.h:89
IfxIom_cfg.h
IOM on-chip implementation data.
IfxIom_getFrequency
IFX_EXTERN float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:36
IfxIom_LamEventWindowClearEvent_anyEdge
Either edge used to clear event windowcounter.
Definition: IfxIom.h:80
IfxIom_LamEventSource
IfxIom_LamEventSource
Event source configuration IOM_LAMCFGm.MOS.
Definition: IfxIom.h:55
IfxIom_LamFilterMode_noFilter
No filter (value used for software only )
Definition: IfxIom.h:114
IfxIom_LamEventTrigger
IfxIom_LamEventTrigger
Event trigger configuration IOM_LAMCFGm.EDS upper two bits.
Definition: IfxIom.h:64
IfxIom_LamEventTrigger_none
Neither edge used to gate event generation.
Definition: IfxIom.h:66
IfxIom_LamId
IfxIom_LamId
Specifies the Logic Module Analyser Module Number.
Definition: IfxIom.h:119
IfxIom_LamEventWindowRunControl_freeRunning
Event window generation is free-running.
Definition: IfxIom.h:97
IfxIom_disableModule
IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom)
Disables the IOM module .
Definition: IfxIom.h:202
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxIom_resetModule
IFX_EXTERN void IfxIom_resetModule(Ifx_IOM *iom)
Reset the IOM module.
Definition: IfxIom.c:49
IfxIom_LamId_9
Specifies the LAM Id9.
Definition: IfxIom.h:130
IfxIom_LamId_6
Specifies the LAM Id6.
Definition: IfxIom.h:127
IfxIom_LamFilterMode_immediateDebounceFallingEdge
Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode.
Definition: IfxIom.h:109
IfxIom_LamFilterMode_prescalerOnFallingEdge
Prescaler Mode (triggered on falling edge)
Definition: IfxIom.h:113
IfxIom_LamId_13
Specifies the LAM Id13.
Definition: IfxIom.h:134
IfxIom_LamEventTrigger_risingEdge
Positive edge used to gate event generation.
Definition: IfxIom.h:67
IfxIom_LamEventSource_mon
Monitor signal is sourced directly from FPCmch.
Definition: IfxIom.h:57
IfxIom_LamEventTrigger_anyEdge
Either edge used to gate event generation.
Definition: IfxIom.h:69
IfxIom_LamId_8
Specifies the LAM Id8.
Definition: IfxIom.h:129
IfxIom_LamEventWindowClearEvent
IfxIom_LamEventWindowClearEvent
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.
Definition: IfxIom.h:75
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxIom_LamId_12
Specifies the LAM Id12.
Definition: IfxIom.h:133
IfxIom_LamFilterMode_prescalerOnRisingEdge
Prescaler Mode (triggered on rising edge)
Definition: IfxIom.h:112
IfxIom_LamId_5
Specifies the LAM Id5.
Definition: IfxIom.h:126
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxIom_LamId_1
Specifies the LAM Id1.
Definition: IfxIom.h:122
IfxIom_LamId_10
Specifies the LAM Id10.
Definition: IfxIom.h:131
IfxIom_SleepMode
IfxIom_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_IOM.CLC.B.EDIS.
Definition: IfxIom.h:142


iLLD_TC26B: IfxIom_Driver.c Source File

  • Iom
  • Driver
IfxIom_Driver.c
Go to the documentation of this file.
1 /**
2 * \file IfxIom_Driver.c
3 * \brief IOM DRIVER details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxIom_Driver.h"
30 #include "IfxIom_bf.h"
31 #include "_Utilities/Ifx_Assert.h"
32
33 /******************************************************************************/
34 /*----------------------------------Macros------------------------------------*/
35 /******************************************************************************/
36
37 #define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))
38
39 #define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))
40
41 #define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput) ((refInput >> 0) & 0xFF)
42
43 #define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput) ((monInput >> 0) & 0xFF)
44
45 /******************************************************************************/
46 /*-------------------------Function Implementations---------------------------*/
47 /******************************************************************************/
48
49 void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
50 {
51 Ifx_IOM *module = driver->module;
52 module->FPCESR.U = 0xFFFFFFFF;
53 }
54
55
56 void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
57 {
58 Ifx_IOM *module = driver->module;
59 module->ECMETH0.U = 0;
60 }
61
62
63 void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
64 {
65 Ifx_IOM *module = driver->iomDriver->module;
66
67 if (driver->monInput == IfxIom_MonInputSignal_p)
68 {
69 module->FPCESR.U = 0x10001 << driver->monIndex;
70 }
71 }
72
73
74 void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
75 {
76 Ifx_IOM *module = driver->iomDriver->module;
77
78 if (driver->refInput == IfxIom_RefInputSignal_p)
79 {
80 module->FPCESR.U = 0x10001 << driver->refIndex;
81 }
82 }
83
84
85 uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
86 {
87 uint32 value;
88 value = driver->module->ECMSELR.U;
89 driver->module->ECMSELR.U = 0;
90 return value;
91 }
92
93
94 void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
95 {
96 IfxIom_Driver *iomDriver = driver->iomDriver;
97 Ifx_IOM *module = iomDriver->module;
98
99 /* Configure the ECM */
100 if (driver->systemEventTriggerThreshold == 1)
101 {
102 module->ECMSELR.U &= ~(1 << (driver->channel + IFX_IOM_ECMSELR_CES0_OFF));
103 }
104 else if (driver->systemEventTriggerThreshold >= 2)
105 {
106 module->ECMSELR.U &= ~(1 << (driver->accumulatedCounterIndex + IFX_IOM_ECMSELR_CTS0_OFF));
107 }
108 else
109 {
110 /* No event generated */
111 }
112 }
113
114
115 void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
116 {
117 IfxIom_Driver *iomDriver = driver->iomDriver;
118 Ifx_IOM *module = iomDriver->module;
119
120 /* Configure the ECM */
121 if (driver->systemEventTriggerThreshold == 1)
122 {
123 module->ECMSELR.U |= (1 << (driver->channel + IFX_IOM_ECMSELR_CES0_OFF));
124 }
125 else if (driver->systemEventTriggerThreshold >= 2)
126 {
127 module->ECMSELR.U |= (1 << (driver->accumulatedCounterIndex + IFX_IOM_ECMSELR_CTS0_OFF));
128 }
129 else
130 {
131 /* No event generated */
132 }
133 }
134
135
136 void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
137 {
138 Ifx_IOM *module = driver->module;
139 uint32 value;
140
141 value = module->ECMETH0.U;
142 *a = value & 0xFFFF;
143 *b = value >> 16;
144
145 value = module->ECMETH1.U;
146 *c = value & 0xFFFF;
147 *d = value >> 16;
148 }
149
150
151 boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
152 {
153 driver->module = config->module;
154 driver->accumulatedEventUsedMask = 0;
155 driver->lamUsedMask = 0;
156 return TRUE;
157 }
158
159
160 void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
161 {
162 config->module = module;
163 }
164
165
166 boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
167 {
168 boolean result = TRUE;
169 IfxIom_Driver *iomDriver = config->iomDriver;
170 Ifx_IOM *module = iomDriver->module;
171 float32 fiom;
172 fiom = IfxIom_getFrequency(module);
173
174 /* Check parameter ranges */
175 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->systemEventTriggerThreshold & (~IFX_IOM_ECMCCFG_THRC0_MSK)) == 0);
176
177 driver->accumulatedCounterIndex = -1;
178 driver->channel = config->channel;
179 driver->iomDriver = iomDriver;
180
181 if (iomDriver->lamUsedMask & (1 << driver->channel))
182 {
183 /* LAM already in use */
184 result = FALSE;
185 }
186 else
187 {
188 iomDriver->lamUsedMask |= 1 << driver->channel;
189
190 {
191 /* Configure reference input signal */
192 uint8 refIndex;
193 IfxIom_RefInputSignal refInput;
194
195 refIndex = IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(config->ref.input);
196 refInput = IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(config->ref.input);
197 driver->refIndex = refIndex;
198 driver->refInput = refInput;
199
200 module->FPCCTR[refIndex].B.ISR = refInput;
201
202 if (refInput == IfxIom_RefInputSignal_p)
203 {
204 if (config->ref.filter.mode == IfxIom_LamFilterMode_noFilter)
205 {
206 module->FPCCTR[refIndex].B.MOD = IfxIom_LamFilterMode_immediateDebounceBothEdge;
207 module->FPCCTR[refIndex].B.CMP = 0;
208 }
209 else if ((config->ref.filter.mode == IfxIom_LamFilterMode_prescalerOnFallingEdge)
210 ||
211 (config->ref.filter.mode == IfxIom_LamFilterMode_prescalerOnRisingEdge))
212 {
213 module->FPCCTR[refIndex].B.MOD = config->ref.filter.mode;
214 module->FPCCTR[refIndex].B.CMP = config->ref.filter.prescalerFactor - 1;
215 }
216 else
217 {
218 module->FPCCTR[refIndex].B.MOD = config->ref.filter.mode;
219 module->FPCCTR[refIndex].B.CMP = fiom * config->ref.filter.risingEdgeFilterTime;
220 module->FPCCTR[refIndex].B.RTG = config->ref.filter.clearTimerOnGlitch ? 1 : 0;
221 }
222 }
223 }
224
225 {
226 /* Configure monitor input signal */
227 uint8 monIndex;
228 IfxIom_MonInputSignal monInput;
229
230 monIndex = IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(config->mon.input);
231 monInput = IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(config->mon.input);
232 driver->monIndex = monIndex;
233 driver->monInput = monInput;
234
235 module->FPCCTR[monIndex].B.ISM = monInput;
236
237 if (monInput == IfxIom_MonInputSignal_p)
238 {
239 if (config->mon.filter.mode == IfxIom_LamFilterMode_noFilter)
240 {
241 module->FPCCTR[monIndex].B.MOD = IfxIom_LamFilterMode_immediateDebounceBothEdge;
242 module->FPCCTR[monIndex].B.CMP = 0;
243 }
244 else
245 {
246 module->FPCCTR[monIndex].B.MOD = config->mon.filter.mode;
247 module->FPCCTR[monIndex].B.CMP = fiom * config->mon.filter.risingEdgeFilterTime;
248 module->FPCCTR[monIndex].B.RTG = config->mon.filter.clearTimerOnGlitch ? 1 : 0;
249 }
250 }
251 }
252
253 {
254 /* Configure the LAM */
255 module->LAMCFG[driver->channel].B.IVR = config->ref.inverted ? 1 : 0;
256 module->LAMCFG[driver->channel].B.IVM = config->mon.inverted ? 1 : 0;
257 module->LAMCFG[driver->channel].B.MOS = config->event.source == IfxIom_LamEventSource_mon ? 0 : 1;
258 module->LAMCFG[driver->channel].B.RMS = config->eventWindow.run;
259 module->LAMCFG[driver->channel].B.EWS = config->eventWindow.controlSource;
260 module->LAMCFG[driver->channel].B.EDS =
261 ((config->eventWindow.clearEvent) << 0)
262 | ((config->event.trigger) << 2)
263 ;
264 module->LAMCFG[driver->channel].B.IVW = config->eventWindow.inverted ? 1 : 0;
265 module->LAMCFG[driver->channel].B.MCS = IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(config->mon.input);
266 module->LAMCFG[driver->channel].B.RCS = IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(config->ref.input);
267
268 module->LAMEWS[driver->channel].B.THR = fiom * config->eventWindow.threshold;
269 }
270
271 {
272 /* Configure the ECM */
273 driver->systemEventTriggerThreshold = config->systemEventTriggerThreshold;
274
275 if (driver->systemEventTriggerThreshold == 1)
276 {
277 module->ECMSELR.U |= 1 << (config->channel + IFX_IOM_ECMSELR_CES0_OFF);
278 }
279 else if (driver->systemEventTriggerThreshold >= 2)
280 {
281 /* Look for a free counter */
282 sint8 index;
283 uint8 accumulatedEventUsedMask = iomDriver->accumulatedEventUsedMask;
284 boolean success = FALSE;
285
286 for (index = 0; index < 4; index++)
287 {
288 if ((accumulatedEventUsedMask & (1 << index)) == 0)
289 {
290 success = TRUE;
291 iomDriver->accumulatedEventUsedMask |= 1 << index;
292 driver->accumulatedCounterIndex = index;
293 module->ECMSELR.U |= 1 << (index + IFX_IOM_ECMSELR_CTS0_OFF);
294
295 module->ECMCCFG.U |= (
296 (driver->channel << IFX_IOM_ECMCCFG_SELC0_OFF)
297 | (driver->systemEventTriggerThreshold << IFX_IOM_ECMCCFG_THRC0_OFF)
298 ) << (index * IFX_IOM_ECMCCFG_SELC1_OFF);
299 break;
300 }
301 }
302
303 result &= success;
304 }
305 else
306 {
307 /* No event generated */
308 }
309 }
310 }
311
312 return result;
313 }
314
315
316 void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
317 {
318 config->iomDriver = driver;
319 config->channel = IfxIom_LamId_0;
320 config->event.source = IfxIom_LamEventSource_mon;
321 config->event.trigger = IfxIom_LamEventTrigger_none;
322 config->eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
323 config->eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
324 config->eventWindow.inverted = FALSE;
325 config->eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
326 config->eventWindow.threshold = 0.0;
327 config->mon.filter.clearTimerOnGlitch = FALSE;
328 config->mon.filter.fallingEdgeFilterTime = 0.0;
329 config->mon.filter.mode = IfxIom_LamFilterMode_noFilter;
330 config->mon.filter.prescalerFactor = 1;
331 config->mon.filter.risingEdgeFilterTime = 0.0;
332 config->mon.input = IfxIom_MonInput_p33_0;
333 config->mon.inverted = FALSE;
334 config->ref.filter.clearTimerOnGlitch = FALSE;
335 config->ref.filter.fallingEdgeFilterTime = 0.0;
336 config->ref.filter.mode = IfxIom_LamFilterMode_noFilter;
337 config->ref.filter.prescalerFactor = 1;
338 config->ref.filter.risingEdgeFilterTime = 0.0;
339 config->ref.input = IfxIom_RefInput_p33_0;
340 config->ref.inverted = FALSE;
341 config->systemEventTriggerThreshold = 1;
342 }
343
344
345 void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
346 {
347 Ifx_IOM *module = driver->iomDriver->module;
348
349 if (driver->monInput == IfxIom_MonInputSignal_p)
350 {
351 uint32 index;
352 index = driver->monIndex;
353 *risingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_REG0_OFF)) != 0;
354 *fallingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_FEG0_OFF)) != 0;
355 }
356 else
357 {
358 *risingEdgeGlitch = FALSE;
359 *fallingEdgeGlitch = FALSE;
360 }
361 }
362
363
364 void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
365 {
366 Ifx_IOM *module = driver->iomDriver->module;
367
368 if (driver->refInput == IfxIom_RefInputSignal_p)
369 {
370 uint32 index;
371 index = driver->refIndex;
372 *risingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_REG0_OFF)) != 0;
373 *fallingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_FEG0_OFF)) != 0;
374 }
375 else
376 {
377 *risingEdgeGlitch = FALSE;
378 *fallingEdgeGlitch = FALSE;
379 }
380 }
381
382
383 void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
384 {
385 driver->module->ECMSELR.U = mask;
386 }
IfxIom_Driver_init
boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam()
Definition: IfxIom_Driver.c:151
IfxIom_LamFilterMode_immediateDebounceBothEdge
Immediate Debounce Filter Mode on both edges.
Definition: IfxIom.h:107
IfxIom_Driver_LamConfig
IOM LAM configuration.
Definition: IfxIom_Driver.h:191
IfxIom_Driver::module
Ifx_IOM * module
Pointer to IOM module SFR set.
Definition: IfxIom_Driver.h:122
IfxIom_Driver_Lam::refIndex
uint8 refIndex
Reference input index.
Definition: IfxIom_Driver.h:182
IfxIom_LamId_0
Specifies the LAM Id0.
Definition: IfxIom.h:121
IfxIom_Driver_Lam::accumulatedCounterIndex
sint8 accumulatedCounterIndex
Accumulated counter used. Negative value means no counter used.
Definition: IfxIom_Driver.h:185
IfxIom_Driver_LamFilterConfig::clearTimerOnGlitch
boolean clearTimerOnGlitch
If set, the timer is cleared on glitch, else it is decremented.
Definition: IfxIom_Driver.h:107
IfxIom_Driver_LamFilterConfig::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this cor...
Definition: IfxIom_Driver.h:111
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxIom_RefInput_p33_0
Definition: IfxIom_cfg.h:156
IfxIom_Driver_Config
IOM Driver Configuration.
Definition: IfxIom_Driver.h:170
IfxIom_Driver_Lam::systemEventTriggerThreshold
uint8 systemEventTriggerThreshold
Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event...
Definition: IfxIom_Driver.h:186
IfxIom_Driver_LamEventWindowConfig::controlSource
IfxIom_LamEventWindowControlSource controlSource
Timer control source.
Definition: IfxIom_Driver.h:140
IfxIom_Driver_disableEvents
uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
Disable all event generation.
Definition: IfxIom_Driver.c:85
IfxIom_Driver_LamConfig::mon
IfxIom_Driver_LamMonConfig mon
LAM Monitor input configuration.
Definition: IfxIom_Driver.h:197
IfxIom_Driver_LamRefConfig::input
IfxIom_RefInput input
Reference input.
Definition: IfxIom_Driver.h:160
IfxIom_Driver_clearAllGlitch
void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags.
Definition: IfxIom_Driver.c:49
IfxIom_Driver_clearHistory
void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
Clear the IOM event history.
Definition: IfxIom_Driver.c:56
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxIom_Driver_LamRefConfig::inverted
boolean inverted
If TRUE, the signal is inverted.
Definition: IfxIom_Driver.h:161
float32
float float32
Definition: Platform_Types.h:167
Ifx_Assert.h
Assert functions.
IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX
#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput)
Definition: IfxIom_Driver.c:43
IfxIom_LamEventWindowControlSource_ref
Event window generation is determined from the reference signal.
Definition: IfxIom.h:88
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:69
IfxIom_Driver_LamConfig::event
IfxIom_Driver_LamEventConfig event
LAM event configuration.
Definition: IfxIom_Driver.h:195
IfxIom_Driver_Lam::channel
IfxIom_LamId channel
LAM Channel.
Definition: IfxIom_Driver.h:180
IfxIom_Driver_LamEventWindowConfig::clearEvent
IfxIom_LamEventWindowClearEvent clearEvent
Timer clear event.
Definition: IfxIom_Driver.h:139
IfxIom_Driver_isLamMonGlitch
void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags.
Definition: IfxIom_Driver.c:345
IfxIom_Driver.h
IOM DRIVER details.
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxIom_Driver_clearLamMonGlitch
void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag.
Definition: IfxIom_Driver.c:63
IfxIom_Driver_LamEventConfig::trigger
IfxIom_LamEventTrigger trigger
Event trigger.
Definition: IfxIom_Driver.h:132
IfxIom_Driver_LamFilterConfig::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this co...
Definition: IfxIom_Driver.h:108
IfxIom_Driver_disableLamEvent
void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM.
Definition: IfxIom_Driver.c:94
IfxIom_Driver_initConfig
void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration.
Definition: IfxIom_Driver.c:160
IfxIom_Driver_isLamRefGlitch
void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags.
Definition: IfxIom_Driver.c:364
IfxIom_Driver_LamRefConfig::filter
IfxIom_Driver_LamFilterConfig filter
Filter configuration.
Definition: IfxIom_Driver.h:159
IfxIom_getFrequency
float32 IfxIom_getFrequency(Ifx_IOM *iom)
Return the frequency used for the filter and timers clock.
Definition: IfxIom.c:36
IfxIom_LamEventWindowClearEvent_anyEdge
Either edge used to clear event windowcounter.
Definition: IfxIom.h:80
IfxIom_Driver_enableLamEvent
void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM.
Definition: IfxIom_Driver.c:115
IfxIom_MonInput_p33_0
Value=0xXXYY where XX=ISM, YY=k.
Definition: IfxIom_cfg.h:86
IfxIom_Driver
IOM driver.
Definition: IfxIom_Driver.h:120
IfxIom_LamFilterMode_noFilter
No filter (value used for software only )
Definition: IfxIom.h:114
IfxIom_Driver_getHistory
void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...
Definition: IfxIom_Driver.c:136
IfxIom_Driver::lamUsedMask
uint16 lamUsedMask
Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:124
IfxIom_Driver_LamEventConfig::source
IfxIom_LamEventSource source
Event source.
Definition: IfxIom_Driver.h:131
IfxIom_RefInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:71
IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL
#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput)
Definition: IfxIom_Driver.c:39
IfxIom_Driver_LamConfig::eventWindow
IfxIom_Driver_LamEventWindowConfig eventWindow
LAM eventWindow configuration.
Definition: IfxIom_Driver.h:196
IfxIom_Driver_LamEventWindowConfig::run
IfxIom_LamEventWindowRunControl run
Timer run control.
Definition: IfxIom_Driver.h:142
IfxIom_Driver_LamConfig::ref
IfxIom_Driver_LamRefConfig ref
LAM reference input configuration.
Definition: IfxIom_Driver.h:198
IfxIom_Driver_clearLamRefGlitch
void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag.
Definition: IfxIom_Driver.c:74
IfxIom_LamEventTrigger_none
Neither edge used to gate event generation.
Definition: IfxIom.h:66
IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL
#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput)
Definition: IfxIom_Driver.c:37
IfxIom_Driver_initLamConfig
void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration.
Definition: IfxIom_Driver.c:316
IfxIom_Driver_restoreEvents
void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask.
Definition: IfxIom_Driver.c:383
IfxIom_Driver::accumulatedEventUsedMask
uint8 accumulatedEventUsedMask
Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:123
IfxIom_LamEventWindowRunControl_freeRunning
Event window generation is free-running.
Definition: IfxIom.h:97
IfxIom_Driver_LamFilterConfig::prescalerFactor
uint32 prescalerFactor
Prescaler factor, must be > 0, only valid for prescaler mode.
Definition: IfxIom_Driver.h:110
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxIom_Driver_initLam
boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel.
Definition: IfxIom_Driver.c:166
IfxIom_Driver_LamMonConfig::input
IfxIom_MonInput input
Monitor input.
Definition: IfxIom_Driver.h:151
IfxIom_Driver_Lam::refInput
IfxIom_RefInputSignal refInput
Reference input.
Definition: IfxIom_Driver.h:183
IfxIom_Driver_LamEventWindowConfig::threshold
float32 threshold
Event window threshold in second. If 0, no event are generated.
Definition: IfxIom_Driver.h:143
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxIom_LamFilterMode_prescalerOnFallingEdge
Prescaler Mode (triggered on falling edge)
Definition: IfxIom.h:113
IfxIom_LamEventSource_mon
Monitor signal is sourced directly from FPCmch.
Definition: IfxIom.h:57
IfxIom_MonInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:61
IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX
#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput)
Definition: IfxIom_Driver.c:41
IfxIom_LamFilterMode_prescalerOnRisingEdge
Prescaler Mode (triggered on rising edge)
Definition: IfxIom.h:112
IfxIom_Driver_LamFilterConfig::mode
IfxIom_LamFilterMode mode
Filter mode.
Definition: IfxIom_Driver.h:109
TRUE
#define TRUE
Definition: Platform_Types.h:87
uint8
unsigned char uint8
Definition: Platform_Types.h:105
sint8
signed char sint8
Definition: Platform_Types.h:122
IfxIom_Driver_Lam
IOM LAM object.
Definition: IfxIom_Driver.h:177
IfxIom_Driver_Lam::iomDriver
IfxIom_Driver * iomDriver
Main IOM Driver.
Definition: IfxIom_Driver.h:179
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:59
IfxIom_Driver_Lam::monIndex
uint8 monIndex
Monitor input index.
Definition: IfxIom_Driver.h:181
IfxIom_Driver_Lam::monInput
IfxIom_MonInputSignal monInput
Monitor input.
Definition: IfxIom_Driver.h:184


iLLD_TC26B: IfxIom_Driver.h Source File

  • Iom
  • Driver
IfxIom_Driver.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom_Driver.h
3 * \brief IOM DRIVER details
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * The IOM driver enable easy usage of the IOM module, by abstracting the internal module structure.
25 * For it's configuration it requires the LAM channel to be used together with the reference and monitor signal. The muxes and filters
26 * are configured accordingly. The driver handles the event combiner "accumulated event timer" resources base on the single or multi-event
27 * configuration making use of the next free timer if required.
28 *
29 * Double resource usage (LAM channel, accumulated event timers) is checked and reported at driver initialization .
30 *
31 * The driver care for the timing and clock conversion, all timing configuration are to be given in second.
32 *
33 * Example of use:
34 * - Initialization of the Iom
35 * - Initialization of LAM channel 0 with:
36 * - IOM monitor input: External pin P20.13, delay debounce filter both edge 0.5us, signal inverted,
37 * - IOM reference: GTM TOUT14, no filter, not inverted
38 * - Event window controlled by ref signal, with a free running timer and cleared on any edge of the reference signal, threshold set to 1us
39 * - Event source is XOR of monitor and reference signal, event is triggered on falling edge of the XOR
40 * - An alarm signal is generated if the monitor signal is not within the threshold, after two events.
41 *
42 *
43 * \code
44 * void InitLam(IfxIom_Driver *driver, IfxIom_Driver *lam){
45 * IfxIom_Driver_Config configDriver;
46 * IfxIom_Driver_LamConfig configLam;
47 *
48 * IfxIom_Driver_initConfig(&configDriver, &MODULE_IOM);
49 * IfxIom_Driver_init(driver, &configDriver);
50 *
51 * IfxIom_Driver_initLamConfig(&configLam, driver);
52 *
53 * configLam.channel = IfxIom_LamId_0;
54 *
55 * configLam.mon.input = IfxIom_MonInput_p20_13;
56 * configLam.mon.filter.mode = IfxIom_LamFilterMode_delayDebounceBothEdge;
57 * configLam.mon.filter.clearTimerOnGlitch = FALSE;
58 * configLam.mon.filter.fallingEdgeFilterTime = 0.5e-6;
59 * configLam.mon.filter.risingEdgeFilterTime = configLam.ref.filter.fallingEdgeFilterTime;
60 * configLam.mon.inverted = TRUE;
61 *
62 * configLam.ref.input= IfxIom_RefInput_gtmTout14;
63 * configLam.ref.filter.mode = IfxIom_LamFilterMode_noFilter;
64 * configLam.ref.inverted = FALSE;
65 *
66 * configLam.eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
67 * configLam.eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
68 * configLam.eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
69 * configLam.eventWindow.threshold = 1e-6;
70 * configLam.event.source = IfxIom_LamEventSource_monXorRef;
71 * configLam.event.trigger = IfxIom_LamEventTrigger_fallingEdge;
72 *
73 * configLam.systemEventTriggerThreshold = 2;
74 *
75 * IfxIom_Driver_initLam(lam, &configLam);
76 *
77 * }
78 * \endcode
79 *
80 * \defgroup IfxLld_Iom_Driver IOM Driver
81 * \ingroup IfxLld_Iom
82 * \defgroup IfxLld_Iom_Driver_func Driver Functions
83 * \ingroup IfxLld_Iom_Driver
84 * \defgroup IfxLld_Iom_Driver_struct Structures
85 * \ingroup IfxLld_Iom_Driver
86 */
87
88 #ifndef IFXIOM_DRIVER_H
89 #define IFXIOM_DRIVER_H 1
90
91 /******************************************************************************/
92 /*----------------------------------Includes----------------------------------*/
93 /******************************************************************************/
94
95 #include "Iom/Std/IfxIom.h"
96
97 /******************************************************************************/
98 /*-----------------------------Data Structures--------------------------------*/
99 /******************************************************************************/
100
101 /** \addtogroup IfxLld_Iom_Driver_struct
102 * \{ */
103 /** \brief IOM LAM filter configuration
104 */
105 typedef struct
106 {
107 boolean clearTimerOnGlitch; /**< \brief If set, the timer is cleared on glitch, else it is decremented */
108 float32 fallingEdgeFilterTime; /**< \brief Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time. */
109 IfxIom_LamFilterMode mode; /**< \brief Filter mode */
110 uint32 prescalerFactor; /**< \brief Prescaler factor, must be > 0, only valid for prescaler mode */
111 float32 risingEdgeFilterTime; /**< \brief Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time. */
112 } IfxIom_Driver_LamFilterConfig;
113
114 /** \} */
115
116 /** \addtogroup IfxLld_Iom_Driver_struct
117 * \{ */
118 /** \brief IOM driver
119 */
120 typedef struct
121 {
122 Ifx_IOM *module; /**< \brief Pointer to IOM module SFR set */
123 uint8 accumulatedEventUsedMask; /**< \brief Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used */
124 uint16 lamUsedMask; /**< \brief Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used */
125 } IfxIom_Driver;
126
127 /** \brief IOM LAM event configuration
128 */
129 typedef struct
130 {
131 IfxIom_LamEventSource source; /**< \brief Event source */
132 IfxIom_LamEventTrigger trigger; /**< \brief Event trigger */
133 } IfxIom_Driver_LamEventConfig;
134
135 /** \brief IOM LAM event window configuration
136 */
137 typedef struct
138 {
139 IfxIom_LamEventWindowClearEvent clearEvent; /**< \brief Timer clear event */
140 IfxIom_LamEventWindowControlSource controlSource; /**< \brief Timer control source */
141 boolean inverted; /**< \brief If TRUE, the event window is inverted */
142 IfxIom_LamEventWindowRunControl run; /**< \brief Timer run control */
143 float32 threshold; /**< \brief Event window threshold in second. If 0, no event are generated */
144 } IfxIom_Driver_LamEventWindowConfig;
145
146 /** \brief IOM LAM monitor input configuration
147 */
148 typedef struct
149 {
150 IfxIom_Driver_LamFilterConfig filter; /**< \brief Filter configuration */
151 IfxIom_MonInput input; /**< \brief Monitor input */
152 boolean inverted; /**< \brief If TRUE, the signal is inverted */
153 } IfxIom_Driver_LamMonConfig;
154
155 /** \brief IOM LAM reference input configuration
156 */
157 typedef struct
158 {
159 IfxIom_Driver_LamFilterConfig filter; /**< \brief Filter configuration */
160 IfxIom_RefInput input; /**< \brief Reference input */
161 boolean inverted; /**< \brief If TRUE, the signal is inverted */
162 } IfxIom_Driver_LamRefConfig;
163
164 /** \} */
165
166 /** \addtogroup IfxLld_Iom_Driver_struct
167 * \{ */
168 /** \brief IOM Driver Configuration
169 */
170 typedef struct
171 {
172 Ifx_IOM *module; /**< \brief IOM module SFRs */
173 } IfxIom_Driver_Config;
174
175 /** \brief IOM LAM object
176 */
177 typedef struct
178 {
179 IfxIom_Driver *iomDriver; /**< \brief Main IOM Driver */
180 IfxIom_LamId channel; /**< \brief LAM Channel */
181 uint8 monIndex; /**< \brief Monitor input index */
182 uint8 refIndex; /**< \brief Reference input index */
183 IfxIom_RefInputSignal refInput; /**< \brief Reference input */
184 IfxIom_MonInputSignal monInput; /**< \brief Monitor input */
185 sint8 accumulatedCounterIndex; /**< \brief Accumulated counter used. Negative value means no counter used */
186 uint8 systemEventTriggerThreshold; /**< \brief Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM. */
187 } IfxIom_Driver_Lam;
188
189 /** \brief IOM LAM configuration
190 */
191 typedef struct
192 {
193 IfxIom_Driver *iomDriver; /**< \brief Pointer to the IOM driver */
194 IfxIom_LamId channel; /**< \brief LAM channel to be used */
195 IfxIom_Driver_LamEventConfig event; /**< \brief LAM event configuration */
196 IfxIom_Driver_LamEventWindowConfig eventWindow; /**< \brief LAM eventWindow configuration */
197 IfxIom_Driver_LamMonConfig mon; /**< \brief LAM Monitor input configuration */
198 IfxIom_Driver_LamRefConfig ref; /**< \brief LAM reference input configuration */
199 uint8 systemEventTriggerThreshold; /**< \brief Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM. */
200 } IfxIom_Driver_LamConfig;
201
202 /** \} */
203
204 /** \addtogroup IfxLld_Iom_Driver_func
205 * \{ */
206
207 /******************************************************************************/
208 /*-------------------------Global Function Prototypes-------------------------*/
209 /******************************************************************************/
210
211 /** \brief Clear all LAM monitor and reference glitch flags
212 * \param driver Pointer to the IOM driver object
213 * \return None
214 */
215 IFX_EXTERN void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver);
216
217 /** \brief Clear the IOM event history
218 * \param driver Pointer to the IOM driver object
219 * \return None
220 */
221 IFX_EXTERN void IfxIom_Driver_clearHistory(IfxIom_Driver *driver);
222
223 /** \brief Clear the LAM monitor signal glitch flag
224 * \param driver Pointer to the LAM driver object
225 * \return None
226 */
227 IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver);
228
229 /** \brief Clear the LAM reference signal glitch flag
230 * \param driver Pointer to the LAM driver object
231 * \return None
232 */
233 IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver);
234
235 /** \brief Disable all event generation
236 * \param driver Pointer to the IOM driver object
237 * \return Return the configured events
238 */
239 IFX_EXTERN uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver);
240
241 /** \brief Disable the event generation for the LAM
242 * \param driver Pointer to the LAM driver object
243 * \return None
244 */
245 IFX_EXTERN void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver);
246
247 /** \brief Enable the event genration for the LAM
248 * \param driver Pointer to the LAM driver object
249 * \return None
250 */
251 IFX_EXTERN void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver);
252
253 /** \brief Return the IOM event history.
254 * In returned mask value, bit0= LAM0, bit1=LAM1, ...
255 * \param driver Pointer to the IOM driver object
256 * \param a Event mask of history level 0 (Last event)
257 * \param b Event mask of history level 1
258 * \param c Event mask of history level 2
259 * \param d Event mask of history level 3 (oldest event)
260 * \return None
261 */
262 IFX_EXTERN void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d);
263
264 /** \brief Initialize the IOM
265 * Must be called before IfxIom_Driver_initLam()
266 * \param driver Pointer to the IOM driver object. Will be initialized by the function
267 * \param config IOM driver configuration
268 * \return TRUE in case of success else FALSE
269 */
270 IFX_EXTERN boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config);
271
272 /** \brief Set the IOM default configuration
273 * \param config IOM configuration. Will be initialized by the function
274 * \param module Pointer to the IOM module
275 * \return None
276 */
277 IFX_EXTERN void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module);
278
279 /** \brief Initialize the LAM channel
280 * \param driver Pointer to the LAM driver object. Will be initialized by the function
281 * \param config LAM driver configuration
282 * \return TRUE in case of success else FALSE
283 */
284 IFX_EXTERN boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config);
285
286 /** \brief Set the LAM default configuration
287 * \param config LAM configuration. Will be initialized by the function
288 * \param driver Pointer to the IOM driver object
289 * \return None
290 */
291 IFX_EXTERN void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver);
292
293 /** \brief Return the LAM monitor glitch flags
294 * \param driver Pointer to the LAM driver object
295 * \param risingEdgeGlitch Set to TRUE by the function if rising edge glitch were detected on the monitor signal
296 * \param fallingEdgeGlitch Set to TRUE by the function if falling edge glitch were detected on the monitor signal
297 * \return None
298 */
299 IFX_EXTERN void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch);
300
301 /** \brief Return the LAM reference glitch flags
302 * \param driver Pointer to the LAM driver object
303 * \param risingEdgeGlitch Set to TRUE by the function if rising edge glitch were detected on the reference signal
304 * \param fallingEdgeGlitch Set to TRUE by the function if falling edge glitch were detected on the reference signal
305 * \return None
306 */
307 IFX_EXTERN void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch);
308
309 /** \brief Restore the IOM event mask
310 * \param driver Pointer to the IOM driver object
311 * \param mask Event configuration as returned by IfxIom_Driver_disableEvents()
312 * \return None
313 */
314 IFX_EXTERN void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask);
315
316 /** \} */
317
318 #endif /* IFXIOM_DRIVER_H */
IfxIom_Driver_init
IFX_EXTERN boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
Initialize the IOM Must be called before IfxIom_Driver_initLam()
Definition: IfxIom_Driver.c:151
IfxIom_Driver_LamConfig
IOM LAM configuration.
Definition: IfxIom_Driver.h:191
IfxIom_Driver::module
Ifx_IOM * module
Pointer to IOM module SFR set.
Definition: IfxIom_Driver.h:122
IfxIom_Driver_Lam::refIndex
uint8 refIndex
Reference input index.
Definition: IfxIom_Driver.h:182
IfxIom_LamFilterMode
IfxIom_LamFilterMode
FPC filer mode IOM_FPCCTRk.MOD, with additional definition for noFilter.
Definition: IfxIom.h:104
IfxIom_Driver_Lam::accumulatedCounterIndex
sint8 accumulatedCounterIndex
Accumulated counter used. Negative value means no counter used.
Definition: IfxIom_Driver.h:185
IfxIom_Driver_LamEventWindowConfig
IOM LAM event window configuration.
Definition: IfxIom_Driver.h:137
IfxIom_Driver_LamFilterConfig::clearTimerOnGlitch
boolean clearTimerOnGlitch
If set, the timer is cleared on glitch, else it is decremented.
Definition: IfxIom_Driver.h:107
IfxIom_Driver_LamFilterConfig::risingEdgeFilterTime
float32 risingEdgeFilterTime
Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this cor...
Definition: IfxIom_Driver.h:111
IfxIom_Driver_LamMonConfig
IOM LAM monitor input configuration.
Definition: IfxIom_Driver.h:148
IfxIom_Driver_Config
IOM Driver Configuration.
Definition: IfxIom_Driver.h:170
IfxIom_Driver_Lam::systemEventTriggerThreshold
uint8 systemEventTriggerThreshold
Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event...
Definition: IfxIom_Driver.h:186
IfxIom_Driver_LamEventWindowConfig::controlSource
IfxIom_LamEventWindowControlSource controlSource
Timer control source.
Definition: IfxIom_Driver.h:140
IfxIom_Driver_disableEvents
IFX_EXTERN uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
Disable all event generation.
Definition: IfxIom_Driver.c:85
IfxIom_Driver_LamConfig::mon
IfxIom_Driver_LamMonConfig mon
LAM Monitor input configuration.
Definition: IfxIom_Driver.h:197
IfxIom_Driver_LamRefConfig::input
IfxIom_RefInput input
Reference input.
Definition: IfxIom_Driver.h:160
IfxIom_Driver_clearAllGlitch
IFX_EXTERN void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
Clear all LAM monitor and reference glitch flags.
Definition: IfxIom_Driver.c:49
IfxIom.h
IOM basic functionality.
IfxIom_Driver_clearHistory
IFX_EXTERN void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
Clear the IOM event history.
Definition: IfxIom_Driver.c:56
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxIom_Driver_LamEventWindowConfig::inverted
boolean inverted
If TRUE, the event window is inverted.
Definition: IfxIom_Driver.h:141
float32
float float32
Definition: Platform_Types.h:167
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:69
IfxIom_Driver_LamConfig::event
IfxIom_Driver_LamEventConfig event
LAM event configuration.
Definition: IfxIom_Driver.h:195
IfxIom_Driver_Lam::channel
IfxIom_LamId channel
LAM Channel.
Definition: IfxIom_Driver.h:180
IfxIom_LamEventWindowControlSource
IfxIom_LamEventWindowControlSource
Timer control source configuration IOM_LAMCFGm.EWS.
Definition: IfxIom.h:86
IfxIom_Driver_LamEventWindowConfig::clearEvent
IfxIom_LamEventWindowClearEvent clearEvent
Timer clear event.
Definition: IfxIom_Driver.h:139
IfxIom_Driver_LamRefConfig
IOM LAM reference input configuration.
Definition: IfxIom_Driver.h:157
IfxIom_Driver_isLamMonGlitch
IFX_EXTERN void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM monitor glitch flags.
Definition: IfxIom_Driver.c:345
IfxIom_LamEventWindowRunControl
IfxIom_LamEventWindowRunControl
Timer run configuration IOM_LAMCFGm.RMS.
Definition: IfxIom.h:95
IfxIom_Driver_clearLamMonGlitch
IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM monitor signal glitch flag.
Definition: IfxIom_Driver.c:63
IfxIom_Driver_LamEventConfig::trigger
IfxIom_LamEventTrigger trigger
Event trigger.
Definition: IfxIom_Driver.h:132
IfxIom_Driver_LamFilterConfig::fallingEdgeFilterTime
float32 fallingEdgeFilterTime
Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this co...
Definition: IfxIom_Driver.h:108
IfxIom_Driver_disableLamEvent
IFX_EXTERN void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
Disable the event generation for the LAM.
Definition: IfxIom_Driver.c:94
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxIom_Driver_initConfig
IFX_EXTERN void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
Set the IOM default configuration.
Definition: IfxIom_Driver.c:160
IfxIom_Driver_isLamRefGlitch
IFX_EXTERN void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
Return the LAM reference glitch flags.
Definition: IfxIom_Driver.c:364
IfxIom_Driver_LamMonConfig::filter
IfxIom_Driver_LamFilterConfig filter
Filter configuration.
Definition: IfxIom_Driver.h:150
IfxIom_LamEventSource
IfxIom_LamEventSource
Event source configuration IOM_LAMCFGm.MOS.
Definition: IfxIom.h:55
IfxIom_Driver_enableLamEvent
IFX_EXTERN void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
Enable the event genration for the LAM.
Definition: IfxIom_Driver.c:115
IfxIom_Driver
IOM driver.
Definition: IfxIom_Driver.h:120
IfxIom_Driver_getHistory
IFX_EXTERN void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
Return the IOM event history. In returned mask value, bit0= LAM0, bit1=LAM1, ...
Definition: IfxIom_Driver.c:136
IfxIom_Driver::lamUsedMask
uint16 lamUsedMask
Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:124
IfxIom_Driver_LamEventConfig::source
IfxIom_LamEventSource source
Event source.
Definition: IfxIom_Driver.h:131
IfxIom_LamEventTrigger
IfxIom_LamEventTrigger
Event trigger configuration IOM_LAMCFGm.EDS upper two bits.
Definition: IfxIom.h:64
IfxIom_Driver_LamConfig::eventWindow
IfxIom_Driver_LamEventWindowConfig eventWindow
LAM eventWindow configuration.
Definition: IfxIom_Driver.h:196
IfxIom_Driver_LamEventWindowConfig::run
IfxIom_LamEventWindowRunControl run
Timer run control.
Definition: IfxIom_Driver.h:142
IfxIom_Driver_LamConfig::ref
IfxIom_Driver_LamRefConfig ref
LAM reference input configuration.
Definition: IfxIom_Driver.h:198
IfxIom_Driver_clearLamRefGlitch
IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
Clear the LAM reference signal glitch flag.
Definition: IfxIom_Driver.c:74
IfxIom_Driver_initLamConfig
IFX_EXTERN void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
Set the LAM default configuration.
Definition: IfxIom_Driver.c:316
IfxIom_Driver_restoreEvents
IFX_EXTERN void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
Restore the IOM event mask.
Definition: IfxIom_Driver.c:383
IfxIom_LamId
IfxIom_LamId
Specifies the Logic Module Analyser Module Number.
Definition: IfxIom.h:119
IfxIom_Driver::accumulatedEventUsedMask
uint8 accumulatedEventUsedMask
Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used.
Definition: IfxIom_Driver.h:123
IfxIom_Driver_LamFilterConfig::prescalerFactor
uint32 prescalerFactor
Prescaler factor, must be > 0, only valid for prescaler mode.
Definition: IfxIom_Driver.h:110
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxIom_Driver_LamEventConfig
IOM LAM event configuration.
Definition: IfxIom_Driver.h:129
IfxIom_Driver_LamFilterConfig
IOM LAM filter configuration.
Definition: IfxIom_Driver.h:105
IfxIom_Driver_initLam
IFX_EXTERN boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
Initialize the LAM channel.
Definition: IfxIom_Driver.c:166
IfxIom_Driver_LamMonConfig::input
IfxIom_MonInput input
Monitor input.
Definition: IfxIom_Driver.h:151
IfxIom_Driver_Lam::refInput
IfxIom_RefInputSignal refInput
Reference input.
Definition: IfxIom_Driver.h:183
IfxIom_RefInput
IfxIom_RefInput
LAM ref inputs.
Definition: IfxIom_cfg.h:154
IfxIom_Driver_LamEventWindowConfig::threshold
float32 threshold
Event window threshold in second. If 0, no event are generated.
Definition: IfxIom_Driver.h:143
IfxIom_LamEventWindowClearEvent
IfxIom_LamEventWindowClearEvent
Timer clear event configuration IOM_LAMCFGm.EDS upper lower bits.
Definition: IfxIom.h:75
IfxIom_MonInput
IfxIom_MonInput
LAM mon inputs.
Definition: IfxIom_cfg.h:84
IfxIom_Driver_LamFilterConfig::mode
IfxIom_LamFilterMode mode
Filter mode.
Definition: IfxIom_Driver.h:109
uint8
unsigned char uint8
Definition: Platform_Types.h:105
sint8
signed char sint8
Definition: Platform_Types.h:122
IfxIom_Driver_Lam
IOM LAM object.
Definition: IfxIom_Driver.h:177
IfxIom_Driver_Lam::iomDriver
IfxIom_Driver * iomDriver
Main IOM Driver.
Definition: IfxIom_Driver.h:179
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:59
IfxIom_Driver_Lam::monIndex
uint8 monIndex
Monitor input index.
Definition: IfxIom_Driver.h:181
IfxIom_Driver_Lam::monInput
IfxIom_MonInputSignal monInput
Monitor input.
Definition: IfxIom_Driver.h:184


iLLD_TC26B: IfxIom_cfg.h Source File

  • _Impl
IfxIom_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxIom_cfg.h
3 * \brief IOM on-chip implementation data
4 * \ingroup IfxLld_Iom
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Iom IOM
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Iom_Impl Implementation
27 * \ingroup IfxLld_Iom
28 * \defgroup IfxLld_Iom_Std Standard Driver
29 * \ingroup IfxLld_Iom
30 * \defgroup IfxLld_Iom_Impl_Enum Enum input signals
31 * \ingroup IfxLld_Iom_Impl
32 * \defgroup IfxLld_Iom_Impl_Enumeration Enumeration inputs
33 * \ingroup IfxLld_Iom_Impl
34 */
35
36 #ifndef IFXIOM_CFG_H
37 #define IFXIOM_CFG_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 /******************************************************************************/
44 /*-----------------------------------Macros-----------------------------------*/
45 /******************************************************************************/
46
47 /** \brief Specifies maximum number of channels
48 */
49 #define IFXIOM_NUM_CHANNELS 16
50
51 /******************************************************************************/
52 /*--------------------------------Enumerations--------------------------------*/
53 /******************************************************************************/
54
55 /** \addtogroup IfxLld_Iom_Impl_Enum
56 * \{ */
57 /** \brief IOM_FPCCTRk.ISM
58 */
59 typedef enum
60 {
61 IfxIom_MonInputSignal_p = 0, /**< \brief Signal input Pn_IN (from portlogic) selected */
62 IfxIom_MonInputSignal_0 = 1, /**< \brief Monitor Signal Input 0 selected */
63 IfxIom_MonInputSignal_1 = 2, /**< \brief Monitor Signal Input 1 selected */
64 IfxIom_MonInputSignal_2 = 3 /**< \brief Monitor Signal Input 2 selected */
65 } IfxIom_MonInputSignal;
66
67 /** \brief IOM_FPCCTRk.ISR
68 */
69 typedef enum
70 {
71 IfxIom_RefInputSignal_p = 0, /**< \brief Signal input Pn_IN (from portlogic) selected */
72 IfxIom_RefInputSignal_0 = 1, /**< \brief Monitor Signal Input 0 selected */
73 IfxIom_RefInputSignal_1 = 2, /**< \brief Monitor Signal Input 1 selected */
74 IfxIom_RefInputSignal_2 = 3, /**< \brief Monitor Signal Input 2 selected */
75 IfxIom_RefInputSignal_xorCombiner = 4 /**< \brief GTM XOR Combiner selected */
76 } IfxIom_RefInputSignal;
77
78 /** \} */
79
80 /** \addtogroup IfxLld_Iom_Impl_Enumeration
81 * \{ */
82 /** \brief LAM mon inputs
83 */
84 typedef enum
85 {
86 IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0, /**< \brief Value=0xXXYY where XX=ISM, YY=k */
87 IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
88 IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
89 IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
90 IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
91 IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
92 IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
93 IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
94 IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
95 IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
96 IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
97 IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
98 IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
99 IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
100 IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
101 IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
102 IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
103 IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
104 IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
105 IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
106 IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
107 IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
108 IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
109 IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
110 IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
111 IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
112 IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
113 IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
114 IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
115 IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
116 IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
117 IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
118 IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
119 IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
120 IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
121 IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
122 IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
123 IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
124 IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
125 IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
126 IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
127 IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
128 IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
129 IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
130 IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
131 IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
132 IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
133 IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
134 IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
135 IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
136 IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
137 IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
138 IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
139 IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
140 IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
141 IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
142 IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
143 IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
144 IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
145 IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
146 IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
147 IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
148 IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
149 IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
150 } IfxIom_MonInput;
151
152 /** \brief LAM ref inputs
153 */
154 typedef enum
155 {
156 IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
157 IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
158 IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
159 IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
160 IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
161 IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
162 IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
163 IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
164 IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
165 IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
166 IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
167 IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
168 IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
169 IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
170 IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
171 IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
172 IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
173 IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
174 IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
175 IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
176 IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
177 IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
178 IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
179 IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
180 IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
181 IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
182 IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
183 IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
184 IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
185 IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
186 IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
187 IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
188 IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
189 IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
190 IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
191 IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
192 IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
193 IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
194 IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
195 IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
196 IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
197 IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
198 IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
199 IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
200 IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
201 IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
202 IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
203 IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
204 IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
205 IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
206 IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
207 IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
208 IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
209 IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
210 IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
211 IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
212 IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
213 IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
214 IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
215 IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
216 IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
217 IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
218 IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
219 IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
220 IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
221 } IfxIom_RefInput;
222
223 /** \} */
224
225 #endif /* IFXIOM_CFG_H */
IfxIom_RefInput_gtmTout6
Definition: IfxIom_cfg.h:178
IfxIom_MonInput_gtmTout69
Definition: IfxIom_cfg.h:116
IfxIom_MonInput_p33_12
Definition: IfxIom_cfg.h:98
IfxIom_MonInput_qspi1Mrst
Definition: IfxIom_cfg.h:135
IfxIom_RefInput_gtmTout2
Definition: IfxIom_cfg.h:174
IfxIom_MonInput_gtmTout27
Definition: IfxIom_cfg.h:107
IfxIom_MonInput_ccu61Cout63
Definition: IfxIom_cfg.h:125
IfxIom_MonInput_gtmTout34
Definition: IfxIom_cfg.h:114
IfxIom_MonInput_p33_5
Definition: IfxIom_cfg.h:91
IfxIom_RefInput_qspi2Mrst
Definition: IfxIom_cfg.h:206
IfxIom_RefInput_ccu60Cout60
Definition: IfxIom_cfg.h:191
IfxIom_RefInput_p33_0
Definition: IfxIom_cfg.h:156
IfxIom_RefInput_ccu61Cout62
Definition: IfxIom_cfg.h:196
IfxIom_RefInput_p20_13
Definition: IfxIom_cfg.h:170
IfxIom_RefInput_ccu60Cc61
Definition: IfxIom_cfg.h:193
IfxIom_MonInput_canNode1Txd
Definition: IfxIom_cfg.h:140
IfxIom_MonInput_asclin2Atx
Definition: IfxIom_cfg.h:148
IfxIom_RefInput_ccu61Cc61
Definition: IfxIom_cfg.h:200
IfxIom_MonInput_p33_11
Definition: IfxIom_cfg.h:97
IfxIom_MonInput_qspi2Mrst
Definition: IfxIom_cfg.h:136
IfxIom_MonInput_gtmTout28
Definition: IfxIom_cfg.h:108
IfxIom_RefInput_gtmTout7
Definition: IfxIom_cfg.h:179
IfxIom_MonInput_gtmTout104
Definition: IfxIom_cfg.h:143
IfxIom_MonInput_ccu61Cout61
Definition: IfxIom_cfg.h:130
IfxIom_RefInput_asclin0Atx
Definition: IfxIom_cfg.h:216
IfxIom_MonInputSignal_2
Monitor Signal Input 2 selected.
Definition: IfxIom_cfg.h:64
IfxIom_RefInput_ccu61Cc62
Definition: IfxIom_cfg.h:199
IfxIom_MonInput_qspi0Mrst
Definition: IfxIom_cfg.h:134
IfxIom_MonInput_p20_14
Definition: IfxIom_cfg.h:101
IfxIom_RefInput_gtmTout10
Definition: IfxIom_cfg.h:182
IfxIom_MonInput_p20_12
Definition: IfxIom_cfg.h:99
IfxIom_RefInput_ccu60Cout63
Definition: IfxIom_cfg.h:188
IfxIom_RefInput_gtmTout1
Definition: IfxIom_cfg.h:173
IfxIom_MonInput_ccu61Cc61
Definition: IfxIom_cfg.h:127
IfxIom_RefInput_gtmTout11
Definition: IfxIom_cfg.h:183
IfxIom_RefInputSignal
IfxIom_RefInputSignal
IOM_FPCCTRk.ISR.
Definition: IfxIom_cfg.h:69
IfxIom_RefInput_canNode1Txd
Definition: IfxIom_cfg.h:210
IfxIom_MonInput_p33_7
Definition: IfxIom_cfg.h:93
IfxIom_MonInputSignal_1
Monitor Signal Input 1 selected.
Definition: IfxIom_cfg.h:63
IfxIom_MonInput_p33_8
Definition: IfxIom_cfg.h:94
IfxIom_RefInput_gtmTout8
Definition: IfxIom_cfg.h:180
IfxIom_MonInput_psi5Psitx0
Definition: IfxIom_cfg.h:132
IfxIom_RefInput_ccu61Cc60
Definition: IfxIom_cfg.h:201
IfxIom_MonInput_gtmTout23
Definition: IfxIom_cfg.h:103
IfxIom_MonInput_gtmTout33
Definition: IfxIom_cfg.h:113
IfxIom_RefInput_ccu61Cout61
Definition: IfxIom_cfg.h:197
IfxIom_MonInput_gtmTout22
Definition: IfxIom_cfg.h:102
IfxIom_RefInputSignal_xorCombiner
GTM XOR Combiner selected.
Definition: IfxIom_cfg.h:75
IfxIom_MonInput_ccu61Cc60
Definition: IfxIom_cfg.h:126
IfxIom_MonInput_p33_1
Definition: IfxIom_cfg.h:87
IfxIom_MonInputSignal_0
Monitor Signal Input 0 selected.
Definition: IfxIom_cfg.h:62
IfxIom_MonInput_ccu60Cout61
Definition: IfxIom_cfg.h:122
IfxIom_RefInput_qspi1Mrst
Definition: IfxIom_cfg.h:205
IfxIom_MonInput_asclin3Atx
Definition: IfxIom_cfg.h:149
IfxIom_RefInput_asclin2Atx
Definition: IfxIom_cfg.h:218
IfxIom_MonInput_gtmTout25
Definition: IfxIom_cfg.h:105
IfxIom_MonInput_gtmTout70
Definition: IfxIom_cfg.h:117
IfxIom_MonInput_p33_6
Definition: IfxIom_cfg.h:92
IfxIom_MonInput_p33_9
Definition: IfxIom_cfg.h:95
IfxIom_MonInput_ccu61Cc62
Definition: IfxIom_cfg.h:128
IfxIom_RefInput_asclin3Atx
Definition: IfxIom_cfg.h:219
IfxIom_RefInput_canNode3Txd
Definition: IfxIom_cfg.h:212
IfxIom_RefInput_ccu60Cc60
Definition: IfxIom_cfg.h:194
IfxIom_MonInput_gnd
Definition: IfxIom_cfg.h:138
IfxIom_RefInput_ccu60Cout62
Definition: IfxIom_cfg.h:189
IfxIom_RefInput_ccu61Cout63
Definition: IfxIom_cfg.h:195
IfxIom_MonInput_p33_2
Definition: IfxIom_cfg.h:88
IfxIom_MonInput_qspi3Mrst
Definition: IfxIom_cfg.h:137
IfxIom_MonInput_gtmTout32
Definition: IfxIom_cfg.h:112
IfxIom_RefInput_p33_1
Definition: IfxIom_cfg.h:157
IfxIom_RefInput_p33_7
Definition: IfxIom_cfg.h:163
IfxIom_MonInput_asclin1Atx
Definition: IfxIom_cfg.h:147
IfxIom_MonInput_canNode2Txd
Definition: IfxIom_cfg.h:141
IfxIom_MonInput_p33_0
Value=0xXXYY where XX=ISM, YY=k.
Definition: IfxIom_cfg.h:86
IfxIom_RefInput_p33_4
Definition: IfxIom_cfg.h:160
IfxIom_MonInput_canNode3Txd
Definition: IfxIom_cfg.h:142
IfxIom_MonInput_ccu60Cc60
Definition: IfxIom_cfg.h:120
IfxIom_RefInput_gtmTout9
Definition: IfxIom_cfg.h:181
IfxIom_MonInput_gtmTout30
Definition: IfxIom_cfg.h:110
IfxIom_RefInputSignal_2
Monitor Signal Input 2 selected.
Definition: IfxIom_cfg.h:74
IfxIom_MonInput_ccu60Cout62
Definition: IfxIom_cfg.h:123
IfxIom_MonInput_psi5Psitx1
Definition: IfxIom_cfg.h:133
IfxIom_RefInput_exorCombiner
Definition: IfxIom_cfg.h:220
IfxIom_RefInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:71
IfxIom_MonInput_gtmTout105
Definition: IfxIom_cfg.h:144
IfxIom_RefInput_psi5Psitx0
Definition: IfxIom_cfg.h:202
IfxIom_RefInput_p33_3
Definition: IfxIom_cfg.h:159
IfxIom_MonInput_gtmTout31
Definition: IfxIom_cfg.h:111
IfxIom_MonInput_ccu60Cc61
Definition: IfxIom_cfg.h:119
IfxIom_MonInput_gtmTout106
Definition: IfxIom_cfg.h:145
IfxIom_MonInput_gtmTout68
Definition: IfxIom_cfg.h:115
IfxIom_RefInput_gtmTout15
Definition: IfxIom_cfg.h:187
IfxIom_RefInput_ccu60Cout61
Definition: IfxIom_cfg.h:190
IfxIom_RefInput_gtmTout108
Definition: IfxIom_cfg.h:214
IfxIom_MonInput_ccu60Cout60
Definition: IfxIom_cfg.h:121
IfxIom_MonInput_ccu60Cout63
Definition: IfxIom_cfg.h:124
IfxIom_RefInput_qspi0Mrst
Definition: IfxIom_cfg.h:204
IfxIom_RefInputSignal_0
Monitor Signal Input 0 selected.
Definition: IfxIom_cfg.h:72
IfxIom_RefInput_p33_11
Definition: IfxIom_cfg.h:167
IfxIom_RefInput_gtmTout5
Definition: IfxIom_cfg.h:177
IfxIom_MonInput_gtmTout24
Definition: IfxIom_cfg.h:104
IfxIom_RefInput_canNode0Txd
Definition: IfxIom_cfg.h:209
IfxIom_MonInput_gtmTout29
Definition: IfxIom_cfg.h:109
IfxIom_MonInput_ccu61Cout60
Definition: IfxIom_cfg.h:129
IfxIom_RefInput_gtmTout3
Definition: IfxIom_cfg.h:175
IfxIom_RefInput_asclin1Atx
Definition: IfxIom_cfg.h:217
IfxIom_RefInput
IfxIom_RefInput
LAM ref inputs.
Definition: IfxIom_cfg.h:154
IfxIom_MonInput_p33_10
Definition: IfxIom_cfg.h:96
IfxIom_RefInput_p33_6
Definition: IfxIom_cfg.h:162
IfxIom_RefInput_gtmTout109
Definition: IfxIom_cfg.h:215
IfxIom_MonInput_asclin0Atx
Definition: IfxIom_cfg.h:146
IfxIom_MonInput_gtmTout26
Definition: IfxIom_cfg.h:106
IfxIom_MonInput_ccu61Cout62
Definition: IfxIom_cfg.h:131
IfxIom_RefInput_gtmTout14
Definition: IfxIom_cfg.h:186
IfxIom_MonInputSignal_p
Signal input Pn_IN (from portlogic) selected.
Definition: IfxIom_cfg.h:61
IfxIom_MonInput_p33_3
Definition: IfxIom_cfg.h:89
IfxIom_RefInput_p20_14
Definition: IfxIom_cfg.h:171
IfxIom_RefInput_gtmTout107
Definition: IfxIom_cfg.h:213
IfxIom_RefInput_psi5Psitx2
Definition: IfxIom_cfg.h:203
IfxIom_RefInput_p33_9
Definition: IfxIom_cfg.h:165
IfxIom_RefInput_p33_5
Definition: IfxIom_cfg.h:161
IfxIom_RefInput_p33_2
Definition: IfxIom_cfg.h:158
IfxIom_MonInput
IfxIom_MonInput
LAM mon inputs.
Definition: IfxIom_cfg.h:84
IfxIom_RefInput_p33_8
Definition: IfxIom_cfg.h:164
IfxIom_MonInput_p20_13
Definition: IfxIom_cfg.h:100
IfxIom_RefInput_gnd
Definition: IfxIom_cfg.h:208
IfxIom_RefInput_gtmTout12
Definition: IfxIom_cfg.h:184
IfxIom_MonInput_ccu60Cc62
Definition: IfxIom_cfg.h:118
IfxIom_RefInput_ccu60Cc62
Definition: IfxIom_cfg.h:192
IfxIom_RefInput_qspi3Mrst
Definition: IfxIom_cfg.h:207
IfxIom_RefInputSignal_1
Monitor Signal Input 1 selected.
Definition: IfxIom_cfg.h:73
IfxIom_MonInput_canNode0Txd
Definition: IfxIom_cfg.h:139
IfxIom_RefInput_p33_10
Definition: IfxIom_cfg.h:166
IfxIom_RefInput_gtmTout0
Definition: IfxIom_cfg.h:172
IfxIom_MonInputSignal
IfxIom_MonInputSignal
IOM_FPCCTRk.ISM.
Definition: IfxIom_cfg.h:59
IfxIom_RefInput_gtmTout13
Definition: IfxIom_cfg.h:185
IfxIom_RefInput_p20_12
Definition: IfxIom_cfg.h:169
IfxIom_RefInput_canNode2Txd
Definition: IfxIom_cfg.h:211
IfxIom_RefInput_gtmTout4
Definition: IfxIom_cfg.h:176
IfxIom_MonInput_p33_4
Definition: IfxIom_cfg.h:90
IfxIom_RefInput_p33_12
Definition: IfxIom_cfg.h:168
IfxIom_RefInput_ccu61Cout60
Definition: IfxIom_cfg.h:198


iLLD_TC26B: IfxLldVersion.h Source File

IfxLldVersion.h
Go to the documentation of this file.
1 #ifndef IFX_LLD_VERSION_H
2 #define IFX_LLD_VERSION_H
3
4 #define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
5 #define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
6 #define IFX_LLD_VERSION_MAJOR_UPDATE 1 /**< \brief Informs about a release for a new derivative without further API changes */
7 #define IFX_LLD_VERSION_MINOR 11 /**< \brief Informs about new additions to the library */
8 #define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */
9
10 #endif /* IFX_LLD_VERSION_H */


iLLD_TC26B: IfxMsc.c Source File

  • Msc
  • Std
IfxMsc.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc.c
3 * \brief MSC basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxMsc.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
36 {
37 /* Data Frame Interrupt Clear */
38 msc->ISC.B.CDEDI = 1;
39 }
40
41
42 void IfxMsc_clearReset(Ifx_MSC *msc)
43 {
44 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
45
46 IfxScuWdt_clearCpuEndinit(passwd);
47
48 if (msc->KRST0.B.RSTSTAT == 1)
49 {
50 msc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
51 }
52
53 IfxScuWdt_setCpuEndinit(passwd);
54 }
55
56
57 void IfxMsc_disableModule(Ifx_MSC *msc)
58 {
59 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
60 IfxScuWdt_clearCpuEndinit(passwd);
61 /* Disable module */
62 msc->CLC.B.DISR = 1;
63 IfxScuWdt_setCpuEndinit(passwd);
64 }
65
66
67 uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
68 {
69 uint32 fsys = IfxScuCcu_getSpbFrequency();
70 uint32 ndd = 0;
71
72 /* DSTE.NDD = fsys / 2*BR */
73
74 ndd = fsys / (2 * baud);
75
76 return ndd - 1;
77 }
78
79
80 uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
81 {
82 IFX_UNUSED_PARAMETER(msc);
83
84 float32 fsys = IfxScuCcu_getSpbFrequency();
85 uint64 step = 0;
86
87 step = (uint64)((uint64)(2 * baud * 1024)) / fsys;
88
89 return step;
90 }
91
92
93 uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
94 {
95 IFX_UNUSED_PARAMETER(msc);
96
97 float32 fsys = IfxScuCcu_getSpbFrequency();
98 uint32 step = 0;
99
100 /* FDR.STEP = 1024 - fsys / (2*BR) */
101
102 step = 1024 - (fsys / (2 * baud));
103
104 return step;
105 }
106
107
108 void IfxMsc_enableModule(Ifx_MSC *msc)
109 {
110 /* Disable module disable bit */
111 msc->CLC.U = 0;
112 }
113
114
115 boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
116 {
117 return msc->DSS.B.DFA;
118 }
119
120
121 Ifx_MSC *IfxMsc_getAddress(IfxMsc_Index msc)
122 {
123 Ifx_MSC *module;
124
125 if (msc < IFXMSC_NUM_MODULES)
126 {
127 module = (Ifx_MSC *)IfxMsc_cfg_indexMap[msc].module;
128 }
129 else
130 {
131 module = NULL_PTR;
132 }
133
134 return module;
135 }
136
137
138 boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
139 {
140 boolean flag = 0;
141
142 flag = msc->ISR.B.DEDI;
143
144 return flag;
145 }
146
147
148 IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
149 {
150 uint32 index;
151 IfxMsc_Index result;
152
153 result = IfxMsc_Index_none;
154
155 for (index = 0; index < IFXMSC_NUM_MODULES; index++)
156 {
157 if (IfxMsc_cfg_indexMap[index].module == msc)
158 {
159 result = (IfxMsc_Index)IfxMsc_cfg_indexMap[index].index;
160 break;
161 }
162 }
163
164 return result;
165 }
166
167
168 void IfxMsc_resetModule(Ifx_MSC *msc)
169 {
170 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
171
172 IfxScuWdt_clearCpuEndinit(passwd);
173
174 /* Reset kernel */
175 msc->KRST1.B.RST = 1;
176 msc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
177
178 while (msc->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
179
180 {}
181
182 /* TODO Check if CLC enable is required */
183 //msc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
184
185 IfxScuWdt_setCpuEndinit(passwd);
186 }
187
188
189 uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
190 {
191 float32 fsys = IfxScuCcu_getSpbFrequency();
192 uint64 step = 0;
193 uint32 df = 1;
194
195 /* FDR.STEP = DF*BR*1024 / fsys */
196
197 if (msc->USR.B.URR != 0)
198 {
199 df = 1 << (msc->USR.B.URR + 1);
200 }
201 else
202 {
203 df = 0;
204 }
205
206 step = (uint64)((uint64)((df * baud) * 1024)) / fsys;
207
208 return step;
209 }
210
211
212 uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
213 {
214 float32 fsys = IfxScuCcu_getSpbFrequency();
215 uint32 step = 0;
216 uint32 df = 1;
217
218 /* FDR.STEP = 1024 - fsys / DF*BR */
219
220 if (msc->USR.B.URR != 0)
221 {
222 df = 1 << (msc->USR.B.URR + 1);
223 }
224 else
225 {
226 df = 0;
227 }
228
229 step = 1024 - (fsys / (df * baud));
230
231 return step;
232 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:60
IfxMsc_downstreamFractionalBaudCalculator
uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream...
Definition: IfxMsc.c:80
IfxMsc_downstreamAbraBaudCalculator
uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:67
IfxMsc_Index_none
Not Selected.
Definition: IfxMsc_cfg.h:62
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxMsc_disableModule
void IfxMsc_disableModule(Ifx_MSC *msc)
Disable MSC kernel.
Definition: IfxMsc.c:57
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxMsc_clearReset
void IfxMsc_clearReset(Ifx_MSC *msc)
Clear reset bit of MSC kernel.
Definition: IfxMsc.c:42
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxMsc_getAddress
Ifx_MSC * IfxMsc_getAddress(IfxMsc_Index msc)
Definition: IfxMsc.c:121
IfxMsc_clearDataFrameInterruptFlag
void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:35
IfxMsc_upstreamFractionalBaudCalculator
uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:189
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:48
IfxMsc.h
MSC basic functionality.
IfxMsc_upstreamNormalBaudCalculator
uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:212
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMsc_getIndex
IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
API to get the resource index of the MSC specified.
Definition: IfxMsc.c:148
IfxMsc_getActiveDataFrameStatus
boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:115
IfxMsc_downstreamNormalBaudCalculator
uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream.
Definition: IfxMsc.c:93
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxMsc_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.c:35
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxMsc_enableModule
void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:108
IfxMsc_getDataFrameInterruptFlag
boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:138
IfxMsc_resetModule
void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:168


iLLD_TC26B: IfxMsc.h Source File

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IfxMsc.h
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1 /**
2 * \file IfxMsc.h
3 * \brief MSC basic functionality
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Msc_Std_Enum Enumerations
25 * \ingroup IfxLld_Msc_Std
26 * \defgroup IfxLld_Msc_Std_Config_Flags Configure Flags
27 * \ingroup IfxLld_Msc_Std
28 * \defgroup IfxLld_Msc_Std_Set_Command_Target Set Command Target
29 * \ingroup IfxLld_Msc_Std
30 * \defgroup IfxLld_Msc_Std_Set_Data Set Data
31 * \ingroup IfxLld_Msc_Std
32 * \defgroup IfxLld_Msc_Std_Get_Data Get Data
33 * \ingroup IfxLld_Msc_Std
34 * \defgroup IfxLld_Msc_Std_Enable_Module Enable Module
35 * \ingroup IfxLld_Msc_Std
36 * \defgroup IfxLld_Msc_Std_Reset_Module Reset Module
37 * \ingroup IfxLld_Msc_Std
38 * \defgroup IfxLld_Msc_Std_Baud_Calculator Baud Calculator
39 * \ingroup IfxLld_Msc_Std
40 * \defgroup IfxLld_Msc_Std_IO IO Pin Configuration Functions
41 * \ingroup IfxLld_Msc_Std
42 * \defgroup IfxLld_Msc_Std_Module Module Functions
43 * \ingroup IfxLld_Msc_Std
44 */
45
46 #ifndef IFXMSC_H
47 #define IFXMSC_H 1
48
49 /******************************************************************************/
50 /*----------------------------------Includes----------------------------------*/
51 /******************************************************************************/
52
53 #include "_Impl/IfxMsc_cfg.h"
54 #include "Scu/Std/IfxScuCcu.h"
55 #include "Scu/Std/IfxScuWdt.h"
56 #include "_PinMap/IfxMsc_PinMap.h"
57 #include "Cpu/Std/IfxCpu_Intrinsics.h"
58
59 /******************************************************************************/
60 /*--------------------------------Enumerations--------------------------------*/
61 /******************************************************************************/
62
63 /** \addtogroup IfxLld_Msc_Std_Enum
64 * \{ */
65 /** \brief Enable SRL/SRH Active Phase Selection Bit\n
66 * Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL
67 */
68 typedef enum
69 {
70 IfxMsc_ActivePhaseSelection_none = 0, /**< \brief No selection bit inserted */
71 IfxMsc_ActivePhaseSelection_lowLevel = 1 /**< \brief Low level selection bit inserted */
72 } IfxMsc_ActivePhaseSelection;
73
74 /** \brief Asynchronous Block Configuration Register - Asynchronous Block Bypass\n
75 * Definition in Ifx_MSC.ABC.B.ABB
76 */
77 typedef enum
78 {
79 IfxMsc_AsynchronousBlock_bypassed = 0, /**< \brief Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled */
80 IfxMsc_AsynchronousBlock_noBypassed = 1 /**< \brief Asynchronous block and the n-divider of the MSC downstream path are active */
81 } IfxMsc_AsynchronousBlock;
82
83 /** \brief Output Control Register - Chip Selection Line Polarity\n
84 * Definition in Ifx_MSC.OCR.B.CSLP
85 */
86 typedef enum
87 {
88 IfxMsc_ChipSelectActiveState_high = 0, /**< \brief EN[3:0] and ENL,ENH,ENC polarities are identical */
89 IfxMsc_ChipSelectActiveState_low = 1 /**< \brief EN[3:0] and ENL,ENH,ENC polarities are inverted */
90 } IfxMsc_ChipSelectActiveState;
91
92 /** \brief Asynchronous Block Configuration Register - Clock Select\n
93 * Definition in Ifx_MSC.ABC.B.CLKSEL
94 */
95 typedef enum
96 {
97 IfxMsc_ClockSelect_noClock = 0, /**< \brief no clock source for the ABRA block */
98 IfxMsc_ClockSelect_fspb = 1, /**< \brief f_SPB is the clock source for the ABRA block */
99 IfxMsc_ClockSelect_fsri = 2, /**< \brief f_SRI is the clock source for the ABRA block */
100 IfxMsc_ClockSelect_feray = 4 /**< \brief f_ERAY is the clock source for the ABRA block */
101 } IfxMsc_ClockSelect;
102
103 /** \brief Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode\n
104 * Definition in Ifx_MSC.DSCE.B.CDCM
105 */
106 typedef enum
107 {
108 IfxMsc_CommandDataCommandRepetitionMode_disabled = 0, /**< \brief Disables the automatic insertion of data */
109 IfxMsc_CommandDataCommandRepetitionMode_enabled = 1 /**< \brief Enables the automatic insertion of data */
110 } IfxMsc_CommandDataCommandRepetitionMode;
111
112 /** \brief Interrupt Control Register - Command Frame Interrupt Enable\n
113 * Definition in Ifx_MSC.ICR.B.ECIE
114 */
115 typedef enum
116 {
117 IfxMsc_CommandFrameInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
118 IfxMsc_CommandFrameInterrupt_enabled = 1 /**< \brief Interrupt generation enabled */
119 } IfxMsc_CommandFrameInterrupt;
120
121 /** \brief Interrupt Control Register - Command Frame Interrupt Node Pointer\n
122 * Definition in Ifx_MSC.ICR.B.ECIP
123 */
124 typedef enum
125 {
126 IfxMsc_CommandFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
127 IfxMsc_CommandFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
128 IfxMsc_CommandFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
129 IfxMsc_CommandFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
130 } IfxMsc_CommandFrameInterruptNode;
131
132 /** \brief Number of Bits shifted at command frames\n
133 * Definition in Ifx_MSC.DSC.B.NBC
134 */
135 typedef enum
136 {
137 IfxMsc_CommandFrameLength_0 = 0, /**< \brief No bit shifted */
138 IfxMsc_CommandFrameLength_1 = 1, /**< \brief SRL[0] Shifted */
139 IfxMsc_CommandFrameLength_2 = 2, /**< \brief SRL[1:0] Shifted */
140 IfxMsc_CommandFrameLength_3, /**< \brief SRL[2:0] Shifted */
141 IfxMsc_CommandFrameLength_4, /**< \brief SRL[3:0] Shifted */
142 IfxMsc_CommandFrameLength_5, /**< \brief SRL[4:0] Shifted */
143 IfxMsc_CommandFrameLength_6, /**< \brief SRL[5:0] Shifted */
144 IfxMsc_CommandFrameLength_7, /**< \brief SRL[6:0] Shifted */
145 IfxMsc_CommandFrameLength_8, /**< \brief SRL[7:0] Shifted */
146 IfxMsc_CommandFrameLength_9, /**< \brief SRL[8:0] Shifted */
147 IfxMsc_CommandFrameLength_10, /**< \brief SRL[9:0] Shifted */
148 IfxMsc_CommandFrameLength_11, /**< \brief SRL[10:0] Shifted */
149 IfxMsc_CommandFrameLength_12, /**< \brief SRL[11:0] Shifted */
150 IfxMsc_CommandFrameLength_13, /**< \brief SRL[12:0] Shifted */
151 IfxMsc_CommandFrameLength_14, /**< \brief SRL[13:0] Shifted */
152 IfxMsc_CommandFrameLength_15, /**< \brief SRL[14:0] Shifted */
153 IfxMsc_CommandFrameLength_16, /**< \brief SRL[15:0] Shifted */
154 IfxMsc_CommandFrameLength_17 = 17, /**< \brief SRL[15:0] and SRH[0] Shifted */
155 IfxMsc_CommandFrameLength_18 = 18, /**< \brief SRL[15:0] and SRH[1:0] Shifted */
156 IfxMsc_CommandFrameLength_19, /**< \brief SRL[15:0] and SRH[2:0] Shifted */
157 IfxMsc_CommandFrameLength_20, /**< \brief SRL[15:0] and SRH[3:0] Shifted */
158 IfxMsc_CommandFrameLength_21, /**< \brief SRL[15:0] and SRH[4:0] Shifted */
159 IfxMsc_CommandFrameLength_22, /**< \brief SRL[15:0] and SRH[5:0] Shifted */
160 IfxMsc_CommandFrameLength_23, /**< \brief SRL[15:0] and SRH[6:0] Shifted */
161 IfxMsc_CommandFrameLength_24, /**< \brief SRL[15:0] and SRH[7:0] Shifted */
162 IfxMsc_CommandFrameLength_25, /**< \brief SRL[15:0] and SRH[8:0] Shifted */
163 IfxMsc_CommandFrameLength_26, /**< \brief SRL[15:0] and SRH[9:0] Shifted */
164 IfxMsc_CommandFrameLength_27, /**< \brief SRL[15:0] and SRH[10:0] Shifted */
165 IfxMsc_CommandFrameLength_28, /**< \brief SRL[15:0] and SRH[11:0] Shifted */
166 IfxMsc_CommandFrameLength_29, /**< \brief SRL[15:0] and SRH[12:0] Shifted */
167 IfxMsc_CommandFrameLength_30, /**< \brief SRL[15:0] and SRH[13:0] Shifted */
168 IfxMsc_CommandFrameLength_31, /**< \brief SRL[15:0] and SRH[14:0] Shifted */
169 IfxMsc_CommandFrameLength_32 /**< \brief SRL[15:0] and SRH[15:0] Shifted */
170 } IfxMsc_CommandFrameLength;
171
172 /** \brief Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension\n
173 * Definition in Ifx_MSC.DSTE.B.PPCE
174 */
175 typedef enum
176 {
177 IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0, /**< \brief Length of Command frames passive phase is 2 */
178 IfxMsc_ControlFrameExtensionPassivePhaseLength_1, /**< \brief Length of Command frames passive phase is 3 */
179 IfxMsc_ControlFrameExtensionPassivePhaseLength_2, /**< \brief Length of Command frames passive phase is 4 */
180 IfxMsc_ControlFrameExtensionPassivePhaseLength_3, /**< \brief Length of Command frames passive phase is 5 */
181 IfxMsc_ControlFrameExtensionPassivePhaseLength_4, /**< \brief Length of Command frames passive phase is 6 */
182 IfxMsc_ControlFrameExtensionPassivePhaseLength_5, /**< \brief Length of Command frames passive phase is 7 */
183 IfxMsc_ControlFrameExtensionPassivePhaseLength_6, /**< \brief Length of Command frames passive phase is 8 */
184 IfxMsc_ControlFrameExtensionPassivePhaseLength_7, /**< \brief Length of Command frames passive phase is 9 */
185 IfxMsc_ControlFrameExtensionPassivePhaseLength_8, /**< \brief Length of Command frames passive phase is 10 */
186 IfxMsc_ControlFrameExtensionPassivePhaseLength_9, /**< \brief Length of Command frames passive phase is 11 */
187 IfxMsc_ControlFrameExtensionPassivePhaseLength_10, /**< \brief Length of Command frames passive phase is 12 */
188 IfxMsc_ControlFrameExtensionPassivePhaseLength_11, /**< \brief Length of Command frames passive phase is 13 */
189 IfxMsc_ControlFrameExtensionPassivePhaseLength_12, /**< \brief Length of Command frames passive phase is 14 */
190 IfxMsc_ControlFrameExtensionPassivePhaseLength_13, /**< \brief Length of Command frames passive phase is 15 */
191 IfxMsc_ControlFrameExtensionPassivePhaseLength_14, /**< \brief Length of Command frames passive phase is 16 */
192 IfxMsc_ControlFrameExtensionPassivePhaseLength_15, /**< \brief Length of Command frames passive phase is 17 */
193 IfxMsc_ControlFrameExtensionPassivePhaseLength_16, /**< \brief Length of Command frames passive phase is 18 */
194 IfxMsc_ControlFrameExtensionPassivePhaseLength_17, /**< \brief Length of Command frames passive phase is 19 */
195 IfxMsc_ControlFrameExtensionPassivePhaseLength_18, /**< \brief Length of Command frames passive phase is 20 */
196 IfxMsc_ControlFrameExtensionPassivePhaseLength_19, /**< \brief Length of Command frames passive phase is 21 */
197 IfxMsc_ControlFrameExtensionPassivePhaseLength_20, /**< \brief Length of Command frames passive phase is 22 */
198 IfxMsc_ControlFrameExtensionPassivePhaseLength_21, /**< \brief Length of Command frames passive phase is 23 */
199 IfxMsc_ControlFrameExtensionPassivePhaseLength_22, /**< \brief Length of Command frames passive phase is 24 */
200 IfxMsc_ControlFrameExtensionPassivePhaseLength_23, /**< \brief Length of Command frames passive phase is 25 */
201 IfxMsc_ControlFrameExtensionPassivePhaseLength_24, /**< \brief Length of Command frames passive phase is 26 */
202 IfxMsc_ControlFrameExtensionPassivePhaseLength_25, /**< \brief Length of Command frames passive phase is 27 */
203 IfxMsc_ControlFrameExtensionPassivePhaseLength_26, /**< \brief Length of Command frames passive phase is 28 */
204 IfxMsc_ControlFrameExtensionPassivePhaseLength_27, /**< \brief Length of Command frames passive phase is 29 */
205 IfxMsc_ControlFrameExtensionPassivePhaseLength_28, /**< \brief Length of Command frames passive phase is 30 */
206 IfxMsc_ControlFrameExtensionPassivePhaseLength_29, /**< \brief Length of Command frames passive phase is 31 */
207 IfxMsc_ControlFrameExtensionPassivePhaseLength_30, /**< \brief Length of Command frames passive phase is 32 */
208 IfxMsc_ControlFrameExtensionPassivePhaseLength_31, /**< \brief Length of Command frames passive phase is 33 */
209 IfxMsc_ControlFrameExtensionPassivePhaseLength_32, /**< \brief Length of Command frames passive phase is 34 */
210 IfxMsc_ControlFrameExtensionPassivePhaseLength_33, /**< \brief Length of Command frames passive phase is 35 */
211 IfxMsc_ControlFrameExtensionPassivePhaseLength_34, /**< \brief Length of Command frames passive phase is 36 */
212 IfxMsc_ControlFrameExtensionPassivePhaseLength_35, /**< \brief Length of Command frames passive phase is 37 */
213 IfxMsc_ControlFrameExtensionPassivePhaseLength_36, /**< \brief Length of Command frames passive phase is 38 */
214 IfxMsc_ControlFrameExtensionPassivePhaseLength_37, /**< \brief Length of Command frames passive phase is 39 */
215 IfxMsc_ControlFrameExtensionPassivePhaseLength_38, /**< \brief Length of Command frames passive phase is 40 */
216 IfxMsc_ControlFrameExtensionPassivePhaseLength_39, /**< \brief Length of Command frames passive phase is 41 */
217 IfxMsc_ControlFrameExtensionPassivePhaseLength_40, /**< \brief Length of Command frames passive phase is 42 */
218 IfxMsc_ControlFrameExtensionPassivePhaseLength_41, /**< \brief Length of Command frames passive phase is 43 */
219 IfxMsc_ControlFrameExtensionPassivePhaseLength_42, /**< \brief Length of Command frames passive phase is 44 */
220 IfxMsc_ControlFrameExtensionPassivePhaseLength_43, /**< \brief Length of Command frames passive phase is 45 */
221 IfxMsc_ControlFrameExtensionPassivePhaseLength_44, /**< \brief Length of Command frames passive phase is 46 */
222 IfxMsc_ControlFrameExtensionPassivePhaseLength_45, /**< \brief Length of Command frames passive phase is 47 */
223 IfxMsc_ControlFrameExtensionPassivePhaseLength_46, /**< \brief Length of Command frames passive phase is 48 */
224 IfxMsc_ControlFrameExtensionPassivePhaseLength_47, /**< \brief Length of Command frames passive phase is 49 */
225 IfxMsc_ControlFrameExtensionPassivePhaseLength_48, /**< \brief Length of Command frames passive phase is 50 */
226 IfxMsc_ControlFrameExtensionPassivePhaseLength_49, /**< \brief Length of Command frames passive phase is 51 */
227 IfxMsc_ControlFrameExtensionPassivePhaseLength_50, /**< \brief Length of Command frames passive phase is 52 */
228 IfxMsc_ControlFrameExtensionPassivePhaseLength_51, /**< \brief Length of Command frames passive phase is 53 */
229 IfxMsc_ControlFrameExtensionPassivePhaseLength_52, /**< \brief Length of Command frames passive phase is 54 */
230 IfxMsc_ControlFrameExtensionPassivePhaseLength_53, /**< \brief Length of Command frames passive phase is 55 */
231 IfxMsc_ControlFrameExtensionPassivePhaseLength_54, /**< \brief Length of Command frames passive phase is 56 */
232 IfxMsc_ControlFrameExtensionPassivePhaseLength_55, /**< \brief Length of Command frames passive phase is 57 */
233 IfxMsc_ControlFrameExtensionPassivePhaseLength_56, /**< \brief Length of Command frames passive phase is 58 */
234 IfxMsc_ControlFrameExtensionPassivePhaseLength_57, /**< \brief Length of Command frames passive phase is 59 */
235 IfxMsc_ControlFrameExtensionPassivePhaseLength_58, /**< \brief Length of Command frames passive phase is 60 */
236 IfxMsc_ControlFrameExtensionPassivePhaseLength_59, /**< \brief Length of Command frames passive phase is 61 */
237 IfxMsc_ControlFrameExtensionPassivePhaseLength_60, /**< \brief Length of Command frames passive phase is 62 */
238 IfxMsc_ControlFrameExtensionPassivePhaseLength_61, /**< \brief Length of Command frames passive phase is 63 */
239 IfxMsc_ControlFrameExtensionPassivePhaseLength_62, /**< \brief Length of Command frames passive phase is 64 */
240 IfxMsc_ControlFrameExtensionPassivePhaseLength_63, /**< \brief Length of Command frames passive phase is 65 */
241 IfxMsc_ControlFrameExtensionPassivePhaseLength_64, /**< \brief Length of Command frames passive phase is 66 */
242 IfxMsc_ControlFrameExtensionPassivePhaseLength_65, /**< \brief Length of Command frames passive phase is 67 */
243 IfxMsc_ControlFrameExtensionPassivePhaseLength_66, /**< \brief Length of Command frames passive phase is 68 */
244 IfxMsc_ControlFrameExtensionPassivePhaseLength_67, /**< \brief Length of Command frames passive phase is 69 */
245 IfxMsc_ControlFrameExtensionPassivePhaseLength_68, /**< \brief Length of Command frames passive phase is 70 */
246 IfxMsc_ControlFrameExtensionPassivePhaseLength_69, /**< \brief Length of Command frames passive phase is 71 */
247 IfxMsc_ControlFrameExtensionPassivePhaseLength_70, /**< \brief Length of Command frames passive phase is 72 */
248 IfxMsc_ControlFrameExtensionPassivePhaseLength_71, /**< \brief Length of Command frames passive phase is 73 */
249 IfxMsc_ControlFrameExtensionPassivePhaseLength_72, /**< \brief Length of Command frames passive phase is 74 */
250 IfxMsc_ControlFrameExtensionPassivePhaseLength_73, /**< \brief Length of Command frames passive phase is 75 */
251 IfxMsc_ControlFrameExtensionPassivePhaseLength_74, /**< \brief Length of Command frames passive phase is 76 */
252 IfxMsc_ControlFrameExtensionPassivePhaseLength_75, /**< \brief Length of Command frames passive phase is 77 */
253 IfxMsc_ControlFrameExtensionPassivePhaseLength_76, /**< \brief Length of Command frames passive phase is 78 */
254 IfxMsc_ControlFrameExtensionPassivePhaseLength_77, /**< \brief Length of Command frames passive phase is 79 */
255 IfxMsc_ControlFrameExtensionPassivePhaseLength_78, /**< \brief Length of Command frames passive phase is 80 */
256 IfxMsc_ControlFrameExtensionPassivePhaseLength_79, /**< \brief Length of Command frames passive phase is 81 */
257 IfxMsc_ControlFrameExtensionPassivePhaseLength_80, /**< \brief Length of Command frames passive phase is 82 */
258 IfxMsc_ControlFrameExtensionPassivePhaseLength_81, /**< \brief Length of Command frames passive phase is 83 */
259 IfxMsc_ControlFrameExtensionPassivePhaseLength_82, /**< \brief Length of Command frames passive phase is 84 */
260 IfxMsc_ControlFrameExtensionPassivePhaseLength_83, /**< \brief Length of Command frames passive phase is 85 */
261 IfxMsc_ControlFrameExtensionPassivePhaseLength_84, /**< \brief Length of Command frames passive phase is 86 */
262 IfxMsc_ControlFrameExtensionPassivePhaseLength_85, /**< \brief Length of Command frames passive phase is 87 */
263 IfxMsc_ControlFrameExtensionPassivePhaseLength_86, /**< \brief Length of Command frames passive phase is 88 */
264 IfxMsc_ControlFrameExtensionPassivePhaseLength_87, /**< \brief Length of Command frames passive phase is 89 */
265 IfxMsc_ControlFrameExtensionPassivePhaseLength_88, /**< \brief Length of Command frames passive phase is 90 */
266 IfxMsc_ControlFrameExtensionPassivePhaseLength_89, /**< \brief Length of Command frames passive phase is 91 */
267 IfxMsc_ControlFrameExtensionPassivePhaseLength_90, /**< \brief Length of Command frames passive phase is 92 */
268 IfxMsc_ControlFrameExtensionPassivePhaseLength_91, /**< \brief Length of Command frames passive phase is 93 */
269 IfxMsc_ControlFrameExtensionPassivePhaseLength_92, /**< \brief Length of Command frames passive phase is 94 */
270 IfxMsc_ControlFrameExtensionPassivePhaseLength_93, /**< \brief Length of Command frames passive phase is 95 */
271 IfxMsc_ControlFrameExtensionPassivePhaseLength_94, /**< \brief Length of Command frames passive phase is 96 */
272 IfxMsc_ControlFrameExtensionPassivePhaseLength_95, /**< \brief Length of Command frames passive phase is 97 */
273 IfxMsc_ControlFrameExtensionPassivePhaseLength_96, /**< \brief Length of Command frames passive phase is 98 */
274 IfxMsc_ControlFrameExtensionPassivePhaseLength_97, /**< \brief Length of Command frames passive phase is 99 */
275 IfxMsc_ControlFrameExtensionPassivePhaseLength_98, /**< \brief Length of Command frames passive phase is 100 */
276 IfxMsc_ControlFrameExtensionPassivePhaseLength_99, /**< \brief Length of Command frames passive phase is 101 */
277 IfxMsc_ControlFrameExtensionPassivePhaseLength_100, /**< \brief Length of Command frames passive phase is 102 */
278 IfxMsc_ControlFrameExtensionPassivePhaseLength_101, /**< \brief Length of Command frames passive phase is 103 */
279 IfxMsc_ControlFrameExtensionPassivePhaseLength_102, /**< \brief Length of Command frames passive phase is 104 */
280 IfxMsc_ControlFrameExtensionPassivePhaseLength_103, /**< \brief Length of Command frames passive phase is 105 */
281 IfxMsc_ControlFrameExtensionPassivePhaseLength_104, /**< \brief Length of Command frames passive phase is 106 */
282 IfxMsc_ControlFrameExtensionPassivePhaseLength_105, /**< \brief Length of Command frames passive phase is 107 */
283 IfxMsc_ControlFrameExtensionPassivePhaseLength_106, /**< \brief Length of Command frames passive phase is 108 */
284 IfxMsc_ControlFrameExtensionPassivePhaseLength_107, /**< \brief Length of Command frames passive phase is 109 */
285 IfxMsc_ControlFrameExtensionPassivePhaseLength_108, /**< \brief Length of Command frames passive phase is 110 */
286 IfxMsc_ControlFrameExtensionPassivePhaseLength_109, /**< \brief Length of Command frames passive phase is 111 */
287 IfxMsc_ControlFrameExtensionPassivePhaseLength_110, /**< \brief Length of Command frames passive phase is 112 */
288 IfxMsc_ControlFrameExtensionPassivePhaseLength_111, /**< \brief Length of Command frames passive phase is 113 */
289 IfxMsc_ControlFrameExtensionPassivePhaseLength_112, /**< \brief Length of Command frames passive phase is 114 */
290 IfxMsc_ControlFrameExtensionPassivePhaseLength_113, /**< \brief Length of Command frames passive phase is 115 */
291 IfxMsc_ControlFrameExtensionPassivePhaseLength_114, /**< \brief Length of Command frames passive phase is 116 */
292 IfxMsc_ControlFrameExtensionPassivePhaseLength_115, /**< \brief Length of Command frames passive phase is 117 */
293 IfxMsc_ControlFrameExtensionPassivePhaseLength_116, /**< \brief Length of Command frames passive phase is 118 */
294 IfxMsc_ControlFrameExtensionPassivePhaseLength_117, /**< \brief Length of Command frames passive phase is 119 */
295 IfxMsc_ControlFrameExtensionPassivePhaseLength_118, /**< \brief Length of Command frames passive phase is 120 */
296 IfxMsc_ControlFrameExtensionPassivePhaseLength_119, /**< \brief Length of Command frames passive phase is 121 */
297 IfxMsc_ControlFrameExtensionPassivePhaseLength_120, /**< \brief Length of Command frames passive phase is 122 */
298 IfxMsc_ControlFrameExtensionPassivePhaseLength_121, /**< \brief Length of Command frames passive phase is 123 */
299 IfxMsc_ControlFrameExtensionPassivePhaseLength_122, /**< \brief Length of Command frames passive phase is 124 */
300 IfxMsc_ControlFrameExtensionPassivePhaseLength_123, /**< \brief Length of Command frames passive phase is 125 */
301 IfxMsc_ControlFrameExtensionPassivePhaseLength_124, /**< \brief Length of Command frames passive phase is 126 */
302 IfxMsc_ControlFrameExtensionPassivePhaseLength_125, /**< \brief Length of Command frames passive phase is 127 */
303 IfxMsc_ControlFrameExtensionPassivePhaseLength_126, /**< \brief Length of Command frames passive phase is 128 */
304 IfxMsc_ControlFrameExtensionPassivePhaseLength_127 /**< \brief Length of Command frames passive phase is 129 */
305 } IfxMsc_ControlFrameExtensionPassivePhaseLength;
306
307 /** \brief Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension\n
308 * Definition in Ifx_MSC.DSTE.B.PPDE
309 */
310 typedef enum
311 {
312 IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0, /**< \brief 0 Additional MSB bits extension of the PPD bit field */
313 IfxMsc_DataFrameExtensionPassivePhaseLength_1, /**< \brief 1 Additional MSB bits extension of the PPD bit field */
314 IfxMsc_DataFrameExtensionPassivePhaseLength_2, /**< \brief 2 Additional MSB bits extension of the PPD bit field */
315 IfxMsc_DataFrameExtensionPassivePhaseLength_3 /**< \brief 3 Additional MSB bits extension of the PPD bit field */
316 } IfxMsc_DataFrameExtensionPassivePhaseLength;
317
318 /** \brief Interrupt Control Register - Data Frame Interrupt Enable\n
319 * Definition in Ifx_MSC.ICR.B.EDIE
320 */
321 typedef enum
322 {
323 IfxMsc_DataFrameInterrupt_disabled = 0, /**< \brief Interrupt generation Disable */
324 IfxMsc_DataFrameInterrupt_atLastDataBit = 1, /**< \brief An interrupt is generated when the last data bit has been shifted out */
325 IfxMsc_DataFrameInterrupt_atFirstDataBit = 2 /**< \brief An interrupt is generated when the First data bit has been shifted out */
326 } IfxMsc_DataFrameInterrupt;
327
328 /** \brief Interrupt Control Register - Data Frame Interrupt Node Pointer\n
329 * Definition in Ifx_MSC.ICR.B.EDIP
330 */
331 typedef enum
332 {
333 IfxMsc_DataFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
334 IfxMsc_DataFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
335 IfxMsc_DataFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
336 IfxMsc_DataFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
337 } IfxMsc_DataFrameInterruptNode;
338
339 /** \brief Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames\n
340 * Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL
341 */
342 typedef enum
343 {
344 IfxMsc_DataFrameLength_0 = 0, /**< \brief No SRx bit shifted */
345 IfxMsc_DataFrameLength_1 = 1, /**< \brief SRx[0] Shifted */
346 IfxMsc_DataFrameLength_2 = 2, /**< \brief SRx[1:0] Shifted */
347 IfxMsc_DataFrameLength_3, /**< \brief SRx[2:0] Shifted */
348 IfxMsc_DataFrameLength_4, /**< \brief SRx[3:0] Shifted */
349 IfxMsc_DataFrameLength_5, /**< \brief SRx[4:0] Shifted */
350 IfxMsc_DataFrameLength_6, /**< \brief SRx[5:0] Shifted */
351 IfxMsc_DataFrameLength_7, /**< \brief SRx[6:0] Shifted */
352 IfxMsc_DataFrameLength_8, /**< \brief SRx[7:0] Shifted */
353 IfxMsc_DataFrameLength_9, /**< \brief SRx[8:0] Shifted */
354 IfxMsc_DataFrameLength_10, /**< \brief SRx[9:0] Shifted */
355 IfxMsc_DataFrameLength_11, /**< \brief SRx[10:0] Shifted */
356 IfxMsc_DataFrameLength_12, /**< \brief SRx[11:0] Shifted */
357 IfxMsc_DataFrameLength_13, /**< \brief SRx[12:0] Shifted */
358 IfxMsc_DataFrameLength_14, /**< \brief SRx[13:0] Shifted */
359 IfxMsc_DataFrameLength_15, /**< \brief SRx[14:0] Shifted */
360 IfxMsc_DataFrameLength_16 /**< \brief SRx[15:0] Shifted */
361 } IfxMsc_DataFrameLength;
362
363 /** \brief Passive Phase Length at Data Frames\n
364 * Definition in Ifx_MSC.DSC.B.PPD
365 */
366 typedef enum
367 {
368 IfxMsc_DataFramePassivePhaseLength_2 = 2, /**< \brief Passive phase length is 2 tFCL */
369 IfxMsc_DataFramePassivePhaseLength_3, /**< \brief Passive phase length is 3 tFCL */
370 IfxMsc_DataFramePassivePhaseLength_4, /**< \brief Passive phase length is 4 tFCL */
371 IfxMsc_DataFramePassivePhaseLength_5, /**< \brief Passive phase length is 5 tFCL */
372 IfxMsc_DataFramePassivePhaseLength_6, /**< \brief Passive phase length is 6 tFCL */
373 IfxMsc_DataFramePassivePhaseLength_7, /**< \brief Passive phase length is 7 tFCL */
374 IfxMsc_DataFramePassivePhaseLength_8, /**< \brief Passive phase length is 8 tFCL */
375 IfxMsc_DataFramePassivePhaseLength_9, /**< \brief Passive phase length is 9 tFCL */
376 IfxMsc_DataFramePassivePhaseLength_10, /**< \brief Passive phase length is 10 tFCL */
377 IfxMsc_DataFramePassivePhaseLength_11, /**< \brief Passive phase length is 11 tFCL */
378 IfxMsc_DataFramePassivePhaseLength_12, /**< \brief Passive phase length is 12 tFCL */
379 IfxMsc_DataFramePassivePhaseLength_13, /**< \brief Passive phase length is 13 tFCL */
380 IfxMsc_DataFramePassivePhaseLength_14, /**< \brief Passive phase length is 14 tFCL */
381 IfxMsc_DataFramePassivePhaseLength_15, /**< \brief Passive phase length is 15 tFCL */
382 IfxMsc_DataFramePassivePhaseLength_16, /**< \brief Passive phase length is 16 tFCL */
383 IfxMsc_DataFramePassivePhaseLength_17, /**< \brief Passive phase length is 17 tFCL */
384 IfxMsc_DataFramePassivePhaseLength_18, /**< \brief Passive phase length is 18 tFCL */
385 IfxMsc_DataFramePassivePhaseLength_19, /**< \brief Passive phase length is 19 tFCL */
386 IfxMsc_DataFramePassivePhaseLength_20, /**< \brief Passive phase length is 20 tFCL */
387 IfxMsc_DataFramePassivePhaseLength_21, /**< \brief Passive phase length is 21 tFCL */
388 IfxMsc_DataFramePassivePhaseLength_22, /**< \brief Passive phase length is 22 tFCL */
389 IfxMsc_DataFramePassivePhaseLength_23, /**< \brief Passive phase length is 23 tFCL */
390 IfxMsc_DataFramePassivePhaseLength_24, /**< \brief Passive phase length is 24 tFCL */
391 IfxMsc_DataFramePassivePhaseLength_25, /**< \brief Passive phase length is 25 tFCL */
392 IfxMsc_DataFramePassivePhaseLength_26, /**< \brief Passive phase length is 26 tFCL */
393 IfxMsc_DataFramePassivePhaseLength_27, /**< \brief Passive phase length is 27 tFCL */
394 IfxMsc_DataFramePassivePhaseLength_28, /**< \brief Passive phase length is 28 tFCL */
395 IfxMsc_DataFramePassivePhaseLength_29, /**< \brief Passive phase length is 29 tFCL */
396 IfxMsc_DataFramePassivePhaseLength_30, /**< \brief Passive phase length is 30 tFCL */
397 IfxMsc_DataFramePassivePhaseLength_31, /**< \brief Passive phase length is 31 tFCL */
398 IfxMsc_DataFramePassivePhaseLength_32 /**< \brief Passive phase length is 32 tFCL */
399 } IfxMsc_DataFramePassivePhaseLength;
400
401 /** \brief Divider mode
402 */
403 typedef enum
404 {
405 IfxMsc_DividerMode_normal = 1, /**< \brief divider mode is normal */
406 IfxMsc_DividerMode_fractional = 2 /**< \brief divider mode is fractional */
407 } IfxMsc_DividerMode;
408
409 /** \brief Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH\n
410 * Definition in Ifx_MSC.ESR
411 */
412 typedef enum
413 {
414 IfxMsc_EmergencyStop_disabled = 0, /**< \brief Emergency stop feature for SRx bit is Disabled */
415 IfxMsc_EmergencyStop_enabled = 1 /**< \brief Emergency stop feature for SRx bit is Enabled */
416 } IfxMsc_EmergencyStop;
417
418 /** \brief Downstream Control Enhanced Register - Extension Enable\n
419 * Definition in Ifx_MSC.DSCE.B.NDBLE
420 */
421 typedef enum
422 {
423 IfxMsc_Extension_disabled = 0, /**< \brief Disables the extension bit fields */
424 IfxMsc_Extension_enabled = 1 /**< \brief Enables the extension bit fields */
425 } IfxMsc_Extension;
426
427 /** \brief Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal\n
428 * Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1
429 */
430 typedef enum
431 {
432 IfxMsc_ExternalBitInjectionPosition_0 = 0, /**< \brief Injected external bit is at Position 0 of the data frame */
433 IfxMsc_ExternalBitInjectionPosition_1, /**< \brief Injected external bit is at Position 1 of the data frame */
434 IfxMsc_ExternalBitInjectionPosition_2, /**< \brief Injected external bit is at Position 2 of the data frame */
435 IfxMsc_ExternalBitInjectionPosition_3, /**< \brief Injected external bit is at Position 3 of the data frame */
436 IfxMsc_ExternalBitInjectionPosition_4, /**< \brief Injected external bit is at Position 4 of the data frame */
437 IfxMsc_ExternalBitInjectionPosition_5, /**< \brief Injected external bit is at Position 5 of the data frame */
438 IfxMsc_ExternalBitInjectionPosition_6, /**< \brief Injected external bit is at Position 6 of the data frame */
439 IfxMsc_ExternalBitInjectionPosition_7, /**< \brief Injected external bit is at Position 7 of the data frame */
440 IfxMsc_ExternalBitInjectionPosition_8, /**< \brief Injected external bit is at Position 8 of the data frame */
441 IfxMsc_ExternalBitInjectionPosition_9, /**< \brief Injected external bit is at Position 9 of the data frame */
442 IfxMsc_ExternalBitInjectionPosition_10, /**< \brief Injected external bit is at Position 10 of the data frame */
443 IfxMsc_ExternalBitInjectionPosition_11, /**< \brief Injected external bit is at Position 11 of the data frame */
444 IfxMsc_ExternalBitInjectionPosition_12, /**< \brief Injected external bit is at Position 12 of the data frame */
445 IfxMsc_ExternalBitInjectionPosition_13, /**< \brief Injected external bit is at Position 13 of the data frame */
446 IfxMsc_ExternalBitInjectionPosition_14, /**< \brief Injected external bit is at Position 14 of the data frame */
447 IfxMsc_ExternalBitInjectionPosition_15, /**< \brief Injected external bit is at Position 15 of the data frame */
448 IfxMsc_ExternalBitInjectionPosition_16, /**< \brief Injected external bit is at Position 16 of the data frame */
449 IfxMsc_ExternalBitInjectionPosition_17, /**< \brief Injected external bit is at Position 17 of the data frame */
450 IfxMsc_ExternalBitInjectionPosition_18, /**< \brief Injected external bit is at Position 18 of the data frame */
451 IfxMsc_ExternalBitInjectionPosition_19, /**< \brief Injected external bit is at Position 19 of the data frame */
452 IfxMsc_ExternalBitInjectionPosition_20, /**< \brief Injected external bit is at Position 20 of the data frame */
453 IfxMsc_ExternalBitInjectionPosition_21, /**< \brief Injected external bit is at Position 21 of the data frame */
454 IfxMsc_ExternalBitInjectionPosition_22, /**< \brief Injected external bit is at Position 22 of the data frame */
455 IfxMsc_ExternalBitInjectionPosition_23, /**< \brief Injected external bit is at Position 23 of the data frame */
456 IfxMsc_ExternalBitInjectionPosition_24, /**< \brief Injected external bit is at Position 24 of the data frame */
457 IfxMsc_ExternalBitInjectionPosition_25, /**< \brief Injected external bit is at Position 25 of the data frame */
458 IfxMsc_ExternalBitInjectionPosition_26, /**< \brief Injected external bit is at Position 26 of the data frame */
459 IfxMsc_ExternalBitInjectionPosition_27, /**< \brief Injected external bit is at Position 27 of the data frame */
460 IfxMsc_ExternalBitInjectionPosition_28, /**< \brief Injected external bit is at Position 28 of the data frame */
461 IfxMsc_ExternalBitInjectionPosition_29, /**< \brief Injected external bit is at Position 29 of the data frame */
462 IfxMsc_ExternalBitInjectionPosition_30, /**< \brief Injected external bit is at Position 30 of the data frame */
463 IfxMsc_ExternalBitInjectionPosition_31, /**< \brief Injected external bit is at Position 31 of the data frame */
464 IfxMsc_ExternalBitInjectionPosition_32, /**< \brief Injected external bit is at Position 32 of the data frame */
465 IfxMsc_ExternalBitInjectionPosition_33, /**< \brief Injected external bit is at Position 33 of the data frame */
466 IfxMsc_ExternalBitInjectionPosition_34, /**< \brief Injected external bit is at Position 34 of the data frame */
467 IfxMsc_ExternalBitInjectionPosition_35, /**< \brief Injected external bit is at Position 35 of the data frame */
468 IfxMsc_ExternalBitInjectionPosition_36, /**< \brief Injected external bit is at Position 36 of the data frame */
469 IfxMsc_ExternalBitInjectionPosition_37, /**< \brief Injected external bit is at Position 37 of the data frame */
470 IfxMsc_ExternalBitInjectionPosition_38, /**< \brief Injected external bit is at Position 38 of the data frame */
471 IfxMsc_ExternalBitInjectionPosition_39, /**< \brief Injected external bit is at Position 39 of the data frame */
472 IfxMsc_ExternalBitInjectionPosition_40, /**< \brief Injected external bit is at Position 40 of the data frame */
473 IfxMsc_ExternalBitInjectionPosition_41, /**< \brief Injected external bit is at Position 41 of the data frame */
474 IfxMsc_ExternalBitInjectionPosition_42, /**< \brief Injected external bit is at Position 42 of the data frame */
475 IfxMsc_ExternalBitInjectionPosition_43, /**< \brief Injected external bit is at Position 43 of the data frame */
476 IfxMsc_ExternalBitInjectionPosition_44, /**< \brief Injected external bit is at Position 44 of the data frame */
477 IfxMsc_ExternalBitInjectionPosition_45, /**< \brief Injected external bit is at Position 45 of the data frame */
478 IfxMsc_ExternalBitInjectionPosition_46, /**< \brief Injected external bit is at Position 46 of the data frame */
479 IfxMsc_ExternalBitInjectionPosition_47, /**< \brief Injected external bit is at Position 47 of the data frame */
480 IfxMsc_ExternalBitInjectionPosition_48, /**< \brief Injected external bit is at Position 48 of the data frame */
481 IfxMsc_ExternalBitInjectionPosition_49, /**< \brief Injected external bit is at Position 49 of the data frame */
482 IfxMsc_ExternalBitInjectionPosition_50, /**< \brief Injected external bit is at Position 50 of the data frame */
483 IfxMsc_ExternalBitInjectionPosition_51, /**< \brief Injected external bit is at Position 51 of the data frame */
484 IfxMsc_ExternalBitInjectionPosition_52, /**< \brief Injected external bit is at Position 52 of the data frame */
485 IfxMsc_ExternalBitInjectionPosition_53, /**< \brief Injected external bit is at Position 53 of the data frame */
486 IfxMsc_ExternalBitInjectionPosition_54, /**< \brief Injected external bit is at Position 54 of the data frame */
487 IfxMsc_ExternalBitInjectionPosition_55, /**< \brief Injected external bit is at Position 55 of the data frame */
488 IfxMsc_ExternalBitInjectionPosition_56, /**< \brief Injected external bit is at Position 56 of the data frame */
489 IfxMsc_ExternalBitInjectionPosition_57, /**< \brief Injected external bit is at Position 57 of the data frame */
490 IfxMsc_ExternalBitInjectionPosition_58, /**< \brief Injected external bit is at Position 58 of the data frame */
491 IfxMsc_ExternalBitInjectionPosition_59, /**< \brief Injected external bit is at Position 59 of the data frame */
492 IfxMsc_ExternalBitInjectionPosition_60, /**< \brief Injected external bit is at Position 60 of the data frame */
493 IfxMsc_ExternalBitInjectionPosition_61, /**< \brief Injected external bit is at Position 61 of the data frame */
494 IfxMsc_ExternalBitInjectionPosition_62, /**< \brief Injected external bit is at Position 62 of the data frame */
495 IfxMsc_ExternalBitInjectionPosition_63 /**< \brief Injected external bit is at Position 63 of the data frame */
496 } IfxMsc_ExternalBitInjectionPosition;
497
498 /** \brief Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal\n
499 * Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1
500 */
501 typedef enum
502 {
503 IfxMsc_ExternalSignalInjection_disabled = 0, /**< \brief Disables the external signal injection in a data frame */
504 IfxMsc_ExternalSignalInjection_enabled = 1 /**< \brief Enables the external signal injection in a data frame */
505 } IfxMsc_ExternalSignalInjection;
506
507 /** \brief Output Control Register - Clock Control\n
508 * Definition in Ifx_MSC.OCR.B.CLKCTRL
509 */
510 typedef enum
511 {
512 IfxMsc_FclClockControlEnabled_activePhaseOnly = 0, /**< \brief FCL is active during active phases of data or command frames */
513 IfxMsc_FclClockControlEnabled_always = 1 /**< \brief FCL is always active */
514 } IfxMsc_FclClockControlEnabled;
515
516 /** \brief Output Control Register - FCLP Line Polarity\n
517 * Definition in Ifx_MSC.OCR.B.CLP
518 */
519 typedef enum
520 {
521 IfxMsc_FclLinePolarity_nonInverted = 0, /**< \brief FCLP and FCL signal polarity is identical */
522 IfxMsc_FclLinePolarity_inverted = 1 /**< \brief FCLP signal has inverted FCL signal polarity */
523 } IfxMsc_FclLinePolarity;
524
525 /** \brief Enable hardware clock control
526 */
527 typedef enum
528 {
529 IfxMsc_HardwareClock_disabled = 0, /**< \brief Hardware clock disable */
530 IfxMsc_HardwareClock_enabled = 1 /**< \brief Hardware clock enable */
531 } IfxMsc_HardwareClock;
532
533 /** \brief Interrupt Service Request
534 */
535 typedef enum
536 {
537 IfxMsc_InterruptServiceRequest_0 = 0, /**< \brief Interrupt Service Request number0 */
538 IfxMsc_InterruptServiceRequest_1, /**< \brief Interrupt Service Request number1 */
539 IfxMsc_InterruptServiceRequest_2, /**< \brief Interrupt Service Request number2 */
540 IfxMsc_InterruptServiceRequest_3, /**< \brief Interrupt Service Request number3 */
541 IfxMsc_InterruptServiceRequest_4 /**< \brief Interrupt Service Request number4 */
542 } IfxMsc_InterruptServiceRequest;
543
544 /** \brief OCDS Control and Status - OCDS Suspend Control
545 * Definition in Ifx_MSC.OCS.B.SUS
546 */
547 typedef enum
548 {
549 IfxMsc_ModuleSuspendRequestBit_noSuspend = 0, /**< \brief OCDS is not suspended */
550 IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1, /**< \brief OCDS is Hard suspended. Clock is switched off immediately */
551 IfxMsc_ModuleSuspendRequestBit_softSuspend = 2 /**< \brief OCDS is Soft suspended */
552 } IfxMsc_ModuleSuspendRequestBit;
553
554 /** \brief Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)\n
555 * Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE
556 */
557 typedef enum
558 {
559 IfxMsc_MsbBitDataExtension_notPresent = 0, /**< \brief Additional MSB bit is not present in the extension of the NDBL/NDBH bit field */
560 IfxMsc_MsbBitDataExtension_present = 1 /**< \brief Additional MSB bit is present in the extension of the NDBL/NDBH bit field */
561 } IfxMsc_MsbBitDataExtension;
562
563 /** \brief Asynchronous Block Configuration Register - N Divider ABRA\n
564 * Definition in Ifx_MSC.ABC.B.NDA
565 */
566 typedef enum
567 {
568 IfxMsc_NDividerAbra_1 = 0, /**< \brief Division ratio is 1 */
569 IfxMsc_NDividerAbra_2, /**< \brief Division ratio is 2 */
570 IfxMsc_NDividerAbra_3, /**< \brief Division ratio is 3 */
571 IfxMsc_NDividerAbra_4, /**< \brief Division ratio is 4 */
572 IfxMsc_NDividerAbra_5, /**< \brief Division ratio is 5 */
573 IfxMsc_NDividerAbra_6, /**< \brief Division ratio is 6 */
574 IfxMsc_NDividerAbra_7, /**< \brief Division ratio is 7 */
575 IfxMsc_NDividerAbra_8 /**< \brief Division ratio is 8 */
576 } IfxMsc_NDividerAbra;
577
578 /** \brief Downstream Timing Extension Register - N Divider Downstream\n
579 * Definition in Ifx_MSC.DSTE.B.NDD
580 */
581 typedef enum
582 {
583 IfxMsc_NDividerDownstream_1 = 0, /**< \brief division ratio is 1 */
584 IfxMsc_NDividerDownstream_2, /**< \brief division ratio is 2 */
585 IfxMsc_NDividerDownstream_3, /**< \brief division ratio is 3 */
586 IfxMsc_NDividerDownstream_4, /**< \brief division ratio is 4 */
587 IfxMsc_NDividerDownstream_5, /**< \brief division ratio is 5 */
588 IfxMsc_NDividerDownstream_6, /**< \brief division ratio is 6 */
589 IfxMsc_NDividerDownstream_7, /**< \brief division ratio is 7 */
590 IfxMsc_NDividerDownstream_8, /**< \brief division ratio is 8 */
591 IfxMsc_NDividerDownstream_9, /**< \brief division ratio is 9 */
592 IfxMsc_NDividerDownstream_10, /**< \brief division ratio is 10 */
593 IfxMsc_NDividerDownstream_11, /**< \brief division ratio is 11 */
594 IfxMsc_NDividerDownstream_12, /**< \brief division ratio is 12 */
595 IfxMsc_NDividerDownstream_13, /**< \brief division ratio is 13 */
596 IfxMsc_NDividerDownstream_14, /**< \brief division ratio is 14 */
597 IfxMsc_NDividerDownstream_15, /**< \brief division ratio is 15 */
598 IfxMsc_NDividerDownstream_16 /**< \brief division ratio is 16 */
599 } IfxMsc_NDividerDownstream;
600
601 /** \brief Asynchronous Block Configuration Register - Overflow Interrupt Enable\n
602 * Definition in Ifx_MSC.ABC.B.OIE
603 */
604 typedef enum
605 {
606 IfxMsc_OverflowInterrupt_disabled = 0, /**< \brief Disables the path of the overflow interrupt towards the interrupt node */
607 IfxMsc_OverflowInterrupt_enabled = 1 /**< \brief Enables the path of the overflow interrupt towards the interrupt node */
608 } IfxMsc_OverflowInterrupt;
609
610 /** \brief Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer\n
611 * Definition in Ifx_MSC.ABC.B.OIP
612 */
613 typedef enum
614 {
615 IfxMsc_OverflowInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
616 IfxMsc_OverflowInterruptNode_SR1, /**< \brief Service request output SR1 selected */
617 IfxMsc_OverflowInterruptNode_SR2, /**< \brief Service request output SR2 selected */
618 IfxMsc_OverflowInterruptNode_SR3, /**< \brief Service request output SR3 selected */
619 IfxMsc_OverflowInterruptNode_SR4 /**< \brief Service request output SR4 selected */
620 } IfxMsc_OverflowInterruptNode;
621
622 /** \brief Parity Mode\n
623 * Definition in Ifx_MSC.USR.B.PCT
624 */
625 typedef enum
626 {
627 IfxMsc_Parity_even = 0, /**< \brief Even Parity */
628 IfxMsc_Parity_odd = 1 /**< \brief Odd Parity */
629 } IfxMsc_Parity;
630
631 /** \brief Downstream Status Register - Number Of Passive Time Frames\n
632 * Definition in Ifx_MSC.DSS.B.NPTF
633 */
634 typedef enum
635 {
636 IfxMsc_PassiveTimeFrameCount_0 = 0, /**< \brief No Passive time frames inserted */
637 IfxMsc_PassiveTimeFrameCount_1 = 1, /**< \brief 1 Passive time frames inserted */
638 IfxMsc_PassiveTimeFrameCount_2, /**< \brief 2 Passive time frames inserted */
639 IfxMsc_PassiveTimeFrameCount_3, /**< \brief 3 Passive time frames inserted */
640 IfxMsc_PassiveTimeFrameCount_4, /**< \brief 4 Passive time frames inserted */
641 IfxMsc_PassiveTimeFrameCount_5, /**< \brief 5 Passive time frames inserted */
642 IfxMsc_PassiveTimeFrameCount_6, /**< \brief 6 Passive time frames inserted */
643 IfxMsc_PassiveTimeFrameCount_7, /**< \brief 7 Passive time frames inserted */
644 IfxMsc_PassiveTimeFrameCount_8, /**< \brief 8 Passive time frames inserted */
645 IfxMsc_PassiveTimeFrameCount_9, /**< \brief 9 Passive time frames inserted */
646 IfxMsc_PassiveTimeFrameCount_10, /**< \brief 10 Passive time frames inserted */
647 IfxMsc_PassiveTimeFrameCount_11, /**< \brief 11 Passive time frames inserted */
648 IfxMsc_PassiveTimeFrameCount_12, /**< \brief 12 Passive time frames inserted */
649 IfxMsc_PassiveTimeFrameCount_13, /**< \brief 13 Passive time frames inserted */
650 IfxMsc_PassiveTimeFrameCount_14, /**< \brief 14 Passive time frames inserted */
651 IfxMsc_PassiveTimeFrameCount_15 /**< \brief 15 Passive time frames inserted */
652 } IfxMsc_PassiveTimeFrameCount;
653
654 /** \brief Interrupt Control Register - Receive Data Interrupt Enable\n
655 * Definition in Ifx_MSC.ICR.B.RDIE
656 */
657 typedef enum
658 {
659 IfxMsc_ReceiveDataInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
660 IfxMsc_ReceiveDataInterrupt_onDataReceive = 1, /**< \brief An interrupt is generated when data is received and written into the upstream data registers */
661 IfxMsc_ReceiveDataInterrupt_onRdieSet = 2, /**< \brief An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H */
662 IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3 /**< \brief An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H */
663 } IfxMsc_ReceiveDataInterrupt;
664
665 /** \brief Interrupt Control Register - Receive Data Interrupt Pointer\n
666 * Definition in Ifx_MSC.ICR.B.RDIP
667 */
668 typedef enum
669 {
670 IfxMsc_ReceiveDataInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
671 IfxMsc_ReceiveDataInterruptNode_SR1, /**< \brief Service request output SR1 selected */
672 IfxMsc_ReceiveDataInterruptNode_SR2, /**< \brief Service request output SR2 selected */
673 IfxMsc_ReceiveDataInterruptNode_SR3 /**< \brief Service request output SR3 selected */
674 } IfxMsc_ReceiveDataInterruptNode;
675
676 /** \brief Output Control Register - SDI Line Polarity\n
677 * Definition in Ifx_MSC.OCR.B.ILP
678 */
679 typedef enum
680 {
681 IfxMsc_SdiLinePolarity_likeSi = 0, /**< \brief SDI and SI signal polarities are identical */
682 IfxMsc_SdiLinePolarity_invertedSi = 1 /**< \brief SDI and SI signal polarities are inverted */
683 } IfxMsc_SdiLinePolarity;
684
685 /** \brief Output Control Register - Serial Data Input Selection\n
686 * Definition in Ifx_MSC.OCR.B.SDISEL
687 */
688 typedef enum
689 {
690 IfxMsc_SerialDataInput_0 = 0, /**< \brief SDI0 is selected for the SDI of the upstream channel */
691 IfxMsc_SerialDataInput_1, /**< \brief SDI1 is selected for the SDI of the upstream channel */
692 IfxMsc_SerialDataInput_2, /**< \brief SDI2 is selected for the SDI of the upstream channel */
693 IfxMsc_SerialDataInput_3, /**< \brief SDI3 is selected for the SDI of the upstream channel */
694 IfxMsc_SerialDataInput_4, /**< \brief SDI4 is selected for the SDI of the upstream channel */
695 IfxMsc_SerialDataInput_5, /**< \brief SDI5 is selected for the SDI of the upstream channel */
696 IfxMsc_SerialDataInput_6, /**< \brief SDI6 is selected for the SDI of the upstream channel */
697 IfxMsc_SerialDataInput_7 /**< \brief SDI7 is selected for the SDI of the upstream channel */
698 } IfxMsc_SerialDataInput;
699
700 /** \brief Service Request Delay\n
701 * Definition in Ifx_MSC.USR.B.SRDC
702 */
703 typedef enum
704 {
705 IfxMsc_ServiceRequestDelay_noDelay = 0, /**< \brief No Delay */
706 IfxMsc_ServiceRequestDelay_1bit = 1 /**< \brief Delay of 1 bit time */
707 } IfxMsc_ServiceRequestDelay;
708
709 /** \brief Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock\n
710 * Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH
711 */
712 typedef enum
713 {
714 IfxMsc_ShiftClockPhaseDuration_1 = 0, /**< \brief Duration in periods of f_A is 1 */
715 IfxMsc_ShiftClockPhaseDuration_2, /**< \brief Duration in periods of f_A is 2 */
716 IfxMsc_ShiftClockPhaseDuration_3, /**< \brief Duration in periods of f_A is 3 */
717 IfxMsc_ShiftClockPhaseDuration_4, /**< \brief Duration in periods of f_A is 4 */
718 IfxMsc_ShiftClockPhaseDuration_5, /**< \brief Duration in periods of f_A is 5 */
719 IfxMsc_ShiftClockPhaseDuration_6, /**< \brief Duration in periods of f_A is 6 */
720 IfxMsc_ShiftClockPhaseDuration_7, /**< \brief Duration in periods of f_A is 7 */
721 IfxMsc_ShiftClockPhaseDuration_8, /**< \brief Duration in periods of f_A is 8 */
722 IfxMsc_ShiftClockPhaseDuration_9, /**< \brief Duration in periods of f_A is 9 */
723 IfxMsc_ShiftClockPhaseDuration_10, /**< \brief Duration in periods of f_A is 10 */
724 IfxMsc_ShiftClockPhaseDuration_11, /**< \brief Duration in periods of f_A is 11 */
725 IfxMsc_ShiftClockPhaseDuration_12, /**< \brief Duration in periods of f_A is 12 */
726 IfxMsc_ShiftClockPhaseDuration_13, /**< \brief Duration in periods of f_A is 13 */
727 IfxMsc_ShiftClockPhaseDuration_14, /**< \brief Duration in periods of f_A is 14 */
728 IfxMsc_ShiftClockPhaseDuration_15, /**< \brief Duration in periods of f_A is 15 */
729 IfxMsc_ShiftClockPhaseDuration_16 /**< \brief Duration in periods of f_A is 16 */
730 } IfxMsc_ShiftClockPhaseDuration;
731
732 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
733 * Definition in Ifx_MSC.CLC.B.EDIS
734 */
735 typedef enum
736 {
737 IfxMsc_SleepMode_enable = 0, /**< \brief enables sleep mode */
738 IfxMsc_SleepMode_disable = 1 /**< \brief disables sleep mode */
739 } IfxMsc_SleepMode;
740
741 /** \brief Output Control Register - SOP Line Polarity\n
742 * Definition in Ifx_MSC.OCR.B.SLP
743 */
744 typedef enum
745 {
746 IfxMsc_SoLinePolarity_nonInverted = 0, /**< \brief SOP and SO polarity is identical */
747 IfxMsc_SoLinePolarity_inverted = 1 /**< \brief SOP and SO polarity is inverted */
748 } IfxMsc_SoLinePolarity;
749
750 /** \brief Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames\n
751 * Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH
752 */
753 typedef enum
754 {
755 IfxMsc_Source_downstreamDataRegister = 0, /**< \brief SRx[16] is taken from data Register DD.DDL[xx] */
756 IfxMsc_Source_alternateInputLine = 2, /**< \brief SRx[16] is taken from ALTINL input line */
757 IfxMsc_Source_alternateInputLineInverted = 3 /**< \brief SRx[16] is taken from ALTINL input line in inverted state */
758 } IfxMsc_Source;
759
760 /** \brief OCDS Suspend Control (OCDS.SUS)
761 */
762 typedef enum
763 {
764 IfxMsc_SuspendMode_none = 0, /**< \brief No suspend */
765 IfxMsc_SuspendMode_hard = 1, /**< \brief Hard Suspend */
766 IfxMsc_SuspendMode_soft = 2 /**< \brief Soft Suspend */
767 } IfxMsc_SuspendMode;
768
769 /** \brief Msc Targets - use as chip enable selection for ENH, ENL and ENC
770 */
771 typedef enum
772 {
773 IfxMsc_Target_en0 = 0, /**< \brief Target EN0 */
774 IfxMsc_Target_en1, /**< \brief Target EN1 */
775 IfxMsc_Target_en2, /**< \brief Target EN2 */
776 IfxMsc_Target_en3 /**< \brief Target EN3 */
777 } IfxMsc_Target;
778
779 /** \brief Interrupt Control Register - Time Frame Interrupt Enable\n
780 * Definition in Ifx_MSC.ICR.B.TFIE
781 */
782 typedef enum
783 {
784 IfxMsc_TimeFrameInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
785 IfxMsc_TimeFrameInterrupt_enabled = 1 /**< \brief Interrupt generation enabled */
786 } IfxMsc_TimeFrameInterrupt;
787
788 /** \brief Interrupt Control Register - Time Frame Interrupt Pointer\n
789 * Definition in Ifx_MSC.ICR.B.TFIP
790 */
791 typedef enum
792 {
793 IfxMsc_TimeFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
794 IfxMsc_TimeFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
795 IfxMsc_TimeFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
796 IfxMsc_TimeFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
797 } IfxMsc_TimeFrameInterruptNode;
798
799 /** \brief Downstream Channel Transmission Mode\n
800 * Definition in Ifx_MSC.DSC.B.TM
801 */
802 typedef enum
803 {
804 IfxMsc_TransmissionMode_triggered = 0, /**< \brief Triggered Mode */
805 IfxMsc_TransmissionMode_dataRepetition = 1 /**< \brief Data Repetition Mode */
806 } IfxMsc_TransmissionMode;
807
808 /** \brief Asynchronous Block Configuration Register - Underflow Interrupt Enable\n
809 * Definition in Ifx_MSC.ABC.B.UIE
810 */
811 typedef enum
812 {
813 IfxMsc_UnderflowInterrupt_disabled = 0, /**< \brief Disables the path of the Underflow interrupt towards the interrupt node */
814 IfxMsc_UnderflowInterrupt_enabled = 1 /**< \brief Enables the path of the Underflow interrupt towards the interrupt node */
815 } IfxMsc_UnderflowInterrupt;
816
817 /** \brief Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer\n
818 * Definition in Ifx_MSC.ABC.B.UIP
819 */
820 typedef enum
821 {
822 IfxMsc_UnderflowInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
823 IfxMsc_UnderflowInterruptNode_SR1, /**< \brief Service request output SR1 selected */
824 IfxMsc_UnderflowInterruptNode_SR2, /**< \brief Service request output SR2 selected */
825 IfxMsc_UnderflowInterruptNode_SR3, /**< \brief Service request output SR3 selected */
826 IfxMsc_UnderflowInterruptNode_SR4 /**< \brief Service request output SR4 selected */
827 } IfxMsc_UnderflowInterruptNode;
828
829 /** \brief Channel Frame Type\n
830 * Definition in Ifx_MSC.USR.B.UFT
831 */
832 typedef enum
833 {
834 IfxMsc_UpstreamChannelFrameType_12bit = 0, /**< \brief 12-bit Upstream frame selected */
835 IfxMsc_UpstreamChannelFrameType_16bit = 1 /**< \brief 16-bit Upstream frame selected */
836 } IfxMsc_UpstreamChannelFrameType;
837
838 /** \brief Upstream Receiving Rate\n
839 * Definition in Ifx_MSC.USR.B.URR
840 */
841 typedef enum
842 {
843 IfxMsc_UpstreamChannelReceivingRate_disabled = 0, /**< \brief Disabled */
844 IfxMsc_UpstreamChannelReceivingRate_4 = 1, /**< \brief Baud rate = f_MSC / 4 */
845 IfxMsc_UpstreamChannelReceivingRate_8 = 2, /**< \brief Baud rate = f_MSC / 8 */
846 IfxMsc_UpstreamChannelReceivingRate_16 = 3, /**< \brief Baud rate = f_MSC / 16 */
847 IfxMsc_UpstreamChannelReceivingRate_32 = 4, /**< \brief Baud rate = f_MSC / 32 */
848 IfxMsc_UpstreamChannelReceivingRate_64 = 5, /**< \brief Baud rate = f_MSC / 64 */
849 IfxMsc_UpstreamChannelReceivingRate_128 = 6, /**< \brief Baud rate = f_MSC / 128 */
850 IfxMsc_UpstreamChannelReceivingRate_256 = 7 /**< \brief Baud rate = f_MSC / 256 */
851 } IfxMsc_UpstreamChannelReceivingRate;
852
853 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable\n
854 * Definition in Ifx_MSC.USCE.B.USTOEN
855 */
856 typedef enum
857 {
858 IfxMsc_UpstreamTimeoutInterrupt_disabled = 0, /**< \brief Upstream Timeout Interrupt Disabled */
859 IfxMsc_UpstreamTimeoutInterrupt_enabled = 1 /**< \brief Upstream Timeout Interrupt Enabled */
860 } IfxMsc_UpstreamTimeoutInterrupt;
861
862 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer\n
863 * Definition in Ifx_MSC.USCE.B.USTOIP
864 */
865 typedef enum
866 {
867 IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
868 IfxMsc_UpstreamTimeoutInterruptNode_SR1, /**< \brief Service request output SR1 selected */
869 IfxMsc_UpstreamTimeoutInterruptNode_SR2, /**< \brief Service request output SR2 selected */
870 IfxMsc_UpstreamTimeoutInterruptNode_SR3, /**< \brief Service request output SR3 selected */
871 IfxMsc_UpstreamTimeoutInterruptNode_SR4 /**< \brief Service request output SR4 selected */
872 } IfxMsc_UpstreamTimeoutInterruptNode;
873
874 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler\n
875 * Definition in Ifx_MSC.USCE.B.USTOPRE
876 */
877 typedef enum
878 {
879 IfxMsc_UpstreamTimeoutPrescaler_1 = 0, /**< \brief Prescale value 1 for the upstream time-out limit */
880 IfxMsc_UpstreamTimeoutPrescaler_2 = 1, /**< \brief Prescale value 2 for the upstream time-out limit */
881 IfxMsc_UpstreamTimeoutPrescaler_4 = 2, /**< \brief Prescale value 4 for the upstream time-out limit */
882 IfxMsc_UpstreamTimeoutPrescaler_8 = 3, /**< \brief Prescale value 8 for the upstream time-out limit */
883 IfxMsc_UpstreamTimeoutPrescaler_16 = 4, /**< \brief Prescale value 16 for the upstream time-out limit */
884 IfxMsc_UpstreamTimeoutPrescaler_32 = 5, /**< \brief Prescale value 32 for the upstream time-out limit */
885 IfxMsc_UpstreamTimeoutPrescaler_64 = 6, /**< \brief Prescale value 64 for the upstream time-out limit */
886 IfxMsc_UpstreamTimeoutPrescaler_128 = 7, /**< \brief Prescale value 128 for the upstream time-out limit */
887 IfxMsc_UpstreamTimeoutPrescaler_256 = 8, /**< \brief Prescale value 256 for the upstream time-out limit */
888 IfxMsc_UpstreamTimeoutPrescaler_512 = 9, /**< \brief Prescale value 512 for the upstream time-out limit */
889 IfxMsc_UpstreamTimeoutPrescaler_1024 = 10, /**< \brief Prescale value 1024 for the upstream time-out limit */
890 IfxMsc_UpstreamTimeoutPrescaler_2048 = 11, /**< \brief Prescale value 2048 for the upstream time-out limit */
891 IfxMsc_UpstreamTimeoutPrescaler_4096 = 12, /**< \brief Prescale value 4096 for the upstream time-out limit */
892 IfxMsc_UpstreamTimeoutPrescaler_8192 = 13, /**< \brief Prescale value 8192 for the upstream time-out limit */
893 IfxMsc_UpstreamTimeoutPrescaler_16384 = 14, /**< \brief Prescale value 16384 for the upstream time-out limit */
894 IfxMsc_UpstreamTimeoutPrescaler_32768 = 15 /**< \brief Prescale value 32768 for the upstream time-out limit */
895 } IfxMsc_UpstreamTimeoutPrescaler;
896
897 /** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Value\n
898 * Definition in Ifx_MSC.USCE.B.USTOVAL
899 */
900 typedef enum
901 {
902 IfxMsc_UpstreamTimeoutValue_1 = 0, /**< \brief Upstream timeout value for the N-Divider */
903 IfxMsc_UpstreamTimeoutValue_2, /**< \brief Upstream timeout value for the N-Divider */
904 IfxMsc_UpstreamTimeoutValue_3, /**< \brief Upstream timeout value for the N-Divider */
905 IfxMsc_UpstreamTimeoutValue_4, /**< \brief Upstream timeout value for the N-Divider */
906 IfxMsc_UpstreamTimeoutValue_5, /**< \brief Upstream timeout value for the N-Divider */
907 IfxMsc_UpstreamTimeoutValue_6, /**< \brief Upstream timeout value for the N-Divider */
908 IfxMsc_UpstreamTimeoutValue_7, /**< \brief Upstream timeout value for the N-Divider */
909 IfxMsc_UpstreamTimeoutValue_8, /**< \brief Upstream timeout value for the N-Divider */
910 IfxMsc_UpstreamTimeoutValue_9, /**< \brief Upstream timeout value for the N-Divider */
911 IfxMsc_UpstreamTimeoutValue_10, /**< \brief Upstream timeout value for the N-Divider */
912 IfxMsc_UpstreamTimeoutValue_11, /**< \brief Upstream timeout value for the N-Divider */
913 IfxMsc_UpstreamTimeoutValue_12, /**< \brief Upstream timeout value for the N-Divider */
914 IfxMsc_UpstreamTimeoutValue_13, /**< \brief Upstream timeout value for the N-Divider */
915 IfxMsc_UpstreamTimeoutValue_14, /**< \brief Upstream timeout value for the N-Divider */
916 IfxMsc_UpstreamTimeoutValue_15, /**< \brief Upstream timeout value for the N-Divider */
917 IfxMsc_UpstreamTimeoutValue_16 /**< \brief Upstream timeout value for the N-Divider */
918 } IfxMsc_UpstreamTimeoutValue;
919
920 /** \} */
921
922 /** \addtogroup IfxLld_Msc_Std_Config_Flags
923 * \{ */
924
925 /******************************************************************************/
926 /*-------------------------Inline Function Prototypes-------------------------*/
927 /******************************************************************************/
928
929 /** \brief Clear ABRA overflow flag
930 * \param msc pointer to the base of MSC registers
931 * \return None
932 */
933 IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc);
934
935 /** \brief Clear ABRA underflow flag
936 * \param msc pointer to the base of MSC registers
937 * \return None
938 */
939 IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc);
940
941 /** \brief Clear Upstream timeout
942 * \param msc pointer to the base of MSC registers
943 * \return None
944 */
945 IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc);
946
947 /** \brief Clear the valid flag
948 * \param msc pointer to the base of MSC registers
949 * \param upstreamIdx data register ID
950 * \return None
951 */
952 IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx);
953
954 /** \brief Get the status of the valid flag
955 * \param msc pointer to the base of MSC registers
956 * \param upstreamIdx data register ID
957 * \return Status TRUE or FALSE
958 */
959 IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx);
960
961 /** \} */
962
963 /** \addtogroup IfxLld_Msc_Std_Set_Command_Target
964 * \{ */
965
966 /******************************************************************************/
967 /*-------------------------Inline Function Prototypes-------------------------*/
968 /******************************************************************************/
969
970 /** \brief Select the target for command phase
971 * \param msc pointer to the base of MSC registers
972 * \param enX Target to be selected
973 * \return None
974 */
975 IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX);
976
977 /** \} */
978
979 /** \addtogroup IfxLld_Msc_Std_Set_Data
980 * \{ */
981
982 /******************************************************************************/
983 /*-------------------------Inline Function Prototypes-------------------------*/
984 /******************************************************************************/
985
986 /** \brief Select the target for data high phase
987 * \param msc pointer to the base of MSC registers
988 * \param enX Target to be selected
989 * \return None
990 */
991 IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX);
992
993 /** \brief Select the target for data low phase
994 * \param msc pointer to the base of MSC registers
995 * \param enX Target to be selected
996 * \return None
997 */
998 IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX);
999
1000 /** \} */
1001
1002 /** \addtogroup IfxLld_Msc_Std_Get_Data
1003 * \{ */
1004
1005 /******************************************************************************/
1006 /*-------------------------Inline Function Prototypes-------------------------*/
1007 /******************************************************************************/
1008
1009 /** \brief Get the upstream data from upstream data register
1010 * \param msc pointer to the base of MSC registers
1011 * \param upstreamIdx Upstream data register ID
1012 * \return Recevived data
1013 */
1014 IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx);
1015
1016 /** \brief Get the selected target during high phase
1017 * \param msc pointer to the base of MSC registers
1018 * \return Selected target
1019 */
1020 IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc);
1021
1022 /** \brief Get the selected target during low phase
1023 * \param msc pointer to the base of MSC registers
1024 * \return Selected target
1025 */
1026 IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc);
1027
1028 /** \} */
1029
1030 /** \addtogroup IfxLld_Msc_Std_Enable_Module
1031 * \{ */
1032
1033 /******************************************************************************/
1034 /*-------------------------Global Function Prototypes-------------------------*/
1035 /******************************************************************************/
1036
1037 /** \brief Disable MSC kernel
1038 * \param msc pointer to the base of MSC registers
1039 * \return None
1040 */
1041 IFX_EXTERN void IfxMsc_disableModule(Ifx_MSC *msc);
1042
1043 /** \brief Enable MSC kernel
1044 * \param msc pointer to the base of MSC registers
1045 * \return None
1046 */
1047 IFX_EXTERN void IfxMsc_enableModule(Ifx_MSC *msc);
1048
1049 /** \} */
1050
1051 /** \addtogroup IfxLld_Msc_Std_Reset_Module
1052 * \{ */
1053
1054 /******************************************************************************/
1055 /*-------------------------Global Function Prototypes-------------------------*/
1056 /******************************************************************************/
1057
1058 /** \brief Clear reset bit of MSC kernel
1059 * \param msc pointer to the base of MSC registers
1060 * \return None
1061 */
1062 IFX_EXTERN void IfxMsc_clearReset(Ifx_MSC *msc);
1063
1064 /** \brief Reset MSC kernel
1065 * \param msc pointer to the base of MSC registers
1066 * \return None
1067 */
1068 IFX_EXTERN void IfxMsc_resetModule(Ifx_MSC *msc);
1069
1070 /** \} */
1071
1072 /** \addtogroup IfxLld_Msc_Std_Baud_Calculator
1073 * \{ */
1074
1075 /******************************************************************************/
1076 /*-------------------------Global Function Prototypes-------------------------*/
1077 /******************************************************************************/
1078
1079 /** \brief Get the NDD value for the supplied baud rate when when ABRA block is enabled
1080 * \param baud Required baud rate
1081 * \return NDD value
1082 */
1083 IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud);
1084
1085 /** \brief Get the step value for the supplied baud rate when divider mode is fractional
1086 * \param msc pointer to the base of MSC registers
1087 * \param baud Required baud rate
1088 * \return Step value
1089 */
1090 IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1091
1092 /** \brief Get the step value for the supplied baud rate when divider mode is normal
1093 * \param msc pointer to the base of MSC registers
1094 * \param baud Required baud rate
1095 * \return Step value
1096 */
1097 IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1098
1099 /** \} */
1100
1101 /** \addtogroup IfxLld_Msc_Std_IO
1102 * \{ */
1103
1104 /******************************************************************************/
1105 /*-------------------------Inline Function Prototypes-------------------------*/
1106 /******************************************************************************/
1107
1108 /** \brief Initializes a EN output
1109 * \param en the EN Pin which should be configured
1110 * \param pinMode the pin output mode which should be configured
1111 * \param padDriver the pad driver mode which should be configured
1112 * \return None
1113 */
1114 IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1115
1116 /** \brief Initializes a FCLN output
1117 * \param fcln the FCLN Pin which should be configured
1118 * \param pinMode the pin output mode which should be configured
1119 * \param padDriver the pad driver mode which should be configured
1120 * \return None
1121 */
1122 IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1123
1124 /** \brief Initializes a FCLP output
1125 * \param fclp the FCLP Pin which should be configured
1126 * \param pinMode the pin output mode which should be configured
1127 * \param padDriver the pad driver mode which should be configured
1128 * \return None
1129 */
1130 IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1131
1132 /** \brief Initializes a INJ input
1133 * \param inj the INJ Pin which should be configured
1134 * \param pinMode the pin input mode which should be configured
1135 * \param padDriver the pad driver mode which should be configured
1136 * \return None
1137 */
1138 IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
1139
1140 /** \brief Initializes a SDI input
1141 * \param sdi the SDI Pin which should be configured
1142 * \param pinMode the pin input mode which should be configured
1143 * \param padDriver the pad driver mode which should be configured
1144 * \return None
1145 */
1146 IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
1147
1148 /** \brief Initializes a SON output
1149 * \param son the SON Pin which should be configured
1150 * \param pinMode the pin output mode which should be configured
1151 * \param padDriver the pad driver mode which should be configured
1152 * \return None
1153 */
1154 IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1155
1156 /** \brief Initializes a SOP output
1157 * \param sop the SOP Pin which should be configured
1158 * \param pinMode the pin output mode which should be configured
1159 * \param padDriver the pad driver mode which should be configured
1160 * \return None
1161 */
1162 IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
1163
1164 /** \} */
1165
1166 /** \addtogroup IfxLld_Msc_Std_Module
1167 * \{ */
1168
1169 /******************************************************************************/
1170 /*-------------------------Global Function Prototypes-------------------------*/
1171 /******************************************************************************/
1172
1173 /**
1174 * \param msc Resource index of the MSC
1175 * \return MSC module register address
1176 */
1177 IFX_EXTERN Ifx_MSC *IfxMsc_getAddress(IfxMsc_Index msc);
1178
1179 /** \brief API to get the resource index of the MSC specified.
1180 * \param msc Pointer to the MSC HW module (register memory map)
1181 * \return Resource index of the ERAY
1182 */
1183 IFX_EXTERN IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc);
1184
1185 /** \} */
1186
1187 /******************************************************************************/
1188 /*-------------------------Inline Function Prototypes-------------------------*/
1189 /******************************************************************************/
1190
1191 /** \brief Clears The Recieve Data Interrupt Flag
1192 * \param msc pointer to the base of MSC registers
1193 * \return None
1194 */
1195 IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc);
1196
1197 /** \brief Clears the Valid bit
1198 * \param msc pointer to the base of MSC registers
1199 * \param upstreamIdx upstream index
1200 * \return None
1201 */
1202 IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx);
1203
1204 /** \brief Disables the Upstream Timeout Interrupt
1205 * \param msc pointer to the base of MSC registers
1206 * \return None
1207 */
1208 IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc);
1209
1210 /** \brief Enables the Upstream Timeout Interrupt
1211 * \param msc pointer to the base of MSC registers
1212 * \return None
1213 */
1214 IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc);
1215
1216 /** \brief Returns the value of Asynchronous clock Bypass bit.
1217 * \param msc pointer to the base of MSC registers
1218 * \return Get the value of Asynchronous clock bypass enable bit.
1219 */
1220 IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc);
1221
1222 /** \brief Returns the value of Down stream extension enable bit.
1223 * \param msc pointer to the base of MSC registers
1224 * \return Get the value of Down stream extension enable bit.
1225 */
1226 IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc);
1227
1228 /** \brief Returns the Recieve DataInterrupt Flag Status
1229 * \param msc pointer to the base of MSC registers
1230 * \return Status
1231 */
1232 IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc);
1233
1234 /** \brief Returns the Src pointer for the selected MSC interrupt node
1235 * \param msc pointer to the base of MSC registers
1236 * \param intRequest Interrupt Request
1237 * \return Pointer to SRCR register
1238 */
1239 IFX_INLINE volatile Ifx_SRC_SRCR *IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest);
1240
1241 /** \brief Returns the Upstream Data
1242 * \param msc pointer to the base of MSC registers
1243 * \param upstreamIdx upstream index
1244 * \return Upstream Data
1245 */
1246 IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx);
1247
1248 /** \brief Returns the Upstream Parity Error Flag Status
1249 * \param msc pointer to the base of MSC registers
1250 * \param upstreamIdx upstream index
1251 * \return Status
1252 */
1253 IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx);
1254
1255 /** \brief Returns Upstream Timeout Flag Status
1256 * \param msc pointer to the base of MSC registers
1257 * \return Status
1258 */
1259 IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc);
1260
1261 /** \brief Returns the module's suspend state.
1262 * TRUE :if module is suspended.
1263 * FALSE:if module is not yet suspended.
1264 * \param msc Pointer to MSC module registers
1265 * \return Suspend status (TRUE / FALSE)
1266 */
1267 IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc);
1268
1269 /** \brief Set or reset the Asynchronous clock bypass bit.
1270 * \param msc pointer to the base of MSC registers
1271 * \param value Set / reset value.
1272 * \return None
1273 */
1274 IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value);
1275
1276 /** \brief Sets the Down stream data
1277 * \param msc pointer to the base of MSC registers
1278 * \param data Data
1279 * \return None
1280 */
1281 IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data);
1282
1283 /** \brief Set or reset the Down stream extension enable bit.
1284 * \param msc pointer to the base of MSC registers
1285 * \param value Set / reset value.
1286 * \return None
1287 */
1288 IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value);
1289
1290 /** \brief Sets the Down stream Extension data
1291 * \param msc pointer to the base of MSC registers
1292 * \param data Data
1293 * \return None
1294 */
1295 IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data);
1296
1297 /** \brief Sets The Fractional Divider Step
1298 * \param msc pointer to the base of MSC registers
1299 * \param value Value
1300 * \return None
1301 */
1302 IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value);
1303
1304 /** \brief Set the required N divider downstream value.
1305 * \param msc pointer to the base of MSC registers
1306 * \param divisionRatio select the required division ratio.
1307 * \return None
1308 */
1309 IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio);
1310
1311 /** \brief Sets The Serial Data Input Select
1312 * \param msc pointer to the base of MSC registers
1313 * \param select Serial Data Input Select
1314 * \return None
1315 */
1316 IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select);
1317
1318 /** \brief Sets the sensitivity of the module to sleep signal
1319 * \param msc pointer to MSC registers
1320 * \param mode mode selection (enable/disable)
1321 * \return None
1322 */
1323 IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode);
1324
1325 /** \brief Configure the Module to Hard/Soft suspend mode.
1326 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
1327 * \param msc Pointer to MSC module registers
1328 * \param mode Module suspend mode
1329 * \return None
1330 */
1331 IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode);
1332
1333 /** \brief Sets the Transmission Mode
1334 * \param msc pointer to the base of MSC registers
1335 * \param mode mode
1336 * \return None
1337 */
1338 IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode);
1339
1340 /** \brief Sets The Upstream Channel Recieve Rate
1341 * \param msc pointer to the base of MSC registers
1342 * \param recieveRate Recieve Rate
1343 * \return None
1344 */
1345 IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate);
1346
1347 /** \brief Sets The Upstream Timeout
1348 * \param msc pointer to the base of MSC registers
1349 * \param timeoutVal Timeout Value
1350 * \return None
1351 */
1352 IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal);
1353
1354 /** \brief Sets The Upstream Timeout Prescalar
1355 * \param msc pointer to the base of MSC registers
1356 * \param prescalar prescalar
1357 * \return None
1358 */
1359 IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar);
1360
1361 /******************************************************************************/
1362 /*-------------------------Global Function Prototypes-------------------------*/
1363 /******************************************************************************/
1364
1365 /** \brief clear data frame interrupt flag
1366 * \param msc pointer to the base of MSC registers
1367 * \return None
1368 */
1369 IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc);
1370
1371 /** \brief Get the step value for the supplied baud rate when divider mode is fractional for downstream
1372 * \param msc pointer to the base of MSC registers
1373 * \param baud Required baud rate
1374 * \return Step Value
1375 */
1376 IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1377
1378 /** \brief Get the step value for the supplied baud rate when divider mode is normal for downstream
1379 * \param msc Select DataType Ref
1380 * \param baud Required baud rate
1381 * \return Step value
1382 */
1383 IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud);
1384
1385 /** \brief get the status of the active data frame
1386 * \param msc pointer to the base of MSC registers
1387 * \return Status TRUE or FALSE
1388 */
1389 IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc);
1390
1391 /** \brief get the status of the data frame interrupt flag
1392 * \param msc pointer to the base of MSC registers
1393 * \return Status TRUE or FALSE
1394 */
1395 IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc);
1396
1397 /******************************************************************************/
1398 /*---------------------Inline Function Implementations------------------------*/
1399 /******************************************************************************/
1400
1401 IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc)
1402 {
1403 /* Overflow Flag Clear */
1404 msc->ABC.B.OFM = 2;
1405 }
1406
1407
1408 IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc)
1409 {
1410 /* Underflow Flag Clear */
1411 msc->ABC.B.UFM = 2;
1412 }
1413
1414
1415 IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc)
1416 {
1417 msc->ISC.B.CURDI = 0x01U;
1418 }
1419
1420
1421 IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc)
1422 {
1423 /* Upstream Timeout Clear */
1424 msc->USCE.B.USTC = 1;
1425 }
1426
1427
1428 IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1429 {
1430 msc->UD[upstreamIdx].B.C = 1;
1431 }
1432
1433
1434 IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx)
1435 {
1436 msc->UD[upstreamIdx].B.C = 0x01U;
1437 }
1438
1439
1440 IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
1441 {
1442 msc->USCE.B.USTOEN = 0x0U;
1443 }
1444
1445
1446 IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
1447 {
1448 msc->USCE.B.USTOEN = 0x1U;
1449 }
1450
1451
1452 IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc)
1453 {
1454 return msc->ABC.B.ABB;
1455 }
1456
1457
1458 IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
1459 {
1460 uint16 data = 0;
1461
1462 data = msc->UD[upstreamIdx].B.DATA;
1463
1464 return data;
1465 }
1466
1467
1468 IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
1469 {
1470 /* get data high target - en0, en1, en2 or en3 */
1471 return (IfxMsc_Target)msc->OCR.B.CSH;
1472 }
1473
1474
1475 IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
1476 {
1477 /* get data low target - en0, en1, en2 or en3 */
1478 return (IfxMsc_Target)msc->OCR.B.CSL;
1479 }
1480
1481
1482 IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc)
1483 {
1484 return msc->DSCE.B.EXEN;
1485 }
1486
1487
1488 IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc)
1489 {
1490 return msc->ISR.B.URDI;
1491 }
1492
1493
1494 IFX_INLINE volatile Ifx_SRC_SRCR *IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
1495 {
1496 IfxMsc_Index mscIndex;
1497 volatile Ifx_SRC_SRCR *src;
1498 mscIndex = IfxMsc_getIndex(msc);
1499
1500 switch (intRequest)
1501 {
1502 case IfxMsc_InterruptServiceRequest_0:
1503 src = &MODULE_SRC.MSC.MSC[mscIndex].SR0;
1504 break;
1505 case IfxMsc_InterruptServiceRequest_1:
1506 src = &MODULE_SRC.MSC.MSC[mscIndex].SR1;
1507 break;
1508 case IfxMsc_InterruptServiceRequest_2:
1509 src = &MODULE_SRC.MSC.MSC[mscIndex].SR2;
1510 break;
1511 case IfxMsc_InterruptServiceRequest_3:
1512 src = &MODULE_SRC.MSC.MSC[mscIndex].SR3;
1513 break;
1514 case IfxMsc_InterruptServiceRequest_4:
1515 src = &MODULE_SRC.MSC.MSC[mscIndex].SR4;
1516 break;
1517 default:
1518 break;
1519 }
1520
1521 return src;
1522 }
1523
1524
1525 IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx)
1526 {
1527 return msc->UD[upstreamIdx].U;
1528 }
1529
1530
1531 IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1532 {
1533 return msc->UD[upstreamIdx].B.PERR;
1534 }
1535
1536
1537 IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc)
1538 {
1539 return msc->USCE.B.USTF;
1540 }
1541
1542
1543 IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
1544 {
1545 boolean flag = 0;
1546
1547 flag = msc->UD[upstreamIdx].B.V;
1548
1549 return flag;
1550 }
1551
1552
1553 IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1554 {
1555 if (en->pin.port != NULL_PTR)
1556 {
1557 IfxPort_setPinModeOutput(en->pin.port, en->pin.pinIndex, pinMode, en->select);
1558 IfxPort_setPinPadDriver(en->pin.port, en->pin.pinIndex, padDriver);
1559 }
1560 }
1561
1562
1563 IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1564 {
1565 if (fcln->pin.port != NULL_PTR)
1566 {
1567 IfxPort_setPinModeOutput(fcln->pin.port, fcln->pin.pinIndex, pinMode, fcln->select);
1568 IfxPort_setPinPadDriver(fcln->pin.port, fcln->pin.pinIndex, padDriver);
1569 }
1570 }
1571
1572
1573 IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1574 {
1575 if (fclp->pin.port != NULL_PTR)
1576 {
1577 IfxPort_setPinModeOutput(fclp->pin.port, fclp->pin.pinIndex, pinMode, fclp->select);
1578 IfxPort_setPinPadDriver(fclp->pin.port, fclp->pin.pinIndex, padDriver);
1579 }
1580 }
1581
1582
1583 IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
1584 {
1585 if (inj->pin.port != NULL_PTR)
1586 {
1587 IfxPort_setPinModeInput(inj->pin.port, inj->pin.pinIndex, pinMode);
1588 IfxPort_setPinPadDriver(inj->pin.port, inj->pin.pinIndex, padDriver);
1589 }
1590 }
1591
1592
1593 IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
1594 {
1595 if (sdi->pin.port != NULL_PTR)
1596 {
1597 IfxPort_setPinModeInput(sdi->pin.port, sdi->pin.pinIndex, pinMode);
1598 IfxPort_setPinPadDriver(sdi->pin.port, sdi->pin.pinIndex, padDriver);
1599 sdi->module->OCR.B.SDISEL = sdi->select;
1600 }
1601 }
1602
1603
1604 IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1605 {
1606 if (son->pin.port != NULL_PTR)
1607 {
1608 IfxPort_setPinModeOutput(son->pin.port, son->pin.pinIndex, pinMode, son->select);
1609 IfxPort_setPinPadDriver(son->pin.port, son->pin.pinIndex, padDriver);
1610 }
1611 }
1612
1613
1614 IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
1615 {
1616 if (sop->pin.port != NULL_PTR)
1617 {
1618 IfxPort_setPinModeOutput(sop->pin.port, sop->pin.pinIndex, pinMode, sop->select);
1619 IfxPort_setPinPadDriver(sop->pin.port, sop->pin.pinIndex, padDriver);
1620 }
1621 }
1622
1623
1624 IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc)
1625 {
1626 Ifx_MSC_OCS ocs;
1627
1628 // read the status
1629 ocs.U = msc->OCS.U;
1630
1631 // return the status
1632 return ocs.B.SUSSTA;
1633 }
1634
1635
1636 IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value)
1637 {
1638 msc->ABC.B.ABB = value;
1639 }
1640
1641
1642 IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1643 {
1644 /* Set command target - en0, en1, en2 or en3 */
1645 msc->OCR.B.CSC = enX;
1646 }
1647
1648
1649 IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1650 {
1651 /* Set data high target - en0, en1, en2 or en3 */
1652 msc->OCR.B.CSH = enX;
1653 }
1654
1655
1656 IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
1657 {
1658 /* Set data low target - en0, en1, en2 or en3 */
1659 msc->OCR.B.CSL = enX;
1660 }
1661
1662
1663 IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data)
1664 {
1665 msc->DD.U = data;
1666 }
1667
1668
1669 IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value)
1670 {
1671 msc->DSCE.B.EXEN = value;
1672 }
1673
1674
1675 IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data)
1676 {
1677 msc->DDE.U = data;
1678 }
1679
1680
1681 IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value)
1682 {
1683 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1684 IfxScuWdt_clearCpuEndinit(passwd);
1685
1686 msc->FDR.B.DISCLK = 1; /* Disable MSC clock*/
1687
1688 while (msc->FDR.B.DISCLK != 1)
1689 {}
1690
1691 /* Configure the DIVIDER STEP */
1692 msc->FDR.B.STEP = value;
1693 msc->FDR.B.DISCLK = 0; /* Enable MSC clock */
1694
1695 while (msc->FDR.B.DISCLK != 0)
1696 {}
1697
1698 IfxScuWdt_setCpuEndinit(passwd);
1699 }
1700
1701
1702 IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
1703 {
1704 msc->DSTE.B.NDD = divisionRatio;
1705 }
1706
1707
1708 IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select)
1709 {
1710 msc->OCR.B.SDISEL = select;
1711 }
1712
1713
1714 IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode)
1715 {
1716 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1717 IfxScuWdt_clearCpuEndinit(passwd);
1718 msc->CLC.B.EDIS = mode;
1719 IfxScuWdt_setCpuEndinit(passwd);
1720 }
1721
1722
1723 IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode)
1724 {
1725 Ifx_MSC_OCS ocs;
1726
1727 // remove protection and configure the suspend mode.
1728 ocs.B.SUS_P = 1;
1729 ocs.B.SUS = mode;
1730 msc->OCS.U = ocs.U;
1731 }
1732
1733
1734 IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
1735 {
1736 msc->DSC.B.TM = mode;
1737 }
1738
1739
1740 IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
1741 {
1742 msc->USR.B.URR = recieveRate;
1743 }
1744
1745
1746 IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
1747 {
1748 msc->USCE.B.USTOVAL = timeoutVal;
1749 }
1750
1751
1752 IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
1753 {
1754 msc->USCE.B.USTOPRE = prescalar;
1755 }
1756
1757
1758 #endif /* IFXMSC_H */
IfxMsc_ControlFrameExtensionPassivePhaseLength_81
Length of Command frames passive phase is 83.
Definition: IfxMsc.h:258
IfxMsc_ExternalBitInjectionPosition_42
Injected external bit is at Position 42 of the data frame.
Definition: IfxMsc.h:474
IfxMsc_UpstreamChannelReceivingRate_256
Baud rate = f_MSC / 256.
Definition: IfxMsc.h:850
IfxMsc_NDividerDownstream_3
division ratio is 3
Definition: IfxMsc.h:585
IfxMsc_CommandFrameLength_21
SRL[15:0] and SRH[4:0] Shifted.
Definition: IfxMsc.h:158
IfxMsc_ShiftClockPhaseDuration_13
Duration in periods of f_A is 13.
Definition: IfxMsc.h:726
IfxMsc_downstreamFractionalBaudCalculator
IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional for downstream...
Definition: IfxMsc.c:80
IfxMsc_NDividerAbra_5
Division ratio is 5.
Definition: IfxMsc.h:572
IfxMsc_isModuleSuspended
IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxMsc.h:1624
IfxMsc_Source_alternateInputLineInverted
SRx[16] is taken from ALTINL input line in inverted state.
Definition: IfxMsc.h:757
IfxMsc_ControlFrameExtensionPassivePhaseLength_72
Length of Command frames passive phase is 74.
Definition: IfxMsc.h:249
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:47
IfxMsc_CommandFrameLength_10
SRL[9:0] Shifted.
Definition: IfxMsc.h:147
IfxMsc_ControlFrameExtensionPassivePhaseLength_61
Length of Command frames passive phase is 63.
Definition: IfxMsc.h:238
IfxMsc_ControlFrameExtensionPassivePhaseLength_39
Length of Command frames passive phase is 41.
Definition: IfxMsc.h:216
IfxMsc_ExternalBitInjectionPosition_6
Injected external bit is at Position 6 of the data frame.
Definition: IfxMsc.h:438
IfxMsc_ModuleSuspendRequestBit_noSuspend
OCDS is not suspended.
Definition: IfxMsc.h:549
IfxMsc_ExternalBitInjectionPosition_31
Injected external bit is at Position 31 of the data frame.
Definition: IfxMsc.h:463
IfxMsc_ControlFrameExtensionPassivePhaseLength_27
Length of Command frames passive phase is 29.
Definition: IfxMsc.h:204
IfxMsc_ExternalBitInjectionPosition_35
Injected external bit is at Position 35 of the data frame.
Definition: IfxMsc.h:467
IfxMsc_DataFrameLength_12
SRx[11:0] Shifted.
Definition: IfxMsc.h:356
IfxMsc_TimeFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:795
IfxMsc_UpstreamTimeoutPrescaler_4096
Prescale value 4096 for the upstream time-out limit.
Definition: IfxMsc.h:891
IfxMsc_ExternalBitInjectionPosition_29
Injected external bit is at Position 29 of the data frame.
Definition: IfxMsc.h:461
IfxMsc_UpstreamTimeoutPrescaler_1024
Prescale value 1024 for the upstream time-out limit.
Definition: IfxMsc.h:889
IfxMsc_ControlFrameExtensionPassivePhaseLength_12
Length of Command frames passive phase is 14.
Definition: IfxMsc.h:189
IfxMsc_ExternalBitInjectionPosition_46
Injected external bit is at Position 46 of the data frame.
Definition: IfxMsc.h:478
IfxMsc_ExternalBitInjectionPosition_5
Injected external bit is at Position 5 of the data frame.
Definition: IfxMsc.h:437
IfxMsc_CommandFrameLength_2
SRL[1:0] Shifted.
Definition: IfxMsc.h:139
IfxMsc_clearUpstreamTimeout
IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc)
Clear Upstream timeout.
Definition: IfxMsc.h:1421
IfxMsc_ExternalBitInjectionPosition_54
Injected external bit is at Position 54 of the data frame.
Definition: IfxMsc.h:486
IfxMsc_ExternalBitInjectionPosition_59
Injected external bit is at Position 59 of the data frame.
Definition: IfxMsc.h:491
IfxMsc_DataFrameLength_16
SRx[15:0] Shifted.
Definition: IfxMsc.h:360
IfxMsc_ControlFrameExtensionPassivePhaseLength_67
Length of Command frames passive phase is 69.
Definition: IfxMsc.h:244
IfxMsc_ControlFrameExtensionPassivePhaseLength_22
Length of Command frames passive phase is 24.
Definition: IfxMsc.h:199
IfxMsc_ExternalBitInjectionPosition_2
Injected external bit is at Position 2 of the data frame.
Definition: IfxMsc.h:434
IfxMsc_DataFramePassivePhaseLength_11
Passive phase length is 11 tFCL.
Definition: IfxMsc.h:377
IfxMsc_CommandFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:129
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:60
IfxMsc_CommandFrameLength_4
SRL[3:0] Shifted.
Definition: IfxMsc.h:141
IfxMsc_ExternalBitInjectionPosition_50
Injected external bit is at Position 50 of the data frame.
Definition: IfxMsc.h:482
IfxMsc_getUpstreamData
IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Data.
Definition: IfxMsc.h:1525
IfxMsc_DataFramePassivePhaseLength_13
Passive phase length is 13 tFCL.
Definition: IfxMsc.h:379
IfxMsc_ControlFrameExtensionPassivePhaseLength_79
Length of Command frames passive phase is 81.
Definition: IfxMsc.h:256
IfxMsc_ExternalBitInjectionPosition_28
Injected external bit is at Position 28 of the data frame.
Definition: IfxMsc.h:460
IfxMsc_UpstreamTimeoutPrescaler_256
Prescale value 256 for the upstream time-out limit.
Definition: IfxMsc.h:887
IfxMsc_getRecieveDataInterruptFlag
IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc)
Returns the Recieve DataInterrupt Flag Status.
Definition: IfxMsc.h:1488
IfxMsc_ExternalSignalInjection
IfxMsc_ExternalSignalInjection
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal Definition in Ifx_M...
Definition: IfxMsc.h:501
IfxMsc_ExternalBitInjectionPosition_4
Injected external bit is at Position 4 of the data frame.
Definition: IfxMsc.h:436
IfxMsc_ControlFrameExtensionPassivePhaseLength_88
Length of Command frames passive phase is 90.
Definition: IfxMsc.h:265
IfxMsc_ControlFrameExtensionPassivePhaseLength_49
Length of Command frames passive phase is 51.
Definition: IfxMsc.h:226
IfxMsc_setUpstreamChannelRecieveRate
IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
Sets The Upstream Channel Recieve Rate.
Definition: IfxMsc.h:1740
IfxMsc_TimeFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:793
IfxMsc_CommandFrameLength_15
SRL[14:0] Shifted.
Definition: IfxMsc.h:152
IfxMsc_ControlFrameExtensionPassivePhaseLength_2
Length of Command frames passive phase is 4.
Definition: IfxMsc.h:179
IfxMsc_OverflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:615
IfxMsc_ControlFrameExtensionPassivePhaseLength_46
Length of Command frames passive phase is 48.
Definition: IfxMsc.h:223
IfxMsc_downstreamAbraBaudCalculator
IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:67
IfxMsc_ControlFrameExtensionPassivePhaseLength_9
Length of Command frames passive phase is 11.
Definition: IfxMsc.h:186
IfxMsc_FclLinePolarity_inverted
FCLP signal has inverted FCL signal polarity.
Definition: IfxMsc.h:522
IfxMsc_setDataHighTarget
IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase.
Definition: IfxMsc.h:1649
IfxMsc_ClockSelect_fspb
f_SPB is the clock source for the ABRA block
Definition: IfxMsc.h:98
IfxMsc_InterruptServiceRequest
IfxMsc_InterruptServiceRequest
Interrupt Service Request.
Definition: IfxMsc.h:535
IfxMsc_UpstreamTimeoutValue_2
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:903
IfxMsc_ExternalBitInjectionPosition_27
Injected external bit is at Position 27 of the data frame.
Definition: IfxMsc.h:459
IfxMsc_ControlFrameExtensionPassivePhaseLength_80
Length of Command frames passive phase is 82.
Definition: IfxMsc.h:257
IfxMsc_NDividerAbra_6
Division ratio is 6.
Definition: IfxMsc.h:573
IfxMsc_DataFramePassivePhaseLength_5
Passive phase length is 5 tFCL.
Definition: IfxMsc.h:371
IfxMsc_ReceiveDataInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:672
IfxMsc_ControlFrameExtensionPassivePhaseLength_104
Length of Command frames passive phase is 106.
Definition: IfxMsc.h:281
IfxMsc_ShiftClockPhaseDuration_16
Duration in periods of f_A is 16.
Definition: IfxMsc.h:729
IfxMsc_ReceiveDataInterrupt
IfxMsc_ReceiveDataInterrupt
Interrupt Control Register - Receive Data Interrupt Enable Definition in Ifx_MSC.ICR.B.RDIE.
Definition: IfxMsc.h:657
IfxMsc_CommandFrameLength_27
SRL[15:0] and SRH[10:0] Shifted.
Definition: IfxMsc.h:164
IfxMsc_setUpstreamTimeout
IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
Sets The Upstream Timeout.
Definition: IfxMsc.h:1746
IfxMsc_SdiLinePolarity_likeSi
SDI and SI signal polarities are identical.
Definition: IfxMsc.h:681
IfxMsc_CommandFrameLength_11
SRL[10:0] Shifted.
Definition: IfxMsc.h:148
IfxMsc_Source_alternateInputLine
SRx[16] is taken from ALTINL input line.
Definition: IfxMsc.h:756
IfxMsc_PassiveTimeFrameCount_4
4 Passive time frames inserted
Definition: IfxMsc.h:640
IfxMsc_TimeFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:784
IfxMsc_ExternalBitInjectionPosition_18
Injected external bit is at Position 18 of the data frame.
Definition: IfxMsc.h:450
IfxMsc_ExternalBitInjectionPosition_7
Injected external bit is at Position 7 of the data frame.
Definition: IfxMsc.h:439
IfxMsc_PassiveTimeFrameCount_7
7 Passive time frames inserted
Definition: IfxMsc.h:643
IfxMsc_DataFramePassivePhaseLength_2
Passive phase length is 2 tFCL.
Definition: IfxMsc.h:368
IfxMsc_ExternalBitInjectionPosition_41
Injected external bit is at Position 41 of the data frame.
Definition: IfxMsc.h:473
IfxMsc_setNdividerDownstream
IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
Set the required N divider downstream value.
Definition: IfxMsc.h:1702
IfxMsc_NDividerDownstream_6
division ratio is 6
Definition: IfxMsc.h:588
IfxMsc_DataFramePassivePhaseLength_25
Passive phase length is 25 tFCL.
Definition: IfxMsc.h:391
IfxMsc_UpstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler Definition in Ifx_MSC.USCE.B.USTOPRE.
Definition: IfxMsc.h:877
IfxMsc_CommandFrameLength_1
SRL[0] Shifted.
Definition: IfxMsc.h:138
IfxMsc_setDownStreamExtensionData
IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data)
Sets the Down stream Extension data.
Definition: IfxMsc.h:1675
IfxMsc_ControlFrameExtensionPassivePhaseLength_73
Length of Command frames passive phase is 75.
Definition: IfxMsc.h:250
IfxMsc_NDividerDownstream_1
division ratio is 1
Definition: IfxMsc.h:583
IfxMsc_SuspendMode_hard
Hard Suspend.
Definition: IfxMsc.h:765
IfxMsc_ControlFrameExtensionPassivePhaseLength_127
Length of Command frames passive phase is 129.
Definition: IfxMsc.h:304
IfxMsc_ControlFrameExtensionPassivePhaseLength_57
Length of Command frames passive phase is 59.
Definition: IfxMsc.h:234
IfxMsc_UpstreamTimeoutValue_1
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:902
IfxMsc_NDividerDownstream_4
division ratio is 4
Definition: IfxMsc.h:586
IfxMsc_Sdi_In::module
Ifx_MSC * module
Base address.
Definition: IfxMsc_PinMap.h:49
IfxMsc_DataFramePassivePhaseLength_17
Passive phase length is 17 tFCL.
Definition: IfxMsc.h:383
IfxMsc_ControlFrameExtensionPassivePhaseLength_63
Length of Command frames passive phase is 65.
Definition: IfxMsc.h:240
IfxMsc_DataFramePassivePhaseLength_6
Passive phase length is 6 tFCL.
Definition: IfxMsc.h:372
IfxMsc_UpstreamTimeoutValue_12
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:913
IfxMsc_DataFramePassivePhaseLength_22
Passive phase length is 22 tFCL.
Definition: IfxMsc.h:388
IfxMsc_ExternalSignalInjection_disabled
Disables the external signal injection in a data frame.
Definition: IfxMsc.h:503
IfxMsc_ExternalBitInjectionPosition_20
Injected external bit is at Position 20 of the data frame.
Definition: IfxMsc.h:452
IfxMsc_CommandFrameLength_3
SRL[2:0] Shifted.
Definition: IfxMsc.h:140
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxMsc_ControlFrameExtensionPassivePhaseLength_11
Length of Command frames passive phase is 13.
Definition: IfxMsc.h:188
IfxMsc_DataFramePassivePhaseLength_14
Passive phase length is 14 tFCL.
Definition: IfxMsc.h:380
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMsc_ControlFrameExtensionPassivePhaseLength_25
Length of Command frames passive phase is 27.
Definition: IfxMsc.h:202
IfxMsc_ControlFrameExtensionPassivePhaseLength_125
Length of Command frames passive phase is 127.
Definition: IfxMsc.h:302
IfxMsc_ActivePhaseSelection
IfxMsc_ActivePhaseSelection
Enable SRL/SRH Active Phase Selection Bit Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.
Definition: IfxMsc.h:68
IfxMsc_ShiftClockPhaseDuration_10
Duration in periods of f_A is 10.
Definition: IfxMsc.h:723
IfxMsc_setCommandTarget
IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase.
Definition: IfxMsc.h:1642
IfxMsc_DataFrameLength_14
SRx[13:0] Shifted.
Definition: IfxMsc.h:358
IfxMsc_SuspendMode_soft
Soft Suspend.
Definition: IfxMsc.h:766
IfxMsc_ExternalBitInjectionPosition_12
Injected external bit is at Position 12 of the data frame.
Definition: IfxMsc.h:444
IfxMsc_NDividerDownstream
IfxMsc_NDividerDownstream
Downstream Timing Extension Register - N Divider Downstream Definition in Ifx_MSC.DSTE.B.NDD.
Definition: IfxMsc.h:581
IfxMsc_ControlFrameExtensionPassivePhaseLength_4
Length of Command frames passive phase is 6.
Definition: IfxMsc.h:181
IfxMsc_UpstreamChannelFrameType_12bit
12-bit Upstream frame selected
Definition: IfxMsc.h:834
IfxMsc_setDownStreamData
IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data)
Sets the Down stream data.
Definition: IfxMsc.h:1663
IfxMsc_ControlFrameExtensionPassivePhaseLength_98
Length of Command frames passive phase is 100.
Definition: IfxMsc.h:275
IfxMsc_ControlFrameExtensionPassivePhaseLength_0
Length of Command frames passive phase is 2.
Definition: IfxMsc.h:177
IfxMsc_ControlFrameExtensionPassivePhaseLength_100
Length of Command frames passive phase is 102.
Definition: IfxMsc.h:277
IfxMsc_ControlFrameExtensionPassivePhaseLength_103
Length of Command frames passive phase is 105.
Definition: IfxMsc.h:280
IfxMsc_OverflowInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:618
IfxMsc_CommandDataCommandRepetitionMode_enabled
Enables the automatic insertion of data.
Definition: IfxMsc.h:109
IfxMsc_UpstreamTimeoutPrescaler_8192
Prescale value 8192 for the upstream time-out limit.
Definition: IfxMsc.h:892
IfxMsc_ShiftClockPhaseDuration_8
Duration in periods of f_A is 8.
Definition: IfxMsc.h:721
IfxMsc_disableModule
IFX_EXTERN void IfxMsc_disableModule(Ifx_MSC *msc)
Disable MSC kernel.
Definition: IfxMsc.c:57
IfxMsc_getDataFrameInterruptFlag
IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:138
IfxMsc_UpstreamTimeoutPrescaler_4
Prescale value 4 for the upstream time-out limit.
Definition: IfxMsc.h:881
IfxMsc_ControlFrameExtensionPassivePhaseLength_93
Length of Command frames passive phase is 95.
Definition: IfxMsc.h:270
IfxMsc_DataFramePassivePhaseLength_26
Passive phase length is 26 tFCL.
Definition: IfxMsc.h:392
IfxMsc_NDividerDownstream_5
division ratio is 5
Definition: IfxMsc.h:587
IfxMsc_ExternalBitInjectionPosition_10
Injected external bit is at Position 10 of the data frame.
Definition: IfxMsc.h:442
IfxMsc_DataFramePassivePhaseLength_3
Passive phase length is 3 tFCL.
Definition: IfxMsc.h:369
IfxMsc_ClockSelect_noClock
no clock source for the ABRA block
Definition: IfxMsc.h:97
IfxMsc_NDividerDownstream_2
division ratio is 2
Definition: IfxMsc.h:584
IfxMsc_NDividerAbra_2
Division ratio is 2.
Definition: IfxMsc.h:569
IfxMsc_ControlFrameExtensionPassivePhaseLength_8
Length of Command frames passive phase is 10.
Definition: IfxMsc.h:185
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxMsc_Parity_odd
Odd Parity.
Definition: IfxMsc.h:628
IfxMsc_DataFrameLength_8
SRx[7:0] Shifted.
Definition: IfxMsc.h:352
IfxMsc_UpstreamChannelReceivingRate_8
Baud rate = f_MSC / 8.
Definition: IfxMsc.h:845
IfxMsc_ExternalBitInjectionPosition_19
Injected external bit is at Position 19 of the data frame.
Definition: IfxMsc.h:451
IfxMsc_UpstreamTimeoutInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:868
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxMsc_setDataLowTarget
IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase.
Definition: IfxMsc.h:1656
IfxMsc_UpstreamTimeoutInterrupt_enabled
Upstream Timeout Interrupt Enabled.
Definition: IfxMsc.h:859
IfxMsc_ExternalSignalInjection_enabled
Enables the external signal injection in a data frame.
Definition: IfxMsc.h:504
IfxMsc_ExternalBitInjectionPosition_15
Injected external bit is at Position 15 of the data frame.
Definition: IfxMsc.h:447
IfxMsc_ControlFrameExtensionPassivePhaseLength_122
Length of Command frames passive phase is 124.
Definition: IfxMsc.h:299
IfxMsc_ControlFrameExtensionPassivePhaseLength_23
Length of Command frames passive phase is 25.
Definition: IfxMsc.h:200
IfxMsc_CommandDataCommandRepetitionMode_disabled
Disables the automatic insertion of data.
Definition: IfxMsc.h:108
IfxMsc_TimeFrameInterrupt
IfxMsc_TimeFrameInterrupt
Interrupt Control Register - Time Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.TFIE.
Definition: IfxMsc.h:782
IfxMsc_UpstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:856
IfxMsc_DataFrameInterrupt
IfxMsc_DataFrameInterrupt
Interrupt Control Register - Data Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.EDIE.
Definition: IfxMsc.h:321
IfxMsc_UpstreamTimeoutPrescaler_512
Prescale value 512 for the upstream time-out limit.
Definition: IfxMsc.h:888
IfxMsc_ShiftClockPhaseDuration_7
Duration in periods of f_A is 7.
Definition: IfxMsc.h:720
IfxMsc_ActivePhaseSelection_none
No selection bit inserted.
Definition: IfxMsc.h:70
IfxMsc_OverflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:619
IfxMsc_DataFramePassivePhaseLength_28
Passive phase length is 28 tFCL.
Definition: IfxMsc.h:394
IfxMsc_ControlFrameExtensionPassivePhaseLength_13
Length of Command frames passive phase is 15.
Definition: IfxMsc.h:190
IfxMsc_ControlFrameExtensionPassivePhaseLength_74
Length of Command frames passive phase is 76.
Definition: IfxMsc.h:251
IfxMsc_FclLinePolarity_nonInverted
FCLP and FCL signal polarity is identical.
Definition: IfxMsc.h:521
IfxMsc_ControlFrameExtensionPassivePhaseLength_101
Length of Command frames passive phase is 103.
Definition: IfxMsc.h:278
IfxMsc_ExternalBitInjectionPosition_25
Injected external bit is at Position 25 of the data frame.
Definition: IfxMsc.h:457
IfxMsc_initSopPin
IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output.
Definition: IfxMsc.h:1614
IfxCpu_Intrinsics.h
IfxMsc_ControlFrameExtensionPassivePhaseLength_65
Length of Command frames passive phase is 67.
Definition: IfxMsc.h:242
IfxMsc_Extension
IfxMsc_Extension
Downstream Control Enhanced Register - Extension Enable Definition in Ifx_MSC.DSCE.B.NDBLE.
Definition: IfxMsc.h:421
IfxMsc_DataFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:333
IfxMsc_AsynchronousBlock
IfxMsc_AsynchronousBlock
Asynchronous Block Configuration Register - Asynchronous Block Bypass Definition in Ifx_MSC...
Definition: IfxMsc.h:77
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxMsc_clearReset
IFX_EXTERN void IfxMsc_clearReset(Ifx_MSC *msc)
Clear reset bit of MSC kernel.
Definition: IfxMsc.c:42
IfxMsc_AsynchronousBlock_bypassed
Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled...
Definition: IfxMsc.h:79
IfxMsc_ControlFrameExtensionPassivePhaseLength_60
Length of Command frames passive phase is 62.
Definition: IfxMsc.h:237
IfxMsc_ControlFrameExtensionPassivePhaseLength_14
Length of Command frames passive phase is 16.
Definition: IfxMsc.h:191
IfxMsc_ExternalBitInjectionPosition_37
Injected external bit is at Position 37 of the data frame.
Definition: IfxMsc.h:469
IfxMsc_ControlFrameExtensionPassivePhaseLength_16
Length of Command frames passive phase is 18.
Definition: IfxMsc.h:193
IfxMsc_UpstreamTimeoutValue_16
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:917
IfxMsc_setSuspendMode
IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxMsc.h:1723
IfxMsc_setSerialDataInputSelect
IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select)
Sets The Serial Data Input Select.
Definition: IfxMsc.h:1708
IfxMsc_Target_en3
Target EN3.
Definition: IfxMsc.h:776
IfxMsc_PassiveTimeFrameCount_0
No Passive time frames inserted.
Definition: IfxMsc.h:636
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxMsc_ControlFrameExtensionPassivePhaseLength_123
Length of Command frames passive phase is 125.
Definition: IfxMsc.h:300
IfxMsc_getAsyncClockBypass
IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc)
Returns the value of Asynchronous clock Bypass bit.
Definition: IfxMsc.h:1452
IfxMsc_setUpstreamTimeoutPrescalar
IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
Sets The Upstream Timeout Prescalar.
Definition: IfxMsc.h:1752
IfxMsc_PassiveTimeFrameCount_11
11 Passive time frames inserted
Definition: IfxMsc.h:647
IfxMsc_DataFramePassivePhaseLength_27
Passive phase length is 27 tFCL.
Definition: IfxMsc.h:393
IfxMsc_initSdiPin
IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input.
Definition: IfxMsc.h:1593
IfxMsc_TransmissionMode
IfxMsc_TransmissionMode
Downstream Channel Transmission Mode Definition in Ifx_MSC.DSC.B.TM.
Definition: IfxMsc.h:802
IfxMsc_ControlFrameExtensionPassivePhaseLength_118
Length of Command frames passive phase is 120.
Definition: IfxMsc.h:295
IfxMsc_DataFrameLength_13
SRx[12:0] Shifted.
Definition: IfxMsc.h:357
IfxMsc_NDividerDownstream_12
division ratio is 12
Definition: IfxMsc.h:594
IfxMsc_DataFrameLength_6
SRx[5:0] Shifted.
Definition: IfxMsc.h:350
IfxMsc_UpstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate
Upstream Receiving Rate Definition in Ifx_MSC.USR.B.URR.
Definition: IfxMsc.h:841
IfxMsc_ControlFrameExtensionPassivePhaseLength_18
Length of Command frames passive phase is 20.
Definition: IfxMsc.h:195
IfxMsc_ControlFrameExtensionPassivePhaseLength_53
Length of Command frames passive phase is 55.
Definition: IfxMsc.h:230
IfxMsc_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
Returns the Src pointer for the selected MSC interrupt node.
Definition: IfxMsc.h:1494
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxMsc_ChipSelectActiveState_low
EN[3:0] and ENL,ENH,ENC polarities are inverted.
Definition: IfxMsc.h:89
IfxMsc_ControlFrameExtensionPassivePhaseLength_28
Length of Command frames passive phase is 30.
Definition: IfxMsc.h:205
IfxMsc_ExternalBitInjectionPosition_45
Injected external bit is at Position 45 of the data frame.
Definition: IfxMsc.h:477
IfxMsc_OverflowInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:616
IfxMsc_clearAbraOverflowFlag
IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc)
Clear ABRA overflow flag.
Definition: IfxMsc.h:1401
IfxMsc_SerialDataInput_6
SDI6 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:696
IfxMsc_Target_en2
Target EN2.
Definition: IfxMsc.h:775
IfxMsc_UpstreamChannelFrameType_16bit
16-bit Upstream frame selected
Definition: IfxMsc.h:835
IfxMsc_UpstreamTimeoutValue_14
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:915
IfxMsc_CommandFrameLength_24
SRL[15:0] and SRH[7:0] Shifted.
Definition: IfxMsc.h:161
IfxMsc_AsynchronousBlock_noBypassed
Asynchronous block and the n-divider of the MSC downstream path are active.
Definition: IfxMsc.h:80
IfxMsc_UpstreamTimeoutValue_11
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:912
IfxMsc_EmergencyStop
IfxMsc_EmergencyStop
Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH Definition in Ifx_MS...
Definition: IfxMsc.h:412
IfxMsc_ControlFrameExtensionPassivePhaseLength_55
Length of Command frames passive phase is 57.
Definition: IfxMsc.h:232
IfxMsc_InterruptServiceRequest_1
Interrupt Service Request number1.
Definition: IfxMsc.h:538
IfxMsc_ExternalBitInjectionPosition_34
Injected external bit is at Position 34 of the data frame.
Definition: IfxMsc.h:466
IfxMsc_ExternalBitInjectionPosition_44
Injected external bit is at Position 44 of the data frame.
Definition: IfxMsc.h:476
IfxMsc_CommandFrameLength_29
SRL[15:0] and SRH[12:0] Shifted.
Definition: IfxMsc.h:166
IfxMsc_ControlFrameExtensionPassivePhaseLength_119
Length of Command frames passive phase is 121.
Definition: IfxMsc.h:296
IfxMsc_initInjPin
IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input.
Definition: IfxMsc.h:1583
IfxMsc_ControlFrameExtensionPassivePhaseLength_111
Length of Command frames passive phase is 113.
Definition: IfxMsc.h:288
IfxMsc_DataFramePassivePhaseLength_30
Passive phase length is 30 tFCL.
Definition: IfxMsc.h:396
IfxScuWdt.h
SCU basic functionality.
IfxMsc_ControlFrameExtensionPassivePhaseLength_30
Length of Command frames passive phase is 32.
Definition: IfxMsc.h:207
IfxMsc_NDividerAbra_3
Division ratio is 3.
Definition: IfxMsc.h:570
IfxMsc_initFclnPin
IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output.
Definition: IfxMsc.h:1563
IfxMsc_setSleepMode
IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxMsc.h:1714
IfxMsc_ServiceRequestDelay_noDelay
No Delay.
Definition: IfxMsc.h:705
IfxMsc_InterruptServiceRequest_0
Interrupt Service Request number0.
Definition: IfxMsc.h:537
IfxMsc_EmergencyStop_disabled
Emergency stop feature for SRx bit is Disabled.
Definition: IfxMsc.h:414
IfxMsc_ControlFrameExtensionPassivePhaseLength_71
Length of Command frames passive phase is 73.
Definition: IfxMsc.h:248
IfxMsc_PassiveTimeFrameCount_10
10 Passive time frames inserted
Definition: IfxMsc.h:646
IfxMsc_ExternalBitInjectionPosition_62
Injected external bit is at Position 62 of the data frame.
Definition: IfxMsc.h:494
IfxMsc_ExternalBitInjectionPosition_30
Injected external bit is at Position 30 of the data frame.
Definition: IfxMsc.h:462
IfxMsc_ControlFrameExtensionPassivePhaseLength_41
Length of Command frames passive phase is 43.
Definition: IfxMsc.h:218
IfxMsc_ControlFrameExtensionPassivePhaseLength_48
Length of Command frames passive phase is 50.
Definition: IfxMsc.h:225
IfxMsc_clearRecieveDataInterruptFlag
IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc)
Clears The Recieve Data Interrupt Flag.
Definition: IfxMsc.h:1415
IfxMsc_UnderflowInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:825
IfxMsc_ModuleSuspendRequestBit_hardSuspend
OCDS is Hard suspended. Clock is switched off immediately.
Definition: IfxMsc.h:550
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxMsc_ControlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension Definition in...
Definition: IfxMsc.h:175
IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3
An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H...
Definition: IfxMsc.h:662
IfxMsc_ReceiveDataInterrupt_onDataReceive
An interrupt is generated when data is received and written into the upstream data registers...
Definition: IfxMsc.h:660
IfxMsc_NDividerDownstream_13
division ratio is 13
Definition: IfxMsc.h:595
IfxMsc_ShiftClockPhaseDuration_9
Duration in periods of f_A is 9.
Definition: IfxMsc.h:722
IfxMsc_ControlFrameExtensionPassivePhaseLength_90
Length of Command frames passive phase is 92.
Definition: IfxMsc.h:267
IfxMsc_SerialDataInput_1
SDI1 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:691
IfxMsc_ControlFrameExtensionPassivePhaseLength_26
Length of Command frames passive phase is 28.
Definition: IfxMsc.h:203
IfxMsc_OverflowInterrupt_enabled
Enables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:607
IfxMsc_ControlFrameExtensionPassivePhaseLength_7
Length of Command frames passive phase is 9.
Definition: IfxMsc.h:184
IfxMsc_ControlFrameExtensionPassivePhaseLength_43
Length of Command frames passive phase is 45.
Definition: IfxMsc.h:220
IfxMsc_ControlFrameExtensionPassivePhaseLength_124
Length of Command frames passive phase is 126.
Definition: IfxMsc.h:301
IfxMsc_PassiveTimeFrameCount_15
15 Passive time frames inserted
Definition: IfxMsc.h:651
IfxMsc_UpstreamTimeoutValue_15
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:916
IfxMsc_CommandDataCommandRepetitionMode
IfxMsc_CommandDataCommandRepetitionMode
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode Definition in Ifx...
Definition: IfxMsc.h:106
IfxMsc_MsbBitDataExtension_present
Additional MSB bit is present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:560
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxMsc_ClockSelect_feray
f_ERAY is the clock source for the ABRA block
Definition: IfxMsc.h:100
IfxMsc_CommandFrameLength_0
No bit shifted.
Definition: IfxMsc.h:137
IfxMsc_getAddress
IFX_EXTERN Ifx_MSC * IfxMsc_getAddress(IfxMsc_Index msc)
Definition: IfxMsc.c:121
IfxMsc_En_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMsc_PinMap.h:60
IfxMsc_DataFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:334
IfxMsc_DataFramePassivePhaseLength_4
Passive phase length is 4 tFCL.
Definition: IfxMsc.h:370
IfxMsc_UpstreamTimeoutValue_13
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:914
IfxMsc_ControlFrameExtensionPassivePhaseLength_6
Length of Command frames passive phase is 8.
Definition: IfxMsc.h:183
IfxMsc_getDataHighTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
Get the selected target during high phase.
Definition: IfxMsc.h:1468
IfxMsc_UpstreamTimeoutInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:870
IfxMsc_setAsyncClockBypass
IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value)
Set or reset the Asynchronous clock bypass bit.
Definition: IfxMsc.h:1636
IfxMsc_ControlFrameExtensionPassivePhaseLength_10
Length of Command frames passive phase is 12.
Definition: IfxMsc.h:187
IfxMsc_ControlFrameExtensionPassivePhaseLength_35
Length of Command frames passive phase is 37.
Definition: IfxMsc.h:212
IfxMsc_setFractionalDividerStep
IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value)
Sets The Fractional Divider Step.
Definition: IfxMsc.h:1681
IfxMsc_DataFrameExtensionPassivePhaseLength_3
3 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:315
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxMsc_ControlFrameExtensionPassivePhaseLength_94
Length of Command frames passive phase is 96.
Definition: IfxMsc.h:271
IfxMsc_ControlFrameExtensionPassivePhaseLength_47
Length of Command frames passive phase is 49.
Definition: IfxMsc.h:224
IfxMsc_ChipSelectActiveState_high
EN[3:0] and ENL,ENH,ENC polarities are identical.
Definition: IfxMsc.h:88
IfxMsc_ReceiveDataInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:671
IfxMsc_ExternalBitInjectionPosition_43
Injected external bit is at Position 43 of the data frame.
Definition: IfxMsc.h:475
IfxMsc_ExternalBitInjectionPosition_24
Injected external bit is at Position 24 of the data frame.
Definition: IfxMsc.h:456
IfxMsc_MsbBitDataExtension
IfxMsc_MsbBitDataExtension
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/...
Definition: IfxMsc.h:557
IfxMsc_OverflowInterruptNode
IfxMsc_OverflowInterruptNode
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:613
IfxMsc_getActiveDataFrameStatus
IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:115
IfxMsc_ExternalBitInjectionPosition_63
Injected external bit is at Position 63 of the data frame.
Definition: IfxMsc.h:495
IfxMsc_DataFramePassivePhaseLength_15
Passive phase length is 15 tFCL.
Definition: IfxMsc.h:381
IfxMsc_ExternalBitInjectionPosition_57
Injected external bit is at Position 57 of the data frame.
Definition: IfxMsc.h:489
IfxMsc_CommandFrameLength_14
SRL[13:0] Shifted.
Definition: IfxMsc.h:151
IfxMsc_ControlFrameExtensionPassivePhaseLength_120
Length of Command frames passive phase is 122.
Definition: IfxMsc.h:297
IfxMsc_ExternalBitInjectionPosition_22
Injected external bit is at Position 22 of the data frame.
Definition: IfxMsc.h:454
IfxMsc_HardwareClock
IfxMsc_HardwareClock
Enable hardware clock control.
Definition: IfxMsc.h:527
IfxMsc_ControlFrameExtensionPassivePhaseLength_126
Length of Command frames passive phase is 128.
Definition: IfxMsc.h:303
IfxMsc_DataFrameInterrupt_disabled
Interrupt generation Disable.
Definition: IfxMsc.h:323
IfxMsc_ControlFrameExtensionPassivePhaseLength_114
Length of Command frames passive phase is 116.
Definition: IfxMsc.h:291
IfxMsc_DividerMode
IfxMsc_DividerMode
Divider mode.
Definition: IfxMsc.h:403
IfxMsc_NDividerDownstream_14
division ratio is 14
Definition: IfxMsc.h:596
IfxMsc_MsbBitDataExtension_notPresent
Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:559
IfxMsc_PassiveTimeFrameCount_12
12 Passive time frames inserted
Definition: IfxMsc.h:648
IfxMsc_PassiveTimeFrameCount_5
5 Passive time frames inserted
Definition: IfxMsc.h:641
IfxMsc_DataFrameExtensionPassivePhaseLength_0
0 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:312
IfxMsc_UpstreamTimeoutValue_9
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:910
IfxMsc_ExternalBitInjectionPosition_33
Injected external bit is at Position 33 of the data frame.
Definition: IfxMsc.h:465
IfxMsc_ControlFrameExtensionPassivePhaseLength_1
Length of Command frames passive phase is 3.
Definition: IfxMsc.h:178
IfxMsc_ExternalBitInjectionPosition_14
Injected external bit is at Position 14 of the data frame.
Definition: IfxMsc.h:446
IfxMsc_UpstreamTimeoutPrescaler_1
Prescale value 1 for the upstream time-out limit.
Definition: IfxMsc.h:879
IfxMsc_ControlFrameExtensionPassivePhaseLength_97
Length of Command frames passive phase is 99.
Definition: IfxMsc.h:274
IfxMsc_PassiveTimeFrameCount_1
1 Passive time frames inserted
Definition: IfxMsc.h:637
IfxMsc_SoLinePolarity
IfxMsc_SoLinePolarity
Output Control Register - SOP Line Polarity Definition in Ifx_MSC.OCR.B.SLP.
Definition: IfxMsc.h:744
IfxMsc_ControlFrameExtensionPassivePhaseLength_58
Length of Command frames passive phase is 60.
Definition: IfxMsc.h:235
IfxMsc_UpstreamTimeoutPrescaler_128
Prescale value 128 for the upstream time-out limit.
Definition: IfxMsc.h:886
IfxMsc_DataFramePassivePhaseLength_21
Passive phase length is 21 tFCL.
Definition: IfxMsc.h:387
IfxMsc_UpstreamTimeoutValue_6
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:907
IfxMsc_CommandFrameLength_7
SRL[6:0] Shifted.
Definition: IfxMsc.h:144
IfxMsc_PassiveTimeFrameCount_8
8 Passive time frames inserted
Definition: IfxMsc.h:644
IfxMsc_NDividerAbra_7
Division ratio is 7.
Definition: IfxMsc.h:574
IfxMsc_ControlFrameExtensionPassivePhaseLength_24
Length of Command frames passive phase is 26.
Definition: IfxMsc.h:201
IfxMsc_DataFrameLength_2
SRx[1:0] Shifted.
Definition: IfxMsc.h:346
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:88
IfxMsc_UpstreamTimeoutValue_10
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:911
IfxMsc_clearDataFrameInterruptFlag
IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:35
IfxMsc_DataFrameLength_5
SRx[4:0] Shifted.
Definition: IfxMsc.h:349
IfxMsc_ServiceRequestDelay
IfxMsc_ServiceRequestDelay
Service Request Delay Definition in Ifx_MSC.USR.B.SRDC.
Definition: IfxMsc.h:703
IfxMsc_ShiftClockPhaseDuration_15
Duration in periods of f_A is 15.
Definition: IfxMsc.h:728
IfxMsc_UpstreamTimeoutPrescaler_2
Prescale value 2 for the upstream time-out limit.
Definition: IfxMsc.h:880
IfxMsc_ReceiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode
Interrupt Control Register - Receive Data Interrupt Pointer Definition in Ifx_MSC.ICR.B.RDIP.
Definition: IfxMsc.h:668
IfxMsc_CommandFrameLength_18
SRL[15:0] and SRH[1:0] Shifted.
Definition: IfxMsc.h:155
IfxMsc_CommandFrameLength_20
SRL[15:0] and SRH[3:0] Shifted.
Definition: IfxMsc.h:157
IfxMsc_SerialDataInput_4
SDI4 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:694
IfxMsc_ControlFrameExtensionPassivePhaseLength_113
Length of Command frames passive phase is 115.
Definition: IfxMsc.h:290
IfxMsc_Parity
IfxMsc_Parity
Parity Mode Definition in Ifx_MSC.USR.B.PCT.
Definition: IfxMsc.h:625
IfxMsc_ControlFrameExtensionPassivePhaseLength_86
Length of Command frames passive phase is 88.
Definition: IfxMsc.h:263
IfxMsc_FclClockControlEnabled_activePhaseOnly
FCL is active during active phases of data or command frames.
Definition: IfxMsc.h:512
IfxMsc_SerialDataInput_5
SDI5 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:695
IfxMsc_CommandFrameLength_30
SRL[15:0] and SRH[13:0] Shifted.
Definition: IfxMsc.h:167
IfxMsc_ControlFrameExtensionPassivePhaseLength_117
Length of Command frames passive phase is 119.
Definition: IfxMsc.h:294
IfxMsc_NDividerAbra
IfxMsc_NDividerAbra
Asynchronous Block Configuration Register - N Divider ABRA Definition in Ifx_MSC.ABC.B.NDA.
Definition: IfxMsc.h:566
IfxMsc_upstreamFractionalBaudCalculator
IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:189
IfxMsc_ExternalBitInjectionPosition_23
Injected external bit is at Position 23 of the data frame.
Definition: IfxMsc.h:455
IfxMsc_DataFrameLength_4
SRx[3:0] Shifted.
Definition: IfxMsc.h:348
IfxMsc_SleepMode_enable
enables sleep mode
Definition: IfxMsc.h:737
IfxMsc_PassiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount
Downstream Status Register - Number Of Passive Time Frames Definition in Ifx_MSC.DSS.B.NPTF.
Definition: IfxMsc.h:634
IfxMsc_UpstreamTimeoutPrescaler_32768
Prescale value 32768 for the upstream time-out limit.
Definition: IfxMsc.h:894
IfxMsc_CommandFrameLength_26
SRL[15:0] and SRH[9:0] Shifted.
Definition: IfxMsc.h:163
IfxMsc_CommandFrameLength_17
SRL[15:0] and SRH[0] Shifted.
Definition: IfxMsc.h:154
IfxMsc_ControlFrameExtensionPassivePhaseLength_75
Length of Command frames passive phase is 77.
Definition: IfxMsc.h:252
IfxMsc_ClockSelect
IfxMsc_ClockSelect
Asynchronous Block Configuration Register - Clock Select Definition in Ifx_MSC.ABC.B.CLKSEL.
Definition: IfxMsc.h:95
IfxMsc_NDividerDownstream_10
division ratio is 10
Definition: IfxMsc.h:592
IfxMsc_ControlFrameExtensionPassivePhaseLength_64
Length of Command frames passive phase is 66.
Definition: IfxMsc.h:241
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxMsc_ExternalBitInjectionPosition_21
Injected external bit is at Position 21 of the data frame.
Definition: IfxMsc.h:453
IfxMsc_ControlFrameExtensionPassivePhaseLength_107
Length of Command frames passive phase is 109.
Definition: IfxMsc.h:284
IfxMsc_ControlFrameExtensionPassivePhaseLength_92
Length of Command frames passive phase is 94.
Definition: IfxMsc.h:269
IfxMsc_UpstreamChannelReceivingRate_32
Baud rate = f_MSC / 32.
Definition: IfxMsc.h:847
IfxMsc_ControlFrameExtensionPassivePhaseLength_51
Length of Command frames passive phase is 53.
Definition: IfxMsc.h:228
IfxMsc_SdiLinePolarity
IfxMsc_SdiLinePolarity
Output Control Register - SDI Line Polarity Definition in Ifx_MSC.OCR.B.ILP.
Definition: IfxMsc.h:679
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_setDownStreamExtension
IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value)
Set or reset the Down stream extension enable bit.
Definition: IfxMsc.h:1669
IfxMsc_ControlFrameExtensionPassivePhaseLength_38
Length of Command frames passive phase is 40.
Definition: IfxMsc.h:215
IfxMsc_ControlFrameExtensionPassivePhaseLength_29
Length of Command frames passive phase is 31.
Definition: IfxMsc.h:206
IfxMsc_ExternalBitInjectionPosition_17
Injected external bit is at Position 17 of the data frame.
Definition: IfxMsc.h:449
IfxMsc_DataFrameInterrupt_atLastDataBit
An interrupt is generated when the last data bit has been shifted out.
Definition: IfxMsc.h:324
IfxMsc_NDividerDownstream_16
division ratio is 16
Definition: IfxMsc.h:598
IfxMsc_UpstreamTimeoutPrescaler_8
Prescale value 8 for the upstream time-out limit.
Definition: IfxMsc.h:882
IfxMsc_Extension_enabled
Enables the extension bit fields.
Definition: IfxMsc.h:424
IfxMsc_SleepMode
IfxMsc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_MSC.CLC.B.EDIS.
Definition: IfxMsc.h:735
IfxMsc_upstreamNormalBaudCalculator
IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:212
IfxMsc_UpstreamTimeoutValue_8
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:909
IfxMsc_UnderflowInterrupt_disabled
Disables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:813
IfxMsc_PassiveTimeFrameCount_6
6 Passive time frames inserted
Definition: IfxMsc.h:642
IfxMsc_ControlFrameExtensionPassivePhaseLength_102
Length of Command frames passive phase is 104.
Definition: IfxMsc.h:279
IfxMsc_ShiftClockPhaseDuration_1
Duration in periods of f_A is 1.
Definition: IfxMsc.h:714
IfxMsc_PassiveTimeFrameCount_9
9 Passive time frames inserted
Definition: IfxMsc.h:645
IfxMsc_TimeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode
Interrupt Control Register - Time Frame Interrupt Pointer Definition in Ifx_MSC.ICR.B.TFIP.
Definition: IfxMsc.h:791
IfxMsc_ControlFrameExtensionPassivePhaseLength_83
Length of Command frames passive phase is 85.
Definition: IfxMsc.h:260
IfxMsc_ShiftClockPhaseDuration_4
Duration in periods of f_A is 4.
Definition: IfxMsc.h:717
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:55
IfxMsc_HardwareClock_enabled
Hardware clock enable.
Definition: IfxMsc.h:530
IfxMsc_enableUpstreamTimeoutInterrupt
IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
Enables the Upstream Timeout Interrupt.
Definition: IfxMsc.h:1446
IfxMsc_ControlFrameExtensionPassivePhaseLength_84
Length of Command frames passive phase is 86.
Definition: IfxMsc.h:261
IfxMsc_ControlFrameExtensionPassivePhaseLength_5
Length of Command frames passive phase is 7.
Definition: IfxMsc.h:182
IfxMsc_ShiftClockPhaseDuration_5
Duration in periods of f_A is 5.
Definition: IfxMsc.h:718
IfxMsc_CommandFrameLength
IfxMsc_CommandFrameLength
Number of Bits shifted at command frames Definition in Ifx_MSC.DSC.B.NBC.
Definition: IfxMsc.h:135
IfxMsc_DividerMode_fractional
divider mode is fractional
Definition: IfxMsc.h:406
IfxMsc_ExternalBitInjectionPosition_8
Injected external bit is at Position 8 of the data frame.
Definition: IfxMsc.h:440
IfxMsc_ExternalBitInjectionPosition_11
Injected external bit is at Position 11 of the data frame.
Definition: IfxMsc.h:443
IfxMsc_ExternalBitInjectionPosition_16
Injected external bit is at Position 16 of the data frame.
Definition: IfxMsc.h:448
IfxMsc_ShiftClockPhaseDuration_12
Duration in periods of f_A is 12.
Definition: IfxMsc.h:725
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxMsc_initFclpPin
IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output.
Definition: IfxMsc.h:1573
IfxMsc_ControlFrameExtensionPassivePhaseLength_45
Length of Command frames passive phase is 47.
Definition: IfxMsc.h:222
IfxMsc_ControlFrameExtensionPassivePhaseLength_82
Length of Command frames passive phase is 84.
Definition: IfxMsc.h:259
IfxMsc_OverflowInterrupt_disabled
Disables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:606
IfxMsc_ControlFrameExtensionPassivePhaseLength_115
Length of Command frames passive phase is 117.
Definition: IfxMsc.h:292
IfxMsc_TimeFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:794
IfxMsc_OverflowInterrupt
IfxMsc_OverflowInterrupt
Asynchronous Block Configuration Register - Overflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:604
IfxMsc_ActivePhaseSelection_lowLevel
Low level selection bit inserted.
Definition: IfxMsc.h:71
IfxMsc_ReceiveDataInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:670
IfxMsc_ExternalBitInjectionPosition_1
Injected external bit is at Position 1 of the data frame.
Definition: IfxMsc.h:433
IfxMsc_ExternalBitInjectionPosition_36
Injected external bit is at Position 36 of the data frame.
Definition: IfxMsc.h:468
IfxMsc_DataFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:335
IfxMsc_DataFramePassivePhaseLength_12
Passive phase length is 12 tFCL.
Definition: IfxMsc.h:378
IfxMsc_ModuleSuspendRequestBit_softSuspend
OCDS is Soft suspended.
Definition: IfxMsc.h:551
IfxMsc_ExternalBitInjectionPosition_38
Injected external bit is at Position 38 of the data frame.
Definition: IfxMsc.h:470
IfxMsc_PassiveTimeFrameCount_14
14 Passive time frames inserted
Definition: IfxMsc.h:650
IfxMsc_ControlFrameExtensionPassivePhaseLength_95
Length of Command frames passive phase is 97.
Definition: IfxMsc.h:272
IfxMsc_DataFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:336
IfxMsc_CommandFrameLength_31
SRL[15:0] and SRH[14:0] Shifted.
Definition: IfxMsc.h:168
IfxMsc_DataFrameLength_10
SRx[9:0] Shifted.
Definition: IfxMsc.h:354
IfxMsc_setTransmissionMode
IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
Sets the Transmission Mode.
Definition: IfxMsc.h:1734
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_ControlFrameExtensionPassivePhaseLength_106
Length of Command frames passive phase is 108.
Definition: IfxMsc.h:283
IfxMsc_CommandFrameLength_5
SRL[4:0] Shifted.
Definition: IfxMsc.h:142
IfxMsc_ControlFrameExtensionPassivePhaseLength_37
Length of Command frames passive phase is 39.
Definition: IfxMsc.h:214
IfxMsc_ExternalBitInjectionPosition_40
Injected external bit is at Position 40 of the data frame.
Definition: IfxMsc.h:472
IfxMsc_NDividerDownstream_7
division ratio is 7
Definition: IfxMsc.h:589
IfxMsc_CommandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode
Interrupt Control Register - Command Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.ECIP.
Definition: IfxMsc.h:124
IfxMsc_ControlFrameExtensionPassivePhaseLength_20
Length of Command frames passive phase is 22.
Definition: IfxMsc.h:197
IfxMsc_CommandFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:126
IfxMsc_SleepMode_disable
disables sleep mode
Definition: IfxMsc.h:738
IfxMsc_CommandFrameLength_25
SRL[15:0] and SRH[8:0] Shifted.
Definition: IfxMsc.h:162
IfxMsc_UpstreamTimeoutValue_3
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:904
IfxMsc_PassiveTimeFrameCount_2
2 Passive time frames inserted
Definition: IfxMsc.h:638
IfxMsc_SuspendMode
IfxMsc_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxMsc.h:762
IfxMsc_DataFramePassivePhaseLength_8
Passive phase length is 8 tFCL.
Definition: IfxMsc.h:374
IfxMsc_DataFramePassivePhaseLength_16
Passive phase length is 16 tFCL.
Definition: IfxMsc.h:382
IfxMsc_DataFrameExtensionPassivePhaseLength_1
1 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:313
IfxMsc_ControlFrameExtensionPassivePhaseLength_87
Length of Command frames passive phase is 89.
Definition: IfxMsc.h:264
IfxMsc_NDividerDownstream_9
division ratio is 9
Definition: IfxMsc.h:591
IfxMsc_ControlFrameExtensionPassivePhaseLength_50
Length of Command frames passive phase is 52.
Definition: IfxMsc.h:227
IfxMsc_ControlFrameExtensionPassivePhaseLength_36
Length of Command frames passive phase is 38.
Definition: IfxMsc.h:213
IfxMsc_CommandFrameLength_8
SRL[7:0] Shifted.
Definition: IfxMsc.h:145
IfxMsc_ControlFrameExtensionPassivePhaseLength_76
Length of Command frames passive phase is 78.
Definition: IfxMsc.h:253
IfxMsc_CommandFrameLength_16
SRL[15:0] Shifted.
Definition: IfxMsc.h:153
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMsc_UpstreamTimeoutPrescaler_64
Prescale value 64 for the upstream time-out limit.
Definition: IfxMsc.h:885
IfxMsc_Source_downstreamDataRegister
SRx[16] is taken from data Register DD.DDL[xx].
Definition: IfxMsc.h:755
IfxMsc_ExternalBitInjectionPosition_48
Injected external bit is at Position 48 of the data frame.
Definition: IfxMsc.h:480
IfxMsc_ControlFrameExtensionPassivePhaseLength_89
Length of Command frames passive phase is 91.
Definition: IfxMsc.h:266
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:39
IfxMsc_UpstreamChannelReceivingRate_128
Baud rate = f_MSC / 128.
Definition: IfxMsc.h:849
IfxMsc_DataFramePassivePhaseLength_32
Passive phase length is 32 tFCL.
Definition: IfxMsc.h:398
IfxMsc_DataFramePassivePhaseLength_20
Passive phase length is 20 tFCL.
Definition: IfxMsc.h:386
IfxMsc_ControlFrameExtensionPassivePhaseLength_66
Length of Command frames passive phase is 68.
Definition: IfxMsc.h:243
IfxMsc_getIndex
IFX_EXTERN IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
API to get the resource index of the MSC specified.
Definition: IfxMsc.c:148
IfxMsc_ControlFrameExtensionPassivePhaseLength_77
Length of Command frames passive phase is 79.
Definition: IfxMsc.h:254
IfxMsc_Target_en1
Target EN1.
Definition: IfxMsc.h:774
IfxMsc_UnderflowInterrupt
IfxMsc_UnderflowInterrupt
Asynchronous Block Configuration Register - Underflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:811
IfxMsc_UpstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue
Upstream Control Enhanced Register 1 - Upstream Timeout Value Definition in Ifx_MSC.USCE.B.USTOVAL.
Definition: IfxMsc.h:900
IfxMsc_ControlFrameExtensionPassivePhaseLength_17
Length of Command frames passive phase is 19.
Definition: IfxMsc.h:194
IfxMsc_ExternalBitInjectionPosition_51
Injected external bit is at Position 51 of the data frame.
Definition: IfxMsc.h:483
IfxMsc_getUpstreamParityErrorFlag
IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Returns the Upstream Parity Error Flag Status.
Definition: IfxMsc.h:1531
IfxMsc_SuspendMode_none
No suspend.
Definition: IfxMsc.h:764
IfxMsc_ExternalBitInjectionPosition_58
Injected external bit is at Position 58 of the data frame.
Definition: IfxMsc.h:490
IfxMsc_UnderflowInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:824
IfxMsc_ControlFrameExtensionPassivePhaseLength_19
Length of Command frames passive phase is 21.
Definition: IfxMsc.h:196
IfxMsc_DataFramePassivePhaseLength_31
Passive phase length is 31 tFCL.
Definition: IfxMsc.h:397
IfxMsc_ControlFrameExtensionPassivePhaseLength_78
Length of Command frames passive phase is 80.
Definition: IfxMsc.h:255
IfxMsc_clearValidbit
IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx)
Clears the Valid bit.
Definition: IfxMsc.h:1434
IfxMsc_SerialDataInput
IfxMsc_SerialDataInput
Output Control Register - Serial Data Input Selection Definition in Ifx_MSC.OCR.B.SDISEL.
Definition: IfxMsc.h:688
IfxMsc_ExternalBitInjectionPosition_32
Injected external bit is at Position 32 of the data frame.
Definition: IfxMsc.h:464
IfxMsc_FclLinePolarity
IfxMsc_FclLinePolarity
Output Control Register - FCLP Line Polarity Definition in Ifx_MSC.OCR.B.CLP.
Definition: IfxMsc.h:519
IfxMsc_SerialDataInput_0
SDI0 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:690
IfxMsc_UpstreamTimeoutPrescaler_16
Prescale value 16 for the upstream time-out limit.
Definition: IfxMsc.h:883
IfxMsc_getUpstreamTimeoutFlag
IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc)
Returns Upstream Timeout Flag Status.
Definition: IfxMsc.h:1537
IfxMsc_HardwareClock_disabled
Hardware clock disable.
Definition: IfxMsc.h:529
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxMsc_CommandFrameLength_23
SRL[15:0] and SRH[6:0] Shifted.
Definition: IfxMsc.h:160
IfxMsc_UpstreamTimeoutInterrupt_disabled
Upstream Timeout Interrupt Disabled.
Definition: IfxMsc.h:858
IfxMsc_TransmissionMode_dataRepetition
Data Repetition Mode.
Definition: IfxMsc.h:805
IfxMsc_ExternalBitInjectionPosition
IfxMsc_ExternalBitInjectionPosition
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal Definition in Ifx...
Definition: IfxMsc.h:430
IfxMsc_SoLinePolarity_inverted
SOP and SO polarity is inverted.
Definition: IfxMsc.h:747
IfxMsc_disableUpstreamTimeoutInterrupt
IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
Disables the Upstream Timeout Interrupt.
Definition: IfxMsc.h:1440
IfxMsc_SerialDataInput_7
SDI7 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:697
IfxMsc_UpstreamTimeoutInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:869
IfxMsc_NDividerDownstream_15
division ratio is 15
Definition: IfxMsc.h:597
IfxMsc_ExternalBitInjectionPosition_0
Injected external bit is at Position 0 of the data frame.
Definition: IfxMsc.h:432
IfxMsc_NDividerAbra_8
Division ratio is 8.
Definition: IfxMsc.h:575
IfxMsc_SerialDataInput_3
SDI3 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:693
IfxMsc_ReceiveDataInterrupt_onRdieSet
An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H...
Definition: IfxMsc.h:661
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxMsc_SdiLinePolarity_invertedSi
SDI and SI signal polarities are inverted.
Definition: IfxMsc.h:682
IfxMsc_ControlFrameExtensionPassivePhaseLength_96
Length of Command frames passive phase is 98.
Definition: IfxMsc.h:273
IfxMsc_UpstreamTimeoutPrescaler_2048
Prescale value 2048 for the upstream time-out limit.
Definition: IfxMsc.h:890
IfxMsc_Parity_even
Even Parity.
Definition: IfxMsc.h:627
IfxMsc_OverflowInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:617
IfxMsc_DataFramePassivePhaseLength_19
Passive phase length is 19 tFCL.
Definition: IfxMsc.h:385
IfxMsc_InterruptServiceRequest_2
Interrupt Service Request number2.
Definition: IfxMsc.h:539
IfxMsc_SoLinePolarity_nonInverted
SOP and SO polarity is identical.
Definition: IfxMsc.h:746
IfxMsc_UnderflowInterruptNode
IfxMsc_UnderflowInterruptNode
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:820
IfxMsc_ClockSelect_fsri
f_SRI is the clock source for the ABRA block
Definition: IfxMsc.h:99
IfxMsc_DataFramePassivePhaseLength_29
Passive phase length is 29 tFCL.
Definition: IfxMsc.h:395
IfxMsc_InterruptServiceRequest_4
Interrupt Service Request number4.
Definition: IfxMsc.h:541
IfxMsc_ExternalBitInjectionPosition_52
Injected external bit is at Position 52 of the data frame.
Definition: IfxMsc.h:484
IfxMsc_NDividerDownstream_11
division ratio is 11
Definition: IfxMsc.h:593
IfxMsc_ExternalBitInjectionPosition_49
Injected external bit is at Position 49 of the data frame.
Definition: IfxMsc.h:481
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:80
IfxMsc_SerialDataInput_2
SDI2 is selected for the SDI of the upstream channel.
Definition: IfxMsc.h:692
IfxMsc_FclClockControlEnabled_always
FCL is always active.
Definition: IfxMsc.h:513
IfxMsc_ControlFrameExtensionPassivePhaseLength_3
Length of Command frames passive phase is 5.
Definition: IfxMsc.h:180
IfxMsc_ExternalBitInjectionPosition_55
Injected external bit is at Position 55 of the data frame.
Definition: IfxMsc.h:487
IfxMsc_ExternalBitInjectionPosition_47
Injected external bit is at Position 47 of the data frame.
Definition: IfxMsc.h:479
IfxMsc_ExternalBitInjectionPosition_3
Injected external bit is at Position 3 of the data frame.
Definition: IfxMsc.h:435
IfxMsc_UpstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:865
IfxMsc_ControlFrameExtensionPassivePhaseLength_21
Length of Command frames passive phase is 23.
Definition: IfxMsc.h:198
IfxMsc_ServiceRequestDelay_1bit
Delay of 1 bit time.
Definition: IfxMsc.h:706
IfxMsc_UpstreamChannelReceivingRate_16
Baud rate = f_MSC / 16.
Definition: IfxMsc.h:846
IfxMsc_CommandFrameInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:127
IfxMsc_InterruptServiceRequest_3
Interrupt Service Request number3.
Definition: IfxMsc.h:540
IfxMsc_DataFramePassivePhaseLength_9
Passive phase length is 9 tFCL.
Definition: IfxMsc.h:375
IfxMsc_Sdi_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMsc_PinMap.h:51
IfxMsc_UpstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType
Channel Frame Type Definition in Ifx_MSC.USR.B.UFT.
Definition: IfxMsc.h:832
IfxMsc_DataFrameInterruptNode
IfxMsc_DataFrameInterruptNode
Interrupt Control Register - Data Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.EDIP.
Definition: IfxMsc.h:331
IfxMsc_ExternalBitInjectionPosition_9
Injected external bit is at Position 9 of the data frame.
Definition: IfxMsc.h:441
IfxMsc_UpstreamTimeoutValue_7
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:908
IfxMsc_ControlFrameExtensionPassivePhaseLength_15
Length of Command frames passive phase is 17.
Definition: IfxMsc.h:192
IfxMsc_DataFrameLength_7
SRx[6:0] Shifted.
Definition: IfxMsc.h:351
IfxMsc_PassiveTimeFrameCount_3
3 Passive time frames inserted
Definition: IfxMsc.h:639
IfxMsc_ControlFrameExtensionPassivePhaseLength_34
Length of Command frames passive phase is 36.
Definition: IfxMsc.h:211
IfxMsc_ControlFrameExtensionPassivePhaseLength_110
Length of Command frames passive phase is 112.
Definition: IfxMsc.h:287
IfxMsc_En_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMsc_PinMap.h:59
IfxMsc_ShiftClockPhaseDuration
IfxMsc_ShiftClockPhaseDuration
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock Definit...
Definition: IfxMsc.h:712
IfxMsc_UpstreamTimeoutValue_5
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:906
IfxMsc_UnderflowInterruptNode_SR1
Service request output SR1 selected.
Definition: IfxMsc.h:823
IfxMsc_initEnPin
IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output.
Definition: IfxMsc.h:1553
IfxMsc_UnderflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:826
IfxMsc_UpstreamChannelReceivingRate_64
Baud rate = f_MSC / 64.
Definition: IfxMsc.h:848
IfxMsc_ControlFrameExtensionPassivePhaseLength_121
Length of Command frames passive phase is 123.
Definition: IfxMsc.h:298
IfxMsc_DataFrameLength_15
SRx[14:0] Shifted.
Definition: IfxMsc.h:359
IfxMsc_UpstreamTimeoutValue_4
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:905
IfxMsc_ControlFrameExtensionPassivePhaseLength_32
Length of Command frames passive phase is 34.
Definition: IfxMsc.h:209
IfxMsc_DataFramePassivePhaseLength_18
Passive phase length is 18 tFCL.
Definition: IfxMsc.h:384
IfxMsc_ExternalBitInjectionPosition_13
Injected external bit is at Position 13 of the data frame.
Definition: IfxMsc.h:445
IfxMsc_ExternalBitInjectionPosition_56
Injected external bit is at Position 56 of the data frame.
Definition: IfxMsc.h:488
IfxMsc_ControlFrameExtensionPassivePhaseLength_109
Length of Command frames passive phase is 111.
Definition: IfxMsc.h:286
IfxMsc_ShiftClockPhaseDuration_2
Duration in periods of f_A is 2.
Definition: IfxMsc.h:715
IfxMsc_PassiveTimeFrameCount_13
13 Passive time frames inserted
Definition: IfxMsc.h:649
IfxMsc_ShiftClockPhaseDuration_14
Duration in periods of f_A is 14.
Definition: IfxMsc.h:727
IfxMsc_getUpstreamValidFlag
IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag.
Definition: IfxMsc.h:1543
IfxMsc_ControlFrameExtensionPassivePhaseLength_69
Length of Command frames passive phase is 71.
Definition: IfxMsc.h:246
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxMsc_PinMap.h
MSC I/O map.
IfxMsc_TimeFrameInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:796
IfxMsc_ControlFrameExtensionPassivePhaseLength_59
Length of Command frames passive phase is 61.
Definition: IfxMsc.h:236
IfxMsc_UnderflowInterrupt_enabled
Enables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:814
IfxMsc_ReceiveDataInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:659
IfxMsc_DataFrameLength_1
SRx[0] Shifted.
Definition: IfxMsc.h:345
IfxMsc_ExternalBitInjectionPosition_53
Injected external bit is at Position 53 of the data frame.
Definition: IfxMsc.h:485
IfxMsc_Extension_disabled
Disables the extension bit fields.
Definition: IfxMsc.h:423
IfxMsc_ReceiveDataInterruptNode_SR3
Service request output SR3 selected.
Definition: IfxMsc.h:673
IfxMsc_ControlFrameExtensionPassivePhaseLength_31
Length of Command frames passive phase is 33.
Definition: IfxMsc.h:208
IfxMsc_CommandFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:117
IfxMsc_DataFrameInterrupt_atFirstDataBit
An interrupt is generated when the First data bit has been shifted out.
Definition: IfxMsc.h:325
IfxMsc_ControlFrameExtensionPassivePhaseLength_44
Length of Command frames passive phase is 46.
Definition: IfxMsc.h:221
IfxMsc_DataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength
Passive Phase Length at Data Frames Definition in Ifx_MSC.DSC.B.PPD.
Definition: IfxMsc.h:366
IfxMsc_DataFrameLength_11
SRx[10:0] Shifted.
Definition: IfxMsc.h:355
IfxMsc_UpstreamTimeoutPrescaler_32
Prescale value 32 for the upstream time-out limit.
Definition: IfxMsc.h:884
IfxMsc_DataFrameLength
IfxMsc_DataFrameLength
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.
Definition: IfxMsc.h:342
IfxMsc_ExternalBitInjectionPosition_39
Injected external bit is at Position 39 of the data frame.
Definition: IfxMsc.h:471
IfxMsc_Source
IfxMsc_Source
Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Fr...
Definition: IfxMsc.h:753
IfxMsc_downstreamNormalBaudCalculator
IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal for downstream.
Definition: IfxMsc.c:93
IfxMsc_ControlFrameExtensionPassivePhaseLength_70
Length of Command frames passive phase is 72.
Definition: IfxMsc.h:247
IfxMsc_DataFrameLength_9
SRx[8:0] Shifted.
Definition: IfxMsc.h:353
IfxMsc_DataFramePassivePhaseLength_24
Passive phase length is 24 tFCL.
Definition: IfxMsc.h:390
IfxMsc_UnderflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:822
IfxMsc_ControlFrameExtensionPassivePhaseLength_56
Length of Command frames passive phase is 58.
Definition: IfxMsc.h:233
IfxMsc_ShiftClockPhaseDuration_6
Duration in periods of f_A is 6.
Definition: IfxMsc.h:719
IfxMsc_TimeFrameInterrupt_enabled
Interrupt generation enabled.
Definition: IfxMsc.h:785
IfxMsc_CommandFrameLength_28
SRL[15:0] and SRH[11:0] Shifted.
Definition: IfxMsc.h:165
IfxMsc_Target_en0
Target EN0.
Definition: IfxMsc.h:773
IfxMsc_ExternalBitInjectionPosition_26
Injected external bit is at Position 26 of the data frame.
Definition: IfxMsc.h:458
IfxMsc_cfg.h
MSC on-chip implementation data.
IfxMsc_ModuleSuspendRequestBit
IfxMsc_ModuleSuspendRequestBit
OCDS Control and Status - OCDS Suspend Control Definition in Ifx_MSC.OCS.B.SUS.
Definition: IfxMsc.h:547
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:771
IfxMsc_ExternalBitInjectionPosition_61
Injected external bit is at Position 61 of the data frame.
Definition: IfxMsc.h:493
IfxMsc_UpstreamTimeoutPrescaler_16384
Prescale value 16384 for the upstream time-out limit.
Definition: IfxMsc.h:893
IfxMsc_ControlFrameExtensionPassivePhaseLength_62
Length of Command frames passive phase is 64.
Definition: IfxMsc.h:239
IfxMsc_ControlFrameExtensionPassivePhaseLength_85
Length of Command frames passive phase is 87.
Definition: IfxMsc.h:262
IfxMsc_CommandFrameLength_19
SRL[15:0] and SRH[2:0] Shifted.
Definition: IfxMsc.h:156
IfxMsc_getDownStreamExtension
IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc)
Returns the value of Down stream extension enable bit.
Definition: IfxMsc.h:1482
IfxMsc_UpstreamChannelReceivingRate_disabled
Disabled.
Definition: IfxMsc.h:843
IfxMsc_DataFramePassivePhaseLength_7
Passive phase length is 7 tFCL.
Definition: IfxMsc.h:373
IfxMsc_DataFramePassivePhaseLength_10
Passive phase length is 10 tFCL.
Definition: IfxMsc.h:376
IfxMsc_getData
IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register.
Definition: IfxMsc.h:1458
IfxMsc_EmergencyStop_enabled
Emergency stop feature for SRx bit is Enabled.
Definition: IfxMsc.h:415
IfxMsc_NDividerAbra_4
Division ratio is 4.
Definition: IfxMsc.h:571
IfxMsc_CommandFrameLength_32
SRL[15:0] and SRH[15:0] Shifted.
Definition: IfxMsc.h:169
IfxMsc_ControlFrameExtensionPassivePhaseLength_42
Length of Command frames passive phase is 44.
Definition: IfxMsc.h:219
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMsc_NDividerDownstream_8
division ratio is 8
Definition: IfxMsc.h:590
IfxMsc_ExternalBitInjectionPosition_60
Injected external bit is at Position 60 of the data frame.
Definition: IfxMsc.h:492
IfxMsc_UpstreamTimeoutInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:867
IfxMsc_ControlFrameExtensionPassivePhaseLength_33
Length of Command frames passive phase is 35.
Definition: IfxMsc.h:210
IfxMsc_enableModule
IFX_EXTERN void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:108
IfxMsc_ControlFrameExtensionPassivePhaseLength_116
Length of Command frames passive phase is 118.
Definition: IfxMsc.h:293
IfxMsc_DataFramePassivePhaseLength_23
Passive phase length is 23 tFCL.
Definition: IfxMsc.h:389
IfxMsc_DataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension Definition in If...
Definition: IfxMsc.h:310
IfxMsc_CommandFrameInterruptNode_SR2
Service request output SR2 selected.
Definition: IfxMsc.h:128
IfxMsc_UpstreamTimeoutInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:871
IfxMsc_initSonPin
IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output.
Definition: IfxMsc.h:1604
IfxMsc_ControlFrameExtensionPassivePhaseLength_108
Length of Command frames passive phase is 110.
Definition: IfxMsc.h:285
IfxMsc_clearUpstreamValidFlag
IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag.
Definition: IfxMsc.h:1428
IfxMsc_TransmissionMode_triggered
Triggered Mode.
Definition: IfxMsc.h:804
IfxMsc_CommandFrameLength_9
SRL[8:0] Shifted.
Definition: IfxMsc.h:146
IfxMsc_FclClockControlEnabled
IfxMsc_FclClockControlEnabled
Output Control Register - Clock Control Definition in Ifx_MSC.OCR.B.CLKCTRL.
Definition: IfxMsc.h:510
IfxMsc_DividerMode_normal
divider mode is normal
Definition: IfxMsc.h:405
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxMsc_CommandFrameLength_6
SRL[5:0] Shifted.
Definition: IfxMsc.h:143
IfxMsc_CommandFrameLength_12
SRL[11:0] Shifted.
Definition: IfxMsc.h:149
IfxMsc_ShiftClockPhaseDuration_3
Duration in periods of f_A is 3.
Definition: IfxMsc.h:716
IfxMsc_ControlFrameExtensionPassivePhaseLength_52
Length of Command frames passive phase is 54.
Definition: IfxMsc.h:229
IfxMsc_ShiftClockPhaseDuration_11
Duration in periods of f_A is 11.
Definition: IfxMsc.h:724
IfxMsc_ControlFrameExtensionPassivePhaseLength_68
Length of Command frames passive phase is 70.
Definition: IfxMsc.h:245
IfxMsc_DataFrameLength_0
No SRx bit shifted.
Definition: IfxMsc.h:344
IfxMsc_ControlFrameExtensionPassivePhaseLength_91
Length of Command frames passive phase is 93.
Definition: IfxMsc.h:268
IfxMsc_clearAbraUnderflowFlag
IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc)
Clear ABRA underflow flag.
Definition: IfxMsc.h:1408
IfxMsc_CommandFrameLength_13
SRL[12:0] Shifted.
Definition: IfxMsc.h:150
IfxMsc_ControlFrameExtensionPassivePhaseLength_112
Length of Command frames passive phase is 114.
Definition: IfxMsc.h:289
IfxMsc_DataFrameExtensionPassivePhaseLength_2
2 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:314
IfxMsc_CommandFrameLength_22
SRL[15:0] and SRH[5:0] Shifted.
Definition: IfxMsc.h:159
IfxMsc_ControlFrameExtensionPassivePhaseLength_54
Length of Command frames passive phase is 56.
Definition: IfxMsc.h:231
IfxMsc_CommandFrameInterrupt
IfxMsc_CommandFrameInterrupt
Interrupt Control Register - Command Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.ECIE.
Definition: IfxMsc.h:115
IfxMsc_UpstreamChannelReceivingRate_4
Baud rate = f_MSC / 4.
Definition: IfxMsc.h:844
IfxMsc_ControlFrameExtensionPassivePhaseLength_105
Length of Command frames passive phase is 107.
Definition: IfxMsc.h:282
IfxMsc_NDividerAbra_1
Division ratio is 1.
Definition: IfxMsc.h:568
IfxMsc_getDataLowTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
Get the selected target during low phase.
Definition: IfxMsc.h:1475
IfxMsc_CommandFrameInterrupt_enabled
Interrupt generation enabled.
Definition: IfxMsc.h:118
IfxMsc_DataFrameLength_3
SRx[2:0] Shifted.
Definition: IfxMsc.h:347
IfxMsc_ControlFrameExtensionPassivePhaseLength_40
Length of Command frames passive phase is 42.
Definition: IfxMsc.h:217
IfxMsc_resetModule
IFX_EXTERN void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:168
IfxMsc_ChipSelectActiveState
IfxMsc_ChipSelectActiveState
Output Control Register - Chip Selection Line Polarity Definition in Ifx_MSC.OCR.B.CSLP.
Definition: IfxMsc.h:86
IfxMsc_ControlFrameExtensionPassivePhaseLength_99
Length of Command frames passive phase is 101.
Definition: IfxMsc.h:276


iLLD_TC26B: IfxMsc_Msc.c Source File

  • Msc
  • Msc
IfxMsc_Msc.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_Msc.c
3 * \brief MSC MSC details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxMsc_Msc.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
36 {
37 IfxMsc_resetModule(msc->msc);
38 }
39
40
41 IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
42 {
43 Ifx_MSC *mscSfr = msc->msc;
44 IfxMsc_Target enX = IfxMsc_Target_en0;
45
46 if (target == IfxMsc_Msc_Target_low)
47 {
48 enX = IfxMsc_getDataLowTarget(mscSfr);
49 }
50 else if (target == IfxMsc_Msc_Target_high)
51 {
52 enX = IfxMsc_getDataHighTarget(mscSfr);
53 }
54
55 return enX;
56 }
57
58
59 void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
60 {
61 Ifx_MSC *mscSfr = config->msc;
62
63 msc->msc = mscSfr;
64
65 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
66 IfxScuWdt_clearCpuEndinit(passwd);
67
68 /* Enable the MSCx Clock */
69 IfxMsc_enableModule(mscSfr);
70
71 /* Configure MSC hadrware enable and set the divider mode */
72 {
73 Ifx_MSC_FDR fdr;
74
75 /* Read the FDR register content */
76 fdr.U = mscSfr->FDR.U;
77 /* Select the divider mode */
78 fdr.B.DM = config->clockConfig.dividerMode;
79 /* Enable Hardware Clock Control */
80 fdr.B.ENHW = IfxMsc_HardwareClock_enabled;
81
82 mscSfr->FDR.U = fdr.U;
83 }
84
85 /* Configure Upstream Channel Data Format */
86 {
87 Ifx_MSC_USR usr;
88
89 /* Read the USR register content */
90 usr.U = mscSfr->USR.U;
91 /* Service Request Delay Control */
92 usr.B.SRDC = config->upstreamConfig.serviceRequestDelay;
93 /* Select parity control Even - 0, Odd - 1 */
94 usr.B.PCTR = config->upstreamConfig.parity;
95 /* Select upstream baud rate fMSC/xx */
96 usr.B.URR = config->upstreamConfig.upstreamChannelReceivingRate;
97 /* Select 12 bit or 16 bit frame */
98 usr.B.UFT = config->upstreamConfig.upstreamChannelFrameType;
99
100 mscSfr->USR.U = usr.U;
101 }
102
103 /* Normal divider */
104 if (config->clockConfig.dividerMode == 1)
105 {
106 /* Initialize MSC BaudRate at 6.25MHz, Fsys = 100MHz */
107 mscSfr->FDR.B.STEP =
108 IfxMsc_upstreamNormalBaudCalculator(mscSfr, config->clockConfig.baudrate);
109 }
110 /* Fractional divider */
111 else
112 {
113 /* Initialize MSC BaudRate at 6.25MHz, Fsys = 100MHz */
114 mscSfr->FDR.B.STEP = (uint32)IfxMsc_upstreamFractionalBaudCalculator(mscSfr, config->clockConfig.baudrate);
115 }
116
117 IfxScuWdt_setCpuEndinit(passwd);
118
119 /* Configure IOs */
120 {
121 IfxMsc_Msc_Io *io = (IfxMsc_Msc_Io *)&config->io;
122
123 IfxMsc_Fclp_Out *fclp = io->fclp.pin;
124
125 if (fclp != NULL_PTR)
126 {
127 IfxMsc_initFclpPin(fclp, io->fclp.mode, io->pinDriver);
128 }
129
130 IfxMsc_Fcln_Out *fcln = io->fcln.pin;
131
132 if (fcln != NULL_PTR)
133 {
134 IfxMsc_initFclnPin(fcln, io->fcln.mode, io->pinDriver);
135 }
136
137 IfxMsc_Sop_Out *sop = io->sop.pin;
138
139 if (sop != NULL_PTR)
140 {
141 IfxMsc_initSopPin(sop, io->sop.mode, io->pinDriver);
142 }
143
144 IfxMsc_Son_Out *son = io->son.pin;
145
146 if (son != NULL_PTR)
147 {
148 IfxMsc_initSonPin(son, io->son.mode, io->pinDriver);
149 }
150
151 IfxMsc_En_Out *en0 = io->en0.pin;
152
153 if (en0 != NULL_PTR)
154 {
155 IfxMsc_initEnPin(en0, io->en0.mode, io->pinDriver);
156 }
157
158 IfxMsc_En_Out *en1 = io->en1.pin;
159
160 if (en1 != NULL_PTR)
161 {
162 IfxMsc_initEnPin(en1, io->en1.mode, io->pinDriver);
163 }
164
165 IfxMsc_En_Out *en2 = io->en2.pin;
166
167 if (en2 != NULL_PTR)
168 {
169 IfxMsc_initEnPin(en2, io->en2.mode, io->pinDriver);
170 }
171
172 IfxMsc_En_Out *en3 = io->en3.pin;
173
174 if (en3 != NULL_PTR)
175 {
176 IfxMsc_initEnPin(en3, io->en3.mode, io->pinDriver);
177 }
178
179 IfxMsc_Sdi_In *sdi = io->sdi.pin;
180
181 if (sdi != NULL_PTR)
182 {
183 IfxMsc_initSdiPin(sdi, io->sdi.mode, io->pinDriver);
184 }
185
186 IfxMsc_Inj_In *inj0 = io->inj0.pin;
187
188 if (inj0 != NULL_PTR)
189 {
190 IfxMsc_initInjPin(inj0, io->inj0.mode, io->pinDriver);
191 }
192
193 IfxMsc_Inj_In *inj1 = io->inj1.pin;
194
195 if (inj1 != NULL_PTR)
196 {
197 IfxMsc_initInjPin(inj1, io->inj1.mode, io->pinDriver);
198 }
199 }
200
201 /* Configure the control of upstream channel timeout feature */
202 {
203 Ifx_MSC_USCE usce;
204
205 /* Read the USCE register content */
206 usce.U = mscSfr->USCE.U;
207 /* Upstream Timeout Value */
208 usce.B.USTOVAL = config->upstreamConfig.upstreamTimeoutValue;
209 /* Upstream Timeout Prescaler */
210 usce.B.USTOPRE = config->upstreamConfig.upstreamTimeoutPrescaler;
211 /* Upstream Timeout Interrupt */
212 usce.B.USTOIP = config->interruptConfig.upstreamTimeoutInterruptNode,
213 usce.B.USTOEN = config->interruptConfig.upstreamTimeoutInterrupt,
214
215 mscSfr->USCE.U = usce.U;
216 }
217
218 /* Control the operation mode and frame layout of the downstream channel transmission */
219 {
220 Ifx_MSC_DSC dsc;
221
222 /* Read the DSC register content */
223 dsc.U = mscSfr->DSC.U;
224
225 /* Passive Phase Length */
226 dsc.B.PPD = config->downstreamConfig.dataFramePassivePhaseLength;
227 /* Number of command bits transmitted */
228 dsc.B.NBC = config->downstreamConfig.commandFrameLength;
229 /* SRH Selection Bit */
230 dsc.B.ENSELH = config->downstreamConfig.srhActivePhaseSelection;
231 /* SRL Selection Bit */
232 dsc.B.ENSELL = config->downstreamConfig.srlActivePhaseSelection;
233 /* Number of SRH Bits transmitted */
234 dsc.B.NDBH = config->downstreamConfig.srhDataFrameLength;
235 /* Number of SRL Bits transmitted */
236 dsc.B.NDBL = config->downstreamConfig.srlDataFrameLength;
237 /* Transmission Mode - Triggered or data repetition */
238 dsc.B.TM = config->downstreamConfig.transmissionMode;
239
240 mscSfr->DSC.U = dsc.U;
241 }
242
243 /* Number Of Passive Time Frames */
244 mscSfr->DSS.B.NPTF = config->downstreamConfig.passiveTimeFrameCount;
245
246 /* Select Source for SRL */
247 mscSfr->DSDSL.U = config->downstreamConfig.downstreamDataSourcesLow;
248 /* Select Source for SRH */
249 mscSfr->DSDSH.U = config->downstreamConfig.downstreamDataSourcesHigh;
250
251 /* Emergency Stop Enable for Bits */
252 mscSfr->ESR.U = config->downstreamConfig.emergencyStopEnableBits;
253
254 /* Interrupt configuration */
255 {
256 Ifx_MSC_ICR icr;
257
258 icr.U = mscSfr->ICR.U;
259
260 icr.B.EDIP = config->interruptConfig.dataFrameInterruptNode;
261 icr.B.EDIE = config->interruptConfig.dataFrameInterrupt;
262 icr.B.ECIP = config->interruptConfig.commandFrameInterruptNode;
263 icr.B.ECIE = config->interruptConfig.commandFrameInterrupt;
264 icr.B.TFIP = config->interruptConfig.timeFrameInterruptNode;
265 icr.B.TFIE = config->interruptConfig.timeFrameInterrupt;
266 icr.B.RDIP = config->interruptConfig.receiveDataInterruptNode;
267 icr.B.RDIE = config->interruptConfig.receiveDataInterrupt;
268
269 /* additional interrupt configured in USCE for Upstream Interrupt node SR4 */
270
271 Ifx_MSC_USCE usce;
272
273 /* Read the USCE register content */
274 usce.U = mscSfr->USCE.U;
275
276 if (config->interruptConfig.upstreamTimeoutInterruptNode == IfxMsc_UpstreamTimeoutInterruptNode_SR4)
277 {
278 usce.B.USTOIP = 0;
279 usce.B.UTASR = 1;
280 }
281 else
282 {
283 usce.B.USTOIP = config->interruptConfig.upstreamTimeoutInterruptNode;
284 usce.B.UTASR = 0;
285 }
286
287 usce.B.USTOEN = config->interruptConfig.upstreamTimeoutInterrupt;
288
289 mscSfr->USCE.U = usce.U;
290
291 mscSfr->ICR.U = icr.U;
292
293 /* ABRA */
294 Ifx_MSC_ABC abc;
295 abc.U = mscSfr->ABC.U;
296
297 if (config->interruptConfig.overflowInterruptNode == IfxMsc_OverflowInterruptNode_SR4)
298 {
299 abc.B.OIP = 0;
300 abc.B.OASR = 1;
301 }
302 else
303 {
304 abc.B.OIP = config->interruptConfig.overflowInterruptNode;
305 abc.B.OASR = 0;
306 }
307
308 abc.B.OIE = config->interruptConfig.overflowInterrupt;
309
310 if (config->interruptConfig.underflowInterruptNode == IfxMsc_UnderflowInterruptNode_SR4)
311 {
312 abc.B.UIP = 0;
313 abc.B.UASR = 1;
314 }
315 else
316 {
317 abc.B.UIP = config->interruptConfig.underflowInterruptNode;
318 abc.B.UASR = 0;
319 }
320
321 abc.B.UIE = config->interruptConfig.underflowInterrupt;
322
323 mscSfr->ABC.U = abc.U;
324 }
325
326 /* MSC inputs/outputs signal polarities */
327 {
328 Ifx_MSC_OCR ocr;
329
330 /* Read the OCR register content */
331 ocr.U = mscSfr->OCR.U;
332 /* FCL is activated during active phases or always */
333 ocr.B.CLKCTRL = config->outputControlConfig.fclClockControl;
334 /* SDI Line Polarity - SDI and SI */
335 ocr.B.ILP = config->outputControlConfig.sdiLinePolarity;
336 /* Chip Selection Lines Polarity - EN[0:3, ENL, ENH and ENC */
337 ocr.B.CSLP = config->outputControlConfig.cslpPolarity;
338 /* SOP Line Polarity - SOP, SON, SO */
339 ocr.B.SLP = config->outputControlConfig.sopPolarity;
340 /* FCLP Line Polarity - FCLP, FCLN and FCL */
341 ocr.B.CLP = config->outputControlConfig.fclpPolarity;
342
343 mscSfr->OCR.U = ocr.U;
344 }
345 /* Chip Enable Selection for ENL */
346 IfxMsc_setDataLowTarget(mscSfr, config->target[0]);
347
348 /* Chip Enable Selection for ENH */
349 IfxMsc_setDataHighTarget(mscSfr, config->target[0]);
350
351 /* Chip Enable Selection for ENC */
352 IfxMsc_setCommandTarget(mscSfr, IfxMsc_Msc_getTarget(msc, IfxMsc_Msc_Target_low));
353
354 /* Configure the Injection Enable and number of SRHE, SRLE Bits transmitted and Extension Enable */
355 {
356 Ifx_MSC_DSCE dsce;
357
358 /* Read the DSCE register content */
359 dsce.U = mscSfr->DSCE.U;
360 /* Command-Data-Command in Data Repetition Mode */
361 dsce.B.CDCM = config->downstreamConfig.commandDataCommandReceptionMode;
362 /* Injection Position of the Pin 1 Signal */
363 dsce.B.INJPOSP1 = config->downstreamConfig.injectionPositionPin1;
364 /* Injection Enable of the Pin 1 Signal */
365 dsce.B.INJENP1 = config->downstreamConfig.externalSignalInjectionPin1;
366 /* Injection Position of the Pin 0 Signal */
367 dsce.B.INJPOSP0 = config->downstreamConfig.injectionPositionPin0;
368 /* Injection Enable of the Pin 0 Signal */
369 dsce.B.INJENP0 = config->downstreamConfig.externalSignalInjectionPin0;
370
371 mscSfr->DSCE.U = dsce.U;
372 }
373
374 /* If enabled configure extension registers */
375 if (config->downstreamExtensionConfig.extension == IfxMsc_Extension_enabled)
376 {
377 IfxMsc_Msc_initializeDataExtension(msc, config);
378 }
379
380 /* If enabled, configure ABRA block */
381 if (config->abraConfig.abraBlockBypass != IfxMsc_AsynchronousBlock_bypassed)
382 {
383 IfxMsc_Msc_initializeAbra(msc, config);
384 }
385 }
386
387
388 void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
389 {
390 const IfxMsc_Msc_Config defaultConfig = {
391 .msc = NULL_PTR,
392 .clockConfig = {
393 .baudrate = 3125000,
394 .dividerMode = IfxMsc_DividerMode_normal,
395 .step = 0
396 },
397 .upstreamConfig = {
398 .upstreamChannelFrameType = IfxMsc_UpstreamChannelFrameType_12bit,
399 .upstreamChannelReceivingRate = IfxMsc_UpstreamChannelReceivingRate_16,
400 .parity = IfxMsc_Parity_even,
401 .serviceRequestDelay = IfxMsc_ServiceRequestDelay_noDelay,
402 .upstreamTimeoutPrescaler = IfxMsc_UpstreamTimeoutPrescaler_32768,
403 .upstreamTimeoutValue = IfxMsc_UpstreamTimeoutValue_16
404 },
405 .interruptConfig = {
406 .dataFrameInterruptNode = IfxMsc_DataFrameInterruptNode_SR0,
407 .dataFrameInterrupt = IfxMsc_DataFrameInterrupt_disabled,
408 .commandFrameInterruptNode = IfxMsc_CommandFrameInterruptNode_SR0,
409 .commandFrameInterrupt = IfxMsc_CommandFrameInterrupt_disabled,
410 .timeFrameInterruptNode = IfxMsc_TimeFrameInterruptNode_SR0,
411 .timeFrameInterrupt = IfxMsc_TimeFrameInterrupt_disabled,
412 .receiveDataInterruptNode = IfxMsc_ReceiveDataInterruptNode_SR0,
413 .receiveDataInterrupt = IfxMsc_ReceiveDataInterrupt_disabled,
414 .upstreamTimeoutInterruptNode = IfxMsc_UpstreamTimeoutInterruptNode_SR0,
415 .upstreamTimeoutInterrupt = IfxMsc_UpstreamTimeoutInterrupt_disabled,
416 .overflowInterruptNode = IfxMsc_OverflowInterruptNode_SR0,
417 .overflowInterrupt = IfxMsc_OverflowInterrupt_disabled,
418 .underflowInterruptNode = IfxMsc_UnderflowInterruptNode_SR0,
419 .underflowInterrupt = IfxMsc_UnderflowInterrupt_disabled
420 },
421 .outputControlConfig = {
422 .fclpPolarity = IfxMsc_FclLinePolarity_nonInverted,
423 .sopPolarity = IfxMsc_SoLinePolarity_nonInverted,
424 .cslpPolarity = IfxMsc_ChipSelectActiveState_low,
425 .sdiLinePolarity = IfxMsc_SdiLinePolarity_likeSi,
426 .fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly
427 },
428 .downstreamConfig = {
429 .transmissionMode = IfxMsc_TransmissionMode_triggered,
430 .srlDataFrameLength = IfxMsc_DataFrameLength_16,
431 .srhDataFrameLength = IfxMsc_DataFrameLength_16,
432 .srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
433 .srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
434 .commandFrameLength = IfxMsc_CommandFrameLength_32,
435 .dataFramePassivePhaseLength = IfxMsc_DataFramePassivePhaseLength_2,
436 .passiveTimeFrameCount = IfxMsc_PassiveTimeFrameCount_0,
437 .externalSignalInjectionPin0 = IfxMsc_ExternalSignalInjection_disabled,
438 .injectionPositionPin0 = IfxMsc_ExternalBitInjectionPosition_0,
439 .externalSignalInjectionPin1 = IfxMsc_ExternalSignalInjection_disabled,
440 .injectionPositionPin1 = IfxMsc_ExternalBitInjectionPosition_0,
441 .commandDataCommandReceptionMode = IfxMsc_CommandDataCommandRepetitionMode_disabled,
442 .downstreamDataSourcesLow = 0,
443 .downstreamDataSourcesHigh = 0,
444 .emergencyStopEnableBits = 0
445 },
446 .downstreamExtensionConfig = {
447 .extension = IfxMsc_Extension_disabled,
448 .srlBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
449 .srhBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
450 .downstreamExtensionDataSourcesLow = 0,
451 .downstreamExtensionDataSourcesHigh = 0,
452 .emergencyStopExtensionEnableBits = 0,
453 .dataFrameExtensionPassivePhaseLength = IfxMsc_DataFrameExtensionPassivePhaseLength_0,
454 .controlFrameExtensionPassivePhaseLength = IfxMsc_ControlFrameExtensionPassivePhaseLength_0,
455 .nDividerDownstream = IfxMsc_NDividerDownstream_1
456 },
457 .abraConfig = {
458 .abraDownstreamBlockBaudrate = 500000,
459 .lowPhaseOfShiftClock = IfxMsc_ShiftClockPhaseDuration_1,
460 .highPhaseOfShiftClock = IfxMsc_ShiftClockPhaseDuration_1,
461 .nDividerAbra = IfxMsc_NDividerAbra_1,
462 .abraBlockBypass = IfxMsc_AsynchronousBlock_bypassed,
463 .clockSelectAbra = IfxMsc_ClockSelect_fspb
464 },
465 .io = {
466 .fclp = {
467 .pin = NULL_PTR,
468 .mode = IfxPort_OutputMode_pushPull
469 },
470 .fcln = {
471 .pin = NULL_PTR,
472 .mode = IfxPort_OutputMode_pushPull
473 },
474 .sop = {
475 .pin = NULL_PTR,
476 .mode = IfxPort_OutputMode_pushPull
477 },
478 .son = {
479 .pin = NULL_PTR,
480 .mode = IfxPort_OutputMode_pushPull
481 },
482 .en0 = {
483 .pin = NULL_PTR,
484 .mode = IfxPort_OutputMode_pushPull
485 },
486 .en1 = {
487 .pin = NULL_PTR,
488 .mode = IfxPort_OutputMode_pushPull
489 },
490 .en2 = {
491 .pin = NULL_PTR,
492 .mode = IfxPort_OutputMode_pushPull
493 },
494 .en3 = {
495 .pin = NULL_PTR,
496 .mode = IfxPort_OutputMode_pushPull
497 },
498 .sdi = {
499 .pin = NULL_PTR,
500 .mode = IfxPort_InputMode_pullUp
501 },
502 .inj0 = {
503 .pin = NULL_PTR,
504 .mode = IfxPort_InputMode_pullUp
505 },
506 .inj1 = {
507 .pin = NULL_PTR,
508 .mode = IfxPort_InputMode_pullUp
509 },
510 .pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed3
511 }
512 };
513
514 /* Default Configuration */
515 *config = defaultConfig;
516
517 /* take over module pointer */
518 config->msc = msc;
519 }
520
521
522 void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
523 {
524 Ifx_MSC *mscSfr = msc->msc;
525
526 /* N Divider Downstream */
527 mscSfr->DSTE.B.NDD =
528 IfxMsc_downstreamAbraBaudCalculator(config->abraConfig.abraDownstreamBlockBaudrate);
529
530 /* Configure Asynchronous block */
531 {
532 Ifx_MSC_ABC abc;
533
534 /* Read the ABC register content */
535 abc.U = mscSfr->ABC.U;
536 /* Asynchronous Block Bypass */
537 abc.B.ABB = config->abraConfig.abraBlockBypass;
538 /* Clock Select */
539 abc.B.CLKSEL = config->abraConfig.clockSelectAbra;
540 /* N Divider ABRA */
541 abc.B.NDA = config->abraConfig.nDividerAbra;
542 /* Duration of the High Phase of the Shift Clock */
543 abc.B.HIGH = config->abraConfig.highPhaseOfShiftClock;
544 /* Duration of the Low Phase of the Shift Clock */
545 abc.B.LOW = config->abraConfig.lowPhaseOfShiftClock;
546
547 mscSfr->ABC.U = abc.U;
548 }
549 }
550
551
552 void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
553 {
554 Ifx_MSC *mscSfr = msc->msc;
555
556 /* Configure the number of SRHE, SRLE Bits transmitted and Extension Enable */
557 {
558 Ifx_MSC_DSCE dsce;
559
560 /* Read the DSCE register content */
561 dsce.U = mscSfr->DSCE.U;
562 /* Extension Enable */
563 dsce.B.EXEN = config->downstreamExtensionConfig.extension;
564 /* Configure the number of SRLE Bits transmitted */
565 dsce.B.NDBLE = config->downstreamExtensionConfig.srlBitsShiftedAtDataFramesExtension;
566 /* Configure the number of SRHE Bits transmitted */
567 dsce.B.NDBHE = config->downstreamExtensionConfig.srhBitsShiftedAtDataFramesExtension;
568
569 mscSfr->DSCE.U = dsce.U;
570 }
571
572 /* Select Source for SRLE */
573 mscSfr->DSDSLE.U = config->downstreamExtensionConfig.downstreamExtensionDataSourcesLow;
574
575 /* Select Source for SRHE */
576 mscSfr->DSDSHE.U = config->downstreamExtensionConfig.downstreamExtensionDataSourcesHigh;
577
578 /* Emergency Stop Enable for Bit */
579 mscSfr->ESRE.U = config->downstreamExtensionConfig.emergencyStopExtensionEnableBits;
580
581 /* Passive Phase Length at Data and Control Frames Extension */
582 {
583 Ifx_MSC_DSTE dste;
584
585 /* Read the DSTE register content */
586 dste.U = mscSfr->DSTE.U;
587 /* Passive Phase Length at Control Frames Extension */
588 dste.B.PPCE = config->downstreamExtensionConfig.controlFrameExtensionPassivePhaseLength;
589 /* Passive Phase Length at Data Frames Extension */
590 dste.B.PPDE = config->downstreamExtensionConfig.dataFrameExtensionPassivePhaseLength;
591 /* N Divider for Downstream */
592 dste.B.NDD = config->downstreamExtensionConfig.nDividerDownstream;
593
594 mscSfr->DSTE.U = dste.U;
595 }
596 }
597
598
599 uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
600 {
601 Ifx_MSC *mscSfr = msc->msc;
602 uint16 data = 0;
603
604 /* Check for valid flag */
605 if (!IfxMsc_getUpstreamValidFlag(mscSfr, upstreamIdx))
606 {
607 return (uint32)0xFFFFFFFF;
608 }
609
610 /* Clear the flag */
611 IfxMsc_clearUpstreamValidFlag(mscSfr, upstreamIdx);
612
613 /* Read the data */
614 data = IfxMsc_getData(mscSfr, upstreamIdx);
615
616 return data;
617 }
618
619
620 void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
621 {
622 Ifx_MSC *mscSfr = msc->msc;
623
624 /* Downstream command */
625 mscSfr->DC.U = command;
626 }
627
628
629 void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
630 {
631 Ifx_MSC *mscSfr = msc->msc;
632
633 {
634 Ifx_MSC_DD dd;
635 dd.B.DDL = dataLow;
636 dd.B.DDH = dataHigh;
637
638 /* Downstream Data */
639 mscSfr->DD.U = dd.U;
640 }
641
642 /* Send data */
643 mscSfr->ISC.B.SDP = 1;
644 }
645
646
647 void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
648 {
649 Ifx_MSC *mscSfr = msc->msc;
650
651 /* Downstream Data (mirror) + extension */
652 mscSfr->DDE.U = dataExtension;
653 mscSfr->DDM.U = data;
654
655 /* Send data */
656 mscSfr->ISC.B.SDP = 1;
657 }
658
659
660 void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
661 {
662 Ifx_MSC *mscSfr = msc->msc;
663
664 /* Downstream Data High only */
665 mscSfr->DD.B.DDH = data;
666
667 /* Send data */
668 mscSfr->ISC.B.SDP = 1;
669 }
670
671
672 void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
673 {
674 Ifx_MSC *mscSfr = msc->msc;
675
676 /* Downstream Data Low only */
677 mscSfr->DD.B.DDL = data;
678
679 /* Send data */
680 mscSfr->ISC.B.SDP = 1;
681 }
682
683
684 void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
685 {
686 Ifx_MSC *mscSfr = msc->msc;
687
688 IfxMsc_setCommandTarget(mscSfr, enX);
689 }
690
691
692 void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
693 {
694 Ifx_MSC *mscSfr = msc->msc;
695
696 /* Set data low target */
697 IfxMsc_setDataLowTarget(mscSfr, enXLow);
698 /* Set data high target */
699 IfxMsc_setDataHighTarget(mscSfr, enXHigh);
700 }
IfxMsc_Msc_sendDataLow
void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:672
IfxMsc_Msc_Target
IfxMsc_Msc_Target
Msc Instance Number.
Definition: IfxMsc_Msc.h:178
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue
Specifies the Upstream Timeout Value.
Definition: IfxMsc_Msc.h:360
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:47
IfxMsc_Msc_DownstreamControlConfig::passiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount
Specifies the Number of Passive Time Frames.
Definition: IfxMsc_Msc.h:276
IfxMsc_Msc_Abra::clockSelectAbra
IfxMsc_ClockSelect clockSelectAbra
Specifies the clock select for ABRA.
Definition: IfxMsc_Msc.h:253
IfxMsc_DataFrameLength_16
SRx[15:0] Shifted.
Definition: IfxMsc.h:360
IfxMsc_Msc_DownstreamControlConfig::srhActivePhaseSelection
IfxMsc_ActivePhaseSelection srhActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:273
IfxMsc_Msc_Io::fclp
IfxMsc_Msc_fclp fclp
Definition: IfxMsc_Msc.h:326
IfxMsc_Msc_InterruptConfig::timeFrameInterrupt
IfxMsc_TimeFrameInterrupt timeFrameInterrupt
Specifies the Time Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:311
IfxMsc_Msc_OutputControlConfig::sopPolarity
IfxMsc_SoLinePolarity sopPolarity
Specifies the SLP Polarity.
Definition: IfxMsc_Msc.h:345
IfxMsc_Msc_Io::en1
IfxMsc_Msc_en en1
Definition: IfxMsc_Msc.h:331
IfxMsc_Msc_setCommandTarget
void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target
Definition: IfxMsc_Msc.c:684
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin0
IfxMsc_ExternalSignalInjection externalSignalInjectionPin0
Specifies the Injection Enable Pin 0.
Definition: IfxMsc_Msc.h:277
IfxMsc_Msc_UpstreamStatusConfig::serviceRequestDelay
IfxMsc_ServiceRequestDelay serviceRequestDelay
Specifies the Service Request Delay.
Definition: IfxMsc_Msc.h:358
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxMsc_TimeFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:793
IfxMsc_OverflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:615
IfxMsc_downstreamAbraBaudCalculator
uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
Get the NDD value for the supplied baud rate when when ABRA block is enabled.
Definition: IfxMsc.c:67
IfxMsc_setDataHighTarget
IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data high phase.
Definition: IfxMsc.h:1649
IfxMsc_Msc
MSC base address data Structure.
Definition: IfxMsc_Msc.h:369
IfxMsc_ClockSelect_fspb
f_SPB is the clock source for the ABRA block
Definition: IfxMsc.h:98
IfxMsc_Msc_fclp::pin
IfxMsc_Fclp_Out * pin
Definition: IfxMsc_Msc.h:206
IfxMsc_Msc_Target_low
MSC Target Low.
Definition: IfxMsc_Msc.h:180
IfxMsc_Msc_en::pin
IfxMsc_En_Out * pin
Definition: IfxMsc_Msc.h:194
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesLow
uint32 downstreamExtensionDataSourcesLow
Specifies the Downstream Select Data Source Low Extension.
Definition: IfxMsc_Msc.h:294
IfxMsc_Msc_DownstreamControlConfig::dataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength
Specifies the Passive Phase Length at Data Frames.
Definition: IfxMsc_Msc.h:275
IfxMsc_SdiLinePolarity_likeSi
SDI and SI signal polarities are identical.
Definition: IfxMsc.h:681
IfxMsc_TimeFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:784
IfxMsc_DataFramePassivePhaseLength_2
Passive phase length is 2 tFCL.
Definition: IfxMsc.h:368
IfxMsc_Msc_Abra::highPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock
Specifies High phase of shift clock.
Definition: IfxMsc_Msc.h:250
IfxMsc_Msc_Io::en3
IfxMsc_Msc_en en3
Definition: IfxMsc_Msc.h:333
IfxMsc_NDividerDownstream_1
division ratio is 1
Definition: IfxMsc.h:583
IfxMsc_Msc_InterruptConfig::receiveDataInterrupt
IfxMsc_ReceiveDataInterrupt receiveDataInterrupt
Specifies the Receive Interrupt Mode.
Definition: IfxMsc_Msc.h:313
IfxMsc_ExternalSignalInjection_disabled
Disables the external signal injection in a data frame.
Definition: IfxMsc.h:503
IfxMsc_Msc_OutputControlConfig::fclClockControl
IfxMsc_FclClockControlEnabled fclClockControl
Specifies the CLKCTRL Polarity.
Definition: IfxMsc_Msc.h:348
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMsc_setCommandTarget
IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for command phase.
Definition: IfxMsc.h:1642
IfxMsc_UpstreamChannelFrameType_12bit
12-bit Upstream frame selected
Definition: IfxMsc.h:834
IfxMsc_ControlFrameExtensionPassivePhaseLength_0
Length of Command frames passive phase is 2.
Definition: IfxMsc.h:177
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesHigh
uint32 downstreamExtensionDataSourcesHigh
Specifies the Downstream Select Data Source High Extension.
Definition: IfxMsc_Msc.h:295
IfxMsc_Msc_sdi::mode
IfxPort_InputMode mode
Definition: IfxMsc_Msc.h:225
IfxMsc_Msc_sendDataHigh
void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:660
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxMsc_setDataLowTarget
IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
Select the target for data low phase.
Definition: IfxMsc.h:1656
IfxMsc_Msc_InterruptConfig::underflowInterrupt
IfxMsc_UnderflowInterrupt underflowInterrupt
Specifies the ABRA Underflow Interrupt Mode.
Definition: IfxMsc_Msc.h:319
IfxMsc_CommandDataCommandRepetitionMode_disabled
Disables the automatic insertion of data.
Definition: IfxMsc.h:108
IfxMsc_ActivePhaseSelection_none
No selection bit inserted.
Definition: IfxMsc.h:70
IfxMsc_OverflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:619
IfxMsc_FclLinePolarity_nonInverted
FCLP and FCL signal polarity is identical.
Definition: IfxMsc.h:521
IfxMsc_Msc_DownstreamControlConfig::srlActivePhaseSelection
IfxMsc_ActivePhaseSelection srlActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:272
IfxMsc_initSopPin
IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SOP output.
Definition: IfxMsc.h:1614
IfxMsc_DataFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:333
IfxMsc_Msc_Config::abraConfig
IfxMsc_Msc_Abra abraConfig
Specifies the ABRA configuration.
Definition: IfxMsc_Msc.h:385
IfxMsc_AsynchronousBlock_bypassed
Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled...
Definition: IfxMsc.h:79
IfxMsc_Msc_Io::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMsc_Msc.h:337
IfxMsc_Msc_fcln::pin
IfxMsc_Fcln_Out * pin
Definition: IfxMsc_Msc.h:200
IfxMsc_UpstreamTimeoutValue_16
Upstream timeout value for the N-Divider.
Definition: IfxMsc.h:917
IfxMsc_PassiveTimeFrameCount_0
No Passive time frames inserted.
Definition: IfxMsc.h:636
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler
Specifies the Upstream Timeout Prescaler.
Definition: IfxMsc_Msc.h:359
IfxMsc_initSdiPin
IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SDI input.
Definition: IfxMsc.h:1593
IfxMsc_Msc_sendCommand
void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
send downstream command
Definition: IfxMsc_Msc.c:620
IfxMsc_ChipSelectActiveState_low
EN[3:0] and ENL,ENH,ENC polarities are inverted.
Definition: IfxMsc.h:89
IfxMsc_Msc_sdi::pin
IfxMsc_Sdi_In * pin
Definition: IfxMsc_Msc.h:224
IfxMsc_Msc_initModule
void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module
Definition: IfxMsc_Msc.c:59
IfxMsc_initInjPin
IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a INJ input.
Definition: IfxMsc.h:1583
IfxMsc_Msc_deInitModule
void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
de-initialize MSC module
Definition: IfxMsc_Msc.c:35
IfxMsc_initFclnPin
IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLN output.
Definition: IfxMsc.h:1563
IfxMsc_Msc_setDataTarget
void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase
Definition: IfxMsc_Msc.c:692
IfxMsc_ServiceRequestDelay_noDelay
No Delay.
Definition: IfxMsc.h:705
IfxMsc_Msc_Config::clockConfig
IfxMsc_Msc_Clock clockConfig
Specifies the Clock configuration.
Definition: IfxMsc_Msc.h:379
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin1
IfxMsc_ExternalSignalInjection externalSignalInjectionPin1
Specifies the Injection Enable Pin 1.
Definition: IfxMsc_Msc.h:279
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxMsc_Msc_getTarget
IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase
Definition: IfxMsc_Msc.c:41
IfxMsc_Msc_son::pin
IfxMsc_Son_Out * pin
Definition: IfxMsc_Msc.h:230
IfxMsc_Msc_initializeAbra
void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block
Definition: IfxMsc_Msc.c:522
IfxMsc_Msc_InterruptConfig::timeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode
Specifies the Time Frame Interrupt Node.
Definition: IfxMsc_Msc.h:310
IfxMsc_Msc_DownstreamControlConfig::srlDataFrameLength
IfxMsc_DataFrameLength srlDataFrameLength
Specifies the Number of SRL bits shifted at data frames.
Definition: IfxMsc_Msc.h:270
IfxMsc_getDataHighTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
Get the selected target during high phase.
Definition: IfxMsc.h:1468
IfxMsc_Msc_InterruptConfig::overflowInterruptNode
IfxMsc_OverflowInterruptNode overflowInterruptNode
Specifies the ABRA Overflow Interrupt Node.
Definition: IfxMsc_Msc.h:316
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt
Specifies the Upstream Timeout Interrupt Mode.
Definition: IfxMsc_Msc.h:315
IfxMsc_Msc_initializeDataExtension
void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation
Definition: IfxMsc_Msc.c:552
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin1
IfxMsc_ExternalBitInjectionPosition injectionPositionPin1
Specifies the Injection Position Pin 1.
Definition: IfxMsc_Msc.h:280
IfxMsc_Msc_InterruptConfig::underflowInterruptNode
IfxMsc_UnderflowInterruptNode underflowInterruptNode
Specifies the ABRA Underflow Interrupt Node.
Definition: IfxMsc_Msc.h:318
IfxMsc_Msc_DownstreamControlConfig::commandDataCommandReceptionMode
IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode
Specifies the Command-Data-Command in Data Repetition Mode.
Definition: IfxMsc_Msc.h:281
IfxPort_PadDriver_cmosAutomotiveSpeed3
Speed grade 3.
Definition: IfxPort.h:128
IfxMsc_DataFrameInterrupt_disabled
Interrupt generation Disable.
Definition: IfxMsc.h:323
IfxMsc_MsbBitDataExtension_notPresent
Additional MSB bit is not present in the extension of the NDBL/NDBH bit field.
Definition: IfxMsc.h:559
IfxMsc_DataFrameExtensionPassivePhaseLength_0
0 Additional MSB bits extension of the PPD bit field
Definition: IfxMsc.h:312
IfxMsc_Msc_InterruptConfig::commandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode
Specifies the Command Frame Interrupt Node.
Definition: IfxMsc_Msc.h:308
IfxMsc_Msc_DownstreamControlExtensionConfig::emergencyStopExtensionEnableBits
uint32 emergencyStopExtensionEnableBits
Emergency Stop Extension.
Definition: IfxMsc_Msc.h:296
IfxMsc_Msc_Abra::abraDownstreamBlockBaudrate
uint32 abraDownstreamBlockBaudrate
Specifies ABRA downstream block baud.
Definition: IfxMsc_Msc.h:248
IfxMsc_Msc_Config::upstreamConfig
IfxMsc_Msc_UpstreamStatusConfig upstreamConfig
Specifies the Upstream configuration.
Definition: IfxMsc_Msc.h:380
IfxMsc_Msc_InterruptConfig::overflowInterrupt
IfxMsc_OverflowInterrupt overflowInterrupt
Specifies the ABRA Overflow Interrupt Mode.
Definition: IfxMsc_Msc.h:317
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:88
IfxMsc_Msc_Io::fcln
IfxMsc_Msc_fcln fcln
Definition: IfxMsc_Msc.h:327
IfxMsc_Msc_OutputControlConfig::cslpPolarity
IfxMsc_ChipSelectActiveState cslpPolarity
Specifies the CSLP Polarity.
Definition: IfxMsc_Msc.h:346
IfxMsc_FclClockControlEnabled_activePhaseOnly
FCL is active during active phases of data or command frames.
Definition: IfxMsc.h:512
IfxMsc_Msc_OutputControlConfig::fclpPolarity
IfxMsc_FclLinePolarity fclpPolarity
Specifies the FCLP Polarity.
Definition: IfxMsc_Msc.h:344
IfxMsc_Msc_Abra::abraBlockBypass
IfxMsc_AsynchronousBlock abraBlockBypass
Specifies ABRA block bypass.
Definition: IfxMsc_Msc.h:252
IfxMsc_Msc_sendData
void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low
Definition: IfxMsc_Msc.c:629
IfxMsc_upstreamFractionalBaudCalculator
uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is fractional.
Definition: IfxMsc.c:189
IfxMsc_Msc_Io::sdi
IfxMsc_Msc_sdi sdi
Definition: IfxMsc_Msc.h:334
IfxMsc_UpstreamTimeoutPrescaler_32768
Prescale value 32768 for the upstream time-out limit.
Definition: IfxMsc.h:894
IfxMsc_Msc_InterruptConfig::dataFrameInterrupt
IfxMsc_DataFrameInterrupt dataFrameInterrupt
Specifies the Data Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:307
IfxMsc_Msc_Io::en2
IfxMsc_Msc_en en2
Definition: IfxMsc_Msc.h:332
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_Msc_sendDataExtension
void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit)
Definition: IfxMsc_Msc.c:647
IfxMsc_Msc::msc
Ifx_MSC * msc
Specifies the pointer to the MSC registers.
Definition: IfxMsc_Msc.h:371
IfxMsc_Extension_enabled
Enables the extension bit fields.
Definition: IfxMsc.h:424
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode
Specifies the Upstream Timeout Interrupt Node.
Definition: IfxMsc_Msc.h:314
IfxMsc_upstreamNormalBaudCalculator
uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
Get the step value for the supplied baud rate when divider mode is normal.
Definition: IfxMsc.c:212
IfxMsc_UnderflowInterrupt_disabled
Disables the path of the Underflow interrupt towards the interrupt node.
Definition: IfxMsc.h:813
IfxMsc_ShiftClockPhaseDuration_1
Duration in periods of f_A is 1.
Definition: IfxMsc.h:714
IfxMsc_Msc_InterruptConfig::dataFrameInterruptNode
IfxMsc_DataFrameInterruptNode dataFrameInterruptNode
Specifies the Data Frame Interrupt Node.
Definition: IfxMsc_Msc.h:306
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:55
IfxMsc_HardwareClock_enabled
Hardware clock enable.
Definition: IfxMsc.h:530
IfxMsc_Msc_Clock::dividerMode
IfxMsc_DividerMode dividerMode
Specifies divided clock properties.
Definition: IfxMsc_Msc.h:261
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesHigh
uint32 downstreamDataSourcesHigh
Specifies the Downstream Data Source selections High.
Definition: IfxMsc_Msc.h:283
IfxMsc_initFclpPin
IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a FCLP output.
Definition: IfxMsc.h:1573
IfxMsc_Msc_Config::downstreamExtensionConfig
IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig
Specifies the Downstream Extension configuration.
Definition: IfxMsc_Msc.h:384
IfxMsc_OverflowInterrupt_disabled
Disables the path of the overflow interrupt towards the interrupt node.
Definition: IfxMsc.h:606
IfxMsc_Msc_DownstreamControlExtensionConfig::nDividerDownstream
IfxMsc_NDividerDownstream nDividerDownstream
Specifies the division ratio for downstream generator clock.
Definition: IfxMsc_Msc.h:299
IfxMsc_Msc_Abra::nDividerAbra
IfxMsc_NDividerAbra nDividerAbra
Specifies the N divider.
Definition: IfxMsc_Msc.h:251
IfxMsc_Msc.h
MSC MSC details.
IfxMsc_ReceiveDataInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:670
IfxMsc_Msc_DownstreamControlConfig::commandFrameLength
IfxMsc_CommandFrameLength commandFrameLength
Specifies the Number of bits shifted at command frames.
Definition: IfxMsc_Msc.h:274
IfxMsc_Msc_Config::downstreamConfig
IfxMsc_Msc_DownstreamControlConfig downstreamConfig
Specifies the Downstream configuration.
Definition: IfxMsc_Msc.h:383
IfxMsc_Msc_fclp::mode
IfxPort_OutputMode mode
Definition: IfxMsc_Msc.h:207
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_CommandFrameInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:126
IfxMsc_Msc_InterruptConfig::commandFrameInterrupt
IfxMsc_CommandFrameInterrupt commandFrameInterrupt
Specifies the Command Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:309
IfxMsc_Msc_DownstreamControlExtensionConfig::srlBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension
Specifies the Number of SRLE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:292
IfxMsc_Msc_receiveData
uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data
Definition: IfxMsc_Msc.c:599
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin0
IfxMsc_ExternalBitInjectionPosition injectionPositionPin0
Specifies the Injection Position Pin 0.
Definition: IfxMsc_Msc.h:278
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType
Specifies the Upstream Channel Frame Type.
Definition: IfxMsc_Msc.h:355
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:39
IfxMsc_Msc_Config::interruptConfig
IfxMsc_Msc_InterruptConfig interruptConfig
Specifies the Interrupt configuration.
Definition: IfxMsc_Msc.h:381
IfxMsc_Msc_DownstreamControlConfig::emergencyStopEnableBits
uint32 emergencyStopEnableBits
Emergency Stop.
Definition: IfxMsc_Msc.h:284
IfxMsc_Msc_InterruptConfig::receiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode
Specifies the Receive Interrupt Node.
Definition: IfxMsc_Msc.h:312
IfxMsc_Msc_Io::inj0
IfxMsc_Msc_inj0 inj0
Definition: IfxMsc_Msc.h:335
IfxMsc_Msc_initModuleConfig
void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration
Definition: IfxMsc_Msc.c:388
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesLow
uint32 downstreamDataSourcesLow
Specifies the Downstream Data Source selections Low.
Definition: IfxMsc_Msc.h:282
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate
Specifies the Upstream Channel Receiving Rate.
Definition: IfxMsc_Msc.h:356
IfxMsc_UpstreamTimeoutInterrupt_disabled
Upstream Timeout Interrupt Disabled.
Definition: IfxMsc.h:858
IfxMsc_Msc_Abra::lowPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock
Specifies Low phase of shift clock.
Definition: IfxMsc_Msc.h:249
IfxMsc_ExternalBitInjectionPosition_0
Injected external bit is at Position 0 of the data frame.
Definition: IfxMsc.h:432
IfxMsc_Msc_Clock::baudrate
uint32 baudrate
Specifies the baud rate.
Definition: IfxMsc_Msc.h:260
IfxMsc_Parity_even
Even Parity.
Definition: IfxMsc.h:627
IfxMsc_SoLinePolarity_nonInverted
SOP and SO polarity is identical.
Definition: IfxMsc.h:746
IfxMsc_Msc_DownstreamControlConfig::transmissionMode
IfxMsc_TransmissionMode transmissionMode
Specifies the transmission Mode.
Definition: IfxMsc_Msc.h:269
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:80
IfxMsc_UpstreamChannelReceivingRate_16
Baud rate = f_MSC / 16.
Definition: IfxMsc.h:846
IfxMsc_Msc_sop::pin
IfxMsc_Sop_Out * pin
Definition: IfxMsc_Msc.h:236
IfxMsc_initEnPin
IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a EN output.
Definition: IfxMsc.h:1553
IfxMsc_UnderflowInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:826
IfxMsc_Msc_OutputControlConfig::sdiLinePolarity
IfxMsc_SdiLinePolarity sdiLinePolarity
Specifies the ILP Polarity.
Definition: IfxMsc_Msc.h:347
IfxMsc_getUpstreamValidFlag
IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Get the status of the valid flag.
Definition: IfxMsc.h:1543
IfxMsc_Msc_Io
MSC Pin Configuration Structure.
Definition: IfxMsc_Msc.h:324
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxMsc_Msc_Io::en0
IfxMsc_Msc_en en0
Definition: IfxMsc_Msc.h:330
IfxMsc_ReceiveDataInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:659
IfxMsc_Extension_disabled
Disables the extension bit fields.
Definition: IfxMsc.h:423
IfxMsc_Msc_inj0::pin
IfxMsc_Inj_In * pin
Definition: IfxMsc_Msc.h:212
IfxMsc_CommandFrameInterrupt_disabled
Interrupt generation disabled.
Definition: IfxMsc.h:117
IfxMsc_Msc_Io::inj1
IfxMsc_Msc_inj1 inj1
Definition: IfxMsc_Msc.h:336
IfxMsc_Msc_Target_high
MSC Target High.
Definition: IfxMsc_Msc.h:181
IfxMsc_UnderflowInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:822
IfxMsc_Target_en0
Target EN0.
Definition: IfxMsc.h:773
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:771
IfxMsc_Msc_Io::son
IfxMsc_Msc_son son
Definition: IfxMsc_Msc.h:329
IfxMsc_Msc_Config
MSC Module Configuration Structure.
Definition: IfxMsc_Msc.h:376
IfxMsc_getData
IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
Get the upstream data from upstream data register.
Definition: IfxMsc.h:1458
IfxMsc_CommandFrameLength_32
SRL[15:0] and SRH[15:0] Shifted.
Definition: IfxMsc.h:169
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMsc_UpstreamTimeoutInterruptNode_SR0
Service request output SR0 selected.
Definition: IfxMsc.h:867
IfxMsc_enableModule
void IfxMsc_enableModule(Ifx_MSC *msc)
Enable MSC kernel.
Definition: IfxMsc.c:108
IfxMsc_Msc_DownstreamControlExtensionConfig::dataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Data Frames Extension.
Definition: IfxMsc_Msc.h:297
IfxMsc_UpstreamTimeoutInterruptNode_SR4
Service request output SR4 selected.
Definition: IfxMsc.h:871
IfxPort_InputMode_pullUp
Definition: IfxPort.h:68
IfxMsc_Msc_DownstreamControlExtensionConfig::controlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Control Frames Extension.
Definition: IfxMsc_Msc.h:298
IfxMsc_initSonPin
IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
Initializes a SON output.
Definition: IfxMsc.h:1604
IfxMsc_clearUpstreamValidFlag
IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
Clear the valid flag.
Definition: IfxMsc.h:1428
IfxMsc_TransmissionMode_triggered
Triggered Mode.
Definition: IfxMsc.h:804
IfxMsc_Msc_DownstreamControlConfig::srhDataFrameLength
IfxMsc_DataFrameLength srhDataFrameLength
Specifies the Number of SRH bits shifted at data frames.
Definition: IfxMsc_Msc.h:271
IfxMsc_Msc_DownstreamControlExtensionConfig::extension
IfxMsc_Extension extension
Specifies the Extension Enable.
Definition: IfxMsc_Msc.h:291
IfxMsc_DividerMode_normal
divider mode is normal
Definition: IfxMsc.h:405
IfxMsc_Msc_Config::outputControlConfig
IfxMsc_Msc_OutputControlConfig outputControlConfig
Specifies the Output Control configuration.
Definition: IfxMsc_Msc.h:382
IfxMsc_Msc_Config::io
IfxMsc_Msc_Io io
Specifies the IO Pin configuration.
Definition: IfxMsc_Msc.h:387
IfxMsc_Msc_DownstreamControlExtensionConfig::srhBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension
Specifies the Number of SRHE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:293
IfxMsc_NDividerAbra_1
Division ratio is 1.
Definition: IfxMsc.h:568
IfxMsc_getDataLowTarget
IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
Get the selected target during low phase.
Definition: IfxMsc.h:1475
IfxMsc_Msc_UpstreamStatusConfig::parity
IfxMsc_Parity parity
Specifies the Parity Mode.
Definition: IfxMsc_Msc.h:357
IfxMsc_Msc_Config::target
IfxMsc_Target target[IFXMSC_NUM_ENABLE_SELECT_LINES]
Specifies the Downstream targets.
Definition: IfxMsc_Msc.h:386
IfxMsc_resetModule
void IfxMsc_resetModule(Ifx_MSC *msc)
Reset MSC kernel.
Definition: IfxMsc.c:168
IfxMsc_Msc_Io::sop
IfxMsc_Msc_sop sop
Definition: IfxMsc_Msc.h:328


iLLD_TC26B: IfxMsc_Msc.h Source File

  • Msc
  • Msc
IfxMsc_Msc.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_Msc.h
3 * \brief MSC MSC details
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Msc_Msc_Usage How to use the MSC Interface driver?
25 * \ingroup IfxLld_Msc
26 *
27 * The MSC interface driver provides a default MSC configuration
28 *
29 *
30 *
31 * In the following sections it will be described, how to integrate the driver into the application framework.
32 *
33 * \section IfxLld_Msc_Msc_Preparation Preparation
34 * \subsection IfxLld_Msc_Msc_Include Include Files
35 *
36 * Include following header file into your C code:
37 * \code
38 * #include <Msc/Msc/IfxMsc_Msc.h>
39 * \endcode
40 *
41 * \subsection IfxLld_Msc_Msc_Variables Variables
42 *
43 * Declare the MSC handle as global variable in your C code:
44 *
45 * \code
46 * // MSC handle
47 * static IfxMsc_Msc *msc;
48 *
49 * // IO Pins
50 * static const IfxMsc_Msc_Io IfxMsc_PinMap[IFXMSC_NUM_MODULES] = {
51 * {
52 * { &IfxMsc0_FCLP_P13_1_OUT, IfxPort_OutputMode_pushPull },
53 * { &IfxMsc0_FCLN_P13_0_OUT, IfxPort_OutputMode_pushPull },
54 * { &IfxMsc0_SOP_P13_3_OUT, IfxPort_OutputMode_pushPull },
55 * { &IfxMsc0_SON_P13_2_OUT, IfxPort_OutputMode_pushPull },
56 * { &IfxMsc0_EN0_P10_3_OUT, IfxPort_OutputMode_pushPull },
57 * { &IfxMsc0_EN1_P11_2_OUT, IfxPort_OutputMode_pushPull },
58 * {NULL_PTR},
59 * {NULL_PTR},
60 * { &IfxMsc0_SDI0_P11_10_IN, IfxPort_InputMode_pullUp },
61 * { &IfxMsc0_INJ0_P00_0_IN, IfxPort_InputMode_pullUp },
62 * { &IfxMsc0_INJ1_P10_5_IN, IfxPort_InputMode_pullUp },
63 * IfxPort_PadDriver_cmosAutomotiveSpeed3
64 * },
65 *
66 * #if IFXMSC_NUM_MODULES >= 2
67 * {
68 * { &IfxMsc1_FCLP_P22_1_OUT, IfxPort_OutputMode_pushPull },
69 * { &IfxMsc1_FCLN_P22_0_OUT, IfxPort_OutputMode_pushPull },
70 * { &IfxMsc1_SOP_P22_3_OUT, IfxPort_OutputMode_pushPull },
71 * { &IfxMsc1_SON_P22_2_OUT, IfxPort_OutputMode_pushPull },
72 * { &IfxMsc1_EN0_P23_4_OUT, IfxPort_OutputMode_pushPull },
73 * { &IfxMsc1_EN1_P23_5_OUT, IfxPort_OutputMode_pushPull },
74 * {NULL_PTR},
75 * {NULL_PTR},
76 * { &IfxMsc1_SDI0_P23_1_IN, IfxPort_InputMode_pullUp },
77 * { &IfxMsc1_INJ0_P23_3_IN, IfxPort_InputMode_pullUp },
78 * { &IfxMsc1_INJ1_P33_13_IN, IfxPort_InputMode_pullUp },
79 * IfxPort_PadDriver_cmosAutomotiveSpeed3
80 * },
81 * #endif
82 * };
83 * \endcode
84 *
85 * \subsection IfxLld_Msc_Msc_Init Module Initialisation
86 *
87 * The module initialisation can be done as followed:
88 * \code
89 * // create configuration (same is used for all MSCs)
90 * IfxMsc_Msc_Config mscConfig;
91 * IfxMsc_Msc_initModuleConfig(&mscConfig, &MODULE_MSC0);
92 *
93 * // increase baudrate for faster simulation:
94 * mscConfig.clockConfig.baudrate = 25000000;
95 * mscConfig.clockConfig.dividerMode = IfxMsc_DividerMode_fractional;
96 *
97 * // FCL only activated on transfers
98 * mscConfig.outputControlConfig.fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly;
99 *
100 * // in this case we also don't need a selection bit
101 * mscConfig.downstreamConfig.srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
102 * mscConfig.downstreamConfig.srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
103 *
104 * // initialize MSCs
105 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
106 * // init module pointer
107 * mscConfig.msc = (Ifx_MSC*)IfxMsc_cfg_indexMap[i].module;
108 *
109 * // IO Config
110 * mscConfig.io = IfxMsc_PinMap[i];
111 *
112 * // initialize module
113 * IfxMsc_Msc_initModule(&msc[i], &mscConfig);
114 * }
115 * \endcode
116 *
117 * The MSC is ready for use now!
118 *
119 *
120 * \section IfxLld_Msc_Msc_DataTransfers Data Transfers
121 *
122 * The MSC driver provides simple to use transfer function
123 *
124 * \code
125 * for(int n=0; n<10; ++n) {
126 * // clear IRQ flag of previous transfer
127 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
128 * msc[i].msc->ISC.B.CDEDI = 1;
129 * }
130 *
131 * // new transfer
132 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
133 * const unsigned dataL = i*0x1000 + n;
134 * const unsigned dataH = i*0x1000 + 0x0100 + n;
135 * IfxMsc_Msc_sendData(&msc[i], dataL, dataH);
136 * }
137 * // wait until transfers are finished
138 * for(int i=0; i<IFXMSC_NUM_MODULES; ++i) {
139 * while( !msc[i].msc->ISR.B.DEDI ); // check if new data could be written
140 * while( msc[i].msc->DSS.B.DFA ); // check if we are still in the active data phase
141 * }
142 * }
143 * \endcode
144 *
145 * \defgroup IfxLld_Msc_Msc MSC
146 * \ingroup IfxLld_Msc
147 * \defgroup IfxLld_Msc_Msc_Enumerations Enumerations
148 * \ingroup IfxLld_Msc_Msc
149 * \defgroup IfxLld_Msc_Msc_Data_Structures Data Structures
150 * \ingroup IfxLld_Msc_Msc
151 * \defgroup IfxLld_Msc_Msc_Module_Initialize_Functions Module Initialize Functions
152 * \ingroup IfxLld_Msc_Msc
153 * \defgroup IfxLld_Msc_Msc_Send_Functions Send Functions
154 * \ingroup IfxLld_Msc_Msc
155 * \defgroup IfxLld_Msc_Msc_Receive_Functions Receive Functions
156 * \ingroup IfxLld_Msc_Msc
157 * \defgroup IfxLld_Msc_Msc_Target_Read_Write_Functions Target Read Write Functions
158 * \ingroup IfxLld_Msc_Msc
159 */
160
161 #ifndef IFXMSC_MSC_H
162 #define IFXMSC_MSC_H 1
163
164 /******************************************************************************/
165 /*----------------------------------Includes----------------------------------*/
166 /******************************************************************************/
167
168 #include "Msc/Std/IfxMsc.h"
169
170 /******************************************************************************/
171 /*--------------------------------Enumerations--------------------------------*/
172 /******************************************************************************/
173
174 /** \addtogroup IfxLld_Msc_Msc_Enumerations
175 * \{ */
176 /** \brief Msc Instance Number
177 */
178 typedef enum
179 {
180 IfxMsc_Msc_Target_low = 0, /**< \brief MSC Target Low */
181 IfxMsc_Msc_Target_high = 1 /**< \brief MSC Target High */
182 } IfxMsc_Msc_Target;
183
184 /** \} */
185
186 /******************************************************************************/
187 /*-----------------------------Data Structures--------------------------------*/
188 /******************************************************************************/
189
190 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
191 * \{ */
192 typedef struct
193 {
194 IfxMsc_En_Out *pin;
195 IfxPort_OutputMode mode;
196 } IfxMsc_Msc_en;
197
198 typedef struct
199 {
200 IfxMsc_Fcln_Out *pin;
201 IfxPort_OutputMode mode;
202 } IfxMsc_Msc_fcln;
203
204 typedef struct
205 {
206 IfxMsc_Fclp_Out *pin;
207 IfxPort_OutputMode mode;
208 } IfxMsc_Msc_fclp;
209
210 typedef struct
211 {
212 IfxMsc_Inj_In *pin;
213 IfxPort_InputMode mode;
214 } IfxMsc_Msc_inj0;
215
216 typedef struct
217 {
218 IfxMsc_Inj_In *pin;
219 IfxPort_InputMode mode;
220 } IfxMsc_Msc_inj1;
221
222 typedef struct
223 {
224 IfxMsc_Sdi_In *pin;
225 IfxPort_InputMode mode;
226 } IfxMsc_Msc_sdi;
227
228 typedef struct
229 {
230 IfxMsc_Son_Out *pin;
231 IfxPort_OutputMode mode;
232 } IfxMsc_Msc_son;
233
234 typedef struct
235 {
236 IfxMsc_Sop_Out *pin;
237 IfxPort_OutputMode mode;
238 } IfxMsc_Msc_sop;
239
240 /** \} */
241
242 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
243 * \{ */
244 /** \brief ABRA block Configuration Structure
245 */
246 typedef struct
247 {
248 uint32 abraDownstreamBlockBaudrate; /**< \brief Specifies ABRA downstream block baud */
249 IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock; /**< \brief Specifies Low phase of shift clock */
250 IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock; /**< \brief Specifies High phase of shift clock */
251 IfxMsc_NDividerAbra nDividerAbra; /**< \brief Specifies the N divider */
252 IfxMsc_AsynchronousBlock abraBlockBypass; /**< \brief Specifies ABRA block bypass */
253 IfxMsc_ClockSelect clockSelectAbra; /**< \brief Specifies the clock select for ABRA */
254 } IfxMsc_Msc_Abra;
255
256 /** \brief Clock configuration data Structure
257 */
258 typedef struct
259 {
260 uint32 baudrate; /**< \brief Specifies the baud rate */
261 IfxMsc_DividerMode dividerMode; /**< \brief Specifies divided clock properties */
262 uint16 step; /**< \brief Specifies the step value */
263 } IfxMsc_Msc_Clock;
264
265 /** \brief Downstream Control Configuration Structure
266 */
267 typedef struct
268 {
269 IfxMsc_TransmissionMode transmissionMode; /**< \brief Specifies the transmission Mode */
270 IfxMsc_DataFrameLength srlDataFrameLength; /**< \brief Specifies the Number of SRL bits shifted at data frames */
271 IfxMsc_DataFrameLength srhDataFrameLength; /**< \brief Specifies the Number of SRH bits shifted at data frames */
272 IfxMsc_ActivePhaseSelection srlActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
273 IfxMsc_ActivePhaseSelection srhActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
274 IfxMsc_CommandFrameLength commandFrameLength; /**< \brief Specifies the Number of bits shifted at command frames */
275 IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Data Frames */
276 IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount; /**< \brief Specifies the Number of Passive Time Frames */
277 IfxMsc_ExternalSignalInjection externalSignalInjectionPin0; /**< \brief Specifies the Injection Enable Pin 0 */
278 IfxMsc_ExternalBitInjectionPosition injectionPositionPin0; /**< \brief Specifies the Injection Position Pin 0 */
279 IfxMsc_ExternalSignalInjection externalSignalInjectionPin1; /**< \brief Specifies the Injection Enable Pin 1 */
280 IfxMsc_ExternalBitInjectionPosition injectionPositionPin1; /**< \brief Specifies the Injection Position Pin 1 */
281 IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode; /**< \brief Specifies the Command-Data-Command in Data Repetition Mode */
282 uint32 downstreamDataSourcesLow; /**< \brief Specifies the Downstream Data Source selections Low */
283 uint32 downstreamDataSourcesHigh; /**< \brief Specifies the Downstream Data Source selections High */
284 uint32 emergencyStopEnableBits; /**< \brief Emergency Stop */
285 } IfxMsc_Msc_DownstreamControlConfig;
286
287 /** \brief Downstream Control Extension Configuration Structure
288 */
289 typedef struct
290 {
291 IfxMsc_Extension extension; /**< \brief Specifies the Extension Enable */
292 IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension; /**< \brief Specifies the Number of SRLE bits shifted at Data Frames */
293 IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension; /**< \brief Specifies the Number of SRHE bits shifted at Data Frames */
294 uint32 downstreamExtensionDataSourcesLow; /**< \brief Specifies the Downstream Select Data Source Low Extension */
295 uint32 downstreamExtensionDataSourcesHigh; /**< \brief Specifies the Downstream Select Data Source High Extension */
296 uint32 emergencyStopExtensionEnableBits; /**< \brief Emergency Stop Extension */
297 IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Data Frames Extension */
298 IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Control Frames Extension */
299 IfxMsc_NDividerDownstream nDividerDownstream; /**< \brief Specifies the division ratio for downstream generator clock */
300 } IfxMsc_Msc_DownstreamControlExtensionConfig;
301
302 /** \brief Interrupt Configuration Structure
303 */
304 typedef struct
305 {
306 IfxMsc_DataFrameInterruptNode dataFrameInterruptNode; /**< \brief Specifies the Data Frame Interrupt Node */
307 IfxMsc_DataFrameInterrupt dataFrameInterrupt; /**< \brief Specifies the Data Frame Interrupt Mode */
308 IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode; /**< \brief Specifies the Command Frame Interrupt Node */
309 IfxMsc_CommandFrameInterrupt commandFrameInterrupt; /**< \brief Specifies the Command Frame Interrupt Mode */
310 IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode; /**< \brief Specifies the Time Frame Interrupt Node */
311 IfxMsc_TimeFrameInterrupt timeFrameInterrupt; /**< \brief Specifies the Time Frame Interrupt Mode */
312 IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode; /**< \brief Specifies the Receive Interrupt Node */
313 IfxMsc_ReceiveDataInterrupt receiveDataInterrupt; /**< \brief Specifies the Receive Interrupt Mode */
314 IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode; /**< \brief Specifies the Upstream Timeout Interrupt Node */
315 IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt; /**< \brief Specifies the Upstream Timeout Interrupt Mode */
316 IfxMsc_OverflowInterruptNode overflowInterruptNode; /**< \brief Specifies the ABRA Overflow Interrupt Node */
317 IfxMsc_OverflowInterrupt overflowInterrupt; /**< \brief Specifies the ABRA Overflow Interrupt Mode */
318 IfxMsc_UnderflowInterruptNode underflowInterruptNode; /**< \brief Specifies the ABRA Underflow Interrupt Node */
319 IfxMsc_UnderflowInterrupt underflowInterrupt; /**< \brief Specifies the ABRA Underflow Interrupt Mode */
320 } IfxMsc_Msc_InterruptConfig;
321
322 /** \brief MSC Pin Configuration Structure
323 */
324 typedef struct
325 {
326 IfxMsc_Msc_fclp fclp;
327 IfxMsc_Msc_fcln fcln;
328 IfxMsc_Msc_sop sop;
329 IfxMsc_Msc_son son;
330 IfxMsc_Msc_en en0;
331 IfxMsc_Msc_en en1;
332 IfxMsc_Msc_en en2;
333 IfxMsc_Msc_en en3;
334 IfxMsc_Msc_sdi sdi;
335 IfxMsc_Msc_inj0 inj0;
336 IfxMsc_Msc_inj1 inj1;
337 IfxPort_PadDriver pinDriver;
338 } IfxMsc_Msc_Io;
339
340 /** \brief Output Control Configuration Structure
341 */
342 typedef struct
343 {
344 IfxMsc_FclLinePolarity fclpPolarity; /**< \brief Specifies the FCLP Polarity */
345 IfxMsc_SoLinePolarity sopPolarity; /**< \brief Specifies the SLP Polarity */
346 IfxMsc_ChipSelectActiveState cslpPolarity; /**< \brief Specifies the CSLP Polarity */
347 IfxMsc_SdiLinePolarity sdiLinePolarity; /**< \brief Specifies the ILP Polarity */
348 IfxMsc_FclClockControlEnabled fclClockControl; /**< \brief Specifies the CLKCTRL Polarity */
349 } IfxMsc_Msc_OutputControlConfig;
350
351 /** \brief Upstream Control Configuration Structure
352 */
353 typedef struct
354 {
355 IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType; /**< \brief Specifies the Upstream Channel Frame Type */
356 IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate; /**< \brief Specifies the Upstream Channel Receiving Rate */
357 IfxMsc_Parity parity; /**< \brief Specifies the Parity Mode */
358 IfxMsc_ServiceRequestDelay serviceRequestDelay; /**< \brief Specifies the Service Request Delay */
359 IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler; /**< \brief Specifies the Upstream Timeout Prescaler */
360 IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue; /**< \brief Specifies the Upstream Timeout Value */
361 } IfxMsc_Msc_UpstreamStatusConfig;
362
363 /** \} */
364
365 /** \addtogroup IfxLld_Msc_Msc_Data_Structures
366 * \{ */
367 /** \brief MSC base address data Structure
368 */
369 typedef struct
370 {
371 Ifx_MSC *msc; /**< \brief Specifies the pointer to the MSC registers */
372 } IfxMsc_Msc;
373
374 /** \brief MSC Module Configuration Structure
375 */
376 typedef struct
377 {
378 Ifx_MSC *msc; /**< \brief Specifies the pointer to the MSC registers */
379 IfxMsc_Msc_Clock clockConfig; /**< \brief Specifies the Clock configuration */
380 IfxMsc_Msc_UpstreamStatusConfig upstreamConfig; /**< \brief Specifies the Upstream configuration */
381 IfxMsc_Msc_InterruptConfig interruptConfig; /**< \brief Specifies the Interrupt configuration */
382 IfxMsc_Msc_OutputControlConfig outputControlConfig; /**< \brief Specifies the Output Control configuration */
383 IfxMsc_Msc_DownstreamControlConfig downstreamConfig; /**< \brief Specifies the Downstream configuration */
384 IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig; /**< \brief Specifies the Downstream Extension configuration */
385 IfxMsc_Msc_Abra abraConfig; /**< \brief Specifies the ABRA configuration */
386 IfxMsc_Target target[IFXMSC_NUM_ENABLE_SELECT_LINES]; /**< \brief Specifies the Downstream targets */
387 IfxMsc_Msc_Io io; /**< \brief Specifies the IO Pin configuration */
388 } IfxMsc_Msc_Config;
389
390 /** \} */
391
392 /** \addtogroup IfxLld_Msc_Msc_Module_Initialize_Functions
393 * \{ */
394
395 /******************************************************************************/
396 /*-------------------------Global Function Prototypes-------------------------*/
397 /******************************************************************************/
398
399 /** \brief de-initialize MSC module
400 * \param msc pointer to the MSC module handle
401 * \return None
402 *
403 * \code
404 * IfxMsc_Msc_deInitModule(&msc);
405 * \endcode
406 *
407 */
408 IFX_EXTERN void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc);
409
410 /** \brief initialize the MSC module
411 * \param msc pointer to the MSC module handle
412 * \param config pointer to the MSC module configuration
413 * \return None
414 *
415 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
416 *
417 */
418 IFX_EXTERN void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
419
420 /** \brief initialize the MSC module configuration
421 * \param config pointer to the MSC configuration
422 * \param msc pointer to the MSC registers
423 * \return None
424 *
425 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
426 *
427 */
428 IFX_EXTERN void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc);
429
430 /** \brief initialize the ABRA block
431 * \param msc pointer to the MSC module handle
432 * \param config pointer to the MSC module configuration
433 * \return None
434 */
435 IFX_EXTERN void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
436
437 /** \brief initialize the MSC data extension block for 64bit operation
438 * \param msc pointer to the MSC module handle
439 * \param config pointer to the MSC module configuration
440 * \return None
441 */
442 IFX_EXTERN void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
443
444 /** \} */
445
446 /** \addtogroup IfxLld_Msc_Msc_Send_Functions
447 * \{ */
448
449 /******************************************************************************/
450 /*-------------------------Global Function Prototypes-------------------------*/
451 /******************************************************************************/
452
453 /** \brief send downstream command
454 * \param msc pointer to the MSC module handle
455 * \param command transmit command
456 * \return None
457 */
458 IFX_EXTERN void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command);
459
460 /** \brief send complete downstream data, both high and low
461 * \param msc pointer to the MSC module handle
462 * \param dataLow low data to be transmitted
463 * \param dataHigh high data to be transmitted
464 * \return None
465 *
466 * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
467 *
468 */
469 IFX_EXTERN void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh);
470
471 /** \brief Send downstream data extension (64bit)
472 * \param msc pointer to the MSC module handle
473 * \param data Data to send
474 * \param dataExtension Data extension to send
475 * \return None
476 */
477 IFX_EXTERN void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension);
478
479 /** \brief send high downstream data
480 * \param msc pointer to the MSC module handle
481 * \param data high downstream data to be transmitted
482 * \return None
483 */
484 IFX_EXTERN void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data);
485
486 /** \brief send high downstream data
487 * \param msc pointer to the MSC module handle
488 * \param data low downstream data to be transmitted
489 * \return None
490 */
491 IFX_EXTERN void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data);
492
493 /** \} */
494
495 /** \addtogroup IfxLld_Msc_Msc_Receive_Functions
496 * \{ */
497
498 /******************************************************************************/
499 /*-------------------------Global Function Prototypes-------------------------*/
500 /******************************************************************************/
501
502 /** \brief receive upstream data
503 * \param msc pointer to the MSC module handle
504 * \param upstreamIdx index of the upstream data register
505 * \return data
506 */
507 IFX_EXTERN uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx);
508
509 /** \} */
510
511 /** \addtogroup IfxLld_Msc_Msc_Target_Read_Write_Functions
512 * \{ */
513
514 /******************************************************************************/
515 /*-------------------------Global Function Prototypes-------------------------*/
516 /******************************************************************************/
517
518 /** \brief get the target during high and low phase
519 * \param msc pointer to the MSC module handle
520 * \param target low phase target or high phase target
521 * \return selected target
522 */
523 IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target);
524
525 /** \brief set the command for target
526 * \param msc pointer to the MSC module handle
527 * \param enX enX target to be selected
528 * \return None
529 */
530 IFX_EXTERN void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX);
531
532 /** \brief set the target data to be transmitted during low and high phase
533 * \param msc pointer to the MSC module handle
534 * \param enXHigh high target to be selected
535 * \param enXLow low target to be selected
536 * \return None
537 */
538 IFX_EXTERN void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow);
539
540 /** \} */
541
542 /******************************************************************************/
543 /*-------------------------Inline Function Prototypes-------------------------*/
544 /******************************************************************************/
545
546 /**
547 * \param msc pointer to the MSC module handle
548 * \return None
549 */
550 IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc);
551
552 /**
553 * \param msc pointer to the MSC module handle
554 * \return status of the active data frame
555 */
556 IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc);
557
558 /**
559 * \param msc pointer to the MSC module handle
560 * \return status of the data frame interrupt
561 */
562 IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc);
563
564 /******************************************************************************/
565 /*---------------------Inline Function Implementations------------------------*/
566 /******************************************************************************/
567
568 IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc)
569 {
570 IfxMsc_clearDataFrameInterruptFlag(msc->msc);
571 }
572
573
574 IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc)
575 {
576 return IfxMsc_getActiveDataFrameStatus(msc->msc);
577 }
578
579
580 IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc)
581 {
582 return IfxMsc_getDataFrameInterruptFlag(msc->msc);
583 }
584
585
586 #endif /* IFXMSC_MSC_H */
IfxMsc_Msc_sendDataLow
IFX_EXTERN void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:672
IfxMsc_Msc_Target
IfxMsc_Msc_Target
Msc Instance Number.
Definition: IfxMsc_Msc.h:178
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue
Specifies the Upstream Timeout Value.
Definition: IfxMsc_Msc.h:360
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:47
IfxMsc_Msc_DownstreamControlConfig::passiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount
Specifies the Number of Passive Time Frames.
Definition: IfxMsc_Msc.h:276
IfxMsc_Msc_Abra::clockSelectAbra
IfxMsc_ClockSelect clockSelectAbra
Specifies the clock select for ABRA.
Definition: IfxMsc_Msc.h:253
IfxMsc_Msc_DownstreamControlConfig::srhActivePhaseSelection
IfxMsc_ActivePhaseSelection srhActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:273
IfxMsc_Msc_Io::fclp
IfxMsc_Msc_fclp fclp
Definition: IfxMsc_Msc.h:326
IfxMsc_Msc_InterruptConfig::timeFrameInterrupt
IfxMsc_TimeFrameInterrupt timeFrameInterrupt
Specifies the Time Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:311
IfxMsc_Msc_OutputControlConfig::sopPolarity
IfxMsc_SoLinePolarity sopPolarity
Specifies the SLP Polarity.
Definition: IfxMsc_Msc.h:345
IfxMsc_ExternalSignalInjection
IfxMsc_ExternalSignalInjection
Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal Definition in Ifx_M...
Definition: IfxMsc.h:501
IfxMsc_Msc_Io::en1
IfxMsc_Msc_en en1
Definition: IfxMsc_Msc.h:331
IfxMsc_Msc_setCommandTarget
IFX_EXTERN void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
set the command for target
Definition: IfxMsc_Msc.c:684
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin0
IfxMsc_ExternalSignalInjection externalSignalInjectionPin0
Specifies the Injection Enable Pin 0.
Definition: IfxMsc_Msc.h:277
IfxMsc_Msc_UpstreamStatusConfig::serviceRequestDelay
IfxMsc_ServiceRequestDelay serviceRequestDelay
Specifies the Service Request Delay.
Definition: IfxMsc_Msc.h:358
IfxMsc_Msc
MSC base address data Structure.
Definition: IfxMsc_Msc.h:369
IfxMsc_Msc_fclp::pin
IfxMsc_Fclp_Out * pin
Definition: IfxMsc_Msc.h:206
IfxMsc_Msc_Target_low
MSC Target Low.
Definition: IfxMsc_Msc.h:180
IfxMsc_Msc_en::pin
IfxMsc_En_Out * pin
Definition: IfxMsc_Msc.h:194
IfxMsc_ReceiveDataInterrupt
IfxMsc_ReceiveDataInterrupt
Interrupt Control Register - Receive Data Interrupt Enable Definition in Ifx_MSC.ICR.B.RDIE.
Definition: IfxMsc.h:657
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesLow
uint32 downstreamExtensionDataSourcesLow
Specifies the Downstream Select Data Source Low Extension.
Definition: IfxMsc_Msc.h:294
IfxMsc_Msc_DownstreamControlConfig::dataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength
Specifies the Passive Phase Length at Data Frames.
Definition: IfxMsc_Msc.h:275
IfxMsc_Msc_Abra::highPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock
Specifies High phase of shift clock.
Definition: IfxMsc_Msc.h:250
IfxMsc_Msc_Io::en3
IfxMsc_Msc_en en3
Definition: IfxMsc_Msc.h:333
IfxMsc_UpstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler
Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler Definition in Ifx_MSC.USCE.B.USTOPRE.
Definition: IfxMsc.h:877
IfxMsc_Msc_InterruptConfig::receiveDataInterrupt
IfxMsc_ReceiveDataInterrupt receiveDataInterrupt
Specifies the Receive Interrupt Mode.
Definition: IfxMsc_Msc.h:313
IfxMsc_Msc_OutputControlConfig::fclClockControl
IfxMsc_FclClockControlEnabled fclClockControl
Specifies the CLKCTRL Polarity.
Definition: IfxMsc_Msc.h:348
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMsc_ActivePhaseSelection
IfxMsc_ActivePhaseSelection
Enable SRL/SRH Active Phase Selection Bit Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL.
Definition: IfxMsc.h:68
IfxMsc_NDividerDownstream
IfxMsc_NDividerDownstream
Downstream Timing Extension Register - N Divider Downstream Definition in Ifx_MSC.DSTE.B.NDD.
Definition: IfxMsc.h:581
IfxMsc_Msc_DownstreamControlExtensionConfig::downstreamExtensionDataSourcesHigh
uint32 downstreamExtensionDataSourcesHigh
Specifies the Downstream Select Data Source High Extension.
Definition: IfxMsc_Msc.h:295
IfxMsc_Msc_inj0::mode
IfxPort_InputMode mode
Definition: IfxMsc_Msc.h:213
IfxMsc_Msc_sendDataHigh
IFX_EXTERN void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
send high downstream data
Definition: IfxMsc_Msc.c:660
IfxMsc_Msc_InterruptConfig::underflowInterrupt
IfxMsc_UnderflowInterrupt underflowInterrupt
Specifies the ABRA Underflow Interrupt Mode.
Definition: IfxMsc_Msc.h:319
IfxMsc_TimeFrameInterrupt
IfxMsc_TimeFrameInterrupt
Interrupt Control Register - Time Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.TFIE.
Definition: IfxMsc.h:782
IfxMsc_UpstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:856
IfxMsc_DataFrameInterrupt
IfxMsc_DataFrameInterrupt
Interrupt Control Register - Data Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.EDIE.
Definition: IfxMsc.h:321
IfxMsc_Msc_DownstreamControlConfig::srlActivePhaseSelection
IfxMsc_ActivePhaseSelection srlActivePhaseSelection
Specifies the Enable SRL active phase selection bit.
Definition: IfxMsc_Msc.h:272
IfxMsc_Extension
IfxMsc_Extension
Downstream Control Enhanced Register - Extension Enable Definition in Ifx_MSC.DSCE.B.NDBLE.
Definition: IfxMsc.h:421
IfxMsc_AsynchronousBlock
IfxMsc_AsynchronousBlock
Asynchronous Block Configuration Register - Asynchronous Block Bypass Definition in Ifx_MSC...
Definition: IfxMsc.h:77
IfxMsc_Msc_Config::abraConfig
IfxMsc_Msc_Abra abraConfig
Specifies the ABRA configuration.
Definition: IfxMsc_Msc.h:385
IfxMsc_Msc_Io::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMsc_Msc.h:337
IfxMsc_Msc_fcln::pin
IfxMsc_Fcln_Out * pin
Definition: IfxMsc_Msc.h:200
IfxMsc_Msc_UpstreamStatusConfig::upstreamTimeoutPrescaler
IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler
Specifies the Upstream Timeout Prescaler.
Definition: IfxMsc_Msc.h:359
IfxMsc_TransmissionMode
IfxMsc_TransmissionMode
Downstream Channel Transmission Mode Definition in Ifx_MSC.DSC.B.TM.
Definition: IfxMsc.h:802
IfxMsc_UpstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate
Upstream Receiving Rate Definition in Ifx_MSC.USR.B.URR.
Definition: IfxMsc.h:841
IfxMsc_Msc_sendCommand
IFX_EXTERN void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
send downstream command
Definition: IfxMsc_Msc.c:620
IfxMsc_Msc_sdi::pin
IfxMsc_Sdi_In * pin
Definition: IfxMsc_Msc.h:224
IfxMsc_Msc_initModule
IFX_EXTERN void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC module
Definition: IfxMsc_Msc.c:59
IfxMsc_Msc_getDataFrameInterruptStatus
IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:580
IFXMSC_NUM_ENABLE_SELECT_LINES
#define IFXMSC_NUM_ENABLE_SELECT_LINES
Definition: IfxMsc_cfg.h:50
IfxMsc_Msc_deInitModule
IFX_EXTERN void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
de-initialize MSC module
Definition: IfxMsc_Msc.c:35
IfxMsc_Msc_setDataTarget
IFX_EXTERN void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
set the target data to be transmitted during low and high phase
Definition: IfxMsc_Msc.c:692
IfxMsc_Msc_Config::clockConfig
IfxMsc_Msc_Clock clockConfig
Specifies the Clock configuration.
Definition: IfxMsc_Msc.h:379
IfxMsc_Msc_DownstreamControlConfig::externalSignalInjectionPin1
IfxMsc_ExternalSignalInjection externalSignalInjectionPin1
Specifies the Injection Enable Pin 1.
Definition: IfxMsc_Msc.h:279
IfxMsc_ControlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension Definition in...
Definition: IfxMsc.h:175
IfxMsc_Msc_getTarget
IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
get the target during high and low phase
Definition: IfxMsc_Msc.c:41
IfxMsc_Msc_InterruptConfig
Interrupt Configuration Structure.
Definition: IfxMsc_Msc.h:304
IfxMsc_CommandDataCommandRepetitionMode
IfxMsc_CommandDataCommandRepetitionMode
Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode Definition in Ifx...
Definition: IfxMsc.h:106
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxMsc_Msc_son::pin
IfxMsc_Son_Out * pin
Definition: IfxMsc_Msc.h:230
IfxMsc_Msc_initializeAbra
IFX_EXTERN void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the ABRA block
Definition: IfxMsc_Msc.c:522
IfxMsc_Msc_InterruptConfig::timeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode
Specifies the Time Frame Interrupt Node.
Definition: IfxMsc_Msc.h:310
IfxMsc_Msc_DownstreamControlConfig::srlDataFrameLength
IfxMsc_DataFrameLength srlDataFrameLength
Specifies the Number of SRL bits shifted at data frames.
Definition: IfxMsc_Msc.h:270
IfxMsc_Msc_DownstreamControlExtensionConfig
Downstream Control Extension Configuration Structure.
Definition: IfxMsc_Msc.h:289
IfxMsc_Msc_InterruptConfig::overflowInterruptNode
IfxMsc_OverflowInterruptNode overflowInterruptNode
Specifies the ABRA Overflow Interrupt Node.
Definition: IfxMsc_Msc.h:316
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterrupt
IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt
Specifies the Upstream Timeout Interrupt Mode.
Definition: IfxMsc_Msc.h:315
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxMsc_Msc_initializeDataExtension
IFX_EXTERN void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
initialize the MSC data extension block for 64bit operation
Definition: IfxMsc_Msc.c:552
IfxMsc_MsbBitDataExtension
IfxMsc_MsbBitDataExtension
Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/...
Definition: IfxMsc.h:557
IfxMsc_OverflowInterruptNode
IfxMsc_OverflowInterruptNode
Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:613
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin1
IfxMsc_ExternalBitInjectionPosition injectionPositionPin1
Specifies the Injection Position Pin 1.
Definition: IfxMsc_Msc.h:280
IfxMsc_Msc_InterruptConfig::underflowInterruptNode
IfxMsc_UnderflowInterruptNode underflowInterruptNode
Specifies the ABRA Underflow Interrupt Node.
Definition: IfxMsc_Msc.h:318
IfxMsc_Msc_DownstreamControlConfig::commandDataCommandReceptionMode
IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode
Specifies the Command-Data-Command in Data Repetition Mode.
Definition: IfxMsc_Msc.h:281
IfxMsc_DividerMode
IfxMsc_DividerMode
Divider mode.
Definition: IfxMsc.h:403
IfxMsc_Msc_getActiveDataFrameStatus
IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:574
IfxMsc_Msc_InterruptConfig::commandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode
Specifies the Command Frame Interrupt Node.
Definition: IfxMsc_Msc.h:308
IfxMsc_SoLinePolarity
IfxMsc_SoLinePolarity
Output Control Register - SOP Line Polarity Definition in Ifx_MSC.OCR.B.SLP.
Definition: IfxMsc.h:744
IfxMsc_Msc_DownstreamControlExtensionConfig::emergencyStopExtensionEnableBits
uint32 emergencyStopExtensionEnableBits
Emergency Stop Extension.
Definition: IfxMsc_Msc.h:296
IfxMsc_Msc_Abra::abraDownstreamBlockBaudrate
uint32 abraDownstreamBlockBaudrate
Specifies ABRA downstream block baud.
Definition: IfxMsc_Msc.h:248
IfxMsc_Msc_en
Definition: IfxMsc_Msc.h:192
IfxMsc_Msc_Config::upstreamConfig
IfxMsc_Msc_UpstreamStatusConfig upstreamConfig
Specifies the Upstream configuration.
Definition: IfxMsc_Msc.h:380
IfxMsc_Msc_InterruptConfig::overflowInterrupt
IfxMsc_OverflowInterrupt overflowInterrupt
Specifies the ABRA Overflow Interrupt Mode.
Definition: IfxMsc_Msc.h:317
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:88
IfxMsc_Msc_fclp
Definition: IfxMsc_Msc.h:204
IfxMsc_ServiceRequestDelay
IfxMsc_ServiceRequestDelay
Service Request Delay Definition in Ifx_MSC.USR.B.SRDC.
Definition: IfxMsc.h:703
IfxMsc_Msc_fcln
Definition: IfxMsc_Msc.h:198
IfxMsc_ReceiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode
Interrupt Control Register - Receive Data Interrupt Pointer Definition in Ifx_MSC.ICR.B.RDIP.
Definition: IfxMsc.h:668
IfxMsc_Msc_Io::fcln
IfxMsc_Msc_fcln fcln
Definition: IfxMsc_Msc.h:327
IfxMsc_Parity
IfxMsc_Parity
Parity Mode Definition in Ifx_MSC.USR.B.PCT.
Definition: IfxMsc.h:625
IfxMsc_Msc_OutputControlConfig::cslpPolarity
IfxMsc_ChipSelectActiveState cslpPolarity
Specifies the CSLP Polarity.
Definition: IfxMsc_Msc.h:346
IfxMsc_Msc_sdi
Definition: IfxMsc_Msc.h:222
IfxMsc_clearDataFrameInterruptFlag
void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
clear data frame interrupt flag
Definition: IfxMsc.c:35
IfxMsc_Msc_OutputControlConfig::fclpPolarity
IfxMsc_FclLinePolarity fclpPolarity
Specifies the FCLP Polarity.
Definition: IfxMsc_Msc.h:344
IfxMsc_Msc_Abra::abraBlockBypass
IfxMsc_AsynchronousBlock abraBlockBypass
Specifies ABRA block bypass.
Definition: IfxMsc_Msc.h:252
IfxMsc_NDividerAbra
IfxMsc_NDividerAbra
Asynchronous Block Configuration Register - N Divider ABRA Definition in Ifx_MSC.ABC.B.NDA.
Definition: IfxMsc.h:566
IfxMsc_Msc_sendData
IFX_EXTERN void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
send complete downstream data, both high and low
Definition: IfxMsc_Msc.c:629
IfxMsc_Msc_Io::sdi
IfxMsc_Msc_sdi sdi
Definition: IfxMsc_Msc.h:334
IfxMsc_PassiveTimeFrameCount
IfxMsc_PassiveTimeFrameCount
Downstream Status Register - Number Of Passive Time Frames Definition in Ifx_MSC.DSS.B.NPTF.
Definition: IfxMsc.h:634
IfxMsc_ClockSelect
IfxMsc_ClockSelect
Asynchronous Block Configuration Register - Clock Select Definition in Ifx_MSC.ABC.B.CLKSEL.
Definition: IfxMsc.h:95
IfxMsc_Msc_InterruptConfig::dataFrameInterrupt
IfxMsc_DataFrameInterrupt dataFrameInterrupt
Specifies the Data Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:307
IfxMsc_Msc_son
Definition: IfxMsc_Msc.h:228
IfxMsc_Msc_sop
Definition: IfxMsc_Msc.h:234
IfxMsc_Msc_Io::en2
IfxMsc_Msc_en en2
Definition: IfxMsc_Msc.h:332
IfxMsc_SdiLinePolarity
IfxMsc_SdiLinePolarity
Output Control Register - SDI Line Polarity Definition in Ifx_MSC.OCR.B.ILP.
Definition: IfxMsc.h:679
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc_Msc_sendDataExtension
IFX_EXTERN void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
Send downstream data extension (64bit)
Definition: IfxMsc_Msc.c:647
IfxMsc_Msc::msc
Ifx_MSC * msc
Specifies the pointer to the MSC registers.
Definition: IfxMsc_Msc.h:371
IfxMsc.h
MSC basic functionality.
IfxMsc_Msc_InterruptConfig::upstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode
Specifies the Upstream Timeout Interrupt Node.
Definition: IfxMsc_Msc.h:314
IfxMsc_TimeFrameInterruptNode
IfxMsc_TimeFrameInterruptNode
Interrupt Control Register - Time Frame Interrupt Pointer Definition in Ifx_MSC.ICR.B.TFIP.
Definition: IfxMsc.h:791
IfxMsc_Msc_InterruptConfig::dataFrameInterruptNode
IfxMsc_DataFrameInterruptNode dataFrameInterruptNode
Specifies the Data Frame Interrupt Node.
Definition: IfxMsc_Msc.h:306
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:55
IfxMsc_Msc_clearDataFrameInterrupt
IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc)
Definition: IfxMsc_Msc.h:568
IfxMsc_Msc_Clock::dividerMode
IfxMsc_DividerMode dividerMode
Specifies divided clock properties.
Definition: IfxMsc_Msc.h:261
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesHigh
uint32 downstreamDataSourcesHigh
Specifies the Downstream Data Source selections High.
Definition: IfxMsc_Msc.h:283
IfxMsc_CommandFrameLength
IfxMsc_CommandFrameLength
Number of Bits shifted at command frames Definition in Ifx_MSC.DSC.B.NBC.
Definition: IfxMsc.h:135
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxMsc_Msc_Config::downstreamExtensionConfig
IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig
Specifies the Downstream Extension configuration.
Definition: IfxMsc_Msc.h:384
IfxMsc_OverflowInterrupt
IfxMsc_OverflowInterrupt
Asynchronous Block Configuration Register - Overflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:604
IfxMsc_Msc_DownstreamControlExtensionConfig::nDividerDownstream
IfxMsc_NDividerDownstream nDividerDownstream
Specifies the division ratio for downstream generator clock.
Definition: IfxMsc_Msc.h:299
IfxMsc_Msc_Abra::nDividerAbra
IfxMsc_NDividerAbra nDividerAbra
Specifies the N divider.
Definition: IfxMsc_Msc.h:251
IfxMsc_Msc_DownstreamControlConfig::commandFrameLength
IfxMsc_CommandFrameLength commandFrameLength
Specifies the Number of bits shifted at command frames.
Definition: IfxMsc_Msc.h:274
IfxMsc_Msc_Config::downstreamConfig
IfxMsc_Msc_DownstreamControlConfig downstreamConfig
Specifies the Downstream configuration.
Definition: IfxMsc_Msc.h:383
IfxMsc_Msc_en::mode
IfxPort_OutputMode mode
Definition: IfxMsc_Msc.h:195
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc_CommandFrameInterruptNode
IfxMsc_CommandFrameInterruptNode
Interrupt Control Register - Command Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.ECIP.
Definition: IfxMsc.h:124
IfxMsc_Msc_InterruptConfig::commandFrameInterrupt
IfxMsc_CommandFrameInterrupt commandFrameInterrupt
Specifies the Command Frame Interrupt Mode.
Definition: IfxMsc_Msc.h:309
IfxMsc_Msc_DownstreamControlExtensionConfig::srlBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension
Specifies the Number of SRLE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:292
IfxMsc_Msc_receiveData
IFX_EXTERN uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
receive upstream data
Definition: IfxMsc_Msc.c:599
IfxMsc_Msc_DownstreamControlConfig::injectionPositionPin0
IfxMsc_ExternalBitInjectionPosition injectionPositionPin0
Specifies the Injection Position Pin 0.
Definition: IfxMsc_Msc.h:278
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType
Specifies the Upstream Channel Frame Type.
Definition: IfxMsc_Msc.h:355
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:39
IfxMsc_Msc_DownstreamControlConfig
Downstream Control Configuration Structure.
Definition: IfxMsc_Msc.h:267
IfxMsc_UnderflowInterrupt
IfxMsc_UnderflowInterrupt
Asynchronous Block Configuration Register - Underflow Interrupt Enable Definition in Ifx_MSC...
Definition: IfxMsc.h:811
IfxMsc_UpstreamTimeoutValue
IfxMsc_UpstreamTimeoutValue
Upstream Control Enhanced Register 1 - Upstream Timeout Value Definition in Ifx_MSC.USCE.B.USTOVAL.
Definition: IfxMsc.h:900
IfxMsc_getActiveDataFrameStatus
boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
get the status of the active data frame
Definition: IfxMsc.c:115
IfxMsc_Msc_Config::interruptConfig
IfxMsc_Msc_InterruptConfig interruptConfig
Specifies the Interrupt configuration.
Definition: IfxMsc_Msc.h:381
IfxMsc_Msc_DownstreamControlConfig::emergencyStopEnableBits
uint32 emergencyStopEnableBits
Emergency Stop.
Definition: IfxMsc_Msc.h:284
IfxMsc_FclLinePolarity
IfxMsc_FclLinePolarity
Output Control Register - FCLP Line Polarity Definition in Ifx_MSC.OCR.B.CLP.
Definition: IfxMsc.h:519
IfxMsc_Msc_InterruptConfig::receiveDataInterruptNode
IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode
Specifies the Receive Interrupt Node.
Definition: IfxMsc_Msc.h:312
IfxMsc_Msc_Io::inj0
IfxMsc_Msc_inj0 inj0
Definition: IfxMsc_Msc.h:335
IfxMsc_Msc_inj0
Definition: IfxMsc_Msc.h:210
IfxMsc_Msc_inj1
Definition: IfxMsc_Msc.h:216
IfxMsc_Msc_initModuleConfig
IFX_EXTERN void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
initialize the MSC module configuration
Definition: IfxMsc_Msc.c:388
IfxMsc_Msc_DownstreamControlConfig::downstreamDataSourcesLow
uint32 downstreamDataSourcesLow
Specifies the Downstream Data Source selections Low.
Definition: IfxMsc_Msc.h:282
IfxMsc_Msc_UpstreamStatusConfig::upstreamChannelReceivingRate
IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate
Specifies the Upstream Channel Receiving Rate.
Definition: IfxMsc_Msc.h:356
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxMsc_Msc_Abra::lowPhaseOfShiftClock
IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock
Specifies Low phase of shift clock.
Definition: IfxMsc_Msc.h:249
IfxMsc_ExternalBitInjectionPosition
IfxMsc_ExternalBitInjectionPosition
Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal Definition in Ifx...
Definition: IfxMsc.h:430
IfxMsc_Msc_OutputControlConfig
Output Control Configuration Structure.
Definition: IfxMsc_Msc.h:342
IfxMsc_Msc_Clock::baudrate
uint32 baudrate
Specifies the baud rate.
Definition: IfxMsc_Msc.h:260
IfxMsc_UnderflowInterruptNode
IfxMsc_UnderflowInterruptNode
Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:820
IfxMsc_Msc_DownstreamControlConfig::transmissionMode
IfxMsc_TransmissionMode transmissionMode
Specifies the transmission Mode.
Definition: IfxMsc_Msc.h:269
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:80
IfxMsc_Msc_UpstreamStatusConfig
Upstream Control Configuration Structure.
Definition: IfxMsc_Msc.h:353
IfxMsc_UpstreamTimeoutInterruptNode
IfxMsc_UpstreamTimeoutInterruptNode
Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer Definition in Ifx_MSC...
Definition: IfxMsc.h:865
IfxMsc_UpstreamChannelFrameType
IfxMsc_UpstreamChannelFrameType
Channel Frame Type Definition in Ifx_MSC.USR.B.UFT.
Definition: IfxMsc.h:832
IfxMsc_DataFrameInterruptNode
IfxMsc_DataFrameInterruptNode
Interrupt Control Register - Data Frame Interrupt Node Pointer Definition in Ifx_MSC.ICR.B.EDIP.
Definition: IfxMsc.h:331
IfxMsc_Msc_Abra
ABRA block Configuration Structure.
Definition: IfxMsc_Msc.h:246
IfxMsc_Msc_Clock::step
uint16 step
Specifies the step value.
Definition: IfxMsc_Msc.h:262
IfxMsc_ShiftClockPhaseDuration
IfxMsc_ShiftClockPhaseDuration
Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock Definit...
Definition: IfxMsc.h:712
IfxMsc_Msc_sop::pin
IfxMsc_Sop_Out * pin
Definition: IfxMsc_Msc.h:236
IfxMsc_Msc_OutputControlConfig::sdiLinePolarity
IfxMsc_SdiLinePolarity sdiLinePolarity
Specifies the ILP Polarity.
Definition: IfxMsc_Msc.h:347
IfxMsc_Msc_Io
MSC Pin Configuration Structure.
Definition: IfxMsc_Msc.h:324
IfxMsc_Msc_Io::en0
IfxMsc_Msc_en en0
Definition: IfxMsc_Msc.h:330
IfxMsc_Msc_inj0::pin
IfxMsc_Inj_In * pin
Definition: IfxMsc_Msc.h:212
IfxMsc_Msc_Io::inj1
IfxMsc_Msc_inj1 inj1
Definition: IfxMsc_Msc.h:336
IfxMsc_DataFramePassivePhaseLength
IfxMsc_DataFramePassivePhaseLength
Passive Phase Length at Data Frames Definition in Ifx_MSC.DSC.B.PPD.
Definition: IfxMsc.h:366
IfxMsc_DataFrameLength
IfxMsc_DataFrameLength
Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL.
Definition: IfxMsc.h:342
IfxMsc_Msc_Target_high
MSC Target High.
Definition: IfxMsc_Msc.h:181
IfxMsc_Target
IfxMsc_Target
Msc Targets - use as chip enable selection for ENH, ENL and ENC.
Definition: IfxMsc.h:771
IfxMsc_Msc_Io::son
IfxMsc_Msc_son son
Definition: IfxMsc_Msc.h:329
IfxMsc_Msc_Config
MSC Module Configuration Structure.
Definition: IfxMsc_Msc.h:376
IfxMsc_Msc_Clock
Clock configuration data Structure.
Definition: IfxMsc_Msc.h:258
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMsc_Msc_DownstreamControlExtensionConfig::dataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Data Frames Extension.
Definition: IfxMsc_Msc.h:297
IfxMsc_DataFrameExtensionPassivePhaseLength
IfxMsc_DataFrameExtensionPassivePhaseLength
Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension Definition in If...
Definition: IfxMsc.h:310
IfxMsc_Msc_DownstreamControlExtensionConfig::controlFrameExtensionPassivePhaseLength
IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength
Specifies the Passive Phase Length at Control Frames Extension.
Definition: IfxMsc_Msc.h:298
IfxMsc_Msc_DownstreamControlConfig::srhDataFrameLength
IfxMsc_DataFrameLength srhDataFrameLength
Specifies the Number of SRH bits shifted at data frames.
Definition: IfxMsc_Msc.h:271
IfxMsc_Msc_DownstreamControlExtensionConfig::extension
IfxMsc_Extension extension
Specifies the Extension Enable.
Definition: IfxMsc_Msc.h:291
IfxMsc_FclClockControlEnabled
IfxMsc_FclClockControlEnabled
Output Control Register - Clock Control Definition in Ifx_MSC.OCR.B.CLKCTRL.
Definition: IfxMsc.h:510
IfxMsc_Msc_Config::outputControlConfig
IfxMsc_Msc_OutputControlConfig outputControlConfig
Specifies the Output Control configuration.
Definition: IfxMsc_Msc.h:382
IfxMsc_Msc_Config::io
IfxMsc_Msc_Io io
Specifies the IO Pin configuration.
Definition: IfxMsc_Msc.h:387
IfxMsc_getDataFrameInterruptFlag
boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
get the status of the data frame interrupt flag
Definition: IfxMsc.c:138
IfxMsc_CommandFrameInterrupt
IfxMsc_CommandFrameInterrupt
Interrupt Control Register - Command Frame Interrupt Enable Definition in Ifx_MSC.ICR.B.ECIE.
Definition: IfxMsc.h:115
IfxMsc_Msc_DownstreamControlExtensionConfig::srhBitsShiftedAtDataFramesExtension
IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension
Specifies the Number of SRHE bits shifted at Data Frames.
Definition: IfxMsc_Msc.h:293
IfxMsc_Msc_UpstreamStatusConfig::parity
IfxMsc_Parity parity
Specifies the Parity Mode.
Definition: IfxMsc_Msc.h:357
IfxMsc_ChipSelectActiveState
IfxMsc_ChipSelectActiveState
Output Control Register - Chip Selection Line Polarity Definition in Ifx_MSC.OCR.B.CSLP.
Definition: IfxMsc.h:86
IfxMsc_Msc_Io::sop
IfxMsc_Msc_sop sop
Definition: IfxMsc_Msc.h:328


iLLD_TC26B: IfxMsc_PinMap.c Source File

  • _PinMap
IfxMsc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_PinMap.c
3 * \brief MSC I/O map
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxMsc_PinMap.h"
27
28 IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4};
29 IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4};
30 IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5};
31 IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5};
32 IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3};
33 IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5};
34 IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4};
35 IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5};
36 IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4};
37 IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3};
38 IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5};
39 IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt6};
40 IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt5};
41 IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt6};
42 IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT = {&MODULE_MSC0, 2, {&MODULE_P11,11}, IfxPort_OutputIdx_alt2};
43 IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT = {&MODULE_MSC0, 2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt2};
44 IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT = {&MODULE_MSC0, 2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt4};
45 IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT = {&MODULE_MSC0, 3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt6};
46 IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT = {&MODULE_MSC0, 3, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt2};
47 IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT = {&MODULE_MSC0, 3, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2};
48 IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT = {&MODULE_MSC0, 3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2};
49 IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT = {&MODULE_MSC0, 3, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt4};
50 IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5};
51 IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5};
52 IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5};
53 IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt4};
54 IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt3};
55 IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT = {&MODULE_MSC1, 3, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt4};
56 IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt6};
57 IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5};
58 IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt6};
59 IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5};
60 IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5};
61 IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5};
62 IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4};
63 IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5};
64 IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a};
65 IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b};
66 IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a};
67 IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b};
68 IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a};
69 IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b};
70 IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c};
71 IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d};
72 IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a};
73 IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b};
74 IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c};
75 IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7};
76 IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5};
77 IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt6};
78 IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5};
79 IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5};
80 IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5};
81 IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5};
82
83
84 const IfxMsc_En_Out *IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS] = {
85 {
86 {
87 &IfxMsc0_EN0_P10_2_OUT,
88 &IfxMsc0_EN0_P10_3_OUT,
89 &IfxMsc0_EN0_P10_4_OUT,
90 &IfxMsc0_EN0_P11_11_OUT,
91 &IfxMsc0_EN0_P14_10_OUT,
92 &IfxMsc0_EN0_P15_5_OUT
93 },
94 {
95 &IfxMsc0_EN1_P10_1_OUT,
96 &IfxMsc0_EN1_P11_2_OUT,
97 &IfxMsc0_EN1_P13_0_OUT,
98 &IfxMsc0_EN1_P14_9_OUT,
99 &IfxMsc0_EN1_P15_3_OUT,
100 NULL_PTR
101 },
102 {
103 &IfxMsc0_END2_P10_2_OUT,
104 &IfxMsc0_END2_P10_3_OUT,
105 &IfxMsc0_END2_P10_4_OUT,
106 &IfxMsc0_END2_P11_11_OUT,
107 &IfxMsc0_END2_P14_10_OUT,
108 &IfxMsc0_END2_P15_5_OUT
109 },
110 {
111 &IfxMsc0_END3_P10_1_OUT,
112 &IfxMsc0_END3_P11_2_OUT,
113 &IfxMsc0_END3_P13_0_OUT,
114 &IfxMsc0_END3_P14_9_OUT,
115 &IfxMsc0_END3_P15_3_OUT,
116 NULL_PTR
117 }
118 },
119 {
120 {
121 &IfxMsc1_EN0_P23_4_OUT,
122 &IfxMsc1_EN0_P32_4_OUT,
123 NULL_PTR,
124 NULL_PTR,
125 NULL_PTR,
126 NULL_PTR
127 },
128 {
129 &IfxMsc1_EN1_P23_5_OUT,
130 NULL_PTR,
131 NULL_PTR,
132 NULL_PTR,
133 NULL_PTR,
134 NULL_PTR
135 },
136 {
137 &IfxMsc1_END2_P23_4_OUT,
138 &IfxMsc1_END2_P32_4_OUT,
139 NULL_PTR,
140 NULL_PTR,
141 NULL_PTR,
142 NULL_PTR
143 },
144 {
145 &IfxMsc1_END3_P23_5_OUT,
146 NULL_PTR,
147 NULL_PTR,
148 NULL_PTR,
149 NULL_PTR,
150 NULL_PTR
151 }
152 }
153 };
154
155 const IfxMsc_Fcln_Out *IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS] = {
156 {
157 &IfxMsc0_FCLN_P13_0_OUT,
158 &IfxMsc0_FCLND_P13_0_OUT
159 },
160 {
161 &IfxMsc1_FCLN_P22_0_OUT,
162 &IfxMsc1_FCLND_P22_0_OUT
163 }
164 };
165
166 const IfxMsc_Fclp_Out *IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS] = {
167 {
168 &IfxMsc0_FCLP_P11_6_OUT,
169 &IfxMsc0_FCLP_P13_1_OUT,
170 &IfxMsc0_FCLP_P13_2_OUT
171 },
172 {
173 &IfxMsc1_FCLP_P22_1_OUT,
174 NULL_PTR,
175 NULL_PTR
176 }
177 };
178
179 const IfxMsc_Inj_In *IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS] = {
180 {
181 &IfxMsc0_INJ0_P00_0_IN,
182 &IfxMsc0_INJ1_P10_5_IN
183 },
184 {
185 &IfxMsc1_INJ0_P23_3_IN,
186 &IfxMsc1_INJ1_P33_13_IN
187 }
188 };
189
190 const IfxMsc_Sdi_In *IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS] = {
191 {
192 &IfxMsc0_SDI0_P11_10_IN,
193 &IfxMsc0_SDI1_P10_2_IN,
194 &IfxMsc0_SDI2_P14_3_IN,
195 &IfxMsc0_SDI3_P11_3_IN
196 },
197 {
198 &IfxMsc1_SDI0_P23_1_IN,
199 &IfxMsc1_SDI1_P02_3_IN,
200 &IfxMsc1_SDI2_P32_4_IN,
201 NULL_PTR
202 }
203 };
204
205 const IfxMsc_Son_Out *IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS] = {
206 {
207 &IfxMsc0_SON_P13_2_OUT,
208 &IfxMsc0_SOND_P13_2_OUT
209 },
210 {
211 &IfxMsc1_SON_P22_2_OUT,
212 &IfxMsc1_SOND_P22_2_OUT
213 }
214 };
215
216 const IfxMsc_Sop_Out *IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS] = {
217 {
218 &IfxMsc0_SOP_P11_9_OUT,
219 &IfxMsc0_SOP_P13_3_OUT
220 },
221 {
222 &IfxMsc1_SOP_P22_3_OUT,
223 NULL_PTR
224 }
225 };
IfxMsc1_INJ0_P23_3_IN
IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
Definition: IfxMsc_PinMap.c:66
IfxMsc0_EN0_P10_3_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
Definition: IfxMsc_PinMap.c:29
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:47
IfxMsc0_EN0_P10_2_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
Definition: IfxMsc_PinMap.c:28
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:157
IfxMsc1_END3_P23_5_OUT
IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT
Definition: IfxMsc_PinMap.c:55
IfxMsc0_END3_P13_0_OUT
IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT
Definition: IfxMsc_PinMap.c:47
IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:154
IfxMsc1_SDI0_P23_1_IN
IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
Definition: IfxMsc_PinMap.c:72
IfxMsc1_SDI2_P32_4_IN
IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
Definition: IfxMsc_PinMap.c:74
IfxMsc0_FCLP_P13_1_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
Definition: IfxMsc_PinMap.c:61
IfxMsc0_INJ1_P10_5_IN
IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
Definition: IfxMsc_PinMap.c:65
IfxMsc0_EN0_P10_4_OUT
IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
Definition: IfxMsc_PinMap.c:30
IfxMsc_Fcln_Out_pinTable
const IfxMsc_Fcln_Out * IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:155
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxMsc0_INJ0_P00_0_IN
IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
Definition: IfxMsc_PinMap.c:64
IfxMsc0_SDI2_P14_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
Definition: IfxMsc_PinMap.c:70
IfxMsc1_END2_P23_4_OUT
IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT
Definition: IfxMsc_PinMap.c:53
IfxMsc_En_Out_pinTable
const IfxMsc_En_Out * IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:84
IfxMsc1_FCLN_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
Definition: IfxMsc_PinMap.c:59
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxMsc0_SDI3_P11_3_IN
IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
Definition: IfxMsc_PinMap.c:71
IfxMsc1_SOP_P22_3_OUT
IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
Definition: IfxMsc_PinMap.c:81
IfxMsc1_FCLP_P22_1_OUT
IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
Definition: IfxMsc_PinMap.c:63
IfxMsc0_EN1_P10_1_OUT
IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
Definition: IfxMsc_PinMap.c:34
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxMsc0_SOND_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
Definition: IfxMsc_PinMap.c:75
IfxMsc0_END2_P10_4_OUT
IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT
Definition: IfxMsc_PinMap.c:41
IfxMsc_Fclp_Out_pinTable
const IfxMsc_Fclp_Out * IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:166
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:105
IfxMsc_Sop_Out_pinTable
const IfxMsc_Sop_Out * IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:216
IfxMsc0_FCLP_P13_2_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
Definition: IfxMsc_PinMap.c:62
IfxMsc0_FCLN_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
Definition: IfxMsc_PinMap.c:57
IfxMsc_Son_Out_pinTable
const IfxMsc_Son_Out * IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:205
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:88
IfxMsc1_END2_P32_4_OUT
IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT
Definition: IfxMsc_PinMap.c:54
IfxMsc1_EN0_P23_4_OUT
IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
Definition: IfxMsc_PinMap.c:50
IfxMsc0_EN1_P13_0_OUT
IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
Definition: IfxMsc_PinMap.c:36
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc0_END3_P15_3_OUT
IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT
Definition: IfxMsc_PinMap.c:49
IfxMsc0_EN0_P11_11_OUT
IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
Definition: IfxMsc_PinMap.c:31
IfxMsc1_FCLND_P22_0_OUT
IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
Definition: IfxMsc_PinMap.c:58
IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:156
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:55
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:159
IfxMsc0_END3_P11_2_OUT
IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT
Definition: IfxMsc_PinMap.c:46
IfxMsc0_SOP_P11_9_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
Definition: IfxMsc_PinMap.c:79
IfxMsc0_SDI1_P10_2_IN
IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
Definition: IfxMsc_PinMap.c:69
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IfxMsc0_FCLND_P13_0_OUT
IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
Definition: IfxMsc_PinMap.c:56
IfxMsc1_EN1_P23_5_OUT
IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
Definition: IfxMsc_PinMap.c:52
IfxMsc0_END2_P14_10_OUT
IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT
Definition: IfxMsc_PinMap.c:43
IfxMsc0_EN0_P15_5_OUT
IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
Definition: IfxMsc_PinMap.c:33
IFXMSC_PINMAP_NUM_TARGETS
#define IFXMSC_PINMAP_NUM_TARGETS
Definition: IfxMsc_PinMap.h:152
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:109
IfxMsc0_SON_P13_2_OUT
IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
Definition: IfxMsc_PinMap.c:76
IfxMsc0_FCLP_P11_6_OUT
IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
Definition: IfxMsc_PinMap.c:60
IfxMsc0_END2_P15_5_OUT
IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT
Definition: IfxMsc_PinMap.c:44
IfxMsc0_END3_P14_9_OUT
IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT
Definition: IfxMsc_PinMap.c:48
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:39
IfxMsc1_INJ1_P33_13_IN
IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
Definition: IfxMsc_PinMap.c:67
IfxMsc0_EN1_P14_9_OUT
IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
Definition: IfxMsc_PinMap.c:37
IfxMsc0_SDI0_P11_10_IN
IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
Definition: IfxMsc_PinMap.c:68
IfxMsc0_EN1_P15_3_OUT
IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
Definition: IfxMsc_PinMap.c:38
IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:158
IfxMsc1_SON_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
Definition: IfxMsc_PinMap.c:78
IfxMsc1_EN0_P32_4_OUT
IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
Definition: IfxMsc_PinMap.c:51
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:80
IfxMsc0_END3_P10_1_OUT
IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT
Definition: IfxMsc_PinMap.c:45
IfxMsc0_END2_P10_2_OUT
IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT
Definition: IfxMsc_PinMap.c:39
IfxMsc0_END2_P10_3_OUT
IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT
Definition: IfxMsc_PinMap.c:40
IfxMsc1_SDI1_P02_3_IN
IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
Definition: IfxMsc_PinMap.c:73
IfxMsc_Sdi_In_pinTable
const IfxMsc_Sdi_In * IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:190
IfxMsc1_SOND_P22_2_OUT
IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
Definition: IfxMsc_PinMap.c:77
IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:155
IfxMsc_PinMap.h
MSC I/O map.
IfxMsc0_EN0_P14_10_OUT
IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
Definition: IfxMsc_PinMap.c:32
IfxMsc_Inj_In_pinTable
const IfxMsc_Inj_In * IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
Definition: IfxMsc_PinMap.c:179
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:153
IfxMsc0_EN1_P11_2_OUT
IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
Definition: IfxMsc_PinMap.c:35
IFXMSC_PINMAP_NUM_MODULES
#define IFXMSC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMsc_PinMap.h:151
IfxMsc0_SOP_P13_3_OUT
IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
Definition: IfxMsc_PinMap.c:80
IfxMsc0_END2_P11_11_OUT
IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT
Definition: IfxMsc_PinMap.c:42


iLLD_TC26B: IfxMsc_PinMap.h Source File

  • _PinMap
IfxMsc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_PinMap.h
3 * \brief MSC I/O map
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Msc_pinmap MSC Pin Mapping
25 * \ingroup IfxLld_Msc
26 */
27
28 #ifndef IFXMSC_PINMAP_H
29 #define IFXMSC_PINMAP_H
30
31 #include <IfxMsc_reg.h>
32 #include <_Impl/IfxMsc_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Msc_pinmap
36 * \{ */
37
38 /** \brief INJ pin mapping structure */
39 typedef const struct
40 {
41 Ifx_MSC* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel select; /**< \brief Input multiplexer value */
44 } IfxMsc_Inj_In;
45
46 /** \brief SDI pin mapping structure */
47 typedef const struct
48 {
49 Ifx_MSC* module; /**< \brief Base address */
50 IfxPort_Pin pin; /**< \brief Port pin */
51 Ifx_RxSel select; /**< \brief Input multiplexer value */
52 } IfxMsc_Sdi_In;
53
54 /** \brief EN pin mapping structure */
55 typedef const struct
56 {
57 Ifx_MSC* module; /**< \brief Base address */
58 uint8 target; /**< \brief Target ID */
59 IfxPort_Pin pin; /**< \brief Port pin */
60 IfxPort_OutputIdx select; /**< \brief Port control code */
61 } IfxMsc_En_Out;
62
63 /** \brief FCLP pin mapping structure */
64 typedef const struct
65 {
66 Ifx_MSC* module; /**< \brief Base address */
67 IfxPort_Pin pin; /**< \brief Port pin */
68 IfxPort_OutputIdx select; /**< \brief Port control code */
69 } IfxMsc_Fclp_Out;
70
71 /** \brief FCLN pin mapping structure */
72 typedef const struct
73 {
74 Ifx_MSC* module; /**< \brief Base address */
75 IfxPort_Pin pin; /**< \brief Port pin */
76 IfxPort_OutputIdx select; /**< \brief Port control code */
77 } IfxMsc_Fcln_Out;
78
79 /** \brief SOP pin mapping structure */
80 typedef const struct
81 {
82 Ifx_MSC* module; /**< \brief Base address */
83 IfxPort_Pin pin; /**< \brief Port pin */
84 IfxPort_OutputIdx select; /**< \brief Port control code */
85 } IfxMsc_Sop_Out;
86
87 /** \brief SON pin mapping structure */
88 typedef const struct
89 {
90 Ifx_MSC* module; /**< \brief Base address */
91 IfxPort_Pin pin; /**< \brief Port pin */
92 IfxPort_OutputIdx select; /**< \brief Port control code */
93 } IfxMsc_Son_Out;
94
95 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT; /**< \brief MSC0_EN0: MSC0 output */
96 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT; /**< \brief MSC0_EN0: MSC0 output */
97 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT; /**< \brief MSC0_EN0: MSC0 output */
98 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT; /**< \brief MSC0_EN0: MSC0 output */
99 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT; /**< \brief MSC0_EN0: MSC0 output */
100 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT; /**< \brief MSC0_EN0: MSC0 output */
101 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT; /**< \brief MSC0_EN1: MSC0 output */
102 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT; /**< \brief MSC0_EN1: MSC0 output */
103 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT; /**< \brief MSC0_EN1: MSC0 output */
104 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT; /**< \brief MSC0_EN1: MSC0 output */
105 IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT; /**< \brief MSC0_EN1: MSC0 output */
106 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT; /**< \brief MSC0_END2: MSC0 output */
107 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT; /**< \brief MSC0_END2: MSC0 output */
108 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT; /**< \brief MSC0_END2: MSC0 output */
109 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT; /**< \brief MSC0_END2: MSC0 output */
110 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT; /**< \brief MSC0_END2: MSC0 output */
111 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT; /**< \brief MSC0_END2: MSC0 output */
112 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT; /**< \brief MSC0_END3: MSC0 output */
113 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT; /**< \brief MSC0_END3: MSC0 output */
114 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT; /**< \brief MSC0_END3: MSC0 output */
115 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT; /**< \brief MSC0_END3: MSC0 output */
116 IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT; /**< \brief MSC0_END3: MSC0 output */
117 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT; /**< \brief MSC1_EN0: MSC1 output */
118 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT; /**< \brief MSC1_EN0: MSC1 output */
119 IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT; /**< \brief MSC1_EN1: MSC1 output */
120 IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT; /**< \brief MSC1_END2: MSC1 output */
121 IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT; /**< \brief MSC1_END2: MSC1 output */
122 IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT; /**< \brief MSC1_END3: MSC1 output */
123 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT; /**< \brief MSC0_FCLND: MSC0 output (LVDS) */
124 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT; /**< \brief MSC0_FCLN: MSC0 output (LVDS) */
125 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT; /**< \brief MSC1_FCLND: MSC1 output (LVDS) */
126 IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT; /**< \brief MSC1_FCLN: MSC1 output (LVDS) */
127 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT; /**< \brief MSC0_FCLP: MSC0 output */
128 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT; /**< \brief MSC0_FCLP: MSC0 output (LVDS) */
129 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT; /**< \brief MSC0_FCLP: MSC0 output */
130 IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT; /**< \brief MSC1_FCLP: MSC1 output (LVDS) */
131 IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN; /**< \brief MSC0_INJ0: MSC0 input */
132 IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN; /**< \brief MSC0_INJ1: MSC0 input */
133 IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN; /**< \brief MSC1_INJ0: MSC1 input */
134 IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN; /**< \brief MSC1_INJ1: MSC1 input */
135 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN; /**< \brief MSC0_SDI0: MSC0 input */
136 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN; /**< \brief MSC0_SDI1: MSC0 input */
137 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN; /**< \brief MSC0_SDI2: MSC0 input */
138 IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN; /**< \brief MSC0_SDI3: MSC0 input */
139 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN; /**< \brief MSC1_SDI0: MSC1 input */
140 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN; /**< \brief MSC1_SDI1: MSC1 input */
141 IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN; /**< \brief MSC1_SDI2: MSC1 input */
142 IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT; /**< \brief MSC0_SOND: MSC0 output (LVDS) */
143 IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT; /**< \brief MSC0_SON: MSC0 output (LVDS) */
144 IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT; /**< \brief MSC1_SOND: MSC1 output (LVDS) */
145 IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT; /**< \brief MSC1_SON: MSC1 output (LVDS) */
146 IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT; /**< \brief MSC0_SOP: MSC0 output */
147 IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT; /**< \brief MSC0_SOP: MSC0 output (LVDS) */
148 IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT; /**< \brief MSC1_SOP: MSC1 output (LVDS) */
149
150 /** \brief Table dimensions */
151 #define IFXMSC_PINMAP_NUM_MODULES 2
152 #define IFXMSC_PINMAP_NUM_TARGETS 4
153 #define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
154 #define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2
155 #define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
156 #define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
157 #define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
158 #define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2
159 #define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2
160
161
162 /** \brief IfxMsc_En_Out table */
163 IFX_EXTERN const IfxMsc_En_Out *IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS];
164
165 /** \brief IfxMsc_Fcln_Out table */
166 IFX_EXTERN const IfxMsc_Fcln_Out *IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS];
167
168 /** \brief IfxMsc_Fclp_Out table */
169 IFX_EXTERN const IfxMsc_Fclp_Out *IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS];
170
171 /** \brief IfxMsc_Inj_In table */
172 IFX_EXTERN const IfxMsc_Inj_In *IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS];
173
174 /** \brief IfxMsc_Sdi_In table */
175 IFX_EXTERN const IfxMsc_Sdi_In *IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS];
176
177 /** \brief IfxMsc_Son_Out table */
178 IFX_EXTERN const IfxMsc_Son_Out *IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS];
179
180 /** \brief IfxMsc_Sop_Out table */
181 IFX_EXTERN const IfxMsc_Sop_Out *IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS];
182
183 /** \} */
184
185 #endif /* IFXMSC_PINMAP_H */
IfxMsc_Sdi_In
SDI pin mapping structure.
Definition: IfxMsc_PinMap.h:47
IfxMsc0_SDI0_P11_10_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN
MSC0_SDI0: MSC0 input.
Definition: IfxMsc_PinMap.h:135
IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:157
IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:154
IfxMsc0_END2_P10_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:106
IfxMsc1_INJ1_P33_13_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN
MSC1_INJ1: MSC1 input.
Definition: IfxMsc_PinMap.h:134
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxMsc1_EN1_P23_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT
MSC1_EN1: MSC1 output.
Definition: IfxMsc_PinMap.h:119
IfxMsc0_EN1_P13_0_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:103
IfxMsc1_INJ0_P23_3_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN
MSC1_INJ0: MSC1 input.
Definition: IfxMsc_PinMap.h:133
IfxMsc0_SDI2_P14_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN
MSC0_SDI2: MSC0 input.
Definition: IfxMsc_PinMap.h:137
IfxMsc0_EN0_P11_11_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:98
IfxMsc_En_Out_pinTable
IFX_EXTERN const IfxMsc_En_Out * IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS]
IfxMsc_En_Out table.
Definition: IfxMsc_PinMap.h:163
IfxMsc0_INJ1_P10_5_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN
MSC0_INJ1: MSC0 input.
Definition: IfxMsc_PinMap.h:132
IfxMsc_Inj_In::module
Ifx_MSC * module
Base address.
Definition: IfxMsc_PinMap.h:41
IfxMsc1_EN0_P23_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT
MSC1_EN0: MSC1 output.
Definition: IfxMsc_PinMap.h:117
IfxMsc0_FCLP_P13_2_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT
MSC0_FCLP: MSC0 output.
Definition: IfxMsc_PinMap.h:129
IfxMsc0_FCLP_P11_6_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT
MSC0_FCLP: MSC0 output.
Definition: IfxMsc_PinMap.h:127
IfxMsc0_EN0_P14_10_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:99
IfxMsc0_SOP_P11_9_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT
MSC0_SOP: MSC0 output.
Definition: IfxMsc_PinMap.h:146
IfxMsc0_SON_P13_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT
MSC0_SON: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:143
IfxMsc0_FCLP_P13_1_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT
MSC0_FCLP: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:128
IfxMsc0_EN0_P10_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:95
IfxMsc_Sdi_In_pinTable
IFX_EXTERN const IfxMsc_Sdi_In * IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS]
IfxMsc_Sdi_In table.
Definition: IfxMsc_PinMap.h:175
IfxMsc0_SOND_P13_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT
MSC0_SOND: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:142
IfxMsc1_END3_P23_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT
MSC1_END3: MSC1 output.
Definition: IfxMsc_PinMap.h:122
IfxMsc_Inj_In_pinTable
IFX_EXTERN const IfxMsc_Inj_In * IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS]
IfxMsc_Inj_In table.
Definition: IfxMsc_PinMap.h:172
IfxMsc_Fcln_Out_pinTable
IFX_EXTERN const IfxMsc_Fcln_Out * IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS]
IfxMsc_Fcln_Out table.
Definition: IfxMsc_PinMap.h:166
IfxMsc1_SDI1_P02_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN
MSC1_SDI1: MSC1 input.
Definition: IfxMsc_PinMap.h:140
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxMsc0_END2_P15_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:111
IfxMsc_En_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMsc_PinMap.h:60
IfxMsc1_END2_P23_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT
MSC1_END2: MSC1 output.
Definition: IfxMsc_PinMap.h:120
IfxMsc_Son_Out_pinTable
IFX_EXTERN const IfxMsc_Son_Out * IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS]
IfxMsc_Son_Out table.
Definition: IfxMsc_PinMap.h:178
IfxMsc0_SOP_P13_3_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT
MSC0_SOP: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:147
IfxMsc0_INJ0_P00_0_IN
IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN
MSC0_INJ0: MSC0 input.
Definition: IfxMsc_PinMap.h:131
IfxMsc_Sop_Out_pinTable
IFX_EXTERN const IfxMsc_Sop_Out * IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS]
IfxMsc_Sop_Out table.
Definition: IfxMsc_PinMap.h:181
IfxMsc_Son_Out
SON pin mapping structure.
Definition: IfxMsc_PinMap.h:88
IfxMsc0_END3_P11_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:113
IfxMsc1_SON_P22_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT
MSC1_SON: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:145
IfxMsc0_FCLN_P13_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT
MSC0_FCLN: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:124
IfxMsc0_EN0_P15_5_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:100
IfxMsc1_SDI0_P23_1_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN
MSC1_SDI0: MSC1 input.
Definition: IfxMsc_PinMap.h:139
IfxMsc_Fcln_Out
FCLN pin mapping structure.
Definition: IfxMsc_PinMap.h:72
IfxMsc0_END3_P10_1_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:112
IfxMsc0_END2_P10_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:108
IfxMsc1_SOP_P22_3_OUT
IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT
MSC1_SOP: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:148
IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS
Definition: IfxMsc_PinMap.h:156
IfxMsc_En_Out
EN pin mapping structure.
Definition: IfxMsc_PinMap.h:55
IfxMsc0_EN1_P14_9_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:104
IfxMsc0_EN1_P15_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:105
IfxMsc0_END3_P13_0_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:114
IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:159
IfxMsc_En_Out::target
uint8 target
Target ID.
Definition: IfxMsc_PinMap.h:58
IfxMsc0_END3_P15_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:116
IfxMsc0_FCLND_P13_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT
MSC0_FCLND: MSC0 output (LVDS)
Definition: IfxMsc_PinMap.h:123
IfxMsc_Fclp_Out
FCLP pin mapping structure.
Definition: IfxMsc_PinMap.h:64
IFXMSC_PINMAP_NUM_TARGETS
#define IFXMSC_PINMAP_NUM_TARGETS
Definition: IfxMsc_PinMap.h:152
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxMsc1_SDI2_P32_4_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN
MSC1_SDI2: MSC1 input.
Definition: IfxMsc_PinMap.h:141
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxMsc_Inj_In
INJ pin mapping structure.
Definition: IfxMsc_PinMap.h:39
IfxMsc0_EN1_P11_2_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:102
IfxMsc1_END2_P32_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT
MSC1_END2: MSC1 output.
Definition: IfxMsc_PinMap.h:121
IfxMsc0_SDI1_P10_2_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN
MSC0_SDI1: MSC0 input.
Definition: IfxMsc_PinMap.h:136
IfxMsc1_EN0_P32_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT
MSC1_EN0: MSC1 output.
Definition: IfxMsc_PinMap.h:118
IfxMsc0_EN0_P10_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:96
IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:158
IfxMsc_Sop_Out
SOP pin mapping structure.
Definition: IfxMsc_PinMap.h:80
IfxMsc_Inj_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMsc_PinMap.h:43
IfxMsc_Inj_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMsc_PinMap.h:42
IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:155
IfxMsc0_EN1_P10_1_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT
MSC0_EN1: MSC0 output.
Definition: IfxMsc_PinMap.h:101
IfxMsc0_END2_P11_11_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:109
IfxMsc_Fclp_Out_pinTable
IFX_EXTERN const IfxMsc_Fclp_Out * IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS]
IfxMsc_Fclp_Out table.
Definition: IfxMsc_PinMap.h:169
IfxMsc1_FCLN_P22_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT
MSC1_FCLN: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:126
IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS
Definition: IfxMsc_PinMap.h:153
IfxMsc_cfg.h
MSC on-chip implementation data.
IfxMsc0_END2_P10_3_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:107
IfxMsc1_SOND_P22_2_OUT
IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT
MSC1_SOND: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:144
IFXMSC_PINMAP_NUM_MODULES
#define IFXMSC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMsc_PinMap.h:151
IfxMsc0_END2_P14_10_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT
MSC0_END2: MSC0 output.
Definition: IfxMsc_PinMap.h:110
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMsc1_FCLP_P22_1_OUT
IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT
MSC1_FCLP: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:130
IfxMsc0_EN0_P10_4_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT
MSC0_EN0: MSC0 output.
Definition: IfxMsc_PinMap.h:97
IfxMsc1_FCLND_P22_0_OUT
IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT
MSC1_FCLND: MSC1 output (LVDS)
Definition: IfxMsc_PinMap.h:125
IfxMsc0_END3_P14_9_OUT
IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT
MSC0_END3: MSC0 output.
Definition: IfxMsc_PinMap.h:115
IfxMsc0_SDI3_P11_3_IN
IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN
MSC0_SDI3: MSC0 input.
Definition: IfxMsc_PinMap.h:138
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxMsc_cfg.c Source File

  • _Impl
IfxMsc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_cfg.c
3 * \brief MSC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxMsc_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES] = {
36 {&MODULE_MSC0, IfxMsc_Index_0},
37 {&MODULE_MSC1, IfxMsc_Index_1}
38 };
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:63
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:64
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:48
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxMsc_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.c:35
IfxMsc_cfg.h
MSC on-chip implementation data.


iLLD_TC26B: IfxMsc_cfg.h Source File

  • _Impl
IfxMsc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxMsc_cfg.h
3 * \brief MSC on-chip implementation data
4 * \ingroup IfxLld_Msc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Msc MSC
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Msc_Impl Implementation
27 * \ingroup IfxLld_Msc
28 * \defgroup IfxLld_Msc_Std Standard Driver
29 * \ingroup IfxLld_Msc
30 * \defgroup IfxLld_Msc_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Msc_Impl
32 */
33
34 #ifndef IFXMSC_CFG_H
35 #define IFXMSC_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "IfxMsc_reg.h"
43
44 /******************************************************************************/
45 /*-----------------------------------Macros-----------------------------------*/
46 /******************************************************************************/
47
48 #define IFXMSC_NUM_MODULES 2
49
50 #define IFXMSC_NUM_ENABLE_SELECT_LINES (4)
51
52 /******************************************************************************/
53 /*--------------------------------Enumerations--------------------------------*/
54 /******************************************************************************/
55
56 /** \addtogroup IfxLld_Msc_Impl_Enumerations
57 * \{ */
58 /** \brief List of the available MSC resources
59 */
60 typedef enum
61 {
62 IfxMsc_Index_none = -1, /**< \brief Not Selected */
63 IfxMsc_Index_0 = 0, /**< \brief "MSC index "+str(x) */
64 IfxMsc_Index_1 /**< \brief "MSC index "+str(x) */
65 } IfxMsc_Index;
66
67 /** \} */
68
69 /******************************************************************************/
70 /*-------------------Global Exported Variables/Constants----------------------*/
71 /******************************************************************************/
72
73 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES];
74
75 #endif /* IFXMSC_CFG_H */
IfxMsc_Index
IfxMsc_Index
List of the available MSC resources.
Definition: IfxMsc_cfg.h:60
IfxMsc_Index_none
Not Selected.
Definition: IfxMsc_cfg.h:62
IfxMsc_Index_0
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:63
IfxMsc_Index_1
"MSC index "+str(x)
Definition: IfxMsc_cfg.h:64
IfxMsc_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES]
Definition: IfxMsc_cfg.h:73
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFXMSC_NUM_MODULES
#define IFXMSC_NUM_MODULES
Definition: IfxMsc_cfg.h:48
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123


iLLD_TC26B: IfxMtu.c Source File

  • Mtu
  • Std
IfxMtu.c
Go to the documentation of this file.
1 /**
2 * \file IfxMtu.c
3 * \brief MTU basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxMtu.h"
31
32 /** \addtogroup IfxLld_Mtu_Std_Utility
33 * \{ */
34
35 /******************************************************************************/
36 /*-----------------------Private Function Prototypes--------------------------*/
37 /******************************************************************************/
38
39 /** \brief API to wait for requested tower depth.
40 * \param towerDepth tower depth of MBIST Ram
41 * \param numInstructions number of instructions
42 * \param mbistSel Memory Selection
43 * \return None
44 */
45 IFX_STATIC void IfxMtu_waitForMbistDone(uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel);
46
47 /** \} */
48
49 /******************************************************************************/
50 /*-------------------------Function Implementations---------------------------*/
51 /******************************************************************************/
52
53 void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
54 {
55 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
56 mc->ECCD.U |= (1 << IFX_MC_ECCD_TRC_OFF);
57 }
58
59
60 void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
61 {
62 uint8 isEndInitEnabled = 0;
63 uint16 password = 0;
64
65 password = IfxScuWdt_getSafetyWatchdogPassword();
66
67 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
68 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
69 {
70 /* Clear EndInit */
71 IfxScuWdt_clearSafetyEndinit(password);
72 isEndInitEnabled = 1;
73 }
74
75 IfxMtu_clearSramStart(mbistSel);
76
77 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
78 IfxScuWdt_setSafetyEndinit(password);
79
80 /* wait for the end of the fill operation */
81 IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 1, mbistSel);
82 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (((Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel))->MSTATUS.B.DONE != 0));
83
84 while (!IfxMtu_isMbistDone(mbistSel))
85 {
86 __nop();
87 }
88
89 /* Clear EndInit */
90 IfxScuWdt_clearSafetyEndinit(password);
91
92 IfxMtu_clearSramContinue(mbistSel);
93
94 if (isEndInitEnabled == 1)
95 {
96 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
97 IfxScuWdt_setSafetyEndinit(password);
98 }
99 }
100
101
102 void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
103 {
104 /* Before clearing the ECC error flags we've to issue a dummy SRAM access to get a valid memory output */
105 IfxMtu_readSramAddress(mbistSel, 0x0000);
106 /* Note: a SMU alarm will be flagged HERE if the wrong ECC has been written! */
107 IfxMtu_disableMbistShell(mbistSel);
108
109 /* for auto-init memories: wait for the end of the clear operation */
110 while (IfxMtu_isAutoInitRunning(mbistSel))
111 {}
112 }
113
114
115 void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
116 {
117 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
118
119 IfxMtu_enableMbistShell(mbistSel);
120
121 /* for auto-init memories: wait for the end of the clear operation */
122 while (IfxMtu_isAutoInitRunning(mbistSel))
123 {}
124
125 /* write valid ECC code for all-zero data into RDBFL registers */
126 {
127 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mbistSel < IFXMTU_NUM_MBIST_TABLE_ITEMS);
128 const IfxMtu_SramItem *item = (IfxMtu_SramItem *)&IfxMtu_sramTable[mbistSel];
129
130 uint8 numBlocks = item->numBlocks;
131 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, numBlocks > 0);
132
133 uint16 dataSize = item->dataSize;
134 uint8 eccSize = item->eccSize;
135 uint32 eccInvPos0 = dataSize + item->eccInvPos0;
136 uint32 eccInvPos1 = dataSize + item->eccInvPos1;
137
138 uint32 memSize = dataSize + eccSize;
139
140 uint32 bitPos = 0;
141 uint32 wordIx = 0;
142 uint16 data = 0;
143 /* de-serialize data stream into 16bit packets */
144 uint32 mem;
145
146 for (mem = 0; mem < numBlocks; ++mem)
147 {
148 uint32 i;
149
150 for (i = 0; i < memSize; ++i)
151 {
152 if ((i == eccInvPos0) || (i == eccInvPos1))
153 {
154 data |= (1 << bitPos);
155 }
156
157 ++bitPos;
158
159 if (bitPos >= 16)
160 {
161 mc->RDBFL[wordIx++].U = data;
162 bitPos = 0;
163 data = 0;
164 }
165 }
166 }
167
168 /* final word? */
169 if (bitPos != 0)
170 {
171 mc->RDBFL[wordIx].U = data;
172 }
173 }
174
175 /* start fill operation */
176 uint16 mcontrolMask = 0x4000; /* set USERED flag */
177 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DINIT_OFF) | (1 << IFX_MC_MCONTROL_START_OFF); /* START = DINIT = 1 */
178 mc->MCONTROL.U = mcontrolMask | (0 << IFX_MC_MCONTROL_DINIT_OFF) | (1 << IFX_MC_MCONTROL_DINIT_OFF); /* START = 0 */
179 }
180
181
182 void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
183 {
184 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
185
186 if (enable == FALSE)
187 {
188 mc->ECCS.U &= ~(1 << IFX_MC_ECCS_TRE_OFF);
189 }
190 else
191 {
192 mc->ECCS.U |= (1 << IFX_MC_ECCS_TRE_OFF);
193 }
194 }
195
196
197 uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
198 {
199 uint32 sramAddress = trackedSramAddress.B.ADDR;
200 uint32 mbi = trackedSramAddress.B.MBI;
201 uint32 systemAddress = 0;
202
203 switch (mbistSel)
204 {
205 case IfxMtu_MbistSel_cpu0Pspr:
206 systemAddress = 0x70100000 | ((sramAddress << 3) | ((mbi & 1) << 2));
207 break;
208
209 case IfxMtu_MbistSel_cpu0Dspr:
210 systemAddress = 0x70000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
211 break;
212
213 case IfxMtu_MbistSel_cpu1Pspr:
214 systemAddress = 0x60100000 | ((sramAddress << 4) | ((mbi & 1) << 3));
215 break;
216
217 case IfxMtu_MbistSel_cpu1Dspr:
218 systemAddress = 0x60000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
219 break;
220
221 case IfxMtu_MbistSel_dma:
222 systemAddress = 0xf0012000 | ((sramAddress << 5) | ((mbi & 3) << 3));
223 break;
224
225 default:
226 systemAddress = 0; /* unsupported address descrambling */
227 }
228
229 return systemAddress;
230 }
231
232
233 uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
234 {
235 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
236 uint8 validFlags = (mc->ECCD.U >> IFX_MC_ECCD_VAL_OFF) & IFX_MC_ECCD_VAL_MSK;
237 uint8 numTrackedAddresses = 0;
238 int i;
239
240 #if IFX_MC_ECCD_VAL_LEN > IFXMTU_MAX_TRACKED_ADDRESSES
241 # error "Unexpected size of VAL mask"
242 #endif
243
244 for (i = 0; i < IFXMTU_MAX_TRACKED_ADDRESSES; ++i)
245 {
246 if (validFlags & (1 << i))
247 {
248 trackedSramAddresses[numTrackedAddresses].U = mc->ETRR[i].U;
249 ++numTrackedAddresses;
250 }
251 }
252
253 return numTrackedAddresses;
254 }
255
256
257 void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
258 {
259 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
260
261 /* configure MBIST for single read opeation */
262 uint16 mcontrolMask = 0x4000; /* set USERED flag */
263 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
264 mc->CONFIG0.U = (1 << IFX_MC_CONFIG0_NUMACCS_OFF) | (1 << IFX_MC_CONFIG0_ACCSTYPE_OFF); /* 1 read access */
265 mc->CONFIG1.U = 0; /* ensure that linear scrambling is used */
266
267 /* Set the address to be read (RAEN = 0) */
268 mc->RANGE.U = sramAddress;
269
270 /* Start operation */
271 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF) | (1 << IFX_MC_MCONTROL_START_OFF);
272 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
273
274 /* wait for the end of the fill operation */
275 IfxMtu_waitForMbistDone(256, 1, mbistSel);
276
277 while (!IfxMtu_isMbistDone(mbistSel))
278 {
279 __nop();
280 }
281 }
282
283
284 uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
285 {
286 /* Select MBIST Memory Controller:
287 * Ifx_MC is a type describing structure of MBIST Memory Controller
288 * registers defined in IfxMc_regdef.h file - MC object */
289 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
290 uint16 password = 0;
291 uint8 retVal = 0U;
292 uint8 isEndInitEnabled = 0;
293 password = IfxScuWdt_getSafetyWatchdogPassword();
294
295 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
296 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
297 {
298 /* Clear EndInit */
299 IfxScuWdt_clearSafetyEndinit(password);
300 isEndInitEnabled = 1;
301 }
302
303 /* Enable MBIST Memory Controller */
304 IfxMtu_enableMbistShell(mbistSel);
305
306 /* for auto-init memories: wait for the end of the clear operation */
307 while (IfxMtu_isAutoInitRunning(mbistSel))
308 {}
309
310 /* Configure Non-destructive Inversion test */
311 mc->CONFIG0.U = 0x4005; //NUMACCS=4, ACCSTYPE=5
312 mc->CONFIG1.U = 0x5000; //AG_MOD=5
313 /* Set the range register */
314 mc->RANGE.U = (rangeSel << 15) | (rangeAddrUp << 7) | (rangeAddrLow << 0);
315 /* Run the tests */
316 /* As per AP32917 and Errata MTU_TC.007 DIR is set to 0 */
317 mc->MCONTROL.U = 0x4001;
318 mc->MCONTROL.B.START = 0;
319 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
320 IfxScuWdt_setSafetyEndinit(password);
321
322 /* wait for the end of the fill operation */
323 IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 4, mbistSel);
324 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mc->MSTATUS.B.DONE != 0);
325
326 while (!IfxMtu_isMbistDone(mbistSel))
327 {
328 __nop();
329 }
330
331 /* Clear EndInit Again */
332 IfxScuWdt_clearSafetyEndinit(password);
333
334 /* Check the Fail Status */
335 if (IfxMtu_checkErrorFlags(mbistSel))
336 {
337 /* Read the Error tracking register and return saying test failed */
338 *errorAddr = mc->ETRR[0].U;
339 retVal = 1U;
340 }
341
342 /* Disable Memory Controller */
343 IfxMtu_disableMbistShell(mbistSel);
344
345 /* for auto-init memories: wait for the end of the clear operation */
346 while (IfxMtu_isAutoInitRunning(mbistSel))
347 {}
348
349 /* Restore the endinit state */
350 if (isEndInitEnabled == 1)
351 {
352 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
353 IfxScuWdt_setSafetyEndinit(password);
354 }
355
356 return retVal;
357 }
358
359
360 void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
361 {
362 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
363 uint8 isEndInitEnabled = 0;
364 uint16 password = 0;
365 password = IfxScuWdt_getSafetyWatchdogPassword();
366
367 /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
368 if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
369 {
370 /* Clear EndInit */
371 IfxScuWdt_clearSafetyEndinit(password);
372 isEndInitEnabled = 1;
373 }
374
375 /* configure MBIST for single write opeation */
376 uint16 mcontrolMask = 0x4000; /* set USERED flag */
377 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
378 mc->CONFIG0.U = (1 << IFX_MC_CONFIG0_NUMACCS_OFF) | (0 << IFX_MC_CONFIG0_ACCSTYPE_OFF); /* 1 write access */
379 mc->CONFIG1.U = 0; /* ensure that linear scrambling is used */
380
381 /* Set the address to be written (RAEN = 0) */
382 mc->RANGE.U = sramAddress;
383
384 /* Start operation */
385 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF) | (1 << IFX_MC_MCONTROL_START_OFF);
386 mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
387
388 if (isEndInitEnabled == 1)
389 {
390 /* Set EndInit Watchdog (to prevent Watchdog TO)*/
391 IfxScuWdt_setSafetyEndinit(password);
392 }
393
394 /* Wait for the end of the operation */
395 IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 1, mbistSel);
396 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mc->MSTATUS.B.DONE != 0);
397
398 while (!IfxMtu_isMbistDone(mbistSel))
399 {
400 __nop();
401 }
402 }
403
404
405 IFX_STATIC void IfxMtu_waitForMbistDone(uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
406 {
407 uint32 waitFact = (SCU_CCUCON0.B.SPBDIV / SCU_CCUCON0.B.SRIDIV) * numInstructions;
408 volatile uint32 waitTime;
409
410 switch (mbistSel)
411 {
412 case IfxMtu_MbistSel_gtmFifo:
413 case IfxMtu_MbistSel_gtmMcs0:
414 case IfxMtu_MbistSel_gtmMcs1:
415 case IfxMtu_MbistSel_gtmDpll1a:
416 case IfxMtu_MbistSel_gtmDpll1b:
417 case IfxMtu_MbistSel_gtmDpll2:
418 waitFact = waitFact * SCU_CCUCON1.B.GTMDIV;
419 break;
420 case IfxMtu_MbistSel_ethermac:
421 waitFact = waitFact * SCU_CCUCON1.B.GTMDIV;
422 break;
423
424 case IfxMtu_MbistSel_mcan:
425 case IfxMtu_MbistSel_psi5:
426 waitFact = waitFact * SCU_CCUCON0.B.BAUD1DIV;
427
428 break;
429
430 case IfxMtu_MbistSel_erayObf:
431 case IfxMtu_MbistSel_erayIbfTbf:
432 waitFact = (IfxScuCcu_getSriFrequency() / IfxScuCcu_getPll2ErayFrequency()) * numInstructions;
433 break;
434
435 case IfxMtu_MbistSel_erayMbf:
436 waitFact = (IfxScuCcu_getSriFrequency() / IfxScuCcu_getPll2ErayFrequency()) * numInstructions * 4;
437 break;
438
439 case IfxMtu_MbistSel_emem0:
440 case IfxMtu_MbistSel_emem1:
441 case IfxMtu_MbistSel_emem2:
442 case IfxMtu_MbistSel_emem3:
443 case IfxMtu_MbistSel_emem4:
444 case IfxMtu_MbistSel_emem5:
445 case IfxMtu_MbistSel_emem6:
446 case IfxMtu_MbistSel_emem7:
447 case IfxMtu_MbistSel_ememXtm0:
448 case IfxMtu_MbistSel_ememXtm1:
449 case IfxMtu_MbistSel_fft0:
450 case IfxMtu_MbistSel_fft1:
451 case IfxMtu_MbistSel_cifJpeg1_4:
452 case IfxMtu_MbistSel_cifJpeg3:
453 case IfxMtu_MbistSel_cifCif:
454 waitFact = waitFact * SCU_CCUCON2.B.BBBDIV;
455 break;
456 default:
457 break;
458 }
459
460 if (numInstructions == 4)
461 {
462 waitTime = (towerDepth * waitFact) + 30;
463 }
464 else
465 {
466 waitTime = ((towerDepth / 4) * waitFact) + 30;
467 }
468
469 waitTime = waitTime / 3;
470
471 while (waitTime--)
472 {
473 __nop();
474 }
475 }
IfxMtu.h
MTU basic functionality.
IfxMtu_sramTable
const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]
Definition: IfxMtu_cfg.c:36
IfxMtu_MbistSel_emem7
Definition: IfxMtu_cfg.h:98
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxMtu_MbistSel_mcan
Definition: IfxMtu_cfg.h:85
IfxMtu_MbistSel_cifJpeg1_4
Definition: IfxMtu_cfg.h:99
IfxMtu_MbistSel_cpu0Pspr
Definition: IfxMtu_cfg.h:74
IfxMtu_MbistSel_erayObf
Definition: IfxMtu_cfg.h:86
IfxMtu_MbistSel_fft0
Definition: IfxMtu_cfg.h:106
IfxMtu_clearSram
void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:60
IfxMtu_MbistSel_erayMbf
Definition: IfxMtu_cfg.h:88
__nop
void __nop(void) __attribute__((intrinsic_function(0x103
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMtu_runNonDestructiveInversionTest
uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can b...
Definition: IfxMtu.c:284
IfxMtu_SramItem::eccInvPos0
uint8 eccInvPos0
First ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:121
waitTime
void waitTime(Ifx_TickTime timeout)
Wait time function.
Definition: Bsp.c:73
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:66
IfxMtu_waitForMbistDone
IFX_STATIC void IfxMtu_waitForMbistDone(uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
API to wait for requested tower depth.
Definition: IfxMtu.c:405
IfxMtu_MbistSel_emem1
Definition: IfxMtu_cfg.h:92
IFXMTU_NUM_MBIST_TABLE_ITEMS
#define IFXMTU_NUM_MBIST_TABLE_ITEMS
Number of MBIST Table items.
Definition: IfxMtu_cfg.h:54
IfxMtu_SramItem::eccInvPos1
uint8 eccInvPos1
Second ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:122
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxMtu_getSystemAddress
uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (...
Definition: IfxMtu.c:197
IfxMtu_MbistSel_gtmFifo
Definition: IfxMtu_cfg.h:78
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxMtu_clearSramContinue
void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function shou...
Definition: IfxMtu.c:102
IfxMtu_MbistSel_cpu1Pspr
Definition: IfxMtu_cfg.h:71
IfxMtu_checkErrorFlags
IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set.
Definition: IfxMtu.h:546
IfxMtu_MbistSel_emem4
Definition: IfxMtu_cfg.h:95
IFXMTU_MC_ADDRESS_BASE
#define IFXMTU_MC_ADDRESS_BASE
Base address of first MBIST Control Block.
Definition: IfxMtu_cfg.h:50
IfxMtu_clearSramStart
void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn&#39;t wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.
Definition: IfxMtu.c:115
IfxMtu_MbistSel_ememXtm1
Definition: IfxMtu_cfg.h:105
IfxMtu_MbistSel_emem0
Definition: IfxMtu_cfg.h:91
IfxMtu_MbistSel_cifCif
Definition: IfxMtu_cfg.h:101
IfxMtu_SramItem::dataSize
uint16 dataSize
Data Size of each memory block.
Definition: IfxMtu_cfg.h:119
IfxMtu_MbistSel_cifJpeg3
Definition: IfxMtu_cfg.h:100
IFXMTU_MAX_TRACKED_ADDRESSES
#define IFXMTU_MAX_TRACKED_ADDRESSES
Maximum number of tracked SRAM addresses (ETTR)
Definition: IfxMtu_cfg.h:58
IfxMtu_SramItem::numBlocks
uint8 numBlocks
number of SRAM blocks
Definition: IfxMtu_cfg.h:118
IfxMtu_MbistSel_ememXtm0
Definition: IfxMtu_cfg.h:104
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxMtu_MbistSel_gtmDpll2
Definition: IfxMtu_cfg.h:83
IfxMtu_MbistSel_psi5
Definition: IfxMtu_cfg.h:84
IfxMtu_readSramAddress
void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:257
IfxMtu_getTrackedSramAddresses
uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registe...
Definition: IfxMtu.c:233
IfxMtu_MbistSel_emem6
Definition: IfxMtu_cfg.h:97
IfxMtu_MbistSel_gtmDpll1b
Definition: IfxMtu_cfg.h:82
IfxMtu_MbistSel_emem2
Definition: IfxMtu_cfg.h:93
IfxMtu_enableMbistShell
IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:479
IfxMtu_MbistSel_gtmDpll1a
Definition: IfxMtu_cfg.h:81
IfxMtu_MbistSel_ethermac
Definition: IfxMtu_cfg.h:76
IfxMtu_MbistSel_cpu1Dspr
Definition: IfxMtu_cfg.h:69
IfxScuCcu_getPll2ErayFrequency
IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency b...
Definition: IfxScuCcu.h:1077
IfxMtu_MbistSel_emem3
Definition: IfxMtu_cfg.h:94
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxMtu_MbistSel_gtmMcs0
Definition: IfxMtu_cfg.h:79
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxMtu_MbistSel_erayIbfTbf
Definition: IfxMtu_cfg.h:87
IfxMtu_MbistSel_gtmMcs1
Definition: IfxMtu_cfg.h:80
IfxMtu_writeSramAddress
void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:360
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxMtu_MbistSel_cpu0Dspr
Definition: IfxMtu_cfg.h:73
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:460
IfxMtu_isMbistDone
IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to cal...
Definition: IfxMtu.h:530
IfxMtu_MbistSel_fft1
Definition: IfxMtu_cfg.h:107
IfxMtu_enableErrorTracking
void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors.
Definition: IfxMtu.c:182
IfxMtu_clearErrorTracking
void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be...
Definition: IfxMtu.c:53
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMtu_disableMbistShell
IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:471
IfxMtu_MbistSel_emem5
Definition: IfxMtu_cfg.h:96
IfxMtu_isAutoInitRunning
IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM.
Definition: IfxMtu.h:508
IfxScuCcu_getSriFrequency
float32 IfxScuCcu_getSriFrequency(void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in C...
Definition: IfxScuCcu.c:597
IfxScuWdt_getSafetyWatchdogEndInit
IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module.
Definition: IfxScuWdt.h:483
IfxMtu_SramItem::eccSize
uint8 eccSize
ECC Size of each memory block.
Definition: IfxMtu_cfg.h:120
IfxMtu_SramItem
Describes physical parameters of a SRAM memory.
Definition: IfxMtu_cfg.h:116
IfxMtu_MbistSel_dma
Definition: IfxMtu_cfg.h:103


iLLD_TC26B: IfxMtu.h Source File

  • Mtu
  • Std
IfxMtu.h
Go to the documentation of this file.
1 /**
2 * \file IfxMtu.h
3 * \brief MTU basic functionality
4 * \ingroup IfxLld_Mtu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Mtu_Usage How to use the Mtu driver?
26 * \ingroup IfxLld_Mtu
27 *
28 * The Memory Test Unit (MTU) controls and monitors the test, initialization and data integrity checking functions of the various internal memories in the device
29 *
30 * The Mtu driver provides set of routines for various Mbist operations
31 *
32 * In the following sections it will be described, how to integrate the Mtu driver into the application framework.
33 *
34 * \section IfxLld_Mtu_SramInit Sram Initialisation
35 * \subsection IfxLld_Mtu_Include Include Files
36 *
37 * Include following header file into your C code:
38 * \code
39 * #include <Mtu/IfxMtu.h>
40 * \endcode
41 *
42 *
43 * \subsection IfxLld_Mtu_ClearSram_SyncPolling Clear Sram (Synchronous polling mode)
44 *
45 * The Sram initialisation in synchronous polling mode (i.e wait till the complete operation is done) can be used as:
46 *
47 * \code
48 * clearSram(IfxMtu_MbistSel_cpu0Dspr);
49 * \endcode
50 *
51 * \subsection IfxLld_Mtu_ClearSram_ASyncPolling Clear Sram (Asynchronous polling mode)
52 *
53 * The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function, then can be queried for completion in a task using IfxMtu_isMbistDone. Once it's completed, then IfxMtu_clearSramContinue() has to be
54 * called.
55 * Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.
56 *
57 * Following code triggers Sram initilisation.
58 * \code
59 *
60 * uint16 password = 0;
61 *
62 * password = IfxScuWdt_getSafetyWatchdogPassword();
63 *
64 * // Clear EndInit
65 * IfxScuWdt_clearSafetyEndinit(password);
66 *
67 * IfxMtu_clearSramStart(IfxMtu_MbistSel_cpu0Dspr);
68 *
69 * // Set EndInit Watchdog
70 * IfxScuWdt_setSafetyEndinit(password);
71 * \endcode
72 *
73 * Sram initialisation status can be queried in a task and once done complete the operation using:
74 * \code
75 * if (IfxMtu_isMbistDone(IfxMtu_MbistSel_cpu0Dspr))
76 * {
77 * // Sram Clear operation done
78 *
79 * // Clear EndInit
80 * IfxScuWdt_clearSafetyEndinit(password);
81 *
82 * IfxMtu_clearSramContinue(IfxMtu_MbistSel_cpu0Dspr);
83 *
84 * // Set EndInit Watchdog
85 * IfxScuWdt_setSafetyEndinit(password);
86 * }
87 * else
88 * {
89 * // Sram operation is still in progress
90 * }
91 * \endcode
92 *
93 *
94 * \section IfxLld_Mtu_SramError Sram Error tracking
95 * Example usage of Sram Error tracking
96 * \code
97 * IfxScuWdt_clearSafetyEndinit(password);
98 *
99 * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_cpu1Dspr;
100 * Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
101 *
102 * IfxMtu_enableMbistShell(mbistSel);
103 *
104 * // for auto-init memories: wait for the end of the clear operation
105 * while (IfxMtu_isAutoInitRunning(mbistSel))
106 * {}
107 * IfxMtu_enableErrorTracking(mbistSel, TRUE);
108 * uint32 numEtrr = 5;
109 * // print tracked error address
110 * {
111 * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
112 * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
113 * for(uint32 i=0; i<numEtrr; ++i) {
114 * printf("%d: Error Address:0x%04x, Error System Address:0x%04x \n",
115 * i,
116 * trackedSramAddresses[i].B.ADDR,
117 * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
118 * }
119 * }
120 * }
121 *
122 * IfxMtu_disableMbistShell(mbistSel);
123 * IfxScuWdt_setSafetyEndinit(password);
124 * \endcode
125 *
126 * \section IfxLld_Mtu_MemoryTest Memory Tests
127 * \subsection IfxLld_Mtu_MemoryTest_NDI Non Destructive Inversion Test
128 *
129 * Usage Example:
130 * \code
131 * // Enable MTU clock
132 * {
133 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
134 * IfxScuWdt_clearCpuEndinit(password);
135 * IfxMtu_enableModule();
136 * IfxScuWdt_setCpuEndinit(password);
137 * }
138 *
139 *
140 * {
141 * uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
142 * uint16 errAddr = 0;
143 * IfxScuWdt_clearSafetyEndinit(password);
144 *
145 * // run Non distructive inversion test for cpu0 DSPR memory (Range selection disabled)
146 * IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel_cpu0Dspr, 0, 0xFF, 0, &errAddr);
147 * // Clear Error Flags which are set in case you want to run further tests
148 * IfxMtu_clearErrorTracking(IfxMtu_MbistSel_cpu0Dspr);
149 *
150 * IfxScuWdt_setSafetyEndinit(password);
151 * }
152 * \endcode
153 *
154 *
155 * \defgroup IfxLld_Mtu_Std_Utility Utility Functions
156 * \ingroup IfxLld_Mtu_Std
157 * \defgroup IfxLld_Mtu_Std_Operative MBIST Operations
158 * \ingroup IfxLld_Mtu_Std
159 * \defgroup IfxLld_Mtu_Std_ErrorTracking MBIST Error Tracking
160 * \ingroup IfxLld_Mtu_Std
161 */
162
163 #ifndef IFXMTU_H
164 #define IFXMTU_H 1
165
166 /******************************************************************************/
167 /*----------------------------------Includes----------------------------------*/
168 /******************************************************************************/
169
170 #include "_Impl/IfxMtu_cfg.h"
171 #include "IfxMc_bf.h"
172 #include "IfxMtu_reg.h"
173 #include "IfxMc_reg.h"
174 #include "IfxScu_reg.h"
175 #include "_Utilities/Ifx_Assert.h"
176 #include "Scu/Std/IfxScuWdt.h"
177 #include "Scu/Std/IfxScuCcu.h"
178
179 /******************************************************************************/
180 /*-----------------------------------Macros-----------------------------------*/
181 /******************************************************************************/
182
183 /** \brief Mask for the ERROR flags
184 */
185 #define IFXMTU_ERROR_FLAGS_MASK \
186 (((unsigned int)IFX_MC_ECCD_EOV_MSK << IFX_MC_ECCD_EOV_OFF) | \
187 ((unsigned int)IFX_MC_ECCD_CERR_MSK << IFX_MC_ECCD_CERR_OFF) | \
188 ((unsigned int)IFX_MC_ECCD_UERR_MSK << IFX_MC_ECCD_UERR_OFF) | \
189 ((unsigned int)IFX_MC_ECCD_AERR_MSK << IFX_MC_ECCD_AERR_OFF))
190
191 /** \addtogroup IfxLld_Mtu_Std_Utility
192 * \{ */
193
194 /******************************************************************************/
195 /*-------------------------Inline Function Prototypes-------------------------*/
196 /******************************************************************************/
197
198 /** \brief Disables the MBIST Shell of the given SRAM
199 * \param mbistSel Memory Selection
200 * \return None
201 *
202 * Usage Example
203 * \code
204 *
205 * IfxMtu_disableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
206 *
207 * // Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache
208 * while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
209 * {}
210 * \endcode
211 *
212 */
213 IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel);
214
215 /** \brief Enables the MBIST Shell of the given SRAM.
216 * \param mbistSel Memory Selection
217 * \return None
218 *
219 * Usage Example
220 * \code
221 * // Enable MTU clock
222 * {
223 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
224 * IfxScuWdt_clearCpuEndinit(password);
225 * IfxMtu_enableModule();
226 * IfxScuWdt_setCpuEndinit(password);
227 * }
228 *
229 * {
230 * IfxMtu_enableMbistShell(IfxMtu_MbistSel_cpu0Dtag);
231 *
232 * // Note: Wait for Auto-initilisation to be completed for auto-init memories like cpu-Dtag, cpu-Ptag, Cpu-Dcache, Cpu-Pcache,
233 * while (IfxMtu_isAutoInitRunning(IfxMtu_MbistSel_cpu0Dtag))
234 * {}
235 * }
236 * \endcode
237 *
238 */
239 IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel);
240
241 /** \brief Enables the MTU module
242 * \return None
243 */
244 IFX_INLINE void IfxMtu_enableModule(void);
245
246 /** \brief Returns TRUE if Auto-Initialisation is running for the given SRAM.
247 *
248 * Should be polled after MBIST enableMbistShell to ensure that an auto-init operation is finished before starting a new operation.
249 * \param mbistSel Memory Selection
250 * \return TRUE if auto-initialisation running.
251 */
252 IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel);
253
254 /** \brief Returns the status of whether the module is enabled or not
255 * \return
256 */
257 IFX_INLINE boolean IfxMtu_isModuleEnabled(void);
258
259 /** \} */
260
261 /** \addtogroup IfxLld_Mtu_Std_Operative
262 * \{ */
263
264 /******************************************************************************/
265 /*-------------------------Inline Function Prototypes-------------------------*/
266 /******************************************************************************/
267
268 /** \brief This Function returns the status of MBIST clear Sram operation.
269 * Caution: It is recommended not to call this function continously in a loop. Use IfxMtu_ClearSram() function for Synchronous polling mode.
270 * \param mbistSel Memory Selection
271 * \return status of Mbist Clear Sram operation (TRUE - Operation completed, FALSE - Operation still in progress)
272 *
273 * A coding example can be found in \ref IfxLld_Mtu_Usage
274 *
275 */
276 IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel);
277
278 /******************************************************************************/
279 /*-------------------------Global Function Prototypes-------------------------*/
280 /******************************************************************************/
281
282 /** \brief Function to Clear the MBIST SRAM (Synchronous mode).
283 * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
284 * \param mbistSel Memory Selection
285 * \return None
286 *
287 * A coding example can be found in \ref IfxLld_Mtu_Usage
288 *
289 */
290 IFX_EXTERN void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel);
291
292 /** \brief This Function should be called after MBIST Clear SRAM operation is completed.
293 * Note: The function should be called with safety endinit bit cleared.
294 * \param mbistSel Memory Selection
295 * \return None
296 *
297 * A coding example can be found in \ref IfxLld_Mtu_Usage
298 *
299 */
300 IFX_EXTERN void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel);
301
302 /** \brief This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn't wait till the end of operation.
303 * The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation.
304 * If Synchronous usage is need, use IfxMtu_clearSram() function.
305 * Note: The function should be called with safety endinit bit cleared.
306 * \param mbistSel Memory Selection
307 * \return None
308 *
309 * A coding example can be found in \ref IfxLld_Mtu_Usage
310 *
311 */
312 IFX_EXTERN void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel);
313
314 /**
315 * \param mbistSel Memory Selection
316 * \param sramAddress SRAM address which should be read
317 * \return None
318 *
319 * A coding example can be found in \ref IfxLld_Mtu_Usage
320 *
321 */
322 IFX_EXTERN void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress);
323
324 /** \brief This function runs the Non-Destructive Inversion test algorithm.
325 * Non-Destructive Inversion test can be considered as a simple linear test that is able to find all Stuck-At faults (the cell remains stuck at a value for any operation) without destroying any user data. The test accesses every Word in the address range defined by the RANGE register, four times.
326 * Test Steps:
327 * 1. Read data Word including check bits
328 * 2. write back all bits inverted
329 * 3. Read data Word including check bits
330 * 4. Write back all bits inverted
331 * At the end of this procedure the user data remains unchanged and and every bit has been set to 0 and 1. Any single Stuck-At error will be visible as a correctable error.
332 * Note: The function clears & sets safety endinit bit while running the test to prevent watchdog TO and automatically restores the endinit state (same state at the time of entering the function) at the end.
333 * The Error flags need to be cleared to enable further tracking after the test
334 * \param mbistSel Memory Selection
335 * \param rangeSel enable/disable range Selection (0 - disable, 1- enable)
336 * \param rangeAddrUp when range mode is enabled, it specifies the upper logical block address limit in 64 word increments.
337 * \param rangeAddrLow when range mode is enabled, it specifies the lower logical block address limit.
338 * \param errorAddr If the test fails, it contains the error address (bit0 - bit12) and memory block index (Bit13 - Bit15)
339 * \return Test Status (0-PASS, 1- FAIL)
340 */
341 IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr);
342
343 /**
344 * \param mbistSel Memory Selection
345 * \param sramAddress SRAM address which should be written
346 * \return None
347 */
348 IFX_EXTERN void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress);
349
350 /** \} */
351
352 /** \addtogroup IfxLld_Mtu_Std_ErrorTracking
353 * \{ */
354
355 /******************************************************************************/
356 /*-------------------------Inline Function Prototypes-------------------------*/
357 /******************************************************************************/
358
359 /** \brief Returns the status of the error tracking
360 * \param mbistSel Memory Selection
361 * \return TRUE if error tracking enabled.
362 */
363 IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel);
364
365 /** \brief Returns the error tracking overflow status.
366 * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
367 * \param mbistSel Memory Selection
368 * \return TRUE if more errors were detected since last clear than error tracking registers are available, or if more than one memory block was in error at the same time.
369 */
370 IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel);
371
372 /** \brief Returns True if any Error Flags are set
373 * \param mbistSel Memory slection
374 * \return True if any error Flag is set
375 */
376 IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel);
377
378 /******************************************************************************/
379 /*-------------------------Global Function Prototypes-------------------------*/
380 /******************************************************************************/
381
382 /** \brief Clears the error tracking registers (ETRR), valid and overflow bits.
383 * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
384 * \param mbistSel Memory Selection
385 * \return None
386 *
387 * A coding example can be found in \ref IfxLld_Mtu_Usage
388 *
389 */
390 IFX_EXTERN void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel);
391
392 /** \brief Enables the tracking of SRAM errors.
393 * \param mbistSel Memory Selection
394 * \param enable TRUE to enable error tracking, FALSE to disable error tracking.
395 * \return None
396 *
397 * A coding example can be found in \ref IfxLld_Mtu_Usage
398 *
399 */
400 IFX_EXTERN void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable);
401
402 /** \brief Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (SRAM address and block)
403 *
404 * Please note that not all memories of the system are supported by this function.
405 * Additional memories will be considered on request.
406 * \param mbistSel Memory Selection
407 * \param trackedSramAddress tracked SRAM address which consists of an ADDR and MBI field (SRAM address and block)
408 * \return descrambled system address if supported by this function, otherwise 0
409 *
410 * Example usage: see \ref IfxMtu_getTrackedSramAddresses
411 *
412 */
413 IFX_EXTERN uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress);
414
415 /** \brief Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registers.
416 * CAUTION: This function should be called after enabling Mbist Shell (Refer Errata: MTU_TC.005).
417 * \param mbistSel Memory Selection
418 * \param trackedSramAddresses will contain the tracked error addresses in trackedSramAdresses[x].B.ADDR and affected blocks in sramAddresses[x].B.MBI
419 *
420 * The array size shall be IFXMTU_MAX_TRACKED_ADDRESSES
421 * \return number of tracked errors (0..IFXMTU_MAX_TRACKED_ADDRESSES)
422 *
423 * Example usage to print out tracked errors of a given memory:
424 *
425 * We assume that the MTU clock has already been enabled, and that the MBIST instance has been selected; e.g. for LMU:
426 * \code
427 * uint16 password = IfxScuWdt_getCpuWatchdogPassword();
428 * IfxScuWdt_clearCpuEndinit(password);
429 *
430 * IfxMtu_enableModule();
431 *
432 * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_lmu;
433 *
434 * IfxMtu_enableMbistShell(mbistSel);
435 *
436 * // for auto-init memories: wait for the end of the clear operation
437 * while (IfxMtu_isAutoInitRunning(mbistSel))
438 * {}
439 * \endcode
440 *
441 * Now the tracking information can be retrieved with:
442 *
443 * \code
444 * {
445 * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
446 * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
447 *
448 * clib_ver_printf("Tracked addresses: %d (Overflow: %d)\n",
449 * numTrackedAddresses,
450 * IfxMtu_isErrorTrackingOverflow(mbistSel) ? 1 : 0);
451 *
452 * for(int i=0; i<numTrackedAddresses; ++i) {
453 * clib_ver_printf("%d: A:0x%04x MBI:%d -> SystemAddress: 0x%08x\n",
454 * i,
455 * trackedSramAddresses[i].B.ADDR,
456 * trackedSramAddresses[i].B.MBI,
457 * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
458 * }
459 * }
460 * \endcode
461 *
462 */
463 IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses);
464
465 /** \} */
466
467 /******************************************************************************/
468 /*---------------------Inline Function Implementations------------------------*/
469 /******************************************************************************/
470
471 IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
472 {
473 volatile uint32 *mtuMemtest = (volatile uint32 *)((uint32)&MTU_MEMTEST0 + 4 * (mbistSel >> 5));
474 uint32 mask = 1 << (mbistSel & 0x1f);
475 *mtuMemtest &= ~mask;
476 }
477
478
479 IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
480 {
481 volatile uint32 *mtuMemtest = (volatile uint32 *)((uint32)&MTU_MEMTEST0 + 4 * (mbistSel >> 5));
482 uint32 mask = 1 << (mbistSel & 0x1f);
483 *mtuMemtest |= mask;
484 }
485
486
487 IFX_INLINE void IfxMtu_enableModule(void)
488 {
489 uint8 isEndInitEnabled = 0;
490
491 if (IfxScuWdt_getCpuWatchdogEndInit() == 1U)
492 {
493 /* Clear EndInit */
494 IfxScuWdt_clearCpuEndinit(IfxScuWdt_getCpuWatchdogPassword());
495 isEndInitEnabled = 1;
496 }
497
498 /* MTU clock enable */
499 MTU_CLC.U = 0x0U;
500
501 if (isEndInitEnabled == 1U)
502 {
503 IfxScuWdt_setCpuEndinit(IfxScuWdt_getCpuWatchdogPassword());
504 }
505 }
506
507
508 IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
509 {
510 volatile uint32 *mtuMemstat = (volatile uint32 *)((uint32)&MTU_MEMSTAT0 + 4 * (mbistSel >> 5));
511 uint32 mask = 1 << (mbistSel & 0x1f);
512 return (*mtuMemstat & mask) != 0;
513 }
514
515
516 IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel)
517 {
518 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
519 return mc->ECCS.B.TRE ? TRUE : FALSE;
520 }
521
522
523 IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel)
524 {
525 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
526 return mc->ECCD.B.EOV ? TRUE : FALSE;
527 }
528
529
530 IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
531 {
532 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
533 uint16 status;
534
535 status = mc->MSTATUS.U;
536 return (boolean)(status & 0x01);
537 }
538
539
540 IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
541 {
542 return MTU_CLC.B.DISS == 0;
543 }
544
545
546 IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
547 {
548 Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
549 return (boolean)((mc->ECCD.U & IFXMTU_ERROR_FLAGS_MASK) > 0);
550 }
551
552
553 #endif /* IFXMTU_H */
IfxMtu_clearSram
IFX_EXTERN void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
Function to Clear the MBIST SRAM (Synchronous mode). Note: The function clears & sets safety endinit ...
Definition: IfxMtu.c:60
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMtu_runNonDestructiveInversionTest
IFX_EXTERN uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
This function runs the Non-Destructive Inversion test algorithm. Non-Destructive Inversion test can b...
Definition: IfxMtu.c:284
Ifx_Assert.h
Assert functions.
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:66
IfxMtu_isErrorTrackingOverflow
IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel)
Returns the error tracking overflow status. CAUTION: This function should be called after enabling Mb...
Definition: IfxMtu.h:523
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxScuWdt.h
SCU basic functionality.
IfxMtu_enableModule
IFX_INLINE void IfxMtu_enableModule(void)
Enables the MTU module.
Definition: IfxMtu.h:487
IfxMtu_getSystemAddress
IFX_EXTERN uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
Returns the descrambled system address based on a tracked SRAM error which consists of ADDR and MBI (...
Definition: IfxMtu.c:197
IfxMtu_clearSramContinue
IFX_EXTERN void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
This Function should be called after MBIST Clear SRAM operation is completed. Note: The function shou...
Definition: IfxMtu.c:102
IfxMtu_checkErrorFlags
IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
Returns True if any Error Flags are set.
Definition: IfxMtu.h:546
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IFXMTU_MC_ADDRESS_BASE
#define IFXMTU_MC_ADDRESS_BASE
Base address of first MBIST Control Block.
Definition: IfxMtu_cfg.h:50
IfxMtu_clearSramStart
IFX_EXTERN void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
This Function triggers the Clear the MBIST SRAM operation (Asynchronous operation). It doesn&#39;t wait till the end of operation. The application has to poll the Mbist status (IfxMtu_isMbistDone()) in a task and once the operation is done, the IfxMtu_clearSramContinue() function should be called to complete the operation. If Synchronous usage is need, use IfxMtu_clearSram() function. Note: The function should be called with safety endinit bit cleared.
Definition: IfxMtu.c:115
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxScuWdt_getCpuWatchdogEndInit
boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:230
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxMtu_isModuleEnabled
IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
Returns the status of whether the module is enabled or not.
Definition: IfxMtu.h:540
IfxMtu_readSramAddress
IFX_EXTERN void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:257
IfxMtu_getTrackedSramAddresses
IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
Returns the tracked SRAM error addresses and memory blocks which are stored in the MBIST ETRR registe...
Definition: IfxMtu.c:233
IfxMtu_enableMbistShell
IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
Enables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:479
IfxMtu_isErrorTrackingEnabled
IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel)
Returns the status of the error tracking.
Definition: IfxMtu.h:516
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxScuCcu.h
SCU basic functionality.
IfxMtu_writeSramAddress
IFX_EXTERN void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
Definition: IfxMtu.c:360
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:460
IfxMtu_cfg.h
Mtu on-chip implementation data.
IfxMtu_isMbistDone
IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
This Function returns the status of MBIST clear Sram operation. Caution: It is recommended not to cal...
Definition: IfxMtu.h:530
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxMtu_enableErrorTracking
IFX_EXTERN void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
Enables the tracking of SRAM errors.
Definition: IfxMtu.c:182
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxMtu_clearErrorTracking
IFX_EXTERN void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
Clears the error tracking registers (ETRR), valid and overflow bits. CAUTION: This function should be...
Definition: IfxMtu.c:53
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMtu_disableMbistShell
IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
Disables the MBIST Shell of the given SRAM.
Definition: IfxMtu.h:471
IfxMtu_isAutoInitRunning
IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
Returns TRUE if Auto-Initialisation is running for the given SRAM.
Definition: IfxMtu.h:508
IFXMTU_ERROR_FLAGS_MASK
#define IFXMTU_ERROR_FLAGS_MASK
Mask for the ERROR flags.
Definition: IfxMtu.h:185


iLLD_TC26B: IfxMtu_cfg.c Source File

  • _Impl
IfxMtu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxMtu_cfg.c
3 * \brief Mtu on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxMtu_cfg.h"
30 #include "Mtu/Std/IfxMtu.h"
31
32 /******************************************************************************/
33 /*-----------------------Exported Variables/Constants-------------------------*/
34 /******************************************************************************/
35
36 const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS] = {
37 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
38 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
39 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
40 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
41 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
42 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
43 {2 * 4, 16, 6, 0, 1, 8192 }, /**< \brief IfxMtu_MbistSel_cpu1Dspr */
44 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
45 {2 * 1, 20, 6, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_cpu1Dtag */
46 {1 * 2, 64, 8, 0, 1, 3072 }, /**< \brief IfxMtu_MbistSel_cpu1Pspr */
47 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
48 {2 * 1, 20, 5, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_cpu1Ptag */
49 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
50 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
51 {2 * 4, 16, 6, 0, 1, 8192 }, /**< \brief IfxMtu_MbistSel_cpu0Dspr */
52 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
53 {1 * 2, 32, 8, 0, 1, 3072 }, /**< \brief IfxMtu_MbistSel_cpu0Pspr */
54 {2 * 1, 20, 5, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_cpu0Ptag */
55 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
56 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
57 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
58 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
59 {1 * 2, 35, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_ethermac */
60 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
61 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
62 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
63 {1 * 1, 64, 8, 0, 1, 4096 }, /**< \brief IfxMtu_MbistSel_mod4 */
64 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
65 {1 * 1, 29, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmFifo */
66 {1 * 3, 32, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmMcs0 */
67 {1 * 3, 32, 8, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_gtmMcs1 */
68 {1 * 1, 24, 7, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_gtmDpll1a */
69 {1 * 1, 24, 7, 0, 1, 384 }, /**< \brief IfxMtu_MbistSel_gtmDpll1b */
70 {1 * 1, 24, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmDpll2 */
71 {1 * 1, 32, 8, 0, 1, 192 }, /**< \brief IfxMtu_MbistSel_psi5 */
72 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
73 {1 * 1, 32, 8, 0, 1, 2496 }, /**< \brief IfxMtu_MbistSel_mcan */
74 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
75 {1 * 2, 32, 8, 0, 1, 64 }, /**< \brief IfxMtu_MbistSel_erayObf */
76 {1 * 4, 32, 8, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_erayIbfTbf */
77 {1 * 1, 32, 8, 0, 1, 4096 }, /**< \brief IfxMtu_MbistSel_erayMbf */
78 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
79 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
80 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
81 {2 * 1, 8, 6, 0, 1, 40960}, /**< \brief IfxMtu_MbistSel_stdbyRam1 */
82 {1 * 4, 32, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_mcds */
83 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem0 */
84 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem1 */
85 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem2 */
86 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem3 */
87 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem4 */
88 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem5 */
89 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem6 */
90 {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem7 */
91 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
92 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
93 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
94 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
95 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
96 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
97 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
98 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
99 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
100 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
101 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
102 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
103 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
104 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
105 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
106 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
107 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
108 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
109 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
110 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
111 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
112 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
113 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
114 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
115 {1 * 4, 8, 6, 0, 1, 5120 }, /**< \brief IfxMtu_MbistSel_cifJpeg1_4 */
116 {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
117 {1 * 2, 8, 6, 0, 1, 384 }, /**< \brief IfxMtu_MbistSel_cifJpeg3 */
118 {1 * 1, 36, 8, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_cifCif */
119 {1 * 1, 8, 6, 0, 1, 20480}, /**< \brief IfxMtu_MbistSel_stdbyRam2 */
120 {1 * 4, 64, 8, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_dma */
121 {1 * 2, 128, 9, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_ememXtm0 */
122 {1 * 2, 128, 9, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_ememXtm1 */
123 {1 * 4, 64, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_fft0 */
124 {1 * 1, 16, 6, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_fft1 */
125 };
IfxMtu.h
MTU basic functionality.
IfxMtu_sramTable
const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]
Definition: IfxMtu_cfg.c:36
IFXMTU_NUM_MBIST_TABLE_ITEMS
#define IFXMTU_NUM_MBIST_TABLE_ITEMS
Number of MBIST Table items.
Definition: IfxMtu_cfg.h:54
IfxMtu_cfg.h
Mtu on-chip implementation data.
IfxMtu_SramItem
Describes physical parameters of a SRAM memory.
Definition: IfxMtu_cfg.h:116


iLLD_TC26B: IfxMtu_cfg.h Source File

  • _Impl
IfxMtu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxMtu_cfg.h
3 * \brief Mtu on-chip implementation data
4 * \ingroup IfxLld_Mtu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Mtu MTU
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Mtu_Impl Implementation
27 * \ingroup IfxLld_Mtu
28 * \defgroup IfxLld_Mtu_Std Standard Driver
29 * \ingroup IfxLld_Mtu
30 */
31
32 #ifndef IFXMTU_CFG_H
33 #define IFXMTU_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "Cpu/Std/IfxCpu.h"
40 #include "Cpu/Std/IfxCpu_Intrinsics.h"
41 #include "IfxMtu_reg.h"
42 #include "IfxMc_reg.h"
43
44 /******************************************************************************/
45 /*-----------------------------------Macros-----------------------------------*/
46 /******************************************************************************/
47
48 /** \brief Base address of first MBIST Control Block
49 */
50 #define IFXMTU_MC_ADDRESS_BASE (0xF0061000u)
51
52 /** \brief Number of MBIST Table items
53 */
54 #define IFXMTU_NUM_MBIST_TABLE_ITEMS (88)
55
56 /** \brief Maximum number of tracked SRAM addresses (ETTR)
57 */
58 #define IFXMTU_MAX_TRACKED_ADDRESSES (5)
59
60 /******************************************************************************/
61 /*-------------------------------Enumerations---------------------------------*/
62 /******************************************************************************/
63
64 /** \brief MBIST Selection
65 */
66 typedef enum
67 {
68 IfxMtu_MbistSel_none = -1,
69 IfxMtu_MbistSel_cpu1Dspr = 6,
70 IfxMtu_MbistSel_cpu1Dtag = 8,
71 IfxMtu_MbistSel_cpu1Pspr = 9,
72 IfxMtu_MbistSel_cpu1Ptag = 11,
73 IfxMtu_MbistSel_cpu0Dspr = 14,
74 IfxMtu_MbistSel_cpu0Pspr = 16,
75 IfxMtu_MbistSel_cpu0Ptag = 17,
76 IfxMtu_MbistSel_ethermac = 22,
77 IfxMtu_MbistSel_mod4 = 26,
78 IfxMtu_MbistSel_gtmFifo = 28,
79 IfxMtu_MbistSel_gtmMcs0 = 29,
80 IfxMtu_MbistSel_gtmMcs1 = 30,
81 IfxMtu_MbistSel_gtmDpll1a = 31,
82 IfxMtu_MbistSel_gtmDpll1b = 32,
83 IfxMtu_MbistSel_gtmDpll2 = 33,
84 IfxMtu_MbistSel_psi5 = 34,
85 IfxMtu_MbistSel_mcan = 36,
86 IfxMtu_MbistSel_erayObf = 38,
87 IfxMtu_MbistSel_erayIbfTbf = 39,
88 IfxMtu_MbistSel_erayMbf = 40,
89 IfxMtu_MbistSel_stdbyRam1 = 44,
90 IfxMtu_MbistSel_mcds = 45,
91 IfxMtu_MbistSel_emem0 = 46,
92 IfxMtu_MbistSel_emem1 = 47,
93 IfxMtu_MbistSel_emem2 = 48,
94 IfxMtu_MbistSel_emem3 = 49,
95 IfxMtu_MbistSel_emem4 = 50,
96 IfxMtu_MbistSel_emem5 = 51,
97 IfxMtu_MbistSel_emem6 = 52,
98 IfxMtu_MbistSel_emem7 = 53,
99 IfxMtu_MbistSel_cifJpeg1_4 = 78,
100 IfxMtu_MbistSel_cifJpeg3 = 80,
101 IfxMtu_MbistSel_cifCif = 81,
102 IfxMtu_MbistSel_stdbyRam2 = 82,
103 IfxMtu_MbistSel_dma = 83,
104 IfxMtu_MbistSel_ememXtm0 = 84,
105 IfxMtu_MbistSel_ememXtm1 = 85,
106 IfxMtu_MbistSel_fft0 = 86,
107 IfxMtu_MbistSel_fft1 = 87
108 } IfxMtu_MbistSel;
109
110 /******************************************************************************/
111 /*-----------------------------Data Structures--------------------------------*/
112 /******************************************************************************/
113
114 /** \brief Describes physical parameters of a SRAM memory
115 */
116 typedef struct
117 {
118 uint8 numBlocks; /**< \brief number of SRAM blocks */
119 uint16 dataSize; /**< \brief Data Size of each memory block */
120 uint8 eccSize; /**< \brief ECC Size of each memory block */
121 uint8 eccInvPos0; /**< \brief First ECC bit which needs to be inverted */
122 uint8 eccInvPos1; /**< \brief Second ECC bit which needs to be inverted */
123 uint32 mbistDelay; /**< \brief Mbist Delay */
124 } IfxMtu_SramItem;
125
126 /******************************************************************************/
127 /*-------------------Global Exported Variables/Constants----------------------*/
128 /******************************************************************************/
129
130 IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS];
131
132 #endif /* IFXMTU_CFG_H */
IfxMtu_MbistSel_emem7
Definition: IfxMtu_cfg.h:98
IfxMtu_sramTable
IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS]
Definition: IfxMtu_cfg.h:130
IfxMtu_MbistSel_mcan
Definition: IfxMtu_cfg.h:85
IfxMtu_MbistSel_cifJpeg1_4
Definition: IfxMtu_cfg.h:99
IfxMtu_MbistSel_cpu0Pspr
Definition: IfxMtu_cfg.h:74
IfxMtu_MbistSel_mod4
Definition: IfxMtu_cfg.h:77
IfxMtu_MbistSel_erayObf
Definition: IfxMtu_cfg.h:86
IfxMtu_MbistSel_stdbyRam1
Definition: IfxMtu_cfg.h:89
IfxMtu_MbistSel_fft0
Definition: IfxMtu_cfg.h:106
IfxMtu_MbistSel_erayMbf
Definition: IfxMtu_cfg.h:88
IfxMtu_SramItem::mbistDelay
uint32 mbistDelay
Mbist Delay.
Definition: IfxMtu_cfg.h:123
IfxMtu_MbistSel_none
Definition: IfxMtu_cfg.h:68
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMtu_SramItem::eccInvPos0
uint8 eccInvPos0
First ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:121
IfxMtu_MbistSel
IfxMtu_MbistSel
MBIST Selection.
Definition: IfxMtu_cfg.h:66
IfxCpu_Intrinsics.h
IfxMtu_MbistSel_emem1
Definition: IfxMtu_cfg.h:92
IFXMTU_NUM_MBIST_TABLE_ITEMS
#define IFXMTU_NUM_MBIST_TABLE_ITEMS
Number of MBIST Table items.
Definition: IfxMtu_cfg.h:54
IfxMtu_MbistSel_cpu1Ptag
Definition: IfxMtu_cfg.h:72
IfxMtu_SramItem::eccInvPos1
uint8 eccInvPos1
Second ECC bit which needs to be inverted.
Definition: IfxMtu_cfg.h:122
IfxMtu_MbistSel_cpu0Ptag
Definition: IfxMtu_cfg.h:75
IfxMtu_MbistSel_gtmFifo
Definition: IfxMtu_cfg.h:78
IfxMtu_MbistSel_stdbyRam2
Definition: IfxMtu_cfg.h:102
IfxMtu_MbistSel_cpu1Pspr
Definition: IfxMtu_cfg.h:71
IfxMtu_MbistSel_emem4
Definition: IfxMtu_cfg.h:95
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxMtu_MbistSel_ememXtm1
Definition: IfxMtu_cfg.h:105
IfxMtu_MbistSel_emem0
Definition: IfxMtu_cfg.h:91
IfxMtu_MbistSel_cifCif
Definition: IfxMtu_cfg.h:101
IfxMtu_SramItem::dataSize
uint16 dataSize
Data Size of each memory block.
Definition: IfxMtu_cfg.h:119
IfxMtu_MbistSel_cifJpeg3
Definition: IfxMtu_cfg.h:100
IfxMtu_SramItem::numBlocks
uint8 numBlocks
number of SRAM blocks
Definition: IfxMtu_cfg.h:118
IfxMtu_MbistSel_ememXtm0
Definition: IfxMtu_cfg.h:104
IfxMtu_MbistSel_cpu1Dtag
Definition: IfxMtu_cfg.h:70
IfxMtu_MbistSel_gtmDpll2
Definition: IfxMtu_cfg.h:83
IfxMtu_MbistSel_psi5
Definition: IfxMtu_cfg.h:84
IfxMtu_MbistSel_emem6
Definition: IfxMtu_cfg.h:97
IfxMtu_MbistSel_gtmDpll1b
Definition: IfxMtu_cfg.h:82
IfxMtu_MbistSel_emem2
Definition: IfxMtu_cfg.h:93
IfxMtu_MbistSel_gtmDpll1a
Definition: IfxMtu_cfg.h:81
IfxMtu_MbistSel_ethermac
Definition: IfxMtu_cfg.h:76
IfxCpu.h
CPU basic functionality.
IfxMtu_MbistSel_cpu1Dspr
Definition: IfxMtu_cfg.h:69
IfxMtu_MbistSel_emem3
Definition: IfxMtu_cfg.h:94
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMtu_MbistSel_gtmMcs0
Definition: IfxMtu_cfg.h:79
IfxMtu_MbistSel_erayIbfTbf
Definition: IfxMtu_cfg.h:87
IfxMtu_MbistSel_gtmMcs1
Definition: IfxMtu_cfg.h:80
IfxMtu_MbistSel_cpu0Dspr
Definition: IfxMtu_cfg.h:73
IfxMtu_MbistSel_mcds
Definition: IfxMtu_cfg.h:90
IfxMtu_MbistSel_fft1
Definition: IfxMtu_cfg.h:107
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMtu_MbistSel_emem5
Definition: IfxMtu_cfg.h:96
IfxMtu_SramItem::eccSize
uint8 eccSize
ECC Size of each memory block.
Definition: IfxMtu_cfg.h:120
IfxMtu_SramItem
Describes physical parameters of a SRAM memory.
Definition: IfxMtu_cfg.h:116
IfxMtu_MbistSel_dma
Definition: IfxMtu_cfg.h:103


iLLD_TC26B: IfxMultican.c Source File

  • Multican
  • Std
IfxMultican.c
Go to the documentation of this file.
1 /**
2 * \file IfxMultican.c
3 * \brief MULTICAN basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxMultican.h"
30
31 /******************************************************************************/
32 /*-----------------------Private Function Prototypes--------------------------*/
33 /******************************************************************************/
34
35 /** \brief Do actual long frame reading from the message object
36 * \param mcan Specifies the CAN module
37 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
38 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
39 * \param data Pointer to data (in words)
40 * \return None
41 */
42 IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
43
44 /** \brief Do actual message reading from the message object
45 * \param hwObj Pointer to CAN message object registers
46 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
47 * \return None
48 */
49 IFX_STATIC void IfxMultican_MsgObj_doReadMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg);
50
51 /******************************************************************************/
52 /*-------------------------Function Implementations---------------------------*/
53 /******************************************************************************/
54
55 boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
56 {
57 boolean result = FALSE;
58 Ifx_CAN_MO_CTR ctr;
59 Ifx_CAN_MO_STAT stat;
60
61 stat.U = hwObj->STAT.U;
62
63 if ((stat.B.TXRQ != 0) && (stat.B.NEWDAT != 0))
64 {
65 ctr.U = 0;
66 ctr.B.RESRTSEL = 1; /* take out from transmission */
67 hwObj->CTR.U = ctr.U;
68 result = TRUE;
69 }
70
71 return result;
72 }
73
74
75 void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
76 {
77 Ifx_CAN_MO_CTR ctr;
78 ctr.U = 0;
79 ctr.U = 1U << flag;
80
81 hwObj->CTR.U = ctr.U;
82 }
83
84
85 void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
86 {
87 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
88 /* Remove the message object from any node */
89 /* Append message object to the end of the list */
90 IfxMultican_setListCommand(mcan, 0x2, 0, msgObjId);
91
92 hwObj->CTR.U = 0x0000FFFFUL; /* to be written first */
93
94 hwObj->FCR.U = 0x00000000UL;
95 hwObj->FGPR.U = 0x00000000UL;
96 hwObj->IPR.U = 0x00000000UL;
97 hwObj->AMR.U = 0x3FFFFFFFUL;
98 hwObj->DATAL.U = 0x00000000UL;
99 hwObj->DATAH.U = 0x00000000UL;
100 hwObj->AR.U = 0x00000000UL;
101 }
102
103
104 IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
105 {
106 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
107
108 IfxMultican_MsgObjId botMsgObjId = hwObj->FGPR.B.BOT;
109 Ifx_CAN_MO *hwBotObj = IfxMultican_MsgObj_getPointer(mcan, botMsgObjId);
110
111 IfxMultican_MsgObjId topMsgObjId = hwObj->FGPR.B.TOP;
112 Ifx_CAN_MO *hwTopObj = IfxMultican_MsgObj_getPointer(mcan, topMsgObjId);
113
114 /* for standard message object and FIFO message objects*/
115 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
116
117 /* copy the length code from hardware */
118 IfxMultican_DataLengthCode lengthCode = IfxMultican_MsgObj_getDataLengthCode(hwObj);
119
120 /* read the data from the data registers */
121 if (lengthCode > IfxMultican_DataLengthCode_0) /* no.of bytes 0 to 8 */
122 {
123 *data++ = hwObj->DATAL.U;
124 *data++ = hwObj->DATAH.U;
125 }
126
127 /* read from bottom message object extended data registers */
128 if (lengthCode > IfxMultican_DataLengthCode_8)
129 {
130 *data++ = hwBotObj->EDATA0.U;
131 }
132
133 if (lengthCode > IfxMultican_DataLengthCode_12)
134 {
135 *data++ = hwBotObj->EDATA1.U;
136 }
137
138 if (lengthCode > IfxMultican_DataLengthCode_16)
139 {
140 *data++ = hwBotObj->EDATA2.U;
141 }
142
143 if (lengthCode > IfxMultican_DataLengthCode_20)
144 {
145 *data++ = hwBotObj->EDATA3.U;
146 }
147
148 if (lengthCode > IfxMultican_DataLengthCode_24)
149 {
150 *data++ = hwBotObj->EDATA4.U;
151 *data++ = hwBotObj->EDATA5.U;
152 }
153
154 if (lengthCode > IfxMultican_DataLengthCode_32)
155 {
156 *data++ = hwBotObj->EDATA6.U;
157 /* read from top message object extended data registers */
158 *data++ = hwTopObj->EDATA0.U;
159 *data++ = hwTopObj->EDATA1.U;
160 *data++ = hwTopObj->EDATA2.U;
161 }
162
163 if (lengthCode > IfxMultican_DataLengthCode_48)
164 {
165 *data++ = hwTopObj->EDATA3.U;
166 *data++ = hwTopObj->EDATA4.U;
167 *data++ = hwTopObj->EDATA5.U;
168 *data = hwTopObj->EDATA6.U;
169 }
170
171 msg->fastBitRate = hwObj->FCR.B.BRS;
172
173 msg->lengthCode = lengthCode;
174
175 /* copy the ID from the hardware */
176 msg->id = IfxMultican_MsgObj_getMessageId(hwObj);
177 }
178
179
180 IFX_STATIC void IfxMultican_MsgObj_doReadMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
181 {
182 /* for standard message object and FIFO message objects*/
183 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
184
185 /* read the data from the data registers */
186 msg->data[0] = hwObj->DATAL.U;
187 msg->data[1] = hwObj->DATAH.U;
188
189 /* copy the length code from hardware */
190 msg->lengthCode = IfxMultican_MsgObj_getDataLengthCode(hwObj);
191
192 /* copy the ID from the hardware */
193 msg->id = IfxMultican_MsgObj_getMessageId(hwObj);
194 }
195
196
197 IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
198 {
199 uint32 index = mcan->MSID[msgObjGroup].U;
200 IfxMultican_MsgObjId msgObjId = -1;
201
202 if (index != 0x20U)
203 {
204 mcan->MSPND[msgObjGroup].U = ~(1UL << index);
205 msgObjId = index + (msgObjGroup << 5);
206 }
207
208 return msgObjId;
209 }
210
211
212 IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
213 {
214 IfxMultican_MsgObjStat status;
215
216 status.U = hwObj->STAT.U;
217
218 return status;
219 }
220
221
222 boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
223 {
224 uint32 shift = (1U << flag);
225
226 return (hwObj->STAT.U & shift) ? TRUE : FALSE;
227 }
228
229
230 IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
231 {
232 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
233 IfxMultican_Status status = IfxMultican_Status_ok;
234
235 boolean longFrame = (hwObj->FCR.B.FDF != 0) ? TRUE : FALSE;
236
237 if (longFrame)
238 {
239 /* if new data available in the message object */
240 if (hwObj->STAT.B.NEWDAT != 0)
241 {
242 Ifx_CAN_MO_STAT stat;
243 IfxMultican_MsgObj_doReadLongFrame(mcan, msgObjId, msg, data);
244 stat = hwObj->STAT; /* Cache the status after reading to reduce message lost propability */
245
246 if (stat.B.RXUPD != 0)
247 { /* Data might be inconsistent (update while reading), declare as message lost, data will be read next time the API is called */
248 status = IfxMultican_Status_messageLost;
249 }
250 else if (stat.B.NEWDAT != 0)
251 { /* Data might be inconsistent (update while reading), force massage lost flag, read new incoming data */
252 Ifx_CAN_MO_STAT stat2;
253 status = IfxMultican_Status_messageLost;
254 /* perform read from the hardware */
255 IfxMultican_MsgObj_doReadLongFrame(mcan, msgObjId, msg, data);
256
257 stat2 = hwObj->STAT; /* Cache the status after reading */
258
259 if ((stat2.B.NEWDAT == 0) && (stat2.B.RXUPD == 0))
260 {
261 status |= IfxMultican_Status_newData;
262 }
263 else
264 { /* Return message lost at 2nd read attempt, data will be read next time the API is called*/
265 }
266 }
267 else
268 {
269 status = IfxMultican_Status_newData;
270 }
271
272 if (stat.B.MSGLST != 0)
273 { /* At least on message has been lost */
274 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
275 status |= IfxMultican_Status_messageLost;
276 }
277 }
278 else
279 {
280 status = IfxMultican_Status_receiveEmpty;
281 }
282 }
283 else
284 {
285 /* use normal read message API */
286 }
287
288 return status;
289 }
290
291
292 IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
293 {
294 IfxMultican_Status status = IfxMultican_Status_ok;
295
296 /* if new data available in the message object */
297 if (hwObj->STAT.B.NEWDAT != 0)
298 {
299 Ifx_CAN_MO_STAT stat;
300 IfxMultican_MsgObj_doReadMessage(hwObj, msg);
301 stat = hwObj->STAT; /* Cache the status after reading to reduce message lost propability */
302
303 if (stat.B.RXUPD != 0)
304 { /* Data might be inconsistent (update while reading), declare as message lost, data will be read next time the API is called */
305 status = IfxMultican_Status_messageLost;
306 }
307 else if (stat.B.NEWDAT != 0)
308 { /* Data might be inconsistent (update while reading), force massage lost flag, read new incoming data */
309 Ifx_CAN_MO_STAT stat2;
310 status = IfxMultican_Status_messageLost;
311 /* perform read from the hardware */
312 IfxMultican_MsgObj_doReadMessage(hwObj, msg);
313
314 stat2 = hwObj->STAT; /* Cache the status after reading */
315
316 if ((stat2.B.NEWDAT == 0) && (stat2.B.RXUPD == 0))
317 {
318 status |= IfxMultican_Status_newData;
319 }
320 else
321 { /* Return message lost at 2nd read attempt, data will be read next time the API is called*/
322 }
323 }
324 else
325 {
326 status = IfxMultican_Status_newData;
327 }
328
329 if (stat.B.MSGLST != 0)
330 { /* At least on message has been lost */
331 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
332 status |= IfxMultican_Status_messageLost;
333 }
334 }
335 else
336 {
337 status = IfxMultican_Status_receiveEmpty;
338 }
339
340 return status;
341 }
342
343
344 IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
345 {
346 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
347 IfxMultican_Status status = IfxMultican_Status_ok;
348
349 /* get the base address of top and bottom message objects */
350 IfxMultican_MsgObjId botMsgObjId = hwObj->FGPR.B.BOT;
351 Ifx_CAN_MO *hwBotObj = IfxMultican_MsgObj_getPointer(mcan, botMsgObjId);
352
353 IfxMultican_MsgObjId topMsgObjId = hwObj->FGPR.B.TOP;
354 Ifx_CAN_MO *hwTopObj = IfxMultican_MsgObj_getPointer(mcan, topMsgObjId);
355
356 boolean longFrame = (hwObj->FCR.B.FDF != 0) ? TRUE : FALSE;
357
358 /* in either of the below cases, the two conditions FDEN = 0, EDl = 1 and BRS = 0/1 will not reach */
359 /* long frame CAN FD */
360 /* FDEN = 1, EDL = 1 and BRS = 0/1 */
361 if (longFrame)
362 {
363 if (hwObj->STAT.B.TXRQ)
364 { /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
365 status = IfxMultican_Status_notSentBusy;
366 }
367 else
368 {
369 /* MSGVAL: Set message as not valid */
370 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
371
372 if (msg->lengthCode > IfxMultican_DataLengthCode_0) /* no.of bytes 0 to 8 */
373 {
374 hwObj->DATAL.U = *data++;
375 hwObj->DATAH.U = *data++;
376 }
377
378 /* load bottom message object extended data registers */
379 if (msg->lengthCode > IfxMultican_DataLengthCode_8)
380 {
381 hwBotObj->EDATA0.U = *data++;
382 }
383
384 if (msg->lengthCode > IfxMultican_DataLengthCode_12)
385 {
386 hwBotObj->EDATA1.U = *data++;
387 }
388
389 if (msg->lengthCode > IfxMultican_DataLengthCode_16)
390 {
391 hwBotObj->EDATA2.U = *data++;
392 }
393
394 if (msg->lengthCode > IfxMultican_DataLengthCode_20)
395 {
396 hwBotObj->EDATA3.U = *data++;
397 }
398
399 if (msg->lengthCode > IfxMultican_DataLengthCode_24)
400 {
401 hwBotObj->EDATA4.U = *data++;
402 hwBotObj->EDATA5.U = *data++;
403 }
404
405 if (msg->lengthCode > IfxMultican_DataLengthCode_32)
406 {
407 hwBotObj->EDATA6.U = *data++;
408 /* load bottom message object extended data registers */
409 hwTopObj->EDATA0.U = *data++;
410 hwTopObj->EDATA1.U = *data++;
411 hwTopObj->EDATA2.U = *data++;
412 }
413
414 if (msg->lengthCode > IfxMultican_DataLengthCode_48)
415 {
416 hwTopObj->EDATA3.U = *data++;
417 hwTopObj->EDATA4.U = *data++;
418 hwTopObj->EDATA5.U = *data++;
419 hwTopObj->EDATA6.U = *data;
420 }
421
422 /* for long message */
423 {
424 /* set ID */
425 boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
426 IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
427
428 /* set data length code */
429 IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
430
431 /* set bit rate switch (fast bit rate enable/disable) */
432 IfxMultican_MsgObj_setBitRateSwitch(hwObj, msg->fastBitRate);
433 }
434
435 /* --- flags configuration --- */
436 {
437 /* set new data flag */
438 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
439
440 /* set message as valid */
441 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
442
443 /* set RTSEL */
444 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
445
446 /* set TXRQ */
447 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
448 }
449 }
450 }
451
452 /* standard frame */
453 /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
454 else
455 {
456 /* use normal send message API */
457 status = IfxMultican_Status_notInitialised;
458 }
459
460 return status;
461 }
462
463
464 IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
465 {
466 IfxMultican_Status status = IfxMultican_Status_ok;
467
468 if (hwObj->STAT.B.TXRQ)
469 { /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
470 status = IfxMultican_Status_notSentBusy;
471 }
472 else
473 {
474 /* MSGVAL: Set message as not valid */
475 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
476
477 /* for standard and FIFO message object */
478 hwObj->DATAL.U = msg->data[0]; /* Set the new data */
479 hwObj->DATAH.U = msg->data[1]; /* Set the new data */
480
481 /* for standard and FIFO message object */
482 {
483 /* set ID */
484 boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
485 IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
486
487 /* standard frame */
488 /* in case of FD standard frame, FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
489 /* set data length code */
490 IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
491 }
492
493 /* --- flags configuration --- */
494
495 /* for standard and FIFO message object */
496 {
497 /* set new data flag */
498 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
499
500 /* set message as valid, in case of FIFO mSGVAL has to be set before setting it to each slave object */
501 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
502
503 /* set TXRQ, should not be set for FIFO base object */
504 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
505 }
506 }
507
508 return status;
509 }
510
511
512 IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
513 {
514 IfxMultican_Status status = IfxMultican_Status_ok;
515
516 if (hwObj->STAT.B.TXRQ)
517 {
518 /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
519 status = IfxMultican_Status_notSentBusy;
520 }
521 else
522 {
523 /* Clear TXEN0 to update the data FIFO message object */
524 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
525
526 /* for standard and FIFO message object */
527 hwObj->DATAL.U = msg->data[0]; /* Set the new data */
528 hwObj->DATAH.U = msg->data[1]; /* Set the new data */
529
530 /* set TXEN0, to enable transmission of the updated object */
531 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
532
533 /* for standard and FIFO message object */
534 {
535 /* set ID */
536 boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
537 IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
538
539 /* standard frame */
540 /* in case of FD standard frame, FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
541 /* set data length code */
542 IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
543 }
544
545 /* --- flags configuration --- */
546
547 /* for standard and FIFO message object */
548 {
549 /* set new data flag */
550 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
551
552 /* set message as valid, in case of FIFO mSGVAL has to be set before setting it to each slave object */
553 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
554
555 /* set TXRQ, should not be set for FIFO base object */
556 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
557 }
558 }
559
560 return status;
561 }
562
563
564 void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
565 {
566 Ifx_CAN_MO_CTR ctr;
567
568 ctr.U = 0;
569 ctr.B.RESMSGVAL = 1; /* MSGVAL: Set message as not valid */
570 hwObj->CTR.U = ctr.U;
571
572 hwObj->AMR.B.AM = accMask << ((extend != 0) ? 0 : 18);
573 hwObj->AR.B.IDE = (id << ((extend != 0) ? 0 : 18)) | (extend << 29);
574
575 ctr.U = 0;
576 ctr.B.SETMSGVAL = 1; /* MSGVAL: Set message as valid */
577 hwObj->CTR.U = ctr.U;
578 }
579
580
581 void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
582 {
583 Ifx_CAN_MO_CTR ctr;
584 ctr.U = 0;
585
586 ctr.U = 1U << (flag + 16);
587
588 hwObj->CTR.U = ctr.U;
589 }
590
591
592 void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
593 {
594 hwNode->CR.U = 0x00000001;
595 hwNode->SR.U = 0x00000000;
596 hwNode->IPR.U = 0x00000000;
597 hwNode->PCR.U = 0x00000000;
598 hwNode->BTEVR.U = 0x00000000;
599 hwNode->ECNT.U = 0x00600000;
600 hwNode->FCR.U = 0x00000000;
601 }
602
603
604 boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
605 {
606 IfxPort_setPinModeInput(rxd->pin.port, rxd->pin.pinIndex, mode);
607 IfxPort_setPinPadDriver(rxd->pin.port, rxd->pin.pinIndex, padDriver);
608 hwNode->PCR.B.RXSEL = rxd->select;
609
610 return TRUE;
611 }
612
613
614 boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
615 {
616 IfxPort_setPinModeOutput(txd->pin.port, txd->pin.pinIndex, mode, txd->select);
617 IfxPort_setPinPadDriver(txd->pin.port, txd->pin.pinIndex, padDriver);
618
619 return TRUE;
620 }
621
622
623 IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
624 {
625 IfxMultican_Status status = IfxMultican_Status_busOff;
626
627 boolean busOffState = hwNode->SR.B.BOFF;
628 boolean errorWarningStatus = hwNode->SR.B.EWRN;
629
630 /* if the node is in bus off state, initiaite the recovery process */
631 if ((busOffState != 0) && (hwNode->ECNT.B.TEC > 254))
632 {
633 status = IfxMultican_Status_busOff;
634
635 /* reset error counters */
636 hwNode->ECNT.B.TEC = 0x01;
637 hwNode->ECNT.B.REC = 0x01;
638
639 /* clear error warning status */
640 hwNode->SR.B.EWRN = 0;
641
642 /* clear ALERT status */
643 hwNode->SR.B.ALERT = 0;
644
645 /* disable node INIT = 1 */
646 IfxMultican_Node_deactivate(hwNode);
647 }
648
649 /* during recovery process, if REC counter reaches 0x60 */
650 else if ((busOffState != 0) && (errorWarningStatus != 0))
651 {
652 status = IfxMultican_Status_notInitialised;
653 }
654
655 /* if the recovery process is been finished or not in Bus off mode */
656 else if ((busOffState == 0) && (errorWarningStatus == 0))
657 {
658 /* enable node INIT = 0 */
659 IfxMultican_Node_activate(hwNode);
660
661 status = IfxMultican_Status_ok;
662 }
663
664 return status;
665 }
666
667
668 void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
669 {
670 sint32 maxBRP = IFX_CAN_N_BTR_BRP_MSK + 1;
671 sint32 minBRP = 1;
672 sint32 maxTSEG1 = IFX_CAN_N_BTR_TSEG1_MSK + 1;
673 sint32 minTSEG1 = 3;
674 sint32 maxTSEG2 = IFX_CAN_N_BTR_TSEG2_MSK + 1;
675 sint32 minTSEG2 = 2;
676 sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
677 sint32 minTBAUD = 8;
678
679 sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
680 sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
681 float32 bestError = 10000.0;
682
683 /*
684 * Bit timing & sampling
685 * Tq = (BRP+1)/Fcan if DIV8 = 0
686 * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
687 * TSync = 1.Tq
688 * TSeg1 = (TSEG1+1)*Tq >= 3Tq
689 * TSeg2 = (TSEG2+1)*Tq >= 2Tq
690 * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
691 *
692 * Resynchronization:
693 *
694 * Tsjw = (SJW + 1)*Tq
695 * TSeg1 >= Tsjw + Tprop
696 * TSeg2 >= Tsjw
697 */
698
699 /* search for best baudrate */
700 bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
701
702 for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
703 {
704 float32 Fquanta = moduleFreq / tempBRP;
705 tempTBAUD = Fquanta / baudrate;
706
707 if (tempTBAUD == 0)
708 {
709 break; /* to avoid division by 0 */
710 }
711
712 float32 tempBaudrate = Fquanta / tempTBAUD;
713 float32 error = __absf(tempBaudrate - baudrate);
714
715 if (tempTBAUD < minTBAUD)
716 {
717 break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
718 }
719
720 if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
721 {
722 bestBRP = tempBRP;
723 bestTBAUD = tempTBAUD;
724 bestError = error;
725
726 if ((tempTBAUD <= 20) && (error < 0.1))
727 {
728 break; /* optimal condition */
729 }
730 }
731 }
732
733 if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
734 {
735 bestBRP = maxBRP;
736 bestTBAUD = tempTBAUD;
737 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
738 }
739
740 if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
741 {
742 bestBRP = minBRP;
743 bestTBAUD = tempTBAUD;
744 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
745 }
746
747 /* search for best sample point */
748 bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
749
750 bestTSEG1 = maxTSEG1;
751
752 for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
753 {
754 sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
755 sint32 error = __abs(tempSamplePoint - samplePoint);
756
757 if (bestError > (float)error)
758 {
759 bestTSEG1 = tempTSEG1;
760 bestError = (float)error;
761 }
762
763 if (tempSamplePoint < samplePoint)
764 {
765 if (tempTSEG1 == maxTSEG1)
766 {
767 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
768 }
769 else
770 {
771 /*least possible error */
772 }
773
774 break; /* least possible error has already occured */
775 }
776 }
777
778 if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
779 {
780 bestTSEG1 = minTSEG1;
781 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
782 }
783
784 bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
785
786 if (bestTSEG2 > maxTSEG2)
787 {
788 bestTSEG2 = maxTSEG2;
789 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
790 }
791
792 if (bestTSEG2 < minTSEG2)
793 {
794 bestTSEG2 = minTSEG2;
795 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
796 }
797
798 /* search for best SJW */
799 bestError = 10000;
800
801 for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
802 {
803 sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
804 sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
805
806 if (bestError > error)
807 {
808 bestSJW = tempSJW;
809 bestError = (float)error;
810 }
811 }
812
813 {
814 Ifx_CAN_N_BTR nbtr;
815 nbtr.U = 0;
816 nbtr.B.BRP = bestBRP - 1;
817 nbtr.B.SJW = bestSJW - 1;
818 nbtr.B.TSEG1 = bestTSEG1 - 1;
819 nbtr.B.TSEG2 = bestTSEG2 - 1;
820 nbtr.B.DIV8 = 0;
821 //nbtr.B.FTX = 0; /* TTCAN only */
822
823 hwNode->BTR.U = nbtr.U;
824 }
825 }
826
827
828 void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
829 {
830 sint32 maxBRP = IFX_CAN_N_FBTR_FBRP_MSK + 1;
831 sint32 minBRP = 1;
832 sint32 maxTSEG1 = IFX_CAN_N_FBTR_FTSEG1_MSK + 1;
833 sint32 minTSEG1 = 3;
834 sint32 maxTSEG2 = IFX_CAN_N_FBTR_FTSEG2_MSK + 1;
835 sint32 minTSEG2 = 2;
836 sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
837 sint32 minTBAUD = 8;
838
839 sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
840 sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
841 float32 bestError = 10000.0;
842 /*
843 * Bit timing & sampling
844 * Tq = (BRP+1)/Fcan if DIV8 = 0
845 * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
846 * TSync = 1.Tq
847 * TSeg1 = (TSEG1+1)*Tq >= 3Tq
848 * TSeg2 = (TSEG2+1)*Tq >= 2Tq
849 * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
850 *
851 * Resynchronization:
852 *
853 * Tsjw = (SJW + 1)*Tq
854 * TSeg1 >= Tsjw + Tprop
855 * TSeg2 >= Tsjw
856 */
857
858 /* search for best baudrate */
859 bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
860
861 for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
862 {
863 float32 Fquanta = moduleFreq / tempBRP;
864 tempTBAUD = Fquanta / baudrate;
865
866 if (tempTBAUD == 0)
867 {
868 break; /* to avoid division by 0 */
869 }
870
871 float32 tempBaudrate = Fquanta / tempTBAUD;
872 float32 error = __absf(tempBaudrate - baudrate);
873
874 if (tempTBAUD < minTBAUD)
875 {
876 break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
877 }
878
879 if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
880 {
881 bestBRP = tempBRP;
882 bestTBAUD = tempTBAUD;
883 bestError = (float)error;
884
885 if ((tempTBAUD <= 20) && (error < 0.1))
886 {
887 break; /* optimal condition */
888 }
889 }
890 }
891
892 if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
893 {
894 bestBRP = maxBRP;
895 bestTBAUD = tempTBAUD;
896 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
897 }
898
899 if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
900 {
901 bestBRP = minBRP;
902 bestTBAUD = tempTBAUD;
903 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
904 }
905
906 /* search for best sample point */
907 bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
908
909 bestTSEG1 = maxTSEG1;
910
911 for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
912 {
913 sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
914 sint32 error = __abs(tempSamplePoint - samplePoint);
915
916 if (bestError > error)
917 {
918 bestTSEG1 = tempTSEG1;
919 bestError = (float)error;
920 }
921
922 if (tempSamplePoint < samplePoint)
923 {
924 if (tempTSEG1 == maxTSEG1)
925 {
926 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
927 }
928 else
929 {
930 /*least possible error */
931 }
932
933 break; /* least possible error has already occured */
934 }
935 }
936
937 if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
938 {
939 bestTSEG1 = minTSEG1;
940 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
941 }
942
943 bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
944
945 if (bestTSEG2 > maxTSEG2)
946 {
947 bestTSEG2 = maxTSEG2;
948 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
949 }
950
951 if (bestTSEG2 < minTSEG2)
952 {
953 bestTSEG2 = minTSEG2;
954 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
955 }
956
957 /* search for best SJW */
958 bestError = 10000;
959
960 for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
961 {
962 sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
963 sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
964
965 if (bestError > error)
966 {
967 bestSJW = tempSJW;
968 bestError = (float)error;
969 }
970 }
971
972 {
973 Ifx_CAN_N_FBTR nfbtr;
974 nfbtr.U = 0;
975 nfbtr.B.FBRP = bestBRP - 1;
976 nfbtr.B.FSJW = bestSJW - 1;
977 nfbtr.B.FTSEG1 = bestTSEG1 - 1;
978 nfbtr.B.FTSEG2 = bestTSEG2 - 1;
979
980 hwNode->FBTR.U = nfbtr.U;
981 }
982 }
983
984
985 void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
986 {
987 sint32 maxBRP = IFX_CAN_N_BTEVR_BRP_MSK + 1;
988 sint32 minBRP = 1;
989 sint32 maxTSEG1 = IFX_CAN_N_BTEVR_TSEG1_MSK + 1;
990 sint32 minTSEG1 = 3;
991 sint32 maxTSEG2 = IFX_CAN_N_BTEVR_TSEG2_MSK + 1;
992 sint32 minTSEG2 = 2;
993 sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
994 sint32 minTBAUD = 8;
995
996 sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
997 sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
998 float32 bestError = 10000.0;
999 /*
1000 * Bit timing & sampling
1001 * Tq = (BRP+1)/Fcan if DIV8 = 0
1002 * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
1003 * TSync = 1.Tq
1004 * TSeg1 = (TSEG1+1)*Tq >= 3Tq
1005 * TSeg2 = (TSEG2+1)*Tq >= 2Tq
1006 * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
1007 *
1008 * Resynchronization:
1009 *
1010 * Tsjw = (SJW + 1)*Tq
1011 * TSeg1 >= Tsjw + Tprop
1012 * TSeg2 >= Tsjw
1013 */
1014
1015 /* search for best baudrate */
1016 bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
1017
1018 for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
1019 {
1020 float32 Fquanta = moduleFreq / tempBRP;
1021 tempTBAUD = Fquanta / baudrate;
1022
1023 if (tempTBAUD == 0)
1024 {
1025 break; /* to avoid division by 0 */
1026 }
1027
1028 float32 tempBaudrate = Fquanta / tempTBAUD;
1029 float32 error = __absf(tempBaudrate - baudrate);
1030
1031 if (tempTBAUD < minTBAUD)
1032 {
1033 break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
1034 }
1035
1036 if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
1037 {
1038 bestBRP = tempBRP;
1039 bestTBAUD = tempTBAUD;
1040 bestError = (float)error;
1041
1042 if ((tempTBAUD <= 20) && (error < 0.1))
1043 {
1044 break; /* optimal condition */
1045 }
1046 }
1047 }
1048
1049 if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
1050 {
1051 bestBRP = maxBRP;
1052 bestTBAUD = tempTBAUD;
1053 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1054 }
1055
1056 if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
1057 {
1058 bestBRP = minBRP;
1059 bestTBAUD = tempTBAUD;
1060 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1061 }
1062
1063 /* search for best sample point */
1064 bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
1065
1066 bestTSEG1 = maxTSEG1;
1067
1068 for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
1069 {
1070 sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
1071 sint32 error = __abs(tempSamplePoint - samplePoint);
1072
1073 if (bestError > error)
1074 {
1075 bestTSEG1 = tempTSEG1;
1076 bestError = (float)error;
1077 }
1078
1079 if (tempSamplePoint < samplePoint)
1080 {
1081 if (tempTSEG1 == maxTSEG1)
1082 {
1083 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1084 }
1085 else
1086 {
1087 /*least possible error */
1088 }
1089
1090 break; /* least possible error has already occured */
1091 }
1092 }
1093
1094 if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
1095 {
1096 bestTSEG1 = minTSEG1;
1097 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1098 }
1099
1100 bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
1101
1102 if (bestTSEG2 > maxTSEG2)
1103 {
1104 bestTSEG2 = maxTSEG2;
1105 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1106 }
1107
1108 if (bestTSEG2 < minTSEG2)
1109 {
1110 bestTSEG2 = minTSEG2;
1111 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
1112 }
1113
1114 /* search for best SJW */
1115 bestError = 10000;
1116
1117 for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
1118 {
1119 sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
1120 sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
1121
1122 if (bestError > error)
1123 {
1124 bestSJW = tempSJW;
1125 bestError = (float)error;
1126 }
1127 }
1128
1129 {
1130 Ifx_CAN_N_BTEVR nbtevr;
1131 nbtevr.U = 0;
1132 nbtevr.B.BRP = bestBRP - 1;
1133 nbtevr.B.SJW = bestSJW - 1;
1134 nbtevr.B.TSEG1 = bestTSEG1 - 1;
1135 nbtevr.B.TSEG2 = bestTSEG2 - 1;
1136 nbtevr.B.DIV8 = 0;
1137 //nbtr.B.FTX = 0; /* TTCAN only */
1138
1139 hwNode->BTEVR.U = nbtevr.U;
1140 }
1141 }
1142
1143
1144 void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
1145 {
1146 Ifx_CAN_N_BTR nbtr = {.U = btr};
1147 uint32 tempBRP = 1U + nbtr.B.BRP;
1148 uint32 tempSJW = 1U + nbtr.B.SJW;
1149 uint32 tempTSEG1 = 1U + nbtr.B.TSEG1;
1150 uint32 tempTSEG2 = 1U + nbtr.B.TSEG2;
1151 uint32 tempDIV8 = (nbtr.B.DIV8 != 0) ? 8U : 1U;
1152
1153 uint32 tempTSEG = 1 + tempTSEG1 + tempTSEG2;
1154
1155 *baudrate = (uint32)(moduleFreq / (float32)(tempDIV8 * tempBRP * tempTSEG));
1156 *samplePoint = (uint16)(((float32)tempTSEG1) * 10000 / ((float32)(tempTSEG)));
1157 *synchJumpWidth = (uint16)(((float32)tempSJW) * 10000 / ((float32)(tempTSEG)));
1158 }
1159
1160
1161 void IfxMultican_deinit(Ifx_CAN *mcan)
1162 {
1163 // should use kernel reset functionality!
1164 uint16 i;
1165
1166 /* Ifx_CAN.CLC is reset last */
1167 for (i = 0; i < IFXMULTICAN_NUM_MESSAGE_OBJECTS; i++)
1168 {
1169 IfxMultican_MsgObj_deinit(mcan, i);
1170 }
1171
1172 for (i = 0; i < IFXMULTICAN_NUM_NODES; i++)
1173 {
1174 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(mcan, IfxMultican_NodeId_0 + i);
1175
1176 IfxMultican_Node_deinit(hwNode);
1177 }
1178
1179 for (i = 0; i < IFXMULTICAN_NUM_SRC; i++)
1180 {
1181 MODULE_SRC.CAN.CAN[0].INT[i].U = 0x00000000;
1182 }
1183
1184 for (i = 0; i < 8; i++)
1185 {
1186 mcan->MSPND[i].U = 0x00000000;
1187 }
1188
1189 mcan->MSIMASK.U = 0x00000000;
1190 mcan->MCR.U = 0x00000000;
1191 {
1192 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1193 IfxScuWdt_clearCpuEndinit(passwd);
1194 mcan->FDR.U = 0x00000000;
1195 IfxScuWdt_setCpuEndinit(passwd);
1196 IfxScuWdt_clearCpuEndinit(passwd);
1197 mcan->CLC.U = 0x00000001;
1198 IfxScuWdt_setCpuEndinit(passwd);
1199 }
1200 }
1201
1202
1203 volatile Ifx_SRC_SRCR *IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
1204 {
1205 return &(MODULE_SRC.CAN.CAN[0].INT[srcId]);
1206 }
1207
1208
1209 void IfxMultican_resetModule(Ifx_CAN *can)
1210 {
1211 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1212
1213 IfxScuWdt_clearCpuEndinit(passwd);
1214 can->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
1215 can->KRST1.B.RST = 1;
1216 IfxScuWdt_setCpuEndinit(passwd);
1217
1218 while (0 == can->KRST0.B.RSTSTAT) /* Wait until reset is executed */
1219
1220 {}
1221
1222 IfxScuWdt_clearCpuEndinit(passwd);
1223 can->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
1224 IfxScuWdt_setCpuEndinit(passwd);
1225 }
1226
1227
1228 void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
1229 {
1230 Ifx_CAN_PANCTR panctr;
1231
1232 panctr.B.PANAR1 = arg1;
1233 panctr.B.PANAR2 = arg2;
1234 panctr.B.PANCMD = cmd;
1235
1236 /** - write to CAN_PANCTR */
1237 mcan->PANCTR.U = panctr.U;
1238
1239 IfxMultican_waitListReady(mcan);
1240 }
1241
1242
1243 IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican)
1244 {
1245 uint32 index;
1246 IfxMultican_Index result;
1247
1248 result = IfxMultican_Index_none;
1249
1250 for (index = 0; index < IFXMULTICAN_NUM_MODULES; index++)
1251 {
1252 if (IfxMultican_cfg_indexMap[index].module == multican)
1253 {
1254 result = (IfxMultican_Index)IfxMultican_cfg_indexMap[index].index;
1255 break;
1256 }
1257 }
1258
1259 return result;
1260 }
1261
1262
1263 Ifx_CAN *IfxMultican_getAddress(IfxMultican_Index multican)
1264 {
1265 Ifx_CAN *module;
1266
1267 if (multican < IFXMULTICAN_NUM_MODULES)
1268 {
1269 module = (Ifx_CAN *)IfxMultican_cfg_indexMap[multican].module;
1270 }
1271 else
1272 {
1273 module = NULL_PTR;
1274 }
1275
1276 return module;
1277 }
IfxMultican_MsgObjStatusFlag_transmitEnable0
Transmit enable 0 status flag.
Definition: IfxMultican.h:168
IfxMultican_Status_ok
Definition: IfxMultican.h:194
IfxMultican_Status_newData
Definition: IfxMultican.h:203
IfxMultican_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMultican_PinMap.h:44
IfxMultican_Status_busOff
Definition: IfxMultican.h:199
IfxMultican_Node_getPointer
IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number.
Definition: IfxMultican.h:1402
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxMultican_MsgObj_getMessageId
IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj)
Gets message identifier of message object.
Definition: IfxMultican.h:1175
IfxMultican_Node_recoverBusOff
IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off.
Definition: IfxMultican.c:623
IfxMultican_MsgObj_getStatus
IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.c:212
IfxMultican_Message
CAN message definition.
Definition: IfxMultican.h:224
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:39
IfxMultican_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMultican_PinMap.h:53
IfxMultican_MsgObj_setDataLengthCode
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object.
Definition: IfxMultican.h:1252
IfxMultican_MsgObj_setStatusFlag
void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object.
Definition: IfxMultican.c:581
IfxMultican_MsgObj_cancelSend
boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been star...
Definition: IfxMultican.c:55
IfxMultican_calcTimingFromBTR
void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing.
Definition: IfxMultican.c:1144
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxMultican_Message::data
uint32 data[2]
CAN message data.
Definition: IfxMultican.h:228
IfxMultican_MsgObjStatusFlag_messageLost
Message lost status flag.
Definition: IfxMultican.h:163
IfxMultican_Node_activate
IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican.h:1378
IFXMULTICAN_NUM_NODES
#define IFXMULTICAN_NUM_NODES
Number of CAN nodes.
Definition: IfxMultican_cfg.h:52
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxMultican_MsgObjStat::U
unsigned int U
Definition: IfxMultican.h:237
IfxMultican_Node_deinit
void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
Reset the CAN node.
Definition: IfxMultican.c:592
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxMultican_Node_setFastBitTiming
void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register.
Definition: IfxMultican.c:828
IfxMultican_NodeId_0
Ifx_CAN Node 0.
Definition: IfxMultican_cfg.h:83
IfxMultican_MsgObj_setBitRateSwitch
IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object.
Definition: IfxMultican.h:1228
IfxMultican_DataLengthCode_12
12 data bytes
Definition: IfxMultican.h:92
IfxMultican_MsgObj_writeTxfifo
IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:512
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxMultican_MsgObj_readMessage
IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican.c:292
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:91
IfxMultican_Message::fastBitRate
boolean fastBitRate
CAN FD fast bit rate enable/disable.
Definition: IfxMultican.h:229
IfxMultican_DataLengthCode_32
32 data bytes
Definition: IfxMultican.h:96
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxMultican_Node_deactivate
IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities.
Definition: IfxMultican.h:1384
IfxMultican_MsgObj_sendLongFrame
IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message.
Definition: IfxMultican.c:344
IfxMultican_Node_initRxPin
boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxMultican.c:604
IfxMultican_DataLengthCode_48
48 data bytes
Definition: IfxMultican.h:97
IfxMultican_Status_receiveEmpty
Definition: IfxMultican.h:201
IfxMultican_Status_messageLost
Definition: IfxMultican.h:202
IfxMultican_MsgObj_doReadMessage
IFX_STATIC void IfxMultican_MsgObj_doReadMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Do actual message reading from the message object.
Definition: IfxMultican.c:180
IfxMultican_MsgObj_getPendingId
IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group.
Definition: IfxMultican.c:197
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxMultican_Node_initTxPin
boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxMultican.c:614
IfxMultican_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]
Definition: IfxMultican_cfg.c:35
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1612
IfxMultican_MsgObjStatusFlag
IfxMultican_MsgObjStatusFlag
CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs) ...
Definition: IfxMultican.h:157
IfxMultican_MsgObj_clearStatusFlag
void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object.
Definition: IfxMultican.c:75
IfxMultican_resetModule
void IfxMultican_resetModule(Ifx_CAN *can)
resets Multican kernel
Definition: IfxMultican.c:1209
IfxMultican_DataLengthCode_20
20 data bytes
Definition: IfxMultican.h:94
IfxMultican_MsgObj_readLongFrame
IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame.
Definition: IfxMultican.c:230
IfxMultican_Message::id
uint32 id
CAN message ID.
Definition: IfxMultican.h:226
IfxMultican_Message::lengthCode
IfxMultican_DataLengthCode lengthCode
CAN message data length code.
Definition: IfxMultican.h:227
IfxMultican_MsgObj_setMessageId
IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object.
Definition: IfxMultican.h:1294
IfxMultican_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMultican_PinMap.h:43
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxMultican_Index
IfxMultican_Index
List of the available multican resource.
Definition: IfxMultican_cfg.h:72
IfxMultican_MsgObj_getDataLengthCode
IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj)
Gets data length code of a message object.
Definition: IfxMultican.h:1169
IfxMultican.h
MULTICAN basic functionality.
IfxMultican_MsgObjStatusFlag_newData
New data status flag.
Definition: IfxMultican.h:162
IfxMultican_MsgObjId
sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.
Definition: IfxMultican.h:60
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxMultican_MsgObjStatusFlag_messageValid
Message valid status flag.
Definition: IfxMultican.h:164
IfxMultican_Index_none
Not Selected.
Definition: IfxMultican_cfg.h:74
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:48
IfxMultican_DataLengthCode_0
0 data bytes
Definition: IfxMultican.h:83
IfxMultican_MsgObjGroup
IfxMultican_MsgObjGroup
CAN message object group Each group consists of 32 consecutive message objects.
Definition: IfxMultican.h:130
IfxMultican_waitListReady
IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
Wait until the list panel is ready.
Definition: IfxMultican.h:1629
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxMultican_MsgObjStat
Message object status bit-fields.
Definition: IfxMultican.h:234
IFXMULTICAN_NUM_MESSAGE_OBJECTS
#define IFXMULTICAN_NUM_MESSAGE_OBJECTS
Number of CAN message objects.
Definition: IfxMultican_cfg.h:48
IfxMultican_deinit
void IfxMultican_deinit(Ifx_CAN *mcan)
Reset the CAN module Reset and disable the CAN module, inclusive message object and node registers...
Definition: IfxMultican.c:1161
IfxMultican_Status_notInitialised
Definition: IfxMultican.h:195
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected
Receive transmit selected status flag.
Definition: IfxMultican.h:165
IfxMultican_MsgObjStatusFlag_transmitRequest
Transmit request status flag.
Definition: IfxMultican.h:167
IfxMultican_getIndex
IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican)
API to get the resource index of the CAN specified.
Definition: IfxMultican.c:1243
__abs
sint32 __abs(sint32) __attribute__((intrinsic_pseudo(1
IfxMultican_setListCommand
void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel.
Definition: IfxMultican.c:1228
IfxMultican_DataLengthCode_8
8 data bytes
Definition: IfxMultican.h:91
IfxMultican_Status_notSentBusy
Definition: IfxMultican.h:200
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
sint32
long sint32
Definition: Platform_Types.h:131
IfxMultican_MsgObj_doReadLongFrame
IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Do actual long frame reading from the message object.
Definition: IfxMultican.c:104
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxMultican_MsgObj_setFilter
void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter.
Definition: IfxMultican.c:564
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxMultican_DataLengthCode
IfxMultican_DataLengthCode
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.
Definition: IfxMultican.h:81
IfxMultican_getAddress
Ifx_CAN * IfxMultican_getAddress(IfxMultican_Index multican)
Definition: IfxMultican.c:1263
IfxMultican_getSrcPointer
volatile Ifx_SRC_SRCR * IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register.
Definition: IfxMultican.c:1203
IfxMultican_MsgObj_getPointer
IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register.
Definition: IfxMultican.h:1189
IfxMultican_MsgObj_deinit
void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object Append the message object to the end of idle list and reset message object r...
Definition: IfxMultican.c:85
IfxMultican_Status
IfxMultican_Status
CAN API status definition.
Definition: IfxMultican.h:192
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IFXMULTICAN_NUM_SRC
#define IFXMULTICAN_NUM_SRC
Number of service requests.
Definition: IfxMultican_cfg.h:56
IFXMULTICAN_NUM_MODULES
#define IFXMULTICAN_NUM_MODULES
Definition: IfxMultican_cfg.h:58
IfxMultican_DataLengthCode_16
16 data bytes
Definition: IfxMultican.h:93
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxMultican_MsgObj_sendMessage
IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:464
IfxMultican_Node_setNominalBitTiming
void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register.
Definition: IfxMultican.c:985
IfxMultican_DataLengthCode_24
24 data bytes
Definition: IfxMultican.h:95
IfxMultican_MsgObj_isExtendedFrame
IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.h:1195
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxMultican_Node_setBitTiming
void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register.
Definition: IfxMultican.c:668
IfxMultican_MsgObj_getStatusFlag
boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object.
Definition: IfxMultican.c:222


iLLD_TC26B: IfxMultican.h Source File

  • Multican
  • Std
IfxMultican.h
Go to the documentation of this file.
1 /**
2 * \file IfxMultican.h
3 * \brief MULTICAN basic functionality
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Multican_Std_Enum Enumerations
25 * \ingroup IfxLld_Multican_Std
26 * \defgroup IfxLld_Multican_Std_General General functions
27 * \ingroup IfxLld_Multican_Std
28 * \defgroup IfxLld_Multican_Std_Node CAN Nodes
29 * \ingroup IfxLld_Multican_Std
30 * \defgroup IfxLld_Multican_Std_Message Message
31 * \ingroup IfxLld_Multican_Std
32 * \defgroup IfxLld_Multican_Std_Message_Objects Message Objects
33 * \ingroup IfxLld_Multican_Std
34 * \defgroup IfxLld_Multican_Std_Interrupts Interrupts
35 * \ingroup IfxLld_Multican_Std
36 */
37
38 #ifndef IFXMULTICAN_H
39 #define IFXMULTICAN_H 1
40
41 /******************************************************************************/
42 /*----------------------------------Includes----------------------------------*/
43 /******************************************************************************/
44
45 #include "_Impl/IfxMultican_cfg.h"
46 #include "Src/Std/IfxSrc.h"
47 #include "_PinMap/IfxMultican_PinMap.h"
48 #include "Cpu/Std/IfxCpu_Intrinsics.h"
49 #include "IfxCan_bf.h"
50 #include "Scu/Std/IfxScuWdt.h"
51 #include "_Utilities/Ifx_Assert.h"
52 #include "_Utilities/Ifx_Assert.h"
53
54 /******************************************************************************/
55 /*------------------------------Type Definitions------------------------------*/
56 /******************************************************************************/
57
58 /** \brief Message object ID, 0 .. \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS
59 */
60 typedef sint32 IfxMultican_MsgObjId;
61
62 /******************************************************************************/
63 /*--------------------------------Enumerations--------------------------------*/
64 /******************************************************************************/
65
66 /** \addtogroup IfxLld_Multican_Std_Enum
67 * \{ */
68 /** \brief CAN input clock selection
69 */
70 typedef enum
71 {
72 IfxMultican_ClockSelect_noClock = 0, /**< \brief No clock supplied */
73 IfxMultican_ClockSelect_fclc = 1, /**< \brief fMULTICAN */
74 IfxMultican_ClockSelect_fosc0 = 2, /**< \brief Oscillator Clock */
75 IfxMultican_ClockSelect_fErayPll = 4 /**< \brief E-Ray clock */
76 } IfxMultican_ClockSelect;
77
78 /** \brief CAN frame data length code
79 * Definition in Ifx_CAN.MOFCRx.DLC
80 */
81 typedef enum
82 {
83 IfxMultican_DataLengthCode_0 = 0, /**< \brief 0 data bytes */
84 IfxMultican_DataLengthCode_1, /**< \brief 1 data bytes */
85 IfxMultican_DataLengthCode_2, /**< \brief 2 data bytes */
86 IfxMultican_DataLengthCode_3, /**< \brief 3 data bytes */
87 IfxMultican_DataLengthCode_4, /**< \brief 4 data bytes */
88 IfxMultican_DataLengthCode_5, /**< \brief 5 data bytes */
89 IfxMultican_DataLengthCode_6, /**< \brief 6 data bytes */
90 IfxMultican_DataLengthCode_7, /**< \brief 7 data bytes */
91 IfxMultican_DataLengthCode_8, /**< \brief 8 data bytes */
92 IfxMultican_DataLengthCode_12 = 9, /**< \brief 12 data bytes */
93 IfxMultican_DataLengthCode_16 = 10, /**< \brief 16 data bytes */
94 IfxMultican_DataLengthCode_20 = 11, /**< \brief 20 data bytes */
95 IfxMultican_DataLengthCode_24 = 12, /**< \brief 24 data bytes */
96 IfxMultican_DataLengthCode_32 = 13, /**< \brief 32 data bytes */
97 IfxMultican_DataLengthCode_48 = 14, /**< \brief 48 data bytes */
98 IfxMultican_DataLengthCode_64 = 15 /**< \brief 64 data bytes */
99 } IfxMultican_DataLengthCode;
100
101 /** \brief CAN frame type
102 */
103 typedef enum
104 {
105 IfxMultican_Frame_receive, /**< \brief Data frame is received */
106 IfxMultican_Frame_transmit, /**< \brief Data frame is generated */
107 IfxMultican_Frame_remoteRequest, /**< \brief Remote request frame is generated */
108 IfxMultican_Frame_remoteAnswer /**< \brief Answer frame is generated on reception of the corresponding remote request */
109 } IfxMultican_Frame;
110
111 /** \brief Determines the operation mode of the frame counter\n
112 * Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id)
113 */
114 typedef enum
115 {
116 IfxMultican_FrameCounterMode_frameCountMode = 0, /**< \brief The frame counter is incremented
117 * upon the reception and transmission of frames */
118 IfxMultican_FrameCounterMode_timeStampMode = 1, /**< \brief The frame counter is used to count
119 * bit times. */
120 IfxMultican_FrameCounterMode_bitTimingMode = 2, /**< \brief The frame counter is used for
121 * analysis of the bit timing. */
122 IfxMultican_FrameCounterMode_errorCountMode = 3 /**< \brief The frame counter is used for
123 * counting when an error frame is received or an error is
124 * detected by the node. */
125 } IfxMultican_FrameCounterMode;
126
127 /** \brief CAN message object group\n
128 * Each group consists of 32 consecutive message objects
129 */
130 typedef enum
131 {
132 IfxMultican_MsgObjGroup_0 = 0,
133 IfxMultican_MsgObjGroup_1,
134 IfxMultican_MsgObjGroup_2,
135 IfxMultican_MsgObjGroup_3,
136 IfxMultican_MsgObjGroup_4,
137 IfxMultican_MsgObjGroup_5,
138 IfxMultican_MsgObjGroup_6,
139 IfxMultican_MsgObjGroup_7
140 } IfxMultican_MsgObjGroup;
141
142 /** \brief CAN Message Object Mode
143 */
144 typedef enum
145 {
146 IfxMultican_MsgObjMode_standard = 0, /**< \brief Standard Message Object */
147 IfxMultican_MsgObjMode_receiveFifoBase = 1, /**< \brief Receive FIFO Base Object */
148 IfxMultican_MsgObjMode_transmitFifoBase = 2, /**< \brief Transmit FIFO Base Object */
149 IfxMultican_MsgObjMode_transmitFifoSlave = 3, /**< \brief Transmit FIFO Slave Object */
150 IfxMultican_MsgObjMode_gatewaySource = 4, /**< \brief Gateway Source Object */
151 IfxMultican_MsgObjMode_canFD64 = 5 /**< \brief CANFD 64 bytes Message Mode */
152 } IfxMultican_MsgObjMode;
153
154 /** \brief CAN Message Object status flag
155 * Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs)
156 */
157 typedef enum
158 {
159 IfxMultican_MsgObjStatusFlag_receivePending = IFX_CAN_MO_STAT_RXPND_OFF, /**< \brief Receive pending status flag */
160 IfxMultican_MsgObjStatusFlag_transmitPending = IFX_CAN_MO_STAT_TXPND_OFF, /**< \brief Transmit pending status flag */
161 IfxMultican_MsgObjStatusFlag_receiveUpdating = IFX_CAN_MO_STAT_RXUPD_OFF, /**< \brief Receive updating status flag */
162 IfxMultican_MsgObjStatusFlag_newData = IFX_CAN_MO_STAT_NEWDAT_OFF, /**< \brief New data status flag */
163 IfxMultican_MsgObjStatusFlag_messageLost = IFX_CAN_MO_STAT_MSGLST_OFF, /**< \brief Message lost status flag */
164 IfxMultican_MsgObjStatusFlag_messageValid = IFX_CAN_MO_STAT_MSGVAL_OFF, /**< \brief Message valid status flag */
165 IfxMultican_MsgObjStatusFlag_receiveTransmitSelected = IFX_CAN_MO_STAT_RTSEL_OFF, /**< \brief Receive transmit selected status flag */
166 IfxMultican_MsgObjStatusFlag_receiveEnable = IFX_CAN_MO_STAT_RXEN_OFF, /**< \brief Receive enable status flag */
167 IfxMultican_MsgObjStatusFlag_transmitRequest = IFX_CAN_MO_STAT_TXRQ_OFF, /**< \brief Transmit request status flag */
168 IfxMultican_MsgObjStatusFlag_transmitEnable0 = IFX_CAN_MO_STAT_TXEN0_OFF, /**< \brief Transmit enable 0 status flag */
169 IfxMultican_MsgObjStatusFlag_transmitEnable1 = IFX_CAN_MO_STAT_TXEN1_OFF, /**< \brief Transmit enable 1 status flag */
170 IfxMultican_MsgObjStatusFlag_messageDirection = IFX_CAN_MO_STAT_DIR_OFF /**< \brief Message direction status flag */
171 } IfxMultican_MsgObjStatusFlag;
172
173 /** \brief CAN priorities
174 */
175 typedef enum
176 {
177 IfxMultican_Priority_ListOrder = 1, /**< \brief List order */
178 IfxMultican_Priority_CAN_ID = 2 /**< \brief CAN ID */
179 } IfxMultican_Priority;
180
181 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
182 * Definition in Ifx_CAN.CLC.B.EDIS
183 */
184 typedef enum
185 {
186 IfxMultican_SleepMode_enable = 0, /**< \brief enables sleep mode */
187 IfxMultican_SleepMode_disable = 1 /**< \brief disables sleep mode */
188 } IfxMultican_SleepMode;
189
190 /** \brief CAN API status definition
191 */
192 typedef enum
193 {
194 IfxMultican_Status_ok = 0x00000000,
195 IfxMultican_Status_notInitialised = 0x00000001,
196 IfxMultican_Status_wrongParam = 0x00000002,
197 IfxMultican_Status_wrongPin = 0x00000004,
198 IfxMultican_Status_busHeavy = 0x00000008,
199 IfxMultican_Status_busOff = 0x00000010,
200 IfxMultican_Status_notSentBusy = 0x00000020,
201 IfxMultican_Status_receiveEmpty = 0x00000040,
202 IfxMultican_Status_messageLost = 0x00000080,
203 IfxMultican_Status_newData = 0x00000100,
204 IfxMultican_Status_newDataButOneLost = IfxMultican_Status_messageLost | IfxMultican_Status_newData
205 } IfxMultican_Status;
206
207 /** \brief OCDS Suspend Control (OCDS.SUS)
208 */
209 typedef enum
210 {
211 IfxMultican_SuspendMode_none = 0, /**< \brief No suspend */
212 IfxMultican_SuspendMode_hard = 1, /**< \brief Hard Suspend */
213 IfxMultican_SuspendMode_soft = 2 /**< \brief Soft Suspend */
214 } IfxMultican_SuspendMode;
215
216 /** \} */
217
218 /******************************************************************************/
219 /*-----------------------------Data Structures--------------------------------*/
220 /******************************************************************************/
221
222 /** \brief CAN message definition
223 */
224 typedef struct
225 {
226 uint32 id; /**< \brief CAN message ID */
227 IfxMultican_DataLengthCode lengthCode; /**< \brief CAN message data length code */
228 uint32 data[2]; /**< \brief CAN message data */
229 boolean fastBitRate; /**< \brief CAN FD fast bit rate enable/disable */
230 } IfxMultican_Message;
231
232 /** \brief Message object status bit-fields
233 */
234 typedef union
235 {
236 Ifx_CAN_MO_STAT_Bits B;
237 unsigned int U;
238 } IfxMultican_MsgObjStat;
239
240 /** \addtogroup IfxLld_Multican_Std_General
241 * \{ */
242
243 /******************************************************************************/
244 /*-------------------------Inline Function Prototypes-------------------------*/
245 /******************************************************************************/
246
247 /** \brief clears the message pending interrupt notification of a given list
248 * \param mcan mcan Specifies the CAN module
249 * \return None
250 */
251 IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan);
252
253 /** \brief clears the message pending interrupt notification of a given list
254 * \param mcan mcan Specifies the CAN module
255 * \param list List number
256 * \return None
257 */
258 IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list);
259
260 /** \brief Disables the module (sets the disable request)
261 * \param mcan mcan Specifies the CAN module
262 * \return None
263 */
264 IFX_INLINE void IfxMultican_disableModule(Ifx_CAN *mcan);
265
266 /** \brief Disregards the sleep mode of the module
267 * \param mcan mcan Specifies the CAN module
268 * \return None
269 */
270 IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan);
271
272 /** \brief Enables the module (clears the disable request)
273 * \param mcan mcan Specifies the CAN module
274 * \return None
275 */
276 IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan);
277
278 /** \brief Enables the sleep mode of the module
279 * \param mcan mcan Specifies the CAN module
280 * \return None
281 */
282 IFX_INLINE void IfxMultican_enableSleepMode(Ifx_CAN *mcan);
283
284 /** \brief Returns the selected fractional divider mode
285 * \param mcan mcan Specifies the CAN module
286 * \return Divider mode
287 */
288 IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan);
289
290 /** \brief Returns the reload or addition value for the result.
291 * \param mcan mcan Specifies the CAN module
292 * \return Step Value
293 */
294 IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan);
295
296 /** \brief Returns the selected input clock source
297 * \param mcan mcan Specifies the CAN module
298 * \return Clock selection
299 */
300 IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan);
301
302 /** \brief Returns the status of module enabled or disabled
303 * \param mcan mcan Specifies the CAN module
304 * \return Status (TRUE / FALSE)
305 */
306 IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan);
307
308 /** \brief sets the fractional divider mode
309 * \param mcan mcan Specifies the CAN module
310 * \param mode Divider mode
311 * \return None
312 */
313 IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode);
314
315 /** \brief sets reload or addition value for the result.
316 * \param mcan mcan Specifies the CAN module
317 * \param stepValue Step Value
318 * \return None
319 */
320 IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue);
321
322 /** \brief Sets the input clock source
323 * \param mcan mcan Specifies the CAN module
324 * \param clockSelect Clock selection
325 * \return None
326 */
327 IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect);
328
329 /** \brief clears the message pending interrupt notification of a given list
330 * \param mcan mcan Specifies the CAN module
331 * \param mask Message Index mask
332 * \return None
333 */
334 IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask);
335
336 /** \brief Sets the sensitivity of the module to sleep signal
337 * \param can pointer to CAN registers
338 * \param mode mode selection (enable / disable)
339 * \return None
340 */
341 IFX_INLINE void IfxMultican_setSleepMode(Ifx_CAN *can, IfxMultican_SleepMode mode);
342
343 /** \brief Wait until the list panel is ready
344 * \param mcan mcan Specifies the CAN module
345 * \return None
346 */
347 IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan);
348
349 /** \brief Returns the module's suspend state.
350 * TRUE :if module is suspended.
351 * FALSE:if module is not yet suspended.
352 * \param mcan Pointer to MULTICAN module registers
353 * \return Suspend status (TRUE / FALSE)
354 */
355 IFX_INLINE boolean IfxMultican_isModuleSuspended(Ifx_CAN *mcan);
356
357 /** \brief Set the Module to Hard/Soft suspend mode.
358 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
359 * \param mcan Pointer to MULTICAN module registers
360 * \param mode Module suspend mode
361 * \return None
362 */
363 IFX_INLINE void IfxMultican_setSuspendMode(Ifx_CAN *mcan, IfxMultican_SuspendMode mode);
364
365 /******************************************************************************/
366 /*-------------------------Global Function Prototypes-------------------------*/
367 /******************************************************************************/
368
369 /** \brief Calculates the best posible values and configures FBTR register
370 * \param hwNode Pointer to CAN Node registers
371 * \param moduleFreq Specifies the CAN module frequency
372 * \param baudrate Specifies the node baud rate. Unit: baud
373 * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
374 * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
375 * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
376 * \return None
377 */
378 IFX_EXTERN void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
379
380 /** \brief Calculates the best posible values and configures BTEVR register
381 * \param hwNode Pointer to CAN Node registers
382 * \param moduleFreq Specifies the CAN module frequency
383 * \param baudrate Specifies the node baud rate. Unit: baud
384 * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
385 * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
386 * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
387 * \return None
388 */
389 IFX_EXTERN void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
390
391 /** \brief Reset the CAN module\n
392 * Reset and disable the CAN module, inclusive message object and node registers.
393 * \param mcan Specifies the CAN module
394 * \return None
395 */
396 IFX_EXTERN void IfxMultican_deinit(Ifx_CAN *mcan);
397
398 /** \brief resets Multican kernel
399 * \param can pointer to CAN registers
400 * \return None
401 */
402 IFX_EXTERN void IfxMultican_resetModule(Ifx_CAN *can);
403
404 /** \brief Execute a command from the command panel
405 * \param mcan Specifies the CAN module
406 * \param cmd Specifies the command
407 * \param arg2 Specifies the second argument
408 * \param arg1 Specifies the first argument
409 * \return None
410 */
411 IFX_EXTERN void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1);
412
413 /** \brief API to get the resource index of the CAN specified.
414 * \return multican resource index
415 */
416 IFX_EXTERN IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican);
417
418 /**
419 * \param multican Module index of the MULTICAN
420 * \return MULTICAN module register address
421 */
422 IFX_EXTERN Ifx_CAN *IfxMultican_getAddress(IfxMultican_Index multican);
423
424 /** \} */
425
426 /** \addtogroup IfxLld_Multican_Std_Node
427 * \{ */
428
429 /******************************************************************************/
430 /*-------------------------Inline Function Prototypes-------------------------*/
431 /******************************************************************************/
432
433 /** \brief Activate the CAN Node. Participate in the CAN bus activities
434 * \param hwNode Pointer to CAN Node registers
435 * \return None
436 */
437 IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode);
438
439 /** \brief Deactivate the CAN Node. Take out from participation in the CAN bus activities
440 * \param hwNode Pointer to CAN Node registers
441 * \return None
442 */
443 IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode);
444
445 /** \brief Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
446 * \param hwNode Pointer to CAN Node registers
447 * \return None
448 */
449 IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode);
450
451 /** \brief Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
452 * \param hwNode Pointer to CAN Node registers
453 * \return None
454 */
455 IFX_INLINE void IfxMultican_Node_enableConfigurationChange(Ifx_CAN_N *hwNode);
456
457 /** \brief Returns the base address to a given CAN node number
458 * \param mcan Specifies the CAN module
459 * \param node Specifies the CAN node
460 * \return base pointer to CAN node
461 */
462 IFX_INLINE Ifx_CAN_N *IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node);
463
464 /** \brief Resets the control register of CAN Node x.
465 * \param hwNode Pointer to CAN Node registers
466 * \return None
467 */
468 IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode);
469
470 /** \brief Resets the error counters of CAN Node x.
471 * \param hwNode Pointer to CAN Node registers
472 * \return None
473 */
474 IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode);
475
476 /** \brief Resets the interrupt pointers of CAN Node x.
477 * \param hwNode Pointer to CAN Node registers
478 * \return None
479 */
480 IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode);
481
482 /** \brief Enables / Disables the alert interrupt of CAN node x.
483 * \param hwNode Pointer to CAN Node registers
484 * \param enabled Enable / disable choice
485 * \return None
486 */
487 IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
488
489 /** \brief Selects the interrupt output line INT_Om
490 * (m = 0-15) for an alert interrupt of CAN Node x.
491 * \param hwNode Pointer to CAN Node registers
492 * \param srcId Service request ID
493 * \return None
494 */
495 IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
496
497 /** \brief Enables / Disables the analyzer mode of CAN node x.
498 * \param hwNode Pointer to CAN Node registers
499 * \param mode Enable / disable choice
500 * \return None
501 */
502 IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode);
503
504 /** \brief Determines the threshold value (warning level, default 96) to be reached\n
505 * in order to set the corresponding error warning bit EWRN.
506 * \param hwNode Pointer to CAN Node registers
507 * \param level Error warning level
508 * \return None
509 */
510 IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level);
511
512 /** \brief Enables / Disables the flexible data rate of CAN node x.
513 * \param hwNode Pointer to CAN Node registers
514 * \param enabled Enable / disable choice
515 * \return None
516 */
517 IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled);
518
519 /** \brief Enables / Disables the CAN frame counter overflow interrupt of CAN node x.
520 * \param hwNode Pointer to CAN Node registers
521 * \param enabled Enable / disable choice
522 * \return None
523 */
524 IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
525
526 /** \brief Selects the interrupt output line INT_Om
527 * (m = 0-15) for a frame counter overflow interrupt of CAN Node x.
528 * \param hwNode Pointer to CAN Node registers
529 * \param srcId Service request ID
530 * \return None
531 */
532 IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
533
534 /** \brief Sets the operation mode of the frame counter of the CAN Node x
535 * \param hwNode Pointer to CAN Node registers
536 * \param mode Determines the operation mode of the frame counter
537 * \return None
538 */
539 IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode);
540
541 /** \brief Enables / Disables the last error code interrupt of CAN node x. \n
542 * This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error).
543 * \param hwNode Pointer to CAN Node registers
544 * \param enabled Enable / disable choice
545 * \return None
546 */
547 IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
548
549 /** \brief Selects the interrupt output line INT_Om
550 * (m = 0-15) for an LEC interrupt of CAN Node x.
551 * \param hwNode Pointer to CAN Node registers
552 * \param srcId Service request ID
553 * \return None
554 */
555 IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
556
557 /** \brief Enables / Disables the loopback mode of CAN node x.
558 * \param hwNode Pointer to CAN Node registers
559 * \param mode Enable / disable choice
560 * \return None
561 */
562 IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode);
563
564 /** \brief Sets the value of the receive error counter of CAN node x.
565 * \param hwNode Pointer to CAN Node registers
566 * \param value Receive error counter value
567 * \return None
568 */
569 IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value);
570
571 /** \brief Selects the interrupt output line INT_Om
572 * (m = 0-15) for a timer event interrupt of CAN Node x.
573 * \param hwNode Pointer to CAN Node registers
574 * \param srcId Service request ID
575 * \return None
576 */
577 IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
578
579 /** \brief Enables / Disables the transceiver delay compensation of CAN node x.
580 * \param hwNode Pointer to CAN Node registers
581 * \param enabled Enable / disable choice
582 * \return None
583 */
584 IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled);
585
586 /** \brief Sets transceiver delay ompensation offset of CAN node x.
587 * \param hwNode Pointer to CAN Node registers
588 * \param value transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15]
589 * \return None
590 */
591 IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value);
592
593 /** \brief Enables / Disables the transfer interrupt of CAN node x. \n
594 * This interrupt is generated after the successful reception or transmission of a CAN frame in node x
595 * \param hwNode Pointer to CAN Node registers
596 * \param enabled Enable / disable choice
597 * \return None
598 */
599 IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
600
601 /** \brief Selects the interrupt output line INT_Om
602 * (m = 0-15) for a transfer OK interrupt of CAN Node x.
603 * \param hwNode Pointer to CAN Node registers
604 * \param srcId Service request ID
605 * \return None
606 */
607 IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
608
609 /** \brief Sets the value of the transmit error counter of CAN node x.
610 * \param hwNode Pointer to CAN Node registers
611 * \param value Transmit error counter value
612 * \return None
613 */
614 IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value);
615
616 /** \brief Return the DLC code corresponding to the data length in byte
617 * \param dataLength Data length in bytes
618 * \return Data length code
619 */
620 IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength(uint32 dataLength);
621
622 /** \brief Get the datalength in bytes from DLC
623 * \param code Data length code
624 * \return Datalength in bytes
625 */
626 IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode(IfxMultican_DataLengthCode code);
627
628 /******************************************************************************/
629 /*-------------------------Global Function Prototypes-------------------------*/
630 /******************************************************************************/
631
632 /** \brief Reset the CAN node
633 * \param hwNode Pointer to CAN Node registers
634 * \return None
635 */
636 IFX_EXTERN void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode);
637
638 /** \brief Select and initialise the CAN node receive pin
639 * \param hwNode Pointer to CAN Node registers
640 * \param rxd Rx pin
641 * \param mode Input mode
642 * \return TRUE: Returns TRUE if the operation was successful\n
643 * FALSE: Returns FALSE if the operation was errorneous
644 */
645 IFX_EXTERN boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver);
646
647 /** \brief Select and initialise the CAN node transmit pin
648 * \param hwNode Pointer to CAN Node registers
649 * \param txd Tx pin
650 * \param mode Output mode
651 * \return TRUE: Returns TRUE if the operation was successful\n
652 * FALSE: Returns FALSE if the operation was errorneous
653 */
654 IFX_EXTERN boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver);
655
656 /** \brief Recovers the CAN node from bus off
657 * \param hwNode Pointer to CAN Node registers
658 * \return Status
659 */
660 IFX_EXTERN IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode);
661
662 /** \brief Calculates the best posible values and configures BTR register
663 * \param hwNode Pointer to CAN Node registers
664 * \param moduleFreq Specifies the CAN module frequency
665 * \param baudrate Specifies the node baud rate. Unit: baud
666 * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
667 * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
668 * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
669 * \return None
670 */
671 IFX_EXTERN void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
672
673 /** \brief Returns the CAN node timing
674 * \param moduleFreq Specifies the CAN module frequency
675 * \param btr BTR
676 * \param baudrate Baudrate
677 * \param samplePoint Sample point
678 * \param synchJumpWidth Sync Jump Width
679 * \return None
680 */
681 IFX_EXTERN void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth);
682
683 /** \} */
684
685 /** \addtogroup IfxLld_Multican_Std_Message
686 * \{ */
687
688 /******************************************************************************/
689 /*-------------------------Inline Function Prototypes-------------------------*/
690 /******************************************************************************/
691
692 /** \brief Initializes a CAN message
693 * \param msg The message which should be initialized
694 * \param id The message ID
695 * \param dataLow The lower part of the 64bit data value
696 * \param dataHigh The upper part of the 64bit data value
697 * \param lengthCode number of bytes (data length code) which should be transmitted (0..8)
698 * \return None
699 */
700 IFX_INLINE void IfxMultican_Message_init(IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode);
701
702 /** \brief Initializes a CAN message long frame
703 * \param msg The message which should be initialized
704 * \param id The message ID
705 * \param lengthCode number of bytes (data length code) which should be transmitted (0..8)
706 * \param fastBitRate Fast bit rate (FCR.BRS) enable/ disable choice
707 * \return None
708 */
709 IFX_INLINE void IfxMultican_Message_longFrameInit(IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate);
710
711 /** \} */
712
713 /** \addtogroup IfxLld_Multican_Std_Message_Objects
714 * \{ */
715
716 /******************************************************************************/
717 /*-------------------------Inline Function Prototypes-------------------------*/
718 /******************************************************************************/
719
720 /** \brief Sets priority class of message object
721 * \param hwObj Pointer to CAN message object registers
722 * \return None
723 */
724 IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj);
725
726 /** \brief Clears the FIFO/GateWay pointers of a message object
727 * \param hwObj Pointer to CAN message object registers
728 * \return None
729 */
730 IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj);
731
732 /** \brief Clear the RX pending flag of a message object
733 * \param hwObj Pointer to CAN message object registers
734 * \return None
735 */
736 IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj);
737
738 /** \brief Clear the TX pending flag of a message object
739 * \param hwObj Pointer to CAN message object registers
740 * \return None
741 */
742 IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj);
743
744 /** \brief Gets bottom object pointer of the base message object
745 * \param hwObj Pointer to CAN message object registers
746 * \return Bottom message object number
747 */
748 IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj);
749
750 /** \brief Gets data length code of a message object
751 * \param hwObj Pointer to CAN message object registers
752 * \return CAN frame data length code
753 */
754 IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj);
755
756 /** \brief Gets message identifier of message object
757 * \param hwObj Pointer to CAN message object registers
758 * \return messageId
759 */
760 IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj);
761
762 /** \brief Returns next object pointer (PNEXT) of the current message object
763 * \param hwObj Pointer to CAN message object registers
764 * \return Next message object number
765 */
766 IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer(Ifx_CAN_MO *hwObj);
767
768 /** \brief Get base address of a message object register
769 * \param mcan Specifies the CAN module
770 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
771 * \return Pointer to Message Object registers
772 */
773 IFX_INLINE Ifx_CAN_MO *IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId);
774
775 /** \brief Get the message object status
776 * \param hwObj Pointer to CAN message object registers
777 * \return Extended frame: True
778 * Standard frame: False
779 */
780 IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj);
781
782 /** \brief Returns the RX pending flag of a message object.
783 * \param hwObj Pointer to CAN message object registers
784 * \return TRUE of the RX pending flag of a message object is set
785 */
786 IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj);
787
788 /** \brief Returns the TX Request flag of a message object.
789 * \param hwObj Pointer to CAN message object registers
790 * \return TRUE of the TX Request flag of a message object is set
791 */
792 IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj);
793
794 /** \brief Returns the TX pending flag of a message object.
795 * \param hwObj Pointer to CAN message object registers
796 * \return TRUE of the TX pending flag of a message object is set
797 */
798 IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj);
799
800 /** \brief Sets acceptance mask for the message identifier
801 * \param hwObj Pointer to CAN message object registers
802 * \param mask Acceptance Mask for the message identifier
803 * \param extendedFrame Extended frame enabled / disabled
804 * \return None
805 */
806 IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame);
807
808 /** \brief Enable / Disable bit rate switch of a message object
809 * \param hwObj Pointer to CAN message object registers
810 * \param enabled Enable / disable choice
811 * \return None
812 */
813 IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled);
814
815 /** \brief Sets bottom object pointer of the base message object
816 * \param hwObj Pointer to CAN message object registers
817 * \param objNumber Bottom message object number
818 * \return None
819 */
820 IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
821
822 /** \brief Sets bottom current pointer of the base message object
823 * \param hwObj Pointer to CAN message object registers
824 * \param objNumber Current message object number
825 * \return None
826 */
827 IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
828
829 /** \brief Enable / Disable data copy of a gateway source message object
830 * \param hwObj Pointer to CAN message object registers
831 * \param enabled Enable / disable choice
832 * \return None
833 */
834 IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled);
835
836 /** \brief Sets data length code of a message object
837 * \param hwObj Pointer to CAN message object registers
838 * \param code CAN frame data length code
839 * \return None
840 */
841 IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code);
842
843 /** \brief Enable / Disable data length code copy of a gateway source message object
844 * \param hwObj Pointer to CAN message object registers
845 * \param enabled Enable / disable choice
846 * \return None
847 */
848 IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled);
849
850 /** \brief Enable / Disable extended data length of a message object
851 * \param hwObj Pointer to CAN message object registers
852 * \param enabled Enable / disable choice
853 * \return None
854 */
855 IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled);
856
857 /** \brief Enable / Disable gateway data frame send of a gateway source message object
858 * which in turn sets the TXRQ of the gateway deatination object
859 * \param hwObj Pointer to CAN message object registers
860 * \param enabled Enable / disable choice
861 * \return None
862 */
863 IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled);
864
865 /** \brief Enable / Disable identifier copy of a gateway source message object
866 * \param hwObj Pointer to CAN message object registers
867 * \param enabled Enable / disable choice
868 * \return None
869 */
870 IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled);
871
872 /** \brief Sets identifier extension of message object
873 * \param hwObj Pointer to CAN message object registers
874 * \param extension Acceptance Mask for the message IDE bit
875 * \return None
876 */
877 IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension);
878
879 /** \brief Sets acceptance mask for the message IDE bit
880 * \param hwObj Pointer to CAN message object registers
881 * \param matchingId Acceptance Mask for the message IDE bit
882 * \return None
883 */
884 IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId);
885
886 /** \brief Sets message identifier of message object
887 * \param hwObj Pointer to CAN message object registers
888 * \param messageId CAN Identifier of message object
889 * \param extendedFrame Extended frame enabled / disabled
890 * \return None
891 */
892 IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame);
893
894 /** \brief Sets the message mode of a message object
895 * \param hwObj Pointer to CAN message object registers
896 * \param mode CAN Message Object Mode
897 * \return None
898 */
899 IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode);
900
901 /** \brief Sets message pending number that selects the bit position of the bit in the Message Pending Register\n
902 * that is set upon a message object n receive/transmit interrupt
903 * \param hwObj Pointer to CAN message object registers
904 * \param messageNumber Message pending number
905 * \return None
906 */
907 IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber);
908
909 /** \brief Enable / Disable overflow interrupt of a message object
910 * \param hwObj Pointer to CAN message object registers
911 * \param enabled Enable / disable choice
912 * \return None
913 */
914 IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
915
916 /** \brief Sets priority class of message object
917 * \param hwObj Pointer to CAN message object registers
918 * \param priority One of the priority classes 0, 1, 2, 3 to message object n
919 * \return None
920 */
921 IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority);
922
923 /** \brief Enable / Disable receive interrupt of a message object
924 * \param hwObj Pointer to CAN message object registers
925 * \param enabled Enable / disable choice
926 * \return None
927 */
928 IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
929
930 /** \brief Sets receive interrupt node pointer of message object
931 * \param hwObj Pointer to CAN message object registers
932 * \param srcId Service request ID
933 * \return None
934 */
935 IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId);
936
937 /** \brief Enable / Disable transmit object remote monitoring of a message object
938 * \param hwObj Pointer to CAN message object registers
939 * \param enabled Enable / disable choice
940 * \return None
941 */
942 IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled);
943
944 /** \brief Sets bottom object select pointer of the base message object
945 * \param hwObj Pointer to CAN message object registers
946 * \param objNumber Select message object number
947 * \return None
948 */
949 IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
950
951 /** \brief Enable / Disable single data transfer of a message object
952 * \param hwObj Pointer to CAN message object registers
953 * \param enabled Enable / disable choice
954 * \return None
955 */
956 IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled);
957
958 /** \brief Enable / Disable single transmit trial of a message object
959 * \param hwObj Pointer to CAN message object registers
960 * \param enabled Enable / disable choice
961 * \return None
962 */
963 IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled);
964
965 /** \brief Sets top object pointer of the base message object
966 * \param hwObj Pointer to CAN message object registers
967 * \param objNumber Top message object number
968 * \return None
969 */
970 IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
971
972 /** \brief Enable / Disable transmit interrupt of a message object
973 * \param hwObj Pointer to CAN message object registers
974 * \param enabled Enable / disable choice
975 * \return None
976 */
977 IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
978
979 /** \brief Sets transmit interrupt node pointer of message object
980 * \param hwObj Pointer to CAN message object registers
981 * \param srcId Service request ID
982 * \return None
983 */
984 IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId);
985
986 /******************************************************************************/
987 /*-------------------------Global Function Prototypes-------------------------*/
988 /******************************************************************************/
989
990 /** \brief Cancel pending TX request by invalidating the request, only when frame transmission has not been started.
991 * \param hwObj Pointer to CAN message object registers
992 * \return TRUE if cancellation was successfully executed
993 */
994 IFX_EXTERN boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj);
995
996 /** \brief Clears the selected status flag of a message object
997 * \param hwObj Pointer to CAN message object registers
998 * \param flag Message Object status flag
999 * \return None
1000 */
1001 IFX_EXTERN void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
1002
1003 /** \brief Reset the message object\n
1004 * Append the message object to the end of idle list and reset message object registers
1005 * \param mcan Specifies the CAN module
1006 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
1007 * \return None
1008 */
1009 IFX_EXTERN void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId);
1010
1011 /** \brief Get message object ID which has TX/RX pending flag from a message object group
1012 * \param mcan Specifies the CAN module
1013 * \param msgObjGroup Message object group
1014 * \return Message object index
1015 */
1016 IFX_EXTERN IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup);
1017
1018 /** \brief Get the message object status
1019 * \param hwObj Pointer to CAN message object registers
1020 * \return \ref IfxMultican_MsgObjStat bitfield
1021 */
1022 IFX_EXTERN IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj);
1023
1024 /** \brief Gets the status of the selected status flag of a message object
1025 * \param hwObj Pointer to CAN message object registers
1026 * \param flag Message Object status flag
1027 * \return Status (TRUE / FALSE)
1028 */
1029 IFX_EXTERN boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
1030
1031 /** \brief Read a received CAN long frame
1032 * \param mcan Specifies the CAN module
1033 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
1034 * \param msg The message which should be initialized
1035 * \param data Pointer to data (in words)
1036 * \return IfxMultican_Status_newData: if the operation was successful\n
1037 * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
1038 * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
1039 * IfxMultican_Status_receiveEmpty: if no message is been received
1040 */
1041 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
1042
1043 /** \brief Read a received CAN message
1044 * \param hwObj Pointer to CAN message object registers
1045 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
1046 * \return IfxMultican_Status_newData: if the operation was successful\n
1047 * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
1048 * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
1049 * IfxMultican_Status_receiveEmpty: if no message is been received
1050 */
1051 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg);
1052
1053 /** \brief Send a CAN Long frame message
1054 * \param mcan Specifies the CAN module
1055 * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
1056 * \param msg The message which should be initialized
1057 * \param data Pointer to data (in words)
1058 * \return IfxMultican_Status_ok: if the operation was successful
1059 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1060 */
1061 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
1062
1063 /** \brief Send a CAN message
1064 * \param hwObj Pointer to CAN message object registers
1065 * \param msg Specifies the message to be send
1066 * \return IfxMultican_Status_ok: if the operation was successful
1067 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1068 */
1069 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg);
1070
1071 /** \brief Send a CAN message
1072 * \param hwObj Pointer to CAN message object registers
1073 * \param msg Specifies the message to be send
1074 * \return IfxMultican_Status_ok: if the operation was successful
1075 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1076 */
1077 IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg);
1078
1079 /** \brief Set message object filter
1080 * \param hwObj Pointer to CAN message object registers
1081 * \param extend TRUE/FALSE : extended ID
1082 * \param id ID
1083 * \param accMask acceptance mask
1084 * \return None
1085 */
1086 IFX_EXTERN void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask);
1087
1088 /** \brief Sets the selected status flag of a message object
1089 * \param hwObj Pointer to CAN message object registers
1090 * \param flag Message Object status flag
1091 * \return None
1092 */
1093 IFX_EXTERN void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
1094
1095 /** \} */
1096
1097 /** \addtogroup IfxLld_Multican_Std_Interrupts
1098 * \{ */
1099
1100 /******************************************************************************/
1101 /*-------------------------Global Function Prototypes-------------------------*/
1102 /******************************************************************************/
1103
1104 /** \brief Get the interrupt source register
1105 * \param mcan Specifies the CAN module
1106 * \param srcId Specifies the service request ID
1107 * \return Address of the interrupt source register\n
1108 */
1109 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId);
1110
1111 /** \} */
1112
1113 /******************************************************************************/
1114 /*---------------------Inline Function Implementations------------------------*/
1115 /******************************************************************************/
1116
1117 IFX_INLINE void IfxMultican_Message_init(IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
1118 {
1119 msg->id = id;
1120 msg->data[0] = dataLow;
1121 msg->data[1] = dataHigh;
1122 msg->lengthCode = lengthCode;
1123
1124 msg->fastBitRate = FALSE;
1125 }
1126
1127
1128 IFX_INLINE void IfxMultican_Message_longFrameInit(IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
1129 {
1130 msg->id = id;
1131 msg->data[0] = 0; /* not being used */
1132 msg->data[1] = 0; /* not being used */
1133 msg->lengthCode = lengthCode;
1134 msg->fastBitRate = fastBitRate;
1135 }
1136
1137
1138 IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj)
1139 {
1140 hwObj->DATAL.U = 0;
1141 hwObj->DATAH.U = 0;
1142 }
1143
1144
1145 IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj)
1146 {
1147 hwObj->FGPR.U = 0x0000000U;
1148 }
1149
1150
1151 IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
1152 {
1153 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receivePending);
1154 }
1155
1156
1157 IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj)
1158 {
1159 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitPending);
1160 }
1161
1162
1163 IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj)
1164 {
1165 return (IfxMultican_MsgObjId)(hwObj->FGPR.B.BOT);
1166 }
1167
1168
1169 IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj)
1170 {
1171 return (IfxMultican_DataLengthCode)(hwObj->FCR.B.DLC);
1172 }
1173
1174
1175 IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj)
1176 {
1177 Ifx_CAN_MO_AR ar;
1178 ar.U = hwObj->AR.U;
1179 return ar.B.ID >> ((ar.B.IDE != 0) ? 0 : 18);
1180 }
1181
1182
1183 IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer(Ifx_CAN_MO *hwObj)
1184 {
1185 return (IfxMultican_MsgObjId)(hwObj->STAT.B.PNEXT);
1186 }
1187
1188
1189 IFX_INLINE Ifx_CAN_MO *IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
1190 {
1191 return &(mcan->MO[msgObjId]);
1192 }
1193
1194
1195 IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj)
1196 {
1197 return hwObj->AR.B.IDE != 0;
1198 }
1199
1200
1201 IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj)
1202 {
1203 IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
1204 return msgStatus.B.RXPND ? TRUE : FALSE;
1205 }
1206
1207
1208 IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj)
1209 {
1210 IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
1211 return msgStatus.B.TXRQ ? TRUE : FALSE;
1212 }
1213
1214
1215 IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj)
1216 {
1217 IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
1218 return msgStatus.B.TXPND ? TRUE : FALSE;
1219 }
1220
1221
1222 IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
1223 {
1224 hwObj->AMR.B.AM = mask << ((extendedFrame != 0) ? 0 : 18);
1225 }
1226
1227
1228 IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
1229 {
1230 hwObj->FCR.B.BRS = enabled ? 1 : 0;
1231 }
1232
1233
1234 IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
1235 {
1236 hwObj->FGPR.B.BOT = objNumber;
1237 }
1238
1239
1240 IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
1241 {
1242 hwObj->FGPR.B.CUR = objNumber;
1243 }
1244
1245
1246 IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled)
1247 {
1248 hwObj->FCR.B.DATC = enabled ? 1 : 0;
1249 }
1250
1251
1252 IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
1253 {
1254 hwObj->FCR.B.DLC = code;
1255 }
1256
1257
1258 IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled)
1259 {
1260 hwObj->FCR.B.DLCC = enabled ? 1 : 0;
1261 }
1262
1263
1264 IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled)
1265 {
1266 hwObj->FCR.B.FDF = enabled ? 1 : 0;
1267 }
1268
1269
1270 IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled)
1271 {
1272 hwObj->FCR.B.GDFS = enabled ? 1 : 0;
1273 }
1274
1275
1276 IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled)
1277 {
1278 hwObj->FCR.B.IDC = enabled ? 1 : 0;
1279 }
1280
1281
1282 IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension)
1283 {
1284 hwObj->AR.B.IDE = extension;
1285 }
1286
1287
1288 IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId)
1289 {
1290 hwObj->AMR.B.MIDE = matchingId;
1291 }
1292
1293
1294 IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
1295 {
1296 hwObj->AR.B.ID = messageId << ((extendedFrame != 0) ? 0 : 18);
1297 }
1298
1299
1300 IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
1301 {
1302 hwObj->FCR.B.MMC = mode;
1303 }
1304
1305
1306 IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
1307 {
1308 hwObj->IPR.B.MPN = messageNumber;
1309 }
1310
1311
1312 IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
1313 {
1314 hwObj->FCR.B.OVIE = enabled ? 1 : 0;
1315 }
1316
1317
1318 IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
1319 {
1320 hwObj->AR.B.PRI = priority;
1321 }
1322
1323
1324 IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
1325 {
1326 hwObj->FCR.B.RXIE = enabled ? 1 : 0;
1327 }
1328
1329
1330 IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
1331 {
1332 hwObj->IPR.B.RXINP = srcId;
1333 }
1334
1335
1336 IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled)
1337 {
1338 hwObj->FCR.B.RMM = enabled ? 1 : 0;
1339 }
1340
1341
1342 IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
1343 {
1344 hwObj->FGPR.B.SEL = objNumber;
1345 }
1346
1347
1348 IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled)
1349 {
1350 hwObj->FCR.B.SDT = enabled ? 1 : 0;
1351 }
1352
1353
1354 IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled)
1355 {
1356 hwObj->FCR.B.STT = enabled ? 1 : 0;
1357 }
1358
1359
1360 IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
1361 {
1362 hwObj->FGPR.B.TOP = objNumber;
1363 }
1364
1365
1366 IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
1367 {
1368 hwObj->FCR.B.TXIE = enabled ? 1 : 0;
1369 }
1370
1371
1372 IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
1373 {
1374 hwObj->IPR.B.TXINP = srcId;
1375 }
1376
1377
1378 IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
1379 {
1380 hwNode->CR.B.INIT = 0;
1381 }
1382
1383
1384 IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
1385 {
1386 hwNode->CR.B.INIT = 1;
1387 }
1388
1389
1390 IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode)
1391 {
1392 hwNode->CR.B.CCE = 0U;
1393 }
1394
1395
1396 IFX_INLINE void IfxMultican_Node_enableConfigurationChange(Ifx_CAN_N *hwNode)
1397 {
1398 hwNode->CR.B.CCE = 1U;
1399 }
1400
1401
1402 IFX_INLINE Ifx_CAN_N *IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
1403 {
1404 return &(mcan->N[node]);
1405 }
1406
1407
1408 IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode)
1409 {
1410 hwNode->CR.U = 0x00000041U;
1411 }
1412
1413
1414 IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode)
1415 {
1416 hwNode->ECNT.U = 0x00600000U;
1417 }
1418
1419
1420 IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode)
1421 {
1422 hwNode->IPR.U = 0x00000000U;
1423 }
1424
1425
1426 IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
1427 {
1428 hwNode->CR.B.ALIE = enabled ? 1 : 0;
1429 }
1430
1431
1432 IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1433 {
1434 hwNode->IPR.B.ALINP = srcId;
1435 }
1436
1437
1438 IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode)
1439 {
1440 hwNode->CR.B.CALM = mode != FALSE;
1441 }
1442
1443
1444 IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level)
1445 {
1446 hwNode->ECNT.B.EWRNLVL = level;
1447 }
1448
1449
1450 IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled)
1451 {
1452 hwNode->CR.B.INIT = 1;
1453 hwNode->CR.B.FDEN = enabled ? 1 : 0;
1454 hwNode->CR.B.INIT = 0;
1455 }
1456
1457
1458 IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
1459 {
1460 hwNode->FCR.B.CFCIE = enabled ? 1 : 0;
1461 }
1462
1463
1464 IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1465 {
1466 hwNode->IPR.B.CFCINP = srcId;
1467 }
1468
1469
1470 IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
1471 {
1472 hwNode->FCR.B.CFMOD = mode;
1473 }
1474
1475
1476 IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
1477 {
1478 hwNode->CR.B.LECIE = enabled ? 1 : 0;
1479 }
1480
1481
1482 IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1483 {
1484 hwNode->IPR.B.LECINP = srcId;
1485 }
1486
1487
1488 IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode)
1489 {
1490 hwNode->PCR.B.LBM = mode != FALSE;
1491 }
1492
1493
1494 IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
1495 {
1496 hwNode->ECNT.B.REC = value;
1497 }
1498
1499
1500 IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1501 {
1502 hwNode->IPR.B.TEINP = srcId;
1503 }
1504
1505
1506 IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled)
1507 {
1508 hwNode->TDCR.B.TDC = enabled ? 1 : 0;
1509 }
1510
1511
1512 IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value)
1513 {
1514 hwNode->TDCR.B.TDCO = value;
1515 }
1516
1517
1518 IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
1519 {
1520 hwNode->CR.B.TRIE = enabled ? 1 : 0;
1521 }
1522
1523
1524 IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
1525 {
1526 hwNode->IPR.B.TRINP = srcId;
1527 }
1528
1529
1530 IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
1531 {
1532 hwNode->ECNT.B.TEC = value;
1533 }
1534
1535
1536 IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan)
1537 {
1538 mcan->MCR.B.MPSEL = 0x0U;
1539 }
1540
1541
1542 IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list)
1543 {
1544 mcan->MSPND[list].U = 0x0;
1545 }
1546
1547
1548 IFX_INLINE void IfxMultican_disableModule(Ifx_CAN *mcan)
1549 {
1550 mcan->CLC.B.DISR = 1U;
1551 }
1552
1553
1554 IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan)
1555 {
1556 mcan->CLC.B.EDIS = 1U;
1557 }
1558
1559
1560 IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan)
1561 {
1562 mcan->CLC.B.DISR = 0U;
1563 }
1564
1565
1566 IFX_INLINE void IfxMultican_enableSleepMode(Ifx_CAN *mcan)
1567 {
1568 mcan->CLC.B.EDIS = 0U;
1569 }
1570
1571
1572 IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan)
1573 {
1574 return mcan->FDR.B.DM;
1575 }
1576
1577
1578 IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan)
1579 {
1580 return mcan->FDR.B.STEP;
1581 }
1582
1583
1584 IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan)
1585 {
1586 return (IfxMultican_ClockSelect)mcan->MCR.B.CLKSEL;
1587 }
1588
1589
1590 IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan)
1591 {
1592 return mcan->CLC.B.DISS == 0;
1593 }
1594
1595
1596 IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode)
1597 {
1598 mcan->FDR.B.DM = mode;
1599 }
1600
1601
1602 IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue)
1603 {
1604 mcan->FDR.B.STEP = stepValue;
1605 }
1606
1607
1608 IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
1609 {
1610 mcan->MCR.B.CLKSEL = clockSelect;
1611 }
1612
1613
1614 IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask)
1615 {
1616 mcan->MSIMASK.U = mask;
1617 }
1618
1619
1620 IFX_INLINE void IfxMultican_setSleepMode(Ifx_CAN *can, IfxMultican_SleepMode mode)
1621 {
1622 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1623 IfxScuWdt_clearCpuEndinit(passwd);
1624 can->CLC.B.EDIS = mode;
1625 IfxScuWdt_setCpuEndinit(passwd);
1626 }
1627
1628
1629 IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
1630 {
1631 while (mcan->PANCTR.B.BUSY != 0)
1632 {}
1633 }
1634
1635
1636 IFX_INLINE boolean IfxMultican_isModuleSuspended(Ifx_CAN *mcan)
1637 {
1638 Ifx_CAN_OCS ocs;
1639
1640 // read the status
1641 ocs.U = mcan->OCS.U;
1642
1643 // return the status
1644 return ocs.B.SUSSTA;
1645 }
1646
1647
1648 IFX_INLINE void IfxMultican_setSuspendMode(Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
1649 {
1650 Ifx_CAN_OCS ocs;
1651
1652 // remove protection and configure the suspend mode.
1653 ocs.B.SUS_P = 1;
1654 ocs.B.SUS = mode;
1655 mcan->OCS.U = ocs.U;
1656 }
1657
1658
1659 IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength(uint32 dataLength)
1660 {
1661 uint32 code;
1662
1663 if (dataLength <= 8)
1664 {
1665 code = dataLength;
1666 }
1667 else if (dataLength <= 24)
1668 {
1669 code = (dataLength >> 2) + 6;
1670 }
1671 else
1672 {
1673 code = (dataLength >> 4) + 11;
1674 }
1675
1676 return (IfxMultican_DataLengthCode)code;
1677 }
1678
1679
1680 IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode(IfxMultican_DataLengthCode code)
1681 {
1682 uint32 numBytes;
1683
1684 if (code <= IfxMultican_DataLengthCode_8)
1685 {
1686 numBytes = (uint32)code;
1687 }
1688 else if (code <= IfxMultican_DataLengthCode_24)
1689 {
1690 numBytes = ((uint32)code - 6) << 2;
1691 }
1692 else
1693 {
1694 numBytes = ((uint32)code - 11) << 4;
1695 }
1696
1697 return numBytes;
1698 }
1699
1700
1701 #endif /* IFXMULTICAN_H */
IfxMultican_setFractionalDividerMode
IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode)
sets the fractional divider mode
Definition: IfxMultican.h:1596
IfxMultican_MsgObjStatusFlag_transmitEnable0
Transmit enable 0 status flag.
Definition: IfxMultican.h:168
IfxMultican_Status_ok
Definition: IfxMultican.h:194
IfxMultican_MsgObj_setOverflowInterrupt
IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable overflow interrupt of a message object.
Definition: IfxMultican.h:1312
IfxMultican_Status_newData
Definition: IfxMultican.h:203
IfxMultican_MsgObjGroup_4
Definition: IfxMultican.h:136
IfxMultican_Status_busOff
Definition: IfxMultican.h:199
IfxMultican_Node_setTransceiverDelayCompensation
IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transceiver delay compensation of CAN node x.
Definition: IfxMultican.h:1506
IfxMultican_Node_getPointer
IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number.
Definition: IfxMultican.h:1402
IfxMultican_MsgObj_getMessageId
IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj)
Gets message identifier of message object.
Definition: IfxMultican.h:1175
IfxMultican_Node_setLoopBackMode
IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the loopback mode of CAN node x.
Definition: IfxMultican.h:1488
IfxMultican_DataLengthCode_1
1 data bytes
Definition: IfxMultican.h:84
IfxMultican_MsgObj_clearRxPending
IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object.
Definition: IfxMultican.h:1151
IfxMultican_Node_recoverBusOff
IFX_EXTERN IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off.
Definition: IfxMultican.c:623
IfxMultican_MsgObj_setIdentifierExtension
IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension)
Sets identifier extension of message object.
Definition: IfxMultican.h:1282
IfxMultican_MsgObj_getStatus
IFX_EXTERN IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.c:212
IfxMultican_MsgObjStatusFlag_receiveUpdating
Receive updating status flag.
Definition: IfxMultican.h:161
IfxMultican_Message
CAN message definition.
Definition: IfxMultican.h:224
IfxMultican_MsgObj_setExtendedDataLength
IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable extended data length of a message object.
Definition: IfxMultican.h:1264
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:39
IfxMultican_MsgObj_setSingleDataTransfer
IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single data transfer of a message object.
Definition: IfxMultican.h:1348
IfxMultican_Node_getCodeFromDataLength
IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength(uint32 dataLength)
Return the DLC code corresponding to the data length in byte.
Definition: IfxMultican.h:1659
IfxMultican_MsgObj_setDataLengthCode
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object.
Definition: IfxMultican.h:1252
IfxMultican_MsgObj_setStatusFlag
IFX_EXTERN void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object.
Definition: IfxMultican.c:581
IfxMultican_setInputClock
IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
Sets the input clock source.
Definition: IfxMultican.h:1608
IfxMultican_MsgObj_setIdentifierCopy
IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable identifier copy of a gateway source message object.
Definition: IfxMultican.h:1276
IfxMultican_disableModule
IFX_INLINE void IfxMultican_disableModule(Ifx_CAN *mcan)
Disables the module (sets the disable request)
Definition: IfxMultican.h:1548
IfxMultican_Frame_transmit
Data frame is generated.
Definition: IfxMultican.h:106
IfxMultican_MsgObj_setGatewayDataFrameSend
IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TX...
Definition: IfxMultican.h:1270
IfxMultican_MsgObj_cancelSend
IFX_EXTERN boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been star...
Definition: IfxMultican.c:55
IfxMultican_MsgObj_setCurrentObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom current pointer of the base message object.
Definition: IfxMultican.h:1240
IfxMultican_calcTimingFromBTR
IFX_EXTERN void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing.
Definition: IfxMultican.c:1144
IfxMultican_FrameCounterMode_frameCountMode
The frame counter is incremented upon the reception and transmission of frames.
Definition: IfxMultican.h:116
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxMultican_MsgObj_setTransmitInterrupt
IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit interrupt of a message object.
Definition: IfxMultican.h:1366
IfxMultican_MsgObj_isTransmitRequested
IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj)
Returns the TX Request flag of a message object.
Definition: IfxMultican.h:1208
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMultican_MsgObjMode_canFD64
CANFD 64 bytes Message Mode.
Definition: IfxMultican.h:151
IfxMultican_Node_setLastErrorCodeInterruptPointer
IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x...
Definition: IfxMultican.h:1482
float32
float float32
Definition: Platform_Types.h:167
IfxMultican_Message::data
uint32 data[2]
CAN message data.
Definition: IfxMultican.h:228
IfxMultican_MsgObjStatusFlag_messageLost
Message lost status flag.
Definition: IfxMultican.h:163
Ifx_Assert.h
Assert functions.
IfxMultican_Node_activate
IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican.h:1378
IfxMultican_MsgObjStat::U
unsigned int U
Definition: IfxMultican.h:237
IfxMultican_Node_deinit
IFX_EXTERN void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
Reset the CAN node.
Definition: IfxMultican.c:592
IfxMultican_Frame_receive
Data frame is received.
Definition: IfxMultican.h:105
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxMultican_Node_setFastBitTiming
IFX_EXTERN void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register.
Definition: IfxMultican.c:828
IfxMultican_MsgObj_setMessagePendingNumber
IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
Sets message pending number that selects the bit position of the bit in the Message Pending Register ...
Definition: IfxMultican.h:1306
IfxMultican_MsgObj_setBitRateSwitch
IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object.
Definition: IfxMultican.h:1228
IfxSrc.h
SRC basic functionality.
IfxMultican_Priority_ListOrder
List order.
Definition: IfxMultican.h:177
IfxMultican_SuspendMode_none
No suspend.
Definition: IfxMultican.h:211
IfxMultican_DataLengthCode_6
6 data bytes
Definition: IfxMultican.h:89
IfxMultican_DataLengthCode_12
12 data bytes
Definition: IfxMultican.h:92
IfxMultican_MsgObj_writeTxfifo
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:512
IfxCpu_Intrinsics.h
IfxMultican_MsgObjGroup_2
Definition: IfxMultican.h:134
IfxMultican_Node_setAnalyzerMode
IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the analyzer mode of CAN node x.
Definition: IfxMultican.h:1438
IfxMultican_ClockSelect_fErayPll
E-Ray clock.
Definition: IfxMultican.h:75
IfxMultican_MsgObj_setBottomObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object pointer of the base message object.
Definition: IfxMultican.h:1234
IfxMultican_MsgObj_readMessage
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican.c:292
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:91
IfxMultican_Message::fastBitRate
boolean fastBitRate
CAN FD fast bit rate enable/disable.
Definition: IfxMultican.h:229
IfxMultican_DataLengthCode_32
32 data bytes
Definition: IfxMultican.h:96
IfxMultican_Node_setErrorWarningLevel
IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level)
Determines the threshold value (warning level, default 96) to be reached in order to set the correspo...
Definition: IfxMultican.h:1444
IfxMultican_MsgObjStatusFlag_transmitEnable1
Transmit enable 1 status flag.
Definition: IfxMultican.h:169
IfxMultican_NodeId
IfxMultican_NodeId
CAN Nodes definition
Definition: IfxMultican_cfg.h:80
IfxMultican_FrameCounterMode_errorCountMode
The frame counter is used for counting when an error frame is received or an error is detected by the...
Definition: IfxMultican.h:122
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxMultican_Node_disableConfigurationChange
IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode)
Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
Definition: IfxMultican.h:1390
IfxMultican_Node_deactivate
IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities.
Definition: IfxMultican.h:1384
IfxMultican_MsgObj_sendLongFrame
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message.
Definition: IfxMultican.c:344
IfxMultican_MsgObj_clearTxPending
IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj)
Clear the TX pending flag of a message object.
Definition: IfxMultican.h:1157
IfxMultican_MsgObj_setReceiveInterrupt
IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable receive interrupt of a message object.
Definition: IfxMultican.h:1324
IfxMultican_Node_initRxPin
IFX_EXTERN boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxMultican.c:604
IfxMultican_Node_setFrameCounterMode
IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
Sets the operation mode of the frame counter of the CAN Node x.
Definition: IfxMultican.h:1470
IfxMultican_Node_resetErrorCounters
IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode)
Resets the error counters of CAN Node x.
Definition: IfxMultican.h:1414
IfxScuWdt.h
SCU basic functionality.
IfxMultican_DataLengthCode_48
48 data bytes
Definition: IfxMultican.h:97
IfxMultican_setSuspendMode
IFX_INLINE void IfxMultican_setSuspendMode(Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
Set the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and in Su...
Definition: IfxMultican.h:1648
IfxMultican_Status_receiveEmpty
Definition: IfxMultican.h:201
IfxMultican_Status_messageLost
Definition: IfxMultican.h:202
IfxMultican_MsgObj_setRemoteMonitoring
IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit object remote monitoring of a message object.
Definition: IfxMultican.h:1336
IfxMultican_Priority
IfxMultican_Priority
CAN priorities.
Definition: IfxMultican.h:175
IfxMultican_MsgObj_getPendingId
IFX_EXTERN IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group.
Definition: IfxMultican.c:197
IfxMultican_MsgObj_isTxPending
IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj)
Returns the TX pending flag of a message object.
Definition: IfxMultican.h:1215
IfxMultican_FrameCounterMode_timeStampMode
The frame counter is used to count bit times.
Definition: IfxMultican.h:118
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxMultican_MsgObjGroup_0
Definition: IfxMultican.h:132
IfxMultican_MsgObj_setMatchingId
IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId)
Sets acceptance mask for the message IDE bit.
Definition: IfxMultican.h:1288
IfxMultican_DataLengthCode_2
2 data bytes
Definition: IfxMultican.h:85
IfxMultican_Node_initTxPin
IFX_EXTERN boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxMultican.c:614
IfxMultican_SleepMode_enable
enables sleep mode
Definition: IfxMultican.h:186
IfxMultican_DataLengthCode_7
7 data bytes
Definition: IfxMultican.h:90
IfxMultican_isModuleSuspended
IFX_INLINE boolean IfxMultican_isModuleSuspended(Ifx_CAN *mcan)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxMultican.h:1636
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxMultican_MsgObjStatusFlag
IfxMultican_MsgObjStatusFlag
CAN Message Object status flag Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs) ...
Definition: IfxMultican.h:157
IfxMultican_MsgObj_clearStatusFlag
IFX_EXTERN void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object.
Definition: IfxMultican.c:75
IfxMultican_resetModule
IFX_EXTERN void IfxMultican_resetModule(Ifx_CAN *can)
resets Multican kernel
Definition: IfxMultican.c:1209
IfxMultican_Node_enableConfigurationChange
IFX_INLINE void IfxMultican_Node_enableConfigurationChange(Ifx_CAN_N *hwNode)
Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
Definition: IfxMultican.h:1396
IfxMultican_MsgObjMode_gatewaySource
Gateway Source Object.
Definition: IfxMultican.h:150
IfxMultican_SuspendMode
IfxMultican_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxMultican.h:209
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxMultican_DataLengthCode_20
20 data bytes
Definition: IfxMultican.h:94
IfxMultican_Node_setTransferInterrupt
IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transfer interrupt of CAN node x. This interrupt is generated after the succe...
Definition: IfxMultican.h:1518
IfxMultican_ClockSelect
IfxMultican_ClockSelect
CAN input clock selection.
Definition: IfxMultican.h:70
IfxMultican_MsgObj_readLongFrame
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame.
Definition: IfxMultican.c:230
IfxMultican_Message::id
uint32 id
CAN message ID.
Definition: IfxMultican.h:226
IfxMultican_Message::lengthCode
IfxMultican_DataLengthCode lengthCode
CAN message data length code.
Definition: IfxMultican.h:227
IfxMultican_MsgObjMode_transmitFifoBase
Transmit FIFO Base Object.
Definition: IfxMultican.h:148
IfxMultican_ClockSelect_noClock
No clock supplied.
Definition: IfxMultican.h:72
IfxMultican_Node_setFastNode
IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the flexible data rate of CAN node x.
Definition: IfxMultican.h:1450
IfxMultican_DataLengthCode_64
64 data bytes
Definition: IfxMultican.h:98
IfxMultican_MsgObjStatusFlag_messageDirection
Message direction status flag.
Definition: IfxMultican.h:170
IfxMultican_Frame_remoteAnswer
Answer frame is generated on reception of the corresponding remote request.
Definition: IfxMultican.h:108
IfxMultican_Frame_remoteRequest
Remote request frame is generated.
Definition: IfxMultican.h:107
IfxMultican_MsgObj_setMessageId
IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object.
Definition: IfxMultican.h:1294
IfxMultican_cfg.h
MULTICAN on-chip implementation data.
IfxMultican_Index
IfxMultican_Index
List of the available multican resource.
Definition: IfxMultican_cfg.h:72
IfxMultican_MsgObjGroup_1
Definition: IfxMultican.h:133
IfxMultican_MsgObj_getDataLengthCode
IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj)
Gets data length code of a message object.
Definition: IfxMultican.h:1169
IfxMultican_Node_getDataLengthFromCode
IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode(IfxMultican_DataLengthCode code)
Get the datalength in bytes from DLC.
Definition: IfxMultican.h:1680
IfxMultican_isModuleEnabled
IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan)
Returns the status of module enabled or disabled.
Definition: IfxMultican.h:1590
IfxMultican_MsgObjStatusFlag_newData
New data status flag.
Definition: IfxMultican.h:162
IfxMultican_MsgObjMode_transmitFifoSlave
Transmit FIFO Slave Object.
Definition: IfxMultican.h:149
IfxMultican_MsgObjId
sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.
Definition: IfxMultican.h:60
IfxMultican_MsgObj_setTransmitInterruptNodePointer
IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets transmit interrupt node pointer of message object.
Definition: IfxMultican.h:1372
IfxMultican_MsgObj_isRxPending
IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj)
Returns the RX pending flag of a message object.
Definition: IfxMultican.h:1201
IfxMultican_enableModule
IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan)
Enables the module (clears the disable request)
Definition: IfxMultican.h:1560
IfxMultican_Node_setAlertInterruptPointer
IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x...
Definition: IfxMultican.h:1432
IfxMultican_getFractionalDividerStepValue
IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan)
Returns the reload or addition value for the result.
Definition: IfxMultican.h:1578
IfxMultican_Status_busHeavy
Definition: IfxMultican.h:198
IfxMultican_setSleepMode
IFX_INLINE void IfxMultican_setSleepMode(Ifx_CAN *can, IfxMultican_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxMultican.h:1620
IfxMultican_MsgObj_clearFifoGatewayPointers
IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj)
Clears the FIFO/GateWay pointers of a message object.
Definition: IfxMultican.h:1145
IfxMultican_MsgObjStatusFlag_messageValid
Message valid status flag.
Definition: IfxMultican.h:164
IfxMultican_SuspendMode_hard
Hard Suspend.
Definition: IfxMultican.h:212
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:48
IfxMultican_ClockSelect_fclc
fMULTICAN
Definition: IfxMultican.h:73
IfxMultican_MsgObj_setAcceptanceMask
IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
Sets acceptance mask for the message identifier.
Definition: IfxMultican.h:1222
IfxMultican_MsgObjGroup_7
Definition: IfxMultican.h:139
IfxMultican_MsgObj_setReceiveInterruptNodePointer
IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets receive interrupt node pointer of message object.
Definition: IfxMultican.h:1330
IfxMultican_DataLengthCode_0
0 data bytes
Definition: IfxMultican.h:83
IfxMultican_enableSleepMode
IFX_INLINE void IfxMultican_enableSleepMode(Ifx_CAN *mcan)
Enables the sleep mode of the module.
Definition: IfxMultican.h:1566
IfxMultican_getInputClock
IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan)
Returns the selected input clock source.
Definition: IfxMultican.h:1584
IfxMultican_SleepMode
IfxMultican_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_CAN.CLC.B.EDIS.
Definition: IfxMultican.h:184
IfxMultican_FrameCounterMode
IfxMultican_FrameCounterMode
Determines the operation mode of the frame counter Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id)
Definition: IfxMultican.h:114
IfxMultican_MsgObjGroup
IfxMultican_MsgObjGroup
CAN message object group Each group consists of 32 consecutive message objects.
Definition: IfxMultican.h:130
IfxMultican_Message_longFrameInit
IFX_INLINE void IfxMultican_Message_longFrameInit(IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
Initializes a CAN message long frame.
Definition: IfxMultican.h:1128
IfxMultican_MsgObjStatusFlag_transmitPending
Transmit pending status flag.
Definition: IfxMultican.h:160
IfxMultican_waitListReady
IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
Wait until the list panel is ready.
Definition: IfxMultican.h:1629
IfxMultican_FrameCounterMode_bitTimingMode
The frame counter is used for analysis of the bit timing.
Definition: IfxMultican.h:120
IfxMultican_Node_setTransceiverDelayCompensationOffset
IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value)
Sets transceiver delay ompensation offset of CAN node x.
Definition: IfxMultican.h:1512
IfxMultican_MsgObjStat::B
Ifx_CAN_MO_STAT_Bits B
Definition: IfxMultican.h:236
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxMultican_MsgObjStat
Message object status bit-fields.
Definition: IfxMultican.h:234
IfxMultican_Message_init
IFX_INLINE void IfxMultican_Message_init(IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
Initializes a CAN message.
Definition: IfxMultican.h:1117
IfxMultican_MsgObjGroup_5
Definition: IfxMultican.h:137
IfxMultican_PinMap.h
MULTICAN I/O map.
IfxMultican_MsgObjStatusFlag_receiveEnable
Receive enable status flag.
Definition: IfxMultican.h:166
IfxMultican_deinit
IFX_EXTERN void IfxMultican_deinit(Ifx_CAN *mcan)
Reset the CAN module Reset and disable the CAN module, inclusive message object and node registers...
Definition: IfxMultican.c:1161
IfxMultican_Priority_CAN_ID
CAN ID.
Definition: IfxMultican.h:178
IfxMultican_clearPendingMessageNotification
IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1542
IfxMultican_Status_notInitialised
Definition: IfxMultican.h:195
IfxMultican_MsgObjGroup_3
Definition: IfxMultican.h:135
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected
Receive transmit selected status flag.
Definition: IfxMultican.h:165
IfxMultican_setMessageIndexMask
IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1614
IfxMultican_Status_newDataButOneLost
Definition: IfxMultican.h:204
IfxMultican_MsgObjStatusFlag_transmitRequest
Transmit request status flag.
Definition: IfxMultican.h:167
IfxMultican_DataLengthCode_5
5 data bytes
Definition: IfxMultican.h:88
IfxMultican_Node_setFrameCounterInterrupt
IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the CAN frame counter overflow interrupt of CAN node x.
Definition: IfxMultican.h:1458
IfxMultican_SuspendMode_soft
Soft Suspend.
Definition: IfxMultican.h:213
IfxMultican_Node_resetControlRegister
IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode)
Resets the control register of CAN Node x.
Definition: IfxMultican.h:1408
IfxMultican_MsgObj_setSingleTransmitTrial
IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single transmit trial of a message object.
Definition: IfxMultican.h:1354
IfxMultican_getIndex
IFX_EXTERN IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican)
API to get the resource index of the CAN specified.
Definition: IfxMultican.c:1243
IfxMultican_MsgObjGroup_6
Definition: IfxMultican.h:138
IfxMultican_setListCommand
IFX_EXTERN void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel.
Definition: IfxMultican.c:1228
IfxMultican_getFractionalDividerMode
IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan)
Returns the selected fractional divider mode.
Definition: IfxMultican.h:1572
IfxMultican_DataLengthCode_8
8 data bytes
Definition: IfxMultican.h:91
IfxMultican_Status_notSentBusy
Definition: IfxMultican.h:200
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxMultican_ClockSelect_fosc0
Oscillator Clock.
Definition: IfxMultican.h:74
sint32
long sint32
Definition: Platform_Types.h:131
IfxMultican_setFractionalDividerStepValue
IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue)
sets reload or addition value for the result.
Definition: IfxMultican.h:1602
IfxMultican_MsgObjMode
IfxMultican_MsgObjMode
CAN Message Object Mode.
Definition: IfxMultican.h:144
IfxMultican_MsgObj_setFilter
IFX_EXTERN void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
Set message object filter.
Definition: IfxMultican.c:564
IfxMultican_DataLengthCode
IfxMultican_DataLengthCode
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.
Definition: IfxMultican.h:81
IfxMultican_Node_setTransferInterruptPointer
IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x...
Definition: IfxMultican.h:1524
IfxMultican_getAddress
IFX_EXTERN Ifx_CAN * IfxMultican_getAddress(IfxMultican_Index multican)
Definition: IfxMultican.c:1263
IfxMultican_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register.
Definition: IfxMultican.c:1203
IfxMultican_MsgObjMode_standard
Standard Message Object.
Definition: IfxMultican.h:146
IfxMultican_MsgObj_getPointer
IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register.
Definition: IfxMultican.h:1189
IfxMultican_MsgObj_deinit
IFX_EXTERN void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object Append the message object to the end of idle list and reset message object r...
Definition: IfxMultican.c:85
IfxMultican_Status
IfxMultican_Status
CAN API status definition.
Definition: IfxMultican.h:192
IfxMultican_MsgObj_setPriorityClass
IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
Sets priority class of message object.
Definition: IfxMultican.h:1318
IfxMultican_Status_wrongParam
Definition: IfxMultican.h:196
IfxMultican_clearMessagePendingSeletor
IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1536
IfxMultican_Node_setReceiveErrorCounter
IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the receive error counter of CAN node x.
Definition: IfxMultican.h:1494
IfxMultican_MsgObj_getBottomObjectPointer
IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj)
Gets bottom object pointer of the base message object.
Definition: IfxMultican.h:1163
IfxMultican_MsgObj_clearDataRegisters
IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj)
Sets priority class of message object.
Definition: IfxMultican.h:1138
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxMultican_MsgObjMode_receiveFifoBase
Receive FIFO Base Object.
Definition: IfxMultican.h:147
IfxMultican_Status_wrongPin
Definition: IfxMultican.h:197
IfxMultican_Node_setTransmitErrorCounter
IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the transmit error counter of CAN node x.
Definition: IfxMultican.h:1530
IfxMultican_DataLengthCode_16
16 data bytes
Definition: IfxMultican.h:93
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxMultican_disableSleepMode
IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan)
Disregards the sleep mode of the module.
Definition: IfxMultican.h:1554
IfxMultican_Frame
IfxMultican_Frame
CAN frame type.
Definition: IfxMultican.h:103
IfxMultican_Node_setTimerEventInterruptPointer
IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x...
Definition: IfxMultican.h:1500
IfxMultican_DataLengthCode_3
3 data bytes
Definition: IfxMultican.h:86
IfxMultican_MsgObj_sendMessage
IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:464
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMultican_Node_setNominalBitTiming
IFX_EXTERN void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register.
Definition: IfxMultican.c:985
IfxMultican_Node_resetInterruptPointers
IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode)
Resets the interrupt pointers of CAN Node x.
Definition: IfxMultican.h:1420
IfxMultican_DataLengthCode_4
4 data bytes
Definition: IfxMultican.h:87
IfxMultican_MsgObj_setDataLengthCodeCopy
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data length code copy of a gateway source message object.
Definition: IfxMultican.h:1258
IfxMultican_MsgObj_setDataCopy
IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data copy of a gateway source message object.
Definition: IfxMultican.h:1246
IfxMultican_MsgObj_setSelectObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object select pointer of the base message object.
Definition: IfxMultican.h:1342
IfxMultican_DataLengthCode_24
24 data bytes
Definition: IfxMultican.h:95
IfxMultican_MsgObj_isExtendedFrame
IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.h:1195
IfxMultican_MsgObjStatusFlag_receivePending
Receive pending status flag.
Definition: IfxMultican.h:159
IfxMultican_Node_setBitTiming
IFX_EXTERN void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register.
Definition: IfxMultican.c:668
IfxMultican_MsgObj_getStatusFlag
IFX_EXTERN boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Gets the status of the selected status flag of a message object.
Definition: IfxMultican.c:222
IfxMultican_Node_setLastErrorCodeInterrupt
IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the last error code interrupt of CAN node x. This interrupt is generated with eac...
Definition: IfxMultican.h:1476
IfxMultican_Node_setAlertInterrupt
IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the alert interrupt of CAN node x.
Definition: IfxMultican.h:1426
IfxMultican_MsgObj_getNextObjectPointer
IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer(Ifx_CAN_MO *hwObj)
Returns next object pointer (PNEXT) of the current message object.
Definition: IfxMultican.h:1183
IfxMultican_MsgObj_setTopObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets top object pointer of the base message object.
Definition: IfxMultican.h:1360
IfxMultican_MsgObj_setMessageMode
IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
Sets the message mode of a message object.
Definition: IfxMultican.h:1300
IfxMultican_SleepMode_disable
disables sleep mode
Definition: IfxMultican.h:187
IfxMultican_Node_setFrameCounterInterruptPointer
IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Nod...
Definition: IfxMultican.h:1464


iLLD_TC26B: IfxMultican_Can.c Source File

  • Multican
  • Can
IfxMultican_Can.c
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_Can.c
3 * \brief MULTICAN CAN details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxMultican_Can.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
36 {
37 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
38
39 Ifx_CAN_MO_AR ar;
40 Ifx_CAN_MO_AMR amr;
41 Ifx_CAN_MO_FCR fcr;
42
43 ar.U = hwObj->AR.U;
44 amr.U = hwObj->AMR.U;
45 fcr.U = hwObj->FCR.U;
46
47 config->frame = (hwObj->STAT.B.DIR != 0) ? IfxMultican_Frame_transmit : IfxMultican_Frame_receive;
48
49 config->control.singleDataTransfer = fcr.B.SDT;
50 config->control.messageLen = (IfxMultican_DataLengthCode)fcr.B.DLC;
51 config->control.extendedFrame = ar.B.IDE;
52 config->control.matchingId = amr.B.MIDE;
53
54 config->messageId = ar.B.ID >> ((config->control.extendedFrame != 0) ? 0 : 18);
55 config->priority = (IfxMultican_Priority)ar.B.PRI;
56 config->acceptanceMask = amr.B.AM >> ((config->control.extendedFrame != 0) ? 0 : 18);
57 config->control.singleTransmitTrial = fcr.B.STT;
58 }
59
60
61 IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
62 {
63 msgObj->node = config->node;
64 msgObj->msgObjId = config->msgObjId;
65 msgObj->msgObjCount = config->msgObjCount;
66 msgObj->fifoPointer = 0;
67
68 Ifx_CAN *mcanSFR = msgObj->node->mcan;
69
70 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcanSFR, msgObj->msgObjId);
71
72 IfxMultican_Status status = IfxMultican_Status_ok;
73
74 boolean longFrame = (config->control.messageLen > IfxMultican_DataLengthCode_8) ? TRUE : FALSE;
75
76 /* check for the receive frame */
77 boolean receiveFrame = (config->frame == IfxMultican_Frame_receive) ||
78 (config->frame == IfxMultican_Frame_remoteAnswer) ||
79 (config->frame == IfxMultican_Frame_remoteRequest);
80
81 /* check for the transmit frame */
82 boolean transmitFrame = ((config->frame == IfxMultican_Frame_transmit) ||
83 (config->frame == IfxMultican_Frame_remoteAnswer) ||
84 (config->frame == IfxMultican_Frame_remoteRequest)) &&
85 (config->gatewayTransfers != 1);
86
87 /* check for gateway source object */
88 boolean gatewaySourceObj = (config->gatewayTransfers != 0) ? TRUE : FALSE;
89
90 /* check for the receive FIFO and trabsmit FIFO */
91 boolean receiveFifo = FALSE, transmitFifo = FALSE;
92
93 if (config->gatewayTransfers != 1)
94 {
95 receiveFifo = (config->msgObjCount > 1) && (receiveFrame);
96 transmitFifo = (config->msgObjCount > 1) && (transmitFrame);
97 }
98
99 /* check for the gateway FIFO */
100 boolean gatewayFifo = (config->msgObjCount > 1) && (gatewaySourceObj);
101
102 /* will be used for Fifo slave objects */
103 IfxMultican_MsgObjId objId, firstSlaveObjId, lastSlaveObjId, gatewayDstObjId = 0;
104
105 /* select the first slave object */
106 if (!config->firstSlaveObjId)
107 { // if not selected
108 firstSlaveObjId = config->msgObjId + 1;
109 }
110 else
111 {
112 firstSlaveObjId = config->firstSlaveObjId;
113 }
114
115 /* select the last slave object */
116 lastSlaveObjId = firstSlaveObjId + (config->msgObjCount - 1);
117
118 uint32 i;
119
120 /* for standard and FIFO (Tx & Rx) base objects */
121 {
122 /* MSGVAL: Set message as not valid */
123 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
124
125 /* reset RXPND */
126 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receivePending);
127
128 /* reset TXPND */
129 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitPending);
130
131 /* reset RXUPD */
132 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveUpdating);
133
134 /* reset NEWDAT */
135 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
136
137 /* reset MSGLST */
138 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
139
140 /* reset RTSEL */
141 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
142
143 /* reset RXPND */
144 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
145
146 /* Configuration of the CAN Message Object List Structure */
147 /* Allocate MO for the node associated list */
148 {
149 /* for standard, gateway and FIFO (Tx & Rx) base objects */
150 /* Append message object to the end of the list */
151 IfxMultican_setListCommand(mcanSFR, 0x2, msgObj->node->nodeId + 1, msgObj->msgObjId);
152
153 /* long frame CAN FD */
154 if (longFrame)
155 {
156 /* Allocate MO with extended Data fields slected by FGPR.B.TOP and FGPR.B.BOT, for the unallocated list (0) */
157 /* Append message object to the end of the list(0) */
158 IfxMultican_setListCommand(mcanSFR, 0x2, 0, config->control.topMsgObjId);
159 IfxMultican_setListCommand(mcanSFR, 0x2, 0, config->control.bottomMsgObjId);
160 }
161
162 /* for all standard FIFO (Tx and Rx) and gateway FIFO slave objects */
163 if (config->msgObjCount > 1)
164 {
165 for (i = 0; i < config->msgObjCount; i++)
166 {
167 objId = firstSlaveObjId + i;
168
169 IfxMultican_setListCommand(mcanSFR, 0x2, msgObj->node->nodeId + 1, objId);
170 }
171 }
172 }
173
174 if ((config->frame == IfxMultican_Frame_receive) || (config->frame == IfxMultican_Frame_remoteAnswer))
175 {
176 /* set RXEN, in case of recieve frame or remote answer*/
177 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveEnable);
178 }
179
180 /* in case of transmit frame */
181 if ((transmitFrame) && (config->gatewayTransfers != 1))
182 {
183 /* set TXEN0 */
184 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
185
186 /* set TXEN1 */
187 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
188
189 /* reset RTSEL */
190 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
191
192 /* MSGVAL: Set message as valid */
193 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
194 }
195
196 if (((config->frame == IfxMultican_Frame_transmit) || (config->frame == IfxMultican_Frame_remoteAnswer)) && (config->gatewayTransfers != 1))
197 {
198 /* set DIR, in case of transmit frame or remote answer*/
199 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageDirection);
200 }
201 else
202 {
203 /* clear DIR, in case of receive frame or gateway transfers*/
204 IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageDirection);
205 }
206 }
207 {
208 /* for standard message object */
209 if (config->msgObjCount == 1)
210 {
211 /* gateway transfers */
212 if (gatewaySourceObj)
213 {
214 /* select Gateway Source mode for FCR.MMC */
215 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_gatewaySource);
216
217 /* select the gateway destination object as the next object if not selected */
218 if (!config->gatewayConfig.gatewayDstObjId)
219 {
220 gatewayDstObjId = msgObj->msgObjId + 1;
221 }
222 else
223 {
224 gatewayDstObjId = config->gatewayConfig.gatewayDstObjId;
225 }
226 }
227 /* long frame CAN FD */
228 /* FDEN = 1, EDL = 1 and BRS = 0/1 */
229 else if (config->node->fastNode && longFrame)
230 {
231 /* select CAN FD object mode for FCR.MMC */
232 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_canFD64);
233 }
234 /* standard frame */
235 /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
236 else
237 {
238 /* select standard object for FCR.MMC */
239 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_standard);
240 }
241 }
242 /* for receive FIFO base object */
243 else if (receiveFifo)
244 {
245 /* select receive FIFO base object for FCR.MMC */
246 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_receiveFifoBase);
247 }
248 /* for transmit FIFO base object */
249 else if (transmitFifo)
250 {
251 /* select transmit FIFO base object for FCR.MMC */
252 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_transmitFifoBase);
253 }
254 /* for gateway FIFO source object */
255 else if (gatewayFifo)
256 {
257 /* select transmit Gateway Source for FCR.MMC */
258 IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_gatewaySource);
259 }
260 else
261 {}
262
263 /* for standard and FIFO (Tx & Rx) base objects */
264 /* enable receive interrupt FCR.RXIE if choosen in case of receive frame */
265 boolean receiveInterruptEnabled = (config->rxInterrupt.enabled) && (receiveFrame);
266 IfxMultican_MsgObj_setReceiveInterrupt(hwObj, receiveInterruptEnabled);
267
268 /* enable transmit interrupt FCR.TXIE if choosen in case of transmit frame */
269 boolean transmitInterruptEnabled = (config->txInterrupt.enabled) && (transmitFrame);
270 IfxMultican_MsgObj_setTransmitInterrupt(hwObj, transmitInterruptEnabled);
271
272 /* set FCR.RMM in case of remote answer */
273 boolean remoteMonitoringEnabled = (config->frame == IfxMultican_Frame_remoteAnswer);
274 IfxMultican_MsgObj_setRemoteMonitoring(hwObj, remoteMonitoringEnabled);
275
276 /* long frame CAN FD */
277 /* FDEN = 1, EDL = 1 and BRS = 0/1 */
278 /* in case of recieve Msg Obj, it recieves long and long+fast frames */
279 if (config->node->fastNode && longFrame)
280 {
281 /* enable extended data length */
282 IfxMultican_MsgObj_setExtendedDataLength(hwObj, TRUE);
283
284 /* set data length code FCR.DLC */
285 IfxMultican_MsgObj_setDataLengthCode(hwObj, config->control.messageLen);
286
287 /* set bit rate switch (fast bit rate enable/disable) */
288 IfxMultican_MsgObj_setBitRateSwitch(hwObj, config->control.fastBitRate);
289 }
290 /* standard frame */
291 /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
292 /* in case of recieve Msg Obj, it recieves only standard frames */
293 else
294 {
295 /* set data length code FCR.DLC */
296 IfxMultican_MsgObj_setDataLengthCode(hwObj, config->control.messageLen);
297 }
298
299 /* only for standard message object */
300 if ((config->msgObjCount == 1) && (!gatewaySourceObj))
301 {
302 /* set single transmit trial FCR.STT if choosen */
303 IfxMultican_MsgObj_setSingleTransmitTrial(hwObj, config->control.singleTransmitTrial);
304
305 /* set single data transfer FCR.SDT if choosen */
306 IfxMultican_MsgObj_setSingleDataTransfer(hwObj, config->control.singleDataTransfer);
307 }
308 /* for FIFO (Tx or Rx) base object and gateway objects*/
309 else
310 {
311 /* clear single transmit trial FCR.STT */
312 IfxMultican_MsgObj_setSingleTransmitTrial(hwObj, FALSE);
313
314 /* clear single data transfer FCR.SDT */
315 IfxMultican_MsgObj_setSingleDataTransfer(hwObj, FALSE);
316 }
317 }
318
319 {
320 /* for standard message object */
321 if (config->msgObjCount == 1)
322 {
323 /* long frame CAN FD */
324 if (longFrame)
325 {
326 /* set bottom pointer FGPR.BOT */
327 IfxMultican_MsgObj_setBottomObjectPointer(hwObj, config->control.bottomMsgObjId);
328
329 /* set top pointer FGPR.TOP */
330 IfxMultican_MsgObj_setTopObjectPointer(hwObj, config->control.topMsgObjId);
331 }
332 /* standard gateway transfers */
333 else if (gatewaySourceObj)
334 {
335 /* set (current pointer) FGPR.CUR, to gateway destination object */
336 IfxMultican_MsgObj_setCurrentObjectPointer(hwObj, gatewayDstObjId);
337 }
338 /* standard frame */
339 else
340 {
341 /* clear all pointers */
342 IfxMultican_MsgObj_clearFifoGatewayPointers(hwObj);
343 }
344 }
345
346 /* for FIFO (Tx or Rx) base object and gateway FIFO object */
347 else
348 {
349 /* set bottom pointer FGPR.BOT, to the next message object (first FIFO slave object) */
350 IfxMultican_MsgObj_setBottomObjectPointer(hwObj, firstSlaveObjId);
351
352 /* store the first slave object Id as the fifoPointer in msgObj structure for FIFO transfers */
353 msgObj->fifoPointer = firstSlaveObjId;
354
355 /* set top pointer FGPR.TOP, to the last FIFO slave object */
356 IfxMultican_MsgObj_setTopObjectPointer(hwObj, lastSlaveObjId);
357
358 /* set start of FIFO (current pointer) FGPR.CUR, to first FIFO slave object (bottom pointer) */
359 IfxMultican_MsgObj_setCurrentObjectPointer(hwObj, firstSlaveObjId);
360
361 if (receiveFifo || transmitFifo)
362 {
363 /* set select object pointer FGPR.SEL to one object before last FIFO slave object */
364 IfxMultican_MsgObj_setSelectObjectPointer(hwObj, lastSlaveObjId - 1);
365 }
366 }
367 }
368
369 {
370 /* for standard, gateway and FIFO (Tx & Rx) base objects */
371 /* set the given acceptance mask */
372 IfxMultican_MsgObj_setAcceptanceMask(hwObj, config->acceptanceMask, config->control.extendedFrame);
373
374 /* enable matching ID if choosen */
375 IfxMultican_MsgObj_setMatchingId(hwObj, config->control.matchingId);
376 }
377
378 {
379 /* for standard, gateway and FIFO (Tx & Rx) base objects */
380 /* set message ID */
381 IfxMultican_MsgObj_setMessageId(hwObj, config->messageId, config->control.extendedFrame);
382
383 /* set identifier extension if extended frame is choosen */
384 IfxMultican_MsgObj_setIdentifierExtension(hwObj, config->control.extendedFrame);
385
386 /* set filtering priority */
387 IfxMultican_MsgObj_setPriorityClass(hwObj, config->priority);
388 }
389
390 /* for standard, gateway and FIFO (Tx & Rx) base objects */
391 /* clear both data registers DATAL and DATAH */
392 IfxMultican_MsgObj_clearDataRegisters(hwObj);
393
394 {
395 /* for standard, gateway and FIFO (Tx & Rx) base objects */
396 /* select IPR.RXINP */
397 IfxMultican_MsgObj_setReceiveInterruptNodePointer(hwObj, config->rxInterrupt.srcId);
398
399 /* select IPR.TXINP */
400 IfxMultican_MsgObj_setTransmitInterruptNodePointer(hwObj, config->txInterrupt.srcId);
401
402 /* set IPR.MNP */
403 IfxMultican_MsgObj_setMessagePendingNumber(hwObj, msgObj->msgObjId);
404 }
405
406 /* for each receive FIFO slave object */
407 if (receiveFifo)
408 {
409 for (i = 0; i < config->msgObjCount; i++)
410 {
411 objId = firstSlaveObjId + i; /* increment the message object ID */
412
413 Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
414
415 /* clear all RXEN flag */
416 IfxMultican_MsgObj_clearStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_receiveEnable);
417
418 /* set data length code */
419 IfxMultican_MsgObj_setDataLengthCode(hwSlaveObj, config->control.messageLen);
420
421 /* clear DATAL and DATAH registers */
422 IfxMultican_MsgObj_clearDataRegisters(hwSlaveObj);
423 }
424 }
425
426 /* for each transmit FIFO slave object */
427 if (transmitFifo)
428 {
429 /* configure each transmit FIFO slave object as an independent transmit object */
430 for (i = 0; i < config->msgObjCount; i++)
431 {
432 objId = firstSlaveObjId + i; /* increment the message object ID */
433
434 Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
435
436 /* set message mode as transmit FIFO slave mode */
437 IfxMultican_MsgObj_setMessageMode(hwSlaveObj, IfxMultican_MsgObjMode_transmitFifoSlave);
438
439 /* point current pointer(FGPR.CUR) back to the base FIFO object */
440 IfxMultican_MsgObj_setCurrentObjectPointer(hwSlaveObj, msgObj->msgObjId);
441
442 /* set data length code */
443 IfxMultican_MsgObj_setDataLengthCode(hwSlaveObj, config->control.messageLen);
444
445 /* clear DATAL and DATAH registers */
446 IfxMultican_MsgObj_clearDataRegisters(hwSlaveObj);
447
448 /* set the given acceptance mask */
449 IfxMultican_MsgObj_setAcceptanceMask(hwSlaveObj, config->acceptanceMask, config->control.extendedFrame);
450
451 /* enable matching ID if choosen */
452 IfxMultican_MsgObj_setMatchingId(hwSlaveObj, config->control.matchingId);
453
454 /* set message ID */
455 IfxMultican_MsgObj_setMessageId(hwSlaveObj, config->messageId, config->control.extendedFrame);
456
457 /* set identifier extension if extended frame is choosen */
458 IfxMultican_MsgObj_setIdentifierExtension(hwSlaveObj, config->control.extendedFrame);
459
460 /* set filtering priority */
461 IfxMultican_MsgObj_setPriorityClass(hwSlaveObj, config->priority);
462
463 /* set TXEN0 */
464 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
465
466 /* MSGVAL: Set message as valid */
467 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageValid);
468
469 /* clear all TXEN1 flags expect for the slave object in the FGPR.CUR of the base FIFO object */
470 if (objId == firstSlaveObjId)
471 {
472 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
473 }
474 else
475 {
476 IfxMultican_MsgObj_clearStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
477 }
478
479 /* set DIR, in case of transmit frame or remote answer*/
480 if ((config->frame == IfxMultican_Frame_transmit) || (config->frame == IfxMultican_Frame_remoteAnswer))
481 {
482 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageDirection);
483 }
484 }
485 }
486
487 /* for standard and receive FIFO base objects */
488 if (config->frame == IfxMultican_Frame_receive)
489 {
490 /* set RTSEL */
491 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
492
493 /* MSGVAL: Set message as valid */
494 IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
495 }
496
497 /* for each receive FIFO slave object */
498 if (config->msgObjCount > 1)
499 {
500 IfxMultican_MsgObjId nextFifoObj;
501
502 for (i = 0; i < config->msgObjCount; i++)
503 {
504 objId = firstSlaveObjId + i;
505
506 Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
507
508 /* for receive FIFO and gateway FIFO */
509 if (!transmitFifo)
510 {
511 /* MSGVAL: Set message as valid */
512 IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageValid);
513 }
514
515 /* for transmit FIFO and receive FIFO */
516 if (!gatewayFifo)
517 {
518 /* store the next FIFO object number in the bottom pointer (FGPR.BOT) of the current FIFO object (for ease of use in transfers)*/
519 /* if it is the last FIFO object */
520 if (i == (config->msgObjCount - 1))
521 { /* wrap around the FIFO by making the next pointer of last object as the first FIFO object */
522 nextFifoObj = firstSlaveObjId;
523 }
524 else
525 {
526 nextFifoObj = objId + 1;
527 }
528
529 IfxMultican_MsgObj_setBottomObjectPointer(hwSlaveObj, nextFifoObj);
530 }
531 }
532 }
533
534 if (gatewaySourceObj)
535 {
536 /* set FCR.DLCC if chosen*/
537 IfxMultican_MsgObj_setDataLengthCodeCopy(hwObj, config->gatewayConfig.copyDataLengthCode);
538
539 /* set FCR.DATC if chosen*/
540 IfxMultican_MsgObj_setDataCopy(hwObj, config->gatewayConfig.copyData);
541
542 /* set FCR.IDC if chosen*/
543 IfxMultican_MsgObj_setIdentifierCopy(hwObj, config->gatewayConfig.copyId);
544
545 /* set FCR.GDFS if chosen*/
546 IfxMultican_MsgObj_setGatewayDataFrameSend(hwObj, config->gatewayConfig.enableTransmit);
547 }
548
549 return status;
550 }
551
552
553 void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
554 {
555 // @$GENTABLE(MsgObjConfig,defaultConfig);
556
557 config->node = node;
558 config->msgObjId = 0;
559 config->msgObjCount = 1;
560
561 config->control.messageLen = IfxMultican_DataLengthCode_8;
562
563 config->control.topMsgObjId = 252;
564 config->control.bottomMsgObjId = 253;
565 config->control.fastBitRate = FALSE; /* fast bit rate enable/disable */
566
567 config->control.extendedFrame = FALSE;
568 config->control.matchingId = FALSE;
569 config->control.singleDataTransfer = FALSE;
570 config->control.singleTransmitTrial = FALSE;
571 config->acceptanceMask = 0x7FFFFFFFUL;
572 config->messageId = 0;
573
574 config->frame = IfxMultican_Frame_receive;
575 config->priority = IfxMultican_Priority_CAN_ID;
576 config->rxInterrupt.enabled = FALSE;
577 config->rxInterrupt.srcId = IfxMultican_SrcId_0;
578 config->txInterrupt.enabled = FALSE;
579 config->txInterrupt.srcId = IfxMultican_SrcId_0;
580
581 config->firstSlaveObjId = 0;
582
583 config->gatewayTransfers = FALSE;
584 config->gatewayConfig.copyDataLengthCode = TRUE;
585 config->gatewayConfig.copyData = TRUE;
586 config->gatewayConfig.copyId = TRUE;
587 config->gatewayConfig.enableTransmit = TRUE;
588 config->gatewayConfig.gatewayDstObjId = 0;
589 }
590
591
592 boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj)
593 {
594 if (msgObj->msgObjCount > 1)
595 {
596 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
597 return IfxMultican_MsgObj_isRxPending(hwObj);
598 }
599 else
600 {
601 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
602 return IfxMultican_MsgObj_isRxPending(hwObj);
603 }
604 }
605
606
607 boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj)
608 {
609 if (msgObj->msgObjCount > 1)
610 {
611 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
612
613 return IfxMultican_MsgObj_isTransmitRequested(hwObj);
614 }
615 else
616 {
617 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
618
619 return IfxMultican_MsgObj_isTransmitRequested(hwObj);
620 }
621 }
622
623
624 boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj)
625 {
626 if (msgObj->msgObjCount > 1)
627 {
628 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
629
630 return IfxMultican_MsgObj_isTxPending(hwObj);
631 }
632 else
633 {
634 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
635
636 return IfxMultican_MsgObj_isTxPending(hwObj);
637 }
638 }
639
640
641 IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
642 {
643 IfxMultican_Status status = IfxMultican_Status_ok;
644 IfxMultican_MsgObjId objId;
645
646 if (msgObj->msgObjCount > 1)
647 {
648 /* for FIFO message Objects */
649 objId = msgObj->fifoPointer;
650 }
651 else
652 {
653 /* for standard message Objects */
654 objId = msgObj->msgObjId;
655 }
656
657 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, objId);
658
659 /* clear pending flag */
660 IfxMultican_MsgObj_clearRxPending(hwObj);
661
662 /* read the message object */
663 status = IfxMultican_MsgObj_readMessage(hwObj, msg);
664
665 /* if successfull: */
666 if (status & IfxMultican_Status_newData)
667 {
668 if (msgObj->msgObjCount > 1)
669 {
670 /* set next message object(MOSTAT.PNEXT) of the current object as the next txFIFO slave object */
671 msgObj->fifoPointer = IfxMultican_MsgObj_getBottomObjectPointer(hwObj);
672 }
673 else
674 {}
675 }
676
677 return status;
678 }
679
680
681 IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
682 {
683 IfxMultican_Status status = IfxMultican_Status_ok;
684 IfxMultican_MsgObjId objId;
685
686 if (msgObj->msgObjCount > 1)
687 {
688 /* for FIFO message Objects */
689 objId = msgObj->fifoPointer;
690
691 Ifx_CAN_MO *hwBaseObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
692
693 /* set message as valid, in case of FIFO MSGVAL of base object has to be set before setting it to each slave object */
694 IfxMultican_MsgObj_setStatusFlag(hwBaseObj, IfxMultican_MsgObjStatusFlag_messageValid);
695 }
696 else
697 {
698 /* for standard message Objects */
699 objId = msgObj->msgObjId;
700 }
701
702 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, objId);
703
704 if (msgObj->msgObjCount > 1)
705 {
706 /* send the message */
707 status = IfxMultican_MsgObj_writeTxfifo(hwObj, msg);
708 }
709 else
710 {
711 /* send the message */
712 status = IfxMultican_MsgObj_sendMessage(hwObj, msg);
713 }
714
715 /* if successfull: */
716 if (status == IfxMultican_Status_ok)
717 {
718 if (msgObj->msgObjCount > 1)
719 {
720 /* set next message object(MOSTAT.PNEXT) of the current object as the next txFIFO slave object */
721 msgObj->fifoPointer = IfxMultican_MsgObj_getBottomObjectPointer(hwObj);
722 }
723 else
724 {}
725 }
726
727 return status;
728 }
729
730
731 void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
732 {
733 Ifx_CAN_N *hwNode = node->node;
734
735 IfxMultican_Can mcan;
736
737 mcan.mcan = node->mcan;
738
739 float32 fcan = IfxMultican_Can_getModuleFrequency(&mcan);
740
741 IfxMultican_calcTimingFromBTR(fcan, hwNode->BTR.U, &config->baudrate, &config->samplePoint, &config->synchJumpWidth);
742
743 config->loopBackMode = (hwNode->PCR.B.LBM != 0) ? TRUE : FALSE;
744 config->analyzerMode = (hwNode->CR.B.CALM != 0) ? TRUE : FALSE;
745 }
746
747
748 IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
749 {
750 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(config->module, config->nodeId);
751 IfxMultican_Status status = IfxMultican_Status_ok;
752
753 node->mcan = config->module;
754 node->node = hwNode;
755 node->nodeId = config->nodeId;
756 node->fastNode = FALSE;
757
758 { /* Configure node control */
759 IfxMultican_Node_resetControlRegister(hwNode); // default value 0x00000041
760 IfxMultican_Node_setTransferInterrupt(hwNode, config->transferInterrupt.enabled);
761 IfxMultican_Node_setLastErrorCodeInterrupt(hwNode, config->lastErrorCodeInterrupt.enabled);
762 IfxMultican_Node_setAlertInterrupt(hwNode, config->alertInterrupt.enabled);
763 IfxMultican_Node_setAnalyzerMode(hwNode, config->analyzerMode);
764 IfxMultican_Node_activate(hwNode);
765 }
766
767 { /* Configure the interrupt source to service request node */
768 IfxMultican_Node_resetInterruptPointers(hwNode); // default value 0x00000041
769 IfxMultican_Node_setTransferInterruptPointer(hwNode, config->transferInterrupt.srcId);
770 IfxMultican_Node_setLastErrorCodeInterruptPointer(hwNode, config->lastErrorCodeInterrupt.srcId);
771 IfxMultican_Node_setAlertInterruptPointer(hwNode, config->alertInterrupt.srcId);
772 IfxMultican_Node_setFrameCounterInterruptPointer(hwNode, config->frameCounterInterrupt.srcId);
773 IfxMultican_Node_setTimerEventInterruptPointer(hwNode, config->timerInterrupt.srcId);
774 }
775
776 { /* NECNT write enabled only of NCR.CCE set */
777 IfxMultican_Node_resetErrorCounters(hwNode);
778 IfxMultican_Node_setReceiveErrorCounter(hwNode, 0);
779 IfxMultican_Node_setTransmitErrorCounter(hwNode, 0);
780 IfxMultican_Node_setErrorWarningLevel(hwNode, config->errorWarningLevel);
781 }
782
783 { /* NPCR write enabled only of NCR.CCE set */
784 IfxMultican_Node_setLoopBackMode(hwNode, config->loopBackMode);
785
786 if (config->txPin != NULL_PTR)
787 {
788 status |= (IfxMultican_Node_initTxPin(hwNode, config->txPin, config->txPinMode, config->pinDriver) ? IfxMultican_Status_ok : IfxMultican_Status_wrongPin);
789 }
790
791 if (config->rxPin != NULL_PTR)
792 {
793 status |= (IfxMultican_Node_initRxPin(hwNode, config->rxPin, config->rxPinMode, config->pinDriver) ? IfxMultican_Status_ok : IfxMultican_Status_wrongPin);
794 }
795 }
796
797 {
798 IfxMultican_Can mcan;
799 mcan.mcan = node->mcan;
800
801 float32 fcan = IfxMultican_Can_getModuleFrequency(&mcan);
802
803 if (!config->flexibleDataRate)
804 {
805 IfxMultican_Node_setBitTiming(hwNode, fcan, config->baudrate, config->samplePoint, config->synchJumpWidth);
806 }
807 else
808 {
809 IfxMultican_Node_setFastNode(hwNode, TRUE);
810 node->fastNode = TRUE;
811
812 IfxMultican_Node_setNominalBitTiming(hwNode, fcan, config->fdConfig.nominalBaudrate, config->fdConfig.nominalSamplePoint, config->fdConfig.nominalSynchJumpWidth);
813 IfxMultican_Node_setFastBitTiming(hwNode, fcan, config->fdConfig.fastBaudrate, config->fdConfig.fastSamplePoint, config->fdConfig.fastSynchJumpWidth);
814
815 if (config->fdConfig.loopDelayOffset)
816 {
817 IfxMultican_Node_setTransceiverDelayCompensationOffset(hwNode, config->fdConfig.loopDelayOffset);
818 IfxMultican_Node_setTransceiverDelayCompensation(hwNode, TRUE);
819 }
820 }
821 }
822
823 { /* Configuration of the Frame Counter */
824 IfxMultican_Node_setFrameCounterMode(hwNode, IfxMultican_FrameCounterMode_timeStampMode);
825 IfxMultican_Node_setFrameCounterInterrupt(hwNode, config->frameCounterInterrupt.enabled);
826 }
827
828 IfxMultican_Node_disableConfigurationChange(hwNode);
829 /* Configuration of the TTCAN Functionality: Not implemented */
830
831 return status;
832 }
833
834
835 void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
836 {
837 config->module = mcan->mcan;
838
839 config->nodeId = IfxMultican_NodeId_0;
840
841 config->loopBackMode = FALSE;
842 config->analyzerMode = FALSE;
843
844 config->baudrate = 500000;
845 config->samplePoint = 8000;
846 config->synchJumpWidth = 2000;
847
848 config->flexibleDataRate = FALSE;
849
850 config->fdConfig.nominalBaudrate = 500000;
851 config->fdConfig.nominalSynchJumpWidth = 2000;
852 config->fdConfig.nominalSamplePoint = 8000;
853 config->fdConfig.fastBaudrate = 1000000;
854 config->fdConfig.fastSynchJumpWidth = 2000;
855 config->fdConfig.fastSamplePoint = 8000;
856 config->fdConfig.loopDelayOffset = 0;
857
858 config->rxPin = NULL_PTR;
859 config->rxPinMode = IfxPort_InputMode_pullUp;
860 config->txPin = NULL_PTR;
861 config->txPinMode = IfxPort_OutputMode_pushPull;
862 config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed2; //previously hardcoded as this value for Tx pins.Now pad driver option is being given in IfxMultican_Node_initRxPin() and IfxMultican_Node_initTxPin()
863
864 config->transferInterrupt.enabled = FALSE;
865 config->transferInterrupt.srcId = IfxMultican_SrcId_0;
866
867 config->lastErrorCodeInterrupt.enabled = FALSE;
868 config->lastErrorCodeInterrupt.srcId = IfxMultican_SrcId_0;
869
870 config->alertInterrupt.enabled = FALSE;
871 config->alertInterrupt.srcId = IfxMultican_SrcId_0;
872
873 config->frameCounterInterrupt.enabled = FALSE;
874 config->frameCounterInterrupt.srcId = IfxMultican_SrcId_0;
875
876 config->timerInterrupt.enabled = FALSE;
877 config->timerInterrupt.srcId = IfxMultican_SrcId_0;
878
879 config->errorWarningLevel = 96;
880 }
881
882
883 void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node)
884 {
885 uint32 i, counter;
886
887 for (counter = 1; counter < 256; counter = counter * 2)
888 {
889 node->node->ECNT.B.TEC = counter;
890 }
891
892 for (i = 0; i < 10; ++i)
893 {
894 node->node->ECNT.B.TEC = ++counter;
895 }
896 }
897
898
899 void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
900 {
901 config->clockSelect = IfxMultican_getInputClock(mcan->mcan);
902
903 if (config->clockSelect == IfxMultican_ClockSelect_fclc)
904 {
905 float32 fcan = IfxScuCcu_getCanFrequency();
906
907 uint16 dividerMode = IfxMultican_getFractionalDividerMode(mcan->mcan);
908 uint16 stepValue = IfxMultican_getFractionalDividerStepValue(mcan->mcan);
909
910 if (dividerMode == 1)
911 {
912 config->moduleFreq = fcan / (1024 - stepValue);
913 }
914 else if (dividerMode == 2)
915 {
916 config->moduleFreq = (fcan * stepValue) / 1024;
917 }
918 else
919 {
920 config->moduleFreq = 0;
921 }
922 }
923 else if (config->clockSelect == IfxMultican_ClockSelect_fosc0)
924 {
925 config->moduleFreq = IfxScuCcu_getOsc0Frequency();
926 }
927 else if (config->clockSelect == IfxMultican_ClockSelect_fErayPll)
928 {
929 config->moduleFreq = IfxScuCcu_getPllErayFrequency();
930 }
931 else
932 {
933 config->moduleFreq = 0.0;
934 }
935 }
936
937
938 float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan)
939 {
940 IfxMultican_Can_Config config;
941
942 IfxMultican_Can_getConfig(mcan, &config);
943
944 return config.moduleFreq;
945 }
946
947
948 IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
949 {
950 Ifx_CAN *mcanSFR = config->module;
951
952 mcan->mcan = mcanSFR;
953
954 uint16 stepValue, dividerMode, i;
955
956 /* currently supports only fclc */
957 if (config->clockSelect == IfxMultican_ClockSelect_fclc)
958 {
959 {
960 uint16 stepN, stepF;
961 boolean normalDiv;
962 float32 freqN, freqF;
963
964 float32 fsys = IfxScuCcu_getSpbFrequency();
965
966 /* Normal divider mode */
967 stepN = (uint16)__minf(__maxf(0, 1024.0 - (fsys / config->moduleFreq)), 1023);
968 freqN = fsys / (1024 - stepN);
969
970 /* Fractional divider mode */
971 stepF = (uint16)__minf(((config->moduleFreq * 1024) / fsys), 1023);
972 freqF = (fsys * stepF) / 1024;
973
974 normalDiv = (__absf(config->moduleFreq - freqN) <= __absf(config->moduleFreq - freqF));
975
976 stepValue = (normalDiv != 0) ? stepN : stepF;
977 dividerMode = (normalDiv != 0) ? 1 : 2;
978 }
979
980 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
981 IfxScuWdt_clearCpuEndinit(passwd);
982
983 /* Enable module, disregard Sleep Mode request */
984 IfxMultican_enableModule(mcanSFR);
985 IfxMultican_disableSleepMode(mcanSFR);
986
987 /* Wait until module is enabled */
988 while (IfxMultican_isModuleEnabled(mcanSFR) == FALSE)
989 {}
990
991 /* Select the clock input, two writes to the CLKSEL are always necessary */
992 IfxMultican_setInputClock(mcanSFR, IfxMultican_ClockSelect_noClock);
993 IfxMultican_setInputClock(mcanSFR, IfxMultican_ClockSelect_fclc); /* Selects Fclc = Fspb */
994
995 IfxMultican_setFractionalDividerStepValue(mcanSFR, stepValue);
996 IfxMultican_setFractionalDividerMode(mcanSFR, dividerMode);
997 IfxScuWdt_setCpuEndinit(passwd);
998 }
999 else
1000 {}
1001
1002 IfxMultican_waitListReady(mcan->mcan);
1003
1004 /* deinitialise all pending bits */
1005 for (i = 0; i < 8; i++)
1006 {
1007 IfxMultican_clearPendingMessageNotification(mcanSFR, i);
1008 }
1009
1010 /* The position is simply given by the message pending number MPN */
1011 IfxMultican_clearMessagePendingSeletor(mcanSFR);
1012
1013 /* All MO contribute to the calculation of the Message index */
1014 IfxMultican_setMessageIndexMask(mcanSFR, 0xFFFFFFFF);
1015
1016 /* Configure interrupt node pointers */
1017 IfxMultican_SrcId srcId;
1018
1019 for (srcId = IfxMultican_SrcId_0; srcId < IFXMULTICAN_NUM_SRC; srcId++)
1020 {
1021 volatile Ifx_SRC_SRCR *srcPointer = IfxMultican_getSrcPointer(mcanSFR, srcId);
1022 IfxSrc_init(srcPointer, config->nodePointer[srcId].typeOfService, config->nodePointer[srcId].priority);
1023
1024 if (config->nodePointer[srcId].priority)
1025 {
1026 IfxSrc_enable(srcPointer);
1027 }
1028 else
1029 {
1030 IfxSrc_disable(srcPointer);
1031 }
1032 }
1033
1034 return IfxMultican_Status_ok;
1035 }
1036
1037
1038 void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan)
1039 {
1040 IfxMultican_SrcId srcId;
1041 /** - take over module pointer */
1042 config->module = mcan;
1043
1044 /** - Selected input clock is from CLC */
1045 config->clockSelect = IfxMultican_ClockSelect_fclc;
1046
1047 /** - Module frequency is fSPB */
1048 config->moduleFreq = IfxScuCcu_getSpbFrequency();
1049
1050 for (srcId = IfxMultican_SrcId_0; srcId < IFXMULTICAN_NUM_SRC; srcId++)
1051 {
1052 config->nodePointer[srcId].priority = 0;
1053 config->nodePointer[srcId].typeOfService = IfxSrc_Tos_cpu0;
1054 }
1055 }
IfxMultican_Can_Config::moduleFreq
float32 moduleFreq
Required module frequency in Hertz.
Definition: IfxMultican_Can.h:844
IfxMultican_setFractionalDividerMode
IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode)
sets the fractional divider mode
Definition: IfxMultican.h:1596
IfxMultican_MsgObjStatusFlag_transmitEnable0
Transmit enable 0 status flag.
Definition: IfxMultican.h:168
IfxMultican_Status_ok
Definition: IfxMultican.h:194
IfxMultican_Can_FdConfig::loopDelayOffset
uint16 loopDelayOffset
Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay...
Definition: IfxMultican_Can.h:773
IfxMultican_Can_initModuleConfig
void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration.
Definition: IfxMultican_Can.c:1038
IfxMultican_Can_MsgObj::msgObjCount
uint16 msgObjCount
Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base...
Definition: IfxMultican_Can.h:854
IfxMultican_Can_NodeConfig::fdConfig
IfxMultican_Can_FdConfig fdConfig
Specifies CAN FD configuration.
Definition: IfxMultican_Can.h:889
IfxMultican_Can_NodeConfig::frameCounterInterrupt
IfxMultican_Can_InterruptSource frameCounterInterrupt
Frame counter interrupt.
Definition: IfxMultican_Can.h:898
IfxMultican_Status_newData
Definition: IfxMultican.h:203
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxMultican_Can_MsgObjConfig::gatewayConfig
IfxMultican_Can_GatewayConfig gatewayConfig
Structure for gateway configuration.
Definition: IfxMultican_Can.h:873
IfxMultican_Node_setTransceiverDelayCompensation
IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transceiver delay compensation of CAN node x.
Definition: IfxMultican.h:1506
IfxMultican_Can_MsgObj_getConfig
void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration.
Definition: IfxMultican_Can.c:35
IfxMultican_Can_MsgObjConfig::txInterrupt
IfxMultican_Can_InterruptSource txInterrupt
Tx Interrupt configuration.
Definition: IfxMultican_Can.h:871
IfxMultican_Node_getPointer
IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number.
Definition: IfxMultican.h:1402
IfxMultican_Can_MsgObjConfig::frame
IfxMultican_Frame frame
Specifies the frame type.
Definition: IfxMultican_Can.h:866
IfxMultican_Can_MsgObj_isTxPending
boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object.
Definition: IfxMultican_Can.c:624
IfxMultican_Node_setLoopBackMode
IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the loopback mode of CAN node x.
Definition: IfxMultican.h:1488
IfxMultican_MsgObj_clearRxPending
IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object.
Definition: IfxMultican.h:1151
IfxMultican_Can_FdConfig::nominalSynchJumpWidth
uint16 nominalSynchJumpWidth
Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time.
Definition: IfxMultican_Can.h:768
IfxMultican_Can_MsgObjConfig::acceptanceMask
uint32 acceptanceMask
Specifies the acceptance mask.
Definition: IfxMultican_Can.h:867
IfxMultican_MsgObj_setIdentifierExtension
IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension)
Sets identifier extension of message object.
Definition: IfxMultican.h:1282
IfxMultican_MsgObjStatusFlag_receiveUpdating
Receive updating status flag.
Definition: IfxMultican.h:161
IfxMultican_Message
CAN message definition.
Definition: IfxMultican.h:224
IfxMultican_MsgObj_setExtendedDataLength
IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable extended data length of a message object.
Definition: IfxMultican.h:1264
IfxMultican_Can_Node::fastNode
boolean fastNode
CAN FD fast node enable/disable.
Definition: IfxMultican_Can.h:824
IfxMultican_Can_FdConfig::nominalSamplePoint
uint16 nominalSamplePoint
Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:769
IfxScuCcu_getPllErayFrequency
float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:440
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxMultican_Can_NodeConfig::rxPinMode
IfxPort_InputMode rxPinMode
Specifies the receive pin as input mode.
Definition: IfxMultican_Can.h:891
IfxMultican_MsgObj_setSingleDataTransfer
IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single data transfer of a message object.
Definition: IfxMultican.h:1348
IfxMultican_Can_FdConfig::nominalBaudrate
uint32 nominalBaudrate
Specifies the FD nominal baudrate (Nominal Bit Rate)
Definition: IfxMultican_Can.h:767
IfxMultican_MsgObj_setDataLengthCode
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
Sets data length code of a message object.
Definition: IfxMultican.h:1252
IfxMultican_MsgObj_setStatusFlag
void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Sets the selected status flag of a message object.
Definition: IfxMultican.c:581
IfxMultican_Can_Node::mcan
Ifx_CAN * mcan
Specifies the pointer to the MULTICAN module registers.
Definition: IfxMultican_Can.h:821
IfxMultican_setInputClock
IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
Sets the input clock source.
Definition: IfxMultican.h:1608
IfxMultican_MsgObj_setIdentifierCopy
IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable identifier copy of a gateway source message object.
Definition: IfxMultican.h:1276
IfxMultican_Can_MsgObj_readMessage
IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican_Can.c:641
IfxMultican_Frame_transmit
Data frame is generated.
Definition: IfxMultican.h:106
IfxMultican_MsgObj_setGatewayDataFrameSend
IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable gateway data frame send of a gateway source message object which in turn sets the TX...
Definition: IfxMultican.h:1270
IfxMultican_Can_NodeConfig::module
Ifx_CAN * module
pointer to MULTICAN module
Definition: IfxMultican_Can.h:881
IfxMultican_Can_MsgObj_init
IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object.
Definition: IfxMultican_Can.c:61
IfxMultican_MsgObj_setCurrentObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom current pointer of the base message object.
Definition: IfxMultican.h:1240
IfxMultican_Can_MsgObjConfig::control
IfxMultican_Can_MsgObjControl control
Message object control.
Definition: IfxMultican_Can.h:865
IfxMultican_calcTimingFromBTR
void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
Returns the CAN node timing.
Definition: IfxMultican.c:1144
IfxMultican_Can_InterruptSource::enabled
boolean enabled
If true, enables the interrupt generation.
Definition: IfxMultican_Can.h:799
IfxSrc_disable
IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request.
Definition: IfxSrc.h:242
IfxMultican_Can_Config::nodePointer
IfxMultican_Can_InterruptConfig nodePointer[IFXMULTICAN_NUM_SRC]
Node pointer configuration.
Definition: IfxMultican_Can.h:845
IfxMultican_MsgObj_setTransmitInterrupt
IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit interrupt of a message object.
Definition: IfxMultican.h:1366
IfxMultican_MsgObj_isTransmitRequested
IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj)
Returns the TX Request flag of a message object.
Definition: IfxMultican.h:1208
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMultican_Can_NodeConfig::transferInterrupt
IfxMultican_Can_InterruptSource transferInterrupt
Transfer interrupt.
Definition: IfxMultican_Can.h:895
IfxMultican_MsgObjMode_canFD64
CANFD 64 bytes Message Mode.
Definition: IfxMultican.h:151
IfxMultican_Node_setLastErrorCodeInterruptPointer
IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an LEC interrupt of CAN Node x...
Definition: IfxMultican.h:1482
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxMultican_SrcId_0
Service request ID 0.
Definition: IfxMultican_cfg.h:93
IfxMultican_Can_InterruptConfig::priority
uint16 priority
interrupt priority
Definition: IfxMultican_Can.h:791
IfxMultican_MsgObjStatusFlag_messageLost
Message lost status flag.
Definition: IfxMultican.h:163
IfxMultican_Node_activate
IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican.h:1378
IfxMultican_Can_NodeConfig
CAN Node configuration.
Definition: IfxMultican_Can.h:879
IfxMultican_Frame_receive
Data frame is received.
Definition: IfxMultican.h:105
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxMultican_Can_GatewayConfig::copyData
uint32 copyData
Specifies the choice for copying data (data low and data high)
Definition: IfxMultican_Can.h:781
IfxMultican_Node_setFastBitTiming
void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures FBTR register.
Definition: IfxMultican.c:828
IfxMultican_MsgObj_setMessagePendingNumber
IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
Sets message pending number that selects the bit position of the bit in the Message Pending Register ...
Definition: IfxMultican.h:1306
IfxMultican_NodeId_0
Ifx_CAN Node 0.
Definition: IfxMultican_cfg.h:83
IfxMultican_MsgObj_setBitRateSwitch
IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable bit rate switch of a message object.
Definition: IfxMultican.h:1228
IfxMultican_Can_Node::node
Ifx_CAN_N * node
Specifies the pointer to the MULTICAN node registers.
Definition: IfxMultican_Can.h:822
IfxMultican_Can_MsgObj_initConfig
void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters.
Definition: IfxMultican_Can.c:553
IfxMultican_Can_NodeConfig::flexibleDataRate
boolean flexibleDataRate
CANFD enable/disable.
Definition: IfxMultican_Can.h:888
IfxMultican_MsgObj_writeTxfifo
IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:512
IfxMultican_Can_MsgObjControl::matchingId
uint32 matchingId
Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with machin...
Definition: IfxMultican_Can.h:811
IfxMultican_Can_MsgObjConfig::priority
IfxMultican_Priority priority
Specifies the message object priority.
Definition: IfxMultican_Can.h:869
IfxMultican_Node_setAnalyzerMode
IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode)
Enables / Disables the analyzer mode of CAN node x.
Definition: IfxMultican.h:1438
IfxMultican_ClockSelect_fErayPll
E-Ray clock.
Definition: IfxMultican.h:75
IfxMultican_Can_MsgObj_isTransmitRequested
boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object.
Definition: IfxMultican_Can.c:607
IfxMultican_Can_NodeConfig::txPin
IfxMultican_Txd_Out * txPin
Specifies the transmit pin.
Definition: IfxMultican_Can.h:892
IfxMultican_MsgObj_setBottomObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object pointer of the base message object.
Definition: IfxMultican.h:1234
IfxMultican_Can_NodeConfig::synchJumpWidth
uint16 synchJumpWidth
Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:887
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxMultican_MsgObj_readMessage
IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican.c:292
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:91
IfxMultican_Can_FdConfig::fastBaudrate
uint32 fastBaudrate
Specifies the FD fast baudrate (Data Bit rate)
Definition: IfxMultican_Can.h:770
IfxMultican_Node_setErrorWarningLevel
IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level)
Determines the threshold value (warning level, default 96) to be reached in order to set the correspo...
Definition: IfxMultican.h:1444
IfxMultican_MsgObjStatusFlag_transmitEnable1
Transmit enable 1 status flag.
Definition: IfxMultican.h:169
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxMultican_Node_disableConfigurationChange
IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode)
Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
Definition: IfxMultican.h:1390
IfxMultican_Can_GatewayConfig::copyDataLengthCode
uint32 copyDataLengthCode
Specifies the choice for copying data length code.
Definition: IfxMultican_Can.h:780
IfxScuCcu_getOsc0Frequency
float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:412
IfxMultican_MsgObj_setReceiveInterrupt
IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable receive interrupt of a message object.
Definition: IfxMultican.h:1324
IfxMultican_Node_initRxPin
boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node receive pin.
Definition: IfxMultican.c:604
IfxMultican_Can_Node_initConfig
void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration.
Definition: IfxMultican_Can.c:835
IfxMultican_Node_setFrameCounterMode
IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
Sets the operation mode of the frame counter of the CAN Node x.
Definition: IfxMultican.h:1470
IfxMultican_Node_resetErrorCounters
IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode)
Resets the error counters of CAN Node x.
Definition: IfxMultican.h:1414
IfxMultican_Can_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxMultican_Can.h:792
__maxf
#define __maxf
Definition: IfxCpu_IntrinsicsDcc.h:1620
IfxMultican_MsgObj_setRemoteMonitoring
IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable transmit object remote monitoring of a message object.
Definition: IfxMultican.h:1336
IfxMultican_Priority
IfxMultican_Priority
CAN priorities.
Definition: IfxMultican.h:175
IfxMultican_MsgObj_isTxPending
IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj)
Returns the TX pending flag of a message object.
Definition: IfxMultican.h:1215
IfxMultican_FrameCounterMode_timeStampMode
The frame counter is used to count bit times.
Definition: IfxMultican.h:118
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxMultican_MsgObj_setMatchingId
IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId)
Sets acceptance mask for the message IDE bit.
Definition: IfxMultican.h:1288
IfxMultican_Node_initTxPin
boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
Select and initialise the CAN node transmit pin.
Definition: IfxMultican.c:614
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1612
IfxMultican_MsgObj_clearStatusFlag
void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
Clears the selected status flag of a message object.
Definition: IfxMultican.c:75
IfxMultican_Can_GatewayConfig::enableTransmit
uint32 enableTransmit
Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object)...
Definition: IfxMultican_Can.h:783
IfxMultican_MsgObjMode_gatewaySource
Gateway Source Object.
Definition: IfxMultican.h:150
IfxMultican_Can_Config
CAN module configuration.
Definition: IfxMultican_Can.h:840
IfxMultican_Can_Node_getConfig
void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration.
Definition: IfxMultican_Can.c:731
IfxMultican_Node_setTransferInterrupt
IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the transfer interrupt of CAN node x. This interrupt is generated after the succe...
Definition: IfxMultican.h:1518
IfxMultican_Can.h
MULTICAN CAN details.
IfxMultican_Can_NodeConfig::timerInterrupt
IfxMultican_Can_InterruptSource timerInterrupt
Timer Interrupt.
Definition: IfxMultican_Can.h:899
IfxMultican_Can_MsgObj_sendMessage
IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican_Can.c:681
IfxMultican_MsgObjMode_transmitFifoBase
Transmit FIFO Base Object.
Definition: IfxMultican.h:148
IfxMultican_ClockSelect_noClock
No clock supplied.
Definition: IfxMultican.h:72
IfxMultican_Node_setFastNode
IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the flexible data rate of CAN node x.
Definition: IfxMultican.h:1450
IfxScuCcu_getCanFrequency
IFX_INLINE float32 IfxScuCcu_getCanFrequency(void)
API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in C...
Definition: IfxScuCcu.h:1108
IfxMultican_MsgObjStatusFlag_messageDirection
Message direction status flag.
Definition: IfxMultican.h:170
IfxMultican_Can_getModuleFrequency
float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan)
Get the module frequency.
Definition: IfxMultican_Can.c:938
IfxMultican_Can_MsgObjControl::messageLen
IfxMultican_DataLengthCode messageLen
Specifies the length of the transmited data (number of bytes). This value is ignored for receive obje...
Definition: IfxMultican_Can.h:809
IfxMultican_Frame_remoteAnswer
Answer frame is generated on reception of the corresponding remote request.
Definition: IfxMultican.h:108
IfxMultican_Frame_remoteRequest
Remote request frame is generated.
Definition: IfxMultican.h:107
IfxMultican_MsgObj_setMessageId
IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
Sets message identifier of message object.
Definition: IfxMultican.h:1294
IfxMultican_Can_Node_sendToBusOff
void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node)
Sends the CAN node into bus off.
Definition: IfxMultican_Can.c:883
IfxMultican_Can_NodeConfig::loopBackMode
boolean loopBackMode
Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode.
Definition: IfxMultican_Can.h:884
IfxMultican_Can_MsgObjControl::fastBitRate
uint32 fastBitRate
Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate.
Definition: IfxMultican_Can.h:814
IfxMultican_Can_NodeConfig::baudrate
uint32 baudrate
Specifies the baudrate.
Definition: IfxMultican_Can.h:885
IfxMultican_isModuleEnabled
IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan)
Returns the status of module enabled or disabled.
Definition: IfxMultican.h:1590
IfxMultican_MsgObjStatusFlag_newData
New data status flag.
Definition: IfxMultican.h:162
IfxMultican_Can_NodeConfig::txPinMode
IfxPort_OutputMode txPinMode
Specifies the transmit pin output mode.
Definition: IfxMultican_Can.h:893
IfxMultican_MsgObjMode_transmitFifoSlave
Transmit FIFO Slave Object.
Definition: IfxMultican.h:149
IfxMultican_Can_NodeConfig::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMultican_Can.h:900
IfxMultican_MsgObjId
sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.
Definition: IfxMultican.h:60
IfxMultican_MsgObj_setTransmitInterruptNodePointer
IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets transmit interrupt node pointer of message object.
Definition: IfxMultican.h:1372
IfxMultican_Can_MsgObjControl::topMsgObjId
IfxMultican_MsgObjId topMsgObjId
Specifies the ID of the message object with data byte 8 to 35. (CAN FD)
Definition: IfxMultican_Can.h:812
IfxMultican_MsgObj_isRxPending
IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj)
Returns the RX pending flag of a message object.
Definition: IfxMultican.h:1201
IfxMultican_enableModule
IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan)
Enables the module (clears the disable request)
Definition: IfxMultican.h:1560
IfxMultican_Node_setAlertInterruptPointer
IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for an alert interrupt of CAN Node x...
Definition: IfxMultican.h:1432
IfxMultican_getFractionalDividerStepValue
IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan)
Returns the reload or addition value for the result.
Definition: IfxMultican.h:1578
IfxMultican_Can_MsgObjConfig::firstSlaveObjId
IfxMultican_MsgObjId firstSlaveObjId
Message object number of first slave object (bottom pointer)
Definition: IfxMultican_Can.h:874
IfxMultican_MsgObj_clearFifoGatewayPointers
IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj)
Clears the FIFO/GateWay pointers of a message object.
Definition: IfxMultican.h:1145
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxMultican_MsgObjStatusFlag_messageValid
Message valid status flag.
Definition: IfxMultican.h:164
IfxMultican_Can_NodeConfig::analyzerMode
boolean analyzerMode
Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode.
Definition: IfxMultican_Can.h:883
IfxMultican_ClockSelect_fclc
fMULTICAN
Definition: IfxMultican.h:73
IfxMultican_MsgObj_setAcceptanceMask
IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
Sets acceptance mask for the message identifier.
Definition: IfxMultican.h:1222
IfxMultican_Can_MsgObj::node
IfxMultican_Can_Node * node
Specifies the pointer to the node handle.
Definition: IfxMultican_Can.h:852
IfxMultican_MsgObj_setReceiveInterruptNodePointer
IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
Sets receive interrupt node pointer of message object.
Definition: IfxMultican.h:1330
__minf
#define __minf
Definition: IfxCpu_IntrinsicsDcc.h:1616
IfxMultican_getInputClock
IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan)
Returns the selected input clock source.
Definition: IfxMultican.h:1584
IfxMultican_MsgObjStatusFlag_transmitPending
Transmit pending status flag.
Definition: IfxMultican.h:160
IfxMultican_waitListReady
IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
Wait until the list panel is ready.
Definition: IfxMultican.h:1629
IfxMultican_Node_setTransceiverDelayCompensationOffset
IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value)
Sets transceiver delay ompensation offset of CAN node x.
Definition: IfxMultican.h:1512
IfxMultican_Can_MsgObjControl::singleTransmitTrial
uint32 singleTransmitTrial
Specifies the single transmit trial option. If 1, single transmit trial is selected.
Definition: IfxMultican_Can.h:808
IfxMultican_Can_Node_init
IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node.
Definition: IfxMultican_Can.c:748
IfxMultican_Can_MsgObjConfig::messageId
uint32 messageId
Specifies the message ID.
Definition: IfxMultican_Can.h:868
IfxMultican_MsgObjStatusFlag_receiveEnable
Receive enable status flag.
Definition: IfxMultican.h:166
IfxMultican_Can_MsgObjControl::singleDataTransfer
uint32 singleDataTransfer
Specifies the single data transfer option. If 1, single data transfer is selected.
Definition: IfxMultican_Can.h:807
IfxMultican_Can_initModule
IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module The following configuration is used: .
Definition: IfxMultican_Can.c:948
IfxMultican_Priority_CAN_ID
CAN ID.
Definition: IfxMultican.h:178
IfxMultican_clearPendingMessageNotification
IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1542
IfxMultican_Can_GatewayConfig::copyId
uint32 copyId
Specifies the choice for copying id of the message.
Definition: IfxMultican_Can.h:782
IfxMultican_Can_MsgObj
CAN message object handle data structure.
Definition: IfxMultican_Can.h:850
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMultican_MsgObjStatusFlag_receiveTransmitSelected
Receive transmit selected status flag.
Definition: IfxMultican.h:165
IfxMultican_setMessageIndexMask
IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1614
IfxMultican_MsgObjStatusFlag_transmitRequest
Transmit request status flag.
Definition: IfxMultican.h:167
IfxMultican_Node_setFrameCounterInterrupt
IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the CAN frame counter overflow interrupt of CAN node x.
Definition: IfxMultican.h:1458
IfxMultican_Can_InterruptSource::srcId
IfxMultican_SrcId srcId
interrupt node pointer used
Definition: IfxMultican_Can.h:800
IfxMultican_Node_resetControlRegister
IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode)
Resets the control register of CAN Node x.
Definition: IfxMultican.h:1408
IfxMultican_MsgObj_setSingleTransmitTrial
IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable single transmit trial of a message object.
Definition: IfxMultican.h:1354
IfxMultican_setListCommand
void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
Execute a command from the command panel.
Definition: IfxMultican.c:1228
IfxMultican_getFractionalDividerMode
IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan)
Returns the selected fractional divider mode.
Definition: IfxMultican.h:1572
IfxMultican_DataLengthCode_8
8 data bytes
Definition: IfxMultican.h:91
IfxMultican_ClockSelect_fosc0
Oscillator Clock.
Definition: IfxMultican.h:74
IfxMultican_Can_NodeConfig::rxPin
IfxMultican_Rxd_In * rxPin
Specifies the receive pin.
Definition: IfxMultican_Can.h:890
IfxMultican_setFractionalDividerStepValue
IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue)
sets reload or addition value for the result.
Definition: IfxMultican.h:1602
IfxMultican_Can_FdConfig::fastSynchJumpWidth
uint16 fastSynchJumpWidth
Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total ...
Definition: IfxMultican_Can.h:771
IfxMultican_Can_NodeConfig::alertInterrupt
IfxMultican_Can_InterruptSource alertInterrupt
Alert interrupt.
Definition: IfxMultican_Can.h:897
IfxMultican_DataLengthCode
IfxMultican_DataLengthCode
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.
Definition: IfxMultican.h:81
IfxMultican_Node_setTransferInterruptPointer
IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a transfer OK interrupt of CAN Node x...
Definition: IfxMultican.h:1524
IfxMultican_getSrcPointer
volatile Ifx_SRC_SRCR * IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
Get the interrupt source register.
Definition: IfxMultican.c:1203
IfxMultican_MsgObjMode_standard
Standard Message Object.
Definition: IfxMultican.h:146
IfxMultican_MsgObj_getPointer
IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register.
Definition: IfxMultican.h:1189
IfxMultican_Status
IfxMultican_Status
CAN API status definition.
Definition: IfxMultican.h:192
IfxMultican_MsgObj_setPriorityClass
IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
Sets priority class of message object.
Definition: IfxMultican.h:1318
IfxMultican_Can_FdConfig::fastSamplePoint
uint16 fastSamplePoint
Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:772
IfxMultican_Can_Node
CAN node handle data structure.
Definition: IfxMultican_Can.h:819
IfxMultican_Can_NodeConfig::errorWarningLevel
uint8 errorWarningLevel
Specifies the error warinig level.
Definition: IfxMultican_Can.h:894
IfxMultican_clearMessagePendingSeletor
IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan)
clears the message pending interrupt notification of a given list
Definition: IfxMultican.h:1536
IfxMultican_Can_MsgObjConfig::gatewayTransfers
uint32 gatewayTransfers
Specifies the gateway source object (gateway transfres enable / disable choice)
Definition: IfxMultican_Can.h:872
IfxMultican_Can_getConfig
void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration.
Definition: IfxMultican_Can.c:899
IfxMultican_Can
CAN handle data structure.
Definition: IfxMultican_Can.h:833
IfxMultican_Node_setReceiveErrorCounter
IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the receive error counter of CAN node x.
Definition: IfxMultican.h:1494
IfxMultican_MsgObj_getBottomObjectPointer
IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj)
Gets bottom object pointer of the base message object.
Definition: IfxMultican.h:1163
IfxMultican_MsgObj_clearDataRegisters
IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj)
Sets priority class of message object.
Definition: IfxMultican.h:1138
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IFXMULTICAN_NUM_SRC
#define IFXMULTICAN_NUM_SRC
Number of service requests.
Definition: IfxMultican_cfg.h:56
IfxMultican_Can_MsgObj::fifoPointer
IfxMultican_MsgObjId fifoPointer
Pointer for FIFO based transfers.
Definition: IfxMultican_Can.h:855
IfxMultican_MsgObjMode_receiveFifoBase
Receive FIFO Base Object.
Definition: IfxMultican.h:147
IfxMultican_Can_Config::clockSelect
IfxMultican_ClockSelect clockSelect
Selected module input clock.
Definition: IfxMultican_Can.h:843
IfxMultican_Status_wrongPin
Definition: IfxMultican.h:197
IfxMultican_Node_setTransmitErrorCounter
IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
Sets the value of the transmit error counter of CAN node x.
Definition: IfxMultican.h:1530
IfxMultican_Can_NodeConfig::lastErrorCodeInterrupt
IfxMultican_Can_InterruptSource lastErrorCodeInterrupt
Last error code interrupt.
Definition: IfxMultican_Can.h:896
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxMultican_Can_GatewayConfig::gatewayDstObjId
IfxMultican_MsgObjId gatewayDstObjId
Message object number of first slave object (bottom pointer)
Definition: IfxMultican_Can.h:784
IfxMultican_Can_MsgObjControl::extendedFrame
uint32 extendedFrame
Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit I...
Definition: IfxMultican_Can.h:810
IfxMultican_Can_MsgObj_isRxPending
boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object.
Definition: IfxMultican_Can.c:592
IfxMultican_disableSleepMode
IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan)
Disregards the sleep mode of the module.
Definition: IfxMultican.h:1554
IfxMultican_Node_setTimerEventInterruptPointer
IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a timer event interrupt of CAN Node x...
Definition: IfxMultican.h:1500
IfxPort_PadDriver_cmosAutomotiveSpeed2
Speed grade 2.
Definition: IfxPort.h:127
IfxMultican_MsgObj_sendMessage
IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican.c:464
IfxMultican_Node_setNominalBitTiming
void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTEVR register.
Definition: IfxMultican.c:985
IfxMultican_Node_resetInterruptPointers
IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode)
Resets the interrupt pointers of CAN Node x.
Definition: IfxMultican.h:1420
IfxPort_InputMode_pullUp
Definition: IfxPort.h:68
IfxMultican_Can_MsgObjControl::bottomMsgObjId
IfxMultican_MsgObjId bottomMsgObjId
Specifies the ID of the message object with data byte 36 to 63. (CAN FD)
Definition: IfxMultican_Can.h:813
IfxMultican_MsgObj_setDataLengthCodeCopy
IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data length code copy of a gateway source message object.
Definition: IfxMultican.h:1258
IfxMultican_MsgObj_setDataCopy
IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled)
Enable / Disable data copy of a gateway source message object.
Definition: IfxMultican.h:1246
IfxMultican_MsgObj_setSelectObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets bottom object select pointer of the base message object.
Definition: IfxMultican.h:1342
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxMultican_Can_MsgObjConfig
CAN message object configuration.
Definition: IfxMultican_Can.h:860
IfxMultican_MsgObjStatusFlag_receivePending
Receive pending status flag.
Definition: IfxMultican.h:159
IfxMultican_Can_NodeConfig::samplePoint
uint16 samplePoint
Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Definition: IfxMultican_Can.h:886
IfxMultican_Can_MsgObj::msgObjId
IfxMultican_MsgObjId msgObjId
Specifies the message object ID.
Definition: IfxMultican_Can.h:853
IfxMultican_Node_setBitTiming
void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
Calculates the best posible values and configures BTR register.
Definition: IfxMultican.c:668
IfxMultican_Node_setLastErrorCodeInterrupt
IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the last error code interrupt of CAN node x. This interrupt is generated with eac...
Definition: IfxMultican.h:1476
IfxMultican_Node_setAlertInterrupt
IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
Enables / Disables the alert interrupt of CAN node x.
Definition: IfxMultican.h:1426
IfxMultican_Can_MsgObjConfig::rxInterrupt
IfxMultican_Can_InterruptSource rxInterrupt
Rx Interrupt configuration.
Definition: IfxMultican_Can.h:870
IfxMultican_MsgObj_setTopObjectPointer
IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
Sets top object pointer of the base message object.
Definition: IfxMultican.h:1360
IfxMultican_MsgObj_setMessageMode
IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
Sets the message mode of a message object.
Definition: IfxMultican.h:1300
IfxMultican_Node_setFrameCounterInterruptPointer
IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
Selects the interrupt output line INT_Om (m = 0-15) for a frame counter overflow interrupt of CAN Nod...
Definition: IfxMultican.h:1464
IfxMultican_Can_Node::nodeId
IfxMultican_NodeId nodeId
Specifies the node Id.
Definition: IfxMultican_Can.h:823


iLLD_TC26B: IfxMultican_Can.h Source File

  • Multican
  • Can
IfxMultican_Can.h
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_Can.h
3 * \brief MULTICAN CAN details
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Multican_Can_Usage How to use the CAN Interface driver?
25 * \ingroup IfxLld_Multican
26 *
27 * The CAN interface driver provides a default configuration for various modes.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework.
30 *
31 * \section IfxLld_Multican_Can_Preparation Preparation
32 * \subsection IfxLld_Multican_Can_Include Include Files
33 *
34 * Include following header file into your C code:
35 * \code
36 * #include <Multican/Can/IfxMultican_Can.h>
37 * \endcode
38 *
39 * \subsection IfxLld_Multican_Can_Variables Variables
40 *
41 * Declare the CAN handles as global variables in your C code:
42 * \code
43 * // CAN handle
44 * IfxMultican_Can can;
45 *
46 * // Nodes handles
47 * IfxMultican_Can_Node canSrcNode;
48 * IfxMultican_Can_Node canDstNode;
49 *
50 * // Message Object handles
51 * IfxMultican_Can_MsgObj canSrcMsgObj;
52 * IfxMultican_Can_MsgObj canDstMsgObj;
53 *
54 * const unsigned id = 0x100;
55 * \endcode
56 *
57 * \subsection IfxLld_Multican_Can_Init Module Initialisation
58 *
59 * The module initialisation can be done as followed:
60 * only module clock is supported for clock selection as of now
61 * \code
62 * // create configuration
63 * IfxMultican_Can_Config canConfig;
64 * IfxMultican_Can_initModuleConfig(&canConfig, &MODULE_CAN);
65 *
66 * // initialize module
67 * // IfxMultican_Can can; // defined globally
68 * IfxMultican_Can_initModule(&can, &canConfig);
69 * \endcode
70 *
71 * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
72 *
73 * \subsection IfxLld_Multican_Can_InitNode Node Initialisation
74 *
75 * The Can nodes initialisation can be done as followed:
76 *
77 * \code
78 * // create CAN node config
79 * IfxMultican_Can_NodeConfig canNodeConfig;
80 * IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
81 *
82 * canNodeConfig.baudrate = 1000000; // 1 MBaud
83 *
84 * // Source Node
85 * // IfxMultican_Can_Node canSrcNode; // defined globally
86 * {
87 * canNodeConfig.nodeId = IfxMultican_NodeId_0;
88 * canNodeConfig.rxPin = &IIfxMultican_RXD0B_P20_7_IN;
89 * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
90 * canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
91 * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
92 *
93 * // initialise the node
94 * IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
95 * }
96 *
97 * // Destination Node
98 * // IfxMultican_Can_Node canDstNode; // defined globally
99 * {
100 * canNodeConfig.nodeId = IfxMultican_NodeId_1;
101 * canNodeConfig.rxPin = &IfxMultican_RXD1B_P14_1_IN;
102 * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
103 * canNodeConfig.txPin = &IfxMultican_TXD1_P14_0_OUT;
104 * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
105 *
106 * // initialise the node
107 * IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
108 * }
109 * \endcode
110 *
111 * \subsection IfxLld_Multican_Can_InitMessageObject Message Object Initialisation
112 *
113 * The Can message objects initialisation can be done as followed:
114 *
115 * \code
116 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
117 * {
118 * // create message object config
119 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
120 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
121 *
122 * // assigned message object:
123 * canMsgObjConfig.msgObjId = 0;
124 *
125 * canMsgObjConfig.messageId = id; // 'id' is defined globally
126 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
127 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
128 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
129 * canMsgObjConfig.control.extendedFrame = FALSE;
130 * canMsgObjConfig.control.matchingId = TRUE;
131 *
132 * // initialize message object
133 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
134 * }
135 *
136 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
137 * {
138 * // create message object config
139 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
140 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
141 *
142 * // assigned message object:
143 * canMsgObjConfig.msgObjId = 1;
144 *
145 * canMsgObjConfig.messageId = id;
146 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
147 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
148 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
149 * canMsgObjConfig.control.extendedFrame = FALSE;
150 * canMsgObjConfig.control.matchingId = TRUE;
151 *
152 * // initialize message object
153 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
154 * }
155 * \endcode
156 *
157 * The MULTICAN is ready for use now!
158 *
159 *
160 * \section IfxLld_Multican_Can_StandardDataTransfers Single Data Transfers
161 *
162 * The CAN driver provides simple to use transfer functions
163 *
164 * Data can be sent by the following way:
165 * \code
166 * const unsigned dataLow = 0xC0CAC01A;
167 * const unsigned dataHigh = 0xBA5EBA11;
168 *
169 * // Initialise the message strcture
170 * IfxMultican_Message txMsg;
171 * IfxMultican_Message_init(&txMsg, id, dataLow, dataHigh, IfxMultican_DataLengthCode_8);
172 *
173 * // Transmit Data
174 * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
175 * \endcode
176 *
177 * Data can be received by the following way:
178 * \code
179 * // Receiving Data
180 *
181 * // Initialise the message structure with dummy values, will be replaced by the received values
182 * IfxMultican_Message rxMsg;
183 * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
184 *
185 * // wait until Multican received a new message
186 * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
187 *
188 * // read message
189 * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
190 *
191 * // if no new data is been received report an error
192 * if( !( readStatus & IfxMultican_Status_newData ) ) {
193 * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
194 * }
195 * // if a new data is been received but one lost, report the status
196 * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
197 * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
198 * }
199 *
200 * // data now available at rxMsg.data[0] and rxMsg.data[1]
201 * \endcode
202 *
203 *
204 * \section IfxLld_Multican_Can_FIFOBasedTransfers FIFO based Transfers
205 *
206 * A transmit and receive FIFO can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item.
207 * and specifying the message object number of first slave object with the canMsgObjConfig.firstSlaveObjId item.
208 *
209 * Message objects will be allocated to the FIFO in ascending order.
210 *
211 * Here a configuration example:
212 * \code
213 * //add the following defines to your code globally
214 * #define FIFO_SIZE 16
215 * #define FIFO_SIZE 8
216 *
217 *
218 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
219 * {
220 * // create message object config
221 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
222 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
223 *
224 * // FIFO MsgObj allocation:
225 * canMsgObjConfig.msgObjId = 0; // will allocate MsgObj 0
226 * canMsgObjConfig.msgObjCount = FIFO_SIZE/2;
227 * canMsgObjConfig.firstSlaveObjId = 1;
228 *
229 * canMsgObjConfig.messageId = id; // 'id' defined gloabally
230 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
231 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
232 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
233 * canMsgObjConfig.control.extendedFrame = FALSE;
234 * canMsgObjConfig.control.matchingId = TRUE;
235 *
236 * // initialize message object
237 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
238 * }
239 *
240 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
241 * {
242 * // create message object config
243 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
244 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
245 *
246 * // FIFO MsgObj allocation:
247 * canMsgObjConfig.msgObjId = FIFO_SIZE + 1; // avoid clashing with transmit FIFO message objects
248 * canMsgObjConfig.msgObjCount = FIFO_SIZE;
249 *
250 * canMsgObjConfig.firstSlaveObjId = FIFO_SIZE + 2;
251 *
252 * canMsgObjConfig.messageId = id; // 'id' defined gloabally
253 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
254 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
255 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
256 * canMsgObjConfig.control.extendedFrame = FALSE;
257 * canMsgObjConfig.control.matchingId = TRUE;
258 *
259 * // initialize message object
260 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
261 * }
262 * \endcode
263 *
264 * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
265 *
266 * here is a transmit example
267 * \code
268 * IfxMultican_Message txMsg;
269 * for (i = 0; i < FIFO_SIZE; ++i)
270 * {
271 * // Transmit Data from the source message object //
272 *
273 * IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
274 *
275 * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
276 * }
277 * \endcode
278 *
279 * data can be read by the following way
280 * \code
281 * IfxMultican_Message rxMsg;
282 * for (i = 0; i < FIFO_SIZE; ++i)
283 * {
284 * // Receiving Data, read the data from the destination receive Fifo //
285 * // wait until MCAN received the frame
286 * // wait until Multican received a new message
287 * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
288 *
289 *
290 * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
291 *
292 * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
293 * }
294 * \endcode
295 *
296 *
297 * \section IfxLld_Multican_Can_FDDataTransfers CAN FD Data Transfers
298 *
299 * The CAN driver provides simple to use FD transfer functions
300 * After initialising the module, choose the node initialisation as the following
301 * Node configuration:
302 * \code
303 * // create CAN node config
304 * IfxMultican_Can_NodeConfig canNodeConfig;
305 * IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
306 *
307 * canNodeConfig.baudrate = 1000000; // 1 MBaud
308 *
309 * // Source Node
310 * // IfxMultican_Can_Node canSrcNode; // defined globally
311 * {
312 * canNodeConfig.nodeId = IfxMultican_NodeId_0;
313 * canNodeConfig.rxPin = &IfxMultican_RXD0B_P20_7_IN;
314 * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
315 * canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
316 * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
317 *
318 * // choose CAN FD transfer enable or disable //
319 * canNodeConfig.flexibleDataRate = TRUE;
320 *
321 * // if CAN FD enabled choose the FD configuration //
322 * canNodeConfig.fdConfig.nominalBaudrate = 500000;
323 * canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
324 * canNodeConfig.fdConfig.nominalSamplePoint = 2000;
325 * canNodeConfig.fdConfig.fastBaudrate = 1000000;
326 * canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
327 * canNodeConfig.fdConfig.fastSamplePoint = 2000;
328 * canNodeConfig.fdConfig.loopDelayOffset = 0;
329 *
330 * // initialise the node
331 * IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
332 * }
333 *
334 * // Destination Node
335 * // IfxMultican_Can_Node canDstNode; // defined globally
336 * {
337 * canNodeConfig.nodeId = IfxMultican_NodeId_1;
338 * canNodeConfig.rxPin = IfxMultican_RXD1B_P14_1_IN;
339 * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
340 * canNodeConfig.txPin = IfxMultican_TXD1_P14_0_OUT;
341 * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
342 *
343 * // choose CAN FD transfer enable or disable //
344 * config->flexibleDataRate = TRUE;
345 *
346 * // if CAN FD enabled choose the FD configuration //
347 * canNodeConfig.fdConfig.nominalBaudrate = 500000;
348 * canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
349 * canNodeConfig.fdConfig.nominalSamplePoint = 2000;
350 * canNodeConfig.fdConfig.fastBaudrate = 1000000;
351 * canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
352 * canNodeConfig.fdConfig.fastSamplePoint = 2000;
353 * canNodeConfig.fdConfig.loopDelayOffset = 0;
354 *
355 * // initialise the node
356 * IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
357 * }
358 * \endcode
359 *
360 * The CAN FD message objects initialisation can be done as followed:
361 *
362 * \code
363 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
364 * {
365 * // create message object config
366 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
367 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
368 *
369 * // assigned message object:
370 * canMsgObjConfig.msgObjId = 0;
371 *
372 * canMsgObjConfig.messageId = id; // 'id' defined gloabally
373 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
374 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
375 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
376 * canMsgObjConfig.control.extendedFrame = FALSE;
377 * canMsgObjConfig.control.matchingId = TRUE;
378 *
379 * canMsgObjConfig.control.topMsgObjId = 250;
380 * canMsgObjConfig.control.bottomMsgObjId = 251;
381 * canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
382 *
383 * // initialize message object
384 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
385 * }
386 *
387 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
388 * {
389 * // create message object config
390 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
391 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
392 *
393 * // assigned message object:
394 * canMsgObjConfig.msgObjId = 1;
395 *
396 * canMsgObjConfig.messageId = id;
397 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
398 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
399 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
400 * canMsgObjConfig.control.extendedFrame = FALSE;
401 * canMsgObjConfig.control.matchingId = TRUE;
402 *
403 * canMsgObjConfig.control.topMsgObjId = 252;
404 * canMsgObjConfig.control.bottomMsgObjId = 253;
405 * canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
406 *
407 * // initialize message object
408 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
409 * }
410 * \endcode
411 *
412 *
413 * In case of standard messages, data can be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
414 *
415 * In case of long frames of length more than 8 bytes
416 * the data can be sent in the following way
417 *
418 * \code
419 * // load txData buffer with the data that needs to be send
420 * // txData is assumed to be declared globally
421 * int i;
422 * for (i = 0; i < 16; ++i)
423 * {
424 * // uint32 txData[16]; // defined globally
425 * txData[i] = (0x11110000 + i);
426 * }
427 *
428 * // Initialise the message strcture
429 * IfxMultican_Message txMsg;
430 * IfxMultican_Message_longFrameInit(&txMsg, id, IfxMultican_DataLengthCode_64, FALSE);
431 *
432 * // Transmit Data
433 * while( IfxMultican_Can_MsgObj_sendlongFrame(&canSrcMsgObj, &txMsg, txData) == IfxMultican_Status_notSentBusy );
434 * \endcode
435 *
436 * You can recieve the data by the following way
437 *
438 * \code
439 * // Receiving Data
440 *
441 * // Initialise the message strcture with dummy values, will be replaced by the received values
442 * IfxMultican_Message rxMsg;
443 * IfxMultican_Message_longFrameInit(&rxMsg, 0xdead, IfxMultican_DataLengthCode_64, FALSE); // start with invalid values
444 *
445 * // wait until Multican received a new message
446 * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
447 *
448 *
449 * // read the message
450 * //uint32 rxData[16]; //defined globally
451 * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readLongFrame(&canDstMsgObj, &rxMsg, rxData);
452 *
453 * // if no new data is been received report an error
454 * if( !( readStatus & IfxMultican_Status_newData ) ) {
455 * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
456 * }
457 * // if a new data is been received but one lost, report the status
458 * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
459 * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
460 * }
461 *
462 * // clear pending flag
463 * IfxMultican_Can_MsgObj_clearRxPending(&canDstMsgObj);
464 *
465 * // data will be available at rxData
466 * \endcode
467 *
468 *
469 * \section IfxLld_Multican_Can_GatewayTransfers Gateway Transfers
470 * After initialising th emodule and nodes, the gateway message objects can be initialised in the following way
471 *
472 * A Gateway transfers can be enabled during the message object configuration by specifing with the canMsgObjConfig.gatewayTransfersEnable item.
473 *
474 * Here a configuration example:
475 * \code
476 * // source message object
477 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
478 * {
479 * // create message object config
480 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
481 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
482 *
483 * canMsgObjConfig.msgObjId = 0;
484 * canMsgObjConfig.messageId = id; // 'id' defined globally
485 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
486 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
487 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
488 * canMsgObjConfig.control.extendedFrame = FALSE;
489 * canMsgObjConfig.control.matchingId = TRUE;
490 * canMsgObjConfig.gatewayTransfers = FALSE;
491 *
492 * // initialize message object
493 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
494 * }
495 *
496 * // gateway source message object //
497 * // data will be received into this object from SrcObj, and then copied into gateway destination object //
498 * IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
499 * {
500 * // create message object config
501 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
502 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
503 *
504 * canMsgObjConfig.msgObjId = 1;
505 * canMsgObjConfig.messageId = id;
506 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
507 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
508 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
509 * canMsgObjConfig.control.extendedFrame = FALSE;
510 * canMsgObjConfig.control.matchingId = TRUE;
511 * canMsgObjConfig.gatewayTransfers = TRUE;
512 * canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
513 * canMsgObjConfig.gatewayConfig.copyData = TRUE;
514 * canMsgObjConfig.gatewayConfig.copyId = FALSE;
515 * canMsgObjConfig.gatewayConfig.enableTransmit = TRUE; // if this is not choosen, then no need to initialise canDstMsgObj to read the final data
516 * canMsgObjConfig.gatewayConfig.gatewayDstObjId = 3; // specify the destination object number
517 *
518 * // initialize message object
519 * IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
520 * }
521 *
522 * // gateway destination object //
523 * // data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
524 * // and then sent onto the bus for sending the message to destination message object //
525 * IfxMultican_Can_MsgObj canGatewayDstMsgObj;
526 * {
527 * // create message object config
528 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
529 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
530 *
531 * canMsgObjConfig.msgObjId = 3;
532 * canMsgObjConfig.messageId = 0x200;
533 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
534 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
535 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
536 * canMsgObjConfig.control.extendedFrame = FALSE;
537 * canMsgObjConfig.control.matchingId = TRUE;
538 * canMsgObjConfig.gatewayTransfers = FALSE;
539 *
540 * // initialize message object
541 * IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
542 * }
543 *
544 * // destination message object, not needed if enableTransmit is not chosen in gateway source object, or you don't want to read the data//
545 * // data will be received from GatewayDstObj into this obj //
546 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
547 * {
548 * // create message object config
549 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
550 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
551 *
552 * canMsgObjConfig.msgObjId = 10;
553 * canMsgObjConfig.messageId = 0x200;
554 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
555 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
556 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
557 * canMsgObjConfig.control.extendedFrame = FALSE;
558 * canMsgObjConfig.control.matchingId = FALSE;
559 * canMsgObjConfig.gatewayTransfers = FALSE;
560 *
561 * // initialize message object
562 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
563 * }
564 * \endcode
565 *
566 * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
567 *
568 * The data flow is as followed,
569 *
570 * Data will be sent from the source object (canSrcMsgObj), it will be received by the gateway source object (canGatewaySrcMsgObj).
571 * and then gets copied into the gateway destination object (canGatewayDstMsgObj) without CPU intervention,
572 *
573 * If GDFS is selected in gateway source object (canGatewaySrcMsgObj)then,
574 * the data will be transmitted from gateway destination object(canGatewayDstMsgObj) to the destination object (canDstMsgObj)
575 *
576 * \section IfxLld_Multican_Can_Gateway_Fifo_Transfers Gateway FIFO based Transfers
577 * After initialising the module and nodes,
578 *
579 * A gateway FIFO transfers can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item.
580 * and enbling the gateway transfers with the canMsgObjConfig.gatewayTransfersEnable item. and also by selecting the start object of the FIFO with the
581 * canMsgObjConfig.firstSlaveObjId item.
582 *
583 * Message objects will be allocated to the gateway FIFO in ascending order.
584 * Here a configuration example:
585 * \code
586 * // source message object, you can even make it as a Tx FIFO
587 * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
588 * {
589 * // create message object config
590 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
591 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
592 *
593 * canMsgObjConfig.msgObjId = 0;
594 * canMsgObjConfig.messageId = id;
595 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
596 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
597 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
598 * canMsgObjConfig.control.extendedFrame = FALSE;
599 * canMsgObjConfig.control.matchingId = TRUE;
600 * canMsgObjConfig.gatewayTransfers = FALSE;
601 *
602 * // initialize message object
603 * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
604 * }
605 *
606 * // gateway source Fifo //
607 * // data will be received into this object from SrcObj, and then copied into gateway Fifo objects //
608 * IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
609 * {
610 * // create message object config
611 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
612 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
613 *
614 * canMsgObjConfig.msgObjId = 1;
615 * canMsgObjConfig.messageId = id;
616 * canMsgObjConfig.msgObjCount = 4; // FIFO
617 * canMsgObjConfig.firstSlaveObjId = 2; // will allocate MsgObj 2..5 for the gateway FIFO
618 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
619 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
620 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
621 * canMsgObjConfig.control.extendedFrame = FALSE;
622 * canMsgObjConfig.control.matchingId = TRUE;
623 * canMsgObjConfig.gatewayTransfers = TRUE; // gateway FIFO
624 * canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
625 * canMsgObjConfig.gatewayConfig.copyData = TRUE;
626 * canMsgObjConfig.gatewayConfig.copyId = FALSE;
627 * canMsgObjConfig.gatewayConfig.enableTransmit = TRUE;
628 *
629 *
630 *
631 * // initialize message object
632 * IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
633 * }
634 *
635 * int i = 0;
636 * for (i = 0; i < 4 ; ++i)
637 * {
638 * // gateway destination objects //
639 * // data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
640 * // and then sent onto the bus for sending the message to destination receive Fifo message objects //
641 * IfxMultican_Can_MsgObj canGatewayDstMsgObj;
642 * {
643 * // create message object config
644 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
645 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
646 *
647 * canMsgObjConfig.msgObjId = 2 + i;
648 * canMsgObjConfig.messageId = 0x200;
649 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
650 * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
651 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
652 * canMsgObjConfig.control.extendedFrame = FALSE;
653 * canMsgObjConfig.control.matchingId = FALSE;
654 * canMsgObjConfig.gatewayTransfers = FALSE;
655 *
656 * // initialize message object
657 * IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
658 * }
659 * }
660 * // destination receive Fifo,
661 * // data will be received from GatewayDstObj into this Fifo //
662 * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
663 * {
664 * // create message object config
665 * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
666 * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
667 *
668 * canMsgObjConfig.msgObjId = 10;
669 * canMsgObjConfig.messageId = 0x200;
670 * canMsgObjConfig.msgObjCount = 4; // receive FIFO
671 * canMsgObjConfig.firstSlaveObjId = 11; // will allocate MsgObj 11..14 for the receive FIFO
672 * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
673 * canMsgObjConfig.frame = IfxMultican_Frame_receive;
674 * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
675 * canMsgObjConfig.control.extendedFrame = FALSE;
676 * canMsgObjConfig.control.matchingId = FALSE;
677 * canMsgObjConfig.gatewayTransfers = FALSE;
678 * canMsgObjConfig.firstSlaveObjId = 11;
679 *
680 *
681 * // initialize message object
682 * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
683 * }
684 * \endcode
685 *
686 * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
687 * here is a transmit example
688 * \code
689 * for (i = 0; i < 4; ++i)
690 * {
691 * // Transmit Data from the source message object //
692 * IfxMultican_Message txMsg;
693 * IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
694 *
695 * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
696 * }
697 * \endcode
698 *
699 * The data flow is as followed,
700 *
701 * data will be sent from the source object (canSrcMsgObj) or source TX FIFO, it will be received by the gateway source FIFO (canGatewaySrcMsgObj).
702 * and then gets copied into the gateway destination objects (canGatewayDstMsgObj) without CPU intervention,
703 *
704 * If GDFS is selected in gateway source object (FIFO) (canGatewaySrcMsgObj)then,
705 * the data will be transmitted from gateway destination objects (canGatewayDstMsgObj) to the destination objects or receive FIFO (canDstMsgObj)
706 *
707 * data can be read by the following way
708 * \code
709 * for (i = 0; i < 4; ++i)
710 * {
711 * // Receiving Data, read the data from the destination receive Fifo //
712 * // wait until MCAN received the frame
713 * // wait until Multican received a new message
714 * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
715 *
716 * IfxMultican_Message rxMsg;
717 * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
718 *
719 * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
720 *
721 * // if no new data is been received report an error
722 * if( !( readStatus & IfxMultican_Status_newData ) ) {
723 * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
724 * }
725 * // if a new data is been received but one lost, report the status
726 * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
727 * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
728 * }
729 * }
730 * \endcode
731 *
732 * \defgroup IfxLld_Multican_Can CAN
733 * \ingroup IfxLld_Multican
734 * \defgroup IfxLld_Multican_Can_Data_Structures Data structures
735 * \ingroup IfxLld_Multican_Can
736 * \defgroup IfxLld_Multican_Can_General General functions
737 * \ingroup IfxLld_Multican_Can
738 * \defgroup IfxLld_Multican_Can_Node CAN Nodes
739 * \ingroup IfxLld_Multican_Can
740 * \defgroup IfxLld_Multican_Can_Message_Objects Message Objects
741 * \ingroup IfxLld_Multican_Can
742 * \defgroup IfxLld_Multican_Can_Interrupts Interrupts
743 * \ingroup IfxLld_Multican_Can
744 */
745
746 #ifndef IFXMULTICAN_CAN_H
747 #define IFXMULTICAN_CAN_H 1
748
749 /******************************************************************************/
750 /*----------------------------------Includes----------------------------------*/
751 /******************************************************************************/
752
753 #include "Multican/Std/IfxMultican.h"
754 #include "Scu/Std/IfxScuCcu.h"
755 #include "IfxScu_regdef.h"
756
757 /******************************************************************************/
758 /*-----------------------------Data Structures--------------------------------*/
759 /******************************************************************************/
760
761 /** \addtogroup IfxLld_Multican_Can_Data_Structures
762 * \{ */
763 /** \brief Structure for CAN FD configuration
764 */
765 typedef struct
766 {
767 uint32 nominalBaudrate; /**< \brief Specifies the FD nominal baudrate (Nominal Bit Rate) */
768 uint16 nominalSynchJumpWidth; /**< \brief Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time */
769 uint16 nominalSamplePoint; /**< \brief Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
770 uint32 fastBaudrate; /**< \brief Specifies the FD fast baudrate (Data Bit rate) */
771 uint16 fastSynchJumpWidth; /**< \brief Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total fast bit time */
772 uint16 fastSamplePoint; /**< \brief Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
773 uint16 loopDelayOffset; /**< \brief Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15] */
774 } IfxMultican_Can_FdConfig;
775
776 /** \brief Structure for gateway configuration
777 */
778 typedef struct
779 {
780 uint32 copyDataLengthCode : 1; /**< \brief Specifies the choice for copying data length code */
781 uint32 copyData : 1; /**< \brief Specifies the choice for copying data (data low and data high) */
782 uint32 copyId : 1; /**< \brief Specifies the choice for copying id of the message */
783 uint32 enableTransmit : 1; /**< \brief Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object) */
784 IfxMultican_MsgObjId gatewayDstObjId; /**< \brief Message object number of first slave object (bottom pointer) */
785 } IfxMultican_Can_GatewayConfig;
786
787 /** \brief Structure for interrupt configuration
788 */
789 typedef struct
790 {
791 uint16 priority; /**< \brief interrupt priority */
792 IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
793 } IfxMultican_Can_InterruptConfig;
794
795 /** \brief Structure for interrupt source
796 */
797 typedef struct
798 {
799 boolean enabled; /**< \brief If true, enables the interrupt generation */
800 IfxMultican_SrcId srcId; /**< \brief interrupt node pointer used */
801 } IfxMultican_Can_InterruptSource;
802
803 /** \brief Message object control
804 */
805 typedef struct
806 {
807 uint32 singleDataTransfer : 1; /**< \brief Specifies the single data transfer option. If 1, single data transfer is selected */
808 uint32 singleTransmitTrial : 1; /**< \brief Specifies the single transmit trial option. If 1, single transmit trial is selected */
809 IfxMultican_DataLengthCode messageLen; /**< \brief Specifies the length of the transmited data (number of bytes). This value is ignored for receive object */
810 uint32 extendedFrame : 1; /**< \brief Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit ID */
811 uint32 matchingId : 1; /**< \brief Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with maching IDE */
812 IfxMultican_MsgObjId topMsgObjId; /**< \brief Specifies the ID of the message object with data byte 8 to 35. (CAN FD) */
813 IfxMultican_MsgObjId bottomMsgObjId; /**< \brief Specifies the ID of the message object with data byte 36 to 63. (CAN FD) */
814 uint32 fastBitRate : 1; /**< \brief Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate */
815 } IfxMultican_Can_MsgObjControl;
816
817 /** \brief CAN node handle data structure
818 */
819 typedef struct
820 {
821 Ifx_CAN *mcan; /**< \brief Specifies the pointer to the MULTICAN module registers */
822 Ifx_CAN_N *node; /**< \brief Specifies the pointer to the MULTICAN node registers */
823 IfxMultican_NodeId nodeId; /**< \brief Specifies the node Id */
824 boolean fastNode; /**< \brief CAN FD fast node enable/disable */
825 } IfxMultican_Can_Node;
826
827 /** \} */
828
829 /** \addtogroup IfxLld_Multican_Can_Data_Structures
830 * \{ */
831 /** \brief CAN handle data structure
832 */
833 typedef struct
834 {
835 Ifx_CAN *mcan; /**< \brief Specifies the pointer to the MULTICAN module registers */
836 } IfxMultican_Can;
837
838 /** \brief CAN module configuration
839 */
840 typedef struct
841 {
842 Ifx_CAN *module; /**< \brief pointer to MULTICAN module */
843 IfxMultican_ClockSelect clockSelect; /**< \brief Selected module input clock */
844 float32 moduleFreq; /**< \brief Required module frequency in Hertz */
845 IfxMultican_Can_InterruptConfig nodePointer[IFXMULTICAN_NUM_SRC]; /**< \brief Node pointer configuration */
846 } IfxMultican_Can_Config;
847
848 /** \brief CAN message object handle data structure
849 */
850 typedef struct
851 {
852 IfxMultican_Can_Node *node; /**< \brief Specifies the pointer to the node handle */
853 IfxMultican_MsgObjId msgObjId; /**< \brief Specifies the message object ID */
854 uint16 msgObjCount; /**< \brief Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers) */
855 IfxMultican_MsgObjId fifoPointer; /**< \brief Pointer for FIFO based transfers */
856 } IfxMultican_Can_MsgObj;
857
858 /** \brief CAN message object configuration
859 */
860 typedef struct
861 {
862 IfxMultican_Can_Node *node; /**< \brief Specifies the pointer to the node handle */
863 IfxMultican_MsgObjId msgObjId; /**< \brief Specifies the message object ID */
864 uint16 msgObjCount; /**< \brief Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers) */
865 IfxMultican_Can_MsgObjControl control; /**< \brief Message object control */
866 IfxMultican_Frame frame; /**< \brief Specifies the frame type */
867 uint32 acceptanceMask; /**< \brief Specifies the acceptance mask */
868 uint32 messageId; /**< \brief Specifies the message ID */
869 IfxMultican_Priority priority; /**< \brief Specifies the message object priority */
870 IfxMultican_Can_InterruptSource rxInterrupt; /**< \brief Rx Interrupt configuration */
871 IfxMultican_Can_InterruptSource txInterrupt; /**< \brief Tx Interrupt configuration */
872 uint32 gatewayTransfers : 1; /**< \brief Specifies the gateway source object (gateway transfres enable / disable choice) */
873 IfxMultican_Can_GatewayConfig gatewayConfig; /**< \brief Structure for gateway configuration */
874 IfxMultican_MsgObjId firstSlaveObjId; /**< \brief Message object number of first slave object (bottom pointer) */
875 } IfxMultican_Can_MsgObjConfig;
876
877 /** \brief CAN Node configuration
878 */
879 typedef struct
880 {
881 Ifx_CAN *module; /**< \brief pointer to MULTICAN module */
882 IfxMultican_NodeId nodeId; /**< \brief Specifies the node Id */
883 boolean analyzerMode; /**< \brief Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode */
884 boolean loopBackMode; /**< \brief Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode */
885 uint32 baudrate; /**< \brief Specifies the baudrate */
886 uint16 samplePoint; /**< \brief Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
887 uint16 synchJumpWidth; /**< \brief Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
888 boolean flexibleDataRate; /**< \brief CANFD enable/disable */
889 IfxMultican_Can_FdConfig fdConfig; /**< \brief Specifies CAN FD configuration */
890 IfxMultican_Rxd_In *rxPin; /**< \brief Specifies the receive pin */
891 IfxPort_InputMode rxPinMode; /**< \brief Specifies the receive pin as input mode */
892 IfxMultican_Txd_Out *txPin; /**< \brief Specifies the transmit pin */
893 IfxPort_OutputMode txPinMode; /**< \brief Specifies the transmit pin output mode */
894 uint8 errorWarningLevel; /**< \brief Specifies the error warinig level */
895 IfxMultican_Can_InterruptSource transferInterrupt; /**< \brief Transfer interrupt */
896 IfxMultican_Can_InterruptSource lastErrorCodeInterrupt; /**< \brief Last error code interrupt */
897 IfxMultican_Can_InterruptSource alertInterrupt; /**< \brief Alert interrupt */
898 IfxMultican_Can_InterruptSource frameCounterInterrupt; /**< \brief Frame counter interrupt */
899 IfxMultican_Can_InterruptSource timerInterrupt; /**< \brief Timer Interrupt */
900 IfxPort_PadDriver pinDriver;
901 } IfxMultican_Can_NodeConfig;
902
903 /** \} */
904
905 /** \addtogroup IfxLld_Multican_Can_General
906 * \{ */
907
908 /******************************************************************************/
909 /*-------------------------Inline Function Prototypes-------------------------*/
910 /******************************************************************************/
911
912 /** \brief Reset the CAN module.\n
913 * Reset and disable the CAN module, inclusive message object and node registers.
914 * \param mcan pointer to the CAN handle
915 * \return None
916 */
917 IFX_INLINE void IfxMultican_Can_deinit(IfxMultican_Can *mcan);
918
919 /******************************************************************************/
920 /*-------------------------Global Function Prototypes-------------------------*/
921 /******************************************************************************/
922
923 /** \brief Return the actual CAN module configuration
924 * \param mcan pointer to the CAN handle
925 * \param config Pointer to the configuration structure, will be filled by this function
926 * \return None
927 */
928 IFX_EXTERN void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config);
929
930 /** \brief Get the module frequency
931 * \param mcan pointer to the CAN handle
932 * \return Frequency Value
933 */
934 IFX_EXTERN float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan);
935
936 /** \brief Initialize the CAN module\n
937 * The following configuration is used:\n
938 * - The CAN module is stopped during sleep mode\n
939 * - The normal divider mode is selected\n
940 * - The CAN module clock is the system clock
941 * \param mcan pointer to the CAN handle
942 * \param config Specifies pointer to the CAN module configuration
943 * \return Status,: Returns IfxMultican_Status_ok if the operation was successful\n
944 * Returns IfxMultican_Status_notInitialised if the operation was errorneous
945 *
946 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
947 *
948 */
949 IFX_EXTERN IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config);
950
951 /** \brief Return the default MULTICAN configuration
952 * \param config Default configuration filled by this function
953 * \param mcan base address of the MULTICAN register space
954 * \return None
955 *
956 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
957 *
958 */
959 IFX_EXTERN void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan);
960
961 /** \} */
962
963 /** \addtogroup IfxLld_Multican_Can_Node
964 * \{ */
965
966 /******************************************************************************/
967 /*-------------------------Inline Function Prototypes-------------------------*/
968 /******************************************************************************/
969
970 /** \brief Activate the CAN Node. Participate in the CAN bus activities
971 * \param node Specifies the CAN node handle to be configured
972 * \return None
973 */
974 IFX_INLINE void IfxMultican_Can_Node_activate(IfxMultican_Can_Node *node);
975
976 /** \brief Deactivate the CAN Node. Take out from participation in the CAN bus activities
977 * \param node Specifies the CAN node handle to be configured
978 * \return None
979 */
980 IFX_INLINE void IfxMultican_Can_Node_deactivate(IfxMultican_Can_Node *node);
981
982 /** \brief Reset the CAN node
983 * \param node Specifies the CAN node handle to be configured
984 * \return None
985 */
986 IFX_INLINE void IfxMultican_Can_Node_deinit(IfxMultican_Can_Node *node);
987
988 /** \brief Recovers the CAN node from bus off
989 * \param node Specifies the CAN node handle to be configured
990 * \return Status
991 *
992 * IfxMultican_Status status = IfxMultican_Status_busOff;
993 *
994 * while (status != IfxMultican_Status_ok)
995 * {
996 * status = IfxMultican_Can_Node_recoverBusOff(&canNode);
997 * }
998 *
999 */
1000 IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff(IfxMultican_Can_Node *node);
1001
1002 /******************************************************************************/
1003 /*-------------------------Global Function Prototypes-------------------------*/
1004 /******************************************************************************/
1005
1006 /** \brief Get the actual message object configuration
1007 * \param node Specifies the CAN node handle to be configured
1008 * \param config Specifies the CAN node configuration
1009 * \return None
1010 */
1011 IFX_EXTERN void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config);
1012
1013 /** \brief Initialize the CAN node
1014 * \param node Specifies the CAN node handle to be configured
1015 * \param config Specifies the CAN node configuration
1016 * \return Status
1017 *
1018 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1019 *
1020 */
1021 IFX_EXTERN IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config);
1022
1023 /** \brief Get default CAN node configuration
1024 * \param config Specifies the CAN node configuration
1025 * \param mcan pointer to the CAN handle
1026 * \return None
1027 *
1028 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1029 *
1030 */
1031 IFX_EXTERN void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan);
1032
1033 /** \brief Sends the CAN node into bus off
1034 * \param node Specifies the CAN node handle to be configured
1035 * \return None
1036 *
1037 * IfxMultican_Can_Node_sendToBusOff(&canNode);
1038 *
1039 */
1040 IFX_EXTERN void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node);
1041
1042 /** \} */
1043
1044 /** \addtogroup IfxLld_Multican_Can_Message_Objects
1045 * \{ */
1046
1047 /******************************************************************************/
1048 /*-------------------------Inline Function Prototypes-------------------------*/
1049 /******************************************************************************/
1050
1051 /** \brief Cancel pending TX request by invalidating the request\n
1052 * Only when frame transmission has not been started
1053 * \param msgObj pointer to the CAN message object handle
1054 * \return TRUE if cancellation was successfully executed
1055 */
1056 IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend(IfxMultican_Can_MsgObj *msgObj);
1057
1058 /** \brief Clear the RX pending flag of a message object
1059 * \param msgObj pointer to the CAN message object handle
1060 * \return None
1061 *
1062 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1063 *
1064 */
1065 IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending(IfxMultican_Can_MsgObj *msgObj);
1066
1067 /** \brief Clear the TX pending flag of a message object
1068 * \param msgObj pointer to the CAN message object handle
1069 * \return None
1070 *
1071 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1072 *
1073 */
1074 IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending(IfxMultican_Can_MsgObj *msgObj);
1075
1076 /** \brief Reset the message object\n
1077 * Append the message object to the end of idle list and reset message object registers
1078 * \param msgObj pointer to the CAN message object handle
1079 * \return None
1080 */
1081 IFX_INLINE void IfxMultican_Can_MsgObj_deinit(IfxMultican_Can_MsgObj *msgObj);
1082
1083 /** \brief Get message object ID which has TX/RX pending flag from a message object group
1084 * \param msgObj pointer to the CAN message object handle
1085 * \param msgObjGroup Message object group
1086 * \return Message Object Id
1087 */
1088 IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId(IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup);
1089
1090 /** \brief Get the message object status
1091 * \param msgObj pointer to the CAN message object handle
1092 * \return \ref IfxMultican_MsgObjStat bitfield
1093 *
1094 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1095 *
1096 */
1097 IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus(IfxMultican_Can_MsgObj *msgObj);
1098
1099 /** \brief Read a received CAN message
1100 * \param msgObj pointer to the CAN message object handle
1101 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
1102 * \param data Pointer to data (in words)
1103 * \return IfxMultican_Status_newData: if the operation was successful\n
1104 * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
1105 * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
1106 * IfxMultican_Status_receiveEmpty: if no message is been received
1107 *
1108 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1109 *
1110 */
1111 IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data);
1112
1113 /** \brief Read a received CAN message
1114 * \param msgObj pointer to the CAN message object handle
1115 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
1116 * \param data Pointer to data (in words)
1117 * \return IfxMultican_Status_ok: if the operation was successful
1118 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1119 *
1120 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1121 *
1122 */
1123 IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data);
1124
1125 /******************************************************************************/
1126 /*-------------------------Global Function Prototypes-------------------------*/
1127 /******************************************************************************/
1128
1129 /** \brief Get the actual message object configuration
1130 * \param msgObj pointer to the CAN message object handle
1131 * \param config Pointer to the RAM buffer. Filled by this function
1132 * \return None
1133 */
1134 IFX_EXTERN void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config);
1135
1136 /** \brief Initialize the message object
1137 * \param msgObj pointer to the CAN message object handle
1138 * \param config pointer to the CAN message object configuration
1139 * \return Status
1140 *
1141 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1142 *
1143 */
1144 IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config);
1145
1146 /** \brief Initialise message config with default values and the given parameters
1147 * \param config pointer to the CAN message object configuration
1148 * \param node pointer to the CAN node handle to which the message object should be assigned
1149 * \return None
1150 *
1151 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1152 *
1153 */
1154 IFX_EXTERN void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node);
1155
1156 /** \brief Returns the RX pending flag of a message object.
1157 * \param msgObj pointer to the CAN message object handle
1158 * \return TRUE of the RX pending flag of a message object is set
1159 */
1160 IFX_EXTERN boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj);
1161
1162 /** \brief Returns the TX Request flag of a message object.
1163 * \param msgObj pointer to the CAN message object handle
1164 * \return TRUE of the TX Request flag of a message object is set
1165 */
1166 IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj);
1167
1168 /** \brief Returns the TX pending flag of a message object.
1169 * \param msgObj pointer to the CAN message object handle
1170 * \return TRUE of the TX pending flag of a message object is set
1171 */
1172 IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj);
1173
1174 /** \brief Read a received CAN message
1175 * \param msgObj pointer to the CAN message object handle
1176 * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
1177 * \return IfxMultican_Status_newData: if the operation was successful\n
1178 * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
1179 * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
1180 * IfxMultican_Status_receiveEmpty: if no message is been received
1181 *
1182 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1183 *
1184 */
1185 IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg);
1186
1187 /** \brief Send a CAN message
1188 * \param msgObj pointer to the CAN message object handle
1189 * \param msg Specifies the msg to be send
1190 * \return IfxMultican_Status_ok: if the operation was successful\n
1191 * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
1192 *
1193 * A coding example can be found in \ref IfxLld_Multican_Can_Usage
1194 *
1195 */
1196 IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg);
1197
1198 /** \} */
1199
1200 /******************************************************************************/
1201 /*---------------------Inline Function Implementations------------------------*/
1202 /******************************************************************************/
1203
1204 IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend(IfxMultican_Can_MsgObj *msgObj)
1205 {
1206 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
1207
1208 return IfxMultican_MsgObj_cancelSend(hwObj);
1209 }
1210
1211
1212 IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending(IfxMultican_Can_MsgObj *msgObj)
1213 {
1214 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
1215
1216 IfxMultican_MsgObj_clearRxPending(hwObj);
1217 }
1218
1219
1220 IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending(IfxMultican_Can_MsgObj *msgObj)
1221 {
1222 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
1223
1224 IfxMultican_MsgObj_clearTxPending(hwObj);
1225 }
1226
1227
1228 IFX_INLINE void IfxMultican_Can_MsgObj_deinit(IfxMultican_Can_MsgObj *msgObj)
1229 {
1230 IfxMultican_MsgObj_deinit(msgObj->node->mcan, msgObj->msgObjId);
1231 }
1232
1233
1234 IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId(IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
1235 {
1236 return IfxMultican_MsgObj_getPendingId(msgObj->node->mcan, msgObjGroup);
1237 }
1238
1239
1240 IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus(IfxMultican_Can_MsgObj *msgObj)
1241 {
1242 Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
1243
1244 return IfxMultican_MsgObj_getStatus(hwObj);
1245 }
1246
1247
1248 IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
1249 {
1250 return IfxMultican_MsgObj_readLongFrame(msgObj->node->mcan, msgObj->msgObjId, msg, data);
1251 }
1252
1253
1254 IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
1255 {
1256 return IfxMultican_MsgObj_sendLongFrame(msgObj->node->mcan, msgObj->msgObjId, msg, data);
1257 }
1258
1259
1260 IFX_INLINE void IfxMultican_Can_Node_activate(IfxMultican_Can_Node *node)
1261 {
1262 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
1263
1264 IfxMultican_Node_activate(hwNode);
1265 }
1266
1267
1268 IFX_INLINE void IfxMultican_Can_Node_deactivate(IfxMultican_Can_Node *node)
1269 {
1270 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
1271 IfxMultican_Node_deactivate(hwNode);
1272 }
1273
1274
1275 IFX_INLINE void IfxMultican_Can_Node_deinit(IfxMultican_Can_Node *node)
1276 {
1277 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
1278
1279 IfxMultican_Node_deinit(hwNode);
1280 }
1281
1282
1283 IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff(IfxMultican_Can_Node *node)
1284 {
1285 Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
1286
1287 return IfxMultican_Node_recoverBusOff(hwNode);
1288 }
1289
1290
1291 IFX_INLINE void IfxMultican_Can_deinit(IfxMultican_Can *mcan)
1292 {
1293 IfxMultican_deinit(mcan->mcan);
1294 }
1295
1296
1297 #endif /* IFXMULTICAN_CAN_H */
IfxMultican_Can_Config::moduleFreq
float32 moduleFreq
Required module frequency in Hertz.
Definition: IfxMultican_Can.h:844
IfxMultican_Can_FdConfig::loopDelayOffset
uint16 loopDelayOffset
Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay...
Definition: IfxMultican_Can.h:773
IfxMultican_Can_initModuleConfig
IFX_EXTERN void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan)
Return the default MULTICAN configuration.
Definition: IfxMultican_Can.c:1038
IfxMultican_Can_MsgObj::msgObjCount
uint16 msgObjCount
Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base...
Definition: IfxMultican_Can.h:854
IfxMultican_Can_NodeConfig::fdConfig
IfxMultican_Can_FdConfig fdConfig
Specifies CAN FD configuration.
Definition: IfxMultican_Can.h:889
IfxMultican_Can_NodeConfig::frameCounterInterrupt
IfxMultican_Can_InterruptSource frameCounterInterrupt
Frame counter interrupt.
Definition: IfxMultican_Can.h:898
IfxMultican_Can_MsgObjConfig::gatewayConfig
IfxMultican_Can_GatewayConfig gatewayConfig
Structure for gateway configuration.
Definition: IfxMultican_Can.h:873
IfxMultican_Can_MsgObj_getConfig
IFX_EXTERN void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
Get the actual message object configuration.
Definition: IfxMultican_Can.c:35
IfxMultican_Can_MsgObjConfig::txInterrupt
IfxMultican_Can_InterruptSource txInterrupt
Tx Interrupt configuration.
Definition: IfxMultican_Can.h:871
IfxMultican_Node_getPointer
IFX_INLINE Ifx_CAN_N * IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
Returns the base address to a given CAN node number.
Definition: IfxMultican.h:1402
IfxMultican_Can_MsgObjConfig::frame
IfxMultican_Frame frame
Specifies the frame type.
Definition: IfxMultican_Can.h:866
IfxMultican_Can_MsgObj_isTxPending
IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj)
Returns the TX pending flag of a message object.
Definition: IfxMultican_Can.c:624
IfxMultican_MsgObj_clearRxPending
IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
Clear the RX pending flag of a message object.
Definition: IfxMultican.h:1151
IfxMultican_Can_FdConfig::nominalSynchJumpWidth
uint16 nominalSynchJumpWidth
Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time.
Definition: IfxMultican_Can.h:768
IfxMultican_Node_recoverBusOff
IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
Recovers the CAN node from bus off.
Definition: IfxMultican.c:623
IfxMultican_Can_MsgObjConfig::acceptanceMask
uint32 acceptanceMask
Specifies the acceptance mask.
Definition: IfxMultican_Can.h:867
IfxMultican_MsgObj_getStatus
IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
Get the message object status.
Definition: IfxMultican.c:212
IfxMultican_Message
CAN message definition.
Definition: IfxMultican.h:224
IfxMultican_Can_Node::fastNode
boolean fastNode
CAN FD fast node enable/disable.
Definition: IfxMultican_Can.h:824
IfxMultican_Can_FdConfig::nominalSamplePoint
uint16 nominalSamplePoint
Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:769
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:39
IfxMultican_Can_NodeConfig::rxPinMode
IfxPort_InputMode rxPinMode
Specifies the receive pin as input mode.
Definition: IfxMultican_Can.h:891
IfxMultican_Can_FdConfig::nominalBaudrate
uint32 nominalBaudrate
Specifies the FD nominal baudrate (Nominal Bit Rate)
Definition: IfxMultican_Can.h:767
IfxMultican_Can_Node::mcan
Ifx_CAN * mcan
Specifies the pointer to the MULTICAN module registers.
Definition: IfxMultican_Can.h:821
IfxMultican_Can_MsgObj_readMessage
IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
Read a received CAN message.
Definition: IfxMultican_Can.c:641
IfxMultican_Can_MsgObj_deinit
IFX_INLINE void IfxMultican_Can_MsgObj_deinit(IfxMultican_Can_MsgObj *msgObj)
Reset the message object Append the message object to the end of idle list and reset message object r...
Definition: IfxMultican_Can.h:1228
IfxMultican_Can_Config::module
Ifx_CAN * module
pointer to MULTICAN module
Definition: IfxMultican_Can.h:842
IfxMultican_Can_deinit
IFX_INLINE void IfxMultican_Can_deinit(IfxMultican_Can *mcan)
Reset the CAN module. Reset and disable the CAN module, inclusive message object and node registers...
Definition: IfxMultican_Can.h:1291
IfxMultican_Can_MsgObj_init
IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
Initialize the message object.
Definition: IfxMultican_Can.c:61
IfxMultican_MsgObj_cancelSend
boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
Cancel pending TX request by invalidating the request, only when frame transmission has not been star...
Definition: IfxMultican.c:55
IfxMultican_Can_MsgObjConfig::control
IfxMultican_Can_MsgObjControl control
Message object control.
Definition: IfxMultican_Can.h:865
IfxMultican_Can_InterruptSource::enabled
boolean enabled
If true, enables the interrupt generation.
Definition: IfxMultican_Can.h:799
IfxMultican_Can_MsgObj_getPendingId
IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId(IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group.
Definition: IfxMultican_Can.h:1234
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxMultican_Can_NodeConfig::transferInterrupt
IfxMultican_Can_InterruptSource transferInterrupt
Transfer interrupt.
Definition: IfxMultican_Can.h:895
float32
float float32
Definition: Platform_Types.h:167
IfxMultican_Can_InterruptConfig::priority
uint16 priority
interrupt priority
Definition: IfxMultican_Can.h:791
IfxMultican_Can_InterruptConfig
Structure for interrupt configuration.
Definition: IfxMultican_Can.h:789
IfxMultican_Node_activate
IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican.h:1378
IfxMultican_Can_NodeConfig
CAN Node configuration.
Definition: IfxMultican_Can.h:879
IfxMultican_Node_deinit
void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
Reset the CAN node.
Definition: IfxMultican.c:592
IfxMultican_Can_GatewayConfig::copyData
uint32 copyData
Specifies the choice for copying data (data low and data high)
Definition: IfxMultican_Can.h:781
IfxMultican_Can_Node::node
Ifx_CAN_N * node
Specifies the pointer to the MULTICAN node registers.
Definition: IfxMultican_Can.h:822
IfxMultican_Can_MsgObj_initConfig
IFX_EXTERN void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
Initialise message config with default values and the given parameters.
Definition: IfxMultican_Can.c:553
IfxMultican_Can_NodeConfig::flexibleDataRate
boolean flexibleDataRate
CANFD enable/disable.
Definition: IfxMultican_Can.h:888
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxMultican_Can_MsgObjControl::matchingId
uint32 matchingId
Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with machin...
Definition: IfxMultican_Can.h:811
IfxMultican_Can_MsgObjConfig::priority
IfxMultican_Priority priority
Specifies the message object priority.
Definition: IfxMultican_Can.h:869
IfxMultican_Can_MsgObj_isTransmitRequested
IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj)
Returns the TX Request flag of a message object.
Definition: IfxMultican_Can.c:607
IfxMultican_Can_NodeConfig::txPin
IfxMultican_Txd_Out * txPin
Specifies the transmit pin.
Definition: IfxMultican_Can.h:892
IfxMultican_Can_NodeConfig::synchJumpWidth
uint16 synchJumpWidth
Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:887
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:91
IfxMultican_Can_FdConfig::fastBaudrate
uint32 fastBaudrate
Specifies the FD fast baudrate (Data Bit rate)
Definition: IfxMultican_Can.h:770
IfxMultican_NodeId
IfxMultican_NodeId
CAN Nodes definition
Definition: IfxMultican_cfg.h:80
IfxMultican_Can_GatewayConfig::copyDataLengthCode
uint32 copyDataLengthCode
Specifies the choice for copying data length code.
Definition: IfxMultican_Can.h:780
IfxMultican_Node_deactivate
IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
Deactivate the CAN Node. Take out from participation in the CAN bus activities.
Definition: IfxMultican.h:1384
IfxMultican_MsgObj_sendLongFrame
IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Send a CAN Long frame message.
Definition: IfxMultican.c:344
IfxMultican_MsgObj_clearTxPending
IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj)
Clear the TX pending flag of a message object.
Definition: IfxMultican.h:1157
IfxMultican_Can_MsgObj_sendLongFrame
IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message.
Definition: IfxMultican_Can.h:1254
IfxMultican_Can_Node_initConfig
IFX_EXTERN void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
Get default CAN node configuration.
Definition: IfxMultican_Can.c:835
IfxMultican_Can_InterruptConfig::typeOfService
IfxSrc_Tos typeOfService
type of interrupt service
Definition: IfxMultican_Can.h:792
IfxMultican_Priority
IfxMultican_Priority
CAN priorities.
Definition: IfxMultican.h:175
IfxMultican_MsgObj_getPendingId
IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
Get message object ID which has TX/RX pending flag from a message object group.
Definition: IfxMultican.c:197
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxMultican_Can_GatewayConfig::enableTransmit
uint32 enableTransmit
Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object)...
Definition: IfxMultican_Can.h:783
IfxMultican_Can_Config
CAN module configuration.
Definition: IfxMultican_Can.h:840
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxMultican_Can_Node_getConfig
IFX_EXTERN void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
Get the actual message object configuration.
Definition: IfxMultican_Can.c:731
IfxMultican_Can_NodeConfig::timerInterrupt
IfxMultican_Can_InterruptSource timerInterrupt
Timer Interrupt.
Definition: IfxMultican_Can.h:899
IfxMultican_Can_MsgObj_sendMessage
IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
Send a CAN message.
Definition: IfxMultican_Can.c:681
IfxMultican_ClockSelect
IfxMultican_ClockSelect
CAN input clock selection.
Definition: IfxMultican.h:70
IfxMultican_MsgObj_readLongFrame
IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
Read a received CAN long frame.
Definition: IfxMultican.c:230
IfxMultican_Can_getModuleFrequency
IFX_EXTERN float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan)
Get the module frequency.
Definition: IfxMultican_Can.c:938
IfxMultican_Can_MsgObjControl::messageLen
IfxMultican_DataLengthCode messageLen
Specifies the length of the transmited data (number of bytes). This value is ignored for receive obje...
Definition: IfxMultican_Can.h:809
IfxMultican_Can_Node_deactivate
IFX_INLINE void IfxMultican_Can_Node_deactivate(IfxMultican_Can_Node *node)
Deactivate the CAN Node. Take out from participation in the CAN bus activities.
Definition: IfxMultican_Can.h:1268
IfxMultican_Can_Node_sendToBusOff
IFX_EXTERN void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node)
Sends the CAN node into bus off.
Definition: IfxMultican_Can.c:883
IfxMultican_Can_NodeConfig::loopBackMode
boolean loopBackMode
Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode.
Definition: IfxMultican_Can.h:884
IfxMultican_Can_MsgObjControl::fastBitRate
uint32 fastBitRate
Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate.
Definition: IfxMultican_Can.h:814
IfxMultican_Can_NodeConfig::baudrate
uint32 baudrate
Specifies the baudrate.
Definition: IfxMultican_Can.h:885
IfxMultican.h
MULTICAN basic functionality.
IfxMultican_Can_NodeConfig::txPinMode
IfxPort_OutputMode txPinMode
Specifies the transmit pin output mode.
Definition: IfxMultican_Can.h:893
IfxMultican_Can_NodeConfig::pinDriver
IfxPort_PadDriver pinDriver
Definition: IfxMultican_Can.h:900
IfxMultican_Can_MsgObj_clearTxPending
IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending(IfxMultican_Can_MsgObj *msgObj)
Clear the TX pending flag of a message object.
Definition: IfxMultican_Can.h:1220
IfxMultican_MsgObjId
sint32 IfxMultican_MsgObjId
Message object ID, 0 .. IFXMULTICAN_NUM_MESSAGE_OBJECTS.
Definition: IfxMultican.h:60
IfxMultican_Can_MsgObjControl::topMsgObjId
IfxMultican_MsgObjId topMsgObjId
Specifies the ID of the message object with data byte 8 to 35. (CAN FD)
Definition: IfxMultican_Can.h:812
IfxMultican_Can_MsgObjConfig::firstSlaveObjId
IfxMultican_MsgObjId firstSlaveObjId
Message object number of first slave object (bottom pointer)
Definition: IfxMultican_Can.h:874
IfxMultican_Can_InterruptSource
Structure for interrupt source.
Definition: IfxMultican_Can.h:797
IfxMultican_Can_FdConfig
Structure for CAN FD configuration.
Definition: IfxMultican_Can.h:765
IfxMultican_Can_MsgObj_readLongFrame
IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
Read a received CAN message.
Definition: IfxMultican_Can.h:1248
IfxMultican_Can_NodeConfig::analyzerMode
boolean analyzerMode
Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode.
Definition: IfxMultican_Can.h:883
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:48
IfxMultican_Can_MsgObj::node
IfxMultican_Can_Node * node
Specifies the pointer to the node handle.
Definition: IfxMultican_Can.h:852
IfxMultican_Can_Node_deinit
IFX_INLINE void IfxMultican_Can_Node_deinit(IfxMultican_Can_Node *node)
Reset the CAN node.
Definition: IfxMultican_Can.h:1275
IfxMultican_Can_GatewayConfig
Structure for gateway configuration.
Definition: IfxMultican_Can.h:778
IfxMultican_Can_MsgObj_getStatus
IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus(IfxMultican_Can_MsgObj *msgObj)
Get the message object status.
Definition: IfxMultican_Can.h:1240
IfxMultican_MsgObjGroup
IfxMultican_MsgObjGroup
CAN message object group Each group consists of 32 consecutive message objects.
Definition: IfxMultican.h:130
IfxMultican_Can_MsgObjControl::singleTransmitTrial
uint32 singleTransmitTrial
Specifies the single transmit trial option. If 1, single transmit trial is selected.
Definition: IfxMultican_Can.h:808
IfxMultican_Can_MsgObj_clearRxPending
IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending(IfxMultican_Can_MsgObj *msgObj)
Clear the RX pending flag of a message object.
Definition: IfxMultican_Can.h:1212
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxMultican_MsgObjStat
Message object status bit-fields.
Definition: IfxMultican.h:234
IfxMultican_Can_Node_init
IFX_EXTERN IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
Initialize the CAN node.
Definition: IfxMultican_Can.c:748
IfxMultican_Can_MsgObjConfig::messageId
uint32 messageId
Specifies the message ID.
Definition: IfxMultican_Can.h:868
IfxMultican_Can_MsgObjControl::singleDataTransfer
uint32 singleDataTransfer
Specifies the single data transfer option. If 1, single data transfer is selected.
Definition: IfxMultican_Can.h:807
IfxMultican_Can_initModule
IFX_EXTERN IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
Initialize the CAN module The following configuration is used: .
Definition: IfxMultican_Can.c:948
IfxMultican_deinit
void IfxMultican_deinit(Ifx_CAN *mcan)
Reset the CAN module Reset and disable the CAN module, inclusive message object and node registers...
Definition: IfxMultican.c:1161
IfxMultican_Can_GatewayConfig::copyId
uint32 copyId
Specifies the choice for copying id of the message.
Definition: IfxMultican_Can.h:782
IfxMultican_Can_MsgObj
CAN message object handle data structure.
Definition: IfxMultican_Can.h:850
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxMultican_Can_InterruptSource::srcId
IfxMultican_SrcId srcId
interrupt node pointer used
Definition: IfxMultican_Can.h:800
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxMultican_Can_NodeConfig::rxPin
IfxMultican_Rxd_In * rxPin
Specifies the receive pin.
Definition: IfxMultican_Can.h:890
IfxMultican_Can_FdConfig::fastSynchJumpWidth
uint16 fastSynchJumpWidth
Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total ...
Definition: IfxMultican_Can.h:771
IfxMultican_Can_NodeConfig::alertInterrupt
IfxMultican_Can_InterruptSource alertInterrupt
Alert interrupt.
Definition: IfxMultican_Can.h:897
IfxMultican_DataLengthCode
IfxMultican_DataLengthCode
CAN frame data length code Definition in Ifx_CAN.MOFCRx.DLC.
Definition: IfxMultican.h:81
IfxMultican_Can_MsgObj_cancelSend
IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend(IfxMultican_Can_MsgObj *msgObj)
Cancel pending TX request by invalidating the request Only when frame transmission has not been start...
Definition: IfxMultican_Can.h:1204
IfxMultican_MsgObj_getPointer
IFX_INLINE Ifx_CAN_MO * IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Get base address of a message object register.
Definition: IfxMultican.h:1189
IfxMultican_MsgObj_deinit
void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
Reset the message object Append the message object to the end of idle list and reset message object r...
Definition: IfxMultican.c:85
IfxMultican_Status
IfxMultican_Status
CAN API status definition.
Definition: IfxMultican.h:192
IfxMultican_Can_FdConfig::fastSamplePoint
uint16 fastSamplePoint
Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time...
Definition: IfxMultican_Can.h:772
IfxMultican_Can_Node
CAN node handle data structure.
Definition: IfxMultican_Can.h:819
IfxMultican_Can_NodeConfig::errorWarningLevel
uint8 errorWarningLevel
Specifies the error warinig level.
Definition: IfxMultican_Can.h:894
IfxMultican_Can_MsgObjConfig::gatewayTransfers
uint32 gatewayTransfers
Specifies the gateway source object (gateway transfres enable / disable choice)
Definition: IfxMultican_Can.h:872
IfxMultican_Can_getConfig
IFX_EXTERN void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
Return the actual CAN module configuration.
Definition: IfxMultican_Can.c:899
IfxMultican_Can
CAN handle data structure.
Definition: IfxMultican_Can.h:833
IFXMULTICAN_NUM_SRC
#define IFXMULTICAN_NUM_SRC
Number of service requests.
Definition: IfxMultican_cfg.h:56
IfxMultican_Can_MsgObj::fifoPointer
IfxMultican_MsgObjId fifoPointer
Pointer for FIFO based transfers.
Definition: IfxMultican_Can.h:855
IfxMultican_Can_Config::clockSelect
IfxMultican_ClockSelect clockSelect
Selected module input clock.
Definition: IfxMultican_Can.h:843
IfxMultican_Can_Node_activate
IFX_INLINE void IfxMultican_Can_Node_activate(IfxMultican_Can_Node *node)
Activate the CAN Node. Participate in the CAN bus activities.
Definition: IfxMultican_Can.h:1260
IfxMultican_Can_NodeConfig::lastErrorCodeInterrupt
IfxMultican_Can_InterruptSource lastErrorCodeInterrupt
Last error code interrupt.
Definition: IfxMultican_Can.h:896
IfxMultican_Can_GatewayConfig::gatewayDstObjId
IfxMultican_MsgObjId gatewayDstObjId
Message object number of first slave object (bottom pointer)
Definition: IfxMultican_Can.h:784
IfxMultican_Can_MsgObjControl::extendedFrame
uint32 extendedFrame
Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit I...
Definition: IfxMultican_Can.h:810
IfxMultican_Can_MsgObj_isRxPending
IFX_EXTERN boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj)
Returns the RX pending flag of a message object.
Definition: IfxMultican_Can.c:592
IfxMultican_Can_MsgObjControl
Message object control.
Definition: IfxMultican_Can.h:805
IfxMultican_Frame
IfxMultican_Frame
CAN frame type.
Definition: IfxMultican.h:103
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxMultican_Can_MsgObjControl::bottomMsgObjId
IfxMultican_MsgObjId bottomMsgObjId
Specifies the ID of the message object with data byte 36 to 63. (CAN FD)
Definition: IfxMultican_Can.h:813
IfxMultican_Can_MsgObjConfig
CAN message object configuration.
Definition: IfxMultican_Can.h:860
IfxMultican_Can_NodeConfig::samplePoint
uint16 samplePoint
Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
Definition: IfxMultican_Can.h:886
IfxMultican_Can_MsgObj::msgObjId
IfxMultican_MsgObjId msgObjId
Specifies the message object ID.
Definition: IfxMultican_Can.h:853
IfxMultican_Can_MsgObjConfig::rxInterrupt
IfxMultican_Can_InterruptSource rxInterrupt
Rx Interrupt configuration.
Definition: IfxMultican_Can.h:870
IfxMultican_Can_Node_recoverBusOff
IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff(IfxMultican_Can_Node *node)
Recovers the CAN node from bus off.
Definition: IfxMultican_Can.h:1283
IfxMultican_Can_Node::nodeId
IfxMultican_NodeId nodeId
Specifies the node Id.
Definition: IfxMultican_Can.h:823


iLLD_TC26B: IfxMultican_PinMap.c Source File

  • _PinMap
IfxMultican_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_PinMap.c
3 * \brief MULTICAN I/O map
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxMultican_PinMap.h"
27
28 IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a};
29 IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b};
30 IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 4}, Ifx_RxSel_d};
31 IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e};
32 IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a};
33 IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b};
34 IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 1}, Ifx_RxSel_d};
35 IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a};
36 IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b};
37 IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d};
38 IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e};
39 IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a};
40 IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b};
41 IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c};
42 IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d};
43 IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e};
44 IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5};
45 IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2};
46 IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5};
47 IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5};
48 IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5};
49 IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5};
50 IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5};
51 IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5};
52 IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6};
53 IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5};
54 IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5};
55 IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5};
56 IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5};
57 IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5};
58 IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5};
59 IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5};
60
61
62 const IfxMultican_Rxd_In *IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS] = {
63 {
64 {
65 &IfxMultican_RXD0A_P02_1_IN,
66 &IfxMultican_RXD0B_P20_7_IN,
67 NULL_PTR,
68 &IfxMultican_RXD0D_P02_4_IN,
69 &IfxMultican_RXD0E_P33_7_IN
70 },
71 {
72 &IfxMultican_RXD1A_P15_3_IN,
73 &IfxMultican_RXD1B_P14_1_IN,
74 NULL_PTR,
75 &IfxMultican_RXD1D_P00_1_IN,
76 NULL_PTR
77 },
78 {
79 &IfxMultican_RXD2A_P15_1_IN,
80 &IfxMultican_RXD2B_P02_3_IN,
81 NULL_PTR,
82 &IfxMultican_RXD2D_P14_8_IN,
83 &IfxMultican_RXD2E_P10_2_IN
84 },
85 {
86 &IfxMultican_RXD3A_P00_3_IN,
87 &IfxMultican_RXD3B_P32_2_IN,
88 &IfxMultican_RXD3C_P20_0_IN,
89 &IfxMultican_RXD3D_P11_10_IN,
90 &IfxMultican_RXD3E_P20_9_IN
91 }
92 }
93 };
94
95 const IfxMultican_Txd_Out *IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS] = {
96 {
97 {
98 &IfxMultican_TXD0_P02_0_OUT,
99 &IfxMultican_TXD0_P02_5_OUT,
100 &IfxMultican_TXD0_P20_8_OUT,
101 &IfxMultican_TXD0_P33_8_OUT,
102 NULL_PTR
103 },
104 {
105 &IfxMultican_TXD1_P00_0_OUT,
106 &IfxMultican_TXD1_P14_0_OUT,
107 &IfxMultican_TXD1_P15_2_OUT,
108 NULL_PTR,
109 NULL_PTR
110 },
111 {
112 &IfxMultican_TXD2_P02_2_OUT,
113 &IfxMultican_TXD2_P10_3_OUT,
114 &IfxMultican_TXD2_P14_10_OUT,
115 &IfxMultican_TXD2_P15_0_OUT,
116 NULL_PTR
117 },
118 {
119 &IfxMultican_TXD3_P00_2_OUT,
120 &IfxMultican_TXD3_P11_12_OUT,
121 &IfxMultican_TXD3_P20_3_OUT,
122 &IfxMultican_TXD3_P20_10_OUT,
123 &IfxMultican_TXD3_P32_3_OUT
124 }
125 }
126 };
IfxMultican_NodeId_3
Ifx_CAN Node 3.
Definition: IfxMultican_cfg.h:86
Ifx_RxSel_e
Definition: Ifx_Types.h:116
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxMultican_TXD1_P14_0_OUT
IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT
Definition: IfxMultican_PinMap.c:49
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:39
IfxMultican_TXD0_P33_8_OUT
IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT
Definition: IfxMultican_PinMap.c:47
IfxMultican_TXD0_P02_5_OUT
IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT
Definition: IfxMultican_PinMap.c:45
IfxMultican_Rxd_In_pinTable
const IfxMultican_Rxd_In * IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
Definition: IfxMultican_PinMap.c:62
IfxMultican_NodeId_1
Ifx_CAN Node 1.
Definition: IfxMultican_cfg.h:84
IfxMultican_TXD2_P15_0_OUT
IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT
Definition: IfxMultican_PinMap.c:54
IfxMultican_RXD1D_P00_1_IN
IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN
Definition: IfxMultican_PinMap.c:34
IfxMultican_TXD1_P00_0_OUT
IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT
Definition: IfxMultican_PinMap.c:48
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxMultican_TXD3_P20_10_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT
Definition: IfxMultican_PinMap.c:57
IfxMultican_TXD3_P00_2_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT
Definition: IfxMultican_PinMap.c:55
IfxMultican_NodeId_0
Ifx_CAN Node 0.
Definition: IfxMultican_cfg.h:83
IfxMultican_RXD3D_P11_10_IN
IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN
Definition: IfxMultican_PinMap.c:42
IfxMultican_RXD3A_P00_3_IN
IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN
Definition: IfxMultican_PinMap.c:39
IfxMultican_RXD1B_P14_1_IN
IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN
Definition: IfxMultican_PinMap.c:33
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxMultican_TXD0_P20_8_OUT
IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT
Definition: IfxMultican_PinMap.c:46
IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS
#define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxMultican_PinMap.h:92
IfxMultican_RXD2E_P10_2_IN
IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN
Definition: IfxMultican_PinMap.c:38
IfxMultican_RXD3B_P32_2_IN
IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN
Definition: IfxMultican_PinMap.c:40
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxMultican_RXD3E_P20_9_IN
IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN
Definition: IfxMultican_PinMap.c:43
IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxMultican_PinMap.h:93
IfxMultican_NodeId_2
Ifx_CAN Node 2.
Definition: IfxMultican_cfg.h:85
IfxMultican_RXD0E_P33_7_IN
IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN
Definition: IfxMultican_PinMap.c:31
IfxMultican_TXD2_P02_2_OUT
IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT
Definition: IfxMultican_PinMap.c:51
IfxMultican_RXD0B_P20_7_IN
IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN
Definition: IfxMultican_PinMap.c:29
IFXMULTICAN_PINMAP_NUM_MODULES
#define IFXMULTICAN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMultican_PinMap.h:90
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxMultican_RXD2A_P15_1_IN
IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN
Definition: IfxMultican_PinMap.c:35
IfxMultican_Txd_Out_pinTable
const IfxMultican_Txd_Out * IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]
Definition: IfxMultican_PinMap.c:95
IfxMultican_RXD2D_P14_8_IN
IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN
Definition: IfxMultican_PinMap.c:37
IfxMultican_TXD2_P10_3_OUT
IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT
Definition: IfxMultican_PinMap.c:52
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:48
IfxMultican_TXD2_P14_10_OUT
IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT
Definition: IfxMultican_PinMap.c:53
IfxMultican_TXD3_P11_12_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT
Definition: IfxMultican_PinMap.c:56
IfxMultican_RXD0A_P02_1_IN
IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN
Definition: IfxMultican_PinMap.c:28
IfxMultican_TXD0_P02_0_OUT
IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT
Definition: IfxMultican_PinMap.c:44
IfxMultican_TXD3_P20_3_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT
Definition: IfxMultican_PinMap.c:58
IfxMultican_PinMap.h
MULTICAN I/O map.
IfxMultican_RXD3C_P20_0_IN
IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN
Definition: IfxMultican_PinMap.c:41
IfxMultican_RXD1A_P15_3_IN
IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN
Definition: IfxMultican_PinMap.c:32
IfxMultican_RXD0D_P02_4_IN
IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN
Definition: IfxMultican_PinMap.c:30
IfxMultican_TXD1_P15_2_OUT
IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT
Definition: IfxMultican_PinMap.c:50
IfxMultican_RXD2B_P02_3_IN
IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN
Definition: IfxMultican_PinMap.c:36
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxMultican_TXD3_P32_3_OUT
IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT
Definition: IfxMultican_PinMap.c:59
IFXMULTICAN_PINMAP_NUM_NODES
#define IFXMULTICAN_PINMAP_NUM_NODES
Definition: IfxMultican_PinMap.h:91


iLLD_TC26B: IfxMultican_PinMap.h Source File

  • _PinMap
IfxMultican_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_PinMap.h
3 * \brief MULTICAN I/O map
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Multican_pinmap MULTICAN Pin Mapping
25 * \ingroup IfxLld_Multican
26 */
27
28 #ifndef IFXMULTICAN_PINMAP_H
29 #define IFXMULTICAN_PINMAP_H
30
31 #include <IfxCan_reg.h>
32 #include <_Impl/IfxMultican_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Multican_pinmap
36 * \{ */
37
38 /** \brief RXD pin mapping structure */
39 typedef const struct
40 {
41 Ifx_CAN* module; /**< \brief Base address */
42 IfxMultican_NodeId nodeId; /**< \brief Node ID */
43 IfxPort_Pin pin; /**< \brief Port pin */
44 Ifx_RxSel select; /**< \brief Input multiplexer value */
45 } IfxMultican_Rxd_In;
46
47 /** \brief TXD pin mapping structure */
48 typedef const struct
49 {
50 Ifx_CAN* module; /**< \brief Base address */
51 IfxMultican_NodeId nodeId; /**< \brief Node ID */
52 IfxPort_Pin pin; /**< \brief Port pin */
53 IfxPort_OutputIdx select; /**< \brief Port control code */
54 } IfxMultican_Txd_Out;
55
56 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN; /**< \brief CAN0_RXDA: CAN node 0 input */
57 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN; /**< \brief CAN0_RXDB: CAN node 0 input */
58 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN; /**< \brief CAN0_RXDD: CAN node 0 input */
59 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN; /**< \brief CAN0_RXDE: CAN node 0 input */
60 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN; /**< \brief CAN1_RXDA: CAN node 1 input */
61 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN; /**< \brief CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function. */
62 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN; /**< \brief CAN1_RXDD: CAN node 1 input */
63 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN; /**< \brief CAN2_RXDA: CAN node 2 input */
64 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN; /**< \brief CAN2_RXDB: CAN node 2 input */
65 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN; /**< \brief CAN2_RXDD: CAN node 2 input */
66 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN; /**< \brief CAN2_RXDE: CAN node 2 input */
67 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN; /**< \brief CAN3_RXDA: CAN node 3 input */
68 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN; /**< \brief CAN3_RXDB: CAN node 3 input */
69 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN; /**< \brief CAN3_RXDC: CAN node 3 input */
70 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN; /**< \brief CAN3_RXDD: CAN node 3 input */
71 IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN; /**< \brief CAN3_RXDE: CAN node 3 input */
72 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
73 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
74 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
75 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
76 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT; /**< \brief CAN1_TXD: CAN node 1 output */
77 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT; /**< \brief CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function. */
78 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT; /**< \brief CAN1_TXD: CAN node 1 output */
79 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
80 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
81 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
82 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
83 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
84 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
85 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
86 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
87 IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
88
89 /** \brief Table dimensions */
90 #define IFXMULTICAN_PINMAP_NUM_MODULES 1
91 #define IFXMULTICAN_PINMAP_NUM_NODES 4
92 #define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5
93 #define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5
94
95
96 /** \brief IfxMultican_Rxd_In table */
97 IFX_EXTERN const IfxMultican_Rxd_In *IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS];
98
99 /** \brief IfxMultican_Txd_Out table */
100 IFX_EXTERN const IfxMultican_Txd_Out *IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS];
101
102 /** \} */
103
104 #endif /* IFXMULTICAN_PINMAP_H */
IfxMultican_TXD2_P15_0_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT
CAN2_TXD: CAN node 2 output.
Definition: IfxMultican_PinMap.h:82
IfxMultican_Rxd_In_pinTable
IFX_EXTERN const IfxMultican_Rxd_In * IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS]
IfxMultican_Rxd_In table.
Definition: IfxMultican_PinMap.h:97
IfxMultican_Rxd_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxMultican_PinMap.h:44
IfxMultican_TXD3_P32_3_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:87
IfxMultican_RXD2E_P10_2_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN
CAN2_RXDE: CAN node 2 input.
Definition: IfxMultican_PinMap.h:66
IfxMultican_Rxd_In
RXD pin mapping structure.
Definition: IfxMultican_PinMap.h:39
IfxMultican_TXD3_P20_10_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:85
IfxMultican_Txd_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxMultican_PinMap.h:53
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxMultican_RXD3A_P00_3_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN
CAN3_RXDA: CAN node 3 input.
Definition: IfxMultican_PinMap.h:67
IfxMultican_RXD0B_P20_7_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN
CAN0_RXDB: CAN node 0 input.
Definition: IfxMultican_PinMap.h:57
IfxMultican_TXD2_P10_3_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT
CAN2_TXD: CAN node 2 output.
Definition: IfxMultican_PinMap.h:80
IfxMultican_TXD0_P33_8_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT
CAN0_TXD: CAN node 0 output.
Definition: IfxMultican_PinMap.h:75
IfxMultican_TXD1_P00_0_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT
CAN1_TXD: CAN node 1 output.
Definition: IfxMultican_PinMap.h:76
IfxMultican_RXD3C_P20_0_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN
CAN3_RXDC: CAN node 3 input.
Definition: IfxMultican_PinMap.h:69
IfxMultican_TXD1_P14_0_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT
CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function.
Definition: IfxMultican_PinMap.h:77
IfxMultican_TXD3_P20_3_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:86
IfxMultican_RXD3D_P11_10_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN
CAN3_RXDD: CAN node 3 input.
Definition: IfxMultican_PinMap.h:70
IfxMultican_RXD0A_P02_1_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN
CAN0_RXDA: CAN node 0 input.
Definition: IfxMultican_PinMap.h:56
IfxMultican_RXD3B_P32_2_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN
CAN3_RXDB: CAN node 3 input.
Definition: IfxMultican_PinMap.h:68
IfxMultican_NodeId
IfxMultican_NodeId
CAN Nodes definition
Definition: IfxMultican_cfg.h:80
IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS
#define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS
Definition: IfxMultican_PinMap.h:92
IfxMultican_RXD1A_P15_3_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN
CAN1_RXDA: CAN node 1 input.
Definition: IfxMultican_PinMap.h:60
IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS
#define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS
Definition: IfxMultican_PinMap.h:93
IfxMultican_Rxd_In::nodeId
IfxMultican_NodeId nodeId
Node ID.
Definition: IfxMultican_PinMap.h:42
IfxMultican_RXD0E_P33_7_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN
CAN0_RXDE: CAN node 0 input.
Definition: IfxMultican_PinMap.h:59
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxMultican_TXD0_P02_0_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT
CAN0_TXD: CAN node 0 output.
Definition: IfxMultican_PinMap.h:72
IfxMultican_TXD0_P02_5_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT
CAN0_TXD: CAN node 0 output.
Definition: IfxMultican_PinMap.h:73
IFXMULTICAN_PINMAP_NUM_MODULES
#define IFXMULTICAN_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxMultican_PinMap.h:90
IfxMultican_Rxd_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxMultican_PinMap.h:43
IfxMultican_cfg.h
MULTICAN on-chip implementation data.
IfxMultican_RXD2B_P02_3_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN
CAN2_RXDB: CAN node 2 input.
Definition: IfxMultican_PinMap.h:64
IfxMultican_RXD2D_P14_8_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN
CAN2_RXDD: CAN node 2 input.
Definition: IfxMultican_PinMap.h:65
IfxMultican_RXD1B_P14_1_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN
CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function.
Definition: IfxMultican_PinMap.h:61
IfxMultican_Txd_Out
TXD pin mapping structure.
Definition: IfxMultican_PinMap.h:48
IfxMultican_RXD0D_P02_4_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN
CAN0_RXDD: CAN node 0 input.
Definition: IfxMultican_PinMap.h:58
IfxMultican_RXD2A_P15_1_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN
CAN2_RXDA: CAN node 2 input.
Definition: IfxMultican_PinMap.h:63
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxMultican_TXD1_P15_2_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT
CAN1_TXD: CAN node 1 output.
Definition: IfxMultican_PinMap.h:78
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxMultican_Txd_Out_pinTable
IFX_EXTERN const IfxMultican_Txd_Out * IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS]
IfxMultican_Txd_Out table.
Definition: IfxMultican_PinMap.h:100
IfxMultican_RXD1D_P00_1_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN
CAN1_RXDD: CAN node 1 input.
Definition: IfxMultican_PinMap.h:62
IfxMultican_TXD3_P00_2_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:83
IfxMultican_RXD3E_P20_9_IN
IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN
CAN3_RXDE: CAN node 3 input.
Definition: IfxMultican_PinMap.h:71
IfxMultican_TXD3_P11_12_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT
CAN3_TXD: CAN node 3 output.
Definition: IfxMultican_PinMap.h:84
IfxMultican_TXD2_P14_10_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT
CAN2_TXD: CAN node 2 output.
Definition: IfxMultican_PinMap.h:81
IfxMultican_TXD0_P20_8_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT
CAN0_TXD: CAN node 0 output.
Definition: IfxMultican_PinMap.h:74
IfxMultican_TXD2_P02_2_OUT
IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT
CAN2_TXD: CAN node 2 output.
Definition: IfxMultican_PinMap.h:79
IFXMULTICAN_PINMAP_NUM_NODES
#define IFXMULTICAN_PINMAP_NUM_NODES
Definition: IfxMultican_PinMap.h:91
IfxPort.h
PORT basic functionality.
IfxMultican_Rxd_In::module
Ifx_CAN * module
Base address.
Definition: IfxMultican_PinMap.h:41


iLLD_TC26B: IfxMultican_cfg.c Source File

  • _Impl
IfxMultican_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_cfg.c
3 * \brief MULTICAN on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxMultican_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES] = {
36 {&MODULE_CAN, (uint32)IfxMultican_Index_0}
37 };
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxMultican_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]
Definition: IfxMultican_cfg.c:35
IfxMultican_cfg.h
MULTICAN on-chip implementation data.
IfxMultican_Index_0
MULTICAN index 0.
Definition: IfxMultican_cfg.h:75
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IFXMULTICAN_NUM_MODULES
#define IFXMULTICAN_NUM_MODULES
Definition: IfxMultican_cfg.h:58


iLLD_TC26B: IfxMultican_cfg.h Source File

  • _Impl
IfxMultican_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxMultican_cfg.h
3 * \brief MULTICAN on-chip implementation data
4 * \ingroup IfxLld_Multican
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Multican MULTICAN
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Multican_Impl Implementation
27 * \ingroup IfxLld_Multican
28 * \defgroup IfxLld_Multican_Std Standard Driver
29 * \ingroup IfxLld_Multican
30 */
31
32 #ifndef IFXMULTICAN_CFG_H
33 #define IFXMULTICAN_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "Cpu/Std/Ifx_Types.h"
40 #include "IfxCan_reg.h"
41
42 /******************************************************************************/
43 /*-----------------------------------Macros-----------------------------------*/
44 /******************************************************************************/
45
46 /** \brief Number of CAN message objects
47 */
48 #define IFXMULTICAN_NUM_MESSAGE_OBJECTS (256)
49
50 /** \brief Number of CAN nodes
51 */
52 #define IFXMULTICAN_NUM_NODES (5)
53
54 /** \brief Number of service requests
55 */
56 #define IFXMULTICAN_NUM_SRC (16)
57
58 #define IFXMULTICAN_NUM_MODULES (1)
59
60 /** \brief Number of CANR service requests
61 */
62 #define IFXMULTICAN_R_NUM_SRC (8)
63
64
65
66 /******************************************************************************/
67 /*-------------------------------Enumerations---------------------------------*/
68 /******************************************************************************/
69
70 /** \brief List of the available multican resource.
71 */
72 typedef enum
73 {
74 IfxMultican_Index_none = -1, /**< \brief Not Selected */
75 IfxMultican_Index_0 = 0, /**< \brief MULTICAN index 0 */
76 } IfxMultican_Index;
77
78 /** \brief CAN Nodes definition
79 */
80 typedef enum
81 {
82 IfxMultican_NodeId_none = -1, /**< \brief None of the Ifx_CAN Nodes */
83 IfxMultican_NodeId_0 = 0, /**< \brief Ifx_CAN Node 0 */
84 IfxMultican_NodeId_1, /**< \brief Ifx_CAN Node 1 */
85 IfxMultican_NodeId_2, /**< \brief Ifx_CAN Node 2 */
86 IfxMultican_NodeId_3 /**< \brief Ifx_CAN Node 3 */
87 } IfxMultican_NodeId;
88
89 /** \brief Service request ID
90 */
91 typedef enum
92 {
93 IfxMultican_SrcId_0 = 0, /**< \brief Service request ID 0 */
94 IfxMultican_SrcId_1, /**< \brief Service request ID 1 */
95 IfxMultican_SrcId_2, /**< \brief Service request ID 2 */
96 IfxMultican_SrcId_3, /**< \brief Service request ID 3 */
97 IfxMultican_SrcId_4, /**< \brief Service request ID 4 */
98 IfxMultican_SrcId_5, /**< \brief Service request ID 5 */
99 IfxMultican_SrcId_6, /**< \brief Service request ID 6 */
100 IfxMultican_SrcId_7, /**< \brief Service request ID 7 */
101 IfxMultican_SrcId_8, /**< \brief Service request ID 8 */
102 IfxMultican_SrcId_9, /**< \brief Service request ID 9 */
103 IfxMultican_SrcId_10, /**< \brief Service request ID 10 */
104 IfxMultican_SrcId_11, /**< \brief Service request ID 11 */
105 IfxMultican_SrcId_12, /**< \brief Service request ID 12 */
106 IfxMultican_SrcId_13, /**< \brief Service request ID 13 */
107 IfxMultican_SrcId_14, /**< \brief Service request ID 14 */
108 IfxMultican_SrcId_15 /**< \brief Service request ID 15 */
109 } IfxMultican_SrcId;
110
111
112 /******************************************************************************/
113 /*-------------------Global Exported Variables/Constants----------------------*/
114 /******************************************************************************/
115
116 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES];
117
118
119 #endif /* IFXMULTICAN_CFG_H */
IfxMultican_NodeId_3
Ifx_CAN Node 3.
Definition: IfxMultican_cfg.h:86
IfxMultican_NodeId_1
Ifx_CAN Node 1.
Definition: IfxMultican_cfg.h:84
IfxMultican_SrcId_3
Service request ID 3.
Definition: IfxMultican_cfg.h:96
IfxMultican_SrcId_11
Service request ID 11.
Definition: IfxMultican_cfg.h:104
IfxMultican_SrcId_0
Service request ID 0.
Definition: IfxMultican_cfg.h:93
IfxMultican_SrcId_13
Service request ID 13.
Definition: IfxMultican_cfg.h:106
IfxMultican_SrcId_4
Service request ID 4.
Definition: IfxMultican_cfg.h:97
IfxMultican_NodeId_0
Ifx_CAN Node 0.
Definition: IfxMultican_cfg.h:83
IfxMultican_SrcId_8
Service request ID 8.
Definition: IfxMultican_cfg.h:101
IfxMultican_SrcId_15
Service request ID 15.
Definition: IfxMultican_cfg.h:108
IfxMultican_SrcId_5
Service request ID 5.
Definition: IfxMultican_cfg.h:98
IfxMultican_SrcId
IfxMultican_SrcId
Service request ID
Definition: IfxMultican_cfg.h:91
IfxMultican_NodeId
IfxMultican_NodeId
CAN Nodes definition
Definition: IfxMultican_cfg.h:80
IfxMultican_SrcId_14
Service request ID 14.
Definition: IfxMultican_cfg.h:107
IfxMultican_SrcId_6
Service request ID 6.
Definition: IfxMultican_cfg.h:99
IfxMultican_SrcId_7
Service request ID 7.
Definition: IfxMultican_cfg.h:100
IfxMultican_SrcId_10
Service request ID 10.
Definition: IfxMultican_cfg.h:103
IfxMultican_SrcId_2
Service request ID 2.
Definition: IfxMultican_cfg.h:95
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxMultican_NodeId_2
Ifx_CAN Node 2.
Definition: IfxMultican_cfg.h:85
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxMultican_NodeId_none
None of the Ifx_CAN Nodes.
Definition: IfxMultican_cfg.h:82
IfxMultican_SrcId_12
Service request ID 12.
Definition: IfxMultican_cfg.h:105
IfxMultican_Index
IfxMultican_Index
List of the available multican resource.
Definition: IfxMultican_cfg.h:72
IfxMultican_SrcId_1
Service request ID 1.
Definition: IfxMultican_cfg.h:94
IfxMultican_Index_none
Not Selected.
Definition: IfxMultican_cfg.h:74
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxMultican_Index_0
MULTICAN index 0.
Definition: IfxMultican_cfg.h:75
IfxMultican_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES]
Definition: IfxMultican_cfg.h:116
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IFXMULTICAN_NUM_MODULES
#define IFXMULTICAN_NUM_MODULES
Definition: IfxMultican_cfg.h:58
IfxMultican_SrcId_9
Service request ID 9.
Definition: IfxMultican_cfg.h:102


iLLD_TC26B: IfxPort.c Source File

  • Port
  • Std
IfxPort.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort.c
3 * \brief PORT basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxPort.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
36 {
37 sint32 portIndex;
38 boolean result = FALSE;
39
40 for (portIndex = 0; portIndex < IFXPORT_NUM_MODULES; portIndex++)
41 {
42 if (port == IfxPort_cfg_esrMasks[portIndex].port)
43 {
44 if ((1U << pinIndex) & IfxPort_cfg_esrMasks[portIndex].masks)
45 {
46 IfxPort_resetESR(port, pinIndex);
47 result = TRUE;
48 }
49
50 break;
51 }
52 }
53
54 return result;
55 }
56
57
58 boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
59 {
60 sint32 portIndex;
61 boolean result = FALSE;
62
63 for (portIndex = 0; portIndex < IFXPORT_NUM_MODULES; portIndex++)
64 {
65 if (port == IfxPort_cfg_esrMasks[portIndex].port)
66 {
67 if ((1U << pinIndex) & IfxPort_cfg_esrMasks[portIndex].masks)
68 {
69 IfxPort_setESR(port, pinIndex);
70 result = TRUE;
71 }
72 }
73 }
74
75 return result;
76 }
77
78
79 Ifx_P *IfxPort_getAddress(IfxPort_Index port)
80 {
81 Ifx_P *module = NULL_PTR;
82 uint8 i = 0;
83
84 while ((i < IFXPORT_NUM_MODULES) && (module == NULL_PTR))
85 {
86 if (IfxPort_cfg_indexMap[i].index == port)
87 {
88 module = IfxPort_cfg_indexMap[i].module;
89 }
90
91 i++;
92 }
93
94 return module;
95 }
96
97
98 IfxPort_Index IfxPort_getIndex(Ifx_P *port)
99 {
100 uint32 index;
101 IfxPort_Index result;
102
103 result = IfxPort_Index_none;
104
105 for (index = 0; index < IFXPORT_NUM_MODULES; index++)
106 {
107 if (IfxPort_cfg_indexMap[index].module == port)
108 {
109 result = (IfxPort_Index)IfxPort_cfg_indexMap[index].index;
110 break;
111 }
112 }
113
114 return result;
115 }
116
117
118 void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
119 {
120 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
121
122 IfxScuWdt_clearCpuEndinit(passwd);
123 __ldmst(&port->ESR.U, 1U << pinIndex, 0);
124 IfxScuWdt_setCpuEndinit(passwd);
125 }
126
127
128 void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
129 {
130 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
131
132 IfxScuWdt_clearCpuEndinit(passwd);
133 __ldmst(&port->ESR.U, 1U << pinIndex, 1U << pinIndex);
134 IfxScuWdt_setCpuEndinit(passwd);
135 }
136
137
138 void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
139 {
140 uint32 i;
141 uint32 iocrVal[4];
142 uint32 iocrMask[4];
143
144 /* initialise */
145 for (i = 0; i < 4; i++)
146 {
147 iocrVal[i] = 0;
148 iocrMask[i] = 0;
149 }
150
151 /* calculate IOCRx values and masks */
152 uint32 imask = (uint32)mask << pinIndex;
153
154 for (i = pinIndex; i < 16; i++)
155 {
156 if ((imask & (1U << i)) != 0)
157 {
158 uint32 index = i / 4;
159 uint32 shift = (i & 0x3U) * 8;
160 iocrMask[index] |= (0x1FU << 3) << shift;
161 iocrVal[index] |= (mode) << shift;
162 }
163 }
164
165 /* write IOCRx */
166 for (i = 0; i < 4; i++)
167 {
168 if (iocrMask[i] != 0)
169 {
170 __ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
171 }
172 }
173 }
174
175
176 void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
177 {
178 uint32 i;
179 uint32 iocrVal[4];
180 uint32 iocrMask[4];
181
182 IFX_UNUSED_PARAMETER(index == IfxPort_OutputIdx_general);
183
184 /* initialise */
185 for (i = 0; i < 4; i++)
186 {
187 iocrVal[i] = 0;
188 iocrMask[i] = 0;
189 }
190
191 /* calculate IOCRx values and masks */
192 uint32 imask = (uint32)mask << pinIndex;
193
194 for (i = pinIndex; i < 16; i++)
195 {
196 if ((imask & (1U << i)) != 0)
197 {
198 uint32 index = i / 4;
199 uint32 shift = (i & 0x3U) * 8;
200 iocrMask[index] |= (0x1FU << 3) << shift;
201 iocrVal[index] |= (mode | index) << shift;
202 }
203 }
204
205 /* write IOCRx */
206 for (i = 0; i < 4; i++)
207 {
208 if (iocrMask[i] != 0)
209 {
210 __ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
211 }
212 }
213 }
214
215
216 void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
217 {
218 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
219
220 IfxScuWdt_clearCpuEndinit(passwd);
221 {
222 uint32 i;
223 uint32 pdrVal[2];
224 uint32 pdrMask[2];
225
226 /* initialise */
227 for (i = 0; i < 2; i++)
228 {
229 pdrVal[i] = 0;
230 pdrMask[i] = 0;
231 }
232
233 /* calculate PDRx values and masks */
234 uint32 imask = (uint32)mask << pinIndex;
235
236 for (i = pinIndex; i < 16; i++)
237 {
238 if ((imask & (1U << i)) != 0)
239 {
240 uint32 index = i / 8;
241 uint32 shift = (i & 0x7U) * 4;
242 pdrMask[index] |= (0xFUL << shift);
243 pdrVal[index] |= (padDriver << shift);
244 }
245 }
246
247 /* write PDRx */
248 for (i = 0; i < 2; i++)
249 {
250 if (pdrMask[i] != 0)
251 {
252 __ldmst(&((&(port->PDR0.U))[i]), pdrMask[i], pdrVal[i]);
253 }
254 }
255 }
256 IfxScuWdt_setCpuEndinit(passwd);
257 }
258
259
260 void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
261 {
262 volatile Ifx_P_IOCR0 *iocr = &(port->IOCR0);
263 uint8 iocrIndex = (pinIndex / 4);
264 uint8 shift = (pinIndex & 0x3U) * 8;
265
266 if (port == &MODULE_P40)
267 {
268 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
269 IfxScuWdt_clearCpuEndinit(passwd);
270 port->PDISC.U &= ~(1 << pinIndex);
271 IfxScuWdt_setCpuEndinit(passwd);
272 }
273
274 __ldmst(&iocr[iocrIndex].U, (0xFFUL << shift), (mode << shift));
275 }
276
277
278 void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
279 {
280 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
281
282 IfxScuWdt_clearCpuEndinit(passwd);
283
284 if (mode < IfxPort_Mode_outputPushPullGeneral)
285 {
286 if (pinIndex < 2)
287 {}
288 else
289 {
290 port->LPCR1.B_P21.RDIS_CTRL = enablePortControlled;
291 port->LPCR1.B_P21.RX_DIS = 0;
292 }
293 }
294 else
295 {
296 port->LPCR2.B.TDIS_CTRL = enablePortControlled;
297 port->LPCR2.B.TX_DIS = 0;
298 port->LPCR2.B.TX_PD = 0;
299 }
300
301 IfxScuWdt_setCpuEndinit(passwd);
302 }
303
304
305 void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
306 {
307 uint32 pdrOffset = (pinIndex / 8);
308 uint32 shift = ((pinIndex / 2) * 8);
309 uint32 lpcrOffset = (pinIndex / 2);
310 volatile Ifx_P_PDR0 *pdr = &(port->PDR0);
311 volatile Ifx_P_LPCR0 *lpcr = &(port->LPCR0);
312 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
313
314 IfxScuWdt_clearCpuEndinit(passwd);
315 {
316 pdr[pdrOffset].U = (lvdsPadDriver << shift); /* configuring LVDS mode */
317 lpcr[lpcrOffset].B.PS1 = padSupply;
318 }
319 IfxScuWdt_setCpuEndinit(passwd);
320 }
321
322
323 void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
324 {
325 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
326
327 IfxScuWdt_clearCpuEndinit(passwd);
328 {
329 volatile uint32 *pdr = (volatile uint32 *)&(port->PDR0.U);
330 uint8 pdrIndex = (pinIndex / 8);
331 uint8 shift = (pinIndex & 0x7U) * 4;
332 __ldmst(&(pdr[pdrIndex]), (0xFUL << shift), (padDriver << shift));
333 }
334 IfxScuWdt_setCpuEndinit(passwd);
335 }
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:59
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxPort_setPinMode
void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:260
IfxPort_Mode_outputPushPullGeneral
Push-pull, General-purpose output.
Definition: IfxPort.h:80
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:49
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxPort_setGroupModeInput
void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:138
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxPort_ControlledBy
IfxPort_ControlledBy
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx.
Definition: IfxPort.h:55
IfxPort_setGroupModeOutput
void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by &#39;1&#39; by the mask starting at pinIndex...
Definition: IfxPort.c:176
IfxPort_resetESR
void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:118
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxPort_OutputIdx_general
Definition: IfxPort.h:102
IfxModule_IndexMap::module
volatile void * module
Module address.
Definition: Ifx_Types.h:125
IfxPort_setPinModeLvdsMedium
void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode
Definition: IfxPort.c:305
IfxPort_getIndex
IfxPort_Index IfxPort_getIndex(Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
Definition: IfxPort.c:98
IfxPort_enableEmergencyStop
boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:58
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2048
IfxPort_setPinModeLvdsHigh
void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21)
Definition: IfxPort.c:278
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPort_disableEmergencyStop
boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:35
IfxPort_PadSupply
IfxPort_PadSupply
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair...
Definition: IfxPort.h:142
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
sint32
long sint32
Definition: Platform_Types.h:131
IfxPort_getAddress
Ifx_P * IfxPort_getAddress(IfxPort_Index port)
Returns the module address of the selected Port module.
Definition: IfxPort.c:79
IfxPort_cfg_esrMasks
IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:36
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:75
IfxPort_setGroupPadDriver
void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:216
IfxPort_Index_none
none
Definition: IfxPort_cfg.h:74
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxPort_setESR
void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:128
TRUE
#define TRUE
Definition: Platform_Types.h:87
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxPort.h
PORT basic functionality.
IfxPort_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:53


iLLD_TC26B: IfxPort.h Source File

  • Port
  • Std
IfxPort.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort.h
3 * \brief PORT basic functionality
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 *
26 * \defgroup IfxLld_Port_Std_Enum Enumerations
27 * \ingroup IfxLld_Port_Std
28 * \defgroup IfxLld_Port_Std_DataStructures Data structures
29 * \ingroup IfxLld_Port_Std
30 * \defgroup IfxLld_Port_Std_SinglePin Single Pin Functions
31 * \ingroup IfxLld_Port_Std
32 * \defgroup IfxLld_Port_Std_PortGroup Group Access Functions
33 * \ingroup IfxLld_Port_Std
34 */
35
36 #ifndef IFXPORT_H
37 #define IFXPORT_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "_Impl/IfxPort_cfg.h"
44 #include "Scu/Std/IfxScuWdt.h"
45
46 /******************************************************************************/
47 /*--------------------------------Enumerations--------------------------------*/
48 /******************************************************************************/
49
50 /** \addtogroup IfxLld_Port_Std_Enum
51 * \{ */
52 /** \brief The LVDS RX_DIS control function can be selected from the Port (default) or
53 * HSCT module.declared in MODULE_PORTx.LPCRx
54 */
55 typedef enum
56 {
57 IfxPort_ControlledBy_port = 0, /**< \brief port controlled by PORT Module */
58 IfxPort_ControlledBy_hsct = 1 /**< \brief Port controlled by HSCT Module */
59 } IfxPort_ControlledBy;
60
61 /** \brief Ifx_P output modification modes definition.
62 */
63 typedef enum
64 {
65 IfxPort_InputMode_undefined = -1,
66 IfxPort_InputMode_noPullDevice = 0 << 3,
67 IfxPort_InputMode_pullDown = 1U << 3,
68 IfxPort_InputMode_pullUp = 2U << 3 /**< \brief */
69 } IfxPort_InputMode;
70
71 /** \brief Ifx_P input / output mode definition.
72 *
73 * \see Ifx_P.IOCR, IfxPort_setPinMode()
74 */
75 typedef enum
76 {
77 IfxPort_Mode_inputNoPullDevice = 0, /**< \brief Input, No pull device connected. */
78 IfxPort_Mode_inputPullDown = 8U, /**< \brief Input, pull-down device connected. */
79 IfxPort_Mode_inputPullUp = 0x10U, /**< \brief Input, pull-up device connected. */
80 IfxPort_Mode_outputPushPullGeneral = 0x80U, /**< \brief Push-pull, General-purpose output */
81 IfxPort_Mode_outputPushPullAlt1 = 0x88U, /**< \brief Push-pull, Alternate output function 1. */
82 IfxPort_Mode_outputPushPullAlt2 = 0x90U, /**< \brief Push-pull, Alternate output function 2. */
83 IfxPort_Mode_outputPushPullAlt3 = 0x98U, /**< \brief Push-pull, Alternate output function 3. */
84 IfxPort_Mode_outputPushPullAlt4 = 0xA0U, /**< \brief Push-pull, Alternate output function 4. */
85 IfxPort_Mode_outputPushPullAlt5 = 0xA8U, /**< \brief Push-pull, Alternate output function 5. */
86 IfxPort_Mode_outputPushPullAlt6 = 0xB0U, /**< \brief Push-pull, Alternate output function 6. */
87 IfxPort_Mode_outputPushPullAlt7 = 0xB8U, /**< \brief Push-pull, Alternate output function 7. */
88 IfxPort_Mode_outputOpenDrainGeneral = 0xC0U, /**< \brief Open-drain, General-purpose output. */
89 IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U, /**< \brief Open-drain, Alternate output function 1. */
90 IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U, /**< \brief Open-drain, Alternate output function 2. */
91 IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U, /**< \brief Open-drain, Alternate output function 3. */
92 IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U, /**< \brief Open-drain, Alternate output function 4. */
93 IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U, /**< \brief Open-drain, Alternate output function 5. */
94 IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U, /**< \brief Open-drain, Alternate output function 6. */
95 IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U /**< \brief Open-drain, Alternate output function 7. */
96 } IfxPort_Mode;
97
98 /** \brief Pin output alternate index
99 */
100 typedef enum
101 {
102 IfxPort_OutputIdx_general = 0x10U << 3,
103 IfxPort_OutputIdx_alt1 = 0x11U << 3,
104 IfxPort_OutputIdx_alt2 = 0x12U << 3,
105 IfxPort_OutputIdx_alt3 = 0x13U << 3,
106 IfxPort_OutputIdx_alt4 = 0x14U << 3,
107 IfxPort_OutputIdx_alt5 = 0x15U << 3,
108 IfxPort_OutputIdx_alt6 = 0x16U << 3,
109 IfxPort_OutputIdx_alt7 = 0x17U << 3
110 } IfxPort_OutputIdx;
111
112 /** \brief Pin output mode definition
113 */
114 typedef enum
115 {
116 IfxPort_OutputMode_pushPull = 0x10U << 3,
117 IfxPort_OutputMode_openDrain = 0x18U << 3
118 } IfxPort_OutputMode;
119
120 /** \brief Pad driver mode definition (strength and slew rate).
121 *
122 * \see Ifx_P.PDR, IfxPort_setPinPadDriver()
123 */
124 typedef enum
125 {
126 IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0, /**< \brief Speed grade 1. */
127 IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1, /**< \brief Speed grade 2. */
128 IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2, /**< \brief Speed grade 3. */
129 IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3, /**< \brief Speed grade 4. */
130 IfxPort_PadDriver_lvdsSpeed1 = 4, /**< \brief Lvds Speed grade 1 */
131 IfxPort_PadDriver_lvdsSpeed2 = 5, /**< \brief Lvds Speed grade 2 */
132 IfxPort_PadDriver_lvdsSpeed3 = 6, /**< \brief Lvds Speed grade 3 */
133 IfxPort_PadDriver_lvdsSpeed4 = 7, /**< \brief Lvds Speed grade 4 */
134 IfxPort_PadDriver_ttlSpeed1 = 8, /**< \brief Speed grade 1. */
135 IfxPort_PadDriver_ttlSpeed2 = 9, /**< \brief Speed grade 2. */
136 IfxPort_PadDriver_ttlSpeed3 = 10, /**< \brief Speed grade 3. */
137 IfxPort_PadDriver_ttlSpeed4 = 11 /**< \brief Speed grade 4. */
138 } IfxPort_PadDriver;
139
140 /** \brief MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair
141 */
142 typedef enum
143 {
144 IfxPort_PadSupply_5v = 0, /**< \brief select, 5V supply */
145 IfxPort_PadSupply_3v = 1 /**< \brief select, 3V supply */
146 } IfxPort_PadSupply;
147
148 /** \brief Ifx_P output modification modes definition.
149 *
150 * \see Ifx_P.OMR, IfxPort_setPinState()
151 */
152 typedef enum
153 {
154 IfxPort_State_notChanged = (0 << 16) | (0 << 0), /**< \brief Ifx_P pin is left unchanged. */
155 IfxPort_State_high = (0 << 16) | (1U << 0), /**< \brief Ifx_P pin is set to high. */
156 IfxPort_State_low = (1U << 16) | (0 << 0), /**< \brief Ifx_P pin is set to low. */
157 IfxPort_State_toggled = (1U << 16) | (1U << 0) /**< \brief Ifx_P pin is toggled. */
158 } IfxPort_State;
159
160 /** \} */
161
162 /******************************************************************************/
163 /*-----------------------------Data Structures--------------------------------*/
164 /******************************************************************************/
165
166 /** \addtogroup IfxLld_Port_Std_DataStructures
167 * \{ */
168 /** \brief Defines a pin
169 */
170 typedef struct
171 {
172 Ifx_P *port;
173 uint8 pinIndex;
174 } IfxPort_Pin;
175
176 /** \brief To configure pins
177 */
178 typedef struct
179 {
180 Ifx_P *port;
181 uint8 pinIndex;
182 IfxPort_OutputIdx mode;
183 IfxPort_PadDriver padDriver;
184 } IfxPort_Pin_Config;
185
186 /** \} */
187
188 /** \addtogroup IfxLld_Port_Std_SinglePin
189 * \{ */
190
191 /******************************************************************************/
192 /*-------------------------Inline Function Prototypes-------------------------*/
193 /******************************************************************************/
194
195 /** \brief Return the port state.
196 * \param port Pointer to the port which should be accessed.
197 * \param pinIndex Specifies the pin for which the state should be returned.
198 * \return Returns TRUE the pin is high; FALSE the pin is low
199 *
200 * Coding example:
201 * \code
202 * if( IfxPort_getPinState(&MODULE_P33, 0) ) {
203 * // ...
204 * }
205 * \endcode
206 *
207 */
208 IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex);
209
210 /** \brief Set the port output.
211 * \param port Pointer to the port which should be accessed.
212 * \param pinIndex Specifies the pin to be set.
213 * \return None
214 *
215 * Coding example:
216 * \code
217 * IfxPort_setPinHigh(&MODULE_P33, 0);
218 * \endcode
219 *
220 * \see IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_togglePin()
221 *
222 */
223 IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex);
224
225 /** \brief Reset the port output.
226 * \param port Pointer to the port which should be accessed.
227 * \param pinIndex Specifies the pin to be reset.
228 * \return None
229 *
230 * Coding example:
231 * \code
232 * IfxPort_setPinLow(&MODULE_P33, 0);
233 * \endcode
234 *
235 * \see IfxPort_setPinState(), IfxPort_setPinHigh(), IfxPort_togglePin()
236 *
237 */
238 IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex);
239
240 /** \brief Configure the port input / output mode.
241 * \param port Pointer to the port which should be accessed.
242 * \param pinIndex Specifies the pin to be configured.
243 * \param mode Specifies the port pin mode.
244 * \return None
245 *
246 * Coding example:
247 * \code
248 * IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);
249 * \endcode
250 *
251 */
252 IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode);
253
254 /** \brief Configure the port input / output mode.
255 * \param port Pointer to the port which should be accessed.
256 * \param pinIndex Specifies the pin to be configured.
257 * \param mode Specifies the port pin mode.
258 * \param index Specifies the alternate (or general purpose) output channel.
259 * \return None
260 *
261 * Coding example:
262 * \code
263 * IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
264 * \endcode
265 *
266 */
267 IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index);
268
269 /** \brief Set / Resets / Toggle the port output.
270 * \param port Pointer to the port which should be accessed.
271 * \param pinIndex Specifies the pin to modify.
272 * \param action Specifies the action: set, reset, toggle.
273 * \return None
274 *
275 * Coding example:
276 * \code
277 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
278 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
279 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
280 * \endcode
281 *
282 */
283 IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action);
284
285 /** \brief Toggle the port output.
286 * \param port Pointer to the port which should be accessed.
287 * \param pinIndex Specifies the pin to be toggled.
288 * \return None
289 *
290 * Coding example:
291 * \code
292 * IfxPort_togglePin(&MODULE_P33, 0);
293 * \endcode
294 *
295 * \see IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_setPinHigh()
296 *
297 */
298 IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex);
299
300 /******************************************************************************/
301 /*-------------------------Global Function Prototypes-------------------------*/
302 /******************************************************************************/
303
304 /** \brief Disable the emergency stop function.
305 * This function disables the emergency stop function. A check is done on port functionality.
306 * \param port Pointer to the port which should be accessed.
307 * \param pinIndex Specifies the pin for which the emergency stop function should be disabled.
308 * \return Returns TRUE if the emergency stop function has been disabled; FALSE if the emergency stop function could not be disabled
309 *
310 * Coding example:
311 * /code
312 * if( !IfxPort_disableEmergencyStop(&MODULE_P33, 0) )
313 * {
314 * // failed to disable emergency stop for P33.0
315 * }
316 * /endcode
317 *
318 * \see IfxPort_disableEmergencyStop(), IfxPort_resetESR()
319 *
320 */
321 IFX_EXTERN boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex);
322
323 /** \brief Enable the emergency stop function.
324 * This function enables the emergency stop function. A check is done on port functionality.
325 * \param port Pointer to the port which should be accessed.
326 * \param pinIndex Specifies the pin for which the emergency stop function should be enabled.
327 * \return Returns TRUE if the emergency stop function has been enabled; FALSE if the emergency stop function could not be enabled
328 *
329 * Coding example:
330 * \code
331 * if( !IfxPort_enableEmergencyStop(&MODULE_P33, 0) ) {
332 * // failed to enable emergency stop for P33.0
333 * }
334 * \endcode
335 *
336 * \see IfxPort_disableEmergencyStop(), IfxPort_setESR()
337 *
338 */
339 IFX_EXTERN boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex);
340
341 /** \brief Configure the port input / output mode.
342 * Also Configures the P40/P41 Port for digital functionality
343 * which bydefault support analog functionality.
344 * \param port Pointer to the port which should be accessed.
345 * \param pinIndex Specifies the pin to be configured.
346 * \param mode Specifies the port pin mode.
347 * \return None
348 *
349 * Coding example:
350 * \code
351 * IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);
352 * \endcode
353 *
354 */
355 IFX_EXTERN void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode);
356
357 /** \brief Configure the pad driver mode.
358 * \param port Pointer to the port which should be accessed.
359 * \param pinIndex Specifies the pin for which the mode will be set.
360 * \param padDriver Specifies the driver mode.
361 * \return None
362 *
363 * Coding example:
364 * \code
365 * // enable strong 3.3V driver
366 * IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
367 * \endcode
368 *
369 */
370 IFX_EXTERN void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver);
371
372 /** \} */
373
374 /** \addtogroup IfxLld_Port_Std_PortGroup
375 * \{ */
376
377 /******************************************************************************/
378 /*-------------------------Inline Function Prototypes-------------------------*/
379 /******************************************************************************/
380
381 /** \brief Return the port group state
382 * \param port Pointer to the port which should be accessed.
383 * \param pinIndex start at the given pin
384 * \param mask selects the pins which should be read (starting from pinIndex)
385 * \return Returns the selected pin values
386 *
387 * Coding example:
388 * \code
389 * // read the current value of P33[7:0]
390 * uint16 value = IfxPort_getGroupState(&MODULE_P33, 0, 0xff);
391 * \endcode
392 *
393 */
394 IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask);
395
396 /** \brief Set the port group state.
397 * \param port Pointer to the port which should be accessed.
398 * \param pinIndex start at the given pin
399 * \param mask selects the pins which should be modified (starting from pinIndex)
400 * \param data specifies the value which should be set
401 * \return None
402 *
403 * Coding example:
404 * \code
405 * // configure P33.[7:0] as GPIO outputs
406 * IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
407 *
408 * // set initial value
409 * IfxPort_setGroupState(&MODULE_P33, 0, 0xff, 0x42);
410 * \endcode
411 *
412 */
413 IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data);
414
415 /******************************************************************************/
416 /*-------------------------Global Function Prototypes-------------------------*/
417 /******************************************************************************/
418
419 /** \brief Returns the module address of the selected Port module
420 * \param port Pointer to PORT module registers
421 * \return PORT module register address
422 */
423 IFX_EXTERN Ifx_P *IfxPort_getAddress(IfxPort_Index port);
424
425 /** \brief Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
426 * \param port Pointer to the port for which the index number in IfxModule_IndexMap should be retrieved.
427 * \return port index of IfxModule_IndexMap. return -1 in case of unknown port index.
428 */
429 IFX_EXTERN IfxPort_Index IfxPort_getIndex(Ifx_P *port);
430
431 /** \brief Set pin modes to input at the pin location specified by '1' by the mask
432 * \param port Pointer to the port which should be accessed.
433 * \param pinIndex start at the given pin
434 * \param mask selects the pins which should be modified (starting from pinIndex)
435 * \param mode Specifies the port pin mode.
436 * \return None
437 *
438 * Coding example:
439 * \code
440 * // configure P33.[7:0] as GPIO inputs with Pull-Down enabled
441 * IfxPort_setGroupModeInput(&MODULE_P33, 0, 0xff, IfxPort_InputMode_pullDown);
442 * \endcode
443 *
444 */
445 IFX_EXTERN void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode);
446
447 /** \brief Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex
448 * \param port Pointer to the port which should be accessed.
449 * \param pinIndex start at the given pin
450 * \param mask selects the pins which should be modified (starting from pinIndex)
451 * \param mode Specifies the port pin mode.
452 * \param index Specifies the alternate (or general purpose) output channel.
453 * \return None
454 *
455 * Coding example:
456 * \code
457 * // configure P33.[7:0] as GPIO outputs
458 * IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
459 * \endcode
460 *
461 */
462 IFX_EXTERN void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index);
463
464 /** \brief Set pad driver strength at the pin location specified by '1' by the mask
465 * \param port Pointer to the port which should be accessed.
466 * \param pinIndex start at the given pin
467 * \param mask selects the pins which should be modified (starting from pinIndex)
468 * \param padDriver Specifies the pad driver strength.
469 * \return None
470 *
471 * Coding example:
472 * \code
473 * // configure P33.[7:0] to use CMOS pad driver with speed 1
474 * IfxPort_setGroupPadDriver(&MODULE_P33, 0, 0xff, IfxPort_PadDriver_cmosAutomotiveSpeed1);
475 * \endcode
476 *
477 */
478 IFX_EXTERN void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver);
479
480 /** \brief set LVDSH mode (configured for Port21)
481 * \param port Pointer to the port which should be accessed.
482 * \param pinIndex specifies pin to be modified
483 * \param mode specifes the mode of pin
484 * \param enablePortControlled specifies whether it is controlled by port or HSCT
485 * \return None
486 */
487 IFX_EXTERN void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled);
488
489 /** \brief set LVDSM mode
490 * \param port Pointer to the port which should be accessed.
491 * \param pinIndex specifies pin to be modified
492 * \param lvdsPadDriver select speed grade of LVDS Pad
493 * \param padSupply select the PAD supply (5/3.3V)
494 * \return None
495 */
496 IFX_EXTERN void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply);
497
498 /** \} */
499
500 /******************************************************************************/
501 /*-------------------------Global Function Prototypes-------------------------*/
502 /******************************************************************************/
503
504 /** \brief Disable the emergency stop function.
505 * This function disables the emergency stop function. No check is done on port functionality.
506 * \param port Pointer to the port which should be accessed.
507 * \param pinIndex Specifies the pin for which the emergency stop function should be disabled.
508 * \return None
509 *
510 * \see IfxPort_disableEmergencyStop()
511 *
512 */
513 IFX_EXTERN void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex);
514
515 /** \brief Enable the emergency stop function.
516 * This function enables the emergency stop function. No check is done on port functionality.
517 * \param port Pointer to the port which should be accessed.
518 * \param pinIndex Specifies the pin for which the emergency stop function should be enabled.
519 * \return None
520 *
521 * \see IfxPort_enableEmergencyStop()
522 *
523 */
524 IFX_EXTERN void IfxPort_setESR(Ifx_P *port, uint8 pinIndex);
525
526 /******************************************************************************/
527 /*---------------------Inline Function Implementations------------------------*/
528 /******************************************************************************/
529
530 IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask)
531 {
532 return (uint32)((port->IN.U) >> (pinIndex)) & mask;
533 }
534
535
536 IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex)
537 {
538 return (__getbit(&port->IN.U, pinIndex) != 0) ? TRUE : FALSE;
539 }
540
541
542 IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
543 {
544 port->OUT.U = (port->OUT.U & ~((uint32)(mask)) << pinIndex) | (data << pinIndex);
545 }
546
547
548 IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex)
549 {
550 IfxPort_setPinState(port, pinIndex, IfxPort_State_high);
551 }
552
553
554 IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex)
555 {
556 IfxPort_setPinState(port, pinIndex, IfxPort_State_low);
557 }
558
559
560 IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
561 {
562 IfxPort_setPinMode(port, pinIndex, (IfxPort_Mode)mode);
563 }
564
565
566 IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
567 {
568 IfxPort_setPinMode(port, pinIndex, (IfxPort_Mode)(index | mode));
569 }
570
571
572 IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
573 {
574 port->OMR.U = action << pinIndex;
575 }
576
577
578 IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex)
579 {
580 IfxPort_setPinState(port, pinIndex, IfxPort_State_toggled);
581 }
582
583
584 #endif /* IFXPORT_H */
IfxPort_PadSupply_5v
select, 5V supply
Definition: IfxPort.h:144
IfxPort_State_toggled
Ifx_P pin is toggled.
Definition: IfxPort.h:157
IfxPort_Mode_outputOpenDrainAlt5
Open-drain, Alternate output function 5.
Definition: IfxPort.h:93
IfxPort_Mode_outputOpenDrainAlt4
Open-drain, Alternate output function 4.
Definition: IfxPort.h:92
IfxPort_PadDriver_lvdsSpeed2
Lvds Speed grade 2.
Definition: IfxPort.h:131
IfxPort_Mode_outputPushPullAlt1
Push-pull, Alternate output function 1.
Definition: IfxPort.h:81
IfxPort_PadDriver_ttlSpeed4
Speed grade 4.
Definition: IfxPort.h:137
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:59
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxPort_PadDriver_ttlSpeed1
Speed grade 1.
Definition: IfxPort.h:134
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:155
IfxPort_Mode_inputNoPullDevice
Input, No pull device connected.
Definition: IfxPort.h:77
IfxPort_setPinMode
IFX_EXTERN void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:260
IfxPort_Mode_outputPushPullGeneral
Push-pull, General-purpose output.
Definition: IfxPort.h:80
IfxPort_Mode_outputOpenDrainAlt7
Open-drain, Alternate output function 7.
Definition: IfxPort.h:95
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
IfxPort_Mode_outputOpenDrainAlt6
Open-drain, Alternate output function 6.
Definition: IfxPort.h:94
IfxPort_setPinPadDriver
IFX_EXTERN void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxPort_ControlledBy_hsct
Port controlled by HSCT Module.
Definition: IfxPort.h:58
IfxPort_setGroupModeInput
IFX_EXTERN void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
Set pin modes to input at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:138
IfxPort_Mode_inputPullDown
Input, pull-down device connected.
Definition: IfxPort.h:78
IfxPort_Pin_Config::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort.h:183
IfxPort_setGroupState
IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
Set the port group state.
Definition: IfxPort.h:542
IfxPort_InputMode_undefined
Definition: IfxPort.h:65
IfxPort_State
IfxPort_State
Ifx_P output modification modes definition.
Definition: IfxPort.h:152
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxPort_Pin_Config::mode
IfxPort_OutputIdx mode
Definition: IfxPort.h:182
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxPort_Mode_outputPushPullAlt4
Push-pull, Alternate output function 4.
Definition: IfxPort.h:84
IfxPort_ControlledBy
IfxPort_ControlledBy
The LVDS RX_DIS control function can be selected from the Port (default) or HSCT module.declared in MODULE_PORTx.LPCRx.
Definition: IfxPort.h:55
IfxPort_PadDriver_cmosAutomotiveSpeed4
Speed grade 4.
Definition: IfxPort.h:129
IfxScuWdt.h
SCU basic functionality.
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxPort_setGroupModeOutput
IFX_EXTERN void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Set pin modes to output at the pin location specified by &#39;1&#39; by the mask starting at pinIndex...
Definition: IfxPort.c:176
IfxPort_Mode_outputOpenDrainAlt2
Open-drain, Alternate output function 2.
Definition: IfxPort.h:90
IfxPort_setESR
IFX_EXTERN void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:128
IfxPort_OutputIdx_general
Definition: IfxPort.h:102
IfxPort_Mode_outputPushPullAlt7
Push-pull, Alternate output function 7.
Definition: IfxPort.h:87
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:105
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxPort_PadDriver_cmosAutomotiveSpeed3
Speed grade 3.
Definition: IfxPort.h:128
IfxPort_Mode_outputPushPullAlt2
Push-pull, Alternate output function 2.
Definition: IfxPort.h:82
IfxPort_getGroupState
IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask)
Return the port group state.
Definition: IfxPort.h:530
IfxPort_Mode_outputOpenDrainGeneral
Open-drain, General-purpose output.
Definition: IfxPort.h:88
__getbit
#define __getbit
Definition: IfxCpu_IntrinsicsDcc.h:1732
IfxPort_Pin_Config
To configure pins.
Definition: IfxPort.h:178
IfxPort_Mode_outputPushPullAlt6
Push-pull, Alternate output function 6.
Definition: IfxPort.h:86
IfxPort_setPinModeLvdsMedium
IFX_EXTERN void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
set LVDSM mode
Definition: IfxPort.c:305
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:66
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:572
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:103
IfxPort_PadDriver_ttlSpeed2
Speed grade 2.
Definition: IfxPort.h:135
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxPort_PadSupply_3v
select, 3V supply
Definition: IfxPort.h:145
IfxPort_getIndex
IFX_EXTERN IfxPort_Index IfxPort_getIndex(Ifx_P *port)
Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
Definition: IfxPort.c:98
IfxPort_togglePin
IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex)
Toggle the port output.
Definition: IfxPort.h:578
IfxPort_enableEmergencyStop
IFX_EXTERN boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Enable the emergency stop function. This function enables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:58
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IfxPort_Mode_outputPushPullAlt3
Push-pull, Alternate output function 3.
Definition: IfxPort.h:83
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxPort_setPinLow
IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex)
Reset the port output.
Definition: IfxPort.h:554
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:156
IfxPort_ControlledBy_port
port controlled by PORT Module
Definition: IfxPort.h:57
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:109
IfxPort_Mode_inputPullUp
Input, pull-up device connected.
Definition: IfxPort.h:79
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxPort_InputMode_pullDown
Definition: IfxPort.h:67
IfxPort_setPinModeLvdsHigh
IFX_EXTERN void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
set LVDSH mode (configured for Port21)
Definition: IfxPort.c:278
IfxPort_cfg.h
PORT on-chip implementation data.
IfxPort_State_notChanged
Ifx_P pin is left unchanged.
Definition: IfxPort.h:154
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPort_disableEmergencyStop
IFX_EXTERN boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. A check is done on port functionality.
Definition: IfxPort.c:35
IfxPort_PadDriver_ttlSpeed3
Speed grade 3.
Definition: IfxPort.h:136
IfxPort_PadDriver_lvdsSpeed3
Lvds Speed grade 3.
Definition: IfxPort.h:132
IfxPort_PadSupply
IfxPort_PadSupply
MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair...
Definition: IfxPort.h:142
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxPort_getPinState
IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex)
Return the port state.
Definition: IfxPort.h:536
IfxPort_getAddress
IFX_EXTERN Ifx_P * IfxPort_getAddress(IfxPort_Index port)
Returns the module address of the selected Port module.
Definition: IfxPort.c:79
IfxPort_PadDriver_lvdsSpeed4
Lvds Speed grade 4.
Definition: IfxPort.h:133
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxPort_setPinHigh
IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex)
Set the port output.
Definition: IfxPort.h:548
IfxPort_PadDriver_lvdsSpeed1
Lvds Speed grade 1.
Definition: IfxPort.h:130
IfxPort_Mode_outputOpenDrainAlt3
Open-drain, Alternate output function 3.
Definition: IfxPort.h:91
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:75
IfxPort_setGroupPadDriver
IFX_EXTERN void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
Set pad driver strength at the pin location specified by &#39;1&#39; by the mask.
Definition: IfxPort.c:216
IfxPort_resetESR
IFX_EXTERN void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
Disable the emergency stop function. This function disables the emergency stop function. No check is done on port functionality.
Definition: IfxPort.c:118
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxPort_Mode_outputPushPullAlt5
Push-pull, Alternate output function 5.
Definition: IfxPort.h:85
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxPort_OutputMode_openDrain
Definition: IfxPort.h:117
IfxPort_PadDriver_cmosAutomotiveSpeed2
Speed grade 2.
Definition: IfxPort.h:127
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxPort_InputMode_pullUp
Definition: IfxPort.h:68
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxPort_Mode_outputOpenDrainAlt1
Open-drain, Alternate output function 1.
Definition: IfxPort.h:89


iLLD_TC26B: IfxPort_Io.c Source File

  • Port
  • Io
IfxPort_Io.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_Io.c
3 * \brief PORT IO details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxPort_Io.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
36 {
37 IfxPort_Io_ConfigPin *pinTable = (IfxPort_Io_ConfigPin *)&config->pinTable[0];
38
39 uint32 i;
40
41 for (i = 0; i < config->size; i++, ++pinTable)
42 {
43 IfxPort_Pin *pin = (IfxPort_Pin *)pinTable->pin;
44 IfxPort_setPinMode(pin->port, pin->pinIndex, pinTable->mode);
45 IfxPort_setPinPadDriver(pin->port, pin->pinIndex, pinTable->padDriver);
46 }
47 }
IfxPort_Io.h
PORT IO details.
IfxPort_setPinMode
void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
Configure the port input / output mode. Also Configures the P40/P41 Port for digital functionality wh...
Definition: IfxPort.c:260
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxPort_Io_ConfigPin::pin
IFX_CONST IfxPort_Pin * pin
Definition: IfxPort_Io.h:161
IfxPort_Io_Config::size
uint32 size
Definition: IfxPort_Io.h:172
IfxPort_Io_ConfigPin::mode
IfxPort_Mode mode
Definition: IfxPort_Io.h:162
IfxPort_Io_Config::pinTable
IfxPort_Io_ConfigPin * pinTable
Definition: IfxPort_Io.h:173
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxPort_Io_initModule
void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
Definition: IfxPort_Io.c:35
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxPort_Io_ConfigPin::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort_Io.h:163
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxPort_Io_ConfigPin
Definition: IfxPort_Io.h:159
IfxPort_Io_Config
Definition: IfxPort_Io.h:170


iLLD_TC26B: IfxPort_Io.h Source File

  • Port
  • Io
IfxPort_Io.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_Io.h
3 * \brief PORT IO details
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Port_Io_Usage How to use the PORT I/O driver?
25 * \ingroup IfxLld_Port
26 *
27 * The PORT I/O driver provides several functions to easily configure and read pins.
28 * The configuration includes input/output, mode, pad driver strength and state. For referencing the pins and their ports a IfxPort_PinMap is available as well.
29 *
30 * In the following sections it will be described, how to integrate the driver into the application framework.
31 *
32 * \section IfxLld_Port_Io_Preparation Preparation
33 * \subsection IfxLld_Port_Io_Include Include Files
34 *
35 * Include following header file into your C code:
36 * \code
37 * #include <Port/Io/IfxPort_Io.h>
38 * \endcode
39 *
40 * \subsection IfxLld_Port_Io_Variables Conifguration Table
41 *
42 * Specify the used pins, their modes and (for outputs) the pad driver strength:
43 * <br> Note: For inputs the pad driver strength is only a dummy.
44 * \code
45 * const IfxPort_Io_ConfigPin configPin[] = {
46 * {&IfxPort_P00_0, IfxPort_Mode_inputPullDown, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P00.0
47 * {&IfxPort_P33_0, IfxPort_Mode_outputPushPullGeneral, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P33.0
48 * };
49 * \endcode
50 *
51 * Note: the IfxPort_* pins are defined in IfxPort_PinMap
52 *
53 * \subsection IfxLld_Port_Io_Init Port Initialisation
54 *
55 * Assemble the final configuration structure:
56 *
57 * \code
58 * const IfxPort_Io_Config conf = {
59 * sizeof(configPin)/sizeof(IfxPort_Io_ConfigPin),
60 * (IfxPort_Io_ConfigPin *)configPin
61 * };
62 * \endcode
63 *
64 * Call the initialisation function:
65 *
66 * \code
67 * IfxPort_Io_initModule(&conf);
68 * \endcode
69 *
70 * Now the pins are configured as specified.
71 *
72 * \section IfxLld_Port_Io_MiscFunctions Misc. Functions of the Standard Layer
73 *
74 * \subsection IfxLld_Port_Io_Mode Pin Mode Configuration
75 *
76 * Generally, you can use one function for both inputs and outputs to set the desired mode.
77 *
78 * \code
79 * // configure P33.0 as general output
80 * IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);
81 * \endcode
82 *
83 * For inputs use the IfxPort_setPinModeInput function:
84 *
85 * \code
86 * // configure P33.0 as input with pullUp
87 * IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);
88 * \endcode
89 *
90 * For outputs use the IfxPort_setModeOutput function:
91 *
92 * \code
93 * // configure P33.0 as output in general pushPull mode
94 * IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
95 * \endcode
96 *
97 * If the pin is an output, the pad driver should be configured as well:
98 *
99 * \code
100 * IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
101 * \endcode
102 *
103 * \subsection IfxLld_Port_Io_Input Reading Input State
104 * Read the state of a single pin:
105 * \code
106 * uint8 state = IfxPort_getPinState(&MODULE_P33, 0); // read P33.0
107 * \endcode
108 *
109 * \subsection IfxLld_Port_Io_Output Setting Output State
110 *
111 * Generally, you can use one function to set an output pin high or low or to toggle it.
112 *
113 * \code
114 * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled); // toggle P33.0
115 * \endcode
116 *
117 * An output pin can be set high as following:
118 * \code
119 * IfxPort_setPinHigh(&MODULE_P33, 0); // P33.0 = 1
120 * \endcode
121 *
122 * An output pin can be set low as following:
123 * \code
124 * IfxPort_setPinLow(&MODULE_P33, 0); // P33.0 = 0
125 * \endcode
126 *
127 * \subsection IfxLld_Port_Io_Emergency Configure Emergency Function
128 *
129 * Enable emergency stop for P33.0:
130 * \code
131 * IfxPort_enableEmergencyStop(&MODULE_P33, 0);
132 * \endcode
133 *
134 * The driver also provides a function to disable this feature.
135 *
136 * \defgroup IfxLld_Port_Io Interface Driver
137 * \ingroup IfxLld_Port
138 * \defgroup IfxLld_Port_Io_DataStructures Data Structures
139 * \ingroup IfxLld_Port_Io
140 * \defgroup IfxLld_Port_Io_ModuleFunctions Module Functions
141 * \ingroup IfxLld_Port_Io
142 */
143
144 #ifndef IFXPORT_IO_H
145 #define IFXPORT_IO_H 1
146
147 /******************************************************************************/
148 /*----------------------------------Includes----------------------------------*/
149 /******************************************************************************/
150
151 #include "Port/Std/IfxPort.h"
152
153 /******************************************************************************/
154 /*-----------------------------Data Structures--------------------------------*/
155 /******************************************************************************/
156
157 /** \addtogroup IfxLld_Port_Io_DataStructures
158 * \{ */
159 typedef struct
160 {
161 IFX_CONST IfxPort_Pin *pin;
162 IfxPort_Mode mode;
163 IfxPort_PadDriver padDriver;
164 } IfxPort_Io_ConfigPin;
165
166 /** \} */
167
168 /** \addtogroup IfxLld_Port_Io_DataStructures
169 * \{ */
170 typedef struct
171 {
172 uint32 size;
173 IfxPort_Io_ConfigPin *pinTable;
174 } IfxPort_Io_Config;
175
176 /** \} */
177
178 /** \addtogroup IfxLld_Port_Io_ModuleFunctions
179 * \{ */
180
181 /******************************************************************************/
182 /*-------------------------Global Function Prototypes-------------------------*/
183 /******************************************************************************/
184
185 /**
186 * \return None
187 */
188 IFX_EXTERN void IfxPort_Io_initModule(const IfxPort_Io_Config *config);
189
190 /** \} */
191
192 #endif /* IFXPORT_IO_H */
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPort_Io_ConfigPin::pin
IFX_CONST IfxPort_Pin * pin
Definition: IfxPort_Io.h:161
IfxPort_Io_Config::size
uint32 size
Definition: IfxPort_Io.h:172
IfxPort_Io_ConfigPin::mode
IfxPort_Mode mode
Definition: IfxPort_Io.h:162
IfxPort_Io_Config::pinTable
IfxPort_Io_ConfigPin * pinTable
Definition: IfxPort_Io.h:173
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPort_Io_initModule
IFX_EXTERN void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
Definition: IfxPort_Io.c:35
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxPort_Io_ConfigPin::padDriver
IfxPort_PadDriver padDriver
Definition: IfxPort_Io.h:163
IfxPort_Io_ConfigPin
Definition: IfxPort_Io.h:159
IfxPort_Mode
IfxPort_Mode
Ifx_P input / output mode definition.
Definition: IfxPort.h:75
IfxPort_Io_Config
Definition: IfxPort_Io.h:170
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxPort_PinMap.c Source File

  • _PinMap
IfxPort_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_PinMap.c
3 * \brief PORT I/O map
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxPort_PinMap.h"
27
28 IfxPort_Pin IfxPort_P00_0 = {&MODULE_P00, 0};
29 IfxPort_Pin IfxPort_P00_1 = {&MODULE_P00, 1};
30 IfxPort_Pin IfxPort_P00_10 = {&MODULE_P00,10};
31 IfxPort_Pin IfxPort_P00_11 = {&MODULE_P00,11};
32 IfxPort_Pin IfxPort_P00_12 = {&MODULE_P00,12};
33 IfxPort_Pin IfxPort_P00_2 = {&MODULE_P00, 2};
34 IfxPort_Pin IfxPort_P00_3 = {&MODULE_P00, 3};
35 IfxPort_Pin IfxPort_P00_4 = {&MODULE_P00, 4};
36 IfxPort_Pin IfxPort_P00_5 = {&MODULE_P00, 5};
37 IfxPort_Pin IfxPort_P00_6 = {&MODULE_P00, 6};
38 IfxPort_Pin IfxPort_P00_7 = {&MODULE_P00, 7};
39 IfxPort_Pin IfxPort_P00_8 = {&MODULE_P00, 8};
40 IfxPort_Pin IfxPort_P00_9 = {&MODULE_P00, 9};
41 IfxPort_Pin IfxPort_P02_0 = {&MODULE_P02, 0};
42 IfxPort_Pin IfxPort_P02_1 = {&MODULE_P02, 1};
43 IfxPort_Pin IfxPort_P02_2 = {&MODULE_P02, 2};
44 IfxPort_Pin IfxPort_P02_3 = {&MODULE_P02, 3};
45 IfxPort_Pin IfxPort_P02_4 = {&MODULE_P02, 4};
46 IfxPort_Pin IfxPort_P02_5 = {&MODULE_P02, 5};
47 IfxPort_Pin IfxPort_P02_6 = {&MODULE_P02, 6};
48 IfxPort_Pin IfxPort_P02_7 = {&MODULE_P02, 7};
49 IfxPort_Pin IfxPort_P02_8 = {&MODULE_P02, 8};
50 IfxPort_Pin IfxPort_P10_0 = {&MODULE_P10, 0};
51 IfxPort_Pin IfxPort_P10_1 = {&MODULE_P10, 1};
52 IfxPort_Pin IfxPort_P10_2 = {&MODULE_P10, 2};
53 IfxPort_Pin IfxPort_P10_3 = {&MODULE_P10, 3};
54 IfxPort_Pin IfxPort_P10_4 = {&MODULE_P10, 4};
55 IfxPort_Pin IfxPort_P10_5 = {&MODULE_P10, 5};
56 IfxPort_Pin IfxPort_P10_6 = {&MODULE_P10, 6};
57 IfxPort_Pin IfxPort_P10_7 = {&MODULE_P10, 7};
58 IfxPort_Pin IfxPort_P10_8 = {&MODULE_P10, 8};
59 IfxPort_Pin IfxPort_P11_10 = {&MODULE_P11,10};
60 IfxPort_Pin IfxPort_P11_11 = {&MODULE_P11,11};
61 IfxPort_Pin IfxPort_P11_12 = {&MODULE_P11,12};
62 IfxPort_Pin IfxPort_P11_2 = {&MODULE_P11, 2};
63 IfxPort_Pin IfxPort_P11_3 = {&MODULE_P11, 3};
64 IfxPort_Pin IfxPort_P11_6 = {&MODULE_P11, 6};
65 IfxPort_Pin IfxPort_P11_9 = {&MODULE_P11, 9};
66 IfxPort_Pin IfxPort_P13_0 = {&MODULE_P13, 0};
67 IfxPort_Pin IfxPort_P13_1 = {&MODULE_P13, 1};
68 IfxPort_Pin IfxPort_P13_2 = {&MODULE_P13, 2};
69 IfxPort_Pin IfxPort_P13_3 = {&MODULE_P13, 3};
70 IfxPort_Pin IfxPort_P14_0 = {&MODULE_P14, 0};
71 IfxPort_Pin IfxPort_P14_1 = {&MODULE_P14, 1};
72 IfxPort_Pin IfxPort_P14_10 = {&MODULE_P14,10};
73 IfxPort_Pin IfxPort_P14_2 = {&MODULE_P14, 2};
74 IfxPort_Pin IfxPort_P14_3 = {&MODULE_P14, 3};
75 IfxPort_Pin IfxPort_P14_4 = {&MODULE_P14, 4};
76 IfxPort_Pin IfxPort_P14_5 = {&MODULE_P14, 5};
77 IfxPort_Pin IfxPort_P14_6 = {&MODULE_P14, 6};
78 IfxPort_Pin IfxPort_P14_7 = {&MODULE_P14, 7};
79 IfxPort_Pin IfxPort_P14_8 = {&MODULE_P14, 8};
80 IfxPort_Pin IfxPort_P14_9 = {&MODULE_P14, 9};
81 IfxPort_Pin IfxPort_P15_0 = {&MODULE_P15, 0};
82 IfxPort_Pin IfxPort_P15_1 = {&MODULE_P15, 1};
83 IfxPort_Pin IfxPort_P15_2 = {&MODULE_P15, 2};
84 IfxPort_Pin IfxPort_P15_3 = {&MODULE_P15, 3};
85 IfxPort_Pin IfxPort_P15_4 = {&MODULE_P15, 4};
86 IfxPort_Pin IfxPort_P15_5 = {&MODULE_P15, 5};
87 IfxPort_Pin IfxPort_P15_6 = {&MODULE_P15, 6};
88 IfxPort_Pin IfxPort_P15_7 = {&MODULE_P15, 7};
89 IfxPort_Pin IfxPort_P15_8 = {&MODULE_P15, 8};
90 IfxPort_Pin IfxPort_P20_0 = {&MODULE_P20, 0};
91 IfxPort_Pin IfxPort_P20_1 = {&MODULE_P20, 1};
92 IfxPort_Pin IfxPort_P20_10 = {&MODULE_P20,10};
93 IfxPort_Pin IfxPort_P20_11 = {&MODULE_P20,11};
94 IfxPort_Pin IfxPort_P20_12 = {&MODULE_P20,12};
95 IfxPort_Pin IfxPort_P20_13 = {&MODULE_P20,13};
96 IfxPort_Pin IfxPort_P20_14 = {&MODULE_P20,14};
97 IfxPort_Pin IfxPort_P20_3 = {&MODULE_P20, 3};
98 IfxPort_Pin IfxPort_P20_6 = {&MODULE_P20, 6};
99 IfxPort_Pin IfxPort_P20_7 = {&MODULE_P20, 7};
100 IfxPort_Pin IfxPort_P20_8 = {&MODULE_P20, 8};
101 IfxPort_Pin IfxPort_P20_9 = {&MODULE_P20, 9};
102 IfxPort_Pin IfxPort_P21_0 = {&MODULE_P21, 0};
103 IfxPort_Pin IfxPort_P21_1 = {&MODULE_P21, 1};
104 IfxPort_Pin IfxPort_P21_2 = {&MODULE_P21, 2};
105 IfxPort_Pin IfxPort_P21_3 = {&MODULE_P21, 3};
106 IfxPort_Pin IfxPort_P21_4 = {&MODULE_P21, 4};
107 IfxPort_Pin IfxPort_P21_5 = {&MODULE_P21, 5};
108 IfxPort_Pin IfxPort_P21_6 = {&MODULE_P21, 6};
109 IfxPort_Pin IfxPort_P21_7 = {&MODULE_P21, 7};
110 IfxPort_Pin IfxPort_P22_0 = {&MODULE_P22, 0};
111 IfxPort_Pin IfxPort_P22_1 = {&MODULE_P22, 1};
112 IfxPort_Pin IfxPort_P22_2 = {&MODULE_P22, 2};
113 IfxPort_Pin IfxPort_P22_3 = {&MODULE_P22, 3};
114 IfxPort_Pin IfxPort_P23_0 = {&MODULE_P23, 0};
115 IfxPort_Pin IfxPort_P23_1 = {&MODULE_P23, 1};
116 IfxPort_Pin IfxPort_P23_2 = {&MODULE_P23, 2};
117 IfxPort_Pin IfxPort_P23_3 = {&MODULE_P23, 3};
118 IfxPort_Pin IfxPort_P23_4 = {&MODULE_P23, 4};
119 IfxPort_Pin IfxPort_P23_5 = {&MODULE_P23, 5};
120 IfxPort_Pin IfxPort_P32_0 = {&MODULE_P32, 0};
121 IfxPort_Pin IfxPort_P32_2 = {&MODULE_P32, 2};
122 IfxPort_Pin IfxPort_P32_3 = {&MODULE_P32, 3};
123 IfxPort_Pin IfxPort_P32_4 = {&MODULE_P32, 4};
124 IfxPort_Pin IfxPort_P33_0 = {&MODULE_P33, 0};
125 IfxPort_Pin IfxPort_P33_1 = {&MODULE_P33, 1};
126 IfxPort_Pin IfxPort_P33_10 = {&MODULE_P33,10};
127 IfxPort_Pin IfxPort_P33_11 = {&MODULE_P33,11};
128 IfxPort_Pin IfxPort_P33_12 = {&MODULE_P33,12};
129 IfxPort_Pin IfxPort_P33_13 = {&MODULE_P33,13};
130 IfxPort_Pin IfxPort_P33_2 = {&MODULE_P33, 2};
131 IfxPort_Pin IfxPort_P33_3 = {&MODULE_P33, 3};
132 IfxPort_Pin IfxPort_P33_4 = {&MODULE_P33, 4};
133 IfxPort_Pin IfxPort_P33_5 = {&MODULE_P33, 5};
134 IfxPort_Pin IfxPort_P33_6 = {&MODULE_P33, 6};
135 IfxPort_Pin IfxPort_P33_7 = {&MODULE_P33, 7};
136 IfxPort_Pin IfxPort_P33_8 = {&MODULE_P33, 8};
137 IfxPort_Pin IfxPort_P33_9 = {&MODULE_P33, 9};
138 IfxPort_Pin IfxPort_P40_0 = {&MODULE_P40, 0};
139 IfxPort_Pin IfxPort_P40_1 = {&MODULE_P40, 1};
140 IfxPort_Pin IfxPort_P40_2 = {&MODULE_P40, 2};
141 IfxPort_Pin IfxPort_P40_3 = {&MODULE_P40, 3};
142 IfxPort_Pin IfxPort_P40_6 = {&MODULE_P40, 6};
143 IfxPort_Pin IfxPort_P40_7 = {&MODULE_P40, 7};
144 IfxPort_Pin IfxPort_P40_8 = {&MODULE_P40, 8};
145 IfxPort_Pin IfxPort_P40_9 = {&MODULE_P40, 9};
146
147
148 const IfxPort_Pin *IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS] = {
149 {
150 &IfxPort_P00_0,
151 &IfxPort_P00_1,
152 &IfxPort_P00_2,
153 &IfxPort_P00_3,
154 &IfxPort_P00_4,
155 &IfxPort_P00_5,
156 &IfxPort_P00_6,
157 &IfxPort_P00_7,
158 &IfxPort_P00_8,
159 &IfxPort_P00_9,
160 &IfxPort_P00_10,
161 &IfxPort_P00_11,
162 &IfxPort_P00_12,
163 NULL_PTR,
164 NULL_PTR
165 },
166 {
167 NULL_PTR,
168 NULL_PTR,
169 NULL_PTR,
170 NULL_PTR,
171 NULL_PTR,
172 NULL_PTR,
173 NULL_PTR,
174 NULL_PTR,
175 NULL_PTR,
176 NULL_PTR,
177 NULL_PTR,
178 NULL_PTR,
179 NULL_PTR,
180 NULL_PTR,
181 NULL_PTR
182 },
183 {
184 &IfxPort_P02_0,
185 &IfxPort_P02_1,
186 &IfxPort_P02_2,
187 &IfxPort_P02_3,
188 &IfxPort_P02_4,
189 &IfxPort_P02_5,
190 &IfxPort_P02_6,
191 &IfxPort_P02_7,
192 &IfxPort_P02_8,
193 NULL_PTR,
194 NULL_PTR,
195 NULL_PTR,
196 NULL_PTR,
197 NULL_PTR,
198 NULL_PTR
199 },
200 {
201 NULL_PTR,
202 NULL_PTR,
203 NULL_PTR,
204 NULL_PTR,
205 NULL_PTR,
206 NULL_PTR,
207 NULL_PTR,
208 NULL_PTR,
209 NULL_PTR,
210 NULL_PTR,
211 NULL_PTR,
212 NULL_PTR,
213 NULL_PTR,
214 NULL_PTR,
215 NULL_PTR
216 },
217 {
218 NULL_PTR,
219 NULL_PTR,
220 NULL_PTR,
221 NULL_PTR,
222 NULL_PTR,
223 NULL_PTR,
224 NULL_PTR,
225 NULL_PTR,
226 NULL_PTR,
227 NULL_PTR,
228 NULL_PTR,
229 NULL_PTR,
230 NULL_PTR,
231 NULL_PTR,
232 NULL_PTR
233 },
234 {
235 NULL_PTR,
236 NULL_PTR,
237 NULL_PTR,
238 NULL_PTR,
239 NULL_PTR,
240 NULL_PTR,
241 NULL_PTR,
242 NULL_PTR,
243 NULL_PTR,
244 NULL_PTR,
245 NULL_PTR,
246 NULL_PTR,
247 NULL_PTR,
248 NULL_PTR,
249 NULL_PTR
250 },
251 {
252 NULL_PTR,
253 NULL_PTR,
254 NULL_PTR,
255 NULL_PTR,
256 NULL_PTR,
257 NULL_PTR,
258 NULL_PTR,
259 NULL_PTR,
260 NULL_PTR,
261 NULL_PTR,
262 NULL_PTR,
263 NULL_PTR,
264 NULL_PTR,
265 NULL_PTR,
266 NULL_PTR
267 },
268 {
269 NULL_PTR,
270 NULL_PTR,
271 NULL_PTR,
272 NULL_PTR,
273 NULL_PTR,
274 NULL_PTR,
275 NULL_PTR,
276 NULL_PTR,
277 NULL_PTR,
278 NULL_PTR,
279 NULL_PTR,
280 NULL_PTR,
281 NULL_PTR,
282 NULL_PTR,
283 NULL_PTR
284 },
285 {
286 NULL_PTR,
287 NULL_PTR,
288 NULL_PTR,
289 NULL_PTR,
290 NULL_PTR,
291 NULL_PTR,
292 NULL_PTR,
293 NULL_PTR,
294 NULL_PTR,
295 NULL_PTR,
296 NULL_PTR,
297 NULL_PTR,
298 NULL_PTR,
299 NULL_PTR,
300 NULL_PTR
301 },
302 {
303 NULL_PTR,
304 NULL_PTR,
305 NULL_PTR,
306 NULL_PTR,
307 NULL_PTR,
308 NULL_PTR,
309 NULL_PTR,
310 NULL_PTR,
311 NULL_PTR,
312 NULL_PTR,
313 NULL_PTR,
314 NULL_PTR,
315 NULL_PTR,
316 NULL_PTR,
317 NULL_PTR
318 },
319 {
320 &IfxPort_P10_0,
321 &IfxPort_P10_1,
322 &IfxPort_P10_2,
323 &IfxPort_P10_3,
324 &IfxPort_P10_4,
325 &IfxPort_P10_5,
326 &IfxPort_P10_6,
327 &IfxPort_P10_7,
328 &IfxPort_P10_8,
329 NULL_PTR,
330 NULL_PTR,
331 NULL_PTR,
332 NULL_PTR,
333 NULL_PTR,
334 NULL_PTR
335 },
336 {
337 NULL_PTR,
338 NULL_PTR,
339 &IfxPort_P11_2,
340 &IfxPort_P11_3,
341 NULL_PTR,
342 NULL_PTR,
343 &IfxPort_P11_6,
344 NULL_PTR,
345 NULL_PTR,
346 &IfxPort_P11_9,
347 &IfxPort_P11_10,
348 &IfxPort_P11_11,
349 &IfxPort_P11_12,
350 NULL_PTR,
351 NULL_PTR
352 },
353 {
354 NULL_PTR,
355 NULL_PTR,
356 NULL_PTR,
357 NULL_PTR,
358 NULL_PTR,
359 NULL_PTR,
360 NULL_PTR,
361 NULL_PTR,
362 NULL_PTR,
363 NULL_PTR,
364 NULL_PTR,
365 NULL_PTR,
366 NULL_PTR,
367 NULL_PTR,
368 NULL_PTR
369 },
370 {
371 &IfxPort_P13_0,
372 &IfxPort_P13_1,
373 &IfxPort_P13_2,
374 &IfxPort_P13_3,
375 NULL_PTR,
376 NULL_PTR,
377 NULL_PTR,
378 NULL_PTR,
379 NULL_PTR,
380 NULL_PTR,
381 NULL_PTR,
382 NULL_PTR,
383 NULL_PTR,
384 NULL_PTR,
385 NULL_PTR
386 },
387 {
388 &IfxPort_P14_0,
389 &IfxPort_P14_1,
390 &IfxPort_P14_2,
391 &IfxPort_P14_3,
392 &IfxPort_P14_4,
393 &IfxPort_P14_5,
394 &IfxPort_P14_6,
395 &IfxPort_P14_7,
396 &IfxPort_P14_8,
397 &IfxPort_P14_9,
398 &IfxPort_P14_10,
399 NULL_PTR,
400 NULL_PTR,
401 NULL_PTR,
402 NULL_PTR
403 },
404 {
405 &IfxPort_P15_0,
406 &IfxPort_P15_1,
407 &IfxPort_P15_2,
408 &IfxPort_P15_3,
409 &IfxPort_P15_4,
410 &IfxPort_P15_5,
411 &IfxPort_P15_6,
412 &IfxPort_P15_7,
413 &IfxPort_P15_8,
414 NULL_PTR,
415 NULL_PTR,
416 NULL_PTR,
417 NULL_PTR,
418 NULL_PTR,
419 NULL_PTR
420 },
421 {
422 NULL_PTR,
423 NULL_PTR,
424 NULL_PTR,
425 NULL_PTR,
426 NULL_PTR,
427 NULL_PTR,
428 NULL_PTR,
429 NULL_PTR,
430 NULL_PTR,
431 NULL_PTR,
432 NULL_PTR,
433 NULL_PTR,
434 NULL_PTR,
435 NULL_PTR,
436 NULL_PTR
437 },
438 {
439 NULL_PTR,
440 NULL_PTR,
441 NULL_PTR,
442 NULL_PTR,
443 NULL_PTR,
444 NULL_PTR,
445 NULL_PTR,
446 NULL_PTR,
447 NULL_PTR,
448 NULL_PTR,
449 NULL_PTR,
450 NULL_PTR,
451 NULL_PTR,
452 NULL_PTR,
453 NULL_PTR
454 },
455 {
456 NULL_PTR,
457 NULL_PTR,
458 NULL_PTR,
459 NULL_PTR,
460 NULL_PTR,
461 NULL_PTR,
462 NULL_PTR,
463 NULL_PTR,
464 NULL_PTR,
465 NULL_PTR,
466 NULL_PTR,
467 NULL_PTR,
468 NULL_PTR,
469 NULL_PTR,
470 NULL_PTR
471 },
472 {
473 NULL_PTR,
474 NULL_PTR,
475 NULL_PTR,
476 NULL_PTR,
477 NULL_PTR,
478 NULL_PTR,
479 NULL_PTR,
480 NULL_PTR,
481 NULL_PTR,
482 NULL_PTR,
483 NULL_PTR,
484 NULL_PTR,
485 NULL_PTR,
486 NULL_PTR,
487 NULL_PTR
488 },
489 {
490 &IfxPort_P20_0,
491 &IfxPort_P20_1,
492 NULL_PTR,
493 &IfxPort_P20_3,
494 NULL_PTR,
495 NULL_PTR,
496 &IfxPort_P20_6,
497 &IfxPort_P20_7,
498 &IfxPort_P20_8,
499 &IfxPort_P20_9,
500 &IfxPort_P20_10,
501 &IfxPort_P20_11,
502 &IfxPort_P20_12,
503 &IfxPort_P20_13,
504 &IfxPort_P20_14
505 },
506 {
507 &IfxPort_P21_0,
508 &IfxPort_P21_1,
509 &IfxPort_P21_2,
510 &IfxPort_P21_3,
511 &IfxPort_P21_4,
512 &IfxPort_P21_5,
513 &IfxPort_P21_6,
514 &IfxPort_P21_7,
515 NULL_PTR,
516 NULL_PTR,
517 NULL_PTR,
518 NULL_PTR,
519 NULL_PTR,
520 NULL_PTR,
521 NULL_PTR
522 },
523 {
524 &IfxPort_P22_0,
525 &IfxPort_P22_1,
526 &IfxPort_P22_2,
527 &IfxPort_P22_3,
528 NULL_PTR,
529 NULL_PTR,
530 NULL_PTR,
531 NULL_PTR,
532 NULL_PTR,
533 NULL_PTR,
534 NULL_PTR,
535 NULL_PTR,
536 NULL_PTR,
537 NULL_PTR,
538 NULL_PTR
539 },
540 {
541 &IfxPort_P23_0,
542 &IfxPort_P23_1,
543 &IfxPort_P23_2,
544 &IfxPort_P23_3,
545 &IfxPort_P23_4,
546 &IfxPort_P23_5,
547 NULL_PTR,
548 NULL_PTR,
549 NULL_PTR,
550 NULL_PTR,
551 NULL_PTR,
552 NULL_PTR,
553 NULL_PTR,
554 NULL_PTR,
555 NULL_PTR
556 },
557 {
558 NULL_PTR,
559 NULL_PTR,
560 NULL_PTR,
561 NULL_PTR,
562 NULL_PTR,
563 NULL_PTR,
564 NULL_PTR,
565 NULL_PTR,
566 NULL_PTR,
567 NULL_PTR,
568 NULL_PTR,
569 NULL_PTR,
570 NULL_PTR,
571 NULL_PTR,
572 NULL_PTR
573 },
574 {
575 NULL_PTR,
576 NULL_PTR,
577 NULL_PTR,
578 NULL_PTR,
579 NULL_PTR,
580 NULL_PTR,
581 NULL_PTR,
582 NULL_PTR,
583 NULL_PTR,
584 NULL_PTR,
585 NULL_PTR,
586 NULL_PTR,
587 NULL_PTR,
588 NULL_PTR,
589 NULL_PTR
590 },
591 {
592 NULL_PTR,
593 NULL_PTR,
594 NULL_PTR,
595 NULL_PTR,
596 NULL_PTR,
597 NULL_PTR,
598 NULL_PTR,
599 NULL_PTR,
600 NULL_PTR,
601 NULL_PTR,
602 NULL_PTR,
603 NULL_PTR,
604 NULL_PTR,
605 NULL_PTR,
606 NULL_PTR
607 },
608 {
609 NULL_PTR,
610 NULL_PTR,
611 NULL_PTR,
612 NULL_PTR,
613 NULL_PTR,
614 NULL_PTR,
615 NULL_PTR,
616 NULL_PTR,
617 NULL_PTR,
618 NULL_PTR,
619 NULL_PTR,
620 NULL_PTR,
621 NULL_PTR,
622 NULL_PTR,
623 NULL_PTR
624 },
625 {
626 NULL_PTR,
627 NULL_PTR,
628 NULL_PTR,
629 NULL_PTR,
630 NULL_PTR,
631 NULL_PTR,
632 NULL_PTR,
633 NULL_PTR,
634 NULL_PTR,
635 NULL_PTR,
636 NULL_PTR,
637 NULL_PTR,
638 NULL_PTR,
639 NULL_PTR,
640 NULL_PTR
641 },
642 {
643 NULL_PTR,
644 NULL_PTR,
645 NULL_PTR,
646 NULL_PTR,
647 NULL_PTR,
648 NULL_PTR,
649 NULL_PTR,
650 NULL_PTR,
651 NULL_PTR,
652 NULL_PTR,
653 NULL_PTR,
654 NULL_PTR,
655 NULL_PTR,
656 NULL_PTR,
657 NULL_PTR
658 },
659 {
660 NULL_PTR,
661 NULL_PTR,
662 NULL_PTR,
663 NULL_PTR,
664 NULL_PTR,
665 NULL_PTR,
666 NULL_PTR,
667 NULL_PTR,
668 NULL_PTR,
669 NULL_PTR,
670 NULL_PTR,
671 NULL_PTR,
672 NULL_PTR,
673 NULL_PTR,
674 NULL_PTR
675 },
676 {
677 NULL_PTR,
678 NULL_PTR,
679 NULL_PTR,
680 NULL_PTR,
681 NULL_PTR,
682 NULL_PTR,
683 NULL_PTR,
684 NULL_PTR,
685 NULL_PTR,
686 NULL_PTR,
687 NULL_PTR,
688 NULL_PTR,
689 NULL_PTR,
690 NULL_PTR,
691 NULL_PTR
692 },
693 {
694 &IfxPort_P32_0,
695 NULL_PTR,
696 &IfxPort_P32_2,
697 &IfxPort_P32_3,
698 &IfxPort_P32_4,
699 NULL_PTR,
700 NULL_PTR,
701 NULL_PTR,
702 NULL_PTR,
703 NULL_PTR,
704 NULL_PTR,
705 NULL_PTR,
706 NULL_PTR,
707 NULL_PTR,
708 NULL_PTR
709 },
710 {
711 &IfxPort_P33_0,
712 &IfxPort_P33_1,
713 &IfxPort_P33_2,
714 &IfxPort_P33_3,
715 &IfxPort_P33_4,
716 &IfxPort_P33_5,
717 &IfxPort_P33_6,
718 &IfxPort_P33_7,
719 &IfxPort_P33_8,
720 &IfxPort_P33_9,
721 &IfxPort_P33_10,
722 &IfxPort_P33_11,
723 &IfxPort_P33_12,
724 &IfxPort_P33_13,
725 NULL_PTR
726 },
727 {
728 NULL_PTR,
729 NULL_PTR,
730 NULL_PTR,
731 NULL_PTR,
732 NULL_PTR,
733 NULL_PTR,
734 NULL_PTR,
735 NULL_PTR,
736 NULL_PTR,
737 NULL_PTR,
738 NULL_PTR,
739 NULL_PTR,
740 NULL_PTR,
741 NULL_PTR,
742 NULL_PTR
743 },
744 {
745 NULL_PTR,
746 NULL_PTR,
747 NULL_PTR,
748 NULL_PTR,
749 NULL_PTR,
750 NULL_PTR,
751 NULL_PTR,
752 NULL_PTR,
753 NULL_PTR,
754 NULL_PTR,
755 NULL_PTR,
756 NULL_PTR,
757 NULL_PTR,
758 NULL_PTR,
759 NULL_PTR
760 },
761 {
762 NULL_PTR,
763 NULL_PTR,
764 NULL_PTR,
765 NULL_PTR,
766 NULL_PTR,
767 NULL_PTR,
768 NULL_PTR,
769 NULL_PTR,
770 NULL_PTR,
771 NULL_PTR,
772 NULL_PTR,
773 NULL_PTR,
774 NULL_PTR,
775 NULL_PTR,
776 NULL_PTR
777 },
778 {
779 NULL_PTR,
780 NULL_PTR,
781 NULL_PTR,
782 NULL_PTR,
783 NULL_PTR,
784 NULL_PTR,
785 NULL_PTR,
786 NULL_PTR,
787 NULL_PTR,
788 NULL_PTR,
789 NULL_PTR,
790 NULL_PTR,
791 NULL_PTR,
792 NULL_PTR,
793 NULL_PTR
794 },
795 {
796 NULL_PTR,
797 NULL_PTR,
798 NULL_PTR,
799 NULL_PTR,
800 NULL_PTR,
801 NULL_PTR,
802 NULL_PTR,
803 NULL_PTR,
804 NULL_PTR,
805 NULL_PTR,
806 NULL_PTR,
807 NULL_PTR,
808 NULL_PTR,
809 NULL_PTR,
810 NULL_PTR
811 },
812 {
813 NULL_PTR,
814 NULL_PTR,
815 NULL_PTR,
816 NULL_PTR,
817 NULL_PTR,
818 NULL_PTR,
819 NULL_PTR,
820 NULL_PTR,
821 NULL_PTR,
822 NULL_PTR,
823 NULL_PTR,
824 NULL_PTR,
825 NULL_PTR,
826 NULL_PTR,
827 NULL_PTR
828 },
829 {
830 &IfxPort_P40_0,
831 &IfxPort_P40_1,
832 &IfxPort_P40_2,
833 &IfxPort_P40_3,
834 NULL_PTR,
835 NULL_PTR,
836 &IfxPort_P40_6,
837 &IfxPort_P40_7,
838 &IfxPort_P40_8,
839 &IfxPort_P40_9,
840 NULL_PTR,
841 NULL_PTR,
842 NULL_PTR,
843 NULL_PTR,
844 NULL_PTR
845 }
846 };
IfxPort_P15_3
IfxPort_Pin IfxPort_P15_3
Definition: IfxPort_PinMap.c:84
IfxPort_P14_5
IfxPort_Pin IfxPort_P14_5
Definition: IfxPort_PinMap.c:76
IfxPort_P13_3
IfxPort_Pin IfxPort_P13_3
Definition: IfxPort_PinMap.c:69
IfxPort_P14_4
IfxPort_Pin IfxPort_P14_4
Definition: IfxPort_PinMap.c:75
IfxPort_P21_3
IfxPort_Pin IfxPort_P21_3
Definition: IfxPort_PinMap.c:105
IfxPort_P13_1
IfxPort_Pin IfxPort_P13_1
Definition: IfxPort_PinMap.c:67
IfxPort_P23_5
IfxPort_Pin IfxPort_P23_5
Definition: IfxPort_PinMap.c:119
IfxPort_P00_3
IfxPort_Pin IfxPort_P00_3
Definition: IfxPort_PinMap.c:34
IfxPort_P15_5
IfxPort_Pin IfxPort_P15_5
Definition: IfxPort_PinMap.c:86
IfxPort_P33_12
IfxPort_Pin IfxPort_P33_12
Definition: IfxPort_PinMap.c:128
IfxPort_P00_7
IfxPort_Pin IfxPort_P00_7
Definition: IfxPort_PinMap.c:38
IfxPort_P40_9
IfxPort_Pin IfxPort_P40_9
Definition: IfxPort_PinMap.c:145
IfxPort_P33_6
IfxPort_Pin IfxPort_P33_6
Definition: IfxPort_PinMap.c:134
IfxPort_P23_4
IfxPort_Pin IfxPort_P23_4
Definition: IfxPort_PinMap.c:118
IfxPort_P00_2
IfxPort_Pin IfxPort_P00_2
Definition: IfxPort_PinMap.c:33
IfxPort_P32_2
IfxPort_Pin IfxPort_P32_2
Definition: IfxPort_PinMap.c:121
IfxPort_P14_7
IfxPort_Pin IfxPort_P14_7
Definition: IfxPort_PinMap.c:78
IfxPort_P20_14
IfxPort_Pin IfxPort_P20_14
Definition: IfxPort_PinMap.c:96
IfxPort_P22_2
IfxPort_Pin IfxPort_P22_2
Definition: IfxPort_PinMap.c:112
IfxPort_P02_0
IfxPort_Pin IfxPort_P02_0
Definition: IfxPort_PinMap.c:41
IfxPort_P10_0
IfxPort_Pin IfxPort_P10_0
Definition: IfxPort_PinMap.c:50
IfxPort_P33_1
IfxPort_Pin IfxPort_P33_1
Definition: IfxPort_PinMap.c:125
IfxPort_P02_3
IfxPort_Pin IfxPort_P02_3
Definition: IfxPort_PinMap.c:44
IfxPort_P10_5
IfxPort_Pin IfxPort_P10_5
Definition: IfxPort_PinMap.c:55
IfxPort_P21_0
IfxPort_Pin IfxPort_P21_0
Definition: IfxPort_PinMap.c:102
IfxPort_P23_1
IfxPort_Pin IfxPort_P23_1
Definition: IfxPort_PinMap.c:115
IfxPort_P33_3
IfxPort_Pin IfxPort_P33_3
Definition: IfxPort_PinMap.c:131
IfxPort_P10_6
IfxPort_Pin IfxPort_P10_6
Definition: IfxPort_PinMap.c:56
IfxPort_P20_13
IfxPort_Pin IfxPort_P20_13
Definition: IfxPort_PinMap.c:95
IfxPort_P21_6
IfxPort_Pin IfxPort_P21_6
Definition: IfxPort_PinMap.c:108
IfxPort_P00_8
IfxPort_Pin IfxPort_P00_8
Definition: IfxPort_PinMap.c:39
IfxPort_P14_10
IfxPort_Pin IfxPort_P14_10
Definition: IfxPort_PinMap.c:72
IfxPort_P23_3
IfxPort_Pin IfxPort_P23_3
Definition: IfxPort_PinMap.c:117
IfxPort_P00_6
IfxPort_Pin IfxPort_P00_6
Definition: IfxPort_PinMap.c:37
IfxPort_P33_5
IfxPort_Pin IfxPort_P33_5
Definition: IfxPort_PinMap.c:133
IfxPort_P02_2
IfxPort_Pin IfxPort_P02_2
Definition: IfxPort_PinMap.c:43
IfxPort_P11_6
IfxPort_Pin IfxPort_P11_6
Definition: IfxPort_PinMap.c:64
IfxPort_P00_9
IfxPort_Pin IfxPort_P00_9
Definition: IfxPort_PinMap.c:40
IfxPort_P20_1
IfxPort_Pin IfxPort_P20_1
Definition: IfxPort_PinMap.c:91
IfxPort_P23_2
IfxPort_Pin IfxPort_P23_2
Definition: IfxPort_PinMap.c:116
IfxPort_P11_2
IfxPort_Pin IfxPort_P11_2
Definition: IfxPort_PinMap.c:62
IfxPort_P00_0
IfxPort_Pin IfxPort_P00_0
Definition: IfxPort_PinMap.c:28
IfxPort_P40_8
IfxPort_Pin IfxPort_P40_8
Definition: IfxPort_PinMap.c:144
IfxPort_P00_12
IfxPort_Pin IfxPort_P00_12
Definition: IfxPort_PinMap.c:32
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxPort_P14_3
IfxPort_Pin IfxPort_P14_3
Definition: IfxPort_PinMap.c:74
IfxPort_P23_0
IfxPort_Pin IfxPort_P23_0
Definition: IfxPort_PinMap.c:114
IfxPort_P21_5
IfxPort_Pin IfxPort_P21_5
Definition: IfxPort_PinMap.c:107
IfxPort_P32_3
IfxPort_Pin IfxPort_P32_3
Definition: IfxPort_PinMap.c:122
IfxPort_P20_12
IfxPort_Pin IfxPort_P20_12
Definition: IfxPort_PinMap.c:94
IfxPort_P14_2
IfxPort_Pin IfxPort_P14_2
Definition: IfxPort_PinMap.c:73
IfxPort_P33_10
IfxPort_Pin IfxPort_P33_10
Definition: IfxPort_PinMap.c:126
IfxPort_P33_9
IfxPort_Pin IfxPort_P33_9
Definition: IfxPort_PinMap.c:137
IfxPort_PinMap.h
PORT I/O map.
IfxPort_P02_7
IfxPort_Pin IfxPort_P02_7
Definition: IfxPort_PinMap.c:48
IfxPort_P11_9
IfxPort_Pin IfxPort_P11_9
Definition: IfxPort_PinMap.c:65
IfxPort_P40_0
IfxPort_Pin IfxPort_P40_0
Definition: IfxPort_PinMap.c:138
IfxPort_P11_3
IfxPort_Pin IfxPort_P11_3
Definition: IfxPort_PinMap.c:63
IfxPort_P00_10
IfxPort_Pin IfxPort_P00_10
Definition: IfxPort_PinMap.c:30
IfxPort_P15_1
IfxPort_Pin IfxPort_P15_1
Definition: IfxPort_PinMap.c:82
IfxPort_P10_3
IfxPort_Pin IfxPort_P10_3
Definition: IfxPort_PinMap.c:53
IfxPort_P33_13
IfxPort_Pin IfxPort_P33_13
Definition: IfxPort_PinMap.c:129
IfxPort_P40_2
IfxPort_Pin IfxPort_P40_2
Definition: IfxPort_PinMap.c:140
IfxPort_P14_9
IfxPort_Pin IfxPort_P14_9
Definition: IfxPort_PinMap.c:80
IfxPort_P10_2
IfxPort_Pin IfxPort_P10_2
Definition: IfxPort_PinMap.c:52
IfxPort_P00_5
IfxPort_Pin IfxPort_P00_5
Definition: IfxPort_PinMap.c:36
IfxPort_P02_5
IfxPort_Pin IfxPort_P02_5
Definition: IfxPort_PinMap.c:46
IfxPort_P21_4
IfxPort_Pin IfxPort_P21_4
Definition: IfxPort_PinMap.c:106
IFXPORT_PINMAP_PIN_NUM_ITEMS
#define IFXPORT_PINMAP_PIN_NUM_ITEMS
Definition: IfxPort_PinMap.h:158
IfxPort_P00_4
IfxPort_Pin IfxPort_P00_4
Definition: IfxPort_PinMap.c:35
IfxPort_P10_7
IfxPort_Pin IfxPort_P10_7
Definition: IfxPort_PinMap.c:57
IfxPort_P32_0
IfxPort_Pin IfxPort_P32_0
Definition: IfxPort_PinMap.c:120
IfxPort_P11_11
IfxPort_Pin IfxPort_P11_11
Definition: IfxPort_PinMap.c:60
IfxPort_P02_4
IfxPort_Pin IfxPort_P02_4
Definition: IfxPort_PinMap.c:45
IfxPort_P15_0
IfxPort_Pin IfxPort_P15_0
Definition: IfxPort_PinMap.c:81
IfxPort_P22_1
IfxPort_Pin IfxPort_P22_1
Definition: IfxPort_PinMap.c:111
IfxPort_P32_4
IfxPort_Pin IfxPort_P32_4
Definition: IfxPort_PinMap.c:123
IfxPort_P33_8
IfxPort_Pin IfxPort_P33_8
Definition: IfxPort_PinMap.c:136
IfxPort_P10_8
IfxPort_Pin IfxPort_P10_8
Definition: IfxPort_PinMap.c:58
IfxPort_P15_4
IfxPort_Pin IfxPort_P15_4
Definition: IfxPort_PinMap.c:85
IfxPort_P14_8
IfxPort_Pin IfxPort_P14_8
Definition: IfxPort_PinMap.c:79
IfxPort_P10_1
IfxPort_Pin IfxPort_P10_1
Definition: IfxPort_PinMap.c:51
IfxPort_P33_2
IfxPort_Pin IfxPort_P33_2
Definition: IfxPort_PinMap.c:130
IfxPort_P20_8
IfxPort_Pin IfxPort_P20_8
Definition: IfxPort_PinMap.c:100
IfxPort_P20_3
IfxPort_Pin IfxPort_P20_3
Definition: IfxPort_PinMap.c:97
IfxPort_Pin_pinTable
const IfxPort_Pin * IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
Definition: IfxPort_PinMap.c:148
IfxPort_P14_1
IfxPort_Pin IfxPort_P14_1
Definition: IfxPort_PinMap.c:71
IfxPort_P15_6
IfxPort_Pin IfxPort_P15_6
Definition: IfxPort_PinMap.c:87
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxPort_P20_7
IfxPort_Pin IfxPort_P20_7
Definition: IfxPort_PinMap.c:99
IfxPort_P11_10
IfxPort_Pin IfxPort_P11_10
Definition: IfxPort_PinMap.c:59
IfxPort_P02_6
IfxPort_Pin IfxPort_P02_6
Definition: IfxPort_PinMap.c:47
IfxPort_P21_2
IfxPort_Pin IfxPort_P21_2
Definition: IfxPort_PinMap.c:104
IfxPort_P40_6
IfxPort_Pin IfxPort_P40_6
Definition: IfxPort_PinMap.c:142
IfxPort_P13_0
IfxPort_Pin IfxPort_P13_0
Definition: IfxPort_PinMap.c:66
IfxPort_P15_7
IfxPort_Pin IfxPort_P15_7
Definition: IfxPort_PinMap.c:88
IfxPort_P40_1
IfxPort_Pin IfxPort_P40_1
Definition: IfxPort_PinMap.c:139
IfxPort_P20_11
IfxPort_Pin IfxPort_P20_11
Definition: IfxPort_PinMap.c:93
IfxPort_P02_8
IfxPort_Pin IfxPort_P02_8
Definition: IfxPort_PinMap.c:49
IfxPort_P40_7
IfxPort_Pin IfxPort_P40_7
Definition: IfxPort_PinMap.c:143
IfxPort_P40_3
IfxPort_Pin IfxPort_P40_3
Definition: IfxPort_PinMap.c:141
IfxPort_P15_8
IfxPort_Pin IfxPort_P15_8
Definition: IfxPort_PinMap.c:89
IfxPort_P00_1
IfxPort_Pin IfxPort_P00_1
Definition: IfxPort_PinMap.c:29
IfxPort_P33_4
IfxPort_Pin IfxPort_P33_4
Definition: IfxPort_PinMap.c:132
IfxPort_P02_1
IfxPort_Pin IfxPort_P02_1
Definition: IfxPort_PinMap.c:42
IfxPort_P14_0
IfxPort_Pin IfxPort_P14_0
Definition: IfxPort_PinMap.c:70
IfxPort_P33_11
IfxPort_Pin IfxPort_P33_11
Definition: IfxPort_PinMap.c:127
IfxPort_P22_3
IfxPort_Pin IfxPort_P22_3
Definition: IfxPort_PinMap.c:113
IfxPort_P21_1
IfxPort_Pin IfxPort_P21_1
Definition: IfxPort_PinMap.c:103
IfxPort_P20_6
IfxPort_Pin IfxPort_P20_6
Definition: IfxPort_PinMap.c:98
IfxPort_P21_7
IfxPort_Pin IfxPort_P21_7
Definition: IfxPort_PinMap.c:109
IfxPort_P20_0
IfxPort_Pin IfxPort_P20_0
Definition: IfxPort_PinMap.c:90
IfxPort_P13_2
IfxPort_Pin IfxPort_P13_2
Definition: IfxPort_PinMap.c:68
IfxPort_P20_10
IfxPort_Pin IfxPort_P20_10
Definition: IfxPort_PinMap.c:92
IfxPort_P33_0
IfxPort_Pin IfxPort_P33_0
Definition: IfxPort_PinMap.c:124
IfxPort_P22_0
IfxPort_Pin IfxPort_P22_0
Definition: IfxPort_PinMap.c:110
IfxPort_P11_12
IfxPort_Pin IfxPort_P11_12
Definition: IfxPort_PinMap.c:61
IfxPort_P15_2
IfxPort_Pin IfxPort_P15_2
Definition: IfxPort_PinMap.c:83
IFXPORT_PINMAP_NUM_MODULES
#define IFXPORT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPort_PinMap.h:157
IfxPort_P10_4
IfxPort_Pin IfxPort_P10_4
Definition: IfxPort_PinMap.c:54
IfxPort_P20_9
IfxPort_Pin IfxPort_P20_9
Definition: IfxPort_PinMap.c:101
IfxPort_P00_11
IfxPort_Pin IfxPort_P00_11
Definition: IfxPort_PinMap.c:31
IfxPort_P33_7
IfxPort_Pin IfxPort_P33_7
Definition: IfxPort_PinMap.c:135
IfxPort_P14_6
IfxPort_Pin IfxPort_P14_6
Definition: IfxPort_PinMap.c:77


iLLD_TC26B: IfxPort_PinMap.h Source File

  • _PinMap
IfxPort_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_PinMap.h
3 * \brief PORT I/O map
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Port_pinmap PORT Pin Mapping
25 * \ingroup IfxLld_Port
26 */
27
28 #ifndef IFXPORT_PINMAP_H
29 #define IFXPORT_PINMAP_H
30
31 #include <Port/Std/IfxPort.h>
32
33 /** \addtogroup IfxLld_Port_pinmap
34 * \{ */
35
36
37 IFX_EXTERN IfxPort_Pin IfxPort_P00_0; /**< \brief IfxPort_P00_0 */
38 IFX_EXTERN IfxPort_Pin IfxPort_P00_1; /**< \brief IfxPort_P00_1 */
39 IFX_EXTERN IfxPort_Pin IfxPort_P00_10; /**< \brief IfxPort_P00_10 */
40 IFX_EXTERN IfxPort_Pin IfxPort_P00_11; /**< \brief IfxPort_P00_11 */
41 IFX_EXTERN IfxPort_Pin IfxPort_P00_12; /**< \brief IfxPort_P00_12 */
42 IFX_EXTERN IfxPort_Pin IfxPort_P00_2; /**< \brief IfxPort_P00_2 */
43 IFX_EXTERN IfxPort_Pin IfxPort_P00_3; /**< \brief IfxPort_P00_3 */
44 IFX_EXTERN IfxPort_Pin IfxPort_P00_4; /**< \brief IfxPort_P00_4 */
45 IFX_EXTERN IfxPort_Pin IfxPort_P00_5; /**< \brief IfxPort_P00_5 */
46 IFX_EXTERN IfxPort_Pin IfxPort_P00_6; /**< \brief IfxPort_P00_6 */
47 IFX_EXTERN IfxPort_Pin IfxPort_P00_7; /**< \brief IfxPort_P00_7 */
48 IFX_EXTERN IfxPort_Pin IfxPort_P00_8; /**< \brief IfxPort_P00_8 */
49 IFX_EXTERN IfxPort_Pin IfxPort_P00_9; /**< \brief IfxPort_P00_9 */
50 IFX_EXTERN IfxPort_Pin IfxPort_P02_0; /**< \brief IfxPort_P02_0 */
51 IFX_EXTERN IfxPort_Pin IfxPort_P02_1; /**< \brief IfxPort_P02_1 */
52 IFX_EXTERN IfxPort_Pin IfxPort_P02_2; /**< \brief IfxPort_P02_2 */
53 IFX_EXTERN IfxPort_Pin IfxPort_P02_3; /**< \brief IfxPort_P02_3 */
54 IFX_EXTERN IfxPort_Pin IfxPort_P02_4; /**< \brief IfxPort_P02_4 */
55 IFX_EXTERN IfxPort_Pin IfxPort_P02_5; /**< \brief IfxPort_P02_5 */
56 IFX_EXTERN IfxPort_Pin IfxPort_P02_6; /**< \brief IfxPort_P02_6 */
57 IFX_EXTERN IfxPort_Pin IfxPort_P02_7; /**< \brief IfxPort_P02_7 */
58 IFX_EXTERN IfxPort_Pin IfxPort_P02_8; /**< \brief IfxPort_P02_8 */
59 IFX_EXTERN IfxPort_Pin IfxPort_P10_0; /**< \brief IfxPort_P10_0 */
60 IFX_EXTERN IfxPort_Pin IfxPort_P10_1; /**< \brief IfxPort_P10_1 */
61 IFX_EXTERN IfxPort_Pin IfxPort_P10_2; /**< \brief IfxPort_P10_2 */
62 IFX_EXTERN IfxPort_Pin IfxPort_P10_3; /**< \brief IfxPort_P10_3 */
63 IFX_EXTERN IfxPort_Pin IfxPort_P10_4; /**< \brief IfxPort_P10_4 */
64 IFX_EXTERN IfxPort_Pin IfxPort_P10_5; /**< \brief IfxPort_P10_5 */
65 IFX_EXTERN IfxPort_Pin IfxPort_P10_6; /**< \brief IfxPort_P10_6 */
66 IFX_EXTERN IfxPort_Pin IfxPort_P10_7; /**< \brief IfxPort_P10_7 */
67 IFX_EXTERN IfxPort_Pin IfxPort_P10_8; /**< \brief IfxPort_P10_8 */
68 IFX_EXTERN IfxPort_Pin IfxPort_P11_10; /**< \brief IfxPort_P11_10 */
69 IFX_EXTERN IfxPort_Pin IfxPort_P11_11; /**< \brief IfxPort_P11_11 */
70 IFX_EXTERN IfxPort_Pin IfxPort_P11_12; /**< \brief IfxPort_P11_12 */
71 IFX_EXTERN IfxPort_Pin IfxPort_P11_2; /**< \brief IfxPort_P11_2 */
72 IFX_EXTERN IfxPort_Pin IfxPort_P11_3; /**< \brief IfxPort_P11_3 */
73 IFX_EXTERN IfxPort_Pin IfxPort_P11_6; /**< \brief IfxPort_P11_6 */
74 IFX_EXTERN IfxPort_Pin IfxPort_P11_9; /**< \brief IfxPort_P11_9 */
75 IFX_EXTERN IfxPort_Pin IfxPort_P13_0; /**< \brief IfxPort_P13_0 */
76 IFX_EXTERN IfxPort_Pin IfxPort_P13_1; /**< \brief IfxPort_P13_1 */
77 IFX_EXTERN IfxPort_Pin IfxPort_P13_2; /**< \brief IfxPort_P13_2 */
78 IFX_EXTERN IfxPort_Pin IfxPort_P13_3; /**< \brief IfxPort_P13_3 */
79 IFX_EXTERN IfxPort_Pin IfxPort_P14_0; /**< \brief IfxPort_P14_0 */
80 IFX_EXTERN IfxPort_Pin IfxPort_P14_1; /**< \brief IfxPort_P14_1 */
81 IFX_EXTERN IfxPort_Pin IfxPort_P14_10; /**< \brief IfxPort_P14_10 */
82 IFX_EXTERN IfxPort_Pin IfxPort_P14_2; /**< \brief IfxPort_P14_2 */
83 IFX_EXTERN IfxPort_Pin IfxPort_P14_3; /**< \brief IfxPort_P14_3 */
84 IFX_EXTERN IfxPort_Pin IfxPort_P14_4; /**< \brief IfxPort_P14_4 */
85 IFX_EXTERN IfxPort_Pin IfxPort_P14_5; /**< \brief IfxPort_P14_5 */
86 IFX_EXTERN IfxPort_Pin IfxPort_P14_6; /**< \brief IfxPort_P14_6 */
87 IFX_EXTERN IfxPort_Pin IfxPort_P14_7; /**< \brief IfxPort_P14_7 */
88 IFX_EXTERN IfxPort_Pin IfxPort_P14_8; /**< \brief IfxPort_P14_8 */
89 IFX_EXTERN IfxPort_Pin IfxPort_P14_9; /**< \brief IfxPort_P14_9 */
90 IFX_EXTERN IfxPort_Pin IfxPort_P15_0; /**< \brief IfxPort_P15_0 */
91 IFX_EXTERN IfxPort_Pin IfxPort_P15_1; /**< \brief IfxPort_P15_1 */
92 IFX_EXTERN IfxPort_Pin IfxPort_P15_2; /**< \brief IfxPort_P15_2 */
93 IFX_EXTERN IfxPort_Pin IfxPort_P15_3; /**< \brief IfxPort_P15_3 */
94 IFX_EXTERN IfxPort_Pin IfxPort_P15_4; /**< \brief IfxPort_P15_4 */
95 IFX_EXTERN IfxPort_Pin IfxPort_P15_5; /**< \brief IfxPort_P15_5 */
96 IFX_EXTERN IfxPort_Pin IfxPort_P15_6; /**< \brief IfxPort_P15_6 */
97 IFX_EXTERN IfxPort_Pin IfxPort_P15_7; /**< \brief IfxPort_P15_7 */
98 IFX_EXTERN IfxPort_Pin IfxPort_P15_8; /**< \brief IfxPort_P15_8 */
99 IFX_EXTERN IfxPort_Pin IfxPort_P20_0; /**< \brief IfxPort_P20_0 */
100 IFX_EXTERN IfxPort_Pin IfxPort_P20_1; /**< \brief IfxPort_P20_1 */
101 IFX_EXTERN IfxPort_Pin IfxPort_P20_10; /**< \brief IfxPort_P20_10 */
102 IFX_EXTERN IfxPort_Pin IfxPort_P20_11; /**< \brief IfxPort_P20_11 */
103 IFX_EXTERN IfxPort_Pin IfxPort_P20_12; /**< \brief IfxPort_P20_12 */
104 IFX_EXTERN IfxPort_Pin IfxPort_P20_13; /**< \brief IfxPort_P20_13 */
105 IFX_EXTERN IfxPort_Pin IfxPort_P20_14; /**< \brief IfxPort_P20_14 */
106 IFX_EXTERN IfxPort_Pin IfxPort_P20_3; /**< \brief IfxPort_P20_3 */
107 IFX_EXTERN IfxPort_Pin IfxPort_P20_6; /**< \brief IfxPort_P20_6 */
108 IFX_EXTERN IfxPort_Pin IfxPort_P20_7; /**< \brief IfxPort_P20_7 */
109 IFX_EXTERN IfxPort_Pin IfxPort_P20_8; /**< \brief IfxPort_P20_8 */
110 IFX_EXTERN IfxPort_Pin IfxPort_P20_9; /**< \brief IfxPort_P20_9 */
111 IFX_EXTERN IfxPort_Pin IfxPort_P21_0; /**< \brief IfxPort_P21_0 */
112 IFX_EXTERN IfxPort_Pin IfxPort_P21_1; /**< \brief IfxPort_P21_1 */
113 IFX_EXTERN IfxPort_Pin IfxPort_P21_2; /**< \brief IfxPort_P21_2 */
114 IFX_EXTERN IfxPort_Pin IfxPort_P21_3; /**< \brief IfxPort_P21_3 */
115 IFX_EXTERN IfxPort_Pin IfxPort_P21_4; /**< \brief IfxPort_P21_4 */
116 IFX_EXTERN IfxPort_Pin IfxPort_P21_5; /**< \brief IfxPort_P21_5 */
117 IFX_EXTERN IfxPort_Pin IfxPort_P21_6; /**< \brief IfxPort_P21_6 */
118 IFX_EXTERN IfxPort_Pin IfxPort_P21_7; /**< \brief IfxPort_P21_7 */
119 IFX_EXTERN IfxPort_Pin IfxPort_P22_0; /**< \brief IfxPort_P22_0 */
120 IFX_EXTERN IfxPort_Pin IfxPort_P22_1; /**< \brief IfxPort_P22_1 */
121 IFX_EXTERN IfxPort_Pin IfxPort_P22_2; /**< \brief IfxPort_P22_2 */
122 IFX_EXTERN IfxPort_Pin IfxPort_P22_3; /**< \brief IfxPort_P22_3 */
123 IFX_EXTERN IfxPort_Pin IfxPort_P23_0; /**< \brief IfxPort_P23_0 */
124 IFX_EXTERN IfxPort_Pin IfxPort_P23_1; /**< \brief IfxPort_P23_1 */
125 IFX_EXTERN IfxPort_Pin IfxPort_P23_2; /**< \brief IfxPort_P23_2 */
126 IFX_EXTERN IfxPort_Pin IfxPort_P23_3; /**< \brief IfxPort_P23_3 */
127 IFX_EXTERN IfxPort_Pin IfxPort_P23_4; /**< \brief IfxPort_P23_4 */
128 IFX_EXTERN IfxPort_Pin IfxPort_P23_5; /**< \brief IfxPort_P23_5 */
129 IFX_EXTERN IfxPort_Pin IfxPort_P32_0; /**< \brief IfxPort_P32_0 */
130 IFX_EXTERN IfxPort_Pin IfxPort_P32_2; /**< \brief IfxPort_P32_2 */
131 IFX_EXTERN IfxPort_Pin IfxPort_P32_3; /**< \brief IfxPort_P32_3 */
132 IFX_EXTERN IfxPort_Pin IfxPort_P32_4; /**< \brief IfxPort_P32_4 */
133 IFX_EXTERN IfxPort_Pin IfxPort_P33_0; /**< \brief IfxPort_P33_0 */
134 IFX_EXTERN IfxPort_Pin IfxPort_P33_1; /**< \brief IfxPort_P33_1 */
135 IFX_EXTERN IfxPort_Pin IfxPort_P33_10; /**< \brief IfxPort_P33_10 */
136 IFX_EXTERN IfxPort_Pin IfxPort_P33_11; /**< \brief IfxPort_P33_11 */
137 IFX_EXTERN IfxPort_Pin IfxPort_P33_12; /**< \brief IfxPort_P33_12 */
138 IFX_EXTERN IfxPort_Pin IfxPort_P33_13; /**< \brief IfxPort_P33_13 */
139 IFX_EXTERN IfxPort_Pin IfxPort_P33_2; /**< \brief IfxPort_P33_2 */
140 IFX_EXTERN IfxPort_Pin IfxPort_P33_3; /**< \brief IfxPort_P33_3 */
141 IFX_EXTERN IfxPort_Pin IfxPort_P33_4; /**< \brief IfxPort_P33_4 */
142 IFX_EXTERN IfxPort_Pin IfxPort_P33_5; /**< \brief IfxPort_P33_5 */
143 IFX_EXTERN IfxPort_Pin IfxPort_P33_6; /**< \brief IfxPort_P33_6 */
144 IFX_EXTERN IfxPort_Pin IfxPort_P33_7; /**< \brief IfxPort_P33_7 */
145 IFX_EXTERN IfxPort_Pin IfxPort_P33_8; /**< \brief IfxPort_P33_8 */
146 IFX_EXTERN IfxPort_Pin IfxPort_P33_9; /**< \brief IfxPort_P33_9 */
147 IFX_EXTERN IfxPort_Pin IfxPort_P40_0; /**< \brief IfxPort_P40_0 */
148 IFX_EXTERN IfxPort_Pin IfxPort_P40_1; /**< \brief IfxPort_P40_1 */
149 IFX_EXTERN IfxPort_Pin IfxPort_P40_2; /**< \brief IfxPort_P40_2 */
150 IFX_EXTERN IfxPort_Pin IfxPort_P40_3; /**< \brief IfxPort_P40_3 */
151 IFX_EXTERN IfxPort_Pin IfxPort_P40_6; /**< \brief IfxPort_P40_6 */
152 IFX_EXTERN IfxPort_Pin IfxPort_P40_7; /**< \brief IfxPort_P40_7 */
153 IFX_EXTERN IfxPort_Pin IfxPort_P40_8; /**< \brief IfxPort_P40_8 */
154 IFX_EXTERN IfxPort_Pin IfxPort_P40_9; /**< \brief IfxPort_P40_9 */
155
156 /** \brief Table dimensions */
157 #define IFXPORT_PINMAP_NUM_MODULES 41
158 #define IFXPORT_PINMAP_PIN_NUM_ITEMS 15
159
160
161 /** \brief IfxPort_Pin table */
162 IFX_EXTERN const IfxPort_Pin *IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS];
163
164 /** \} */
165
166 #endif /* IFXPORT_PINMAP_H */
IfxPort_P33_6
IFX_EXTERN IfxPort_Pin IfxPort_P33_6
IfxPort_P33_6.
Definition: IfxPort_PinMap.h:143
IfxPort_P00_8
IFX_EXTERN IfxPort_Pin IfxPort_P00_8
IfxPort_P00_8.
Definition: IfxPort_PinMap.h:48
IfxPort_P14_1
IFX_EXTERN IfxPort_Pin IfxPort_P14_1
IfxPort_P14_1.
Definition: IfxPort_PinMap.h:80
IfxPort_P10_1
IFX_EXTERN IfxPort_Pin IfxPort_P10_1
IfxPort_P10_1.
Definition: IfxPort_PinMap.h:60
IfxPort_P14_0
IFX_EXTERN IfxPort_Pin IfxPort_P14_0
IfxPort_P14_0.
Definition: IfxPort_PinMap.h:79
IfxPort_P14_4
IFX_EXTERN IfxPort_Pin IfxPort_P14_4
IfxPort_P14_4.
Definition: IfxPort_PinMap.h:84
IfxPort_P10_4
IFX_EXTERN IfxPort_Pin IfxPort_P10_4
IfxPort_P10_4.
Definition: IfxPort_PinMap.h:63
IfxPort_P22_1
IFX_EXTERN IfxPort_Pin IfxPort_P22_1
IfxPort_P22_1.
Definition: IfxPort_PinMap.h:120
IfxPort_P00_5
IFX_EXTERN IfxPort_Pin IfxPort_P00_5
IfxPort_P00_5.
Definition: IfxPort_PinMap.h:45
IfxPort_P10_6
IFX_EXTERN IfxPort_Pin IfxPort_P10_6
IfxPort_P10_6.
Definition: IfxPort_PinMap.h:65
IfxPort_P02_4
IFX_EXTERN IfxPort_Pin IfxPort_P02_4
IfxPort_P02_4.
Definition: IfxPort_PinMap.h:54
IfxPort_P40_6
IFX_EXTERN IfxPort_Pin IfxPort_P40_6
IfxPort_P40_6.
Definition: IfxPort_PinMap.h:151
IfxPort_P33_5
IFX_EXTERN IfxPort_Pin IfxPort_P33_5
IfxPort_P33_5.
Definition: IfxPort_PinMap.h:142
IfxPort_P15_2
IFX_EXTERN IfxPort_Pin IfxPort_P15_2
IfxPort_P15_2.
Definition: IfxPort_PinMap.h:92
IfxPort_P20_12
IFX_EXTERN IfxPort_Pin IfxPort_P20_12
IfxPort_P20_12.
Definition: IfxPort_PinMap.h:103
IfxPort_P33_11
IFX_EXTERN IfxPort_Pin IfxPort_P33_11
IfxPort_P33_11.
Definition: IfxPort_PinMap.h:136
IfxPort_P11_3
IFX_EXTERN IfxPort_Pin IfxPort_P11_3
IfxPort_P11_3.
Definition: IfxPort_PinMap.h:72
IfxPort_P14_2
IFX_EXTERN IfxPort_Pin IfxPort_P14_2
IfxPort_P14_2.
Definition: IfxPort_PinMap.h:82
IfxPort_P14_3
IFX_EXTERN IfxPort_Pin IfxPort_P14_3
IfxPort_P14_3.
Definition: IfxPort_PinMap.h:83
IfxPort_P13_0
IFX_EXTERN IfxPort_Pin IfxPort_P13_0
IfxPort_P13_0.
Definition: IfxPort_PinMap.h:75
IfxPort_P02_3
IFX_EXTERN IfxPort_Pin IfxPort_P02_3
IfxPort_P02_3.
Definition: IfxPort_PinMap.h:53
IfxPort_P20_13
IFX_EXTERN IfxPort_Pin IfxPort_P20_13
IfxPort_P20_13.
Definition: IfxPort_PinMap.h:104
IfxPort_P11_9
IFX_EXTERN IfxPort_Pin IfxPort_P11_9
IfxPort_P11_9.
Definition: IfxPort_PinMap.h:74
IfxPort_P21_2
IFX_EXTERN IfxPort_Pin IfxPort_P21_2
IfxPort_P21_2.
Definition: IfxPort_PinMap.h:113
IfxPort_P11_11
IFX_EXTERN IfxPort_Pin IfxPort_P11_11
IfxPort_P11_11.
Definition: IfxPort_PinMap.h:69
IfxPort_P02_6
IFX_EXTERN IfxPort_Pin IfxPort_P02_6
IfxPort_P02_6.
Definition: IfxPort_PinMap.h:56
IfxPort_P00_2
IFX_EXTERN IfxPort_Pin IfxPort_P00_2
IfxPort_P00_2.
Definition: IfxPort_PinMap.h:42
IfxPort_P33_13
IFX_EXTERN IfxPort_Pin IfxPort_P33_13
IfxPort_P33_13.
Definition: IfxPort_PinMap.h:138
IfxPort_P21_3
IFX_EXTERN IfxPort_Pin IfxPort_P21_3
IfxPort_P21_3.
Definition: IfxPort_PinMap.h:114
IfxPort_P00_7
IFX_EXTERN IfxPort_Pin IfxPort_P00_7
IfxPort_P00_7.
Definition: IfxPort_PinMap.h:47
IfxPort_P20_3
IFX_EXTERN IfxPort_Pin IfxPort_P20_3
IfxPort_P20_3.
Definition: IfxPort_PinMap.h:106
IfxPort_Pin_pinTable
IFX_EXTERN const IfxPort_Pin * IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS]
IfxPort_Pin table.
Definition: IfxPort_PinMap.h:162
IfxPort_P02_7
IFX_EXTERN IfxPort_Pin IfxPort_P02_7
IfxPort_P02_7.
Definition: IfxPort_PinMap.h:57
IfxPort_P32_3
IFX_EXTERN IfxPort_Pin IfxPort_P32_3
IfxPort_P32_3.
Definition: IfxPort_PinMap.h:131
IfxPort_P11_10
IFX_EXTERN IfxPort_Pin IfxPort_P11_10
IfxPort_P11_10.
Definition: IfxPort_PinMap.h:68
IfxPort_P33_3
IFX_EXTERN IfxPort_Pin IfxPort_P33_3
IfxPort_P33_3.
Definition: IfxPort_PinMap.h:140
IfxPort_P20_6
IFX_EXTERN IfxPort_Pin IfxPort_P20_6
IfxPort_P20_6.
Definition: IfxPort_PinMap.h:107
IfxPort_P23_1
IFX_EXTERN IfxPort_Pin IfxPort_P23_1
IfxPort_P23_1.
Definition: IfxPort_PinMap.h:124
IfxPort_P22_0
IFX_EXTERN IfxPort_Pin IfxPort_P22_0
IfxPort_P22_0.
Definition: IfxPort_PinMap.h:119
IfxPort_P23_4
IFX_EXTERN IfxPort_Pin IfxPort_P23_4
IfxPort_P23_4.
Definition: IfxPort_PinMap.h:127
IfxPort_P22_3
IFX_EXTERN IfxPort_Pin IfxPort_P22_3
IfxPort_P22_3.
Definition: IfxPort_PinMap.h:122
IfxPort_P11_12
IFX_EXTERN IfxPort_Pin IfxPort_P11_12
IfxPort_P11_12.
Definition: IfxPort_PinMap.h:70
IfxPort_P33_1
IFX_EXTERN IfxPort_Pin IfxPort_P33_1
IfxPort_P33_1.
Definition: IfxPort_PinMap.h:134
IfxPort_P33_2
IFX_EXTERN IfxPort_Pin IfxPort_P33_2
IfxPort_P33_2.
Definition: IfxPort_PinMap.h:139
IfxPort_P15_5
IFX_EXTERN IfxPort_Pin IfxPort_P15_5
IfxPort_P15_5.
Definition: IfxPort_PinMap.h:95
IfxPort_P15_8
IFX_EXTERN IfxPort_Pin IfxPort_P15_8
IfxPort_P15_8.
Definition: IfxPort_PinMap.h:98
IfxPort_P33_7
IFX_EXTERN IfxPort_Pin IfxPort_P33_7
IfxPort_P33_7.
Definition: IfxPort_PinMap.h:144
IfxPort_P20_8
IFX_EXTERN IfxPort_Pin IfxPort_P20_8
IfxPort_P20_8.
Definition: IfxPort_PinMap.h:109
IfxPort_P23_0
IFX_EXTERN IfxPort_Pin IfxPort_P23_0
IfxPort_P23_0.
Definition: IfxPort_PinMap.h:123
IfxPort_P20_7
IFX_EXTERN IfxPort_Pin IfxPort_P20_7
IfxPort_P20_7.
Definition: IfxPort_PinMap.h:108
IfxPort_P22_2
IFX_EXTERN IfxPort_Pin IfxPort_P22_2
IfxPort_P22_2.
Definition: IfxPort_PinMap.h:121
IfxPort_P33_8
IFX_EXTERN IfxPort_Pin IfxPort_P33_8
IfxPort_P33_8.
Definition: IfxPort_PinMap.h:145
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPort_P33_12
IFX_EXTERN IfxPort_Pin IfxPort_P33_12
IfxPort_P33_12.
Definition: IfxPort_PinMap.h:137
IfxPort_P02_5
IFX_EXTERN IfxPort_Pin IfxPort_P02_5
IfxPort_P02_5.
Definition: IfxPort_PinMap.h:55
IfxPort_P00_0
IFX_EXTERN IfxPort_Pin IfxPort_P00_0
IfxPort_P00_0.
Definition: IfxPort_PinMap.h:37
IfxPort_P14_8
IFX_EXTERN IfxPort_Pin IfxPort_P14_8
IfxPort_P14_8.
Definition: IfxPort_PinMap.h:88
IfxPort_P11_2
IFX_EXTERN IfxPort_Pin IfxPort_P11_2
IfxPort_P11_2.
Definition: IfxPort_PinMap.h:71
IfxPort_P32_4
IFX_EXTERN IfxPort_Pin IfxPort_P32_4
IfxPort_P32_4.
Definition: IfxPort_PinMap.h:132
IfxPort_P11_6
IFX_EXTERN IfxPort_Pin IfxPort_P11_6
IfxPort_P11_6.
Definition: IfxPort_PinMap.h:73
IfxPort_P02_8
IFX_EXTERN IfxPort_Pin IfxPort_P02_8
IfxPort_P02_8.
Definition: IfxPort_PinMap.h:58
IfxPort_P00_11
IFX_EXTERN IfxPort_Pin IfxPort_P00_11
IfxPort_P00_11.
Definition: IfxPort_PinMap.h:40
IfxPort_P13_3
IFX_EXTERN IfxPort_Pin IfxPort_P13_3
IfxPort_P13_3.
Definition: IfxPort_PinMap.h:78
IfxPort_P23_5
IFX_EXTERN IfxPort_Pin IfxPort_P23_5
IfxPort_P23_5.
Definition: IfxPort_PinMap.h:128
IfxPort_P10_3
IFX_EXTERN IfxPort_Pin IfxPort_P10_3
IfxPort_P10_3.
Definition: IfxPort_PinMap.h:62
IFXPORT_PINMAP_PIN_NUM_ITEMS
#define IFXPORT_PINMAP_PIN_NUM_ITEMS
Definition: IfxPort_PinMap.h:158
IfxPort_P40_0
IFX_EXTERN IfxPort_Pin IfxPort_P40_0
IfxPort_P40_0.
Definition: IfxPort_PinMap.h:147
IfxPort_P00_10
IFX_EXTERN IfxPort_Pin IfxPort_P00_10
IfxPort_P00_10.
Definition: IfxPort_PinMap.h:39
IfxPort_P10_5
IFX_EXTERN IfxPort_Pin IfxPort_P10_5
IfxPort_P10_5.
Definition: IfxPort_PinMap.h:64
IfxPort_P10_7
IFX_EXTERN IfxPort_Pin IfxPort_P10_7
IfxPort_P10_7.
Definition: IfxPort_PinMap.h:66
IfxPort_P21_5
IFX_EXTERN IfxPort_Pin IfxPort_P21_5
IfxPort_P21_5.
Definition: IfxPort_PinMap.h:116
IfxPort_P15_1
IFX_EXTERN IfxPort_Pin IfxPort_P15_1
IfxPort_P15_1.
Definition: IfxPort_PinMap.h:91
IfxPort_P20_11
IFX_EXTERN IfxPort_Pin IfxPort_P20_11
IfxPort_P20_11.
Definition: IfxPort_PinMap.h:102
IfxPort_P33_10
IFX_EXTERN IfxPort_Pin IfxPort_P33_10
IfxPort_P33_10.
Definition: IfxPort_PinMap.h:135
IfxPort_P40_8
IFX_EXTERN IfxPort_Pin IfxPort_P40_8
IfxPort_P40_8.
Definition: IfxPort_PinMap.h:153
IfxPort_P21_6
IFX_EXTERN IfxPort_Pin IfxPort_P21_6
IfxPort_P21_6.
Definition: IfxPort_PinMap.h:117
IfxPort_P02_0
IFX_EXTERN IfxPort_Pin IfxPort_P02_0
IfxPort_P02_0.
Definition: IfxPort_PinMap.h:50
IfxPort_P14_7
IFX_EXTERN IfxPort_Pin IfxPort_P14_7
IfxPort_P14_7.
Definition: IfxPort_PinMap.h:87
IfxPort_P00_1
IFX_EXTERN IfxPort_Pin IfxPort_P00_1
IfxPort_P00_1.
Definition: IfxPort_PinMap.h:38
IfxPort_P20_10
IFX_EXTERN IfxPort_Pin IfxPort_P20_10
IfxPort_P20_10.
Definition: IfxPort_PinMap.h:101
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxPort_P23_3
IFX_EXTERN IfxPort_Pin IfxPort_P23_3
IfxPort_P23_3.
Definition: IfxPort_PinMap.h:126
IfxPort_P02_2
IFX_EXTERN IfxPort_Pin IfxPort_P02_2
IfxPort_P02_2.
Definition: IfxPort_PinMap.h:52
IfxPort_P20_14
IFX_EXTERN IfxPort_Pin IfxPort_P20_14
IfxPort_P20_14.
Definition: IfxPort_PinMap.h:105
IfxPort_P33_0
IFX_EXTERN IfxPort_Pin IfxPort_P33_0
IfxPort_P33_0.
Definition: IfxPort_PinMap.h:133
IfxPort_P02_1
IFX_EXTERN IfxPort_Pin IfxPort_P02_1
IfxPort_P02_1.
Definition: IfxPort_PinMap.h:51
IfxPort_P20_9
IFX_EXTERN IfxPort_Pin IfxPort_P20_9
IfxPort_P20_9.
Definition: IfxPort_PinMap.h:110
IfxPort_P13_1
IFX_EXTERN IfxPort_Pin IfxPort_P13_1
IfxPort_P13_1.
Definition: IfxPort_PinMap.h:76
IfxPort_P10_8
IFX_EXTERN IfxPort_Pin IfxPort_P10_8
IfxPort_P10_8.
Definition: IfxPort_PinMap.h:67
IfxPort_P33_9
IFX_EXTERN IfxPort_Pin IfxPort_P33_9
IfxPort_P33_9.
Definition: IfxPort_PinMap.h:146
IfxPort_P40_7
IFX_EXTERN IfxPort_Pin IfxPort_P40_7
IfxPort_P40_7.
Definition: IfxPort_PinMap.h:152
IfxPort_P14_6
IFX_EXTERN IfxPort_Pin IfxPort_P14_6
IfxPort_P14_6.
Definition: IfxPort_PinMap.h:86
IfxPort_P14_5
IFX_EXTERN IfxPort_Pin IfxPort_P14_5
IfxPort_P14_5.
Definition: IfxPort_PinMap.h:85
IfxPort_P15_0
IFX_EXTERN IfxPort_Pin IfxPort_P15_0
IfxPort_P15_0.
Definition: IfxPort_PinMap.h:90
IfxPort_P15_4
IFX_EXTERN IfxPort_Pin IfxPort_P15_4
IfxPort_P15_4.
Definition: IfxPort_PinMap.h:94
IfxPort_P40_2
IFX_EXTERN IfxPort_Pin IfxPort_P40_2
IfxPort_P40_2.
Definition: IfxPort_PinMap.h:149
IfxPort_P33_4
IFX_EXTERN IfxPort_Pin IfxPort_P33_4
IfxPort_P33_4.
Definition: IfxPort_PinMap.h:141
IfxPort_P13_2
IFX_EXTERN IfxPort_Pin IfxPort_P13_2
IfxPort_P13_2.
Definition: IfxPort_PinMap.h:77
IfxPort_P40_3
IFX_EXTERN IfxPort_Pin IfxPort_P40_3
IfxPort_P40_3.
Definition: IfxPort_PinMap.h:150
IfxPort_P00_9
IFX_EXTERN IfxPort_Pin IfxPort_P00_9
IfxPort_P00_9.
Definition: IfxPort_PinMap.h:49
IfxPort_P00_3
IFX_EXTERN IfxPort_Pin IfxPort_P00_3
IfxPort_P00_3.
Definition: IfxPort_PinMap.h:43
IfxPort_P14_9
IFX_EXTERN IfxPort_Pin IfxPort_P14_9
IfxPort_P14_9.
Definition: IfxPort_PinMap.h:89
IfxPort_P14_10
IFX_EXTERN IfxPort_Pin IfxPort_P14_10
IfxPort_P14_10.
Definition: IfxPort_PinMap.h:81
IfxPort_P00_4
IFX_EXTERN IfxPort_Pin IfxPort_P00_4
IfxPort_P00_4.
Definition: IfxPort_PinMap.h:44
IfxPort_P00_12
IFX_EXTERN IfxPort_Pin IfxPort_P00_12
IfxPort_P00_12.
Definition: IfxPort_PinMap.h:41
IfxPort_P20_1
IFX_EXTERN IfxPort_Pin IfxPort_P20_1
IfxPort_P20_1.
Definition: IfxPort_PinMap.h:100
IfxPort_P10_0
IFX_EXTERN IfxPort_Pin IfxPort_P10_0
IfxPort_P10_0.
Definition: IfxPort_PinMap.h:59
IfxPort_P21_1
IFX_EXTERN IfxPort_Pin IfxPort_P21_1
IfxPort_P21_1.
Definition: IfxPort_PinMap.h:112
IfxPort_P15_6
IFX_EXTERN IfxPort_Pin IfxPort_P15_6
IfxPort_P15_6.
Definition: IfxPort_PinMap.h:96
IfxPort_P40_9
IFX_EXTERN IfxPort_Pin IfxPort_P40_9
IfxPort_P40_9.
Definition: IfxPort_PinMap.h:154
IfxPort_P23_2
IFX_EXTERN IfxPort_Pin IfxPort_P23_2
IfxPort_P23_2.
Definition: IfxPort_PinMap.h:125
IfxPort_P21_7
IFX_EXTERN IfxPort_Pin IfxPort_P21_7
IfxPort_P21_7.
Definition: IfxPort_PinMap.h:118
IfxPort_P15_3
IFX_EXTERN IfxPort_Pin IfxPort_P15_3
IfxPort_P15_3.
Definition: IfxPort_PinMap.h:93
IfxPort_P40_1
IFX_EXTERN IfxPort_Pin IfxPort_P40_1
IfxPort_P40_1.
Definition: IfxPort_PinMap.h:148
IfxPort_P20_0
IFX_EXTERN IfxPort_Pin IfxPort_P20_0
IfxPort_P20_0.
Definition: IfxPort_PinMap.h:99
IfxPort_P00_6
IFX_EXTERN IfxPort_Pin IfxPort_P00_6
IfxPort_P00_6.
Definition: IfxPort_PinMap.h:46
IfxPort_P21_0
IFX_EXTERN IfxPort_Pin IfxPort_P21_0
IfxPort_P21_0.
Definition: IfxPort_PinMap.h:111
IfxPort_P21_4
IFX_EXTERN IfxPort_Pin IfxPort_P21_4
IfxPort_P21_4.
Definition: IfxPort_PinMap.h:115
IfxPort_P10_2
IFX_EXTERN IfxPort_Pin IfxPort_P10_2
IfxPort_P10_2.
Definition: IfxPort_PinMap.h:61
IfxPort_P32_2
IFX_EXTERN IfxPort_Pin IfxPort_P32_2
IfxPort_P32_2.
Definition: IfxPort_PinMap.h:130
IfxPort_P15_7
IFX_EXTERN IfxPort_Pin IfxPort_P15_7
IfxPort_P15_7.
Definition: IfxPort_PinMap.h:97
IfxPort_P32_0
IFX_EXTERN IfxPort_Pin IfxPort_P32_0
IfxPort_P32_0.
Definition: IfxPort_PinMap.h:129
IFXPORT_PINMAP_NUM_MODULES
#define IFXPORT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPort_PinMap.h:157
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxPort_cfg.c Source File

  • _Impl
IfxPort_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxPort_cfg.c
3 * \brief PORT on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxPort_cfg.h"
31
32 /******************************************************************************/
33 /*-----------------------Exported Variables/Constants-------------------------*/
34 /******************************************************************************/
35
36 IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES] = {
37 {&MODULE_P00, 0x0000FFFFUL}, // Port 00
38 {&MODULE_P02, 0x0000FFFFUL}, // Port 02
39 {&MODULE_P10, 0x0000FFFFUL}, // Port 10
40 {&MODULE_P11, 0x0000FFFFUL}, // Port 11
41 {&MODULE_P13, 0x0000FFFFUL}, // Port 13
42 {&MODULE_P14, 0x0000FFFFUL}, // Port 14
43 {&MODULE_P15, 0x0000FFFFUL}, // Port 15
44 {&MODULE_P20, 0x0000FFFFUL}, // Port 20
45 {&MODULE_P21, 0x0000FFFFUL}, // Port 21
46 {&MODULE_P22, 0x0000FFFFUL}, // Port 22
47 {&MODULE_P23, 0x0000FFFFUL}, // Port 23
48 {&MODULE_P32, 0x0000FFFFUL}, // Port 32
49 {&MODULE_P33, 0x0000FFFFUL}, // Port 33
50 //{&MODULE_P40, 0x0000FFFFUL} // Port 40
51 };
52
53 IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES] = {
54 {&MODULE_P00, IfxPort_Index_00}, // Port 00
55 {&MODULE_P02, IfxPort_Index_02}, // Port 02
56 {&MODULE_P10, IfxPort_Index_10}, // Port 10
57 {&MODULE_P11, IfxPort_Index_11}, // Port 11
58 {&MODULE_P13, IfxPort_Index_13}, // Port 13
59 {&MODULE_P14, IfxPort_Index_14}, // Port 14
60 {&MODULE_P15, IfxPort_Index_15}, // Port 15
61 {&MODULE_P20, IfxPort_Index_20}, // Port 20
62 {&MODULE_P21, IfxPort_Index_21}, // Port 21
63 {&MODULE_P22, IfxPort_Index_22}, // Port 22
64 {&MODULE_P23, IfxPort_Index_23}, // Port 23
65 {&MODULE_P32, IfxPort_Index_32}, // Port 32
66 {&MODULE_P33, IfxPort_Index_33} // Port 33
67 //{&MODULE_P40, 40} // Port 40
68 };
IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table
Definition: IfxPort_cfg.h:83
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:65
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:63
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:49
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:61
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:71
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:73
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:69
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:67
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:66
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:68
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:72
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:70
IfxPort_cfg.h
PORT on-chip implementation data.
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:62
IfxPort_cfg_esrMasks
IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:36
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:64
IfxPort_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.c:53


iLLD_TC26B: IfxPort_cfg.h Source File

  • _Impl
IfxPort_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPort_cfg.h
3 * \brief PORT on-chip implementation data
4 * \ingroup IfxLld_Port
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Port PORTS
26 * \ingroup IfxLld
27 * \defgroup IfxLld_Port_Impl Implementation
28 * \ingroup IfxLld_Port
29 * \defgroup IfxLld_Port_Std Standard Driver
30 * \ingroup IfxLld_Port
31 */
32
33 #ifndef IFXPORT_CFG_H
34 #define IFXPORT_CFG_H 1
35
36 /******************************************************************************/
37 /*----------------------------------Includes----------------------------------*/
38 /******************************************************************************/
39
40 #include "Cpu/Std/IfxCpu_Intrinsics.h"
41 #include "IfxPort_reg.h"
42
43 /******************************************************************************/
44 /*-----------------------------------Macros-----------------------------------*/
45 /******************************************************************************/
46
47 /** \brief Port count \ingroup IfxLld_port_cfg
48 */
49 #define IFXPORT_NUM_MODULES (13)
50
51 #define IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)
52
53 /******************************************************************************/
54 /*-------------------------------Enumerations---------------------------------*/
55 /******************************************************************************/
56
57 /** \brief List of the available Port resources
58 */
59 typedef enum
60 {
61 IfxPort_Index_00 = 0, /**< \brief PORT 00 */
62 IfxPort_Index_02 = 2, /**< \brief PORT 02 */
63 IfxPort_Index_10 = 10, /**< \brief PORT 10 */
64 IfxPort_Index_11 = 11, /**< \brief PORT 11 */
65 IfxPort_Index_13 = 13, /**< \brief PORT 13 */
66 IfxPort_Index_14 = 14, /**< \brief PORT 14 */
67 IfxPort_Index_15 = 15, /**< \brief PORT 15 */
68 IfxPort_Index_20 = 20, /**< \brief PORT 20 */
69 IfxPort_Index_21 = 21, /**< \brief PORT 21 */
70 IfxPort_Index_22 = 22, /**< \brief PORT 22 */
71 IfxPort_Index_23 = 23, /**< \brief PORT 23 */
72 IfxPort_Index_32 = 32, /**< \brief PORT 32 */
73 IfxPort_Index_33 = 33, /**< \brief PORT 33 */
74 IfxPort_Index_none = -1 /**< \brief none */
75 } IfxPort_Index;
76
77 /******************************************************************************/
78 /*-----------------------------Data Structures--------------------------------*/
79 /******************************************************************************/
80
81 /** \brief used by IfxPort_Esr_Masks table
82 */
83 typedef struct
84 {
85 Ifx_P *port;
86 uint16 masks;
87 } IfxPort_Esr_Masks;
88
89 /******************************************************************************/
90 /*-------------------Global Exported Variables/Constants----------------------*/
91 /******************************************************************************/
92
93 IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES];
94
95 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES];
96
97 #endif /* IFXPORT_CFG_H */
IfxPort_Esr_Masks
used by IfxPort_Esr_Masks table
Definition: IfxPort_cfg.h:83
IfxPort_Index
IfxPort_Index
List of the available Port resources.
Definition: IfxPort_cfg.h:59
IfxPort_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.h:95
IfxPort_Index_13
PORT 13.
Definition: IfxPort_cfg.h:65
IfxPort_Index_10
PORT 10.
Definition: IfxPort_cfg.h:63
IFXPORT_NUM_MODULES
#define IFXPORT_NUM_MODULES
Port count.
Definition: IfxPort_cfg.h:49
IfxPort_Esr_Masks::port
Ifx_P * port
Definition: IfxPort_cfg.h:85
IfxCpu_Intrinsics.h
IfxPort_Index_00
PORT 00.
Definition: IfxPort_cfg.h:61
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPort_Index_23
PORT 23.
Definition: IfxPort_cfg.h:71
IfxPort_Index_33
PORT 33.
Definition: IfxPort_cfg.h:73
IfxPort_Index_21
PORT 21.
Definition: IfxPort_cfg.h:69
IfxPort_Index_15
PORT 15.
Definition: IfxPort_cfg.h:67
IfxPort_Index_14
PORT 14.
Definition: IfxPort_cfg.h:66
IfxPort_Index_20
PORT 20.
Definition: IfxPort_cfg.h:68
IfxPort_Index_32
PORT 32.
Definition: IfxPort_cfg.h:72
IfxPort_Index_22
PORT 22.
Definition: IfxPort_cfg.h:70
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPort_Index_02
PORT 02.
Definition: IfxPort_cfg.h:62
IfxPort_cfg_esrMasks
IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES]
Definition: IfxPort_cfg.h:93
IfxPort_Index_none
none
Definition: IfxPort_cfg.h:74
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxPort_Index_11
PORT 11.
Definition: IfxPort_cfg.h:64
IfxPort_Esr_Masks::masks
uint16 masks
Definition: IfxPort_cfg.h:86


iLLD_TC26B: IfxPsi5.c Source File

  • Psi5
  • Std
IfxPsi5.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5.c
3 * \brief PSI5 basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxPsi5.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
36 {
37 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
38 IfxScuWdt_clearCpuEndinit(passwd);
39 psi5->CLC.B.DISR = 1;
40 IfxScuWdt_setCpuEndinit(passwd);
41 }
42
43
44 void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
45 {
46 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
47 IfxScuWdt_clearCpuEndinit(passwd);
48
49 psi5->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
50 psi5->KRST1.B.RST = 1;
51 IfxScuWdt_setCpuEndinit(passwd);
52
53 while (0 == psi5->KRST0.B.RSTSTAT) /* Wait until reset is executed */
54 {}
55
56 IfxScuWdt_clearCpuEndinit(passwd);
57 psi5->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
58 IfxScuWdt_setCpuEndinit(passwd);
59 }
60
61
62 void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
63 {
64 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
65 IfxScuWdt_clearCpuEndinit(passwd);
66 psi5->CLC.B.DISR = 0;
67 IfxScuWdt_setCpuEndinit(passwd);
68
69 if (psi5->CLC.U)
70 {}
71 }
IfxPsi5_enableModule
void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
Definition: IfxPsi5.c:62
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxPsi5.h
PSI5 basic functionality.
IfxPsi5_resetModule
void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
resets PSI5 kernel
Definition: IfxPsi5.c:44
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPsi5_disableModule
void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
Disable PSI5 kernel.
Definition: IfxPsi5.c:35
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401


iLLD_TC26B: IfxPsi5.h Source File

  • Psi5
  • Std
IfxPsi5.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5.h
3 * \brief PSI5 basic functionality
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Psi5_Std_Enumerations Enumerations
25 * \ingroup IfxLld_Psi5_Std
26 * \defgroup IfxLld_Psi5_Std_Channel Channel Status Functions
27 * \ingroup IfxLld_Psi5_Std
28 * \defgroup IfxLld_Psi5_Std_IO IO Pin Configuration Functions
29 * \ingroup IfxLld_Psi5_Std
30 * \defgroup IfxLld_Psi5_Std_Interrupt Interrupt configuration function
31 * \ingroup IfxLld_Psi5_Std
32 * \defgroup IfxLld_Psi5_Std_Operative Operative functions
33 * \ingroup IfxLld_Psi5_Std
34 */
35
36 #ifndef IFXPSI5_H
37 #define IFXPSI5_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "_Impl/IfxPsi5_cfg.h"
44 #include "_PinMap/IfxPsi5_PinMap.h"
45 #include "IfxPsi5_reg.h"
46 #include "Scu/Std/IfxScuWdt.h"
47 #include "Cpu/Std/IfxCpu_Intrinsics.h"
48 #include "Src/Std/IfxSrc.h"
49
50 /******************************************************************************/
51 /*--------------------------------Enumerations--------------------------------*/
52 /******************************************************************************/
53
54 /** \addtogroup IfxLld_Psi5_Std_Enumerations
55 * \{ */
56 /** \brief MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection
57 */
58 typedef enum
59 {
60 IfxPsi5_AlternateInput_0 = 0, /**< \brief Alternate Input 0 */
61 IfxPsi5_AlternateInput_1, /**< \brief Alternate Input 1 */
62 IfxPsi5_AlternateInput_2, /**< \brief Alternate Input 2 */
63 IfxPsi5_AlternateInput_3 /**< \brief Alternate Input 3 */
64 } IfxPsi5_AlternateInput;
65
66 /** \brief MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection
67 */
68 typedef enum
69 {
70 IfxPsi5_BaudRate_125 = 0, /**< \brief Slow 125 kHz clock */
71 IfxPsi5_BaudRate_189 = 1 /**< \brief Fast 189 kHz clock */
72 } IfxPsi5_BaudRate;
73
74 /** \brief MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection
75 */
76 typedef enum
77 {
78 IfxPsi5_CRCorParity_parity = 0, /**< \brief parity selection */
79 IfxPsi5_CRCorParity_crc = 1 /**< \brief CRC selection */
80 } IfxPsi5_CRCorParity;
81
82 /** \brief Clock type
83 */
84 typedef enum
85 {
86 IfxPsi5_ClockType_fracDiv = 0, /**< \brief Fractional Divide clock */
87 IfxPsi5_ClockType_slowClock_125 = 1, /**< \brief Slow 125 kHz clock */
88 IfxPsi5_ClockType_fastClock_189 = 2, /**< \brief Fast 189 kHz clock */
89 IfxPsi5_ClockType_timeStamp = 3 /**< \brief Timestamp clock */
90 } IfxPsi5_ClockType;
91
92 /** \brief MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth
93 */
94 typedef enum
95 {
96 IfxPsi5_DigitalInputFilterDepth_0 = 0, /**< \brief Digital input filter depth is 0 */
97 IfxPsi5_DigitalInputFilterDepth_1, /**< \brief Digital input filter depth is 1 */
98 IfxPsi5_DigitalInputFilterDepth_2, /**< \brief Digital input filter depth is 2 */
99 IfxPsi5_DigitalInputFilterDepth_3, /**< \brief Digital input filter depth is 3 */
100 IfxPsi5_DigitalInputFilterDepth_4, /**< \brief Digital input filter depth is 4 */
101 IfxPsi5_DigitalInputFilterDepth_5, /**< \brief Digital input filter depth is 5 */
102 IfxPsi5_DigitalInputFilterDepth_6, /**< \brief Digital input filter depth is 6 */
103 IfxPsi5_DigitalInputFilterDepth_7, /**< \brief Digital input filter depth is 7 */
104 IfxPsi5_DigitalInputFilterDepth_8, /**< \brief Digital input filter depth is 8 */
105 IfxPsi5_DigitalInputFilterDepth_9, /**< \brief Digital input filter depth is 9 */
106 IfxPsi5_DigitalInputFilterDepth_10, /**< \brief Digital input filter depth is 10 */
107 IfxPsi5_DigitalInputFilterDepth_11, /**< \brief Digital input filter depth is 11 */
108 IfxPsi5_DigitalInputFilterDepth_12, /**< \brief Digital input filter depth is 12 */
109 IfxPsi5_DigitalInputFilterDepth_13, /**< \brief Digital input filter depth is 13 */
110 IfxPsi5_DigitalInputFilterDepth_14, /**< \brief Digital input filter depth is 14 */
111 IfxPsi5_DigitalInputFilterDepth_15 /**< \brief Digital input filter depth is 15 */
112 } IfxPsi5_DigitalInputFilterDepth;
113
114 /** \brief MODULE_PSI5.FDR.DM,Divider mode
115 */
116 typedef enum
117 {
118 IfxPsi5_DividerMode_spb = 0, /**< \brief divider mode is off */
119 IfxPsi5_DividerMode_normal = 1, /**< \brief divider mode is normal */
120 IfxPsi5_DividerMode_fractional = 2, /**< \brief divider mode is fractional */
121 IfxPsi5_DividerMode_off = 3 /**< \brief divider mode is off */
122 } IfxPsi5_DividerMode;
123
124 /** \brief MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control
125 */
126 typedef enum
127 {
128 IfxPsi5_FrameExpectation_notExpected = 0, /**< \brief No frame is expected */
129 IfxPsi5_FrameExpectation_expected = 1 /**< \brief Frame is expected */
130 } IfxPsi5_FrameExpectation;
131
132 /** \brief MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence
133 */
134 typedef enum
135 {
136 IfxPsi5_MessagingBits_absent = 0, /**< \brief No messaging bits */
137 IfxPsi5_MessagingBits_present = 1 /**< \brief 2 messaging bits */
138 } IfxPsi5_MessagingBits;
139
140 /** \brief MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers
141 */
142 typedef enum
143 {
144 IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0, /**< \brief Pulse based timestamp SPTSC to be stored in RDRHC */
145 IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1 /**< \brief Start of frame based timestamp SPTSC to be stored in RDRHC */
146 } IfxPsi5_ReceiveDataRegisterTimestamp;
147
148 /** \brief MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id
149 */
150 typedef enum
151 {
152 IfxPsi5_Slot_0 = 0, /**< \brief slot 0 */
153 IfxPsi5_Slot_1, /**< \brief slot 1 */
154 IfxPsi5_Slot_2, /**< \brief slot 2 */
155 IfxPsi5_Slot_3, /**< \brief slot 3 */
156 IfxPsi5_Slot_4, /**< \brief slot 4 */
157 IfxPsi5_Slot_5 /**< \brief slot 5 */
158 } IfxPsi5_Slot;
159
160 /** \brief OCDS Suspend Control (OCDS.SUS)
161 */
162 typedef enum
163 {
164 IfxPsi5_SuspendMode_none = 0, /**< \brief No suspend */
165 IfxPsi5_SuspendMode_hard = 1, /**< \brief Hard Suspend */
166 IfxPsi5_SuspendMode_soft = 2 /**< \brief Soft Suspend */
167 } IfxPsi5_SuspendMode;
168
169 /** \brief MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base
170 */
171 typedef enum
172 {
173 IfxPsi5_TimeBase_internal = 0, /**< \brief Internal time stamp clock */
174 IfxPsi5_TimeBase_external = 1 /**< \brief External GTM inputs */
175 } IfxPsi5_TimeBase;
176
177 /** \brief MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type
178 */
179 typedef enum
180 {
181 IfxPsi5_TimestampRegister_a = 0, /**< \brief Timestamp register A */
182 IfxPsi5_TimestampRegister_b = 1, /**< \brief Timestamp register B */
183 IfxPsi5_TimestampRegister_c = 2 /**< \brief Timestamp register C */
184 } IfxPsi5_TimestampRegister;
185
186 /** \brief MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id
187 */
188 typedef enum
189 {
190 IfxPsi5_Trigger_0 = 0, /**< \brief trigger 0 */
191 IfxPsi5_Trigger_1, /**< \brief trigger 1 */
192 IfxPsi5_Trigger_2, /**< \brief trigger 2 */
193 IfxPsi5_Trigger_3, /**< \brief trigger 3 */
194 IfxPsi5_Trigger_4, /**< \brief trigger 4 */
195 IfxPsi5_Trigger_5 /**< \brief trigger 5 */
196 } IfxPsi5_Trigger;
197
198 /** \brief Trigger type
199 */
200 typedef enum
201 {
202 IfxPsi5_TriggerType_periodic = 0, /**< \brief Periodic trigger */
203 IfxPsi5_TriggerType_external = 1, /**< \brief External trigger */
204 IfxPsi5_TriggerType_bypass = 2 /**< \brief Bypassed trigger */
205 } IfxPsi5_TriggerType;
206
207 /** \brief MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode
208 */
209 typedef enum
210 {
211 IfxPsi5_Verbose_off = 0, /**< \brief Verbose mode is turned off */
212 IfxPsi5_Verbose_on = 1 /**< \brief Verbose mode is turned on */
213 } IfxPsi5_Verbose;
214
215 /** \} */
216
217 /** \brief Options for choosing different Fractional Divider Registers
218 */
219 typedef enum
220 {
221 IfxPsi5_FractionalDividerRegister_normal = 0, /**< \brief The Fractional Divider Register controls the input clock f_fracdiv. */
222 IfxPsi5_FractionalDividerRegister_lowbitrate = 1, /**< \brief The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time resolution of the
223 * f_125.It divides f_fracdiv by a factor and provides f_125 to all channels. */
224 IfxPsi5_FractionalDividerRegister_highbitrate = 2, /**< \brief The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time resolution of f_189.
225 * It divides f_fracdiv by a factor and provides f_189 to all channels. */
226 IfxPsi5_FractionalDividerRegister_timestamp = 3 /**< \brief The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolution of the
227 * Time Stamp Registers TSRA/B/C and the Sync Pulse Time Base Counter SBC. It divides fPSI5 by a factor. It contains as well the bits for reset control of the time stamp counters. */
228 } IfxPsi5_FractionalDividerRegister;
229
230 typedef enum
231 {
232 IfxPsi5_InterruptServiceRequest_0 = 0,
233 IfxPsi5_InterruptServiceRequest_1 = 1,
234 IfxPsi5_InterruptServiceRequest_2 = 2,
235 IfxPsi5_InterruptServiceRequest_3 = 3,
236 IfxPsi5_InterruptServiceRequest_4 = 4,
237 IfxPsi5_InterruptServiceRequest_5 = 5,
238 IfxPsi5_InterruptServiceRequest_6 = 6,
239 IfxPsi5_InterruptServiceRequest_7 = 7
240 } IfxPsi5_InterruptServiceRequest;
241
242 typedef enum
243 {
244 IfxPsi5_InterruptStatusRegister_a = 0,
245 IfxPsi5_InterruptStatusRegister_b = 1
246 } IfxPsi5_InterruptStatusRegister;
247
248 /** \brief Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)
249 */
250 typedef enum
251 {
252 IfxPsi5_ReceiverControlRegister_a = 0, /**< \brief Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots. */
253 IfxPsi5_ReceiverControlRegister_b = 1, /**< \brief Receiver Control Register B configures up to 6 frame types in the up to 6 slots */
254 IfxPsi5_ReceiverControlRegister_c = 2 /**< \brief Receiver Control Register C configures bit rate and time stamp sources */
255 } IfxPsi5_ReceiverControlRegister;
256
257 /** \addtogroup IfxLld_Psi5_Std_Channel
258 * \{ */
259
260 /******************************************************************************/
261 /*-------------------------Inline Function Prototypes-------------------------*/
262 /******************************************************************************/
263
264 /** \brief access function to get the CRCI status register contents for a channel
265 * \param psi5 pointer to the PSI5 register space
266 * \param channel channel Id
267 * \return Crci status register contents
268 */
269 IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
270
271 /** \brief access function to get the MEI status register contents for a channel
272 * \param psi5 pointer to the PSI5 register space
273 * \param channel channel Id
274 * \return Mei status register contents
275 */
276 IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
277
278 /** \brief access function to get the NBI status register contents for a channel
279 * \param psi5 pointer to the PSI5 register space
280 * \param channel channel Id
281 * \return Nbi status register contents
282 */
283 IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
284
285 /** \brief access function to get the NFI status register contents for a channel
286 * \param psi5 pointer to the PSI5 register space
287 * \param channel channel Id
288 * \return Nfi status register contents
289 */
290 IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
291
292 /** \brief access function to get the RDI status register contents for a channel
293 * \param psi5 pointer to the PSI5 register space
294 * \param channel channel Id
295 * \return Rdi status register contents
296 */
297 IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
298
299 /** \brief access function to get the RMI status register contents for a channel
300 * \param psi5 pointer to the PSI5 register space
301 * \param channel channel Id
302 * \return Rmi status register contents
303 */
304 IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
305
306 /** \brief access function to get the RSI status register contents for a channel
307 * \param psi5 pointer to the PSI5 register space
308 * \param channel channel Id
309 * \return Rsi status register contents
310 */
311 IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
312
313 /** \brief access function to get the TEI status register contents for a channel
314 * \param psi5 pointer to the PSI5 register space
315 * \param channel channel Id
316 * \return Tei status register contents
317 */
318 IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
319
320 /******************************************************************************/
321 /*-------------------------Global Function Prototypes-------------------------*/
322 /******************************************************************************/
323
324 /** \brief resets PSI5 kernel
325 * \param psi5 pointer to PSI5 registers
326 * \return None
327 */
328 IFX_EXTERN void IfxPsi5_resetModule(Ifx_PSI5 *psi5);
329
330 /** \} */
331
332 /** \addtogroup IfxLld_Psi5_Std_IO
333 * \{ */
334
335 /******************************************************************************/
336 /*-------------------------Inline Function Prototypes-------------------------*/
337 /******************************************************************************/
338
339 /** \brief Initializes a RX input
340 * \param rx the RX Pin which should be configured
341 * \param inputMode pin input mode which should be configured
342 * \param padDriver Pad Driver Configuration
343 * \return None
344 */
345 IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
346
347 /** \brief Initializes a TX output
348 * \param tx the TX Pin which should be configured
349 * \param outputMode the pin output mode which should be configured
350 * \param padDriver the pad driver mode which should be configured
351 * \return None
352 */
353 IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
354
355 /** \brief Sets the alternate RX input
356 * \param psi5Ch pointer to the PSI5 channel register space
357 * \param alternateInput Alternate RX input selection
358 * \return None
359 */
360 IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput);
361
362 /** \} */
363
364 /** \addtogroup IfxLld_Psi5_Std_Operative
365 * \{ */
366
367 /******************************************************************************/
368 /*-------------------------Inline Function Prototypes-------------------------*/
369 /******************************************************************************/
370
371 /** \brief Returns the module's suspend state.
372 * TRUE :if module is suspended.
373 * FALSE:if module is not yet suspended.
374 * \param psi5 Pointer to PSI5 module registers
375 * \return Suspend status (TRUE / FALSE)
376 */
377 IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5);
378
379 /** \brief Configure the Module to Hard/Soft suspend mode.
380 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
381 * \param psi5 Pointer to PSI5 module registers
382 * \param mode Module suspend mode
383 * \return None
384 */
385 IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode);
386
387 /******************************************************************************/
388 /*-------------------------Global Function Prototypes-------------------------*/
389 /******************************************************************************/
390
391 /** \brief Disable PSI5 kernel
392 * \param psi5 pointer to the base of PSI5 registers
393 * \return None
394 */
395 IFX_EXTERN void IfxPsi5_disableModule(Ifx_PSI5 *psi5);
396
397 /** \} */
398
399 /******************************************************************************/
400 /*-------------------------Inline Function Prototypes-------------------------*/
401 /******************************************************************************/
402
403 /** \brief Gives the pointer to the SRC register for respective PSI5 interrupt source
404 * \param psi5 Pointer to PSI5 SFR base register
405 * \param intRequest Interrupt Source
406 * \return Address of the required SRC register
407 */
408 IFX_INLINE volatile Ifx_SRC_SRCR *IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest);
409
410 /** \brief Enabling all channels and error flags
411 * \param psi5 Pointer to PSI5 SFR base register
412 * \return None
413 */
414 IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5);
415
416 /**
417 * \param psi5 Pointer to PSI5 SFR base register
418 * \param fcd Select the appropriate divider register(see IfxPsi5_FractionalDividerRegister enum) for required functionality.
419 * \param value Contains value including divider values for different divider registers(FDR,FDRL,FDRH,FDRT)
420 * \return None
421 */
422 IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value);
423
424 /******************************************************************************/
425 /*-------------------------Global Function Prototypes-------------------------*/
426 /******************************************************************************/
427
428 /**
429 * \return None
430 */
431 IFX_EXTERN void IfxPsi5_enableModule(Ifx_PSI5 *psi5);
432
433 /******************************************************************************/
434 /*---------------------Inline Function Implementations------------------------*/
435 /******************************************************************************/
436
437 IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
438 {
439 return psi5->CRCIOV[channel].U;
440 }
441
442
443 IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
444 {
445 return psi5->MEIOV[channel].U;
446 }
447
448
449 IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
450 {
451 return psi5->NBIOV[channel].U;
452 }
453
454
455 IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
456 {
457 return psi5->NFIOV[channel].U;
458 }
459
460
461 IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
462 {
463 return psi5->RDIOV[channel].U;
464 }
465
466
467 IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
468 {
469 return psi5->RMIOV[channel].U;
470 }
471
472
473 IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
474 {
475 return psi5->RSIOV[channel].U;
476 }
477
478
479 IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
480 {
481 return psi5->TEIOV[channel].U;
482 }
483
484
485 IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
486 {
487 if (rx->pin.port != NULL_PTR)
488 {
489 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
490 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
491 Ifx_PSI5 *psi5 = rx->module;
492 Ifx_PSI5_CH *psi5Ch = &psi5->CH[rx->channelId];
493 IfxPsi5_setRxInput(psi5Ch, (IfxPsi5_AlternateInput)rx->select);
494 }
495 }
496
497
498 IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
499 {
500 if (tx->pin.port != NULL_PTR)
501 {
502 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
503 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
504 }
505 }
506
507
508 IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
509 {
510 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
511 IfxScuWdt_clearCpuEndinit(passwd);
512 psi5Ch->IOCR.B.ALTI = alternateInput;
513 IfxScuWdt_setCpuEndinit(passwd);
514 }
515
516
517 IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5)
518 {
519 Ifx_PSI5_OCS ocs;
520
521 // read the status
522 ocs.U = psi5->OCS.U;
523
524 // return the status
525 return ocs.B.SUSSTA;
526 }
527
528
529 IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
530 {
531 Ifx_PSI5_OCS ocs;
532
533 // remove protection and configure the suspend mode.
534 ocs.B.SUS_P = 1;
535 ocs.B.SUS = mode;
536 psi5->OCS.U = ocs.U;
537 }
538
539
540 IFX_INLINE volatile Ifx_SRC_SRCR *IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
541 {
542 IFX_UNUSED_PARAMETER(psi5);
543 return &MODULE_SRC.PSI5.PSI5[0].SR[intRequest];
544 }
545
546
547 IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5)
548 {
549 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
550 IfxScuWdt_clearCpuEndinit(passwd);
551 psi5->GCR.U = psi5->GCR.U | 0x000F001FU;
552 IfxScuWdt_setCpuEndinit(passwd);
553 }
554
555
556 IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
557 {
558 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
559 IfxScuWdt_clearCpuEndinit(passwd);
560
561 switch (fcd)
562 {
563 case IfxPsi5_FractionalDividerRegister_normal:
564 psi5->FDR.I = value;
565 break;
566 case IfxPsi5_FractionalDividerRegister_lowbitrate:
567 psi5->FDRL.I = value;
568 break;
569 case IfxPsi5_FractionalDividerRegister_highbitrate:
570 psi5->FDRH.I = value;
571 break;
572 case IfxPsi5_FractionalDividerRegister_timestamp:
573 psi5->FDRT.I = value;
574 break;
575 default:
576 break;
577 }
578
579 IfxScuWdt_setCpuEndinit(passwd);
580 }
581
582
583 #endif /* IFXPSI5_H */
IfxPsi5_getStatusNbi
IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NBI status register contents for a channel
Definition: IfxPsi5.h:449
IfxPsi5_DigitalInputFilterDepth_5
Digital input filter depth is 5.
Definition: IfxPsi5.h:101
IfxPsi5_Trigger_5
trigger 5
Definition: IfxPsi5.h:195
IfxPsi5_TimestampRegister_c
Timestamp register C.
Definition: IfxPsi5.h:183
IfxPsi5_FractionalDividerRegister_normal
The Fractional Divider Register controls the input clock f_fracdiv.
Definition: IfxPsi5.h:221
IfxPsi5_DividerMode_normal
divider mode is normal
Definition: IfxPsi5.h:119
IfxPsi5_Trigger_0
trigger 0
Definition: IfxPsi5.h:190
IfxPsi5_ReceiverControlRegister_a
Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots...
Definition: IfxPsi5.h:252
IfxPsi5_Trigger_2
trigger 2
Definition: IfxPsi5.h:192
IfxPsi5_InterruptServiceRequest_7
Definition: IfxPsi5.h:239
IfxPsi5_PinMap.h
PSI5 I/O map.
IfxPsi5_getStatusRdi
IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RDI status register contents for a channel
Definition: IfxPsi5.h:461
IfxPsi5_Slot_1
slot 1
Definition: IfxPsi5.h:153
IfxPsi5_BaudRate_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:71
IfxPsi5_AlternateInput_0
Alternate Input 0.
Definition: IfxPsi5.h:60
IfxPsi5_Trigger_1
trigger 1
Definition: IfxPsi5.h:191
IfxPsi5_InterruptStatusRegister
IfxPsi5_InterruptStatusRegister
Definition: IfxPsi5.h:242
IfxPsi5_AlternateInput_3
Alternate Input 3.
Definition: IfxPsi5.h:63
IfxPsi5_SuspendMode_soft
Soft Suspend.
Definition: IfxPsi5.h:166
IfxPsi5_CRCorParity_crc
CRC selection.
Definition: IfxPsi5.h:79
IfxPsi5_FractionalDividerRegister_highbitrate
The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time re...
Definition: IfxPsi5.h:224
IfxPsi5_Slot_2
slot 2
Definition: IfxPsi5.h:154
IfxPsi5_Rx_In::channelId
IfxPsi5_ChannelId channelId
Channel ID.
Definition: IfxPsi5_PinMap.h:42
IfxPsi5_FrameExpectation_expected
Frame is expected.
Definition: IfxPsi5.h:129
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxPsi5_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5_PinMap.h:44
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPsi5_BaudRate_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:70
IfxPsi5_TimeBase
IfxPsi5_TimeBase
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.
Definition: IfxPsi5.h:171
IfxPsi5_getStatusNfi
IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the NFI status register contents for a channel
Definition: IfxPsi5.h:455
IfxPsi5_TimestampRegister
IfxPsi5_TimestampRegister
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type...
Definition: IfxPsi5.h:179
IfxPsi5_DigitalInputFilterDepth_10
Digital input filter depth is 10.
Definition: IfxPsi5.h:106
IfxPsi5_AlternateInput_2
Alternate Input 2.
Definition: IfxPsi5.h:62
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:116
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxPsi5_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5.h:136
IfxPsi5_CRCorParity_parity
parity selection
Definition: IfxPsi5.h:78
IfxPsi5_SuspendMode_none
No suspend.
Definition: IfxPsi5.h:164
IfxPsi5_DigitalInputFilterDepth_1
Digital input filter depth is 1.
Definition: IfxPsi5.h:97
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:39
IfxPsi5_isModuleSuspended
IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxPsi5.h:517
IfxSrc.h
SRC basic functionality.
IfxPsi5_ReceiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.
Definition: IfxPsi5.h:142
IfxPsi5_getStatusCrci
IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the CRCI status register contents for a channel
Definition: IfxPsi5.h:437
IfxPsi5_FractionalDividerRegister_lowbitrate
The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time res...
Definition: IfxPsi5.h:222
IfxPsi5_InterruptServiceRequest_2
Definition: IfxPsi5.h:234
IfxCpu_Intrinsics.h
IfxPsi5_Slot_4
slot 4
Definition: IfxPsi5.h:156
IfxPsi5_setSuspendMode
IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxPsi5.h:529
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxPsi5_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5_PinMap.h:43
IfxPsi5_TimestampRegister_b
Timestamp register B.
Definition: IfxPsi5.h:182
IfxPsi5_DigitalInputFilterDepth_12
Digital input filter depth is 12.
Definition: IfxPsi5.h:108
IfxPsi5_InterruptServiceRequest_1
Definition: IfxPsi5.h:233
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxPsi5_Trigger_3
trigger 3
Definition: IfxPsi5.h:193
IfxPsi5_getStatusRmi
IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RMI status register contents for a channel
Definition: IfxPsi5.h:467
IfxPsi5_MessagingBits_present
2 messaging bits
Definition: IfxPsi5.h:137
IfxScuWdt.h
SCU basic functionality.
IfxPsi5_AlternateInput
IfxPsi5_AlternateInput
MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection.
Definition: IfxPsi5.h:58
IfxPsi5_Trigger_4
trigger 4
Definition: IfxPsi5.h:194
IfxPsi5_enableAllChannels
IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5)
Enabling all channels and error flags.
Definition: IfxPsi5.h:547
IfxPsi5_DigitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.
Definition: IfxPsi5.h:94
IfxPsi5_SuspendMode
IfxPsi5_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxPsi5.h:162
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxPsi5_DigitalInputFilterDepth_4
Digital input filter depth is 4.
Definition: IfxPsi5.h:100
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPsi5_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
Gives the pointer to the SRC register for respective PSI5 interrupt source.
Definition: IfxPsi5.h:540
IfxPsi5_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5.h:181
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxPsi5_DividerMode_off
divider mode is off
Definition: IfxPsi5.h:121
IfxPsi5_DividerMode_spb
divider mode is off
Definition: IfxPsi5.h:118
IfxPsi5_TriggerType_external
External trigger.
Definition: IfxPsi5.h:203
IfxPsi5_DigitalInputFilterDepth_2
Digital input filter depth is 2.
Definition: IfxPsi5.h:98
IfxPsi5_initTxPin
IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5.h:498
IfxPsi5_SuspendMode_hard
Hard Suspend.
Definition: IfxPsi5.h:165
IfxPsi5_AlternateInput_1
Alternate Input 1.
Definition: IfxPsi5.h:61
IfxPsi5_InterruptStatusRegister_a
Definition: IfxPsi5.h:244
IfxPsi5_InterruptServiceRequest_3
Definition: IfxPsi5.h:235
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:71
IfxPsi5_ReceiveDataRegisterTimestamp_frame
Start of frame based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:145
IfxPsi5_FrameExpectation_notExpected
No frame is expected.
Definition: IfxPsi5.h:128
IfxPsi5_Trigger
IfxPsi5_Trigger
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.
Definition: IfxPsi5.h:188
IfxPsi5_CRCorParity
IfxPsi5_CRCorParity
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.
Definition: IfxPsi5.h:76
IfxPsi5_Slot_0
slot 0
Definition: IfxPsi5.h:152
IfxPsi5_enableModule
IFX_EXTERN void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
Definition: IfxPsi5.c:62
IfxPsi5_DigitalInputFilterDepth_0
Digital input filter depth is 0.
Definition: IfxPsi5.h:96
IfxPsi5_Verbose
IfxPsi5_Verbose
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.
Definition: IfxPsi5.h:209
IfxPsi5_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5.h:173
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxPsi5_ReceiverControlRegister
IfxPsi5_ReceiverControlRegister
Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)
Definition: IfxPsi5.h:250
IfxPsi5_DigitalInputFilterDepth_9
Digital input filter depth is 9.
Definition: IfxPsi5.h:105
IfxPsi5_ReceiverControlRegister_c
Receiver Control Register C configures bit rate and time stamp sources.
Definition: IfxPsi5.h:254
IfxPsi5_DigitalInputFilterDepth_6
Digital input filter depth is 6.
Definition: IfxPsi5.h:102
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxPsi5_DigitalInputFilterDepth_8
Digital input filter depth is 8.
Definition: IfxPsi5.h:104
IfxPsi5_ClockType_fastClock_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:88
IfxPsi5_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5.h:202
IfxPsi5_cfg.h
PSI5 on-chip implementation data.
IfxPsi5_ReceiverControlRegister_b
Receiver Control Register B configures up to 6 frame types in the up to 6 slots.
Definition: IfxPsi5.h:253
IfxPsi5_InterruptServiceRequest_0
Definition: IfxPsi5.h:232
IfxPsi5_InterruptServiceRequest_4
Definition: IfxPsi5.h:236
IfxPsi5_DigitalInputFilterDepth_14
Digital input filter depth is 14.
Definition: IfxPsi5.h:110
IfxPsi5_resetModule
IFX_EXTERN void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
resets PSI5 kernel
Definition: IfxPsi5.c:44
IfxPsi5_FrameExpectation
IfxPsi5_FrameExpectation
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.
Definition: IfxPsi5.h:126
IfxPsi5_setRxInput
IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
Sets the alternate RX input.
Definition: IfxPsi5.h:508
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPsi5_initRxPin
IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5.h:485
IfxPsi5_DigitalInputFilterDepth_3
Digital input filter depth is 3.
Definition: IfxPsi5.h:99
IfxPsi5_setFractionalDivider
IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
Definition: IfxPsi5.h:556
IfxPsi5_InterruptServiceRequest_6
Definition: IfxPsi5.h:238
IfxPsi5_MessagingBits
IfxPsi5_MessagingBits
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.
Definition: IfxPsi5.h:134
IfxPsi5_TimeBase_external
External GTM inputs.
Definition: IfxPsi5.h:174
IfxPsi5_FractionalDividerRegister
IfxPsi5_FractionalDividerRegister
Options for choosing different Fractional Divider Registers.
Definition: IfxPsi5.h:219
IfxPsi5_Slot_3
slot 3
Definition: IfxPsi5.h:155
IfxPsi5_disableModule
IFX_EXTERN void IfxPsi5_disableModule(Ifx_PSI5 *psi5)
Disable PSI5 kernel.
Definition: IfxPsi5.c:35
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxPsi5_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5.h:120
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:84
IfxPsi5_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5.h:89
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxPsi5_DigitalInputFilterDepth_15
Digital input filter depth is 15.
Definition: IfxPsi5.h:111
IfxPsi5_InterruptServiceRequest_5
Definition: IfxPsi5.h:237
IfxPsi5_DigitalInputFilterDepth_7
Digital input filter depth is 7.
Definition: IfxPsi5.h:103
IfxPsi5_FractionalDividerRegister_timestamp
The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolut...
Definition: IfxPsi5.h:226
IfxPsi5_TriggerType
IfxPsi5_TriggerType
Trigger type.
Definition: IfxPsi5.h:200
IfxPsi5_BaudRate
IfxPsi5_BaudRate
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.
Definition: IfxPsi5.h:68
IfxPsi5_Slot_5
slot 5
Definition: IfxPsi5.h:157
IfxPsi5_DigitalInputFilterDepth_13
Digital input filter depth is 13.
Definition: IfxPsi5.h:109
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxPsi5_InterruptServiceRequest
IfxPsi5_InterruptServiceRequest
Definition: IfxPsi5.h:230
IfxPsi5_DigitalInputFilterDepth_11
Digital input filter depth is 11.
Definition: IfxPsi5.h:107
IfxPsi5_ReceiveDataRegisterTimestamp_pulse
Pulse based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:144
IfxPsi5_getStatusTei
IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the TEI status register contents for a channel
Definition: IfxPsi5.h:479
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:48
IfxPsi5_Verbose_off
Verbose mode is turned off.
Definition: IfxPsi5.h:211
IfxPsi5_getStatusRsi
IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the RSI status register contents for a channel
Definition: IfxPsi5.h:473
IfxPsi5_InterruptStatusRegister_b
Definition: IfxPsi5.h:245
IfxPsi5_Rx_In::module
Ifx_PSI5 * module
Base address.
Definition: IfxPsi5_PinMap.h:41
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxPsi5_getStatusMei
IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
access function to get the MEI status register contents for a channel
Definition: IfxPsi5.h:443
IfxPsi5_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5.h:86
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:150
IfxPsi5_ClockType_slowClock_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:87
IfxPsi5_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5_PinMap.h:53
IfxPsi5_TriggerType_bypass
Bypassed trigger.
Definition: IfxPsi5.h:204
IfxPsi5_Verbose_on
Verbose mode is turned on.
Definition: IfxPsi5.h:212


iLLD_TC26B: IfxPsi5_PinMap.c Source File

  • _PinMap
IfxPsi5_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_PinMap.c
3 * \brief PSI5 I/O map
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxPsi5_PinMap.h"
27
28 IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a};
29 IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b};
30 IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c};
31 IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a};
32 IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b};
33 IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c};
34 IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a};
35 IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b};
36 IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c};
37 IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4};
38 IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4};
39 IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4};
40 IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4};
41 IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4};
42 IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4};
43 IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4};
44 IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4};
45 IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4};
46
47
48 const IfxPsi5_Rx_In *IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS] = {
49 {
50 {
51 &IfxPsi5_RX0A_P00_1_IN,
52 &IfxPsi5_RX0B_P02_3_IN,
53 &IfxPsi5_RX0C_P33_1_IN
54 },
55 {
56 &IfxPsi5_RX1A_P00_3_IN,
57 &IfxPsi5_RX1B_P02_5_IN,
58 &IfxPsi5_RX1C_P33_3_IN
59 },
60 {
61 &IfxPsi5_RX2A_P00_5_IN,
62 &IfxPsi5_RX2B_P02_7_IN,
63 &IfxPsi5_RX2C_P33_5_IN
64 }
65 }
66 };
67
68 const IfxPsi5_Tx_Out *IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS] = {
69 {
70 {
71 &IfxPsi5_TX0_P00_2_OUT,
72 &IfxPsi5_TX0_P02_2_OUT,
73 &IfxPsi5_TX0_P33_2_OUT
74 },
75 {
76 &IfxPsi5_TX1_P00_4_OUT,
77 &IfxPsi5_TX1_P02_6_OUT,
78 &IfxPsi5_TX1_P33_4_OUT
79 },
80 {
81 &IfxPsi5_TX2_P00_6_OUT,
82 &IfxPsi5_TX2_P02_8_OUT,
83 &IfxPsi5_TX2_P33_6_OUT
84 }
85 }
86 };
IfxPsi5_Rx_In_pinTable
const IfxPsi5_Rx_In * IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxPsi5_PinMap.c:48
IfxPsi5_PinMap.h
PSI5 I/O map.
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:74
IfxPsi5_RX1C_P33_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
Definition: IfxPsi5_PinMap.c:33
IfxPsi5_TX0_P02_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
Definition: IfxPsi5_PinMap.c:38
IFXPSI5_PINMAP_NUM_CHANNELS
#define IFXPSI5_PINMAP_NUM_CHANNELS
Definition: IfxPsi5_PinMap.h:77
IfxPsi5_TX0_P33_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
Definition: IfxPsi5_PinMap.c:39
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:39
IfxPsi5_RX1A_P00_3_IN
IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
Definition: IfxPsi5_PinMap.c:31
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxPsi5_RX0B_P02_3_IN
IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
Definition: IfxPsi5_PinMap.c:29
IfxPsi5_TX1_P33_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
Definition: IfxPsi5_PinMap.c:42
IfxPsi5_ChannelId_2
Specifies PSI5 channel 2.
Definition: IfxPsi5_cfg.h:76
IfxPsi5_TX2_P02_8_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
Definition: IfxPsi5_PinMap.c:44
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:79
IfxPsi5_TX1_P00_4_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
Definition: IfxPsi5_PinMap.c:40
IfxPsi5_RX0A_P00_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
Definition: IfxPsi5_PinMap.c:28
IfxPsi5_TX2_P00_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
Definition: IfxPsi5_PinMap.c:43
IfxPsi5_RX0C_P33_1_IN
IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
Definition: IfxPsi5_PinMap.c:30
IfxPsi5_TX0_P00_2_OUT
IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
Definition: IfxPsi5_PinMap.c:37
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IfxPsi5_RX2B_P02_7_IN
IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
Definition: IfxPsi5_PinMap.c:35
IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:78
IFXPSI5_PINMAP_NUM_MODULES
#define IFXPSI5_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5_PinMap.h:76
IfxPsi5_RX2A_P00_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
Definition: IfxPsi5_PinMap.c:34
IfxPsi5_ChannelId_1
Specifies PSI5 channel 1.
Definition: IfxPsi5_cfg.h:75
IfxPsi5_RX1B_P02_5_IN
IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
Definition: IfxPsi5_PinMap.c:32
IfxPsi5_TX1_P02_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
Definition: IfxPsi5_PinMap.c:41
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:48
IfxPsi5_RX2C_P33_5_IN
IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
Definition: IfxPsi5_PinMap.c:36
IfxPsi5_TX2_P33_6_OUT
IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
Definition: IfxPsi5_PinMap.c:45
IfxPsi5_Tx_Out_pinTable
const IfxPsi5_Tx_Out * IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxPsi5_PinMap.c:68


iLLD_TC26B: IfxPsi5_PinMap.h Source File

  • _PinMap
IfxPsi5_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_PinMap.h
3 * \brief PSI5 I/O map
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Psi5_pinmap PSI5 Pin Mapping
25 * \ingroup IfxLld_Psi5
26 */
27
28 #ifndef IFXPSI5_PINMAP_H
29 #define IFXPSI5_PINMAP_H
30
31 #include <IfxPsi5_reg.h>
32 #include <_Impl/IfxPsi5_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Psi5_pinmap
36 * \{ */
37
38 /** \brief RX pin mapping structure */
39 typedef const struct
40 {
41 Ifx_PSI5* module; /**< \brief Base address */
42 IfxPsi5_ChannelId channelId; /**< \brief Channel ID */
43 IfxPort_Pin pin; /**< \brief Port pin */
44 Ifx_RxSel select; /**< \brief Input multiplexer value */
45 } IfxPsi5_Rx_In;
46
47 /** \brief TX pin mapping structure */
48 typedef const struct
49 {
50 Ifx_PSI5* module; /**< \brief Base address */
51 IfxPsi5_ChannelId channelId; /**< \brief Channel ID */
52 IfxPort_Pin pin; /**< \brief Port pin */
53 IfxPort_OutputIdx select; /**< \brief Port control code */
54 } IfxPsi5_Tx_Out;
55
56 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN; /**< \brief PSI5_RX0A: PSI5 input */
57 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN; /**< \brief PSI5_RX0B: PSI5 input */
58 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN; /**< \brief PSI5_RX0C: PSI5 input */
59 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN; /**< \brief PSI5_RX1A: PSI5 input */
60 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN; /**< \brief PSI5_RX1B: PSI5 input */
61 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN; /**< \brief PSI5_RX1C: PSI5 input */
62 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN; /**< \brief PSI5_RX2A: PSI5 input */
63 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN; /**< \brief PSI5_RX2B: PSI5 input */
64 IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN; /**< \brief PSI5_RX2C: PSI5 input */
65 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
66 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
67 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
68 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT; /**< \brief PSI5_TX1: PSI5 output */
69 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT; /**< \brief PSI5_TX1: PSI5 output */
70 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT; /**< \brief PSI5_TX1: PSI5 output */
71 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT; /**< \brief PSI5_TX2: PSI5 output */
72 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT; /**< \brief PSI5_TX2: PSI5 output */
73 IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT; /**< \brief PSI5_TX2: PSI5 output */
74
75 /** \brief Table dimensions */
76 #define IFXPSI5_PINMAP_NUM_MODULES 1
77 #define IFXPSI5_PINMAP_NUM_CHANNELS 3
78 #define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
79 #define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3
80
81
82 /** \brief IfxPsi5_Rx_In table */
83 IFX_EXTERN const IfxPsi5_Rx_In *IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS];
84
85 /** \brief IfxPsi5_Tx_Out table */
86 IFX_EXTERN const IfxPsi5_Tx_Out *IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS];
87
88 /** \} */
89
90 #endif /* IFXPSI5_PINMAP_H */
IfxPsi5_Rx_In_pinTable
IFX_EXTERN const IfxPsi5_Rx_In * IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5_Rx_In table.
Definition: IfxPsi5_PinMap.h:83
IfxPsi5_RX2B_P02_7_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN
PSI5_RX2B: PSI5 input.
Definition: IfxPsi5_PinMap.h:63
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IFXPSI5_PINMAP_NUM_CHANNELS
#define IFXPSI5_PINMAP_NUM_CHANNELS
Definition: IfxPsi5_PinMap.h:77
IfxPsi5_Rx_In::channelId
IfxPsi5_ChannelId channelId
Channel ID.
Definition: IfxPsi5_PinMap.h:42
IfxPsi5_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5_PinMap.h:44
IfxPsi5_RX2A_P00_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN
PSI5_RX2A: PSI5 input.
Definition: IfxPsi5_PinMap.h:62
IfxPsi5_RX1A_P00_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN
PSI5_RX1A: PSI5 input.
Definition: IfxPsi5_PinMap.h:59
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:39
IfxPsi5_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5_PinMap.h:43
IfxPsi5_RX1C_P33_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN
PSI5_RX1C: PSI5 input.
Definition: IfxPsi5_PinMap.h:61
IfxPsi5_TX0_P02_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT
PSI5_TX0: PSI5 output.
Definition: IfxPsi5_PinMap.h:66
IfxPsi5_TX2_P02_8_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT
PSI5_TX2: PSI5 output.
Definition: IfxPsi5_PinMap.h:72
IfxPsi5_TX1_P33_4_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT
PSI5_TX1: PSI5 output.
Definition: IfxPsi5_PinMap.h:70
IfxPsi5_RX2C_P33_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN
PSI5_RX2C: PSI5 input.
Definition: IfxPsi5_PinMap.h:64
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPsi5_TX1_P00_4_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT
PSI5_TX1: PSI5 output.
Definition: IfxPsi5_PinMap.h:68
IfxPsi5_RX0B_P02_3_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN
PSI5_RX0B: PSI5 input.
Definition: IfxPsi5_PinMap.h:57
IfxPsi5_TX0_P00_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT
PSI5_TX0: PSI5 output.
Definition: IfxPsi5_PinMap.h:65
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:71
IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:79
IfxPsi5_TX1_P02_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT
PSI5_TX1: PSI5 output.
Definition: IfxPsi5_PinMap.h:69
IfxPsi5_TX2_P33_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT
PSI5_TX2: PSI5 output.
Definition: IfxPsi5_PinMap.h:73
IfxPsi5_TX2_P00_6_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT
PSI5_TX2: PSI5 output.
Definition: IfxPsi5_PinMap.h:71
IfxPsi5_cfg.h
PSI5 on-chip implementation data.
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxPsi5_RX1B_P02_5_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN
PSI5_RX1B: PSI5 input.
Definition: IfxPsi5_PinMap.h:60
IfxPsi5_TX0_P33_2_OUT
IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT
PSI5_TX0: PSI5 output.
Definition: IfxPsi5_PinMap.h:67
IfxPsi5_RX0A_P00_1_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN
PSI5_RX0A: PSI5 input.
Definition: IfxPsi5_PinMap.h:56
IfxPsi5_RX0C_P33_1_IN
IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN
PSI5_RX0C: PSI5 input.
Definition: IfxPsi5_PinMap.h:58
IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5_PinMap.h:78
IFXPSI5_PINMAP_NUM_MODULES
#define IFXPSI5_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5_PinMap.h:76
IfxPsi5_Tx_Out_pinTable
IFX_EXTERN const IfxPsi5_Tx_Out * IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5_Tx_Out table.
Definition: IfxPsi5_PinMap.h:86
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:48
IfxPsi5_Rx_In::module
Ifx_PSI5 * module
Base address.
Definition: IfxPsi5_PinMap.h:41
IfxPsi5_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5_PinMap.h:53
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxPsi5_Psi5.c Source File

  • Psi5
  • Psi5
IfxPsi5_Psi5.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_Psi5.c
3 * \brief PSI5 PSI5 details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxPsi5_Psi5.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
36 {
37 Ifx_PSI5 *psi5SFR = psi5->psi5;
38
39 IfxPsi5_Psi5_resetModule(psi5SFR);
40 }
41
42
43 void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
44 {
45 psi5->CLC.U = 0x00000000;
46 }
47
48
49 uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
50 {
51 uint32 result;
52 uint32 fPsi5 = IfxScuCcu_getSpbFrequency();
53
54 switch (psi5->FDR.B.DM)
55 {
56 case IfxPsi5_DividerMode_spb:
57 result = fPsi5;
58 break;
59 case IfxPsi5_DividerMode_normal:
60 result = fPsi5 / (IFXPSI5_STEP_RANGE - psi5->FDR.B.STEP);
61 break;
62 case IfxPsi5_DividerMode_fractional:
63 result = (fPsi5 * IFXPSI5_STEP_RANGE) / psi5->FDR.B.STEP;
64 break;
65 case IfxPsi5_DividerMode_off:
66 result = 0;
67 break;
68 default:
69 result = 0;
70 }
71
72 return result;
73 }
74
75
76 boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
77 {
78 uint32 wdtIdx;
79 boolean status = TRUE;
80
81 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
82
83 IfxScuWdt_clearCpuEndinit(passwd);
84
85 Ifx_PSI5 *psi5 = config->module->psi5;
86 Ifx_PSI5_CH *psi5Ch = &psi5->CH[config->channelId];
87 channel->channel = psi5Ch;
88 channel->module = (IfxPsi5_Psi5 *)config->module;
89 channel->channelId = config->channelId;
90
91 Ifx_PSI5_CH_PGC tempPGC;
92 tempPGC.B.PLEN = config->pulseGeneration.pulseLength;
93 tempPGC.B.DEL = config->pulseGeneration.delayLength;
94 tempPGC.B.TBS = config->pulseGeneration.timeBaseSelect;
95 tempPGC.B.ETB = config->pulseGeneration.externalTimeBaseSelect;
96 tempPGC.B.ETS = config->pulseGeneration.externalTriggerSelect;
97 tempPGC.B.BOT = config->pulseGeneration.blankoutTime;
98
99 switch (config->pulseGeneration.periodicOrExternalOrBypass)
100 {
101 case IfxPsi5_TriggerType_periodic:
102 tempPGC.B.PTE = TRUE;
103 tempPGC.B.ETE = FALSE;
104 tempPGC.B.BYP = FALSE;
105 break;
106
107 case IfxPsi5_TriggerType_external:
108 tempPGC.B.PTE = FALSE;
109 tempPGC.B.ETE = TRUE;
110 tempPGC.B.BYP = FALSE;
111 break;
112
113 case IfxPsi5_TriggerType_bypass:
114 tempPGC.B.PTE = FALSE;
115 tempPGC.B.ETE = FALSE;
116 tempPGC.B.BYP = TRUE;
117 break;
118 }
119
120 psi5Ch->PGC.U = tempPGC.U;
121
122 Ifx_PSI5_CH_CTV tempCTV;
123 tempCTV.B.CTV = config->channelTrigger.channelTriggerValue;
124 tempCTV.B.CTC = config->channelTrigger.channelTriggerCounter;
125 psi5Ch->CTV.U = tempCTV.U;
126
127 for (wdtIdx = 0; wdtIdx < IFXPSI5_NUM_WDTS; wdtIdx++)
128 {
129 psi5Ch->WDT[wdtIdx].U = config->watchdogTimerLimit[wdtIdx];
130 }
131
132 Ifx_PSI5_CH_RCRA tempRCRA;
133 tempRCRA.B.PDL0 = config->receiveControl.payloadLength[0];
134 tempRCRA.B.PDL1 = config->receiveControl.payloadLength[1];
135 tempRCRA.B.PDL2 = config->receiveControl.payloadLength[2];
136 tempRCRA.B.PDL3 = config->receiveControl.payloadLength[3];
137 tempRCRA.B.PDL4 = config->receiveControl.payloadLength[4];
138 tempRCRA.B.PDL5 = config->receiveControl.payloadLength[5];
139 tempRCRA.B.ASYN = config->receiveControl.asynchronousModeSelected;
140 tempRCRA.B.AVBS = config->receiveControl.verboseForAsynchronousMode;
141 psi5Ch->RCRA.U = tempRCRA.U;
142
143 Ifx_PSI5_CH_RCRB tempRCRB;
144 tempRCRB.B.MSG0 = config->receiveControl.messagingBitsPresence[0];
145 tempRCRB.B.MSG1 = config->receiveControl.messagingBitsPresence[1];
146 tempRCRB.B.MSG2 = config->receiveControl.messagingBitsPresence[2];
147 tempRCRB.B.MSG3 = config->receiveControl.messagingBitsPresence[3];
148 tempRCRB.B.MSG4 = config->receiveControl.messagingBitsPresence[4];
149 tempRCRB.B.MSG5 = config->receiveControl.messagingBitsPresence[5];
150 tempRCRB.B.CRC0 = config->receiveControl.crcOrParity[0];
151 tempRCRB.B.CRC1 = config->receiveControl.crcOrParity[1];
152 tempRCRB.B.CRC2 = config->receiveControl.crcOrParity[2];
153 tempRCRB.B.CRC3 = config->receiveControl.crcOrParity[3];
154 tempRCRB.B.CRC4 = config->receiveControl.crcOrParity[4];
155 tempRCRB.B.CRC5 = config->receiveControl.crcOrParity[5];
156 tempRCRB.B.FEC0 = config->receiveControl.frameExpectation[0];
157 tempRCRB.B.FEC1 = config->receiveControl.frameExpectation[1];
158 tempRCRB.B.FEC2 = config->receiveControl.frameExpectation[2];
159 tempRCRB.B.FEC3 = config->receiveControl.frameExpectation[3];
160 tempRCRB.B.FEC4 = config->receiveControl.frameExpectation[4];
161 tempRCRB.B.FEC5 = config->receiveControl.frameExpectation[5];
162 tempRCRB.B.VBS0 = config->receiveControl.verbose[0];
163 tempRCRB.B.VBS1 = config->receiveControl.verbose[1];
164 tempRCRB.B.VBS2 = config->receiveControl.verbose[2];
165 tempRCRB.B.VBS3 = config->receiveControl.verbose[3];
166 tempRCRB.B.VBS4 = config->receiveControl.verbose[4];
167 tempRCRB.B.VBS5 = config->receiveControl.verbose[5];
168 psi5Ch->RCRB.U = tempRCRB.U;
169
170 Ifx_PSI5_CH_RCRC tempRCRC;
171 tempRCRC.B.BRS = config->receiveControl.baudrateSelect;
172 tempRCRC.B.TSP = config->receiveControl.pulseTimestampSelect;
173 tempRCRC.B.TSF = config->receiveControl.frameTimestampSelect;
174 tempRCRC.B.TSR = config->receiveControl.receiveDataRegisterTimestamp;
175 psi5Ch->RCRC.U = tempRCRC.U;
176
177 Ifx_PSI5_RFC tempRFC;
178 tempRFC.B.FWL = config->receiveControl.fifoWarningLevel;
179 psi5->RFC[config->channelId].U = tempRFC.U;
180
181 Ifx_PSI5_CH_SCR tempSCR;
182 tempSCR.B.PLL = config->sendControl.payloadLength;
183 tempSCR.B.EPS = config->sendControl.enhancedProtocolSelected;
184 tempSCR.B.BSC = config->sendControl.bitStuffingEnabled;
185 tempSCR.B.SSL = config->sendControl.ssrPayloadLength;
186 tempSCR.B.SOL = config->sendControl.sorPayloadLength;
187 tempSCR.B.CRC = config->sendControl.crcGenerationEnabled;
188 tempSCR.B.STA = config->sendControl.startSequenceGenerationEnabled;
189 tempSCR.B.INH = config->sendControl.inhibitingAutomaticTransferEnabled;
190 psi5Ch->SCR.U = tempSCR.U;
191
192 Ifx_PSI5_CH_IOCR tempIOCR;
193 tempIOCR.B.DEPTH = config->inputOutputControl.digitalInputFilterDepth;
194 tempIOCR.B.OIE = config->inputOutputControl.outputInverterEnabled;
195 tempIOCR.B.IIE = config->inputOutputControl.inputInverterEnabled;
196 psi5Ch->IOCR.U = tempIOCR.U;
197
198 psi5->GCR.U |=
199 ((IFXPSI5_ENABLE_CHANNELTRIGGER << config->channelId) | (IFXPSI5_ENABLE_CHANNEL << config->channelId));
200
201 IfxScuWdt_setCpuEndinit(passwd);
202
203 const IfxPsi5_Psi5_PinsConfig *pins = config->pinsConfig;
204
205 if (pins != NULL_PTR)
206 {
207 const IfxPsi5_Rx_In *rx = pins->in;
208
209 if (rx != NULL_PTR)
210 {
211 IfxPsi5_initRxPin(rx, pins->inMode, pins->pinDriver);
212 }
213
214 const IfxPsi5_Tx_Out *tx = pins->out;
215
216 if (tx != NULL_PTR)
217 {
218 IfxPsi5_initTxPin(tx, pins->outMode, pins->pinDriver);
219 }
220 }
221
222 return status;
223 }
224
225
226 void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
227 {
228 IfxPsi5_Psi5_ChannelConfig IfxPsi5_Psi5_defaultChannelConfig = {
229 .channelId = IfxPsi5_ChannelId_0,
230 .module = NULL_PTR,
231 .pulseGeneration = {
232 .pulseLength = 5,
233 .delayLength = 1,
234 .timeBaseSelect = IfxPsi5_TimeBase_internal,
235 .externalTimeBaseSelect = IfxPsi5_Trigger_0,
236 .periodicOrExternalOrBypass = IfxPsi5_TriggerType_periodic,
237 .externalTriggerSelect = IfxPsi5_Trigger_0,
238 .blankoutTime = 5
239 },
240 .channelTrigger = {
241 .channelTriggerValue = 0x150,
242 .channelTriggerCounter = 0x130
243 },
244 .watchdogTimerLimit[0] = 0x0,
245 .watchdogTimerLimit[1] = 0x0,
246 .watchdogTimerLimit[2] = 0x0,
247 .watchdogTimerLimit[3] = 0x0,
248 .watchdogTimerLimit[4] = 0x0,
249 .watchdogTimerLimit[5] = 0x0,
250 .watchdogTimerLimit[6] = 0x0,
251 .receiveControl = {
252 .payloadLength[0] = 8,
253 .payloadLength[1] = 8,
254 .payloadLength[2] = 8,
255 .payloadLength[3] = 8,
256 .payloadLength[4] = 8,
257 .payloadLength[5] = 8,
258 .asynchronousModeSelected = FALSE,
259 .verboseForAsynchronousMode = IfxPsi5_Verbose_off,
260 .messagingBitsPresence[0] = IfxPsi5_MessagingBits_absent,
261 .messagingBitsPresence[1] = IfxPsi5_MessagingBits_absent,
262 .messagingBitsPresence[2] = IfxPsi5_MessagingBits_absent,
263 .messagingBitsPresence[3] = IfxPsi5_MessagingBits_absent,
264 .messagingBitsPresence[4] = IfxPsi5_MessagingBits_absent,
265 .messagingBitsPresence[5] = IfxPsi5_MessagingBits_absent,
266 .crcOrParity[0] = IfxPsi5_CRCorParity_parity,
267 .crcOrParity[1] = IfxPsi5_CRCorParity_parity,
268 .crcOrParity[2] = IfxPsi5_CRCorParity_parity,
269 .crcOrParity[3] = IfxPsi5_CRCorParity_parity,
270 .crcOrParity[4] = IfxPsi5_CRCorParity_parity,
271 .crcOrParity[5] = IfxPsi5_CRCorParity_parity,
272 .frameExpectation[0] = IfxPsi5_FrameExpectation_notExpected,
273 .frameExpectation[1] = IfxPsi5_FrameExpectation_notExpected,
274 .frameExpectation[2] = IfxPsi5_FrameExpectation_notExpected,
275 .frameExpectation[3] = IfxPsi5_FrameExpectation_notExpected,
276 .frameExpectation[4] = IfxPsi5_FrameExpectation_notExpected,
277 .frameExpectation[5] = IfxPsi5_FrameExpectation_notExpected,
278 .verbose[0] = IfxPsi5_Verbose_off,
279 .verbose[1] = IfxPsi5_Verbose_off,
280 .verbose[2] = IfxPsi5_Verbose_off,
281 .verbose[3] = IfxPsi5_Verbose_off,
282 .verbose[4] = IfxPsi5_Verbose_off,
283 .verbose[5] = IfxPsi5_Verbose_off,
284 .baudrateSelect = IfxPsi5_BaudRate_125,
285 .pulseTimestampSelect = IfxPsi5_TimestampRegister_a,
286 .frameTimestampSelect = IfxPsi5_TimestampRegister_a,
287 .receiveDataRegisterTimestamp = IfxPsi5_ReceiveDataRegisterTimestamp_pulse,
288 .fifoWarningLevel = 16
289 },
290 .sendControl = {
291 .payloadLength = 32,
292 .enhancedProtocolSelected = FALSE,
293 .bitStuffingEnabled = FALSE,
294 .ssrPayloadLength = 32,
295 .sorPayloadLength = 32,
296 .crcGenerationEnabled = FALSE,
297 .startSequenceGenerationEnabled = FALSE,
298 .inhibitingAutomaticTransferEnabled = FALSE
299 },
300 .inputOutputControl = {
301 .digitalInputFilterDepth = IfxPsi5_DigitalInputFilterDepth_0,
302 .outputInverterEnabled = FALSE,
303 .inputInverterEnabled = FALSE
304 }
305 };
306 *config = IfxPsi5_Psi5_defaultChannelConfig;
307 config->module = psi5;
308 }
309
310
311 boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
312 {
313 boolean status = TRUE;
314 Ifx_PSI5 *psi5SFR = config->psi5;
315
316 psi5->psi5 = psi5SFR;
317
318 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
319 IfxScuWdt_clearCpuEndinit(passwd);
320 IfxPsi5_Psi5_enableModule(psi5SFR);
321
322 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->fracDiv) == 0)
323 {
324 status = FALSE;
325
326 return status;
327 }
328 else
329 {}
330
331 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->slowClock) == 0)
332 {
333 status = FALSE;
334
335 return status;
336 }
337 else
338 {}
339
340 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->fastClock) == 0)
341 {
342 status = FALSE;
343
344 return status;
345 }
346 else
347 {}
348
349 if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->timestampClock) == 0)
350 {
351 status = FALSE;
352
353 return status;
354 }
355 else
356 {}
357
358 IfxScuWdt_setCpuEndinit(passwd);
359
360 return status;
361 }
362
363
364 void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
365 {
366 uint32 spbFrequency = IfxScuCcu_getSpbFrequency();
367
368 config->psi5 = psi5;
369 config->fracDiv.frequency = spbFrequency;
370 config->fracDiv.mode = IfxPsi5_DividerMode_normal;
371 config->fracDiv.type = IfxPsi5_ClockType_fracDiv;
372 config->slowClock.frequency = IFXPSI5_DEFAULT_SLOWCLOCK_FREQ;
373 config->slowClock.mode = IfxPsi5_DividerMode_fractional;
374 config->slowClock.type = IfxPsi5_ClockType_slowClock_125;
375 config->fastClock.frequency = IFXPSI5_DEFAULT_FASTCLOCK_FREQ;
376 config->fastClock.mode = IfxPsi5_DividerMode_fractional;
377 config->fastClock.type = IfxPsi5_ClockType_fastClock_189;
378 config->timestampClock.frequency = IFXPSI5_DEFAULT_TIMESTAMP_FREQ;
379 config->timestampClock.mode = IfxPsi5_DividerMode_normal;
380 config->timestampClock.type = IfxPsi5_ClockType_timeStamp;
381 config->timestampCounterA.externalTimeBaseSelect = IfxPsi5_Trigger_0;
382 config->timestampCounterA.timeBaseSelect = IfxPsi5_TimeBase_internal;
383 config->timestampCounterB.externalTimeBaseSelect = IfxPsi5_Trigger_0;
384 config->timestampCounterB.timeBaseSelect = IfxPsi5_TimeBase_internal;
385 config->timestampCounterC.externalTimeBaseSelect = IfxPsi5_Trigger_0;
386 config->timestampCounterC.timeBaseSelect = IfxPsi5_TimeBase_internal;
387 }
388
389
390 uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
391 {
392 uint64 step = 0;
393 uint32 result = 0;
394 IfxPsi5_DividerMode divMode = clock->mode;
395 IfxPsi5_ClockType clockType = clock->type;
396 uint32 clockFrequency = clock->frequency;
397 uint32 fInput;
398 Ifx_PSI5_FDR tempFDR, tempFDRL, tempFDRH, tempFDRT;
399
400 if (clockType == IfxPsi5_ClockType_fracDiv)
401 {
402 fInput = IfxScuCcu_getSpbFrequency();
403 }
404 else
405 {
406 fInput = IfxPsi5_Psi5_getFracDivClock(psi5);
407
408 if (fInput == 0)
409 {
410 result = 0;
411
412 return result;
413 }
414 else
415 {}
416 }
417
418 switch (divMode)
419 {
420 case IfxPsi5_DividerMode_normal:
421 step = IFXPSI5_STEP_RANGE - (fInput / clockFrequency);
422
423 if (step > (IFXPSI5_STEP_RANGE - 1))
424 {
425 step = IFXPSI5_STEP_RANGE - 1;
426 }
427 else
428 {
429 /* do nothing */
430 }
431
432 result = (uint32)(fInput / (IFXPSI5_STEP_RANGE - step));
433 break;
434
435 case IfxPsi5_DividerMode_fractional:
436 step = (uint64)((uint64)clockFrequency * IFXPSI5_STEP_RANGE) / fInput;
437
438 if (step > (IFXPSI5_STEP_RANGE - 1))
439 {
440 step = IFXPSI5_STEP_RANGE - 1;
441 }
442 else
443 {
444 /* do nothing */
445 }
446
447 result = (uint32)((uint64)((uint64)fInput * step)) / IFXPSI5_STEP_RANGE;
448 break;
449
450 case IfxPsi5_DividerMode_off:
451 default:
452 step = 0;
453 result = 0;
454 break;
455 }
456
457 if (result != 0)
458 {
459 switch (clockType)
460 {
461 case IfxPsi5_ClockType_fracDiv:
462 tempFDR.U = 0;
463 tempFDR.B.DM = divMode;
464 tempFDR.B.STEP = (uint32)step;
465 psi5->FDR.U = tempFDR.U;
466 break;
467
468 case IfxPsi5_ClockType_slowClock_125:
469 tempFDRL.U = 0;
470 tempFDRL.B.DM = divMode;
471 tempFDRL.B.STEP = (uint32)step;
472 psi5->FDRL.U = tempFDRL.U;
473 break;
474
475 case IfxPsi5_ClockType_fastClock_189:
476 tempFDRH.U = 0;
477 tempFDRH.B.DM = divMode;
478 tempFDRH.B.STEP = (uint32)step;
479 psi5->FDRH.U = tempFDRH.U;
480 break;
481
482 case IfxPsi5_ClockType_timeStamp:
483 tempFDRT.U = 0;
484 tempFDRT.B.DM = divMode;
485 tempFDRT.B.STEP = (uint32)step;
486 psi5->FDRT.U = tempFDRT.U;
487 break;
488 }
489 }
490
491 return result;
492 }
493
494
495 boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
496 {
497 if (channel->module->psi5->INTSTATA[channel->channelId].B.RDI == TRUE)
498 {
499 frame->rdm.lowWord = channel->channel->RDRL.U;
500 frame->rdm.highWord = channel->channel->RDRH.U;
501
502 channel->module->psi5->INTCLRA[channel->channelId].U |= (IFX_PSI5_INTCLRA_RDI_MSK << IFX_PSI5_INTCLRA_RDI_OFF) | (IFX_PSI5_INTCLRA_RSI_MSK << IFX_PSI5_INTCLRA_RSI_OFF);
503
504 return TRUE;
505 }
506 else
507 {
508 return FALSE;
509 }
510 }
511
512
513 boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
514 {
515 message->rds.value = channel->channel->SDS[slot].U;
516
517 return TRUE;
518 }
519
520
521 void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
522 {
523 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
524
525 IfxScuWdt_clearSafetyEndinit(passwd);
526 psi5->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
527 psi5->KRST0.B.RST = 1;
528
529 while (psi5->KRST0.B.RSTSTAT == 0)
530 {
531 /* Wait until reset is executed */
532 }
533
534 psi5->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
535 IfxScuWdt_setSafetyEndinit(passwd);
536 }
537
538
539 boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
540 {
541 uint32 dataLowWord = (uint32)(data & 0xFFFFFFFF);
542 uint32 dataHighWord = (uint32)((data >> 32) & 0xFFFFFFFF);
543 channel->channel->SDRL.U = dataLowWord;
544 channel->channel->SDRH.U = dataHighWord;
545
546 if (channel->module->psi5->INTSTATA[channel->channelId].B.TPOI)
547 {
548 return FALSE;
549 }
550 else
551 {
552 return TRUE;
553 }
554 }
IFXPSI5_ENABLE_CHANNELTRIGGER
#define IFXPSI5_ENABLE_CHANNELTRIGGER
Definition: IfxPsi5_cfg.h:51
IfxPsi5_Psi5_initModule
boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation.
Definition: IfxPsi5_Psi5.c:311
IfxPsi5_Psi5_Clock::type
IfxPsi5_ClockType type
Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)
Definition: IfxPsi5_Psi5.h:163
IfxPsi5_Psi5_ReceiveControl::baudrateSelect
IfxPsi5_BaudRate baudrateSelect
Specifies the baudrate selection.
Definition: IfxPsi5_Psi5.h:242
IfxPsi5_Psi5_PulseGeneration::delayLength
uint32 delayLength
Specifies the additional length of the pulse width for coding a &#39;1&#39;.
Definition: IfxPsi5_Psi5.h:207
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxPsi5_DividerMode_normal
divider mode is normal
Definition: IfxPsi5.h:119
IfxPsi5_Psi5_ReceiveControl::pulseTimestampSelect
IfxPsi5_TimestampRegister pulseTimestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5_Psi5.h:243
IfxPsi5_Trigger_0
trigger 0
Definition: IfxPsi5.h:190
IfxPsi5_Psi5_Rdm::highWord
uint32 highWord
Upper 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:220
IfxPsi5_Psi5_InputOutputControl::digitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth
Specifies the the number of port input samples considered for floating average.
Definition: IfxPsi5_Psi5.h:188
IfxPsi5_Psi5_ChannelConfig::pulseGeneration
IfxPsi5_Psi5_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5_Psi5.h:301
IfxPsi5_Psi5_resetModule
void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
Reset PSI5 kernel.
Definition: IfxPsi5_Psi5.c:521
IfxPsi5_Psi5_deInitModule
void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
Resets the PSI5 module.
Definition: IfxPsi5_Psi5.c:35
IfxPsi5_Psi5_Config::timestampCounterC
IfxPsi5_Psi5_TimeStampConfig timestampCounterC
Specifies the time stamp counter C properties.
Definition: IfxPsi5_Psi5.h:320
IfxPsi5_Psi5_sendChannelData
boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel.
Definition: IfxPsi5_Psi5.c:539
IfxPsi5_Psi5_TransmitControl::ssrPayloadLength
uint32 ssrPayloadLength
Specifies the payload length of SSR.
Definition: IfxPsi5_Psi5.h:266
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:74
IfxPsi5_Psi5_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5_Psi5.h:296
IfxPsi5_Psi5_ReceiveControl::messagingBitsPresence
IfxPsi5_MessagingBits messagingBitsPresence[IFXPSI5_NUM_SLOTS]
Specifies the presence or absence of messaging bits in the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:238
IfxPsi5_Psi5_Config::fracDiv
IfxPsi5_Psi5_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5_Psi5.h:314
IfxPsi5_Psi5_Config::timestampCounterB
IfxPsi5_Psi5_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5_Psi5.h:319
IfxPsi5_Psi5_Config::fastClock
IfxPsi5_Psi5_Clock fastClock
Specifies the faster f189 clock properties.
Definition: IfxPsi5_Psi5.h:316
IfxPsi5_Psi5_PinsConfig::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxPsi5_Psi5.h:280
IFXPSI5_DEFAULT_FASTCLOCK_FREQ
#define IFXPSI5_DEFAULT_FASTCLOCK_FREQ
Definition: IfxPsi5_cfg.h:57
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPsi5_BaudRate_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:70
IfxPsi5_Psi5_ReceiveControl::asynchronousModeSelected
boolean asynchronousModeSelected
Specifies the asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:234
IfxPsi5_Psi5_PinsConfig::in
IFX_CONST IfxPsi5_Rx_In * in
The RX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:276
IFXPSI5_STEP_RANGE
#define IFXPSI5_STEP_RANGE
Definition: IfxPsi5_cfg.h:45
IFXPSI5_NUM_WDTS
#define IFXPSI5_NUM_WDTS
Definition: IfxPsi5_cfg.h:47
IfxPsi5_Psi5_TransmitControl::crcGenerationEnabled
boolean crcGenerationEnabled
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5_Psi5.h:262
IfxPsi5_Psi5_TransmitControl::bitStuffingEnabled
boolean bitStuffingEnabled
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5_Psi5.h:261
IfxPsi5_Psi5_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit[IFXPSI5_NUM_WDTS]
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5_Psi5.h:299
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:116
IfxPsi5_Psi5_ReceiveControl::fifoWarningLevel
uint32 fifoWarningLevel
Specifies the fifo warning level.
Definition: IfxPsi5_Psi5.h:235
IfxPsi5_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5.h:136
IfxPsi5_CRCorParity_parity
parity selection
Definition: IfxPsi5.h:78
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:39
IfxPsi5_Psi5_ReceiveControl::verboseForAsynchronousMode
IfxPsi5_Verbose verboseForAsynchronousMode
Specifies the verbose mode selection in asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:237
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxPsi5_Psi5_Frame::rdm
IfxPsi5_Psi5_Rdm rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:327
IfxPsi5_Psi5_readChannelFrame
boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel.
Definition: IfxPsi5_Psi5.c:495
IfxPsi5_Psi5_InputOutputControl::outputInverterEnabled
boolean outputInverterEnabled
Specifies the pulse polarity of the output.
Definition: IfxPsi5_Psi5.h:186
IfxPsi5_Psi5_initChannel
boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5_Psi5.c:76
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxPsi5_Psi5_Channel
Channel handle data structure.
Definition: IfxPsi5_Psi5.h:287
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure.
Definition: IfxPsi5_Psi5.h:333
IfxPsi5_Psi5_initModuleConfig
void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration.
Definition: IfxPsi5_Psi5.c:364
IfxPsi5_Psi5_initChannelConfig
void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings)
Definition: IfxPsi5_Psi5.c:226
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxPsi5_Psi5.h
PSI5 PSI5 details.
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxPsi5_Psi5_readChannelSerialMessage
boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel.
Definition: IfxPsi5_Psi5.c:513
IfxPsi5_Psi5_Config::timestampClock
IfxPsi5_Psi5_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5_Psi5.h:317
IfxPsi5_Psi5_PulseGeneration::timeBaseSelect
IfxPsi5_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5_Psi5.h:208
IfxPsi5_Psi5_ChannelConfig::receiveControl
IfxPsi5_Psi5_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5_Psi5.h:303
IfxPsi5_Psi5_InputOutputControl::inputInverterEnabled
boolean inputInverterEnabled
Specifies the pulse polarity of the input.
Definition: IfxPsi5_Psi5.h:187
IfxPsi5_Psi5::psi5
Ifx_PSI5 * psi5
Specifies the pointer to the PSI5 module registers.
Definition: IfxPsi5_Psi5.h:146
IfxPsi5_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5.h:181
IfxPsi5_DividerMode_off
divider mode is off
Definition: IfxPsi5.h:121
IfxPsi5_Psi5_PinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:274
IfxPsi5_Psi5_PinsConfig::inMode
IfxPort_InputMode inMode
The pin input mode which should be configured.
Definition: IfxPsi5_Psi5.h:277
IfxPsi5_Psi5_ChannelConfig::channelTrigger
IfxPsi5_Psi5_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5_Psi5.h:302
IfxPsi5_DividerMode_spb
divider mode is off
Definition: IfxPsi5.h:118
IfxPsi5_TriggerType_external
External trigger.
Definition: IfxPsi5.h:203
IfxPsi5_Psi5_getFracDivClock
uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz.
Definition: IfxPsi5_Psi5.c:49
IfxPsi5_initTxPin
IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5.h:498
IfxPsi5_Psi5_ReceiveControl::receiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp
Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH...
Definition: IfxPsi5_Psi5.h:245
IfxPsi5_Psi5
PSI5 handle data structure.
Definition: IfxPsi5_Psi5.h:144
IfxPsi5_Psi5_PulseGeneration::periodicOrExternalOrBypass
IfxPsi5_TriggerType periodicOrExternalOrBypass
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5_Psi5.h:210
IfxPsi5_Psi5_ReceiveControl::verbose
IfxPsi5_Verbose verbose[IFXPSI5_NUM_SLOTS]
Specifies the verbose is enabled or disabled for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:241
IfxPsi5_Psi5_PulseGeneration::blankoutTime
uint32 blankoutTime
Specifies the duration of blank out period.
Definition: IfxPsi5_Psi5.h:212
IfxPsi5_Psi5_TransmitControl::sorPayloadLength
uint32 sorPayloadLength
Specifies the payload length of SOR.
Definition: IfxPsi5_Psi5.h:267
IfxPsi5_Psi5_PinsConfig::out
IFX_CONST IfxPsi5_Tx_Out * out
The TX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:278
IfxPsi5_FrameExpectation_notExpected
No frame is expected.
Definition: IfxPsi5.h:128
IfxPsi5_Psi5_TransmitControl::enhancedProtocolSelected
boolean enhancedProtocolSelected
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5_Psi5.h:260
IfxPsi5_Psi5_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5_Psi5.h:154
IfxPsi5_DigitalInputFilterDepth_0
Digital input filter depth is 0.
Definition: IfxPsi5.h:96
IfxPsi5_Psi5_Config::slowClock
IfxPsi5_Psi5_Clock slowClock
Specifies the slower f125 clock properties.
Definition: IfxPsi5_Psi5.h:315
IfxPsi5_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5.h:173
IfxPsi5_Psi5_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5_Psi5.h:265
IfxPsi5_Psi5_Clock
Clock configuration data structure.
Definition: IfxPsi5_Psi5.h:159
IfxPsi5_Psi5_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5_Psi5.h:161
IFXPSI5_ENABLE_CHANNEL
#define IFXPSI5_ENABLE_CHANNEL
Definition: IfxPsi5_cfg.h:53
IfxPsi5_Psi5_ReceiveControl::frameExpectation
IfxPsi5_FrameExpectation frameExpectation[IFXPSI5_NUM_SLOTS]
Specifies whether the frame is expected or not in the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:240
IfxPsi5_Psi5_Frame
Psi5 frame data union.
Definition: IfxPsi5_Psi5.h:325
IfxPsi5_ClockType_fastClock_189
Fast 189 kHz clock.
Definition: IfxPsi5.h:88
IfxPsi5_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5.h:202
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPsi5_initRxPin
IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5.h:485
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxPsi5_Psi5_TransmitControl::inhibitingAutomaticTransferEnabled
boolean inhibitingAutomaticTransferEnabled
Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not...
Definition: IfxPsi5_Psi5.h:264
IfxPsi5_Psi5_Rdm::lowWord
uint32 lowWord
Lower 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:219
IfxPsi5_Psi5_Channel::channel
Ifx_PSI5_CH * channel
Pointer to the channel registers.
Definition: IfxPsi5_Psi5.h:290
IfxPsi5_Psi5_ChannelConfig::channelId
IfxPsi5_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5_Psi5.h:300
IfxPsi5_Psi5_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5_Psi5.h:153
IfxPsi5_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5.h:120
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:84
IfxPsi5_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5.h:89
IfxPsi5_Psi5_Config
PSI5 module configuration structure.
Definition: IfxPsi5_Psi5.h:311
IfxPsi5_Psi5_ReceiveControl::crcOrParity
IfxPsi5_CRCorParity crcOrParity[IFXPSI5_NUM_SLOTS]
Specifies the crc or parity selection for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:239
IfxPsi5_Psi5_ChannelConfig::inputOutputControl
IfxPsi5_Psi5_InputOutputControl inputOutputControl
Specifies the configuration for input output control.
Definition: IfxPsi5_Psi5.h:305
IfxPsi5_Psi5_SerialMessage::rds
IfxPsi5_Psi5_Rds rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:335
IfxPsi5_Psi5_PulseGeneration::pulseLength
uint32 pulseLength
Specifies the standard pulse width without data coding for standard pulse width or for coding a &#39;0&#39;...
Definition: IfxPsi5_Psi5.h:206
IfxPsi5_Psi5_Rds::value
uint32 value
32 bit value of the Psi5 serial message
Definition: IfxPsi5_Psi5.h:227
IfxPsi5_Psi5_ChannelConfig::pinsConfig
IFX_CONST IfxPsi5_Psi5_PinsConfig * pinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:306
IfxPsi5_Psi5_ReceiveControl::frameTimestampSelect
IfxPsi5_TimestampRegister frameTimestampSelect
Specifies the timestamp register selection for start of frames.
Definition: IfxPsi5_Psi5.h:244
IfxPsi5_Psi5_Config::timestampCounterA
IfxPsi5_Psi5_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5_Psi5.h:318
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxPsi5_Psi5_ChannelConfig::sendControl
IfxPsi5_Psi5_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5_Psi5.h:304
IfxPsi5_Psi5_enableModule
void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
Enable PSI5 kernel.
Definition: IfxPsi5_Psi5.c:43
IfxPsi5_Psi5_Clock::mode
IfxPsi5_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5_Psi5.h:162
IfxPsi5_Psi5_PinsConfig::outMode
IfxPort_OutputMode outMode
The pin output mode which should be configured.
Definition: IfxPsi5_Psi5.h:279
IfxPsi5_Psi5_ReceiveControl::payloadLength
uint32 payloadLength[IFXPSI5_NUM_SLOTS]
Specifies the payload length for the slots 0 to 5.
Definition: IfxPsi5_Psi5.h:236
IfxPsi5_Psi5_PulseGeneration::externalTimeBaseSelect
IfxPsi5_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5_Psi5.h:209
IfxPsi5_ReceiveDataRegisterTimestamp_pulse
Pulse based timestamp SPTSC to be stored in RDRHC.
Definition: IfxPsi5.h:144
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:48
IfxPsi5_Verbose_off
Verbose mode is turned off.
Definition: IfxPsi5.h:211
IFXPSI5_DEFAULT_SLOWCLOCK_FREQ
#define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ
Definition: IfxPsi5_cfg.h:55
IFXPSI5_DEFAULT_TIMESTAMP_FREQ
#define IFXPSI5_DEFAULT_TIMESTAMP_FREQ
Definition: IfxPsi5_cfg.h:59
IfxPsi5_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5.h:86
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:150
IfxPsi5_Psi5_initializeClock
uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5_Psi5.c:390
IfxPsi5_ClockType_slowClock_125
Slow 125 kHz clock.
Definition: IfxPsi5.h:87
IfxPsi5_Psi5_Channel::module
IfxPsi5_Psi5 * module
The PSI5 handle structure.
Definition: IfxPsi5_Psi5.h:289
IfxPsi5_Psi5_ChannelConfig::module
IFX_CONST IfxPsi5_Psi5 * module
Specifies pointer to the IfxPsi5_Psi5 module handle.
Definition: IfxPsi5_Psi5.h:298
IfxPsi5_TriggerType_bypass
Bypassed trigger.
Definition: IfxPsi5.h:204
IfxPsi5_Psi5_TransmitControl::startSequenceGenerationEnabled
boolean startSequenceGenerationEnabled
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5_Psi5.h:263
IfxPsi5_Psi5_PulseGeneration::externalTriggerSelect
IfxPsi5_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5_Psi5.h:211


iLLD_TC26B: IfxPsi5_Psi5.h Source File

  • Psi5
  • Psi5
IfxPsi5_Psi5.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_Psi5.h
3 * \brief PSI5 PSI5 details
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Psi5_Psi5_Usage How to use the PSI5 PSI5 Interface driver?
25 * \ingroup IfxLld_Psi5
26 *
27 * PSI5 communicates with the external world via one input/output line for each channel.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework.
30 *
31 * \section IfxLld_Psi5_Psi5_Preparation Preparation
32 * \subsection IfxLld_Psi5_Psi5_Include Include Files
33 *
34 * Include following header file into your C code:
35 * \code
36 * #include <Psi5/Psi5/IfxPsi5_Psi5.h>
37 * \endcode
38 *
39 * \subsection IfxLld_Psi5_Psi5_Variables Variables
40 * //used globally
41 * \code
42 * IfxPsi5_Psi5_Channel psi5Channel[IFXPSI5_PINMAP_NUM_CHANNELS];
43 * \endcode
44 *
45 * \subsection IfxLld_Psi5_Psi5_Module Module Initialisation
46 * \code
47 * // create module config
48 * IfxPsi5_Psi5_Config psi5Config;
49 * IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
50 *
51 * // initialize module
52 * IfxPsi5_Psi5 psi5;
53 * IfxPsi5_Psi5_initModule(&psi5, &psi5Config);
54 * \endcode
55 *
56 * \subsection IfxLld_Psi5_Psi5_Channel Channel Initialisation
57 * \code
58 * // create channel config
59 * IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
60 * IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
61 *
62 * psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
63 * psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
64 * psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
65 * psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
66 * psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
67 * psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
68 * psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
69 *
70 * for(int slot=0; slot<6; ++slot) {
71 * psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
72 * if( slot == 0 )
73 * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_expected;
74 * else
75 * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_notExpected;
76 * }
77 *
78 * // initialize channels
79 * for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
80 * psi5ChannelConfig.channelId = (IfxPsi5_ChannelId)chn;
81 *
82 * // TODO: currently no IOCRx.ALTI config field
83 * unsigned alti = 0;
84 *
85 * IfxPsi5_Psi5_PinsConfig pinsConfig;
86 * for(int module=0;module<IFXPSI5_PINMAP_NUM_MODULES;module++)
87 * {
88 * pinsConfig.in = IfxPsi5_Rx_In_pinTable[module][chn][alti];
89 * pinsConfig.inMode = IfxPort_InputMode_pullUp;
90 * pinsConfig.out = IfxPsi5_Tx_Out_pinTable[module][chn][alti];
91 * }
92 * pinsConfig.outMode = IfxPort_OutputMode_pushPull;
93 * pinsConfig.pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
94 *
95 * psi5ChannelConfig.pinsConfig = &pinsConfig;
96 *
97 * IfxPsi5_Psi5_initChannel(&psi5Channel[chn], &psi5ChannelConfig);
98 * }
99 * \endcode
100 *
101 * \subsection IfxLld_Psi5_Psi5_readChannelFrame read channel frame
102 * \code
103 * for(int i=0; i<5; ++i) {
104 * for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
105 * IfxPsi5_Psi5_Frame frame;
106 *
107 * while( !IfxPsi5_Psi5_readChannelFrame(&psi5Channel[chn], &frame) );
108 *
109 * }
110 * }
111 * \endcode
112 *
113 * \defgroup IfxLld_Psi5_Psi5 PSI5
114 * \ingroup IfxLld_Psi5
115 * \defgroup IfxLld_Psi5_Psi5_Structures Data Structures
116 * \ingroup IfxLld_Psi5_Psi5
117 * \defgroup IfxLld_Psi5_Psi5_Module Module Initialisation functions
118 * \ingroup IfxLld_Psi5_Psi5
119 * \defgroup IfxLld_Psi5_Psi5_Channel Channel functions
120 * \ingroup IfxLld_Psi5_Psi5
121 * \defgroup IfxLld_Psi5_Psi5_Clock Clock Intialisation functions
122 * \ingroup IfxLld_Psi5_Psi5
123 */
124
125 #ifndef IFXPSI5_PSI5_H
126 #define IFXPSI5_PSI5_H 1
127
128 /******************************************************************************/
129 /*----------------------------------Includes----------------------------------*/
130 /******************************************************************************/
131
132 #include "Psi5/Std/IfxPsi5.h"
133 #include "Scu/Std/IfxScuCcu.h"
134 #include "IfxPsi5_bf.h"
135
136 /******************************************************************************/
137 /*-----------------------------Data Structures--------------------------------*/
138 /******************************************************************************/
139
140 /** \addtogroup IfxLld_Psi5_Psi5_Structures
141 * \{ */
142 /** \brief PSI5 handle data structure
143 */
144 typedef struct
145 {
146 Ifx_PSI5 *psi5; /**< \brief Specifies the pointer to the PSI5 module registers */
147 } IfxPsi5_Psi5;
148
149 /** \brief channel trigger configuration structure
150 */
151 typedef struct
152 {
153 uint32 channelTriggerValue; /**< \brief Specifies the channel trigger value CTV */
154 uint32 channelTriggerCounter; /**< \brief Specifies the channel trigger counter */
155 } IfxPsi5_Psi5_ChannelTrigger;
156
157 /** \brief Clock configuration data structure
158 */
159 typedef struct
160 {
161 uint32 frequency; /**< \brief Specifies the frequency for the clock */
162 IfxPsi5_DividerMode mode; /**< \brief Specifies the mode of division for the clock */
163 IfxPsi5_ClockType type; /**< \brief Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp) */
164 } IfxPsi5_Psi5_Clock;
165
166 /** \brief Psi5 frame data structure with individual members
167 */
168 typedef struct
169 {
170 uint8 crcError : 1; /**< \brief Crc error flag */
171 uint8 crc : 3; /**< \brief Received crc */
172 uint32 readData : 28; /**< \brief Received data */
173 uint32 timestamp : 24; /**< \brief Timestamp */
174 uint8 slotCounter : 3; /**< \brief Slot counter */
175 uint8 timeslotError : 1; /**< \brief Time slot error flag */
176 uint8 numberOfBitsError : 1; /**< \brief Number of bits error flag */
177 uint8 messagingBitsError : 1; /**< \brief Messaging bits error flag */
178 uint8 noFrameReceivedError : 1; /**< \brief No frame received flag */
179 uint8 receiveMemoryOverflowError : 1; /**< \brief Receive buffer overflow error flag */
180 } IfxPsi5_Psi5_FrameData;
181
182 /** \brief Input output configuration structure
183 */
184 typedef struct
185 {
186 boolean outputInverterEnabled; /**< \brief Specifies the pulse polarity of the output */
187 boolean inputInverterEnabled; /**< \brief Specifies the pulse polarity of the input */
188 IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth; /**< \brief Specifies the the number of port input samples considered for floating average */
189 } IfxPsi5_Psi5_InputOutputControl;
190
191 /** \brief Psi5 serial message with individual members
192 */
193 typedef struct
194 {
195 uint16 serialData : 16; /**< \brief Serial message data */
196 uint8 messageId : 8; /**< \brief Serial message Id */
197 uint8 crc : 6; /**< \brief Serial message crc */
198 uint8 serialMessageCRCFailedError : 1; /**< \brief Serial message crc error flag */
199 uint8 configuration : 1; /**< \brief Serial message configuration */
200 } IfxPsi5_Psi5_Message;
201
202 /** \brief Sync pulse generation configuration structure
203 */
204 typedef struct
205 {
206 uint32 pulseLength; /**< \brief Specifies the standard pulse width without data coding for standard pulse width or for coding a '0' */
207 uint32 delayLength; /**< \brief Specifies the additional length of the pulse width for coding a '1' */
208 IfxPsi5_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTV as internal or external */
209 IfxPsi5_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock source for CTV in the case of external */
210 IfxPsi5_TriggerType periodicOrExternalOrBypass; /**< \brief Specifies whether periodic trigger or external trigger or bypass is selected */
211 IfxPsi5_Trigger externalTriggerSelect; /**< \brief Specifies the trigger source in case of external triggerring */
212 uint32 blankoutTime; /**< \brief Specifies the duration of blank out period */
213 } IfxPsi5_Psi5_PulseGeneration;
214
215 /** \brief Psi5 frame in double word format
216 */
217 typedef struct
218 {
219 uint32 lowWord; /**< \brief Lower 32 bits of the Psi5 frame */
220 uint32 highWord; /**< \brief Upper 32 bits of the Psi5 frame */
221 } IfxPsi5_Psi5_Rdm;
222
223 /** \brief Psi5 serial message as unsigned 32 bit value
224 */
225 typedef struct
226 {
227 uint32 value; /**< \brief 32 bit value of the Psi5 serial message */
228 } IfxPsi5_Psi5_Rds;
229
230 /** \brief Receive control configuration structure
231 */
232 typedef struct
233 {
234 boolean asynchronousModeSelected; /**< \brief Specifies the asynchronous mode of operation */
235 uint32 fifoWarningLevel; /**< \brief Specifies the fifo warning level */
236 uint32 payloadLength[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the payload length for the slots 0 to 5 */
237 IfxPsi5_Verbose verboseForAsynchronousMode; /**< \brief Specifies the verbose mode selection in asynchronous mode of operation */
238 IfxPsi5_MessagingBits messagingBitsPresence[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the presence or absence of messaging bits in the slots 0 to 5 */
239 IfxPsi5_CRCorParity crcOrParity[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the crc or parity selection for the slots 0 to 5 */
240 IfxPsi5_FrameExpectation frameExpectation[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies whether the frame is expected or not in the slots 0 to 5 */
241 IfxPsi5_Verbose verbose[IFXPSI5_NUM_SLOTS]; /**< \brief Specifies the verbose is enabled or disabled for the slots 0 to 5 */
242 IfxPsi5_BaudRate baudrateSelect; /**< \brief Specifies the baudrate selection */
243 IfxPsi5_TimestampRegister pulseTimestampSelect; /**< \brief Specifies the timestamp register selection for pulses */
244 IfxPsi5_TimestampRegister frameTimestampSelect; /**< \brief Specifies the timestamp register selection for start of frames */
245 IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp; /**< \brief Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH */
246 } IfxPsi5_Psi5_ReceiveControl;
247
248 /** \brief Timestamp configuration data structure
249 */
250 typedef struct
251 {
252 IfxPsi5_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock base for counter CTS in the case of external */
253 IfxPsi5_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTS as internal or external */
254 } IfxPsi5_Psi5_TimeStampConfig;
255
256 /** \brief Transmit control configuration structure
257 */
258 typedef struct
259 {
260 boolean enhancedProtocolSelected; /**< \brief Specifies whether the enhanced protocol is selected or not */
261 boolean bitStuffingEnabled; /**< \brief Specifies whether the bit stuffing is turned on or not */
262 boolean crcGenerationEnabled; /**< \brief Specifies whether the crc generation is turned on or not */
263 boolean startSequenceGenerationEnabled; /**< \brief Specifies whether the start sequence generation is turned on or not */
264 boolean inhibitingAutomaticTransferEnabled; /**< \brief Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not */
265 uint32 payloadLength; /**< \brief Specifies the payload length to be sent */
266 uint32 ssrPayloadLength; /**< \brief Specifies the payload length of SSR */
267 uint32 sorPayloadLength; /**< \brief Specifies the payload length of SOR */
268 } IfxPsi5_Psi5_TransmitControl;
269
270 /** \} */
271
272 /** \brief Pin Configuration structure
273 */
274 typedef struct
275 {
276 IFX_CONST IfxPsi5_Rx_In *in; /**< \brief The RX Pin which should be configured */
277 IfxPort_InputMode inMode; /**< \brief The pin input mode which should be configured */
278 IFX_CONST IfxPsi5_Tx_Out *out; /**< \brief The TX Pin which should be configured */
279 IfxPort_OutputMode outMode; /**< \brief The pin output mode which should be configured */
280 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
281 } IfxPsi5_Psi5_PinsConfig;
282
283 /** \addtogroup IfxLld_Psi5_Psi5_Structures
284 * \{ */
285 /** \brief Channel handle data structure
286 */
287 typedef struct
288 {
289 IfxPsi5_Psi5 *module; /**< \brief The PSI5 handle structure */
290 Ifx_PSI5_CH *channel; /**< \brief Pointer to the channel registers */
291 IfxPsi5_ChannelId channelId; /**< \brief Specifies the channel index */
292 } IfxPsi5_Psi5_Channel;
293
294 /** \brief Channel configuration structure
295 */
296 typedef struct
297 {
298 IFX_CONST IfxPsi5_Psi5 *module; /**< \brief Specifies pointer to the IfxPsi5_Psi5 module handle */
299 uint32 watchdogTimerLimit[IFXPSI5_NUM_WDTS]; /**< \brief Specifies the watchdog timer limit for each of the slots 0 to 6 */
300 IfxPsi5_ChannelId channelId; /**< \brief Specifies the channel index */
301 IfxPsi5_Psi5_PulseGeneration pulseGeneration; /**< \brief Specifies the configuration for sync pulse generation */
302 IfxPsi5_Psi5_ChannelTrigger channelTrigger; /**< \brief Specifies the configuration for channel trigger */
303 IfxPsi5_Psi5_ReceiveControl receiveControl; /**< \brief Specifies the configuration for reception */
304 IfxPsi5_Psi5_TransmitControl sendControl; /**< \brief Specifies the configuration for transmission */
305 IfxPsi5_Psi5_InputOutputControl inputOutputControl; /**< \brief Specifies the configuration for input output control */
306 IFX_CONST IfxPsi5_Psi5_PinsConfig *pinsConfig; /**< \brief Pin Configuration structure */
307 } IfxPsi5_Psi5_ChannelConfig;
308
309 /** \brief PSI5 module configuration structure
310 */
311 typedef struct
312 {
313 Ifx_PSI5 *psi5; /**< \brief Specifies the pointer to the PSI5 module registers */
314 IfxPsi5_Psi5_Clock fracDiv; /**< \brief Specifies fractionally divided clock properties */
315 IfxPsi5_Psi5_Clock slowClock; /**< \brief Specifies the slower f125 clock properties */
316 IfxPsi5_Psi5_Clock fastClock; /**< \brief Specifies the faster f189 clock properties */
317 IfxPsi5_Psi5_Clock timestampClock; /**< \brief Specifies the time stamp clock properties */
318 IfxPsi5_Psi5_TimeStampConfig timestampCounterA; /**< \brief Specifies the time stamp counter A properties */
319 IfxPsi5_Psi5_TimeStampConfig timestampCounterB; /**< \brief Specifies the time stamp counter B properties */
320 IfxPsi5_Psi5_TimeStampConfig timestampCounterC; /**< \brief Specifies the time stamp counter C properties */
321 } IfxPsi5_Psi5_Config;
322
323 /** \brief Psi5 frame data union
324 */
325 typedef union
326 {
327 IfxPsi5_Psi5_Rdm rdm; /**< \brief Psi5 frame in double word format */
328 IfxPsi5_Psi5_FrameData frame; /**< \brief Psi5 frame data structure with individual members */
329 } IfxPsi5_Psi5_Frame;
330
331 /** \brief Psi5 serial message data structure
332 */
333 typedef union
334 {
335 IfxPsi5_Psi5_Rds rds; /**< \brief Psi5 serial message as unsigned 32 bit value */
336 IfxPsi5_Psi5_Message message; /**< \brief Psi5 serial message with individual members */
337 } IfxPsi5_Psi5_SerialMessage;
338
339 /** \brief startup related options TBD
340 */
341 typedef struct
342 {
343 uint8 a : 1; /**< \brief TBD */
344 uint32 b : 31; /**< \brief TBD */
345 } IfxPsi5_Psi5_StartupOptions;
346
347 /** \} */
348
349 /** \addtogroup IfxLld_Psi5_Psi5_Module
350 * \{ */
351
352 /******************************************************************************/
353 /*-------------------------Global Function Prototypes-------------------------*/
354 /******************************************************************************/
355
356 /** \brief Resets the PSI5 module
357 * \param psi5 pointer to the PSI5 module
358 * \return None
359 */
360 IFX_EXTERN void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5);
361
362 /** \brief Enable PSI5 kernel
363 * \param psi5 pointer to the base of PSI5 registers
364 * \return None
365 */
366 IFX_EXTERN void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5);
367
368 /** \brief Initialise the PSI5 with the supplied configureation
369 * \param psi5 pointer to the PSI5 module
370 * \param config pointer to the PSI5 configuration
371 * \return return TRUE on success & FALSE if configuration not valid
372 *
373 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
374 *
375 */
376 IFX_EXTERN boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config);
377
378 /** \brief Initialise buffer with default PSI5 configuration
379 * \param config pointer to the PSI5 module configuration
380 * \param psi5 base address of the PSI5 register space
381 * \return None
382 *
383 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
384 *
385 */
386 IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5);
387
388 /** \brief Reset PSI5 kernel
389 * \param psi5 pointer to the base of PSI5 registers
390 * \return None
391 */
392 IFX_EXTERN void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5);
393
394 /** \} */
395
396 /** \addtogroup IfxLld_Psi5_Psi5_Channel
397 * \{ */
398
399 /******************************************************************************/
400 /*-------------------------Inline Function Prototypes-------------------------*/
401 /******************************************************************************/
402
403 /** \brief start the channel with the selected options
404 * \param channel pointer to the PSI5 channel
405 * \param options startup related options
406 * \return TRUE if successful; FALSE otherwise
407 *
408 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
409 *
410 */
411 IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options);
412
413 /******************************************************************************/
414 /*-------------------------Global Function Prototypes-------------------------*/
415 /******************************************************************************/
416
417 /** \brief Initialize the channel with the supplied configuration
418 * \param channel pointer to the PSI5 channel
419 * \param config pointer to the PSI5 channel configuration
420 * \return TRUE on success & FALSE if configuration not valid
421 *
422 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
423 *
424 */
425 IFX_EXTERN boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config);
426
427 /** \brief Get the current channel configuration (e.g. sample settings)
428 * \param config pointer to the PSI5 channel configuration
429 * \param psi5 pointer to the PSI5 module
430 * \return None
431 *
432 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
433 *
434 */
435 IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5);
436
437 /** \brief Gets the received psi5 frame for the channel
438 * \param channel pointer to the PSI5 channel
439 * \param frame pointer to the PSI5 frame buffer
440 * \return TRUE if successful; FALSE if no frame available
441 *
442 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
443 *
444 */
445 IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame);
446
447 /** \brief Get the received serial message for the channel
448 * \param channel pointer to the PSI5 channel
449 * \param slot Slot Id
450 * \param message pointer to the PSI5 serial message buffer
451 * \return TRUE if successful; FALSE if no serial message available
452 */
453 IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message);
454
455 /** \brief Transmit the data through the channel
456 * \param channel pointer to the PSI5 channel
457 * \param data data to be sent
458 * \return TRUE if successful; FALSE otherwise
459 *
460 * A coding example can be found in \ref IfxLld_Psi5_Psi5_Usage
461 *
462 */
463 IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data);
464
465 /** \} */
466
467 /** \addtogroup IfxLld_Psi5_Psi5_Clock
468 * \{ */
469
470 /******************************************************************************/
471 /*-------------------------Global Function Prototypes-------------------------*/
472 /******************************************************************************/
473
474 /** \brief Returns the configured fracDiv psi5 clock frequency in Hz.
475 * \param psi5 Pointer to the base of PSI5 registers
476 * \return Returns the configured fracDiv psi5 clock frequency in Hz.
477 */
478 IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5);
479
480 /** \brief Configure the fracDiv clock.
481 * \param psi5 Pointer to the base of PSI5 registers
482 * \param clock Specifies the required clock frequency in Hz.
483 * \return Returns the configured clock frequency in Hz.
484 */
485 IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock);
486
487 /** \} */
488
489 /******************************************************************************/
490 /*---------------------Inline Function Implementations------------------------*/
491 /******************************************************************************/
492
493 IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
494 {
495 IFX_UNUSED_PARAMETER(channel);
496 IFX_UNUSED_PARAMETER(options);
497 return TRUE;
498 }
499
500
501 #endif /* IFXPSI5_PSI5_H */
IfxPsi5_Psi5_initModule
IFX_EXTERN boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
Initialise the PSI5 with the supplied configureation.
Definition: IfxPsi5_Psi5.c:311
IfxPsi5_Psi5_Clock::type
IfxPsi5_ClockType type
Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp)
Definition: IfxPsi5_Psi5.h:163
IfxPsi5_Psi5_FrameData::messagingBitsError
uint8 messagingBitsError
Messaging bits error flag.
Definition: IfxPsi5_Psi5.h:177
IfxPsi5_Psi5_ReceiveControl::baudrateSelect
IfxPsi5_BaudRate baudrateSelect
Specifies the baudrate selection.
Definition: IfxPsi5_Psi5.h:242
IfxPsi5_Psi5_PulseGeneration::delayLength
uint32 delayLength
Specifies the additional length of the pulse width for coding a &#39;1&#39;.
Definition: IfxPsi5_Psi5.h:207
IfxPsi5_Psi5_ReceiveControl::pulseTimestampSelect
IfxPsi5_TimestampRegister pulseTimestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5_Psi5.h:243
IfxPsi5_Psi5_Rdm::highWord
uint32 highWord
Upper 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:220
IfxPsi5_Psi5_InputOutputControl::digitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth
Specifies the the number of port input samples considered for floating average.
Definition: IfxPsi5_Psi5.h:188
IfxPsi5_Psi5_ChannelConfig::pulseGeneration
IfxPsi5_Psi5_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5_Psi5.h:301
IfxPsi5_Psi5_resetModule
IFX_EXTERN void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
Reset PSI5 kernel.
Definition: IfxPsi5_Psi5.c:521
IfxPsi5_Psi5_deInitModule
IFX_EXTERN void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
Resets the PSI5 module.
Definition: IfxPsi5_Psi5.c:35
IfxPsi5_Psi5_Config::timestampCounterC
IfxPsi5_Psi5_TimeStampConfig timestampCounterC
Specifies the time stamp counter C properties.
Definition: IfxPsi5_Psi5.h:320
IfxPsi5_Psi5_sendChannelData
IFX_EXTERN boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
Transmit the data through the channel.
Definition: IfxPsi5_Psi5.c:539
IfxPsi5_Psi5_TransmitControl::ssrPayloadLength
uint32 ssrPayloadLength
Specifies the payload length of SSR.
Definition: IfxPsi5_Psi5.h:266
IfxPsi5_Psi5_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5_Psi5.h:296
IfxPsi5_Psi5_Config::fracDiv
IfxPsi5_Psi5_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5_Psi5.h:314
IfxPsi5_Psi5_Message::serialMessageCRCFailedError
uint8 serialMessageCRCFailedError
Serial message crc error flag.
Definition: IfxPsi5_Psi5.h:198
IfxPsi5_Psi5_InputOutputControl
Input output configuration structure.
Definition: IfxPsi5_Psi5.h:184
IfxPsi5_Psi5_Config::timestampCounterB
IfxPsi5_Psi5_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5_Psi5.h:319
IfxPsi5_Psi5_Config::fastClock
IfxPsi5_Psi5_Clock fastClock
Specifies the faster f189 clock properties.
Definition: IfxPsi5_Psi5.h:316
IfxPsi5_Psi5_PinsConfig::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxPsi5_Psi5.h:280
IfxPsi5_Psi5_Message
Psi5 serial message with individual members.
Definition: IfxPsi5_Psi5.h:193
IfxPsi5_Psi5_FrameData::numberOfBitsError
uint8 numberOfBitsError
Number of bits error flag.
Definition: IfxPsi5_Psi5.h:176
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxPsi5_Psi5_FrameData::timestamp
uint32 timestamp
Timestamp.
Definition: IfxPsi5_Psi5.h:173
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPsi5_Psi5_ReceiveControl::asynchronousModeSelected
boolean asynchronousModeSelected
Specifies the asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:234
IfxPsi5_Psi5_PinsConfig::in
IFX_CONST IfxPsi5_Rx_In * in
The RX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:276
IfxPsi5_TimeBase
IfxPsi5_TimeBase
MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base.
Definition: IfxPsi5.h:171
IFXPSI5_NUM_WDTS
#define IFXPSI5_NUM_WDTS
Definition: IfxPsi5_cfg.h:47
IfxPsi5_TimestampRegister
IfxPsi5_TimestampRegister
MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type...
Definition: IfxPsi5.h:179
IfxPsi5_Psi5_TransmitControl::crcGenerationEnabled
boolean crcGenerationEnabled
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5_Psi5.h:262
IfxPsi5_Psi5_TransmitControl::bitStuffingEnabled
boolean bitStuffingEnabled
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5_Psi5.h:261
IfxPsi5_DividerMode
IfxPsi5_DividerMode
MODULE_PSI5.FDR.DM,Divider mode.
Definition: IfxPsi5.h:116
IfxPsi5_Psi5_ReceiveControl::fifoWarningLevel
uint32 fifoWarningLevel
Specifies the fifo warning level.
Definition: IfxPsi5_Psi5.h:235
IfxPsi5_Rx_In
RX pin mapping structure.
Definition: IfxPsi5_PinMap.h:39
IfxPsi5_ReceiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp
MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers.
Definition: IfxPsi5.h:142
IfxPsi5_Psi5_ReceiveControl::verboseForAsynchronousMode
IfxPsi5_Verbose verboseForAsynchronousMode
Specifies the verbose mode selection in asynchronous mode of operation.
Definition: IfxPsi5_Psi5.h:237
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxPsi5_Psi5_Frame::rdm
IfxPsi5_Psi5_Rdm rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:327
IfxPsi5_Psi5_readChannelFrame
IFX_EXTERN boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
Gets the received psi5 frame for the channel.
Definition: IfxPsi5_Psi5.c:495
IfxPsi5_Psi5_InputOutputControl::outputInverterEnabled
boolean outputInverterEnabled
Specifies the pulse polarity of the output.
Definition: IfxPsi5_Psi5.h:186
IfxPsi5_Psi5_initChannel
IFX_EXTERN boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5_Psi5.c:76
IfxPsi5_Psi5_Channel
Channel handle data structure.
Definition: IfxPsi5_Psi5.h:287
IfxPsi5_Psi5_Message::serialData
uint16 serialData
Serial message data.
Definition: IfxPsi5_Psi5.h:195
IfxPsi5_Psi5_SerialMessage
Psi5 serial message data structure.
Definition: IfxPsi5_Psi5.h:333
IfxPsi5_Psi5_ReceiveControl
Receive control configuration structure.
Definition: IfxPsi5_Psi5.h:232
IfxPsi5_Psi5_initModuleConfig
IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
Initialise buffer with default PSI5 configuration.
Definition: IfxPsi5_Psi5.c:364
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxPsi5_DigitalInputFilterDepth
IfxPsi5_DigitalInputFilterDepth
MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth.
Definition: IfxPsi5.h:94
IfxPsi5_Psi5_initChannelConfig
IFX_EXTERN void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
Get the current channel configuration (e.g. sample settings)
Definition: IfxPsi5_Psi5.c:226
IfxPsi5_Psi5_FrameData::timeslotError
uint8 timeslotError
Time slot error flag.
Definition: IfxPsi5_Psi5.h:175
IfxPsi5_Psi5_readChannelSerialMessage
IFX_EXTERN boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
Get the received serial message for the channel.
Definition: IfxPsi5_Psi5.c:513
IfxPsi5_Psi5_Config::timestampClock
IfxPsi5_Psi5_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5_Psi5.h:317
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPsi5_Psi5_PulseGeneration::timeBaseSelect
IfxPsi5_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5_Psi5.h:208
IfxPsi5_Psi5_ChannelConfig::receiveControl
IfxPsi5_Psi5_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5_Psi5.h:303
IfxPsi5_Psi5_InputOutputControl::inputInverterEnabled
boolean inputInverterEnabled
Specifies the pulse polarity of the input.
Definition: IfxPsi5_Psi5.h:187
IfxPsi5_Psi5::psi5
Ifx_PSI5 * psi5
Specifies the pointer to the PSI5 module registers.
Definition: IfxPsi5_Psi5.h:146
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxPsi5_Psi5_PinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:274
IfxPsi5_Psi5_PinsConfig::inMode
IfxPort_InputMode inMode
The pin input mode which should be configured.
Definition: IfxPsi5_Psi5.h:277
IfxPsi5_Psi5_ChannelConfig::channelTrigger
IfxPsi5_Psi5_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5_Psi5.h:302
IfxPsi5_Psi5_FrameData::readData
uint32 readData
Received data.
Definition: IfxPsi5_Psi5.h:172
IfxPsi5_Psi5_getFracDivClock
IFX_EXTERN uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
Returns the configured fracDiv psi5 clock frequency in Hz.
Definition: IfxPsi5_Psi5.c:49
IfxPsi5_Psi5_FrameData::crcError
uint8 crcError
Crc error flag.
Definition: IfxPsi5_Psi5.h:170
IfxPsi5_Psi5_ReceiveControl::receiveDataRegisterTimestamp
IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp
Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH...
Definition: IfxPsi5_Psi5.h:245
IfxPsi5_Psi5
PSI5 handle data structure.
Definition: IfxPsi5_Psi5.h:144
IfxPsi5_Psi5_PulseGeneration::periodicOrExternalOrBypass
IfxPsi5_TriggerType periodicOrExternalOrBypass
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5_Psi5.h:210
IfxPsi5_Psi5_PulseGeneration::blankoutTime
uint32 blankoutTime
Specifies the duration of blank out period.
Definition: IfxPsi5_Psi5.h:212
IfxPsi5_Psi5_TransmitControl::sorPayloadLength
uint32 sorPayloadLength
Specifies the payload length of SOR.
Definition: IfxPsi5_Psi5.h:267
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:71
IfxPsi5_Psi5_PinsConfig::out
IFX_CONST IfxPsi5_Tx_Out * out
The TX Pin which should be configured.
Definition: IfxPsi5_Psi5.h:278
IfxPsi5_Trigger
IfxPsi5_Trigger
MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id.
Definition: IfxPsi5.h:188
IfxPsi5_CRCorParity
IfxPsi5_CRCorParity
MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection.
Definition: IfxPsi5.h:76
IfxPsi5_Psi5_TransmitControl::enhancedProtocolSelected
boolean enhancedProtocolSelected
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5_Psi5.h:260
IfxPsi5.h
PSI5 basic functionality.
IfxPsi5_Psi5_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5_Psi5.h:154
IfxPsi5_Psi5_Message::configuration
uint8 configuration
Serial message configuration.
Definition: IfxPsi5_Psi5.h:199
IfxPsi5_Psi5_startupChannel
IFX_INLINE boolean IfxPsi5_Psi5_startupChannel(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_StartupOptions *options)
start the channel with the selected options
Definition: IfxPsi5_Psi5.h:493
IfxPsi5_Psi5_Config::slowClock
IfxPsi5_Psi5_Clock slowClock
Specifies the slower f125 clock properties.
Definition: IfxPsi5_Psi5.h:315
IfxPsi5_Verbose
IfxPsi5_Verbose
MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode.
Definition: IfxPsi5.h:209
IfxPsi5_Psi5_StartupOptions
startup related options TBD
Definition: IfxPsi5_Psi5.h:341
IfxPsi5_Psi5_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5_Psi5.h:265
IfxPsi5_Psi5_FrameData::slotCounter
uint8 slotCounter
Slot counter.
Definition: IfxPsi5_Psi5.h:174
IfxPsi5_Psi5_Clock
Clock configuration data structure.
Definition: IfxPsi5_Psi5.h:159
IfxPsi5_Psi5_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5_Psi5.h:161
IfxPsi5_Psi5_PulseGeneration
Sync pulse generation configuration structure.
Definition: IfxPsi5_Psi5.h:204
IfxPsi5_Psi5_ChannelTrigger
channel trigger configuration structure
Definition: IfxPsi5_Psi5.h:151
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxPsi5_Psi5_FrameData::crc
uint8 crc
Received crc.
Definition: IfxPsi5_Psi5.h:171
IFXPSI5_NUM_SLOTS
#define IFXPSI5_NUM_SLOTS
Definition: IfxPsi5_cfg.h:49
IfxPsi5_Psi5_FrameData::noFrameReceivedError
uint8 noFrameReceivedError
No frame received flag.
Definition: IfxPsi5_Psi5.h:178
IfxPsi5_Psi5_Frame
Psi5 frame data union.
Definition: IfxPsi5_Psi5.h:325
IfxPsi5_Psi5_TimeStampConfig
Timestamp configuration data structure.
Definition: IfxPsi5_Psi5.h:250
IfxPsi5_Psi5_TransmitControl
Transmit control configuration structure.
Definition: IfxPsi5_Psi5.h:258
IfxPsi5_FrameExpectation
IfxPsi5_FrameExpectation
MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control.
Definition: IfxPsi5.h:126
IfxPsi5_Psi5_FrameData::receiveMemoryOverflowError
uint8 receiveMemoryOverflowError
Receive buffer overflow error flag.
Definition: IfxPsi5_Psi5.h:179
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPsi5_Psi5_TransmitControl::inhibitingAutomaticTransferEnabled
boolean inhibitingAutomaticTransferEnabled
Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not...
Definition: IfxPsi5_Psi5.h:264
IfxPsi5_Psi5_Rdm::lowWord
uint32 lowWord
Lower 32 bits of the Psi5 frame.
Definition: IfxPsi5_Psi5.h:219
IfxPsi5_Psi5_Channel::channel
Ifx_PSI5_CH * channel
Pointer to the channel registers.
Definition: IfxPsi5_Psi5.h:290
IfxPsi5_MessagingBits
IfxPsi5_MessagingBits
MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence.
Definition: IfxPsi5.h:134
IfxPsi5_Psi5_Rdm
Psi5 frame in double word format.
Definition: IfxPsi5_Psi5.h:217
IfxPsi5_Psi5_Rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:225
IfxPsi5_Psi5_Channel::channelId
IfxPsi5_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5_Psi5.h:291
IfxScuCcu.h
SCU basic functionality.
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxPsi5_Psi5_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5_Psi5.h:153
IfxPsi5_ClockType
IfxPsi5_ClockType
Clock type.
Definition: IfxPsi5.h:84
IfxPsi5_Psi5_Config
PSI5 module configuration structure.
Definition: IfxPsi5_Psi5.h:311
IfxPsi5_Psi5_ChannelConfig::inputOutputControl
IfxPsi5_Psi5_InputOutputControl inputOutputControl
Specifies the configuration for input output control.
Definition: IfxPsi5_Psi5.h:305
IfxPsi5_Psi5_SerialMessage::rds
IfxPsi5_Psi5_Rds rds
Psi5 serial message as unsigned 32 bit value.
Definition: IfxPsi5_Psi5.h:335
IfxPsi5_Psi5_PulseGeneration::pulseLength
uint32 pulseLength
Specifies the standard pulse width without data coding for standard pulse width or for coding a &#39;0&#39;...
Definition: IfxPsi5_Psi5.h:206
IfxPsi5_Psi5_Rds::value
uint32 value
32 bit value of the Psi5 serial message
Definition: IfxPsi5_Psi5.h:227
IfxPsi5_Psi5_SerialMessage::message
IfxPsi5_Psi5_Message message
Psi5 serial message with individual members.
Definition: IfxPsi5_Psi5.h:336
IfxPsi5_Psi5_ChannelConfig::pinsConfig
IFX_CONST IfxPsi5_Psi5_PinsConfig * pinsConfig
Pin Configuration structure.
Definition: IfxPsi5_Psi5.h:306
IfxPsi5_TriggerType
IfxPsi5_TriggerType
Trigger type.
Definition: IfxPsi5.h:200
IfxPsi5_BaudRate
IfxPsi5_BaudRate
MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection.
Definition: IfxPsi5.h:68
IfxPsi5_Psi5_ReceiveControl::frameTimestampSelect
IfxPsi5_TimestampRegister frameTimestampSelect
Specifies the timestamp register selection for start of frames.
Definition: IfxPsi5_Psi5.h:244
IfxPsi5_Psi5_Config::timestampCounterA
IfxPsi5_Psi5_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5_Psi5.h:318
IfxPsi5_Psi5_ChannelConfig::sendControl
IfxPsi5_Psi5_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5_Psi5.h:304
IfxPsi5_Psi5_enableModule
IFX_EXTERN void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
Enable PSI5 kernel.
Definition: IfxPsi5_Psi5.c:43
IfxPsi5_Psi5_Message::messageId
uint8 messageId
Serial message Id.
Definition: IfxPsi5_Psi5.h:196
IfxPsi5_Psi5_Clock::mode
IfxPsi5_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5_Psi5.h:162
IfxPsi5_Psi5_PinsConfig::outMode
IfxPort_OutputMode outMode
The pin output mode which should be configured.
Definition: IfxPsi5_Psi5.h:279
IfxPsi5_Psi5_StartupOptions::a
uint8 a
TBD.
Definition: IfxPsi5_Psi5.h:343
IfxPsi5_Psi5_PulseGeneration::externalTimeBaseSelect
IfxPsi5_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5_Psi5.h:209
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxPsi5_Psi5_StartupOptions::b
uint32 b
TBD.
Definition: IfxPsi5_Psi5.h:344
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxPsi5_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5_PinMap.h:48
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxPsi5_Slot
IfxPsi5_Slot
MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id.
Definition: IfxPsi5.h:150
IfxPsi5_Psi5_initializeClock
IFX_EXTERN uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5_Psi5.c:390
IfxPsi5_Psi5_Channel::module
IfxPsi5_Psi5 * module
The PSI5 handle structure.
Definition: IfxPsi5_Psi5.h:289
IfxPsi5_Psi5_Frame::frame
IfxPsi5_Psi5_FrameData frame
Psi5 frame data structure with individual members.
Definition: IfxPsi5_Psi5.h:328
IfxPsi5_Psi5_ChannelConfig::module
IFX_CONST IfxPsi5_Psi5 * module
Specifies pointer to the IfxPsi5_Psi5 module handle.
Definition: IfxPsi5_Psi5.h:298
IfxPsi5_Psi5_TransmitControl::startSequenceGenerationEnabled
boolean startSequenceGenerationEnabled
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5_Psi5.h:263
IfxPsi5_Psi5_FrameData
Psi5 frame data structure with individual members.
Definition: IfxPsi5_Psi5.h:168
IfxPsi5_Psi5_PulseGeneration::externalTriggerSelect
IfxPsi5_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5_Psi5.h:211


iLLD_TC26B: IfxPsi5_cfg.c Source File

  • _Impl
IfxPsi5_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_cfg.c
3 * \brief PSI5 on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxPsi5_cfg.h"
IfxPsi5_cfg.h
PSI5 on-chip implementation data.


iLLD_TC26B: IfxPsi5_cfg.h Source File

  • _Impl
IfxPsi5_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5_cfg.h
3 * \brief PSI5 on-chip implementation data
4 * \ingroup IfxLld_Psi5
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Psi5 PSI5
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Psi5_Impl Implementation
27 * \ingroup IfxLld_Psi5
28 * \defgroup IfxLld_Psi5_Std Standard Driver
29 * \ingroup IfxLld_Psi5
30 * \defgroup IfxLld_Psi5_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Psi5_Impl
32 */
33
34 #ifndef IFXPSI5_CFG_H
35 #define IFXPSI5_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 /******************************************************************************/
42 /*-----------------------------------Macros-----------------------------------*/
43 /******************************************************************************/
44
45 #define IFXPSI5_STEP_RANGE 1024
46
47 #define IFXPSI5_NUM_WDTS 7
48
49 #define IFXPSI5_NUM_SLOTS 6
50
51 #define IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)
52
53 #define IFXPSI5_ENABLE_CHANNEL (1 << 16)
54
55 #define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000
56
57 #define IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000
58
59 #define IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000
60
61 #define IFXPSI5_NUM_CHANNELS 3
62
63 #define IFXPSI5_NUM_MODULES (1)
64
65 /******************************************************************************/
66 /*-------------------------------Enumerations---------------------------------*/
67 /******************************************************************************/
68
69 /** \brief Channel Id
70 */
71 typedef enum
72 {
73 IfxPsi5_ChannelId_none = -1, /**< \brief None of the Ifx_PSI5 Channels */
74 IfxPsi5_ChannelId_0 = 0, /**< \brief Specifies PSI5 channel 0 */
75 IfxPsi5_ChannelId_1 = 1, /**< \brief Specifies PSI5 channel 1 */
76 IfxPsi5_ChannelId_2 = 2 /**< \brief Specifies PSI5 channel 2 */
77 } IfxPsi5_ChannelId;
78
79 #endif /* IFXPSI5_CFG_H */
IfxPsi5_ChannelId_0
Specifies PSI5 channel 0.
Definition: IfxPsi5_cfg.h:74
IfxPsi5_ChannelId_2
Specifies PSI5 channel 2.
Definition: IfxPsi5_cfg.h:76
IfxPsi5_ChannelId
IfxPsi5_ChannelId
Channel Id.
Definition: IfxPsi5_cfg.h:71
IfxPsi5_ChannelId_none
None of the Ifx_PSI5 Channels.
Definition: IfxPsi5_cfg.h:73
IfxPsi5_ChannelId_1
Specifies PSI5 channel 1.
Definition: IfxPsi5_cfg.h:75


iLLD_TC26B: IfxPsi5s.c Source File

  • Psi5s
  • Std
IfxPsi5s.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s.c
3 * \brief PSI5S basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxPsi5s.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
36 {
37 psi5s->WHBCON.B.CLRREN = 1;
38 }
39
40
41 void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
42 {
43 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
44 IfxScuWdt_clearCpuEndinit(passwd);
45 psi5s->CLC.B.DISR = 1;
46 IfxScuWdt_setCpuEndinit(passwd);
47 }
48
49
50 void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
51 {
52 psi5s->WHBCON.B.SETREN = 1;
53 }
54
55
56 void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
57 {
58 uint32 enableChannels = ((((psi5s->GCR.U >> IFX_PSI5S_GCR_ETC0_OFF) & ~mask) | channels) << IFX_PSI5S_GCR_ETC0_OFF);
59
60 psi5s->GCR.U = (psi5s->GCR.U & ~(IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK)) | enableChannels;
61 }
62
63
64 void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
65 {
66 uint32 enableChannels = ((((psi5s->GCR.U >> IFX_PSI5S_GCR_CEN0_OFF) & ~mask) | channels) << IFX_PSI5S_GCR_CEN0_OFF);
67
68 psi5s->GCR.U = (psi5s->GCR.U & ~(IFXPSI5S_GCR_CHANNELS_ENABLE_MASK)) | enableChannels;
69 }
70
71
72 boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
73 {
74 return psi5s->INTSTAT[channelId].B.RDI;
75 }
76
77
78 boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
79 {
80 return psi5s->INTSTAT[channelId].B.RSI;
81 }
82
83
84 void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
85 {
86 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
87
88 IfxScuWdt_clearCpuEndinit(passwd);
89 psi5s->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
90 psi5s->KRST1.B.RST = 1;
91 IfxScuWdt_setCpuEndinit(passwd);
92
93 while (0 == psi5s->KRST0.B.RSTSTAT) /* Wait until reset is executed */
94
95 {}
96
97 IfxScuWdt_clearCpuEndinit(passwd);
98 psi5s->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
99 IfxScuWdt_setCpuEndinit(passwd);
100 }
101
102
103 void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
104 {
105 psi5s->CON.B.R = 1;
106 }
107
108
109 void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
110 {
111 psi5s->CON.B.R = 0;
112 }
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:97
IfxPsi5s.h
PSI5S basic functionality.
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPsi5s_disableModule
void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
Disable PSI5S kernel.
Definition: IfxPsi5s.c:41
IfxPsi5s_enableAscReceiver
void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:50
IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK
#define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK
Definition: IfxPsi5s_cfg.h:65
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IFXPSI5S_GCR_CHANNELS_ENABLE_MASK
#define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK
//0x00FF0000
Definition: IfxPsi5s_cfg.h:63
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxPsi5s_getSuccessfullyReceivedFrameStatus
boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame.
Definition: IfxPsi5s.c:78
IfxPsi5s_startAscTransactions
void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:103
IfxPsi5s_getReadFrameStatus
boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:72
IfxPsi5s_disableAscReceiver
void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
Asc receiver is disabled.
Definition: IfxPsi5s.c:35
IfxPsi5s_stopAscTransactions
void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
Definition: IfxPsi5s.c:109
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPsi5s_resetModule
void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
resets PSI5S kernel
Definition: IfxPsi5s.c:84
IfxPsi5s_enableDisableChannelTriggerCounters
void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:56
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxPsi5s_enableDisableChannels
void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:64


iLLD_TC26B: IfxPsi5s.h Source File

  • Psi5s
  • Std
IfxPsi5s.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s.h
3 * \brief PSI5S basic functionality
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Psi5s_Std_Enumerations Enumerations
25 * \ingroup IfxLld_Psi5s_Std
26 * \defgroup IfxLld_Psi5s_Std_Channel Channel Operative Functions
27 * \ingroup IfxLld_Psi5s_Std
28 * \defgroup IfxLld_Psi5s_Std_IO IO Pin Configuration Functions
29 * \ingroup IfxLld_Psi5s_Std
30 * \defgroup IfxLld_Psi5s_Std_Interrupt Interrupt configuration functions
31 * \ingroup IfxLld_Psi5s_Std
32 * \defgroup IfxLld_Psi5s_Std_Module Module Functions
33 * \ingroup IfxLld_Psi5s_Std
34 */
35
36 #ifndef IFXPSI5S_H
37 #define IFXPSI5S_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "_Impl/IfxPsi5s_cfg.h"
44 #include "_PinMap/IfxPsi5s_PinMap.h"
45 #include "Cpu/Std/IfxCpu_Intrinsics.h"
46 #include "IfxPsi5s_bf.h"
47 #include "IfxPsi5s_reg.h"
48 #include "Src/Std/IfxSrc.h"
49 #include "Scu/Std/IfxScuCcu.h"
50
51 /******************************************************************************/
52 /*--------------------------------Enumerations--------------------------------*/
53 /******************************************************************************/
54
55 /** \addtogroup IfxLld_Psi5s_Std_Enumerations
56 * \{ */
57 /** \brief MODULE_PSI5S.IOCR.ALTI:Alternate input
58 */
59 typedef enum
60 {
61 IfxPsi5s_AlternateInput_0 = 0, /**< \brief Alternate Input 0 */
62 IfxPsi5s_AlternateInput_1, /**< \brief Alternate Input 1 */
63 IfxPsi5s_AlternateInput_2, /**< \brief Alternate Input 2 */
64 IfxPsi5s_AlternateInput_3 /**< \brief Alternate Input 3 */
65 } IfxPsi5s_AlternateInput;
66
67 /** \brief MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select
68 */
69 typedef enum
70 {
71 IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0, /**< \brief Divide by 2 is selected for baudrate timer prescalar */
72 IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1 /**< \brief Divide by 3 is selected for baudrate timer prescalar */
73 } IfxPsi5s_AscBaudratePrescalar;
74
75 /** \brief MODULE_PSI5S.CON.M:ASC mode of operation
76 */
77 typedef enum
78 {
79 IfxPsi5s_AscMode_sync = 0, /**< \brief Synchronous mode */
80 IfxPsi5s_AscMode_async_8bitData = 1, /**< \brief Asynchronous mode with 8 bit data */
81 IfxPsi5s_AscMode_async_7bitDataWithParity = 3, /**< \brief Asynchronous mode with 7 bit data with parity */
82 IfxPsi5s_AscMode_async_9bitData = 4, /**< \brief Asynchronous mode with 9 bit data */
83 IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5, /**< \brief Asynchronous mode with 8 bit data with wakeup */
84 IfxPsi5s_AscMode_async_8bitDataWithParity = 7 /**< \brief Asynchronous mode with 8 bit data with parity */
85 } IfxPsi5s_AscMode;
86
87 /** \brief MODULE_PSI5S.CON.STP: Number of stop bits
88 */
89 typedef enum
90 {
91 IfxPsi5s_AscStopBits_1 = 0, /**< \brief 1 stop bit */
92 IfxPsi5s_AscStopBits_2 /**< \brief 2 stop bit */
93 } IfxPsi5s_AscStopBits;
94
95 /** \brief PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
96 */
97 typedef enum
98 {
99 IfxPsi5s_ChannelId_0 = 0, /**< \brief Ifx_PSI5S Channel 0 */
100 IfxPsi5s_ChannelId_1, /**< \brief Ifx_PSI5S Channel 1 */
101 IfxPsi5s_ChannelId_2, /**< \brief Ifx_PSI5S Channel 2 */
102 IfxPsi5s_ChannelId_3, /**< \brief Ifx_PSI5S Channel 3 */
103 IfxPsi5s_ChannelId_4, /**< \brief Ifx_PSI5S Channel 4 */
104 IfxPsi5s_ChannelId_5, /**< \brief Ifx_PSI5S Channel 5 */
105 IfxPsi5s_ChannelId_6, /**< \brief Ifx_PSI5S Channel 6 */
106 IfxPsi5s_ChannelId_7, /**< \brief Ifx_PSI5S Channel 7 */
107 IfxPsi5s_ChannelId_none = -1 /**< \brief None of the Ifx_PSI5S Channels */
108 } IfxPsi5s_ChannelId;
109
110 /** \brief Clock Selection
111 */
112 typedef enum
113 {
114 IfxPsi5s_ClockType_fracDiv = 0, /**< \brief Fractional Divide clock */
115 IfxPsi5s_ClockType_timeStamp = 1, /**< \brief Timestamp clock */
116 IfxPsi5s_ClockType_ascFracDiv = 2, /**< \brief Asc Fractional divider clock */
117 IfxPsi5s_ClockType_ascOutput = 3 /**< \brief Asc output clock */
118 } IfxPsi5s_ClockType;
119
120 /** \brief MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity
121 */
122 typedef enum
123 {
124 IfxPsi5s_CrcOrParity_parity = 0, /**< \brief parity selection */
125 IfxPsi5s_CrcOrParity_crc = 1 /**< \brief CRC selection */
126 } IfxPsi5s_CrcOrParity;
127
128 /** \brief MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode
129 */
130 typedef enum
131 {
132 IfxPsi5s_DividerMode_spb = 0, /**< \brief divider mode is off */
133 IfxPsi5s_DividerMode_normal = 1, /**< \brief divider mode is normal */
134 IfxPsi5s_DividerMode_fractional = 2, /**< \brief divider mode is fractional */
135 IfxPsi5s_DividerMode_off = 3 /**< \brief divider mode is off */
136 } IfxPsi5s_DividerMode;
137
138 /** \brief MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types
139 */
140 typedef enum
141 {
142 IfxPsi5s_EnhancedProtocol_toothGapMethod = 0, /**< \brief toothGapMethod Enhanced protocol type */
143 IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1, /**< \brief pulseWidth_frameFormat_1to3 Enhanced protocol type */
144 IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3 /**< \brief pulseWidth_frameFormat_4 Enhanced protocol type */
145 } IfxPsi5s_EnhancedProtocol;
146
147 /** \brief MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation
148 */
149 typedef enum
150 {
151 IfxPsi5s_FrameId_frameHeader = 0, /**< \brief Frame ID is updated from packet frame header (Sync mode) */
152 IfxPsi5s_FrameId_rollingNumber = 1 /**< \brief Frame ID is a rolling number 0 .. 5 copied from FCNT */
153 } IfxPsi5s_FrameId;
154
155 /** \brief MODULE_PSI5S.GCR.IDT:Idle time bit count
156 */
157 typedef enum
158 {
159 IfxPsi5s_IdleTime_1 = 0, /**< \brief 1 bit Idle time */
160 IfxPsi5s_IdleTime_2, /**< \brief 2 bit Idle time */
161 IfxPsi5s_IdleTime_3, /**< \brief 3 bit Idle time */
162 IfxPsi5s_IdleTime_4, /**< \brief 4 bit Idle time */
163 IfxPsi5s_IdleTime_5, /**< \brief 5 bit Idle time */
164 IfxPsi5s_IdleTime_6, /**< \brief 6 bit Idle time */
165 IfxPsi5s_IdleTime_7, /**< \brief 7 bit Idle time */
166 IfxPsi5s_IdleTime_8, /**< \brief 8 bit Idle time */
167 IfxPsi5s_IdleTime_9, /**< \brief 9 bit Idle time */
168 IfxPsi5s_IdleTime_10, /**< \brief 10 bit Idle time */
169 IfxPsi5s_IdleTime_11, /**< \brief 11 bit Idle time */
170 IfxPsi5s_IdleTime_12, /**< \brief 12 bit Idle time */
171 IfxPsi5s_IdleTime_13, /**< \brief 13 bit Idle time */
172 IfxPsi5s_IdleTime_14, /**< \brief 14 bit Idle time */
173 IfxPsi5s_IdleTime_15, /**< \brief 15 bit Idle time */
174 IfxPsi5s_IdleTime_16 /**< \brief 16 bit Idle time */
175 } IfxPsi5s_IdleTime;
176
177 /** \brief Enable/Disable Loop back Mode
178 */
179 typedef enum
180 {
181 IfxPsi5s_LoopBackMode_disable = 0, /**< \brief loop-back mode disabled */
182 IfxPsi5s_LoopBackMode_enable = 1 /**< \brief loop-back mode enabled */
183 } IfxPsi5s_LoopBackMode;
184
185 /** \brief Messaging bits presence
186 */
187 typedef enum
188 {
189 IfxPsi5s_MessagingBits_absent = 0, /**< \brief No messaging bits */
190 IfxPsi5s_MessagingBits_present = 1 /**< \brief 2 messaging bits */
191 } IfxPsi5s_MessagingBits;
192
193 /** \brief MODULE_PSI5S.NFC.NFx:Expected Psi5s frames
194 */
195 typedef enum
196 {
197 IfxPsi5s_NumberExpectedFrames_1 = 1, /**< \brief 1 psi5s frame expected */
198 IfxPsi5s_NumberExpectedFrames_2, /**< \brief 2 psi5s frame expected */
199 IfxPsi5s_NumberExpectedFrames_3, /**< \brief 3 psi5s frame expected */
200 IfxPsi5s_NumberExpectedFrames_4, /**< \brief 4 psi5s frame expected */
201 IfxPsi5s_NumberExpectedFrames_5, /**< \brief 5 psi5s frame expected */
202 IfxPsi5s_NumberExpectedFrames_6 /**< \brief 6 psi5s frame expected */
203 } IfxPsi5s_NumberExpectedFrames;
204
205 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
206 * Definition in Ifx_PSI5S.CLC.B.EDIS
207 */
208 typedef enum
209 {
210 IfxPsi5s_SleepMode_enable = 0, /**< \brief enables sleep mode */
211 IfxPsi5s_SleepMode_disable = 1 /**< \brief disables sleep mode */
212 } IfxPsi5s_SleepMode;
213
214 /** \brief OCDS Suspend Control (OCDS.SUS)
215 */
216 typedef enum
217 {
218 IfxPsi5s_SuspendMode_none = 0, /**< \brief No suspend */
219 IfxPsi5s_SuspendMode_hard = 1, /**< \brief Hard Suspend */
220 IfxPsi5s_SuspendMode_soft = 2 /**< \brief Soft Suspend */
221 } IfxPsi5s_SuspendMode;
222
223 /** \brief MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base
224 */
225 typedef enum
226 {
227 IfxPsi5s_TimeBase_internal = 0, /**< \brief Internal time stamp clock */
228 IfxPsi5s_TimeBase_external = 1 /**< \brief External GTM inputs */
229 } IfxPsi5s_TimeBase;
230
231 /** \brief MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register
232 */
233 typedef enum
234 {
235 IfxPsi5s_TimestampRegister_a = 0, /**< \brief Timestamp register A */
236 IfxPsi5s_TimestampRegister_b = 1 /**< \brief Timestamp register B */
237 } IfxPsi5s_TimestampRegister;
238
239 /** \brief MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger
240 */
241 typedef enum
242 {
243 IfxPsi5s_TimestampTrigger_syncPulse = 0, /**< \brief Timestamp trigger on sync pulse */
244 IfxPsi5s_TimestampTrigger_frame = 1 /**< \brief Timestamp trigger on any frame */
245 } IfxPsi5s_TimestampTrigger;
246
247 /** \brief MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id
248 */
249 typedef enum
250 {
251 IfxPsi5s_Trigger_0 = 0, /**< \brief Trigger 0 */
252 IfxPsi5s_Trigger_1, /**< \brief Trigger 1 */
253 IfxPsi5s_Trigger_2, /**< \brief Trigger 2 */
254 IfxPsi5s_Trigger_3, /**< \brief Trigger 3 */
255 IfxPsi5s_Trigger_4, /**< \brief Trigger 4 */
256 IfxPsi5s_Trigger_5, /**< \brief Trigger 5 */
257 IfxPsi5s_Trigger_6, /**< \brief Trigger 6 */
258 IfxPsi5s_Trigger_7 /**< \brief Trigger 7 */
259 } IfxPsi5s_Trigger;
260
261 /** \brief Trigger type defined in
262 */
263 typedef enum
264 {
265 IfxPsi5s_TriggerType_periodic = 0, /**< \brief Periodic trigger */
266 IfxPsi5s_TriggerType_external = 1 /**< \brief External trigger */
267 } IfxPsi5s_TriggerType;
268
269 /** \brief MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count
270 */
271 typedef enum
272 {
273 IfxPsi5s_UartFrameCount_3 = 0, /**< \brief 3 UART frames */
274 IfxPsi5s_UartFrameCount_4, /**< \brief 4 UART frames */
275 IfxPsi5s_UartFrameCount_5, /**< \brief 5 UART frames */
276 IfxPsi5s_UartFrameCount_6 /**< \brief 6 UART frames */
277 } IfxPsi5s_UartFrameCount;
278
279 /** \brief MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode
280 */
281 typedef enum
282 {
283 IfxPsi5s_WatchdogTimerMode_frame = 0, /**< \brief Watch Dog Timer is restarted on reception of each recoverable frame (async mode) */
284 IfxPsi5s_WatchdogTimerMode_syncPulse = 1 /**< \brief Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in NFC.NFx.(sync mode) */
285 } IfxPsi5s_WatchdogTimerMode;
286
287 /** \} */
288
289 /** \addtogroup IfxLld_Psi5s_Std_Channel
290 * \{ */
291
292 /******************************************************************************/
293 /*-------------------------Global Function Prototypes-------------------------*/
294 /******************************************************************************/
295
296 /** \brief Asc receiver is disabled
297 * \param psi5s Pointer to PSI5S module registers
298 * \return None
299 */
300 IFX_EXTERN void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s);
301
302 /** \brief Enable ASC receiver
303 * \param psi5s pointer to the PSI5S register space
304 * \return None
305 */
306 IFX_EXTERN void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s);
307
308 /** \brief Enable/disable any combination of channel trigger counters selected by mask parameter
309 * \param psi5s pointer to the PSI5S register space
310 * \param channels specifies the channel trigger counters which should be enabled/disabled
311 * \param mask specifies the channel trigger counters which should be modified
312 * \return None
313 */
314 IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask);
315
316 /** \brief Enable/disable any combination of channels selected by mask parameter
317 * \param psi5s pointer to the PSI5S register space
318 * \param channels specifies the channels which should be enabled/disabled
319 * \param mask specifies the channels which should be modified
320 * \return None
321 */
322 IFX_EXTERN void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask);
323
324 /** \brief Start ASC transactions
325 * \param psi5s pointer to the PSI5S register space
326 * \return None
327 */
328 IFX_EXTERN void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s);
329
330 /**
331 * \param psi5s Pointer to PSI5S module registers
332 * \return None
333 */
334 IFX_EXTERN void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s);
335
336 /** \} */
337
338 /** \addtogroup IfxLld_Psi5s_Std_IO
339 * \{ */
340
341 /******************************************************************************/
342 /*-------------------------Inline Function Prototypes-------------------------*/
343 /******************************************************************************/
344
345 /** \brief Initializes a CLK output
346 * \param clk the CLK Pin which should be configured
347 * \param outputMode the pin output mode which should be configured
348 * \param padDriver the pad driver mode which should be configured
349 * \return None
350 */
351 IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
352
353 /** \brief Initializes a RX input
354 * \param rx the RX Pin which should be configured
355 * \param inputMode the pin input mode which should be configured
356 * \param padDriver the pad driver mode which should be configured
357 * \return None
358 */
359 IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
360
361 /** \brief Initializes a TX output
362 * \param tx the TX Pin which should be configured
363 * \param outputMode the pin output mode which should be configured
364 * \param padDriver the pad driver mode which should be configured
365 * \return None
366 */
367 IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
368
369 /** \brief Selects the alternate input for Rx signal
370 * \param psi5s pointer to PSI5S registers
371 * \param alti alternate input selection of Rx signal
372 * \return None
373 */
374 IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti);
375
376 /** \} */
377
378 /** \addtogroup IfxLld_Psi5s_Std_Module
379 * \{ */
380
381 /******************************************************************************/
382 /*-------------------------Inline Function Prototypes-------------------------*/
383 /******************************************************************************/
384
385 /** \brief Returns the module's suspend state.
386 * TRUE :if module is suspended.
387 * FALSE:if module is not yet suspended.
388 * \param psi5s Pointer to PSI5S module registers
389 * \return Suspend status (TRUE / FALSE)
390 */
391 IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s);
392
393 /** \brief enable / disable sleep mode
394 * \param psi5s Pointer to PSI5S register
395 * \param mode sleep mode (enable/disable)
396 * \return None
397 */
398 IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode);
399
400 /** \brief Configure the Module to Hard/Soft suspend mode.
401 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
402 * \param psi5s Pointer to PSI5S module registers
403 * \param mode Module suspend mode
404 * \return None
405 */
406 IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode);
407
408 /******************************************************************************/
409 /*-------------------------Global Function Prototypes-------------------------*/
410 /******************************************************************************/
411
412 /** \brief Disable PSI5S kernel
413 * \param psi5s pointer to the base of PSI5S register space
414 * \return None
415 */
416 IFX_EXTERN void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s);
417
418 /** \brief Get the received psi5s frame for the channel
419 * \param psi5s Pointer to PSI5S Module
420 * \param channelId channel ID
421 * \return Frame Status
422 */
423 IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId);
424
425 /** \brief Indicates the successful reception of a frame.
426 * \param psi5s Pointer to PSI5S module registers
427 * \param channelId Channel Number
428 */
429 IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId);
430
431 /** \brief resets PSI5S kernel
432 * \param psi5s pointer to PSI5S registers
433 * \return None
434 */
435 IFX_EXTERN void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s);
436
437 /** \} */
438
439 /******************************************************************************/
440 /*---------------------Inline Function Implementations------------------------*/
441 /******************************************************************************/
442
443 IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
444 {
445 if (clk->pin.port != NULL_PTR)
446 {
447 IfxPort_setPinModeOutput(clk->pin.port, clk->pin.pinIndex, outputMode, clk->select);
448 IfxPort_setPinPadDriver(clk->pin.port, clk->pin.pinIndex, padDriver);
449 }
450 }
451
452
453 IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
454 {
455 if (rx->pin.port != NULL_PTR)
456 {
457 IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
458 IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
459 IfxPsi5s_setRxInput(rx->module, (IfxPsi5s_AlternateInput)rx->select);
460 }
461 }
462
463
464 IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
465 {
466 if (tx->pin.port != NULL_PTR)
467 {
468 IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
469 IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
470 }
471 }
472
473
474 IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s)
475 {
476 Ifx_PSI5S_OCS ocs;
477
478 // read the status
479 ocs.U = psi5s->OCS.U;
480
481 // return the status
482 return ocs.B.SUSSTA;
483 }
484
485
486 IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
487 {
488 psi5s->IOCR.B.ALTI = alti;
489 }
490
491
492 IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
493 {
494 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
495 IfxScuWdt_clearCpuEndinit(passwd);
496 psi5s->CLC.B.EDIS = mode;
497 IfxScuWdt_setCpuEndinit(passwd);
498 }
499
500
501 IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
502 {
503 Ifx_PSI5S_OCS ocs;
504
505 // remove protection and configure the suspend mode.
506 ocs.B.SUS_P = 1;
507 ocs.B.SUS = mode;
508 psi5s->OCS.U = ocs.U;
509 }
510
511
512 #endif /* IFXPSI5S_H */
IfxPsi5s_IdleTime_9
9 bit Idle time
Definition: IfxPsi5s.h:167
IfxPsi5s_IdleTime_1
1 bit Idle time
Definition: IfxPsi5s.h:159
IfxPsi5s_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5s.h:114
IfxPsi5s_WatchdogTimerMode
IfxPsi5s_WatchdogTimerMode
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.
Definition: IfxPsi5s.h:281
IfxPsi5s_UartFrameCount_4
4 UART frames
Definition: IfxPsi5s.h:274
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:97
IfxPsi5s_FrameId_frameHeader
Frame ID is updated from packet frame header (Sync mode)
Definition: IfxPsi5s.h:151
IfxPsi5s_ChannelId_3
Ifx_PSI5S Channel 3.
Definition: IfxPsi5s.h:102
IfxPsi5s_AscBaudratePrescalar_divideBy3
Divide by 3 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:72
IfxPsi5s_UartFrameCount_6
6 UART frames
Definition: IfxPsi5s.h:276
IfxPsi5s_Trigger_6
Trigger 6.
Definition: IfxPsi5s.h:257
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4
pulseWidth_frameFormat_4 Enhanced protocol type
Definition: IfxPsi5s.h:144
IfxPsi5s_CrcOrParity_crc
CRC selection.
Definition: IfxPsi5s.h:125
IfxPsi5s_AscBaudratePrescalar
IfxPsi5s_AscBaudratePrescalar
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.
Definition: IfxPsi5s.h:69
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:39
IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
IfxPsi5s_EnhancedProtocol
IfxPsi5s_EnhancedProtocol
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.
Definition: IfxPsi5s.h:140
IfxPsi5s_setSuspendMode
IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxPsi5s.h:501
IfxPsi5s_ChannelId_4
Ifx_PSI5S Channel 4.
Definition: IfxPsi5s.h:103
IfxPsi5s_Rx_In::module
Ifx_PSI5S * module
Base address.
Definition: IfxPsi5s_PinMap.h:41
IfxPsi5s_AscMode_async_8bitData
Asynchronous mode with 8 bit data.
Definition: IfxPsi5s.h:80
IfxPsi5s_TimestampTrigger
IfxPsi5s_TimestampTrigger
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.
Definition: IfxPsi5s.h:241
IfxPsi5s_TimestampRegister_b
Timestamp register B.
Definition: IfxPsi5s.h:236
IfxPsi5s_TimestampRegister
IfxPsi5s_TimestampRegister
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.
Definition: IfxPsi5s.h:233
IfxPsi5s_AscMode_async_9bitData
Asynchronous mode with 9 bit data.
Definition: IfxPsi5s.h:82
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:130
IfxPsi5s_MessagingBits_absent
No messaging bits.
Definition: IfxPsi5s.h:189
IfxPsi5s_NumberExpectedFrames_4
4 psi5s frame expected
Definition: IfxPsi5s.h:200
IfxPsi5s_IdleTime_11
11 bit Idle time
Definition: IfxPsi5s.h:169
IfxPsi5s_AscStopBits_1
1 stop bit
Definition: IfxPsi5s.h:91
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPsi5s_disableModule
IFX_EXTERN void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
Disable PSI5S kernel.
Definition: IfxPsi5s.c:41
IfxPsi5s_NumberExpectedFrames_5
5 psi5s frame expected
Definition: IfxPsi5s.h:201
IfxPsi5s_DividerMode_normal
divider mode is normal
Definition: IfxPsi5s.h:133
IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3
pulseWidth_frameFormat_1to3 Enhanced protocol type
Definition: IfxPsi5s.h:143
IfxPsi5s_setSleepMode
IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
enable / disable sleep mode
Definition: IfxPsi5s.h:492
IfxPsi5s_IdleTime
IfxPsi5s_IdleTime
MODULE_PSI5S.GCR.IDT:Idle time bit count.
Definition: IfxPsi5s.h:157
IfxPsi5s_enableAscReceiver
IFX_EXTERN void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:50
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxPsi5s_initTxPin
IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5s.h:464
IfxPsi5s_ChannelId_none
None of the Ifx_PSI5S Channels.
Definition: IfxPsi5s.h:107
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxPsi5s_ClockType_ascFracDiv
Asc Fractional divider clock.
Definition: IfxPsi5s.h:116
IfxPsi5s_NumberExpectedFrames
IfxPsi5s_NumberExpectedFrames
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.
Definition: IfxPsi5s.h:195
IfxPsi5s_EnhancedProtocol_toothGapMethod
toothGapMethod Enhanced protocol type
Definition: IfxPsi5s.h:142
IfxPsi5s_AscMode_sync
Synchronous mode.
Definition: IfxPsi5s.h:79
IfxSrc.h
SRC basic functionality.
IfxPsi5s_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5s.h:235
IfxPsi5s_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5s_PinMap.h:43
IfxCpu_Intrinsics.h
IfxPsi5s_AlternateInput_2
Alternate Input 2.
Definition: IfxPsi5s.h:63
IfxPsi5s_AscMode_async_7bitDataWithParity
Asynchronous mode with 7 bit data with parity.
Definition: IfxPsi5s.h:81
IfxPsi5s_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5s.h:115
IfxPsi5s_PinMap.h
PSI5S I/O map.
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxPsi5s_Clk_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5s_PinMap.h:58
IfxPsi5s_IdleTime_7
7 bit Idle time
Definition: IfxPsi5s.h:165
IfxPsi5s_Trigger_3
Trigger 3.
Definition: IfxPsi5s.h:254
IfxPsi5s_NumberExpectedFrames_6
6 psi5s frame expected
Definition: IfxPsi5s.h:202
IfxPsi5s_AlternateInput_0
Alternate Input 0.
Definition: IfxPsi5s.h:61
IfxPsi5s_CrcOrParity_parity
parity selection
Definition: IfxPsi5s.h:124
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxPsi5s_IdleTime_8
8 bit Idle time
Definition: IfxPsi5s.h:166
IfxPsi5s_NumberExpectedFrames_2
2 psi5s frame expected
Definition: IfxPsi5s.h:198
IfxPsi5s_ChannelId_7
Ifx_PSI5S Channel 7.
Definition: IfxPsi5s.h:106
IfxPsi5s_AlternateInput_3
Alternate Input 3.
Definition: IfxPsi5s.h:64
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxPsi5s_LoopBackMode_enable
loop-back mode enabled
Definition: IfxPsi5s.h:182
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPsi5s_MessagingBits
IfxPsi5s_MessagingBits
Messaging bits presence.
Definition: IfxPsi5s.h:187
IfxPsi5s_IdleTime_3
3 bit Idle time
Definition: IfxPsi5s.h:161
IfxPsi5s_TimeBase_external
External GTM inputs.
Definition: IfxPsi5s.h:228
IfxPsi5s_LoopBackMode
IfxPsi5s_LoopBackMode
Enable/Disable Loop back Mode.
Definition: IfxPsi5s.h:179
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxPsi5s_TriggerType
IfxPsi5s_TriggerType
Trigger type defined in.
Definition: IfxPsi5s.h:263
IfxPsi5s_FrameId
IfxPsi5s_FrameId
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.
Definition: IfxPsi5s.h:149
IfxPsi5s_SuspendMode
IfxPsi5s_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxPsi5s.h:216
IfxPsi5s_getSuccessfullyReceivedFrameStatus
IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Indicates the successful reception of a frame.
Definition: IfxPsi5s.c:78
IfxPsi5s_Trigger
IfxPsi5s_Trigger
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.
Definition: IfxPsi5s.h:249
IfxPsi5s_WatchdogTimerMode_syncPulse
Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in N...
Definition: IfxPsi5s.h:284
IfxPsi5s_LoopBackMode_disable
loop-back mode disabled
Definition: IfxPsi5s.h:181
IfxPsi5s_DividerMode_off
divider mode is off
Definition: IfxPsi5s.h:135
IfxPsi5s_startAscTransactions
IFX_EXTERN void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:103
IfxPsi5s_DividerMode_spb
divider mode is off
Definition: IfxPsi5s.h:132
IfxPsi5s_IdleTime_16
16 bit Idle time
Definition: IfxPsi5s.h:174
IfxPsi5s_IdleTime_14
14 bit Idle time
Definition: IfxPsi5s.h:172
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxPsi5s_ChannelId_6
Ifx_PSI5S Channel 6.
Definition: IfxPsi5s.h:105
IfxPsi5s_AscMode
IfxPsi5s_AscMode
MODULE_PSI5S.CON.M:ASC mode of operation.
Definition: IfxPsi5s.h:77
IfxPsi5s_IdleTime_10
10 bit Idle time
Definition: IfxPsi5s.h:168
IfxPsi5s_AscMode_async_8bitDataWithParity
Asynchronous mode with 8 bit data with parity.
Definition: IfxPsi5s.h:84
IfxPsi5s_getReadFrameStatus
IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:72
IfxPsi5s_disableAscReceiver
IFX_EXTERN void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
Asc receiver is disabled.
Definition: IfxPsi5s.c:35
IfxPsi5s_TimestampTrigger_syncPulse
Timestamp trigger on sync pulse.
Definition: IfxPsi5s.h:243
IfxPsi5s_SuspendMode_soft
Soft Suspend.
Definition: IfxPsi5s.h:220
IfxPsi5s_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5s.h:265
IfxPsi5s_ChannelId_2
Ifx_PSI5S Channel 2.
Definition: IfxPsi5s.h:101
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxPsi5s_AlternateInput
IfxPsi5s_AlternateInput
MODULE_PSI5S.IOCR.ALTI:Alternate input.
Definition: IfxPsi5s.h:59
IfxPsi5s_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5s.h:227
IfxPsi5s_ChannelId_5
Ifx_PSI5S Channel 5.
Definition: IfxPsi5s.h:104
IfxPsi5s_SleepMode_enable
enables sleep mode
Definition: IfxPsi5s.h:210
IfxPsi5s_ChannelId_1
Ifx_PSI5S Channel 1.
Definition: IfxPsi5s.h:100
IfxPsi5s_IdleTime_4
4 bit Idle time
Definition: IfxPsi5s.h:162
IfxPsi5s_stopAscTransactions
IFX_EXTERN void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
Definition: IfxPsi5s.c:109
IfxPsi5s_IdleTime_5
5 bit Idle time
Definition: IfxPsi5s.h:163
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPsi5s_WatchdogTimerMode_frame
Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
Definition: IfxPsi5s.h:283
IfxPsi5s_Trigger_7
Trigger 7.
Definition: IfxPsi5s.h:258
IfxPsi5s_AscStopBits_2
2 stop bit
Definition: IfxPsi5s.h:92
IfxPsi5s_TriggerType_external
External trigger.
Definition: IfxPsi5s.h:266
IfxPsi5s_SleepMode
IfxPsi5s_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_PSI5S.CLC.B.EDIS.
Definition: IfxPsi5s.h:208
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:112
IfxPsi5s_AscMode_async_8bitDataWithWakeup
Asynchronous mode with 8 bit data with wakeup.
Definition: IfxPsi5s.h:83
IfxPsi5s_NumberExpectedFrames_3
3 psi5s frame expected
Definition: IfxPsi5s.h:199
IfxPsi5s_isModuleSuspended
IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxPsi5s.h:474
IfxPsi5s_Trigger_0
Trigger 0.
Definition: IfxPsi5s.h:251
IfxPsi5s_initClkPin
IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output.
Definition: IfxPsi5s.h:443
IfxPsi5s_UartFrameCount_3
3 UART frames
Definition: IfxPsi5s.h:273
IfxScuCcu.h
SCU basic functionality.
IfxPsi5s_TimestampTrigger_frame
Timestamp trigger on any frame.
Definition: IfxPsi5s.h:244
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxPsi5s_IdleTime_13
13 bit Idle time
Definition: IfxPsi5s.h:171
IfxPsi5s_setRxInput
IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
Selects the alternate input for Rx signal.
Definition: IfxPsi5s.h:486
IfxPsi5s_MessagingBits_present
2 messaging bits
Definition: IfxPsi5s.h:190
IfxPsi5s_AscBaudratePrescalar_divideBy2
Divide by 2 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:71
IfxPsi5s_resetModule
IFX_EXTERN void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
resets PSI5S kernel
Definition: IfxPsi5s.c:84
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxPsi5s_Clk_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5s_PinMap.h:59
IfxPsi5s_CrcOrParity
IfxPsi5s_CrcOrParity
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.
Definition: IfxPsi5s.h:122
IfxPsi5s_UartFrameCount
IfxPsi5s_UartFrameCount
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.
Definition: IfxPsi5s.h:271
IfxPsi5s_initRxPin
IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5s.h:453
IfxPsi5s_NumberExpectedFrames_1
1 psi5s frame expected
Definition: IfxPsi5s.h:197
IfxPsi5s_ClockType_ascOutput
Asc output clock.
Definition: IfxPsi5s.h:117
IfxPsi5s_AlternateInput_1
Alternate Input 1.
Definition: IfxPsi5s.h:62
IfxPsi5s_IdleTime_6
6 bit Idle time
Definition: IfxPsi5s.h:164
IfxPsi5s_UartFrameCount_5
5 UART frames
Definition: IfxPsi5s.h:275
IfxPsi5s_enableDisableChannelTriggerCounters
IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:56
IfxPsi5s_IdleTime_15
15 bit Idle time
Definition: IfxPsi5s.h:173
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:47
IfxPsi5s_IdleTime_2
2 bit Idle time
Definition: IfxPsi5s.h:160
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxPsi5s_AscStopBits
IfxPsi5s_AscStopBits
MODULE_PSI5S.CON.STP: Number of stop bits.
Definition: IfxPsi5s.h:89
IfxPsi5s_ChannelId_0
Ifx_PSI5S Channel 0.
Definition: IfxPsi5s.h:99
IfxPsi5s_SuspendMode_hard
Hard Suspend.
Definition: IfxPsi5s.h:219
IfxPsi5s_Trigger_1
Trigger 1.
Definition: IfxPsi5s.h:252
IfxPsi5s_IdleTime_12
12 bit Idle time
Definition: IfxPsi5s.h:170
IfxPsi5s_SuspendMode_none
No suspend.
Definition: IfxPsi5s.h:218
IfxPsi5s_enableDisableChannels
IFX_EXTERN void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:64
IfxPsi5s_SleepMode_disable
disables sleep mode
Definition: IfxPsi5s.h:211
IfxPsi5s_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5s.h:134
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:55
IfxPsi5s_Trigger_4
Trigger 4.
Definition: IfxPsi5s.h:255
IfxPsi5s_TimeBase
IfxPsi5s_TimeBase
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.
Definition: IfxPsi5s.h:225
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxPsi5s_FrameId_rollingNumber
Frame ID is a rolling number 0 .. 5 copied from FCNT.
Definition: IfxPsi5s.h:152
IfxPsi5s_Trigger_5
Trigger 5.
Definition: IfxPsi5s.h:256
IfxPsi5s_Trigger_2
Trigger 2.
Definition: IfxPsi5s.h:253


iLLD_TC26B: IfxPsi5s_PinMap.c Source File

  • _PinMap
IfxPsi5s_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_PinMap.c
3 * \brief PSI5S I/O map
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxPsi5s_PinMap.h"
27
28 IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4};
29 IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5};
30 IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a};
31 IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b};
32 IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c};
33 IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2};
34 IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2};
35 IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7};
36
37
38 const IfxPsi5s_Clk_Out *IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS] = {
39 {
40 &IfxPsi5s_CLK_P02_4_OUT,
41 &IfxPsi5s_CLK_P33_10_OUT
42 }
43 };
44
45 const IfxPsi5s_Rx_In *IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS] = {
46 {
47 &IfxPsi5s_RXA_P00_3_IN,
48 &IfxPsi5s_RXB_P02_5_IN,
49 &IfxPsi5s_RXC_P33_5_IN
50 }
51 };
52
53 const IfxPsi5s_Tx_Out *IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS] = {
54 {
55 &IfxPsi5s_TX_P00_4_OUT,
56 &IfxPsi5s_TX_P02_6_OUT,
57 &IfxPsi5s_TX_P33_6_OUT
58 }
59 };
IfxPsi5s_Tx_Out_pinTable
const IfxPsi5s_Tx_Out * IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:53
IFXPSI5S_PINMAP_NUM_MODULES
#define IFXPSI5S_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:39
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
IfxPsi5s_RXC_P33_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
Definition: IfxPsi5s_PinMap.c:32
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:73
IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:75
IfxPsi5s_PinMap.h
PSI5S I/O map.
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxPsi5s_CLK_P33_10_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
Definition: IfxPsi5s_PinMap.c:29
IfxPsi5s_RXA_P00_3_IN
IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
Definition: IfxPsi5s_PinMap.c:30
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IfxPsi5s_RXB_P02_5_IN
IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
Definition: IfxPsi5s_PinMap.c:31
IfxPsi5s_Clk_Out_pinTable
const IfxPsi5s_Clk_Out * IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:38
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:109
IfxPsi5s_Rx_In_pinTable
const IfxPsi5s_Rx_In * IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
Definition: IfxPsi5s_PinMap.c:45
IfxPsi5s_CLK_P02_4_OUT
IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
Definition: IfxPsi5s_PinMap.c:28
IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:74
IfxPsi5s_TX_P33_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
Definition: IfxPsi5s_PinMap.c:35
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:47
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:55
IfxPsi5s_TX_P02_6_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
Definition: IfxPsi5s_PinMap.c:34
IfxPsi5s_TX_P00_4_OUT
IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
Definition: IfxPsi5s_PinMap.c:33


iLLD_TC26B: IfxPsi5s_PinMap.h Source File

  • _PinMap
IfxPsi5s_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_PinMap.h
3 * \brief PSI5S I/O map
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Psi5s_pinmap PSI5S Pin Mapping
25 * \ingroup IfxLld_Psi5s
26 */
27
28 #ifndef IFXPSI5S_PINMAP_H
29 #define IFXPSI5S_PINMAP_H
30
31 #include <IfxPsi5s_reg.h>
32 #include <_Impl/IfxPsi5s_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Psi5s_pinmap
36 * \{ */
37
38 /** \brief RX pin mapping structure */
39 typedef const struct
40 {
41 Ifx_PSI5S* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel select; /**< \brief Input multiplexer value */
44 } IfxPsi5s_Rx_In;
45
46 /** \brief TX pin mapping structure */
47 typedef const struct
48 {
49 Ifx_PSI5S* module; /**< \brief Base address */
50 IfxPort_Pin pin; /**< \brief Port pin */
51 IfxPort_OutputIdx select; /**< \brief Port control code */
52 } IfxPsi5s_Tx_Out;
53
54 /** \brief CLK pin mapping structure */
55 typedef const struct
56 {
57 Ifx_PSI5S* module; /**< \brief Base address */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 IfxPort_OutputIdx select; /**< \brief Port control code */
60 } IfxPsi5s_Clk_Out;
61
62 IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT; /**< \brief PSI5S_CLK: PSI5-S output */
63 IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT; /**< \brief PSI5S_CLK: PSI5-S output */
64 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN; /**< \brief PSI5S_RXA: PSI5-S input */
65 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN; /**< \brief PSI5S_RXB: PSI5-S input */
66 IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN; /**< \brief PSI5S_RXC: PSI5-S input */
67 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT; /**< \brief PSI5S_TX: PSI5-S output */
68 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT; /**< \brief PSI5S_TX: PSI5-S output */
69 IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT; /**< \brief PSI5S_TX: PSI5-S output */
70
71 /** \brief Table dimensions */
72 #define IFXPSI5S_PINMAP_NUM_MODULES 1
73 #define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
74 #define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
75 #define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3
76
77
78 /** \brief IfxPsi5s_Clk_Out table */
79 IFX_EXTERN const IfxPsi5s_Clk_Out *IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS];
80
81 /** \brief IfxPsi5s_Rx_In table */
82 IFX_EXTERN const IfxPsi5s_Rx_In *IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS];
83
84 /** \brief IfxPsi5s_Tx_Out table */
85 IFX_EXTERN const IfxPsi5s_Tx_Out *IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS];
86
87 /** \} */
88
89 #endif /* IFXPSI5S_PINMAP_H */
IfxPsi5s_CLK_P33_10_OUT
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT
PSI5S_CLK: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:63
IFXPSI5S_PINMAP_NUM_MODULES
#define IFXPSI5S_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxPsi5s_PinMap.h:72
IfxPsi5s_TX_P00_4_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT
PSI5S_TX: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:67
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:39
IfxPsi5s_cfg.h
PSI5S on-chip implementation data.
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxPsi5s_Rx_In::module
Ifx_PSI5S * module
Base address.
Definition: IfxPsi5s_PinMap.h:41
IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:73
IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:75
IfxPsi5s_Rx_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxPsi5s_PinMap.h:43
IfxPsi5s_CLK_P02_4_OUT
IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT
PSI5S_CLK: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:62
IfxPsi5s_Rx_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxPsi5s_PinMap.h:42
IfxPsi5s_RXB_P02_5_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN
PSI5S_RXB: PSI5-S input.
Definition: IfxPsi5s_PinMap.h:65
IfxPsi5s_TX_P33_6_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT
PSI5S_TX: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:69
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPsi5s_Rx_In_pinTable
IFX_EXTERN const IfxPsi5s_Rx_In * IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS]
IfxPsi5s_Rx_In table.
Definition: IfxPsi5s_PinMap.h:82
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxPsi5s_Tx_Out_pinTable
IFX_EXTERN const IfxPsi5s_Tx_Out * IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS]
IfxPsi5s_Tx_Out table.
Definition: IfxPsi5s_PinMap.h:85
IfxPsi5s_Tx_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxPsi5s_PinMap.h:51
IfxPsi5s_RXC_P33_5_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN
PSI5S_RXC: PSI5-S input.
Definition: IfxPsi5s_PinMap.h:66
IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS
Definition: IfxPsi5s_PinMap.h:74
IfxPsi5s_RXA_P00_3_IN
IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN
PSI5S_RXA: PSI5-S input.
Definition: IfxPsi5s_PinMap.h:64
IfxPsi5s_Clk_Out_pinTable
IFX_EXTERN const IfxPsi5s_Clk_Out * IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS]
IfxPsi5s_Clk_Out table.
Definition: IfxPsi5s_PinMap.h:79
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:47
IfxPsi5s_TX_P02_6_OUT
IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT
PSI5S_TX: PSI5-S output.
Definition: IfxPsi5s_PinMap.h:68
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:55
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxPsi5s_Psi5s.c Source File

  • Psi5s
  • Psi5s
IfxPsi5s_Psi5s.c
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_Psi5s.c
3 * \brief PSI5S PSI5S details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxPsi5s_Psi5s.h"
30
31 /** \addtogroup IfxLld_Psi5s_Psi5s_Utility
32 * \{ */
33
34 /******************************************************************************/
35 /*-----------------------Private Function Prototypes--------------------------*/
36 /******************************************************************************/
37
38 /** \brief get the fracDiv clock frequency
39 * \param psi5s Pointer to the base of PSI5S register space
40 * \return Returns the configured fracDiv psi5s clock frequency in Hz.
41 */
42 IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s);
43
44 /** \brief Configure the fracDiv clock.
45 * \param psi5s Pointer to the base of PSI5S register space
46 * \param clock Specifies the required clock frequency in Hz.
47 * \return Returns the configured clock frequency in Hz.
48 */
49 IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock);
50
51 /** \brief Configure the baudrate at the ASC interface.
52 * \param psi5s Pointer to the base of PSI5S register space
53 * \param baudrate Frequency Specifies the required baudrate frequency in Hz.
54 * \param ascConfig pointer to the configuration structure for ASC
55 * \return Returns the configured baudrate frequency in Hz.
56 */
57 IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig);
58
59 /** \} */
60
61 /******************************************************************************/
62 /*-------------------------Function Implementations---------------------------*/
63 /******************************************************************************/
64
65 void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
66 {
67 Ifx_PSI5S *psi5sSFR = psi5s->psi5s;
68 IfxPsi5s_Psi5s_resetModule(psi5sSFR);
69 }
70
71
72 void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
73 {
74 psi5s->CLC.U = 0x00000000;
75 }
76
77
78 IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s)
79 {
80 uint32 result;
81 uint32 fPsi5s = IfxScuCcu_getSpbFrequency();
82
83 switch (psi5s->FDR.B.DM)
84 {
85 case IfxPsi5s_DividerMode_spb:
86 result = fPsi5s;
87 break;
88 case IfxPsi5s_DividerMode_normal:
89 result = fPsi5s / (IFXPSI5S_STEP_RANGE - psi5s->FDR.B.STEP);
90 break;
91 case IfxPsi5s_DividerMode_fractional:
92 result = (fPsi5s * IFXPSI5S_STEP_RANGE) / psi5s->FDR.B.STEP;
93 break;
94 case IfxPsi5s_DividerMode_off:
95 result = 0;
96 break;
97 default:
98 result = 0;
99 }
100
101 return result;
102 }
103
104
105 boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
106 {
107 boolean status = TRUE;
108
109 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
110 IfxScuWdt_clearCpuEndinit(passwd);
111
112 Ifx_PSI5S *psi5s = config->module->psi5s;
113 channel->module = (IfxPsi5s_Psi5s *)config->module;
114 channel->channelId = config->channelId;
115
116 Ifx_PSI5S_PGC tempPGC;
117 tempPGC.U = psi5s->PGC[config->channelId].U;
118 tempPGC.B.TXCMD = config->pulseGeneration.codeforZero;
119 tempPGC.B.ATXCMD = config->pulseGeneration.codeforOne;
120 tempPGC.B.TBS = config->pulseGeneration.timeBaseSelect;
121 tempPGC.B.ETB = config->pulseGeneration.externalTimeBaseSelect;
122 tempPGC.B.ETS = config->pulseGeneration.externalTriggerSelect;
123
124 switch (config->pulseGeneration.periodicOrExternal)
125 {
126 case IfxPsi5s_TriggerType_periodic:
127 tempPGC.B.PTE = TRUE;
128 tempPGC.B.ETE = FALSE;
129 break;
130
131 case IfxPsi5s_TriggerType_external:
132 tempPGC.B.PTE = FALSE;
133 tempPGC.B.ETE = TRUE;
134 break;
135 }
136
137 psi5s->PGC[config->channelId].U = tempPGC.U;
138
139 Ifx_PSI5S_CTV tempCTV;
140 tempCTV.U = psi5s->CTV[config->channelId].U;
141 tempCTV.B.CTV = config->channelTrigger.channelTriggerValue;
142 tempCTV.B.CTC = config->channelTrigger.channelTriggerCounter;
143 psi5s->CTV[config->channelId].U = tempCTV.U;
144
145 psi5s->WDT[config->channelId].U = config->watchdogTimerLimit;
146
147 Ifx_PSI5S_RCRA tempRCRA;
148 tempRCRA.U = psi5s->RCRA[config->channelId].U;
149 tempRCRA.B.CRC0 = config->receiveControl.crcOrParity[0];
150 tempRCRA.B.CRC1 = config->receiveControl.crcOrParity[1];
151 tempRCRA.B.CRC2 = config->receiveControl.crcOrParity[2];
152 tempRCRA.B.CRC3 = config->receiveControl.crcOrParity[3];
153 tempRCRA.B.CRC4 = config->receiveControl.crcOrParity[4];
154 tempRCRA.B.CRC5 = config->receiveControl.crcOrParity[5];
155 tempRCRA.B.TSEN = config->receiveControl.timestampEnabled;
156 tempRCRA.B.TSP = config->receiveControl.timestampSelect;
157 tempRCRA.B.TSTS = config->receiveControl.timestampTriggerSelect;
158 tempRCRA.B.FIDS = config->receiveControl.frameIdSelect;
159 tempRCRA.B.WDMS = config->receiveControl.watchdogTimerModeSelect;
160 tempRCRA.B.UFC0 = config->receiveControl.uartFrameCount[0];
161 tempRCRA.B.UFC1 = config->receiveControl.uartFrameCount[1];
162 tempRCRA.B.UFC2 = config->receiveControl.uartFrameCount[2];
163 tempRCRA.B.UFC3 = config->receiveControl.uartFrameCount[3];
164 tempRCRA.B.UFC4 = config->receiveControl.uartFrameCount[4];
165 tempRCRA.B.UFC5 = config->receiveControl.uartFrameCount[5];
166 psi5s->RCRA[config->channelId].U = tempRCRA.U;
167
168 Ifx_PSI5S_RCRB tempRCRB;
169 tempRCRB.U = psi5s->RCRB[config->channelId].U;
170 tempRCRB.B.PDL0 = config->receiveControl.payloadLength[0];
171 tempRCRB.B.PDL1 = config->receiveControl.payloadLength[1];
172 tempRCRB.B.PDL2 = config->receiveControl.payloadLength[2];
173 tempRCRB.B.PDL3 = config->receiveControl.payloadLength[3];
174 tempRCRB.B.PDL4 = config->receiveControl.payloadLength[4];
175 tempRCRB.B.PDL5 = config->receiveControl.payloadLength[5];
176 psi5s->RCRB[config->channelId].U = tempRCRB.U;
177
178 psi5s->NFC.U = (config->receiveControl.numberOfFramesExpected << (config->channelId * 3));
179
180 Ifx_PSI5S_SCR tempSCR;
181 tempSCR.U = psi5s->SCR[config->channelId].U;
182 tempSCR.B.PLL = config->sendControl.payloadLength;
183 tempSCR.B.EPS = config->sendControl.enhancedProtocolSelection;
184 tempSCR.B.BSC = config->sendControl.bitStuffControl;
185 tempSCR.B.CRC = config->sendControl.crcGenerationControl;
186 tempSCR.B.STA = config->sendControl.startSequenceGenerationControl;
187 psi5s->SCR[config->channelId].U = tempSCR.U;
188
189 IfxScuWdt_setCpuEndinit(passwd);
190
191 return status;
192 }
193
194
195 void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
196 {
197 IfxPsi5s_Psi5s_ChannelConfig IfxPsi5s_Psi5s_defaultChannelConfig = {
198 .channelId = IfxPsi5s_ChannelId_0,
199 .module = NULL_PTR,
200 .pulseGeneration = {
201 .codeforZero = 0,
202 .codeforOne = 1,
203 .timeBaseSelect = IfxPsi5s_TimeBase_internal,
204 .externalTimeBaseSelect = IfxPsi5s_Trigger_0,
205 .periodicOrExternal = IfxPsi5s_TriggerType_periodic,
206 .externalTriggerSelect = IfxPsi5s_Trigger_0,
207 },
208 .channelTrigger = {
209 .channelTriggerValue = 0x20,
210 .channelTriggerCounter = 0x0
211 },
212 .watchdogTimerLimit = 0x0,
213 .receiveControl = {
214 .crcOrParity[0] = IfxPsi5s_CrcOrParity_parity,
215 .crcOrParity[1] = IfxPsi5s_CrcOrParity_parity,
216 .crcOrParity[2] = IfxPsi5s_CrcOrParity_parity,
217 .crcOrParity[3] = IfxPsi5s_CrcOrParity_parity,
218 .crcOrParity[4] = IfxPsi5s_CrcOrParity_parity,
219 .crcOrParity[5] = IfxPsi5s_CrcOrParity_parity,
220 .timestampEnabled = FALSE,
221 .timestampSelect = IfxPsi5s_TimestampRegister_a,
222 .timestampTriggerSelect = IfxPsi5s_TimestampTrigger_syncPulse,
223 .frameIdSelect = IfxPsi5s_FrameId_frameHeader,
224 .watchdogTimerModeSelect = IfxPsi5s_WatchdogTimerMode_frame,
225 .uartFrameCount[0] = IfxPsi5s_UartFrameCount_3,
226 .uartFrameCount[1] = IfxPsi5s_UartFrameCount_3,
227 .uartFrameCount[2] = IfxPsi5s_UartFrameCount_3,
228 .uartFrameCount[3] = IfxPsi5s_UartFrameCount_3,
229 .uartFrameCount[4] = IfxPsi5s_UartFrameCount_3,
230 .uartFrameCount[5] = IfxPsi5s_UartFrameCount_3,
231 .payloadLength[0] = 0,
232 .payloadLength[1] = 0,
233 .payloadLength[2] = 0,
234 .payloadLength[3] = 0,
235 .payloadLength[4] = 0,
236 .payloadLength[5] = 0,
237 .numberOfFramesExpected = IfxPsi5s_NumberExpectedFrames_1,
238 },
239 .sendControl = {
240 .payloadLength = 6,
241 .enhancedProtocolSelection = IfxPsi5s_EnhancedProtocol_toothGapMethod,
242 .bitStuffControl = FALSE,
243 .crcGenerationControl = FALSE,
244 .startSequenceGenerationControl = FALSE
245 }
246 };
247 *config = IfxPsi5s_Psi5s_defaultChannelConfig;
248 config->module = psi5s;
249 }
250
251
252 boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
253 {
254 boolean status = TRUE;
255
256 Ifx_PSI5S *psi5sSFR = config->module;
257 psi5s->psi5s = psi5sSFR;
258
259 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
260 IfxScuWdt_clearCpuEndinit(passwd);
261 IfxPsi5s_Psi5s_enableModule(psi5sSFR);
262
263 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->fracDiv) == 0)
264 {
265 status = FALSE;
266 return status;
267 }
268 else
269 {}
270
271 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->timestampClock) == 0)
272 {
273 status = FALSE;
274 return status;
275 }
276 else
277 {}
278
279 Ifx_PSI5S_CON tempCON;
280 tempCON.U = psi5sSFR->CON.U;
281 tempCON.B.M = config->ascConfig.receiveMode;
282 tempCON.B.STP = config->ascConfig.stopBits;
283 tempCON.B.PEN = config->ascConfig.parityCheckEnabled;
284 tempCON.B.FEN = config->ascConfig.framingCheckEnabled;
285 tempCON.B.OEN = config->ascConfig.overrunCheckEnabled;
286 tempCON.B.FDE = config->ascConfig.fractionalDividerEnabled;
287 tempCON.B.ODD = config->ascConfig.receiverOddParityEnabled;
288 tempCON.B.BRS = config->ascConfig.baudrateSelection;
289 tempCON.B.LB = config->ascConfig.loopbackEnabled;
290 tempCON.B.MTX = config->ascConfig.transmitMode;
291 tempCON.B.ODDTX = config->ascConfig.transmitterOddParityEnabled;
292 psi5sSFR->CON.U = tempCON.U;
293
294 if (IfxPsi5s_Psi5s_setBaudrate(psi5sSFR, config->ascConfig.baudrateFrequency, (IfxPsi5s_Psi5s_AscConfig *)&(config->ascConfig))
295 == 0)
296 {
297 status = FALSE;
298 return status;
299 }
300 else
301 {}
302
303 if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->ascConfig.clockOutput) == 0)
304 {
305 status = FALSE;
306 return status;
307 }
308 else
309 {}
310
311 Ifx_PSI5S_TSCNTA tempTSCNTA;
312 tempTSCNTA.U = psi5sSFR->TSCNTA.U;
313 tempTSCNTA.B.ETB = config->timestampCounterA.externalTimeBaseSelect;
314 tempTSCNTA.B.TBS = config->timestampCounterA.timeBaseSelect;
315 psi5sSFR->TSCNTA.U = tempTSCNTA.U;
316
317 Ifx_PSI5S_TSCNTB tempTSCNTB;
318 tempTSCNTB.U = psi5sSFR->TSCNTB.U;
319 tempTSCNTB.B.ETB = config->timestampCounterB.externalTimeBaseSelect;
320 tempTSCNTB.B.TBS = config->timestampCounterB.timeBaseSelect;
321 psi5sSFR->TSCNTB.U = tempTSCNTB.U;
322
323 Ifx_PSI5S_GCR tempGCR;
324 tempGCR.U = psi5sSFR->GCR.U;
325 tempGCR.B.CRCI = config->globalControlConfig.crcErrorConsideredForRSI;
326 tempGCR.B.XCRCI = config->globalControlConfig.xcrcErrorConsideredForRSI;
327 tempGCR.B.TEI = config->globalControlConfig.transmitErrorConsideredForRSI;
328 tempGCR.B.PE = config->globalControlConfig.parityErrorConsideredForRSI;
329 tempGCR.B.FE = config->globalControlConfig.framingErrorConsideredForRSI;
330 tempGCR.B.OE = config->globalControlConfig.overrunErrorConsideredForRSI;
331 tempGCR.B.RBI = config->globalControlConfig.receiveBufferErrorConsideredForRSI;
332 tempGCR.B.HDI = config->globalControlConfig.headerErrorConsideredForRSI;
333 tempGCR.B.IDT = config->globalControlConfig.idleTime;
334 tempGCR.B.ASC = config->globalControlConfig.ascOnlyMode;
335 psi5sSFR->GCR.U = tempGCR.U;
336
337 IfxScuWdt_setCpuEndinit(passwd);
338
339 // Pin mapping //
340 const IfxPsi5s_Psi5s_Pins *pins = config->pins;
341
342 if (pins != NULL_PTR)
343 {
344 const IfxPsi5s_Rx_In *rx = pins->rx;
345
346 if (rx != NULL_PTR)
347 {
348 IfxPsi5s_initRxPin(rx, pins->rxMode, pins->pinDriver);
349 }
350
351 const IfxPsi5s_Tx_Out *tx = pins->tx;
352
353 if (tx != NULL_PTR)
354 {
355 IfxPsi5s_initTxPin(tx, pins->txMode, pins->pinDriver);
356 }
357
358 const IfxPsi5s_Clk_Out *clk = pins->clk;
359
360 if (clk != NULL_PTR)
361 {
362 IfxPsi5s_initClkPin(clk, pins->clkMode, pins->pinDriver);
363 }
364 }
365
366 return status;
367 }
368
369
370 void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
371 {
372 uint32 spbFrequency = IfxScuCcu_getSpbFrequency();
373 config->module = psi5s;
374 config->fracDiv.frequency = spbFrequency;
375 config->fracDiv.mode = IfxPsi5s_DividerMode_normal;
376 config->fracDiv.type = IfxPsi5s_ClockType_fracDiv;
377 config->timestampClock.frequency = spbFrequency;
378 config->timestampClock.mode = IfxPsi5s_DividerMode_normal;
379 config->timestampClock.type = IfxPsi5s_ClockType_timeStamp;
380 config->timestampCounterA.externalTimeBaseSelect = IfxPsi5s_Trigger_0;
381 config->timestampCounterA.timeBaseSelect = IfxPsi5s_TimeBase_internal;
382 config->timestampCounterB.externalTimeBaseSelect = IfxPsi5s_Trigger_0;
383 config->timestampCounterB.timeBaseSelect = IfxPsi5s_TimeBase_internal;
384 config->ascConfig.baudrateFrequency = IFXPSI5S_BAUDRATE_1562500;
385 config->ascConfig.clockOutput.frequency = spbFrequency;
386 config->ascConfig.clockOutput.mode = IfxPsi5s_DividerMode_normal;
387 config->ascConfig.clockOutput.type = IfxPsi5s_ClockType_ascOutput;
388 config->ascConfig.receiveMode = IfxPsi5s_AscMode_sync;
389 config->ascConfig.stopBits = IfxPsi5s_AscStopBits_1;
390 config->ascConfig.parityCheckEnabled = FALSE;
391 config->ascConfig.framingCheckEnabled = FALSE;
392 config->ascConfig.overrunCheckEnabled = FALSE;
393 config->ascConfig.fractionalDividerEnabled = FALSE;
394 config->ascConfig.receiverOddParityEnabled = FALSE;
395 config->ascConfig.baudrateSelection = IfxPsi5s_AscBaudratePrescalar_divideBy2;
396 config->ascConfig.loopbackEnabled = IfxPsi5s_LoopBackMode_disable;
397 config->ascConfig.transmitMode = IfxPsi5s_AscMode_sync;
398 config->ascConfig.transmitterOddParityEnabled = FALSE;
399 config->globalControlConfig.crcErrorConsideredForRSI = TRUE;
400 config->globalControlConfig.xcrcErrorConsideredForRSI = TRUE;
401 config->globalControlConfig.transmitErrorConsideredForRSI = TRUE;
402 config->globalControlConfig.parityErrorConsideredForRSI = TRUE;
403 config->globalControlConfig.framingErrorConsideredForRSI = TRUE;
404 config->globalControlConfig.overrunErrorConsideredForRSI = FALSE;
405 config->globalControlConfig.receiveBufferErrorConsideredForRSI = FALSE;
406 config->globalControlConfig.headerErrorConsideredForRSI = FALSE;
407 config->globalControlConfig.idleTime = IfxPsi5s_IdleTime_1;
408 config->globalControlConfig.ascOnlyMode = FALSE;
409 config->pins = NULL_PTR;
410 }
411
412
413 IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
414 {
415 uint64 step = 0;
416 uint32 stepRange = IFXPSI5S_STEP_RANGE;
417 uint32 result = 0;
418 IfxPsi5s_DividerMode divMode = clock->mode;
419 IfxPsi5s_ClockType clockType = clock->type;
420 uint32 clockFrequency = clock->frequency;
421 uint32 fInput;
422 Ifx_PSI5S_FDR tempFDR;
423 Ifx_PSI5S_FDRT tempFDRT;
424 Ifx_PSI5S_FDO tempFDO;
425
426 if (clockType == IfxPsi5s_ClockType_fracDiv)
427 {
428 fInput = IfxScuCcu_getSpbFrequency();
429 }
430 else if (clockType == IfxPsi5s_ClockType_ascOutput)
431 {
432 fInput = IfxScuCcu_getSpbFrequency(); // assumption here is that fBaud2 is equal to fSPB
433 stepRange = 2 * IFXPSI5S_STEP_RANGE;
434 }
435 else
436 {
437 fInput = IfxPsi5s_Psi5s_getFracDivClock(psi5s);
438
439 if (fInput == 0)
440 {
441 result = 0;
442 return result;
443 }
444 else
445 {}
446 }
447
448 switch (divMode)
449 {
450 case IfxPsi5s_DividerMode_normal:
451 step = stepRange - (fInput / clockFrequency);
452
453 if (step > (stepRange - 1))
454 {
455 step = stepRange - 1;
456 }
457 else
458 {
459 /* do nothing */
460 }
461
462 result = (uint32)(fInput / (stepRange - step));
463 break;
464
465 case IfxPsi5s_DividerMode_fractional:
466 step = (uint64)((uint64)clockFrequency * stepRange) / fInput;
467
468 if (step > (stepRange - 1))
469 {
470 step = stepRange - 1;
471 }
472 else
473 {
474 /* do nothing */
475 }
476
477 result = (uint32)((uint64)((uint64)fInput * step)) / stepRange;
478 break;
479
480 case IfxPsi5s_DividerMode_off:
481 default:
482 step = 0;
483 result = 0;
484 break;
485 }
486
487 if (result != 0)
488 {
489 switch (clockType)
490 {
491 case IfxPsi5s_ClockType_fracDiv:
492 tempFDR.U = 0;
493 tempFDR.B.DM = divMode;
494 tempFDR.B.STEP = (uint32)step;
495 psi5s->FDR.U = tempFDR.U;
496 break;
497
498 case IfxPsi5s_ClockType_timeStamp:
499 tempFDRT.U = 0;
500 tempFDRT.B.DM = divMode;
501 tempFDRT.B.STEP = (uint32)step;
502 psi5s->FDRT.U = tempFDRT.U;
503 break;
504
505 case IfxPsi5s_ClockType_ascOutput:
506 tempFDO.U = 0;
507 tempFDO.B.DM = divMode;
508 tempFDO.B.STEP = (uint32)step;
509 psi5s->FDO.U = tempFDO.U;
510 break;
511 default:
512 break;
513 }
514 }
515
516 return result;
517 }
518
519
520 void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
521 {
522 frame->data.rdr = channel->module->psi5s->RDR.U;
523 frame->status.rds = channel->module->psi5s->RDS.U;
524 frame->timestamp.tsm = channel->module->psi5s->TSM.U;
525
526 channel->module->psi5s->INTCLR[channel->channelId].U |= (IFX_PSI5S_INTCLR_RDI_MSK << IFX_PSI5S_INTCLR_RDI_OFF) | (IFX_PSI5S_INTCLR_RSI_MSK << IFX_PSI5S_INTCLR_RSI_OFF);
527 }
528
529
530 void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
531 {
532 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
533 IfxScuWdt_clearSafetyEndinit(passwd);
534 psi5s->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
535 psi5s->KRST0.B.RST = 1;
536
537 while (psi5s->KRST0.B.RSTSTAT == 0)
538 {
539 /* Wait until reset is executed */
540 }
541
542 psi5s->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
543 IfxScuWdt_setSafetyEndinit(passwd);
544 }
545
546
547 boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
548 {
549 channel->module->psi5s->SDR[channel->channelId].U = data & 0x00FFFFFF;
550
551 if (channel->module->psi5s->INTSTAT[channel->channelId].B.TPOI)
552 {
553 return FALSE;
554 }
555 else
556 {
557 return TRUE;
558 }
559 }
560
561
562 IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
563 {
564 uint32 bgValue = 0;
565 uint32 fdValue = 0;
566 uint32 result = 0;
567 uint32 fInput;
568
569 if (ascConfig->receiveMode == IfxPsi5s_AscMode_sync)
570 {
571 if (ascConfig->transmitMode != IfxPsi5s_AscMode_sync)
572 {
573 // sync modes must be set for both receive and transmit
574 }
575
576 fInput = IfxScuCcu_getBaud2Frequency();
577 bgValue = (uint32)(fInput / ((ascConfig->baudrateSelection + 2) * 4 * (uint64)baudrate) - 1);
578
579 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
580 {
581 bgValue = IFXPSI5S_BG_RANGE - 1;
582 }
583 else
584 {
585 /* do nothing */
586 }
587
588 result = fInput / ((ascConfig->baudrateSelection + 2) * 4 * (bgValue + 1));
589 }
590 else if (ascConfig->fractionalDividerEnabled == FALSE)
591 {
592 fInput = IfxScuCcu_getBaud2Frequency();
593 bgValue = (uint32)(fInput / ((ascConfig->baudrateSelection + 2) * 16 * (uint64)baudrate) - 1);
594
595 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
596 {
597 bgValue = IFXPSI5S_BG_RANGE - 1;
598 }
599 else
600 {
601 /* do nothing */
602 }
603
604 result = fInput / ((ascConfig->baudrateSelection + 2) * 16 * (bgValue + 1));
605 }
606 else
607 {
608 fInput = IfxScuCcu_getBaud2Frequency();
609 fdValue = (((uint64)baudrate * IFXPSI5S_FDV_RANGE * 16)) / (float)fInput;
610
611 if (fdValue > (IFXPSI5S_FDV_RANGE - 1))
612 {
613 fdValue = IFXPSI5S_FDV_RANGE - 1;
614 bgValue = ((float)fdValue / IFXPSI5S_FDV_RANGE) * (fInput / (16 * baudrate)) - 1;
615
616 if (bgValue > (IFXPSI5S_BG_RANGE - 1))
617 {
618 bgValue = IFXPSI5S_BG_RANGE - 1;
619 }
620 else
621 {
622 /* do nothing */
623 }
624 }
625 else
626 {
627 bgValue = 0;
628 }
629
630 result = ((float)fdValue / IFXPSI5S_FDV_RANGE) * (fInput / (16 * (bgValue + 1)));
631 }
632
633 psi5s->FDV.U = fdValue;
634 psi5s->BG.U = bgValue;
635
636 return result;
637 }
IfxPsi5s_IdleTime_1
1 bit Idle time
Definition: IfxPsi5s.h:159
IfxPsi5s_ClockType_fracDiv
Fractional Divide clock.
Definition: IfxPsi5s.h:114
IfxPsi5s_Psi5s_initChannelConfig
void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration.
Definition: IfxPsi5s_Psi5s.c:195
IfxPsi5s_Psi5s_ReceiveControl::numberOfFramesExpected
IfxPsi5s_NumberExpectedFrames numberOfFramesExpected
Specifies the number of psi5s frames expected.
Definition: IfxPsi5s_Psi5s.h:296
IFXPSI5S_BAUDRATE_1562500
#define IFXPSI5S_BAUDRATE_1562500
Definition: IfxPsi5s_cfg.h:59
IfxPsi5s_Psi5s_GlobalControlConfig::receiveBufferErrorConsideredForRSI
boolean receiveBufferErrorConsideredForRSI
Specifies whether RBI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:254
IfxPsi5s_Psi5s_resetModule
void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
Reset PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:530
IfxPsi5s_Psi5s_Pins::clk
IFX_CONST IfxPsi5s_Clk_Out * clk
PSI5S Clk Pin.
Definition: IfxPsi5s_Psi5s.h:267
IfxPsi5s_Psi5s_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5s_Psi5s.h:338
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxPsi5s_Psi5s.h
PSI5S PSI5S details.
IfxPsi5s_FrameId_frameHeader
Frame ID is updated from packet frame header (Sync mode)
Definition: IfxPsi5s.h:151
IfxPsi5s_Psi5s_TransmitControl::enhancedProtocolSelection
IfxPsi5s_EnhancedProtocol enhancedProtocolSelection
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5s_Psi5s.h:339
IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:218
IfxPsi5s_Psi5s_ChannelConfig::channelTrigger
IfxPsi5s_Psi5s_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5s_Psi5s.h:362
IfxPsi5s_Psi5s_initChannel
boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5s_Psi5s.c:105
IfxPsi5s_Psi5s_ReceiveControl::crcOrParity
IfxPsi5s_CrcOrParity crcOrParity[IFXPSI5S_NUM_SLOTS]
Specifies the crc or parity selection for the slots 0 to 5.
Definition: IfxPsi5s_Psi5s.h:290
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:39
IfxPsi5s_Psi5s_ReceiveControl::timestampSelect
IfxPsi5s_TimestampRegister timestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:291
IfxPsi5s_Psi5s_AscConfig::receiverOddParityEnabled
boolean receiverOddParityEnabled
Specifies whether receiver parity check should be for even or odd.
Definition: IfxPsi5s_Psi5s.h:224
IfxPsi5s_Psi5s_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5s_Psi5s.h:162
IfxPsi5s_Psi5s_PulseGeneration::codeforZero
uint32 codeforZero
Specifies the code used to represent &#39;0&#39; - referred as TXCMD.
Definition: IfxPsi5s_Psi5s.h:276
IfxPsi5s_Psi5s_Config::timestampClock
IfxPsi5s_Psi5s_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5s_Psi5s.h:373
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5s_Psi5s.h:239
IfxPsi5s_Psi5s_PulseGeneration::timeBaseSelect
IfxPsi5s_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5s_Psi5s.h:278
IfxPsi5s_Psi5s_setBaudrate
IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
Configure the baudrate at the ASC interface.
Definition: IfxPsi5s_Psi5s.c:562
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:130
IfxPsi5s_Psi5s_Pins::tx
IFX_CONST IfxPsi5s_Tx_Out * tx
PSI5S Tx pin.
Definition: IfxPsi5s_Psi5s.h:265
IfxPsi5s_Psi5s_PulseGeneration::externalTriggerSelect
IfxPsi5s_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5s_Psi5s.h:281
IfxPsi5s_AscStopBits_1
1 stop bit
Definition: IfxPsi5s.h:91
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPsi5s_Psi5s_GlobalControlConfig::ascOnlyMode
boolean ascOnlyMode
Specifies if the module is in ASC only mode.
Definition: IfxPsi5s_Psi5s.h:247
IfxPsi5s_DividerMode_normal
divider mode is normal
Definition: IfxPsi5s.h:133
IfxPsi5s_Psi5s_Config
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:369
IfxPsi5s_Psi5s_GlobalControlConfig::idleTime
uint32 idleTime
Specifies the number of stop bits in addition to last UART frame that is required for start of frame ...
Definition: IfxPsi5s_Psi5s.h:256
IfxPsi5s_initTxPin
IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a TX output.
Definition: IfxPsi5s.h:464
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxPsi5s_EnhancedProtocol_toothGapMethod
toothGapMethod Enhanced protocol type
Definition: IfxPsi5s.h:142
IfxPsi5s_AscMode_sync
Synchronous mode.
Definition: IfxPsi5s.h:79
IfxPsi5s_TimestampRegister_a
Timestamp register A.
Definition: IfxPsi5s.h:235
IfxPsi5s_Psi5s_GlobalControlConfig::framingErrorConsideredForRSI
boolean framingErrorConsideredForRSI
Specifies whether FE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:252
IfxPsi5s_Psi5s_PulseGeneration::periodicOrExternal
IfxPsi5s_TriggerType periodicOrExternal
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5s_Psi5s.h:280
IfxPsi5s_Psi5s
PSI5S handle data structure.
Definition: IfxPsi5s_Psi5s.h:211
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxPsi5s_ClockType_timeStamp
Timestamp clock.
Definition: IfxPsi5s.h:115
IfxPsi5s_Psi5s_ReceiveControl::timestampTriggerSelect
IfxPsi5s_TimestampTrigger timestampTriggerSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:292
IfxPsi5s_Psi5s_Pins::rx
IFX_CONST IfxPsi5s_Rx_In * rx
PSI5S Rx pin.
Definition: IfxPsi5s_Psi5s.h:263
IfxPsi5s_Psi5s_AscConfig::transmitMode
IfxPsi5s_AscMode transmitMode
Specifies the mode of operation for ASC transmitter.
Definition: IfxPsi5s_Psi5s.h:231
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxPsi5s_Psi5s_Frame::status
IfxPsi5s_Psi5s_ReceiveStatus status
Receiver status.
Definition: IfxPsi5s_Psi5s.h:386
IfxPsi5s_CrcOrParity_parity
parity selection
Definition: IfxPsi5s.h:124
IfxPsi5s_Psi5s_ChannelConfig::receiveControl
IfxPsi5s_Psi5s_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5s_Psi5s.h:363
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxPsi5s_Psi5s_Frame::timestamp
IfxPsi5s_Psi5s_ReceiveTimestamp timestamp
Receiver timestamp.
Definition: IfxPsi5s_Psi5s.h:387
IfxPsi5s_Psi5s_TransmitControl::bitStuffControl
boolean bitStuffControl
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5s_Psi5s.h:335
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5s_Psi5s.h:240
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxPsi5s_Psi5s_initModule
boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation.
Definition: IfxPsi5s_Psi5s.c:252
IfxPsi5s_Psi5s_Channel
Channel handle data structure.
Definition: IfxPsi5s_Psi5s.h:348
IfxScuCcu_getBaud2Frequency
float32 IfxScuCcu_getBaud2Frequency(void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value i...
Definition: IfxScuCcu.c:213
IfxPsi5s_Psi5s_Config::ascConfig
IfxPsi5s_Psi5s_AscConfig ascConfig
Specifies the configuration for ASC.
Definition: IfxPsi5s_Psi5s.h:376
IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5s_Psi5s.h:356
IfxPsi5s_Psi5s_initModuleConfig
void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration.
Definition: IfxPsi5s_Psi5s.c:370
IfxPsi5s_Psi5s::psi5s
Ifx_PSI5S * psi5s
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:213
IfxPsi5s_Psi5s_PulseGeneration::externalTimeBaseSelect
IfxPsi5s_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5s_Psi5s.h:279
IfxPsi5s_Psi5s_ReceiveStatus::rds
uint32 rds
received status data.
Definition: IfxPsi5s_Psi5s.h:311
IfxPsi5s_Psi5s_ReceiveControl::watchdogTimerModeSelect
IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect
Specifies the watchdog timer restart is wrt frame or sync pulse reception.
Definition: IfxPsi5s_Psi5s.h:294
IfxPsi5s_Psi5s_AscConfig::stopBits
IfxPsi5s_AscStopBits stopBits
Specifies the number of stop bits.
Definition: IfxPsi5s_Psi5s.h:228
IFXPSI5S_BG_RANGE
#define IFXPSI5S_BG_RANGE
Definition: IfxPsi5s_cfg.h:55
IfxPsi5s_Psi5s_Clock::mode
IfxPsi5s_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5s_Psi5s.h:163
IfxPsi5s_Psi5s_AscConfig::framingCheckEnabled
boolean framingCheckEnabled
Specifies whether framing check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:221
IfxPsi5s_Psi5s_AscConfig::receiveMode
IfxPsi5s_AscMode receiveMode
Specifies the mode of operation for ASC receiver.
Definition: IfxPsi5s_Psi5s.h:229
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxPsi5s_LoopBackMode_disable
loop-back mode disabled
Definition: IfxPsi5s.h:181
IfxPsi5s_DividerMode_off
divider mode is off
Definition: IfxPsi5s.h:135
IfxPsi5s_Psi5s_PulseGeneration::codeforOne
uint32 codeforOne
Specifies the code used to represent &#39;1&#39; - referred as ATXCMD.
Definition: IfxPsi5s_Psi5s.h:277
IfxPsi5s_Psi5s_GlobalControlConfig::crcErrorConsideredForRSI
boolean crcErrorConsideredForRSI
Specifies whether CRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:248
IfxPsi5s_Psi5s_getFracDivClock
IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s)
get the fracDiv clock frequency
Definition: IfxPsi5s_Psi5s.c:78
IfxPsi5s_Psi5s_AscConfig::transmitterOddParityEnabled
boolean transmitterOddParityEnabled
Specifies whether transmit parity generation should be even or odd.
Definition: IfxPsi5s_Psi5s.h:226
IfxPsi5s_Psi5s_Config::globalControlConfig
IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig
Specifies the global control configuration.
Definition: IfxPsi5s_Psi5s.h:377
IfxPsi5s_DividerMode_spb
divider mode is off
Definition: IfxPsi5s.h:132
IfxPsi5s_Psi5s_GlobalControlConfig::parityErrorConsideredForRSI
boolean parityErrorConsideredForRSI
Specifies whether PE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:251
IfxPsi5s_Psi5s_Config::timestampCounterB
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5s_Psi5s.h:375
IfxPsi5s_Psi5s_ChannelConfig::module
IFX_CONST IfxPsi5s_Psi5s * module
Specifies pointer to the IfxPsi5s_Psi5s module handle.
Definition: IfxPsi5s_Psi5s.h:358
IfxPsi5s_Psi5s_AscConfig::fractionalDividerEnabled
boolean fractionalDividerEnabled
Specifies whether fractional divider is enabled or not.
Definition: IfxPsi5s_Psi5s.h:223
IfxPsi5s_Psi5s_initializeClock
IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
Configure the fracDiv clock.
Definition: IfxPsi5s_Psi5s.c:413
IfxPsi5s_Psi5s_Frame::data
IfxPsi5s_Psi5s_ReceiveData data
Received data.
Definition: IfxPsi5s_Psi5s.h:385
IfxPsi5s_Psi5s_AscConfig::parityCheckEnabled
boolean parityCheckEnabled
Specifies whether parity check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:220
IfxPsi5s_Psi5s_Channel::channelId
IfxPsi5s_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5s_Psi5s.h:351
IfxPsi5s_Psi5s_Config::fracDiv
IfxPsi5s_Psi5s_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5s_Psi5s.h:372
IfxPsi5s_TimestampTrigger_syncPulse
Timestamp trigger on sync pulse.
Definition: IfxPsi5s.h:243
IfxPsi5s_Psi5s_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxPsi5s_Psi5s.h:266
IfxPsi5s_TriggerType_periodic
Periodic trigger.
Definition: IfxPsi5s.h:265
IfxPsi5s_Psi5s_AscConfig::baudrateSelection
IfxPsi5s_AscBaudratePrescalar baudrateSelection
Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
Definition: IfxPsi5s_Psi5s.h:230
IfxPsi5s_TimeBase_internal
Internal time stamp clock.
Definition: IfxPsi5s.h:227
IfxPsi5s_Psi5s_ChannelConfig::pulseGeneration
IfxPsi5s_Psi5s_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5s_Psi5s.h:361
IfxPsi5s_Psi5s_ReceiveData::rdr
uint32 rdr
received data with frame count
Definition: IfxPsi5s_Psi5s.h:303
IfxPsi5s_Psi5s_ReceiveControl::payloadLength
uint32 payloadLength[IFXPSI5S_NUM_SLOTS]
Specifies the payload length to be received for each slot.
Definition: IfxPsi5s_Psi5s.h:289
IfxPsi5s_Psi5s_enableModule
void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
Enable PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:72
IfxPsi5s_Psi5s_Config::pins
IFX_CONST IfxPsi5s_Psi5s_Pins * pins
structure for PSI5S pin configuration
Definition: IfxPsi5s_Psi5s.h:378
IFXPSI5S_FDV_RANGE
#define IFXPSI5S_FDV_RANGE
Definition: IfxPsi5s_cfg.h:57
IfxPsi5s_Psi5s_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxPsi5s_Psi5s.h:264
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxPsi5s_WatchdogTimerMode_frame
Watch Dog Timer is restarted on reception of each recoverable frame (async mode)
Definition: IfxPsi5s.h:283
IfxPsi5s_TriggerType_external
External trigger.
Definition: IfxPsi5s.h:266
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxPsi5s_Psi5s_AscConfig::loopbackEnabled
boolean loopbackEnabled
Specifies whether loopback is enabled or not.
Definition: IfxPsi5s_Psi5s.h:225
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:112
IfxPsi5s_Psi5s_GlobalControlConfig::xcrcErrorConsideredForRSI
boolean xcrcErrorConsideredForRSI
Specifies whether XCRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:249
IfxPsi5s_Trigger_0
Trigger 0.
Definition: IfxPsi5s.h:251
IfxPsi5s_Psi5s_Pins::clkMode
IfxPort_OutputMode clkMode
Clk as output.
Definition: IfxPsi5s_Psi5s.h:268
IfxPsi5s_Psi5s_ReceiveControl::frameIdSelect
IfxPsi5s_FrameId frameIdSelect
Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT...
Definition: IfxPsi5s_Psi5s.h:293
IfxPsi5s_initClkPin
IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a CLK output.
Definition: IfxPsi5s.h:443
IfxPsi5s_UartFrameCount_3
3 UART frames
Definition: IfxPsi5s.h:273
IfxPsi5s_Psi5s_readFrame
void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.c:520
IFXPSI5S_STEP_RANGE
#define IFXPSI5S_STEP_RANGE
Definition: IfxPsi5s_cfg.h:45
IfxPsi5s_Psi5s_AscConfig::overrunCheckEnabled
boolean overrunCheckEnabled
Specifies whether overrun check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:222
IfxPsi5s_AscBaudratePrescalar_divideBy2
Divide by 2 is selected for baudrate timer prescalar.
Definition: IfxPsi5s.h:71
IfxPsi5s_Psi5s_ReceiveControl::uartFrameCount
IfxPsi5s_UartFrameCount uartFrameCount[IFXPSI5S_NUM_SLOTS]
Specifies the expected number of UART frames per packet frame for each slot.
Definition: IfxPsi5s_Psi5s.h:295
IfxPsi5s_Psi5s_Clock::type
IfxPsi5s_ClockType type
Specifies the type of clock (fracDiv / timestamp)
Definition: IfxPsi5s_Psi5s.h:164
IfxPsi5s_initRxPin
IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a RX input.
Definition: IfxPsi5s.h:453
IfxPsi5s_Psi5s_GlobalControlConfig::headerErrorConsideredForRSI
boolean headerErrorConsideredForRSI
Specifies whether HDI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:255
IfxPsi5s_NumberExpectedFrames_1
1 psi5s frame expected
Definition: IfxPsi5s.h:197
IfxPsi5s_ClockType_ascOutput
Asc output clock.
Definition: IfxPsi5s.h:117
IfxPsi5s_Psi5s_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxPsi5s_Psi5s.h:269
IfxPsi5s_Psi5s_Config::module
Ifx_PSI5S * module
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:371
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:47
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxPsi5s_ChannelId_0
Ifx_PSI5S Channel 0.
Definition: IfxPsi5s.h:99
IfxPsi5s_Psi5s_GlobalControlConfig::transmitErrorConsideredForRSI
boolean transmitErrorConsideredForRSI
Specifies whether TEI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:250
IfxPsi5s_Psi5s_Channel::module
IfxPsi5s_Psi5s * module
The PSI5S handle structure.
Definition: IfxPsi5s_Psi5s.h:350
IfxPsi5s_Psi5s_Clock
Clock configuration data structure.
Definition: IfxPsi5s_Psi5s.h:160
IfxPsi5s_Psi5s_AscConfig::clockOutput
IfxPsi5s_Psi5s_Clock clockOutput
Specifies the output clock properties.
Definition: IfxPsi5s_Psi5s.h:232
IfxPsi5s_Psi5s_deInitModule
void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module.
Definition: IfxPsi5s_Psi5s.c:65
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxPsi5s_Psi5s_AscConfig::baudrateFrequency
uint32 baudrateFrequency
Specifies the baudrate frequency.
Definition: IfxPsi5s_Psi5s.h:227
IfxPsi5s_DividerMode_fractional
divider mode is fractional
Definition: IfxPsi5s.h:134
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:55
IfxPsi5s_Psi5s_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5s_Psi5s.h:359
IfxPsi5s_Psi5s_Config::timestampCounterA
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5s_Psi5s.h:374
IfxPsi5s_Psi5s_TransmitControl::crcGenerationControl
boolean crcGenerationControl
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:336
IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration.
Definition: IfxPsi5s_Psi5s.h:261
IfxPsi5s_Psi5s_sendChannelData
boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel.
Definition: IfxPsi5s_Psi5s.c:547
IfxPsi5s_Psi5s_ReceiveTimestamp::tsm
uint32 tsm
received timestamp along with frame count
Definition: IfxPsi5s_Psi5s.h:319
IfxPsi5s_Psi5s_ReceiveControl::timestampEnabled
boolean timestampEnabled
Specifies whether the timestamp is enabled or not.
Definition: IfxPsi5s_Psi5s.h:288
IfxPsi5s_Psi5s_TransmitControl::startSequenceGenerationControl
boolean startSequenceGenerationControl
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:337
IfxPsi5s_Psi5s_ChannelConfig::sendControl
IfxPsi5s_Psi5s_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5s_Psi5s.h:364
IfxPsi5s_Psi5s_Frame
Psi5s frame data structure.
Definition: IfxPsi5s_Psi5s.h:383
IfxPsi5s_Psi5s_GlobalControlConfig::overrunErrorConsideredForRSI
boolean overrunErrorConsideredForRSI
Specifies whether OE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:253


iLLD_TC26B: IfxPsi5s_Psi5s.h Source File

  • Psi5s
  • Psi5s
IfxPsi5s_Psi5s.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_Psi5s.h
3 * \brief PSI5S PSI5S details
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Psi5s_Psi5s_Usage How to use the PSI5S PSI5S Interface driver?
25 * \ingroup IfxLld_Psi5s
26 *
27 * PSI5S defines a current loop based serial communication link typically used to connect airbag sensors or other peripheral devices.Data transmission and configuration of the sensor can be done by modulation of the Sync Pulses.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework.
30 *
31 * \section IfxLld_Psi5s_Psi5s_Preparation Preparation
32 * \subsection IfxLld_Psi5s_Psi5s_Include Include Files
33 *
34 * Include following header file into your C code:
35 * \code
36 *
37 * #include <Psi5s/Psi5s/IfxPsi5s_Psi5s.h>
38 *
39 * \endcode
40 *
41 * \subsection IfxLld_Psi5s_Psi5s_Variables Variables
42 *
43 * \code
44 *
45 * // PSI5S handle
46 * IfxPsi5s_Psi5s psi5s;
47 *
48 * \endcode
49 *
50 * \subsection IfxLld_Psi5s_Psi5s_initModule Module Initialisation
51 * \code
52 *
53 * // create module config
54 * IfxPsi5s_Psi5s_Config psi5sModuleConfig;
55 * IfxPsi5s_Psi5s_initModuleConfig(&psi5sModuleConfig, &MODULE_PSI5S);
56 * IfxPsi5s_Psi5s_initModule(&psi5s, &psi5sModuleConfig);
57 *
58 * \endcode
59 *
60 * \subsection IfxLld_Psi5s_Psi5s_initChannel Channel Initialisation
61 * \code
62 *
63 * // create channel config
64 * IfxPsi5s_Psi5s_ChannelConfig psi5sChannelConfig;
65 * IfxPsi5s_Psi5s_initChannelConfig(&psi5sChannelConfig, &psi5s);
66 * // change channel (default is channel 0, change to channel 4)
67 * psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
68 *
69 * // change payloadlength (default is 0, i.e., no frame expecte; change to 8)
70 * for(int slot=0; slot<6; ++slot)
71 * {
72 * psi5sChannelConfig.receiveControl.payloadLength[slot] = 8;
73 * }
74 * // change channel (default is channel 0, change to channel 4)
75 * psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
76 *
77 * // initialize the channel
78 * IfxPsi5s_Psi5s_Channel psi5sChannel;
79 * IfxPsi5s_Psi5s_initChannel(&psi5sChannel, &psi5sChannelConfig);
80 *
81 * \endcode
82 *
83 * Now, PSI5S is ready. Then, call the below APIs to do operation.
84 *
85 * \subsection IfxLld_Psi5s_Psi5s_sendChannelData Send Channel Data
86 * \code
87 * uint32 channels = (1 << IfxPsi5s_ChannelId_4); // enable channel 4
88 * uint32 mask = (1 << IfxPsi5s_ChannelId_4); // modify the selection for channel 4
89 *
90 * // enable the channel trigger counter
91 * IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(&psi5s, channels, mask);
92 *
93 * // enable the channel
94 * IfxPsi5s_Psi5s_enableDisableChannels(&psi5s, channels, mask);
95 *
96 * // start ASC interface
97 * IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
98 *
99 * uint32 data = 0x5;
100 * // send data
101 * if(IfxPsi5s_Psi5s_sendChannelData(&psi5sChannel, data))
102 * {
103 * // wait till data transfer is completed
104 * while(psi5s.psi5s->INTSTAT[IfxPsi5s_ChannelId_4].B.TPI == 0);
105 * }
106 *
107 * \endcode
108 *
109 * \subsection IfxLld_Psi5s_Psi5s_readFrame Read Channel Frame
110 * \code
111 * // enable ASC receiver
112 * IfxPsi5s_Psi5s_enableAscReceiver(&psi5s);
113 *
114 * // start ASC interface
115 * IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
116 *
117 * // add the code below to initiate the sensor to transmit frames
118 * // end of code to initiate the sensor to transmit frames
119 *
120 * IfxPsi5s_Psi5s_Frame frame;
121 *
122 * while(!IfxPsi5s_Psi5s_getReadFrameStatus(psi5,IfxPsi5s_ChannelId_4));
123 *
124 * IfxPsi5s_Psi5s_readFrame(&psi5sChannel, &frame))
125 *
126 * \endcode
127 *
128 * \defgroup IfxLld_Psi5s_Psi5s PSI5S
129 * \ingroup IfxLld_Psi5s
130 * \defgroup IfxLld_Psi5s_Psi5s_Structures Data Structures
131 * \ingroup IfxLld_Psi5s_Psi5s
132 * \defgroup IfxLld_Psi5s_Psi5s_Module Module Initialise Functions
133 * \ingroup IfxLld_Psi5s_Psi5s
134 * \defgroup IfxLld_Psi5s_Psi5s_Channel Channel Functions
135 * \ingroup IfxLld_Psi5s_Psi5s
136 * \defgroup IfxLld_Psi5s_Psi5s_Utility Utility Functions
137 * \ingroup IfxLld_Psi5s_Psi5s
138 * \defgroup IfxLld_Psi5s_Psi5s_Interrupt Interrupt configuration Function
139 * \ingroup IfxLld_Psi5s_Psi5s
140 */
141
142 #ifndef IFXPSI5S_PSI5S_H
143 #define IFXPSI5S_PSI5S_H 1
144
145 /******************************************************************************/
146 /*----------------------------------Includes----------------------------------*/
147 /******************************************************************************/
148
149 #include "Psi5s/Std/IfxPsi5s.h"
150 #include "Scu/Std/IfxScuWdt.h"
151
152 /******************************************************************************/
153 /*-----------------------------Data Structures--------------------------------*/
154 /******************************************************************************/
155
156 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
157 * \{ */
158 /** \brief Clock configuration data structure
159 */
160 typedef struct
161 {
162 uint32 frequency; /**< \brief Specifies the frequency for the clock */
163 IfxPsi5s_DividerMode mode; /**< \brief Specifies the mode of division for the clock */
164 IfxPsi5s_ClockType type; /**< \brief Specifies the type of clock (fracDiv / timestamp) */
165 } IfxPsi5s_Psi5s_Clock;
166
167 /** \brief Received individual bits
168 */
169 typedef struct
170 {
171 uint8 xcrc : 6; /**< \brief Received XCRC */
172 uint8 xcrcError : 1; /**< \brief XCRC error flag */
173 uint8 crc : 3; /**< \brief Received CRC */
174 uint8 crcError : 1; /**< \brief CRC error flag */
175 uint8 errorFlag0 : 1; /**< \brief Error signalling flag 0 */
176 uint8 errorFlag1 : 1; /**< \brief Error signalling flag 1 */
177 uint8 headerErrorFlag : 1; /**< \brief Header error signalling flag */
178 uint8 ascParityErrorFlag : 1; /**< \brief ASC parity error flag */
179 uint8 ascFramingErrorFlag : 1; /**< \brief ASC framing error flag */
180 uint8 ascOverrunErrorFlag : 1; /**< \brief ASC overrun error flag */
181 uint8 watchdogTimeoutErrorFlag : 1; /**< \brief Watchdog timeout error flag */
182 uint8 receiveBufferOverflowFlag : 1; /**< \brief Receive buffer overflow flag */
183 uint8 frameId : 3; /**< \brief Frame ID */
184 uint8 channelId : 3; /**< \brief Channel ID */
185 uint8 actualUartFrameCount : 3; /**< \brief UART frames actually received */
186 uint8 packetFrameCount : 4; /**< \brief Packet frame count */
187 } IfxPsi5s_Psi5s_ReceivedBits;
188
189 /** \brief Receive data structure with different segments of data
190 */
191 typedef struct
192 {
193 uint32 readData : 28; /**< \brief Received data */
194 uint8 packetFrameCount; /**< \brief Packet frame count */
195 } IfxPsi5s_Psi5s_ReceivedData;
196
197 /** \brief Received timestamp contents structure
198 */
199 typedef struct
200 {
201 uint8 packetFrameCount : 4; /**< \brief Packet frame count */
202 uint32 timestamp : 24; /**< \brief Received data */
203 } IfxPsi5s_Psi5s_Timestamp;
204
205 /** \} */
206
207 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
208 * \{ */
209 /** \brief PSI5S handle data structure
210 */
211 typedef struct
212 {
213 Ifx_PSI5S *psi5s; /**< \brief Specifies the pointer to the PSI5S module registers */
214 } IfxPsi5s_Psi5s;
215
216 /** \brief PSI5S module configuration structure
217 */
218 typedef struct
219 {
220 boolean parityCheckEnabled; /**< \brief Specifies whether parity check is enabled or not */
221 boolean framingCheckEnabled; /**< \brief Specifies whether framing check is enabled or not */
222 boolean overrunCheckEnabled; /**< \brief Specifies whether overrun check is enabled or not */
223 boolean fractionalDividerEnabled; /**< \brief Specifies whether fractional divider is enabled or not */
224 boolean receiverOddParityEnabled; /**< \brief Specifies whether receiver parity check should be for even or odd */
225 boolean loopbackEnabled; /**< \brief Specifies whether loopback is enabled or not */
226 boolean transmitterOddParityEnabled; /**< \brief Specifies whether transmit parity generation should be even or odd */
227 uint32 baudrateFrequency; /**< \brief Specifies the baudrate frequency */
228 IfxPsi5s_AscStopBits stopBits; /**< \brief Specifies the number of stop bits */
229 IfxPsi5s_AscMode receiveMode; /**< \brief Specifies the mode of operation for ASC receiver */
230 IfxPsi5s_AscBaudratePrescalar baudrateSelection; /**< \brief Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar */
231 IfxPsi5s_AscMode transmitMode; /**< \brief Specifies the mode of operation for ASC transmitter */
232 IfxPsi5s_Psi5s_Clock clockOutput; /**< \brief Specifies the output clock properties */
233 } IfxPsi5s_Psi5s_AscConfig;
234
235 /** \brief channel trigger configuration structure
236 */
237 typedef struct
238 {
239 uint32 channelTriggerValue; /**< \brief Specifies the channel trigger value CTV */
240 uint32 channelTriggerCounter; /**< \brief Specifies the channel trigger counter */
241 } IfxPsi5s_Psi5s_ChannelTrigger;
242
243 /** \brief PSI5S global control configuration structure
244 */
245 typedef struct
246 {
247 boolean ascOnlyMode; /**< \brief Specifies if the module is in ASC only mode */
248 boolean crcErrorConsideredForRSI; /**< \brief Specifies whether CRCI is considered for RSI assertion */
249 boolean xcrcErrorConsideredForRSI; /**< \brief Specifies whether XCRCI is considered for RSI assertion */
250 boolean transmitErrorConsideredForRSI; /**< \brief Specifies whether TEI is considered for RSI assertion */
251 boolean parityErrorConsideredForRSI; /**< \brief Specifies whether PE is considered for RSI assertion */
252 boolean framingErrorConsideredForRSI; /**< \brief Specifies whether FE is considered for RSI assertion */
253 boolean overrunErrorConsideredForRSI; /**< \brief Specifies whether OE is considered for RSI assertion */
254 boolean receiveBufferErrorConsideredForRSI; /**< \brief Specifies whether RBI is considered for RSI assertion */
255 boolean headerErrorConsideredForRSI; /**< \brief Specifies whether HDI is considered for RSI assertion */
256 uint32 idleTime; /**< \brief Specifies the number of stop bits in addition to last UART frame that is required for start of frame detection */
257 } IfxPsi5s_Psi5s_GlobalControlConfig;
258
259 /** \brief Structure for PSI5S pin configuration
260 */
261 typedef struct
262 {
263 IFX_CONST IfxPsi5s_Rx_In *rx; /**< \brief PSI5S Rx pin */
264 IfxPort_InputMode rxMode; /**< \brief Rx pin as input */
265 IFX_CONST IfxPsi5s_Tx_Out *tx; /**< \brief PSI5S Tx pin */
266 IfxPort_OutputMode txMode; /**< \brief Tx as output */
267 IFX_CONST IfxPsi5s_Clk_Out *clk; /**< \brief PSI5S Clk Pin */
268 IfxPort_OutputMode clkMode; /**< \brief Clk as output */
269 IfxPort_PadDriver pinDriver; /**< \brief pad driver */
270 } IfxPsi5s_Psi5s_Pins;
271
272 /** \brief Sync pulse generation configuration structure
273 */
274 typedef struct
275 {
276 uint32 codeforZero; /**< \brief Specifies the code used to represent '0' - referred as TXCMD */
277 uint32 codeforOne; /**< \brief Specifies the code used to represent '1' - referred as ATXCMD */
278 IfxPsi5s_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTV as internal or external */
279 IfxPsi5s_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock source for CTV in the case of external */
280 IfxPsi5s_TriggerType periodicOrExternal; /**< \brief Specifies whether periodic trigger or external trigger or bypass is selected */
281 IfxPsi5s_Trigger externalTriggerSelect; /**< \brief Specifies the trigger source in case of external triggerring */
282 } IfxPsi5s_Psi5s_PulseGeneration;
283
284 /** \brief Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers
285 */
286 typedef struct
287 {
288 boolean timestampEnabled; /**< \brief Specifies whether the timestamp is enabled or not */
289 uint32 payloadLength[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the payload length to be received for each slot */
290 IfxPsi5s_CrcOrParity crcOrParity[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the crc or parity selection for the slots 0 to 5 */
291 IfxPsi5s_TimestampRegister timestampSelect; /**< \brief Specifies the timestamp register selection for pulses */
292 IfxPsi5s_TimestampTrigger timestampTriggerSelect; /**< \brief Specifies the timestamp register selection for pulses */
293 IfxPsi5s_FrameId frameIdSelect; /**< \brief Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT */
294 IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect; /**< \brief Specifies the watchdog timer restart is wrt frame or sync pulse reception */
295 IfxPsi5s_UartFrameCount uartFrameCount[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the expected number of UART frames per packet frame for each slot */
296 IfxPsi5s_NumberExpectedFrames numberOfFramesExpected; /**< \brief Specifies the number of psi5s frames expected */
297 } IfxPsi5s_Psi5s_ReceiveControl;
298
299 /** \brief "Received data" data structure
300 */
301 typedef union
302 {
303 uint32 rdr; /**< \brief received data with frame count */
304 IfxPsi5s_Psi5s_ReceivedData receivedData; /**< \brief Receive data structure with different segments of data */
305 } IfxPsi5s_Psi5s_ReceiveData;
306
307 /** \brief Receiver status data structure
308 */
309 typedef union
310 {
311 uint32 rds; /**< \brief received status data. */
312 IfxPsi5s_Psi5s_ReceivedBits receivedBits; /**< \brief Received individual bits */
313 } IfxPsi5s_Psi5s_ReceiveStatus;
314
315 /** \brief Receiver timestamp data structure
316 */
317 typedef union
318 {
319 uint32 tsm; /**< \brief received timestamp along with frame count */
320 IfxPsi5s_Psi5s_Timestamp timeStamp; /**< \brief Received timestamp contents structure */
321 } IfxPsi5s_Psi5s_ReceiveTimestamp;
322
323 /** \brief Timestamp configuration data structure
324 */
325 typedef struct
326 {
327 IfxPsi5s_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock base for counter CTS in the case of external */
328 IfxPsi5s_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTS as internal or external */
329 } IfxPsi5s_Psi5s_TimeStampConfig;
330
331 /** \brief Transmit control configuration structure
332 */
333 typedef struct
334 {
335 boolean bitStuffControl; /**< \brief Specifies whether the bit stuffing is turned on or not */
336 boolean crcGenerationControl; /**< \brief Specifies whether the crc generation is turned on or not */
337 boolean startSequenceGenerationControl; /**< \brief Specifies whether the start sequence generation is turned on or not */
338 uint32 payloadLength; /**< \brief Specifies the payload length to be sent */
339 IfxPsi5s_EnhancedProtocol enhancedProtocolSelection; /**< \brief Specifies whether the enhanced protocol is selected or not */
340 } IfxPsi5s_Psi5s_TransmitControl;
341
342 /** \} */
343
344 /** \addtogroup IfxLld_Psi5s_Psi5s_Structures
345 * \{ */
346 /** \brief Channel handle data structure
347 */
348 typedef struct
349 {
350 IfxPsi5s_Psi5s *module; /**< \brief The PSI5S handle structure */
351 IfxPsi5s_ChannelId channelId; /**< \brief Specifies the channel index */
352 } IfxPsi5s_Psi5s_Channel;
353
354 /** \brief Channel configuration structure
355 */
356 typedef struct
357 {
358 IFX_CONST IfxPsi5s_Psi5s *module; /**< \brief Specifies pointer to the IfxPsi5s_Psi5s module handle */
359 uint32 watchdogTimerLimit; /**< \brief Specifies the watchdog timer limit for each of the slots 0 to 6 */
360 IfxPsi5s_ChannelId channelId; /**< \brief Specifies the channel index */
361 IfxPsi5s_Psi5s_PulseGeneration pulseGeneration; /**< \brief Specifies the configuration for sync pulse generation */
362 IfxPsi5s_Psi5s_ChannelTrigger channelTrigger; /**< \brief Specifies the configuration for channel trigger */
363 IfxPsi5s_Psi5s_ReceiveControl receiveControl; /**< \brief Specifies the configuration for reception */
364 IfxPsi5s_Psi5s_TransmitControl sendControl; /**< \brief Specifies the configuration for transmission */
365 } IfxPsi5s_Psi5s_ChannelConfig;
366
367 /** \brief PSI5S module configuration structure
368 */
369 typedef struct
370 {
371 Ifx_PSI5S *module; /**< \brief Specifies the pointer to the PSI5S module registers */
372 IfxPsi5s_Psi5s_Clock fracDiv; /**< \brief Specifies fractionally divided clock properties */
373 IfxPsi5s_Psi5s_Clock timestampClock; /**< \brief Specifies the time stamp clock properties */
374 IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA; /**< \brief Specifies the time stamp counter A properties */
375 IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB; /**< \brief Specifies the time stamp counter B properties */
376 IfxPsi5s_Psi5s_AscConfig ascConfig; /**< \brief Specifies the configuration for ASC */
377 IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig; /**< \brief Specifies the global control configuration */
378 IFX_CONST IfxPsi5s_Psi5s_Pins *pins; /**< \brief structure for PSI5S pin configuration */
379 } IfxPsi5s_Psi5s_Config;
380
381 /** \brief Psi5s frame data structure
382 */
383 typedef struct
384 {
385 IfxPsi5s_Psi5s_ReceiveData data; /**< \brief Received data */
386 IfxPsi5s_Psi5s_ReceiveStatus status; /**< \brief Receiver status */
387 IfxPsi5s_Psi5s_ReceiveTimestamp timestamp; /**< \brief Receiver timestamp */
388 } IfxPsi5s_Psi5s_Frame;
389
390 /** \} */
391
392 /** \addtogroup IfxLld_Psi5s_Psi5s_Module
393 * \{ */
394
395 /******************************************************************************/
396 /*-------------------------Global Function Prototypes-------------------------*/
397 /******************************************************************************/
398
399 /** \brief De-initialise the PSI5S module
400 * \param psi5s pointer to the PSI5S module
401 * \return None
402 */
403 IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s);
404
405 /** \brief Initialise the PSI5S with the supplied configureation
406 * \param psi5s pointer to the PSI5S module
407 * \param config pointer to the PSI5S configuration
408 * \return TRUE if valid otherwise FALSE
409 *
410 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
411 *
412 */
413 IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config);
414
415 /** \brief Initialise buffer with default PSI5S configuration
416 * \param config pointer to the PSI5S module configuration buffer
417 * \param psi5s pointer to the PSI5S register space
418 * \return None
419 *
420 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
421 *
422 */
423 IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s);
424
425 /** \} */
426
427 /** \addtogroup IfxLld_Psi5s_Psi5s_Channel
428 * \{ */
429
430 /******************************************************************************/
431 /*-------------------------Inline Function Prototypes-------------------------*/
432 /******************************************************************************/
433
434 /** \brief Enable ASC interface receiver
435 * \param psi5s pointer to the PSI5S module
436 * \return None
437 *
438 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
439 *
440 */
441 IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s);
442
443 /** \brief Access function to enable/disable any combination of channel trigger counters selected by mask parameter
444 * \param psi5s pointer to the PSI5S module
445 * \param channels specifies the channel trigger counters which should be enabled/disabled
446 * \param mask specifies the channel trigger counters which should be modified
447 * \return None
448 *
449 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
450 *
451 */
452 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask);
453
454 /** \brief Access function to enable/disable any combination of channels selected by mask parameter
455 * \param psi5s pointer to the PSI5S module
456 * \param channels specifies the channels which should be enabled/disabled
457 * \param mask specifies the channels which should be modified
458 * \return None
459 *
460 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
461 *
462 */
463 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask);
464
465 /** \brief Start ASC transactions
466 * \param psi5s pointer to the PSI5S module
467 * \return None
468 *
469 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
470 *
471 */
472 IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s);
473
474 /******************************************************************************/
475 /*-------------------------Global Function Prototypes-------------------------*/
476 /******************************************************************************/
477
478 /** \brief Initialize the channel with the supplied configuration
479 * \param channel pointer to the PSI5S channel
480 * \param config pointer to the PSI5S channel configuration
481 * \return TRUE on success & FALSE if configuration not valid (e.g. missing resource)
482 *
483 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
484 *
485 */
486 IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config);
487
488 /** \brief Initialise buffer with default channel configuration
489 * \param config pointer to the PSI5S channel configuration
490 * \param psi5s pointer to the PSI5S module
491 * \return None
492 *
493 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
494 *
495 */
496 IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s);
497
498 /** \brief Get the received psi5s frame for the channel
499 * \param channel pointer to the PSI5S module
500 * \param frame pointer to the PSI5S frame buffer
501 * \return None
502 *
503 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
504 *
505 */
506 IFX_EXTERN void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame);
507
508 /** \brief Transmit the data through the channel
509 * \param channel pointer to the PSI5S channel
510 * \param data data to be sent
511 * \return TRUE if Sends data otherwise FALSE
512 *
513 * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
514 *
515 */
516 IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data);
517
518 /** \} */
519
520 /** \addtogroup IfxLld_Psi5s_Psi5s_Utility
521 * \{ */
522
523 /******************************************************************************/
524 /*-------------------------Global Function Prototypes-------------------------*/
525 /******************************************************************************/
526
527 /** \brief Enable PSI5S kernel
528 * \param psi5s pointer to the base of PSI5S register space
529 * \return None
530 */
531 IFX_EXTERN void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s);
532
533 /** \brief Reset PSI5S kernel
534 * \param psi5s pointer to the base of PSI5S registers
535 * \return None
536 */
537 IFX_EXTERN void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s);
538
539 /** \} */
540
541 /******************************************************************************/
542 /*-------------------------Inline Function Prototypes-------------------------*/
543 /******************************************************************************/
544
545 /** \brief Get the received psi5s frame for the channel
546 * \param psi5s pointer to the PSI5S module
547 * \param channelId specifies channelID
548 * \return return the status of Frame
549 */
550 IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId);
551
552 /******************************************************************************/
553 /*---------------------Inline Function Implementations------------------------*/
554 /******************************************************************************/
555
556 IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s)
557 {
558 IfxPsi5s_enableAscReceiver(psi5s->psi5s);
559 }
560
561
562 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
563 {
564 IfxPsi5s_enableDisableChannelTriggerCounters(psi5s->psi5s, channels, mask);
565 }
566
567
568 IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
569 {
570 IfxPsi5s_enableDisableChannels(psi5s->psi5s, channels, mask);
571 }
572
573
574 IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s)
575 {
576 IfxPsi5s_startAscTransactions(psi5s->psi5s);
577 }
578
579
580 IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
581 {
582 boolean flag = 0;
583 flag = IfxPsi5s_getReadFrameStatus(psi5s->psi5s, channelId);
584 return flag;
585 }
586
587
588 #endif /* IFXPSI5S_PSI5S_H */
IfxPsi5s_WatchdogTimerMode
IfxPsi5s_WatchdogTimerMode
MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode.
Definition: IfxPsi5s.h:281
IfxPsi5s_Psi5s_initChannelConfig
IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
Initialise buffer with default channel configuration.
Definition: IfxPsi5s_Psi5s.c:195
IfxPsi5s_Psi5s_ReceiveControl::numberOfFramesExpected
IfxPsi5s_NumberExpectedFrames numberOfFramesExpected
Specifies the number of psi5s frames expected.
Definition: IfxPsi5s_Psi5s.h:296
IfxPsi5s_Psi5s_ReceivedBits::packetFrameCount
uint8 packetFrameCount
Packet frame count.
Definition: IfxPsi5s_Psi5s.h:186
IfxPsi5s_Psi5s_ReceiveTimestamp::timeStamp
IfxPsi5s_Psi5s_Timestamp timeStamp
Received timestamp contents structure.
Definition: IfxPsi5s_Psi5s.h:320
IfxPsi5s_Psi5s_GlobalControlConfig::receiveBufferErrorConsideredForRSI
boolean receiveBufferErrorConsideredForRSI
Specifies whether RBI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:254
IfxPsi5s_Psi5s_resetModule
IFX_EXTERN void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
Reset PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:530
IfxPsi5s_Psi5s_Pins::clk
IFX_CONST IfxPsi5s_Clk_Out * clk
PSI5S Clk Pin.
Definition: IfxPsi5s_Psi5s.h:267
IfxPsi5s_Psi5s_TransmitControl::payloadLength
uint32 payloadLength
Specifies the payload length to be sent.
Definition: IfxPsi5s_Psi5s.h:338
IfxPsi5s_Psi5s_ReceivedData::readData
uint32 readData
Received data.
Definition: IfxPsi5s_Psi5s.h:193
IfxPsi5s_ChannelId
IfxPsi5s_ChannelId
PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
Definition: IfxPsi5s.h:97
IfxPsi5s_Psi5s_TransmitControl::enhancedProtocolSelection
IfxPsi5s_EnhancedProtocol enhancedProtocolSelection
Specifies whether the enhanced protocol is selected or not.
Definition: IfxPsi5s_Psi5s.h:339
IfxPsi5s_Psi5s_AscConfig
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:218
IfxPsi5s_Psi5s_ChannelConfig::channelTrigger
IfxPsi5s_Psi5s_ChannelTrigger channelTrigger
Specifies the configuration for channel trigger.
Definition: IfxPsi5s_Psi5s.h:362
IfxPsi5s_Psi5s_initChannel
IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxPsi5s_Psi5s.c:105
IfxPsi5s_Psi5s_ReceivedBits::xcrc
uint8 xcrc
Received XCRC.
Definition: IfxPsi5s_Psi5s.h:171
IfxPsi5s_Psi5s_ReceivedBits::channelId
uint8 channelId
Channel ID.
Definition: IfxPsi5s_Psi5s.h:184
IfxPsi5s_AscBaudratePrescalar
IfxPsi5s_AscBaudratePrescalar
MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select.
Definition: IfxPsi5s.h:69
IfxPsi5s_Psi5s_ReceivedBits::actualUartFrameCount
uint8 actualUartFrameCount
UART frames actually received.
Definition: IfxPsi5s_Psi5s.h:185
IfxPsi5s_Rx_In
RX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:39
IfxPsi5s_EnhancedProtocol
IfxPsi5s_EnhancedProtocol
MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types.
Definition: IfxPsi5s.h:140
IfxPsi5s_Psi5s_ReceiveControl::timestampSelect
IfxPsi5s_TimestampRegister timestampSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:291
IfxPsi5s_Psi5s_AscConfig::receiverOddParityEnabled
boolean receiverOddParityEnabled
Specifies whether receiver parity check should be for even or odd.
Definition: IfxPsi5s_Psi5s.h:224
IfxPsi5s_Psi5s_Clock::frequency
uint32 frequency
Specifies the frequency for the clock.
Definition: IfxPsi5s_Psi5s.h:162
IfxPsi5s_Psi5s_ReceiveStatus
Receiver status data structure.
Definition: IfxPsi5s_Psi5s.h:309
IfxPsi5s_Psi5s_PulseGeneration::codeforZero
uint32 codeforZero
Specifies the code used to represent &#39;0&#39; - referred as TXCMD.
Definition: IfxPsi5s_Psi5s.h:276
IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters
IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channel trigger counters selected by mask parame...
Definition: IfxPsi5s_Psi5s.h:562
IfxPsi5s_Psi5s_Config::timestampClock
IfxPsi5s_Psi5s_Clock timestampClock
Specifies the time stamp clock properties.
Definition: IfxPsi5s_Psi5s.h:373
IfxPsi5s_TimestampTrigger
IfxPsi5s_TimestampTrigger
MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger.
Definition: IfxPsi5s.h:241
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerValue
uint32 channelTriggerValue
Specifies the channel trigger value CTV.
Definition: IfxPsi5s_Psi5s.h:239
IfxPsi5s_Psi5s_PulseGeneration::timeBaseSelect
IfxPsi5s_TimeBase timeBaseSelect
Specifies the clock source for CTV as internal or external.
Definition: IfxPsi5s_Psi5s.h:278
IfxPsi5s_TimestampRegister
IfxPsi5s_TimestampRegister
MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register.
Definition: IfxPsi5s.h:233
IfxPsi5s_DividerMode
IfxPsi5s_DividerMode
MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode.
Definition: IfxPsi5s.h:130
IfxPsi5s_Psi5s_Pins::tx
IFX_CONST IfxPsi5s_Tx_Out * tx
PSI5S Tx pin.
Definition: IfxPsi5s_Psi5s.h:265
IfxPsi5s.h
PSI5S basic functionality.
IfxPsi5s_Psi5s_ReceivedBits::receiveBufferOverflowFlag
uint8 receiveBufferOverflowFlag
Receive buffer overflow flag.
Definition: IfxPsi5s_Psi5s.h:182
IfxPsi5s_Psi5s_PulseGeneration::externalTriggerSelect
IfxPsi5s_Trigger externalTriggerSelect
Specifies the trigger source in case of external triggerring.
Definition: IfxPsi5s_Psi5s.h:281
IfxPsi5s_Psi5s_ReceivedBits::ascFramingErrorFlag
uint8 ascFramingErrorFlag
ASC framing error flag.
Definition: IfxPsi5s_Psi5s.h:179
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxPsi5s_Psi5s_GlobalControlConfig::ascOnlyMode
boolean ascOnlyMode
Specifies if the module is in ASC only mode.
Definition: IfxPsi5s_Psi5s.h:247
IfxPsi5s_Psi5s_Config
PSI5S module configuration structure.
Definition: IfxPsi5s_Psi5s.h:369
IfxPsi5s_Psi5s_GlobalControlConfig::idleTime
uint32 idleTime
Specifies the number of stop bits in addition to last UART frame that is required for start of frame ...
Definition: IfxPsi5s_Psi5s.h:256
IfxPsi5s_enableAscReceiver
void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
Enable ASC receiver.
Definition: IfxPsi5s.c:50
IfxPsi5s_Psi5s_enableDisableChannels
IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
Access function to enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s_Psi5s.h:568
IfxPsi5s_Psi5s_ReceivedBits::ascParityErrorFlag
uint8 ascParityErrorFlag
ASC parity error flag.
Definition: IfxPsi5s_Psi5s.h:178
IfxPsi5s_NumberExpectedFrames
IfxPsi5s_NumberExpectedFrames
MODULE_PSI5S.NFC.NFx:Expected Psi5s frames.
Definition: IfxPsi5s.h:195
IfxPsi5s_Psi5s_GlobalControlConfig::framingErrorConsideredForRSI
boolean framingErrorConsideredForRSI
Specifies whether FE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:252
IfxPsi5s_Psi5s_PulseGeneration::periodicOrExternal
IfxPsi5s_TriggerType periodicOrExternal
Specifies whether periodic trigger or external trigger or bypass is selected.
Definition: IfxPsi5s_Psi5s.h:280
IfxPsi5s_Psi5s
PSI5S handle data structure.
Definition: IfxPsi5s_Psi5s.h:211
IfxPsi5s_Psi5s_ReceivedData
Receive data structure with different segments of data.
Definition: IfxPsi5s_Psi5s.h:191
IfxPsi5s_Psi5s_ReceiveControl::timestampTriggerSelect
IfxPsi5s_TimestampTrigger timestampTriggerSelect
Specifies the timestamp register selection for pulses.
Definition: IfxPsi5s_Psi5s.h:292
IfxPsi5s_Psi5s_Pins::rx
IFX_CONST IfxPsi5s_Rx_In * rx
PSI5S Rx pin.
Definition: IfxPsi5s_Psi5s.h:263
IfxPsi5s_Psi5s_AscConfig::transmitMode
IfxPsi5s_AscMode transmitMode
Specifies the mode of operation for ASC transmitter.
Definition: IfxPsi5s_Psi5s.h:231
IfxPsi5s_Psi5s_Frame::status
IfxPsi5s_Psi5s_ReceiveStatus status
Receiver status.
Definition: IfxPsi5s_Psi5s.h:386
IfxPsi5s_Psi5s_ReceiveData
"Received data" data structure
Definition: IfxPsi5s_Psi5s.h:301
IfxPsi5s_Psi5s_ChannelConfig::receiveControl
IfxPsi5s_Psi5s_ReceiveControl receiveControl
Specifies the configuration for reception.
Definition: IfxPsi5s_Psi5s.h:363
IfxPsi5s_Psi5s_PulseGeneration
Sync pulse generation configuration structure.
Definition: IfxPsi5s_Psi5s.h:274
IfxScuWdt.h
SCU basic functionality.
IfxPsi5s_Psi5s_Frame::timestamp
IfxPsi5s_Psi5s_ReceiveTimestamp timestamp
Receiver timestamp.
Definition: IfxPsi5s_Psi5s.h:387
IfxPsi5s_Psi5s_TransmitControl::bitStuffControl
boolean bitStuffControl
Specifies whether the bit stuffing is turned on or not.
Definition: IfxPsi5s_Psi5s.h:335
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxPsi5s_Psi5s_ReceivedBits::errorFlag0
uint8 errorFlag0
Error signalling flag 0.
Definition: IfxPsi5s_Psi5s.h:175
IfxPsi5s_Psi5s_ChannelTrigger::channelTriggerCounter
uint32 channelTriggerCounter
Specifies the channel trigger counter.
Definition: IfxPsi5s_Psi5s.h:240
IfxPsi5s_Psi5s_enableAscReceiver
IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s)
Enable ASC interface receiver.
Definition: IfxPsi5s_Psi5s.h:556
IfxPsi5s_Psi5s_initModule
IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
Initialise the PSI5S with the supplied configureation.
Definition: IfxPsi5s_Psi5s.c:252
IfxPsi5s_Psi5s_Channel
Channel handle data structure.
Definition: IfxPsi5s_Psi5s.h:348
IfxPsi5s_Psi5s_Config::ascConfig
IfxPsi5s_Psi5s_AscConfig ascConfig
Specifies the configuration for ASC.
Definition: IfxPsi5s_Psi5s.h:376
IfxPsi5s_Psi5s_ChannelConfig
Channel configuration structure.
Definition: IfxPsi5s_Psi5s.h:356
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxPsi5s_Psi5s_initModuleConfig
IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
Initialise buffer with default PSI5S configuration.
Definition: IfxPsi5s_Psi5s.c:370
IfxPsi5s_Psi5s::psi5s
Ifx_PSI5S * psi5s
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:213
IfxPsi5s_Psi5s_ReceivedBits::xcrcError
uint8 xcrcError
XCRC error flag.
Definition: IfxPsi5s_Psi5s.h:172
IfxPsi5s_Psi5s_PulseGeneration::externalTimeBaseSelect
IfxPsi5s_Trigger externalTimeBaseSelect
Specifies the clock source for CTV in the case of external.
Definition: IfxPsi5s_Psi5s.h:279
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxPsi5s_Psi5s_ReceiveStatus::rds
uint32 rds
received status data.
Definition: IfxPsi5s_Psi5s.h:311
IfxPsi5s_TriggerType
IfxPsi5s_TriggerType
Trigger type defined in.
Definition: IfxPsi5s.h:263
IfxPsi5s_FrameId
IfxPsi5s_FrameId
MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation.
Definition: IfxPsi5s.h:149
IfxPsi5s_Psi5s_ReceivedBits::frameId
uint8 frameId
Frame ID.
Definition: IfxPsi5s_Psi5s.h:183
IfxPsi5s_Psi5s_ReceiveControl::watchdogTimerModeSelect
IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect
Specifies the watchdog timer restart is wrt frame or sync pulse reception.
Definition: IfxPsi5s_Psi5s.h:294
IfxPsi5s_Psi5s_ReceivedBits::errorFlag1
uint8 errorFlag1
Error signalling flag 1.
Definition: IfxPsi5s_Psi5s.h:176
IfxPsi5s_Psi5s_getReadFrameStatus
IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.h:580
IfxPsi5s_Psi5s_AscConfig::stopBits
IfxPsi5s_AscStopBits stopBits
Specifies the number of stop bits.
Definition: IfxPsi5s_Psi5s.h:228
IfxPsi5s_Psi5s_Clock::mode
IfxPsi5s_DividerMode mode
Specifies the mode of division for the clock.
Definition: IfxPsi5s_Psi5s.h:163
IfxPsi5s_Psi5s_AscConfig::framingCheckEnabled
boolean framingCheckEnabled
Specifies whether framing check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:221
IfxPsi5s_Trigger
IfxPsi5s_Trigger
MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id.
Definition: IfxPsi5s.h:249
IfxPsi5s_Psi5s_AscConfig::receiveMode
IfxPsi5s_AscMode receiveMode
Specifies the mode of operation for ASC receiver.
Definition: IfxPsi5s_Psi5s.h:229
IfxPsi5s_Psi5s_PulseGeneration::codeforOne
uint32 codeforOne
Specifies the code used to represent &#39;1&#39; - referred as ATXCMD.
Definition: IfxPsi5s_Psi5s.h:277
IfxPsi5s_startAscTransactions
void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
Start ASC transactions.
Definition: IfxPsi5s.c:103
IfxPsi5s_Psi5s_GlobalControlConfig::crcErrorConsideredForRSI
boolean crcErrorConsideredForRSI
Specifies whether CRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:248
IfxPsi5s_Psi5s_Timestamp
Received timestamp contents structure.
Definition: IfxPsi5s_Psi5s.h:199
IfxPsi5s_Psi5s_AscConfig::transmitterOddParityEnabled
boolean transmitterOddParityEnabled
Specifies whether transmit parity generation should be even or odd.
Definition: IfxPsi5s_Psi5s.h:226
IfxPsi5s_Psi5s_GlobalControlConfig
PSI5S global control configuration structure.
Definition: IfxPsi5s_Psi5s.h:245
IfxPsi5s_Psi5s_Config::globalControlConfig
IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig
Specifies the global control configuration.
Definition: IfxPsi5s_Psi5s.h:377
IfxPsi5s_Psi5s_GlobalControlConfig::parityErrorConsideredForRSI
boolean parityErrorConsideredForRSI
Specifies whether PE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:251
IfxPsi5s_Psi5s_TimeStampConfig
Timestamp configuration data structure.
Definition: IfxPsi5s_Psi5s.h:325
IfxPsi5s_Psi5s_Config::timestampCounterB
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB
Specifies the time stamp counter B properties.
Definition: IfxPsi5s_Psi5s.h:375
IfxPsi5s_Psi5s_ChannelConfig::module
IFX_CONST IfxPsi5s_Psi5s * module
Specifies pointer to the IfxPsi5s_Psi5s module handle.
Definition: IfxPsi5s_Psi5s.h:358
IfxPsi5s_Psi5s_ReceiveTimestamp
Receiver timestamp data structure.
Definition: IfxPsi5s_Psi5s.h:317
IfxPsi5s_Psi5s_AscConfig::fractionalDividerEnabled
boolean fractionalDividerEnabled
Specifies whether fractional divider is enabled or not.
Definition: IfxPsi5s_Psi5s.h:223
IfxPsi5s_Psi5s_Frame::data
IfxPsi5s_Psi5s_ReceiveData data
Received data.
Definition: IfxPsi5s_Psi5s.h:385
IfxPsi5s_Psi5s_AscConfig::parityCheckEnabled
boolean parityCheckEnabled
Specifies whether parity check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:220
IfxPsi5s_Psi5s_Channel::channelId
IfxPsi5s_ChannelId channelId
Specifies the channel index.
Definition: IfxPsi5s_Psi5s.h:351
IfxPsi5s_Psi5s_Config::fracDiv
IfxPsi5s_Psi5s_Clock fracDiv
Specifies fractionally divided clock properties.
Definition: IfxPsi5s_Psi5s.h:372
IFXPSI5S_NUM_SLOTS
#define IFXPSI5S_NUM_SLOTS
Definition: IfxPsi5s_cfg.h:49
IfxPsi5s_AscMode
IfxPsi5s_AscMode
MODULE_PSI5S.CON.M:ASC mode of operation.
Definition: IfxPsi5s.h:77
IfxPsi5s_getReadFrameStatus
boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s.c:72
IfxPsi5s_Psi5s_ReceivedBits::ascOverrunErrorFlag
uint8 ascOverrunErrorFlag
ASC overrun error flag.
Definition: IfxPsi5s_Psi5s.h:180
IfxPsi5s_Psi5s_Pins::txMode
IfxPort_OutputMode txMode
Tx as output.
Definition: IfxPsi5s_Psi5s.h:266
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxPsi5s_Psi5s_AscConfig::baudrateSelection
IfxPsi5s_AscBaudratePrescalar baudrateSelection
Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar.
Definition: IfxPsi5s_Psi5s.h:230
IfxPsi5s_Psi5s_ChannelConfig::pulseGeneration
IfxPsi5s_Psi5s_PulseGeneration pulseGeneration
Specifies the configuration for sync pulse generation.
Definition: IfxPsi5s_Psi5s.h:361
IfxPsi5s_Psi5s_ReceiveData::rdr
uint32 rdr
received data with frame count
Definition: IfxPsi5s_Psi5s.h:303
IfxPsi5s_Psi5s_startAscTransactions
IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s)
Start ASC transactions.
Definition: IfxPsi5s_Psi5s.h:574
IfxPsi5s_Psi5s_enableModule
IFX_EXTERN void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
Enable PSI5S kernel.
Definition: IfxPsi5s_Psi5s.c:72
IfxPsi5s_Psi5s_Timestamp::timestamp
uint32 timestamp
Received data.
Definition: IfxPsi5s_Psi5s.h:202
IfxPsi5s_Psi5s_Config::pins
IFX_CONST IfxPsi5s_Psi5s_Pins * pins
structure for PSI5S pin configuration
Definition: IfxPsi5s_Psi5s.h:378
IfxPsi5s_Psi5s_Pins::rxMode
IfxPort_InputMode rxMode
Rx pin as input.
Definition: IfxPsi5s_Psi5s.h:264
IfxPsi5s_Psi5s_ReceivedBits
Received individual bits.
Definition: IfxPsi5s_Psi5s.h:169
IfxPsi5s_Psi5s_AscConfig::loopbackEnabled
boolean loopbackEnabled
Specifies whether loopback is enabled or not.
Definition: IfxPsi5s_Psi5s.h:225
IfxPsi5s_ClockType
IfxPsi5s_ClockType
Clock Selection.
Definition: IfxPsi5s.h:112
IfxPsi5s_Psi5s_GlobalControlConfig::xcrcErrorConsideredForRSI
boolean xcrcErrorConsideredForRSI
Specifies whether XCRCI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:249
IfxPsi5s_Psi5s_Pins::clkMode
IfxPort_OutputMode clkMode
Clk as output.
Definition: IfxPsi5s_Psi5s.h:268
IfxPsi5s_Psi5s_ReceiveControl::frameIdSelect
IfxPsi5s_FrameId frameIdSelect
Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT...
Definition: IfxPsi5s_Psi5s.h:293
IfxPsi5s_Psi5s_ReceiveData::receivedData
IfxPsi5s_Psi5s_ReceivedData receivedData
Receive data structure with different segments of data.
Definition: IfxPsi5s_Psi5s.h:304
IfxPsi5s_Psi5s_ChannelTrigger
channel trigger configuration structure
Definition: IfxPsi5s_Psi5s.h:237
IfxPsi5s_Psi5s_TransmitControl
Transmit control configuration structure.
Definition: IfxPsi5s_Psi5s.h:333
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxPsi5s_Psi5s_readFrame
IFX_EXTERN void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
Get the received psi5s frame for the channel.
Definition: IfxPsi5s_Psi5s.c:520
IfxPsi5s_Psi5s_AscConfig::overrunCheckEnabled
boolean overrunCheckEnabled
Specifies whether overrun check is enabled or not.
Definition: IfxPsi5s_Psi5s.h:222
IfxPsi5s_CrcOrParity
IfxPsi5s_CrcOrParity
MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity.
Definition: IfxPsi5s.h:122
IfxPsi5s_UartFrameCount
IfxPsi5s_UartFrameCount
MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count.
Definition: IfxPsi5s.h:271
IfxPsi5s_Psi5s_Clock::type
IfxPsi5s_ClockType type
Specifies the type of clock (fracDiv / timestamp)
Definition: IfxPsi5s_Psi5s.h:164
IfxPsi5s_Psi5s_GlobalControlConfig::headerErrorConsideredForRSI
boolean headerErrorConsideredForRSI
Specifies whether HDI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:255
IfxPsi5s_Psi5s_ReceivedBits::crc
uint8 crc
Received CRC.
Definition: IfxPsi5s_Psi5s.h:173
IfxPsi5s_Psi5s_ReceiveControl
Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers...
Definition: IfxPsi5s_Psi5s.h:286
IfxPsi5s_Psi5s_Pins::pinDriver
IfxPort_PadDriver pinDriver
pad driver
Definition: IfxPsi5s_Psi5s.h:269
IfxPsi5s_enableDisableChannelTriggerCounters
void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channel trigger counters selected by mask parameter.
Definition: IfxPsi5s.c:56
IfxPsi5s_Psi5s_Config::module
Ifx_PSI5S * module
Specifies the pointer to the PSI5S module registers.
Definition: IfxPsi5s_Psi5s.h:371
IfxPsi5s_Tx_Out
TX pin mapping structure.
Definition: IfxPsi5s_PinMap.h:47
IfxPsi5s_AscStopBits
IfxPsi5s_AscStopBits
MODULE_PSI5S.CON.STP: Number of stop bits.
Definition: IfxPsi5s.h:89
IfxPsi5s_Psi5s_GlobalControlConfig::transmitErrorConsideredForRSI
boolean transmitErrorConsideredForRSI
Specifies whether TEI is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:250
IfxPsi5s_Psi5s_Channel::module
IfxPsi5s_Psi5s * module
The PSI5S handle structure.
Definition: IfxPsi5s_Psi5s.h:350
IfxPsi5s_Psi5s_Clock
Clock configuration data structure.
Definition: IfxPsi5s_Psi5s.h:160
IfxPsi5s_Psi5s_AscConfig::clockOutput
IfxPsi5s_Psi5s_Clock clockOutput
Specifies the output clock properties.
Definition: IfxPsi5s_Psi5s.h:232
IfxPsi5s_Psi5s_ReceivedBits::headerErrorFlag
uint8 headerErrorFlag
Header error signalling flag.
Definition: IfxPsi5s_Psi5s.h:177
IfxPsi5s_Psi5s_deInitModule
IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
De-initialise the PSI5S module.
Definition: IfxPsi5s_Psi5s.c:65
IfxPsi5s_enableDisableChannels
void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
Enable/disable any combination of channels selected by mask parameter.
Definition: IfxPsi5s.c:64
IfxPsi5s_Psi5s_ReceivedBits::crcError
uint8 crcError
CRC error flag.
Definition: IfxPsi5s_Psi5s.h:174
IfxPsi5s_Psi5s_ReceivedBits::watchdogTimeoutErrorFlag
uint8 watchdogTimeoutErrorFlag
Watchdog timeout error flag.
Definition: IfxPsi5s_Psi5s.h:181
IfxPsi5s_Psi5s_AscConfig::baudrateFrequency
uint32 baudrateFrequency
Specifies the baudrate frequency.
Definition: IfxPsi5s_Psi5s.h:227
IfxPsi5s_Clk_Out
CLK pin mapping structure.
Definition: IfxPsi5s_PinMap.h:55
IfxPsi5s_Psi5s_ChannelConfig::watchdogTimerLimit
uint32 watchdogTimerLimit
Specifies the watchdog timer limit for each of the slots 0 to 6.
Definition: IfxPsi5s_Psi5s.h:359
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxPsi5s_Psi5s_Config::timestampCounterA
IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA
Specifies the time stamp counter A properties.
Definition: IfxPsi5s_Psi5s.h:374
IfxPsi5s_TimeBase
IfxPsi5s_TimeBase
MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base.
Definition: IfxPsi5s.h:225
IfxPsi5s_Psi5s_TransmitControl::crcGenerationControl
boolean crcGenerationControl
Specifies whether the crc generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:336
IfxPsi5s_Psi5s_ReceiveStatus::receivedBits
IfxPsi5s_Psi5s_ReceivedBits receivedBits
Received individual bits.
Definition: IfxPsi5s_Psi5s.h:312
IfxPsi5s_Psi5s_Pins
Structure for PSI5S pin configuration.
Definition: IfxPsi5s_Psi5s.h:261
IfxPsi5s_Psi5s_sendChannelData
IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
Transmit the data through the channel.
Definition: IfxPsi5s_Psi5s.c:547
IfxPsi5s_Psi5s_ReceiveTimestamp::tsm
uint32 tsm
received timestamp along with frame count
Definition: IfxPsi5s_Psi5s.h:319
IfxPsi5s_Psi5s_ReceiveControl::timestampEnabled
boolean timestampEnabled
Specifies whether the timestamp is enabled or not.
Definition: IfxPsi5s_Psi5s.h:288
IfxPsi5s_Psi5s_TransmitControl::startSequenceGenerationControl
boolean startSequenceGenerationControl
Specifies whether the start sequence generation is turned on or not.
Definition: IfxPsi5s_Psi5s.h:337
IfxPsi5s_Psi5s_ChannelConfig::sendControl
IfxPsi5s_Psi5s_TransmitControl sendControl
Specifies the configuration for transmission.
Definition: IfxPsi5s_Psi5s.h:364
IfxPsi5s_Psi5s_Frame
Psi5s frame data structure.
Definition: IfxPsi5s_Psi5s.h:383
IfxPsi5s_Psi5s_GlobalControlConfig::overrunErrorConsideredForRSI
boolean overrunErrorConsideredForRSI
Specifies whether OE is considered for RSI assertion.
Definition: IfxPsi5s_Psi5s.h:253


iLLD_TC26B: IfxPsi5s_cfg.h Source File

  • _Impl
IfxPsi5s_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxPsi5s_cfg.h
3 * \brief PSI5S on-chip implementation data
4 * \ingroup IfxLld_Psi5s
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Psi5s PSI5S
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Psi5s_Impl Implementation
27 * \ingroup IfxLld_Psi5s
28 * \defgroup IfxLld_Psi5s_Std Standard Driver
29 * \ingroup IfxLld_Psi5s
30 */
31
32 #ifndef IFXPSI5S_CFG_H
33 #define IFXPSI5S_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 /******************************************************************************/
40 /*-----------------------------------Macros-----------------------------------*/
41 /******************************************************************************/
42
43 #define IFXPSI5S_NUM_CHANNELS 8
44
45 #define IFXPSI5S_STEP_RANGE 1024
46
47 #define IFXPSI5S_NUM_WDTS 7
48
49 #define IFXPSI5S_NUM_SLOTS 6
50
51 #define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)
52
53 #define IFXPSI5S_ENABLE_CHANNEL (1 << 16)
54
55 #define IFXPSI5S_BG_RANGE 8192
56
57 #define IFXPSI5S_FDV_RANGE 2048
58
59 #define IFXPSI5S_BAUDRATE_1562500 1562500
60
61 /** \brief //0x00FF0000
62 */
63 #define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16
64
65 #define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8
66
67 #define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000
68
69 #define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000
70
71 #define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000
72
73 #define IFXPSI5S_NUM_MODULES (1)
74
75 #endif /* IFXPSI5S_CFG_H */


iLLD_TC26B: IfxQspi.c Source File

  • Qspi
  • Std
IfxQspi.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi.c
3 * \brief QSPI basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxQspi.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
36 {
37 int cs = channelId % 8;
38 float fQspi = IfxScuCcu_getMaxFrequency();
39 Ifx_QSPI_ECON econ[8];
40 econ[cs].U = qspi->ECON[cs].U;
41 fQspi = fQspi / (qspi->GLOBALCON.B.TQ + 1);
42 fQspi = fQspi / (econ[cs].B.Q + 1);
43 fQspi = fQspi / ((econ[cs].B.A + 1) + econ[cs].B.B + econ[cs].B.C);
44 return fQspi;
45 }
46
47
48 uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
49 {
50 IFX_UNUSED_PARAMETER(baudrate);
51
52 Ifx_QSPI_BACON bacon;
53 IfxQspi_DelayConst delayConst[3];
54 bacon.U = 0;
55
56 IfxQspi_calculateDelayConstants(qspi, channelId, chMode, delayConst);
57
58 bacon.B.LAST = 0; /* 1-bits Last Word in a Frame, will be set via recalcBasicConfiguration before transfer */
59
60 bacon.B.IPRE = delayConst[0].pre; /* 3-bits Prescaler for the Idle Delay */
61 bacon.B.IDLE = delayConst[0].delay; /* 3-bits Idle Delay Length */
62 bacon.B.LPRE = delayConst[1].pre; /* 3-bits Prescaler for the Leading Delay */
63 bacon.B.LEAD = delayConst[1].delay; /* 3-bits Leading Delay Length */
64 bacon.B.TPRE = delayConst[2].pre; /* 3-bits Prescaler for the Trailing Delay */
65 bacon.B.TRAIL = delayConst[2].delay; /* 2-bits Trailing Delay Length */
66 bacon.B.PARTYP = (chMode->parityMode == Ifx_ParityMode_even) ? 0 : 1;
67 bacon.B.UINT = 0; /* 1-bits User Interrupt at the PT1 Event in the Subsequent Frames */
68 bacon.B.MSB = (chMode->dataHeading == SpiIf_DataHeading_lsbFirst) ? 0 : 1;
69 bacon.B.BYTE = 0; /* only support bitwise selection in B.DL */
70 bacon.B.DL = chMode->dataWidth - 1;
71 bacon.B.CS = channelId;
72
73 return bacon.U;
74 }
75
76
77 uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
78 {
79 IFX_UNUSED_PARAMETER(cs);
80
81 Ifx_QSPI_ECON econ;
82 econ.U = 0;
83
84 const int maxB = 3;
85 float32 tQspi = 1.0 / IfxQspi_getTimeQuantaFrequency(qspi);
86 float32 fBaud = (chConfig->baudrate);
87 int abcMin = (2);
88 int abcMax = (4 + 0 + 4);
89 int q, bestQ = 1, abc, bestAbc = abcMax, halfBaud = 0;
90 sint8 diffB = 0;
91 float32 error, bestError;
92 float32 tTmp, tBaudTmp;
93 boolean done = FALSE;
94
95 if (fBaud == 0.0)
96 {
97 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE); /* chosen baud rate is 0 */
98 fBaud = 1.0;
99 }
100
101 float32 tBaud = 1.0 / fBaud;
102
103 bestError = 1e6;
104
105 for (abc = abcMax; abc >= abcMin; abc--)
106 {
107 tTmp = tQspi * abc;
108 q = (int)((tBaud / tTmp) + 0.5);
109
110 if (q > 64)
111 {
112 q = 64;
113 }
114
115 else if ((q * abc) < 4)
116 {
117 q = 2;
118 }
119
120 else if (q < 1)
121 {
122 q = 1;
123 }
124
125 tBaudTmp = tTmp * q;
126 error = __absf(tBaudTmp - tBaud);
127
128 if (__leqf(error, bestError)) /* we have a equal/better error case */
129 {
130 /* process this case only if lesser error / or if ABC is even */
131 if (__neqf(error, bestError) || (((uint32)bestAbc & (uint32)0x1) == 0))
132 {
133 bestError = error;
134 bestAbc = abc;
135 bestQ = q;
136 }
137
138 /* break out if ABC is even and error = 0 */
139 if (((uint32)bestAbc & (uint32)0x1) == 0)
140 {
141 done = (__neqf(error, 0.0)) ? FALSE : TRUE;
142
143 if (done != FALSE)
144 {
145 break;
146 }
147 }
148 }
149 }
150
151 /* Exchange Q and ABC, if ABC is odd and Q is even.
152 * This is because: A+1+B+C is ideally even for
153 * achieving 50% duty cycle of the clock.
154 */
155 if ((bestQ <= abcMax)
156 && (((uint32)bestAbc & (uint32)0x1) != 0)
157 && (((uint32)bestQ & (uint32)0x1) == 0))
158 {
159 q = bestQ;
160 bestQ = bestAbc;
161 bestAbc = q;
162 }
163
164 /* NOTE: In assigning values to A,B,C:
165 * the "sampling point" (which is A+B) has to be as far as possible
166 * from the "shifting point" (end of A+B+C).
167 * The duty cycle is calculated as the ratio of A : B+C
168 * Therefore, to keep 50% duty cycle: A = B+C
169 * Thus, we cannot influence the value of A, once A+B+C is found out
170 * (A+1 is always (A+B+C)/2).
171 * However, in between B and C - we should try to maximize B (and minimize C).
172 * The goal will be to do this - keep max value of B always and keep only any remaining value for C .
173 */
174 halfBaud = bestAbc / 2;
175 diffB = halfBaud - maxB;
176
177 econ.B.Q = bestQ - 1;
178 econ.B.A = halfBaud + (bestAbc % 2) - 1; /* A + 1 = Half of Baud count */
179 econ.B.C = (diffB > 0) ? diffB : 0;
180 econ.B.B = (diffB > 0) ? maxB : halfBaud;
181
182 econ.B.CPH = (chConfig->mode.shiftClock == SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge) ? 1 : 0;
183 econ.B.CPOL = (chConfig->mode.clockPolarity == SpiIf_ClockPolarity_idleLow) ? 0 : 1;
184 econ.B.PAREN = chConfig->mode.parityCheck;
185
186 return econ.U;
187 }
188
189
190 uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
191 {
192 float error, bestError;
193 float halfBaud = baudrate / 2;
194 float fQspiIn = IfxQspi_getModuleFrequency(qspi);
195 bestError = 10e6;
196 uint32 i, bestPre = 0;
197
198 for (i = 0; i < 8; i++)
199 {
200 float tempHalfBaud = fQspiIn / (1U << (4 * i));
201 error = __absf(tempHalfBaud - halfBaud);
202
203 if (__leqf(error, bestError))
204 {
205 bestError = error;
206 bestPre = i;
207 }
208 }
209
210 return bestPre;
211 }
212
213
214 uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
215 {
216 #define ABCQMIN (4)
217 #define ABCQMAX (8 * 63)
218
219 IFX_UNUSED_PARAMETER(qspi);
220
221 uint32 abcq = ABCQMIN, tq, bestTq;
222 float realTQ, deltaMax, bestDelta, achievedMax;
223 float fQspi = IfxScuCcu_getMaxFrequency();
224
225 if (__leqf(maxBaudrate, 0.0))
226 {
227 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE); /* Max baud rate is 0!! */
228 }
229
230 realTQ = fQspi / (4.0 * maxBaudrate);
231 bestTq = __max((uint32)__roundf(realTQ), 1);
232 bestDelta = __absf(maxBaudrate - (fQspi / bestTq));
233
234 for (abcq = ABCQMIN; abcq <= ABCQMAX; abcq++)
235 {
236 realTQ = fQspi / (maxBaudrate * abcq);
237 tq = (uint32)(realTQ + 0.5);
238 achievedMax = fQspi / (tq * abcq);
239 deltaMax = __absf(maxBaudrate - achievedMax);
240
241 if (__leqf(deltaMax, bestDelta) && (tq >= 1))
242 {
243 bestDelta = deltaMax;
244 bestTq = tq;
245 }
246
247 if ((bestDelta == 0) || (tq < 1))
248 {
249 break; //exit the for loop
250 }
251 }
252
253 return __max(bestTq - 1, 0);
254 }
255
256
257 Ifx_QSPI *IfxQspi_getAddress(IfxQspi_Index qspi)
258 {
259 Ifx_QSPI *module;
260
261 if (qspi < IFXQSPI_NUM_MODULES)
262 {
263 module = (Ifx_QSPI *)IfxQspi_cfg_indexMap[qspi].module;
264 }
265 else
266 {
267 module = NULL_PTR;
268 }
269
270 return module;
271 }
272
273
274 IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
275 {
276 uint32 index;
277 IfxQspi_Index result;
278
279 result = IfxQspi_Index_none;
280
281 for (index = 0; index < IFXQSPI_NUM_MODULES; index++)
282 {
283 if (IfxQspi_cfg_indexMap[index].module == qspi)
284 {
285 result = (IfxQspi_Index)IfxQspi_cfg_indexMap[index].index;
286 break;
287 }
288 }
289
290 return result;
291 }
292
293
294 void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
295 {
296 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
297
298 while (count > 0)
299 {
300 *(data++) = (uint16)rxFifo->U;
301 count--;
302 }
303 }
304
305
306 void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
307 {
308 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
309
310 while (count > 0)
311 {
312 *(data++) = rxFifo->U;
313 count--;
314 }
315 }
316
317
318 void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
319 {
320 volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
321
322 while (count > 0)
323 {
324 *(data++) = (uint8)rxFifo->U;
325 count--;
326 }
327 }
328
329
330 uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
331 {
332 Ifx_QSPI_BACON bacon;
333 bacon.U = oldBACON;
334
335 if (shortData == FALSE)
336 {
337 bacon.B.DL = numOfData;
338 bacon.B.BYTE = 1;
339 }
340
341 bacon.B.LAST = lastData;
342 return bacon.U;
343 }
344
345
346 void IfxQspi_resetModule(Ifx_QSPI *qspi)
347 {
348 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
349 IfxScuWdt_clearCpuEndinit(passwd);
350 qspi->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
351 qspi->KRST1.B.RST = 1;
352 IfxScuWdt_setCpuEndinit(passwd);
353
354 while (0 == qspi->KRST0.B.RSTSTAT) /* Wait until reset is executed */
355
356 {}
357
358 IfxScuWdt_clearCpuEndinit(passwd);
359 qspi->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
360 IfxScuWdt_setCpuEndinit(passwd);
361 }
362
363
364 void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
365 {
366 uint16 mask = 1 << channelId;
367
368 Ifx_QSPI_SSOC ssoc;
369 ssoc.U = qspi->SSOC.U;
370
371 if (outputEnable)
372 {
373 ssoc.B.OEN |= mask;
374 }
375 else
376 {
377 ssoc.B.OEN &= ~mask;
378 }
379
380 if (activeLevel)
381 {
382 ssoc.B.AOL |= mask;
383 }
384 else
385 {
386 ssoc.B.AOL &= ~mask;
387 }
388
389 qspi->SSOC.U = ssoc.U;
390 }
391
392
393 void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
394 {
395 int cs = channelId % 8;
396 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
397
398 while (count > 0)
399 {
400 dataEntry->U = *(data++);
401 count--;
402 }
403 }
404
405
406 void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
407 {
408 int cs = channelId % 8;
409 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
410
411 while (count > 0)
412 {
413 dataEntry->U = *(data++);
414 count--;
415 }
416 }
417
418
419 void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
420 {
421 int cs = channelId % 8;
422 volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
423
424 while (count > 0)
425 {
426 dataEntry->U = *(data++);
427 count--;
428 }
429 }
430
431
432 void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
433 {
434 uint32 divFactor;
435 const SpiIf_SlsoTiming_HalfTsclk *dlyFactorPtr;
436 float32 scaleTemp;
437 uint8 preTemp;
438 uint8 preFinal = 0U;
439 uint8 delayTemp;
440 uint8 delayFinal = 0U;
441 boolean matchFound;
442 uint8 index;
443 uint8 cs = channelId % 8;
444
445 /* obtain the peripheral frequency / sclk frequency multiplication factor */
446 divFactor = (qspi->GLOBALCON.B.TQ + 1) * (qspi->ECON[cs].B.Q + 1) * (qspi->ECON[cs].B.A + 1 + qspi->ECON[cs].B.B + qspi->ECON[cs].B.C);
447
448 /* The user defined delay factor is here - point to it */
449 dlyFactorPtr = &(chMode->csInactiveDelay);
450
451 for (index = 0; index < 3; index++)
452 {
453 /* multiply the div_factor and delay_factor and divide by 2 - this is product of (4^pre)*(delay_mult) */
454 scaleTemp = (dlyFactorPtr[index] * divFactor) / (float32)2.0;
455
456 /* loop through the possible pre values to find pre and delay */
457 matchFound = FALSE;
458
459 for (preTemp = 0; preTemp < 8; preTemp++)
460 {
461 delayTemp = (uint8)((scaleTemp / (1 << (2 * preTemp))) + 0.5); /* divide the scale_temp by ( 4 ^ pre_temp) to find delay_temp */
462
463 if (delayTemp <= 8) /* if delay_temp is <= 8; we can get a good value pair */
464 {
465 if ((float32)(delayTemp << (2 * preTemp)) >= scaleTemp) /* greater delays are tolerated. less is not */
466 {
467 delayFinal = __max(delayTemp - 1, 0); /* subtract 1 to set to register */
468 preFinal = preTemp;
469 matchFound = TRUE;
470 break;
471 }
472 else if (delayTemp < (uint8)8) /* delay is less than 8 - add 1 and finalize parameters */
473 {
474 delayTemp += 1;
475 delayFinal = __max(delayTemp - 1, 0); /* subtract 1 to set to register */
476 preFinal = preTemp;
477 matchFound = TRUE;
478 break;
479 }
480 else
481 {
482 /* do nothing - proceed to next pre_temp value */
483 }
484 }
485 }
486
487 if (matchFound == FALSE)
488 {
489 /* max limit reached. set max values for pre and delay and exit */
490 delayFinal = 7;
491 preFinal = 7;
492 }
493
494 /* write back to delay const structure before looping to next factor */
495 delayConst[index].delay = delayFinal;
496 delayConst[index].pre = preFinal;
497 }
498 }
IfxQspi_calculateDelayConstants
void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. ...
Definition: IfxQspi.c:432
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:176
IfxQspi_calcRealBaudrate
float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:35
__neqf
#define __neqf
Definition: IfxCpu_IntrinsicsDcc.h:1648
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:318
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:294
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:211
SpiIf_ChConfig_
Definition: SpiIf.h:208
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:177
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:60
IfxQspi_getIndex
IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
Specifies the function to get Index.
Definition: IfxQspi.c:274
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:393
Ifx_ParityMode_even
Definition: Ifx_Types.h:104
IfxQspi_resetModule
void IfxQspi_resetModule(Ifx_QSPI *qspi)
resets QSPI kernel
Definition: IfxQspi.c:346
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:181
float32
float float32
Definition: Platform_Types.h:167
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxQspi_getAddress
Ifx_QSPI * IfxQspi_getAddress(IfxQspi_Index qspi)
Definition: IfxQspi.c:257
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxScuCcu_getMaxFrequency
float32 IfxScuCcu_getMaxFrequency(void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in ...
Definition: IfxScuCcu.c:346
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:77
FALSE
#define FALSE
Definition: Platform_Types.h:90
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:184
__leqf
#define __leqf
Definition: IfxCpu_IntrinsicsDcc.h:1652
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:42
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:48
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxQspi_getTimeQuantaFrequency
IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
Gets Time Quanta frequency.
Definition: IfxQspi.h:992
__absf
#define __absf
Definition: IfxCpu_IntrinsicsDcc.h:1612
IfxQspi_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.c:35
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:174
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:75
__max
sint32 __max(sint32, sint32) __attribute__((intrinsic_pseudo(3
SpiIf_SlsoTiming_HalfTsclk
uint32 SpiIf_SlsoTiming_HalfTsclk
Definition: SpiIf.h:121
IfxQspi_Index_none
Not Selected.
Definition: IfxQspi_cfg.h:62
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:175
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:406
IfxQspi_setSlaveSelectOutputControl
void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output.
Definition: IfxQspi.c:364
SpiIf_ChMode
Definition: SpiIf.h:169
IfxQspi_DelayConst::pre
uint8 pre
specifies the prescalar value
Definition: IfxQspi.h:291
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:182
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:86
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:306
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:72
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:50
ABCQMAX
#define ABCQMAX
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:214
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxQspi_getModuleFrequency
IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
Specifies function to get module frequency.
Definition: IfxQspi.h:959
__roundf
#define __roundf
Definition: IfxCpu_IntrinsicsDcc.h:1608
ABCQMIN
#define ABCQMIN
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:79
IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calcu...
Definition: IfxQspi.h:289
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxQspi_calculatePrescaler
uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler.
Definition: IfxQspi.c:190
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:212
IfxQspi_DelayConst::delay
uint8 delay
delay multiplier
Definition: IfxQspi.h:292
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:419
IfxQspi.h
QSPI basic functionality.
IfxQspi_recalcBasicConfiguration
uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON.
Definition: IfxQspi.c:330
TRUE
#define TRUE
Definition: Platform_Types.h:87
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
uint8
unsigned char uint8
Definition: Platform_Types.h:105
sint8
signed char sint8
Definition: Platform_Types.h:122


iLLD_TC26B: IfxQspi.h Source File

  • Qspi
  • Std
IfxQspi.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi.h
3 * \brief QSPI basic functionality
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Qspi_Std_Enum Enumerations
25 * \ingroup IfxLld_Qspi_Std
26 * \defgroup IfxLld_Qspi_Std_Operative Operative Functions
27 * \ingroup IfxLld_Qspi_Std
28 * \defgroup IfxLld_Qspi_Std_Support Support Functions
29 * \ingroup IfxLld_Qspi_Std
30 * \defgroup IfxLld_Qspi_Std_Interrupt Interrupt Functions
31 * \ingroup IfxLld_Qspi_Std
32 * \defgroup IfxLld_Qspi_Std_IO IO Pin Configuration Functions
33 * \ingroup IfxLld_Qspi_Std
34 */
35
36 #ifndef IFXQSPI_H
37 #define IFXQSPI_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "_Impl/IfxQspi_cfg.h"
44 #include "Cpu/Std/IfxCpu_Intrinsics.h"
45 #include "If/SpiIf.h"
46 #include "Scu/Std/IfxScuCcu.h"
47 #include "Src/Std/IfxSrc.h"
48 #include "_PinMap/IfxQspi_PinMap.h"
49
50 /******************************************************************************/
51 /*-----------------------------------Macros-----------------------------------*/
52 /******************************************************************************/
53
54 /** \brief Get Fifo size required for Long / Long continous mode interms 32-bit
55 * LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit)
56 */
57 #define IFXQSPI_BACONSIZE(Datasize) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))
58
59 #define IFXQSPI_FIFO32BITSIZE(Datasize) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))
60
61 #define IFXQSPI_GETLONGMODEFIFOSIZE(Datasize) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))
62
63 /** \brief Errors enable mask for ERRORENS
64 */
65 #define IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)
66
67 /******************************************************************************/
68 /*--------------------------------Enumerations--------------------------------*/
69 /******************************************************************************/
70
71 /** \addtogroup IfxLld_Qspi_Std_Enum
72 * \{ */
73 /** \brief QSPI channel Number (BACON.CS)
74 */
75 typedef enum
76 {
77 IfxQspi_ChannelId_0, /**< \brief Channel #0 */
78 IfxQspi_ChannelId_1, /**< \brief Channel #1 */
79 IfxQspi_ChannelId_2, /**< \brief Channel #2 */
80 IfxQspi_ChannelId_3, /**< \brief Channel #3 */
81 IfxQspi_ChannelId_4, /**< \brief Channel #4 */
82 IfxQspi_ChannelId_5, /**< \brief Channel #5 */
83 IfxQspi_ChannelId_6, /**< \brief Channel #6 */
84 IfxQspi_ChannelId_7, /**< \brief Channel #7 */
85 IfxQspi_ChannelId_8, /**< \brief Channel #8 */
86 IfxQspi_ChannelId_9, /**< \brief Channel #9 */
87 IfxQspi_ChannelId_10, /**< \brief Channel #10 */
88 IfxQspi_ChannelId_11, /**< \brief Channel #11 */
89 IfxQspi_ChannelId_12, /**< \brief Channel #12 */
90 IfxQspi_ChannelId_13, /**< \brief Channel #13 */
91 IfxQspi_ChannelId_14 /**< \brief Channel #14 */
92 } IfxQspi_ChannelId;
93
94 /** \brief Data length unit of a frame (BACON.BYTE)
95 */
96 typedef enum
97 {
98 IfxQspi_DataLengthUnit_bit = 0, /**< \brief Data Length in Bits */
99 IfxQspi_DataLengthUnit_byte = 1 /**< \brief Data length in Bytes */
100 } IfxQspi_DataLengthUnit;
101
102 /** \brief QSPI Error Flags (STATUS.ERRORFLAGS)
103 */
104 typedef enum
105 {
106 IfxQspi_Error_none = 0, /**< \brief No Error */
107 IfxQspi_Error_parity = 1, /**< \brief Parity Error */
108 IfxQspi_Error_configuration = 2, /**< \brief Configuration Error */
109 IfxQspi_Error_baudrate = 4, /**< \brief BaudRate Error */
110 IfxQspi_Error_txfifoOverflow = 8, /**< \brief TX FIFO Overflow Error */
111 IfxQspi_Error_txfifoUnderflow = 16, /**< \brief TX FIFO Underflow Error */
112 IfxQspi_Error_rxfifoOverflow = 32, /**< \brief RX FIFO Overflow Error */
113 IfxQspi_Error_rxfifoUnderflow = 64, /**< \brief RX FIFO Underflow Error */
114 IfxQspi_Error_expectTimeout = 128, /**< \brief EXPECT Timeout Error */
115 IfxQspi_Error_slsiMisplacedInactivation = 256 /**< \brief SLSI misplaced inactivation (slave mode) */
116 } IfxQspi_Error;
117
118 /** \brief Frame Expect phase time out value
119 */
120 typedef enum
121 {
122 IfxQspi_ExpectTimeout_64 = 0, /**< \brief Expect phse time out 64 */
123 IfxQspi_ExpectTimeout_128 = 1, /**< \brief Expect phse time out 128 */
124 IfxQspi_ExpectTimeout_256 = 2, /**< \brief Expect phse time out 256 */
125 IfxQspi_ExpectTimeout_512 = 3, /**< \brief Expect phse time out 512 */
126 IfxQspi_ExpectTimeout_1024 = 4, /**< \brief Expect phse time out 1024 */
127 IfxQspi_ExpectTimeout_2048 = 5, /**< \brief Expect phse time out 2048 */
128 IfxQspi_ExpectTimeout_4096 = 6, /**< \brief Expect phse time out 4096 */
129 IfxQspi_ExpectTimeout_8192 = 7, /**< \brief Expect phse time out 8192 */
130 IfxQspi_ExpectTimeout_16384 = 8, /**< \brief Expect phse time out 16384 */
131 IfxQspi_ExpectTimeout_32768 = 9, /**< \brief Expect phse time out 32768 */
132 IfxQspi_ExpectTimeout_65536 = 10, /**< \brief Expect phse time out 65536 */
133 IfxQspi_ExpectTimeout_131072 = 11, /**< \brief Expect phse time out 131072 */
134 IfxQspi_ExpectTimeout_262144 = 12, /**< \brief Expect phse time out 262144 */
135 IfxQspi_ExpectTimeout_524288 = 13, /**< \brief Expect phse time out 524288 */
136 IfxQspi_ExpectTimeout_1048576 = 14, /**< \brief Expect phse time out 1048576 */
137 IfxQspi_ExpectTimeout_2097152 = 15 /**< \brief Expect phse time out 2097152 */
138 } IfxQspi_ExpectTimeout;
139
140 /** \brief QSPI controller mode (GLOBALCON.MODE)
141 */
142 typedef enum
143 {
144 IfxQspi_Mode_master = 0, /**< \brief QSPI in "master" mode */
145 IfxQspi_Mode_pwmOverQspi = 1, /**< \brief QSPI in "PWM over QSPI" mode */
146 IfxQspi_Mode_slave = 2 /**< \brief QSPI in "slave" mode */
147 } IfxQspi_Mode;
148
149 /** \brief Request between pause and Run transition
150 */
151 typedef enum
152 {
153 IfxQspi_PauseRunTransition_pause = 0, /**< \brief Request value for pause */
154 IfxQspi_PauseRunTransition_run = 1 /**< \brief Request value for Run */
155 } IfxQspi_PauseRunTransition;
156
157 /** \brief QSPI frame phase (STATUS.PHASE)
158 */
159 typedef enum
160 {
161 IfxQspi_Phase_wait = 0, /**< \brief Frame wait phase */
162 IfxQspi_Phase_idleA = 1, /**< \brief Frame idleA phase */
163 IfxQspi_Phase_idleB = 2, /**< \brief frame idleB phase */
164 IfxQspi_Phase_lead = 3, /**< \brief Frame lead phase */
165 IfxQspi_Phase_data = 4, /**< \brief Frame data phase */
166 IfxQspi_Phase_trail = 5, /**< \brief Frame trail phase */
167 IfxQspi_Phase_expect = 6, /**< \brief Frame expect phase */
168 IfxQspi_Phase_leadStrobe = 7, /**< \brief Frame leadstrobe phase */
169 IfxQspi_Phase_trailStrobe = 8 /**< \brief Frame trailstrobe phase */
170 } IfxQspi_Phase;
171
172 /** \brief Phase Transition Event
173 */
174 typedef enum
175 {
176 IfxQspi_PhaseTransitionEvent_endOfWait = 0, /**< \brief BUSY (end of WAIT phase) */
177 IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1, /**< \brief SCLKPC (serial clock polarity change) */
178 IfxQspi_PhaseTransitionEvent_startOfFrame = 2, /**< \brief SOF (Start Of Frame ) */
179 IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3, /**< \brief TBE (Transmit Buffer Emptied) */
180 IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4, /**< \brief RBF (Receive Buffer Filled) */
181 IfxQspi_PhaseTransitionEvent_endOfFrame = 5, /**< \brief EOF (End of Frame) */
182 IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6, /**< \brief DNA (Data not Available = Start of Expect) */
183 IfxQspi_PhaseTransitionEvent_endOfExpect = 7 /**< \brief CONT (End of EXPECT phase) */
184 } IfxQspi_PhaseTransitionEvent;
185
186 /** \brief Reset Request (GLOBALCON.RESETS)
187 */
188 typedef enum
189 {
190 IfxQspi_Reset_none = 0, /**< \brief No Reset */
191 IfxQspi_Reset_stateMachineAndFifo = 7, /**< \brief State Machine, TXFIFO and RXFIFO reset, registers not reseted */
192 IfxQspi_Reset_kernel = 15 /**< \brief Kernel / Module Reset */
193 } IfxQspi_Reset;
194
195 /** \brief Receive Fifo Interrupt Threshold
196 */
197 typedef enum
198 {
199 IfxQspi_RxFifoInt_0, /**< \brief RxFifo Interrupt Threshold #0 */
200 IfxQspi_RxFifoInt_1, /**< \brief RxFifo Interrupt Threshold #1 */
201 IfxQspi_RxFifoInt_2, /**< \brief RxFifo Interrupt Threshold #2 */
202 IfxQspi_RxFifoInt_3 /**< \brief RxFifo Interrupt Threshold #3 */
203 } IfxQspi_RxFifoInt;
204
205 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
206 * Definition in Ifx_QSPI.CLC.B.EDIS
207 */
208 typedef enum
209 {
210 IfxQspi_SleepMode_enable = 0, /**< \brief Sleep Mode enabled */
211 IfxQspi_SleepMode_disable = 1 /**< \brief Sleep Mode disabled */
212 } IfxQspi_SleepMode;
213
214 /** \brief STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)
215 */
216 typedef enum
217 {
218 IfxQspi_StrobeDelay_1, /**< \brief SLSO delay 1 cycle(s) */
219 IfxQspi_StrobeDelay_2, /**< \brief SLSO delay 2 cycle(s) */
220 IfxQspi_StrobeDelay_3, /**< \brief SLSO delay 3 cycle(s) */
221 IfxQspi_StrobeDelay_4, /**< \brief SLSO delay 4 cycle(s) */
222 IfxQspi_StrobeDelay_5, /**< \brief SLSO delay 5 cycle(s) */
223 IfxQspi_StrobeDelay_6, /**< \brief SLSO delay 6 cycle(s) */
224 IfxQspi_StrobeDelay_7, /**< \brief SLSO delay 7 cycle(s) */
225 IfxQspi_StrobeDelay_8, /**< \brief SLSO delay 8 cycle(s) */
226 IfxQspi_StrobeDelay_9, /**< \brief SLSO delay 9 cycle(s) */
227 IfxQspi_StrobeDelay_10, /**< \brief SLSO delay 10 cycle(s) */
228 IfxQspi_StrobeDelay_11, /**< \brief SLSO delay 11 cycle(s) */
229 IfxQspi_StrobeDelay_12, /**< \brief SLSO delay 12 cycle(s) */
230 IfxQspi_StrobeDelay_13, /**< \brief SLSO delay 13 cycle(s) */
231 IfxQspi_StrobeDelay_14, /**< \brief SLSO delay 14 cycle(s) */
232 IfxQspi_StrobeDelay_15, /**< \brief SLSO delay 15 cycle(s) */
233 IfxQspi_StrobeDelay_16, /**< \brief SLSO delay 16 cycle(s) */
234 IfxQspi_StrobeDelay_17, /**< \brief SLSO delay 17 cycle(s) */
235 IfxQspi_StrobeDelay_18, /**< \brief SLSO delay 18 cycle(s) */
236 IfxQspi_StrobeDelay_19, /**< \brief SLSO delay 19 cycle(s) */
237 IfxQspi_StrobeDelay_20, /**< \brief SLSO delay 20 cycle(s) */
238 IfxQspi_StrobeDelay_21, /**< \brief SLSO delay 21 cycle(s) */
239 IfxQspi_StrobeDelay_22, /**< \brief SLSO delay 22 cycle(s) */
240 IfxQspi_StrobeDelay_23, /**< \brief SLSO delay 23 cycle(s) */
241 IfxQspi_StrobeDelay_24, /**< \brief SLSO delay 24 cycle(s) */
242 IfxQspi_StrobeDelay_25, /**< \brief SLSO delay 25 cycle(s) */
243 IfxQspi_StrobeDelay_26, /**< \brief SLSO delay 26 cycle(s) */
244 IfxQspi_StrobeDelay_27, /**< \brief SLSO delay 27 cycle(s) */
245 IfxQspi_StrobeDelay_28, /**< \brief SLSO delay 28 cycle(s) */
246 IfxQspi_StrobeDelay_29, /**< \brief SLSO delay 29 cycle(s) */
247 IfxQspi_StrobeDelay_30, /**< \brief SLSO delay 30 cycle(s) */
248 IfxQspi_StrobeDelay_31, /**< \brief SLSO delay 31 cycle(s) */
249 IfxQspi_StrobeDelay_32 /**< \brief SLSO delay 32 cycle(s) */
250 } IfxQspi_StrobeDelay;
251
252 /** \brief Transmit Fifo Interrupt Threshold
253 */
254 typedef enum
255 {
256 IfxQspi_TxFifoInt_1, /**< \brief TxFifo Interrupt Threshold #1 */
257 IfxQspi_TxFifoInt_2, /**< \brief TxFifo Interrupt Threshold #2 */
258 IfxQspi_TxFifoInt_3, /**< \brief TxFifo Interrupt Threshold #3 */
259 IfxQspi_TxFifoInt_4 /**< \brief TxFifo Interrupt Threshold #4 */
260 } IfxQspi_TxFifoInt;
261
262 /** \} */
263
264 /** \brief Transmit FIFO mode.
265 */
266 typedef enum
267 {
268 IfxQspi_FifoMode_combinedMove = 0, /**< \brief Combined Move Mode */
269 IfxQspi_FifoMode_singleMove = 1, /**< \brief Single Move Mode */
270 IfxQspi_FifoMode_batchMove = 2 /**< \brief Batch Move Mode */
271 } IfxQspi_FifoMode;
272
273 /** \brief OCDS Suspend Control (OCDS.SUS)
274 */
275 typedef enum
276 {
277 IfxQspi_SuspendMode_none = 0, /**< \brief No suspend */
278 IfxQspi_SuspendMode_hard = 1, /**< \brief Hard Suspend */
279 IfxQspi_SuspendMode_soft = 2 /**< \brief Soft Suspend */
280 } IfxQspi_SuspendMode;
281
282 /******************************************************************************/
283 /*-----------------------------Data Structures--------------------------------*/
284 /******************************************************************************/
285
286 /** \brief Structure holding the "pre" and "delay" values.
287 * To be populated into BACON register after delay calculation.
288 */
289 typedef struct
290 {
291 uint8 pre; /**< \brief specifies the prescalar value */
292 uint8 delay; /**< \brief delay multiplier */
293 } IfxQspi_DelayConst;
294
295 /** \addtogroup IfxLld_Qspi_Std_Operative
296 * \{ */
297
298 /******************************************************************************/
299 /*-------------------------Inline Function Prototypes-------------------------*/
300 /******************************************************************************/
301
302 /** \brief Clear ALL service requests
303 * \param qspi Pointer to QSPI module registers
304 * \return None
305 */
306 IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi);
307
308 /** \brief Clear RX service requests
309 * \param qspi Pointer to QSPI module registers
310 * \return None
311 */
312 IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi);
313
314 /** \brief Clear TX service requests
315 * \param qspi Pointer to QSPI module registers
316 * \return None
317 */
318 IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi);
319
320 /** \brief Configure PT1 event (also USR event depending if USREN=1 )
321 * \param qspi Pointer to QSPI module registers
322 * \param pt1Config Phase Transition1 Event Config
323 * \return None
324 */
325 IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config);
326
327 /** \brief Configure PT2 event
328 * \param qspi Pointer to QSPI module registers
329 * \param pt2Config Phase Transition2 Event Config
330 * \return None
331 */
332 IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config);
333
334 /** \brief Enable/Disable Loopback mode.
335 * \param qspi Pointer to QSPI module registers
336 * \param enable Enable / Disable loopback
337 * \return None
338 */
339 IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable);
340
341 /** \brief enable Phase Transition1 Event
342 * \param qspi Pointer to QSPI module registers
343 * \param enable Enable (1) / Disable (0)
344 * \return None
345 */
346 IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable);
347
348 /** \brief enable Phase Transition2 Event
349 * \param qspi Pointer to QSPI module registers
350 * \param enable Enable (1) / Disable (0)
351 * \return None
352 */
353 IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable);
354
355 /** \brief enable User Event (Event selected by PT1)
356 * \param qspi Pointer to QSPI module registers
357 * \param enable Enable (1) / Disable (0)
358 * \return None
359 */
360 IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable);
361
362 /**
363 * \param qspi Pointer to QSPI module registers
364 * \return Error Flags
365 */
366 IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi);
367
368 /** \brief Request for Module in Pause state
369 * no interrupts
370 * no communication
371 * \param qspi Pointer to QSPI module registers
372 * \return None
373 */
374 IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi);
375
376 /** \brief Read the oldest data from RXFIFO
377 * \param qspi Pointer to QSPI module registers
378 */
379 IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi);
380
381 /** \brief Request reset (State Machine & FIFO / Register / Module)
382 * \param qspi Pointer to QSPI module registers
383 * \param reset reset type (GLOBALCON.RESETS)
384 * \return None
385 */
386 IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset);
387
388 /** \brief Request for QSPI in Run state
389 * \param qspi Pointer to QSPI module registers
390 * \return None
391 */
392 IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi);
393
394 /** \brief Set the threshold of RXFIFO for service request generation
395 * \param qspi Pointer to QSPI module registers
396 * \param rxFifoInt RxFIFO Interrupt threshold to set
397 * \return None
398 */
399 IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt);
400
401 /** \brief Write Data into DATAENTRY register
402 * \param qspi Pointer to QSPI module registers
403 * \param data Data to be entered into TxFIFO
404 * \return None
405 */
406 IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data);
407
408 /** \brief Returns the module's suspend state.
409 * TRUE :if module is suspended.
410 * FALSE:if module is not yet suspended.
411 * \param qspi Pointer to QSPI module registers
412 * \return Suspend status (TRUE / FALSE)
413 */
414 IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi);
415
416 /** \brief Configure the Module to Hard/Soft suspend mode.
417 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
418 * \param qspi Pointer to QSPI module registers
419 * \param mode Module suspend mode
420 * \return None
421 */
422 IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode);
423
424 /******************************************************************************/
425 /*-------------------------Global Function Prototypes-------------------------*/
426 /******************************************************************************/
427
428 /** \brief Reads 16bit data from the Rx FIFO
429 * \param qspi Pointer to QSPI module registers
430 * \param data Received data will be copied into this array
431 * \param count Number of items to be received
432 * \return None
433 */
434 IFX_EXTERN void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count);
435
436 /** \brief Reads 32bit data from the Rx FIFO
437 * \param qspi Pointer to QSPI module registers
438 * \param data Received data will be copied into this array
439 * \param count Number of items to be received
440 * \return None
441 */
442 IFX_EXTERN void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count);
443
444 /** \brief Reads 8bit data from the Rx FIFO
445 * \param qspi Pointer to QSPI module registers
446 * \param data Received data will be copied into this array
447 * \param count Number of items to be received
448 * \return None
449 */
450 IFX_EXTERN void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count);
451
452 /** \brief resets QSPI kernel
453 * \param qspi pointer to QSPI registers
454 * \return None
455 */
456 IFX_EXTERN void IfxQspi_resetModule(Ifx_QSPI *qspi);
457
458 /** \brief Writes 16bit data into the Tx FIFO
459 * \param qspi Pointer to QSPI module registers
460 * \param channelId Channel number to which econ val belongs
461 * \param data Array of data to be sent
462 * \param count Number of items to be sent
463 * \return None
464 */
465 IFX_EXTERN void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count);
466
467 /** \brief Writes 32bit data into the Tx FIFO
468 * \param qspi Pointer to QSPI module registers
469 * \param channelId Channel number to which econ val belongs
470 * \param data Array of data to be sent
471 * \param count Number of items to be sent
472 * \return None
473 */
474 IFX_EXTERN void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count);
475
476 /** \brief Writes 8bit data into the Tx FIFO
477 * \param qspi Pointer to QSPI module registers
478 * \param channelId Channel number to which econ val belongs
479 * \param data Array of data to be sent
480 * \param count Number of items to be sent
481 * \return None
482 */
483 IFX_EXTERN void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count);
484
485 /** \} */
486
487 /** \addtogroup IfxLld_Qspi_Std_Support
488 * \{ */
489
490 /******************************************************************************/
491 /*-------------------------Inline Function Prototypes-------------------------*/
492 /******************************************************************************/
493
494 /** \brief Gets the current mode of QSPI
495 * \param qspi Pointer to QSPI module registers
496 * \return The current mode
497 */
498 IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi);
499
500 /** \brief Specifies function to get module frequency
501 * \param qspi Pointer to QSPI module registers
502 * \return Module frequency in Float value
503 */
504 IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi);
505
506 /** \brief Gets actual transmission phase
507 * \param qspi Pointer to QSPI module registers
508 * \return Actual transmission phase
509 */
510 IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi);
511
512 /** \brief Gets the filling level of RXFIFO
513 * \param qspi Pointer to QSPI module registers
514 * \return RxFIFO level
515 */
516 IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi);
517
518 /** \brief Gets Time Quanta frequency
519 * \param qspi Pointer to QSPI module registers
520 * \return TQ frequency in float
521 */
522 IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi);
523
524 /** \brief Gets the filling level of TXFIFO
525 * \param qspi Pointer to QSPI module registers
526 * \return TxFIFO level
527 */
528 IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi);
529
530 /** \brief Specifies the Module enable or disable status
531 * \param qspi Pointer to QSPI module registers
532 * \return TRUE if module is enabled otherwise FALSE
533 */
534 IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi);
535
536 /** \brief Sets the disable module request
537 * \param qspi Pointer to QSPI module registers
538 * \return None
539 */
540 IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi);
541
542 /** \brief Sets the enable module request
543 * \param qspi Pointer to QSPI module registers
544 * \return None
545 */
546 IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi);
547
548 /** \brief Sets the disable module request
549 * \param qspi Pointer to QSPI module registers
550 * \param mode Sleep mode selection
551 * \return None
552 */
553 IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode);
554
555 /** \brief Set the threshold of TXFIFO for service request generation
556 * \param qspi Pointer to QSPI module registers
557 * \param txFifoInt TxFifo Interrupt threshold to set
558 * \return None
559 */
560 IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt);
561
562 /** \brief Write configuration into BACON register
563 * \param qspi Pointer to QSPI module registers
564 * \param baconVal baconVal Value to be entered in BACON register
565 * \return None
566 */
567 IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal);
568
569 /** \brief Write configuration into BACON register with .LAST flag set to 0
570 * \param qspi Pointer to QSPI module registers
571 * \param baconVal baconVal Value to be entered in BACON register
572 * \return None
573 */
574 IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal);
575
576 /** \brief Write configuration into BACON register with .LAST flag set to 1
577 * \param qspi Pointer to QSPI module registers
578 * \param baconVal baconVal Value to be entered in BACON register
579 * \return None
580 */
581 IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal);
582
583 /** \brief Writes channel timing configuration into ECON register
584 * \param qspi Pointer to QSPI module registers
585 * \param channelId Channel number to which econ val belongs
586 * \param econVal Extended configuration value
587 * \return None
588 */
589 IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal);
590
591 /** \brief Writes Data and Configuration into MIXEDENTRY register
592 * \param qspi Pointer to QSPI module registers
593 * \param mixEntryVal Data and configuration in mixed
594 * \return None
595 */
596 IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal);
597
598 /******************************************************************************/
599 /*-------------------------Global Function Prototypes-------------------------*/
600 /******************************************************************************/
601
602 /** \brief Function to calculate baudrate of specified channel
603 * \param qspi Pointer to QSPI module registers
604 * \param channelId QSPI channel number
605 * \return Actual baudrate in float
606 */
607 IFX_EXTERN float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId);
608
609 /** \brief Function to calculate BACON register values
610 * \param qspi Pointer to QSPI module registers
611 * \param channelId QSPI Channel Number
612 * \param chMode Frame configuration
613 * \param baudrate The desired baudrate
614 * \return Calculated BACON value
615 */
616 IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate);
617
618 /** \brief Function to calculate ECON register values
619 * \param qspi Pointer to QSPI module registers
620 * \param cs QSPI channel Number : 8->0,9->1,.......
621 * \param chConfig SPI Channel Configuration
622 * \return Calculated ECON[CS] value
623 */
624 IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig);
625
626 /** \brief Function to calculate prescaler
627 * \param qspi Pointer to QSPI module registers
628 * \param baudrate Maximum baudrate in Float
629 * \return Prescaler in integer
630 */
631 IFX_EXTERN uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate);
632
633 /** \brief Specifies the function to calculate Time quantum length
634 * \param qspi Pointer to QSPI module registers
635 * \param maxBaudrate Maximum baudrate in Float
636 * \return Time quantum length in integer
637 */
638 IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate);
639
640 /** \brief
641 * \param qspi Pointer to QSPI module registers
642 * \return QSPI module register address
643 */
644 IFX_EXTERN Ifx_QSPI *IfxQspi_getAddress(IfxQspi_Index qspi);
645
646 /** \brief Specifies the function to get Index
647 * \param qspi Pointer to QSPI module registers
648 * \return Index in Integer
649 */
650 IFX_EXTERN IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi);
651
652 /** \brief Re-calculated BACON from the oldBACON
653 * \param oldBACON Old BACON value
654 * \param numOfData numOfData in LONG or CONTINUOUS mode
655 * \param shortData Specifies SHORT mode (TRUE) or other modes (FALSE)
656 * \param lastData Specifies last data in LONG or CONTINUOUS
657 * \return Re-calculated BACON
658 */
659 IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData);
660
661 /** \brief Configures a Slave Select Output
662 * \param qspi Pointer to QSPI module registers
663 * \param channelId Channel number to which econ val belongs
664 * \param outputEnable chip select output will be enabled during transaction
665 * \param activeLevel TRUE: active-high, FALSE: active-low
666 * \return None
667 */
668 IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel);
669
670 /** \brief Calculates the Delay constants (pre and delay) from the user specified CS delays.
671 * \param qspi pointer to QSPI SFR
672 * \param channelId Channel ID no.
673 * \param chMode Pointer to Channel Mode
674 * \param delayConst Pointer to the Delay Consant Array
675 * \return None
676 */
677 IFX_EXTERN void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst);
678
679 /** \} */
680
681 /** \addtogroup IfxLld_Qspi_Std_Interrupt
682 * \{ */
683
684 /******************************************************************************/
685 /*-------------------------Inline Function Prototypes-------------------------*/
686 /******************************************************************************/
687
688 /** \brief Gets the Error request value
689 * \param qspi Pointer to QSPI module registers
690 * \return Error request value
691 */
692 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getErrorSrc(Ifx_QSPI *qspi);
693
694 /** \brief Gets the RXFIFO service request
695 * \param qspi Pointer to QSPI module registers
696 * \return Receive service request value
697 */
698 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getReceiveSrc(Ifx_QSPI *qspi);
699
700 /** \brief Gets the TXFIFO service request
701 * \param qspi Pointer to QSPI module registers
702 * \return Transmission service request value
703 */
704 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getTransmitSrc(Ifx_QSPI *qspi);
705
706 /** \} */
707
708 /** \addtogroup IfxLld_Qspi_Std_IO
709 * \{ */
710
711 /******************************************************************************/
712 /*-------------------------Inline Function Prototypes-------------------------*/
713 /******************************************************************************/
714
715 /** \brief Initializes a MRST input
716 * \param mrstIn the MRST Pin which should be configured
717 * \param mrstInMode the pin input mode which should be configured
718 * \return None
719 */
720 IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode);
721
722 /** \brief Initializes a MRST output
723 * \param mrstOut the MRST Pin which should be configured
724 * \param mrstOutMode the pin output mode which should be configured
725 * \param padDriver the pad driver mode which should be configured
726 * \return None
727 */
728 IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver);
729
730 /** \brief Initializes a MTSR input
731 * \param mtsrIn the MTSR Pin which should be configured
732 * \param mtsrInMode the pin input mode which should be configured
733 * \return None
734 */
735 IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode);
736
737 /** \brief Initializes a MTSR output
738 * \param mtsrOut the MTSR Pin which should be configured
739 * \param mtsrOutMode the pin output mode which should be configured
740 * \param padDriver the pad driver mode which should be configured
741 * \return None
742 */
743 IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver);
744
745 /** \brief Initializes a SCLK input
746 * \param sclkIn the SCLK Pin which should be configured
747 * \param sclkInMode the pin input mode which should be configured
748 * \return None
749 */
750 IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode);
751
752 /** \brief Initializes a SCLK output
753 * \param sclkOut the SCLK Pin which should be configured
754 * \param sclkOutMode the pin output mode which should be configured
755 * \param padDriver the pad driver mode which should be configured
756 * \return None
757 */
758 IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver);
759
760 /** \brief Initializes a SLSI input
761 * \param slsi the SLSI Pin which should be configured
762 * \param slsiMode the pin input mode which should be configured
763 * \return None
764 */
765 IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode);
766
767 /** \brief Initializes a SLSO output
768 * \param slso the SLSO Pin which should be configured
769 * \param slsoMode the pin output mode which should be configured
770 * \param padDriver the pad driver mode which should be configured
771 * \param outIndex Pin Pad driver index
772 * \return None
773 */
774 IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex);
775
776 /** \} */
777
778 /******************************************************************************/
779 /*-------------------------Inline Function Prototypes-------------------------*/
780 /******************************************************************************/
781
782 /** \brief Get the Receive FIFO mode
783 * \param qspi Pointer to QSPI module registers
784 * \return Receive FIFO mode
785 */
786 IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi);
787
788 /** \brief Get the Transfer FIFO mode
789 * \param qspi Pointer to QSPI module registers
790 * \return Transfer FIFO mode
791 */
792 IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi);
793
794 /** \brief Permutate bytes to / from Big Endian
795 * \param qspi Pointer to QSPI module registers
796 * \param channelId Channel number to which econ val belongs
797 * \param bigEndian specifies to Permutate bytes to / from Big Endian
798 * \return None
799 */
800 IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian);
801
802 /** \brief Set the value of bit segment1 (A).
803 * \param qspi Pointer to QSPI module registers
804 * \param channelId Channel number to which econ val belongs
805 * \param bitSegment1 Length expressed in time quantums of ECONz.Q.
806 * \return None
807 */
808 IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1);
809
810 /** \brief Set the value of bit segment2 (B).
811 * \param qspi Pointer to QSPI module registers
812 * \param channelId Channel number to which econ val belongs
813 * \param bitSegment2 Length expressed in time quantums of ECONz.Q.
814 * \return None
815 */
816 IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2);
817
818 /** \brief Set the value of bit segment3 (C).
819 * \param qspi Pointer to QSPI module registers
820 * \param channelId Channel number to which econ val belongs
821 * \param bitSegment3 Length expressed in time quantums of ECONz.Q.
822 * \return None
823 */
824 IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3);
825
826 /**
827 * \param qspi Pointer to QSPI module registers
828 * \param mode select the transfer fifo mode
829 * \return None
830 */
831 IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode);
832
833 /** \brief Set the value of Time Quantum.
834 * \param qspi Pointer to QSPI module registers
835 * \param channelId Channel number to which econ val belongs
836 * \param timeQuantum specifies the value of Time Quantum.
837 * \return None
838 */
839 IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum);
840
841 /** \brief Set the transfer FIFO mode
842 * \param qspi Pointer to QSPI module registers
843 * \param mode select the transfer fifo mode
844 * \return None
845 */
846 IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode);
847
848 /** \brief Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver
849 * \param mrstIn the MRST Pin which should be configured
850 * \param mrstInMode the pin input mode which should be configured
851 * \param padDriver Pad Driver
852 * \return None
853 */
854 IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver);
855
856 /** \brief Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver
857 * \param mtsrIn the MTSR Pin which should be configured
858 * \param mtsrInMode the pin input mode which should be configured
859 * \param padDriver Pad Driver
860 * \return None
861 */
862 IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver);
863
864 /** \brief Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver
865 * \param sclkIn the SCLK Pin which should be configured
866 * \param sclkInMode the pin input mode which should be configured
867 * \param padDriver Pad Driver
868 * \return None
869 */
870 IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver);
871
872 /** \brief Provides functionality for both setting of SLSI pin direction as input and configuring pad driver
873 * \param slsi the SLSI Pin which should be configured
874 * \param slsiMode the pin input mode which should be configured
875 * \param padDriver Pad Driver
876 * \return None
877 */
878 IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver);
879
880 /******************************************************************************/
881 /*---------------------Inline Function Implementations------------------------*/
882 /******************************************************************************/
883
884 IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
885 {
886 qspi->FLAGSCLEAR.U = 0xFFFFU;
887 }
888
889
890 IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi)
891 {
892 qspi->FLAGSCLEAR.B.RXC = 1U;
893 }
894
895
896 IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi)
897 {
898 qspi->FLAGSCLEAR.B.TXC = 1U;
899 }
900
901
902 IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
903 {
904 qspi->GLOBALCON1.B.PT1 = pt1Config;
905 }
906
907
908 IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
909 {
910 qspi->GLOBALCON1.B.PT2 = pt2Config;
911 }
912
913
914 IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable)
915 {
916 IFX_UNUSED_PARAMETER(enable);
917
918 qspi->GLOBALCON.B.LB = 1;
919 }
920
921
922 IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable)
923 {
924 qspi->GLOBALCON1.B.PT1EN = enable;
925 }
926
927
928 IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable)
929 {
930 qspi->GLOBALCON1.B.PT2EN = enable;
931 }
932
933
934 IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable)
935 {
936 qspi->GLOBALCON1.B.USREN = enable;
937 }
938
939
940 IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
941 {
942 return qspi->STATUS.B.ERRORFLAGS;
943 }
944
945
946 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
947 {
948 uint32 index = IfxQspi_getIndex(qspi);
949 return &MODULE_SRC.QSPI.QSPI[index].ERR;
950 }
951
952
953 IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi)
954 {
955 return (IfxQspi_Mode)qspi->GLOBALCON.B.MS;
956 }
957
958
959 IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
960 {
961 IFX_UNUSED_PARAMETER(qspi->CLC.U != 0);
962
963 return IfxScuCcu_getMaxFrequency();
964 }
965
966
967 IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi)
968 {
969 return (IfxQspi_Phase)qspi->STATUS.B.PHASE;
970 }
971
972
973 IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
974 {
975 return qspi->STATUS.B.RXFIFOLEVEL;
976 }
977
978
979 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
980 {
981 uint32 index = IfxQspi_getIndex(qspi);
982 return &MODULE_SRC.QSPI.QSPI[index].RX;
983 }
984
985
986 IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi)
987 {
988 return (IfxQspi_FifoMode)qspi->GLOBALCON1.B.RXFM;
989 }
990
991
992 IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
993 {
994 return IfxQspi_getModuleFrequency(qspi) / (qspi->GLOBALCON.B.TQ + 1);
995 }
996
997
998 IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
999 {
1000 return qspi->STATUS.B.TXFIFOLEVEL;
1001 }
1002
1003
1004 IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
1005 {
1006 uint32 index = IfxQspi_getIndex(qspi);
1007 return &MODULE_SRC.QSPI.QSPI[index].TX;
1008 }
1009
1010
1011 IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi)
1012 {
1013 return (IfxQspi_FifoMode)qspi->GLOBALCON1.B.TXFM;
1014 }
1015
1016
1017 IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
1018 {
1019 IfxPort_setPinModeInput(mrstIn->pin.port, mrstIn->pin.pinIndex, mrstInMode);
1020 mrstIn->module->PISEL.B.MRIS = mrstIn->select;
1021 }
1022
1023
1024 IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
1025 {
1026 IfxPort_setPinModeOutput(mrstOut->pin.port, mrstOut->pin.pinIndex, mrstOutMode, mrstOut->select);
1027 IfxPort_setPinPadDriver(mrstOut->pin.port, mrstOut->pin.pinIndex, padDriver);
1028 }
1029
1030
1031 IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
1032 {
1033 IfxPort_setPinModeInput(mtsrIn->pin.port, mtsrIn->pin.pinIndex, mtsrInMode);
1034 mtsrIn->module->PISEL.B.SRIS = mtsrIn->select;
1035 }
1036
1037
1038 IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
1039 {
1040 IfxPort_setPinModeOutput(mtsrOut->pin.port, mtsrOut->pin.pinIndex, mtsrOutMode, mtsrOut->select);
1041 IfxPort_setPinPadDriver(mtsrOut->pin.port, mtsrOut->pin.pinIndex, padDriver);
1042 }
1043
1044
1045 IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
1046 {
1047 IfxPort_setPinModeInput(sclkIn->pin.port, sclkIn->pin.pinIndex, sclkInMode);
1048 sclkIn->module->PISEL.B.SCIS = sclkIn->select;
1049 }
1050
1051
1052 IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
1053 {
1054 IfxPort_setPinModeOutput(sclkOut->pin.port, sclkOut->pin.pinIndex, sclkOutMode, sclkOut->select);
1055 IfxPort_setPinPadDriver(sclkOut->pin.port, sclkOut->pin.pinIndex, padDriver);
1056 }
1057
1058
1059 IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
1060 {
1061 IfxPort_setPinModeInput(slsi->pin.port, slsi->pin.pinIndex, slsiMode);
1062 /* PISEL */
1063 slsi->module->PISEL.B.SLSIS = slsi->select + 1;
1064 }
1065
1066
1067 IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
1068 {
1069 IfxPort_setPinModeOutput(slso->pin.port, slso->pin.pinIndex, slsoMode, outIndex);
1070 IfxPort_setPinPadDriver(slso->pin.port, slso->pin.pinIndex, padDriver);
1071 }
1072
1073
1074 IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi)
1075 {
1076 return (qspi->CLC.B.DISS == 0) ? TRUE : FALSE;
1077 }
1078
1079
1080 IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi)
1081 {
1082 qspi->GLOBALCON.B.EN = 0;
1083
1084 while (IfxQspi_getPhase(qspi) != IfxQspi_Phase_wait)
1085 {}
1086 }
1087
1088
1089 IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
1090 {
1091 int cs = channelId % 8;
1092 qspi->ECON[cs].B.BE = bigEndian;
1093 }
1094
1095
1096 IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
1097 {
1098 return qspi->RXEXIT.U;
1099 }
1100
1101
1102 IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset)
1103 {
1104 qspi->GLOBALCON.B.RESETS = reset;
1105 }
1106
1107
1108 IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
1109 {
1110 qspi->GLOBALCON.B.EN = 1;
1111 }
1112
1113
1114 IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
1115 {
1116 int cs = channelId % 8;
1117 qspi->ECON[cs].B.A = bitSegment1;
1118 }
1119
1120
1121 IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
1122 {
1123 int cs = channelId % 8;
1124 qspi->ECON[cs].B.B = bitSegment2;
1125 }
1126
1127
1128 IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
1129 {
1130 int cs = channelId % 8;
1131 qspi->ECON[cs].B.C = bitSegment3;
1132 }
1133
1134
1135 IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi)
1136 {
1137 qspi->CLC.B.DISR = 1;
1138 }
1139
1140
1141 IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
1142 {
1143 qspi->CLC.B.DISR = 0;
1144 }
1145
1146
1147 IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
1148 {
1149 qspi->GLOBALCON1.B.RXFIFOINT = rxFifoInt;
1150 }
1151
1152
1153 IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
1154 {
1155 qspi->GLOBALCON1.B.RXFM = mode;
1156 }
1157
1158
1159 IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
1160 {
1161 qspi->CLC.B.EDIS = mode;
1162 }
1163
1164
1165 IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
1166 {
1167 int cs = channelId % 8;
1168 qspi->ECON[cs].B.Q = timeQuantum;
1169 }
1170
1171
1172 IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
1173 {
1174 qspi->GLOBALCON1.B.TXFIFOINT = txFifoInt;
1175 }
1176
1177
1178 IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
1179 {
1180 qspi->GLOBALCON1.B.TXFM = mode;
1181 }
1182
1183
1184 IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
1185 {
1186 qspi->BACONENTRY.U = baconVal;
1187 }
1188
1189
1190 IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
1191 {
1192 Ifx_QSPI_BACON bacon;
1193 bacon.U = baconVal;
1194 bacon.B.LAST = 0;
1195
1196 qspi->BACONENTRY.U = bacon.U;
1197 }
1198
1199
1200 IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
1201 {
1202 Ifx_QSPI_BACON bacon;
1203 bacon.U = baconVal;
1204 bacon.B.LAST = 1;
1205
1206 qspi->BACONENTRY.U = bacon.U;
1207 }
1208
1209
1210 IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
1211 {
1212 int cs = channelId % 8;
1213 qspi->ECON[cs].U = econVal;
1214 }
1215
1216
1217 IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
1218 {
1219 qspi->MIXENTRY.U = mixEntryVal;
1220 }
1221
1222
1223 IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
1224 {
1225 qspi->DATAENTRY[0].U = data;
1226 }
1227
1228
1229 IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi)
1230 {
1231 Ifx_QSPI_OCS ocs;
1232
1233 // read the status
1234 ocs.U = qspi->OCS.U;
1235
1236 // return the status
1237 return ocs.B.SUSSTA;
1238 }
1239
1240
1241 IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
1242 {
1243 Ifx_QSPI_OCS ocs;
1244
1245 // remove protection and configure the suspend mode.
1246 ocs.B.SUS_P = 1;
1247 ocs.B.SUS = mode;
1248 qspi->OCS.U = ocs.U;
1249 }
1250
1251
1252 IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
1253 {
1254 IfxPort_setPinModeInput(mrstIn->pin.port, mrstIn->pin.pinIndex, mrstInMode);
1255 IfxPort_setPinPadDriver(mrstIn->pin.port, mrstIn->pin.pinIndex, padDriver);
1256 mrstIn->module->PISEL.B.MRIS = mrstIn->select;
1257 }
1258
1259
1260 IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
1261 {
1262 IfxPort_setPinModeInput(mtsrIn->pin.port, mtsrIn->pin.pinIndex, mtsrInMode);
1263 IfxPort_setPinPadDriver(mtsrIn->pin.port, mtsrIn->pin.pinIndex, padDriver);
1264 mtsrIn->module->PISEL.B.SRIS = mtsrIn->select;
1265 }
1266
1267
1268 IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
1269 {
1270 IfxPort_setPinModeInput(sclkIn->pin.port, sclkIn->pin.pinIndex, sclkInMode);
1271 IfxPort_setPinPadDriver(sclkIn->pin.port, sclkIn->pin.pinIndex, padDriver);
1272 sclkIn->module->PISEL.B.SCIS = sclkIn->select;
1273 }
1274
1275
1276 IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
1277 {
1278 IfxPort_setPinModeInput(slsi->pin.port, slsi->pin.pinIndex, slsiMode);
1279 /* PISEL */
1280 IfxPort_setPinPadDriver(slsi->pin.port, slsi->pin.pinIndex, padDriver);
1281 slsi->module->PISEL.B.SLSIS = slsi->select + 1;
1282 }
1283
1284
1285 #endif /* IFXQSPI_H */
IfxQspi_FifoMode_batchMove
Batch Move Mode.
Definition: IfxQspi.h:270
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:79
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:63
IfxQspi_calculateDelayConstants
IFX_EXTERN void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
Calculates the Delay constants (pre and delay) from the user specified CS delays. ...
Definition: IfxQspi.c:432
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:110
IfxQspi_initMtsrInPinWithPadLevel
IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1260
IfxQspi_Phase_lead
Frame lead phase.
Definition: IfxQspi.h:164
IfxQspi_PhaseTransitionEvent_endOfWait
BUSY (end of WAIT phase)
Definition: IfxQspi.h:176
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:113
IfxQspi_FifoMode_singleMove
Single Move Mode.
Definition: IfxQspi.h:269
IfxQspi_calcRealBaudrate
IFX_EXTERN float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:35
IfxQspi_StrobeDelay_9
SLSO delay 9 cycle(s)
Definition: IfxQspi.h:226
IfxQspi_read8
IFX_EXTERN void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:318
IfxQspi_Error
IfxQspi_Error
QSPI Error Flags (STATUS.ERRORFLAGS)
Definition: IfxQspi.h:104
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:109
IfxQspi_read16
IFX_EXTERN void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:294
IfxQspi_DataLengthUnit
IfxQspi_DataLengthUnit
Data length unit of a frame (BACON.BYTE)
Definition: IfxQspi.h:96
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:137
IfxQspi_ExpectTimeout_512
Expect phse time out 512.
Definition: IfxQspi.h:125
SpiIf_ChConfig_
Definition: SpiIf.h:208
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:174
IfxQspi_StrobeDelay_7
SLSO delay 7 cycle(s)
Definition: IfxQspi.h:224
IfxQspi_enablePT1Event
IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable)
enable Phase Transition1 Event
Definition: IfxQspi.h:922
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:107
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:940
IfxQspi_clearTxReq
IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi)
Clear TX service requests.
Definition: IfxQspi.h:896
IfxQspi_ChannelId_7
Channel #7.
Definition: IfxQspi.h:84
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxQspi_DataLengthUnit_bit
Data Length in Bits.
Definition: IfxQspi.h:98
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:256
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:55
IfxQspi_ExpectTimeout_2048
Expect phse time out 2048.
Definition: IfxQspi.h:127
IfxQspi_ExpectTimeout_64
Expect phse time out 64.
Definition: IfxQspi.h:122
IfxQspi_setDisableModuleRequest
IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi)
Sets the disable module request.
Definition: IfxQspi.h:1135
IfxQspi_getMode
IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi)
Gets the current mode of QSPI.
Definition: IfxQspi.h:953
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:60
IfxQspi_ExpectTimeout_8192
Expect phse time out 8192.
Definition: IfxQspi.h:129
IfxQspi_getIndex
IFX_EXTERN IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
Specifies the function to get Index.
Definition: IfxQspi.c:274
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxQspi_write16
IFX_EXTERN void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:393
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:112
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:95
IfxQspi_resetModule
IFX_EXTERN void IfxQspi_resetModule(Ifx_QSPI *qspi)
resets QSPI kernel
Definition: IfxQspi.c:346
IfxQspi_writeMixedDataTransmitFifo
IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register.
Definition: IfxQspi.h:1217
IfxQspi_clearRxReq
IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi)
Clear RX service requests.
Definition: IfxQspi.h:890
IfxQspi_StrobeDelay_1
SLSO delay 1 cycle(s)
Definition: IfxQspi.h:218
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxQspi_getAddress
IFX_EXTERN Ifx_QSPI * IfxQspi_getAddress(IfxQspi_Index qspi)
Definition: IfxQspi.c:257
IfxQspi_setBitsegment1
IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
Set the value of bit segment1 (A).
Definition: IfxQspi.h:1114
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:266
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1190
IfxScuCcu_getMaxFrequency
float32 IfxScuCcu_getMaxFrequency(void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in ...
Definition: IfxScuCcu.c:346
IfxQspi_initMtsrInPin
IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
Initializes a MTSR input.
Definition: IfxQspi.h:1031
IfxSrc.h
SRC basic functionality.
IfxQspi_PauseRunTransition_run
Request value for Run.
Definition: IfxQspi.h:154
IfxQspi_StrobeDelay_14
SLSO delay 14 cycle(s)
Definition: IfxQspi.h:231
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:268
IfxCpu_Intrinsics.h
IfxQspi_ExpectTimeout_131072
Expect phse time out 131072.
Definition: IfxQspi.h:133
IfxQspi_PhaseTransitionEvent_endOfFrame
EOF (End of Frame)
Definition: IfxQspi.h:181
IfxQspi_ChannelId_10
Channel #10.
Definition: IfxQspi.h:87
IfxQspi_Phase_data
Frame data phase.
Definition: IfxQspi.h:165
IfxQspi_StrobeDelay_5
SLSO delay 5 cycle(s)
Definition: IfxQspi.h:222
IfxQspi_ChannelId_1
Channel #1.
Definition: IfxQspi.h:78
IfxQspi_getRxFifoMode
IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi)
Get the Receive FIFO mode.
Definition: IfxQspi.h:986
IfxQspi_SleepMode
IfxQspi_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_QSPI.CLC.B.EDIS.
Definition: IfxQspi.h:208
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1108
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1159
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxQspi_calculateExtendedConfigurationValue
IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:77
SpiIf.h
SPI interface types.
IfxQspi_Phase_trailStrobe
Frame trailstrobe phase.
Definition: IfxQspi.h:169
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxQspi_TxFifoInt_2
TxFifo Interrupt Threshold #2.
Definition: IfxQspi.h:257
IfxQspi_writeExtendedConfiguration
IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register.
Definition: IfxQspi.h:1210
IfxQspi_Mrst_In::module
Ifx_QSPI * module
Base address.
Definition: IfxQspi_PinMap.h:41
IfxQspi_StrobeDelay_21
SLSO delay 21 cycle(s)
Definition: IfxQspi.h:238
IfxQspi_Phase_wait
Frame wait phase.
Definition: IfxQspi.h:161
IfxQspi_StrobeDelay_6
SLSO delay 6 cycle(s)
Definition: IfxQspi.h:223
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1141
IfxQspi_Mrst_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxQspi_PinMap.h:43
IfxQspi_enablePT2Event
IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable)
enable Phase Transition2 Event
Definition: IfxQspi.h:928
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:103
IfxQspi_calculateBasicConfigurationValue
IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:48
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1096
IfxQspi_SuspendMode_hard
Hard Suspend.
Definition: IfxQspi.h:278
IfxQspi_Phase_idleA
Frame idleA phase.
Definition: IfxQspi.h:162
IfxQspi_ExpectTimeout_128
Expect phse time out 128.
Definition: IfxQspi.h:123
IfxQspi_RxFifoInt_1
RxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:200
IfxQspi_SuspendMode_none
No suspend.
Definition: IfxQspi.h:277
IfxQspi_SuspendMode
IfxQspi_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxQspi.h:275
IfxQspi_StrobeDelay_25
SLSO delay 25 cycle(s)
Definition: IfxQspi.h:242
IfxQspi_getTimeQuantaFrequency
IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
Gets Time Quanta frequency.
Definition: IfxQspi.h:992
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:75
IfxQspi_ExpectTimeout_1024
Expect phse time out 1024.
Definition: IfxQspi.h:126
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:153
IfxQspi_ChannelId_12
Channel #12.
Definition: IfxQspi.h:89
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:87
IfxQspi_ChannelId_11
Channel #11.
Definition: IfxQspi.h:88
IfxQspi_setReceiveFifoInterrruptThreshold
IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
Set the threshold of RXFIFO for service request generation.
Definition: IfxQspi.h:1147
IfxQspi_SuspendMode_soft
Soft Suspend.
Definition: IfxQspi.h:279
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1004
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:47
IfxQspi_Mrst_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:83
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxQspi_StrobeDelay_31
SLSO delay 31 cycle(s)
Definition: IfxQspi.h:248
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:199
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:151
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:197
IfxQspi_Phase_leadStrobe
Frame leadstrobe phase.
Definition: IfxQspi.h:168
IfxQspi_Mrst_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:42
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:254
IfxQspi_ExpectTimeout_16384
Expect phse time out 16384.
Definition: IfxQspi.h:130
IfxQspi_permutateBigEndian
IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
Permutate bytes to / from Big Endian.
Definition: IfxQspi.h:1089
IfxQspi_Phase_trail
Frame trail phase.
Definition: IfxQspi.h:166
IfxQspi_StrobeDelay_15
SLSO delay 15 cycle(s)
Definition: IfxQspi.h:232
IfxQspi_initSclkInPin
IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
Initializes a SCLK input.
Definition: IfxQspi.h:1045
IfxQspi_Phase_expect
Frame expect phase.
Definition: IfxQspi.h:167
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:973
IfxQspi_PhaseTransitionEvent_endOfExpect
CONT (End of EXPECT phase)
Definition: IfxQspi.h:183
IfxQspi_ChannelId_9
Channel #9.
Definition: IfxQspi.h:86
IfxQspi_initMtsrOutPin
IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output.
Definition: IfxQspi.h:1038
IfxQspi_write32
IFX_EXTERN void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:406
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:111
IfxQspi_StrobeDelay_17
SLSO delay 17 cycle(s)
Definition: IfxQspi.h:234
IfxQspi_getPhase
IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi)
Gets actual transmission phase.
Definition: IfxQspi.h:967
IfxQspi_StrobeDelay_13
SLSO delay 13 cycle(s)
Definition: IfxQspi.h:230
IfxQspi_initSclkOutPin
IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxQspi.h:1052
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxQspi_setSlaveSelectOutputControl
IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
Configures a Slave Select Output.
Definition: IfxQspi.c:364
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:979
IfxQspi_initSlsi
IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
Initializes a SLSI input.
Definition: IfxQspi.h:1059
IfxQspi_StrobeDelay_32
SLSO delay 32 cycle(s)
Definition: IfxQspi.h:249
IfxQspi_Mode_slave
QSPI in "slave" mode.
Definition: IfxQspi.h:146
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:39
SpiIf_ChMode
Definition: SpiIf.h:169
IfxQspi_getTxFifoMode
IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi)
Get the Transfer FIFO mode.
Definition: IfxQspi.h:1011
IfxQspi_ExpectTimeout_524288
Expect phse time out 524288.
Definition: IfxQspi.h:135
IfxQspi_DelayConst::pre
uint8 pre
specifies the prescalar value
Definition: IfxQspi.h:291
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:211
IfxQspi_Phase
IfxQspi_Phase
QSPI frame phase (STATUS.PHASE)
Definition: IfxQspi.h:159
IfxQspi_PhaseTransitionEvent_dataNotAvailable
DNA (Data not Available = Start of Expect)
Definition: IfxQspi.h:182
IfxQspi_ChannelId_3
Channel #3.
Definition: IfxQspi.h:80
IfxQspi_ChannelId_4
Channel #4.
Definition: IfxQspi.h:81
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxQspi_PhaseTransitionEvent_transmitBufferEmptied
TBE (Transmit Buffer Emptied)
Definition: IfxQspi.h:179
IfxQspi_isModuleSuspended
IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxQspi.h:1229
IfxQspi_setTimeQuantum
IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
Set the value of Time Quantum.
Definition: IfxQspi.h:1165
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:946
IfxQspi_ChannelId_14
Channel #14.
Definition: IfxQspi.h:91
IfxQspi_ChannelId_8
Channel #8.
Definition: IfxQspi.h:85
IfxQspi_ChannelId_2
Channel #2.
Definition: IfxQspi.h:79
IfxQspi_pause
IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi)
Request for Module in Pause state no interrupts no communication.
Definition: IfxQspi.h:1080
IfxQspi_StrobeDelay_22
SLSO delay 22 cycle(s)
Definition: IfxQspi.h:239
IfxQspi_Reset_none
No Reset.
Definition: IfxQspi.h:190
IfxQspi_read32
IFX_EXTERN void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:306
IfxQspi_setTxFifoMode
IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Set the transfer FIFO mode.
Definition: IfxQspi.h:1178
IfxQspi_StrobeDelay_28
SLSO delay 28 cycle(s)
Definition: IfxQspi.h:245
IfxQspi_PhaseTransitionEvent_serialClockPolarityChange
SCLKPC (serial clock polarity change)
Definition: IfxQspi.h:177
IfxQspi_StrobeDelay_20
SLSO delay 20 cycle(s)
Definition: IfxQspi.h:237
IfxQspi_enableLoopbackMode
IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable)
Enable/Disable Loopback mode.
Definition: IfxQspi.h:914
IfxQspi_calculateTimeQuantumLength
IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:214
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxQspi_StrobeDelay_11
SLSO delay 11 cycle(s)
Definition: IfxQspi.h:228
IfxQspi_StrobeDelay_2
SLSO delay 2 cycle(s)
Definition: IfxQspi.h:219
IfxQspi_getModuleFrequency
IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
Specifies function to get module frequency.
Definition: IfxQspi.h:959
IfxQspi_ChannelId_6
Channel #6.
Definition: IfxQspi.h:83
IfxQspi_Mode_pwmOverQspi
QSPI in "PWM over QSPI" mode.
Definition: IfxQspi.h:145
IfxQspi_ExpectTimeout_65536
Expect phse time out 65536.
Definition: IfxQspi.h:132
IfxQspi_PinMap.h
QSPI I/O map.
IfxQspi_setBitsegment2
IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
Set the value of bit segment2 (B).
Definition: IfxQspi.h:1121
IfxQspi_TxFifoInt_3
TxFifo Interrupt Threshold #3.
Definition: IfxQspi.h:258
IfxQspi_TxFifoInt_4
TxFifo Interrupt Threshold #4.
Definition: IfxQspi.h:259
IfxQspi_requestReset
IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset)
Request reset (State Machine & FIFO / Register / Module)
Definition: IfxQspi.h:1102
IfxQspi_StrobeDelay_3
SLSO delay 3 cycle(s)
Definition: IfxQspi.h:220
IfxQspi_configPT1Event
IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
Configure PT1 event (also USR event depending if USREN=1 )
Definition: IfxQspi.h:902
IfxQspi_DelayConst
Structure holding the "pre" and "delay" values. To be populated into BACON register after delay calcu...
Definition: IfxQspi.h:289
IfxQspi_setRxFifoMode
IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
Definition: IfxQspi.h:1153
IfxScuCcu.h
SCU basic functionality.
IfxQspi_initMrstInPin
IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
Initializes a MRST input.
Definition: IfxQspi.h:1017
IfxQspi_ChannelId_5
Channel #5.
Definition: IfxQspi.h:82
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxQspi_initMrstInPinWithPadLevel
IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1252
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:884
enable
void enable
Definition: IfxCpu_IntrinsicsDcc.h:460
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1223
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:144
IfxQspi_StrobeDelay_8
SLSO delay 8 cycle(s)
Definition: IfxQspi.h:225
IfxQspi_initSclkInPinWithPadLevel
IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1268
IfxQspi_StrobeDelay_24
SLSO delay 24 cycle(s)
Definition: IfxQspi.h:241
IfxQspi_writeBasicConfigurationEndStream
IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1.
Definition: IfxQspi.h:1200
IfxQspi_StrobeDelay_23
SLSO delay 23 cycle(s)
Definition: IfxQspi.h:240
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:114
IfxQspi_ExpectTimeout_256
Expect phse time out 256.
Definition: IfxQspi.h:124
IfxQspi_calculatePrescaler
IFX_EXTERN uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
Function to calculate prescaler.
Definition: IfxQspi.c:190
IfxQspi_initMrstOutPin
IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output.
Definition: IfxQspi.h:1024
IfxQspi_DelayConst::delay
uint8 delay
delay multiplier
Definition: IfxQspi.h:292
IfxQspi_ExpectTimeout_4096
Expect phse time out 4096.
Definition: IfxQspi.h:128
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:108
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxQspi_RxFifoInt_2
RxFifo Interrupt Threshold #2.
Definition: IfxQspi.h:201
IfxQspi_StrobeDelay_30
SLSO delay 30 cycle(s)
Definition: IfxQspi.h:247
IfxQspi_ExpectTimeout_1048576
Expect phse time out 1048576.
Definition: IfxQspi.h:136
IfxQspi_initSlso
IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output.
Definition: IfxQspi.h:1067
IfxQspi_Reset
IfxQspi_Reset
Reset Request (GLOBALCON.RESETS)
Definition: IfxQspi.h:188
IfxQspi_PhaseTransitionEvent_receiveBufferFilled
RBF (Receive Buffer Filled)
Definition: IfxQspi.h:180
IfxQspi_write8
IFX_EXTERN void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:419
IfxQspi_writeBasicConfiguration
IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register.
Definition: IfxQspi.h:1184
IfxQspi_Phase_idleB
frame idleB phase
Definition: IfxQspi.h:163
IfxQspi_setBitsegment3
IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
Set the value of bit segment3 (C).
Definition: IfxQspi.h:1128
IfxQspi_StrobeDelay_19
SLSO delay 19 cycle(s)
Definition: IfxQspi.h:236
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:998
IfxQspi_Error_none
No Error.
Definition: IfxQspi.h:106
IfxQspi_StrobeDelay_26
SLSO delay 26 cycle(s)
Definition: IfxQspi.h:243
IfxQspi_recalcBasicConfiguration
IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
Re-calculated BACON from the oldBACON.
Definition: IfxQspi.c:330
IfxQspi_Error_slsiMisplacedInactivation
SLSI misplaced inactivation (slave mode)
Definition: IfxQspi.h:115
IfxQspi_configPT2Event
IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
Configure PT2 event.
Definition: IfxQspi.h:908
IfxQspi_Reset_stateMachineAndFifo
State Machine, TXFIFO and RXFIFO reset, registers not reseted.
Definition: IfxQspi.h:191
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxQspi_Mode
IfxQspi_Mode
QSPI controller mode (GLOBALCON.MODE)
Definition: IfxQspi.h:142
IfxQspi_isModuleEnabled
IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi)
Specifies the Module enable or disable status.
Definition: IfxQspi.h:1074
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxQspi_setTransmitFifoInterrruptThreshold
IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
Set the threshold of TXFIFO for service request generation.
Definition: IfxQspi.h:1172
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:210
IfxQspi_ExpectTimeout_262144
Expect phse time out 262144.
Definition: IfxQspi.h:134
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxQspi_StrobeDelay_16
SLSO delay 16 cycle(s)
Definition: IfxQspi.h:233
IfxQspi_StrobeDelay_10
SLSO delay 10 cycle(s)
Definition: IfxQspi.h:227
IfxQspi_StrobeDelay_12
SLSO delay 12 cycle(s)
Definition: IfxQspi.h:229
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxQspi_ChannelId_13
Channel #13.
Definition: IfxQspi.h:90
IfxQspi_Reset_kernel
Kernel / Module Reset.
Definition: IfxQspi.h:192
IfxQspi_StrobeDelay_29
SLSO delay 29 cycle(s)
Definition: IfxQspi.h:246
IfxQspi_DataLengthUnit_byte
Data length in Bytes.
Definition: IfxQspi.h:99
IfxQspi_setSuspendMode
IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxQspi.h:1241
IfxQspi_StrobeDelay_4
SLSO delay 4 cycle(s)
Definition: IfxQspi.h:221
IfxQspi_PhaseTransitionEvent_startOfFrame
SOF (Start Of Frame )
Definition: IfxQspi.h:178
IfxQspi_StrobeDelay
IfxQspi_StrobeDelay
STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)
Definition: IfxQspi.h:216
IfxQspi_StrobeDelay_27
SLSO delay 27 cycle(s)
Definition: IfxQspi.h:244
IfxQspi_enableUsrEvent
IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable)
enable User Event (Event selected by PT1)
Definition: IfxQspi.h:934
IfxQspi_RxFifoInt_3
RxFifo Interrupt Threshold #3.
Definition: IfxQspi.h:202
IfxQspi_ExpectTimeout_32768
Expect phse time out 32768.
Definition: IfxQspi.h:131
IfxQspi_initSlsiWithPadLevel
IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1276
IfxQspi_ExpectTimeout
IfxQspi_ExpectTimeout
Frame Expect phase time out value.
Definition: IfxQspi.h:120
IfxQspi_StrobeDelay_18
SLSO delay 18 cycle(s)
Definition: IfxQspi.h:235
IfxQspi_ChannelId_0
Channel #0.
Definition: IfxQspi.h:77


iLLD_TC26B: IfxQspi_PinMap.c Source File

  • _PinMap
IfxQspi_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_PinMap.c
3 * \brief QSPI I/O map
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxQspi_PinMap.h"
27
28 IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a};
29 IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_b};
30 IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN = {&MODULE_QSPI3, {&MODULE_P33, 9}, Ifx_RxSel_a};
31 IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_b};
32 IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a};
33 IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a};
34 IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b};
35 IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a};
36 IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b};
37 IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c};
38 IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c};
39 IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e};
40 IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a};
41 IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b};
42 IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN = {&MODULE_QSPI3, {&MODULE_P33,13}, Ifx_RxSel_d};
43 IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN = {&MODULE_QSPI3, {&MODULE_P22, 1}, Ifx_RxSel_e};
44 IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN = {&MODULE_QSPI3, {&MODULE_P21, 2}, Ifx_RxSel_f};
45 IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN = {&MODULE_QSPI3, {&MODULE_P21, 3}, Ifx_RxSel_f};
46 IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3};
47 IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3};
48 IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6};
49 IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3};
50 IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3};
51 IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3};
52 IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3};
53 IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3};
54 IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3};
55 IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT = {&MODULE_QSPI3, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3};
56 IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a};
57 IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a};
58 IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b};
59 IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c};
60 IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a};
61 IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b};
62 IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a};
63 IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b};
64 IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN = {&MODULE_QSPI3, {&MODULE_P33,12}, Ifx_RxSel_d};
65 IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN = {&MODULE_QSPI3, {&MODULE_P22, 0}, Ifx_RxSel_e};
66 IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4};
67 IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3};
68 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2};
69 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3};
70 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4};
71 IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3};
72 IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3};
73 IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3};
74 IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3};
75 IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3};
76 IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT = {&MODULE_QSPI3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4};
77 IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4};
78 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3};
79 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3};
80 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3};
81 IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT = {&MODULE_QSPI3, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3};
82 IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a};
83 IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a};
84 IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b};
85 IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a};
86 IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b};
87 IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a};
88 IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b};
89 IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN = {&MODULE_QSPI3, {&MODULE_P33,11}, Ifx_RxSel_d};
90 IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN = {&MODULE_QSPI3, {&MODULE_P22, 3}, Ifx_RxSel_e};
91 IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3};
92 IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5};
93 IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3};
94 IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3};
95 IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3};
96 IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3};
97 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3};
98 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5};
99 IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3};
100 IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4};
101 IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4};
102 IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3};
103 IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3};
104 IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3};
105 IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT = {&MODULE_QSPI3, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3};
106 IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a};
107 IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b};
108 IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a};
109 IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a};
110 IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b};
111 IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a};
112 IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_c};
113 IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN = {&MODULE_QSPI3, {&MODULE_P22, 2}, Ifx_RxSel_d};
114 IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3};
115 IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3};
116 IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3};
117 IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3};
118 IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3};
119 IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3};
120 IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3};
121 IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3};
122 IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2};
123 IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3};
124 IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3};
125 IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4};
126 IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3};
127 IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4};
128 IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4};
129 IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4};
130 IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4};
131 IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4};
132 IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2};
133 IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3};
134 IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3};
135 IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4};
136 IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3};
137 IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3};
138 IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3};
139 IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3};
140 IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3};
141 IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3};
142 IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4};
143 IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4};
144 IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4};
145 IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4};
146 IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3};
147 IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT = {&MODULE_QSPI3, 11, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3};
148 IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT = {&MODULE_QSPI3, 12, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3};
149 IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT = {&MODULE_QSPI3, 13, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3};
150 IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3};
151 IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT = {&MODULE_QSPI3, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3};
152 IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3};
153 IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT = {&MODULE_QSPI3, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3};
154 IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3};
155 IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3};
156 IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT = {&MODULE_QSPI3, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3};
157 IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2};
158 IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT = {&MODULE_QSPI3, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3};
159 IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2};
160 IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2};
161 IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT = {&MODULE_QSPI3, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3};
162 IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3};
163
164
165 const IfxQspi_Hsicin_In *IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS] = {
166 {
167 NULL_PTR,
168 NULL_PTR
169 },
170 {
171 NULL_PTR,
172 NULL_PTR
173 },
174 {
175 &IfxQspi2_HSICINA_P15_2_IN,
176 &IfxQspi2_HSICINB_P15_3_IN
177 },
178 {
179 &IfxQspi3_HSICINA_P33_9_IN,
180 &IfxQspi3_HSICINB_P33_10_IN
181 }
182 };
183
184 const IfxQspi_Mrst_In *IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS] = {
185 {
186 &IfxQspi0_MRSTA_P20_12_IN,
187 NULL_PTR,
188 NULL_PTR,
189 NULL_PTR,
190 NULL_PTR,
191 NULL_PTR
192 },
193 {
194 &IfxQspi1_MRSTA_P10_1_IN,
195 &IfxQspi1_MRSTB_P11_3_IN,
196 NULL_PTR,
197 NULL_PTR,
198 NULL_PTR,
199 NULL_PTR
200 },
201 {
202 &IfxQspi2_MRSTA_P15_4_IN,
203 &IfxQspi2_MRSTB_P15_7_IN,
204 &IfxQspi2_MRSTCN_P21_2_IN,
205 NULL_PTR,
206 &IfxQspi2_MRSTE_P15_2_IN,
207 NULL_PTR
208 },
209 {
210 &IfxQspi3_MRSTA_P02_5_IN,
211 &IfxQspi3_MRSTB_P10_7_IN,
212 NULL_PTR,
213 &IfxQspi3_MRSTD_P33_13_IN,
214 &IfxQspi3_MRSTE_P22_1_IN,
215 &IfxQspi3_MRSTFN_P21_2_IN
216 }
217 };
218
219 const IfxQspi_Mrst_Out *IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS] = {
220 {
221 &IfxQspi0_MRST_P20_12_OUT,
222 NULL_PTR,
223 NULL_PTR,
224 NULL_PTR
225 },
226 {
227 &IfxQspi1_MRST_P10_1_OUT,
228 &IfxQspi1_MRST_P10_6_OUT,
229 &IfxQspi1_MRST_P11_3_OUT,
230 NULL_PTR
231 },
232 {
233 &IfxQspi2_MRST_P15_4_OUT,
234 &IfxQspi2_MRST_P15_7_OUT,
235 NULL_PTR,
236 NULL_PTR
237 },
238 {
239 &IfxQspi3_MRST_P02_5_OUT,
240 &IfxQspi3_MRST_P10_7_OUT,
241 &IfxQspi3_MRST_P22_1_OUT,
242 &IfxQspi3_MRST_P33_13_OUT
243 }
244 };
245
246 const IfxQspi_Mtsr_In *IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS] = {
247 {
248 &IfxQspi0_MTSRA_P20_14_IN,
249 NULL_PTR,
250 NULL_PTR,
251 NULL_PTR,
252 NULL_PTR
253 },
254 {
255 &IfxQspi1_MTSRA_P10_3_IN,
256 &IfxQspi1_MTSRB_P11_9_IN,
257 &IfxQspi1_MTSRC_P10_4_IN,
258 NULL_PTR,
259 NULL_PTR
260 },
261 {
262 &IfxQspi2_MTSRA_P15_5_IN,
263 &IfxQspi2_MTSRB_P15_6_IN,
264 NULL_PTR,
265 NULL_PTR,
266 NULL_PTR
267 },
268 {
269 &IfxQspi3_MTSRA_P02_6_IN,
270 &IfxQspi3_MTSRB_P10_6_IN,
271 NULL_PTR,
272 &IfxQspi3_MTSRD_P33_12_IN,
273 &IfxQspi3_MTSRE_P22_0_IN
274 }
275 };
276
277 const IfxQspi_Mtsr_Out *IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS] = {
278 {
279 &IfxQspi0_MTSR_P20_12_OUT,
280 &IfxQspi0_MTSR_P20_14_OUT,
281 NULL_PTR,
282 NULL_PTR,
283 NULL_PTR,
284 NULL_PTR
285 },
286 {
287 &IfxQspi1_MTSR_P10_1_OUT,
288 &IfxQspi1_MTSR_P10_3_OUT,
289 &IfxQspi1_MTSR_P10_4_OUT,
290 &IfxQspi1_MTSR_P11_9_OUT,
291 NULL_PTR,
292 NULL_PTR
293 },
294 {
295 &IfxQspi2_MTSRN_P13_2_OUT,
296 &IfxQspi2_MTSRP_P13_3_OUT,
297 &IfxQspi2_MTSR_P15_5_OUT,
298 &IfxQspi2_MTSR_P15_6_OUT,
299 NULL_PTR,
300 NULL_PTR
301 },
302 {
303 &IfxQspi3_MTSR_P02_6_OUT,
304 &IfxQspi3_MTSR_P10_6_OUT,
305 &IfxQspi3_MTSR_P22_0_OUT,
306 &IfxQspi3_MTSRN_P22_2_OUT,
307 &IfxQspi3_MTSRP_P22_3_OUT,
308 &IfxQspi3_MTSR_P33_12_OUT
309 }
310 };
311
312 const IfxQspi_Sclk_In *IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS] = {
313 {
314 &IfxQspi0_SCLKA_P20_11_IN,
315 NULL_PTR,
316 NULL_PTR,
317 NULL_PTR,
318 NULL_PTR
319 },
320 {
321 &IfxQspi1_SCLKA_P10_2_IN,
322 &IfxQspi1_SCLKB_P11_6_IN,
323 NULL_PTR,
324 NULL_PTR,
325 NULL_PTR
326 },
327 {
328 &IfxQspi2_SCLKA_P15_3_IN,
329 &IfxQspi2_SCLKB_P15_8_IN,
330 NULL_PTR,
331 NULL_PTR,
332 NULL_PTR
333 },
334 {
335 &IfxQspi3_SCLKA_P02_7_IN,
336 &IfxQspi3_SCLKB_P10_8_IN,
337 NULL_PTR,
338 &IfxQspi3_SCLKD_P33_11_IN,
339 &IfxQspi3_SCLKE_P22_3_IN
340 }
341 };
342
343 const IfxQspi_Sclk_Out *IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS] = {
344 {
345 &IfxQspi0_SCLK_P20_11_OUT,
346 &IfxQspi0_SCLK_P20_13_OUT,
347 NULL_PTR,
348 NULL_PTR,
349 NULL_PTR,
350 NULL_PTR
351 },
352 {
353 &IfxQspi1_SCLK_P10_2_OUT,
354 &IfxQspi1_SCLK_P11_6_OUT,
355 NULL_PTR,
356 NULL_PTR,
357 NULL_PTR,
358 NULL_PTR
359 },
360 {
361 &IfxQspi2_SCLKN_P13_0_OUT,
362 &IfxQspi2_SCLKP_P13_1_OUT,
363 &IfxQspi2_SCLK_P15_3_OUT,
364 &IfxQspi2_SCLK_P15_6_OUT,
365 &IfxQspi2_SCLK_P15_8_OUT,
366 NULL_PTR
367 },
368 {
369 &IfxQspi3_SCLK_P02_7_OUT,
370 &IfxQspi3_SCLK_P10_8_OUT,
371 &IfxQspi3_SCLKN_P22_0_OUT,
372 &IfxQspi3_SCLKP_P22_1_OUT,
373 &IfxQspi3_SCLK_P22_3_OUT,
374 &IfxQspi3_SCLK_P33_11_OUT
375 }
376 };
377
378 const IfxQspi_Slsi_In *IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS] = {
379 {
380 &IfxQspi0_SLSIA_P20_13_IN,
381 &IfxQspi0_SLSIB_P20_9_IN,
382 NULL_PTR,
383 NULL_PTR
384 },
385 {
386 &IfxQspi1_SLSIA_P11_10_IN,
387 NULL_PTR,
388 NULL_PTR,
389 NULL_PTR
390 },
391 {
392 &IfxQspi2_SLSIA_P15_2_IN,
393 &IfxQspi2_SLSIB_P15_1_IN,
394 NULL_PTR,
395 NULL_PTR
396 },
397 {
398 &IfxQspi3_SLSIA_P02_4_IN,
399 NULL_PTR,
400 &IfxQspi3_SLSIC_P33_10_IN,
401 &IfxQspi3_SLSID_P22_2_IN
402 }
403 };
404
405 const IfxQspi_Slso_Out *IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS] = {
406 {
407 {
408 &IfxQspi0_SLSO0_P20_8_OUT,
409 NULL_PTR
410 },
411 {
412 &IfxQspi0_SLSO1_P20_9_OUT,
413 NULL_PTR
414 },
415 {
416 &IfxQspi0_SLSO2_P20_13_OUT,
417 NULL_PTR
418 },
419 {
420 &IfxQspi0_SLSO3_P11_10_OUT,
421 NULL_PTR
422 },
423 {
424 &IfxQspi0_SLSO4_P11_11_OUT,
425 NULL_PTR
426 },
427 {
428 &IfxQspi0_SLSO5_P11_2_OUT,
429 NULL_PTR
430 },
431 {
432 &IfxQspi0_SLSO6_P20_10_OUT,
433 NULL_PTR
434 },
435 {
436 &IfxQspi0_SLSO7_P33_5_OUT,
437 NULL_PTR
438 },
439 {
440 &IfxQspi0_SLSO8_P20_6_OUT,
441 NULL_PTR
442 },
443 {
444 &IfxQspi0_SLSO9_P20_3_OUT,
445 NULL_PTR
446 },
447 {
448 NULL_PTR,
449 NULL_PTR
450 },
451 {
452 NULL_PTR,
453 NULL_PTR
454 },
455 {
456 NULL_PTR,
457 NULL_PTR
458 },
459 {
460 &IfxQspi0_SLSO13_P15_0_OUT,
461 NULL_PTR
462 }
463 },
464 {
465 {
466 &IfxQspi1_SLSO0_P20_8_OUT,
467 NULL_PTR
468 },
469 {
470 &IfxQspi1_SLSO1_P20_9_OUT,
471 NULL_PTR
472 },
473 {
474 &IfxQspi1_SLSO2_P20_13_OUT,
475 NULL_PTR
476 },
477 {
478 &IfxQspi1_SLSO3_P11_10_OUT,
479 NULL_PTR
480 },
481 {
482 &IfxQspi1_SLSO4_P11_11_OUT,
483 NULL_PTR
484 },
485 {
486 &IfxQspi1_SLSO5_P11_2_OUT,
487 NULL_PTR
488 },
489 {
490 &IfxQspi1_SLSO6_P33_10_OUT,
491 NULL_PTR
492 },
493 {
494 &IfxQspi1_SLSO7_P33_5_OUT,
495 NULL_PTR
496 },
497 {
498 &IfxQspi1_SLSO8_P10_4_OUT,
499 NULL_PTR
500 },
501 {
502 &IfxQspi1_SLSO9_P10_5_OUT,
503 NULL_PTR
504 },
505 {
506 &IfxQspi1_SLSO10_P10_0_OUT,
507 NULL_PTR
508 },
509 {
510 NULL_PTR,
511 NULL_PTR
512 },
513 {
514 NULL_PTR,
515 NULL_PTR
516 },
517 {
518 NULL_PTR,
519 NULL_PTR
520 }
521 },
522 {
523 {
524 &IfxQspi2_SLSO0_P15_2_OUT,
525 NULL_PTR
526 },
527 {
528 &IfxQspi2_SLSO1_P14_2_OUT,
529 NULL_PTR
530 },
531 {
532 &IfxQspi2_SLSO2_P14_6_OUT,
533 NULL_PTR
534 },
535 {
536 &IfxQspi2_SLSO3_P14_3_OUT,
537 NULL_PTR
538 },
539 {
540 &IfxQspi2_SLSO4_P14_7_OUT,
541 NULL_PTR
542 },
543 {
544 &IfxQspi2_SLSO5_P15_1_OUT,
545 NULL_PTR
546 },
547 {
548 &IfxQspi2_SLSO6_P33_13_OUT,
549 NULL_PTR
550 },
551 {
552 &IfxQspi2_SLSO7_P20_10_OUT,
553 NULL_PTR
554 },
555 {
556 &IfxQspi2_SLSO8_P20_6_OUT,
557 NULL_PTR
558 },
559 {
560 &IfxQspi2_SLSO9_P20_3_OUT,
561 NULL_PTR
562 },
563 {
564 NULL_PTR,
565 NULL_PTR
566 },
567 {
568 NULL_PTR,
569 NULL_PTR
570 },
571 {
572 NULL_PTR,
573 NULL_PTR
574 },
575 {
576 NULL_PTR,
577 NULL_PTR
578 }
579 },
580 {
581 {
582 &IfxQspi3_SLSO0_P02_4_OUT,
583 NULL_PTR
584 },
585 {
586 &IfxQspi3_SLSO1_P02_0_OUT,
587 &IfxQspi3_SLSO1_P33_9_OUT
588 },
589 {
590 &IfxQspi3_SLSO2_P02_1_OUT,
591 &IfxQspi3_SLSO2_P33_8_OUT
592 },
593 {
594 &IfxQspi3_SLSO3_P02_2_OUT,
595 NULL_PTR
596 },
597 {
598 &IfxQspi3_SLSO4_P02_3_OUT,
599 &IfxQspi3_SLSO4_P23_5_OUT
600 },
601 {
602 &IfxQspi3_SLSO5_P02_8_OUT,
603 &IfxQspi3_SLSO5_P23_4_OUT
604 },
605 {
606 &IfxQspi3_SLSO6_P00_8_OUT,
607 NULL_PTR
608 },
609 {
610 &IfxQspi3_SLSO7_P00_9_OUT,
611 &IfxQspi3_SLSO7_P33_7_OUT
612 },
613 {
614 &IfxQspi3_SLSO8_P10_5_OUT,
615 NULL_PTR
616 },
617 {
618 NULL_PTR,
619 NULL_PTR
620 },
621 {
622 NULL_PTR,
623 NULL_PTR
624 },
625 {
626 &IfxQspi3_SLSO11_P33_10_OUT,
627 NULL_PTR
628 },
629 {
630 &IfxQspi3_SLSO12_P22_2_OUT,
631 NULL_PTR
632 },
633 {
634 &IfxQspi3_SLSO13_P23_1_OUT,
635 NULL_PTR
636 }
637 }
638 };
IfxQspi1_MTSR_P10_4_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
Definition: IfxQspi_PinMap.c:70
IfxQspi2_SLSO1_P14_2_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
Definition: IfxQspi_PinMap.c:137
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:79
IfxQspi3_SLSO2_P33_8_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT
Definition: IfxQspi_PinMap.c:153
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:63
IfxQspi3_MRSTB_P10_7_IN
IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
Definition: IfxQspi_PinMap.c:41
IfxQspi3_SLSO4_P02_3_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
Definition: IfxQspi_PinMap.c:155
IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:250
IfxQspi2_MRSTCN_P21_2_IN
IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
Definition: IfxQspi_PinMap.c:37
IfxQspi0_SLSO4_P11_11_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
Definition: IfxQspi_PinMap.c:119
IfxQspi2_SCLKB_P15_8_IN
IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
Definition: IfxQspi_PinMap.c:86
IfxQspi3_SLSO4_P23_5_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT
Definition: IfxQspi_PinMap.c:156
IfxQspi0_SLSO1_P20_9_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
Definition: IfxQspi_PinMap.c:116
IfxQspi3_SLSO8_P10_5_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
Definition: IfxQspi_PinMap.c:162
Ifx_RxSel_e
Definition: Ifx_Types.h:116
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxQspi2_MRSTE_P15_2_IN
IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
Definition: IfxQspi_PinMap.c:39
IfxQspi3_SCLKN_P22_0_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT
Definition: IfxQspi_PinMap.c:100
IfxQspi3_SLSO11_P33_10_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT
Definition: IfxQspi_PinMap.c:147
IfxQspi3_SLSO0_P02_4_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
Definition: IfxQspi_PinMap.c:146
IfxQspi3_SLSIA_P02_4_IN
IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
Definition: IfxQspi_PinMap.c:111
IfxQspi2_MRST_P15_7_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
Definition: IfxQspi_PinMap.c:51
IfxQspi1_SLSO5_P11_2_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
Definition: IfxQspi_PinMap.c:131
IfxQspi0_SLSO3_P11_10_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
Definition: IfxQspi_PinMap.c:118
IfxQspi3_SCLKE_P22_3_IN
IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
Definition: IfxQspi_PinMap.c:90
IfxQspi2_HSICINA_P15_2_IN
IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
Definition: IfxQspi_PinMap.c:28
IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:255
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:55
IfxQspi2_SLSO6_P33_13_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
Definition: IfxQspi_PinMap.c:142
IfxQspi2_MTSR_P15_6_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
Definition: IfxQspi_PinMap.c:75
IfxQspi2_MRSTB_P15_7_IN
IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
Definition: IfxQspi_PinMap.c:36
IfxQspi0_SLSO0_P20_8_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
Definition: IfxQspi_PinMap.c:114
IfxQspi2_SLSIA_P15_2_IN
IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
Definition: IfxQspi_PinMap.c:109
IfxQspi1_MRST_P10_6_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
Definition: IfxQspi_PinMap.c:48
IfxQspi3_MRST_P02_5_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
Definition: IfxQspi_PinMap.c:52
IfxQspi0_SLSO8_P20_6_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
Definition: IfxQspi_PinMap.c:123
IfxQspi1_SLSO7_P33_5_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
Definition: IfxQspi_PinMap.c:133
IfxQspi3_SLSO7_P33_7_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT
Definition: IfxQspi_PinMap.c:161
IfxQspi1_SCLKB_P11_6_IN
IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
Definition: IfxQspi_PinMap.c:84
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:95
IfxQspi3_MTSR_P22_0_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT
Definition: IfxQspi_PinMap.c:80
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
IfxQspi2_HSICINB_P15_3_IN
IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
Definition: IfxQspi_PinMap.c:29
IfxQspi2_SCLK_P15_8_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
Definition: IfxQspi_PinMap.c:99
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxQspi3_MRSTE_P22_1_IN
IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN
Definition: IfxQspi_PinMap.c:43
IfxQspi1_SLSO2_P20_13_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
Definition: IfxQspi_PinMap.c:128
IfxQspi3_SCLK_P02_7_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
Definition: IfxQspi_PinMap.c:102
IfxQspi3_SCLK_P22_3_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT
Definition: IfxQspi_PinMap.c:104
IfxQspi3_MRSTD_P33_13_IN
IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN
Definition: IfxQspi_PinMap.c:42
IfxQspi3_MTSRE_P22_0_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
Definition: IfxQspi_PinMap.c:65
IfxQspi2_SCLK_P15_6_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
Definition: IfxQspi_PinMap.c:98
IfxQspi2_MTSR_P15_5_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
Definition: IfxQspi_PinMap.c:74
IfxQspi0_MTSR_P20_14_OUT
IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
Definition: IfxQspi_PinMap.c:67
IfxQspi3_SLSO1_P02_0_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
Definition: IfxQspi_PinMap.c:150
IfxQspi2_SLSO4_P14_7_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
Definition: IfxQspi_PinMap.c:140
IfxQspi3_SCLKD_P33_11_IN
IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
Definition: IfxQspi_PinMap.c:89
IfxQspi3_SLSIC_P33_10_IN
IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
Definition: IfxQspi_PinMap.c:112
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxQspi2_SCLK_P15_3_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
Definition: IfxQspi_PinMap.c:97
IfxQspi2_SLSO9_P20_3_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
Definition: IfxQspi_PinMap.c:145
IfxQspi1_MRST_P11_3_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
Definition: IfxQspi_PinMap.c:49
IfxQspi2_SLSO7_P20_10_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
Definition: IfxQspi_PinMap.c:143
IfxQspi3_MRST_P10_7_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
Definition: IfxQspi_PinMap.c:53
IfxQspi3_SLSO5_P02_8_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
Definition: IfxQspi_PinMap.c:157
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:103
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxQspi3_MTSRB_P10_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
Definition: IfxQspi_PinMap.c:63
IfxQspi2_SCLKA_P15_3_IN
IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
Definition: IfxQspi_PinMap.c:85
IfxQspi3_MRSTA_P02_5_IN
IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
Definition: IfxQspi_PinMap.c:40
IfxQspi2_MTSRA_P15_5_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
Definition: IfxQspi_PinMap.c:60
IfxQspi0_SLSO6_P20_10_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
Definition: IfxQspi_PinMap.c:121
IFXQSPI_PINMAP_NUM_MODULES
#define IFXQSPI_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxQspi_PinMap.h:248
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:87
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:47
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:105
IfxQspi3_MRSTFP_P21_3_IN
IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN
Definition: IfxQspi_PinMap.c:45
IfxQspi2_MRSTA_P15_4_IN
IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
Definition: IfxQspi_PinMap.c:35
IfxQspi3_MTSRP_P22_3_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT
Definition: IfxQspi_PinMap.c:77
IfxQspi2_SLSO3_P14_3_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
Definition: IfxQspi_PinMap.c:139
IfxQspi3_MTSR_P33_12_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT
Definition: IfxQspi_PinMap.c:81
IfxQspi3_MRST_P33_13_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
Definition: IfxQspi_PinMap.c:55
IfxQspi1_MTSR_P11_9_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
Definition: IfxQspi_PinMap.c:71
IfxQspi0_SLSIB_P20_9_IN
IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
Definition: IfxQspi_PinMap.c:107
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxQspi1_SCLK_P11_6_OUT
IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
Definition: IfxQspi_PinMap.c:94
IfxQspi1_MTSRB_P11_9_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
Definition: IfxQspi_PinMap.c:58
IfxQspi1_MTSR_P10_1_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
Definition: IfxQspi_PinMap.c:68
IfxQspi2_SLSO8_P20_6_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
Definition: IfxQspi_PinMap.c:144
IfxQspi0_SCLK_P20_11_OUT
IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
Definition: IfxQspi_PinMap.c:91
IfxQspi2_SCLKN_P13_0_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
Definition: IfxQspi_PinMap.c:95
IfxQspi3_SCLK_P10_8_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
Definition: IfxQspi_PinMap.c:103
IfxQspi3_MTSR_P02_6_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
Definition: IfxQspi_PinMap.c:78
IfxQspi1_SCLKA_P10_2_IN
IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
Definition: IfxQspi_PinMap.c:83
IfxQspi1_SLSO10_P10_0_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
Definition: IfxQspi_PinMap.c:126
IfxQspi1_MRST_P10_1_OUT
IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
Definition: IfxQspi_PinMap.c:47
IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:252
IfxQspi_Slsi_In_pinTable
const IfxQspi_Slsi_In * IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:378
IfxQspi3_MTSRD_P33_12_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
Definition: IfxQspi_PinMap.c:64
IfxQspi3_HSICINA_P33_9_IN
IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
Definition: IfxQspi_PinMap.c:30
IfxQspi3_MRST_P22_1_OUT
IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
Definition: IfxQspi_PinMap.c:54
IfxQspi3_SLSO12_P22_2_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT
Definition: IfxQspi_PinMap.c:148
IfxQspi0_SLSO13_P15_0_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
Definition: IfxQspi_PinMap.c:115
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:39
IfxQspi2_MTSRB_P15_6_IN
IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
Definition: IfxQspi_PinMap.c:61
IfxQspi_Mtsr_In_pinTable
const IfxQspi_Mtsr_In * IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:246
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:256
IfxQspi2_SLSO5_P15_1_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
Definition: IfxQspi_PinMap.c:141
IfxQspi1_SLSO9_P10_5_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
Definition: IfxQspi_PinMap.c:135
IfxQspi3_MRSTFN_P21_2_IN
IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN
Definition: IfxQspi_PinMap.c:44
IfxQspi2_MTSRP_P13_3_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
Definition: IfxQspi_PinMap.c:73
IfxQspi1_SCLK_P10_2_OUT
IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
Definition: IfxQspi_PinMap.c:93
IfxQspi3_SCLKB_P10_8_IN
IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
Definition: IfxQspi_PinMap.c:88
IfxQspi1_SLSO1_P20_9_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
Definition: IfxQspi_PinMap.c:127
IfxQspi1_MRSTB_P11_3_IN
IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
Definition: IfxQspi_PinMap.c:34
IfxQspi0_MRST_P20_12_OUT
IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
Definition: IfxQspi_PinMap.c:46
IfxQspi1_MTSRC_P10_4_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
Definition: IfxQspi_PinMap.c:59
IfxQspi1_MRSTA_P10_1_IN
IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
Definition: IfxQspi_PinMap.c:33
IfxQspi1_SLSO6_P33_10_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
Definition: IfxQspi_PinMap.c:132
IfxQspi3_SLSO2_P02_1_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
Definition: IfxQspi_PinMap.c:152
IfxQspi2_MRSTCP_P21_3_IN
IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
Definition: IfxQspi_PinMap.c:38
IfxQspi3_SLSO6_P00_8_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
Definition: IfxQspi_PinMap.c:159
Ifx_RxSel_f
Definition: Ifx_Types.h:117
IfxQspi0_SLSO2_P20_13_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
Definition: IfxQspi_PinMap.c:117
IfxQspi0_SLSIA_P20_13_IN
IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
Definition: IfxQspi_PinMap.c:106
IfxQspi_Mrst_Out_pinTable
const IfxQspi_Mrst_Out * IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:219
IfxQspi2_SLSO0_P15_2_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
Definition: IfxQspi_PinMap.c:136
IfxQspi_PinMap.h
QSPI I/O map.
IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:251
IfxQspi0_SCLK_P20_13_OUT
IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
Definition: IfxQspi_PinMap.c:92
IfxQspi1_SLSO0_P20_8_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
Definition: IfxQspi_PinMap.c:125
IfxQspi3_MTSRN_P22_2_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT
Definition: IfxQspi_PinMap.c:76
IfxQspi1_MTSR_P10_3_OUT
IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
Definition: IfxQspi_PinMap.c:69
IfxQspi3_SLSO3_P02_2_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
Definition: IfxQspi_PinMap.c:154
IfxQspi0_SLSO5_P11_2_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
Definition: IfxQspi_PinMap.c:120
IfxQspi0_MRSTA_P20_12_IN
IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
Definition: IfxQspi_PinMap.c:32
IfxQspi_Hsicin_In
HSICIN pin mapping structure.
Definition: IfxQspi_PinMap.h:71
IfxQspi3_SLSID_P22_2_IN
IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
Definition: IfxQspi_PinMap.c:113
IfxQspi1_MTSRA_P10_3_IN
IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
Definition: IfxQspi_PinMap.c:57
IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:253
IfxQspi0_MTSR_P20_12_OUT
IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
Definition: IfxQspi_PinMap.c:66
IfxQspi_Sclk_In_pinTable
const IfxQspi_Sclk_In * IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:312
IfxQspi0_SCLKA_P20_11_IN
IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
Definition: IfxQspi_PinMap.c:82
IfxQspi3_SCLK_P33_11_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT
Definition: IfxQspi_PinMap.c:105
IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:257
IfxQspi1_SLSO4_P11_11_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
Definition: IfxQspi_PinMap.c:130
IfxQspi_Hsicin_In_pinTable
const IfxQspi_Hsicin_In * IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:165
IfxQspi2_SCLKP_P13_1_OUT
IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
Definition: IfxQspi_PinMap.c:96
IfxQspi_Mrst_In_pinTable
const IfxQspi_Mrst_In * IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:184
IfxQspi0_MTSRA_P20_14_IN
IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
Definition: IfxQspi_PinMap.c:56
IfxQspi1_SLSO3_P11_10_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
Definition: IfxQspi_PinMap.c:129
IfxQspi3_SLSO5_P23_4_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT
Definition: IfxQspi_PinMap.c:158
IfxQspi3_HSICINB_P33_10_IN
IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
Definition: IfxQspi_PinMap.c:31
IfxQspi2_SLSO2_P14_6_OUT
IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
Definition: IfxQspi_PinMap.c:138
IfxQspi3_SLSO7_P00_9_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
Definition: IfxQspi_PinMap.c:160
IfxQspi3_SCLKA_P02_7_IN
IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
Definition: IfxQspi_PinMap.c:87
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxQspi_Slso_Out_pinTable
const IfxQspi_Slso_Out * IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:405
IfxQspi_Sclk_Out_pinTable
const IfxQspi_Sclk_Out * IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:343
IfxQspi0_SLSO9_P20_3_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
Definition: IfxQspi_PinMap.c:124
IfxQspi3_SLSO1_P33_9_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT
Definition: IfxQspi_PinMap.c:151
IfxQspi2_SLSIB_P15_1_IN
IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
Definition: IfxQspi_PinMap.c:110
IfxQspi0_SLSO7_P33_5_OUT
IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
Definition: IfxQspi_PinMap.c:122
IfxQspi_Mtsr_Out_pinTable
const IfxQspi_Mtsr_Out * IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
Definition: IfxQspi_PinMap.c:277
IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:254
IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:258
IfxQspi1_SLSO8_P10_4_OUT
IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
Definition: IfxQspi_PinMap.c:134
IfxQspi3_SLSO13_P23_1_OUT
IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT
Definition: IfxQspi_PinMap.c:149
IfxQspi3_MTSRA_P02_6_IN
IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
Definition: IfxQspi_PinMap.c:62
IfxQspi2_MRST_P15_4_OUT
IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
Definition: IfxQspi_PinMap.c:50
IfxQspi3_MTSR_P10_6_OUT
IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
Definition: IfxQspi_PinMap.c:79
IfxQspi2_MTSRN_P13_2_OUT
IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
Definition: IfxQspi_PinMap.c:72
IfxQspi3_SCLKP_P22_1_OUT
IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT
Definition: IfxQspi_PinMap.c:101
IfxQspi1_SLSIA_P11_10_IN
IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
Definition: IfxQspi_PinMap.c:108
IFXQSPI_PINMAP_NUM_SLAVESELECTS
#define IFXQSPI_PINMAP_NUM_SLAVESELECTS
Definition: IfxQspi_PinMap.h:249


iLLD_TC26B: IfxQspi_PinMap.h Source File

  • _PinMap
IfxQspi_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_PinMap.h
3 * \brief QSPI I/O map
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Qspi_pinmap QSPI Pin Mapping
25 * \ingroup IfxLld_Qspi
26 */
27
28 #ifndef IFXQSPI_PINMAP_H
29 #define IFXQSPI_PINMAP_H
30
31 #include <IfxQspi_reg.h>
32 #include <_Impl/IfxQspi_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Qspi_pinmap
36 * \{ */
37
38 /** \brief MRST pin mapping structure */
39 typedef const struct
40 {
41 Ifx_QSPI* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel select; /**< \brief Input multiplexer value */
44 } IfxQspi_Mrst_In;
45
46 /** \brief MTSR pin mapping structure */
47 typedef const struct
48 {
49 Ifx_QSPI* module; /**< \brief Base address */
50 IfxPort_Pin pin; /**< \brief Port pin */
51 Ifx_RxSel select; /**< \brief Input multiplexer value */
52 } IfxQspi_Mtsr_In;
53
54 /** \brief SCLK pin mapping structure */
55 typedef const struct
56 {
57 Ifx_QSPI* module; /**< \brief Base address */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 Ifx_RxSel select; /**< \brief Input multiplexer value */
60 } IfxQspi_Sclk_In;
61
62 /** \brief SLSI pin mapping structure */
63 typedef const struct
64 {
65 Ifx_QSPI* module; /**< \brief Base address */
66 IfxPort_Pin pin; /**< \brief Port pin */
67 Ifx_RxSel select; /**< \brief Input multiplexer value */
68 } IfxQspi_Slsi_In;
69
70 /** \brief HSICIN pin mapping structure */
71 typedef const struct
72 {
73 Ifx_QSPI* module; /**< \brief Base address */
74 IfxPort_Pin pin; /**< \brief Port pin */
75 Ifx_RxSel select; /**< \brief Input multiplexer value */
76 } IfxQspi_Hsicin_In;
77
78 /** \brief MRST pin mapping structure */
79 typedef const struct
80 {
81 Ifx_QSPI* module; /**< \brief Base address */
82 IfxPort_Pin pin; /**< \brief Port pin */
83 IfxPort_OutputIdx select; /**< \brief Port control code */
84 } IfxQspi_Mrst_Out;
85
86 /** \brief MTSR pin mapping structure */
87 typedef const struct
88 {
89 Ifx_QSPI* module; /**< \brief Base address */
90 IfxPort_Pin pin; /**< \brief Port pin */
91 IfxPort_OutputIdx select; /**< \brief Port control code */
92 } IfxQspi_Mtsr_Out;
93
94 /** \brief SCLK pin mapping structure */
95 typedef const struct
96 {
97 Ifx_QSPI* module; /**< \brief Base address */
98 IfxPort_Pin pin; /**< \brief Port pin */
99 IfxPort_OutputIdx select; /**< \brief Port control code */
100 } IfxQspi_Sclk_Out;
101
102 /** \brief SLSO pin mapping structure */
103 typedef const struct
104 {
105 Ifx_QSPI* module; /**< \brief Base address */
106 sint32 slsoNr; /**< \brief Slave Select */
107 IfxPort_Pin pin; /**< \brief Port pin */
108 IfxPort_OutputIdx select; /**< \brief Port control code */
109 } IfxQspi_Slso_Out;
110
111 IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN; /**< \brief QSPI2_HSICINA: QSPI2 input */
112 IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN; /**< \brief QSPI2_HSICINB: QSPI2 input */
113 IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN; /**< \brief QSPI3_HSICINA: QSPI3 input */
114 IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN; /**< \brief QSPI3_HSICINB: QSPI3 input */
115 IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN; /**< \brief QSPI0_MRSTA: QSPI0 input */
116 IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN; /**< \brief QSPI1_MRSTA: QSPI1 input */
117 IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN; /**< \brief QSPI1_MRSTB: QSPI1 input */
118 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN; /**< \brief QSPI2_MRSTA: QSPI2 input */
119 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN; /**< \brief QSPI2_MRSTB: QSPI2 input */
120 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN; /**< \brief QSPI2_MRSTCN: QSPI2 input (LVDS) */
121 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN; /**< \brief QSPI2_MRSTCP: QSPI2 input (LVDS) */
122 IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN; /**< \brief QSPI2_MRSTE: QSPI2 input */
123 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN; /**< \brief QSPI3_MRSTA: QSPI3 input */
124 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN; /**< \brief QSPI3_MRSTB: QSPI3 input */
125 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN; /**< \brief QSPI3_MRSTD: QSPI3 input */
126 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN; /**< \brief QSPI3_MRSTE: QSPI3 input */
127 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN; /**< \brief QSPI3_MRSTFN: QSPI3 input (LVDS) */
128 IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN; /**< \brief QSPI3_MRSTFP: QSPI3 input (LVDS) */
129 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT; /**< \brief QSPI0_MRST: QSPI0 output */
130 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
131 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
132 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
133 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT; /**< \brief QSPI2_MRST: QSPI2 output */
134 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT; /**< \brief QSPI2_MRST: QSPI2 output */
135 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
136 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
137 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
138 IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
139 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN; /**< \brief QSPI0_MTSRA: QSPI0 input */
140 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN; /**< \brief QSPI1_MTSRA: QSPI1 input */
141 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN; /**< \brief QSPI1_MTSRB: QSPI1 input */
142 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN; /**< \brief QSPI1_MTSRC: QSPI1 input */
143 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN; /**< \brief QSPI2_MTSRA: QSPI2 input */
144 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN; /**< \brief QSPI2_MTSRB: QSPI2 input */
145 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN; /**< \brief QSPI3_MTSRA: QSPI3 input */
146 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN; /**< \brief QSPI3_MTSRB: QSPI3 input */
147 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN; /**< \brief QSPI3_MTSRD: QSPI3 input */
148 IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN; /**< \brief QSPI3_MTSRE: QSPI3 input */
149 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT; /**< \brief QSPI0_MTSR: QSPI0 output */
150 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT; /**< \brief QSPI0_MTSR: QSPI0 output */
151 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
152 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
153 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
154 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
155 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT; /**< \brief QSPI2_MTSRN: QSPI2 output (LVDS) */
156 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT; /**< \brief QSPI2_MTSRP: QSPI2 output (LVDS) */
157 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT; /**< \brief QSPI2_MTSR: QSPI2 output */
158 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT; /**< \brief QSPI2_MTSR: QSPI2 output */
159 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT; /**< \brief QSPI3_MTSRN: QSPI3 output (LVDS) */
160 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT; /**< \brief QSPI3_MTSRP: QSPI3 output (LVDS) */
161 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
162 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
163 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT; /**< \brief QSPI3_MTSR: QSPI3 output (LVDS) */
164 IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
165 IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN; /**< \brief QSPI0_SCLKA: QSPI0 input */
166 IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN; /**< \brief QSPI1_SCLKA: QSPI1 input */
167 IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN; /**< \brief QSPI1_SCLKB: QSPI1 input */
168 IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN; /**< \brief QSPI2_SCLKA: QSPI2 input */
169 IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN; /**< \brief QSPI2_SCLKB: QSPI2 input */
170 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN; /**< \brief QSPI3_SCLKA: QSPI3 input */
171 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN; /**< \brief QSPI3_SCLKB: QSPI3 input */
172 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN; /**< \brief QSPI3_SCLKD: QSPI3 input */
173 IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN; /**< \brief QSPI3_SCLKE: QSPI3 input */
174 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT; /**< \brief QSPI0_SCLK: QSPI0 output */
175 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT; /**< \brief QSPI0_SCLK: QSPI0 output */
176 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT; /**< \brief QSPI1_SCLK: QSPI1 output */
177 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT; /**< \brief QSPI1_SCLK: QSPI1 output */
178 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT; /**< \brief QSPI2_SCLKN: QSPI2 output (LVDS) */
179 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT; /**< \brief QSPI2_SCLKP: QSPI2 output (LVDS) */
180 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
181 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
182 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
183 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT; /**< \brief QSPI3_SCLKN: QSPI3 output */
184 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT; /**< \brief QSPI3_SCLKP: QSPI3 output (LVDS) */
185 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
186 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
187 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
188 IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
189 IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN; /**< \brief QSPI0_SLSIA: QSPI0 input */
190 IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN; /**< \brief QSPI0_SLSIB: QSPI0 input */
191 IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN; /**< \brief QSPI1_SLSIA: QSPI1 input */
192 IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN; /**< \brief QSPI2_SLSIA: QSPI2 input */
193 IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN; /**< \brief QSPI2_SLSIB: QSPI2 input */
194 IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN; /**< \brief QSPI3_SLSIA: QSPI3 input */
195 IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN; /**< \brief QSPI3_SLSIC: QSPI3 input */
196 IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN; /**< \brief QSPI3_SLSID: QSPI3 input */
197 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT; /**< \brief QSPI0_SLSO0: QSPI0 output */
198 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT; /**< \brief QSPI0_SLSO13: QSPI0 output */
199 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT; /**< \brief QSPI0_SLSO1: QSPI0 output */
200 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT; /**< \brief QSPI0_SLSO2: QSPI0 output */
201 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT; /**< \brief QSPI0_SLSO3: QSPI0 output */
202 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT; /**< \brief QSPI0_SLSO4: QSPI0 output */
203 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT; /**< \brief QSPI0_SLSO5: QSPI0 output */
204 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT; /**< \brief QSPI0_SLSO6: QSPI0 output */
205 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT; /**< \brief QSPI0_SLSO7: QSPI0 output */
206 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT; /**< \brief QSPI0_SLSO8: QSPI0 output */
207 IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT; /**< \brief QSPI0_SLSO9: QSPI0 output */
208 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT; /**< \brief QSPI1_SLSO0: QSPI1 output */
209 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT; /**< \brief QSPI1_SLSO10: QSPI1 output */
210 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT; /**< \brief QSPI1_SLSO1: QSPI1 output */
211 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT; /**< \brief QSPI1_SLSO2: QSPI1 output */
212 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT; /**< \brief QSPI1_SLSO3: QSPI1 output */
213 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT; /**< \brief QSPI1_SLSO4: QSPI1 output */
214 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT; /**< \brief QSPI1_SLSO5: QSPI1 output */
215 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT; /**< \brief QSPI1_SLSO6: QSPI1 output */
216 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT; /**< \brief QSPI1_SLSO7: QSPI1 output */
217 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT; /**< \brief QSPI1_SLSO8: QSPI1 output */
218 IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT; /**< \brief QSPI1_SLSO9: QSPI1 output */
219 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT; /**< \brief QSPI2_SLSO0: QSPI2 output */
220 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT; /**< \brief QSPI2_SLSO1: QSPI2 output */
221 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT; /**< \brief QSPI2_SLSO2: QSPI2 output */
222 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT; /**< \brief QSPI2_SLSO3: QSPI2 output */
223 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT; /**< \brief QSPI2_SLSO4: QSPI2 output */
224 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT; /**< \brief QSPI2_SLSO5: QSPI2 output */
225 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT; /**< \brief QSPI2_SLSO6: QSPI2 output */
226 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT; /**< \brief QSPI2_SLSO7: QSPI2 output */
227 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT; /**< \brief QSPI2_SLSO8: QSPI2 output */
228 IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT; /**< \brief QSPI2_SLSO9: QSPI2 output */
229 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT; /**< \brief QSPI3_SLSO0: QSPI3 output */
230 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT; /**< \brief QSPI3_SLSO11: QSPI3 output */
231 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT; /**< \brief QSPI3_SLSO12: QSPI3 output */
232 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT; /**< \brief QSPI3_SLSO13: QSPI3 output */
233 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT; /**< \brief QSPI3_SLSO1: QSPI3 output */
234 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT; /**< \brief QSPI3_SLSO1: QSPI3 output */
235 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT; /**< \brief QSPI3_SLSO2: QSPI3 output */
236 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT; /**< \brief QSPI3_SLSO2: QSPI3 output */
237 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT; /**< \brief QSPI3_SLSO3: QSPI3 output */
238 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT; /**< \brief QSPI3_SLSO4: QSPI3 output */
239 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT; /**< \brief QSPI3_SLSO4: QSPI3 output */
240 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT; /**< \brief QSPI3_SLSO5: QSPI3 output */
241 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT; /**< \brief QSPI3_SLSO5: QSPI3 output */
242 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT; /**< \brief QSPI3_SLSO6: QSPI3 output */
243 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT; /**< \brief QSPI3_SLSO7: QSPI3 output */
244 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT; /**< \brief QSPI3_SLSO7: QSPI3 output */
245 IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT; /**< \brief QSPI3_SLSO8: QSPI3 output */
246
247 /** \brief Table dimensions */
248 #define IFXQSPI_PINMAP_NUM_MODULES 4
249 #define IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
250 #define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2
251 #define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
252 #define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4
253 #define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5
254 #define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6
255 #define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5
256 #define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6
257 #define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4
258 #define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2
259
260
261 /** \brief IfxQspi_Hsicin_In table */
262 IFX_EXTERN const IfxQspi_Hsicin_In *IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS];
263
264 /** \brief IfxQspi_Mrst_In table */
265 IFX_EXTERN const IfxQspi_Mrst_In *IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS];
266
267 /** \brief IfxQspi_Mrst_Out table */
268 IFX_EXTERN const IfxQspi_Mrst_Out *IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS];
269
270 /** \brief IfxQspi_Mtsr_In table */
271 IFX_EXTERN const IfxQspi_Mtsr_In *IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS];
272
273 /** \brief IfxQspi_Mtsr_Out table */
274 IFX_EXTERN const IfxQspi_Mtsr_Out *IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS];
275
276 /** \brief IfxQspi_Sclk_In table */
277 IFX_EXTERN const IfxQspi_Sclk_In *IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS];
278
279 /** \brief IfxQspi_Sclk_Out table */
280 IFX_EXTERN const IfxQspi_Sclk_Out *IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS];
281
282 /** \brief IfxQspi_Slsi_In table */
283 IFX_EXTERN const IfxQspi_Slsi_In *IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS];
284
285 /** \brief IfxQspi_Slso_Out table */
286 IFX_EXTERN const IfxQspi_Slso_Out *IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS];
287
288 /** \} */
289
290 #endif /* IFXQSPI_PINMAP_H */
IfxQspi1_MRSTA_P10_1_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN
QSPI1_MRSTA: QSPI1 input.
Definition: IfxQspi_PinMap.h:116
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:79
IfxQspi2_SCLKP_P13_1_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT
QSPI2_SCLKP: QSPI2 output (LVDS)
Definition: IfxQspi_PinMap.h:179
IfxQspi2_SLSO6_P33_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT
QSPI2_SLSO6: QSPI2 output.
Definition: IfxQspi_PinMap.h:225
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:63
IfxQspi3_MTSRN_P22_2_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT
QSPI3_MTSRN: QSPI3 output (LVDS)
Definition: IfxQspi_PinMap.h:159
IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:250
IfxQspi1_SLSO4_P11_11_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT
QSPI1_SLSO4: QSPI1 output.
Definition: IfxQspi_PinMap.h:213
IfxQspi1_MTSR_P10_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT
QSPI1_MTSR: QSPI1 output.
Definition: IfxQspi_PinMap.h:152
IfxQspi3_SLSO1_P02_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT
QSPI3_SLSO1: QSPI3 output.
Definition: IfxQspi_PinMap.h:233
IfxQspi2_MRSTA_P15_4_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN
QSPI2_MRSTA: QSPI2 input.
Definition: IfxQspi_PinMap.h:118
IfxQspi1_MRST_P10_1_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT
QSPI1_MRST: QSPI1 output.
Definition: IfxQspi_PinMap.h:130
IfxQspi0_SLSO0_P20_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT
QSPI0_SLSO0: QSPI0 output.
Definition: IfxQspi_PinMap.h:197
IfxQspi3_SLSO3_P02_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT
QSPI3_SLSO3: QSPI3 output.
Definition: IfxQspi_PinMap.h:237
IfxQspi0_MRSTA_P20_12_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN
QSPI0_MRSTA: QSPI0 input.
Definition: IfxQspi_PinMap.h:115
IfxQspi3_MTSR_P02_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT
QSPI3_MTSR: QSPI3 output.
Definition: IfxQspi_PinMap.h:161
IfxQspi3_SLSIA_P02_4_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN
QSPI3_SLSIA: QSPI3 input.
Definition: IfxQspi_PinMap.h:194
IfxQspi0_SCLK_P20_11_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT
QSPI0_SCLK: QSPI0 output.
Definition: IfxQspi_PinMap.h:174
IfxQspi1_SLSO1_P20_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT
QSPI1_SLSO1: QSPI1 output.
Definition: IfxQspi_PinMap.h:210
IfxQspi0_MTSRA_P20_14_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN
QSPI0_MTSRA: QSPI0 input.
Definition: IfxQspi_PinMap.h:139
IfxQspi2_SLSO2_P14_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT
QSPI2_SLSO2: QSPI2 output.
Definition: IfxQspi_PinMap.h:221
IfxQspi_Mrst_In_pinTable
IFX_EXTERN const IfxQspi_Mrst_In * IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS]
IfxQspi_Mrst_In table.
Definition: IfxQspi_PinMap.h:265
IfxQspi0_SLSO8_P20_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT
QSPI0_SLSO8: QSPI0 output.
Definition: IfxQspi_PinMap.h:206
IfxQspi3_SLSO8_P10_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT
QSPI3_SLSO8: QSPI3 output.
Definition: IfxQspi_PinMap.h:245
IfxQspi1_MTSRC_P10_4_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN
QSPI1_MTSRC: QSPI1 input.
Definition: IfxQspi_PinMap.h:142
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxQspi_Mrst_Out_pinTable
IFX_EXTERN const IfxQspi_Mrst_Out * IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS]
IfxQspi_Mrst_Out table.
Definition: IfxQspi_PinMap.h:268
IfxQspi3_HSICINB_P33_10_IN
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN
QSPI3_HSICINB: QSPI3 input.
Definition: IfxQspi_PinMap.h:114
IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:255
IfxQspi3_MRSTD_P33_13_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN
QSPI3_MRSTD: QSPI3 input.
Definition: IfxQspi_PinMap.h:125
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:55
IfxQspi3_MRSTFN_P21_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN
QSPI3_MRSTFN: QSPI3 input (LVDS)
Definition: IfxQspi_PinMap.h:127
IfxQspi2_MTSRB_P15_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN
QSPI2_MTSRB: QSPI2 input.
Definition: IfxQspi_PinMap.h:144
IfxQspi3_MRST_P33_13_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT
QSPI3_MRST: QSPI3 output.
Definition: IfxQspi_PinMap.h:138
IfxQspi2_HSICINB_P15_3_IN
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN
QSPI2_HSICINB: QSPI2 input.
Definition: IfxQspi_PinMap.h:112
IfxQspi1_SCLK_P11_6_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT
QSPI1_SCLK: QSPI1 output.
Definition: IfxQspi_PinMap.h:177
IfxQspi0_SLSO4_P11_11_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT
QSPI0_SLSO4: QSPI0 output.
Definition: IfxQspi_PinMap.h:202
IfxQspi3_MTSRA_P02_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN
QSPI3_MTSRA: QSPI3 input.
Definition: IfxQspi_PinMap.h:145
IfxQspi3_MTSR_P33_12_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT
QSPI3_MTSR: QSPI3 output.
Definition: IfxQspi_PinMap.h:164
IfxQspi1_MTSR_P11_9_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT
QSPI1_MTSR: QSPI1 output.
Definition: IfxQspi_PinMap.h:154
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:95
IfxQspi3_HSICINA_P33_9_IN
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN
QSPI3_HSICINA: QSPI3 input.
Definition: IfxQspi_PinMap.h:113
IfxQspi1_SLSO9_P10_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT
QSPI1_SLSO9: QSPI1 output.
Definition: IfxQspi_PinMap.h:218
IfxQspi2_SCLKB_P15_8_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN
QSPI2_SCLKB: QSPI2 input.
Definition: IfxQspi_PinMap.h:169
IfxQspi3_SCLK_P22_3_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT
QSPI3_SCLK: QSPI3 output.
Definition: IfxQspi_PinMap.h:187
IfxQspi1_SLSO7_P33_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT
QSPI1_SLSO7: QSPI1 output.
Definition: IfxQspi_PinMap.h:216
IfxQspi2_HSICINA_P15_2_IN
IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN
QSPI2_HSICINA: QSPI2 input.
Definition: IfxQspi_PinMap.h:111
IfxQspi3_SCLKB_P10_8_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN
QSPI3_SCLKB: QSPI3 input.
Definition: IfxQspi_PinMap.h:171
IfxQspi2_MRSTB_P15_7_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN
QSPI2_MRSTB: QSPI2 input.
Definition: IfxQspi_PinMap.h:119
IfxQspi_Mtsr_Out_pinTable
IFX_EXTERN const IfxQspi_Mtsr_Out * IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS]
IfxQspi_Mtsr_Out table.
Definition: IfxQspi_PinMap.h:274
IfxQspi3_SLSO1_P33_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT
QSPI3_SLSO1: QSPI3 output.
Definition: IfxQspi_PinMap.h:234
IfxQspi3_SLSO2_P33_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT
QSPI3_SLSO2: QSPI3 output.
Definition: IfxQspi_PinMap.h:236
IfxQspi3_MRSTB_P10_7_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN
QSPI3_MRSTB: QSPI3 input.
Definition: IfxQspi_PinMap.h:124
IfxQspi0_SLSO2_P20_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT
QSPI0_SLSO2: QSPI0 output.
Definition: IfxQspi_PinMap.h:200
IfxQspi1_SLSO6_P33_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT
QSPI1_SLSO6: QSPI1 output.
Definition: IfxQspi_PinMap.h:215
IfxQspi_Slso_Out_pinTable
IFX_EXTERN const IfxQspi_Slso_Out * IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS]
IfxQspi_Slso_Out table.
Definition: IfxQspi_PinMap.h:286
IfxQspi_Hsicin_In_pinTable
IFX_EXTERN const IfxQspi_Hsicin_In * IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS]
IfxQspi_Hsicin_In table.
Definition: IfxQspi_PinMap.h:262
IfxQspi3_MRSTA_P02_5_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN
QSPI3_MRSTA: QSPI3 input.
Definition: IfxQspi_PinMap.h:123
IfxQspi3_MTSRB_P10_6_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN
QSPI3_MTSRB: QSPI3 input.
Definition: IfxQspi_PinMap.h:146
IfxQspi2_SLSIA_P15_2_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN
QSPI2_SLSIA: QSPI2 input.
Definition: IfxQspi_PinMap.h:192
IfxQspi2_MRSTCP_P21_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN
QSPI2_MRSTCP: QSPI2 input (LVDS)
Definition: IfxQspi_PinMap.h:121
IfxQspi_Mrst_In::module
Ifx_QSPI * module
Base address.
Definition: IfxQspi_PinMap.h:41
IfxQspi3_SCLKD_P33_11_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN
QSPI3_SCLKD: QSPI3 input.
Definition: IfxQspi_PinMap.h:172
IfxQspi1_MRSTB_P11_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN
QSPI1_MRSTB: QSPI1 input.
Definition: IfxQspi_PinMap.h:117
IfxQspi2_SCLK_P15_8_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT
QSPI2_SCLK: QSPI2 output.
Definition: IfxQspi_PinMap.h:182
IfxQspi3_SLSO7_P33_7_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT
QSPI3_SLSO7: QSPI3 output.
Definition: IfxQspi_PinMap.h:244
IfxQspi_Mrst_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxQspi_PinMap.h:43
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:103
IfxQspi2_SLSO8_P20_6_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT
QSPI2_SLSO8: QSPI2 output.
Definition: IfxQspi_PinMap.h:227
IfxQspi0_SCLK_P20_13_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT
QSPI0_SCLK: QSPI0 output.
Definition: IfxQspi_PinMap.h:175
IfxQspi1_SLSO5_P11_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT
QSPI1_SLSO5: QSPI1 output.
Definition: IfxQspi_PinMap.h:214
IfxQspi0_SLSIB_P20_9_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN
QSPI0_SLSIB: QSPI0 input.
Definition: IfxQspi_PinMap.h:190
IfxQspi3_SLSO6_P00_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT
QSPI3_SLSO6: QSPI3 output.
Definition: IfxQspi_PinMap.h:242
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFXQSPI_PINMAP_NUM_MODULES
#define IFXQSPI_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxQspi_PinMap.h:248
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:87
IfxQspi3_MRSTE_P22_1_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN
QSPI3_MRSTE: QSPI3 input.
Definition: IfxQspi_PinMap.h:126
IfxQspi0_SLSO9_P20_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT
QSPI0_SLSO9: QSPI0 output.
Definition: IfxQspi_PinMap.h:207
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:47
IfxQspi2_MTSRN_P13_2_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT
QSPI2_MTSRN: QSPI2 output (LVDS)
Definition: IfxQspi_PinMap.h:155
IfxQspi_Mrst_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:83
IfxQspi0_MTSR_P20_14_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT
QSPI0_MTSR: QSPI0 output.
Definition: IfxQspi_PinMap.h:150
IfxQspi3_SLSO5_P02_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT
QSPI3_SLSO5: QSPI3 output.
Definition: IfxQspi_PinMap.h:240
IfxQspi3_SLSO4_P23_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT
QSPI3_SLSO4: QSPI3 output.
Definition: IfxQspi_PinMap.h:239
IfxQspi1_SCLKB_P11_6_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN
QSPI1_SCLKB: QSPI1 input.
Definition: IfxQspi_PinMap.h:167
IfxQspi3_MTSR_P10_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT
QSPI3_MTSR: QSPI3 output.
Definition: IfxQspi_PinMap.h:162
IfxQspi1_SLSO3_P11_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT
QSPI1_SLSO3: QSPI1 output.
Definition: IfxQspi_PinMap.h:212
IfxQspi2_SCLK_P15_6_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT
QSPI2_SCLK: QSPI2 output.
Definition: IfxQspi_PinMap.h:181
IfxQspi_Mrst_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:42
IfxQspi0_SLSO13_P15_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT
QSPI0_SLSO13: QSPI0 output.
Definition: IfxQspi_PinMap.h:198
IfxQspi0_SLSO7_P33_5_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT
QSPI0_SLSO7: QSPI0 output.
Definition: IfxQspi_PinMap.h:205
IfxQspi0_SLSO6_P20_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT
QSPI0_SLSO6: QSPI0 output.
Definition: IfxQspi_PinMap.h:204
IfxQspi1_MTSR_P10_1_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT
QSPI1_MTSR: QSPI1 output.
Definition: IfxQspi_PinMap.h:151
IfxQspi2_SCLK_P15_3_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT
QSPI2_SCLK: QSPI2 output.
Definition: IfxQspi_PinMap.h:180
IfxQspi3_SCLKP_P22_1_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT
QSPI3_SCLKP: QSPI3 output (LVDS)
Definition: IfxQspi_PinMap.h:184
IfxQspi0_SLSO1_P20_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT
QSPI0_SLSO1: QSPI0 output.
Definition: IfxQspi_PinMap.h:199
IfxQspi3_MRST_P02_5_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT
QSPI3_MRST: QSPI3 output.
Definition: IfxQspi_PinMap.h:135
IfxQspi3_MRST_P22_1_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT
QSPI3_MRST: QSPI3 output.
Definition: IfxQspi_PinMap.h:137
IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:252
IfxQspi_Mtsr_In_pinTable
IFX_EXTERN const IfxQspi_Mtsr_In * IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS]
IfxQspi_Mtsr_In table.
Definition: IfxQspi_PinMap.h:271
IfxQspi3_SLSO5_P23_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT
QSPI3_SLSO5: QSPI3 output.
Definition: IfxQspi_PinMap.h:241
IfxQspi1_MTSRB_P11_9_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN
QSPI1_MTSRB: QSPI1 input.
Definition: IfxQspi_PinMap.h:141
IfxQspi2_MTSR_P15_6_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT
QSPI2_MTSR: QSPI2 output.
Definition: IfxQspi_PinMap.h:158
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:39
IfxQspi3_SLSO7_P00_9_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT
QSPI3_SLSO7: QSPI3 output.
Definition: IfxQspi_PinMap.h:243
IfxQspi3_SLSID_P22_2_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN
QSPI3_SLSID: QSPI3 input.
Definition: IfxQspi_PinMap.h:196
IfxQspi0_SCLKA_P20_11_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN
QSPI0_SCLKA: QSPI0 input.
Definition: IfxQspi_PinMap.h:165
IfxQspi3_SLSO12_P22_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT
QSPI3_SLSO12: QSPI3 output.
Definition: IfxQspi_PinMap.h:231
IfxQspi0_SLSO5_P11_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT
QSPI0_SLSO5: QSPI0 output.
Definition: IfxQspi_PinMap.h:203
IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:256
IfxQspi2_SLSO4_P14_7_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT
QSPI2_SLSO4: QSPI2 output.
Definition: IfxQspi_PinMap.h:223
IfxQspi1_MTSR_P10_4_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT
QSPI1_MTSR: QSPI1 output.
Definition: IfxQspi_PinMap.h:153
IfxQspi0_SLSO3_P11_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT
QSPI0_SLSO3: QSPI0 output.
Definition: IfxQspi_PinMap.h:201
IfxQspi1_SLSO8_P10_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT
QSPI1_SLSO8: QSPI1 output.
Definition: IfxQspi_PinMap.h:217
IfxQspi1_SLSO0_P20_8_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT
QSPI1_SLSO0: QSPI1 output.
Definition: IfxQspi_PinMap.h:208
IfxQspi1_SCLK_P10_2_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT
QSPI1_SCLK: QSPI1 output.
Definition: IfxQspi_PinMap.h:176
IfxQspi3_SCLK_P02_7_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT
QSPI3_SCLK: QSPI3 output.
Definition: IfxQspi_PinMap.h:185
IfxQspi3_SLSO0_P02_4_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT
QSPI3_SLSO0: QSPI3 output.
Definition: IfxQspi_PinMap.h:229
IfxQspi2_MTSRP_P13_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT
QSPI2_MTSRP: QSPI2 output (LVDS)
Definition: IfxQspi_PinMap.h:156
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxQspi2_MTSRA_P15_5_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN
QSPI2_MTSRA: QSPI2 input.
Definition: IfxQspi_PinMap.h:143
IfxQspi_Sclk_Out_pinTable
IFX_EXTERN const IfxQspi_Sclk_Out * IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS]
IfxQspi_Sclk_Out table.
Definition: IfxQspi_PinMap.h:280
IfxQspi2_SLSO7_P20_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT
QSPI2_SLSO7: QSPI2 output.
Definition: IfxQspi_PinMap.h:226
IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:251
IfxQspi3_MTSRP_P22_3_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT
QSPI3_MTSRP: QSPI3 output (LVDS)
Definition: IfxQspi_PinMap.h:160
IfxQspi1_SLSO2_P20_13_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT
QSPI1_SLSO2: QSPI1 output.
Definition: IfxQspi_PinMap.h:211
IfxQspi2_SCLKN_P13_0_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT
QSPI2_SCLKN: QSPI2 output (LVDS)
Definition: IfxQspi_PinMap.h:178
sint32
long sint32
Definition: Platform_Types.h:131
IfxQspi2_MTSR_P15_5_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT
QSPI2_MTSR: QSPI2 output.
Definition: IfxQspi_PinMap.h:157
IfxQspi_Hsicin_In
HSICIN pin mapping structure.
Definition: IfxQspi_PinMap.h:71
IfxQspi3_MTSRE_P22_0_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN
QSPI3_MTSRE: QSPI3 input.
Definition: IfxQspi_PinMap.h:148
IfxQspi0_MTSR_P20_12_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT
QSPI0_MTSR: QSPI0 output.
Definition: IfxQspi_PinMap.h:149
IfxQspi_Sclk_In_pinTable
IFX_EXTERN const IfxQspi_Sclk_In * IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS]
IfxQspi_Sclk_In table.
Definition: IfxQspi_PinMap.h:277
IfxQspi3_SLSIC_P33_10_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN
QSPI3_SLSIC: QSPI3 input.
Definition: IfxQspi_PinMap.h:195
IfxQspi3_SCLK_P33_11_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT
QSPI3_SCLK: QSPI3 output.
Definition: IfxQspi_PinMap.h:188
IfxQspi2_SLSO1_P14_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT
QSPI2_SLSO1: QSPI2 output.
Definition: IfxQspi_PinMap.h:220
IfxQspi3_MRSTFP_P21_3_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN
QSPI3_MRSTFP: QSPI3 input (LVDS)
Definition: IfxQspi_PinMap.h:128
IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:253
IfxQspi2_SLSO9_P20_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT
QSPI2_SLSO9: QSPI2 output.
Definition: IfxQspi_PinMap.h:228
IfxQspi1_SCLKA_P10_2_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN
QSPI1_SCLKA: QSPI1 input.
Definition: IfxQspi_PinMap.h:166
IfxQspi2_MRSTCN_P21_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN
QSPI2_MRSTCN: QSPI2 input (LVDS)
Definition: IfxQspi_PinMap.h:120
IfxQspi0_MRST_P20_12_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT
QSPI0_MRST: QSPI0 output.
Definition: IfxQspi_PinMap.h:129
IfxQspi3_SLSO4_P02_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT
QSPI3_SLSO4: QSPI3 output.
Definition: IfxQspi_PinMap.h:238
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxQspi2_SLSO0_P15_2_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT
QSPI2_SLSO0: QSPI2 output.
Definition: IfxQspi_PinMap.h:219
IfxQspi3_SLSO2_P02_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT
QSPI3_SLSO2: QSPI3 output.
Definition: IfxQspi_PinMap.h:235
IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS
Definition: IfxQspi_PinMap.h:257
IfxQspi2_SLSIB_P15_1_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN
QSPI2_SLSIB: QSPI2 input.
Definition: IfxQspi_PinMap.h:193
IfxQspi3_SCLK_P10_8_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT
QSPI3_SCLK: QSPI3 output.
Definition: IfxQspi_PinMap.h:186
IfxQspi3_MTSR_P22_0_OUT
IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT
QSPI3_MTSR: QSPI3 output (LVDS)
Definition: IfxQspi_PinMap.h:163
IfxQspi3_MTSRD_P33_12_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN
QSPI3_MTSRD: QSPI3 input.
Definition: IfxQspi_PinMap.h:147
IfxQspi1_SLSO10_P10_0_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT
QSPI1_SLSO10: QSPI1 output.
Definition: IfxQspi_PinMap.h:209
IfxQspi1_MRST_P10_6_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT
QSPI1_MRST: QSPI1 output.
Definition: IfxQspi_PinMap.h:131
IfxQspi1_MRST_P11_3_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT
QSPI1_MRST: QSPI1 output.
Definition: IfxQspi_PinMap.h:132
IfxQspi2_MRSTE_P15_2_IN
IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN
QSPI2_MRSTE: QSPI2 input.
Definition: IfxQspi_PinMap.h:122
IfxQspi3_SLSO11_P33_10_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT
QSPI3_SLSO11: QSPI3 output.
Definition: IfxQspi_PinMap.h:230
IfxQspi1_MTSRA_P10_3_IN
IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN
QSPI1_MTSRA: QSPI1 input.
Definition: IfxQspi_PinMap.h:140
IfxQspi1_SLSIA_P11_10_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN
QSPI1_SLSIA: QSPI1 input.
Definition: IfxQspi_PinMap.h:191
IfxQspi2_SLSO5_P15_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT
QSPI2_SLSO5: QSPI2 output.
Definition: IfxQspi_PinMap.h:224
IfxQspi2_SLSO3_P14_3_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT
QSPI2_SLSO3: QSPI2 output.
Definition: IfxQspi_PinMap.h:222
IfxQspi2_MRST_P15_7_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT
QSPI2_MRST: QSPI2 output.
Definition: IfxQspi_PinMap.h:134
IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:254
IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS
Definition: IfxQspi_PinMap.h:258
IfxQspi0_SLSIA_P20_13_IN
IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN
QSPI0_SLSIA: QSPI0 input.
Definition: IfxQspi_PinMap.h:189
IfxQspi_Slso_Out::slsoNr
sint32 slsoNr
Slave Select.
Definition: IfxQspi_PinMap.h:106
IfxQspi3_SCLKN_P22_0_OUT
IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT
QSPI3_SCLKN: QSPI3 output.
Definition: IfxQspi_PinMap.h:183
IfxQspi2_MRST_P15_4_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT
QSPI2_MRST: QSPI2 output.
Definition: IfxQspi_PinMap.h:133
IfxQspi_Slsi_In_pinTable
IFX_EXTERN const IfxQspi_Slsi_In * IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS]
IfxQspi_Slsi_In table.
Definition: IfxQspi_PinMap.h:283
IfxQspi3_SCLKA_P02_7_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN
QSPI3_SCLKA: QSPI3 input.
Definition: IfxQspi_PinMap.h:170
IfxQspi3_MRST_P10_7_OUT
IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT
QSPI3_MRST: QSPI3 output.
Definition: IfxQspi_PinMap.h:136
IfxQspi3_SLSO13_P23_1_OUT
IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT
QSPI3_SLSO13: QSPI3 output.
Definition: IfxQspi_PinMap.h:232
IfxQspi2_SCLKA_P15_3_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN
QSPI2_SCLKA: QSPI2 input.
Definition: IfxQspi_PinMap.h:168
IfxPort.h
PORT basic functionality.
IFXQSPI_PINMAP_NUM_SLAVESELECTS
#define IFXQSPI_PINMAP_NUM_SLAVESELECTS
Definition: IfxQspi_PinMap.h:249
IfxQspi3_SCLKE_P22_3_IN
IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN
QSPI3_SCLKE: QSPI3 input.
Definition: IfxQspi_PinMap.h:173


iLLD_TC26B: IfxQspi_SpiMaster.c Source File

  • Qspi
  • SpiMaster
IfxQspi_SpiMaster.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiMaster.c
3 * \brief QSPI SPIMASTER details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxQspi_SpiMaster.h"
30
31 /** \addtogroup IfxLld_Qspi_SpiMaster_Channel
32 * \{ */
33
34 /******************************************************************************/
35 /*-----------------------Private Function Prototypes--------------------------*/
36 /******************************************************************************/
37
38 /** \brief Gets current active channel
39 * \param handle Module handle
40 * \return current active channel
41 */
42 IFX_STATIC IfxQspi_SpiMaster_Channel *IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle);
43
44 /** \} */
45
46 /** \addtogroup IfxLld_Qspi_SpiMaster_Support
47 * \{ */
48
49 /******************************************************************************/
50 /*-----------------------Private Function Prototypes--------------------------*/
51 /******************************************************************************/
52
53 /** \brief Active the SLSO pin.
54 * \param chHandle Module Channel handle
55 * \return None
56 */
57 IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle);
58
59 /** \brief Deactive the SLSO pin.
60 * \param chHandle Module Channel handle
61 * \return None
62 */
63 IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle);
64
65 /** \brief Locks the transfer and gets the current status of it.
66 * \param handle Module handle
67 * \return SpiIf_Status_ok if sending is done otherwise SpiIf_Status_busy.
68 */
69 IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle);
70
71 /** \brief Reads data from the Rx FIFO
72 * \param chHandle Module Channel handle
73 * \return None
74 */
75 IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle);
76
77 /** \brief Unlocks the transfers
78 * \param handle Module handle
79 * \return None
80 */
81 IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle);
82
83 /** \brief Writes data into the Tx FIFO
84 * \param chHandle Module Channel handle
85 * \return None
86 */
87 IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle);
88
89 /** \brief Writes Long/xxl data into the Tx FIFO
90 * \param chHandle Module Channel handle
91 * \return None
92 */
93 IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle);
94
95 /** \} */
96
97 /******************************************************************************/
98 /*-------------------------Function Implementations---------------------------*/
99 /******************************************************************************/
100
101 IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle)
102 {
103 IfxPort_State action = (chHandle->slsoActiveState == Ifx_ActiveState_low) ? IfxPort_State_low : IfxPort_State_high;
104 IfxPort_setPinState(chHandle->slso.port, chHandle->slso.pinIndex, action);
105 }
106
107
108 IFX_STATIC IfxQspi_SpiMaster_Channel *IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle)
109 {
110 return (IfxQspi_SpiMaster_Channel *)handle->base.activeChannel;
111 }
112
113
114 IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle)
115 {
116 IfxPort_State action = (chHandle->slsoActiveState == Ifx_ActiveState_low) ? IfxPort_State_high : IfxPort_State_low;
117 IfxPort_setPinState(chHandle->slso.port, chHandle->slso.pinIndex, action);
118 }
119
120
121 SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
122 {
123 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
124 SpiIf_Status status = IfxQspi_SpiMaster_lock(handle);
125
126 if (status == SpiIf_Status_ok)
127 {
128 /* initiate transfer when resource is free */
129 handle->base.activeChannel = &chHandle->base;
130 chHandle->base.flags.onTransfer = 1;
131 chHandle->base.tx.data = (void *)src;
132 chHandle->base.tx.remaining = count;
133 chHandle->firstWrite = TRUE;
134 chHandle->base.rx.data = dest;
135 chHandle->base.rx.remaining = count;
136
137 if (chHandle->activateSlso != NULL_PTR)
138 {
139 chHandle->activateSlso(chHandle);
140 }
141
142 if ((chHandle->mode == IfxQspi_SpiMaster_Mode_long) ||
143 (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous))
144 {
145 IfxQspi_SpiMaster_writeLong((IfxQspi_SpiMaster_Channel *)chHandle);
146 }
147 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_xxl)
148 {
149 handle->qspi->XXLCON.B.XDL = count - 1;
150 IfxQspi_SpiMaster_writeLong((IfxQspi_SpiMaster_Channel *)chHandle);
151 }
152 else
153 {
154 /* chHandle->mode == IfxQspi_SpiMaster_Mode_ShortCont*/
155 chHandle->base.txHandler(handle->base.activeChannel);
156 }
157 }
158
159 return status;
160 }
161
162
163 SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
164 {
165 {
166 SpiIf_ChConfig chConfig;
167 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver->driver;
168 Ifx_QSPI *qspiSFR = handle->qspi;
169 Ifx_QSPI_ECON econ;
170 econ.U = qspiSFR->ECON[chHandle->channelId % 8].U;
171
172 chConfig.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, (IfxQspi_ChannelId)(chHandle->channelId % 8));
173 chConfig.driver = chHandle->base.driver;
174 chConfig.errorChecks.baudrate = 0;
175 chConfig.errorChecks.phase = 0;
176 chConfig.errorChecks.receive = 0;
177 chConfig.errorChecks.reserved = 0;
178 chConfig.errorChecks.transmit = 0;
179 chConfig.mode.autoCS = (chHandle->activateSlso == NULL_PTR) && (chHandle->deactivateSlso == NULL_PTR);
180 chConfig.mode.clockPolarity = econ.B.CPOL == 0 ? SpiIf_ClockPolarity_idleLow : SpiIf_ClockPolarity_idleHigh;
181 chConfig.mode.csActiveLevel = chHandle->slsoActiveState;
182 chConfig.mode.csInactiveDelay = chHandle->bacon.B.IDLE;
183 chConfig.mode.csLeadDelay = chHandle->bacon.B.LEAD;
184 chConfig.mode.csTrailDelay = chHandle->bacon.B.TRAIL;
185 chConfig.mode.dataHeading = chHandle->bacon.B.MSB == 0 ? SpiIf_DataHeading_lsbFirst : SpiIf_DataHeading_msbFirst;
186 chConfig.mode.dataWidth = chHandle->bacon.B.DL + 1;
187 chConfig.mode.enabled = 0;
188 chConfig.mode.loopback = qspiSFR->GLOBALCON.B.LB;
189 chConfig.mode.parityCheck = econ.B.PAREN;
190 chConfig.mode.parityMode = chHandle->bacon.B.PARTYP == 0 ? Ifx_ParityMode_even : Ifx_ParityMode_odd;
191 chConfig.mode.shiftClock = econ.B.CPH == 1 ? SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge;
192
193 return chConfig;
194 }
195 }
196
197
198 SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
199 {
200 SpiIf_Status status = SpiIf_Status_ok;
201
202 if ((chHandle->base.flags.onTransfer != 0) || (chHandle->base.driver->sending != 0))
203 {
204 status = SpiIf_Status_busy;
205 }
206
207 return status;
208 }
209
210
211 SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
212 {
213 IfxQspi_SpiMaster *handle = chConfig->base.driver->driver;
214 Ifx_QSPI *qspiSFR = handle->qspi;
215
216 chHandle->base.driver = chConfig->base.driver;
217 chHandle->base.flags.onTransfer = FALSE;
218 chHandle->channelBasedCs = chConfig->channelBasedCs;
219 chHandle->mode = chConfig->mode;
220
221 chHandle->dummyTxValue = chConfig->dummyTxValue;
222 chHandle->dummyRxValue = chConfig->dummyRxValue;
223
224 //Loop back configuration.
225 uint32 loopback = chConfig->base.mode.loopback;
226 qspiSFR->GLOBALCON.B.LB = loopback;
227
228 /* chip-select output pin */
229 const IfxQspi_SpiMaster_Output *slso = &(chConfig->sls.output);
230
231 if ((loopback == 1) && (slso->pin == NULL_PTR)) /* if loopback is enabled && no pin is specified */
232 {
233 chHandle->channelId = (IfxQspi_ChannelId)0; /* select 0 as default, if not specified */
234 }
235 else /* not loop back - pin must be configured */
236 {
237 chHandle->channelId = (IfxQspi_ChannelId)chConfig->sls.output.pin->slsoNr;
238 }
239
240 uint8 cs = chHandle->channelId % 8;
241
242 {
243 /* assert warning if desired baud rate is more than max baud rate */
244 IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, handle->maximumBaudrate > chConfig->base.baudrate);
245
246 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, cs, &chConfig->base);
247 chHandle->bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, chHandle->channelId, &chConfig->base.mode, chConfig->base.baudrate);
248
249 { /* QSPI chip-select line */
250 uint32 mask = 1U << chHandle->channelId;
251 uint32 oen = mask << 16;
252 uint32 aol = (((chConfig->base.mode.csActiveLevel == Ifx_ActiveState_low) ? 0 : 1) << chHandle->channelId);
253 __ldmst(&qspiSFR->SSOC.U, (mask | (mask << 16)), (aol | oen));
254 }
255 }
256 chHandle->base.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, (IfxQspi_ChannelId)(chHandle->bacon.B.CS & 0x7U));
257
258 /* Select the chip select activate and de-activate functions */
259 if (slso->pin == NULL_PTR)
260 {
261 chHandle->activateSlso = NULL_PTR;
262 chHandle->deactivateSlso = NULL_PTR;
263 }
264 else
265 {
266 chHandle->slso = slso->pin->pin;
267 chHandle->slsoActiveState = (Ifx_ActiveState)chConfig->base.mode.csActiveLevel;
268
269 if (!chConfig->base.mode.autoCS)
270 {
271 chHandle->activateSlso = &IfxQspi_SpiMaster_activateSlso;
272 chHandle->deactivateSlso = &IfxQspi_SpiMaster_deactivateSlso;
273
274 /** - Override the SLSO manually as general-purpose output */
275 chHandle->deactivateSlso(chHandle);
276 IfxQspi_initSlso(slso->pin, chConfig->sls.output.mode, chConfig->sls.output.driver, IfxPort_OutputIdx_general);
277 }
278 else
279 {
280 chHandle->activateSlso = NULL_PTR;
281 chHandle->deactivateSlso = NULL_PTR;
282 IfxQspi_initSlso(slso->pin, chConfig->sls.output.mode, chConfig->sls.output.driver, slso->pin->select);
283 }
284 }
285
286 chHandle->dataWidth = chConfig->base.mode.dataWidth;
287 chHandle->base.txHandler = (TxRxHandler) & IfxQspi_SpiMaster_write;
288 chHandle->base.rxHandler = (TxRxHandler) & IfxQspi_SpiMaster_read;
289
290 if (handle->dma.useDma)
291 {
292 Ifx_DMA *dmaSFR = &MODULE_DMA;
293 IfxDma_setChannelDestinationAddress(dmaSFR, handle->dma.txDmaChannelId, (uint32 *)&qspiSFR->DATAENTRY[cs].U);
294 }
295
296 return SpiIf_Status_ok;
297 }
298
299
300 void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
301 {
302 SpiIf_initChannelConfig(&chConfig->base, &handle->base);
303 chConfig->sls.output.pin = NULL_PTR;
304 chConfig->sls.output.mode = IfxPort_OutputMode_pushPull;
305 chConfig->sls.output.driver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
306 chConfig->sls.input.pin = NULL_PTR;
307 chConfig->sls.input.mode = IfxPort_InputMode_noPullDevice;
308 chConfig->channelBasedCs = IfxQspi_SpiMaster_ChannelBasedCs_disabled;
309 chConfig->mode = IfxQspi_SpiMaster_Mode_shortContinuous;
310 chConfig->dummyTxValue = (uint32)~0;
311 chConfig->dummyRxValue = (uint32)0;
312 }
313
314
315 void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
316 {
317 Ifx_QSPI *qspiSFR = config->qspi;
318
319 Ifx_DMA *dmaSFR = &MODULE_DMA;
320
321 /* handle.base must be at offset 0 to be compatible with the standard interface SscIf */
322 {
323 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
324 IfxScuWdt_clearCpuEndinit(password);
325 IfxQspi_setEnableModuleRequest(qspiSFR);
326 IfxQspi_setSleepMode(qspiSFR, (config->allowSleepMode != FALSE) ? IfxQspi_SleepMode_enable : IfxQspi_SleepMode_disable);
327 IfxScuWdt_setCpuEndinit(password);
328 }
329
330 { /* Configure GLOBAL, Note: at the moment default values for GLOBAL */
331 Ifx_QSPI_GLOBALCON globalcon;
332 globalcon.U = 0;
333 globalcon.B.TQ = IfxQspi_calculateTimeQuantumLength(qspiSFR, config->base.maximumBaudrate);
334 globalcon.B.EXPECT = IfxQspi_ExpectTimeout_2097152; /* 2^(EXPECT+6) : timeout for expect phase in Tqspi */
335 //globalcon.B.LB = 0 ; /* 0 : disable loop-back w*/
336 //globalcon.B.DEL0 = 0; /* 0 : disable delayed mode for SLSO 0 */
337 //globalcon.B.STROBE = 0; /* (STROBE+1) : strobe delay for SLSO 0 in Tq */
338 //globalcon.B.SRF = 0; /* 0 : disable stop-on-RXFIFO full feature */
339 //globalcon.B.STIP = 0; /* 0 : MRST = 0 when QSPI is deselected in slave mode */
340 //globalcon.B.EN = 0; /* 0 : PAUSE requested, 1 : RUN requested */
341 globalcon.B.MS = IfxQspi_Mode_master; /* select master mode */
342 globalcon.B.AREN = (config->pauseOnBaudrateSpikeErrors != FALSE) ? 1U : 0U;
343 globalcon.B.RESETS = 1;
344 qspiSFR->GLOBALCON.U = globalcon.U;
345 }
346
347 /* Read maximum baud rate into the handle */
348 handle->maximumBaudrate = config->base.maximumBaudrate;
349
350 { /* Configure interrupt requests */
351 Ifx_QSPI_GLOBALCON1 globalcon1;
352 globalcon1.U = 0;
353 globalcon1.B.ERRORENS = (config->base.erPriority > 0) ? IFXQSPI_ERRORENABLEMASK : 0;
354 globalcon1.B.TXEN = (config->base.txPriority > 0) || (config->dma.useDma);
355 globalcon1.B.RXEN = (config->base.rxPriority > 0) || (config->dma.useDma);
356 globalcon1.B.TXFIFOINT = config->txFifoThreshold;
357 globalcon1.B.RXFIFOINT = config->rxFifoThreshold;
358 globalcon1.B.TXFM = config->txFifoMode;
359 globalcon1.B.RXFM = config->rxFifoMode;
360
361 qspiSFR->GLOBALCON1.U = globalcon1.U;
362 }
363
364 /* Configure I/O pins for master mode */
365 const IfxQspi_SpiMaster_Pins *pins = config->pins;
366
367 if (pins != NULL_PTR)
368 {
369 const IfxQspi_Sclk_Out *sclkOut = pins->sclk;
370
371 if (sclkOut != NULL_PTR)
372 {
373 IfxQspi_initSclkOutPin(sclkOut, pins->sclkMode, pins->pinDriver);
374 }
375
376 const IfxQspi_Mtsr_Out *mtsrOut = pins->mtsr;
377
378 if (mtsrOut != NULL_PTR)
379 {
380 IfxQspi_initMtsrOutPin(mtsrOut, pins->mtsrMode, pins->pinDriver);
381 }
382
383 const IfxQspi_Mrst_In *mrstIn = pins->mrst;
384
385 if (mrstIn != NULL_PTR)
386 {
387 IfxQspi_initMrstInPinWithPadLevel(mrstIn, pins->mrstMode, pins->pinDriver);
388 }
389 }
390
391 handle->qspi = qspiSFR;
392 handle->base.driver = handle;
393 handle->base.sending = 0U;
394 handle->base.activeChannel = NULL_PTR;
395
396 handle->base.functions.exchange = (SpiIf_Exchange) & IfxQspi_SpiMaster_exchange;
397 handle->base.functions.getStatus = (SpiIf_GetStatus) & IfxQspi_SpiMaster_getStatus;
398
399 if (config->dma.useDma)
400 {
401 handle->base.functions.onTx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrDmaTransmit;
402 handle->base.functions.onRx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrDmaReceive;
403 }
404 else
405 {
406 handle->base.functions.onTx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrTransmit;
407 handle->base.functions.onRx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrReceive;
408 }
409
410 handle->base.functions.onError = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrError;
411
412 if (config->dma.useDma)
413 {
414 handle->dma.useDma = TRUE;
415 IfxDma_Dma dma;
416 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
417
418 IfxDma_Dma_ChannelConfig dmaCfg;
419 IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
420
421 {
422 handle->dma.txDmaChannelId = config->dma.txDmaChannelId;
423 dmaCfg.channelId = handle->dma.txDmaChannelId;
424 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from FFT service request
425 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
426
427 // source address and transfer count will be configured during runtime
428 dmaCfg.sourceAddress = 0;
429 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
430 dmaCfg.sourceCircularBufferEnabled = FALSE;
431 dmaCfg.transferCount = 0;
432 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
433
434 // destination address is fixed; use circular mode to stay at this address for each move
435 dmaCfg.destinationAddress = (uint32)&qspiSFR->DATAENTRY[0].U;
436 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
437 dmaCfg.destinationCircularBufferEnabled = TRUE;
438
439 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
440 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
441 dmaCfg.blockMode = IfxDma_ChannelMove_1;
442
443 // initialize interrupt for tx
444 dmaCfg.channelInterruptTypeOfService = config->base.isrProvider;
445 dmaCfg.channelInterruptPriority = config->base.txPriority;
446
447 IfxDma_Dma_initChannel(&handle->dma.txDmaChannel, &dmaCfg);
448 }
449
450 {
451 handle->dma.rxDmaChannelId = config->dma.rxDmaChannelId;
452 dmaCfg.channelId = handle->dma.rxDmaChannelId;
453 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
454 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
455
456 // source address is fixed; use circular mode to stay at this address for each move
457 dmaCfg.sourceAddress = (uint32)&qspiSFR->RXEXIT.U;
458 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
459 dmaCfg.sourceCircularBufferEnabled = TRUE;
460
461 // destination address and transfer count will be configured during runtime
462 dmaCfg.destinationAddress = 0;
463 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
464 dmaCfg.destinationCircularBufferEnabled = FALSE;
465 dmaCfg.transferCount = 0;
466
467 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
468 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
469 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
470 dmaCfg.blockMode = IfxDma_ChannelMove_1;
471
472 // initialize interrupt for rx
473 dmaCfg.channelInterruptTypeOfService = config->base.isrProvider;
474 dmaCfg.channelInterruptPriority = config->base.rxPriority;
475
476 IfxDma_Dma_initChannel(&handle->dma.rxDmaChannel, &dmaCfg);
477 }
478 }
479 else /* Don't use DMA */
480 {
481 handle->dma.useDma = FALSE;
482 }
483
484 /* Qspi interrupt configuration */
485 {
486 IfxQspi_clearAllEventFlags(qspiSFR);
487
488 if (handle->dma.useDma)
489 {
490 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
491 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.txDmaChannelId);
492 IfxSrc_enable(src);
493
494 src = IfxQspi_getReceiveSrc(qspiSFR);
495 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.rxDmaChannelId);
496 IfxSrc_enable(src);
497 }
498 else
499 {
500 if (config->base.txPriority != 0)
501 {
502 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
503 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
504 IfxSrc_enable(src);
505 }
506
507 if (config->base.rxPriority != 0)
508 {
509 volatile Ifx_SRC_SRCR *src = IfxQspi_getReceiveSrc(qspiSFR);
510 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
511 IfxSrc_enable(src);
512 }
513
514 if (config->base.erPriority != 0)
515 {
516 volatile Ifx_SRC_SRCR *src = IfxQspi_getErrorSrc(qspiSFR);
517 IfxSrc_init(src, config->base.isrProvider, config->base.erPriority);
518 IfxSrc_enable(src);
519 }
520 }
521 }
522
523 IfxQspi_run(qspiSFR);
524 }
525
526
527 void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
528 {
529 SpiIf_initConfig(&config->base);
530 config->qspi = qspi;
531 config->allowSleepMode = FALSE;
532 config->pauseOnBaudrateSpikeErrors = FALSE,
533 config->pauseRunTransition = IfxQspi_PauseRunTransition_pause;
534 config->txFifoThreshold = IfxQspi_TxFifoInt_1;
535 config->rxFifoThreshold = IfxQspi_RxFifoInt_0;
536 config->txFifoMode = IfxQspi_FifoMode_combinedMove;
537 config->rxFifoMode = IfxQspi_FifoMode_combinedMove;
538 config->pins = NULL_PTR;
539 config->dma.rxDmaChannelId = IfxDma_ChannelId_none;
540 config->dma.txDmaChannelId = IfxDma_ChannelId_none;
541 config->dma.useDma = FALSE;
542 config->base.maximumBaudrate = 50000000;
543 }
544
545
546 void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
547 {
548 Ifx_DMA *dmaSFR = &MODULE_DMA;
549 IfxDma_ChannelId rxDmaChannelId = qspiHandle->dma.rxDmaChannelId;
550 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(qspiHandle);
551
552 if (IfxDma_getAndClearChannelInterrupt(dmaSFR, rxDmaChannelId))
553 {
554 if (chHandle->deactivateSlso != NULL_PTR)
555 {
556 chHandle->deactivateSlso(chHandle);
557 }
558
559 chHandle->base.flags.onTransfer = 0;
560 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
561 }
562
563 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, rxDmaChannelId);
564 }
565
566
567 void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
568 {
569 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(qspiHandle);
570 Ifx_DMA *dmaSFR = &MODULE_DMA;
571 IfxDma_ChannelId txDmaChannelId = qspiHandle->dma.txDmaChannelId;
572 Ifx_QSPI *qspiSFR = qspiHandle->qspi;
573 SpiIf_Job *job = &chHandle->base.tx;
574
575 if (IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, txDmaChannelId))
576 {
577 // DMA_TC.031 workaround ..
578 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
579 }
580 else if ((chHandle->mode == IfxQspi_SpiMaster_Mode_long) ||
581 (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous))
582 {
583 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
584 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
585 }
586 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_xxl)
587 {
588 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
589 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
590 }
591 else if (IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId) && (job->remaining > 1))
592 {
593 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
594 IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
595
596 if (job->data == NULL_PTR)
597 {
598 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
599 IfxQspi_writeTransmitFifo(qspiSFR, chHandle->dummyTxValue);
600 }
601 else
602 {
603 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
604
605 if (chHandle->dataWidth <= 8)
606 {
607 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[job->remaining - 1]);
608 }
609 else if (chHandle->dataWidth <= 16)
610 {
611 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[job->remaining - 1]);
612 }
613 else
614 {
615 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[job->remaining - 1]);
616 }
617 }
618 }
619 }
620
621
622 void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
623 {
624 Ifx_QSPI *qspiSFR = handle->qspi;
625 uint16 errorFlags = IfxQspi_getErrorFlags(qspiSFR);
626 IfxQspi_clearAllEventFlags(qspiSFR);
627 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
628 Ifx_DMA *dmaSFR = &MODULE_DMA;
629
630 /* store all the flags in the variable */
631
632 if ((errorFlags & IfxQspi_Error_parity))
633 {
634 chHandle->errorFlags.parityError = 1;
635 }
636
637 if ((errorFlags & IfxQspi_Error_configuration))
638 {
639 chHandle->errorFlags.configurationError = 1;
640 }
641
642 if ((errorFlags & IfxQspi_Error_baudrate))
643 {
644 chHandle->errorFlags.baudrateError = 1;
645 }
646
647 if ((errorFlags & IfxQspi_Error_expectTimeout))
648 {
649 chHandle->errorFlags.expectTimeoutError = 1;
650 }
651
652 if ((errorFlags & IfxQspi_Error_txfifoOverflow))
653 {
654 chHandle->errorFlags.txFifoOverflowError = 1;
655 }
656
657 if ((errorFlags & IfxQspi_Error_txfifoUnderflow))
658 {
659 chHandle->errorFlags.txFifoUnderflowError = 1;
660 }
661
662 if ((errorFlags & IfxQspi_Error_rxfifoOverflow))
663 {
664 chHandle->errorFlags.rxFifoOverflowError = 1;
665 }
666
667 if ((errorFlags & IfxQspi_Error_rxfifoUnderflow))
668 {
669 chHandle->errorFlags.rxFifoUnderflowError = 1;
670 }
671
672 if (errorFlags)
673 {
674 if (chHandle->deactivateSlso != NULL_PTR)
675 {
676 chHandle->deactivateSlso(chHandle);
677 }
678
679 chHandle->base.flags.onTransfer = 0;
680 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
681 }
682
683 if (handle->dma.useDma)
684 {
685 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.rxDmaChannelId);
686 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.txDmaChannelId);
687 }
688 }
689
690
691 IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
692 {
693 Ifx_QSPI *qspiSFR = handle->qspi;
694 IfxQspi_PhaseTransitionEvent ptEvent = IfxQspi_PhaseTransitionEvent_endOfWait; /* default to 0 */
695
696 if (qspiSFR->STATUS.B.PT1F)
697 {
698 qspiSFR->FLAGSCLEAR.B.PT1C = 1;
699 ptEvent = (IfxQspi_PhaseTransitionEvent)(qspiSFR->GLOBALCON1.B.PT1);
700 }
701 else if (qspiSFR->STATUS.B.PT2F)
702 {
703 qspiSFR->FLAGSCLEAR.B.PT2C = 1;
704 ptEvent = (IfxQspi_PhaseTransitionEvent)(qspiSFR->GLOBALCON1.B.PT2);
705 }
706
707 return ptEvent;
708 }
709
710
711 void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
712 {
713 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
714 chHandle->base.rxHandler(&chHandle->base);
715 handle->base.rxCount++;
716 }
717
718
719 void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
720 {
721 IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
722 chHandle->base.txHandler(&chHandle->base);
723 handle->base.txCount++;
724 }
725
726
727 IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
728 {
729 Ifx_QSPI *qspiSFR = handle->qspi;
730 IfxQspi_PhaseTransitionEvent ptEvent = IfxQspi_PhaseTransitionEvent_endOfWait; /* default to 0 */
731
732 if (qspiSFR->STATUS.B.USRF)
733 {
734 qspiSFR->FLAGSCLEAR.B.USRC = 1;
735 ptEvent = (IfxQspi_PhaseTransitionEvent)qspiSFR->GLOBALCON1.B.PT1; //
736 }
737
738 return ptEvent;
739 }
740
741
742 IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle)
743 {
744 sint32 sending = __swap((void *)&handle->base.sending, 1UL);
745 return (sending == 0) ? SpiIf_Status_ok : SpiIf_Status_busy;
746 }
747
748
749 void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
750 {
751 boolean isFirst = 0;
752 uint8 *src = (uint8 *)data;
753 uint32 i, baconDL;
754
755 baconDL = 16;
756
757 if (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous)
758 {
759 chHandle->bacon.B.BYTE = 1;
760 chHandle->bacon.B.LAST = 0;
761 }
762 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_long)
763 {
764 chHandle->bacon.B.BYTE = 1;
765 chHandle->bacon.B.LAST = 1;
766 }
767 else
768 {
769 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFX_ASSERT_FEATURE_NOT_IMPLEMENTED);
770 }
771
772 while (dataLength > 0)
773 {
774 if (dataLength <= 16)
775 {
776 baconDL = dataLength;
777 chHandle->bacon.B.LAST = 1;
778 }
779
780 dataLength -= (Ifx_SizeT)baconDL;
781
782 /* FILL BACON */
783 if (isFirst == 0)
784 {
785 isFirst = 1;
786 }
787 else
788 {
789 chHandle->bacon.B.DL = baconDL - 1;
790 *longFifoBuffer = chHandle->bacon.U;
791 longFifoBuffer++;
792 }
793
794 for (i = 0; i < baconDL / 4; i++)
795 {
796 *longFifoBuffer = *((uint32 *)src);
797 longFifoBuffer++;
798 src += 4;
799 }
800
801 /* Copy Last bytes */
802 switch (baconDL % 4)
803 {
804 case 1:
805 *longFifoBuffer = *src;
806 break;
807 case 2:
808 *longFifoBuffer = *src | (*(src + 1) << 8);
809 break;
810 case 3:
811 *longFifoBuffer = *src | (*(src + 1) << 8) | (*(src + 2) << 16);
812 break;
813 }
814 }
815 }
816
817
818 IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle)
819 {
820 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
821 Ifx_QSPI *qspiSFR = handle->qspi;
822 SpiIf_Job *job = &chHandle->base.rx;
823
824 Ifx_SizeT count = (Ifx_SizeT)IfxQspi_getReceiveFifoLevel(qspiSFR);
825 count = __min(job->remaining, count);
826
827 if (job->data == NULL_PTR)
828 {
829 // no data should be buffered: do dummy reads
830 int i;
831
832 for (i = 0; i < count; ++i)
833 {
834 IfxQspi_readReceiveFifo(qspiSFR);
835 }
836 }
837 else
838 {
839 if (chHandle->dataWidth <= 8)
840 {
841 IfxQspi_read8(qspiSFR, job->data, count);
842 job->data = &(((uint8 *)job->data)[count]);
843 }
844 else if (chHandle->dataWidth <= 16)
845 {
846 IfxQspi_read16(qspiSFR, job->data, count);
847 job->data = &(((uint16 *)job->data)[count]);
848 }
849 else
850 {
851 IfxQspi_read32(qspiSFR, job->data, count);
852 job->data = &(((uint32 *)job->data)[count]);
853 }
854 }
855
856 job->remaining = job->remaining - count;
857
858 if (job->remaining == 0)
859 {
860 if (chHandle->deactivateSlso != NULL_PTR)
861 {
862 chHandle->deactivateSlso(chHandle);
863 }
864
865 chHandle->base.flags.onTransfer = 0;
866 IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
867 }
868 }
869
870
871 SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
872 {
873 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver->driver;
874 Ifx_QSPI *qspiSFR = handle->qspi;
875 SpiIf_ChConfig chConfig;
876 chConfig = IfxQspi_SpiMaster_getChannelConfig(chHandle);
877 chConfig.baudrate = baudrate;
878 IfxQspi_ChannelId cs = (IfxQspi_ChannelId)(chHandle->channelId % 8);
879 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, (uint8)cs, &chConfig);
880 chHandle->bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, chHandle->channelId, &chConfig.mode, chConfig.baudrate);
881 chHandle->base.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, cs);
882 return SpiIf_Status_ok;
883 }
884
885
886 IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle)
887 {
888 handle->base.sending = 0UL;
889 }
890
891
892 IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle)
893 {
894 SpiIf_Job *job = &chHandle->base.tx;
895 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
896
897 if (handle->dma.useDma)
898 {
899 Ifx_DMA *dmaSFR = &MODULE_DMA;
900
901 Ifx_QSPI *qspiSFR = handle->qspi;
902 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
903
904 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
905 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
906
907 boolean interruptState = IfxCpu_disableInterrupts();
908
909 if (job->remaining > 1)
910 {
911 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, job->remaining - 1);
912
913 if (chHandle->dataWidth <= 8)
914 {
915 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_8bit);
916 }
917 else if (chHandle->dataWidth <= 16)
918 {
919 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_16bit);
920 }
921 else
922 {
923 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
924 }
925
926 if (job->data == NULL_PTR)
927 {
928 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyTxValue)));
929 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
930 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
931 /* need to enable circular buffering to avoid increment higher than 4 bytes */
932 /* we must do this direct why we don't have function for this */
933 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = TRUE;
934 }
935 else
936 {
937 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
938 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
939 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
940 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
941 /* we must do this direct why we don't have function for this */
942 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = FALSE;
943 }
944
945 IfxDma_setChannelDestinationAddress(dmaSFR, txDmaChannelId, (void *)&qspiSFR->DATAENTRY[0].U);
946 IfxDma_setChannelDestinationIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
947 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
948
949 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
950 }
951
952 /* Receive config */
953 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, job->remaining);
954
955 if (chHandle->dataWidth <= 8)
956 {
957 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_8bit);
958 }
959 else if (chHandle->dataWidth <= 16)
960 {
961 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_16bit);
962 }
963 else
964 {
965 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
966 }
967
968 if (chHandle->base.rx.data == NULL_PTR)
969 {
970 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyRxValue)));
971 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
972 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
973 /* need to enable circular buffering to avoid increment higher than 4 bytes */
974 /* we must do this direct why we don't have function for this */
975 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = TRUE;
976 }
977 else
978 {
979 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), chHandle->base.rx.data));
980 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
981 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
982 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
983 /* we must do this direct why we don't have function for this */
984 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = FALSE;
985 }
986
987 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
988 IfxQspi_clearAllEventFlags(qspiSFR);
989 src = IfxQspi_getTransmitSrc(qspiSFR);
990 IfxSrc_clearRequest(src);
991 src = IfxQspi_getReceiveSrc(qspiSFR);
992 IfxSrc_clearRequest(src);
993 src = IfxQspi_getErrorSrc(qspiSFR);
994 IfxSrc_clearRequest(src);
995 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
996 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
997
998 if (job->remaining > 1)
999 {
1000 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1001 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
1002
1003 if (chHandle->channelBasedCs == IfxQspi_SpiMaster_ChannelBasedCs_disabled)
1004 {
1005 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, chHandle->bacon.U);
1006 }
1007 else
1008 {
1009 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1010 }
1011 }
1012 else
1013 {
1014 if (job->data == NULL_PTR)
1015 {
1016 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1017 IfxQspi_writeTransmitFifo(qspiSFR, chHandle->dummyTxValue);
1018 }
1019 else
1020 {
1021 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1022
1023 if (chHandle->dataWidth <= 8)
1024 {
1025 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[job->remaining - 1]);
1026 }
1027 else if (chHandle->dataWidth <= 16)
1028 {
1029 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[job->remaining - 1]);
1030 }
1031 else
1032 {
1033 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[job->remaining - 1]);
1034 }
1035 }
1036 }
1037
1038 IfxCpu_restoreInterrupts(interruptState);
1039 }
1040
1041 else
1042 {
1043 if (job->remaining > 0)
1044 {
1045 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
1046 Ifx_QSPI *qspiSFR = handle->qspi;
1047 IfxQspi_ChannelId cs = (IfxQspi_ChannelId)(chHandle->bacon.B.CS);
1048
1049 Ifx_SizeT count = (Ifx_SizeT)(IFXQSPI_HWFIFO_DEPTH - IfxQspi_getTransmitFifoLevel(qspiSFR));
1050
1051 if (chHandle->firstWrite == TRUE)
1052 {
1053 // -1, since BACON allocates one FIFO entry
1054 count--;
1055 }
1056
1057 if (job->remaining == count)
1058 {
1059 // Need to write BACON next time
1060 count--;
1061 }
1062
1063 count = __min(job->remaining, count);
1064
1065 if (count > 0)
1066 {
1067 job->remaining = job->remaining - count;
1068
1069 // we have to push another BACON into FIFO before the last data word
1070 boolean lastWrite = (job->remaining == 0) ? TRUE : FALSE;
1071 boolean interruptState;
1072
1073 /*Disable interrupts only if conditions a, b and c are satisfied.
1074 * a.)first write is true(i.e call from exchange only and not from transmit ISR) and
1075 * b.)on multi-byte write(no need to disable for single byte write) and
1076 * c.)this is not last write(Condition needed for 2 byte write from exchange in firstwrite)
1077 *
1078 * 1.Call from ISR no need to disable.
1079 * 2.Call from exchange and write_count(here write_count=count) is 1 or 2, no need to disable,
1080 * because when ISR call happens job->remaining=0.
1081 * 3.Call from exchange and write_count=3,(count=2, job->remaining=1), disable interrupt.
1082 * 4.Multi-byte write call from exchange disable interrupt.*/
1083 if ((chHandle->firstWrite == TRUE) && (count > 1) && (job->remaining != 0))
1084 {
1085 interruptState = IfxCpu_disableInterrupts();
1086 }
1087 else
1088 {
1089 interruptState = IfxCpu_areInterruptsEnabled();
1090 }
1091
1092 // push BACON into FIFO before first data word
1093 if (chHandle->firstWrite == TRUE)
1094 {
1095 chHandle->firstWrite = FALSE;
1096
1097 if (chHandle->channelBasedCs == IfxQspi_SpiMaster_ChannelBasedCs_disabled)
1098 {
1099 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, chHandle->bacon.U);
1100 }
1101 else
1102 {
1103 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1104 }
1105 }
1106
1107 if (job->data == NULL_PTR)
1108 {
1109 // no data should be sent (only received): send all-1
1110 int i;
1111 uint32 writeVal = chHandle->dummyTxValue;
1112
1113 if (lastWrite)
1114 {
1115 for (i = 0; i < count - 1; ++i)
1116 {
1117 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1118 }
1119
1120 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1121 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1122 }
1123 else
1124 {
1125 for (i = 0; i < count; ++i)
1126 {
1127 IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
1128 }
1129 }
1130 }
1131 else
1132 {
1133 if (chHandle->dataWidth <= 8)
1134 {
1135 if (lastWrite)
1136 {
1137 if (count > 1)
1138 {
1139 IfxQspi_write8(qspiSFR, cs, job->data, count - 1);
1140 }
1141
1142 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1143 IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[count - 1]);
1144 }
1145 else
1146 {
1147 IfxQspi_write8(qspiSFR, cs, job->data, count);
1148 }
1149
1150 job->data = &(((uint8 *)job->data)[count]);
1151 }
1152 else if (chHandle->dataWidth <= 16)
1153 {
1154 if (lastWrite)
1155 {
1156 if (count > 1)
1157 {
1158 IfxQspi_write16(qspiSFR, cs, job->data, count - 1);
1159 }
1160
1161 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1162 IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[count - 1]);
1163 }
1164 else
1165 {
1166 IfxQspi_write16(qspiSFR, cs, job->data, count);
1167 job->data = &(((uint16 *)job->data)[count]);
1168 }
1169 }
1170 else
1171 {
1172 if (lastWrite)
1173 {
1174 if (count > 1)
1175 {
1176 IfxQspi_write32(qspiSFR, cs, job->data, count - 1);
1177 }
1178
1179 IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
1180 IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[count - 1]);
1181 }
1182 else
1183 {
1184 IfxQspi_write32(qspiSFR, cs, job->data, count);
1185 job->data = &(((uint32 *)job->data)[count]);
1186 }
1187 }
1188 }
1189
1190 IfxCpu_restoreInterrupts(interruptState);
1191 }
1192 }
1193 }
1194 }
1195
1196
1197 IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle)
1198 {
1199 SpiIf_Job *job = &chHandle->base.tx;
1200 IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
1201 uint8 fifosize = IFXQSPI_FIFO32BITSIZE(job->remaining);
1202
1203 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1204 {
1205 fifosize = fifosize + IFXQSPI_BACONSIZE(job->remaining) - 1; // combining this line and above doesn't work
1206 }
1207
1208 if (handle->dma.useDma)
1209 {
1210 Ifx_DMA *dmaSFR = &MODULE_DMA;
1211
1212 Ifx_QSPI *qspiSFR = handle->qspi;
1213 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
1214
1215 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
1216 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
1217
1218 boolean interruptState = IfxCpu_disableInterrupts();
1219
1220 {
1221 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, fifosize);
1222
1223 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
1224
1225 {
1226 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
1227 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
1228 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1229 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
1230 /* we must do this direct why we don't have function for this */
1231 dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = FALSE;
1232
1233 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1234 {
1235 IfxDma_setChannelDestinationAddress(dmaSFR, txDmaChannelId, (uint32 *)&qspiSFR->MIXENTRY.U);
1236 IfxDma_setChannelDestinationIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
1237 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1238 }
1239 }
1240
1241 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1242 }
1243
1244 /* Receive config */
1245 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, IFXQSPI_FIFO32BITSIZE(job->remaining));
1246 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
1247
1248 if (chHandle->base.rx.data == NULL_PTR)
1249 {
1250 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyRxValue)));
1251 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1252 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
1253 /* need to enable circular buffering to avoid increment higher than 4 bytes */
1254 /* we must do this direct why we don't have function for this */
1255 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = TRUE;
1256 }
1257 else
1258 {
1259 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), chHandle->base.rx.data));
1260 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
1261 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
1262 /* maybe circular buffering was enabled by other call, we disable the circular buffering */
1263 /* we must do this direct why we don't have function for this */
1264 dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = FALSE;
1265 }
1266
1267 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1268 IfxQspi_clearAllEventFlags(qspiSFR);
1269 src = IfxQspi_getTransmitSrc(qspiSFR);
1270 IfxSrc_clearRequest(src);
1271 src = IfxQspi_getReceiveSrc(qspiSFR);
1272 IfxSrc_clearRequest(src);
1273 src = IfxQspi_getErrorSrc(qspiSFR);
1274 IfxSrc_clearRequest(src);
1275 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
1276 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
1277
1278 if (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous)
1279 {
1280 (job->remaining >= 16) ? (chHandle->bacon.B.DL = 16 - 1) : (chHandle->bacon.B.DL = job->remaining - 1);
1281 (job->remaining >= 16) ? (chHandle->bacon.B.LAST = 0) : (chHandle->bacon.B.LAST = 1);
1282 chHandle->bacon.B.BYTE = 1;
1283 }
1284 else if (chHandle->mode == IfxQspi_SpiMaster_Mode_long)
1285 {
1286 (job->remaining >= 16) ? (chHandle->bacon.B.DL = 16 - 1) : (chHandle->bacon.B.DL = job->remaining - 1);
1287 chHandle->bacon.B.LAST = 1;
1288 chHandle->bacon.B.BYTE = 1;
1289 }
1290 else
1291 {
1292 chHandle->bacon.B.LAST = 1;
1293 chHandle->bacon.B.BYTE = 1;
1294 chHandle->bacon.B.DL = 0;
1295 }
1296
1297 {
1298 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
1299 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
1300 }
1301
1302 if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
1303 {
1304 qspiSFR->MIXENTRY.U = chHandle->bacon.U;
1305 }
1306 else
1307 {
1308 qspiSFR->BACONENTRY.U = chHandle->bacon.U;
1309 }
1310
1311 IfxCpu_restoreInterrupts(interruptState);
1312 }
1313 else
1314 {
1315 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFX_ASSERT_FEATURE_NOT_IMPLEMENTED);
1316 }
1317 }
IfxQspi_SpiMaster_Channel_s::bacon
Ifx_QSPI_BACON bacon
basic configuration register
Definition: IfxQspi_SpiMaster.h:640
IfxQspi_SpiMaster_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:606
IfxQspi_SpiMaster_ChannelBasedCs_disabled
Slso will be low for complete frame.
Definition: IfxQspi_SpiMaster.h:512
IfxQspi_SpiMaster_Mode_shortContinuous
Short Continous Mode.
Definition: IfxQspi_SpiMaster.h:520
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:110
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:98
IfxQspi_SpiMaster
Module handle data structure.
Definition: IfxQspi_SpiMaster.h:615
IfxQspi_SpiMaster_Output::mode
IfxPort_OutputMode mode
The SLSO pin output mode.
Definition: IfxQspi_SpiMaster.h:546
IfxQspi_PhaseTransitionEvent_endOfWait
BUSY (end of WAIT phase)
Definition: IfxQspi.h:176
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:176
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:476
SpiIf_funcs::getStatus
SpiIf_GetStatus getStatus
Definition: SpiIf.h:127
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:113
IfxQspi_SpiMaster_Pins::mrstMode
IfxPort_InputMode mrstMode
The MRST pin input mode.
Definition: IfxQspi_SpiMaster.h:605
IfxQspi_calcRealBaudrate
float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
Function to calculate baudrate of specified channel.
Definition: IfxQspi.c:35
IfxQspi_SpiMaster_Output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:543
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:483
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:466
SpiIf_funcs::onRx
SpiIf_OnEvent onRx
Definition: SpiIf.h:129
IfxQspi_SpiMaster_Channel_s::slsoActiveState
Ifx_ActiveState slsoActiveState
Specifies the current state of SLSO.
Definition: IfxQspi_SpiMaster.h:645
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:318
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxQspi_SpiMaster_Channel_s::deactivateSlso
IfxQspi_SpiMaster_AutoSlso deactivateSlso
Specifies function for Auto SLSO deactivation.
Definition: IfxQspi_SpiMaster.h:643
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:109
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:294
IfxQspi_SpiMaster_Channel_s::channelId
IfxQspi_ChannelId channelId
QSPI channel Number.
Definition: IfxQspi_SpiMaster.h:644
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:211
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:137
IFXQSPI_HWFIFO_DEPTH
#define IFXQSPI_HWFIFO_DEPTH
Definition: IfxQspi_cfg.h:48
SpiIf_ChConfig_
Definition: SpiIf.h:208
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:185
IfxQspi_SpiMaster_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiMaster.h:663
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:174
SpiIf_Ch_::tx
SpiIf_Job tx
Definition: SpiIf.h:200
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:107
IfxQspi_SpiMaster_Pins::mtsrMode
IfxPort_OutputMode mtsrMode
The MTSR pin output mode.
Definition: IfxQspi_SpiMaster.h:603
IfxQspi_SpiMaster_isrError
void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiMaster.c:622
IfxQspi_SpiMaster_activeChannel
IFX_STATIC IfxQspi_SpiMaster_Channel * IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle)
Gets current active channel.
Definition: IfxQspi_SpiMaster.c:108
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:940
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:173
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1625
IfxQspi_SpiMaster_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiMaster.h:558
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:256
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:177
IfxQspi_SpiMaster_Channel_s::slso
IfxPort_Pin slso
Defines SLSO pin.
Definition: IfxQspi_SpiMaster.h:641
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:159
IfxQspi_SpiMaster_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transmit FIFO mode.
Definition: IfxQspi_SpiMaster.h:668
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:135
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:158
IfxQspi_SpiMaster_writeLong
IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle)
Writes Long/xxl data into the Tx FIFO.
Definition: IfxQspi_SpiMaster.c:1197
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:157
IfxPort_State_high
Ifx_P pin is set to high.
Definition: IfxPort.h:155
IfxQspi_SpiMaster_isrDmaReceive
void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:546
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:467
TxRxHandler
void(* TxRxHandler)(SpiIf_Ch *handle)
Definition: SpiIf.h:192
IfxQspi_SpiMaster_Config::pins
IFX_CONST IfxQspi_SpiMaster_Pins * pins
structure for QSPI Master pins
Definition: IfxQspi_SpiMaster.h:666
IfxQspi_SpiMaster_Mode_xxl
XXL Mode.
Definition: IfxQspi_SpiMaster.h:522
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:137
IfxQspi_SpiMaster_isrPhaseTransition
IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler.
Definition: IfxQspi_SpiMaster.c:691
IfxQspi_SpiMaster_Input::mode
IfxPort_InputMode mode
The SLSI pin input mode.
Definition: IfxQspi_SpiMaster.h:538
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:393
Spi_ErrorChecks::reserved
uint32 reserved
Definition: SpiIf.h:165
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:112
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:95
IfxQspi_SpiMaster_Config::dma
IfxQspi_SpiMaster_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiMaster.h:667
Ifx_ParityMode_even
Definition: Ifx_Types.h:104
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:473
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:181
IfxQspi_SpiMaster_setChannelBaudrate
SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate.
Definition: IfxQspi_SpiMaster.c:871
float32
float float32
Definition: Platform_Types.h:167
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1572
IfxQspi_SpiMaster_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the Receive FIFO mode.
Definition: IfxQspi_SpiMaster.h:669
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:488
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1190
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1320
IfxQspi_SpiMaster_Output::driver
IfxPort_PadDriver driver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:547
IfxQspi_SpiMaster_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiMaster.h:661
IfxQspi_SpiMaster_exchange
SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiMaster.c:121
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:489
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:268
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
SpiIf_ClockPolarity_idleHigh
Definition: SpiIf.h:87
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:480
IfxQspi_SpiMaster_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:583
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:161
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1631
IfxPort_State
IfxPort_State
Ifx_P output modification modes definition.
Definition: IfxPort.h:152
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
SpiIf_Ch_::baudrate
sint32 baudrate
Real baudrate.
Definition: SpiIf.h:199
IFX_ASSERT_FEATURE_NOT_IMPLEMENTED
#define IFX_ASSERT_FEATURE_NOT_IMPLEMENTED
Constant to be used to indicate not implemented feature.
Definition: Ifx_Assert.h:47
IfxQspi_SpiMaster_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiMaster.h:662
IfxQspi_SpiMaster_Config
Module configuration structure.
Definition: IfxQspi_SpiMaster.h:657
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1108
IfxQspi_SpiMaster_isrTransmit
void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:719
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1159
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:77
IfxDma_Dma_ChannelConfig::channelInterruptPriority
Ifx_Priority channelInterruptPriority
Priority of the channel interrupt trigger.
Definition: IfxDma_Dma.h:497
FALSE
#define FALSE
Definition: Platform_Types.h:90
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:184
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1358
IfxQspi_SpiMaster_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:581
IFX_VERBOSE_LEVEL_WARNING
#define IFX_VERBOSE_LEVEL_WARNING
Assertion level warning.
Definition: Ifx_Assert.h:42
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1141
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:48
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1096
IfxQspi_SpiMaster_initChannelConfig
void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:300
IfxQspi_SpiMaster_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiMaster.h:561
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:73
IfxQspi_SpiMaster_Input::pin
IFX_CONST IfxQspi_Slsi_In * pin
Pointer to SLSI in pin.
Definition: IfxQspi_SpiMaster.h:537
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxQspi_SpiMaster.h
QSPI SPIMASTER details.
IfxPort_OutputIdx_general
Definition: IfxPort.h:102
IfxQspi_SpiMaster_Channel_s::firstWrite
boolean firstWrite
Specifies whether the data id first write or not.
Definition: IfxQspi_SpiMaster.h:647
IfxQspi_SpiMaster_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:664
SpiIf_Status_ok
Definition: SpiIf.h:51
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:174
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:75
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:156
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:153
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:87
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1004
IfxQspi_Slso_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxQspi_PinMap.h:108
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:199
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:142
SpiIf_funcs::onTx
SpiIf_OnEvent onTx
Definition: SpiIf.h:128
IfxQspi_SpiMaster_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_Out * mtsr
Pointer to MTSR out pin.
Definition: IfxQspi_SpiMaster.h:602
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:159
IfxQspi_Slso_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxQspi_PinMap.h:107
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:472
SpiIf_funcs::exchange
SpiIf_Exchange exchange
Definition: SpiIf.h:126
__swap
#define __swap
Definition: IfxCpu_IntrinsicsDcc.h:2068
IfxQspi_SpiMaster_Pins::sclkMode
IfxPort_OutputMode sclkMode
The SCLK pin output mode.
Definition: IfxQspi_SpiMaster.h:601
IfxQspi_SpiMaster::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiMaster.h:618
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
SpiIf_::functions
SpiIf_funcs functions
Definition: SpiIf.h:140
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:973
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:118
IfxQspi_SpiMaster::maximumBaudrate
float32 maximumBaudrate
Maximum Baud Rate for the SPI Module.
Definition: IfxQspi_SpiMaster.h:620
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:175
IfxQspi_SpiMaster_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:582
IfxPort_InputMode_noPullDevice
Definition: IfxPort.h:66
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:40
IfxQspi_initMtsrOutPin
IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
Initializes a MTSR output.
Definition: IfxQspi.h:1038
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:73
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:406
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:111
IfxPort_setPinState
IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
Set / Resets / Toggle the port output.
Definition: IfxPort.h:572
IfxQspi_initSclkOutPin
IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
Initializes a SCLK output.
Definition: IfxQspi.h:1052
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxQspi_SpiMaster_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiMaster.h:579
SpiIf_::txCount
uint32 txCount
Definition: SpiIf.h:138
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:203
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:979
IfxQspi_SpiMaster_Output::pin
IFX_CONST IfxQspi_Slso_Out * pin
Pointer to SLSO out pin.
Definition: IfxQspi_SpiMaster.h:545
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:88
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:104
SpiIf_Status_busy
Definition: SpiIf.h:52
IfxQspi_SpiMaster_Channel_s::dummyTxValue
uint32 dummyTxValue
Dummy TX value, which will be sent for "recieve only" mode.
Definition: IfxQspi_SpiMaster.h:651
SpiIf_Flags::onTransfer
uint32 onTransfer
Channel status: On transfer.
Definition: SpiIf.h:100
IfxQspi_SpiMaster_Channel_s::errorFlags
IfxQspi_SpiMaster_ErrorFlags errorFlags
Spi Master Error Flags.
Definition: IfxQspi_SpiMaster.h:650
IfxQspi_SpiMaster_Dma::useDma
boolean useDma
use Dma for Data transfer/s
Definition: IfxQspi_SpiMaster.h:562
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:443
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:39
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:171
SpiIf_Ch_::flags
SpiIf_Flags flags
Definition: SpiIf.h:197
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:211
IfxQspi_SpiMaster_Mode_long
Long Mode.
Definition: IfxQspi_SpiMaster.h:519
IfxDma_disableChannelTransaction
IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Disable a DMA channel hardware transaction request.
Definition: IfxDma.h:1276
IfxQspi_SpiMaster_read
IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle)
Reads data from the Rx FIFO.
Definition: IfxQspi_SpiMaster.c:818
SpiIf_Exchange
SpiIf_Status(* SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:118
IFXQSPI_ERRORENABLEMASK
#define IFXQSPI_ERRORENABLEMASK
Errors enable mask for ERRORENS.
Definition: IfxQspi.h:65
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:170
IfxQspi_SpiMaster_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiMaster.h:659
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:182
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:164
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1373
IfxQspi_SpiMaster_Channel_s::channelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs
define the slso behaviour
Definition: IfxQspi_SpiMaster.h:648
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:27
IfxQspi_SpiMaster_Channel_s::dataWidth
uint8 dataWidth
Number of bits which will be written into the FIFO.
Definition: IfxQspi_SpiMaster.h:646
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:946
IfxQspi_SpiMaster::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiMaster.h:617
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:148
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:86
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1648
SpiIf_Ch_::rx
SpiIf_Job rx
Definition: SpiIf.h:201
__ldmst
#define __ldmst
Definition: IfxCpu_IntrinsicsDcc.h:2048
SpiIf_::rxCount
uint32 rxCount
Definition: SpiIf.h:139
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:306
IfxPort_State_low
Ifx_P pin is set to low.
Definition: IfxPort.h:156
SpiIf_GetStatus
SpiIf_Status(* SpiIf_GetStatus)(SpiIf_Ch *handle)
Definition: SpiIf.h:119
IfxQspi_SpiMaster_Channel_s::mode
IfxQspi_SpiMaster_Mode mode
Qspi Operating Mode.
Definition: IfxQspi_SpiMaster.h:649
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:72
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:475
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:107
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:110
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:136
IfxQspi_SpiMaster_Mode_longContinuous
Long Continous Mode.
Definition: IfxQspi_SpiMaster.h:521
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:230
IfxQspi_SpiMaster_Pins::mrst
IFX_CONST IfxQspi_Mrst_In * mrst
Pointer to MRST in pin.
Definition: IfxQspi_SpiMaster.h:604
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:214
IfxQspi_SpiMaster_packLongModeBuffer
void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer
Definition: IfxQspi_SpiMaster.c:749
uint16
unsigned short uint16
Definition: Platform_Types.h:109
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:463
IfxQspi_SpiMaster_isrUserDefined
IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
User defined interrupt handler.
Definition: IfxQspi_SpiMaster.c:727
IfxQspi_SpiMaster_InputOutput::input
IfxQspi_SpiMaster_Input input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:592
SpiIf_Ch_::txHandler
TxRxHandler txHandler
Definition: SpiIf.h:204
IfxQspi_SpiMaster_isrDmaTransmit
void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:567
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:79
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1245
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:124
IfxQspi_SpiMaster_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiMaster.h:559
IfxQspi_SpiMaster_isrReceive
void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiMaster.c:711
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:149
SpiIf_Job
Definition: SpiIf.h:104
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:172
IfxQspi_SpiMaster_Channel_s::activateSlso
IfxQspi_SpiMaster_AutoSlso activateSlso
Specifies function for Auto SLSO activation.
Definition: IfxQspi_SpiMaster.h:642
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:196
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:146
IfxQspi_SpiMaster_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:665
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:162
IfxQspi_SpiMaster_unlock
IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle)
Unlocks the transfers.
Definition: IfxQspi_SpiMaster.c:886
IFXQSPI_FIFO32BITSIZE
#define IFXQSPI_FIFO32BITSIZE(Datasize)
Definition: IfxQspi.h:59
IfxQspi_SpiMaster_ChannelConfig::base
SpiIf_ChConfig base
SPI interface channel configuration structure.
Definition: IfxQspi_SpiMaster.h:627
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1566
sint32
long sint32
Definition: Platform_Types.h:131
IfxQspi_initMrstInPinWithPadLevel
IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1252
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:884
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxQspi_SpiMaster_write
IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle)
Writes data into the Tx FIFO.
Definition: IfxQspi_SpiMaster.c:892
IfxQspi_SpiMaster_initModule
void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module.
Definition: IfxQspi_SpiMaster.c:315
IfxQspi_SpiMaster_initModuleConfig
void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:527
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1223
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1595
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:144
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:87
IfxQspi_writeBasicConfigurationEndStream
IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 1.
Definition: IfxQspi.h:1200
IfxQspi_SpiMaster_Channel_s::dummyRxValue
uint32 dummyRxValue
Dummy Rx value, for "transmit only" modes.
Definition: IfxQspi_SpiMaster.h:652
SpiIf_Ch_::rxHandler
TxRxHandler rxHandler
Definition: SpiIf.h:205
IfxCpu_areInterruptsEnabled
IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API This API p...
Definition: IfxCpu.h:631
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:468
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:114
IfxQspi_SpiMaster_Pins::sclk
IFX_CONST IfxQspi_Sclk_Out * sclk
Pointer to SLCK out pin.
Definition: IfxQspi_SpiMaster.h:600
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:186
IfxQspi_SpiMaster_deactivateSlso
IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle)
Deactive the SLSO pin.
Definition: IfxQspi_SpiMaster.c:114
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:212
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:753
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
Definition: SpiIf.h:80
IfxQspi_SpiMaster_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiMaster.h:580
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:474
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:486
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:108
IfxQspi_SpiMaster_ChannelConfig::sls
IfxQspi_SpiMaster_InputOutput sls
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:628
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxQspi_initSlso
IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
Initializes a SLSO output.
Definition: IfxQspi.h:1067
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:419
IfxQspi_SpiMaster_Channel_s::base
SpiIf_Ch base
SPI interface channel handle structure.
Definition: IfxQspi_SpiMaster.h:639
IfxQspi_SpiMaster_activateSlso
IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle)
Active the SLSO pin.
Definition: IfxQspi_SpiMaster.c:101
IfxQspi_SpiMaster_getStatus
SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status.
Definition: IfxQspi_SpiMaster.c:198
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:49
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:493
IfxQspi_SpiMaster_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:584
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:998
IfxQspi_SpiMaster_initChannel
SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel.
Definition: IfxQspi_SpiMaster.c:211
Ifx_ParityMode_odd
Definition: Ifx_Types.h:105
IfxQspi_SpiMaster_Pins
Master pin IO configuration structure.
Definition: IfxQspi_SpiMaster.h:598
SpiIf_funcs::onError
SpiIf_OnEvent onError
Definition: SpiIf.h:130
TRUE
#define TRUE
Definition: Platform_Types.h:87
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:179
IfxQspi_SpiMaster_getChannelConfig
SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration.
Definition: IfxQspi_SpiMaster.c:163
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:147
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:210
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure.
Definition: IfxQspi_SpiMaster.h:625
IfxQspi_Slso_Out::slsoNr
sint32 slsoNr
Slave Select.
Definition: IfxQspi_PinMap.h:106
IfxQspi_SpiMaster_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiMaster.h:585
IfxQspi_SpiMaster_lock
IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle)
Locks the transfer and gets the current status of it.
Definition: IfxQspi_SpiMaster.c:742
IfxQspi_SpiMaster_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiMaster.h:578
IfxQspi_SpiMaster_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiMaster.h:560
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxDma_Dma_ChannelConfig::channelInterruptTypeOfService
IfxSrc_Tos channelInterruptTypeOfService
Interrupt service provider.
Definition: IfxDma_Dma.h:498
IFXQSPI_BACONSIZE
#define IFXQSPI_BACONSIZE(Datasize)
Get Fifo size required for Long / Long continous mode interms 32-bit LONG MODE FIFO size (data size i...
Definition: IfxQspi.h:57
IfxQspi_SpiMaster::dma
IfxQspi_SpiMaster_Dma dma
dma handle
Definition: IfxQspi_SpiMaster.h:619
SpiIf_ChConfig_::errorChecks
Spi_ErrorChecks errorChecks
Definition: SpiIf.h:213
IfxQspi_SpiMaster_InputOutput::output
IfxQspi_SpiMaster_Output output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:593
SpiIf_Job::data
void * data
Definition: SpiIf.h:106
SpiIf_OnEvent
void(* SpiIf_OnEvent)(SpiIf *handle)
Definition: SpiIf.h:120
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:86
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:163
IfxQspi_SpiMaster_Channel_s
Module Channel handle structure.
Definition: IfxQspi_SpiMaster.h:637


iLLD_TC26B: IfxQspi_SpiMaster.h Source File

  • Qspi
  • SpiMaster
IfxQspi_SpiMaster.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiMaster.h
3 * \brief QSPI SPIMASTER details
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Qspi_SpiMaster_Usage How to use the SPI Master Interface driver?
25 * \ingroup IfxLld_Qspi
26 *
27 * The SPI Master interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
28 *
29 * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
30 * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
31 *
32 * In the following sections it will be described, how to integrate the driver into the application framework.
33 *
34 * \section IfxLld_Qspi_SpiMaster_Preparation Preparation
35 * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
36 *
37 * Include following header file into your C code:
38 * \code
39 * #include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>
40 * \endcode
41 *
42 * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
43 *
44 * Declare QSPI module and channel handles:
45 *
46 * \code
47 * IfxQspi_SpiMaster spi;
48 * IfxQspi_SpiMaster_Channel spiChannel;
49 * \endcode
50 *
51 * In addition, declare global transmit and receive buffers for the data transfers:
52 * \code
53 * #define SPI_BUFFER_SIZE 8
54 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
55 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
56 * \endcode
57 *
58 * \subsection IfxLld_Qspi_SpiMaster_Interrupt Interrupt Handler Installation (without dma use)
59 *
60 * See also \ref IfxLld_Cpu_Irq_Usage
61 *
62 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
63 * \code
64 * // priorities are normally defined in Ifx_IntPrioDef.h
65 * #define IFX_INTPRIO_QSPI0_TX 1
66 * #define IFX_INTPRIO_QSPI0_RX 2
67 * #define IFX_INTPRIO_QSPI0_ER 5
68 * \endcode
69 *
70 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
71 * \code
72 * IFX_INTERRUPT(qspi0TxISR, 0, IFX_INTPRIO_QSPI0_TX)
73 * {
74 * IfxQspi_SpiMaster_isrTransmit(&spi);
75 * }
76 *
77 * IFX_INTERRUPT(qspi0RxISR, 0, IFX_INTPRIO_QSPI0_RX)
78 * {
79 * IfxQspi_SpiMaster_isrReceive(&spi);
80 * }
81 *
82 * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
83 * {
84 * IfxQspi_SpiMaster_isrError(&spi);
85 *
86 * // Process errors. Eg: parity Error is checked below
87 * IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
88 * if( chHandle->errorFlags.parityError == 1)
89 * {
90 * // Parity Error
91 * }
92 * }
93 * \endcode
94 *
95 * Finally install the interrupt handlers in your initialisation function:
96 * \code
97 * // install interrupt handlers
98 * IfxCpu_Irq_installInterruptHandler(&qspi0TxISR, IFX_INTPRIO_QSPI0_TX);
99 * IfxCpu_Irq_installInterruptHandler(&qspi0RxISR, IFX_INTPRIO_QSPI0_RX);
100 * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
101 * IfxCpu_enableInterrupts();
102 * \endcode
103 *
104 * \subsection IfxLld_Qspi_SpiMaster_Interrupt_dma Interrupt Handler Installation (with dma use)
105 *
106 * See also \ref IfxLld_Cpu_Irq_Usage
107 *
108 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
109 * \code
110 * // qspi priorities
111 * #define IFX_INTPRIO_QSPI0_TX 1 // DMA channel 1
112 * #define IFX_INTPRIO_QSPI0_RX 2 // DMA channel 2
113 * #define IFX_INTPRIO_QSPI0_ER 0x30
114 *
115 * // dma priorities
116 * #define IFX_INTPRIO_DMA_CH1 10
117 * #define IFX_INTPRIO_DMA_CH2 11
118 * \endcode
119 *
120 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
121 * \code
122 * IFX_INTERRUPT(qspi0DmaTxISR, 0, IFX_INTPRIO_DMA_CH1 )
123 * {
124 * IfxQspi_SpiMaster_isrDmaTransmit(&spi);
125 * }
126 *
127 * IFX_INTERRUPT(qspi0DmaRxISR, 0, IFX_INTPRIO_DMA_CH2)
128 * {
129 * IfxQspi_SpiMaster_isrDmaReceive(&spi);
130 * }
131 *
132 * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
133 * {
134 * IfxQspi_SpiMaster_isrError(&spi);
135 *
136 * // Process errors. Eg: parity Error is checked below
137 * IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
138 * if( chHandle->errorFlags.parityError == 1)
139 * {
140 * // Parity Error
141 * }
142 * }
143 * \endcode
144 *
145 * Finally install the interrupt handlers in your initialisation function:
146 * \code
147 * // install interrupt handlers
148 * IfxCpu_Irq_installInterruptHandler(&qspi0DmaTxISR, IFX_INTPRIO_DMA_CH1);
149 * IfxCpu_Irq_installInterruptHandler(&qspi0DmaRxISR, IFX_INTPRIO_DMA_CH2);
150 * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
151 * IfxCpu_enableInterrupts();
152 * \endcode
153 *
154 *
155 * \subsection IfxLld_Qspi_SpiMaster_Init Module Initialisation (without dma use)
156 *
157 * The module initialisation can be done in the same function.
158 *
159 * Here an example for master mode:
160 * \code
161 * // create module config
162 * IfxQspi_SpiMaster_Config spiMasterConfig;
163 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
164 *
165 * // set the desired mode and maximum baudrate
166 * spiMasterConfig.base.mode = SpiIf_Mode_master;
167 * spiMasterConfig.base.maximumBaudrate = 10000000;
168 *
169 * // ISR priorities and interrupt target
170 * spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
171 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
172 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
173 * spiMasterConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
174 *
175 * // pin configuration
176 * const IfxQspi_SpiMaster_Pins pins = {
177 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
178 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
179 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
180 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
181 * };
182 * spiMasterConfig.pins = &pins;
183 *
184 * // initialize module
185 * //IfxQspi_SpiMaster spi; // defined globally
186 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
187 * \endcode
188 *
189 * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
190 *
191 * The module initialisation can be done in the same function.
192 *
193 * Here an example for master mode:
194 * \code
195 * // create module config
196 * IfxQspi_SpiMaster_Config spiMasterConfig;
197 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
198 *
199 * // set the desired mode and maximum baudrate
200 * spiMasterConfig.base.mode = SpiIf_Mode_master;
201 * spiMasterConfig.base.maximumBaudrate = 10000000;
202 *
203 * // ISR priorities and interrupt target (with Dma usage)
204 * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
205 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
206 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
207 *
208 * // dma configuration.
209 * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
210 * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
211 * spiMasterConfig.dma.useDma = 1;
212 *
213 * // pin configuration
214 * const IfxQspi_SpiMaster_Pins pins = {
215 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
216 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
217 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
218 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
219 * };
220 * spiMasterConfig.pins = &Pins;
221 *
222 *
223 * // initialize module
224 * //IfxQspi_SpiMaster spi; // defined globally
225 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
226 * \endcode
227 *
228 *
229 * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
230 *
231 * After the module has been initialized, one or more SPI channels can be configured.
232 * Each channel has a dedicated select line.
233 *
234 * Here an example for a SPI channel in master mode:
235 * \code
236 * // create channel config
237 * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
238 * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
239 *
240 * // set the baudrate for this channel
241 * spiMasterChannelConfig.base.baudrate = 5000000;
242 *
243 * // select pin configuration
244 * const IfxQspi_SpiMaster_Output slsOutput = {
245 * &IfxQspi0_SLSO7_P33_5_OUT,
246 * IfxPort_OutputMode_pushPull,
247 * IfxPort_PadDriver_cmosAutomotiveSpeed1
248 * };
249 * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
250 *
251 * // initialize channel
252 * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
253 * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
254 * \endcode
255 *
256 * The QSPI is ready for use now!
257 *
258 *
259 * \section IfxLld_Qspi_SpiMaster_DataTransfers Data Transfers
260 *
261 * In following examples we assume, that following buffers are declared globally:
262 * \code
263 * // declared somewhere globally
264 * #define SPI_BUFFER_SIZE 8
265 * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
266 * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
267 * \endcode
268 *
269 * Sending and Receiving a data stream:
270 * \code
271 * int i=0;
272 * // wait until transfer of previous data stream is finished
273 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
274 *
275 * // send/receive new stream
276 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
277 * \endcode
278 *
279 * Send only, discard received data:
280 * \code
281 *
282 * // wait until transfer of previous data stream is finished
283 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
284 *
285 * // send new stream
286 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
287 * \endcode
288 *
289 * Receive only, send all-1
290 * \code
291 * // wait until transfer of previous data stream is finished
292 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
293 *
294 * // receive new stream
295 * IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
296 * \endcode
297 *
298 * \section IfxLld_Qspi_SpiMaster_PhaseTransition Phase transition and User Interrupt usage
299 *
300 * Phase transition and user defined interrupts are not configured internal to Driver.
301 *
302 * Example usage of Phase transition interrupt is given below
303 * \code
304 * IfxCpu_Irq_installInterruptHandler(&qspi0PtISR, IFX_INTPRIO_QSPI0_PT);
305 * IfxQspi_pause(&MODULE_QSPI0);
306 * IfxQspi_configPT1Event(&MODULE_QSPI0, IfxQspi_PhaseTransitionEvent_startOfFrame); // Configured for PT1 SOF event
307 * IfxQspi_enablePT1Event(&MODULE_QSPI0,TRUE);
308 * IfxQspi_run(&MODULE_QSPI0);
309 * \endcode
310 *
311 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
312 * \code
313 * IFX_INTERRUPT(qspi0PtISR, 0, IFX_INTPRIO_QSPI0_PT )
314 * {
315 * IfxQspi_PhaseTransitionEvent event;
316 * event = IfxQspi_SpiMaster_isrPhaseTransition(&spiMaster);
317 * // process event
318 * switch (event)
319 * {
320 * case IfxQspi_PhaseTransitionEvent_startOfFrame:
321 * // SOF event
322 * break;
323 * // add other events if needed.
324 * }
325 * }
326 * \endcode
327 *
328 * \section IfxLld_Qspi_SpiMaster_XXLMode How to use XXL Mode with Dma
329 *
330 * The Qspi XXL mode is similar to Short mode with the exception to configure mode to xxl before calling IfxQspi_SpiMaster_initChannel() function. The remaining usage is similar to Short / ShortContinuous Mode (default one) with Dma
331 *
332 * \code
333 * spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_xxl;
334 * \endcode
335 *
336 *
337 * \section IfxLld_Qspi_SpiMaster_LongMode How to use Long / Long Continuous Mode with Dma
338 *
339 * The qspi Long mode is similar to short mode Except for below additional changes.
340 * 1. Transmit buffer need to be defined (this is in addition to source/TX data buffer. This buffer is used to store the DATA + CONFIG for dma usage).
341 * 2. Configure the Spi Channel configuration mode (new one) to long or longContinuous mode
342 * 3. Preparing Transmit buffer content for long/long Continuous mode
343 *
344 * Example Code is provided below.
345 *
346 * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
347 *
348 * Include following header file into your C code:
349 * \code
350 * #include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>
351 * \endcode
352 *
353 * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
354 *
355 * Declare QSPI module and channel handles:
356 *
357 * \code
358 * IfxQspi_SpiMaster spi;
359 * IfxQspi_SpiMaster_Channel spiChannel;
360 * \endcode
361 *
362 * In addition, declare global transmit and receive buffers for the data transfers:
363 * \code
364 * #define SPI_BUFFER_SIZE 50
365 * #define BACON_SIZE IFXQSPI_BACONSIZE(SPI_BUFFER_SIZE)
366 * #define FIFO_SIZE IFXQSPI_FIFO32BITSIZE(SPI_BUFFER_SIZE)
367 * // This should be 32 bit ; use addition of macros as shown
368 * __attribute__ ((aligned(64))) uint32 spi0TxLongBuffer[BACON_SIZE + FIFO_SIZE];
369 *
370 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
371 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
372 * \endcode
373 *
374 * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
375 *
376 * The module initialisation can be done in the same function.
377 *
378 * Here an example for master mode:
379 * \code
380 * // create module config
381 * IfxQspi_SpiMaster_Config spiMasterConfig;
382 * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
383 *
384 * // set the desired mode and maximum baudrate
385 * spiMasterConfig.base.mode = SpiIf_Mode_master;
386 * spiMasterConfig.base.maximumBaudrate = 10000000;
387 *
388 * // ISR priorities and interrupt target (with Dma usage)
389 * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
390 * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
391 * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
392 *
393 * // dma configuration.
394 * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
395 * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
396 * spiMasterConfig.dma.useDma = 1;
397 *
398 * // pin configuration
399 * const IfxQspi_SpiMaster_Pins pins = {
400 * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
401 * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
402 * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
403 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
404 * };
405 * spiMasterConfig.pins = &Pins;
406 *
407 *
408 * // initialize module
409 * //IfxQspi_SpiMaster spi; // defined globally
410 * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
411 * \endcode
412 *
413 *
414 * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
415 *
416 * After the module has been initialized, one or more SPI channels can be configured.
417 * Each channel has a dedicated select line.
418 *
419 * Here an example for a SPI channel in master mode:
420 * \code
421 * // create channel config
422 * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
423 * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
424 *
425 * // set the baudrate for this channel
426 * spiMasterChannelConfig.base.baudrate = 5000000;
427 *
428 * // select pin configuration
429 * const IfxQspi_SpiMaster_Output slsOutput = {
430 * &IfxQspi0_SLSO7_P33_5_OUT,
431 * IfxPort_OutputMode_pushPull,
432 * IfxPort_PadDriver_cmosAutomotiveSpeed1
433 * };
434 * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
435 *
436 * spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_longContinuous; // Select Long Continuous Mode
437 *
438 * // initialize channel
439 * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
440 * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
441 * \endcode
442 *
443 * Sending and Receiving a Long data stream:
444 * \code
445 * int i=0;
446 * // Pack data and Configuration to Transmit buffer (Only for Long / Long Continuous Mode(s))
447 * IfxQspi_SpiMaster_packLongModeBuffer(&spiMasterChannel, spi0TxBuffer, spi0TxLongBuffer, SPI_BUFFER_SIZE);
448 *
449 * // wait until transfer of previous data stream is finished
450 * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
451 *
452 * // send/receive new stream
453 * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
454 * \endcode
455 *
456 * ** NOTE for loopback mode **
457 * In case you want to configure and test a SPI channel in loopback, you have to
458 * select:
459 * spiMasterChannelConfig.base.mode.loopback = 1
460 *
461 * If an output pin is configured in loopback mode, the SPI channel number will be extracted from the pin map configuration.
462 *
463 * If an output pin is not configured in loopback, the default SPI channel selected
464 * will be 0.
465 *
466 * \defgroup IfxLld_Qspi_SpiMaster SPI Master Driver
467 * \ingroup IfxLld_Qspi
468 * \defgroup IfxLld_Qspi_SpiMaster_DataStructures Data Structures
469 * \ingroup IfxLld_Qspi_SpiMaster
470 * \defgroup IfxLld_Qspi_SpiMaster_Module Module Functions
471 * \ingroup IfxLld_Qspi_SpiMaster
472 * \defgroup IfxLld_Qspi_SpiMaster_Channel Channel Functions
473 * \ingroup IfxLld_Qspi_SpiMaster
474 * \defgroup IfxLld_Qspi_SpiMaster_Support Support Functions
475 * \ingroup IfxLld_Qspi_SpiMaster
476 * \defgroup IfxLld_Qspi_SpiMaster_Com Communication
477 * \ingroup IfxLld_Qspi_SpiMaster
478 * \defgroup IfxLld_Qspi_SpiMaster_InterruptFunctions Interrupt Functions
479 * \ingroup IfxLld_Qspi_SpiMaster
480 * \defgroup IfxLld_Qspi_SpiMaster_DirectFifo Direct FIFO Access
481 * \ingroup IfxLld_Qspi_SpiMaster
482 */
483
484 #ifndef IFXQSPI_SPIMASTER_H
485 #define IFXQSPI_SPIMASTER_H 1
486
487 /******************************************************************************/
488 /*----------------------------------Includes----------------------------------*/
489 /******************************************************************************/
490
491 #include "Cpu/Irq/IfxCpu_Irq.h"
492 #include "Dma/Dma/IfxDma_Dma.h"
493 #include "Qspi/Std/IfxQspi.h"
494 #include "Scu/Std/IfxScuWdt.h"
495
496 /******************************************************************************/
497 /*------------------------------Type Definitions------------------------------*/
498 /******************************************************************************/
499
500 typedef struct IfxQspi_SpiMaster_Channel_s IfxQspi_SpiMaster_Channel;
501
502 typedef void (*IfxQspi_SpiMaster_AutoSlso)(IfxQspi_SpiMaster_Channel *chHandle);
503
504 /******************************************************************************/
505 /*--------------------------------Enumerations--------------------------------*/
506 /******************************************************************************/
507
508 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
509 * \{ */
510 typedef enum
511 {
512 IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0, /**< \brief Slso will be low for complete frame */
513 IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1 /**< \brief Slso will toggle with every byte */
514 } IfxQspi_SpiMaster_ChannelBasedCs;
515
516 typedef enum
517 {
518 IfxQspi_SpiMaster_Mode_short = 0, /**< \brief Short Mode */
519 IfxQspi_SpiMaster_Mode_long = 1, /**< \brief Long Mode */
520 IfxQspi_SpiMaster_Mode_shortContinuous = 2, /**< \brief Short Continous Mode */
521 IfxQspi_SpiMaster_Mode_longContinuous = 3, /**< \brief Long Continous Mode */
522 IfxQspi_SpiMaster_Mode_xxl = 4 /**< \brief XXL Mode */
523 } IfxQspi_SpiMaster_Mode;
524
525 /** \} */
526
527 /******************************************************************************/
528 /*-----------------------------Data Structures--------------------------------*/
529 /******************************************************************************/
530
531 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
532 * \{ */
533 /** \brief SLSI pin configuration structure
534 */
535 typedef struct
536 {
537 IFX_CONST IfxQspi_Slsi_In *pin; /**< \brief Pointer to SLSI in pin */
538 IfxPort_InputMode mode; /**< \brief The SLSI pin input mode */
539 } IfxQspi_SpiMaster_Input;
540
541 /** \brief SLSO pin configuration structure
542 */
543 typedef struct
544 {
545 IFX_CONST IfxQspi_Slso_Out *pin; /**< \brief Pointer to SLSO out pin */
546 IfxPort_OutputMode mode; /**< \brief The SLSO pin output mode */
547 IfxPort_PadDriver driver; /**< \brief The pad driver mode which should be configured */
548 } IfxQspi_SpiMaster_Output;
549
550 /** \} */
551
552 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
553 * \{ */
554 /** \brief Dma handle
555 */
556 typedef struct
557 {
558 IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
559 IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
560 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
561 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
562 boolean useDma; /**< \brief use Dma for Data transfer/s */
563 } IfxQspi_SpiMaster_Dma;
564
565 /** \brief Dma configuration
566 */
567 typedef struct
568 {
569 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
570 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
571 boolean useDma; /**< \brief use Dma for Data transfer/s */
572 } IfxQspi_SpiMaster_DmaConfig;
573
574 /** \brief Qspi Master Mode Error Flags
575 */
576 typedef struct
577 {
578 uint16 parityError : 1; /**< \brief [0:0] Parity Error */
579 uint16 configurationError : 1; /**< \brief [1:1] Configuration Error */
580 uint16 baudrateError : 1; /**< \brief [2:2] baudrate Error */
581 uint16 txFifoOverflowError : 1; /**< \brief [3:3] TxFifo Overflow Error */
582 uint16 txFifoUnderflowError : 1; /**< \brief [4:4] TxFifo underflow Error */
583 uint16 rxFifoOverflowError : 1; /**< \brief [5:5] RxFifo Overflow Error */
584 uint16 rxFifoUnderflowError : 1; /**< \brief [6:6] RxFifo underflow Error */
585 uint16 expectTimeoutError : 1; /**< \brief [7:7] Expect Timeout Error */
586 } IfxQspi_SpiMaster_ErrorFlags;
587
588 /** \brief Union of Slave Select pins
589 */
590 typedef union
591 {
592 IfxQspi_SpiMaster_Input input; /**< \brief SLSI pin configuration structure */
593 IfxQspi_SpiMaster_Output output; /**< \brief SLSO pin configuration structure */
594 } IfxQspi_SpiMaster_InputOutput;
595
596 /** \brief Master pin IO configuration structure
597 */
598 typedef struct
599 {
600 IFX_CONST IfxQspi_Sclk_Out *sclk; /**< \brief Pointer to SLCK out pin */
601 IfxPort_OutputMode sclkMode; /**< \brief The SCLK pin output mode */
602 IFX_CONST IfxQspi_Mtsr_Out *mtsr; /**< \brief Pointer to MTSR out pin */
603 IfxPort_OutputMode mtsrMode; /**< \brief The MTSR pin output mode */
604 IFX_CONST IfxQspi_Mrst_In *mrst; /**< \brief Pointer to MRST in pin */
605 IfxPort_InputMode mrstMode; /**< \brief The MRST pin input mode */
606 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
607 } IfxQspi_SpiMaster_Pins;
608
609 /** \} */
610
611 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
612 * \{ */
613 /** \brief Module handle data structure
614 */
615 typedef struct
616 {
617 SpiIf base; /**< \brief Module SPI interface handle */
618 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
619 IfxQspi_SpiMaster_Dma dma; /**< \brief dma handle */
620 float32 maximumBaudrate; /**< \brief Maximum Baud Rate for the SPI Module. */
621 } IfxQspi_SpiMaster;
622
623 /** \brief Module Channel configuration structure
624 */
625 typedef struct
626 {
627 SpiIf_ChConfig base; /**< \brief SPI interface channel configuration structure */
628 IfxQspi_SpiMaster_InputOutput sls; /**< \brief Union of Slave Select pins */
629 IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs; /**< \brief define the slso behaviour */
630 IfxQspi_SpiMaster_Mode mode; /**< \brief Qspi Operating Mode */
631 uint32 dummyTxValue; /**< \brief Dummy TX value to be sent for "recieve only" modes */
632 uint32 dummyRxValue; /**< \brief Dummy RX value for transmit only modes */
633 } IfxQspi_SpiMaster_ChannelConfig;
634
635 /** \brief Module Channel handle structure
636 */
637 struct IfxQspi_SpiMaster_Channel_s
638 {
639 SpiIf_Ch base; /**< \brief SPI interface channel handle structure */
640 Ifx_QSPI_BACON bacon; /**< \brief basic configuration register */
641 IfxPort_Pin slso; /**< \brief Defines SLSO pin */
642 IfxQspi_SpiMaster_AutoSlso activateSlso; /**< \brief Specifies function for Auto SLSO activation */
643 IfxQspi_SpiMaster_AutoSlso deactivateSlso; /**< \brief Specifies function for Auto SLSO deactivation */
644 IfxQspi_ChannelId channelId; /**< \brief QSPI channel Number */
645 Ifx_ActiveState slsoActiveState; /**< \brief Specifies the current state of SLSO */
646 uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
647 boolean firstWrite; /**< \brief Specifies whether the data id first write or not. */
648 IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs; /**< \brief define the slso behaviour */
649 IfxQspi_SpiMaster_Mode mode; /**< \brief Qspi Operating Mode */
650 IfxQspi_SpiMaster_ErrorFlags errorFlags; /**< \brief Spi Master Error Flags */
651 uint32 dummyTxValue; /**< \brief Dummy TX value, which will be sent for "recieve only" mode. */
652 uint32 dummyRxValue; /**< \brief Dummy Rx value, for "transmit only" modes */
653 };
654
655 /** \brief Module configuration structure
656 */
657 typedef struct
658 {
659 SpiIf_Config base; /**< \brief SPI interface configuration structure */
660 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
661 boolean allowSleepMode; /**< \brief Specifies module sleep mode */
662 boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
663 IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
664 IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
665 IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
666 IFX_CONST IfxQspi_SpiMaster_Pins *pins; /**< \brief structure for QSPI Master pins */
667 IfxQspi_SpiMaster_DmaConfig dma; /**< \brief Dma configuration */
668 IfxQspi_FifoMode txFifoMode; /**< \brief Specifies the transmit FIFO mode */
669 IfxQspi_FifoMode rxFifoMode; /**< \brief Specifies the Receive FIFO mode */
670 } IfxQspi_SpiMaster_Config;
671
672 /** \} */
673
674 /** \addtogroup IfxLld_Qspi_SpiMaster_Module
675 * \{ */
676
677 /******************************************************************************/
678 /*-------------------------Global Function Prototypes-------------------------*/
679 /******************************************************************************/
680
681 /** \brief Initialises the module
682 * \param handle Module handle
683 * \param config Predefined configuration structure of the module
684 * \return None
685 *
686 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
687 *
688 */
689 IFX_EXTERN void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config);
690
691 /** \brief Fills the config structure with default values
692 * \param config Configuration structure which should be initialized.
693 * \param qspi pointer to QSPI registers
694 * \return None
695 *
696 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
697 *
698 */
699 IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi);
700
701 /** \} */
702
703 /** \addtogroup IfxLld_Qspi_SpiMaster_Channel
704 * \{ */
705
706 /******************************************************************************/
707 /*-------------------------Global Function Prototypes-------------------------*/
708 /******************************************************************************/
709
710 /** \brief Initializes the channel
711 * \param chHandle Module Channel handle
712 * \param chConfig Channel configuration structure
713 * \return Status of Channel (busy or ok or failure)
714 *
715 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
716 *
717 */
718 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig);
719
720 /** \brief Fills the config structure with default values
721 * \param chConfig Configuration structure which should be initialized.
722 * \param handle Module handle
723 * \return None
724 *
725 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
726 *
727 */
728 IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle);
729
730 /** \} */
731
732 /** \addtogroup IfxLld_Qspi_SpiMaster_Com
733 * \{ */
734
735 /******************************************************************************/
736 /*-------------------------Global Function Prototypes-------------------------*/
737 /******************************************************************************/
738
739 /** \brief Exchanges data between source and data
740 * \param chHandle Module Channel handle
741 * \param src Source of data. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
742 * \param dest Destination to which to be sent.Can be set to NULL_PTR if nothing to receive(transmit only).
743 * \param count Number of data in pending
744 * \return Status of exchange of data
745 *
746 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
747 *
748 */
749 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count);
750
751 /** \brief Gets the transmission status
752 * \param chHandle Module Channel handle
753 * \return Transmission status
754 *
755 * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
756 *
757 */
758 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle);
759
760 /** \} */
761
762 /** \addtogroup IfxLld_Qspi_SpiMaster_InterruptFunctions
763 * \{ */
764
765 /******************************************************************************/
766 /*-------------------------Global Function Prototypes-------------------------*/
767 /******************************************************************************/
768
769 /** \brief Transmit interrupt handler
770 * \param qspiHandle Module handle
771 * \return None
772 */
773 IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle);
774
775 /** \brief Transmit interrupt handler
776 * \param qspiHandle Module handle
777 * \return None
778 */
779 IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle);
780
781 /** \brief Error Interrupt handler
782 * \param handle Module handle
783 * \return None
784 */
785 IFX_EXTERN void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle);
786
787 /** \brief Phase Transition interrupt handler
788 * \param handle Module handle
789 * \return Phase Transition Event
790 */
791 IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle);
792
793 /** \brief Receive Interrupt handler
794 * \param handle Module handle
795 * \return None
796 */
797 IFX_EXTERN void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle);
798
799 /** \brief Transmit interrupt handler
800 * \param handle Module handle
801 * \return None
802 */
803 IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle);
804
805 /** \brief User defined interrupt handler
806 * \param handle Module handle
807 * \return User Event
808 */
809 IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle);
810
811 /** \} */
812
813 /** \addtogroup IfxLld_Qspi_SpiMaster_DirectFifo
814 * \{ */
815
816 /******************************************************************************/
817 /*-------------------------Inline Function Prototypes-------------------------*/
818 /******************************************************************************/
819
820 /** \brief Reads data or status in RxFIFO
821 * \param handle Module handle
822 * \return Data or Status in RxFIFO
823 */
824 IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle);
825
826 /** \brief Writes Basic configuration value to Tx FIFO
827 * \param handle Module handle
828 * \param baconVal Basic configuration value to be entered in TxFIFO
829 * \return None
830 */
831 IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal);
832
833 /** \brief Writes extended configuration of the channel
834 * \param chHandle Module Channel handle
835 * \param econVal Channel Timing configuration value
836 * \return None
837 */
838 IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal);
839
840 /** \brief Writes data and configuration mixed value to Tx FIFO
841 * \param handle Module handle
842 * \param mixEntryVal Mixed of Data and configuration
843 * \return None
844 */
845 IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal);
846
847 /** \brief Writes the data to TxFIFO
848 * \param chHandle Module Channel handle
849 * \param data Data to be entered in Tx FIFO
850 * \return None
851 */
852 IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data);
853
854 /******************************************************************************/
855 /*-------------------------Global Function Prototypes-------------------------*/
856 /******************************************************************************/
857
858 /** \brief pack data to Long mode buffer
859 * \param chHandle Module Channel handle
860 * \param data source Data buffer to be packed
861 * \param longFifoBuffer destination buffer for data and configuration
862 * \param dataLength size of data in source buffer (in bytes)
863 * \return None
864 */
865 IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength);
866
867 /** \} */
868
869 /******************************************************************************/
870 /*-------------------------Global Function Prototypes-------------------------*/
871 /******************************************************************************/
872
873 /** \brief Gets the channel configuration
874 * \param chHandle Module Channel handle
875 * \return Channel configuration
876 */
877 IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle);
878
879 /** \brief Set the channel baudrate
880 * \param chHandle Module Channel handle
881 * \param baudrate Baudrate to be configured (in Baud)
882 * \return Status of Channel (busy or ok or failure)
883 */
884 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate);
885
886 /******************************************************************************/
887 /*---------------------Inline Function Implementations------------------------*/
888 /******************************************************************************/
889
890 IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle)
891 {
892 Ifx_QSPI *qspiSFR = handle->qspi;
893 uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
894 return data;
895 }
896
897
898 IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal)
899 {
900 Ifx_QSPI *qspiSFR = handle->qspi;
901 IfxQspi_writeBasicConfiguration(qspiSFR, baconVal);
902 }
903
904
905 IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
906 {
907 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
908 IfxQspi_writeExtendedConfiguration(handle->qspi, chHandle->channelId, econVal);
909 }
910
911
912 IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
913 {
914 Ifx_QSPI *qspiSFR = handle->qspi;
915 IfxQspi_writeMixedDataTransmitFifo(qspiSFR, mixEntryVal);
916 }
917
918
919 IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
920 {
921 IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
922 IfxQspi_writeTransmitFifo(handle->qspi, data);
923 }
924
925
926 #endif /* IFXQSPI_SPIMASTER_H */
IfxQspi_SpiMaster_Channel_s::bacon
Ifx_QSPI_BACON bacon
basic configuration register
Definition: IfxQspi_SpiMaster.h:640
IfxQspi_SpiMaster_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:606
IfxQspi_SpiMaster_ChannelBasedCs_disabled
Slso will be low for complete frame.
Definition: IfxQspi_SpiMaster.h:512
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:63
IfxQspi_SpiMaster_Mode_shortContinuous
Short Continous Mode.
Definition: IfxQspi_SpiMaster.h:520
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxQspi_SpiMaster
Module handle data structure.
Definition: IfxQspi_SpiMaster.h:615
IfxQspi_SpiMaster_Output::mode
IfxPort_OutputMode mode
The SLSO pin output mode.
Definition: IfxQspi_SpiMaster.h:546
IfxQspi_SpiMaster_Pins::mrstMode
IfxPort_InputMode mrstMode
The MRST pin input mode.
Definition: IfxQspi_SpiMaster.h:605
IfxQspi_SpiMaster_Output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:543
IfxQspi_SpiMaster_Channel_s::slsoActiveState
Ifx_ActiveState slsoActiveState
Specifies the current state of SLSO.
Definition: IfxQspi_SpiMaster.h:645
IfxQspi_SpiMaster_writeBasicConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal)
Writes Basic configuration value to Tx FIFO.
Definition: IfxQspi_SpiMaster.h:898
IfxQspi_SpiMaster_Channel_s::deactivateSlso
IfxQspi_SpiMaster_AutoSlso deactivateSlso
Specifies function for Auto SLSO deactivation.
Definition: IfxQspi_SpiMaster.h:643
IfxQspi_SpiMaster_Channel_s::channelId
IfxQspi_ChannelId channelId
QSPI channel Number.
Definition: IfxQspi_SpiMaster.h:644
SpiIf_ChConfig_
Definition: SpiIf.h:208
IfxQspi_SpiMaster_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiMaster.h:663
IfxQspi_PhaseTransitionEvent
IfxQspi_PhaseTransitionEvent
Phase Transition Event.
Definition: IfxQspi.h:174
IfxQspi_SpiMaster_Pins::mtsrMode
IfxPort_OutputMode mtsrMode
The MTSR pin output mode.
Definition: IfxQspi_SpiMaster.h:603
IfxQspi_SpiMaster_isrError
IFX_EXTERN void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiMaster.c:622
IfxQspi_SpiMaster_setChannelBaudrate
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
Set the channel baudrate.
Definition: IfxQspi_SpiMaster.c:871
IfxQspi_SpiMaster_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiMaster.h:558
IfxQspi_SpiMaster_Channel_s::slso
IfxPort_Pin slso
Defines SLSO pin.
Definition: IfxQspi_SpiMaster.h:641
IfxQspi_SpiMaster_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transmit FIFO mode.
Definition: IfxQspi_SpiMaster.h:668
IfxQspi_SpiMaster_Dma
Dma handle.
Definition: IfxQspi_SpiMaster.h:556
SpiIf_Config
Definition: SpiIf.h:143
IfxQspi_SpiMaster_isrDmaReceive
IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:546
IfxDma_Dma.h
DMA DMA details.
IfxQspi_SpiMaster_Config::pins
IFX_CONST IfxQspi_SpiMaster_Pins * pins
structure for QSPI Master pins
Definition: IfxQspi_SpiMaster.h:666
IfxQspi_SpiMaster_Mode_xxl
XXL Mode.
Definition: IfxQspi_SpiMaster.h:522
IfxQspi_SpiMaster_writeTransmitFifo
IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
Writes the data to TxFIFO.
Definition: IfxQspi_SpiMaster.h:919
IfxQspi_SpiMaster_isrPhaseTransition
IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
Phase Transition interrupt handler.
Definition: IfxQspi_SpiMaster.c:691
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxQspi_SpiMaster_Input::mode
IfxPort_InputMode mode
The SLSI pin input mode.
Definition: IfxQspi_SpiMaster.h:538
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxQspi_Sclk_Out
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:95
IfxQspi_SpiMaster_Config::dma
IfxQspi_SpiMaster_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiMaster.h:667
IfxQspi_writeMixedDataTransmitFifo
IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
Writes Data and Configuration into MIXEDENTRY register.
Definition: IfxQspi.h:1217
float32
float float32
Definition: Platform_Types.h:167
IfxQspi_SpiMaster_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the Receive FIFO mode.
Definition: IfxQspi_SpiMaster.h:669
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:266
IfxQspi_SpiMaster_Output::driver
IfxPort_PadDriver driver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiMaster.h:547
IfxQspi_SpiMaster_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiMaster.h:661
IfxQspi_SpiMaster_exchange
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiMaster.c:121
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxQspi_SpiMaster_getChannelConfig
IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
Gets the channel configuration.
Definition: IfxQspi_SpiMaster.c:163
IfxQspi_SpiMaster_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:583
SpiIf_
Definition: SpiIf.h:133
IfxQspi_SpiMaster_Mode
IfxQspi_SpiMaster_Mode
Definition: IfxQspi_SpiMaster.h:516
IfxQspi_SpiMaster_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiMaster.h:662
IfxQspi_SpiMaster_Config
Module configuration structure.
Definition: IfxQspi_SpiMaster.h:657
IfxQspi_SpiMaster_isrTransmit
IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:719
IfxQspi_writeExtendedConfiguration
IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
Writes channel timing configuration into ECON register.
Definition: IfxQspi.h:1210
IfxQspi_SpiMaster_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiMaster.h:581
IfxScuWdt.h
SCU basic functionality.
IfxQspi_SpiMaster_writeMixedDataConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
Writes data and configuration mixed value to Tx FIFO.
Definition: IfxQspi_SpiMaster.h:912
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxQspi_Slso_Out
SLSO pin mapping structure.
Definition: IfxQspi_PinMap.h:103
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1096
IfxQspi_SpiMaster_initChannelConfig
IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:300
IfxQspi_SpiMaster_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiMaster.h:561
IfxQspi_SpiMaster_Input::pin
IFX_CONST IfxQspi_Slsi_In * pin
Pointer to SLSI in pin.
Definition: IfxQspi_SpiMaster.h:537
IfxQspi_SpiMaster_Channel_s::firstWrite
boolean firstWrite
Specifies whether the data id first write or not.
Definition: IfxQspi_SpiMaster.h:647
IfxQspi_SpiMaster_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:664
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:75
IfxQspi_Mtsr_Out
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:87
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:151
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:197
IfxQspi_SpiMaster_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_Out * mtsr
Pointer to MTSR out pin.
Definition: IfxQspi_SpiMaster.h:602
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:254
IfxQspi_SpiMaster_Pins::sclkMode
IfxPort_OutputMode sclkMode
The SCLK pin output mode.
Definition: IfxQspi_SpiMaster.h:601
IfxQspi_SpiMaster::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiMaster.h:618
IfxQspi_SpiMaster::maximumBaudrate
float32 maximumBaudrate
Maximum Baud Rate for the SPI Module.
Definition: IfxQspi_SpiMaster.h:620
IfxQspi_SpiMaster_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:582
IfxQspi_SpiMaster_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiMaster.h:579
IfxQspi_SpiMaster_Output::pin
IFX_CONST IfxQspi_Slso_Out * pin
Pointer to SLSO out pin.
Definition: IfxQspi_SpiMaster.h:545
IfxQspi_SpiMaster_ChannelConfig::dummyTxValue
uint32 dummyTxValue
Dummy TX value to be sent for "recieve only" modes.
Definition: IfxQspi_SpiMaster.h:631
IfxQspi_SpiMaster_Channel_s::errorFlags
IfxQspi_SpiMaster_ErrorFlags errorFlags
Spi Master Error Flags.
Definition: IfxQspi_SpiMaster.h:650
IfxQspi_SpiMaster_Dma::useDma
boolean useDma
use Dma for Data transfer/s
Definition: IfxQspi_SpiMaster.h:562
IfxQspi_Mrst_In
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:39
IfxQspi_SpiMaster_Mode_long
Long Mode.
Definition: IfxQspi_SpiMaster.h:519
IfxQspi_SpiMaster_InputOutput
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:590
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxQspi_SpiMaster_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiMaster.h:659
IfxQspi_SpiMaster_ChannelConfig::channelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs
define the slso behaviour
Definition: IfxQspi_SpiMaster.h:629
IfxQspi_SpiMaster_Input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:535
IfxQspi_SpiMaster_Channel_s::dataWidth
uint8 dataWidth
Number of bits which will be written into the FIFO.
Definition: IfxQspi_SpiMaster.h:646
IfxQspi_SpiMaster::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiMaster.h:617
IfxQspi_SpiMaster_DmaConfig
Dma configuration.
Definition: IfxQspi_SpiMaster.h:567
IfxQspi_SpiMaster_ChannelConfig::mode
IfxQspi_SpiMaster_Mode mode
Qspi Operating Mode.
Definition: IfxQspi_SpiMaster.h:630
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxQspi_SpiMaster_Mode_longContinuous
Long Continous Mode.
Definition: IfxQspi_SpiMaster.h:521
IfxQspi_SpiMaster_Pins::mrst
IFX_CONST IfxQspi_Mrst_In * mrst
Pointer to MRST in pin.
Definition: IfxQspi_SpiMaster.h:604
IfxQspi_SpiMaster_packLongModeBuffer
IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
pack data to Long mode buffer
Definition: IfxQspi_SpiMaster.c:749
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxQspi_SpiMaster_isrUserDefined
IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
User defined interrupt handler.
Definition: IfxQspi_SpiMaster.c:727
IfxQspi_SpiMaster_InputOutput::input
IfxQspi_SpiMaster_Input input
SLSI pin configuration structure.
Definition: IfxQspi_SpiMaster.h:592
IfxQspi_SpiMaster_isrDmaTransmit
IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiMaster.c:567
IfxQspi_SpiMaster_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiMaster.h:559
IfxQspi_SpiMaster_isrReceive
IFX_EXTERN void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiMaster.c:711
IfxQspi_SpiMaster_Channel_s::activateSlso
IfxQspi_SpiMaster_AutoSlso activateSlso
Specifies function for Auto SLSO activation.
Definition: IfxQspi_SpiMaster.h:642
IfxQspi_SpiMaster_ErrorFlags
Qspi Master Mode Error Flags.
Definition: IfxQspi_SpiMaster.h:576
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:196
IfxQspi_SpiMaster_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiMaster.h:665
IfxQspi_SpiMaster_ChannelConfig::base
SpiIf_ChConfig base
SPI interface channel configuration structure.
Definition: IfxQspi_SpiMaster.h:627
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxQspi_SpiMaster_initModule
IFX_EXTERN void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
Initialises the module.
Definition: IfxQspi_SpiMaster.c:315
IfxQspi_SpiMaster_initModuleConfig
IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiMaster.c:527
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1223
IfxQspi_SpiMaster_writeExtendedConfiguration
IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
Writes extended configuration of the channel.
Definition: IfxQspi_SpiMaster.h:905
IfxQspi_SpiMaster_ChannelConfig::dummyRxValue
uint32 dummyRxValue
Dummy RX value for transmit only modes.
Definition: IfxQspi_SpiMaster.h:632
IfxQspi_SpiMaster_AutoSlso
void(* IfxQspi_SpiMaster_AutoSlso)(IfxQspi_SpiMaster_Channel *chHandle)
Definition: IfxQspi_SpiMaster.h:502
IfxQspi_SpiMaster_Pins::sclk
IFX_CONST IfxQspi_Sclk_Out * sclk
Pointer to SLCK out pin.
Definition: IfxQspi_SpiMaster.h:600
IfxQspi_SpiMaster_Mode_short
Short Mode.
Definition: IfxQspi_SpiMaster.h:518
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxQspi_SpiMaster_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiMaster.h:580
IfxQspi_SpiMaster_ChannelBasedCs_enabled
Slso will toggle with every byte.
Definition: IfxQspi_SpiMaster.h:513
IfxQspi_SpiMaster_ChannelConfig::sls
IfxQspi_SpiMaster_InputOutput sls
Union of Slave Select pins.
Definition: IfxQspi_SpiMaster.h:628
IfxQspi_writeBasicConfiguration
IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register.
Definition: IfxQspi.h:1184
IfxQspi.h
QSPI basic functionality.
IfxQspi_SpiMaster_Channel_s::base
SpiIf_Ch base
SPI interface channel handle structure.
Definition: IfxQspi_SpiMaster.h:639
IfxQspi_SpiMaster_getStatus
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
Gets the transmission status.
Definition: IfxQspi_SpiMaster.c:198
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:49
IfxQspi_SpiMaster_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiMaster.h:584
IfxQspi_SpiMaster_initChannel
IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
Initializes the channel.
Definition: IfxQspi_SpiMaster.c:211
IfxQspi_SpiMaster_ChannelBasedCs
IfxQspi_SpiMaster_ChannelBasedCs
Definition: IfxQspi_SpiMaster.h:510
IfxQspi_SpiMaster_Pins
Master pin IO configuration structure.
Definition: IfxQspi_SpiMaster.h:598
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:454
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxQspi_SpiMaster_ChannelConfig
Module Channel configuration structure.
Definition: IfxQspi_SpiMaster.h:625
IfxQspi_SpiMaster_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiMaster.h:585
IfxQspi_SpiMaster_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiMaster.h:578
IfxQspi_SpiMaster_readReceiveFifo
IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle)
Reads data or status in RxFIFO.
Definition: IfxQspi_SpiMaster.h:890
IfxQspi_SpiMaster_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiMaster.h:560
IfxQspi_SpiMaster::dma
IfxQspi_SpiMaster_Dma dma
dma handle
Definition: IfxQspi_SpiMaster.h:619
IfxQspi_SpiMaster_InputOutput::output
IfxQspi_SpiMaster_Output output
SLSO pin configuration structure.
Definition: IfxQspi_SpiMaster.h:593
SpiIf_Ch_
Definition: SpiIf.h:194
IfxQspi_SpiMaster_Channel_s
Module Channel handle structure.
Definition: IfxQspi_SpiMaster.h:637


iLLD_TC26B: IfxQspi_SpiSlave.c Source File

  • Qspi
  • SpiSlave
IfxQspi_SpiSlave.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiSlave.c
3 * \brief QSPI SPISLAVE details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxQspi_SpiSlave.h"
30
31 /** \addtogroup IfxLld_Qspi_SpiSlave_Support
32 * \{ */
33
34 /******************************************************************************/
35 /*-----------------------Private Function Prototypes--------------------------*/
36 /******************************************************************************/
37
38 /** \brief Reads data from the Rx FIFO
39 * \param handle Module handle
40 * \return None
41 */
42 IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle);
43
44 /** \brief Writes data into the Tx FIFO
45 * \param handle Module handle
46 * \return None
47 */
48 IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle);
49
50 /** \} */
51
52 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
53 * \{ */
54
55 /******************************************************************************/
56 /*------------------------Private Variables/Constants-------------------------*/
57 /******************************************************************************/
58
59 /** \brief dummy variable where recived data is placed
60 */
61 IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue = 0;
62
63 /** \brief dummy value to be transmitted
64 */
65 IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue = ~0;
66
67 /** \} */
68
69 /******************************************************************************/
70 /*-------------------------Function Implementations---------------------------*/
71 /******************************************************************************/
72
73 SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
74 {
75 SpiIf_Status status = SpiIf_Status_busy;
76
77 /* initiate transfer when resource is free */
78 if (handle->onTransfer == FALSE)
79 {
80 status = SpiIf_Status_ok;
81
82 handle->onTransfer = TRUE;
83 handle->txJob.data = (void *)src;
84 handle->txJob.remaining = count;
85 handle->rxJob.data = dest;
86 handle->rxJob.remaining = count;
87 IfxQspi_SpiSlave_write(handle);
88 }
89
90 return status;
91 }
92
93
94 SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
95 {
96 SpiIf_Status status = SpiIf_Status_ok;
97
98 if (handle->onTransfer != 0)
99 {
100 status = SpiIf_Status_busy;
101 }
102
103 return status;
104 }
105
106
107 void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
108 {
109 Ifx_QSPI *qspiSFR = config->qspi;
110 Ifx_DMA *dmaSFR = &MODULE_DMA;
111
112 /* handle.base must be at offset 0 to be compatible with the standard interface SscIf */
113 {
114 uint16 password = IfxScuWdt_getCpuWatchdogPassword();
115 IfxScuWdt_clearCpuEndinit(password);
116 IfxQspi_setEnableModuleRequest(qspiSFR);
117 IfxQspi_setSleepMode(qspiSFR, (config->allowSleepMode != FALSE) ? IfxQspi_SleepMode_enable : IfxQspi_SleepMode_disable);
118 IfxScuWdt_setCpuEndinit(password);
119 }
120
121 { /* Configure GLOBAL, Note: at the moment default values for GLOBAL */
122 Ifx_QSPI_GLOBALCON globalcon;
123 globalcon.U = 0;
124 globalcon.B.TQ = IfxQspi_calculateTimeQuantumLength(qspiSFR, config->base.maximumBaudrate);
125 globalcon.B.EXPECT = IfxQspi_ExpectTimeout_2097152; /* 2^(EXPECT+6) : timeout for expect phase in Tqspi */
126 //globalcon.B.LB = 0; /* 0 : disable loop-back w*/
127 //globalcon.B.DEL0 = 0; /* 0 : disable delayed mode for SLSO 0 */
128 //globalcon.B.STROBE = 0; /* (STROBE+1) : strobe delay for SLSO 0 in Tq */
129 //globalcon.B.SRF = 0; /* 0 : disable stop-on-RXFIFO full feature */
130 //globalcon.B.STIP = 0; /* 0 : MRST = 0 when QSPI is deselected in slave mode */
131 //globalcon.B.EN = 0; /* 0 : PAUSE requested, 1 : RUN requested */
132 globalcon.B.MS = IfxQspi_Mode_master; /* select master mode during configuration - we will switch to slave mode at the end of this function */
133 globalcon.B.AREN = (config->pauseOnBaudrateSpikeErrors != FALSE) ? 1U : 0U;
134 globalcon.B.RESETS = 1; /* Reset SM and FIFOs */
135 qspiSFR->GLOBALCON.U = globalcon.U;
136 }
137
138 { /* Configure interrupt requests */
139 Ifx_QSPI_GLOBALCON1 globalcon1;
140 globalcon1.U = 0;
141 globalcon1.B.ERRORENS = (config->base.erPriority > 0) ? IFXQSPI_ERRORENABLEMASK : 0;
142 globalcon1.B.TXEN = (config->base.txPriority > 0) || (config->dma.useDma);
143 globalcon1.B.RXEN = (config->base.rxPriority > 0) || (config->dma.useDma);
144 globalcon1.B.TXFIFOINT = config->txFifoThreshold;
145 globalcon1.B.RXFIFOINT = config->rxFifoThreshold;
146 globalcon1.B.TXFM = config->txFifoMode;
147 globalcon1.B.RXFM = config->rxFifoMode;
148
149 qspiSFR->GLOBALCON1.U = globalcon1.U;
150 }
151
152 handle->qspi = qspiSFR;
153 handle->base.driver = handle;
154 handle->base.sending = 0U;
155 handle->base.activeChannel = NULL_PTR;
156
157 /* Protocol Configuration */
158 {
159 IfxQspi_SpiSlave_Protocol *protocol = (IfxQspi_SpiSlave_Protocol *)&config->protocol;
160
161 SpiIf_ChConfig chConfig;
162 SpiIf_initChannelConfig(&chConfig, NULL_PTR);
163 chConfig.mode.clockPolarity = protocol->clockPolarity;
164 chConfig.mode.shiftClock = protocol->shiftClock;
165 chConfig.mode.dataHeading = protocol->dataHeading;
166 chConfig.mode.dataWidth = protocol->dataWidth;
167 chConfig.mode.parityMode = protocol->parityMode;
168
169 {
170 Ifx_QSPI_BACON bacon;
171 uint8 cs = 0; // not relevant for slave
172
173 qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, cs, &chConfig);
174 bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, IfxQspi_ChannelId_0, &chConfig.mode, config->base.maximumBaudrate);
175 IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, bacon.U);
176 }
177 handle->dataWidth = protocol->dataWidth;
178 }
179
180 handle->rxJob.data = NULL_PTR;
181 handle->rxJob.remaining = 0;
182 handle->txJob.data = NULL_PTR;
183 handle->txJob.remaining = 0;
184 handle->onTransfer = FALSE;
185
186 /* Configure I/O pins for slave mode */
187 const IfxQspi_SpiSlave_Pins *pins = config->pins;
188
189 if (pins != NULL_PTR)
190 {
191 const IfxQspi_Sclk_In *sclkIn = pins->sclk;
192
193 if (sclkIn != NULL_PTR)
194 {
195 IfxQspi_initSclkInPinWithPadLevel(sclkIn, pins->sclkMode, pins->pinDriver);
196 }
197
198 const IfxQspi_Mtsr_In *mtsrIn = pins->mtsr;
199
200 if (mtsrIn != NULL_PTR)
201 {
202 IfxQspi_initMtsrInPinWithPadLevel(mtsrIn, pins->mtsrMode, pins->pinDriver);
203 }
204
205 const IfxQspi_Mrst_Out *mrstOut = pins->mrst;
206
207 if (mrstOut != NULL_PTR)
208 {
209 IfxQspi_initMrstOutPin(mrstOut, pins->mrstMode, pins->pinDriver);
210 }
211
212 const IfxQspi_Slsi_In *slsiIn = pins->slsi;
213
214 if (slsiIn != NULL_PTR)
215 {
216 IfxQspi_initSlsiWithPadLevel(slsiIn, pins->slsiMode, pins->pinDriver);
217 }
218 }
219
220 if (config->dma.useDma)
221 {
222 IfxDma_Dma dma;
223 IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
224
225 IfxDma_Dma_ChannelConfig dmaCfg;
226 IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
227 handle->dma.useDma = TRUE;
228 {
229 handle->dma.txDmaChannelId = config->dma.txDmaChannelId;
230 dmaCfg.channelId = handle->dma.txDmaChannelId;
231 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
232 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
233
234 // source address and transfer count will be configured during runtime
235 dmaCfg.sourceAddress = 0;
236 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
237 dmaCfg.sourceCircularBufferEnabled = FALSE;
238 dmaCfg.transferCount = 0;
239 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
240
241 // destination address is fixed; use circular mode to stay at this address for each move
242 dmaCfg.destinationAddress = (uint32)&qspiSFR->DATAENTRY[0].U;
243 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
244 dmaCfg.destinationCircularBufferEnabled = TRUE;
245
246 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
247 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
248 dmaCfg.blockMode = IfxDma_ChannelMove_1;
249
250 IfxDma_Dma_initChannel(&handle->dma.txDmaChannel, &dmaCfg);
251 }
252
253 {
254 handle->dma.rxDmaChannelId = config->dma.rxDmaChannelId;
255 dmaCfg.channelId = handle->dma.rxDmaChannelId;
256 dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
257 dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
258
259 // source address is fixed; use circular mode to stay at this address for each move
260 dmaCfg.sourceAddress = (uint32)&qspiSFR->RXEXIT.U;
261 dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
262 dmaCfg.sourceCircularBufferEnabled = TRUE;
263
264 // destination address and transfer count will be configured during runtime
265 dmaCfg.destinationAddress = 0;
266 dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
267 dmaCfg.destinationCircularBufferEnabled = FALSE;
268 dmaCfg.transferCount = 0;
269
270 dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
271 dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
272 dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
273 dmaCfg.blockMode = IfxDma_ChannelMove_1;
274
275 IfxDma_Dma_initChannel(&handle->dma.rxDmaChannel, &dmaCfg);
276 }
277 /* Dma channel interrupt configuration */
278 {
279 volatile Ifx_SRC_SRCR *src = IfxDma_getSrcPointer(dmaSFR, (IfxDma_ChannelId)config->dma.txDmaChannelId);
280 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
281 IfxSrc_enable(src);
282
283 src = IfxDma_getSrcPointer(dmaSFR, (IfxDma_ChannelId)config->dma.rxDmaChannelId);
284 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
285 IfxSrc_enable(src);
286 }
287 }
288
289 /* interrupt configuration */
290 {
291 IfxQspi_clearAllEventFlags(qspiSFR);
292
293 if (handle->dma.useDma)
294 {
295 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
296 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.txDmaChannelId);
297 IfxSrc_enable(src);
298
299 src = IfxQspi_getReceiveSrc(qspiSFR);
300 IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.rxDmaChannelId);
301 IfxSrc_enable(src);
302 }
303 else
304 {
305 if (config->base.txPriority != 0)
306 {
307 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
308 IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
309 IfxSrc_enable(src);
310 }
311
312 if (config->base.rxPriority != 0)
313 {
314 volatile Ifx_SRC_SRCR *src = IfxQspi_getReceiveSrc(qspiSFR);
315 IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
316 IfxSrc_enable(src);
317 }
318
319 if (config->base.erPriority != 0)
320 {
321 volatile Ifx_SRC_SRCR *src = IfxQspi_getErrorSrc(qspiSFR);
322 IfxSrc_init(src, config->base.isrProvider, config->base.erPriority);
323 IfxSrc_enable(src);
324 }
325 }
326 }
327 /* finally switch to slave mode */
328 qspiSFR->GLOBALCON.B.MS = IfxQspi_Mode_slave;
329 IfxQspi_run(qspiSFR);
330 }
331
332
333 void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
334 {
335 const IfxQspi_SpiSlave_Protocol defaultProtocol = {
336 .clockPolarity = SpiIf_ClockPolarity_idleLow,
337 .shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge,
338 .dataHeading = SpiIf_DataHeading_msbFirst,
339 .dataWidth = 8,
340 .parityMode = Ifx_ParityMode_even
341 };
342
343 SpiIf_initConfig(&config->base);
344
345 config->qspi = qspi;
346 config->allowSleepMode = FALSE;
347 config->pauseOnBaudrateSpikeErrors = FALSE,
348 config->pauseRunTransition = IfxQspi_PauseRunTransition_pause;
349 config->txFifoThreshold = IfxQspi_TxFifoInt_1;
350 config->rxFifoThreshold = IfxQspi_RxFifoInt_0;
351 config->txFifoMode = IfxQspi_FifoMode_combinedMove;
352 config->rxFifoMode = IfxQspi_FifoMode_combinedMove;
353 config->pins = NULL_PTR;
354 config->protocol = defaultProtocol;
355
356 config->dma.rxDmaChannelId = IfxDma_ChannelId_none;
357 config->dma.txDmaChannelId = IfxDma_ChannelId_none;
358 config->dma.useDma = FALSE;
359 }
360
361
362 void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
363 {
364 Ifx_DMA *dmaSFR = &MODULE_DMA;
365 IfxDma_ChannelId rxDmaChannelId = qspiHandle->dma.rxDmaChannelId;
366
367 if (IfxDma_getAndClearChannelInterrupt(dmaSFR, rxDmaChannelId))
368 {
369 qspiHandle->onTransfer = FALSE;
370 }
371
372 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, rxDmaChannelId);
373 }
374
375
376 void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
377 {
378 Ifx_DMA *dmaSFR = &MODULE_DMA;
379 IfxDma_ChannelId txDmaChannelId = qspiHandle->dma.txDmaChannelId;
380 // TODO
381 IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, txDmaChannelId);
382 IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
383 }
384
385
386 void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
387 {
388 Ifx_QSPI *qspiSFR = handle->qspi;
389 uint16 errorFlags = IfxQspi_getErrorFlags(qspiSFR);
390 IfxQspi_clearAllEventFlags(qspiSFR);
391 Ifx_DMA *dmaSFR = &MODULE_DMA;
392
393 /* store all the flags in the variable */
394
395 if ((errorFlags & IfxQspi_Error_parity))
396 {
397 handle->errorFlags.parityError = 1;
398 }
399
400 if ((errorFlags & IfxQspi_Error_configuration))
401 {
402 handle->errorFlags.configurationError = 1;
403 }
404
405 if ((errorFlags & IfxQspi_Error_baudrate))
406 {
407 handle->errorFlags.baudrateError = 1;
408 }
409
410 if ((errorFlags & IfxQspi_Error_expectTimeout))
411 {
412 handle->errorFlags.expectTimeoutError = 1;
413 }
414
415 if ((errorFlags & IfxQspi_Error_txfifoOverflow))
416 {
417 handle->errorFlags.txFifoOverflowError = 1;
418 }
419
420 if ((errorFlags & IfxQspi_Error_txfifoUnderflow))
421 {
422 handle->errorFlags.txFifoUnderflowError = 1;
423 }
424
425 if ((errorFlags & IfxQspi_Error_rxfifoOverflow))
426 {
427 handle->errorFlags.rxFifoOverflowError = 1;
428 }
429
430 if ((errorFlags & IfxQspi_Error_rxfifoUnderflow))
431 {
432 handle->errorFlags.rxFifoUnderflowError = 1;
433 }
434
435 if ((errorFlags & IfxQspi_Error_slsiMisplacedInactivation))
436 {
437 handle->errorFlags.slsiMisplacedInactivation = 1;
438 }
439
440 if (errorFlags)
441 {
442 handle->onTransfer = FALSE;
443 }
444
445 if (handle->dma.useDma)
446 {
447 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.rxDmaChannelId);
448 IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.txDmaChannelId);
449 }
450 }
451
452
453 void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
454 {
455 IfxQspi_SpiSlave_read(handle);
456 }
457
458
459 void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
460 {
461 IfxQspi_SpiSlave_write(handle);
462 }
463
464
465 IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle)
466 {
467 Ifx_QSPI *qspiSFR = handle->qspi;
468 SpiIf_Job *job = &handle->rxJob;
469 Ifx_SizeT count = (Ifx_SizeT)IfxQspi_getReceiveFifoLevel(qspiSFR);
470 count = __min(job->remaining, count);
471
472 if (job->data == NULL_PTR)
473 {
474 // no data should be buffered: do dummy reads
475 int i;
476
477 for (i = 0; i < count; ++i)
478 {
479 IfxQspi_readReceiveFifo(qspiSFR);
480 }
481 }
482 else
483 {
484 if (handle->dataWidth <= 8)
485 {
486 IfxQspi_read8(qspiSFR, job->data, count);
487 job->data = &(((uint8 *)job->data)[count]);
488 }
489 else if (handle->dataWidth <= 16)
490 {
491 IfxQspi_read16(qspiSFR, job->data, count);
492 job->data = &(((uint16 *)job->data)[count]);
493 }
494 else
495 {
496 IfxQspi_read32(qspiSFR, job->data, count);
497 job->data = &(((uint32 *)job->data)[count]);
498 }
499 }
500
501 job->remaining = job->remaining - count;
502
503 if (job->remaining == 0)
504 {
505 handle->onTransfer = FALSE;
506 }
507 }
508
509
510 IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle)
511 {
512 SpiIf_Job *job = &handle->txJob;
513
514 if (handle->dma.useDma)
515 {
516 Ifx_DMA *dmaSFR = &MODULE_DMA;
517 SpiIf_Job *jobrx = &handle->rxJob;
518
519 Ifx_QSPI *qspiSFR = handle->qspi;
520 volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
521
522 IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
523 IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
524
525 boolean interruptState = IfxCpu_disableInterrupts();
526 IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, job->remaining);
527
528 if (handle->dataWidth <= 8)
529 {
530 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_8bit);
531 }
532 else if (handle->dataWidth <= 16)
533 {
534 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_16bit);
535 }
536 else
537 {
538 IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
539 }
540
541 if (job->data == NULL_PTR)
542 {
543 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &IfxQspi_SpiSlave_dummyTxValue));
544 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
545 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
546 }
547 else
548 {
549 IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
550 IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
551 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
552 }
553
554 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
555
556 /* Receive config */
557 IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, job->remaining);
558
559 if (handle->dataWidth <= 8)
560 {
561 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_8bit);
562 }
563 else if (handle->dataWidth <= 16)
564 {
565 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_16bit);
566 }
567 else
568 {
569 IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
570 }
571
572 if (jobrx->data == NULL_PTR)
573 {
574 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &IfxQspi_SpiSlave_dummyRxValue));
575 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
576 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
577 }
578 else
579 {
580 IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), jobrx->data));
581 IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
582 IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
583 }
584
585 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
586 IfxQspi_clearAllEventFlags(qspiSFR);
587 src = IfxQspi_getTransmitSrc(qspiSFR);
588 IfxSrc_clearRequest(src);
589 src = IfxQspi_getReceiveSrc(qspiSFR);
590 IfxSrc_clearRequest(src);
591 src = IfxQspi_getErrorSrc(qspiSFR);
592 IfxSrc_clearRequest(src);
593
594 IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
595 IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
596 IfxDma_setChannelInterruptServiceRequest(dmaSFR, txDmaChannelId);
597 IfxDma_setChannelInterruptServiceRequest(dmaSFR, rxDmaChannelId);
598 IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
599 IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
600 IfxDma_startChannelTransaction(dmaSFR, txDmaChannelId);
601
602 IfxCpu_restoreInterrupts(interruptState);
603 }
604 else
605 {
606 IfxQspi_ChannelId cs = IfxQspi_ChannelId_0;
607
608 if (job->remaining > 0)
609 {
610 Ifx_QSPI *qspiSFR = handle->qspi;
611 boolean interruptState = IfxCpu_disableInterrupts();
612 Ifx_SizeT count = (Ifx_SizeT)(IFXQSPI_HWFIFO_DEPTH - 1 - IfxQspi_getTransmitFifoLevel(qspiSFR)); // -1, since BACON allocates one FIFO entry
613 count = __min(job->remaining, count);
614
615 if (count > 0)
616 {
617 job->remaining = job->remaining - count;
618
619 if (job->data == NULL_PTR)
620 {
621 // no data should be sent (only received): send all
622 int i;
623
624 for (i = 0; i < count; ++i)
625 {
626 IfxQspi_writeTransmitFifo(qspiSFR, ~0);
627 }
628 }
629 else
630 {
631 if (handle->dataWidth <= 8)
632 {
633 IfxQspi_write8(qspiSFR, cs, job->data, count);
634 job->data = &(((uint8 *)job->data)[count]);
635 }
636 else if (handle->dataWidth <= 16)
637 {
638 IfxQspi_write16(qspiSFR, cs, job->data, count);
639 job->data = &(((uint16 *)job->data)[count]);
640 }
641 else
642 {
643 IfxQspi_write32(qspiSFR, cs, job->data, count);
644 job->data = &(((uint32 *)job->data)[count]);
645 }
646 }
647 }
648
649 IfxCpu_restoreInterrupts(interruptState);
650 }
651 }
652 }
IfxQspi_SpiSlave_Pins::mrstMode
IfxPort_OutputMode mrstMode
The MRST pin output mode.
Definition: IfxQspi_SpiSlave.h:342
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:79
IfxQspi_SpiSlave_Protocol::dataHeading
SpiIf_DataHeading dataHeading
Specifies MSB or LSB first.
Definition: IfxQspi_SpiSlave.h:354
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:63
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxQspi_Error_txfifoOverflow
TX FIFO Overflow Error.
Definition: IfxQspi.h:110
IfxQspi_SpiSlave_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiSlave.h:381
IfxQspi_SpiSlave_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:327
IfxQspi_initMtsrInPinWithPadLevel
IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1260
IfxQspi_SpiSlave_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:387
IfxQspi_SpiSlave_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiSlave.h:384
IfxDma_Dma_ChannelConfig::moveSize
IfxDma_ChannelMoveSize moveSize
Read/write data size.
Definition: IfxDma_Dma.h:476
IfxQspi_Error_rxfifoUnderflow
RX FIFO Underflow Error.
Definition: IfxQspi.h:113
IfxDma_Dma_ChannelConfig::sourceAddressCircularRange
IfxDma_ChannelIncrementCircular sourceAddressCircularRange
Determines which part of the source address remains unchanged and therby not updated after each move...
Definition: IfxDma_Dma.h:483
IfxDma_Dma_ChannelConfig::channelId
IfxDma_ChannelId channelId
Specifies the channel being used.
Definition: IfxDma_Dma.h:466
IfxQspi_read8
void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
Reads 8bit data from the Rx FIFO.
Definition: IfxQspi.c:318
IfxQspi_SpiSlave_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiSlave.h:385
IfxQspi_Error_baudrate
BaudRate Error.
Definition: IfxQspi.h:109
IfxQspi_SpiSlave_Pins::sclkMode
IfxPort_InputMode sclkMode
The SCLK pin input mode.
Definition: IfxQspi_SpiSlave.h:338
IfxQspi_read16
void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
Reads 16bit data from the Rx FIFO.
Definition: IfxQspi.c:294
IfxQspi_ExpectTimeout_2097152
Expect phse time out 2097152.
Definition: IfxQspi.h:137
IFXQSPI_HWFIFO_DEPTH
#define IFXQSPI_HWFIFO_DEPTH
Definition: IfxQspi_cfg.h:48
SpiIf_ChConfig_
Definition: SpiIf.h:208
IfxQspi_Error_parity
Parity Error.
Definition: IfxQspi.h:107
IfxQspi_getErrorFlags
IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
Definition: IfxQspi.h:940
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxDma_setChannelSourceAddress
IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
Configure the source address.
Definition: IfxDma.h:1625
IfxQspi_SpiSlave_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiSlave.h:345
IfxQspi_TxFifoInt_1
TxFifo Interrupt Threshold #1.
Definition: IfxQspi.h:256
IfxDma_Dma_initChannelConfig
void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
initialize the DMA module channel configuration
Definition: IfxDma_Dma.c:159
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:55
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:135
IfxDma_ChannelMoveSize_16bit
1 DMA move is 16 bit wide
Definition: IfxDma.h:158
IfxQspi_SpiSlave_getStatus
SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
Gets the transmission status.
Definition: IfxQspi_SpiSlave.c:94
IfxQspi_SpiSlave_initModule
void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module.
Definition: IfxQspi_SpiSlave.c:107
IfxDma_ChannelMoveSize_8bit
1 DMA move is 8 bit wide
Definition: IfxDma.h:157
IfxDma_Dma_ChannelConfig::sourceAddress
uint32 sourceAddress
Source address for the DMA channel.
Definition: IfxDma_Dma.h:467
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:137
IfxQspi_SpiSlave_Config::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiSlave.h:382
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxQspi_write16
void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
Writes 16bit data into the Tx FIFO.
Definition: IfxQspi.c:393
IfxQspi_Error_rxfifoOverflow
RX FIFO Overflow Error.
Definition: IfxQspi.h:112
Ifx_ParityMode_even
Definition: Ifx_Types.h:104
IfxDma_Dma_ChannelConfig::blockMode
IfxDma_ChannelMove blockMode
Number of moves in a transfer.
Definition: IfxDma_Dma.h:473
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxDma_setChannelDestinationIncrementStep
IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel destination pointer.
Definition: IfxDma.h:1572
IfxDma_Dma_ChannelConfig::sourceCircularBufferEnabled
boolean sourceCircularBufferEnabled
Enables/Disables the source circular buffering.
Definition: IfxDma_Dma.h:488
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxQspi_writeBasicConfigurationBeginStream
IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
Write configuration into BACON register with .LAST flag set to 0.
Definition: IfxQspi.h:1190
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxDma_enableChannelTransaction
IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Enable a DMA channel hardware transaction request.
Definition: IfxDma.h:1320
IfxDma_startChannelTransaction
IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Request a DMA channel transaction.
Definition: IfxDma.h:1663
IfxDma_Dma_ChannelConfig::destinationCircularBufferEnabled
boolean destinationCircularBufferEnabled
Enables/Disables the destination circular buffering.
Definition: IfxDma_Dma.h:489
IfxQspi_SpiSlave_Pins::slsiMode
IfxPort_InputMode slsiMode
The SLSI pin input mode.
Definition: IfxQspi_SpiSlave.h:344
IfxQspi_FifoMode_combinedMove
Combined Move Mode.
Definition: IfxQspi.h:268
IfxQspi_SpiSlave_exchange
SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiSlave.c:73
IfxDma_Dma_ChannelConfig::hardwareRequestEnabled
boolean hardwareRequestEnabled
Enabling channel transaction via hardware request.
Definition: IfxDma_Dma.h:480
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
IfxDma_setChannelSourceIncrementStep
IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
Configure a DMA channel source pointer.
Definition: IfxDma.h:1631
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxQspi_SpiSlave_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:325
IfxQspi_run
IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
Request for QSPI in Run state.
Definition: IfxQspi.h:1108
IfxQspi_setSleepMode
IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
Sets the disable module request.
Definition: IfxQspi.h:1159
IfxQspi_calculateExtendedConfigurationValue
uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
Function to calculate ECON register values.
Definition: IfxQspi.c:77
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxQspi_SpiSlave_isrDmaReceive
void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler.
Definition: IfxQspi_SpiSlave.c:362
IfxDma_getAndClearChannelInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Return and clear a channel transfer interrupt flag The flag is automatically cleared with the call to...
Definition: IfxDma.h:1358
IfxQspi_SpiSlave_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiSlave.h:304
IfxQspi_SpiSlave_isrError
void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiSlave.c:386
IfxQspi_setEnableModuleRequest
IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
Sets the enable module request.
Definition: IfxQspi.h:1141
IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure.
Definition: IfxQspi_SpiSlave.h:335
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxQspi_calculateBasicConfigurationValue
uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
Function to calculate BACON register values.
Definition: IfxQspi.c:48
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1096
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:73
IfxDma_getSrcPointer
IFX_INLINE volatile Ifx_SRC_SRCR * IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns the SRC pointer for given DMA channel.
Definition: IfxDma.h:1510
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxQspi_SpiSlave_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiSlave.h:303
IfxQspi_SpiSlave
Module handle data structure.
Definition: IfxQspi_SpiSlave.h:365
IfxQspi_SpiSlave_Config::dma
IfxQspi_SpiSlave_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiSlave.h:390
IfxQspi_SpiSlave_isrTransmit
void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:459
SpiIf_Status_ok
Definition: SpiIf.h:51
IfxQspi_SpiSlave_dummyRxValue
IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue
dummy variable where recived data is placed
Definition: IfxQspi_SpiSlave.c:61
IfxQspi_ChannelId
IfxQspi_ChannelId
QSPI channel Number (BACON.CS)
Definition: IfxQspi.h:75
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:156
IfxQspi_PauseRunTransition_pause
Request value for pause.
Definition: IfxQspi.h:153
IfxQspi_getTransmitSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
Gets the TXFIFO service request.
Definition: IfxQspi.h:1004
IfxQspi_SpiSlave_Pins::sclk
IFX_CONST IfxQspi_Sclk_In * sclk
Pointer to SLCK in pin.
Definition: IfxQspi_SpiSlave.h:337
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:47
IfxQspi_RxFifoInt_0
RxFifo Interrupt Threshold #0.
Definition: IfxQspi.h:199
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
IfxDma_ChannelMove_1
1 DMA move per DMA transfer
Definition: IfxDma.h:142
IfxDma_ChannelMoveSize_32bit
1 DMA move is 32 bit wide
Definition: IfxDma.h:159
IfxDma_Dma_ChannelConfig::transferCount
uint16 transferCount
Number of transfers in a transaction.
Definition: IfxDma_Dma.h:472
IfxQspi_SpiSlave_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the receive FIFO mode.
Definition: IfxQspi_SpiSlave.h:392
IfxQspi_SpiSlave_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiSlave.h:302
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxQspi_SpiSlave_Config::protocol
IfxQspi_SpiSlave_Protocol protocol
Definition: IfxQspi_SpiSlave.h:389
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
IfxQspi_getReceiveFifoLevel
IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of RXFIFO.
Definition: IfxQspi.h:973
IfxDma_ChannelIncrementStep_1
increment by 1 width
Definition: IfxDma.h:118
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:40
IFXCPU_GLB_ADDR_DSPR
#define IFXCPU_GLB_ADDR_DSPR(cpu, address)
Convert local DSPR address to global DSPR address which can be accessed from the SRI bus...
Definition: IfxCpu.h:73
IfxQspi_write32
void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
Writes 32bit data into the Tx FIFO.
Definition: IfxQspi.c:406
IfxQspi_Error_txfifoUnderflow
TX FIFO Underflow Error.
Definition: IfxQspi.h:111
IfxQspi_SpiSlave_Config::pins
IFX_CONST IfxQspi_SpiSlave_Pins * pins
structure for QSPI Slave pins
Definition: IfxQspi_SpiSlave.h:388
IfxQspi_SpiSlave_Protocol::dataWidth
uint8 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: IfxQspi_SpiSlave.h:355
IfxQspi_SpiSlave.h
QSPI SPISLAVE details.
IfxDma_ChannelRequestMode_oneTransferPerRequest
a request initiates a single transfer
Definition: IfxDma.h:203
IfxQspi_getReceiveSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
Gets the RXFIFO service request.
Definition: IfxQspi.h:979
IfxDma_ChannelIncrementCircular_4
circular buffer size is 4 byte
Definition: IfxDma.h:88
IfxDma_Dma_createModuleHandle
void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
initializes a DMA module handle based on the current configuration. Can be used in code where it&#39;s en...
Definition: IfxDma_Dma.c:104
SpiIf_Status_busy
Definition: SpiIf.h:52
IfxQspi_SpiSlave::rxJob
SpiIf_Job rxJob
Rx Stream which has been received.
Definition: IfxQspi_SpiSlave.h:370
IfxDma_Dma
DMA base address data structure (Module handle)
Definition: IfxDma_Dma.h:443
IfxQspi_Mode_slave
QSPI in "slave" mode.
Definition: IfxQspi.h:146
IfxQspi_SpiSlave_read
IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle)
Reads data from the Rx FIFO.
Definition: IfxQspi_SpiSlave.c:465
IfxQspi_SpiSlave_write
IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle)
Writes data into the Tx FIFO.
Definition: IfxQspi_SpiSlave.c:510
IfxQspi_SleepMode_disable
Sleep Mode disabled.
Definition: IfxQspi.h:211
IfxQspi_SpiSlave_Config
Module configuration structure.
Definition: IfxQspi_SpiSlave.h:379
IfxQspi_SpiSlave::onTransfer
boolean onTransfer
set to TRUE during ongoing transfer
Definition: IfxQspi_SpiSlave.h:372
IFXQSPI_ERRORENABLEMASK
#define IFXQSPI_ERRORENABLEMASK
Errors enable mask for ERRORENS.
Definition: IfxQspi.h:65
IfxQspi_SpiSlave_dummyTxValue
IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue
dummy value to be transmitted
Definition: IfxQspi_SpiSlave.c:65
IfxDma_ChannelOperationMode_single
channel disabled after transaction
Definition: IfxDma.h:170
IfxDma_getAndClearChannelPatternDetectionInterrupt
IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Returns and clears the pattern detection interrupt flag.
Definition: IfxDma.h:1373
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:27
IfxQspi_SpiSlave_Pins::mrst
IFX_CONST IfxQspi_Mrst_Out * mrst
Pointer to MRST out pin.
Definition: IfxQspi_SpiSlave.h:341
IfxQspi_getErrorSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
Gets the Error request value.
Definition: IfxQspi.h:946
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:148
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:86
IfxDma_setChannelTransferCount
IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
Configure the move count of a DMA channel transaction.
Definition: IfxDma.h:1648
IfxQspi_read32
void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
Reads 32bit data from the Rx FIFO.
Definition: IfxQspi.c:306
IfxQspi_SpiSlave_Protocol::parityMode
Ifx_ParityMode parityMode
Specifies the parity mode.
Definition: IfxQspi_SpiSlave.h:356
IfxQspi_SpiSlave_DmaConfig::useDma
boolean useDma
use Dma for Data transfers
Definition: IfxQspi_SpiSlave.h:315
IfxQspi_SpiSlave_ErrorFlags::slsiMisplacedInactivation
uint16 slsiMisplacedInactivation
[8:8] SLSI misplaced inactivation (slave mode)
Definition: IfxQspi_SpiSlave.h:330
IfxDma_Dma_ChannelConfig::operationMode
IfxDma_ChannelOperationMode operationMode
keep enable/disable the hardware channel request after a transaction
Definition: IfxDma_Dma.h:475
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:107
IfxDma_ChannelIncrementDirection_positive
pointer is incremented
Definition: IfxDma.h:110
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:136
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:230
IfxQspi_calculateTimeQuantumLength
uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
Specifies the function to calculate Time quantum length.
Definition: IfxQspi.c:214
uint16
unsigned short uint16
Definition: Platform_Types.h:109
__min
sint32 __min(sint32, sint32) __attribute__((intrinsic_pseudo(3
IfxQspi_SpiSlave_Pins::slsi
IFX_CONST IfxQspi_Slsi_In * slsi
Pointer to SLSI in pin.
Definition: IfxQspi_SpiSlave.h:343
IfxDma_Dma_ChannelConfig
Configuration data structure of the channel.
Definition: IfxDma_Dma.h:463
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:79
IfxDma_clearChannelInterrupt
IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Clear a channel transfer interrupt flag.
Definition: IfxDma.h:1245
IfxDma_Dma_initChannel
void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
initialize the DMA channel
Definition: IfxDma_Dma.c:124
IfxQspi_SpiSlave::txJob
SpiIf_Job txJob
Tx Stream which should be sent.
Definition: IfxQspi_SpiSlave.h:371
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:149
SpiIf_Job
Definition: SpiIf.h:104
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:146
IfxQspi_SpiSlave_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:326
IfxQspi_SpiSlave_Protocol::shiftClock
SpiIf_ShiftClock shiftClock
Specifies the clock phase.
Definition: IfxQspi_SpiSlave.h:353
IfxQspi_SpiSlave_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiSlave.h:329
IfxQspi_SpiSlave::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiSlave.h:367
IfxDma_setChannelDestinationAddress
IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
Configure the destination address.
Definition: IfxDma.h:1566
IfxQspi_clearAllEventFlags
IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
Clear ALL service requests.
Definition: IfxQspi.h:884
IfxQspi_SpiSlave::errorFlags
IfxQspi_SpiSlave_ErrorFlags errorFlags
Spi Slave Error Flags.
Definition: IfxQspi_SpiSlave.h:374
IfxQspi_SpiSlave_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transfer FIFO mode.
Definition: IfxQspi_SpiSlave.h:391
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1223
IfxQspi_SpiSlave_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiSlave.h:323
IfxDma_setChannelMoveSize
IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
Configure a DMA channel move.
Definition: IfxDma.h:1595
IfxQspi_Mode_master
QSPI in "master" mode.
Definition: IfxQspi.h:144
IfxQspi_SpiSlave_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiSlave.h:322
IfxDma_ChannelId_none
None of the Ifx_DMA Channels.
Definition: IfxDma_cfg.h:87
IfxQspi_initSclkInPinWithPadLevel
IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1268
IfxDma_Dma_ChannelConfig::destinationAddress
uint32 destinationAddress
Destination address for the DMA channel.
Definition: IfxDma_Dma.h:468
IfxQspi_Error_expectTimeout
EXPECT Timeout Error.
Definition: IfxQspi.h:114
IfxQspi_SpiSlave_isrReceive
void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiSlave.c:453
IfxQspi_SpiSlave_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiSlave.h:324
IfxCpu_getCoreId
IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
API to get core id of the CPU of the caller. Caution: Core id of the cpu&#39;s may not be continguous and...
Definition: IfxCpu.h:753
IfxQspi_initMrstOutPin
IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
Initializes a MRST output.
Definition: IfxQspi.h:1024
IfxDma_Dma_ChannelConfig::requestMode
IfxDma_ChannelRequestMode requestMode
A service request initiates a single transfer, or the complete transaction.
Definition: IfxDma_Dma.h:474
IfxDma_Dma_ChannelConfig::destinationAddressCircularRange
IfxDma_ChannelIncrementCircular destinationAddressCircularRange
Determines which part of the destination address remains unchanged and therby not updated after each ...
Definition: IfxDma_Dma.h:486
IfxQspi_Error_configuration
Configuration Error.
Definition: IfxQspi.h:108
IfxQspi_SpiSlave_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:386
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxQspi_write8
void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
Writes 8bit data into the Tx FIFO.
Definition: IfxQspi.c:419
IfxDma_setChannelInterruptServiceRequest
IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
Setting of channel interrupt service request by software.
Definition: IfxDma.h:1589
IfxQspi_SpiSlave_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiSlave.h:305
IfxQspi_SpiSlave::dma
IfxQspi_SpiSlave_Dma dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:373
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:49
IfxDma_Dma_ChannelConfig::channelInterruptEnabled
boolean channelInterruptEnabled
The channel transfer interrupt should be triggered. See also channelInterruptControl.
Definition: IfxDma_Dma.h:493
IfxQspi_getTransmitFifoLevel
IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
Gets the filling level of TXFIFO.
Definition: IfxQspi.h:998
IfxQspi_Error_slsiMisplacedInactivation
SLSI misplaced inactivation (slave mode)
Definition: IfxQspi.h:115
IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol.
Definition: IfxQspi_SpiSlave.h:350
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxQspi_SpiSlave_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_In * mtsr
Pointer to MTSR in pin.
Definition: IfxQspi_SpiSlave.h:339
IfxQspi_SpiSlave_Protocol::clockPolarity
SpiIf_ClockPolarity clockPolarity
Specifies the clock polarity.
Definition: IfxQspi_SpiSlave.h:352
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:147
IfxQspi_SleepMode_enable
Sleep Mode enabled.
Definition: IfxQspi.h:210
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxQspi_SpiSlave_isrDmaTransmit
void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:376
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxQspi_SpiSlave_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiSlave.h:383
IfxQspi_SpiSlave_initModuleConfig
void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiSlave.c:333
IfxQspi_initSlsiWithPadLevel
IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
Provides functionality for both setting of SLSI pin direction as input and configuring pad driver...
Definition: IfxQspi.h:1276
IfxQspi_SpiSlave_Pins::mtsrMode
IfxPort_InputMode mtsrMode
The MTSR pin input mode.
Definition: IfxQspi_SpiSlave.h:340
SpiIf_Job::data
void * data
Definition: SpiIf.h:106
IfxDma_ChannelIncrementCircular_none
no circular buffer operation
Definition: IfxDma.h:86
IfxQspi_ChannelId_0
Channel #0.
Definition: IfxQspi.h:77
IfxQspi_SpiSlave_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:328


iLLD_TC26B: IfxQspi_SpiSlave.h Source File

  • Qspi
  • SpiSlave
IfxQspi_SpiSlave.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_SpiSlave.h
3 * \brief QSPI SPISLAVE details
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Qspi_SpiSlave_Usage How to use the SPI Slave Interface driver?
25 * \ingroup IfxLld_Qspi
26 *
27 * The SPI Slave interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
28 *
29 * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
30 * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
31 *
32 * In the following sections it will be described, how to integrate the driver into the application framework.
33 *
34 * \section IfxLld_Qspi_SpiSlave_Preparation Preparation
35 * \subsection IfxLld_Qspi_SpiSlave_Include Include Files
36 *
37 * Include following header file into your C code:
38 * \code
39 * #include <Qspi/SpiSlave/IfxQspi_SpiSlave.h>
40 * \endcode
41 *
42 * \subsection IfxLld_Qspi_SpiSlave_Variables Variables
43 *
44 * Declare QSPI module handle:
45 *
46 * \code
47 * IfxQspi_SpiSlave spi;
48 * \endcode
49 *
50 * In addition, declare global transmit and receive buffers for the data transfers:
51 * \code
52 * #define SPI_BUFFER_SIZE 8
53 * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
54 * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
55 * \endcode
56 *
57 * \subsection IfxLld_Qspi_SpiSlave_Interrupt Interrupt Handler Installation (without dma use)
58 *
59 * See also \ref IfxLld_Cpu_Irq_Usage
60 *
61 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
62 * \code
63 * // priorities are normally defined in Ifx_IntPrioDef.h
64 * #define IFX_INTPRIO_QSPI2_TX 1
65 * #define IFX_INTPRIO_QSPI2_RX 2
66 * #define IFX_INTPRIO_QSPI2_ER 5
67 * \endcode
68 *
69 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
70 * \code
71 * IFX_INTERRUPT(qspi2TxISR, 0, IFX_INTPRIO_QSPI2_TX)
72 * {
73 * IfxQspi_SpiSlave_isrTransmit(&spi);
74 * }
75 *
76 * IFX_INTERRUPT(qspi2RxISR, 0, IFX_INTPRIO_QSPI2_RX)
77 * {
78 * IfxQspi_SpiSlave_isrReceive(&spi);
79 * }
80 *
81 * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
82 * {
83 * IfxQspi_SpiSlave_isrError(&spi);
84 * // Process errors. Eg: parity Error is checked below
85 * if( spi.errorFlags.parityError == 1)
86 * {
87 * // Parity Error
88 * }
89 * }
90 * \endcode
91 *
92 * Finally install the interrupt handlers in your initialisation function:
93 * \code
94 * // install interrupt handlers
95 * IfxCpu_Irq_installInterruptHandler(&qspi2TxISR, IFX_INTPRIO_QSPI2_TX);
96 * IfxCpu_Irq_installInterruptHandler(&qspi2RxISR, IFX_INTPRIO_QSPI2_RX);
97 * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
98 * IfxCpu_enableInterrupts();
99 * \endcode
100 *
101 * \subsection IfxLld_Qspi_SpiSlave_Interrupt_dma Interrupt Handler Installation (with dma use)
102 *
103 * See also \ref IfxLld_Cpu_Irq_Usage
104 *
105 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
106 * \code
107 * // priorities are normally defined in Ifx_IntPrioDef.h
108 * // qspi priorities
109 * #define IFX_INTPRIO_QSPI2_TX 3 // DMA channel 3
110 * #define IFX_INTPRIO_QSPI2_RX 4 // DMA channel 4
111 * #define IFX_INTPRIO_QSPI2_ER 0x31
112 * // dma priorities
113 * #define IFX_INTPRIO_DMA_CH3 12
114 * #define IFX_INTPRIO_DMA_CH4 13
115 * \endcode
116 *
117 * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
118 * \code
119 * IFX_INTERRUPT(qspi2DmaTxISR, 0, IFX_INTPRIO_DMA_CH3)
120 * {
121 * IfxQspi_SpiSlave_isrDmaTransmit(&spi);
122 *
123 * }
124 *
125 * IFX_INTERRUPT(qspi2DmaRxISR, 0, IFX_INTPRIO_DMA_CH4)
126 * {
127 * IfxQspi_SpiSlave_isrDmaReceive(&spi);
128 * }
129 *
130 * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
131 * {
132 * IfxQspi_SpiSlave_isrError(&spi);
133 * // Process errors. Eg: parity Error is checked below
134 * if( spi.errorFlags.parityError == 1)
135 * {
136 * // Parity Error
137 * }
138 *
139 * }
140 * \endcode
141 *
142 * Finally install the interrupt handlers in your initialisation function:
143 * \code
144 * // install interrupt handlers
145 * IfxCpu_Irq_installInterruptHandler(&qspi2DmaTxISR, IFX_INTPRIO_DMA_CH3);
146 * IfxCpu_Irq_installInterruptHandler(&qspi2DmaRxISR, IFX_INTPRIO_DMA_CH4);
147 * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
148 * IfxCpu_enableInterrupts();
149 * \endcode
150 *
151 * \subsection IfxLld_Qspi_SpiSlave_Init Module Initialisation (without dma use)
152 *
153 * The module initialisation can be done in the same function.
154 *
155 * Here an example for slave mode:
156 * \code
157 * // create module config
158 * IfxQspi_SpiSlave_Config spiSlaveConfig;
159 * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
160 *
161 * // set the maximum baudrate
162 * spiSlaveConfig.base.maximumBaudrate = 10000000;
163 *
164 * // ISR priorities and interrupt target
165 * spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
166 * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
167 * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
168 * spiSlaveConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
169 *
170 * // pin configuration
171 * const IfxQspi_SpiSlave_Pins slavePins = {
172 * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
173 * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
174 * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
175 * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
176 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
177 * };
178 * spiSlaveConfig.pins = &slavePins;
179 *
180 * // initialize module
181 * //IfxQspi_Spi spi; // defined globally
182 * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
183 * \endcode
184 *
185 * \subsection IfxLld_Qspi_SpiSlave_Init_dma Module Initialisation (with dma use)
186 *
187 * The module initialisation can be done in the same function.
188 *
189 * Here an example for slave mode:
190 * \code
191 * // create module config
192 * IfxQspi_SpiSlave_Config spiSlaveConfig;
193 * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
194 *
195 * // set the maximum baudrate
196 * spiSlaveConfig.base.maximumBaudrate = 10000000;
197 *
198 * // ISR priorities and interrupt target (with dma usage)
199 * spiSlaveConfig.base.txPriority = IFX_INTPRIO_DMA_CH3;
200 * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_DMA_CH4;
201 * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
202 *
203 * spiSlaveConfig.dma.txDmaChannelId = IfxDma_ChannelId_3;
204 * spiSlaveConfig.dma.rxDmaChannelId = IfxDma_ChannelId_4;
205 * spiSlaveConfig.dma.useDma = 1;
206 *
207 * // pin configuration
208 * const IfxQspi_SpiSlave_Pins slavePins = {
209 * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
210 * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
211 * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
212 * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
213 * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
214 * };
215 * spiSlaveConfig.pins = &slavePins;
216 *
217 * // initialize module
218 * //IfxQspi_Spi spi; // defined globally
219 * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
220 * \endcode
221 *
222 * The QSPI is ready for use now!
223 *
224 *
225 * \section IfxLld_Qspi_SpiSlave_DataTransfers Data Transfers
226 *
227 * In following examples we assume, that following buffers are declared globally:
228 * \code
229 * // declared somewhere globally
230 * #define SPI_BUFFER_SIZE 8
231 * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
232 * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
233 * \endcode
234 *
235 * Sending and Receiving a data stream:
236 * \code
237 * int i = 0;
238 * // wait until transfer of previous data stream is finished
239 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
240 *
241 * // send/receive new stream
242 * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
243 * \endcode
244 *
245 * Send only, discard received data:
246 * \code
247 *
248 * // wait until transfer of previous data stream is finished
249 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
250 *
251 * // send new stream
252 * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
253 * \endcode
254 *
255 * Receive only, send all-1
256 * \code
257 * // wait until transfer of previous data stream is finished
258 * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
259 *
260 * // receive new stream
261 * IfxQspi_SpiSlave_exchange(&spi, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
262 * \endcode
263 *
264 * \defgroup IfxLld_Qspi_SpiSlave SPI Slave Driver
265 * \ingroup IfxLld_Qspi
266 * \defgroup IfxLld_Qspi_SpiSlave_DataStructures Data Structures
267 * \ingroup IfxLld_Qspi_SpiSlave
268 * \defgroup IfxLld_Qspi_SpiSlave_Module Module Functions
269 * \ingroup IfxLld_Qspi_SpiSlave
270 * \defgroup IfxLld_Qspi_SpiSlave_Support Support Functions
271 * \ingroup IfxLld_Qspi_SpiSlave
272 * \defgroup IfxLld_Qspi_SpiSlave_Com Communication
273 * \ingroup IfxLld_Qspi_SpiSlave
274 * \defgroup IfxLld_Qspi_SpiSlave_InterruptFunctions Interrupt Functions
275 * \ingroup IfxLld_Qspi_SpiSlave
276 * \defgroup IfxLld_Qspi_SpiSlave_DirectFifo Direct FIFO Access
277 * \ingroup IfxLld_Qspi_SpiSlave
278 */
279
280 #ifndef IFXQSPI_SPISLAVE_H
281 #define IFXQSPI_SPISLAVE_H 1
282
283 /******************************************************************************/
284 /*----------------------------------Includes----------------------------------*/
285 /******************************************************************************/
286
287 #include "Cpu/Irq/IfxCpu_Irq.h"
288 #include "Dma/Dma/IfxDma_Dma.h"
289 #include "Qspi/Std/IfxQspi.h"
290 #include "Scu/Std/IfxScuWdt.h"
291
292 /******************************************************************************/
293 /*-----------------------------Data Structures--------------------------------*/
294 /******************************************************************************/
295
296 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
297 * \{ */
298 /** \brief Dma handle
299 */
300 typedef struct
301 {
302 IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
303 IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
304 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
305 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
306 boolean useDma; /**< \brief use Dma for Data transfers */
307 } IfxQspi_SpiSlave_Dma;
308
309 /** \brief Dma configuration
310 */
311 typedef struct
312 {
313 IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi receive */
314 IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
315 boolean useDma; /**< \brief use Dma for Data transfers */
316 } IfxQspi_SpiSlave_DmaConfig;
317
318 /** \brief Qspi Slave Mode Error Flags
319 */
320 typedef struct
321 {
322 uint16 parityError : 1; /**< \brief [0:0] Parity Error */
323 uint16 configurationError : 1; /**< \brief [1:1] Configuration Error */
324 uint16 baudrateError : 1; /**< \brief [2:2] baudrate Error */
325 uint16 txFifoOverflowError : 1; /**< \brief [3:3] TxFifo Overflow Error */
326 uint16 txFifoUnderflowError : 1; /**< \brief [4:4] TxFifo underflow Error */
327 uint16 rxFifoOverflowError : 1; /**< \brief [5:5] RxFifo Overflow Error */
328 uint16 rxFifoUnderflowError : 1; /**< \brief [6:6] RxFifo underflow Error */
329 uint16 expectTimeoutError : 1; /**< \brief [7:7] Expect Timeout Error */
330 uint16 slsiMisplacedInactivation : 1; /**< \brief [8:8] SLSI misplaced inactivation (slave mode) */
331 } IfxQspi_SpiSlave_ErrorFlags;
332
333 /** \brief Slave pin IO configuration structure
334 */
335 typedef struct
336 {
337 IFX_CONST IfxQspi_Sclk_In *sclk; /**< \brief Pointer to SLCK in pin */
338 IfxPort_InputMode sclkMode; /**< \brief The SCLK pin input mode */
339 IFX_CONST IfxQspi_Mtsr_In *mtsr; /**< \brief Pointer to MTSR in pin */
340 IfxPort_InputMode mtsrMode; /**< \brief The MTSR pin input mode */
341 IFX_CONST IfxQspi_Mrst_Out *mrst; /**< \brief Pointer to MRST out pin */
342 IfxPort_OutputMode mrstMode; /**< \brief The MRST pin output mode */
343 IFX_CONST IfxQspi_Slsi_In *slsi; /**< \brief Pointer to SLSI in pin */
344 IfxPort_InputMode slsiMode; /**< \brief The SLSI pin input mode */
345 IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
346 } IfxQspi_SpiSlave_Pins;
347
348 /** \brief Configures the SPI Protocol
349 */
350 typedef struct
351 {
352 SpiIf_ClockPolarity clockPolarity; /**< \brief Specifies the clock polarity */
353 SpiIf_ShiftClock shiftClock; /**< \brief Specifies the clock phase */
354 SpiIf_DataHeading dataHeading; /**< \brief Specifies MSB or LSB first */
355 uint8 dataWidth; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
356 Ifx_ParityMode parityMode; /**< \brief Specifies the parity mode */
357 } IfxQspi_SpiSlave_Protocol;
358
359 /** \} */
360
361 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
362 * \{ */
363 /** \brief Module handle data structure
364 */
365 typedef struct
366 {
367 SpiIf base; /**< \brief Module SPI interface handle */
368 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
369 uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
370 SpiIf_Job rxJob; /**< \brief Rx Stream which has been received */
371 SpiIf_Job txJob; /**< \brief Tx Stream which should be sent */
372 boolean onTransfer; /**< \brief set to TRUE during ongoing transfer */
373 IfxQspi_SpiSlave_Dma dma; /**< \brief Dma handle */
374 IfxQspi_SpiSlave_ErrorFlags errorFlags; /**< \brief Spi Slave Error Flags */
375 } IfxQspi_SpiSlave;
376
377 /** \brief Module configuration structure
378 */
379 typedef struct
380 {
381 SpiIf_Config base; /**< \brief SPI interface configuration structure */
382 Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
383 boolean allowSleepMode; /**< \brief Specifies module sleep mode */
384 boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
385 IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
386 IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
387 IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
388 IFX_CONST IfxQspi_SpiSlave_Pins *pins; /**< \brief structure for QSPI Slave pins */
389 IfxQspi_SpiSlave_Protocol protocol;
390 IfxQspi_SpiSlave_DmaConfig dma; /**< \brief Dma configuration */
391 IfxQspi_FifoMode txFifoMode; /**< \brief Specifies the transfer FIFO mode. */
392 IfxQspi_FifoMode rxFifoMode; /**< \brief Specifies the receive FIFO mode */
393 } IfxQspi_SpiSlave_Config;
394
395 /** \} */
396
397 /** \addtogroup IfxLld_Qspi_SpiSlave_Module
398 * \{ */
399
400 /******************************************************************************/
401 /*-------------------------Global Function Prototypes-------------------------*/
402 /******************************************************************************/
403
404 /** \brief Initialises the module
405 * \param handle Module handle
406 * \param config Predefined configuration structure of the module
407 * \return None
408 *
409 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
410 *
411 */
412 IFX_EXTERN void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config);
413
414 /** \brief Fills the config structure with default values
415 * \param config Configuration structure which should be initialized.
416 * \param qspi pointer to QSPI registers
417 * \return None
418 *
419 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
420 *
421 */
422 IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi);
423
424 /** \} */
425
426 /** \addtogroup IfxLld_Qspi_SpiSlave_Com
427 * \{ */
428
429 /******************************************************************************/
430 /*-------------------------Global Function Prototypes-------------------------*/
431 /******************************************************************************/
432
433 /** \brief Exchanges data between source and data
434 * \param handle Module handle
435 * \param src Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
436 * \param dest Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
437 * \param count Number of data in pending
438 * \return Status of exchange of data
439 *
440 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
441 *
442 */
443 IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count);
444
445 /** \brief Gets the transmission status
446 * \param handle Module handle
447 * \return Transmission status
448 *
449 * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
450 *
451 */
452 IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle);
453
454 /** \} */
455
456 /** \addtogroup IfxLld_Qspi_SpiSlave_InterruptFunctions
457 * \{ */
458
459 /******************************************************************************/
460 /*-------------------------Global Function Prototypes-------------------------*/
461 /******************************************************************************/
462
463 /** \brief Dma receive interrupt handler
464 * \param qspiHandle Module handle
465 * \return None
466 */
467 IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle);
468
469 /** \brief Transmit interrupt handler
470 * \param qspiHandle Module handle
471 * \return None
472 */
473 IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle);
474
475 /** \brief Error Interrupt handler
476 * \param handle Module handle
477 * \return None
478 */
479 IFX_EXTERN void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle);
480
481 /** \brief Receive Interrupt handler
482 * \param handle Module handle
483 * \return None
484 */
485 IFX_EXTERN void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle);
486
487 /** \brief Transmit interrupt handler
488 * \param handle Module handle
489 * \return None
490 */
491 IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle);
492
493 /** \} */
494
495 /** \addtogroup IfxLld_Qspi_SpiSlave_DirectFifo
496 * \{ */
497
498 /******************************************************************************/
499 /*-------------------------Inline Function Prototypes-------------------------*/
500 /******************************************************************************/
501
502 /** \brief Reads data or status in RxFIFO
503 * \param handle QSpi Slave handle
504 * \return Data or Status in RxFIFO
505 */
506 IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle);
507
508 /** \brief Writes the data to TxFIFO
509 * \param handle QSpi slave handle
510 * \param data Data to be entered in Tx FIFO
511 * \return None
512 */
513 IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data);
514
515 /** \} */
516
517 /******************************************************************************/
518 /*---------------------Inline Function Implementations------------------------*/
519 /******************************************************************************/
520
521 IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle)
522 {
523 Ifx_QSPI *qspiSFR = handle->qspi;
524 uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
525 return data;
526 }
527
528
529 IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data)
530 {
531 IfxQspi_writeTransmitFifo(handle->qspi, data);
532 }
533
534
535 #endif /* IFXQSPI_SPISLAVE_H */
IfxQspi_SpiSlave_Pins::mrstMode
IfxPort_OutputMode mrstMode
The MRST pin output mode.
Definition: IfxQspi_SpiSlave.h:342
IfxQspi_Mrst_Out
MRST pin mapping structure.
Definition: IfxQspi_PinMap.h:79
IfxQspi_SpiSlave_Protocol::dataHeading
SpiIf_DataHeading dataHeading
Specifies MSB or LSB first.
Definition: IfxQspi_SpiSlave.h:354
IfxQspi_Slsi_In
SLSI pin mapping structure.
Definition: IfxQspi_PinMap.h:63
IfxDma_ChannelId
IfxDma_ChannelId
DMA channel resources definition.
Definition: IfxDma_cfg.h:85
IfxQspi_SpiSlave_Config::base
SpiIf_Config base
SPI interface configuration structure.
Definition: IfxQspi_SpiSlave.h:381
IfxQspi_SpiSlave_ErrorFlags::rxFifoOverflowError
uint16 rxFifoOverflowError
[5:5] RxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:327
IfxQspi_SpiSlave_Config::rxFifoThreshold
IfxQspi_RxFifoInt rxFifoThreshold
Specifies the RXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:387
IfxQspi_SpiSlave_Config::pauseOnBaudrateSpikeErrors
boolean pauseOnBaudrateSpikeErrors
Specifies module pause on baudrate or spike errors.
Definition: IfxQspi_SpiSlave.h:384
SpiIf_DataHeading
SpiIf_DataHeading
Heading.
Definition: SpiIf.h:70
IfxQspi_SpiSlave_Config::pauseRunTransition
IfxQspi_PauseRunTransition pauseRunTransition
Specifies module run or pause mode.
Definition: IfxQspi_SpiSlave.h:385
IfxQspi_SpiSlave_Pins::sclkMode
IfxPort_InputMode sclkMode
The SCLK pin input mode.
Definition: IfxQspi_SpiSlave.h:338
IfxQspi_SpiSlave_Pins::pinDriver
IfxPort_PadDriver pinDriver
The pad driver mode which should be configured.
Definition: IfxQspi_SpiSlave.h:345
IfxQspi_SpiSlave_Dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:300
IfxQspi_Sclk_In
SCLK pin mapping structure.
Definition: IfxQspi_PinMap.h:55
SpiIf_Config
Definition: SpiIf.h:143
IfxQspi_SpiSlave_getStatus
IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
Gets the transmission status.
Definition: IfxQspi_SpiSlave.c:94
IfxQspi_SpiSlave_initModule
IFX_EXTERN void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
Initialises the module.
Definition: IfxQspi_SpiSlave.c:107
IfxDma_Dma.h
DMA DMA details.
IfxQspi_SpiSlave::qspi
Ifx_QSPI * qspi
Pointer to QSPI module registers.
Definition: IfxQspi_SpiSlave.h:368
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxQspi_FifoMode
IfxQspi_FifoMode
Transmit FIFO mode.
Definition: IfxQspi.h:266
IfxQspi_SpiSlave_Pins::slsiMode
IfxPort_InputMode slsiMode
The SLSI pin input mode.
Definition: IfxQspi_SpiSlave.h:344
IfxQspi_SpiSlave_exchange
IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
Exchanges data between source and data.
Definition: IfxQspi_SpiSlave.c:73
SpiIf_
Definition: SpiIf.h:133
IfxQspi_SpiSlave_ErrorFlags::txFifoOverflowError
uint16 txFifoOverflowError
[3:3] TxFifo Overflow Error
Definition: IfxQspi_SpiSlave.h:325
IfxQspi_SpiSlave_isrDmaReceive
IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
Dma receive interrupt handler.
Definition: IfxQspi_SpiSlave.c:362
SpiIf_ShiftClock
SpiIf_ShiftClock
Clock phase.
Definition: SpiIf.h:77
IfxQspi_SpiSlave_Dma::rxDmaChannelId
IfxDma_ChannelId rxDmaChannelId
DMA channel no for the Spi recieve.
Definition: IfxQspi_SpiSlave.h:304
IfxScuWdt.h
SCU basic functionality.
IfxQspi_SpiSlave_isrError
IFX_EXTERN void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
Error Interrupt handler.
Definition: IfxQspi_SpiSlave.c:386
IfxQspi_SpiSlave_Pins
Slave pin IO configuration structure.
Definition: IfxQspi_SpiSlave.h:335
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxQspi_readReceiveFifo
IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
Read the oldest data from RXFIFO.
Definition: IfxQspi.h:1096
IfxQspi_SpiSlave_Dma::txDmaChannel
IfxDma_Dma_Channel txDmaChannel
transmit DMA channel handle
Definition: IfxQspi_SpiSlave.h:303
IfxQspi_SpiSlave
Module handle data structure.
Definition: IfxQspi_SpiSlave.h:365
IfxQspi_SpiSlave_Config::dma
IfxQspi_SpiSlave_DmaConfig dma
Dma configuration.
Definition: IfxQspi_SpiSlave.h:390
IfxQspi_SpiSlave_isrTransmit
IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:459
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxQspi_SpiSlave_Pins::sclk
IFX_CONST IfxQspi_Sclk_In * sclk
Pointer to SLCK in pin.
Definition: IfxQspi_SpiSlave.h:337
IfxQspi_Mtsr_In
MTSR pin mapping structure.
Definition: IfxQspi_PinMap.h:47
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxQspi_PauseRunTransition
IfxQspi_PauseRunTransition
Request between pause and Run transition.
Definition: IfxQspi.h:151
IfxQspi_RxFifoInt
IfxQspi_RxFifoInt
Receive Fifo Interrupt Threshold.
Definition: IfxQspi.h:197
IfxQspi_TxFifoInt
IfxQspi_TxFifoInt
Transmit Fifo Interrupt Threshold.
Definition: IfxQspi.h:254
IfxQspi_SpiSlave_Config::rxFifoMode
IfxQspi_FifoMode rxFifoMode
Specifies the receive FIFO mode.
Definition: IfxQspi_SpiSlave.h:392
IfxQspi_SpiSlave_Dma::rxDmaChannel
IfxDma_Dma_Channel rxDmaChannel
receive DMA channel handle
Definition: IfxQspi_SpiSlave.h:302
IfxQspi_SpiSlave_Config::protocol
IfxQspi_SpiSlave_Protocol protocol
Definition: IfxQspi_SpiSlave.h:389
SpiIf_ClockPolarity
SpiIf_ClockPolarity
Clock polarity.
Definition: SpiIf.h:84
IfxQspi_SpiSlave_Config::pins
IFX_CONST IfxQspi_SpiSlave_Pins * pins
structure for QSPI Slave pins
Definition: IfxQspi_SpiSlave.h:388
IfxQspi_SpiSlave_Protocol::dataWidth
uint8 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: IfxQspi_SpiSlave.h:355
IfxQspi_SpiSlave::rxJob
SpiIf_Job rxJob
Rx Stream which has been received.
Definition: IfxQspi_SpiSlave.h:370
IfxQspi_SpiSlave_Config
Module configuration structure.
Definition: IfxQspi_SpiSlave.h:379
IfxQspi_SpiSlave::onTransfer
boolean onTransfer
set to TRUE during ongoing transfer
Definition: IfxQspi_SpiSlave.h:372
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxQspi_SpiSlave_Pins::mrst
IFX_CONST IfxQspi_Mrst_Out * mrst
Pointer to MRST out pin.
Definition: IfxQspi_SpiSlave.h:341
IfxQspi_SpiSlave_DmaConfig
Dma configuration.
Definition: IfxQspi_SpiSlave.h:311
IfxQspi_SpiSlave_writeTransmitFifo
IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data)
Writes the data to TxFIFO.
Definition: IfxQspi_SpiSlave.h:529
IfxQspi_SpiSlave_Protocol::parityMode
Ifx_ParityMode parityMode
Specifies the parity mode.
Definition: IfxQspi_SpiSlave.h:356
IfxQspi_SpiSlave_Dma::useDma
boolean useDma
use Dma for Data transfers
Definition: IfxQspi_SpiSlave.h:306
IfxQspi_SpiSlave_ErrorFlags::slsiMisplacedInactivation
uint16 slsiMisplacedInactivation
[8:8] SLSI misplaced inactivation (slave mode)
Definition: IfxQspi_SpiSlave.h:330
IfxQspi_SpiSlave_ErrorFlags
Qspi Slave Mode Error Flags.
Definition: IfxQspi_SpiSlave.h:320
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxQspi_SpiSlave_Pins::slsi
IFX_CONST IfxQspi_Slsi_In * slsi
Pointer to SLSI in pin.
Definition: IfxQspi_SpiSlave.h:343
IfxQspi_SpiSlave_readReceiveFifo
IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle)
Reads data or status in RxFIFO.
Definition: IfxQspi_SpiSlave.h:521
IfxQspi_SpiSlave::txJob
SpiIf_Job txJob
Tx Stream which should be sent.
Definition: IfxQspi_SpiSlave.h:371
SpiIf_Job
Definition: SpiIf.h:104
IfxQspi_SpiSlave_ErrorFlags::txFifoUnderflowError
uint16 txFifoUnderflowError
[4:4] TxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:326
IfxQspi_SpiSlave_Protocol::shiftClock
SpiIf_ShiftClock shiftClock
Specifies the clock phase.
Definition: IfxQspi_SpiSlave.h:353
IfxQspi_SpiSlave_ErrorFlags::expectTimeoutError
uint16 expectTimeoutError
[7:7] Expect Timeout Error
Definition: IfxQspi_SpiSlave.h:329
IfxQspi_SpiSlave::base
SpiIf base
Module SPI interface handle.
Definition: IfxQspi_SpiSlave.h:367
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxQspi_SpiSlave::errorFlags
IfxQspi_SpiSlave_ErrorFlags errorFlags
Spi Slave Error Flags.
Definition: IfxQspi_SpiSlave.h:374
IfxQspi_SpiSlave_Config::txFifoMode
IfxQspi_FifoMode txFifoMode
Specifies the transfer FIFO mode.
Definition: IfxQspi_SpiSlave.h:391
IfxQspi_writeTransmitFifo
IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
Write Data into DATAENTRY register.
Definition: IfxQspi.h:1223
IfxQspi_SpiSlave_ErrorFlags::configurationError
uint16 configurationError
[1:1] Configuration Error
Definition: IfxQspi_SpiSlave.h:323
IfxQspi_SpiSlave_ErrorFlags::parityError
uint16 parityError
[0:0] Parity Error
Definition: IfxQspi_SpiSlave.h:322
IfxQspi_SpiSlave_isrReceive
IFX_EXTERN void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
Receive Interrupt handler.
Definition: IfxQspi_SpiSlave.c:453
IfxQspi_SpiSlave_ErrorFlags::baudrateError
uint16 baudrateError
[2:2] baudrate Error
Definition: IfxQspi_SpiSlave.h:324
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxQspi_SpiSlave_Config::txFifoThreshold
IfxQspi_TxFifoInt txFifoThreshold
Specifies the TXFIFO interrupt threshold.
Definition: IfxQspi_SpiSlave.h:386
IfxQspi.h
QSPI basic functionality.
IfxQspi_SpiSlave_Dma::txDmaChannelId
IfxDma_ChannelId txDmaChannelId
DMA channel no for the Spi transmit.
Definition: IfxQspi_SpiSlave.h:305
IfxQspi_SpiSlave::dma
IfxQspi_SpiSlave_Dma dma
Dma handle.
Definition: IfxQspi_SpiSlave.h:373
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:49
IfxQspi_SpiSlave_Protocol
Configures the SPI Protocol.
Definition: IfxQspi_SpiSlave.h:350
IfxQspi_SpiSlave_Pins::mtsr
IFX_CONST IfxQspi_Mtsr_In * mtsr
Pointer to MTSR in pin.
Definition: IfxQspi_SpiSlave.h:339
IfxDma_Dma_Channel
Channel handle.
Definition: IfxDma_Dma.h:454
IfxQspi_SpiSlave_Protocol::clockPolarity
SpiIf_ClockPolarity clockPolarity
Specifies the clock polarity.
Definition: IfxQspi_SpiSlave.h:352
uint8
unsigned char uint8
Definition: Platform_Types.h:105
Ifx_ParityMode
Ifx_ParityMode
Definition: Ifx_Types.h:102
IfxQspi_SpiSlave_isrDmaTransmit
IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
Transmit interrupt handler.
Definition: IfxQspi_SpiSlave.c:376
IfxQspi_SpiSlave_Config::allowSleepMode
boolean allowSleepMode
Specifies module sleep mode.
Definition: IfxQspi_SpiSlave.h:383
IfxQspi_SpiSlave_initModuleConfig
IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
Fills the config structure with default values.
Definition: IfxQspi_SpiSlave.c:333
IfxQspi_SpiSlave_Pins::mtsrMode
IfxPort_InputMode mtsrMode
The MTSR pin input mode.
Definition: IfxQspi_SpiSlave.h:340
IfxQspi_SpiSlave_ErrorFlags::rxFifoUnderflowError
uint16 rxFifoUnderflowError
[6:6] RxFifo underflow Error
Definition: IfxQspi_SpiSlave.h:328


iLLD_TC26B: IfxQspi_cfg.c Source File

  • _Impl
IfxQspi_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_cfg.c
3 * \brief QSPI on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxQspi_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES] = {
36 {&MODULE_QSPI0, IfxQspi_Index_0},
37 {&MODULE_QSPI1, IfxQspi_Index_1},
38 {&MODULE_QSPI2, IfxQspi_Index_2},
39 {&MODULE_QSPI3, IfxQspi_Index_3}
40 };
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:65
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxQspi_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.c:35
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:64
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:66
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:50
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:63
IfxQspi_cfg.h
QSPI on-chip implementation data.
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123


iLLD_TC26B: IfxQspi_cfg.h Source File

  • _Impl
IfxQspi_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxQspi_cfg.h
3 * \brief QSPI on-chip implementation data
4 * \ingroup IfxLld_Qspi
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Qspi QSPI
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Qspi_Impl Implementation
27 * \ingroup IfxLld_Qspi
28 * \defgroup IfxLld_Qspi_Std Standard Driver
29 * \ingroup IfxLld_Qspi
30 * \defgroup IfxLld_Qspi_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Qspi_Impl
32 */
33
34 #ifndef IFXQSPI_CFG_H
35 #define IFXQSPI_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 #include "Cpu/Std/Ifx_Types.h"
42 #include "IfxQspi_reg.h"
43
44 /******************************************************************************/
45 /*-----------------------------------Macros-----------------------------------*/
46 /******************************************************************************/
47
48 #define IFXQSPI_HWFIFO_DEPTH (4)
49
50 #define IFXQSPI_NUM_MODULES (4)
51
52 #define IFXQSPI_NUM_CHANNELS (16)
53
54 /******************************************************************************/
55 /*-------------------------------Enumerations---------------------------------*/
56 /******************************************************************************/
57
58 /** \brief List of the available QSPI resources
59 */
60 typedef enum
61 {
62 IfxQspi_Index_none = -1, /**< \brief Not Selected */
63 IfxQspi_Index_0 = 0, /**< \brief QSPI index 0 */
64 IfxQspi_Index_1, /**< \brief QSPI index 1 */
65 IfxQspi_Index_2, /**< \brief QSPI index 2 */
66 IfxQspi_Index_3 /**< \brief QSPI index 3 */
67 } IfxQspi_Index;
68
69 /******************************************************************************/
70 /*-------------------Global Exported Variables/Constants----------------------*/
71 /******************************************************************************/
72
73 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES];
74
75 #endif /* IFXQSPI_CFG_H */
IfxQspi_Index_2
QSPI index 2.
Definition: IfxQspi_cfg.h:65
IfxQspi_Index
IfxQspi_Index
List of the available QSPI resources.
Definition: IfxQspi_cfg.h:60
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxQspi_Index_none
Not Selected.
Definition: IfxQspi_cfg.h:62
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxQspi_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES]
Definition: IfxQspi_cfg.h:73
IfxQspi_Index_1
QSPI index 1.
Definition: IfxQspi_cfg.h:64
IfxQspi_Index_3
QSPI index 3.
Definition: IfxQspi_cfg.h:66
IFXQSPI_NUM_MODULES
#define IFXQSPI_NUM_MODULES
Definition: IfxQspi_cfg.h:50
IfxQspi_Index_0
QSPI index 0.
Definition: IfxQspi_cfg.h:63
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123


iLLD_TC26B: IfxScu_PinMap.c Source File

  • _PinMap
IfxScu_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxScu_PinMap.c
3 * \brief SCU I/O map
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxScu_PinMap.h"
27
28 IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT = {&MODULE_SCU, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6};
29 IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT = {&MODULE_SCU, {&MODULE_P33,13}, IfxPort_OutputIdx_alt6};
30 IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a};
31 IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b};
32 IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN = {&MODULE_SCU, {&MODULE_P14, 1}, Ifx_RxSel_a};
33 IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN = {&MODULE_SCU, {&MODULE_P15, 1}, Ifx_RxSel_b};
34 IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6};
35 IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6};
36 IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6};
37 IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN = {&MODULE_SCU, {&MODULE_P14, 6}};
38 IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN = {&MODULE_SCU, {&MODULE_P14, 5}};
39 IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN = {&MODULE_SCU, {&MODULE_P14, 2}};
40 IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN = {&MODULE_SCU, {&MODULE_P14, 3}};
41 IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN = {&MODULE_SCU, {&MODULE_P10, 5}};
42 IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN = {&MODULE_SCU, {&MODULE_P10, 6}};
43 IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN = {&MODULE_SCU, {&MODULE_P14, 4}};
44 IfxScu_Req_In IfxScu_REQ0_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a};
45 IfxScu_Req_In IfxScu_REQ10_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a};
46 IfxScu_Req_In IfxScu_REQ11_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a};
47 IfxScu_Req_In IfxScu_REQ12_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d};
48 IfxScu_Req_In IfxScu_REQ13_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d};
49 IfxScu_Req_In IfxScu_REQ14_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b};
50 IfxScu_Req_In IfxScu_REQ15_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b};
51 IfxScu_Req_In IfxScu_REQ16_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c};
52 IfxScu_Req_In IfxScu_REQ1_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a};
53 IfxScu_Req_In IfxScu_REQ2_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a};
54 IfxScu_Req_In IfxScu_REQ3_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a};
55 IfxScu_Req_In IfxScu_REQ4_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c};
56 IfxScu_Req_In IfxScu_REQ5_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c};
57 IfxScu_Req_In IfxScu_REQ6_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c};
58 IfxScu_Req_In IfxScu_REQ7_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c};
59 IfxScu_Req_In IfxScu_REQ8_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a};
60 IfxScu_Req_In IfxScu_REQ9_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a};
61 IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT = {&MODULE_SCU, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt6};
62 IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT = {&MODULE_SCU, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt6};
63 IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT = {&MODULE_SCU, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt6};
64
65
66 const IfxScu_Dcdcsync_Out *IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS] = {
67 {
68 &IfxScu_DCDCSYNC_P32_2_OUT,
69 &IfxScu_DCDCSYNC_P33_13_OUT
70 }
71 };
72
73 const IfxScu_Emgstop_In *IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS] = {
74 {
75 &IfxScu_EMGSTOPA_P33_8_IN,
76 &IfxScu_EMGSTOPB_P21_2_IN
77 }
78 };
79
80 const IfxScu_Evrwup_In *IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS] = {
81 {
82 &IfxScu_EVRWUPA_P14_1_IN,
83 &IfxScu_EVRWUPB_P15_1_IN
84 }
85 };
86
87 const IfxScu_Extclk_Out *IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS] = {
88 {
89 &IfxScu_EXTCLK1_P11_12_OUT,
90 &IfxScu_EXTCLK0_P23_1_OUT,
91 &IfxScu_EXTCLK1_P32_4_OUT
92 }
93 };
94
95 const IfxScu_Hwcfg_In *IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS] = {
96 {
97 &IfxScu_HWCFG4_P10_5_IN,
98 &IfxScu_HWCFG5_P10_6_IN,
99 &IfxScu_HWCFG2EVR13_P14_2_IN,
100 &IfxScu_HWCFG3_BMI_P14_3_IN,
101 &IfxScu_HWCFG6_P14_4_IN,
102 &IfxScu_HWCFG1EVR33_P14_5_IN,
103 &IfxScu_HWCFG0DCLDO_P14_6_IN
104 }
105 };
106
107 const IfxScu_Req_In *IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS] = {
108 {
109 {
110 &IfxScu_REQ0_P15_4_IN,
111 NULL_PTR,
112 &IfxScu_REQ4_P10_7_IN,
113 NULL_PTR
114 },
115 {
116 &IfxScu_REQ10_P14_3_IN,
117 NULL_PTR,
118 &IfxScu_REQ5_P10_8_IN,
119 NULL_PTR
120 },
121 {
122 &IfxScu_REQ2_P10_2_IN,
123 &IfxScu_REQ14_P02_1_IN,
124 &IfxScu_REQ7_P00_4_IN,
125 NULL_PTR
126 },
127 {
128 &IfxScu_REQ3_P10_3_IN,
129 &IfxScu_REQ15_P14_1_IN,
130 &IfxScu_REQ6_P02_0_IN,
131 NULL_PTR
132 },
133 {
134 &IfxScu_REQ8_P33_7_IN,
135 NULL_PTR,
136 NULL_PTR,
137 &IfxScu_REQ13_P15_5_IN
138 },
139 {
140 &IfxScu_REQ1_P15_8_IN,
141 NULL_PTR,
142 NULL_PTR,
143 NULL_PTR
144 },
145 {
146 &IfxScu_REQ9_P20_0_IN,
147 NULL_PTR,
148 NULL_PTR,
149 &IfxScu_REQ12_P11_10_IN
150 },
151 {
152 &IfxScu_REQ11_P20_9_IN,
153 NULL_PTR,
154 &IfxScu_REQ16_P15_1_IN,
155 NULL_PTR
156 }
157 }
158 };
159
160 const IfxScu_Wdtlck_Out *IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS] = {
161 {
162 &IfxScu_WDT1LCK_P20_7_OUT,
163 &IfxScu_WDT0LCK_P20_8_OUT,
164 &IfxScu_WDTSLCK_P20_9_OUT
165 }
166 };
IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:136
IfxScu_Extclk_Out
External Clock pin mapping structure.
Definition: IfxScu_PinMap.h:87
IFXSCU_PINMAP_NUM_MODULES
#define IFXSCU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxScu_PinMap.h:132
IfxScu_EXTCLK1_P32_4_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
Definition: IfxScu_PinMap.c:36
IfxScu_WDT0LCK_P20_8_OUT
IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
Definition: IfxScu_PinMap.c:61
IfxScu_REQ8_P33_7_IN
IfxScu_Req_In IfxScu_REQ8_P33_7_IN
Definition: IfxScu_PinMap.c:59
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxScu_DCDCSYNC_P33_13_OUT
IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
Definition: IfxScu_PinMap.c:29
IfxScu_Emgstop_In
Emergency Stop pin mapping structure.
Definition: IfxScu_PinMap.h:71
IfxScu_REQ7_P00_4_IN
IfxScu_Req_In IfxScu_REQ7_P00_4_IN
Definition: IfxScu_PinMap.c:58
IfxScu_WDTSLCK_P20_9_OUT
IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
Definition: IfxScu_PinMap.c:63
IfxScu_REQ9_P20_0_IN
IfxScu_Req_In IfxScu_REQ9_P20_0_IN
Definition: IfxScu_PinMap.c:60
IfxScu_HWCFG0DCLDO_P14_6_IN
IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
Definition: IfxScu_PinMap.c:37
IfxScu_PinMap.h
SCU I/O map.
IfxScu_HWCFG6_P14_4_IN
IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
Definition: IfxScu_PinMap.c:43
IfxScu_REQ6_P02_0_IN
IfxScu_Req_In IfxScu_REQ6_P02_0_IN
Definition: IfxScu_PinMap.c:57
IfxScu_HWCFG4_P10_5_IN
IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
Definition: IfxScu_PinMap.c:41
IfxScu_HWCFG5_P10_6_IN
IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
Definition: IfxScu_PinMap.c:42
IfxScu_REQ4_P10_7_IN
IfxScu_Req_In IfxScu_REQ4_P10_7_IN
Definition: IfxScu_PinMap.c:55
IfxScu_DCDCSYNC_P32_2_OUT
IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
Definition: IfxScu_PinMap.c:28
IfxScu_EVRWUPB_P15_1_IN
IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
Definition: IfxScu_PinMap.c:33
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxScu_EMGSTOPA_P33_8_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
Definition: IfxScu_PinMap.c:30
IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure.
Definition: IfxScu_PinMap.h:63
IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:137
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS
#define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:138
IfxScu_HWCFG2EVR13_P14_2_IN
IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
Definition: IfxScu_PinMap.c:39
IfxScu_REQ15_P14_1_IN
IfxScu_Req_In IfxScu_REQ15_P14_1_IN
Definition: IfxScu_PinMap.c:50
IfxScu_REQ11_P20_9_IN
IfxScu_Req_In IfxScu_REQ11_P20_9_IN
Definition: IfxScu_PinMap.c:46
IfxScu_REQ3_P10_3_IN
IfxScu_Req_In IfxScu_REQ3_P10_3_IN
Definition: IfxScu_PinMap.c:54
IfxScu_Req_In_pinTable
const IfxScu_Req_In * IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:107
IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:140
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxScu_Dcdcsync_Out_pinTable
const IfxScu_Dcdcsync_Out * IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
Definition: IfxScu_PinMap.c:66
IfxScu_REQ2_P10_2_IN
IfxScu_Req_In IfxScu_REQ2_P10_2_IN
Definition: IfxScu_PinMap.c:53
IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:134
IfxScu_Evrwup_In_pinTable
const IfxScu_Evrwup_In * IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:80
IfxScu_EXTCLK1_P11_12_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
Definition: IfxScu_PinMap.c:35
IfxScu_REQ14_P02_1_IN
IfxScu_Req_In IfxScu_REQ14_P02_1_IN
Definition: IfxScu_PinMap.c:49
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxScu_REQ16_P15_1_IN
IfxScu_Req_In IfxScu_REQ16_P15_1_IN
Definition: IfxScu_PinMap.c:51
IfxScu_REQ1_P15_8_IN
IfxScu_Req_In IfxScu_REQ1_P15_8_IN
Definition: IfxScu_PinMap.c:52
IfxScu_Wdtlck_Out_pinTable
const IfxScu_Wdtlck_Out * IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
Definition: IfxScu_PinMap.c:160
IfxScu_HWCFG1EVR33_P14_5_IN
IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
Definition: IfxScu_PinMap.c:38
IfxScu_EVRWUPA_P14_1_IN
IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
Definition: IfxScu_PinMap.c:32
IfxScu_REQ12_P11_10_IN
IfxScu_Req_In IfxScu_REQ12_P11_10_IN
Definition: IfxScu_PinMap.c:47
IfxScu_REQ5_P10_8_IN
IfxScu_Req_In IfxScu_REQ5_P10_8_IN
Definition: IfxScu_PinMap.c:56
IfxScu_Extclk_Out_pinTable
const IfxScu_Extclk_Out * IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
Definition: IfxScu_PinMap.c:87
IfxScu_HWCFG3_BMI_P14_3_IN
IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
Definition: IfxScu_PinMap.c:40
IfxScu_WDT1LCK_P20_7_OUT
IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
Definition: IfxScu_PinMap.c:62
IFXSCU_PINMAP_NUM_REQUESTS
#define IFXSCU_PINMAP_NUM_REQUESTS
Definition: IfxScu_PinMap.h:133
IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure.
Definition: IfxScu_PinMap.h:79
IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:135
IfxScu_EMGSTOPB_P21_2_IN
IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
Definition: IfxScu_PinMap.c:31
IfxScu_Hwcfg_In
Hardware Configuration pin mapping structure.
Definition: IfxScu_PinMap.h:47
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:54
IfxScu_Hwcfg_In_pinTable
const IfxScu_Hwcfg_In * IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:95
IfxScu_REQ10_P14_3_IN
IfxScu_Req_In IfxScu_REQ10_P14_3_IN
Definition: IfxScu_PinMap.c:45
IfxScu_REQ0_P15_4_IN
IfxScu_Req_In IfxScu_REQ0_P15_4_IN
Definition: IfxScu_PinMap.c:44
IfxScu_REQ13_P15_5_IN
IfxScu_Req_In IfxScu_REQ13_P15_5_IN
Definition: IfxScu_PinMap.c:48
IfxScu_Evrwup_In
EVR Wakeup pin mapping structure.
Definition: IfxScu_PinMap.h:39
IfxScu_EXTCLK0_P23_1_OUT
IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
Definition: IfxScu_PinMap.c:34
IfxScu_Emgstop_In_pinTable
const IfxScu_Emgstop_In * IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
Definition: IfxScu_PinMap.c:73
IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:139


iLLD_TC26B: IfxScu_PinMap.h Source File

  • _PinMap
IfxScu_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxScu_PinMap.h
3 * \brief SCU I/O map
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Scu_pinmap SCU Pin Mapping
25 * \ingroup IfxLld_Scu
26 */
27
28 #ifndef IFXSCU_PINMAP_H
29 #define IFXSCU_PINMAP_H
30
31 #include <IfxScu_reg.h>
32 #include <_Impl/IfxScu_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Scu_pinmap
36 * \{ */
37
38 /** \brief EVR Wakeup pin mapping structure */
39 typedef const struct
40 {
41 Ifx_SCU* module; /**< \brief Base address */
42 IfxPort_Pin pin; /**< \brief Port pin */
43 Ifx_RxSel select; /**< \brief Input multiplexer value */
44 } IfxScu_Evrwup_In;
45
46 /** \brief Hardware Configuration pin mapping structure */
47 typedef const struct
48 {
49 Ifx_SCU* module; /**< \brief Base address */
50 IfxPort_Pin pin; /**< \brief Port pin */
51 } IfxScu_Hwcfg_In;
52
53 /** \brief External Request pin mapping structure */
54 typedef const struct
55 {
56 Ifx_SCU* module; /**< \brief Base address */
57 uint8 channelId; /**< \brief ERU Channel ID */
58 IfxPort_Pin pin; /**< \brief Port pin */
59 Ifx_RxSel select; /**< \brief Input multiplexer value */
60 } IfxScu_Req_In;
61
62 /** \brief DCDC Sync pin mapping structure */
63 typedef const struct
64 {
65 Ifx_SCU* module; /**< \brief Base address */
66 IfxPort_Pin pin; /**< \brief Port pin */
67 IfxPort_OutputIdx select; /**< \brief Port control code */
68 } IfxScu_Dcdcsync_Out;
69
70 /** \brief Emergency Stop pin mapping structure */
71 typedef const struct
72 {
73 Ifx_SCU* module; /**< \brief Base address */
74 IfxPort_Pin pin; /**< \brief Port pin */
75 Ifx_RxSel select; /**< \brief Input multiplexer value */
76 } IfxScu_Emgstop_In;
77
78 /** \brief Watchdog Timer Lock pin mapping structure */
79 typedef const struct
80 {
81 Ifx_SCU* module; /**< \brief Base address */
82 IfxPort_Pin pin; /**< \brief Port pin */
83 IfxPort_OutputIdx select; /**< \brief Port control code */
84 } IfxScu_Wdtlck_Out;
85
86 /** \brief External Clock pin mapping structure */
87 typedef const struct
88 {
89 Ifx_SCU* module; /**< \brief Base address */
90 IfxPort_Pin pin; /**< \brief Port pin */
91 IfxPort_OutputIdx select; /**< \brief Port control code */
92 } IfxScu_Extclk_Out;
93
94 IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT; /**< \brief SCU_DCDCSYNC: SCU output */
95 IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT; /**< \brief SCU_DCDCSYNC: SCU output */
96 IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN; /**< \brief SCU_EMGSTOPA: SCU input */
97 IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN; /**< \brief SCU_EMGSTOPB: SCU input */
98 IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN; /**< \brief SCU_EVRWUPA: SCU input */
99 IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN; /**< \brief SCU_EVRWUPB: SCU input */
100 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT; /**< \brief SCU_EXTCLK0: SCU output */
101 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT; /**< \brief SCU_EXTCLK1: SCU output */
102 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT; /**< \brief SCU_EXTCLK1: SCU output */
103 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN; /**< \brief SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode. */
104 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN; /**< \brief SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation. */
105 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN; /**< \brief SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation. */
106 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN; /**< \brief SCU_HWCFG3_BMI: SCU input */
107 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN; /**< \brief SCU_HWCFG4: SCU input */
108 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN; /**< \brief SCU_HWCFG5: SCU input */
109 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN; /**< \brief SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z). */
110 IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN; /**< \brief SCU_REQ0: SCU input */
111 IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN; /**< \brief SCU_REQ10: SCU input */
112 IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN; /**< \brief SCU_REQ11: SCU input */
113 IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN; /**< \brief SCU_REQ12: SCU input */
114 IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN; /**< \brief SCU_REQ13: SCU input */
115 IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN; /**< \brief SCU_REQ14: SCU input */
116 IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN; /**< \brief SCU_REQ15: SCU input */
117 IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN; /**< \brief SCU_REQ16: SCU input */
118 IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN; /**< \brief SCU_REQ1: SCU input */
119 IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN; /**< \brief SCU_REQ2: SCU input */
120 IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN; /**< \brief SCU_REQ3: SCU input */
121 IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN; /**< \brief SCU_REQ4: SCU input */
122 IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN; /**< \brief SCU_REQ5: SCU input */
123 IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN; /**< \brief SCU_REQ6: SCU input */
124 IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN; /**< \brief SCU_REQ7: SCU input */
125 IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN; /**< \brief SCU_REQ8: SCU input */
126 IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN; /**< \brief SCU_REQ9: SCU input */
127 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT; /**< \brief SCU_WDT0LCK: SCU output */
128 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT; /**< \brief SCU_WDT1LCK: SCU output */
129 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT; /**< \brief SCU_WDTSLCK: SCU output */
130
131 /** \brief Table dimensions */
132 #define IFXSCU_PINMAP_NUM_MODULES 1
133 #define IFXSCU_PINMAP_NUM_REQUESTS 8
134 #define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
135 #define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
136 #define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2
137 #define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3
138 #define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7
139 #define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4
140 #define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3
141
142
143 /** \brief IfxScu_Dcdcsync_Out table */
144 IFX_EXTERN const IfxScu_Dcdcsync_Out *IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS];
145
146 /** \brief IfxScu_Emgstop_In table */
147 IFX_EXTERN const IfxScu_Emgstop_In *IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS];
148
149 /** \brief IfxScu_Evrwup_In table */
150 IFX_EXTERN const IfxScu_Evrwup_In *IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS];
151
152 /** \brief IfxScu_Extclk_Out table */
153 IFX_EXTERN const IfxScu_Extclk_Out *IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS];
154
155 /** \brief IfxScu_Hwcfg_In table */
156 IFX_EXTERN const IfxScu_Hwcfg_In *IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS];
157
158 /** \brief IfxScu_Req_In table */
159 IFX_EXTERN const IfxScu_Req_In *IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS];
160
161 /** \brief IfxScu_Wdtlck_Out table */
162 IFX_EXTERN const IfxScu_Wdtlck_Out *IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS];
163
164 /** \} */
165
166 #endif /* IFXSCU_PINMAP_H */
IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:136
IfxScu_Extclk_Out
External Clock pin mapping structure.
Definition: IfxScu_PinMap.h:87
IFXSCU_PINMAP_NUM_MODULES
#define IFXSCU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxScu_PinMap.h:132
IfxScu_HWCFG5_P10_6_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN
SCU_HWCFG5: SCU input.
Definition: IfxScu_PinMap.h:108
IfxScu_EVRWUPA_P14_1_IN
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN
SCU_EVRWUPA: SCU input.
Definition: IfxScu_PinMap.h:98
IfxScu_HWCFG4_P10_5_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN
SCU_HWCFG4: SCU input.
Definition: IfxScu_PinMap.h:107
IfxScu_Emgstop_In
Emergency Stop pin mapping structure.
Definition: IfxScu_PinMap.h:71
IfxScu_REQ1_P15_8_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN
SCU_REQ1: SCU input.
Definition: IfxScu_PinMap.h:118
IfxScu_Req_In::channelId
uint8 channelId
ERU Channel ID.
Definition: IfxScu_PinMap.h:57
IfxScu_REQ2_P10_2_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN
SCU_REQ2: SCU input.
Definition: IfxScu_PinMap.h:119
IfxScu_EXTCLK0_P23_1_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT
SCU_EXTCLK0: SCU output.
Definition: IfxScu_PinMap.h:100
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxScu_REQ7_P00_4_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN
SCU_REQ7: SCU input.
Definition: IfxScu_PinMap.h:124
IfxScu_REQ11_P20_9_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN
SCU_REQ11: SCU input.
Definition: IfxScu_PinMap.h:112
IfxScu_HWCFG2EVR13_P14_2_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN
SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation.
Definition: IfxScu_PinMap.h:105
IfxScu_REQ0_P15_4_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN
SCU_REQ0: SCU input.
Definition: IfxScu_PinMap.h:110
IfxScu_Evrwup_In_pinTable
IFX_EXTERN const IfxScu_Evrwup_In * IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS]
IfxScu_Evrwup_In table.
Definition: IfxScu_PinMap.h:150
IfxScu_Req_In_pinTable
IFX_EXTERN const IfxScu_Req_In * IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS]
IfxScu_Req_In table.
Definition: IfxScu_PinMap.h:159
IfxScu_Evrwup_In::module
Ifx_SCU * module
Base address.
Definition: IfxScu_PinMap.h:41
IfxScu_Wdtlck_Out_pinTable
IFX_EXTERN const IfxScu_Wdtlck_Out * IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS]
IfxScu_Wdtlck_Out table.
Definition: IfxScu_PinMap.h:162
IfxScu_Dcdcsync_Out
DCDC Sync pin mapping structure.
Definition: IfxScu_PinMap.h:63
IfxScu_WDTSLCK_P20_9_OUT
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT
SCU_WDTSLCK: SCU output.
Definition: IfxScu_PinMap.h:129
IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:137
IfxScu_EMGSTOPA_P33_8_IN
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN
SCU_EMGSTOPA: SCU input.
Definition: IfxScu_PinMap.h:96
IfxScu_EVRWUPB_P15_1_IN
IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN
SCU_EVRWUPB: SCU input.
Definition: IfxScu_PinMap.h:99
IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS
#define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:138
IfxScu_HWCFG1EVR33_P14_5_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN
SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation.
Definition: IfxScu_PinMap.h:104
IfxScu_REQ5_P10_8_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN
SCU_REQ5: SCU input.
Definition: IfxScu_PinMap.h:122
IfxScu_REQ15_P14_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN
SCU_REQ15: SCU input.
Definition: IfxScu_PinMap.h:116
IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:140
IfxScu_Dcdcsync_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxScu_PinMap.h:67
IfxScu_REQ9_P20_0_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN
SCU_REQ9: SCU input.
Definition: IfxScu_PinMap.h:126
IfxScu_WDT1LCK_P20_7_OUT
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT
SCU_WDT1LCK: SCU output.
Definition: IfxScu_PinMap.h:128
IfxScu_HWCFG3_BMI_P14_3_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN
SCU_HWCFG3_BMI: SCU input.
Definition: IfxScu_PinMap.h:106
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
#define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS
Definition: IfxScu_PinMap.h:134
IfxScu_REQ13_P15_5_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN
SCU_REQ13: SCU input.
Definition: IfxScu_PinMap.h:114
IfxScu_HWCFG0DCLDO_P14_6_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN
SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and ...
Definition: IfxScu_PinMap.h:103
IfxScu_EMGSTOPB_P21_2_IN
IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN
SCU_EMGSTOPB: SCU input.
Definition: IfxScu_PinMap.h:97
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScu_EXTCLK1_P11_12_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT
SCU_EXTCLK1: SCU output.
Definition: IfxScu_PinMap.h:101
IfxScu_REQ3_P10_3_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN
SCU_REQ3: SCU input.
Definition: IfxScu_PinMap.h:120
IfxScu_REQ4_P10_7_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN
SCU_REQ4: SCU input.
Definition: IfxScu_PinMap.h:121
IfxScu_WDT0LCK_P20_8_OUT
IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT
SCU_WDT0LCK: SCU output.
Definition: IfxScu_PinMap.h:127
IfxScu_REQ12_P11_10_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN
SCU_REQ12: SCU input.
Definition: IfxScu_PinMap.h:113
IfxScu_Extclk_Out_pinTable
IFX_EXTERN const IfxScu_Extclk_Out * IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS]
IfxScu_Extclk_Out table.
Definition: IfxScu_PinMap.h:153
IfxScu_REQ14_P02_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN
SCU_REQ14: SCU input.
Definition: IfxScu_PinMap.h:115
IfxScu_REQ10_P14_3_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN
SCU_REQ10: SCU input.
Definition: IfxScu_PinMap.h:111
IfxScu_EXTCLK1_P32_4_OUT
IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT
SCU_EXTCLK1: SCU output.
Definition: IfxScu_PinMap.h:102
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxScu_Hwcfg_In_pinTable
IFX_EXTERN const IfxScu_Hwcfg_In * IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS]
IfxScu_Hwcfg_In table.
Definition: IfxScu_PinMap.h:156
IFXSCU_PINMAP_NUM_REQUESTS
#define IFXSCU_PINMAP_NUM_REQUESTS
Definition: IfxScu_PinMap.h:133
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxScu_Wdtlck_Out
Watchdog Timer Lock pin mapping structure.
Definition: IfxScu_PinMap.h:79
IfxScu_Evrwup_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxScu_PinMap.h:42
IfxScu_DCDCSYNC_P32_2_OUT
IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT
SCU_DCDCSYNC: SCU output.
Definition: IfxScu_PinMap.h:94
IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:135
IfxScu_Dcdcsync_Out_pinTable
IFX_EXTERN const IfxScu_Dcdcsync_Out * IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS]
IfxScu_Dcdcsync_Out table.
Definition: IfxScu_PinMap.h:144
IfxScu_Hwcfg_In
Hardware Configuration pin mapping structure.
Definition: IfxScu_PinMap.h:47
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:54
IfxScu_DCDCSYNC_P33_13_OUT
IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT
SCU_DCDCSYNC: SCU output.
Definition: IfxScu_PinMap.h:95
IfxScu_HWCFG6_P14_4_IN
IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN
SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z)...
Definition: IfxScu_PinMap.h:109
IfxScu_Evrwup_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxScu_PinMap.h:43
IfxScu_REQ16_P15_1_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN
SCU_REQ16: SCU input.
Definition: IfxScu_PinMap.h:117
IfxScu_REQ8_P33_7_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN
SCU_REQ8: SCU input.
Definition: IfxScu_PinMap.h:125
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxScu_Evrwup_In
EVR Wakeup pin mapping structure.
Definition: IfxScu_PinMap.h:39
IfxScu_REQ6_P02_0_IN
IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN
SCU_REQ6: SCU input.
Definition: IfxScu_PinMap.h:123
IfxScu_Emgstop_In_pinTable
IFX_EXTERN const IfxScu_Emgstop_In * IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS]
IfxScu_Emgstop_In table.
Definition: IfxScu_PinMap.h:147
IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS
Definition: IfxScu_PinMap.h:139
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxScu_cfg.c Source File

  • _Impl
IfxScu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxScu_cfg.c
3 * \brief SCU on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxScu_cfg.h"
IfxScu_cfg.h
SCU on-chip implementation data.


iLLD_TC26B: IfxScu_cfg.h Source File

  • _Impl
IfxScu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxScu_cfg.h
3 * \brief SCU on-chip implementation data
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Scu SCU
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Scu_Impl Implementation
27 * \ingroup IfxLld_Scu
28 * \defgroup IfxLld_Scu_Std Standard Driver
29 * \ingroup IfxLld_Scu
30 */
31
32 #ifndef IFXSCU_CFG_H
33 #define IFXSCU_CFG_H
34 /******************************************************************************/
35 #include "Ifx_Cfg.h"
36 #include "IfxScu_bf.h"
37 #include "IfxFlash_bf.h"
38
39 /******************************************************************************/
40 /* Macro */
41 /******************************************************************************/
42 #ifndef IFX_CFG_SCU_XTAL_FREQUENCY
43 # define IFX_CFG_SCU_XTAL_FREQUENCY 20000000 /**< \brief Default External oscillator frequency */
44 # warning "IFX_CFG_SCU_XTAL_FREQUENCY not specified in your IfxCfg.h file."
45 # warning "Please doublecheck the external XTAL frequency with the default setting of 20 MHz!"
46 #endif
47
48 #ifndef IFX_CFG_SCU_PLL_FREQUENCY
49 # define IFX_CFG_SCU_PLL_FREQUENCY 200000000 /**< \brief Default PLL frequency */
50 #endif
51
52 #define IFXSCU_VCO_BASE_FREQUENCY (100000000.0)
53 #define IFXSCU_EVR_OSC_FREQUENCY (100000000.0)
54
55 /*The following frequency is the PLL free running frequency */
56
57
58 #define IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)
59
60 /******************************************************************************/
61 /** \brief Macros to configure Pll steps,
62 * Macros to configure the Pll steps for different profiles of Crystal frequency and
63 * target frequencies. This configuration is important for the current jump controll
64 * during clock throttling.
65 * \ref IfxScuCcu_PllStepsConfig
66 */
67
68 /******************** Pll step for 16MHz crystal Configurations ********************************/
69 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ
70 /** \brief Macro for Pll step for profile with 16MHz Crystal and 80MHz target */
71 #define IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ \
72 { /*Step 0 Config: 80MHz*/ \
73 (8 - 1), /*uint8 k2Step;*/ \
74 0.000100, /*float32 waitTime;*/ \
75 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
76 },
77 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ */
78
79 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ
80 /** \brief Macro for Pll step for profile with 16MHz Crystal and 133MHz target */
81 #define IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ \
82 { /*Step 0 Config: 114MHz*/ \
83 (7 - 1), /*uint8 k2Step;*/ \
84 0.000100, /*float32 waitTime;*/ \
85 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
86 }, \
87 { /*Step 1 Config: 133MHz*/ \
88 (6 - 1), /*uint8 k2Step;*/ \
89 0.000100, /*float32 waitTime;*/ \
90 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
91 },
92 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ */
93
94 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ
95 /** \brief Macro for Pll step for profile with 16MHz Crystal and 160MHz target */
96 #define IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ \
97 { /*Step 1 Config: 128MHz*/ \
98 (5 - 1), /*uint8 k2Step;*/ \
99 0.000100, /*float32 waitTime;*/ \
100 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
101 }, \
102 { /*Step 2 Config: 160MHz*/ \
103 (4 - 1), /*uint8 k2Step;*/ \
104 0.000100, /*float32 waitTime;*/ \
105 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
106 }
107 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ */
108
109 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ
110 /** \brief Macro for Pll step for profile with 16MHz Crystal and 200MHz target */
111 #define IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ \
112 { /*Step 0 Config: 120MHz*/ \
113 (6 - 1), /*uint8 k2Step;*/ \
114 0.000100, /*float32 waitTime;*/ \
115 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
116 }, \
117 { /*Step 1 Config: 150MHz*/ \
118 (5 - 1), /*uint8 k2Step;*/ \
119 0.000100, /*float32 waitTime;*/ \
120 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
121 }, \
122 { /*Step 2 Config: 200MHz*/ \
123 (4 - 1), /*uint8 k2Step;*/ \
124 0.000100, /*float32 waitTime;*/ \
125 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
126 }
127 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ */
128
129 #ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ
130 /** \brief Macro for Pll step for profile with 16MHz Crystal and 240MHz target */
131 #define IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ \
132 { /*Step 0 Config: 144MHz*/ \
133 (5 - 1), /*uint8 k2Step;*/ \
134 0.000100, /*float32 waitTime;*/ \
135 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
136 }, \
137 { /*Step 1 Config: 180MHz*/ \
138 (4 - 1), /*uint8 k2Step;*/ \
139 0.000100, /*float32 waitTime;*/ \
140 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
141 }, \
142 { /*Step 2 Config: 240MHz*/ \
143 (3 - 1), /*uint8 k2Step;*/ \
144 0.000100, /*float32 waitTime;*/ \
145 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
146 }
147 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ */
148
149 /******************** Pll step 20MHz crystal Configurations ********************************/
150 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ
151 /** \brief Macro for Pll step for profile with 20MHz Crystal and 80MHz target */
152 #define IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ \
153 { /*Step 0 Config: 80MHz*/ \
154 (8 - 1), /*uint8 k2Step;*/ \
155 0.000100, /*float32 waitTime;*/ \
156 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
157 },
158 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ */
159
160 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ
161 /** \brief Macro for Pll step for profile with 20MHz Crystal and 133MHz target */
162 #define IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ \
163 { /*Step 0 Config: 114MHz*/ \
164 (7 - 1), /*uint8 k2Step;*/ \
165 0.000100, /*float32 waitTime;*/ \
166 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
167 }, \
168 { /*Step 1 Config: 133MHz*/ \
169 (6 - 1), /*uint8 k2Step;*/ \
170 0.000100, /*float32 waitTime;*/ \
171 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
172 },
173 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ */
174
175 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ
176 /** \brief Macro for Pll step for profile with 20MHz Crystal and 160MHz target */
177 #define IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ \
178 { /*Step 1 Config: 128MHz*/ \
179 (5 - 1), /*uint8 k2Step;*/ \
180 0.000100, /*float32 waitTime;*/ \
181 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
182 }, \
183 { /*Step 2 Config: 160MHz*/ \
184 (4 - 1), /*uint8 k2Step;*/ \
185 0.000100, /*float32 waitTime;*/ \
186 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
187 }
188 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ */
189
190 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ
191 /** \brief Macro for Pll step for profile with 20MHz Crystal and 200MHz target */
192 #define IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ \
193 { /*Step 0 Config: 120MHz*/ \
194 (5 - 1), /*uint8 k2Step;*/ \
195 0.000100, /*float32 waitTime;*/ \
196 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
197 }, \
198 { /*Step 1 Config: 150MHz*/ \
199 (4 - 1), /*uint8 k2Step;*/ \
200 0.000100, /*float32 waitTime;*/ \
201 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
202 }, \
203 { /*Step 2 Config: 200MHz*/ \
204 (3 - 1), /*uint8 k2Step;*/ \
205 0.000100, /*float32 waitTime;*/ \
206 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
207 }
208 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ */
209
210 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ
211 /** \brief Macro for Pll step for profile with 20MHz Crystal and 240MHz target */
212 #define IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ \
213 { /*Step 0 Config: 144MHz*/ \
214 (5 - 1), /*uint8 k2Step;*/ \
215 0.000100, /*float32 waitTime;*/ \
216 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
217 }, \
218 { /*Step 1 Config: 180MHz*/ \
219 (4 - 1), /*uint8 k2Step;*/ \
220 0.000100, /*float32 waitTime;*/ \
221 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
222 }, \
223 { /*Step 2 Config: 240MHz*/ \
224 (3 - 1), /*uint8 k2Step;*/ \
225 0.000100, /*float32 waitTime;*/ \
226 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
227 }
228 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ */
229
230 #ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ
231 /** \brief Macro for Pll step for profile with 20MHz Crystal and 300MHz target */
232 #define IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ \
233 { /*Step 0 Config: 150MHz*/ \
234 (4 - 1), /*uint8 k2Step;*/ \
235 0.000100, /*float32 waitTime;*/ \
236 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
237 }, \
238 { /*Step 1 Config: 200MHz*/ \
239 (3 - 1), /*uint8 k2Step;*/ \
240 0.000100, /*float32 waitTime;*/ \
241 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
242 }, \
243 { /*Step 2 Config: 300MHz*/ \
244 (2 - 1), /*uint8 k2Step;*/ \
245 0.000100, /*float32 waitTime;*/ \
246 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
247 }
248 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ */
249
250 /******************** Pll step for 40MHz crystal Configurations ********************************/
251 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ
252 /** \brief Macro for Pll step for profile with 40MHz Crystal and 80MHz target */
253 #define IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ \
254 { /*Step 0 Config: 80MHz*/ \
255 (8 - 1), /*uint8 k2Step;*/ \
256 0.000100, /*float32 waitTime;*/ \
257 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
258 },
259 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ */
260
261 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ
262 /** \brief Macro for Pll step for profile with 40MHz Crystal and 133MHz target */
263 #define IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ \
264 { /*Step 0 Config: 114MHz*/ \
265 (7 - 1), /*uint8 k2Step;*/ \
266 0.000100, /*float32 waitTime;*/ \
267 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
268 }, \
269 { /*Step 1 Config: 133MHz*/ \
270 (6 - 1), /*uint8 k2Step;*/ \
271 0.000100, /*float32 waitTime;*/ \
272 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
273 },
274 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ */
275
276 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ
277 /** \brief Macro for Pll step for profile with 40MHz Crystal and 160MHz target */
278 #define IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ \
279 { /*Step 1 Config: 128MHz*/ \
280 (5 - 1), /*uint8 k2Step;*/ \
281 0.000100, /*float32 waitTime;*/ \
282 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
283 }, \
284 { /*Step 2 Config: 160MHz*/ \
285 (4 - 1), /*uint8 k2Step;*/ \
286 0.000100, /*float32 waitTime;*/ \
287 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
288 }
289 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ */
290
291 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ
292 /** \brief Macro for Pll step for profile with 40MHz Crystal and 200MHz target */
293 #define IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ \
294 { /*Step 0 Config: 120MHz*/ \
295 (5 - 1), /*uint8 k2Step;*/ \
296 0.000100, /*float32 waitTime;*/ \
297 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
298 }, \
299 { /*Step 1 Config: 150MHz*/ \
300 (4 - 1), /*uint8 k2Step;*/ \
301 0.000100, /*float32 waitTime;*/ \
302 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
303 }, \
304 { /*Step 2 Config: 200MHz*/ \
305 (3 - 1), /*uint8 k2Step;*/ \
306 0.000100, /*float32 waitTime;*/ \
307 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
308 }
309 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ */
310
311 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ
312 /** \brief Macro for Pll step for profile with 40MHz Crystal and 240MHz target */
313 #define IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ \
314 { /*Step 0 Config: 144MHz*/ \
315 (5 - 1), /*uint8 k2Step;*/ \
316 0.000100, /*float32 waitTime;*/ \
317 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
318 }, \
319 { /*Step 1 Config: 180MHz*/ \
320 (4 - 1), /*uint8 k2Step;*/ \
321 0.000100, /*float32 waitTime;*/ \
322 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
323 }, \
324 { /*Step 2 Config: 240MHz*/ \
325 (3 - 1), /*uint8 k2Step;*/ \
326 0.000100, /*float32 waitTime;*/ \
327 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
328 }
329 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ */
330
331 #ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ
332 /** \brief Macro for Pll step for profile with 40MHz Crystal and 300MHz target */
333 #define IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ \
334 { /*Step 0 Config: 150MHz*/ \
335 (4 - 1), /*uint8 k2Step;*/ \
336 0.000100, /*float32 waitTime;*/ \
337 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
338 }, \
339 { /*Step 1 Config: 200MHz*/ \
340 (3 - 1), /*uint8 k2Step;*/ \
341 0.000100, /*float32 waitTime;*/ \
342 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
343 }, \
344 { /*Step 2 Config: 300MHz*/ \
345 (2 - 1), /*uint8 k2Step;*/ \
346 0.000100, /*float32 waitTime;*/ \
347 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
348 }
349 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ */
350
351 /******************** Pll step for 8MHz crystal Configurations ********************************/
352 #ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ
353 /** \brief Macro for Pll step for profile with 8MHz Crystal and 80MHz target */
354 #define IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ \
355 { /*Step 0 Config: 80MHz*/ \
356 (5 - 1), /*uint8 k2Step;*/ \
357 0.000100, /*float32 waitTime;*/ \
358 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
359 },
360 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ */
361
362 #ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ
363 /** \brief Macro for Pll step for profile with 8MHz Crystal and 160MHz target */
364 #define IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ \
365 { /*Step 0 Config: 100MHz*/ \
366 (4 - 1), /*uint8 k2Step;*/ \
367 0.000100, /*float32 waitTime;*/ \
368 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
369 }, \
370 { /*Step 1 Config: 160MHz*/ \
371 (3 - 1), /*uint8 k2Step;*/ \
372 0.000100, /*float32 waitTime;*/ \
373 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
374 },
375 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ */
376
377 #ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ
378 /** \brief Macro for Pll step for profile with 8MHz Crystal and 200MHz target */
379 #define IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ \
380 { /*Step 0 Config: 120MHz*/ \
381 (5 - 1), /*uint8 k2Step;*/ \
382 0.000100, /*float32 waitTime;*/ \
383 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
384 }, \
385 { /*Step 0 Config: 150MHz*/ \
386 (4 - 1), /*uint8 k2Step;*/ \
387 0.000100, /*float32 waitTime;*/ \
388 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
389 }, \
390 { /*Step 1 Config: 200MHz*/ \
391 (3 - 1), /*uint8 k2Step;*/ \
392 0.000100, /*float32 waitTime;*/ \
393 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
394 },
395 #endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ */
396
397 /** \brief Macros to configure Initial Pll step.
398 * Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are
399 * done for the internal Oscillator frequency.
400 * \ref IfxScuCcu_InitialStepConfig
401 */
402
403 /****************** Initial Pll step for 16MHz crystal Configurations ******************************/
404
405 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ
406 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 80MHz target */
407 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ \
408 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
409 {(1 - 1), (40 - 1), (7 - 1), 0.000200F}
410 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ */
411
412 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ
413 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 133MHz target */
414 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ \
415 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
416 {(1 - 1), (50 - 1), (8 - 1), 0.000200F}
417 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ */
418
419 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ
420 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 160MHz target */
421 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ \
422 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
423 {(1 - 1), (40 - 1), (6 - 1), 0.000200F}
424 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ */
425
426 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ
427 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 200MHz target */
428 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ \
429 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
430 {(1 - 1), (50 - 1), (8 - 1), 0.000200F}
431 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ */
432
433 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ
434 /** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 240MHz target */
435 #define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ \
436 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
437 {(1 - 1), (45 - 1), (7 - 1), 0.000200F}
438 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ */
439
440 /****************** Initial Pll step for 20MHz crystal Configurations ******************************/
441
442 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ
443 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 80MHz target */
444 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ \
445 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
446 {(2 - 1), (64 - 1), (7 - 1), 0.000200F}
447 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ */
448
449 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ
450 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 133MHz target */
451 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ \
452 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
453 {(2 - 1), (80 - 1), (8 - 1), 0.000200F}
454 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ */
455
456 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ
457 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 160MHz target */
458 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ \
459 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
460 {(2 - 1), (64 - 1), (6 - 1), 0.000200F}
461 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ */
462
463 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ
464 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 200MHz target */
465 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ \
466 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
467 {(2 - 1), (60 - 1), (6 - 1), 0.000200F}
468 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ */
469
470 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ
471 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 240MHz target */
472 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ \
473 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
474 {(2 - 1), (72 - 1), (7 - 1), 0.000200F}
475 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ */
476
477 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ
478 /** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 300MHz target */
479 #define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ \
480 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
481 {(2 - 1), (60 - 1), (6 - 1), 0.000200F}
482 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ */
483
484 /****************** Initial Pll step for 40MHz crystal Configurations ******************************/
485
486 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ
487 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 80MHz target */
488 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ \
489 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
490 {(4 - 1), (64 - 1), (7 - 1), 0.000200F}
491 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ */
492
493 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ
494 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 133MHz target */
495 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ \
496 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
497 {(4 - 1), (80 - 1), (8 - 1), 0.000200F}
498 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ */
499
500 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ
501 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 160MHz target */
502 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ \
503 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
504 {(4 - 1), (64 - 1), (6 - 1), 0.000200F}
505 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ */
506
507 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ
508 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 200MHz target */
509 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ \
510 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
511 {(4 - 1), (60 - 1), (6 - 1), 0.000200F}
512 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ */
513
514 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ
515 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 240MHz target */
516 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ \
517 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
518 {(4 - 1), (72 - 1), (7 - 1), 0.000200F}
519 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ */
520
521 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ
522 /** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 300MHz target */
523 #define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ \
524 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
525 {(4 - 1), (60 - 1), (6 - 1), 0.000200F}
526 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ */
527
528 /****************** Initial Pll step for 8MHz crystal Configurations ******************************/
529
530 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ
531 /** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 80MHz target */
532 #define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ \
533 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime } ??*/\
534 {(1 - 1), (50 - 1), (5 - 1), 0.000200F}
535 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ */
536
537 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ
538 /** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 160MHz target */
539 #define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ \
540 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
541 {(1 - 1), (60 - 1), (5 - 1), 0.000200F}
542 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ */
543
544 #ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ
545 /** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 200MHz target */
546 #define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ \
547 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
548 {(1 - 1), (75 - 1), (6 - 1), 0.000200F}
549 #endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ */
550
551 /** \brief Macros to configure CCUCON registers.
552 * Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are
553 * done for the internal Oscillator frequency.
554 * \ref IfxScuCcu_InitialStepConfig
555 */
556
557 /** \brief Macros to configure CCUCON registers */
558
559 #ifndef IFXSCU_CFG_MAXDIV_80MHZ
560 /** \brief Macro to configure MAXDIV at 80MHz target frequency */
561 #define IFXSCU_CFG_MAXDIV_80MHZ (1)
562 #endif /*#ifndef IFXSCU_CFG_MAXDIV_80MHZ */
563
564 #ifndef IFXSCU_CFG_MAXDIV_133MHZ
565 /** \brief Macro to configure MAXDIV at 133MHz target frequency */
566 #define IFXSCU_CFG_MAXDIV_133MHZ (1)
567 #endif /*#ifndef IFXSCU_CFG_MAXDIV_133MHZ */
568
569 #ifndef IFXSCU_CFG_MAXDIV_160MHZ
570 /** \brief Macro to configure MAXDIV at 160MHz target frequency */
571 #define IFXSCU_CFG_MAXDIV_160MHZ (1)
572 #endif /*#ifndef IFXSCU_CFG_MAXDIV_160MHZ */
573
574 #ifndef IFXSCU_CFG_MAXDIV_200MHZ
575 /** \brief Macro to configure MAXDIV at 200MHz target frequency */
576 #define IFXSCU_CFG_MAXDIV_200MHZ (1)
577 #endif /*#ifndef IFXSCU_CFG_MAXDIV_200MHZ */
578
579 #ifndef IFXSCU_CFG_MAXDIV_240MHZ
580 /** \brief Macro to configure MAXDIV at 240MHz target frequency */
581 #define IFXSCU_CFG_MAXDIV_240MHZ (1)
582 #endif /*#ifndef IFXSCU_CFG_MAXDIV_240MHZ */
583
584 #ifndef IFXSCU_CFG_MAXDIV_300MHZ
585 /** \brief Macro to configure MAXDIV at 300MHz target frequency */
586 #define IFXSCU_CFG_MAXDIV_300MHZ (1)
587 #endif /*#ifndef IFXSCU_CFG_MAXDIV_300MHZ */
588
589 #ifndef IFXSCU_CFG_SRIDIV_80MHZ
590 /** \brief Macro to configure SRIDIV at 80MHz target frequency */
591 #define IFXSCU_CFG_SRIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
592 #endif /*#ifndef IFXSCU_CFG_SRIDIV_80MHZ */
593
594 #ifndef IFXSCU_CFG_SRIDIV_133MHZ
595 /** \brief Macro to configure SRIDIV at 133MHz target frequency */
596 #define IFXSCU_CFG_SRIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
597 #endif /*#ifndef IFXSCU_CFG_SRIDIV_133MHZ */
598
599 #ifndef IFXSCU_CFG_SRIDIV_160MHZ
600 /** \brief Macro to configure SRIDIV at 160MHz target frequency */
601 #define IFXSCU_CFG_SRIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
602 #endif /*#ifndef IFXSCU_CFG_SRIDIV_160MHZ */
603
604 #ifndef IFXSCU_CFG_SRIDIV_200MHZ
605 /** \brief Macro to configure SRIDIV at 200MHz target frequency */
606 #define IFXSCU_CFG_SRIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
607 #endif /*#ifndef IFXSCU_CFG_SRIDIV_200MHZ */
608
609 #ifndef IFXSCU_CFG_SRIDIV_240MHZ
610 /** \brief Macro to configure SRIDIV at 240MHz target frequency */
611 #define IFXSCU_CFG_SRIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
612 #endif /*#ifndef IFXSCU_CFG_SRIDIV_240MHZ */
613
614 #ifndef IFXSCU_CFG_SRIDIV_300MHZ
615 /** \brief Macro to configure SRIDIV at 300MHz target frequency */
616 #define IFXSCU_CFG_SRIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
617 #endif /*#ifndef IFXSCU_CFG_SRIDIV_300MHZ */
618
619 #ifndef IFXSCU_CFG_BAUD1DIV_80MHZ
620 /** \brief Macro to configure BAUD1DIV at 80MHz target frequency */
621 #define IFXSCU_CFG_BAUD1DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
622 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_80MHZ */
623
624 #ifndef IFXSCU_CFG_BAUD1DIV_133MHZ
625 /** \brief Macro to configure BAUD1DIV at 133MHz target frequency */
626 #define IFXSCU_CFG_BAUD1DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
627 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_133MHZ */
628
629 #ifndef IFXSCU_CFG_BAUD1DIV_160MHZ
630 /** \brief Macro to configure BAUD1DIV at 160MHz target frequency */
631 #define IFXSCU_CFG_BAUD1DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
632 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_160MHZ */
633
634 #ifndef IFXSCU_CFG_BAUD1DIV_200MHZ
635 /** \brief Macro to configure BAUD1DIV at 200MHz target frequency */
636 #define IFXSCU_CFG_BAUD1DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
637 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_200MHZ */
638
639 #ifndef IFXSCU_CFG_BAUD1DIV_240MHZ
640 /** \brief Macro to configure BAUD1DIV at 240MHz target frequency */
641 #define IFXSCU_CFG_BAUD1DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
642 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_240MHZ */
643
644 #ifndef IFXSCU_CFG_BAUD1DIV_300MHZ
645 /** \brief Macro to configure BAUD1DIV at 300MHz target frequency */
646 #define IFXSCU_CFG_BAUD1DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
647 #endif /*#ifndef IFXSCU_CFG_BAUD1DIV_300MHZ */
648
649 #ifndef IFXSCU_CFG_BAUD2DIV_80MHZ
650 /** \brief Macro to configure BAUD2DIV at 80MHz target frequency */
651 #define IFXSCU_CFG_BAUD2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
652 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_80MHZ */
653
654 #ifndef IFXSCU_CFG_BAUD2DIV_133MHZ
655 /** \brief Macro to configure BAUD2DIV at 133MHz target frequency */
656 #define IFXSCU_CFG_BAUD2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
657 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_133MHZ */
658
659 #ifndef IFXSCU_CFG_BAUD2DIV_160MHZ
660 /** \brief Macro to configure BAUD2DIV at 160MHz target frequency */
661 #define IFXSCU_CFG_BAUD2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
662 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_160MHZ */
663
664 #ifndef IFXSCU_CFG_BAUD2DIV_200MHZ
665 /** \brief Macro to configure BAUD2DIV at 200MHz target frequency */
666 #define IFXSCU_CFG_BAUD2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
667 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_200MHZ */
668
669 #ifndef IFXSCU_CFG_BAUD2DIV_240MHZ
670 /** \brief Macro to configure BAUD2DIV at 240MHz target frequency */
671 #define IFXSCU_CFG_BAUD2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
672 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_240MHZ */
673
674 #ifndef IFXSCU_CFG_BAUD2DIV_300MHZ
675 /** \brief Macro to configure BAUD2DIV at 300MHz target frequency */
676 #define IFXSCU_CFG_BAUD2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
677 #endif /*#ifndef IFXSCU_CFG_BAUD2DIV_300MHZ */
678
679 #ifndef IFXSCU_CFG_SPBDIV_80MHZ
680 /** \brief Macro to configure SPBDIV at 80MHz target frequency */
681 #define IFXSCU_CFG_SPBDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2) /*Max: 100MHz */
682 #endif /*#ifndef IFXSCU_CFG_SPBDIV_80MHZ */
683
684 #ifndef IFXSCU_CFG_SPBDIV_133MHZ
685 /** \brief Macro to configure SPBDIV at 133MHz target frequency */
686 #define IFXSCU_CFG_SPBDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
687 #endif /*#ifndef IFXSCU_CFG_SPBDIV_133MHZ */
688
689 #ifndef IFXSCU_CFG_SPBDIV_160MHZ
690 /** \brief Macro to configure SPBDIV at 160MHz target frequency */
691 #define IFXSCU_CFG_SPBDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
692 #endif /*#ifndef IFXSCU_CFG_SPBDIV_160MHZ */
693
694 #ifndef IFXSCU_CFG_SPBDIV_200MHZ
695 /** \brief Macro to configure SPBDIV at 200MHz target frequency */
696 #define IFXSCU_CFG_SPBDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
697 #endif /*#ifndef IFXSCU_CFG_SPBDIV_200MHZ */
698
699 #ifndef IFXSCU_CFG_SPBDIV_240MHZ
700 /** \brief Macro to configure SPBDIV at 240MHz target frequency */
701 #define IFXSCU_CFG_SPBDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
702 #endif /*#ifndef IFXSCU_CFG_SPBDIV_240MHZ */
703
704 #ifndef IFXSCU_CFG_SPBDIV_300MHZ
705 /** \brief Macro to configure SPBDIV at 300MHz target frequency */
706 #define IFXSCU_CFG_SPBDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
707 #endif /*#ifndef IFXSCU_CFG_SPBDIV_300MHZ */
708
709 #ifndef IFXSCU_CFG_FSI2DIV_80MHZ
710 /** \brief Macro to configure FSI2DIV at 80MHz target frequency */
711 #define IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
712 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_80MHZ */
713
714 #ifndef IFXSCU_CFG_FSI2DIV_133MHZ
715 /** \brief Macro to configure FSI2DIV at 133MHz target frequency */
716 #define IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
717 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_133MHZ */
718
719 #ifndef IFXSCU_CFG_FSI2DIV_160MHZ
720 /** \brief Macro to configure FSI2DIV at 160MHz target frequency */
721 #define IFXSCU_CFG_FSI2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
722 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_160MHZ */
723
724 #ifndef IFXSCU_CFG_FSI2DIV_200MHZ
725 /** \brief Macro to configure FSI2DIV at 200MHz target frequency */
726 #define IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
727 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_200MHZ */
728
729 #ifndef IFXSCU_CFG_FSI2DIV_240MHZ
730 /** \brief Macro to configure FSI2DIV at 240MHz target frequency */
731 #define IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
732 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_240MHZ */
733
734 #ifndef IFXSCU_CFG_FSI2DIV_300MHZ
735 /** \brief Macro to configure FSI2DIV at 300MHz target frequency */
736 #define IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
737 #endif /*#ifndef IFXSCU_CFG_FSI2DIV_300MHZ */
738
739 #ifndef IFXSCU_CFG_FSIDIV_80MHZ
740 /** \brief Macro to configure FSIDIV at 80MHz target frequency */
741 #define IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
742 #endif /*#ifndef IFXSCU_CFG_FSIDIV_80MHZ */
743
744 #ifndef IFXSCU_CFG_FSIDIV_133MHZ
745 /** \brief Macro to configure FSIDIV at 133MHz target frequency */
746 #define IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
747 #endif /*#ifndef IFXSCU_CFG_FSIDIV_133MHZ */
748
749 #ifndef IFXSCU_CFG_FSIDIV_160MHZ
750 /** \brief Macro to configure FSIDIV at 160MHz target frequency */
751 #define IFXSCU_CFG_FSIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
752 #endif /*#ifndef IFXSCU_CFG_FSIDIV_160MHZ */
753
754 #ifndef IFXSCU_CFG_FSIDIV_200MHZ
755 /** \brief Macro to configure FSIDIV at 200MHz target frequency */
756 #define IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
757 #endif /*#ifndef IFXSCU_CFG_FSIDIV_200MHZ */
758
759 #ifndef IFXSCU_CFG_FSIDIV_240MHZ
760 /** \brief Macro to configure FSIDIV at 240MHz target frequency */
761 #define IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
762 #endif /*#ifndef IFXSCU_CFG_FSIDIV_240MHZ */
763
764 #ifndef IFXSCU_CFG_FSIDIV_300MHZ
765 /** \brief Macro to configure FSIDIV at 300MHz target frequency */
766 #define IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
767 #endif /*#ifndef IFXSCU_CFG_FSIDIV_300MHZ */
768
769 #ifndef IFXSCU_CFG_CANDIV_80MHZ
770 /** \brief Macro to configure CANDIV at 80MHz target frequency */
771 #define IFXSCU_CFG_CANDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
772 #endif /*#ifndef IFXSCU_CFG_CANDIV_80MHZ */
773
774 #ifndef IFXSCU_CFG_CANDIV_133MHZ
775 /** \brief Macro to configure CANDIV at 133MHz target frequency */
776 #define IFXSCU_CFG_CANDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
777 #endif /*#ifndef IFXSCU_CFG_CANDIV_133MHZ */
778
779 #ifndef IFXSCU_CFG_CANDIV_160MHZ
780 /** \brief Macro to configure CANDIV at 160MHz target frequency */
781 #define IFXSCU_CFG_CANDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
782 #endif /*#ifndef IFXSCU_CFG_CANDIV_160MHZ */
783
784 #ifndef IFXSCU_CFG_CANDIV_200MHZ
785 /** \brief Macro to configure CANDIV at 200MHz target frequency */
786 #define IFXSCU_CFG_CANDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
787 #endif /*#ifndef IFXSCU_CFG_CANDIV_200MHZ */
788
789 #ifndef IFXSCU_CFG_CANDIV_240MHZ
790 /** \brief Macro to configure CANDIV at 240MHz target frequency */
791 #define IFXSCU_CFG_CANDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
792 #endif /*#ifndef IFXSCU_CFG_CANDIV_240MHZ */
793
794 #ifndef IFXSCU_CFG_CANDIV_300MHZ
795 /** \brief Macro to configure CANDIV at 200MHz target frequency */
796 #define IFXSCU_CFG_CANDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
797 #endif /*#ifndef IFXSCU_CFG_CANDIV_300MHZ */
798
799 #ifndef IFXSCU_CFG_ERAYDIV_80MHZ
800 /** \brief Macro to configure ERAYDIV at 80MHz target frequency */
801 #define IFXSCU_CFG_ERAYDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 80MHz */
802 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_80MHZ */
803
804 #ifndef IFXSCU_CFG_ERAYDIV_133MHZ
805 /** \brief Macro to configure ERAYDIV at 133MHz target frequency */
806 #define IFXSCU_CFG_ERAYDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 80MHz */
807 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_133MHZ */
808
809 #ifndef IFXSCU_CFG_ERAYDIV_160MHZ
810 /** \brief Macro to configure ERAYDIV at 160MHz target frequency */
811 #define IFXSCU_CFG_ERAYDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 80MHz */
812 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_160MHZ */
813
814 #ifndef IFXSCU_CFG_ERAYDIV_200MHZ
815 /** \brief Macro to configure ERAYDIV at 200MHz target frequency */
816 #define IFXSCU_CFG_ERAYDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 3) /*Max: 80MHz */
817 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_200MHZ */
818
819 #ifndef IFXSCU_CFG_ERAYDIV_240MHZ
820 /** \brief Macro to configure ERAYDIV at 200MHz target frequency */
821 #define IFXSCU_CFG_ERAYDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 80MHz */
822 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_240MHZ */
823
824 #ifndef IFXSCU_CFG_ERAYDIV_300MHZ
825 /** \brief Macro to configure ERAYDIV at 300MHz target frequency */
826 #define IFXSCU_CFG_ERAYDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 4) /*Max: 80MHz */
827 #endif /*#ifndef IFXSCU_CFG_ERAYDIV_300MHZ */
828
829 #ifndef IFXSCU_CFG_STMDIV_80MHZ
830 /** \brief Macro to configure STMDIV at 80MHz target frequency */
831 #define IFXSCU_CFG_STMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
832 #endif /*#ifndef IFXSCU_CFG_STMDIV_80MHZ */
833
834 #ifndef IFXSCU_CFG_STMDIV_133MHZ
835 /** \brief Macro to configure STMDIV at 133MHz target frequency */
836 #define IFXSCU_CFG_STMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
837 #endif /*#ifndef IFXSCU_CFG_STMDIV_133MHZ */
838
839 #ifndef IFXSCU_CFG_STMDIV_160MHZ
840 /** \brief Macro to configure STMDIV at 160MHz target frequency */
841 #define IFXSCU_CFG_STMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
842 #endif /*#ifndef IFXSCU_CFG_STMDIV_160MHZ */
843
844 #ifndef IFXSCU_CFG_STMDIV_200MHZ
845 /** \brief Macro to configure STMDIV at 200MHz target frequency */
846 #define IFXSCU_CFG_STMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
847 #endif /*#ifndef IFXSCU_CFG_STMDIV_200MHZ */
848
849 #ifndef IFXSCU_CFG_STMDIV_240MHZ
850 /** \brief Macro to configure STMDIV at 240MHz target frequency */
851 #define IFXSCU_CFG_STMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
852 #endif /*#ifndef IFXSCU_CFG_STMDIV_240MHZ */
853
854 #ifndef IFXSCU_CFG_STMDIV_300MHZ
855 /** \brief Macro to configure STMDIV at 300MHz target frequency */
856 #define IFXSCU_CFG_STMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
857 #endif /*#ifndef IFXSCU_CFG_STMDIV_300MHZ */
858
859 #ifndef IFXSCU_CFG_GTMDIV_80MHZ
860 /** \brief Macro to configure GTMDIV at 80MHz target frequency */
861 #define IFXSCU_CFG_GTMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
862 #endif /*#ifndef IFXSCU_CFG_GTMDIV_80MHZ */
863
864 #ifndef IFXSCU_CFG_GTMDIV_133MHZ
865 /** \brief Macro to configure GTMDIV at 133MHz target frequency */
866 #define IFXSCU_CFG_GTMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
867 #endif /*#ifndef IFXSCU_CFG_GTMDIV_133MHZ */
868
869 #ifndef IFXSCU_CFG_GTMDIV_160MHZ
870 /** \brief Macro to configure GTMDIV at 160MHz target frequency */
871 #define IFXSCU_CFG_GTMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
872 #endif /*#ifndef IFXSCU_CFG_GTMDIV_160MHZ */
873
874 #ifndef IFXSCU_CFG_GTMDIV_200MHZ
875 /** \brief Macro to configure GTMDIV at 200MHz target frequency */
876 #define IFXSCU_CFG_GTMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
877 #endif /*#ifndef IFXSCU_CFG_GTMDIV_200MHZ */
878
879 #ifndef IFXSCU_CFG_GTMDIV_240MHZ
880 /** \brief Macro to configure GTMDIV at 240MHz target frequency */
881 #define IFXSCU_CFG_GTMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
882 #endif /*#ifndef IFXSCU_CFG_GTMDIV_240MHZ */
883
884 #ifndef IFXSCU_CFG_GTMDIV_300MHZ
885 /** \brief Macro to configure GTMDIV at 300MHz target frequency */
886 #define IFXSCU_CFG_GTMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
887 #endif /*#ifndef IFXSCU_CFG_GTMDIV_300MHZ */
888
889 #ifndef IFXSCU_CFG_ETHDIV_80MHZ
890 /** \brief Macro to configure ETHDIV at 80MHz target frequency */
891 #define IFXSCU_CFG_ETHDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2)
892 #endif /*#ifndef IFXSCU_CFG_ETHDIV_80MHZ */
893
894 #ifndef IFXSCU_CFG_ETHDIV_133MHZ
895 /** \brief Macro to configure ETHDIV at 133MHz target frequency */
896 #define IFXSCU_CFG_ETHDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 3)
897 #endif /*#ifndef IFXSCU_CFG_ETHDIV_133MHZ */
898
899 #ifndef IFXSCU_CFG_ETHDIV_160MHZ
900 /** \brief Macro to configure ETHDIV at 160MHz target frequency */
901 #define IFXSCU_CFG_ETHDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 4)
902 #endif /*#ifndef IFXSCU_CFG_ETHDIV_160MHZ */
903
904 #ifndef IFXSCU_CFG_ETHDIV_200MHZ
905 /** \brief Macro to configure ETHDIV at 200MHz target frequency */
906 #define IFXSCU_CFG_ETHDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 4)
907 #endif /*#ifndef IFXSCU_CFG_ETHDIV_200MHZ */
908
909 #ifndef IFXSCU_CFG_ETHDIV_240MHZ
910 /** \brief Macro to configure ETHDIV at 240MHz target frequency */
911 #define IFXSCU_CFG_ETHDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 5)
912 #endif /*#ifndef IFXSCU_CFG_ETHDIV_240MHZ */
913
914 #ifndef IFXSCU_CFG_ETHDIV_300MHZ
915 /** \brief Macro to configure ETHDIV at 300MHz target frequency */
916 #define IFXSCU_CFG_ETHDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 6)
917 #endif /*#ifndef IFXSCU_CFG_ETHDIV_300MHZ */
918
919 #ifndef IFXSCU_CFG_ASCLINFDIV_80MHZ
920 /** \brief Macro to configure ASCLINFDIV at 80MHz target frequency */
921 #define IFXSCU_CFG_ASCLINFDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
922 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_80MHZ */
923
924 #ifndef IFXSCU_CFG_ASCLINFDIV_133MHZ
925 /** \brief Macro to configure ASCLINFDIV at 133MHz target frequency */
926 #define IFXSCU_CFG_ASCLINFDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
927 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_133MHZ */
928
929 #ifndef IFXSCU_CFG_ASCLINFDIV_160MHZ
930 /** \brief Macro to configure ASCLINFDIV at 160MHz target frequency */
931 #define IFXSCU_CFG_ASCLINFDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
932 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_160MHZ */
933
934 #ifndef IFXSCU_CFG_ASCLINFDIV_200MHZ
935 /** \brief Macro to configure ASCLINFDIV at 200MHz target frequency */
936 #define IFXSCU_CFG_ASCLINFDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
937 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_200MHZ */
938
939 #ifndef IFXSCU_CFG_ASCLINFDIV_240MHZ
940 /** \brief Macro to configure ASCLINFDIV at 240MHz target frequency */
941 #define IFXSCU_CFG_ASCLINFDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
942 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_240MHZ */
943
944 #ifndef IFXSCU_CFG_ASCLINFDIV_300MHZ
945 /** \brief Macro to configure ASCLINFDIV at 300MHz target frequency */
946 #define IFXSCU_CFG_ASCLINFDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
947 #endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_300MHZ */
948
949 #ifndef IFXSCU_CFG_ASCLINSDIV_80MHZ
950 /** \brief Macro to configure ASCLINSDIV at 80MHz target frequency */
951 #define IFXSCU_CFG_ASCLINSDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
952 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_80MHZ */
953
954 #ifndef IFXSCU_CFG_ASCLINSDIV_133MHZ
955 /** \brief Macro to configure ASCLINSDIV at 133MHz target frequency */
956 #define IFXSCU_CFG_ASCLINSDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
957 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_133MHZ */
958
959 #ifndef IFXSCU_CFG_ASCLINSDIV_160MHZ
960 /** \brief Macro to configure ASCLINSDIV at 160MHz target frequency */
961 #define IFXSCU_CFG_ASCLINSDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
962 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_160MHZ */
963
964 #ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ
965 /** \brief Macro to configure ASCLINSDIV at 200MHz target frequency */
966 #define IFXSCU_CFG_ASCLINSDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
967 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ */
968
969 #ifndef IFXSCU_CFG_ASCLINSDIV_240MHZ
970 /** \brief Macro to configure ASCLINSDIV at 240MHz target frequency */
971 #define IFXSCU_CFG_ASCLINSDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
972 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_240MHZ */
973
974 #ifndef IFXSCU_CFG_ASCLINSDIV_300MHZ
975 /** \brief Macro to configure ASCLINSDIV at 300MHz target frequency */
976 #define IFXSCU_CFG_ASCLINSDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
977 #endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ */
978
979 #ifndef IFXSCU_CFG_BBBDIV_80MHZ
980 /** \brief Macro to configure BBBDIV at 80MHz target frequency */
981 #define IFXSCU_CFG_BBBDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 2)
982 #endif /*#ifndef IFXSCU_CFG_BBBDIV_80MHZ */
983
984 #ifndef IFXSCU_CFG_BBBDIV_133MHZ
985 /** \brief Macro to configure BBBDIV at 133MHz target frequency */
986 #define IFXSCU_CFG_BBBDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)
987 #endif /*#ifndef IFXSCU_CFG_BBBDIV_133MHZ */
988
989 #ifndef IFXSCU_CFG_BBBDIV_160MHZ
990 /** \brief Macro to configure BBBDIV at 160MHz target frequency */
991 #define IFXSCU_CFG_BBBDIV_160MHZ (IFXSCU_CFG_SRIDIV_160MHZ * 2)
992 #endif /*#ifndef IFXSCU_CFG_BBBDIV_160MHZ */
993
994 #ifndef IFXSCU_CFG_BBBDIV_200MHZ
995 /** \brief Macro to configure BBBDIV at 200MHz target frequency */
996 #define IFXSCU_CFG_BBBDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)
997 #endif /*#ifndef IFXSCU_CFG_BBBDIV_200MHZ */
998
999 #ifndef IFXSCU_CFG_BBBDIV_240MHZ
1000 /** \brief Macro to configure BBBDIV at 240MHz target frequency */
1001 #define IFXSCU_CFG_BBBDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 2)
1002 #endif /*#ifndef IFXSCU_CFG_BBBDIV_240MHZ */
1003
1004 #ifndef IFXSCU_CFG_BBBDIV_300MHZ
1005 /** \brief Macro to configure BBBDIV at 300MHz target frequency */
1006 #define IFXSCU_CFG_BBBDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 2)
1007 #endif /*#ifndef IFXSCU_CFG_BBBDIV_300MHZ */
1008
1009 #ifndef IFXSCU_CFG_CPU0DIV_80MHZ
1010 /** \brief Macro to configure CPU0DIV at 80MHz target frequency */
1011 #define IFXSCU_CFG_CPU0DIV_80MHZ (0) /*Same as SRIDIV */
1012 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_80MHZ */
1013
1014 #ifndef IFXSCU_CFG_CPU0DIV_133MHZ
1015 /** \brief Macro to configure CPU0DIV at 133MHz target frequency */
1016 #define IFXSCU_CFG_CPU0DIV_133MHZ (0) /*Same as SRIDIV */
1017 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_133MHZ */
1018
1019 #ifndef IFXSCU_CFG_CPU0DIV_160MHZ
1020 /** \brief Macro to configure CPU0DIV at 160MHz target frequency */
1021 #define IFXSCU_CFG_CPU0DIV_160MHZ (0) /*Same as SRIDIV */
1022 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_160MHZ */
1023
1024 #ifndef IFXSCU_CFG_CPU0DIV_200MHZ
1025 /** \brief Macro to configure CPU0DIV at 200MHz target frequency */
1026 #define IFXSCU_CFG_CPU0DIV_200MHZ (0) /*Same as SRIDIV */
1027 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_200MHZ */
1028
1029 #ifndef IFXSCU_CFG_CPU0DIV_240MHZ
1030 /** \brief Macro to configure CPU0DIV at 240MHz target frequency */
1031 #define IFXSCU_CFG_CPU0DIV_240MHZ (0) /*Same as SRIDIV */
1032 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_240MHZ */
1033
1034 #ifndef IFXSCU_CFG_CPU0DIV_300MHZ
1035 /** \brief Macro to configure CPU0DIV at 300MHz target frequency */
1036 #define IFXSCU_CFG_CPU0DIV_300MHZ (0) /*Same as SRIDIV */
1037 #endif /*#ifndef IFXSCU_CFG_CPU0DIV_300MHZ */
1038
1039 #ifndef IFXSCU_CFG_CPU1DIV_80MHZ
1040 /** \brief Macro to configure CPU1DIV at 80MHz target frequency */
1041 #define IFXSCU_CFG_CPU1DIV_80MHZ (0) /*Same as SRIDIV */
1042 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_80MHZ */
1043
1044 #ifndef IFXSCU_CFG_CPU1DIV_133MHZ
1045 /** \brief Macro to configure CPU1DIV at 133MHz target frequency */
1046 #define IFXSCU_CFG_CPU1DIV_133MHZ (0) /*Same as SRIDIV */
1047 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_133MHZ */
1048
1049 #ifndef IFXSCU_CFG_CPU1DIV_160MHZ
1050 /** \brief Macro to configure CPU1DIV at 160MHz target frequency */
1051 #define IFXSCU_CFG_CPU1DIV_160MHZ (0) /*Same as SRIDIV */
1052 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_160MHZ */
1053
1054 #ifndef IFXSCU_CFG_CPU1DIV_200MHZ
1055 /** \brief Macro to configure CPU1DIV at 200MHz target frequency */
1056 #define IFXSCU_CFG_CPU1DIV_200MHZ (0) /*Same as SRIDIV */
1057 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_200MHZ */
1058
1059 #ifndef IFXSCU_CFG_CPU1DIV_240MHZ
1060 /** \brief Macro to configure CPU1DIV at 240MHz target frequency */
1061 #define IFXSCU_CFG_CPU1DIV_240MHZ (0) /*Same as SRIDIV */
1062 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_240MHZ */
1063
1064 #ifndef IFXSCU_CFG_CPU1DIV_300MHZ
1065 /** \brief Macro to configure CPU1DIV at 300MHz target frequency */
1066 #define IFXSCU_CFG_CPU1DIV_300MHZ (0) /*Same as SRIDIV */
1067 #endif /*#ifndef IFXSCU_CFG_CPU1DIV_300MHZ */
1068
1069 /** \brief Macros to configure FLASH.FCON register for flash waitstate configuration.
1070 * \ref IfxScuCcu_InitialStepConfig
1071 */
1072
1073 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ
1074 /** \brief Macro to configure FCON.WSPFLASH at 80MHz target frequency */
1075 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ (3 - 1)
1076 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ */
1077
1078 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ
1079 /** \brief Macro to configure FCON.WSPFLASH at 133MHz target frequency */
1080 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ (4 - 1)
1081 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ */
1082
1083 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ
1084 /** \brief Macro to configure FCON.WSPFLASH at 160MHz target frequency */
1085 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ (5 - 1)
1086 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ */
1087
1088 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ
1089 /** \brief Macro to configure FCON.WSPFLASH at 200MHz target frequency */
1090 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ (6 - 1)
1091 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ */
1092
1093 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ
1094 /** \brief Macro to configure FCON.WSPFLASH at 240MHz target frequency */
1095 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ (8 - 1)
1096 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ */
1097
1098 #ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ
1099 /** \brief Macro to configure FCON.WSPFLASH at 300MHz target frequency */
1100 #define IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ (9 - 1)
1101 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ */
1102
1103 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ
1104 /** \brief Macro to configure FCON.WSECP_ at 80MHz target frequency */
1105 #define IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ (1 - 1)
1106 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ */
1107
1108 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ
1109 /** \brief Macro to configure FCON.WSECPF at 133MHz target frequency */
1110 #define IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ (2 - 1)
1111 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ */
1112
1113 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ
1114 /** \brief Macro to configure FCON.WSECPF at 160MHz target frequency */
1115 #define IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ (2 - 1)
1116 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ */
1117
1118 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ
1119 /** \brief Macro to configure FCON.WSECPF at 200MHz target frequency */
1120 #define IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ (2 - 1)
1121 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ */
1122
1123 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ
1124 /** \brief Macro to configure FCON.WSECPF_ at 240MHz target frequency */
1125 #define IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ (3 - 1)
1126 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ */
1127
1128 #ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ
1129 /** \brief Macro to configure FCON.WSECPF at 300MHz target frequency */
1130 #define IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ (3 - 1)
1131 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ */
1132
1133 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ
1134 /** \brief Macro to configure FCON.WSDFLASH at 80MHz target frequency */
1135 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ (16 - 1)
1136 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ */
1137
1138 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ
1139 /** \brief Macro to configure FCON.WSDFLASH_ at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ */
1140 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ (14 - 1)
1141 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ */
1142
1143 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ
1144 /** \brief Macro to configure FCON.WSDFLASH at 160MHz target frequency, where fSRI= 160/2= 80MHZ */
1145 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ (16 - 1)
1146 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ */
1147
1148 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ
1149 /** \brief Macro to configure FCON.WSDFLASH at 200MHz target frequency, where fSRI= 200/2= 100MHZ */
1150 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ (20 - 1)
1151 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ */
1152
1153 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ
1154 /** \brief Macro to configure FCON.WSDFLASH at 240MHz target frequency, where fSRI= 240/3= 80MHZ */
1155 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ (16 - 1)
1156 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ */
1157
1158 #ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ
1159 /** \brief Macro to configure FCON.WSDFLASH at 300MHz target frequency, where fSRI= 300/3= 100MHZ */
1160 #define IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ (20 - 1)
1161 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ */
1162
1163 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ
1164 /** \brief Macro to configure FCON.WSECDF at 80MHz target frequency */
1165 #define IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ (2 - 1)
1166 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ */
1167
1168 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ
1169 /** \brief Macro to configure FCON.WSECDF at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ */
1170 #define IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ (2 - 1)
1171 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ */
1172
1173 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ
1174 /** \brief Macro to configure FCON.WSECDF at 160MHz target frequency, where fSRI= 160/2= 80MHZ */
1175 #define IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ (2 - 1)
1176 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ */
1177
1178 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ
1179 /** \brief Macro to configure FCON.WSECDF at 200MHz target frequency, where fSRI= 200/2= 100MHZ */
1180 #define IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ (2 - 1)
1181 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ */
1182
1183 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ
1184 /** \brief Macro to configure FCON.WSECDF at 240MHz target frequency, where fSRI= 240/3= 80MHZ */
1185 #define IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ (2 - 1)
1186 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ */
1187
1188 #ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ
1189 /** \brief Macro to configure FCON.WSECDF at 300MHz target frequency, where fSRI= 300/3= 100MHZ */
1190 #define IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ (2 - 1)
1191 #endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ */
1192
1193 /** \brief Macros to configure FLASH.FCON registers */
1194 #define IFXSCU_CFG_FLASH_WAITSTATE_MSK \
1195 ( \
1196 (IFX_FLASH_FCON_WSPFLASH_MSK << IFX_FLASH_FCON_WSPFLASH_OFF) | \
1197 (IFX_FLASH_FCON_WSECPF_MSK << IFX_FLASH_FCON_WSECPF_OFF) | \
1198 (IFX_FLASH_FCON_WSDFLASH_MSK << IFX_FLASH_FCON_WSDFLASH_OFF) | \
1199 (IFX_FLASH_FCON_WSECDF_MSK << IFX_FLASH_FCON_WSECDF_OFF))
1200
1201 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq) \
1202 ( \
1203 (IFXSCU_CFG_FLASH_FCON_WSPFLASH_##pllFreq << IFX_FLASH_FCON_WSPFLASH_OFF) | \
1204 (IFXSCU_CFG_FLASH_FCON_WSECPF_##pllFreq << IFX_FLASH_FCON_WSECPF_OFF) | \
1205 (IFXSCU_CFG_FLASH_FCON_WSDFLASH_##pllFreq << IFX_FLASH_FCON_WSDFLASH_OFF) | \
1206 (IFXSCU_CFG_FLASH_FCON_WSECDF_##pllFreq << IFX_FLASH_FCON_WSECDF_OFF))
1207
1208 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(pllFreq) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)
1209
1210 #define IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)
1211
1212 /** \brief Macros to configure CCUCON0 Clock distribution */
1213 #define IFXSCU_CFG_CCUCON0_MASK \
1214 ( \
1215 (IFX_SCU_CCUCON0_BAUD1DIV_MSK << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
1216 (IFX_SCU_CCUCON0_BAUD2DIV_MSK << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
1217 (IFX_SCU_CCUCON0_SRIDIV_MSK << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
1218 (IFX_SCU_CCUCON0_SPBDIV_MSK << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
1219 (IFX_SCU_CCUCON0_FSI2DIV_MSK << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
1220 (IFX_SCU_CCUCON0_FSIDIV_MSK << IFX_SCU_CCUCON0_FSIDIV_OFF))
1221
1222 #define IFXSCU_CFG_CCUCON0_BASIC_(pllFreq) \
1223 (uint32)( \
1224 (IFXSCU_CFG_BAUD1DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
1225 (IFXSCU_CFG_BAUD2DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
1226 (IFXSCU_CFG_SRIDIV_##pllFreq << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
1227 (IFXSCU_CFG_SPBDIV_##pllFreq << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
1228 (IFXSCU_CFG_FSI2DIV_##pllFreq << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
1229 (IFXSCU_CFG_FSIDIV_##pllFreq << IFX_SCU_CCUCON0_FSIDIV_OFF))
1230
1231 #define IFXSCU_CFG_CCUCON0_BASIC(pllFreq) IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)
1232
1233 #define IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ)
1234
1235 /** \brief Macros to configure CCUCON1 Clock distribution */
1236 #define IFXSCU_CFG_CCUCON1_MASK \
1237 ( \
1238 (IFX_SCU_CCUCON1_CANDIV_MSK << IFX_SCU_CCUCON1_CANDIV_OFF) | \
1239 (IFX_SCU_CCUCON1_ERAYDIV_MSK << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
1240 (IFX_SCU_CCUCON1_STMDIV_MSK << IFX_SCU_CCUCON1_STMDIV_OFF) | \
1241 (IFX_SCU_CCUCON1_GTMDIV_MSK << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
1242 (IFX_SCU_CCUCON1_ETHDIV_MSK << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
1243 (IFX_SCU_CCUCON1_ASCLINFDIV_MSK << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
1244 (IFX_SCU_CCUCON1_ASCLINSDIV_MSK << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))
1245
1246 #define IFXSCU_CFG_CCUCON1_BASIC_(pllFreq) \
1247 (uint32)( \
1248 (IFXSCU_CFG_CANDIV_##pllFreq << IFX_SCU_CCUCON1_CANDIV_OFF) | \
1249 (IFXSCU_CFG_ERAYDIV_80MHZ << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
1250 (IFXSCU_CFG_STMDIV_##pllFreq << IFX_SCU_CCUCON1_STMDIV_OFF) | \
1251 (IFXSCU_CFG_GTMDIV_##pllFreq << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
1252 (IFXSCU_CFG_ETHDIV_##pllFreq << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
1253 (IFXSCU_CFG_ASCLINFDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
1254 (IFXSCU_CFG_ASCLINSDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))
1255
1256 #define IFXSCU_CFG_CCUCON1_BASIC(pllFreq) IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)
1257
1258 #define IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ)
1259
1260 /** \brief Macros to configure CCUCON2 Clock distribution */
1261 #define IFXSCU_CFG_CCUCON2_MASK \
1262 ( \
1263 (IFX_SCU_CCUCON2_BBBDIV_MSK << IFX_SCU_CCUCON2_BBBDIV_OFF))
1264
1265 #define IFXSCU_CFG_CCUCON2_BASIC_(pllFreq) \
1266 (uint32)( \
1267 (IFXSCU_CFG_BBBDIV_##pllFreq << IFX_SCU_CCUCON2_BBBDIV_OFF))
1268
1269 #define IFXSCU_CFG_CCUCON2_BASIC(pllFreq) IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)
1270
1271 #define IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ)
1272
1273 /** \brief Macros to configure CCUCON5 Clock distribution */
1274 #define IFXSCU_CFG_CCUCON5_MASK \
1275 ( \
1276 (IFX_SCU_CCUCON5_MAXDIV_MSK << IFX_SCU_CCUCON5_MAXDIV_OFF))
1277
1278 #define IFXSCU_CFG_CCUCON5_BASIC_(pllFreq) \
1279 (uint32)( \
1280 (IFXSCU_CFG_MAXDIV_##pllFreq << IFX_SCU_CCUCON5_MAXDIV_OFF))
1281
1282 #define IFXSCU_CFG_CCUCON5_BASIC(pllFreq) IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)
1283
1284 #define IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ)
1285
1286 /** \brief Macros to configure CCUCON6 Clock distribution */
1287 #define IFXSCU_CFG_CCUCON6_MASK \
1288 ( \
1289 (IFX_SCU_CCUCON6_CPU0DIV_MSK << IFX_SCU_CCUCON6_CPU0DIV_OFF))
1290
1291 #define IFXSCU_CFG_CCUCON6_BASIC_(pllFreq) \
1292 (uint32)( \
1293 (IFXSCU_CFG_CPU0DIV_##pllFreq << IFX_SCU_CCUCON6_CPU0DIV_OFF))
1294
1295 #define IFXSCU_CFG_CCUCON6_BASIC(pllFreq) IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)
1296
1297 #define IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ)
1298
1299 /** \brief Macros to configure CCUCON7 Clock distribution */
1300 #define IFXSCU_CFG_CCUCON7_MASK \
1301 ( \
1302 (IFX_SCU_CCUCON7_CPU1DIV_MSK << IFX_SCU_CCUCON7_CPU1DIV_OFF))
1303
1304 #define IFXSCU_CFG_CCUCON7_BASIC_(pllFreq) \
1305 (uint32)( \
1306 (IFXSCU_CFG_CPU1DIV_##pllFreq << IFX_SCU_CCUCON7_CPU1DIV_OFF))
1307
1308 #define IFXSCU_CFG_CCUCON7_BASIC(pllFreq) IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)
1309
1310 #define IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ)
1311
1312 #define IFXSCU_CFG_CLK_DISTRIBUTION \
1313 { \
1314 /* { uint32 value, uint32 mask }*/ \
1315 {IFXSCU_CFG_CCUCON0, IFXSCU_CFG_CCUCON0_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon0;*/ \
1316 {IFXSCU_CFG_CCUCON1, IFXSCU_CFG_CCUCON1_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon1;*/ \
1317 {IFXSCU_CFG_CCUCON2, IFXSCU_CFG_CCUCON2_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon2;*/ \
1318 {IFXSCU_CFG_CCUCON5, IFXSCU_CFG_CCUCON5_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon5;*/ \
1319 {IFXSCU_CFG_CCUCON6, IFXSCU_CFG_CCUCON6_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon6;*/ \
1320 {IFXSCU_CFG_CCUCON7, IFXSCU_CFG_CCUCON7_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon7;*/ \
1321 }
1322
1323 /*Utility macros for the configuration structure */
1324 /*macro for pll steps configuration */
1325 #define IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pllFreq
1326 #define IFXSCU_CFG_PLL_STEPS_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq)
1327 #define IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
1328
1329 /*macro for pll initial step configuration */
1330 #define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_##xtalFreq##_##pllFreq
1331 #define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq)
1332 #define IFXSCU_CFG_PLL_INITIAL_STEP IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
1333
1334 #define IFXSCU_CFG_FLASH_WAITSTATE \
1335 /* { uint32 value, uint32 mask }*/\
1336 {IFXSCU_CFG_FLASH_WAITSTATE_VAL, IFXSCU_CFG_FLASH_WAITSTATE_MSK}
1337
1338 #if (IFX_CFG_SCU_XTAL_FREQUENCY == (20000000))
1339 #define IFXSCU_CFG_XTAL_FREQ 20MHZ
1340 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (40000000))
1341 #define IFXSCU_CFG_XTAL_FREQ 40MHZ
1342 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (16000000))
1343 #define IFXSCU_CFG_XTAL_FREQ 16MHZ
1344 #elif (IFX_CFG_SCU_XTAL_FREQUENCY == (8000000))
1345 #define IFXSCU_CFG_XTAL_FREQ 8MHZ
1346 #else
1347 #error "Wrong XTAL frequency configuration! check IFX_CFG_SCU_XTAL_FREQUENCY configuration in Ifx_Cfg.h."
1348 #error "Aurix Triboard supported crystal frequencies are 8MHz, 16MHz, 20MHz and 40MHz"
1349 #endif
1350
1351 #if (IFX_CFG_SCU_PLL_FREQUENCY == (80000000))
1352 #define IFXSCU_CFG_PLL_FREQ 80MHZ
1353 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (133000000)) && (IFX_CFG_SCU_XTAL_FREQUENCY != (8000000))
1354 #define IFXSCU_CFG_PLL_FREQ 133MHZ
1355 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (160000000))
1356 #define IFXSCU_CFG_PLL_FREQ 160MHZ
1357 #elif (IFX_CFG_SCU_PLL_FREQUENCY == (200000000))
1358 #define IFXSCU_CFG_PLL_FREQ 200MHZ
1359 #else
1360 #error "Wrong PLL frequency configuration!, check IFX_CFG_SCU_PLL_FREQUENCY configuration in Ifx_Cfg.h."
1361 #error "Supported PLL frequencies are 80MHz, 133MHz (8MHz XTAL doesn't support), 160Mhz, and 200MHz."
1362 #endif
1363
1364 /******************************************************************************/
1365 /* Enum */
1366 /******************************************************************************/
1367 /** Clock selection */
1368 typedef enum
1369 {
1370 IfxScu_CCUCON0_CLKSEL_fBack = 0,
1371 IfxScu_CCUCON0_CLKSEL_fPll = 1
1372 } IfxScu_CCUCON0_CLKSEL;
1373
1374 /** Input selection for PLL and PLL ERAY */
1375 typedef enum
1376 {
1377 IfxScu_CCUCON1_INSEL_fOsc1 = 0,
1378 IfxScu_CCUCON1_INSEL_fOsc0 = 1
1379 } IfxScu_CCUCON1_INSEL;
1380
1381 /** Input frequency request control */
1382 typedef enum
1383 {
1384 IfxScu_WDTCON1_IR_divBy16384 = 0,
1385 IfxScu_WDTCON1_IR_divBy256 = 1,
1386 IfxScu_WDTCON1_IR_divBy64 = 2
1387 } IfxScu_WDTCON1_IR;
1388
1389 typedef enum
1390 {
1391 IfxScu_PMCSR_REQSLP_Run = 0U, /* 00 Request CPU Run Mode */
1392 IfxScu_PMCSR_REQSLP_Idle = 1U, /* 01 Request CPU Idle Mode */
1393 IfxScu_PMCSR_REQSLP_Sleep = 2U, /* 10 Request CPU System Sleep Mode */
1394 IfxScu_PMCSR_REQSLP_Stby = 3U /* 11 Request System Standby Mode */
1395 } IfxScu_PMCSR_REQSLP;
1396
1397 /******************************************************************************/
1398
1399 #endif /* IFXSCU_CFG_H */
IfxScu_CCUCON1_INSEL
IfxScu_CCUCON1_INSEL
Definition: IfxScu_cfg.h:1375
IfxScu_PMCSR_REQSLP_Idle
Definition: IfxScu_cfg.h:1392
IfxScu_CCUCON0_CLKSEL_fPll
Definition: IfxScu_cfg.h:1371
IfxScu_WDTCON1_IR_divBy256
Definition: IfxScu_cfg.h:1385
IfxScu_WDTCON1_IR
IfxScu_WDTCON1_IR
Definition: IfxScu_cfg.h:1382
IfxScu_CCUCON1_INSEL_fOsc0
Definition: IfxScu_cfg.h:1378
IfxScu_PMCSR_REQSLP
IfxScu_PMCSR_REQSLP
Definition: IfxScu_cfg.h:1389
IfxScu_PMCSR_REQSLP_Run
Definition: IfxScu_cfg.h:1391
IfxScu_CCUCON0_CLKSEL
IfxScu_CCUCON0_CLKSEL
Definition: IfxScu_cfg.h:1368
IfxScu_PMCSR_REQSLP_Stby
Definition: IfxScu_cfg.h:1394
IfxScu_CCUCON0_CLKSEL_fBack
Definition: IfxScu_cfg.h:1370
IfxScu_PMCSR_REQSLP_Sleep
Definition: IfxScu_cfg.h:1393
IfxScu_WDTCON1_IR_divBy64
Definition: IfxScu_cfg.h:1386
IfxScu_CCUCON1_INSEL_fOsc1
Definition: IfxScu_cfg.h:1377
IfxScu_WDTCON1_IR_divBy16384
Definition: IfxScu_cfg.h:1384


iLLD_TC26B: IfxScuCcu.c Source File

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IfxScuCcu.c
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1 /**
2 * \file IfxScuCcu.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxScuCcu.h"
31
32 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
33 * \{ */
34
35 /******************************************************************************/
36 /*-----------------------Private Function Prototypes--------------------------*/
37 /******************************************************************************/
38
39 /** \brief Check if oscillator is stable.
40 * \return Status of oscillator stability
41 * \retval TRUE: Oscillator is unstable
42 * \retval FALSE: Oscillator is stable
43 */
44 IFX_STATIC boolean IfxScuCcu_isOscillatorStable(void);
45
46 /** \brief API to wait for requested duration.
47 * Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled
48 * \return None
49 */
50 IFX_STATIC void IfxScuCcu_wait(float32 timeSec);
51
52 /** \} */
53
54 /******************************************************************************/
55 /*------------------------Private Variables/Constants-------------------------*/
56 /******************************************************************************/
57
58 /** \brief Default configuration for the PLL initial steps
59 * This is a structure array and the values are defined at the Scu implementation as a macro
60 */
61 IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[] = {
62 IFXSCU_CFG_PLL_STEPS
63 };
64
65 /** \brief Crystal Frequency
66 */
67 IFX_STATIC uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY;
68
69 /******************************************************************************/
70 /*-----------------------Exported Variables/Constants-------------------------*/
71 /******************************************************************************/
72
73 IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig = {
74 {
75 sizeof(IfxScuCcu_aDefaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
76 (IfxScuCcu_PllStepsConfig *)IfxScuCcu_aDefaultPllConfigSteps,
77 IFXSCU_CFG_PLL_INITIAL_STEP,
78 },
79 IFXSCU_CFG_CLK_DISTRIBUTION,
80 IFXSCU_CFG_FLASH_WAITSTATE,
81 IFX_CFG_SCU_XTAL_FREQUENCY,
82 };
83
84 IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig = {
85 /*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/
86 {(1 - 1), (24 - 1), (6 - 1), 0}
87 };
88
89 /******************************************************************************/
90 /*-------------------------Function Implementations---------------------------*/
91 /******************************************************************************/
92
93 boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll)
94 {
95 boolean retVal = 0;
96 uint8 deviationAllowed = 2;
97 uint32 fOsc = cfg->xtalFrequency;
98
99 // Dynamic PLL calculation Alg
100 /*
101 *
102 * fPLL = (N /( P * K2)) * fOSC
103 * */
104 {
105 const uint32 fPllMax = 200000000;
106 const uint32 fRefMax = 24000000;
107 const uint32 fRefMin = 8000000;
108 const uint32 fVcoMin = 400000000;
109 const uint32 fVcoMax = 800000000;
110 const uint8 pMin = 1;
111 const uint8 pMax = 16; // '4 bits
112 const uint8 k2Min = 1;
113 const uint8 k2Max = 128; // '7bits
114 const uint8 nMin = 1;
115 const uint8 nMax = 128; // '7bits
116
117 uint32 p;
118 uint32 n;
119 uint32 k2;
120 uint32 k2Steps;
121 uint32 bestK2 = 0, bestN = 0, bestP = 0;
122
123 uint64 fRef, fVco;
124 uint64 fPllLeastError;
125
126 fPllLeastError = fPllMax;
127
128 //' K2+1 div should be even for 50% duty cycle
129 k2Steps = 2;
130
131 if (fPll > 240000000)
132 {
133 k2Steps = 1;
134 }
135
136 for (p = pMax; p >= pMin; p--)
137 {
138 fRef = (fOsc / p);
139
140 if ((fRef >= fRefMin) && (fRef <= fRefMax))
141 {
142 for (k2 = k2Min; k2 <= k2Max; k2 += k2Steps)
143 {
144 fVco = ((uint64)fPll) * k2;
145
146 if ((fVco >= fVcoMin) && (fVco <= fVcoMax))
147 {
148 for (n = nMin; n <= nMax; n++)
149 {
150 uint64 fPllError;
151 fPllError = ((((n) / (p * k2)) * fOsc) - fPll);
152
153 if (fPllError == 0)
154 {
155 fPllLeastError = fPllError;
156 bestK2 = k2;
157 bestN = n;
158 bestP = p;
159
160 goto EXITCALC_LOOP;
161 }
162
163 if (fPllLeastError > fPllError)
164 {
165 fPllLeastError = fPllError;
166 bestK2 = k2;
167 bestN = n;
168 bestP = p;
169 }
170 }
171 }
172 }
173 }
174 }
175
176 EXITCALC_LOOP:
177
178 if ((fPllLeastError) < ((fPll * deviationAllowed) / 100)) // percent ALLOWED_DEVIATION error allowed
179 {
180 cfg->sysPll.pllInitialStep.nDivider = (uint8)(bestN - 1);
181 cfg->sysPll.pllInitialStep.pDivider = (uint8)(bestP - 1);
182 cfg->sysPll.pllInitialStep.k2Initial = (uint8)(bestK2 - 1);
183 cfg->sysPll.pllInitialStep.waitTime = 0; // wait time = 0
184 cfg->sysPll.numOfPllDividerSteps = 0; // no step clock incr
185 }
186 else
187 {
188 retVal = 1;
189 }
190 }
191 return retVal;
192 }
193
194
195 float32 IfxScuCcu_getBaud1Frequency(void)
196 {
197 float32 frequency;
198 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
199
200 if (ccucon0.B.BAUD1DIV == 0)
201 {
202 frequency = 0;
203 }
204 else
205 {
206 frequency = IfxScuCcu_getMaxFrequency() / ccucon0.B.BAUD1DIV;
207 }
208
209 return frequency;
210 }
211
212
213 float32 IfxScuCcu_getBaud2Frequency(void)
214 {
215 float32 frequency;
216 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
217
218 if (ccucon0.B.BAUD2DIV == 0)
219 {
220 frequency = 0;
221 }
222 else
223 {
224 frequency = IfxScuCcu_getMaxFrequency() / ccucon0.B.BAUD2DIV;
225 }
226
227 return frequency;
228 }
229
230
231 float32 IfxScuCcu_getBbbFrequency(void)
232 {
233 float32 bbbFrequency;
234 float32 sourceFrequency;
235
236 sourceFrequency = IfxScuCcu_getSourceFrequency();
237
238 switch (SCU_CCUCON0.B.LPDIV)
239 {
240 case 0: /*Not in low power mode */
241
242 if (SCU_CCUCON2.B.BBBDIV == 0)
243 {
244 bbbFrequency = 0.0;
245 }
246 else
247 {
248 bbbFrequency = sourceFrequency / SCU_CCUCON2.B.BBBDIV;
249 }
250
251 break;
252 case 1:
253 bbbFrequency = sourceFrequency / 30;
254 break;
255 case 2:
256 bbbFrequency = sourceFrequency / 60;
257 break;
258 case 3:
259 bbbFrequency = sourceFrequency / 120;
260 break;
261 case 4:
262 bbbFrequency = sourceFrequency / 240;
263 break;
264 default:
265 bbbFrequency = 0.0;
266 break;
267 }
268
269 return bbbFrequency;
270 }
271
272
273 float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
274 {
275 float32 frequency = IfxScuCcu_getSriFrequency();
276 uint32 cpuDiv = 0;
277
278 switch (cpu)
279 {
280 case IfxCpu_ResourceCpu_0:
281 cpuDiv = SCU_CCUCON6.U;
282 break;
283 case IfxCpu_ResourceCpu_1:
284 cpuDiv = SCU_CCUCON7.U;
285 break;
286 default:
287 frequency = 0.0;
288 break;
289 }
290
291 if (cpuDiv != 0)
292 {
293 frequency = frequency * (cpuDiv / 64.0f);
294 }
295
296 return frequency;
297 }
298
299
300 float32 IfxScuCcu_getFsi2Frequency(void)
301 {
302 float32 frequency;
303 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
304
305 if (ccucon0.B.FSI2DIV == 0)
306 {
307 frequency = 0;
308 }
309 else
310 {
311 frequency = IfxScuCcu_getSriFrequency();
312
313 if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
314 {
315 frequency = frequency / ccucon0.B.FSI2DIV;
316 }
317 }
318
319 return frequency;
320 }
321
322
323 float32 IfxScuCcu_getFsiFrequency(void)
324 {
325 float32 frequency;
326 Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
327
328 if (ccucon0.B.FSIDIV == 0)
329 {
330 frequency = 0;
331 }
332 else
333 {
334 frequency = IfxScuCcu_getSriFrequency();
335
336 if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
337 {
338 frequency = frequency / ccucon0.B.FSIDIV;
339 }
340 }
341
342 return frequency;
343 }
344
345
346 float32 IfxScuCcu_getMaxFrequency(void)
347 {
348 float32 maxFrequency;
349 float32 sourceFrequency;
350 sourceFrequency = IfxScuCcu_getSourceFrequency();
351
352 switch (SCU_CCUCON0.B.LPDIV)
353 {
354 case 0: /*Not in low power mode */
355
356 if (SCU_CCUCON5.B.MAXDIV == 0)
357 {
358 maxFrequency = sourceFrequency;
359 }
360 else
361 {
362 maxFrequency = sourceFrequency / SCU_CCUCON5.B.MAXDIV;
363 }
364
365 break;
366 case 1:
367 maxFrequency = sourceFrequency / 15;
368 break;
369 case 2:
370 maxFrequency = sourceFrequency / 30;
371 break;
372 case 3:
373 maxFrequency = sourceFrequency / 60;
374 break;
375 case 4:
376 maxFrequency = sourceFrequency / 120;
377 break;
378 default:
379 maxFrequency = 0.0;
380 break;
381 }
382
383 return maxFrequency;
384 }
385
386
387 float32 IfxScuCcu_getModuleFrequency(void)
388 {
389 float32 spbFreq;
390 float32 moduleFreq;
391 Ifx_SCU_FDR scuFdr;
392 scuFdr = SCU_FDR;
393 spbFreq = IfxScuCcu_getSpbFrequency();
394
395 if (scuFdr.B.DM == 1)
396 {
397 moduleFreq = spbFreq / (1024 - scuFdr.B.STEP);
398 }
399 else if (scuFdr.B.DM == 2)
400 {
401 moduleFreq = (spbFreq * scuFdr.B.STEP) / 1024;
402 }
403 else
404 {
405 moduleFreq = 0;
406 }
407
408 return moduleFreq;
409 }
410
411
412 float32 IfxScuCcu_getOsc0Frequency(void)
413 {
414 return (float32)IfxScuCcu_xtalFrequency;
415 }
416
417
418 float32 IfxScuCcu_getOscFrequency(void)
419 {
420 float32 freq;
421
422 if (SCU_CCUCON1.B.INSEL == IfxScu_CCUCON1_INSEL_fOsc1)
423 {
424 freq = IFXSCU_EVR_OSC_FREQUENCY;
425 }
426 else if (SCU_CCUCON1.B.INSEL == IfxScu_CCUCON1_INSEL_fOsc0)
427 {
428 freq = (float32)IfxScuCcu_xtalFrequency;
429 }
430 else
431 {
432 /* Reserved values, this */
433 freq = 0.0;
434 }
435
436 return freq;
437 }
438
439
440 float32 IfxScuCcu_getPllErayFrequency(void)
441 {
442 Ifx_SCU *scu = &MODULE_SCU;
443 float32 oscFreq;
444 float32 freq;
445
446 oscFreq = IfxScuCcu_getOscFrequency();
447
448 if (scu->PLLERAYSTAT.B.VCOBYST == 1)
449 {
450 /* Prescaler mode */
451 freq = oscFreq / (scu->PLLERAYCON1.B.K1DIV + 1);
452 }
453 else if (scu->PLLERAYSTAT.B.FINDIS == 1)
454 {
455 /* Free running mode */
456 freq = IFXSCU_VCO_BASE_FREQUENCY / (scu->PLLERAYCON1.B.K2DIV + 1);
457 }
458 else
459 {
460 /* Normal mode */
461 freq = (oscFreq * (scu->PLLERAYCON0.B.NDIV + 1)) / (scu->PLLERAYCON1.B.K2DIV + 1);
462 }
463
464 return freq;
465 }
466
467
468 float32 IfxScuCcu_getPllErayVcoFrequency(void)
469 {
470 float32 vcoFreq;
471
472 if (SCU_PLLERAYSTAT.B.FINDIS == 1)
473 {
474 /* Free running mode */
475 vcoFreq = IFXSCU_VCO_BASE_FREQUENCY;
476 }
477 else
478 {
479 /* Normal mode */
480 vcoFreq = (IfxScuCcu_getOscFrequency() * (SCU_PLLERAYCON0.B.NDIV + 1)) / (SCU_PLLERAYCON0.B.PDIV + 1);
481 }
482
483 return vcoFreq;
484 }
485
486
487 float32 IfxScuCcu_getPllFrequency(void)
488 {
489 Ifx_SCU *scu = &MODULE_SCU;
490 float32 oscFreq;
491 float32 freq;
492
493 oscFreq = IfxScuCcu_getOscFrequency();
494
495 if (scu->PLLSTAT.B.VCOBYST == 1)
496 {
497 /* Prescaler mode */
498 freq = oscFreq / (scu->PLLCON1.B.K1DIV + 1);
499 }
500 else if (scu->PLLSTAT.B.FINDIS == 1)
501 {
502 /* Free running mode */
503 freq = IFXSCU_VCO_BASE_FREQUENCY / (scu->PLLCON1.B.K2DIV + 1);
504 }
505 else
506 {
507 /* Normal mode */
508 freq = (oscFreq * (scu->PLLCON0.B.NDIV + 1)) / ((scu->PLLCON1.B.K2DIV + 1) * (scu->PLLCON0.B.PDIV + 1));
509 }
510
511 return freq;
512 }
513
514
515 float32 IfxScuCcu_getPllVcoFrequency(void)
516 {
517 float32 vcoFreq;
518
519 if (SCU_PLLSTAT.B.FINDIS == 1)
520 {
521 /* Free running mode */
522 vcoFreq = IFXSCU_VCO_BASE_FREQUENCY;
523 }
524 else
525 {
526 /* Normal mode */
527 vcoFreq = (IfxScuCcu_getOscFrequency() * (SCU_PLLCON0.B.NDIV + 1)) / (SCU_PLLCON0.B.PDIV + 1);
528 }
529
530 return vcoFreq;
531 }
532
533
534 float32 IfxScuCcu_getSourceFrequency(void)
535 {
536 float32 sourcefreq;
537
538 switch (SCU_CCUCON0.B.CLKSEL)
539 {
540 case IfxScu_CCUCON0_CLKSEL_fBack:
541 sourcefreq = IfxScuCcu_getEvrFrequency();
542 break;
543 case IfxScu_CCUCON0_CLKSEL_fPll:
544 sourcefreq = IfxScuCcu_getPllFrequency();
545 break;
546 default:
547 sourcefreq = 0;
548 break;
549 }
550
551 return sourcefreq;
552 }
553
554
555 float32 IfxScuCcu_getSpbFrequency(void)
556 {
557 float32 spbFrequency;
558 float32 sourceFrequency;
559
560 sourceFrequency = IfxScuCcu_getSourceFrequency();
561
562 switch (SCU_CCUCON0.B.LPDIV)
563 {
564 case 0: /*Not in low power mode */
565
566 if (SCU_CCUCON0.B.SPBDIV == 0)
567 {
568 spbFrequency = 0.0;
569 }
570 else
571 {
572 spbFrequency = sourceFrequency / SCU_CCUCON0.B.SPBDIV;
573 }
574
575 break;
576 case 1:
577 spbFrequency = sourceFrequency / 30;
578 break;
579 case 2:
580 spbFrequency = sourceFrequency / 60;
581 break;
582 case 3:
583 spbFrequency = sourceFrequency / 120;
584 break;
585 case 4:
586 spbFrequency = sourceFrequency / 240;
587 break;
588 default:
589 spbFrequency = 0.0;
590 break;
591 }
592
593 return spbFrequency;
594 }
595
596
597 float32 IfxScuCcu_getSriFrequency(void)
598 {
599 float32 sriFrequency;
600 float32 sourceFrequency;
601
602 sourceFrequency = IfxScuCcu_getSourceFrequency();
603
604 switch (SCU_CCUCON0.B.LPDIV)
605 {
606 case 0: /*Not in low power mode */
607
608 if (SCU_CCUCON0.B.SRIDIV == 0)
609 {
610 sriFrequency = 0.0;
611 }
612 else
613 {
614 sriFrequency = sourceFrequency / SCU_CCUCON0.B.SRIDIV;
615 }
616
617 break;
618 case 1:
619 sriFrequency = sourceFrequency / 30;
620 break;
621 case 2:
622 sriFrequency = sourceFrequency / 60;
623 break;
624 case 3:
625 sriFrequency = sourceFrequency / 120;
626 break;
627 case 4:
628 sriFrequency = sourceFrequency / 240;
629 break;
630 default:
631 sriFrequency = 0.0;
632 break;
633 }
634
635 return sriFrequency;
636 }
637
638
639 boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg)
640 {
641 uint8 smuTrapEnable;
642 uint16 endinit_pw, endinitSfty_pw;
643 boolean status = 0;
644 /* Store the crystal frequency */
645 IfxScuCcu_xtalFrequency = cfg->xtalFrequency;
646
647 endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
648 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
649
650 {
651 /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
652 IfxScuWdt_clearCpuEndinit(endinit_pw);
653 smuTrapEnable = SCU_TRAPDIS.B.SMUT;
654 SCU_TRAPDIS.B.SMUT = 1U;
655 IfxScuWdt_setCpuEndinit(endinit_pw);
656 }
657
658 {
659 /* Select fback (fosc-evr) as CCU input clock */
660 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
661
662 while (SCU_CCUCON0.B.LCK != 0U)
663 {
664 /*Wait till ccucon0 lock is set */
665 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
666 }
667
668 SCU_CCUCON0.B.CLKSEL = 0; /*Select the EVR as fOSC for the clock distribution */
669 SCU_CCUCON0.B.UP = 1; /*Update the ccucon0 register */
670
671 /* Disconnet PLL (SETFINDIS=1): oscillator clock is disconnected from PLL */
672 SCU_PLLCON0.B.SETFINDIS = 1;
673 /* Now PLL is in free running mode */
674
675 /* Select Clock Source as PLL input clock */
676 while (SCU_CCUCON0.B.LCK != 0U)
677 {
678 /*Wait till ccucon0 lock is set */
679 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
680 }
681
682 SCU_CCUCON1.B.INSEL = 1; /*Select oscillator OSC0 as clock to PLL */
683 SCU_CCUCON1.B.UP = 1; /*Update the ccucon0 register */
684
685 status |= IfxScuCcu_isOscillatorStable();
686
687 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
688 }
689
690 if (status == 0)
691 {
692 /*Start the PLL configuration sequence */
693 uint8 pllStepsCount;
694
695 /*Setting up P N and K2 values equate pll to evr osc freq */
696 {
697 {
698 /*Set the K2 divider value for the step corresponding to step count */
699 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
700
701 while (SCU_PLLSTAT.B.K2RDY == 0U)
702 {
703 /*Wait until K2 divider is ready */
704 /*No "timeout" required because Safety Endinit will give a trap */
705 }
706
707 SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllInitialStep.k2Initial;
708
709 {
710 /*change P and N divider values */
711 SCU_PLLCON0.B.PDIV = cfg->sysPll.pllInitialStep.pDivider;
712 SCU_PLLCON0.B.NDIV = cfg->sysPll.pllInitialStep.nDivider;
713
714 /* Disable oscillator disconnect feature
715 * in case of PLL unlock, PLL stays connected to fref */
716 SCU_PLLCON0.B.OSCDISCDIS = 1;
717 // workaround for Errata: PLL TC 005
718 SCU_PLLCON0.B.PLLPWD = 0; // set PLL to power down
719 /* Connect PLL to fREF as oscillator clock is connected to PLL */
720 SCU_PLLCON0.B.CLRFINDIS = 1;
721 SCU_PLLCON0.B.PLLPWD = 1; // set PLL to normal
722
723 /* Restart PLL lock detection (RESLD = 1) */
724 SCU_PLLCON0.B.RESLD = 1;
725
726 IfxScuCcu_wait(0.000050F); /*Wait for 50us */
727
728 while (SCU_PLLSTAT.B.VCOLOCK == 0U)
729 {
730 /* Wait for PLL lock */
731 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
732 }
733
734 SCU_PLLCON0.B.VCOBYP = 0; /*VCO bypass disabled */
735
736 while (SCU_CCUCON0.B.LCK != 0U)
737 {
738 /*Wait till ccucon registers can be written with new value */
739 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
740 }
741
742 SCU_CCUCON0.B.CLKSEL = 0x01;
743
744 /*Configure the clock distribution */
745 while (SCU_CCUCON0.B.LCK != 0U)
746 {
747 /*Wait till ccucon registers can be written with new value */
748 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
749 }
750
751 /*Wait until the initial clock configurations take in to effect for the PLL*/
752 IfxScuCcu_wait(cfg->sysPll.pllInitialStep.waitTime); /*Wait for configured initial time */
753
754 { /*Write CCUCON0 configuration */
755 Ifx_SCU_CCUCON0 ccucon0;
756 ccucon0.U = SCU_CCUCON0.U & ~cfg->clockDistribution.ccucon0.mask;
757 /*update with configured value */
758 ccucon0.U |= (cfg->clockDistribution.ccucon0.mask & cfg->clockDistribution.ccucon0.value);
759 ccucon0.B.CLKSEL = 0x01; /* Select fpll as CCU input clock, even if this was not selected by configuration */
760 ccucon0.B.UP = 1;
761 SCU_CCUCON0 = ccucon0; /*Set update bit explicitly to make above configurations effective */
762 }
763
764 while (SCU_CCUCON1.B.LCK != 0U)
765 {
766 /*Wait till ccucon registers can be written with new value */
767 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
768 }
769
770 {
771 /*Write CCUCON1 configuration */
772 Ifx_SCU_CCUCON1 ccucon1;
773 ccucon1.U = SCU_CCUCON1.U & ~cfg->clockDistribution.ccucon1.mask;
774 /*update with configured value */
775 ccucon1.U |= (cfg->clockDistribution.ccucon1.mask & cfg->clockDistribution.ccucon1.value);
776 ccucon1.B.INSEL = 1;
777 ccucon1.B.UP = 1;
778 SCU_CCUCON1 = ccucon1;
779 }
780
781 while (SCU_CCUCON2.B.LCK != 0U)
782 {
783 /*Wait till ccucon registers can be written with new value */
784 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
785 }
786
787 {
788 /*Write CCUCON2 configuration */
789 Ifx_SCU_CCUCON2 ccucon2;
790 ccucon2.U = SCU_CCUCON2.U & ~cfg->clockDistribution.ccucon2.mask;
791 /*update with configured value */
792 ccucon2.U |= (cfg->clockDistribution.ccucon2.mask & cfg->clockDistribution.ccucon2.value);
793 ccucon2.B.UP = 1;
794 SCU_CCUCON2 = ccucon2;
795 }
796
797 while (SCU_CCUCON5.B.LCK != 0U)
798 { /*Wait till ccucon registers can be written with new value */
799 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
800 }
801
802 { /*Write CCUCON5 configuration */
803 Ifx_SCU_CCUCON5 ccucon5;
804 ccucon5.U = SCU_CCUCON5.U & ~cfg->clockDistribution.ccucon5.mask;
805 /*update with configured value */
806 ccucon5.U |= (cfg->clockDistribution.ccucon5.mask & cfg->clockDistribution.ccucon5.value);
807 ccucon5.B.UP = 1;
808 SCU_CCUCON5 = ccucon5;
809 }
810
811 { /*Write CCUCON6 configuration */
812 Ifx_SCU_CCUCON6 ccucon6;
813 ccucon6.U = SCU_CCUCON6.U & ~cfg->clockDistribution.ccucon6.mask;
814 /*update with configured value */
815 ccucon6.U |= (cfg->clockDistribution.ccucon6.mask & cfg->clockDistribution.ccucon6.value);
816 SCU_CCUCON6 = ccucon6;
817 }
818
819 {
820 /*Write CCUCON7 configuration */
821 Ifx_SCU_CCUCON7 ccucon7;
822 ccucon7.U = SCU_CCUCON7.U & ~cfg->clockDistribution.ccucon7.mask;
823 /*update with configured value */
824 ccucon7.U |= (cfg->clockDistribution.ccucon7.mask & cfg->clockDistribution.ccucon7.value);
825 SCU_CCUCON7 = ccucon7;
826 }
827 }
828
829 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
830 }
831 }
832
833 { /*Write Flash waitstate configuration */
834 Ifx_FLASH_FCON fcon;
835 fcon.U = FLASH0_FCON.U & ~cfg->flashFconWaitStateConfig.mask;
836
837 /*update with configured value */
838 fcon.U &= ~cfg->flashFconWaitStateConfig.mask;
839 fcon.U |= (cfg->flashFconWaitStateConfig.mask & cfg->flashFconWaitStateConfig.value);
840 {
841 IfxScuWdt_clearCpuEndinit(endinit_pw);
842 FLASH0_FCON = fcon;
843 IfxScuWdt_setCpuEndinit(endinit_pw);
844 }
845 }
846
847 /*Start Pll ramp up sequence */
848 for (pllStepsCount = 0; pllStepsCount < cfg->sysPll.numOfPllDividerSteps; pllStepsCount++)
849 { /*iterate through number of pll steps */
850 {
851 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
852
853 /*Configure K2 divider */
854 while (SCU_PLLSTAT.B.K2RDY == 0U)
855 {
856 /*Wait until K2 divider is ready */
857 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
858 }
859
860 /*Now set the K2 divider value for the step corresponding to step count */
861 SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllDividerStep[pllStepsCount].k2Step;
862 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
863 }
864
865 /*call the hook function if configured */
866 if (cfg->sysPll.pllDividerStep[pllStepsCount].hookFunction != (IfxScuCcu_PllStepsFunctionHook)0)
867 {
868 cfg->sysPll.pllDividerStep[pllStepsCount].hookFunction();
869 }
870
871 /*Wait for waitCounter corresponding to the pll step */
872 IfxScuCcu_wait(cfg->sysPll.pllDividerStep[pllStepsCount].waitTime);
873 }
874 }
875
876 { /* Enable oscillator disconnect feature */
877 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
878 SCU_PLLCON0.B.OSCDISCDIS = 0U;
879 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
880 }
881 {
882 /* Enable VCO unlock Trap if it was disabled before */
883 IfxScuWdt_clearCpuEndinit(endinit_pw);
884 SCU_TRAPCLR.B.SMUT = 1U;
885 SCU_TRAPDIS.B.SMUT = smuTrapEnable;
886 IfxScuWdt_setCpuEndinit(endinit_pw);
887 }
888 return status;
889 }
890
891
892 void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
893 {
894 *cfg = IfxScuCcu_defaultClockConfig;
895 }
896
897
898 boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg)
899 {
900 uint8 smuTrapEnable;
901 uint16 endinit_pw, endinitSfty_pw;
902 boolean status = 0;
903
904 endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
905 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
906
907 { /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
908 IfxScuWdt_clearCpuEndinit(endinit_pw);
909 smuTrapEnable = SCU_TRAPDIS.B.SMUT;
910 SCU_TRAPDIS.B.SMUT = 1U;
911 IfxScuWdt_setCpuEndinit(endinit_pw);
912 }
913 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
914
915 // ensure that PLL enabled
916 if (!SCU_PLLERAYCON0.B.PLLPWD || SCU_PLLERAYCON0.B.VCOPWD || SCU_PLLERAYSTAT.B.PWDSTAT)
917 { // PLLPWD=0 or VCOPWD=1 or PWDSTAT=1?
918 // enable PLL and leave power saving mode
919 SCU_PLLERAYCON0.B.PLLPWD = 1;
920 SCU_PLLERAYCON0.B.VCOPWD = 0;
921
922 while (SCU_PLLERAYSTAT.B.PWDSTAT) // poll PWDSTAT
923 {}
924
925 /*Wait for waitCounter corresponding to the pll step */
926 IfxScuCcu_wait(cfg->pllInitialStep.waitTime);
927 }
928
929 /* Enter Prescalar mode */
930 /* Update K and N dividers */
931 if (!SCU_PLLERAYSTAT.B.VCOBYST) // checking PLLERAYBYPST flag
932 { // select "secure" K1 value - please check @silicon if K1=4 is ok
933 while (!SCU_PLLERAYSTAT.B.K1RDY) // poll K1RDY before changing K
934 {}
935
936 SCU_PLLERAYCON1.B.K1DIV = 3;
937
938 // activate VCO bypass (bit 0: VCOBYP=1)
939 SCU_PLLERAYCON0.B.VCOBYP = 1;
940 }
941
942 while (!SCU_PLLERAYSTAT.B.K2RDY) // poll K1RDY before changing K
943 {}
944
945 SCU_PLLERAYCON1.B.K2DIV = cfg->pllInitialStep.k2Initial;
946 SCU_PLLERAYCON0.B.PDIV = cfg->pllInitialStep.pDivider;
947 SCU_PLLERAYCON0.B.NDIV = cfg->pllInitialStep.nDivider;
948 /*
949 * RESLD = 1 ==> Restart VCO lock detection
950 * CLRFINDIS = 1 ==> Connect OSC to PLL
951 * PLLPWD = 1 ==> PLL Power Saving Mode : Normal behaviour
952 * NDIV = NDIV
953 */
954
955 SCU_PLLERAYCON0.B.RESLD = 1U;
956 SCU_PLLERAYCON0.B.CLRFINDIS = 1U;
957
958 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
959
960 // Wait until VCO LOCK bit is set
961 uint32 time_out_ctr = 50000; // higher time out value as for clib_pll, since system is clocked much faster while polling the lock flag
962
963 while (--time_out_ctr && !SCU_PLLERAYSTAT.B.VCOLOCK)
964 {}
965
966 // check for timeout, exit immediately (don't disable VCO bypass) of not locked
967 if (!time_out_ctr)
968 {
969 status = TRUE;
970 }
971
972 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
973 /*Bypass VCO*/
974 SCU_PLLERAYCON0.B.VCOBYP = 0U;
975
976 // wait until bypass has been deactivated
977 while (SCU_PLLERAYSTAT.B.VCOBYST) // poll VCOBYST
978 {}
979
980 if (!SCU_PLLERAYSTAT.B.VCOLOCK)
981 {
982 status = TRUE;
983 }
984
985 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
986
987 { /* Enable VCO unlock Trap if it was disabled before */
988 IfxScuWdt_clearCpuEndinit(endinit_pw);
989 SCU_TRAPCLR.B.SMUT = 1U;
990 SCU_TRAPDIS.B.SMUT = smuTrapEnable;
991 IfxScuWdt_setCpuEndinit(endinit_pw);
992 }
993 return status;
994 }
995
996
997 void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg)
998 {
999 *cfg = IfxScuCcu_defaultErayPllConfig;
1000 }
1001
1002
1003 IFX_STATIC boolean IfxScuCcu_isOscillatorStable(void)
1004 {
1005 sint32 TimeoutCtr = IFXSCUCCU_OSC_STABLECHK_TIME;
1006 boolean status = 0;
1007
1008 uint16 endinitPw = IfxScuWdt_getCpuWatchdogPassword();
1009
1010 /* Mode External Crystal / Ceramic Resonator Mode and External Input Clock.
1011 * The oscillator Power-Saving Mode is not entered
1012 */
1013 SCU_OSCCON.B.MODE = 0U;
1014
1015 /* OSCVAL defines the divider value that generates the reference clock
1016 * that is supervised by the oscillator watchdog.
1017 * fOSC / (OSCVAL + 1) ~ 2.5Mhz => OSCVAL = (fOSC / 2.5Mhz) - 1 */
1018
1019 SCU_OSCCON.B.OSCVAL = ((uint32)IfxScuCcu_xtalFrequency / 2500000) - 1;
1020
1021 /* The Oscillator Watchdog of the PLL is cleared and restarted */
1022 SCU_OSCCON.B.OSCRES = 1U;
1023
1024 /* wait until PLLLV and PLLHV flags are set */
1025 while ((SCU_OSCCON.B.PLLLV == 0) || (SCU_OSCCON.B.PLLHV == 0))
1026 {
1027 TimeoutCtr--;
1028
1029 if (TimeoutCtr == 0)
1030 {
1031 status = 1;
1032 break;
1033 }
1034 }
1035
1036 {
1037 /* clear and then set SMU trap (oscillator watchdog and unlock detection) */
1038 IfxScuWdt_clearCpuEndinit(endinitPw);
1039 SCU_TRAPCLR.B.SMUT = 1U; /* TODO Can this be removed? */
1040 SCU_TRAPDIS.B.SMUT = 1U; /* TODO Can this be removed? */
1041 IfxScuWdt_setCpuEndinit(endinitPw);
1042 }
1043
1044 return status;
1045 }
1046
1047
1048 float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
1049 {
1050 uint16 endinitSfty_pw;
1051 float32 sriFreq;
1052 uint32 cpuDiv;
1053
1054 sriFreq = IfxScuCcu_getSriFrequency();
1055
1056 if (cpuFreq >= sriFreq)
1057 {
1058 cpuDiv = 0;
1059 }
1060 else
1061 {
1062 cpuDiv = (uint32)((cpuFreq * 64) / sriFreq);
1063 }
1064
1065 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1066
1067 {
1068 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1069
1070 switch (cpu)
1071 {
1072 case IfxCpu_ResourceCpu_0:
1073 SCU_CCUCON6.U = cpuDiv;
1074 break;
1075 case IfxCpu_ResourceCpu_1:
1076 SCU_CCUCON7.U = cpuDiv;
1077 break;
1078
1079 default:
1080 break;
1081 }
1082
1083 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1084 }
1085
1086 if (cpuDiv != 0)
1087 {
1088 sriFreq = sriFreq * (cpuDiv / 64.0f);
1089 }
1090
1091 return sriFreq;
1092 }
1093
1094
1095 float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
1096 {
1097 uint16 l_SEndInitPW;
1098 Ifx_SCU_CCUCON1 ccucon1 = SCU_CCUCON1;
1099
1100 float32 inputFreq = IfxScuCcu_getSourceFrequency();
1101 uint32 gtmDiv = (uint32)__roundf(inputFreq / gtmFreq);
1102 gtmDiv = __maxu(gtmDiv, 1);
1103
1104 /*gtmDiv = gtmDiv & 0x2U;*//* only even dividers */
1105 if ((gtmDiv >= 7) && (gtmDiv < 14) && ((gtmDiv & 1) == 1))
1106 {
1107 gtmDiv = gtmDiv - 1;
1108 }
1109
1110 if (gtmDiv == 14)
1111 {
1112 gtmDiv = 12;
1113 }
1114
1115 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1116 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1117
1118 while (SCU_CCUCON1.B.LCK != 0U)
1119 {}
1120
1121 ccucon1.B.GTMDIV = gtmDiv;
1122 ccucon1.B.UP = 1U;
1123 SCU_CCUCON1.U = ccucon1.U;
1124
1125 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1126
1127 return IfxScuCcu_getGtmFrequency();
1128 }
1129
1130
1131 float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq)
1132 {
1133 uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
1134 uint32 pll2Div = (uint32)((IfxScuCcu_getPllErayVcoFrequency() / pll2ErayFreq) - 1);
1135 {
1136 IfxScuWdt_clearSafetyEndinit(password);
1137 SCU_PLLERAYCON1.B.K3DIV = pll2Div;
1138 IfxScuWdt_setSafetyEndinit(password);
1139 }
1140 return IfxScuCcu_getPll2ErayFrequency();
1141 }
1142
1143
1144 float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq)
1145 {
1146 uint16 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1147 uint32 pll2Div = (uint32)((IfxScuCcu_getPllVcoFrequency() / pll2Freq) - 1);
1148 {
1149 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1150 SCU_PLLCON1.B.K3DIV = pll2Div;
1151 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1152 }
1153 return IfxScuCcu_getPll2Frequency();
1154 }
1155
1156
1157 float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
1158 {
1159 /* TODO: check whether it is necessary to disable trap and/or the safety */
1160 uint16 l_EndInitPW;
1161 uint16 l_SEndInitPW;
1162 Ifx_SCU_CCUCON0 ccucon0;
1163 float32 inputFreq = IfxScuCcu_getSourceFrequency();
1164 uint32 spbDiv = (uint32)(inputFreq / spbFreq);
1165 spbDiv = __maxu(spbDiv, 2);
1166
1167 if ((spbDiv >= 7) && (spbDiv < 14) && ((spbDiv & 1) == 1))
1168 {
1169 spbDiv = spbDiv - 1;
1170 }
1171
1172 if (spbDiv == 14)
1173 {
1174 spbDiv = 12;
1175 }
1176
1177 l_EndInitPW = IfxScuWdt_getCpuWatchdogPassword();
1178 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1179
1180 IfxScuWdt_clearCpuEndinit(l_EndInitPW);
1181 SCU_TRAPDIS.U = SCU_TRAPDIS.U | 0x3E0U;
1182 IfxScuWdt_setCpuEndinit(l_EndInitPW);
1183
1184 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1185
1186 while (SCU_CCUCON0.B.LCK != 0U)
1187 {}
1188
1189 ccucon0.U = SCU_CCUCON0.U;
1190 ccucon0.B.SPBDIV = spbDiv;
1191 ccucon0.B.UP = 1;
1192 SCU_CCUCON0.U = ccucon0.U;
1193 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1194
1195 IfxScuWdt_clearCpuEndinit(l_EndInitPW);
1196 SCU_TRAPDIS.U = SCU_TRAPDIS.U & (uint32)~0x3E0UL;
1197 IfxScuWdt_setCpuEndinit(l_EndInitPW);
1198
1199 while (SCU_CCUCON0.B.LCK != 0U)
1200 {}
1201
1202 return IfxScuCcu_getSpbFrequency();
1203 }
1204
1205
1206 float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
1207 {
1208 float32 freq = 0;
1209 float32 source = IfxScuCcu_getSourceFrequency();
1210 Ifx_SCU_CCUCON0 ccucon0;
1211 uint16 l_SEndInitPW;
1212 uint32 sriDiv = (uint32)__roundf(source / sriFreq);
1213 sriDiv = __maxu(sriDiv, 1);
1214
1215 if ((sriDiv >= 7) && (sriDiv < 14) && ((sriDiv & 1) == 1))
1216 {
1217 sriDiv = sriDiv - 1;
1218 }
1219
1220 if (sriDiv == 14)
1221 {
1222 sriDiv = 12;
1223 }
1224
1225 l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
1226 IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
1227
1228 while (SCU_CCUCON0.B.LCK != 0U)
1229 {}
1230
1231 ccucon0.U = SCU_CCUCON0.U;
1232 ccucon0.B.SRIDIV = sriDiv;
1233 ccucon0.B.UP = 1;
1234 SCU_CCUCON0.U = ccucon0.U;
1235
1236 IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
1237
1238 while (SCU_CCUCON0.B.LCK != 0U)
1239 {}
1240
1241 freq = IfxScuCcu_getSriFrequency();
1242 return freq;
1243 }
1244
1245
1246 void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
1247 {
1248 uint16 endinit_pw, endinitSfty_pw;
1249 int pllStepsCount;
1250 uint8 smuTrapEnable;
1251
1252 if (SCU_CCUCON0.B.CLKSEL == 0) /* Already source is backup clock */
1253 {
1254 return;
1255 }
1256
1257 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
1258 endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
1259
1260 /*Start Pll ramp down sequence */
1261 for (pllStepsCount = cfg->sysPll.numOfPllDividerSteps; pllStepsCount > 0; pllStepsCount--)
1262 { /*iterate through number of pll steps */
1263 {
1264 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1265
1266 /*Configure K2 divider */
1267 while (SCU_PLLSTAT.B.K2RDY == 0U)
1268 {
1269 /*Wait until K2 divider is ready */
1270 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
1271 }
1272
1273 /*Now set the K2 divider value for the step corresponding to step count */
1274 SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllDividerStep[pllStepsCount - 1].k2Step;
1275
1276 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1277
1278 /*Wait for waitCounter corresponding to the pll step */
1279 IfxScuCcu_wait(cfg->sysPll.pllDividerStep[pllStepsCount - 1].waitTime);
1280 }
1281 }
1282
1283 {
1284 /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
1285 IfxScuWdt_clearCpuEndinit(endinit_pw);
1286
1287 smuTrapEnable = SCU_TRAPDIS.B.SMUT;
1288 SCU_TRAPDIS.B.SMUT = 1U;
1289
1290 IfxScuWdt_setCpuEndinit(endinit_pw);
1291 }
1292
1293 {
1294 /* Select fback (fosc-evr) as CCU input clock */
1295 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
1296
1297 while (SCU_CCUCON0.B.LCK != 0U)
1298 {
1299 /*Wait till ccucon0 lock is set */
1300 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
1301 }
1302
1303 SCU_CCUCON0.B.CLKSEL = 0; /*Select the EVR as fOSC for the clock distribution */
1304 SCU_CCUCON0.B.UP = 1; /*Update the ccucon0 register */
1305
1306 while (SCU_CCUCON0.B.LCK != 0U)
1307 {
1308 /*Wait till ccucon0 lock is set */
1309 /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
1310 }
1311
1312 /* Disconnet PLL (SETFINDIS=1): oscillator clock is disconnected from PLL */
1313 SCU_PLLCON0.B.SETFINDIS = 1;
1314
1315 /* Enable oscillator disconnect feature */
1316 SCU_PLLCON0.B.OSCDISCDIS = 0U;
1317 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
1318 }
1319 {
1320 /* Enable VCO unlock Trap if it was disabled before */
1321 IfxScuWdt_clearCpuEndinit(endinit_pw);
1322 SCU_TRAPCLR.B.SMUT = 1U;
1323
1324 SCU_TRAPDIS.B.SMUT = smuTrapEnable;
1325 IfxScuWdt_setCpuEndinit(endinit_pw);
1326 }
1327 }
1328
1329
1330 IFX_STATIC void IfxScuCcu_wait(float32 timeSec)
1331 {
1332 uint32 stmCount = (uint32)(IfxScuCcu_getStmFrequency() * timeSec);
1333 uint32 stmCountBegin = STM0_TIM0.U;
1334
1335 while ((uint32)(STM0_TIM0.U - stmCountBegin) < stmCount)
1336 {
1337 /* There is no need to check overflow of the STM timer.
1338 * When counter after overflow subtracted with counter before overflow,
1339 * the subtraction result will be as expected, as long as both are unsigned 32 bits
1340 * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
1341 * stmCountNow = 0x00000002 (before overflow)
1342 * diff= stmCountNow - stmCountBegin = 4 as expected.*/
1343 }
1344 }
IfxScuCcu_PllStepsConfig::k2Step
uint8 k2Step
K2 divider value for this step.
Definition: IfxScuCcu.h:725
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxScuCcu_ClockDistributionConfig::ccucon1
IfxScuCcu_CcuconRegConfig ccucon1
CCUCON1 Register configuration.
Definition: IfxScuCcu.h:739
IfxScuCcu_ClockDistributionConfig::ccucon0
IfxScuCcu_CcuconRegConfig ccucon0
CCUCON0 Register configuration.
Definition: IfxScuCcu.h:738
IfxScuCcu_getPllVcoFrequency
float32 IfxScuCcu_getPllVcoFrequency(void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divi...
Definition: IfxScuCcu.c:515
IfxScu_CCUCON0_CLKSEL_fPll
Definition: IfxScu_cfg.h:1371
IfxScuCcu_getPllErayFrequency
float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:440
IfxScuCcu_Config::sysPll
IfxScuCcu_SysPllConfig sysPll
System PLL configuration.
Definition: IfxScuCcu.h:772
IfxScuCcu_InitialStepConfig::k2Initial
uint8 k2Initial
K2 divider value for basic (initial) step.
Definition: IfxScuCcu.h:717
IfxScuCcu_PllStepsConfig::hookFunction
IfxScuCcu_PllStepsFunctionHook hookFunction
Hook function called at the end of this step.
Definition: IfxScuCcu.h:727
IfxScuCcu_Config::xtalFrequency
uint32 xtalFrequency
Xtal Frequency.
Definition: IfxScuCcu.h:775
IfxScuCcu_init
boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps...
Definition: IfxScuCcu.c:639
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IFXSCU_CFG_PLL_STEPS
#define IFXSCU_CFG_PLL_STEPS
Definition: IfxScu_cfg.h:1327
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxScuCcu_getMaxFrequency
float32 IfxScuCcu_getMaxFrequency(void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in ...
Definition: IfxScuCcu.c:346
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxScuCcu_getOscFrequency
float32 IfxScuCcu_getOscFrequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:418
IfxScuCcu_defaultClockConfig
IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Definition: IfxScuCcu.c:73
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1102
IFXSCUCCU_OSC_STABLECHK_TIME
#define IFXSCUCCU_OSC_STABLECHK_TIME
Oscillator stability check timeout count.
Definition: IfxScuCcu.h:119
IFXSCU_EVR_OSC_FREQUENCY
#define IFXSCU_EVR_OSC_FREQUENCY
Definition: IfxScu_cfg.h:53
IfxScuCcu_getPllFrequency
float32 IfxScuCcu_getPllFrequency(void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:487
IfxScu_CCUCON1_INSEL_fOsc0
Definition: IfxScu_cfg.h:1378
IfxScuCcu_getOsc0Frequency
float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:412
IfxScuCcu_setCpuFrequency
float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers...
Definition: IfxScuCcu.c:1048
IFXSCU_CFG_FLASH_WAITSTATE
#define IFXSCU_CFG_FLASH_WAITSTATE
Definition: IfxScu_cfg.h:1334
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxScuCcu_SysPllConfig::pllDividerStep
IfxScuCcu_PllStepsConfig * pllDividerStep
Pointer to the array of Pll divider step configuration.
Definition: IfxScuCcu.h:760
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxScuCcu_SysPllConfig::pllInitialStep
IfxScuCcu_InitialStepConfig pllInitialStep
Configuration of first step which is same as internal osc frequency.
Definition: IfxScuCcu.h:761
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:136
IfxScuCcu_getEvrFrequency
IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of...
Definition: IfxScuCcu.h:1065
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxScuCcu_setPll2ErayFrequency
float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 div...
Definition: IfxScuCcu.c:1131
IfxScuCcu_Config::flashFconWaitStateConfig
IfxScuCcu_FlashWaitstateConfig flashFconWaitStateConfig
Configuration of flash waitstate.
Definition: IfxScuCcu.h:774
IfxScuCcu_getBaud2Frequency
float32 IfxScuCcu_getBaud2Frequency(void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value i...
Definition: IfxScuCcu.c:213
IfxScuCcu_getPllErayVcoFrequency
float32 IfxScuCcu_getPllErayVcoFrequency(void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the...
Definition: IfxScuCcu.c:468
IfxScuCcu_getBaud1Frequency
float32 IfxScuCcu_getBaud1Frequency(void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.c:195
IfxScuCcu_initConfig
void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:892
IfxScuCcu_setPll2Frequency
float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider...
Definition: IfxScuCcu.c:1144
IfxScuCcu_getCpuFrequency
float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequenc...
Definition: IfxScuCcu.c:273
IFXSCU_VCO_BASE_FREQUENCY
#define IFXSCU_VCO_BASE_FREQUENCY
Definition: IfxScu_cfg.h:52
IfxScuCcu_getFsi2Frequency
float32 IfxScuCcu_getFsi2Frequency(void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider va...
Definition: IfxScuCcu.c:300
IFXSCU_CFG_CLK_DISTRIBUTION
#define IFXSCU_CFG_CLK_DISTRIBUTION
Definition: IfxScu_cfg.h:1312
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxScuCcu_isOscillatorStable
IFX_STATIC boolean IfxScuCcu_isOscillatorStable(void)
Check if oscillator is stable.
Definition: IfxScuCcu.c:1003
IfxScuCcu_PllStepsFunctionHook
void(* IfxScuCcu_PllStepsFunctionHook)(void)
Function pointer type for the hooks.
Definition: IfxScuCcu.h:128
IfxScuCcu_getModuleFrequency
float32 IfxScuCcu_getModuleFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:387
IfxScuCcu_Config
Configuration structure SCU module.
Definition: IfxScuCcu.h:770
IfxScuCcu_CcuconRegConfig::value
uint32 value
CCUCON Register value to be updated.
Definition: IfxScuCcu.h:706
IfxScu_CCUCON0_CLKSEL_fBack
Definition: IfxScu_cfg.h:1370
IfxScuCcu_ErayPllConfig
Configuration structure for E-ray PLL.
Definition: IfxScuCcu.h:780
IFXSCU_CFG_PLL_INITIAL_STEP
#define IFXSCU_CFG_PLL_INITIAL_STEP
Definition: IfxScu_cfg.h:1332
IfxScuCcu_setSpbFrequency
float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers...
Definition: IfxScuCcu.c:1157
IfxScuCcu_ClockDistributionConfig::ccucon6
IfxScuCcu_CcuconRegConfig ccucon6
CCUCON6 Register configuration.
Definition: IfxScuCcu.h:742
IfxScuCcu_initErayPll
boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by...
Definition: IfxScuCcu.c:898
IfxScuCcu_wait
IFX_STATIC void IfxScuCcu_wait(float32 timeSec)
API to wait for requested duration. Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled.
Definition: IfxScuCcu.c:1330
IfxScuCcu_ClockDistributionConfig::ccucon7
IfxScuCcu_CcuconRegConfig ccucon7
CCUCON7 Register configuration.
Definition: IfxScuCcu.h:743
IfxScuCcu_CcuconRegConfig::mask
uint32 mask
CCUCON Mask to select the bit fields to be updated.
Definition: IfxScuCcu.h:707
IfxScuCcu_Config::clockDistribution
IfxScuCcu_ClockDistributionConfig clockDistribution
Configuration of of bus clocks and other module clock distribution.
Definition: IfxScuCcu.h:773
IfxScuCcu_getPll2ErayFrequency
IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency b...
Definition: IfxScuCcu.h:1077
uint16
unsigned short uint16
Definition: Platform_Types.h:109
__roundf
#define __roundf
Definition: IfxCpu_IntrinsicsDcc.h:1608
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxScuCcu_getPll2Frequency
IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based...
Definition: IfxScuCcu.h:1087
IfxScuCcu_SysPllConfig::numOfPllDividerSteps
uint8 numOfPllDividerSteps
Number of PLL divider steps during clock throttling.
Definition: IfxScuCcu.h:759
IfxScuCcu_getFsiFrequency
float32 IfxScuCcu_getFsiFrequency(void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCO...
Definition: IfxScuCcu.c:323
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxScuCcu_defaultErayPllConfig
IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig
Definition: IfxScuCcu.c:84
IfxScuCcu_getSourceFrequency
float32 IfxScuCcu_getSourceFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:534
IfxScuCcu_ClockDistributionConfig::ccucon2
IfxScuCcu_CcuconRegConfig ccucon2
CCUCON2 Register configuration.
Definition: IfxScuCcu.h:740
IfxScu_CCUCON1_INSEL_fOsc1
Definition: IfxScu_cfg.h:1377
IfxCpu_ResourceCpu_0
CPU 0.
Definition: IfxCpu_cfg.h:138
__maxu
uint32 __maxu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxScuCcu_setGtmFrequency
float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers...
Definition: IfxScuCcu.c:1095
IfxScuCcu_InitialStepConfig::waitTime
float32 waitTime
Wait time for for basic (initial) step.
Definition: IfxScuCcu.h:718
IfxScuCcu.h
SCU basic functionality.
sint32
long sint32
Definition: Platform_Types.h:131
IfxScuCcu_setSriFrequency
float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers...
Definition: IfxScuCcu.c:1206
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1071
IfxScuCcu_getBbbFrequency
float32 IfxScuCcu_getBbbFrequency(void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider valu...
Definition: IfxScuCcu.c:231
IfxScuCcu_ClockDistributionConfig::ccucon5
IfxScuCcu_CcuconRegConfig ccucon5
CCUCON5 Register configuration.
Definition: IfxScuCcu.h:741
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:43
IfxScuCcu_InitialStepConfig::pDivider
uint8 pDivider
P divider value for basic (initial) step.
Definition: IfxScuCcu.h:715
IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:723
IfxScuCcu_xtalFrequency
IFX_STATIC uint32 IfxScuCcu_xtalFrequency
Crystal Frequency.
Definition: IfxScuCcu.c:67
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxScuCcu_InitialStepConfig::nDivider
uint8 nDivider
N divider value for basic (initial) step.
Definition: IfxScuCcu.h:716
IfxScuCcu_switchToBackupClock
void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency.
Definition: IfxScuCcu.c:1246
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxScuCcu_initErayPllConfig
void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:997
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxScuCcu_getSriFrequency
float32 IfxScuCcu_getSriFrequency(void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in C...
Definition: IfxScuCcu.c:597
IfxScuCcu_calculateSysPllDividers
boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL freque...
Definition: IfxScuCcu.c:93
IfxScuCcu_aDefaultPllConfigSteps
IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[]
Default configuration for the PLL initial steps This is a structure array and the values are defined ...
Definition: IfxScuCcu.c:61
IfxCpu_ResourceCpu_1
CPU 1.
Definition: IfxCpu_cfg.h:139


iLLD_TC26B: IfxScuCcu.h Source File

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IfxScuCcu.h
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1 /**
2 * \file IfxScuCcu.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Scu SCU
26 * \addtogroup IfxLld_Scu
27 * \{
28 * \defgroup IfxLld_ScuCcu How to use the Scu Clock driver?
29 * \addtogroup IfxLld_ScuCcu
30 * \{
31 *
32 * The Scu Clock control unit driver provides a default configuration for pll and Clock initialisation and set of peripheral clock configuration functions.
33 *
34 * In the following sections it will be described, how to integrate the driver into the application framework.
35 *
36 * \section IfxLld_ScuCcu_Std_Preparation Preparation
37 * \subsection IfxLld_ScuCcu_Std_Include Include Files
38 *
39 * Include following header file into your C code:
40 * \code
41 * #include <Scu/Std/IfxScuCcu.h>
42 * \endcode
43 *
44 * \subsection IfxLld_ScuCcu_Std_Variables Variables
45 *
46 * Declare the Clock Configuration variables in your C code:
47 *
48 * \code
49 * // used globally
50 *
51 * // configuration for the PLL steps
52 * static IfxScuCcu_PllStepsConfig IfxScuCcu_testPllConfigSteps[] = {
53 * IFXSCU_CFG_PLL_STEPS
54 * };
55 *
56 *
57 * // Default configuration for the Clock Configuration
58 * IfxScuCcu_Config IfxScuCcu_testClockConfig = {
59 * {
60 * sizeof(IfxScuCcu_testPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
61 * (IfxScuCcu_PllStepsConfig *)IfxScuCcu_testPllConfigSteps,
62 * IFXSCU_CFG_PLL_INITIAL_STEP,
63 * },
64 * IFXSCU_CFG_CLK_DISTRIBUTION,
65 * IFXSCU_CFG_FLASH_WAITSTATE,
66 * IFX_CFG_SCU_XTAL_FREQUENCY
67 * };
68 *
69 * \endcode
70 *
71 * \subsection IfxLld_ScuCcu_Std_Init Module Initialisation
72 *
73 * The module initialisation can be done in the same function. Here an example:
74 * \code
75 *
76 * // standard PLL & clock initialisation
77 * IfxScuCcu_init(&IfxScuCcu_testClockConfig);
78 *
79 * \endcode
80 *
81 * The PLL and clocks are now initialised based on the IFXSCU_CFG_XTAL_FREQ and IFXSCU_CFG_PLL_FREQ values configured in Ifx_Cfg.h.
82 *
83 * \}
84 * \}
85 *
86 * \defgroup IfxLld_Scu_Std_Ccu Ccu Basic Functionality
87 * \ingroup IfxLld_Scu_Std
88 * \defgroup IfxLld_Scu_Std_Ccu_Ccu Clock Control Functions
89 * \ingroup IfxLld_Scu_Std_Ccu
90 * \defgroup IfxLld_Scu_Std_Ccu_Ccu_Operative Clock Control Operative Functions
91 * \ingroup IfxLld_Scu_Std_Ccu
92 * \defgroup IfxLld_Scu_Std_Ccu_Ccu_Configuration Clock Control Configuration Functions
93 * \ingroup IfxLld_Scu_Std_Ccu
94 * \defgroup IfxLld_Scu_Std_Ccu_Enum Enumerations
95 * \ingroup IfxLld_Scu_Std_Ccu
96 */
97
98 #ifndef IFXSCUCCU_H
99 #define IFXSCUCCU_H 1
100
101 /******************************************************************************/
102 /*----------------------------------Includes----------------------------------*/
103 /******************************************************************************/
104
105 #include "_Impl/IfxScu_cfg.h"
106 #include "Scu/Std/IfxScuWdt.h"
107 #include "Cpu/Std/IfxCpu.h"
108 #include "IfxStm_reg.h"
109 #include "IfxScu_reg.h"
110 #include "IfxFlash_reg.h"
111 #include "_PinMap/IfxScu_PinMap.h"
112
113 /******************************************************************************/
114 /*-----------------------------------Macros-----------------------------------*/
115 /******************************************************************************/
116
117 /** \brief Oscillator stability check timeout count
118 */
119 #define IFXSCUCCU_OSC_STABLECHK_TIME (640)
120
121 /******************************************************************************/
122 /*------------------------------Type Definitions------------------------------*/
123 /******************************************************************************/
124
125 /** \brief Function pointer type for the hooks
126 * \return None
127 */
128 typedef void (*IfxScuCcu_PllStepsFunctionHook)(void);
129
130 /******************************************************************************/
131 /*--------------------------------Enumerations--------------------------------*/
132 /******************************************************************************/
133
134 /** \addtogroup IfxLld_Scu_Std_Ccu_Enum
135 * \{ */
136 /** \brief MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider
137 */
138 typedef enum
139 {
140 IfxScuCcu_K1divider_1 = 0, /**< \brief K1-Divider 1 */
141 IfxScuCcu_K1divider_2, /**< \brief K1-Divider 2 */
142 IfxScuCcu_K1divider_3, /**< \brief K1-Divider 3 */
143 IfxScuCcu_K1divider_4, /**< \brief K1-Divider 4 */
144 IfxScuCcu_K1divider_5, /**< \brief K1-Divider 5 */
145 IfxScuCcu_K1divider_6, /**< \brief K1-Divider 6 */
146 IfxScuCcu_K1divider_7, /**< \brief K1-Divider 7 */
147 IfxScuCcu_K1divider_8, /**< \brief K1-Divider 8 */
148 IfxScuCcu_K1divider_9, /**< \brief K1-Divider 9 */
149 IfxScuCcu_K1divider_10, /**< \brief K1-Divider 10 */
150 IfxScuCcu_K1divider_11, /**< \brief K1-Divider 11 */
151 IfxScuCcu_K1divider_12, /**< \brief K1-Divider 12 */
152 IfxScuCcu_K1divider_13, /**< \brief K1-Divider 13 */
153 IfxScuCcu_K1divider_14, /**< \brief K1-Divider 14 */
154 IfxScuCcu_K1divider_15, /**< \brief K1-Divider 15 */
155 IfxScuCcu_K1divider_16, /**< \brief K1-Divider 16 */
156 IfxScuCcu_K1divider_17, /**< \brief K1-Divider 17 */
157 IfxScuCcu_K1divider_18, /**< \brief K1-Divider 18 */
158 IfxScuCcu_K1divider_19, /**< \brief K1-Divider 19 */
159 IfxScuCcu_K1divider_20, /**< \brief K1-Divider 20 */
160 IfxScuCcu_K1divider_21, /**< \brief K1-Divider 21 */
161 IfxScuCcu_K1divider_22, /**< \brief K1-Divider 22 */
162 IfxScuCcu_K1divider_23, /**< \brief K1-Divider 23 */
163 IfxScuCcu_K1divider_24, /**< \brief K1-Divider 24 */
164 IfxScuCcu_K1divider_25, /**< \brief K1-Divider 25 */
165 IfxScuCcu_K1divider_26, /**< \brief K1-Divider 26 */
166 IfxScuCcu_K1divider_27, /**< \brief K1-Divider 27 */
167 IfxScuCcu_K1divider_28, /**< \brief K1-Divider 28 */
168 IfxScuCcu_K1divider_29, /**< \brief K1-Divider 29 */
169 IfxScuCcu_K1divider_30, /**< \brief K1-Divider 30 */
170 IfxScuCcu_K1divider_31, /**< \brief K1-Divider 31 */
171 IfxScuCcu_K1divider_32, /**< \brief K1-Divider 32 */
172 IfxScuCcu_K1divider_33, /**< \brief K1-Divider 33 */
173 IfxScuCcu_K1divider_34, /**< \brief K1-Divider 34 */
174 IfxScuCcu_K1divider_35, /**< \brief K1-Divider 35 */
175 IfxScuCcu_K1divider_36, /**< \brief K1-Divider 36 */
176 IfxScuCcu_K1divider_37, /**< \brief K1-Divider 37 */
177 IfxScuCcu_K1divider_38, /**< \brief K1-Divider 38 */
178 IfxScuCcu_K1divider_39, /**< \brief K1-Divider 39 */
179 IfxScuCcu_K1divider_40, /**< \brief K1-Divider 40 */
180 IfxScuCcu_K1divider_41, /**< \brief K1-Divider 41 */
181 IfxScuCcu_K1divider_42, /**< \brief K1-Divider 42 */
182 IfxScuCcu_K1divider_43, /**< \brief K1-Divider 43 */
183 IfxScuCcu_K1divider_44, /**< \brief K1-Divider 44 */
184 IfxScuCcu_K1divider_45, /**< \brief K1-Divider 45 */
185 IfxScuCcu_K1divider_46, /**< \brief K1-Divider 46 */
186 IfxScuCcu_K1divider_47, /**< \brief K1-Divider 47 */
187 IfxScuCcu_K1divider_48, /**< \brief K1-Divider 48 */
188 IfxScuCcu_K1divider_49, /**< \brief K1-Divider 49 */
189 IfxScuCcu_K1divider_50, /**< \brief K1-Divider 50 */
190 IfxScuCcu_K1divider_51, /**< \brief K1-Divider 51 */
191 IfxScuCcu_K1divider_52, /**< \brief K1-Divider 52 */
192 IfxScuCcu_K1divider_53, /**< \brief K1-Divider 53 */
193 IfxScuCcu_K1divider_54, /**< \brief K1-Divider 54 */
194 IfxScuCcu_K1divider_55, /**< \brief K1-Divider 55 */
195 IfxScuCcu_K1divider_56, /**< \brief K1-Divider 56 */
196 IfxScuCcu_K1divider_57, /**< \brief K1-Divider 57 */
197 IfxScuCcu_K1divider_58, /**< \brief K1-Divider 58 */
198 IfxScuCcu_K1divider_59, /**< \brief K1-Divider 59 */
199 IfxScuCcu_K1divider_60, /**< \brief K1-Divider 60 */
200 IfxScuCcu_K1divider_61, /**< \brief K1-Divider 61 */
201 IfxScuCcu_K1divider_62, /**< \brief K1-Divider 62 */
202 IfxScuCcu_K1divider_63, /**< \brief K1-Divider 63 */
203 IfxScuCcu_K1divider_64, /**< \brief K1-Divider 64 */
204 IfxScuCcu_K1divider_65, /**< \brief K1-Divider 65 */
205 IfxScuCcu_K1divider_66, /**< \brief K1-Divider 66 */
206 IfxScuCcu_K1divider_67, /**< \brief K1-Divider 67 */
207 IfxScuCcu_K1divider_68, /**< \brief K1-Divider 68 */
208 IfxScuCcu_K1divider_69, /**< \brief K1-Divider 69 */
209 IfxScuCcu_K1divider_70, /**< \brief K1-Divider 70 */
210 IfxScuCcu_K1divider_71, /**< \brief K1-Divider 71 */
211 IfxScuCcu_K1divider_72, /**< \brief K1-Divider 72 */
212 IfxScuCcu_K1divider_73, /**< \brief K1-Divider 73 */
213 IfxScuCcu_K1divider_74, /**< \brief K1-Divider 74 */
214 IfxScuCcu_K1divider_75, /**< \brief K1-Divider 75 */
215 IfxScuCcu_K1divider_76, /**< \brief K1-Divider 76 */
216 IfxScuCcu_K1divider_77, /**< \brief K1-Divider 77 */
217 IfxScuCcu_K1divider_78, /**< \brief K1-Divider 78 */
218 IfxScuCcu_K1divider_79, /**< \brief K1-Divider 79 */
219 IfxScuCcu_K1divider_80, /**< \brief K1-Divider 80 */
220 IfxScuCcu_K1divider_81, /**< \brief K1-Divider 81 */
221 IfxScuCcu_K1divider_82, /**< \brief K1-Divider 82 */
222 IfxScuCcu_K1divider_83, /**< \brief K1-Divider 83 */
223 IfxScuCcu_K1divider_84, /**< \brief K1-Divider 84 */
224 IfxScuCcu_K1divider_85, /**< \brief K1-Divider 85 */
225 IfxScuCcu_K1divider_86, /**< \brief K1-Divider 86 */
226 IfxScuCcu_K1divider_87, /**< \brief K1-Divider 87 */
227 IfxScuCcu_K1divider_88, /**< \brief K1-Divider 88 */
228 IfxScuCcu_K1divider_89, /**< \brief K1-Divider 89 */
229 IfxScuCcu_K1divider_90, /**< \brief K1-Divider 90 */
230 IfxScuCcu_K1divider_91, /**< \brief K1-Divider 91 */
231 IfxScuCcu_K1divider_92, /**< \brief K1-Divider 92 */
232 IfxScuCcu_K1divider_93, /**< \brief K1-Divider 93 */
233 IfxScuCcu_K1divider_94, /**< \brief K1-Divider 94 */
234 IfxScuCcu_K1divider_95, /**< \brief K1-Divider 95 */
235 IfxScuCcu_K1divider_96, /**< \brief K1-Divider 96 */
236 IfxScuCcu_K1divider_97, /**< \brief K1-Divider 97 */
237 IfxScuCcu_K1divider_98, /**< \brief K1-Divider 98 */
238 IfxScuCcu_K1divider_99, /**< \brief K1-Divider 99 */
239 IfxScuCcu_K1divider_100, /**< \brief K1-Divider 100 */
240 IfxScuCcu_K1divider_101, /**< \brief K1-Divider 101 */
241 IfxScuCcu_K1divider_102, /**< \brief K1-Divider 102 */
242 IfxScuCcu_K1divider_103, /**< \brief K1-Divider 103 */
243 IfxScuCcu_K1divider_104, /**< \brief K1-Divider 104 */
244 IfxScuCcu_K1divider_105, /**< \brief K1-Divider 105 */
245 IfxScuCcu_K1divider_106, /**< \brief K1-Divider 106 */
246 IfxScuCcu_K1divider_107, /**< \brief K1-Divider 107 */
247 IfxScuCcu_K1divider_108, /**< \brief K1-Divider 108 */
248 IfxScuCcu_K1divider_109, /**< \brief K1-Divider 109 */
249 IfxScuCcu_K1divider_110, /**< \brief K1-Divider 110 */
250 IfxScuCcu_K1divider_111, /**< \brief K1-Divider 111 */
251 IfxScuCcu_K1divider_112, /**< \brief K1-Divider 112 */
252 IfxScuCcu_K1divider_113, /**< \brief K1-Divider 113 */
253 IfxScuCcu_K1divider_114, /**< \brief K1-Divider 114 */
254 IfxScuCcu_K1divider_115, /**< \brief K1-Divider 115 */
255 IfxScuCcu_K1divider_116, /**< \brief K1-Divider 116 */
256 IfxScuCcu_K1divider_117, /**< \brief K1-Divider 117 */
257 IfxScuCcu_K1divider_118, /**< \brief K1-Divider 118 */
258 IfxScuCcu_K1divider_119, /**< \brief K1-Divider 119 */
259 IfxScuCcu_K1divider_120, /**< \brief K1-Divider 120 */
260 IfxScuCcu_K1divider_121, /**< \brief K1-Divider 121 */
261 IfxScuCcu_K1divider_122, /**< \brief K1-Divider 122 */
262 IfxScuCcu_K1divider_123, /**< \brief K1-Divider 123 */
263 IfxScuCcu_K1divider_124, /**< \brief K1-Divider 124 */
264 IfxScuCcu_K1divider_125, /**< \brief K1-Divider 125 */
265 IfxScuCcu_K1divider_126, /**< \brief K1-Divider 126 */
266 IfxScuCcu_K1divider_127, /**< \brief K1-Divider 127 */
267 IfxScuCcu_K1divider_128 /**< \brief K1-Divider 128 */
268 } IfxScuCcu_K1divider;
269
270 /** \brief MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider
271 */
272 typedef enum
273 {
274 IfxScuCcu_K2divider_1 = 0, /**< \brief K2-Divider 1 */
275 IfxScuCcu_K2divider_2, /**< \brief K2-Divider 2 */
276 IfxScuCcu_K2divider_3, /**< \brief K2-Divider 3 */
277 IfxScuCcu_K2divider_4, /**< \brief K2-Divider 4 */
278 IfxScuCcu_K2divider_5, /**< \brief K2-Divider 5 */
279 IfxScuCcu_K2divider_6, /**< \brief K2-Divider 6 */
280 IfxScuCcu_K2divider_7, /**< \brief K2-Divider 7 */
281 IfxScuCcu_K2divider_8, /**< \brief K2-Divider 8 */
282 IfxScuCcu_K2divider_9, /**< \brief K2-Divider 9 */
283 IfxScuCcu_K2divider_10, /**< \brief K2-Divider 10 */
284 IfxScuCcu_K2divider_11, /**< \brief K2-Divider 11 */
285 IfxScuCcu_K2divider_12, /**< \brief K2-Divider 12 */
286 IfxScuCcu_K2divider_13, /**< \brief K2-Divider 13 */
287 IfxScuCcu_K2divider_14, /**< \brief K2-Divider 14 */
288 IfxScuCcu_K2divider_15, /**< \brief K2-Divider 15 */
289 IfxScuCcu_K2divider_16, /**< \brief K2-Divider 16 */
290 IfxScuCcu_K2divider_17, /**< \brief K2-Divider 17 */
291 IfxScuCcu_K2divider_18, /**< \brief K2-Divider 18 */
292 IfxScuCcu_K2divider_19, /**< \brief K2-Divider 19 */
293 IfxScuCcu_K2divider_20, /**< \brief K2-Divider 20 */
294 IfxScuCcu_K2divider_21, /**< \brief K2-Divider 21 */
295 IfxScuCcu_K2divider_22, /**< \brief K2-Divider 22 */
296 IfxScuCcu_K2divider_23, /**< \brief K2-Divider 23 */
297 IfxScuCcu_K2divider_24, /**< \brief K2-Divider 24 */
298 IfxScuCcu_K2divider_25, /**< \brief K2-Divider 25 */
299 IfxScuCcu_K2divider_26, /**< \brief K2-Divider 26 */
300 IfxScuCcu_K2divider_27, /**< \brief K2-Divider 27 */
301 IfxScuCcu_K2divider_28, /**< \brief K2-Divider 28 */
302 IfxScuCcu_K2divider_29, /**< \brief K2-Divider 29 */
303 IfxScuCcu_K2divider_30, /**< \brief K2-Divider 30 */
304 IfxScuCcu_K2divider_31, /**< \brief K2-Divider 31 */
305 IfxScuCcu_K2divider_32, /**< \brief K2-Divider 32 */
306 IfxScuCcu_K2divider_33, /**< \brief K2-Divider 33 */
307 IfxScuCcu_K2divider_34, /**< \brief K2-Divider 34 */
308 IfxScuCcu_K2divider_35, /**< \brief K2-Divider 35 */
309 IfxScuCcu_K2divider_36, /**< \brief K2-Divider 36 */
310 IfxScuCcu_K2divider_37, /**< \brief K2-Divider 37 */
311 IfxScuCcu_K2divider_38, /**< \brief K2-Divider 38 */
312 IfxScuCcu_K2divider_39, /**< \brief K2-Divider 39 */
313 IfxScuCcu_K2divider_40, /**< \brief K2-Divider 40 */
314 IfxScuCcu_K2divider_41, /**< \brief K2-Divider 41 */
315 IfxScuCcu_K2divider_42, /**< \brief K2-Divider 42 */
316 IfxScuCcu_K2divider_43, /**< \brief K2-Divider 43 */
317 IfxScuCcu_K2divider_44, /**< \brief K2-Divider 44 */
318 IfxScuCcu_K2divider_45, /**< \brief K2-Divider 45 */
319 IfxScuCcu_K2divider_46, /**< \brief K2-Divider 46 */
320 IfxScuCcu_K2divider_47, /**< \brief K2-Divider 47 */
321 IfxScuCcu_K2divider_48, /**< \brief K2-Divider 48 */
322 IfxScuCcu_K2divider_49, /**< \brief K2-Divider 49 */
323 IfxScuCcu_K2divider_50, /**< \brief K2-Divider 50 */
324 IfxScuCcu_K2divider_51, /**< \brief K2-Divider 51 */
325 IfxScuCcu_K2divider_52, /**< \brief K2-Divider 52 */
326 IfxScuCcu_K2divider_53, /**< \brief K2-Divider 53 */
327 IfxScuCcu_K2divider_54, /**< \brief K2-Divider 54 */
328 IfxScuCcu_K2divider_55, /**< \brief K2-Divider 55 */
329 IfxScuCcu_K2divider_56, /**< \brief K2-Divider 56 */
330 IfxScuCcu_K2divider_57, /**< \brief K2-Divider 57 */
331 IfxScuCcu_K2divider_58, /**< \brief K2-Divider 58 */
332 IfxScuCcu_K2divider_59, /**< \brief K2-Divider 59 */
333 IfxScuCcu_K2divider_60, /**< \brief K2-Divider 60 */
334 IfxScuCcu_K2divider_61, /**< \brief K2-Divider 61 */
335 IfxScuCcu_K2divider_62, /**< \brief K2-Divider 62 */
336 IfxScuCcu_K2divider_63, /**< \brief K2-Divider 63 */
337 IfxScuCcu_K2divider_64, /**< \brief K2-Divider 64 */
338 IfxScuCcu_K2divider_65, /**< \brief K2-Divider 65 */
339 IfxScuCcu_K2divider_66, /**< \brief K2-Divider 66 */
340 IfxScuCcu_K2divider_67, /**< \brief K2-Divider 67 */
341 IfxScuCcu_K2divider_68, /**< \brief K2-Divider 68 */
342 IfxScuCcu_K2divider_69, /**< \brief K2-Divider 69 */
343 IfxScuCcu_K2divider_70, /**< \brief K2-Divider 70 */
344 IfxScuCcu_K2divider_71, /**< \brief K2-Divider 71 */
345 IfxScuCcu_K2divider_72, /**< \brief K2-Divider 72 */
346 IfxScuCcu_K2divider_73, /**< \brief K2-Divider 73 */
347 IfxScuCcu_K2divider_74, /**< \brief K2-Divider 74 */
348 IfxScuCcu_K2divider_75, /**< \brief K2-Divider 75 */
349 IfxScuCcu_K2divider_76, /**< \brief K2-Divider 76 */
350 IfxScuCcu_K2divider_77, /**< \brief K2-Divider 77 */
351 IfxScuCcu_K2divider_78, /**< \brief K2-Divider 78 */
352 IfxScuCcu_K2divider_79, /**< \brief K2-Divider 79 */
353 IfxScuCcu_K2divider_80, /**< \brief K2-Divider 80 */
354 IfxScuCcu_K2divider_81, /**< \brief K2-Divider 81 */
355 IfxScuCcu_K2divider_82, /**< \brief K2-Divider 82 */
356 IfxScuCcu_K2divider_83, /**< \brief K2-Divider 83 */
357 IfxScuCcu_K2divider_84, /**< \brief K2-Divider 84 */
358 IfxScuCcu_K2divider_85, /**< \brief K2-Divider 85 */
359 IfxScuCcu_K2divider_86, /**< \brief K2-Divider 86 */
360 IfxScuCcu_K2divider_87, /**< \brief K2-Divider 87 */
361 IfxScuCcu_K2divider_88, /**< \brief K2-Divider 88 */
362 IfxScuCcu_K2divider_89, /**< \brief K2-Divider 89 */
363 IfxScuCcu_K2divider_90, /**< \brief K2-Divider 90 */
364 IfxScuCcu_K2divider_91, /**< \brief K2-Divider 91 */
365 IfxScuCcu_K2divider_92, /**< \brief K2-Divider 92 */
366 IfxScuCcu_K2divider_93, /**< \brief K2-Divider 93 */
367 IfxScuCcu_K2divider_94, /**< \brief K2-Divider 94 */
368 IfxScuCcu_K2divider_95, /**< \brief K2-Divider 95 */
369 IfxScuCcu_K2divider_96, /**< \brief K2-Divider 96 */
370 IfxScuCcu_K2divider_97, /**< \brief K2-Divider 97 */
371 IfxScuCcu_K2divider_98, /**< \brief K2-Divider 98 */
372 IfxScuCcu_K2divider_99, /**< \brief K2-Divider 99 */
373 IfxScuCcu_K2divider_100, /**< \brief K2-Divider 100 */
374 IfxScuCcu_K2divider_101, /**< \brief K2-Divider 101 */
375 IfxScuCcu_K2divider_102, /**< \brief K2-Divider 102 */
376 IfxScuCcu_K2divider_103, /**< \brief K2-Divider 103 */
377 IfxScuCcu_K2divider_104, /**< \brief K2-Divider 104 */
378 IfxScuCcu_K2divider_105, /**< \brief K2-Divider 105 */
379 IfxScuCcu_K2divider_106, /**< \brief K2-Divider 106 */
380 IfxScuCcu_K2divider_107, /**< \brief K2-Divider 107 */
381 IfxScuCcu_K2divider_108, /**< \brief K2-Divider 108 */
382 IfxScuCcu_K2divider_109, /**< \brief K2-Divider 109 */
383 IfxScuCcu_K2divider_110, /**< \brief K2-Divider 110 */
384 IfxScuCcu_K2divider_111, /**< \brief K2-Divider 111 */
385 IfxScuCcu_K2divider_112, /**< \brief K2-Divider 112 */
386 IfxScuCcu_K2divider_113, /**< \brief K2-Divider 113 */
387 IfxScuCcu_K2divider_114, /**< \brief K2-Divider 114 */
388 IfxScuCcu_K2divider_115, /**< \brief K2-Divider 115 */
389 IfxScuCcu_K2divider_116, /**< \brief K2-Divider 116 */
390 IfxScuCcu_K2divider_117, /**< \brief K2-Divider 117 */
391 IfxScuCcu_K2divider_118, /**< \brief K2-Divider 118 */
392 IfxScuCcu_K2divider_119, /**< \brief K2-Divider 119 */
393 IfxScuCcu_K2divider_120, /**< \brief K2-Divider 120 */
394 IfxScuCcu_K2divider_121, /**< \brief K2-Divider 121 */
395 IfxScuCcu_K2divider_122, /**< \brief K2-Divider 122 */
396 IfxScuCcu_K2divider_123, /**< \brief K2-Divider 123 */
397 IfxScuCcu_K2divider_124, /**< \brief K2-Divider 124 */
398 IfxScuCcu_K2divider_125, /**< \brief K2-Divider 125 */
399 IfxScuCcu_K2divider_126, /**< \brief K2-Divider 126 */
400 IfxScuCcu_K2divider_127, /**< \brief K2-Divider 127 */
401 IfxScuCcu_K2divider_128 /**< \brief K2-Divider 128 */
402 } IfxScuCcu_K2divider;
403
404 /** \brief MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider
405 */
406 typedef enum
407 {
408 IfxScuCcu_K3divider_1 = 0, /**< \brief K3-Divider 1 */
409 IfxScuCcu_K3divider_2, /**< \brief K3-Divider 2 */
410 IfxScuCcu_K3divider_3, /**< \brief K3-Divider 3 */
411 IfxScuCcu_K3divider_4, /**< \brief K3-Divider 4 */
412 IfxScuCcu_K3divider_5, /**< \brief K3-Divider 5 */
413 IfxScuCcu_K3divider_6, /**< \brief K3-Divider 6 */
414 IfxScuCcu_K3divider_7, /**< \brief K3-Divider 7 */
415 IfxScuCcu_K3divider_8, /**< \brief K3-Divider 8 */
416 IfxScuCcu_K3divider_9, /**< \brief K3-Divider 9 */
417 IfxScuCcu_K3divider_10, /**< \brief K3-Divider 10 */
418 IfxScuCcu_K3divider_11, /**< \brief K3-Divider 11 */
419 IfxScuCcu_K3divider_12, /**< \brief K3-Divider 12 */
420 IfxScuCcu_K3divider_13, /**< \brief K3-Divider 13 */
421 IfxScuCcu_K3divider_14, /**< \brief K3-Divider 14 */
422 IfxScuCcu_K3divider_15, /**< \brief K3-Divider 15 */
423 IfxScuCcu_K3divider_16, /**< \brief K3-Divider 16 */
424 IfxScuCcu_K3divider_17, /**< \brief K3-Divider 17 */
425 IfxScuCcu_K3divider_18, /**< \brief K3-Divider 18 */
426 IfxScuCcu_K3divider_19, /**< \brief K3-Divider 19 */
427 IfxScuCcu_K3divider_20, /**< \brief K3-Divider 20 */
428 IfxScuCcu_K3divider_21, /**< \brief K3-Divider 21 */
429 IfxScuCcu_K3divider_22, /**< \brief K3-Divider 22 */
430 IfxScuCcu_K3divider_23, /**< \brief K3-Divider 23 */
431 IfxScuCcu_K3divider_24, /**< \brief K3-Divider 24 */
432 IfxScuCcu_K3divider_25, /**< \brief K3-Divider 25 */
433 IfxScuCcu_K3divider_26, /**< \brief K3-Divider 26 */
434 IfxScuCcu_K3divider_27, /**< \brief K3-Divider 27 */
435 IfxScuCcu_K3divider_28, /**< \brief K3-Divider 28 */
436 IfxScuCcu_K3divider_29, /**< \brief K3-Divider 29 */
437 IfxScuCcu_K3divider_30, /**< \brief K3-Divider 30 */
438 IfxScuCcu_K3divider_31, /**< \brief K3-Divider 31 */
439 IfxScuCcu_K3divider_32, /**< \brief K3-Divider 32 */
440 IfxScuCcu_K3divider_33, /**< \brief K3-Divider 33 */
441 IfxScuCcu_K3divider_34, /**< \brief K3-Divider 34 */
442 IfxScuCcu_K3divider_35, /**< \brief K3-Divider 35 */
443 IfxScuCcu_K3divider_36, /**< \brief K3-Divider 36 */
444 IfxScuCcu_K3divider_37, /**< \brief K3-Divider 37 */
445 IfxScuCcu_K3divider_38, /**< \brief K3-Divider 38 */
446 IfxScuCcu_K3divider_39, /**< \brief K3-Divider 39 */
447 IfxScuCcu_K3divider_40, /**< \brief K3-Divider 40 */
448 IfxScuCcu_K3divider_41, /**< \brief K3-Divider 41 */
449 IfxScuCcu_K3divider_42, /**< \brief K3-Divider 42 */
450 IfxScuCcu_K3divider_43, /**< \brief K3-Divider 43 */
451 IfxScuCcu_K3divider_44, /**< \brief K3-Divider 44 */
452 IfxScuCcu_K3divider_45, /**< \brief K3-Divider 45 */
453 IfxScuCcu_K3divider_46, /**< \brief K3-Divider 46 */
454 IfxScuCcu_K3divider_47, /**< \brief K3-Divider 47 */
455 IfxScuCcu_K3divider_48, /**< \brief K3-Divider 48 */
456 IfxScuCcu_K3divider_49, /**< \brief K3-Divider 49 */
457 IfxScuCcu_K3divider_50, /**< \brief K3-Divider 50 */
458 IfxScuCcu_K3divider_51, /**< \brief K3-Divider 51 */
459 IfxScuCcu_K3divider_52, /**< \brief K3-Divider 52 */
460 IfxScuCcu_K3divider_53, /**< \brief K3-Divider 53 */
461 IfxScuCcu_K3divider_54, /**< \brief K3-Divider 54 */
462 IfxScuCcu_K3divider_55, /**< \brief K3-Divider 55 */
463 IfxScuCcu_K3divider_56, /**< \brief K3-Divider 56 */
464 IfxScuCcu_K3divider_57, /**< \brief K3-Divider 57 */
465 IfxScuCcu_K3divider_58, /**< \brief K3-Divider 58 */
466 IfxScuCcu_K3divider_59, /**< \brief K3-Divider 59 */
467 IfxScuCcu_K3divider_60, /**< \brief K3-Divider 60 */
468 IfxScuCcu_K3divider_61, /**< \brief K3-Divider 61 */
469 IfxScuCcu_K3divider_62, /**< \brief K3-Divider 62 */
470 IfxScuCcu_K3divider_63, /**< \brief K3-Divider 63 */
471 IfxScuCcu_K3divider_64, /**< \brief K3-Divider 64 */
472 IfxScuCcu_K3divider_65, /**< \brief K3-Divider 65 */
473 IfxScuCcu_K3divider_66, /**< \brief K3-Divider 66 */
474 IfxScuCcu_K3divider_67, /**< \brief K3-Divider 67 */
475 IfxScuCcu_K3divider_68, /**< \brief K3-Divider 68 */
476 IfxScuCcu_K3divider_69, /**< \brief K3-Divider 69 */
477 IfxScuCcu_K3divider_70, /**< \brief K3-Divider 70 */
478 IfxScuCcu_K3divider_71, /**< \brief K3-Divider 71 */
479 IfxScuCcu_K3divider_72, /**< \brief K3-Divider 72 */
480 IfxScuCcu_K3divider_73, /**< \brief K3-Divider 73 */
481 IfxScuCcu_K3divider_74, /**< \brief K3-Divider 74 */
482 IfxScuCcu_K3divider_75, /**< \brief K3-Divider 75 */
483 IfxScuCcu_K3divider_76, /**< \brief K3-Divider 76 */
484 IfxScuCcu_K3divider_77, /**< \brief K3-Divider 77 */
485 IfxScuCcu_K3divider_78, /**< \brief K3-Divider 78 */
486 IfxScuCcu_K3divider_79, /**< \brief K3-Divider 79 */
487 IfxScuCcu_K3divider_80, /**< \brief K3-Divider 80 */
488 IfxScuCcu_K3divider_81, /**< \brief K3-Divider 81 */
489 IfxScuCcu_K3divider_82, /**< \brief K3-Divider 82 */
490 IfxScuCcu_K3divider_83, /**< \brief K3-Divider 83 */
491 IfxScuCcu_K3divider_84, /**< \brief K3-Divider 84 */
492 IfxScuCcu_K3divider_85, /**< \brief K3-Divider 85 */
493 IfxScuCcu_K3divider_86, /**< \brief K3-Divider 86 */
494 IfxScuCcu_K3divider_87, /**< \brief K3-Divider 87 */
495 IfxScuCcu_K3divider_88, /**< \brief K3-Divider 88 */
496 IfxScuCcu_K3divider_89, /**< \brief K3-Divider 89 */
497 IfxScuCcu_K3divider_90, /**< \brief K3-Divider 90 */
498 IfxScuCcu_K3divider_91, /**< \brief K3-Divider 91 */
499 IfxScuCcu_K3divider_92, /**< \brief K3-Divider 92 */
500 IfxScuCcu_K3divider_93, /**< \brief K3-Divider 93 */
501 IfxScuCcu_K3divider_94, /**< \brief K3-Divider 94 */
502 IfxScuCcu_K3divider_95, /**< \brief K3-Divider 95 */
503 IfxScuCcu_K3divider_96, /**< \brief K3-Divider 96 */
504 IfxScuCcu_K3divider_97, /**< \brief K3-Divider 97 */
505 IfxScuCcu_K3divider_98, /**< \brief K3-Divider 98 */
506 IfxScuCcu_K3divider_99, /**< \brief K3-Divider 99 */
507 IfxScuCcu_K3divider_100, /**< \brief K3-Divider 100 */
508 IfxScuCcu_K3divider_101, /**< \brief K3-Divider 101 */
509 IfxScuCcu_K3divider_102, /**< \brief K3-Divider 102 */
510 IfxScuCcu_K3divider_103, /**< \brief K3-Divider 103 */
511 IfxScuCcu_K3divider_104, /**< \brief K3-Divider 104 */
512 IfxScuCcu_K3divider_105, /**< \brief K3-Divider 105 */
513 IfxScuCcu_K3divider_106, /**< \brief K3-Divider 106 */
514 IfxScuCcu_K3divider_107, /**< \brief K3-Divider 107 */
515 IfxScuCcu_K3divider_108, /**< \brief K3-Divider 108 */
516 IfxScuCcu_K3divider_109, /**< \brief K3-Divider 109 */
517 IfxScuCcu_K3divider_110, /**< \brief K3-Divider 110 */
518 IfxScuCcu_K3divider_111, /**< \brief K3-Divider 111 */
519 IfxScuCcu_K3divider_112, /**< \brief K3-Divider 112 */
520 IfxScuCcu_K3divider_113, /**< \brief K3-Divider 113 */
521 IfxScuCcu_K3divider_114, /**< \brief K3-Divider 114 */
522 IfxScuCcu_K3divider_115, /**< \brief K3-Divider 115 */
523 IfxScuCcu_K3divider_116, /**< \brief K3-Divider 116 */
524 IfxScuCcu_K3divider_117, /**< \brief K3-Divider 117 */
525 IfxScuCcu_K3divider_118, /**< \brief K3-Divider 118 */
526 IfxScuCcu_K3divider_119, /**< \brief K3-Divider 119 */
527 IfxScuCcu_K3divider_120, /**< \brief K3-Divider 120 */
528 IfxScuCcu_K3divider_121, /**< \brief K3-Divider 121 */
529 IfxScuCcu_K3divider_122, /**< \brief K3-Divider 122 */
530 IfxScuCcu_K3divider_123, /**< \brief K3-Divider 123 */
531 IfxScuCcu_K3divider_124, /**< \brief K3-Divider 124 */
532 IfxScuCcu_K3divider_125, /**< \brief K3-Divider 125 */
533 IfxScuCcu_K3divider_126, /**< \brief K3-Divider 126 */
534 IfxScuCcu_K3divider_127, /**< \brief K3-Divider 127 */
535 IfxScuCcu_K3divider_128 /**< \brief K3-Divider 128 */
536 } IfxScuCcu_K3divider;
537
538 /** \brief MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider
539 */
540 typedef enum
541 {
542 IfxScuCcu_Ndivider_1 = 0, /**< \brief N-divider 1 */
543 IfxScuCcu_Ndivider_2, /**< \brief N-divider 2 */
544 IfxScuCcu_Ndivider_3, /**< \brief N-divider 3 */
545 IfxScuCcu_Ndivider_4, /**< \brief N-divider 4 */
546 IfxScuCcu_Ndivider_5, /**< \brief N-divider 5 */
547 IfxScuCcu_Ndivider_6, /**< \brief N-divider 6 */
548 IfxScuCcu_Ndivider_7, /**< \brief N-divider 7 */
549 IfxScuCcu_Ndivider_8, /**< \brief N-divider 8 */
550 IfxScuCcu_Ndivider_9, /**< \brief N-divider 9 */
551 IfxScuCcu_Ndivider_10, /**< \brief N-divider 10 */
552 IfxScuCcu_Ndivider_11, /**< \brief N-divider 11 */
553 IfxScuCcu_Ndivider_12, /**< \brief N-divider 12 */
554 IfxScuCcu_Ndivider_13, /**< \brief N-divider 13 */
555 IfxScuCcu_Ndivider_14, /**< \brief N-divider 14 */
556 IfxScuCcu_Ndivider_15, /**< \brief N-divider 15 */
557 IfxScuCcu_Ndivider_16, /**< \brief N-divider 16 */
558 IfxScuCcu_Ndivider_17, /**< \brief N-divider 17 */
559 IfxScuCcu_Ndivider_18, /**< \brief N-divider 18 */
560 IfxScuCcu_Ndivider_19, /**< \brief N-divider 19 */
561 IfxScuCcu_Ndivider_20, /**< \brief N-divider 20 */
562 IfxScuCcu_Ndivider_21, /**< \brief N-divider 21 */
563 IfxScuCcu_Ndivider_22, /**< \brief N-divider 22 */
564 IfxScuCcu_Ndivider_23, /**< \brief N-divider 23 */
565 IfxScuCcu_Ndivider_24, /**< \brief N-divider 24 */
566 IfxScuCcu_Ndivider_25, /**< \brief N-divider 25 */
567 IfxScuCcu_Ndivider_26, /**< \brief N-divider 26 */
568 IfxScuCcu_Ndivider_27, /**< \brief N-divider 27 */
569 IfxScuCcu_Ndivider_28, /**< \brief N-divider 28 */
570 IfxScuCcu_Ndivider_29, /**< \brief N-divider 29 */
571 IfxScuCcu_Ndivider_30, /**< \brief N-divider 30 */
572 IfxScuCcu_Ndivider_31, /**< \brief N-divider 31 */
573 IfxScuCcu_Ndivider_32, /**< \brief N-divider 32 */
574 IfxScuCcu_Ndivider_33, /**< \brief N-divider 33 */
575 IfxScuCcu_Ndivider_34, /**< \brief N-divider 34 */
576 IfxScuCcu_Ndivider_35, /**< \brief N-divider 35 */
577 IfxScuCcu_Ndivider_36, /**< \brief N-divider 36 */
578 IfxScuCcu_Ndivider_37, /**< \brief N-divider 37 */
579 IfxScuCcu_Ndivider_38, /**< \brief N-divider 38 */
580 IfxScuCcu_Ndivider_39, /**< \brief N-divider 39 */
581 IfxScuCcu_Ndivider_40, /**< \brief N-divider 40 */
582 IfxScuCcu_Ndivider_41, /**< \brief N-divider 41 */
583 IfxScuCcu_Ndivider_42, /**< \brief N-divider 42 */
584 IfxScuCcu_Ndivider_43, /**< \brief N-divider 43 */
585 IfxScuCcu_Ndivider_44, /**< \brief N-divider 44 */
586 IfxScuCcu_Ndivider_45, /**< \brief N-divider 45 */
587 IfxScuCcu_Ndivider_46, /**< \brief N-divider 46 */
588 IfxScuCcu_Ndivider_47, /**< \brief N-divider 47 */
589 IfxScuCcu_Ndivider_48, /**< \brief N-divider 48 */
590 IfxScuCcu_Ndivider_49, /**< \brief N-divider 49 */
591 IfxScuCcu_Ndivider_50, /**< \brief N-divider 50 */
592 IfxScuCcu_Ndivider_51, /**< \brief N-divider 51 */
593 IfxScuCcu_Ndivider_52, /**< \brief N-divider 52 */
594 IfxScuCcu_Ndivider_53, /**< \brief N-divider 53 */
595 IfxScuCcu_Ndivider_54, /**< \brief N-divider 54 */
596 IfxScuCcu_Ndivider_55, /**< \brief N-divider 55 */
597 IfxScuCcu_Ndivider_56, /**< \brief N-divider 56 */
598 IfxScuCcu_Ndivider_57, /**< \brief N-divider 57 */
599 IfxScuCcu_Ndivider_58, /**< \brief N-divider 58 */
600 IfxScuCcu_Ndivider_59, /**< \brief N-divider 59 */
601 IfxScuCcu_Ndivider_60, /**< \brief N-divider 60 */
602 IfxScuCcu_Ndivider_61, /**< \brief N-divider 61 */
603 IfxScuCcu_Ndivider_62, /**< \brief N-divider 62 */
604 IfxScuCcu_Ndivider_63, /**< \brief N-divider 63 */
605 IfxScuCcu_Ndivider_64, /**< \brief N-divider 64 */
606 IfxScuCcu_Ndivider_65, /**< \brief N-divider 65 */
607 IfxScuCcu_Ndivider_66, /**< \brief N-divider 66 */
608 IfxScuCcu_Ndivider_67, /**< \brief N-divider 67 */
609 IfxScuCcu_Ndivider_68, /**< \brief N-divider 68 */
610 IfxScuCcu_Ndivider_69, /**< \brief N-divider 69 */
611 IfxScuCcu_Ndivider_70, /**< \brief N-divider 70 */
612 IfxScuCcu_Ndivider_71, /**< \brief N-divider 71 */
613 IfxScuCcu_Ndivider_72, /**< \brief N-divider 72 */
614 IfxScuCcu_Ndivider_73, /**< \brief N-divider 73 */
615 IfxScuCcu_Ndivider_74, /**< \brief N-divider 74 */
616 IfxScuCcu_Ndivider_75, /**< \brief N-divider 75 */
617 IfxScuCcu_Ndivider_76, /**< \brief N-divider 76 */
618 IfxScuCcu_Ndivider_77, /**< \brief N-divider 77 */
619 IfxScuCcu_Ndivider_78, /**< \brief N-divider 78 */
620 IfxScuCcu_Ndivider_79, /**< \brief N-divider 79 */
621 IfxScuCcu_Ndivider_80, /**< \brief N-divider 80 */
622 IfxScuCcu_Ndivider_81, /**< \brief N-divider 81 */
623 IfxScuCcu_Ndivider_82, /**< \brief N-divider 82 */
624 IfxScuCcu_Ndivider_83, /**< \brief N-divider 83 */
625 IfxScuCcu_Ndivider_84, /**< \brief N-divider 84 */
626 IfxScuCcu_Ndivider_85, /**< \brief N-divider 85 */
627 IfxScuCcu_Ndivider_86, /**< \brief N-divider 86 */
628 IfxScuCcu_Ndivider_87, /**< \brief N-divider 87 */
629 IfxScuCcu_Ndivider_88, /**< \brief N-divider 88 */
630 IfxScuCcu_Ndivider_89, /**< \brief N-divider 89 */
631 IfxScuCcu_Ndivider_90, /**< \brief N-divider 90 */
632 IfxScuCcu_Ndivider_91, /**< \brief N-divider 91 */
633 IfxScuCcu_Ndivider_92, /**< \brief N-divider 92 */
634 IfxScuCcu_Ndivider_93, /**< \brief N-divider 93 */
635 IfxScuCcu_Ndivider_94, /**< \brief N-divider 94 */
636 IfxScuCcu_Ndivider_95, /**< \brief N-divider 95 */
637 IfxScuCcu_Ndivider_96, /**< \brief N-divider 96 */
638 IfxScuCcu_Ndivider_97, /**< \brief N-divider 97 */
639 IfxScuCcu_Ndivider_98, /**< \brief N-divider 98 */
640 IfxScuCcu_Ndivider_99, /**< \brief N-divider 99 */
641 IfxScuCcu_Ndivider_100, /**< \brief N-divider 100 */
642 IfxScuCcu_Ndivider_101, /**< \brief N-divider 101 */
643 IfxScuCcu_Ndivider_102, /**< \brief N-divider 102 */
644 IfxScuCcu_Ndivider_103, /**< \brief N-divider 103 */
645 IfxScuCcu_Ndivider_104, /**< \brief N-divider 104 */
646 IfxScuCcu_Ndivider_105, /**< \brief N-divider 105 */
647 IfxScuCcu_Ndivider_106, /**< \brief N-divider 106 */
648 IfxScuCcu_Ndivider_107, /**< \brief N-divider 107 */
649 IfxScuCcu_Ndivider_108, /**< \brief N-divider 108 */
650 IfxScuCcu_Ndivider_109, /**< \brief N-divider 109 */
651 IfxScuCcu_Ndivider_110, /**< \brief N-divider 110 */
652 IfxScuCcu_Ndivider_111, /**< \brief N-divider 111 */
653 IfxScuCcu_Ndivider_112, /**< \brief N-divider 112 */
654 IfxScuCcu_Ndivider_113, /**< \brief N-divider 113 */
655 IfxScuCcu_Ndivider_114, /**< \brief N-divider 114 */
656 IfxScuCcu_Ndivider_115, /**< \brief N-divider 115 */
657 IfxScuCcu_Ndivider_116, /**< \brief N-divider 116 */
658 IfxScuCcu_Ndivider_117, /**< \brief N-divider 117 */
659 IfxScuCcu_Ndivider_118, /**< \brief N-divider 118 */
660 IfxScuCcu_Ndivider_119, /**< \brief N-divider 119 */
661 IfxScuCcu_Ndivider_120, /**< \brief N-divider 120 */
662 IfxScuCcu_Ndivider_121, /**< \brief N-divider 121 */
663 IfxScuCcu_Ndivider_122, /**< \brief N-divider 122 */
664 IfxScuCcu_Ndivider_123, /**< \brief N-divider 123 */
665 IfxScuCcu_Ndivider_124, /**< \brief N-divider 124 */
666 IfxScuCcu_Ndivider_125, /**< \brief N-divider 125 */
667 IfxScuCcu_Ndivider_126, /**< \brief N-divider 126 */
668 IfxScuCcu_Ndivider_127, /**< \brief N-divider 127 */
669 IfxScuCcu_Ndivider_128 /**< \brief N-divider 128 */
670 } IfxScuCcu_Ndivider;
671
672 /** \brief MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider
673 */
674 typedef enum
675 {
676 IfxScuCcu_Pdivider_1 = 0, /**< \brief P-divider 1 */
677 IfxScuCcu_Pdivider_2, /**< \brief P-divider 2 */
678 IfxScuCcu_Pdivider_3, /**< \brief P-divider 3 */
679 IfxScuCcu_Pdivider_4, /**< \brief P-divider 4 */
680 IfxScuCcu_Pdivider_5, /**< \brief P-divider 5 */
681 IfxScuCcu_Pdivider_6, /**< \brief P-divider 6 */
682 IfxScuCcu_Pdivider_7, /**< \brief P-divider 7 */
683 IfxScuCcu_Pdivider_8, /**< \brief P-divider 8 */
684 IfxScuCcu_Pdivider_9, /**< \brief P-divider 9 */
685 IfxScuCcu_Pdivider_10, /**< \brief P-divider 10 */
686 IfxScuCcu_Pdivider_11, /**< \brief P-divider 11 */
687 IfxScuCcu_Pdivider_12, /**< \brief P-divider 12 */
688 IfxScuCcu_Pdivider_13, /**< \brief P-divider 13 */
689 IfxScuCcu_Pdivider_14, /**< \brief P-divider 14 */
690 IfxScuCcu_Pdivider_15, /**< \brief P-divider 15 */
691 IfxScuCcu_Pdivider_16 /**< \brief P-divider 16 */
692 } IfxScuCcu_Pdivider;
693
694 /** \} */
695
696 /******************************************************************************/
697 /*-----------------------------Data Structures--------------------------------*/
698 /******************************************************************************/
699
700 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
701 * \{ */
702 /** \brief Configuration structure type for CCUCON registers.
703 */
704 typedef struct
705 {
706 uint32 value; /**< \brief CCUCON Register value to be updated. */
707 uint32 mask; /**< \brief CCUCON Mask to select the bit fields to be updated. */
708 } IfxScuCcu_CcuconRegConfig;
709
710 /** \brief Configuration structure type for the Pll initial step.
711 * This structure must be used to configure the P, N and K2 dividers for initial step.
712 */
713 typedef struct
714 {
715 uint8 pDivider; /**< \brief P divider value for basic (initial) step */
716 uint8 nDivider; /**< \brief N divider value for basic (initial) step */
717 uint8 k2Initial; /**< \brief K2 divider value for basic (initial) step */
718 float32 waitTime; /**< \brief Wait time for for basic (initial) step */
719 } IfxScuCcu_InitialStepConfig;
720
721 /** \brief Configuration structure type for the Pll Steps for current jump control.
722 */
723 typedef struct
724 {
725 uint8 k2Step; /**< \brief K2 divider value for this step. */
726 float32 waitTime; /**< \brief Wait time for for this step. */
727 IfxScuCcu_PllStepsFunctionHook hookFunction; /**< \brief Hook function called at the end of this step. */
728 } IfxScuCcu_PllStepsConfig;
729
730 /** \} */
731
732 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
733 * \{ */
734 /** \brief Configuration structure type for all the CCUCON registers to configure clock distribution.
735 */
736 typedef struct
737 {
738 IfxScuCcu_CcuconRegConfig ccucon0; /**< \brief CCUCON0 Register configuration */
739 IfxScuCcu_CcuconRegConfig ccucon1; /**< \brief CCUCON1 Register configuration */
740 IfxScuCcu_CcuconRegConfig ccucon2; /**< \brief CCUCON2 Register configuration */
741 IfxScuCcu_CcuconRegConfig ccucon5; /**< \brief CCUCON5 Register configuration */
742 IfxScuCcu_CcuconRegConfig ccucon6; /**< \brief CCUCON6 Register configuration */
743 IfxScuCcu_CcuconRegConfig ccucon7; /**< \brief CCUCON7 Register configuration */
744 } IfxScuCcu_ClockDistributionConfig;
745
746 /** \brief Configuration structure type for the Flash waitstate configuration.
747 */
748 typedef struct
749 {
750 uint32 value; /**< \brief FLASH.FCON Register value to be updated. */
751 uint32 mask; /**< \brief FLASH.FCON Mask to select the bit fields to be updated. */
752 } IfxScuCcu_FlashWaitstateConfig;
753
754 /** \brief Configuration structure type for the System Pll step.
755 * This structure must be used to configure the P, N and K1 dividers .
756 */
757 typedef struct
758 {
759 uint8 numOfPllDividerSteps; /**< \brief Number of PLL divider steps during clock throttling. */
760 IfxScuCcu_PllStepsConfig *pllDividerStep; /**< \brief Pointer to the array of Pll divider step configuration. */
761 IfxScuCcu_InitialStepConfig pllInitialStep; /**< \brief Configuration of first step which is same as internal osc frequency. */
762 } IfxScuCcu_SysPllConfig;
763
764 /** \} */
765
766 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
767 * \{ */
768 /** \brief Configuration structure SCU module
769 */
770 typedef struct
771 {
772 IfxScuCcu_SysPllConfig sysPll; /**< \brief System PLL configuration */
773 IfxScuCcu_ClockDistributionConfig clockDistribution; /**< \brief Configuration of of bus clocks and other module clock distribution. */
774 IfxScuCcu_FlashWaitstateConfig flashFconWaitStateConfig; /**< \brief Configuration of flash waitstate */
775 uint32 xtalFrequency; /**< \brief Xtal Frequency */
776 } IfxScuCcu_Config;
777
778 /** \brief Configuration structure for E-ray PLL
779 */
780 typedef struct
781 {
782 IfxScuCcu_InitialStepConfig pllInitialStep; /**< \brief Configuration of first step which is same as internal osc frequency. */
783 } IfxScuCcu_ErayPllConfig;
784
785 /** \} */
786
787 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Operative
788 * \{ */
789
790 /******************************************************************************/
791 /*-------------------------Inline Function Prototypes-------------------------*/
792 /******************************************************************************/
793
794 /** \brief API to get EVR Oscillator frequency.
795 * This API returns the constant which is specific to the ScuCcu of the controller.
796 * \return EVR Oscillator frequency (fBACK or fEVR) in Hz.
797 */
798 IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void);
799
800 /** \brief API to get actual PLL2 (K3 Divider for ADC clock) frequency
801 * This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.
802 * \return PLL2ERAY (K3 Divider for ADC clock) frequency in Hz
803 */
804 IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void);
805
806 /** \brief API to get actual PLL2 (K3 Divider for ADC clock) frequency
807 * This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.
808 * \return PLL2 (K3 Divider for ADC clock) frequency in Hz
809 */
810 IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void);
811
812 /** \brief Returns the clock source selection
813 * \return Clock source selection
814 */
815 IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection(void);
816
817 /** \brief API to get STM divider frequency.
818 * This API returns the based on the divider value in CCUCON register and fSOURCE.
819 * \return STM frequency (fSTM) in Hz
820 */
821 IFX_INLINE float32 IfxScuCcu_getStmFrequency(void);
822
823 /** \brief API to get CAN divider frequency.
824 * This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE.
825 * \return STM frequency (fSTM) in Hz
826 */
827 IFX_INLINE float32 IfxScuCcu_getCanFrequency(void);
828
829 /******************************************************************************/
830 /*-------------------------Global Function Prototypes-------------------------*/
831 /******************************************************************************/
832
833 /** \brief API to get BAUD1 divider frequency.
834 * This API returns the based on the divider value in CCUCON register and the input oscillator.
835 * \return Baud1 frequency in Hz
836 */
837 IFX_EXTERN float32 IfxScuCcu_getBaud1Frequency(void);
838
839 /** \brief API to get BAUD2 divider frequency.
840 * This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX.
841 * \return Baud2 frequency in Hz
842 */
843 IFX_EXTERN float32 IfxScuCcu_getBaud2Frequency(void);
844
845 /** \brief API to get BBB divider frequency.
846 * This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator.
847 * \return BBB frequency (fBBB) in Hz
848 */
849 IFX_EXTERN float32 IfxScuCcu_getBbbFrequency(void);
850
851 /** \brief This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency
852 * \param cpu CPU number for which effective fCPU is sought
853 * \return Cpu[x] frequency in Hz, where x is cpu number passed as parameter
854 */
855 IFX_EXTERN float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu);
856
857 /** \brief API to get FSI2 divider frequency in Hz.
858 * This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator.
859 * \return FSI2 frequency (fFSI2) in Hz.
860 */
861 IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency(void);
862
863 /** \brief API to get FSI divider frequency in Hz.
864 * This API returns the fFSI based on the divider value in CCUCON register and the input oscillator.
865 * \return FSI frequency (fFSI) in Hz.
866 */
867 IFX_EXTERN float32 IfxScuCcu_getFsiFrequency(void);
868
869 /** \brief API to get FMAX divider frequency.
870 * This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator.
871 * \return Max frequency (fMAX) in Hz.
872 */
873 IFX_EXTERN float32 IfxScuCcu_getMaxFrequency(void);
874
875 /** \brief get source frequency fSOURCE.
876 * This API returns the source frequency based on the configurations with CCUCON register configuration.
877 * \return Module frequency in Hz
878 */
879 IFX_EXTERN float32 IfxScuCcu_getModuleFrequency(void);
880
881 /** \brief API to get Oscillator 0 frequency.
882 * This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.
883 * \return Osc0 frequency (fOSC0) in Hz.
884 */
885 IFX_EXTERN float32 IfxScuCcu_getOsc0Frequency(void);
886
887 /** \brief API to get Oscillator 0 frequency.
888 * This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.
889 * \return Osc frequency (fOSC) in Hz.
890 */
891 IFX_EXTERN float32 IfxScuCcu_getOscFrequency(void);
892
893 /** \brief API to get actual PLL (Eray) frequency.
894 * This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.
895 * \return frequency of Pll Eray (fPLLERAY) in Hz
896 */
897 IFX_EXTERN float32 IfxScuCcu_getPllErayFrequency(void);
898
899 /** \brief API to get actual ERAY PLL Voltage Controlled Oscillator frequency.
900 * This API returns the based on the divider values in PLLERAYCON registers and the input oscillator.
901 * \return Pll (Eray) VCO frequency
902 */
903 IFX_EXTERN float32 IfxScuCcu_getPllErayVcoFrequency(void);
904
905 /** \brief API to get actual PLL output frequency.
906 * This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.
907 * \return Pll (fPLL) frequency in Hz
908 */
909 IFX_EXTERN float32 IfxScuCcu_getPllFrequency(void);
910
911 /** \brief API to get actual PLL Voltage Controlled Oscillator frequency.
912 * This API returns the based on the divider values in PLLCON registers and the input oscillator.
913 * \return Pll VCO frequency
914 */
915 IFX_EXTERN float32 IfxScuCcu_getPllVcoFrequency(void);
916
917 /** \brief get source frequency fSOURCE.
918 * This API returns the source frequency based on the configurations with CCUCON register configuration.
919 * \return Effective fSOURCE in Hz
920 */
921 IFX_EXTERN float32 IfxScuCcu_getSourceFrequency(void);
922
923 /** \brief API to get SPB divider frequency.
924 * This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers.
925 * \return SPB frequency (fSPB) in Hz
926 */
927 IFX_EXTERN float32 IfxScuCcu_getSpbFrequency(void);
928
929 /** \brief API to get SRI divider frequency.
930 * This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE.
931 * \return Sri frequency (fSRI) in Hz
932 */
933 IFX_EXTERN float32 IfxScuCcu_getSriFrequency(void);
934
935 /** \brief API to set CPU frequency (with CPU divider)
936 * This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value
937 * \param cpu CPU number for which fCPU to be configured
938 * \param cpuFreq Desired CPU frequency in Hz
939 * \return Actual CPU[x] frequency in Hz, where x is the cpu number passed as parameter
940 */
941 IFX_EXTERN float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq);
942
943 /** \brief API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency.
944 * This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value
945 * \param pll2ErayFreq PLL2ERAY (K3 Divider for ADC clock) frequency in Hz
946 * \return Actual PLL2 (K3 Divider for ADC clock) frequency in Hz
947 */
948 IFX_EXTERN float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq);
949
950 /** \brief API to configure PLL2 (K3 Divider for ADC clock) for desired frequency.
951 * This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value
952 * \param pll2Freq PLL2 (K3 Divider for ADC clock) frequency in Hz
953 * \return Actual PLL2 (K3 Divider for ADC clock) frequency in Hz
954 */
955 IFX_EXTERN float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq);
956
957 /** \brief API to set SPB frequency (with SPB divider)
958 * This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
959 * \param spbFreq Desired SPB frequency in Hz
960 * \return Actual SPB frequency in Hz
961 */
962 IFX_EXTERN float32 IfxScuCcu_setSpbFrequency(float32 spbFreq);
963
964 /** \brief API to set SRI frequency (with SRI divider)
965 * This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
966 * \param sriFreq Sri frequency (fSRI) in Hz
967 * \return Actual Sri frequency (fSRI) in Hz
968 */
969 IFX_EXTERN float32 IfxScuCcu_setSriFrequency(float32 sriFreq);
970
971 /** \} */
972
973 /** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Configuration
974 * \{ */
975
976 /******************************************************************************/
977 /*-------------------------Global Function Prototypes-------------------------*/
978 /******************************************************************************/
979
980 /** \brief The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency.
981 * \param cfg Pointer to the configuration structure of the ScuCcu
982 * \param fPll Desired PLL frequency.
983 * \return 0- Success, 1 - Failure
984 */
985 IFX_EXTERN boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll);
986
987 /** \brief API to initialize the SCU Clock Control Unit.
988 * This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure.
989 * \param cfg Pointer to the configuration structure of the ScuCcu
990 * \return Error status of the ScuCcu initialization process.
991 * \retval TRUE: If an error occurred during initialization.
992 * \retval FALSE: If initialization was successful.
993 */
994 IFX_EXTERN boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg);
995
996 /** \brief Initializes the clock configuration with default values
997 * \param cfg Pointer to the configuration structure of the ScuCcu
998 * \return None
999 */
1000 IFX_EXTERN void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg);
1001
1002 /** \brief API to initialize the SCU Eray Pll
1003 * This API initialize the Eray PLL for the configuration provided by the configuration structure.
1004 * \param cfg Pointer to the configuration structure of the Eray Pll
1005 * \return Error status of the ScuCcu Eray Pll initialization process.
1006 * \retval TRUE: If an error occurred during initialization.
1007 * \retval FALSE: If initialization was successful.
1008 */
1009 IFX_EXTERN boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg);
1010
1011 /** \brief Initializes the clock configuration with default values
1012 * \param cfg Pointer to the configuration structure of the ScuCcuEray Pll
1013 * \return None
1014 */
1015 IFX_EXTERN void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg);
1016
1017 /** \brief API to switch to Backup clock from the current PLL frequency.
1018 * \param cfg Pointer to the configuration structure of the ScuCcu
1019 * \return None
1020 */
1021 IFX_EXTERN void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg);
1022
1023 /** \} */
1024
1025 /******************************************************************************/
1026 /*-------------------------Inline Function Prototypes-------------------------*/
1027 /******************************************************************************/
1028
1029 /** \brief API to get GTMdivider frequency
1030 * This API returns the based on the divider value in CCUCON register and fSOURCE.
1031 * return GTM frequency (fGTM) in Hz
1032 * \return Gtm Frequency
1033 */
1034 IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void);
1035
1036 /******************************************************************************/
1037 /*-------------------------Global Function Prototypes-------------------------*/
1038 /******************************************************************************/
1039
1040 /** \brief API to set GTM frequency (with GTM divider)
1041 * This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
1042 * \param gtmFreq Desired GTM frequency in Hz
1043 * \return Actual GTM frequency in HZ
1044 */
1045 IFX_EXTERN float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq);
1046
1047 /******************************************************************************/
1048 /*-------------------Global Exported Variables/Constants----------------------*/
1049 /******************************************************************************/
1050
1051 /** \brief Configuration structure for SCU CCU driver.
1052 * The values of this structure are defined as # defined macros in the implementation of Scu
1053 */
1054 IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig;
1055
1056 /** \brief Configuration structure for SCU CCU driver.
1057 * The values of this structure are defined as # defined macros in the implementation of Scu
1058 */
1059 IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig;
1060
1061 /******************************************************************************/
1062 /*---------------------Inline Function Implementations------------------------*/
1063 /******************************************************************************/
1064
1065 IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
1066 {
1067 return IFXSCU_EVR_OSC_FREQUENCY;
1068 }
1069
1070
1071 IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
1072 {
1073 return IfxScuCcu_getSourceFrequency() / SCU_CCUCON1.B.GTMDIV;
1074 }
1075
1076
1077 IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
1078 {
1079 float32 pll2ErayFrequency;
1080
1081 pll2ErayFrequency = IfxScuCcu_getPllErayVcoFrequency() / (SCU_PLLERAYCON1.B.K3DIV + 1);
1082
1083 return pll2ErayFrequency;
1084 }
1085
1086
1087 IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void)
1088 {
1089 float32 pll2Frequency;
1090 pll2Frequency = IfxScuCcu_getPllVcoFrequency() / (SCU_PLLCON1.B.K3DIV + 1);
1091
1092 return pll2Frequency;
1093 }
1094
1095
1096 IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection(void)
1097 {
1098 return (IfxScu_CCUCON0_CLKSEL)SCU_CCUCON0.B.CLKSEL;
1099 }
1100
1101
1102 IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
1103 {
1104 return IfxScuCcu_getSourceFrequency() / SCU_CCUCON1.B.STMDIV;
1105 }
1106
1107
1108 IFX_INLINE float32 IfxScuCcu_getCanFrequency(void)
1109 {
1110 float32 canFrequency;
1111 float32 sourceFrequency;
1112
1113 sourceFrequency = IfxScuCcu_getSourceFrequency();
1114
1115 if (SCU_CCUCON1.B.CANDIV == 0)
1116 {
1117 canFrequency = 0.0;
1118 }
1119 else
1120 {
1121 canFrequency = sourceFrequency / SCU_CCUCON1.B.CANDIV;
1122 }
1123
1124 return canFrequency;
1125 }
1126
1127
1128 #endif /* IFXSCUCCU_H */
IfxScuCcu_K3divider_122
K3-Divider 122.
Definition: IfxScuCcu.h:529
IfxScuCcu_K3divider_44
K3-Divider 44.
Definition: IfxScuCcu.h:451
IfxScuCcu_K1divider_45
K1-Divider 45.
Definition: IfxScuCcu.h:184
IfxScuCcu_K1divider_111
K1-Divider 111.
Definition: IfxScuCcu.h:250
IfxScuCcu_K3divider_5
K3-Divider 5.
Definition: IfxScuCcu.h:412
IfxScuCcu_Ndivider_5
N-divider 5.
Definition: IfxScuCcu.h:546
IfxScuCcu_K3divider_58
K3-Divider 58.
Definition: IfxScuCcu.h:465
IfxScuCcu_K3divider_84
K3-Divider 84.
Definition: IfxScuCcu.h:491
IfxScuCcu_K1divider_24
K1-Divider 24.
Definition: IfxScuCcu.h:163
IfxScuCcu_PllStepsConfig::k2Step
uint8 k2Step
K2 divider value for this step.
Definition: IfxScuCcu.h:725
IfxScuCcu_Ndivider_33
N-divider 33.
Definition: IfxScuCcu.h:574
IfxScuCcu_K2divider_126
K2-Divider 126.
Definition: IfxScuCcu.h:399
IfxScuCcu_Ndivider_23
N-divider 23.
Definition: IfxScuCcu.h:564
IfxScuCcu_K2divider_86
K2-Divider 86.
Definition: IfxScuCcu.h:359
IfxScuCcu_Ndivider_77
N-divider 77.
Definition: IfxScuCcu.h:618
IfxScuCcu_K3divider_63
K3-Divider 63.
Definition: IfxScuCcu.h:470
IfxScuCcu_K2divider_110
K2-Divider 110.
Definition: IfxScuCcu.h:383
IfxScuCcu_K1divider_6
K1-Divider 6.
Definition: IfxScuCcu.h:145
IfxScuCcu_K2divider_17
K2-Divider 17.
Definition: IfxScuCcu.h:290
IfxScuCcu_K3divider_98
K3-Divider 98.
Definition: IfxScuCcu.h:505
IfxScuCcu_K1divider_5
K1-Divider 5.
Definition: IfxScuCcu.h:144
IfxScuCcu_K2divider_57
K2-Divider 57.
Definition: IfxScuCcu.h:330
IfxScuCcu_getSpbFrequency
IFX_EXTERN float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxScuCcu_ClockDistributionConfig::ccucon1
IfxScuCcu_CcuconRegConfig ccucon1
CCUCON1 Register configuration.
Definition: IfxScuCcu.h:739
IfxScuCcu_K2divider_107
K2-Divider 107.
Definition: IfxScuCcu.h:380
IfxScuCcu_Ndivider_11
N-divider 11.
Definition: IfxScuCcu.h:552
IfxScuCcu_ClockDistributionConfig::ccucon0
IfxScuCcu_CcuconRegConfig ccucon0
CCUCON0 Register configuration.
Definition: IfxScuCcu.h:738
IfxScuCcu_K1divider_32
K1-Divider 32.
Definition: IfxScuCcu.h:171
IfxScuCcu_K3divider_53
K3-Divider 53.
Definition: IfxScuCcu.h:460
IfxScuCcu_K3divider_47
K3-Divider 47.
Definition: IfxScuCcu.h:454
IfxScuCcu_K1divider_46
K1-Divider 46.
Definition: IfxScuCcu.h:185
IfxScuCcu_K2divider_19
K2-Divider 19.
Definition: IfxScuCcu.h:292
IfxScuCcu_K3divider_117
K3-Divider 117.
Definition: IfxScuCcu.h:524
IfxScuCcu_K1divider_16
K1-Divider 16.
Definition: IfxScuCcu.h:155
IfxScuCcu_K3divider_15
K3-Divider 15.
Definition: IfxScuCcu.h:422
IfxScuCcu_K1divider_80
K1-Divider 80.
Definition: IfxScuCcu.h:219
IfxScuCcu_Ndivider_31
N-divider 31.
Definition: IfxScuCcu.h:572
IfxScuCcu_Ndivider_56
N-divider 56.
Definition: IfxScuCcu.h:597
IfxScuCcu_K1divider_9
K1-Divider 9.
Definition: IfxScuCcu.h:148
IfxScuCcu_K3divider_11
K3-Divider 11.
Definition: IfxScuCcu.h:418
IfxScuCcu_K1divider_55
K1-Divider 55.
Definition: IfxScuCcu.h:194
IfxScuCcu_defaultClockConfig
IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined mac...
Definition: IfxScuCcu.h:1054
IfxScuCcu_K1divider_39
K1-Divider 39.
Definition: IfxScuCcu.h:178
IfxScuCcu_K2divider_98
K2-Divider 98.
Definition: IfxScuCcu.h:371
IfxScuCcu_K1divider_91
K1-Divider 91.
Definition: IfxScuCcu.h:230
IfxScuCcu_Ndivider_102
N-divider 102.
Definition: IfxScuCcu.h:643
IfxScuCcu_K3divider_109
K3-Divider 109.
Definition: IfxScuCcu.h:516
IfxScuCcu_K3divider_6
K3-Divider 6.
Definition: IfxScuCcu.h:413
IfxScuCcu_K3divider_104
K3-Divider 104.
Definition: IfxScuCcu.h:511
IfxScuCcu_K3divider_13
K3-Divider 13.
Definition: IfxScuCcu.h:420
IfxScuCcu_Ndivider_108
N-divider 108.
Definition: IfxScuCcu.h:649
IfxScuCcu_Pdivider_12
P-divider 12.
Definition: IfxScuCcu.h:687
IfxScuCcu_K1divider_90
K1-Divider 90.
Definition: IfxScuCcu.h:229
IfxScuCcu_Ndivider_27
N-divider 27.
Definition: IfxScuCcu.h:568
IfxScuCcu_K3divider_116
K3-Divider 116.
Definition: IfxScuCcu.h:523
IfxScuCcu_K1divider_98
K1-Divider 98.
Definition: IfxScuCcu.h:237
IfxScuCcu_K3divider_113
K3-Divider 113.
Definition: IfxScuCcu.h:520
IfxScuCcu_K2divider_69
K2-Divider 69.
Definition: IfxScuCcu.h:342
IfxScuCcu_K2divider_123
K2-Divider 123.
Definition: IfxScuCcu.h:396
IfxScuCcu_K3divider_27
K3-Divider 27.
Definition: IfxScuCcu.h:434
IfxScuCcu_getPllVcoFrequency
IFX_EXTERN float32 IfxScuCcu_getPllVcoFrequency(void)
API to get actual PLL Voltage Controlled Oscillator frequency. This API returns the based on the divi...
Definition: IfxScuCcu.c:515
IfxScuCcu_Ndivider_41
N-divider 41.
Definition: IfxScuCcu.h:582
IfxScuCcu_K1divider_26
K1-Divider 26.
Definition: IfxScuCcu.h:165
IfxScuCcu_K1divider_57
K1-Divider 57.
Definition: IfxScuCcu.h:196
IfxScuCcu_getPllErayFrequency
IFX_EXTERN float32 IfxScuCcu_getPllErayFrequency(void)
API to get actual PLL (Eray) frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:440
IfxScuCcu_Config::sysPll
IfxScuCcu_SysPllConfig sysPll
System PLL configuration.
Definition: IfxScuCcu.h:772
IfxScuCcu_K2divider_55
K2-Divider 55.
Definition: IfxScuCcu.h:328
IfxScuCcu_K2divider_103
K2-Divider 103.
Definition: IfxScuCcu.h:376
IfxScuCcu_Ndivider_113
N-divider 113.
Definition: IfxScuCcu.h:654
IfxScuCcu_K2divider_77
K2-Divider 77.
Definition: IfxScuCcu.h:350
IfxScuCcu_K1divider_22
K1-Divider 22.
Definition: IfxScuCcu.h:161
IfxScuCcu_K2divider_59
K2-Divider 59.
Definition: IfxScuCcu.h:332
IfxScuCcu_Ndivider_28
N-divider 28.
Definition: IfxScuCcu.h:569
IfxScuCcu_K1divider_25
K1-Divider 25.
Definition: IfxScuCcu.h:164
IfxScuCcu_K3divider_105
K3-Divider 105.
Definition: IfxScuCcu.h:512
IfxScu_PinMap.h
SCU I/O map.
IfxScuCcu_K3divider_90
K3-Divider 90.
Definition: IfxScuCcu.h:497
IfxScuCcu_K3divider_68
K3-Divider 68.
Definition: IfxScuCcu.h:475
IfxScuCcu_K1divider_121
K1-Divider 121.
Definition: IfxScuCcu.h:260
IfxScuCcu_K2divider_100
K2-Divider 100.
Definition: IfxScuCcu.h:373
IfxScuCcu_K3divider_7
K3-Divider 7.
Definition: IfxScuCcu.h:414
IfxScuCcu_K3divider_32
K3-Divider 32.
Definition: IfxScuCcu.h:439
IfxScuCcu_K1divider_101
K1-Divider 101.
Definition: IfxScuCcu.h:240
IfxScuCcu_K2divider_116
K2-Divider 116.
Definition: IfxScuCcu.h:389
IfxScuCcu_InitialStepConfig::k2Initial
uint8 k2Initial
K2 divider value for basic (initial) step.
Definition: IfxScuCcu.h:717
IfxScuCcu_K3divider_67
K3-Divider 67.
Definition: IfxScuCcu.h:474
IfxScuCcu_K2divider_91
K2-Divider 91.
Definition: IfxScuCcu.h:364
IfxScuCcu_K1divider_35
K1-Divider 35.
Definition: IfxScuCcu.h:174
IfxScuCcu_ClockDistributionConfig
Configuration structure type for all the CCUCON registers to configure clock distribution.
Definition: IfxScuCcu.h:736
IfxScuCcu_PllStepsConfig::hookFunction
IfxScuCcu_PllStepsFunctionHook hookFunction
Hook function called at the end of this step.
Definition: IfxScuCcu.h:727
IfxScuCcu_K3divider_72
K3-Divider 72.
Definition: IfxScuCcu.h:479
IfxScuCcu_K1divider_20
K1-Divider 20.
Definition: IfxScuCcu.h:159
IfxScuCcu_K3divider_41
K3-Divider 41.
Definition: IfxScuCcu.h:448
IfxScuCcu_K1divider_40
K1-Divider 40.
Definition: IfxScuCcu.h:179
IfxScuCcu_K1divider_87
K1-Divider 87.
Definition: IfxScuCcu.h:226
IfxScuCcu_K2divider_46
K2-Divider 46.
Definition: IfxScuCcu.h:319
IfxScuCcu_K1divider_50
K1-Divider 50.
Definition: IfxScuCcu.h:189
IfxScuCcu_K2divider_61
K2-Divider 61.
Definition: IfxScuCcu.h:334
IfxScuCcu_K2divider_48
K2-Divider 48.
Definition: IfxScuCcu.h:321
IfxScuCcu_Ndivider_6
N-divider 6.
Definition: IfxScuCcu.h:547
IfxScuCcu_K2divider_39
K2-Divider 39.
Definition: IfxScuCcu.h:312
IfxScuCcu_Ndivider_29
N-divider 29.
Definition: IfxScuCcu.h:570
IfxScuCcu_getSourceSelection
IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection(void)
Returns the clock source selection.
Definition: IfxScuCcu.h:1096
IfxScuCcu_Ndivider_93
N-divider 93.
Definition: IfxScuCcu.h:634
IfxScuCcu_Config::xtalFrequency
uint32 xtalFrequency
Xtal Frequency.
Definition: IfxScuCcu.h:775
IfxScuCcu_Ndivider_107
N-divider 107.
Definition: IfxScuCcu.h:648
IfxScuCcu_K1divider_79
K1-Divider 79.
Definition: IfxScuCcu.h:218
IfxScuCcu_K3divider_52
K3-Divider 52.
Definition: IfxScuCcu.h:459
IfxScuCcu_K2divider_4
K2-Divider 4.
Definition: IfxScuCcu.h:277
IfxScuCcu_Ndivider_10
N-divider 10.
Definition: IfxScuCcu.h:551
IfxScuCcu_Ndivider_15
N-divider 15.
Definition: IfxScuCcu.h:556
IfxScuCcu_Ndivider_119
N-divider 119.
Definition: IfxScuCcu.h:660
IfxScuCcu_init
IFX_EXTERN boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg)
API to initialize the SCU Clock Control Unit. This API initialize the PLL with ramp steps...
Definition: IfxScuCcu.c:639
IfxScuCcu_K3divider_61
K3-Divider 61.
Definition: IfxScuCcu.h:468
IfxScuCcu_K2divider_22
K2-Divider 22.
Definition: IfxScuCcu.h:295
IfxScuCcu_K2divider_2
K2-Divider 2.
Definition: IfxScuCcu.h:275
IfxScuCcu_K1divider_96
K1-Divider 96.
Definition: IfxScuCcu.h:235
IfxScuCcu_K2divider_72
K2-Divider 72.
Definition: IfxScuCcu.h:345
IfxScuCcu_Ndivider_117
N-divider 117.
Definition: IfxScuCcu.h:658
IfxScuCcu_K3divider_65
K3-Divider 65.
Definition: IfxScuCcu.h:472
IfxScuCcu_K3divider_42
K3-Divider 42.
Definition: IfxScuCcu.h:449
IfxScuCcu_K1divider_18
K1-Divider 18.
Definition: IfxScuCcu.h:157
IfxScuCcu_K3divider_39
K3-Divider 39.
Definition: IfxScuCcu.h:446
IfxScuCcu_K3divider_119
K3-Divider 119.
Definition: IfxScuCcu.h:526
IfxScuCcu_Ndivider_86
N-divider 86.
Definition: IfxScuCcu.h:627
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxScuCcu_K2divider_45
K2-Divider 45.
Definition: IfxScuCcu.h:318
IfxScuCcu_K2divider_104
K2-Divider 104.
Definition: IfxScuCcu.h:377
IfxScuCcu_K2divider_112
K2-Divider 112.
Definition: IfxScuCcu.h:385
IfxScuCcu_Ndivider_21
N-divider 21.
Definition: IfxScuCcu.h:562
IfxScuCcu_K1divider_114
K1-Divider 114.
Definition: IfxScuCcu.h:253
IfxScuCcu_Ndivider_109
N-divider 109.
Definition: IfxScuCcu.h:650
IfxScuCcu_Ndivider_120
N-divider 120.
Definition: IfxScuCcu.h:661
IfxScuCcu_K3divider_78
K3-Divider 78.
Definition: IfxScuCcu.h:485
IfxScuCcu_K1divider_116
K1-Divider 116.
Definition: IfxScuCcu.h:255
IfxScuCcu_K2divider_42
K2-Divider 42.
Definition: IfxScuCcu.h:315
float32
float float32
Definition: Platform_Types.h:167
IfxScuCcu_K2divider_109
K2-Divider 109.
Definition: IfxScuCcu.h:382
IfxScuCcu_Ndivider_58
N-divider 58.
Definition: IfxScuCcu.h:599
IfxScuCcu_K3divider_1
K3-Divider 1.
Definition: IfxScuCcu.h:408
IfxScuCcu_Ndivider_65
N-divider 65.
Definition: IfxScuCcu.h:606
IfxScuCcu_K1divider_125
K1-Divider 125.
Definition: IfxScuCcu.h:264
IfxScuCcu_K2divider_70
K2-Divider 70.
Definition: IfxScuCcu.h:343
IfxScuCcu_K2divider_14
K2-Divider 14.
Definition: IfxScuCcu.h:287
IfxScuCcu_Ndivider_39
N-divider 39.
Definition: IfxScuCcu.h:580
IfxScuCcu_K2divider_26
K2-Divider 26.
Definition: IfxScuCcu.h:299
IfxScuCcu_K1divider_58
K1-Divider 58.
Definition: IfxScuCcu.h:197
IfxScuCcu_K3divider_103
K3-Divider 103.
Definition: IfxScuCcu.h:510
IfxScuCcu_SysPllConfig
Configuration structure type for the System Pll step. This structure must be used to configure the P...
Definition: IfxScuCcu.h:757
IfxScuCcu_K1divider_89
K1-Divider 89.
Definition: IfxScuCcu.h:228
IfxScuCcu_K1divider_123
K1-Divider 123.
Definition: IfxScuCcu.h:262
IfxScuCcu_K2divider_36
K2-Divider 36.
Definition: IfxScuCcu.h:309
IfxScuCcu_K3divider_29
K3-Divider 29.
Definition: IfxScuCcu.h:436
IfxScuCcu_getMaxFrequency
IFX_EXTERN float32 IfxScuCcu_getMaxFrequency(void)
API to get FMAX divider frequency. This API returns the fMax frequency based on the divider value in ...
Definition: IfxScuCcu.c:346
IfxScuCcu_K3divider_118
K3-Divider 118.
Definition: IfxScuCcu.h:525
IfxScuCcu_K1divider_13
K1-Divider 13.
Definition: IfxScuCcu.h:152
IfxScuCcu_K3divider_23
K3-Divider 23.
Definition: IfxScuCcu.h:430
IfxScuCcu_K2divider_49
K2-Divider 49.
Definition: IfxScuCcu.h:322
IfxScuCcu_K1divider_110
K1-Divider 110.
Definition: IfxScuCcu.h:249
IfxScuCcu_K1divider_34
K1-Divider 34.
Definition: IfxScuCcu.h:173
IfxScuCcu_K2divider_18
K2-Divider 18.
Definition: IfxScuCcu.h:291
IfxScuCcu_K3divider_8
K3-Divider 8.
Definition: IfxScuCcu.h:415
IfxScuCcu_K2divider_12
K2-Divider 12.
Definition: IfxScuCcu.h:285
IfxScuCcu_Ndivider_116
N-divider 116.
Definition: IfxScuCcu.h:657
IfxScuCcu_K2divider_9
K2-Divider 9.
Definition: IfxScuCcu.h:282
IfxScuCcu_K3divider_125
K3-Divider 125.
Definition: IfxScuCcu.h:532
IfxScuCcu_K3divider_110
K3-Divider 110.
Definition: IfxScuCcu.h:517
IfxScuCcu_K3divider_30
K3-Divider 30.
Definition: IfxScuCcu.h:437
IfxScuCcu_K1divider_81
K1-Divider 81.
Definition: IfxScuCcu.h:220
IfxScuCcu_K3divider_102
K3-Divider 102.
Definition: IfxScuCcu.h:509
IfxScuCcu_Ndivider_18
N-divider 18.
Definition: IfxScuCcu.h:559
IfxScuCcu_Ndivider_123
N-divider 123.
Definition: IfxScuCcu.h:664
IfxScuCcu_Ndivider_47
N-divider 47.
Definition: IfxScuCcu.h:588
IfxScuCcu_getOscFrequency
IFX_EXTERN float32 IfxScuCcu_getOscFrequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:418
IfxScuCcu_Ndivider_45
N-divider 45.
Definition: IfxScuCcu.h:586
IfxScuCcu_Ndivider_44
N-divider 44.
Definition: IfxScuCcu.h:585
IfxScuCcu_K1divider_42
K1-Divider 42.
Definition: IfxScuCcu.h:181
IfxScuCcu_K1divider_72
K1-Divider 72.
Definition: IfxScuCcu.h:211
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1102
IfxScuCcu_K2divider_84
K2-Divider 84.
Definition: IfxScuCcu.h:357
IfxScuCcu_K2divider_79
K2-Divider 79.
Definition: IfxScuCcu.h:352
IfxScuCcu_K1divider_67
K1-Divider 67.
Definition: IfxScuCcu.h:206
IfxScuCcu_Ndivider_104
N-divider 104.
Definition: IfxScuCcu.h:645
IfxScuCcu_Ndivider_50
N-divider 50.
Definition: IfxScuCcu.h:591
IfxScuCcu_Ndivider_52
N-divider 52.
Definition: IfxScuCcu.h:593
IFXSCU_EVR_OSC_FREQUENCY
#define IFXSCU_EVR_OSC_FREQUENCY
Definition: IfxScu_cfg.h:53
IfxScuCcu_Pdivider_9
P-divider 9.
Definition: IfxScuCcu.h:684
IfxScuCcu_K1divider_128
K1-Divider 128.
Definition: IfxScuCcu.h:267
IfxScuCcu_K1divider_107
K1-Divider 107.
Definition: IfxScuCcu.h:246
IfxScuCcu_K1divider_113
K1-Divider 113.
Definition: IfxScuCcu.h:252
IfxScuCcu_K3divider_69
K3-Divider 69.
Definition: IfxScuCcu.h:476
IfxScuCcu_K1divider_82
K1-Divider 82.
Definition: IfxScuCcu.h:221
IfxScuCcu_K2divider
IfxScuCcu_K2divider
MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider.
Definition: IfxScuCcu.h:272
IfxScuCcu_Ndivider_101
N-divider 101.
Definition: IfxScuCcu.h:642
IfxScuCcu_getPllFrequency
IFX_EXTERN float32 IfxScuCcu_getPllFrequency(void)
API to get actual PLL output frequency. This API returns the based on the divider values in CCUCON...
Definition: IfxScuCcu.c:487
IfxScuCcu_K1divider_106
K1-Divider 106.
Definition: IfxScuCcu.h:245
IfxScuCcu_K2divider_58
K2-Divider 58.
Definition: IfxScuCcu.h:331
IfxScuCcu_K2divider_1
K2-Divider 1.
Definition: IfxScuCcu.h:274
IfxScuCcu_getOsc0Frequency
IFX_EXTERN float32 IfxScuCcu_getOsc0Frequency(void)
API to get Oscillator 0 frequency. This API returns the fOsc0 frequency based on the divider value in...
Definition: IfxScuCcu.c:412
IfxScuCcu_setCpuFrequency
IFX_EXTERN float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
API to set CPU frequency (with CPU divider) This API configure CPU divider values in CCUCON registers...
Definition: IfxScuCcu.c:1048
IfxScuCcu_K1divider_38
K1-Divider 38.
Definition: IfxScuCcu.h:177
IfxScuCcu_Ndivider_26
N-divider 26.
Definition: IfxScuCcu.h:567
IfxScuCcu_setGtmFrequency
IFX_EXTERN float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
API to set GTM frequency (with GTM divider) This API configure GTM divider values in CCUCON registers...
Definition: IfxScuCcu.c:1095
IfxScuCcu_K1divider_104
K1-Divider 104.
Definition: IfxScuCcu.h:243
IfxScuCcu_K3divider_12
K3-Divider 12.
Definition: IfxScuCcu.h:419
IfxScuCcu_K3divider_95
K3-Divider 95.
Definition: IfxScuCcu.h:502
IfxScuCcu_K3divider
IfxScuCcu_K3divider
MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider.
Definition: IfxScuCcu.h:406
IfxScuCcu_K2divider_92
K2-Divider 92.
Definition: IfxScuCcu.h:365
IfxScuCcu_K3divider_51
K3-Divider 51.
Definition: IfxScuCcu.h:458
IfxScuCcu_K1divider_105
K1-Divider 105.
Definition: IfxScuCcu.h:244
IfxScuCcu_K1divider_41
K1-Divider 41.
Definition: IfxScuCcu.h:180
IfxScuWdt.h
SCU basic functionality.
IfxScuCcu_Ndivider_88
N-divider 88.
Definition: IfxScuCcu.h:629
IfxScuCcu_K2divider_38
K2-Divider 38.
Definition: IfxScuCcu.h:311
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxScuCcu_K3divider_25
K3-Divider 25.
Definition: IfxScuCcu.h:432
IfxScuCcu_SysPllConfig::pllDividerStep
IfxScuCcu_PllStepsConfig * pllDividerStep
Pointer to the array of Pll divider step configuration.
Definition: IfxScuCcu.h:760
IfxScuCcu_K3divider_80
K3-Divider 80.
Definition: IfxScuCcu.h:487
IfxScuCcu_Ndivider_96
N-divider 96.
Definition: IfxScuCcu.h:637
IfxScuCcu_K2divider_67
K2-Divider 67.
Definition: IfxScuCcu.h:340
IfxScuCcu_SysPllConfig::pllInitialStep
IfxScuCcu_InitialStepConfig pllInitialStep
Configuration of first step which is same as internal osc frequency.
Definition: IfxScuCcu.h:761
IfxScuCcu_K2divider_88
K2-Divider 88.
Definition: IfxScuCcu.h:361
IfxScuCcu_Ndivider_124
N-divider 124.
Definition: IfxScuCcu.h:665
IfxScuCcu_Ndivider_128
N-divider 128.
Definition: IfxScuCcu.h:669
IfxCpu_ResourceCpu
IfxCpu_ResourceCpu
List of the available CPU resources.
Definition: IfxCpu_cfg.h:136
IfxScuCcu_K1divider_74
K1-Divider 74.
Definition: IfxScuCcu.h:213
IfxScuCcu_K1divider_100
K1-Divider 100.
Definition: IfxScuCcu.h:239
IfxScuCcu_K2divider_47
K2-Divider 47.
Definition: IfxScuCcu.h:320
IfxScuCcu_K3divider_24
K3-Divider 24.
Definition: IfxScuCcu.h:431
IfxScuCcu_K1divider_75
K1-Divider 75.
Definition: IfxScuCcu.h:214
IfxScuCcu_K1divider_23
K1-Divider 23.
Definition: IfxScuCcu.h:162
IfxScuCcu_K3divider_85
K3-Divider 85.
Definition: IfxScuCcu.h:492
IfxScuCcu_K2divider_83
K2-Divider 83.
Definition: IfxScuCcu.h:356
IfxScuCcu_getEvrFrequency
IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
API to get EVR Oscillator frequency. This API returns the constant which is specific to the ScuCcu of...
Definition: IfxScuCcu.h:1065
IfxScuCcu_K3divider_60
K3-Divider 60.
Definition: IfxScuCcu.h:467
IfxScuCcu_setPll2ErayFrequency
IFX_EXTERN float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq)
API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency. This API configure K3 div...
Definition: IfxScuCcu.c:1131
IfxScuCcu_K1divider_71
K1-Divider 71.
Definition: IfxScuCcu.h:210
IfxScuCcu_K2divider_122
K2-Divider 122.
Definition: IfxScuCcu.h:395
IfxScuCcu_K1divider_63
K1-Divider 63.
Definition: IfxScuCcu.h:202
IfxScuCcu_Ndivider_90
N-divider 90.
Definition: IfxScuCcu.h:631
IfxScuCcu_K2divider_97
K2-Divider 97.
Definition: IfxScuCcu.h:370
IfxScuCcu_Ndivider_76
N-divider 76.
Definition: IfxScuCcu.h:617
IfxScuCcu_K3divider_73
K3-Divider 73.
Definition: IfxScuCcu.h:480
IfxScuCcu_K3divider_108
K3-Divider 108.
Definition: IfxScuCcu.h:515
IfxScuCcu_K3divider_76
K3-Divider 76.
Definition: IfxScuCcu.h:483
IfxScuCcu_CcuconRegConfig
Configuration structure type for CCUCON registers.
Definition: IfxScuCcu.h:704
IfxScuCcu_K2divider_80
K2-Divider 80.
Definition: IfxScuCcu.h:353
IfxScuCcu_K3divider_75
K3-Divider 75.
Definition: IfxScuCcu.h:482
IfxScuCcu_Config::flashFconWaitStateConfig
IfxScuCcu_FlashWaitstateConfig flashFconWaitStateConfig
Configuration of flash waitstate.
Definition: IfxScuCcu.h:774
IfxScuCcu_getBaud2Frequency
IFX_EXTERN float32 IfxScuCcu_getBaud2Frequency(void)
API to get BAUD2 divider frequency. This API returns the Baud2 frequency based on the divider value i...
Definition: IfxScuCcu.c:213
IfxScuCcu_Ndivider_60
N-divider 60.
Definition: IfxScuCcu.h:601
IfxScuCcu_Ndivider_59
N-divider 59.
Definition: IfxScuCcu.h:600
IfxScuCcu_K3divider_9
K3-Divider 9.
Definition: IfxScuCcu.h:416
IfxScuCcu_getPllErayVcoFrequency
IFX_EXTERN float32 IfxScuCcu_getPllErayVcoFrequency(void)
API to get actual ERAY PLL Voltage Controlled Oscillator frequency. This API returns the based on the...
Definition: IfxScuCcu.c:468
IfxScuCcu_K3divider_34
K3-Divider 34.
Definition: IfxScuCcu.h:441
IfxScuCcu_K1divider_3
K1-Divider 3.
Definition: IfxScuCcu.h:142
IfxScuCcu_getBaud1Frequency
IFX_EXTERN float32 IfxScuCcu_getBaud1Frequency(void)
API to get BAUD1 divider frequency. This API returns the based on the divider value in CCUCON registe...
Definition: IfxScuCcu.c:195
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxScuCcu_K2divider_27
K2-Divider 27.
Definition: IfxScuCcu.h:300
IfxScuCcu_Ndivider_54
N-divider 54.
Definition: IfxScuCcu.h:595
IfxScuCcu_K2divider_102
K2-Divider 102.
Definition: IfxScuCcu.h:375
IfxScuCcu_initConfig
IFX_EXTERN void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:892
IfxScuCcu_K3divider_101
K3-Divider 101.
Definition: IfxScuCcu.h:508
IfxScuCcu_K2divider_66
K2-Divider 66.
Definition: IfxScuCcu.h:339
IfxScuCcu_Ndivider_69
N-divider 69.
Definition: IfxScuCcu.h:610
IfxScuCcu_K2divider_119
K2-Divider 119.
Definition: IfxScuCcu.h:392
IfxScuCcu_K1divider_103
K1-Divider 103.
Definition: IfxScuCcu.h:242
IfxScuCcu_Pdivider_8
P-divider 8.
Definition: IfxScuCcu.h:683
IfxScuCcu_Ndivider_126
N-divider 126.
Definition: IfxScuCcu.h:667
IfxScuCcu_K1divider_1
K1-Divider 1.
Definition: IfxScuCcu.h:140
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxScuCcu_setPll2Frequency
IFX_EXTERN float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq)
API to configure PLL2 (K3 Divider for ADC clock) for desired frequency. This API configure K3 divider...
Definition: IfxScuCcu.c:1144
IfxScuCcu_K1divider_70
K1-Divider 70.
Definition: IfxScuCcu.h:209
IfxScuCcu_K2divider_30
K2-Divider 30.
Definition: IfxScuCcu.h:303
IfxScuCcu_Ndivider_64
N-divider 64.
Definition: IfxScuCcu.h:605
IfxScuCcu_K3divider_121
K3-Divider 121.
Definition: IfxScuCcu.h:528
IfxScuCcu_K2divider_33
K2-Divider 33.
Definition: IfxScuCcu.h:306
IfxScuCcu_K3divider_22
K3-Divider 22.
Definition: IfxScuCcu.h:429
IfxScuCcu_K1divider_78
K1-Divider 78.
Definition: IfxScuCcu.h:217
IfxScuCcu_Ndivider_42
N-divider 42.
Definition: IfxScuCcu.h:583
IfxScuCcu_K2divider_43
K2-Divider 43.
Definition: IfxScuCcu.h:316
IfxScuCcu_Ndivider_57
N-divider 57.
Definition: IfxScuCcu.h:598
IfxScuCcu_Pdivider_14
P-divider 14.
Definition: IfxScuCcu.h:689
IfxScuCcu_K2divider_74
K2-Divider 74.
Definition: IfxScuCcu.h:347
IfxScuCcu_K1divider_21
K1-Divider 21.
Definition: IfxScuCcu.h:160
IfxScuCcu_K2divider_108
K2-Divider 108.
Definition: IfxScuCcu.h:381
IfxScuCcu_Ndivider_49
N-divider 49.
Definition: IfxScuCcu.h:590
IfxScuCcu_K1divider_54
K1-Divider 54.
Definition: IfxScuCcu.h:193
IfxScuCcu_K3divider_87
K3-Divider 87.
Definition: IfxScuCcu.h:494
IfxScuCcu_K3divider_114
K3-Divider 114.
Definition: IfxScuCcu.h:521
IfxScuCcu_K2divider_16
K2-Divider 16.
Definition: IfxScuCcu.h:289
IfxScuCcu_K1divider_112
K1-Divider 112.
Definition: IfxScuCcu.h:251
IfxScuCcu_K3divider_46
K3-Divider 46.
Definition: IfxScuCcu.h:453
IfxScuCcu_Ndivider_30
N-divider 30.
Definition: IfxScuCcu.h:571
IfxScuCcu_getCanFrequency
IFX_INLINE float32 IfxScuCcu_getCanFrequency(void)
API to get CAN divider frequency. This API returns the fCAN frequency based on the divider value in C...
Definition: IfxScuCcu.h:1108
IfxScuCcu_getCpuFrequency
IFX_EXTERN float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequenc...
Definition: IfxScuCcu.c:273
IfxScuCcu_K2divider_31
K2-Divider 31.
Definition: IfxScuCcu.h:304
IfxScuCcu_Ndivider_97
N-divider 97.
Definition: IfxScuCcu.h:638
IfxScuCcu_Ndivider_43
N-divider 43.
Definition: IfxScuCcu.h:584
IfxScuCcu_K1divider_31
K1-Divider 31.
Definition: IfxScuCcu.h:170
IfxScuCcu_K1divider_17
K1-Divider 17.
Definition: IfxScuCcu.h:156
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuCcu_InitialStepConfig
Configuration structure type for the Pll initial step. This structure must be used to configure the P...
Definition: IfxScuCcu.h:713
IfxScuCcu_K3divider_55
K3-Divider 55.
Definition: IfxScuCcu.h:462
IfxScuCcu_K2divider_13
K2-Divider 13.
Definition: IfxScuCcu.h:286
IfxScuCcu_K2divider_34
K2-Divider 34.
Definition: IfxScuCcu.h:307
IfxScuCcu_K3divider_31
K3-Divider 31.
Definition: IfxScuCcu.h:438
IfxScuCcu_getFsi2Frequency
IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency(void)
API to get FSI2 divider frequency in Hz. This API returns the fFSI2 frequency based on the divider va...
Definition: IfxScuCcu.c:300
IfxScuCcu_K1divider_47
K1-Divider 47.
Definition: IfxScuCcu.h:186
IfxScuCcu_K3divider_49
K3-Divider 49.
Definition: IfxScuCcu.h:456
IfxScuCcu_K1divider_52
K1-Divider 52.
Definition: IfxScuCcu.h:191
IfxScuCcu_Ndivider_46
N-divider 46.
Definition: IfxScuCcu.h:587
IfxScuCcu_K2divider_35
K2-Divider 35.
Definition: IfxScuCcu.h:308
IfxScuCcu_K1divider_65
K1-Divider 65.
Definition: IfxScuCcu.h:204
IfxScuCcu_Ndivider_115
N-divider 115.
Definition: IfxScuCcu.h:656
IfxScuCcu_K2divider_78
K2-Divider 78.
Definition: IfxScuCcu.h:351
IfxScuCcu_K2divider_113
K2-Divider 113.
Definition: IfxScuCcu.h:386
IfxScuCcu_K2divider_51
K2-Divider 51.
Definition: IfxScuCcu.h:324
IfxScuCcu_K1divider_2
K1-Divider 2.
Definition: IfxScuCcu.h:141
IfxScuCcu_K2divider_111
K2-Divider 111.
Definition: IfxScuCcu.h:384
IfxScuCcu_K2divider_25
K2-Divider 25.
Definition: IfxScuCcu.h:298
IfxScuCcu_Ndivider_84
N-divider 84.
Definition: IfxScuCcu.h:625
IfxScuCcu_K3divider_17
K3-Divider 17.
Definition: IfxScuCcu.h:424
IfxScuCcu_K2divider_40
K2-Divider 40.
Definition: IfxScuCcu.h:313
IfxScuCcu_K3divider_77
K3-Divider 77.
Definition: IfxScuCcu.h:484
IfxScuCcu_K2divider_37
K2-Divider 37.
Definition: IfxScuCcu.h:310
IfxScuCcu_K3divider_91
K3-Divider 91.
Definition: IfxScuCcu.h:498
IfxScuCcu_Ndivider_70
N-divider 70.
Definition: IfxScuCcu.h:611
IfxScuCcu_Ndivider_36
N-divider 36.
Definition: IfxScuCcu.h:577
IfxScuCcu_K3divider_100
K3-Divider 100.
Definition: IfxScuCcu.h:507
IfxScuCcu_PllStepsFunctionHook
void(* IfxScuCcu_PllStepsFunctionHook)(void)
Function pointer type for the hooks.
Definition: IfxScuCcu.h:128
IfxScuCcu_Ndivider_121
N-divider 121.
Definition: IfxScuCcu.h:662
IfxScuCcu_K2divider_54
K2-Divider 54.
Definition: IfxScuCcu.h:327
IfxScuCcu_K2divider_60
K2-Divider 60.
Definition: IfxScuCcu.h:333
IfxScuCcu_Ndivider_91
N-divider 91.
Definition: IfxScuCcu.h:632
IfxScuCcu_Ndivider_13
N-divider 13.
Definition: IfxScuCcu.h:554
IfxScuCcu_K1divider_11
K1-Divider 11.
Definition: IfxScuCcu.h:150
IfxScuCcu_K3divider_120
K3-Divider 120.
Definition: IfxScuCcu.h:527
IfxScuCcu_K2divider_7
K2-Divider 7.
Definition: IfxScuCcu.h:280
IfxScuCcu_K2divider_71
K2-Divider 71.
Definition: IfxScuCcu.h:344
IfxScuCcu_K1divider_109
K1-Divider 109.
Definition: IfxScuCcu.h:248
IfxScuCcu_K1divider_53
K1-Divider 53.
Definition: IfxScuCcu.h:192
IfxScu_CCUCON0_CLKSEL
IfxScu_CCUCON0_CLKSEL
Definition: IfxScu_cfg.h:1368
IfxScuCcu_K3divider_127
K3-Divider 127.
Definition: IfxScuCcu.h:534
IfxScuCcu_Ndivider_61
N-divider 61.
Definition: IfxScuCcu.h:602
IfxScuCcu_K1divider_8
K1-Divider 8.
Definition: IfxScuCcu.h:147
IfxScuCcu_K3divider_106
K3-Divider 106.
Definition: IfxScuCcu.h:513
IfxScuCcu_K2divider_82
K2-Divider 82.
Definition: IfxScuCcu.h:355
IfxScuCcu_getModuleFrequency
IFX_EXTERN float32 IfxScuCcu_getModuleFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:387
IfxScuCcu_K3divider_66
K3-Divider 66.
Definition: IfxScuCcu.h:473
IfxScuCcu_K1divider_108
K1-Divider 108.
Definition: IfxScuCcu.h:247
IfxScuCcu_K1divider_19
K1-Divider 19.
Definition: IfxScuCcu.h:158
IfxScuCcu_K2divider_53
K2-Divider 53.
Definition: IfxScuCcu.h:326
IfxScuCcu_Config
Configuration structure SCU module.
Definition: IfxScuCcu.h:770
IfxScuCcu_K2divider_115
K2-Divider 115.
Definition: IfxScuCcu.h:388
IfxScuCcu_K1divider_115
K1-Divider 115.
Definition: IfxScuCcu.h:254
IfxScuCcu_K1divider_127
K1-Divider 127.
Definition: IfxScuCcu.h:266
IfxScuCcu_K1divider_69
K1-Divider 69.
Definition: IfxScuCcu.h:208
IfxScuCcu_K1divider_93
K1-Divider 93.
Definition: IfxScuCcu.h:232
IfxScuCcu_K2divider_5
K2-Divider 5.
Definition: IfxScuCcu.h:278
IfxScuCcu_K1divider_118
K1-Divider 118.
Definition: IfxScuCcu.h:257
IfxScuCcu_K1divider_99
K1-Divider 99.
Definition: IfxScuCcu.h:238
IfxScuCcu_K3divider_99
K3-Divider 99.
Definition: IfxScuCcu.h:506
IfxScuCcu_K3divider_38
K3-Divider 38.
Definition: IfxScuCcu.h:445
IfxScuCcu_K1divider_117
K1-Divider 117.
Definition: IfxScuCcu.h:256
IfxScuCcu_CcuconRegConfig::value
uint32 value
CCUCON Register value to be updated.
Definition: IfxScuCcu.h:706
IfxScuCcu_K1divider_51
K1-Divider 51.
Definition: IfxScuCcu.h:190
IfxScuCcu_K2divider_105
K2-Divider 105.
Definition: IfxScuCcu.h:378
IfxScuCcu_K2divider_64
K2-Divider 64.
Definition: IfxScuCcu.h:337
IfxScuCcu_K3divider_96
K3-Divider 96.
Definition: IfxScuCcu.h:503
IfxScuCcu_Pdivider_10
P-divider 10.
Definition: IfxScuCcu.h:685
IfxScuCcu_K2divider_117
K2-Divider 117.
Definition: IfxScuCcu.h:390
IfxScuCcu_K1divider_124
K1-Divider 124.
Definition: IfxScuCcu.h:263
IfxScuCcu_K2divider_65
K2-Divider 65.
Definition: IfxScuCcu.h:338
IfxScuCcu_K1divider_88
K1-Divider 88.
Definition: IfxScuCcu.h:227
IfxScuCcu_ErayPllConfig
Configuration structure for E-ray PLL.
Definition: IfxScuCcu.h:780
IfxScuCcu_Ndivider_63
N-divider 63.
Definition: IfxScuCcu.h:604
IfxScuCcu_Ndivider_1
N-divider 1.
Definition: IfxScuCcu.h:542
IfxScuCcu_Ndivider_72
N-divider 72.
Definition: IfxScuCcu.h:613
IfxScuCcu_FlashWaitstateConfig
Configuration structure type for the Flash waitstate configuration.
Definition: IfxScuCcu.h:748
IfxScuCcu_K1divider_56
K1-Divider 56.
Definition: IfxScuCcu.h:195
IfxScuCcu_K3divider_107
K3-Divider 107.
Definition: IfxScuCcu.h:514
IfxScuCcu_K3divider_35
K3-Divider 35.
Definition: IfxScuCcu.h:442
IfxScuCcu_Ndivider_19
N-divider 19.
Definition: IfxScuCcu.h:560
IfxScuCcu_setSpbFrequency
IFX_EXTERN float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
API to set SPB frequency (with SPB divider) This API configure SPB divider values in CCUCON registers...
Definition: IfxScuCcu.c:1157
IfxScuCcu_K2divider_56
K2-Divider 56.
Definition: IfxScuCcu.h:329
IfxScuCcu_K1divider
IfxScuCcu_K1divider
MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider.
Definition: IfxScuCcu.h:138
IfxScuCcu_K2divider_6
K2-Divider 6.
Definition: IfxScuCcu.h:279
IfxScuCcu_K1divider_94
K1-Divider 94.
Definition: IfxScuCcu.h:233
IfxScuCcu_ClockDistributionConfig::ccucon6
IfxScuCcu_CcuconRegConfig ccucon6
CCUCON6 Register configuration.
Definition: IfxScuCcu.h:742
IfxScuCcu_initErayPll
IFX_EXTERN boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg)
API to initialize the SCU Eray Pll This API initialize the Eray PLL for the configuration provided by...
Definition: IfxScuCcu.c:898
IfxScuCcu_K1divider_119
K1-Divider 119.
Definition: IfxScuCcu.h:258
IfxScuCcu_Ndivider_53
N-divider 53.
Definition: IfxScuCcu.h:594
IfxScuCcu_K2divider_63
K2-Divider 63.
Definition: IfxScuCcu.h:336
IfxScuCcu_Ndivider_68
N-divider 68.
Definition: IfxScuCcu.h:609
IfxScuCcu_ClockDistributionConfig::ccucon7
IfxScuCcu_CcuconRegConfig ccucon7
CCUCON7 Register configuration.
Definition: IfxScuCcu.h:743
IfxScuCcu_K2divider_75
K2-Divider 75.
Definition: IfxScuCcu.h:348
IfxScuCcu_K1divider_83
K1-Divider 83.
Definition: IfxScuCcu.h:222
IfxScuCcu_Ndivider_105
N-divider 105.
Definition: IfxScuCcu.h:646
IfxScuCcu_K1divider_48
K1-Divider 48.
Definition: IfxScuCcu.h:187
IfxScuCcu_K3divider_81
K3-Divider 81.
Definition: IfxScuCcu.h:488
IfxScuCcu_K2divider_21
K2-Divider 21.
Definition: IfxScuCcu.h:294
IfxScuCcu_CcuconRegConfig::mask
uint32 mask
CCUCON Mask to select the bit fields to be updated.
Definition: IfxScuCcu.h:707
IfxScuCcu_Config::clockDistribution
IfxScuCcu_ClockDistributionConfig clockDistribution
Configuration of of bus clocks and other module clock distribution.
Definition: IfxScuCcu.h:773
IfxScuCcu_K3divider_16
K3-Divider 16.
Definition: IfxScuCcu.h:423
IfxScuCcu_K1divider_59
K1-Divider 59.
Definition: IfxScuCcu.h:198
IfxScuCcu_Pdivider_16
P-divider 16.
Definition: IfxScuCcu.h:691
IfxScuCcu_K1divider_97
K1-Divider 97.
Definition: IfxScuCcu.h:236
IfxScuCcu_K2divider_95
K2-Divider 95.
Definition: IfxScuCcu.h:368
IfxScuCcu_Ndivider_2
N-divider 2.
Definition: IfxScuCcu.h:543
IfxScuCcu_K3divider_4
K3-Divider 4.
Definition: IfxScuCcu.h:411
IfxScuCcu_K1divider_126
K1-Divider 126.
Definition: IfxScuCcu.h:265
IfxScuCcu_Pdivider_4
P-divider 4.
Definition: IfxScuCcu.h:679
IfxScuCcu_Ndivider_32
N-divider 32.
Definition: IfxScuCcu.h:573
IfxScuCcu_Ndivider_83
N-divider 83.
Definition: IfxScuCcu.h:624
IfxScuCcu_Ndivider_100
N-divider 100.
Definition: IfxScuCcu.h:641
IfxScuCcu_Ndivider_12
N-divider 12.
Definition: IfxScuCcu.h:553
IfxScuCcu_K2divider_15
K2-Divider 15.
Definition: IfxScuCcu.h:288
IfxScuCcu_K3divider_128
K3-Divider 128.
Definition: IfxScuCcu.h:535
IfxScuCcu_K1divider_33
K1-Divider 33.
Definition: IfxScuCcu.h:172
IfxScuCcu_K1divider_66
K1-Divider 66.
Definition: IfxScuCcu.h:205
IfxCpu.h
CPU basic functionality.
IfxScuCcu_K3divider_56
K3-Divider 56.
Definition: IfxScuCcu.h:463
IfxScuCcu_Ndivider_74
N-divider 74.
Definition: IfxScuCcu.h:615
IfxScuCcu_K2divider_8
K2-Divider 8.
Definition: IfxScuCcu.h:281
IfxScuCcu_Ndivider_82
N-divider 82.
Definition: IfxScuCcu.h:623
IfxScuCcu_K2divider_90
K2-Divider 90.
Definition: IfxScuCcu.h:363
IfxScuCcu_K2divider_50
K2-Divider 50.
Definition: IfxScuCcu.h:323
IfxScuCcu_K2divider_81
K2-Divider 81.
Definition: IfxScuCcu.h:354
IfxScuCcu_Ndivider_62
N-divider 62.
Definition: IfxScuCcu.h:603
IfxScuCcu_K1divider_122
K1-Divider 122.
Definition: IfxScuCcu.h:261
IfxScuCcu_getPll2ErayFrequency
IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2ERAY frequency b...
Definition: IfxScuCcu.h:1077
IfxScuCcu_Ndivider_87
N-divider 87.
Definition: IfxScuCcu.h:628
IfxScuCcu_K2divider_11
K2-Divider 11.
Definition: IfxScuCcu.h:284
IfxScuCcu_K1divider_64
K1-Divider 64.
Definition: IfxScuCcu.h:203
IfxScuCcu_K3divider_97
K3-Divider 97.
Definition: IfxScuCcu.h:504
IfxScuCcu_Ndivider_94
N-divider 94.
Definition: IfxScuCcu.h:635
IfxScuCcu_K2divider_101
K2-Divider 101.
Definition: IfxScuCcu.h:374
IfxScuCcu_K2divider_28
K2-Divider 28.
Definition: IfxScuCcu.h:301
IfxScuCcu_Ndivider_38
N-divider 38.
Definition: IfxScuCcu.h:579
IfxScuCcu_K3divider_124
K3-Divider 124.
Definition: IfxScuCcu.h:531
IfxScuCcu_getPll2Frequency
IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void)
API to get actual PLL2 (K3 Divider for ADC clock) frequency This API returns the PLL2 frequency based...
Definition: IfxScuCcu.h:1087
IfxScuCcu_SysPllConfig::numOfPllDividerSteps
uint8 numOfPllDividerSteps
Number of PLL divider steps during clock throttling.
Definition: IfxScuCcu.h:759
IfxScuCcu_K3divider_26
K3-Divider 26.
Definition: IfxScuCcu.h:433
IfxScuCcu_getFsiFrequency
IFX_EXTERN float32 IfxScuCcu_getFsiFrequency(void)
API to get FSI divider frequency in Hz. This API returns the fFSI based on the divider value in CCUCO...
Definition: IfxScuCcu.c:323
IfxScuCcu_K2divider_99
K2-Divider 99.
Definition: IfxScuCcu.h:372
IfxScuCcu_Ndivider_112
N-divider 112.
Definition: IfxScuCcu.h:653
IfxScuCcu_K3divider_48
K3-Divider 48.
Definition: IfxScuCcu.h:455
IfxScuCcu_K1divider_4
K1-Divider 4.
Definition: IfxScuCcu.h:143
IfxScuCcu_K3divider_89
K3-Divider 89.
Definition: IfxScuCcu.h:496
IfxScuCcu_K3divider_50
K3-Divider 50.
Definition: IfxScuCcu.h:457
IfxScuCcu_Pdivider_13
P-divider 13.
Definition: IfxScuCcu.h:688
IfxScuCcu_Ndivider_81
N-divider 81.
Definition: IfxScuCcu.h:622
IfxScuCcu_Ndivider_16
N-divider 16.
Definition: IfxScuCcu.h:557
IfxScuCcu_K2divider_23
K2-Divider 23.
Definition: IfxScuCcu.h:296
IfxScuCcu_K1divider_44
K1-Divider 44.
Definition: IfxScuCcu.h:183
IfxScuCcu_Ndivider_4
N-divider 4.
Definition: IfxScuCcu.h:545
IfxScuCcu_K3divider_92
K3-Divider 92.
Definition: IfxScuCcu.h:499
IfxScuCcu_K1divider_14
K1-Divider 14.
Definition: IfxScuCcu.h:153
IfxScuCcu_K3divider_21
K3-Divider 21.
Definition: IfxScuCcu.h:428
IfxScuCcu_getSourceFrequency
IFX_EXTERN float32 IfxScuCcu_getSourceFrequency(void)
get source frequency fSOURCE. This API returns the source frequency based on the configurations with ...
Definition: IfxScuCcu.c:534
IfxScuCcu_K1divider_77
K1-Divider 77.
Definition: IfxScuCcu.h:216
IfxScuCcu_Ndivider_125
N-divider 125.
Definition: IfxScuCcu.h:666
IfxScuCcu_ClockDistributionConfig::ccucon2
IfxScuCcu_CcuconRegConfig ccucon2
CCUCON2 Register configuration.
Definition: IfxScuCcu.h:740
IfxScuCcu_K3divider_123
K3-Divider 123.
Definition: IfxScuCcu.h:530
IfxScuCcu_K2divider_20
K2-Divider 20.
Definition: IfxScuCcu.h:293
IfxScuCcu_K1divider_85
K1-Divider 85.
Definition: IfxScuCcu.h:224
IfxScuCcu_InitialStepConfig::waitTime
float32 waitTime
Wait time for for basic (initial) step.
Definition: IfxScuCcu.h:718
IfxScuCcu_K1divider_60
K1-Divider 60.
Definition: IfxScuCcu.h:199
IfxScuCcu_K3divider_64
K3-Divider 64.
Definition: IfxScuCcu.h:471
IfxScuCcu_K3divider_40
K3-Divider 40.
Definition: IfxScuCcu.h:447
IfxScuCcu_K3divider_83
K3-Divider 83.
Definition: IfxScuCcu.h:490
IfxScuCcu_Ndivider_7
N-divider 7.
Definition: IfxScuCcu.h:548
IfxScuCcu_K3divider_62
K3-Divider 62.
Definition: IfxScuCcu.h:469
IfxScuCcu_K3divider_3
K3-Divider 3.
Definition: IfxScuCcu.h:410
IfxScuCcu_K1divider_7
K1-Divider 7.
Definition: IfxScuCcu.h:146
IfxScuCcu_K1divider_36
K1-Divider 36.
Definition: IfxScuCcu.h:175
IfxScuCcu_K3divider_36
K3-Divider 36.
Definition: IfxScuCcu.h:443
IfxScuCcu_Ndivider_85
N-divider 85.
Definition: IfxScuCcu.h:626
IfxScuCcu_K3divider_45
K3-Divider 45.
Definition: IfxScuCcu.h:452
IfxScuCcu_K3divider_115
K3-Divider 115.
Definition: IfxScuCcu.h:522
IfxScuCcu_Ndivider_114
N-divider 114.
Definition: IfxScuCcu.h:655
IfxScuCcu_K2divider_121
K2-Divider 121.
Definition: IfxScuCcu.h:394
IfxScuCcu_K1divider_86
K1-Divider 86.
Definition: IfxScuCcu.h:225
IfxScuCcu_setSriFrequency
IFX_EXTERN float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
API to set SRI frequency (with SRI divider) This API configure Sri divider values in CCUCON registers...
Definition: IfxScuCcu.c:1206
IfxScuCcu_K2divider_24
K2-Divider 24.
Definition: IfxScuCcu.h:297
IfxScuCcu_K3divider_10
K3-Divider 10.
Definition: IfxScuCcu.h:417
IfxScuCcu_K2divider_85
K2-Divider 85.
Definition: IfxScuCcu.h:358
IfxScuCcu_Ndivider_78
N-divider 78.
Definition: IfxScuCcu.h:619
IfxScuCcu_Ndivider_75
N-divider 75.
Definition: IfxScuCcu.h:616
IfxScuCcu_defaultErayPllConfig
IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig
Configuration structure for SCU CCU driver. The values of this structure are defined as # defined mac...
Definition: IfxScuCcu.h:1059
IfxScuCcu_Ndivider_48
N-divider 48.
Definition: IfxScuCcu.h:589
IfxScuCcu_K2divider_89
K2-Divider 89.
Definition: IfxScuCcu.h:362
IfxScuCcu_K1divider_120
K1-Divider 120.
Definition: IfxScuCcu.h:259
IfxScuCcu_K3divider_20
K3-Divider 20.
Definition: IfxScuCcu.h:427
IfxScuCcu_K3divider_74
K3-Divider 74.
Definition: IfxScuCcu.h:481
IfxScuCcu_getGtmFrequency
IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
API to get GTMdivider frequency This API returns the based on the divider value in CCUCON register an...
Definition: IfxScuCcu.h:1071
IfxScuCcu_K3divider_59
K3-Divider 59.
Definition: IfxScuCcu.h:466
IfxScuCcu_Ndivider_40
N-divider 40.
Definition: IfxScuCcu.h:581
IfxScuCcu_Ndivider_37
N-divider 37.
Definition: IfxScuCcu.h:578
IfxScuCcu_K1divider_27
K1-Divider 27.
Definition: IfxScuCcu.h:166
IfxScuCcu_Pdivider_11
P-divider 11.
Definition: IfxScuCcu.h:686
IfxScuCcu_K2divider_106
K2-Divider 106.
Definition: IfxScuCcu.h:379
IfxScuCcu_K2divider_32
K2-Divider 32.
Definition: IfxScuCcu.h:305
IfxScuCcu_K3divider_33
K3-Divider 33.
Definition: IfxScuCcu.h:440
IfxScuCcu_Ndivider_55
N-divider 55.
Definition: IfxScuCcu.h:596
IfxScuCcu_Ndivider_24
N-divider 24.
Definition: IfxScuCcu.h:565
IfxScuCcu_getBbbFrequency
IFX_EXTERN float32 IfxScuCcu_getBbbFrequency(void)
API to get BBB divider frequency. This API returns the BBBDivider frequency based on the divider valu...
Definition: IfxScuCcu.c:231
IfxScuCcu_K3divider_93
K3-Divider 93.
Definition: IfxScuCcu.h:500
IfxScuCcu_Ndivider_9
N-divider 9.
Definition: IfxScuCcu.h:550
IfxScuCcu_K2divider_96
K2-Divider 96.
Definition: IfxScuCcu.h:369
IfxScuCcu_Ndivider_89
N-divider 89.
Definition: IfxScuCcu.h:630
IfxScuCcu_K1divider_61
K1-Divider 61.
Definition: IfxScuCcu.h:200
IfxScuCcu_K1divider_15
K1-Divider 15.
Definition: IfxScuCcu.h:154
IfxScuCcu_Ndivider_14
N-divider 14.
Definition: IfxScuCcu.h:555
IfxScuCcu_Pdivider_15
P-divider 15.
Definition: IfxScuCcu.h:690
IfxScuCcu_ClockDistributionConfig::ccucon5
IfxScuCcu_CcuconRegConfig ccucon5
CCUCON5 Register configuration.
Definition: IfxScuCcu.h:741
IfxScuCcu_K2divider_93
K2-Divider 93.
Definition: IfxScuCcu.h:366
IfxScuCcu_K2divider_125
K2-Divider 125.
Definition: IfxScuCcu.h:398
IfxScuCcu_Ndivider_66
N-divider 66.
Definition: IfxScuCcu.h:607
IfxScuCcu_K3divider_14
K3-Divider 14.
Definition: IfxScuCcu.h:421
IfxScuCcu_Ndivider_106
N-divider 106.
Definition: IfxScuCcu.h:647
IfxScuCcu_K2divider_114
K2-Divider 114.
Definition: IfxScuCcu.h:387
IfxScuCcu_Ndivider_73
N-divider 73.
Definition: IfxScuCcu.h:614
IfxScuCcu_InitialStepConfig::pDivider
uint8 pDivider
P divider value for basic (initial) step.
Definition: IfxScuCcu.h:715
IfxScuCcu_PllStepsConfig
Configuration structure type for the Pll Steps for current jump control.
Definition: IfxScuCcu.h:723
IfxScuCcu_K3divider_2
K3-Divider 2.
Definition: IfxScuCcu.h:409
IfxScuCcu_Ndivider_98
N-divider 98.
Definition: IfxScuCcu.h:639
IfxScuCcu_Ndivider_122
N-divider 122.
Definition: IfxScuCcu.h:663
IfxScuCcu_K1divider_68
K1-Divider 68.
Definition: IfxScuCcu.h:207
IfxScuCcu_Ndivider_71
N-divider 71.
Definition: IfxScuCcu.h:612
IfxScuCcu_Ndivider_22
N-divider 22.
Definition: IfxScuCcu.h:563
IfxScuCcu_Ndivider_8
N-divider 8.
Definition: IfxScuCcu.h:549
IfxScuCcu_K1divider_37
K1-Divider 37.
Definition: IfxScuCcu.h:176
IfxScuCcu_K1divider_12
K1-Divider 12.
Definition: IfxScuCcu.h:151
IfxScuCcu_Ndivider_34
N-divider 34.
Definition: IfxScuCcu.h:575
IfxScuCcu_K3divider_71
K3-Divider 71.
Definition: IfxScuCcu.h:478
IfxScuCcu_Ndivider_51
N-divider 51.
Definition: IfxScuCcu.h:592
IfxScuCcu_K2divider_124
K2-Divider 124.
Definition: IfxScuCcu.h:397
IfxScuCcu_K2divider_10
K2-Divider 10.
Definition: IfxScuCcu.h:283
IfxScuCcu_K1divider_62
K1-Divider 62.
Definition: IfxScuCcu.h:201
IfxScuCcu_K1divider_49
K1-Divider 49.
Definition: IfxScuCcu.h:188
IfxScuCcu_Ndivider_92
N-divider 92.
Definition: IfxScuCcu.h:633
IfxScuCcu_K3divider_28
K3-Divider 28.
Definition: IfxScuCcu.h:435
IfxScuCcu_InitialStepConfig::nDivider
uint8 nDivider
N divider value for basic (initial) step.
Definition: IfxScuCcu.h:716
IfxScuCcu_Ndivider_67
N-divider 67.
Definition: IfxScuCcu.h:608
IfxScuCcu_K1divider_84
K1-Divider 84.
Definition: IfxScuCcu.h:223
IfxScuCcu_Ndivider_127
N-divider 127.
Definition: IfxScuCcu.h:668
IfxScuCcu_K3divider_43
K3-Divider 43.
Definition: IfxScuCcu.h:450
IfxScuCcu_K3divider_88
K3-Divider 88.
Definition: IfxScuCcu.h:495
IfxScuCcu_Ndivider_110
N-divider 110.
Definition: IfxScuCcu.h:651
IfxScuCcu_K3divider_82
K3-Divider 82.
Definition: IfxScuCcu.h:489
IfxScuCcu_Ndivider_118
N-divider 118.
Definition: IfxScuCcu.h:659
IfxScuCcu_K1divider_73
K1-Divider 73.
Definition: IfxScuCcu.h:212
IfxScuCcu_K3divider_86
K3-Divider 86.
Definition: IfxScuCcu.h:493
IfxScuCcu_K1divider_30
K1-Divider 30.
Definition: IfxScuCcu.h:169
IfxScuCcu_K1divider_28
K1-Divider 28.
Definition: IfxScuCcu.h:167
IfxScuCcu_K3divider_112
K3-Divider 112.
Definition: IfxScuCcu.h:519
IfxScuCcu_K2divider_94
K2-Divider 94.
Definition: IfxScuCcu.h:367
IfxScuCcu_Pdivider
IfxScuCcu_Pdivider
MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider.
Definition: IfxScuCcu.h:674
IfxScuCcu_K3divider_79
K3-Divider 79.
Definition: IfxScuCcu.h:486
IfxScuCcu_Pdivider_5
P-divider 5.
Definition: IfxScuCcu.h:680
IfxScuCcu_K2divider_118
K2-Divider 118.
Definition: IfxScuCcu.h:391
IfxScuCcu_K2divider_127
K2-Divider 127.
Definition: IfxScuCcu.h:400
IfxScuCcu_K3divider_57
K3-Divider 57.
Definition: IfxScuCcu.h:464
IfxScuCcu_K2divider_76
K2-Divider 76.
Definition: IfxScuCcu.h:349
IfxScuCcu_switchToBackupClock
IFX_EXTERN void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
API to switch to Backup clock from the current PLL frequency.
Definition: IfxScuCcu.c:1246
IfxScuCcu_K3divider_19
K3-Divider 19.
Definition: IfxScuCcu.h:426
IfxScuCcu_K2divider_87
K2-Divider 87.
Definition: IfxScuCcu.h:360
IfxScuCcu_Ndivider_17
N-divider 17.
Definition: IfxScuCcu.h:558
IfxScuCcu_K2divider_52
K2-Divider 52.
Definition: IfxScuCcu.h:325
IfxScuCcu_K2divider_3
K2-Divider 3.
Definition: IfxScuCcu.h:276
IfxScuCcu_K1divider_29
K1-Divider 29.
Definition: IfxScuCcu.h:168
IfxScuCcu_Ndivider_95
N-divider 95.
Definition: IfxScuCcu.h:636
IfxScuCcu_K3divider_54
K3-Divider 54.
Definition: IfxScuCcu.h:461
IfxScuCcu_K3divider_111
K3-Divider 111.
Definition: IfxScuCcu.h:518
IfxScuCcu_Ndivider_35
N-divider 35.
Definition: IfxScuCcu.h:576
IfxScuCcu_initErayPllConfig
IFX_EXTERN void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg)
Initializes the clock configuration with default values.
Definition: IfxScuCcu.c:997
IfxScuCcu_K2divider_73
K2-Divider 73.
Definition: IfxScuCcu.h:346
IfxScuCcu_Ndivider_80
N-divider 80.
Definition: IfxScuCcu.h:621
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxScuCcu_K2divider_41
K2-Divider 41.
Definition: IfxScuCcu.h:314
IfxScuCcu_Ndivider_79
N-divider 79.
Definition: IfxScuCcu.h:620
IfxScuCcu_Pdivider_1
P-divider 1.
Definition: IfxScuCcu.h:676
IfxScuCcu_calculateSysPllDividers
IFX_EXTERN boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll)
The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL freque...
Definition: IfxScuCcu.c:93
IfxScuCcu_getSriFrequency
IFX_EXTERN float32 IfxScuCcu_getSriFrequency(void)
API to get SRI divider frequency. This API returns the Sri frequency based on the divider values in C...
Definition: IfxScuCcu.c:597
IfxScuCcu_K2divider_29
K2-Divider 29.
Definition: IfxScuCcu.h:302
IfxScuCcu_Ndivider
IfxScuCcu_Ndivider
MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider.
Definition: IfxScuCcu.h:540
IfxScuCcu_K2divider_44
K2-Divider 44.
Definition: IfxScuCcu.h:317
IfxScuCcu_Ndivider_111
N-divider 111.
Definition: IfxScuCcu.h:652
IfxScuCcu_K1divider_92
K1-Divider 92.
Definition: IfxScuCcu.h:231
IfxScuCcu_Pdivider_2
P-divider 2.
Definition: IfxScuCcu.h:677
IfxScuCcu_Ndivider_99
N-divider 99.
Definition: IfxScuCcu.h:640
IfxScuCcu_K2divider_128
K2-Divider 128.
Definition: IfxScuCcu.h:401
IfxScuCcu_K2divider_68
K2-Divider 68.
Definition: IfxScuCcu.h:341
IfxScuCcu_K1divider_102
K1-Divider 102.
Definition: IfxScuCcu.h:241
IfxScuCcu_K3divider_94
K3-Divider 94.
Definition: IfxScuCcu.h:501
IfxScuCcu_K3divider_18
K3-Divider 18.
Definition: IfxScuCcu.h:425
IfxScuCcu_K2divider_120
K2-Divider 120.
Definition: IfxScuCcu.h:393
IfxScuCcu_K1divider_95
K1-Divider 95.
Definition: IfxScuCcu.h:234
IfxScuCcu_Pdivider_3
P-divider 3.
Definition: IfxScuCcu.h:678
IfxScuCcu_K3divider_126
K3-Divider 126.
Definition: IfxScuCcu.h:533
IfxScuCcu_Ndivider_3
N-divider 3.
Definition: IfxScuCcu.h:544
IfxScuCcu_K1divider_43
K1-Divider 43.
Definition: IfxScuCcu.h:182
IfxScuCcu_K3divider_37
K3-Divider 37.
Definition: IfxScuCcu.h:444
IfxScuCcu_K1divider_10
K1-Divider 10.
Definition: IfxScuCcu.h:149
IfxScuCcu_K1divider_76
K1-Divider 76.
Definition: IfxScuCcu.h:215
IfxScuCcu_Ndivider_25
N-divider 25.
Definition: IfxScuCcu.h:566
IfxScuCcu_K2divider_62
K2-Divider 62.
Definition: IfxScuCcu.h:335
IfxScuCcu_Ndivider_103
N-divider 103.
Definition: IfxScuCcu.h:644
IfxScuCcu_Pdivider_7
P-divider 7.
Definition: IfxScuCcu.h:682
IfxScuCcu_Pdivider_6
P-divider 6.
Definition: IfxScuCcu.h:681
IfxScuCcu_Ndivider_20
N-divider 20.
Definition: IfxScuCcu.h:561
IfxScuCcu_K3divider_70
K3-Divider 70.
Definition: IfxScuCcu.h:477


iLLD_TC26B: IfxScuEru.c Source File

  • Scu
  • Std
IfxScuEru.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuEru.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxScuEru.h"
31
32 /******************************************************************************/
33 /*----------------------------------Macros------------------------------------*/
34 /******************************************************************************/
35
36 #define IFXSCUERU_CHANNEL_NUMBER_ODD 1
37
38 #define IFXSCUERU_TO_REGISTER_BASE 1
39
40 /******************************************************************************/
41 /*-------------------------Function Implementations---------------------------*/
42 /******************************************************************************/
43
44 void IfxScuEru_clearAllEventFlags(void)
45 {
46 uint32 mask = (0xFF << 16);
47 MODULE_SCU.FMR.U = mask;
48 }
49
50
51 void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
52 {
53 uint32 mask = 1 << (inputChannel + 16);
54 SCU_FMR.U = mask;
55 }
56
57
58 void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
59 {
60 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
61 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
62 uint32 mask = 0xFFFF;
63
64 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
65 {
66 MODULE_SCU.EICR[index].U = (MODULE_SCU.EICR[index].U & mask);
67 }
68 else // for channels 0, 2, 4 and 6
69 {
70 mask = (mask << 16);
71 MODULE_SCU.EICR[index].U = (MODULE_SCU.EICR[index].U & mask);
72 }
73 }
74
75
76 void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
77 {
78 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
79 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
80 uint32 mask = 0xFFFF;
81
82 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
83 {
84 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & mask);
85 }
86 else // for channels 0, 2, 4 and 6
87 {
88 mask = (mask << 16);
89 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & mask);
90 }
91 }
92
93
94 void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
95 {
96 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
97 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
98
99 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
100 {
101 MODULE_SCU.EICR[index].B.INP1 = triggerSelect;
102 }
103 else // for channels 0, 2, 4 and 6
104 {
105 MODULE_SCU.EICR[index].B.INP0 = triggerSelect;
106 }
107 }
108
109
110 void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
111 {
112 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
113 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
114
115 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
116 {
117 MODULE_SCU.EICR[index].B.LDEN1 = FALSE;
118 }
119 else // for channels 0, 2, 4 and 6
120 {
121 MODULE_SCU.EICR[index].B.LDEN0 = FALSE;
122 }
123 }
124
125
126 void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
127 {
128 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
129 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
130
131 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
132 {
133 MODULE_SCU.EICR[index].B.FEN1 = FALSE;
134 }
135 else // for channels 0, 2, 4 and 6
136 {
137 MODULE_SCU.EICR[index].B.FEN0 = FALSE;
138 }
139 }
140
141
142 void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
143 {
144 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
145 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
146
147 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
148 {
149 MODULE_SCU.IGCR[index].B.GEEN1 = FALSE;
150 }
151 else // for channels 0, 2, 4 and 6
152 {
153 MODULE_SCU.IGCR[index].B.GEEN0 = FALSE;
154 }
155 }
156
157
158 void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
159 {
160 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
161 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
162
163 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
164 {
165 MODULE_SCU.EICR[index].B.REN1 = FALSE;
166 }
167 else // for channels 0, 2, 4 and 6
168 {
169 MODULE_SCU.EICR[index].B.REN0 = FALSE;
170 }
171 }
172
173
174 void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
175 {
176 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
177 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
178
179 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
180 {
181 MODULE_SCU.EICR[index].B.EIEN1 = FALSE;
182 }
183 else // for channels 0, 2, 4 and 6
184 {
185 MODULE_SCU.EICR[index].B.EIEN0 = FALSE;
186 }
187 }
188
189
190 void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
191 {
192 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
193 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
194
195 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
196 {
197 MODULE_SCU.EICR[index].B.LDEN1 = TRUE;
198 }
199 else // for channels 0, 2, 4 and 6
200 {
201 MODULE_SCU.EICR[index].B.LDEN0 = TRUE;
202 }
203 }
204
205
206 void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
207 {
208 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
209 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
210
211 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
212 {
213 MODULE_SCU.EICR[index].B.FEN1 = TRUE;
214 }
215 else // for channels 0, 2, 4 and 6
216 {
217 MODULE_SCU.EICR[index].B.FEN0 = TRUE;
218 }
219 }
220
221
222 void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
223 {
224 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
225 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
226
227 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
228 {
229 MODULE_SCU.IGCR[index].B.GEEN1 = TRUE;
230 }
231 else // for channels 0, 2, 4 and 6
232 {
233 MODULE_SCU.IGCR[index].B.GEEN0 = TRUE;
234 }
235 }
236
237
238 void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
239 {
240 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
241 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
242
243 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
244 {
245 MODULE_SCU.EICR[index].B.REN1 = TRUE;
246 }
247 else // for channels 0, 2, 4 and 6
248 {
249 MODULE_SCU.EICR[index].B.REN0 = TRUE;
250 }
251 }
252
253
254 void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
255 {
256 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
257 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
258
259 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
260 {
261 MODULE_SCU.EICR[index].B.EIEN1 = TRUE;
262 }
263 else // for channels 0, 2, 4 and 6
264 {
265 MODULE_SCU.EICR[index].B.EIEN0 = TRUE;
266 }
267 }
268
269
270 uint32 IfxScuEru_getAllEventFlagsStatus(void)
271 {
272 return MODULE_SCU.EIFR.U;
273 }
274
275
276 boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
277 {
278 uint32 mask = (1U << inputChannel);
279 return (MODULE_SCU.EIFR.U & mask) ? TRUE : FALSE;
280 }
281
282
283 uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
284 {
285 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
286 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
287 uint32 status, mask = 0xFFFF;
288
289 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
290 {
291 mask = (mask << 16);
292 status = (MODULE_SCU.EICR[index].U & mask);
293 }
294 else // for channels 0, 2, 4 and 6
295 {
296 status = (MODULE_SCU.EICR[index].U & mask);
297 }
298
299 return status;
300 }
301
302
303 uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
304 {
305 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
306 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
307 uint32 status, mask = 0xFFFF;
308
309 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
310 {
311 mask = (mask << 16);
312 status = (MODULE_SCU.IGCR[index].U & mask);
313 }
314 else // for channels 0, 2, 4 and 6
315 {
316 status = (MODULE_SCU.IGCR[index].U & mask);
317 }
318
319 return status;
320 }
321
322
323 boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
324 {
325 uint32 mask = (1U << outputChannel);
326 return (MODULE_SCU.PDRR.U & mask) ? TRUE : FALSE;
327 }
328
329
330 uint32 IfxScuEru_getWholePatternDetectionResult(void)
331 {
332 return MODULE_SCU.PDRR.U;
333 }
334
335
336 void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
337 {
338 // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
339 uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
340
341 if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
342 {
343 MODULE_SCU.EICR[index].B.EXIS1 = inputSignal;
344 }
345 else // for channels 0, 2, 4 and 6
346 {
347 MODULE_SCU.EICR[index].B.EXIS0 = inputSignal;
348 }
349 }
350
351
352 void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
353 {
354 uint32 mask = 1 << inputChannel;
355 SCU_FMR.U = mask;
356 }
357
358
359 void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
360 {
361 uint32 shift, mask;
362
363 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
364 {
365 shift = (inputChannel + 16); // offset at location IPEN10
366 mask = (1 << shift);
367 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
368 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
369 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & ~mask) | ((uint32)state << shift);
370 }
371 else // for channels 0, 2, 4 and 6
372 {
373 shift = inputChannel;
374 mask = (1 << shift);
375 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
376 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
377 MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & ~mask) | ((uint32)state << shift);
378 }
379 }
380
381
382 void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
383 {
384 // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
385 uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
386
387 if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
388 {
389 MODULE_SCU.IGCR[index].B.IGP1 = gatingPattern;
390 }
391 else // for channels 0, 2, 4 and 6
392 {
393 MODULE_SCU.IGCR[index].B.IGP0 = gatingPattern;
394 }
395 }
IfxScuEru_disableTriggerPulse
void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:174
IfxScuEru_enableTriggerPulse
void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:254
IfxScuEru_ExternalInputSelection
IfxScuEru_ExternalInputSelection
Input line selection for input channel Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0...
Definition: IfxScuEru.h:62
IfxScuEru_disableFallingEdgeDetection
void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:126
IfxScuEru_getWholePatternDetectionResult
uint32 IfxScuEru_getWholePatternDetectionResult(void)
Returns the whole pattern detection result of all the selcted output channels.
Definition: IfxScuEru.c:330
IfxScuEru_clearOutputChannelConfiguration
void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:76
IfxScuEru_enablePatternDetectionTrigger
void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detecti...
Definition: IfxScuEru.c:222
IfxScuEru_clearInputChannelConfiguration
void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x.
Definition: IfxScuEru.c:58
IfxScuEru_setEventFlag
void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:352
IfxScuEru_InputNodePointer
IfxScuEru_InputNodePointer
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)). Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
Definition: IfxScuEru.h:87
IfxScuEru_disablePatternDetectionTrigger
void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detect...
Definition: IfxScuEru.c:142
IfxScuEru_getOutputChannelConfiguration
uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:303
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxScuEru_clearAllEventFlags
void IfxScuEru_clearAllEventFlags(void)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:44
IfxScuEru_setInterruptGatingPattern
void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the ou...
Definition: IfxScuEru.c:382
IfxScuEru.h
SCU basic functionality.
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxScuEru_connectTrigger
void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
Definition: IfxScuEru.c:94
IfxScuEru_OutputChannel
IfxScuEru_OutputChannel
Output channel for combination of events, definition of their effects and distribution to the system ...
Definition: IfxScuEru.h:112
IfxScuEru_InterruptGatingPattern
IfxScuEru_InterruptGatingPattern
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy Definition in I...
Definition: IfxScuEru.h:102
IfxScuEru_getEventFlagStatus
boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:276
IfxScuEru_setFlagPatternDetection
void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating.
Definition: IfxScuEru.c:359
IfxScuEru_disableRisingEdgeDetection
void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:158
IfxScuEru_getPatternDetectionResult
boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy)
Definition: IfxScuEru.c:323
IFXSCUERU_TO_REGISTER_BASE
#define IFXSCUERU_TO_REGISTER_BASE
Definition: IfxScuEru.c:38
IfxScuEru_getInputChannelConfiguration
uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x.
Definition: IfxScuEru.c:283
IfxScuEru_InputChannel
IfxScuEru_InputChannel
Input channel for input selection and conditioning of trigger or gating functions.
Definition: IfxScuEru.h:72
IfxScuEru_disableAutoClear
void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:110
IFXSCUERU_CHANNEL_NUMBER_ODD
#define IFXSCUERU_CHANNEL_NUMBER_ODD
Definition: IfxScuEru.c:36
IfxScuEru_selectExternalInput
void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x.
Definition: IfxScuEru.c:336
IfxScuEru_enableFallingEdgeDetection
void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:206
IfxScuEru_clearEventFlag
void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:51
IfxScuEru_enableRisingEdgeDetection
void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:238
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxScuEru_enableAutoClear
void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:190
IfxScuEru_getAllEventFlagsStatus
uint32 IfxScuEru_getAllEventFlagsStatus(void)
Returns the status of the flags of all input channels.
Definition: IfxScuEru.c:270


iLLD_TC26B: IfxScuEru.h Source File

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IfxScuEru.h
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1 /**
2 * \file IfxScuEru.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Scu_Std_Eru Eru Basic Functionality
26 * \ingroup IfxLld_Scu_Std
27 * \defgroup IfxLld_Scu_Std_Eru_Enum ERU: Enumerations
28 * \ingroup IfxLld_Scu_Std_Eru
29 * \defgroup IfxLld_Scu_Std_Eru_External_Request_Selection ERU: External Request Selection
30 * \ingroup IfxLld_Scu_Std_Eru
31 * \defgroup IfxLld_Scu_Std_Eru_Event_Trigger_Logic ERU: Event Trigger Logic
32 * \ingroup IfxLld_Scu_Std_Eru
33 * \defgroup IfxLld_Scu_Std_Eru_Connecting_Matrix ERU: Connecting Matrix
34 * \ingroup IfxLld_Scu_Std_Eru
35 * \defgroup IfxLld_Scu_Std_Eru_Output_Gating_Unit ERU: Output Gating Unit
36 * \ingroup IfxLld_Scu_Std_Eru
37 * \defgroup IfxLld_Scu_Std_Eru_Data_Structures ERU: Data Structures
38 * \ingroup IfxLld_Scu_Std_Eru
39 */
40
41 #ifndef IFXSCUERU_H
42 #define IFXSCUERU_H 1
43
44 /******************************************************************************/
45 /*----------------------------------Includes----------------------------------*/
46 /******************************************************************************/
47
48 #include "_Impl/IfxScu_cfg.h"
49 #include "IfxScu_reg.h"
50 #include "Cpu/Std/IfxCpu.h"
51 #include "_PinMap/IfxScu_PinMap.h"
52
53 /******************************************************************************/
54 /*--------------------------------Enumerations--------------------------------*/
55 /******************************************************************************/
56
57 /** \addtogroup IfxLld_Scu_Std_Eru_Enum
58 * \{ */
59 /** \brief Input line selection for input channel\n
60 * Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1)
61 */
62 typedef enum
63 {
64 IfxScuEru_ExternalInputSelection_0 = 0, /**< \brief External input 0 is selected */
65 IfxScuEru_ExternalInputSelection_1, /**< \brief External input 1 is selected */
66 IfxScuEru_ExternalInputSelection_2, /**< \brief External input 2 is selected */
67 IfxScuEru_ExternalInputSelection_3 /**< \brief External input 3 is selected */
68 } IfxScuEru_ExternalInputSelection;
69
70 /** \brief Input channel for input selection and conditioning of trigger or gating functions
71 */
72 typedef enum
73 {
74 IfxScuEru_InputChannel_0 = 0, /**< \brief External Input channel 0 */
75 IfxScuEru_InputChannel_1, /**< \brief External Input channel 1 */
76 IfxScuEru_InputChannel_2, /**< \brief External Input channel 2 */
77 IfxScuEru_InputChannel_3, /**< \brief External Input channel 3 */
78 IfxScuEru_InputChannel_4, /**< \brief External Input channel 4 */
79 IfxScuEru_InputChannel_5, /**< \brief External Input channel 5 */
80 IfxScuEru_InputChannel_6, /**< \brief External Input channel 6 */
81 IfxScuEru_InputChannel_7 /**< \brief External Input channel 7 */
82 } IfxScuEru_InputChannel;
83
84 /** \brief Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).\n
85 * Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
86 */
87 typedef enum
88 {
89 IfxScuEru_InputNodePointer_0 = 0, /**< \brief Event from input ETLx triggers output OGU0 (signal TRx0) */
90 IfxScuEru_InputNodePointer_1, /**< \brief Event from input ETLx triggers output OGU1 (signal TRx1) */
91 IfxScuEru_InputNodePointer_2, /**< \brief Event from input ETLx triggers output OGU2 (signal TRx2) */
92 IfxScuEru_InputNodePointer_3, /**< \brief Event from input ETLx triggers output OGU3 (signal TRx3) */
93 IfxScuEru_InputNodePointer_4, /**< \brief Event from input ETLx triggers output OGU4 (signal TRx4) */
94 IfxScuEru_InputNodePointer_5, /**< \brief Event from input ETLx triggers output OGU5 (signal TRx5) */
95 IfxScuEru_InputNodePointer_6, /**< \brief Event from input ETLx triggers output OGU6 (signal TRx6) */
96 IfxScuEru_InputNodePointer_7 /**< \brief Event from input ETLx triggers output OGU7 (signal TRx7) */
97 } IfxScuEru_InputNodePointer;
98
99 /** \brief Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy\n
100 * Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1)
101 */
102 typedef enum
103 {
104 IfxScuEru_InterruptGatingPattern_none = 0, /**< \brief IOUTy is inactive, (the pattern is not considered) */
105 IfxScuEru_InterruptGatingPattern_alwaysActive = 1, /**< \brief IOUTy is activated in response to a trigger event, (the pattern is not considered) */
106 IfxScuEru_InterruptGatingPattern_patternMatch = 2, /**< \brief IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considered) */
107 IfxScuEru_InterruptGatingPattern_patternMiss = 3 /**< \brief IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not considered) */
108 } IfxScuEru_InterruptGatingPattern;
109
110 /** \brief Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
111 */
112 typedef enum
113 {
114 IfxScuEru_OutputChannel_0 = 0, /**< \brief Output channel 0 */
115 IfxScuEru_OutputChannel_1, /**< \brief Output channel 1 */
116 IfxScuEru_OutputChannel_2, /**< \brief Output channel 2 */
117 IfxScuEru_OutputChannel_3, /**< \brief Output channel 3 */
118 IfxScuEru_OutputChannel_4, /**< \brief Output channel 4 */
119 IfxScuEru_OutputChannel_5, /**< \brief Output channel 5 */
120 IfxScuEru_OutputChannel_6, /**< \brief Output channel 6 */
121 IfxScuEru_OutputChannel_7 /**< \brief Output channel 7 */
122 } IfxScuEru_OutputChannel;
123
124 /** \} */
125
126 /** \addtogroup IfxLld_Scu_Std_Eru_External_Request_Selection
127 * \{ */
128
129 /******************************************************************************/
130 /*-------------------------Inline Function Prototypes-------------------------*/
131 /******************************************************************************/
132
133 /** \brief Initialises the External request Pin
134 * \param req External request pin
135 * \param inputMode Port Input mode
136 * \return None
137 */
138 IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode);
139
140 /******************************************************************************/
141 /*-------------------------Global Function Prototypes-------------------------*/
142 /******************************************************************************/
143
144 /** \brief Determines which input line is selcted for input channel x
145 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
146 * \param inputSignal Input line selection for input channel
147 * \return None
148 */
149 IFX_EXTERN void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal);
150
151 /** \} */
152
153 /** \addtogroup IfxLld_Scu_Std_Eru_Event_Trigger_Logic
154 * \{ */
155
156 /******************************************************************************/
157 /*-------------------------Global Function Prototypes-------------------------*/
158 /******************************************************************************/
159
160 /** \brief Clears the external event flag of input channel x (INTFx)
161 * \return None
162 */
163 IFX_EXTERN void IfxScuEru_clearAllEventFlags(void);
164
165 /** \brief Clears the external event flag of input channel x (INTFx)
166 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
167 * \return None
168 */
169 IFX_EXTERN void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel);
170
171 /** \brief Clears all the configuration for the given input channel x
172 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
173 * \return None
174 */
175 IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel);
176
177 /** \brief Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected
178 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
179 * \return None
180 */
181 IFX_EXTERN void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel);
182
183 /** \brief Disables the falling edge of input channel to set the bit INTF x
184 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
185 * \return None
186 */
187 IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel);
188
189 /** \brief Disables the rising edge of input channel to set the bit INTF x
190 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
191 * \return None
192 */
193 IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel);
194
195 /** \brief Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected
196 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
197 * \return None
198 */
199 IFX_EXTERN void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel);
200
201 /** \brief Enables the falling edge of input channel to set the bit INTF x
202 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
203 * \return None
204 */
205 IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel);
206
207 /** \brief Enables the rising edge of input channel to set the bit INTF x
208 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
209 * \return None
210 */
211 IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel);
212
213 /** \brief Returns the status of the flags of all input channels
214 * \return All flags Status
215 */
216 IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus(void);
217
218 /** \brief Returns the status of the external event flag of input channel x (INTFx)
219 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
220 * \return Status (TRUE / FALSE)
221 */
222 IFX_EXTERN boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel);
223
224 /** \brief Returns all the configuration for the given input channel x
225 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
226 * \return Input channel configuration
227 */
228 IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel);
229
230 /** \brief Sets the external event flag of input channel x (INTFx)
231 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
232 * \return None
233 */
234 IFX_EXTERN void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel);
235
236 /** \} */
237
238 /** \addtogroup IfxLld_Scu_Std_Eru_Connecting_Matrix
239 * \{ */
240
241 /******************************************************************************/
242 /*-------------------------Global Function Prototypes-------------------------*/
243 /******************************************************************************/
244
245 /** \brief Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
246 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
247 * \param triggerSelect Trigger event selection
248 * \return None
249 */
250 IFX_EXTERN void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect);
251
252 /** \brief Disables the generation of a trigger event for input channel x when the selected edge is detected
253 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
254 * \return None
255 */
256 IFX_EXTERN void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel);
257
258 /** \brief Enables the generation of a trigger event for input channel x when the selected edge is detected
259 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
260 * \return None
261 */
262 IFX_EXTERN void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel);
263
264 /** \brief Enables the flag INTFx to take part in the pattern detection for output gating
265 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
266 * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
267 * \param state FALSE: the bit INTFx does not take part in the pattern detection IPENjy = 0\n
268 * TRUE : the bit INTFx is taken into consideration for the pattern detection IPENjy = 1
269 * \return None
270 */
271 IFX_EXTERN void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state);
272
273 /** \} */
274
275 /** \addtogroup IfxLld_Scu_Std_Eru_Output_Gating_Unit
276 * \{ */
277
278 /******************************************************************************/
279 /*-------------------------Global Function Prototypes-------------------------*/
280 /******************************************************************************/
281
282 /** \brief Clears all the configuration for the given input channel y
283 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
284 * \return None
285 */
286 IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel);
287
288 /** \brief Disables the generation of a trigger event for output channel y when the result of the pattern detection changes
289 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
290 * \return None
291 */
292 IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel);
293
294 /** \brief Enables the generation of a trigger event for output channel y when the result of the pattern detection changes
295 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
296 * \return None
297 */
298 IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel);
299
300 /** \brief Clears all the configuration for the given input channel y
301 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
302 * \return Output channel configuration
303 */
304 IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel);
305
306 /** \brief Returns the status of the pattern detection result of output channel y (PDRy)
307 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
308 * \return Status (TRUE / FALSE)
309 */
310 IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel);
311
312 /** \brief Returns the whole pattern detection result of all the selcted output channels
313 * \return Detected pattern
314 */
315 IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult(void);
316
317 /** \brief Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT
318 * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
319 * \param gatingPattern Interrupt gating pattern to determine how the pattern detection influences the ouput lines GOUT and IOUT
320 * \return None
321 */
322 IFX_EXTERN void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern);
323
324 /** \} */
325
326 /******************************************************************************/
327 /*---------------------Inline Function Implementations------------------------*/
328 /******************************************************************************/
329
330 IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode)
331 {
332 IfxPort_setPinModeInput(req->pin.port, req->pin.pinIndex, inputMode);
333 IfxScuEru_selectExternalInput((IfxScuEru_InputChannel)req->channelId, (IfxScuEru_ExternalInputSelection)req->select);
334 }
335
336
337 #endif /* IFXSCUERU_H */
IfxScuEru_OutputChannel_2
Output channel 2.
Definition: IfxScuEru.h:116
IfxScuEru_disableTriggerPulse
IFX_EXTERN void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Disables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:174
IfxScuEru_enableTriggerPulse
IFX_EXTERN void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
Enables the generation of a trigger event for input channel x when the selected edge is detected...
Definition: IfxScuEru.c:254
IfxScuEru_ExternalInputSelection
IfxScuEru_ExternalInputSelection
Input line selection for input channel Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0...
Definition: IfxScuEru.h:62
IfxScuEru_InputChannel_0
External Input channel 0.
Definition: IfxScuEru.h:74
IfxScuEru_disableFallingEdgeDetection
IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:126
IfxScuEru_getWholePatternDetectionResult
IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult(void)
Returns the whole pattern detection result of all the selcted output channels.
Definition: IfxScuEru.c:330
IfxScu_Req_In::channelId
uint8 channelId
ERU Channel ID.
Definition: IfxScu_PinMap.h:57
IfxScu_PinMap.h
SCU I/O map.
IfxScuEru_OutputChannel_5
Output channel 5.
Definition: IfxScuEru.h:119
IfxScuEru_clearOutputChannelConfiguration
IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:76
IfxScuEru_enablePatternDetectionTrigger
IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Enables the generation of a trigger event for output channel y when the result of the pattern detecti...
Definition: IfxScuEru.c:222
IfxScuEru_clearInputChannelConfiguration
IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Clears all the configuration for the given input channel x.
Definition: IfxScuEru.c:58
IfxScuEru_InputNodePointer_0
Event from input ETLx triggers output OGU0 (signal TRx0)
Definition: IfxScuEru.h:89
IfxScuEru_InputChannel_4
External Input channel 4.
Definition: IfxScuEru.h:78
IfxScuEru_setEventFlag
IFX_EXTERN void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
Sets the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:352
IfxScuEru_InputChannel_5
External Input channel 5.
Definition: IfxScuEru.h:79
IfxScuEru_InputNodePointer
IfxScuEru_InputNodePointer
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)). Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
Definition: IfxScuEru.h:87
IfxScuEru_disablePatternDetectionTrigger
IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
Disables the generation of a trigger event for output channel y when the result of the pattern detect...
Definition: IfxScuEru.c:142
IfxScuEru_InterruptGatingPattern_patternMatch
IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considere...
Definition: IfxScuEru.h:106
IfxScuEru_getOutputChannelConfiguration
IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
Clears all the configuration for the given input channel y.
Definition: IfxScuEru.c:303
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxScuEru_clearAllEventFlags
IFX_EXTERN void IfxScuEru_clearAllEventFlags(void)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:44
IfxScuEru_InputNodePointer_7
Event from input ETLx triggers output OGU7 (signal TRx7)
Definition: IfxScuEru.h:96
IfxScuEru_ExternalInputSelection_1
External input 1 is selected.
Definition: IfxScuEru.h:65
IfxScuEru_setInterruptGatingPattern
IFX_EXTERN void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the ou...
Definition: IfxScuEru.c:382
IfxScuEru_OutputChannel_6
Output channel 6.
Definition: IfxScuEru.h:120
IfxScuEru_InterruptGatingPattern_alwaysActive
IOUTy is activated in response to a trigger event, (the pattern is not considered) ...
Definition: IfxScuEru.h:105
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxScuEru_ExternalInputSelection_0
External input 0 is selected.
Definition: IfxScuEru.h:64
IfxScuEru_OutputChannel_0
Output channel 0.
Definition: IfxScuEru.h:114
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxScuEru_InputNodePointer_6
Event from input ETLx triggers output OGU6 (signal TRx6)
Definition: IfxScuEru.h:95
IfxScuEru_InputNodePointer_5
Event from input ETLx triggers output OGU5 (signal TRx5)
Definition: IfxScuEru.h:94
IfxScuEru_InputChannel_3
External Input channel 3.
Definition: IfxScuEru.h:77
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuEru_connectTrigger
IFX_EXTERN void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
Definition: IfxScuEru.c:94
IfxScuEru_InputChannel_6
External Input channel 6.
Definition: IfxScuEru.h:80
IfxScuEru_ExternalInputSelection_3
External input 3 is selected.
Definition: IfxScuEru.h:67
IfxScuEru_OutputChannel
IfxScuEru_OutputChannel
Output channel for combination of events, definition of their effects and distribution to the system ...
Definition: IfxScuEru.h:112
IfxScuEru_InterruptGatingPattern
IfxScuEru_InterruptGatingPattern
Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy Definition in I...
Definition: IfxScuEru.h:102
IfxScuEru_InterruptGatingPattern_none
IOUTy is inactive, (the pattern is not considered)
Definition: IfxScuEru.h:104
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxScuEru_getEventFlagStatus
IFX_EXTERN boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
Returns the status of the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:276
IfxScuEru_setFlagPatternDetection
IFX_EXTERN void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
Enables the flag INTFx to take part in the pattern detection for output gating.
Definition: IfxScuEru.c:359
IfxScuEru_OutputChannel_1
Output channel 1.
Definition: IfxScuEru.h:115
IfxScuEru_disableRisingEdgeDetection
IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Disables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:158
IfxScuEru_getPatternDetectionResult
IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
Returns the status of the pattern detection result of output channel y (PDRy)
Definition: IfxScuEru.c:323
IfxCpu.h
CPU basic functionality.
IfxScuEru_InputChannel_1
External Input channel 1.
Definition: IfxScuEru.h:75
IfxScuEru_ExternalInputSelection_2
External input 2 is selected.
Definition: IfxScuEru.h:66
IfxScuEru_InputChannel_7
External Input channel 7.
Definition: IfxScuEru.h:81
IfxScuEru_InputNodePointer_2
Event from input ETLx triggers output OGU2 (signal TRx2)
Definition: IfxScuEru.h:91
IfxScuEru_getInputChannelConfiguration
IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
Returns all the configuration for the given input channel x.
Definition: IfxScuEru.c:283
IfxScu_Req_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxScu_PinMap.h:58
IfxScuEru_InputChannel
IfxScuEru_InputChannel
Input channel for input selection and conditioning of trigger or gating functions.
Definition: IfxScuEru.h:72
IfxScuEru_OutputChannel_3
Output channel 3.
Definition: IfxScuEru.h:117
IfxScuEru_initReqPin
IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode)
Initialises the External request Pin.
Definition: IfxScuEru.h:330
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxScuEru_disableAutoClear
IFX_EXTERN void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
Disables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:110
IfxScu_Req_In
External Request pin mapping structure.
Definition: IfxScu_PinMap.h:54
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxScuEru_selectExternalInput
IFX_EXTERN void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
Determines which input line is selcted for input channel x.
Definition: IfxScuEru.c:336
IfxScuEru_OutputChannel_7
Output channel 7.
Definition: IfxScuEru.h:121
IfxScuEru_enableFallingEdgeDetection
IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the falling edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:206
IfxScuEru_clearEventFlag
IFX_EXTERN void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
Clears the external event flag of input channel x (INTFx)
Definition: IfxScuEru.c:51
IfxScu_Req_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxScu_PinMap.h:59
IfxScuEru_enableRisingEdgeDetection
IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
Enables the rising edge of input channel to set the bit INTF x.
Definition: IfxScuEru.c:238
IfxScuEru_InputNodePointer_1
Event from input ETLx triggers output OGU1 (signal TRx1)
Definition: IfxScuEru.h:90
IfxScuEru_OutputChannel_4
Output channel 4.
Definition: IfxScuEru.h:118
IfxScuEru_InterruptGatingPattern_patternMiss
IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not c...
Definition: IfxScuEru.h:107
IfxScuEru_enableAutoClear
IFX_EXTERN void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
Enables the automatic clearing of INTFx when the edge of input channel which has not been selected...
Definition: IfxScuEru.c:190
IfxScuEru_getAllEventFlagsStatus
IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus(void)
Returns the status of the flags of all input channels.
Definition: IfxScuEru.c:270
IfxScuEru_InputNodePointer_4
Event from input ETLx triggers output OGU4 (signal TRx4)
Definition: IfxScuEru.h:93
IfxScuEru_InputChannel_2
External Input channel 2.
Definition: IfxScuEru.h:76
IfxScuEru_InputNodePointer_3
Event from input ETLx triggers output OGU3 (signal TRx3)
Definition: IfxScuEru.h:92


iLLD_TC26B: IfxScuWdt.asm.h Source File

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  • Std
IfxScuWdt.asm.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuWdt.asm.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Scu_Std_Wdt_Operative Wdt Operative Functionality
25 * \ingroup IfxLld_Scu_Std_Wdt
26 */
27 #ifndef IFXSCUWDT_ASM_H
28 #define IFXSCUWDT_ASM_H 1
29
30 #include "Cpu/Std/Ifx_Types.h"
31 #include "IfxScu_reg.h"
32
33 /** \addtogroup IfxLld_Scu_Std_Wdt_Operative
34 * \{ */
35 #define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))
36 /**
37 * \brief SCUWDT Inline API utility to Calculte new 14-bit LFSR.
38 *
39 * This API will Calculte new 14-bit LFSR (Linear Feedback Shift Register) with characteristic polynomial
40 * x14+x13+x12+x2+1.
41 *
42 * \param password Password for which LFSR value to be calculated.
43 * \return New LFSR.
44 */
45 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 password);
46 /** \} */
47
48 /**
49 * \brief SCUWDT Inline API utility to Calculte new 14-bit LFSR.
50 */
51 #if defined(__HIGHTEC__)
52 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
53 {
54 /* *INDENT-OFF* */
55 uint32 temp = pwd;
56 uint16 res;
57
58 __asm("xor.t %0,%1,13,%1,12 \n\
59 xor.t %0,%0,0,%1,11 \n\
60 sh.xor.t %1,%0,0,%1,1 \n\
61 extr.u %0,%1,0,14 \n" : "=&d" (res) : "d" (temp));
62 return res;
63 /* *INDENT-ON* */
64 }
65 #endif
66 #if defined(__TASKING__)
67 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
68 {
69 /* *INDENT-OFF* */
70 uint32 temp = pwd;
71 uint16 res;
72
73 __asm("xor.t %0,%1,13,%1,12 \n\
74 xor.t %0,%0,0,%1,11 \n\
75 sh.xor.t %1,%0,0,%1,1 \n\
76 mov d4,#0 \n\
77 mov d5,#14 \n\
78 extr.u %0,%1,e4 \n" : "=&d" (res) : "d" (temp));
79 return res;
80 /* *INDENT-ON* */
81 }
82 #endif
83 #if defined(__DCC__)
84 /* *INDENT-OFF* */
85 asm uint16 IfxScuWdt_calculateLfsr_asm(uint16 password)
86 {
87 %reg password
88 !"%d2"
89 xor.t %d2, password, 13, password, 12
90 xor.t %d2, %d2, 0, password, 11
91 sh.xor.t password,%d2,0,password,1
92 extr.u %d2,password,0,14
93 }
94 /* *INDENT-ON* */
95 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
96 {
97 return IfxScuWdt_calculateLfsr_asm(pwd);
98 }
99 #endif
100 #if defined(__ghs__)
101 IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
102 {
103 /* *INDENT-OFF* */
104 uint32 temp = pwd;
105 uint16 res;
106
107 __asm("xor.t %0,%1,13,%1,12 \n\
108 xor.t %0,%0,0,%1,11 \n\
109 sh.xor.t %1,%0,0,%1,1 \n\
110 extr.u %0,%1,0,14 \n" : "=&d" (res) : "d" (temp));
111 return res;
112 /* *INDENT-ON* */
113 }
114 #endif
115 #endif
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxScuWdt_calculateLfsr
IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 password)
SCUWDT Inline API utility to Calculte new 14-bit LFSR.
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
uint16
unsigned short uint16
Definition: Platform_Types.h:109
extr
sint32 extr
Definition: IfxCpu_IntrinsicsDcc.h:381


iLLD_TC26B: IfxScuWdt.c Source File

  • Scu
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IfxScuWdt.c
Go to the documentation of this file.
1 /**
2 * \file IfxScuWdt.c
3 * \brief SCU basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxScuWdt.h"
31 #include "Cpu/Std/IfxCpu.h"
32
33 /******************************************************************************/
34 /*----------------------------------Macros------------------------------------*/
35 /******************************************************************************/
36
37 /** \brief Reset password of watchdog module.
38 */
39 #define IFXSCUWDT_RESET_PASSWORD (0x3CU)
40
41 /******************************************************************************/
42 /*-------------------------Function Implementations---------------------------*/
43 /******************************************************************************/
44
45 void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
46 {
47 Ifx_SCU_WDTCPU *watchdog = &MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()];
48
49 /* Read Config_0 register */
50 Ifx_SCU_WDTCPU_CON0 wdt_con0;
51 wdt_con0.U = watchdog->CON0.U;
52
53 if (wdt_con0.B.LCK)
54 {
55 /* see Table 1 (Password Access Bit Pattern Requirements) */
56 wdt_con0.B.ENDINIT = 1;
57 wdt_con0.B.LCK = 0;
58 wdt_con0.B.PW = password;
59
60 /* Password ready. Store it to WDT_CON0 to unprotect the register */
61 watchdog->CON0.U = wdt_con0.U;
62 }
63
64 /* Set new Password, ENDINT and LCK bit in Config_0 register */
65 wdt_con0.B.ENDINIT = 1;
66 wdt_con0.B.LCK = 1;
67 wdt_con0.B.PW = newPassword;
68 watchdog->CON0.U = wdt_con0.U;
69
70 /* read back ENDINIT and wait until it has been set */
71 while (watchdog->CON0.B.ENDINIT == 0)
72 {}
73 }
74
75
76 void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
77 {
78 /* Select CPU Watchdog based on Core Id */
79 uint32 coreId = IfxCpu_getCoreIndex();
80 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
81
82 /* Read Config_0 register */
83 Ifx_SCU_WDTCPU_CON0 wdt_con0;
84 wdt_con0.U = wdt->CON0.U;
85
86 if (wdt_con0.B.LCK)
87 {
88 /* see Table 1 (Password Access Bit Pattern Requirements) */
89 wdt_con0.B.ENDINIT = 1;
90 wdt_con0.B.LCK = 0;
91 wdt_con0.B.PW = password;
92
93 /* Password ready. Store it to WDT_CON0 to unprotect the register */
94 wdt->CON0.U = wdt_con0.U;
95 }
96
97 /* Set new Reload value, set ENDINT and LCK bit in Config_0 register */
98 wdt_con0.B.ENDINIT = 1;
99 wdt_con0.B.LCK = 1;
100 wdt_con0.B.REL = reload;
101 wdt->CON0.U = wdt_con0.U;
102
103 /* read back ENDINIT and wait until it has been set */
104 while (wdt->CON0.B.ENDINIT == 0)
105 {}
106 }
107
108
109 void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
110 {
111 Ifx_SCU_WDTS *watchdog = &MODULE_SCU.WDTS;
112
113 /* Read Config_0 register */
114 Ifx_SCU_WDTS_CON0 wdt_con0;
115 wdt_con0.U = watchdog->CON0.U;
116
117 if (wdt_con0.B.LCK)
118 {
119 /* see Table 1 (Password Access Bit Pattern Requirements) */
120 wdt_con0.B.ENDINIT = 1;
121 wdt_con0.B.LCK = 0;
122 wdt_con0.B.PW = password;
123
124 /* Password ready. Store it to WDT_CON0 to unprotect the register */
125 watchdog->CON0.U = wdt_con0.U;
126 }
127
128 /* Set new Password, ENDINT and LCK bit in Config_0 register */
129 wdt_con0.B.ENDINIT = 1;
130 wdt_con0.B.LCK = 1;
131 wdt_con0.B.PW = newPassword;
132 watchdog->CON0.U = wdt_con0.U;
133
134 /* read back ENDINIT and wait until it has been set */
135 while (watchdog->CON0.B.ENDINIT == 0)
136 {}
137 }
138
139
140 void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
141 {
142 /* Initialize pointer to Safety Watchdog */
143 Ifx_SCU_WDTS *wdt = &MODULE_SCU.WDTS;
144
145 /* Read Config_0 register */
146 Ifx_SCU_WDTS_CON0 wdt_con0;
147 wdt_con0.U = wdt->CON0.U;
148
149 if (wdt_con0.B.LCK)
150 {
151 /* see Table 1 (Password Access Bit Pattern Requirements) */
152 wdt_con0.B.ENDINIT = 1;
153 wdt_con0.B.LCK = 0;
154 wdt_con0.B.PW = password;
155
156 /* Password ready. Store it to WDT_CON0 to unprotect the register */
157 wdt->CON0.U = wdt_con0.U;
158 }
159
160 /* Set new Reload value, set ENDINT and LCK bit in Config_0 register */
161 wdt_con0.B.ENDINIT = 1;
162 wdt_con0.B.LCK = 1;
163 wdt_con0.B.REL = reload;
164 wdt->CON0.U = wdt_con0.U;
165
166 /* read back ENDINIT and wait until it has been set */
167 while (wdt->CON0.B.ENDINIT == 0)
168 {}
169 }
170
171
172 void IfxScuWdt_clearCpuEndinit(uint16 password)
173 {
174 IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
175 }
176
177
178 void IfxScuWdt_clearSafetyEndinit(uint16 password)
179 {
180 IfxScuWdt_clearSafetyEndinitInline(password);
181 }
182
183
184 void IfxScuWdt_disableCpuWatchdog(uint16 password)
185 {
186 /* Select CPU Watchdog based on Core Id */
187 uint32 coreId = (uint32)IfxCpu_getCoreIndex();
188 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
189
190 IfxScuWdt_clearCpuEndinitInline(wdt, password);
191 wdt->CON1.B.DR = 1; //Set DR bit in Config_1 register
192 IfxScuWdt_setCpuEndinitInline(wdt, password);
193 }
194
195
196 void IfxScuWdt_disableSafetyWatchdog(uint16 password)
197 {
198 IfxScuWdt_clearSafetyEndinitInline(password);
199 SCU_WDTS_CON1.B.DR = 1; //Set DR bit in Config_1 register
200 IfxScuWdt_setSafetyEndinitInline(password);
201 }
202
203
204 void IfxScuWdt_enableCpuWatchdog(uint16 password)
205 {
206 /* Select CPU Watchdog based on Core Id */
207 uint32 coreId = (uint32)IfxCpu_getCoreIndex();
208 Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
209
210 IfxScuWdt_clearCpuEndinitInline(wdt, password);
211 wdt->CON1.B.DR = 0; //Clear DR bit in Config_1 register
212 IfxScuWdt_setCpuEndinitInline(wdt, password);
213 }
214
215
216 void IfxScuWdt_enableSafetyWatchdog(uint16 password)
217 {
218 IfxScuWdt_clearSafetyEndinitInline(password);
219 SCU_WDTS_CON1.B.DR = 0; //Clear DR bit in Config_1 register
220 IfxScuWdt_setSafetyEndinitInline(password);
221 }
222
223
224 uint16 IfxScuWdt_getCpuWatchdogPassword(void)
225 {
226 return IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
227 }
228
229
230 boolean IfxScuWdt_getCpuWatchdogEndInit(void)
231 {
232 return (boolean)IfxScuWdt_getCpuWatchdogEndInitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
233 }
234
235
236 uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
237 {
238 return IfxScuWdt_getSafetyWatchdogPasswordInline();
239 }
240
241
242 void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
243 {
244 config->password = IFXSCUWDT_RESET_PASSWORD;
245 config->reload = 0xFFFC;
246 config->inputFrequency = IfxScu_WDTCON1_IR_divBy16384;
247 config->disableWatchdog = FALSE;
248 config->enableSmuRestriction = FALSE;
249 config->enableAutomaticPasswordChange = FALSE;
250 config->enableTimerCheck = FALSE;
251 config->enableTimerCheckTolerance = FALSE;
252 config->clrInternalResetFlag = FALSE;
253 }
254
255
256 void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
257 {
258 Ifx_SCU_WDTCPU_CON0 wdt_con0;
259 Ifx_SCU_WDTCPU_CON1 wdt_con1;
260
261 /* Read Config_0 register and clear wdt_con1 variable */
262 wdt_con0.U = wdt->CON0.U;
263 wdt_con1.U = 0;
264
265 if (wdt_con0.B.LCK)
266 {
267 /* see Table 1 (Password Access Bit Pattern Requirements) */
268 wdt_con0.B.ENDINIT = 1;
269 wdt_con0.B.LCK = 0;
270 wdt_con0.B.PW ^= 0x003F;
271
272 /* Password ready. Store it to WDT_CON0 to unprotect the register */
273 wdt->CON0.U = wdt_con0.U;
274 }
275
276 /* Initialize CON0 register, with modify access, with user defined parameters
277 * Clear ENDINT bit to unprotect CON1 register for initialization
278 * see Table 3 (Modify Access Bit Pattern Requirements) */
279 wdt_con0.B.ENDINIT = 0;
280 wdt_con0.B.LCK = 1;
281 wdt_con0.B.PW = config->password; //user defined password
282 wdt_con0.B.REL = config->reload; //user defined reload value
283
284 /* Modify access ready - write WDT_CON0 register */
285 wdt->CON0.U = wdt_con0.U;
286
287 /* read back ENDINIT and wait until it has been cleared */
288 while (wdt->CON0.B.ENDINIT == 1)
289 {}
290
291 /* Initialize CON1 register */
292 switch (config->inputFrequency)
293 {
294 case IfxScu_WDTCON1_IR_divBy16384:
295 wdt_con1.B.IR0 = 0;
296 wdt_con1.B.IR1 = 0;
297 break;
298 case IfxScu_WDTCON1_IR_divBy256:
299 wdt_con1.B.IR0 = 1;
300 wdt_con1.B.IR1 = 0;
301 break;
302 case IfxScu_WDTCON1_IR_divBy64:
303 wdt_con1.B.IR0 = 0;
304 wdt_con1.B.IR1 = 1;
305 break;
306 }
307
308 wdt_con1.B.DR = config->disableWatchdog ? 1 : 0;
309 wdt_con1.B.UR = config->enableSmuRestriction ? 1 : 0;
310 wdt_con1.B.PAR = config->enableAutomaticPasswordChange ? 1 : 0;
311 wdt_con1.B.TCR = config->enableTimerCheck ? 1 : 0;
312 wdt_con1.B.TCTR = config->enableTimerCheckTolerance ? 1 : 0;
313
314 /* Finally write CON1 with user defined configuration */
315 wdt->CON1.U = wdt_con1.U;
316
317 /* Initialization finished - set CPU ENDINIT protection */
318 IfxScuWdt_setCpuEndinit(config->password);
319 }
320
321
322 void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
323 {
324 Ifx_SCU_WDTS_CON0 wdt_con0;
325 Ifx_SCU_WDTS_CON1 wdt_con1;
326
327 /* Read Config_0 register and clear wdt_con1 variable */
328 wdt_con0.U = wdt->CON0.U;
329 wdt_con1.U = 0;
330
331 if (wdt_con0.B.LCK)
332 {
333 /* see Table 1 (Password Access Bit Pattern Requirements) */
334 wdt_con0.B.ENDINIT = 1;
335 wdt_con0.B.LCK = 0;
336 wdt_con0.B.PW ^= 0x003F;
337
338 /* Password ready. Store it to WDT_CON0 to unprotect the register */
339 wdt->CON0.U = wdt_con0.U;
340 }
341
342 /* Initialize CON0 register, with modify access, with user defined parameters
343 * Clear ENDINT bit to unprotect CON1 register for initialization
344 * see Table 3 (Modify Access Bit Pattern Requirements) */
345 wdt_con0.B.ENDINIT = 0;
346 wdt_con0.B.LCK = 1;
347 wdt_con0.B.PW = config->password; //user defined password
348 wdt_con0.B.REL = config->reload; //user defined reload value
349
350 /* Modify access ready - write WDT_CON0 register */
351 wdt->CON0.U = wdt_con0.U;
352
353 /* read back ENDINIT and wait until it has been cleared */
354 while (wdt->CON0.B.ENDINIT == 1)
355 {}
356
357 /* Initialize CON1 register */
358 switch (config->inputFrequency)
359 {
360 case IfxScu_WDTCON1_IR_divBy16384:
361 wdt_con1.B.IR0 = 0;
362 wdt_con1.B.IR1 = 0;
363 break;
364 case IfxScu_WDTCON1_IR_divBy256:
365 wdt_con1.B.IR0 = 1;
366 wdt_con1.B.IR1 = 0;
367 break;
368 case IfxScu_WDTCON1_IR_divBy64:
369 wdt_con1.B.IR0 = 0;
370 wdt_con1.B.IR1 = 1;
371 break;
372 }
373
374 wdt_con1.B.DR = config->disableWatchdog ? 1 : 0;
375 wdt_con1.B.UR = config->enableSmuRestriction ? 1 : 0;
376 wdt_con1.B.PAR = config->enableAutomaticPasswordChange ? 1 : 0;
377 wdt_con1.B.TCR = config->enableTimerCheck ? 1 : 0;
378 wdt_con1.B.TCTR = config->enableTimerCheckTolerance ? 1 : 0;
379 wdt_con1.B.CLRIRF = config->clrInternalResetFlag ? 0 : 1;
380
381 /* Finally write CON1 with user defined configuration */
382 wdt->CON1.U = wdt_con1.U;
383
384 /* Initialization finished - set Safety ENDINIT protection */
385 IfxScuWdt_setSafetyEndinit(config->password);
386 }
387
388
389 void IfxScuWdt_serviceCpuWatchdog(uint16 password)
390 {
391 IfxScuWdt_setCpuEndinit(password);
392 }
393
394
395 void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
396 {
397 IfxScuWdt_setSafetyEndinit(password);
398 }
399
400
401 void IfxScuWdt_setCpuEndinit(uint16 password)
402 {
403 IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
404 }
405
406
407 void IfxScuWdt_setSafetyEndinit(uint16 password)
408 {
409 IfxScuWdt_setSafetyEndinitInline(password);
410 }
411
412
413 boolean IfxScuWdt_enableWatchdogWithDebugger(void)
414 {
415 boolean status = 0, oenEnabled = 0, watchdogEnabled = 0;
416 uint32 ostateValue;
417
418 volatile uint32 *oecPtr = (volatile uint32 *)0xF0000478;
419 volatile uint32 *ostatePtr = (volatile uint32 *)0xF0000480;
420 volatile uint32 *ocntrlPtr = (volatile uint32 *)0xF000047C;
421
422 /* read OSTATE.OEN */
423 ostateValue = *ostatePtr;
424 oenEnabled = (ostateValue & 0x00000001);
425
426 if (!oenEnabled)
427 {
428 /* enable the debug interface (OSTATE.OEN )if it is not already enabled */
429 /* pattern for enabling OSTATE.OEN */
430 *oecPtr = 0xA1;
431 *oecPtr = 0x5E;
432 *oecPtr = 0xA1;
433 *oecPtr = 0x5E;
434
435 /* read OSTATE.OEN again*/
436 ostateValue = *ostatePtr;
437 oenEnabled = (ostateValue & 0x00000001);
438 }
439
440 if (oenEnabled)
441 {
442 /* set watchdog suspend bit in OSTATE reg, by writing OCNTRL.WDTSUS and OCNTRL.WDTSUS_P together */
443 *ocntrlPtr = 0x00003000;
444 }
445 else
446 {
447 status = 1;
448 }
449
450 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, oenEnabled == 1);
451
452 /* read OSTATE.WDTSUS */
453 ostateValue = *ostatePtr;
454 watchdogEnabled = (ostateValue & 0x00000080);
455
456 if (!watchdogEnabled)
457 {
458 status = 1;
459 }
460
461 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, watchdogEnabled == 1);
462
463 return status;
464 }
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:527
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:489
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:440
IfxScuWdt_Config::clrInternalResetFlag
boolean clrInternalResetFlag
Clear Internal Reset Flag.
Definition: IfxScuWdt.h:79
IfxScuWdt_enableWatchdogWithDebugger
boolean IfxScuWdt_enableWatchdogWithDebugger(void)
Enables the watchdog functionality with debugger connected, debug interface will also be enabled...
Definition: IfxScuWdt.c:413
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:417
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:463
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxScuWdt_initCpuWatchdog
void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module...
Definition: IfxScuWdt.c:256
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxScuWdt_disableSafetyWatchdog
void IfxScuWdt_disableSafetyWatchdog(uint16 password)
SCUWDT API to disable Safety Watchdog functionality.
Definition: IfxScuWdt.c:196
IfxScu_WDTCON1_IR_divBy256
Definition: IfxScu_cfg.h:1385
IfxScuWdt_enableSafetyWatchdog
void IfxScuWdt_enableSafetyWatchdog(uint16 password)
SCUWDT API to enable Safety Watchdog functionality.
Definition: IfxScuWdt.c:216
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxScuWdt.h
SCU basic functionality.
IfxScuWdt_serviceCpuWatchdog
void IfxScuWdt_serviceCpuWatchdog(uint16 password)
SCUWDT API to service CPU Watchdog functionality.
Definition: IfxScuWdt.c:389
IfxScuWdt_serviceSafetyWatchdog
void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
SCUWDT API to service Safety Watchdog functionality.
Definition: IfxScuWdt.c:395
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxScuWdt_initSafetyWatchdog
void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module...
Definition: IfxScuWdt.c:322
IfxScuWdt_enableCpuWatchdog
void IfxScuWdt_enableCpuWatchdog(uint16 password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: IfxScuWdt.c:204
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IFXSCUWDT_RESET_PASSWORD
#define IFXSCUWDT_RESET_PASSWORD
Reset password of watchdog module.
Definition: IfxScuWdt.c:39
IfxScuWdt_Config::inputFrequency
IfxScu_WDTCON1_IR inputFrequency
input frequency of the WDT
Definition: IfxScuWdt.h:73
IfxScuWdt_getCpuWatchdogEndInit
boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:230
IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structu...
Definition: IfxScuWdt.h:69
IfxScuWdt_Config::password
uint16 password
password for access to WDTxCON0 reg
Definition: IfxScuWdt.h:71
IfxScuWdt_Config::enableSmuRestriction
boolean enableSmuRestriction
Unlock Restriction Request Control Bit.
Definition: IfxScuWdt.h:75
IfxScuWdt_Config::enableTimerCheckTolerance
boolean enableTimerCheckTolerance
Timer Check Tolerance Request.
Definition: IfxScuWdt.h:78
IfxScuWdt_changeCpuWatchdogReload
void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value.
Definition: IfxScuWdt.c:76
IfxScuWdt_disableCpuWatchdog
void IfxScuWdt_disableCpuWatchdog(uint16 password)
SCUWDT API to disable CPU Watchdog functionality.
Definition: IfxScuWdt.c:184
IfxScuWdt_getCpuWatchdogEndInitInline
IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.h:477
IfxScuWdt_Config::enableAutomaticPasswordChange
boolean enableAutomaticPasswordChange
Password Auto-sequence Request Bit.
Definition: IfxScuWdt.h:76
IfxScu_WDTCON1_IR_divBy64
Definition: IfxScu_cfg.h:1386
IfxCpu.h
CPU basic functionality.
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:504
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxScuWdt_initConfig
void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt con...
Definition: IfxScuWdt.c:242
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxScuWdt_changeCpuWatchdogPassword
void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password.
Definition: IfxScuWdt.c:45
IfxScuWdt_Config::enableTimerCheck
boolean enableTimerCheck
Counter Check Request Bit.
Definition: IfxScuWdt.h:77
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxScuWdt_Config::reload
uint16 reload
WDT reload value.
Definition: IfxScuWdt.h:72
IfxCpu_getCoreIndex
IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
API to get cpu index of the caller CPU. Note: This api can be used whereever cpu no/index is needed...
Definition: IfxCpu.h:761
IfxScu_WDTCON1_IR_divBy16384
Definition: IfxScu_cfg.h:1384
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxScuWdt_Config::disableWatchdog
boolean disableWatchdog
Disable Request Control Bit.
Definition: IfxScuWdt.h:74
IfxScuWdt_changeSafetyWatchdogPassword
void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password.
Definition: IfxScuWdt.c:109
IfxScuWdt_changeSafetyWatchdogReload
void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value.
Definition: IfxScuWdt.c:140


iLLD_TC26B: IfxScuWdt.h Source File

  • Scu
  • Std
IfxScuWdt.h
Go to the documentation of this file.
1 /**
2 * \file IfxScuWdt.h
3 * \brief SCU basic functionality
4 * \ingroup IfxLld_Scu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * This file contains the APIs for SCU Watchdog and Endinit related functions.
26 *
27 * \defgroup IfxLld_Scu_Std_Wdt Wdt Basic Functionality
28 * \ingroup IfxLld_Scu_Std
29 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Configuration Watchdog Configuration functions
30 * \ingroup IfxLld_Scu_Std_Wdt
31 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Endinit Watchdog Endinit functions
32 * \ingroup IfxLld_Scu_Std_Wdt
33 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Operative Watchdog Operative functions
34 * \ingroup IfxLld_Scu_Std_Wdt
35 * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Endinit_Usage How to use Endinit APIs?
36 * \ingroup IfxLld_Scu_Std_Wdt
37 */
38
39 #ifndef IFXSCUWDT_H
40 #define IFXSCUWDT_H 1
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "_Impl/IfxScu_cfg.h"
47 #include "Cpu/Std/Ifx_Types.h"
48 #include "IfxScu_reg.h"
49 #include "IfxScu_bf.h"
50 #include "IfxScuWdt.asm.h"
51 #include "Cpu/Std/IfxCpu_Intrinsics.h"
52
53 /******************************************************************************/
54 /*-----------------------------------Macros-----------------------------------*/
55 /******************************************************************************/
56
57 /** \brief Endinit operation Timeout counter
58 */
59 #define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)
60
61 /******************************************************************************/
62 /*-----------------------------Data Structures--------------------------------*/
63 /******************************************************************************/
64
65 /** \brief Configuration structure for Scu Watchdog.
66 * IfxScuWdt_Config is a type describing configuration structure of CPU and
67 * Safety WDT registers defined in IfxScuWdt.h file.
68 */
69 typedef struct
70 {
71 uint16 password; /**< \brief password for access to WDTxCON0 reg */
72 uint16 reload; /**< \brief WDT reload value */
73 IfxScu_WDTCON1_IR inputFrequency; /**< \brief input frequency of the WDT */
74 boolean disableWatchdog; /**< \brief Disable Request Control Bit */
75 boolean enableSmuRestriction; /**< \brief Unlock Restriction Request Control Bit */
76 boolean enableAutomaticPasswordChange; /**< \brief Password Auto-sequence Request Bit */
77 boolean enableTimerCheck; /**< \brief Counter Check Request Bit */
78 boolean enableTimerCheckTolerance; /**< \brief Timer Check Tolerance Request */
79 boolean clrInternalResetFlag; /**< \brief Clear Internal Reset Flag */
80 } IfxScuWdt_Config;
81
82 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Configuration
83 * \{ */
84
85 /******************************************************************************/
86 /*-------------------------Global Function Prototypes-------------------------*/
87 /******************************************************************************/
88
89 /** \brief SCUWDT API to initialize WDT configuration structure - Constructor
90 * This API initialize the ScuWdt configuration structure to default values, these default
91 * values are for software specific, not necessarily hardware reset values.
92 * User must use this API call before IfxScuWdt_Init API call
93 * \param config ScuWdt configuration structure to be initialized
94 * \return None
95 */
96 IFX_EXTERN void IfxScuWdt_initConfig(IfxScuWdt_Config *config);
97
98 /** \brief SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module.
99 *
100 * This API initialize the ScuWdt software driver and corresponding CPU WDT hardware module.
101 * User can configure project specific Watchdog password, Watchdog timer period and other settings
102 * with this interface.
103 * API corresponds to one instance of the hardware module.
104 * User must use this API call for each instance of the WDT hardware module used.
105 * \param wdt reference to register map of CPU WDT hardware instance
106 * \param config ScuWdt configuration structure
107 * \return None
108 */
109 IFX_EXTERN void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config);
110
111 /** \brief SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module.
112 *
113 * This API initialize the ScuWdt software driver and corresponding safety WDT hardware module.
114 * User can configure project specific Watchdog password, Watchdog timer period and other settings
115 * with this interface.
116 * API corresponds to one instance of the hardware module.
117 * User must use this API call for each instance of the WDT hardware module used.
118 * \param wdt reference to register map of Safety WDT hardware instance
119 * \param config ScuWdt configuration structure
120 * \return None
121 */
122 IFX_EXTERN void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config);
123
124 /** \} */
125
126 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Endinit
127 * \{ */
128
129 /******************************************************************************/
130 /*-------------------------Inline Function Prototypes-------------------------*/
131 /******************************************************************************/
132
133 /** \brief SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
134 *
135 * This Inline API will disable ENDINIT functionality provided by CPU WDT Hardware module.
136 * This API is only meant to be used with startup routines where function call is not possible.
137 * User need to use this API call before modifying any ENDINIT protected register. User must
138 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
139 * ENDINIT shall not be interrupted by another interrupt/call.
140 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
141 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
142 * \param password Existing (Application specific) password for the Watchdog module.
143 * \return None
144 */
145 IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password);
146
147 /** \brief SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
148 *
149 * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
150 * This API is only meant to be used with startup routines where function call is not possible.
151 * User need to use this API call before modifying any ENDINIT protected register. User must
152 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
153 * ENDINIT shall not be interrupted by another interrupt/call.
154 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
155 * \param password Existing (Application specific) password for the Watchdog module.
156 * \return None
157 */
158 IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password);
159
160 /** \brief SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
161 *
162 * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
163 * This API is only meant to be used with startup routines where function call is not possible.
164 * User need to use this API call after modifying any ENDINIT protected register.
165 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
166 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
167 * \param password Existing (Application specific) password for the Watchdog module.
168 * \return None
169 */
170 IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password);
171
172 /** \brief SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
173 *
174 * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
175 * This API is only meant to be used with startup routines where function call is not possible.
176 * User need to use this API call after modifying any ENDINIT protected register.
177 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
178 * \param password Existing (Application specific) password for the Watchdog module.
179 * \return None
180 */
181 IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password);
182
183 /******************************************************************************/
184 /*-------------------------Global Function Prototypes-------------------------*/
185 /******************************************************************************/
186
187 /** \brief SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
188 *
189 * This API will disable ENDINIT functionality provided by CPU WDT Hardware module.
190 * User need to use this API call before modifying any ENDINIT protected register. User must
191 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
192 * ENDINIT shall not be interrupted by another interrupt/call.
193 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)
194 * \param password Existing (Application specific) password for the Watchdog module.
195 * \return None
196 */
197 IFX_EXTERN void IfxScuWdt_clearCpuEndinit(uint16 password);
198
199 /** \brief SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
200 *
201 * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
202 * User need to use this API call before modifying any ENDINIT protected register. User must
203 * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
204 * ENDINIT shall not be interrupted by another interrupt/call.
205 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
206 * \param password Existing (Application specific) password for the Watchdog module.
207 * \return None
208 */
209 IFX_EXTERN void IfxScuWdt_clearSafetyEndinit(uint16 password);
210
211 /** \brief SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
212 *
213 * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
214 * User need to use this API call after modifying any ENDINIT protected register.
215 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)
216 * \param password Existing (Application specific) password for the Watchdog module.
217 * \return None
218 */
219 IFX_EXTERN void IfxScuWdt_setCpuEndinit(uint16 password);
220
221 /** \brief SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
222 *
223 * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
224 * User need to use this API call after modifying any ENDINIT protected register.
225 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
226 * \param password Existing (Application specific) password for the Watchdog module.
227 * \return None
228 */
229 IFX_EXTERN void IfxScuWdt_setSafetyEndinit(uint16 password);
230
231 /** \} */
232
233 /** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Operative
234 * \{ */
235
236 /******************************************************************************/
237 /*-------------------------Inline Function Prototypes-------------------------*/
238 /******************************************************************************/
239
240 /** \brief SCUWDT Inline API to fetch current password of CPU Watchdog module.
241 *
242 * This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed
243 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
244 * or store the password globally in a global variable at the application memory.
245 * This API is only meant to be used with startup routines where function call is not possible.
246 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
247 * \return password Existing (Application specific) password for the Watchdog module.
248 */
249 IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog);
250
251 /** \brief SCUWDT API to fetch current endinit of CPU Watchdog module.
252 * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
253 * \return Endinit status for the CPU Watchdog module.
254 */
255 IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog);
256
257 /** \brief SCUWDT API to fetch current endinit of Safety/System Watchdog module.
258 * \return Endinit status for the Safety Watchdog module.
259 */
260 IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void);
261
262 /** \brief SCUWDT Inline API to fetch current password of Safety Watchdog module.
263 *
264 * This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed
265 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
266 * or store the password globally in a global variable at the application memory.
267 * This API is only meant to be used with startup routines where function call is not possible.
268 * \return password Existing (Application specific) password for the Watchdog module.
269 */
270 IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void);
271
272 /******************************************************************************/
273 /*-------------------------Global Function Prototypes-------------------------*/
274 /******************************************************************************/
275
276 /** \brief SCUWDT API to change CPU Watchdog password.
277 *
278 * This API will change password to new one for the corresponding to CPU WDT Hardware module.
279 * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
280 * \param password Existing (Application specific) password for the Watchdog module.
281 * \param newPassword Application specific new password to be changed for the Watchdog module.
282 * \return None
283 */
284 IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword);
285
286 /** \brief SCUWDT API to change CPU Watchdog timer reload value.
287 *
288 * This API will change Watchdog timer reload value to new one for CPU WDT Hardware module.
289 * The Watchdog timers will be reloaded with this value after every serice of Watchdog.
290 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
291 * \param password Existing (Application specific) password for the Watchdog module.
292 * \param reload Reload value for the timer.
293 * \return None
294 */
295 IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload);
296
297 /** \brief SCUWDT API to change Safety Watchdog password.
298 *
299 * This API will change password to new one for the corresponding to Safety WDT Hardware module.
300 * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
301 * \param password Existing (Application specific) password for the Watchdog module.
302 * \param newPassword Application specific new password to be changed for the Watchdog module.
303 * \return None
304 */
305 IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword);
306
307 /** \brief SCUWDT API to change Safety Watchdog timer reload value.
308 *
309 * This API will change Watchdog timer reload value to new one for Safety WDT Hardware module.
310 * The Watchdog timers will be reloaded with this value after every serice of Watchdog.
311 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
312 * \param password Existing (Application specific) password for the Watchdog module.
313 * \param reload Reload value for the timer.
314 * \return None
315 */
316 IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload);
317
318 /** \brief SCUWDT API to disable CPU Watchdog functionality.
319 *
320 * This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting
321 * after this API call.
322 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
323 * \param password Existing (Application specific) password for the Watchdog module.
324 * \return None
325 */
326 IFX_EXTERN void IfxScuWdt_disableCpuWatchdog(uint16 password);
327
328 /** \brief SCUWDT API to disable Safety Watchdog functionality.
329 *
330 * This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting
331 * after this API call.
332 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
333 * \param password Existing (Application specific) password for the Watchdog module.
334 * \return None
335 */
336 IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog(uint16 password);
337
338 /** \brief SCUWDT API to enable CPU Watchdog functionality.
339 *
340 * This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced
341 * periodically after this API call.
342 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
343 * \param password Existing (Application specific) password for the Watchdog module.
344 * \return None
345 */
346 IFX_EXTERN void IfxScuWdt_enableCpuWatchdog(uint16 password);
347
348 /** \brief SCUWDT API to enable Safety Watchdog functionality.
349 *
350 * This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced
351 * periodically after this API call.
352 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
353 * \param password Existing (Application specific) password for the Watchdog module.
354 * \return None
355 */
356 IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog(uint16 password);
357
358 /** \brief SCUWDT API to fetch current password of CPU Watchdog module.
359 *
360 * This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed
361 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
362 * or store the password globally in a global variable at the application memory.
363 * \return password Existing (Application specific) password for the Watchdog module.
364 */
365 IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword(void);
366
367 /** \brief SCUWDT API to fetch current endinit of CPU Watchdog module.
368 * \return Endinit status for the CPU Watchdog module.
369 */
370 IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit(void);
371
372 /** \brief SCUWDT API to fetch current password of Safety Watchdog module.
373 *
374 * This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed
375 * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
376 * or store the password globally in a global variable at the application memory.
377 * \return password Existing (Application specific) password for the Watchdog module.
378 */
379 IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword(void);
380
381 /** \brief SCUWDT API to service CPU Watchdog functionality.
382 *
383 * This API will service Watchdog functionality corresponding to CPU WDT Hardware module.
384 * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
385 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
386 * \param password Existing (Application specific) password for the Watchdog module.
387 * \return None
388 */
389 IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog(uint16 password);
390
391 /** \brief SCUWDT API to service Safety Watchdog functionality.
392 *
393 * This API will service Watchdog functionality corresponding to Safety WDT Hardware module.
394 * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
395 * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
396 * \param password Existing (Application specific) password for the Watchdog module.
397 * \return None
398 */
399 IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog(uint16 password);
400
401 /** \} */
402
403 /******************************************************************************/
404 /*-------------------------Global Function Prototypes-------------------------*/
405 /******************************************************************************/
406
407 /** \brief Enables the watchdog functionality with debugger connected,\n
408 * debug interface will also be enabled, if not enabled already.
409 * \return Status, Success = 0, Failure = 1.
410 */
411 IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger(void);
412
413 /******************************************************************************/
414 /*---------------------Inline Function Implementations------------------------*/
415 /******************************************************************************/
416
417 IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
418 {
419 if (watchdog->CON0.B.LCK)
420 {
421 /* see Table 1 (Password Access Bit Pattern Requirements) */
422 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
423 (0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
424 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
425 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
426 }
427
428 /* Clear ENDINT and set LCK bit in Config_0 register */
429 watchdog->CON0.U = (0 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
430 (1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
431 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
432 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
433
434 /* read back ENDINIT and wait until it has been cleared */
435 while (watchdog->CON0.B.ENDINIT == 1)
436 {}
437 }
438
439
440 IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
441 {
442 if (SCU_WDTS_CON0.B.LCK)
443 {
444 /* see Table 1 (Password Access Bit Pattern Requirements) */
445 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
446 (0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
447 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
448 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
449 }
450
451 /* Clear ENDINT and set LCK bit in Config_0 register */
452 SCU_WDTS_CON0.U = (0 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
453 (1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
454 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
455 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
456
457 /* read back ENDINIT and wait until it has been cleared */
458 while (SCU_WDTS_CON0.B.ENDINIT == 1)
459 {}
460 }
461
462
463 IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
464 {
465 uint16 password;
466
467 /* Read Password from CON0 register
468 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
469 * to toggle them before returning password */
470 password = watchdog->CON0.B.PW;
471 password ^= 0x003F;
472
473 return password;
474 }
475
476
477 IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
478 {
479 return (boolean)watchdog->CON0.B.ENDINIT;
480 }
481
482
483 IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
484 {
485 return (boolean)MODULE_SCU.WDTS.CON0.B.ENDINIT;
486 }
487
488
489 IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
490 {
491 uint16 password;
492 Ifx_SCU_WDTS *watchdog = &MODULE_SCU.WDTS;
493
494 /* Read Password from Safety WDT CON0 register
495 * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
496 * to toggle them before returning password */
497 password = watchdog->CON0.B.PW;
498 password ^= 0x003F;
499
500 return password;
501 }
502
503
504 IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
505 {
506 if (watchdog->CON0.B.LCK)
507 {
508 /* see Table 1 (Pass.word Access Bit Pattern Requirements) */
509 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
510 (0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
511 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
512 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
513 }
514
515 /* Set ENDINT and set LCK bit in Config_0 register */
516 watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
517 (1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
518 (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
519 (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
520
521 /* read back ENDINIT and wait until it has been set */
522 while (watchdog->CON0.B.ENDINIT == 0)
523 {}
524 }
525
526
527 IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
528 {
529 if (SCU_WDTS_CON0.B.LCK)
530 {
531 /* see Table 1 (Password Access Bit Pattern Requirements) */
532 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
533 (0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
534 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
535 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
536 }
537
538 /* Set ENDINT and set LCK bit in Config_0 register */
539 SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
540 (1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
541 (password << IFX_SCU_WDTS_CON0_PW_OFF) |
542 (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
543
544 /* read back ENDINIT and wait until it has been cleared */
545 while (SCU_WDTS_CON0.B.ENDINIT == 0)
546 {}
547 }
548
549
550 #endif /* IFXSCUWDT_H */
IfxScuWdt_setSafetyEndinitInline
IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:527
IfxScuWdt_getSafetyWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
SCUWDT Inline API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.h:489
IfxScuWdt_clearSafetyEndinitInline
IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.h:440
IfxScuWdt_Config::clrInternalResetFlag
boolean clrInternalResetFlag
Clear Internal Reset Flag.
Definition: IfxScuWdt.h:79
IfxScuWdt.asm.h
SCU basic functionality.
IfxScuWdt_clearCpuEndinitInline
IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:417
IfxScuWdt_getCpuWatchdogPasswordInline
IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT Inline API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.h:463
IfxScuWdt_initCpuWatchdog
IFX_EXTERN void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module...
Definition: IfxScuWdt.c:256
IfxScuWdt_clearCpuEndinit
IFX_EXTERN void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxScuWdt_disableSafetyWatchdog
IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog(uint16 password)
SCUWDT API to disable Safety Watchdog functionality.
Definition: IfxScuWdt.c:196
IfxCpu_Intrinsics.h
IfxScu_WDTCON1_IR
IfxScu_WDTCON1_IR
Definition: IfxScu_cfg.h:1382
IfxScuWdt_enableSafetyWatchdog
IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog(uint16 password)
SCUWDT API to enable Safety Watchdog functionality.
Definition: IfxScuWdt.c:216
IfxScuWdt_serviceCpuWatchdog
IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog(uint16 password)
SCUWDT API to service CPU Watchdog functionality.
Definition: IfxScuWdt.c:389
IfxScuWdt_serviceSafetyWatchdog
IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
SCUWDT API to service Safety Watchdog functionality.
Definition: IfxScuWdt.c:395
IfxScuWdt_clearSafetyEndinit
IFX_EXTERN void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxScuWdt_initSafetyWatchdog
IFX_EXTERN void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module...
Definition: IfxScuWdt.c:322
IfxScuWdt_enableCpuWatchdog
IFX_EXTERN void IfxScuWdt_enableCpuWatchdog(uint16 password)
SCUWDT API to enable CPU Watchdog functionality.
Definition: IfxScuWdt.c:204
IfxScuWdt_getCpuWatchdogPassword
IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxScuWdt_Config::inputFrequency
IfxScu_WDTCON1_IR inputFrequency
input frequency of the WDT
Definition: IfxScuWdt.h:73
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxScuWdt_getCpuWatchdogEndInit
IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit(void)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.c:230
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxScuWdt_Config
Configuration structure for Scu Watchdog. IfxScuWdt_Config is a type describing configuration structu...
Definition: IfxScuWdt.h:69
IfxScu_cfg.h
SCU on-chip implementation data.
IfxScuWdt_Config::password
uint16 password
password for access to WDTxCON0 reg
Definition: IfxScuWdt.h:71
IfxScuWdt_Config::enableSmuRestriction
boolean enableSmuRestriction
Unlock Restriction Request Control Bit.
Definition: IfxScuWdt.h:75
IfxScuWdt_Config::enableTimerCheckTolerance
boolean enableTimerCheckTolerance
Timer Check Tolerance Request.
Definition: IfxScuWdt.h:78
IfxScuWdt_changeCpuWatchdogReload
IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change CPU Watchdog timer reload value.
Definition: IfxScuWdt.c:76
IfxScuWdt_disableCpuWatchdog
IFX_EXTERN void IfxScuWdt_disableCpuWatchdog(uint16 password)
SCUWDT API to disable CPU Watchdog functionality.
Definition: IfxScuWdt.c:184
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxScuWdt_getCpuWatchdogEndInitInline
IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
SCUWDT API to fetch current endinit of CPU Watchdog module.
Definition: IfxScuWdt.h:477
IfxScuWdt_Config::enableAutomaticPasswordChange
boolean enableAutomaticPasswordChange
Password Auto-sequence Request Bit.
Definition: IfxScuWdt.h:76
IfxScuWdt_setCpuEndinitInline
IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.h:504
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxScuWdt_initConfig
IFX_EXTERN void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
SCUWDT API to initialize WDT configuration structure - Constructor This API initialize the ScuWdt con...
Definition: IfxScuWdt.c:242
IfxScuWdt_setSafetyEndinit
IFX_EXTERN void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxScuWdt_getSafetyWatchdogPassword
IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxScuWdt_changeCpuWatchdogPassword
IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change CPU Watchdog password.
Definition: IfxScuWdt.c:45
IfxScuWdt_Config::enableTimerCheck
boolean enableTimerCheck
Counter Check Request Bit.
Definition: IfxScuWdt.h:77
IfxScuWdt_Config::reload
uint16 reload
WDT reload value.
Definition: IfxScuWdt.h:72
IfxScuWdt_setCpuEndinit
IFX_EXTERN void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxScuWdt_enableWatchdogWithDebugger
IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger(void)
Enables the watchdog functionality with debugger connected, debug interface will also be enabled...
Definition: IfxScuWdt.c:413
IfxScuWdt_Config::disableWatchdog
boolean disableWatchdog
Disable Request Control Bit.
Definition: IfxScuWdt.h:74
IfxScuWdt_changeSafetyWatchdogPassword
IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
SCUWDT API to change Safety Watchdog password.
Definition: IfxScuWdt.c:109
IfxScuWdt_changeSafetyWatchdogReload
IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
SCUWDT API to change Safety Watchdog timer reload value.
Definition: IfxScuWdt.c:140
IfxScuWdt_getSafetyWatchdogEndInit
IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
SCUWDT API to fetch current endinit of Safety/System Watchdog module.
Definition: IfxScuWdt.h:483


iLLD_TC26B: IfxSent.c Source File

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  • Std
IfxSent.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent.c
3 * \brief SENT basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxSent.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
37 {
38 float32 fFracDiv = IfxSent_getModuleClock(sent);
39 float32 fPdiv = fFracDiv / (float32)(sent->CH[channelId].CPDR.B.PDIV + 1);
40
41 uint32 div = sent->CH[channelId].CFDR.B.DIV;
42
43 if (div > 0)
44 {
45 float32 fTick = (fPdiv * 56) / div;
46 return 1 / fTick;
47 }
48 else
49 {
50 return 0.0;
51 }
52 }
53
54
55 float32 IfxSent_getModuleClock(Ifx_SENT *sent)
56 {
57 float32 fsys = IfxScuCcu_getSpbFrequency();
58
59 uint32 rmc = sent->CLC.B.RMC;
60
61 if (rmc < 1)
62 {
63 rmc = 1;
64 }
65
66 float32 fclc = fsys / rmc;
67
68 Ifx_SENT_FDR fdr;
69 fdr.U = sent->FDR.U;
70
71 float32 kernelFreq = 0.0;
72
73 if (fdr.B.DM == 1)
74 {
75 kernelFreq = fclc / (1024 - fdr.B.STEP);
76 }
77 else if (fdr.B.DM == 2)
78 {
79 kernelFreq = (fclc * fdr.B.STEP) / 1024;
80 }
81
82 return kernelFreq;
83 }
84
85
86 void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
87 {
88 float32 fFracDiv = IfxSent_getModuleClock(sent);
89
90 /* const uint32 divMin = 560; */
91 const uint32 divMax = 3276;
92
93 uint32 pDiv;
94 uint32 fDiv;
95
96 float32 tResult;
97 tResult = fFracDiv * 56 * tUnit;
98 pDiv = tResult / divMax;
99 fDiv = tResult / pDiv;
100
101 if (fDiv > divMax)
102 {
103 pDiv = pDiv + 1;
104 fDiv = tResult / pDiv;
105 }
106
107 if ((pDiv > 1024) || (pDiv < 1))
108 {
109 pDiv = 1025;
110 fDiv = tResult / 1024;
111 }
112
113 IfxSent_setChannelPreDivider(sent, channelId, (uint16)pDiv - 1);
114 IfxSent_setChannelFractionalDivider(sent, channelId, (uint16)fDiv);
115 }
116
117
118 void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
119 {
120 Ifx_SENT_FDR tempFDR;
121 tempFDR.U = 0;
122 tempFDR.B.STEP = stepValue;
123 tempFDR.B.DM = dividerMode;
124 sent->FDR.U = tempFDR.U;
125 }
126
127
128 void IfxSent_resetModule(Ifx_SENT *sent)
129 {
130 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
131
132 IfxScuWdt_clearCpuEndinit(passwd);
133 sent->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
134 sent->KRST0.B.RST = 1;
135 IfxScuWdt_setCpuEndinit(passwd);
136
137 while (0 == sent->KRST0.B.RSTSTAT) /* Wait until reset is executed */
138
139 {}
140
141 IfxScuWdt_clearCpuEndinit(passwd);
142 sent->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
143 IfxScuWdt_setCpuEndinit(passwd);
144 }
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxSent_resetModule
void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:128
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxSent_getChannelUnitTime
float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel.
Definition: IfxSent.c:36
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxSent_setChannelFractionalDivider
IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider.
Definition: IfxSent.h:653
IfxSent_setChannelPreDivider
IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider.
Definition: IfxSent.h:659
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxSent.h
SENT basic functionality.
IfxSent_ClockDividerMode
IfxSent_ClockDividerMode
SENT.FDR.DM , Specifies clock divider mode.
Definition: IfxSent.h:88
IfxSent_initializeChannelUnitTime
void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:86
IfxSent_initializeModuleClock
void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:118
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:66
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxSent_getModuleClock
float32 IfxSent_getModuleClock(Ifx_SENT *sent)
Returns the current module frequency in Hertz.
Definition: IfxSent.c:55


iLLD_TC26B: IfxSent.h Source File

  • Sent
  • Std
IfxSent.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent.h
3 * \brief SENT basic functionality
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Sent_Std_Enumerations Enumerations
26 * \ingroup IfxLld_Sent_Std
27 * \defgroup IfxLld_Sent_Std_Configuration Configuration Functions
28 * \ingroup IfxLld_Sent_Std
29 * \defgroup IfxLld_Sent_Std_Interrupts Interrupts
30 * \ingroup IfxLld_Sent_Std
31 * \defgroup IfxLld_Sent_Std_Operative Operative Functions
32 * \ingroup IfxLld_Sent_Std
33 * \defgroup IfxLld_Sent_Std_Baudrate Baudrate Configuration
34 * \ingroup IfxLld_Sent_Std
35 * \defgroup IfxLld_Sent_Std_IO IO Pin Configuration Functions
36 * \ingroup IfxLld_Sent_Std
37 */
38
39 #ifndef IFXSENT_H
40 #define IFXSENT_H 1
41
42 /******************************************************************************/
43 /*----------------------------------Includes----------------------------------*/
44 /******************************************************************************/
45
46 #include "_Impl/IfxSent_cfg.h"
47 #include "Src/Std/IfxSrc.h"
48 #include "Scu/Std/IfxScuCcu.h"
49 #include "_PinMap/IfxSent_PinMap.h"
50 #include "Cpu/Std/IfxCpu_Intrinsics.h"
51 #include "IfxSent_bf.h"
52 #include "IfxSent_reg.h"
53
54 /******************************************************************************/
55 /*-----------------------------------Macros-----------------------------------*/
56 /******************************************************************************/
57
58 #define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)
59
60 /******************************************************************************/
61 /*--------------------------------Enumerations--------------------------------*/
62 /******************************************************************************/
63
64 /** \addtogroup IfxLld_Sent_Std_Enumerations
65 * \{ */
66 /** \brief SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel
67 */
68 typedef enum
69 {
70 IfxSent_AlternateInput_0 = 0, /**< \brief Specifies alternate input 0 */
71 IfxSent_AlternateInput_1, /**< \brief Specifies alternate input 1 */
72 IfxSent_AlternateInput_2, /**< \brief Specifies alternate input 2 */
73 IfxSent_AlternateInput_3 /**< \brief Specifies alternate input 3 */
74 } IfxSent_AlternateInput;
75
76 /** \brief SENT.CH[channelId].RSR.CST, Specifies the current channel status
77 */
78 typedef enum
79 {
80 IfxSent_ChannelStatus_stop = 0, /**< \brief Specifies the channel is stopped */
81 IfxSent_ChannelStatus_initialize = 1, /**< \brief Specifies the channel is initialized */
82 IfxSent_ChannelStatus_running = 2, /**< \brief Specifies the channel is running */
83 IfxSent_ChannelStatus_synchronize = 3 /**< \brief Specifies the channel is synchronized */
84 } IfxSent_ChannelStatus;
85
86 /** \brief SENT.FDR.DM , Specifies clock divider mode
87 */
88 typedef enum
89 {
90 IfxSent_ClockDividerMode_off = 0, /**< \brief Specifies clock divider mode off */
91 IfxSent_ClockDividerMode_normal = 1, /**< \brief Specifies clock normal divider mode */
92 IfxSent_ClockDividerMode_fractional = 2 /**< \brief Specifies clock fractional divider mode */
93 } IfxSent_ClockDividerMode;
94
95 /** \brief SENT.CH[channelId].SDS.CON , Specifies received configuration bit value
96 */
97 typedef enum
98 {
99 IfxSent_ConfigBit_0 = 0, /**< \brief Specifies received configuration bit value 0 */
100 IfxSent_ConfigBit_1 /**< \brief Specifies received configuration bit value 1 */
101 } IfxSent_ConfigBit;
102
103 /** \brief SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples
104 */
105 typedef enum
106 {
107 IfxSent_DigitalGlitchesLength_off = 0, /**< \brief Specifies port input samples off */
108 IfxSent_DigitalGlitchesLength_1 = 1, /**< \brief Specifies 1 port input samples */
109 IfxSent_DigitalGlitchesLength_2, /**< \brief Specifies 2 port input samples */
110 IfxSent_DigitalGlitchesLength_3, /**< \brief Specifies 3 port input samples */
111 IfxSent_DigitalGlitchesLength_4, /**< \brief Specifies 4 port input samples */
112 IfxSent_DigitalGlitchesLength_5, /**< \brief Specifies 5 port input samples */
113 IfxSent_DigitalGlitchesLength_6, /**< \brief Specifies 6 port input samples */
114 IfxSent_DigitalGlitchesLength_7, /**< \brief Specifies 7 port input samples */
115 IfxSent_DigitalGlitchesLength_8, /**< \brief Specifies 8 port input samples */
116 IfxSent_DigitalGlitchesLength_9, /**< \brief Specifies 9 port input samples */
117 IfxSent_DigitalGlitchesLength_10, /**< \brief Specifies 10 port input samples */
118 IfxSent_DigitalGlitchesLength_11, /**< \brief Specifies 11 port input samples */
119 IfxSent_DigitalGlitchesLength_12, /**< \brief Specifies 12 port input samples */
120 IfxSent_DigitalGlitchesLength_13, /**< \brief Specifies 13 port input samples */
121 IfxSent_DigitalGlitchesLength_14, /**< \brief Specifies 14 port input samples */
122 IfxSent_DigitalGlitchesLength_15 /**< \brief Specifies 15 port input samples */
123 } IfxSent_DigitalGlitchesLength;
124
125 /** \brief SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure
126 */
127 typedef enum
128 {
129 IfxSent_ExtendedSerialFrameMode_standard = 0, /**< \brief Specifies the standard serial frame structure */
130 IfxSent_ExtendedSerialFrameMode_extended = 1 /**< \brief Specifies the extended serial frame structure */
131 } IfxSent_ExtendedSerialFrameMode;
132
133 /** \brief SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line
134 */
135 typedef enum
136 {
137 IfxSent_ExternalTrigger_0 = 0, /**< \brief Specifies the external trigger line 0 */
138 IfxSent_ExternalTrigger_1, /**< \brief Specifies the external trigger line 1 */
139 IfxSent_ExternalTrigger_2, /**< \brief Specifies the external trigger line 2 */
140 IfxSent_ExternalTrigger_3, /**< \brief Specifies the external trigger line 3 */
141 IfxSent_ExternalTrigger_4, /**< \brief Specifies the external trigger line 4 */
142 IfxSent_ExternalTrigger_5, /**< \brief Specifies the external trigger line 5 */
143 IfxSent_ExternalTrigger_6, /**< \brief Specifies the external trigger line 6 */
144 IfxSent_ExternalTrigger_7, /**< \brief Specifies the external trigger line 7 */
145 IfxSent_ExternalTrigger_8, /**< \brief Specifies the external trigger line 8 */
146 IfxSent_ExternalTrigger_9 /**< \brief Specifies the external trigger line 9 */
147 } IfxSent_ExternalTrigger;
148
149 /** \brief SENT.CH[channelId].RCR.CFC, Specifies received frame check mode
150 */
151 typedef enum
152 {
153 IfxSent_FrameCheckMode_pastSyncPulse = 0, /**< \brief Specifies frame check mode against past sync pulse */
154 IfxSent_FrameCheckMode_futureSuncPulse = 1 /**< \brief Specifies frame check mode against future sync pulse */
155 } IfxSent_FrameCheckMode;
156
157 /** \brief SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt
158 */
159 typedef enum
160 {
161 IfxSent_InterruptNodePointer_0 = 0, /**< \brief Specifies interrupt requested node 0 */
162 IfxSent_InterruptNodePointer_1, /**< \brief Specifies interrupt requested node 1 */
163 IfxSent_InterruptNodePointer_2, /**< \brief Specifies interrupt requested node 2 */
164 IfxSent_InterruptNodePointer_3, /**< \brief Specifies interrupt requested node 3 */
165 IfxSent_InterruptNodePointer_trigo0 = 4, /**< \brief Specifies interrupt requested node TRIGO 0 */
166 IfxSent_InterruptNodePointer_trigo1, /**< \brief Specifies interrupt requested node TRIGO 1 */
167 IfxSent_InterruptNodePointer_trigo2, /**< \brief Specifies interrupt requested node TRIGO 2 */
168 IfxSent_InterruptNodePointer_trigo3, /**< \brief Specifies interrupt requested node TRIGO 3 */
169 IfxSent_InterruptNodePointer_trigo4, /**< \brief Specifies interrupt requested node TRIGO 4 */
170 IfxSent_InterruptNodePointer_trigo5 /**< \brief Specifies interrupt requested node TRIGO 5 */
171 } IfxSent_InterruptNodePointer;
172
173 /** \brief SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer
174 */
175 typedef enum
176 {
177 IfxSent_Nibble_0 = 0, /**< \brief Specifies receive data target nibble pointer to nibble 0 */
178 IfxSent_Nibble_1, /**< \brief Specifies receive data target nibble pointer to nibble 1 */
179 IfxSent_Nibble_2, /**< \brief Specifies receive data target nibble pointer to nibble 2 */
180 IfxSent_Nibble_3, /**< \brief Specifies receive data target nibble pointer to nibble 3 */
181 IfxSent_Nibble_4, /**< \brief Specifies receive data target nibble pointer to nibble 4 */
182 IfxSent_Nibble_5, /**< \brief Specifies receive data target nibble pointer to nibble 5 */
183 IfxSent_Nibble_6, /**< \brief Specifies receive data target nibble pointer to nibble 6 */
184 IfxSent_Nibble_7 /**< \brief Specifies receive data target nibble pointer to nibble 7 */
185 } IfxSent_Nibble;
186
187 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
188 * Definition in Ifx_SENT.CLC.B.EDIS
189 */
190 typedef enum
191 {
192 IfxSent_SleepMode_enable = 0, /**< \brief enables sleep mode */
193 IfxSent_SleepMode_disable = 1 /**< \brief disables sleep mode */
194 } IfxSent_SleepMode;
195
196 /** \brief Specifies the SENT SPC operational mode
197 */
198 typedef enum
199 {
200 IfxSent_SpcMode_sync = 0, /**< \brief Specifies synchronous SPC mode */
201 IfxSent_SpcMode_range = 1, /**< \brief Specifies range selection SPC mode */
202 IfxSent_SpcMode_bidirectional = 2 /**< \brief Specifies bidirectional transmit SPC mode */
203 } IfxSent_SpcMode;
204
205 /** \brief OCDS Suspend Control (OCDS.SUS)
206 */
207 typedef enum
208 {
209 IfxSent_SuspendMode_none = 0, /**< \brief No suspend */
210 IfxSent_SuspendMode_hard = 1, /**< \brief Hard Suspend */
211 IfxSent_SuspendMode_soft = 2 /**< \brief Soft Suspend */
212 } IfxSent_SuspendMode;
213
214 /** \brief SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time
215 */
216 typedef enum
217 {
218 IfxSent_TimeBase_measuredFrequency = 0, /**< \brief Specifies selection of pulse based on measured frequency */
219 IfxSent_TimeBase_nominalFrequency = 1 /**< \brief Specifies selection of pulse based on nomianl frequency */
220 } IfxSent_TimeBase;
221
222 /** \brief SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation
223 */
224 typedef enum
225 {
226 IfxSent_TriggerSource_off = 0, /**< \brief Specifies no pulse generation */
227 IfxSent_TriggerSource_immediate = 1, /**< \brief Specifies immediate pulse generation */
228 IfxSent_TriggerSource_fallingEdge = 2, /**< \brief Specifies pulse generation at fallingEdge */
229 IfxSent_TriggerSource_externalTrigger = 3 /**< \brief Specifies pulse generation after each external trigger */
230 } IfxSent_TriggerSource;
231
232 /** \} */
233
234 /** \brief Sent Interrupt Source
235 */
236 typedef enum
237 {
238 IfxSent_InterruptSource_rsi = 0, /**< \brief Enable Interrupt Request RSI */
239 IfxSent_InterruptSource_rdi = 1, /**< \brief Enable Interrupt Request RDI */
240 IfxSent_InterruptSource_rbi = 2, /**< \brief Enable Interrupt Request RBI */
241 IfxSent_InterruptSource_tdi = 3, /**< \brief Enable Interrupt Request TDI */
242 IfxSent_InterruptSource_tbi = 4, /**< \brief Enable Interrupt Request TBI */
243 IfxSent_InterruptSource_fri = 5, /**< \brief Enable Interrupt Request FRI */
244 IfxSent_InterruptSource_fdi = 6, /**< \brief Enable Interrupt Request FDI */
245 IfxSent_InterruptSource_nni = 7, /**< \brief Enable Interrupt Request NNI */
246 IfxSent_InterruptSource_nvi = 8, /**< \brief Enable Interrupt Request NVI */
247 IfxSent_InterruptSource_crci = 9, /**< \brief Enable Interrupt Request crci */
248 IfxSent_InterruptSource_wsi = 10, /**< \brief Enable Interrupt Request wsi */
249 IfxSent_InterruptSource_sdi = 11, /**< \brief Enable Interrupt Request sdi */
250 IfxSent_InterruptSource_scri = 12, /**< \brief Enable Interrupt Request scri */
251 IfxSent_InterruptSource_wdi = 13 /**< \brief Enable Interrupt Request wdi */
252 } IfxSent_InterruptSource;
253
254 /** \addtogroup IfxLld_Sent_Std_Configuration
255 * \{ */
256
257 /******************************************************************************/
258 /*-------------------------Inline Function Prototypes-------------------------*/
259 /******************************************************************************/
260
261 /** \brief Sets the operation mode of SENT kernel
262 * \param sent base address of the SENT register space
263 * \param channelId SENT channel number
264 * \param alternateInput alternate input/output pin for SENT operation
265 * \return None
266 */
267 IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput);
268
269 /** \brief Set the module time stamp pre-divider
270 * \param sent base address of the SENT register space
271 * \param timeStampPreDivider time stamp pre-divider value
272 * \return None
273 */
274 IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider);
275
276 /** \} */
277
278 /** \addtogroup IfxLld_Sent_Std_Interrupts
279 * \{ */
280
281 /******************************************************************************/
282 /*-------------------------Inline Function Prototypes-------------------------*/
283 /******************************************************************************/
284
285 /** \brief Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.
286 *
287 * This function should be used in an ISR to retrieve the events which triggered the interrupt.
288 * \param sent base address of the SENT register space
289 * \param channelId SENT channel number
290 * \return Interrupt flags which have been cleared.
291 */
292 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
293
294 /** \brief Gets the current channel status
295 * \param sent base address of the SENT register space
296 * \param channelId SENT channel number
297 * \return current channel interrupt status
298 */
299 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
300
301 /** \brief gets the source for channel interrupt handler
302 * \param channelId SENT channel number
303 * \return interrupt source
304 */
305 IFX_INLINE volatile Ifx_SRC_SRCR *IfxSent_getChannelSrc(IfxSent_ChannelId channelId);
306
307 /** \} */
308
309 /** \addtogroup IfxLld_Sent_Std_Operative
310 * \{ */
311
312 /******************************************************************************/
313 /*-------------------------Inline Function Prototypes-------------------------*/
314 /******************************************************************************/
315
316 /** \brief Disable the channel with the channel number
317 * \param sent base address of the SENT register space
318 * \param channelId SENT channel number
319 * \return None
320 */
321 IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId);
322
323 /** \brief Disable the SENT module
324 * \param sent base address of the SENT register space
325 * \return None
326 */
327 IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent);
328
329 /** \brief Enable the channel with the channel number
330 * \param sent base address of the SENT register space
331 * \param channelId SENT channel number
332 * \return None
333 */
334 IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId);
335
336 /** \brief Enable the SENT module
337 * \param sent base address of the SENT register space
338 * \return None
339 */
340 IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent);
341
342 /** \brief Returns the module's suspend state.
343 * TRUE :if module is suspended.
344 * FALSE:if module is not yet suspended.
345 * \param sent Pointer to SENT module registers
346 * \return Suspend status (TRUE / FALSE)
347 */
348 IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent);
349
350 /** \brief Sets the sensitivity of the module to sleep signal
351 * \param sent pointer to SENT registers
352 * \param mode mode selection (enable / disable)
353 * \return None
354 */
355 IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode);
356
357 /** \brief Configure the Module to Hard/Soft suspend mode.
358 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
359 * \param sent Pointer to SENT module registers
360 * \param mode Module suspend mode
361 * \return None
362 */
363 IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode);
364
365 /******************************************************************************/
366 /*-------------------------Global Function Prototypes-------------------------*/
367 /******************************************************************************/
368
369 /** \brief Resets the SENT module
370 * \param sent base address of the SENT register space
371 * \return None
372 */
373 IFX_EXTERN void IfxSent_resetModule(Ifx_SENT *sent);
374
375 /** \} */
376
377 /** \addtogroup IfxLld_Sent_Std_Baudrate
378 * \{ */
379
380 /******************************************************************************/
381 /*-------------------------Inline Function Prototypes-------------------------*/
382 /******************************************************************************/
383
384 /** \brief Sets the channel fractional baudrate divider
385 * \param sent base address of the SENT register space
386 * \param channelId SENT channel number
387 * \param divider channel baudrate fractional divider
388 * \return None
389 */
390 IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider);
391
392 /** \brief Sets the channel baudrate pre-divider
393 * \param sent base address of the SENT register space
394 * \param channelId SENT channel number
395 * \param preDivider channel baudrate pre-divider
396 * \return None
397 */
398 IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider);
399
400 /******************************************************************************/
401 /*-------------------------Global Function Prototypes-------------------------*/
402 /******************************************************************************/
403
404 /** \brief Returns the current module frequency in Hertz.
405 * \param sent base address of the SENT register space
406 * \return The current module frequency in Hertz
407 */
408 IFX_EXTERN float32 IfxSent_getModuleClock(Ifx_SENT *sent);
409
410 /** \brief Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel
411 * \param sent base address of the SENT register space
412 * \param channelId SENT channel number
413 * \param tUnit desired unit time (f_tick), e.g. 3E-6 for 3 uS
414 * \return None
415 */
416 IFX_EXTERN void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit);
417
418 /** \brief Initialize and get the clock for SENT kernel
419 * \param sent base address of the SENT register space
420 * \param dividerMode Divider mode for clock output
421 * \param stepValue clock frequency for for module fractional divider
422 * \return None
423 */
424 IFX_EXTERN void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue);
425
426 /** \} */
427
428 /** \addtogroup IfxLld_Sent_Std_IO
429 * \{ */
430
431 /******************************************************************************/
432 /*-------------------------Inline Function Prototypes-------------------------*/
433 /******************************************************************************/
434
435 /** \brief Initializes a SENT input
436 * \param sentIn the SENT Pin which should be configured
437 * \param inputMode the pin input mode which should be configured
438 * \param padDriver the pad driver mode which should be configured
439 * \return None
440 */
441 IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
442
443 /** \brief Initializes a SPC output
444 * \param spcOut the SPC Pin which should be configured
445 * \param spcOutMode Port Output Mode
446 * \param padDriver the pad driver mode which should be configured
447 * \return None
448 */
449 IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver);
450
451 /** \} */
452
453 /******************************************************************************/
454 /*-------------------------Inline Function Prototypes-------------------------*/
455 /******************************************************************************/
456
457 /** \brief Set the watch dog timer limit value for sent channel.
458 * \param sent base address of the SENT register space
459 * \param channelId SENT channel number
460 * \param watchDogTimerLimit Specifies the watch dog timer limit value.
461 * \return None
462 */
463 IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit);
464
465 /** \brief Return TRUE if SENT module is enabled
466 * \param sent base address of the SENT register space
467 * \return The status of whether clock for sent is enabled or disabled
468 */
469 IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent);
470
471 /** \brief Return the Interrupt Status of the SENT channel
472 * \param sent base address of the SENT register space
473 * \param channelId SENT channel number
474 * \param source enable the interrupt source of any interrupt of SENT Channel
475 * \return The Interrupt Status of SENT channel
476 */
477 IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source);
478
479 /**
480 * \param sent base address of the SENT register space
481 * \param channelId SENT channel number
482 * \param source enable the interrupt source of any interrupt of SENT Channel
483 * \return None
484 */
485 IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source);
486
487 /**
488 * \param sent base address of the SENT register space
489 * \param channelId SENT channel number
490 * \return The Data content of a recieved Data Frame
491 */
492 IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId);
493
494 /** \brief Reads and returns value in RSR (Received Status Register).
495 * \param sent base address of the SENT register space
496 * \param channelId SENT channel number
497 * \return Returns 32 bit RSR
498 */
499 IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
500
501 /** \brief Returns 4 bit CRC value in Receive Status Register
502 * \param sent base address of the SENT register space
503 * \param channelId SENT channel number
504 * \return 4 bit CRC
505 */
506 IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId);
507
508 /** \brief Returns 2 bit CST value in Receive Status Register
509 * \param sent base address of the SENT register space
510 * \param channelId SENT channel number
511 * \return 2 bit CST
512 */
513 IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
514
515 /** \brief Returns 4 bit SCN value in Receive Status Register
516 * \param sent base address of the SENT register space
517 * \param channelId SENT channel number
518 * \return 4 bit SCN
519 */
520 IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId);
521
522 /** \brief Returns 32 bit Received Time Stamp Value
523 * \param sent base address of the SENT register space
524 * \param channelId SENT channel number
525 * \return 32 bit Time Stamp
526 */
527 IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId);
528
529 /** \brief Returns 6 bit PLEN value in SCR Register
530 * \param sent base address of the SENT register space
531 * \param channelId SENT channel number
532 * \return 6 bit PLEN
533 */
534 IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId);
535
536 /** \brief Returns 6 bit Delay length value in SCR Register
537 * \param sent base address of the SENT register space
538 * \param channelId SENT channel number
539 * \return 6 bit DEL
540 */
541 IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId);
542
543 /******************************************************************************/
544 /*-------------------------Global Function Prototypes-------------------------*/
545 /******************************************************************************/
546
547 /** \brief Returns the current unit time (f_tick) of the given channel
548 * \param sent base address of the SENT register space
549 * \param channelId SENT channel number
550 * \return The current unit time in seconds
551 */
552 IFX_EXTERN float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId);
553
554 /******************************************************************************/
555 /*---------------------Inline Function Implementations------------------------*/
556 /******************************************************************************/
557
558 IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
559 {
560 sent->CH[channelId].RCR.B.CEN = 0;
561 }
562
563
564 IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent)
565 {
566 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
567 IfxScuWdt_clearCpuEndinit(passwd);
568 sent->CLC.B.DISR = 1;
569 IfxScuWdt_setCpuEndinit(passwd);
570 }
571
572
573 IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
574 {
575 sent->CH[channelId].RCR.B.CEN = 1;
576 }
577
578
579 IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
580 {
581 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
582 IfxScuWdt_clearCpuEndinit(passwd);
583 sent->CLC.B.DISR = 0;
584 IfxScuWdt_setCpuEndinit(passwd);
585
586 if (sent->CLC.U)
587 {}
588 }
589
590
591 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
592 {
593 Ifx_SENT_CH_INTSTAT interruptFlags;
594 interruptFlags.U = sent->CH[channelId].INTSTAT.U;
595 sent->CH[channelId].INTCLR.U = interruptFlags.U;
596 return interruptFlags;
597 }
598
599
600 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
601 {
602 Ifx_SENT_CH_INTSTAT interruptFlags;
603 interruptFlags.U = sent->CH[channelId].INTSTAT.U;
604 return interruptFlags;
605 }
606
607
608 IFX_INLINE volatile Ifx_SRC_SRCR *IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
609 {
610 return &MODULE_SRC.SENT.SENT[0].SR[channelId];
611 }
612
613
614 IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
615 {
616 if (sentIn->pin.port != NULL_PTR)
617 {
618 IfxPort_setPinModeInput(sentIn->pin.port, sentIn->pin.pinIndex, inputMode);
619 IfxPort_setPinPadDriver(sentIn->pin.port, sentIn->pin.pinIndex, padDriver);
620 IfxSent_setAltiInput(sentIn->module, sentIn->channelId, (IfxSent_AlternateInput)sentIn->select);
621 }
622 }
623
624
625 IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
626 {
627 if (spcOut->pin.port != NULL_PTR)
628 {
629 IfxPort_setPinModeOutput(spcOut->pin.port, spcOut->pin.pinIndex, spcOutMode, spcOut->select);
630 IfxPort_setPinPadDriver(spcOut->pin.port, spcOut->pin.pinIndex, padDriver);
631 }
632 }
633
634
635 IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent)
636 {
637 Ifx_SENT_OCS ocs;
638
639 // read the status
640 ocs.U = sent->OCS.U;
641
642 // return the status
643 return ocs.B.SUSSTA;
644 }
645
646
647 IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
648 {
649 sent->CH[channelId].IOCR.B.ALTI = alternateInput;
650 }
651
652
653 IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
654 {
655 sent->CH[channelId].CFDR.B.DIV = divider;
656 }
657
658
659 IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
660 {
661 sent->CH[channelId].CPDR.B.PDIV = preDivider;
662 }
663
664
665 IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode)
666 {
667 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
668 IfxScuWdt_clearCpuEndinit(passwd);
669 sent->CLC.B.EDIS = mode;
670 IfxScuWdt_setCpuEndinit(passwd);
671 }
672
673
674 IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode)
675 {
676 Ifx_SENT_OCS ocs;
677
678 // remove protection and configure the suspend mode.
679 ocs.B.SUS_P = 1;
680 ocs.B.SUS = mode;
681 sent->OCS.U = ocs.U;
682 }
683
684
685 IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
686 {
687 sent->TPD.B.TDIV = timeStampPreDivider;
688 }
689
690
691 IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
692 {
693 sent->CH[channelId].WDT.B.WDLx = watchDogTimerLimit;
694 }
695
696
697 IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
698 {
699 return sent->CLC.B.DISS == 0;
700 }
701
702
703 IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
704 {
705 return (sent->CH[channelId].INTSTAT.U >> source) == 1;
706 }
707
708
709 IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
710 {
711 sent->CH[channelId].INTCLR.U = (1 << source);
712 }
713
714
715 IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId)
716 {
717 return sent->RDR[channelId].U;
718 }
719
720
721 IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
722 {
723 return sent->CH[channelId].RSR.U;
724 }
725
726
727 IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId)
728 {
729 return sent->CH[channelId].RSR.B.CRC;
730 }
731
732
733 IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
734 {
735 return sent->CH[channelId].RSR.B.CST;
736 }
737
738
739 IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId)
740 {
741 return sent->CH[channelId].RSR.B.SCN;
742 }
743
744
745 IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId)
746 {
747 return sent->RTS[channelId].U;
748 }
749
750
751 IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
752 {
753 return sent->CH[channelId].SCR.B.PLEN;
754 }
755
756
757 IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
758 {
759 return sent->CH[channelId].SCR.B.DEL;
760 }
761
762
763 #endif /* IFXSENT_H */
IfxSent_FrameCheckMode
IfxSent_FrameCheckMode
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.
Definition: IfxSent.h:151
IfxSent_InterruptNodePointer_2
Specifies interrupt requested node 2.
Definition: IfxSent.h:163
IfxSent_FrameCheckMode_pastSyncPulse
Specifies frame check mode against past sync pulse.
Definition: IfxSent.h:153
IfxSent_ExternalTrigger_5
Specifies the external trigger line 5.
Definition: IfxSent.h:142
IfxSent_DigitalGlitchesLength_10
Specifies 10 port input samples.
Definition: IfxSent.h:117
IfxSent_getChannelSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
gets the source for channel interrupt handler
Definition: IfxSent.h:608
IfxSent_disableModule
IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent)
Disable the SENT module.
Definition: IfxSent.h:564
IfxSent_InterruptSource_fdi
Enable Interrupt Request FDI.
Definition: IfxSent.h:244
IfxSent_SuspendMode_soft
Soft Suspend.
Definition: IfxSent.h:211
IfxSent_getChannelUnitTime
IFX_EXTERN float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns the current unit time (f_tick) of the given channel.
Definition: IfxSent.c:36
IfxSent_ExternalTrigger_8
Specifies the external trigger line 8.
Definition: IfxSent.h:145
IfxSent_TriggerSource_off
Specifies no pulse generation.
Definition: IfxSent.h:226
IfxSent_InterruptSource_nvi
Enable Interrupt Request NVI.
Definition: IfxSent.h:246
IfxSent_Spc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSent_PinMap.h:53
IfxSent_AlternateInput
IfxSent_AlternateInput
SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel.
Definition: IfxSent.h:68
IfxSent_ExternalTrigger_3
Specifies the external trigger line 3.
Definition: IfxSent.h:140
IfxSent_resetModule
IFX_EXTERN void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:128
IfxSent_TriggerSource_immediate
Specifies immediate pulse generation.
Definition: IfxSent.h:227
IfxSent_Sent_In::channelId
IfxSent_ChannelId channelId
Channel ID.
Definition: IfxSent_PinMap.h:42
IfxSent_TriggerSource_externalTrigger
Specifies pulse generation after each external trigger.
Definition: IfxSent.h:229
IfxSent_setSuspendMode
IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxSent.h:674
IfxSent_InterruptNodePointer
IfxSent_InterruptNodePointer
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for ...
Definition: IfxSent.h:159
IfxSent_SleepMode
IfxSent_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_SENT.CLC.B.EDIS.
Definition: IfxSent.h:190
IfxSent_DigitalGlitchesLength_12
Specifies 12 port input samples.
Definition: IfxSent.h:119
IfxSent_ChannelStatus
IfxSent_ChannelStatus
SENT.CH[channelId].RSR.CST, Specifies the current channel status.
Definition: IfxSent.h:78
IfxSent_Nibble_2
Specifies receive data target nibble pointer to nibble 2.
Definition: IfxSent.h:179
IfxSent_SpcMode_sync
Specifies synchronous SPC mode.
Definition: IfxSent.h:200
IfxSent_InterruptSource_rdi
Enable Interrupt Request RDI.
Definition: IfxSent.h:239
IfxSent_InterruptNodePointer_0
Specifies interrupt requested node 0.
Definition: IfxSent.h:161
IfxSent_InterruptSource_sdi
Enable Interrupt Request sdi.
Definition: IfxSent.h:249
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxSent_readSpcDelayLength
IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit Delay length value in SCR Register.
Definition: IfxSent.h:757
IfxSent_DigitalGlitchesLength_4
Specifies 4 port input samples.
Definition: IfxSent.h:111
float32
float float32
Definition: Platform_Types.h:167
IfxSent_enableChannel
IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number.
Definition: IfxSent.h:573
IfxSent_InterruptSource_nni
Enable Interrupt Request NNI.
Definition: IfxSent.h:245
IfxSent_Nibble_4
Specifies receive data target nibble pointer to nibble 4.
Definition: IfxSent.h:181
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxSent_getChannelInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Gets the current channel status.
Definition: IfxSent.h:600
IfxSent_Nibble_0
Specifies receive data target nibble pointer to nibble 0.
Definition: IfxSent.h:177
IfxSrc.h
SRC basic functionality.
IfxCpu_Intrinsics.h
IfxSent_InterruptNodePointer_trigo1
Specifies interrupt requested node TRIGO 1.
Definition: IfxSent.h:166
IfxSent_ExternalTrigger_2
Specifies the external trigger line 2.
Definition: IfxSent.h:139
IfxSent_ExternalTrigger_0
Specifies the external trigger line 0.
Definition: IfxSent.h:137
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:39
IfxSent_readSpcPulseLength
IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 6 bit PLEN value in SCR Register.
Definition: IfxSent.h:751
IfxSent_ExtendedSerialFrameMode_extended
Specifies the extended serial frame structure.
Definition: IfxSent.h:130
IfxPort_setPinModeInput
IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
Configure the port input / output mode.
Definition: IfxPort.h:560
IfxSent_InterruptSource_tbi
Enable Interrupt Request TBI.
Definition: IfxSent.h:242
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:48
IfxSent_ExternalTrigger_9
Specifies the external trigger line 9.
Definition: IfxSent.h:146
IfxSent_InterruptNodePointer_trigo5
Specifies interrupt requested node TRIGO 5.
Definition: IfxSent.h:170
IfxSent_initSpcPin
IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output.
Definition: IfxSent.h:625
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxSent_DigitalGlitchesLength_14
Specifies 14 port input samples.
Definition: IfxSent.h:121
IfxSent_cfg.h
SENT on-chip implementation data.
IfxSent_Nibble_1
Specifies receive data target nibble pointer to nibble 1.
Definition: IfxSent.h:178
IfxSent_ConfigBit_0
Specifies received configuration bit value 0.
Definition: IfxSent.h:99
IfxSent_ChannelStatus_stop
Specifies the channel is stopped.
Definition: IfxSent.h:80
IfxSent_Sent_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxSent_PinMap.h:44
IfxSent_ExternalTrigger_1
Specifies the external trigger line 1.
Definition: IfxSent.h:138
IfxSent_readReceivedCrc
IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit CRC value in Receive Status Register.
Definition: IfxSent.h:727
IfxSent_DigitalGlitchesLength_7
Specifies 7 port input samples.
Definition: IfxSent.h:114
IfxSent_DigitalGlitchesLength_1
Specifies 1 port input samples.
Definition: IfxSent.h:108
IfxSent_DigitalGlitchesLength_15
Specifies 15 port input samples.
Definition: IfxSent.h:122
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxSent_setWatchDogTimerLimit
IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
Set the watch dog timer limit value for sent channel.
Definition: IfxSent.h:691
IfxSent_ExternalTrigger_7
Specifies the external trigger line 7.
Definition: IfxSent.h:144
IfxSent_InterruptNodePointer_trigo4
Specifies interrupt requested node TRIGO 4.
Definition: IfxSent.h:169
IfxSent_DigitalGlitchesLength_13
Specifies 13 port input samples.
Definition: IfxSent.h:120
IfxSent_ClockDividerMode_fractional
Specifies clock fractional divider mode.
Definition: IfxSent.h:92
IfxSent_InterruptSource_scri
Enable Interrupt Request scri.
Definition: IfxSent.h:250
IfxSent_InterruptSource_wsi
Enable Interrupt Request wsi.
Definition: IfxSent.h:248
IfxSent_InterruptSource_fri
Enable Interrupt Request FRI.
Definition: IfxSent.h:243
IfxSent_setChannelFractionalDivider
IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
Sets the channel fractional baudrate divider.
Definition: IfxSent.h:653
IfxSent_InterruptNodePointer_trigo2
Specifies interrupt requested node TRIGO 2.
Definition: IfxSent.h:167
IfxSent_DigitalGlitchesLength_2
Specifies 2 port input samples.
Definition: IfxSent.h:109
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxSent_clearInterruptStatus
IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Definition: IfxSent.h:709
IfxSent_readReceivedData
IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Definition: IfxSent.h:715
IfxSent_disableChannel
IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number.
Definition: IfxSent.h:558
IfxSent_InterruptNodePointer_1
Specifies interrupt requested node 1.
Definition: IfxSent.h:162
IfxSent_setSleepMode
IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxSent.h:665
IfxSent_ExternalTrigger
IfxSent_ExternalTrigger
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.
Definition: IfxSent.h:135
IfxSent_InterruptNodePointer_trigo0
Specifies interrupt requested node TRIGO 0.
Definition: IfxSent.h:165
IfxSent_SuspendMode
IfxSent_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxSent.h:207
IfxSent_TimeBase_nominalFrequency
Specifies selection of pulse based on nomianl frequency.
Definition: IfxSent.h:219
IfxSent_Nibble
IfxSent_Nibble
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.
Definition: IfxSent.h:175
IfxSent_Nibble_5
Specifies receive data target nibble pointer to nibble 5.
Definition: IfxSent.h:182
IfxSent_ExtendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.
Definition: IfxSent.h:127
IfxSent_ClockDividerMode_normal
Specifies clock normal divider mode.
Definition: IfxSent.h:91
IfxSent_SuspendMode_none
No suspend.
Definition: IfxSent.h:209
IfxSent_setAltiInput
IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
Sets the operation mode of SENT kernel.
Definition: IfxSent.h:647
IfxSent_TriggerSource_fallingEdge
Specifies pulse generation at fallingEdge.
Definition: IfxSent.h:228
IfxSent_SpcMode
IfxSent_SpcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent.h:198
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxSent_readReceivedTimeStamp
IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 32 bit Received Time Stamp Value.
Definition: IfxSent.h:745
IfxSent_Sent_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSent_PinMap.h:43
IfxSent_TimeBase_measuredFrequency
Specifies selection of pulse based on measured frequency.
Definition: IfxSent.h:218
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:97
IfxSent_isModuleSuspended
IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxSent.h:635
IfxSent_ChannelStatus_initialize
Specifies the channel is initialized.
Definition: IfxSent.h:81
IfxSent_InterruptSource_rsi
Enable Interrupt Request RSI.
Definition: IfxSent.h:238
IfxSent_AlternateInput_1
Specifies alternate input 1.
Definition: IfxSent.h:71
IfxSent_SpcMode_bidirectional
Specifies bidirectional transmit SPC mode.
Definition: IfxSent.h:202
IfxSent_AlternateInput_3
Specifies alternate input 3.
Definition: IfxSent.h:73
IfxSent_DigitalGlitchesLength
IfxSent_DigitalGlitchesLength
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.
Definition: IfxSent.h:105
IfxSent_setChannelPreDivider
IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
Sets the channel baudrate pre-divider.
Definition: IfxSent.h:659
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxSent_AlternateInput_0
Specifies alternate input 0.
Definition: IfxSent.h:70
IfxSent_ChannelStatus_synchronize
Specifies the channel is synchronized.
Definition: IfxSent.h:83
IfxSent_getInterruptStatus
IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
Return the Interrupt Status of the SENT channel.
Definition: IfxSent.h:703
IfxSent_readReceivedStatusAndCommunicationNibble
IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 4 bit SCN value in Receive Status Register.
Definition: IfxSent.h:739
IfxSent_SleepMode_disable
disables sleep mode
Definition: IfxSent.h:193
IfxSent_ClockDividerMode
IfxSent_ClockDividerMode
SENT.FDR.DM , Specifies clock divider mode.
Definition: IfxSent.h:88
IfxSent_TriggerSource
IfxSent_TriggerSource
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.
Definition: IfxSent.h:224
IfxSent_SpcMode_range
Specifies range selection SPC mode.
Definition: IfxSent.h:201
IfxSent_ClockDividerMode_off
Specifies clock divider mode off.
Definition: IfxSent.h:90
IfxSent_DigitalGlitchesLength_off
Specifies port input samples off.
Definition: IfxSent.h:107
IfxSent_InterruptNodePointer_trigo3
Specifies interrupt requested node TRIGO 3.
Definition: IfxSent.h:168
IfxSent_Nibble_7
Specifies receive data target nibble pointer to nibble 7.
Definition: IfxSent.h:184
IfxSent_ExternalTrigger_6
Specifies the external trigger line 6.
Definition: IfxSent.h:143
IfxSent_ExtendedSerialFrameMode_standard
Specifies the standard serial frame structure.
Definition: IfxSent.h:129
IfxSent_DigitalGlitchesLength_6
Specifies 6 port input samples.
Definition: IfxSent.h:113
IfxSent_DigitalGlitchesLength_5
Specifies 5 port input samples.
Definition: IfxSent.h:112
IfxSent_ChannelStatus_running
Specifies the channel is running.
Definition: IfxSent.h:82
IfxSent_ExternalTrigger_4
Specifies the external trigger line 4.
Definition: IfxSent.h:141
IfxSent_Sent_In::module
Ifx_SENT * module
Base address.
Definition: IfxSent_PinMap.h:41
IfxSent_InterruptSource_tdi
Enable Interrupt Request TDI.
Definition: IfxSent.h:241
IfxScuCcu.h
SCU basic functionality.
IfxSent_DigitalGlitchesLength_8
Specifies 8 port input samples.
Definition: IfxSent.h:115
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxSent_FrameCheckMode_futureSuncPulse
Specifies frame check mode against future sync pulse.
Definition: IfxSent.h:154
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxSent_setTimeStampPredivider
IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider.
Definition: IfxSent.h:685
IfxSent_InterruptSource_rbi
Enable Interrupt Request RBI.
Definition: IfxSent.h:240
IfxSent_DigitalGlitchesLength_9
Specifies 9 port input samples.
Definition: IfxSent.h:116
IfxSent_initializeChannelUnitTime
IFX_EXTERN void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:86
IfxSent_initializeModuleClock
IFX_EXTERN void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:118
IfxSent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent.h:591
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:66
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxSent_InterruptSource_crci
Enable Interrupt Request crci.
Definition: IfxSent.h:247
IfxSent_readReceivedStatus
IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Reads and returns value in RSR (Received Status Register).
Definition: IfxSent.h:721
IfxSent_TimeBase
IfxSent_TimeBase
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.
Definition: IfxSent.h:216
IfxSent_AlternateInput_2
Specifies alternate input 2.
Definition: IfxSent.h:72
IfxSent_SleepMode_enable
enables sleep mode
Definition: IfxSent.h:192
IfxSent_initSentPin
IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input.
Definition: IfxSent.h:614
IfxSent_DigitalGlitchesLength_11
Specifies 11 port input samples.
Definition: IfxSent.h:118
IfxSent_Nibble_6
Specifies receive data target nibble pointer to nibble 6.
Definition: IfxSent.h:183
IfxSent_getModuleClock
IFX_EXTERN float32 IfxSent_getModuleClock(Ifx_SENT *sent)
Returns the current module frequency in Hertz.
Definition: IfxSent.c:55
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxSent_InterruptSource
IfxSent_InterruptSource
Sent Interrupt Source.
Definition: IfxSent.h:236
IfxSent_isModuleEnabled
IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
Return TRUE if SENT module is enabled.
Definition: IfxSent.h:697
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxSent_readReceivedChannelStatus
IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Returns 2 bit CST value in Receive Status Register.
Definition: IfxSent.h:733
IfxSent_SuspendMode_hard
Hard Suspend.
Definition: IfxSent.h:210
IfxSent_InterruptSource_wdi
Enable Interrupt Request wdi.
Definition: IfxSent.h:251
IfxSent_PinMap.h
SENT I/O map.
IfxSent_InterruptNodePointer_3
Specifies interrupt requested node 3.
Definition: IfxSent.h:164
IfxSent_ConfigBit_1
Specifies received configuration bit value 1.
Definition: IfxSent.h:100
IfxSent_enableModule
IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
Enable the SENT module.
Definition: IfxSent.h:579
IfxSent_DigitalGlitchesLength_3
Specifies 3 port input samples.
Definition: IfxSent.h:110
IfxSent_Nibble_3
Specifies receive data target nibble pointer to nibble 3.
Definition: IfxSent.h:180


iLLD_TC26B: IfxSent_PinMap.c Source File

  • _PinMap
IfxSent_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_PinMap.c
3 * \brief SENT I/O map
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxSent_PinMap.h"
27
28 IfxSent_Sent_In IfxSent_SENT0A_AN24_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {NULL_PTR,24}, Ifx_RxSel_a};
29 IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a};
30 IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b};
31 IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c};
32 IfxSent_Sent_In IfxSent_SENT1A_AN25_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {NULL_PTR,25}, Ifx_RxSel_a};
33 IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a};
34 IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b};
35 IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c};
36 IfxSent_Sent_In IfxSent_SENT2A_AN26_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,26}, Ifx_RxSel_a};
37 IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a};
38 IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b};
39 IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c};
40 IfxSent_Sent_In IfxSent_SENT2D_AN36_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,36}, Ifx_RxSel_d};
41 IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 6}, Ifx_RxSel_d};
42 IfxSent_Sent_In IfxSent_SENT3A_AN27_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,27}, Ifx_RxSel_a};
43 IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a};
44 IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b};
45 IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c};
46 IfxSent_Sent_In IfxSent_SENT3D_AN37_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,37}, Ifx_RxSel_d};
47 IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 7}, Ifx_RxSel_d};
48 IfxSent_Sent_In IfxSent_SENT4A_AN38_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {NULL_PTR,38}, Ifx_RxSel_a};
49 IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 8}, Ifx_RxSel_a};
50 IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b};
51 IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c};
52 IfxSent_Sent_In IfxSent_SENT5A_AN39_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {NULL_PTR,39}, Ifx_RxSel_a};
53 IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 9}, Ifx_RxSel_a};
54 IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b};
55 IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c};
56 IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6};
57 IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6};
58 IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6};
59 IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6};
60 IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6};
61 IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6};
62
63
64 const IfxSent_Sent_In *IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS] = {
65 {
66 {
67 &IfxSent_SENT0A_P40_0_IN,
68 &IfxSent_SENT0B_P00_1_IN,
69 &IfxSent_SENT0C_P02_8_IN,
70 NULL_PTR
71 },
72 {
73 &IfxSent_SENT1A_P40_1_IN,
74 &IfxSent_SENT1B_P00_2_IN,
75 &IfxSent_SENT1C_P02_7_IN,
76 NULL_PTR
77 },
78 {
79 &IfxSent_SENT2A_P40_2_IN,
80 &IfxSent_SENT2B_P00_3_IN,
81 &IfxSent_SENT2C_P02_6_IN,
82 &IfxSent_SENT2D_P40_6_IN
83 },
84 {
85 &IfxSent_SENT3A_P40_3_IN,
86 &IfxSent_SENT3B_P00_4_IN,
87 &IfxSent_SENT3C_P02_5_IN,
88 &IfxSent_SENT3D_P40_7_IN
89 },
90 {
91 &IfxSent_SENT4A_P40_8_IN,
92 &IfxSent_SENT4B_P00_5_IN,
93 &IfxSent_SENT4C_P33_6_IN,
94 NULL_PTR
95 },
96 {
97 &IfxSent_SENT5A_P40_9_IN,
98 &IfxSent_SENT5B_P00_6_IN,
99 &IfxSent_SENT5C_P33_5_IN,
100 NULL_PTR
101 }
102 }
103 };
104
105 const IfxSent_Spc_Out *IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS] = {
106 {
107 {
108 &IfxSent_SPC0_P00_1_OUT
109 },
110 {
111 &IfxSent_SPC1_P02_7_OUT
112 },
113 {
114 &IfxSent_SPC2_P00_3_OUT
115 },
116 {
117 &IfxSent_SPC3_P00_4_OUT
118 },
119 {
120 &IfxSent_SPC4_P00_5_OUT
121 },
122 {
123 &IfxSent_SPC5_P00_6_OUT
124 }
125 }
126 };
IfxSent_SPC5_P00_6_OUT
IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
Definition: IfxSent_PinMap.c:61
IfxSent_SENT0B_P00_1_IN
IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
Definition: IfxSent_PinMap.c:30
IfxSent_ChannelId_0
Specifies the channel Id 0.
Definition: IfxSent_cfg.h:68
IFXSENT_PINMAP_NUM_MODULES
#define IFXSENT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSent_PinMap.h:92
Ifx_RxSel_d
Definition: Ifx_Types.h:115
IfxSent_SENT4A_AN38_IN
IfxSent_Sent_In IfxSent_SENT4A_AN38_IN
Definition: IfxSent_PinMap.c:48
IfxSent_SENT5A_P40_9_IN
IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN
Definition: IfxSent_PinMap.c:53
IfxSent_SENT2C_P02_6_IN
IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
Definition: IfxSent_PinMap.c:39
IfxSent_ChannelId_4
Specifies the channel Id 4.
Definition: IfxSent_cfg.h:72
IfxSent_Spc_Out_pinTable
const IfxSent_Spc_Out * IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
Definition: IfxSent_PinMap.c:105
IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
Definition: IfxSent_PinMap.h:95
Ifx_RxSel_a
Definition: Ifx_Types.h:112
IfxSent_ChannelId_5
Specifies the channel Id 5.
Definition: IfxSent_cfg.h:73
IfxSent_SENT1A_AN25_IN
IfxSent_Sent_In IfxSent_SENT1A_AN25_IN
Definition: IfxSent_PinMap.c:32
IfxSent_SENT3D_P40_7_IN
IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN
Definition: IfxSent_PinMap.c:47
IfxSent_ChannelId_2
Specifies the channel Id 2.
Definition: IfxSent_cfg.h:70
IfxSent_SENT0A_P40_0_IN
IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
Definition: IfxSent_PinMap.c:29
IfxSent_Sent_In_pinTable
const IfxSent_Sent_In * IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
Definition: IfxSent_PinMap.c:64
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:39
Ifx_RxSel_b
Definition: Ifx_Types.h:113
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:48
IfxSent_SENT0C_P02_8_IN
IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
Definition: IfxSent_PinMap.c:31
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxSent_SENT1A_P40_1_IN
IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
Definition: IfxSent_PinMap.c:33
IfxSent_SPC1_P02_7_OUT
IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
Definition: IfxSent_PinMap.c:57
IfxSent_SENT4B_P00_5_IN
IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
Definition: IfxSent_PinMap.c:50
IfxSent_SENT5A_AN39_IN
IfxSent_Sent_In IfxSent_SENT5A_AN39_IN
Definition: IfxSent_PinMap.c:52
IfxSent_SENT1B_P00_2_IN
IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
Definition: IfxSent_PinMap.c:34
Ifx_RxSel_c
Definition: Ifx_Types.h:114
IfxSent_SENT5C_P33_5_IN
IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
Definition: IfxSent_PinMap.c:55
IfxSent_SENT3D_AN37_IN
IfxSent_Sent_In IfxSent_SENT3D_AN37_IN
Definition: IfxSent_PinMap.c:46
IfxSent_SPC4_P00_5_OUT
IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
Definition: IfxSent_PinMap.c:60
IfxSent_SENT3C_P02_5_IN
IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
Definition: IfxSent_PinMap.c:45
IfxSent_ChannelId_1
Specifies the channel Id 1.
Definition: IfxSent_cfg.h:69
IfxSent_SENT2D_AN36_IN
IfxSent_Sent_In IfxSent_SENT2D_AN36_IN
Definition: IfxSent_PinMap.c:40
IfxSent_SENT2A_P40_2_IN
IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
Definition: IfxSent_PinMap.c:37
IfxSent_SENT0A_AN24_IN
IfxSent_Sent_In IfxSent_SENT0A_AN24_IN
Definition: IfxSent_PinMap.c:28
IfxSent_SENT3A_P40_3_IN
IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
Definition: IfxSent_PinMap.c:43
IfxSent_SENT4C_P33_6_IN
IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
Definition: IfxSent_PinMap.c:51
IfxSent_SENT1C_P02_7_IN
IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
Definition: IfxSent_PinMap.c:35
IFXSENT_PINMAP_NUM_CHANNELS
#define IFXSENT_PINMAP_NUM_CHANNELS
Definition: IfxSent_PinMap.h:93
IfxSent_SENT2A_AN26_IN
IfxSent_Sent_In IfxSent_SENT2A_AN26_IN
Definition: IfxSent_PinMap.c:36
IfxSent_SENT5B_P00_6_IN
IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
Definition: IfxSent_PinMap.c:54
IfxSent_SPC0_P00_1_OUT
IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
Definition: IfxSent_PinMap.c:56
IfxSent_SENT2B_P00_3_IN
IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
Definition: IfxSent_PinMap.c:38
IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
Definition: IfxSent_PinMap.h:94
IfxSent_SENT4A_P40_8_IN
IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN
Definition: IfxSent_PinMap.c:49
IfxSent_SPC2_P00_3_OUT
IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
Definition: IfxSent_PinMap.c:58
IfxSent_SENT3B_P00_4_IN
IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
Definition: IfxSent_PinMap.c:44
IfxSent_ChannelId_3
Specifies the channel Id 3.
Definition: IfxSent_cfg.h:71
IfxSent_SENT3A_AN27_IN
IfxSent_Sent_In IfxSent_SENT3A_AN27_IN
Definition: IfxSent_PinMap.c:42
IfxSent_SPC3_P00_4_OUT
IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
Definition: IfxSent_PinMap.c:59
IfxSent_SENT2D_P40_6_IN
IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN
Definition: IfxSent_PinMap.c:41
IfxSent_PinMap.h
SENT I/O map.


iLLD_TC26B: IfxSent_PinMap.h Source File

  • _PinMap
IfxSent_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent_PinMap.h
3 * \brief SENT I/O map
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Sent_pinmap SENT Pin Mapping
25 * \ingroup IfxLld_Sent
26 */
27
28 #ifndef IFXSENT_PINMAP_H
29 #define IFXSENT_PINMAP_H
30
31 #include <IfxSent_reg.h>
32 #include <_Impl/IfxSent_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Sent_pinmap
36 * \{ */
37
38 /** \brief SENT pin mapping structure */
39 typedef const struct
40 {
41 Ifx_SENT* module; /**< \brief Base address */
42 IfxSent_ChannelId channelId; /**< \brief Channel ID */
43 IfxPort_Pin pin; /**< \brief Port pin */
44 Ifx_RxSel select; /**< \brief Input multiplexer value */
45 } IfxSent_Sent_In;
46
47 /** \brief SPC pin mapping structure */
48 typedef const struct
49 {
50 Ifx_SENT* module; /**< \brief Base address */
51 IfxSent_ChannelId channelId; /**< \brief Channel ID */
52 IfxPort_Pin pin; /**< \brief Port pin */
53 IfxPort_OutputIdx select; /**< \brief Port control code */
54 } IfxSent_Spc_Out;
55
56 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN; /**< \brief SENT_SENT0A: SENT input channel 0 pin A */
57 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN; /**< \brief SENT_SENT0A: SENT input */
58 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN; /**< \brief SENT_SENT0B: SENT input */
59 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN; /**< \brief SENT_SENT0C: SENT input */
60 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN; /**< \brief SENT_SENT1A: SENT input channel 1 pin A */
61 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN; /**< \brief SENT_SENT1A: SENT input */
62 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN; /**< \brief SENT_SENT1B: SENT input */
63 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN; /**< \brief SENT_SENT1C: SENT input */
64 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN; /**< \brief SENT_SENT2A: SENT input channel 2 pin A */
65 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN; /**< \brief SENT_SENT2A: SENT input */
66 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN; /**< \brief SENT_SENT2B: SENT input */
67 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN; /**< \brief SENT_SENT2C: SENT input */
68 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN; /**< \brief SENT_SENT2D: SENT input channel 2 pin D */
69 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN; /**< \brief SENT_SENT2D: SENT input */
70 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN; /**< \brief SENT_SENT3A: SENT input channel 3 pin A */
71 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN; /**< \brief SENT_SENT3A: SENT input */
72 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN; /**< \brief SENT_SENT3B: SENT input */
73 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN; /**< \brief SENT_SENT3C: SENT input */
74 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN; /**< \brief SENT_SENT3D: SENT input channel 3 pin D */
75 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN; /**< \brief SENT_SENT3D: SENT input */
76 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN; /**< \brief SENT_SENT4A: SENT input channel 4 pin A */
77 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN; /**< \brief SENT_SENT4A: SENT input */
78 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN; /**< \brief SENT_SENT4B: SENT input */
79 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN; /**< \brief SENT_SENT4C: SENT input */
80 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN; /**< \brief SENT_SENT5A: SENT input channel 5 pin A */
81 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN; /**< \brief SENT_SENT5A: SENT input */
82 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN; /**< \brief SENT_SENT5B: SENT input */
83 IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN; /**< \brief SENT_SENT5C: SENT input */
84 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT; /**< \brief SENT_SPC0: SENT output */
85 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT; /**< \brief SENT_SPC1: SENT output */
86 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT; /**< \brief SENT_SPC2: SENT output */
87 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT; /**< \brief SENT_SPC3: SENT output */
88 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT; /**< \brief SENT_SPC4: SENT output */
89 IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT; /**< \brief SENT_SPC5: SENT output */
90
91 /** \brief Table dimensions */
92 #define IFXSENT_PINMAP_NUM_MODULES 1
93 #define IFXSENT_PINMAP_NUM_CHANNELS 6
94 #define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
95 #define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1
96
97
98 /** \brief IfxSent_Sent_In table */
99 IFX_EXTERN const IfxSent_Sent_In *IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS];
100
101 /** \brief IfxSent_Spc_Out table */
102 IFX_EXTERN const IfxSent_Spc_Out *IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS];
103
104 /** \} */
105
106 #endif /* IFXSENT_PINMAP_H */
IfxSent_SENT0C_P02_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN
SENT_SENT0C: SENT input.
Definition: IfxSent_PinMap.h:59
IfxSent_SENT2C_P02_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN
SENT_SENT2C: SENT input.
Definition: IfxSent_PinMap.h:67
IFXSENT_PINMAP_NUM_MODULES
#define IFXSENT_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSent_PinMap.h:92
IfxSent_SENT1A_P40_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN
SENT_SENT1A: SENT input.
Definition: IfxSent_PinMap.h:61
IfxSent_SENT3A_AN27_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN
SENT_SENT3A: SENT input channel 3 pin A.
Definition: IfxSent_PinMap.h:70
IfxSent_Spc_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSent_PinMap.h:53
IfxSent_SPC3_P00_4_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT
SENT_SPC3: SENT output.
Definition: IfxSent_PinMap.h:87
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxSent_SENT1A_AN25_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN
SENT_SENT1A: SENT input channel 1 pin A.
Definition: IfxSent_PinMap.h:60
IfxSent_Sent_In::channelId
IfxSent_ChannelId channelId
Channel ID.
Definition: IfxSent_PinMap.h:42
IfxSent_SENT2A_P40_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN
SENT_SENT2A: SENT input.
Definition: IfxSent_PinMap.h:65
IfxSent_Spc_Out_pinTable
IFX_EXTERN const IfxSent_Spc_Out * IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS]
IfxSent_Spc_Out table.
Definition: IfxSent_PinMap.h:102
IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS
Definition: IfxSent_PinMap.h:95
IfxSent_SENT5C_P33_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN
SENT_SENT5C: SENT input.
Definition: IfxSent_PinMap.h:83
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:39
IfxSent_SENT3C_P02_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN
SENT_SENT3C: SENT input.
Definition: IfxSent_PinMap.h:73
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:48
IfxSent_SENT4C_P33_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN
SENT_SENT4C: SENT input.
Definition: IfxSent_PinMap.h:79
IfxSent_SENT4A_AN38_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN
SENT_SENT4A: SENT input channel 4 pin A.
Definition: IfxSent_PinMap.h:76
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxSent_cfg.h
SENT on-chip implementation data.
IfxSent_SPC0_P00_1_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT
SENT_SPC0: SENT output.
Definition: IfxSent_PinMap.h:84
IfxSent_SENT3B_P00_4_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN
SENT_SENT3B: SENT input.
Definition: IfxSent_PinMap.h:72
IfxSent_SENT2D_AN36_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN
SENT_SENT2D: SENT input channel 2 pin D.
Definition: IfxSent_PinMap.h:68
IfxSent_Sent_In::select
Ifx_RxSel select
Input multiplexer value.
Definition: IfxSent_PinMap.h:44
IfxSent_SENT2B_P00_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN
SENT_SENT2B: SENT input.
Definition: IfxSent_PinMap.h:66
IfxSent_SENT5B_P00_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN
SENT_SENT5B: SENT input.
Definition: IfxSent_PinMap.h:82
IfxSent_SPC4_P00_5_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT
SENT_SPC4: SENT output.
Definition: IfxSent_PinMap.h:88
IfxSent_SENT2A_AN26_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN
SENT_SENT2A: SENT input channel 2 pin A.
Definition: IfxSent_PinMap.h:64
IfxSent_Sent_In_pinTable
IFX_EXTERN const IfxSent_Sent_In * IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS]
IfxSent_Sent_In table.
Definition: IfxSent_PinMap.h:99
IfxSent_SPC1_P02_7_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT
SENT_SPC1: SENT output.
Definition: IfxSent_PinMap.h:85
IfxSent_SENT5A_AN39_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN
SENT_SENT5A: SENT input channel 5 pin A.
Definition: IfxSent_PinMap.h:80
IfxSent_Sent_In::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSent_PinMap.h:43
IfxSent_SENT1C_P02_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN
SENT_SENT1C: SENT input.
Definition: IfxSent_PinMap.h:63
IfxSent_SENT1B_P00_2_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN
SENT_SENT1B: SENT input.
Definition: IfxSent_PinMap.h:62
IFXSENT_PINMAP_NUM_CHANNELS
#define IFXSENT_PINMAP_NUM_CHANNELS
Definition: IfxSent_PinMap.h:93
IfxSent_SENT0B_P00_1_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN
SENT_SENT0B: SENT input.
Definition: IfxSent_PinMap.h:58
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxSent_SENT3A_P40_3_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN
SENT_SENT3A: SENT input.
Definition: IfxSent_PinMap.h:71
IfxSent_SENT3D_AN37_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN
SENT_SENT3D: SENT input channel 3 pin D.
Definition: IfxSent_PinMap.h:74
Ifx_RxSel
Ifx_RxSel
input multiplexer definition used in PinMaps
Definition: Ifx_Types.h:110
IfxSent_SPC2_P00_3_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT
SENT_SPC2: SENT output.
Definition: IfxSent_PinMap.h:86
IfxSent_SENT4A_P40_8_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN
SENT_SENT4A: SENT input.
Definition: IfxSent_PinMap.h:77
IfxSent_SENT0A_P40_0_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN
SENT_SENT0A: SENT input.
Definition: IfxSent_PinMap.h:57
IfxSent_SENT2D_P40_6_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN
SENT_SENT2D: SENT input.
Definition: IfxSent_PinMap.h:69
IfxSent_SENT3D_P40_7_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN
SENT_SENT3D: SENT input.
Definition: IfxSent_PinMap.h:75
IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS
Definition: IfxSent_PinMap.h:94
IfxSent_Sent_In::module
Ifx_SENT * module
Base address.
Definition: IfxSent_PinMap.h:41
IfxSent_SENT5A_P40_9_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN
SENT_SENT5A: SENT input.
Definition: IfxSent_PinMap.h:81
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:66
IfxSent_SPC5_P00_6_OUT
IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT
SENT_SPC5: SENT output.
Definition: IfxSent_PinMap.h:89
IfxSent_SENT4B_P00_5_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN
SENT_SENT4B: SENT input.
Definition: IfxSent_PinMap.h:78
IfxSent_SENT0A_AN24_IN
IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN
SENT_SENT0A: SENT input channel 0 pin A.
Definition: IfxSent_PinMap.h:56
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxSent_Sent.c Source File

  • Sent
  • Sent
IfxSent_Sent.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_Sent.c
3 * \brief SENT SENT details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxSent_Sent.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
37 {
38 Ifx_SENT *sentSFR = driver->sent;
39 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
40 IfxScuWdt_clearCpuEndinit(passwd);
41 IfxSent_resetModule(sentSFR);
42 IfxScuWdt_setCpuEndinit(passwd);
43 }
44
45
46 boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
47 {
48 boolean result = TRUE;
49
50 channel->driver = config->driver;
51 Ifx_SENT *sentSFR = config->driver->sent;
52 Ifx_SENT_CH *sentCh = &sentSFR->CH[config->channelId];
53 channel->channel = sentCh;
54 channel->channelId = config->channelId;
55
56 IfxSent_disableChannel(sentSFR, config->channelId);
57 IfxSent_initializeChannelUnitTime(sentSFR, config->channelId, config->tUnit);
58
59 Ifx_SENT_CH_WDT tempWDT;
60 tempWDT.U = 0;
61 tempWDT.B.WDLx = config->watchDogTimerLimit;
62 sentCh->WDT.U = tempWDT.U;
63
64 Ifx_SENT_CH_RCR tempRCR;
65 tempRCR.U = 0;
66 tempRCR.B.IEP = config->receiveControl.endPulseIgnored;
67 tempRCR.B.ACE = config->receiveControl.alternateCrcSelected;
68 tempRCR.B.SNI = config->receiveControl.statusNibbleEnabled;
69 tempRCR.B.SDP = config->receiveControl.serialDataProcessingEnabled;
70 tempRCR.B.SCDIS = config->receiveControl.serialDataDisabledCrcDisabled;
71 tempRCR.B.CDIS = config->receiveControl.crcModeDisabled;
72 tempRCR.B.CFC = config->receiveControl.frameCheckMode;
73 tempRCR.B.FRL = config->receiveControl.frameLength;
74 tempRCR.B.CRZ = config->receiveControl.crcMethodDisabled;
75 tempRCR.B.ESF = config->receiveControl.extendedSerialFrameMode;
76 tempRCR.B.IDE = config->receiveControl.driftErrorsDisabled;
77 tempRCR.B.SUSEN = config->receiveControl.suspendTriggered;
78 sentCh->RCR.U = tempRCR.U;
79
80 IfxSent_enableChannel(sentSFR, config->channelId);
81
82 Ifx_SENT_CH_VIEW tempVIEW;
83 tempVIEW.U = 0;
84 tempVIEW.B.RDNP0 = config->nibbleControl.nibblePointer0;
85 tempVIEW.B.RDNP1 = config->nibbleControl.nibblePointer1;
86 tempVIEW.B.RDNP2 = config->nibbleControl.nibblePointer2;
87 tempVIEW.B.RDNP3 = config->nibbleControl.nibblePointer3;
88 tempVIEW.B.RDNP4 = config->nibbleControl.nibblePointer4;
89 tempVIEW.B.RDNP5 = config->nibbleControl.nibblePointer5;
90 tempVIEW.B.RDNP6 = config->nibbleControl.nibblePointer6;
91 tempVIEW.B.RDNP7 = config->nibbleControl.nibblePointer7;
92 sentCh->VIEW.U = tempVIEW.U;
93
94 Ifx_SENT_CH_IOCR tempIOCR;
95 tempIOCR.U = 0;
96 tempIOCR.B.DEPTH = config->inputOutputControl.digitalGlitchFilterDepth;
97 tempIOCR.B.OIE = config->inputOutputControl.outputPulsePolarityHigh;
98 tempIOCR.B.IIE = config->inputOutputControl.inputPulsePolarityHigh;
99 tempIOCR.B.CEC = config->inputOutputControl.edgeCounterCleared;
100 tempIOCR.B.CREG = config->inputOutputControl.glitchRisingCleared;
101 tempIOCR.B.CFEG = config->inputOutputControl.glitchFallingCleared;
102 tempIOCR.B.ETS = config->inputOutputControl.externalTrigger;
103 tempIOCR.B.CTR = config->inputOutputControl.triggerMonitorCleared;
104 sentCh->IOCR.U = tempIOCR.U;
105
106 Ifx_SENT_CH_INP tempINP;
107 tempINP.U = 0;
108 tempINP.B.RSI = config->interuptNodeControl.receiveSuccessInterruptNode;
109 tempINP.B.RDI = config->interuptNodeControl.receiveDataInterruptNode;
110 tempINP.B.RBI = config->interuptNodeControl.receiveBufferOverflowInterruptNode;
111 tempINP.B.TDI = config->interuptNodeControl.transferDataInterruptNode;
112 tempINP.B.TBI = config->interuptNodeControl.transferBufferUnderflowInterruptNode;
113 tempINP.B.ERRI = config->interuptNodeControl.errorInterruptNode;
114 tempINP.B.SDI = config->interuptNodeControl.serialDataReceiveInterruptNode;
115 tempINP.B.WDI = config->interuptNodeControl.watchdogErrorInterruptNode;
116 sentCh->INP.U = tempINP.U;
117
118 sentCh->INTEN.U = config->enabledInterrupts.ALL;
119
120 if (config->receiveControl.frameLength > 8)
121 {
122 /* Clear RSI and enable only RDI interrupt */
123 sentCh->INTEN.B.RSI = 0;
124 sentCh->INTEN.B.RDI = 1;
125 }
126
127 if (config->spcModeOn == TRUE)
128 {
129 uint16 timeOut = IFXSENT_CFG_TIMEOUT_VALUE;
130 uint8 error = 0;
131
132 /* check if Transaction is in progress, before proceeding !!! */
133 while ((sentCh->SCR.B.TRQ == 1) && (timeOut > 0))
134 {
135 /* Wait for Transaction to be completed */
136 timeOut--;
137 }
138
139 if (timeOut == 0U)
140 {
141 error = 1U;
142 }
143
144 if (error == 0U)
145 {
146 Ifx_SENT_CH_SCR tempSCR;
147 tempSCR.U = 0;
148 tempSCR.B.PLEN = config->transmitControl.pulseLength;
149 tempSCR.B.TRIG = config->transmitControl.triggerSource;
150 tempSCR.B.DEL = config->transmitControl.pulseDelayLength;
151 tempSCR.B.BASE = config->transmitControl.timeBase;
152 sentCh->SCR.U = tempSCR.U;
153
154 if (config->transmitControl.spcMode == IfxSent_SpcMode_bidirectional)
155 {
156 /* Enable Buffer Underflow interrupt also */
157 sentCh->INTEN.B.TBI = 1U;
158 }
159 }
160 }
161
162 const IfxSent_Sent_Pins *pinsConfig = (const IfxSent_Sent_Pins *)config->pins;
163
164 if (pinsConfig != NULL_PTR)
165 {
166 const IfxSent_Sent_In *sentIn = pinsConfig->in;
167
168 if (sentIn != NULL_PTR)
169 {
170 IfxSent_initSentPin(sentIn, pinsConfig->inMode, pinsConfig->pinDriver);
171 }
172
173 const IfxSent_Spc_Out *spcOut = pinsConfig->out;
174
175 if (spcOut != NULL_PTR)
176 {
177 IfxSent_initSpcPin(spcOut, pinsConfig->outMode, pinsConfig->pinDriver);
178 }
179 }
180
181 {
182 IfxSrc_Tos tos = config->interrupt.isrProvider;
183
184 if ((config->interrupt.priority != 0) || (tos == IfxSrc_Tos_dma))
185 {
186 volatile Ifx_SRC_SRCR *src = IfxSent_getChannelSrc(config->channelId);
187 IfxSrc_init(src, tos, config->interrupt.priority);
188 IfxSrc_enable(src);
189 }
190 }
191
192 return result;
193 }
194
195
196 void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
197 {
198 const IfxSent_Sent_ChannelConfig defaultChannelConfig = {
199 .driver = NULL_PTR,
200 .channelId = IfxSent_ChannelId_none,
201 .tUnit = 3E-6, /* 3 uS */
202
203 .watchDogTimerLimit = 0,
204
205 .receiveControl = {
206 .endPulseIgnored = FALSE,
207 .alternateCrcSelected = FALSE,
208 .statusNibbleEnabled = FALSE,
209 .serialDataProcessingEnabled = FALSE,
210 .serialDataDisabledCrcDisabled = FALSE,
211 .crcModeDisabled = FALSE,
212 .frameCheckMode = IfxSent_FrameCheckMode_pastSyncPulse,
213 .frameLength = 6,
214 .crcMethodDisabled = FALSE,
215 .extendedSerialFrameMode = IfxSent_ExtendedSerialFrameMode_standard,
216 .driftErrorsDisabled = FALSE,
217 .suspendTriggered = FALSE,
218 },
219
220 .nibbleControl = {
221 .nibblePointer0 = IfxSent_Nibble_0,
222 .nibblePointer1 = IfxSent_Nibble_1,
223 .nibblePointer2 = IfxSent_Nibble_2,
224 .nibblePointer3 = IfxSent_Nibble_3,
225 .nibblePointer4 = IfxSent_Nibble_4,
226 .nibblePointer5 = IfxSent_Nibble_5,
227 .nibblePointer6 = IfxSent_Nibble_6,
228 .nibblePointer7 = IfxSent_Nibble_7,
229 },
230
231 .inputOutputControl = {
232 .digitalGlitchFilterDepth = IfxSent_DigitalGlitchesLength_2,
233 .outputPulsePolarityHigh = FALSE,
234 .inputPulsePolarityHigh = FALSE,
235 .edgeCounterCleared = TRUE,
236 .glitchRisingCleared = TRUE,
237 .glitchFallingCleared = TRUE,
238 .externalTrigger = IfxSent_ExternalTrigger_0,
239 .triggerMonitorCleared = FALSE,
240 },
241
242 .enabledInterrupts.ALL = IFXSENT_CFG_CHANNEL_INTEN,
243
244 .interuptNodeControl = {
245 .receiveDataInterruptNode = IfxSent_InterruptNodePointer_0,
246 .receiveSuccessInterruptNode = IfxSent_InterruptNodePointer_0,
247 .receiveBufferOverflowInterruptNode = IfxSent_InterruptNodePointer_0,
248 .transferDataInterruptNode = IfxSent_InterruptNodePointer_0,
249 .transferBufferUnderflowInterruptNode = IfxSent_InterruptNodePointer_0,
250 .errorInterruptNode = IfxSent_InterruptNodePointer_0,
251 .serialDataReceiveInterruptNode = IfxSent_InterruptNodePointer_0,
252 .watchdogErrorInterruptNode = IfxSent_InterruptNodePointer_0,
253 },
254
255 .pins = NULL_PTR,
256
257 /* SPC mode enable/disable */
258 .spcModeOn = FALSE,
259 };
260 *config = defaultChannelConfig;
261 config->driver = driver;
262 }
263
264
265 boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
266 {
267 boolean result = TRUE;
268 Ifx_SENT *sentSFR = config->module;
269 driver->sent = sentSFR;
270
271 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
272
273 if (IfxSent_isModuleEnabled(sentSFR) == FALSE)
274 {
275 IfxSent_enableModule(sentSFR);
276 }
277
278 IfxScuWdt_clearCpuEndinit(passwd);
279 sentSFR->CLC.B.EDIS = (config->sleepModeEnabled != FALSE) ? 0 : 1;
280 sentSFR->CLC.B.RMC = 1; /* no divider required, pass clock 1:1*/
281
282 IfxSent_initializeModuleClock(sentSFR, IfxSent_ClockDividerMode_normal, 1023); /* Fractional divider not required, pass 1:1*/
283 IfxSent_setTimeStampPredivider(sentSFR, config->timeStampPreDivider);
284
285 IfxScuWdt_setCpuEndinit(passwd);
286
287 return result;
288 }
289
290
291 void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
292 {
293 /* Default module initialization */
294 const IfxSent_Sent_Config defaultModuleConfig = {
295 .module = NULL_PTR,
296 .sleepModeEnabled = TRUE,
297 .timeStampPreDivider = 0,
298 };
299 *config = defaultModuleConfig;
300 config->module = sent;
301 }
302
303
304 boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
305 {
306 boolean result = TRUE;
307
308 Ifx_SENT *sentSFR = channel->driver->sent;
309 IfxSent_ChannelId ChanIdx = channel->channelId;
310 frame->data = sentSFR->RDR[ChanIdx].U;
311 frame->timeStamp = sentSFR->RTS[ChanIdx].U;
312 frame->statusNibble = channel->channel->RSR.B.SCN;
313
314 return result;
315 }
316
317
318 boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
319 {
320 boolean result = TRUE;
321
322 Ifx_SENT_CH *sentCh = channel->channel;
323 Ifx_SENT_CH_SDS sds;
324
325 sds.U = sentCh->SDS.U;
326
327 message->serialData = sds.B.SD;
328 message->messageId = sds.B.MID;
329 message->configBit = (IfxSent_ConfigBit)sds.B.CON;
330 message->crc = sds.B.SCRC;
331
332 return result;
333 }
IfxSent_Sent_InterruptNodeControl::serialDataReceiveInterruptNode
IfxSent_InterruptNodePointer serialDataReceiveInterruptNode
Specifies the interrupt node for sdi request.
Definition: IfxSent_Sent.h:446
IfxSent_Sent_Frame::timeStamp
uint32 timeStamp
Contains the timestamp of last received frame.
Definition: IfxSent_Sent.h:550
IfxSent_Sent_readChannelSerialMessageFrame
boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames
Definition: IfxSent_Sent.c:318
IfxSent_Sent_InterruptNodeControl::transferBufferUnderflowInterruptNode
IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode
Specifies the interrupt node for tbi request.
Definition: IfxSent_Sent.h:444
IfxSent_FrameCheckMode_pastSyncPulse
Specifies frame check mode against past sync pulse.
Definition: IfxSent.h:153
IfxSent_getChannelSrc
IFX_INLINE volatile Ifx_SRC_SRCR * IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
gets the source for channel interrupt handler
Definition: IfxSent.h:608
IfxSent_Sent_EnabledInterrupts::ALL
uint32 ALL
Specifies to write and read to/from all flags as once via the ALL member.
Definition: IfxSent_Sent.h:410
IfxSent_Sent_TransmitControl::spcMode
IfxSent_SpcMode spcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent_Sent.h:501
IfxSent_Sent_SerialMessageFrame
Specifies received message frame.
Definition: IfxSent_Sent.h:556
IfxSent_Sent_ReceiveControl::suspendTriggered
boolean suspendTriggered
Specifies the suspend trigger disables the channel or not.
Definition: IfxSent_Sent.h:487
IfxSent_Sent_SerialMessageFrame::messageId
uint8 messageId
Contains the received message ID value.
Definition: IfxSent_Sent.h:559
IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel.
Definition: IfxSent_Sent.h:547
IfxSent_resetModule
void IfxSent_resetModule(Ifx_SENT *sent)
Resets the SENT module.
Definition: IfxSent.c:128
IfxSent_Sent_NibbleControl::nibblePointer2
IfxSent_Nibble nibblePointer2
Specifies the received nibble2 control.
Definition: IfxSent_Sent.h:456
IfxSent_Sent_ReceiveControl::serialDataDisabledCrcDisabled
boolean serialDataDisabledCrcDisabled
Specifies the CRC disable for serial data disabled mode.
Definition: IfxSent_Sent.h:483
IfxSent_Sent_NibbleControl::nibblePointer5
IfxSent_Nibble nibblePointer5
Specifies the received nibble5 control.
Definition: IfxSent_Sent.h:459
IfxSent_Nibble_2
Specifies receive data target nibble pointer to nibble 2.
Definition: IfxSent.h:179
IfxSent_Sent_InputOutputControl::triggerMonitorCleared
boolean triggerMonitorCleared
Specifies the trigger monitor reset.
Definition: IfxSent_Sent.h:423
IfxSent_Sent_InputOutputControl::digitalGlitchFilterDepth
IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth
Specifies the Digital Glitch Filter depth for input signal delay.
Definition: IfxSent_Sent.h:424
IfxSent_InterruptNodePointer_0
Specifies interrupt requested node 0.
Definition: IfxSent.h:161
IfxSent_Sent_ChannelConfig::spcModeOn
boolean spcModeOn
Specifies the SENT SPC mode enable/disable.
Definition: IfxSent_Sent.h:532
IfxSent_Sent_InterruptNodeControl::watchdogErrorInterruptNode
IfxSent_InterruptNodePointer watchdogErrorInterruptNode
Specifies the interrupt node for wdi request.
Definition: IfxSent_Sent.h:447
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxSent_Sent_InterruptNodeControl::transferDataInterruptNode
IfxSent_InterruptNodePointer transferDataInterruptNode
Specifies the interrupt node for tdi request.
Definition: IfxSent_Sent.h:443
IfxSent_enableChannel
IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Enable the channel with the channel number.
Definition: IfxSent.h:573
IfxSent_Nibble_4
Specifies receive data target nibble pointer to nibble 4.
Definition: IfxSent.h:181
IfxSent_Sent_InterruptNodeControl::receiveBufferOverflowInterruptNode
IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode
Specifies the interrupt node for rbi request.
Definition: IfxSent_Sent.h:442
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxSent_Sent_Pins::inMode
IfxPort_InputMode inMode
Specifies input pin mode.
Definition: IfxSent_Sent.h:469
IFXSENT_CFG_CHANNEL_INTEN
#define IFXSENT_CFG_CHANNEL_INTEN
Specifies all interrupt events.
Definition: IfxSent_cfg.h:46
IfxSent_Nibble_0
Specifies receive data target nibble pointer to nibble 0.
Definition: IfxSent.h:177
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxSent_ExternalTrigger_0
Specifies the external trigger line 0.
Definition: IfxSent.h:137
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:39
IfxSent_Sent_Channel::driver
IfxSent_Sent * driver
Specifies the pointer to SENT module handler.
Definition: IfxSent_Sent.h:512
IfxSent_Sent_NibbleControl::nibblePointer3
IfxSent_Nibble nibblePointer3
Specifies the received nibble3 control.
Definition: IfxSent_Sent.h:457
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:48
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxSent_Sent_TransmitControl::triggerSource
IfxSent_TriggerSource triggerSource
Specifies the trigger source and mode.
Definition: IfxSent_Sent.h:499
IfxSent_Sent_InputOutputControl::outputPulsePolarityHigh
boolean outputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:419
IfxSent_initSpcPin
IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
Initializes a SPC output.
Definition: IfxSent.h:625
IfxSent_Sent_deInitModule
void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
Reset the SENT module.
Definition: IfxSent_Sent.c:36
IfxSent_Sent_Interrupt::priority
uint16 priority
Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.
Definition: IfxSent_Sent.h:432
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure.
Definition: IfxSent_Sent.h:519
IfxSent_Sent_Config
Specifies the SENT module configuration structure.
Definition: IfxSent_Sent.h:538
IfxSent_Sent_initModuleConfig
void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration.
Definition: IfxSent_Sent.c:291
IfxSent_Sent::sent
Ifx_SENT * sent
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:403
IfxSent_Sent_Config::module
Ifx_SENT * module
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:540
IfxSent_Nibble_1
Specifies receive data target nibble pointer to nibble 1.
Definition: IfxSent.h:178
IfxSent_Sent_NibbleControl::nibblePointer6
IfxSent_Nibble nibblePointer6
Specifies the received nibble6 control.
Definition: IfxSent_Sent.h:460
IfxSent_Sent_ReceiveControl::serialDataProcessingEnabled
boolean serialDataProcessingEnabled
Specifies the serial data processing mode.
Definition: IfxSent_Sent.h:482
IfxSent_Sent_Frame::data
uint32 data
Contains the data from last received frame.
Definition: IfxSent_Sent.h:549
IfxSent_Sent_Pins::in
IFX_CONST IfxSent_Sent_In * in
Specifies input pin configuration.
Definition: IfxSent_Sent.h:468
IfxSent_Sent
Specifies SENT handle structure.
Definition: IfxSent_Sent.h:401
IfxSent_Sent_NibbleControl::nibblePointer0
IfxSent_Nibble nibblePointer0
Specifies the received nibble0 control.
Definition: IfxSent_Sent.h:454
IfxSent_Sent_ReceiveControl::alternateCrcSelected
boolean alternateCrcSelected
Specifies the CRC is calculated for both fast and serial messages.
Definition: IfxSent_Sent.h:481
IfxSent_Sent_ReceiveControl::frameCheckMode
IfxSent_FrameCheckMode frameCheckMode
Specifies the frame check mode for valid frame.
Definition: IfxSent_Sent.h:489
IfxSent_Sent_ChannelConfig::interuptNodeControl
IfxSent_Sent_InterruptNodeControl interuptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:527
IfxSent_Sent_Pins::outMode
IfxPort_OutputMode outMode
Specifies output pin mode.
Definition: IfxSent_Sent.h:471
IfxSent_Sent_Pins::out
IFX_CONST IfxSent_Spc_Out * out
Specifies output pin configuration.
Definition: IfxSent_Sent.h:470
IfxSent_Sent.h
SENT SENT details.
IfxSent_Sent_ReceiveControl::frameLength
uint8 frameLength
Specifies frame length in nibbles.
Definition: IfxSent_Sent.h:488
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
IfxSent_Sent_ReceiveControl::endPulseIgnored
boolean endPulseIgnored
Specifies the pause pulse during synchronization.
Definition: IfxSent_Sent.h:486
IfxSent_Sent_initChannelConfig
void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration.
Definition: IfxSent_Sent.c:196
IfxSent_Sent_InputOutputControl::glitchRisingCleared
boolean glitchRisingCleared
Specifies the glitch rising edge clear.
Definition: IfxSent_Sent.h:422
IfxSent_Sent_ReceiveControl::driftErrorsDisabled
boolean driftErrorsDisabled
Specifies the drift errors enabled or disabled.
Definition: IfxSent_Sent.h:485
IfxSent_Sent_ChannelConfig::enabledInterrupts
IfxSent_Sent_EnabledInterrupts enabledInterrupts
Definition: IfxSent_Sent.h:533
IfxSent_DigitalGlitchesLength_2
Specifies 2 port input samples.
Definition: IfxSent.h:109
IfxSent_Sent_InterruptNodeControl::receiveDataInterruptNode
IfxSent_InterruptNodePointer receiveDataInterruptNode
Specifies the interrupt node for rdi request.
Definition: IfxSent_Sent.h:441
IfxSent_Sent_TransmitControl::pulseDelayLength
uint8 pulseDelayLength
Specifies the pulse delay length.
Definition: IfxSent_Sent.h:498
IfxSent_disableChannel
IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Disable the channel with the channel number.
Definition: IfxSent.h:558
IfxSent_Sent_ChannelConfig::inputOutputControl
IfxSent_Sent_InputOutputControl inputOutputControl
Specifies the input output controllable properties.
Definition: IfxSent_Sent.h:524
IfxSent_Sent_ChannelConfig::receiveControl
IfxSent_Sent_ReceiveControl receiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:525
IfxSent_Nibble_5
Specifies receive data target nibble pointer to nibble 5.
Definition: IfxSent.h:182
IfxSent_Sent_Config::timeStampPreDivider
uint32 timeStampPreDivider
Specifies the pre-divider to get clock in time stamp.
Definition: IfxSent_Sent.h:542
IfxSent_Sent_ChannelConfig::watchDogTimerLimit
uint16 watchDogTimerLimit
Speciifes the enabled interrupts for each Channel.
Definition: IfxSent_Sent.h:522
IfxSent_Sent_ChannelConfig::transmitControl
IfxSent_Sent_TransmitControl transmitControl
Specifies the transmit control properties.
Definition: IfxSent_Sent.h:526
IfxSent_ClockDividerMode_normal
Specifies clock normal divider mode.
Definition: IfxSent.h:91
IfxSent_ChannelId_none
None Sent channels.
Definition: IfxSent_cfg.h:74
IfxSent_Sent_SerialMessageFrame::configBit
IfxSent_ConfigBit configBit
Contains the received configuration bit value.
Definition: IfxSent_Sent.h:561
IfxSent_Sent_ChannelConfig::pins
IFX_CONST IfxSent_Sent_Pins * pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:528
IfxSent_Sent_readChannelSerialDataFrame
boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register.
Definition: IfxSent_Sent.c:304
IfxSent_Sent_ReceiveControl::crcMethodDisabled
boolean crcMethodDisabled
Specifies the CRC with zero nibbles disabled or enabled.
Definition: IfxSent_Sent.h:480
IfxSent_Sent_InputOutputControl::edgeCounterCleared
boolean edgeCounterCleared
Specifies the edge counter reset.
Definition: IfxSent_Sent.h:420
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:97
IfxSent_Sent_TransmitControl::timeBase
IfxSent_TimeBase timeBase
Specifies the pulse time base.
Definition: IfxSent_Sent.h:500
IfxSent_Sent_InterruptNodeControl::errorInterruptNode
IfxSent_InterruptNodePointer errorInterruptNode
Specifies the interrupt node for erri request.
Definition: IfxSent_Sent.h:445
IfxSent_Sent_ReceiveControl::crcModeDisabled
boolean crcModeDisabled
Specifies the CRC mode disabled mode.
Definition: IfxSent_Sent.h:479
IfxSent_SpcMode_bidirectional
Specifies bidirectional transmit SPC mode.
Definition: IfxSent.h:202
IfxSent_Sent_SerialMessageFrame::crc
uint8 crc
Contains the received CRC value.
Definition: IfxSent_Sent.h:558
IfxSent_Sent_Channel
Specifies the SENT Channel handle structure.
Definition: IfxSent_Sent.h:510
IfxSent_Sent_ChannelConfig::channelId
IfxSent_ChannelId channelId
Specifies the SENT channel number.
Definition: IfxSent_Sent.h:523
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxSent_Sent_Channel::channel
Ifx_SENT_CH * channel
Specifies the pointer SENT channel registers.
Definition: IfxSent_Sent.h:513
IfxSent_Sent_Config::sleepModeEnabled
boolean sleepModeEnabled
Specifies SENT enable/disable.
Definition: IfxSent_Sent.h:541
IFXSENT_CFG_TIMEOUT_VALUE
#define IFXSENT_CFG_TIMEOUT_VALUE
Specifies timeout value in transmission.
Definition: IfxSent_cfg.h:54
IfxSent_Sent_InputOutputControl::externalTrigger
IfxSent_ExternalTrigger externalTrigger
Specifies the external trigger line source.
Definition: IfxSent_Sent.h:425
IfxSent_Nibble_7
Specifies receive data target nibble pointer to nibble 7.
Definition: IfxSent.h:184
IfxSent_ExtendedSerialFrameMode_standard
Specifies the standard serial frame structure.
Definition: IfxSent.h:129
IfxSent_Sent_NibbleControl::nibblePointer1
IfxSent_Nibble nibblePointer1
Specifies the received nibble1 control.
Definition: IfxSent_Sent.h:455
IfxSent_Sent_ChannelConfig::tUnit
float32 tUnit
desired unit time (f_tick), e.g. 3E-6 for 3 uS
Definition: IfxSent_Sent.h:529
IfxSent_Sent_TransmitControl::pulseLength
uint8 pulseLength
Specifies the pulse length in ticktimes.
Definition: IfxSent_Sent.h:497
IfxSent_Sent_InterruptNodeControl::receiveSuccessInterruptNode
IfxSent_InterruptNodePointer receiveSuccessInterruptNode
Specifies the interrupt node for rsi request.
Definition: IfxSent_Sent.h:440
IfxSent_Sent_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad driver mode definition.
Definition: IfxSent_Sent.h:472
IfxSent_setTimeStampPredivider
IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
Set the module time stamp pre-divider.
Definition: IfxSent.h:685
IfxSent_initializeChannelUnitTime
void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
Initializes the desired unit time (f_tick) for the external SENT device connected to the given channe...
Definition: IfxSent.c:86
IfxSent_Sent_SerialMessageFrame::serialData
uint16 serialData
Contains the received serial data value.
Definition: IfxSent_Sent.h:560
IfxSent_initializeModuleClock
void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
Initialize and get the clock for SENT kernel.
Definition: IfxSent.c:118
IfxSent_Sent_NibbleControl::nibblePointer7
IfxSent_Nibble nibblePointer7
Specifies the received nibble7 control.
Definition: IfxSent_Sent.h:461
IfxSent_Sent_ChannelConfig::nibbleControl
IfxSent_Sent_NibbleControl nibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:530
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:66
IfxSent_Sent_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Specifies the interrupt service provider. CPU or DMA.
Definition: IfxSent_Sent.h:433
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxSent_Sent_ChannelConfig::interrupt
IfxSent_Sent_Interrupt interrupt
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:531
IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:466
IfxSent_Sent_InputOutputControl::glitchFallingCleared
boolean glitchFallingCleared
Specifies the glitch falling edge clear.
Definition: IfxSent_Sent.h:421
IfxSent_Sent_ReceiveControl::statusNibbleEnabled
boolean statusNibbleEnabled
Specifies the status nibble to include in CRC.
Definition: IfxSent_Sent.h:484
IfxSent_Sent_initChannel
boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxSent_Sent.c:46
IfxSent_initSentPin
IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
Initializes a SENT input.
Definition: IfxSent.h:614
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxSent_Sent_NibbleControl::nibblePointer4
IfxSent_Nibble nibblePointer4
Specifies the received nibble4 control.
Definition: IfxSent_Sent.h:458
IfxSent_Sent_Frame::statusNibble
uint8 statusNibble
Contains the status and communication Nibble of last received frame.
Definition: IfxSent_Sent.h:551
IfxSent_Nibble_6
Specifies receive data target nibble pointer to nibble 6.
Definition: IfxSent.h:183
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxSent_Sent_InputOutputControl::inputPulsePolarityHigh
boolean inputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:418
IfxSent_Sent_initModule
boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation.
Definition: IfxSent_Sent.c:265
IfxSent_isModuleEnabled
IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
Return TRUE if SENT module is enabled.
Definition: IfxSent.h:697
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxSent_Sent_ReceiveControl::extendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode
Specifies the extended serial frame mode.
Definition: IfxSent_Sent.h:490
IfxSent_enableModule
IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
Enable the SENT module.
Definition: IfxSent.h:579
IfxSent_Nibble_3
Specifies receive data target nibble pointer to nibble 3.
Definition: IfxSent.h:180


iLLD_TC26B: IfxSent_Sent.h Source File

  • Sent
  • Sent
IfxSent_Sent.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent_Sent.h
3 * \brief SENT SENT details
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Sent_Sent_Usage How to use the SENT Interface driver?
26 * \ingroup IfxLld_Sent
27 *
28 * This SENT interface driver provides functions to communicate with external sensors.
29 *
30 * \section IfxLld_Sent_Sent_Preparation Preparation
31 * \subsection IfxLld_Sent_Sent_Include Include Files
32 *
33 * Include following header file into your C code:
34 * \code
35 * #include <Sent/Sent/IfxSent_Sent.h>
36 *
37 * \endcode
38 *
39 * \subsection IfxLld_Sent_Sent_Variables Variables
40 *
41 * Declare SENT module and channel handles as global variables in your C code.
42 * If multiple SENT channels should be serviced, it makes sense to declare the SENT channel handle as an array:
43 * \code
44 * #define TESTED_SENT_CHANNELS 3
45 *
46 * static IfxSent_Sent sent;
47 * static IfxSent_Sent_Channel sentChannel[TESTED_SENT_CHANNELS];
48 * \endcode
49 *
50 * \subsection IfxLld_Sent_Sent_Interrupt Interrupt Handler Installation
51 *
52 * See also \ref IfxLld_Cpu_Irq_Usage
53 *
54 * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
55 * \code
56 * #define IFX_INTPRIO_SENT_CHANNEL 1
57 * \endcode
58 *
59 * Add the interrupt service routine to your C code. It has to call the SENT interrupt handler by passing the SENT channel handle:
60 * \code
61 * void SentInterruptHandler(IfxSent_Sent_Channel *channel);
62 *
63 * IFX_INTERRUPT(sentChannelISR, 0, IFX_INTPRIO_SENT_CHANNEL)
64 * {
65 * int i;
66 *
67 * for(i=0; i<TESTED_SENT_CHANNELS; ++i)
68 * {
69 * SentInterruptHandler(&sentChannel[i]);
70 * }
71 * }
72 * \endcode
73 *
74 * Note: the SentInterruptHandler function is not part of the interface driver, but has to be
75 * implemented in the application. A template can be found below under \ref IfxLld_Sent_Sent_ISR
76 *
77 * Finally install the interrupt handlers in your initialisation function:
78 * \code
79 * // install interrupt handler
80 * IfxCpu_Irq_installInterruptHandler(&sentChannelISR, IFX_INTPRIO_SENT_CHANNEL);
81 * IfxCpu_enableInterrupts();
82 * \endcode
83 *
84 *
85 * \subsection IfxLld_Sent_Sent_Init Module Initialisation
86 *
87 * The module initialisation can be done in the same function.
88 * Here an example for SENT and SPC mode:
89 *
90 * \code
91 * // create module config
92 * IfxSent_Sent_Config sentConfig;
93 * IfxSent_Sent_initModuleConfig(&sentConfig, &MODULE_SENT);
94 *
95 * // initialize module
96 * //IfxSent_Sent sent; // defined globally
97 * IfxSent_Sent_initModule(&sent, &sentConfig);
98 * \endcode
99 *
100 * \subsection IfxLld_Sent_Sent_InitChannel Channel Initialisation
101 * After the module has been initialized, one or more SENT channels can be configured.
102 *
103 * Here an example for three SENT channels in SENT and SPC mode:
104 * \code
105 * // create channel config
106 * IfxSent_Sent_ChannelConfig sentChannelConfig;
107 * IfxSent_Sent_initChannelConfig(&sentChannelConfig, &sent);
108 *
109 * // define tUnit of the external sensor
110 * sentChannelConfig.tUnit = 3.0E-6;
111 *
112 * // ISR priorities and interrupt target
113 * sentChannelConfig.interrupt.priority = IFX_INTPRIO_SENT_CHANNEL;
114 * sentChannelConfig.interrupt.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
115 *
116 * int i;
117 * for(i=0; i<TESTED_SENT_CHANNELS; ++i)
118 * {
119 * // pin configuration
120 * const IfxSent_Sent_Pins sentPins[TESTED_SENT_CHANNELS] =
121 * {
122 * { // Channel 0
123 * &IfxSent_SENT0C_P02_8_IN, IfxPort_InputMode_noPullDevice, // SENT input
124 * &IfxSent_SPC0_P00_1_OUT, IfxPort_OutputMode_openDrain, // SENT output
125 * IfxPort_PadDriver_cmosAutomotiveSpeed1
126 * },
127 *
128 * { // Channel 1
129 * &IfxSent_SENT1C_P02_7_IN, IfxPort_InputMode_noPullDevice, // SENT input
130 * &IfxSent_SPC1_P02_7_OUT, IfxPort_OutputMode_openDrain, // SENT output
131 * IfxPort_PadDriver_cmosAutomotiveSpeed1
132 * },
133 *
134 * { // Channel 2
135 * &IfxSent_SENT2C_P02_6_IN, IfxPort_InputMode_noPullDevice, // SENT input
136 * &IfxSent_SPC2_P00_3_OUT, IfxPort_OutputMode_openDrain, // SENT output
137 * IfxPort_PadDriver_cmosAutomotiveSpeed1
138 * },
139 * };
140 *
141 * sentChannelConfig.pins = &sentPins[i];
142 *
143 * // set channel
144 * sentChannelConfig.channelId = (IfxSent_ChannelId)i;
145 *
146 * // initialize channel
147 * IfxSent_Sent_initChannel(&sentChannel[i], &sentChannelConfig);
148 * }
149 * \endcode
150 *
151 * \subsection IfxLld_Sent_Sent_ISR Interrupt Service Handler
152 * The ISR has to be implemented in the application. Following template can be used
153 * to react on the events:
154 *
155 * \code
156 * void SentInterruptHandler(IfxSent_Sent_Channel *channel)
157 * {
158 * Ifx_SENT_CH_INTSTAT interruptStatus = IfxSent_Sent_getAndClearInterruptStatus(channel);
159 *
160 * if( interruptStatus.U )
161 * {
162 * // check for error conditions
163 * if (interruptStatus.U & IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS)
164 * {
165 * // * Receive Buffer Overflow
166 * // * This bit is set after a frame has been received while the old one was
167 * // * not read from RDRx. I.e. the kernel wants to set any of the two
168 * // * interrupts RSI and RDI and finds any of these two interrupts already
169 * // * set. The old data is overwritten by the new data.
170 * // *
171 * if (interruptStatus.B.RBI)
172 * {
173 * // insert your error handling code here
174 * __debug();
175 * }
176 *
177 * // * Transmit Buffer Underflow
178 * // * This bit is set after data has been completely transferred (PLEN
179 * // * exceeded) and no new data was written to SCRx.
180 * // *
181 * if (interruptStatus.B.TBI)
182 * {
183 * // insert your error handling code here
184 * __debug();
185 * }
186 *
187 * // * Frequency Range Error
188 * // * This bit is set after a Synchronization / Calibration pulse was
189 * // * received that deviates more than +- 25% from the nominal value.
190 * // * The referring data is ignored.
191 * // *
192 * if (interruptStatus.B.FRI)
193 * {
194 * // insert your error handling code here
195 * __debug();
196 * }
197 *
198 * // * Frequency Drift Error
199 * // * This bit is set after a subsequent Synchronization / Calibration
200 * // * pulse was received that deviates more than 1.5625% (1/64) from its
201 * // * predecessor.
202 * // *
203 * if (interruptStatus.B.FDI)
204 * {
205 * // insert your error handling code here
206 * __debug();
207 * }
208 *
209 * // * Wrong Number of Nibbles
210 * // * This bit is set after a more nibbles have been received than expected
211 * // * or a Synchronization / Calibration Pulse is received too early thus
212 * // * too few nibbles have been received
213 * // *
214 * if (interruptStatus.B.NNI)
215 * {
216 * // insert your error handling code here
217 * __debug();
218 * }
219 *
220 * // * Nibbles Value out of Range
221 * // * This bit is set after a too long or too short nibble pulse has been
222 * // * received. I.e. value < 0 or value > 15.
223 * // *
224 * if (interruptStatus.B.NVI)
225 * {
226 * // insert your error handling code here
227 * __debug();
228 * }
229 *
230 * // * CRC Error
231 * // * This bit is set if the CRC check fails.
232 * // *
233 * if (interruptStatus.B.CRCI)
234 * {
235 * // insert your error handling code here
236 * __debug();
237 * }
238 *
239 * // * Wrong Status and Communication Nibble Error
240 * // * In standard Serial Frame Mode (RCR.ESF is cleared), this bit is set
241 * // * if the Status and Communication nibble shows a start bit in a frame
242 * // * other than frame number n x 16.
243 * // * In Extended Serial Frame Mode this bit is without function.
244 * // *
245 * if (interruptStatus.B.WSI)
246 * {
247 * // insert your error handling code here
248 * __debug();
249 * }
250 *
251 * // * Serial Data CRC Error
252 * // * This bit is set if the CRC of the serial message fails.
253 * // * In Extended Serial Message Format, this includes a check of the Serial
254 * // * Communication Nibble for correct 0 values of bit 3 in frames 7, 13 and 18.
255 * // *
256 * if (interruptStatus.B.SCRI)
257 * {
258 * // insert your error handling code here
259 * __debug();
260 * }
261 *
262 * // * Watch Dog Error
263 * // * This bit is set if the Watch Dog Timer of the channel expires.
264 * // *
265 * if (interruptStatus.B.WDI)
266 * {
267 * // insert your error handling code here
268 * __debug();
269 * }
270 * }
271 *
272 * // transaction events
273 *
274 * // * Receive Data
275 * // * RDI is activated when a received frame is moved to a Receive Data
276 * // * Register RDR. Both RDI and RSI will be issued together in normal use
277 * // * cases where the frame size is not bigger than 8 nibbles and CRC is
278 * // * correct or not checked (if RCRx.CDIS is cleared).
279 * // *
280 * if (interruptStatus.B.RDI)
281 * {
282 * // * Ignore RDI bit, useful only when Frame Length is greater than
283 * // * 8 nibbles since it can indicate that end of frame
284 * // *
285 * }
286 *
287 * // * Receive Success
288 * // * This bit is set at the successfully received end of a frame.
289 * // * Depending on bit RCRx.CDIS this indicates a successful check of the CRC.
290 * // *
291 * if (interruptStatus.B.RSI)
292 * {
293 * // here you could handle the incoming frame:
294 * IfxSent_Sent_Frame frame;
295 * IfxSent_Sent_readChannelSerialDataFrame(channel, &frame);
296 *
297 * // do something with the incoming data
298 * }
299 *
300 * // * Transfer Data
301 * // * This bit is set after the trigger condition was detected. Data to be
302 * // * transferred has been moved internally. Thus a new value can be written
303 * // * to SCRx. This can be used for back to back transfers.
304 * // *
305 * if (interruptStatus.B.TDI)
306 * {
307 * }
308 *
309 * // * Serial Data Received
310 * // * This bit is set after all serial data bits have been received via the
311 * // * Status and Communication nibble. Depending on bit RCRx.SCDIS this
312 * // * indicates a successful check of the CRC.
313 * // *
314 * if (interruptStatus.B.SDI)
315 * {
316 * // here you could handle the incoming message:
317 *
318 * // decode incoming message
319 * IfxSent_Sent_SerialMessageFrame message;
320 * IfxSent_Sent_readChannelSerialMessageFrame(channel, &message);
321 *
322 * // do something with the incoming message
323 * }
324 * }
325 * }
326 * \endcode
327 *
328 * \subsection IfxLld_Sent_Sent_Frame Frame Decoding
329 * Following code snippet shows, how incoming data of a TLE4998S device can be decoded:
330 *
331 * \code
332 * static void parseSensorData(IfxSent_Sent_Frame *frame)
333 * {
334 * uint32 data = frame->data;
335 * uint8 statusNibble = frame->statusNibble;
336 *
337 * // select B range [mT]
338 * const uint8 rangeValTable[4] = { 200, 100, 50, 0 };
339 * uint8 rangeVal = rangeValTable[statusNibble & 3];
340 *
341 * uint16 hallVal = (short)((((data & 0xFFFF) * rangeVal) / 0x7FFF) - rangeVal);
342 * uint16 temperature = ((short)((data >> 16) & 0x00FF) - 55);
343 *
344 * // do something with the values here...
345 * }
346 * \endcode
347 *
348 * \defgroup IfxLld_Sent_Sent Interface Driver
349 * \ingroup IfxLld_Sent
350 * \defgroup IfxLld_Sent_Sent_Structures Data Structures
351 * \ingroup IfxLld_Sent_Sent
352 * \defgroup IfxLld_Sent_Sent_Module Module Functions
353 * \ingroup IfxLld_Sent_Sent
354 * \defgroup IfxLld_Sent_Sent_Channel Channel Functions
355 * \ingroup IfxLld_Sent_Sent
356 */
357
358 #ifndef IFXSENT_SENT_H
359 #define IFXSENT_SENT_H 1
360
361 /******************************************************************************/
362 /*----------------------------------Includes----------------------------------*/
363 /******************************************************************************/
364
365 #include "Scu/Std/IfxScuWdt.h"
366 #include "Sent/Std/IfxSent.h"
367 #include "Cpu/Irq/IfxCpu_Irq.h"
368
369 /******************************************************************************/
370 /*-----------------------------Data Structures--------------------------------*/
371 /******************************************************************************/
372
373 /** \addtogroup IfxLld_Sent_Sent_Structures
374 * \{ */
375 /** \brief Specifies the Interrupt type enables structure
376 */
377 typedef struct
378 {
379 uint8 receiveDataInterrupt; /**< \brief Specifies receive data interrupt enable */
380 uint8 receiveSuccessInterrupt; /**< \brief Specifies receive success interrupt enable */
381 uint8 receiveBufferOverflowInterrupt; /**< \brief Specifies receive buffer overflow interrupt enable */
382 uint8 transferDataInterrupt; /**< \brief Specifies transfer data interrupt enable */
383 uint8 transferBufferUnderflowInterrupt; /**< \brief Specifies transfer buffer underflow interrupt enable */
384 uint8 serialDataReceiveInterrupt; /**< \brief Specifies serial data interrupt enable */
385 uint8 watchdogErrorInterrupt; /**< \brief Specifies watchdog error interrupt enable */
386 uint8 serialDataCrcErrorInterrupt; /**< \brief Specifies serial data CRC error interrupt enable */
387 uint8 wrongStatusNibbleErrorInterrupt; /**< \brief Specifies wrong status nibble error interrupt enable */
388 uint8 crcErrorInterrupt; /**< \brief Specifies CRC error interrupt enable */
389 uint8 nibblesValueOutOfRangeErrorInterrupt; /**< \brief Specifies nibble value out of range error interrupt enable */
390 uint8 nibblesWrongErrorInterrupt; /**< \brief Specifies nibbles wrong error interrupt enable */
391 uint8 frequencyDriftErrorInterrupt; /**< \brief Specifies frequency drift error interrupt enable */
392 uint8 frequencyRangeErrorInterrupt; /**< \brief Specifies frequency not in the range error interrupt enable */
393 } IfxSent_Sent_Enable;
394
395 /** \} */
396
397 /** \addtogroup IfxLld_Sent_Sent_Structures
398 * \{ */
399 /** \brief Specifies SENT handle structure
400 */
401 typedef struct
402 {
403 Ifx_SENT *sent; /**< \brief Specifies pointer to SENT registers */
404 } IfxSent_Sent;
405
406 /** \brief Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member.
407 */
408 typedef union
409 {
410 uint32 ALL; /**< \brief Specifies to write and read to/from all flags as once via the ALL member. */
411 IfxSent_Sent_Enable enable; /**< \brief Structure contains the interrupt flags */
412 } IfxSent_Sent_EnabledInterrupts;
413
414 /** \brief Specifies the input output control properties
415 */
416 typedef struct
417 {
418 boolean inputPulsePolarityHigh; /**< \brief Specifies the polarity of input of each channel */
419 boolean outputPulsePolarityHigh; /**< \brief Specifies the polarity of input of each channel */
420 boolean edgeCounterCleared; /**< \brief Specifies the edge counter reset */
421 boolean glitchFallingCleared; /**< \brief Specifies the glitch falling edge clear */
422 boolean glitchRisingCleared; /**< \brief Specifies the glitch rising edge clear */
423 boolean triggerMonitorCleared; /**< \brief Specifies the trigger monitor reset */
424 IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth; /**< \brief Specifies the Digital Glitch Filter depth for input signal delay */
425 IfxSent_ExternalTrigger externalTrigger; /**< \brief Specifies the external trigger line source */
426 } IfxSent_Sent_InputOutputControl;
427
428 /** \brief Specifies the interrupt control properties
429 */
430 typedef struct
431 {
432 uint16 priority; /**< \brief Specifies the interrupt priority. Always 1 since all interrupts are handled at a time */
433 IfxSrc_Tos isrProvider; /**< \brief Specifies the interrupt service provider. CPU or DMA. */
434 } IfxSent_Sent_Interrupt;
435
436 /** \brief Specifies the interrupt control properties structure
437 */
438 typedef struct
439 {
440 IfxSent_InterruptNodePointer receiveSuccessInterruptNode; /**< \brief Specifies the interrupt node for rsi request */
441 IfxSent_InterruptNodePointer receiveDataInterruptNode; /**< \brief Specifies the interrupt node for rdi request */
442 IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode; /**< \brief Specifies the interrupt node for rbi request */
443 IfxSent_InterruptNodePointer transferDataInterruptNode; /**< \brief Specifies the interrupt node for tdi request */
444 IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode; /**< \brief Specifies the interrupt node for tbi request */
445 IfxSent_InterruptNodePointer errorInterruptNode; /**< \brief Specifies the interrupt node for erri request */
446 IfxSent_InterruptNodePointer serialDataReceiveInterruptNode; /**< \brief Specifies the interrupt node for sdi request */
447 IfxSent_InterruptNodePointer watchdogErrorInterruptNode; /**< \brief Specifies the interrupt node for wdi request */
448 } IfxSent_Sent_InterruptNodeControl;
449
450 /** \brief Specifies the received nibbles control properties
451 */
452 typedef struct
453 {
454 IfxSent_Nibble nibblePointer0; /**< \brief Specifies the received nibble0 control */
455 IfxSent_Nibble nibblePointer1; /**< \brief Specifies the received nibble1 control */
456 IfxSent_Nibble nibblePointer2; /**< \brief Specifies the received nibble2 control */
457 IfxSent_Nibble nibblePointer3; /**< \brief Specifies the received nibble3 control */
458 IfxSent_Nibble nibblePointer4; /**< \brief Specifies the received nibble4 control */
459 IfxSent_Nibble nibblePointer5; /**< \brief Specifies the received nibble5 control */
460 IfxSent_Nibble nibblePointer6; /**< \brief Specifies the received nibble6 control */
461 IfxSent_Nibble nibblePointer7; /**< \brief Specifies the received nibble7 control */
462 } IfxSent_Sent_NibbleControl;
463
464 /** \brief Specifies the pins configuration for SENT channel
465 */
466 typedef struct
467 {
468 IFX_CONST IfxSent_Sent_In *in; /**< \brief Specifies input pin configuration */
469 IfxPort_InputMode inMode; /**< \brief Specifies input pin mode */
470 IFX_CONST IfxSent_Spc_Out *out; /**< \brief Specifies output pin configuration */
471 IfxPort_OutputMode outMode; /**< \brief Specifies output pin mode */
472 IfxPort_PadDriver pinDriver; /**< \brief Pad driver mode definition */
473 } IfxSent_Sent_Pins;
474
475 /** \brief Specifies the receive control properties
476 */
477 typedef struct
478 {
479 boolean crcModeDisabled; /**< \brief Specifies the CRC mode disabled mode */
480 boolean crcMethodDisabled; /**< \brief Specifies the CRC with zero nibbles disabled or enabled */
481 boolean alternateCrcSelected; /**< \brief Specifies the CRC is calculated for both fast and serial messages */
482 boolean serialDataProcessingEnabled; /**< \brief Specifies the serial data processing mode */
483 boolean serialDataDisabledCrcDisabled; /**< \brief Specifies the CRC disable for serial data disabled mode */
484 boolean statusNibbleEnabled; /**< \brief Specifies the status nibble to include in CRC */
485 boolean driftErrorsDisabled; /**< \brief Specifies the drift errors enabled or disabled */
486 boolean endPulseIgnored; /**< \brief Specifies the pause pulse during synchronization */
487 boolean suspendTriggered; /**< \brief Specifies the suspend trigger disables the channel or not */
488 uint8 frameLength; /**< \brief Specifies frame length in nibbles */
489 IfxSent_FrameCheckMode frameCheckMode; /**< \brief Specifies the frame check mode for valid frame */
490 IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode; /**< \brief Specifies the extended serial frame mode */
491 } IfxSent_Sent_ReceiveControl;
492
493 /** \brief Specifies the SPC channel properties structure
494 */
495 typedef struct
496 {
497 uint8 pulseLength; /**< \brief Specifies the pulse length in ticktimes */
498 uint8 pulseDelayLength; /**< \brief Specifies the pulse delay length */
499 IfxSent_TriggerSource triggerSource; /**< \brief Specifies the trigger source and mode */
500 IfxSent_TimeBase timeBase; /**< \brief Specifies the pulse time base */
501 IfxSent_SpcMode spcMode; /**< \brief Specifies the SENT SPC operational mode */
502 } IfxSent_Sent_TransmitControl;
503
504 /** \} */
505
506 /** \addtogroup IfxLld_Sent_Sent_Structures
507 * \{ */
508 /** \brief Specifies the SENT Channel handle structure
509 */
510 typedef struct
511 {
512 IfxSent_Sent *driver; /**< \brief Specifies the pointer to SENT module handler */
513 Ifx_SENT_CH *channel; /**< \brief Specifies the pointer SENT channel registers */
514 IfxSent_ChannelId channelId; /**< \brief Specifies the SENT channel number */
515 } IfxSent_Sent_Channel;
516
517 /** \brief Specifies the SENT Channel configuration structure
518 */
519 typedef struct
520 {
521 IfxSent_Sent *driver; /**< \brief Specifies the pointer to SENT module handler */
522 uint16 watchDogTimerLimit; /**< \brief Speciifes the enabled interrupts for each Channel */
523 IfxSent_ChannelId channelId; /**< \brief Specifies the SENT channel number */
524 IfxSent_Sent_InputOutputControl inputOutputControl; /**< \brief Specifies the input output controllable properties */
525 IfxSent_Sent_ReceiveControl receiveControl; /**< \brief Specifies the receive control properties */
526 IfxSent_Sent_TransmitControl transmitControl; /**< \brief Specifies the transmit control properties */
527 IfxSent_Sent_InterruptNodeControl interuptNodeControl; /**< \brief Specifies the interrupt control properties structure */
528 IFX_CONST IfxSent_Sent_Pins *pins; /**< \brief Specifies the pins configuration for SENT channel */
529 float32 tUnit; /**< \brief desired unit time (f_tick), e.g. 3E-6 for 3 uS */
530 IfxSent_Sent_NibbleControl nibbleControl; /**< \brief Specifies the received nibbles control properties */
531 IfxSent_Sent_Interrupt interrupt; /**< \brief Specifies the interrupt control properties structure */
532 boolean spcModeOn; /**< \brief Specifies the SENT SPC mode enable/disable */
533 IfxSent_Sent_EnabledInterrupts enabledInterrupts;
534 } IfxSent_Sent_ChannelConfig;
535
536 /** \brief Specifies the SENT module configuration structure
537 */
538 typedef struct
539 {
540 Ifx_SENT *module; /**< \brief Specifies pointer to SENT registers */
541 boolean sleepModeEnabled; /**< \brief Specifies SENT enable/disable */
542 uint32 timeStampPreDivider; /**< \brief Specifies the pre-divider to get clock in time stamp */
543 } IfxSent_Sent_Config;
544
545 /** \brief Specifies the frame configuration structure for a channel
546 */
547 typedef struct
548 {
549 uint32 data; /**< \brief Contains the data from last received frame */
550 uint32 timeStamp; /**< \brief Contains the timestamp of last received frame */
551 uint8 statusNibble; /**< \brief Contains the status and communication Nibble of last received frame */
552 } IfxSent_Sent_Frame;
553
554 /** \brief Specifies received message frame
555 */
556 typedef struct
557 {
558 uint8 crc; /**< \brief Contains the received CRC value */
559 uint8 messageId; /**< \brief Contains the received message ID value */
560 uint16 serialData; /**< \brief Contains the received serial data value */
561 IfxSent_ConfigBit configBit; /**< \brief Contains the received configuration bit value */
562 } IfxSent_Sent_SerialMessageFrame;
563
564 /** \} */
565
566 /** \addtogroup IfxLld_Sent_Sent_Module
567 * \{ */
568
569 /******************************************************************************/
570 /*-------------------------Global Function Prototypes-------------------------*/
571 /******************************************************************************/
572
573 /** \brief Reset the SENT module
574 * \param driver pointer to the SENT module handler
575 * \return None
576 */
577 IFX_EXTERN void IfxSent_Sent_deInitModule(IfxSent_Sent *driver);
578
579 /** \brief Initialise the SENT with the supplied configureation
580 * \param driver pointer to the SENT module handler
581 * \param config pointer to the SENT module configuration
582 * \return TRUE if valid configuration otherwise FALSE
583 *
584 * Usage example: see \ref IfxLld_Sent_Sent_Usage
585 *
586 */
587 IFX_EXTERN boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config);
588
589 /** \brief Initialise buffer with default SENT configuration
590 * \param config pointer to the SENT module configuration
591 * \param sent base address of the SENT register space
592 * \return None
593 *
594 * Usage example: see \ref IfxLld_Sent_Sent_Usage
595 *
596 */
597 IFX_EXTERN void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent);
598
599 /** \} */
600
601 /** \addtogroup IfxLld_Sent_Sent_Channel
602 * \{ */
603
604 /******************************************************************************/
605 /*-------------------------Inline Function Prototypes-------------------------*/
606 /******************************************************************************/
607
608 /** \brief Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.
609 *
610 * This function should be used in an ISR to retrieve the events which triggered the interrupt.
611 * \param channel Specifies the SENT Channel handle structure
612 * \return Interrupt flags which have been cleared.
613 *
614 * Usage example: see \ref IfxLld_Sent_Sent_Usage
615 *
616 */
617 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel);
618
619 /******************************************************************************/
620 /*-------------------------Global Function Prototypes-------------------------*/
621 /******************************************************************************/
622
623 /** \brief Initialize the channel with the supplied configuration
624 * \param channel pointer to the SENT channel
625 * \param config pointer to the SENT channel configuration
626 * \return TRUE if valid configuration otherwise FALSE
627 *
628 * Usage example: see \ref IfxLld_Sent_Sent_Usage
629 *
630 */
631 IFX_EXTERN boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config);
632
633 /** \brief Initialise channel buffer with default SENT channel configuration
634 * \param config pointer to the SENT channel configuration
635 * \param driver pointer to the SENT module handler
636 * \return None
637 *
638 * Usage example: see \ref IfxLld_Sent_Sent_Usage
639 *
640 */
641 IFX_EXTERN void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver);
642
643 /** \brief Reads the nibbles recieved in the Data register
644 * \param channel SENT Channel whose data has to be read
645 * \param frame Data read from the SENT Channel
646 * \return TRUE if data received otherwise false
647 *
648 * Usage example: see \ref IfxLld_Sent_Sent_Usage
649 *
650 */
651 IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame);
652
653 /** \brief reads the Serial data recieved and collected over several SENT frames
654 * \param channel reads the Serial data recieved and collected over several SENT frames
655 * \param message Data pointer pointing to the serial data read from the SENT Channel
656 * \return TRUE if serial message received otherwise false
657 *
658 * Usage example: see \ref IfxLld_Sent_Sent_Usage
659 *
660 */
661 IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message);
662
663 /** \} */
664
665 /******************************************************************************/
666 /*---------------------Inline Function Implementations------------------------*/
667 /******************************************************************************/
668
669 IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel)
670 {
671 return IfxSent_getAndClearInterruptStatus(channel->driver->sent, channel->channelId);
672 }
673
674
675 #endif /* IFXSENT_SENT_H */
IfxSent_Sent_InterruptNodeControl::serialDataReceiveInterruptNode
IfxSent_InterruptNodePointer serialDataReceiveInterruptNode
Specifies the interrupt node for sdi request.
Definition: IfxSent_Sent.h:446
IfxSent_Sent_Frame::timeStamp
uint32 timeStamp
Contains the timestamp of last received frame.
Definition: IfxSent_Sent.h:550
IfxSent_FrameCheckMode
IfxSent_FrameCheckMode
SENT.CH[channelId].RCR.CFC, Specifies received frame check mode.
Definition: IfxSent.h:151
IfxSent_Sent_readChannelSerialMessageFrame
IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
reads the Serial data recieved and collected over several SENT frames
Definition: IfxSent_Sent.c:318
IfxSent_Sent_Enable
Specifies the Interrupt type enables structure.
Definition: IfxSent_Sent.h:377
IfxSent_Sent_InterruptNodeControl::transferBufferUnderflowInterruptNode
IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode
Specifies the interrupt node for tbi request.
Definition: IfxSent_Sent.h:444
IfxSent_Sent_EnabledInterrupts::ALL
uint32 ALL
Specifies to write and read to/from all flags as once via the ALL member.
Definition: IfxSent_Sent.h:410
IfxSent_Sent_TransmitControl::spcMode
IfxSent_SpcMode spcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent_Sent.h:501
IfxSent_Sent_Enable::nibblesWrongErrorInterrupt
uint8 nibblesWrongErrorInterrupt
Specifies nibbles wrong error interrupt enable.
Definition: IfxSent_Sent.h:390
IfxSent_Sent_Enable::crcErrorInterrupt
uint8 crcErrorInterrupt
Specifies CRC error interrupt enable.
Definition: IfxSent_Sent.h:388
IfxSent_Sent_SerialMessageFrame
Specifies received message frame.
Definition: IfxSent_Sent.h:556
IfxSent_Sent_ReceiveControl::suspendTriggered
boolean suspendTriggered
Specifies the suspend trigger disables the channel or not.
Definition: IfxSent_Sent.h:487
IfxSent_Sent_SerialMessageFrame::messageId
uint8 messageId
Contains the received message ID value.
Definition: IfxSent_Sent.h:559
IfxSent_Sent_Frame
Specifies the frame configuration structure for a channel.
Definition: IfxSent_Sent.h:547
IfxSent_Sent_NibbleControl::nibblePointer2
IfxSent_Nibble nibblePointer2
Specifies the received nibble2 control.
Definition: IfxSent_Sent.h:456
IfxSent_Sent_ReceiveControl::serialDataDisabledCrcDisabled
boolean serialDataDisabledCrcDisabled
Specifies the CRC disable for serial data disabled mode.
Definition: IfxSent_Sent.h:483
IfxSent_Sent_NibbleControl::nibblePointer5
IfxSent_Nibble nibblePointer5
Specifies the received nibble5 control.
Definition: IfxSent_Sent.h:459
IfxSent_Sent_TransmitControl
Specifies the SPC channel properties structure.
Definition: IfxSent_Sent.h:495
IfxSent_InterruptNodePointer
IfxSent_InterruptNodePointer
SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for ...
Definition: IfxSent.h:159
IfxSent_Sent_Enable::receiveBufferOverflowInterrupt
uint8 receiveBufferOverflowInterrupt
Specifies receive buffer overflow interrupt enable.
Definition: IfxSent_Sent.h:381
IfxSent_Sent_InputOutputControl::triggerMonitorCleared
boolean triggerMonitorCleared
Specifies the trigger monitor reset.
Definition: IfxSent_Sent.h:423
IfxSent_Sent_InputOutputControl::digitalGlitchFilterDepth
IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth
Specifies the Digital Glitch Filter depth for input signal delay.
Definition: IfxSent_Sent.h:424
IfxSent_Sent_ChannelConfig::spcModeOn
boolean spcModeOn
Specifies the SENT SPC mode enable/disable.
Definition: IfxSent_Sent.h:532
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxSent_Sent_InterruptNodeControl::watchdogErrorInterruptNode
IfxSent_InterruptNodePointer watchdogErrorInterruptNode
Specifies the interrupt node for wdi request.
Definition: IfxSent_Sent.h:447
float32
float float32
Definition: Platform_Types.h:167
IfxSent_Sent_EnabledInterrupts::enable
IfxSent_Sent_Enable enable
Structure contains the interrupt flags.
Definition: IfxSent_Sent.h:411
IfxSent_Sent_InterruptNodeControl::transferDataInterruptNode
IfxSent_InterruptNodePointer transferDataInterruptNode
Specifies the interrupt node for tdi request.
Definition: IfxSent_Sent.h:443
IfxSent_Sent_InterruptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:438
IfxSent_Sent_InterruptNodeControl::receiveBufferOverflowInterruptNode
IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode
Specifies the interrupt node for rbi request.
Definition: IfxSent_Sent.h:442
IfxSent_Sent_Interrupt
Specifies the interrupt control properties.
Definition: IfxSent_Sent.h:430
IfxSent_Sent_Pins::inMode
IfxPort_InputMode inMode
Specifies input pin mode.
Definition: IfxSent_Sent.h:469
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxSent_Sent_In
SENT pin mapping structure.
Definition: IfxSent_PinMap.h:39
IfxSent_Sent_Channel::driver
IfxSent_Sent * driver
Specifies the pointer to SENT module handler.
Definition: IfxSent_Sent.h:512
IfxSent_Sent_Enable::wrongStatusNibbleErrorInterrupt
uint8 wrongStatusNibbleErrorInterrupt
Specifies wrong status nibble error interrupt enable.
Definition: IfxSent_Sent.h:387
IfxSent_Sent_Enable::watchdogErrorInterrupt
uint8 watchdogErrorInterrupt
Specifies watchdog error interrupt enable.
Definition: IfxSent_Sent.h:385
IfxSent_Sent_NibbleControl::nibblePointer3
IfxSent_Nibble nibblePointer3
Specifies the received nibble3 control.
Definition: IfxSent_Sent.h:457
IfxSent_Spc_Out
SPC pin mapping structure.
Definition: IfxSent_PinMap.h:48
IfxSent_Sent_TransmitControl::triggerSource
IfxSent_TriggerSource triggerSource
Specifies the trigger source and mode.
Definition: IfxSent_Sent.h:499
IfxSent_Sent_InputOutputControl::outputPulsePolarityHigh
boolean outputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:419
IfxSent_Sent_Enable::transferBufferUnderflowInterrupt
uint8 transferBufferUnderflowInterrupt
Specifies transfer buffer underflow interrupt enable.
Definition: IfxSent_Sent.h:383
IfxScuWdt.h
SCU basic functionality.
IfxSent_Sent_deInitModule
IFX_EXTERN void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
Reset the SENT module.
Definition: IfxSent_Sent.c:36
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxSent_Sent_Interrupt::priority
uint16 priority
Specifies the interrupt priority. Always 1 since all interrupts are handled at a time.
Definition: IfxSent_Sent.h:432
IfxSent_Sent_ChannelConfig
Specifies the SENT Channel configuration structure.
Definition: IfxSent_Sent.h:519
IfxSent_Sent_Config
Specifies the SENT module configuration structure.
Definition: IfxSent_Sent.h:538
IfxSent_Sent_initModuleConfig
IFX_EXTERN void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
Initialise buffer with default SENT configuration.
Definition: IfxSent_Sent.c:291
IfxSent_Sent_Enable::frequencyDriftErrorInterrupt
uint8 frequencyDriftErrorInterrupt
Specifies frequency drift error interrupt enable.
Definition: IfxSent_Sent.h:391
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxSent_Sent::sent
Ifx_SENT * sent
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:403
IfxSent_Sent_Config::module
Ifx_SENT * module
Specifies pointer to SENT registers.
Definition: IfxSent_Sent.h:540
IfxSent_Sent_NibbleControl::nibblePointer6
IfxSent_Nibble nibblePointer6
Specifies the received nibble6 control.
Definition: IfxSent_Sent.h:460
IfxSent_Sent_ReceiveControl::serialDataProcessingEnabled
boolean serialDataProcessingEnabled
Specifies the serial data processing mode.
Definition: IfxSent_Sent.h:482
IfxSent_Sent_Frame::data
uint32 data
Contains the data from last received frame.
Definition: IfxSent_Sent.h:549
IfxSent_Sent_Pins::in
IFX_CONST IfxSent_Sent_In * in
Specifies input pin configuration.
Definition: IfxSent_Sent.h:468
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxSent_Sent
Specifies SENT handle structure.
Definition: IfxSent_Sent.h:401
IfxSent_Sent_NibbleControl::nibblePointer0
IfxSent_Nibble nibblePointer0
Specifies the received nibble0 control.
Definition: IfxSent_Sent.h:454
IfxSent_Sent_ReceiveControl::alternateCrcSelected
boolean alternateCrcSelected
Specifies the CRC is calculated for both fast and serial messages.
Definition: IfxSent_Sent.h:481
IfxSent_Sent_ReceiveControl::frameCheckMode
IfxSent_FrameCheckMode frameCheckMode
Specifies the frame check mode for valid frame.
Definition: IfxSent_Sent.h:489
IfxSent_Sent_ChannelConfig::interuptNodeControl
IfxSent_Sent_InterruptNodeControl interuptNodeControl
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:527
IfxSent_Sent_Pins::outMode
IfxPort_OutputMode outMode
Specifies output pin mode.
Definition: IfxSent_Sent.h:471
IfxSent_Sent_Pins::out
IFX_CONST IfxSent_Spc_Out * out
Specifies output pin configuration.
Definition: IfxSent_Sent.h:470
IfxSent_Sent_ReceiveControl::frameLength
uint8 frameLength
Specifies frame length in nibbles.
Definition: IfxSent_Sent.h:488
IfxSent_Sent_Enable::receiveDataInterrupt
uint8 receiveDataInterrupt
Specifies receive data interrupt enable.
Definition: IfxSent_Sent.h:379
IfxSent_Sent_ReceiveControl::endPulseIgnored
boolean endPulseIgnored
Specifies the pause pulse during synchronization.
Definition: IfxSent_Sent.h:486
IfxSent_Sent_initChannelConfig
IFX_EXTERN void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
Initialise channel buffer with default SENT channel configuration.
Definition: IfxSent_Sent.c:196
IfxSent_Sent_InputOutputControl::glitchRisingCleared
boolean glitchRisingCleared
Specifies the glitch rising edge clear.
Definition: IfxSent_Sent.h:422
IfxSent_Sent_ReceiveControl::driftErrorsDisabled
boolean driftErrorsDisabled
Specifies the drift errors enabled or disabled.
Definition: IfxSent_Sent.h:485
IfxSent_Sent_ChannelConfig::enabledInterrupts
IfxSent_Sent_EnabledInterrupts enabledInterrupts
Definition: IfxSent_Sent.h:533
IfxSent_Sent_InterruptNodeControl::receiveDataInterruptNode
IfxSent_InterruptNodePointer receiveDataInterruptNode
Specifies the interrupt node for rdi request.
Definition: IfxSent_Sent.h:441
IfxSent_Sent_TransmitControl::pulseDelayLength
uint8 pulseDelayLength
Specifies the pulse delay length.
Definition: IfxSent_Sent.h:498
IfxSent_ExternalTrigger
IfxSent_ExternalTrigger
SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line.
Definition: IfxSent.h:135
IfxSent_Sent_ChannelConfig::inputOutputControl
IfxSent_Sent_InputOutputControl inputOutputControl
Specifies the input output controllable properties.
Definition: IfxSent_Sent.h:524
IfxSent_Sent_ChannelConfig::receiveControl
IfxSent_Sent_ReceiveControl receiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:525
IfxSent_Nibble
IfxSent_Nibble
SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer.
Definition: IfxSent.h:175
IfxSent_Sent_Config::timeStampPreDivider
uint32 timeStampPreDivider
Specifies the pre-divider to get clock in time stamp.
Definition: IfxSent_Sent.h:542
IfxSent_ExtendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode
SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure.
Definition: IfxSent.h:127
IfxSent_Sent_ChannelConfig::watchDogTimerLimit
uint16 watchDogTimerLimit
Speciifes the enabled interrupts for each Channel.
Definition: IfxSent_Sent.h:522
IfxSent_Sent_ChannelConfig::transmitControl
IfxSent_Sent_TransmitControl transmitControl
Specifies the transmit control properties.
Definition: IfxSent_Sent.h:526
IfxSent_Sent_SerialMessageFrame::configBit
IfxSent_ConfigBit configBit
Contains the received configuration bit value.
Definition: IfxSent_Sent.h:561
IfxSent_Sent_ChannelConfig::pins
IFX_CONST IfxSent_Sent_Pins * pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:528
IfxSent_Sent_readChannelSerialDataFrame
IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
Reads the nibbles recieved in the Data register.
Definition: IfxSent_Sent.c:304
IfxSent_SpcMode
IfxSent_SpcMode
Specifies the SENT SPC operational mode.
Definition: IfxSent.h:198
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxSent_Sent_ReceiveControl::crcMethodDisabled
boolean crcMethodDisabled
Specifies the CRC with zero nibbles disabled or enabled.
Definition: IfxSent_Sent.h:480
IfxSent_Sent_InputOutputControl::edgeCounterCleared
boolean edgeCounterCleared
Specifies the edge counter reset.
Definition: IfxSent_Sent.h:420
IfxSent_Sent_EnabledInterrupts
Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once v...
Definition: IfxSent_Sent.h:408
IfxSent_ConfigBit
IfxSent_ConfigBit
SENT.CH[channelId].SDS.CON , Specifies received configuration bit value.
Definition: IfxSent.h:97
IfxSent_Sent_TransmitControl::timeBase
IfxSent_TimeBase timeBase
Specifies the pulse time base.
Definition: IfxSent_Sent.h:500
IfxSent_Sent_Enable::frequencyRangeErrorInterrupt
uint8 frequencyRangeErrorInterrupt
Specifies frequency not in the range error interrupt enable.
Definition: IfxSent_Sent.h:392
IfxSent_Sent_Enable::serialDataCrcErrorInterrupt
uint8 serialDataCrcErrorInterrupt
Specifies serial data CRC error interrupt enable.
Definition: IfxSent_Sent.h:386
IfxSent_Sent_InterruptNodeControl::errorInterruptNode
IfxSent_InterruptNodePointer errorInterruptNode
Specifies the interrupt node for erri request.
Definition: IfxSent_Sent.h:445
IfxSent_Sent_ReceiveControl::crcModeDisabled
boolean crcModeDisabled
Specifies the CRC mode disabled mode.
Definition: IfxSent_Sent.h:479
IfxSent_DigitalGlitchesLength
IfxSent_DigitalGlitchesLength
SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples.
Definition: IfxSent.h:105
IfxSent_Sent_SerialMessageFrame::crc
uint8 crc
Contains the received CRC value.
Definition: IfxSent_Sent.h:558
IfxSent_Sent_Channel
Specifies the SENT Channel handle structure.
Definition: IfxSent_Sent.h:510
IfxSent_Sent_Channel::channelId
IfxSent_ChannelId channelId
Specifies the SENT channel number.
Definition: IfxSent_Sent.h:514
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxSent.h
SENT basic functionality.
IfxSent_Sent_Channel::channel
Ifx_SENT_CH * channel
Specifies the pointer SENT channel registers.
Definition: IfxSent_Sent.h:513
IfxSent_Sent_ReceiveControl
Specifies the receive control properties.
Definition: IfxSent_Sent.h:477
IfxSent_Sent_Enable::serialDataReceiveInterrupt
uint8 serialDataReceiveInterrupt
Specifies serial data interrupt enable.
Definition: IfxSent_Sent.h:384
IfxSent_TriggerSource
IfxSent_TriggerSource
SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation.
Definition: IfxSent.h:224
IfxSent_Sent_Config::sleepModeEnabled
boolean sleepModeEnabled
Specifies SENT enable/disable.
Definition: IfxSent_Sent.h:541
IfxSent_Sent_InputOutputControl::externalTrigger
IfxSent_ExternalTrigger externalTrigger
Specifies the external trigger line source.
Definition: IfxSent_Sent.h:425
IfxSent_Sent_NibbleControl::nibblePointer1
IfxSent_Nibble nibblePointer1
Specifies the received nibble1 control.
Definition: IfxSent_Sent.h:455
IfxSent_Sent_Enable::receiveSuccessInterrupt
uint8 receiveSuccessInterrupt
Specifies receive success interrupt enable.
Definition: IfxSent_Sent.h:380
IfxSent_Sent_ChannelConfig::tUnit
float32 tUnit
desired unit time (f_tick), e.g. 3E-6 for 3 uS
Definition: IfxSent_Sent.h:529
IfxSent_Sent_TransmitControl::pulseLength
uint8 pulseLength
Specifies the pulse length in ticktimes.
Definition: IfxSent_Sent.h:497
IfxPort_InputMode
IfxPort_InputMode
Ifx_P output modification modes definition.
Definition: IfxPort.h:63
IfxSent_Sent_InterruptNodeControl::receiveSuccessInterruptNode
IfxSent_InterruptNodePointer receiveSuccessInterruptNode
Specifies the interrupt node for rsi request.
Definition: IfxSent_Sent.h:440
IfxSent_Sent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent_Sent.h:669
IfxSent_Sent_InputOutputControl
Specifies the input output control properties.
Definition: IfxSent_Sent.h:416
IfxSent_Sent_Pins::pinDriver
IfxPort_PadDriver pinDriver
Pad driver mode definition.
Definition: IfxSent_Sent.h:472
IfxSent_Sent_SerialMessageFrame::serialData
uint16 serialData
Contains the received serial data value.
Definition: IfxSent_Sent.h:560
IfxSent_getAndClearInterruptStatus
IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in ha...
Definition: IfxSent.h:591
IfxSent_Sent_NibbleControl::nibblePointer7
IfxSent_Nibble nibblePointer7
Specifies the received nibble7 control.
Definition: IfxSent_Sent.h:461
IfxCpu_Irq.h
This file contains the APIs for Interrupt related functions.
IfxSent_Sent_ChannelConfig::nibbleControl
IfxSent_Sent_NibbleControl nibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:530
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:66
IfxSent_Sent_Interrupt::isrProvider
IfxSrc_Tos isrProvider
Specifies the interrupt service provider. CPU or DMA.
Definition: IfxSent_Sent.h:433
IfxSent_Sent_ChannelConfig::interrupt
IfxSent_Sent_Interrupt interrupt
Specifies the interrupt control properties structure.
Definition: IfxSent_Sent.h:531
IfxSent_Sent_Pins
Specifies the pins configuration for SENT channel.
Definition: IfxSent_Sent.h:466
IfxSent_Sent_NibbleControl
Specifies the received nibbles control properties.
Definition: IfxSent_Sent.h:452
IfxSent_Sent_InputOutputControl::glitchFallingCleared
boolean glitchFallingCleared
Specifies the glitch falling edge clear.
Definition: IfxSent_Sent.h:421
IfxSent_TimeBase
IfxSent_TimeBase
SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time.
Definition: IfxSent.h:216
IfxSent_Sent_Enable::transferDataInterrupt
uint8 transferDataInterrupt
Specifies transfer data interrupt enable.
Definition: IfxSent_Sent.h:382
IfxSent_Sent_ReceiveControl::statusNibbleEnabled
boolean statusNibbleEnabled
Specifies the status nibble to include in CRC.
Definition: IfxSent_Sent.h:484
IfxSent_Sent_initChannel
IFX_EXTERN boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
Initialize the channel with the supplied configuration.
Definition: IfxSent_Sent.c:46
IfxSent_Sent_Enable::nibblesValueOutOfRangeErrorInterrupt
uint8 nibblesValueOutOfRangeErrorInterrupt
Specifies nibble value out of range error interrupt enable.
Definition: IfxSent_Sent.h:389
IfxSent_Sent_NibbleControl::nibblePointer4
IfxSent_Nibble nibblePointer4
Specifies the received nibble4 control.
Definition: IfxSent_Sent.h:458
IfxSent_Sent_Frame::statusNibble
uint8 statusNibble
Contains the status and communication Nibble of last received frame.
Definition: IfxSent_Sent.h:551
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxSent_Sent_InputOutputControl::inputPulsePolarityHigh
boolean inputPulsePolarityHigh
Specifies the polarity of input of each channel.
Definition: IfxSent_Sent.h:418
IfxSent_Sent_initModule
IFX_EXTERN boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
Initialise the SENT with the supplied configureation.
Definition: IfxSent_Sent.c:265
IfxSent_Sent_ReceiveControl::extendedSerialFrameMode
IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode
Specifies the extended serial frame mode.
Definition: IfxSent_Sent.h:490


iLLD_TC26B: IfxSent_cfg.c Source File

  • _Impl
IfxSent_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSent_cfg.c
3 * \brief SENT on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 *
24 */
25
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29
30 #include "IfxSent_cfg.h"
IfxSent_cfg.h
SENT on-chip implementation data.


iLLD_TC26B: IfxSent_cfg.h Source File

  • _Impl
IfxSent_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSent_cfg.h
3 * \brief SENT on-chip implementation data
4 * \ingroup IfxLld_Sent
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup IfxLld_Sent SENT
26 * \ingroup IfxLld
27 * \defgroup IfxLld_Sent_Impl Implementation
28 * \ingroup IfxLld_Sent
29 * \defgroup IfxLld_Sent_Std Standard Driver
30 * \ingroup IfxLld_Sent
31 */
32
33 #ifndef IFXSENT_CFG_H
34 #define IFXSENT_CFG_H 1
35
36 /******************************************************************************/
37 /*----------------------------------Includes----------------------------------*/
38 /******************************************************************************/
39
40 /******************************************************************************/
41 /*-----------------------------------Macros-----------------------------------*/
42 /******************************************************************************/
43
44 /** \brief Specifies all interrupt events
45 */
46 #define IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)
47
48 /** \brief Specifies the step range for calculating module clock
49 */
50 #define IFXSENT_CFG_STEP_RANGE (1024)
51
52 /** \brief Specifies timeout value in transmission
53 */
54 #define IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)
55
56 #define IFXSENT_NUM_CHANNELS (6)
57
58 #define IFXSENT_NUM_MODULES (1)
59
60 /******************************************************************************/
61 /*-------------------------------Enumerations---------------------------------*/
62 /******************************************************************************/
63
64 /** \brief Specifies the channel Id
65 */
66 typedef enum
67 {
68 IfxSent_ChannelId_0 = 0, /**< \brief Specifies the channel Id 0 */
69 IfxSent_ChannelId_1 = 1, /**< \brief Specifies the channel Id 1 */
70 IfxSent_ChannelId_2 = 2, /**< \brief Specifies the channel Id 2 */
71 IfxSent_ChannelId_3 = 3, /**< \brief Specifies the channel Id 3 */
72 IfxSent_ChannelId_4 = 4, /**< \brief Specifies the channel Id 4 */
73 IfxSent_ChannelId_5 = 5, /**< \brief Specifies the channel Id 5 */
74 IfxSent_ChannelId_none = -1 /**< \brief None Sent channels */
75 } IfxSent_ChannelId;
76
77 #endif /* IFXSENT_CFG_H */
IfxSent_ChannelId_0
Specifies the channel Id 0.
Definition: IfxSent_cfg.h:68
IfxSent_ChannelId_4
Specifies the channel Id 4.
Definition: IfxSent_cfg.h:72
IfxSent_ChannelId_5
Specifies the channel Id 5.
Definition: IfxSent_cfg.h:73
IfxSent_ChannelId_2
Specifies the channel Id 2.
Definition: IfxSent_cfg.h:70
IfxSent_ChannelId_1
Specifies the channel Id 1.
Definition: IfxSent_cfg.h:69
IfxSent_ChannelId_none
None Sent channels.
Definition: IfxSent_cfg.h:74
IfxSent_ChannelId
IfxSent_ChannelId
Specifies the channel Id.
Definition: IfxSent_cfg.h:66
IfxSent_ChannelId_3
Specifies the channel Id 3.
Definition: IfxSent_cfg.h:71


iLLD_TC26B: IfxSmu.c Source File

  • Smu
  • Std
IfxSmu.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu.c
3 * \brief SMU basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxSmu.h"
30 #include "Port/Std/IfxPort.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config)
37 {
38 /* FIXME IfxSmu_Fsp is not required, only need Ifx_SMU */
39 boolean result = TRUE;
40
41 float32 fBack = 100e6;
42 uint16 endinitSfty_pw;
43 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
44
45 IfxSmu_unlock(smu);
46
47 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
48 smu->AGC.B.EFRST = config->enableFaultToRunStateTransition ? 1 : 0;
49 smu->FSP.B.PES = config->emergencyStopEnabled ? 1 : 0;
50 smu->FSP.B.MODE = config->mode == IfxSmu_Fsp_Mode_bistable ? 0 : 2;
51 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
52
53 {
54 uint32 tFspHigh;
55 boolean ok = FALSE;
56
57 float32 tSmuFs;
58 uint32 i;
59
60 for (i = 0; i < 8; i++)
61 {
62 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
63 smu->FSP.B.PRE1 = i; /* Write PRE1 to get TFSP_LOW value */
64 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
65
66 tSmuFs = (1 << (smu->FSP.B.PRE1 + 1)) / fBack;
67
68 /*
69 * tFSP_FS = tSMU_FS *(SMU_FSP.TFSP_HIGH[] & SMU_FSP.TFSP_LOW[] + 1)
70 *
71 * tFSP_FS = tSMU_FS *(SMU_FSP.TFSP + 1)
72 * (SMU_FSP.TFSP + 1) = tFSP_FS / tSMU_FS
73 *
74 *
75 */
76
77 tFspHigh = ((uint32)(config->faultStateTime / tSmuFs) - 1) >> IFX_SMU_FSP_TFSP_LOW_LEN;
78
79 /* FIXME check why condition is always true */
80
81 if (
82 (config->faultStateTime <= tSmuFs * (((tFspHigh << IFX_SMU_FSP_TFSP_LOW_LEN) | (smu->FSP.B.TFSP_LOW)) + 1)) /* Check minimal fault time */
83 && (tFspHigh <= IFX_SMU_FSP_TFSP_HIGH_MSK) /* Check for overflow */
84 )
85 {
86 ok = TRUE;
87 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
88 smu->FSP.B.TFSP_HIGH = tFspHigh;
89 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
90 break;
91 }
92 }
93
94 result &= ok;
95 }
96
97 if (config->mode == IfxSmu_Fsp_Mode_timeSwitching)
98 {
99 uint32 dividers[4] = {512, 1024, 2048, 4096};
100 uint32 i;
101 float32 fSmuFfs;
102 boolean ok = FALSE;
103
104 for (i = 0; i < 4; i++)
105 {
106 fSmuFfs = fBack / dividers[i];
107
108 if ((config->faultFreeStateFrequencyMin < fSmuFfs) && (fSmuFfs < config->faultFreeStateFrequencyMax))
109 {
110 ok = TRUE;
111 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
112 smu->FSP.B.PRE2 = i;
113 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
114 break;
115 }
116 }
117
118 result &= ok;
119 }
120
121 {
122 IfxSmu_Fsp_Out *out = IfxSmu_Fsp_Out_pinTable[0][0];
123 IfxPort_setPinModeOutput(out->pin.port, out->pin.pinIndex, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
124 IfxPort_setPinPadDriver(out->pin.port, out->pin.pinIndex, IfxPort_PadDriver_cmosAutomotiveSpeed1);
125 }
126
127 {
128 /* Configure the FSP port to output */
129 Ifx_SMU_PCTL regPctrl;
130 regPctrl.U = smu->PCTL.U;
131
132 regPctrl.B.HWDIR = 1; /* Set to output */
133 regPctrl.B.HWEN = 1; /* Port is driven by FSP */
134 regPctrl.B.PCS = 1; /* PAD is controlled by the SMU */
135
136 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
137 smu->PCTL.U = regPctrl.U;
138 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
139 }
140
141 IfxSmu_lock(smu);
142
143 return result;
144 }
145
146
147 boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg)
148 {
149 Ifx_SMU_CMD reg;
150 Ifx_SMU_STS status;
151 uint16 endinitSfty_pw;
152 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
153
154 reg.U = 0;
155 reg.B.CMD = cmd;
156 reg.B.ARG = arg;
157
158 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
159 smu->CMD.U = reg.U;
160 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
161
162 status.U = smu->STS.U;
163 return (status.B.CMD == cmd) && (status.B.ARG == arg) && (status.B.RES == 0);
164 }
165
166
167 float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu)
168 {
169 float32 fBack = 100e6;
170 uint32 dividers[4] = {512, 1024, 2048, 4096};
171
172 return fBack / dividers[smu->FSP.B.PRE2];
173 }
174
175
176 float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu)
177 {
178 float32 fBack = 100e6;
179 float32 tSmuFs;
180
181 tSmuFs = (1 << (smu->FSP.B.PRE1 + 1)) / fBack;
182
183 return tSmuFs * (((smu->FSP.B.TFSP_HIGH << IFX_SMU_FSP_TFSP_LOW_LEN) | (smu->FSP.B.TFSP_LOW)) + 1);
184 }
185
186
187 boolean IfxSmu_unlock(Ifx_SMU *smu)
188 {
189 boolean result;
190
191 if (smu->KEYS.B.PERLCK != 0xFF)
192 {
193 uint16 endinitSfty_pw;
194 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
195 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
196 smu->KEYS.B.CFGLCK = 0xBC;
197 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
198 result = TRUE;
199 }
200 else
201 {
202 result = FALSE;
203 }
204
205 return result;
206 }
207
208
209 void IfxSmu_lock(Ifx_SMU *smu)
210 {
211 uint16 endinitSfty_pw;
212 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
213 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
214 smu->KEYS.B.CFGLCK = 0x00;
215 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
216 }
217
218
219 void IfxSmu_lockForever(Ifx_SMU *smu)
220 {
221 uint16 endinitSfty_pw;
222 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
223 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
224 smu->KEYS.B.PERLCK = 0xFF;
225 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
226 }
227
228
229 void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
230 {
231 uint16 endinitSfty_pw;
232 IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
233 uint32 index = alarm & 0xFF;
234 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
235 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
236
237 smu->AGCF[group][0].U &= ~(1 << index);
238 smu->AGCF[group][1].U &= ~(1 << index);
239 smu->AGCF[group][2].U &= ~(1 << index);
240
241 smu->AGCF[group][0].U |= ((config >> 0) & 1) << index;
242 smu->AGCF[group][1].U |= ((config >> 1) & 1) << index;
243 smu->AGCF[group][2].U |= ((config >> 2) & 1) << index;
244 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
245 }
246
247
248 void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
249 {
250 uint16 endinitSfty_pw;
251 IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
252 uint32 index = alarm & 0xFF;
253 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
254
255 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
256 smu->AGFSP[group].U &= (~1) << index;
257
258 smu->AGFSP[group].U |= (enabled ? 1 : 0) << index;
259 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
260 }
261
262
263 boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm)
264 {
265 IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
266 uint32 index = alarm & 0xFF;
267
268 return ((smu->AG[group].U >> index) & 1) != 0;
269 }
270
271
272 IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu)
273 {
274 IfxSmu_AlarmGroup group;
275 uint32 index;
276
277 for (group = IfxSmu_AlarmGroup_0; group <= IfxSmu_AlarmGroup_6; group++)
278 {
279 index = __clz(smu->AG[group].U);
280
281 if (index != 32)
282 {
283 return (IfxSmu_Alarm)((group << 8) | (31 - index));
284 }
285 }
286
287 return IfxSmu_Alarm_noAlarm;
288 }
289
290
291 void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
292 {
293 uint16 endinitSfty_pw;
294 IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
295 uint32 index = alarm & 0xFF;
296 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
297
298 IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
299 smu->AG[group].U = 1 << index;
300 IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
301 }
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxSmu_getFspFaultStateTime
float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu)
Return the minimal fault state time.
Definition: IfxSmu.c:176
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxSmu_cmd
boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC...
Definition: IfxSmu.c:147
IfxSmu_lock
void IfxSmu_lock(Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection...
Definition: IfxSmu.c:209
IfxSmu_unlock
boolean IfxSmu_unlock(Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection...
Definition: IfxSmu.c:187
IfxSmu_setAlarmConfig
void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration.
Definition: IfxSmu.c:229
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxSmu_Fsp_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSmu_PinMap.h:41
IfxSmu_Fsp_Mode_timeSwitching
Time switching protocol.
Definition: IfxSmu.h:83
float32
float float32
Definition: Platform_Types.h:167
IfxSmu_AlarmGroup_0
Alarm group 0.
Definition: IfxSmu_cfg.h:62
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxSmu_lockForever
void IfxSmu_lockForever(Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.
Definition: IfxSmu.c:219
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarm list
Definition: IfxSmu_cfg.h:85
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxSmu_isAlarmSet
boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status.
Definition: IfxSmu.c:263
IfxPort_OutputIdx_general
Definition: IfxPort.h:102
IfxSmu.h
SMU basic functionality.
IfxSmu_configFsp::mode
IfxSmu_Fsp_Mode mode
FSP mode.
Definition: IfxSmu.h:98
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxSmu_initFsp
boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP.
Definition: IfxSmu.c:36
IfxSmu_configFsp::faultStateTime
float32 faultStateTime
Minimal fault state time in sec.
Definition: IfxSmu.h:99
IfxSmu_Fsp_Out_pinTable
const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
Definition: IfxSmu_PinMap.c:31
IfxSmu_getFspFaultFreeFrequency
float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu)
Return FSP frequency (Time switching only)
Definition: IfxSmu.c:167
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxSmu_configFsp::emergencyStopEnabled
boolean emergencyStopEnabled
If TRUE, the emergency stop port is triggered on FSP fault state.
Definition: IfxSmu.h:102
IfxSmu_configFsp
FSP Configuration Structure.
Definition: IfxSmu.h:96
IfxSmu_configFsp::enableFaultToRunStateTransition
boolean enableFaultToRunStateTransition
Enable Fault to Run State Transition.
Definition: IfxSmu.h:103
IfxSmu_clearAlarm
void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag.
Definition: IfxSmu.c:291
IfxSmu_AlarmConfig
IfxSmu_AlarmConfig
SMU Alarm Configuration Ifx_SMU.AGCF[][].
Definition: IfxSmu.h:56
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxSmu_AlarmGroup
IfxSmu_AlarmGroup
Alarm group
Definition: IfxSmu_cfg.h:60
IfxSmu_Alarm_noAlarm
Special flag to inform about no alarm (Software only)
Definition: IfxSmu_cfg.h:221
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxSmu_Fsp_Out
Fault Signal Protocol Pin.
Definition: IfxSmu_PinMap.h:38
IfxSmu_enableAlarmFsp
void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration.
Definition: IfxSmu.c:248
IfxSmu_getAlarm
IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu)
Get the alarm flag.
Definition: IfxSmu.c:272
IfxSmu_Fsp_Mode_bistable
Bi-stable fault signalling protocol.
Definition: IfxSmu.h:82
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxSmu_AlarmGroup_6
Alarm group 6.
Definition: IfxSmu_cfg.h:68
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxSmu_configFsp::faultFreeStateFrequencyMin
float32 faultFreeStateFrequencyMin
Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
Definition: IfxSmu.h:100
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxSmu.h Source File

  • Smu
  • Std
IfxSmu.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu.h
3 * \brief SMU basic functionality
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Smu_Std_func_fsp FSP Functions
25 * \ingroup IfxLld_Smu_Std
26 * \defgroup IfxLld_Smu_Std_func SMU Functions
27 * \ingroup IfxLld_Smu_Std
28 * \defgroup IfxLld_Smu_Std_datastructures Data Structures
29 * \ingroup IfxLld_Smu_Std
30 */
31
32 #ifndef IFXSMU_H
33 #define IFXSMU_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "_Impl/IfxSmu_cfg.h"
40 #include "Cpu/Std/Ifx_Types.h"
41 #include "_PinMap/IfxSmu_PinMap.h"
42 #include "IfxSmu_reg.h"
43 #include "IfxSmu_regdef.h"
44 #include "IfxSmu_bf.h"
45 #include "_Utilities/Ifx_Assert.h"
46
47 /******************************************************************************/
48 /*--------------------------------Enumerations--------------------------------*/
49 /******************************************************************************/
50
51 /** \addtogroup IfxLld_Smu_Std_datastructures
52 * \{ */
53 /** \brief SMU Alarm Configuration
54 * Ifx_SMU.AGCF[][]
55 */
56 typedef enum
57 {
58 IfxSmu_AlarmConfig_noAction = 0, /**< \brief No Action. Reset value. Alarm disabled. */
59 IfxSmu_AlarmConfig_interruptSet0 = 2, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 0 */
60 IfxSmu_AlarmConfig_interruptSet1 = 3, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 1 */
61 IfxSmu_AlarmConfig_interruptSet2 = 4, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 2 */
62 IfxSmu_AlarmConfig_nmi = 5, /**< \brief Sends an NMI request to the SCU */
63 IfxSmu_AlarmConfig_scuReset = 6, /**< \brief Sends a reset request to SCU */
64 IfxSmu_AlarmConfig_cpuIdle = 7 /**< \brief Triggers a CPU idle request */
65 } IfxSmu_AlarmConfig;
66
67 /** \brief SMU Commands
68 */
69 typedef enum
70 {
71 IfxSmu_Cmd_start = 0, /**< \brief Forces the SSM to go to the RUN state from the START state. */
72 IfxSmu_Cmd_activateFsp = 1, /**< \brief Activates the Fault Signaling Protocol. */
73 IfxSmu_Cmd_releaseFsp = 2, /**< \brief Turns the FSP into the fault free state. */
74 IfxSmu_Cmd_activatePes = 3, /**< \brief Triggers the activation of the Port Emergency Stop (PES). */
75 IfxSmu_Cmd_stopRecoveryTimer = 4, /**< \brief Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product. */
76 IfxSmu_Cmd_enableClearAlarmStatus = 5, /**< \brief Alarm Status Clear Enable Command */
77 IfxSmu_Cmd_triggerAlarm = 6 /**< \brief Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping" */
78 } IfxSmu_Cmd;
79
80 typedef enum
81 {
82 IfxSmu_Fsp_Mode_bistable, /**< \brief Bi-stable fault signalling protocol */
83 IfxSmu_Fsp_Mode_timeSwitching /**< \brief Time switching protocol */
84 } IfxSmu_Fsp_Mode;
85
86 /** \} */
87
88 /******************************************************************************/
89 /*-----------------------------Data Structures--------------------------------*/
90 /******************************************************************************/
91
92 /** \addtogroup IfxLld_Smu_Std_datastructures
93 * \{ */
94 /** \brief FSP Configuration Structure
95 */
96 typedef struct
97 {
98 IfxSmu_Fsp_Mode mode; /**< \brief FSP mode */
99 float32 faultStateTime; /**< \brief Minimal fault state time in sec */
100 float32 faultFreeStateFrequencyMin; /**< \brief Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching */
101 float32 faultFreeStateFrequencyMax; /**< \brief Max fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching */
102 boolean emergencyStopEnabled; /**< \brief If TRUE, the emergency stop port is triggered on FSP fault state */
103 boolean enableFaultToRunStateTransition; /**< \brief Enable Fault to Run State Transition */
104 } IfxSmu_configFsp;
105
106 /** \} */
107
108 /** \addtogroup IfxLld_Smu_Std_func_fsp
109 * \{ */
110
111 /******************************************************************************/
112 /*-------------------------Inline Function Prototypes-------------------------*/
113 /******************************************************************************/
114
115 /** \brief Turns the FSP into the fault free state.
116 * \param smu Pointer to SMU module registers
117 */
118 IFX_INLINE boolean IfxSmu_releaseFsp(Ifx_SMU *smu);
119
120 /** \brief Initialize the FSP configuartion to default
121 * \param config FSP Configuration Structure
122 * \return None
123 */
124 IFX_INLINE void IfxSmu_initFspConfig(IfxSmu_configFsp *config);
125
126 /** \brief Activates the Fault Signaling Protocol.
127 * \param smu Pointer to SMU module registers
128 */
129 IFX_INLINE boolean IfxSmu_activateFsp(Ifx_SMU *smu);
130
131 /******************************************************************************/
132 /*-------------------------Global Function Prototypes-------------------------*/
133 /******************************************************************************/
134
135 /** \brief Initialize the FSP
136 *
137 * Fault state time >= tFSP_FS = tSMU_FS *(SMU_FSP.TFSP_HIGH[] & SMU_FSP.TFSP_LOW[] + 1)
138 * with tSMU_FS = <SMU_FSP.PRE1>. SMU_FSP.TFSP_HIGH[] / fBACK
139 * and SMU_FSP.PRE1 should enable tFSP_FS >= 500ms (Ref: TC27xC UM v2.2: SMU_FSP.TFSP_HIGH)
140 * Fault free state period (Time switching only) = tSMU_FFS = fBACK / <SMU_FSP.PRE2>
141 *
142 * Note: TSMU_FS * SMU_FSP.TFSP_LOW > 250us
143 * \param smu Pointer to SMU module registers
144 * \param config FSP Configuration Structure
145 */
146 IFX_EXTERN boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config);
147
148 /** \brief Return FSP frequency (Time switching only)
149 * \param smu Pointer to SMU module registers
150 */
151 IFX_EXTERN float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu);
152
153 /** \brief Return the minimal fault state time
154 * \param smu Pointer to SMU module registers
155 */
156 IFX_EXTERN float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu);
157
158 /** \brief Set the alarm FSP configuration
159 * \param smu Pointer to SMU Module Registers
160 * \param alarm Alarm to be configured
161 * \param enabled If TRUE, the alarm event triggers the FSP, else no action
162 * \return None
163 */
164 IFX_EXTERN void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled);
165
166 /** \} */
167
168 /** \addtogroup IfxLld_Smu_Std_func
169 * \{ */
170
171 /******************************************************************************/
172 /*-------------------------Inline Function Prototypes-------------------------*/
173 /******************************************************************************/
174
175 /** \brief Triggers the activation of the Port Emergency Stop (PES).
176 * \param smu Pointer to SMU module registers
177 */
178 IFX_INLINE boolean IfxSmu_activatePes(Ifx_SMU *smu);
179
180 /** \brief Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product.
181 * \param smu Pointer to SMU module registers
182 * \param timer Recovery Timer
183 */
184 IFX_INLINE boolean IfxSmu_stopRecoveryTimer(Ifx_SMU *smu, IfxSmu_RecoveryTimer timer);
185
186 /** \brief Alarm Status Clear Enable Command.
187 * \param smu Pointer to SMU module registers
188 */
189 IFX_INLINE boolean IfxSmu_enableClearAlarmStatus(Ifx_SMU *smu);
190
191 /** \brief Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping"
192 * \param smu Pointer to SMU module registers
193 * \param alarm Alarm list
194 */
195 IFX_INLINE boolean IfxSmu_triggerAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm);
196
197 /** \brief Forces the SSM to go to the RUN state from the START state.
198 * \param smu Pointer to SMU module registers
199 */
200 IFX_INLINE boolean IfxSmu_start(Ifx_SMU *smu);
201
202 /******************************************************************************/
203 /*-------------------------Global Function Prototypes-------------------------*/
204 /******************************************************************************/
205
206 /** \brief Unlock the SMU configuration (temporary)
207 * Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface
208 * Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers
209 * \param smu Pointer to SMU module registers
210 * \param cmd SMU Command
211 * \param arg Argument to be used with the command
212 */
213 IFX_EXTERN boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg);
214
215 /** \brief Unlock the SMU configuration (temporary)
216 * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
217 * \param smu Pointer to SMU module registers
218 */
219 IFX_EXTERN boolean IfxSmu_unlock(Ifx_SMU *smu);
220
221 /** \brief Lock the SMU configuration (temporary)
222 * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
223 * \param smu Pointer to SMU module registers
224 * \return None
225 */
226 IFX_EXTERN void IfxSmu_lock(Ifx_SMU *smu);
227
228 /** \brief Lock the SMU configuration up to the next application reset
229 * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
230 * \param smu Pointer to SMU module registers
231 * \return None
232 */
233 IFX_EXTERN void IfxSmu_lockForever(Ifx_SMU *smu);
234
235 /** \brief Set the SMU alarm configuration
236 * \param smu Pointer to SMU module registers
237 * \param alarm Alarm to be configured
238 * \param config Alarm configuration
239 * \return None
240 */
241 IFX_EXTERN void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config);
242
243 /** \brief Return the alarm status
244 * \param smu Pointer to SMU Module Registers
245 * \param alarm Alarm for which to return the status
246 * \return TRUE means the alarm is set and FALSE means the alarm is not set.
247 */
248 IFX_EXTERN boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm);
249
250 /** \brief Get the alarm flag
251 * \param smu Pointer to SMU Module Registers
252 * \return Return the next set alarm, if no alarm is set , return IfxSmu_Alarm_noAlarm
253 */
254 IFX_EXTERN IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu);
255
256 /** \brief Clear the alarm flag
257 * \param smu Pointer to SMU Module Registers
258 * \param alarm Alarm for which the flag should be cleared
259 * \return None
260 */
261 IFX_EXTERN void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm);
262
263 /** \} */
264
265 /******************************************************************************/
266 /*---------------------Inline Function Implementations------------------------*/
267 /******************************************************************************/
268
269 IFX_INLINE boolean IfxSmu_activatePes(Ifx_SMU *smu)
270 {
271 return IfxSmu_cmd(smu, IfxSmu_Cmd_activatePes, 0);
272 }
273
274
275 IFX_INLINE boolean IfxSmu_stopRecoveryTimer(Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
276 {
277 return IfxSmu_cmd(smu, IfxSmu_Cmd_stopRecoveryTimer, timer);
278 }
279
280
281 IFX_INLINE boolean IfxSmu_enableClearAlarmStatus(Ifx_SMU *smu)
282 {
283 return IfxSmu_cmd(smu, IfxSmu_Cmd_enableClearAlarmStatus, 0);
284 }
285
286
287 IFX_INLINE boolean IfxSmu_triggerAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
288 {
289 uint8 index = alarm & 0xFF;
290 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (alarm >> 8) == IfxSmu_AlarmGroup_5);
291 return IfxSmu_cmd(smu, IfxSmu_Cmd_triggerAlarm, index);
292 }
293
294
295 IFX_INLINE boolean IfxSmu_start(Ifx_SMU *smu)
296 {
297 return IfxSmu_cmd(smu, IfxSmu_Cmd_start, 0);
298 }
299
300
301 IFX_INLINE boolean IfxSmu_releaseFsp(Ifx_SMU *smu)
302 {
303 return IfxSmu_cmd(smu, IfxSmu_Cmd_releaseFsp, 0);
304 }
305
306
307 IFX_INLINE void IfxSmu_initFspConfig(IfxSmu_configFsp *config)
308 {
309 config->emergencyStopEnabled = FALSE;
310 config->enableFaultToRunStateTransition = FALSE;
311 config->faultFreeStateFrequencyMin = 0;
312 config->faultFreeStateFrequencyMax = 0;
313 config->faultStateTime = 1e-3;
314 config->mode = IfxSmu_Fsp_Mode_bistable;
315 }
316
317
318 IFX_INLINE boolean IfxSmu_activateFsp(Ifx_SMU *smu)
319 {
320 return IfxSmu_cmd(smu, IfxSmu_Cmd_activateFsp, 0);
321 }
322
323
324 #endif /* IFXSMU_H */
IfxSmu_initFspConfig
IFX_INLINE void IfxSmu_initFspConfig(IfxSmu_configFsp *config)
Initialize the FSP configuartion to default.
Definition: IfxSmu.h:307
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxSmu_Cmd_stopRecoveryTimer
Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the pr...
Definition: IfxSmu.h:75
IfxSmu_getFspFaultStateTime
IFX_EXTERN float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu)
Return the minimal fault state time.
Definition: IfxSmu.c:176
IfxSmu_cfg.h
SMU on-chip implementation data.
IfxSmu_cmd
IFX_EXTERN boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface Ref: TC27xC...
Definition: IfxSmu.c:147
IfxSmu_start
IFX_INLINE boolean IfxSmu_start(Ifx_SMU *smu)
Forces the SSM to go to the RUN state from the START state.
Definition: IfxSmu.h:295
IfxSmu_lock
IFX_EXTERN void IfxSmu_lock(Ifx_SMU *smu)
Lock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection...
Definition: IfxSmu.c:209
IfxSmu_unlock
IFX_EXTERN boolean IfxSmu_unlock(Ifx_SMU *smu)
Unlock the SMU configuration (temporary) Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection...
Definition: IfxSmu.c:187
IfxSmu_AlarmConfig_interruptSet0
Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuratio...
Definition: IfxSmu.h:59
IfxSmu_setAlarmConfig
IFX_EXTERN void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
Set the SMU alarm configuration.
Definition: IfxSmu.c:229
IfxSmu_Fsp_Mode_timeSwitching
Time switching protocol.
Definition: IfxSmu.h:83
float32
float float32
Definition: Platform_Types.h:167
Ifx_Assert.h
Assert functions.
IfxSmu_AlarmConfig_scuReset
Sends a reset request to SCU.
Definition: IfxSmu.h:63
IfxSmu_lockForever
IFX_EXTERN void IfxSmu_lockForever(Ifx_SMU *smu)
Lock the SMU configuration up to the next application reset Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection.
Definition: IfxSmu.c:219
IfxSmu_RecoveryTimer
IfxSmu_RecoveryTimer
Recovery Timer
Definition: IfxSmu_cfg.h:73
IfxSmu_stopRecoveryTimer
IFX_INLINE boolean IfxSmu_stopRecoveryTimer(Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the pr...
Definition: IfxSmu.h:275
IfxSmu_Fsp_Mode
IfxSmu_Fsp_Mode
Definition: IfxSmu.h:80
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxSmu_AlarmGroup_5
Alarm group 5.
Definition: IfxSmu_cfg.h:67
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarm list
Definition: IfxSmu_cfg.h:85
IfxSmu_Cmd_start
Forces the SSM to go to the RUN state from the START state.
Definition: IfxSmu.h:71
IfxSmu_isAlarmSet
IFX_EXTERN boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Return the alarm status.
Definition: IfxSmu.c:263
IfxSmu_Cmd_releaseFsp
Turns the FSP into the fault free state.
Definition: IfxSmu.h:73
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxSmu_releaseFsp
IFX_INLINE boolean IfxSmu_releaseFsp(Ifx_SMU *smu)
Turns the FSP into the fault free state.
Definition: IfxSmu.h:301
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxSmu_configFsp::mode
IfxSmu_Fsp_Mode mode
FSP mode.
Definition: IfxSmu.h:98
IfxSmu_Cmd_enableClearAlarmStatus
Alarm Status Clear Enable Command.
Definition: IfxSmu.h:76
IfxSmu_initFsp
IFX_EXTERN boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config)
Initialize the FSP.
Definition: IfxSmu.c:36
IfxSmu_configFsp::faultStateTime
float32 faultStateTime
Minimal fault state time in sec.
Definition: IfxSmu.h:99
IfxSmu_AlarmConfig_interruptSet2
Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuratio...
Definition: IfxSmu.h:61
IfxSmu_activatePes
IFX_INLINE boolean IfxSmu_activatePes(Ifx_SMU *smu)
Triggers the activation of the Port Emergency Stop (PES).
Definition: IfxSmu.h:269
IfxSmu_enableClearAlarmStatus
IFX_INLINE boolean IfxSmu_enableClearAlarmStatus(Ifx_SMU *smu)
Alarm Status Clear Enable Command.
Definition: IfxSmu.h:281
IfxSmu_getFspFaultFreeFrequency
IFX_EXTERN float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu)
Return FSP frequency (Time switching only)
Definition: IfxSmu.c:167
IfxSmu_configFsp::emergencyStopEnabled
boolean emergencyStopEnabled
If TRUE, the emergency stop port is triggered on FSP fault state.
Definition: IfxSmu.h:102
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxSmu_Cmd_activatePes
Triggers the activation of the Port Emergency Stop (PES).
Definition: IfxSmu.h:74
IfxSmu_configFsp::faultFreeStateFrequencyMax
float32 faultFreeStateFrequencyMax
Max fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
Definition: IfxSmu.h:101
IfxSmu_configFsp
FSP Configuration Structure.
Definition: IfxSmu.h:96
IfxSmu_configFsp::enableFaultToRunStateTransition
boolean enableFaultToRunStateTransition
Enable Fault to Run State Transition.
Definition: IfxSmu.h:103
IfxSmu_clearAlarm
IFX_EXTERN void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Clear the alarm flag.
Definition: IfxSmu.c:291
IfxSmu_AlarmConfig
IfxSmu_AlarmConfig
SMU Alarm Configuration Ifx_SMU.AGCF[][].
Definition: IfxSmu.h:56
IfxSmu_Cmd_triggerAlarm
Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "A...
Definition: IfxSmu.h:77
IfxSmu_AlarmConfig_cpuIdle
Triggers a CPU idle request.
Definition: IfxSmu.h:64
IfxSmu_AlarmConfig_interruptSet1
Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuratio...
Definition: IfxSmu.h:60
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxSmu_AlarmConfig_noAction
No Action. Reset value. Alarm disabled.
Definition: IfxSmu.h:58
IfxSmu_Cmd
IfxSmu_Cmd
SMU Commands.
Definition: IfxSmu.h:69
IfxSmu_Cmd_activateFsp
Activates the Fault Signaling Protocol.
Definition: IfxSmu.h:72
IfxSmu_enableAlarmFsp
IFX_EXTERN void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
Set the alarm FSP configuration.
Definition: IfxSmu.c:248
IfxSmu_getAlarm
IFX_EXTERN IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu)
Get the alarm flag.
Definition: IfxSmu.c:272
IfxSmu_Fsp_Mode_bistable
Bi-stable fault signalling protocol.
Definition: IfxSmu.h:82
IfxSmu_triggerAlarm
IFX_INLINE boolean IfxSmu_triggerAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "A...
Definition: IfxSmu.h:287
IfxSmu_PinMap.h
SMU I/O map.
IfxSmu_AlarmConfig_nmi
Sends an NMI request to the SCU.
Definition: IfxSmu.h:62
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxSmu_configFsp::faultFreeStateFrequencyMin
float32 faultFreeStateFrequencyMin
Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching.
Definition: IfxSmu.h:100
IfxSmu_activateFsp
IFX_INLINE boolean IfxSmu_activateFsp(Ifx_SMU *smu)
Activates the Fault Signaling Protocol.
Definition: IfxSmu.h:318


iLLD_TC26B: IfxSmu_PinMap.c Source File

  • _PinMap
IfxSmu_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_PinMap.c
3 * \brief SMU I/O map
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxSmu_PinMap.h"
27
28 IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
29
30
31 const IfxSmu_Fsp_Out *IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS] = {
32 {
33 &IfxSmu_FSP_P33_8_OUT
34 }
35 };
IfxSmu_FSP_P33_8_OUT
IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
Definition: IfxSmu_PinMap.c:28
IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
Definition: IfxSmu_PinMap.h:49
IfxSmu_Fsp_Out_pinTable
const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
Definition: IfxSmu_PinMap.c:31
IfxPort_OutputIdx_alt1
Definition: IfxPort.h:103
IfxSmu_Fsp_Out
Fault Signal Protocol Pin.
Definition: IfxSmu_PinMap.h:38
IfxSmu_PinMap.h
SMU I/O map.
IFXSMU_PINMAP_NUM_MODULES
#define IFXSMU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSmu_PinMap.h:48


iLLD_TC26B: IfxSmu_PinMap.h Source File

  • _PinMap
IfxSmu_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_PinMap.h
3 * \brief SMU I/O map
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Smu_pinmap SMU Pin Mapping
25 * \ingroup IfxLld_Smu
26 */
27
28 #ifndef IFXSMU_PINMAP_H
29 #define IFXSMU_PINMAP_H
30
31 #include <IfxSmu_reg.h>
32 #include <Port/Std/IfxPort.h>
33
34 /** \addtogroup IfxLld_Smu_pinmap
35 * \{ */
36
37 /** \brief Fault Signal Protocol Pin */
38 typedef const struct
39 {
40 Ifx_SMU* module; /**< \brief Base address */
41 IfxPort_Pin pin; /**< \brief Port pin */
42 IfxPort_OutputIdx select; /**< \brief Port control code */
43 } IfxSmu_Fsp_Out;
44
45 IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT; /**< \brief SMU_FSP: SMU */
46
47 /** \brief Table dimensions */
48 #define IFXSMU_PINMAP_NUM_MODULES 1
49 #define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1
50
51
52 /** \brief IfxSmu_Fsp_Out table */
53 IFX_EXTERN const IfxSmu_Fsp_Out *IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS];
54
55 /** \} */
56
57 #endif /* IFXSMU_PINMAP_H */
IfxSmu_Fsp_Out::module
Ifx_SMU * module
Base address.
Definition: IfxSmu_PinMap.h:40
IfxSmu_Fsp_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxSmu_PinMap.h:42
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxSmu_FSP_P33_8_OUT
IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT
SMU_FSP: SMU.
Definition: IfxSmu_PinMap.h:45
IfxSmu_Fsp_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxSmu_PinMap.h:41
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS
Definition: IfxSmu_PinMap.h:49
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IfxSmu_Fsp_Out_pinTable
IFX_EXTERN const IfxSmu_Fsp_Out * IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS]
IfxSmu_Fsp_Out table.
Definition: IfxSmu_PinMap.h:53
IfxSmu_Fsp_Out
Fault Signal Protocol Pin.
Definition: IfxSmu_PinMap.h:38
IFXSMU_PINMAP_NUM_MODULES
#define IFXSMU_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxSmu_PinMap.h:48
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxSmu_cfg.c Source File

  • _Impl
IfxSmu_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_cfg.c
3 * \brief SMU on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxSmu_cfg.h"
IfxSmu_cfg.h
SMU on-chip implementation data.


iLLD_TC26B: IfxSmu_cfg.h Source File

  • _Impl
IfxSmu_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSmu_cfg.h
3 * \brief SMU on-chip implementation data
4 * \ingroup IfxLld_Smu
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Smu SMU
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Smu_Impl Implementation
27 * \ingroup IfxLld_Smu
28 * \defgroup IfxLld_Smu_Std Standard Driver
29 * \ingroup IfxLld_Smu
30 * \defgroup IfxLld_Smu_Impl_Enum_AlarmGroup Alarm Group Enumeration
31 * \ingroup IfxLld_Smu_Impl
32 * \defgroup IfxLld_Smu_Impl_Enum_ListAlarms List of Alarms Enumeration
33 * \ingroup IfxLld_Smu_Impl
34 */
35
36 #ifndef IFXSMU_CFG_H
37 #define IFXSMU_CFG_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43
44 /******************************************************************************/
45 /*-----------------------------------Macros-----------------------------------*/
46 /******************************************************************************/
47
48 #define IFXSMU_NUM_MODULES (1)
49
50
51
52 /******************************************************************************/
53 /*--------------------------------Enumerations--------------------------------*/
54 /******************************************************************************/
55
56 /** \addtogroup IfxLld_Smu_Impl_Enum_AlarmGroup
57 * \{ */
58 /** \brief Alarm group
59 */
60 typedef enum
61 {
62 IfxSmu_AlarmGroup_0 = 0, /**< \brief Alarm group 0 */
63 IfxSmu_AlarmGroup_1, /**< \brief Alarm group 1 */
64 IfxSmu_AlarmGroup_2, /**< \brief Alarm group 2 */
65 IfxSmu_AlarmGroup_3, /**< \brief Alarm group 3 */
66 IfxSmu_AlarmGroup_4, /**< \brief Alarm group 4 */
67 IfxSmu_AlarmGroup_5, /**< \brief Alarm group 5 */
68 IfxSmu_AlarmGroup_6 /**< \brief Alarm group 6 */
69 } IfxSmu_AlarmGroup;
70
71 /** \brief Recovery Timer
72 */
73 typedef enum
74 {
75 IfxSmu_RecoveryTimer_0 = 0, /**< \brief Recovery Timer 0 */
76 IfxSmu_RecoveryTimer_1 /**< \brief Recovery Timer 1 */
77 } IfxSmu_RecoveryTimer;
78
79 /** \} */
80
81 /** \addtogroup IfxLld_Smu_Impl_Enum_ListAlarms
82 * \{ */
83 /** \brief SMU Alarm list
84 */
85 typedef enum
86 {
87 IfxSmu_Alarm_Cpu0LockstepComparatorError = (IfxSmu_AlarmGroup_0 << 8) | 0, /**< \brief CPU0 Lockstep Comparator Error */
88 IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_0 << 8) | 1, /**< \brief CPU0 Bus-level MPU violation / Access Protection violation */
89 IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 3, /**< \brief CPU0 PCACHE TAG uncorrectable error */
90 IfxSmu_Alarm_Cpu0PcacheTagAddressError = (IfxSmu_AlarmGroup_0 << 8) | 4, /**< \brief CPU0 PCACHE TAG address error */
91 IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 5, /**< \brief CPU0 PCACHE TAG Address Buffer overflow */
92 IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 6, /**< \brief CPU0 Unified PCACHE/PSPR single-bit correction */
93 IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 7, /**< \brief CPU0 Unified PCACHE/PSPR uncorrectable error */
94 IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 8, /**< \brief CPU0 Unified PCACHE/PSPR Address error */
95 IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 9, /**< \brief CPU0 Unified PCACHE/PSPR Address Buffer overflow */
96 IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 10, /**< \brief CPU0 Unified DCACHE/DSPR single-bit correction */
97 IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 11, /**< \brief CPU0 Unified DCACHE/DSPR uncorrectable error */
98 IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 12, /**< \brief CPU0 Unified DCACHE/DSPR address error */
99 IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 13, /**< \brief CPU0 Unified DCACHE/DSPR Address Buffer overflow */
100 IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_0 << 8) | 19, /**< \brief CPU0 CPU Data SRI Interface (Load/Store) EDC Error */
101 IfxSmu_Alarm_Cpu1LockstepComparatorError = (IfxSmu_AlarmGroup_1 << 8) |0, /**< \brief CPU1 Lockstep Comparator Error */
102 IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_1 << 8) |1, /**< \brief CPU1 Bus-level MPU violation / Access Protection violation */
103 IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |3, /**< \brief CPU1 PCACHE TAG uncorrectable error */
104 IfxSmu_Alarm_Cpu1PcacheTagAddressError = (IfxSmu_AlarmGroup_1 << 8) |4, /**< \brief CPU1 PCACHE TAG address error */
105 IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |5, /**< \brief CPU1 PCACHE TAG Address Buffer overflow */
106 IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |6, /**< \brief CPU1 Unified PCACHE/PSPR single-bit correction */
107 IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |7, /**< \brief CPU1 Unified PCACHE/PSPR uncorrectable error */
108 IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |8, /**< \brief CPU1 Unified PCACHE/PSPR Address error */
109 IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |9, /**< \brief CPU1 Unified PCACHE/PSPR Address Buffer overflow */
110 IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |10, /**< \brief CPU1 Unified DCACHE/DSPR single-bit correction */
111 IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |11, /**< \brief CPU1 Unified DCACHE/DSPR uncorrectable error */
112 IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |12, /**< \brief CPU1 Unified DCACHE/DSPR address error */
113 IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |13, /**< \brief CPU1 Unified DCACHE/DSPR Address Buffer overflow */
114 IfxSmu_Alarm_Cpu1DcacheTagSramCorrection = (IfxSmu_AlarmGroup_1 << 8) |14, /**< \brief CPU1 DCACHE TAG SRAM correction */
115 IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |15, /**< \brief CPU1 DCACHE TAG SRAM uncorrectable error */
116 IfxSmu_Alarm_Cpu1DcacheTagSramAddressError = (IfxSmu_AlarmGroup_1 << 8) |16, /**< \brief CPU1 DCACHE TAG SRAM address error */
117 IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |17, /**< \brief CPU1 DCACHE TAG SRAM address buffer overflow */
118 IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |18, /**< \brief CPU1 CPU Instruction Fetch SRI Interface EDC Error */
119 IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |19, /**< \brief CPU1 CPU Data SRI Interface (Load/Store) EDC Error */
120 IfxSmu_Alarm_PmuSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 2, /**< \brief PMU single bit correction */
121 IfxSmu_Alarm_PmuDoubleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 3, /**< \brief PMU double bit correction */
122 IfxSmu_Alarm_PmuNonCorrectableMultipleBit = (IfxSmu_AlarmGroup_2 << 8) | 4, /**< \brief PMU non correctable multiple bit */
123 IfxSmu_Alarm_PmuAddressingError = (IfxSmu_AlarmGroup_2 << 8) | 5, /**< \brief PMU Addressing error */
124 IfxSmu_Alarm_PmuAddressBufferFull = (IfxSmu_AlarmGroup_2 << 8) | 6, /**< \brief PMU address buffer full */
125 IfxSmu_Alarm_PmuPflashEccError = (IfxSmu_AlarmGroup_2 << 8) | 7, /**< \brief PMU PFLASH ECC error */
126 IfxSmu_Alarm_PmuEdcComparatorError = (IfxSmu_AlarmGroup_2 << 8) | 8, /**< \brief PMU EDC comparator error */
127 IfxSmu_Alarm_LmuEccError = (IfxSmu_AlarmGroup_2 << 8) | 15, /**< \brief LMU ECC Error */
128 IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError = (IfxSmu_AlarmGroup_2 << 8) | 16, /**< \brief LMU Register Access Protection error / Bus-level MPU error */
129 IfxSmu_Alarm_LmuSramSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 17, /**< \brief LMU SRAM single-bit correction */
130 IfxSmu_Alarm_LmuSramUncorrectableError = (IfxSmu_AlarmGroup_2 << 8) | 18, /**< \brief LMU SRAM uncorrectable error */
131 IfxSmu_Alarm_LmuSramAddressError = (IfxSmu_AlarmGroup_2 << 8) | 19, /**< \brief LMU SRAM Address error */
132 IfxSmu_Alarm_LmuSramAddressBufferOverflow = (IfxSmu_AlarmGroup_2 << 8) | 20, /**< \brief LMU SRAM Address buffer overflow */
133 IfxSmu_Alarm_SriEdcAddressPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 21, /**< \brief SRI EDC Address phase error */
134 IfxSmu_Alarm_SriEdcWritePhaseError = (IfxSmu_AlarmGroup_2 << 8) | 22, /**< \brief SRI EDC Write phase error */
135 IfxSmu_Alarm_SriEdcReadPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 23, /**< \brief SRI EDC Read phase error */
136 IfxSmu_Alarm_IrEdcError = (IfxSmu_AlarmGroup_2 << 8) | 25, /**< \brief IR EDC error */
137 IfxSmu_Alarm_IomPinMismatchIndication = (IfxSmu_AlarmGroup_2 << 8) | 26, /**< \brief IOM Pin Mismatch Indication */
138 IfxSmu_Alarm_SmuTimer0TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 29, /**< \brief SMU Timer 0 time-out */
139 IfxSmu_Alarm_SmuTimer1TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 30, /**< \brief SMU Timer 1 time-out */
140 IfxSmu_Alarm_SmuErrorPinFaultStateActivation = (IfxSmu_AlarmGroup_2 << 8) | 31, /**< \brief SMU ErrorPin Fault State Activation */
141 IfxSmu_Alarm_ScuCguInputClockOutOfRange = (IfxSmu_AlarmGroup_3 << 8) | 0, /**< \brief SCU/CGU input clock out of range */
142 IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 1, /**< \brief SCU/CGU System PLL VCO Loss-of-Lock Event */
143 IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 2, /**< \brief SCU/CGU PLL_ERAY VCO Loss-of-Lock Event */
144 IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 3, /**< \brief SCU/CGU STM clock out of range frequency */
145 IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 4, /**< \brief SCU/CGU PLL_ERAY out of range frequency */
146 IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 5, /**< \brief SCU/CGU System PLL out of range frequency */
147 IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 6, /**< \brief SCU/CGU SRI clock out of range frequency */
148 IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 7, /**< \brief SCU/CGU SPB clock out of range frequency */
149 IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 8, /**< \brief SCU/CGU GTM clock out of range frequency */
150 IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 9, /**< \brief SCU/CGU ADC clock out of range frequency */
151 IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 11, /**< \brief SCU/EVR EVR 1.3V under voltage */
152 IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 12, /**< \brief SCU/EVR EVR 1.3V over voltage */
153 IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 13, /**< \brief SCU/EVR EVR 3.3V under voltage */
154 IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 14, /**< \brief SCU/EVR EVR 3.3V over voltage */
155 IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 15, /**< \brief SCU/EVR External Supply under voltage */
156 IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 16, /**< \brief SCU/EVR External Supply over voltage */
157 IfxSmu_Alarm_ScuWdtsWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 17, /**< \brief SCU/WDTS watchdog time-out */
158 IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 18, /**< \brief SCU/WDTCPU0 watchdog time-out */
159 IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 19, /**< \brief SCU/WDTCPU1 watchdog time-out */
160 IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 20, /**< \brief SCU/WDTCPU2 watchdog time-out */
161 IfxSmu_Alarm_ScuWdtWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 21, /**< \brief SCU/WDT watchdog time-out */
162 IfxSmu_Alarm_SpbAccessEnableError = (IfxSmu_AlarmGroup_3 << 8) | 22, /**< \brief SPB Access Enable Error */
163 IfxSmu_Alarm_ScuDtsTemperatureUnderflow = (IfxSmu_AlarmGroup_3 << 8) | 25, /**< \brief SCU/DTS Temperature underflow */
164 IfxSmu_Alarm_ScuDtsTemperatureOverflow = (IfxSmu_AlarmGroup_3 << 8) | 26, /**< \brief SCU/DTS Temperature overflow */
165 IfxSmu_Alarm_ScuExternalEmergencyStopSignal = (IfxSmu_AlarmGroup_3 << 8) | 29, /**< \brief SCU External Emergency Stop Signal */
166 IfxSmu_Alarm_SriBusError = (IfxSmu_AlarmGroup_3 << 8) | 30, /**< \brief SRI Bus error */
167 IfxSmu_Alarm_SpbBusError = (IfxSmu_AlarmGroup_3 << 8) | 31, /**< \brief SPB Bus error */
168 IfxSmu_Alarm_GtmSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 0, /**< \brief GTM SRAM single-bit correction */
169 IfxSmu_Alarm_GtmSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 1, /**< \brief GTM SRAM uncorrectable error */
170 IfxSmu_Alarm_GtmSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 2, /**< \brief GTM SRAM address error */
171 IfxSmu_Alarm_GtmSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 3, /**< \brief GTM SRAM Address Buffer overflow */
172 IfxSmu_Alarm_CanSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 4, /**< \brief CAN SRAM single-bit correction */
173 IfxSmu_Alarm_CanSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 5, /**< \brief CAN SRAM uncorrectable error */
174 IfxSmu_Alarm_CanSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 6, /**< \brief CAN SRAM address error */
175 IfxSmu_Alarm_CanSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 7, /**< \brief CAN SRAM Address Buffer overflow */
176 IfxSmu_Alarm_FlexraySramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 8, /**< \brief FLEXRAY SRAM single-bit correction */
177 IfxSmu_Alarm_FlexraySramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 9, /**< \brief FLEXRAY SRAM uncorrectable error */
178 IfxSmu_Alarm_FlexraySramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 10, /**< \brief FLEXRAY SRAM address error */
179 IfxSmu_Alarm_FlexraySramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 11, /**< \brief FLEXRAY SRAM Address Buffer overflow */
180 IfxSmu_Alarm_EmemSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 12, /**< \brief EMEM SRAM single-bit correction */
181 IfxSmu_Alarm_EmemSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 13, /**< \brief EMEM SRAM uncorrectable error */
182 IfxSmu_Alarm_EmemSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 15, /**< \brief EMEM SRAM Address Buffer overflow */
183 IfxSmu_Alarm_SramsSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 16, /**< \brief SRAMs SRAM single-bit correction */
184 IfxSmu_Alarm_SramsSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 17, /**< \brief SRAMs SRAM uncorrectable error */
185 IfxSmu_Alarm_SramsSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 18, /**< \brief SRAMs SRAM address error */
186 IfxSmu_Alarm_SramsSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 19, /**< \brief SRAMs SRAM Address Buffer overflow */
187 IfxSmu_Alarm_SoftwareAlarm0 = (IfxSmu_AlarmGroup_5 << 8) | 0, /**< \brief Software Alarm 0 */
188 IfxSmu_Alarm_SoftwareAlarm1 = (IfxSmu_AlarmGroup_5 << 8) | 1, /**< \brief Software Alarm 1 */
189 IfxSmu_Alarm_SoftwareAlarm2 = (IfxSmu_AlarmGroup_5 << 8) | 2, /**< \brief Software Alarm 2 */
190 IfxSmu_Alarm_SoftwareAlarm3 = (IfxSmu_AlarmGroup_5 << 8) | 3, /**< \brief Software Alarm 3 */
191 IfxSmu_Alarm_SoftwareAlarm4 = (IfxSmu_AlarmGroup_5 << 8) | 4, /**< \brief Software Alarm 4 */
192 IfxSmu_Alarm_SoftwareAlarm5 = (IfxSmu_AlarmGroup_5 << 8) | 5, /**< \brief Software Alarm 5 */
193 IfxSmu_Alarm_SoftwareAlarm6 = (IfxSmu_AlarmGroup_5 << 8) | 6, /**< \brief Software Alarm 6 */
194 IfxSmu_Alarm_SoftwareAlarm7 = (IfxSmu_AlarmGroup_5 << 8) | 7, /**< \brief Software Alarm 7 */
195 IfxSmu_Alarm_SoftwareAlarm8 = (IfxSmu_AlarmGroup_5 << 8) | 8, /**< \brief Software Alarm 8 */
196 IfxSmu_Alarm_SoftwareAlarm9 = (IfxSmu_AlarmGroup_5 << 8) | 9, /**< \brief Software Alarm 9 */
197 IfxSmu_Alarm_SoftwareAlarm10 = (IfxSmu_AlarmGroup_5 << 8) | 10, /**< \brief Software Alarm 10 */
198 IfxSmu_Alarm_SoftwareAlarm11 = (IfxSmu_AlarmGroup_5 << 8) | 11, /**< \brief Software Alarm 11 */
199 IfxSmu_Alarm_SoftwareAlarm12 = (IfxSmu_AlarmGroup_5 << 8) | 12, /**< \brief Software Alarm 12 */
200 IfxSmu_Alarm_SoftwareAlarm13 = (IfxSmu_AlarmGroup_5 << 8) | 13, /**< \brief Software Alarm 13 */
201 IfxSmu_Alarm_SoftwareAlarm14 = (IfxSmu_AlarmGroup_5 << 8) | 14, /**< \brief Software Alarm 14 */
202 IfxSmu_Alarm_SoftwareAlarm15 = (IfxSmu_AlarmGroup_5 << 8) | 15, /**< \brief Software Alarm 15 */
203 IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_6 << 8) | 1, /**< \brief CPU2 Bus-level MPU violation / Access Protection violation */
204 IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 3, /**< \brief CPU2 PCACHE TAG uncorrectable error */
205 IfxSmu_Alarm_Cpu2PcacheTagAddressError = (IfxSmu_AlarmGroup_6 << 8) | 4, /**< \brief CPU2 PCACHE TAG address error */
206 IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 5, /**< \brief CPU2 PCACHE TAG Address Buffer overflow */
207 IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 6, /**< \brief CPU2 Unified PCACHE/PSPR single-bit correction */
208 IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 7, /**< \brief CPU2 Unified PCACHE/PSPR uncorrectable error */
209 IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 8, /**< \brief CPU2 Unified PCACHE/PSPR Address error */
210 IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 9, /**< \brief CPU2 Unified PCACHE/PSPR Address Buffer overflow */
211 IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 10, /**< \brief CPU2 Unified DCACHE/DSPR single-bit correction */
212 IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 11, /**< \brief CPU2 Unified DCACHE/DSPR uncorrectable error */
213 IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 12, /**< \brief CPU2 Unified DCACHE/DSPR address error */
214 IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 13, /**< \brief CPU2 Unified DCACHE/DSPR Address Buffer overflow */
215 IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 14, /**< \brief CPU2 DCACHE TAG SRAM single-bit correction */
216 IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 15, /**< \brief CPU2 DCACHE TAG SRAM uncorrectable error */
217 IfxSmu_Alarm_Cpu2DcacheTagSramAddressError = (IfxSmu_AlarmGroup_6 << 8) | 16, /**< \brief CPU2 DCACHE TAG SRAM Address error */
218 IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 17, /**< \brief CPU2 DCACHE TAG SRAM Address buffer overflow */
219 IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 18, /**< \brief CPU2 CPU Instruction Fetch SRI Interface EDC Error */
220 IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 19, /**< \brief CPU2 CPU Data SRI Interface (Load/Store) EDC Error */
221 IfxSmu_Alarm_noAlarm /**< \brief Special flag to inform about no alarm (Software only) */
222 } IfxSmu_Alarm;
223
224 /** \} */
225
226
227 #endif /* IFXSMU_CFG_H */
IfxSmu_Alarm_SoftwareAlarm5
Software Alarm 5.
Definition: IfxSmu_cfg.h:192
IfxSmu_Alarm_ScuExternalEmergencyStopSignal
SCU External Emergency Stop Signal.
Definition: IfxSmu_cfg.h:165
IfxSmu_Alarm_FlexraySramAddressError
FLEXRAY SRAM address error.
Definition: IfxSmu_cfg.h:178
IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage
SCU/EVR EVR 3.3V over voltage.
Definition: IfxSmu_cfg.h:154
IfxSmu_Alarm_CanSramSingleBitCorrection
CAN SRAM single-bit correction.
Definition: IfxSmu_cfg.h:172
IfxSmu_Alarm_EmemSramAddressBufferOverflow
EMEM SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:182
IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency
SCU/CGU STM clock out of range frequency.
Definition: IfxSmu_cfg.h:144
IfxSmu_Alarm_SpbAccessEnableError
SPB Access Enable Error.
Definition: IfxSmu_cfg.h:162
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection
CPU2 Unified DCACHE/DSPR single-bit correction.
Definition: IfxSmu_cfg.h:211
IfxSmu_Alarm_SpbBusError
SPB Bus error.
Definition: IfxSmu_cfg.h:167
IfxSmu_Alarm_Cpu0LockstepComparatorError
CPU0 Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:87
IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection
CPU2 Bus-level MPU violation / Access Protection violation.
Definition: IfxSmu_cfg.h:203
IfxSmu_Alarm_SoftwareAlarm7
Software Alarm 7.
Definition: IfxSmu_cfg.h:194
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError
CPU2 Unified DCACHE/DSPR uncorrectable error.
Definition: IfxSmu_cfg.h:212
IfxSmu_Alarm_FlexraySramUncorrectableError
FLEXRAY SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:177
IfxSmu_Alarm_SoftwareAlarm8
Software Alarm 8.
Definition: IfxSmu_cfg.h:195
IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError
CPU0 PCACHE TAG uncorrectable error.
Definition: IfxSmu_cfg.h:89
IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut
SCU/WDTCPU1 watchdog time-out.
Definition: IfxSmu_cfg.h:159
IfxSmu_Alarm_GtmSramSingleBitCorrection
GTM SRAM single-bit correction.
Definition: IfxSmu_cfg.h:168
IfxSmu_Alarm_SoftwareAlarm3
Software Alarm 3.
Definition: IfxSmu_cfg.h:190
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError
CPU1 Unified DCACHE/DSPR uncorrectable error.
Definition: IfxSmu_cfg.h:111
IfxSmu_Alarm_GtmSramAddressBufferOverflow
GTM SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:171
IfxSmu_Alarm_SriEdcWritePhaseError
SRI EDC Write phase error.
Definition: IfxSmu_cfg.h:134
IfxSmu_Alarm_PmuSingleBitCorrection
PMU single bit correction.
Definition: IfxSmu_cfg.h:120
IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow
CPU2 PCACHE TAG Address Buffer overflow.
Definition: IfxSmu_cfg.h:206
IfxSmu_Alarm_SoftwareAlarm4
Software Alarm 4.
Definition: IfxSmu_cfg.h:191
IfxSmu_Alarm_SramsSramUncorrectableError
SRAMs SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:184
IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection
CPU0 Bus-level MPU violation / Access Protection violation.
Definition: IfxSmu_cfg.h:88
IfxSmu_Alarm_SoftwareAlarm0
Software Alarm 0.
Definition: IfxSmu_cfg.h:187
IfxSmu_Alarm_PmuDoubleBitCorrection
PMU double bit correction.
Definition: IfxSmu_cfg.h:121
IfxSmu_Alarm_CanSramAddressError
CAN SRAM address error.
Definition: IfxSmu_cfg.h:174
IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError
CPU0 Unified PCACHE/PSPR uncorrectable error.
Definition: IfxSmu_cfg.h:93
IfxSmu_Alarm_PmuNonCorrectableMultipleBit
PMU non correctable multiple bit.
Definition: IfxSmu_cfg.h:122
IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency
SCU/CGU SRI clock out of range frequency.
Definition: IfxSmu_cfg.h:147
IfxSmu_Alarm_IrEdcError
IR EDC error.
Definition: IfxSmu_cfg.h:136
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow
CPU2 Unified DCACHE/DSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:214
IfxSmu_AlarmGroup_0
Alarm group 0.
Definition: IfxSmu_cfg.h:62
IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError
CPU2 CPU Instruction Fetch SRI Interface EDC Error.
Definition: IfxSmu_cfg.h:219
IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection
CPU1 Bus-level MPU violation / Access Protection violation.
Definition: IfxSmu_cfg.h:102
IfxSmu_Alarm_PmuPflashEccError
PMU PFLASH ECC error.
Definition: IfxSmu_cfg.h:125
IfxSmu_Alarm_ScuCguInputClockOutOfRange
SCU/CGU input clock out of range.
Definition: IfxSmu_cfg.h:141
IfxSmu_Alarm_SmuTimer1TimeOut
SMU Timer 1 time-out.
Definition: IfxSmu_cfg.h:139
IfxSmu_Alarm_SoftwareAlarm11
Software Alarm 11.
Definition: IfxSmu_cfg.h:198
IfxSmu_RecoveryTimer_0
Recovery Timer 0.
Definition: IfxSmu_cfg.h:75
IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow
CPU2 DCACHE TAG SRAM Address buffer overflow.
Definition: IfxSmu_cfg.h:218
IfxSmu_Alarm_LmuEccError
LMU ECC Error.
Definition: IfxSmu_cfg.h:127
IfxSmu_Alarm_LmuSramAddressError
LMU SRAM Address error.
Definition: IfxSmu_cfg.h:131
IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection
CPU0 Unified PCACHE/PSPR single-bit correction.
Definition: IfxSmu_cfg.h:92
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow
CPU1 Unified DCACHE/DSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:113
IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection
CPU2 DCACHE TAG SRAM single-bit correction.
Definition: IfxSmu_cfg.h:215
IfxSmu_RecoveryTimer
IfxSmu_RecoveryTimer
Recovery Timer
Definition: IfxSmu_cfg.h:73
IfxSmu_Alarm_IomPinMismatchIndication
IOM Pin Mismatch Indication.
Definition: IfxSmu_cfg.h:137
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow
CPU0 Unified DCACHE/DSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:99
IfxSmu_Alarm_SoftwareAlarm6
Software Alarm 6.
Definition: IfxSmu_cfg.h:193
IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError
CPU0 CPU Data SRI Interface (Load/Store) EDC Error.
Definition: IfxSmu_cfg.h:100
IfxSmu_AlarmGroup_3
Alarm group 3.
Definition: IfxSmu_cfg.h:65
IfxSmu_AlarmGroup_4
Alarm group 4.
Definition: IfxSmu_cfg.h:66
IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError
CPU2 DCACHE TAG SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:216
IfxSmu_Alarm_GtmSramAddressError
GTM SRAM address error.
Definition: IfxSmu_cfg.h:170
IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError
CPU1 CPU Data SRI Interface (Load/Store) EDC Error.
Definition: IfxSmu_cfg.h:119
IfxSmu_Alarm_CanSramAddressBufferOverflow
CAN SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:175
IfxSmu_Alarm_Cpu1LockstepComparatorError
CPU1 Lockstep Comparator Error.
Definition: IfxSmu_cfg.h:101
IfxSmu_Alarm_CanSramUncorrectableError
CAN SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:173
IfxSmu_AlarmGroup_5
Alarm group 5.
Definition: IfxSmu_cfg.h:67
IfxSmu_Alarm_SoftwareAlarm13
Software Alarm 13.
Definition: IfxSmu_cfg.h:200
IfxSmu_Alarm
IfxSmu_Alarm
SMU Alarm list
Definition: IfxSmu_cfg.h:85
IfxSmu_Alarm_ScuDtsTemperatureUnderflow
SCU/DTS Temperature underflow.
Definition: IfxSmu_cfg.h:163
IfxSmu_Alarm_Cpu2PcacheTagAddressError
CPU2 PCACHE TAG address error.
Definition: IfxSmu_cfg.h:205
IfxSmu_Alarm_SoftwareAlarm1
Software Alarm 1.
Definition: IfxSmu_cfg.h:188
IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency
SCU/CGU ADC clock out of range frequency.
Definition: IfxSmu_cfg.h:150
IfxSmu_Alarm_ScuWdtsWatchdogTimeOut
SCU/WDTS watchdog time-out.
Definition: IfxSmu_cfg.h:157
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError
CPU0 Unified DCACHE/DSPR address error.
Definition: IfxSmu_cfg.h:98
IfxSmu_Alarm_SoftwareAlarm12
Software Alarm 12.
Definition: IfxSmu_cfg.h:199
IfxSmu_Alarm_LmuSramSingleBitCorrection
LMU SRAM single-bit correction.
Definition: IfxSmu_cfg.h:129
IfxSmu_Alarm_GtmSramUncorrectableError
GTM SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:169
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError
CPU1 Unified PCACHE/PSPR Address error.
Definition: IfxSmu_cfg.h:108
IfxSmu_Alarm_Cpu1DcacheTagSramAddressError
CPU1 DCACHE TAG SRAM address error.
Definition: IfxSmu_cfg.h:116
IfxSmu_Alarm_ScuDtsTemperatureOverflow
SCU/DTS Temperature overflow.
Definition: IfxSmu_cfg.h:164
IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow
CPU1 DCACHE TAG SRAM address buffer overflow.
Definition: IfxSmu_cfg.h:117
IfxSmu_Alarm_LmuSramAddressBufferOverflow
LMU SRAM Address buffer overflow.
Definition: IfxSmu_cfg.h:132
IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError
CPU1 CPU Instruction Fetch SRI Interface EDC Error.
Definition: IfxSmu_cfg.h:118
IfxSmu_Alarm_SramsSramSingleBitCorrection
SRAMs SRAM single-bit correction.
Definition: IfxSmu_cfg.h:183
IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow
CPU0 PCACHE TAG Address Buffer overflow.
Definition: IfxSmu_cfg.h:91
IfxSmu_Alarm_LmuSramUncorrectableError
LMU SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:130
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError
CPU0 Unified DCACHE/DSPR uncorrectable error.
Definition: IfxSmu_cfg.h:97
IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError
CPU2 Unified PCACHE/PSPR uncorrectable error.
Definition: IfxSmu_cfg.h:208
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow
CPU2 Unified PCACHE/PSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:210
IfxSmu_Alarm_PmuAddressBufferFull
PMU address buffer full.
Definition: IfxSmu_cfg.h:124
IfxSmu_Alarm_SriEdcReadPhaseError
SRI EDC Read phase error.
Definition: IfxSmu_cfg.h:135
IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow
CPU1 Unified PCACHE/PSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:109
IfxSmu_Alarm_FlexraySramSingleBitCorrection
FLEXRAY SRAM single-bit correction.
Definition: IfxSmu_cfg.h:176
IfxSmu_Alarm_PmuAddressingError
PMU Addressing error.
Definition: IfxSmu_cfg.h:123
IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection
CPU1 Unified PCACHE/PSPR single-bit correction.
Definition: IfxSmu_cfg.h:106
IfxSmu_Alarm_Cpu0PcacheTagAddressError
CPU0 PCACHE TAG address error.
Definition: IfxSmu_cfg.h:90
IfxSmu_AlarmGroup_2
Alarm group 2.
Definition: IfxSmu_cfg.h:64
IfxSmu_Alarm_Cpu2DcacheTagSramAddressError
CPU2 DCACHE TAG SRAM Address error.
Definition: IfxSmu_cfg.h:217
IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent
SCU/CGU System PLL VCO Loss-of-Lock Event.
Definition: IfxSmu_cfg.h:142
IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError
CPU1 PCACHE TAG uncorrectable error.
Definition: IfxSmu_cfg.h:103
IfxSmu_Alarm_FlexraySramAddressBufferOverflow
FLEXRAY SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:179
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError
CPU1 Unified DCACHE/DSPR address error.
Definition: IfxSmu_cfg.h:112
IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage
SCU/EVR External Supply under voltage.
Definition: IfxSmu_cfg.h:155
IfxSmu_Alarm_ScuWdtWatchdogTimeOut
SCU/WDT watchdog time-out.
Definition: IfxSmu_cfg.h:161
IfxSmu_Alarm_Cpu1PcacheTagAddressError
CPU1 PCACHE TAG address error.
Definition: IfxSmu_cfg.h:104
IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent
SCU/CGU PLL_ERAY VCO Loss-of-Lock Event.
Definition: IfxSmu_cfg.h:143
IfxSmu_Alarm_SriBusError
SRI Bus error.
Definition: IfxSmu_cfg.h:166
IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency
SCU/CGU PLL_ERAY out of range frequency.
Definition: IfxSmu_cfg.h:145
IfxSmu_RecoveryTimer_1
Recovery Timer 1.
Definition: IfxSmu_cfg.h:76
IfxSmu_Alarm_SriEdcAddressPhaseError
SRI EDC Address phase error.
Definition: IfxSmu_cfg.h:133
IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError
CPU2 CPU Data SRI Interface (Load/Store) EDC Error.
Definition: IfxSmu_cfg.h:220
IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError
CPU2 Unified DCACHE/DSPR address error.
Definition: IfxSmu_cfg.h:213
IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency
SCU/CGU System PLL out of range frequency.
Definition: IfxSmu_cfg.h:146
IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow
CPU1 PCACHE TAG Address Buffer overflow.
Definition: IfxSmu_cfg.h:105
IfxSmu_Alarm_EmemSramSingleBitCorrection
EMEM SRAM single-bit correction.
Definition: IfxSmu_cfg.h:180
IfxSmu_Alarm_EmemSramUncorrectableError
EMEM SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:181
IfxSmu_Alarm_SramsSramAddressError
SRAMs SRAM address error.
Definition: IfxSmu_cfg.h:185
IfxSmu_Alarm_SramsSramAddressBufferOverflow
SRAMs SRAM Address Buffer overflow.
Definition: IfxSmu_cfg.h:186
IfxSmu_AlarmGroup
IfxSmu_AlarmGroup
Alarm group
Definition: IfxSmu_cfg.h:60
IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage
SCU/EVR EVR 1.3V over voltage.
Definition: IfxSmu_cfg.h:152
IfxSmu_Alarm_SoftwareAlarm2
Software Alarm 2.
Definition: IfxSmu_cfg.h:189
IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage
SCU/EVR External Supply over voltage.
Definition: IfxSmu_cfg.h:156
IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency
SCU/CGU SPB clock out of range frequency.
Definition: IfxSmu_cfg.h:148
IfxSmu_Alarm_SoftwareAlarm10
Software Alarm 10.
Definition: IfxSmu_cfg.h:197
IfxSmu_Alarm_noAlarm
Special flag to inform about no alarm (Software only)
Definition: IfxSmu_cfg.h:221
IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError
CPU2 PCACHE TAG uncorrectable error.
Definition: IfxSmu_cfg.h:204
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError
CPU0 Unified PCACHE/PSPR Address error.
Definition: IfxSmu_cfg.h:94
IfxSmu_Alarm_SmuTimer0TimeOut
SMU Timer 0 time-out.
Definition: IfxSmu_cfg.h:138
IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage
SCU/EVR EVR 3.3V under voltage.
Definition: IfxSmu_cfg.h:153
IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut
SCU/WDTCPU2 watchdog time-out.
Definition: IfxSmu_cfg.h:160
IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut
SCU/WDTCPU0 watchdog time-out.
Definition: IfxSmu_cfg.h:158
IfxSmu_Alarm_Cpu1DcacheTagSramCorrection
CPU1 DCACHE TAG SRAM correction.
Definition: IfxSmu_cfg.h:114
IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection
CPU1 Unified DCACHE/DSPR single-bit correction.
Definition: IfxSmu_cfg.h:110
IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection
CPU2 Unified PCACHE/PSPR single-bit correction.
Definition: IfxSmu_cfg.h:207
IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow
CPU0 Unified PCACHE/PSPR Address Buffer overflow.
Definition: IfxSmu_cfg.h:95
IfxSmu_Alarm_SoftwareAlarm9
Software Alarm 9.
Definition: IfxSmu_cfg.h:196
IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency
SCU/CGU GTM clock out of range frequency.
Definition: IfxSmu_cfg.h:149
IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection
CPU0 Unified DCACHE/DSPR single-bit correction.
Definition: IfxSmu_cfg.h:96
IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError
LMU Register Access Protection error / Bus-level MPU error.
Definition: IfxSmu_cfg.h:128
IfxSmu_Alarm_SoftwareAlarm14
Software Alarm 14.
Definition: IfxSmu_cfg.h:201
IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError
CPU1 DCACHE TAG SRAM uncorrectable error.
Definition: IfxSmu_cfg.h:115
IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage
SCU/EVR EVR 1.3V under voltage.
Definition: IfxSmu_cfg.h:151
IfxSmu_AlarmGroup_1
Alarm group 1.
Definition: IfxSmu_cfg.h:63
IfxSmu_Alarm_SmuErrorPinFaultStateActivation
SMU ErrorPin Fault State Activation.
Definition: IfxSmu_cfg.h:140
IfxSmu_AlarmGroup_6
Alarm group 6.
Definition: IfxSmu_cfg.h:68
IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError
CPU1 Unified PCACHE/PSPR uncorrectable error.
Definition: IfxSmu_cfg.h:107
IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError
CPU2 Unified PCACHE/PSPR Address error.
Definition: IfxSmu_cfg.h:209
IfxSmu_Alarm_SoftwareAlarm15
Software Alarm 15.
Definition: IfxSmu_cfg.h:202
IfxSmu_Alarm_PmuEdcComparatorError
PMU EDC comparator error.
Definition: IfxSmu_cfg.h:126


iLLD_TC26B: IfxSrc.c Source File

  • Src
  • Std
IfxSrc.c
Go to the documentation of this file.
1 /**
2 * \file IfxSrc.c
3 * \brief SRC basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxSrc.h"
IfxSrc.h
SRC basic functionality.


iLLD_TC26B: IfxSrc.h Source File

  • Src
  • Std
IfxSrc.h
Go to the documentation of this file.
1 /**
2 * \file IfxSrc.h
3 * \brief SRC basic functionality
4 * \ingroup IfxLld_Src
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Src SRC
25 * \addtogroup IfxLld_Src
26 * \{
27 * \defgroup IfxLld_Src_Usage How to use Service Request Mechanism?
28 * \addtogroup IfxLld_Src_Usage
29 * \{
30 *
31 * For Aurix controller peripherals that can generate service requests is connected to one
32 * or more Service Request Nodes (SRNs) in the central Interrupt Router(IR) module. Refer to Controller User Manual for more details\n
33 *
34 * IfxSrc driver provides the APIs to configure and control service requests. Refer \ref IfxLld_Src_Usage for
35 * details of these APIs.
36 *
37 *
38 * \section Ifx_Src_UsageInit Initialize the Service Request Node
39 *
40 * Service request node is initialized to configure the following,\n
41 * 1) Route the interrupt trigger to service provider, which are:\n
42 * __a. One of the available CPUs or\n
43 * __b. DMA controller\n
44 *
45 * 2) Priority of CPU Interrupt or DMA Trigger.
46 *
47 * For Interrupt or DMA to be correctly triggered, following steps are to be done in the user code:
48 *
49 * \subsection Ifx_Src_UsageInitStep1 Step1: Configure the Node
50 *
51 * User must configure the service request node in the application / driver files.
52 *
53 * \subsection Ifx_Src_UsageInitStep2 Step2: Enable the Trigger
54 *
55 * Enable the service request node to connect the trigger event from the hardware to service provider.
56 *
57 * Example:
58 * Following example show the configuration for STM0 Service request 0 trigger configured to trigger
59 * CPU1 with the priority specified by IFX_INTPRIO_STM0 (from the example at IfxCpu_Irq)
60 *
61 * \code
62 * //file: myApplication.c
63 *
64 * #include "Ifx_IntPrioDef.h" // to get the priority numbers
65 *
66 * void myDriverInitFunction(void)
67 * {
68 * // driver init code
69 *
70 * // Step1: Call the function to route the trigger from for SRC_STM0_SR0 to CPU1
71 * // and priority specified at Ifx_IntPrioDef.h globally
72 * IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0, IfxSrc_Tos_cpu1, IFX_INTPRIO_STM0);
73 *
74 * // Step2: Enable the service request node
75 * IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0);
76 * }
77 * \endcode
78 *
79 * \}
80 * \}
81 *
82 * \defgroup IfxLld_Src_Std_Service_Request Service Request Functions
83 * \ingroup IfxLld_Src_Std
84 * \defgroup IfxLld_Src_Std_Module Module Functions
85 * \ingroup IfxLld_Src_Std
86 */
87
88 #ifndef IFXSRC_H
89 #define IFXSRC_H 1
90
91 /******************************************************************************/
92 /*----------------------------------Includes----------------------------------*/
93 /******************************************************************************/
94
95 #include "_Impl/IfxSrc_cfg.h"
96 #include "Cpu/Std/IfxCpu_Intrinsics.h"
97 #include "IfxSrc_reg.h"
98 /** \addtogroup IfxLld_Src_Std_Service_Request
99 * \{ */
100
101 /******************************************************************************/
102 /*-------------------------Inline Function Prototypes-------------------------*/
103 /******************************************************************************/
104
105 /** \brief Resets the overrun flag of the Service Request.
106 * \param src pointer to the Service Request Control register which the overrun flag should be cleared.
107 * \return None
108 *
109 * Usage example: see \ref IfxSrc_init
110 *
111 */
112 IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src);
113
114 /** \brief Resets a specific interrupt service by software.
115 * \param src pointer to the Service Request Control register which the request should be cleared.
116 * \return None
117 *
118 * Usage example: see \ref IfxSrc_init
119 *
120 */
121 IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src);
122
123 /** \brief Gets the current overrun status.
124 * \param src pointer to the Service Request Control register for which the overrun status should be returned.
125 * \return current service request control overrun status.
126 *
127 * Usage example: see \ref IfxSrc_init
128 *
129 */
130 IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src);
131
132 /** \brief Gets the current request status.
133 * \param src pointer to the Service Request Control register for which the request status should be returned.
134 * \return current service request control request status.
135 *
136 * Usage example: see \ref IfxSrc_init
137 *
138 */
139 IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src);
140
141 /** \brief Requests a specific interrupt service by software
142 * \param src pointer to the Service Request Control register which the interrupt has to be requested.
143 * \return None
144 *
145 * Usage example: see \ref IfxSrc_init
146 *
147 */
148 IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src);
149
150 /** \} */
151
152 /** \addtogroup IfxLld_Src_Std_Module
153 * \{ */
154
155 /******************************************************************************/
156 /*-------------------------Inline Function Prototypes-------------------------*/
157 /******************************************************************************/
158
159 /** \brief DeInitializes the service request control register.
160 * \param src pointer to the Service Request Control register which should be deinitialised.
161 * \return None
162 *
163 * Usage example: see \ref IfxSrc_init
164 *
165 */
166 IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src);
167
168 /** \brief Disables a specific interrupt service request.
169 * \param src pointer to the Service Request Control register for which the interrupt has to be disabled.
170 * \return None
171 *
172 * Usage example: see \ref IfxSrc_init
173 *
174 */
175 IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src);
176
177 /** \brief Enables a specific interrupt service request.
178 * \param src pointer to the Service Request Control register for which the interrupt has to be enabled.
179 * \return None
180 *
181 * Usage example: see \ref IfxSrc_init
182 *
183 */
184 IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src);
185
186 /** \brief Initializes the service request control register.
187 * \param src pointer to the Service Request Control register which should be initialised.
188 * \param typOfService type of interrupt service provider.
189 * \param priority Interrupt priority.
190 * \return None
191 *
192 * Get the peripheral service control register which request need to be serviced and assign this service to any of service providers.
193 * \code
194 * //define the interrupt priority
195 * #define IFXASCLIN0_TX_INTPRIO 2
196 * //get the service request
197 * volatile Ifx_SRC_SRCR *src = IfxAsclin_getSrcPointerRx( &MODULE_ASCLIN0 );
198 * //initlaise the service request
199 * IfxSrc_init( src, IfxSrc_Tos_cpu0, IFXASCLIN0_TX_INTPRIO );
200 * // enable the service
201 * IfxSrc_enable( src );
202 * //check for service request flags and clear if they occur
203 * if ( IfxSrc_isRequested( src ) == TRUE )
204 * {
205 * IfxSrc_clearRequest( src );
206 * }
207 * if ( IfxSrc_isOverrun( src ) == TRUE )
208 * {
209 * IfxSrc_clearOverrun( src );
210 * }
211 * // Atlast deinitialise the service control
212 * IfxSrc_deinit( src );
213 * \endcode
214 *
215 */
216 IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority);
217
218 /** \} */
219
220 /******************************************************************************/
221 /*---------------------Inline Function Implementations------------------------*/
222 /******************************************************************************/
223
224 IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src)
225 {
226 src->B.IOVCLR = 1;
227 }
228
229
230 IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
231 {
232 src->B.CLRR = 1;
233 }
234
235
236 IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src)
237 {
238 src->U = 0;
239 }
240
241
242 IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
243 {
244 src->B.SRE = 0;
245 }
246
247
248 IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
249 {
250 src->B.SRE = 1;
251 }
252
253
254 IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
255 {
256 src->B.SRPN = priority;
257 src->B.TOS = typOfService;
258 IfxSrc_clearRequest(src);
259 }
260
261
262 IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src)
263 {
264 return src->B.IOV ? TRUE : FALSE;
265 }
266
267
268 IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src)
269 {
270 return src->B.SRR ? TRUE : FALSE;
271 }
272
273
274 IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src)
275 {
276 src->B.SETR = 1;
277 }
278
279
280 #endif /* IFXSRC_H */
IfxSrc_clearOverrun
IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src)
Resets the overrun flag of the Service Request.
Definition: IfxSrc.h:224
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxSrc_disable
IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
Disables a specific interrupt service request.
Definition: IfxSrc.h:242
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxCpu_Intrinsics.h
FALSE
#define FALSE
Definition: Platform_Types.h:90
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxSrc_deinit
IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src)
DeInitializes the service request control register.
Definition: IfxSrc.h:236
IfxSrc_cfg.h
SRC on-chip implementation data.
IfxSrc_isRequested
IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src)
Gets the current request status.
Definition: IfxSrc.h:268
IfxSrc_isOverrun
IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src)
Gets the current overrun status.
Definition: IfxSrc.h:262
IfxSrc_clearRequest
IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
Resets a specific interrupt service by software.
Definition: IfxSrc.h:230
IfxSrc_setRequest
IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src)
Requests a specific interrupt service by software.
Definition: IfxSrc.h:274
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254


iLLD_TC26B: IfxSrc_cfg.c Source File

  • _Impl
IfxSrc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxSrc_cfg.c
3 * \brief SRC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxSrc_cfg.h"
IfxSrc_cfg.h
SRC on-chip implementation data.


iLLD_TC26B: IfxSrc_cfg.h Source File

  • _Impl
IfxSrc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxSrc_cfg.h
3 * \brief SRC on-chip implementation data
4 * \ingroup IfxLld_Src
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Src SRC
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Src_Impl Implementation
27 * \ingroup IfxLld_Src
28 * \defgroup IfxLld_Src_Std Standard Driver
29 * \ingroup IfxLld_Src
30 * \defgroup IfxLld_Src_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Src_Impl
32 */
33
34 #ifndef IFXSRC_CFG_H
35 #define IFXSRC_CFG_H 1
36
37 /******************************************************************************/
38 /*----------------------------------Includes----------------------------------*/
39 /******************************************************************************/
40
41 /******************************************************************************/
42 /*--------------------------------Enumerations--------------------------------*/
43 /******************************************************************************/
44
45 /** \addtogroup IfxLld_Src_Impl_Enumerations
46 * \{ */
47 /** \brief Identifier of interrupt service provider, which handles the interrupt service request.
48 */
49 typedef enum
50 {
51 IfxSrc_Tos_cpu0 = 0, /**< \brief CPU0 interrupt service provider, which handles the interrupt service request. */
52 IfxSrc_Tos_cpu1 = 1, /**< \brief CPU1 interrupt service provider, which handles the interrupt service request. */
53 IfxSrc_Tos_dma = 3 /**< \brief DMA interrupt service provider, which handles the interrupt service request. */
54 } IfxSrc_Tos;
55
56 /** \} */
57
58 #endif /* IFXSRC_CFG_H */
IfxSrc_Tos_cpu1
CPU1 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:52
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxSrc_Tos_dma
DMA interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:53
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51


iLLD_TC26B: IfxStdIf.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf.h
3 * \brief Standard interface types
4 * \ingroup IfxLld
5 *
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:23 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup library_srvsw_stdif Standard interface
26 * \ingroup library_srvsw
27 *
28 *
29 *
30 * \par Terms
31 *
32 * Term | Description
33 * ------------------------- | -------
34 * Standard Interface | Interface defined in this document
35 * Interface Driver | Specific device driver as defined by the iLLD
36 * Standard Interface Driver | Specific interface driver which implements the Standard Interface
37 * API used at runtime | API that are used after initialization
38 * Module | Hardware functional block / IP
39 *
40 * \par Overview
41 * The Standard Interface provides generic runtime API written in C for common use case application. It abstracts the underlaying Interface Driver,
42 * i.e. the runtime API is completely device independent. It provides generic API for common use case application.
43 *
44 * Example of Standard Interface:
45 * - Serial communication interface
46 * - PWM interface
47 * - Position sensor interface
48 * - Timer interface
49 * - EEPROM interface
50 *
51 * The target is to be able to exchange the microcontroller or external connected devices on which the application is based with a minimal impact
52 * on the application code, to reduce the application software development and maintenance effort. This is archived by the Standard Interface,
53 * for which, changing the hardware only requires the update of the device configuration settings and the device initialization code. The API used
54 * at runtime, which represents the majority and the complexitity of the related code keep unchanged.
55 *
56 * Motivation: because the current software developed for the automotive applications mainly don’t use C++, the Standard Interface provides a common
57 * definition for the device driver and an alternative layer for different hardware instead of using C++ interface wrapper class.
58 *
59 *
60 * The below figure shows the layers used and an example of APIs used by the application.
61 * \image html "StandardInterfaceLayers.png" "Standard interface layers"
62 * \image html "StandardInterfaceDataPipeExample.png" "Standard interface example: Serial interface as data pipe"
63 * \image html "StandardInterfaceTimerExample.png" "Standard interface example: Timer"
64 *
65 * The Standard Interface is implemented by Standard Interface wrapper by providing the function pointer to the custom functions. This gives
66 * the possibility to the programmer to use it or not. When used, it increases the code portability but slightly decreases the performance in
67 * term of run time execution and code size. When not used, the performance is not affected.
68 *
69 *
70 * \par Definition
71 * The standard interface requires the definition of at least two components: the standard interface component and the standard interface wrapper
72 * component. The standard interface component defines for each standard interface a standard interface object and a set of standard APIs used at
73 * runtime by the application. The standard interface wrapper component initializes the standard interface component by linking it to the interface
74 * driver.
75 *
76 * \attention: The application shall explicitly use the API provided by the standard interface component at runtime to access driver’s parameters
77 * (setter/ getter) or action (methods). Trying to access members of the standard interface component directly though the object may not guaranty
78 * future code compatibility. The same applies to the interface driver (reminder).
79 *
80 *
81 * \par Convention
82 *
83 * The Standard interface defines the following files:
84 * Path/File | Description
85 * ----------------------------------------------- | -----------------
86 * 1_SrvSw/StdIf/IfxStdIf.h | Global standard interface definitions
87 * 1_SrvSw/StdIf/IfxStdIf_<standard interface>.h | Specific standard interface definitions
88 * TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper initialization API are reconized by the name Ifx<Module>_<interface>_StdIf<std interface>Init()
89 * TCxxx/<Module>/Ifx<Module>_<interface>.h/c | Specific standard interface wrapper function API are named according to the interface driver naming rules
90 *
91 */
92
93 #ifndef IFXSTDIF_H_
94 #define IFXSTDIF_H_ 1
95
96 #include "Cpu/Std/Ifx_Types.h"
97
98 typedef void *IfxStdIf_InterfaceDriver; /**< \brief Pointer to the specific interface driver */
99
100 #endif /* IFXSTDIF_H_ */
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:98
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.


iLLD_TC26B: IfxStdIf_DPipe.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_DPipe.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_DPipe.c
3 * \brief Standard interface: Data Pipe
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:23 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxStdIf_DPipe.h"
27 #include "_Utilities/Ifx_Assert.h"
28
29 #include <string.h>
30 #include <stdio.h>
31 #include <stdarg.h>
32
33 void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format, ...)
34 {
35 if (!stdIf->txDisabled)
36 {
37 char message[STDIF_DPIPE_MAX_PRINT_SIZE + 1];
38 Ifx_SizeT count;
39 va_list args;
40 va_start(args, format);
41 vsprintf((char *)message, format, args);
42 va_end(args);
43 count = (Ifx_SizeT)strlen(message);
44 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, count < STDIF_DPIPE_MAX_PRINT_SIZE);
45 //return
46 IfxStdIf_DPipe_write(stdIf, (void *)message, &count, TIME_INFINITE);
47 }
48 else
49 {
50 //return TRUE;
51 }
52 }
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:216
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
STDIF_DPIPE_MAX_PRINT_SIZE
#define STDIF_DPIPE_MAX_PRINT_SIZE
Size of the buffer allocated on the stack for the print function.
Definition: IfxStdIf_DPipe.h:57
Ifx_Assert.h
Assert functions.
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:33
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:242
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
TIME_INFINITE
#define TIME_INFINITE
Definition: Ifx_Types.h:60
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36


iLLD_TC26B: IfxStdIf_DPipe.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_DPipe.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_DPipe.h
3 * \brief Standard interface: Data Pipe
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:24 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup library_srvsw_stdif_dpipe Standard interface: Data Pipe
26 * \ingroup library_srvsw_stdif
27 *
28 * The standard interafce data pipe (DPipe) abstract the hardware used for data transfer. It provide, after proper initialization an hardware independant way to write
29 * and read data to/from as communciation channel.
30 *
31 * \par Porting StandardIo to DPipe
32 * replace all
33 * - StandardIo type with IfxStdIf_DPipe
34 * - StandardIo_print with IfxStdIf_DPipe_print
35 * delete StandardIo.c and StandardIo.h
36 * Include "StdIf/IfxStdIf_DPipe.h" instead of "SysSe/Bsp/StandardIo.h"
37 *
38 * The following files are already ported: Ifx_Console, Ifx_Shell
39 *
40 */
41 #ifndef STDIF_DPIPE_H_
42 #define STDIF_DPIPE_H_ 1
43
44 #include "IfxStdIf.h"
45 //----------------------------------------------------------------------------------------
46 #ifndef ENDL
47 # define ENDL "\r\n"
48 #endif
49
50 /** \brief Forward declaration */
51 typedef struct IfxStdIf_DPipe_ IfxStdIf_DPipe;
52
53 typedef volatile boolean *IfxStdIf_DPipe_WriteEvent;
54 typedef volatile boolean *IfxStdIf_DPipe_ReadEvent;
55
56 /** \brief Size of the buffer allocated on the stack for the print function */
57 #define STDIF_DPIPE_MAX_PRINT_SIZE (255)
58
59 /** \brief Write binary data into the \ref IfxStdIf_DPipe.
60 *
61 * Initially the parameter 'count' specifies count of data to write.
62 * After execution the data pointed by 'count' specifies the data actually written
63 *
64 * \param stdif Pointer to the interface driver object
65 * \param data Pointer to the start of data
66 * \param count Pointer to the count of data (in bytes).
67 * \param timeout in system timer ticks
68 *
69 * \retval TRUE Returns TRUE if all items could be written
70 * \retval FALSE Returns FALSE if not all the items could be written
71 */
72 typedef boolean (*IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
73
74 /** \brief Read data from the \ref IfxStdIf_DPipe object
75 *
76 * Initially the parameter 'count' specifies count of data to read.
77 * After execution the data pointed by 'count' specifies the data actually read.
78 *
79 * \param stdif Pointer to the interface driver object
80 * \param data Pointer to the start of data
81 * \param count Pointer to the count of data (in bytes).
82 * \param timeout in system timer ticks
83 *
84 * \retval TRUE Returns TRUE if all items could be read
85 * \retval FALSE Returns FALSE if not all the items could be read
86 */
87 typedef boolean (*IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout);
88
89 /** \brief Returns the number of bytes in the rx buffer
90 *
91 * \param stdif Pointer to the interface driver object
92 *
93 * \return Returns the number of bytes in the rx buffer
94 */
95 typedef sint32 (*IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf);
96
97 /** \brief Returns read event object
98 *
99 * \param stdif Pointer to the interface driver object
100 *
101 * \return Returns read event object
102 */
103 typedef IfxStdIf_DPipe_ReadEvent (*IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf);
104
105 /** \brief Returns number of bytes send
106 *
107 * \param stdif Pointer to the interface driver object
108 *
109 * \return Returns number of bytes send
110 */
111 typedef uint32 (*IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf);
112
113 /** \brief Returns the time stamp of the last transmit data
114 *
115 * \param stdif Pointer to the interface driver object
116 *
117 * \return Returns the time stamp of the last transmit data
118 */
119 typedef Ifx_TickTime (*IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf);
120
121 /** \brief Returns the number of free bytes (free space) in the tx buffer
122 *
123 * \param stdif Pointer to the interface driver object
124 *
125 * \return Returns the number of free bytes in the tx buffer
126 */
127 typedef sint32 (*IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf);
128
129 /** \brief Returns write event object
130 *
131 * \param stdif Pointer to the interface driver object
132 *
133 * \return Returns write event object
134 */
135 typedef IfxStdIf_DPipe_WriteEvent (*IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf);
136
137 /** \brief Indicates if the required number of bytes are available for read in the buffer
138 *
139 * \param stdif Pointer to the interface driver object
140 * \param count Pointer to the count of data (in bytes).
141 * \param timeout in system timer ticks
142 *
143 * \return Returns TRUE if at least count bytes are available for read in the rx buffer,
144 * if not the Event is armed to be set when the buffer count is bigger or equal to the requested count
145 */
146 typedef boolean (*IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout);
147
148 /** \brief Indicates if there is enough free space to write the data in the buffer
149 *
150 * \param stdif Pointer to the interface driver object
151 * \param count Pointer to the count of data (in bytes).
152 * \param timeout in system timer ticks
153 *
154 * \return Returns TRUE if at least count bytes can be written to the tx buffer,
155 * if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
156 */
157 typedef boolean (*IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout);
158
159 /** \brief Flush the transmit buffer by transmitting all data
160 *
161 * \param stdif Pointer to the interface driver object
162 * \param timeout timeout for the flush operation
163 *
164 * \return Returns TRUE if the FIFO is empty
165 */
166 typedef boolean (*IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout);
167
168 /** \brief Clears the RX buffer by removing all data
169 *
170 * \param stdif Pointer to the interface driver object
171 * \return void
172 */
173 typedef void (*IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf);
174
175 /** \brief Clears the TX buffer by removing all data
176 *
177 * \param stdif Pointer to the interface driver object
178 * \return void
179 */
180 typedef void (*IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf);
181
182 /** \brief handler called on reveive event
183 *
184 * \param stdif Pointer to the interface driver object
185 *
186 * \return none
187 */
188 typedef void (*IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf);
189 /** \brief handler called on transmit event
190 *
191 * \param stdif Pointer to the interface driver object
192 *
193 * \return none
194 */
195 typedef void (*IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf);
196 /** \brief handler called on error event
197 *
198 * \param stdif Pointer to the interface driver object
199 *
200 * \return none
201 */
202 typedef void (*IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf);
203 /** \brief Reset the sendCount counter
204 *
205 * \param stdif Pointer to the interface driver object
206 *
207 * \return none
208 */
209 typedef void (*IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf);
210
211 /** \brief Standard interface object
212 */
213 struct IfxStdIf_DPipe_
214 {
215 IfxStdIf_InterfaceDriver driver; /**< \brief Pointer to the specific driver object */
216 boolean txDisabled; /**< \brief If disabled is set to TRUE, the output is disabled, else enabled */
217
218 /* Standard interface APIs */
219 IfxStdIf_DPipe_Write write; /**< \brief \see IfxStdIf_DPipe_Write */
220 IfxStdIf_DPipe_Read read; /**< \brief \see IfxStdIf_DPipe_Read */
221 IfxStdIf_DPipe_GetReadCount getReadCount; /**< \brief \see IfxStdIf_DPipe_GetReadCount */
222 IfxStdIf_DPipe_GetReadEvent getReadEvent; /**< \brief \see IfxStdIf_DPipe_GetReadEvent */
223 IfxStdIf_DPipe_GetWriteCount getWriteCount; /**< \brief \see IfxStdIf_DPipe_GetWriteCount */
224 IfxStdIf_DPipe_GetWriteEvent getWriteEvent; /**< \brief \see IfxStdIf_DPipe_GetWriteEvent */
225 IfxStdIf_DPipe_CanReadCount canReadCount; /**< \brief \see IfxStdIf_DPipe_CanReadCount */
226 IfxStdIf_DPipe_CanWriteCount canWriteCount; /**< \brief \see IfxStdIf_DPipe_CanWriteCount */
227 IfxStdIf_DPipe_FlushTx flushTx; /**< \brief \see IfxStdIf_DPipe_FlushTx */
228 IfxStdIf_DPipe_ClearTx clearTx; /**< \brief \see IfxStdIf_DPipe_ClearTx */
229 IfxStdIf_DPipe_ClearRx clearRx; /**< \brief \see IfxStdIf_DPipe_ClearRx */
230 IfxStdIf_DPipe_OnReceive onReceive; /**< \brief \see IfxStdIf_DPipe_OnReceive */
231 IfxStdIf_DPipe_OnTransmit onTransmit; /**< \brief \see IfxStdIf_DPipe_OnTransmit */
232 IfxStdIf_DPipe_OnError onError; /**< \brief \see IfxStdIf_DPipe_OnError */
233
234 IfxStdIf_DPipe_GetSendCount getSendCount; /**< \brief \see IfxStdIf_DPipe_GetSendCount */
235 IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp; /**< \brief \see IfxStdIf_DPipe_GetTxTimeStamp */
236 IfxStdIf_DPipe_ResetSendCount resetSendCount; /**< \brief \see IfxStdIf_DPipe_ResetSendCount */
237 };
238 /** \addtogroup library_srvsw_stdif_dpipe
239 * \{ */
240 /** \copydoc IfxStdIf_DPipe_Write
241 */
242 IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
243 {
244 return stdIf->write(stdIf->driver, data, count, timeout);
245 }
246
247
248 /** \copydoc IfxStdIf_DPipe_Read
249 */
250 IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
251 {
252 return stdIf->read(stdIf->driver, data, count, timeout);
253 }
254
255
256 /** \copydoc IfxStdIf_DPipe_GetReadCount
257 */
258 IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount(IfxStdIf_DPipe *stdIf)
259 {
260 return stdIf->getReadCount(stdIf->driver);
261 }
262
263
264 /** \copydoc IfxStdIf_DPipe_GetWriteCount
265 */
266 IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount(IfxStdIf_DPipe *stdIf)
267 {
268 return stdIf->getWriteCount(stdIf->driver);
269 }
270
271
272 /** \copydoc IfxStdIf_DPipe_CanReadCount
273 */
274 IFX_INLINE boolean IfxStdIf_DPipe_canReadCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
275 {
276 return stdIf->canReadCount(stdIf->driver, count, timeout);
277 }
278
279
280 /** \copydoc IfxStdIf_DPipe_CanWriteCount
281 */
282 IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
283 {
284 return stdIf->canWriteCount(stdIf->driver, count, timeout);
285 }
286
287
288 /** \copydoc IfxStdIf_DPipe_GetReadEvent
289 */
290 IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent(IfxStdIf_DPipe *stdIf)
291 {
292 return stdIf->getReadEvent(stdIf->driver);
293 }
294
295
296 /** \copydoc IfxStdIf_DPipe_GetWriteEvent
297 */
298 IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent(IfxStdIf_DPipe *stdIf)
299 {
300 return stdIf->getWriteEvent(stdIf->driver);
301 }
302
303
304 /** \copydoc IfxStdIf_DPipe_FlushTx
305 */
306 IFX_INLINE boolean IfxStdIf_DPipe_flushTx(IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
307 {
308 return stdIf->flushTx(stdIf->driver, timeout);
309 }
310
311
312 /** \copydoc IfxStdIf_DPipe_ClearTx
313 */
314 IFX_INLINE void IfxStdIf_DPipe_clearTx(IfxStdIf_DPipe *stdIf)
315 {
316 stdIf->clearTx(stdIf->driver);
317 }
318
319
320 /** \copydoc IfxStdIf_DPipe_ClearRx
321 */
322 IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
323 {
324 stdIf->clearRx(stdIf->driver);
325 }
326
327
328 /** \copydoc IfxStdIf_DPipe_OnReceive
329 */
330 IFX_INLINE void IfxStdIf_DPipe_onReceive(IfxStdIf_DPipe *stdIf)
331 {
332 stdIf->onReceive(stdIf->driver);
333 }
334
335
336 /** \copydoc IfxStdIf_DPipe_OnTransmit
337 */
338 IFX_INLINE void IfxStdIf_DPipe_onTransmit(IfxStdIf_DPipe *stdIf)
339 {
340 stdIf->onTransmit(stdIf->driver);
341 }
342
343
344 /** \copydoc IfxStdIf_DPipe_OnError
345 */
346 IFX_INLINE void IfxStdIf_DPipe_onError(IfxStdIf_DPipe *stdIf)
347 {
348 stdIf->onError(stdIf->driver);
349 }
350
351
352 /** \copydoc IfxStdIf_DPipe_GetSendCount
353 */
354 IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount(IfxStdIf_DPipe *stdIf)
355 {
356 return stdIf->getSendCount(stdIf->driver);
357 }
358
359
360 /** \copydoc IfxStdIf_DPipe_GetTxTimeStamp
361 */
362 IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp(IfxStdIf_DPipe *stdIf)
363 {
364 return stdIf->getTxTimeStamp(stdIf->driver);
365 }
366
367
368 /** \copydoc IfxStdIf_DPipe_ResetSendCount
369 */
370 IFX_INLINE void IfxStdIf_DPipe_resetSendCount(IfxStdIf_DPipe *stdIf)
371 {
372 stdIf->resetSendCount(stdIf->driver);
373 }
374
375
376 IFX_EXTERN void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format, ...);
377
378 /** \} */
379 //----------------------------------------------------------------------------------------
380
381 #endif /* STDIF_DPIPE_H_ */
IfxStdIf_DPipe_::resetSendCount
IfxStdIf_DPipe_ResetSendCount resetSendCount
Definition: IfxStdIf_DPipe.h:236
IfxStdIf_DPipe_::canWriteCount
IfxStdIf_DPipe_CanWriteCount canWriteCount
Definition: IfxStdIf_DPipe.h:226
IfxStdIf_DPipe_canWriteCount
IFX_INLINE boolean IfxStdIf_DPipe_canWriteCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:282
IfxStdIf_DPipe_ResetSendCount
void(* IfxStdIf_DPipe_ResetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:209
IfxStdIf_DPipe_onTransmit
IFX_INLINE void IfxStdIf_DPipe_onTransmit(IfxStdIf_DPipe *stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:338
IfxStdIf_DPipe_clearTx
IFX_INLINE void IfxStdIf_DPipe_clearTx(IfxStdIf_DPipe *stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:314
IfxStdIf_DPipe_::txDisabled
boolean txDisabled
If disabled is set to TRUE, the output is disabled, else enabled.
Definition: IfxStdIf_DPipe.h:216
Ifx_TickTime
sint64 Ifx_TickTime
Time in ticks.
Definition: Ifx_Types.h:59
IfxStdIf_DPipe_::getTxTimeStamp
IfxStdIf_DPipe_GetTxTimeStamp getTxTimeStamp
Definition: IfxStdIf_DPipe.h:235
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:98
IfxStdIf_DPipe_::onTransmit
IfxStdIf_DPipe_OnTransmit onTransmit
Definition: IfxStdIf_DPipe.h:231
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
IfxStdIf_DPipe_getReadEvent
IFX_INLINE IfxStdIf_DPipe_ReadEvent IfxStdIf_DPipe_getReadEvent(IfxStdIf_DPipe *stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:290
IfxStdIf_DPipe_::getWriteEvent
IfxStdIf_DPipe_GetWriteEvent getWriteEvent
Definition: IfxStdIf_DPipe.h:224
IfxStdIf_DPipe_getWriteCount
IFX_INLINE sint32 IfxStdIf_DPipe_getWriteCount(IfxStdIf_DPipe *stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:266
IfxStdIf_DPipe_resetSendCount
IFX_INLINE void IfxStdIf_DPipe_resetSendCount(IfxStdIf_DPipe *stdIf)
Reset the sendCount counter.
Definition: IfxStdIf_DPipe.h:370
IfxStdIf_DPipe_::getWriteCount
IfxStdIf_DPipe_GetWriteCount getWriteCount
Definition: IfxStdIf_DPipe.h:223
IfxStdIf_DPipe_GetSendCount
uint32(* IfxStdIf_DPipe_GetSendCount)(IfxStdIf_InterfaceDriver stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:111
IfxStdIf_DPipe_OnTransmit
void(* IfxStdIf_DPipe_OnTransmit)(IfxStdIf_InterfaceDriver stdIf)
handler called on transmit event
Definition: IfxStdIf_DPipe.h:195
IfxStdIf.h
Standard interface types.
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStdIf_DPipe_::onError
IfxStdIf_DPipe_OnError onError
Definition: IfxStdIf_DPipe.h:232
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
IfxStdIf_DPipe_::read
IfxStdIf_DPipe_Read read
Definition: IfxStdIf_DPipe.h:220
IfxStdIf_DPipe_::getSendCount
IfxStdIf_DPipe_GetSendCount getSendCount
Definition: IfxStdIf_DPipe.h:234
IfxStdIf_DPipe_::canReadCount
IfxStdIf_DPipe_CanReadCount canReadCount
Definition: IfxStdIf_DPipe.h:225
IfxStdIf_DPipe_print
IFX_EXTERN void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:33
IfxStdIf_DPipe_CanWriteCount
boolean(* IfxStdIf_DPipe_CanWriteCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if there is enough free space to write the data in the buffer.
Definition: IfxStdIf_DPipe.h:157
IfxStdIf_DPipe_::write
IfxStdIf_DPipe_Write write
Definition: IfxStdIf_DPipe.h:219
IfxStdIf_DPipe_getReadCount
IFX_INLINE sint32 IfxStdIf_DPipe_getReadCount(IfxStdIf_DPipe *stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:258
IfxStdIf_DPipe_GetWriteEvent
IfxStdIf_DPipe_WriteEvent(* IfxStdIf_DPipe_GetWriteEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:135
IfxStdIf_DPipe_GetReadEvent
IfxStdIf_DPipe_ReadEvent(* IfxStdIf_DPipe_GetReadEvent)(IfxStdIf_InterfaceDriver stdIf)
Returns read event object.
Definition: IfxStdIf_DPipe.h:103
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStdIf_DPipe_::flushTx
IfxStdIf_DPipe_FlushTx flushTx
Definition: IfxStdIf_DPipe.h:227
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxStdIf_DPipe_getWriteEvent
IFX_INLINE IfxStdIf_DPipe_WriteEvent IfxStdIf_DPipe_getWriteEvent(IfxStdIf_DPipe *stdIf)
Returns write event object.
Definition: IfxStdIf_DPipe.h:298
IfxStdIf_DPipe_::onReceive
IfxStdIf_DPipe_OnReceive onReceive
Definition: IfxStdIf_DPipe.h:230
IfxStdIf_DPipe_Write
boolean(* IfxStdIf_DPipe_Write)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:72
IfxStdIf_DPipe_OnReceive
void(* IfxStdIf_DPipe_OnReceive)(IfxStdIf_InterfaceDriver stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:188
IfxStdIf_DPipe_::driver
IfxStdIf_InterfaceDriver driver
Pointer to the specific driver object.
Definition: IfxStdIf_DPipe.h:215
IfxStdIf_DPipe_CanReadCount
boolean(* IfxStdIf_DPipe_CanReadCount)(IfxStdIf_InterfaceDriver stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:146
IfxStdIf_DPipe_write
IFX_INLINE boolean IfxStdIf_DPipe_write(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Write binary data into the IfxStdIf_DPipe.
Definition: IfxStdIf_DPipe.h:242
IfxStdIf_DPipe_::getReadEvent
IfxStdIf_DPipe_GetReadEvent getReadEvent
Definition: IfxStdIf_DPipe.h:222
IfxStdIf_DPipe_clearRx
IFX_INLINE void IfxStdIf_DPipe_clearRx(IfxStdIf_DPipe *stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:322
IfxStdIf_DPipe_GetWriteCount
sint32(* IfxStdIf_DPipe_GetWriteCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of free bytes (free space) in the tx buffer.
Definition: IfxStdIf_DPipe.h:127
IfxStdIf_DPipe_onReceive
IFX_INLINE void IfxStdIf_DPipe_onReceive(IfxStdIf_DPipe *stdIf)
handler called on reveive event
Definition: IfxStdIf_DPipe.h:330
boolean
unsigned char boolean
Definition: Platform_Types.h:101
IfxStdIf_DPipe_::getReadCount
IfxStdIf_DPipe_GetReadCount getReadCount
Definition: IfxStdIf_DPipe.h:221
IfxStdIf_DPipe_flushTx
IFX_INLINE boolean IfxStdIf_DPipe_flushTx(IfxStdIf_DPipe *stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:306
IfxStdIf_DPipe_FlushTx
boolean(* IfxStdIf_DPipe_FlushTx)(IfxStdIf_InterfaceDriver stdIf, Ifx_TickTime timeout)
Flush the transmit buffer by transmitting all data.
Definition: IfxStdIf_DPipe.h:166
IfxStdIf_DPipe_::clearRx
IfxStdIf_DPipe_ClearRx clearRx
Definition: IfxStdIf_DPipe.h:229
IfxStdIf_DPipe_Read
boolean(* IfxStdIf_DPipe_Read)(IfxStdIf_InterfaceDriver stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:87
sint32
long sint32
Definition: Platform_Types.h:131
IfxStdIf_DPipe_WriteEvent
volatile boolean * IfxStdIf_DPipe_WriteEvent
Definition: IfxStdIf_DPipe.h:53
IfxStdIf_DPipe_GetReadCount
sint32(* IfxStdIf_DPipe_GetReadCount)(IfxStdIf_InterfaceDriver stdIf)
Returns the number of bytes in the rx buffer.
Definition: IfxStdIf_DPipe.h:95
IfxStdIf_DPipe_GetTxTimeStamp
Ifx_TickTime(* IfxStdIf_DPipe_GetTxTimeStamp)(IfxStdIf_InterfaceDriver stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:119
IfxStdIf_DPipe_getTxTimeStamp
IFX_INLINE Ifx_TickTime IfxStdIf_DPipe_getTxTimeStamp(IfxStdIf_DPipe *stdIf)
Returns the time stamp of the last transmit data.
Definition: IfxStdIf_DPipe.h:362
IfxStdIf_DPipe_getSendCount
IFX_INLINE uint32 IfxStdIf_DPipe_getSendCount(IfxStdIf_DPipe *stdIf)
Returns number of bytes send.
Definition: IfxStdIf_DPipe.h:354
IfxStdIf_DPipe_ClearTx
void(* IfxStdIf_DPipe_ClearTx)(IfxStdIf_InterfaceDriver stdIf)
Clears the TX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:180
IfxStdIf_DPipe_OnError
void(* IfxStdIf_DPipe_OnError)(IfxStdIf_InterfaceDriver stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:202
IfxStdIf_DPipe_read
IFX_INLINE boolean IfxStdIf_DPipe_read(IfxStdIf_DPipe *stdIf, void *data, Ifx_SizeT *count, Ifx_TickTime timeout)
Read data from the IfxStdIf_DPipe object.
Definition: IfxStdIf_DPipe.h:250
IfxStdIf_DPipe_canReadCount
IFX_INLINE boolean IfxStdIf_DPipe_canReadCount(IfxStdIf_DPipe *stdIf, Ifx_SizeT count, Ifx_TickTime timeout)
Indicates if the required number of bytes are available for read in the buffer.
Definition: IfxStdIf_DPipe.h:274
IfxStdIf_DPipe_onError
IFX_INLINE void IfxStdIf_DPipe_onError(IfxStdIf_DPipe *stdIf)
handler called on error event
Definition: IfxStdIf_DPipe.h:346
pchar
const char * pchar
const char pointer
Definition: Ifx_Types.h:36
IfxStdIf_DPipe_::clearTx
IfxStdIf_DPipe_ClearTx clearTx
Definition: IfxStdIf_DPipe.h:228
IfxStdIf_DPipe_ReadEvent
volatile boolean * IfxStdIf_DPipe_ReadEvent
Definition: IfxStdIf_DPipe.h:54
IfxStdIf_DPipe_ClearRx
void(* IfxStdIf_DPipe_ClearRx)(IfxStdIf_InterfaceDriver stdIf)
Clears the RX buffer by removing all data.
Definition: IfxStdIf_DPipe.h:173


iLLD_TC26B: IfxStdIf_Pos.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Pos.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Pos.c
3 * \brief Standard interface: Position interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxStdIf_Pos.h"
27
28 void IfxStdIf_Pos_initConfig (IfxStdIf_Pos_Config * config)
29 {
30 config->offset = 0;
31 config->reversed = FALSE;
32 config->resolution = 0;
33 config->periodPerRotation = 1;
34 config->resolutionFactor = IfxStdIf_Pos_ResolutionFactor_oneFold;
35 config->updatePeriod = 0.001;
36 config->speedModeThreshold = 0;
37 config->minSpeed = 0; // 0 rpm
38 config->maxSpeed = 20000.0 / 60.0 * (2 * IFX_PI); // 20000 rpm
39 config->speedFilterEnabled = FALSE;
40 config->speedFilerCutOffFrequency = 0;
41
42 }
43
44 void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
45 {
46 IfxStdIf_Pos_Status status;
47 status = IfxStdIf_Pos_getFault(driver);
48
49 IfxStdIf_DPipe_print(io, "DSADC RDC status:" ENDL);
50 if (status.status != 0)
51 {
52 if (status.B.commError)
53 {
54 IfxStdIf_DPipe_print(io, "- Communication error" ENDL);
55 }
56 if (status.B.notSynchronised)
57 {
58 IfxStdIf_DPipe_print(io, "- Synchronization error" ENDL);
59 }
60 if (status.B.signalDegradation)
61 {
62 IfxStdIf_DPipe_print(io, "- Signal degradation error" ENDL);
63 }
64 if (status.B.signalLoss)
65 {
66 IfxStdIf_DPipe_print(io, "- Signal loss error" ENDL);
67 }
68 if (status.B.trackingLoss)
69 {
70 IfxStdIf_DPipe_print(io, "- Tracking error" ENDL);
71 }
72 }
73 else
74 {
75 IfxStdIf_DPipe_print(io, "- Ready" ENDL);
76 }
77 }
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:302
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:298
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
IfxStdIf_Pos_initConfig
void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:28
ENDL
#define ENDL
Definition: IfxStdIf_DPipe.h:47
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:300
IfxStdIf_Pos_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521
Definition: IfxStdIf_Pos.h:333
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:85
IfxStdIf_DPipe_print
void IfxStdIf_DPipe_print(IfxStdIf_DPipe *stdIf, pchar format,...)
Definition: IfxStdIf_DPipe.c:33
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:304
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxStdIf_Pos_Status::B
struct IfxStdIf_Pos_Status::@0 B
Bitfielf status access.
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:200
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:297
IfxStdIf_Pos.h
Standard interface: Position interface.
IfxStdIf_Pos_printStatus
void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status.
Definition: IfxStdIf_Pos.c:44
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:266
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:296
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:306
IfxStdIf_Pos_ResolutionFactor_oneFold
Default, no multipluication factor.
Definition: IfxStdIf_Pos.h:58
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:83
IfxStdIf_Pos_Config::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxStdIf_Pos.h:305
IfxStdIf_Pos_Config::periodPerRotation
uint16 periodPerRotation
Number of period per rotation. Is usually 1 for encoder.
Definition: IfxStdIf_Pos.h:299


iLLD_TC26B: IfxStdIf_Pos.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Pos.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Pos.h
3 * \brief Standard interface: Position interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup library_srvsw_stdif_posif Standard interface: Position interface
26 * \ingroup library_srvsw_stdif
27 *
28 * The standard interface position interface (IfxStdIf_Pos) abstract the hardware used for position interface feature like encoder, hall, resolver, ... It provide, after proper initialization an hardware
29 * Independent way to interact with the position sensor like getting position, speed, direction, ...
30 *
31 * The figure below shows the standard position interface.
32 *
33 * \image html "stdif_PosIf.png" "Standard position interface"
34 *
35 * This interface defines the following features:
36 * -
37 *
38 *
39 */
40
41 #ifndef IFXSTDIF_POSIF_H
42 #define IFXSTDIF_POSIF_H 1
43
44 #include "Cpu/Std/Ifx_Types.h"
45 #include "IfxStdIf.h"
46 #include "IfxStdIf_DPipe.h"
47
48 /** \brief Output event enable / disable */
49 typedef enum
50 {
51 IfxStdIf_Pos_MotionType_rotating, /**< \brief Rotating sensor */
52 IfxStdIf_Pos_MotionType_linear /**< \brief Linear sensor */
53 } IfxStdIf_Pos_MotionType;
54
55 /** \brief Output event enable / disable */
56 typedef enum
57 {
58 IfxStdIf_Pos_ResolutionFactor_oneFold = 1, /**< \brief Default, no multipluication factor */
59 IfxStdIf_Pos_ResolutionFactor_twoFold = 2, /**< \brief 2-fold resolution. Valid for encoder */
60 IfxStdIf_Pos_ResolutionFactor_fourFold = 4 /**< \brief 4-fold resolution. Valid for encoder */
61 } IfxStdIf_Pos_ResolutionFactor;
62
63 /** \brief Position sensor Types */
64 typedef enum
65 {
66 IfxStdIf_Pos_SensorType_encoder,
67 IfxStdIf_Pos_SensorType_hall,
68 IfxStdIf_Pos_SensorType_resolver,
69 IfxStdIf_Pos_SensorType_angletrk,
70 IfxStdIf_Pos_SensorType_igmr,
71 IfxStdIf_Pos_SensorType_virtual
72 } IfxStdIf_Pos_SensorType;
73
74 /** \brief Position sensor direction definition */
75 typedef enum
76 {
77 IfxStdIf_Pos_Dir_forward, /**< \brief Forward direction. For rotating position sensor, forward is clockwise rotation */
78 IfxStdIf_Pos_Dir_backward, /**< \brief Backward direction. For rotating position sensor, fackward is counter-clockwise rotation */
79 IfxStdIf_Pos_Dir_unknown /**< \brief Unknown direction */
80 } IfxStdIf_Pos_Dir;
81
82 /** \brief Position sensor status definition */
83 typedef union
84 {
85 uint32 status; /**< \brief Global status access */
86 struct
87 {
88 uint32 notSynchronised : 1; /**< \brief Sensor is not synchronized */
89 uint32 signalLoss : 1; /**< \brief Loss of signal error */
90 uint32 signalDegradation : 1; /**< \brief Signal degradation warning */
91 uint32 trackingLoss : 1; /**< \brief Tracking loss error */
92 uint32 commError : 1; /**< \brief Communication error*/
93 } B; /**< \brief Bitfielf status access */
94 } IfxStdIf_Pos_Status;
95
96 typedef sint32 IfxStdIf_Pos_RawAngle;
97
98 /** \brief Forward declaration */
99 typedef struct IfxStdIf_Pos_ IfxStdIf_Pos;
100
101 /** \brief Return the position, inclusive turns
102 *
103 * Return the sensor position in rad for rotating sensor inclusive turns, or in m for linear sensors.
104 * For linear sensor the effect is the same as IfxStdIf_Pos_GetPosition.
105 *
106 * \param stdIf Pointer to the interface driver object
107 * \return Return the position inclusive turns in rad
108 */
109 typedef float32 (*IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf);
110
111 /** \brief Handles the zero interrupt
112 * \param stdIf Pointer to the interface driver object
113 * \return none
114 */
115 typedef void (*IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf);
116
117 /** \brief Return the raw position sensor offset
118 *
119 * \param stdIf Pointer to the interface driver object
120 * \return Return the raw position sensor offset sensor in ticks
121 */
122 typedef sint32 (*IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf);
123
124 /** \brief Return the position
125 *
126 * Return the sensor position in rad for rotating sensor or in m for linear sensors.
127 * For rotating sensor, the position is always between 0 and 2*IFX_PI.
128 *
129 * \param stdIf Pointer to the interface driver object
130 * \return Return the position in rad or m
131 */
132 typedef float32 (*IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf);
133
134 /** \brief Return the direction
135 *
136 * Return the sensor direction.
137 *
138 * \param stdIf Pointer to the interface driver object
139 * \return Return the direction
140 */
141 typedef IfxStdIf_Pos_Dir (*IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf);
142
143 /** \brief Return the sensor status
144 *
145 * \param stdIf Pointer to the interface driver object
146 * \return Return the sensor status
147 */
148 typedef IfxStdIf_Pos_Status (*IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf);
149
150 /** \brief Return the period per rotation setting
151 *
152 * \param stdIf Pointer to the interface driver object
153 * \return Return the period per rotation setting
154 */
155 typedef uint16 (*IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf);
156
157 /** \brief Return the raw position in ticks
158 *
159 * Return the sensor raw position in ticks.
160 *
161 * \param stdIf Pointer to the interface driver object
162 * \return Return the raw position in ticks
163 */
164 typedef sint32 (*IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf);
165
166 /** \brief Get the update period
167 * \param stdIf Pointer to the interface driver object
168 * \return Return the update period in s
169 */
170 typedef float32 (*IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf);
171
172 /** \brief Get the resolution
173 * \param stdIf Pointer to the interface driver object
174 * \return Return the resolution
175 */
176 typedef sint32 (*IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf);
177
178 /** \brief Get the sensor type
179 * \param stdIf Pointer to the interface driver object
180 * \return Return the sensor type
181 */
182 typedef IfxStdIf_Pos_SensorType (*IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf);
183
184 /** \brief Return the speed
185 * \param stdIf Pointer to the interface driver object
186 * \return Return the speed in rad/s or m/s
187 */
188 typedef float32 (*IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf);
189
190 /** \brief Return position in turn
191 * \param stdIf Pointer to the interface driver object
192 * \return Return position in turn
193 */
194 typedef sint32 (*IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf);
195
196 /** \brief Handles the A sensor event
197 * Event A is a sensor defined event. it is optional.
198 * \param stdIf Pointer to the interface driver object
199 * \return none
200 */
201 typedef void (*IfxStdIf_Pos_OnEventA)(IfxStdIf_InterfaceDriver stdIf);
202
203 /** \brief Refresh the status
204 *
205 * Update the stdIf state like speed, position, status, taking into account the updatePeriod
206 *
207 * \param stdIf Pointer to the interface driver object
208 * \return None
209 */
210 typedef void (*IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf);
211
212 /** \brief Reset the driver
213 *
214 * Clear faults, reset speed and position to 0
215 *
216 * \param stdIf Pointer to the interface driver object
217 * \return None
218 */
219 typedef void (*IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf);
220
221 /** \brief Reset the driver fault
222 *
223 * Clear faults
224 *
225 * \param stdIf Pointer to the interface driver object
226 * \return None
227 */
228 typedef void (*IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf);
229
230 /** \brief Set the sensor offset
231 * \param stdIf Pointer to the interface driver object
232 * \param offset Offset in sensor ticks
233 * \return None
234 */
235 typedef void (*IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset);
236
237 /** \brief Set the sensor position (virtual sensor)
238 * \param stdIf Pointer to the interface driver object
239 * \param position Position sensor rad
240 * \return None
241 */
242 typedef void (*IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position);
243 /** \brief Set the sensor position (virtual sensor)
244 * \param stdIf Pointer to the interface driver object
245 * \param position Position sensor ticks
246 * \return None
247 */
248 typedef void (*IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position);
249
250 /** \brief Set the sensor speed (virtual sensor)
251 * \param stdIf Pointer to the interface driver object
252 * \param speed speed in rad/s
253 * \return None
254 */
255 typedef void (*IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed);
256
257 /** \brief Set the update period
258 * \param stdIf Pointer to the interface driver object
259 * \param updatePeriod Refresh period in s
260 * \return None
261 */
262 typedef void (*IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod);
263
264 /** \brief Standard interface object
265 */
266 struct IfxStdIf_Pos_
267 {
268 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
269 IfxStdIf_Pos_OnZeroIrq onZeroIrq; /**< \brief \see IfxStdIf_Pos_OnZeroIrq */
270 IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition; /**< \brief Return the absolute position */
271 IfxStdIf_Pos_GetOffset getOffset; /**< \brief \see IfxStdIf_Pos_GetOffset */
272 IfxStdIf_Pos_GetPosition getPosition; /**< \brief \see IfxStdIf_Pos_GetPosition */
273 IfxStdIf_Pos_GetDirection getDirection; /**< \brief \see IfxStdIf_Pos_GetDirection */
274 IfxStdIf_Pos_GetFault getFault; /**< \brief \see IfxStdIf_Pos_GetFault */
275 IfxStdIf_Pos_GetRawPosition getRawPosition; /**< \brief \see IfxStdIf_Pos_GetRawPosition */
276 IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation; /**< \brief \see IfxStdIf_Pos_GetPeriodPerRotation */
277 IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod; /**< \brief \see IfxStdIf_Pos_GetRefreshPeriod */
278 IfxStdIf_Pos_GetResolution getResolution; /**< \brief \see IfxStdIf_Pos_GetResolution */
279 IfxStdIf_Pos_GetSensorType getSensorType; /**< \brief \see IfxStdIf_Pos_GetSensorType */
280 IfxStdIf_Pos_GetTurn getTurn; /**< \brief \see IfxStdIf_Pos_GetTurn */
281 IfxStdIf_Pos_OnEventA onEventA; /**< \brief \see IfxStdIf_Pos_OnEventA */
282 IfxStdIf_Pos_Reset reset; /**< \brief \see IfxStdIf_Pos_Reset */
283 IfxStdIf_Pos_ResetFaults resetFaults; /**< \brief \see IfxStdIf_Pos_ResetFaults */
284 IfxStdIf_Pos_GetSpeed getSpeed; /**< \brief \see IfxStdIf_Pos_GetSpeed */
285 IfxStdIf_Pos_Update update; /**< \brief \see IfxStdIf_Pos_Update */
286 IfxStdIf_Pos_SetOffset setOffset; /**< \brief \see IfxStdIf_Pos_SetOffset */
287 IfxStdIf_Pos_SetPosition setPosition; /**< \brief \see IfxStdIf_Pos_SetPosition */
288 IfxStdIf_Pos_SetRawPosition setRawPosition; /**< \brief \see IfxStdIf_Pos_SetRawPosition */
289 IfxStdIf_Pos_SetSpeed setSpeed; /**< \brief \see IfxStdIf_Pos_SetSpeed */
290 IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod; /**< \brief \see IfxStdIf_Pos_SetRefreshPeriod */
291 };
292
293 /** \brief Position interface configuration */
294 typedef struct
295 {
296 sint32 offset; /**< \brief Position sensor offset */
297 boolean reversed; /**< \brief If true, the sensor direction is reversed */
298 sint32 resolution; /**< \brief Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024 */
299 uint16 periodPerRotation; /**< \brief Number of period per rotation. Is usually 1 for encoder */
300 IfxStdIf_Pos_ResolutionFactor resolutionFactor; /**< \brief Resolution multiplier for encoder interface, valid is 2, 4. */
301 float32 updatePeriod; /**< \brief period in seconds, at which the application calls IfxStdIf_Pos_update() */
302 float32 speedModeThreshold; /**< \brief Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count mode is used, below the threshold, the time delta is used */
303 float32 minSpeed; /**< \brief Absolute minimal allowed speed. below speed is recognized as 0rad/s */
304 float32 maxSpeed; /**< \brief Absolute maximal allowed speed. Above speed is recognized as error */
305 boolean speedFilterEnabled; /**< \brief Enable / disable the speed low pass filter */
306 float32 speedFilerCutOffFrequency; /**< \brief Speed low pass filter cut off frequency */
307 } IfxStdIf_Pos_Config;
308
309 /** \addtogroup library_srvsw_stdif_posif
310 * \{
311 */
312
313 /** \copydoc IfxStdIf_Pos_OnZeroIrq
314 */
315 IFX_INLINE void IfxStdIf_Pos_onZeroIrq(IfxStdIf_Pos *stdIf)
316 {
317 stdIf->onZeroIrq(stdIf->driver);
318 }
319
320
321 /** \copydoc IfxStdIf_Pos_GetAbsolutePosition
322 * \param stdIf Standard interface pointer
323 */
324 IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition(IfxStdIf_Pos *stdIf)
325 {
326 return stdIf->getAbsolutePosition(stdIf->driver);
327 }
328
329
330 /** \copydoc IfxStdIf_Pos_GetFault MCMETILLD-521
331 * \param stdIf Standard interface pointer
332 */
333 IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
334 {
335 return stdIf->getFault(stdIf->driver);
336 }
337
338
339 /** \copydoc IfxStdIf_Pos_GetOffset
340 * \param stdIf Standard interface pointer
341 */
342 IFX_INLINE sint32 IfxStdIf_Pos_getOffset(IfxStdIf_Pos *stdIf)
343 {
344 return stdIf->getOffset(stdIf->driver);
345 }
346
347
348 /** \copydoc IfxStdIf_Pos_GetPosition
349 * \param stdIf Standard interface pointer
350 */
351 IFX_INLINE float32 IfxStdIf_Pos_getPosition(IfxStdIf_Pos *stdIf)
352 {
353 return stdIf->getPosition(stdIf->driver);
354 }
355
356
357 /** \copydoc IfxStdIf_Pos_GetDirection
358 * \param stdIf Standard interface pointer
359 */
360 IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection(IfxStdIf_Pos *stdIf)
361 {
362 return stdIf->getDirection(stdIf->driver);
363 }
364
365
366 /** \copydoc IfxStdIf_Pos_GetPeriodPerRotation
367 * \param stdIf Standard interface pointer
368 */
369 IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation(IfxStdIf_Pos *stdIf)
370 {
371 return stdIf->getPeriodPerRotation(stdIf->driver);
372 }
373
374
375 /** \copydoc IfxStdIf_Pos_GetRawPosition
376 * \param stdIf Standard interface pointer
377 */
378 IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition(IfxStdIf_Pos *stdIf)
379 {
380 return stdIf->getRawPosition(stdIf->driver);
381 }
382
383
384 /** \copydoc IfxStdIf_Pos_GetRefreshPeriod
385 * \param stdIf Standard interface pointer
386 */
387 IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod(IfxStdIf_Pos *stdIf)
388 {
389 return stdIf->getRefreshPeriod(stdIf->driver);
390 }
391
392
393 /** \copydoc IfxStdIf_Pos_GetResolution
394 * \param stdIf Standard interface pointer
395 */
396 IFX_INLINE sint32 IfxStdIf_Pos_getResolution(IfxStdIf_Pos *stdIf)
397 {
398 return stdIf->getResolution(stdIf->driver);
399 }
400
401
402 /** \copydoc IfxStdIf_Pos_GetTurn
403 * \param stdIf Standard interface pointer
404 */
405 IFX_INLINE sint32 IfxStdIf_Pos_getTurn(IfxStdIf_Pos *stdIf)
406 {
407 return stdIf->getTurn(stdIf->driver);
408 }
409
410
411 /** \copydoc IfxStdIf_Pos_GetSensorType
412 * \param stdIf Standard interface pointer
413 */
414 IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType(IfxStdIf_Pos *stdIf)
415 {
416 return stdIf->getSensorType(stdIf->driver);
417 }
418
419
420 /** \copydoc IfxStdIf_Pos_GetSpeed
421 * \param stdIf Standard interface pointer
422 */
423 IFX_INLINE float32 IfxStdIf_Pos_getSpeed(IfxStdIf_Pos *stdIf)
424 {
425 return stdIf->getSpeed(stdIf->driver);
426 }
427
428
429 /** Check whether the sensor is faulty
430 * \param stdIf Standard interface pointer
431 */
432 IFX_INLINE boolean IfxStdIf_Pos_isFault(IfxStdIf_Pos *stdIf)
433 {
434 return IfxStdIf_Pos_getFault(stdIf).status != 0;
435 }
436
437
438 /** \copydoc IfxStdIf_Pos_OnEventA
439 * \param stdIf Standard interface pointer
440 */
441 IFX_INLINE void IfxStdIf_Pos_onEventA(IfxStdIf_Pos *stdIf)
442 {
443 stdIf->onEventA(stdIf->driver);
444 }
445
446
447 /** \copydoc IfxStdIf_Pos_Update
448 * \param stdIf Standard interface pointer
449 */
450 IFX_INLINE void IfxStdIf_Pos_update(IfxStdIf_Pos *stdIf)
451 {
452 stdIf->update(stdIf->driver);
453 }
454
455
456 /** \copydoc IfxStdIf_Pos_Reset
457 * \param stdIf Standard interface pointer
458 */
459 IFX_INLINE void IfxStdIf_Pos_reset(IfxStdIf_Pos *stdIf)
460 {
461 stdIf->reset(stdIf->driver);
462 }
463
464
465 /** \copydoc IfxStdIf_Pos_ResetFaults
466 * \param stdIf Standard interface pointer
467 */
468 IFX_INLINE void IfxStdIf_Pos_resetFaults(IfxStdIf_Pos *stdIf)
469 {
470 stdIf->resetFaults(stdIf->driver);
471 }
472
473
474 /** \copydoc IfxStdIf_Pos_SetOffset
475 * \param stdIf Standard interface pointer
476 */
477 IFX_INLINE void IfxStdIf_Pos_setOffset(IfxStdIf_Pos *stdIf, sint32 offset)
478 {
479 stdIf->setOffset(stdIf->driver, offset);
480 }
481
482
483 /** \copydoc IfxStdIf_Pos_SetPosition
484 * \param stdIf Standard interface pointer
485 */
486 IFX_INLINE void IfxStdIf_Pos_setPosition(IfxStdIf_Pos *stdIf, float32 position)
487 {
488 stdIf->setPosition(stdIf->driver, position);
489 }
490
491
492 /** \copydoc IfxStdIf_Pos_SetRawPosition
493 * \param stdIf Standard interface pointer
494 */
495 IFX_INLINE void IfxStdIf_Pos_setRawPosition(IfxStdIf_Pos *stdIf, sint32 position)
496 {
497 stdIf->setRawPosition(stdIf->driver, position);
498 }
499
500
501 /** \copydoc IfxStdIf_Pos_SetSpeed
502 * \param stdIf Standard interface pointer
503 */
504 IFX_INLINE void IfxStdIf_Pos_setSpeed(IfxStdIf_Pos *stdIf, float32 speed)
505 {
506 stdIf->setSpeed(stdIf->driver, speed);
507 }
508
509
510 /** \copydoc IfxStdIf_Pos_SetRefreshPeriod
511 * \param stdIf Standard interface pointer
512 */
513 IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod(IfxStdIf_Pos *stdIf, float32 updatePeriod)
514 {
515 stdIf->setRefreshPeriod(stdIf->driver, updatePeriod);
516 }
517
518
519 /** \} */
520
521 /** \brief Converts from rad/s to rpm
522 *
523 * \param speed Specifies the speed in rad/s.
524 *
525 * \return returns the converted speed in rpm.
526 * \see IfxStdIf_Pos_rpmToRads()
527 */
528 IFX_INLINE float32 IfxStdIf_Pos_radsToRpm(float32 speed)
529 {
530 return (60.0 / (2.0 * IFX_PI)) * speed;
531 }
532
533
534 /** \brief Converts from rpm to rad/s
535 *
536 * \param speed Specifies the speed in rpm.
537 *
538 * \return returns the converted speed in rad/s.
539 * \see IfxStdIf_Pos_radsToRpm()
540 */
541 IFX_INLINE float32 IfxStdIf_Pos_rpmToRads(float32 speed)
542 {
543 return speed * ((2.0 * IFX_PI) / 60.0);
544 }
545
546
547 /** Initialize the configuration structure to default
548 *
549 * \param config Position interface configuration. This parameter is initialized by the function
550 *
551 */
552 IFX_EXTERN void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config);
553
554 /** \brief Print the device status
555 *
556 * \param driver driver handle
557 * \param io Interface to which the status is output
558 * \return none
559 */
560 IFX_EXTERN void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io);
561
562
563 #endif /* IFXSTDIF_POSIF_H */
IfxStdIf_Pos_Config::speedModeThreshold
float32 speedModeThreshold
Speed threshold used for the speed calculation mode. For encoder, above the threshold the pulse count...
Definition: IfxStdIf_Pos.h:302
IfxStdIf_Pos_getPosition
IFX_INLINE float32 IfxStdIf_Pos_getPosition(IfxStdIf_Pos *stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:351
IfxStdIf_Pos_Config::resolution
sint32 resolution
Sensor resolution. For encoder with 1024 pulse per revolution, the value should be 1024...
Definition: IfxStdIf_Pos.h:298
IfxStdIf_Pos_resetFaults
IFX_INLINE void IfxStdIf_Pos_resetFaults(IfxStdIf_Pos *stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:468
IfxStdIf_Pos_GetRefreshPeriod
float32(* IfxStdIf_Pos_GetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:170
IfxStdIf_Pos_::setRefreshPeriod
IfxStdIf_Pos_SetRefreshPeriod setRefreshPeriod
Definition: IfxStdIf_Pos.h:290
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:98
IfxStdIf_Pos_setSpeed
IFX_INLINE void IfxStdIf_Pos_setSpeed(IfxStdIf_Pos *stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:504
IfxStdIf_Pos_getPeriodPerRotation
IFX_INLINE uint16 IfxStdIf_Pos_getPeriodPerRotation(IfxStdIf_Pos *stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:369
IfxStdIf_Pos_GetOffset
sint32(* IfxStdIf_Pos_GetOffset)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:122
IfxStdIf_DPipe_
Standard interface object.
Definition: IfxStdIf_DPipe.h:213
IfxStdIf_Pos_SetRawPosition
void(* IfxStdIf_Pos_SetRawPosition)(IfxStdIf_InterfaceDriver stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:248
IfxStdIf_Pos_SensorType_angletrk
Definition: IfxStdIf_Pos.h:69
IfxStdIf_Pos_SensorType_hall
Definition: IfxStdIf_Pos.h:67
IfxStdIf_Pos_::setOffset
IfxStdIf_Pos_SetOffset setOffset
Definition: IfxStdIf_Pos.h:286
IfxStdIf_Pos_::setPosition
IfxStdIf_Pos_SetPosition setPosition
Definition: IfxStdIf_Pos.h:287
IfxStdIf_Pos_GetSpeed
float32(* IfxStdIf_Pos_GetSpeed)(IfxStdIf_InterfaceDriver stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:188
IfxStdIf_Pos_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Pos.h:268
IfxStdIf_Pos_Dir_unknown
Unknown direction.
Definition: IfxStdIf_Pos.h:79
IfxStdIf_Pos_setRawPosition
IFX_INLINE void IfxStdIf_Pos_setRawPosition(IfxStdIf_Pos *stdIf, sint32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:495
IfxStdIf.h
Standard interface types.
IfxStdIf_Pos_update
IFX_INLINE void IfxStdIf_Pos_update(IfxStdIf_Pos *stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:450
IfxStdIf_Pos_getSpeed
IFX_INLINE float32 IfxStdIf_Pos_getSpeed(IfxStdIf_Pos *stdIf)
Return the speed.
Definition: IfxStdIf_Pos.h:423
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStdIf_Pos_Config::minSpeed
float32 minSpeed
Absolute minimal allowed speed. below speed is recognized as 0rad/s.
Definition: IfxStdIf_Pos.h:303
IfxStdIf_Pos_reset
IFX_INLINE void IfxStdIf_Pos_reset(IfxStdIf_Pos *stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:459
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_Pos_::getRawPosition
IfxStdIf_Pos_GetRawPosition getRawPosition
Definition: IfxStdIf_Pos.h:275
IfxStdIf_Pos_Config::resolutionFactor
IfxStdIf_Pos_ResolutionFactor resolutionFactor
Resolution multiplier for encoder interface, valid is 2, 4.
Definition: IfxStdIf_Pos.h:300
IfxStdIf_Pos_::getPeriodPerRotation
IfxStdIf_Pos_GetPeriodPerRotation getPeriodPerRotation
Definition: IfxStdIf_Pos.h:276
IfxStdIf_Pos_getFault
IFX_INLINE IfxStdIf_Pos_Status IfxStdIf_Pos_getFault(IfxStdIf_Pos *stdIf)
Return the sensor status. MCMETILLD-521
Definition: IfxStdIf_Pos.h:333
IfxStdIf_Pos_Status::status
uint32 status
Global status access.
Definition: IfxStdIf_Pos.h:85
IfxStdIf_Pos_RawAngle
sint32 IfxStdIf_Pos_RawAngle
Definition: IfxStdIf_Pos.h:96
IfxStdIf_Pos_::getSensorType
IfxStdIf_Pos_GetSensorType getSensorType
Definition: IfxStdIf_Pos.h:279
IfxStdIf_Pos_getOffset
IFX_INLINE sint32 IfxStdIf_Pos_getOffset(IfxStdIf_Pos *stdIf)
Return the raw position sensor offset.
Definition: IfxStdIf_Pos.h:342
IfxStdIf_Pos_::getDirection
IfxStdIf_Pos_GetDirection getDirection
Definition: IfxStdIf_Pos.h:273
IfxStdIf_Pos_OnZeroIrq
void(* IfxStdIf_Pos_OnZeroIrq)(IfxStdIf_InterfaceDriver stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:115
IfxStdIf_Pos_ResolutionFactor_twoFold
2-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:59
IfxStdIf_Pos_setRefreshPeriod
IFX_INLINE void IfxStdIf_Pos_setRefreshPeriod(IfxStdIf_Pos *stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:513
IfxStdIf_Pos_Config::maxSpeed
float32 maxSpeed
Absolute maximal allowed speed. Above speed is recognized as error.
Definition: IfxStdIf_Pos.h:304
IfxStdIf_Pos_::setRawPosition
IfxStdIf_Pos_SetRawPosition setRawPosition
Definition: IfxStdIf_Pos.h:288
IfxStdIf_Pos_::getRefreshPeriod
IfxStdIf_Pos_GetRefreshPeriod getRefreshPeriod
Definition: IfxStdIf_Pos.h:277
IfxStdIf_Pos_::getPosition
IfxStdIf_Pos_GetPosition getPosition
Definition: IfxStdIf_Pos.h:272
IfxStdIf_Pos_onEventA
IFX_INLINE void IfxStdIf_Pos_onEventA(IfxStdIf_Pos *stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional.
Definition: IfxStdIf_Pos.h:441
IFX_PI
#define IFX_PI
Definition: Ifx_Types.h:200
IfxStdIf_Pos_SensorType_igmr
Definition: IfxStdIf_Pos.h:70
IfxStdIf_Pos_::getFault
IfxStdIf_Pos_GetFault getFault
Definition: IfxStdIf_Pos.h:274
IfxStdIf_Pos_Config::reversed
boolean reversed
If true, the sensor direction is reversed.
Definition: IfxStdIf_Pos.h:297
IfxStdIf_Pos_GetSensorType
IfxStdIf_Pos_SensorType(* IfxStdIf_Pos_GetSensorType)(IfxStdIf_InterfaceDriver stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:182
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStdIf_Pos_SetPosition
void(* IfxStdIf_Pos_SetPosition)(IfxStdIf_InterfaceDriver stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:242
IfxStdIf_Pos_GetRawPosition
sint32(* IfxStdIf_Pos_GetRawPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:164
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxStdIf_Pos_GetDirection
IfxStdIf_Pos_Dir(* IfxStdIf_Pos_GetDirection)(IfxStdIf_InterfaceDriver stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:141
IfxStdIf_Pos_Config::updatePeriod
float32 updatePeriod
period in seconds, at which the application calls IfxStdIf_Pos_update()
Definition: IfxStdIf_Pos.h:301
IfxStdIf_Pos_initConfig
IFX_EXTERN void IfxStdIf_Pos_initConfig(IfxStdIf_Pos_Config *config)
Definition: IfxStdIf_Pos.c:28
IfxStdIf_Pos_SensorType_encoder
Definition: IfxStdIf_Pos.h:66
IfxStdIf_Pos_SetRefreshPeriod
void(* IfxStdIf_Pos_SetRefreshPeriod)(IfxStdIf_InterfaceDriver stdIf, float32 updatePeriod)
Set the update period.
Definition: IfxStdIf_Pos.h:262
IfxStdIf_Pos_MotionType_linear
Linear sensor.
Definition: IfxStdIf_Pos.h:52
IfxStdIf_Pos_MotionType_rotating
Rotating sensor.
Definition: IfxStdIf_Pos.h:51
IfxStdIf_Pos_Dir
IfxStdIf_Pos_Dir
Position sensor direction definition.
Definition: IfxStdIf_Pos.h:75
IfxStdIf_Pos_OnEventA
void(* IfxStdIf_Pos_OnEventA)(IfxStdIf_InterfaceDriver stdIf)
Handles the A sensor event Event A is a sensor defined event. it is optional.
Definition: IfxStdIf_Pos.h:201
IfxStdIf_Pos_getResolution
IFX_INLINE sint32 IfxStdIf_Pos_getResolution(IfxStdIf_Pos *stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:396
IfxStdIf_Pos_GetPeriodPerRotation
uint16(* IfxStdIf_Pos_GetPeriodPerRotation)(IfxStdIf_InterfaceDriver stdIf)
Return the period per rotation setting.
Definition: IfxStdIf_Pos.h:155
IfxStdIf_Pos_Dir_backward
Backward direction. For rotating position sensor, fackward is counter-clockwise rotation.
Definition: IfxStdIf_Pos.h:78
IfxStdIf_Pos_::getResolution
IfxStdIf_Pos_GetResolution getResolution
Definition: IfxStdIf_Pos.h:278
IfxStdIf_Pos_getRefreshPeriod
IFX_INLINE float32 IfxStdIf_Pos_getRefreshPeriod(IfxStdIf_Pos *stdIf)
Get the update period.
Definition: IfxStdIf_Pos.h:387
IfxStdIf_Pos_Config
Position interface configuration.
Definition: IfxStdIf_Pos.h:294
IfxStdIf_Pos_
Standard interface object.
Definition: IfxStdIf_Pos.h:266
IfxStdIf_Pos_Dir_forward
Forward direction. For rotating position sensor, forward is clockwise rotation.
Definition: IfxStdIf_Pos.h:77
IfxStdIf_Pos_SensorType
IfxStdIf_Pos_SensorType
Position sensor Types.
Definition: IfxStdIf_Pos.h:64
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_Pos_SensorType_virtual
Definition: IfxStdIf_Pos.h:71
IfxStdIf_DPipe.h
Standard interface: Data Pipe.
IfxStdIf_Pos_GetFault
IfxStdIf_Pos_Status(* IfxStdIf_Pos_GetFault)(IfxStdIf_InterfaceDriver stdIf)
Return the sensor status.
Definition: IfxStdIf_Pos.h:148
IfxStdIf_Pos_SetSpeed
void(* IfxStdIf_Pos_SetSpeed)(IfxStdIf_InterfaceDriver stdIf, float32 speed)
Set the sensor speed (virtual sensor)
Definition: IfxStdIf_Pos.h:255
IfxStdIf_Pos_::getSpeed
IfxStdIf_Pos_GetSpeed getSpeed
Definition: IfxStdIf_Pos.h:284
IfxStdIf_Pos_SetOffset
void(* IfxStdIf_Pos_SetOffset)(IfxStdIf_InterfaceDriver stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:235
IfxStdIf_Pos_rpmToRads
IFX_INLINE float32 IfxStdIf_Pos_rpmToRads(float32 speed)
Converts from rpm to rad/s.
Definition: IfxStdIf_Pos.h:541
IfxStdIf_Pos_Reset
void(* IfxStdIf_Pos_Reset)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver.
Definition: IfxStdIf_Pos.h:219
IfxStdIf_Pos_Config::offset
sint32 offset
Position sensor offset.
Definition: IfxStdIf_Pos.h:296
IfxStdIf_Pos_printStatus
IFX_EXTERN void IfxStdIf_Pos_printStatus(IfxStdIf_Pos *driver, IfxStdIf_DPipe *io)
Print the device status.
Definition: IfxStdIf_Pos.c:44
IfxStdIf_Pos_getTurn
IFX_INLINE sint32 IfxStdIf_Pos_getTurn(IfxStdIf_Pos *stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:405
IfxStdIf_Pos_::getOffset
IfxStdIf_Pos_GetOffset getOffset
Definition: IfxStdIf_Pos.h:271
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxStdIf_Pos_::getAbsolutePosition
IfxStdIf_Pos_GetAbsolutePosition getAbsolutePosition
Return the absolute position.
Definition: IfxStdIf_Pos.h:270
IfxStdIf_Pos_ResolutionFactor
IfxStdIf_Pos_ResolutionFactor
Output event enable / disable.
Definition: IfxStdIf_Pos.h:56
IfxStdIf_Pos_::update
IfxStdIf_Pos_Update update
Definition: IfxStdIf_Pos.h:285
IfxStdIf_Pos_GetTurn
sint32(* IfxStdIf_Pos_GetTurn)(IfxStdIf_InterfaceDriver stdIf)
Return position in turn.
Definition: IfxStdIf_Pos.h:194
sint32
long sint32
Definition: Platform_Types.h:131
IfxStdIf_Pos_GetAbsolutePosition
float32(* IfxStdIf_Pos_GetAbsolutePosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:109
IfxStdIf_Pos_radsToRpm
IFX_INLINE float32 IfxStdIf_Pos_radsToRpm(float32 speed)
Converts from rad/s to rpm.
Definition: IfxStdIf_Pos.h:528
IfxStdIf_Pos_isFault
IFX_INLINE boolean IfxStdIf_Pos_isFault(IfxStdIf_Pos *stdIf)
Definition: IfxStdIf_Pos.h:432
IfxStdIf_Pos_getSensorType
IFX_INLINE IfxStdIf_Pos_SensorType IfxStdIf_Pos_getSensorType(IfxStdIf_Pos *stdIf)
Get the sensor type.
Definition: IfxStdIf_Pos.h:414
IfxStdIf_Pos_::resetFaults
IfxStdIf_Pos_ResetFaults resetFaults
Definition: IfxStdIf_Pos.h:283
IfxStdIf_Pos_Update
void(* IfxStdIf_Pos_Update)(IfxStdIf_InterfaceDriver stdIf)
Refresh the status.
Definition: IfxStdIf_Pos.h:210
IfxStdIf_Pos_setOffset
IFX_INLINE void IfxStdIf_Pos_setOffset(IfxStdIf_Pos *stdIf, sint32 offset)
Set the sensor offset.
Definition: IfxStdIf_Pos.h:477
IfxStdIf_Pos_Config::speedFilerCutOffFrequency
float32 speedFilerCutOffFrequency
Speed low pass filter cut off frequency.
Definition: IfxStdIf_Pos.h:306
IfxStdIf_Pos_::onZeroIrq
IfxStdIf_Pos_OnZeroIrq onZeroIrq
Definition: IfxStdIf_Pos.h:269
IfxStdIf_Pos_ResolutionFactor_oneFold
Default, no multipluication factor.
Definition: IfxStdIf_Pos.h:58
IfxStdIf_Pos_::onEventA
IfxStdIf_Pos_OnEventA onEventA
Definition: IfxStdIf_Pos.h:281
IfxStdIf_Pos_SensorType_resolver
Definition: IfxStdIf_Pos.h:68
IfxStdIf_Pos_ResolutionFactor_fourFold
4-fold resolution. Valid for encoder
Definition: IfxStdIf_Pos.h:60
IfxStdIf_Pos_getDirection
IFX_INLINE IfxStdIf_Pos_Dir IfxStdIf_Pos_getDirection(IfxStdIf_Pos *stdIf)
Return the direction.
Definition: IfxStdIf_Pos.h:360
IfxStdIf_Pos_Status
Position sensor status definition.
Definition: IfxStdIf_Pos.h:83
IfxStdIf_Pos_::getTurn
IfxStdIf_Pos_GetTurn getTurn
Definition: IfxStdIf_Pos.h:280
IfxStdIf_Pos_getAbsolutePosition
IFX_INLINE float32 IfxStdIf_Pos_getAbsolutePosition(IfxStdIf_Pos *stdIf)
Return the position, inclusive turns.
Definition: IfxStdIf_Pos.h:324
IfxStdIf_Pos_::reset
IfxStdIf_Pos_Reset reset
Definition: IfxStdIf_Pos.h:282
IfxStdIf_Pos_onZeroIrq
IFX_INLINE void IfxStdIf_Pos_onZeroIrq(IfxStdIf_Pos *stdIf)
Handles the zero interrupt.
Definition: IfxStdIf_Pos.h:315
IfxStdIf_Pos_getRawPosition
IFX_INLINE sint32 IfxStdIf_Pos_getRawPosition(IfxStdIf_Pos *stdIf)
Return the raw position in ticks.
Definition: IfxStdIf_Pos.h:378
IfxStdIf_Pos_MotionType
IfxStdIf_Pos_MotionType
Output event enable / disable.
Definition: IfxStdIf_Pos.h:49
IfxStdIf_Pos_GetPosition
float32(* IfxStdIf_Pos_GetPosition)(IfxStdIf_InterfaceDriver stdIf)
Return the position.
Definition: IfxStdIf_Pos.h:132
IfxStdIf_Pos_GetResolution
sint32(* IfxStdIf_Pos_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Get the resolution.
Definition: IfxStdIf_Pos.h:176
IfxStdIf_Pos_ResetFaults
void(* IfxStdIf_Pos_ResetFaults)(IfxStdIf_InterfaceDriver stdIf)
Reset the driver fault.
Definition: IfxStdIf_Pos.h:228
IfxStdIf_Pos_::setSpeed
IfxStdIf_Pos_SetSpeed setSpeed
Definition: IfxStdIf_Pos.h:289
IfxStdIf_Pos_Config::speedFilterEnabled
boolean speedFilterEnabled
Enable / disable the speed low pass filter.
Definition: IfxStdIf_Pos.h:305
IfxStdIf_Pos_Config::periodPerRotation
uint16 periodPerRotation
Number of period per rotation. Is usually 1 for encoder.
Definition: IfxStdIf_Pos.h:299
IfxStdIf_Pos_setPosition
IFX_INLINE void IfxStdIf_Pos_setPosition(IfxStdIf_Pos *stdIf, float32 position)
Set the sensor position (virtual sensor)
Definition: IfxStdIf_Pos.h:486


iLLD_TC26B: IfxStdIf_PwmHl.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_PwmHl.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_PwmHl.c
3 * \brief Standard interface: Multi-channels, dual-complementary PWM interface
4 * \ingroup IfxStdIf
5 *
6 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7 *
8 * $Date: 2014-02-27 20:08:24 GMT$
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxStdIf_PwmHl.h"
27
28 void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
29 {
30 config->deadtime = 0;
31 config->minPulse = 0;
32 config->channelCount = 0;
33 config->emergencyEnabled = FALSE;
34 config->outputMode = IfxPort_OutputMode_pushPull;
35 config->outputDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
36 config->ccxActiveState = Ifx_ActiveState_high;
37 config->coutxActiveState = Ifx_ActiveState_high;
38 }
Ifx_ActiveState_high
The signal is high active.
Definition: Ifx_Types.h:99
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxStdIf_PwmHl_Config::emergencyEnabled
boolean emergencyEnabled
Specifies if the emergency stop should be enabled or not.
Definition: IfxStdIf_PwmHl.h:180
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:182
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:185
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:183
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:175
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:177
IfxStdIf_PwmHl.h
Standard interface: Multi-channels, dual-complementary PWM interface.
IfxStdIf_PwmHl_initConfig
void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:28
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:186
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:179
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:178


iLLD_TC26B: IfxStdIf_PwmHl.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_PwmHl.h
3 * \brief Standard interface: Multi-channels, dual-complementary PWM interface
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup library_srvsw_stdif_pwmhl Standard interface: Multi-channels, dual-complementary PWM interface
26 * \ingroup library_srvsw_stdif
27 *
28 * The standard interface pwm high/low (PwmHl) abstract the hardware used for pwm feature. It provide, after proper initialization an hardware
29 * independant way to interact with the PWM functionallity like setting duty cycles, dead time,timer functionalities, ...
30 *
31 * The figure below shows the standard Multi-channels, dual-complementary PWM interface.
32 *
33 * \image html "PwmHl-overview.png" "Standard Multi-channels, dual-complementary PWM interface"
34 *
35 * This PWM interface provides multiple dual-complementary PWM channels.
36 * Each dual-complementary PWM channel is made of two PWM channels, a top channel CCx and a bottom channel COUTx.
37 * The interface implements the \ref library_srvsw_stdif_timer.
38 *
39 * This interface defines the following features:
40 * - Configurable duty cycle from 0% to 100%
41 * - Adjustable dead-time between top and bottom channels
42 * - Center aligned, left aligned, right aligned PWM
43 * - Optional minimal pulse cancellation
44 * - Optional emergency stop
45 * - Configurable signal active state for top and bottom PWM
46 * - Configurable output ports
47 * - Inherit the features from library_srvsw_stdif_timer
48 *
49 * Example of signal generation in center aligned mode:
50 *
51 * \image html "PwmHl-centerAligned.png" "Standard Multi-channels, dual-complementary PWM interface - Center aligned mode"
52 */
53
54 #ifndef IFXSTDIF_PWMHL_H
55 #define IFXSTDIF_PWMHL_H 1
56
57 #include "IfxStdIf.h"
58 #include "IfxStdIf_Timer.h"
59
60 /** \brief Forward declaration */
61 typedef struct IfxStdIf_PwmHl_ IfxStdIf_PwmHl;
62
63 /** \brief Set the dead time in s
64 * \param stdIf Pointer to the interface driver object
65 * \param deadtime deadtime in second
66 * \retval TRUE In case of success
67 * \retval FALSE In case of failure
68 */
69 typedef boolean (*IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime);
70
71 /** \brief Return the dead time in s
72 *
73 * It returns the last dead time values set by IfxStdIf_PwmHl_SetDeadtime() or during initialisation
74 * \param stdIf Pointer to the interface driver object
75 * \return Returns the deadtime in second
76 */
77 typedef float32 (*IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf);
78
79 /** \brief Set the minimum pulse time in s
80 * \param stdIf Pointer to the interface driver object
81 * \param minPulse minimal pulse in second
82 * \retval TRUE In case of success
83 * \retval FALSE In case of failure
84 */
85 typedef boolean (*IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse);
86
87 /** \brief Return the minimum pulse time in s
88 *
89 * It returns the last minimum pulse time values set by IfxStdIf_PwmHl_SetMinPulse() or during initialisation
90 * \param stdIf Pointer to the interface driver object
91 * \return Returns the minimum pulse time in second
92 */
93 typedef float32 (*IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf);
94
95 /** \brief Return the PWM mode
96 *
97 * It returns the last pwm mode set by IfxStdIf_PwmHl_SetMode() or during initialisation
98 * \param stdIf Pointer to the interface driver object
99 * \return Returns the pwm mode
100 */
101 typedef Ifx_Pwm_Mode (*IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf);
102
103 /** \brief Set the pwm mode
104 * \param stdIf Pointer to the interface driver object
105 * \param mode PWM mode
106 * \retval TRUE In case of success
107 * \retval FALSE In case of failure (feature not supported)
108 */
109 typedef boolean (*IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode);
110
111 /** \brief Set the pwm ON time
112 * \param stdIf Pointer to the interface driver object
113 * \param tOn Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
114 * \return none
115 */
116 typedef void (*IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn);
117
118 /** \brief Set the pwm ON time and shift value
119 * \param stdIf Pointer to the interface driver object
120 * \param tOn Pointer to an array of ON times in ticks. The array size must be equal to the number of PWM channels
121 * \param shift Pointer to an array of shift values in ticks. The array size must be equal to the number of PWM channels
122 * \return none
123 */
124 typedef void (*IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
125
126 /** \brief Set the pwm pulse of all switched independently
127 * \param stdIf Pointer to the interface driver object
128 * \param tOn Pointer to an array of ON times in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
129 * \param offset Pointer to an array of offset values in s. The array size must be equal to the number of PWM channels times 2. Parameters order is Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
130 * \return none
131 */
132 typedef void (*IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset);
133
134 /** \brief Set channels which are generating PWM or in "stuck-at" state.
135 *
136 * \param stdIf Pointer to the interface driver object
137 * \param activeCh Pointer to boolean array containing values for PWM channels.
138 * If FALSE, the channel will be in stuck-at state, else the channel will generate PWM.
139 *
140 * \param stuckSt Pointer to boolean array containing values for active channels.
141 * If FALSE, the stuck-at state is passive level, else the stuck-at state is active level.
142 *
143 * \note The values for the parameters are arranged as follows:
144 * index = 0 --> phase 0 top
145 * index = 1 --> phase 0 bottom
146 * index = 2 --> phase 1 top
147 * index = 3 --> phase 1 bottom
148 * index = 4 --> phase 2 top
149 * index = 5 --> phase 2 bottom
150 */
151 typedef void (*IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt);
152
153 /** \brief Standard interface object
154 */
155 struct IfxStdIf_PwmHl_
156 {
157 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
158
159 /* PWM related APIs*/
160 IfxStdIf_PwmHl_SetDeadtime setDeadtime; /**< \brief IfxStdIf_PwmHl_SetDeadtime */
161 IfxStdIf_PwmHl_GetDeadtime getDeadtime; /**< \brief IfxStdIf_PwmHl_GetDeadtime */
162 IfxStdIf_PwmHl_SetMinPulse setMinPulse; /**< \brief IfxStdIf_PwmHl_SetMinPulse */
163 IfxStdIf_PwmHl_GetMinPulse getMinPulse; /**< \brief IfxStdIf_PwmHl_GetMinPulse */
164 IfxStdIf_PwmHl_GetMode getMode; /**< \brief IfxStdIf_PwmHl_GetMode */
165 IfxStdIf_PwmHl_SetMode setMode; /**< \brief IfxStdIf_PwmHl_SetMode */
166 IfxStdIf_PwmHl_SetOnTime setOnTime; /**< \brief IfxStdIf_PwmHl_SetOnTime */
167 IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift; /**< \brief IfxStdIf_PwmHl_SetOnTime */
168 IfxStdIf_PwmHl_SetPulse setPulse; /**< \brief IfxStdIf_PwmHl_Pulse */
169 IfxStdIf_PwmHl_SetupChannels setupChannels; /**< \brief IfxStdIf_PwmHl_SetupChannels */
170
171 IfxStdIf_Timer timer; /**< \brief Timer related standard interface */
172 };
173
174 /** \brief Multi-channels PWM object configuration */
175 typedef struct
176 {
177 float32 deadtime; /**< \brief Dead time between the top and bottom channels in seconds */
178 float32 minPulse; /**< \brief Min pulse allowed as active state for the top and bottom PWM in seconds */
179 uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
180 boolean emergencyEnabled; /**< \brief Specifies if the emergency stop should be enabled or not */
181
182 IfxPort_OutputMode outputMode; /**< \brief Output mode of ccx and coutx pins */
183 IfxPort_PadDriver outputDriver; /**< \brief Output pad driver of ccx and coutx pins */
184
185 Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
186 Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
187 } IfxStdIf_PwmHl_Config;
188
189 /** \addtogroup library_srvsw_stdif_pwmhl
190 * \{
191 */
192
193 /** \copydoc IfxStdIf_PwmHl_SetDeadtime
194 * \param stdIf Standard interface pointer
195 */
196 IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime(IfxStdIf_PwmHl *stdIf, float32 deadtime)
197 {
198 return stdIf->setDeadtime(stdIf->driver, deadtime);
199 }
200
201
202 /** \copydoc IfxStdIf_PwmHl_GetDeadtime
203 * \param stdIf Standard interface pointer
204 */
205 IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime(IfxStdIf_PwmHl *stdIf)
206 {
207 return stdIf->getDeadtime(stdIf->driver);
208 }
209
210
211 /** \copydoc IfxStdIf_PwmHl_SetMinPulse
212 * \param stdIf Standard interface pointer
213 */
214 IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse(IfxStdIf_PwmHl *stdIf, float32 minPulse)
215 {
216 return stdIf->setMinPulse(stdIf->driver, minPulse);
217 }
218
219
220 /** \copydoc IfxStdIf_PwmHl_GetMinPulse
221 * \param stdIf Standard interface pointer
222 */
223 IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse(IfxStdIf_PwmHl *stdIf)
224 {
225 return stdIf->getMinPulse(stdIf->driver);
226 }
227
228
229 /** \copydoc IfxStdIf_PwmHl_GetMode
230 * \param stdIf Standard interface pointer
231 */
232 IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode(IfxStdIf_PwmHl *stdIf)
233 {
234 return stdIf->getMode(stdIf->driver);
235 }
236
237
238 /** \copydoc IfxStdIf_PwmHl_SetMode
239 * \param stdIf Standard interface pointer
240 */
241 IFX_INLINE boolean IfxStdIf_PwmHl_setMode(IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
242 {
243 return stdIf->setMode(stdIf->driver, mode);
244 }
245
246
247 /** \copydoc IfxStdIf_PwmHl_SetOnTime
248 * \param stdIf Standard interface pointer
249 */
250 IFX_INLINE void IfxStdIf_PwmHl_setOnTime(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
251 {
252 stdIf->setOnTime(stdIf->driver, tOn);
253 }
254
255
256 /** \copydoc IfxStdIf_PwmHl_SetOnTimeAndShift
257 * \param stdIf Standard interface pointer
258 */
259 IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
260 {
261 stdIf->setOnTimeAndShift(stdIf->driver, tOn, shift);
262 }
263
264
265 /** \copydoc IfxStdIf_PwmHl_SetPulse
266 * \param stdIf Standard interface pointer
267 */
268 IFX_INLINE void IfxStdIf_PwmHl_setPulse(IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
269 {
270 stdIf->setPulse(stdIf->driver, tOn, offset);
271 }
272
273
274 /** \copydoc IfxStdIf_PwmHl_SetupChannels
275 */
276 IFX_INLINE void IfxStdIf_PwmHl_setupChannels(IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
277 {
278 IFX_UNUSED_PARAMETER(stdIf);
279 IFX_UNUSED_PARAMETER(activeCh);
280 IFX_UNUSED_PARAMETER(stuckSt);
281 }
282
283 /** \brief Return the timer standard interface used by the IfxStdIf_PwmHl standard interface
284 * \param stdIf Standard interface pointer
285 * \return Returns the pointer to the IfxStdIf_Timer object
286 */
287 IFX_INLINE IfxStdIf_Timer *IfxStdIf_PwmHl_getTimer(IfxStdIf_PwmHl *stdIf)
288 {
289 return &stdIf->timer;
290 }
291
292
293 /** \} */
294
295 /** Initialize the configuration structure to default
296 *
297 * \param config Timer configuration. This parameter is initialised by the function
298 *
299 */
300 IFX_EXTERN void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config);
301
302 #endif /* IFXSTDIF_PWMHL_H */
Ifx_Pwm_Mode
Ifx_Pwm_Mode
Definition: Ifx_Types.h:158
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:98
IfxStdIf_PwmHl_::getMinPulse
IfxStdIf_PwmHl_GetMinPulse getMinPulse
IfxStdIf_PwmHl_GetMinPulse.
Definition: IfxStdIf_PwmHl.h:163
IfxStdIf_PwmHl_::setupChannels
IfxStdIf_PwmHl_SetupChannels setupChannels
IfxStdIf_PwmHl_SetupChannels.
Definition: IfxStdIf_PwmHl.h:169
IfxStdIf_PwmHl_SetupChannels
void(* IfxStdIf_PwmHl_SetupChannels)(IfxStdIf_InterfaceDriver stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:151
IfxStdIf_PwmHl_Config::emergencyEnabled
boolean emergencyEnabled
Specifies if the emergency stop should be enabled or not.
Definition: IfxStdIf_PwmHl.h:180
IfxStdIf.h
Standard interface types.
IfxStdIf_PwmHl_GetMode
Ifx_Pwm_Mode(* IfxStdIf_PwmHl_GetMode)(IfxStdIf_InterfaceDriver stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:101
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxStdIf_PwmHl_Config::outputMode
IfxPort_OutputMode outputMode
Output mode of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:182
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_PwmHl_::setDeadtime
IfxStdIf_PwmHl_SetDeadtime setDeadtime
IfxStdIf_PwmHl_SetDeadtime.
Definition: IfxStdIf_PwmHl.h:160
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxStdIf_PwmHl_::setPulse
IfxStdIf_PwmHl_SetPulse setPulse
IfxStdIf_PwmHl_Pulse.
Definition: IfxStdIf_PwmHl.h:168
IfxStdIf_PwmHl_setMinPulse
IFX_INLINE boolean IfxStdIf_PwmHl_setMinPulse(IfxStdIf_PwmHl *stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:214
IfxStdIf_PwmHl_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_PwmHl.h:157
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
IfxStdIf_PwmHl_setupChannels
IFX_INLINE void IfxStdIf_PwmHl_setupChannels(IfxStdIf_PwmHl *stdIf, boolean *activeCh, boolean *stuckSt)
Set channels which are generating PWM or in "stuck-at" state.
Definition: IfxStdIf_PwmHl.h:276
IfxStdIf_PwmHl_setOnTime
IFX_INLINE void IfxStdIf_PwmHl_setOnTime(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:250
IfxStdIf_PwmHl_setPulse
IFX_INLINE void IfxStdIf_PwmHl_setPulse(IfxStdIf_PwmHl *stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:268
IfxStdIf_PwmHl_SetPulse
void(* IfxStdIf_PwmHl_SetPulse)(IfxStdIf_InterfaceDriver stdIf, float32 *tOn, float32 *offset)
Set the pwm pulse of all switched independently.
Definition: IfxStdIf_PwmHl.h:132
IfxStdIf_PwmHl_::getMode
IfxStdIf_PwmHl_GetMode getMode
IfxStdIf_PwmHl_GetMode.
Definition: IfxStdIf_PwmHl.h:164
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStdIf_PwmHl_Config::ccxActiveState
Ifx_ActiveState ccxActiveState
Top PWM active state.
Definition: IfxStdIf_PwmHl.h:185
IfxStdIf_PwmHl_GetMinPulse
float32(* IfxStdIf_PwmHl_GetMinPulse)(IfxStdIf_InterfaceDriver stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:93
IfxStdIf_PwmHl_Config::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver of ccx and coutx pins.
Definition: IfxStdIf_PwmHl.h:183
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxStdIf_PwmHl_initConfig
IFX_EXTERN void IfxStdIf_PwmHl_initConfig(IfxStdIf_PwmHl_Config *config)
Definition: IfxStdIf_PwmHl.c:28
IfxStdIf_PwmHl_Config
Multi-channels PWM object configuration.
Definition: IfxStdIf_PwmHl.h:175
IfxStdIf_PwmHl_
Standard interface object.
Definition: IfxStdIf_PwmHl.h:155
IfxStdIf_PwmHl_setMode
IFX_INLINE boolean IfxStdIf_PwmHl_setMode(IfxStdIf_PwmHl *stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:241
IfxStdIf_PwmHl_getTimer
IFX_INLINE IfxStdIf_Timer * IfxStdIf_PwmHl_getTimer(IfxStdIf_PwmHl *stdIf)
Return the timer standard interface used by the IfxStdIf_PwmHl standard interface.
Definition: IfxStdIf_PwmHl.h:287
IfxStdIf_PwmHl_SetMinPulse
boolean(* IfxStdIf_PwmHl_SetMinPulse)(IfxStdIf_InterfaceDriver stdIf, float32 minPulse)
Set the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:85
IfxStdIf_PwmHl_Config::deadtime
float32 deadtime
Dead time between the top and bottom channels in seconds.
Definition: IfxStdIf_PwmHl.h:177
IfxStdIf_PwmHl_setDeadtime
IFX_INLINE boolean IfxStdIf_PwmHl_setDeadtime(IfxStdIf_PwmHl *stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:196
IfxStdIf_Timer.h
Standard interface: Timer.
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
boolean
unsigned char boolean
Definition: Platform_Types.h:101
IfxStdIf_PwmHl_Config::coutxActiveState
Ifx_ActiveState coutxActiveState
Bottom PWM active state.
Definition: IfxStdIf_PwmHl.h:186
IfxStdIf_PwmHl_Config::channelCount
uint8 channelCount
Number of PWM channels, one channel is made of a top and bottom channel.
Definition: IfxStdIf_PwmHl.h:179
IfxStdIf_PwmHl_::setOnTime
IfxStdIf_PwmHl_SetOnTime setOnTime
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:166
IfxStdIf_PwmHl_SetDeadtime
boolean(* IfxStdIf_PwmHl_SetDeadtime)(IfxStdIf_InterfaceDriver stdIf, float32 deadtime)
Set the dead time in s.
Definition: IfxStdIf_PwmHl.h:69
IfxStdIf_PwmHl_getMode
IFX_INLINE Ifx_Pwm_Mode IfxStdIf_PwmHl_getMode(IfxStdIf_PwmHl *stdIf)
Return the PWM mode.
Definition: IfxStdIf_PwmHl.h:232
IfxStdIf_PwmHl_Config::minPulse
float32 minPulse
Min pulse allowed as active state for the top and bottom PWM in seconds.
Definition: IfxStdIf_PwmHl.h:178
IfxStdIf_PwmHl_::timer
IfxStdIf_Timer timer
Timer related standard interface.
Definition: IfxStdIf_PwmHl.h:171
IfxStdIf_PwmHl_getDeadtime
IFX_INLINE float32 IfxStdIf_PwmHl_getDeadtime(IfxStdIf_PwmHl *stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:205
IfxStdIf_PwmHl_::setMinPulse
IfxStdIf_PwmHl_SetMinPulse setMinPulse
IfxStdIf_PwmHl_SetMinPulse.
Definition: IfxStdIf_PwmHl.h:162
IfxStdIf_PwmHl_SetOnTime
void(* IfxStdIf_PwmHl_SetOnTime)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn)
Set the pwm ON time.
Definition: IfxStdIf_PwmHl.h:116
IfxStdIf_PwmHl_::getDeadtime
IfxStdIf_PwmHl_GetDeadtime getDeadtime
IfxStdIf_PwmHl_GetDeadtime.
Definition: IfxStdIf_PwmHl.h:161
IfxStdIf_PwmHl_::setMode
IfxStdIf_PwmHl_SetMode setMode
IfxStdIf_PwmHl_SetMode.
Definition: IfxStdIf_PwmHl.h:165
IfxStdIf_PwmHl_SetOnTimeAndShift
void(* IfxStdIf_PwmHl_SetOnTimeAndShift)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:124
IfxStdIf_PwmHl_GetDeadtime
float32(* IfxStdIf_PwmHl_GetDeadtime)(IfxStdIf_InterfaceDriver stdIf)
Return the dead time in s.
Definition: IfxStdIf_PwmHl.h:77
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxStdIf_PwmHl_setOnTimeAndShift
IFX_INLINE void IfxStdIf_PwmHl_setOnTimeAndShift(IfxStdIf_PwmHl *stdIf, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
Set the pwm ON time and shift value.
Definition: IfxStdIf_PwmHl.h:259
IfxStdIf_PwmHl_SetMode
boolean(* IfxStdIf_PwmHl_SetMode)(IfxStdIf_InterfaceDriver stdIf, Ifx_Pwm_Mode mode)
Set the pwm mode.
Definition: IfxStdIf_PwmHl.h:109
IfxStdIf_PwmHl_::setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTimeAndShift setOnTimeAndShift
IfxStdIf_PwmHl_SetOnTime.
Definition: IfxStdIf_PwmHl.h:167
IfxStdIf_PwmHl_getMinPulse
IFX_INLINE float32 IfxStdIf_PwmHl_getMinPulse(IfxStdIf_PwmHl *stdIf)
Return the minimum pulse time in s.
Definition: IfxStdIf_PwmHl.h:223


iLLD_TC26B: IfxStdIf_Timer.c Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Timer.c
3 * \brief Standard interface: Timer
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxStdIf_Timer.h"
27
28 void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
29 {
30 config->frequency = 1000;
31 config->isrPriority = 0;
32 config->isrProvider = IfxSrc_Tos_cpu0;
33 config->minResolution = 0;
34 config->trigger.outputMode = IfxPort_OutputMode_pushPull;
35 config->trigger.outputDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
36 config->trigger.risingEdgeAtPeriod = FALSE;
37 config->trigger.outputEnabled = FALSE;
38 config->trigger.enabled = FALSE;
39 config->trigger.triggerPoint = 0;
40 config->trigger.isrPriority = 0;
41 config->trigger.isrProvider = IfxSrc_Tos_cpu0;
42 config->countDir = IfxStdIf_Timer_CountDir_up;
43 config->startOffset = 0.0;
44 }
45
46
47 static float32 IfxStdIf_Timer_nopGetFrequency(IfxStdIf_InterfaceDriver stdIf)
48 {
49 IFX_UNUSED_PARAMETER(stdIf);
50 return 0.0;
51 }
52 static Ifx_TimerValue IfxStdIf_Timer_nopGetPeriod(IfxStdIf_InterfaceDriver stdIf)
53 {
54 IFX_UNUSED_PARAMETER(stdIf);
55 return 0;
56 }
57 static float32 IfxStdIf_Timer_nopGetResolution(IfxStdIf_InterfaceDriver stdIf)
58 {
59 IFX_UNUSED_PARAMETER(stdIf);
60 return 0.0;
61 }
62 static Ifx_TimerValue IfxStdIf_Timer_nopGetTrigger(IfxStdIf_InterfaceDriver stdIf)
63 {
64 IFX_UNUSED_PARAMETER(stdIf);
65 return 0;
66 }
67 static boolean IfxStdIf_Timer_nopSetFrequency(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
68 {
69 IFX_UNUSED_PARAMETER(stdIf);
70 IFX_UNUSED_PARAMETER(frequency);
71 return FALSE;
72 }
73 static void IfxStdIf_Timer_nopUpdateInputFrequency(IfxStdIf_InterfaceDriver stdIf)
74 {
75 IFX_UNUSED_PARAMETER(stdIf);
76 }
77 static void IfxStdIf_Timer_nopApplyUpdate(IfxStdIf_InterfaceDriver stdIf)
78 {
79 IFX_UNUSED_PARAMETER(stdIf);
80 }
81 static void IfxStdIf_Timer_nopDisableUpdate(IfxStdIf_InterfaceDriver stdIf)
82 {
83 IFX_UNUSED_PARAMETER(stdIf);
84 }
85 static float32 IfxStdIf_Timer_nopGetInputFrequency(IfxStdIf_InterfaceDriver stdIf)
86 {
87 IFX_UNUSED_PARAMETER(stdIf);
88 return 0.0;
89 }
90 static void IfxStdIf_Timer_nopRun(IfxStdIf_InterfaceDriver stdIf)
91 {
92 IFX_UNUSED_PARAMETER(stdIf);
93 }
94 static boolean IfxStdIf_Timer_nopSetPeriod(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
95 {
96 IFX_UNUSED_PARAMETER(stdIf);
97 IFX_UNUSED_PARAMETER(period);
98 return FALSE;
99 }
100 static void IfxStdIf_Timer_nopSetSingleMode(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
101 {
102 IFX_UNUSED_PARAMETER(stdIf);
103 IFX_UNUSED_PARAMETER(enabled);
104 }
105 static void IfxStdIf_Timer_nopSetTrigger(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
106 {
107 IFX_UNUSED_PARAMETER(stdIf);
108 IFX_UNUSED_PARAMETER(triggerPoint);
109 }
110 static void IfxStdIf_Timer_nopStop(IfxStdIf_InterfaceDriver stdIf)
111 {
112 IFX_UNUSED_PARAMETER(stdIf);
113 }
114 static boolean IfxStdIf_Timer_nopAckTimerIrq(IfxStdIf_InterfaceDriver stdIf)
115 {
116 IFX_UNUSED_PARAMETER(stdIf);
117 return FALSE;
118 }
119 static boolean IfxStdIf_Timer_nopAckTriggerIrq(IfxStdIf_InterfaceDriver stdIf)
120 {
121 IFX_UNUSED_PARAMETER(stdIf);
122 return FALSE;
123 }
124
125
126 void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
127 {
128 stdIf->driver = driver;
129 stdIf->getFrequency =&IfxStdIf_Timer_nopGetFrequency ;
130 stdIf->getPeriod =&IfxStdIf_Timer_nopGetPeriod ;
131 stdIf->getResolution =&IfxStdIf_Timer_nopGetResolution ;
132 stdIf->getTrigger =&IfxStdIf_Timer_nopGetTrigger ;
133 stdIf->setFrequency =&IfxStdIf_Timer_nopSetFrequency ;
134 stdIf->updateInputFrequency =&IfxStdIf_Timer_nopUpdateInputFrequency;
135 stdIf->applyUpdate =&IfxStdIf_Timer_nopApplyUpdate ;
136 stdIf->disableUpdate =&IfxStdIf_Timer_nopDisableUpdate ;
137 stdIf->getInputFrequency =&IfxStdIf_Timer_nopGetInputFrequency ;
138 stdIf->run =&IfxStdIf_Timer_nopRun ;
139 stdIf->setPeriod =&IfxStdIf_Timer_nopSetPeriod ;
140 stdIf->setSingleMode =&IfxStdIf_Timer_nopSetSingleMode ;
141 stdIf->setTrigger =&IfxStdIf_Timer_nopSetTrigger ;
142 stdIf->stop =&IfxStdIf_Timer_nopStop ;
143 stdIf->ackTimerIrq =&IfxStdIf_Timer_nopAckTimerIrq ;
144 stdIf->ackTriggerIrq =&IfxStdIf_Timer_nopAckTriggerIrq ;
145 }
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:226
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:259
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:98
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:236
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:234
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:222
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:249
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:223
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:255
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:258
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:230
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:250
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:28
IfxStdIf_Timer.h
Standard interface: Timer.
IfxStdIf_Timer_initStdIf
void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:126
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:70
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:231
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:235
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:227
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:232
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:228
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:238
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:257
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:225
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:263
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:229
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:260
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:248
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:224


iLLD_TC26B: IfxStdIf_Timer.h Source File

  • Service
  • CpuGeneric
  • StdIf
IfxStdIf_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxStdIf_Timer.h
3 * \brief Standard interface: Timer
4 * \ingroup IfxStdIf
5 *
6 * \version disabled
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 *
25 * \defgroup library_srvsw_stdif_timer Standard interface: Timer
26 * \ingroup library_srvsw_stdif
27 *
28 * The standard interface timer (Timer) abstract the hardware used for timer feature. It provide, after proper initialization an hardware
29 * independant way to interact with the timer functionallity like setting period, trigger points, ...
30 *
31 * The figure below shows the standard timer interface.
32 *
33 * \image html "Timer.png" "Standard timer interface"
34 *
35 * This interface defines the following features:
36 * - Timer with configurable frequency
37 * - Configurable counting direction
38 * - Optional interrupt on timer event with configurable service request provider and priority
39 * - Optional trigger signal with:
40 * - Optional interrupt on trigger event with configurable service request provider and priority
41 * - Configurable trigger point
42 * - Configurable trigger edge
43 * - trigger signal can be internal only or forwarded to a port pin
44 */
45
46 #ifndef IFXSTDIF_TIMER_H
47 #define IFXSTDIF_TIMER_H 1
48
49 #include "Cpu/Std/Ifx_Types.h"
50 #include "Src/Std/IfxSrc.h"
51 #include "Port/Std/IfxPort.h"
52 #include "IfxStdIf.h"
53 /** \brief Output event enable / disable */
54 typedef enum
55 {
56 IfxStdIf_Timer_Output_disabled, /**< \brief Timer output is set to the inactive, no change in the output */
57 IfxStdIf_Timer_Output_enabled /**< \brief In case the trigger is enabled,
58 * the output is set to active between time 0 to the trigger point,
59 * and is set to inactive between the trigger point and the period.
60 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_up, the output is toggled when the timer is reset
61 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_down, the output is toggled when the timer is reloaded
62 * In case the trigger is disabled and counting direction if IfxStdIf_Timer_CountDir_upAndDown, the output is toggled when the timer reach 0
63 * In case the trigger is enabled the trigger is active before the trigger point and inactive after the trigger point.
64 */
65 } IfxStdIf_Timer_OutputEvent;
66
67 /** \brief Timer increment direction */
68 typedef enum
69 {
70 IfxStdIf_Timer_CountDir_up, /**< \brief Timer is counting up */
71 IfxStdIf_Timer_CountDir_upAndDown, /**< \brief Timer is counting up and down */
72 IfxStdIf_Timer_CountDir_down /**< \brief Timer is counting down */
73 } IfxStdIf_Timer_CountDir;
74
75 /** \brief Forward declaration */
76 typedef struct IfxStdIf_Timer_ IfxStdIf_Timer;
77
78 /** \brief Return the timer frequency in Hz
79 * \param stdIf Pointer to the interface driver object
80 * \return Return the timer frequency in Hz
81 */
82 typedef float32 (*IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf);
83
84 /** \brief Return the timer period in ticks
85 * \param stdIf Pointer to the interface driver object
86 * \return Return the timer period in ticks
87 */
88 typedef Ifx_TimerValue (*IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf);
89
90 /** \brief Return the timer resolution in seconds
91 * \param stdIf Pointer to the interface driver object
92 * \return Return the timer resolution in seconds
93 */
94 typedef float32 (*IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf);
95
96 /** \brief Return the timer trigger point
97 * \param stdIf Pointer to the interface driver object
98 * \return Return the timer timer point
99 */
100 typedef Ifx_TimerValue (*IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf);
101
102 /** \brief Set the timer frequency in Hz
103 * \param stdIf Pointer to the interface driver object
104 * \param frequency Requested timer frequency in Hz
105 * \retval TRUE The requested frequency could be set
106 * \retval FALSE The requested frequency is out of range
107 */
108 typedef boolean (*IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency);
109
110 /** \brief Indicates the stdIf that the imput frequency has changed and that it should be taken in account
111 * \param stdIf Pointer to the interface driver object
112 * \return None
113 */
114 typedef void (*IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf);
115
116 /** \brief Apply requested updates.
117 *
118 * Such requested update are calls to:
119 * - IfxStdIf_Timer_setSingleMode()
120 * - IfxStdIf_Timer_setTrigger()
121 * - IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency()
122 * as well as PWM generation related calls such as:
123 * - IfxStdIf_PwmHl_setDeadtime()
124 * - IfxStdIf_PwmHl_setMode()
125 * - IfxStdIf_PwmHl_setOnTime()
126 * - IfxStdIf_PwmHl_setupChannels()
127 *
128 * It is important to note, that only one call to Timer_applyUpdate() is allowed within
129 * one timer period!!!
130 * In order to ensure correct update synchronisation, disableUpdate() should have been called previously.
131 *
132 * \param stdIf Pointer to the interface driver object
133 * \return None
134 */
135 typedef void (*IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf);
136
137 /** \brief Disable updates
138 *
139 * The following API action will not be taken in account before applyUpdate is called:
140 * - IfxStdIf_Timer_setSingleMode()
141 * - IfxStdIf_Timer_setTrigger()
142 * - IfxStdIf_Timer_setPeriod() or IfxStdIf_Timer_setFrequency()
143 * as well as PWM generation related calls such as:
144 * - IfxStdIf_PwmHl_setDeadtime()
145 * - IfxStdIf_PwmHl_setMode()
146 * - IfxStdIf_PwmHl_setOnTime()
147 * - IfxStdIf_PwmHl_setupChannels()
148 *
149 * \param stdIf Pointer to the interface driver object
150 * \return None
151 */
152 typedef void (*IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf);
153
154 /** \brief Return the timer input frequency in Hz
155 * \param stdIf Pointer to the interface driver object
156 * \return Return the timer input frequency in Hz
157 */
158 typedef float32 (*IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf);
159
160 /** \brief Immediately start the timer.
161 *
162 * Please note that other mechanism may avoid the timer to tick, such as when the
163 * global (input) clock to the timer block is inactive.
164 * \param stdIf Pointer to the interface driver object
165 * \return none
166 */
167 typedef void (*IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf);
168
169 /** \brief Set the timer period.
170 *
171 * Timer_applyUpdate() shall be invoked in order this to take effect.
172 * \param stdIf Pointer to the interface driver object
173 * \param period Period value in ticks
174 * \retval TRUE The requested period could be set
175 * \retval FALSE The requested period is out of range
176 */
177 typedef boolean (*IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period);
178
179 /** \brief Stop timer at the end of the period
180 *
181 * Timer_applyUpdate() shall be invoked in order this to take effect.
182 * \param stdIf Pointer to the interface driver object
183 * \param enabled If TRUE, enable the single mode, else disable the single mode (continuous mode)
184 * \return none
185 */
186 typedef void (*IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled);
187
188 /** \brief Set trigger point.
189 *
190 * \see Timer_OutputEvent for the definition of the output level.
191 * Active state is defined by Timer_Config::outputActiveState.
192 *
193 * Timer_applyUpdate() shall be invoked in order this to take effect.
194 * \param stdIf Pointer to the interface driver object
195 * \param triggerPoint Trigger point in ticks from the period start.
196 * \return none
197 */
198 typedef void (*IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint);
199
200 /** \brief Immediately stops the timer
201 * \param stdIf Pointer to the interface driver object
202 * \return none
203 */
204 typedef void (*IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf);
205
206 /** \brief Return the timer interrupt flag and reset it
207 * \param stdIf Pointer to the interface driver object
208 * \return Return the timer interrupt flag
209 */
210 typedef boolean (*IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf);
211
212 /** \brief Return the trigger interrupt flag and reset it
213 * \param stdIf Pointer to the interface driver object
214 * \return Return the trigger interrupt flag
215 */
216 typedef boolean (*IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf);
217
218 /** \brief Standard interface object
219 */
220 struct IfxStdIf_Timer_
221 {
222 IfxStdIf_InterfaceDriver driver; /**< \brief Interface driver object */
223 IfxStdIf_Timer_GetFrequency getFrequency; /**< \brief \see IfxStdIf_Timer_GetFrequency */
224 IfxStdIf_Timer_GetPeriod getPeriod; /**< \brief \see IfxStdIf_Timer_GetPeriod */
225 IfxStdIf_Timer_GetResolution getResolution; /**< \brief \see IfxStdIf_Timer_GetResolution */
226 IfxStdIf_Timer_GetTrigger getTrigger; /**< \brief \see IfxStdIf_Timer_GetTrigger */
227 IfxStdIf_Timer_SetFrequency setFrequency; /**< \brief \see IfxStdIf_Timer_SetFrequency */
228 IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency; /**< \brief \see IfxStdIf_Timer_UpdateInputFrequency */
229 IfxStdIf_Timer_ApplyUpdate applyUpdate; /**< \brief \see IfxStdIf_Timer_ApplyUpdate */
230 IfxStdIf_Timer_DisableUpdate disableUpdate; /**< \brief \see IfxStdIf_Timer_DisableUpdate */
231 IfxStdIf_Timer_GetInputFrequency getInputFrequency; /**< \brief \see IfxStdIf_Timer_GetInputFrequency */
232 IfxStdIf_Timer_Run run; /**< \brief \see IfxStdIf_Timer_Run */
233 IfxStdIf_Timer_SetPeriod setPeriod; /**< \brief \see IfxStdIf_Timer_SetPeriod */
234 IfxStdIf_Timer_SetSingleMode setSingleMode; /**< \brief \see IfxStdIf_Timer_SetSingleMode */
235 IfxStdIf_Timer_SetTrigger setTrigger; /**< \brief \see IfxStdIf_Timer_SetTrigger */
236 IfxStdIf_Timer_Stop stop; /**< \brief \see IfxStdIf_Timer_Stop */
237 IfxStdIf_Timer_AckTimerIrq ackTimerIrq; /**< \brief \see IfxStdIf_Timer_AckTimerIrq */
238 IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq; /**< \brief \see IfxStdIf_Timer_AckTriggerIrq */
239 };
240
241 /** \brief Trigger configuration */
242 typedef struct
243 {
244 boolean enabled; /**< \brief If true, the trigger functionality is Initialised, else ignored */
245 Ifx_TimerValue triggerPoint; /**< \brief Trigger point in timer ticks */
246 Ifx_Priority isrPriority; /**< \brief Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable */
247 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the trigger interrupt */
248 IfxPort_OutputMode outputMode; /**< \brief Output mode */
249 IfxPort_PadDriver outputDriver; /**< \brief Output pad driver */
250 boolean risingEdgeAtPeriod; /**< \brief Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset. When the timer is stopped, the output is set to high */
251 boolean outputEnabled; /**< \brief If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized. */
252 } IfxStdIf_Timer_TrigConfig;
253
254 /** \brief Timer configuration */
255 typedef struct
256 {
257 float32 frequency; /**< \brief PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer. */
258 Ifx_Priority isrPriority; /**< \brief Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable */
259 IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the timer interrupt */
260 float32 minResolution; /**< \brief Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration does not enable this setting a warning is given */
261 IfxStdIf_Timer_TrigConfig trigger; /**< \brief Trigger configuration */
262 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
263 float32 startOffset; /**< \brief FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period */
264 } IfxStdIf_Timer_Config;
265
266 /** \addtogroup library_srvsw_stdif_timer
267 * \{
268 */
269 /** \copydoc IfxStdIf_Timer_GetFrequency
270 * \param stdIf Standard interface pointer
271 */
272 IFX_INLINE float32 IfxStdIf_Timer_getFrequency(IfxStdIf_Timer *stdIf)
273 {
274 return stdIf->getFrequency(stdIf->driver);
275 }
276
277
278 /** \copydoc IfxStdIf_Timer_GetPeriod
279 * \param stdIf Standard interface pointer
280 */
281 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod(IfxStdIf_Timer *stdIf)
282 {
283 return stdIf->getPeriod(stdIf->driver);
284 }
285
286
287 /** \copydoc IfxStdIf_Timer_GetTrigger
288 * \param stdIf Standard interface pointer
289 */
290 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger(IfxStdIf_Timer *stdIf)
291 {
292 return stdIf->getTrigger(stdIf->driver);
293 }
294
295
296 /** \copydoc IfxStdIf_Timer_GetResolution
297 * \param stdIf Standard interface pointer
298 */
299 IFX_INLINE float32 IfxStdIf_Timer_getResolution(IfxStdIf_Timer *stdIf)
300 {
301 return stdIf->getResolution(stdIf->driver);
302 }
303
304
305 /** \copydoc IfxStdIf_Timer_SetFrequency
306 * \param stdIf Standard interface pointer
307 */
308 IFX_INLINE boolean IfxStdIf_Timer_setFrequency(IfxStdIf_Timer *stdIf, float32 frequency)
309 {
310 return stdIf->setFrequency(stdIf->driver, frequency);
311 }
312
313
314 /** \copydoc IfxStdIf_Timer_UpdateInputFrequency
315 * \param stdIf Standard interface pointer
316 */
317 IFX_INLINE void IfxStdIf_Timer_updateInputFrequency(IfxStdIf_Timer *stdIf)
318 {
319 stdIf->updateInputFrequency(stdIf->driver);
320 }
321
322
323 /** \copydoc IfxStdIf_Timer_ApplyUpdate
324 * \param stdIf Standard interface pointer
325 */
326 IFX_INLINE void IfxStdIf_Timer_applyUpdate(IfxStdIf_Timer *stdIf)
327 {
328 stdIf->applyUpdate(stdIf->driver);
329 }
330
331
332 /** \copydoc IfxStdIf_Timer_DisableUpdate
333 * \param stdIf Standard interface pointer
334 */
335 IFX_INLINE void IfxStdIf_Timer_disableUpdate(IfxStdIf_Timer *stdIf)
336 {
337 stdIf->disableUpdate(stdIf->driver);
338 }
339
340
341 /** \copydoc IfxStdIf_Timer_GetInputFrequency
342 * \param stdIf Standard interface pointer
343 */
344 IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency(IfxStdIf_Timer *stdIf)
345 {
346 return stdIf->getInputFrequency(stdIf->driver);
347 }
348
349
350 /** \copydoc IfxStdIf_Timer_Run
351 * \param stdIf Standard interface pointer
352 */
353 IFX_INLINE void IfxStdIf_Timer_run(IfxStdIf_Timer *stdIf)
354 {
355 stdIf->run(stdIf->driver);
356 }
357
358
359 /** \copydoc IfxStdIf_Timer_SetPeriod
360 * \param stdIf Standard interface pointer
361 */
362 IFX_INLINE boolean IfxStdIf_Timer_setPeriod(IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
363 {
364 return stdIf->setPeriod(stdIf->driver, period);
365 }
366
367
368 /** \copydoc IfxStdIf_Timer_SetSingleMode
369 * \param stdIf Standard interface pointer
370 */
371 IFX_INLINE void IfxStdIf_Timer_setSingleMode(IfxStdIf_Timer *stdIf, boolean enabled)
372 {
373 stdIf->setSingleMode(stdIf->driver, enabled);
374 }
375
376
377 /** \copydoc IfxStdIf_Timer_SetTrigger
378 * \param stdIf Standard interface pointer
379 */
380 IFX_INLINE void IfxStdIf_Timer_setTrigger(IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
381 {
382 stdIf->setTrigger(stdIf->driver, triggerPoint);
383 }
384
385
386 /** \copydoc IfxStdIf_Timer_Stop
387 * \param stdIf Standard interface pointer
388 */
389 IFX_INLINE void IfxStdIf_Timer_stop(IfxStdIf_Timer *stdIf)
390 {
391 stdIf->stop(stdIf->driver);
392 }
393
394
395 /** \copydoc IfxStdIf_Timer_AckTimerIrq
396 * \param stdIf Standard interface pointer
397 */
398 IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq(IfxStdIf_Timer *stdIf)
399 {
400 return stdIf->ackTimerIrq(stdIf->driver);
401 }
402
403
404 /** \copydoc IfxStdIf_Timer_AckTriggerIrq
405 * \param stdIf Standard interface pointer
406 */
407 IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq(IfxStdIf_Timer *stdIf)
408 {
409 return stdIf->ackTriggerIrq(stdIf->driver);
410 }
411
412
413 /** \brief Convert timer ticks to seconds
414 * \param clockFreq Timer clock frequency
415 * \param ticks time value in ticks to be converted
416 * \return Return the converted time in s
417 */
418 IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
419 {
420 return ticks / clockFreq;
421 }
422
423
424 /** \brief Convert seconds to timer ticks
425 * \param clockFreq Timer clock frequency
426 * \param seconds time value in seconds to be converted
427 * \return Return the converted time in timer ticks
428 */
429 IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
430 {
431 return seconds * clockFreq;
432 }
433
434
435 /** \brief Return the timer period in second
436 * \param stdIf Pointer to the interface driver object
437 */
438 IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond(IfxStdIf_Timer *stdIf)
439 {
440 return IfxStdIf_Timer_tickToS(IfxStdIf_Timer_getInputFrequency(stdIf), stdIf->getPeriod(stdIf->driver));
441 }
442
443
444 /** \} */
445
446 /** Initialize the configuration structure to default
447 *
448 * \param config Timer configuration. This parameter is initialised by the function
449 *
450 */
451 IFX_EXTERN void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config);
452
453 /** Initialize the stdIf so that all call back function default to no operation
454 *
455 * \param stdIf Pointer to the interface driver object
456 * \param driver Interface driver object
457 *
458 */
459 IFX_EXTERN void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver);
460
461 #endif /* IFXSTDIF_TIMER_H */
IfxStdIf_Timer_::getTrigger
IfxStdIf_Timer_GetTrigger getTrigger
Definition: IfxStdIf_Timer.h:226
IfxStdIf_Timer_setTrigger
IFX_INLINE void IfxStdIf_Timer_setTrigger(IfxStdIf_Timer *stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:380
IfxStdIf_Timer_GetTrigger
Ifx_TimerValue(* IfxStdIf_Timer_GetTrigger)(IfxStdIf_InterfaceDriver stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:100
IfxStdIf_Timer_TrigConfig::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the trigger interrupt.
Definition: IfxStdIf_Timer.h:247
IfxStdIf_InterfaceDriver
void * IfxStdIf_InterfaceDriver
Pointer to the specific interface driver.
Definition: IfxStdIf.h:98
IfxStdIf_Timer_getPeriod
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getPeriod(IfxStdIf_Timer *stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:281
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:82
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxStdIf_Timer_stop
IFX_INLINE void IfxStdIf_Timer_stop(IfxStdIf_Timer *stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:389
IfxStdIf_Timer_AckTriggerIrq
boolean(* IfxStdIf_Timer_AckTriggerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:216
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:114
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:236
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:234
IfxStdIf_Timer_::driver
IfxStdIf_InterfaceDriver driver
Interface driver object.
Definition: IfxStdIf_Timer.h:222
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:418
IfxStdIf_Timer_Output_disabled
Timer output is set to the inactive, no change in the output.
Definition: IfxStdIf_Timer.h:56
IfxStdIf_Timer_TrigConfig::outputDriver
IfxPort_PadDriver outputDriver
Output pad driver.
Definition: IfxStdIf_Timer.h:249
IfxStdIf.h
Standard interface types.
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:108
IfxStdIf_Timer_updateInputFrequency
IFX_INLINE void IfxStdIf_Timer_updateInputFrequency(IfxStdIf_Timer *stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:317
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:429
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_Timer_initStdIf
IFX_EXTERN void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:126
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxStdIf_Timer_run
IFX_INLINE void IfxStdIf_Timer_run(IfxStdIf_Timer *stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:353
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:223
IfxSrc.h
SRC basic functionality.
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:94
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:255
IfxStdIf_Timer_getInputFrequency
IFX_INLINE float32 IfxStdIf_Timer_getInputFrequency(IfxStdIf_Timer *stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:344
IfxStdIf_Timer_OutputEvent
IfxStdIf_Timer_OutputEvent
Output event enable / disable.
Definition: IfxStdIf_Timer.h:54
IfxStdIf_Timer_initConfig
IFX_EXTERN void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:28
IfxStdIf_Timer_TrigConfig::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the trigger interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:246
IfxStdIf_Timer_CountDir_upAndDown
Timer is counting up and down.
Definition: IfxStdIf_Timer.h:71
IfxStdIf_Timer_setSingleMode
IFX_INLINE void IfxStdIf_Timer_setSingleMode(IfxStdIf_Timer *stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:371
IfxStdIf_Timer_ackTriggerIrq
IFX_INLINE boolean IfxStdIf_Timer_ackTriggerIrq(IfxStdIf_Timer *stdIf)
Return the trigger interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:407
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStdIf_Timer_TrigConfig
Trigger configuration.
Definition: IfxStdIf_Timer.h:242
IfxStdIf_Timer_::disableUpdate
IfxStdIf_Timer_DisableUpdate disableUpdate
Definition: IfxStdIf_Timer.h:230
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxStdIf_Timer_Output_enabled
In case the trigger is enabled, the output is set to active between time 0 to the trigger point...
Definition: IfxStdIf_Timer.h:57
IfxStdIf_Timer_applyUpdate
IFX_INLINE void IfxStdIf_Timer_applyUpdate(IfxStdIf_Timer *stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:326
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:158
IfxStdIf_Timer_SetTrigger
void(* IfxStdIf_Timer_SetTrigger)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue triggerPoint)
Set trigger point.
Definition: IfxStdIf_Timer.h:198
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:262
IfxStdIf_Timer_TrigConfig::risingEdgeAtPeriod
boolean risingEdgeAtPeriod
Set the clock signal polarity, if TRUE, the rising edge is at the period, else at the trigger offset...
Definition: IfxStdIf_Timer.h:250
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:70
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:231
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:68
IfxStdIf_Timer_CountDir_down
Timer is counting down.
Definition: IfxStdIf_Timer.h:72
IfxStdIf_Timer_setPeriod
IFX_INLINE boolean IfxStdIf_Timer_setPeriod(IfxStdIf_Timer *stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:362
boolean
unsigned char boolean
Definition: Platform_Types.h:101
IfxStdIf_Timer_TrigConfig::triggerPoint
Ifx_TimerValue triggerPoint
Trigger point in timer ticks.
Definition: IfxStdIf_Timer.h:245
IfxStdIf_Timer_getTrigger
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_getTrigger(IfxStdIf_Timer *stdIf)
Return the timer trigger point.
Definition: IfxStdIf_Timer.h:290
IfxStdIf_Timer_::setTrigger
IfxStdIf_Timer_SetTrigger setTrigger
Definition: IfxStdIf_Timer.h:235
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:227
IfxStdIf_Timer_getResolution
IFX_INLINE float32 IfxStdIf_Timer_getResolution(IfxStdIf_Timer *stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:299
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:232
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:228
IfxStdIf_Timer_ackTimerIrq
IFX_INLINE boolean IfxStdIf_Timer_ackTimerIrq(IfxStdIf_Timer *stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:398
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:88
IfxStdIf_Timer_DisableUpdate
void(* IfxStdIf_Timer_DisableUpdate)(IfxStdIf_InterfaceDriver stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:152
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:233
IfxStdIf_Timer_disableUpdate
IFX_INLINE void IfxStdIf_Timer_disableUpdate(IfxStdIf_Timer *stdIf)
Disable updates.
Definition: IfxStdIf_Timer.h:335
IfxStdIf_Timer_::ackTriggerIrq
IfxStdIf_Timer_AckTriggerIrq ackTriggerIrq
Definition: IfxStdIf_Timer.h:238
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:257
IfxStdIf_Timer_ApplyUpdate
void(* IfxStdIf_Timer_ApplyUpdate)(IfxStdIf_InterfaceDriver stdIf)
Apply requested updates.
Definition: IfxStdIf_Timer.h:135
IfxStdIf_Timer_getFrequency
IFX_INLINE float32 IfxStdIf_Timer_getFrequency(IfxStdIf_Timer *stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:272
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:167
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:225
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_getPeriodSecond
IFX_INLINE float32 IfxStdIf_Timer_getPeriodSecond(IfxStdIf_Timer *stdIf)
Return the timer period in second.
Definition: IfxStdIf_Timer.h:438
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:263
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:204
IfxStdIf_Timer_::applyUpdate
IfxStdIf_Timer_ApplyUpdate applyUpdate
Definition: IfxStdIf_Timer.h:229
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:210
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:244
IfxStdIf_Timer_TrigConfig::outputEnabled
boolean outputEnabled
If TRUE, the output pin is enabled, else disabled. In case the output is disabled, the output pin is not initialized.
Definition: IfxStdIf_Timer.h:251
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:177
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:260
IfxStdIf_Timer_setFrequency
IFX_INLINE boolean IfxStdIf_Timer_setFrequency(IfxStdIf_Timer *stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:308
IfxStdIf_Timer_TrigConfig::outputMode
IfxPort_OutputMode outputMode
Output mode.
Definition: IfxStdIf_Timer.h:248
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:186
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:224
IfxPort.h
PORT basic functionality.


iLLD_TC26B: IfxStm.c Source File

  • Stm
  • Std
IfxStm.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm.c
3 * \brief STM basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxStm.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
36 {
37 if (comparator == IfxStm_Comparator_0)
38 {
39 stm->ISCR.B.CMP0IRR = 1U;
40 }
41 else if (comparator == IfxStm_Comparator_1)
42 {
43 stm->ISCR.B.CMP1IRR = 1U;
44 }
45 }
46
47
48 void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
49 {
50 if (comparator == IfxStm_Comparator_0)
51 {
52 stm->ICR.B.CMP0EN = 0U;
53 }
54 else // if (comparator == IfxStm_Comparator_1)
55 {
56 stm->ICR.B.CMP1EN = 0U;
57 }
58 }
59
60
61 void IfxStm_disableModule(Ifx_STM *stm)
62 {
63 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
64
65 IfxScuWdt_clearCpuEndinit(passwd);
66 stm->CLC.B.DISR = 1;
67 IfxScuWdt_setCpuEndinit(passwd);
68 }
69
70
71 void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
72 {
73 if (comparator == IfxStm_Comparator_0)
74 {
75 stm->ICR.B.CMP0EN = 1U;
76 }
77 else if (comparator == IfxStm_Comparator_1)
78 {
79 stm->ICR.B.CMP1EN = 1U;
80 }
81 }
82
83
84 void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
85 {
86 Ifx_STM_OCS ocs = stm->OCS;
87
88 ocs.B.SUS_P = 1;
89 ocs.B.SUS = 2;
90 stm->OCS = ocs;
91 stm->OCS.B.SUS_P = 0;
92 }
93
94
95 Ifx_STM *IfxStm_getAddress(IfxStm_Index stm)
96 {
97 Ifx_STM *module;
98
99 if (stm < IFXSTM_NUM_MODULES)
100 {
101 module = (Ifx_STM *)IfxStm_cfg_indexMap[stm].module;
102 }
103 else
104 {
105 module = NULL_PTR;
106 }
107
108 return module;
109 }
110
111
112 IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
113 {
114 uint32 index;
115 IfxStm_Index result;
116
117 result = IfxStm_Index_none;
118
119 for (index = 0; index < IFXSTM_NUM_MODULES; index++)
120 {
121 if (IfxStm_cfg_indexMap[index].module == stm)
122 {
123 result = (IfxStm_Index)IfxStm_cfg_indexMap[index].index;
124 break;
125 }
126 }
127
128 return result;
129 }
130
131
132 volatile Ifx_SRC_SRCR *IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
133 {
134 IfxStm_Index index;
135 index = IfxStm_getIndex(stm);
136 return comparator == IfxStm_Comparator_0 ? &MODULE_SRC.STM.STM[index].SR0 : &MODULE_SRC.STM.STM[index].SR1;
137 }
138
139
140 boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
141 {
142 sint32 index;
143 boolean result;
144 Ifx_STM_CMCON comcon = stm->CMCON;
145 Ifx_STM_ICR icr = stm->ICR;
146
147 if (config->comparator == 0)
148 {
149 comcon.B.MSIZE0 = config->compareSize;
150 comcon.B.MSTART0 = config->compareOffset;
151 icr.B.CMP0OS = config->comparatorInterrupt;
152 result = TRUE;
153 }
154 else if (config->comparator == 1)
155 {
156 comcon.B.MSIZE1 = config->compareSize;
157 comcon.B.MSTART1 = config->compareOffset;
158 icr.B.CMP1OS = config->comparatorInterrupt;
159 result = TRUE;
160 }
161 else
162 {
163 /*Invalid value */
164 result = FALSE;
165 }
166
167 stm->ICR.U = icr.U;
168 stm->CMCON.U = comcon.U;
169
170 /* configure interrupt */
171 index = IfxStm_getIndex(stm);
172
173 if (config->triggerPriority > 0)
174 {
175 volatile Ifx_SRC_SRCR *srcr;
176
177 if (config->comparatorInterrupt == IfxStm_ComparatorInterrupt_ir0)
178 {
179 srcr = &(MODULE_SRC.STM.STM[index].SR0);
180 }
181 else
182 {
183 srcr = &(MODULE_SRC.STM.STM[index].SR1);
184 }
185
186 IfxSrc_init(srcr, config->typeOfService, config->triggerPriority);
187 IfxSrc_enable(srcr);
188 }
189
190 /*Configure the comparator ticks to current value to avoid any wrong triggering*/
191 stm->CMP[config->comparator].U = IfxStm_getOffsetTimer(stm, (uint8)config->compareOffset);
192
193 /* clear the interrupt flag of the selected comparator before enabling the interrupt */
194 /* this is to avaoid the unneccesary interrupt for the compare match of reset values of the registers */
195 IfxStm_clearCompareFlag(stm, config->comparator);
196 /* enable the interrupt for the selected comparator */
197 IfxStm_enableComparatorInterrupt(stm, config->comparator);
198
199 /*Configure the comparator ticks */
200 stm->CMP[config->comparator].U = IfxStm_getOffsetTimer(stm, (uint8)config->compareOffset) + config->ticks;
201
202 return result;
203 }
204
205
206 void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
207 {
208 config->comparator = IfxStm_Comparator_0;
209 config->compareOffset = IfxStm_ComparatorOffset_0;
210 config->compareSize = IfxStm_ComparatorSize_32Bits;
211 config->comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0; /*User must select the interrupt output */
212 config->ticks = 0xFFFFFFFF;
213 config->triggerPriority = 0;
214 config->typeOfService = IfxSrc_Tos_cpu0;
215 }
216
217
218 boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
219 {
220 if (comparator == IfxStm_Comparator_0)
221 {
222 return stm->ICR.B.CMP0IR;
223 }
224 else // if (comparator == IfxStm_Comparator_1)
225 {
226 return stm->ICR.B.CMP1IR;
227 }
228 }
229
230
231 void IfxStm_resetModule(Ifx_STM *stm)
232 {
233 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
234
235 IfxScuWdt_clearCpuEndinit(passwd);
236 stm->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
237 stm->KRST1.B.RST = 1;
238 IfxScuWdt_setCpuEndinit(passwd);
239
240 while (0 == stm->KRST0.B.RSTSTAT) /* Wait until reset is executed */
241
242 {}
243
244 IfxScuWdt_clearCpuEndinit(passwd);
245 stm->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
246
247 IfxScuWdt_setCpuEndinit(passwd);
248 }
249
250
251 void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
252 {
253 Ifx_STM_CMCON comcon = stm->CMCON;
254 Ifx_STM_ICR icr = stm->ICR;
255
256 if (comparator == 0)
257 {
258 comcon.B.MSIZE0 = size;
259 comcon.B.MSTART0 = offset;
260 icr.B.CMP0OS = interrupt;
261 }
262 else // if (comparator == 1)
263 {
264 comcon.B.MSIZE1 = size;
265 comcon.B.MSTART1 = offset;
266 icr.B.CMP1OS = interrupt;
267 }
268
269 stm->ICR.U = icr.U;
270 stm->CMCON.U = comcon.U;
271 }
IfxStm_ComparatorSize
IfxStm_ComparatorSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:185
IfxStm.h
STM basic functionality.
IfxStm_Comparator_1
Comparator Id 1.
Definition: IfxStm.h:134
IfxStm_CompareConfig::compareOffset
IfxStm_ComparatorOffset compareOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
Definition: IfxStm.h:253
IfxStm_isCompareFlagSet
boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:218
IfxStm_enableOcdsSuspend
void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
enable suspend by debugger.
Definition: IfxStm.c:84
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:67
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:131
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
IfxStm_getAddress
Ifx_STM * IfxStm_getAddress(IfxStm_Index stm)
Returns the module index of the selected STM module.
Definition: IfxStm.c:95
IfxStm_getOffsetTimer
IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset.
Definition: IfxStm.h:596
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxStm_initCompareConfig
void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
Initialise compare configuration with default values.
Definition: IfxStm.c:206
IfxStm_CompareConfig::triggerPriority
Ifx_Priority triggerPriority
Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
Definition: IfxStm.h:256
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:53
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:141
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxStm_CompareConfig::ticks
uint32 ticks
count for next comparison from current timer count.
Definition: IfxStm.h:255
IfxStm_disableModule
void IfxStm_disableModule(Ifx_STM *stm)
Disables the Stm module.
Definition: IfxStm.c:61
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:218
IfxStm_CompareConfig::comparatorInterrupt
IfxStm_ComparatorInterrupt comparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
Definition: IfxStm.h:252
IfxStm_CompareConfig
Comparator Configuration Structure.
Definition: IfxStm.h:249
IfxStm_initCompare
boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register.
Definition: IfxStm.c:140
IfxStm_getIndex
IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
API to get the resource index of the STM specified.
Definition: IfxStm.c:112
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxStm_setCompareControl
void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:251
IfxStm_ComparatorOffset_0
Comparator start bit position 0 with 64 bit timer.
Definition: IfxStm.h:149
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:133
IfxStm_getSrcPointer
volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:132
IfxStm_clearCompareFlag
void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:35
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:147
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxStm_CompareConfig::typeOfService
IfxSrc_Tos typeOfService
Type of service.
Definition: IfxStm.h:257
IfxStm_enableComparatorInterrupt
void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:71
sint32
long sint32
Definition: Platform_Types.h:131
IfxStm_resetModule
void IfxStm_resetModule(Ifx_STM *stm)
Definition: IfxStm.c:231
IfxStm_ComparatorInterrupt
IfxStm_ComparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
Definition: IfxStm.h:139
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxStm_Index_none
Not Selected.
Definition: IfxStm_cfg.h:69
IfxStm_CompareConfig::compareSize
IfxStm_ComparatorSize compareSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:254
TRUE
#define TRUE
Definition: Platform_Types.h:87
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxStm_disableComparatorInterrupt
void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:48
IfxStm_CompareConfig::comparator
IfxStm_Comparator comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
Definition: IfxStm.h:251
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxStm_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.c:35


iLLD_TC26B: IfxStm.h Source File

  • Stm
  • Std
IfxStm.h
Go to the documentation of this file.
1 /**
2 * \file IfxStm.h
3 * \brief STM basic functionality
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Stm_Usage How to use the Stm driver?
25 * \ingroup IfxLld_Stm
26 *
27 * The Stm Standard driver provides APIs to initialize, configure and control the Stm.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework.
30 *
31 * \section IfxLld_Stm_Preparation Preparation
32 * \subsection IfxLld_Stm_Include Include Files
33 *
34 * Include following header file into your C code:
35 * \code
36 * #include <Stm/Std/IfxStm.h>
37 * \endcode
38 *
39 * \subsection IfxLld_Stm_Variables Variables
40 *
41 * Declare STM variables :
42 * \code
43 * Ifx_STM *stmSfr;
44 * IfxStm_CompareConfig stmConfig;
45 * \endcode
46 *
47 * \subsection IfxLld_Stm_Interrupt Interrupt Handler Installation
48 *
49 * See also \ref IfxLld_Cpu_Irq_Usage
50 *
51 * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
52 * \code
53 * // priorities are normally defined in Ifx_IntPrioDef.h
54 * #define IFX_INTPRIO_STM0_SR0 10
55 * \endcode
56 *
57 * Add the interrupt service routines to your C code. They have to call the Stm interrupt handlers:
58 * please take care in choosing number of ticks, the below example code will raise an interrupt
59 * evry time the specified number of ticks have been elapsed.
60 * \code
61 * IFX_INTERRUPT(stm0Sr0ISR, 0, IFX_INTPRIO_STM0_SR0)
62 * {
63 * IfxStm_clearCompareFlag(stmSfr, stmConfig.comparator);
64 * IfxStm_increaseCompare(stmSfr, stmConfig.comparator, stmConfig.ticks);
65 * }
66 * \endcode
67 *
68 * Finally install the interrupt handlers in your initialisation function:
69 * \code
70 * // install interrupt handlers
71 * IfxCpu_Irq_installInterruptHandler(&stm0Sr0ISR, IFX_INTPRIO_STM0_SR0);
72 * IfxCpu_enableInterrupts();
73 * \endcode
74 *
75 * \subsection IfxLld_Stm_Init Module Initialisation
76 *
77 * The STM module can be configured to generate an interrupt at every compare match of the selected comaparator with the desired compare value, the interrupt can further be routed to other comparator.
78 *
79 * The module initialisation can be done as followed.
80 *
81 * \code
82 * stmSfr = &MODULE_STM0;
83 *
84 * IfxStm_initCompareConfig(&stmConfig);
85 *
86 * // configure to generate interrupt every 10 us
87 * sint32 ticks = IfxStm_getTicksFromMicroseconds(10);
88 *
89 * stmConfig.ticks = ticks;
90 *
91 * stmConfig.triggerPriority = IFX_INTPRIO_STM0_SR0;
92 * stmConfig.typeOfService = IfxSrc_Tos_cpu0;
93 *
94 * IfxStm_initCompare(stmSfr, &stmConfig);
95 *
96 * \endcode
97 *
98 * Now the Stm shall generate interrupts regularly based on the configured time !
99 *
100 * \defgroup IfxLld_Stm_Std_Enumerations Enumerations
101 * \ingroup IfxLld_Stm_Std
102 * \defgroup IfxLld_Stm_Std_Structures Data Structures
103 * \ingroup IfxLld_Stm_Std
104 * \defgroup IfxLld_Stm_Std_Module Module Functions
105 * \ingroup IfxLld_Stm_Std
106 * \defgroup IfxLld_Stm_Std_Timer Timer Functions
107 * \ingroup IfxLld_Stm_Std
108 * \defgroup IfxLld_Stm_Std_Comparator Comparator Functions
109 * \ingroup IfxLld_Stm_Std
110 */
111
112 #ifndef IFXSTM_H
113 #define IFXSTM_H 1
114
115 /******************************************************************************/
116 /*----------------------------------Includes----------------------------------*/
117 /******************************************************************************/
118
119 #include "_Impl/IfxStm_cfg.h"
120 #include "Scu/Std/IfxScuCcu.h"
121 #include "Src/Std/IfxSrc.h"
122
123 /******************************************************************************/
124 /*--------------------------------Enumerations--------------------------------*/
125 /******************************************************************************/
126
127 /** \addtogroup IfxLld_Stm_Std_Enumerations
128 * \{ */
129 /** \brief Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
130 */
131 typedef enum
132 {
133 IfxStm_Comparator_0 = 0, /**< \brief Comparator Id 0 */
134 IfxStm_Comparator_1 /**< \brief Comparator Id 1 */
135 } IfxStm_Comparator;
136
137 /** \brief Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
138 */
139 typedef enum
140 {
141 IfxStm_ComparatorInterrupt_ir0 = 0, /**< \brief Select STMIR0 */
142 IfxStm_ComparatorInterrupt_ir1 = 1 /**< \brief Select STMIR1 */
143 } IfxStm_ComparatorInterrupt;
144
145 /** \brief Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
146 */
147 typedef enum
148 {
149 IfxStm_ComparatorOffset_0 = 0, /**< \brief Comparator start bit position 0 with 64 bit timer */
150 IfxStm_ComparatorOffset_1, /**< \brief Comparator start bit position 1 with 64 bit timer */
151 IfxStm_ComparatorOffset_2, /**< \brief Comparator start bit position 2 with 64 bit timer */
152 IfxStm_ComparatorOffset_3, /**< \brief Comparator start bit position 3 with 64 bit timer */
153 IfxStm_ComparatorOffset_4, /**< \brief Comparator start bit position 4 with 64 bit timer */
154 IfxStm_ComparatorOffset_5, /**< \brief Comparator start bit position 5 with 64 bit timer */
155 IfxStm_ComparatorOffset_6, /**< \brief Comparator start bit position 6 with 64 bit timer */
156 IfxStm_ComparatorOffset_7, /**< \brief Comparator start bit position 7 with 64 bit timer */
157 IfxStm_ComparatorOffset_8, /**< \brief Comparator start bit position 8 with 64 bit timer */
158 IfxStm_ComparatorOffset_9, /**< \brief Comparator start bit position 9 with 64 bit timer */
159 IfxStm_ComparatorOffset_10, /**< \brief Comparator start bit position 10 with 64 bit timer */
160 IfxStm_ComparatorOffset_11, /**< \brief Comparator start bit position 11 with 64 bit timer */
161 IfxStm_ComparatorOffset_12, /**< \brief Comparator start bit position 12 with 64 bit timer */
162 IfxStm_ComparatorOffset_13, /**< \brief Comparator start bit position 13 with 64 bit timer */
163 IfxStm_ComparatorOffset_14, /**< \brief Comparator start bit position 14 with 64 bit timer */
164 IfxStm_ComparatorOffset_15, /**< \brief Comparator start bit position 15 with 64 bit timer */
165 IfxStm_ComparatorOffset_16, /**< \brief Comparator start bit position 16 with 64 bit timer */
166 IfxStm_ComparatorOffset_17, /**< \brief Comparator start bit position 17 with 64 bit timer */
167 IfxStm_ComparatorOffset_18, /**< \brief Comparator start bit position 18 with 64 bit timer */
168 IfxStm_ComparatorOffset_19, /**< \brief Comparator start bit position 19 with 64 bit timer */
169 IfxStm_ComparatorOffset_20, /**< \brief Comparator start bit position 20 with 64 bit timer */
170 IfxStm_ComparatorOffset_21, /**< \brief Comparator start bit position 21 with 64 bit timer */
171 IfxStm_ComparatorOffset_22, /**< \brief Comparator start bit position 22 with 64 bit timer */
172 IfxStm_ComparatorOffset_23, /**< \brief Comparator start bit position 23 with 64 bit timer */
173 IfxStm_ComparatorOffset_24, /**< \brief Comparator start bit position 24 with 64 bit timer */
174 IfxStm_ComparatorOffset_25, /**< \brief Comparator start bit position 25 with 64 bit timer */
175 IfxStm_ComparatorOffset_26, /**< \brief Comparator start bit position 26 with 64 bit timer */
176 IfxStm_ComparatorOffset_27, /**< \brief Comparator start bit position 27 with 64 bit timer */
177 IfxStm_ComparatorOffset_28, /**< \brief Comparator start bit position 28 with 64 bit timer */
178 IfxStm_ComparatorOffset_29, /**< \brief Comparator start bit position 29 with 64 bit timer */
179 IfxStm_ComparatorOffset_30, /**< \brief Comparator start bit position 30 with 64 bit timer */
180 IfxStm_ComparatorOffset_31 /**< \brief Comparator start bit position 31 with 64 bit timer */
181 } IfxStm_ComparatorOffset;
182
183 /** \brief Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2)
184 */
185 typedef enum
186 {
187 IfxStm_ComparatorSize_1Bit = 0, /**< \brief Size of compare value to compare with timer: 1 bit */
188 IfxStm_ComparatorSize_2Bits = 1, /**< \brief Size of compare value to compare with timer: 2 bits */
189 IfxStm_ComparatorSize_3Bits = 2, /**< \brief Size of compare value to compare with timer: 3 bits */
190 IfxStm_ComparatorSize_4Bits = 3, /**< \brief Size of compare value to compare with timer: 4 bits */
191 IfxStm_ComparatorSize_5Bits = 4, /**< \brief Size of compare value to compare with timer: 5 bits */
192 IfxStm_ComparatorSize_6Bits = 5, /**< \brief Size of compare value to compare with timer: 6 bits */
193 IfxStm_ComparatorSize_7Bits = 6, /**< \brief Size of compare value to compare with timer: 7 bits */
194 IfxStm_ComparatorSize_8Bits = 7, /**< \brief Size of compare value to compare with timer: 8 bits */
195 IfxStm_ComparatorSize_9Bits = 8, /**< \brief Size of compare value to compare with timer: 9 bits */
196 IfxStm_ComparatorSize_10Bits = 9, /**< \brief Size of compare value to compare with timer: 10 bits */
197 IfxStm_ComparatorSize_11Bits = 10, /**< \brief Size of compare value to compare with timer: 11 bits */
198 IfxStm_ComparatorSize_12Bits = 11, /**< \brief Size of compare value to compare with timer: 12 bits */
199 IfxStm_ComparatorSize_13Bits = 12, /**< \brief Size of compare value to compare with timer: 13 bits */
200 IfxStm_ComparatorSize_14Bits = 13, /**< \brief Size of compare value to compare with timer: 14 bits */
201 IfxStm_ComparatorSize_15Bits = 14, /**< \brief Size of compare value to compare with timer: 15 bits */
202 IfxStm_ComparatorSize_16Bits = 15, /**< \brief Size of compare value to compare with timer: 16 bits */
203 IfxStm_ComparatorSize_17Bits = 16, /**< \brief Size of compare value to compare with timer: 17 bits */
204 IfxStm_ComparatorSize_18Bits = 17, /**< \brief Size of compare value to compare with timer: 18 bits */
205 IfxStm_ComparatorSize_19Bits = 18, /**< \brief Size of compare value to compare with timer: 19 bits */
206 IfxStm_ComparatorSize_20Bits = 19, /**< \brief Size of compare value to compare with timer: 20 bits */
207 IfxStm_ComparatorSize_21Bits = 20, /**< \brief Size of compare value to compare with timer: 21 bits */
208 IfxStm_ComparatorSize_22Bits = 21, /**< \brief Size of compare value to compare with timer: 22 bits */
209 IfxStm_ComparatorSize_23Bits = 22, /**< \brief Size of compare value to compare with timer: 23 bits */
210 IfxStm_ComparatorSize_24Bits = 23, /**< \brief Size of compare value to compare with timer: 24 bits */
211 IfxStm_ComparatorSize_25Bits = 24, /**< \brief Size of compare value to compare with timer: 25 bits */
212 IfxStm_ComparatorSize_26Bits = 25, /**< \brief Size of compare value to compare with timer: 26 bits */
213 IfxStm_ComparatorSize_27Bits = 26, /**< \brief Size of compare value to compare with timer: 27 bits */
214 IfxStm_ComparatorSize_28Bits = 27, /**< \brief Size of compare value to compare with timer: 28 bits */
215 IfxStm_ComparatorSize_29Bits = 28, /**< \brief Size of compare value to compare with timer: 29 bits */
216 IfxStm_ComparatorSize_30Bits = 29, /**< \brief Size of compare value to compare with timer: 30 bits */
217 IfxStm_ComparatorSize_31Bits = 30, /**< \brief Size of compare value to compare with timer: 31 bits */
218 IfxStm_ComparatorSize_32Bits = 31 /**< \brief Size of compare value to compare with timer: 32 bits */
219 } IfxStm_ComparatorSize;
220
221 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
222 * Definition in Ifx_STM.CLC.B.EDIS
223 */
224 typedef enum
225 {
226 IfxStm_SleepMode_enable = 0, /**< \brief enables sleep mode */
227 IfxStm_SleepMode_disable = 1 /**< \brief disables sleep mode */
228 } IfxStm_SleepMode;
229
230 /** \brief OCDS Suspend Control (OCDS.SUS)
231 */
232 typedef enum
233 {
234 IfxStm_SuspendMode_none = 0, /**< \brief No suspend */
235 IfxStm_SuspendMode_hard = 1, /**< \brief Hard Suspend */
236 IfxStm_SuspendMode_soft = 2 /**< \brief Soft Suspend */
237 } IfxStm_SuspendMode;
238
239 /** \} */
240
241 /******************************************************************************/
242 /*-----------------------------Data Structures--------------------------------*/
243 /******************************************************************************/
244
245 /** \addtogroup IfxLld_Stm_Std_Structures
246 * \{ */
247 /** \brief Comparator Configuration Structure
248 */
249 typedef struct
250 {
251 IfxStm_Comparator comparator; /**< \brief Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2). */
252 IfxStm_ComparatorInterrupt comparatorInterrupt; /**< \brief Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1). */
253 IfxStm_ComparatorOffset compareOffset; /**< \brief Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2). */
254 IfxStm_ComparatorSize compareSize; /**< \brief Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2). */
255 uint32 ticks; /**< \brief count for next comparison from current timer count. */
256 Ifx_Priority triggerPriority; /**< \brief Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled. */
257 IfxSrc_Tos typeOfService; /**< \brief Type of service. */
258 } IfxStm_CompareConfig;
259
260 /** \} */
261
262 /** \addtogroup IfxLld_Stm_Std_Module
263 * \{ */
264
265 /******************************************************************************/
266 /*-------------------------Inline Function Prototypes-------------------------*/
267 /******************************************************************************/
268
269 /** \brief Returns system timer value.
270 * \param stm pointer to System timer module registers.
271 * \return system timer value.
272 */
273 IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm);
274
275 /** \brief Returns the system timer frequency.
276 * \param stm pointer to System timer module registers.
277 * \return the system timer frequency in Hz.
278 */
279 IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm);
280
281 /** \brief Returns the module's suspend state.
282 * TRUE :if module is suspended.
283 * FALSE:if module is not yet suspended.
284 * \param stm Pointer to STM module registers
285 * \return Suspend status (TRUE / FALSE)
286 */
287 IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm);
288
289 /** \brief Configure the Module to Hard/Soft suspend mode.
290 * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
291 * \param stm Pointer to STM module registers
292 * \param mode Module suspend mode
293 * \return None
294 */
295 IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode);
296
297 /******************************************************************************/
298 /*-------------------------Global Function Prototypes-------------------------*/
299 /******************************************************************************/
300
301 /** \brief Disables the Stm module
302 * \param stm pointer to STM registers
303 * \return None
304 */
305 IFX_EXTERN void IfxStm_disableModule(Ifx_STM *stm);
306
307 /** \brief enable suspend by debugger.
308 * \param stm pointer to System timer module registers.
309 * \return None
310 */
311 IFX_EXTERN void IfxStm_enableOcdsSuspend(Ifx_STM *stm);
312
313 /** \brief Returns the module index of the selected STM module
314 * \param stm Pointer to STM module registers
315 * \return STM module register address
316 */
317 IFX_EXTERN Ifx_STM *IfxStm_getAddress(IfxStm_Index stm);
318
319 /** \brief API to get the resource index of the STM specified.
320 * \param stm pointer to System timer module registers.
321 * \return system timer module index.
322 */
323 IFX_EXTERN IfxStm_Index IfxStm_getIndex(Ifx_STM *stm);
324
325 /** \} */
326
327 /** \addtogroup IfxLld_Stm_Std_Timer
328 * \{ */
329
330 /******************************************************************************/
331 /*-------------------------Inline Function Prototypes-------------------------*/
332 /******************************************************************************/
333
334 /** \brief Returns the lower system timer value.
335 * \param stm pointer to System timer module registers.
336 * \return the lower system timer value.
337 */
338 IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm);
339
340 /** \brief Gets the TIM3 couter value.
341 * \param stm pointer to System timer module registers.
342 * \return TIM3 counter value.
343 */
344 IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm);
345
346 /** \brief Gets the TIM4 couter value.
347 * \param stm pointer to System timer module registers.
348 * \return TIM4 counter value.
349 */
350 IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm);
351
352 /** \brief Gets the TIM5 couter value.
353 * \param stm pointer to System timer module registers.
354 * \return TIM5 counter value.
355 */
356 IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm);
357
358 /** \brief Gets the TIM6 couter value.
359 * \param stm pointer to System timer module registers.
360 * \return TIM6 counter value.
361 */
362 IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm);
363
364 /** \brief Gets the TIM1 couter value.
365 * \param stm pointer to System timer module registers.
366 * \return TIM1 counter value.
367 */
368 IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm);
369
370 /** \brief Gets the TIM2 couter value.
371 * \param stm pointer to System timer module registers.
372 * \return TIM2 counter value.
373 */
374 IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm);
375
376 /** \brief Returns the timer value shifted right by offset.
377 * \param stm pointer to System timer module registers.
378 * \param offset offset value.
379 * \return the lower system timer value shifted by offset.
380 */
381 IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset);
382
383 /** \brief Wait for requested time.
384 * The macro waits in while loop for the specified time in system timer ticks.
385 * \param stm pointer to System timer module registers.
386 * \param ticks ticks Wait time in system timer ticks.
387 * \return None
388 */
389 IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks);
390
391 /** \} */
392
393 /** \addtogroup IfxLld_Stm_Std_Comparator
394 * \{ */
395
396 /******************************************************************************/
397 /*-------------------------Inline Function Prototypes-------------------------*/
398 /******************************************************************************/
399
400 /** \brief Returns the updated compare register value.
401 * \param stm pointer to System timer module registers.
402 * \param comparator comparator selection comparator.
403 * \return The compare value
404 */
405 IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator);
406
407 /** \brief Returns the number of ticks for the selected micro seconds based on the STM frequency.
408 * \param stm pointer to System timer module registers.
409 * \param microSeconds Number of micro seconds that need to be converted to ticks
410 * \return ticks
411 */
412 IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds);
413
414 /** \brief Returns the number of ticks for the selected milli seconds based on the STM frequency.
415 * \param stm pointer to System timer module registers.
416 * \param milliSeconds Number of micro seconds that need to be converted to ticks
417 * \return ticks
418 */
419 IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds);
420
421 /** \brief Update the compare register value increased with given ticks.
422 * \param stm pointer to System timer module registers.
423 * \param comparator comparator selection comparator.
424 * \param ticks count for next comparison from current timer count.
425 * \return None
426 */
427 IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks);
428
429 /** \brief Update the compare register value.
430 * \param stm pointer to System timer module registers.
431 * \param comparator comparator selection comparator.
432 * \param ticks count for next comparison.
433 * \return None
434 */
435 IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks);
436
437 /******************************************************************************/
438 /*-------------------------Global Function Prototypes-------------------------*/
439 /******************************************************************************/
440
441 /** \brief Clear the compare interrupt flag.
442 * \param stm pointer to System timer module registers.
443 * \param comparator comparator selection comparator.
444 * \return None
445 */
446 IFX_EXTERN void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator);
447
448 /** \brief Disables the compare interrupt
449 * \param stm pointer to System timer module registers.
450 * \param comparator comparator selection comparator.
451 * \return None
452 */
453 IFX_EXTERN void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator);
454
455 /** \brief Enables the compare interrupt .
456 * \param stm pointer to System timer module registers.
457 * \param comparator comparator selection comparator.
458 * \return None
459 */
460 IFX_EXTERN void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator);
461
462 /** \brief get the interrupt source pointer for the comparator.
463 * \param stm pointer to the STM registers
464 * \param comparator comparator selection comparator
465 * \return pointer to the interrupt source
466 */
467 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator);
468
469 /** \brief Initialise stm compare register.
470 * \param stm pointer to System timer module registers.
471 * \param config pointer to configuration structure.
472 * \return TRUE if Comparator successful otherwise FLASE.
473 */
474 IFX_EXTERN boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config);
475
476 /** \brief Initialise compare configuration with default values.
477 * \param config pointer to configuration structure.
478 * \return None
479 */
480 IFX_EXTERN void IfxStm_initCompareConfig(IfxStm_CompareConfig *config);
481
482 /** \brief Indicates if the compare interrupt flag is set.
483 * \param stm pointer to System timer module registers.
484 * \param comparator comparator selection comparator.
485 * \return TRUE if the comparator flag is set
486 */
487 IFX_EXTERN boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator);
488
489 /** \brief Set the compare behavior
490 * \param stm pointer to System timer module registers
491 * \param comparator comparator selection comparator
492 * \param offset Comparator start bit position
493 * \param size Size of compare value to compare with timer
494 * \param interrupt Comparator Interrupt request source defined
495 * \return None
496 */
497 IFX_EXTERN void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt);
498
499 /** \} */
500
501 /******************************************************************************/
502 /*-------------------------Inline Function Prototypes-------------------------*/
503 /******************************************************************************/
504
505 /**
506 * \param stm pointer STM registers
507 * \param mode mode selection (enable/ disable)
508 * \return None
509 */
510 IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode);
511
512 /******************************************************************************/
513 /*-------------------------Global Function Prototypes-------------------------*/
514 /******************************************************************************/
515
516 /**
517 * \param stm pointer to STM registers
518 * \return None
519 */
520 IFX_EXTERN void IfxStm_resetModule(Ifx_STM *stm);
521
522 /******************************************************************************/
523 /*---------------------Inline Function Implementations------------------------*/
524 /******************************************************************************/
525
526 IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
527 {
528 uint64 result;
529
530 result = stm->TIM0.U;
531 result |= ((uint64)stm->CAP.U) << 32;
532
533 return result;
534 }
535
536
537 IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator)
538 {
539 return stm->CMP[comparator].B.CMPVAL;
540 }
541
542
543 IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
544 {
545 IFX_UNUSED_PARAMETER(stm);
546 float32 result;
547
548 result = IfxScuCcu_getStmFrequency();
549
550 return result;
551 }
552
553
554 IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm)
555 {
556 return stm->TIM0.U;
557 }
558
559
560 IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm)
561 {
562 return stm->TIM3.U;
563 }
564
565
566 IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm)
567 {
568 return stm->TIM4.U;
569 }
570
571
572 IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm)
573 {
574 return stm->TIM5.U;
575 }
576
577
578 IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm)
579 {
580 return stm->TIM6.U;
581 }
582
583
584 IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm)
585 {
586 return stm->TIM1.U;
587 }
588
589
590 IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm)
591 {
592 return stm->TIM2.U;
593 }
594
595
596 IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
597 {
598 uint64 now;
599
600 now = IfxStm_get(stm);
601
602 return (uint32)(now >> offset);
603 }
604
605
606 IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds)
607 {
608 sint32 freq = (sint32)IfxStm_getFrequency(stm);
609 return (freq / (1000000)) * microSeconds;
610 }
611
612
613 IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds)
614 {
615 sint32 freq = (sint32)IfxStm_getFrequency(stm);
616 return (freq / (1000)) * milliSeconds;
617 }
618
619
620 IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
621 {
622 stm->CMP[comparator].B.CMPVAL = stm->CMP[comparator].B.CMPVAL + ticks;
623 }
624
625
626 IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm)
627 {
628 Ifx_STM_OCS ocs;
629
630 // read the status
631 ocs.U = stm->OCS.U;
632
633 // return the status
634 return ocs.B.SUSSTA;
635 }
636
637
638 IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode)
639 {
640 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
641 IfxScuWdt_clearCpuEndinit(passwd);
642 stm->CLC.B.EDIS = mode;
643 IfxScuWdt_setCpuEndinit(passwd);
644 }
645
646
647 IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode)
648 {
649 Ifx_STM_OCS ocs;
650
651 // remove protection and configure the suspend mode.
652 ocs.B.SUS_P = 1;
653 ocs.B.SUS = mode;
654 stm->OCS.U = ocs.U;
655 }
656
657
658 IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
659 {
660 stm->CMP[comparator].B.CMPVAL = ticks;
661 }
662
663
664 IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks)
665 {
666 uint32 beginTime;
667
668 beginTime = IfxStm_getLower(stm);
669
670 /*below code will work because of unsigned 32 bit calculation even at timer wrapping condition
671 * As an example if beginTime = 0xFFFFFFFE and current time = 2 (after overflow), unsigned calculation
672 * 2 - 0xFFFFFFFE will be 4*/
673 while ((IfxStm_getLower(stm) - beginTime) < ticks)
674 {}
675 }
676
677
678 #endif /* IFXSTM_H */
IfxStm_ComparatorSize_25Bits
Size of compare value to compare with timer: 25 bits.
Definition: IfxStm.h:211
IfxStm_SleepMode_disable
disables sleep mode
Definition: IfxStm.h:227
IfxStm_SuspendMode_soft
Soft Suspend.
Definition: IfxStm.h:236
IfxStm_ComparatorOffset_2
Comparator start bit position 2 with 64 bit timer.
Definition: IfxStm.h:151
IfxStm_ComparatorOffset_17
Comparator start bit position 17 with 64 bit timer.
Definition: IfxStm.h:166
IfxStm_ComparatorSize_5Bits
Size of compare value to compare with timer: 5 bits.
Definition: IfxStm.h:191
IfxStm_getLower
IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm)
Returns the lower system timer value.
Definition: IfxStm.h:554
IfxStm_ComparatorSize
IfxStm_ComparatorSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:185
IfxStm_ComparatorSize_23Bits
Size of compare value to compare with timer: 23 bits.
Definition: IfxStm.h:209
IfxStm_getTicksFromMilliseconds
IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds)
Returns the number of ticks for the selected milli seconds based on the STM frequency.
Definition: IfxStm.h:613
IfxStm_Comparator_1
Comparator Id 1.
Definition: IfxStm.h:134
IfxStm_CompareConfig::compareOffset
IfxStm_ComparatorOffset compareOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2).
Definition: IfxStm.h:253
IfxStm_ComparatorSize_11Bits
Size of compare value to compare with timer: 11 bits.
Definition: IfxStm.h:197
IfxStm_isCompareFlagSet
IFX_EXTERN boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:218
IfxStm_ComparatorOffset_3
Comparator start bit position 3 with 64 bit timer.
Definition: IfxStm.h:152
IfxStm_ComparatorOffset_24
Comparator start bit position 24 with 64 bit timer.
Definition: IfxStm.h:173
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxStm_cfg.h
STM on-chip implementation data.
IfxStm_waitTicks
IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks)
Wait for requested time. The macro waits in while loop for the specified time in system timer ticks...
Definition: IfxStm.h:664
IfxStm_ComparatorSize_12Bits
Size of compare value to compare with timer: 12 bits.
Definition: IfxStm.h:198
IfxStm_enableOcdsSuspend
IFX_EXTERN void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
enable suspend by debugger.
Definition: IfxStm.c:84
now
IFX_INLINE Ifx_TickTime now(void)
Return system timer value (critical section).
Definition: Bsp.h:201
IfxStm_ComparatorOffset_31
Comparator start bit position 31 with 64 bit timer.
Definition: IfxStm.h:180
IfxStm_getOffset32Timer
IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm)
Gets the TIM6 couter value.
Definition: IfxStm.h:578
IfxStm_ComparatorOffset_20
Comparator start bit position 20 with 64 bit timer.
Definition: IfxStm.h:169
IfxStm_ComparatorSize_2Bits
Size of compare value to compare with timer: 2 bits.
Definition: IfxStm.h:188
IfxStm_ComparatorOffset_15
Comparator start bit position 15 with 64 bit timer.
Definition: IfxStm.h:164
IfxStm_SuspendMode
IfxStm_SuspendMode
OCDS Suspend Control (OCDS.SUS)
Definition: IfxStm.h:232
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:67
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStm_ComparatorInterrupt_ir1
Select STMIR1.
Definition: IfxStm.h:142
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:131
float32
float float32
Definition: Platform_Types.h:167
IfxStm_getAddress
IFX_EXTERN Ifx_STM * IfxStm_getAddress(IfxStm_Index stm)
Returns the module index of the selected STM module.
Definition: IfxStm.c:95
IfxStm_getOffsetTimer
IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
Returns the timer value shifted right by offset.
Definition: IfxStm.h:596
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxStm_ComparatorOffset_19
Comparator start bit position 19 with 64 bit timer.
Definition: IfxStm.h:168
IfxStm_initCompareConfig
IFX_EXTERN void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
Initialise compare configuration with default values.
Definition: IfxStm.c:206
IfxSrc.h
SRC basic functionality.
IfxStm_ComparatorSize_8Bits
Size of compare value to compare with timer: 8 bits.
Definition: IfxStm.h:194
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxStm_CompareConfig::triggerPriority
Ifx_Priority triggerPriority
Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled.
Definition: IfxStm.h:256
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxStm_ComparatorOffset_14
Comparator start bit position 14 with 64 bit timer.
Definition: IfxStm.h:163
IfxStm_ComparatorSize_24Bits
Size of compare value to compare with timer: 24 bits.
Definition: IfxStm.h:210
IfxStm_SuspendMode_hard
Hard Suspend.
Definition: IfxStm.h:235
IfxScuCcu_getStmFrequency
IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
API to get STM divider frequency. This API returns the based on the divider value in CCUCON register ...
Definition: IfxScuCcu.h:1102
IfxStm_ComparatorOffset_22
Comparator start bit position 22 with 64 bit timer.
Definition: IfxStm.h:171
IfxStm_ComparatorOffset_16
Comparator start bit position 16 with 64 bit timer.
Definition: IfxStm.h:165
IfxStm_ComparatorOffset_6
Comparator start bit position 6 with 64 bit timer.
Definition: IfxStm.h:155
IfxStm_ComparatorOffset_11
Comparator start bit position 11 with 64 bit timer.
Definition: IfxStm.h:160
IfxStm_ComparatorSize_4Bits
Size of compare value to compare with timer: 4 bits.
Definition: IfxStm.h:190
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:141
IfxStm_ComparatorOffset_10
Comparator start bit position 10 with 64 bit timer.
Definition: IfxStm.h:159
IfxStm_getCompare
IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator)
Returns the updated compare register value.
Definition: IfxStm.h:537
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxStm_ComparatorSize_19Bits
Size of compare value to compare with timer: 19 bits.
Definition: IfxStm.h:205
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStm_ComparatorOffset_9
Comparator start bit position 9 with 64 bit timer.
Definition: IfxStm.h:158
IfxStm_CompareConfig::ticks
uint32 ticks
count for next comparison from current timer count.
Definition: IfxStm.h:255
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxStm_ComparatorOffset_29
Comparator start bit position 29 with 64 bit timer.
Definition: IfxStm.h:178
IfxStm_disableModule
IFX_EXTERN void IfxStm_disableModule(Ifx_STM *stm)
Disables the Stm module.
Definition: IfxStm.c:61
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:218
IfxStm_CompareConfig::comparatorInterrupt
IfxStm_ComparatorInterrupt comparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1).
Definition: IfxStm.h:252
IfxStm_CompareConfig
Comparator Configuration Structure.
Definition: IfxStm.h:249
IfxStm_updateCompare
IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value.
Definition: IfxStm.h:658
IfxStm_ComparatorSize_15Bits
Size of compare value to compare with timer: 15 bits.
Definition: IfxStm.h:201
IfxStm_ComparatorSize_29Bits
Size of compare value to compare with timer: 29 bits.
Definition: IfxStm.h:215
IfxStm_ComparatorSize_27Bits
Size of compare value to compare with timer: 27 bits.
Definition: IfxStm.h:213
IfxStm_ComparatorSize_28Bits
Size of compare value to compare with timer: 28 bits.
Definition: IfxStm.h:214
IfxStm_initCompare
IFX_EXTERN boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
Initialise stm compare register.
Definition: IfxStm.c:140
IfxStm_getIndex
IFX_EXTERN IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
API to get the resource index of the STM specified.
Definition: IfxStm.c:112
IfxStm_ComparatorSize_1Bit
Size of compare value to compare with timer: 1 bit.
Definition: IfxStm.h:187
IfxStm_ComparatorSize_3Bits
Size of compare value to compare with timer: 3 bits.
Definition: IfxStm.h:189
IfxStm_ComparatorSize_17Bits
Size of compare value to compare with timer: 17 bits.
Definition: IfxStm.h:203
IfxStm_ComparatorOffset_25
Comparator start bit position 25 with 64 bit timer.
Definition: IfxStm.h:174
IfxStm_ComparatorOffset_27
Comparator start bit position 27 with 64 bit timer.
Definition: IfxStm.h:176
IfxStm_SleepMode_enable
enables sleep mode
Definition: IfxStm.h:226
IfxStm_ComparatorSize_26Bits
Size of compare value to compare with timer: 26 bits.
Definition: IfxStm.h:212
IfxStm_SuspendMode_none
No suspend.
Definition: IfxStm.h:234
IfxStm_ComparatorSize_7Bits
Size of compare value to compare with timer: 7 bits.
Definition: IfxStm.h:193
IfxStm_getOffset8Timer
IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm)
Gets the TIM2 couter value.
Definition: IfxStm.h:590
IfxStm_ComparatorOffset_1
Comparator start bit position 1 with 64 bit timer.
Definition: IfxStm.h:150
IfxStm_setCompareControl
IFX_EXTERN void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:251
IfxStm_ComparatorSize_22Bits
Size of compare value to compare with timer: 22 bits.
Definition: IfxStm.h:208
IfxStm_ComparatorOffset_0
Comparator start bit position 0 with 64 bit timer.
Definition: IfxStm.h:149
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:133
IfxStm_getOffset20Timer
IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm)
Gets the TIM5 couter value.
Definition: IfxStm.h:572
IfxStm_getSrcPointer
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:132
IfxStm_ComparatorOffset_26
Comparator start bit position 26 with 64 bit timer.
Definition: IfxStm.h:175
IfxStm_ComparatorSize_21Bits
Size of compare value to compare with timer: 21 bits.
Definition: IfxStm.h:207
IfxStm_isModuleSuspended
IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm)
Returns the module&#39;s suspend state. TRUE :if module is suspended. FALSE:if module is not yet suspende...
Definition: IfxStm.h:626
IfxStm_ComparatorOffset_8
Comparator start bit position 8 with 64 bit timer.
Definition: IfxStm.h:157
IfxStm_resetModule
IFX_EXTERN void IfxStm_resetModule(Ifx_STM *stm)
Definition: IfxStm.c:231
IfxStm_clearCompareFlag
IFX_EXTERN void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:35
IfxStm_ComparatorOffset_7
Comparator start bit position 7 with 64 bit timer.
Definition: IfxStm.h:156
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:147
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxStm_CompareConfig::typeOfService
IfxSrc_Tos typeOfService
Type of service.
Definition: IfxStm.h:257
IfxStm_ComparatorSize_18Bits
Size of compare value to compare with timer: 18 bits.
Definition: IfxStm.h:204
IfxStm_enableComparatorInterrupt
IFX_EXTERN void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:71
IfxStm_ComparatorOffset_23
Comparator start bit position 23 with 64 bit timer.
Definition: IfxStm.h:172
IfxStm_getFrequency
IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
Returns the system timer frequency.
Definition: IfxStm.h:543
IfxStm_ComparatorOffset_30
Comparator start bit position 30 with 64 bit timer.
Definition: IfxStm.h:179
IfxStm_ComparatorOffset_18
Comparator start bit position 18 with 64 bit timer.
Definition: IfxStm.h:167
IfxStm_ComparatorOffset_5
Comparator start bit position 5 with 64 bit timer.
Definition: IfxStm.h:154
IfxScuCcu.h
SCU basic functionality.
sint32
long sint32
Definition: Platform_Types.h:131
IfxStm_increaseCompare
IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value increased with given ticks.
Definition: IfxStm.h:620
IfxStm_getOffset4Timer
IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm)
Gets the TIM1 couter value.
Definition: IfxStm.h:584
IfxStm_ComparatorSize_13Bits
Size of compare value to compare with timer: 13 bits.
Definition: IfxStm.h:199
IfxStm_SleepMode
IfxStm_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_STM.CLC.B.EDIS.
Definition: IfxStm.h:224
IfxStm_ComparatorInterrupt
IfxStm_ComparatorInterrupt
Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
Definition: IfxStm.h:139
IfxStm_ComparatorOffset_28
Comparator start bit position 28 with 64 bit timer.
Definition: IfxStm.h:177
IfxStm_ComparatorSize_9Bits
Size of compare value to compare with timer: 9 bits.
Definition: IfxStm.h:195
IfxStm_ComparatorSize_16Bits
Size of compare value to compare with timer: 16 bits.
Definition: IfxStm.h:202
IfxStm_ComparatorOffset_4
Comparator start bit position 4 with 64 bit timer.
Definition: IfxStm.h:153
IfxStm_ComparatorSize_10Bits
Size of compare value to compare with timer: 10 bits.
Definition: IfxStm.h:196
IfxStm_getTicksFromMicroseconds
IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds)
Returns the number of ticks for the selected micro seconds based on the STM frequency.
Definition: IfxStm.h:606
IfxStm_ComparatorOffset_12
Comparator start bit position 12 with 64 bit timer.
Definition: IfxStm.h:161
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxStm_getOffset12Timer
IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm)
Gets the TIM3 couter value.
Definition: IfxStm.h:560
IfxStm_ComparatorOffset_21
Comparator start bit position 21 with 64 bit timer.
Definition: IfxStm.h:170
IfxStm_ComparatorSize_30Bits
Size of compare value to compare with timer: 30 bits.
Definition: IfxStm.h:216
IfxStm_CompareConfig::compareSize
IfxStm_ComparatorSize compareSize
Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0...
Definition: IfxStm.h:254
IfxStm_ComparatorSize_31Bits
Size of compare value to compare with timer: 31 bits.
Definition: IfxStm.h:217
IfxStm_ComparatorSize_6Bits
Size of compare value to compare with timer: 6 bits.
Definition: IfxStm.h:192
IfxStm_ComparatorSize_20Bits
Size of compare value to compare with timer: 20 bits.
Definition: IfxStm.h:206
IFX_UNUSED_PARAMETER
#define IFX_UNUSED_PARAMETER(x)
Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(...
Definition: Ifx_Types.h:205
IfxStm_ComparatorOffset_13
Comparator start bit position 13 with 64 bit timer.
Definition: IfxStm.h:162
IfxStm_setSuspendMode
IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode)
Configure the Module to Hard/Soft suspend mode. Note: The api works only when the OCDS is enabled and...
Definition: IfxStm.h:647
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxStm_disableComparatorInterrupt
IFX_EXTERN void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:48
IfxStm_CompareConfig::comparator
IfxStm_Comparator comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2).
Definition: IfxStm.h:251
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:526
IfxStm_ComparatorSize_14Bits
Size of compare value to compare with timer: 14 bits.
Definition: IfxStm.h:200
IfxStm_setSleepMode
IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode)
Definition: IfxStm.h:638
IfxStm_getOffset16Timer
IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm)
Gets the TIM4 couter value.
Definition: IfxStm.h:566


iLLD_TC26B: IfxStm_Timer.c Source File

  • Stm
  • Timer
IfxStm_Timer.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm_Timer.c
3 * \brief STM TIMER details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxStm_Timer.h"
30 #include "_Utilities/Ifx_Assert.h"
31
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35
36 boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
37 {
38 boolean event;
39 event = IfxStm_isCompareFlagSet(driver->stm, driver->comparator);
40
41 if (event)
42 {
43 IfxStm_clearCompareFlag(driver->stm, driver->comparator);
44
45 if (!driver->base.singleShot)
46 {
47 driver->comparatorValue += driver->base.period;
48 IfxStm_updateCompare(driver->stm, driver->comparator, driver->comparatorValue);
49 }
50 else
51 {
52 IfxStm_disableComparatorInterrupt(driver->stm, driver->comparator);
53 }
54 }
55 else
56 {}
57
58 return event;
59 }
60
61
62 float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
63 {
64 return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
65 }
66
67
68 float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
69 {
70 return driver->base.clockFreq;
71 }
72
73
74 Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
75 {
76 return driver->base.period;
77 }
78
79
80 float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
81 {
82 return 1.0 / driver->base.clockFreq;
83 }
84
85
86 void IfxStm_Timer_run(IfxStm_Timer *driver)
87 {
88 boolean interruptState;
89 uint64 timer;
90
91 interruptState = IfxCpu_disableInterrupts();
92 timer = IfxStm_get(driver->stm);
93 IfxCpu_restoreInterrupts(interruptState);
94
95 driver->comparatorValue = (Ifx_TimerValue)(timer >> driver->comparatorShift) + driver->base.period;
96
97 IfxStm_updateCompare(driver->stm, driver->comparator, driver->comparatorValue);
98 IfxStm_enableComparatorInterrupt(driver->stm, driver->comparator);
99 }
100
101
102 boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
103 {
104 Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
105
106 return IfxStm_Timer_setPeriod(driver, period);
107 }
108
109
110 boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
111 {
112 driver->base.period = period;
113
114 return TRUE;
115 }
116
117
118 void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
119 {
120 driver->base.singleShot = enabled;
121 }
122
123
124 boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
125 {
126 IfxStdIf_Timer_initStdIf(stdif, driver);
127 /* Set the API link */
128 stdif->getFrequency = (IfxStdIf_Timer_GetFrequency) & IfxStm_Timer_getFrequency;
129 stdif->getPeriod = (IfxStdIf_Timer_GetPeriod) & IfxStm_Timer_getPeriod;
130 stdif->getResolution = (IfxStdIf_Timer_GetResolution) & IfxStm_Timer_getResolution;
131 //stdif->getTrigger
132 stdif->setFrequency = (IfxStdIf_Timer_SetFrequency) & IfxStm_Timer_setFrequency;
133 stdif->updateInputFrequency = (IfxStdIf_Timer_UpdateInputFrequency) & IfxStm_Timer_updateInputFrequency;
134 //stdif->applyUpdate
135 //stdif->disableUpdate
136 stdif->getInputFrequency = (IfxStdIf_Timer_GetInputFrequency) & IfxStm_Timer_getInputFrequency;
137 stdif->run = (IfxStdIf_Timer_Run) & IfxStm_Timer_run;
138 stdif->setPeriod = (IfxStdIf_Timer_SetPeriod) & IfxStm_Timer_setPeriod;
139 stdif->setSingleMode = (IfxStdIf_Timer_SetSingleMode) & IfxStm_Timer_setSingleMode;
140 //stdif->setTrigger
141 stdif->stop = (IfxStdIf_Timer_Stop) & IfxStm_Timer_stop;
142 stdif->ackTimerIrq = (IfxStdIf_Timer_AckTimerIrq) & IfxStm_Timer_acknowledgeTimerIrq;
143 //stdif->ackTriggerIrq
144
145 return TRUE;
146 }
147
148
149 void IfxStm_Timer_stop(IfxStm_Timer *driver)
150 {
151 IfxStm_disableComparatorInterrupt(driver->stm, driver->comparator);
152 }
153
154
155 void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
156 {
157 float32 freqency;
158 freqency = IfxStm_getFrequency(driver->stm);
159 driver->base.clockFreq = freqency / (1 << driver->comparatorShift);
160 }
161
162
163 boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
164 {
165 boolean result = TRUE;
166 IfxStm_Timer_Base *base = &driver->base;
167
168 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
169
170 driver->stm = config->stm;
171 driver->comparator = config->comparator;
172
173 base->triggerEnabled = config->base.trigger.enabled;
174 base->singleShot = FALSE;
175
176 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.trigger.enabled == FALSE); /* Trigger feature not supported */
177 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.startOffset == 0); /* Trigger feature not supported */
178
179 /* Initialize the timer part */
180 // STM timer is already running after reset (free running timer)
181
182 // Calculate shift
183 driver->comparatorShift = 32 - __clz((uint32)(config->base.minResolution * IfxStm_getFrequency(driver->stm)));
184
185 if (driver->comparatorShift > 0)
186 {
187 driver->comparatorShift--;
188 }
189
190 IfxStm_Timer_updateInputFrequency(driver);
191
192 if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
193 {
194 result = FALSE;
195 IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
196 }
197 else
198 {}
199
200 IfxStm_Timer_setFrequency(driver, config->base.frequency);
201
202 IfxStm_setCompareControl(driver->stm, driver->comparator,
203 (IfxStm_ComparatorOffset)driver->comparatorShift,
204 IfxStm_ComparatorSize_32Bits,
205 driver->comparator == IfxStm_Comparator_0 ? IfxStm_ComparatorInterrupt_ir0 : IfxStm_ComparatorInterrupt_ir1);
206
207 /* Interrupt configuration */
208 if (config->base.isrPriority > 0)
209 {
210 /* clear the interrupt flag of the selected comparator */
211 IfxStm_clearCompareFlag(driver->stm, driver->comparator);
212
213 volatile Ifx_SRC_SRCR *src;
214 src = IfxStm_getSrcPointer(driver->stm, config->comparator);
215 IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
216 IfxSrc_enable(src);
217 }
218
219 return result;
220 }
221
222
223 void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
224 {
225 IfxStdIf_Timer_initConfig(&config->base);
226 config->stm = stm;
227 config->comparator = IfxStm_Comparator_0;
228 }
IfxStm_Timer_getFrequency
float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency.
Definition: IfxStm_Timer.c:62
IfxStm_Timer_getPeriod
Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod.
Definition: IfxStm_Timer.c:74
IfxStm_Timer_stdIfTimerInit
boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer.
Definition: IfxStm_Timer.c:124
IfxStm_Timer_Base::singleShot
boolean singleShot
If TRUE, the timer will stop after 1st event.
Definition: IfxStm_Timer.h:115
IfxStm_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxStm_Timer.h:137
__clz
sint32 __clz(sint32) __attribute__((intrinsic_pseudo(1
IfxStdIf_Timer_Config::isrProvider
IfxSrc_Tos isrProvider
Interrupt service provider for the timer interrupt.
Definition: IfxStdIf_Timer.h:259
IFX_VERBOSE_LEVEL_ERROR
#define IFX_VERBOSE_LEVEL_ERROR
Assertion level error, a debug instruction is inserted if enabled.
Definition: Ifx_Assert.h:41
IfxStdIf_Timer_GetFrequency
float32(* IfxStdIf_Timer_GetFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:82
IfxStm_isCompareFlagSet
boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
Indicates if the compare interrupt flag is set.
Definition: IfxStm.c:218
IfxStm_Timer_setPeriod
boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod.
Definition: IfxStm_Timer.c:110
IfxStm_Timer_Base
Structure for the timer base.
Definition: IfxStm_Timer.h:109
IfxStdIf_Timer_UpdateInputFrequency
void(* IfxStdIf_Timer_UpdateInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Indicates the stdIf that the imput frequency has changed and that it should be taken in account...
Definition: IfxStdIf_Timer.h:114
IfxStdIf_Timer_::stop
IfxStdIf_Timer_Stop stop
Definition: IfxStdIf_Timer.h:236
IfxStdIf_Timer_::setSingleMode
IfxStdIf_Timer_SetSingleMode setSingleMode
Definition: IfxStdIf_Timer.h:234
IfxStdIf_Timer_tickToS
IFX_INLINE float32 IfxStdIf_Timer_tickToS(float32 clockFreq, Ifx_TimerValue ticks)
Convert timer ticks to seconds.
Definition: IfxStdIf_Timer.h:418
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStm_ComparatorInterrupt_ir1
Select STMIR1.
Definition: IfxStm.h:142
IfxStm_Timer_Config
configuration structure for Timer
Definition: IfxStm_Timer.h:135
IfxStdIf_Timer_SetFrequency
boolean(* IfxStdIf_Timer_SetFrequency)(IfxStdIf_InterfaceDriver stdIf, float32 frequency)
Set the timer frequency in Hz.
Definition: IfxStdIf_Timer.h:108
IfxStm_Timer_setSingleMode
void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.
Definition: IfxStm_Timer.c:118
IfxStdIf_Timer_sToTick
IFX_INLINE Ifx_TimerValue IfxStdIf_Timer_sToTick(float32 clockFreq, float32 seconds)
Convert seconds to timer ticks.
Definition: IfxStdIf_Timer.h:429
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxStm_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxStm_Timer.h:111
Ifx_Assert.h
Assert functions.
IfxStdIf_Timer_::getFrequency
IfxStdIf_Timer_GetFrequency getFrequency
Definition: IfxStdIf_Timer.h:223
IfxStdIf_Timer_GetResolution
float32(* IfxStdIf_Timer_GetResolution)(IfxStdIf_InterfaceDriver stdIf)
Return the timer resolution in seconds.
Definition: IfxStdIf_Timer.h:94
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
IfxCpu_restoreInterrupts
IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
API to restore global interrupt with that of the passed parameter.
Definition: IfxCpu.h:916
IfxStm_Timer_setFrequency
boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency.
Definition: IfxStm_Timer.c:102
IfxStm_Timer::comparator
IfxStm_Comparator comparator
Comparator used for the timer functionality.
Definition: IfxStm_Timer.h:128
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxStm_ComparatorInterrupt_ir0
Select STMIR0.
Definition: IfxStm.h:141
IfxStdIf_Timer_Config::isrPriority
Ifx_Priority isrPriority
Interrupt isrPriority of the timer interrupt, if 0 the interrupt is disable.
Definition: IfxStdIf_Timer.h:258
IfxStm_Timer::base
IfxStm_Timer_Base base
Timer interface.
Definition: IfxStm_Timer.h:126
IfxStm_ComparatorSize_32Bits
Size of compare value to compare with timer: 32 bits.
Definition: IfxStm.h:218
IfxCpu_disableInterrupts
IFX_INLINE boolean IfxCpu_disableInterrupts(void)
API to disable global interrupt and return the previous status.
Definition: IfxCpu.h:639
IfxStm_updateCompare
IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
Update the compare register value.
Definition: IfxStm.h:658
IfxStm_Timer::stm
Ifx_STM * stm
STM module used for the timer functionality.
Definition: IfxStm_Timer.h:127
IfxStdIf_Timer_GetInputFrequency
float32(* IfxStdIf_Timer_GetInputFrequency)(IfxStdIf_InterfaceDriver stdIf)
Return the timer input frequency in Hz.
Definition: IfxStdIf_Timer.h:158
IfxStm_Timer_acknowledgeTimerIrq
boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq.
Definition: IfxStm_Timer.c:36
IfxStdIf_Timer_Config::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStdIf_Timer.h:262
IfxStm_Timer.h
STM TIMER details.
IfxStdIf_Timer_initConfig
void IfxStdIf_Timer_initConfig(IfxStdIf_Timer_Config *config)
Definition: IfxStdIf_Timer.c:28
IfxStdIf_Timer_initStdIf
void IfxStdIf_Timer_initStdIf(IfxStdIf_Timer *stdIf, IfxStdIf_InterfaceDriver driver)
Definition: IfxStdIf_Timer.c:126
IfxStdIf_Timer_CountDir_up
Timer is counting up.
Definition: IfxStdIf_Timer.h:70
IfxStm_Timer_updateInputFrequency
void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.
Definition: IfxStm_Timer.c:155
IfxStm_setCompareControl
void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
Set the compare behavior.
Definition: IfxStm.c:251
IfxStdIf_Timer_::getInputFrequency
IfxStdIf_Timer_GetInputFrequency getInputFrequency
Definition: IfxStdIf_Timer.h:231
IfxStm_Timer
Timer interface.
Definition: IfxStm_Timer.h:124
IfxStm_Timer_run
void IfxStm_Timer_run(IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run.
Definition: IfxStm_Timer.c:86
IfxStm_Timer_init
boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object.
Definition: IfxStm_Timer.c:163
IfxStm_Comparator_0
Comparator Id 0.
Definition: IfxStm.h:133
IfxStm_getSrcPointer
volatile Ifx_SRC_SRCR * IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
get the interrupt source pointer for the comparator.
Definition: IfxStm.c:132
IfxStm_clearCompareFlag
void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
Clear the compare interrupt flag.
Definition: IfxStm.c:35
IfxStm_ComparatorOffset
IfxStm_ComparatorOffset
Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
Definition: IfxStm.h:147
IfxStm_enableComparatorInterrupt
void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Enables the compare interrupt .
Definition: IfxStm.c:71
IfxStm_getFrequency
IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
Returns the system timer frequency.
Definition: IfxStm.h:543
IfxStdIf_Timer_::setFrequency
IfxStdIf_Timer_SetFrequency setFrequency
Definition: IfxStdIf_Timer.h:227
IfxStdIf_Timer_::run
IfxStdIf_Timer_Run run
Definition: IfxStdIf_Timer.h:232
IfxStdIf_Timer_::updateInputFrequency
IfxStdIf_Timer_UpdateInputFrequency updateInputFrequency
Definition: IfxStdIf_Timer.h:228
IfxStdIf_Timer_GetPeriod
Ifx_TimerValue(* IfxStdIf_Timer_GetPeriod)(IfxStdIf_InterfaceDriver stdIf)
Return the timer period in ticks.
Definition: IfxStdIf_Timer.h:88
IFX_ASSERT
#define IFX_ASSERT(level, expr)
Definition: Ifx_Assert.h:52
IfxStdIf_Timer_::setPeriod
IfxStdIf_Timer_SetPeriod setPeriod
Definition: IfxStdIf_Timer.h:233
IfxStm_Timer_getResolution
float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.
Definition: IfxStm_Timer.c:80
IfxStdIf_Timer_Config::frequency
float32 frequency
PWM frequency in Hz. This parameter is only used to initialise the timer structure. An additional cell is required to build the timer.
Definition: IfxStdIf_Timer.h:257
IfxStm_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxStm_Timer.h:113
IfxStm_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialized.
Definition: IfxStm_Timer.h:112
IfxStm_Timer_initConfig
void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default.
Definition: IfxStm_Timer.c:223
IfxStdIf_Timer_Run
void(* IfxStdIf_Timer_Run)(IfxStdIf_InterfaceDriver stdIf)
Immediately start the timer.
Definition: IfxStdIf_Timer.h:167
IfxStdIf_Timer_::getResolution
IfxStdIf_Timer_GetResolution getResolution
Definition: IfxStdIf_Timer.h:225
IfxStdIf_Timer_Config::trigger
IfxStdIf_Timer_TrigConfig trigger
Trigger configuration.
Definition: IfxStdIf_Timer.h:261
IfxStdIf_Timer_Config::startOffset
float32 startOffset
FIXME make startOffset as Ifx_TimerValue. Timer initial offset in % of the period.
Definition: IfxStdIf_Timer.h:263
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxStdIf_Timer_Stop
void(* IfxStdIf_Timer_Stop)(IfxStdIf_InterfaceDriver stdIf)
Immediately stops the timer.
Definition: IfxStdIf_Timer.h:204
IfxStdIf_Timer_AckTimerIrq
boolean(* IfxStdIf_Timer_AckTimerIrq)(IfxStdIf_InterfaceDriver stdIf)
Return the timer interrupt flag and reset it.
Definition: IfxStdIf_Timer.h:210
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxStm_Timer_stop
void IfxStm_Timer_stop(IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop.
Definition: IfxStm_Timer.c:149
IfxStdIf_Timer_TrigConfig::enabled
boolean enabled
If true, the trigger functionality is Initialised, else ignored.
Definition: IfxStdIf_Timer.h:244
IfxStm_disableComparatorInterrupt
void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
Disables the compare interrupt.
Definition: IfxStm.c:48
IfxStdIf_Timer_SetPeriod
boolean(* IfxStdIf_Timer_SetPeriod)(IfxStdIf_InterfaceDriver stdIf, Ifx_TimerValue period)
Set the timer period.
Definition: IfxStdIf_Timer.h:177
IfxStdIf_Timer_Config::minResolution
float32 minResolution
Minimum resolution of the timer in seconds. if 0, this parameter is ignored. If the configuration doe...
Definition: IfxStdIf_Timer.h:260
IfxStm_get
IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
Returns system timer value.
Definition: IfxStm.h:526
IfxStm_Timer::comparatorShift
uint8 comparatorShift
Comparator shift.
Definition: IfxStm_Timer.h:130
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxStm_Timer_getInputFrequency
float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.
Definition: IfxStm_Timer.c:68
IfxStdIf_Timer_::ackTimerIrq
IfxStdIf_Timer_AckTimerIrq ackTimerIrq
Definition: IfxStdIf_Timer.h:237
IfxStdIf_Timer_SetSingleMode
void(* IfxStdIf_Timer_SetSingleMode)(IfxStdIf_InterfaceDriver stdIf, boolean enabled)
Stop timer at the end of the period.
Definition: IfxStdIf_Timer.h:186
IfxStdIf_Timer_::getPeriod
IfxStdIf_Timer_GetPeriod getPeriod
Definition: IfxStdIf_Timer.h:224
IfxStm_Timer::comparatorValue
uint32 comparatorValue
Value of the comparator for the next event.
Definition: IfxStm_Timer.h:129


iLLD_TC26B: IfxStm_Timer.h Source File

  • Stm
  • Timer
IfxStm_Timer.h
Go to the documentation of this file.
1 /**
2 * \file IfxStm_Timer.h
3 * \brief STM TIMER details
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * The timer driver enabled the generation of periodical interrupt based on the STM module.
25 *
26 * The driver is initialized with \ref IfxStm_Timer_init(). After initialization, the
27 * timer is started with \ref IfxStm_Timer_run() and stopped with \ref IfxStm_Timer_stop().
28 * Single shot can be set with \ref IfxStm_Timer_setSingleMode(), in case the timer is
29 * already running it will stop after the next event, else the timer event will occur only once.
30 *
31 * The timer interrupt must call the \ref IfxStm_Timer_acknowledgeTimerIrq() function which
32 * clears the interrupt flag and set the next compare value.
33 *
34 * Changing the period with \ref IfxStm_Timer_setPeriod() or \ref IfxStm_Timer_setFrequency() will
35 * take effect only after the next timer event.
36 *
37 *
38 * This driver implements a subset of the functionalities defined by \ref library_srvsw_stdif_timer.
39 * If does supports the timer with interrupt but not the trigger signal.
40 *
41 * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
42 *
43 * \section Specific Specific implementation
44 * For a detailed configuration of the microcontroller, see \ref IfxStm_Timer_init().
45 *
46 * \section Example Usage example
47 * Initialization and interrupt:
48 * \code
49 * #define ISR_PRIORITY_TIMER_1MS (2)
50 * #define ISR_PROVIDER_TIMER_1MS IfxSrc_Tos_cpu0
51 * #define INTERRUPT_TIMER_1MS ISR_ASSIGN(ISR_PRIORITY_TIMER_1MS, ISR_PROVIDER_TIMER_1MS)
52 *
53 * IfxStm_Timer myTimer;
54 *
55 * boolean AppInit_1ms(void)
56 * {
57 * boolean result = TRUE;
58 * IfxStm_Timer_Config timerConfig;
59 * IfxStm_Timer_initConfig(&timerConfig, &MODULE_STM0);
60 * timerConfig.base.frequency = 1000;
61 * timerConfig.base.isrPriority = ISR_PRIORITY(INTERRUPT_TIMER_1MS);
62 * timerConfig.base.isrProvider = ISR_PROVIDER(INTERRUPT_TIMER_1MS);
63 * timerConfig.base.minResolution = (1.0 / timerConfig.base.frequency) / 1000;
64 * timerConfig.comparator = IfxStm_Comparator_0;
65 * result = IfxStm_Timer_init(&myTimer, &timerConfig);
66 *
67 * return result;
68 * }
69 *
70 * IFX_INTERRUPT(ISR_TIMER_1ms, 0, ISR_PRIORITY_TIMER_1MS)
71 * {
72 * __enable();
73 * IfxStm_Timer_acknowledgeTimerIrq(&myTimer);
74 * }
75 * \endcode
76 *
77 * During run-time, the timer can be started / stopped as follow:
78 * \code
79 * IfxStm_Timer_run(&myTimer);
80 * IfxStm_Timer_stop(&myTimer);
81 * \endcode
82 *
83 * \defgroup IfxLld_Stm_Timer STM Timer Interface
84 * \ingroup IfxLld_Stm
85 * \defgroup IfxLld_Stm_Timer_STMTimerDataStructures STM Timer Data Structures
86 * \ingroup IfxLld_Stm_Timer
87 * \defgroup IfxLld_Stm_Timer_globalfunction global function
88 * \ingroup IfxLld_Stm_Timer
89 */
90
91 #ifndef IFXSTM_TIMER_H
92 #define IFXSTM_TIMER_H 1
93
94 /******************************************************************************/
95 /*----------------------------------Includes----------------------------------*/
96 /******************************************************************************/
97
98 #include "Stm/Std/IfxStm.h"
99 #include "StdIf/IfxStdIf_Timer.h"
100
101 /******************************************************************************/
102 /*-----------------------------Data Structures--------------------------------*/
103 /******************************************************************************/
104
105 /** \addtogroup IfxLld_Stm_Timer_STMTimerDataStructures
106 * \{ */
107 /** \brief Structure for the timer base
108 */
109 typedef struct
110 {
111 Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
112 boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialized */
113 float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
114 IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
115 boolean singleShot; /**< \brief If TRUE, the timer will stop after 1st event */
116 } IfxStm_Timer_Base;
117
118 /** \} */
119
120 /** \addtogroup IfxLld_Stm_Timer_STMTimerDataStructures
121 * \{ */
122 /** \brief Timer interface
123 */
124 typedef struct
125 {
126 IfxStm_Timer_Base base; /**< \brief Timer interface */
127 Ifx_STM *stm; /**< \brief STM module used for the timer functionality */
128 IfxStm_Comparator comparator; /**< \brief Comparator used for the timer functionality */
129 uint32 comparatorValue; /**< \brief Value of the comparator for the next event */
130 uint8 comparatorShift; /**< \brief Comparator shift */
131 } IfxStm_Timer;
132
133 /** \brief configuration structure for Timer
134 */
135 typedef struct
136 {
137 IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
138 Ifx_STM *stm; /**< \brief STM module used for the timer functionality */
139 IfxStm_Comparator comparator; /**< \brief Comparator used for the timer functionality */
140 } IfxStm_Timer_Config;
141
142 /** \} */
143
144 /** \addtogroup IfxLld_Stm_Timer_globalfunction
145 * \{ */
146
147 /******************************************************************************/
148 /*-------------------------Global Function Prototypes-------------------------*/
149 /******************************************************************************/
150
151 /** \brief Returns the timer event
152 * see IfxStdIf_Timer_AckTimerIrq
153 * \param driver STM Timer interface Handle
154 * \return Timer interrupt event
155 */
156 IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver);
157
158 /** \brief Returns the frequency
159 * see IfxStdIf_Timer_GetFrequency
160 * \param driver STM Timer interface Handle
161 * \return Frequency
162 */
163 IFX_EXTERN float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver);
164
165 /** \brief Returns the input frequency
166 * see IfxStdIf_Timer_GetInputFrequency
167 * \param driver STM Timer interface Handle
168 * \return Frequency
169 */
170 IFX_EXTERN float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver);
171
172 /** \brief Returns the period of the timer
173 * see IfxStdIf_Timer_GetPeriod
174 * \param driver STM Timer interface Handle
175 * \return Period
176 */
177 IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver);
178
179 /** \brief Return the resolution of the Timer counters
180 * see IfxStdIf_Timer_GetResolution
181 * \param driver STM Timer interface handle
182 * \return Resolution
183 */
184 IFX_EXTERN float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver);
185
186 /** \brief Runs the timer
187 * see IfxStdIf_Timer_Run
188 * \param driver STM Timer interface Handle
189 * \return None
190 */
191 IFX_EXTERN void IfxStm_Timer_run(IfxStm_Timer *driver);
192
193 /** \brief Sets the Frequency
194 * see IfxStdIf_Timer_SetFrequency
195 * \param driver STM Timer interface Handle
196 * \param frequency frequency
197 * \return TRUE on success else FALSE
198 */
199 IFX_EXTERN boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency);
200
201 /** \brief Sets the period for the timer
202 * see IfxStdIf_Timer_SetPeriod
203 * \param driver STM Timer interface handle
204 * \param period Period value
205 * \return TRUE on success else FALSE
206 */
207 IFX_EXTERN boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period);
208
209 /** \brief Sets the single shot mode of the timer
210 * see IfxStdIf_Timer_SetSingleMode
211 * \param driver STM Timer interface Handle
212 * \param enabled If TRUE, sets the single shot mode
213 * \return None
214 */
215 IFX_EXTERN void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled);
216
217 /** \brief Initializes the standard interface timer
218 * \param stdif Standard interface object, will be initialized by the function
219 * \param driver driver Interface driver to be used by the standard interface. must be initialised separately
220 * \return TRUE on success else FALSE
221 */
222 IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver);
223
224 /** \brief Stops the timer
225 * see IfxStdIf_Timer_Stop
226 * \param driver STM Timer interface Handle
227 * \return None
228 */
229 IFX_EXTERN void IfxStm_Timer_stop(IfxStm_Timer *driver);
230
231 /** \brief Updates the input frequency
232 * see IfxStdIf_Timer_UpdateInputFrequency
233 * \param driver STM Timer interface Handle
234 * \return None
235 */
236 IFX_EXTERN void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver);
237
238 /** \brief Initialises the timer object
239 * \param driver STM Timer interface Handle
240 * \param config Configuration structure for STM Timer
241 * \return TRUE on success else FALSE
242 */
243 IFX_EXTERN boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config);
244
245 /** \brief Initializes the configuration structure to default
246 * \param config Configuration structure for STM Timer
247 * \param stm Pointer to STM module
248 * \return None
249 */
250 IFX_EXTERN void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm);
251
252 /** \} */
253
254 #endif /* IFXSTM_TIMER_H */
IfxStm_Timer_getFrequency
IFX_EXTERN float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
Returns the frequency see IfxStdIf_Timer_GetFrequency.
Definition: IfxStm_Timer.c:62
IfxStm_Timer_getPeriod
IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
Returns the period of the timer see IfxStdIf_Timer_GetPeriod.
Definition: IfxStm_Timer.c:74
IfxStm_Timer_stdIfTimerInit
IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
Initializes the standard interface timer.
Definition: IfxStm_Timer.c:124
IfxStm_Timer_Base::singleShot
boolean singleShot
If TRUE, the timer will stop after 1st event.
Definition: IfxStm_Timer.h:115
IfxStm_Timer_Config::base
IfxStdIf_Timer_Config base
Standard interface timer configuration.
Definition: IfxStm_Timer.h:137
IfxStm.h
STM basic functionality.
IfxStm_Timer_setPeriod
IFX_EXTERN boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
Sets the period for the timer see IfxStdIf_Timer_SetPeriod.
Definition: IfxStm_Timer.c:110
IfxStm_Timer_Base
Structure for the timer base.
Definition: IfxStm_Timer.h:109
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxStm_Timer_Config
configuration structure for Timer
Definition: IfxStm_Timer.h:135
IfxStm_Comparator
IfxStm_Comparator
Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
Definition: IfxStm.h:131
IfxStm_Timer_setSingleMode
IFX_EXTERN void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
Sets the single shot mode of the timer see IfxStdIf_Timer_SetSingleMode.
Definition: IfxStm_Timer.c:118
float32
float float32
Definition: Platform_Types.h:167
IfxStdIf_Timer_
Standard interface object.
Definition: IfxStdIf_Timer.h:220
IfxStm_Timer_Base::period
Ifx_TimerValue period
Timer period in ticks (cached value)
Definition: IfxStm_Timer.h:111
IfxStdIf_Timer_Config
Timer configuration.
Definition: IfxStdIf_Timer.h:255
IfxStm_Timer_setFrequency
IFX_EXTERN boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
Sets the Frequency see IfxStdIf_Timer_SetFrequency.
Definition: IfxStm_Timer.c:102
IfxStm_Timer::comparator
IfxStm_Comparator comparator
Comparator used for the timer functionality.
Definition: IfxStm_Timer.h:128
IfxStm_Timer_Base::countDir
IfxStdIf_Timer_CountDir countDir
Timer counting mode.
Definition: IfxStm_Timer.h:114
IfxStm_Timer::base
IfxStm_Timer_Base base
Timer interface.
Definition: IfxStm_Timer.h:126
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStm_Timer::stm
Ifx_STM * stm
STM module used for the timer functionality.
Definition: IfxStm_Timer.h:127
IfxStm_Timer_acknowledgeTimerIrq
IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
Returns the timer event see IfxStdIf_Timer_AckTimerIrq.
Definition: IfxStm_Timer.c:36
IfxStdIf_Timer.h
Standard interface: Timer.
IfxStm_Timer_updateInputFrequency
IFX_EXTERN void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
Updates the input frequency see IfxStdIf_Timer_UpdateInputFrequency.
Definition: IfxStm_Timer.c:155
IfxStm_Timer
Timer interface.
Definition: IfxStm_Timer.h:124
IfxStdIf_Timer_CountDir
IfxStdIf_Timer_CountDir
Timer increment direction.
Definition: IfxStdIf_Timer.h:68
IfxStm_Timer_run
IFX_EXTERN void IfxStm_Timer_run(IfxStm_Timer *driver)
Runs the timer see IfxStdIf_Timer_Run.
Definition: IfxStm_Timer.c:86
IfxStm_Timer_init
IFX_EXTERN boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
Initialises the timer object.
Definition: IfxStm_Timer.c:163
IfxStm_Timer_getResolution
IFX_EXTERN float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
Return the resolution of the Timer counters see IfxStdIf_Timer_GetResolution.
Definition: IfxStm_Timer.c:80
IfxStm_Timer_Base::clockFreq
float32 clockFreq
Timer input clock frequency (cached value)
Definition: IfxStm_Timer.h:113
IfxStm_Timer_Base::triggerEnabled
boolean triggerEnabled
If TRUE, the trigger functionality is Initialized.
Definition: IfxStm_Timer.h:112
IfxStm_Timer_initConfig
IFX_EXTERN void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
Initializes the configuration structure to default.
Definition: IfxStm_Timer.c:223
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
IfxStm_Timer_stop
IFX_EXTERN void IfxStm_Timer_stop(IfxStm_Timer *driver)
Stops the timer see IfxStdIf_Timer_Stop.
Definition: IfxStm_Timer.c:149
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxStm_Timer::comparatorShift
uint8 comparatorShift
Comparator shift.
Definition: IfxStm_Timer.h:130
IfxStm_Timer_getInputFrequency
IFX_EXTERN float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
Returns the input frequency see IfxStdIf_Timer_GetInputFrequency.
Definition: IfxStm_Timer.c:68
IfxStm_Timer::comparatorValue
uint32 comparatorValue
Value of the comparator for the next event.
Definition: IfxStm_Timer.h:129


iLLD_TC26B: IfxStm_cfg.c Source File

  • _Impl
IfxStm_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxStm_cfg.c
3 * \brief STM on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxStm_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES] = {
36 {&MODULE_STM0, IfxStm_Index_0},
37 {&MODULE_STM1, IfxStm_Index_1}
38 };
IfxStm_cfg.h
STM on-chip implementation data.
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:53
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:71
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxStm_cfg_indexMap
IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.c:35
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:70


iLLD_TC26B: IfxStm_cfg.h Source File

  • _Impl
IfxStm_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxStm_cfg.h
3 * \brief STM on-chip implementation data
4 * \ingroup IfxLld_Stm
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Stm STM
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Stm_Impl Implementation
27 * \ingroup IfxLld_Stm
28 * \defgroup IfxLld_Stm_Std Standard Driver
29 * \ingroup IfxLld_Stm
30 * \defgroup IfxLld_Stm_Impl_Enumerations Enumerations
31 * \ingroup IfxLld_Stm_Impl
32 * \defgroup IfxLld_Stm_Impl_Variables Global Variables
33 * \ingroup IfxLld_Stm_Impl
34 */
35
36 #ifndef IFXSTM_CFG_H
37 #define IFXSTM_CFG_H 1
38
39 /******************************************************************************/
40 /*----------------------------------Includes----------------------------------*/
41 /******************************************************************************/
42
43 #include "Cpu/Std/IfxCpu_Intrinsics.h"
44 #include "IfxStm_reg.h"
45 #include "Cpu/Std/Ifx_Types.h"
46
47 /******************************************************************************/
48 /*-----------------------------------Macros-----------------------------------*/
49 /******************************************************************************/
50
51 /** \brief STM count
52 */
53 #define IFXSTM_NUM_MODULES 2
54
55 /** \brief No Of Comparators per Stm
56 */
57 #define IFXSTM_NUM_COMPARATORS (2)
58
59 /******************************************************************************/
60 /*--------------------------------Enumerations--------------------------------*/
61 /******************************************************************************/
62
63 /** \addtogroup IfxLld_Stm_Impl_Enumerations
64 * \{ */
65 /** \brief List of the available STM resources
66 */
67 typedef enum
68 {
69 IfxStm_Index_none = -1, /**< \brief Not Selected */
70 IfxStm_Index_0 = 0, /**< \brief STM index 0 */
71 IfxStm_Index_1 /**< \brief STM index 1 */
72 } IfxStm_Index;
73
74 /** \} */
75
76 /** \addtogroup IfxLld_Stm_Impl_Variables
77 * \{ */
78
79 /******************************************************************************/
80 /*-------------------Global Exported Variables/Constants----------------------*/
81 /******************************************************************************/
82
83 IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES];
84
85 /** \} */
86
87 #endif /* IFXSTM_CFG_H */
IfxStm_cfg_indexMap
IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES]
Definition: IfxStm_cfg.h:83
IfxStm_Index
IfxStm_Index
List of the available STM resources.
Definition: IfxStm_cfg.h:67
IfxCpu_Intrinsics.h
IFXSTM_NUM_MODULES
#define IFXSTM_NUM_MODULES
STM count.
Definition: IfxStm_cfg.h:53
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxStm_Index_1
STM index 1.
Definition: IfxStm_cfg.h:71
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
IfxStm_Index_none
Not Selected.
Definition: IfxStm_cfg.h:69
IfxModule_IndexMap
Module address and index map.
Definition: Ifx_Types.h:123
IfxStm_Index_0
STM index 0.
Definition: IfxStm_cfg.h:70


iLLD_TC26B: IfxVadc.c Source File

  • Vadc
  • Std
IfxVadc.c
Go to the documentation of this file.
1 /**
2 * \file IfxVadc.c
3 * \brief VADC basic functionality
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxVadc.h"
30
31 /******************************************************************************/
32 /*-------------------------Function Implementations---------------------------*/
33 /******************************************************************************/
34
35 void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
36 {
37 Ifx_VADC_G_EMUXCTR emuxctr;
38
39 emuxctr.B.EMXWC = 1;
40 emuxctr.B.EMUXMODE = mode;
41 emuxctr.B.EMXCSS = channelSelectionStyle;
42 emuxctr.B.EMUXCH = channels;
43 emuxctr.B.EMUXSET = startChannel;
44 emuxctr.B.EMXCOD = code;
45 emuxctr.B.EMXST = sampleTimeControl;
46 IfxVadc_enableAccess(vadc, IfxVadc_Protection_externalMultiplexer);
47 vadcG->EMUXCTR.U = emuxctr.U;
48 emuxctr.B.EMXWC = 0;
49 vadcG->EMUXCTR.U = emuxctr.U;
50 IfxVadc_disableAccess(vadc, IfxVadc_Protection_externalMultiplexer);
51 }
52
53
54 void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
55 {
56 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
57 IfxScuWdt_clearSafetyEndinit(passwd);
58
59 if (protectionSet < IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER)
60 {
61 vadc->ACCPROT0.U |= (0x00000001 << protectionSet);
62 }
63 else
64 {
65 vadc->ACCPROT1.U |= (0x00000001 << (protectionSet & 0x1F));
66 }
67
68 IfxScuWdt_setSafetyEndinit(passwd);
69 }
70
71
72 void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
73 {
74 if (group < IFXVADC_NUM_ADC_CAL_GROUPS)
75 {
76 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
77
78 uint32 mask = 1 << (IFX_VADC_GLOBCFG_DPCAL0_OFF + group);
79
80 if (disable == TRUE)
81 {
82 vadc->GLOBCFG.U |= mask;
83 }
84 else
85 {
86 vadc->GLOBCFG.U &= ~mask;
87 }
88
89 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
90 }
91 }
92
93
94 void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
95 {
96 uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
97 IfxScuWdt_clearSafetyEndinit(passwd);
98
99 if (protectionSet < IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER)
100 {
101 vadc->ACCPROT0.U &= ~(0x00000001 << protectionSet);
102 }
103 else
104 {
105 vadc->ACCPROT1.U &= ~(0x00000001 << (protectionSet & 0x1F));
106 }
107
108 IfxScuWdt_setSafetyEndinit(passwd);
109 }
110
111
112 void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num)
113 {
114 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
115 IfxScuWdt_clearCpuEndinit(passwd);
116
117 // VADC Config: enable ADC group sync
118 {
119 Ifx_VADC_GLOBCFG vadcGlobCfg;
120 vadcGlobCfg.U = vadc->GLOBCFG.U;
121 vadcGlobCfg.B.DIVWC = 1;
122 vadcGlobCfg.B.DCMSB = 1;
123
124 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
125 vadc->GLOBCFG.U = vadcGlobCfg.U;
126 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
127 }
128
129 if (ccu6Num == 0)
130 {
131 // CCU60 Config
132 CCU60_CLC.U = 0;
133
134 if (CCU60_CLC.U)
135 {}
136
137 CCU60_T13PR.U = 4; // results in 4+1 clock periods (100MHz) = 20MHz
138 CCU60_CC63SR.U = 4; // configures duty cycle of 40ns low and 10ns high
139 CCU60_MODCTR.B.ECT13O = 1; // bit ECT130 = 1 serves to route CC63ST signals out to COUT63
140 CCU60_TCTR4.U = (1 << IFX_CCU6_TCTR4_T13STR_OFF) | (1 << IFX_CCU6_TCTR4_T13RS_OFF); // set bit T13STR & T13RS -> enable shadow transfer & start timer T13
141 CCU60_MOSEL.B.TRIG1SEL = 0; // CCU60_COUT63 routed to output signal CCU6061 TRIG1
142 }
143 else if (ccu6Num == 1)
144 {
145 // CCU60 + CCU61 Config
146 CCU60_CLC.U = 0;
147 CCU61_CLC.U = 0;
148
149 if (CCU61_CLC.U)
150 {}
151
152 CCU61_T13PR.U = 4; // results in 4+1 clock periods (100MHz) = 20MHz
153 CCU61_CC63SR.U = 4; // configures duty cycle of 40ns low and 10ns high
154 CCU61_MODCTR.B.ECT13O = 1; // bit ECT130 = 1 serves to route CC63ST signals out to COUT63
155 CCU61_TCTR4.U = (1 << IFX_CCU6_TCTR4_T13STR_OFF) | (1 << IFX_CCU6_TCTR4_T13RS_OFF); // set bit T13STR & T13RS -> enable shadow transfer & start timer T13
156 CCU60_MOSEL.B.TRIG1SEL = 1; // CCU61_COUT63 routed to output signal CCU6061 TRIG1
157 }
158
159 IfxScuWdt_setCpuEndinit(passwd);
160 }
161
162
163 float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
164 {
165 return IfxScuCcu_getSpbFrequency() / (1U + vadc->GLOBCFG.B.DIVA);
166 }
167
168
169 float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
170 {
171 return IfxScuCcu_getSpbFrequency() / (1U + vadc->GLOBCFG.B.DIVD);
172 }
173
174
175 float32 IfxVadc_getAdcModuleFrequency(void)
176 {
177 return IfxScuCcu_getSpbFrequency();
178 }
179
180
181 IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
182 {
183 IfxVadc_Status status = IfxVadc_Status_noError;
184 uint8 i;
185
186 for (i = 0; i < IFXVADC_NUM_ADC_GROUPS; i++)
187 {
188 if (vadc->BRSPND[i].U)
189 {
190 return IfxVadc_Status_channelsStillPending;
191 }
192 else
193 {
194 continue;
195 }
196 }
197
198 return status;
199 }
200
201
202 float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
203 {
204 float32 conversionTime = 0.0;
205 Ifx_VADC_G *vadcG = &vadc->G[group];
206 uint32 stcs;
207 IfxVadc_ChannelResolution resolution;
208 uint32 n;
209
210 uint32 inputClassNum;
211
212 if (inputClass <= IfxVadc_InputClasses_group1)
213 {
214 inputClassNum = inputClass;
215 stcs = vadcG->ICLASS[inputClassNum].B.STCS;
216 resolution = (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
217 }
218 else
219 {
220 inputClassNum = inputClass - IfxVadc_InputClasses_global0;
221 stcs = vadc->GLOBICLASS[inputClassNum].B.STCS;
222 resolution = (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
223 }
224
225 if (stcs > 16)
226 {
227 stcs = (stcs - 15) * 16; // Reference for the logic: Table 28-4 of TC29xB User Manual v1.3
228 }
229
230 switch (resolution)
231 {
232 case IfxVadc_ChannelResolution_12bit: n = 12;
233 break;
234 case IfxVadc_ChannelResolution_10bit: n = 10;
235 break;
236 case IfxVadc_ChannelResolution_8bit: n = 8;
237 break;
238 case IfxVadc_ChannelResolution_10bitFast: n = 10;
239 break;
240 default: n = 0;
241 break;
242 }
243
244 if (conversionMode == IfxVadc_ConversionType_Compatible)
245 {
246 if (resolution != IfxVadc_ChannelResolution_10bitFast)
247 {
248 /* Standard conversion */
249 uint32 pc = IfxVadc_isPostCalibration(vadc, group) ? 2 : 0;
250 conversionTime = (float32)(2 + stcs + n + pc) / analogFrequency + 2.0 / moduleFrequency;
251 }
252 else
253 {
254 /* Fast compare mode */
255 conversionTime = (float32)(2 + stcs + 2) / analogFrequency + 2.0 / moduleFrequency;
256 }
257 }
258 else
259 {
260 // do nothing
261 }
262
263 return conversionTime;
264 }
265
266
267 IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
268 {
269 IfxVadc_Status status = IfxVadc_Status_noError;
270
271 /* just fill level is checked */
272 if (0x7 == group->QSR0.B.FILL)
273 {
274 status = IfxVadc_Status_queueFull;
275 }
276 else
277 {
278 status = IfxVadc_Status_noError;
279 }
280
281 return status;
282 }
283
284
285 Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
286 {
287 sint32 sourceResultRegister = -1;
288 Ifx_VADC_RES tmpResult;
289
290 switch (sourceType)
291 {
292 case IfxVadc_RequestSource_queue:
293 sourceResultRegister = group->QCTRL0.B.SRCRESREG;
294 break;
295
296 case IfxVadc_RequestSource_scan:
297 sourceResultRegister = group->ASCTRL.B.SRCRESREG;
298 break;
299
300 case IfxVadc_RequestSource_background:
301 sourceResultRegister = vadc->BRSCTRL.B.SRCRESREG;
302 break;
303 }
304
305 if (sourceResultRegister > 0)
306 {
307 tmpResult.U = group->RES[sourceResultRegister].U;
308
309 return tmpResult;
310 }
311 else
312 {
313 if ((sourceType == IfxVadc_RequestSource_background) && (group->CHCTR[channel].B.RESTBS == 1))
314 {
315 tmpResult.B.VF = vadc->GLOBRES.B.VF;
316 tmpResult.B.FCR = vadc->GLOBRES.B.FCR;
317 tmpResult.B.CRS = vadc->GLOBRES.B.CRS;
318 tmpResult.B.EMUX = vadc->GLOBRES.B.EMUX;
319 tmpResult.B.CHNR = vadc->GLOBRES.B.CHNR;
320 tmpResult.B.DRC = vadc->GLOBRES.B.GNR; //The bitfields are the same but interpretation is different. TODO- define a generic result register type.
321 tmpResult.B.RESULT = vadc->GLOBRES.B.RESULT;
322
323 return tmpResult;
324 }
325 else
326 {
327 tmpResult.U = group->RES[group->CHCTR[channel].B.RESREG].U;
328
329 return tmpResult;
330 }
331 }
332 }
333
334
335 IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
336 {
337 IfxVadc_Status status = IfxVadc_Status_noError;
338
339 if (group->ASPND.U)
340 {
341 return IfxVadc_Status_channelsStillPending;
342 }
343 else
344 {
345 return status;
346 }
347 }
348
349
350 volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
351 {
352 Ifx_SRC_SRCR *base;
353
354 if (IfxVadc_SrcNr_shared0 <= index)
355 {
356 index -= 4;
357
358 if ((group & 0x1) != 0)
359 {
360 group = IfxVadc_GroupId_global1; /* Shared interrupt common 1 is used */
361 }
362 else
363 {
364 group = IfxVadc_GroupId_global0; /* Shared interrupt common 0 is used */
365 }
366 }
367 else
368 {
369 /* do nothing */
370 }
371
372 base = (Ifx_SRC_SRCR *)IfxVadc_cfg_srcAddresses[(group * 4) + index];
373
374 return &(base[0]);
375 }
376
377
378 void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider)
379 {
380 Ifx_VADC_GLOBCFG tempGLOBCFG;
381 tempGLOBCFG.U = vadc->GLOBCFG.U;
382 tempGLOBCFG.B.DIVD = arbiterClockDivider;
383 tempGLOBCFG.B.DIVWC = 1;
384 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
385 vadc->GLOBCFG.U = tempGLOBCFG.U;
386 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
387 }
388
389
390 void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider)
391 {
392 Ifx_VADC_GLOBCFG tempGLOBCFG;
393 tempGLOBCFG.U = vadc->GLOBCFG.U;
394 tempGLOBCFG.B.DIVA = converterClockDivider;
395 tempGLOBCFG.B.DIVWC = 1;
396 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
397 vadc->GLOBCFG.U = tempGLOBCFG.U;
398 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
399 }
400
401
402 uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
403 {
404 uint32 divD;
405 uint32 result;
406 uint32 fadc = IfxScuCcu_getSpbFrequency();
407
408 divD = (fadc / fAdcD - 1);
409
410 divD = __minu(divD, 0x3u);
411
412 result = fadc / (divD + 1);
413 IfxVadc_initialiseAdcArbiterClock(vadc, divD);
414 return result;
415 }
416
417
418 uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
419 {
420 uint32 divA;
421 uint32 result;
422 uint32 fadc = IfxScuCcu_getSpbFrequency();
423
424 /* DivA = min(max(0, Fadc / FAdcI - 1), 0x3F); */
425 divA = (fadc << 2) / fAdcI;
426
427 divA = (divA + 2) >> 2; /* Round to nearest integer */
428 divA = __minu(divA - 1, 0x1Fu);
429 result = fadc / (divA + 1);
430
431 if (result > IFXVADC_ANALOG_FREQUENCY_MAX)
432 {
433 divA = __minu(divA + 1, 0x1Fu);
434
435 result = fadc / (divA + 1);
436 }
437 else
438 {
439 /* do nothing */
440 }
441
442 if (!((result >= IFXVADC_ANALOG_FREQUENCY_MIN) && (result <= IFXVADC_ANALOG_FREQUENCY_MAX)))
443 {
444 result = 0; /* Min / Max FAdcI frequency */
445 }
446 else
447 {
448 IfxVadc_initialiseAdcConverterClock(vadc, divA);
449 }
450
451 return result;
452 }
453
454
455 boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group)
456 {
457 boolean pcEnabled;
458
459 switch (group)
460 {
461 case IfxVadc_GroupId_0: pcEnabled = vadc->GLOBCFG.B.DPCAL0 == 0;
462 break;
463 case IfxVadc_GroupId_1: pcEnabled = vadc->GLOBCFG.B.DPCAL1 == 0;
464 break;
465 case IfxVadc_GroupId_2: pcEnabled = vadc->GLOBCFG.B.DPCAL2 == 0;
466 break;
467 case IfxVadc_GroupId_3: pcEnabled = vadc->GLOBCFG.B.DPCAL3 == 0;
468 break;
469 default: pcEnabled = FALSE;
470 break;
471 }
472
473 return pcEnabled;
474 }
475
476
477 void IfxVadc_resetKernel(Ifx_VADC *vadc)
478 {
479 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
480
481 IfxScuWdt_clearCpuEndinit(passwd);
482 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
483 vadc->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
484 vadc->KRST0.B.RST = 1;
485 IfxScuWdt_setCpuEndinit(passwd);
486
487 while (vadc->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
488
489 {}
490
491 IfxScuWdt_clearCpuEndinit(passwd);
492 vadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
493 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
494 IfxScuWdt_setCpuEndinit(passwd);
495 }
496
497
498 void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
499 {
500 Ifx_VADC_GLOBCFG tempGLOBCFG;
501 tempGLOBCFG.U = vadc->GLOBCFG.U;
502 tempGLOBCFG.B.LOSUP = supplyVoltage;
503 tempGLOBCFG.B.DIVWC = 1;
504 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
505 vadc->GLOBCFG.U = tempGLOBCFG.U;
506 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
507 }
508
509
510 void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
511 {
512 if (slotEnable != FALSE)
513 {
514 vadcG->ARBPR.U |= slotEnable << (IFX_VADC_G_ARBPR_ASEN0_OFF + slot); /* enable Slot */
515 vadcG->ARBPR.U &= ~(IFX_VADC_G_ARBPR_PRIO0_MSK << (slot * 4u)); /* clear Priority */
516 vadcG->ARBPR.U |= (prio << (slot * 4u)); /* Set Priority */
517
518 if (mode != IfxVadc_RequestSlotStartMode_waitForStart)
519 {
520 vadcG->ARBPR.U |= 0x1u << (IFX_VADC_G_ARBPR_CSM0_OFF + (slot * 4u)); /* Set cancel inject mode */
521 }
522 else
523 {
524 vadcG->ARBPR.U &= ~(0x1u << (IFX_VADC_G_ARBPR_CSM0_OFF + (slot * 4u))); /* Set Wait for Start mode */
525 }
526 }
527 else
528 {
529 vadcG->ARBPR.U &= ~(IFX_VADC_G_ARBPR_ASEN0_MSK << (IFX_VADC_G_ARBPR_ASEN0_OFF + slot)); /* disable Slot */
530 }
531 }
532
533
534 void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
535 {
536 /* select channels which should take part in the scan sequence */
537 /* the mask allows to specify the channels which should be enabled/disabled */
538 group->ASSEL.U = (group->ASSEL.U & ~mask) | (channels & mask);
539 }
540
541
542 void IfxVadc_startupCalibration(Ifx_VADC *vadc)
543 {
544 boolean calibrationRunning;
545 uint8 adcCalGroupNum;
546
547 /* Start calibration */
548 IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
549 /* Set SUCAL bit */
550 IfxVadc_initiateStartupCalibration(vadc);
551 IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
552
553 /* Wait for hardware self-test and calibration to complete */
554 /* Wait until Calibration is done */
555 do
556 {
557 calibrationRunning = FALSE;
558
559 for (adcCalGroupNum = 0; adcCalGroupNum < IFXVADC_NUM_ADC_CAL_GROUPS; adcCalGroupNum++)
560 {
561 if (IfxVadc_getAdcCalibrationActiveState(vadc, adcCalGroupNum) != 0) /* Check ADC Calibration Flag CAL */
562 {
563 calibrationRunning = TRUE;
564 }
565 else
566 {
567 /* do nothing */
568 }
569 }
570 } while (calibrationRunning == TRUE); /* wait until calibration of all calibrated kernels are done */
571 }
IfxVadc_ChannelResolution_8bit
8-bit conversion
Definition: IfxVadc.h:157
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxVadc_disableAccess
void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers.
Definition: IfxVadc.c:54
IfxVadc_ChannelId
IfxVadc_ChannelId
VADC Channels.
Definition: IfxVadc.h:122
IfxVadc_ChannelSelectionStyle
IfxVadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxVadc.h:186
IfxVadc_getResultBasedOnRequestSource
Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.c:285
IfxVadc_EmuxCodingScheme
IfxVadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxVadc.h:203
IfxVadc_initiateStartupCalibration
IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
initiates the calibration pulse phase.
Definition: IfxVadc.h:2132
IfxVadc_GroupId_1
VADC group 1.
Definition: IfxVadc_cfg.h:102
IfxVadc_ConversionType
IfxVadc_ConversionType
type of conversion
Definition: IfxVadc.h:195
IfxVadc_getAdcDigitalFrequency
float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz.
Definition: IfxVadc.c:169
IfxVadc_getQueueStatus
IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxVadc.c:267
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxVadc_GroupId_3
VADC group 3.
Definition: IfxVadc_cfg.h:104
IfxVadc_RequestSource_background
background scan request
Definition: IfxVadc.h:415
float32
float float32
Definition: Platform_Types.h:167
IfxVadc_Status_queueFull
Queue is full.
Definition: IfxVadc.h:451
IfxVadc_RequestSource_queue
8 stage Queue request
Definition: IfxVadc.h:413
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxVadc_cfg_srcAddresses
IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxVadc_cfg.c:35
IfxVadc_InputClasses_global0
Use global class 0.
Definition: IfxVadc.h:300
IfxVadc_GroupId_0
VADC group 0.
Definition: IfxVadc_cfg.h:101
IfxVadc_SrcNr_shared0
Select shared service request line 0.
Definition: IfxVadc.h:435
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxVadc_ChannelResolution
IfxVadc_ChannelResolution
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
Definition: IfxVadc.h:153
IfxVadc_disablePostCalibration
void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration.
Definition: IfxVadc.c:72
IfxVadc_GroupId_global0
VADC group global0.
Definition: IfxVadc_cfg.h:105
IfxVadc_RequestSource
IfxVadc_RequestSource
Request sources.
Definition: IfxVadc.h:411
IfxVadc_ChannelResolution_10bit
10-bit conversion
Definition: IfxVadc.h:156
IfxVadc_GroupId_global1
VADC group global1.
Definition: IfxVadc_cfg.h:106
FALSE
#define FALSE
Definition: Platform_Types.h:90
IFXVADC_ANALOG_FREQUENCY_MIN
#define IFXVADC_ANALOG_FREQUENCY_MIN
Minimum allowed analog frequency.
Definition: IfxVadc_cfg.h:59
IfxVadc_setScan
void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan.
Definition: IfxVadc.c:534
IfxVadc_enableGroupSync
void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068.
Definition: IfxVadc.c:112
IfxScuWdt_clearSafetyEndinit
void IfxScuWdt_clearSafetyEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:178
IfxVadc_EmuxSampleTimeControl
IfxVadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxVadc.h:220
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxVadc_setArbiterPriority
void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxVadc.c:510
IfxVadc_Protection_globalConfig
Access control for GLOBCFG.
Definition: IfxVadc.h:357
IfxVadc_InputClasses
IfxVadc_InputClasses
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxVadc.h:296
IfxVadc_RequestSlotPriority
IfxVadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:393
IfxVadc_ExternalMultiplexerMode
IfxVadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxVadc.h:244
IfxVadc_getSrcAddress
volatile Ifx_SRC_SRCR * IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address.
Definition: IfxVadc.c:350
IFXVADC_NUM_ADC_CAL_GROUPS
#define IFXVADC_NUM_ADC_CAL_GROUPS
Number of calibrated ADC Groups.
Definition: IfxVadc_cfg.h:51
IfxVadc_LowSupplyVoltageSelect
IfxVadc_LowSupplyVoltageSelect
Low Power Supply Voltage Select.
Definition: IfxVadc.h:316
IfxVadc_getBackgroundScanStatus
IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
Gives the background scan status for a group.
Definition: IfxVadc.c:181
IfxVadc_Protection
IfxVadc_Protection
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U.
Definition: IfxVadc.h:324
IfxVadc_initialiseAdcArbiterClock
void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock.
Definition: IfxVadc.c:378
IfxVadc_initializeFAdcI
uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock.
Definition: IfxVadc.c:418
IfxVadc_EmuxSelectValue
IfxVadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxVadc.h:229
IfxVadc_Status_noError
No error during api execution.
Definition: IfxVadc.h:447
IfxVadc_RequestSource_scan
scan request
Definition: IfxVadc.h:414
IfxVadc_Status_channelsStillPending
Conversion for some of the channels are still pending.
Definition: IfxVadc.h:453
IfxVadc_startupCalibration
void IfxVadc_startupCalibration(Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxVadc.c:542
IfxVadc_getScanStatus
IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
Gives the scan status for a group.
Definition: IfxVadc.c:335
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:126
IfxVadc_ConversionType_Compatible
Compatible Timing Mode.
Definition: IfxVadc.h:197
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxScuWdt_setSafetyEndinit
void IfxScuWdt_setSafetyEndinit(uint16 password)
SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
Definition: IfxScuWdt.c:407
IfxVadc_isPostCalibration
boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status.
Definition: IfxVadc.c:455
IfxScuWdt_getSafetyWatchdogPassword
uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
SCUWDT API to fetch current password of Safety Watchdog module.
Definition: IfxScuWdt.c:236
IfxVadc_ChannelResolution_10bitFast
10-bit cfast compare mode
Definition: IfxVadc.h:158
IfxVadc_Protection_externalMultiplexer
Access control for EMUXSEL, GxEMUXCTR.
Definition: IfxVadc.h:341
sint32
long sint32
Definition: Platform_Types.h:131
IfxVadc_InputClasses_group1
Use group class 1.
Definition: IfxVadc.h:299
IfxVadc_getAdcCalibrationActiveState
IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status.
Definition: IfxVadc.h:1827
IfxVadc_getAdcAnalogFrequency
float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz.
Definition: IfxVadc.c:163
IfxVadc_ChannelResolution_12bit
12-bit conversion
Definition: IfxVadc.h:155
IfxVadc_configExternalMultiplexerMode
void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
Definition: IfxVadc.c:35
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:99
IfxVadc_RequestSlotStartMode
IfxVadc_RequestSlotStartMode
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:403
IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER
#define IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER
Maximum number of configurable bitfields in ACCPROT0 register.
Definition: IfxVadc_cfg.h:75
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxVadc_getAdcModuleFrequency
float32 IfxVadc_getAdcModuleFrequency(void)
Module Frequency in Hz.
Definition: IfxVadc.c:175
IfxVadc_Status
IfxVadc_Status
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx
Definition: IfxVadc.h:445
IfxVadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxVadc.h:405
IFXVADC_NUM_ADC_GROUPS
#define IFXVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxVadc_cfg.h:47
IfxVadc_getChannelConversionTime
float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing
Definition: IfxVadc.c:202
IfxVadc_resetKernel
void IfxVadc_resetKernel(Ifx_VADC *vadc)
Resets the kernel.
Definition: IfxVadc.c:477
TRUE
#define TRUE
Definition: Platform_Types.h:87
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:448
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxVadc_initialiseAdcConverterClock
void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock.
Definition: IfxVadc.c:390
IFXVADC_ANALOG_FREQUENCY_MAX
#define IFXVADC_ANALOG_FREQUENCY_MAX
Maximum allowed analog frequency.
Definition: IfxVadc_cfg.h:55
IfxVadc_SrcNr
IfxVadc_SrcNr
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxVadc.h:429
IfxVadc.h
VADC basic functionality.
IfxVadc_enableAccess
void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers.
Definition: IfxVadc.c:94
IfxVadc_GroupId_2
VADC group 2.
Definition: IfxVadc_cfg.h:103
IfxVadc_initializeFAdcD
uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock.
Definition: IfxVadc.c:402
IfxVadc_selectPowerSupplyVoltage
void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage.
Definition: IfxVadc.c:498


iLLD_TC26B: IfxVadc.h Source File

  • Vadc
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IfxVadc.h
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1 /**
2 * \file IfxVadc.h
3 * \brief VADC basic functionality
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Vadc_Std_Enum Enumerations
25 * \ingroup IfxLld_Vadc_Std
26 * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
27 * \ingroup IfxLld_Vadc_Std
28 * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
29 * \ingroup IfxLld_Vadc_Std
30 * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
31 * \ingroup IfxLld_Vadc_Std
32 * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
33 * \ingroup IfxLld_Vadc_Std
34 * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
35 * \ingroup IfxLld_Vadc_Std
36 * \defgroup IfxLld_Vadc_Std_Group Group Functions
37 * \ingroup IfxLld_Vadc_Std
38 * \defgroup IfxLld_Vadc_Std_Module Module Functions
39 * \ingroup IfxLld_Vadc_Std
40 * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
41 * \ingroup IfxLld_Vadc_Std
42 * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
43 * \ingroup IfxLld_Vadc_Std
44 */
45
46 #ifndef IFXVADC_H
47 #define IFXVADC_H 1
48
49 /******************************************************************************/
50 /*----------------------------------Includes----------------------------------*/
51 /******************************************************************************/
52
53 #include "_Impl/IfxVadc_cfg.h"
54 #include "_PinMap/IfxVadc_PinMap.h"
55 #include "IfxVadc_bf.h"
56 #include "Cpu/Std/IfxCpu_Intrinsics.h"
57 #include "Scu/Std/IfxScuCcu.h"
58 #include "Scu/Std/IfxScuWdt.h"
59 #include "IfxCcu6_reg.h"
60 #include "IfxCcu6_bf.h"
61
62 /******************************************************************************/
63 /*--------------------------------Enumerations--------------------------------*/
64 /******************************************************************************/
65
66 /** \addtogroup IfxLld_Vadc_Std_Enum
67 * \{ */
68 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
69 */
70 typedef enum
71 {
72 IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
73 IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
74 IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
75 IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
76 } IfxVadc_AnalogConverterMode;
77
78 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
79 */
80 typedef enum
81 {
82 IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
83 IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
84 IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
85 IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
86 } IfxVadc_ArbitrationRounds;
87
88 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
89 */
90 typedef enum
91 {
92 IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
93 IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
94 IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
95 IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
96 IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
97 IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
98 IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
99 IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
100 IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
101 IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
102 IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
103 IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
104 IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
105 IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
106 IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
107 IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
108 } IfxVadc_BoundaryExtension;
109
110 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
111 */
112 typedef enum
113 {
114 IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
115 IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
116 IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
117 IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
118 } IfxVadc_BoundarySelection;
119
120 /** \brief VADC Channels
121 */
122 typedef enum
123 {
124 IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
125 IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
126 IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
127 IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
128 IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
129 IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
130 IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
131 IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
132 IfxVadc_ChannelId_7 = 7, /**< \brief Channel 7 */
133 IfxVadc_ChannelId_8 = 8, /**< \brief Channel 8 */
134 IfxVadc_ChannelId_9 = 9, /**< \brief Channel 9 */
135 IfxVadc_ChannelId_10 = 10, /**< \brief Channel 10 */
136 IfxVadc_ChannelId_11 = 11, /**< \brief Channel 11 */
137 IfxVadc_ChannelId_12 = 12, /**< \brief Channel 12 */
138 IfxVadc_ChannelId_13 = 13, /**< \brief Channel 13 */
139 IfxVadc_ChannelId_14 = 14, /**< \brief Channel 14 */
140 IfxVadc_ChannelId_15 = 15 /**< \brief Channel 15 */
141 } IfxVadc_ChannelId;
142
143 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
144 */
145 typedef enum
146 {
147 IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
148 IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
149 } IfxVadc_ChannelReference;
150
151 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
152 */
153 typedef enum
154 {
155 IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
156 IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
157 IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
158 IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
159 } IfxVadc_ChannelResolution;
160
161 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
162 */
163 typedef enum
164 {
165 IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
166 IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
167 IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
168 IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
169 IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
170 IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
171 IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
172 IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
173 IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
174 IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
175 IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
176 IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
177 IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
178 IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
179 IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
180 IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
181 } IfxVadc_ChannelResult;
182
183 /** \brief External Multiplexer Channel Selection Style as defined in
184 * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
185 */
186 typedef enum
187 {
188 IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
189 IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
190 * associated channel for EMUX control */
191 } IfxVadc_ChannelSelectionStyle;
192
193 /** \brief type of conversion
194 */
195 typedef enum
196 {
197 IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
198 } IfxVadc_ConversionType;
199
200 /** \brief Specifies the External Coding scheme(binary/gray)
201 * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
202 */
203 typedef enum
204 {
205 IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
206 IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
207 } IfxVadc_EmuxCodingScheme;
208
209 /** \brief Specifies the Emux interface
210 */
211 typedef enum
212 {
213 IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
214 IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
215 } IfxVadc_EmuxInterface;
216
217 /** \brief External Multiplexer sample time control
218 * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
219 */
220 typedef enum
221 {
222 IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
223 IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
224 } IfxVadc_EmuxSampleTimeControl;
225
226 /** \brief specifies the External Channel Start select value
227 * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
228 */
229 typedef enum
230 {
231 IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
232 IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
233 IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
234 IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
235 IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
236 IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
237 IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
238 IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
239 } IfxVadc_EmuxSelectValue;
240
241 /** \brief Specifies External Multiplexer Mode
242 * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
243 */
244 typedef enum
245 {
246 IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
247 IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
248 IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
249 IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
250 } IfxVadc_ExternalMultiplexerMode;
251
252 /** \brief FIFO mode enable
253 */
254 typedef enum
255 {
256 IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
257 IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
258 IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
259 IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
260 } IfxVadc_FifoMode;
261
262 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
263 */
264 typedef enum
265 {
266 IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
267 IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
268 IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
269 IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
270 } IfxVadc_GatingMode;
271
272 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
273 */
274 typedef enum
275 {
276 IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
277 IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
278 IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
279 IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
280 IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
281 IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
282 IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
283 IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
284 IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
285 IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
286 IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
287 IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
288 IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
289 IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
290 IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
291 IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
292 } IfxVadc_GatingSource;
293
294 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
295 */
296 typedef enum
297 {
298 IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
299 IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
300 IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
301 IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
302 } IfxVadc_InputClasses;
303
304 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
305 */
306 typedef enum
307 {
308 IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
309 IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
310 IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
311 IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
312 } IfxVadc_LimitCheck;
313
314 /** \brief Low Power Supply Voltage Select
315 */
316 typedef enum
317 {
318 IfxVadc_LowSupplyVoltageSelect_5V = 0, /**< \brief 5V Power Supply is Connected */
319 IfxVadc_LowSupplyVoltageSelect_3V = 1 /**< \brief 3.3V Power Supply is Connected */
320 } IfxVadc_LowSupplyVoltageSelect;
321
322 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
323 */
324 typedef enum
325 {
326 IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
327 IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
328 IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
329 IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
330 IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
331 IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
332 IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
333 IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
334 IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
335 IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
336 IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
337 IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
338 IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
339 IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
340 IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
341 IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
342 IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
343 IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
344 IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
345 IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
346 IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
347 IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
348 IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
349 IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
350 IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
351 IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
352 IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
353 IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
354 IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
355 IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
356 IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
357 IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
358 IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
359 IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
360 IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
361 IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
362 IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
363 IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
364 IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
365 IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
366 IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
367 IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
368 IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
369 IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
370 IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
371 IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
372 IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
373 IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
374 IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
375 IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
376 IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
377 IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
378 IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
379 IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
380 IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
381 IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
382 IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
383 IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
384 IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
385 IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
386 IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
387 IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
388 IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
389 } IfxVadc_Protection;
390
391 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
392 */
393 typedef enum
394 {
395 IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
396 IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
397 IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
398 IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
399 } IfxVadc_RequestSlotPriority;
400
401 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
402 */
403 typedef enum
404 {
405 IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
406 IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
407 } IfxVadc_RequestSlotStartMode;
408
409 /** \brief Request sources
410 */
411 typedef enum
412 {
413 IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
414 IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
415 IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
416 } IfxVadc_RequestSource;
417
418 /** \brief Enable/disable the sensitivity of the module to sleep signal\n
419 * Definition in Ifx_VADC.CLC.B.EDIS
420 */
421 typedef enum
422 {
423 IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
424 IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
425 } IfxVadc_SleepMode;
426
427 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
428 */
429 typedef enum
430 {
431 IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
432 IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
433 IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
434 IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
435 IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
436 IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
437 IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
438 IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
439 } IfxVadc_SrcNr;
440
441 /** \brief API return values defined in
442 * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
443 * MODULE_VADC.BRSPND[x](x=0,1,...,11)
444 */
445 typedef enum
446 {
447 IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
448 IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
449 IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
450 IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
451 IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
452 IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
453 IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
454 } IfxVadc_Status;
455
456 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
457 */
458 typedef enum
459 {
460 IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
461 IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
462 IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
463 IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
464 } IfxVadc_TriggerMode;
465
466 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
467 */
468 typedef enum
469 {
470 IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
471 IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
472 IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
473 IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
474 IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
475 IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
476 IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
477 IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
478 IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
479 IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
480 IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
481 IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
482 IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
483 IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
484 IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
485 IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
486 } IfxVadc_TriggerSource;
487
488 /** \} */
489
490 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
491 * \{ */
492
493 /******************************************************************************/
494 /*-------------------------Inline Function Prototypes-------------------------*/
495 /******************************************************************************/
496
497 /** \brief access function to enable/disable wait for read mode for result registers
498 * \param group pointer to the VADC group
499 * \param resultIdx result register index
500 * \param waitForRead wait for read mode enabled/disabled
501 * \return None
502 */
503 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
504
505 /** \brief access function to enable/disable wait for read mode for global result register
506 * \param vadc pointer to the VADC
507 * \param waitForRead wait for read mode enabled/disabled
508 * \return None
509 */
510 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
511
512 /** \brief Enables the background sacn external trigger.
513 * \param vadc pointer to the base of VADC registers.
514 * \return None
515 */
516 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
517
518 /** \brief Gets the background scan gating mode.
519 * \param vadc pointer to the base of VADC registers.
520 * \return background scan gating mode.
521 */
522 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
523
524 /** \brief Gets the gating input selection.
525 * \param vadc pointer to the base of VADC registers.
526 * \return background scan gating input selection.
527 */
528 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
529
530 /** \brief Gets the requested background scan slot priority.
531 * \param vadcG pointer to VADC group registers.
532 * \return requested background scan slot priority.
533 */
534 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
535
536 /** \brief Gets the requested background scan slot start mode.
537 * \param vadcG pointer to VADC group registers.
538 * \return requested background scan slot start mode.
539 */
540 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
541
542 /** \brief Gets the background scan trigger input.
543 * \param vadc pointer to the base of VADC registers.
544 * \return Gets the background scan external trigger source.
545 */
546 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
547
548 /** \brief Gets the background scan external trigger mode.
549 * \param vadc pointer to the base of VADC registers.
550 * \return background scan external trigger mode.
551 */
552 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
553
554 /** \brief get global input class resolution
555 * \param vadc Pointer to the VADC Group
556 * \param inputClassNum global input class number
557 * \return ADC input class channel resolution.
558 */
559 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
560
561 /** \brief return conversion result stored in the Global result Register
562 * \param vadc pointer to the VADC module
563 * \return global result register
564 *
565 * \code
566 * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
567 * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
568 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
569 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
570 *
571 * //confiure wait for read mode for global result register
572 * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
573 *
574 * // configure background scan
575 * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
576 *
577 * // enable auto scan
578 * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
579 *
580 * // start the background scan
581 * IfxVadc_startBackgroundScan(vadc);
582 *
583 * Ifx_VADC_GLOBRES result;
584 * result = IfxVadc_getGlobalResult (vadc);
585 *
586 * \endcode
587 *
588 */
589 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
590
591 /** \brief get global input class sample time in sec
592 * \param vadc Pointer to the VADC Group Register space
593 * \param inputClassNum ADC input class number
594 * \param analogFrequency ADC module analog frequency in Hz.
595 * \return ADC input class channel sample time in sec.
596 */
597 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
598
599 /** \brief Get conversion result for the group
600 * \param group pointer to the VADC group
601 * \param results pointer to scaled conversion results
602 * \param resultOffset offset for the first result
603 * \param numResults number of results
604 * \return None
605 *
606 * \code
607 * Ifx_VADC* vadc = &MODULE_VADC
608 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
609 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
610 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
611 *
612 * //confiure wait for read mode for global result register
613 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
614 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
615 *
616 * // configure scan
617 * IfxVadc_setScan(group, channels, mask);
618 *
619 * // enable auto scan
620 * IfxVadc_setAutoScan(group, TRUE);
621 *
622 * // start the scan
623 * IfxVadc_startScan(group);
624 *
625 * // wait for conversion to finish
626 *
627 * // fetch the 2 results of conversion for group 0
628 * Ifx_VADC_RES results[10];
629 * result = IfxVadc_getGroupResult(group, results, 0, 2);
630 * \endcode
631 *
632 */
633 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
634
635 /** \brief Get conversion result (Function does not care about the alignment)
636 * value = raw * gain + offset.
637 * \param group pointer to the VADC group
638 * \param resultIdx result register index
639 * \return scaled Conversion result
640 *
641 * \code
642 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
643 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
644 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
645 *
646 * //confiure wait for read mode for global result register
647 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
648 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
649 *
650 * // configure scan
651 * IfxVadc_setScan(group, channels, mask);
652 *
653 * // enable auto scan
654 * IfxVadc_setAutoScan(group, TRUE);
655 *
656 * // start the scan
657 * IfxVadc_startScan(group);
658 *
659 * // wait for conversion to finish
660 *
661 * // fetch the result of conversion from result register 0 for group 0
662 * Ifx_VADC_RES result;
663 * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
664 * \endcode
665 *
666 */
667 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
668
669 /** \brief Returns the auto background scan status.
670 * \param vadc pointer to the base of VADC registers.
671 * \return TRUE if enabled otherwise FALSE.
672 */
673 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
674
675 /** \brief Returns the background scan slot requested status.
676 * \param vadcG pointer to VADC group registers.
677 * \return background scan slot requested status.
678 */
679 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
680
681 /** \brief Enables/Disables continuous background auto scan
682 * \param vadc pointer to the base of VADC registers.
683 * \param autoBackgroundScanEnable whether auto background scan enabled or not.
684 * \return None
685 */
686 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
687
688 /** \brief configures a background scan; can also stop autoscan if all channels are 0
689 * \param vadc pointer to the VADC module registers
690 * \param groupId group index
691 * \param channels specifies the channels which should be enabled/disabled
692 * \param mask specifies the channels which should be modified
693 * \return None
694 *
695 * Background scan can be enabled/disabled for the given channels which are selected with the mask
696 *
697 * \code
698 * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
699 * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
700 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
701 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
702 *
703 * //confiure wait for read mode for global result register
704 * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
705 *
706 * // configure background scan
707 * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
708 *
709 * // enable auto scan
710 * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
711 *
712 * // start the background scan
713 * IfxVadc_startBackgroundScan(vadc);
714 * \endcode
715 *
716 */
717 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
718
719 /** \brief Sets the background scan slot gating configurations.
720 * \param vadc pointer to the base of VADC registers.
721 * \param gatingSource gate input for group.
722 * \param gatingMode gating mode. High level, Low Level or Gating disabled.
723 * \return None
724 */
725 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
726
727 /** \brief Sets the background scan exteranal trigger operating configurations.
728 * \param vadc pointer to the base of VADC registers.
729 * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
730 * \param triggerSource trigger input for group.
731 * \return None
732 */
733 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
734
735 /** \brief Starts a background scan
736 * \param vadc pointer to the VADC module
737 * \return None
738 *
739 * \see IfxVadc_setBackgroundScan
740 *
741 */
742 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
743
744 /** \brief Get debug conversion result
745 * \param group pointer to the VADC group
746 * \param resultIdx result register index
747 * \return Debug conversion result.
748 */
749 IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx);
750
751 /******************************************************************************/
752 /*-------------------------Global Function Prototypes-------------------------*/
753 /******************************************************************************/
754
755 /** \brief Gives the background scan status for a group
756 * \param vadc pointer to the VADC module
757 * \return IfxVadc_Status
758 */
759 IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
760
761 /** \brief Get conversion result (Function does not care about the alignment)
762 * value = raw * gain + offset.
763 * \param vadc VADC module pointer
764 * \param group pointer to the VADC group
765 * \param channel channel Id
766 * \param sourceType type of request source
767 * \return scaled Conversion result
768 *
769 * \code
770 * Ifx_VADC vadc;
771 * vadc.vadc = &MODULE_VADC;
772 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
773 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
774 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
775 *
776 * //confiure wait for read mode for global result register
777 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
778 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
779 *
780 * // configure scan
781 * IfxVadc_setScan(group, channels, mask);
782 *
783 * // start the scan
784 * IfxVadc_startScan(group);
785 *
786 * // wait for conversion to finish
787 *
788 * // fetch the result of conversion for channel 2 of group 0
789 * Ifx_VADC_RESresult2;
790 * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
791 * Ifx_VADC_RESresult5;
792 * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
793 * \endcode
794 *
795 */
796 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
797
798 /** \} */
799
800 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
801 * \{ */
802
803 /******************************************************************************/
804 /*-------------------------Inline Function Prototypes-------------------------*/
805 /******************************************************************************/
806
807 /** \brief Disables the scan slot external trigger.
808 * \param vadcG pointer to VADC group registers.
809 * \return None
810 */
811 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
812
813 /** \brief Enables the scan slot external trigger.
814 * \param vadcG pointer to VADC group registers.
815 * \return None
816 */
817 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
818
819 /** \brief Gets the request scan slot gating mode.
820 * \param vadcG pointer to VADC group registers.
821 * \return requested scan slot gating mode.
822 */
823 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
824
825 /** \brief Gets the request scan slot gating input.
826 * \param vadcG pointer to VADC group registers.
827 * \return request scan slot gating input.
828 */
829 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
830
831 /** \brief Gets the request scan slot priority.
832 * \param vadcG pointer to VADC group registers.
833 * \return request scan slot priority.
834 */
835 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
836
837 /** \brief Gets the request scan slot start mode.
838 * \param vadcG pointer to VADC group registers.
839 * \return request scan slot start mode.
840 */
841 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
842
843 /** \brief Gets the requested scan slot trigger input.
844 * \param vadcG pointer to VADC group registers.
845 * \return requested scan slot trigger input.
846 */
847 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
848
849 /** \brief Gets the requested scan slot trigger mode.
850 * \param vadcG pointer to VADC group registers.
851 * \return requested scan slot trigger mode.
852 */
853 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
854
855 /** \brief Gets the auto scan enable status.
856 * \param vadcG pointer to VADC group registers.
857 * \return TRUE if auto scan enabled otherwise FALSE.
858 */
859 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
860
861 /** \brief Returns the scan slot requested status.
862 * \param vadcG pointer to VADC group registers.
863 * \return TRUE if scan slot request enabled otherwise FALSE.
864 */
865 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
866
867 /** \brief Enables/Disables continuous auto scan
868 * \param vadcG pointer to VADC group registers.
869 * \param autoscanEnable whether autoscan is enabled or not.
870 * \return None
871 */
872 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
873
874 /** \brief Sets the scan slot gating configuration.
875 * \param vadcG pointer to VADC group registers.
876 * \param gatingSource gate input for group.
877 * \param gatingMode gating mode. High level, Low Level or Gating disabled.
878 * \return None
879 */
880 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
881
882 /** \brief Sets the scan slot trigger operating configurations.
883 * \param vadcG pointer to VADC group registers.
884 * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
885 * \param triggerSource trigger input for group.
886 * \return None
887 */
888 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
889
890 /** \brief Starts an autoscan on the specified group
891 * \param group pointer to the VADC group
892 * \return None
893 *
894 * See \ref IfxVadc_setScan
895 *
896 */
897 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
898
899 /******************************************************************************/
900 /*-------------------------Global Function Prototypes-------------------------*/
901 /******************************************************************************/
902
903 /** \brief Gives the scan status for a group
904 * \param group pointer to the VADC group
905 * \return IfxVadc_Status
906 */
907 IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
908
909 /** \brief Configures an (auto-)scan
910 * \param group pointer to the VADC group
911 * \param channels specifies the channels which should be enabled/disabled
912 * \param mask specifies the channels which should be modified
913 * \return None
914 *
915 * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
916 *
917 * \code
918 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
919 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
920 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
921 *
922 * // configure scan
923 * IfxVadc_setScan(group, channels, mask);
924 *
925 * // enable Auto-Scan
926 * IfxVadc_setAutoScan(group, TRUE);
927 *
928 * // start the scan
929 * IfxVadc_startScan(group);
930 * \endcode
931 *
932 */
933 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
934
935 /** \} */
936
937 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
938 * \{ */
939
940 /******************************************************************************/
941 /*-------------------------Inline Function Prototypes-------------------------*/
942 /******************************************************************************/
943
944 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
945 * refill incase of aborted conversion
946 * source interrupt enable/disable
947 * external trigger control of the aborted conversion
948 * \param group pointer to the VADC group
949 * \param channel specifies channel Id
950 * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
951 * \return None
952 *
953 * \code
954 *
955 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
956 * IfxVadc_ChannelId channel = 1; // for channel 1
957 * // Add channel 1 to queue of group 0 with the refill turned on
958 * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
959 * \endcode
960 *
961 */
962 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
963
964 /** \brief Clears all the queue entries including backup stage.
965 * \param vadcG pointer to VADC group registers.
966 * \param flushQueue Whether queue is cleared or not.
967 * \return None
968 */
969 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
970
971 /** \brief Disables the external trigger.
972 * \param vadcG pointer to VADC group registers.
973 * \return None
974 */
975 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
976
977 /** \brief Enables the external trigger.
978 * \param vadcG pointer to VADC group registers.
979 * \return None
980 */
981 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
982
983 /** \brief Gets the requested queue slot gating mode.
984 * \param vadcG pointer to VADC group registers.
985 * \return requested queue slot gating mode.
986 */
987 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG);
988
989 /** \brief Gets the requested queue slot gating input.
990 * \param vadcG pointer to VADC group registers.
991 * \return requested queue slot gating input.
992 */
993 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG);
994
995 /** \brief Gets the request queue slot priority.
996 * \param vadcG pointer to VADC group registers.
997 * \return requested queue slot priority.
998 */
999 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG);
1000
1001 /** \brief Gets the requested queue slot start mode.
1002 * \param vadcG pointer to VADC group registers.
1003 * \return requested queue slot start mode.
1004 */
1005 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG);
1006
1007 /** \brief Gets the requested queue slot trigger input.
1008 * \param vadcG pointer to VADC group registers.
1009 * \return requested queue slot trigger input.
1010 */
1011 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG);
1012
1013 /** \brief Gets the requested queue slot trigger mode.
1014 * \param vadcG pointer to VADC group registers.
1015 * \return requested queue slot trigger mode.
1016 */
1017 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG);
1018
1019 /** \brief Returns the queue slot requested status.
1020 * \param vadcG pointer to VADC group registers.
1021 * \return TRUE if queue slot request enabled otherwise FALSE.
1022 */
1023 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
1024
1025 /** \brief Sets the gating configurations.
1026 * \param vadcG pointer to VADC group registers.
1027 * \param gatingSource gate input for group.
1028 * \param gatingMode gating mode. High level, Low Level or Gating disabled.
1029 * \return None
1030 */
1031 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
1032
1033 /** \brief Sets the trigger operating configurations.
1034 * \param vadcG pointer to VADC group registers.
1035 * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
1036 * \param triggerSource trigger input for group.
1037 * \return None
1038 */
1039 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
1040
1041 /** \brief Starts a queue of a group by generating a trigger event through software
1042 * \param group pointer to the VADC group
1043 * \return None
1044 */
1045 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
1046
1047 /******************************************************************************/
1048 /*-------------------------Global Function Prototypes-------------------------*/
1049 /******************************************************************************/
1050
1051 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1052 * \param group pointer to the VADC group
1053 * \return status of the Queue
1054 *
1055 * \code
1056 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
1057 * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
1058 * \endcode
1059 *
1060 */
1061 IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group);
1062
1063 /** \} */
1064
1065 /** \addtogroup IfxLld_Vadc_Std_IO
1066 * \{ */
1067
1068 /******************************************************************************/
1069 /*-------------------------Inline Function Prototypes-------------------------*/
1070 /******************************************************************************/
1071
1072 /** \brief Initializes a EMUX output
1073 * \param emux the Emux Pin which should be configured
1074 * \param outputMode the pin output mode which should be configured
1075 * \param padDriver the pad driver mode which should be configured
1076 * \return None
1077 */
1078 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1079
1080 /** \brief Initializes a GxBFL output
1081 * \param gxBfl the GxBFL Pin which should be configured
1082 * \param outputMode the pin output mode which should be configured
1083 * \param padDriver the pad driver mode which should be configured
1084 * \return None
1085 */
1086 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
1087
1088 /** \} */
1089
1090 /** \addtogroup IfxLld_Vadc_Std_Frequency
1091 * \{ */
1092
1093 /******************************************************************************/
1094 /*-------------------------Inline Function Prototypes-------------------------*/
1095 /******************************************************************************/
1096
1097 /** \brief Calculate the time using analog frequency.
1098 * \param analogFrequency analog frequency in Hz.
1099 * \param sampleTime sample time in sec.
1100 * \return sample time in sec.
1101 */
1102 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime);
1103
1104 /******************************************************************************/
1105 /*-------------------------Global Function Prototypes-------------------------*/
1106 /******************************************************************************/
1107
1108 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
1109 * \param vadc pointer to the base of VADC registers
1110 * \return Returns the configured Fadci VADC analog clock frequency in Hz.
1111 */
1112 IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc);
1113
1114 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
1115 * \param vadc pointer to the base of VADC registers
1116 * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
1117 */
1118 IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc);
1119
1120 /** \} */
1121
1122 /** \addtogroup IfxLld_Vadc_Std_Group
1123 * \{ */
1124
1125 /******************************************************************************/
1126 /*-------------------------Inline Function Prototypes-------------------------*/
1127 /******************************************************************************/
1128
1129 /** \brief Clears the all group requests.
1130 * \param vadcG pointer to VADC group registers.
1131 * \return None
1132 */
1133 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1134
1135 /** \brief Gets the ADC group arbitration round length.
1136 * \param vadcG pointer to VADC group registers.
1137 * \return ADC group arbitration round length.
1138 */
1139 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG);
1140
1141 /** \brief Gets the channel esult service request node pointer 0.
1142 * \param vadcG pointer to VADC group registers.
1143 * \return channel result service request node pointer 0.
1144 */
1145 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1146
1147 /** \brief Gets the channel esult service request node pointer 1.
1148 * \param vadcG pointer to VADC group registers.
1149 * \return channel result service request node pointer 1.
1150 */
1151 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1152
1153 /** \brief Gets the channel service request node pointer.
1154 * \param vadcG pointer to VADC group registers.
1155 * \return channel service request node pointer.
1156 */
1157 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1158
1159 /** \brief Gets the configured master index.
1160 * \param vadcG pointer to VADC group registers.
1161 * \return configured master kernel index.
1162 */
1163 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1164
1165 /** \brief Resets the ADC group.
1166 * \param vadcG pointer to VADC group registers.
1167 * \return None
1168 */
1169 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1170
1171 /** \brief Sets analog converter group number.
1172 * \param vadcG pointer to VADC group registers.
1173 * \param analogConverterMode group analog converter mode.
1174 * \return None
1175 */
1176 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1177
1178 /** \brief Sets the arbiter round length.
1179 * \param vadcG pointer to VADC group registers.
1180 * \param arbiterRoundLength arbiter round length.
1181 * \return None
1182 */
1183 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1184
1185 /** \brief Sets the ADC input class channel resolution.
1186 * \param vadcG pointer to VADC group registers.
1187 * \param inputClassNum input class number.
1188 * \param resolution ADC input class channel resolution.
1189 * \return None
1190 */
1191 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1192
1193 /** \brief Sets the ADC input class sample time.
1194 * \param vadcG pointer to VADC group registers.
1195 * \param inputClassNum input class number.
1196 * \param analogFrequency ADC analog frequency in Hz.
1197 * \param sampleTime request sample time in sec for input class.
1198 * \return None
1199 */
1200 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1201
1202 /** \brief Sets the master index.
1203 * \param vadcG pointer to VADC group registers.
1204 * \param masterIndex master index.
1205 * \return None
1206 */
1207 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1208
1209 /******************************************************************************/
1210 /*-------------------------Global Function Prototypes-------------------------*/
1211 /******************************************************************************/
1212
1213 /** \brief Sets the Arbiter slot configurations.
1214 * \param vadcG pointer to VADC group registers.
1215 * \param slotEnable enable/disable of slot.
1216 * \param prio channel request priority.
1217 * \param mode Channel Slot start mode.
1218 * \param slot channel slot Request source.
1219 * \return None
1220 */
1221 IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot);
1222
1223 /** \} */
1224
1225 /** \addtogroup IfxLld_Vadc_Std_Module
1226 * \{ */
1227
1228 /******************************************************************************/
1229 /*-------------------------Inline Function Prototypes-------------------------*/
1230 /******************************************************************************/
1231
1232 /** \brief Disable VADC Module
1233 * \param vadc Pointer to VADC Module
1234 * \return None
1235 */
1236 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc);
1237
1238 /** \brief Enable VADC kernel.
1239 * \param vadc pointer to the base of VADC registers.
1240 * \return None
1241 */
1242 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1243
1244 /** \brief gets ADC Calibration Flag CAL status.
1245 * \param vadc pointer to VADC group registers.
1246 * \param adcCalGroupNum ADC CAL group number.
1247 * \return CAL group status.
1248 */
1249 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1250
1251 /** \brief Gets the global control configuration value.
1252 * \param vadc pointer to the base of VADC registers.
1253 * \return global control configuration value.
1254 */
1255 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1256
1257 /** \brief get SUCAL bit field status
1258 * \param vadc Pointer to VADC Module
1259 * \return Indicate the start-up calibration phase
1260 */
1261 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc);
1262
1263 /** \brief initiates the calibration pulse phase.
1264 * \param vadc pointer to the base of VADC registers
1265 * \return None
1266 */
1267 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1268
1269 /** \brief Sets the channel conversion mode.
1270 * \param vadc pointer to VADC module registers.
1271 * \param inputClassNum global input class number.
1272 * \param resolution ADC channel resolution.
1273 * \return None
1274 */
1275 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1276
1277 /** \brief Sets the sample time of ADC global class.
1278 * \param vadc pointer to VADC module registers.
1279 * \param inputClassNum global input class number.
1280 * \param analogFrequency ADC analog frequency in Hz.
1281 * \param sampleTime the requested sample time for input class in sec.
1282 * \return None
1283 */
1284 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1285
1286 /** \brief Sets the sensitivity of the module to sleep signal
1287 * \param vadc pointer to VADC registers
1288 * \param mode mode selection (enable/disable)
1289 * \return None
1290 */
1291 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode);
1292
1293 /******************************************************************************/
1294 /*-------------------------Global Function Prototypes-------------------------*/
1295 /******************************************************************************/
1296
1297 /** \brief Disable write access to the VADC config/control registers.
1298 * \param vadc pointer to the base of VADC registers.
1299 * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1300 * \return None
1301 */
1302 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1303
1304 /** \brief Disables the post calibration.
1305 * \param vadc pointer to the base of VADC registers.
1306 * \param group Index of the group.
1307 * \param disable disable or not.
1308 * \return None
1309 */
1310 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1311
1312 /** \brief Enable write access to the VADC config/control registers.
1313 * \param vadc pointer to the base of VADC registers.
1314 * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1315 * \return None
1316 */
1317 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1318
1319 /** \brief Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068
1320 * \param vadc pointer to the base of VADC registers.
1321 * \param ccu6Num selects CCU60 or CCU61
1322 * \return None
1323 */
1324 IFX_EXTERN void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num);
1325
1326 /** \brief Module Frequency in Hz
1327 * \return Module Frequency in Hz.
1328 */
1329 IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void);
1330
1331 /** \brief Gives the SRC source address.
1332 * \param group Index of the group
1333 * \param index SRC number
1334 * \return SRC source address
1335 */
1336 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1337
1338 /** \brief Initialises ADC arbiter clock.
1339 * \param vadc pointer to the base of VADC registers
1340 * \param arbiterClockDivider ADC arbiter clock divider.
1341 * \return None
1342 */
1343 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1344
1345 /** \brief Initialises the ADC Converter clock.
1346 * \param vadc pointer to the base of VADC registers
1347 * \param converterClockDivider ADC converter clock divider.
1348 * \return None
1349 */
1350 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1351
1352 /** \brief Configure the FadcD vadc digital clock.
1353 * \param vadc pointer to the base of VADC registers.
1354 * \param fAdcD ADC digital clock frequency in Hz.
1355 * \return calculated ADC digital clock frequency in Hz.
1356 */
1357 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1358
1359 /** \brief Configure the ADC analog clock.
1360 * \param vadc pointer to the base of VADC registers.
1361 * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1362 * \return ADC analog clock frequency in Hz.
1363 */
1364 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1365
1366 /** \brief Return the post calibration status
1367 * \param vadc Pointer to VADC module
1368 * \param group specifies Group ID
1369 * \return TRUE if the post calibration is enabled for the group else false
1370 */
1371 IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group);
1372
1373 /** \brief Resets the kernel.
1374 * \param vadc pointer to the base of VADC registers.
1375 * \return None
1376 */
1377 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1378
1379 /** \brief Select Low Power Supply Voltage
1380 * \param vadc Pointer to Module space
1381 * \param supplyVoltage Select Supply Voltage
1382 * \return None
1383 */
1384 IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage);
1385
1386 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1387 * \param vadc pointer to the base of VADC registers.
1388 * \return None
1389 */
1390 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1391
1392 /** \} */
1393
1394 /** \addtogroup IfxLld_Vadc_Std_Channel
1395 * \{ */
1396
1397 /******************************************************************************/
1398 /*-------------------------Inline Function Prototypes-------------------------*/
1399 /******************************************************************************/
1400
1401 /** \brief Clears the channel request.
1402 * \param vadcG pointer to VADC group registers.
1403 * \param channelId channel id whose request to be cleared.
1404 * \return None
1405 */
1406 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1407
1408 /** \brief Enables the FIFO mode.
1409 * \param vadcG pointer to VADC group registers.
1410 * \param resultRegister channel result register.
1411 * \param fifoMode FIFO mode .
1412 * \return None
1413 */
1414 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode);
1415
1416 /**
1417 * \param vadcG pointer to VADC group registers.
1418 * \param resultRegister channel result register.
1419 * \return None
1420 */
1421 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1422
1423 /** \brief Gets the group's assigned channels.
1424 * \param vadcG pointer to VADC group registers.
1425 * \return group's assigned channels.
1426 */
1427 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1428
1429 /** \brief Gets the current ADC channel control configurations.
1430 * \param vadcG pointer to VADC group registers.
1431 * \param channelIndex ADC channel number.
1432 * \return current ADC channel control configuration.
1433 */
1434 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1435
1436 /** \brief Gets the channel input class
1437 * \param vadcG pointer to VADC Group register space
1438 * \param channelIndex specifies channel ID
1439 * \return Input class
1440 */
1441 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1442
1443 /** \brief Gets the ADC input class channel resolution.
1444 * \param vadcG pointer to VADC group registers.
1445 * \param inputClassNum ADC input class number.
1446 * \return ADC input class channel resolution.
1447 */
1448 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1449
1450 /** \brief Gets the ADC input class channel sample time.
1451 * \param vadcG pointer to VADC group registers.
1452 * \param inputClassNum ADC input class number.
1453 * \param analogFrequency ADC module analog frequency in Hz.
1454 * \return ADC input class channel sample time in sec.
1455 */
1456 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1457
1458 /** \brief Sets the channels with low priority as background channel.
1459 * \param vadcG pointer to VADC group registers.
1460 * \param channelIndex group channel id.
1461 * \return None
1462 */
1463 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1464
1465 /** \brief Sets the target for result background source.
1466 * \param vadcG pointer to VADC group registers.
1467 * \param channelIndex group channel id.
1468 * \param globalResultUsage whether storage in global result register.
1469 * \return None
1470 */
1471 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1472
1473 /** \brief Selects boundary extension.
1474 * \param vadcG pointer to VADC group registers.
1475 * \param channelIndex group channel id.
1476 * \param boundaryMode boundary extension mode.
1477 * \return None
1478 */
1479 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1480
1481 /** \brief Sets the channel event service request line.
1482 * \param vadcG pointer to VADC group registers.
1483 * \param channelSrcNr channel event Service Node.
1484 * \param channel channel number.
1485 * \return None
1486 */
1487 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1488
1489 /** \brief Sets the channel input class.
1490 * \param vadcG pointer to VADC group registers.
1491 * \param channelIndex group channel id.
1492 * \param inputClass group input class.
1493 * \return None
1494 */
1495 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1496
1497 /** \brief Sets the channel event mode.
1498 * \param vadcG pointer to VADC group registers.
1499 * \param channelIndex group channel id.
1500 * \param limitCheck channel event mode.
1501 * \return None
1502 */
1503 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1504
1505 /** \brief Sets channel as priority channel with in the group.
1506 * \param vadcG pointer to VADC group registers.
1507 * \param channelIndex group channel id.
1508 * \return None
1509 */
1510 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1511
1512 /** \brief Sets group's lower boundary.
1513 * \param vadcG pointer to VADC group registers.
1514 * \param channelIndex group channel id.
1515 * \param lowerBoundary group lower boundary.
1516 * \return None
1517 */
1518 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1519
1520 /** \brief Selects the refernce input.
1521 * \param vadcG pointer to VADC group registers.
1522 * \param channelIndex group channel id.
1523 * \param reference reference input.
1524 * \return None
1525 */
1526 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1527
1528 /** \brief Sets result event node pointer 0.
1529 * \param vadcG pointer to VADC group registers.
1530 * \param resultSrcNr channel result event service node.
1531 * \param resultRegister channel result register.
1532 * \return None
1533 */
1534 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1535
1536 /** \brief Sets result event node pointer 1.
1537 * \param vadcG pointer to VADC group registers.
1538 * \param resultSrcNr channel result event service node.
1539 * \param resultRegister channel result register.
1540 * \return None
1541 */
1542 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1543
1544 /** \brief Sets result store position.
1545 * \param vadcG pointer to VADC group registers.
1546 * \param channelIndex group channel id.
1547 * \param rightAlignedStorage result store position.
1548 * \return None
1549 */
1550 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1551
1552 /** \brief Sets channel synchronization request.
1553 * \param vadcG pointer to VADC group registers.
1554 * \param channelIndex group channel id.
1555 * \param synchonize whether channel synchronize or stand alone operation.
1556 * \return None
1557 */
1558 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1559
1560 /** \brief Sets group's upper boundary.
1561 * \param vadcG pointer to VADC group registers.
1562 * \param channelIndex group channel id.
1563 * \param upperBoundary group upper boundary.
1564 * \return None
1565 */
1566 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1567
1568 /** \brief Sets the group result register.
1569 * \param vadcG pointer to VADC group registers.
1570 * \param channelIndex group channel id.
1571 * \param resultRegister result register for group result storage.
1572 * \return None
1573 */
1574 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1575
1576 /******************************************************************************/
1577 /*-------------------------Global Function Prototypes-------------------------*/
1578 /******************************************************************************/
1579
1580 /** \brief get channel conversion timing
1581 * \param vadc Pointer to VADC module
1582 * \param group specifies the Group
1583 * \param inputClass Input class used
1584 * \param analogFrequency ADC module analog frequency fadci in Hz.
1585 * \param moduleFrequency ADC module frequency fvadc in Hz.
1586 * \param conversionMode specifies the conversion mode (Standard conversion mode)
1587 * \return Channel conversion Time in sec
1588 */
1589 IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode);
1590
1591 /** \} */
1592
1593 /** \addtogroup IfxLld_Vadc_Std_Emux
1594 * \{ */
1595
1596 /******************************************************************************/
1597 /*-------------------------Inline Function Prototypes-------------------------*/
1598 /******************************************************************************/
1599
1600 /** \brief get global input class resolution
1601 * \param vadc Pointer to VADC Module space
1602 * \param inputClassNum global input class number
1603 * \return External channel resolution for global input class
1604 */
1605 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
1606
1607 /** \brief Get the sample time of ADC global class for external channel.
1608 * \param vadc pointer to VADC Module space
1609 * \param inputClassNum Adc input class number
1610 * \param analogFrequency ADC module analog frequency in Hz.
1611 * \return ADC input class external channel sample time in sec.
1612 */
1613 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
1614
1615 /** \brief get the external channel resolution
1616 * \param vadcG Pointer to VADC group register space
1617 * \param inputClassNum Adc input class number
1618 * \return Adc input class External channel resolution
1619 */
1620 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum);
1621
1622 /** \brief Gets the ADC input class sample time of external channel.
1623 * \param vadcG Pointer to Register Group space
1624 * \param inputClassNum ADC input class number
1625 * \param analogFrequency ADC module analog frequency in Hz.
1626 * \return ADC input class external channel sample time in sec.
1627 */
1628 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1629
1630 /** \brief set the external channel resolution of Global class
1631 * \param vadc pointer to VADC Module space
1632 * \param inputClassNum Global Input Class Number
1633 * \param resolution External Channel resolution
1634 * \return None
1635 */
1636 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1637
1638 /** \brief Sets the sample time of ADC global class for external channel.
1639 * \param vadc Pointer to VADC Module space
1640 * \param inputClassNum Adc input class number
1641 * \param analogFrequency ADC analog Frequency in HZ
1642 * \param sampleTime the requested sample time for input class in sec
1643 * \return None
1644 */
1645 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1646
1647 /** \brief set the external channel resolution of ADC input class
1648 * \param vadcG pointer to VADC Group Register space
1649 * \param inputClassNum input class number
1650 * \param resolution input class external channel resolution
1651 * \return None
1652 */
1653 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1654
1655 /** \brief Sets the ADC input class sample time for external channel.
1656 * \param vadcG Pointer to VADC Group Register Space
1657 * \param inputClassNum input class number
1658 * \param analogFrequency ADC analog frequency in Hz.
1659 * \param sampleTime request sample time in sec for input class.
1660 * \return None
1661 */
1662 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1663
1664 /** \brief Sets the Emux Interface for a particular group
1665 * \param vadc Pointer to VADC Module Space
1666 * \param emuxInterface specifies the EmuxInterface
1667 * \param group specifies the group ID
1668 * \return None
1669 */
1670 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group);
1671
1672 /******************************************************************************/
1673 /*-------------------------Global Function Prototypes-------------------------*/
1674 /******************************************************************************/
1675
1676 /**
1677 * \param vadc pointer to Module space
1678 * \param vadcG Pointer to VADC group register space
1679 * \param mode External Multiplexer mode
1680 * \param channels Specifies channel Id
1681 * \param startChannel specifies the external channel value from which conversion to be carried out
1682 * \param code Output the channel number in binary code/gray code
1683 * \param sampleTimeControl specifies when to use a sample time for external channel
1684 * \param channelSelectionStyle External Multiplexer Channel Selection Style
1685 * \return None
1686 */
1687 IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle);
1688
1689 /** \} */
1690
1691 /******************************************************************************/
1692 /*-------------------------Inline Function Prototypes-------------------------*/
1693 /******************************************************************************/
1694
1695 /** \brief get channel service request node pointer
1696 * \param vadcG Pointer to VADC Group register space
1697 * \return channel service request node pointer
1698 */
1699 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1700
1701 /** \brief set channel event node pointer
1702 * \param vadcG Pointer to the Vadc group register space
1703 * \param channelSrcNr Service request
1704 * \param channel specifies channel
1705 * \return None
1706 */
1707 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1708
1709 /******************************************************************************/
1710 /*---------------------Inline Function Implementations------------------------*/
1711 /******************************************************************************/
1712
1713 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1714 {
1715 group->QINR0.U = channel | options;
1716 }
1717
1718
1719 IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
1720 {
1721 uint32 ticks;
1722
1723 ticks = (uint32)(sampleTime * analogFrequency) - 2;
1724
1725 if (ticks > 31)
1726 {
1727 ticks = (ticks / 16) + 15;
1728 }
1729
1730 ticks = __minu(ticks, 0xFFu);
1731
1732 return ticks;
1733 }
1734
1735
1736 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
1737 {
1738 vadcG->REFCLR.U = 0x0000FFFFu;
1739 }
1740
1741
1742 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
1743 {
1744 vadcG->CEFCLR.U = 1 << channelId;
1745 }
1746
1747
1748 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1749 {
1750 vadcG->QMR0.B.FLUSH = flushQueue;
1751 }
1752
1753
1754 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1755 {
1756 group->RCR[resultIdx].B.WFR = waitForRead;
1757 }
1758
1759
1760 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
1761 {
1762 vadc->GLOBRCR.B.WFR = waitForRead;
1763 }
1764
1765
1766 IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
1767 {
1768 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1769 IfxScuWdt_clearCpuEndinit(passwd);
1770 vadc->CLC.B.DISR = 1;
1771 IfxScuWdt_setCpuEndinit(passwd);
1772 }
1773
1774
1775 IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1776 {
1777 vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1778 }
1779
1780
1781 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1782 {
1783 vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1784 }
1785
1786
1787 IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
1788 {
1789 vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1790 }
1791
1792
1793 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
1794 {
1795 vadcG->RCR[resultRegister].B.FEN = fifoMode;
1796 }
1797
1798
1799 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1800 {
1801 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
1802
1803 IfxScuWdt_clearCpuEndinit(passwd);
1804 vadc->CLC.U = 0x00000000;
1805 IfxScuWdt_setCpuEndinit(passwd);
1806 }
1807
1808
1809 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
1810 {
1811 vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1812 }
1813
1814
1815 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
1816 {
1817 vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1818 }
1819
1820
1821 IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1822 {
1823 vadcG->RCR[resultRegister].B.SRGEN = 1;
1824 }
1825
1826
1827 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
1828 {
1829 uint8 status;
1830 status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1831 return status;
1832 }
1833
1834
1835 IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
1836 {
1837 return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1838 }
1839
1840
1841 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1842 {
1843 Ifx_VADC_G_CHASS assignChannels;
1844 assignChannels.U = vadcG->CHASS.U;
1845 return assignChannels;
1846 }
1847
1848
1849 IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
1850 {
1851 return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1852 }
1853
1854
1855 IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
1856 {
1857 return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1858 }
1859
1860
1861 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
1862 {
1863 return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1864 }
1865
1866
1867 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
1868 {
1869 return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1870 }
1871
1872
1873 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
1874 {
1875 return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1876 }
1877
1878
1879 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
1880 {
1881 return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1882 }
1883
1884
1885 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1886 {
1887 Ifx_VADC_CHCTR tempChctr;
1888 tempChctr.U = vadcG->CHCTR[channelIndex].U;
1889 return tempChctr;
1890 }
1891
1892
1893 IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1894 {
1895 return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
1896 }
1897
1898
1899 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1900 {
1901 Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1902 resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1903 return resultServiceRequestNodePtr0;
1904 }
1905
1906
1907 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1908 {
1909 Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1910 resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1911 return resultServiceRequestNodePtr1;
1912 }
1913
1914
1915 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
1916 {
1917 Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1918 serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1919 return serviceRequestNodePtr;
1920 }
1921
1922
1923 IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
1924 {
1925 Ifx_VADC_G_CEVNP1 serviceRequestNodePtr;
1926 serviceRequestNodePtr.U = vadcG->CEVNP1.U;
1927 return serviceRequestNodePtr;
1928 }
1929
1930
1931 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1932 {
1933 return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
1934 }
1935
1936
1937 IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1938 {
1939 return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
1940 }
1941
1942
1943 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1944 {
1945 return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
1946 }
1947
1948
1949 IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1950 {
1951 return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
1952 }
1953
1954
1955 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1956 {
1957 Ifx_VADC_GLOBCFG globCfg;
1958 globCfg.U = vadc->GLOBCFG.U;
1959 return globCfg;
1960 }
1961
1962
1963 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
1964 {
1965 return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
1966 }
1967
1968
1969 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1970 {
1971 Ifx_VADC_GLOBRES tmpGlobalResult;
1972
1973 tmpGlobalResult.U = vadc->GLOBRES.U;
1974
1975 return tmpGlobalResult;
1976 }
1977
1978
1979 IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
1980 {
1981 uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
1982
1983 if (sampleTime > 16)
1984 {
1985 sampleTime = (sampleTime - 15) * 16;
1986 }
1987
1988 return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
1989 }
1990
1991
1992 IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
1993 {
1994 return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
1995 }
1996
1997
1998 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1999 {
2000 uint32 idx;
2001
2002 for (idx = 0; idx < numResults; idx++)
2003 {
2004 results[idx].U = group->RES[resultOffset + idx].U;
2005 }
2006 }
2007
2008
2009 IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
2010 {
2011 uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
2012
2013 if (sampleTime > 16)
2014 {
2015 sampleTime = (sampleTime - 15) * 16;
2016 }
2017
2018 return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
2019 }
2020
2021
2022 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
2023 {
2024 uint8 masterIndex = 0;
2025 masterIndex = vadcG->SYNCTR.B.STSEL;
2026 return masterIndex;
2027 }
2028
2029
2030 IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
2031 {
2032 return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
2033 }
2034
2035
2036 IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
2037 {
2038 return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
2039 }
2040
2041
2042 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
2043 {
2044 return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
2045 }
2046
2047
2048 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
2049 {
2050 return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
2051 }
2052
2053
2054 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
2055 {
2056 return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
2057 }
2058
2059
2060 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
2061 {
2062 return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
2063 }
2064
2065
2066 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
2067 {
2068 Ifx_VADC_RES tmpResult;
2069
2070 tmpResult.U = group->RES[resultIdx].U;
2071
2072 return tmpResult;
2073 }
2074
2075
2076 IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
2077 {
2078 return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
2079 }
2080
2081
2082 IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
2083 {
2084 return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
2085 }
2086
2087
2088 IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
2089 {
2090 return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
2091 }
2092
2093
2094 IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
2095 {
2096 return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
2097 }
2098
2099
2100 IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
2101 {
2102 return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
2103 }
2104
2105
2106 IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
2107 {
2108 return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
2109 }
2110
2111
2112 IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
2113 {
2114 return (boolean)vadc->GLOBCFG.B.SUCAL;
2115 }
2116
2117
2118 IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2119 {
2120 IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
2121 IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
2122 }
2123
2124
2125 IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
2126 {
2127 IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
2128 IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
2129 }
2130
2131
2132 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
2133 {
2134 vadc->GLOBCFG.B.SUCAL = 1;
2135 }
2136
2137
2138 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
2139 {
2140 return (boolean)vadc->BRSMR.B.SCAN;
2141 }
2142
2143
2144 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
2145 {
2146 return (boolean)vadcG->ASMR.B.SCAN;
2147 }
2148
2149
2150 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
2151 {
2152 return (boolean)vadcG->ARBPR.B.ASEN2;
2153 }
2154
2155
2156 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
2157 {
2158 return (boolean)vadcG->ARBPR.B.ASEN0;
2159 }
2160
2161
2162 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
2163 {
2164 return (boolean)vadcG->ARBPR.B.ASEN1;
2165 }
2166
2167
2168 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
2169 {
2170 vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
2171 }
2172
2173
2174 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
2175 {
2176 vadcG->ARBCFG.B.ANONC = analogConverterMode;
2177 }
2178
2179
2180 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
2181 {
2182 vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
2183 }
2184
2185
2186 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
2187 {
2188 vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
2189 }
2190
2191
2192 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
2193 {
2194 vadcG->ASMR.B.SCAN = autoscanEnable;
2195 }
2196
2197
2198 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2199 {
2200 vadcG->CHASS.U &= ~(1 << channelIndex);
2201 }
2202
2203
2204 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
2205 {
2206 vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
2207 }
2208
2209
2210 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
2211 {
2212 channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
2213 vadc->BRSSEL[groupId].U = channels;
2214 }
2215
2216
2217 IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2218 {
2219 Ifx_VADC_BRSCTRL brsctrl;
2220 brsctrl.U = vadc->BRSCTRL.U;
2221 brsctrl.B.GTWC = 1;
2222 brsctrl.B.GTSEL = gatingSource;
2223 vadc->BRSCTRL.U = brsctrl.U;
2224 vadc->BRSMR.B.ENGT = gatingMode;
2225 }
2226
2227
2228 IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2229 {
2230 Ifx_VADC_BRSCTRL brsctrl;
2231 brsctrl.U = vadc->BRSCTRL.U;
2232 brsctrl.B.XTWC = 1;
2233 brsctrl.B.XTMODE = triggerMode;
2234 brsctrl.B.XTSEL = triggerSource;
2235 vadc->BRSCTRL.U = brsctrl.U;
2236 }
2237
2238
2239 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
2240 {
2241 vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
2242 }
2243
2244
2245 IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2246 {
2247 vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
2248 vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
2249 }
2250
2251
2252 IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
2253 {
2254 vadcG->CEVNP1.U &= ~(IFX_VADC_G_CEVNP1_CEV8NP_MSK << (channel * 4));
2255 vadcG->CEVNP1.U |= (channelSrcNr << (channel * 4));
2256 }
2257
2258
2259 IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
2260 {
2261 vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
2262 }
2263
2264
2265 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
2266 {
2267 vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
2268 }
2269
2270
2271 IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2272 {
2273 vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
2274 }
2275
2276
2277 IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2278 {
2279 vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2280 }
2281
2282
2283 IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2284 {
2285 vadcG->ICLASS[inputClassNum].B.CME = resolution;
2286 }
2287
2288
2289 IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2290 {
2291 vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2292 }
2293
2294
2295 IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
2296 {
2297 if (emuxInterface == IfxVadc_EmuxInterface_0)
2298 {
2299 vadc->EMUXSEL.B.EMUXGRP0 = group;
2300 }
2301 else
2302 {
2303 vadc->EMUXSEL.B.EMUXGRP1 = group;
2304 }
2305 }
2306
2307
2308 IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2309 {
2310 vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
2311 }
2312
2313
2314 IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2315 {
2316 vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2317 }
2318
2319
2320 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
2321 {
2322 vadcG->CHASS.U |= (1 << channelIndex);
2323 }
2324
2325
2326 IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
2327 {
2328 vadcG->ICLASS[inputClassNum].B.CMS = resolution;
2329 }
2330
2331
2332 IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
2333 {
2334 vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
2335 }
2336
2337
2338 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
2339 {
2340 vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
2341 }
2342
2343
2344 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
2345 {
2346 vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
2347 vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
2348 }
2349
2350
2351 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2352 {
2353 Ifx_VADC_G_QCTRL0 qctrl0;
2354 qctrl0.U = vadcG->QCTRL0.U;
2355 qctrl0.B.GTWC = 1;
2356 qctrl0.B.GTSEL = gatingSource;
2357 vadcG->QCTRL0.U = qctrl0.U;
2358 vadcG->QMR0.B.ENGT = gatingMode;
2359 }
2360
2361
2362 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2363 {
2364 Ifx_VADC_G_QCTRL0 qctrl0;
2365 qctrl0.U = vadcG->QCTRL0.U;
2366 qctrl0.B.XTWC = 1;
2367 qctrl0.B.XTMODE = triggerMode;
2368 qctrl0.B.XTSEL = triggerSource;
2369 vadcG->QCTRL0.U = qctrl0.U;
2370 }
2371
2372
2373 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
2374 {
2375 vadcG->CHCTR[channelIndex].B.REFSEL = reference;
2376 }
2377
2378
2379 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2380 {
2381 vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
2382 vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
2383 }
2384
2385
2386 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
2387 {
2388 vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2389 vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
2390 }
2391
2392
2393 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
2394 {
2395 vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
2396 }
2397
2398
2399 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
2400 {
2401 Ifx_VADC_G_ASCTRL asctrl;
2402 asctrl.U = vadcG->ASCTRL.U;
2403 asctrl.B.GTWC = 1;
2404 asctrl.B.GTSEL = gatingSource;
2405 vadcG->ASCTRL.U = asctrl.U;
2406 vadcG->ASMR.B.ENGT = gatingMode;
2407 }
2408
2409
2410 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
2411 {
2412 Ifx_VADC_G_ASCTRL asctrl;
2413 asctrl.U = vadcG->ASCTRL.U;
2414 asctrl.B.XTWC = 1;
2415 asctrl.B.XTMODE = triggerMode;
2416 asctrl.B.XTSEL = triggerSource;
2417 vadcG->ASCTRL.U = asctrl.U;
2418 }
2419
2420
2421 IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
2422 {
2423 uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
2424 IfxScuWdt_clearCpuEndinit(passwd);
2425 vadc->CLC.B.EDIS = mode;
2426 IfxScuWdt_setCpuEndinit(passwd);
2427 }
2428
2429
2430 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
2431 {
2432 vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
2433 }
2434
2435
2436 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2437 {
2438 vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2439 }
2440
2441
2442 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
2443 {
2444 vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
2445 }
2446
2447
2448 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
2449 {
2450 group->QMR0.B.TREV = 1;
2451 }
2452
2453
2454 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
2455 {
2456 group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
2457 }
2458
2459
2460 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2461 {
2462 vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2463 }
2464
2465
2466 IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx)
2467 {
2468 Ifx_VADC_RESD tmpResult;
2469
2470 tmpResult.U = group->RESD[resultIdx].U;
2471
2472 return tmpResult;
2473 }
2474
2475
2476 #endif /* IFXVADC_H */
IfxVadc_ChannelResolution_8bit
8-bit conversion
Definition: IfxVadc.h:157
IfxVadc_BoundaryExtension_fastCompareResult4
Fast compare mode use as upper boundary Channel result 4.
Definition: IfxVadc.h:96
IfxVadc_setEmuxInterfaceForGroup
IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
Sets the Emux Interface for a particular group.
Definition: IfxVadc.h:2295
IfxVadc_setGroupResolution
IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the ADC input class channel resolution.
Definition: IfxVadc.h:2326
IfxVadc_ChannelId_11
Channel 11.
Definition: IfxVadc.h:136
IfxVadc_Protection_initGroup4
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:346
IfxVadc_getChannelServiceRequestNodePointer1
IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
get channel service request node pointer
Definition: IfxVadc.h:1923
IfxVadc_TriggerSource_5
Input signal REQTRx_5.
Definition: IfxVadc.h:475
IfxVadc_isRequestBackgroundScanSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
Returns the background scan slot requested status.
Definition: IfxVadc.h:2150
IfxVadc_ChannelId_0
Channel 0.
Definition: IfxVadc.h:125
IfxVadc_getGroupResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
Gets the ADC input class channel resolution.
Definition: IfxVadc.h:1992
IfxVadc_BoundaryExtension_fastCompareResult15
Fast compare mode use as upper boundary Channel result 15.
Definition: IfxVadc.h:107
IfxVadc_clearAllResultRequests
IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
Clears the all group requests.
Definition: IfxVadc.h:1736
IfxVadc_disableAccess
IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers.
Definition: IfxVadc.c:54
IfxVadc_Protection_resultRegisterGroup1
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:375
IfxVadc_ChannelId
IfxVadc_ChannelId
VADC Channels.
Definition: IfxVadc.h:122
IfxVadc_FifoMode_fifoStructure
fifoStructure
Definition: IfxVadc.h:257
IfxVadc_LimitCheck_eventIfOutsideArea
Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result sw...
Definition: IfxVadc.h:310
IfxVadc_Status_noAccess
Access to the group/channel is disabled.
Definition: IfxVadc.h:452
IfxVadc_SrcNr_group2
service request line 2 of group
Definition: IfxVadc.h:433
IfxVadc_ChannelSelectionStyle
IfxVadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxVadc.h:186
IfxVadc_BoundaryExtension_fastCompareResult5
Fast compare mode use as upper boundary Channel result 5.
Definition: IfxVadc.h:97
IfxVadc_ChannelSelectionStyle_binary
Each bit of bitfield EMUXCH selects the associated channel for EMUX control.
Definition: IfxVadc.h:189
IfxVadc_Protection_resultRegisterGroup13
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:387
IfxVadc_GatingSource_3
Input signal REQGTx_3.
Definition: IfxVadc.h:279
IfxVadc_getResultBasedOnRequestSource
IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.c:285
IfxVadc_getEmuxGlobalSampleTime
IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
Get the sample time of ADC global class for external channel.
Definition: IfxVadc.h:1937
IfxVadc_TriggerSource_15
Input signal REQTRx_15.
Definition: IfxVadc.h:485
IfxVadc_EmuxCodingScheme
IfxVadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxVadc.h:203
IfxVadc_GatingMode_gatingHigh
Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is hig...
Definition: IfxVadc.h:268
IfxVadc_startBackgroundScan
IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
Starts a background scan.
Definition: IfxVadc.h:2442
IfxVadc_initiateStartupCalibration
IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
initiates the calibration pulse phase.
Definition: IfxVadc.h:2132
IfxVadc_GatingSource_8
Input signal REQGTx_8.
Definition: IfxVadc.h:284
IfxVadc_getChannelResultServiceRequestNodePointer0
IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 0.
Definition: IfxVadc.h:1899
IfxVadc_ArbitrationRounds_16_slots
An arbitration round contains 16 arbitration slots.
Definition: IfxVadc.h:84
IfxVadc_ConversionType
IfxVadc_ConversionType
type of conversion
Definition: IfxVadc.h:195
IfxVadc_EmuxSelectValue_5
Start Selection Value 5.
Definition: IfxVadc.h:236
IfxVadc_LimitCheck_noCheck
Normal compare mode Event Never Fast Compare mode Event Never.
Definition: IfxVadc.h:308
IfxVadc_getArbiterRoundLength
IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
Gets the ADC group arbitration round length.
Definition: IfxVadc.h:1835
IfxVadc_GatingSource_4
Input signal REQGTx_4.
Definition: IfxVadc.h:280
IfxVadc_Protection_channelControl7
Access control for GxCHCTR7.
Definition: IfxVadc.h:333
IfxVadc_Protection_channelControl4
Access control for GxCHCTR4.
Definition: IfxVadc.h:330
IfxVadc_RequestSlotPriority_high
High priority.
Definition: IfxVadc.h:397
IfxVadc_Protection_resultRegisterGroup6
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:380
IfxVadc_ArbitrationRounds
IfxVadc_ArbitrationRounds
Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
Definition: IfxVadc.h:80
IfxVadc_GatingSource_0
Input signal REQGTx_0.
Definition: IfxVadc.h:276
IfxVadc_disableQueueSlotExternalTrigger
IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
Disables the external trigger.
Definition: IfxVadc.h:1775
IfxVadc_ChannelResult_10
Use Channel result 10.
Definition: IfxVadc.h:175
IfxVadc_RequestSlotPriority_low
Lowpriority.
Definition: IfxVadc.h:396
IfxVadc_ChannelId_1
Channel 1.
Definition: IfxVadc.h:126
IfxVadc_getAssignedChannels
IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
Gets the group&#39;s assigned channels.
Definition: IfxVadc.h:1841
IfxVadc_setChannelEventNodePointer0
IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
Sets the channel event service request line.
Definition: IfxVadc.h:2245
IfxVadc_ChannelResult_9
Use Channel result 9.
Definition: IfxVadc.h:174
IfxVadc_ChannelReference
IfxVadc_ChannelReference
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:145
IfxVadc_InputClasses_group0
Use group class 0.
Definition: IfxVadc.h:298
IfxVadc_setReferenceInput
IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
Selects the refernce input.
Definition: IfxVadc.h:2373
IfxVadc_Protection_channelControl10
Access control for GxCHCTR10.
Definition: IfxVadc.h:336
IfxVadc_setChannelEventNodePointer1
IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
set channel event node pointer
Definition: IfxVadc.h:2252
IfxVadc_ChannelResult_1
Use Channel result 1.
Definition: IfxVadc.h:166
IfxVadc_Protection_resultRegisterGroup3
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:377
IfxVadc_Protection_initGroup8
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:350
IfxVadc_getAdcDigitalFrequency
IFX_EXTERN float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz.
Definition: IfxVadc.c:169
IfxVadc_RequestSlotPriority_lowest
Lowest priority.
Definition: IfxVadc.h:395
IfxVadc_Protection_serviceGroup6
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:364
IfxVadc_getQueueStatus
IFX_EXTERN IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxVadc.c:267
IfxVadc_setEmuxGlobalSampleTime
IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class for external channel.
Definition: IfxVadc.h:2277
IfxVadc_Protection_serviceGroup5
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:363
IfxVadc_FifoMode_seperateResultRegister
seperate Result Register
Definition: IfxVadc.h:256
IfxVadc_getQueueSlotGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
Gets the requested queue slot gating input.
Definition: IfxVadc.h:2036
IfxVadc_TriggerSource_10
Input signal REQTRx_10.
Definition: IfxVadc.h:480
IfxVadc_Protection_resultRegisterGroup2
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:376
IfxVadc_Protection_resultRegisterGroup7
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:381
IfxVadc_storeGroupResult
IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
Sets the group result register.
Definition: IfxVadc.h:2460
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxVadc_TriggerMode_uponAnyEdge
Trigger event upon any edge.
Definition: IfxVadc.h:463
IfxVadc_getEmuxGroupSampleTime
IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class sample time of external channel.
Definition: IfxVadc.h:1949
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxVadc_SrcNr_shared2
Select shared service request line 2.
Definition: IfxVadc.h:437
IfxVadc_BoundarySelection_global0
Use global class 0.
Definition: IfxVadc.h:116
IfxVadc_Protection_initGroup1
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:343
IfxVadc_RequestSource_background
background scan request
Definition: IfxVadc.h:415
IfxVadc_getBackgroundScanSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
Gets the requested background scan slot start mode.
Definition: IfxVadc.h:1867
float32
float float32
Definition: Platform_Types.h:167
IfxVadc_setChannelLimitCheckMode
IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
Sets the channel event mode.
Definition: IfxVadc.h:2265
IfxVadc_Protection_initGroup6
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:348
IfxVadc_BoundarySelection_group1
Use group class 1.
Definition: IfxVadc.h:115
IfxVadc_ChannelId_13
Channel 13.
Definition: IfxVadc.h:138
IfxVadc_ChannelReference_channel0
use CH0 as reference
Definition: IfxVadc.h:148
IfxVadc_Status_queueFull
Queue is full.
Definition: IfxVadc.h:451
IfxVadc_isRequestQueueSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
Returns the queue slot requested status.
Definition: IfxVadc.h:2156
IfxVadc_PinMap.h
VADC I/O map.
IfxVadc_RequestSource_queue
8 stage Queue request
Definition: IfxVadc.h:413
IfxVadc_ChannelResult_11
Use Channel result 11.
Definition: IfxVadc.h:176
__minu
uint32 __minu(uint32, uint32) __attribute__((intrinsic_pseudo(3
IfxVadc_AnalogConverterMode_slowStandby
Slow Standby Mode.
Definition: IfxVadc.h:73
IfxVadc_InputClasses_global0
Use global class 0.
Definition: IfxVadc.h:300
IfxPort_setPinPadDriver
void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
Configure the pad driver mode.
Definition: IfxPort.c:323
IfxVadc_cfg.h
VADC on-chip implementation data.
IfxVadc_Emux_Out
VADC External Mux pin mapping structure.
Definition: IfxVadc_PinMap.h:48
IfxVadc_SrcNr_shared0
Select shared service request line 0.
Definition: IfxVadc.h:435
IfxVadc_setBoundaryMode
IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
Selects boundary extension.
Definition: IfxVadc.h:2239
IfxVadc_isRequestScanSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
Returns the scan slot requested status.
Definition: IfxVadc.h:2162
IfxVadc_GatingSource_12
Input signal REQGTx_12.
Definition: IfxVadc.h:288
IfxVadc_BoundaryExtension_fastCompareResult1
Fast compare mode use as upper boundary Channel result 1.
Definition: IfxVadc.h:93
IfxVadc_setQueueSlotGatingConfig
IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the gating configurations.
Definition: IfxVadc.h:2351
IfxScuWdt_clearCpuEndinit
void IfxScuWdt_clearCpuEndinit(uint16 password)
SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:172
IfxVadc_ChannelId_6
Channel 6.
Definition: IfxVadc.h:131
IfxVadc_ChannelResolution
IfxVadc_ChannelResolution
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
Definition: IfxVadc.h:153
IfxVadc_disablePostCalibration
IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration.
Definition: IfxVadc.c:72
IfxVadc_GatingSource_9
Input signal REQGTx_9.
Definition: IfxVadc.h:285
IfxVadc_FifoMode
IfxVadc_FifoMode
FIFO mode enable.
Definition: IfxVadc.h:254
IfxVadc_TriggerMode
IfxVadc_TriggerMode
trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
Definition: IfxVadc.h:458
IfxVadc_getEmuxGlobalResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution
Definition: IfxVadc.h:1931
IfxVadc_Protection_initGroup14
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:356
IfxVadc_getBackgroundScanSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
Gets the requested background scan slot priority.
Definition: IfxVadc.h:1861
IfxVadc_TriggerSource_4
Input signal REQTRx_4.
Definition: IfxVadc.h:474
IfxVadc_EmuxSelectValue_3
Start Selection Value 3.
Definition: IfxVadc.h:234
IfxVadc_getGlobalResult
IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
return conversion result stored in the Global result Register
Definition: IfxVadc.h:1969
IfxVadc_BoundarySelection_global1
Use global class 1.
Definition: IfxVadc.h:117
IfxVadc_EmuxInterface_0
Emux Interface 0.
Definition: IfxVadc.h:213
IfxVadc_Protection_serviceGroup10
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:368
IfxVadc_SrcNr_shared1
Select shared service request line 1.
Definition: IfxVadc.h:436
IfxCpu_Intrinsics.h
IfxVadc_EmuxCodingScheme_binary
Output the Channel Number in Binary code.
Definition: IfxVadc.h:205
IfxVadc_Protection_resultRegisterGroup0
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:374
IfxVadc_setEmuxGroupResolution
IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of ADC input class
Definition: IfxVadc.h:2283
IfxVadc_setMasterIndex
IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
Sets the master index.
Definition: IfxVadc.h:2344
IfxVadc_RequestSource
IfxVadc_RequestSource
Request sources.
Definition: IfxVadc.h:411
IfxVadc_ChannelResolution_10bit
10-bit conversion
Definition: IfxVadc.h:156
IfxVadc_BoundaryExtension_fastCompareResult13
Fast compare mode use as upper boundary Channel result 13.
Definition: IfxVadc.h:105
IfxVadc_TriggerSource_7
Input signal REQTRx_7.
Definition: IfxVadc.h:477
IfxVadc_Protection_channelControl1
Access control for GxCHCTR1.
Definition: IfxVadc.h:327
IfxVadc_ExternalMultiplexerMode_sequence
Select Sequence Mode.
Definition: IfxVadc.h:249
IfxVadc_ChannelResult
IfxVadc_ChannelResult
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:163
IfxVadc_GatingMode
IfxVadc_GatingMode
gating mode defined in MODULE_VADC.BRSMR.ENGT
Definition: IfxVadc.h:264
IfxVadc_BoundarySelection
IfxVadc_BoundarySelection
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:112
IfxVadc_LowSupplyVoltageSelect_3V
3.3V Power Supply is Connected
Definition: IfxVadc.h:319
IfxVadc_setArbitrationRoundLength
IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
Sets the arbiter round length.
Definition: IfxVadc.h:2180
IfxVadc_getScanSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
Gets the request scan slot priority.
Definition: IfxVadc.h:2088
IfxVadc_EmuxSampleTimeControl_settingChanges
Use STCE Whenever Setting Changes.
Definition: IfxVadc.h:222
IfxVadc_LimitCheck_eventIfInArea
Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result swi...
Definition: IfxVadc.h:309
IfxVadc_ChannelSelectionStyle_channelNumber
selects an arbitrary channel
Definition: IfxVadc.h:188
IfxVadc_setGlobalResolution
IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the channel conversion mode.
Definition: IfxVadc.h:2308
IfxVadc_ChannelId_9
Channel 9.
Definition: IfxVadc.h:134
IfxVadc_Protection_initGroup9
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:351
IfxVadc_setAutoScan
IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
Enables/Disables continuous auto scan.
Definition: IfxVadc.h:2192
IfxVadc_getGroupResult
IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxVadc.h:1998
IfxVadc_ChannelId_10
Channel 10.
Definition: IfxVadc.h:135
IfxVadc_ExternalMultiplexerMode_singleStep
Select single step mode.
Definition: IfxVadc.h:248
IfxVadc_setBackgroundScan
IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
configures a background scan; can also stop autoscan if all channels are 0
Definition: IfxVadc.h:2210
IfxVadc_ChannelResult_5
Use Channel result 5.
Definition: IfxVadc.h:170
IfxVadc_ArbitrationRounds_8_slots
An arbitration round contains 8 arbitration slots.
Definition: IfxVadc.h:83
IfxScuWdt.h
SCU basic functionality.
IfxVadc_setScan
IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan.
Definition: IfxVadc.c:534
IfxVadc_Protection_channelControl0
Access control for GxCHCTR0.
Definition: IfxVadc.h:326
IfxVadc_Protection_channelControl5
Access control for GxCHCTR5.
Definition: IfxVadc.h:331
IfxVadc_BoundaryExtension_fastCompareResult14
Fast compare mode use as upper boundary Channel result 14.
Definition: IfxVadc.h:106
IfxVadc_enableGroupSync
IFX_EXTERN void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num)
Enables the CCU6 based ADC group synchronisation as workaround for Erratum ADC_TC.068.
Definition: IfxVadc.c:112
IfxVadc_EmuxCodingScheme_gray
Output the channel number in gray code.
Definition: IfxVadc.h:206
IfxVadc_resetGroup
IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
Resets the ADC group.
Definition: IfxVadc.h:2168
IfxVadc_TriggerSource_6
Input signal REQTRx_6.
Definition: IfxVadc.h:476
IfxVadc_BoundaryExtension_fastCompareResult3
Fast compare mode use as upper boundary Channel result 3.
Definition: IfxVadc.h:95
IfxVadc_ChannelResult_12
Use Channel result 12.
Definition: IfxVadc.h:177
IfxVadc_setBackgroundResultTarget
IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
Sets the target for result background source.
Definition: IfxVadc.h:2204
IfxVadc_FifoMode_minimumMode
copy new result if it is smaller
Definition: IfxVadc.h:259
IfxVadc_EmuxSampleTimeControl
IfxVadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxVadc.h:220
IfxScuWdt_getCpuWatchdogPassword
uint16 IfxScuWdt_getCpuWatchdogPassword(void)
SCUWDT API to fetch current password of CPU Watchdog module.
Definition: IfxScuWdt.c:224
IfxVadc_GatingSource_2
Input signal REQGTx_2.
Definition: IfxVadc.h:278
IfxVadc_setGroupSampleTime
IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time.
Definition: IfxVadc.h:2332
IfxVadc_setArbiterPriority
IFX_EXTERN void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxVadc.c:510
IfxVadc_Protection_channelControl12
Access control for GxCHCTR12.
Definition: IfxVadc.h:338
IfxVadc_startScan
IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
Starts an autoscan on the specified group.
Definition: IfxVadc.h:2454
IfxVadc_Status_invalidChannel
Invalid channel number.
Definition: IfxVadc.h:450
IfxVadc_BoundarySelection_group0
Use group class 0.
Definition: IfxVadc.h:114
IfxVadc_TriggerMode_noExternalTrigger
No external trigger.
Definition: IfxVadc.h:460
IfxVadc_Protection_channelControl6
Access control for GxCHCTR6.
Definition: IfxVadc.h:332
IfxVadc_enableScanSlotExternalTrigger
IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
Enables the scan slot external trigger.
Definition: IfxVadc.h:1815
IfxVadc_getQueueSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot start mode.
Definition: IfxVadc.h:2048
IfxVadc_setBackgroundPriorityChannel
IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets the channels with low priority as background channel.
Definition: IfxVadc.h:2198
IfxVadc_EmuxSelectValue_7
Start Selection Value 7.
Definition: IfxVadc.h:238
IfxVadc_GatingSource_6
Input signal REQGTx_6.
Definition: IfxVadc.h:282
IfxVadc_Emux_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxVadc_PinMap.h:51
IfxVadc_EmuxSelectValue_4
Start Selection Value 4.
Definition: IfxVadc.h:235
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxVadc_setQueueSlotTriggerOperatingConfig
IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the trigger operating configurations.
Definition: IfxVadc.h:2362
IfxVadc_ChannelResult_15
Use Channel result 15.
Definition: IfxVadc.h:180
IfxVadc_getBackgroundScanGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
Gets the background scan gating mode.
Definition: IfxVadc.h:1849
IfxVadc_Protection_channelControl14
Access control for GxCHCTR14.
Definition: IfxVadc.h:340
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxVadc_BoundaryExtension_fastCompareResult11
Fast compare mode use as upper boundary Channel result 11.
Definition: IfxVadc.h:103
IfxVadc_TriggerSource_12
Input signal REQTRx_12.
Definition: IfxVadc.h:482
IfxVadc_Protection_serviceGroup13
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:371
IfxVadc_setScanSlotGatingConfig
IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the scan slot gating configuration.
Definition: IfxVadc.h:2399
IfxVadc_ChannelId_5
Channel 5.
Definition: IfxVadc.h:130
IfxVadc_Protection_resultRegisterGroup9
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:383
IfxVadc_Protection_resultRegisterGroup11
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:385
IfxVadc_EmuxInterface
IfxVadc_EmuxInterface
Specifies the Emux interface.
Definition: IfxVadc.h:211
IfxVadc_AnalogConverterMode_normalOperation
Normal operation mode.
Definition: IfxVadc.h:75
IfxVadc_initEmuxPin
IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output.
Definition: IfxVadc.h:2118
IfxVadc_TriggerSource_3
Input signal REQTRx_3.
Definition: IfxVadc.h:473
IfxVadc_EmuxSelectValue_0
Start Selection Value 0.
Definition: IfxVadc.h:231
IfxVadc_Protection_globalConfig
Access control for GLOBCFG.
Definition: IfxVadc.h:357
IfxVadc_Protection_serviceGroup0
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:358
IfxVadc_TriggerSource_2
Input signal REQTRx_2.
Definition: IfxVadc.h:472
IfxVadc_InputClasses
IfxVadc_InputClasses
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxVadc.h:296
IfxVadc_RequestSlotPriority
IfxVadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:393
IfxVadc_setBackgroundScanSlotGatingConfig
IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the background scan slot gating configurations.
Definition: IfxVadc.h:2217
IfxVadc_ExternalMultiplexerMode
IfxVadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxVadc.h:244
IfxVadc_Protection_serviceGroup12
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:370
IfxVadc_Protection_channelControl11
Access control for GxCHCTR11.
Definition: IfxVadc.h:337
IfxVadc_setGroupPriorityChannel
IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets channel as priority channel with in the group.
Definition: IfxVadc.h:2320
IfxVadc_startQueue
IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxVadc.h:2448
IfxVadc_GatingSource_10
Input signal REQGTx_10.
Definition: IfxVadc.h:286
IfxVadc_TriggerSource_9
Input signal REQTRx_9.
Definition: IfxVadc.h:479
IfxVadc_getSrcAddress
IFX_EXTERN volatile Ifx_SRC_SRCR * IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address.
Definition: IfxVadc.c:350
IfxVadc_getQueueSlotTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger input.
Definition: IfxVadc.h:2054
IfxVadc_BoundaryExtension_fastCompareResult12
Fast compare mode use as upper boundary Channel result 12.
Definition: IfxVadc.h:104
IfxVadc_GatingSource_14
Input signal REQGTx_14.
Definition: IfxVadc.h:290
IfxVadc_Protection_serviceGroup11
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:369
IfxVadc_setAutoBackgroundScan
IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
Enables/Disables continuous background auto scan.
Definition: IfxVadc.h:2186
IfxVadc_getStartupCalibration
IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
get SUCAL bit field status
Definition: IfxVadc.h:2112
IfxVadc_ExternalMultiplexerMode_softwareControl
Disable The Emux Control.
Definition: IfxVadc.h:246
IfxVadc_LimitCheck_always
Normal compare mode Event Always Fast Compare mode Event Always.
Definition: IfxVadc.h:311
IfxVadc_setResultNodeEventPointer1
IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 1.
Definition: IfxVadc.h:2386
IfxVadc_LowSupplyVoltageSelect
IfxVadc_LowSupplyVoltageSelect
Low Power Supply Voltage Select.
Definition: IfxVadc.h:316
IfxVadc_setBackgroundScanSlotTriggerConfig
IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the background scan exteranal trigger operating configurations.
Definition: IfxVadc.h:2228
IfxVadc_EmuxSelectValue_2
Start Selection Value 2.
Definition: IfxVadc.h:233
IfxVadc_TriggerMode_uponRisingEdge
Trigger event upon a rising edge.
Definition: IfxVadc.h:462
IfxVadc_ChannelResult_3
Use Channel result 3.
Definition: IfxVadc.h:168
IfxVadc_SleepMode_enable
enables sleep mode
Definition: IfxVadc.h:423
IfxPort_Pin::pinIndex
uint8 pinIndex
Definition: IfxPort.h:173
IfxVadc_getBackgroundScanStatus
IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
Gives the background scan status for a group.
Definition: IfxVadc.c:181
IfxVadc_Protection
IfxVadc_Protection
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U.
Definition: IfxVadc.h:324
IfxVadc_Protection_resultRegisterGroup10
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:384
IfxVadc_Protection_initGroup13
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:355
IfxVadc_EmuxSelectValue_6
Start Selection Value 6.
Definition: IfxVadc.h:237
IfxVadc_initialiseAdcArbiterClock
IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider)
Initialises ADC arbiter clock.
Definition: IfxVadc.c:378
IfxVadc_setResultNodeEventPointer0
IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 0.
Definition: IfxVadc.h:2379
IfxVadc_ArbitrationRounds_4_slots
An arbitration round contains 4 arbitration slots.
Definition: IfxVadc.h:82
IfxVadc_Protection_initGroup3
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:345
IfxVadc_Protection_serviceGroup3
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:361
IfxVadc_TriggerSource_14
Input signal REQTRx_14.
Definition: IfxVadc.h:484
IfxVadc_getScanSlotGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
Gets the request scan slot gating input.
Definition: IfxVadc.h:2082
IfxVadc_ChannelResult_4
Use Channel result 4.
Definition: IfxVadc.h:169
IfxVadc_Protection_serviceGroup7
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:365
IfxVadc_Protection_serviceGroup14
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:372
IfxVadc_addToQueue
IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxVadc.h:1713
IfxVadc_Protection_resultRegisterGroup5
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:379
IfxVadc_EmuxSampleTimeControl_always
Use STCE for each conversion of an external channel.
Definition: IfxVadc.h:223
IfxVadc_FifoMode_maximumMode
copy new result if bigger
Definition: IfxVadc.h:258
IfxVadc_ChannelId_15
Channel 15.
Definition: IfxVadc.h:140
IfxVadc_ChannelId_14
Channel 14.
Definition: IfxVadc.h:139
IfxVadc_getBackgroundScanTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
Gets the background scan external trigger mode.
Definition: IfxVadc.h:1879
IfxVadc_Protection_initGroup10
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:352
IfxVadc_setGlobalSampleTime
IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class.
Definition: IfxVadc.h:2314
IfxVadc_Protection_channelControl9
Access control for GxCHCTR9.
Definition: IfxVadc.h:335
IfxVadc_initializeFAdcI
IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock.
Definition: IfxVadc.c:418
IfxVadc_EmuxSelectValue
IfxVadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxVadc.h:229
IfxVadc_setEmuxGroupSampletime
IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time for external channel.
Definition: IfxVadc.h:2289
IfxVadc_Status_invalidGroup
Invalid group number.
Definition: IfxVadc.h:449
IfxVadc_getQueueSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
Gets the request queue slot priority.
Definition: IfxVadc.h:2042
IfxVadc_InputClasses_global1
Use global class 1.
Definition: IfxVadc.h:301
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxVadc_Protection_channelControl2
Access control for GxCHCTR2.
Definition: IfxVadc.h:328
IfxVadc_getScanSlotGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
Gets the request scan slot gating mode.
Definition: IfxVadc.h:2076
IfxVadc_TriggerSource_0
Input signal REQTRx_0.
Definition: IfxVadc.h:470
IfxVadc_BoundaryExtension
IfxVadc_BoundaryExtension
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:90
IfxVadc_Protection_testFunction
Access control for GLOBTF.
Definition: IfxVadc.h:373
IfxVadc_Status_noError
No error during api execution.
Definition: IfxVadc.h:447
IfxVadc_SrcNr_group0
service request line 0 of group
Definition: IfxVadc.h:431
IfxVadc_RequestSource_scan
scan request
Definition: IfxVadc.h:414
IfxVadc_getDebugResult
IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx)
Get debug conversion result.
Definition: IfxVadc.h:2466
IfxVadc_isAutoBackgroundScanEnabled
IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
Returns the auto background scan status.
Definition: IfxVadc.h:2138
IfxVadc_BoundaryExtension_fastCompareResult9
Fast compare mode use as upper boundary Channel result 9.
Definition: IfxVadc.h:101
IfxVadc_enableModule
IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
Enable VADC kernel.
Definition: IfxVadc.h:1799
IfxVadc_clearChannelRequest
IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
Clears the channel request.
Definition: IfxVadc.h:1742
IfxVadc_calculateSampleTime
IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
Calculate the time using analog frequency.
Definition: IfxVadc.h:1719
IfxVadc_getGlobalResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution
Definition: IfxVadc.h:1963
IfxVadc_Status_channelsStillPending
Conversion for some of the channels are still pending.
Definition: IfxVadc.h:453
IfxVadc_startupCalibration
IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxVadc.c:542
IfxVadc_enableFifoMode
IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
Enables the FIFO mode.
Definition: IfxVadc.h:1793
IFXVADC_SAMPLETIME_MIN
#define IFXVADC_SAMPLETIME_MIN
Definition: IfxVadc_cfg.h:85
IfxVadc_getScanStatus
IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
Gives the scan status for a group.
Definition: IfxVadc.c:335
IfxVadc_Protection_serviceGroup4
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:362
IfxVadc_GatingMode_disabled
Gating is disabled, no conversion request are issued.
Definition: IfxVadc.h:266
u
uint32 min u
Definition: IfxCpu_IntrinsicsDcc.h:126
IfxVadc_getMasterIndex
IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
Gets the configured master index.
Definition: IfxVadc.h:2022
IfxVadc_Protection_initGroup12
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:354
IfxVadc_ConversionType_Compatible
Compatible Timing Mode.
Definition: IfxVadc.h:197
uint16
unsigned short uint16
Definition: Platform_Types.h:109
IfxVadc_ChannelResult_7
Use Channel result 7.
Definition: IfxVadc.h:172
IfxVadc_getChannelInputClass
IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the channel input class.
Definition: IfxVadc.h:1893
IfxVadc_SrcNr_group1
service request line 1 of group
Definition: IfxVadc.h:432
IfxVadc_disableModule
IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
Disable VADC Module.
Definition: IfxVadc.h:1766
IfxVadc_ChannelResult_8
Use Channel result 8.
Definition: IfxVadc.h:173
IfxVadc_isPostCalibration
IFX_EXTERN boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group)
Return the post calibration status.
Definition: IfxVadc.c:455
IfxVadc_GatingSource_5
Input signal REQGTx_5.
Definition: IfxVadc.h:281
IfxVadc_getBackgroundScanGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
Gets the gating input selection.
Definition: IfxVadc.h:1855
IfxVadc_setAnalogConvertControl
IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number.
Definition: IfxVadc.h:2174
IfxVadc_TriggerSource
IfxVadc_TriggerSource
Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxVadc.h:468
IfxVadc_SrcNr_shared3
Select shared service request line 3.
Definition: IfxVadc.h:438
IfxVadc_getEmuxGroupResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
get the external channel resolution
Definition: IfxVadc.h:1943
IfxVadc_getResult
IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.h:2066
IfxVadc_getChannelResultServiceRequestNodePointer1
IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 1.
Definition: IfxVadc.h:1907
IfxVadc_ChannelResult_14
Use Channel result 14.
Definition: IfxVadc.h:179
IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure.
Definition: IfxVadc_PinMap.h:39
IfxVadc_GatingSource_11
Input signal REQGTx_11.
Definition: IfxVadc.h:287
IfxVadc_getChannelServiceRequestNodePointer0
IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
Gets the channel service request node pointer.
Definition: IfxVadc.h:1915
IfxVadc_EmuxSelectValue_1
Start Selection Value 1.
Definition: IfxVadc.h:232
IfxVadc_setChannelInputClass
IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
Sets the channel input class.
Definition: IfxVadc.h:2259
IfxVadc_BoundaryExtension_fastCompareResult10
Fast compare mode use as upper boundary Channel result 10.
Definition: IfxVadc.h:102
IfxVadc_SleepMode
IfxVadc_SleepMode
Enable/disable the sensitivity of the module to sleep signal Definition in Ifx_VADC.CLC.B.EDIS.
Definition: IfxVadc.h:421
IfxVadc_setUpperBoundary
IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
Sets group&#39;s upper boundary.
Definition: IfxVadc.h:2436
IfxVadc_getScanSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
Gets the request scan slot start mode.
Definition: IfxVadc.h:2094
IfxVadc_BoundaryExtension_fastCompareResult2
Fast compare mode use as upper boundary Channel result 2.
Definition: IfxVadc.h:94
IfxVadc_LimitCheck
IfxVadc_LimitCheck
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:306
IfxVadc_Protection_serviceGroup2
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:360
IfxVadc_ChannelResolution_10bitFast
10-bit cfast compare mode
Definition: IfxVadc.h:158
IfxVadc_GatingSource_7
Input signal REQGTx_7.
Definition: IfxVadc.h:283
IfxVadc_ChannelResult_13
Use Channel result 13.
Definition: IfxVadc.h:178
IfxVadc_ChannelId_3
Channel 3.
Definition: IfxVadc.h:128
IfxVadc_Protection_channelControl3
Access control for GxCHCTR3.
Definition: IfxVadc.h:329
IfxVadc_Protection_externalMultiplexer
Access control for EMUXSEL, GxEMUXCTR.
Definition: IfxVadc.h:341
IfxVadc_BoundaryExtension_fastCompareResult6
Fast compare mode use as upper boundary Channel result 6.
Definition: IfxVadc.h:98
IfxVadc_ChannelResult_2
Use Channel result 2.
Definition: IfxVadc.h:167
IfxScuCcu.h
SCU basic functionality.
IfxVadc_GatingMode_always
Conversion request is issued if at least 1 conversion pending bit is set.
Definition: IfxVadc.h:267
IfxVadc_getGlobalSampleTime
IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
get global input class sample time in sec
Definition: IfxVadc.h:1979
IfxVadc_setSleepMode
IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
Sets the sensitivity of the module to sleep signal.
Definition: IfxVadc.h:2421
IfxVadc_getScanSlotTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger input.
Definition: IfxVadc.h:2100
IfxVadc_Protection_channelControl8
Access control for GxCHCTR8.
Definition: IfxVadc.h:334
IfxVadc_Protection_resultRegisterGroup14
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:388
IfxPort_Pin::port
Ifx_P * port
Definition: IfxPort.h:172
IfxVadc_Protection_initGroup11
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:353
IfxVadc_InputClasses_group1
Use group class 1.
Definition: IfxVadc.h:299
IfxVadc_initGxBflPin
IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a GxBFL output.
Definition: IfxVadc.h:2125
IfxVadc_setResultPosition
IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position.
Definition: IfxVadc.h:2393
IfxVadc_TriggerMode_uponFallingEdge
Trigger event upon a falling edge.
Definition: IfxVadc.h:461
IfxVadc_getAdcCalibrationActiveState
IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
gets ADC Calibration Flag CAL status.
Definition: IfxVadc.h:1827
IfxVadc_GatingMode_gatingLow
Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low...
Definition: IfxVadc.h:269
IfxVadc_enableServiceRequest
IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
Definition: IfxVadc.h:1821
IfxVadc_getAdcAnalogFrequency
IFX_EXTERN float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz.
Definition: IfxVadc.c:163
IfxVadc_ChannelResolution_12bit
12-bit conversion
Definition: IfxVadc.h:155
IfxVadc_configExternalMultiplexerMode
IFX_EXTERN void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
Definition: IfxVadc.c:35
IfxVadc_ChannelId_4
Channel 4.
Definition: IfxVadc.h:129
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:99
IfxVadc_RequestSlotStartMode
IfxVadc_RequestSlotStartMode
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:403
IfxVadc_getGlobalConfigValue
IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
Gets the global control configuration value.
Definition: IfxVadc.h:1955
IfxVadc_ChannelReference_standard
use Varef as reference
Definition: IfxVadc.h:147
IfxVadc_EmuxInterface_1
Emux Interface 1.
Definition: IfxVadc.h:214
IfxVadc_getScanSlotTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger mode.
Definition: IfxVadc.h:2106
IfxVadc_ArbitrationRounds_20_slots
An arbitration round contains 20 arbitration slots.
Definition: IfxVadc.h:85
IfxVadc_Protection_resultRegisterGroup8
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:382
IfxVadc_Protection_initGroup5
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:347
IfxVadc_enableBackgroundScanSlotExternalTrigger
IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
Enables the background sacn external trigger.
Definition: IfxVadc.h:1787
IfxVadc_BoundaryExtension_standard
Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
Definition: IfxVadc.h:92
IfxVadc_Protection_resultRegisterGroup4
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:378
IfxVadc_SrcNr_group3
service request line 3 of group
Definition: IfxVadc.h:434
IfxVadc_setScanSlotTriggerConfig
IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the scan slot trigger operating configurations.
Definition: IfxVadc.h:2410
IfxVadc_LowSupplyVoltageSelect_5V
5V Power Supply is Connected
Definition: IfxVadc.h:318
IfxVadc_Protection_resultRegisterGroup12
Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15)
Definition: IfxVadc.h:386
IfxVadc_ChannelId_12
Channel 12.
Definition: IfxVadc.h:137
IfxVadc_Protection_serviceGroup8
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:366
IfxVadc_TriggerSource_1
Input signal REQTRx_1.
Definition: IfxVadc.h:471
IfxVadc_Status_notInitialised
Appropriate initialisation not done.
Definition: IfxVadc.h:448
IfxVadc_Protection_channelControl13
Access control for GxCHCTR13.
Definition: IfxVadc.h:339
IfxVadc_ChannelResult_6
Use Channel result 6.
Definition: IfxVadc.h:171
IfxScuWdt_setCpuEndinit
void IfxScuWdt_setCpuEndinit(uint16 password)
SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
Definition: IfxScuWdt.c:401
IfxVadc_ChannelResult_0
Use Channel result 0.
Definition: IfxVadc.h:165
IfxVadc_AnalogConverterMode
IfxVadc_AnalogConverterMode
Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC.
Definition: IfxVadc.h:70
IfxVadc_getQueueSlotTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger mode.
Definition: IfxVadc.h:2060
IfxVadc_AnalogConverterMode_fastStandby
Fast Standby Mode.
Definition: IfxVadc.h:74
IfxVadc_getChannelControlConfig
IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the current ADC channel control configurations.
Definition: IfxVadc.h:1885
IfxVadc_getQueueSlotGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot gating mode.
Definition: IfxVadc.h:2030
IfxVadc_disableScanSlotExternalTrigger
IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
Disables the scan slot external trigger.
Definition: IfxVadc.h:1781
IfxVadc_getAdcModuleFrequency
IFX_EXTERN float32 IfxVadc_getAdcModuleFrequency(void)
Module Frequency in Hz.
Definition: IfxVadc.c:175
IfxVadc_Status
IfxVadc_Status
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx
Definition: IfxVadc.h:445
IfxVadc_Protection_initGroup7
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:349
IfxVadc_setLowerBoundary
IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
Sets group&#39;s lower boundary.
Definition: IfxVadc.h:2338
IfxVadc_enableQueueSlotExternalTrigger
IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
Enables the external trigger.
Definition: IfxVadc.h:1809
IfxVadc_isAutoScanEnabled
IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
Gets the auto scan enable status.
Definition: IfxVadc.h:2144
IfxVadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxVadc.h:405
IfxVadc_getGroupSampleTime
IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class channel sample time.
Definition: IfxVadc.h:2009
IfxVadc_Protection_serviceGroup1
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:359
IfxVadc_getChannelConversionTime
IFX_EXTERN float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing
Definition: IfxVadc.c:202
IfxVadc_resetKernel
IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc)
Resets the kernel.
Definition: IfxVadc.c:477
IfxVadc_Protection_serviceGroup9
Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT.
Definition: IfxVadc.h:367
IfxVadc_GatingSource_1
Input signal REQGTx_1.
Definition: IfxVadc.h:277
IfxVadc_GatingSource_15
Input signal REQGTx_15.
Definition: IfxVadc.h:291
IfxVadc_RequestSlotStartMode_cancelInjectRepeat
Cancel-Inject-Repeat.
Definition: IfxVadc.h:406
IfxVadc_clearQueue
IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage.
Definition: IfxVadc.h:1748
IfxVadc_BoundaryExtension_fastCompareResult7
Fast compare mode use as upper boundary Channel result 7.
Definition: IfxVadc.h:99
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:448
IfxVadc_TriggerSource_8
Input signal REQTRx_8.
Definition: IfxVadc.h:478
IfxVadc_RequestSlotPriority_highest
Highest priority.
Definition: IfxVadc.h:398
IfxVadc_ChannelId_none
None of VADC channels.
Definition: IfxVadc.h:124
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxVadc_ExternalMultiplexerMode_steady
select steady mode
Definition: IfxVadc.h:247
IfxVadc_ChannelId_8
Channel 8.
Definition: IfxVadc.h:133
IfxVadc_initialiseAdcConverterClock
IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider)
Initialises the ADC Converter clock.
Definition: IfxVadc.c:390
IfxVadc_GatingSource
IfxVadc_GatingSource
External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxVadc.h:274
IfxVadc_configureWaitForReadMode
IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
access function to enable/disable wait for read mode for result registers
Definition: IfxVadc.h:1754
IfxVadc_Emux_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxVadc_PinMap.h:52
IfxVadc_setSyncRequest
IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request.
Definition: IfxVadc.h:2430
IfxVadc_SrcNr
IfxVadc_SrcNr
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxVadc.h:429
IfxVadc_TriggerSource_11
Input signal REQTRx_11.
Definition: IfxVadc.h:481
IfxVadc_enableAccess
IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers.
Definition: IfxVadc.c:94
IfxPort_setPinModeOutput
IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
Configure the port input / output mode.
Definition: IfxPort.h:566
IfxVadc_Protection_initGroup0
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:342
IfxVadc_ChannelId_7
Channel 7.
Definition: IfxVadc.h:132
IfxVadc_TriggerSource_13
Input signal REQTRx_13.
Definition: IfxVadc.h:483
IfxVadc_setEmuxGlobalResolution
IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
set the external channel resolution of Global class
Definition: IfxVadc.h:2271
IfxVadc_initializeFAdcD
IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock.
Definition: IfxVadc.c:402
IfxVadc_AnalogConverterMode_off
Analog Converter off.
Definition: IfxVadc.h:72
IfxVadc_ChannelId_2
Channel 2.
Definition: IfxVadc.h:127
IfxVadc_getBackgroundScanTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
Gets the background scan trigger input.
Definition: IfxVadc.h:1873
IfxVadc_SleepMode_disable
disables sleep mode
Definition: IfxVadc.h:424
IfxVadc_GatingSource_13
Input signal REQGTx_13.
Definition: IfxVadc.h:289
IfxVadc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register
Definition: IfxVadc.h:1760
IfxVadc_Protection_initGroup2
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:344
IfxVadc_selectPowerSupplyVoltage
IFX_EXTERN void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage.
Definition: IfxVadc.c:498
IfxVadc_BoundaryExtension_fastCompareResult8
Fast compare mode use as upper boundary Channel result 8.
Definition: IfxVadc.h:100


iLLD_TC26B: IfxVadc_Adc.c Source File

  • Vadc
  • Adc
IfxVadc_Adc.c
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_Adc.c
3 * \brief VADC ADC details
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxVadc_Adc.h"
30
31 /** \addtogroup IfxLld_Vadc_Adc_Group
32 * \{ */
33 /******************************************************************************/
34 /*------------------------Inline Function Prototypes--------------------------*/
35 /******************************************************************************/
36
37 /** \brief Gets the master id
38 * \param slave Index of the group
39 * \param masterIndex master kernel index
40 * \return Master Group Id
41 */
42 IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId(IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex);
43
44 /** \brief Gets the current master kernel index.
45 * \param slave Index of the group
46 * \param master Index of the group
47 * \return current master kernel index
48 */
49 IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex(IfxVadc_GroupId slave, IfxVadc_GroupId master);
50
51 /** \} */
52
53 /** \addtogroup IfxLld_Vadc_Adc_Variables
54 * \{ */
55
56 /******************************************************************************/
57 /*------------------------Private Variables/Constants-------------------------*/
58 /******************************************************************************/
59
60 IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex[IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS] = {
61 /* 0 1 2 3 */
62 {0, 1, 2, 3}, /* Grp 0 */
63 {1, 0, 2, 3}, /* Grp 1 */
64 {1, 2, 0, 3}, /* Grp 2 */
65 {1, 2, 3, 0} /* Grp 3 */
66 };
67
68 /** \} */
69
70 /******************************************************************************/
71 /*---------------------Inline Function Implementations------------------------*/
72 /******************************************************************************/
73
74 IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId(IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
75 {
76 uint8 i, idxOffset;
77 IfxVadc_GroupId masterId = slave;
78
79 if (masterIndex == 0)
80 {
81 masterId = slave;
82 }
83 else
84 {
85 idxOffset = (slave < 4) ? 0 : 4; /* 4 is the index in the above IfxVadc_Adc_masterIndex about which symmetry is observed */
86
87 for (i = 0; i < 4; i++)
88 {
89 if (IfxVadc_Adc_masterIndex[slave][i + idxOffset] == masterIndex)
90 {
91 return (IfxVadc_GroupId)(i + idxOffset);
92 }
93 }
94 }
95
96 return masterId;
97 }
98
99
100 IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex(IfxVadc_GroupId slave, IfxVadc_GroupId master)
101 {
102 return IfxVadc_Adc_masterIndex[slave][master];
103 }
104
105
106 /******************************************************************************/
107 /*-------------------------Function Implementations---------------------------*/
108 /******************************************************************************/
109
110 void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group)
111 {
112 Ifx_VADC *vadc = IfxVadc_Adc_getVadcFromGroup(group);
113 Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(group);
114 /* Get group index */
115 IfxVadc_GroupId groupIndex = group->groupId;
116
117 /* Request Access to configuration registers */
118 IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
119 IfxVadc_resetGroup(vadcG);
120 IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
121 }
122
123
124 void IfxVadc_Adc_disableModule(Ifx_VADC *vadc)
125 {
126 IfxVadc_disableModule(vadc);
127 }
128
129
130 void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
131 {
132 Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(channel->group);
133 IfxVadc_ChannelId channelIndex = channel->channel;
134
135 config->channelId = channel->channel;
136 config->group = channel->group;
137
138 Ifx_VADC_CHCTR tempChctr;
139 tempChctr.U = 0;
140 tempChctr = IfxVadc_getChannelControlConfig(vadcG, channelIndex);
141
142 config->inputClass = (IfxVadc_InputClasses)tempChctr.B.ICLSEL;
143 config->reference = (IfxVadc_ChannelReference)tempChctr.B.REFSEL;
144 config->resultRegister = (IfxVadc_ChannelResult)tempChctr.B.RESREG;
145 config->globalResultUsage = tempChctr.B.RESTBS;
146 config->lowerBoundary = (IfxVadc_BoundarySelection)tempChctr.B.BNDSELL;
147 config->upperBoundary = (IfxVadc_BoundarySelection)tempChctr.B.BNDSELU;
148 config->boundaryMode = (IfxVadc_BoundaryExtension)tempChctr.B.BNDSELX;
149 config->limitCheck = (IfxVadc_LimitCheck)tempChctr.B.CHEVMODE;
150 config->synchonize = tempChctr.B.SYNC;
151 config->rightAlignedStorage = tempChctr.B.RESPOS;
152
153 config->backgroundChannel = ((IfxVadc_getAssignedChannels(vadcG)).U & (1 << channelIndex)) ? FALSE : TRUE;
154 uint32 channelServiceRequestNodePtr;
155 /* Get Channel index */
156 IfxVadc_GroupId groupIndex = channel->group->groupId;
157
158 if (config->channelId < IfxVadc_ChannelId_8)
159 {
160 channelServiceRequestNodePtr = ((IfxVadc_getChannelServiceRequestNodePointer0(vadcG)).U >> (channel->channel * 4)) & 0xF;
161 }
162 else
163 {
164 channelServiceRequestNodePtr = ((IfxVadc_getChannelServiceRequestNodePointer1(vadcG)).U >> ((channel->channel - IfxVadc_ChannelId_8) * 4)) & 0xF;
165 }
166
167 volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, (IfxVadc_SrcNr)channelServiceRequestNodePtr);
168
169 if (src->B.SRE == 1)
170 {
171 config->channelSrcNr = (IfxVadc_SrcNr)channelServiceRequestNodePtr;
172 config->channelPriority = (Ifx_Priority)src->B.SRPN;
173 config->channelServProvider = (IfxSrc_Tos)src->B.TOS;
174 }
175 else
176 {
177 config->channelSrcNr = (IfxVadc_SrcNr)0;
178 config->channelPriority = (Ifx_Priority)0;
179 config->channelServProvider = (IfxSrc_Tos)0;
180 }
181
182 uint32 resultServiceRequestNodePtr;
183
184 if (config->resultRegister < IfxVadc_ChannelResult_8)
185 {
186 resultServiceRequestNodePtr = ((IfxVadc_getChannelResultServiceRequestNodePointer0(vadcG)).U >> (channel->channel * 4)) & 0xF;
187 }
188 else
189 {
190 resultServiceRequestNodePtr = ((IfxVadc_getChannelResultServiceRequestNodePointer1(vadcG)).U >> ((channel->channel - IfxVadc_ChannelResult_8) * 4)) & 0xF;
191 }
192
193 src = IfxVadc_getSrcAddress(groupIndex, resultServiceRequestNodePtr);
194
195 if (src->B.SRE == 1)
196 {
197 config->resultSrcNr = (IfxVadc_SrcNr)resultServiceRequestNodePtr;
198 config->resultPriority = (Ifx_Priority)src->B.SRPN;
199 config->resultServProvider = (IfxSrc_Tos)src->B.TOS;
200 }
201 else
202 {
203 config->resultSrcNr = (IfxVadc_SrcNr)0;
204 config->resultPriority = (Ifx_Priority)0;
205 config->resultServProvider = (IfxSrc_Tos)0;
206 }
207 }
208
209
210 float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
211 {
212 return IfxVadc_getChannelConversionTime(channel->group->module.vadc, channel->group->groupId, IfxVadc_getChannelInputClass(channel->group->group, channel->channel), IfxVadc_getAdcAnalogFrequency(channel->group->module.vadc), IfxVadc_getAdcModuleFrequency(), conversionMode);
213 }
214
215
216 void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
217 {
218 uint8 inputClassNum;
219 Ifx_VADC_G *vadcG = group->group;
220 Ifx_VADC *vadc = group->module.vadc;
221 float32 analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc);
222
223 config->groupId = group->groupId;
224 config->module = &group->module;
225
226 config->arbiter.arbiterRoundLength = IfxVadc_getArbiterRoundLength(vadcG);
227
228 for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_INPUTCLASSES; inputClassNum++)
229 {
230 config->inputClass[inputClassNum].resolution = IfxVadc_getGroupResolution(vadcG, inputClassNum);
231 config->inputClass[inputClassNum].sampleTime = IfxVadc_getGroupSampleTime(vadcG, inputClassNum, analogFrequency);
232 }
233
234 if (IfxVadc_isRequestScanSlotEnabled(vadcG) == TRUE)
235 {
236 config->arbiter.requestSlotScanEnabled = TRUE;
237 config->scanRequest.requestSlotPrio = IfxVadc_getScanSlotPriority(vadcG);
238 config->scanRequest.requestSlotStartMode = IfxVadc_getScanSlotStartMode(vadcG);
239
240 config->scanRequest.triggerConfig.triggerSource = IfxVadc_getScanSlotTriggerInput(vadcG);
241 config->scanRequest.triggerConfig.triggerMode = IfxVadc_getScanSlotTriggerMode(vadcG);
242
243 if (config->scanRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
244 {
245 config->scanRequest.triggerConfig.gatingMode = IfxVadc_getScanSlotGatingMode(vadcG);
246 }
247 else if (config->scanRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
248 {
249 config->scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
250 }
251
252 config->scanRequest.triggerConfig.gatingSource = IfxVadc_getScanSlotGatingSource(vadcG);
253 config->scanRequest.autoscanEnabled = IfxVadc_isAutoScanEnabled(vadcG);
254 }
255 else
256 {
257 config->scanRequest.autoscanEnabled = FALSE;
258 config->scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
259 config->scanRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
260 config->scanRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
261 config->scanRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
262 }
263
264 if (IfxVadc_isRequestQueueSlotEnabled(vadcG) == TRUE)
265 {
266 config->arbiter.requestSlotQueueEnabled = TRUE;
267 config->queueRequest.requestSlotPrio = IfxVadc_getQueueSlotPriority(vadcG);
268 config->queueRequest.requestSlotStartMode = IfxVadc_getQueueSlotStartMode(vadcG);
269
270 config->queueRequest.triggerConfig.triggerSource = IfxVadc_getQueueSlotTriggerInput(vadcG);
271 config->queueRequest.triggerConfig.triggerMode = IfxVadc_getQueueSlotTriggerMode(vadcG);
272
273 if (config->queueRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
274 {
275 config->queueRequest.triggerConfig.gatingMode = IfxVadc_getQueueSlotGatingMode(vadcG);
276 }
277 else if (config->queueRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
278 {
279 config->queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
280 }
281
282 config->queueRequest.triggerConfig.gatingSource = IfxVadc_getQueueSlotGatingSource(vadcG);
283 config->queueRequest.flushQueueAfterInit = FALSE;
284 }
285 else
286 {
287 config->queueRequest.flushQueueAfterInit = FALSE;
288 config->queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
289 config->queueRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
290 config->queueRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
291 config->queueRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
292 }
293
294 if (IfxVadc_isRequestBackgroundScanSlotEnabled(vadcG) == TRUE)
295 {
296 config->arbiter.requestSlotBackgroundScanEnabled = TRUE;
297 config->backgroundScanRequest.requestSlotPrio = IfxVadc_getBackgroundScanSlotPriority(vadcG);
298 config->backgroundScanRequest.requestSlotStartMode = IfxVadc_getBackgroundScanSlotStartMode(vadcG);
299
300 config->backgroundScanRequest.triggerConfig.triggerSource = IfxVadc_getBackgroundScanTriggerInput(vadc);
301 config->backgroundScanRequest.triggerConfig.triggerMode = IfxVadc_getBackgroundScanTriggerMode(vadc);
302
303 if (config->backgroundScanRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
304 {
305 config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_getBackgroundScanGatingMode(vadc);
306 }
307 else if (config->backgroundScanRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
308 {
309 config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
310 }
311
312 config->backgroundScanRequest.triggerConfig.gatingSource = IfxVadc_getBackgroundScanGatingSource(vadc);
313 config->backgroundScanRequest.autoBackgroundScanEnabled = IfxVadc_isAutoBackgroundScanEnabled(vadc);
314 }
315 else
316 {
317 config->backgroundScanRequest.autoBackgroundScanEnabled = FALSE;
318 config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
319 config->backgroundScanRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
320 config->backgroundScanRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
321 config->backgroundScanRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
322 }
323
324 config->master = IfxVadc_Adc_getMasterId(group->groupId, IfxVadc_getMasterIndex(vadcG));
325
326 config->disablePostCalibration = ((IfxVadc_getGlobalConfigValue(vadc)).U >> (IFX_VADC_GLOBCFG_DPCAL0_OFF + group->groupId)) & 0x1;
327 }
328
329
330 IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
331 {
332 IfxVadc_Status Status = IfxVadc_Status_noError;
333 Ifx_VADC *vadc = IfxVadc_Adc_getVadcFromGroup(config->group);
334 Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(config->group);
335
336 channel->group = config->group;
337 IfxVadc_GroupId groupIndex = channel->group->groupId;
338 IfxVadc_ChannelId channelIndex = config->channelId;
339
340 /* Request Access to configuration registers */
341 IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_channelControl0 + groupIndex));
342
343 /* Configure Channel */
344 {
345 IfxVadc_setReferenceInput(vadcG, channelIndex, config->reference);
346 IfxVadc_storeGroupResult(vadcG, channelIndex, config->resultRegister);
347 IfxVadc_setLowerBoundary(vadcG, channelIndex, config->lowerBoundary);
348 IfxVadc_setUpperBoundary(vadcG, channelIndex, config->upperBoundary);
349 IfxVadc_setSyncRequest(vadcG, channelIndex, config->synchonize);
350 IfxVadc_setChannelInputClass(vadcG, channelIndex, config->inputClass);
351 IfxVadc_setChannelLimitCheckMode(vadcG, channelIndex, config->limitCheck);
352 IfxVadc_setResultPosition(vadcG, channelIndex, config->rightAlignedStorage);
353 IfxVadc_setBackgroundResultTarget(vadcG, channelIndex, config->globalResultUsage);
354 IfxVadc_setBoundaryMode(vadcG, channelIndex, config->boundaryMode);
355 }
356
357 IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
358
359 if (config->backgroundChannel == FALSE)
360 {
361 IfxVadc_setGroupPriorityChannel(vadcG, channelIndex);
362 }
363 else
364 {
365 IfxVadc_setBackgroundPriorityChannel(vadcG, channelIndex);
366 }
367
368 IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
369
370 if (config->channelId < IfxVadc_ChannelId_8)
371 {
372 IfxVadc_setChannelEventNodePointer0(vadcG, config->channelSrcNr, channel->channel);
373 }
374 else
375 {
376 IfxVadc_setChannelEventNodePointer1(vadcG, config->channelSrcNr, channel->channel);
377 }
378
379 if (config->channelPriority > 0)
380 {
381 volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, config->channelSrcNr);
382
383 IfxVadc_clearChannelRequest(vadcG, config->channelId);
384 IfxSrc_init(src, config->channelServProvider, config->channelPriority);
385 IfxSrc_enable(src);
386 }
387 else
388 {
389 /* do nothing */
390 }
391
392 if (config->resultRegister < IfxVadc_ChannelResult_8)
393 {
394 IfxVadc_setResultNodeEventPointer0(vadcG, config->resultSrcNr, config->resultRegister);
395 }
396 else
397 {
398 IfxVadc_setResultNodeEventPointer1(vadcG, config->resultSrcNr, config->resultRegister);
399 }
400
401 if (config->resultPriority > 0)
402 {
403 volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, config->resultSrcNr);
404
405 IfxVadc_enableServiceRequest(vadcG, config->resultRegister);
406 IfxVadc_clearAllResultRequests(vadcG);
407 IfxSrc_init(src, config->resultServProvider, config->resultPriority);
408 IfxSrc_enable(src);
409 }
410 else
411 {
412 /* do nothing */
413 }
414
415 IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_channelControl0 + groupIndex));
416 /* Software initialization */
417 channel->resultreg = config->resultRegister;
418 channel->channel = config->channelId;
419
420 return Status;
421 }
422
423
424 void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
425 {
426 static const IfxVadc_Adc_ChannelConfig IfxVadc_Adc_defaultChannelConfig = {
427 .channelId = IfxVadc_ChannelId_0,
428 .group = NULL_PTR,
429 .inputClass = IfxVadc_InputClasses_group0,
430 .reference = IfxVadc_ChannelReference_standard,
431 .resultRegister = IfxVadc_ChannelResult_0,
432 .globalResultUsage = FALSE,
433 .lowerBoundary = IfxVadc_BoundarySelection_group0,
434 .upperBoundary = IfxVadc_BoundarySelection_group0,
435 .boundaryMode = IfxVadc_BoundaryExtension_standard,
436 .limitCheck = IfxVadc_LimitCheck_noCheck,
437 .synchonize = FALSE,
438 .backgroundChannel = FALSE,
439 .rightAlignedStorage = FALSE,
440 .resultPriority = 0,
441 .resultSrcNr = IfxVadc_SrcNr_group0,
442 .resultServProvider = IfxSrc_Tos_cpu0,
443 .channelPriority = 0,
444 .channelSrcNr = IfxVadc_SrcNr_group0,
445 .channelServProvider = IfxSrc_Tos_cpu0
446 };
447 *config = IfxVadc_Adc_defaultChannelConfig;
448 config->group = group;
449 }
450
451
452 IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
453 {
454 IfxVadc_Status status = IfxVadc_Status_noError;
455 Ifx_VADC *vadc = config->module->vadc;
456 Ifx_VADC_G *vadcG = &vadc->G[config->groupId];
457
458 /* check for write access */
459 group->group = vadcG;
460 group->module = *config->module;
461 IfxVadc_GroupId groupIndex = config->groupId;
462 group->groupId = groupIndex;
463 float32 analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc);
464
465 uint8 inputClassNum;
466
467 /* Request Access to configuration registers */
468 IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
469
470 if (config->arbiter.requestSlotQueueEnabled == TRUE)
471 {
472 /* Enable Arbiter slot, set Priority and start mode */
473 IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotQueueEnabled, config->queueRequest.requestSlotPrio, config->queueRequest.requestSlotStartMode, IfxVadc_RequestSource_queue);
474 }
475 else
476 {
477 /* Disable the slot */
478 IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_queue);
479 }
480
481 if (config->arbiter.requestSlotScanEnabled == TRUE)
482 {
483 /* Setup Arbitration priority and turn on enabled slot */
484 /* Enable Arbiter slot, set Priority and start mode */
485 IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotScanEnabled, config->scanRequest.requestSlotPrio, config->scanRequest.requestSlotStartMode, IfxVadc_RequestSource_scan);
486 }
487 else
488 {
489 /* Disable the slot */
490 IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_scan);
491 }
492
493 if (config->arbiter.requestSlotBackgroundScanEnabled == TRUE)
494 {
495 /* Setup Arbitration priority and turn on enabled slot */
496 /* Enable Arbiter slot, set Priority and start mode */
497 IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotBackgroundScanEnabled, config->backgroundScanRequest.requestSlotPrio, config->backgroundScanRequest.requestSlotStartMode, IfxVadc_RequestSource_background);
498 }
499 else
500 {
501 /* Disable the slot */
502 IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_background);
503 }
504
505 /* master slave configuration */
506 if (config->master != groupIndex)
507 {
508 uint8 masterIndex = IfxVadc_Adc_getMasterKernelIndex(groupIndex, config->master);
509 IfxVadc_setMasterIndex(vadcG, masterIndex);
510 }
511 else
512 {
513 /* do nothing */
514 }
515
516 /* Setup arbiter */
517 /* turn off the group during initialization, see UM for sync mode */
518 IfxVadc_setAnalogConvertControl(vadcG, IfxVadc_AnalogConverterMode_off);
519
520 IfxVadc_setArbitrationRoundLength(vadcG, config->arbiter.arbiterRoundLength);
521
522 /* Setup queue request if enabled */
523 if (config->arbiter.requestSlotQueueEnabled == TRUE)
524 {
525 const IfxVadc_Adc_QueueConfig *queueSlot = &config->queueRequest;
526
527 /* configure external Trigger if enabled */
528 if (queueSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
529 {
530 /* enable external trigger */
531 IfxVadc_enableQueueSlotExternalTrigger(vadcG);
532 IfxVadc_setQueueSlotTriggerOperatingConfig(vadcG, queueSlot->triggerConfig.triggerMode, queueSlot->triggerConfig.triggerSource);
533
534 /* if last input is used the trigger input selection is extend by Gating inputs */
535 if (queueSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15)
536 {
537 IfxVadc_setQueueSlotGatingConfig(vadcG, queueSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
538 }
539 else
540 {
541 /* do nothing, gating is configured later */
542 }
543 }
544 else
545 {
546 /* disable external trigger */
547 IfxVadc_disableQueueSlotExternalTrigger(vadcG);
548 }
549
550 /* configure Gating if enabled */
551 if ((queueSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
552 {
553 IfxVadc_setQueueSlotGatingConfig(vadcG, queueSlot->triggerConfig.gatingSource, queueSlot->triggerConfig.gatingMode);
554 }
555 else
556 {
557 /* do nothing, handled by trigger settings */
558 }
559
560 IfxVadc_clearQueue(vadcG, (queueSlot->flushQueueAfterInit) ? 1 : 0);
561 }
562 else
563 {
564 /* do nothing */
565 }
566
567 /* Setup scan request if enabled */
568 if (config->arbiter.requestSlotScanEnabled == TRUE)
569 {
570 const IfxVadc_Adc_ScanConfig *scanSlot = &config->scanRequest;
571
572 /* configure external Trigger if enabled */
573 if (scanSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
574 {
575 /* enable external trigger */
576 IfxVadc_enableScanSlotExternalTrigger(vadcG);
577
578 IfxVadc_setScanSlotTriggerConfig(vadcG, scanSlot->triggerConfig.triggerMode, scanSlot->triggerConfig.triggerSource);
579
580 if (scanSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15) /* if last input is used the trigger input selection is extend by Gating inputs */
581 {
582 IfxVadc_setScanSlotGatingConfig(vadcG, scanSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
583 }
584 else
585 {
586 /* do nothing, gating is configured later */
587 }
588 }
589 else
590 {
591 IfxVadc_disableScanSlotExternalTrigger(vadcG);
592 }
593
594 /* configure Gating if enabled */
595 if ((scanSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
596 {
597 IfxVadc_setScanSlotGatingConfig(vadcG, scanSlot->triggerConfig.gatingSource, scanSlot->triggerConfig.gatingMode);
598 }
599 else
600 {
601 /* do nothing, handled by trigger settings */
602 }
603
604 IfxVadc_setAutoScan(vadcG, scanSlot->autoscanEnabled ? 1 : 0);
605 }
606 else
607 {
608 /* do nothing */
609 }
610
611 if (config->arbiter.requestSlotBackgroundScanEnabled == TRUE)
612 {
613 const IfxVadc_Adc_BackgroundScanConfig *backgroundScanSlot = &config->backgroundScanRequest;
614
615 /* configure external Trigger if enabled */
616 if (backgroundScanSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
617 {
618 IfxVadc_enableBackgroundScanSlotExternalTrigger(vadc);
619
620 IfxVadc_setBackgroundScanSlotTriggerConfig(vadc, backgroundScanSlot->triggerConfig.triggerMode, backgroundScanSlot->triggerConfig.triggerSource);
621
622 if (backgroundScanSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15) /* if last input is used the trigger input selection is extend by Gating inputs */
623 {
624 IfxVadc_setBackgroundScanSlotGatingConfig(vadc, backgroundScanSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
625 }
626 else
627 {
628 /* do nothing, gating is configured later */
629 }
630 }
631 else
632 {
633 /* do nothing */
634 }
635
636 /* configure Gating if enabled */
637 if ((backgroundScanSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
638 {
639 IfxVadc_setBackgroundScanSlotGatingConfig(vadc, backgroundScanSlot->triggerConfig.gatingSource, backgroundScanSlot->triggerConfig.gatingMode);
640 }
641 else
642 {
643 /* do nothing, handled by trigger settings */
644 }
645
646 IfxVadc_setAutoBackgroundScan(vadc, backgroundScanSlot->autoBackgroundScanEnabled ? 1 : 0);
647 }
648 else
649 {
650 /* do nothing */
651 }
652
653 /* turn on group after initialisation, only in master mode */
654 IfxVadc_AnalogConverterMode convertMode = (config->master == groupIndex) ? IfxVadc_AnalogConverterMode_normalOperation : IfxVadc_AnalogConverterMode_off;
655 IfxVadc_setAnalogConvertControl(vadcG, convertMode);
656
657 /* Post Calibration */
658 IfxVadc_disablePostCalibration(vadc, groupIndex, config->disablePostCalibration);
659
660 for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_INPUTCLASSES; inputClassNum++)
661 {
662 /* configure Group input class registers */
663 IfxVadc_setGroupResolution(vadcG, inputClassNum, config->inputClass[inputClassNum].resolution);
664 /* Calculate Sample time ticks */
665 IfxVadc_setGroupSampleTime(vadcG, inputClassNum, analogFrequency, config->inputClass[inputClassNum].sampleTime);
666 }
667
668 IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
669
670 return status;
671 }
672
673
674 void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
675 {
676 static const IfxVadc_Adc_GroupConfig IfxVadc_Adc_defaultGroupConfig = {
677 .arbiter = {
678 .arbiterRoundLength = IfxVadc_ArbitrationRounds_4_slots,
679 .requestSlotQueueEnabled = FALSE,
680 .requestSlotScanEnabled = FALSE,
681 .requestSlotBackgroundScanEnabled = FALSE,
682 },
683 .backgroundScanRequest = {
684 .autoBackgroundScanEnabled = FALSE,
685 .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
686 .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
687 .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
688 .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
689 .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
690 .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
691 },
692 .scanRequest = {
693 .autoscanEnabled = FALSE,
694 .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
695 .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
696 .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
697 .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
698 .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
699 .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
700 },
701 .queueRequest = {
702 .flushQueueAfterInit = TRUE,
703 .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
704 .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
705 .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
706 .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
707 .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
708 .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
709 },
710
711 .inputClass[0].resolution = IfxVadc_ChannelResolution_12bit,
712 .inputClass[0].sampleTime = 1.0e-6, /* Set sample time to 1us */
713 .inputClass[1].resolution = IfxVadc_ChannelResolution_12bit,
714 .inputClass[1].sampleTime = 1.0e-6, /* Set sample time to 1us */
715 };
716
717 *config = IfxVadc_Adc_defaultGroupConfig;
718 config->groupId = IfxVadc_GroupId_0;
719 config->module = vadc;
720 config->master = config->groupId;
721 config->disablePostCalibration = FALSE;
722 }
723
724
725 IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
726 {
727 IfxVadc_Status status = IfxVadc_Status_noError;
728 Ifx_VADC *vadcSFR = config->vadc;
729 vadc->vadc = vadcSFR;
730 float32 analogFrequency;
731 uint8 inputClassNum, groupNum;
732
733 /* Enable VADC kernel clock */
734 IfxVadc_enableModule(vadcSFR);
735 IfxVadc_selectPowerSupplyVoltage(vadcSFR, config->supplyVoltage);
736
737 /* Set Analog Frequency */
738 if (IfxVadc_initializeFAdcI(vadcSFR, config->analogFrequency) == 0)
739 {
740 return IfxVadc_Status_notInitialised;
741 }
742 else
743 {
744 /* do nothing */
745 }
746
747 /* Set digital Frequency */
748 IfxVadc_initializeFAdcD(vadcSFR, config->digitalFrequency);
749
750 analogFrequency = IfxVadc_getAdcAnalogFrequency(vadcSFR);
751
752 /* configure Global input class registers */
753 for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_GLOBAL_INPUTCLASSES; inputClassNum++)
754 {
755 /* configure ADC channel resolution ( conversion mode ) */
756 IfxVadc_setGlobalResolution(vadcSFR, inputClassNum, config->globalInputClass[inputClassNum].resolution);
757 /* configure Sample time ticks */
758 IfxVadc_setGlobalSampleTime(vadcSFR, inputClassNum, analogFrequency, config->globalInputClass[inputClassNum].sampleTime);
759 }
760
761 /* Start up calibration is requested */
762 if (config->startupCalibration == TRUE)
763 {
764 /* Ensure that all groups are enabled */
765 for (groupNum = 0; groupNum < IFXVADC_NUM_ADC_GROUPS; groupNum++)
766 {
767 IfxVadc_enableAccess(vadcSFR, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupNum));
768 IfxVadc_setAnalogConvertControl(&vadcSFR->G[groupNum], IfxVadc_AnalogConverterMode_normalOperation);
769 IfxVadc_disableAccess(vadcSFR, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupNum));
770 }
771
772 // execute calibration
773 IfxVadc_startupCalibration(vadcSFR);
774 }
775
776 return status;
777 }
778
779
780 void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
781 {
782 config->vadc = vadc;
783 config->analogFrequency = IFXVADC_DEFAULT_ANALOG_FREQ;
784
785 config->digitalFrequency = IfxVadc_getAdcDigitalFrequency(vadc);
786 config->moduleFrequency = IfxScuCcu_getSpbFrequency();
787 config->globalInputClass[0].resolution = IfxVadc_ChannelResolution_12bit;
788 config->globalInputClass[0].sampleTime = 1.0e-6;
789 config->globalInputClass[1].resolution = IfxVadc_ChannelResolution_12bit;
790 config->globalInputClass[1].sampleTime = 1.0e-6;
791 config->startupCalibration = FALSE;
792 config->supplyVoltage = IfxVadc_LowSupplyVoltageSelect_5V;
793 }
794
795
796 void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
797 {
798 emuxConfig->vadc = vadc;
799 emuxConfig->channels = 0;
800 emuxConfig->groupId = IfxVadc_GroupId_0;
801 emuxConfig->emuxInterface = IfxVadc_EmuxInterface_0;
802 emuxConfig->startChannel = IfxVadc_EmuxSelectValue_0;
803 emuxConfig->code = IfxVadc_EmuxCodingScheme_binary;
804 emuxConfig->sampleTimeControl = IfxVadc_EmuxSampleTimeControl_settingChanges;
805 emuxConfig->mode = IfxVadc_ExternalMultiplexerMode_softwareControl;
806 emuxConfig->channelSelectionStyle = IfxVadc_ChannelSelectionStyle_channelNumber;
807 IfxVadc_Adc_EmuxPinConfig defaultConfig = {
808 .pins = {NULL_PTR},
809 .outputMode = IfxPort_OutputMode_pushPull,
810 .padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1,
811 };
812
813 emuxConfig->emuxOutPinConfig = defaultConfig;
814 }
815
816
817 void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
818 {
819 uint8 count = 0;
820 Ifx_VADC_G *vadcG = &vadc->G[emuxControl->groupId];
821 IfxVadc_setEmuxInterfaceForGroup(vadc, emuxControl->emuxInterface, emuxControl->groupId);
822
823 for (count = 0; count < 3; count++)
824 {
825 if (emuxControl->emuxOutPinConfig.pins[count] != NULL_PTR)
826 {
827 IfxVadc_initEmuxPin(emuxControl->emuxOutPinConfig.pins[count], emuxControl->emuxOutPinConfig.outputMode, emuxControl->emuxOutPinConfig.padDriver);
828 }
829 }
830
831 IfxVadc_configExternalMultiplexerMode(vadc, vadcG, emuxControl->mode, emuxControl->channels, emuxControl->startChannel, emuxControl->code, emuxControl->sampleTimeControl, emuxControl->channelSelectionStyle);
832 }
IfxVadc_Adc_ChannelConfig::channelSrcNr
IfxVadc_SrcNr channelSrcNr
Service node of the channel trigger.
Definition: IfxVadc_Adc.h:469
IfxVadc_setEmuxInterfaceForGroup
IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
Sets the Emux Interface for a particular group.
Definition: IfxVadc.h:2295
IfxVadc_setGroupResolution
IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the ADC input class channel resolution.
Definition: IfxVadc.h:2326
IfxVadc_Adc_EmuxPinConfig::pins
IfxVadc_Emux_Out * pins[3]
Emux Pins configuration.
Definition: IfxVadc_Adc.h:440
IfxVadc_getChannelServiceRequestNodePointer1
IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
get channel service request node pointer
Definition: IfxVadc.h:1923
IfxVadc_Adc_EmuxControl::channels
uint8 channels
specifies channel number
Definition: IfxVadc_Adc.h:507
IfxVadc_Adc_GroupConfig::module
IFX_CONST IfxVadc_Adc * module
Specifies pointer to the IfxVadc_Adc module handle.
Definition: IfxVadc_Adc.h:517
IfxVadc_isRequestBackgroundScanSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
Returns the background scan slot requested status.
Definition: IfxVadc.h:2150
IfxVadc_Adc_QueueConfig
Queue configuration structure.
Definition: IfxVadc_Adc.h:418
IfxVadc_ChannelId_0
Channel 0.
Definition: IfxVadc.h:125
IfxVadc_getGroupResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
Gets the ADC input class channel resolution.
Definition: IfxVadc.h:1992
IfxScuCcu_getSpbFrequency
float32 IfxScuCcu_getSpbFrequency(void)
API to get SPB divider frequency. This API returns the based on fSOURCE and also on Low power divider...
Definition: IfxScuCcu.c:555
IfxVadc_clearAllResultRequests
IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
Clears the all group requests.
Definition: IfxVadc.h:1736
IfxVadc_Adc_ChannelConfig::synchonize
boolean synchonize
Specifies synchronized conversion channel.
Definition: IfxVadc_Adc.h:461
IfxVadc_disableAccess
void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Disable write access to the VADC config/control registers.
Definition: IfxVadc.c:54
IfxVadc_ChannelId
IfxVadc_ChannelId
VADC Channels.
Definition: IfxVadc.h:122
IfxVadc_Adc_Config::moduleFrequency
float32 moduleFrequency
module Frequency in Hz.
Definition: IfxVadc_Adc.h:489
IfxVadc_TriggerSource_15
Input signal REQTRx_15.
Definition: IfxVadc.h:485
IfxVadc_Adc_ChannelConfig
Channel configuration structure.
Definition: IfxVadc_Adc.h:458
IfxVadc_Adc_Config::supplyVoltage
IfxVadc_LowSupplyVoltageSelect supplyVoltage
Select Low Power Supply Voltage.
Definition: IfxVadc_Adc.h:493
IfxVadc_getChannelResultServiceRequestNodePointer0
IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 0.
Definition: IfxVadc.h:1899
IfxVadc_Adc_initGroupConfig
void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration.
Definition: IfxVadc_Adc.c:674
IfxVadc_ConversionType
IfxVadc_ConversionType
type of conversion
Definition: IfxVadc.h:195
IfxPort_OutputMode_pushPull
Definition: IfxPort.h:116
IfxVadc_LimitCheck_noCheck
Normal compare mode Event Never Fast Compare mode Event Never.
Definition: IfxVadc.h:308
IfxVadc_getArbiterRoundLength
IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
Gets the ADC group arbitration round length.
Definition: IfxVadc.h:1835
IfxVadc_Adc_Channel::resultreg
IfxVadc_ChannelResult resultreg
Specifies allocated result register.
Definition: IfxVadc_Adc.h:452
IfxVadc_Adc_ChannelConfig::inputClass
IfxVadc_InputClasses inputClass
Specifies input class selection.
Definition: IfxVadc_Adc.h:471
IfxVadc_Adc_Config::globalInputClass
IfxVadc_Adc_ClassConfig globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES]
Specifies the global conversion settings one and two.
Definition: IfxVadc_Adc.h:486
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxVadc_Adc_Channel::channel
IfxVadc_ChannelId channel
Specifies the channel index.
Definition: IfxVadc_Adc.h:451
IfxVadc_Adc_initModuleConfig
void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration.
Definition: IfxVadc_Adc.c:780
IfxVadc_GatingSource_0
Input signal REQGTx_0.
Definition: IfxVadc.h:276
IfxVadc_disableQueueSlotExternalTrigger
IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
Disables the external trigger.
Definition: IfxVadc.h:1775
IfxVadc_Adc_GatingTriggerConfig::gatingMode
IfxVadc_GatingMode gatingMode
Specifies gating mode. High level, Low Level or Gating disabled.
Definition: IfxVadc_Adc.h:371
IfxVadc_Adc_EmuxControl::code
IfxVadc_EmuxCodingScheme code
specifes binary/gray code
Definition: IfxVadc_Adc.h:504
IfxVadc_Adc_initChannelConfig
void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration.
Definition: IfxVadc_Adc.c:424
IfxVadc_RequestSlotPriority_low
Lowpriority.
Definition: IfxVadc.h:396
IfxVadc_getAssignedChannels
IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
Gets the group&#39;s assigned channels.
Definition: IfxVadc.h:1841
IfxVadc_setChannelEventNodePointer0
IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
Sets the channel event service request line.
Definition: IfxVadc.h:2245
IfxVadc_ChannelReference
IfxVadc_ChannelReference
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:145
IfxVadc_InputClasses_group0
Use group class 0.
Definition: IfxVadc.h:298
IfxVadc_Adc_GroupConfig::queueRequest
IfxVadc_Adc_QueueConfig queueRequest
Specifies queued mode configuration.
Definition: IfxVadc_Adc.h:522
IfxVadc_setReferenceInput
IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
Selects the refernce input.
Definition: IfxVadc.h:2373
IfxVadc_Adc_initChannel
IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration.
Definition: IfxVadc_Adc.c:330
IfxVadc_setChannelEventNodePointer1
IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
set channel event node pointer
Definition: IfxVadc.h:2252
IfxVadc_Adc_ChannelConfig::channelServProvider
IfxSrc_Tos channelServProvider
Interrupt service provider for the channel trigger interrupt.
Definition: IfxVadc_Adc.h:467
IfxVadc_getAdcDigitalFrequency
float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz.
Definition: IfxVadc.c:169
IfxVadc_RequestSlotPriority_lowest
Lowest priority.
Definition: IfxVadc.h:395
IfxVadc_getQueueSlotGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
Gets the requested queue slot gating input.
Definition: IfxVadc.h:2036
IfxVadc_Adc_getGroupConfig
void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency)
Definition: IfxVadc_Adc.c:216
IfxVadc_Adc_GroupConfig::backgroundScanRequest
IfxVadc_Adc_BackgroundScanConfig backgroundScanRequest
Specifies back ground scan configuration.
Definition: IfxVadc_Adc.h:523
IfxVadc_storeGroupResult
IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
Sets the group result register.
Definition: IfxVadc.h:2460
IfxVadc_Adc_QueueConfig::flushQueueAfterInit
boolean flushQueueAfterInit
Specifies if the queue is flushed after configuration.
Definition: IfxVadc_Adc.h:420
IfxVadc_Adc_GatingTriggerConfig::triggerSource
IfxVadc_TriggerSource triggerSource
Specifies used Trigger input for group.
Definition: IfxVadc_Adc.h:370
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxVadc_Adc_ChannelConfig::resultServProvider
IfxSrc_Tos resultServProvider
Interrupt service provider for the result trigger interrupt.
Definition: IfxVadc_Adc.h:466
IfxVadc_RequestSource_background
background scan request
Definition: IfxVadc.h:415
IfxVadc_getBackgroundScanSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
Gets the requested background scan slot start mode.
Definition: IfxVadc.h:1867
IfxSrc_enable
IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
Enables a specific interrupt service request.
Definition: IfxSrc.h:248
float32
float float32
Definition: Platform_Types.h:167
IfxVadc_setChannelLimitCheckMode
IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
Sets the channel event mode.
Definition: IfxVadc.h:2265
IfxVadc_Adc_getChannelConversionTime
float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time
Definition: IfxVadc_Adc.c:210
IfxVadc_isRequestQueueSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
Returns the queue slot requested status.
Definition: IfxVadc.h:2156
IfxVadc_Adc_ChannelConfig::upperBoundary
IfxVadc_BoundarySelection upperBoundary
Specifies upper boundary selection.
Definition: IfxVadc_Adc.h:475
IfxVadc_Adc_EmuxControl::mode
IfxVadc_ExternalMultiplexerMode mode
Specifies the External Multiplexer mode.
Definition: IfxVadc_Adc.h:501
IfxVadc_RequestSource_queue
8 stage Queue request
Definition: IfxVadc.h:413
IfxVadc_Adc_Config
VADC module configuration structure.
Definition: IfxVadc_Adc.h:483
IfxVadc_Adc
VADC handle data structure.
Definition: IfxVadc_Adc.h:360
IfxVadc_GroupId_0
VADC group 0.
Definition: IfxVadc_cfg.h:101
IfxVadc_setBoundaryMode
IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
Selects boundary extension.
Definition: IfxVadc.h:2239
IfxVadc_isRequestScanSlotEnabled
IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
Returns the scan slot requested status.
Definition: IfxVadc.h:2162
IfxVadc_setQueueSlotGatingConfig
IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the gating configurations.
Definition: IfxVadc.h:2351
IfxVadc_disablePostCalibration
void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
Disables the post calibration.
Definition: IfxVadc.c:72
IfxVadc_getBackgroundScanSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
Gets the requested background scan slot priority.
Definition: IfxVadc.h:1861
IfxVadc_Adc_getMasterKernelIndex
IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex(IfxVadc_GroupId slave, IfxVadc_GroupId master)
Gets the current master kernel index.
Definition: IfxVadc_Adc.c:100
IfxVadc_EmuxInterface_0
Emux Interface 0.
Definition: IfxVadc.h:213
IfxVadc_Adc_GatingTriggerConfig::gatingSource
IfxVadc_GatingSource gatingSource
Specifies used gate input for group.
Definition: IfxVadc_Adc.h:369
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxVadc_EmuxCodingScheme_binary
Output the Channel Number in Binary code.
Definition: IfxVadc.h:205
IfxVadc_setMasterIndex
IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
Sets the master index.
Definition: IfxVadc.h:2344
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxVadc_ChannelResult
IfxVadc_ChannelResult
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:163
IfxVadc_BoundarySelection
IfxVadc_BoundarySelection
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:112
IfxVadc_setArbitrationRoundLength
IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
Sets the arbiter round length.
Definition: IfxVadc.h:2180
IfxVadc_getScanSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
Gets the request scan slot priority.
Definition: IfxVadc.h:2088
IfxVadc_EmuxSampleTimeControl_settingChanges
Use STCE Whenever Setting Changes.
Definition: IfxVadc.h:222
IfxVadc_Adc_initExternalMultiplexerMode
void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer.
Definition: IfxVadc_Adc.c:817
IfxVadc_Adc_ChannelConfig::limitCheck
IfxVadc_LimitCheck limitCheck
Specifies boundary band selection upper/lower.
Definition: IfxVadc_Adc.h:477
IfxVadc_ChannelSelectionStyle_channelNumber
selects an arbitrary channel
Definition: IfxVadc.h:188
IfxVadc_setGlobalResolution
IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
Sets the channel conversion mode.
Definition: IfxVadc.h:2308
FALSE
#define FALSE
Definition: Platform_Types.h:90
IfxVadc_Adc_EmuxPinConfig::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxVadc_Adc.h:442
IfxVadc_setAutoScan
IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
Enables/Disables continuous auto scan.
Definition: IfxVadc.h:2192
IfxVadc_Protection_channelControl0
Access control for GxCHCTR0.
Definition: IfxVadc.h:326
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxVadc_resetGroup
IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
Resets the ADC group.
Definition: IfxVadc.h:2168
IfxVadc_Adc_ScanConfig::triggerConfig
IfxVadc_Adc_GatingTriggerConfig triggerConfig
Specifies trigger and gating configuration.
Definition: IfxVadc_Adc.h:431
IfxVadc_setBackgroundResultTarget
IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
Sets the target for result background source.
Definition: IfxVadc.h:2204
IfxVadc_Adc_getGroupRegsFromGroup
IFX_INLINE Ifx_VADC_G * IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group)
Gets the current group register set.
Definition: IfxVadc_Adc.h:1201
IfxVadc_Adc_GroupConfig::master
IfxVadc_GroupId master
Specifies the master group. If master is different from groupId, then the group is configured as slav...
Definition: IfxVadc_Adc.h:519
IfxVadc_setGroupSampleTime
IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the ADC input class sample time.
Definition: IfxVadc.h:2332
IfxVadc_setArbiterPriority
void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
Sets the Arbiter slot configurations.
Definition: IfxVadc.c:510
IfxVadc_BoundarySelection_group0
Use group class 0.
Definition: IfxVadc.h:114
IfxVadc_TriggerMode_noExternalTrigger
No external trigger.
Definition: IfxVadc.h:460
IFXVADC_NUM_INPUTCLASSES
#define IFXVADC_NUM_INPUTCLASSES
Number of group specific Input Class.
Definition: IfxVadc_cfg.h:71
IfxVadc_Adc::vadc
Ifx_VADC * vadc
Specifies the pointer to the VADC module registers.
Definition: IfxVadc_Adc.h:362
IfxVadc_enableScanSlotExternalTrigger
IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
Enables the scan slot external trigger.
Definition: IfxVadc.h:1815
IfxVadc_getQueueSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot start mode.
Definition: IfxVadc.h:2048
IfxVadc_setBackgroundPriorityChannel
IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets the channels with low priority as background channel.
Definition: IfxVadc.h:2198
IfxVadc_Adc_ScanConfig::autoscanEnabled
boolean autoscanEnabled
Specifies autoscan functionality.
Definition: IfxVadc_Adc.h:430
IfxVadc_setQueueSlotTriggerOperatingConfig
IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the trigger operating configurations.
Definition: IfxVadc.h:2362
IfxVadc_getBackgroundScanGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
Gets the background scan gating mode.
Definition: IfxVadc.h:1849
IfxVadc_Adc_Config::startupCalibration
boolean startupCalibration
Can be enabled to execute a startup calibration (disabled by default). Note that this option will als...
Definition: IfxVadc_Adc.h:490
IfxVadc_Adc_ScanConfig::requestSlotStartMode
IfxVadc_RequestSlotStartMode requestSlotStartMode
start mode for request scan source.
Definition: IfxVadc_Adc.h:433
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxVadc_setScanSlotGatingConfig
IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the scan slot gating configuration.
Definition: IfxVadc.h:2399
IfxPort_PadDriver_cmosAutomotiveSpeed1
Speed grade 1.
Definition: IfxPort.h:126
IfxVadc_Adc_getVadcFromGroup
IFX_INLINE Ifx_VADC * IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group)
Gets the current group module register address.
Definition: IfxVadc_Adc.h:1251
IfxVadc_AnalogConverterMode_normalOperation
Normal operation mode.
Definition: IfxVadc.h:75
IfxVadc_initEmuxPin
IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
Initializes a EMUX output.
Definition: IfxVadc.h:2118
IfxVadc_Adc_EmuxControl::channelSelectionStyle
IfxVadc_ChannelSelectionStyle channelSelectionStyle
External Multiplexer Channel Selection Style.
Definition: IfxVadc_Adc.h:510
IfxVadc_EmuxSelectValue_0
Start Selection Value 0.
Definition: IfxVadc.h:231
IfxVadc_Adc_ClassConfig::sampleTime
float32 sampleTime
Specifies the requested sample time for input class.
Definition: IfxVadc_Adc.h:403
IfxVadc_InputClasses
IfxVadc_InputClasses
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxVadc.h:296
IfxVadc_Adc_EmuxControl::startChannel
IfxVadc_EmuxSelectValue startChannel
specifies the external channel start value(EMUX[x:0]) x- specifies external channel number ...
Definition: IfxVadc_Adc.h:502
IfxVadc_setBackgroundScanSlotGatingConfig
IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
Sets the background scan slot gating configurations.
Definition: IfxVadc.h:2217
IfxVadc_Adc_EmuxControl
Emux Control Structure.
Definition: IfxVadc_Adc.h:498
IfxVadc_setGroupPriorityChannel
IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Sets channel as priority channel with in the group.
Definition: IfxVadc.h:2320
IFX_STATIC
#define IFX_STATIC
Definition: Compilers.h:33
IfxVadc_Adc_ChannelConfig::globalResultUsage
boolean globalResultUsage
Specifies storage in global result register.
Definition: IfxVadc_Adc.h:460
IfxVadc_Adc_ChannelConfig::rightAlignedStorage
boolean rightAlignedStorage
Specifies result is right aligned.
Definition: IfxVadc_Adc.h:463
IfxVadc_getSrcAddress
volatile Ifx_SRC_SRCR * IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
Gives the SRC source address.
Definition: IfxVadc.c:350
IfxVadc_getQueueSlotTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger input.
Definition: IfxVadc.h:2054
IfxVadc_Adc_EmuxControl::emuxOutPinConfig
IfxVadc_Adc_EmuxPinConfig emuxOutPinConfig
configure the emux output pin
Definition: IfxVadc_Adc.h:509
IFXVADC_NUM_GLOBAL_INPUTCLASSES
#define IFXVADC_NUM_GLOBAL_INPUTCLASSES
Number of ADC group input classes.
Definition: IfxVadc_cfg.h:81
IfxVadc_Adc_ChannelConfig::resultPriority
Ifx_Priority resultPriority
Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
Definition: IfxVadc_Adc.h:464
IFXVADC_NUM_ADC_CAL_GROUPS
#define IFXVADC_NUM_ADC_CAL_GROUPS
Number of calibrated ADC Groups.
Definition: IfxVadc_cfg.h:51
IfxVadc_Adc_ChannelConfig::boundaryMode
IfxVadc_BoundaryExtension boundaryMode
Specifies Standard mode of fast compare mode.
Definition: IfxVadc_Adc.h:476
IfxVadc_Adc_ArbiterConfig::requestSlotScanEnabled
boolean requestSlotScanEnabled
request scan if enabled.
Definition: IfxVadc_Adc.h:385
IfxVadc_setAutoBackgroundScan
IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
Enables/Disables continuous background auto scan.
Definition: IfxVadc.h:2186
IfxVadc_Adc_ChannelConfig::resultSrcNr
IfxVadc_SrcNr resultSrcNr
Service node of the result trigger.
Definition: IfxVadc_Adc.h:468
IfxVadc_ExternalMultiplexerMode_softwareControl
Disable The Emux Control.
Definition: IfxVadc.h:246
IfxVadc_setResultNodeEventPointer1
IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 1.
Definition: IfxVadc.h:2386
IfxVadc_Adc_Channel
Channel handle data structure.
Definition: IfxVadc_Adc.h:449
IfxVadc_Adc_Group::groupId
IfxVadc_GroupId groupId
Specifies the group index.
Definition: IfxVadc_Adc.h:413
IfxVadc_setBackgroundScanSlotTriggerConfig
IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the background scan exteranal trigger operating configurations.
Definition: IfxVadc.h:2228
IfxVadc_Protection
IfxVadc_Protection
Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U.
Definition: IfxVadc.h:324
IfxVadc_Adc_ChannelConfig::reference
IfxVadc_ChannelReference reference
Specifies Reference selection.
Definition: IfxVadc_Adc.h:472
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
IfxVadc_setResultNodeEventPointer0
IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
Sets result event node pointer 0.
Definition: IfxVadc.h:2379
IfxVadc_ArbitrationRounds_4_slots
An arbitration round contains 4 arbitration slots.
Definition: IfxVadc.h:82
IfxVadc_Adc_ScanConfig::requestSlotPrio
IfxVadc_RequestSlotPriority requestSlotPrio
priority of used scan request slot.
Definition: IfxVadc_Adc.h:432
IfxVadc_getScanSlotGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
Gets the request scan slot gating input.
Definition: IfxVadc.h:2082
IfxVadc_Adc_ChannelConfig::channelPriority
Ifx_Priority channelPriority
Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
Definition: IfxVadc_Adc.h:465
IfxVadc_Adc_ChannelConfig::resultRegister
IfxVadc_ChannelResult resultRegister
Specifies Result register selection.
Definition: IfxVadc_Adc.h:473
IfxVadc_getBackgroundScanTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
Gets the background scan external trigger mode.
Definition: IfxVadc.h:1879
IfxVadc_setGlobalSampleTime
IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
Sets the sample time of ADC global class.
Definition: IfxVadc.h:2314
IfxVadc_initializeFAdcI
uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
Configure the ADC analog clock.
Definition: IfxVadc.c:418
IfxVadc_getQueueSlotPriority
IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
Gets the request queue slot priority.
Definition: IfxVadc.h:2042
IfxVadc_Adc_GroupConfig::arbiter
IfxVadc_Adc_ArbiterConfig arbiter
Arbiter configuration structure.
Definition: IfxVadc_Adc.h:525
IfxVadc_getScanSlotGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
Gets the request scan slot gating mode.
Definition: IfxVadc.h:2076
IfxVadc_Adc.h
VADC ADC details.
IfxVadc_TriggerSource_0
Input signal REQTRx_0.
Definition: IfxVadc.h:470
IfxVadc_BoundaryExtension
IfxVadc_BoundaryExtension
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:90
IfxVadc_Status_noError
No error during api execution.
Definition: IfxVadc.h:447
IfxVadc_Adc_EmuxControl::sampleTimeControl
IfxVadc_EmuxSampleTimeControl sampleTimeControl
specifies when to use sample time control
Definition: IfxVadc_Adc.h:505
IfxVadc_SrcNr_group0
service request line 0 of group
Definition: IfxVadc.h:431
IfxVadc_RequestSource_scan
scan request
Definition: IfxVadc.h:414
IfxVadc_isAutoBackgroundScanEnabled
IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
Returns the auto background scan status.
Definition: IfxVadc.h:2138
IfxVadc_enableModule
IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
Enable VADC kernel.
Definition: IfxVadc.h:1799
IfxVadc_clearChannelRequest
IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
Clears the channel request.
Definition: IfxVadc.h:1742
IfxVadc_Adc_GroupConfig
Group configuration structure.
Definition: IfxVadc_Adc.h:515
IfxVadc_startupCalibration
void IfxVadc_startupCalibration(Ifx_VADC *vadc)
Starts ADC calibration and wait for the end of the calibration process.
Definition: IfxVadc.c:542
IfxVadc_Adc_Group
Group handle data structure.
Definition: IfxVadc_Adc.h:409
IfxVadc_Adc_ChannelConfig::backgroundChannel
boolean backgroundChannel
Specifies channel is used as background channel.
Definition: IfxVadc_Adc.h:462
IfxVadc_Adc_Channel::group
IFX_CONST IfxVadc_Adc_Group * group
Specifies the group of the channel.
Definition: IfxVadc_Adc.h:453
IfxVadc_GatingMode_disabled
Gating is disabled, no conversion request are issued.
Definition: IfxVadc.h:266
IfxVadc_getMasterIndex
IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
Gets the configured master index.
Definition: IfxVadc.h:2022
IfxVadc_Adc_Config::analogFrequency
float32 analogFrequency
Specifies analog ADC Frequency.
Definition: IfxVadc_Adc.h:488
IfxVadc_Adc_EmuxControl::emuxInterface
IfxVadc_EmuxInterface emuxInterface
specifies the Emux interface
Definition: IfxVadc_Adc.h:508
IfxVadc_getChannelInputClass
IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the channel input class.
Definition: IfxVadc.h:1893
IfxVadc_disableModule
IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
Disable VADC Module.
Definition: IfxVadc.h:1766
IfxVadc_Adc_SYNCTR_STSEL
uint8 IfxVadc_Adc_SYNCTR_STSEL
Definition: IfxVadc_Adc.h:350
IfxVadc_ChannelResult_8
Use Channel result 8.
Definition: IfxVadc.h:173
IfxVadc_getBackgroundScanGatingSource
IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
Gets the gating input selection.
Definition: IfxVadc.h:1855
IfxVadc_setAnalogConvertControl
IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
Sets analog converter group number.
Definition: IfxVadc.h:2174
IfxVadc_getChannelResultServiceRequestNodePointer1
IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
Gets the channel esult service request node pointer 1.
Definition: IfxVadc.h:1907
IfxVadc_getChannelServiceRequestNodePointer0
IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
Gets the channel service request node pointer.
Definition: IfxVadc.h:1915
IfxVadc_setChannelInputClass
IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
Sets the channel input class.
Definition: IfxVadc.h:2259
IfxVadc_Adc_ChannelConfig::channelId
IfxVadc_ChannelId channelId
Specifies the channel index.
Definition: IfxVadc_Adc.h:470
IfxVadc_setUpperBoundary
IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
Sets group&#39;s upper boundary.
Definition: IfxVadc.h:2436
IfxVadc_getScanSlotStartMode
IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
Gets the request scan slot start mode.
Definition: IfxVadc.h:2094
IfxVadc_Adc_initExternalMultiplexerModeConfig
void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer
Definition: IfxVadc_Adc.c:796
IfxVadc_LimitCheck
IfxVadc_LimitCheck
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:306
IfxVadc_Adc_getMasterId
IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId(IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
Gets the master id.
Definition: IfxVadc_Adc.c:74
IfxVadc_Adc_Config::digitalFrequency
float32 digitalFrequency
Specifies digital ADC Frequency.
Definition: IfxVadc_Adc.h:487
IfxVadc_Adc_Group::group
Ifx_VADC_G * group
Pointer to the group registers.
Definition: IfxVadc_Adc.h:412
IfxVadc_Adc_GroupConfig::disablePostCalibration
boolean disablePostCalibration
Specifies if calibration after conversion (post calibration) should be disabled.
Definition: IfxVadc_Adc.h:524
IfxVadc_Adc_BackgroundScanConfig::autoBackgroundScanEnabled
boolean autoBackgroundScanEnabled
background autoscan functionality enable or disable.
Definition: IfxVadc_Adc.h:393
IfxVadc_GatingMode_always
Conversion request is issued if at least 1 conversion pending bit is set.
Definition: IfxVadc.h:267
IfxVadc_getScanSlotTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger input.
Definition: IfxVadc.h:2100
IfxVadc_Adc_ChannelConfig::lowerBoundary
IfxVadc_BoundarySelection lowerBoundary
Specifies lower boundary selection.
Definition: IfxVadc_Adc.h:474
IfxVadc_setResultPosition
IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
Sets result store position.
Definition: IfxVadc.h:2393
IfxVadc_Adc_GatingTriggerConfig::triggerMode
IfxVadc_TriggerMode triggerMode
Specifies trigger mode. Rising, falling any edge leads to an trigger event.
Definition: IfxVadc_Adc.h:372
IfxVadc_enableServiceRequest
IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
Definition: IfxVadc.h:1821
IfxVadc_getAdcAnalogFrequency
float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz.
Definition: IfxVadc.c:163
IfxVadc_ChannelResolution_12bit
12-bit conversion
Definition: IfxVadc.h:155
IfxVadc_configExternalMultiplexerMode
void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
Definition: IfxVadc.c:35
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:99
IfxVadc_Adc_disableModule
void IfxVadc_Adc_disableModule(Ifx_VADC *vadc)
Disable VADC Module.
Definition: IfxVadc_Adc.c:124
IfxVadc_getGlobalConfigValue
IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
Gets the global control configuration value.
Definition: IfxVadc.h:1955
IfxVadc_Adc_ScanConfig
Scan mode configuration structure.
Definition: IfxVadc_Adc.h:428
IfxVadc_Adc_EmuxPinConfig
Definition: IfxVadc_Adc.h:438
IfxVadc_ChannelReference_standard
use Varef as reference
Definition: IfxVadc.h:147
IfxVadc_getScanSlotTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
Gets the requested scan slot trigger mode.
Definition: IfxVadc.h:2106
IfxVadc_enableBackgroundScanSlotExternalTrigger
IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
Enables the background sacn external trigger.
Definition: IfxVadc.h:1787
IfxVadc_BoundaryExtension_standard
Boundary Standard mode. BNDSELU/BNDSELL as Boundaries.
Definition: IfxVadc.h:92
IfxVadc_Adc_ClassConfig::resolution
IfxVadc_ChannelResolution resolution
Specifies the conversion Mode 8,10,12Bit or 10bit fast compare.
Definition: IfxVadc_Adc.h:404
IfxVadc_setScanSlotTriggerConfig
IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
Sets the scan slot trigger operating configurations.
Definition: IfxVadc.h:2410
IfxVadc_LowSupplyVoltageSelect_5V
5V Power Supply is Connected
Definition: IfxVadc.h:318
IfxVadc_Status_notInitialised
Appropriate initialisation not done.
Definition: IfxVadc.h:448
IfxVadc_ChannelResult_0
Use Channel result 0.
Definition: IfxVadc.h:165
IfxVadc_AnalogConverterMode
IfxVadc_AnalogConverterMode
Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC.
Definition: IfxVadc.h:70
IfxVadc_getQueueSlotTriggerMode
IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot trigger mode.
Definition: IfxVadc.h:2060
IfxVadc_Adc_initGroup
IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first...
Definition: IfxVadc_Adc.c:452
IfxVadc_Adc_GroupConfig::inputClass
IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUM_INPUTCLASSES]
Specifies conversion settings one and two.
Definition: IfxVadc_Adc.h:520
IfxVadc_Adc_Group::module
IfxVadc_Adc module
The VADC handle structure.
Definition: IfxVadc_Adc.h:411
IfxVadc_getQueueSlotGatingMode
IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
Gets the requested queue slot gating mode.
Definition: IfxVadc.h:2030
IfxVadc_getChannelControlConfig
IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
Gets the current ADC channel control configurations.
Definition: IfxVadc.h:1885
IfxVadc_disableScanSlotExternalTrigger
IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
Disables the scan slot external trigger.
Definition: IfxVadc.h:1781
IfxVadc_getAdcModuleFrequency
float32 IfxVadc_getAdcModuleFrequency(void)
Module Frequency in Hz.
Definition: IfxVadc.c:175
IfxVadc_Status
IfxVadc_Status
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx
Definition: IfxVadc.h:445
IfxVadc_Adc_ArbiterConfig::requestSlotQueueEnabled
boolean requestSlotQueueEnabled
request queue if enabled.
Definition: IfxVadc_Adc.h:384
IFXVADC_DEFAULT_ANALOG_FREQ
#define IFXVADC_DEFAULT_ANALOG_FREQ
Default analog frequency used in initModuleConfig function.
Definition: IfxVadc_cfg.h:63
IfxVadc_setLowerBoundary
IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
Sets group&#39;s lower boundary.
Definition: IfxVadc.h:2338
IfxVadc_enableQueueSlotExternalTrigger
IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
Enables the external trigger.
Definition: IfxVadc.h:1809
IfxVadc_isAutoScanEnabled
IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
Gets the auto scan enable status.
Definition: IfxVadc.h:2144
IfxVadc_Adc_getChannelConfig
void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings)
Definition: IfxVadc_Adc.c:130
IfxVadc_Adc_ArbiterConfig::arbiterRoundLength
IfxVadc_ArbitrationRounds arbiterRoundLength
Specifies arbiter round length.
Definition: IfxVadc_Adc.h:383
IfxVadc_RequestSlotStartMode_waitForStart
Wait for start.
Definition: IfxVadc.h:405
IfxVadc_getGroupSampleTime
IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
Gets the ADC input class channel sample time.
Definition: IfxVadc.h:2009
IFXVADC_NUM_ADC_GROUPS
#define IFXVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxVadc_cfg.h:47
IfxVadc_getChannelConversionTime
float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
get channel conversion timing
Definition: IfxVadc.c:202
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxVadc_clearQueue
IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage.
Definition: IfxVadc.h:1748
IfxVadc_Adc_initModule
IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration.
Definition: IfxVadc_Adc.c:725
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxVadc_Adc_deInitGroup
void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group)
Reset the VADC group.
Definition: IfxVadc_Adc.c:110
IfxVadc_ChannelId_8
Channel 8.
Definition: IfxVadc.h:133
IfxVadc_setSyncRequest
IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
Sets channel synchronization request.
Definition: IfxVadc.h:2430
IfxVadc_Adc_ArbiterConfig::requestSlotBackgroundScanEnabled
boolean requestSlotBackgroundScanEnabled
request background scan if enabled.
Definition: IfxVadc_Adc.h:386
IfxVadc_Adc_masterIndex
IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex[IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS]
Definition: IfxVadc_Adc.c:60
IfxVadc_SrcNr
IfxVadc_SrcNr
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxVadc.h:429
IfxVadc_Adc_BackgroundScanConfig
Background scan mode configuration structure.
Definition: IfxVadc_Adc.h:391
IfxVadc_Adc_EmuxPinConfig::outputMode
IfxPort_OutputMode outputMode
the pin output mode which should be configured
Definition: IfxVadc_Adc.h:441
IfxVadc_enableAccess
void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
Enable write access to the VADC config/control registers.
Definition: IfxVadc.c:94
IfxSrc_init
IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
Initializes the service request control register.
Definition: IfxSrc.h:254
IfxVadc_Protection_initGroup0
Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR.
Definition: IfxVadc.h:342
IfxVadc_initializeFAdcD
uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
Configure the FadcD vadc digital clock.
Definition: IfxVadc.c:402
IfxVadc_AnalogConverterMode_off
Analog Converter off.
Definition: IfxVadc.h:72
IfxVadc_Adc_GroupConfig::scanRequest
IfxVadc_Adc_ScanConfig scanRequest
Specifies scan mode configuration.
Definition: IfxVadc_Adc.h:521
IfxVadc_getBackgroundScanTriggerInput
IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
Gets the background scan trigger input.
Definition: IfxVadc.h:1873
IfxVadc_selectPowerSupplyVoltage
void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
Select Low Power Supply Voltage.
Definition: IfxVadc.c:498


iLLD_TC26B: IfxVadc_Adc.h Source File

  • Vadc
  • Adc
IfxVadc_Adc.h
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_Adc.h
3 * \brief VADC ADC details
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Vadc_Adc_Usage How to use the VADC ADC Interface driver?
25 * \ingroup IfxLld_Vadc
26 *
27 * VADC comprises of independent analog channels with Analog/Digital converters to convert analog input to discrete digital output.
28 *
29 * In the following sections it will be described, how to integrate the driver into the application framework.
30 *
31 * \section IfxLld_Vadc_Adc_Preparation Preparation
32 * \subsection IfxLld_Vadc_Adc_Include Include Files
33 *
34 * Include following header file into your C code:
35 * \code
36 *
37 * #include <Vadc/Adc/IfxVadc_Adc.h>
38 *
39 * \endcode
40 *
41 * \subsection IfxLld_Vadc_Adc_Variables Variables
42 * \code
43 *
44 * // VADC handle
45 * IfxVadc_Adc vadc;
46 * IfxVadc_Adc_Group adcGroup;
47 * \endcode
48 *
49 * \subsection IfxLld_Vadc_Adc_ModuleInitialisation Module Initialisation
50 * The module initialisation can be done in the same function:
51 * \code
52 * // create configuration
53 * IfxVadc_Adc_Config adcConfig;
54 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
55 *
56 * // initialize module
57 * // IfxVadc_Adc vadc; // declared globally
58 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
59 * \endcode
60 *
61 *
62 * \subsection IfxLld_Vadc_Adc_GroupInitialisation Group Initialisation
63 * The group initialisation can be done in the same function:
64 * \code
65 * // create group config
66 * IfxVadc_Adc_GroupConfig adcGroupConfig;
67 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
68 *
69 * // change group (default is GroupId_0, change to GroupId_3)
70 * adcGroupConfig.groupId = IfxVadc_GroupId_3;
71 *
72 * // IMPORTANT: usually we use the same group as master!
73 * adcGroupConfig.master = adcGroupConfig.groupId;
74 *
75 * // enable all arbiter request sources
76 * adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
77 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
78 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
79 *
80 * // enable all gates in "always" mode (no edge detection)
81 * adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
82 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
83 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
84 *
85 * // enable auto scan
86 * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
87 * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
88 *
89 * // initialize the group
90 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
91 * \endcode
92 *
93 * \subsection IfxLld_Vadc_Adc_QueuedTransfers Queued Transfers
94 * Now, VADC is initialised. Here,Three channels are used for queued transfers
95 * \code
96 * // IMPORTANT: for deterministic results we have to disable the queue gate
97 * // while filling the queue, otherwise results could be output in the wrong order
98 * IfxVadc_GatingMode savedGate = IfxVadc_getQueueSlotGatingMode(adcGroup.group);
99 * IfxVadc_GatingSource gatingSource=IfxVadc_getQueueSlotGatingSource(adcGroup.group);
100 *
101 * IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, IfxVadc_GatingMode_disabled );
102 * // create channel config
103 * IfxVadc_Adc_ChannelConfig adcChannelConfig[3];
104 * IfxVadc_Adc_Channel adcChannel[3];
105 *
106 * for(int chnIx=0; chnIx<3; ++chnIx) {
107 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
108 *
109 * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
110 * adcChannelConfig[chnIx].resultRegister = IfxVadc_ChannelResult_1; // use result register #1 for all channels
111 *
112 * // initialize the channel
113 * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
114 *
115 * // Add channel to queue with refill enabled
116 * IfxVadc_Adc_addToQueue(&adcChannel[chnIx], IFXVADC_QUEUE_REFILL);
117 *
118 * // restore previous gate config
119 *
120 * IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, savedGate );
121 *
122 * // start the Queue
123 * IfxVadc_Adc_startQueue(&adcGroup); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
124 *
125 * // get 10 results for all 3 channels and store in temporary buffer
126 * // (the usage of a buffer is required, since the print statements used by the checks take more time than the conversions)
127 * Ifx_VADC_RES resultTrace[3*10];
128 * for(int i=0; i<3*10; ++i)
129 * {
130 * unsigned chnIx = i % 3;
131 *
132 * // wait for valid result
133 * Ifx_VADC_RES conversionResult;
134 * do {
135 * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
136 * } while( !conversionResult.B.VF );
137 *
138 * // store result
139 * resultTrace[i] = conversionResult;
140 * }
141 *
142 * // stop the queue
143 * IfxVadc_Adc_clearQueue(&adcGroup);
144 *
145 * // check results in buffer
146 * // ...
147 * }
148 * \endcode
149 *
150 * \subsection IfxLld_Vadc_Adc_AutoScan Auto Scan
151 * Autoscan of 5 channels
152 * \code
153 * // create group config
154 * IfxVadc_Adc_GroupConfig adcGroupConfig;
155 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
156 *
157 * // change group (default is GroupId_0, change to GroupId_3)
158 * adcGroupConfig.groupId = IfxVadc_GroupId_3;
159 *
160 * // IMPORTANT: usually we use the same group as master!
161 * adcGroupConfig.master = adcGroupConfig.groupId;
162 *
163 * // enable gate in "always" mode (no edge detection)
164 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
165 *
166 * // enable auto scan
167 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
168 * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
169 *
170 * // initialize the group
171 * //IfxVadc_Adc_Group adcGroup; // no need to create a new one
172 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
173 *
174 * {
175 * // create channel config
176 * IfxVadc_Adc_ChannelConfig adcChannelConfig[5];
177 * IfxVadc_Adc_Channel adcChannel[5];
178 *
179 * for(int chnIx=0; chnIx<5; ++chnIx) {
180 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
181 *
182 * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
183 * adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(chnIx); // use dedicated result register
184 *
185 * // initialize the channel
186 * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
187 *
188 * // add to scan
189 * unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
190 * unsigned mask = channels;
191 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
192 * }
193 *
194 * // start scan
195 * IfxVadc_Adc_startScan(&adcGroup);
196 *
197 * // check results
198 * for(int chnIx=0; chnIx<5; ++chnIx) {
199 * unsigned group = adcChannel[chnIx].group->groupId;
200 * unsigned channel = adcChannel[chnIx].channel;
201 *
202 * // wait for valid result
203 * Ifx_VADC_RES conversionResult;
204 * do {
205 * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
206 * } while( !conversionResult.B.VF );
207 *
208 *
209 * }
210 * }
211 * \endcode
212 *
213 * \subsection IfxLld_Vadc_Adc_BackGroundScan Background Scan
214 * Background Scan of 2 channels
215 *
216 * \code
217 * // create group config
218 * IfxVadc_Adc_GroupConfig adcGroupConfig;
219 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
220 *
221 * // change group (default is GroupId_0, change to GroupId_3)
222 * adcGroupConfig.groupId = IfxVadc_GroupId_3;
223 *
224 * // IMPORTANT: usually we use the same group as master!
225 * adcGroupConfig.master = adcGroupConfig.groupId;
226 *
227 * // enable background scan
228 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
229 * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
230 *
231 * // enable gate in "always" mode (no edge detection)
232 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
233 *
234 * // create channel config
235 * IfxVadc_Adc_ChannelConfig adcChannelConfig[2];
236 * IfxVadc_Adc_Channel adcChannel[2];
237 *
238 * for(int chnIx=0; chnIx<2; ++chnIx)
239 * {
240 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
241 *
242 * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx + 5);
243 * adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(5 + chnIx); // use register #5 and 6 for results
244 * adcChannelConfig[chnIx].backgroundChannel = TRUE;
245 *
246 * // initialize the channel
247 * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
248 *
249 * // add to background scan
250 * unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
251 * unsigned mask = channels;
252 * IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroup, channels, mask);
253 * }
254 *
255 * // start autoscan
256 * IfxVadc_Adc_startBackgroundScan(&vadc);
257 *
258 * // check results
259 * for(int chnIx=0; chnIx<2; ++chnIx)
260 * {
261 * unsigned group = adcChannel[chnIx].group->groupId;
262 * unsigned channel = adcChannel[chnIx].channel;
263 *
264 * // wait for valid result
265 * Ifx_VADC_RES conversionResult;
266 * do
267 * {
268 * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
269 * } while( !conversionResult.B.VF );
270 *
271 * // check with expected value
272 * // ...
273 * }
274 * \endcode
275 *
276 * \subsection IfxLld_Vadc_Adc_EmuxConfiguration External Multiplexer Configuration
277 * External Configuration of 3 channels at channel 3
278 *
279 * \code
280 *
281 * IfxVadc_Adc_EmuxControl emuxConfig;
282 *
283 * IfxVadc_Adc_initExternalMultiplexerModeConfig(&emuxConfig,vadc);
284 *
285 * emuxConfig.groupId = IfxVadc_GroupId_1;
286 * emuxConfig.channels = (uint8)IfxVadc_ChannelId_3;
287 * emuxConfig.startChannel = IfxVadc_EmuxSelectValue_2; // it will take 0 to 2 external channel
288 *
289 * emuxConfig.sampleTimeControl = IfxVadc_EmuxSampleTimeControl_always;
290 * emuxConfig.mode = IfxVadc_ExternalMultiplexerMode_steady;
291 *
292 * IfxVadc_Adc_EmuxPinConfig pinsConfig ={
293 * .pins={ &IfxVadc_EMUX00_P02_6_OUT,
294 * &IfxVadc_EMUX01_P02_7_OUT,
295 * &IfxVadc_EMUX02_P02_8_OUT},
296 *
297 *
298 * .outputMode = IfxPort_OutputMode_pushPull,
299 * .padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1
300 * };
301 * emuxConfig.emuxOutPinConfig = pinsConfig;
302 *
303 * IfxVadc_Adc_initExternalMultiplexerMode(vadc, &emuxConfig);
304 *
305 * IfxVadc_setEmuxGroupResolution(&vadc->G[emuxConfig.groupId], 0, IfxVadc_ChannelResolution_12bit);
306 * IfxVadc_setEmuxGroupSampletime(&vadc->G[emuxConfig.groupId], 0, 50000, 1.0e-6);
307 *
308 * \endcode
309 *
310 * \defgroup IfxLld_Vadc_Adc Interface Driver
311 * \ingroup IfxLld_Vadc
312 * \defgroup IfxLld_Vadc_Adc_DataStructures Data Structures
313 * \ingroup IfxLld_Vadc_Adc
314 * \defgroup IfxLld_Vadc_Adc_Module Module Functions
315 * \ingroup IfxLld_Vadc_Adc
316 * \defgroup IfxLld_Vadc_Adc_Group Group Functions
317 * \ingroup IfxLld_Vadc_Adc
318 * \defgroup IfxLld_Vadc_Adc_Channel Channel Functions
319 * \ingroup IfxLld_Vadc_Adc
320 * \defgroup IfxLld_Vadc_Adc_Background_Autoscan Background Autoscan Functions
321 * \ingroup IfxLld_Vadc_Adc
322 * \defgroup IfxLld_Vadc_Adc_ChannelScan Channel Scan Functions
323 * \ingroup IfxLld_Vadc_Adc
324 * \defgroup IfxLld_Vadc_Adc_Queue Queue Functions
325 * \ingroup IfxLld_Vadc_Adc
326 * \defgroup IfxLld_Vadc_Adc_Clock Clock Functions
327 * \ingroup IfxLld_Vadc_Adc
328 * \defgroup IfxLld_Vadc_Adc_Interrupt Interrupt Functions
329 * \ingroup IfxLld_Vadc_Adc
330 * \defgroup IfxLld_Vadc_Adc_Variables Variables
331 * \ingroup IfxLld_Vadc_Adc
332 * \defgroup IfxLld_Vadc_Adc_Emux Emux Functions
333 * \ingroup IfxLld_Vadc_Adc
334 */
335
336 #ifndef IFXVADC_ADC_H
337 #define IFXVADC_ADC_H 1
338
339 /******************************************************************************/
340 /*----------------------------------Includes----------------------------------*/
341 /******************************************************************************/
342
343 #include "Vadc/Std/IfxVadc.h"
344 #include "_Utilities/Ifx_Assert.h"
345
346 /******************************************************************************/
347 /*------------------------------Type Definitions------------------------------*/
348 /******************************************************************************/
349
350 typedef uint8 IfxVadc_Adc_SYNCTR_STSEL;
351
352 /******************************************************************************/
353 /*-----------------------------Data Structures--------------------------------*/
354 /******************************************************************************/
355
356 /** \addtogroup IfxLld_Vadc_Adc_DataStructures
357 * \{ */
358 /** \brief VADC handle data structure
359 */
360 typedef struct
361 {
362 Ifx_VADC *vadc; /**< \brief Specifies the pointer to the VADC module registers */
363 } IfxVadc_Adc;
364
365 /** \brief Gating/Trigger configuration structure
366 */
367 typedef struct
368 {
369 IfxVadc_GatingSource gatingSource; /**< \brief Specifies used gate input for group */
370 IfxVadc_TriggerSource triggerSource; /**< \brief Specifies used Trigger input for group */
371 IfxVadc_GatingMode gatingMode; /**< \brief Specifies gating mode. High level, Low Level or Gating disabled */
372 IfxVadc_TriggerMode triggerMode; /**< \brief Specifies trigger mode. Rising, falling any edge leads to an trigger event */
373 } IfxVadc_Adc_GatingTriggerConfig;
374
375 /** \} */
376
377 /** \addtogroup IfxLld_Vadc_Adc_DataStructures
378 * \{ */
379 /** \brief Arbiter configuration structure.
380 */
381 typedef struct
382 {
383 IfxVadc_ArbitrationRounds arbiterRoundLength; /**< \brief Specifies arbiter round length. */
384 boolean requestSlotQueueEnabled; /**< \brief request queue if enabled. */
385 boolean requestSlotScanEnabled; /**< \brief request scan if enabled. */
386 boolean requestSlotBackgroundScanEnabled; /**< \brief request background scan if enabled. */
387 } IfxVadc_Adc_ArbiterConfig;
388
389 /** \brief Background scan mode configuration structure.
390 */
391 typedef struct
392 {
393 boolean autoBackgroundScanEnabled; /**< \brief background autoscan functionality enable or disable. */
394 IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief trigger and gating configuration. */
395 IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used background scan request slot. */
396 IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request background scan source. */
397 } IfxVadc_Adc_BackgroundScanConfig;
398
399 /** \brief Input class configuration structure
400 */
401 typedef struct
402 {
403 float32 sampleTime; /**< \brief Specifies the requested sample time for input class */
404 IfxVadc_ChannelResolution resolution; /**< \brief Specifies the conversion Mode 8,10,12Bit or 10bit fast compare */
405 } IfxVadc_Adc_ClassConfig;
406
407 /** \brief Group handle data structure
408 */
409 typedef struct
410 {
411 IfxVadc_Adc module; /**< \brief The VADC handle structure */
412 Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
413 IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
414 } IfxVadc_Adc_Group;
415
416 /** \brief Queue configuration structure
417 */
418 typedef struct
419 {
420 boolean flushQueueAfterInit; /**< \brief Specifies if the queue is flushed after configuration */
421 IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief trigger and gating configuration. */
422 IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used queue request slot. */
423 IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request queue source. */
424 } IfxVadc_Adc_QueueConfig;
425
426 /** \brief Scan mode configuration structure.
427 */
428 typedef struct
429 {
430 boolean autoscanEnabled; /**< \brief Specifies autoscan functionality. */
431 IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief Specifies trigger and gating configuration */
432 IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used scan request slot. */
433 IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request scan source. */
434 } IfxVadc_Adc_ScanConfig;
435
436 /** \} */
437
438 typedef struct
439 {
440 IfxVadc_Emux_Out *pins[3]; /**< \brief Emux Pins configuration */
441 IfxPort_OutputMode outputMode; /**< \brief the pin output mode which should be configured */
442 IfxPort_PadDriver padDriver; /**< \brief Pad driver */
443 } IfxVadc_Adc_EmuxPinConfig;
444
445 /** \addtogroup IfxLld_Vadc_Adc_DataStructures
446 * \{ */
447 /** \brief Channel handle data structure
448 */
449 typedef struct
450 {
451 IfxVadc_ChannelId channel; /**< \brief Specifies the channel index */
452 IfxVadc_ChannelResult resultreg; /**< \brief Specifies allocated result register */
453 IFX_CONST IfxVadc_Adc_Group *group; /**< \brief Specifies the group of the channel */
454 } IfxVadc_Adc_Channel;
455
456 /** \brief Channel configuration structure
457 */
458 typedef struct
459 {
460 boolean globalResultUsage; /**< \brief Specifies storage in global result register */
461 boolean synchonize; /**< \brief Specifies synchronized conversion channel */
462 boolean backgroundChannel; /**< \brief Specifies channel is used as background channel */
463 boolean rightAlignedStorage; /**< \brief Specifies result is right aligned */
464 Ifx_Priority resultPriority; /**< \brief Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable */
465 Ifx_Priority channelPriority; /**< \brief Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable */
466 IfxSrc_Tos resultServProvider; /**< \brief Interrupt service provider for the result trigger interrupt */
467 IfxSrc_Tos channelServProvider; /**< \brief Interrupt service provider for the channel trigger interrupt */
468 IfxVadc_SrcNr resultSrcNr; /**< \brief Service node of the result trigger */
469 IfxVadc_SrcNr channelSrcNr; /**< \brief Service node of the channel trigger */
470 IfxVadc_ChannelId channelId; /**< \brief Specifies the channel index */
471 IfxVadc_InputClasses inputClass; /**< \brief Specifies input class selection */
472 IfxVadc_ChannelReference reference; /**< \brief Specifies Reference selection */
473 IfxVadc_ChannelResult resultRegister; /**< \brief Specifies Result register selection */
474 IfxVadc_BoundarySelection lowerBoundary; /**< \brief Specifies lower boundary selection */
475 IfxVadc_BoundarySelection upperBoundary; /**< \brief Specifies upper boundary selection */
476 IfxVadc_BoundaryExtension boundaryMode; /**< \brief Specifies Standard mode of fast compare mode */
477 IfxVadc_LimitCheck limitCheck; /**< \brief Specifies boundary band selection upper/lower */
478 IFX_CONST IfxVadc_Adc_Group *group; /**< \brief Specifies pointer to the IfxVadc_Adc_Group group handle */
479 } IfxVadc_Adc_ChannelConfig;
480
481 /** \brief VADC module configuration structure
482 */
483 typedef struct
484 {
485 Ifx_VADC *vadc; /**< \brief Specifies the pointer to the VADC module registers */
486 IfxVadc_Adc_ClassConfig globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES]; /**< \brief Specifies the global conversion settings one and two */
487 float32 digitalFrequency; /**< \brief Specifies digital ADC Frequency */
488 float32 analogFrequency; /**< \brief Specifies analog ADC Frequency */
489 float32 moduleFrequency; /**< \brief module Frequency in Hz. */
490 boolean startupCalibration; /**< \brief Can be enabled to execute a startup calibration (disabled by default).
491 * Note that this option will also enable all converter groups.
492 * If this isn't desired, don't use this option, but execute IfxVadc_Adc_startupCalibration() after all ADC groups have been initialized. */
493 IfxVadc_LowSupplyVoltageSelect supplyVoltage; /**< \brief Select Low Power Supply Voltage */
494 } IfxVadc_Adc_Config;
495
496 /** \brief Emux Control Structure
497 */
498 typedef struct
499 {
500 Ifx_VADC *vadc; /**< \brief pointer to Module Configuration */
501 IfxVadc_ExternalMultiplexerMode mode; /**< \brief Specifies the External Multiplexer mode */
502 IfxVadc_EmuxSelectValue startChannel; /**< \brief specifies the external channel start value(EMUX[x:0])
503 * x- specifies external channel number */
504 IfxVadc_EmuxCodingScheme code; /**< \brief specifes binary/gray code */
505 IfxVadc_EmuxSampleTimeControl sampleTimeControl; /**< \brief specifies when to use sample time control */
506 IfxVadc_GroupId groupId; /**< \brief specifies groupId */
507 uint8 channels; /**< \brief specifies channel number */
508 IfxVadc_EmuxInterface emuxInterface; /**< \brief specifies the Emux interface */
509 IfxVadc_Adc_EmuxPinConfig emuxOutPinConfig; /**< \brief configure the emux output pin */
510 IfxVadc_ChannelSelectionStyle channelSelectionStyle; /**< \brief External Multiplexer Channel Selection Style */
511 } IfxVadc_Adc_EmuxControl;
512
513 /** \brief Group configuration structure
514 */
515 typedef struct
516 {
517 IFX_CONST IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
518 IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
519 IfxVadc_GroupId master; /**< \brief Specifies the master group. If master is different from groupId, then the group is configured as slave. */
520 IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUM_INPUTCLASSES]; /**< \brief Specifies conversion settings one and two */
521 IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
522 IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
523 IfxVadc_Adc_BackgroundScanConfig backgroundScanRequest; /**< \brief Specifies back ground scan configuration */
524 boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
525 IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Arbiter configuration structure. */
526 } IfxVadc_Adc_GroupConfig;
527
528 /** \} */
529
530 /** \addtogroup IfxLld_Vadc_Adc_Module
531 * \{ */
532
533 /******************************************************************************/
534 /*-------------------------Inline Function Prototypes-------------------------*/
535 /******************************************************************************/
536
537 /** \brief Reset the VADC module
538 * \param vadc pointer to the VADC module
539 * \return None
540 *
541 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
542 *
543 */
544 IFX_INLINE void IfxVadc_Adc_deInitModule(IfxVadc_Adc *vadc);
545
546 /** \brief Get the current VADC configuration (e.g. VADC frequency)
547 * \param vadc pointer to the VADC module
548 * \param config pointer to the VADC module configuration
549 * \return None
550 *
551 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
552 *
553 */
554 IFX_INLINE void IfxVadc_Adc_getModuleConfig(IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config);
555
556 /** \brief Get conversion result based on the Request Source. (Function does not care about the alignment)
557 * value = raw * gain + offset
558 * \param group pointer to the VADC group
559 * \param channel channel number
560 * \param sourceType type of request source
561 * \return scaled Conversion result
562 *
563 * \code
564 * // create configuration
565 * IfxVadc_Adc_Config adcConfig;
566 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
567 *
568 * // initialize module
569 * IfxVadc_Adc vadc;
570 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
571 *
572 * // create group config
573 * IfxVadc_Adc_GroupConfig adcGroupConfig;
574 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
575 *
576 * // change group (default is GroupId0, change to GroupId2)
577 * adcGroupConfig.groupId = IfxVadc_GroupId2;
578 * adcGroupConfig.master = adcGroupConfig.groupId;
579 *
580 * // enable gate in "always" mode (no edge detection)
581 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
582 *
583 * // enable auto scan
584 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
585 * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
586 *
587 * // initialize the group
588 * IfxVadc_Adc_Group adcGroup;
589 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
590 *
591 * // create channel config
592 * IfxVadc_Adc_ChannelConfig adcChannelConfig;
593 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
594 *
595 * // change channel (default is ChannelId0, change to ChannelId2)
596 * adcChannelConfig.channelId = IfxVadc_ChannelId2;
597 *
598 * // initialize the channel
599 * IfxVadc_Adc_Channel adcChannel;
600 * IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
601 *
602 * uint32 channels = (1 << 2); // enable channel #2
603 * uint32 mask = (1 << 7) | (1 << 2); // modify the selection for channel #7 and #2; channel #7 will be disabled
604 *
605 * // configure wait for read mode
606 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
607 *
608 * // configure scan
609 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
610 *
611 * // start the scan
612 * IfxVadc_Adc_startScan(&adcGroup);
613 *
614 * // wait for valid result
615 * Ifx_VADC_RES resultChannel;
616 * do {
617 * resultChannel = IfxVadc_Adc_getResultBasedOnRequestSource(&adcGroup, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
618 * } while( !resultChannel.B.VF );
619 * \endcode
620 *
621 */
622 IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource(IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
623
624 /******************************************************************************/
625 /*-------------------------Global Function Prototypes-------------------------*/
626 /******************************************************************************/
627
628 /** \brief Disable VADC Module
629 * \param vadc Pointer to VADC Module
630 * \return None
631 */
632 IFX_EXTERN void IfxVadc_Adc_disableModule(Ifx_VADC *vadc);
633
634 /** \brief Initialise the VADC to run with the expected frequency and calibration
635 * \param vadc pointer to the VADC handle
636 * \param config pointer to the VADC configuration
637 * \return IfxVadc_Status
638 *
639 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
640 *
641 */
642 IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config);
643
644 /** \brief Initialise buffer with default VADC configuration
645 * \param config pointer to the VADC module configuration
646 * \param vadc pointer to the VADC
647 * \return None
648 *
649 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
650 *
651 */
652 IFX_EXTERN void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc);
653
654 /** \} */
655
656 /** \addtogroup IfxLld_Vadc_Adc_Group
657 * \{ */
658
659 /******************************************************************************/
660 /*-------------------------Inline Function Prototypes-------------------------*/
661 /******************************************************************************/
662
663 /** \brief Gets the current group register set
664 * \param group Group handle data structure
665 * \return Group register set
666 *
667 * Ifx_VADC* vadc = &MODULE_VADC;
668 * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
669 *
670 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
671 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
672 *
673 * //confiure wait for read mode for global result register
674 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
675 * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
676 *
677 * // configure scan
678 * IfxVadc_setScan(group, channels, mask);
679 *
680 * // enable auto scan
681 * IfxVadc_setAutoScan(group, TRUE);
682 *
683 * // start the scan
684 * IfxVadc_startScan(group);
685 *
686 * // wait for conversion to finish
687 *
688 * // fetch the 2 results of conversion for group 0
689 * Ifx_VADC_RES results[10];
690 * result = IfxVadc_getGroupResult(group, results, 0, 2);
691 *
692 */
693 IFX_INLINE Ifx_VADC_G *IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group);
694
695 /** \brief Get conversion result for the group
696 * \param group pointer to the VADC group
697 * \param results pointer to scaled conversion results
698 * \param resultOffset offset for the first result
699 * \param numResults number of results
700 * \return None
701 *
702 * \code
703 * // create configuration
704 * IfxVadc_Adc_Config adcConfig;
705 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
706 *
707 * // initialize module
708 * IfxVadc_Adc vadc;
709 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
710 *
711 * // create group config
712 * IfxVadc_Adc_GroupConfig adcGroupConfig;
713 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
714 *
715 * // change group (default is GroupId0, change to GroupId2)
716 * adcGroupConfig.groupId = IfxVadc_GroupId2;
717 * adcGroupConfig.master = adcGroupConfig.groupId;
718 *
719 * // enable gate in "always" mode (no edge detection)
720 * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
721 *
722 * // enable auto scan
723 * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
724 * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
725 *
726 * // initialize the group
727 * IfxVadc_Adc_Group adcGroup;
728 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
729 *
730 * // create channel config
731 * IfxVadc_Adc_ChannelConfig adcChannelConfig2;
732 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
733 *
734 * // change channel (default is ChannelId0, change to ChannelId2)
735 * adcChannelConfig2.channelId = IfxVadc_ChannelId2;
736 *
737 * // initialize the channel
738 * IfxVadc_Adc_Channel adcChannel2;
739 * IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
740 *
741 * // create channel config
742 * IfxVadc_Adc_ChannelConfig adcChannelConfig5;
743 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
744 *
745 * // change channel (default is ChannelId0, change to ChannelId5)
746 * adcChannelConfig5.channelId = IfxVadc_ChannelId5;
747 * // change channel result register (default is ChannelResult0, change to ChannelResult1)
748 * adcChannelConfig5.resultRegister = IfxVadc_ChannelResult1;
749 *
750 * // initialize the channel
751 * IfxVadc_Adc_Channel adcChannel5;
752 * IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
753 *
754 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
755 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
756 *
757 * // configure wait for read mode
758 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel2, TRUE);
759 * IfxVadc_Adc_configureWaitForReadMode(&adcChannel5, TRUE);
760 *
761 * // configure scan
762 * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
763 *
764 * // start the scan
765 * IfxVadc_Adc_startScan(&adcGroup);
766 *
767 * // wait for conversion to finish
768 * IfxVadc_Status scanStatus;
769 * do
770 * {
771 * scanStatus = IfxVadc_Adc_getScanStatus(&adcGroup);
772 * } while(scanStatus==IfxVadc_Status_ChannelsStillPending);
773 *
774 * // fetch the 2 results of conversion for group 0
775 * Ifx_VADC_RES results[10];
776 * IfxVadc_Adc_getGroupResult(&adcGroup, results, 0, 2);
777 * \endcode
778 *
779 */
780 IFX_INLINE void IfxVadc_Adc_getGroupResult(IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
781
782 /** \brief Gets the current group module register address
783 * \param group Group handle data structure
784 * \return Group module register base address
785 */
786 IFX_INLINE Ifx_VADC *IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group);
787
788 /******************************************************************************/
789 /*-------------------------Global Function Prototypes-------------------------*/
790 /******************************************************************************/
791
792 /** \brief Reset the VADC group
793 * \param group pointer to the VADC group
794 * \return None
795 *
796 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
797 *
798 */
799 IFX_EXTERN void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group);
800
801 /** \brief Get the current group configuration (e.g. vadc frequency)
802 * \param group pointer to the VADC group
803 * \param config pointer to the VADC group configuration
804 * \return None
805 *
806 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
807 *
808 */
809 IFX_EXTERN void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config);
810
811 /** \brief Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first.
812 * \param group pointer to the VADC group
813 * \param config pointer to the VADC group configuration
814 * \return IfxVadc_Status
815 *
816 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
817 *
818 */
819 IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config);
820
821 /** \brief Initialise buffer with default VADC configuration
822 * \param config pointer to the VADC group configuration
823 * \param vadc pointer to the VADC module
824 * \return None
825 *
826 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
827 *
828 */
829 IFX_EXTERN void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc);
830
831 /** \} */
832
833 /** \addtogroup IfxLld_Vadc_Adc_Channel
834 * \{ */
835
836 /******************************************************************************/
837 /*-------------------------Inline Function Prototypes-------------------------*/
838 /******************************************************************************/
839
840 /** \brief pointer to the VADC channel
841 * \param channel pointer to the VADC channel
842 * \param waitForRead wait for read mode enabled/disable
843 * \return None
844 *
845 * For coding example see: \ref IfxVadc_Adc_getGroupResult
846 *
847 */
848 IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode(IfxVadc_Adc_Channel *channel, boolean waitForRead);
849
850 /** \brief Get conversion result (Function does not care about the alignment)
851 * \param channel pointer to the VADC channel
852 * \return scaled Conversion result
853 *
854 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
855 *
856 */
857 IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult(IfxVadc_Adc_Channel *channel);
858
859 /** \brief Get debug result (Function does not care about the alignment)
860 * \param channel pointer to the VADC channel.
861 * \return Debug Conversion result
862 */
863 IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult(IfxVadc_Adc_Channel *channel);
864
865 /******************************************************************************/
866 /*-------------------------Global Function Prototypes-------------------------*/
867 /******************************************************************************/
868
869 /** \brief Get the current channel configuration (e.g. sample settings)
870 * \param channel pointer to the VADC channel
871 * \param config pointer to the VADC channel configuration
872 * \return None
873 *
874 * Example Usage :\ref IfxLld_Vadc_Adc_Usage
875 *
876 */
877 IFX_EXTERN void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config);
878
879 /** \brief get the channel Conversion Time
880 * \param channel Channel
881 * \param conversionMode specifies Compatible mode(Standard Conversion mode).
882 * \return channel conversion time in sec
883 */
884 IFX_EXTERN float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode);
885
886 /** \brief Initialise one channel with given configuration
887 * \param channel pointer to the VADC channel
888 * \param config pointer to the VADC channel configuration
889 * \return IfxVadc_Status
890 *
891 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
892 *
893 */
894 IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config);
895
896 /** \brief Initialise buffer with default channel configuration
897 * \param config pointer to the VADC channel configuration
898 * \param group pointer to the VADC group
899 * \return None
900 *
901 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
902 *
903 */
904 IFX_EXTERN void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group);
905
906 /** \} */
907
908 /** \addtogroup IfxLld_Vadc_Adc_Background_Autoscan
909 * \{ */
910
911 /******************************************************************************/
912 /*-------------------------Inline Function Prototypes-------------------------*/
913 /******************************************************************************/
914
915 /** \brief access function to enable/disable wait for read mode for global result register
916 * \param vadc pointer to the VADC module
917 * \param waitForRead wait for read mode enabled/disabled
918 * \return None
919 *
920 * For coding example see: \ref IfxVadc_Adc_getGlobalResult
921 *
922 */
923 IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxVadc_Adc *vadc, boolean waitForRead);
924
925 /** \brief Gives the background scan status for a group
926 * \param vadc pointer to the VADC module
927 * \return IfxVadc_Status
928 */
929 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus(IfxVadc_Adc *vadc);
930
931 /** \brief returns result stored in global result register
932 * \param vadc pointer to the VADC module
933 * \return global result register
934 *
935 * \code
936 * // create configuration
937 * IfxVadc_Adc_Config adcConfig;
938 * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
939 *
940 * // initialize module
941 * IfxVadc_Adc vadc;
942 * IfxVadc_Adc_initModule(&vadc, &adcConfig);
943 *
944 * // create group config
945 * IfxVadc_Adc_GroupConfig adcGroupConfig;
946 * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
947 *
948 * // change group (default is GroupId_0, change to GroupId_3)
949 * adcGroupConfig.groupId = IfxVadc_GroupId_3;
950 *
951 * // IMPORTANT: usually we use the same group as master!
952 * adcGroupConfig.master = adcGroupConfig.groupId;
953 *
954 * // enable background scan
955 * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
956 * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
957 *
958 * // enable gate in "always" mode (no edge detection)
959 * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
960 *
961 * // initialize the group
962 * IfxVadc_Adc_Group adcGroup;
963 * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
964 *
965 * // create channel config
966 * IfxVadc_Adc_ChannelConfig adcChannelConfig2;
967 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
968 * adcChannelConfig2.backgroundChannel = TRUE;
969 * adcChannelConfig2.globalResultUsage = TRUE;
970 *
971 * // change channel (default is ChannelId0, change to ChannelId2)
972 * adcChannelConfig2.channelId = IfxVadc_ChannelId2;
973 *
974 * // initialize the channel
975 * IfxVadc_Adc_Channel adcChannel2;
976 * IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
977 *
978 * // create channel config
979 * IfxVadc_Adc_ChannelConfig adcChannelConfig5;
980 * IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
981 * adcChannelConfig5.backgroundChannel = TRUE;
982 * adcChannelConfig5.globalResultUsage = TRUE;
983 *
984 * // change channel (default is ChannelId0, change to ChannelId5)
985 * adcChannelConfig5.channelId = IfxVadc_ChannelId5;
986 *
987 *
988 * // initialize the channel
989 * IfxVadc_Adc_Channel adcChannel5;
990 * IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
991 *
992 * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
993 * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
994 *
995 * //configure wait for read mode
996 * IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(&vadc, TRUE);
997 *
998 * // configure background scan
999 * IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroupConfig, channels, mask);
1000 *
1001 * // start the background scan
1002 * IfxVadc_Adc_startBackgroundScan(&vadc);
1003 *
1004 * // wait for valid result for channel 2
1005 * Ifx_VADC_GLOBRES resultChannel2;
1006 * do {
1007 * resultChannel2 = IfxVadc_Adc_getGlobalResult(&vadc);
1008 * } while( !resultChannel2.B.VF );
1009 *
1010 * // wait for valid result for channel 5
1011 * Ifx_VADC_GLOBRES resultChannel5;
1012 * do {
1013 * resultChannel5 = IfxVadc_Adc_getGlobalResult(&vadc);
1014 * } while( !resultChannel5.B.VF );
1015 * \endcode
1016 *
1017 */
1018 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult(IfxVadc_Adc *vadc);
1019
1020 /** \brief configures a background scan
1021 * \param vadc pointer to the VADC module
1022 * \param group pointer to the VADC group
1023 * \param channels specifies the channels which should be enabled/disabled
1024 * \param mask specifies the channels which should be modified
1025 * \return None
1026 *
1027 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1028 *
1029 */
1030 IFX_INLINE void IfxVadc_Adc_setBackgroundScan(IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask);
1031
1032 /** \brief Starts a background scan
1033 * \param vadc pointer to the VADC module
1034 * \return None
1035 *
1036 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1037 *
1038 */
1039 IFX_INLINE void IfxVadc_Adc_startBackgroundScan(IfxVadc_Adc *vadc);
1040
1041 /** \} */
1042
1043 /** \addtogroup IfxLld_Vadc_Adc_ChannelScan
1044 * \{ */
1045
1046 /******************************************************************************/
1047 /*-------------------------Inline Function Prototypes-------------------------*/
1048 /******************************************************************************/
1049
1050 /** \brief Gives the scan status for a group.
1051 * \param group pointer to the VADC group
1052 * \return IfxVadc_Status
1053 *
1054 * For coding example see: \ref IfxVadc_Adc_getResultBasedOnRequestSource
1055 *
1056 */
1057 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus(IfxVadc_Adc_Group *group);
1058
1059 /** \brief Configures an autoscan.
1060 * \param group pointer to the VADC group
1061 * \param channels specifies the channels which should be enabled/disabled
1062 * \param mask specifies the channels which should be modified
1063 * \return None
1064 *
1065 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1066 *
1067 */
1068 IFX_INLINE void IfxVadc_Adc_setScan(IfxVadc_Adc_Group *group, uint32 channels, uint32 mask);
1069
1070 /** \brief Starts an autoscan on the specified group
1071 * \param group pointer to the VADC group
1072 * \return None
1073 *
1074 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1075 *
1076 */
1077 IFX_INLINE void IfxVadc_Adc_startScan(IfxVadc_Adc_Group *group);
1078
1079 /** \} */
1080
1081 /** \addtogroup IfxLld_Vadc_Adc_Queue
1082 * \{ */
1083
1084 /******************************************************************************/
1085 /*-------------------------Inline Function Prototypes-------------------------*/
1086 /******************************************************************************/
1087
1088 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
1089 * refill
1090 * source interrupt enable/disable
1091 * external trigger control
1092 * \param channel pointer to the VADC channel
1093 * \param options options for channel
1094 * \return None
1095 *
1096 * For coding example see: \ref IfxVadc_Adc_getResult
1097 *
1098 */
1099 IFX_INLINE void IfxVadc_Adc_addToQueue(IfxVadc_Adc_Channel *channel, uint32 options);
1100
1101 /** \brief Flush the contents of the queue of a group
1102 * \param group pointer to the VADC group
1103 * \return None
1104 *
1105 * For coding example see: \ref IfxVadc_Adc_getResult
1106 *
1107 */
1108 IFX_INLINE void IfxVadc_Adc_clearQueue(IfxVadc_Adc_Group *group);
1109
1110 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
1111 * \param group pointer to the VADC group
1112 * \return Queue status
1113 *
1114 * For coding example see: \ref IfxVadc_Adc_getResult
1115 *
1116 */
1117 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus(IfxVadc_Adc_Group *group);
1118
1119 /** \brief Starts a queue of a group by generating a trigger event through software
1120 * \param group pointer to the VADC group
1121 * \return None
1122 *
1123 * For coding example see: \ref IfxLld_Vadc_Adc_Usage
1124 *
1125 */
1126 IFX_INLINE void IfxVadc_Adc_startQueue(IfxVadc_Adc_Group *group);
1127
1128 /** \} */
1129
1130 /** \addtogroup IfxLld_Vadc_Adc_Emux
1131 * \{ */
1132
1133 /******************************************************************************/
1134 /*-------------------------Global Function Prototypes-------------------------*/
1135 /******************************************************************************/
1136
1137 /** \brief initialise default configuration for external multiplexer
1138 * \param emuxConfig speciifies EMUX configuration
1139 * \param vadc pointer to VADC module space
1140 * \return None
1141 */
1142 IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc);
1143
1144 /** \brief initalise external multiplexer.
1145 * \param vadc Pointer to VADC Module space
1146 * \param emuxControl speciifies EMUX configuration
1147 * \return None
1148 */
1149 IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl);
1150
1151 /** \} */
1152
1153 /******************************************************************************/
1154 /*---------------------Inline Function Implementations------------------------*/
1155 /******************************************************************************/
1156
1157 IFX_INLINE void IfxVadc_Adc_addToQueue(IfxVadc_Adc_Channel *channel, uint32 options)
1158 {
1159 IfxVadc_addToQueue(channel->group->group, channel->channel, options);
1160 }
1161
1162
1163 IFX_INLINE void IfxVadc_Adc_clearQueue(IfxVadc_Adc_Group *group)
1164 {
1165 IfxVadc_clearQueue(group->group, TRUE);
1166 }
1167
1168
1169 IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode(IfxVadc_Adc_Channel *channel, boolean waitForRead)
1170 {
1171 IfxVadc_configureWaitForReadMode(channel->group->group, channel->resultreg, waitForRead);
1172 }
1173
1174
1175 IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxVadc_Adc *vadc, boolean waitForRead)
1176 {
1177 IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc->vadc, waitForRead);
1178 }
1179
1180
1181 IFX_INLINE void IfxVadc_Adc_deInitModule(IfxVadc_Adc *vadc)
1182 {
1183 Ifx_VADC *vadcSFR = vadc->vadc;
1184
1185 IfxVadc_resetKernel(vadcSFR);
1186 }
1187
1188
1189 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus(IfxVadc_Adc *vadc)
1190 {
1191 return IfxVadc_getBackgroundScanStatus(vadc->vadc);
1192 }
1193
1194
1195 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult(IfxVadc_Adc *vadc)
1196 {
1197 return IfxVadc_getGlobalResult(vadc->vadc);
1198 }
1199
1200
1201 IFX_INLINE Ifx_VADC_G *IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group)
1202 {
1203 return group->group;
1204 }
1205
1206
1207 IFX_INLINE void IfxVadc_Adc_getGroupResult(IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1208 {
1209 IfxVadc_getGroupResult(group->group, results, resultOffset, numResults);
1210 }
1211
1212
1213 IFX_INLINE void IfxVadc_Adc_getModuleConfig(IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
1214 {
1215 config->vadc = vadc->vadc;
1216 config->analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc->vadc);
1217 config->digitalFrequency = IfxVadc_getAdcDigitalFrequency(vadc->vadc);
1218 config->globalInputClass[0].resolution = IfxVadc_getGlobalResolution(vadc->vadc, 0);
1219 config->globalInputClass[1].resolution = IfxVadc_getGlobalResolution(vadc->vadc, 1);
1220 config->globalInputClass[0].sampleTime = IfxVadc_getGlobalSampleTime(vadc->vadc, 0, config->analogFrequency);
1221 config->globalInputClass[1].sampleTime = IfxVadc_getGlobalSampleTime(vadc->vadc, 1, config->analogFrequency);
1222 config->moduleFrequency = IfxVadc_getAdcModuleFrequency();
1223 config->startupCalibration = IfxVadc_getStartupCalibration(vadc->vadc);
1224 }
1225
1226
1227 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus(IfxVadc_Adc_Group *group)
1228 {
1229 return IfxVadc_getQueueStatus(group->group);
1230 }
1231
1232
1233 IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult(IfxVadc_Adc_Channel *channel)
1234 {
1235 return IfxVadc_getResult(channel->group->group, channel->resultreg);
1236 }
1237
1238
1239 IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource(IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
1240 {
1241 return IfxVadc_getResultBasedOnRequestSource(group->module.vadc, group->group, channel, sourceType);
1242 }
1243
1244
1245 IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus(IfxVadc_Adc_Group *group)
1246 {
1247 return IfxVadc_getScanStatus(group->group);
1248 }
1249
1250
1251 IFX_INLINE Ifx_VADC *IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group)
1252 {
1253 return group->module.vadc;
1254 }
1255
1256
1257 IFX_INLINE void IfxVadc_Adc_setBackgroundScan(IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
1258 {
1259 IfxVadc_setBackgroundScan(vadc->vadc, group->groupId, channels, mask);
1260 }
1261
1262
1263 IFX_INLINE void IfxVadc_Adc_setScan(IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
1264 {
1265 IfxVadc_setScan(group->group, channels, mask);
1266 }
1267
1268
1269 IFX_INLINE void IfxVadc_Adc_startBackgroundScan(IfxVadc_Adc *vadc)
1270 {
1271 IfxVadc_startBackgroundScan(vadc->vadc);
1272 }
1273
1274
1275 IFX_INLINE void IfxVadc_Adc_startQueue(IfxVadc_Adc_Group *group)
1276 {
1277 IfxVadc_startQueue(group->group);
1278 }
1279
1280
1281 IFX_INLINE void IfxVadc_Adc_startScan(IfxVadc_Adc_Group *group)
1282 {
1283 IfxVadc_startScan(group->group);
1284 }
1285
1286
1287 IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult(IfxVadc_Adc_Channel *channel)
1288 {
1289 return IfxVadc_getDebugResult(channel->group->group, channel->resultreg);
1290 }
1291
1292
1293 #endif /* IFXVADC_ADC_H */
IfxVadc_Adc_setScan
IFX_INLINE void IfxVadc_Adc_setScan(IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
Configures an autoscan.
Definition: IfxVadc_Adc.h:1263
IfxVadc_Adc_ChannelConfig::channelSrcNr
IfxVadc_SrcNr channelSrcNr
Service node of the channel trigger.
Definition: IfxVadc_Adc.h:469
IfxVadc_Adc_getGlobalResult
IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult(IfxVadc_Adc *vadc)
returns result stored in global result register
Definition: IfxVadc_Adc.h:1195
IfxVadc_Adc_GatingTriggerConfig
Gating/Trigger configuration structure.
Definition: IfxVadc_Adc.h:367
IfxVadc_Adc_EmuxControl::channels
uint8 channels
specifies channel number
Definition: IfxVadc_Adc.h:507
IfxVadc_Adc_GroupConfig::module
IFX_CONST IfxVadc_Adc * module
Specifies pointer to the IfxVadc_Adc module handle.
Definition: IfxVadc_Adc.h:517
IfxVadc_Adc_QueueConfig
Queue configuration structure.
Definition: IfxVadc_Adc.h:418
IfxVadc_Adc_ChannelConfig::synchonize
boolean synchonize
Specifies synchronized conversion channel.
Definition: IfxVadc_Adc.h:461
IfxVadc_ChannelId
IfxVadc_ChannelId
VADC Channels.
Definition: IfxVadc.h:122
IfxVadc_Adc_Config::moduleFrequency
float32 moduleFrequency
module Frequency in Hz.
Definition: IfxVadc_Adc.h:489
IfxVadc_ChannelSelectionStyle
IfxVadc_ChannelSelectionStyle
External Multiplexer Channel Selection Style as defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCSS.
Definition: IfxVadc.h:186
IfxVadc_getResultBasedOnRequestSource
Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.c:285
IfxVadc_EmuxCodingScheme
IfxVadc_EmuxCodingScheme
Specifies the External Coding scheme(binary/gray) defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD.
Definition: IfxVadc.h:203
IfxVadc_Adc_ChannelConfig
Channel configuration structure.
Definition: IfxVadc_Adc.h:458
IfxVadc_startBackgroundScan
IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
Starts a background scan.
Definition: IfxVadc.h:2442
IfxVadc_Adc_Config::supplyVoltage
IfxVadc_LowSupplyVoltageSelect supplyVoltage
Select Low Power Supply Voltage.
Definition: IfxVadc_Adc.h:493
IfxVadc_Adc_initGroupConfig
IFX_EXTERN void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
Initialise buffer with default VADC configuration.
Definition: IfxVadc_Adc.c:674
IfxVadc_ConversionType
IfxVadc_ConversionType
type of conversion
Definition: IfxVadc.h:195
IfxVadc_Adc_Channel::resultreg
IfxVadc_ChannelResult resultreg
Specifies allocated result register.
Definition: IfxVadc_Adc.h:452
IfxVadc_Adc_ChannelConfig::inputClass
IfxVadc_InputClasses inputClass
Specifies input class selection.
Definition: IfxVadc_Adc.h:471
IfxVadc_Adc_Config::globalInputClass
IfxVadc_Adc_ClassConfig globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES]
Specifies the global conversion settings one and two.
Definition: IfxVadc_Adc.h:486
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
IfxVadc_Adc_Channel::channel
IfxVadc_ChannelId channel
Specifies the channel index.
Definition: IfxVadc_Adc.h:451
IfxVadc_Adc_initModuleConfig
IFX_EXTERN void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
Initialise buffer with default VADC configuration.
Definition: IfxVadc_Adc.c:780
IfxVadc_Adc_setBackgroundScan
IFX_INLINE void IfxVadc_Adc_setBackgroundScan(IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
configures a background scan
Definition: IfxVadc_Adc.h:1257
IfxVadc_ArbitrationRounds
IfxVadc_ArbitrationRounds
Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
Definition: IfxVadc.h:80
IfxVadc_Adc_GatingTriggerConfig::gatingMode
IfxVadc_GatingMode gatingMode
Specifies gating mode. High level, Low Level or Gating disabled.
Definition: IfxVadc_Adc.h:371
IfxVadc_Adc_EmuxControl::code
IfxVadc_EmuxCodingScheme code
specifes binary/gray code
Definition: IfxVadc_Adc.h:504
IfxVadc_Adc_getModuleConfig
IFX_INLINE void IfxVadc_Adc_getModuleConfig(IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
Get the current VADC configuration (e.g. VADC frequency)
Definition: IfxVadc_Adc.h:1213
IfxVadc_Adc_initChannelConfig
IFX_EXTERN void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
Initialise buffer with default channel configuration.
Definition: IfxVadc_Adc.c:424
IfxVadc_ChannelReference
IfxVadc_ChannelReference
ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:145
IfxVadc_Adc_GroupConfig::queueRequest
IfxVadc_Adc_QueueConfig queueRequest
Specifies queued mode configuration.
Definition: IfxVadc_Adc.h:522
IfxVadc_Adc_initChannel
IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
Initialise one channel with given configuration.
Definition: IfxVadc_Adc.c:330
IfxVadc_Adc_ChannelConfig::channelServProvider
IfxSrc_Tos channelServProvider
Interrupt service provider for the channel trigger interrupt.
Definition: IfxVadc_Adc.h:467
IfxVadc_getAdcDigitalFrequency
float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
Returns the configured Fadcd VADC digital clock frequency in Hz.
Definition: IfxVadc.c:169
IfxVadc_getQueueStatus
IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxVadc.c:267
IfxVadc_Adc_getGroupConfig
IFX_EXTERN void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
Get the current group configuration (e.g. vadc frequency)
Definition: IfxVadc_Adc.c:216
IfxVadc_Adc_GroupConfig::backgroundScanRequest
IfxVadc_Adc_BackgroundScanConfig backgroundScanRequest
Specifies back ground scan configuration.
Definition: IfxVadc_Adc.h:523
IfxVadc_Adc_QueueConfig::flushQueueAfterInit
boolean flushQueueAfterInit
Specifies if the queue is flushed after configuration.
Definition: IfxVadc_Adc.h:420
IfxPort_OutputMode
IfxPort_OutputMode
Pin output mode definition.
Definition: IfxPort.h:114
IfxVadc_Adc_GatingTriggerConfig::triggerSource
IfxVadc_TriggerSource triggerSource
Specifies used Trigger input for group.
Definition: IfxVadc_Adc.h:370
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxVadc_Adc_ChannelConfig::resultServProvider
IfxSrc_Tos resultServProvider
Interrupt service provider for the result trigger interrupt.
Definition: IfxVadc_Adc.h:466
float32
float float32
Definition: Platform_Types.h:167
IfxVadc_Adc_getChannelConversionTime
IFX_EXTERN float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
get the channel Conversion Time
Definition: IfxVadc_Adc.c:210
IfxVadc_Adc_ChannelConfig::upperBoundary
IfxVadc_BoundarySelection upperBoundary
Specifies upper boundary selection.
Definition: IfxVadc_Adc.h:475
Ifx_Assert.h
Assert functions.
IfxVadc_Adc_EmuxControl::mode
IfxVadc_ExternalMultiplexerMode mode
Specifies the External Multiplexer mode.
Definition: IfxVadc_Adc.h:501
IfxVadc_Adc_Config
VADC module configuration structure.
Definition: IfxVadc_Adc.h:483
IfxVadc_Adc
VADC handle data structure.
Definition: IfxVadc_Adc.h:360
IfxVadc_Emux_Out
VADC External Mux pin mapping structure.
Definition: IfxVadc_PinMap.h:48
IfxVadc_Adc_getDebugResult
IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult(IfxVadc_Adc_Channel *channel)
Get debug result (Function does not care about the alignment)
Definition: IfxVadc_Adc.h:1287
IfxVadc_Adc_getResult
IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult(IfxVadc_Adc_Channel *channel)
Get conversion result (Function does not care about the alignment)
Definition: IfxVadc_Adc.h:1233
IfxVadc_ChannelResolution
IfxVadc_ChannelResolution
ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
Definition: IfxVadc.h:153
IfxVadc_TriggerMode
IfxVadc_TriggerMode
trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
Definition: IfxVadc.h:458
IfxVadc_getGlobalResult
IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
return conversion result stored in the Global result Register
Definition: IfxVadc.h:1969
IfxVadc_Adc_GatingTriggerConfig::gatingSource
IfxVadc_GatingSource gatingSource
Specifies used gate input for group.
Definition: IfxVadc_Adc.h:369
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
IfxVadc_Adc_getScanStatus
IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus(IfxVadc_Adc_Group *group)
Gives the scan status for a group.
Definition: IfxVadc_Adc.h:1245
IfxVadc_RequestSource
IfxVadc_RequestSource
Request sources.
Definition: IfxVadc.h:411
IfxVadc_ChannelResult
IfxVadc_ChannelResult
Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:163
IfxVadc_GatingMode
IfxVadc_GatingMode
gating mode defined in MODULE_VADC.BRSMR.ENGT
Definition: IfxVadc.h:264
IfxVadc_BoundarySelection
IfxVadc_BoundarySelection
BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:112
IfxVadc_Adc_initExternalMultiplexerMode
IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
initalise external multiplexer.
Definition: IfxVadc_Adc.c:817
IfxVadc_Adc_ChannelConfig::limitCheck
IfxVadc_LimitCheck limitCheck
Specifies boundary band selection upper/lower.
Definition: IfxVadc_Adc.h:477
IfxVadc_Adc_EmuxPinConfig::padDriver
IfxPort_PadDriver padDriver
Pad driver.
Definition: IfxVadc_Adc.h:442
IfxVadc_getGroupResult
IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxVadc.h:1998
IfxVadc_setBackgroundScan
IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
configures a background scan; can also stop autoscan if all channels are 0
Definition: IfxVadc.h:2210
IfxVadc_setScan
void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
Configures an (auto-)scan.
Definition: IfxVadc.c:534
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IfxVadc_Adc_ClassConfig
Input class configuration structure.
Definition: IfxVadc_Adc.h:401
IfxVadc_Adc_BackgroundScanConfig::triggerConfig
IfxVadc_Adc_GatingTriggerConfig triggerConfig
trigger and gating configuration.
Definition: IfxVadc_Adc.h:394
IfxVadc_Adc_startBackgroundScan
IFX_INLINE void IfxVadc_Adc_startBackgroundScan(IfxVadc_Adc *vadc)
Starts a background scan.
Definition: IfxVadc_Adc.h:1269
IfxVadc_EmuxSampleTimeControl
IfxVadc_EmuxSampleTimeControl
External Multiplexer sample time control defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST.
Definition: IfxVadc.h:220
IfxVadc_Adc_getGroupRegsFromGroup
IFX_INLINE Ifx_VADC_G * IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group)
Gets the current group register set.
Definition: IfxVadc_Adc.h:1201
IfxVadc_Adc_GroupConfig::master
IfxVadc_GroupId master
Specifies the master group. If master is different from groupId, then the group is configured as slav...
Definition: IfxVadc_Adc.h:519
IfxVadc_startScan
IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
Starts an autoscan on the specified group.
Definition: IfxVadc.h:2454
IFXVADC_NUM_INPUTCLASSES
#define IFXVADC_NUM_INPUTCLASSES
Number of group specific Input Class.
Definition: IfxVadc_cfg.h:71
IfxVadc_Adc::vadc
Ifx_VADC * vadc
Specifies the pointer to the VADC module registers.
Definition: IfxVadc_Adc.h:362
IfxVadc_Adc_ScanConfig::autoscanEnabled
boolean autoscanEnabled
Specifies autoscan functionality.
Definition: IfxVadc_Adc.h:430
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxVadc_Adc_Config::startupCalibration
boolean startupCalibration
Can be enabled to execute a startup calibration (disabled by default). Note that this option will als...
Definition: IfxVadc_Adc.h:490
IfxVadc_Adc_BackgroundScanConfig::requestSlotStartMode
IfxVadc_RequestSlotStartMode requestSlotStartMode
start mode for request background scan source.
Definition: IfxVadc_Adc.h:396
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
IfxVadc_EmuxInterface
IfxVadc_EmuxInterface
Specifies the Emux interface.
Definition: IfxVadc.h:211
IfxVadc_Adc_getVadcFromGroup
IFX_INLINE Ifx_VADC * IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group)
Gets the current group module register address.
Definition: IfxVadc_Adc.h:1251
IfxVadc_Adc_EmuxControl::channelSelectionStyle
IfxVadc_ChannelSelectionStyle channelSelectionStyle
External Multiplexer Channel Selection Style.
Definition: IfxVadc_Adc.h:510
IfxVadc_Adc_ClassConfig::sampleTime
float32 sampleTime
Specifies the requested sample time for input class.
Definition: IfxVadc_Adc.h:403
IfxVadc_InputClasses
IfxVadc_InputClasses
inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16) ...
Definition: IfxVadc.h:296
IfxVadc_Adc_EmuxControl::startChannel
IfxVadc_EmuxSelectValue startChannel
specifies the external channel start value(EMUX[x:0]) x- specifies external channel number ...
Definition: IfxVadc_Adc.h:502
IfxVadc_RequestSlotPriority
IfxVadc_RequestSlotPriority
Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:393
IfxVadc_ExternalMultiplexerMode
IfxVadc_ExternalMultiplexerMode
Specifies External Multiplexer Mode define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE.
Definition: IfxVadc.h:244
IfxVadc_Adc_EmuxControl
Emux Control Structure.
Definition: IfxVadc_Adc.h:498
IfxVadc_Adc_addToQueue
IFX_INLINE void IfxVadc_Adc_addToQueue(IfxVadc_Adc_Channel *channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxVadc_Adc.h:1157
IfxVadc_Adc_ChannelConfig::globalResultUsage
boolean globalResultUsage
Specifies storage in global result register.
Definition: IfxVadc_Adc.h:460
IfxVadc_startQueue
IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxVadc.h:2448
IfxVadc_Adc_ChannelConfig::rightAlignedStorage
boolean rightAlignedStorage
Specifies result is right aligned.
Definition: IfxVadc_Adc.h:463
IfxVadc_Adc_EmuxControl::emuxOutPinConfig
IfxVadc_Adc_EmuxPinConfig emuxOutPinConfig
configure the emux output pin
Definition: IfxVadc_Adc.h:509
IFXVADC_NUM_GLOBAL_INPUTCLASSES
#define IFXVADC_NUM_GLOBAL_INPUTCLASSES
Number of ADC group input classes.
Definition: IfxVadc_cfg.h:81
IfxVadc_Adc_ChannelConfig::resultPriority
Ifx_Priority resultPriority
Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable.
Definition: IfxVadc_Adc.h:464
IfxVadc_Adc_ChannelConfig::boundaryMode
IfxVadc_BoundaryExtension boundaryMode
Specifies Standard mode of fast compare mode.
Definition: IfxVadc_Adc.h:476
IfxVadc_Adc_ArbiterConfig::requestSlotScanEnabled
boolean requestSlotScanEnabled
request scan if enabled.
Definition: IfxVadc_Adc.h:385
IfxVadc_Adc_deInitModule
IFX_INLINE void IfxVadc_Adc_deInitModule(IfxVadc_Adc *vadc)
Reset the VADC module.
Definition: IfxVadc_Adc.h:1181
IfxVadc_Adc_ChannelConfig::resultSrcNr
IfxVadc_SrcNr resultSrcNr
Service node of the result trigger.
Definition: IfxVadc_Adc.h:468
IfxVadc_getStartupCalibration
IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
get SUCAL bit field status
Definition: IfxVadc.h:2112
IfxVadc_LowSupplyVoltageSelect
IfxVadc_LowSupplyVoltageSelect
Low Power Supply Voltage Select.
Definition: IfxVadc.h:316
IfxVadc_Adc_Channel
Channel handle data structure.
Definition: IfxVadc_Adc.h:449
IfxVadc_Adc_Group::groupId
IfxVadc_GroupId groupId
Specifies the group index.
Definition: IfxVadc_Adc.h:413
IfxVadc_Adc_getBackgroundScanStatus
IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus(IfxVadc_Adc *vadc)
Gives the background scan status for a group.
Definition: IfxVadc_Adc.h:1189
IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxVadc_Adc *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register
Definition: IfxVadc_Adc.h:1175
IfxVadc_Adc_getQueueStatus
IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus(IfxVadc_Adc_Group *group)
Gives the status of the Queue of a group by returning non zero value if the Queue is full...
Definition: IfxVadc_Adc.h:1227
IfxVadc_getBackgroundScanStatus
IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
Gives the background scan status for a group.
Definition: IfxVadc.c:181
IfxVadc_Adc_ChannelConfig::reference
IfxVadc_ChannelReference reference
Specifies Reference selection.
Definition: IfxVadc_Adc.h:472
IfxVadc_Adc_BackgroundScanConfig::requestSlotPrio
IfxVadc_RequestSlotPriority requestSlotPrio
priority of used background scan request slot.
Definition: IfxVadc_Adc.h:395
IfxVadc_Adc_ChannelConfig::channelPriority
Ifx_Priority channelPriority
Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable.
Definition: IfxVadc_Adc.h:465
IfxVadc_addToQueue
IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
Add an entry to the queue of a group for the specified channel with the following options set: refill...
Definition: IfxVadc.h:1713
IfxVadc_Adc_ChannelConfig::resultRegister
IfxVadc_ChannelResult resultRegister
Specifies Result register selection.
Definition: IfxVadc_Adc.h:473
IfxVadc_EmuxSelectValue
IfxVadc_EmuxSelectValue
specifies the External Channel Start select value defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
Definition: IfxVadc.h:229
IfxVadc_Adc_startQueue
IFX_INLINE void IfxVadc_Adc_startQueue(IfxVadc_Adc_Group *group)
Starts a queue of a group by generating a trigger event through software.
Definition: IfxVadc_Adc.h:1275
IfxPort_PadDriver
IfxPort_PadDriver
Pad driver mode definition (strength and slew rate).
Definition: IfxPort.h:124
IfxVadc_Adc_GroupConfig::arbiter
IfxVadc_Adc_ArbiterConfig arbiter
Arbiter configuration structure.
Definition: IfxVadc_Adc.h:525
IfxVadc_Adc_getResultBasedOnRequestSource
IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource(IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
Get conversion result based on the Request Source. (Function does not care about the alignment) value...
Definition: IfxVadc_Adc.h:1239
IfxVadc_BoundaryExtension
IfxVadc_BoundaryExtension
Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:90
IfxVadc_Adc_EmuxControl::sampleTimeControl
IfxVadc_EmuxSampleTimeControl sampleTimeControl
specifies when to use sample time control
Definition: IfxVadc_Adc.h:505
IfxVadc_getDebugResult
IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx)
Get debug conversion result.
Definition: IfxVadc.h:2466
IfxVadc_getGlobalResolution
IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
get global input class resolution
Definition: IfxVadc.h:1963
IfxVadc_Adc_GroupConfig
Group configuration structure.
Definition: IfxVadc_Adc.h:515
IfxVadc_Adc_getGroupResult
IFX_INLINE void IfxVadc_Adc_getGroupResult(IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
Get conversion result for the group.
Definition: IfxVadc_Adc.h:1207
IfxVadc_getScanStatus
IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
Gives the scan status for a group.
Definition: IfxVadc.c:335
IfxVadc_Adc_Group
Group handle data structure.
Definition: IfxVadc_Adc.h:409
IfxVadc_Adc_ChannelConfig::backgroundChannel
boolean backgroundChannel
Specifies channel is used as background channel.
Definition: IfxVadc_Adc.h:462
IfxVadc_Adc_Channel::group
IFX_CONST IfxVadc_Adc_Group * group
Specifies the group of the channel.
Definition: IfxVadc_Adc.h:453
IfxVadc_Adc_Config::analogFrequency
float32 analogFrequency
Specifies analog ADC Frequency.
Definition: IfxVadc_Adc.h:488
IfxVadc_Adc_clearQueue
IFX_INLINE void IfxVadc_Adc_clearQueue(IfxVadc_Adc_Group *group)
Flush the contents of the queue of a group.
Definition: IfxVadc_Adc.h:1163
IfxVadc_Adc_EmuxControl::emuxInterface
IfxVadc_EmuxInterface emuxInterface
specifies the Emux interface
Definition: IfxVadc_Adc.h:508
IfxVadc_Adc_configureWaitForReadMode
IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode(IfxVadc_Adc_Channel *channel, boolean waitForRead)
pointer to the VADC channel
Definition: IfxVadc_Adc.h:1169
IfxVadc_Adc_SYNCTR_STSEL
uint8 IfxVadc_Adc_SYNCTR_STSEL
Definition: IfxVadc_Adc.h:350
IfxVadc_TriggerSource
IfxVadc_TriggerSource
Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxVadc.h:468
IfxVadc_getResult
IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
Get conversion result (Function does not care about the alignment) value = raw * gain + offset...
Definition: IfxVadc.h:2066
IfxVadc_Adc_ChannelConfig::channelId
IfxVadc_ChannelId channelId
Specifies the channel index.
Definition: IfxVadc_Adc.h:470
IfxVadc_Adc_initExternalMultiplexerModeConfig
IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
initialise default configuration for external multiplexer
Definition: IfxVadc_Adc.c:796
IfxVadc_LimitCheck
IfxVadc_LimitCheck
ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
Definition: IfxVadc.h:306
IfxVadc_Adc_Config::digitalFrequency
float32 digitalFrequency
Specifies digital ADC Frequency.
Definition: IfxVadc_Adc.h:487
IfxVadc_Adc_Group::group
Ifx_VADC_G * group
Pointer to the group registers.
Definition: IfxVadc_Adc.h:412
IfxVadc_Adc_GroupConfig::disablePostCalibration
boolean disablePostCalibration
Specifies if calibration after conversion (post calibration) should be disabled.
Definition: IfxVadc_Adc.h:524
IfxVadc_Adc_BackgroundScanConfig::autoBackgroundScanEnabled
boolean autoBackgroundScanEnabled
background autoscan functionality enable or disable.
Definition: IfxVadc_Adc.h:393
IfxVadc_getGlobalSampleTime
IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
get global input class sample time in sec
Definition: IfxVadc.h:1979
IfxVadc_Adc_ChannelConfig::lowerBoundary
IfxVadc_BoundarySelection lowerBoundary
Specifies lower boundary selection.
Definition: IfxVadc_Adc.h:474
IfxVadc_Adc_GatingTriggerConfig::triggerMode
IfxVadc_TriggerMode triggerMode
Specifies trigger mode. Rising, falling any edge leads to an trigger event.
Definition: IfxVadc_Adc.h:372
IfxVadc_getAdcAnalogFrequency
float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
Returns the configured Fadci VADC analog clock frequency in Hz.
Definition: IfxVadc.c:163
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:99
IfxVadc_RequestSlotStartMode
IfxVadc_RequestSlotStartMode
Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
Definition: IfxVadc.h:403
IfxVadc_Adc_disableModule
IFX_EXTERN void IfxVadc_Adc_disableModule(Ifx_VADC *vadc)
Disable VADC Module.
Definition: IfxVadc_Adc.c:124
IfxVadc_Adc_ScanConfig
Scan mode configuration structure.
Definition: IfxVadc_Adc.h:428
IfxVadc_Adc_EmuxPinConfig
Definition: IfxVadc_Adc.h:438
IfxVadc_Adc_ClassConfig::resolution
IfxVadc_ChannelResolution resolution
Specifies the conversion Mode 8,10,12Bit or 10bit fast compare.
Definition: IfxVadc_Adc.h:404
IfxVadc_Adc_initGroup
IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first...
Definition: IfxVadc_Adc.c:452
IfxVadc_Adc_Group::module
IfxVadc_Adc module
The VADC handle structure.
Definition: IfxVadc_Adc.h:411
IfxVadc_getAdcModuleFrequency
float32 IfxVadc_getAdcModuleFrequency(void)
Module Frequency in Hz.
Definition: IfxVadc.c:175
IfxVadc_Status
IfxVadc_Status
API return values defined in MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U MODULE_VADC.BRSPNDx
Definition: IfxVadc.h:445
IfxVadc_Adc_ArbiterConfig::requestSlotQueueEnabled
boolean requestSlotQueueEnabled
request queue if enabled.
Definition: IfxVadc_Adc.h:384
IfxVadc_Adc_ArbiterConfig
Arbiter configuration structure.
Definition: IfxVadc_Adc.h:381
IfxVadc_Adc_getChannelConfig
IFX_EXTERN void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
Get the current channel configuration (e.g. sample settings)
Definition: IfxVadc_Adc.c:130
IfxVadc_Adc_ArbiterConfig::arbiterRoundLength
IfxVadc_ArbitrationRounds arbiterRoundLength
Specifies arbiter round length.
Definition: IfxVadc_Adc.h:383
IfxVadc_resetKernel
void IfxVadc_resetKernel(Ifx_VADC *vadc)
Resets the kernel.
Definition: IfxVadc.c:477
TRUE
#define TRUE
Definition: Platform_Types.h:87
IfxVadc_Adc_startScan
IFX_INLINE void IfxVadc_Adc_startScan(IfxVadc_Adc_Group *group)
Starts an autoscan on the specified group.
Definition: IfxVadc_Adc.h:1281
IfxVadc_clearQueue
IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
Clears all the queue entries including backup stage.
Definition: IfxVadc.h:1748
IfxVadc_Adc_initModule
IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
Initialise the VADC to run with the expected frequency and calibration.
Definition: IfxVadc_Adc.c:725
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxVadc_Adc_deInitGroup
IFX_EXTERN void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group)
Reset the VADC group.
Definition: IfxVadc_Adc.c:110
IfxVadc_GatingSource
IfxVadc_GatingSource
External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
Definition: IfxVadc.h:274
IfxVadc_configureWaitForReadMode
IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
access function to enable/disable wait for read mode for result registers
Definition: IfxVadc.h:1754
IfxVadc_Adc_ArbiterConfig::requestSlotBackgroundScanEnabled
boolean requestSlotBackgroundScanEnabled
request background scan if enabled.
Definition: IfxVadc_Adc.h:386
IfxVadc_SrcNr
IfxVadc_SrcNr
Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
Definition: IfxVadc.h:429
IfxVadc_Adc_BackgroundScanConfig
Background scan mode configuration structure.
Definition: IfxVadc_Adc.h:391
IfxVadc.h
VADC basic functionality.
IfxVadc_Adc_EmuxPinConfig::outputMode
IfxPort_OutputMode outputMode
the pin output mode which should be configured
Definition: IfxVadc_Adc.h:441
IfxVadc_Adc_GroupConfig::scanRequest
IfxVadc_Adc_ScanConfig scanRequest
Specifies scan mode configuration.
Definition: IfxVadc_Adc.h:521
IfxVadc_configureWaitForReadModeForGlobalResultRegister
IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
access function to enable/disable wait for read mode for global result register
Definition: IfxVadc.h:1760


iLLD_TC26B: IfxVadc_PinMap.c Source File

  • _PinMap
IfxVadc_PinMap.c
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_PinMap.c
3 * \brief VADC I/O map
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 */
25
26 #include "IfxVadc_PinMap.h"
27
28 IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT = {&MODULE_VADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5};
29 IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT = {&MODULE_VADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5};
30 IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT = {&MODULE_VADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5};
31 IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT = {&MODULE_VADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5};
32 IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT = {&MODULE_VADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5};
33 IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT = {&MODULE_VADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5};
34 IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT = {&MODULE_VADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5};
35 IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT = {&MODULE_VADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5};
36 IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT = {&MODULE_VADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5};
37 IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT = {&MODULE_VADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5};
38 IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT = {&MODULE_VADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5};
39 IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT = {&MODULE_VADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5};
40 IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6};
41 IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6};
42 IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6};
43 IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6};
44 IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6};
45 IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt6};
46 IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6};
47 IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt6};
48 IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt5};
49 IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5};
50 IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt3};
51 IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3};
52 IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt5};
53 IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt7};
54 IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5};
55 IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt4};
56 IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5};
57 IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt2};
58 IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 0}, 0};
59 IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,10}, 10};
60 IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,11}, 11};
61 IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,12}, 12};
62 IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,13}, 13};
63 IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 1}, 1};
64 IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 2}, 2};
65 IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 3}, 3};
66 IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 4}, 4};
67 IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 5}, 5};
68 IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 6}, 6};
69 IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 7}, 7};
70 IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 8}, 8};
71 IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,16}, 0};
72 IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,26}, 10};
73 IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 2}, 10};
74 IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,27}, 11};
75 IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 3}, 11};
76 IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,28}, 12};
77 IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,29}, 13};
78 IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,17}, 1};
79 IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,18}, 2};
80 IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,19}, 3};
81 IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,20}, 4};
82 IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,21}, 5};
83 IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,24}, 8};
84 IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 0}, 8};
85 IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,25}, 9};
86 IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 1}, 9};
87 IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,32}, 0};
88 IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,44}, 10};
89 IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,45}, 11};
90 IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,46}, 12};
91 IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,47}, 13};
92 IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,48}, 14};
93 IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,49}, 15};
94 IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,33}, 1};
95 IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,35}, 3};
96 IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,36}, 4};
97 IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 6}, 4};
98 IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,37}, 5};
99 IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 7}, 5};
100 IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,38}, 6};
101 IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 8}, 6};
102 IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,39}, 7};
103 IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 9}, 7};
104 IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,12}, 0};
105 IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 2}, 10};
106 IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 1}, 11};
107 IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,11}, 1};
108 IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,10}, 2};
109 IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 9}, 3};
110 IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 8}, 4};
111 IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 7}, 5};
112 IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 6}, 6};
113 IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 5}, 7};
114 IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 4}, 8};
115 IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 3}, 9};
116
117
118 const IfxVadc_Emux_Out *IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS] = {
119 {
120 &IfxVadc_EMUX10_P00_6_OUT,
121 &IfxVadc_EMUX11_P00_7_OUT,
122 &IfxVadc_EMUX12_P00_8_OUT,
123 &IfxVadc_EMUX00_P02_6_OUT,
124 &IfxVadc_EMUX01_P02_7_OUT,
125 &IfxVadc_EMUX02_P02_8_OUT,
126 &IfxVadc_EMUX02_P33_1_OUT,
127 &IfxVadc_EMUX01_P33_2_OUT,
128 &IfxVadc_EMUX00_P33_3_OUT,
129 &IfxVadc_EMUX12_P33_4_OUT,
130 &IfxVadc_EMUX11_P33_5_OUT,
131 &IfxVadc_EMUX10_P33_6_OUT
132 }
133 };
134
135 const IfxVadc_GxBfl_Out *IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS] = {
136 {
137 {
138 &IfxVadc_G0BFL0_P33_4_OUT,
139 &IfxVadc_G0BFL1_P33_5_OUT,
140 &IfxVadc_G0BFL2_P33_6_OUT,
141 &IfxVadc_G0BFL3_P33_7_OUT,
142 NULL_PTR,
143 NULL_PTR
144 },
145 {
146 &IfxVadc_G1BFL0_P33_0_OUT,
147 &IfxVadc_G1BFL1_P33_1_OUT,
148 &IfxVadc_G1BFL2_P33_2_OUT,
149 &IfxVadc_G1BFL3_P33_3_OUT,
150 NULL_PTR,
151 NULL_PTR
152 },
153 {
154 &IfxVadc_G2BFL0_P00_4_OUT,
155 &IfxVadc_G2BFL1_P00_5_OUT,
156 &IfxVadc_G2BFL2_P00_6_OUT,
157 &IfxVadc_G2BFL3_P00_7_OUT,
158 NULL_PTR,
159 NULL_PTR
160 },
161 {
162 &IfxVadc_G3BFL0_P10_0_OUT,
163 &IfxVadc_G3BFL1_P10_1_OUT,
164 &IfxVadc_G3BFL2_P10_2_OUT,
165 &IfxVadc_G3BFL3_P10_3_OUT,
166 &IfxVadc_G3BFL0_P10_6_OUT,
167 &IfxVadc_G3BFL1_P10_7_OUT
168 }
169 }
170 };
171
172 const IfxVadc_Vadcg_In *IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS] = {
173 {
174 {
175 &IfxVadc_G0_0_AN0_IN,
176 &IfxVadc_G0_1_AN1_IN,
177 &IfxVadc_G0_2_AN2_IN,
178 &IfxVadc_G0_3_AN3_IN,
179 &IfxVadc_G0_4_AN4_IN,
180 &IfxVadc_G0_5_AN5_IN,
181 &IfxVadc_G0_6_AN6_IN,
182 &IfxVadc_G0_7_AN7_IN,
183 &IfxVadc_G0_8_AN8_IN,
184 NULL_PTR,
185 &IfxVadc_G0_10_AN10_IN,
186 &IfxVadc_G0_11_AN11_IN,
187 &IfxVadc_G0_12_AN12_IN,
188 &IfxVadc_G0_13_AN13_IN,
189 NULL_PTR,
190 NULL_PTR
191 },
192 {
193 &IfxVadc_G1_0_AN16_IN,
194 &IfxVadc_G1_1_AN17_IN,
195 &IfxVadc_G1_2_AN18_IN,
196 &IfxVadc_G1_3_AN19_IN,
197 &IfxVadc_G1_4_AN20_IN,
198 &IfxVadc_G1_5_AN21_IN,
199 NULL_PTR,
200 NULL_PTR,
201 &IfxVadc_G1_8_P40_0_IN,
202 &IfxVadc_G1_9_P40_1_IN,
203 &IfxVadc_G1_10_P40_2_IN,
204 &IfxVadc_G1_11_P40_3_IN,
205 &IfxVadc_G1_12_AN28_IN,
206 &IfxVadc_G1_13_AN29_IN,
207 NULL_PTR,
208 NULL_PTR
209 },
210 {
211 &IfxVadc_G2_0_AN32_IN,
212 &IfxVadc_G2_1_AN33_IN,
213 NULL_PTR,
214 &IfxVadc_G2_3_AN35_IN,
215 &IfxVadc_G2_4_P40_6_IN,
216 &IfxVadc_G2_5_P40_7_IN,
217 &IfxVadc_G2_6_P40_8_IN,
218 &IfxVadc_G2_7_P40_9_IN,
219 NULL_PTR,
220 NULL_PTR,
221 &IfxVadc_G2_10_AN44_IN,
222 &IfxVadc_G2_11_AN45_IN,
223 &IfxVadc_G2_12_AN46_IN,
224 &IfxVadc_G2_13_AN47_IN,
225 &IfxVadc_G2_14_AN48_IN,
226 &IfxVadc_G2_15_AN49_IN
227 },
228 {
229 &IfxVadc_G3_0_P00_12_IN,
230 &IfxVadc_G3_1_P00_11_IN,
231 &IfxVadc_G3_2_P00_10_IN,
232 &IfxVadc_G3_3_P00_9_IN,
233 &IfxVadc_G3_4_P00_8_IN,
234 &IfxVadc_G3_5_P00_7_IN,
235 &IfxVadc_G3_6_P00_6_IN,
236 &IfxVadc_G3_7_P00_5_IN,
237 &IfxVadc_G3_8_P00_4_IN,
238 &IfxVadc_G3_9_P00_3_IN,
239 &IfxVadc_G3_10_P00_2_IN,
240 &IfxVadc_G3_11_P00_1_IN,
241 NULL_PTR,
242 NULL_PTR,
243 NULL_PTR,
244 NULL_PTR
245 }
246 }
247 };
IfxVadc_G0_3_AN3_IN
IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN
Definition: IfxVadc_PinMap.c:65
IfxVadc_G2_5_AN37_IN
IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN
Definition: IfxVadc_PinMap.c:98
IfxVadc_Vadcg_In
VADC Analog Input.
Definition: IfxVadc_PinMap.h:56
IfxVadc_G0_1_AN1_IN
IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN
Definition: IfxVadc_PinMap.c:63
IfxVadc_G2BFL3_P00_7_OUT
IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT
Definition: IfxVadc_PinMap.c:51
IfxVadc_G3_6_P00_6_IN
IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN
Definition: IfxVadc_PinMap.c:112
IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
#define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
Definition: IfxVadc_PinMap.h:157
IfxVadc_GroupId_1
VADC group 1.
Definition: IfxVadc_cfg.h:102
IfxVadc_G1_10_AN26_IN
IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN
Definition: IfxVadc_PinMap.c:72
IfxVadc_G0_7_AN7_IN
IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN
Definition: IfxVadc_PinMap.c:69
IfxVadc_G3_3_P00_9_IN
IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN
Definition: IfxVadc_PinMap.c:109
IfxVadc_G3BFL0_P10_0_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT
Definition: IfxVadc_PinMap.c:52
IfxVadc_G3_9_P00_3_IN
IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN
Definition: IfxVadc_PinMap.c:115
IfxVadc_EMUX01_P33_2_OUT
IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
Definition: IfxVadc_PinMap.c:31
IfxVadc_G1_1_AN17_IN
IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN
Definition: IfxVadc_PinMap.c:78
IfxVadc_G0BFL3_P33_7_OUT
IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT
Definition: IfxVadc_PinMap.c:43
IfxVadc_G1_10_P40_2_IN
IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN
Definition: IfxVadc_PinMap.c:73
IfxVadc_G0BFL1_P33_5_OUT
IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT
Definition: IfxVadc_PinMap.c:41
IfxVadc_G2_6_AN38_IN
IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN
Definition: IfxVadc_PinMap.c:100
IfxVadc_G1BFL0_P33_0_OUT
IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT
Definition: IfxVadc_PinMap.c:44
IfxVadc_G2_0_AN32_IN
IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN
Definition: IfxVadc_PinMap.c:87
IfxVadc_G2_6_P40_8_IN
IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN
Definition: IfxVadc_PinMap.c:101
IfxVadc_G2_11_AN45_IN
IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN
Definition: IfxVadc_PinMap.c:89
IfxVadc_Vadcg_In_pinTable
const IfxVadc_Vadcg_In * IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]
Definition: IfxVadc_PinMap.c:172
IfxVadc_G3_11_P00_1_IN
IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN
Definition: IfxVadc_PinMap.c:106
IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS
#define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS
Definition: IfxVadc_PinMap.h:156
IfxVadc_GroupId_3
VADC group 3.
Definition: IfxVadc_cfg.h:104
IfxPort_OutputIdx_alt2
Definition: IfxPort.h:104
IfxVadc_EMUX12_P00_8_OUT
IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
Definition: IfxVadc_PinMap.c:38
IfxVadc_PinMap.h
VADC I/O map.
IfxVadc_G3BFL3_P10_3_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT
Definition: IfxVadc_PinMap.c:57
IfxVadc_G0_6_AN6_IN
IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN
Definition: IfxVadc_PinMap.c:68
IfxVadc_Emux_Out
VADC External Mux pin mapping structure.
Definition: IfxVadc_PinMap.h:48
IfxVadc_GroupId_0
VADC group 0.
Definition: IfxVadc_cfg.h:101
IfxVadc_EMUX02_P33_1_OUT
IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
Definition: IfxVadc_PinMap.c:33
IfxVadc_G3_5_P00_7_IN
IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN
Definition: IfxVadc_PinMap.c:111
IfxVadc_G3BFL1_P10_7_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT
Definition: IfxVadc_PinMap.c:55
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
IfxVadc_G1_9_P40_1_IN
IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN
Definition: IfxVadc_PinMap.c:86
IfxVadc_G1_2_AN18_IN
IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN
Definition: IfxVadc_PinMap.c:79
IfxVadc_GxBfl_Out_pinTable
const IfxVadc_GxBfl_Out * IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
Definition: IfxVadc_PinMap.c:135
IfxVadc_EMUX00_P02_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
Definition: IfxVadc_PinMap.c:28
IfxPort_OutputIdx_alt6
Definition: IfxPort.h:108
IfxVadc_EMUX11_P00_7_OUT
IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
Definition: IfxVadc_PinMap.c:36
IfxVadc_G3BFL2_P10_2_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT
Definition: IfxVadc_PinMap.c:56
IfxVadc_Emux_Out_pinTable
const IfxVadc_Emux_Out * IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
Definition: IfxVadc_PinMap.c:118
IfxVadc_G2_10_AN44_IN
IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN
Definition: IfxVadc_PinMap.c:88
IfxPort_OutputIdx_alt3
Definition: IfxPort.h:105
IfxVadc_G2_14_AN48_IN
IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN
Definition: IfxVadc_PinMap.c:92
IfxVadc_G0_12_AN12_IN
IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN
Definition: IfxVadc_PinMap.c:61
IfxVadc_G2_4_P40_6_IN
IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN
Definition: IfxVadc_PinMap.c:97
IfxVadc_G1BFL1_P33_1_OUT
IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT
Definition: IfxVadc_PinMap.c:45
IfxVadc_EMUX12_P33_4_OUT
IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
Definition: IfxVadc_PinMap.c:39
IfxVadc_G2_7_AN39_IN
IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN
Definition: IfxVadc_PinMap.c:102
IfxVadc_G1_8_AN24_IN
IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN
Definition: IfxVadc_PinMap.c:83
IfxVadc_G1_12_AN28_IN
IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN
Definition: IfxVadc_PinMap.c:76
IfxVadc_G2BFL0_P00_4_OUT
IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT
Definition: IfxVadc_PinMap.c:48
IfxVadc_G1_3_AN19_IN
IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN
Definition: IfxVadc_PinMap.c:80
IfxVadc_G0BFL0_P33_4_OUT
IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT
Definition: IfxVadc_PinMap.c:40
IfxVadc_G1_8_P40_0_IN
IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN
Definition: IfxVadc_PinMap.c:84
IfxVadc_G0_0_AN0_IN
IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN
Definition: IfxVadc_PinMap.c:58
IfxVadc_G1BFL2_P33_2_OUT
IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT
Definition: IfxVadc_PinMap.c:46
IfxVadc_G1_11_P40_3_IN
IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN
Definition: IfxVadc_PinMap.c:75
IfxVadc_G0_13_AN13_IN
IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN
Definition: IfxVadc_PinMap.c:62
IfxVadc_G0_4_AN4_IN
IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN
Definition: IfxVadc_PinMap.c:66
IfxVadc_G1_13_AN29_IN
IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN
Definition: IfxVadc_PinMap.c:77
IfxVadc_G0_11_AN11_IN
IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN
Definition: IfxVadc_PinMap.c:60
IfxVadc_G1_5_AN21_IN
IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN
Definition: IfxVadc_PinMap.c:82
IfxPort_OutputIdx_alt4
Definition: IfxPort.h:106
IfxVadc_G1_9_AN25_IN
IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN
Definition: IfxVadc_PinMap.c:85
IfxVadc_EMUX10_P00_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
Definition: IfxVadc_PinMap.c:34
IfxVadc_G3_4_P00_8_IN
IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN
Definition: IfxVadc_PinMap.c:110
IfxVadc_G2BFL1_P00_5_OUT
IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT
Definition: IfxVadc_PinMap.c:49
IfxVadc_G0_8_AN8_IN
IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN
Definition: IfxVadc_PinMap.c:70
IfxVadc_G0BFL2_P33_6_OUT
IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT
Definition: IfxVadc_PinMap.c:42
IfxPort_OutputIdx_alt7
Definition: IfxPort.h:109
IfxVadc_G3BFL1_P10_1_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT
Definition: IfxVadc_PinMap.c:54
IFXVADC_PINMAP_NUM_MODULES
#define IFXVADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxVadc_PinMap.h:154
IfxVadc_G3_2_P00_10_IN
IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN
Definition: IfxVadc_PinMap.c:108
IfxVadc_EMUX01_P02_7_OUT
IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
Definition: IfxVadc_PinMap.c:30
IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure.
Definition: IfxVadc_PinMap.h:39
IFXVADC_PINMAP_NUM_GROUPS
#define IFXVADC_PINMAP_NUM_GROUPS
Definition: IfxVadc_PinMap.h:155
IfxVadc_G2_4_AN36_IN
IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN
Definition: IfxVadc_PinMap.c:96
IfxVadc_G3_1_P00_11_IN
IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN
Definition: IfxVadc_PinMap.c:107
IfxVadc_G2_12_AN46_IN
IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN
Definition: IfxVadc_PinMap.c:90
IfxVadc_G3_8_P00_4_IN
IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN
Definition: IfxVadc_PinMap.c:114
IfxVadc_G0_5_AN5_IN
IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN
Definition: IfxVadc_PinMap.c:67
IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS
#define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS
Definition: IfxVadc_PinMap.h:158
IfxVadc_G0_10_AN10_IN
IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN
Definition: IfxVadc_PinMap.c:59
IfxVadc_EMUX11_P33_5_OUT
IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
Definition: IfxVadc_PinMap.c:37
IfxVadc_G3_7_P00_5_IN
IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN
Definition: IfxVadc_PinMap.c:113
IfxVadc_EMUX10_P33_6_OUT
IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
Definition: IfxVadc_PinMap.c:35
IfxVadc_G3_0_P00_12_IN
IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN
Definition: IfxVadc_PinMap.c:104
IfxVadc_G0_2_AN2_IN
IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN
Definition: IfxVadc_PinMap.c:64
IfxVadc_G1_11_AN27_IN
IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN
Definition: IfxVadc_PinMap.c:74
IfxVadc_G2_3_AN35_IN
IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN
Definition: IfxVadc_PinMap.c:95
IfxVadc_G1BFL3_P33_3_OUT
IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT
Definition: IfxVadc_PinMap.c:47
IfxVadc_G2_15_AN49_IN
IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN
Definition: IfxVadc_PinMap.c:93
IfxVadc_G2_5_P40_7_IN
IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN
Definition: IfxVadc_PinMap.c:99
IfxPort_OutputIdx_alt5
Definition: IfxPort.h:107
IfxVadc_G1_0_AN16_IN
IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN
Definition: IfxVadc_PinMap.c:71
IfxVadc_G3_10_P00_2_IN
IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN
Definition: IfxVadc_PinMap.c:105
IfxVadc_G2BFL2_P00_6_OUT
IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT
Definition: IfxVadc_PinMap.c:50
IfxVadc_G2_7_P40_9_IN
IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN
Definition: IfxVadc_PinMap.c:103
IfxVadc_G1_4_AN20_IN
IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN
Definition: IfxVadc_PinMap.c:81
IfxVadc_G3BFL0_P10_6_OUT
IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT
Definition: IfxVadc_PinMap.c:53
IfxVadc_GroupId_2
VADC group 2.
Definition: IfxVadc_cfg.h:103
IfxVadc_G2_13_AN47_IN
IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN
Definition: IfxVadc_PinMap.c:91
IfxVadc_EMUX00_P33_3_OUT
IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
Definition: IfxVadc_PinMap.c:29
IfxVadc_EMUX02_P02_8_OUT
IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
Definition: IfxVadc_PinMap.c:32
IfxVadc_G2_1_AN33_IN
IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN
Definition: IfxVadc_PinMap.c:94


iLLD_TC26B: IfxVadc_PinMap.h Source File

  • _PinMap
IfxVadc_PinMap.h
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_PinMap.h
3 * \brief VADC I/O map
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Vadc_pinmap VADC Pin Mapping
25 * \ingroup IfxLld_Vadc
26 */
27
28 #ifndef IFXVADC_PINMAP_H
29 #define IFXVADC_PINMAP_H
30
31 #include <IfxVadc_reg.h>
32 #include <_Impl/IfxVadc_cfg.h>
33 #include <Port/Std/IfxPort.h>
34
35 /** \addtogroup IfxLld_Vadc_pinmap
36 * \{ */
37
38 /** \brief VADC Boundary Flag pin mapping structure */
39 typedef const struct
40 {
41 Ifx_VADC* module; /**< \brief Base address */
42 IfxVadc_GroupId groupId; /**< \brief Group ID */
43 IfxPort_Pin pin; /**< \brief Port pin */
44 IfxPort_OutputIdx select; /**< \brief Port control code */
45 } IfxVadc_GxBfl_Out;
46
47 /** \brief VADC External Mux pin mapping structure */
48 typedef const struct
49 {
50 Ifx_VADC* module; /**< \brief Base address */
51 IfxPort_Pin pin; /**< \brief Port pin */
52 IfxPort_OutputIdx select; /**< \brief Port control code */
53 } IfxVadc_Emux_Out;
54
55 /** \brief VADC Analog Input */
56 typedef const struct
57 {
58 Ifx_VADC* module; /**< \brief Base address */
59 IfxVadc_GroupId groupId; /**< \brief Group ID */
60 IfxPort_Pin pin; /**< \brief Port pin */
61 uint8 channelId; /**< \brief Channel ID */
62 } IfxVadc_Vadcg_In;
63
64 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT; /**< \brief VADC_EMUX00: VADC output */
65 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT; /**< \brief VADC_EMUX00: VADC output */
66 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT; /**< \brief VADC_EMUX01: VADC output */
67 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT; /**< \brief VADC_EMUX01: VADC output */
68 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT; /**< \brief VADC_EMUX02: VADC output */
69 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT; /**< \brief VADC_EMUX02: VADC output */
70 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT; /**< \brief VADC_EMUX10: VADC output */
71 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT; /**< \brief VADC_EMUX10: VADC output */
72 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT; /**< \brief VADC_EMUX11: VADC output */
73 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT; /**< \brief VADC_EMUX11: VADC output */
74 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT; /**< \brief VADC_EMUX12: VADC output */
75 IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT; /**< \brief VADC_EMUX12: VADC output */
76 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT; /**< \brief VADC_G0BFL0: VADC output */
77 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT; /**< \brief VADC_G0BFL1: VADC output */
78 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT; /**< \brief VADC_G0BFL2: VADC output */
79 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT; /**< \brief VADC_G0BFL3: VADC output */
80 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT; /**< \brief VADC_G1BFL0: VADC output */
81 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT; /**< \brief VADC_G1BFL1: VADC output */
82 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT; /**< \brief VADC_G1BFL2: VADC output */
83 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT; /**< \brief VADC_G1BFL3: VADC output */
84 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT; /**< \brief VADC_G2BFL0: VADC output */
85 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT; /**< \brief VADC_G2BFL1: VADC output */
86 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT; /**< \brief VADC_G2BFL2: VADC output */
87 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT; /**< \brief VADC_G2BFL3: VADC output */
88 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT; /**< \brief VADC_G3BFL0: VADC output */
89 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT; /**< \brief VADC_G3BFL0: VADC output */
90 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT; /**< \brief VADC_G3BFL1: VADC output */
91 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT; /**< \brief VADC_G3BFL1: VADC output */
92 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT; /**< \brief VADC_G3BFL2: VADC output */
93 IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT; /**< \brief VADC_G3BFL3: VADC output */
94 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN; /**< \brief VADC_G0_0: VADC input channel 0 of group 0 */
95 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN; /**< \brief VADC_G0_10: VADC input channel 10 of group 0 */
96 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN; /**< \brief VADC_G0_11: VADC input channel 11 of group 0 */
97 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN; /**< \brief VADC_G0_12: VADC input channel 12 of group 0 */
98 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN; /**< \brief VADC_G0_13: VADC input channel 13 of group 0 */
99 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN; /**< \brief VADC_G0_1: VADC input channel 1 of group 0 */
100 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN; /**< \brief VADC_G0_2: VADC input channel 2 of group 0 */
101 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN; /**< \brief VADC_G0_3: VADC input channel 3 of group 0 */
102 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN; /**< \brief VADC_G0_4: VADC input channel 4 of group 0 */
103 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN; /**< \brief VADC_G0_5: VADC input channel 5 of group 0 */
104 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN; /**< \brief VADC_G0_6: VADC input channel 6 of group 0 */
105 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN; /**< \brief VADC_G0_7: VADC input channel 7 of group 0 */
106 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN; /**< \brief VADC_G0_8: VADC input channel 8 of group 0 */
107 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN; /**< \brief VADC_G1_0: VADC input channel 0 of group 1 */
108 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN; /**< \brief VADC_G1_10: VADC input channel 10 of group 1 */
109 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN; /**< \brief VADC_G1_10: VADC input channel 10 of group 1 */
110 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN; /**< \brief VADC_G1_11: VADC input channel 11 of group 1 */
111 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN; /**< \brief VADC_G1_11: VADC input channel 11 of group 1 */
112 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN; /**< \brief VADC_G1_12: VADC input channel 12 of group 1 */
113 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN; /**< \brief VADC_G1_13: VADC input channel 13 of group 1 */
114 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN; /**< \brief VADC_G1_1: VADC input channel 1 of group 1 */
115 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN; /**< \brief VADC_G1_2: VADC input channel 2 of group 1 */
116 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN; /**< \brief VADC_G1_3: VADC input channel 3 of group 1 */
117 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN; /**< \brief VADC_G1_4: VADC input channel 4 of group 1 */
118 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN; /**< \brief VADC_G1_5: VADC input channel 5 of group 1 */
119 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN; /**< \brief VADC_G1_8: VADC input channel 8 of group 1 */
120 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN; /**< \brief VADC_G1_8: VADC input channel 8 of group 1 */
121 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN; /**< \brief VADC_G1_9: VADC input channel 9of group 1 */
122 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN; /**< \brief VADC_G1_9: VADC input channel 9 of group 1 */
123 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN; /**< \brief VADC_G2_0: VADC input channel 0 of group 2 */
124 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN; /**< \brief VADC_G2_10: VADC input channel 10 of group 2 */
125 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN; /**< \brief VADC_G2_11: VADC input channel 11 of group 2 */
126 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN; /**< \brief VADC_G2_12: VADC input channel 12 of group 24 */
127 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN; /**< \brief VADC_G2_13: VADC input channel 13 of group 2 */
128 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN; /**< \brief VADC_G2_14: VADC input channel 14 of group 2 */
129 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN; /**< \brief VADC_G2_15: VADC input channel 15 of group 2 */
130 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN; /**< \brief VADC_G2_1: VADC input channel 1 of group 2 */
131 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN; /**< \brief VADC_G2_3: VADC input channel 3 of group 2 (mtm) */
132 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN; /**< \brief VADC_G2_4: VADC input channel 4 of group 2 */
133 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN; /**< \brief VADC_G2_4: VADC input channel 4 of group 2 */
134 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN; /**< \brief VADC_G2_5: VADC input channel 5 of group 2 */
135 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN; /**< \brief VADC_G2_5: VADC input channel 5 of group 2 */
136 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN; /**< \brief VADC_G2_6: VADC input channel 6 of group 2 */
137 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN; /**< \brief VADC_G2_6: VADC input channel 6 of group 2 */
138 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN; /**< \brief VADC_G2_7: VADC input channel 7 of group 2 */
139 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN; /**< \brief VADC_G2_7: VADC input channel 7 of group 2 */
140 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN; /**< \brief VADC_G3_0: VADC input */
141 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN; /**< \brief VADC_G3_10: VADC input */
142 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN; /**< \brief VADC_G3_11: VADC input */
143 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN; /**< \brief VADC_G3_1: VADC input */
144 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN; /**< \brief VADC_G3_2: VADC input */
145 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN; /**< \brief VADC_G3_3: VADC input */
146 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN; /**< \brief VADC_G3_4: VADC input */
147 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN; /**< \brief VADC_G3_5: VADC input */
148 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN; /**< \brief VADC_G3_6: VADC input */
149 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN; /**< \brief VADC_G3_7: VADC input */
150 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN; /**< \brief VADC_G3_8: VADC input */
151 IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN; /**< \brief VADC_G3_9: VADC input */
152
153 /** \brief Table dimensions */
154 #define IFXVADC_PINMAP_NUM_MODULES 1
155 #define IFXVADC_PINMAP_NUM_GROUPS 4
156 #define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
157 #define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6
158 #define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16
159
160
161 /** \brief IfxVadc_Emux_Out table */
162 IFX_EXTERN const IfxVadc_Emux_Out *IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS];
163
164 /** \brief IfxVadc_GxBfl_Out table */
165 IFX_EXTERN const IfxVadc_GxBfl_Out *IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS];
166
167 /** \brief IfxVadc_Vadcg_In table */
168 IFX_EXTERN const IfxVadc_Vadcg_In *IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS];
169
170 /** \} */
171
172 #endif /* IFXVADC_PINMAP_H */
IfxVadc_G0_2_AN2_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN
VADC_G0_2: VADC input channel 2 of group 0.
Definition: IfxVadc_PinMap.h:100
IfxVadc_G1_2_AN18_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN
VADC_G1_2: VADC input channel 2 of group 1.
Definition: IfxVadc_PinMap.h:115
IfxVadc_G1_5_AN21_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN
VADC_G1_5: VADC input channel 5 of group 1.
Definition: IfxVadc_PinMap.h:118
IfxVadc_G1_8_P40_0_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN
VADC_G1_8: VADC input channel 8 of group 1.
Definition: IfxVadc_PinMap.h:120
IfxVadc_G3BFL0_P10_6_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT
VADC_G3BFL0: VADC output.
Definition: IfxVadc_PinMap.h:89
IfxVadc_G3_10_P00_2_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN
VADC_G3_10: VADC input.
Definition: IfxVadc_PinMap.h:141
IfxVadc_Vadcg_In
VADC Analog Input.
Definition: IfxVadc_PinMap.h:56
IfxVadc_G2_6_AN38_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN
VADC_G2_6: VADC input channel 6 of group 2.
Definition: IfxVadc_PinMap.h:136
IfxVadc_G1BFL2_P33_2_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT
VADC_G1BFL2: VADC output.
Definition: IfxVadc_PinMap.h:82
IfxVadc_G0_5_AN5_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN
VADC_G0_5: VADC input channel 5 of group 0.
Definition: IfxVadc_PinMap.h:103
IfxVadc_G3BFL3_P10_3_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT
VADC_G3BFL3: VADC output.
Definition: IfxVadc_PinMap.h:93
IfxVadc_GxBfl_Out::groupId
IfxVadc_GroupId groupId
Group ID.
Definition: IfxVadc_PinMap.h:42
IfxVadc_G1BFL3_P33_3_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT
VADC_G1BFL3: VADC output.
Definition: IfxVadc_PinMap.h:83
IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
#define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS
Definition: IfxVadc_PinMap.h:157
IfxVadc_G2BFL0_P00_4_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT
VADC_G2BFL0: VADC output.
Definition: IfxVadc_PinMap.h:84
IfxVadc_EMUX01_P02_7_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT
VADC_EMUX01: VADC output.
Definition: IfxVadc_PinMap.h:66
IfxPort_OutputIdx
IfxPort_OutputIdx
Pin output alternate index.
Definition: IfxPort.h:100
IfxVadc_G3BFL1_P10_1_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT
VADC_G3BFL1: VADC output.
Definition: IfxVadc_PinMap.h:90
IfxVadc_G1_0_AN16_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN
VADC_G1_0: VADC input channel 0 of group 1.
Definition: IfxVadc_PinMap.h:107
IfxVadc_EMUX00_P02_6_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT
VADC_EMUX00: VADC output.
Definition: IfxVadc_PinMap.h:64
IfxVadc_G0_10_AN10_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN
VADC_G0_10: VADC input channel 10 of group 0.
Definition: IfxVadc_PinMap.h:95
IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS
#define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS
Definition: IfxVadc_PinMap.h:156
IfxVadc_G0_6_AN6_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN
VADC_G0_6: VADC input channel 6 of group 0.
Definition: IfxVadc_PinMap.h:104
IfxVadc_GxBfl_Out::module
Ifx_VADC * module
Base address.
Definition: IfxVadc_PinMap.h:41
IfxVadc_cfg.h
VADC on-chip implementation data.
IfxVadc_Emux_Out
VADC External Mux pin mapping structure.
Definition: IfxVadc_PinMap.h:48
IfxVadc_G3BFL2_P10_2_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT
VADC_G3BFL2: VADC output.
Definition: IfxVadc_PinMap.h:92
IfxVadc_G0_1_AN1_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN
VADC_G0_1: VADC input channel 1 of group 0.
Definition: IfxVadc_PinMap.h:99
IfxVadc_G0_11_AN11_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN
VADC_G0_11: VADC input channel 11 of group 0.
Definition: IfxVadc_PinMap.h:96
IfxVadc_G0_0_AN0_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN
VADC_G0_0: VADC input channel 0 of group 0.
Definition: IfxVadc_PinMap.h:94
IfxVadc_G3_3_P00_9_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN
VADC_G3_3: VADC input.
Definition: IfxVadc_PinMap.h:145
IfxVadc_G1_3_AN19_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN
VADC_G1_3: VADC input channel 3 of group 1.
Definition: IfxVadc_PinMap.h:116
IfxVadc_G2_0_AN32_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN
VADC_G2_0: VADC input channel 0 of group 2.
Definition: IfxVadc_PinMap.h:123
IfxVadc_G2_5_AN37_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN
VADC_G2_5: VADC input channel 5 of group 2.
Definition: IfxVadc_PinMap.h:134
IfxVadc_EMUX10_P00_6_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT
VADC_EMUX10: VADC output.
Definition: IfxVadc_PinMap.h:70
IfxVadc_EMUX11_P00_7_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT
VADC_EMUX11: VADC output.
Definition: IfxVadc_PinMap.h:72
IfxVadc_G2_11_AN45_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN
VADC_G2_11: VADC input channel 11 of group 2.
Definition: IfxVadc_PinMap.h:125
IfxVadc_G2_15_AN49_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN
VADC_G2_15: VADC input channel 15 of group 2.
Definition: IfxVadc_PinMap.h:129
IfxVadc_EMUX00_P33_3_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT
VADC_EMUX00: VADC output.
Definition: IfxVadc_PinMap.h:65
IfxVadc_G2BFL3_P00_7_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT
VADC_G2BFL3: VADC output.
Definition: IfxVadc_PinMap.h:87
IfxVadc_EMUX02_P02_8_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT
VADC_EMUX02: VADC output.
Definition: IfxVadc_PinMap.h:68
IfxVadc_EMUX12_P00_8_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT
VADC_EMUX12: VADC output.
Definition: IfxVadc_PinMap.h:74
IfxVadc_G3BFL1_P10_7_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT
VADC_G3BFL1: VADC output.
Definition: IfxVadc_PinMap.h:91
IfxVadc_GxBfl_Out::pin
IfxPort_Pin pin
Port pin.
Definition: IfxVadc_PinMap.h:43
IfxVadc_G2_3_AN35_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN
VADC_G2_3: VADC input channel 3 of group 2 (mtm)
Definition: IfxVadc_PinMap.h:131
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxVadc_G0BFL3_P33_7_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT
VADC_G0BFL3: VADC output.
Definition: IfxVadc_PinMap.h:79
IfxVadc_EMUX12_P33_4_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT
VADC_EMUX12: VADC output.
Definition: IfxVadc_PinMap.h:75
IfxVadc_G1_11_AN27_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN
VADC_G1_11: VADC input channel 11 of group 1.
Definition: IfxVadc_PinMap.h:110
IfxVadc_EMUX10_P33_6_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT
VADC_EMUX10: VADC output.
Definition: IfxVadc_PinMap.h:71
IfxVadc_EMUX02_P33_1_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT
VADC_EMUX02: VADC output.
Definition: IfxVadc_PinMap.h:69
IfxVadc_Emux_Out_pinTable
IFX_EXTERN const IfxVadc_Emux_Out * IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS]
IfxVadc_Emux_Out table.
Definition: IfxVadc_PinMap.h:162
IfxVadc_EMUX01_P33_2_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT
VADC_EMUX01: VADC output.
Definition: IfxVadc_PinMap.h:67
IfxVadc_G3_7_P00_5_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN
VADC_G3_7: VADC input.
Definition: IfxVadc_PinMap.h:149
IfxVadc_G0_12_AN12_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN
VADC_G0_12: VADC input channel 12 of group 0.
Definition: IfxVadc_PinMap.h:97
IfxVadc_G1_9_AN25_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN
VADC_G1_9: VADC input channel 9of group 1.
Definition: IfxVadc_PinMap.h:121
IfxVadc_EMUX11_P33_5_OUT
IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT
VADC_EMUX11: VADC output.
Definition: IfxVadc_PinMap.h:73
IfxVadc_G1_9_P40_1_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN
VADC_G1_9: VADC input channel 9 of group 1.
Definition: IfxVadc_PinMap.h:122
IfxVadc_G1_10_AN26_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN
VADC_G1_10: VADC input channel 10 of group 1.
Definition: IfxVadc_PinMap.h:108
IfxVadc_G1_12_AN28_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN
VADC_G1_12: VADC input channel 12 of group 1.
Definition: IfxVadc_PinMap.h:112
IfxVadc_G0BFL1_P33_5_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT
VADC_G0BFL1: VADC output.
Definition: IfxVadc_PinMap.h:77
IfxVadc_G3_6_P00_6_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN
VADC_G3_6: VADC input.
Definition: IfxVadc_PinMap.h:148
IfxPort_Pin
Defines a pin.
Definition: IfxPort.h:170
IFXVADC_PINMAP_NUM_MODULES
#define IFXVADC_PINMAP_NUM_MODULES
Table dimensions.
Definition: IfxVadc_PinMap.h:154
IfxVadc_G2_4_AN36_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN
VADC_G2_4: VADC input channel 4 of group 2.
Definition: IfxVadc_PinMap.h:132
IfxVadc_G0BFL0_P33_4_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT
VADC_G0BFL0: VADC output.
Definition: IfxVadc_PinMap.h:76
IfxVadc_Vadcg_In_pinTable
IFX_EXTERN const IfxVadc_Vadcg_In * IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS]
IfxVadc_Vadcg_In table.
Definition: IfxVadc_PinMap.h:168
IfxVadc_G0_4_AN4_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN
VADC_G0_4: VADC input channel 4 of group 0.
Definition: IfxVadc_PinMap.h:102
IfxVadc_G3_1_P00_11_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN
VADC_G3_1: VADC input.
Definition: IfxVadc_PinMap.h:143
IfxVadc_G2BFL1_P00_5_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT
VADC_G2BFL1: VADC output.
Definition: IfxVadc_PinMap.h:85
IfxVadc_G0_8_AN8_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN
VADC_G0_8: VADC input channel 8 of group 0.
Definition: IfxVadc_PinMap.h:106
IfxVadc_G1BFL0_P33_0_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT
VADC_G1BFL0: VADC output.
Definition: IfxVadc_PinMap.h:80
IfxVadc_GxBfl_Out
VADC Boundary Flag pin mapping structure.
Definition: IfxVadc_PinMap.h:39
IFXVADC_PINMAP_NUM_GROUPS
#define IFXVADC_PINMAP_NUM_GROUPS
Definition: IfxVadc_PinMap.h:155
IfxVadc_G0_13_AN13_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN
VADC_G0_13: VADC input channel 13 of group 0.
Definition: IfxVadc_PinMap.h:98
IfxVadc_G2_10_AN44_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN
VADC_G2_10: VADC input channel 10 of group 2.
Definition: IfxVadc_PinMap.h:124
IfxVadc_GxBfl_Out_pinTable
IFX_EXTERN const IfxVadc_GxBfl_Out * IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS]
IfxVadc_GxBfl_Out table.
Definition: IfxVadc_PinMap.h:165
IfxVadc_G2_12_AN46_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN
VADC_G2_12: VADC input channel 12 of group 24.
Definition: IfxVadc_PinMap.h:126
IfxVadc_G2_7_P40_9_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN
VADC_G2_7: VADC input channel 7 of group 2.
Definition: IfxVadc_PinMap.h:139
IfxVadc_G1BFL1_P33_1_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT
VADC_G1BFL1: VADC output.
Definition: IfxVadc_PinMap.h:81
IfxVadc_G2_4_P40_6_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN
VADC_G2_4: VADC input channel 4 of group 2.
Definition: IfxVadc_PinMap.h:133
IfxVadc_G3_9_P00_3_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN
VADC_G3_9: VADC input.
Definition: IfxVadc_PinMap.h:151
IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS
#define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS
Definition: IfxVadc_PinMap.h:158
IfxVadc_G3_11_P00_1_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN
VADC_G3_11: VADC input.
Definition: IfxVadc_PinMap.h:142
IfxVadc_G1_1_AN17_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN
VADC_G1_1: VADC input channel 1 of group 1.
Definition: IfxVadc_PinMap.h:114
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:99
IfxVadc_G2_5_P40_7_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN
VADC_G2_5: VADC input channel 5 of group 2.
Definition: IfxVadc_PinMap.h:135
IfxVadc_G2_7_AN39_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN
VADC_G2_7: VADC input channel 7 of group 2.
Definition: IfxVadc_PinMap.h:138
IfxVadc_Vadcg_In::channelId
uint8 channelId
Channel ID.
Definition: IfxVadc_PinMap.h:61
IfxVadc_G2_14_AN48_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN
VADC_G2_14: VADC input channel 14 of group 2.
Definition: IfxVadc_PinMap.h:128
IfxVadc_G3_0_P00_12_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN
VADC_G3_0: VADC input.
Definition: IfxVadc_PinMap.h:140
IfxVadc_G1_13_AN29_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN
VADC_G1_13: VADC input channel 13 of group 1.
Definition: IfxVadc_PinMap.h:113
IfxVadc_G0BFL2_P33_6_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT
VADC_G0BFL2: VADC output.
Definition: IfxVadc_PinMap.h:78
IfxVadc_G1_11_P40_3_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN
VADC_G1_11: VADC input channel 11 of group 1.
Definition: IfxVadc_PinMap.h:111
IfxVadc_G1_4_AN20_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN
VADC_G1_4: VADC input channel 4 of group 1.
Definition: IfxVadc_PinMap.h:117
IfxVadc_G0_3_AN3_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN
VADC_G0_3: VADC input channel 3 of group 0.
Definition: IfxVadc_PinMap.h:101
IfxVadc_G0_7_AN7_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN
VADC_G0_7: VADC input channel 7 of group 0.
Definition: IfxVadc_PinMap.h:105
IfxVadc_G1_10_P40_2_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN
VADC_G1_10: VADC input channel 10 of group 1.
Definition: IfxVadc_PinMap.h:109
IfxVadc_G2BFL2_P00_6_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT
VADC_G2BFL2: VADC output.
Definition: IfxVadc_PinMap.h:86
IfxVadc_G3_2_P00_10_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN
VADC_G3_2: VADC input.
Definition: IfxVadc_PinMap.h:144
IfxVadc_G1_8_AN24_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN
VADC_G1_8: VADC input channel 8 of group 1.
Definition: IfxVadc_PinMap.h:119
uint8
unsigned char uint8
Definition: Platform_Types.h:105
IfxVadc_G3_8_P00_4_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN
VADC_G3_8: VADC input.
Definition: IfxVadc_PinMap.h:150
IfxVadc_G2_13_AN47_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN
VADC_G2_13: VADC input channel 13 of group 2.
Definition: IfxVadc_PinMap.h:127
IfxVadc_GxBfl_Out::select
IfxPort_OutputIdx select
Port control code.
Definition: IfxVadc_PinMap.h:44
IfxVadc_G2_6_P40_8_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN
VADC_G2_6: VADC input channel 6 of group 2.
Definition: IfxVadc_PinMap.h:137
IfxVadc_G3_4_P00_8_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN
VADC_G3_4: VADC input.
Definition: IfxVadc_PinMap.h:146
IfxVadc_G2_1_AN33_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN
VADC_G2_1: VADC input channel 1 of group 2.
Definition: IfxVadc_PinMap.h:130
IfxVadc_G3_5_P00_7_IN
IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN
VADC_G3_5: VADC input.
Definition: IfxVadc_PinMap.h:147
IfxPort.h
PORT basic functionality.
IfxVadc_G3BFL0_P10_0_OUT
IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT
VADC_G3BFL0: VADC output.
Definition: IfxVadc_PinMap.h:88


iLLD_TC26B: IfxVadc_cfg.c Source File

  • _Impl
IfxVadc_cfg.c
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_cfg.c
3 * \brief VADC on-chip implementation data
4 *
5 * \version iLLD_1_0_1_11_0
6 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
7 *
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 /******************************************************************************/
26 /*----------------------------------Includes----------------------------------*/
27 /******************************************************************************/
28
29 #include "IfxVadc_cfg.h"
30
31 /******************************************************************************/
32 /*-----------------------Exported Variables/Constants-------------------------*/
33 /******************************************************************************/
34
35 IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS * 4) + (IFXVADC_NUM_ADC_COMMON_GROUPS * 4)] = {
36 (uint32)&SRC_VADC_G0_SR0,
37 (uint32)&SRC_VADC_G0_SR1,
38 (uint32)&SRC_VADC_G0_SR2,
39 (uint32)&SRC_VADC_G0_SR3,
40 (uint32)&SRC_VADC_G1_SR0,
41 (uint32)&SRC_VADC_G1_SR1,
42 (uint32)&SRC_VADC_G1_SR2,
43 (uint32)&SRC_VADC_G1_SR3,
44 (uint32)&SRC_VADC_G2_SR0,
45 (uint32)&SRC_VADC_G2_SR1,
46 (uint32)&SRC_VADC_G2_SR2,
47 (uint32)&SRC_VADC_G2_SR3,
48 (uint32)&SRC_VADC_G3_SR0,
49 (uint32)&SRC_VADC_G3_SR1,
50 (uint32)&SRC_VADC_G3_SR2,
51 (uint32)&SRC_VADC_G3_SR3,
52 (uint32)&SRC_VADC_CG0_SR0,
53 (uint32)&SRC_VADC_CG0_SR1,
54 (uint32)&SRC_VADC_CG0_SR2,
55 (uint32)&SRC_VADC_CG0_SR3,
56 (uint32)&SRC_VADC_CG1_SR0,
57 (uint32)&SRC_VADC_CG1_SR1,
58 (uint32)&SRC_VADC_CG1_SR2,
59 (uint32)&SRC_VADC_CG1_SR3
60 };
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxVadc_cfg_srcAddresses
IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxVadc_cfg.c:35
IfxVadc_cfg.h
VADC on-chip implementation data.
IFXVADC_NUM_ADC_COMMON_GROUPS
#define IFXVADC_NUM_ADC_COMMON_GROUPS
Definition: IfxVadc_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFXVADC_NUM_ADC_GROUPS
#define IFXVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxVadc_cfg.h:47


iLLD_TC26B: IfxVadc_cfg.h Source File

  • _Impl
IfxVadc_cfg.h
Go to the documentation of this file.
1 /**
2 * \file IfxVadc_cfg.h
3 * \brief VADC on-chip implementation data
4 * \ingroup IfxLld_Vadc
5 *
6 * \version iLLD_1_0_1_11_0
7 * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
8 *
9 *
10 * IMPORTANT NOTICE
11 *
12 *
13 * Infineon Technologies AG (Infineon) is supplying this file for use
14 * exclusively with Infineon's microcontroller products. This file can be freely
15 * distributed within development tools that are supporting such microcontroller
16 * products.
17 *
18 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23 *
24 * \defgroup IfxLld_Vadc VADC
25 * \ingroup IfxLld
26 * \defgroup IfxLld_Vadc_Impl Implementation
27 * \ingroup IfxLld_Vadc
28 * \defgroup IfxLld_Vadc_Std Standard Driver
29 * \ingroup IfxLld_Vadc
30 */
31
32 #ifndef IFXVADC_CFG_H
33 #define IFXVADC_CFG_H 1
34
35 /******************************************************************************/
36 /*----------------------------------Includes----------------------------------*/
37 /******************************************************************************/
38
39 #include "Src/Std/IfxSrc.h"
40
41 /******************************************************************************/
42 /*-----------------------------------Macros-----------------------------------*/
43 /******************************************************************************/
44
45 /** \brief Number of ADC Groups
46 */
47 #define IFXVADC_NUM_ADC_GROUPS (4 )
48
49 /** \brief Number of calibrated ADC Groups
50 */
51 #define IFXVADC_NUM_ADC_CAL_GROUPS (4 )
52
53 /** \brief Maximum allowed analog frequency
54 */
55 #define IFXVADC_ANALOG_FREQUENCY_MAX (20000000)
56
57 /** \brief Minimum allowed analog frequency
58 */
59 #define IFXVADC_ANALOG_FREQUENCY_MIN (500000)
60
61 /** \brief Default analog frequency used in initModuleConfig function
62 */
63 #define IFXVADC_DEFAULT_ANALOG_FREQ (20000000)
64
65 /** \brief Number of Conversion request Slots
66 */
67 #define IFXVADC_NUM_REQUESTSLOTS (3)
68
69 /** \brief Number of group specific Input Class
70 */
71 #define IFXVADC_NUM_INPUTCLASSES (2)
72
73 /** \brief Maximum number of configurable bitfields in ACCPROT0 register
74 */
75 #define IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)
76
77 #define IFXVADC_QUEUE_REFILL (1 << IFX_VADC_G_QBUR0_RF_OFF)
78
79 /** \brief Number of ADC group input classes.
80 */
81 #define IFXVADC_NUM_GLOBAL_INPUTCLASSES (2)
82
83 #define IFXVADC_NUM_ADC_COMMON_GROUPS (2)
84
85 #define IFXVADC_SAMPLETIME_MIN (2)
86
87 #define IFXVADC_NUM_EMUX_INTERFACE (2)
88
89 #define IFXVADC_NUM_MODULES (1)
90
91
92
93 /******************************************************************************/
94 /*-------------------------------Enumerations---------------------------------*/
95 /******************************************************************************/
96
97 /** \brief VADC Groups
98 */
99 typedef enum
100 {
101 IfxVadc_GroupId_0, /**< \brief VADC group 0 */
102 IfxVadc_GroupId_1, /**< \brief VADC group 1 */
103 IfxVadc_GroupId_2, /**< \brief VADC group 2 */
104 IfxVadc_GroupId_3, /**< \brief VADC group 3 */
105 IfxVadc_GroupId_global0, /**< \brief VADC group global0 */
106 IfxVadc_GroupId_global1 /**< \brief VADC group global1 */
107 } IfxVadc_GroupId;
108
109
110 /******************************************************************************/
111 /*-------------------Global Exported Variables/Constants----------------------*/
112 /******************************************************************************/
113
114 IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4) + (IFXVADC_NUM_ADC_COMMON_GROUPS * 4) ];
115
116
117 #endif /* IFXVADC_CFG_H */
IfxVadc_GroupId_1
VADC group 1.
Definition: IfxVadc_cfg.h:102
uint32
unsigned long uint32
Definition: Platform_Types.h:113
IfxVadc_GroupId_3
VADC group 3.
Definition: IfxVadc_cfg.h:104
IfxVadc_GroupId_0
VADC group 0.
Definition: IfxVadc_cfg.h:101
IfxVadc_GroupId_global0
VADC group global0.
Definition: IfxVadc_cfg.h:105
IfxSrc.h
SRC basic functionality.
IfxVadc_GroupId_global1
VADC group global1.
Definition: IfxVadc_cfg.h:106
IFXVADC_NUM_ADC_COMMON_GROUPS
#define IFXVADC_NUM_ADC_COMMON_GROUPS
Definition: IfxVadc_cfg.h:83
IFX_CONST
#define IFX_CONST
Definition: Compilers.h:37
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
IfxVadc_GroupId
IfxVadc_GroupId
VADC Groups
Definition: IfxVadc_cfg.h:99
IFXVADC_NUM_ADC_GROUPS
#define IFXVADC_NUM_ADC_GROUPS
Number of ADC Groups.
Definition: IfxVadc_cfg.h:47
IfxVadc_GroupId_2
VADC group 2.
Definition: IfxVadc_cfg.h:103
IfxVadc_cfg_srcAddresses
IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4)+(IFXVADC_NUM_ADC_COMMON_GROUPS *4)]
Definition: IfxVadc_cfg.h:114


iLLD_TC26B: Platform_Types.h Source File

  • Cpu
  • Std
Platform_Types.h
Go to the documentation of this file.
1 /*******************************************************************************
2 ** **
3 ** Copyright (C) Infineon Technologies (2018) **
4 ** **
5 ** All rights reserved. **
6 ** **
7 ** This document contains proprietary information belonging to Infineon **
8 ** Technologies. Passing on and copying of this document, and communication **
9 ** of its contents is not permitted without prior written authorization. **
10 ** **
11 ********************************************************************************
12 ** **
13 ** FILENAME : Platform_Types.h **
14 ** **
15 ** VERSION : 2.0.0 **
16 ** **
17 ** DATE : 2017-03-26 **
18 ** **
19 ** VARIANT : NA **
20 ** **
21 ** PLATFORM : Infineon AURIX2G **
22 ** **
23 ** AUTHOR : DL-AUTOSAR-Engineering **
24 ** **
25 ** VENDOR : Infineon Technologies **
26 ** **
27 ** TRACEABILITY : [cover parentID={523013F2-B3A6-4ac7-8ADD-5A4284CE656E}] **
28 ** **
29 ** DESCRIPTION : Autosar Standard type definitions for the platform **
30 ** **
31 ** [/cover] **
32 ** **
33 ** SPECIFICATION(S) : AUTOSAR_SWS_PlatformTypes.pdf, AUTOSAR Release 4.2.2 **
34 ** **
35 ** MAY BE CHANGED BY USER : no **
36 ** **
37 *******************************************************************************/
38 #ifndef PLATFORM_TYPES_H
39 #define PLATFORM_TYPES_H
40
41 /******************************************************************************
42 ** Includes **
43 ******************************************************************************/
44
45 /******************************************************************************
46 ** Global Macro Definitions **
47 ******************************************************************************/
48 #define PLATFORM_VENDOR_ID (17u)
49 #define PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)
50 #define PLATFORM_AR_RELEASE_MINOR_VERSION (2u)
51 #define PLATFORM_AR_RELEASE_REVISION_VERSION (2u)
52 #define PLATFORM_SW_MAJOR_VERSION (1u)
53 #define PLATFORM_SW_MINOR_VERSION (0u)
54 #define PLATFORM_SW_PATCH_VERSION (0u)
55
56 /* [cover parentID={5294D975-045A-4d91-9A1A-B1765FAB4653}] */
57 /* CPU register width type definition */
58 #define CPU_TYPE_8 (8u)
59 #define CPU_TYPE_16 (16u)
60 #define CPU_TYPE_32 (32u)
61 /* Register width of CPU*/
62 #define CPU_TYPE CPU_TYPE_32 /* 32 bit */
63 /* [/cover] */
64
65
66 /* [cover parentID={FBA2FA55-430B-4dfb-82B1-C791F0878F9B}] */
67 /* Bit order type definition*/
68 #define MSB_FIRST (0u) /* Big Endian bit ordering */
69 #define LSB_FIRST (1u) /* Little Endian bit ordering */
70 /* Bit order of Register level*/
71 #define CPU_BIT_ORDER LSB_FIRST /* Little Endian */
72 /* [/cover] */
73
74
75 /* [cover parentID={0E2E6A28-264A-4d32-96EE-5F5C93286311}] */
76 /* Byte order type definition*/
77 #define HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */
78 #define LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */
79 /* Byte order on Memory level*/
80 #define CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */
81 /* [/cover] */
82
83
84 /* TRUE, FALSE symbol for Boolean types*/
85 /* [cover parentID={FF7F9840-8904-4b7d-83A7-988524B795DE}] */
86 #ifndef TRUE
87 #define TRUE (1u)
88 #endif
89 #ifndef FALSE
90 #define FALSE (0u)
91 #endif
92 /* [/cover] */
93 /******************************************************************************
94 ** Global Type Definitions **
95 ******************************************************************************/
96 /* AUTOSAR integer data types*/
97
98 /* unsigned char with a bit length that is the shortest one natively supported
99 by the platform.*/
100 /* [cover parentID={F7B51F71-6687-4e05-8408-7F5AAC55C638}] boolean [/cover]*/
101 typedef unsigned char boolean; /* for use with TRUE/FALSE */
102
103 /* 8bit unsigned : 0 .. 255 [0X00 .. 0XFF]*/
104 /* [cover parentID={4269E5AB-7F28-4803-8D60-7B4EC91CB087}] uint8 [/cover] */
105 typedef unsigned char uint8;
106
107 /* 16bit unsigned: 0..65535 [0x0000..0xFFFF]*/
108 /* [cover parentID={66E964CA-35D5-4013-BB61-1E824636D713}] uint16 [/cover] */
109 typedef unsigned short uint16;
110
111 /* 32bit unsigned: 0..4294967295 [0x00000000..0xFFFFFFFF]*/
112 /* [cover parentID={DA33B7A0-7CD3-45e7-9C9A-6D63FB8BA3DC}] uint32 [/cover] */
113 typedef unsigned long uint32;
114
115 /* 64bit unsigned
116 * 0..18446744073709551615 [0x0000000000000000..0xFFFFFFFFFFFFFFFF]*/
117 /* [cover parentID={3409E2A3-BF2D-44a5-9B00-A72300848166}] uint64 */
118 typedef unsigned long long uint64;
119
120 /* 8bit signed, 7 bit + 1 bit sign -128..+127 [0x80..0x7F]*/
121 /* [cover parentID={94E0756B-993D-4cae-9499-416CDFD6FEAF}] sint8[/cover]*/
122 typedef signed char sint8;
123
124 /* 16bit signed, 15 bit + 1 bit sign -32768..+32767 [0x8000..0x7FFF]*/
125 /* [cover parentID={B3482DFF-8DFF-41bd-95E0-0406E2451CB0}] sint16 [/cover]*/
126 typedef short sint16;
127
128 /* 32bit signed, 31 bit + 1 bit sign
129 -2147483648..+2147483647 [0x80000000..0x7FFFFFFF]*/
130 /* [cover parentID={B027B471-A1A2-456c-A015-35F4A34A88EF}] sint32 [/cover]*/
131 typedef long sint32;
132 /*
133 * 64bit signed, 63 bit + 1 bit sign
134 * -9223372036854775808..9223372036854775807
135 * [0x8000000000000000..0x7FFFFFFFFFFFFFFF]
136 */
137 /* [cover parentID={3CF3471C-EB1A-450c-B78F-4B96D226A1F5}] sint64 [/cover]*/
138 typedef long long sint64;
139
140 /* At least 8 bit*/
141 /* [cover parentID={F8719785-0A16-486e-AB85-0A2859402037}] uint8_least[/cover]*/
142 typedef unsigned long uint8_least;
143
144 /* At least 16 bit*/
145 /* [cover parentID={BEAD868D-0EC1-44f0-AFEE-B57401CC9E65}]uint16_least[/cover]*/
146 typedef unsigned long uint16_least;
147
148 /* least 32 bit*/
149 /* [cover parentID={9B9CC46A-0F61-4d25-8001-679CF210C135}]uint32_least[/cover]*/
150 typedef unsigned long uint32_least;
151
152 /* At least 7 bit + 1 bit sign*/
153 /* [cover parentID={5C0DE046-8407-4708-8D26-41B96731D89D}]sint8_least[/cover]*/
154 typedef signed long sint8_least;
155
156 /* At least 15 bit + 1 bit sign*/
157 /* [cover parentID={0A83DB6E-ECD8-42f0-B97C-057F9FBFEB6E}]sint16_least[/cover]*/
158 typedef signed long sint16_least;
159
160 /* At least 31 bit + 1 bit sign*/
161 /* [cover parentID={A65F0248-A0A7-4ab7-BAFA-A5428F4E8A96}]sint32_least[/cover]*/
162 typedef signed long sint32_least;
163
164 /* IEEE754-2008 single precision
165 * -3.4028235e+38..+3.4028235e+38*/
166 /* [cover parentID={BBC4F70E-DA81-4d37-BCA4-628A89B29517}] float32 [/cover]*/
167 typedef float float32; /* IEEE754-2008 single precision */
168
169 /* IEEE754-2008 double precision
170 * -1.7976931348623157e+308..+1.7976931348623157e+308*/
171 /* [cover parentID={0D62172C-9309-493a-8028-06A7299D7906}] float64 [/cover]*/
172 typedef double float64; /* IEEE754-2008 double precision */
173
174
175 /******************************************************************************
176 ** Global Constant Declarations **
177 ******************************************************************************/
178
179 /******************************************************************************
180 ** Global Variable Declarations **
181 ******************************************************************************/
182
183 /******************************************************************************
184 ** Global Function Declarations **
185 ******************************************************************************/
186
187 #endif /* PLATFORM_TYPES_H */
uint32
unsigned long uint32
Definition: Platform_Types.h:113
float32
float float32
Definition: Platform_Types.h:167
sint16_least
signed long sint16_least
Definition: Platform_Types.h:158
uint64
unsigned long long uint64
Definition: Platform_Types.h:118
sint16
short sint16
Definition: Platform_Types.h:126
sint32_least
signed long sint32_least
Definition: Platform_Types.h:162
uint8_least
unsigned long uint8_least
Definition: Platform_Types.h:142
sint64
long long sint64
Definition: Platform_Types.h:138
boolean
unsigned char boolean
Definition: Platform_Types.h:101
uint32_least
unsigned long uint32_least
Definition: Platform_Types.h:150
float64
double float64
Definition: Platform_Types.h:172
uint16
unsigned short uint16
Definition: Platform_Types.h:109
sint8_least
signed long sint8_least
Definition: Platform_Types.h:154
sint32
long sint32
Definition: Platform_Types.h:131
uint8
unsigned char uint8
Definition: Platform_Types.h:105
uint16_least
unsigned long uint16_least
Definition: Platform_Types.h:146
sint8
signed char sint8
Definition: Platform_Types.h:122


iLLD_TC26B: PwmHl.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
PwmHl.h
Go to the documentation of this file.
1 /**
2 * \file PwmHl.h
3 * \brief Multi-channels, dual-complementary PWM interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_if_pwmhl PWM HL interface
24 * \ingroup library_srvsw_if
25 *
26 */
27
28 #ifndef PWMHL_H_
29 #define PWMHL_H_ 1
30
31 #include "Cpu/Std/Ifx_Types.h"
32
33 typedef struct PwmHl_s PwmHl;
34 typedef void (*PwmHl_Start)(PwmHl *handle);
35 typedef void (*PwmHl_Pause)(PwmHl *handle);
36 typedef void (*PwmHl_Resume)(PwmHl *handle);
37 typedef void (*PwmHl_Stop)(PwmHl *handle);
38
39 typedef struct
40 {
41 PwmHl_Start start;
42 PwmHl_Stop stop;
43 } PwmHl_Functions;
44
45 /** \brief Structure of the TPwm interface */
46 struct PwmHl_s
47 {
48 float32 t12Frequency; /**< \brief Actual timer12 frequency */
49 Ifx_TimerValue t12Period; /**< \brief Actual timer 12 period */
50 float32 t13Frequency; /**< \brief Actual timer13 frequency */
51 Ifx_TimerValue t13Period; /**< \brief Actual timer 13 period */
52 #if IFX_CFG_USE_STANDARD_INTERFACE
53 PwmHl_Functions functions; /**< \brief Actual timer period */
54 #endif
55 };
56
57 /** \brief Configuration structure of the TPwm interface */
58 typedef struct
59 {
60 float32 t12Frequency; /**< \brief Specify expected T12 PWM frequency in Hertz */
61 Ifx_TimerValue t12Period; /**< \brief Specify expected T12 PWM period in ticks. */
62 float32 t13Frequency; /**< \brief Specify expected T13 PWM frequency in Hertz */
63 Ifx_TimerValue t13Period; /**< \brief Specify expected T13 PWM period in ticks. */
64 Ifx_TimerValue phaseDelay; /**< \brief Specify the ticks before before updating each ouput hall pattern */
65 Ifx_TimerValue noiseFilter; /**< \brief Specify hall sensor noise filter */
66
67 Ifx_ActiveState activeState; /**< \brief Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks */
68 } PwmHl_Config;
69
70 #if IFX_CFG_USE_STANDARD_INTERFACE
71 IFX_INLINE void PwmHl_start(PwmHl *handle) {handle->functions.start(handle); }
72 IFX_INLINE void PwmHl_stop(PwmHl *handle) {handle->functions.stop(handle); }
73 #endif
74
75 #endif /* TPWM_H_ */
PwmHl_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: PwmHl.h:50
PwmHl_Config::phaseDelay
Ifx_TimerValue phaseDelay
Specify the ticks before before updating each ouput hall pattern.
Definition: PwmHl.h:64
PwmHl_Resume
void(* PwmHl_Resume)(PwmHl *handle)
Definition: PwmHl.h:36
PwmHl_Functions::stop
PwmHl_Stop stop
Definition: PwmHl.h:42
PwmHl_s::t12Frequency
float32 t12Frequency
Actual timer12 frequency.
Definition: PwmHl.h:48
float32
float float32
Definition: Platform_Types.h:167
PwmHl_Config
Configuration structure of the TPwm interface.
Definition: PwmHl.h:58
PwmHl_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: PwmHl.h:67
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
PwmHl_s
Structure of the TPwm interface.
Definition: PwmHl.h:46
PwmHl_Config::noiseFilter
Ifx_TimerValue noiseFilter
Specify hall sensor noise filter.
Definition: PwmHl.h:65
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
PwmHl_Stop
void(* PwmHl_Stop)(PwmHl *handle)
Definition: PwmHl.h:37
PwmHl_Functions::start
PwmHl_Start start
Definition: PwmHl.h:41
PwmHl_Start
void(* PwmHl_Start)(PwmHl *handle)
Definition: PwmHl.h:34
PwmHl_s::t12Period
Ifx_TimerValue t12Period
Actual timer 12 period.
Definition: PwmHl.h:49
PwmHl_s::t13Period
Ifx_TimerValue t13Period
Actual timer 13 period.
Definition: PwmHl.h:51
PwmHl_Functions
Definition: PwmHl.h:39
PwmHl_Pause
void(* PwmHl_Pause)(PwmHl *handle)
Definition: PwmHl.h:35
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84


iLLD_TC26B: info.dox File Reference

info.dox File Reference


iLLD_TC26B: SpiIf.c Source File

  • Service
  • CpuGeneric
  • If
SpiIf.c
Go to the documentation of this file.
1 /**
2 * \file SpiIf.c
3 * \brief SPI interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:21 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 */
24
25 #include "SpiIf.h"
26
27 void SpiIf_initConfig(SpiIf_Config *config)
28 {
29 config->mode = SpiIf_Mode_master;
30 config->rxPriority = 0;
31 config->txPriority = 0;
32 config->erPriority = 0;
33 config->isrProvider = IfxSrc_Tos_cpu0;
34 config->bufferSize = 0;
35 config->buffer = NULL_PTR;
36 config->maximumBaudrate = 0;
37 }
38
39
40 void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
41 {
42 config->driver = driver;
43 config->baudrate = 0;
44 config->mode.enabled = 1;
45 config->mode.autoCS = 1;
46 config->mode.loopback = 0;
47 config->mode.clockPolarity = SpiIf_ClockPolarity_idleLow;
48 config->mode.shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge;
49 config->mode.dataHeading = SpiIf_DataHeading_msbFirst;
50 config->mode.dataWidth = 8;
51 config->mode.csActiveLevel = Ifx_ActiveState_low;
52 config->mode.csLeadDelay = SpiIf_SlsoTiming_0;
53 config->mode.csTrailDelay = SpiIf_SlsoTiming_0;
54 config->mode.csInactiveDelay = SpiIf_SlsoTiming_0;
55 config->mode.parityCheck = 0;
56 config->mode.parityMode = Ifx_ParityMode_even;
57 config->errorChecks.baudrate = 0;
58 config->errorChecks.phase = 0;
59 config->errorChecks.receive = 0;
60 config->errorChecks.transmit = 0;
61 }
Ifx_ActiveState_low
The signal is low active.
Definition: Ifx_Types.h:98
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:176
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:211
SpiIf_ChConfig_
Definition: SpiIf.h:208
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:185
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:173
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:177
SpiIf_Config
Definition: SpiIf.h:143
Ifx_ParityMode_even
Definition: Ifx_Types.h:104
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:181
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:161
SpiIf_
Definition: SpiIf.h:133
NULL_PTR
#define NULL_PTR
Definition: Compilers.h:53
SpiIf.h
SPI interface types.
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:184
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:73
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:174
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:156
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:175
SpiIf_initChannelConfig
void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:40
IfxSrc_Tos_cpu0
CPU0 interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:51
SpiIf_Mode_master
Master mode.
Definition: SpiIf.h:113
SpiIf_Config::bufferSize
Ifx_SizeT bufferSize
Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Definition: SpiIf.h:150
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:171
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:182
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:164
SpiIf_initConfig
void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:27
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:148
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:86
SpiIf_SlsoTiming_0
Definition: SpiIf.h:59
SpiIf_Config::buffer
void * buffer
Specifies the buffer location.The buffer parameter must point on a free memory location where the buf...
Definition: SpiIf.h:151
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:79
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:149
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:172
SpiIf_ChConfig_::driver
SpiIf * driver
Pointer to an implementation of SPI interface driver, e.g. IfxQspi_SpiMaster_ChannelConfig.
Definition: SpiIf.h:210
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:146
SpiIf_Config::mode
SpiIf_Mode mode
Specifies the interface operation mode.
Definition: SpiIf.h:145
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:162
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:186
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:212
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:179
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:147
SpiIf_ChConfig_::errorChecks
Spi_ErrorChecks errorChecks
Definition: SpiIf.h:213
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:163


iLLD_TC26B: SpiIf.h Source File

  • Service
  • CpuGeneric
  • If
SpiIf.h
Go to the documentation of this file.
1 /**
2 * \file SpiIf.h
3 * \brief SPI interface types
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:22 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_if_spi SPI interface
24 * \ingroup library_srvsw_if
25 *
26 */
27
28 #ifndef SPIIF_H
29 #define SPIIF_H 1
30
31 //________________________________________________________________________________________
32 // INCLUDES
33
34 #include "Src/Std/IfxSrc.h" /* FIXME interface should not have dependencies to the HAL, an If type needs to be defined */
35
36 /** \addtogroup library_srvsw_if_spi
37 * \{ */
38
39 //________________________________________________________________________________________
40 // CONFIGURATION SWITCHES
41
42 //________________________________________________________________________________________
43 // HELPER MACROS
44
45 //________________________________________________________________________________________
46 // BASIC TYPES
47
48 /** \brief SPI Interface Status */
49 typedef enum
50 {
51 SpiIf_Status_ok,
52 SpiIf_Status_busy,
53 SpiIf_Status_unknown
54 } SpiIf_Status;
55
56 /** \brief Slave select output timing */
57 typedef enum
58 {
59 SpiIf_SlsoTiming_0 = 0, /**< zero delay clock */
60 SpiIf_SlsoTiming_1, /**< 1 half-clock delay */
61 SpiIf_SlsoTiming_2, /**< 2 half-clock delay */
62 SpiIf_SlsoTiming_3, /**< 3 half-clock delay */
63 SpiIf_SlsoTiming_4, /**< 4 half-clock delay */
64 SpiIf_SlsoTiming_5, /**< 5 half-clock delay */
65 SpiIf_SlsoTiming_6, /**< 6 half-clock delay */
66 SpiIf_SlsoTiming_7 /**< 7 half-clock delay */
67 } SpiIf_SlsoTiming;
68
69 /** \brief Heading */
70 typedef enum
71 {
72 SpiIf_DataHeading_lsbFirst = 0, /**< LSB first */
73 SpiIf_DataHeading_msbFirst /**< MSB first */
74 } SpiIf_DataHeading;
75
76 /** \brief Clock phase */
77 typedef enum
78 {
79 SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0, /**< Shift Tx data on leading edge */
80 SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge /**< Shift Tx data on training edge */
81 } SpiIf_ShiftClock;
82
83 /** \brief Clock polarity */
84 typedef enum
85 {
86 SpiIf_ClockPolarity_idleLow = 0, /**< Idle clock line is low */
87 SpiIf_ClockPolarity_idleHigh /**< Idle clock line is high */
88 } SpiIf_ClockPolarity;
89
90 //________________________________________________________________________________________
91 // DATA STRUCTURES
92
93 /** \brief Alias to the channel structure */
94 typedef struct SpiIf_Ch_ SpiIf_Ch;
95 typedef struct SpiIf_ChConfig_ SpiIf_ChConfig;
96 typedef struct SpiIf_ SpiIf;
97
98 typedef volatile struct
99 {
100 uint32 onTransfer : 1; /**< \brief Channel status: On transfer */
101 uint32 byteAccess : 1; /**< \brief Channel status: 8bit / 16 bit access */
102 } SpiIf_Flags;
103
104 typedef struct
105 {
106 void *data;
107 Ifx_SizeT remaining;
108 } SpiIf_Job;
109
110 /** SPI operation modes */
111 typedef enum
112 { /* FIXME check conflicts with IfxQspi_Mode */
113 SpiIf_Mode_master, /**< \brief Master mode */
114 SpiIf_Mode_slave, /**< \brief Slave mode */
115 SpiIf_Mode_undefined /**< \brief Undefined mode */
116 } SpiIf_Mode;
117
118 typedef SpiIf_Status (*SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
119 typedef SpiIf_Status (*SpiIf_GetStatus)(SpiIf_Ch *handle);
120 typedef void (*SpiIf_OnEvent)(SpiIf *handle);
121 typedef uint32 SpiIf_SlsoTiming_HalfTsclk; /* SPI slave select output delay - in half-clock (1/(2*baudrate)) units. */
122 /* A value of 0 would set a delay of 1/Fqspi */
123
124 typedef struct
125 {
126 SpiIf_Exchange exchange;
127 SpiIf_GetStatus getStatus;
128 SpiIf_OnEvent onTx;
129 SpiIf_OnEvent onRx;
130 SpiIf_OnEvent onError;
131 } SpiIf_funcs;
132
133 struct SpiIf_
134 {
135 pvoid driver; /**< \brief Spi specific driver */
136 uint32 sending; /**< \brief */
137 SpiIf_Ch *activeChannel; /**< \brief Channel actually transmitting / receiving */
138 uint32 txCount;
139 uint32 rxCount;
140 SpiIf_funcs functions;
141 };
142
143 typedef struct
144 {
145 SpiIf_Mode mode; /**< \brief Specifies the interface operation mode */
146 Ifx_Priority rxPriority; /**< \brief Specifies the priority of the receive interrupt */
147 Ifx_Priority txPriority; /**< \brief Specifies the priority of the transmit interrupt */
148 Ifx_Priority erPriority; /**< \brief Specifies the priority of the error interrupt */
149 IfxSrc_Tos isrProvider; /**< \brief Specifies the handler of the interrupts */
150 Ifx_SizeT bufferSize; /**< \brief Specifies the number of channels that can be buffered. If 0, buffering is disabled */
151 void *buffer; /**< \brief Specifies the buffer location.The buffer parameter must point on a free memory location where the
152 * buffer object will be initialised. The Size of this area must be at least
153 * equals to "Size + sizeof(Ifx_Fifo) + 8",
154 * with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking
155 * this in account may result in unpredictable behaviour. */
156 float32 maximumBaudrate; /**< \brief Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock */
157 } SpiIf_Config;
158
159 typedef struct
160 {
161 uint32 baudrate : 1; /**< \brief TRUE = checked, FALSE = ignored */
162 uint32 phase : 1; /**< \brief TRUE = checked, FALSE = ignored */
163 uint32 receive : 1; /**< \brief TRUE = checked, FALSE = ignored */
164 uint32 transmit : 1; /**< \brief TRUE = checked, FALSE = ignored */
165 uint32 reserved : 28;
166 } Spi_ErrorChecks;
167
168 /** Channel operation mode */
169 typedef struct
170 {
171 uint32 enabled : 1; /**< \brief 1 = channel enabled, 0 = channel disabled */
172 uint32 autoCS : 1; /**< \brief 1 = chip select is controlled by the hardware module or, 0 = by software. */
173 uint32 loopback : 1; /**< \brief 0 = normal mode, 1 = loopback mode */
174 uint32 clockPolarity : 1; /**< \brief \ref SpiIf_ClockPolarity*/
175 uint32 shiftClock : 1; /**< \brief \ref SpiIf_ShiftClock */
176 uint32 dataHeading : 1; /**< \brief \ref SpiIf_DataHeading */
177 uint32 dataWidth : 6; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
178
179 uint32 csActiveLevel : 1; /**< \brief \ref Ifx_ActiveState */
180
181 uint32 parityCheck : 1; /**< \brief 0 = disabled, 1 = enabled */
182 uint32 parityMode : 1; /**< \brief \ref Ifx_ParityMode */
183
184 SpiIf_SlsoTiming_HalfTsclk csInactiveDelay; /**< \brief CS Inactive Delay in Tsclk/2 units */
185 SpiIf_SlsoTiming_HalfTsclk csLeadDelay; /**< \brief CS Lead Delay in Tsclk/2 units */
186 SpiIf_SlsoTiming_HalfTsclk csTrailDelay; /**< \brief CS Trail Delay in Tsclk/2 units */
187
188 } SpiIf_ChMode;
189
190 /** \brief SPI channel callback prototype */
191 typedef void (*SpiIf_Cbk)(void *data);
192 typedef void (*TxRxHandler)(SpiIf_Ch *handle);
193
194 struct SpiIf_Ch_
195 {
196 SpiIf *driver; /**< \brief Pointer to the SPI interface driver */
197 SpiIf_Flags flags;
198 Spi_ErrorChecks errorChecks; /**< \brief Error checks */
199 sint32 baudrate; /**< \brief Real baudrate */
200 SpiIf_Job tx;
201 SpiIf_Job rx;
202 SpiIf_Cbk onExchangeEnd; /**< \brief Specifies the callback function on end of exchange */
203 void *callbackData; /**< \brief Specifies pointer to the user specific data on transmit end */
204 TxRxHandler txHandler;
205 TxRxHandler rxHandler;
206 };
207
208 struct SpiIf_ChConfig_
209 {
210 SpiIf *driver; /**< \brief Pointer to an implementation of SPI interface driver, e.g. \ref IfxQspi_SpiMaster_ChannelConfig */
211 float32 baudrate; /**< \brief Specifies the SPI baudrate */
212 SpiIf_ChMode mode; /**< \brief */
213 Spi_ErrorChecks errorChecks; /**< \brief */
214 };
215
216 //________________________________________________________________________________________
217 // EXPORTED VARIABLES
218
219 //________________________________________________________________________________________
220 // FUNCTION PROTOTYPES
221
222 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle);
223 IFX_EXTERN void SpiIf_initConfig(SpiIf_Config *config);
224 IFX_EXTERN void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver);
225
226 /** \name Virtual functions
227 * These functions are implemented by a driver.
228 * \{ */
229 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
230 IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle);
231 /** \} */
232
233 /** \} */
234 //________________________________________________________________________________________
235 // INLINE FUNCTION IMPLEMENTATIONS
236
237 /** Wait as long as the transmission is on-going
238 * \note This function blocks CPU for some-time */
239 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle)
240 {
241 while (handle->flags.onTransfer != FALSE)
242 {}
243 }
244
245
246 /** Perform the SPI exchange operation.
247 * \param handle Pointer to an implementation of SPI interface driver
248 * \param src Pointer to the start of data buffer for data to transmit
249 * \param dest Pointer to the start of data buffer for received data
250 * \param numOfData specifies number of byte/bit to transfer
251 * \return STATUS of SPI
252 * \note the src and dest may be the same data location.
253 */
254 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
255 {
256 return handle->driver->functions.exchange(handle, src, dest, numOfData);
257 }
258
259
260 /** get the SPI status
261 * * \param handle Pointer to an implementation of SPI interface driver
262 * \return STATUS of SPI
263 * */
264 IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle)
265 {
266 return handle->driver->functions.getStatus(handle);
267 }
268
269
270 //________________________________________________________________________________________
271 #endif
SpiIf_DataHeading
SpiIf_DataHeading
Heading.
Definition: SpiIf.h:70
SpiIf_ChMode::dataHeading
uint32 dataHeading
SpiIf_DataHeading
Definition: SpiIf.h:176
SpiIf_funcs::getStatus
SpiIf_GetStatus getStatus
Definition: SpiIf.h:127
SpiIf_funcs::onRx
SpiIf_OnEvent onRx
Definition: SpiIf.h:129
SpiIf_funcs
Definition: SpiIf.h:124
SpiIf_ChConfig_::baudrate
float32 baudrate
Specifies the SPI baudrate.
Definition: SpiIf.h:211
SpiIf_ChConfig_
Definition: SpiIf.h:208
SpiIf_ChMode::csLeadDelay
SpiIf_SlsoTiming_HalfTsclk csLeadDelay
CS Lead Delay in Tsclk/2 units.
Definition: SpiIf.h:185
SpiIf_Ch_::tx
SpiIf_Job tx
Definition: SpiIf.h:200
Ifx_Priority
uint16 Ifx_Priority
Used in interrupt service priorities.
Definition: Ifx_Types.h:83
SpiIf_ChMode::loopback
uint32 loopback
0 = normal mode, 1 = loopback mode
Definition: SpiIf.h:173
Spi_ErrorChecks
Definition: SpiIf.h:159
SpiIf_ChMode::dataWidth
uint32 dataWidth
range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ...
Definition: SpiIf.h:177
SpiIf_::driver
pvoid driver
Spi specific driver.
Definition: SpiIf.h:135
SpiIf_Config
Definition: SpiIf.h:143
TxRxHandler
void(* TxRxHandler)(SpiIf_Ch *handle)
Definition: SpiIf.h:192
SpiIf_SlsoTiming_7
Definition: SpiIf.h:66
SpiIf_::activeChannel
SpiIf_Ch * activeChannel
Channel actually transmitting / receiving.
Definition: SpiIf.h:137
SpiIf_SlsoTiming_5
Definition: SpiIf.h:64
uint32
unsigned long uint32
Definition: Platform_Types.h:113
Spi_ErrorChecks::reserved
uint32 reserved
Definition: SpiIf.h:165
SpiIf_Ch_::callbackData
void * callbackData
Specifies pointer to the user specific data on transmit end.
Definition: SpiIf.h:203
SpiIf_ChMode::parityCheck
uint32 parityCheck
0 = disabled, 1 = enabled
Definition: SpiIf.h:181
float32
float float32
Definition: Platform_Types.h:167
Ifx_SizeT
sint16 Ifx_SizeT
Type used for data stream size.
Definition: Ifx_Types.h:72
pvoid
void * pvoid
void pointer
Definition: Ifx_Types.h:37
IfxSrc.h
SRC basic functionality.
IfxSrc_Tos
IfxSrc_Tos
Identifier of interrupt service provider, which handles the interrupt service request.
Definition: IfxSrc_cfg.h:49
SpiIf_ClockPolarity_idleHigh
Definition: SpiIf.h:87
SpiIf_wait
IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle)
Definition: SpiIf.h:239
Spi_ErrorChecks::baudrate
uint32 baudrate
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:161
SpiIf_
Definition: SpiIf.h:133
SpiIf_Ch_::baudrate
sint32 baudrate
Real baudrate.
Definition: SpiIf.h:199
SpiIf_SlsoTiming
SpiIf_SlsoTiming
Slave select output timing.
Definition: SpiIf.h:57
FALSE
#define FALSE
Definition: Platform_Types.h:90
SpiIf_ChMode::csInactiveDelay
SpiIf_SlsoTiming_HalfTsclk csInactiveDelay
CS Inactive Delay in Tsclk/2 units.
Definition: SpiIf.h:184
SpiIf_ShiftClock
SpiIf_ShiftClock
Clock phase.
Definition: SpiIf.h:77
SpiIf_Flags::byteAccess
uint32 byteAccess
Channel status: 8bit / 16 bit access.
Definition: SpiIf.h:101
SpiIf_Mode_slave
Slave mode.
Definition: SpiIf.h:114
SpiIf_Status_unknown
Definition: SpiIf.h:53
SpiIf_DataHeading_msbFirst
Definition: SpiIf.h:73
SpiIf_Status_ok
Definition: SpiIf.h:51
SpiIf_ChMode::clockPolarity
uint32 clockPolarity
SpiIf_ClockPolarity
Definition: SpiIf.h:174
IFX_EXTERN
#define IFX_EXTERN
Definition: Compilers.h:46
SpiIf_Config::maximumBaudrate
float32 maximumBaudrate
Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock...
Definition: SpiIf.h:156
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
SpiIf_funcs::onTx
SpiIf_OnEvent onTx
Definition: SpiIf.h:128
SpiIf_funcs::exchange
SpiIf_Exchange exchange
Definition: SpiIf.h:126
SpiIf_SlsoTiming_HalfTsclk
uint32 SpiIf_SlsoTiming_HalfTsclk
Definition: SpiIf.h:121
SpiIf_::functions
SpiIf_funcs functions
Definition: SpiIf.h:140
SpiIf_ChMode::shiftClock
uint32 shiftClock
SpiIf_ShiftClock
Definition: SpiIf.h:175
SpiIf_initChannelConfig
IFX_EXTERN void SpiIf_initChannelConfig(SpiIf_ChConfig *config, SpiIf *driver)
Definition: SpiIf.c:40
SpiIf_ClockPolarity
SpiIf_ClockPolarity
Clock polarity.
Definition: SpiIf.h:84
SpiIf_SlsoTiming_2
Definition: SpiIf.h:61
SpiIf_::txCount
uint32 txCount
Definition: SpiIf.h:138
SpiIf_Status_busy
Definition: SpiIf.h:52
SpiIf_Flags::onTransfer
uint32 onTransfer
Channel status: On transfer.
Definition: SpiIf.h:100
SpiIf_Mode_master
Master mode.
Definition: SpiIf.h:113
SpiIf_SlsoTiming_4
Definition: SpiIf.h:63
SpiIf_Config::bufferSize
Ifx_SizeT bufferSize
Specifies the number of channels that can be buffered. If 0, buffering is disabled.
Definition: SpiIf.h:150
SpiIf_ChMode::enabled
uint32 enabled
1 = channel enabled, 0 = channel disabled
Definition: SpiIf.h:171
SpiIf_ChMode
Definition: SpiIf.h:169
SpiIf_Ch_::flags
SpiIf_Flags flags
Definition: SpiIf.h:197
SpiIf_Exchange
SpiIf_Status(* SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:118
SpiIf_Ch_::onExchangeEnd
SpiIf_Cbk onExchangeEnd
Specifies the callback function on end of exchange.
Definition: SpiIf.h:202
SpiIf_ChMode::parityMode
uint32 parityMode
Ifx_ParityMode
Definition: SpiIf.h:182
Spi_ErrorChecks::transmit
uint32 transmit
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:164
SpiIf_initConfig
IFX_EXTERN void SpiIf_initConfig(SpiIf_Config *config)
Definition: SpiIf.c:27
SpiIf_Config::erPriority
Ifx_Priority erPriority
Specifies the priority of the error interrupt.
Definition: SpiIf.h:148
SpiIf_ClockPolarity_idleLow
Definition: SpiIf.h:86
SpiIf_Ch_::rx
SpiIf_Job rx
Definition: SpiIf.h:201
SpiIf_SlsoTiming_0
Definition: SpiIf.h:59
SpiIf_::rxCount
uint32 rxCount
Definition: SpiIf.h:139
SpiIf_GetStatus
SpiIf_Status(* SpiIf_GetStatus)(SpiIf_Ch *handle)
Definition: SpiIf.h:119
SpiIf_DataHeading_lsbFirst
Definition: SpiIf.h:72
SpiIf_Job::remaining
Ifx_SizeT remaining
Definition: SpiIf.h:107
SpiIf_::sending
uint32 sending
Definition: SpiIf.h:136
SpiIf_Config::buffer
void * buffer
Specifies the buffer location.The buffer parameter must point on a free memory location where the buf...
Definition: SpiIf.h:151
SpiIf_Ch_::txHandler
TxRxHandler txHandler
Definition: SpiIf.h:204
SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
Definition: SpiIf.h:79
SpiIf_Config::isrProvider
IfxSrc_Tos isrProvider
Specifies the handler of the interrupts.
Definition: SpiIf.h:149
SpiIf_Job
Definition: SpiIf.h:104
SpiIf_ChMode::autoCS
uint32 autoCS
1 = chip select is controlled by the hardware module or, 0 = by software.
Definition: SpiIf.h:172
SpiIf_Ch_::driver
SpiIf * driver
Pointer to the SPI interface driver.
Definition: SpiIf.h:196
SpiIf_Config::rxPriority
Ifx_Priority rxPriority
Specifies the priority of the receive interrupt.
Definition: SpiIf.h:146
SpiIf_Config::mode
SpiIf_Mode mode
Specifies the interface operation mode.
Definition: SpiIf.h:145
Spi_ErrorChecks::phase
uint32 phase
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:162
sint32
long sint32
Definition: Platform_Types.h:131
SpiIf_exchange
IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
Definition: SpiIf.h:254
SpiIf_Ch_::rxHandler
TxRxHandler rxHandler
Definition: SpiIf.h:205
SpiIf_SlsoTiming_6
Definition: SpiIf.h:65
SpiIf_ChMode::csTrailDelay
SpiIf_SlsoTiming_HalfTsclk csTrailDelay
CS Trail Delay in Tsclk/2 units.
Definition: SpiIf.h:186
SpiIf_ChConfig_::mode
SpiIf_ChMode mode
Definition: SpiIf.h:212
SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
Definition: SpiIf.h:80
SpiIf_SlsoTiming_3
Definition: SpiIf.h:62
SpiIf_Mode_undefined
Undefined mode.
Definition: SpiIf.h:115
SpiIf_Status
SpiIf_Status
SPI Interface Status.
Definition: SpiIf.h:49
SpiIf_funcs::onError
SpiIf_OnEvent onError
Definition: SpiIf.h:130
SpiIf_ChMode::csActiveLevel
uint32 csActiveLevel
Ifx_ActiveState
Definition: SpiIf.h:179
SpiIf_Mode
SpiIf_Mode
Definition: SpiIf.h:111
SpiIf_Config::txPriority
Ifx_Priority txPriority
Specifies the priority of the transmit interrupt.
Definition: SpiIf.h:147
SpiIf_getStatus
IFX_INLINE SpiIf_Status SpiIf_getStatus(SpiIf_Ch *handle)
Definition: SpiIf.h:264
SpiIf_Flags
Definition: SpiIf.h:98
SpiIf_Cbk
void(* SpiIf_Cbk)(void *data)
SPI channel callback prototype.
Definition: SpiIf.h:191
SpiIf_Ch_::errorChecks
Spi_ErrorChecks errorChecks
Error checks.
Definition: SpiIf.h:198
SpiIf_SlsoTiming_1
Definition: SpiIf.h:60
SpiIf_Job::data
void * data
Definition: SpiIf.h:106
SpiIf_OnEvent
void(* SpiIf_OnEvent)(SpiIf *handle)
Definition: SpiIf.h:120
SpiIf_Ch_
Definition: SpiIf.h:194
Spi_ErrorChecks::receive
uint32 receive
TRUE = checked, FALSE = ignored.
Definition: SpiIf.h:163


iLLD_TC26B: TPwm.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
TPwm.h
Go to the documentation of this file.
1 /**
2 * \file TPwm.h
3 * \brief TPWM interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:18 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_if_tpwm TPWM interface
24 * \ingroup library_srvsw_if
25 *
26 */
27
28 #ifndef TPWM_H_
29 #define TPWM_H_ 1
30
31 #include "Cpu/Std/Ifx_Types.h"
32
33 typedef struct TPwm_s TPwm;
34 typedef void (*TPwm_Start)(TPwm *handle);
35 typedef void (*TPwm_Pause)(TPwm *handle);
36 typedef void (*TPwm_Resume)(TPwm *handle);
37 typedef void (*TPwm_Stop)(TPwm *handle);
38
39 typedef struct
40 {
41 TPwm_Start start;
42 TPwm_Pause pause;
43 TPwm_Resume resume;
44 TPwm_Stop stop;
45 } TPwm_Functions;
46
47 /** \brief Structure of the TPwm interface */
48 struct TPwm_s
49 {
50 float32 frequency; /**< \brief Actual frequency */
51 Ifx_TimerValue period; /**< \brief Actual timer period */
52 #if IFX_CFG_USE_STANDARD_INTERFACE
53 TPwm_Functions functions; /**< \brief Actual timer period */
54 #endif
55 };
56
57 /** \brief Configuration structure of the TPwm interface */
58 typedef struct
59 {
60 float32 frequency; /**< \brief Specify expected PWM frequency in Hertz */
61 Ifx_TimerValue waitingTime; /**< \brief Specify the expected ticks before timer starts (TWAIT) */
62 Ifx_TimerValue activeCount; /**< \brief Specify active PWM period (TCOUNT) */
63 Ifx_TimerValue period; /**< \brief Specify expected PWM period in ticks. */
64 Ifx_ActiveState activeState; /**< \brief Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of waitingTicks */
65 } TPwm_Config;
66
67 #if IFX_CFG_USE_STANDARD_INTERFACE
68 IFX_INLINE void TPwm_start(TPwm *handle) {handle->functions.start(handle); }
69 IFX_INLINE void TPwm_pause(TPwm *handle) {handle->functions.pause(handle); }
70 IFX_INLINE void TPwm_resume(TPwm *handle) {handle->functions.resume(handle); }
71 IFX_INLINE void TPwm_stop(TPwm *handle) {handle->functions.stop(handle); }
72 #endif
73
74 #endif /* TPWM_H_ */
TPwm_Pause
void(* TPwm_Pause)(TPwm *handle)
Definition: TPwm.h:35
TPwm_Config::activeState
Ifx_ActiveState activeState
Active state select for PWM output. Active high means that the PWM edge is rising at the elapsed of w...
Definition: TPwm.h:64
float32
float float32
Definition: Platform_Types.h:167
TPwm_Config
Configuration structure of the TPwm interface.
Definition: TPwm.h:58
TPwm_Functions::start
TPwm_Start start
Definition: TPwm.h:41
Ifx_ActiveState
Ifx_ActiveState
Signal active state definition.
Definition: Ifx_Types.h:96
TPwm_Start
void(* TPwm_Start)(TPwm *handle)
Definition: TPwm.h:34
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
TPwm_Functions::stop
TPwm_Stop stop
Definition: TPwm.h:44
TPwm_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: TPwm.h:62
TPwm_Functions::pause
TPwm_Pause pause
Definition: TPwm.h:42
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
TPwm_Functions::resume
TPwm_Resume resume
Definition: TPwm.h:43
TPwm_s
Structure of the TPwm interface.
Definition: TPwm.h:48
TPwm_s::frequency
float32 frequency
Actual frequency.
Definition: TPwm.h:50
TPwm_s::period
Ifx_TimerValue period
Actual timer period.
Definition: TPwm.h:51
TPwm_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: TPwm.h:61
TPwm_Functions
Definition: TPwm.h:39
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
TPwm_Resume
void(* TPwm_Resume)(TPwm *handle)
Definition: TPwm.h:36
TPwm_Stop
void(* TPwm_Stop)(TPwm *handle)
Definition: TPwm.h:37


iLLD_TC26B: Timer.h Source File

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Timer.h
Go to the documentation of this file.
1 /**
2 * \file Timer.h
3 * \brief Timer interface
4 *
5 * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
6 *
7 * $Date: 2014-02-27 20:08:19 GMT$
8 *
9 * IMPORTANT NOTICE
10 *
11 *
12 * Infineon Technologies AG (Infineon) is supplying this file for use
13 * exclusively with Infineon's microcontroller products. This file can be freely
14 * distributed within development tools that are supporting such microcontroller
15 * products.
16 *
17 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20 * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21 * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22 *
23 * \defgroup library_srvsw_if_timer Timer interface
24 * \ingroup library_srvsw_if
25 *
26 */
27
28 #ifndef TIMER_H_
29 #define TIMER_H_ 1
30
31 #include "Cpu/Std/Ifx_Types.h"
32
33 typedef struct Timer_s Timer;
34 typedef void (*Timer_Start)(Timer *handle);
35 typedef void (*Timer_Stop)(Timer *handle);
36 typedef void (*Timer_SynchronousStart)(Timer *handle);
37 typedef void (*Timer_SynchronousStop)(Timer *handle);
38 typedef void (*Timer_CountOneStep)(Timer *handle);
39 typedef void (*Timer_StartSingleShotMode)(Timer *handle);
40
41 typedef struct
42 {
43 Timer_Start start;
44 Timer_Stop stop;
45 Timer_SynchronousStart synchronousStart;
46 Timer_SynchronousStop synchronousStop;
47 Timer_CountOneStep countOneStep;
48 Timer_StartSingleShotMode startSingleShotMode;
49 } Timer_Functions;
50
51 /** \brief Structure of the Timer interface */
52 struct Timer_s
53 {
54 float32 t12Frequency; /**< \brief Actual timer12 frequency */
55 Ifx_TimerValue t12Period; /**< \brief Actual timer 12 period */
56 float32 t13Frequency; /**< \brief Actual timer13 frequency */
57 Ifx_TimerValue t13Period; /**< \brief Actual timer 13 period */
58 #if IFX_CFG_USE_STANDARD_INTERFACE
59 Timer_Functions functions; /**< \brief timer functions */
60 #endif
61 };
62
63 /** \brief Configuration structure of the Timer interface */
64 typedef struct
65 {
66 float32 t12Frequency; /**< \brief Specify expected T12 PWM frequency in Hertz */
67 Ifx_TimerValue t12Period; /**< \brief Specify expected T12 PWM period in ticks. */
68 float32 t13Frequency; /**< \brief Specify expected T13 PWM frequency in Hertz */
69 Ifx_TimerValue t13Period; /**< \brief Specify expected T13 PWM period in ticks. */
70 Ifx_TimerValue waitingTime; /**< \brief Specify the expected ticks before timer starts (TWAIT) */
71 Ifx_TimerValue activeCount; /**< \brief Specify active PWM period (TCOUNT) */
72 } Timer_Config;
73
74 #if IFX_CFG_USE_STANDARD_INTERFACE
75 IFX_INLINE void Timer_start(Timer *handle) {handle->functions.start(handle); }
76 IFX_INLINE void Timer_stop(Timer *handle) {handle->functions.stop(handle); }
77 IFX_INLINE void Timer_synchronousStart(Timer *handle) {handle->functions.synchronousStart(handle); }
78 IFX_INLINE void Timer_synchronousStop(Timer *handle) {handle->functions.synchronousStop(handle); }
79 IFX_INLINE void Timer_countOneStep(Timer *handle) {handle->functions.countOneStep(handle); }
80 IFX_INLINE void Timer_startSingleShotMode(Timer *handle) {handle->functions.startSingleShotMode(handle); }
81 #endif
82
83 #endif /* TIMER_H_ */
Timer_StartSingleShotMode
void(* Timer_StartSingleShotMode)(Timer *handle)
Definition: Timer.h:39
Timer_CountOneStep
void(* Timer_CountOneStep)(Timer *handle)
Definition: Timer.h:38
Timer_Functions::startSingleShotMode
Timer_StartSingleShotMode startSingleShotMode
Definition: Timer.h:48
Timer_Functions::countOneStep
Timer_CountOneStep countOneStep
Definition: Timer.h:47
Timer_Start
void(* Timer_Start)(Timer *handle)
Definition: Timer.h:34
Timer_Config::activeCount
Ifx_TimerValue activeCount
Specify active PWM period (TCOUNT)
Definition: Timer.h:71
Timer_Functions::start
Timer_Start start
Definition: Timer.h:43
float32
float float32
Definition: Platform_Types.h:167
Timer_s::t12Frequency
float32 t12Frequency
Actual timer12 frequency.
Definition: Timer.h:54
Timer_Config
Configuration structure of the Timer interface.
Definition: Timer.h:64
Timer_Stop
void(* Timer_Stop)(Timer *handle)
Definition: Timer.h:35
Timer_Functions::stop
Timer_Stop stop
Definition: Timer.h:44
Timer_SynchronousStop
void(* Timer_SynchronousStop)(Timer *handle)
Definition: Timer.h:37
IFX_INLINE
#define IFX_INLINE
Definition: CompilerDcc.h:81
Timer_Functions::synchronousStop
Timer_SynchronousStop synchronousStop
Definition: Timer.h:46
Timer_Functions::synchronousStart
Timer_SynchronousStart synchronousStart
Definition: Timer.h:45
Timer_s
Structure of the Timer interface.
Definition: Timer.h:52
Timer_s::t12Period
Ifx_TimerValue t12Period
Actual timer 12 period.
Definition: Timer.h:55
Timer_SynchronousStart
void(* Timer_SynchronousStart)(Timer *handle)
Definition: Timer.h:36
Ifx_Types.h
This files defines all types used by the IFX HAL and libraries.
Timer_s::t13Frequency
float32 t13Frequency
Actual timer13 frequency.
Definition: Timer.h:56
Timer_s::t13Period
Ifx_TimerValue t13Period
Actual timer 13 period.
Definition: Timer.h:57
Timer_Functions
Definition: Timer.h:41
Ifx_TimerValue
uint32 Ifx_TimerValue
Used in timer values.
Definition: Ifx_Types.h:84
Timer_Config::waitingTime
Ifx_TimerValue waitingTime
Specify the expected ticks before timer starts (TWAIT)
Definition: Timer.h:70


iLLD_TC26B: Std Directory Reference

  • Iom
  • Std
Std Directory Reference

Files

file | IfxIom.c [code]
IOM basic functionality.
file | IfxIom.h [code]
IOM basic functionality.


iLLD_TC26B: Gpt12 Directory Reference

  • Gpt12
Gpt12 Directory Reference

Directories

directory | IncrEnc
directory | Std


iLLD_TC26B: Std Directory Reference

  • Ccu6
  • Std
Std Directory Reference

Files

file | IfxCcu6.c [code]
CCU6 basic functionality.
file | IfxCcu6.h [code]
CCU6 basic functionality.


iLLD_TC26B: Asc Directory Reference

  • Asclin
  • Asc
Asc Directory Reference

Files

file | IfxAsclin_Asc.c [code]
ASCLIN ASC details.
file | IfxAsclin_Asc.h [code]
ASCLIN ASC details.


iLLD_TC26B: Std Directory Reference

  • Psi5
  • Std
Std Directory Reference

Files

file | IfxPsi5.c [code]
PSI5 basic functionality.
file | IfxPsi5.h [code]
PSI5 basic functionality.


iLLD_TC26B: Timer Directory Reference

  • Gtm
  • Atom
  • Timer
Timer Directory Reference

Files

file | IfxGtm_Atom_Timer.c [code]
GTM TIMER details.
file | IfxGtm_Atom_Timer.h [code]
GTM TIMER details.


iLLD_TC26B: dosAndDont Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • dosAndDont
dosAndDont Directory Reference

Files

file | lld_dosanddont.c [code]
file | lld_dosanddont_enumUsage.c [code]
file | lld_dosanddont_namingConvention.c [code]
file | lld_dosanddont_optimisation.c [code]


iLLD_TC26B: Psi5s Directory Reference

  • Psi5s
  • Psi5s
Psi5s Directory Reference

Files

file | IfxPsi5s_Psi5s.c [code]
PSI5S PSI5S details.
file | IfxPsi5s_Psi5s.h [code]
PSI5S PSI5S details.


iLLD_TC26B: Sent Directory Reference

  • Sent
  • Sent
Sent Directory Reference

Files

file | IfxSent_Sent.c [code]
SENT SENT details.
file | IfxSent_Sent.h [code]
SENT SENT details.


iLLD_TC26B: Cif Directory Reference

  • Cif
Cif Directory Reference

Directories

directory | Cam
directory | Std


iLLD_TC26B: Pwm Directory Reference

  • Gtm
  • Tom
  • Pwm
Pwm Directory Reference

Files

file | IfxGtm_Tom_Pwm.c [code]
GTM PWM details.
file | IfxGtm_Tom_Pwm.h [code]
GTM PWM details.


iLLD_TC26B: Lin Directory Reference

  • Asclin
  • Lin
Lin Directory Reference

Files

file | IfxAsclin_Lin.c [code]
ASCLIN LIN details.
file | IfxAsclin_Lin.h [code]
ASCLIN LIN details.


iLLD_TC26B: Stm Directory Reference

  • Stm
Stm Directory Reference

Directories

directory | Std
directory | Timer


iLLD_TC26B: doxygen Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
doxygen Directory Reference

Directories

directory common


iLLD_TC26B: Scu Directory Reference

  • Scu
Scu Directory Reference

Directories

directory Std


iLLD_TC26B: Tricore Directory Reference

  • Infra
  • Platform
  • Tricore
Tricore Directory Reference

Directories

directory Compilers


iLLD_TC26B: Src Directory Reference

  • Src
Src Directory Reference

Directories

directory Std


iLLD_TC26B: TPwm Directory Reference

  • Ccu6
  • TPwm
TPwm Directory Reference

Files

file | IfxCcu6_TPwm.c [code]
CCU6 TPWM details.
file | IfxCcu6_TPwm.h [code]
CCU6 TPWM details.


iLLD_TC26B: Tim Directory Reference

  • Gtm
  • Tim
Tim Directory Reference

Directories

directory In


iLLD_TC26B: Tom Directory Reference

  • Gtm
  • Tom
Tom Directory Reference

Directories

directory | Pwm
directory | PwmHl
directory | Timer


iLLD_TC26B: Std Directory Reference

  • Port
  • Std
Std Directory Reference

Files

file | IfxPort.c [code]
PORT basic functionality.
file | IfxPort.h [code]
PORT basic functionality.


iLLD_TC26B: Crc Directory Reference

  • Fce
  • Crc
Crc Directory Reference

Files

file | IfxFce_Crc.c [code]
FCE CRC details.
file | IfxFce_Crc.h [code]
FCE CRC details.


iLLD_TC26B: Psi5 Directory Reference

  • Psi5
  • Psi5
Psi5 Directory Reference

Files

file | IfxPsi5_Psi5.c [code]
PSI5 PSI5 details.
file | IfxPsi5_Psi5.h [code]
PSI5 PSI5 details.


iLLD_TC26B: Io Directory Reference

  • Port
  • Io
Io Directory Reference

Files

file | IfxPort_Io.c [code]
PORT IO details.
file | IfxPort_Io.h [code]
PORT IO details.


iLLD_TC26B: Iom Directory Reference

  • Iom
Iom Directory Reference

Directories

directory | Driver
directory | Std


iLLD_TC26B: IncrEnc Directory Reference

  • Gpt12
  • IncrEnc
IncrEnc Directory Reference

Files

file | IfxGpt12_IncrEnc.c [code]
GPT12 INCRENC details.
file | IfxGpt12_IncrEnc.h [code]
GPT12 INCRENC details.


iLLD_TC26B: Emem Directory Reference

  • Emem
Emem Directory Reference

Directories

directory Std


iLLD_TC26B: Std Directory Reference

  • Scu
  • Std
Std Directory Reference

Files

file | IfxScuCcu.c [code]
SCU basic functionality.
file | IfxScuCcu.h [code]
SCU basic functionality.
file | IfxScuEru.c [code]
SCU basic functionality.
file | IfxScuEru.h [code]
SCU basic functionality.
file | IfxScuWdt.asm.h [code]
SCU basic functionality.
file | IfxScuWdt.c [code]
SCU basic functionality.
file | IfxScuWdt.h [code]
SCU basic functionality.


iLLD_TC26B: General Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • General
General Directory Reference

Files

file | Ifx_GlobalResources.c [code]
file | Ifx_GlobalResources.h [code]
Handling of global resources.


iLLD_TC26B: _PinMap Directory Reference

  • _PinMap
_PinMap Directory Reference

Files

file | IfxAsclin_PinMap.c [code]
ASCLIN I/O map.
file | IfxAsclin_PinMap.h [code]
ASCLIN I/O map.
file | IfxCcu6_PinMap.c [code]
CCU6 I/O map.
file | IfxCcu6_PinMap.h [code]
CCU6 I/O map.
file | IfxCif_PinMap.c [code]
CIF I/O map.
file | IfxCif_PinMap.h [code]
CIF I/O map.
file | IfxDsadc_PinMap.c [code]
DSADC I/O map.
file | IfxDsadc_PinMap.h [code]
DSADC I/O map.
file | IfxEray_PinMap.c [code]
ERAY I/O map.
file | IfxEray_PinMap.h [code]
ERAY I/O map.
file | IfxEth_PinMap.c [code]
ETH I/O map.
file | IfxEth_PinMap.h [code]
ETH I/O map.
file | IfxGpt12_PinMap.c [code]
GPT12 I/O map.
file | IfxGpt12_PinMap.h [code]
GPT12 I/O map.
file | IfxGtm_PinMap.c [code]
GTM I/O map.
file | IfxGtm_PinMap.h [code]
GTM I/O map.
file | IfxI2c_PinMap.c [code]
I2C I/O map.
file | IfxI2c_PinMap.h [code]
I2C I/O map.
file | IfxMsc_PinMap.c [code]
MSC I/O map.
file | IfxMsc_PinMap.h [code]
MSC I/O map.
file | IfxMultican_PinMap.c [code]
MULTICAN I/O map.
file | IfxMultican_PinMap.h [code]
MULTICAN I/O map.
file | IfxPort_PinMap.c [code]
PORT I/O map.
file | IfxPort_PinMap.h [code]
PORT I/O map.
file | IfxPsi5_PinMap.c [code]
PSI5 I/O map.
file | IfxPsi5_PinMap.h [code]
PSI5 I/O map.
file | IfxPsi5s_PinMap.c [code]
PSI5S I/O map.
file | IfxPsi5s_PinMap.h [code]
PSI5S I/O map.
file | IfxQspi_PinMap.c [code]
QSPI I/O map.
file | IfxQspi_PinMap.h [code]
QSPI I/O map.
file | IfxScu_PinMap.c [code]
SCU I/O map.
file | IfxScu_PinMap.h [code]
SCU I/O map.
file | IfxSent_PinMap.c [code]
SENT I/O map.
file | IfxSent_PinMap.h [code]
SENT I/O map.
file | IfxSmu_PinMap.c [code]
SMU I/O map.
file | IfxSmu_PinMap.h [code]
SMU I/O map.
file | IfxVadc_PinMap.c [code]
VADC I/O map.
file | IfxVadc_PinMap.h [code]
VADC I/O map.


iLLD_TC26B: Std Directory Reference

  • Dma
  • Std
Std Directory Reference

Files

file | IfxDma.c [code]
DMA basic functionality.
file | IfxDma.h [code]
DMA basic functionality.


iLLD_TC26B: Mtu Directory Reference

  • Mtu
Mtu Directory Reference

Directories

directory Std


iLLD_TC26B: Std Directory Reference

  • Src
  • Std
Std Directory Reference

Files

file | IfxSrc.c [code]
SRC basic functionality.
file | IfxSrc.h [code]
SRC basic functionality.


iLLD_TC26B: Dsadc Directory Reference

  • Dsadc
Dsadc Directory Reference

Directories

directory | Dsadc
directory | Rdc
directory | Std


iLLD_TC26B: Std Directory Reference

  • Eray
  • Std
Std Directory Reference

Files

file | IfxEray.c [code]
ERAY basic functionality.
file | IfxEray.h [code]
ERAY basic functionality.


iLLD_TC26B: Driver Directory Reference

  • Iom
  • Driver
Driver Directory Reference

Files

file | IfxIom_Driver.c [code]
IOM DRIVER details.
file | IfxIom_Driver.h [code]
IOM DRIVER details.


iLLD_TC26B: Eray Directory Reference

  • Eray
  • Eray
Eray Directory Reference

Files

file | IfxEray_Eray.c [code]
ERAY ERAY details.
file | IfxEray_Eray.h [code]
ERAY ERAY details.


iLLD_TC26B: Phy_Pef7071 Directory Reference

  • Eth
  • Phy_Pef7071
Phy_Pef7071 Directory Reference

Files

file | IfxEth_Phy_Pef7071.c [code]
ETH PHY_PEF7071 details.
file | IfxEth_Phy_Pef7071.h [code]
ETH PHY_PEF7071 details.


iLLD_TC26B: Std Directory Reference

  • Eth
  • Std
Std Directory Reference

Files

file | IfxEth.c [code]
ETH basic functionality.
file | IfxEth.h [code]
ETH basic functionality.


iLLD_TC26B: SpiSlave Directory Reference

  • Qspi
  • SpiSlave
SpiSlave Directory Reference

Files

file | IfxQspi_SpiSlave.c [code]
QSPI SPISLAVE details.
file | IfxQspi_SpiSlave.h [code]
QSPI SPISLAVE details.


iLLD_TC26B: Dma Directory Reference

  • Dma
Dma Directory Reference

Directories

directory | Dma
directory | Std


iLLD_TC26B: Std Directory Reference

  • I2c
  • Std
Std Directory Reference

Files

file | IfxI2c.c [code]
I2C basic functionality.
file | IfxI2c.h [code]
I2C basic functionality.


iLLD_TC26B: bollusai Directory Reference

  • bollusai
bollusai Directory Reference

Directories

directory illd_development


iLLD_TC26B: Hssl Directory Reference

  • Hssl
Hssl Directory Reference

Directories

directory | Hssl
directory | Std


iLLD_TC26B: Timer Directory Reference

  • Gtm
  • Tom
  • Timer
Timer Directory Reference

Files

file | IfxGtm_Tom_Timer.c [code]
GTM TIMER details.
file | IfxGtm_Tom_Timer.h [code]
GTM TIMER details.


iLLD_TC26B: Atom Directory Reference

  • Gtm
  • Atom
Atom Directory Reference

Directories

directory | Pwm
directory | PwmHl
directory | Timer


iLLD_TC26B: Pwm Directory Reference

  • Gtm
  • Atom
  • Pwm
Pwm Directory Reference

Files

file | IfxGtm_Atom_Pwm.c [code]
GTM PWM details.
file | IfxGtm_Atom_Pwm.h [code]
GTM PWM details.


iLLD_TC26B: Can Directory Reference

  • Multican
  • Can
Can Directory Reference

Files

file | IfxMultican_Can.c [code]
MULTICAN CAN details.
file | IfxMultican_Can.h [code]
MULTICAN CAN details.


iLLD_TC26B: Infra Directory Reference

  • Infra
Infra Directory Reference

Directories

directory Platform


iLLD_TC26B: Comm Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Comm
Comm Directory Reference

Files

file | Ifx_Console.c [code]
Main Ifx_Console module implementation file.
file | Ifx_Console.h [code]
Main Console module header file.
file | Ifx_Shell.c [code]
shell functions.
file | Ifx_Shell.h [code]
Shell functions.


iLLD_TC26B: Msc Directory Reference

  • Msc
Msc Directory Reference

Directories

directory | Msc
directory | Std


iLLD_TC26B: CStart Directory Reference

  • Cpu
  • CStart
CStart Directory Reference

Files

file | IfxCpu_CStart.h [code]
This file contains the Core startup sequence.
file | IfxCpu_CStart0.c [code]
This file contains the Core startup sequence for Cpu0.
file | IfxCpu_CStart1.c [code]
This file contains the Core startup sequence for Cpu1.


iLLD_TC26B: Std Directory Reference

  • Asclin
  • Std
Std Directory Reference

Files

file | IfxAsclin.c [code]
ASCLIN basic functionality.
file | IfxAsclin.h [code]
ASCLIN basic functionality.


iLLD_TC26B: Fft Directory Reference

  • Fft
Fft Directory Reference

Directories

directory | Fft
directory | Std


iLLD_TC26B: Sent Directory Reference

  • Sent
Sent Directory Reference

Directories

directory | Sent
directory | Std


iLLD_TC26B: Smu Directory Reference

  • Smu
Smu Directory Reference

Directories

directory Std


iLLD_TC26B: Std Directory Reference

  • Gtm
  • Std
Std Directory Reference

Files

file | IfxGtm.c [code]
GTM basic functionality.
file | IfxGtm.h [code]
GTM basic functionality.
file | IfxGtm_Atom.c [code]
GTM basic functionality.
file | IfxGtm_Atom.h [code]
GTM basic functionality.
file | IfxGtm_Cmu.c [code]
GTM basic functionality.
file | IfxGtm_Cmu.h [code]
GTM basic functionality.
file | IfxGtm_Dpll.c [code]
GTM basic functionality.
file | IfxGtm_Dpll.h [code]
GTM basic functionality.
file | IfxGtm_Tbu.c [code]
GTM basic functionality.
file | IfxGtm_Tbu.h [code]
GTM basic functionality.
file | IfxGtm_Tim.c [code]
GTM basic functionality.
file | IfxGtm_Tim.h [code]
GTM basic functionality.
file | IfxGtm_Tom.c [code]
GTM basic functionality.
file | IfxGtm_Tom.h [code]
GTM basic functionality.


iLLD_TC26B: Std Directory Reference

  • Smu
  • Std
Std Directory Reference

Files

file | IfxSmu.c [code]
SMU basic functionality.
file | IfxSmu.h [code]
SMU basic functionality.


iLLD_TC26B: Std Directory Reference

  • Cpu
  • Std
Std Directory Reference

Files

file | Ifx_Types.h [code]
This files defines all types used by the IFX HAL and libraries.
file | Ifx_TypesDcc.h [code]
file | Ifx_TypesGhs.h [code]
file | Ifx_TypesGnuc.h [code]
file | Ifx_TypesTasking.h [code]
file | IfxCpu.c [code]
CPU basic functionality.
file | IfxCpu.h [code]
CPU basic functionality.
file | IfxCpu_Intrinsics.h [code]
file | IfxCpu_IntrinsicsDcc.h [code]
file | IfxCpu_IntrinsicsGhs.h [code]
file | IfxCpu_IntrinsicsGnuc.h [code]
file | IfxCpu_IntrinsicsTasking.h [code]
file | Platform_Types.h [code]


iLLD_TC26B: Math Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Math
Math Directory Reference

Files

file | Ifx_AngleTrkF32.c [code]
Angle-tracking observer for sin/cos analog position sensor.
file | Ifx_AngleTrkF32.h [code]
Angle-tracking observer for sin/cos analog position sensor.
file | Ifx_Cf32.c [code]
Floating point signal, vector, and matrix library.
file | Ifx_Cf32.h [code]
Floating point signal, vector, and matrix library.
file | Ifx_Crc.c [code]
CRC algorithm.
file | Ifx_Crc.h [code]
CRC algorithm.
file | Ifx_FftF32.c [code]
Floating-point Fast Fourier Transform.
file | Ifx_FftF32.h [code]
Floating-point Fast Fourier Transform.
file | Ifx_FftF32_BitReverseTable.c [code]
Bit-reversal lookup for Floating-point Fast Fourier Transform.
file | Ifx_FftF32_TwiddleTable.c [code]
Floating-point Fast Fourier Transform Twiddle-Factors.
file | Ifx_IntegralF32.c [code]
Discrete integral approximation.
file | Ifx_IntegralF32.h [code]
Discrete integral approximation.
file | Ifx_LowPassPt1F32.c [code]
Low pass filter PT1.
file | Ifx_LowPassPt1F32.h [code]
Low pass filter PT1.
file | Ifx_Lut.h [code]
Lookup defintion with fixed-point angle data type.
file | Ifx_LutAtan2F32.c [code]
ATAN2 lookup functions with fixed-point angle data type.
file | Ifx_LutAtan2F32.h [code]
Floating point signal, vector, and matrix library.
file | Ifx_LutAtan2F32_Table.c [code]
Table data for ATAN2 lookup functions.
file | Ifx_LutIndexedLinearF32.h [code]
Look-up functionality.
file | Ifx_LutLinearF32.c [code]
Linear look-up function.
file | Ifx_LutLinearF32.h [code]
Look-up functionality.
file | Ifx_LutLSincosF32.c [code]
Table data for linear interpolation Sin/Cos lookup functions.
file | Ifx_LutLSincosF32.h [code]
Sin/Cos linear approximated lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32.c [code]
Sin/Cos lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32.h [code]
Sin/Cos lookup functions with fixed-point angle data type.
file | Ifx_LutSincosF32_Table.c [code]
Table data for Sin/Cos lookup functions.
file | Ifx_RampF32.c [code]
Ramp function.
file | Ifx_RampF32.h [code]
Ramp function.
file | Ifx_WndF32.h [code]
Windowing function.
file | Ifx_WndF32_BlackmanHarrisTable.c [code]
Lookup table for Blackman-Harris window function.
file | Ifx_WndF32_HannTable.c [code]
Lookup table for Hann window function.


iLLD_TC26B: Std Directory Reference

  • Qspi
  • Std
Std Directory Reference

Files

file | IfxQspi.c [code]
QSPI basic functionality.
file | IfxQspi.h [code]
QSPI basic functionality.


iLLD_TC26B: Std Directory Reference

  • Multican
  • Std
Std Directory Reference

Files

file | IfxMultican.c [code]
MULTICAN basic functionality.
file | IfxMultican.h [code]
MULTICAN basic functionality.


iLLD_TC26B: Std Directory Reference

  • Fce
  • Std
Std Directory Reference

Files

file | IfxFce.c [code]
FCE basic functionality.
file | IfxFce.h [code]
FCE basic functionality.


iLLD_TC26B: PwmHl Directory Reference

  • Gtm
  • Atom
  • PwmHl
PwmHl Directory Reference

Files

file | IfxGtm_Atom_PwmHl.c [code]
GTM PWMHL details.
file | IfxGtm_Atom_PwmHl.h [code]
GTM PWMHL details.


iLLD_TC26B: PwmHl Directory Reference

  • Gtm
  • Tom
  • PwmHl
PwmHl Directory Reference

Files

file | IfxGtm_Tom_PwmHl.c [code]
GTM PWMHL details.
file | IfxGtm_Tom_PwmHl.h [code]
GTM PWMHL details.


iLLD_TC26B: Trig Directory Reference

  • Gtm
  • Trig
Trig Directory Reference

Files

file | IfxGtm_Trig.c [code]
GTM TRIG details.
file | IfxGtm_Trig.h [code]
GTM TRIG details.


iLLD_TC26B: Rdc Directory Reference

  • Dsadc
  • Rdc
Rdc Directory Reference

Files

file | IfxDsadc_Rdc.c [code]
DSADC RDC details.
file | IfxDsadc_Rdc.h [code]
DSADC RDC details.


iLLD_TC26B: Std Directory Reference

  • Flash
  • Std
Std Directory Reference

Files

file | IfxFlash.c [code]
FLASH basic functionality.
file | IfxFlash.h [code]
FLASH basic functionality.


iLLD_TC26B: Ccu6If Directory Reference

  • Service
  • CpuGeneric
  • If
  • Ccu6If
Ccu6If Directory Reference

Files

file | Icu.h [code]
ICU interface.
file | PwmHl.h [code]
Multi-channels, dual-complementary PWM interface.
file | Timer.h [code]
Timer interface.
file | TPwm.h [code]
TPWM interface.


iLLD_TC26B: Dma Directory Reference

  • Dma
  • Dma
Dma Directory Reference

Files

file | IfxDma_Dma.c [code]
DMA DMA details.
file | IfxDma_Dma.h [code]
DMA DMA details.


iLLD_TC26B: Std Directory Reference

  • Msc
  • Std
Std Directory Reference

Files

file | IfxMsc.c [code]
MSC basic functionality.
file | IfxMsc.h [code]
MSC basic functionality.


iLLD_TC26B: InternalMux Directory Reference

  • _Lib
  • InternalMux
InternalMux Directory Reference

Files

file | Ifx_InternalMux.c [code]
Mux configuration functions.
file | Ifx_InternalMux.h [code]
Mux configuration functions.


iLLD_TC26B: Adc Directory Reference

  • Vadc
  • Adc
Adc Directory Reference

Files

file | IfxVadc_Adc.c [code]
VADC ADC details.
file | IfxVadc_Adc.h [code]
VADC ADC details.


iLLD_TC26B: PwmBc Directory Reference

  • Ccu6
  • PwmBc
PwmBc Directory Reference

Files

file | IfxCcu6_PwmBc.c [code]
CCU6 PWMBC details.
file | IfxCcu6_PwmBc.h [code]
CCU6 PWMBC details.


iLLD_TC26B: Cpu Directory Reference

  • Cpu
Cpu Directory Reference

Directories

directory | CStart
directory | Irq
directory | Std
directory | Trap


iLLD_TC26B: Std Directory Reference

  • Mtu
  • Std
Std Directory Reference

Files

file | IfxMtu.c [code]
MTU basic functionality.
file | IfxMtu.h [code]
MTU basic functionality.


iLLD_TC26B: Std Directory Reference

  • Dsadc
  • Std
Std Directory Reference

Files

file | IfxDsadc.c [code]
DSADC basic functionality.
file | IfxDsadc.h [code]
DSADC basic functionality.


iLLD_TC26B: Qspi Directory Reference

  • Qspi
Qspi Directory Reference

Directories

directory | SpiMaster
directory | SpiSlave
directory | Std


iLLD_TC26B: Time Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Time
Time Directory Reference

Files

file | Ifx_DateTime.c [code]
Date and time functions.
file | Ifx_DateTime.h [code]
Date and time functions.


iLLD_TC26B: I2c Directory Reference

  • I2c
I2c Directory Reference

Directories

directory | I2c
directory | Std


iLLD_TC26B: Port Directory Reference

  • Port
Port Directory Reference

Directories

directory | Io
directory | Std


iLLD_TC26B: Multican Directory Reference

  • Multican
Multican Directory Reference

Directories

directory | Can
directory | Std


iLLD_TC26B: Vadc Directory Reference

  • Vadc
Vadc Directory Reference

Directories

directory | Adc
directory | Std


iLLD_TC26B: illd_development Directory Reference

  • bollusai
  • illd_development
illd_development Directory Reference

Directories

directory internal


iLLD_TC26B: Bsp Directory Reference

  • Service
  • CpuGeneric
  • SysSe
  • Bsp
Bsp Directory Reference

Files

file | Assert.c [code]
Assert functions.
file | Assert.h [code]
Assert functions.
file | Bsp.c [code]
Board support package.
file | Bsp.h [code]
Board support package.


iLLD_TC26B: _Utilities Directory Reference

  • Service
  • CpuGeneric
  • _Utilities
_Utilities Directory Reference

Files

file Ifx_Assert.h [code]
Assert functions.


iLLD_TC26B: Psi5s Directory Reference

  • Psi5s
Psi5s Directory Reference

Directories

directory | Psi5s
directory | Std


iLLD_TC26B: Gtm Directory Reference

  • Gtm
Gtm Directory Reference

Directories

directory | Atom
directory | Std
directory | Tim
directory | Tom
directory | Trig


iLLD_TC26B: Trap Directory Reference

  • Cpu
  • Trap
Trap Directory Reference

Files

file | IfxCpu_Trap.c [code]
This file contains the APIs for Trap related functions.
file | IfxCpu_Trap.h [code]


iLLD_TC26B: SysSe Directory Reference

  • Service
  • CpuGeneric
  • SysSe
SysSe Directory Reference

Directories

directory | Bsp
directory | Comm
directory | General
directory | Math
directory | Time


iLLD_TC26B: Icu Directory Reference

  • Ccu6
  • Icu
Icu Directory Reference

Files

file | IfxCcu6_Icu.c [code]
CCU6 ICU details.
file | IfxCcu6_Icu.h [code]
CCU6 ICU details.


iLLD_TC26B: Ccu6 Directory Reference

  • Ccu6
Ccu6 Directory Reference

Directories

directory | Icu
directory | PwmBc
directory | PwmHl
directory | Std
directory | Timer
directory | TimerWithTrigger
directory | TPwm


iLLD_TC26B: Cam Directory Reference

  • Cif
  • Cam
Cam Directory Reference

Files

file | IfxCif_Cam.c [code]
CIF CAM details.
file | IfxCif_Cam.h [code]
CIF CAM details.


iLLD_TC26B: If Directory Reference

  • Service
  • CpuGeneric
  • If
If Directory Reference

Directories

directory Ccu6If

Files

file | SpiIf.c [code]
SPI interface.
file | SpiIf.h [code]
SPI interface types.


iLLD_TC26B: CpuGeneric Directory Reference

  • Service
  • CpuGeneric
CpuGeneric Directory Reference

Directories

directory | _Utilities
directory | If
directory | StdIf
directory | SysSe


iLLD_TC26B: Eray Directory Reference

  • Eray
Eray Directory Reference

Directories

directory | Eray
directory | Std


iLLD_TC26B: Std Directory Reference

  • Emem
  • Std
Std Directory Reference

Files

file | IfxEmem.c [code]
EMEM basic functionality.
file | IfxEmem.h [code]
EMEM basic functionality.


iLLD_TC26B: Std Directory Reference

  • Gpt12
  • Std
Std Directory Reference

Files

file | IfxGpt12.c [code]
GPT12 basic functionality.
file | IfxGpt12.h [code]
GPT12 basic functionality.


iLLD_TC26B: Platform Directory Reference

  • Infra
  • Platform
Platform Directory Reference

Directories

directory Tricore


iLLD_TC26B: Fft Directory Reference

  • Fft
  • Fft
Fft Directory Reference

Files

file | IfxFft_Fft.c [code]
FFT FFT details.
file | IfxFft_Fft.h [code]
FFT FFT details.


iLLD_TC26B: DataHandling Directory Reference

  • _Lib
  • DataHandling
DataHandling Directory Reference

Files

file | Ifx_CircularBuffer.asm.c [code]
Circular buffer functions (assembler implementation).
file | Ifx_CircularBuffer.c [code]
Circular buffer functions in C language.
file | Ifx_CircularBuffer.h [code]
Circular buffer functions.
file | Ifx_Fifo.c [code]
FIFO functions.
file | Ifx_Fifo.h [code]
FIFO buffer functions.


iLLD_TC26B: Std Directory Reference

  • Dts
  • Std
Std Directory Reference

Files

file | IfxDts.c [code]
DTS basic functionality.
file | IfxDts.h [code]
DTS basic functionality.


iLLD_TC26B: Std Directory Reference

  • Sent
  • Std
Std Directory Reference

Files

file | IfxSent.c [code]
SENT basic functionality.
file | IfxSent.h [code]
SENT basic functionality.


iLLD_TC26B: Irq Directory Reference

  • Cpu
  • Irq
Irq Directory Reference

Files

file | IfxCpu_Irq.c [code]
This file contains the APIs for Interrupt related functions.
file | IfxCpu_Irq.h [code]
This file contains the APIs for Interrupt related functions.


iLLD_TC26B: Dts Directory Reference

  • Dts
Dts Directory Reference

Directories

directory | Dts
directory | Std


iLLD_TC26B: Spi Directory Reference

  • Asclin
  • Spi
Spi Directory Reference

Files

file | IfxAsclin_Spi.c [code]
ASCLIN SPI details.
file | IfxAsclin_Spi.h [code]
ASCLIN SPI details.


iLLD_TC26B: internal Directory Reference

  • bollusai
  • illd_development
  • internal
internal Directory Reference

Directories

directory tools


iLLD_TC26B: tools Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
tools Directory Reference

Directories

directory doc


iLLD_TC26B: Service Directory Reference

  • Service
Service Directory Reference

Directories

directory CpuGeneric


iLLD_TC26B: PwmHl Directory Reference

  • Ccu6
  • PwmHl
PwmHl Directory Reference

Files

file | IfxCcu6_PwmHl.c [code]
CCU6 PWMHL details.
file | IfxCcu6_PwmHl.h [code]
CCU6 PWMHL details.


iLLD_TC26B: Std Directory Reference

  • Psi5s
  • Std
Std Directory Reference

Files

file | IfxPsi5s.c [code]
PSI5S basic functionality.
file | IfxPsi5s.h [code]
PSI5S basic functionality.


iLLD_TC26B: Compilers Directory Reference

  • Infra
  • Platform
  • Tricore
  • Compilers
Compilers Directory Reference

Files

file | CompilerDcc.c [code]
file | CompilerDcc.h [code]
file | CompilerGhs.c [code]
file | CompilerGhs.h [code]
file | CompilerGnuc.c [code]
file | CompilerGnuc.h [code]
file | Compilers.h [code]
file | CompilerTasking.c [code]
file | CompilerTasking.h [code]


iLLD_TC26B: Timer Directory Reference

  • Ccu6
  • Timer
Timer Directory Reference

Files

file | IfxCcu6_Timer.c [code]
CCU6 TIMER details.
file | IfxCcu6_Timer.h [code]
CCU6 TIMER details.


iLLD_TC26B: _Lib Directory Reference

  • _Lib
_Lib Directory Reference

Directories

directory | DataHandling
directory | InternalMux


iLLD_TC26B: Std Directory Reference

  • Hssl
  • Std
Std Directory Reference

Files

file | IfxHssl.c [code]
HSSL basic functionality.
file | IfxHssl.h [code]
HSSL basic functionality.


iLLD_TC26B: TimerWithTrigger Directory Reference

  • Ccu6
  • TimerWithTrigger
TimerWithTrigger Directory Reference

Files

file | IfxCcu6_TimerWithTrigger.c [code]
CCU6 TIMERWITHTRIGGER details.
file | IfxCcu6_TimerWithTrigger.h [code]
CCU6 TIMERWITHTRIGGER details.


iLLD_TC26B: doc Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
doc Directory Reference

Directories

directory doxygen


iLLD_TC26B: Fce Directory Reference

  • Fce
Fce Directory Reference

Directories

directory | Crc
directory | Std


iLLD_TC26B: codingRules Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
codingRules Directory Reference

Files

file | lld_codingRules.c [code]
file | lld_codingRules_codeFormating.c [code]
file | lld_codingRules_commonApis.c [code]


iLLD_TC26B: Asclin Directory Reference

  • Asclin
Asclin Directory Reference

Directories

directory | Asc
directory | Lin
directory | Spi
directory | Std


iLLD_TC26B: Hssl Directory Reference

  • Hssl
  • Hssl
Hssl Directory Reference

Files

file | IfxHssl_Hssl.c [code]
HSSL HSSL details.
file | IfxHssl_Hssl.h [code]
HSSL HSSL details.


iLLD_TC26B: Msc Directory Reference

  • Msc
  • Msc
Msc Directory Reference

Files

file | IfxMsc_Msc.c [code]
MSC MSC details.
file | IfxMsc_Msc.h [code]
MSC MSC details.


iLLD_TC26B: Dts Directory Reference

  • Dts
  • Dts
Dts Directory Reference

Files

file | IfxDts_Dts.c [code]
DTS DTS details.
file | IfxDts_Dts.h [code]
DTS DTS details.


iLLD_TC26B: _Impl Directory Reference

  • _Impl
_Impl Directory Reference

Files

file | IfxAsclin_cfg.c [code]
ASCLIN on-chip implementation data.
file | IfxAsclin_cfg.h [code]
ASCLIN on-chip implementation data.
file | IfxCcu6_cfg.c [code]
CCU6 on-chip implementation data.
file | IfxCcu6_cfg.h [code]
CCU6 on-chip implementation data.
file | IfxCif_cfg.c [code]
CIF on-chip implementation data.
file | IfxCif_cfg.h [code]
CIF on-chip implementation data.
file | IfxCpu_cfg.c [code]
CPU on-chip implementation data.
file | IfxCpu_cfg.h [code]
CPU on-chip implementation data.
file | IfxDma_cfg.c [code]
DMA on-chip implementation data.
file | IfxDma_cfg.h [code]
DMA on-chip implementation data.
file | IfxDsadc_cfg.h [code]
DSADC on-chip implementation data.
file | IfxDts_cfg.h [code]
DTS on-chip implementation data.
file | IfxEmem_cfg.c [code]
EMEM on-chip implementation data.
file | IfxEmem_cfg.h [code]
EMEM on-chip implementation data.
file | IfxEray_cfg.c [code]
ERAY on-chip implementation data.
file | IfxEray_cfg.h [code]
ERAY on-chip implementation data.
file | IfxEth_cfg.h [code]
ETH on-chip implementation data.
file | IfxFce_cfg.h [code]
FCE on-chip implementation data.
file | IfxFft_cfg.h [code]
FFT on-chip implementation data.
file | IfxFlash_cfg.c [code]
FLASH on-chip implementation data.
file | IfxFlash_cfg.h [code]
FLASH on-chip implementation data.
file | IfxGlobal_cfg.h [code]
Global definitions.
file | IfxGpt12_cfg.h [code]
GPT12 on-chip implementation data.
file | IfxGtm_cfg.c [code]
GTM on-chip implementation data.
file | IfxGtm_cfg.h [code]
GTM on-chip implementation data.
file | IfxHssl_cfg.c [code]
HSSL on-chip implementation data.
file | IfxHssl_cfg.h [code]
HSSL on-chip implementation data.
file | IfxI2c_cfg.c [code]
I2C on-chip implementation data.
file | IfxI2c_cfg.h [code]
I2C on-chip implementation data.
file | IfxIom_cfg.h [code]
IOM on-chip implementation data.
file | IfxMsc_cfg.c [code]
MSC on-chip implementation data.
file | IfxMsc_cfg.h [code]
MSC on-chip implementation data.
file | IfxMtu_cfg.c [code]
Mtu on-chip implementation data.
file | IfxMtu_cfg.h [code]
Mtu on-chip implementation data.
file | IfxMultican_cfg.c [code]
MULTICAN on-chip implementation data.
file | IfxMultican_cfg.h [code]
MULTICAN on-chip implementation data.
file | IfxPort_cfg.c [code]
PORT on-chip implementation data.
file | IfxPort_cfg.h [code]
PORT on-chip implementation data.
file | IfxPsi5_cfg.c [code]
PSI5 on-chip implementation data.
file | IfxPsi5_cfg.h [code]
PSI5 on-chip implementation data.
file | IfxPsi5s_cfg.h [code]
PSI5S on-chip implementation data.
file | IfxQspi_cfg.c [code]
QSPI on-chip implementation data.
file | IfxQspi_cfg.h [code]
QSPI on-chip implementation data.
file | IfxScu_cfg.c [code]
SCU on-chip implementation data.
file | IfxScu_cfg.h [code]
SCU on-chip implementation data.
file | IfxSent_cfg.c [code]
SENT on-chip implementation data.
file | IfxSent_cfg.h [code]
SENT on-chip implementation data.
file | IfxSmu_cfg.c [code]
SMU on-chip implementation data.
file | IfxSmu_cfg.h [code]
SMU on-chip implementation data.
file | IfxSrc_cfg.c [code]
SRC on-chip implementation data.
file | IfxSrc_cfg.h [code]
SRC on-chip implementation data.
file | IfxStm_cfg.c [code]
STM on-chip implementation data.
file | IfxStm_cfg.h [code]
STM on-chip implementation data.
file | IfxVadc_cfg.c [code]
VADC on-chip implementation data.
file | IfxVadc_cfg.h [code]
VADC on-chip implementation data.


iLLD_TC26B: Std Directory Reference

  • Fft
  • Std
Std Directory Reference

Files

file | IfxFft.c [code]
FFT basic functionality.
file | IfxFft.h [code]
FFT basic functionality.


iLLD_TC26B: Eth Directory Reference

  • Eth
Eth Directory Reference

Directories

directory | Phy_Pef7071
directory | Std


iLLD_TC26B: SpiMaster Directory Reference

  • Qspi
  • SpiMaster
SpiMaster Directory Reference

Files

file | IfxQspi_SpiMaster.c [code]
QSPI SPIMASTER details.
file | IfxQspi_SpiMaster.h [code]
QSPI SPIMASTER details.


iLLD_TC26B: common Directory Reference

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
common Directory Reference

Directories

directory | codingRules
directory | dosAndDont

Files

file | lld_api.c [code]
file | lld_conventions.c [code]
file | lld_conventionsDoxygen.c [code]
file | lld_filesAndConfig.c [code]
file | lld_structure.c [code]
file | lld_versioning.c [code]
file | mainpage.c [code]


iLLD_TC26B: StdIf Directory Reference

  • Service
  • CpuGeneric
  • StdIf
StdIf Directory Reference

Files

file | IfxStdIf.h [code]
Standard interface types.
file | IfxStdIf_DPipe.c [code]
Standard interface: Data Pipe.
file | IfxStdIf_DPipe.h [code]
Standard interface: Data Pipe.
file | IfxStdIf_Pos.c [code]
Standard interface: Position interface.
file | IfxStdIf_Pos.h [code]
Standard interface: Position interface.
file | IfxStdIf_PwmHl.c [code]
Standard interface: Multi-channels, dual-complementary PWM interface.
file | IfxStdIf_PwmHl.h [code]
Standard interface: Multi-channels, dual-complementary PWM interface.
file | IfxStdIf_Timer.c [code]
Standard interface: Timer.
file | IfxStdIf_Timer.h [code]
Standard interface: Timer.


iLLD_TC26B: Flash Directory Reference

  • Flash
Flash Directory Reference

Directories

directory Std


iLLD_TC26B: I2c Directory Reference

  • I2c
  • I2c
I2c Directory Reference

Files

file | IfxI2c_I2c.c [code]
I2C I2C details.
file | IfxI2c_I2c.h [code]
I2C I2C details.


iLLD_TC26B: Std Directory Reference

  • Cif
  • Std
Std Directory Reference

Files

file | IfxCif.c [code]
CIF basic functionality.
file | IfxCif.h [code]
CIF basic functionality.


iLLD_TC26B: Timer Directory Reference

  • Stm
  • Timer
Timer Directory Reference

Files

file | IfxStm_Timer.c [code]
STM TIMER details.
file | IfxStm_Timer.h [code]
STM TIMER details.


iLLD_TC26B: Psi5 Directory Reference

  • Psi5
Psi5 Directory Reference

Directories

directory | Psi5
directory | Std


iLLD_TC26B: Std Directory Reference

  • Stm
  • Std
Std Directory Reference

Files

file | IfxStm.c [code]
STM basic functionality.
file | IfxStm.h [code]
STM basic functionality.


iLLD_TC26B: Dsadc Directory Reference

  • Dsadc
  • Dsadc
Dsadc Directory Reference

Files

file | IfxDsadc_Dsadc.c [code]
DSADC DSADC details.
file | IfxDsadc_Dsadc.h [code]
DSADC DSADC details.


iLLD_TC26B: Std Directory Reference

  • Vadc
  • Std
Std Directory Reference

Files

file | IfxVadc.c [code]
VADC basic functionality.
file | IfxVadc.h [code]
VADC basic functionality.


iLLD_TC26B: In Directory Reference

  • Gtm
  • Tim
  • In
In Directory Reference

Files

file | IfxGtm_Tim_In.c [code]
GTM IN details.
file | IfxGtm_Tim_In.h [code]
GTM IN details.


iLLD_TC26B: Graph Legend

Graph Legend

This page explains how to interpret the graphs that are generated by doxygen.

Consider the following example:

/*! Invisible class because of truncation */
class Invisible { };
/*! Truncated class, inheritance relation is hidden */
class Truncated : public Invisible { };
/* Class not documented with doxygen comments */
class Undocumented { };
/*! Class that is inherited using public inheritance */
class PublicBase : public Truncated { };
/*! A template class */
template<class T> class Templ { };
/*! Class that is inherited using protected inheritance */
class ProtectedBase { };
/*! Class that is inherited using private inheritance */
class PrivateBase { };
/*! Class that is used by the Inherited class */
class Used { };
/*! Super class that inherits a number of other classes */
class Inherited : public PublicBase,
protected ProtectedBase,
private PrivateBase,
public Undocumented,
public Templ<int>
{
private:
Used *m_usedClass;
};

This will result in the following graph:

The boxes in the above graph have the following meaning:

  • A filled gray box represents the struct or class for which the graph is generated.
  • A box with a black border denotes a documented struct or class.
  • A box with a gray border denotes an undocumented struct or class.
  • A box with a red border denotes a documented struct or class forwhich not all inheritance/containment relations are shown. A graph is truncated if it does not fit within the specified boundaries.

The arrows have the following meaning:

  • A dark blue arrow is used to visualize a public inheritance relation between two classes.
  • A dark green arrow is used for protected inheritance.
  • A dark red arrow is used for private inheritance.
  • A purple dashed arrow is used if a class is contained or used by another class. The arrow is labelled with the variable(s) through which the pointed class or struct is accessible.
  • A yellow dashed arrow denotes a relation between a template instance and the template class it was instantiated from. The arrow is labelled with the template parameters of the instance.


iLLD_TC26B: lld_api.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
lld_api.c
Go to the documentation of this file.
1 /** \page lld_api iLLD APIs
2
3 This section provides the generic overview of APIs required for a iLLD
4
5 \section lldinitapi iLLD Init APIs
6
7 iLLDs which need the user configuration data, shall declare the data type for configuration. These data structures are instantiated by the higher level software. Following are the requirements for the driver.
8
9 \section lldcfgapi Initialization of configuration data structure
10
11 Any driver which uses the configuration data structure shall provide an interface to initialize these data structure elements to their default values. Main used case of such implementation is, when a driver is upgraded with an additional configuration parameter, such initialization would provide correct value to the variable so that the driver works correctly when used with legacy application software which used the previous version of the driver. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
12
13 Data structure shall be instantiated per HW instance for which the driver is targeted
14
15 The generic prototype shall be as\n
16 <B><Driver Prefix>_initConfig(<Driver Prefix>_Config *cfg);</B>\n
17 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
18
19 \section driverinit Driver Initialization
20
21 The iLLD shall provide an API to initialize the driver peripheral based on the user configuration. Configuration data shall be previously initialized to default values with init config interface. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
22
23 The driver initialization API shall initialize the peripheral registers to make the peripheral to work as drivers functionality. This API shall also initialize the driver internal data structure to their required init values.
24
25 The generic prototype shall be as\n
26 <B><Driver Prefix>_init(<Driver Prefix>_Handle *handle, <Driver Prefix>_Config *cfg);</B>\n
27 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
28
29 \section driverdeinit Driver De-Initialization
30
31 iLLD may provide an API to reset the driver to default reset state and to make to consume least power. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals.
32 The generic prototype shall be as\n
33 <B><Driver Prefix>_deInit(<Driver Prefix>_Handle *handle);</B>\n
34 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
35
36 \section funct_api iLLD functional APIs
37
38 iLLD shall provide API for each of the needed functionality the user may use. The API shall be made as one instance in the flash but shall be able to function on any number of identical peripherals. For each of the peripherals instances the parameter passed will be deferring.
39
40 The generic prototype shall be as\n
41 <B><Driver Prefix>_<functionality>(<Driver Prefix>_Handle *handle);</B>
42 where Driver Prefix example is IfxVadc or IfxGtmTom_Pwm.
43
44 \section lld_internal iLLD internal methods
45
46 For better modularisation readability reasons the driver implementations shall use the internal static functions. In such cases the function definitions shall be defined in the similar way as iLLD functional APIs
47
48
49 [\ref lld_structure "Previous page"] [\ref lld_conventions "Next page"]
50 */


iLLD_TC26B: lld_codingRules.c Source File

  • bollusai
  • illd_development
  • internal
  • tools
  • doc
  • doxygen
  • common
  • codingRules
lld_codingRules.c
Go to the documentation of this file.
1 /**
2 \page lld_codingRules Coding rules
3
4 -# \subpage lld_codingRules_codeFormating
5 -# \subpage lld_codingRules_general
6 -# \subpage lld_codingRules_codeChecking
7 -# \subpage lld_dosanddont_commonApis
8
9 [\ref lld_conventions "Previous page"] [\ref lld_codingRules_codeFormating "Next page"]
10
11 \page lld_codingRules_general General rules
12
13 \section curlyBraces Always use curly braces for if, for, while, do, ...
14
15 Correct:
16 \code
17 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
18 {
19 ...
20 if( config->shadowControl != 0)
21 {
22 channel->SHADR.U = config->shadowAddress;
23 }
24 }
25 \endcode
26
27 Wrong:
28 \code
29 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
30 {
31 ...
32 if( config->shadowControl != 0)
33 channel->SHADR.U = config->shadowAddress;
34 }
35 \endcode
36
37
38
39
40 [\ref lld_codingRules_codeFormating "Previous page"] [\ref lld_codingRules_codeChecking "Next page"]
41
42
43
44
45 \page lld_codingRules_codeChecking Code checking
46 \section parameterCheck Parameter check
47 In case the parameter can not be checked by the compiler for valid values, it shall be checked using the assertion function.
48
49 Example:
50 \code
51 IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
52 {
53 IFX_ASSERT(VERBOSE_LEVEL_ERROR,transferCount < 32);
54 }
55 \endcode
56
57
58
59
60
61 [\ref lld_codingRules_general "Previous page"] [\ref lld_dosanddont_commonApis "Next page"]
62
63
64
65
66 */


iLLD_TC26B: lld_codingRules_codeFormating.c Source File

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lld_codingRules_codeFormating.c
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1 /**
2
3 \page lld_codingRules_codeFormating Code formating
4 \section autoformating Auto-formating
5 Only use the code formating as defined by following script: $VERIF_LLD/bin/indent_rec
6
7 \section ignoreautoformating Ignore auto-formating
8 In case the source code shall not be formated by the formating tool the following command can be used:
9 \code
10 // *INDENT-OFF* Note: this file was indented manually by the author.
11 ... place here code that shall not be formated by the tool
12 // *INDENT-ON*
13 \endcode
14
15 \section fileStructure File structure
16 The source code in a file should be grouped using doxygen groups.
17 Groups should be sorted in the file by alphabetical order of the group name.
18 Inside a group, code shall be sorted by alphabetical order of the API names.
19
20
21
22 [\ref lld_codingRules "Previous page"] [\ref lld_codingRules_general "Next page"]
23
24 */


iLLD_TC26B: lld_codingRules_commonApis.c Source File

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lld_codingRules_commonApis.c
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1 /**
2 \page lld_dosanddont_commonApis APIs common to many module drivers
3
4 \section lld_dosanddont_commonApis_getSrc <modue>_get<Interrupt>Src()
5 For each interrupt service request control register, an API that returns the register address shall be available. The API syntax is as follow:
6 volatile Ifx_SRC_SRCR* <driverName>_get<Interrupt>Src(<ModuleType>*module);
7
8 Example: The transmit interrupt of the QSPI driver has the following API:
9
10 volatile Ifx_SRC_SRCR* IfxQspi_getTransmitSrc(Ifx_QSPI* module);
11
12
13
14 \section lld_dosanddont_commonApis_get_index <modue>_getIndex()
15 The API Ifx<Module>_getIndex(Ifx_<MODULE>* module) shall be implemented in the file Ifx<Module>.c/h and use an array define in Ifx<Module>_cfg.c/h;
16
17 Example:
18
19 In file Ifxcpu.h
20 \code
21 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);
22 \endcode
23
24 In file Ifxcpu.c
25 \code
26 // brief Return cpu index
27 //
28 // \param cpu Specifies cpu module
29 //
30 // \return Return cpu index.
31 //
32 IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu)
33 {
34 IfxCpu_ResourceCpu result = IfxCpu_ResourceCpu_none, index;
35 for (index = 0; index < IFXCPU_COUNT; index++)
36 {
37 if (IfxCpu_cfg_indexMap[index].module == cpu)
38 {
39 result = IfxCpu_cfg_indexMap[index].index;
40 break;
41 }
42 }
43 return result;
44 }
45
46 \endcode
47
48 In file Ifxcpu_cfg.h
49 \code
50 // List of the available CPU resources
51 typedef enum
52 {
53 IfxCpu_ResourceCpu_0 = 0, // CPU 0
54 IfxCpu_ResourceCpu_1, // CPU 1
55 IfxCpu_ResourceCpu_2, // CPU 2
56 IfxCpu_ResourceCpu_none // None of the CPU
57 } IfxCpu_ResourceCpu;
58
59 IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU* cpu);
60 \endcode
61
62 In file Ifxcpu_cfg.c
63 \code
64 const IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_COUNT] =
65 {
66 {&MODULE_CPU0, IfxCpu_ResourceCpu_0},
67 {&MODULE_CPU1, IfxCpu_ResourceCpu_1},
68 {&MODULE_CPU2, IfxCpu_ResourceCpu_2},
69 };
70 \endcode
71
72
73
74 [\ref lld_codingRules_codeChecking "Previous page"] [\ref lld_doxygenRules "Next page"]
75
76
77
78 */


iLLD_TC26B: lld_conventions.c Source File

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lld_conventions.c
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1 /** \page lld_conventions Naming Conventions
2
3 This section provides the naming convention to be followed during development.
4
5 As general rule all the "exported" types/definitions/class/objects (i.e. Function, enum, typedef, constant, variable, ...) should start with the filename + underscore "_".
6
7 Example: in file IfxScuWdt.c/h the function shall be:
8 \li IfxScuWdt_enableEndinit()
9 \li IfxScuWdt_disableEndinit()
10
11
12 \section files iLLD Files
13
14 Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special][sub SW module name].c/h
15
16 Example:
17 \li 1) With HW module only without sub-module: IfxPort.c/.h
18 \li 2) With HW module and sub-module: IfxScuWdt.c/.h
19 \li 3) With HW module sub-module and SW driver: IfxGtmTom_Pwm.c/.h
20 \li 4) With HW module sub-module and SW driver + SW sub module: IfxGtmTom_PwmHl.c/.h (only if it makes sense to split the 10:files to make it modular)
21
22 Important things to check during review/ or with static code check tools:
23 \li 1) Prefix: Ifx (in title case)
24 \li 2) <module name>[<HW Sub module name>] (in camel case)
25 \li 3) [_SW Driver if special] (an underscore to separate and title case SW driver name)
26 \li 4) .c and .h in the small case
27
28
29 \section types Data Types
30 <B>typedef <standard type> Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<user type name>;</B>
31
32 <Standard type> structure/union/enum definitions with its elements, and other C data types
33
34 Example:
35 \code
36 typedef struct
37 {
38 uint32 pllFreqInHz;
39 uint32 stepFreqInHz;
40 uint8 stepPerIn_uSec;
41 uint8 pDivider;
42 uint8 nDivider;
43 uint8 k2Divider;
44 } IfxScu_Pll_Config;
45 \endcode
46
47 Important things to check:
48 \li 1) Points 1 to 3 for filenames
49 \li 2) _<user type name >: an underscore to separate with the rest and Camel case letters (first letter also capital).
50
51
52 \section struct Structures
53
54 To define structure types the convention shall be followed as in type defines above.
55
56 For structure elements simple name with camel case letters with first letter small shall be used.
57
58 Refer to the example for naming convention for type defines
59
60
61 \section enum Enumerated Types
62 To define enum types the convention shall be followed as in type defines above.
63
64 For enum elements following naming convention to be followed:\n
65 <B>Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<Enum Name>_<Enum element></B>
66
67 <Enum element> camel case letter
68 <Enum Name> Camel case letter
69
70 Example:
71 \code
72 typedef enum {
73 IfxDma_ChannelPriority_low = 0,
74 IfxDma_ChannelPriority_medium,
75 IfxDma_ChannelPriority_high
76 } IfxDma_ChannelPriority;
77 \endcode
78
79 Important things to check:
80 \li 1) Points 1 to 3 for filenames
81 \li 2) _<Enum Element>: an underscore to separate with the rest and Camel case letters (first letter lower case).
82
83
84
85 \section defines #define Constants or Macros
86
87 <B>#define IFX<MODULE>[<HW SUB MODULE NAME>][_SW DRIVER]_<FUNCTIONALITY NAME></B>
88
89 <FUNCTIONALITY NAME>: Meaningful name to represent the functionality. With "_" to separate words
90
91 Example:
92 \code
93 #define IFXSCUCCU_PLL_FREE_RUNNING_FREQ (100000000U)
94 \endcode
95
96 Important things to check:
97 \li 1) all capital letters
98
99
100 \section function Functions
101
102 All exported functions:
103 <B>Ifx<HW Module name>[<HW Sub module name>][_SW Driver if special]_<Functionality></B>
104
105 Example:
106
107 \code
108 IfxGtmTom_Pwm_setDutyCycle(..)
109 \endcode
110
111 Important things to check:
112 \li 1) Points 1 to 3 for filenames
113 \li 2)_<Functionality>: an underscore to separate and Camel case letters with first letter small. (Convention used with object oriented programming). Functionality shall start with the main action (verb) to be fulfilled with the interface.
114
115 For example:
116 \li An interface to set pin level high, the function name is setPinHigh.
117 \li An interface to read the result of ADC conversion is readResult
118 \li An interface to send the data byte over communication peripheral sendByte
119
120 \section parameter Function's parameter & struct members
121 Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.
122
123 Examples:
124 \code
125 typedef struct
126 {
127 boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
128 } IfxDma_Dma_ChannelConfig;
129 \endcode
130
131 \section inline Inline Functions
132
133 All inline functions as:\n
134 <B>IFX_INLINE <function definition></B>
135
136 Shall follow the naming conventions as in Functions
137
138
139 \section standard Infineon definitions for Standard Data Types
140
141 Located in \ref Cpu/Std/Platform_Types.h
142
143
144 [\ref lld_api "Previous page"] [\ref lld_codingRules "Next page"]
145 */


iLLD_TC26B: lld_conventionsDoxygen.c Source File

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lld_conventionsDoxygen.c
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1 /**
2 \page lld_doxygenRules Doxygen rules
3
4 \section ucRootGroup Microcontroller root group
5 The microcontroller documentation root group is IfxLld. The group is defined in the file info.dox located in the microcontroller derivative root directory.
6
7 Example:
8 \code
9 * \defgroup IfxLld TC27x B-Step Microcontroller
10 \endcode
11
12 \section moduleGroup Modules group
13 Module's group names have the follwing syntax: '\\defgroup IfxLld_<Module>'.
14 The group is direct child of the \ref ucRootGroup.
15
16 v <Module> is the module short name in with the 1st letter upper case and then lower case. The group name is defined in the Ifx<Module>_regdef.h file. Example:
17 \code
18 * \defgroup IfxLld_Dma DMA
19 * \ingroup IfxLld
20 \endcode
21
22 The following groups are also defined in the Ifx<Module>_regdef.h file for each modules:
23 - IfxLld_<Module>_Bitfields : Bitfield macro definition
24 - IfxLld_<Module>_Union : module union types
25 - IfxLld_<Module>_Struct : module struct types
26
27 \section moduleStdGroup Module standard driver group
28 Module's standard driver group have the follwing syntax: '\\defgroup IfxLld_<Module>_Std'.
29 The group is direct child of the \ref moduleGroup.
30
31 Example:
32 \code
33 * \defgroup IfxLld_Asclin_Std Basic functionality
34 * \ingroup IfxLld_Asclin
35 \endcode
36
37
38 \section moduleInterfaceGroup Module interface driver group
39 Module's interface driver group have the follwing syntax: '\\defgroup IfxLld_<Module>_<Interface>'.
40 The group is direct child of the \ref moduleGroup.
41
42 <Interface> is the interface driver name.
43
44 Example:
45 \code
46 * \defgroup IfxLld_Asclin_AscIf ASC interface driver
47 * Implements the standard ASC interface
48 * \ingroup IfxLld_Asclin
49 \endcode
50
51 \section generalRules General rules
52 - As group name are global names, a group name shall start with the parent group name.
53 - Group names are 1st letter upper case, then camel case, group levels are separated by underscore
54
55 Example:
56 - |--IfxLld
57 - | |--IfxLld_Dma
58 - | | |--IfxLld_Dma_Std
59 - | | |--IfxLld_Dma_Std_ChannelTransaction
60 - | | |--IfxLld_Dma_Dma
61
62
63 \section docReturnValue Documentation of return values
64 The return value shall be documented using \\return when docuementation is provided for a single case.
65
66 The return value shall be documented using \\retval when docuementation is provided for a multiple case.
67
68 Example (single case):
69 \code
70 * \return Return the raw converted analog value.
71 \endcode
72 Output:
73 * \return Return the raw converted analog value.
74
75 Example (multiple case):
76 \code
77 * \retval TRUE in case of success
78 * \retval FALSE in case of error
79 \endcode
80 Output:
81 * \retval TRUE in case of success
82 * \retval FALSE in case of error
83
84
85 \section parameterDocumentation
86 Documentation shall provide range for parameters when not entirely defined.
87
88 Example:
89 \code
90 // \param transferCount Number of transaction, Range=[0,32]
91 IFX_INLINE void IfxDma_setChannelTransaction(Ifx_DMA* dma,IfxDma_ChannelId channelId, uint32 transferCount)
92 { ... }
93 \endcode
94
95 [\ref lld_dosanddont_if "Previous page"] [\ref lld_filesAndConfig "Next page"]
96
97 */


iLLD_TC26B: lld_dosanddont.c Source File

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lld_dosanddont.c
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1 /**
2 \page lld_dosanddont Do's and don't
3
4 -# \subpage lld_dosanddont_namingConvention
5 -# \subpage lld_dosanddont_codingRules
6 -# \subpage lld_dosanddont_documentation
7 -# \subpage lld_dosanddont_optimisation
8 -# \subpage lld_dosanddont_enumUsage
9
10
11
12 [\ref lld_versioning "Previous page"] [\ref lld_dosanddont_namingConvention "Next page"]
13
14
15 \page lld_dosanddont_codingRules Coding rules
16
17 \section typeAssumption Type assumption
18 <SPAN style="font-family:courier;font-size:small;">[link: \ref typeAssumption]</SPAN>
19
20 Bitfield values should not be assumed as Boolean.
21
22 Correct:
23 \code
24 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
25 {
26 return dma->CH[channelId].CHCSR.B.LXO != 0;
27 }
28 \endcode
29
30 Wrong:
31 \code
32 IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA* dma,IfxDma_ChannelId channelId)
33 {
34 return dma->CH[channelId].CHCSR.B.LXO;
35 }
36 \endcode
37
38
39 \section variableNmaes Variable names
40 <SPAN style="font-family:courier;font-size:small;">[link: \ref variableNmaes]</SPAN>
41
42 Use explicit names for variable.
43 Example:
44 With
45 \code
46 Ifx_DMA* dma;
47 dma->source = 0x123;
48 \endcode
49 the code can be easier understand than with
50 \code
51 Ifx_DMA* baseAddr;
52 baseAddr->source = 0x123;
53 \endcode
54
55 \section numbers Avoid numbers, use constant instead
56 <SPAN style="font-family:courier;font-size:small;">[link: \ref numbers]</SPAN>
57
58
59 Correct:
60 \code
61 #define IFXDMA_DMA_ENABLE_SHADOW_ADDRESS (2) // Position of the shadow address enable bit
62
63 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
64 {
65 ...
66 if( config->shadowControl & (1 << IFXDMA_DMA_ENABLE_SHADOW_ADDRESS) )
67 {
68 channel->SHADR.U = config->shadowAddress;
69 }
70 }
71 \endcode
72
73 Wrong:
74 \code
75 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
76 {
77 ...
78 if( config->shadowControl & (1 << 2) )
79 {
80 channel->SHADR.U = config->shadowAddress;
81 }
82 }
83 \endcode
84
85 . Example(1 << 2) below
86
87
88 [\ref lld_dosanddont_namingConvention "Previous page"] [\ref lld_dosanddont_documentation "Next page"]
89
90 \page lld_dosanddont_documentation Documentation
91
92 \section theSame Avoid 'the same' in documentation
93 <SPAN style="font-family:courier;font-size:small;">[link: \ref theSame]</SPAN>
94
95 Correct:
96 \code
97 boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request
98 \endcode
99
100 Wrong(<SPAN style="font-family:courier"><SPAN style="color:red">for the same</SPAN></SPAN>):
101 \code
102 boolean channelInterrupt; // \brief Determines the setting of the channel transfer interrupt flag and interrupt service request for the same
103 \endcode
104
105
106
107 [\ref lld_dosanddont_codingRules "Previous page"] [\ref lld_dosanddont_optimisation "Next page"]
108
109
110 */


iLLD_TC26B: lld_dosanddont_enumUsage.c Source File

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lld_dosanddont_enumUsage.c
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1 /**
2
3 \page lld_dosanddont_enumUsage Usage of enums
4 \section convention_in_std enum convention in microcontroller /Std drivers
5 <SPAN style="font-family:courier;font-size:small;">[link: \ref convention_in_std]</SPAN>
6
7
8 \todo Discuss and agree on the enum naming convention
9
10 In case an enum represents a register bitfield value, then the following rules apply:
11 - The enum type shall have an explicit name. The name shall not include register or bitfield short names. This is to abstract the setting when passed as a parameter to a function in the same way the function APIs names does.
12 - Each enum member shall define explicitly an enum value with '='.
13 - The enum documentation shall state for which register bitfield the enum has been defined with "Definition for <ModuleType>.<REGISTER NAME>.B.<BITFIELDNAME>", this to avoid misuse of the enum.
14 - Each of the member shall have a documentation, that explain to users what is the enum for without reading the user manual.
15 - Only enum defined in the current Std or base drivers shall be used.
16
17 Correct:
18 \code
19 // File Std/IfxQspi.h
20
21 // QSPI controller mode
22 // Definition for Ifx_QSPI.GLOBALCON.B.MS
23 typedef enum
24 {
25 IfxQspi_Mode_master = 0, // QSPI in "master" mode
26 IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
27 IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
28 } IfxQspi_Mode;
29
30 void IfxQspi_foo(IfxQSPI* module)
31 {
32 if (module->GLOBALCON.B.MS != IfxQspi_Mode_slave)
33 { //...
34 }
35 else
36 { // ...
37 }
38 }
39
40 \endcode
41
42 Wrong:
43 \code
44 // File 1_SrvSw/If/SscIf.h
45
46 // SSC operation modes
47 typedef enum
48 {
49 SscIf_Mode_master, // Master mode
50 SscIf_Mode_slave, // Slave mode
51 SscIf_Mode_undefined // Undefined mode
52 } SscIf_Mode;
53
54 // File Std/IfxQspi.h
55
56 // QSPI controller mode
57 typedef enum
58 {
59 IfxQspi_GLOBALCON_MS_master = 0, // Corresponds with GLOBALCON.B.MS == 0
60 IfxQspi_GLOBALCON_MS_pwmOverSpi, // Corresponds with GLOBALCON.B.MS == 1
61 IfxQspi_GLOBALCON_MS_slave // Corresponds with GLOBALCON.B.MS == 2
62 } IfxQspi_GLOBALCON_MS;
63
64 void IfxQspi_foo(IfxQSPI* module)
65 {
66 if (module->GLOBALCON.B.MS != SscIf_Mode_slave)
67 { //...
68 }
69 else
70 { // ...
71 }
72 }
73
74 \endcode
75
76
77 \section enum_in_std Usage of enums in microcontroller interface drivers
78 <SPAN style="font-family:courier;font-size:small;">[link: \ref enum_in_std]</SPAN>
79
80
81 The code dependencies shall be limited to the microcontroller HAL and service software interface /1_SrvSw/If, therefore only enums from this files can be used.
82
83 \code
84 // File 1_SrvSw/If/SscIf.h
85
86 // SSC operation modes
87 typedef enum
88 {
89 SscIf_Mode_master, // Master mode
90 SscIf_Mode_slave, // Slave mode
91 SscIf_Mode_undefined // Undefined mode
92 } SscIf_Mode;
93
94 // File Ssc/IfxQspi_Ssc.h
95
96 // QSPI controller mode
97 // Definition for Ifx_QSPI.GLOBALCON.B.MS
98 typedef enum
99 {
100 IfxQspi_Mode_master = 0, // QSPI in "master" mode
101 IfxQspi_Mode_pwmOverSpi = 1, // QSPI in "PWM over SPI" mode
102 IfxQspi_Mode_slave = 2 // QSPI in "slave" mode
103 } IfxQspi_Mode;
104
105
106
107 SscIf_Mode IfxQspi_Ssc_foo(void)
108 {
109 SscIf_Mode mode;
110 switch ( IfxQspi_getMode(&MODULE_QSPI0))
111 {
112 case IfxQspi_Mode_master:
113 mode = SscIf_Mode_master;
114 break;
115 case IfxQspi_Mode_slave:
116 mode = IfxQspi_Mode_slave;
117 break;
118 default:
119 mode = SscIf_Mode_undefined;
120 break;
121 }
122 }
123 \endcode
124
125 \section enumIndex Enum name with index
126 <SPAN style="font-family:courier;font-size:small;">[link: \ref enumIndex]</SPAN>
127
128 Do not use left zero padding for enum names, because the highest index number can not be assumed to be fixed.
129
130 Correct:
131 \code
132 typedef enum
133 {
134 Dma_Channel_0 = 0,
135 Dma_Channel_1 = 1,
136 Dma_Channel_2 = 2,
137 Dma_Channel_3 = 3
138 } IfxQspi_Mode;
139 \endcode
140
141 Wrong:
142 \code
143 typedef enum
144 {
145 Dma_Channel_00 = 0,
146 Dma_Channel_01 = 1,
147 Dma_Channel_02 = 2,
148 Dma_Channel_03 = 3
149 } IfxQspi_Mode;
150 \endcode
151
152 \section enumPrefix Enum members shall be prefixed with the enum type
153 <SPAN style="font-family:courier;font-size:small;">[link: \ref enumPrefix]</SPAN>
154
155
156 Correct:
157 \code
158 typedef enum
159 {
160 IfxDma_Channel_0 = 0,
161 } IfxDma_Channel;
162 \endcode
163
164 Wrong(<SPAN style="font-family:courier">IfxDma_Channel<SPAN style="color:red">Id</SPAN></SPAN>):
165 \code
166 typedef enum
167 {
168 Dma_Channel_0 = 0,
169 } IfxDma_ChannelId;
170 \endcode
171
172
173
174
175 [\ref lld_dosanddont_optimisation "Previous page"]
176
177
178
179 */


iLLD_TC26B: lld_dosanddont_namingConvention.c Source File

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lld_dosanddont_namingConvention.c
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1 /**
2
3 \page lld_dosanddont_namingConvention Naming convention
4 \section enum Enum
5 <SPAN style="font-family:courier;font-size:small;">[link: \ref enum]</SPAN>
6
7 Enumeration items must be prefixed with the enumeration type.
8
9 Correct:
10 \code
11 typedef enum
12 {
13 IfxDma_ChannelPriority_low = 0,
14 IfxDma_ChannelPriority_medium,
15 IfxDma_ChannelPriority_high
16 } IfxDma_ChannelPriority;
17 \endcode
18 Wrong (<SPAN style="font-family:courier">IfxDma_ChannelPriority<SPAN style="color:red">Select</SPAN></SPAN>):
19 \code
20 typedef enum
21 {
22 IfxDma_ChannelPriority_low = 0,
23 IfxDma_ChannelPriority_medium,
24 IfxDma_ChannelPriority_high
25 } IfxDma_ChannelPrioritySelect;
26 \endcode
27
28
29
30 \section directoryName Directory name
31 <SPAN style="font-family:courier;font-size:small;">[link: \ref directoryName]</SPAN>
32
33 Dirtectory shall have the same name as the driver name without the Ifx prefix.
34
35 Correct:
36 - Dma
37 - Dma
38 - IfxDma.c
39 - IfxDma.h
40
41 Wrong:
42 - Dma
43 - <SPAN style="color:red">Interface</SPAN>
44 - IfxDma.c
45 - IfxDma.h
46
47
48 \section parameter Function's parameter & struct members
49 <SPAN style="font-family:courier;font-size:small;">[link: \ref parameter]</SPAN>
50
51 Function parameter are not doing an action done but does set values for confiuguration, then there is no verb in the name.
52
53 Correct:
54 \code
55 typedef struct
56 {
57 boolean hardwareRequestEnabled; // \brief Enabling the hardware channel request
58 } IfxDma_Dma_ChannelConfig;
59 \endcode
60
61 Wrong(<SPAN style="font-family:courier"><SPAN style="color:red">enable</SPAN>HardwareRequest</SPAN>):
62 \code
63 typedef struct
64 {
65 boolean enableHardwareRequest; // \brief Enabling the hardware channel request
66 } IfxDma_Dma_ChannelConfig;
67 \endcode
68
69 \section staticFunctionNames Static function names shall also be prefixed
70 <SPAN style="font-family:courier;font-size:small;">[link: \ref staticFunctionNames]</SPAN>
71
72
73 Correct:
74 \code
75 static void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
76 \endcode
77
78 Wrong:
79 \code
80 static void configureTransactionSet(Ifx_DMA_CH* channel, IfxDma_Dma_ChannelConfig* config)
81 \endcode
82
83 \section parameterhandle Do not explicitely use 'handle' in the parameter name
84 <SPAN style="font-family:courier;font-size:small;">[link: \ref parameterhandle]</SPAN>
85
86 Remove the name ‘handle’ from the parameter’s name, even we hnow that it is an handle. It does not add information but increase the source code length.
87
88 Correct:
89 \code
90 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dma);
91 \endcode
92
93 Wrong(<SPAN style="font-family:courier">dma<SPAN style="color:red">Handle</SPAN></SPAN>):
94 \code
95 IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig* config, IfxDma_Dma* dmaHandle);
96 \endcode
97
98
99 [\ref lld_dosanddont "Previous page"] [\ref lld_dosanddont_codingRules "Next page"]
100
101 */


iLLD_TC26B: lld_dosanddont_optimisation.c Source File

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lld_dosanddont_optimisation.c
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1 /**
2 \page lld_dosanddont_optimisation Optimisation
3 \section moduleRegisterAccessByArray Module register access (array)
4 <SPAN style="font-family:courier;font-size:small;">[link: \ref moduleRegisterAccessByArray]</SPAN>
5
6 Code should be optimised by using array index instead of if..else.
7
8 Correct:
9 \code
10 dma->BLK[index]. ...
11 \endcode
12
13 Wrong:
14 \code
15 if( moveEngine == IfxDma_MoveEngine_1 )
16 {
17 dma->BLK1. ...
18 }
19 else
20 {
21 dma->BLK0. ...
22 }
23 \endcode
24
25 In case the array is not available in the module structure definition, please request for implementation. The reasons could be:
26 - it has been forgotten to build the array during the register header file generation
27 - the module address map does not currently supports the array access
28
29 \section moduleRegisterAccess Module register access (read modify write)
30 <SPAN style="font-family:courier;font-size:small;">[link: \ref moduleRegisterAccess]</SPAN>
31
32 Runtime optimisation should be done by utilizing a local variable when more than one bitfield of a register is to be modified.
33
34 Correct:
35 \code
36 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
37 {
38 Ifx_DMA_BLK_ME_ADICR adicr;
39 adicr.U = dma->CH[channelId].ADICR.U;
40 adicr.B.SMF = incStep;
41 adicr.B.INCS = direction;
42 adicr.B.CBLS = size;
43 dma->CH[channelId].ADICR.U = adicr.U;
44 }
45 \endcode
46
47 Wrong:
48 \code
49 IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA* dma,IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
50 {
51 dma->CH[channelId].ADICR.B.SMF = incStep;
52 dma->CH[channelId].ADICR.B.INCS = direction;
53 dma->CH[channelId].ADICR.B.CBLS = size;
54 }
55 \endcode
56
57 [\ref lld_dosanddont_documentation "Previous page"] [\ref lld_dosanddont_enumUsage "Next page"]
58
59
60
61 */


iLLD_TC26B: lld_filesAndConfig.c Source File

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lld_filesAndConfig.c
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1 /** \page lld_filesAndConfig Files and Configuration
2
3 \section folders Folder structure
4
5 Starting from <B>Src/BaseSw/</B>:
6 <li> <B>iLLD</B> contains the iLLD files for all derivatives
7 <ol>
8 <li> Inside <B>Src/BaseSw/iLLD/<DUT>/Tricore</B>:
9 <li> <B>_Build</B> contains the set of files to be included to build the specific driver. Mostly used by internal tools
10 <li> <B>_Impl</B> contains derivative specific configuration which could also be adapted by the user
11 <li> <B>_PinMap</B> contains I/O configurations in pin tables
12 <li> <B>_Lib</B> contains derivative dependent library functions
13 <li> <B><module></B> contains the actual peripheral driver
14 </ol>
15 <li> <B>Infra</B> contains the header files for all derivatives, compiler specific files and application start-up software files for Aurix2G derivatives
16 <ol>
17 <li> Inside <B>Src/BaseSw/Infra/Platform/Tricore/Compilers</B> contains the compiler specific files
18 <li> Inside <B>Src/BaseSw/Infra/Sfr/<DUT></B> contains the header files
19 <li> Inside <B>Src/BaseSw/Infra/Ssw/<DUT>/Tricore</B> contains the application start-up software files
20 </ol>
21 <li> <B>Service</B> contains derivative independent service software sources
22
23 <li> <B>VERIF_DUT</B> stands for the derivative which should be selected
24
25
26 \section ifxCfgH Ifx_Cfg.h
27
28 Please create a configuration file with the name "Ifx_Cfg.h" in your application to
29 configure the iLLD library components.
30
31 Currently it only requires to select the external oscillator frequency (XTAL)
32 and the desired system frequency.
33
34 In addition, this file allows you to specify how assertions should be print out.
35
36 Minimal Ifx_Cfg.h file:
37 \code
38 #ifndef IFX_CFG_H
39 #define IFX_CFG_H
40
41 // XTAL/PLL frequency
42 #define IFX_CFG_SCU_XTAL_FREQUENCY (20000000)
43 #define IFX_CFG_SCU_PLL_FREQUENCY (200000000)
44
45 // Assertions
46 #define IFX_ASSERT(level, expr)
47
48 #endif /* IFX_CFG_H */
49 \endcode
50
51 The configuration macros mentioned below can be overridden in Ifx_Cfg.h:
52 \li IFX_CFG_DISABLE_DEFAULT_INTRINSICS - IFX_CFG_DISABLE_DEFAULT_INTRINSICS shall be defined in Ifx_Cfg.h to disable the default intrinsics provided For Ex. NOP,CRC
53 \li IFX_CFG_USE_COMPILER_DEFAULT_LINKER - IFX_CFG_USE_COMPILER_DEFAULT_LINKER shall be defined in Ifx_Cfg.h to use the default compiler provided linker varaibles and startup
54 \li IFX_USE_SW_MANAGED_INT - IFX_USE_SW_MANAGED_INT shall be defined in Ifx_Cfg.h to use the software based interrupts
55 SCU related Macros:
56 \li IFX_CFG_SCU_XTAL_FREQUENCY - IFX_CFG_SCU_XTAL_FREQUENCY shall be defined to respective XTAL frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL_FREQUENCY - IFX_CFG_SCU_PLL_FREQUENCY shall be defined to desired PLL frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL1_FREQUENCY - IFX_CFG_SCU_PLL1_FREQUENCY shall be defined to desired PLL1 frequency in Ifx_Cfg.h \li IFX_CFG_SCU_PLL2_FREQUENCY - IFX_CFG_SCU_PLL2_FREQUENCY shall be defined to desired PLL2 frequency in Ifx_Cfg.h \li <B>Applicable for only Aurix2G devices</B>:
57 \li Application Start-up related Macros:
58 \li IFX_CFG_SSW_ENABLE_TRICOREx (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx shall be defined to 0 in Ifx_Cfg.h to disable the CPUx.
59 \li IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_PCACHE shall be defined to 0 in Ifx_Cfg.h to disable the PCACHE of CPUx
60 \li IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE (x=0-5) - IFX_CFG_SSW_ENABLE_TRICOREx_DCACHE shall be defined to 0 in Ifx_Cfg.h to disable the DCACHE of CPUx
61
62 Example for Assertion output via printf:
63 \code
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67 // defined in main.c
68 extern const char* verboseLevelStr[6];
69
70 #define IFX_ASSERT(level, expr) (((expr) || (level > IFX_VERBOSE_LEVEL_ERROR)) ? ((void)0) : (void)printf("[ASSERT:%s] '%s' in %s:%d (function '%s')\n", verboseLevelStr[level], #expr, __FILE__, __LINE__, __func__))
71
72 #endif
73 \endcode
74
75
76 And in your main.c file (or somewhere else):
77
78 \code
79 //! this global array is used by IFX_ASSERT of iLLDs
80 const char* verboseLevelStr[6] = {
81 "OFF",
82 "FAILURE",
83 "ERROR",
84 "WARNING",
85 "INFO",
86 "DEBUG"
87 };
88 \endcode
89
90
91 \section minimalSetup Minimal Set of Driver sources
92
93 If you prefer to use (resp. compile) only a minimal set of drivers for your application, please add at least following "infrastructural resources":
94
95 \li <B>Src/BaseSw/Infra/Sfr/<DUT>/_Reg</B> directory
96 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Lib</B> directory
97 \li <B>Src/BaseSw/Service</B> directory
98 \li CPU driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Cpu</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxCpu_cfg.*</B>
99 \li DMA driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Dma</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxDma_cfg.*</B>
100 \li Port driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Port</B>, <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxPort_cfg.*</B> and <B>src/ifx/\$(VERIF_DUT)/_PinMap/IfxPort_PinMap.*</B>
101 \li SCU driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Scu</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxScu_cfg.*</B>
102 \li Src driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Src</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxSrc_cfg.*</B>
103 \li Stm driver: <B>Src/BaseSw/iLLD/<DUT>/Tricore/Stm</B> and <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/IfxStm_cfg.*</B>
104
105 Whenever additional drivers should be added, you typically have to copy following files/directories:
106
107 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/<driver></B>
108 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_Impl/<driver>_cfg.*</B>
109 \li <B>Src/BaseSw/iLLD/<DUT>/Tricore/_PinMap/<driver>_cfg.*</B>
110
111
112 \li For more information you can refer the BIFACES User Manual.
113
114 [\ref lld_doxygenRules "Previous page"] [\ref lld_versioning "Next page"]
115
116
117 */
118
NOP
#define NOP
Definition: IfxCpu_IntrinsicsDcc.h:2056
IFX_CFG_SCU_PLL_FREQUENCY
#define IFX_CFG_SCU_PLL_FREQUENCY
Default PLL frequency.
Definition: IfxScu_cfg.h:49
IFX_CFG_SCU_XTAL_FREQUENCY
#define IFX_CFG_SCU_XTAL_FREQUENCY
Default External oscillator frequency.
Definition: IfxScu_cfg.h:43
disable
void disable
Definition: IfxCpu_IntrinsicsDcc.h:448


iLLD_TC26B: lld_structure.c Source File

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lld_structure.c
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1 /** \page lld_structure General Structure of iLLDs
2
3 We can basically differ between two types of iLLDs:
4
5 \section unifunctional Unifunctional Peripheral Drivers
6
7 Unifunctional peripheral drivers are simple modules where the target peripheral is able to carry out one type of functionality.
8
9 Example: VADC peripheral for analog-to-digital conversion. Multican for CAN protocol communication, DMA for DMA functionality, etc.
10
11 \image html "unifunctional.png" Unifunctional Peripheral Driver
12
13 \section multifunctional Multifunctional Peripheral Drivers
14
15 These kind of peripheral drivers are complex to handle, and here the target peripheral can carry out multiple functionalities ("use cases").
16
17 Example: AscLin peripheral can be configured as a common UART, but also as a LIN or even a SPI.\n
18 GTM TOM/ATOM can be used as PWM generator, complex waveform generator and any generic timer, etc.
19
20 \image html "multifunctional.png" Multifunctional Peripheral Driver
21
22
23 \section lldcontent Content of Peripheral Drivers
24
25 iLLDs consist of following components:
26 \li Peripheral Register Memory Map (SFR header file)
27 \li a Standard Layer with (verbose) access functions to SFRs which are changed during application runtime
28 \li an Interface Layer with configuration and handling functions\n
29 Multiple Interface Layers could be available if the peripheral is used for different purposes.
30 \li Pinmaps to configure I/O multiplexers
31
32
33
34 \section configdata Configuration Data Structures
35
36 A configuration structure, which is part of an interface layer, holds the parameters to configure the driver. Depending on the iLLD and its associated peripheral there could be multiple levels of configuration data structures. As in case of VADC there could be data structure to configure the VADC module, a structure for the configuring the group and another for the channels.
37
38 The data structure shall be defined in a memory optimised way considering the structures are non-packed in the memory map. All the structure elements shall be organised in a way that they are ordered in the descending order of their physical memory size.
39
40 <B>Usage:</B> In normal cases configuration data structures are locally stored (on the stack) inside specific initialization routines. They can also be placed in the flash/ROM
41
42
43 <B>Example for a configuration struct:</B>
44 \code
45 typedef struct
46 {
47 const IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
48 IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
49 IfxVadc_GroupId master; /**< \brief Specifies the master group if own group is different master slave is configured */
50 IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Specifies arbiter configuration */
51 IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUMBER_OF_INPUTCLASS]; /**< \brief Specifies conversion settings one and two */
52 IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
53 IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
54 IfxVadc_Adc_ScanConfig backgroundScanReq; /**< \brief Specifies back ground scan configuration */
55 boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
56 } IfxVadc_Adc_GroupConfig;
57 \endcode
58
59 \section runtimevars Runtime Variables (Handles)
60
61 Runtime variables are usually stored in so called "handles". This structure is separated from the configuration structure mentioned above (because such structures are only needed during initialization phase).
62
63 Handles are used to reference resources of a peripheral by interface functions without unnecessary calculation or parameter passing overhead. A handle struct contains at least a pointer to the base address of the peripheral which should be accessed, pointers to peripheral subcomponents where required, and/or indices (such as a channel or timer number).
64
65 Handles are to be instantiated per instance of the used peripheral. Higher SW layers store knows number of instances required for the intended application and it reserves the memory for these many data structures.
66
67 The data structure must be made to be available in the DMI RAM of the Cpu from which lld API calls are more frequently done.
68
69 <B>Example for an handle:</B>
70 \code
71 typedef struct
72 {
73 IfxVadc_Adc module; /**< \brief The VADC handle structure */
74 Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
75 IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
76 } IfxVadc_Adc_Group;
77 \endcode
78
79
80 [\ref introduction "Previous page"] [\ref lld_api "Next page"]
81 */


iLLD_TC26B: lld_versioning.c Source File

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lld_versioning.c
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1 /**
2 \page lld_versioning Package versioning
3
4 \section versionNumber Package version number
5 Each released package is assigned a unique identifier that consists of four numbers that represent the major and the minor version numbers separated by underscores '_'.
6
7 For example: version 1_0_0_0_0
8
9 With each new release:
10 - either the minor version is incremented
11 - or the major version number is incremented and the minor and "major update" version number reset
12
13 the increment step for the minor and major number is >= 1.
14
15 \note The package version number is independent from the clearcase file version numbers
16 \endnote
17
18 The version number is available in the IfxLldVersion.h header file, so that it can be referenced (and compared) by application software. The content:
19 \code
20 #define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
21 #define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
22 #define IFX_LLD_VERSION_MAJOR_UPDATE 0 /**< \brief Informs about a release for a new derivative without further API changes */
23 #define IFX_LLD_VERSION_MINOR 0 /**< \brief Informs about new additions to the library */
24 #define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */
25 \endcode
26
27 \section changeSignificance Change significance
28 \subsection changeSignificanceMajor Change in the major version number
29 Change in the major version number indicates that the version may not be fully compatible with other major version numbers.
30 The reason for the incompatibility could be:
31 - changes in the API names, parameters...
32
33 \subsection changeSignificanceMajorUpdate Change in the "major update" version number
34 This part of the version number indicates that the library has been released for a new derivative without further API changes.
35
36 \subsection changeSignificanceMinor Change in the minor version number
37 Change in the minor version number indicates that the version is backward compatible with smaller minor version number with identical major version number.
38 The difference between minor version number are:
39 - new feature introduced
40 - bug fix
41 - update of documentation
42
43
44 [\ref lld_filesAndConfig "Previous page"] [\ref lld_dosanddont "Next page"]
45
46
47 */


iLLD_TC26B: mainpage.c Source File

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mainpage.c
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1 /** \mainpage IFX Low Level Drivers
2
3 \section introduction Introduction
4
5 The aim of the IFX Low Level Driver library (iLLD) is to provide access and configuration functions for the integrated peripherals of Infineon microcontrollers - from a simple timer register access up to 3 phases PWM driver for inverter applications. Together with SFR header files they are a fundamental part of the infrastructure for tests and applications which are developed by several teams at IFX ATV.
6
7 All drivers follow the same coding style to ensure a common "Look&Feel". The application interfaces (APIs) are defined and implemented by Hardware/Software experts, already tested pre-silicon with a virtual prototype or in RTL simulations, and then shared by all teams which are involved in programming software:
8
9 \image html "lld_usage.png" "iLLD Usage at Infineon"
10
11 This cross usage model should not only help to reduce development efforts, but also improve the quality/reliability of the drivers.
12
13 The strict iLLD coding guidelines allow layering of drivers for multi-dimensional system scenarios. There is no dependency between the peripheral drivers. Optionally they can be isolated from the library and provided as a separate package (e.g. for application notes delivered to customers).
14
15 iLLDs are currently planned for Aurix and Aurix 2G derivatives.
16
17 Each derivative has its own set of iLLD sources, which are located in GIT. Versionized packages are also distributed via MyICP.
18
19
20 \section toc Table Of Contents
21
22 \li \subpage lld_structure
23 \li \subpage lld_api
24 \li \subpage lld_conventions
25 \li \subpage lld_codingRules
26 \li \subpage lld_doxygenRules
27 \li \subpage lld_filesAndConfig
28 \li \subpage lld_versioning
29 \li \subpage lld_dosanddont
30
31 [\ref lld_structure "Next page"]
32
33 */
34
35 /**
36 * \defgroup IfxLld iLLD
37 */


iLLD_TC26B: Related Pages

Related Pages
Here is a list of all related documentation pages:
Resolver-to-digital Converter with DSADC